diff --git a/audio/cheetah/config/audio_platform_configuration.xml b/audio/cheetah/config/audio_platform_configuration.xml index b7f4265..0b204f6 100644 --- a/audio/cheetah/config/audio_platform_configuration.xml +++ b/audio/cheetah/config/audio_platform_configuration.xml @@ -187,7 +187,7 @@ - + @@ -286,7 +286,7 @@ - + diff --git a/audio/cheetah/config/mixer_paths.xml b/audio/cheetah/config/mixer_paths.xml index 43e9034..0063f1d 100644 --- a/audio/cheetah/config/mixer_paths.xml +++ b/audio/cheetah/config/mixer_paths.xml @@ -604,7 +604,7 @@ - + @@ -634,6 +634,10 @@ + + + + diff --git a/audio/cheetah/tuning/fortemedia/BLUETOOTH.dat b/audio/cheetah/tuning/fortemedia/BLUETOOTH.dat index 722b835..04a8e1b 100644 Binary files a/audio/cheetah/tuning/fortemedia/BLUETOOTH.dat and b/audio/cheetah/tuning/fortemedia/BLUETOOTH.dat differ diff --git a/audio/cheetah/tuning/fortemedia/BLUETOOTH.mods b/audio/cheetah/tuning/fortemedia/BLUETOOTH.mods index 21cd874..c2f94a8 100644 --- a/audio/cheetah/tuning/fortemedia/BLUETOOTH.mods +++ b/audio/cheetah/tuning/fortemedia/BLUETOOTH.mods @@ -1,11 +1,12 @@ #PLATFORM_NAME gChip #EXPORT_FLAG BLUETOOTH -#SINGLE_API_VER 1.1.6 -#SAVE_TIME 2021-08-20 16:32:53 +#SINGLE_API_VER 1.2.0 +#SAVE_TIME 2022-02-11 16:24:43 #CASE_NAME BLUETOOTH-RESERVE1-VOICE_GENERIC-FB -#PARAM_TYPE TX+RX -#TOTAL_CUSTOM_STEP 7 +#PARAM_MODE FULL +#PARAM_TYPE TX+2RX +#TOTAL_CUSTOM_STEP 7+7 #TX 0 0x0001 //TX_OPERATION_MODE_0 1 0x0000 //TX_OPERATION_MODE_1 @@ -258,12 +259,12 @@ 248 0xF800 //TX_THR_SN_EST_6 249 0xF800 //TX_THR_SN_EST_7 250 0x0100 //TX_DELTA_THR_SN_EST_0 -251 0x0000 //TX_DELTA_THR_SN_EST_1 +251 0x0100 //TX_DELTA_THR_SN_EST_1 252 0x0100 //TX_DELTA_THR_SN_EST_2 -253 0x0100 //TX_DELTA_THR_SN_EST_3 +253 0x0200 //TX_DELTA_THR_SN_EST_3 254 0x0200 //TX_DELTA_THR_SN_EST_4 255 0x0200 //TX_DELTA_THR_SN_EST_5 -256 0x0200 //TX_DELTA_THR_SN_EST_6 +256 0x0000 //TX_DELTA_THR_SN_EST_6 257 0x0200 //TX_DELTA_THR_SN_EST_7 258 0x4000 //TX_LAMBDA_NN_EST_0 259 0x4000 //TX_LAMBDA_NN_EST_1 @@ -289,12 +290,12 @@ 279 0x0000 //TX_B_POST_FLT_0 280 0x0000 //TX_B_POST_FLT_1 281 0x001A //TX_NS_LVL_CTRL_0 -282 0x001A //TX_NS_LVL_CTRL_1 +282 0x0014 //TX_NS_LVL_CTRL_1 283 0x0014 //TX_NS_LVL_CTRL_2 -284 0x0014 //TX_NS_LVL_CTRL_3 +284 0x000C //TX_NS_LVL_CTRL_3 285 0x000C //TX_NS_LVL_CTRL_4 286 0x000C //TX_NS_LVL_CTRL_5 -287 0x000C //TX_NS_LVL_CTRL_6 +287 0x001A //TX_NS_LVL_CTRL_6 288 0x000C //TX_NS_LVL_CTRL_7 289 0x000E //TX_MIN_GAIN_S_0 290 0x0014 //TX_MIN_GAIN_S_1 @@ -310,10 +311,10 @@ 300 0x7FFF //TX_SNRI_SUP_0 301 0x7FFF //TX_SNRI_SUP_1 302 0x7FFF //TX_SNRI_SUP_2 -303 0x7FFF //TX_SNRI_SUP_3 +303 0x4000 //TX_SNRI_SUP_3 304 0x4000 //TX_SNRI_SUP_4 305 0x4000 //TX_SNRI_SUP_5 -306 0x4000 //TX_SNRI_SUP_6 +306 0x7FFF //TX_SNRI_SUP_6 307 0x4000 //TX_SNRI_SUP_7 308 0x1200 //TX_THR_LFNS 309 0x0028 //TX_G_LFNS @@ -322,12 +323,12 @@ 312 0x7FFF //TX_A_POST_FILT_0 313 0x7FFF //TX_A_POST_FILT_1 314 0x4000 //TX_A_POST_FILT_S_0 -315 0x199A //TX_A_POST_FILT_S_1 +315 0x1000 //TX_A_POST_FILT_S_1 316 0x1000 //TX_A_POST_FILT_S_2 -317 0x1000 //TX_A_POST_FILT_S_3 +317 0x6666 //TX_A_POST_FILT_S_3 318 0x6666 //TX_A_POST_FILT_S_4 319 0x6666 //TX_A_POST_FILT_S_5 -320 0x6666 //TX_A_POST_FILT_S_6 +320 0x199A //TX_A_POST_FILT_S_6 321 0x6666 //TX_A_POST_FILT_S_7 322 0x2000 //TX_B_POST_FILT_0 323 0x2000 //TX_B_POST_FILT_1 @@ -387,10 +388,10 @@ 377 0x7FFF //TX_NOISE_TH_5_4 378 0x00C8 //TX_NOISE_TH_6 379 0x000A //TX_MINENOISE_TH -380 0x0000 //TX_MINENOISE_MIC0_TH_MTS -381 0x0000 //TX_MINENOISE_MIC0_TH_EXP -382 0x0000 //TX_MINENOISE_MIC0_S_TH_MTS -383 0x0000 //TX_MINENOISE_MIC0_S_TH_EXP +380 0x0000 //TX_MORENS_TFMASK_TH +381 0x0000 //TX_DRC_QUIET_FLOOR +382 0x0000 //TX_RATIODTL_CUT_TH +383 0x0000 //TX_DT_CUT_K1 384 0x0640 //TX_OUT_ENER_S_TH_CLEAN 385 0x0640 //TX_OUT_ENER_S_TH_LESSCLEAN 386 0x0640 //TX_OUT_ENER_S_TH_NOISY @@ -398,15 +399,15 @@ 388 0x07D0 //TX_OUT_ENER_TH_SPEECH 389 0x0000 //TX_SN_NPB_GAIN 390 0x0000 //TX_NN_NPB_GAIN -391 0x0000 //TX_CSX_ALPHA_0 -392 0x0000 //TX_CSX_ALPHA_1 -393 0x0000 //TX_CSX_ALPHA_2 -394 0x0000 //TX_CSX_ALPHA_3 -395 0x0000 //TX_MU_ARSP_EST -396 0x0000 //TX_P_OUTBEAM_MIN_TH +391 0x0000 //TX_POST_MASK_SUP_HSNE +392 0x0000 //TX_TAIL_DET_TH +393 0x0000 //TX_B_LESSCUT_RTO_WTA +394 0x0000 //TX_MEL_G_R +395 0x0000 //TX_SUPHIGH_TH +396 0x0000 //TX_MASK_G_R 397 0x0000 //TX_EXTRA_NS_L -398 0x0000 //TX_EXTRA_NS_A -399 0x0000 //TX_VR_NOISE_FLOOR_TH +398 0x0000 //TX_C_POST_FLT_MASK +399 0x0000 //TX_A_POST_FLT_WNS 400 0x0000 //TX_MIN_G_LOW300HZ 401 0x0010 //TX_MAXLEVEL_CNG 402 0x0000 //TX_STN_NOISE_TH @@ -521,16 +522,16 @@ 511 0x6666 //TX_MIC_TO_BFGAIN 512 0x6666 //TX_MICTOBFGAIN0 513 0x0014 //TX_FASTMUE_TH -514 0x0000 //TX_DERVB_LEN_0 -515 0x0000 //TX_DERVB_LEN_1 -516 0x0000 //TX_RHO_DERVB -517 0x0000 //TX_MIC_INDX_DERVB -518 0x0000 //TX_MU_DERVB -519 0x0000 //TX_DR_RESRV_0 -520 0x0000 //TX_DR_RESRV_1 -521 0x0000 //TX_DR_RESRV_2 -522 0x0000 //TX_DR_RESRV_3 -523 0x0000 //TX_DR_RESRV_4 +514 0x0000 //TX_DEREVERB_LF_MU +515 0x0000 //TX_DEREVERB_HF_MU +516 0x0000 //TX_DEREVERB_DELAY +517 0x0000 //TX_DEREVERB_COEF_LEN +518 0x0000 //TX_DEREVERB_DNR +519 0x0000 //TX_DEREVERB_ALPHA +520 0x0000 //TX_DEREVERB_BETA +521 0x0000 //TX_GSC_RTOL_TH +522 0x0000 //TX_GSC_RTOH_TH +523 0x0000 //TX_WIDE2_MEANHTH 524 0x0000 //TX_DR_RESRV_5 525 0x0000 //TX_DR_RESRV_6 526 0x0000 //TX_DR_RESRV_7 @@ -904,6 +905,71 @@ 894 0xC000 //TX_FASTNS_SSA_THHFL 895 0xCCCC //TX_FASTNS_SSA_THLFH 896 0xD999 //TX_FASTNS_SSA_THHFH +897 0x0000 //TX_SENDFUNC_REG_MICMUTE +898 0x0000 //TX_SENDFUNC_REG_MICMUTE1 +899 0x0000 //TX_MICMUTE_RATIO_THR +900 0x0000 //TX_MICMUTE_AMP_THR +901 0x0000 //TX_MICMUTE_HPF_IND +902 0x0000 //TX_MICMUTE_LOG_EYR_TH +903 0x0000 //TX_MICMUTE_CVG_TIME +904 0x0000 //TX_MICMUTE_RELEASE_TIME +905 0x0000 //TX_MIC_VOLUME_MIC0MUTE +906 0x0000 //TX_MICMUTE_EPD_OFFSET_0 +907 0x0000 //TX_MICMUTE_FRQ_AEC_L +908 0x0000 //TX_MICMUTE_EAD_THR +909 0x0000 //TX_MICMUTE_LAMBDA_CB_NLE +910 0x0000 //TX_MICMUTE_LAMBDA_RE_EST +911 0x0000 //TX_DTD_THR1_MICMUTE_0 +912 0x0000 //TX_DTD_THR1_MICMUTE_1 +913 0x0000 //TX_DTD_THR1_MICMUTE_2 +914 0x0000 //TX_DTD_THR1_MICMUTE_3 +915 0x0000 //TX_DTD_THR2_MICMUTE_0 +916 0x0000 //TX_MICMUTE_MIN_EQ_RE_EST_0 +917 0x0000 //TX_MICMUTE_MIN_EQ_RE_EST_1 +918 0x0000 //TX_MICMUTE_MIN_EQ_RE_EST_2 +919 0x0000 //TX_MICMUTE_MIN_EQ_RE_EST_3 +920 0x0000 //TX_MICMUTE_MIN_EQ_RE_EST_4 +921 0x0000 //TX_MICMUTE_C_POST_FLT +922 0x0000 //TX_MICMUTE_DT_CUT_K +923 0x0000 //TX_MICMUTE_DT_CUT_THR +924 0x0000 //TX_MICMUTE_DT_CUT_K2 +925 0x0000 //TX_MICMUTE_DT_CUT_THR2 +926 0x0000 //TX_MICMUTE_DT2_HOLD_N +927 0x0000 //TX_MICMUTE_RATIODTH_THCUT +928 0x0000 //TX_MICMUTE_B_POST_FLT_ECHOL +929 0x0000 //TX_MICMUTE_B_POST_FLT_ECHOH +930 0x0000 //TX_MICMUTE_C_POST_FLT_MASK +931 0x0000 //TX_MICMUTE_RATIODTL_CUT_TH +932 0x0000 //TX_MICMUTE_DT_CUT_K1 +933 0x0000 //TX_MICMUTE_N2_SN_EST +934 0x0000 //TX_MICMUTE_THR_SN_EST_0 +935 0x0000 //TX_MICMUTE_MIN_G_CTRL_0 +936 0x0000 //TX_MICMUTE_A_POST_FILT_S_0 +937 0x0000 //TX_MICMUTE_B_POST_FILT_0 +938 0x0000 //TX_MIC1RUB_AMP_THR +939 0x0000 //TX_MIC1MUTE_RATIO_THR +940 0x0000 //TX_MIC1MUTE_AMP_THR +941 0x0000 //TX_MIC1MUTE_CVG_TIME +942 0x0000 //TX_MIC1MUTE_RELEASE_TIME +943 0x0000 //TX_AMS_RESRV_01 +944 0x0000 //TX_AMS_RESRV_02 +945 0x0000 //TX_AMS_RESRV_03 +946 0x0000 //TX_AMS_RESRV_04 +947 0x0000 //TX_AMS_RESRV_05 +948 0x0000 //TX_AMS_RESRV_06 +949 0x0000 //TX_AMS_RESRV_07 +950 0x0000 //TX_AMS_RESRV_08 +951 0x0000 //TX_AMS_RESRV_09 +952 0x0000 //TX_AMS_RESRV_10 +953 0x0000 //TX_AMS_RESRV_11 +954 0x0000 //TX_AMS_RESRV_12 +955 0x0000 //TX_AMS_RESRV_13 +956 0x0000 //TX_AMS_RESRV_14 +957 0x0000 //TX_AMS_RESRV_15 +958 0x0000 //TX_AMS_RESRV_16 +959 0x0000 //TX_AMS_RESRV_17 +960 0x0000 //TX_AMS_RESRV_18 +961 0x0000 //TX_AMS_RESRV_19 #RX 0 0x0000 //RX_RECVFUNC_MODE_0 1 0x0000 //RX_RECVFUNC_MODE_1 @@ -1755,10 +1821,862 @@ 110 0x0000 //RX_FDDRC_RESRV_0 129 0x0100 //RX_SPK_VOL 130 0x0000 //RX_VOL_RESRV_0 +#RX 2 +157 0x0000 //RX_RECVFUNC_MODE_0 +158 0x0000 //RX_RECVFUNC_MODE_1 +159 0x0000 //RX_SAMPLINGFREQ_SIG +160 0x0000 //RX_SAMPLINGFREQ_PROC +161 0x000A //RX_FRAME_SZ +162 0x0000 //RX_DELAY_OPT +163 0x3000 //RX_TDDRC_ALPHA_UP_1 +164 0x3000 //RX_TDDRC_ALPHA_UP_2 +165 0x3000 //RX_TDDRC_ALPHA_UP_3 +166 0x3000 //RX_TDDRC_ALPHA_UP_4 +167 0x0800 //RX_PGA +168 0x7652 //RX_A_HP +169 0x4000 //RX_B_PE +170 0x7800 //RX_THR_PITCH_DET_0 +171 0x7000 //RX_THR_PITCH_DET_1 +172 0x6000 //RX_THR_PITCH_DET_2 +173 0x0000 //RX_PITCH_BFR_LEN +174 0x0000 //RX_SBD_PITCH_DET +175 0x0000 //RX_PP_RESRV_0 +176 0x0000 //RX_PP_RESRV_1 +177 0xF800 //RX_N_SN_EST +178 0x0000 //RX_N2_SN_EST +179 0x000F //RX_NS_LVL_CTRL +180 0xF800 //RX_THR_SN_EST +181 0x7E00 //RX_LAMBDA_PFILT +182 0x000A //RX_FENS_RESRV_0 +183 0x0000 //RX_FENS_RESRV_1 +184 0x7FB0 //RX_TDDRC_ALPHA_DWN_1 +185 0x7FB0 //RX_TDDRC_ALPHA_DWN_2 +186 0x7FB0 //RX_TDDRC_ALPHA_DWN_3 +187 0x0000 //RX_EXTRA_NS_L +188 0x0000 //RX_EXTRA_NS_A +189 0x7FB0 //RX_TDDRC_ALPHA_DWN_4 +190 0x65AD //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +192 0x0000 //RX_A_POST_FLT +193 0x0000 //RX_LMT_THRD +194 0x4000 //RX_LMT_ALPHA +195 0x0020 //RX_FDEQ_SUBNUM +196 0x4848 //RX_FDEQ_GAIN_0 +197 0x4848 //RX_FDEQ_GAIN_1 +198 0x4848 //RX_FDEQ_GAIN_2 +199 0x4848 //RX_FDEQ_GAIN_3 +200 0x4848 //RX_FDEQ_GAIN_4 +201 0x4848 //RX_FDEQ_GAIN_5 +202 0x4848 //RX_FDEQ_GAIN_6 +203 0x4848 //RX_FDEQ_GAIN_7 +204 0x4848 //RX_FDEQ_GAIN_8 +205 0x4848 //RX_FDEQ_GAIN_9 +206 0x4848 //RX_FDEQ_GAIN_10 +207 0x4848 //RX_FDEQ_GAIN_11 +208 0x4848 //RX_FDEQ_GAIN_12 +209 0x4848 //RX_FDEQ_GAIN_13 +210 0x4848 //RX_FDEQ_GAIN_14 +211 0x4848 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0000 //RX_FDEQ_BIN_0 +221 0x0000 //RX_FDEQ_BIN_1 +222 0x0000 //RX_FDEQ_BIN_2 +223 0x0000 //RX_FDEQ_BIN_3 +224 0x0000 //RX_FDEQ_BIN_4 +225 0x0000 //RX_FDEQ_BIN_5 +226 0x0000 //RX_FDEQ_BIN_6 +227 0x0000 //RX_FDEQ_BIN_7 +228 0x0000 //RX_FDEQ_BIN_8 +229 0x0000 //RX_FDEQ_BIN_9 +230 0x0000 //RX_FDEQ_BIN_10 +231 0x0000 //RX_FDEQ_BIN_11 +232 0x0000 //RX_FDEQ_BIN_12 +233 0x0000 //RX_FDEQ_BIN_13 +234 0x0000 //RX_FDEQ_BIN_14 +235 0x0000 //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x0000 //RX_FDEQ_RESRV_0 +245 0x0000 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0030 //RX_FDDRC_BAND_MARGIN_1 +248 0x0050 //RX_FDDRC_BAND_MARGIN_2 +249 0x0080 //RX_FDDRC_BAND_MARGIN_3 +250 0x0004 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x5000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x6400 //RX_FDDRC_THRD_3_2 +258 0x6400 //RX_FDDRC_THRD_3_3 +259 0x2000 //RX_FDDRC_SLANT_0_0 +260 0x2000 //RX_FDDRC_SLANT_0_1 +261 0x2000 //RX_FDDRC_SLANT_0_2 +262 0x2000 //RX_FDDRC_SLANT_0_3 +263 0x2000 //RX_FDDRC_SLANT_1_0 +264 0x2000 //RX_FDDRC_SLANT_1_1 +265 0x2000 //RX_FDDRC_SLANT_1_2 +266 0x2000 //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +268 0x0000 //RX_FILTINDX +269 0x0000 //RX_TDDRC_THRD_0 +270 0x0000 //RX_TDDRC_THRD_1 +271 0x0E80 //RX_TDDRC_THRD_2 +272 0x3800 //RX_TDDRC_THRD_3 +273 0x2A00 //RX_TDDRC_SLANT_0 +274 0x6E00 //RX_TDDRC_SLANT_1 +275 0x3000 //RX_TDDRC_ALPHA_UP_0 +276 0x7FB0 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x0000 //RX_TDDRC_HMNC_GAIN +279 0x0000 //RX_TDDRC_SMT_FLAG +280 0x0000 //RX_TDDRC_SMT_W +281 0x0100 //RX_TDDRC_DRC_GAIN +282 0x7C00 //RX_LAMBDA_PKA_FP +283 0x2000 //RX_TPKA_FP +284 0x0080 //RX_MIN_G_FP +285 0x2000 //RX_MAX_G_FP +286 0x000C //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 +288 0x0010 //RX_MAXLEVEL_CNG +289 0x0000 //RX_BWE_UV_TH +290 0x0000 //RX_BWE_UV_TH2 +291 0x0000 //RX_BWE_UV_TH3 +292 0x0000 //RX_BWE_V_TH +293 0x0000 //RX_BWE_GAIN1_V_TH1 +294 0x0000 //RX_BWE_GAIN1_V_TH2 +295 0x0000 //RX_BWE_UV_EQ +296 0x0000 //RX_BWE_V_EQ +297 0x0000 //RX_BWE_TONE_TH +298 0x0000 //RX_BWE_UV_HOLD_T +299 0x0000 //RX_BWE_GAIN2_ALPHA +300 0x0000 //RX_BWE_GAIN3_ALPHA +301 0x0000 //RX_BWE_CUTOFF +302 0x0000 //RX_BWE_GAINFILL +303 0x0000 //RX_BWE_MAXTH_TONE +304 0x0000 //RX_BWE_EQ_0 +305 0x0000 //RX_BWE_EQ_1 +306 0x0000 //RX_BWE_EQ_2 +307 0x0000 //RX_BWE_EQ_3 +308 0x0000 //RX_BWE_EQ_4 +309 0x0000 //RX_BWE_EQ_5 +310 0x0000 //RX_BWE_EQ_6 +311 0x0000 //RX_BWE_RESRV_0 +312 0x0000 //RX_BWE_RESRV_1 +313 0x0000 //RX_BWE_RESRV_2 +#VOL 0 +163 0x3000 //RX_TDDRC_ALPHA_UP_1 +164 0x3000 //RX_TDDRC_ALPHA_UP_2 +165 0x3000 //RX_TDDRC_ALPHA_UP_3 +166 0x3000 //RX_TDDRC_ALPHA_UP_4 +184 0x7FB0 //RX_TDDRC_ALPHA_DWN_1 +185 0x7FB0 //RX_TDDRC_ALPHA_DWN_2 +186 0x7FB0 //RX_TDDRC_ALPHA_DWN_3 +189 0x7FB0 //RX_TDDRC_ALPHA_DWN_4 +190 0x65AD //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +269 0x0000 //RX_TDDRC_THRD_0 +270 0x0000 //RX_TDDRC_THRD_1 +271 0x0E80 //RX_TDDRC_THRD_2 +272 0x3800 //RX_TDDRC_THRD_3 +273 0x2A00 //RX_TDDRC_SLANT_0 +274 0x6E00 //RX_TDDRC_SLANT_1 +275 0x3000 //RX_TDDRC_ALPHA_UP_0 +276 0x7FB0 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x0000 //RX_TDDRC_HMNC_GAIN +279 0x0000 //RX_TDDRC_SMT_FLAG +280 0x0000 //RX_TDDRC_SMT_W +281 0x0100 //RX_TDDRC_DRC_GAIN +195 0x0020 //RX_FDEQ_SUBNUM +196 0x4848 //RX_FDEQ_GAIN_0 +197 0x4848 //RX_FDEQ_GAIN_1 +198 0x4848 //RX_FDEQ_GAIN_2 +199 0x4848 //RX_FDEQ_GAIN_3 +200 0x4848 //RX_FDEQ_GAIN_4 +201 0x4848 //RX_FDEQ_GAIN_5 +202 0x4848 //RX_FDEQ_GAIN_6 +203 0x4848 //RX_FDEQ_GAIN_7 +204 0x4848 //RX_FDEQ_GAIN_8 +205 0x4848 //RX_FDEQ_GAIN_9 +206 0x4848 //RX_FDEQ_GAIN_10 +207 0x4848 //RX_FDEQ_GAIN_11 +208 0x4848 //RX_FDEQ_GAIN_12 +209 0x4848 //RX_FDEQ_GAIN_13 +210 0x4848 //RX_FDEQ_GAIN_14 +211 0x4848 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0000 //RX_FDEQ_BIN_0 +221 0x0000 //RX_FDEQ_BIN_1 +222 0x0000 //RX_FDEQ_BIN_2 +223 0x0000 //RX_FDEQ_BIN_3 +224 0x0000 //RX_FDEQ_BIN_4 +225 0x0000 //RX_FDEQ_BIN_5 +226 0x0000 //RX_FDEQ_BIN_6 +227 0x0000 //RX_FDEQ_BIN_7 +228 0x0000 //RX_FDEQ_BIN_8 +229 0x0000 //RX_FDEQ_BIN_9 +230 0x0000 //RX_FDEQ_BIN_10 +231 0x0000 //RX_FDEQ_BIN_11 +232 0x0000 //RX_FDEQ_BIN_12 +233 0x0000 //RX_FDEQ_BIN_13 +234 0x0000 //RX_FDEQ_BIN_14 +235 0x0000 //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x0000 //RX_FDEQ_RESRV_0 +245 0x0000 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0030 //RX_FDDRC_BAND_MARGIN_1 +248 0x0050 //RX_FDDRC_BAND_MARGIN_2 +249 0x0080 //RX_FDDRC_BAND_MARGIN_3 +250 0x0004 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x5000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x6400 //RX_FDDRC_THRD_3_2 +258 0x6400 //RX_FDDRC_THRD_3_3 +259 0x2000 //RX_FDDRC_SLANT_0_0 +260 0x2000 //RX_FDDRC_SLANT_0_1 +261 0x2000 //RX_FDDRC_SLANT_0_2 +262 0x2000 //RX_FDDRC_SLANT_0_3 +263 0x2000 //RX_FDDRC_SLANT_1_0 +264 0x2000 //RX_FDDRC_SLANT_1_1 +265 0x2000 //RX_FDDRC_SLANT_1_2 +266 0x2000 //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +286 0x000C //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 +#VOL 1 +163 0x3000 //RX_TDDRC_ALPHA_UP_1 +164 0x3000 //RX_TDDRC_ALPHA_UP_2 +165 0x3000 //RX_TDDRC_ALPHA_UP_3 +166 0x3000 //RX_TDDRC_ALPHA_UP_4 +184 0x7FB0 //RX_TDDRC_ALPHA_DWN_1 +185 0x7FB0 //RX_TDDRC_ALPHA_DWN_2 +186 0x7FB0 //RX_TDDRC_ALPHA_DWN_3 +189 0x7FB0 //RX_TDDRC_ALPHA_DWN_4 +190 0x65AD //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +269 0x0000 //RX_TDDRC_THRD_0 +270 0x0000 //RX_TDDRC_THRD_1 +271 0x0E80 //RX_TDDRC_THRD_2 +272 0x3800 //RX_TDDRC_THRD_3 +273 0x2A00 //RX_TDDRC_SLANT_0 +274 0x6E00 //RX_TDDRC_SLANT_1 +275 0x3000 //RX_TDDRC_ALPHA_UP_0 +276 0x7FB0 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x0000 //RX_TDDRC_HMNC_GAIN +279 0x0000 //RX_TDDRC_SMT_FLAG +280 0x0000 //RX_TDDRC_SMT_W +281 0x0100 //RX_TDDRC_DRC_GAIN +195 0x0020 //RX_FDEQ_SUBNUM +196 0x4848 //RX_FDEQ_GAIN_0 +197 0x4848 //RX_FDEQ_GAIN_1 +198 0x4848 //RX_FDEQ_GAIN_2 +199 0x4848 //RX_FDEQ_GAIN_3 +200 0x4848 //RX_FDEQ_GAIN_4 +201 0x4848 //RX_FDEQ_GAIN_5 +202 0x4848 //RX_FDEQ_GAIN_6 +203 0x4848 //RX_FDEQ_GAIN_7 +204 0x4848 //RX_FDEQ_GAIN_8 +205 0x4848 //RX_FDEQ_GAIN_9 +206 0x4848 //RX_FDEQ_GAIN_10 +207 0x4848 //RX_FDEQ_GAIN_11 +208 0x4848 //RX_FDEQ_GAIN_12 +209 0x4848 //RX_FDEQ_GAIN_13 +210 0x4848 //RX_FDEQ_GAIN_14 +211 0x4848 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0000 //RX_FDEQ_BIN_0 +221 0x0000 //RX_FDEQ_BIN_1 +222 0x0000 //RX_FDEQ_BIN_2 +223 0x0000 //RX_FDEQ_BIN_3 +224 0x0000 //RX_FDEQ_BIN_4 +225 0x0000 //RX_FDEQ_BIN_5 +226 0x0000 //RX_FDEQ_BIN_6 +227 0x0000 //RX_FDEQ_BIN_7 +228 0x0000 //RX_FDEQ_BIN_8 +229 0x0000 //RX_FDEQ_BIN_9 +230 0x0000 //RX_FDEQ_BIN_10 +231 0x0000 //RX_FDEQ_BIN_11 +232 0x0000 //RX_FDEQ_BIN_12 +233 0x0000 //RX_FDEQ_BIN_13 +234 0x0000 //RX_FDEQ_BIN_14 +235 0x0000 //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x0000 //RX_FDEQ_RESRV_0 +245 0x0000 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0030 //RX_FDDRC_BAND_MARGIN_1 +248 0x0050 //RX_FDDRC_BAND_MARGIN_2 +249 0x0080 //RX_FDDRC_BAND_MARGIN_3 +250 0x0004 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x5000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x6400 //RX_FDDRC_THRD_3_2 +258 0x6400 //RX_FDDRC_THRD_3_3 +259 0x2000 //RX_FDDRC_SLANT_0_0 +260 0x2000 //RX_FDDRC_SLANT_0_1 +261 0x2000 //RX_FDDRC_SLANT_0_2 +262 0x2000 //RX_FDDRC_SLANT_0_3 +263 0x2000 //RX_FDDRC_SLANT_1_0 +264 0x2000 //RX_FDDRC_SLANT_1_1 +265 0x2000 //RX_FDDRC_SLANT_1_2 +266 0x2000 //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +286 0x0014 //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 +#VOL 2 +163 0x3000 //RX_TDDRC_ALPHA_UP_1 +164 0x3000 //RX_TDDRC_ALPHA_UP_2 +165 0x3000 //RX_TDDRC_ALPHA_UP_3 +166 0x3000 //RX_TDDRC_ALPHA_UP_4 +184 0x7FB0 //RX_TDDRC_ALPHA_DWN_1 +185 0x7FB0 //RX_TDDRC_ALPHA_DWN_2 +186 0x7FB0 //RX_TDDRC_ALPHA_DWN_3 +189 0x7FB0 //RX_TDDRC_ALPHA_DWN_4 +190 0x65AD //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +269 0x0000 //RX_TDDRC_THRD_0 +270 0x0000 //RX_TDDRC_THRD_1 +271 0x0E80 //RX_TDDRC_THRD_2 +272 0x3800 //RX_TDDRC_THRD_3 +273 0x2A00 //RX_TDDRC_SLANT_0 +274 0x6E00 //RX_TDDRC_SLANT_1 +275 0x3000 //RX_TDDRC_ALPHA_UP_0 +276 0x7FB0 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x0000 //RX_TDDRC_HMNC_GAIN +279 0x0000 //RX_TDDRC_SMT_FLAG +280 0x0000 //RX_TDDRC_SMT_W +281 0x0100 //RX_TDDRC_DRC_GAIN +195 0x0020 //RX_FDEQ_SUBNUM +196 0x4848 //RX_FDEQ_GAIN_0 +197 0x4848 //RX_FDEQ_GAIN_1 +198 0x4848 //RX_FDEQ_GAIN_2 +199 0x4848 //RX_FDEQ_GAIN_3 +200 0x4848 //RX_FDEQ_GAIN_4 +201 0x4848 //RX_FDEQ_GAIN_5 +202 0x4848 //RX_FDEQ_GAIN_6 +203 0x4848 //RX_FDEQ_GAIN_7 +204 0x4848 //RX_FDEQ_GAIN_8 +205 0x4848 //RX_FDEQ_GAIN_9 +206 0x4848 //RX_FDEQ_GAIN_10 +207 0x4848 //RX_FDEQ_GAIN_11 +208 0x4848 //RX_FDEQ_GAIN_12 +209 0x4848 //RX_FDEQ_GAIN_13 +210 0x4848 //RX_FDEQ_GAIN_14 +211 0x4848 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0000 //RX_FDEQ_BIN_0 +221 0x0000 //RX_FDEQ_BIN_1 +222 0x0000 //RX_FDEQ_BIN_2 +223 0x0000 //RX_FDEQ_BIN_3 +224 0x0000 //RX_FDEQ_BIN_4 +225 0x0000 //RX_FDEQ_BIN_5 +226 0x0000 //RX_FDEQ_BIN_6 +227 0x0000 //RX_FDEQ_BIN_7 +228 0x0000 //RX_FDEQ_BIN_8 +229 0x0000 //RX_FDEQ_BIN_9 +230 0x0000 //RX_FDEQ_BIN_10 +231 0x0000 //RX_FDEQ_BIN_11 +232 0x0000 //RX_FDEQ_BIN_12 +233 0x0000 //RX_FDEQ_BIN_13 +234 0x0000 //RX_FDEQ_BIN_14 +235 0x0000 //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x0000 //RX_FDEQ_RESRV_0 +245 0x0000 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0030 //RX_FDDRC_BAND_MARGIN_1 +248 0x0050 //RX_FDDRC_BAND_MARGIN_2 +249 0x0080 //RX_FDDRC_BAND_MARGIN_3 +250 0x0004 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x5000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x6400 //RX_FDDRC_THRD_3_2 +258 0x6400 //RX_FDDRC_THRD_3_3 +259 0x2000 //RX_FDDRC_SLANT_0_0 +260 0x2000 //RX_FDDRC_SLANT_0_1 +261 0x2000 //RX_FDDRC_SLANT_0_2 +262 0x2000 //RX_FDDRC_SLANT_0_3 +263 0x2000 //RX_FDDRC_SLANT_1_0 +264 0x2000 //RX_FDDRC_SLANT_1_1 +265 0x2000 //RX_FDDRC_SLANT_1_2 +266 0x2000 //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +286 0x0021 //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 +#VOL 3 +163 0x3000 //RX_TDDRC_ALPHA_UP_1 +164 0x3000 //RX_TDDRC_ALPHA_UP_2 +165 0x3000 //RX_TDDRC_ALPHA_UP_3 +166 0x3000 //RX_TDDRC_ALPHA_UP_4 +184 0x7FB0 //RX_TDDRC_ALPHA_DWN_1 +185 0x7FB0 //RX_TDDRC_ALPHA_DWN_2 +186 0x7FB0 //RX_TDDRC_ALPHA_DWN_3 +189 0x7FB0 //RX_TDDRC_ALPHA_DWN_4 +190 0x65AD //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +269 0x0000 //RX_TDDRC_THRD_0 +270 0x0000 //RX_TDDRC_THRD_1 +271 0x0E80 //RX_TDDRC_THRD_2 +272 0x3800 //RX_TDDRC_THRD_3 +273 0x2A00 //RX_TDDRC_SLANT_0 +274 0x6E00 //RX_TDDRC_SLANT_1 +275 0x3000 //RX_TDDRC_ALPHA_UP_0 +276 0x7FB0 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x0000 //RX_TDDRC_HMNC_GAIN +279 0x0000 //RX_TDDRC_SMT_FLAG +280 0x0000 //RX_TDDRC_SMT_W +281 0x0100 //RX_TDDRC_DRC_GAIN +195 0x0020 //RX_FDEQ_SUBNUM +196 0x4848 //RX_FDEQ_GAIN_0 +197 0x4848 //RX_FDEQ_GAIN_1 +198 0x4848 //RX_FDEQ_GAIN_2 +199 0x4848 //RX_FDEQ_GAIN_3 +200 0x4848 //RX_FDEQ_GAIN_4 +201 0x4848 //RX_FDEQ_GAIN_5 +202 0x4848 //RX_FDEQ_GAIN_6 +203 0x4848 //RX_FDEQ_GAIN_7 +204 0x4848 //RX_FDEQ_GAIN_8 +205 0x4848 //RX_FDEQ_GAIN_9 +206 0x4848 //RX_FDEQ_GAIN_10 +207 0x4848 //RX_FDEQ_GAIN_11 +208 0x4848 //RX_FDEQ_GAIN_12 +209 0x4848 //RX_FDEQ_GAIN_13 +210 0x4848 //RX_FDEQ_GAIN_14 +211 0x4848 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0000 //RX_FDEQ_BIN_0 +221 0x0000 //RX_FDEQ_BIN_1 +222 0x0000 //RX_FDEQ_BIN_2 +223 0x0000 //RX_FDEQ_BIN_3 +224 0x0000 //RX_FDEQ_BIN_4 +225 0x0000 //RX_FDEQ_BIN_5 +226 0x0000 //RX_FDEQ_BIN_6 +227 0x0000 //RX_FDEQ_BIN_7 +228 0x0000 //RX_FDEQ_BIN_8 +229 0x0000 //RX_FDEQ_BIN_9 +230 0x0000 //RX_FDEQ_BIN_10 +231 0x0000 //RX_FDEQ_BIN_11 +232 0x0000 //RX_FDEQ_BIN_12 +233 0x0000 //RX_FDEQ_BIN_13 +234 0x0000 //RX_FDEQ_BIN_14 +235 0x0000 //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x0000 //RX_FDEQ_RESRV_0 +245 0x0000 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0030 //RX_FDDRC_BAND_MARGIN_1 +248 0x0050 //RX_FDDRC_BAND_MARGIN_2 +249 0x0080 //RX_FDDRC_BAND_MARGIN_3 +250 0x0004 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x5000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x6400 //RX_FDDRC_THRD_3_2 +258 0x6400 //RX_FDDRC_THRD_3_3 +259 0x2000 //RX_FDDRC_SLANT_0_0 +260 0x2000 //RX_FDDRC_SLANT_0_1 +261 0x2000 //RX_FDDRC_SLANT_0_2 +262 0x2000 //RX_FDDRC_SLANT_0_3 +263 0x2000 //RX_FDDRC_SLANT_1_0 +264 0x2000 //RX_FDDRC_SLANT_1_1 +265 0x2000 //RX_FDDRC_SLANT_1_2 +266 0x2000 //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +286 0x0037 //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 +#VOL 4 +163 0x3000 //RX_TDDRC_ALPHA_UP_1 +164 0x3000 //RX_TDDRC_ALPHA_UP_2 +165 0x3000 //RX_TDDRC_ALPHA_UP_3 +166 0x3000 //RX_TDDRC_ALPHA_UP_4 +184 0x7FB0 //RX_TDDRC_ALPHA_DWN_1 +185 0x7FB0 //RX_TDDRC_ALPHA_DWN_2 +186 0x7FB0 //RX_TDDRC_ALPHA_DWN_3 +189 0x7FB0 //RX_TDDRC_ALPHA_DWN_4 +190 0x65AD //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +269 0x0000 //RX_TDDRC_THRD_0 +270 0x0000 //RX_TDDRC_THRD_1 +271 0x0E80 //RX_TDDRC_THRD_2 +272 0x3800 //RX_TDDRC_THRD_3 +273 0x2A00 //RX_TDDRC_SLANT_0 +274 0x6E00 //RX_TDDRC_SLANT_1 +275 0x3000 //RX_TDDRC_ALPHA_UP_0 +276 0x7FB0 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x0000 //RX_TDDRC_HMNC_GAIN +279 0x0000 //RX_TDDRC_SMT_FLAG +280 0x0000 //RX_TDDRC_SMT_W +281 0x0100 //RX_TDDRC_DRC_GAIN +195 0x0020 //RX_FDEQ_SUBNUM +196 0x4848 //RX_FDEQ_GAIN_0 +197 0x4848 //RX_FDEQ_GAIN_1 +198 0x4848 //RX_FDEQ_GAIN_2 +199 0x4848 //RX_FDEQ_GAIN_3 +200 0x4848 //RX_FDEQ_GAIN_4 +201 0x4848 //RX_FDEQ_GAIN_5 +202 0x4848 //RX_FDEQ_GAIN_6 +203 0x4848 //RX_FDEQ_GAIN_7 +204 0x4848 //RX_FDEQ_GAIN_8 +205 0x4848 //RX_FDEQ_GAIN_9 +206 0x4848 //RX_FDEQ_GAIN_10 +207 0x4848 //RX_FDEQ_GAIN_11 +208 0x4848 //RX_FDEQ_GAIN_12 +209 0x4848 //RX_FDEQ_GAIN_13 +210 0x4848 //RX_FDEQ_GAIN_14 +211 0x4848 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0000 //RX_FDEQ_BIN_0 +221 0x0000 //RX_FDEQ_BIN_1 +222 0x0000 //RX_FDEQ_BIN_2 +223 0x0000 //RX_FDEQ_BIN_3 +224 0x0000 //RX_FDEQ_BIN_4 +225 0x0000 //RX_FDEQ_BIN_5 +226 0x0000 //RX_FDEQ_BIN_6 +227 0x0000 //RX_FDEQ_BIN_7 +228 0x0000 //RX_FDEQ_BIN_8 +229 0x0000 //RX_FDEQ_BIN_9 +230 0x0000 //RX_FDEQ_BIN_10 +231 0x0000 //RX_FDEQ_BIN_11 +232 0x0000 //RX_FDEQ_BIN_12 +233 0x0000 //RX_FDEQ_BIN_13 +234 0x0000 //RX_FDEQ_BIN_14 +235 0x0000 //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x0000 //RX_FDEQ_RESRV_0 +245 0x0000 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0030 //RX_FDDRC_BAND_MARGIN_1 +248 0x0050 //RX_FDDRC_BAND_MARGIN_2 +249 0x0080 //RX_FDDRC_BAND_MARGIN_3 +250 0x0004 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x5000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x6400 //RX_FDDRC_THRD_3_2 +258 0x6400 //RX_FDDRC_THRD_3_3 +259 0x2000 //RX_FDDRC_SLANT_0_0 +260 0x2000 //RX_FDDRC_SLANT_0_1 +261 0x2000 //RX_FDDRC_SLANT_0_2 +262 0x2000 //RX_FDDRC_SLANT_0_3 +263 0x2000 //RX_FDDRC_SLANT_1_0 +264 0x2000 //RX_FDDRC_SLANT_1_1 +265 0x2000 //RX_FDDRC_SLANT_1_2 +266 0x2000 //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +286 0x005B //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 +#VOL 5 +163 0x3000 //RX_TDDRC_ALPHA_UP_1 +164 0x3000 //RX_TDDRC_ALPHA_UP_2 +165 0x3000 //RX_TDDRC_ALPHA_UP_3 +166 0x3000 //RX_TDDRC_ALPHA_UP_4 +184 0x7FB0 //RX_TDDRC_ALPHA_DWN_1 +185 0x7FB0 //RX_TDDRC_ALPHA_DWN_2 +186 0x7FB0 //RX_TDDRC_ALPHA_DWN_3 +189 0x7FB0 //RX_TDDRC_ALPHA_DWN_4 +190 0x65AD //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +269 0x0000 //RX_TDDRC_THRD_0 +270 0x0000 //RX_TDDRC_THRD_1 +271 0x0E80 //RX_TDDRC_THRD_2 +272 0x3800 //RX_TDDRC_THRD_3 +273 0x2A00 //RX_TDDRC_SLANT_0 +274 0x6E00 //RX_TDDRC_SLANT_1 +275 0x3000 //RX_TDDRC_ALPHA_UP_0 +276 0x7FB0 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x0000 //RX_TDDRC_HMNC_GAIN +279 0x0000 //RX_TDDRC_SMT_FLAG +280 0x0000 //RX_TDDRC_SMT_W +281 0x0100 //RX_TDDRC_DRC_GAIN +195 0x0020 //RX_FDEQ_SUBNUM +196 0x4848 //RX_FDEQ_GAIN_0 +197 0x4848 //RX_FDEQ_GAIN_1 +198 0x4848 //RX_FDEQ_GAIN_2 +199 0x4848 //RX_FDEQ_GAIN_3 +200 0x4848 //RX_FDEQ_GAIN_4 +201 0x4848 //RX_FDEQ_GAIN_5 +202 0x4848 //RX_FDEQ_GAIN_6 +203 0x4848 //RX_FDEQ_GAIN_7 +204 0x4848 //RX_FDEQ_GAIN_8 +205 0x4848 //RX_FDEQ_GAIN_9 +206 0x4848 //RX_FDEQ_GAIN_10 +207 0x4848 //RX_FDEQ_GAIN_11 +208 0x4848 //RX_FDEQ_GAIN_12 +209 0x4848 //RX_FDEQ_GAIN_13 +210 0x4848 //RX_FDEQ_GAIN_14 +211 0x4848 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0000 //RX_FDEQ_BIN_0 +221 0x0000 //RX_FDEQ_BIN_1 +222 0x0000 //RX_FDEQ_BIN_2 +223 0x0000 //RX_FDEQ_BIN_3 +224 0x0000 //RX_FDEQ_BIN_4 +225 0x0000 //RX_FDEQ_BIN_5 +226 0x0000 //RX_FDEQ_BIN_6 +227 0x0000 //RX_FDEQ_BIN_7 +228 0x0000 //RX_FDEQ_BIN_8 +229 0x0000 //RX_FDEQ_BIN_9 +230 0x0000 //RX_FDEQ_BIN_10 +231 0x0000 //RX_FDEQ_BIN_11 +232 0x0000 //RX_FDEQ_BIN_12 +233 0x0000 //RX_FDEQ_BIN_13 +234 0x0000 //RX_FDEQ_BIN_14 +235 0x0000 //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x0000 //RX_FDEQ_RESRV_0 +245 0x0000 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0030 //RX_FDDRC_BAND_MARGIN_1 +248 0x0050 //RX_FDDRC_BAND_MARGIN_2 +249 0x0080 //RX_FDDRC_BAND_MARGIN_3 +250 0x0004 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x5000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x6400 //RX_FDDRC_THRD_3_2 +258 0x6400 //RX_FDDRC_THRD_3_3 +259 0x2000 //RX_FDDRC_SLANT_0_0 +260 0x2000 //RX_FDDRC_SLANT_0_1 +261 0x2000 //RX_FDDRC_SLANT_0_2 +262 0x2000 //RX_FDDRC_SLANT_0_3 +263 0x2000 //RX_FDDRC_SLANT_1_0 +264 0x2000 //RX_FDDRC_SLANT_1_1 +265 0x2000 //RX_FDDRC_SLANT_1_2 +266 0x2000 //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +286 0x0099 //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 +#VOL 6 +163 0x3000 //RX_TDDRC_ALPHA_UP_1 +164 0x3000 //RX_TDDRC_ALPHA_UP_2 +165 0x3000 //RX_TDDRC_ALPHA_UP_3 +166 0x3000 //RX_TDDRC_ALPHA_UP_4 +184 0x7FB0 //RX_TDDRC_ALPHA_DWN_1 +185 0x7FB0 //RX_TDDRC_ALPHA_DWN_2 +186 0x7FB0 //RX_TDDRC_ALPHA_DWN_3 +189 0x7FB0 //RX_TDDRC_ALPHA_DWN_4 +190 0x65AD //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +269 0x0000 //RX_TDDRC_THRD_0 +270 0x0000 //RX_TDDRC_THRD_1 +271 0x0E80 //RX_TDDRC_THRD_2 +272 0x3800 //RX_TDDRC_THRD_3 +273 0x2A00 //RX_TDDRC_SLANT_0 +274 0x6E00 //RX_TDDRC_SLANT_1 +275 0x3000 //RX_TDDRC_ALPHA_UP_0 +276 0x7FB0 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x0000 //RX_TDDRC_HMNC_GAIN +279 0x0000 //RX_TDDRC_SMT_FLAG +280 0x0000 //RX_TDDRC_SMT_W +281 0x0100 //RX_TDDRC_DRC_GAIN +195 0x0020 //RX_FDEQ_SUBNUM +196 0x4848 //RX_FDEQ_GAIN_0 +197 0x4848 //RX_FDEQ_GAIN_1 +198 0x4848 //RX_FDEQ_GAIN_2 +199 0x4848 //RX_FDEQ_GAIN_3 +200 0x4848 //RX_FDEQ_GAIN_4 +201 0x4848 //RX_FDEQ_GAIN_5 +202 0x4848 //RX_FDEQ_GAIN_6 +203 0x4848 //RX_FDEQ_GAIN_7 +204 0x4848 //RX_FDEQ_GAIN_8 +205 0x4848 //RX_FDEQ_GAIN_9 +206 0x4848 //RX_FDEQ_GAIN_10 +207 0x4848 //RX_FDEQ_GAIN_11 +208 0x4848 //RX_FDEQ_GAIN_12 +209 0x4848 //RX_FDEQ_GAIN_13 +210 0x4848 //RX_FDEQ_GAIN_14 +211 0x4848 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0000 //RX_FDEQ_BIN_0 +221 0x0000 //RX_FDEQ_BIN_1 +222 0x0000 //RX_FDEQ_BIN_2 +223 0x0000 //RX_FDEQ_BIN_3 +224 0x0000 //RX_FDEQ_BIN_4 +225 0x0000 //RX_FDEQ_BIN_5 +226 0x0000 //RX_FDEQ_BIN_6 +227 0x0000 //RX_FDEQ_BIN_7 +228 0x0000 //RX_FDEQ_BIN_8 +229 0x0000 //RX_FDEQ_BIN_9 +230 0x0000 //RX_FDEQ_BIN_10 +231 0x0000 //RX_FDEQ_BIN_11 +232 0x0000 //RX_FDEQ_BIN_12 +233 0x0000 //RX_FDEQ_BIN_13 +234 0x0000 //RX_FDEQ_BIN_14 +235 0x0000 //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x0000 //RX_FDEQ_RESRV_0 +245 0x0000 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0030 //RX_FDDRC_BAND_MARGIN_1 +248 0x0050 //RX_FDDRC_BAND_MARGIN_2 +249 0x0080 //RX_FDDRC_BAND_MARGIN_3 +250 0x0004 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x5000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x6400 //RX_FDDRC_THRD_3_2 +258 0x6400 //RX_FDDRC_THRD_3_3 +259 0x2000 //RX_FDDRC_SLANT_0_0 +260 0x2000 //RX_FDDRC_SLANT_0_1 +261 0x2000 //RX_FDDRC_SLANT_0_2 +262 0x2000 //RX_FDDRC_SLANT_0_3 +263 0x2000 //RX_FDDRC_SLANT_1_0 +264 0x2000 //RX_FDDRC_SLANT_1_1 +265 0x2000 //RX_FDDRC_SLANT_1_2 +266 0x2000 //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +286 0x0100 //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 #CASE_NAME BLUETOOTH-BT_HAC-VOICE_GENERIC-NB -#PARAM_TYPE TX+RX -#TOTAL_CUSTOM_STEP 7 +#PARAM_MODE FULL +#PARAM_TYPE TX+2RX +#TOTAL_CUSTOM_STEP 7+7 #TX 0 0x0001 //TX_OPERATION_MODE_0 1 0x0001 //TX_OPERATION_MODE_1 @@ -2011,12 +2929,12 @@ 248 0xF800 //TX_THR_SN_EST_6 249 0xF800 //TX_THR_SN_EST_7 250 0x0050 //TX_DELTA_THR_SN_EST_0 -251 0x01A0 //TX_DELTA_THR_SN_EST_1 +251 0x0200 //TX_DELTA_THR_SN_EST_1 252 0x0200 //TX_DELTA_THR_SN_EST_2 -253 0x0200 //TX_DELTA_THR_SN_EST_3 -254 0x0100 //TX_DELTA_THR_SN_EST_4 +253 0x0100 //TX_DELTA_THR_SN_EST_3 +254 0x0200 //TX_DELTA_THR_SN_EST_4 255 0x0200 //TX_DELTA_THR_SN_EST_5 -256 0x0200 //TX_DELTA_THR_SN_EST_6 +256 0x01A0 //TX_DELTA_THR_SN_EST_6 257 0x0200 //TX_DELTA_THR_SN_EST_7 258 0x4000 //TX_LAMBDA_NN_EST_0 259 0x4000 //TX_LAMBDA_NN_EST_1 @@ -2042,29 +2960,29 @@ 279 0x1000 //TX_B_POST_FLT_0 280 0x1000 //TX_B_POST_FLT_1 281 0x0010 //TX_NS_LVL_CTRL_0 -282 0x0012 //TX_NS_LVL_CTRL_1 -283 0x0017 //TX_NS_LVL_CTRL_2 -284 0x0015 //TX_NS_LVL_CTRL_3 +282 0x0017 //TX_NS_LVL_CTRL_1 +283 0x0015 //TX_NS_LVL_CTRL_2 +284 0x0012 //TX_NS_LVL_CTRL_3 285 0x0012 //TX_NS_LVL_CTRL_4 -286 0x0012 //TX_NS_LVL_CTRL_5 -287 0x0011 //TX_NS_LVL_CTRL_6 +286 0x0011 //TX_NS_LVL_CTRL_5 +287 0x0012 //TX_NS_LVL_CTRL_6 288 0x0011 //TX_NS_LVL_CTRL_7 289 0x000F //TX_MIN_GAIN_S_0 -290 0x000F //TX_MIN_GAIN_S_1 -291 0x000D //TX_MIN_GAIN_S_2 +290 0x000D //TX_MIN_GAIN_S_1 +291 0x000F //TX_MIN_GAIN_S_2 292 0x000F //TX_MIN_GAIN_S_3 293 0x000F //TX_MIN_GAIN_S_4 -294 0x000F //TX_MIN_GAIN_S_5 -295 0x0010 //TX_MIN_GAIN_S_6 +294 0x0010 //TX_MIN_GAIN_S_5 +295 0x000F //TX_MIN_GAIN_S_6 296 0x000F //TX_MIN_GAIN_S_7 297 0x4000 //TX_NMOS_SUP 298 0x0000 //TX_NS_MAX_PRI_SNR_TH 299 0x0000 //TX_NMOS_SUP_MENSA 300 0x7FFF //TX_SNRI_SUP_0 -301 0x4000 //TX_SNRI_SUP_1 -302 0x1000 //TX_SNRI_SUP_2 -303 0x4000 //TX_SNRI_SUP_3 -304 0x2400 //TX_SNRI_SUP_4 +301 0x1000 //TX_SNRI_SUP_1 +302 0x4000 //TX_SNRI_SUP_2 +303 0x2400 //TX_SNRI_SUP_3 +304 0x4000 //TX_SNRI_SUP_4 305 0x4000 //TX_SNRI_SUP_5 306 0x4000 //TX_SNRI_SUP_6 307 0x7FFF //TX_SNRI_SUP_7 @@ -2075,19 +2993,19 @@ 312 0x7FFF //TX_A_POST_FILT_0 313 0x2000 //TX_A_POST_FILT_1 314 0x4000 //TX_A_POST_FILT_S_0 -315 0x5000 //TX_A_POST_FILT_S_1 -316 0x2000 //TX_A_POST_FILT_S_2 -317 0x4000 //TX_A_POST_FILT_S_3 -318 0x1000 //TX_A_POST_FILT_S_4 -319 0x3000 //TX_A_POST_FILT_S_5 +315 0x2000 //TX_A_POST_FILT_S_1 +316 0x4000 //TX_A_POST_FILT_S_2 +317 0x1000 //TX_A_POST_FILT_S_3 +318 0x3000 //TX_A_POST_FILT_S_4 +319 0x5000 //TX_A_POST_FILT_S_5 320 0x5000 //TX_A_POST_FILT_S_6 321 0x7000 //TX_A_POST_FILT_S_7 322 0x1000 //TX_B_POST_FILT_0 323 0x1000 //TX_B_POST_FILT_1 324 0x1000 //TX_B_POST_FILT_2 -325 0x1000 //TX_B_POST_FILT_3 -326 0x5000 //TX_B_POST_FILT_4 -327 0x3000 //TX_B_POST_FILT_5 +325 0x5000 //TX_B_POST_FILT_3 +326 0x3000 //TX_B_POST_FILT_4 +327 0x1000 //TX_B_POST_FILT_5 328 0x1000 //TX_B_POST_FILT_6 329 0x2000 //TX_B_POST_FILT_7 330 0x4000 //TX_B_LESSCUT_RTO_S_0 @@ -2100,12 +3018,12 @@ 337 0x7FFF //TX_B_LESSCUT_RTO_S_7 338 0x7E00 //TX_LAMBDA_PFILT 339 0x7D00 //TX_LAMBDA_PFILT_S_0 -340 0x7900 //TX_LAMBDA_PFILT_S_1 -341 0x7400 //TX_LAMBDA_PFILT_S_2 -342 0x7900 //TX_LAMBDA_PFILT_S_3 -343 0x7000 //TX_LAMBDA_PFILT_S_4 +340 0x7400 //TX_LAMBDA_PFILT_S_1 +341 0x7900 //TX_LAMBDA_PFILT_S_2 +342 0x7000 //TX_LAMBDA_PFILT_S_3 +343 0x7D00 //TX_LAMBDA_PFILT_S_4 344 0x7D00 //TX_LAMBDA_PFILT_S_5 -345 0x7D00 //TX_LAMBDA_PFILT_S_6 +345 0x7900 //TX_LAMBDA_PFILT_S_6 346 0x7D00 //TX_LAMBDA_PFILT_S_7 347 0x0200 //TX_K_PEPPER 348 0x0800 //TX_A_PEPPER @@ -2140,10 +3058,10 @@ 377 0x7FFF //TX_NOISE_TH_5_4 378 0x0FA0 //TX_NOISE_TH_6 379 0x000A //TX_MINENOISE_TH -380 0x4000 //TX_MINENOISE_MIC0_TH_MTS -381 0xFFEE //TX_MINENOISE_MIC0_TH_EXP -382 0x6000 //TX_MINENOISE_MIC0_S_TH_MTS -383 0xFFF3 //TX_MINENOISE_MIC0_S_TH_EXP +380 0x4000 //TX_MORENS_TFMASK_TH +381 0xFFEE //TX_DRC_QUIET_FLOOR +382 0x6000 //TX_RATIODTL_CUT_TH +383 0xFFF3 //TX_DT_CUT_K1 384 0x0666 //TX_OUT_ENER_S_TH_CLEAN 385 0x0666 //TX_OUT_ENER_S_TH_LESSCLEAN 386 0x0333 //TX_OUT_ENER_S_TH_NOISY @@ -2151,15 +3069,15 @@ 388 0x1000 //TX_OUT_ENER_TH_SPEECH 389 0x2000 //TX_SN_NPB_GAIN 390 0x0000 //TX_NN_NPB_GAIN -391 0x0000 //TX_CSX_ALPHA_0 -392 0x0000 //TX_CSX_ALPHA_1 -393 0x0000 //TX_CSX_ALPHA_2 -394 0x0000 //TX_CSX_ALPHA_3 -395 0x0800 //TX_MU_ARSP_EST -396 0x00C8 //TX_P_OUTBEAM_MIN_TH +391 0x0000 //TX_POST_MASK_SUP_HSNE +392 0x0000 //TX_TAIL_DET_TH +393 0x0000 //TX_B_LESSCUT_RTO_WTA +394 0x0000 //TX_MEL_G_R +395 0x0800 //TX_SUPHIGH_TH +396 0x00C8 //TX_MASK_G_R 397 0x0002 //TX_EXTRA_NS_L -398 0x0800 //TX_EXTRA_NS_A -399 0x0005 //TX_VR_NOISE_FLOOR_TH +398 0x0800 //TX_C_POST_FLT_MASK +399 0x0005 //TX_A_POST_FLT_WNS 400 0x0148 //TX_MIN_G_LOW300HZ 401 0x0001 //TX_MAXLEVEL_CNG 402 0x00B4 //TX_STN_NOISE_TH @@ -2274,16 +3192,16 @@ 511 0x6666 //TX_MIC_TO_BFGAIN 512 0x0000 //TX_MICTOBFGAIN0 513 0x0000 //TX_FASTMUE_TH -514 0x0000 //TX_DERVB_LEN_0 -515 0x0000 //TX_DERVB_LEN_1 -516 0x0000 //TX_RHO_DERVB -517 0x0000 //TX_MIC_INDX_DERVB -518 0x0000 //TX_MU_DERVB -519 0x0000 //TX_DR_RESRV_0 -520 0x0000 //TX_DR_RESRV_1 -521 0x0000 //TX_DR_RESRV_2 -522 0x0000 //TX_DR_RESRV_3 -523 0x0000 //TX_DR_RESRV_4 +514 0x0000 //TX_DEREVERB_LF_MU +515 0x0000 //TX_DEREVERB_HF_MU +516 0x0000 //TX_DEREVERB_DELAY +517 0x0000 //TX_DEREVERB_COEF_LEN +518 0x0000 //TX_DEREVERB_DNR +519 0x0000 //TX_DEREVERB_ALPHA +520 0x0000 //TX_DEREVERB_BETA +521 0x0000 //TX_GSC_RTOL_TH +522 0x0000 //TX_GSC_RTOH_TH +523 0x0000 //TX_WIDE2_MEANHTH 524 0x0000 //TX_DR_RESRV_5 525 0x0000 //TX_DR_RESRV_6 526 0x0000 //TX_DR_RESRV_7 @@ -2657,8 +3575,73 @@ 894 0xC000 //TX_FASTNS_SSA_THHFL 895 0xCCCC //TX_FASTNS_SSA_THLFH 896 0xD999 //TX_FASTNS_SSA_THHFH +897 0x0000 //TX_SENDFUNC_REG_MICMUTE +898 0x0000 //TX_SENDFUNC_REG_MICMUTE1 +899 0x0000 //TX_MICMUTE_RATIO_THR +900 0x0000 //TX_MICMUTE_AMP_THR +901 0x0000 //TX_MICMUTE_HPF_IND +902 0x0000 //TX_MICMUTE_LOG_EYR_TH +903 0x0000 //TX_MICMUTE_CVG_TIME +904 0x0000 //TX_MICMUTE_RELEASE_TIME +905 0x0000 //TX_MIC_VOLUME_MIC0MUTE +906 0x0000 //TX_MICMUTE_EPD_OFFSET_0 +907 0x0000 //TX_MICMUTE_FRQ_AEC_L +908 0x0000 //TX_MICMUTE_EAD_THR +909 0x0000 //TX_MICMUTE_LAMBDA_CB_NLE +910 0x0000 //TX_MICMUTE_LAMBDA_RE_EST +911 0x0000 //TX_DTD_THR1_MICMUTE_0 +912 0x0000 //TX_DTD_THR1_MICMUTE_1 +913 0x0000 //TX_DTD_THR1_MICMUTE_2 +914 0x0000 //TX_DTD_THR1_MICMUTE_3 +915 0x0000 //TX_DTD_THR2_MICMUTE_0 +916 0x0000 //TX_MICMUTE_MIN_EQ_RE_EST_0 +917 0x0000 //TX_MICMUTE_MIN_EQ_RE_EST_1 +918 0x0000 //TX_MICMUTE_MIN_EQ_RE_EST_2 +919 0x0000 //TX_MICMUTE_MIN_EQ_RE_EST_3 +920 0x0000 //TX_MICMUTE_MIN_EQ_RE_EST_4 +921 0x0000 //TX_MICMUTE_C_POST_FLT +922 0x0000 //TX_MICMUTE_DT_CUT_K +923 0x0000 //TX_MICMUTE_DT_CUT_THR +924 0x0000 //TX_MICMUTE_DT_CUT_K2 +925 0x0000 //TX_MICMUTE_DT_CUT_THR2 +926 0x0000 //TX_MICMUTE_DT2_HOLD_N +927 0x0000 //TX_MICMUTE_RATIODTH_THCUT +928 0x0000 //TX_MICMUTE_B_POST_FLT_ECHOL +929 0x0000 //TX_MICMUTE_B_POST_FLT_ECHOH +930 0x0000 //TX_MICMUTE_C_POST_FLT_MASK +931 0x0000 //TX_MICMUTE_RATIODTL_CUT_TH +932 0x0000 //TX_MICMUTE_DT_CUT_K1 +933 0x0000 //TX_MICMUTE_N2_SN_EST +934 0x0000 //TX_MICMUTE_THR_SN_EST_0 +935 0x0000 //TX_MICMUTE_MIN_G_CTRL_0 +936 0x0000 //TX_MICMUTE_A_POST_FILT_S_0 +937 0x0000 //TX_MICMUTE_B_POST_FILT_0 +938 0x0000 //TX_MIC1RUB_AMP_THR +939 0x0000 //TX_MIC1MUTE_RATIO_THR +940 0x0000 //TX_MIC1MUTE_AMP_THR +941 0x0000 //TX_MIC1MUTE_CVG_TIME +942 0x0000 //TX_MIC1MUTE_RELEASE_TIME +943 0x0000 //TX_AMS_RESRV_01 +944 0x0000 //TX_AMS_RESRV_02 +945 0x0000 //TX_AMS_RESRV_03 +946 0x0000 //TX_AMS_RESRV_04 +947 0x0000 //TX_AMS_RESRV_05 +948 0x0000 //TX_AMS_RESRV_06 +949 0x0000 //TX_AMS_RESRV_07 +950 0x0000 //TX_AMS_RESRV_08 +951 0x0000 //TX_AMS_RESRV_09 +952 0x0000 //TX_AMS_RESRV_10 +953 0x0000 //TX_AMS_RESRV_11 +954 0x0000 //TX_AMS_RESRV_12 +955 0x0000 //TX_AMS_RESRV_13 +956 0x0000 //TX_AMS_RESRV_14 +957 0x0000 //TX_AMS_RESRV_15 +958 0x0000 //TX_AMS_RESRV_16 +959 0x0000 //TX_AMS_RESRV_17 +960 0x0000 //TX_AMS_RESRV_18 +961 0x0000 //TX_AMS_RESRV_19 #RX -0 0x006C //RX_RECVFUNC_MODE_0 +0 0x206C //RX_RECVFUNC_MODE_0 1 0x0000 //RX_RECVFUNC_MODE_1 2 0x0000 //RX_SAMPLINGFREQ_SIG 3 0x0000 //RX_SAMPLINGFREQ_PROC @@ -3508,10 +4491,862 @@ 110 0x0000 //RX_FDDRC_RESRV_0 129 0x0100 //RX_SPK_VOL 130 0x0000 //RX_VOL_RESRV_0 +#RX 2 +157 0x206C //RX_RECVFUNC_MODE_0 +158 0x0000 //RX_RECVFUNC_MODE_1 +159 0x0000 //RX_SAMPLINGFREQ_SIG +160 0x0000 //RX_SAMPLINGFREQ_PROC +161 0x000A //RX_FRAME_SZ +162 0x0000 //RX_DELAY_OPT +163 0x3000 //RX_TDDRC_ALPHA_UP_1 +164 0x3000 //RX_TDDRC_ALPHA_UP_2 +165 0x3000 //RX_TDDRC_ALPHA_UP_3 +166 0x3000 //RX_TDDRC_ALPHA_UP_4 +167 0x0800 //RX_PGA +168 0x7FFF //RX_A_HP +169 0x0000 //RX_B_PE +170 0x3800 //RX_THR_PITCH_DET_0 +171 0x3000 //RX_THR_PITCH_DET_1 +172 0x2800 //RX_THR_PITCH_DET_2 +173 0x0008 //RX_PITCH_BFR_LEN +174 0x0003 //RX_SBD_PITCH_DET +175 0x0100 //RX_PP_RESRV_0 +176 0x0020 //RX_PP_RESRV_1 +177 0x0600 //RX_N_SN_EST +178 0x000C //RX_N2_SN_EST +179 0x0010 //RX_NS_LVL_CTRL +180 0xF800 //RX_THR_SN_EST +181 0x7CCD //RX_LAMBDA_PFILT +182 0x000A //RX_FENS_RESRV_0 +183 0x0190 //RX_FENS_RESRV_1 +184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +187 0x0002 //RX_EXTRA_NS_L +188 0x0800 //RX_EXTRA_NS_A +189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +190 0x7FFF //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +192 0x199A //RX_A_POST_FLT +193 0x0000 //RX_LMT_THRD +194 0x4000 //RX_LMT_ALPHA +195 0x0014 //RX_FDEQ_SUBNUM +196 0x4848 //RX_FDEQ_GAIN_0 +197 0x4848 //RX_FDEQ_GAIN_1 +198 0x4848 //RX_FDEQ_GAIN_2 +199 0x4848 //RX_FDEQ_GAIN_3 +200 0x4848 //RX_FDEQ_GAIN_4 +201 0x4848 //RX_FDEQ_GAIN_5 +202 0x4444 //RX_FDEQ_GAIN_6 +203 0x4040 //RX_FDEQ_GAIN_7 +204 0x4040 //RX_FDEQ_GAIN_8 +205 0x4040 //RX_FDEQ_GAIN_9 +206 0x4848 //RX_FDEQ_GAIN_10 +207 0x4848 //RX_FDEQ_GAIN_11 +208 0x4848 //RX_FDEQ_GAIN_12 +209 0x4848 //RX_FDEQ_GAIN_13 +210 0x4848 //RX_FDEQ_GAIN_14 +211 0x4848 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0202 //RX_FDEQ_BIN_0 +221 0x0203 //RX_FDEQ_BIN_1 +222 0x0303 //RX_FDEQ_BIN_2 +223 0x0304 //RX_FDEQ_BIN_3 +224 0x0405 //RX_FDEQ_BIN_4 +225 0x0506 //RX_FDEQ_BIN_5 +226 0x0708 //RX_FDEQ_BIN_6 +227 0x090A //RX_FDEQ_BIN_7 +228 0x0B0C //RX_FDEQ_BIN_8 +229 0x0D0E //RX_FDEQ_BIN_9 +230 0x0000 //RX_FDEQ_BIN_10 +231 0x0000 //RX_FDEQ_BIN_11 +232 0x0000 //RX_FDEQ_BIN_12 +233 0x0000 //RX_FDEQ_BIN_13 +234 0x0000 //RX_FDEQ_BIN_14 +235 0x0000 //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x4000 //RX_FDEQ_RESRV_0 +245 0x0320 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0030 //RX_FDDRC_BAND_MARGIN_1 +248 0x0050 //RX_FDDRC_BAND_MARGIN_2 +249 0x0080 //RX_FDDRC_BAND_MARGIN_3 +250 0x0007 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x5000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x6400 //RX_FDDRC_THRD_3_2 +258 0x6400 //RX_FDDRC_THRD_3_3 +259 0x2000 //RX_FDDRC_SLANT_0_0 +260 0x2000 //RX_FDDRC_SLANT_0_1 +261 0x2000 //RX_FDDRC_SLANT_0_2 +262 0x2000 //RX_FDDRC_SLANT_0_3 +263 0x5333 //RX_FDDRC_SLANT_1_0 +264 0x5333 //RX_FDDRC_SLANT_1_1 +265 0x5333 //RX_FDDRC_SLANT_1_2 +266 0x5333 //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +268 0x0000 //RX_FILTINDX +269 0x0000 //RX_TDDRC_THRD_0 +270 0x0000 //RX_TDDRC_THRD_1 +271 0x7FFF //RX_TDDRC_THRD_2 +272 0x7FFF //RX_TDDRC_THRD_3 +273 0x7FFF //RX_TDDRC_SLANT_0 +274 0x7EB8 //RX_TDDRC_SLANT_1 +275 0x3000 //RX_TDDRC_ALPHA_UP_0 +276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x199A //RX_TDDRC_HMNC_GAIN +279 0x0001 //RX_TDDRC_SMT_FLAG +280 0x0CCD //RX_TDDRC_SMT_W +281 0x017F //RX_TDDRC_DRC_GAIN +282 0x7C00 //RX_LAMBDA_PKA_FP +283 0x2000 //RX_TPKA_FP +284 0x2000 //RX_MIN_G_FP +285 0x0080 //RX_MAX_G_FP +286 0x0100 //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 +288 0x0000 //RX_MAXLEVEL_CNG +289 0x3000 //RX_BWE_UV_TH +290 0x3000 //RX_BWE_UV_TH2 +291 0x1800 //RX_BWE_UV_TH3 +292 0x1000 //RX_BWE_V_TH +293 0x04CD //RX_BWE_GAIN1_V_TH1 +294 0x0F33 //RX_BWE_GAIN1_V_TH2 +295 0x7333 //RX_BWE_UV_EQ +296 0x199A //RX_BWE_V_EQ +297 0x7333 //RX_BWE_TONE_TH +298 0x0004 //RX_BWE_UV_HOLD_T +299 0x6CCD //RX_BWE_GAIN2_ALPHA +300 0x799A //RX_BWE_GAIN3_ALPHA +301 0x001E //RX_BWE_CUTOFF +302 0x3000 //RX_BWE_GAINFILL +303 0x3200 //RX_BWE_MAXTH_TONE +304 0x2000 //RX_BWE_EQ_0 +305 0x2000 //RX_BWE_EQ_1 +306 0x2000 //RX_BWE_EQ_2 +307 0x2000 //RX_BWE_EQ_3 +308 0x2000 //RX_BWE_EQ_4 +309 0x2000 //RX_BWE_EQ_5 +310 0x2000 //RX_BWE_EQ_6 +311 0x0000 //RX_BWE_RESRV_0 +312 0x0000 //RX_BWE_RESRV_1 +313 0x0000 //RX_BWE_RESRV_2 +#VOL 0 +163 0x3000 //RX_TDDRC_ALPHA_UP_1 +164 0x3000 //RX_TDDRC_ALPHA_UP_2 +165 0x3000 //RX_TDDRC_ALPHA_UP_3 +166 0x3000 //RX_TDDRC_ALPHA_UP_4 +184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +190 0x7FFF //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +269 0x0000 //RX_TDDRC_THRD_0 +270 0x0000 //RX_TDDRC_THRD_1 +271 0x7FFF //RX_TDDRC_THRD_2 +272 0x7FFF //RX_TDDRC_THRD_3 +273 0x7FFF //RX_TDDRC_SLANT_0 +274 0x7EB8 //RX_TDDRC_SLANT_1 +275 0x3000 //RX_TDDRC_ALPHA_UP_0 +276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x199A //RX_TDDRC_HMNC_GAIN +279 0x0001 //RX_TDDRC_SMT_FLAG +280 0x0CCD //RX_TDDRC_SMT_W +281 0x017F //RX_TDDRC_DRC_GAIN +195 0x0014 //RX_FDEQ_SUBNUM +196 0x4848 //RX_FDEQ_GAIN_0 +197 0x4848 //RX_FDEQ_GAIN_1 +198 0x4848 //RX_FDEQ_GAIN_2 +199 0x4848 //RX_FDEQ_GAIN_3 +200 0x4848 //RX_FDEQ_GAIN_4 +201 0x4848 //RX_FDEQ_GAIN_5 +202 0x4444 //RX_FDEQ_GAIN_6 +203 0x4040 //RX_FDEQ_GAIN_7 +204 0x4040 //RX_FDEQ_GAIN_8 +205 0x4040 //RX_FDEQ_GAIN_9 +206 0x4848 //RX_FDEQ_GAIN_10 +207 0x4848 //RX_FDEQ_GAIN_11 +208 0x4848 //RX_FDEQ_GAIN_12 +209 0x4848 //RX_FDEQ_GAIN_13 +210 0x4848 //RX_FDEQ_GAIN_14 +211 0x4848 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0202 //RX_FDEQ_BIN_0 +221 0x0203 //RX_FDEQ_BIN_1 +222 0x0303 //RX_FDEQ_BIN_2 +223 0x0304 //RX_FDEQ_BIN_3 +224 0x0405 //RX_FDEQ_BIN_4 +225 0x0506 //RX_FDEQ_BIN_5 +226 0x0708 //RX_FDEQ_BIN_6 +227 0x090A //RX_FDEQ_BIN_7 +228 0x0B0C //RX_FDEQ_BIN_8 +229 0x0D0E //RX_FDEQ_BIN_9 +230 0x0000 //RX_FDEQ_BIN_10 +231 0x0000 //RX_FDEQ_BIN_11 +232 0x0000 //RX_FDEQ_BIN_12 +233 0x0000 //RX_FDEQ_BIN_13 +234 0x0000 //RX_FDEQ_BIN_14 +235 0x0000 //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x4000 //RX_FDEQ_RESRV_0 +245 0x0320 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0030 //RX_FDDRC_BAND_MARGIN_1 +248 0x0050 //RX_FDDRC_BAND_MARGIN_2 +249 0x0080 //RX_FDDRC_BAND_MARGIN_3 +250 0x0007 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x5000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x6400 //RX_FDDRC_THRD_3_2 +258 0x6400 //RX_FDDRC_THRD_3_3 +259 0x2000 //RX_FDDRC_SLANT_0_0 +260 0x2000 //RX_FDDRC_SLANT_0_1 +261 0x2000 //RX_FDDRC_SLANT_0_2 +262 0x2000 //RX_FDDRC_SLANT_0_3 +263 0x5333 //RX_FDDRC_SLANT_1_0 +264 0x5333 //RX_FDDRC_SLANT_1_1 +265 0x5333 //RX_FDDRC_SLANT_1_2 +266 0x5333 //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +286 0x0100 //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 +#VOL 1 +163 0x3000 //RX_TDDRC_ALPHA_UP_1 +164 0x3000 //RX_TDDRC_ALPHA_UP_2 +165 0x3000 //RX_TDDRC_ALPHA_UP_3 +166 0x3000 //RX_TDDRC_ALPHA_UP_4 +184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +190 0x7FFF //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +269 0x0000 //RX_TDDRC_THRD_0 +270 0x0000 //RX_TDDRC_THRD_1 +271 0x7FFF //RX_TDDRC_THRD_2 +272 0x7FFF //RX_TDDRC_THRD_3 +273 0x7FFF //RX_TDDRC_SLANT_0 +274 0x7EB8 //RX_TDDRC_SLANT_1 +275 0x3000 //RX_TDDRC_ALPHA_UP_0 +276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x199A //RX_TDDRC_HMNC_GAIN +279 0x0001 //RX_TDDRC_SMT_FLAG +280 0x0CCD //RX_TDDRC_SMT_W +281 0x017F //RX_TDDRC_DRC_GAIN +195 0x0014 //RX_FDEQ_SUBNUM +196 0x4848 //RX_FDEQ_GAIN_0 +197 0x4848 //RX_FDEQ_GAIN_1 +198 0x4848 //RX_FDEQ_GAIN_2 +199 0x4848 //RX_FDEQ_GAIN_3 +200 0x4848 //RX_FDEQ_GAIN_4 +201 0x4848 //RX_FDEQ_GAIN_5 +202 0x4444 //RX_FDEQ_GAIN_6 +203 0x4040 //RX_FDEQ_GAIN_7 +204 0x4040 //RX_FDEQ_GAIN_8 +205 0x4040 //RX_FDEQ_GAIN_9 +206 0x4848 //RX_FDEQ_GAIN_10 +207 0x4848 //RX_FDEQ_GAIN_11 +208 0x4848 //RX_FDEQ_GAIN_12 +209 0x4848 //RX_FDEQ_GAIN_13 +210 0x4848 //RX_FDEQ_GAIN_14 +211 0x4848 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0202 //RX_FDEQ_BIN_0 +221 0x0203 //RX_FDEQ_BIN_1 +222 0x0303 //RX_FDEQ_BIN_2 +223 0x0304 //RX_FDEQ_BIN_3 +224 0x0405 //RX_FDEQ_BIN_4 +225 0x0506 //RX_FDEQ_BIN_5 +226 0x0708 //RX_FDEQ_BIN_6 +227 0x090A //RX_FDEQ_BIN_7 +228 0x0B0C //RX_FDEQ_BIN_8 +229 0x0D0E //RX_FDEQ_BIN_9 +230 0x0000 //RX_FDEQ_BIN_10 +231 0x0000 //RX_FDEQ_BIN_11 +232 0x0000 //RX_FDEQ_BIN_12 +233 0x0000 //RX_FDEQ_BIN_13 +234 0x0000 //RX_FDEQ_BIN_14 +235 0x0000 //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x4000 //RX_FDEQ_RESRV_0 +245 0x0320 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0030 //RX_FDDRC_BAND_MARGIN_1 +248 0x0050 //RX_FDDRC_BAND_MARGIN_2 +249 0x0080 //RX_FDDRC_BAND_MARGIN_3 +250 0x0007 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x5000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x6400 //RX_FDDRC_THRD_3_2 +258 0x6400 //RX_FDDRC_THRD_3_3 +259 0x2000 //RX_FDDRC_SLANT_0_0 +260 0x2000 //RX_FDDRC_SLANT_0_1 +261 0x2000 //RX_FDDRC_SLANT_0_2 +262 0x2000 //RX_FDDRC_SLANT_0_3 +263 0x5333 //RX_FDDRC_SLANT_1_0 +264 0x5333 //RX_FDDRC_SLANT_1_1 +265 0x5333 //RX_FDDRC_SLANT_1_2 +266 0x5333 //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +286 0x0100 //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 +#VOL 2 +163 0x3000 //RX_TDDRC_ALPHA_UP_1 +164 0x3000 //RX_TDDRC_ALPHA_UP_2 +165 0x3000 //RX_TDDRC_ALPHA_UP_3 +166 0x3000 //RX_TDDRC_ALPHA_UP_4 +184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +190 0x7FFF //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +269 0x0000 //RX_TDDRC_THRD_0 +270 0x0000 //RX_TDDRC_THRD_1 +271 0x7FFF //RX_TDDRC_THRD_2 +272 0x7FFF //RX_TDDRC_THRD_3 +273 0x7FFF //RX_TDDRC_SLANT_0 +274 0x7EB8 //RX_TDDRC_SLANT_1 +275 0x3000 //RX_TDDRC_ALPHA_UP_0 +276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x199A //RX_TDDRC_HMNC_GAIN +279 0x0001 //RX_TDDRC_SMT_FLAG +280 0x0CCD //RX_TDDRC_SMT_W +281 0x017F //RX_TDDRC_DRC_GAIN +195 0x0014 //RX_FDEQ_SUBNUM +196 0x4848 //RX_FDEQ_GAIN_0 +197 0x4848 //RX_FDEQ_GAIN_1 +198 0x4848 //RX_FDEQ_GAIN_2 +199 0x4848 //RX_FDEQ_GAIN_3 +200 0x4848 //RX_FDEQ_GAIN_4 +201 0x4848 //RX_FDEQ_GAIN_5 +202 0x4444 //RX_FDEQ_GAIN_6 +203 0x4040 //RX_FDEQ_GAIN_7 +204 0x4040 //RX_FDEQ_GAIN_8 +205 0x4040 //RX_FDEQ_GAIN_9 +206 0x4848 //RX_FDEQ_GAIN_10 +207 0x4848 //RX_FDEQ_GAIN_11 +208 0x4848 //RX_FDEQ_GAIN_12 +209 0x4848 //RX_FDEQ_GAIN_13 +210 0x4848 //RX_FDEQ_GAIN_14 +211 0x4848 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0202 //RX_FDEQ_BIN_0 +221 0x0203 //RX_FDEQ_BIN_1 +222 0x0303 //RX_FDEQ_BIN_2 +223 0x0304 //RX_FDEQ_BIN_3 +224 0x0405 //RX_FDEQ_BIN_4 +225 0x0506 //RX_FDEQ_BIN_5 +226 0x0708 //RX_FDEQ_BIN_6 +227 0x090A //RX_FDEQ_BIN_7 +228 0x0B0C //RX_FDEQ_BIN_8 +229 0x0D0E //RX_FDEQ_BIN_9 +230 0x0000 //RX_FDEQ_BIN_10 +231 0x0000 //RX_FDEQ_BIN_11 +232 0x0000 //RX_FDEQ_BIN_12 +233 0x0000 //RX_FDEQ_BIN_13 +234 0x0000 //RX_FDEQ_BIN_14 +235 0x0000 //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x4000 //RX_FDEQ_RESRV_0 +245 0x0320 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0030 //RX_FDDRC_BAND_MARGIN_1 +248 0x0050 //RX_FDDRC_BAND_MARGIN_2 +249 0x0080 //RX_FDDRC_BAND_MARGIN_3 +250 0x0007 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x5000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x6400 //RX_FDDRC_THRD_3_2 +258 0x6400 //RX_FDDRC_THRD_3_3 +259 0x2000 //RX_FDDRC_SLANT_0_0 +260 0x2000 //RX_FDDRC_SLANT_0_1 +261 0x2000 //RX_FDDRC_SLANT_0_2 +262 0x2000 //RX_FDDRC_SLANT_0_3 +263 0x5333 //RX_FDDRC_SLANT_1_0 +264 0x5333 //RX_FDDRC_SLANT_1_1 +265 0x5333 //RX_FDDRC_SLANT_1_2 +266 0x5333 //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +286 0x0100 //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 +#VOL 3 +163 0x3000 //RX_TDDRC_ALPHA_UP_1 +164 0x3000 //RX_TDDRC_ALPHA_UP_2 +165 0x3000 //RX_TDDRC_ALPHA_UP_3 +166 0x3000 //RX_TDDRC_ALPHA_UP_4 +184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +190 0x7FFF //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +269 0x0000 //RX_TDDRC_THRD_0 +270 0x0000 //RX_TDDRC_THRD_1 +271 0x7FFF //RX_TDDRC_THRD_2 +272 0x7FFF //RX_TDDRC_THRD_3 +273 0x7FFF //RX_TDDRC_SLANT_0 +274 0x7EB8 //RX_TDDRC_SLANT_1 +275 0x3000 //RX_TDDRC_ALPHA_UP_0 +276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x199A //RX_TDDRC_HMNC_GAIN +279 0x0001 //RX_TDDRC_SMT_FLAG +280 0x0CCD //RX_TDDRC_SMT_W +281 0x017F //RX_TDDRC_DRC_GAIN +195 0x0014 //RX_FDEQ_SUBNUM +196 0x4848 //RX_FDEQ_GAIN_0 +197 0x4848 //RX_FDEQ_GAIN_1 +198 0x4848 //RX_FDEQ_GAIN_2 +199 0x4848 //RX_FDEQ_GAIN_3 +200 0x4848 //RX_FDEQ_GAIN_4 +201 0x4848 //RX_FDEQ_GAIN_5 +202 0x4444 //RX_FDEQ_GAIN_6 +203 0x4040 //RX_FDEQ_GAIN_7 +204 0x4040 //RX_FDEQ_GAIN_8 +205 0x4040 //RX_FDEQ_GAIN_9 +206 0x4848 //RX_FDEQ_GAIN_10 +207 0x4848 //RX_FDEQ_GAIN_11 +208 0x4848 //RX_FDEQ_GAIN_12 +209 0x4848 //RX_FDEQ_GAIN_13 +210 0x4848 //RX_FDEQ_GAIN_14 +211 0x4848 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0202 //RX_FDEQ_BIN_0 +221 0x0203 //RX_FDEQ_BIN_1 +222 0x0303 //RX_FDEQ_BIN_2 +223 0x0304 //RX_FDEQ_BIN_3 +224 0x0405 //RX_FDEQ_BIN_4 +225 0x0506 //RX_FDEQ_BIN_5 +226 0x0708 //RX_FDEQ_BIN_6 +227 0x090A //RX_FDEQ_BIN_7 +228 0x0B0C //RX_FDEQ_BIN_8 +229 0x0D0E //RX_FDEQ_BIN_9 +230 0x0000 //RX_FDEQ_BIN_10 +231 0x0000 //RX_FDEQ_BIN_11 +232 0x0000 //RX_FDEQ_BIN_12 +233 0x0000 //RX_FDEQ_BIN_13 +234 0x0000 //RX_FDEQ_BIN_14 +235 0x0000 //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x4000 //RX_FDEQ_RESRV_0 +245 0x0320 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0030 //RX_FDDRC_BAND_MARGIN_1 +248 0x0050 //RX_FDDRC_BAND_MARGIN_2 +249 0x0080 //RX_FDDRC_BAND_MARGIN_3 +250 0x0007 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x5000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x6400 //RX_FDDRC_THRD_3_2 +258 0x6400 //RX_FDDRC_THRD_3_3 +259 0x2000 //RX_FDDRC_SLANT_0_0 +260 0x2000 //RX_FDDRC_SLANT_0_1 +261 0x2000 //RX_FDDRC_SLANT_0_2 +262 0x2000 //RX_FDDRC_SLANT_0_3 +263 0x5333 //RX_FDDRC_SLANT_1_0 +264 0x5333 //RX_FDDRC_SLANT_1_1 +265 0x5333 //RX_FDDRC_SLANT_1_2 +266 0x5333 //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +286 0x0100 //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 +#VOL 4 +163 0x3000 //RX_TDDRC_ALPHA_UP_1 +164 0x3000 //RX_TDDRC_ALPHA_UP_2 +165 0x3000 //RX_TDDRC_ALPHA_UP_3 +166 0x3000 //RX_TDDRC_ALPHA_UP_4 +184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +190 0x7FFF //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +269 0x0000 //RX_TDDRC_THRD_0 +270 0x0000 //RX_TDDRC_THRD_1 +271 0x7FFF //RX_TDDRC_THRD_2 +272 0x7FFF //RX_TDDRC_THRD_3 +273 0x7FFF //RX_TDDRC_SLANT_0 +274 0x7EB8 //RX_TDDRC_SLANT_1 +275 0x3000 //RX_TDDRC_ALPHA_UP_0 +276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x199A //RX_TDDRC_HMNC_GAIN +279 0x0001 //RX_TDDRC_SMT_FLAG +280 0x0CCD //RX_TDDRC_SMT_W +281 0x017F //RX_TDDRC_DRC_GAIN +195 0x0014 //RX_FDEQ_SUBNUM +196 0x4848 //RX_FDEQ_GAIN_0 +197 0x4848 //RX_FDEQ_GAIN_1 +198 0x4848 //RX_FDEQ_GAIN_2 +199 0x4848 //RX_FDEQ_GAIN_3 +200 0x4848 //RX_FDEQ_GAIN_4 +201 0x4848 //RX_FDEQ_GAIN_5 +202 0x4444 //RX_FDEQ_GAIN_6 +203 0x4040 //RX_FDEQ_GAIN_7 +204 0x4040 //RX_FDEQ_GAIN_8 +205 0x4040 //RX_FDEQ_GAIN_9 +206 0x4848 //RX_FDEQ_GAIN_10 +207 0x4848 //RX_FDEQ_GAIN_11 +208 0x4848 //RX_FDEQ_GAIN_12 +209 0x4848 //RX_FDEQ_GAIN_13 +210 0x4848 //RX_FDEQ_GAIN_14 +211 0x4848 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0202 //RX_FDEQ_BIN_0 +221 0x0203 //RX_FDEQ_BIN_1 +222 0x0303 //RX_FDEQ_BIN_2 +223 0x0304 //RX_FDEQ_BIN_3 +224 0x0405 //RX_FDEQ_BIN_4 +225 0x0506 //RX_FDEQ_BIN_5 +226 0x0708 //RX_FDEQ_BIN_6 +227 0x090A //RX_FDEQ_BIN_7 +228 0x0B0C //RX_FDEQ_BIN_8 +229 0x0D0E //RX_FDEQ_BIN_9 +230 0x0000 //RX_FDEQ_BIN_10 +231 0x0000 //RX_FDEQ_BIN_11 +232 0x0000 //RX_FDEQ_BIN_12 +233 0x0000 //RX_FDEQ_BIN_13 +234 0x0000 //RX_FDEQ_BIN_14 +235 0x0000 //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x4000 //RX_FDEQ_RESRV_0 +245 0x0320 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0030 //RX_FDDRC_BAND_MARGIN_1 +248 0x0050 //RX_FDDRC_BAND_MARGIN_2 +249 0x0080 //RX_FDDRC_BAND_MARGIN_3 +250 0x0007 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x5000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x6400 //RX_FDDRC_THRD_3_2 +258 0x6400 //RX_FDDRC_THRD_3_3 +259 0x2000 //RX_FDDRC_SLANT_0_0 +260 0x2000 //RX_FDDRC_SLANT_0_1 +261 0x2000 //RX_FDDRC_SLANT_0_2 +262 0x2000 //RX_FDDRC_SLANT_0_3 +263 0x5333 //RX_FDDRC_SLANT_1_0 +264 0x5333 //RX_FDDRC_SLANT_1_1 +265 0x5333 //RX_FDDRC_SLANT_1_2 +266 0x5333 //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +286 0x0100 //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 +#VOL 5 +163 0x3000 //RX_TDDRC_ALPHA_UP_1 +164 0x3000 //RX_TDDRC_ALPHA_UP_2 +165 0x3000 //RX_TDDRC_ALPHA_UP_3 +166 0x3000 //RX_TDDRC_ALPHA_UP_4 +184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +190 0x7FFF //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +269 0x0000 //RX_TDDRC_THRD_0 +270 0x0000 //RX_TDDRC_THRD_1 +271 0x7FFF //RX_TDDRC_THRD_2 +272 0x7FFF //RX_TDDRC_THRD_3 +273 0x7FFF //RX_TDDRC_SLANT_0 +274 0x7EB8 //RX_TDDRC_SLANT_1 +275 0x3000 //RX_TDDRC_ALPHA_UP_0 +276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x199A //RX_TDDRC_HMNC_GAIN +279 0x0001 //RX_TDDRC_SMT_FLAG +280 0x0CCD //RX_TDDRC_SMT_W +281 0x017F //RX_TDDRC_DRC_GAIN +195 0x0014 //RX_FDEQ_SUBNUM +196 0x4848 //RX_FDEQ_GAIN_0 +197 0x4848 //RX_FDEQ_GAIN_1 +198 0x4848 //RX_FDEQ_GAIN_2 +199 0x4848 //RX_FDEQ_GAIN_3 +200 0x4848 //RX_FDEQ_GAIN_4 +201 0x4848 //RX_FDEQ_GAIN_5 +202 0x4444 //RX_FDEQ_GAIN_6 +203 0x4040 //RX_FDEQ_GAIN_7 +204 0x4040 //RX_FDEQ_GAIN_8 +205 0x4040 //RX_FDEQ_GAIN_9 +206 0x4848 //RX_FDEQ_GAIN_10 +207 0x4848 //RX_FDEQ_GAIN_11 +208 0x4848 //RX_FDEQ_GAIN_12 +209 0x4848 //RX_FDEQ_GAIN_13 +210 0x4848 //RX_FDEQ_GAIN_14 +211 0x4848 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0202 //RX_FDEQ_BIN_0 +221 0x0203 //RX_FDEQ_BIN_1 +222 0x0303 //RX_FDEQ_BIN_2 +223 0x0304 //RX_FDEQ_BIN_3 +224 0x0405 //RX_FDEQ_BIN_4 +225 0x0506 //RX_FDEQ_BIN_5 +226 0x0708 //RX_FDEQ_BIN_6 +227 0x090A //RX_FDEQ_BIN_7 +228 0x0B0C //RX_FDEQ_BIN_8 +229 0x0D0E //RX_FDEQ_BIN_9 +230 0x0000 //RX_FDEQ_BIN_10 +231 0x0000 //RX_FDEQ_BIN_11 +232 0x0000 //RX_FDEQ_BIN_12 +233 0x0000 //RX_FDEQ_BIN_13 +234 0x0000 //RX_FDEQ_BIN_14 +235 0x0000 //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x4000 //RX_FDEQ_RESRV_0 +245 0x0320 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0030 //RX_FDDRC_BAND_MARGIN_1 +248 0x0050 //RX_FDDRC_BAND_MARGIN_2 +249 0x0080 //RX_FDDRC_BAND_MARGIN_3 +250 0x0007 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x5000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x6400 //RX_FDDRC_THRD_3_2 +258 0x6400 //RX_FDDRC_THRD_3_3 +259 0x2000 //RX_FDDRC_SLANT_0_0 +260 0x2000 //RX_FDDRC_SLANT_0_1 +261 0x2000 //RX_FDDRC_SLANT_0_2 +262 0x2000 //RX_FDDRC_SLANT_0_3 +263 0x5333 //RX_FDDRC_SLANT_1_0 +264 0x5333 //RX_FDDRC_SLANT_1_1 +265 0x5333 //RX_FDDRC_SLANT_1_2 +266 0x5333 //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +286 0x0100 //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 +#VOL 6 +163 0x3000 //RX_TDDRC_ALPHA_UP_1 +164 0x3000 //RX_TDDRC_ALPHA_UP_2 +165 0x3000 //RX_TDDRC_ALPHA_UP_3 +166 0x3000 //RX_TDDRC_ALPHA_UP_4 +184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +190 0x7FFF //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +269 0x0000 //RX_TDDRC_THRD_0 +270 0x0000 //RX_TDDRC_THRD_1 +271 0x7FFF //RX_TDDRC_THRD_2 +272 0x7FFF //RX_TDDRC_THRD_3 +273 0x7FFF //RX_TDDRC_SLANT_0 +274 0x7EB8 //RX_TDDRC_SLANT_1 +275 0x3000 //RX_TDDRC_ALPHA_UP_0 +276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x199A //RX_TDDRC_HMNC_GAIN +279 0x0001 //RX_TDDRC_SMT_FLAG +280 0x0CCD //RX_TDDRC_SMT_W +281 0x017F //RX_TDDRC_DRC_GAIN +195 0x0014 //RX_FDEQ_SUBNUM +196 0x4848 //RX_FDEQ_GAIN_0 +197 0x4848 //RX_FDEQ_GAIN_1 +198 0x4848 //RX_FDEQ_GAIN_2 +199 0x4848 //RX_FDEQ_GAIN_3 +200 0x4848 //RX_FDEQ_GAIN_4 +201 0x4848 //RX_FDEQ_GAIN_5 +202 0x4444 //RX_FDEQ_GAIN_6 +203 0x4040 //RX_FDEQ_GAIN_7 +204 0x4040 //RX_FDEQ_GAIN_8 +205 0x4040 //RX_FDEQ_GAIN_9 +206 0x4848 //RX_FDEQ_GAIN_10 +207 0x4848 //RX_FDEQ_GAIN_11 +208 0x4848 //RX_FDEQ_GAIN_12 +209 0x4848 //RX_FDEQ_GAIN_13 +210 0x4848 //RX_FDEQ_GAIN_14 +211 0x4848 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0202 //RX_FDEQ_BIN_0 +221 0x0203 //RX_FDEQ_BIN_1 +222 0x0303 //RX_FDEQ_BIN_2 +223 0x0304 //RX_FDEQ_BIN_3 +224 0x0405 //RX_FDEQ_BIN_4 +225 0x0506 //RX_FDEQ_BIN_5 +226 0x0708 //RX_FDEQ_BIN_6 +227 0x090A //RX_FDEQ_BIN_7 +228 0x0B0C //RX_FDEQ_BIN_8 +229 0x0D0E //RX_FDEQ_BIN_9 +230 0x0000 //RX_FDEQ_BIN_10 +231 0x0000 //RX_FDEQ_BIN_11 +232 0x0000 //RX_FDEQ_BIN_12 +233 0x0000 //RX_FDEQ_BIN_13 +234 0x0000 //RX_FDEQ_BIN_14 +235 0x0000 //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x4000 //RX_FDEQ_RESRV_0 +245 0x0320 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0030 //RX_FDDRC_BAND_MARGIN_1 +248 0x0050 //RX_FDDRC_BAND_MARGIN_2 +249 0x0080 //RX_FDDRC_BAND_MARGIN_3 +250 0x0007 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x5000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x6400 //RX_FDDRC_THRD_3_2 +258 0x6400 //RX_FDDRC_THRD_3_3 +259 0x2000 //RX_FDDRC_SLANT_0_0 +260 0x2000 //RX_FDDRC_SLANT_0_1 +261 0x2000 //RX_FDDRC_SLANT_0_2 +262 0x2000 //RX_FDDRC_SLANT_0_3 +263 0x5333 //RX_FDDRC_SLANT_1_0 +264 0x5333 //RX_FDDRC_SLANT_1_1 +265 0x5333 //RX_FDDRC_SLANT_1_2 +266 0x5333 //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +286 0x0100 //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 #CASE_NAME BLUETOOTH-BT_HAC-VOICE_GENERIC-WB -#PARAM_TYPE TX+RX -#TOTAL_CUSTOM_STEP 7 +#PARAM_MODE FULL +#PARAM_TYPE TX+2RX +#TOTAL_CUSTOM_STEP 7+7 #TX 0 0x0001 //TX_OPERATION_MODE_0 1 0x0001 //TX_OPERATION_MODE_1 @@ -3764,11 +5599,11 @@ 248 0xF800 //TX_THR_SN_EST_6 249 0xF800 //TX_THR_SN_EST_7 250 0x0100 //TX_DELTA_THR_SN_EST_0 -251 0x0200 //TX_DELTA_THR_SN_EST_1 -252 0x0100 //TX_DELTA_THR_SN_EST_2 -253 0x0200 //TX_DELTA_THR_SN_EST_3 +251 0x0100 //TX_DELTA_THR_SN_EST_1 +252 0x0200 //TX_DELTA_THR_SN_EST_2 +253 0x0100 //TX_DELTA_THR_SN_EST_3 254 0x0100 //TX_DELTA_THR_SN_EST_4 -255 0x0100 //TX_DELTA_THR_SN_EST_5 +255 0x0200 //TX_DELTA_THR_SN_EST_5 256 0x0200 //TX_DELTA_THR_SN_EST_6 257 0x0200 //TX_DELTA_THR_SN_EST_7 258 0x4000 //TX_LAMBDA_NN_EST_0 @@ -3796,11 +5631,11 @@ 280 0x1000 //TX_B_POST_FLT_1 281 0x0010 //TX_NS_LVL_CTRL_0 282 0x0014 //TX_NS_LVL_CTRL_1 -283 0x0014 //TX_NS_LVL_CTRL_2 -284 0x0018 //TX_NS_LVL_CTRL_3 -285 0x0016 //TX_NS_LVL_CTRL_4 -286 0x0014 //TX_NS_LVL_CTRL_5 -287 0x0011 //TX_NS_LVL_CTRL_6 +283 0x0018 //TX_NS_LVL_CTRL_2 +284 0x0016 //TX_NS_LVL_CTRL_3 +285 0x0014 //TX_NS_LVL_CTRL_4 +286 0x0011 //TX_NS_LVL_CTRL_5 +287 0x0014 //TX_NS_LVL_CTRL_6 288 0x0011 //TX_NS_LVL_CTRL_7 289 0x000F //TX_MIN_GAIN_S_0 290 0x0010 //TX_MIN_GAIN_S_1 @@ -3818,8 +5653,8 @@ 302 0x4000 //TX_SNRI_SUP_2 303 0x4000 //TX_SNRI_SUP_3 304 0x4000 //TX_SNRI_SUP_4 -305 0x4000 //TX_SNRI_SUP_5 -306 0x50C0 //TX_SNRI_SUP_6 +305 0x50C0 //TX_SNRI_SUP_5 +306 0x4000 //TX_SNRI_SUP_6 307 0x7FFF //TX_SNRI_SUP_7 308 0x7FFF //TX_THR_LFNS 309 0x0018 //TX_G_LFNS @@ -3828,19 +5663,19 @@ 312 0x7FFF //TX_A_POST_FILT_0 313 0x2000 //TX_A_POST_FILT_1 314 0x5000 //TX_A_POST_FILT_S_0 -315 0x6000 //TX_A_POST_FILT_S_1 -316 0x4C00 //TX_A_POST_FILT_S_2 -317 0x4000 //TX_A_POST_FILT_S_3 -318 0x6000 //TX_A_POST_FILT_S_4 -319 0x4000 //TX_A_POST_FILT_S_5 -320 0x5000 //TX_A_POST_FILT_S_6 +315 0x4C00 //TX_A_POST_FILT_S_1 +316 0x4000 //TX_A_POST_FILT_S_2 +317 0x6000 //TX_A_POST_FILT_S_3 +318 0x4000 //TX_A_POST_FILT_S_4 +319 0x5000 //TX_A_POST_FILT_S_5 +320 0x6000 //TX_A_POST_FILT_S_6 321 0x7000 //TX_A_POST_FILT_S_7 322 0x2000 //TX_B_POST_FILT_0 -323 0x1000 //TX_B_POST_FILT_1 +323 0x2000 //TX_B_POST_FILT_1 324 0x2000 //TX_B_POST_FILT_2 -325 0x2000 //TX_B_POST_FILT_3 +325 0x4000 //TX_B_POST_FILT_3 326 0x4000 //TX_B_POST_FILT_4 -327 0x4000 //TX_B_POST_FILT_5 +327 0x1000 //TX_B_POST_FILT_5 328 0x1000 //TX_B_POST_FILT_6 329 0x2000 //TX_B_POST_FILT_7 330 0x4000 //TX_B_LESSCUT_RTO_S_0 @@ -3848,14 +5683,14 @@ 332 0x7FFF //TX_B_LESSCUT_RTO_S_2 333 0x7FFF //TX_B_LESSCUT_RTO_S_3 334 0x7FFF //TX_B_LESSCUT_RTO_S_4 -335 0x7FFF //TX_B_LESSCUT_RTO_S_5 -336 0x6000 //TX_B_LESSCUT_RTO_S_6 +335 0x6000 //TX_B_LESSCUT_RTO_S_5 +336 0x7FFF //TX_B_LESSCUT_RTO_S_6 337 0x7FFF //TX_B_LESSCUT_RTO_S_7 338 0x7C00 //TX_LAMBDA_PFILT 339 0x7C00 //TX_LAMBDA_PFILT_S_0 340 0x7C00 //TX_LAMBDA_PFILT_S_1 -341 0x7C00 //TX_LAMBDA_PFILT_S_2 -342 0x7A00 //TX_LAMBDA_PFILT_S_3 +341 0x7A00 //TX_LAMBDA_PFILT_S_2 +342 0x7C00 //TX_LAMBDA_PFILT_S_3 343 0x7C00 //TX_LAMBDA_PFILT_S_4 344 0x7C00 //TX_LAMBDA_PFILT_S_5 345 0x7C00 //TX_LAMBDA_PFILT_S_6 @@ -3893,10 +5728,10 @@ 377 0x7FFF //TX_NOISE_TH_5_4 378 0x0F0A //TX_NOISE_TH_6 379 0x0033 //TX_MINENOISE_TH -380 0x4000 //TX_MINENOISE_MIC0_TH_MTS -381 0xFFEE //TX_MINENOISE_MIC0_TH_EXP -382 0x6000 //TX_MINENOISE_MIC0_S_TH_MTS -383 0xFFF3 //TX_MINENOISE_MIC0_S_TH_EXP +380 0x4000 //TX_MORENS_TFMASK_TH +381 0xFFEE //TX_DRC_QUIET_FLOOR +382 0x6000 //TX_RATIODTL_CUT_TH +383 0xFFF3 //TX_DT_CUT_K1 384 0x0666 //TX_OUT_ENER_S_TH_CLEAN 385 0x0666 //TX_OUT_ENER_S_TH_LESSCLEAN 386 0x0333 //TX_OUT_ENER_S_TH_NOISY @@ -3904,15 +5739,15 @@ 388 0x0333 //TX_OUT_ENER_TH_SPEECH 389 0x2000 //TX_SN_NPB_GAIN 390 0x0000 //TX_NN_NPB_GAIN -391 0x0000 //TX_CSX_ALPHA_0 -392 0x0000 //TX_CSX_ALPHA_1 -393 0x0000 //TX_CSX_ALPHA_2 -394 0x0000 //TX_CSX_ALPHA_3 -395 0x0800 //TX_MU_ARSP_EST -396 0x00C8 //TX_P_OUTBEAM_MIN_TH +391 0x0000 //TX_POST_MASK_SUP_HSNE +392 0x0000 //TX_TAIL_DET_TH +393 0x0000 //TX_B_LESSCUT_RTO_WTA +394 0x0000 //TX_MEL_G_R +395 0x0800 //TX_SUPHIGH_TH +396 0x00C8 //TX_MASK_G_R 397 0x0002 //TX_EXTRA_NS_L -398 0x0800 //TX_EXTRA_NS_A -399 0x0005 //TX_VR_NOISE_FLOOR_TH +398 0x0800 //TX_C_POST_FLT_MASK +399 0x0005 //TX_A_POST_FLT_WNS 400 0x0148 //TX_MIN_G_LOW300HZ 401 0x0001 //TX_MAXLEVEL_CNG 402 0x00B4 //TX_STN_NOISE_TH @@ -4027,16 +5862,16 @@ 511 0x6666 //TX_MIC_TO_BFGAIN 512 0x0000 //TX_MICTOBFGAIN0 513 0x0000 //TX_FASTMUE_TH -514 0x0000 //TX_DERVB_LEN_0 -515 0x0000 //TX_DERVB_LEN_1 -516 0x0000 //TX_RHO_DERVB -517 0x0000 //TX_MIC_INDX_DERVB -518 0x0000 //TX_MU_DERVB -519 0x0000 //TX_DR_RESRV_0 -520 0x0000 //TX_DR_RESRV_1 -521 0x0000 //TX_DR_RESRV_2 -522 0x0000 //TX_DR_RESRV_3 -523 0x0000 //TX_DR_RESRV_4 +514 0x0000 //TX_DEREVERB_LF_MU +515 0x0000 //TX_DEREVERB_HF_MU +516 0x0000 //TX_DEREVERB_DELAY +517 0x0000 //TX_DEREVERB_COEF_LEN +518 0x0000 //TX_DEREVERB_DNR +519 0x0000 //TX_DEREVERB_ALPHA +520 0x0000 //TX_DEREVERB_BETA +521 0x0000 //TX_GSC_RTOL_TH +522 0x0000 //TX_GSC_RTOH_TH +523 0x0000 //TX_WIDE2_MEANHTH 524 0x0000 //TX_DR_RESRV_5 525 0x0000 //TX_DR_RESRV_6 526 0x0000 //TX_DR_RESRV_7 @@ -4410,8 +6245,73 @@ 894 0xC000 //TX_FASTNS_SSA_THHFL 895 0xCCCC //TX_FASTNS_SSA_THLFH 896 0xD999 //TX_FASTNS_SSA_THHFH +897 0x0000 //TX_SENDFUNC_REG_MICMUTE +898 0x0000 //TX_SENDFUNC_REG_MICMUTE1 +899 0x0000 //TX_MICMUTE_RATIO_THR +900 0x0000 //TX_MICMUTE_AMP_THR +901 0x0000 //TX_MICMUTE_HPF_IND +902 0x0000 //TX_MICMUTE_LOG_EYR_TH +903 0x0000 //TX_MICMUTE_CVG_TIME +904 0x0000 //TX_MICMUTE_RELEASE_TIME +905 0x0000 //TX_MIC_VOLUME_MIC0MUTE +906 0x0000 //TX_MICMUTE_EPD_OFFSET_0 +907 0x0000 //TX_MICMUTE_FRQ_AEC_L +908 0x0000 //TX_MICMUTE_EAD_THR +909 0x0000 //TX_MICMUTE_LAMBDA_CB_NLE +910 0x0000 //TX_MICMUTE_LAMBDA_RE_EST +911 0x0000 //TX_DTD_THR1_MICMUTE_0 +912 0x0000 //TX_DTD_THR1_MICMUTE_1 +913 0x0000 //TX_DTD_THR1_MICMUTE_2 +914 0x0000 //TX_DTD_THR1_MICMUTE_3 +915 0x0000 //TX_DTD_THR2_MICMUTE_0 +916 0x0000 //TX_MICMUTE_MIN_EQ_RE_EST_0 +917 0x0000 //TX_MICMUTE_MIN_EQ_RE_EST_1 +918 0x0000 //TX_MICMUTE_MIN_EQ_RE_EST_2 +919 0x0000 //TX_MICMUTE_MIN_EQ_RE_EST_3 +920 0x0000 //TX_MICMUTE_MIN_EQ_RE_EST_4 +921 0x0000 //TX_MICMUTE_C_POST_FLT +922 0x0000 //TX_MICMUTE_DT_CUT_K +923 0x0000 //TX_MICMUTE_DT_CUT_THR +924 0x0000 //TX_MICMUTE_DT_CUT_K2 +925 0x0000 //TX_MICMUTE_DT_CUT_THR2 +926 0x0000 //TX_MICMUTE_DT2_HOLD_N +927 0x0000 //TX_MICMUTE_RATIODTH_THCUT +928 0x0000 //TX_MICMUTE_B_POST_FLT_ECHOL +929 0x0000 //TX_MICMUTE_B_POST_FLT_ECHOH +930 0x0000 //TX_MICMUTE_C_POST_FLT_MASK +931 0x0000 //TX_MICMUTE_RATIODTL_CUT_TH +932 0x0000 //TX_MICMUTE_DT_CUT_K1 +933 0x0000 //TX_MICMUTE_N2_SN_EST +934 0x0000 //TX_MICMUTE_THR_SN_EST_0 +935 0x0000 //TX_MICMUTE_MIN_G_CTRL_0 +936 0x0000 //TX_MICMUTE_A_POST_FILT_S_0 +937 0x0000 //TX_MICMUTE_B_POST_FILT_0 +938 0x0000 //TX_MIC1RUB_AMP_THR +939 0x0000 //TX_MIC1MUTE_RATIO_THR +940 0x0000 //TX_MIC1MUTE_AMP_THR +941 0x0000 //TX_MIC1MUTE_CVG_TIME +942 0x0000 //TX_MIC1MUTE_RELEASE_TIME +943 0x0000 //TX_AMS_RESRV_01 +944 0x0000 //TX_AMS_RESRV_02 +945 0x0000 //TX_AMS_RESRV_03 +946 0x0000 //TX_AMS_RESRV_04 +947 0x0000 //TX_AMS_RESRV_05 +948 0x0000 //TX_AMS_RESRV_06 +949 0x0000 //TX_AMS_RESRV_07 +950 0x0000 //TX_AMS_RESRV_08 +951 0x0000 //TX_AMS_RESRV_09 +952 0x0000 //TX_AMS_RESRV_10 +953 0x0000 //TX_AMS_RESRV_11 +954 0x0000 //TX_AMS_RESRV_12 +955 0x0000 //TX_AMS_RESRV_13 +956 0x0000 //TX_AMS_RESRV_14 +957 0x0000 //TX_AMS_RESRV_15 +958 0x0000 //TX_AMS_RESRV_16 +959 0x0000 //TX_AMS_RESRV_17 +960 0x0000 //TX_AMS_RESRV_18 +961 0x0000 //TX_AMS_RESRV_19 #RX -0 0x006C //RX_RECVFUNC_MODE_0 +0 0x206C //RX_RECVFUNC_MODE_0 1 0x0000 //RX_RECVFUNC_MODE_1 2 0x0001 //RX_SAMPLINGFREQ_SIG 3 0x0001 //RX_SAMPLINGFREQ_PROC @@ -5261,10 +7161,862 @@ 110 0x0000 //RX_FDDRC_RESRV_0 129 0x0100 //RX_SPK_VOL 130 0x0000 //RX_VOL_RESRV_0 +#RX 2 +157 0x206C //RX_RECVFUNC_MODE_0 +158 0x0000 //RX_RECVFUNC_MODE_1 +159 0x0001 //RX_SAMPLINGFREQ_SIG +160 0x0001 //RX_SAMPLINGFREQ_PROC +161 0x000A //RX_FRAME_SZ +162 0x0000 //RX_DELAY_OPT +163 0x1000 //RX_TDDRC_ALPHA_UP_1 +164 0x1000 //RX_TDDRC_ALPHA_UP_2 +165 0x1000 //RX_TDDRC_ALPHA_UP_3 +166 0x1000 //RX_TDDRC_ALPHA_UP_4 +167 0x0800 //RX_PGA +168 0x7FFF //RX_A_HP +169 0x4000 //RX_B_PE +170 0x3800 //RX_THR_PITCH_DET_0 +171 0x3000 //RX_THR_PITCH_DET_1 +172 0x2800 //RX_THR_PITCH_DET_2 +173 0x0008 //RX_PITCH_BFR_LEN +174 0x0003 //RX_SBD_PITCH_DET +175 0x0100 //RX_PP_RESRV_0 +176 0x0020 //RX_PP_RESRV_1 +177 0x0600 //RX_N_SN_EST +178 0x000C //RX_N2_SN_EST +179 0x0010 //RX_NS_LVL_CTRL +180 0xF800 //RX_THR_SN_EST +181 0x7CCD //RX_LAMBDA_PFILT +182 0x000A //RX_FENS_RESRV_0 +183 0x0190 //RX_FENS_RESRV_1 +184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +187 0x0002 //RX_EXTRA_NS_L +188 0x0800 //RX_EXTRA_NS_A +189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +190 0x7FFF //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +192 0x199A //RX_A_POST_FLT +193 0x0000 //RX_LMT_THRD +194 0x4000 //RX_LMT_ALPHA +195 0x001C //RX_FDEQ_SUBNUM +196 0x4848 //RX_FDEQ_GAIN_0 +197 0x4848 //RX_FDEQ_GAIN_1 +198 0x4848 //RX_FDEQ_GAIN_2 +199 0x4848 //RX_FDEQ_GAIN_3 +200 0x4848 //RX_FDEQ_GAIN_4 +201 0x4848 //RX_FDEQ_GAIN_5 +202 0x4848 //RX_FDEQ_GAIN_6 +203 0x4848 //RX_FDEQ_GAIN_7 +204 0x4848 //RX_FDEQ_GAIN_8 +205 0x3C3C //RX_FDEQ_GAIN_9 +206 0x3C3C //RX_FDEQ_GAIN_10 +207 0x3838 //RX_FDEQ_GAIN_11 +208 0x3838 //RX_FDEQ_GAIN_12 +209 0x3030 //RX_FDEQ_GAIN_13 +210 0x4848 //RX_FDEQ_GAIN_14 +211 0x4848 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0202 //RX_FDEQ_BIN_0 +221 0x0203 //RX_FDEQ_BIN_1 +222 0x0303 //RX_FDEQ_BIN_2 +223 0x0304 //RX_FDEQ_BIN_3 +224 0x0405 //RX_FDEQ_BIN_4 +225 0x0506 //RX_FDEQ_BIN_5 +226 0x0708 //RX_FDEQ_BIN_6 +227 0x090A //RX_FDEQ_BIN_7 +228 0x0B0C //RX_FDEQ_BIN_8 +229 0x0D0E //RX_FDEQ_BIN_9 +230 0x0E0F //RX_FDEQ_BIN_10 +231 0x0F10 //RX_FDEQ_BIN_11 +232 0x1011 //RX_FDEQ_BIN_12 +233 0x1112 //RX_FDEQ_BIN_13 +234 0x0000 //RX_FDEQ_BIN_14 +235 0x0000 //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x4000 //RX_FDEQ_RESRV_0 +245 0x0320 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0030 //RX_FDDRC_BAND_MARGIN_1 +248 0x0050 //RX_FDDRC_BAND_MARGIN_2 +249 0x0080 //RX_FDDRC_BAND_MARGIN_3 +250 0x0007 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x5000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x6400 //RX_FDDRC_THRD_3_2 +258 0x6400 //RX_FDDRC_THRD_3_3 +259 0x2000 //RX_FDDRC_SLANT_0_0 +260 0x2000 //RX_FDDRC_SLANT_0_1 +261 0x2000 //RX_FDDRC_SLANT_0_2 +262 0x2000 //RX_FDDRC_SLANT_0_3 +263 0x5333 //RX_FDDRC_SLANT_1_0 +264 0x5333 //RX_FDDRC_SLANT_1_1 +265 0x5333 //RX_FDDRC_SLANT_1_2 +266 0x5333 //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +268 0x0000 //RX_FILTINDX +269 0x0000 //RX_TDDRC_THRD_0 +270 0x0000 //RX_TDDRC_THRD_1 +271 0x7FFF //RX_TDDRC_THRD_2 +272 0x7FFF //RX_TDDRC_THRD_3 +273 0x7E70 //RX_TDDRC_SLANT_0 +274 0x7FFF //RX_TDDRC_SLANT_1 +275 0x1000 //RX_TDDRC_ALPHA_UP_0 +276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x199A //RX_TDDRC_HMNC_GAIN +279 0x0001 //RX_TDDRC_SMT_FLAG +280 0x0CCD //RX_TDDRC_SMT_W +281 0x0155 //RX_TDDRC_DRC_GAIN +282 0x7C00 //RX_LAMBDA_PKA_FP +283 0x2000 //RX_TPKA_FP +284 0x2000 //RX_MIN_G_FP +285 0x0080 //RX_MAX_G_FP +286 0x0100 //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 +288 0x0000 //RX_MAXLEVEL_CNG +289 0x3000 //RX_BWE_UV_TH +290 0x3000 //RX_BWE_UV_TH2 +291 0x1800 //RX_BWE_UV_TH3 +292 0x1000 //RX_BWE_V_TH +293 0x04CD //RX_BWE_GAIN1_V_TH1 +294 0x0F33 //RX_BWE_GAIN1_V_TH2 +295 0x7333 //RX_BWE_UV_EQ +296 0x199A //RX_BWE_V_EQ +297 0x7333 //RX_BWE_TONE_TH +298 0x0004 //RX_BWE_UV_HOLD_T +299 0x6CCD //RX_BWE_GAIN2_ALPHA +300 0x799A //RX_BWE_GAIN3_ALPHA +301 0x001E //RX_BWE_CUTOFF +302 0x3000 //RX_BWE_GAINFILL +303 0x3200 //RX_BWE_MAXTH_TONE +304 0x2000 //RX_BWE_EQ_0 +305 0x2000 //RX_BWE_EQ_1 +306 0x2000 //RX_BWE_EQ_2 +307 0x2000 //RX_BWE_EQ_3 +308 0x2000 //RX_BWE_EQ_4 +309 0x2000 //RX_BWE_EQ_5 +310 0x2000 //RX_BWE_EQ_6 +311 0x0000 //RX_BWE_RESRV_0 +312 0x0000 //RX_BWE_RESRV_1 +313 0x0000 //RX_BWE_RESRV_2 +#VOL 0 +163 0x1000 //RX_TDDRC_ALPHA_UP_1 +164 0x1000 //RX_TDDRC_ALPHA_UP_2 +165 0x1000 //RX_TDDRC_ALPHA_UP_3 +166 0x1000 //RX_TDDRC_ALPHA_UP_4 +184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +190 0x7FFF //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +269 0x0000 //RX_TDDRC_THRD_0 +270 0x0000 //RX_TDDRC_THRD_1 +271 0x7FFF //RX_TDDRC_THRD_2 +272 0x7FFF //RX_TDDRC_THRD_3 +273 0x7E70 //RX_TDDRC_SLANT_0 +274 0x7FFF //RX_TDDRC_SLANT_1 +275 0x1000 //RX_TDDRC_ALPHA_UP_0 +276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x199A //RX_TDDRC_HMNC_GAIN +279 0x0001 //RX_TDDRC_SMT_FLAG +280 0x0CCD //RX_TDDRC_SMT_W +281 0x0155 //RX_TDDRC_DRC_GAIN +195 0x001C //RX_FDEQ_SUBNUM +196 0x4848 //RX_FDEQ_GAIN_0 +197 0x4848 //RX_FDEQ_GAIN_1 +198 0x4848 //RX_FDEQ_GAIN_2 +199 0x4848 //RX_FDEQ_GAIN_3 +200 0x4848 //RX_FDEQ_GAIN_4 +201 0x4848 //RX_FDEQ_GAIN_5 +202 0x4848 //RX_FDEQ_GAIN_6 +203 0x4848 //RX_FDEQ_GAIN_7 +204 0x4848 //RX_FDEQ_GAIN_8 +205 0x3C3C //RX_FDEQ_GAIN_9 +206 0x3C3C //RX_FDEQ_GAIN_10 +207 0x3838 //RX_FDEQ_GAIN_11 +208 0x3838 //RX_FDEQ_GAIN_12 +209 0x3030 //RX_FDEQ_GAIN_13 +210 0x4848 //RX_FDEQ_GAIN_14 +211 0x4848 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0202 //RX_FDEQ_BIN_0 +221 0x0203 //RX_FDEQ_BIN_1 +222 0x0303 //RX_FDEQ_BIN_2 +223 0x0304 //RX_FDEQ_BIN_3 +224 0x0405 //RX_FDEQ_BIN_4 +225 0x0506 //RX_FDEQ_BIN_5 +226 0x0708 //RX_FDEQ_BIN_6 +227 0x090A //RX_FDEQ_BIN_7 +228 0x0B0C //RX_FDEQ_BIN_8 +229 0x0D0E //RX_FDEQ_BIN_9 +230 0x0E0F //RX_FDEQ_BIN_10 +231 0x0F10 //RX_FDEQ_BIN_11 +232 0x1011 //RX_FDEQ_BIN_12 +233 0x1112 //RX_FDEQ_BIN_13 +234 0x0000 //RX_FDEQ_BIN_14 +235 0x0000 //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x4000 //RX_FDEQ_RESRV_0 +245 0x0320 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0030 //RX_FDDRC_BAND_MARGIN_1 +248 0x0050 //RX_FDDRC_BAND_MARGIN_2 +249 0x0080 //RX_FDDRC_BAND_MARGIN_3 +250 0x0007 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x5000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x6400 //RX_FDDRC_THRD_3_2 +258 0x6400 //RX_FDDRC_THRD_3_3 +259 0x2000 //RX_FDDRC_SLANT_0_0 +260 0x2000 //RX_FDDRC_SLANT_0_1 +261 0x2000 //RX_FDDRC_SLANT_0_2 +262 0x2000 //RX_FDDRC_SLANT_0_3 +263 0x5333 //RX_FDDRC_SLANT_1_0 +264 0x5333 //RX_FDDRC_SLANT_1_1 +265 0x5333 //RX_FDDRC_SLANT_1_2 +266 0x5333 //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +286 0x0100 //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 +#VOL 1 +163 0x1000 //RX_TDDRC_ALPHA_UP_1 +164 0x1000 //RX_TDDRC_ALPHA_UP_2 +165 0x1000 //RX_TDDRC_ALPHA_UP_3 +166 0x1000 //RX_TDDRC_ALPHA_UP_4 +184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +190 0x7FFF //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +269 0x0000 //RX_TDDRC_THRD_0 +270 0x0000 //RX_TDDRC_THRD_1 +271 0x7FFF //RX_TDDRC_THRD_2 +272 0x7FFF //RX_TDDRC_THRD_3 +273 0x7E70 //RX_TDDRC_SLANT_0 +274 0x7FFF //RX_TDDRC_SLANT_1 +275 0x1000 //RX_TDDRC_ALPHA_UP_0 +276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x199A //RX_TDDRC_HMNC_GAIN +279 0x0001 //RX_TDDRC_SMT_FLAG +280 0x0CCD //RX_TDDRC_SMT_W +281 0x0155 //RX_TDDRC_DRC_GAIN +195 0x001C //RX_FDEQ_SUBNUM +196 0x4848 //RX_FDEQ_GAIN_0 +197 0x4848 //RX_FDEQ_GAIN_1 +198 0x4848 //RX_FDEQ_GAIN_2 +199 0x4848 //RX_FDEQ_GAIN_3 +200 0x4848 //RX_FDEQ_GAIN_4 +201 0x4848 //RX_FDEQ_GAIN_5 +202 0x4848 //RX_FDEQ_GAIN_6 +203 0x4848 //RX_FDEQ_GAIN_7 +204 0x4848 //RX_FDEQ_GAIN_8 +205 0x3C3C //RX_FDEQ_GAIN_9 +206 0x3C3C //RX_FDEQ_GAIN_10 +207 0x3838 //RX_FDEQ_GAIN_11 +208 0x3838 //RX_FDEQ_GAIN_12 +209 0x3030 //RX_FDEQ_GAIN_13 +210 0x4848 //RX_FDEQ_GAIN_14 +211 0x4848 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0202 //RX_FDEQ_BIN_0 +221 0x0203 //RX_FDEQ_BIN_1 +222 0x0303 //RX_FDEQ_BIN_2 +223 0x0304 //RX_FDEQ_BIN_3 +224 0x0405 //RX_FDEQ_BIN_4 +225 0x0506 //RX_FDEQ_BIN_5 +226 0x0708 //RX_FDEQ_BIN_6 +227 0x090A //RX_FDEQ_BIN_7 +228 0x0B0C //RX_FDEQ_BIN_8 +229 0x0D0E //RX_FDEQ_BIN_9 +230 0x0E0F //RX_FDEQ_BIN_10 +231 0x0F10 //RX_FDEQ_BIN_11 +232 0x1011 //RX_FDEQ_BIN_12 +233 0x1112 //RX_FDEQ_BIN_13 +234 0x0000 //RX_FDEQ_BIN_14 +235 0x0000 //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x4000 //RX_FDEQ_RESRV_0 +245 0x0320 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0030 //RX_FDDRC_BAND_MARGIN_1 +248 0x0050 //RX_FDDRC_BAND_MARGIN_2 +249 0x0080 //RX_FDDRC_BAND_MARGIN_3 +250 0x0007 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x5000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x6400 //RX_FDDRC_THRD_3_2 +258 0x6400 //RX_FDDRC_THRD_3_3 +259 0x2000 //RX_FDDRC_SLANT_0_0 +260 0x2000 //RX_FDDRC_SLANT_0_1 +261 0x2000 //RX_FDDRC_SLANT_0_2 +262 0x2000 //RX_FDDRC_SLANT_0_3 +263 0x5333 //RX_FDDRC_SLANT_1_0 +264 0x5333 //RX_FDDRC_SLANT_1_1 +265 0x5333 //RX_FDDRC_SLANT_1_2 +266 0x5333 //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +286 0x0100 //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 +#VOL 2 +163 0x1000 //RX_TDDRC_ALPHA_UP_1 +164 0x1000 //RX_TDDRC_ALPHA_UP_2 +165 0x1000 //RX_TDDRC_ALPHA_UP_3 +166 0x1000 //RX_TDDRC_ALPHA_UP_4 +184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +190 0x7FFF //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +269 0x0000 //RX_TDDRC_THRD_0 +270 0x0000 //RX_TDDRC_THRD_1 +271 0x7FFF //RX_TDDRC_THRD_2 +272 0x7FFF //RX_TDDRC_THRD_3 +273 0x7E70 //RX_TDDRC_SLANT_0 +274 0x7FFF //RX_TDDRC_SLANT_1 +275 0x1000 //RX_TDDRC_ALPHA_UP_0 +276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x199A //RX_TDDRC_HMNC_GAIN +279 0x0001 //RX_TDDRC_SMT_FLAG +280 0x0CCD //RX_TDDRC_SMT_W +281 0x0155 //RX_TDDRC_DRC_GAIN +195 0x001C //RX_FDEQ_SUBNUM +196 0x4848 //RX_FDEQ_GAIN_0 +197 0x4848 //RX_FDEQ_GAIN_1 +198 0x4848 //RX_FDEQ_GAIN_2 +199 0x4848 //RX_FDEQ_GAIN_3 +200 0x4848 //RX_FDEQ_GAIN_4 +201 0x4848 //RX_FDEQ_GAIN_5 +202 0x4848 //RX_FDEQ_GAIN_6 +203 0x4848 //RX_FDEQ_GAIN_7 +204 0x4848 //RX_FDEQ_GAIN_8 +205 0x3C3C //RX_FDEQ_GAIN_9 +206 0x3C3C //RX_FDEQ_GAIN_10 +207 0x3838 //RX_FDEQ_GAIN_11 +208 0x3838 //RX_FDEQ_GAIN_12 +209 0x3030 //RX_FDEQ_GAIN_13 +210 0x4848 //RX_FDEQ_GAIN_14 +211 0x4848 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0202 //RX_FDEQ_BIN_0 +221 0x0203 //RX_FDEQ_BIN_1 +222 0x0303 //RX_FDEQ_BIN_2 +223 0x0304 //RX_FDEQ_BIN_3 +224 0x0405 //RX_FDEQ_BIN_4 +225 0x0506 //RX_FDEQ_BIN_5 +226 0x0708 //RX_FDEQ_BIN_6 +227 0x090A //RX_FDEQ_BIN_7 +228 0x0B0C //RX_FDEQ_BIN_8 +229 0x0D0E //RX_FDEQ_BIN_9 +230 0x0E0F //RX_FDEQ_BIN_10 +231 0x0F10 //RX_FDEQ_BIN_11 +232 0x1011 //RX_FDEQ_BIN_12 +233 0x1112 //RX_FDEQ_BIN_13 +234 0x0000 //RX_FDEQ_BIN_14 +235 0x0000 //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x4000 //RX_FDEQ_RESRV_0 +245 0x0320 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0030 //RX_FDDRC_BAND_MARGIN_1 +248 0x0050 //RX_FDDRC_BAND_MARGIN_2 +249 0x0080 //RX_FDDRC_BAND_MARGIN_3 +250 0x0007 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x5000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x6400 //RX_FDDRC_THRD_3_2 +258 0x6400 //RX_FDDRC_THRD_3_3 +259 0x2000 //RX_FDDRC_SLANT_0_0 +260 0x2000 //RX_FDDRC_SLANT_0_1 +261 0x2000 //RX_FDDRC_SLANT_0_2 +262 0x2000 //RX_FDDRC_SLANT_0_3 +263 0x5333 //RX_FDDRC_SLANT_1_0 +264 0x5333 //RX_FDDRC_SLANT_1_1 +265 0x5333 //RX_FDDRC_SLANT_1_2 +266 0x5333 //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +286 0x0100 //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 +#VOL 3 +163 0x1000 //RX_TDDRC_ALPHA_UP_1 +164 0x1000 //RX_TDDRC_ALPHA_UP_2 +165 0x1000 //RX_TDDRC_ALPHA_UP_3 +166 0x1000 //RX_TDDRC_ALPHA_UP_4 +184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +190 0x7FFF //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +269 0x0000 //RX_TDDRC_THRD_0 +270 0x0000 //RX_TDDRC_THRD_1 +271 0x7FFF //RX_TDDRC_THRD_2 +272 0x7FFF //RX_TDDRC_THRD_3 +273 0x7E70 //RX_TDDRC_SLANT_0 +274 0x7FFF //RX_TDDRC_SLANT_1 +275 0x1000 //RX_TDDRC_ALPHA_UP_0 +276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x199A //RX_TDDRC_HMNC_GAIN +279 0x0001 //RX_TDDRC_SMT_FLAG +280 0x0CCD //RX_TDDRC_SMT_W +281 0x0155 //RX_TDDRC_DRC_GAIN +195 0x001C //RX_FDEQ_SUBNUM +196 0x4848 //RX_FDEQ_GAIN_0 +197 0x4848 //RX_FDEQ_GAIN_1 +198 0x4848 //RX_FDEQ_GAIN_2 +199 0x4848 //RX_FDEQ_GAIN_3 +200 0x4848 //RX_FDEQ_GAIN_4 +201 0x4848 //RX_FDEQ_GAIN_5 +202 0x4848 //RX_FDEQ_GAIN_6 +203 0x4848 //RX_FDEQ_GAIN_7 +204 0x4848 //RX_FDEQ_GAIN_8 +205 0x3C3C //RX_FDEQ_GAIN_9 +206 0x3C3C //RX_FDEQ_GAIN_10 +207 0x3838 //RX_FDEQ_GAIN_11 +208 0x3838 //RX_FDEQ_GAIN_12 +209 0x3030 //RX_FDEQ_GAIN_13 +210 0x4848 //RX_FDEQ_GAIN_14 +211 0x4848 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0202 //RX_FDEQ_BIN_0 +221 0x0203 //RX_FDEQ_BIN_1 +222 0x0303 //RX_FDEQ_BIN_2 +223 0x0304 //RX_FDEQ_BIN_3 +224 0x0405 //RX_FDEQ_BIN_4 +225 0x0506 //RX_FDEQ_BIN_5 +226 0x0708 //RX_FDEQ_BIN_6 +227 0x090A //RX_FDEQ_BIN_7 +228 0x0B0C //RX_FDEQ_BIN_8 +229 0x0D0E //RX_FDEQ_BIN_9 +230 0x0E0F //RX_FDEQ_BIN_10 +231 0x0F10 //RX_FDEQ_BIN_11 +232 0x1011 //RX_FDEQ_BIN_12 +233 0x1112 //RX_FDEQ_BIN_13 +234 0x0000 //RX_FDEQ_BIN_14 +235 0x0000 //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x4000 //RX_FDEQ_RESRV_0 +245 0x0320 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0030 //RX_FDDRC_BAND_MARGIN_1 +248 0x0050 //RX_FDDRC_BAND_MARGIN_2 +249 0x0080 //RX_FDDRC_BAND_MARGIN_3 +250 0x0007 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x5000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x6400 //RX_FDDRC_THRD_3_2 +258 0x6400 //RX_FDDRC_THRD_3_3 +259 0x2000 //RX_FDDRC_SLANT_0_0 +260 0x2000 //RX_FDDRC_SLANT_0_1 +261 0x2000 //RX_FDDRC_SLANT_0_2 +262 0x2000 //RX_FDDRC_SLANT_0_3 +263 0x5333 //RX_FDDRC_SLANT_1_0 +264 0x5333 //RX_FDDRC_SLANT_1_1 +265 0x5333 //RX_FDDRC_SLANT_1_2 +266 0x5333 //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +286 0x0100 //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 +#VOL 4 +163 0x1000 //RX_TDDRC_ALPHA_UP_1 +164 0x1000 //RX_TDDRC_ALPHA_UP_2 +165 0x1000 //RX_TDDRC_ALPHA_UP_3 +166 0x1000 //RX_TDDRC_ALPHA_UP_4 +184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +190 0x7FFF //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +269 0x0000 //RX_TDDRC_THRD_0 +270 0x0000 //RX_TDDRC_THRD_1 +271 0x7FFF //RX_TDDRC_THRD_2 +272 0x7FFF //RX_TDDRC_THRD_3 +273 0x7E70 //RX_TDDRC_SLANT_0 +274 0x7FFF //RX_TDDRC_SLANT_1 +275 0x1000 //RX_TDDRC_ALPHA_UP_0 +276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x199A //RX_TDDRC_HMNC_GAIN +279 0x0001 //RX_TDDRC_SMT_FLAG +280 0x0CCD //RX_TDDRC_SMT_W +281 0x0155 //RX_TDDRC_DRC_GAIN +195 0x001C //RX_FDEQ_SUBNUM +196 0x4848 //RX_FDEQ_GAIN_0 +197 0x4848 //RX_FDEQ_GAIN_1 +198 0x4848 //RX_FDEQ_GAIN_2 +199 0x4848 //RX_FDEQ_GAIN_3 +200 0x4848 //RX_FDEQ_GAIN_4 +201 0x4848 //RX_FDEQ_GAIN_5 +202 0x4848 //RX_FDEQ_GAIN_6 +203 0x4848 //RX_FDEQ_GAIN_7 +204 0x4848 //RX_FDEQ_GAIN_8 +205 0x3C3C //RX_FDEQ_GAIN_9 +206 0x3C3C //RX_FDEQ_GAIN_10 +207 0x3838 //RX_FDEQ_GAIN_11 +208 0x3838 //RX_FDEQ_GAIN_12 +209 0x3030 //RX_FDEQ_GAIN_13 +210 0x4848 //RX_FDEQ_GAIN_14 +211 0x4848 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0202 //RX_FDEQ_BIN_0 +221 0x0203 //RX_FDEQ_BIN_1 +222 0x0303 //RX_FDEQ_BIN_2 +223 0x0304 //RX_FDEQ_BIN_3 +224 0x0405 //RX_FDEQ_BIN_4 +225 0x0506 //RX_FDEQ_BIN_5 +226 0x0708 //RX_FDEQ_BIN_6 +227 0x090A //RX_FDEQ_BIN_7 +228 0x0B0C //RX_FDEQ_BIN_8 +229 0x0D0E //RX_FDEQ_BIN_9 +230 0x0E0F //RX_FDEQ_BIN_10 +231 0x0F10 //RX_FDEQ_BIN_11 +232 0x1011 //RX_FDEQ_BIN_12 +233 0x1112 //RX_FDEQ_BIN_13 +234 0x0000 //RX_FDEQ_BIN_14 +235 0x0000 //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x4000 //RX_FDEQ_RESRV_0 +245 0x0320 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0030 //RX_FDDRC_BAND_MARGIN_1 +248 0x0050 //RX_FDDRC_BAND_MARGIN_2 +249 0x0080 //RX_FDDRC_BAND_MARGIN_3 +250 0x0007 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x5000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x6400 //RX_FDDRC_THRD_3_2 +258 0x6400 //RX_FDDRC_THRD_3_3 +259 0x2000 //RX_FDDRC_SLANT_0_0 +260 0x2000 //RX_FDDRC_SLANT_0_1 +261 0x2000 //RX_FDDRC_SLANT_0_2 +262 0x2000 //RX_FDDRC_SLANT_0_3 +263 0x5333 //RX_FDDRC_SLANT_1_0 +264 0x5333 //RX_FDDRC_SLANT_1_1 +265 0x5333 //RX_FDDRC_SLANT_1_2 +266 0x5333 //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +286 0x0100 //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 +#VOL 5 +163 0x1000 //RX_TDDRC_ALPHA_UP_1 +164 0x1000 //RX_TDDRC_ALPHA_UP_2 +165 0x1000 //RX_TDDRC_ALPHA_UP_3 +166 0x1000 //RX_TDDRC_ALPHA_UP_4 +184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +190 0x7FFF //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +269 0x0000 //RX_TDDRC_THRD_0 +270 0x0000 //RX_TDDRC_THRD_1 +271 0x7FFF //RX_TDDRC_THRD_2 +272 0x7FFF //RX_TDDRC_THRD_3 +273 0x7E70 //RX_TDDRC_SLANT_0 +274 0x7FFF //RX_TDDRC_SLANT_1 +275 0x1000 //RX_TDDRC_ALPHA_UP_0 +276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x199A //RX_TDDRC_HMNC_GAIN +279 0x0001 //RX_TDDRC_SMT_FLAG +280 0x0CCD //RX_TDDRC_SMT_W +281 0x0155 //RX_TDDRC_DRC_GAIN +195 0x001C //RX_FDEQ_SUBNUM +196 0x4848 //RX_FDEQ_GAIN_0 +197 0x4848 //RX_FDEQ_GAIN_1 +198 0x4848 //RX_FDEQ_GAIN_2 +199 0x4848 //RX_FDEQ_GAIN_3 +200 0x4848 //RX_FDEQ_GAIN_4 +201 0x4848 //RX_FDEQ_GAIN_5 +202 0x4848 //RX_FDEQ_GAIN_6 +203 0x4848 //RX_FDEQ_GAIN_7 +204 0x4848 //RX_FDEQ_GAIN_8 +205 0x3C3C //RX_FDEQ_GAIN_9 +206 0x3C3C //RX_FDEQ_GAIN_10 +207 0x3838 //RX_FDEQ_GAIN_11 +208 0x3838 //RX_FDEQ_GAIN_12 +209 0x3030 //RX_FDEQ_GAIN_13 +210 0x4848 //RX_FDEQ_GAIN_14 +211 0x4848 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0202 //RX_FDEQ_BIN_0 +221 0x0203 //RX_FDEQ_BIN_1 +222 0x0303 //RX_FDEQ_BIN_2 +223 0x0304 //RX_FDEQ_BIN_3 +224 0x0405 //RX_FDEQ_BIN_4 +225 0x0506 //RX_FDEQ_BIN_5 +226 0x0708 //RX_FDEQ_BIN_6 +227 0x090A //RX_FDEQ_BIN_7 +228 0x0B0C //RX_FDEQ_BIN_8 +229 0x0D0E //RX_FDEQ_BIN_9 +230 0x0E0F //RX_FDEQ_BIN_10 +231 0x0F10 //RX_FDEQ_BIN_11 +232 0x1011 //RX_FDEQ_BIN_12 +233 0x1112 //RX_FDEQ_BIN_13 +234 0x0000 //RX_FDEQ_BIN_14 +235 0x0000 //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x4000 //RX_FDEQ_RESRV_0 +245 0x0320 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0030 //RX_FDDRC_BAND_MARGIN_1 +248 0x0050 //RX_FDDRC_BAND_MARGIN_2 +249 0x0080 //RX_FDDRC_BAND_MARGIN_3 +250 0x0007 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x5000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x6400 //RX_FDDRC_THRD_3_2 +258 0x6400 //RX_FDDRC_THRD_3_3 +259 0x2000 //RX_FDDRC_SLANT_0_0 +260 0x2000 //RX_FDDRC_SLANT_0_1 +261 0x2000 //RX_FDDRC_SLANT_0_2 +262 0x2000 //RX_FDDRC_SLANT_0_3 +263 0x5333 //RX_FDDRC_SLANT_1_0 +264 0x5333 //RX_FDDRC_SLANT_1_1 +265 0x5333 //RX_FDDRC_SLANT_1_2 +266 0x5333 //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +286 0x0100 //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 +#VOL 6 +163 0x1000 //RX_TDDRC_ALPHA_UP_1 +164 0x1000 //RX_TDDRC_ALPHA_UP_2 +165 0x1000 //RX_TDDRC_ALPHA_UP_3 +166 0x1000 //RX_TDDRC_ALPHA_UP_4 +184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +190 0x7FFF //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +269 0x0000 //RX_TDDRC_THRD_0 +270 0x0000 //RX_TDDRC_THRD_1 +271 0x7FFF //RX_TDDRC_THRD_2 +272 0x7FFF //RX_TDDRC_THRD_3 +273 0x7E70 //RX_TDDRC_SLANT_0 +274 0x7FFF //RX_TDDRC_SLANT_1 +275 0x1000 //RX_TDDRC_ALPHA_UP_0 +276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x199A //RX_TDDRC_HMNC_GAIN +279 0x0001 //RX_TDDRC_SMT_FLAG +280 0x0CCD //RX_TDDRC_SMT_W +281 0x0155 //RX_TDDRC_DRC_GAIN +195 0x001C //RX_FDEQ_SUBNUM +196 0x4848 //RX_FDEQ_GAIN_0 +197 0x4848 //RX_FDEQ_GAIN_1 +198 0x4848 //RX_FDEQ_GAIN_2 +199 0x4848 //RX_FDEQ_GAIN_3 +200 0x4848 //RX_FDEQ_GAIN_4 +201 0x4848 //RX_FDEQ_GAIN_5 +202 0x4848 //RX_FDEQ_GAIN_6 +203 0x4848 //RX_FDEQ_GAIN_7 +204 0x4848 //RX_FDEQ_GAIN_8 +205 0x3C3C //RX_FDEQ_GAIN_9 +206 0x3C3C //RX_FDEQ_GAIN_10 +207 0x3838 //RX_FDEQ_GAIN_11 +208 0x3838 //RX_FDEQ_GAIN_12 +209 0x3030 //RX_FDEQ_GAIN_13 +210 0x4848 //RX_FDEQ_GAIN_14 +211 0x4848 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0202 //RX_FDEQ_BIN_0 +221 0x0203 //RX_FDEQ_BIN_1 +222 0x0303 //RX_FDEQ_BIN_2 +223 0x0304 //RX_FDEQ_BIN_3 +224 0x0405 //RX_FDEQ_BIN_4 +225 0x0506 //RX_FDEQ_BIN_5 +226 0x0708 //RX_FDEQ_BIN_6 +227 0x090A //RX_FDEQ_BIN_7 +228 0x0B0C //RX_FDEQ_BIN_8 +229 0x0D0E //RX_FDEQ_BIN_9 +230 0x0E0F //RX_FDEQ_BIN_10 +231 0x0F10 //RX_FDEQ_BIN_11 +232 0x1011 //RX_FDEQ_BIN_12 +233 0x1112 //RX_FDEQ_BIN_13 +234 0x0000 //RX_FDEQ_BIN_14 +235 0x0000 //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x4000 //RX_FDEQ_RESRV_0 +245 0x0320 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0030 //RX_FDDRC_BAND_MARGIN_1 +248 0x0050 //RX_FDDRC_BAND_MARGIN_2 +249 0x0080 //RX_FDDRC_BAND_MARGIN_3 +250 0x0007 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x5000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x6400 //RX_FDDRC_THRD_3_2 +258 0x6400 //RX_FDDRC_THRD_3_3 +259 0x2000 //RX_FDDRC_SLANT_0_0 +260 0x2000 //RX_FDDRC_SLANT_0_1 +261 0x2000 //RX_FDDRC_SLANT_0_2 +262 0x2000 //RX_FDDRC_SLANT_0_3 +263 0x5333 //RX_FDDRC_SLANT_1_0 +264 0x5333 //RX_FDDRC_SLANT_1_1 +265 0x5333 //RX_FDDRC_SLANT_1_2 +266 0x5333 //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +286 0x0100 //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 #CASE_NAME BLUETOOTH-BT_HAC-VOICE_GENERIC-SWB -#PARAM_TYPE TX+RX -#TOTAL_CUSTOM_STEP 7 +#PARAM_MODE Full +#PARAM_TYPE TX+2RX +#TOTAL_CUSTOM_STEP 7+7 #TX 0 0x0001 //TX_OPERATION_MODE_0 1 0x0001 //TX_OPERATION_MODE_1 @@ -5519,10 +8271,10 @@ 250 0x0100 //TX_DELTA_THR_SN_EST_0 251 0x0100 //TX_DELTA_THR_SN_EST_1 252 0x0100 //TX_DELTA_THR_SN_EST_2 -253 0x0100 //TX_DELTA_THR_SN_EST_3 -254 0x0000 //TX_DELTA_THR_SN_EST_4 -255 0x0100 //TX_DELTA_THR_SN_EST_5 -256 0x0200 //TX_DELTA_THR_SN_EST_6 +253 0x0000 //TX_DELTA_THR_SN_EST_3 +254 0x0100 //TX_DELTA_THR_SN_EST_4 +255 0x0200 //TX_DELTA_THR_SN_EST_5 +256 0x0100 //TX_DELTA_THR_SN_EST_6 257 0x0200 //TX_DELTA_THR_SN_EST_7 258 0x4000 //TX_LAMBDA_NN_EST_0 259 0x4000 //TX_LAMBDA_NN_EST_1 @@ -5549,11 +8301,11 @@ 280 0x1000 //TX_B_POST_FLT_1 281 0x0010 //TX_NS_LVL_CTRL_0 282 0x003C //TX_NS_LVL_CTRL_1 -283 0x003C //TX_NS_LVL_CTRL_2 -284 0x0024 //TX_NS_LVL_CTRL_3 -285 0x003C //TX_NS_LVL_CTRL_4 -286 0x0014 //TX_NS_LVL_CTRL_5 -287 0x0011 //TX_NS_LVL_CTRL_6 +283 0x0024 //TX_NS_LVL_CTRL_2 +284 0x003C //TX_NS_LVL_CTRL_3 +285 0x0014 //TX_NS_LVL_CTRL_4 +286 0x0011 //TX_NS_LVL_CTRL_5 +287 0x003C //TX_NS_LVL_CTRL_6 288 0x0011 //TX_NS_LVL_CTRL_7 289 0x000F //TX_MIN_GAIN_S_0 290 0x0010 //TX_MIN_GAIN_S_1 @@ -5569,10 +8321,10 @@ 300 0x7FFF //TX_SNRI_SUP_0 301 0x1400 //TX_SNRI_SUP_1 302 0x1400 //TX_SNRI_SUP_2 -303 0x1400 //TX_SNRI_SUP_3 +303 0x4000 //TX_SNRI_SUP_3 304 0x4000 //TX_SNRI_SUP_4 -305 0x4000 //TX_SNRI_SUP_5 -306 0x50C0 //TX_SNRI_SUP_6 +305 0x50C0 //TX_SNRI_SUP_5 +306 0x1400 //TX_SNRI_SUP_6 307 0x7FFF //TX_SNRI_SUP_7 308 0x7FFF //TX_THR_LFNS 309 0x0018 //TX_G_LFNS @@ -5581,19 +8333,19 @@ 312 0x7FFF //TX_A_POST_FILT_0 313 0x2000 //TX_A_POST_FILT_1 314 0x5000 //TX_A_POST_FILT_S_0 -315 0x7C00 //TX_A_POST_FILT_S_1 -316 0x4C00 //TX_A_POST_FILT_S_2 -317 0x4000 //TX_A_POST_FILT_S_3 -318 0x6000 //TX_A_POST_FILT_S_4 -319 0x4000 //TX_A_POST_FILT_S_5 -320 0x5000 //TX_A_POST_FILT_S_6 +315 0x4C00 //TX_A_POST_FILT_S_1 +316 0x4000 //TX_A_POST_FILT_S_2 +317 0x6000 //TX_A_POST_FILT_S_3 +318 0x4000 //TX_A_POST_FILT_S_4 +319 0x5000 //TX_A_POST_FILT_S_5 +320 0x7C00 //TX_A_POST_FILT_S_6 321 0x7000 //TX_A_POST_FILT_S_7 322 0x2000 //TX_B_POST_FILT_0 -323 0x1000 //TX_B_POST_FILT_1 +323 0x6000 //TX_B_POST_FILT_1 324 0x6000 //TX_B_POST_FILT_2 325 0x6000 //TX_B_POST_FILT_3 -326 0x6000 //TX_B_POST_FILT_4 -327 0x4000 //TX_B_POST_FILT_5 +326 0x4000 //TX_B_POST_FILT_4 +327 0x1000 //TX_B_POST_FILT_5 328 0x1000 //TX_B_POST_FILT_6 329 0x2000 //TX_B_POST_FILT_7 330 0x4000 //TX_B_LESSCUT_RTO_S_0 @@ -5601,8 +8353,8 @@ 332 0x7FFF //TX_B_LESSCUT_RTO_S_2 333 0x7FFF //TX_B_LESSCUT_RTO_S_3 334 0x7FFF //TX_B_LESSCUT_RTO_S_4 -335 0x7FFF //TX_B_LESSCUT_RTO_S_5 -336 0x6000 //TX_B_LESSCUT_RTO_S_6 +335 0x6000 //TX_B_LESSCUT_RTO_S_5 +336 0x7FFF //TX_B_LESSCUT_RTO_S_6 337 0x7FFF //TX_B_LESSCUT_RTO_S_7 338 0x7C00 //TX_LAMBDA_PFILT 339 0x7D00 //TX_LAMBDA_PFILT_S_0 @@ -5646,10 +8398,10 @@ 377 0x7FFF //TX_NOISE_TH_5_4 378 0x0DAC //TX_NOISE_TH_6 379 0x0050 //TX_MINENOISE_TH -380 0x4000 //TX_MINENOISE_MIC0_TH_MTS -381 0xFFEE //TX_MINENOISE_MIC0_TH_EXP -382 0x6000 //TX_MINENOISE_MIC0_S_TH_MTS -383 0xFFF3 //TX_MINENOISE_MIC0_S_TH_EXP +380 0x4000 //TX_MORENS_TFMASK_TH +381 0xFFEE //TX_DRC_QUIET_FLOOR +382 0x6000 //TX_RATIODTL_CUT_TH +383 0xFFF3 //TX_DT_CUT_K1 384 0x0666 //TX_OUT_ENER_S_TH_CLEAN 385 0x0666 //TX_OUT_ENER_S_TH_LESSCLEAN 386 0x0333 //TX_OUT_ENER_S_TH_NOISY @@ -5657,15 +8409,15 @@ 388 0x0333 //TX_OUT_ENER_TH_SPEECH 389 0x2000 //TX_SN_NPB_GAIN 390 0x0000 //TX_NN_NPB_GAIN -391 0x0000 //TX_CSX_ALPHA_0 -392 0x0000 //TX_CSX_ALPHA_1 -393 0x0000 //TX_CSX_ALPHA_2 -394 0x0000 //TX_CSX_ALPHA_3 -395 0x0800 //TX_MU_ARSP_EST -396 0x00C8 //TX_P_OUTBEAM_MIN_TH +391 0x0000 //TX_POST_MASK_SUP_HSNE +392 0x0000 //TX_TAIL_DET_TH +393 0x0000 //TX_B_LESSCUT_RTO_WTA +394 0x0000 //TX_MEL_G_R +395 0x0800 //TX_SUPHIGH_TH +396 0x00C8 //TX_MASK_G_R 397 0x0002 //TX_EXTRA_NS_L -398 0x0800 //TX_EXTRA_NS_A -399 0x0005 //TX_VR_NOISE_FLOOR_TH +398 0x0800 //TX_C_POST_FLT_MASK +399 0x0005 //TX_A_POST_FLT_WNS 400 0x0148 //TX_MIN_G_LOW300HZ 401 0x0001 //TX_MAXLEVEL_CNG 402 0x00B4 //TX_STN_NOISE_TH @@ -5780,16 +8532,16 @@ 511 0x6666 //TX_MIC_TO_BFGAIN 512 0x0000 //TX_MICTOBFGAIN0 513 0x0000 //TX_FASTMUE_TH -514 0x0000 //TX_DERVB_LEN_0 -515 0x0000 //TX_DERVB_LEN_1 -516 0x0000 //TX_RHO_DERVB -517 0x0000 //TX_MIC_INDX_DERVB -518 0x0000 //TX_MU_DERVB -519 0x0000 //TX_DR_RESRV_0 -520 0x0000 //TX_DR_RESRV_1 -521 0x0000 //TX_DR_RESRV_2 -522 0x0000 //TX_DR_RESRV_3 -523 0x0000 //TX_DR_RESRV_4 +514 0x0000 //TX_DEREVERB_LF_MU +515 0x0000 //TX_DEREVERB_HF_MU +516 0x0000 //TX_DEREVERB_DELAY +517 0x0000 //TX_DEREVERB_COEF_LEN +518 0x0000 //TX_DEREVERB_DNR +519 0x0000 //TX_DEREVERB_ALPHA +520 0x0000 //TX_DEREVERB_BETA +521 0x0000 //TX_GSC_RTOL_TH +522 0x0000 //TX_GSC_RTOH_TH +523 0x0000 //TX_WIDE2_MEANHTH 524 0x0000 //TX_DR_RESRV_5 525 0x0000 //TX_DR_RESRV_6 526 0x0000 //TX_DR_RESRV_7 @@ -6163,8 +8915,73 @@ 894 0xC000 //TX_FASTNS_SSA_THHFL 895 0xCCCC //TX_FASTNS_SSA_THLFH 896 0xD999 //TX_FASTNS_SSA_THHFH +897 0x0000 //TX_SENDFUNC_REG_MICMUTE +898 0x0000 //TX_SENDFUNC_REG_MICMUTE1 +899 0x0000 //TX_MICMUTE_RATIO_THR +900 0x0000 //TX_MICMUTE_AMP_THR +901 0x0000 //TX_MICMUTE_HPF_IND +902 0x0000 //TX_MICMUTE_LOG_EYR_TH +903 0x0000 //TX_MICMUTE_CVG_TIME +904 0x0000 //TX_MICMUTE_RELEASE_TIME +905 0x0000 //TX_MIC_VOLUME_MIC0MUTE +906 0x0000 //TX_MICMUTE_EPD_OFFSET_0 +907 0x0000 //TX_MICMUTE_FRQ_AEC_L +908 0x0000 //TX_MICMUTE_EAD_THR +909 0x0000 //TX_MICMUTE_LAMBDA_CB_NLE +910 0x0000 //TX_MICMUTE_LAMBDA_RE_EST +911 0x0000 //TX_DTD_THR1_MICMUTE_0 +912 0x0000 //TX_DTD_THR1_MICMUTE_1 +913 0x0000 //TX_DTD_THR1_MICMUTE_2 +914 0x0000 //TX_DTD_THR1_MICMUTE_3 +915 0x0000 //TX_DTD_THR2_MICMUTE_0 +916 0x0000 //TX_MICMUTE_MIN_EQ_RE_EST_0 +917 0x0000 //TX_MICMUTE_MIN_EQ_RE_EST_1 +918 0x0000 //TX_MICMUTE_MIN_EQ_RE_EST_2 +919 0x0000 //TX_MICMUTE_MIN_EQ_RE_EST_3 +920 0x0000 //TX_MICMUTE_MIN_EQ_RE_EST_4 +921 0x0000 //TX_MICMUTE_C_POST_FLT +922 0x0000 //TX_MICMUTE_DT_CUT_K +923 0x0000 //TX_MICMUTE_DT_CUT_THR +924 0x0000 //TX_MICMUTE_DT_CUT_K2 +925 0x0000 //TX_MICMUTE_DT_CUT_THR2 +926 0x0000 //TX_MICMUTE_DT2_HOLD_N +927 0x0000 //TX_MICMUTE_RATIODTH_THCUT +928 0x0000 //TX_MICMUTE_B_POST_FLT_ECHOL +929 0x0000 //TX_MICMUTE_B_POST_FLT_ECHOH +930 0x0000 //TX_MICMUTE_C_POST_FLT_MASK +931 0x0000 //TX_MICMUTE_RATIODTL_CUT_TH +932 0x0000 //TX_MICMUTE_DT_CUT_K1 +933 0x0000 //TX_MICMUTE_N2_SN_EST +934 0x0000 //TX_MICMUTE_THR_SN_EST_0 +935 0x0000 //TX_MICMUTE_MIN_G_CTRL_0 +936 0x0000 //TX_MICMUTE_A_POST_FILT_S_0 +937 0x0000 //TX_MICMUTE_B_POST_FILT_0 +938 0x0000 //TX_MIC1RUB_AMP_THR +939 0x0000 //TX_MIC1MUTE_RATIO_THR +940 0x0000 //TX_MIC1MUTE_AMP_THR +941 0x0000 //TX_MIC1MUTE_CVG_TIME +942 0x0000 //TX_MIC1MUTE_RELEASE_TIME +943 0x0000 //TX_AMS_RESRV_01 +944 0x0000 //TX_AMS_RESRV_02 +945 0x0000 //TX_AMS_RESRV_03 +946 0x0000 //TX_AMS_RESRV_04 +947 0x0000 //TX_AMS_RESRV_05 +948 0x0000 //TX_AMS_RESRV_06 +949 0x0000 //TX_AMS_RESRV_07 +950 0x0000 //TX_AMS_RESRV_08 +951 0x0000 //TX_AMS_RESRV_09 +952 0x0000 //TX_AMS_RESRV_10 +953 0x0000 //TX_AMS_RESRV_11 +954 0x0000 //TX_AMS_RESRV_12 +955 0x0000 //TX_AMS_RESRV_13 +956 0x0000 //TX_AMS_RESRV_14 +957 0x0000 //TX_AMS_RESRV_15 +958 0x0000 //TX_AMS_RESRV_16 +959 0x0000 //TX_AMS_RESRV_17 +960 0x0000 //TX_AMS_RESRV_18 +961 0x0000 //TX_AMS_RESRV_19 #RX -0 0x0064 //RX_RECVFUNC_MODE_0 +0 0x2064 //RX_RECVFUNC_MODE_0 1 0x0000 //RX_RECVFUNC_MODE_1 2 0x0003 //RX_SAMPLINGFREQ_SIG 3 0x0003 //RX_SAMPLINGFREQ_PROC @@ -7014,10 +9831,862 @@ 110 0x0000 //RX_FDDRC_RESRV_0 129 0x0100 //RX_SPK_VOL 130 0x0000 //RX_VOL_RESRV_0 +#RX 2 +157 0x2064 //RX_RECVFUNC_MODE_0 +158 0x0000 //RX_RECVFUNC_MODE_1 +159 0x0003 //RX_SAMPLINGFREQ_SIG +160 0x0003 //RX_SAMPLINGFREQ_PROC +161 0x000A //RX_FRAME_SZ +162 0x0000 //RX_DELAY_OPT +163 0x3000 //RX_TDDRC_ALPHA_UP_1 +164 0x3000 //RX_TDDRC_ALPHA_UP_2 +165 0x3000 //RX_TDDRC_ALPHA_UP_3 +166 0x3000 //RX_TDDRC_ALPHA_UP_4 +167 0x0800 //RX_PGA +168 0x7FFF //RX_A_HP +169 0x0000 //RX_B_PE +170 0x1800 //RX_THR_PITCH_DET_0 +171 0x1000 //RX_THR_PITCH_DET_1 +172 0x0800 //RX_THR_PITCH_DET_2 +173 0x0008 //RX_PITCH_BFR_LEN +174 0x0003 //RX_SBD_PITCH_DET +175 0x0100 //RX_PP_RESRV_0 +176 0x0020 //RX_PP_RESRV_1 +177 0x0400 //RX_N_SN_EST +178 0x000C //RX_N2_SN_EST +179 0x0003 //RX_NS_LVL_CTRL +180 0x9000 //RX_THR_SN_EST +181 0x7CCD //RX_LAMBDA_PFILT +182 0x000A //RX_FENS_RESRV_0 +183 0x0190 //RX_FENS_RESRV_1 +184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +187 0x0002 //RX_EXTRA_NS_L +188 0x0800 //RX_EXTRA_NS_A +189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +190 0x7FFF //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +192 0x199A //RX_A_POST_FLT +193 0x0000 //RX_LMT_THRD +194 0x4000 //RX_LMT_ALPHA +195 0x0020 //RX_FDEQ_SUBNUM +196 0x4848 //RX_FDEQ_GAIN_0 +197 0x4848 //RX_FDEQ_GAIN_1 +198 0x4848 //RX_FDEQ_GAIN_2 +199 0x4848 //RX_FDEQ_GAIN_3 +200 0x4848 //RX_FDEQ_GAIN_4 +201 0x4848 //RX_FDEQ_GAIN_5 +202 0x4848 //RX_FDEQ_GAIN_6 +203 0x4848 //RX_FDEQ_GAIN_7 +204 0x4848 //RX_FDEQ_GAIN_8 +205 0x4848 //RX_FDEQ_GAIN_9 +206 0x4848 //RX_FDEQ_GAIN_10 +207 0x4848 //RX_FDEQ_GAIN_11 +208 0x4848 //RX_FDEQ_GAIN_12 +209 0x4848 //RX_FDEQ_GAIN_13 +210 0x4848 //RX_FDEQ_GAIN_14 +211 0x4848 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0202 //RX_FDEQ_BIN_0 +221 0x0203 //RX_FDEQ_BIN_1 +222 0x0303 //RX_FDEQ_BIN_2 +223 0x0304 //RX_FDEQ_BIN_3 +224 0x0405 //RX_FDEQ_BIN_4 +225 0x0506 //RX_FDEQ_BIN_5 +226 0x0708 //RX_FDEQ_BIN_6 +227 0x090A //RX_FDEQ_BIN_7 +228 0x0B0C //RX_FDEQ_BIN_8 +229 0x0D0E //RX_FDEQ_BIN_9 +230 0x1013 //RX_FDEQ_BIN_10 +231 0x1719 //RX_FDEQ_BIN_11 +232 0x1B1E //RX_FDEQ_BIN_12 +233 0x1E1E //RX_FDEQ_BIN_13 +234 0x1E28 //RX_FDEQ_BIN_14 +235 0x282C //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x4000 //RX_FDEQ_RESRV_0 +245 0x0320 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0030 //RX_FDDRC_BAND_MARGIN_1 +248 0x0050 //RX_FDDRC_BAND_MARGIN_2 +249 0x0080 //RX_FDDRC_BAND_MARGIN_3 +250 0x0007 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x5000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x6400 //RX_FDDRC_THRD_3_2 +258 0x6400 //RX_FDDRC_THRD_3_3 +259 0x2000 //RX_FDDRC_SLANT_0_0 +260 0x2000 //RX_FDDRC_SLANT_0_1 +261 0x2000 //RX_FDDRC_SLANT_0_2 +262 0x2000 //RX_FDDRC_SLANT_0_3 +263 0x5333 //RX_FDDRC_SLANT_1_0 +264 0x5333 //RX_FDDRC_SLANT_1_1 +265 0x5333 //RX_FDDRC_SLANT_1_2 +266 0x5333 //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +268 0x0000 //RX_FILTINDX +269 0x0000 //RX_TDDRC_THRD_0 +270 0x0000 //RX_TDDRC_THRD_1 +271 0x7FFF //RX_TDDRC_THRD_2 +272 0x7FFF //RX_TDDRC_THRD_3 +273 0x7FFF //RX_TDDRC_SLANT_0 +274 0x7FFF //RX_TDDRC_SLANT_1 +275 0x3000 //RX_TDDRC_ALPHA_UP_0 +276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x199A //RX_TDDRC_HMNC_GAIN +279 0x0001 //RX_TDDRC_SMT_FLAG +280 0x0CCD //RX_TDDRC_SMT_W +281 0x0155 //RX_TDDRC_DRC_GAIN +282 0x7C00 //RX_LAMBDA_PKA_FP +283 0x2000 //RX_TPKA_FP +284 0x2000 //RX_MIN_G_FP +285 0x0080 //RX_MAX_G_FP +286 0x0100 //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 +288 0x0000 //RX_MAXLEVEL_CNG +289 0x3000 //RX_BWE_UV_TH +290 0x3000 //RX_BWE_UV_TH2 +291 0x1800 //RX_BWE_UV_TH3 +292 0x1000 //RX_BWE_V_TH +293 0x04CD //RX_BWE_GAIN1_V_TH1 +294 0x0F33 //RX_BWE_GAIN1_V_TH2 +295 0x7333 //RX_BWE_UV_EQ +296 0x199A //RX_BWE_V_EQ +297 0x7333 //RX_BWE_TONE_TH +298 0x0004 //RX_BWE_UV_HOLD_T +299 0x6CCD //RX_BWE_GAIN2_ALPHA +300 0x799A //RX_BWE_GAIN3_ALPHA +301 0x001E //RX_BWE_CUTOFF +302 0x3000 //RX_BWE_GAINFILL +303 0x3200 //RX_BWE_MAXTH_TONE +304 0x2000 //RX_BWE_EQ_0 +305 0x2000 //RX_BWE_EQ_1 +306 0x2000 //RX_BWE_EQ_2 +307 0x2000 //RX_BWE_EQ_3 +308 0x2000 //RX_BWE_EQ_4 +309 0x2000 //RX_BWE_EQ_5 +310 0x2000 //RX_BWE_EQ_6 +311 0x0000 //RX_BWE_RESRV_0 +312 0x0000 //RX_BWE_RESRV_1 +313 0x0000 //RX_BWE_RESRV_2 +#VOL 0 +163 0x3000 //RX_TDDRC_ALPHA_UP_1 +164 0x3000 //RX_TDDRC_ALPHA_UP_2 +165 0x3000 //RX_TDDRC_ALPHA_UP_3 +166 0x3000 //RX_TDDRC_ALPHA_UP_4 +184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +190 0x7FFF //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +269 0x0000 //RX_TDDRC_THRD_0 +270 0x0000 //RX_TDDRC_THRD_1 +271 0x7FFF //RX_TDDRC_THRD_2 +272 0x7FFF //RX_TDDRC_THRD_3 +273 0x7FFF //RX_TDDRC_SLANT_0 +274 0x7FFF //RX_TDDRC_SLANT_1 +275 0x3000 //RX_TDDRC_ALPHA_UP_0 +276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x199A //RX_TDDRC_HMNC_GAIN +279 0x0001 //RX_TDDRC_SMT_FLAG +280 0x0CCD //RX_TDDRC_SMT_W +281 0x0155 //RX_TDDRC_DRC_GAIN +195 0x0020 //RX_FDEQ_SUBNUM +196 0x4848 //RX_FDEQ_GAIN_0 +197 0x4848 //RX_FDEQ_GAIN_1 +198 0x4848 //RX_FDEQ_GAIN_2 +199 0x4848 //RX_FDEQ_GAIN_3 +200 0x4848 //RX_FDEQ_GAIN_4 +201 0x4848 //RX_FDEQ_GAIN_5 +202 0x4848 //RX_FDEQ_GAIN_6 +203 0x4848 //RX_FDEQ_GAIN_7 +204 0x4848 //RX_FDEQ_GAIN_8 +205 0x4848 //RX_FDEQ_GAIN_9 +206 0x4848 //RX_FDEQ_GAIN_10 +207 0x4848 //RX_FDEQ_GAIN_11 +208 0x4848 //RX_FDEQ_GAIN_12 +209 0x4848 //RX_FDEQ_GAIN_13 +210 0x4848 //RX_FDEQ_GAIN_14 +211 0x4848 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0202 //RX_FDEQ_BIN_0 +221 0x0203 //RX_FDEQ_BIN_1 +222 0x0303 //RX_FDEQ_BIN_2 +223 0x0304 //RX_FDEQ_BIN_3 +224 0x0405 //RX_FDEQ_BIN_4 +225 0x0506 //RX_FDEQ_BIN_5 +226 0x0708 //RX_FDEQ_BIN_6 +227 0x090A //RX_FDEQ_BIN_7 +228 0x0B0C //RX_FDEQ_BIN_8 +229 0x0D0E //RX_FDEQ_BIN_9 +230 0x1013 //RX_FDEQ_BIN_10 +231 0x1719 //RX_FDEQ_BIN_11 +232 0x1B1E //RX_FDEQ_BIN_12 +233 0x1E1E //RX_FDEQ_BIN_13 +234 0x1E28 //RX_FDEQ_BIN_14 +235 0x282C //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x4000 //RX_FDEQ_RESRV_0 +245 0x0320 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0030 //RX_FDDRC_BAND_MARGIN_1 +248 0x0050 //RX_FDDRC_BAND_MARGIN_2 +249 0x0080 //RX_FDDRC_BAND_MARGIN_3 +250 0x0007 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x5000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x6400 //RX_FDDRC_THRD_3_2 +258 0x6400 //RX_FDDRC_THRD_3_3 +259 0x2000 //RX_FDDRC_SLANT_0_0 +260 0x2000 //RX_FDDRC_SLANT_0_1 +261 0x2000 //RX_FDDRC_SLANT_0_2 +262 0x2000 //RX_FDDRC_SLANT_0_3 +263 0x5333 //RX_FDDRC_SLANT_1_0 +264 0x5333 //RX_FDDRC_SLANT_1_1 +265 0x5333 //RX_FDDRC_SLANT_1_2 +266 0x5333 //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +286 0x0100 //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 +#VOL 1 +163 0x3000 //RX_TDDRC_ALPHA_UP_1 +164 0x3000 //RX_TDDRC_ALPHA_UP_2 +165 0x3000 //RX_TDDRC_ALPHA_UP_3 +166 0x3000 //RX_TDDRC_ALPHA_UP_4 +184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +190 0x7FFF //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +269 0x0000 //RX_TDDRC_THRD_0 +270 0x0000 //RX_TDDRC_THRD_1 +271 0x7FFF //RX_TDDRC_THRD_2 +272 0x7FFF //RX_TDDRC_THRD_3 +273 0x7FFF //RX_TDDRC_SLANT_0 +274 0x7FFF //RX_TDDRC_SLANT_1 +275 0x3000 //RX_TDDRC_ALPHA_UP_0 +276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x199A //RX_TDDRC_HMNC_GAIN +279 0x0001 //RX_TDDRC_SMT_FLAG +280 0x0CCD //RX_TDDRC_SMT_W +281 0x0155 //RX_TDDRC_DRC_GAIN +195 0x0020 //RX_FDEQ_SUBNUM +196 0x4848 //RX_FDEQ_GAIN_0 +197 0x4848 //RX_FDEQ_GAIN_1 +198 0x4848 //RX_FDEQ_GAIN_2 +199 0x4848 //RX_FDEQ_GAIN_3 +200 0x4848 //RX_FDEQ_GAIN_4 +201 0x4848 //RX_FDEQ_GAIN_5 +202 0x4848 //RX_FDEQ_GAIN_6 +203 0x4848 //RX_FDEQ_GAIN_7 +204 0x4848 //RX_FDEQ_GAIN_8 +205 0x4848 //RX_FDEQ_GAIN_9 +206 0x4848 //RX_FDEQ_GAIN_10 +207 0x4848 //RX_FDEQ_GAIN_11 +208 0x4848 //RX_FDEQ_GAIN_12 +209 0x4848 //RX_FDEQ_GAIN_13 +210 0x4848 //RX_FDEQ_GAIN_14 +211 0x4848 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0202 //RX_FDEQ_BIN_0 +221 0x0203 //RX_FDEQ_BIN_1 +222 0x0303 //RX_FDEQ_BIN_2 +223 0x0304 //RX_FDEQ_BIN_3 +224 0x0405 //RX_FDEQ_BIN_4 +225 0x0506 //RX_FDEQ_BIN_5 +226 0x0708 //RX_FDEQ_BIN_6 +227 0x090A //RX_FDEQ_BIN_7 +228 0x0B0C //RX_FDEQ_BIN_8 +229 0x0D0E //RX_FDEQ_BIN_9 +230 0x1013 //RX_FDEQ_BIN_10 +231 0x1719 //RX_FDEQ_BIN_11 +232 0x1B1E //RX_FDEQ_BIN_12 +233 0x1E1E //RX_FDEQ_BIN_13 +234 0x1E28 //RX_FDEQ_BIN_14 +235 0x282C //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x4000 //RX_FDEQ_RESRV_0 +245 0x0320 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0030 //RX_FDDRC_BAND_MARGIN_1 +248 0x0050 //RX_FDDRC_BAND_MARGIN_2 +249 0x0080 //RX_FDDRC_BAND_MARGIN_3 +250 0x0007 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x5000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x6400 //RX_FDDRC_THRD_3_2 +258 0x6400 //RX_FDDRC_THRD_3_3 +259 0x2000 //RX_FDDRC_SLANT_0_0 +260 0x2000 //RX_FDDRC_SLANT_0_1 +261 0x2000 //RX_FDDRC_SLANT_0_2 +262 0x2000 //RX_FDDRC_SLANT_0_3 +263 0x5333 //RX_FDDRC_SLANT_1_0 +264 0x5333 //RX_FDDRC_SLANT_1_1 +265 0x5333 //RX_FDDRC_SLANT_1_2 +266 0x5333 //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +286 0x0100 //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 +#VOL 2 +163 0x3000 //RX_TDDRC_ALPHA_UP_1 +164 0x3000 //RX_TDDRC_ALPHA_UP_2 +165 0x3000 //RX_TDDRC_ALPHA_UP_3 +166 0x3000 //RX_TDDRC_ALPHA_UP_4 +184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +190 0x7FFF //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +269 0x0000 //RX_TDDRC_THRD_0 +270 0x0000 //RX_TDDRC_THRD_1 +271 0x7FFF //RX_TDDRC_THRD_2 +272 0x7FFF //RX_TDDRC_THRD_3 +273 0x7FFF //RX_TDDRC_SLANT_0 +274 0x7FFF //RX_TDDRC_SLANT_1 +275 0x3000 //RX_TDDRC_ALPHA_UP_0 +276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x199A //RX_TDDRC_HMNC_GAIN +279 0x0001 //RX_TDDRC_SMT_FLAG +280 0x0CCD //RX_TDDRC_SMT_W +281 0x0155 //RX_TDDRC_DRC_GAIN +195 0x0020 //RX_FDEQ_SUBNUM +196 0x4848 //RX_FDEQ_GAIN_0 +197 0x4848 //RX_FDEQ_GAIN_1 +198 0x4848 //RX_FDEQ_GAIN_2 +199 0x4848 //RX_FDEQ_GAIN_3 +200 0x4848 //RX_FDEQ_GAIN_4 +201 0x4848 //RX_FDEQ_GAIN_5 +202 0x4848 //RX_FDEQ_GAIN_6 +203 0x4848 //RX_FDEQ_GAIN_7 +204 0x4848 //RX_FDEQ_GAIN_8 +205 0x4848 //RX_FDEQ_GAIN_9 +206 0x4848 //RX_FDEQ_GAIN_10 +207 0x4848 //RX_FDEQ_GAIN_11 +208 0x4848 //RX_FDEQ_GAIN_12 +209 0x4848 //RX_FDEQ_GAIN_13 +210 0x4848 //RX_FDEQ_GAIN_14 +211 0x4848 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0202 //RX_FDEQ_BIN_0 +221 0x0203 //RX_FDEQ_BIN_1 +222 0x0303 //RX_FDEQ_BIN_2 +223 0x0304 //RX_FDEQ_BIN_3 +224 0x0405 //RX_FDEQ_BIN_4 +225 0x0506 //RX_FDEQ_BIN_5 +226 0x0708 //RX_FDEQ_BIN_6 +227 0x090A //RX_FDEQ_BIN_7 +228 0x0B0C //RX_FDEQ_BIN_8 +229 0x0D0E //RX_FDEQ_BIN_9 +230 0x1013 //RX_FDEQ_BIN_10 +231 0x1719 //RX_FDEQ_BIN_11 +232 0x1B1E //RX_FDEQ_BIN_12 +233 0x1E1E //RX_FDEQ_BIN_13 +234 0x1E28 //RX_FDEQ_BIN_14 +235 0x282C //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x4000 //RX_FDEQ_RESRV_0 +245 0x0320 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0030 //RX_FDDRC_BAND_MARGIN_1 +248 0x0050 //RX_FDDRC_BAND_MARGIN_2 +249 0x0080 //RX_FDDRC_BAND_MARGIN_3 +250 0x0007 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x5000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x6400 //RX_FDDRC_THRD_3_2 +258 0x6400 //RX_FDDRC_THRD_3_3 +259 0x2000 //RX_FDDRC_SLANT_0_0 +260 0x2000 //RX_FDDRC_SLANT_0_1 +261 0x2000 //RX_FDDRC_SLANT_0_2 +262 0x2000 //RX_FDDRC_SLANT_0_3 +263 0x5333 //RX_FDDRC_SLANT_1_0 +264 0x5333 //RX_FDDRC_SLANT_1_1 +265 0x5333 //RX_FDDRC_SLANT_1_2 +266 0x5333 //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +286 0x0100 //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 +#VOL 3 +163 0x3000 //RX_TDDRC_ALPHA_UP_1 +164 0x3000 //RX_TDDRC_ALPHA_UP_2 +165 0x3000 //RX_TDDRC_ALPHA_UP_3 +166 0x3000 //RX_TDDRC_ALPHA_UP_4 +184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +190 0x7FFF //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +269 0x0000 //RX_TDDRC_THRD_0 +270 0x0000 //RX_TDDRC_THRD_1 +271 0x7FFF //RX_TDDRC_THRD_2 +272 0x7FFF //RX_TDDRC_THRD_3 +273 0x7FFF //RX_TDDRC_SLANT_0 +274 0x7FFF //RX_TDDRC_SLANT_1 +275 0x3000 //RX_TDDRC_ALPHA_UP_0 +276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x199A //RX_TDDRC_HMNC_GAIN +279 0x0001 //RX_TDDRC_SMT_FLAG +280 0x0CCD //RX_TDDRC_SMT_W +281 0x0155 //RX_TDDRC_DRC_GAIN +195 0x0020 //RX_FDEQ_SUBNUM +196 0x4848 //RX_FDEQ_GAIN_0 +197 0x4848 //RX_FDEQ_GAIN_1 +198 0x4848 //RX_FDEQ_GAIN_2 +199 0x4848 //RX_FDEQ_GAIN_3 +200 0x4848 //RX_FDEQ_GAIN_4 +201 0x4848 //RX_FDEQ_GAIN_5 +202 0x4848 //RX_FDEQ_GAIN_6 +203 0x4848 //RX_FDEQ_GAIN_7 +204 0x4848 //RX_FDEQ_GAIN_8 +205 0x4848 //RX_FDEQ_GAIN_9 +206 0x4848 //RX_FDEQ_GAIN_10 +207 0x4848 //RX_FDEQ_GAIN_11 +208 0x4848 //RX_FDEQ_GAIN_12 +209 0x4848 //RX_FDEQ_GAIN_13 +210 0x4848 //RX_FDEQ_GAIN_14 +211 0x4848 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0202 //RX_FDEQ_BIN_0 +221 0x0203 //RX_FDEQ_BIN_1 +222 0x0303 //RX_FDEQ_BIN_2 +223 0x0304 //RX_FDEQ_BIN_3 +224 0x0405 //RX_FDEQ_BIN_4 +225 0x0506 //RX_FDEQ_BIN_5 +226 0x0708 //RX_FDEQ_BIN_6 +227 0x090A //RX_FDEQ_BIN_7 +228 0x0B0C //RX_FDEQ_BIN_8 +229 0x0D0E //RX_FDEQ_BIN_9 +230 0x1013 //RX_FDEQ_BIN_10 +231 0x1719 //RX_FDEQ_BIN_11 +232 0x1B1E //RX_FDEQ_BIN_12 +233 0x1E1E //RX_FDEQ_BIN_13 +234 0x1E28 //RX_FDEQ_BIN_14 +235 0x282C //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x4000 //RX_FDEQ_RESRV_0 +245 0x0320 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0030 //RX_FDDRC_BAND_MARGIN_1 +248 0x0050 //RX_FDDRC_BAND_MARGIN_2 +249 0x0080 //RX_FDDRC_BAND_MARGIN_3 +250 0x0007 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x5000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x6400 //RX_FDDRC_THRD_3_2 +258 0x6400 //RX_FDDRC_THRD_3_3 +259 0x2000 //RX_FDDRC_SLANT_0_0 +260 0x2000 //RX_FDDRC_SLANT_0_1 +261 0x2000 //RX_FDDRC_SLANT_0_2 +262 0x2000 //RX_FDDRC_SLANT_0_3 +263 0x5333 //RX_FDDRC_SLANT_1_0 +264 0x5333 //RX_FDDRC_SLANT_1_1 +265 0x5333 //RX_FDDRC_SLANT_1_2 +266 0x5333 //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +286 0x0100 //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 +#VOL 4 +163 0x3000 //RX_TDDRC_ALPHA_UP_1 +164 0x3000 //RX_TDDRC_ALPHA_UP_2 +165 0x3000 //RX_TDDRC_ALPHA_UP_3 +166 0x3000 //RX_TDDRC_ALPHA_UP_4 +184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +190 0x7FFF //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +269 0x0000 //RX_TDDRC_THRD_0 +270 0x0000 //RX_TDDRC_THRD_1 +271 0x7FFF //RX_TDDRC_THRD_2 +272 0x7FFF //RX_TDDRC_THRD_3 +273 0x7FFF //RX_TDDRC_SLANT_0 +274 0x7FFF //RX_TDDRC_SLANT_1 +275 0x3000 //RX_TDDRC_ALPHA_UP_0 +276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x199A //RX_TDDRC_HMNC_GAIN +279 0x0001 //RX_TDDRC_SMT_FLAG +280 0x0CCD //RX_TDDRC_SMT_W +281 0x0155 //RX_TDDRC_DRC_GAIN +195 0x0020 //RX_FDEQ_SUBNUM +196 0x4848 //RX_FDEQ_GAIN_0 +197 0x4848 //RX_FDEQ_GAIN_1 +198 0x4848 //RX_FDEQ_GAIN_2 +199 0x4848 //RX_FDEQ_GAIN_3 +200 0x4848 //RX_FDEQ_GAIN_4 +201 0x4848 //RX_FDEQ_GAIN_5 +202 0x4848 //RX_FDEQ_GAIN_6 +203 0x4848 //RX_FDEQ_GAIN_7 +204 0x4848 //RX_FDEQ_GAIN_8 +205 0x4848 //RX_FDEQ_GAIN_9 +206 0x4848 //RX_FDEQ_GAIN_10 +207 0x4848 //RX_FDEQ_GAIN_11 +208 0x4848 //RX_FDEQ_GAIN_12 +209 0x4848 //RX_FDEQ_GAIN_13 +210 0x4848 //RX_FDEQ_GAIN_14 +211 0x4848 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0202 //RX_FDEQ_BIN_0 +221 0x0203 //RX_FDEQ_BIN_1 +222 0x0303 //RX_FDEQ_BIN_2 +223 0x0304 //RX_FDEQ_BIN_3 +224 0x0405 //RX_FDEQ_BIN_4 +225 0x0506 //RX_FDEQ_BIN_5 +226 0x0708 //RX_FDEQ_BIN_6 +227 0x090A //RX_FDEQ_BIN_7 +228 0x0B0C //RX_FDEQ_BIN_8 +229 0x0D0E //RX_FDEQ_BIN_9 +230 0x1013 //RX_FDEQ_BIN_10 +231 0x1719 //RX_FDEQ_BIN_11 +232 0x1B1E //RX_FDEQ_BIN_12 +233 0x1E1E //RX_FDEQ_BIN_13 +234 0x1E28 //RX_FDEQ_BIN_14 +235 0x282C //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x4000 //RX_FDEQ_RESRV_0 +245 0x0320 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0030 //RX_FDDRC_BAND_MARGIN_1 +248 0x0050 //RX_FDDRC_BAND_MARGIN_2 +249 0x0080 //RX_FDDRC_BAND_MARGIN_3 +250 0x0007 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x5000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x6400 //RX_FDDRC_THRD_3_2 +258 0x6400 //RX_FDDRC_THRD_3_3 +259 0x2000 //RX_FDDRC_SLANT_0_0 +260 0x2000 //RX_FDDRC_SLANT_0_1 +261 0x2000 //RX_FDDRC_SLANT_0_2 +262 0x2000 //RX_FDDRC_SLANT_0_3 +263 0x5333 //RX_FDDRC_SLANT_1_0 +264 0x5333 //RX_FDDRC_SLANT_1_1 +265 0x5333 //RX_FDDRC_SLANT_1_2 +266 0x5333 //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +286 0x0100 //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 +#VOL 5 +163 0x3000 //RX_TDDRC_ALPHA_UP_1 +164 0x3000 //RX_TDDRC_ALPHA_UP_2 +165 0x3000 //RX_TDDRC_ALPHA_UP_3 +166 0x3000 //RX_TDDRC_ALPHA_UP_4 +184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +190 0x7FFF //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +269 0x0000 //RX_TDDRC_THRD_0 +270 0x0000 //RX_TDDRC_THRD_1 +271 0x7FFF //RX_TDDRC_THRD_2 +272 0x7FFF //RX_TDDRC_THRD_3 +273 0x7FFF //RX_TDDRC_SLANT_0 +274 0x7FFF //RX_TDDRC_SLANT_1 +275 0x3000 //RX_TDDRC_ALPHA_UP_0 +276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x199A //RX_TDDRC_HMNC_GAIN +279 0x0001 //RX_TDDRC_SMT_FLAG +280 0x0CCD //RX_TDDRC_SMT_W +281 0x0155 //RX_TDDRC_DRC_GAIN +195 0x0020 //RX_FDEQ_SUBNUM +196 0x4848 //RX_FDEQ_GAIN_0 +197 0x4848 //RX_FDEQ_GAIN_1 +198 0x4848 //RX_FDEQ_GAIN_2 +199 0x4848 //RX_FDEQ_GAIN_3 +200 0x4848 //RX_FDEQ_GAIN_4 +201 0x4848 //RX_FDEQ_GAIN_5 +202 0x4848 //RX_FDEQ_GAIN_6 +203 0x4848 //RX_FDEQ_GAIN_7 +204 0x4848 //RX_FDEQ_GAIN_8 +205 0x4848 //RX_FDEQ_GAIN_9 +206 0x4848 //RX_FDEQ_GAIN_10 +207 0x4848 //RX_FDEQ_GAIN_11 +208 0x4848 //RX_FDEQ_GAIN_12 +209 0x4848 //RX_FDEQ_GAIN_13 +210 0x4848 //RX_FDEQ_GAIN_14 +211 0x4848 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0202 //RX_FDEQ_BIN_0 +221 0x0203 //RX_FDEQ_BIN_1 +222 0x0303 //RX_FDEQ_BIN_2 +223 0x0304 //RX_FDEQ_BIN_3 +224 0x0405 //RX_FDEQ_BIN_4 +225 0x0506 //RX_FDEQ_BIN_5 +226 0x0708 //RX_FDEQ_BIN_6 +227 0x090A //RX_FDEQ_BIN_7 +228 0x0B0C //RX_FDEQ_BIN_8 +229 0x0D0E //RX_FDEQ_BIN_9 +230 0x1013 //RX_FDEQ_BIN_10 +231 0x1719 //RX_FDEQ_BIN_11 +232 0x1B1E //RX_FDEQ_BIN_12 +233 0x1E1E //RX_FDEQ_BIN_13 +234 0x1E28 //RX_FDEQ_BIN_14 +235 0x282C //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x4000 //RX_FDEQ_RESRV_0 +245 0x0320 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0030 //RX_FDDRC_BAND_MARGIN_1 +248 0x0050 //RX_FDDRC_BAND_MARGIN_2 +249 0x0080 //RX_FDDRC_BAND_MARGIN_3 +250 0x0007 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x5000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x6400 //RX_FDDRC_THRD_3_2 +258 0x6400 //RX_FDDRC_THRD_3_3 +259 0x2000 //RX_FDDRC_SLANT_0_0 +260 0x2000 //RX_FDDRC_SLANT_0_1 +261 0x2000 //RX_FDDRC_SLANT_0_2 +262 0x2000 //RX_FDDRC_SLANT_0_3 +263 0x5333 //RX_FDDRC_SLANT_1_0 +264 0x5333 //RX_FDDRC_SLANT_1_1 +265 0x5333 //RX_FDDRC_SLANT_1_2 +266 0x5333 //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +286 0x0100 //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 +#VOL 6 +163 0x3000 //RX_TDDRC_ALPHA_UP_1 +164 0x3000 //RX_TDDRC_ALPHA_UP_2 +165 0x3000 //RX_TDDRC_ALPHA_UP_3 +166 0x3000 //RX_TDDRC_ALPHA_UP_4 +184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +190 0x7FFF //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +269 0x0000 //RX_TDDRC_THRD_0 +270 0x0000 //RX_TDDRC_THRD_1 +271 0x7FFF //RX_TDDRC_THRD_2 +272 0x7FFF //RX_TDDRC_THRD_3 +273 0x7FFF //RX_TDDRC_SLANT_0 +274 0x7FFF //RX_TDDRC_SLANT_1 +275 0x3000 //RX_TDDRC_ALPHA_UP_0 +276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x199A //RX_TDDRC_HMNC_GAIN +279 0x0001 //RX_TDDRC_SMT_FLAG +280 0x0CCD //RX_TDDRC_SMT_W +281 0x0155 //RX_TDDRC_DRC_GAIN +195 0x0020 //RX_FDEQ_SUBNUM +196 0x4848 //RX_FDEQ_GAIN_0 +197 0x4848 //RX_FDEQ_GAIN_1 +198 0x4848 //RX_FDEQ_GAIN_2 +199 0x4848 //RX_FDEQ_GAIN_3 +200 0x4848 //RX_FDEQ_GAIN_4 +201 0x4848 //RX_FDEQ_GAIN_5 +202 0x4848 //RX_FDEQ_GAIN_6 +203 0x4848 //RX_FDEQ_GAIN_7 +204 0x4848 //RX_FDEQ_GAIN_8 +205 0x4848 //RX_FDEQ_GAIN_9 +206 0x4848 //RX_FDEQ_GAIN_10 +207 0x4848 //RX_FDEQ_GAIN_11 +208 0x4848 //RX_FDEQ_GAIN_12 +209 0x4848 //RX_FDEQ_GAIN_13 +210 0x4848 //RX_FDEQ_GAIN_14 +211 0x4848 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0202 //RX_FDEQ_BIN_0 +221 0x0203 //RX_FDEQ_BIN_1 +222 0x0303 //RX_FDEQ_BIN_2 +223 0x0304 //RX_FDEQ_BIN_3 +224 0x0405 //RX_FDEQ_BIN_4 +225 0x0506 //RX_FDEQ_BIN_5 +226 0x0708 //RX_FDEQ_BIN_6 +227 0x090A //RX_FDEQ_BIN_7 +228 0x0B0C //RX_FDEQ_BIN_8 +229 0x0D0E //RX_FDEQ_BIN_9 +230 0x1013 //RX_FDEQ_BIN_10 +231 0x1719 //RX_FDEQ_BIN_11 +232 0x1B1E //RX_FDEQ_BIN_12 +233 0x1E1E //RX_FDEQ_BIN_13 +234 0x1E28 //RX_FDEQ_BIN_14 +235 0x282C //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x4000 //RX_FDEQ_RESRV_0 +245 0x0320 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0030 //RX_FDDRC_BAND_MARGIN_1 +248 0x0050 //RX_FDDRC_BAND_MARGIN_2 +249 0x0080 //RX_FDDRC_BAND_MARGIN_3 +250 0x0007 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x5000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x6400 //RX_FDDRC_THRD_3_2 +258 0x6400 //RX_FDDRC_THRD_3_3 +259 0x2000 //RX_FDDRC_SLANT_0_0 +260 0x2000 //RX_FDDRC_SLANT_0_1 +261 0x2000 //RX_FDDRC_SLANT_0_2 +262 0x2000 //RX_FDDRC_SLANT_0_3 +263 0x5333 //RX_FDDRC_SLANT_1_0 +264 0x5333 //RX_FDDRC_SLANT_1_1 +265 0x5333 //RX_FDDRC_SLANT_1_2 +266 0x5333 //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +286 0x0100 //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 #CASE_NAME BLUETOOTH-BT_HAC-VOICE_GENERIC-FB -#PARAM_TYPE TX+RX -#TOTAL_CUSTOM_STEP 7 +#PARAM_MODE Full +#PARAM_TYPE TX+2RX +#TOTAL_CUSTOM_STEP 7+7 #TX 0 0x0001 //TX_OPERATION_MODE_0 1 0x0001 //TX_OPERATION_MODE_1 @@ -7270,11 +10939,11 @@ 248 0xF800 //TX_THR_SN_EST_6 249 0xF800 //TX_THR_SN_EST_7 250 0x0100 //TX_DELTA_THR_SN_EST_0 -251 0x0200 //TX_DELTA_THR_SN_EST_1 -252 0x0100 //TX_DELTA_THR_SN_EST_2 -253 0x0200 //TX_DELTA_THR_SN_EST_3 +251 0x0100 //TX_DELTA_THR_SN_EST_1 +252 0x0200 //TX_DELTA_THR_SN_EST_2 +253 0x0100 //TX_DELTA_THR_SN_EST_3 254 0x0100 //TX_DELTA_THR_SN_EST_4 -255 0x0100 //TX_DELTA_THR_SN_EST_5 +255 0x0200 //TX_DELTA_THR_SN_EST_5 256 0x0200 //TX_DELTA_THR_SN_EST_6 257 0x0200 //TX_DELTA_THR_SN_EST_7 258 0x4000 //TX_LAMBDA_NN_EST_0 @@ -7302,11 +10971,11 @@ 280 0x1000 //TX_B_POST_FLT_1 281 0x0010 //TX_NS_LVL_CTRL_0 282 0x0014 //TX_NS_LVL_CTRL_1 -283 0x0014 //TX_NS_LVL_CTRL_2 -284 0x0018 //TX_NS_LVL_CTRL_3 -285 0x0016 //TX_NS_LVL_CTRL_4 -286 0x0014 //TX_NS_LVL_CTRL_5 -287 0x0011 //TX_NS_LVL_CTRL_6 +283 0x0018 //TX_NS_LVL_CTRL_2 +284 0x0016 //TX_NS_LVL_CTRL_3 +285 0x0014 //TX_NS_LVL_CTRL_4 +286 0x0011 //TX_NS_LVL_CTRL_5 +287 0x0014 //TX_NS_LVL_CTRL_6 288 0x0011 //TX_NS_LVL_CTRL_7 289 0x000F //TX_MIN_GAIN_S_0 290 0x0010 //TX_MIN_GAIN_S_1 @@ -7324,8 +10993,8 @@ 302 0x4000 //TX_SNRI_SUP_2 303 0x4000 //TX_SNRI_SUP_3 304 0x4000 //TX_SNRI_SUP_4 -305 0x4000 //TX_SNRI_SUP_5 -306 0x50C0 //TX_SNRI_SUP_6 +305 0x50C0 //TX_SNRI_SUP_5 +306 0x4000 //TX_SNRI_SUP_6 307 0x7FFF //TX_SNRI_SUP_7 308 0x7FFF //TX_THR_LFNS 309 0x0018 //TX_G_LFNS @@ -7334,19 +11003,19 @@ 312 0x7FFF //TX_A_POST_FILT_0 313 0x2000 //TX_A_POST_FILT_1 314 0x5000 //TX_A_POST_FILT_S_0 -315 0x6000 //TX_A_POST_FILT_S_1 -316 0x4C00 //TX_A_POST_FILT_S_2 -317 0x4000 //TX_A_POST_FILT_S_3 -318 0x6000 //TX_A_POST_FILT_S_4 -319 0x4000 //TX_A_POST_FILT_S_5 -320 0x5000 //TX_A_POST_FILT_S_6 +315 0x4C00 //TX_A_POST_FILT_S_1 +316 0x4000 //TX_A_POST_FILT_S_2 +317 0x6000 //TX_A_POST_FILT_S_3 +318 0x4000 //TX_A_POST_FILT_S_4 +319 0x5000 //TX_A_POST_FILT_S_5 +320 0x6000 //TX_A_POST_FILT_S_6 321 0x7000 //TX_A_POST_FILT_S_7 322 0x2000 //TX_B_POST_FILT_0 -323 0x1000 //TX_B_POST_FILT_1 +323 0x2000 //TX_B_POST_FILT_1 324 0x2000 //TX_B_POST_FILT_2 -325 0x2000 //TX_B_POST_FILT_3 +325 0x4000 //TX_B_POST_FILT_3 326 0x4000 //TX_B_POST_FILT_4 -327 0x4000 //TX_B_POST_FILT_5 +327 0x1000 //TX_B_POST_FILT_5 328 0x1000 //TX_B_POST_FILT_6 329 0x2000 //TX_B_POST_FILT_7 330 0x4000 //TX_B_LESSCUT_RTO_S_0 @@ -7354,14 +11023,14 @@ 332 0x7FFF //TX_B_LESSCUT_RTO_S_2 333 0x7FFF //TX_B_LESSCUT_RTO_S_3 334 0x7FFF //TX_B_LESSCUT_RTO_S_4 -335 0x7FFF //TX_B_LESSCUT_RTO_S_5 -336 0x6000 //TX_B_LESSCUT_RTO_S_6 +335 0x6000 //TX_B_LESSCUT_RTO_S_5 +336 0x7FFF //TX_B_LESSCUT_RTO_S_6 337 0x7FFF //TX_B_LESSCUT_RTO_S_7 338 0x7C00 //TX_LAMBDA_PFILT 339 0x7C00 //TX_LAMBDA_PFILT_S_0 340 0x7C00 //TX_LAMBDA_PFILT_S_1 -341 0x7C00 //TX_LAMBDA_PFILT_S_2 -342 0x7A00 //TX_LAMBDA_PFILT_S_3 +341 0x7A00 //TX_LAMBDA_PFILT_S_2 +342 0x7C00 //TX_LAMBDA_PFILT_S_3 343 0x7C00 //TX_LAMBDA_PFILT_S_4 344 0x7C00 //TX_LAMBDA_PFILT_S_5 345 0x7C00 //TX_LAMBDA_PFILT_S_6 @@ -7399,10 +11068,10 @@ 377 0x7FFF //TX_NOISE_TH_5_4 378 0x2710 //TX_NOISE_TH_6 379 0x0033 //TX_MINENOISE_TH -380 0x4000 //TX_MINENOISE_MIC0_TH_MTS -381 0xFFEE //TX_MINENOISE_MIC0_TH_EXP -382 0x6000 //TX_MINENOISE_MIC0_S_TH_MTS -383 0xFFF3 //TX_MINENOISE_MIC0_S_TH_EXP +380 0x4000 //TX_MORENS_TFMASK_TH +381 0xFFEE //TX_DRC_QUIET_FLOOR +382 0x6000 //TX_RATIODTL_CUT_TH +383 0xFFF3 //TX_DT_CUT_K1 384 0x0666 //TX_OUT_ENER_S_TH_CLEAN 385 0x0666 //TX_OUT_ENER_S_TH_LESSCLEAN 386 0x0333 //TX_OUT_ENER_S_TH_NOISY @@ -7410,15 +11079,15 @@ 388 0x0333 //TX_OUT_ENER_TH_SPEECH 389 0x2000 //TX_SN_NPB_GAIN 390 0x0000 //TX_NN_NPB_GAIN -391 0x0000 //TX_CSX_ALPHA_0 -392 0x0000 //TX_CSX_ALPHA_1 -393 0x0000 //TX_CSX_ALPHA_2 -394 0x0000 //TX_CSX_ALPHA_3 -395 0x0800 //TX_MU_ARSP_EST -396 0x00C8 //TX_P_OUTBEAM_MIN_TH +391 0x0000 //TX_POST_MASK_SUP_HSNE +392 0x0000 //TX_TAIL_DET_TH +393 0x0000 //TX_B_LESSCUT_RTO_WTA +394 0x0000 //TX_MEL_G_R +395 0x0800 //TX_SUPHIGH_TH +396 0x00C8 //TX_MASK_G_R 397 0x0002 //TX_EXTRA_NS_L -398 0x0800 //TX_EXTRA_NS_A -399 0x0005 //TX_VR_NOISE_FLOOR_TH +398 0x0800 //TX_C_POST_FLT_MASK +399 0x0005 //TX_A_POST_FLT_WNS 400 0x0148 //TX_MIN_G_LOW300HZ 401 0x0002 //TX_MAXLEVEL_CNG 402 0x00B4 //TX_STN_NOISE_TH @@ -7533,16 +11202,16 @@ 511 0x6666 //TX_MIC_TO_BFGAIN 512 0x0000 //TX_MICTOBFGAIN0 513 0x0000 //TX_FASTMUE_TH -514 0x0000 //TX_DERVB_LEN_0 -515 0x0000 //TX_DERVB_LEN_1 -516 0x0000 //TX_RHO_DERVB -517 0x0000 //TX_MIC_INDX_DERVB -518 0x0000 //TX_MU_DERVB -519 0x0000 //TX_DR_RESRV_0 -520 0x0000 //TX_DR_RESRV_1 -521 0x0000 //TX_DR_RESRV_2 -522 0x0000 //TX_DR_RESRV_3 -523 0x0000 //TX_DR_RESRV_4 +514 0x0000 //TX_DEREVERB_LF_MU +515 0x0000 //TX_DEREVERB_HF_MU +516 0x0000 //TX_DEREVERB_DELAY +517 0x0000 //TX_DEREVERB_COEF_LEN +518 0x0000 //TX_DEREVERB_DNR +519 0x0000 //TX_DEREVERB_ALPHA +520 0x0000 //TX_DEREVERB_BETA +521 0x0000 //TX_GSC_RTOL_TH +522 0x0000 //TX_GSC_RTOH_TH +523 0x0000 //TX_WIDE2_MEANHTH 524 0x0000 //TX_DR_RESRV_5 525 0x0000 //TX_DR_RESRV_6 526 0x0000 //TX_DR_RESRV_7 @@ -7916,6 +11585,71 @@ 894 0xC000 //TX_FASTNS_SSA_THHFL 895 0xCCCC //TX_FASTNS_SSA_THLFH 896 0xD999 //TX_FASTNS_SSA_THHFH +897 0x0000 //TX_SENDFUNC_REG_MICMUTE +898 0x0000 //TX_SENDFUNC_REG_MICMUTE1 +899 0x0000 //TX_MICMUTE_RATIO_THR +900 0x0000 //TX_MICMUTE_AMP_THR +901 0x0000 //TX_MICMUTE_HPF_IND +902 0x0000 //TX_MICMUTE_LOG_EYR_TH +903 0x0000 //TX_MICMUTE_CVG_TIME +904 0x0000 //TX_MICMUTE_RELEASE_TIME +905 0x0000 //TX_MIC_VOLUME_MIC0MUTE +906 0x0000 //TX_MICMUTE_EPD_OFFSET_0 +907 0x0000 //TX_MICMUTE_FRQ_AEC_L +908 0x0000 //TX_MICMUTE_EAD_THR +909 0x0000 //TX_MICMUTE_LAMBDA_CB_NLE +910 0x0000 //TX_MICMUTE_LAMBDA_RE_EST +911 0x0000 //TX_DTD_THR1_MICMUTE_0 +912 0x0000 //TX_DTD_THR1_MICMUTE_1 +913 0x0000 //TX_DTD_THR1_MICMUTE_2 +914 0x0000 //TX_DTD_THR1_MICMUTE_3 +915 0x0000 //TX_DTD_THR2_MICMUTE_0 +916 0x0000 //TX_MICMUTE_MIN_EQ_RE_EST_0 +917 0x0000 //TX_MICMUTE_MIN_EQ_RE_EST_1 +918 0x0000 //TX_MICMUTE_MIN_EQ_RE_EST_2 +919 0x0000 //TX_MICMUTE_MIN_EQ_RE_EST_3 +920 0x0000 //TX_MICMUTE_MIN_EQ_RE_EST_4 +921 0x0000 //TX_MICMUTE_C_POST_FLT +922 0x0000 //TX_MICMUTE_DT_CUT_K +923 0x0000 //TX_MICMUTE_DT_CUT_THR +924 0x0000 //TX_MICMUTE_DT_CUT_K2 +925 0x0000 //TX_MICMUTE_DT_CUT_THR2 +926 0x0000 //TX_MICMUTE_DT2_HOLD_N +927 0x0000 //TX_MICMUTE_RATIODTH_THCUT +928 0x0000 //TX_MICMUTE_B_POST_FLT_ECHOL +929 0x0000 //TX_MICMUTE_B_POST_FLT_ECHOH +930 0x0000 //TX_MICMUTE_C_POST_FLT_MASK +931 0x0000 //TX_MICMUTE_RATIODTL_CUT_TH +932 0x0000 //TX_MICMUTE_DT_CUT_K1 +933 0x0000 //TX_MICMUTE_N2_SN_EST +934 0x0000 //TX_MICMUTE_THR_SN_EST_0 +935 0x0000 //TX_MICMUTE_MIN_G_CTRL_0 +936 0x0000 //TX_MICMUTE_A_POST_FILT_S_0 +937 0x0000 //TX_MICMUTE_B_POST_FILT_0 +938 0x0000 //TX_MIC1RUB_AMP_THR +939 0x0000 //TX_MIC1MUTE_RATIO_THR +940 0x0000 //TX_MIC1MUTE_AMP_THR +941 0x0000 //TX_MIC1MUTE_CVG_TIME +942 0x0000 //TX_MIC1MUTE_RELEASE_TIME +943 0x0000 //TX_AMS_RESRV_01 +944 0x0000 //TX_AMS_RESRV_02 +945 0x0000 //TX_AMS_RESRV_03 +946 0x0000 //TX_AMS_RESRV_04 +947 0x0000 //TX_AMS_RESRV_05 +948 0x0000 //TX_AMS_RESRV_06 +949 0x0000 //TX_AMS_RESRV_07 +950 0x0000 //TX_AMS_RESRV_08 +951 0x0000 //TX_AMS_RESRV_09 +952 0x0000 //TX_AMS_RESRV_10 +953 0x0000 //TX_AMS_RESRV_11 +954 0x0000 //TX_AMS_RESRV_12 +955 0x0000 //TX_AMS_RESRV_13 +956 0x0000 //TX_AMS_RESRV_14 +957 0x0000 //TX_AMS_RESRV_15 +958 0x0000 //TX_AMS_RESRV_16 +959 0x0000 //TX_AMS_RESRV_17 +960 0x0000 //TX_AMS_RESRV_18 +961 0x0000 //TX_AMS_RESRV_19 #RX 0 0x0064 //RX_RECVFUNC_MODE_0 1 0x0000 //RX_RECVFUNC_MODE_1 @@ -8767,10 +12501,862 @@ 110 0x0000 //RX_FDDRC_RESRV_0 129 0x0100 //RX_SPK_VOL 130 0x0000 //RX_VOL_RESRV_0 +#RX 2 +157 0x0064 //RX_RECVFUNC_MODE_0 +158 0x0000 //RX_RECVFUNC_MODE_1 +159 0x0004 //RX_SAMPLINGFREQ_SIG +160 0x0004 //RX_SAMPLINGFREQ_PROC +161 0x000A //RX_FRAME_SZ +162 0x0000 //RX_DELAY_OPT +163 0x1000 //RX_TDDRC_ALPHA_UP_1 +164 0x1000 //RX_TDDRC_ALPHA_UP_2 +165 0x1000 //RX_TDDRC_ALPHA_UP_3 +166 0x1000 //RX_TDDRC_ALPHA_UP_4 +167 0x0800 //RX_PGA +168 0x7FFF //RX_A_HP +169 0x4000 //RX_B_PE +170 0x7800 //RX_THR_PITCH_DET_0 +171 0x7000 //RX_THR_PITCH_DET_1 +172 0x6000 //RX_THR_PITCH_DET_2 +173 0x0008 //RX_PITCH_BFR_LEN +174 0x0003 //RX_SBD_PITCH_DET +175 0x0100 //RX_PP_RESRV_0 +176 0x0020 //RX_PP_RESRV_1 +177 0x0500 //RX_N_SN_EST +178 0x000C //RX_N2_SN_EST +179 0x000A //RX_NS_LVL_CTRL +180 0xF600 //RX_THR_SN_EST +181 0x7000 //RX_LAMBDA_PFILT +182 0x000A //RX_FENS_RESRV_0 +183 0x0190 //RX_FENS_RESRV_1 +184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +187 0x0002 //RX_EXTRA_NS_L +188 0x0800 //RX_EXTRA_NS_A +189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +190 0x7FFF //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +192 0x199A //RX_A_POST_FLT +193 0x0000 //RX_LMT_THRD +194 0x4000 //RX_LMT_ALPHA +195 0x0020 //RX_FDEQ_SUBNUM +196 0x4848 //RX_FDEQ_GAIN_0 +197 0x4848 //RX_FDEQ_GAIN_1 +198 0x4848 //RX_FDEQ_GAIN_2 +199 0x4848 //RX_FDEQ_GAIN_3 +200 0x4848 //RX_FDEQ_GAIN_4 +201 0x4848 //RX_FDEQ_GAIN_5 +202 0x4848 //RX_FDEQ_GAIN_6 +203 0x4848 //RX_FDEQ_GAIN_7 +204 0x4848 //RX_FDEQ_GAIN_8 +205 0x4848 //RX_FDEQ_GAIN_9 +206 0x4848 //RX_FDEQ_GAIN_10 +207 0x4848 //RX_FDEQ_GAIN_11 +208 0x4848 //RX_FDEQ_GAIN_12 +209 0x4848 //RX_FDEQ_GAIN_13 +210 0x4848 //RX_FDEQ_GAIN_14 +211 0x4848 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0202 //RX_FDEQ_BIN_0 +221 0x0203 //RX_FDEQ_BIN_1 +222 0x0304 //RX_FDEQ_BIN_2 +223 0x0405 //RX_FDEQ_BIN_3 +224 0x0607 //RX_FDEQ_BIN_4 +225 0x0809 //RX_FDEQ_BIN_5 +226 0x0A0B //RX_FDEQ_BIN_6 +227 0x0C0D //RX_FDEQ_BIN_7 +228 0x0E0F //RX_FDEQ_BIN_8 +229 0x1011 //RX_FDEQ_BIN_9 +230 0x1214 //RX_FDEQ_BIN_10 +231 0x1618 //RX_FDEQ_BIN_11 +232 0x1C1C //RX_FDEQ_BIN_12 +233 0x2020 //RX_FDEQ_BIN_13 +234 0x2020 //RX_FDEQ_BIN_14 +235 0x2011 //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x4000 //RX_FDEQ_RESRV_0 +245 0x0320 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0030 //RX_FDDRC_BAND_MARGIN_1 +248 0x0050 //RX_FDDRC_BAND_MARGIN_2 +249 0x0080 //RX_FDDRC_BAND_MARGIN_3 +250 0x0007 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x5000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x6400 //RX_FDDRC_THRD_3_2 +258 0x6400 //RX_FDDRC_THRD_3_3 +259 0x2000 //RX_FDDRC_SLANT_0_0 +260 0x2000 //RX_FDDRC_SLANT_0_1 +261 0x2000 //RX_FDDRC_SLANT_0_2 +262 0x2000 //RX_FDDRC_SLANT_0_3 +263 0x5333 //RX_FDDRC_SLANT_1_0 +264 0x5333 //RX_FDDRC_SLANT_1_1 +265 0x5333 //RX_FDDRC_SLANT_1_2 +266 0x5333 //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +268 0x0000 //RX_FILTINDX +269 0x0000 //RX_TDDRC_THRD_0 +270 0x0000 //RX_TDDRC_THRD_1 +271 0x7FFF //RX_TDDRC_THRD_2 +272 0x7FFF //RX_TDDRC_THRD_3 +273 0x7FFF //RX_TDDRC_SLANT_0 +274 0x7FFF //RX_TDDRC_SLANT_1 +275 0x1000 //RX_TDDRC_ALPHA_UP_0 +276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x199A //RX_TDDRC_HMNC_GAIN +279 0x0001 //RX_TDDRC_SMT_FLAG +280 0x0CCD //RX_TDDRC_SMT_W +281 0x0155 //RX_TDDRC_DRC_GAIN +282 0x7C00 //RX_LAMBDA_PKA_FP +283 0x2000 //RX_TPKA_FP +284 0x2000 //RX_MIN_G_FP +285 0x0080 //RX_MAX_G_FP +286 0x0100 //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 +288 0x0000 //RX_MAXLEVEL_CNG +289 0x3000 //RX_BWE_UV_TH +290 0x3000 //RX_BWE_UV_TH2 +291 0x1800 //RX_BWE_UV_TH3 +292 0x1000 //RX_BWE_V_TH +293 0x04CD //RX_BWE_GAIN1_V_TH1 +294 0x0F33 //RX_BWE_GAIN1_V_TH2 +295 0x7333 //RX_BWE_UV_EQ +296 0x199A //RX_BWE_V_EQ +297 0x7333 //RX_BWE_TONE_TH +298 0x0004 //RX_BWE_UV_HOLD_T +299 0x6CCD //RX_BWE_GAIN2_ALPHA +300 0x799A //RX_BWE_GAIN3_ALPHA +301 0x001E //RX_BWE_CUTOFF +302 0x3000 //RX_BWE_GAINFILL +303 0x3200 //RX_BWE_MAXTH_TONE +304 0x2000 //RX_BWE_EQ_0 +305 0x2000 //RX_BWE_EQ_1 +306 0x2000 //RX_BWE_EQ_2 +307 0x2000 //RX_BWE_EQ_3 +308 0x2000 //RX_BWE_EQ_4 +309 0x2000 //RX_BWE_EQ_5 +310 0x2000 //RX_BWE_EQ_6 +311 0x0000 //RX_BWE_RESRV_0 +312 0x0000 //RX_BWE_RESRV_1 +313 0x0000 //RX_BWE_RESRV_2 +#VOL 0 +163 0x1000 //RX_TDDRC_ALPHA_UP_1 +164 0x1000 //RX_TDDRC_ALPHA_UP_2 +165 0x1000 //RX_TDDRC_ALPHA_UP_3 +166 0x1000 //RX_TDDRC_ALPHA_UP_4 +184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +190 0x7FFF //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +269 0x0000 //RX_TDDRC_THRD_0 +270 0x0000 //RX_TDDRC_THRD_1 +271 0x7FFF //RX_TDDRC_THRD_2 +272 0x7FFF //RX_TDDRC_THRD_3 +273 0x7FFF //RX_TDDRC_SLANT_0 +274 0x7FFF //RX_TDDRC_SLANT_1 +275 0x1000 //RX_TDDRC_ALPHA_UP_0 +276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x199A //RX_TDDRC_HMNC_GAIN +279 0x0001 //RX_TDDRC_SMT_FLAG +280 0x0CCD //RX_TDDRC_SMT_W +281 0x0155 //RX_TDDRC_DRC_GAIN +195 0x0020 //RX_FDEQ_SUBNUM +196 0x4848 //RX_FDEQ_GAIN_0 +197 0x4848 //RX_FDEQ_GAIN_1 +198 0x4848 //RX_FDEQ_GAIN_2 +199 0x4848 //RX_FDEQ_GAIN_3 +200 0x4848 //RX_FDEQ_GAIN_4 +201 0x4848 //RX_FDEQ_GAIN_5 +202 0x4848 //RX_FDEQ_GAIN_6 +203 0x4848 //RX_FDEQ_GAIN_7 +204 0x4848 //RX_FDEQ_GAIN_8 +205 0x4848 //RX_FDEQ_GAIN_9 +206 0x4848 //RX_FDEQ_GAIN_10 +207 0x4848 //RX_FDEQ_GAIN_11 +208 0x4848 //RX_FDEQ_GAIN_12 +209 0x4848 //RX_FDEQ_GAIN_13 +210 0x4848 //RX_FDEQ_GAIN_14 +211 0x4848 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0202 //RX_FDEQ_BIN_0 +221 0x0203 //RX_FDEQ_BIN_1 +222 0x0304 //RX_FDEQ_BIN_2 +223 0x0405 //RX_FDEQ_BIN_3 +224 0x0607 //RX_FDEQ_BIN_4 +225 0x0809 //RX_FDEQ_BIN_5 +226 0x0A0B //RX_FDEQ_BIN_6 +227 0x0C0D //RX_FDEQ_BIN_7 +228 0x0E0F //RX_FDEQ_BIN_8 +229 0x1011 //RX_FDEQ_BIN_9 +230 0x1214 //RX_FDEQ_BIN_10 +231 0x1618 //RX_FDEQ_BIN_11 +232 0x1C1C //RX_FDEQ_BIN_12 +233 0x2020 //RX_FDEQ_BIN_13 +234 0x2020 //RX_FDEQ_BIN_14 +235 0x2011 //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x4000 //RX_FDEQ_RESRV_0 +245 0x0320 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0030 //RX_FDDRC_BAND_MARGIN_1 +248 0x0050 //RX_FDDRC_BAND_MARGIN_2 +249 0x0080 //RX_FDDRC_BAND_MARGIN_3 +250 0x0007 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x5000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x6400 //RX_FDDRC_THRD_3_2 +258 0x6400 //RX_FDDRC_THRD_3_3 +259 0x2000 //RX_FDDRC_SLANT_0_0 +260 0x2000 //RX_FDDRC_SLANT_0_1 +261 0x2000 //RX_FDDRC_SLANT_0_2 +262 0x2000 //RX_FDDRC_SLANT_0_3 +263 0x5333 //RX_FDDRC_SLANT_1_0 +264 0x5333 //RX_FDDRC_SLANT_1_1 +265 0x5333 //RX_FDDRC_SLANT_1_2 +266 0x5333 //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +286 0x0100 //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 +#VOL 1 +163 0x1000 //RX_TDDRC_ALPHA_UP_1 +164 0x1000 //RX_TDDRC_ALPHA_UP_2 +165 0x1000 //RX_TDDRC_ALPHA_UP_3 +166 0x1000 //RX_TDDRC_ALPHA_UP_4 +184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +190 0x7FFF //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +269 0x0000 //RX_TDDRC_THRD_0 +270 0x0000 //RX_TDDRC_THRD_1 +271 0x7FFF //RX_TDDRC_THRD_2 +272 0x7FFF //RX_TDDRC_THRD_3 +273 0x7FFF //RX_TDDRC_SLANT_0 +274 0x7FFF //RX_TDDRC_SLANT_1 +275 0x1000 //RX_TDDRC_ALPHA_UP_0 +276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x199A //RX_TDDRC_HMNC_GAIN +279 0x0001 //RX_TDDRC_SMT_FLAG +280 0x0CCD //RX_TDDRC_SMT_W +281 0x0155 //RX_TDDRC_DRC_GAIN +195 0x0020 //RX_FDEQ_SUBNUM +196 0x4848 //RX_FDEQ_GAIN_0 +197 0x4848 //RX_FDEQ_GAIN_1 +198 0x4848 //RX_FDEQ_GAIN_2 +199 0x4848 //RX_FDEQ_GAIN_3 +200 0x4848 //RX_FDEQ_GAIN_4 +201 0x4848 //RX_FDEQ_GAIN_5 +202 0x4848 //RX_FDEQ_GAIN_6 +203 0x4848 //RX_FDEQ_GAIN_7 +204 0x4848 //RX_FDEQ_GAIN_8 +205 0x4848 //RX_FDEQ_GAIN_9 +206 0x4848 //RX_FDEQ_GAIN_10 +207 0x4848 //RX_FDEQ_GAIN_11 +208 0x4848 //RX_FDEQ_GAIN_12 +209 0x4848 //RX_FDEQ_GAIN_13 +210 0x4848 //RX_FDEQ_GAIN_14 +211 0x4848 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0202 //RX_FDEQ_BIN_0 +221 0x0203 //RX_FDEQ_BIN_1 +222 0x0304 //RX_FDEQ_BIN_2 +223 0x0405 //RX_FDEQ_BIN_3 +224 0x0607 //RX_FDEQ_BIN_4 +225 0x0809 //RX_FDEQ_BIN_5 +226 0x0A0B //RX_FDEQ_BIN_6 +227 0x0C0D //RX_FDEQ_BIN_7 +228 0x0E0F //RX_FDEQ_BIN_8 +229 0x1011 //RX_FDEQ_BIN_9 +230 0x1214 //RX_FDEQ_BIN_10 +231 0x1618 //RX_FDEQ_BIN_11 +232 0x1C1C //RX_FDEQ_BIN_12 +233 0x2020 //RX_FDEQ_BIN_13 +234 0x2020 //RX_FDEQ_BIN_14 +235 0x2011 //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x4000 //RX_FDEQ_RESRV_0 +245 0x0320 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0030 //RX_FDDRC_BAND_MARGIN_1 +248 0x0050 //RX_FDDRC_BAND_MARGIN_2 +249 0x0080 //RX_FDDRC_BAND_MARGIN_3 +250 0x0007 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x5000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x6400 //RX_FDDRC_THRD_3_2 +258 0x6400 //RX_FDDRC_THRD_3_3 +259 0x2000 //RX_FDDRC_SLANT_0_0 +260 0x2000 //RX_FDDRC_SLANT_0_1 +261 0x2000 //RX_FDDRC_SLANT_0_2 +262 0x2000 //RX_FDDRC_SLANT_0_3 +263 0x5333 //RX_FDDRC_SLANT_1_0 +264 0x5333 //RX_FDDRC_SLANT_1_1 +265 0x5333 //RX_FDDRC_SLANT_1_2 +266 0x5333 //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +286 0x0100 //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 +#VOL 2 +163 0x1000 //RX_TDDRC_ALPHA_UP_1 +164 0x1000 //RX_TDDRC_ALPHA_UP_2 +165 0x1000 //RX_TDDRC_ALPHA_UP_3 +166 0x1000 //RX_TDDRC_ALPHA_UP_4 +184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +190 0x7FFF //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +269 0x0000 //RX_TDDRC_THRD_0 +270 0x0000 //RX_TDDRC_THRD_1 +271 0x7FFF //RX_TDDRC_THRD_2 +272 0x7FFF //RX_TDDRC_THRD_3 +273 0x7FFF //RX_TDDRC_SLANT_0 +274 0x7FFF //RX_TDDRC_SLANT_1 +275 0x1000 //RX_TDDRC_ALPHA_UP_0 +276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x199A //RX_TDDRC_HMNC_GAIN +279 0x0001 //RX_TDDRC_SMT_FLAG +280 0x0CCD //RX_TDDRC_SMT_W +281 0x0155 //RX_TDDRC_DRC_GAIN +195 0x0020 //RX_FDEQ_SUBNUM +196 0x4848 //RX_FDEQ_GAIN_0 +197 0x4848 //RX_FDEQ_GAIN_1 +198 0x4848 //RX_FDEQ_GAIN_2 +199 0x4848 //RX_FDEQ_GAIN_3 +200 0x4848 //RX_FDEQ_GAIN_4 +201 0x4848 //RX_FDEQ_GAIN_5 +202 0x4848 //RX_FDEQ_GAIN_6 +203 0x4848 //RX_FDEQ_GAIN_7 +204 0x4848 //RX_FDEQ_GAIN_8 +205 0x4848 //RX_FDEQ_GAIN_9 +206 0x4848 //RX_FDEQ_GAIN_10 +207 0x4848 //RX_FDEQ_GAIN_11 +208 0x4848 //RX_FDEQ_GAIN_12 +209 0x4848 //RX_FDEQ_GAIN_13 +210 0x4848 //RX_FDEQ_GAIN_14 +211 0x4848 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0202 //RX_FDEQ_BIN_0 +221 0x0203 //RX_FDEQ_BIN_1 +222 0x0304 //RX_FDEQ_BIN_2 +223 0x0405 //RX_FDEQ_BIN_3 +224 0x0607 //RX_FDEQ_BIN_4 +225 0x0809 //RX_FDEQ_BIN_5 +226 0x0A0B //RX_FDEQ_BIN_6 +227 0x0C0D //RX_FDEQ_BIN_7 +228 0x0E0F //RX_FDEQ_BIN_8 +229 0x1011 //RX_FDEQ_BIN_9 +230 0x1214 //RX_FDEQ_BIN_10 +231 0x1618 //RX_FDEQ_BIN_11 +232 0x1C1C //RX_FDEQ_BIN_12 +233 0x2020 //RX_FDEQ_BIN_13 +234 0x2020 //RX_FDEQ_BIN_14 +235 0x2011 //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x4000 //RX_FDEQ_RESRV_0 +245 0x0320 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0030 //RX_FDDRC_BAND_MARGIN_1 +248 0x0050 //RX_FDDRC_BAND_MARGIN_2 +249 0x0080 //RX_FDDRC_BAND_MARGIN_3 +250 0x0007 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x5000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x6400 //RX_FDDRC_THRD_3_2 +258 0x6400 //RX_FDDRC_THRD_3_3 +259 0x2000 //RX_FDDRC_SLANT_0_0 +260 0x2000 //RX_FDDRC_SLANT_0_1 +261 0x2000 //RX_FDDRC_SLANT_0_2 +262 0x2000 //RX_FDDRC_SLANT_0_3 +263 0x5333 //RX_FDDRC_SLANT_1_0 +264 0x5333 //RX_FDDRC_SLANT_1_1 +265 0x5333 //RX_FDDRC_SLANT_1_2 +266 0x5333 //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +286 0x0100 //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 +#VOL 3 +163 0x1000 //RX_TDDRC_ALPHA_UP_1 +164 0x1000 //RX_TDDRC_ALPHA_UP_2 +165 0x1000 //RX_TDDRC_ALPHA_UP_3 +166 0x1000 //RX_TDDRC_ALPHA_UP_4 +184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +190 0x7FFF //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +269 0x0000 //RX_TDDRC_THRD_0 +270 0x0000 //RX_TDDRC_THRD_1 +271 0x7FFF //RX_TDDRC_THRD_2 +272 0x7FFF //RX_TDDRC_THRD_3 +273 0x7FFF //RX_TDDRC_SLANT_0 +274 0x7FFF //RX_TDDRC_SLANT_1 +275 0x1000 //RX_TDDRC_ALPHA_UP_0 +276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x199A //RX_TDDRC_HMNC_GAIN +279 0x0001 //RX_TDDRC_SMT_FLAG +280 0x0CCD //RX_TDDRC_SMT_W +281 0x0155 //RX_TDDRC_DRC_GAIN +195 0x0020 //RX_FDEQ_SUBNUM +196 0x4848 //RX_FDEQ_GAIN_0 +197 0x4848 //RX_FDEQ_GAIN_1 +198 0x4848 //RX_FDEQ_GAIN_2 +199 0x4848 //RX_FDEQ_GAIN_3 +200 0x4848 //RX_FDEQ_GAIN_4 +201 0x4848 //RX_FDEQ_GAIN_5 +202 0x4848 //RX_FDEQ_GAIN_6 +203 0x4848 //RX_FDEQ_GAIN_7 +204 0x4848 //RX_FDEQ_GAIN_8 +205 0x4848 //RX_FDEQ_GAIN_9 +206 0x4848 //RX_FDEQ_GAIN_10 +207 0x4848 //RX_FDEQ_GAIN_11 +208 0x4848 //RX_FDEQ_GAIN_12 +209 0x4848 //RX_FDEQ_GAIN_13 +210 0x4848 //RX_FDEQ_GAIN_14 +211 0x4848 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0202 //RX_FDEQ_BIN_0 +221 0x0203 //RX_FDEQ_BIN_1 +222 0x0304 //RX_FDEQ_BIN_2 +223 0x0405 //RX_FDEQ_BIN_3 +224 0x0607 //RX_FDEQ_BIN_4 +225 0x0809 //RX_FDEQ_BIN_5 +226 0x0A0B //RX_FDEQ_BIN_6 +227 0x0C0D //RX_FDEQ_BIN_7 +228 0x0E0F //RX_FDEQ_BIN_8 +229 0x1011 //RX_FDEQ_BIN_9 +230 0x1214 //RX_FDEQ_BIN_10 +231 0x1618 //RX_FDEQ_BIN_11 +232 0x1C1C //RX_FDEQ_BIN_12 +233 0x2020 //RX_FDEQ_BIN_13 +234 0x2020 //RX_FDEQ_BIN_14 +235 0x2011 //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x4000 //RX_FDEQ_RESRV_0 +245 0x0320 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0030 //RX_FDDRC_BAND_MARGIN_1 +248 0x0050 //RX_FDDRC_BAND_MARGIN_2 +249 0x0080 //RX_FDDRC_BAND_MARGIN_3 +250 0x0007 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x5000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x6400 //RX_FDDRC_THRD_3_2 +258 0x6400 //RX_FDDRC_THRD_3_3 +259 0x2000 //RX_FDDRC_SLANT_0_0 +260 0x2000 //RX_FDDRC_SLANT_0_1 +261 0x2000 //RX_FDDRC_SLANT_0_2 +262 0x2000 //RX_FDDRC_SLANT_0_3 +263 0x5333 //RX_FDDRC_SLANT_1_0 +264 0x5333 //RX_FDDRC_SLANT_1_1 +265 0x5333 //RX_FDDRC_SLANT_1_2 +266 0x5333 //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +286 0x0100 //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 +#VOL 4 +163 0x1000 //RX_TDDRC_ALPHA_UP_1 +164 0x1000 //RX_TDDRC_ALPHA_UP_2 +165 0x1000 //RX_TDDRC_ALPHA_UP_3 +166 0x1000 //RX_TDDRC_ALPHA_UP_4 +184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +190 0x7FFF //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +269 0x0000 //RX_TDDRC_THRD_0 +270 0x0000 //RX_TDDRC_THRD_1 +271 0x7FFF //RX_TDDRC_THRD_2 +272 0x7FFF //RX_TDDRC_THRD_3 +273 0x7FFF //RX_TDDRC_SLANT_0 +274 0x7FFF //RX_TDDRC_SLANT_1 +275 0x1000 //RX_TDDRC_ALPHA_UP_0 +276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x199A //RX_TDDRC_HMNC_GAIN +279 0x0001 //RX_TDDRC_SMT_FLAG +280 0x0CCD //RX_TDDRC_SMT_W +281 0x0155 //RX_TDDRC_DRC_GAIN +195 0x0020 //RX_FDEQ_SUBNUM +196 0x4848 //RX_FDEQ_GAIN_0 +197 0x4848 //RX_FDEQ_GAIN_1 +198 0x4848 //RX_FDEQ_GAIN_2 +199 0x4848 //RX_FDEQ_GAIN_3 +200 0x4848 //RX_FDEQ_GAIN_4 +201 0x4848 //RX_FDEQ_GAIN_5 +202 0x4848 //RX_FDEQ_GAIN_6 +203 0x4848 //RX_FDEQ_GAIN_7 +204 0x4848 //RX_FDEQ_GAIN_8 +205 0x4848 //RX_FDEQ_GAIN_9 +206 0x4848 //RX_FDEQ_GAIN_10 +207 0x4848 //RX_FDEQ_GAIN_11 +208 0x4848 //RX_FDEQ_GAIN_12 +209 0x4848 //RX_FDEQ_GAIN_13 +210 0x4848 //RX_FDEQ_GAIN_14 +211 0x4848 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0202 //RX_FDEQ_BIN_0 +221 0x0203 //RX_FDEQ_BIN_1 +222 0x0304 //RX_FDEQ_BIN_2 +223 0x0405 //RX_FDEQ_BIN_3 +224 0x0607 //RX_FDEQ_BIN_4 +225 0x0809 //RX_FDEQ_BIN_5 +226 0x0A0B //RX_FDEQ_BIN_6 +227 0x0C0D //RX_FDEQ_BIN_7 +228 0x0E0F //RX_FDEQ_BIN_8 +229 0x1011 //RX_FDEQ_BIN_9 +230 0x1214 //RX_FDEQ_BIN_10 +231 0x1618 //RX_FDEQ_BIN_11 +232 0x1C1C //RX_FDEQ_BIN_12 +233 0x2020 //RX_FDEQ_BIN_13 +234 0x2020 //RX_FDEQ_BIN_14 +235 0x2011 //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x4000 //RX_FDEQ_RESRV_0 +245 0x0320 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0030 //RX_FDDRC_BAND_MARGIN_1 +248 0x0050 //RX_FDDRC_BAND_MARGIN_2 +249 0x0080 //RX_FDDRC_BAND_MARGIN_3 +250 0x0007 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x5000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x6400 //RX_FDDRC_THRD_3_2 +258 0x6400 //RX_FDDRC_THRD_3_3 +259 0x2000 //RX_FDDRC_SLANT_0_0 +260 0x2000 //RX_FDDRC_SLANT_0_1 +261 0x2000 //RX_FDDRC_SLANT_0_2 +262 0x2000 //RX_FDDRC_SLANT_0_3 +263 0x5333 //RX_FDDRC_SLANT_1_0 +264 0x5333 //RX_FDDRC_SLANT_1_1 +265 0x5333 //RX_FDDRC_SLANT_1_2 +266 0x5333 //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +286 0x0100 //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 +#VOL 5 +163 0x1000 //RX_TDDRC_ALPHA_UP_1 +164 0x1000 //RX_TDDRC_ALPHA_UP_2 +165 0x1000 //RX_TDDRC_ALPHA_UP_3 +166 0x1000 //RX_TDDRC_ALPHA_UP_4 +184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +190 0x7FFF //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +269 0x0000 //RX_TDDRC_THRD_0 +270 0x0000 //RX_TDDRC_THRD_1 +271 0x7FFF //RX_TDDRC_THRD_2 +272 0x7FFF //RX_TDDRC_THRD_3 +273 0x7FFF //RX_TDDRC_SLANT_0 +274 0x7FFF //RX_TDDRC_SLANT_1 +275 0x1000 //RX_TDDRC_ALPHA_UP_0 +276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x199A //RX_TDDRC_HMNC_GAIN +279 0x0001 //RX_TDDRC_SMT_FLAG +280 0x0CCD //RX_TDDRC_SMT_W +281 0x0155 //RX_TDDRC_DRC_GAIN +195 0x0020 //RX_FDEQ_SUBNUM +196 0x4848 //RX_FDEQ_GAIN_0 +197 0x4848 //RX_FDEQ_GAIN_1 +198 0x4848 //RX_FDEQ_GAIN_2 +199 0x4848 //RX_FDEQ_GAIN_3 +200 0x4848 //RX_FDEQ_GAIN_4 +201 0x4848 //RX_FDEQ_GAIN_5 +202 0x4848 //RX_FDEQ_GAIN_6 +203 0x4848 //RX_FDEQ_GAIN_7 +204 0x4848 //RX_FDEQ_GAIN_8 +205 0x4848 //RX_FDEQ_GAIN_9 +206 0x4848 //RX_FDEQ_GAIN_10 +207 0x4848 //RX_FDEQ_GAIN_11 +208 0x4848 //RX_FDEQ_GAIN_12 +209 0x4848 //RX_FDEQ_GAIN_13 +210 0x4848 //RX_FDEQ_GAIN_14 +211 0x4848 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0202 //RX_FDEQ_BIN_0 +221 0x0203 //RX_FDEQ_BIN_1 +222 0x0304 //RX_FDEQ_BIN_2 +223 0x0405 //RX_FDEQ_BIN_3 +224 0x0607 //RX_FDEQ_BIN_4 +225 0x0809 //RX_FDEQ_BIN_5 +226 0x0A0B //RX_FDEQ_BIN_6 +227 0x0C0D //RX_FDEQ_BIN_7 +228 0x0E0F //RX_FDEQ_BIN_8 +229 0x1011 //RX_FDEQ_BIN_9 +230 0x1214 //RX_FDEQ_BIN_10 +231 0x1618 //RX_FDEQ_BIN_11 +232 0x1C1C //RX_FDEQ_BIN_12 +233 0x2020 //RX_FDEQ_BIN_13 +234 0x2020 //RX_FDEQ_BIN_14 +235 0x2011 //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x4000 //RX_FDEQ_RESRV_0 +245 0x0320 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0030 //RX_FDDRC_BAND_MARGIN_1 +248 0x0050 //RX_FDDRC_BAND_MARGIN_2 +249 0x0080 //RX_FDDRC_BAND_MARGIN_3 +250 0x0007 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x5000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x6400 //RX_FDDRC_THRD_3_2 +258 0x6400 //RX_FDDRC_THRD_3_3 +259 0x2000 //RX_FDDRC_SLANT_0_0 +260 0x2000 //RX_FDDRC_SLANT_0_1 +261 0x2000 //RX_FDDRC_SLANT_0_2 +262 0x2000 //RX_FDDRC_SLANT_0_3 +263 0x5333 //RX_FDDRC_SLANT_1_0 +264 0x5333 //RX_FDDRC_SLANT_1_1 +265 0x5333 //RX_FDDRC_SLANT_1_2 +266 0x5333 //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +286 0x0100 //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 +#VOL 6 +163 0x1000 //RX_TDDRC_ALPHA_UP_1 +164 0x1000 //RX_TDDRC_ALPHA_UP_2 +165 0x1000 //RX_TDDRC_ALPHA_UP_3 +166 0x1000 //RX_TDDRC_ALPHA_UP_4 +184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +190 0x7FFF //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +269 0x0000 //RX_TDDRC_THRD_0 +270 0x0000 //RX_TDDRC_THRD_1 +271 0x7FFF //RX_TDDRC_THRD_2 +272 0x7FFF //RX_TDDRC_THRD_3 +273 0x7FFF //RX_TDDRC_SLANT_0 +274 0x7FFF //RX_TDDRC_SLANT_1 +275 0x1000 //RX_TDDRC_ALPHA_UP_0 +276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x199A //RX_TDDRC_HMNC_GAIN +279 0x0001 //RX_TDDRC_SMT_FLAG +280 0x0CCD //RX_TDDRC_SMT_W +281 0x0155 //RX_TDDRC_DRC_GAIN +195 0x0020 //RX_FDEQ_SUBNUM +196 0x4848 //RX_FDEQ_GAIN_0 +197 0x4848 //RX_FDEQ_GAIN_1 +198 0x4848 //RX_FDEQ_GAIN_2 +199 0x4848 //RX_FDEQ_GAIN_3 +200 0x4848 //RX_FDEQ_GAIN_4 +201 0x4848 //RX_FDEQ_GAIN_5 +202 0x4848 //RX_FDEQ_GAIN_6 +203 0x4848 //RX_FDEQ_GAIN_7 +204 0x4848 //RX_FDEQ_GAIN_8 +205 0x4848 //RX_FDEQ_GAIN_9 +206 0x4848 //RX_FDEQ_GAIN_10 +207 0x4848 //RX_FDEQ_GAIN_11 +208 0x4848 //RX_FDEQ_GAIN_12 +209 0x4848 //RX_FDEQ_GAIN_13 +210 0x4848 //RX_FDEQ_GAIN_14 +211 0x4848 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0202 //RX_FDEQ_BIN_0 +221 0x0203 //RX_FDEQ_BIN_1 +222 0x0304 //RX_FDEQ_BIN_2 +223 0x0405 //RX_FDEQ_BIN_3 +224 0x0607 //RX_FDEQ_BIN_4 +225 0x0809 //RX_FDEQ_BIN_5 +226 0x0A0B //RX_FDEQ_BIN_6 +227 0x0C0D //RX_FDEQ_BIN_7 +228 0x0E0F //RX_FDEQ_BIN_8 +229 0x1011 //RX_FDEQ_BIN_9 +230 0x1214 //RX_FDEQ_BIN_10 +231 0x1618 //RX_FDEQ_BIN_11 +232 0x1C1C //RX_FDEQ_BIN_12 +233 0x2020 //RX_FDEQ_BIN_13 +234 0x2020 //RX_FDEQ_BIN_14 +235 0x2011 //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x4000 //RX_FDEQ_RESRV_0 +245 0x0320 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0030 //RX_FDDRC_BAND_MARGIN_1 +248 0x0050 //RX_FDDRC_BAND_MARGIN_2 +249 0x0080 //RX_FDDRC_BAND_MARGIN_3 +250 0x0007 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x5000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x6400 //RX_FDDRC_THRD_3_2 +258 0x6400 //RX_FDDRC_THRD_3_3 +259 0x2000 //RX_FDDRC_SLANT_0_0 +260 0x2000 //RX_FDDRC_SLANT_0_1 +261 0x2000 //RX_FDDRC_SLANT_0_2 +262 0x2000 //RX_FDDRC_SLANT_0_3 +263 0x5333 //RX_FDDRC_SLANT_1_0 +264 0x5333 //RX_FDDRC_SLANT_1_1 +265 0x5333 //RX_FDDRC_SLANT_1_2 +266 0x5333 //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +286 0x0100 //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 #CASE_NAME BLUETOOTH-BTNB-VOICE_GENERIC-NB -#PARAM_TYPE TX+RX -#TOTAL_CUSTOM_STEP 7 +#PARAM_MODE Full +#PARAM_TYPE TX+2RX +#TOTAL_CUSTOM_STEP 7+7 #TX 0 0x0008 //TX_OPERATION_MODE_0 1 0x0008 //TX_OPERATION_MODE_1 @@ -9023,20 +13609,20 @@ 248 0xF400 //TX_THR_SN_EST_6 249 0xF600 //TX_THR_SN_EST_7 250 0x0000 //TX_DELTA_THR_SN_EST_0 -251 0x0000 //TX_DELTA_THR_SN_EST_1 +251 0x0200 //TX_DELTA_THR_SN_EST_1 252 0x0200 //TX_DELTA_THR_SN_EST_2 253 0x0200 //TX_DELTA_THR_SN_EST_3 254 0x0200 //TX_DELTA_THR_SN_EST_4 255 0x0200 //TX_DELTA_THR_SN_EST_5 -256 0x0200 //TX_DELTA_THR_SN_EST_6 +256 0x0000 //TX_DELTA_THR_SN_EST_6 257 0x0200 //TX_DELTA_THR_SN_EST_7 258 0x6000 //TX_LAMBDA_NN_EST_0 -259 0x6000 //TX_LAMBDA_NN_EST_1 +259 0x4000 //TX_LAMBDA_NN_EST_1 260 0x4000 //TX_LAMBDA_NN_EST_2 261 0x4000 //TX_LAMBDA_NN_EST_3 262 0x4000 //TX_LAMBDA_NN_EST_4 263 0x4000 //TX_LAMBDA_NN_EST_5 -264 0x4000 //TX_LAMBDA_NN_EST_6 +264 0x6000 //TX_LAMBDA_NN_EST_6 265 0x4000 //TX_LAMBDA_NN_EST_7 266 0x0400 //TX_N_SN_EST 267 0x001E //TX_INBEAM_T @@ -9054,16 +13640,16 @@ 279 0x1000 //TX_B_POST_FLT_0 280 0x1000 //TX_B_POST_FLT_1 281 0x000F //TX_NS_LVL_CTRL_0 -282 0x000F //TX_NS_LVL_CTRL_1 -283 0x0011 //TX_NS_LVL_CTRL_2 +282 0x0011 //TX_NS_LVL_CTRL_1 +283 0x000F //TX_NS_LVL_CTRL_2 284 0x000F //TX_NS_LVL_CTRL_3 285 0x000F //TX_NS_LVL_CTRL_4 286 0x000F //TX_NS_LVL_CTRL_5 287 0x000F //TX_NS_LVL_CTRL_6 288 0x0011 //TX_NS_LVL_CTRL_7 289 0x000C //TX_MIN_GAIN_S_0 -290 0x000C //TX_MIN_GAIN_S_1 -291 0x000F //TX_MIN_GAIN_S_2 +290 0x000F //TX_MIN_GAIN_S_1 +291 0x000C //TX_MIN_GAIN_S_2 292 0x000C //TX_MIN_GAIN_S_3 293 0x000C //TX_MIN_GAIN_S_4 294 0x000C //TX_MIN_GAIN_S_5 @@ -9087,12 +13673,12 @@ 312 0x7FFF //TX_A_POST_FILT_0 313 0x2000 //TX_A_POST_FILT_1 314 0x4000 //TX_A_POST_FILT_S_0 -315 0x4000 //TX_A_POST_FILT_S_1 +315 0x5000 //TX_A_POST_FILT_S_1 316 0x5000 //TX_A_POST_FILT_S_2 317 0x5000 //TX_A_POST_FILT_S_3 318 0x5000 //TX_A_POST_FILT_S_4 319 0x5000 //TX_A_POST_FILT_S_5 -320 0x5000 //TX_A_POST_FILT_S_6 +320 0x4000 //TX_A_POST_FILT_S_6 321 0x5000 //TX_A_POST_FILT_S_7 322 0x1000 //TX_B_POST_FILT_0 323 0x1000 //TX_B_POST_FILT_1 @@ -9152,10 +13738,10 @@ 377 0x7FFF //TX_NOISE_TH_5_4 378 0x044C //TX_NOISE_TH_6 379 0x0014 //TX_MINENOISE_TH -380 0x4000 //TX_MINENOISE_MIC0_TH_MTS -381 0xFFEE //TX_MINENOISE_MIC0_TH_EXP -382 0x6000 //TX_MINENOISE_MIC0_S_TH_MTS -383 0xFFF3 //TX_MINENOISE_MIC0_S_TH_EXP +380 0x4000 //TX_MORENS_TFMASK_TH +381 0xFFEE //TX_DRC_QUIET_FLOOR +382 0x6000 //TX_RATIODTL_CUT_TH +383 0xFFF3 //TX_DT_CUT_K1 384 0x0666 //TX_OUT_ENER_S_TH_CLEAN 385 0x0666 //TX_OUT_ENER_S_TH_LESSCLEAN 386 0x0333 //TX_OUT_ENER_S_TH_NOISY @@ -9163,15 +13749,15 @@ 388 0x0333 //TX_OUT_ENER_TH_SPEECH 389 0x2000 //TX_SN_NPB_GAIN 390 0x0000 //TX_NN_NPB_GAIN -391 0x0000 //TX_CSX_ALPHA_0 -392 0x0000 //TX_CSX_ALPHA_1 -393 0x0000 //TX_CSX_ALPHA_2 -394 0x0000 //TX_CSX_ALPHA_3 -395 0x0800 //TX_MU_ARSP_EST -396 0x00C8 //TX_P_OUTBEAM_MIN_TH +391 0x0000 //TX_POST_MASK_SUP_HSNE +392 0x0000 //TX_TAIL_DET_TH +393 0x0000 //TX_B_LESSCUT_RTO_WTA +394 0x0000 //TX_MEL_G_R +395 0x0800 //TX_SUPHIGH_TH +396 0x00C8 //TX_MASK_G_R 397 0x0002 //TX_EXTRA_NS_L -398 0x0800 //TX_EXTRA_NS_A -399 0x0005 //TX_VR_NOISE_FLOOR_TH +398 0x0800 //TX_C_POST_FLT_MASK +399 0x0005 //TX_A_POST_FLT_WNS 400 0x0148 //TX_MIN_G_LOW300HZ 401 0x0002 //TX_MAXLEVEL_CNG 402 0x00B4 //TX_STN_NOISE_TH @@ -9286,16 +13872,16 @@ 511 0x6666 //TX_MIC_TO_BFGAIN 512 0x0000 //TX_MICTOBFGAIN0 513 0x0000 //TX_FASTMUE_TH -514 0x0000 //TX_DERVB_LEN_0 -515 0x0000 //TX_DERVB_LEN_1 -516 0x0000 //TX_RHO_DERVB -517 0x0000 //TX_MIC_INDX_DERVB -518 0x0000 //TX_MU_DERVB -519 0x0000 //TX_DR_RESRV_0 -520 0x0000 //TX_DR_RESRV_1 -521 0x0000 //TX_DR_RESRV_2 -522 0x0000 //TX_DR_RESRV_3 -523 0x0000 //TX_DR_RESRV_4 +514 0x0000 //TX_DEREVERB_LF_MU +515 0x0000 //TX_DEREVERB_HF_MU +516 0x0000 //TX_DEREVERB_DELAY +517 0x0000 //TX_DEREVERB_COEF_LEN +518 0x0000 //TX_DEREVERB_DNR +519 0x0000 //TX_DEREVERB_ALPHA +520 0x0000 //TX_DEREVERB_BETA +521 0x0000 //TX_GSC_RTOL_TH +522 0x0000 //TX_GSC_RTOH_TH +523 0x0000 //TX_WIDE2_MEANHTH 524 0x0000 //TX_DR_RESRV_5 525 0x0000 //TX_DR_RESRV_6 526 0x0000 //TX_DR_RESRV_7 @@ -9669,8 +14255,73 @@ 894 0xC000 //TX_FASTNS_SSA_THHFL 895 0xCCCC //TX_FASTNS_SSA_THLFH 896 0xD999 //TX_FASTNS_SSA_THHFH +897 0x0000 //TX_SENDFUNC_REG_MICMUTE +898 0x0000 //TX_SENDFUNC_REG_MICMUTE1 +899 0x0000 //TX_MICMUTE_RATIO_THR +900 0x0000 //TX_MICMUTE_AMP_THR +901 0x0000 //TX_MICMUTE_HPF_IND +902 0x0000 //TX_MICMUTE_LOG_EYR_TH +903 0x0000 //TX_MICMUTE_CVG_TIME +904 0x0000 //TX_MICMUTE_RELEASE_TIME +905 0x0000 //TX_MIC_VOLUME_MIC0MUTE +906 0x0000 //TX_MICMUTE_EPD_OFFSET_0 +907 0x0000 //TX_MICMUTE_FRQ_AEC_L +908 0x0000 //TX_MICMUTE_EAD_THR +909 0x0000 //TX_MICMUTE_LAMBDA_CB_NLE +910 0x0000 //TX_MICMUTE_LAMBDA_RE_EST +911 0x0000 //TX_DTD_THR1_MICMUTE_0 +912 0x0000 //TX_DTD_THR1_MICMUTE_1 +913 0x0000 //TX_DTD_THR1_MICMUTE_2 +914 0x0000 //TX_DTD_THR1_MICMUTE_3 +915 0x0000 //TX_DTD_THR2_MICMUTE_0 +916 0x0000 //TX_MICMUTE_MIN_EQ_RE_EST_0 +917 0x0000 //TX_MICMUTE_MIN_EQ_RE_EST_1 +918 0x0000 //TX_MICMUTE_MIN_EQ_RE_EST_2 +919 0x0000 //TX_MICMUTE_MIN_EQ_RE_EST_3 +920 0x0000 //TX_MICMUTE_MIN_EQ_RE_EST_4 +921 0x0000 //TX_MICMUTE_C_POST_FLT +922 0x0000 //TX_MICMUTE_DT_CUT_K +923 0x0000 //TX_MICMUTE_DT_CUT_THR +924 0x0000 //TX_MICMUTE_DT_CUT_K2 +925 0x0000 //TX_MICMUTE_DT_CUT_THR2 +926 0x0000 //TX_MICMUTE_DT2_HOLD_N +927 0x0000 //TX_MICMUTE_RATIODTH_THCUT +928 0x0000 //TX_MICMUTE_B_POST_FLT_ECHOL +929 0x0000 //TX_MICMUTE_B_POST_FLT_ECHOH +930 0x0000 //TX_MICMUTE_C_POST_FLT_MASK +931 0x0000 //TX_MICMUTE_RATIODTL_CUT_TH +932 0x0000 //TX_MICMUTE_DT_CUT_K1 +933 0x0000 //TX_MICMUTE_N2_SN_EST +934 0x0000 //TX_MICMUTE_THR_SN_EST_0 +935 0x0000 //TX_MICMUTE_MIN_G_CTRL_0 +936 0x0000 //TX_MICMUTE_A_POST_FILT_S_0 +937 0x0000 //TX_MICMUTE_B_POST_FILT_0 +938 0x0000 //TX_MIC1RUB_AMP_THR +939 0x0000 //TX_MIC1MUTE_RATIO_THR +940 0x0000 //TX_MIC1MUTE_AMP_THR +941 0x0000 //TX_MIC1MUTE_CVG_TIME +942 0x0000 //TX_MIC1MUTE_RELEASE_TIME +943 0x0000 //TX_AMS_RESRV_01 +944 0x0000 //TX_AMS_RESRV_02 +945 0x0000 //TX_AMS_RESRV_03 +946 0x0000 //TX_AMS_RESRV_04 +947 0x0000 //TX_AMS_RESRV_05 +948 0x0000 //TX_AMS_RESRV_06 +949 0x0000 //TX_AMS_RESRV_07 +950 0x0000 //TX_AMS_RESRV_08 +951 0x0000 //TX_AMS_RESRV_09 +952 0x0000 //TX_AMS_RESRV_10 +953 0x0000 //TX_AMS_RESRV_11 +954 0x0000 //TX_AMS_RESRV_12 +955 0x0000 //TX_AMS_RESRV_13 +956 0x0000 //TX_AMS_RESRV_14 +957 0x0000 //TX_AMS_RESRV_15 +958 0x0000 //TX_AMS_RESRV_16 +959 0x0000 //TX_AMS_RESRV_17 +960 0x0000 //TX_AMS_RESRV_18 +961 0x0000 //TX_AMS_RESRV_19 #RX -0 0x006C //RX_RECVFUNC_MODE_0 +0 0x206C //RX_RECVFUNC_MODE_0 1 0x0000 //RX_RECVFUNC_MODE_1 2 0x0000 //RX_SAMPLINGFREQ_SIG 3 0x0000 //RX_SAMPLINGFREQ_PROC @@ -10520,10 +15171,862 @@ 110 0x0000 //RX_FDDRC_RESRV_0 129 0x0100 //RX_SPK_VOL 130 0x0000 //RX_VOL_RESRV_0 +#RX 2 +157 0x206C //RX_RECVFUNC_MODE_0 +158 0x0000 //RX_RECVFUNC_MODE_1 +159 0x0000 //RX_SAMPLINGFREQ_SIG +160 0x0000 //RX_SAMPLINGFREQ_PROC +161 0x000A //RX_FRAME_SZ +162 0x0000 //RX_DELAY_OPT +163 0x3000 //RX_TDDRC_ALPHA_UP_1 +164 0x3000 //RX_TDDRC_ALPHA_UP_2 +165 0x3000 //RX_TDDRC_ALPHA_UP_3 +166 0x3000 //RX_TDDRC_ALPHA_UP_4 +167 0x0800 //RX_PGA +168 0x7FFF //RX_A_HP +169 0x0000 //RX_B_PE +170 0x3800 //RX_THR_PITCH_DET_0 +171 0x3000 //RX_THR_PITCH_DET_1 +172 0x2800 //RX_THR_PITCH_DET_2 +173 0x0008 //RX_PITCH_BFR_LEN +174 0x0003 //RX_SBD_PITCH_DET +175 0x0100 //RX_PP_RESRV_0 +176 0x0020 //RX_PP_RESRV_1 +177 0x0600 //RX_N_SN_EST +178 0x000C //RX_N2_SN_EST +179 0x0010 //RX_NS_LVL_CTRL +180 0xF800 //RX_THR_SN_EST +181 0x7CCD //RX_LAMBDA_PFILT +182 0x000A //RX_FENS_RESRV_0 +183 0x0190 //RX_FENS_RESRV_1 +184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +187 0x0002 //RX_EXTRA_NS_L +188 0x0800 //RX_EXTRA_NS_A +189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +190 0x7FFF //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +192 0x199A //RX_A_POST_FLT +193 0x0000 //RX_LMT_THRD +194 0x4000 //RX_LMT_ALPHA +195 0x0014 //RX_FDEQ_SUBNUM +196 0x4848 //RX_FDEQ_GAIN_0 +197 0x4848 //RX_FDEQ_GAIN_1 +198 0x4848 //RX_FDEQ_GAIN_2 +199 0x4848 //RX_FDEQ_GAIN_3 +200 0x4848 //RX_FDEQ_GAIN_4 +201 0x4848 //RX_FDEQ_GAIN_5 +202 0x4444 //RX_FDEQ_GAIN_6 +203 0x4040 //RX_FDEQ_GAIN_7 +204 0x4040 //RX_FDEQ_GAIN_8 +205 0x4040 //RX_FDEQ_GAIN_9 +206 0x4848 //RX_FDEQ_GAIN_10 +207 0x4848 //RX_FDEQ_GAIN_11 +208 0x4848 //RX_FDEQ_GAIN_12 +209 0x4848 //RX_FDEQ_GAIN_13 +210 0x4848 //RX_FDEQ_GAIN_14 +211 0x4848 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0202 //RX_FDEQ_BIN_0 +221 0x0203 //RX_FDEQ_BIN_1 +222 0x0303 //RX_FDEQ_BIN_2 +223 0x0304 //RX_FDEQ_BIN_3 +224 0x0405 //RX_FDEQ_BIN_4 +225 0x0506 //RX_FDEQ_BIN_5 +226 0x0708 //RX_FDEQ_BIN_6 +227 0x090A //RX_FDEQ_BIN_7 +228 0x0B0C //RX_FDEQ_BIN_8 +229 0x0D0E //RX_FDEQ_BIN_9 +230 0x0000 //RX_FDEQ_BIN_10 +231 0x0000 //RX_FDEQ_BIN_11 +232 0x0000 //RX_FDEQ_BIN_12 +233 0x0000 //RX_FDEQ_BIN_13 +234 0x0000 //RX_FDEQ_BIN_14 +235 0x0000 //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x4000 //RX_FDEQ_RESRV_0 +245 0x0320 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0030 //RX_FDDRC_BAND_MARGIN_1 +248 0x0050 //RX_FDDRC_BAND_MARGIN_2 +249 0x0080 //RX_FDDRC_BAND_MARGIN_3 +250 0x0007 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x5000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x6400 //RX_FDDRC_THRD_3_2 +258 0x6400 //RX_FDDRC_THRD_3_3 +259 0x2000 //RX_FDDRC_SLANT_0_0 +260 0x2000 //RX_FDDRC_SLANT_0_1 +261 0x2000 //RX_FDDRC_SLANT_0_2 +262 0x2000 //RX_FDDRC_SLANT_0_3 +263 0x5333 //RX_FDDRC_SLANT_1_0 +264 0x5333 //RX_FDDRC_SLANT_1_1 +265 0x5333 //RX_FDDRC_SLANT_1_2 +266 0x5333 //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +268 0x0000 //RX_FILTINDX +269 0x0000 //RX_TDDRC_THRD_0 +270 0x0000 //RX_TDDRC_THRD_1 +271 0x7FFF //RX_TDDRC_THRD_2 +272 0x7FFF //RX_TDDRC_THRD_3 +273 0x7FFF //RX_TDDRC_SLANT_0 +274 0x7EB8 //RX_TDDRC_SLANT_1 +275 0x3000 //RX_TDDRC_ALPHA_UP_0 +276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x199A //RX_TDDRC_HMNC_GAIN +279 0x0001 //RX_TDDRC_SMT_FLAG +280 0x0CCD //RX_TDDRC_SMT_W +281 0x017F //RX_TDDRC_DRC_GAIN +282 0x7C00 //RX_LAMBDA_PKA_FP +283 0x2000 //RX_TPKA_FP +284 0x2000 //RX_MIN_G_FP +285 0x0080 //RX_MAX_G_FP +286 0x0100 //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 +288 0x0000 //RX_MAXLEVEL_CNG +289 0x3000 //RX_BWE_UV_TH +290 0x3000 //RX_BWE_UV_TH2 +291 0x1800 //RX_BWE_UV_TH3 +292 0x1000 //RX_BWE_V_TH +293 0x04CD //RX_BWE_GAIN1_V_TH1 +294 0x0F33 //RX_BWE_GAIN1_V_TH2 +295 0x7333 //RX_BWE_UV_EQ +296 0x199A //RX_BWE_V_EQ +297 0x7333 //RX_BWE_TONE_TH +298 0x0004 //RX_BWE_UV_HOLD_T +299 0x6CCD //RX_BWE_GAIN2_ALPHA +300 0x799A //RX_BWE_GAIN3_ALPHA +301 0x001E //RX_BWE_CUTOFF +302 0x3000 //RX_BWE_GAINFILL +303 0x3200 //RX_BWE_MAXTH_TONE +304 0x2000 //RX_BWE_EQ_0 +305 0x2000 //RX_BWE_EQ_1 +306 0x2000 //RX_BWE_EQ_2 +307 0x2000 //RX_BWE_EQ_3 +308 0x2000 //RX_BWE_EQ_4 +309 0x2000 //RX_BWE_EQ_5 +310 0x2000 //RX_BWE_EQ_6 +311 0x0000 //RX_BWE_RESRV_0 +312 0x0000 //RX_BWE_RESRV_1 +313 0x0000 //RX_BWE_RESRV_2 +#VOL 0 +163 0x3000 //RX_TDDRC_ALPHA_UP_1 +164 0x3000 //RX_TDDRC_ALPHA_UP_2 +165 0x3000 //RX_TDDRC_ALPHA_UP_3 +166 0x3000 //RX_TDDRC_ALPHA_UP_4 +184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +190 0x7FFF //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +269 0x0000 //RX_TDDRC_THRD_0 +270 0x0000 //RX_TDDRC_THRD_1 +271 0x7FFF //RX_TDDRC_THRD_2 +272 0x7FFF //RX_TDDRC_THRD_3 +273 0x7FFF //RX_TDDRC_SLANT_0 +274 0x7EB8 //RX_TDDRC_SLANT_1 +275 0x3000 //RX_TDDRC_ALPHA_UP_0 +276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x199A //RX_TDDRC_HMNC_GAIN +279 0x0001 //RX_TDDRC_SMT_FLAG +280 0x0CCD //RX_TDDRC_SMT_W +281 0x017F //RX_TDDRC_DRC_GAIN +195 0x0014 //RX_FDEQ_SUBNUM +196 0x4848 //RX_FDEQ_GAIN_0 +197 0x4848 //RX_FDEQ_GAIN_1 +198 0x4848 //RX_FDEQ_GAIN_2 +199 0x4848 //RX_FDEQ_GAIN_3 +200 0x4848 //RX_FDEQ_GAIN_4 +201 0x4848 //RX_FDEQ_GAIN_5 +202 0x4444 //RX_FDEQ_GAIN_6 +203 0x4040 //RX_FDEQ_GAIN_7 +204 0x4040 //RX_FDEQ_GAIN_8 +205 0x4040 //RX_FDEQ_GAIN_9 +206 0x4848 //RX_FDEQ_GAIN_10 +207 0x4848 //RX_FDEQ_GAIN_11 +208 0x4848 //RX_FDEQ_GAIN_12 +209 0x4848 //RX_FDEQ_GAIN_13 +210 0x4848 //RX_FDEQ_GAIN_14 +211 0x4848 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0202 //RX_FDEQ_BIN_0 +221 0x0203 //RX_FDEQ_BIN_1 +222 0x0303 //RX_FDEQ_BIN_2 +223 0x0304 //RX_FDEQ_BIN_3 +224 0x0405 //RX_FDEQ_BIN_4 +225 0x0506 //RX_FDEQ_BIN_5 +226 0x0708 //RX_FDEQ_BIN_6 +227 0x090A //RX_FDEQ_BIN_7 +228 0x0B0C //RX_FDEQ_BIN_8 +229 0x0D0E //RX_FDEQ_BIN_9 +230 0x0000 //RX_FDEQ_BIN_10 +231 0x0000 //RX_FDEQ_BIN_11 +232 0x0000 //RX_FDEQ_BIN_12 +233 0x0000 //RX_FDEQ_BIN_13 +234 0x0000 //RX_FDEQ_BIN_14 +235 0x0000 //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x4000 //RX_FDEQ_RESRV_0 +245 0x0320 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0030 //RX_FDDRC_BAND_MARGIN_1 +248 0x0050 //RX_FDDRC_BAND_MARGIN_2 +249 0x0080 //RX_FDDRC_BAND_MARGIN_3 +250 0x0007 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x5000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x6400 //RX_FDDRC_THRD_3_2 +258 0x6400 //RX_FDDRC_THRD_3_3 +259 0x2000 //RX_FDDRC_SLANT_0_0 +260 0x2000 //RX_FDDRC_SLANT_0_1 +261 0x2000 //RX_FDDRC_SLANT_0_2 +262 0x2000 //RX_FDDRC_SLANT_0_3 +263 0x5333 //RX_FDDRC_SLANT_1_0 +264 0x5333 //RX_FDDRC_SLANT_1_1 +265 0x5333 //RX_FDDRC_SLANT_1_2 +266 0x5333 //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +286 0x0100 //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 +#VOL 1 +163 0x3000 //RX_TDDRC_ALPHA_UP_1 +164 0x3000 //RX_TDDRC_ALPHA_UP_2 +165 0x3000 //RX_TDDRC_ALPHA_UP_3 +166 0x3000 //RX_TDDRC_ALPHA_UP_4 +184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +190 0x7FFF //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +269 0x0000 //RX_TDDRC_THRD_0 +270 0x0000 //RX_TDDRC_THRD_1 +271 0x7FFF //RX_TDDRC_THRD_2 +272 0x7FFF //RX_TDDRC_THRD_3 +273 0x7FFF //RX_TDDRC_SLANT_0 +274 0x7EB8 //RX_TDDRC_SLANT_1 +275 0x3000 //RX_TDDRC_ALPHA_UP_0 +276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x199A //RX_TDDRC_HMNC_GAIN +279 0x0001 //RX_TDDRC_SMT_FLAG +280 0x0CCD //RX_TDDRC_SMT_W +281 0x017F //RX_TDDRC_DRC_GAIN +195 0x0014 //RX_FDEQ_SUBNUM +196 0x4848 //RX_FDEQ_GAIN_0 +197 0x4848 //RX_FDEQ_GAIN_1 +198 0x4848 //RX_FDEQ_GAIN_2 +199 0x4848 //RX_FDEQ_GAIN_3 +200 0x4848 //RX_FDEQ_GAIN_4 +201 0x4848 //RX_FDEQ_GAIN_5 +202 0x4444 //RX_FDEQ_GAIN_6 +203 0x4040 //RX_FDEQ_GAIN_7 +204 0x4040 //RX_FDEQ_GAIN_8 +205 0x4040 //RX_FDEQ_GAIN_9 +206 0x4848 //RX_FDEQ_GAIN_10 +207 0x4848 //RX_FDEQ_GAIN_11 +208 0x4848 //RX_FDEQ_GAIN_12 +209 0x4848 //RX_FDEQ_GAIN_13 +210 0x4848 //RX_FDEQ_GAIN_14 +211 0x4848 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0202 //RX_FDEQ_BIN_0 +221 0x0203 //RX_FDEQ_BIN_1 +222 0x0303 //RX_FDEQ_BIN_2 +223 0x0304 //RX_FDEQ_BIN_3 +224 0x0405 //RX_FDEQ_BIN_4 +225 0x0506 //RX_FDEQ_BIN_5 +226 0x0708 //RX_FDEQ_BIN_6 +227 0x090A //RX_FDEQ_BIN_7 +228 0x0B0C //RX_FDEQ_BIN_8 +229 0x0D0E //RX_FDEQ_BIN_9 +230 0x0000 //RX_FDEQ_BIN_10 +231 0x0000 //RX_FDEQ_BIN_11 +232 0x0000 //RX_FDEQ_BIN_12 +233 0x0000 //RX_FDEQ_BIN_13 +234 0x0000 //RX_FDEQ_BIN_14 +235 0x0000 //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x4000 //RX_FDEQ_RESRV_0 +245 0x0320 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0030 //RX_FDDRC_BAND_MARGIN_1 +248 0x0050 //RX_FDDRC_BAND_MARGIN_2 +249 0x0080 //RX_FDDRC_BAND_MARGIN_3 +250 0x0007 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x5000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x6400 //RX_FDDRC_THRD_3_2 +258 0x6400 //RX_FDDRC_THRD_3_3 +259 0x2000 //RX_FDDRC_SLANT_0_0 +260 0x2000 //RX_FDDRC_SLANT_0_1 +261 0x2000 //RX_FDDRC_SLANT_0_2 +262 0x2000 //RX_FDDRC_SLANT_0_3 +263 0x5333 //RX_FDDRC_SLANT_1_0 +264 0x5333 //RX_FDDRC_SLANT_1_1 +265 0x5333 //RX_FDDRC_SLANT_1_2 +266 0x5333 //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +286 0x0100 //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 +#VOL 2 +163 0x3000 //RX_TDDRC_ALPHA_UP_1 +164 0x3000 //RX_TDDRC_ALPHA_UP_2 +165 0x3000 //RX_TDDRC_ALPHA_UP_3 +166 0x3000 //RX_TDDRC_ALPHA_UP_4 +184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +190 0x7FFF //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +269 0x0000 //RX_TDDRC_THRD_0 +270 0x0000 //RX_TDDRC_THRD_1 +271 0x7FFF //RX_TDDRC_THRD_2 +272 0x7FFF //RX_TDDRC_THRD_3 +273 0x7FFF //RX_TDDRC_SLANT_0 +274 0x7EB8 //RX_TDDRC_SLANT_1 +275 0x3000 //RX_TDDRC_ALPHA_UP_0 +276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x199A //RX_TDDRC_HMNC_GAIN +279 0x0001 //RX_TDDRC_SMT_FLAG +280 0x0CCD //RX_TDDRC_SMT_W +281 0x017F //RX_TDDRC_DRC_GAIN +195 0x0014 //RX_FDEQ_SUBNUM +196 0x4848 //RX_FDEQ_GAIN_0 +197 0x4848 //RX_FDEQ_GAIN_1 +198 0x4848 //RX_FDEQ_GAIN_2 +199 0x4848 //RX_FDEQ_GAIN_3 +200 0x4848 //RX_FDEQ_GAIN_4 +201 0x4848 //RX_FDEQ_GAIN_5 +202 0x4444 //RX_FDEQ_GAIN_6 +203 0x4040 //RX_FDEQ_GAIN_7 +204 0x4040 //RX_FDEQ_GAIN_8 +205 0x4040 //RX_FDEQ_GAIN_9 +206 0x4848 //RX_FDEQ_GAIN_10 +207 0x4848 //RX_FDEQ_GAIN_11 +208 0x4848 //RX_FDEQ_GAIN_12 +209 0x4848 //RX_FDEQ_GAIN_13 +210 0x4848 //RX_FDEQ_GAIN_14 +211 0x4848 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0202 //RX_FDEQ_BIN_0 +221 0x0203 //RX_FDEQ_BIN_1 +222 0x0303 //RX_FDEQ_BIN_2 +223 0x0304 //RX_FDEQ_BIN_3 +224 0x0405 //RX_FDEQ_BIN_4 +225 0x0506 //RX_FDEQ_BIN_5 +226 0x0708 //RX_FDEQ_BIN_6 +227 0x090A //RX_FDEQ_BIN_7 +228 0x0B0C //RX_FDEQ_BIN_8 +229 0x0D0E //RX_FDEQ_BIN_9 +230 0x0000 //RX_FDEQ_BIN_10 +231 0x0000 //RX_FDEQ_BIN_11 +232 0x0000 //RX_FDEQ_BIN_12 +233 0x0000 //RX_FDEQ_BIN_13 +234 0x0000 //RX_FDEQ_BIN_14 +235 0x0000 //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x4000 //RX_FDEQ_RESRV_0 +245 0x0320 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0030 //RX_FDDRC_BAND_MARGIN_1 +248 0x0050 //RX_FDDRC_BAND_MARGIN_2 +249 0x0080 //RX_FDDRC_BAND_MARGIN_3 +250 0x0007 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x5000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x6400 //RX_FDDRC_THRD_3_2 +258 0x6400 //RX_FDDRC_THRD_3_3 +259 0x2000 //RX_FDDRC_SLANT_0_0 +260 0x2000 //RX_FDDRC_SLANT_0_1 +261 0x2000 //RX_FDDRC_SLANT_0_2 +262 0x2000 //RX_FDDRC_SLANT_0_3 +263 0x5333 //RX_FDDRC_SLANT_1_0 +264 0x5333 //RX_FDDRC_SLANT_1_1 +265 0x5333 //RX_FDDRC_SLANT_1_2 +266 0x5333 //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +286 0x0100 //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 +#VOL 3 +163 0x3000 //RX_TDDRC_ALPHA_UP_1 +164 0x3000 //RX_TDDRC_ALPHA_UP_2 +165 0x3000 //RX_TDDRC_ALPHA_UP_3 +166 0x3000 //RX_TDDRC_ALPHA_UP_4 +184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +190 0x7FFF //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +269 0x0000 //RX_TDDRC_THRD_0 +270 0x0000 //RX_TDDRC_THRD_1 +271 0x7FFF //RX_TDDRC_THRD_2 +272 0x7FFF //RX_TDDRC_THRD_3 +273 0x7FFF //RX_TDDRC_SLANT_0 +274 0x7EB8 //RX_TDDRC_SLANT_1 +275 0x3000 //RX_TDDRC_ALPHA_UP_0 +276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x199A //RX_TDDRC_HMNC_GAIN +279 0x0001 //RX_TDDRC_SMT_FLAG +280 0x0CCD //RX_TDDRC_SMT_W +281 0x017F //RX_TDDRC_DRC_GAIN +195 0x0014 //RX_FDEQ_SUBNUM +196 0x4848 //RX_FDEQ_GAIN_0 +197 0x4848 //RX_FDEQ_GAIN_1 +198 0x4848 //RX_FDEQ_GAIN_2 +199 0x4848 //RX_FDEQ_GAIN_3 +200 0x4848 //RX_FDEQ_GAIN_4 +201 0x4848 //RX_FDEQ_GAIN_5 +202 0x4444 //RX_FDEQ_GAIN_6 +203 0x4040 //RX_FDEQ_GAIN_7 +204 0x4040 //RX_FDEQ_GAIN_8 +205 0x4040 //RX_FDEQ_GAIN_9 +206 0x4848 //RX_FDEQ_GAIN_10 +207 0x4848 //RX_FDEQ_GAIN_11 +208 0x4848 //RX_FDEQ_GAIN_12 +209 0x4848 //RX_FDEQ_GAIN_13 +210 0x4848 //RX_FDEQ_GAIN_14 +211 0x4848 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0202 //RX_FDEQ_BIN_0 +221 0x0203 //RX_FDEQ_BIN_1 +222 0x0303 //RX_FDEQ_BIN_2 +223 0x0304 //RX_FDEQ_BIN_3 +224 0x0405 //RX_FDEQ_BIN_4 +225 0x0506 //RX_FDEQ_BIN_5 +226 0x0708 //RX_FDEQ_BIN_6 +227 0x090A //RX_FDEQ_BIN_7 +228 0x0B0C //RX_FDEQ_BIN_8 +229 0x0D0E //RX_FDEQ_BIN_9 +230 0x0000 //RX_FDEQ_BIN_10 +231 0x0000 //RX_FDEQ_BIN_11 +232 0x0000 //RX_FDEQ_BIN_12 +233 0x0000 //RX_FDEQ_BIN_13 +234 0x0000 //RX_FDEQ_BIN_14 +235 0x0000 //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x4000 //RX_FDEQ_RESRV_0 +245 0x0320 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0030 //RX_FDDRC_BAND_MARGIN_1 +248 0x0050 //RX_FDDRC_BAND_MARGIN_2 +249 0x0080 //RX_FDDRC_BAND_MARGIN_3 +250 0x0007 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x5000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x6400 //RX_FDDRC_THRD_3_2 +258 0x6400 //RX_FDDRC_THRD_3_3 +259 0x2000 //RX_FDDRC_SLANT_0_0 +260 0x2000 //RX_FDDRC_SLANT_0_1 +261 0x2000 //RX_FDDRC_SLANT_0_2 +262 0x2000 //RX_FDDRC_SLANT_0_3 +263 0x5333 //RX_FDDRC_SLANT_1_0 +264 0x5333 //RX_FDDRC_SLANT_1_1 +265 0x5333 //RX_FDDRC_SLANT_1_2 +266 0x5333 //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +286 0x0100 //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 +#VOL 4 +163 0x3000 //RX_TDDRC_ALPHA_UP_1 +164 0x3000 //RX_TDDRC_ALPHA_UP_2 +165 0x3000 //RX_TDDRC_ALPHA_UP_3 +166 0x3000 //RX_TDDRC_ALPHA_UP_4 +184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +190 0x7FFF //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +269 0x0000 //RX_TDDRC_THRD_0 +270 0x0000 //RX_TDDRC_THRD_1 +271 0x7FFF //RX_TDDRC_THRD_2 +272 0x7FFF //RX_TDDRC_THRD_3 +273 0x7FFF //RX_TDDRC_SLANT_0 +274 0x7EB8 //RX_TDDRC_SLANT_1 +275 0x3000 //RX_TDDRC_ALPHA_UP_0 +276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x199A //RX_TDDRC_HMNC_GAIN +279 0x0001 //RX_TDDRC_SMT_FLAG +280 0x0CCD //RX_TDDRC_SMT_W +281 0x017F //RX_TDDRC_DRC_GAIN +195 0x0014 //RX_FDEQ_SUBNUM +196 0x4848 //RX_FDEQ_GAIN_0 +197 0x4848 //RX_FDEQ_GAIN_1 +198 0x4848 //RX_FDEQ_GAIN_2 +199 0x4848 //RX_FDEQ_GAIN_3 +200 0x4848 //RX_FDEQ_GAIN_4 +201 0x4848 //RX_FDEQ_GAIN_5 +202 0x4444 //RX_FDEQ_GAIN_6 +203 0x4040 //RX_FDEQ_GAIN_7 +204 0x4040 //RX_FDEQ_GAIN_8 +205 0x4040 //RX_FDEQ_GAIN_9 +206 0x4848 //RX_FDEQ_GAIN_10 +207 0x4848 //RX_FDEQ_GAIN_11 +208 0x4848 //RX_FDEQ_GAIN_12 +209 0x4848 //RX_FDEQ_GAIN_13 +210 0x4848 //RX_FDEQ_GAIN_14 +211 0x4848 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0202 //RX_FDEQ_BIN_0 +221 0x0203 //RX_FDEQ_BIN_1 +222 0x0303 //RX_FDEQ_BIN_2 +223 0x0304 //RX_FDEQ_BIN_3 +224 0x0405 //RX_FDEQ_BIN_4 +225 0x0506 //RX_FDEQ_BIN_5 +226 0x0708 //RX_FDEQ_BIN_6 +227 0x090A //RX_FDEQ_BIN_7 +228 0x0B0C //RX_FDEQ_BIN_8 +229 0x0D0E //RX_FDEQ_BIN_9 +230 0x0000 //RX_FDEQ_BIN_10 +231 0x0000 //RX_FDEQ_BIN_11 +232 0x0000 //RX_FDEQ_BIN_12 +233 0x0000 //RX_FDEQ_BIN_13 +234 0x0000 //RX_FDEQ_BIN_14 +235 0x0000 //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x4000 //RX_FDEQ_RESRV_0 +245 0x0320 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0030 //RX_FDDRC_BAND_MARGIN_1 +248 0x0050 //RX_FDDRC_BAND_MARGIN_2 +249 0x0080 //RX_FDDRC_BAND_MARGIN_3 +250 0x0007 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x5000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x6400 //RX_FDDRC_THRD_3_2 +258 0x6400 //RX_FDDRC_THRD_3_3 +259 0x2000 //RX_FDDRC_SLANT_0_0 +260 0x2000 //RX_FDDRC_SLANT_0_1 +261 0x2000 //RX_FDDRC_SLANT_0_2 +262 0x2000 //RX_FDDRC_SLANT_0_3 +263 0x5333 //RX_FDDRC_SLANT_1_0 +264 0x5333 //RX_FDDRC_SLANT_1_1 +265 0x5333 //RX_FDDRC_SLANT_1_2 +266 0x5333 //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +286 0x0100 //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 +#VOL 5 +163 0x3000 //RX_TDDRC_ALPHA_UP_1 +164 0x3000 //RX_TDDRC_ALPHA_UP_2 +165 0x3000 //RX_TDDRC_ALPHA_UP_3 +166 0x3000 //RX_TDDRC_ALPHA_UP_4 +184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +190 0x7FFF //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +269 0x0000 //RX_TDDRC_THRD_0 +270 0x0000 //RX_TDDRC_THRD_1 +271 0x7FFF //RX_TDDRC_THRD_2 +272 0x7FFF //RX_TDDRC_THRD_3 +273 0x7FFF //RX_TDDRC_SLANT_0 +274 0x7EB8 //RX_TDDRC_SLANT_1 +275 0x3000 //RX_TDDRC_ALPHA_UP_0 +276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x199A //RX_TDDRC_HMNC_GAIN +279 0x0001 //RX_TDDRC_SMT_FLAG +280 0x0CCD //RX_TDDRC_SMT_W +281 0x017F //RX_TDDRC_DRC_GAIN +195 0x0014 //RX_FDEQ_SUBNUM +196 0x4848 //RX_FDEQ_GAIN_0 +197 0x4848 //RX_FDEQ_GAIN_1 +198 0x4848 //RX_FDEQ_GAIN_2 +199 0x4848 //RX_FDEQ_GAIN_3 +200 0x4848 //RX_FDEQ_GAIN_4 +201 0x4848 //RX_FDEQ_GAIN_5 +202 0x4444 //RX_FDEQ_GAIN_6 +203 0x4040 //RX_FDEQ_GAIN_7 +204 0x4040 //RX_FDEQ_GAIN_8 +205 0x4040 //RX_FDEQ_GAIN_9 +206 0x4848 //RX_FDEQ_GAIN_10 +207 0x4848 //RX_FDEQ_GAIN_11 +208 0x4848 //RX_FDEQ_GAIN_12 +209 0x4848 //RX_FDEQ_GAIN_13 +210 0x4848 //RX_FDEQ_GAIN_14 +211 0x4848 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0202 //RX_FDEQ_BIN_0 +221 0x0203 //RX_FDEQ_BIN_1 +222 0x0303 //RX_FDEQ_BIN_2 +223 0x0304 //RX_FDEQ_BIN_3 +224 0x0405 //RX_FDEQ_BIN_4 +225 0x0506 //RX_FDEQ_BIN_5 +226 0x0708 //RX_FDEQ_BIN_6 +227 0x090A //RX_FDEQ_BIN_7 +228 0x0B0C //RX_FDEQ_BIN_8 +229 0x0D0E //RX_FDEQ_BIN_9 +230 0x0000 //RX_FDEQ_BIN_10 +231 0x0000 //RX_FDEQ_BIN_11 +232 0x0000 //RX_FDEQ_BIN_12 +233 0x0000 //RX_FDEQ_BIN_13 +234 0x0000 //RX_FDEQ_BIN_14 +235 0x0000 //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x4000 //RX_FDEQ_RESRV_0 +245 0x0320 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0030 //RX_FDDRC_BAND_MARGIN_1 +248 0x0050 //RX_FDDRC_BAND_MARGIN_2 +249 0x0080 //RX_FDDRC_BAND_MARGIN_3 +250 0x0007 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x5000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x6400 //RX_FDDRC_THRD_3_2 +258 0x6400 //RX_FDDRC_THRD_3_3 +259 0x2000 //RX_FDDRC_SLANT_0_0 +260 0x2000 //RX_FDDRC_SLANT_0_1 +261 0x2000 //RX_FDDRC_SLANT_0_2 +262 0x2000 //RX_FDDRC_SLANT_0_3 +263 0x5333 //RX_FDDRC_SLANT_1_0 +264 0x5333 //RX_FDDRC_SLANT_1_1 +265 0x5333 //RX_FDDRC_SLANT_1_2 +266 0x5333 //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +286 0x0100 //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 +#VOL 6 +163 0x3000 //RX_TDDRC_ALPHA_UP_1 +164 0x3000 //RX_TDDRC_ALPHA_UP_2 +165 0x3000 //RX_TDDRC_ALPHA_UP_3 +166 0x3000 //RX_TDDRC_ALPHA_UP_4 +184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +190 0x7FFF //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +269 0x0000 //RX_TDDRC_THRD_0 +270 0x0000 //RX_TDDRC_THRD_1 +271 0x7FFF //RX_TDDRC_THRD_2 +272 0x7FFF //RX_TDDRC_THRD_3 +273 0x7FFF //RX_TDDRC_SLANT_0 +274 0x7EB8 //RX_TDDRC_SLANT_1 +275 0x3000 //RX_TDDRC_ALPHA_UP_0 +276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x199A //RX_TDDRC_HMNC_GAIN +279 0x0001 //RX_TDDRC_SMT_FLAG +280 0x0CCD //RX_TDDRC_SMT_W +281 0x017F //RX_TDDRC_DRC_GAIN +195 0x0014 //RX_FDEQ_SUBNUM +196 0x4848 //RX_FDEQ_GAIN_0 +197 0x4848 //RX_FDEQ_GAIN_1 +198 0x4848 //RX_FDEQ_GAIN_2 +199 0x4848 //RX_FDEQ_GAIN_3 +200 0x4848 //RX_FDEQ_GAIN_4 +201 0x4848 //RX_FDEQ_GAIN_5 +202 0x4444 //RX_FDEQ_GAIN_6 +203 0x4040 //RX_FDEQ_GAIN_7 +204 0x4040 //RX_FDEQ_GAIN_8 +205 0x4040 //RX_FDEQ_GAIN_9 +206 0x4848 //RX_FDEQ_GAIN_10 +207 0x4848 //RX_FDEQ_GAIN_11 +208 0x4848 //RX_FDEQ_GAIN_12 +209 0x4848 //RX_FDEQ_GAIN_13 +210 0x4848 //RX_FDEQ_GAIN_14 +211 0x4848 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0202 //RX_FDEQ_BIN_0 +221 0x0203 //RX_FDEQ_BIN_1 +222 0x0303 //RX_FDEQ_BIN_2 +223 0x0304 //RX_FDEQ_BIN_3 +224 0x0405 //RX_FDEQ_BIN_4 +225 0x0506 //RX_FDEQ_BIN_5 +226 0x0708 //RX_FDEQ_BIN_6 +227 0x090A //RX_FDEQ_BIN_7 +228 0x0B0C //RX_FDEQ_BIN_8 +229 0x0D0E //RX_FDEQ_BIN_9 +230 0x0000 //RX_FDEQ_BIN_10 +231 0x0000 //RX_FDEQ_BIN_11 +232 0x0000 //RX_FDEQ_BIN_12 +233 0x0000 //RX_FDEQ_BIN_13 +234 0x0000 //RX_FDEQ_BIN_14 +235 0x0000 //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x4000 //RX_FDEQ_RESRV_0 +245 0x0320 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0030 //RX_FDDRC_BAND_MARGIN_1 +248 0x0050 //RX_FDDRC_BAND_MARGIN_2 +249 0x0080 //RX_FDDRC_BAND_MARGIN_3 +250 0x0007 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x5000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x6400 //RX_FDDRC_THRD_3_2 +258 0x6400 //RX_FDDRC_THRD_3_3 +259 0x2000 //RX_FDDRC_SLANT_0_0 +260 0x2000 //RX_FDDRC_SLANT_0_1 +261 0x2000 //RX_FDDRC_SLANT_0_2 +262 0x2000 //RX_FDDRC_SLANT_0_3 +263 0x5333 //RX_FDDRC_SLANT_1_0 +264 0x5333 //RX_FDDRC_SLANT_1_1 +265 0x5333 //RX_FDDRC_SLANT_1_2 +266 0x5333 //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +286 0x0100 //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 #CASE_NAME BLUETOOTH-BTNB-VOICE_GENERIC-WB -#PARAM_TYPE TX+RX -#TOTAL_CUSTOM_STEP 7 +#PARAM_MODE Full +#PARAM_TYPE TX+2RX +#TOTAL_CUSTOM_STEP 7+7 #TX 0 0x0008 //TX_OPERATION_MODE_0 1 0x0008 //TX_OPERATION_MODE_1 @@ -10776,20 +16279,20 @@ 248 0xF400 //TX_THR_SN_EST_6 249 0xF600 //TX_THR_SN_EST_7 250 0x0000 //TX_DELTA_THR_SN_EST_0 -251 0x0000 //TX_DELTA_THR_SN_EST_1 +251 0x0200 //TX_DELTA_THR_SN_EST_1 252 0x0200 //TX_DELTA_THR_SN_EST_2 253 0x0200 //TX_DELTA_THR_SN_EST_3 254 0x0200 //TX_DELTA_THR_SN_EST_4 255 0x0200 //TX_DELTA_THR_SN_EST_5 -256 0x0200 //TX_DELTA_THR_SN_EST_6 +256 0x0000 //TX_DELTA_THR_SN_EST_6 257 0x0200 //TX_DELTA_THR_SN_EST_7 258 0x6000 //TX_LAMBDA_NN_EST_0 -259 0x6000 //TX_LAMBDA_NN_EST_1 +259 0x4000 //TX_LAMBDA_NN_EST_1 260 0x4000 //TX_LAMBDA_NN_EST_2 261 0x4000 //TX_LAMBDA_NN_EST_3 262 0x4000 //TX_LAMBDA_NN_EST_4 263 0x4000 //TX_LAMBDA_NN_EST_5 -264 0x4000 //TX_LAMBDA_NN_EST_6 +264 0x6000 //TX_LAMBDA_NN_EST_6 265 0x4000 //TX_LAMBDA_NN_EST_7 266 0x0400 //TX_N_SN_EST 267 0x001E //TX_INBEAM_T @@ -10807,16 +16310,16 @@ 279 0x1000 //TX_B_POST_FLT_0 280 0x1000 //TX_B_POST_FLT_1 281 0x000F //TX_NS_LVL_CTRL_0 -282 0x000F //TX_NS_LVL_CTRL_1 -283 0x0011 //TX_NS_LVL_CTRL_2 +282 0x0011 //TX_NS_LVL_CTRL_1 +283 0x000F //TX_NS_LVL_CTRL_2 284 0x000F //TX_NS_LVL_CTRL_3 285 0x000F //TX_NS_LVL_CTRL_4 286 0x000F //TX_NS_LVL_CTRL_5 287 0x000F //TX_NS_LVL_CTRL_6 288 0x0011 //TX_NS_LVL_CTRL_7 289 0x000C //TX_MIN_GAIN_S_0 -290 0x000C //TX_MIN_GAIN_S_1 -291 0x000F //TX_MIN_GAIN_S_2 +290 0x000F //TX_MIN_GAIN_S_1 +291 0x000C //TX_MIN_GAIN_S_2 292 0x000C //TX_MIN_GAIN_S_3 293 0x000C //TX_MIN_GAIN_S_4 294 0x000C //TX_MIN_GAIN_S_5 @@ -10840,12 +16343,12 @@ 312 0x7FFF //TX_A_POST_FILT_0 313 0x2000 //TX_A_POST_FILT_1 314 0x4000 //TX_A_POST_FILT_S_0 -315 0x4000 //TX_A_POST_FILT_S_1 +315 0x5000 //TX_A_POST_FILT_S_1 316 0x5000 //TX_A_POST_FILT_S_2 317 0x5000 //TX_A_POST_FILT_S_3 318 0x5000 //TX_A_POST_FILT_S_4 319 0x5000 //TX_A_POST_FILT_S_5 -320 0x5000 //TX_A_POST_FILT_S_6 +320 0x4000 //TX_A_POST_FILT_S_6 321 0x5000 //TX_A_POST_FILT_S_7 322 0x1000 //TX_B_POST_FILT_0 323 0x1000 //TX_B_POST_FILT_1 @@ -10905,10 +16408,10 @@ 377 0x7FFF //TX_NOISE_TH_5_4 378 0x044C //TX_NOISE_TH_6 379 0x0014 //TX_MINENOISE_TH -380 0x4000 //TX_MINENOISE_MIC0_TH_MTS -381 0xFFEE //TX_MINENOISE_MIC0_TH_EXP -382 0x6000 //TX_MINENOISE_MIC0_S_TH_MTS -383 0xFFF3 //TX_MINENOISE_MIC0_S_TH_EXP +380 0x4000 //TX_MORENS_TFMASK_TH +381 0xFFEE //TX_DRC_QUIET_FLOOR +382 0x6000 //TX_RATIODTL_CUT_TH +383 0xFFF3 //TX_DT_CUT_K1 384 0x0666 //TX_OUT_ENER_S_TH_CLEAN 385 0x0666 //TX_OUT_ENER_S_TH_LESSCLEAN 386 0x0333 //TX_OUT_ENER_S_TH_NOISY @@ -10916,15 +16419,15 @@ 388 0x0333 //TX_OUT_ENER_TH_SPEECH 389 0x2000 //TX_SN_NPB_GAIN 390 0x0000 //TX_NN_NPB_GAIN -391 0x0000 //TX_CSX_ALPHA_0 -392 0x0000 //TX_CSX_ALPHA_1 -393 0x0000 //TX_CSX_ALPHA_2 -394 0x0000 //TX_CSX_ALPHA_3 -395 0x0800 //TX_MU_ARSP_EST -396 0x00C8 //TX_P_OUTBEAM_MIN_TH +391 0x0000 //TX_POST_MASK_SUP_HSNE +392 0x0000 //TX_TAIL_DET_TH +393 0x0000 //TX_B_LESSCUT_RTO_WTA +394 0x0000 //TX_MEL_G_R +395 0x0800 //TX_SUPHIGH_TH +396 0x00C8 //TX_MASK_G_R 397 0x0002 //TX_EXTRA_NS_L -398 0x0800 //TX_EXTRA_NS_A -399 0x0005 //TX_VR_NOISE_FLOOR_TH +398 0x0800 //TX_C_POST_FLT_MASK +399 0x0005 //TX_A_POST_FLT_WNS 400 0x0148 //TX_MIN_G_LOW300HZ 401 0x0002 //TX_MAXLEVEL_CNG 402 0x00B4 //TX_STN_NOISE_TH @@ -11039,16 +16542,16 @@ 511 0x6666 //TX_MIC_TO_BFGAIN 512 0x0000 //TX_MICTOBFGAIN0 513 0x0000 //TX_FASTMUE_TH -514 0x0000 //TX_DERVB_LEN_0 -515 0x0000 //TX_DERVB_LEN_1 -516 0x0000 //TX_RHO_DERVB -517 0x0000 //TX_MIC_INDX_DERVB -518 0x0000 //TX_MU_DERVB -519 0x0000 //TX_DR_RESRV_0 -520 0x0000 //TX_DR_RESRV_1 -521 0x0000 //TX_DR_RESRV_2 -522 0x0000 //TX_DR_RESRV_3 -523 0x0000 //TX_DR_RESRV_4 +514 0x0000 //TX_DEREVERB_LF_MU +515 0x0000 //TX_DEREVERB_HF_MU +516 0x0000 //TX_DEREVERB_DELAY +517 0x0000 //TX_DEREVERB_COEF_LEN +518 0x0000 //TX_DEREVERB_DNR +519 0x0000 //TX_DEREVERB_ALPHA +520 0x0000 //TX_DEREVERB_BETA +521 0x0000 //TX_GSC_RTOL_TH +522 0x0000 //TX_GSC_RTOH_TH +523 0x0000 //TX_WIDE2_MEANHTH 524 0x0000 //TX_DR_RESRV_5 525 0x0000 //TX_DR_RESRV_6 526 0x0000 //TX_DR_RESRV_7 @@ -11422,8 +16925,73 @@ 894 0xC000 //TX_FASTNS_SSA_THHFL 895 0xCCCC //TX_FASTNS_SSA_THLFH 896 0xD999 //TX_FASTNS_SSA_THHFH +897 0x0000 //TX_SENDFUNC_REG_MICMUTE +898 0x0000 //TX_SENDFUNC_REG_MICMUTE1 +899 0x0000 //TX_MICMUTE_RATIO_THR +900 0x0000 //TX_MICMUTE_AMP_THR +901 0x0000 //TX_MICMUTE_HPF_IND +902 0x0000 //TX_MICMUTE_LOG_EYR_TH +903 0x0000 //TX_MICMUTE_CVG_TIME +904 0x0000 //TX_MICMUTE_RELEASE_TIME +905 0x0000 //TX_MIC_VOLUME_MIC0MUTE +906 0x0000 //TX_MICMUTE_EPD_OFFSET_0 +907 0x0000 //TX_MICMUTE_FRQ_AEC_L +908 0x0000 //TX_MICMUTE_EAD_THR +909 0x0000 //TX_MICMUTE_LAMBDA_CB_NLE +910 0x0000 //TX_MICMUTE_LAMBDA_RE_EST +911 0x0000 //TX_DTD_THR1_MICMUTE_0 +912 0x0000 //TX_DTD_THR1_MICMUTE_1 +913 0x0000 //TX_DTD_THR1_MICMUTE_2 +914 0x0000 //TX_DTD_THR1_MICMUTE_3 +915 0x0000 //TX_DTD_THR2_MICMUTE_0 +916 0x0000 //TX_MICMUTE_MIN_EQ_RE_EST_0 +917 0x0000 //TX_MICMUTE_MIN_EQ_RE_EST_1 +918 0x0000 //TX_MICMUTE_MIN_EQ_RE_EST_2 +919 0x0000 //TX_MICMUTE_MIN_EQ_RE_EST_3 +920 0x0000 //TX_MICMUTE_MIN_EQ_RE_EST_4 +921 0x0000 //TX_MICMUTE_C_POST_FLT +922 0x0000 //TX_MICMUTE_DT_CUT_K +923 0x0000 //TX_MICMUTE_DT_CUT_THR +924 0x0000 //TX_MICMUTE_DT_CUT_K2 +925 0x0000 //TX_MICMUTE_DT_CUT_THR2 +926 0x0000 //TX_MICMUTE_DT2_HOLD_N +927 0x0000 //TX_MICMUTE_RATIODTH_THCUT +928 0x0000 //TX_MICMUTE_B_POST_FLT_ECHOL +929 0x0000 //TX_MICMUTE_B_POST_FLT_ECHOH +930 0x0000 //TX_MICMUTE_C_POST_FLT_MASK +931 0x0000 //TX_MICMUTE_RATIODTL_CUT_TH +932 0x0000 //TX_MICMUTE_DT_CUT_K1 +933 0x0000 //TX_MICMUTE_N2_SN_EST +934 0x0000 //TX_MICMUTE_THR_SN_EST_0 +935 0x0000 //TX_MICMUTE_MIN_G_CTRL_0 +936 0x0000 //TX_MICMUTE_A_POST_FILT_S_0 +937 0x0000 //TX_MICMUTE_B_POST_FILT_0 +938 0x0000 //TX_MIC1RUB_AMP_THR +939 0x0000 //TX_MIC1MUTE_RATIO_THR +940 0x0000 //TX_MIC1MUTE_AMP_THR +941 0x0000 //TX_MIC1MUTE_CVG_TIME +942 0x0000 //TX_MIC1MUTE_RELEASE_TIME +943 0x0000 //TX_AMS_RESRV_01 +944 0x0000 //TX_AMS_RESRV_02 +945 0x0000 //TX_AMS_RESRV_03 +946 0x0000 //TX_AMS_RESRV_04 +947 0x0000 //TX_AMS_RESRV_05 +948 0x0000 //TX_AMS_RESRV_06 +949 0x0000 //TX_AMS_RESRV_07 +950 0x0000 //TX_AMS_RESRV_08 +951 0x0000 //TX_AMS_RESRV_09 +952 0x0000 //TX_AMS_RESRV_10 +953 0x0000 //TX_AMS_RESRV_11 +954 0x0000 //TX_AMS_RESRV_12 +955 0x0000 //TX_AMS_RESRV_13 +956 0x0000 //TX_AMS_RESRV_14 +957 0x0000 //TX_AMS_RESRV_15 +958 0x0000 //TX_AMS_RESRV_16 +959 0x0000 //TX_AMS_RESRV_17 +960 0x0000 //TX_AMS_RESRV_18 +961 0x0000 //TX_AMS_RESRV_19 #RX -0 0x006C //RX_RECVFUNC_MODE_0 +0 0x206C //RX_RECVFUNC_MODE_0 1 0x0000 //RX_RECVFUNC_MODE_1 2 0x0001 //RX_SAMPLINGFREQ_SIG 3 0x0001 //RX_SAMPLINGFREQ_PROC @@ -12273,10 +17841,862 @@ 110 0x0000 //RX_FDDRC_RESRV_0 129 0x0100 //RX_SPK_VOL 130 0x0000 //RX_VOL_RESRV_0 +#RX 2 +157 0x206C //RX_RECVFUNC_MODE_0 +158 0x0000 //RX_RECVFUNC_MODE_1 +159 0x0001 //RX_SAMPLINGFREQ_SIG +160 0x0001 //RX_SAMPLINGFREQ_PROC +161 0x000A //RX_FRAME_SZ +162 0x0000 //RX_DELAY_OPT +163 0x1000 //RX_TDDRC_ALPHA_UP_1 +164 0x1000 //RX_TDDRC_ALPHA_UP_2 +165 0x1000 //RX_TDDRC_ALPHA_UP_3 +166 0x1000 //RX_TDDRC_ALPHA_UP_4 +167 0x0800 //RX_PGA +168 0x7FFF //RX_A_HP +169 0x4000 //RX_B_PE +170 0x3800 //RX_THR_PITCH_DET_0 +171 0x3000 //RX_THR_PITCH_DET_1 +172 0x2800 //RX_THR_PITCH_DET_2 +173 0x0008 //RX_PITCH_BFR_LEN +174 0x0003 //RX_SBD_PITCH_DET +175 0x0100 //RX_PP_RESRV_0 +176 0x0020 //RX_PP_RESRV_1 +177 0x0600 //RX_N_SN_EST +178 0x000C //RX_N2_SN_EST +179 0x0010 //RX_NS_LVL_CTRL +180 0xF800 //RX_THR_SN_EST +181 0x7CCD //RX_LAMBDA_PFILT +182 0x000A //RX_FENS_RESRV_0 +183 0x0190 //RX_FENS_RESRV_1 +184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +187 0x0002 //RX_EXTRA_NS_L +188 0x0800 //RX_EXTRA_NS_A +189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +190 0x7FFF //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +192 0x199A //RX_A_POST_FLT +193 0x0000 //RX_LMT_THRD +194 0x4000 //RX_LMT_ALPHA +195 0x001C //RX_FDEQ_SUBNUM +196 0x4848 //RX_FDEQ_GAIN_0 +197 0x4848 //RX_FDEQ_GAIN_1 +198 0x4848 //RX_FDEQ_GAIN_2 +199 0x4848 //RX_FDEQ_GAIN_3 +200 0x4848 //RX_FDEQ_GAIN_4 +201 0x4848 //RX_FDEQ_GAIN_5 +202 0x4848 //RX_FDEQ_GAIN_6 +203 0x4848 //RX_FDEQ_GAIN_7 +204 0x4848 //RX_FDEQ_GAIN_8 +205 0x3C3C //RX_FDEQ_GAIN_9 +206 0x3C3C //RX_FDEQ_GAIN_10 +207 0x3838 //RX_FDEQ_GAIN_11 +208 0x3838 //RX_FDEQ_GAIN_12 +209 0x3030 //RX_FDEQ_GAIN_13 +210 0x4848 //RX_FDEQ_GAIN_14 +211 0x4848 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0202 //RX_FDEQ_BIN_0 +221 0x0203 //RX_FDEQ_BIN_1 +222 0x0303 //RX_FDEQ_BIN_2 +223 0x0304 //RX_FDEQ_BIN_3 +224 0x0405 //RX_FDEQ_BIN_4 +225 0x0506 //RX_FDEQ_BIN_5 +226 0x0708 //RX_FDEQ_BIN_6 +227 0x090A //RX_FDEQ_BIN_7 +228 0x0B0C //RX_FDEQ_BIN_8 +229 0x0D0E //RX_FDEQ_BIN_9 +230 0x0E0F //RX_FDEQ_BIN_10 +231 0x0F10 //RX_FDEQ_BIN_11 +232 0x1011 //RX_FDEQ_BIN_12 +233 0x1112 //RX_FDEQ_BIN_13 +234 0x0000 //RX_FDEQ_BIN_14 +235 0x0000 //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x4000 //RX_FDEQ_RESRV_0 +245 0x0320 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0030 //RX_FDDRC_BAND_MARGIN_1 +248 0x0050 //RX_FDDRC_BAND_MARGIN_2 +249 0x0080 //RX_FDDRC_BAND_MARGIN_3 +250 0x0007 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x5000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x6400 //RX_FDDRC_THRD_3_2 +258 0x6400 //RX_FDDRC_THRD_3_3 +259 0x2000 //RX_FDDRC_SLANT_0_0 +260 0x2000 //RX_FDDRC_SLANT_0_1 +261 0x2000 //RX_FDDRC_SLANT_0_2 +262 0x2000 //RX_FDDRC_SLANT_0_3 +263 0x5333 //RX_FDDRC_SLANT_1_0 +264 0x5333 //RX_FDDRC_SLANT_1_1 +265 0x5333 //RX_FDDRC_SLANT_1_2 +266 0x5333 //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +268 0x0000 //RX_FILTINDX +269 0x0000 //RX_TDDRC_THRD_0 +270 0x0000 //RX_TDDRC_THRD_1 +271 0x7FFF //RX_TDDRC_THRD_2 +272 0x7FFF //RX_TDDRC_THRD_3 +273 0x7E70 //RX_TDDRC_SLANT_0 +274 0x7FFF //RX_TDDRC_SLANT_1 +275 0x1000 //RX_TDDRC_ALPHA_UP_0 +276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x199A //RX_TDDRC_HMNC_GAIN +279 0x0001 //RX_TDDRC_SMT_FLAG +280 0x0CCD //RX_TDDRC_SMT_W +281 0x0155 //RX_TDDRC_DRC_GAIN +282 0x7C00 //RX_LAMBDA_PKA_FP +283 0x2000 //RX_TPKA_FP +284 0x2000 //RX_MIN_G_FP +285 0x0080 //RX_MAX_G_FP +286 0x0100 //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 +288 0x0000 //RX_MAXLEVEL_CNG +289 0x3000 //RX_BWE_UV_TH +290 0x3000 //RX_BWE_UV_TH2 +291 0x1800 //RX_BWE_UV_TH3 +292 0x1000 //RX_BWE_V_TH +293 0x04CD //RX_BWE_GAIN1_V_TH1 +294 0x0F33 //RX_BWE_GAIN1_V_TH2 +295 0x7333 //RX_BWE_UV_EQ +296 0x199A //RX_BWE_V_EQ +297 0x7333 //RX_BWE_TONE_TH +298 0x0004 //RX_BWE_UV_HOLD_T +299 0x6CCD //RX_BWE_GAIN2_ALPHA +300 0x799A //RX_BWE_GAIN3_ALPHA +301 0x001E //RX_BWE_CUTOFF +302 0x3000 //RX_BWE_GAINFILL +303 0x3200 //RX_BWE_MAXTH_TONE +304 0x2000 //RX_BWE_EQ_0 +305 0x2000 //RX_BWE_EQ_1 +306 0x2000 //RX_BWE_EQ_2 +307 0x2000 //RX_BWE_EQ_3 +308 0x2000 //RX_BWE_EQ_4 +309 0x2000 //RX_BWE_EQ_5 +310 0x2000 //RX_BWE_EQ_6 +311 0x0000 //RX_BWE_RESRV_0 +312 0x0000 //RX_BWE_RESRV_1 +313 0x0000 //RX_BWE_RESRV_2 +#VOL 0 +163 0x1000 //RX_TDDRC_ALPHA_UP_1 +164 0x1000 //RX_TDDRC_ALPHA_UP_2 +165 0x1000 //RX_TDDRC_ALPHA_UP_3 +166 0x1000 //RX_TDDRC_ALPHA_UP_4 +184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +190 0x7FFF //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +269 0x0000 //RX_TDDRC_THRD_0 +270 0x0000 //RX_TDDRC_THRD_1 +271 0x7FFF //RX_TDDRC_THRD_2 +272 0x7FFF //RX_TDDRC_THRD_3 +273 0x7E70 //RX_TDDRC_SLANT_0 +274 0x7FFF //RX_TDDRC_SLANT_1 +275 0x1000 //RX_TDDRC_ALPHA_UP_0 +276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x199A //RX_TDDRC_HMNC_GAIN +279 0x0001 //RX_TDDRC_SMT_FLAG +280 0x0CCD //RX_TDDRC_SMT_W +281 0x0155 //RX_TDDRC_DRC_GAIN +195 0x001C //RX_FDEQ_SUBNUM +196 0x4848 //RX_FDEQ_GAIN_0 +197 0x4848 //RX_FDEQ_GAIN_1 +198 0x4848 //RX_FDEQ_GAIN_2 +199 0x4848 //RX_FDEQ_GAIN_3 +200 0x4848 //RX_FDEQ_GAIN_4 +201 0x4848 //RX_FDEQ_GAIN_5 +202 0x4848 //RX_FDEQ_GAIN_6 +203 0x4848 //RX_FDEQ_GAIN_7 +204 0x4848 //RX_FDEQ_GAIN_8 +205 0x3C3C //RX_FDEQ_GAIN_9 +206 0x3C3C //RX_FDEQ_GAIN_10 +207 0x3838 //RX_FDEQ_GAIN_11 +208 0x3838 //RX_FDEQ_GAIN_12 +209 0x3030 //RX_FDEQ_GAIN_13 +210 0x4848 //RX_FDEQ_GAIN_14 +211 0x4848 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0202 //RX_FDEQ_BIN_0 +221 0x0203 //RX_FDEQ_BIN_1 +222 0x0303 //RX_FDEQ_BIN_2 +223 0x0304 //RX_FDEQ_BIN_3 +224 0x0405 //RX_FDEQ_BIN_4 +225 0x0506 //RX_FDEQ_BIN_5 +226 0x0708 //RX_FDEQ_BIN_6 +227 0x090A //RX_FDEQ_BIN_7 +228 0x0B0C //RX_FDEQ_BIN_8 +229 0x0D0E //RX_FDEQ_BIN_9 +230 0x0E0F //RX_FDEQ_BIN_10 +231 0x0F10 //RX_FDEQ_BIN_11 +232 0x1011 //RX_FDEQ_BIN_12 +233 0x1112 //RX_FDEQ_BIN_13 +234 0x0000 //RX_FDEQ_BIN_14 +235 0x0000 //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x4000 //RX_FDEQ_RESRV_0 +245 0x0320 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0030 //RX_FDDRC_BAND_MARGIN_1 +248 0x0050 //RX_FDDRC_BAND_MARGIN_2 +249 0x0080 //RX_FDDRC_BAND_MARGIN_3 +250 0x0007 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x5000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x6400 //RX_FDDRC_THRD_3_2 +258 0x6400 //RX_FDDRC_THRD_3_3 +259 0x2000 //RX_FDDRC_SLANT_0_0 +260 0x2000 //RX_FDDRC_SLANT_0_1 +261 0x2000 //RX_FDDRC_SLANT_0_2 +262 0x2000 //RX_FDDRC_SLANT_0_3 +263 0x5333 //RX_FDDRC_SLANT_1_0 +264 0x5333 //RX_FDDRC_SLANT_1_1 +265 0x5333 //RX_FDDRC_SLANT_1_2 +266 0x5333 //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +286 0x0100 //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 +#VOL 1 +163 0x1000 //RX_TDDRC_ALPHA_UP_1 +164 0x1000 //RX_TDDRC_ALPHA_UP_2 +165 0x1000 //RX_TDDRC_ALPHA_UP_3 +166 0x1000 //RX_TDDRC_ALPHA_UP_4 +184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +190 0x7FFF //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +269 0x0000 //RX_TDDRC_THRD_0 +270 0x0000 //RX_TDDRC_THRD_1 +271 0x7FFF //RX_TDDRC_THRD_2 +272 0x7FFF //RX_TDDRC_THRD_3 +273 0x7E70 //RX_TDDRC_SLANT_0 +274 0x7FFF //RX_TDDRC_SLANT_1 +275 0x1000 //RX_TDDRC_ALPHA_UP_0 +276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x199A //RX_TDDRC_HMNC_GAIN +279 0x0001 //RX_TDDRC_SMT_FLAG +280 0x0CCD //RX_TDDRC_SMT_W +281 0x0155 //RX_TDDRC_DRC_GAIN +195 0x001C //RX_FDEQ_SUBNUM +196 0x4848 //RX_FDEQ_GAIN_0 +197 0x4848 //RX_FDEQ_GAIN_1 +198 0x4848 //RX_FDEQ_GAIN_2 +199 0x4848 //RX_FDEQ_GAIN_3 +200 0x4848 //RX_FDEQ_GAIN_4 +201 0x4848 //RX_FDEQ_GAIN_5 +202 0x4848 //RX_FDEQ_GAIN_6 +203 0x4848 //RX_FDEQ_GAIN_7 +204 0x4848 //RX_FDEQ_GAIN_8 +205 0x3C3C //RX_FDEQ_GAIN_9 +206 0x3C3C //RX_FDEQ_GAIN_10 +207 0x3838 //RX_FDEQ_GAIN_11 +208 0x3838 //RX_FDEQ_GAIN_12 +209 0x3030 //RX_FDEQ_GAIN_13 +210 0x4848 //RX_FDEQ_GAIN_14 +211 0x4848 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0202 //RX_FDEQ_BIN_0 +221 0x0203 //RX_FDEQ_BIN_1 +222 0x0303 //RX_FDEQ_BIN_2 +223 0x0304 //RX_FDEQ_BIN_3 +224 0x0405 //RX_FDEQ_BIN_4 +225 0x0506 //RX_FDEQ_BIN_5 +226 0x0708 //RX_FDEQ_BIN_6 +227 0x090A //RX_FDEQ_BIN_7 +228 0x0B0C //RX_FDEQ_BIN_8 +229 0x0D0E //RX_FDEQ_BIN_9 +230 0x0E0F //RX_FDEQ_BIN_10 +231 0x0F10 //RX_FDEQ_BIN_11 +232 0x1011 //RX_FDEQ_BIN_12 +233 0x1112 //RX_FDEQ_BIN_13 +234 0x0000 //RX_FDEQ_BIN_14 +235 0x0000 //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x4000 //RX_FDEQ_RESRV_0 +245 0x0320 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0030 //RX_FDDRC_BAND_MARGIN_1 +248 0x0050 //RX_FDDRC_BAND_MARGIN_2 +249 0x0080 //RX_FDDRC_BAND_MARGIN_3 +250 0x0007 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x5000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x6400 //RX_FDDRC_THRD_3_2 +258 0x6400 //RX_FDDRC_THRD_3_3 +259 0x2000 //RX_FDDRC_SLANT_0_0 +260 0x2000 //RX_FDDRC_SLANT_0_1 +261 0x2000 //RX_FDDRC_SLANT_0_2 +262 0x2000 //RX_FDDRC_SLANT_0_3 +263 0x5333 //RX_FDDRC_SLANT_1_0 +264 0x5333 //RX_FDDRC_SLANT_1_1 +265 0x5333 //RX_FDDRC_SLANT_1_2 +266 0x5333 //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +286 0x0100 //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 +#VOL 2 +163 0x1000 //RX_TDDRC_ALPHA_UP_1 +164 0x1000 //RX_TDDRC_ALPHA_UP_2 +165 0x1000 //RX_TDDRC_ALPHA_UP_3 +166 0x1000 //RX_TDDRC_ALPHA_UP_4 +184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +190 0x7FFF //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +269 0x0000 //RX_TDDRC_THRD_0 +270 0x0000 //RX_TDDRC_THRD_1 +271 0x7FFF //RX_TDDRC_THRD_2 +272 0x7FFF //RX_TDDRC_THRD_3 +273 0x7E70 //RX_TDDRC_SLANT_0 +274 0x7FFF //RX_TDDRC_SLANT_1 +275 0x1000 //RX_TDDRC_ALPHA_UP_0 +276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x199A //RX_TDDRC_HMNC_GAIN +279 0x0001 //RX_TDDRC_SMT_FLAG +280 0x0CCD //RX_TDDRC_SMT_W +281 0x0155 //RX_TDDRC_DRC_GAIN +195 0x001C //RX_FDEQ_SUBNUM +196 0x4848 //RX_FDEQ_GAIN_0 +197 0x4848 //RX_FDEQ_GAIN_1 +198 0x4848 //RX_FDEQ_GAIN_2 +199 0x4848 //RX_FDEQ_GAIN_3 +200 0x4848 //RX_FDEQ_GAIN_4 +201 0x4848 //RX_FDEQ_GAIN_5 +202 0x4848 //RX_FDEQ_GAIN_6 +203 0x4848 //RX_FDEQ_GAIN_7 +204 0x4848 //RX_FDEQ_GAIN_8 +205 0x3C3C //RX_FDEQ_GAIN_9 +206 0x3C3C //RX_FDEQ_GAIN_10 +207 0x3838 //RX_FDEQ_GAIN_11 +208 0x3838 //RX_FDEQ_GAIN_12 +209 0x3030 //RX_FDEQ_GAIN_13 +210 0x4848 //RX_FDEQ_GAIN_14 +211 0x4848 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0202 //RX_FDEQ_BIN_0 +221 0x0203 //RX_FDEQ_BIN_1 +222 0x0303 //RX_FDEQ_BIN_2 +223 0x0304 //RX_FDEQ_BIN_3 +224 0x0405 //RX_FDEQ_BIN_4 +225 0x0506 //RX_FDEQ_BIN_5 +226 0x0708 //RX_FDEQ_BIN_6 +227 0x090A //RX_FDEQ_BIN_7 +228 0x0B0C //RX_FDEQ_BIN_8 +229 0x0D0E //RX_FDEQ_BIN_9 +230 0x0E0F //RX_FDEQ_BIN_10 +231 0x0F10 //RX_FDEQ_BIN_11 +232 0x1011 //RX_FDEQ_BIN_12 +233 0x1112 //RX_FDEQ_BIN_13 +234 0x0000 //RX_FDEQ_BIN_14 +235 0x0000 //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x4000 //RX_FDEQ_RESRV_0 +245 0x0320 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0030 //RX_FDDRC_BAND_MARGIN_1 +248 0x0050 //RX_FDDRC_BAND_MARGIN_2 +249 0x0080 //RX_FDDRC_BAND_MARGIN_3 +250 0x0007 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x5000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x6400 //RX_FDDRC_THRD_3_2 +258 0x6400 //RX_FDDRC_THRD_3_3 +259 0x2000 //RX_FDDRC_SLANT_0_0 +260 0x2000 //RX_FDDRC_SLANT_0_1 +261 0x2000 //RX_FDDRC_SLANT_0_2 +262 0x2000 //RX_FDDRC_SLANT_0_3 +263 0x5333 //RX_FDDRC_SLANT_1_0 +264 0x5333 //RX_FDDRC_SLANT_1_1 +265 0x5333 //RX_FDDRC_SLANT_1_2 +266 0x5333 //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +286 0x0100 //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 +#VOL 3 +163 0x1000 //RX_TDDRC_ALPHA_UP_1 +164 0x1000 //RX_TDDRC_ALPHA_UP_2 +165 0x1000 //RX_TDDRC_ALPHA_UP_3 +166 0x1000 //RX_TDDRC_ALPHA_UP_4 +184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +190 0x7FFF //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +269 0x0000 //RX_TDDRC_THRD_0 +270 0x0000 //RX_TDDRC_THRD_1 +271 0x7FFF //RX_TDDRC_THRD_2 +272 0x7FFF //RX_TDDRC_THRD_3 +273 0x7E70 //RX_TDDRC_SLANT_0 +274 0x7FFF //RX_TDDRC_SLANT_1 +275 0x1000 //RX_TDDRC_ALPHA_UP_0 +276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x199A //RX_TDDRC_HMNC_GAIN +279 0x0001 //RX_TDDRC_SMT_FLAG +280 0x0CCD //RX_TDDRC_SMT_W +281 0x0155 //RX_TDDRC_DRC_GAIN +195 0x001C //RX_FDEQ_SUBNUM +196 0x4848 //RX_FDEQ_GAIN_0 +197 0x4848 //RX_FDEQ_GAIN_1 +198 0x4848 //RX_FDEQ_GAIN_2 +199 0x4848 //RX_FDEQ_GAIN_3 +200 0x4848 //RX_FDEQ_GAIN_4 +201 0x4848 //RX_FDEQ_GAIN_5 +202 0x4848 //RX_FDEQ_GAIN_6 +203 0x4848 //RX_FDEQ_GAIN_7 +204 0x4848 //RX_FDEQ_GAIN_8 +205 0x3C3C //RX_FDEQ_GAIN_9 +206 0x3C3C //RX_FDEQ_GAIN_10 +207 0x3838 //RX_FDEQ_GAIN_11 +208 0x3838 //RX_FDEQ_GAIN_12 +209 0x3030 //RX_FDEQ_GAIN_13 +210 0x4848 //RX_FDEQ_GAIN_14 +211 0x4848 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0202 //RX_FDEQ_BIN_0 +221 0x0203 //RX_FDEQ_BIN_1 +222 0x0303 //RX_FDEQ_BIN_2 +223 0x0304 //RX_FDEQ_BIN_3 +224 0x0405 //RX_FDEQ_BIN_4 +225 0x0506 //RX_FDEQ_BIN_5 +226 0x0708 //RX_FDEQ_BIN_6 +227 0x090A //RX_FDEQ_BIN_7 +228 0x0B0C //RX_FDEQ_BIN_8 +229 0x0D0E //RX_FDEQ_BIN_9 +230 0x0E0F //RX_FDEQ_BIN_10 +231 0x0F10 //RX_FDEQ_BIN_11 +232 0x1011 //RX_FDEQ_BIN_12 +233 0x1112 //RX_FDEQ_BIN_13 +234 0x0000 //RX_FDEQ_BIN_14 +235 0x0000 //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x4000 //RX_FDEQ_RESRV_0 +245 0x0320 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0030 //RX_FDDRC_BAND_MARGIN_1 +248 0x0050 //RX_FDDRC_BAND_MARGIN_2 +249 0x0080 //RX_FDDRC_BAND_MARGIN_3 +250 0x0007 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x5000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x6400 //RX_FDDRC_THRD_3_2 +258 0x6400 //RX_FDDRC_THRD_3_3 +259 0x2000 //RX_FDDRC_SLANT_0_0 +260 0x2000 //RX_FDDRC_SLANT_0_1 +261 0x2000 //RX_FDDRC_SLANT_0_2 +262 0x2000 //RX_FDDRC_SLANT_0_3 +263 0x5333 //RX_FDDRC_SLANT_1_0 +264 0x5333 //RX_FDDRC_SLANT_1_1 +265 0x5333 //RX_FDDRC_SLANT_1_2 +266 0x5333 //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +286 0x0100 //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 +#VOL 4 +163 0x1000 //RX_TDDRC_ALPHA_UP_1 +164 0x1000 //RX_TDDRC_ALPHA_UP_2 +165 0x1000 //RX_TDDRC_ALPHA_UP_3 +166 0x1000 //RX_TDDRC_ALPHA_UP_4 +184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +190 0x7FFF //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +269 0x0000 //RX_TDDRC_THRD_0 +270 0x0000 //RX_TDDRC_THRD_1 +271 0x7FFF //RX_TDDRC_THRD_2 +272 0x7FFF //RX_TDDRC_THRD_3 +273 0x7E70 //RX_TDDRC_SLANT_0 +274 0x7FFF //RX_TDDRC_SLANT_1 +275 0x1000 //RX_TDDRC_ALPHA_UP_0 +276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x199A //RX_TDDRC_HMNC_GAIN +279 0x0001 //RX_TDDRC_SMT_FLAG +280 0x0CCD //RX_TDDRC_SMT_W +281 0x0155 //RX_TDDRC_DRC_GAIN +195 0x001C //RX_FDEQ_SUBNUM +196 0x4848 //RX_FDEQ_GAIN_0 +197 0x4848 //RX_FDEQ_GAIN_1 +198 0x4848 //RX_FDEQ_GAIN_2 +199 0x4848 //RX_FDEQ_GAIN_3 +200 0x4848 //RX_FDEQ_GAIN_4 +201 0x4848 //RX_FDEQ_GAIN_5 +202 0x4848 //RX_FDEQ_GAIN_6 +203 0x4848 //RX_FDEQ_GAIN_7 +204 0x4848 //RX_FDEQ_GAIN_8 +205 0x3C3C //RX_FDEQ_GAIN_9 +206 0x3C3C //RX_FDEQ_GAIN_10 +207 0x3838 //RX_FDEQ_GAIN_11 +208 0x3838 //RX_FDEQ_GAIN_12 +209 0x3030 //RX_FDEQ_GAIN_13 +210 0x4848 //RX_FDEQ_GAIN_14 +211 0x4848 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0202 //RX_FDEQ_BIN_0 +221 0x0203 //RX_FDEQ_BIN_1 +222 0x0303 //RX_FDEQ_BIN_2 +223 0x0304 //RX_FDEQ_BIN_3 +224 0x0405 //RX_FDEQ_BIN_4 +225 0x0506 //RX_FDEQ_BIN_5 +226 0x0708 //RX_FDEQ_BIN_6 +227 0x090A //RX_FDEQ_BIN_7 +228 0x0B0C //RX_FDEQ_BIN_8 +229 0x0D0E //RX_FDEQ_BIN_9 +230 0x0E0F //RX_FDEQ_BIN_10 +231 0x0F10 //RX_FDEQ_BIN_11 +232 0x1011 //RX_FDEQ_BIN_12 +233 0x1112 //RX_FDEQ_BIN_13 +234 0x0000 //RX_FDEQ_BIN_14 +235 0x0000 //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x4000 //RX_FDEQ_RESRV_0 +245 0x0320 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0030 //RX_FDDRC_BAND_MARGIN_1 +248 0x0050 //RX_FDDRC_BAND_MARGIN_2 +249 0x0080 //RX_FDDRC_BAND_MARGIN_3 +250 0x0007 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x5000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x6400 //RX_FDDRC_THRD_3_2 +258 0x6400 //RX_FDDRC_THRD_3_3 +259 0x2000 //RX_FDDRC_SLANT_0_0 +260 0x2000 //RX_FDDRC_SLANT_0_1 +261 0x2000 //RX_FDDRC_SLANT_0_2 +262 0x2000 //RX_FDDRC_SLANT_0_3 +263 0x5333 //RX_FDDRC_SLANT_1_0 +264 0x5333 //RX_FDDRC_SLANT_1_1 +265 0x5333 //RX_FDDRC_SLANT_1_2 +266 0x5333 //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +286 0x0100 //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 +#VOL 5 +163 0x1000 //RX_TDDRC_ALPHA_UP_1 +164 0x1000 //RX_TDDRC_ALPHA_UP_2 +165 0x1000 //RX_TDDRC_ALPHA_UP_3 +166 0x1000 //RX_TDDRC_ALPHA_UP_4 +184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +190 0x7FFF //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +269 0x0000 //RX_TDDRC_THRD_0 +270 0x0000 //RX_TDDRC_THRD_1 +271 0x7FFF //RX_TDDRC_THRD_2 +272 0x7FFF //RX_TDDRC_THRD_3 +273 0x7E70 //RX_TDDRC_SLANT_0 +274 0x7FFF //RX_TDDRC_SLANT_1 +275 0x1000 //RX_TDDRC_ALPHA_UP_0 +276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x199A //RX_TDDRC_HMNC_GAIN +279 0x0001 //RX_TDDRC_SMT_FLAG +280 0x0CCD //RX_TDDRC_SMT_W +281 0x0155 //RX_TDDRC_DRC_GAIN +195 0x001C //RX_FDEQ_SUBNUM +196 0x4848 //RX_FDEQ_GAIN_0 +197 0x4848 //RX_FDEQ_GAIN_1 +198 0x4848 //RX_FDEQ_GAIN_2 +199 0x4848 //RX_FDEQ_GAIN_3 +200 0x4848 //RX_FDEQ_GAIN_4 +201 0x4848 //RX_FDEQ_GAIN_5 +202 0x4848 //RX_FDEQ_GAIN_6 +203 0x4848 //RX_FDEQ_GAIN_7 +204 0x4848 //RX_FDEQ_GAIN_8 +205 0x3C3C //RX_FDEQ_GAIN_9 +206 0x3C3C //RX_FDEQ_GAIN_10 +207 0x3838 //RX_FDEQ_GAIN_11 +208 0x3838 //RX_FDEQ_GAIN_12 +209 0x3030 //RX_FDEQ_GAIN_13 +210 0x4848 //RX_FDEQ_GAIN_14 +211 0x4848 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0202 //RX_FDEQ_BIN_0 +221 0x0203 //RX_FDEQ_BIN_1 +222 0x0303 //RX_FDEQ_BIN_2 +223 0x0304 //RX_FDEQ_BIN_3 +224 0x0405 //RX_FDEQ_BIN_4 +225 0x0506 //RX_FDEQ_BIN_5 +226 0x0708 //RX_FDEQ_BIN_6 +227 0x090A //RX_FDEQ_BIN_7 +228 0x0B0C //RX_FDEQ_BIN_8 +229 0x0D0E //RX_FDEQ_BIN_9 +230 0x0E0F //RX_FDEQ_BIN_10 +231 0x0F10 //RX_FDEQ_BIN_11 +232 0x1011 //RX_FDEQ_BIN_12 +233 0x1112 //RX_FDEQ_BIN_13 +234 0x0000 //RX_FDEQ_BIN_14 +235 0x0000 //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x4000 //RX_FDEQ_RESRV_0 +245 0x0320 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0030 //RX_FDDRC_BAND_MARGIN_1 +248 0x0050 //RX_FDDRC_BAND_MARGIN_2 +249 0x0080 //RX_FDDRC_BAND_MARGIN_3 +250 0x0007 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x5000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x6400 //RX_FDDRC_THRD_3_2 +258 0x6400 //RX_FDDRC_THRD_3_3 +259 0x2000 //RX_FDDRC_SLANT_0_0 +260 0x2000 //RX_FDDRC_SLANT_0_1 +261 0x2000 //RX_FDDRC_SLANT_0_2 +262 0x2000 //RX_FDDRC_SLANT_0_3 +263 0x5333 //RX_FDDRC_SLANT_1_0 +264 0x5333 //RX_FDDRC_SLANT_1_1 +265 0x5333 //RX_FDDRC_SLANT_1_2 +266 0x5333 //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +286 0x0100 //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 +#VOL 6 +163 0x1000 //RX_TDDRC_ALPHA_UP_1 +164 0x1000 //RX_TDDRC_ALPHA_UP_2 +165 0x1000 //RX_TDDRC_ALPHA_UP_3 +166 0x1000 //RX_TDDRC_ALPHA_UP_4 +184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +190 0x7FFF //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +269 0x0000 //RX_TDDRC_THRD_0 +270 0x0000 //RX_TDDRC_THRD_1 +271 0x7FFF //RX_TDDRC_THRD_2 +272 0x7FFF //RX_TDDRC_THRD_3 +273 0x7E70 //RX_TDDRC_SLANT_0 +274 0x7FFF //RX_TDDRC_SLANT_1 +275 0x1000 //RX_TDDRC_ALPHA_UP_0 +276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x199A //RX_TDDRC_HMNC_GAIN +279 0x0001 //RX_TDDRC_SMT_FLAG +280 0x0CCD //RX_TDDRC_SMT_W +281 0x0155 //RX_TDDRC_DRC_GAIN +195 0x001C //RX_FDEQ_SUBNUM +196 0x4848 //RX_FDEQ_GAIN_0 +197 0x4848 //RX_FDEQ_GAIN_1 +198 0x4848 //RX_FDEQ_GAIN_2 +199 0x4848 //RX_FDEQ_GAIN_3 +200 0x4848 //RX_FDEQ_GAIN_4 +201 0x4848 //RX_FDEQ_GAIN_5 +202 0x4848 //RX_FDEQ_GAIN_6 +203 0x4848 //RX_FDEQ_GAIN_7 +204 0x4848 //RX_FDEQ_GAIN_8 +205 0x3C3C //RX_FDEQ_GAIN_9 +206 0x3C3C //RX_FDEQ_GAIN_10 +207 0x3838 //RX_FDEQ_GAIN_11 +208 0x3838 //RX_FDEQ_GAIN_12 +209 0x3030 //RX_FDEQ_GAIN_13 +210 0x4848 //RX_FDEQ_GAIN_14 +211 0x4848 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0202 //RX_FDEQ_BIN_0 +221 0x0203 //RX_FDEQ_BIN_1 +222 0x0303 //RX_FDEQ_BIN_2 +223 0x0304 //RX_FDEQ_BIN_3 +224 0x0405 //RX_FDEQ_BIN_4 +225 0x0506 //RX_FDEQ_BIN_5 +226 0x0708 //RX_FDEQ_BIN_6 +227 0x090A //RX_FDEQ_BIN_7 +228 0x0B0C //RX_FDEQ_BIN_8 +229 0x0D0E //RX_FDEQ_BIN_9 +230 0x0E0F //RX_FDEQ_BIN_10 +231 0x0F10 //RX_FDEQ_BIN_11 +232 0x1011 //RX_FDEQ_BIN_12 +233 0x1112 //RX_FDEQ_BIN_13 +234 0x0000 //RX_FDEQ_BIN_14 +235 0x0000 //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x4000 //RX_FDEQ_RESRV_0 +245 0x0320 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0030 //RX_FDDRC_BAND_MARGIN_1 +248 0x0050 //RX_FDDRC_BAND_MARGIN_2 +249 0x0080 //RX_FDDRC_BAND_MARGIN_3 +250 0x0007 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x5000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x6400 //RX_FDDRC_THRD_3_2 +258 0x6400 //RX_FDDRC_THRD_3_3 +259 0x2000 //RX_FDDRC_SLANT_0_0 +260 0x2000 //RX_FDDRC_SLANT_0_1 +261 0x2000 //RX_FDDRC_SLANT_0_2 +262 0x2000 //RX_FDDRC_SLANT_0_3 +263 0x5333 //RX_FDDRC_SLANT_1_0 +264 0x5333 //RX_FDDRC_SLANT_1_1 +265 0x5333 //RX_FDDRC_SLANT_1_2 +266 0x5333 //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +286 0x0100 //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 #CASE_NAME BLUETOOTH-BTNB-VOICE_GENERIC-SWB -#PARAM_TYPE TX+RX -#TOTAL_CUSTOM_STEP 7 +#PARAM_MODE Full +#PARAM_TYPE TX+2RX +#TOTAL_CUSTOM_STEP 7+7 #TX 0 0x0001 //TX_OPERATION_MODE_0 1 0x0001 //TX_OPERATION_MODE_1 @@ -12529,20 +18949,20 @@ 248 0xF400 //TX_THR_SN_EST_6 249 0xF600 //TX_THR_SN_EST_7 250 0x0000 //TX_DELTA_THR_SN_EST_0 -251 0x0000 //TX_DELTA_THR_SN_EST_1 +251 0x0200 //TX_DELTA_THR_SN_EST_1 252 0x0200 //TX_DELTA_THR_SN_EST_2 253 0x0200 //TX_DELTA_THR_SN_EST_3 254 0x0200 //TX_DELTA_THR_SN_EST_4 255 0x0200 //TX_DELTA_THR_SN_EST_5 -256 0x0200 //TX_DELTA_THR_SN_EST_6 +256 0x0000 //TX_DELTA_THR_SN_EST_6 257 0x0200 //TX_DELTA_THR_SN_EST_7 258 0x6000 //TX_LAMBDA_NN_EST_0 -259 0x6000 //TX_LAMBDA_NN_EST_1 +259 0x4000 //TX_LAMBDA_NN_EST_1 260 0x4000 //TX_LAMBDA_NN_EST_2 261 0x4000 //TX_LAMBDA_NN_EST_3 262 0x4000 //TX_LAMBDA_NN_EST_4 263 0x4000 //TX_LAMBDA_NN_EST_5 -264 0x4000 //TX_LAMBDA_NN_EST_6 +264 0x6000 //TX_LAMBDA_NN_EST_6 265 0x4000 //TX_LAMBDA_NN_EST_7 266 0x0400 //TX_N_SN_EST 267 0x001E //TX_INBEAM_T @@ -12560,16 +18980,16 @@ 279 0x1000 //TX_B_POST_FLT_0 280 0x1000 //TX_B_POST_FLT_1 281 0x000B //TX_NS_LVL_CTRL_0 -282 0x000F //TX_NS_LVL_CTRL_1 -283 0x0011 //TX_NS_LVL_CTRL_2 +282 0x0011 //TX_NS_LVL_CTRL_1 +283 0x000F //TX_NS_LVL_CTRL_2 284 0x000F //TX_NS_LVL_CTRL_3 285 0x000F //TX_NS_LVL_CTRL_4 286 0x000F //TX_NS_LVL_CTRL_5 287 0x000F //TX_NS_LVL_CTRL_6 288 0x0011 //TX_NS_LVL_CTRL_7 289 0x000C //TX_MIN_GAIN_S_0 -290 0x000C //TX_MIN_GAIN_S_1 -291 0x000F //TX_MIN_GAIN_S_2 +290 0x000F //TX_MIN_GAIN_S_1 +291 0x000C //TX_MIN_GAIN_S_2 292 0x000C //TX_MIN_GAIN_S_3 293 0x000C //TX_MIN_GAIN_S_4 294 0x000C //TX_MIN_GAIN_S_5 @@ -12593,12 +19013,12 @@ 312 0x7FFF //TX_A_POST_FILT_0 313 0x2000 //TX_A_POST_FILT_1 314 0x2000 //TX_A_POST_FILT_S_0 -315 0x4000 //TX_A_POST_FILT_S_1 +315 0x5000 //TX_A_POST_FILT_S_1 316 0x5000 //TX_A_POST_FILT_S_2 317 0x5000 //TX_A_POST_FILT_S_3 318 0x5000 //TX_A_POST_FILT_S_4 319 0x5000 //TX_A_POST_FILT_S_5 -320 0x5000 //TX_A_POST_FILT_S_6 +320 0x4000 //TX_A_POST_FILT_S_6 321 0x5000 //TX_A_POST_FILT_S_7 322 0x1000 //TX_B_POST_FILT_0 323 0x1000 //TX_B_POST_FILT_1 @@ -12658,10 +19078,10 @@ 377 0x7FFF //TX_NOISE_TH_5_4 378 0x044C //TX_NOISE_TH_6 379 0x0014 //TX_MINENOISE_TH -380 0x4000 //TX_MINENOISE_MIC0_TH_MTS -381 0xFFEE //TX_MINENOISE_MIC0_TH_EXP -382 0x6000 //TX_MINENOISE_MIC0_S_TH_MTS -383 0xFFF3 //TX_MINENOISE_MIC0_S_TH_EXP +380 0x4000 //TX_MORENS_TFMASK_TH +381 0xFFEE //TX_DRC_QUIET_FLOOR +382 0x6000 //TX_RATIODTL_CUT_TH +383 0xFFF3 //TX_DT_CUT_K1 384 0x0666 //TX_OUT_ENER_S_TH_CLEAN 385 0x0666 //TX_OUT_ENER_S_TH_LESSCLEAN 386 0x0333 //TX_OUT_ENER_S_TH_NOISY @@ -12669,15 +19089,15 @@ 388 0x0333 //TX_OUT_ENER_TH_SPEECH 389 0x2000 //TX_SN_NPB_GAIN 390 0x0000 //TX_NN_NPB_GAIN -391 0x0000 //TX_CSX_ALPHA_0 -392 0x0000 //TX_CSX_ALPHA_1 -393 0x0000 //TX_CSX_ALPHA_2 -394 0x0000 //TX_CSX_ALPHA_3 -395 0x0800 //TX_MU_ARSP_EST -396 0x00C8 //TX_P_OUTBEAM_MIN_TH +391 0x0000 //TX_POST_MASK_SUP_HSNE +392 0x0000 //TX_TAIL_DET_TH +393 0x0000 //TX_B_LESSCUT_RTO_WTA +394 0x0000 //TX_MEL_G_R +395 0x0800 //TX_SUPHIGH_TH +396 0x00C8 //TX_MASK_G_R 397 0x0002 //TX_EXTRA_NS_L -398 0x0800 //TX_EXTRA_NS_A -399 0x0005 //TX_VR_NOISE_FLOOR_TH +398 0x0800 //TX_C_POST_FLT_MASK +399 0x0005 //TX_A_POST_FLT_WNS 400 0x0148 //TX_MIN_G_LOW300HZ 401 0x0002 //TX_MAXLEVEL_CNG 402 0x00B4 //TX_STN_NOISE_TH @@ -12792,16 +19212,16 @@ 511 0x6666 //TX_MIC_TO_BFGAIN 512 0x0000 //TX_MICTOBFGAIN0 513 0x0000 //TX_FASTMUE_TH -514 0x0000 //TX_DERVB_LEN_0 -515 0x0000 //TX_DERVB_LEN_1 -516 0x0000 //TX_RHO_DERVB -517 0x0000 //TX_MIC_INDX_DERVB -518 0x0000 //TX_MU_DERVB -519 0x0000 //TX_DR_RESRV_0 -520 0x0000 //TX_DR_RESRV_1 -521 0x0000 //TX_DR_RESRV_2 -522 0x0000 //TX_DR_RESRV_3 -523 0x0000 //TX_DR_RESRV_4 +514 0x0000 //TX_DEREVERB_LF_MU +515 0x0000 //TX_DEREVERB_HF_MU +516 0x0000 //TX_DEREVERB_DELAY +517 0x0000 //TX_DEREVERB_COEF_LEN +518 0x0000 //TX_DEREVERB_DNR +519 0x0000 //TX_DEREVERB_ALPHA +520 0x0000 //TX_DEREVERB_BETA +521 0x0000 //TX_GSC_RTOL_TH +522 0x0000 //TX_GSC_RTOH_TH +523 0x0000 //TX_WIDE2_MEANHTH 524 0x0000 //TX_DR_RESRV_5 525 0x0000 //TX_DR_RESRV_6 526 0x0000 //TX_DR_RESRV_7 @@ -13175,8 +19595,73 @@ 894 0xC000 //TX_FASTNS_SSA_THHFL 895 0xCCCC //TX_FASTNS_SSA_THLFH 896 0xD999 //TX_FASTNS_SSA_THHFH +897 0x0000 //TX_SENDFUNC_REG_MICMUTE +898 0x0000 //TX_SENDFUNC_REG_MICMUTE1 +899 0x0000 //TX_MICMUTE_RATIO_THR +900 0x0000 //TX_MICMUTE_AMP_THR +901 0x0000 //TX_MICMUTE_HPF_IND +902 0x0000 //TX_MICMUTE_LOG_EYR_TH +903 0x0000 //TX_MICMUTE_CVG_TIME +904 0x0000 //TX_MICMUTE_RELEASE_TIME +905 0x0000 //TX_MIC_VOLUME_MIC0MUTE +906 0x0000 //TX_MICMUTE_EPD_OFFSET_0 +907 0x0000 //TX_MICMUTE_FRQ_AEC_L +908 0x0000 //TX_MICMUTE_EAD_THR +909 0x0000 //TX_MICMUTE_LAMBDA_CB_NLE +910 0x0000 //TX_MICMUTE_LAMBDA_RE_EST +911 0x0000 //TX_DTD_THR1_MICMUTE_0 +912 0x0000 //TX_DTD_THR1_MICMUTE_1 +913 0x0000 //TX_DTD_THR1_MICMUTE_2 +914 0x0000 //TX_DTD_THR1_MICMUTE_3 +915 0x0000 //TX_DTD_THR2_MICMUTE_0 +916 0x0000 //TX_MICMUTE_MIN_EQ_RE_EST_0 +917 0x0000 //TX_MICMUTE_MIN_EQ_RE_EST_1 +918 0x0000 //TX_MICMUTE_MIN_EQ_RE_EST_2 +919 0x0000 //TX_MICMUTE_MIN_EQ_RE_EST_3 +920 0x0000 //TX_MICMUTE_MIN_EQ_RE_EST_4 +921 0x0000 //TX_MICMUTE_C_POST_FLT +922 0x0000 //TX_MICMUTE_DT_CUT_K +923 0x0000 //TX_MICMUTE_DT_CUT_THR +924 0x0000 //TX_MICMUTE_DT_CUT_K2 +925 0x0000 //TX_MICMUTE_DT_CUT_THR2 +926 0x0000 //TX_MICMUTE_DT2_HOLD_N +927 0x0000 //TX_MICMUTE_RATIODTH_THCUT +928 0x0000 //TX_MICMUTE_B_POST_FLT_ECHOL +929 0x0000 //TX_MICMUTE_B_POST_FLT_ECHOH +930 0x0000 //TX_MICMUTE_C_POST_FLT_MASK +931 0x0000 //TX_MICMUTE_RATIODTL_CUT_TH +932 0x0000 //TX_MICMUTE_DT_CUT_K1 +933 0x0000 //TX_MICMUTE_N2_SN_EST +934 0x0000 //TX_MICMUTE_THR_SN_EST_0 +935 0x0000 //TX_MICMUTE_MIN_G_CTRL_0 +936 0x0000 //TX_MICMUTE_A_POST_FILT_S_0 +937 0x0000 //TX_MICMUTE_B_POST_FILT_0 +938 0x0000 //TX_MIC1RUB_AMP_THR +939 0x0000 //TX_MIC1MUTE_RATIO_THR +940 0x0000 //TX_MIC1MUTE_AMP_THR +941 0x0000 //TX_MIC1MUTE_CVG_TIME +942 0x0000 //TX_MIC1MUTE_RELEASE_TIME +943 0x0000 //TX_AMS_RESRV_01 +944 0x0000 //TX_AMS_RESRV_02 +945 0x0000 //TX_AMS_RESRV_03 +946 0x0000 //TX_AMS_RESRV_04 +947 0x0000 //TX_AMS_RESRV_05 +948 0x0000 //TX_AMS_RESRV_06 +949 0x0000 //TX_AMS_RESRV_07 +950 0x0000 //TX_AMS_RESRV_08 +951 0x0000 //TX_AMS_RESRV_09 +952 0x0000 //TX_AMS_RESRV_10 +953 0x0000 //TX_AMS_RESRV_11 +954 0x0000 //TX_AMS_RESRV_12 +955 0x0000 //TX_AMS_RESRV_13 +956 0x0000 //TX_AMS_RESRV_14 +957 0x0000 //TX_AMS_RESRV_15 +958 0x0000 //TX_AMS_RESRV_16 +959 0x0000 //TX_AMS_RESRV_17 +960 0x0000 //TX_AMS_RESRV_18 +961 0x0000 //TX_AMS_RESRV_19 #RX -0 0x0064 //RX_RECVFUNC_MODE_0 +0 0x2064 //RX_RECVFUNC_MODE_0 1 0x0000 //RX_RECVFUNC_MODE_1 2 0x0003 //RX_SAMPLINGFREQ_SIG 3 0x0003 //RX_SAMPLINGFREQ_PROC @@ -14026,10 +20511,862 @@ 110 0x0000 //RX_FDDRC_RESRV_0 129 0x0100 //RX_SPK_VOL 130 0x0000 //RX_VOL_RESRV_0 +#RX 2 +157 0x2064 //RX_RECVFUNC_MODE_0 +158 0x0000 //RX_RECVFUNC_MODE_1 +159 0x0003 //RX_SAMPLINGFREQ_SIG +160 0x0003 //RX_SAMPLINGFREQ_PROC +161 0x000A //RX_FRAME_SZ +162 0x0000 //RX_DELAY_OPT +163 0x3000 //RX_TDDRC_ALPHA_UP_1 +164 0x3000 //RX_TDDRC_ALPHA_UP_2 +165 0x3000 //RX_TDDRC_ALPHA_UP_3 +166 0x3000 //RX_TDDRC_ALPHA_UP_4 +167 0x0800 //RX_PGA +168 0x7FFF //RX_A_HP +169 0x0000 //RX_B_PE +170 0x1800 //RX_THR_PITCH_DET_0 +171 0x1000 //RX_THR_PITCH_DET_1 +172 0x0800 //RX_THR_PITCH_DET_2 +173 0x0008 //RX_PITCH_BFR_LEN +174 0x0003 //RX_SBD_PITCH_DET +175 0x0100 //RX_PP_RESRV_0 +176 0x0020 //RX_PP_RESRV_1 +177 0x0400 //RX_N_SN_EST +178 0x000C //RX_N2_SN_EST +179 0x0003 //RX_NS_LVL_CTRL +180 0x9000 //RX_THR_SN_EST +181 0x7CCD //RX_LAMBDA_PFILT +182 0x000A //RX_FENS_RESRV_0 +183 0x0190 //RX_FENS_RESRV_1 +184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +187 0x0002 //RX_EXTRA_NS_L +188 0x0800 //RX_EXTRA_NS_A +189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +190 0x7FFF //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +192 0x199A //RX_A_POST_FLT +193 0x0000 //RX_LMT_THRD +194 0x4000 //RX_LMT_ALPHA +195 0x0020 //RX_FDEQ_SUBNUM +196 0x4848 //RX_FDEQ_GAIN_0 +197 0x4848 //RX_FDEQ_GAIN_1 +198 0x4848 //RX_FDEQ_GAIN_2 +199 0x4848 //RX_FDEQ_GAIN_3 +200 0x4848 //RX_FDEQ_GAIN_4 +201 0x4848 //RX_FDEQ_GAIN_5 +202 0x4848 //RX_FDEQ_GAIN_6 +203 0x4848 //RX_FDEQ_GAIN_7 +204 0x4848 //RX_FDEQ_GAIN_8 +205 0x4848 //RX_FDEQ_GAIN_9 +206 0x4848 //RX_FDEQ_GAIN_10 +207 0x4848 //RX_FDEQ_GAIN_11 +208 0x4848 //RX_FDEQ_GAIN_12 +209 0x4848 //RX_FDEQ_GAIN_13 +210 0x4848 //RX_FDEQ_GAIN_14 +211 0x4848 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0202 //RX_FDEQ_BIN_0 +221 0x0203 //RX_FDEQ_BIN_1 +222 0x0303 //RX_FDEQ_BIN_2 +223 0x0304 //RX_FDEQ_BIN_3 +224 0x0405 //RX_FDEQ_BIN_4 +225 0x0506 //RX_FDEQ_BIN_5 +226 0x0708 //RX_FDEQ_BIN_6 +227 0x090A //RX_FDEQ_BIN_7 +228 0x0B0C //RX_FDEQ_BIN_8 +229 0x0D0E //RX_FDEQ_BIN_9 +230 0x1013 //RX_FDEQ_BIN_10 +231 0x1719 //RX_FDEQ_BIN_11 +232 0x1B1E //RX_FDEQ_BIN_12 +233 0x1E1E //RX_FDEQ_BIN_13 +234 0x1E28 //RX_FDEQ_BIN_14 +235 0x282C //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x4000 //RX_FDEQ_RESRV_0 +245 0x0320 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0030 //RX_FDDRC_BAND_MARGIN_1 +248 0x0050 //RX_FDDRC_BAND_MARGIN_2 +249 0x0080 //RX_FDDRC_BAND_MARGIN_3 +250 0x0007 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x5000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x6400 //RX_FDDRC_THRD_3_2 +258 0x6400 //RX_FDDRC_THRD_3_3 +259 0x2000 //RX_FDDRC_SLANT_0_0 +260 0x2000 //RX_FDDRC_SLANT_0_1 +261 0x2000 //RX_FDDRC_SLANT_0_2 +262 0x2000 //RX_FDDRC_SLANT_0_3 +263 0x5333 //RX_FDDRC_SLANT_1_0 +264 0x5333 //RX_FDDRC_SLANT_1_1 +265 0x5333 //RX_FDDRC_SLANT_1_2 +266 0x5333 //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +268 0x0000 //RX_FILTINDX +269 0x0000 //RX_TDDRC_THRD_0 +270 0x0000 //RX_TDDRC_THRD_1 +271 0x7FFF //RX_TDDRC_THRD_2 +272 0x7FFF //RX_TDDRC_THRD_3 +273 0x7FFF //RX_TDDRC_SLANT_0 +274 0x7FFF //RX_TDDRC_SLANT_1 +275 0x3000 //RX_TDDRC_ALPHA_UP_0 +276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x199A //RX_TDDRC_HMNC_GAIN +279 0x0001 //RX_TDDRC_SMT_FLAG +280 0x0CCD //RX_TDDRC_SMT_W +281 0x0155 //RX_TDDRC_DRC_GAIN +282 0x7C00 //RX_LAMBDA_PKA_FP +283 0x2000 //RX_TPKA_FP +284 0x2000 //RX_MIN_G_FP +285 0x0080 //RX_MAX_G_FP +286 0x0100 //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 +288 0x0000 //RX_MAXLEVEL_CNG +289 0x3000 //RX_BWE_UV_TH +290 0x3000 //RX_BWE_UV_TH2 +291 0x1800 //RX_BWE_UV_TH3 +292 0x1000 //RX_BWE_V_TH +293 0x04CD //RX_BWE_GAIN1_V_TH1 +294 0x0F33 //RX_BWE_GAIN1_V_TH2 +295 0x7333 //RX_BWE_UV_EQ +296 0x199A //RX_BWE_V_EQ +297 0x7333 //RX_BWE_TONE_TH +298 0x0004 //RX_BWE_UV_HOLD_T +299 0x6CCD //RX_BWE_GAIN2_ALPHA +300 0x799A //RX_BWE_GAIN3_ALPHA +301 0x001E //RX_BWE_CUTOFF +302 0x3000 //RX_BWE_GAINFILL +303 0x3200 //RX_BWE_MAXTH_TONE +304 0x2000 //RX_BWE_EQ_0 +305 0x2000 //RX_BWE_EQ_1 +306 0x2000 //RX_BWE_EQ_2 +307 0x2000 //RX_BWE_EQ_3 +308 0x2000 //RX_BWE_EQ_4 +309 0x2000 //RX_BWE_EQ_5 +310 0x2000 //RX_BWE_EQ_6 +311 0x0000 //RX_BWE_RESRV_0 +312 0x0000 //RX_BWE_RESRV_1 +313 0x0000 //RX_BWE_RESRV_2 +#VOL 0 +163 0x3000 //RX_TDDRC_ALPHA_UP_1 +164 0x3000 //RX_TDDRC_ALPHA_UP_2 +165 0x3000 //RX_TDDRC_ALPHA_UP_3 +166 0x3000 //RX_TDDRC_ALPHA_UP_4 +184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +190 0x7FFF //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +269 0x0000 //RX_TDDRC_THRD_0 +270 0x0000 //RX_TDDRC_THRD_1 +271 0x7FFF //RX_TDDRC_THRD_2 +272 0x7FFF //RX_TDDRC_THRD_3 +273 0x7FFF //RX_TDDRC_SLANT_0 +274 0x7FFF //RX_TDDRC_SLANT_1 +275 0x3000 //RX_TDDRC_ALPHA_UP_0 +276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x199A //RX_TDDRC_HMNC_GAIN +279 0x0001 //RX_TDDRC_SMT_FLAG +280 0x0CCD //RX_TDDRC_SMT_W +281 0x0155 //RX_TDDRC_DRC_GAIN +195 0x0020 //RX_FDEQ_SUBNUM +196 0x4848 //RX_FDEQ_GAIN_0 +197 0x4848 //RX_FDEQ_GAIN_1 +198 0x4848 //RX_FDEQ_GAIN_2 +199 0x4848 //RX_FDEQ_GAIN_3 +200 0x4848 //RX_FDEQ_GAIN_4 +201 0x4848 //RX_FDEQ_GAIN_5 +202 0x4848 //RX_FDEQ_GAIN_6 +203 0x4848 //RX_FDEQ_GAIN_7 +204 0x4848 //RX_FDEQ_GAIN_8 +205 0x4848 //RX_FDEQ_GAIN_9 +206 0x4848 //RX_FDEQ_GAIN_10 +207 0x4848 //RX_FDEQ_GAIN_11 +208 0x4848 //RX_FDEQ_GAIN_12 +209 0x4848 //RX_FDEQ_GAIN_13 +210 0x4848 //RX_FDEQ_GAIN_14 +211 0x4848 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0202 //RX_FDEQ_BIN_0 +221 0x0203 //RX_FDEQ_BIN_1 +222 0x0303 //RX_FDEQ_BIN_2 +223 0x0304 //RX_FDEQ_BIN_3 +224 0x0405 //RX_FDEQ_BIN_4 +225 0x0506 //RX_FDEQ_BIN_5 +226 0x0708 //RX_FDEQ_BIN_6 +227 0x090A //RX_FDEQ_BIN_7 +228 0x0B0C //RX_FDEQ_BIN_8 +229 0x0D0E //RX_FDEQ_BIN_9 +230 0x1013 //RX_FDEQ_BIN_10 +231 0x1719 //RX_FDEQ_BIN_11 +232 0x1B1E //RX_FDEQ_BIN_12 +233 0x1E1E //RX_FDEQ_BIN_13 +234 0x1E28 //RX_FDEQ_BIN_14 +235 0x282C //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x4000 //RX_FDEQ_RESRV_0 +245 0x0320 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0030 //RX_FDDRC_BAND_MARGIN_1 +248 0x0050 //RX_FDDRC_BAND_MARGIN_2 +249 0x0080 //RX_FDDRC_BAND_MARGIN_3 +250 0x0007 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x5000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x6400 //RX_FDDRC_THRD_3_2 +258 0x6400 //RX_FDDRC_THRD_3_3 +259 0x2000 //RX_FDDRC_SLANT_0_0 +260 0x2000 //RX_FDDRC_SLANT_0_1 +261 0x2000 //RX_FDDRC_SLANT_0_2 +262 0x2000 //RX_FDDRC_SLANT_0_3 +263 0x5333 //RX_FDDRC_SLANT_1_0 +264 0x5333 //RX_FDDRC_SLANT_1_1 +265 0x5333 //RX_FDDRC_SLANT_1_2 +266 0x5333 //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +286 0x0100 //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 +#VOL 1 +163 0x3000 //RX_TDDRC_ALPHA_UP_1 +164 0x3000 //RX_TDDRC_ALPHA_UP_2 +165 0x3000 //RX_TDDRC_ALPHA_UP_3 +166 0x3000 //RX_TDDRC_ALPHA_UP_4 +184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +190 0x7FFF //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +269 0x0000 //RX_TDDRC_THRD_0 +270 0x0000 //RX_TDDRC_THRD_1 +271 0x7FFF //RX_TDDRC_THRD_2 +272 0x7FFF //RX_TDDRC_THRD_3 +273 0x7FFF //RX_TDDRC_SLANT_0 +274 0x7FFF //RX_TDDRC_SLANT_1 +275 0x3000 //RX_TDDRC_ALPHA_UP_0 +276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x199A //RX_TDDRC_HMNC_GAIN +279 0x0001 //RX_TDDRC_SMT_FLAG +280 0x0CCD //RX_TDDRC_SMT_W +281 0x0155 //RX_TDDRC_DRC_GAIN +195 0x0020 //RX_FDEQ_SUBNUM +196 0x4848 //RX_FDEQ_GAIN_0 +197 0x4848 //RX_FDEQ_GAIN_1 +198 0x4848 //RX_FDEQ_GAIN_2 +199 0x4848 //RX_FDEQ_GAIN_3 +200 0x4848 //RX_FDEQ_GAIN_4 +201 0x4848 //RX_FDEQ_GAIN_5 +202 0x4848 //RX_FDEQ_GAIN_6 +203 0x4848 //RX_FDEQ_GAIN_7 +204 0x4848 //RX_FDEQ_GAIN_8 +205 0x4848 //RX_FDEQ_GAIN_9 +206 0x4848 //RX_FDEQ_GAIN_10 +207 0x4848 //RX_FDEQ_GAIN_11 +208 0x4848 //RX_FDEQ_GAIN_12 +209 0x4848 //RX_FDEQ_GAIN_13 +210 0x4848 //RX_FDEQ_GAIN_14 +211 0x4848 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0202 //RX_FDEQ_BIN_0 +221 0x0203 //RX_FDEQ_BIN_1 +222 0x0303 //RX_FDEQ_BIN_2 +223 0x0304 //RX_FDEQ_BIN_3 +224 0x0405 //RX_FDEQ_BIN_4 +225 0x0506 //RX_FDEQ_BIN_5 +226 0x0708 //RX_FDEQ_BIN_6 +227 0x090A //RX_FDEQ_BIN_7 +228 0x0B0C //RX_FDEQ_BIN_8 +229 0x0D0E //RX_FDEQ_BIN_9 +230 0x1013 //RX_FDEQ_BIN_10 +231 0x1719 //RX_FDEQ_BIN_11 +232 0x1B1E //RX_FDEQ_BIN_12 +233 0x1E1E //RX_FDEQ_BIN_13 +234 0x1E28 //RX_FDEQ_BIN_14 +235 0x282C //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x4000 //RX_FDEQ_RESRV_0 +245 0x0320 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0030 //RX_FDDRC_BAND_MARGIN_1 +248 0x0050 //RX_FDDRC_BAND_MARGIN_2 +249 0x0080 //RX_FDDRC_BAND_MARGIN_3 +250 0x0007 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x5000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x6400 //RX_FDDRC_THRD_3_2 +258 0x6400 //RX_FDDRC_THRD_3_3 +259 0x2000 //RX_FDDRC_SLANT_0_0 +260 0x2000 //RX_FDDRC_SLANT_0_1 +261 0x2000 //RX_FDDRC_SLANT_0_2 +262 0x2000 //RX_FDDRC_SLANT_0_3 +263 0x5333 //RX_FDDRC_SLANT_1_0 +264 0x5333 //RX_FDDRC_SLANT_1_1 +265 0x5333 //RX_FDDRC_SLANT_1_2 +266 0x5333 //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +286 0x0100 //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 +#VOL 2 +163 0x3000 //RX_TDDRC_ALPHA_UP_1 +164 0x3000 //RX_TDDRC_ALPHA_UP_2 +165 0x3000 //RX_TDDRC_ALPHA_UP_3 +166 0x3000 //RX_TDDRC_ALPHA_UP_4 +184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +190 0x7FFF //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +269 0x0000 //RX_TDDRC_THRD_0 +270 0x0000 //RX_TDDRC_THRD_1 +271 0x7FFF //RX_TDDRC_THRD_2 +272 0x7FFF //RX_TDDRC_THRD_3 +273 0x7FFF //RX_TDDRC_SLANT_0 +274 0x7FFF //RX_TDDRC_SLANT_1 +275 0x3000 //RX_TDDRC_ALPHA_UP_0 +276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x199A //RX_TDDRC_HMNC_GAIN +279 0x0001 //RX_TDDRC_SMT_FLAG +280 0x0CCD //RX_TDDRC_SMT_W +281 0x0155 //RX_TDDRC_DRC_GAIN +195 0x0020 //RX_FDEQ_SUBNUM +196 0x4848 //RX_FDEQ_GAIN_0 +197 0x4848 //RX_FDEQ_GAIN_1 +198 0x4848 //RX_FDEQ_GAIN_2 +199 0x4848 //RX_FDEQ_GAIN_3 +200 0x4848 //RX_FDEQ_GAIN_4 +201 0x4848 //RX_FDEQ_GAIN_5 +202 0x4848 //RX_FDEQ_GAIN_6 +203 0x4848 //RX_FDEQ_GAIN_7 +204 0x4848 //RX_FDEQ_GAIN_8 +205 0x4848 //RX_FDEQ_GAIN_9 +206 0x4848 //RX_FDEQ_GAIN_10 +207 0x4848 //RX_FDEQ_GAIN_11 +208 0x4848 //RX_FDEQ_GAIN_12 +209 0x4848 //RX_FDEQ_GAIN_13 +210 0x4848 //RX_FDEQ_GAIN_14 +211 0x4848 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0202 //RX_FDEQ_BIN_0 +221 0x0203 //RX_FDEQ_BIN_1 +222 0x0303 //RX_FDEQ_BIN_2 +223 0x0304 //RX_FDEQ_BIN_3 +224 0x0405 //RX_FDEQ_BIN_4 +225 0x0506 //RX_FDEQ_BIN_5 +226 0x0708 //RX_FDEQ_BIN_6 +227 0x090A //RX_FDEQ_BIN_7 +228 0x0B0C //RX_FDEQ_BIN_8 +229 0x0D0E //RX_FDEQ_BIN_9 +230 0x1013 //RX_FDEQ_BIN_10 +231 0x1719 //RX_FDEQ_BIN_11 +232 0x1B1E //RX_FDEQ_BIN_12 +233 0x1E1E //RX_FDEQ_BIN_13 +234 0x1E28 //RX_FDEQ_BIN_14 +235 0x282C //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x4000 //RX_FDEQ_RESRV_0 +245 0x0320 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0030 //RX_FDDRC_BAND_MARGIN_1 +248 0x0050 //RX_FDDRC_BAND_MARGIN_2 +249 0x0080 //RX_FDDRC_BAND_MARGIN_3 +250 0x0007 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x5000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x6400 //RX_FDDRC_THRD_3_2 +258 0x6400 //RX_FDDRC_THRD_3_3 +259 0x2000 //RX_FDDRC_SLANT_0_0 +260 0x2000 //RX_FDDRC_SLANT_0_1 +261 0x2000 //RX_FDDRC_SLANT_0_2 +262 0x2000 //RX_FDDRC_SLANT_0_3 +263 0x5333 //RX_FDDRC_SLANT_1_0 +264 0x5333 //RX_FDDRC_SLANT_1_1 +265 0x5333 //RX_FDDRC_SLANT_1_2 +266 0x5333 //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +286 0x0100 //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 +#VOL 3 +163 0x3000 //RX_TDDRC_ALPHA_UP_1 +164 0x3000 //RX_TDDRC_ALPHA_UP_2 +165 0x3000 //RX_TDDRC_ALPHA_UP_3 +166 0x3000 //RX_TDDRC_ALPHA_UP_4 +184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +190 0x7FFF //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +269 0x0000 //RX_TDDRC_THRD_0 +270 0x0000 //RX_TDDRC_THRD_1 +271 0x7FFF //RX_TDDRC_THRD_2 +272 0x7FFF //RX_TDDRC_THRD_3 +273 0x7FFF //RX_TDDRC_SLANT_0 +274 0x7FFF //RX_TDDRC_SLANT_1 +275 0x3000 //RX_TDDRC_ALPHA_UP_0 +276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x199A //RX_TDDRC_HMNC_GAIN +279 0x0001 //RX_TDDRC_SMT_FLAG +280 0x0CCD //RX_TDDRC_SMT_W +281 0x0155 //RX_TDDRC_DRC_GAIN +195 0x0020 //RX_FDEQ_SUBNUM +196 0x4848 //RX_FDEQ_GAIN_0 +197 0x4848 //RX_FDEQ_GAIN_1 +198 0x4848 //RX_FDEQ_GAIN_2 +199 0x4848 //RX_FDEQ_GAIN_3 +200 0x4848 //RX_FDEQ_GAIN_4 +201 0x4848 //RX_FDEQ_GAIN_5 +202 0x4848 //RX_FDEQ_GAIN_6 +203 0x4848 //RX_FDEQ_GAIN_7 +204 0x4848 //RX_FDEQ_GAIN_8 +205 0x4848 //RX_FDEQ_GAIN_9 +206 0x4848 //RX_FDEQ_GAIN_10 +207 0x4848 //RX_FDEQ_GAIN_11 +208 0x4848 //RX_FDEQ_GAIN_12 +209 0x4848 //RX_FDEQ_GAIN_13 +210 0x4848 //RX_FDEQ_GAIN_14 +211 0x4848 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0202 //RX_FDEQ_BIN_0 +221 0x0203 //RX_FDEQ_BIN_1 +222 0x0303 //RX_FDEQ_BIN_2 +223 0x0304 //RX_FDEQ_BIN_3 +224 0x0405 //RX_FDEQ_BIN_4 +225 0x0506 //RX_FDEQ_BIN_5 +226 0x0708 //RX_FDEQ_BIN_6 +227 0x090A //RX_FDEQ_BIN_7 +228 0x0B0C //RX_FDEQ_BIN_8 +229 0x0D0E //RX_FDEQ_BIN_9 +230 0x1013 //RX_FDEQ_BIN_10 +231 0x1719 //RX_FDEQ_BIN_11 +232 0x1B1E //RX_FDEQ_BIN_12 +233 0x1E1E //RX_FDEQ_BIN_13 +234 0x1E28 //RX_FDEQ_BIN_14 +235 0x282C //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x4000 //RX_FDEQ_RESRV_0 +245 0x0320 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0030 //RX_FDDRC_BAND_MARGIN_1 +248 0x0050 //RX_FDDRC_BAND_MARGIN_2 +249 0x0080 //RX_FDDRC_BAND_MARGIN_3 +250 0x0007 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x5000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x6400 //RX_FDDRC_THRD_3_2 +258 0x6400 //RX_FDDRC_THRD_3_3 +259 0x2000 //RX_FDDRC_SLANT_0_0 +260 0x2000 //RX_FDDRC_SLANT_0_1 +261 0x2000 //RX_FDDRC_SLANT_0_2 +262 0x2000 //RX_FDDRC_SLANT_0_3 +263 0x5333 //RX_FDDRC_SLANT_1_0 +264 0x5333 //RX_FDDRC_SLANT_1_1 +265 0x5333 //RX_FDDRC_SLANT_1_2 +266 0x5333 //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +286 0x0100 //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 +#VOL 4 +163 0x3000 //RX_TDDRC_ALPHA_UP_1 +164 0x3000 //RX_TDDRC_ALPHA_UP_2 +165 0x3000 //RX_TDDRC_ALPHA_UP_3 +166 0x3000 //RX_TDDRC_ALPHA_UP_4 +184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +190 0x7FFF //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +269 0x0000 //RX_TDDRC_THRD_0 +270 0x0000 //RX_TDDRC_THRD_1 +271 0x7FFF //RX_TDDRC_THRD_2 +272 0x7FFF //RX_TDDRC_THRD_3 +273 0x7FFF //RX_TDDRC_SLANT_0 +274 0x7FFF //RX_TDDRC_SLANT_1 +275 0x3000 //RX_TDDRC_ALPHA_UP_0 +276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x199A //RX_TDDRC_HMNC_GAIN +279 0x0001 //RX_TDDRC_SMT_FLAG +280 0x0CCD //RX_TDDRC_SMT_W +281 0x0155 //RX_TDDRC_DRC_GAIN +195 0x0020 //RX_FDEQ_SUBNUM +196 0x4848 //RX_FDEQ_GAIN_0 +197 0x4848 //RX_FDEQ_GAIN_1 +198 0x4848 //RX_FDEQ_GAIN_2 +199 0x4848 //RX_FDEQ_GAIN_3 +200 0x4848 //RX_FDEQ_GAIN_4 +201 0x4848 //RX_FDEQ_GAIN_5 +202 0x4848 //RX_FDEQ_GAIN_6 +203 0x4848 //RX_FDEQ_GAIN_7 +204 0x4848 //RX_FDEQ_GAIN_8 +205 0x4848 //RX_FDEQ_GAIN_9 +206 0x4848 //RX_FDEQ_GAIN_10 +207 0x4848 //RX_FDEQ_GAIN_11 +208 0x4848 //RX_FDEQ_GAIN_12 +209 0x4848 //RX_FDEQ_GAIN_13 +210 0x4848 //RX_FDEQ_GAIN_14 +211 0x4848 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0202 //RX_FDEQ_BIN_0 +221 0x0203 //RX_FDEQ_BIN_1 +222 0x0303 //RX_FDEQ_BIN_2 +223 0x0304 //RX_FDEQ_BIN_3 +224 0x0405 //RX_FDEQ_BIN_4 +225 0x0506 //RX_FDEQ_BIN_5 +226 0x0708 //RX_FDEQ_BIN_6 +227 0x090A //RX_FDEQ_BIN_7 +228 0x0B0C //RX_FDEQ_BIN_8 +229 0x0D0E //RX_FDEQ_BIN_9 +230 0x1013 //RX_FDEQ_BIN_10 +231 0x1719 //RX_FDEQ_BIN_11 +232 0x1B1E //RX_FDEQ_BIN_12 +233 0x1E1E //RX_FDEQ_BIN_13 +234 0x1E28 //RX_FDEQ_BIN_14 +235 0x282C //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x4000 //RX_FDEQ_RESRV_0 +245 0x0320 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0030 //RX_FDDRC_BAND_MARGIN_1 +248 0x0050 //RX_FDDRC_BAND_MARGIN_2 +249 0x0080 //RX_FDDRC_BAND_MARGIN_3 +250 0x0007 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x5000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x6400 //RX_FDDRC_THRD_3_2 +258 0x6400 //RX_FDDRC_THRD_3_3 +259 0x2000 //RX_FDDRC_SLANT_0_0 +260 0x2000 //RX_FDDRC_SLANT_0_1 +261 0x2000 //RX_FDDRC_SLANT_0_2 +262 0x2000 //RX_FDDRC_SLANT_0_3 +263 0x5333 //RX_FDDRC_SLANT_1_0 +264 0x5333 //RX_FDDRC_SLANT_1_1 +265 0x5333 //RX_FDDRC_SLANT_1_2 +266 0x5333 //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +286 0x0100 //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 +#VOL 5 +163 0x3000 //RX_TDDRC_ALPHA_UP_1 +164 0x3000 //RX_TDDRC_ALPHA_UP_2 +165 0x3000 //RX_TDDRC_ALPHA_UP_3 +166 0x3000 //RX_TDDRC_ALPHA_UP_4 +184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +190 0x7FFF //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +269 0x0000 //RX_TDDRC_THRD_0 +270 0x0000 //RX_TDDRC_THRD_1 +271 0x7FFF //RX_TDDRC_THRD_2 +272 0x7FFF //RX_TDDRC_THRD_3 +273 0x7FFF //RX_TDDRC_SLANT_0 +274 0x7FFF //RX_TDDRC_SLANT_1 +275 0x3000 //RX_TDDRC_ALPHA_UP_0 +276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x199A //RX_TDDRC_HMNC_GAIN +279 0x0001 //RX_TDDRC_SMT_FLAG +280 0x0CCD //RX_TDDRC_SMT_W +281 0x0155 //RX_TDDRC_DRC_GAIN +195 0x0020 //RX_FDEQ_SUBNUM +196 0x4848 //RX_FDEQ_GAIN_0 +197 0x4848 //RX_FDEQ_GAIN_1 +198 0x4848 //RX_FDEQ_GAIN_2 +199 0x4848 //RX_FDEQ_GAIN_3 +200 0x4848 //RX_FDEQ_GAIN_4 +201 0x4848 //RX_FDEQ_GAIN_5 +202 0x4848 //RX_FDEQ_GAIN_6 +203 0x4848 //RX_FDEQ_GAIN_7 +204 0x4848 //RX_FDEQ_GAIN_8 +205 0x4848 //RX_FDEQ_GAIN_9 +206 0x4848 //RX_FDEQ_GAIN_10 +207 0x4848 //RX_FDEQ_GAIN_11 +208 0x4848 //RX_FDEQ_GAIN_12 +209 0x4848 //RX_FDEQ_GAIN_13 +210 0x4848 //RX_FDEQ_GAIN_14 +211 0x4848 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0202 //RX_FDEQ_BIN_0 +221 0x0203 //RX_FDEQ_BIN_1 +222 0x0303 //RX_FDEQ_BIN_2 +223 0x0304 //RX_FDEQ_BIN_3 +224 0x0405 //RX_FDEQ_BIN_4 +225 0x0506 //RX_FDEQ_BIN_5 +226 0x0708 //RX_FDEQ_BIN_6 +227 0x090A //RX_FDEQ_BIN_7 +228 0x0B0C //RX_FDEQ_BIN_8 +229 0x0D0E //RX_FDEQ_BIN_9 +230 0x1013 //RX_FDEQ_BIN_10 +231 0x1719 //RX_FDEQ_BIN_11 +232 0x1B1E //RX_FDEQ_BIN_12 +233 0x1E1E //RX_FDEQ_BIN_13 +234 0x1E28 //RX_FDEQ_BIN_14 +235 0x282C //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x4000 //RX_FDEQ_RESRV_0 +245 0x0320 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0030 //RX_FDDRC_BAND_MARGIN_1 +248 0x0050 //RX_FDDRC_BAND_MARGIN_2 +249 0x0080 //RX_FDDRC_BAND_MARGIN_3 +250 0x0007 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x5000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x6400 //RX_FDDRC_THRD_3_2 +258 0x6400 //RX_FDDRC_THRD_3_3 +259 0x2000 //RX_FDDRC_SLANT_0_0 +260 0x2000 //RX_FDDRC_SLANT_0_1 +261 0x2000 //RX_FDDRC_SLANT_0_2 +262 0x2000 //RX_FDDRC_SLANT_0_3 +263 0x5333 //RX_FDDRC_SLANT_1_0 +264 0x5333 //RX_FDDRC_SLANT_1_1 +265 0x5333 //RX_FDDRC_SLANT_1_2 +266 0x5333 //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +286 0x0100 //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 +#VOL 6 +163 0x3000 //RX_TDDRC_ALPHA_UP_1 +164 0x3000 //RX_TDDRC_ALPHA_UP_2 +165 0x3000 //RX_TDDRC_ALPHA_UP_3 +166 0x3000 //RX_TDDRC_ALPHA_UP_4 +184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +190 0x7FFF //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +269 0x0000 //RX_TDDRC_THRD_0 +270 0x0000 //RX_TDDRC_THRD_1 +271 0x7FFF //RX_TDDRC_THRD_2 +272 0x7FFF //RX_TDDRC_THRD_3 +273 0x7FFF //RX_TDDRC_SLANT_0 +274 0x7FFF //RX_TDDRC_SLANT_1 +275 0x3000 //RX_TDDRC_ALPHA_UP_0 +276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x199A //RX_TDDRC_HMNC_GAIN +279 0x0001 //RX_TDDRC_SMT_FLAG +280 0x0CCD //RX_TDDRC_SMT_W +281 0x0155 //RX_TDDRC_DRC_GAIN +195 0x0020 //RX_FDEQ_SUBNUM +196 0x4848 //RX_FDEQ_GAIN_0 +197 0x4848 //RX_FDEQ_GAIN_1 +198 0x4848 //RX_FDEQ_GAIN_2 +199 0x4848 //RX_FDEQ_GAIN_3 +200 0x4848 //RX_FDEQ_GAIN_4 +201 0x4848 //RX_FDEQ_GAIN_5 +202 0x4848 //RX_FDEQ_GAIN_6 +203 0x4848 //RX_FDEQ_GAIN_7 +204 0x4848 //RX_FDEQ_GAIN_8 +205 0x4848 //RX_FDEQ_GAIN_9 +206 0x4848 //RX_FDEQ_GAIN_10 +207 0x4848 //RX_FDEQ_GAIN_11 +208 0x4848 //RX_FDEQ_GAIN_12 +209 0x4848 //RX_FDEQ_GAIN_13 +210 0x4848 //RX_FDEQ_GAIN_14 +211 0x4848 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0202 //RX_FDEQ_BIN_0 +221 0x0203 //RX_FDEQ_BIN_1 +222 0x0303 //RX_FDEQ_BIN_2 +223 0x0304 //RX_FDEQ_BIN_3 +224 0x0405 //RX_FDEQ_BIN_4 +225 0x0506 //RX_FDEQ_BIN_5 +226 0x0708 //RX_FDEQ_BIN_6 +227 0x090A //RX_FDEQ_BIN_7 +228 0x0B0C //RX_FDEQ_BIN_8 +229 0x0D0E //RX_FDEQ_BIN_9 +230 0x1013 //RX_FDEQ_BIN_10 +231 0x1719 //RX_FDEQ_BIN_11 +232 0x1B1E //RX_FDEQ_BIN_12 +233 0x1E1E //RX_FDEQ_BIN_13 +234 0x1E28 //RX_FDEQ_BIN_14 +235 0x282C //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x4000 //RX_FDEQ_RESRV_0 +245 0x0320 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0030 //RX_FDDRC_BAND_MARGIN_1 +248 0x0050 //RX_FDDRC_BAND_MARGIN_2 +249 0x0080 //RX_FDDRC_BAND_MARGIN_3 +250 0x0007 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x5000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x6400 //RX_FDDRC_THRD_3_2 +258 0x6400 //RX_FDDRC_THRD_3_3 +259 0x2000 //RX_FDDRC_SLANT_0_0 +260 0x2000 //RX_FDDRC_SLANT_0_1 +261 0x2000 //RX_FDDRC_SLANT_0_2 +262 0x2000 //RX_FDDRC_SLANT_0_3 +263 0x5333 //RX_FDDRC_SLANT_1_0 +264 0x5333 //RX_FDDRC_SLANT_1_1 +265 0x5333 //RX_FDDRC_SLANT_1_2 +266 0x5333 //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +286 0x0100 //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 #CASE_NAME BLUETOOTH-BTNB-VOICE_GENERIC-FB -#PARAM_TYPE TX+RX -#TOTAL_CUSTOM_STEP 7 +#PARAM_MODE Full +#PARAM_TYPE TX+2RX +#TOTAL_CUSTOM_STEP 7+7 #TX 0 0x0009 //TX_OPERATION_MODE_0 1 0x0009 //TX_OPERATION_MODE_1 @@ -14282,10 +21619,10 @@ 248 0xF600 //TX_THR_SN_EST_6 249 0xF600 //TX_THR_SN_EST_7 250 0x0200 //TX_DELTA_THR_SN_EST_0 -251 0x0200 //TX_DELTA_THR_SN_EST_1 -252 0x0400 //TX_DELTA_THR_SN_EST_2 -253 0x0300 //TX_DELTA_THR_SN_EST_3 -254 0x0600 //TX_DELTA_THR_SN_EST_4 +251 0x0400 //TX_DELTA_THR_SN_EST_1 +252 0x0300 //TX_DELTA_THR_SN_EST_2 +253 0x0600 //TX_DELTA_THR_SN_EST_3 +254 0x0200 //TX_DELTA_THR_SN_EST_4 255 0x0200 //TX_DELTA_THR_SN_EST_5 256 0x0200 //TX_DELTA_THR_SN_EST_6 257 0x0200 //TX_DELTA_THR_SN_EST_7 @@ -14313,31 +21650,31 @@ 279 0x2000 //TX_B_POST_FLT_0 280 0x2000 //TX_B_POST_FLT_1 281 0x0012 //TX_NS_LVL_CTRL_0 -282 0x0019 //TX_NS_LVL_CTRL_1 +282 0x0016 //TX_NS_LVL_CTRL_1 283 0x0016 //TX_NS_LVL_CTRL_2 -284 0x0016 //TX_NS_LVL_CTRL_3 -285 0x0019 //TX_NS_LVL_CTRL_4 +284 0x0019 //TX_NS_LVL_CTRL_3 +285 0x0010 //TX_NS_LVL_CTRL_4 286 0x0010 //TX_NS_LVL_CTRL_5 -287 0x0010 //TX_NS_LVL_CTRL_6 +287 0x0019 //TX_NS_LVL_CTRL_6 288 0x0010 //TX_NS_LVL_CTRL_7 289 0x000C //TX_MIN_GAIN_S_0 -290 0x0011 //TX_MIN_GAIN_S_1 +290 0x000C //TX_MIN_GAIN_S_1 291 0x000C //TX_MIN_GAIN_S_2 -292 0x000C //TX_MIN_GAIN_S_3 -293 0x000F //TX_MIN_GAIN_S_4 +292 0x000F //TX_MIN_GAIN_S_3 +293 0x000C //TX_MIN_GAIN_S_4 294 0x000C //TX_MIN_GAIN_S_5 -295 0x000C //TX_MIN_GAIN_S_6 +295 0x0011 //TX_MIN_GAIN_S_6 296 0x000C //TX_MIN_GAIN_S_7 297 0x7FFF //TX_NMOS_SUP 298 0x0000 //TX_NS_MAX_PRI_SNR_TH 299 0x0000 //TX_NMOS_SUP_MENSA 300 0x7000 //TX_SNRI_SUP_0 -301 0x6000 //TX_SNRI_SUP_1 +301 0x7000 //TX_SNRI_SUP_1 302 0x7000 //TX_SNRI_SUP_2 -303 0x7000 //TX_SNRI_SUP_3 -304 0x6000 //TX_SNRI_SUP_4 +303 0x6000 //TX_SNRI_SUP_3 +304 0x7FFF //TX_SNRI_SUP_4 305 0x7FFF //TX_SNRI_SUP_5 -306 0x7FFF //TX_SNRI_SUP_6 +306 0x6000 //TX_SNRI_SUP_6 307 0x7FFF //TX_SNRI_SUP_7 308 0x7FFF //TX_THR_LFNS 309 0x0016 //TX_G_LFNS @@ -14354,8 +21691,8 @@ 320 0x6000 //TX_A_POST_FILT_S_6 321 0x6000 //TX_A_POST_FILT_S_7 322 0x2000 //TX_B_POST_FILT_0 -323 0x2000 //TX_B_POST_FILT_1 -324 0x4000 //TX_B_POST_FILT_2 +323 0x4000 //TX_B_POST_FILT_1 +324 0x2000 //TX_B_POST_FILT_2 325 0x2000 //TX_B_POST_FILT_3 326 0x2000 //TX_B_POST_FILT_4 327 0x2000 //TX_B_POST_FILT_5 @@ -14411,10 +21748,10 @@ 377 0x0000 //TX_NOISE_TH_5_4 378 0x02BC //TX_NOISE_TH_6 379 0x0020 //TX_MINENOISE_TH -380 0x4000 //TX_MINENOISE_MIC0_TH_MTS -381 0xFFEE //TX_MINENOISE_MIC0_TH_EXP -382 0x6000 //TX_MINENOISE_MIC0_S_TH_MTS -383 0xFFF3 //TX_MINENOISE_MIC0_S_TH_EXP +380 0x4000 //TX_MORENS_TFMASK_TH +381 0xFFEE //TX_DRC_QUIET_FLOOR +382 0x6000 //TX_RATIODTL_CUT_TH +383 0xFFF3 //TX_DT_CUT_K1 384 0x0666 //TX_OUT_ENER_S_TH_CLEAN 385 0x0666 //TX_OUT_ENER_S_TH_LESSCLEAN 386 0x0333 //TX_OUT_ENER_S_TH_NOISY @@ -14422,15 +21759,15 @@ 388 0x0333 //TX_OUT_ENER_TH_SPEECH 389 0x2000 //TX_SN_NPB_GAIN 390 0x0000 //TX_NN_NPB_GAIN -391 0x0000 //TX_CSX_ALPHA_0 -392 0x0000 //TX_CSX_ALPHA_1 -393 0x0000 //TX_CSX_ALPHA_2 -394 0x0000 //TX_CSX_ALPHA_3 -395 0x0800 //TX_MU_ARSP_EST -396 0x00C8 //TX_P_OUTBEAM_MIN_TH +391 0x0000 //TX_POST_MASK_SUP_HSNE +392 0x0000 //TX_TAIL_DET_TH +393 0x0000 //TX_B_LESSCUT_RTO_WTA +394 0x0000 //TX_MEL_G_R +395 0x0800 //TX_SUPHIGH_TH +396 0x00C8 //TX_MASK_G_R 397 0x0002 //TX_EXTRA_NS_L -398 0x0800 //TX_EXTRA_NS_A -399 0x0005 //TX_VR_NOISE_FLOOR_TH +398 0x0800 //TX_C_POST_FLT_MASK +399 0x0005 //TX_A_POST_FLT_WNS 400 0x0148 //TX_MIN_G_LOW300HZ 401 0x0002 //TX_MAXLEVEL_CNG 402 0x00B4 //TX_STN_NOISE_TH @@ -14545,16 +21882,16 @@ 511 0x6666 //TX_MIC_TO_BFGAIN 512 0x0000 //TX_MICTOBFGAIN0 513 0x0000 //TX_FASTMUE_TH -514 0x0000 //TX_DERVB_LEN_0 -515 0x0000 //TX_DERVB_LEN_1 -516 0x0000 //TX_RHO_DERVB -517 0x0000 //TX_MIC_INDX_DERVB -518 0x0000 //TX_MU_DERVB -519 0x0000 //TX_DR_RESRV_0 -520 0x0000 //TX_DR_RESRV_1 -521 0x0000 //TX_DR_RESRV_2 -522 0x0000 //TX_DR_RESRV_3 -523 0x0000 //TX_DR_RESRV_4 +514 0x0000 //TX_DEREVERB_LF_MU +515 0x0000 //TX_DEREVERB_HF_MU +516 0x0000 //TX_DEREVERB_DELAY +517 0x0000 //TX_DEREVERB_COEF_LEN +518 0x0000 //TX_DEREVERB_DNR +519 0x0000 //TX_DEREVERB_ALPHA +520 0x0000 //TX_DEREVERB_BETA +521 0x0000 //TX_GSC_RTOL_TH +522 0x0000 //TX_GSC_RTOH_TH +523 0x0000 //TX_WIDE2_MEANHTH 524 0x0000 //TX_DR_RESRV_5 525 0x0000 //TX_DR_RESRV_6 526 0x0000 //TX_DR_RESRV_7 @@ -14928,8 +22265,73 @@ 894 0xC000 //TX_FASTNS_SSA_THHFL 895 0xCCCC //TX_FASTNS_SSA_THLFH 896 0xD999 //TX_FASTNS_SSA_THHFH +897 0x0000 //TX_SENDFUNC_REG_MICMUTE +898 0x0000 //TX_SENDFUNC_REG_MICMUTE1 +899 0x0000 //TX_MICMUTE_RATIO_THR +900 0x0000 //TX_MICMUTE_AMP_THR +901 0x0000 //TX_MICMUTE_HPF_IND +902 0x0000 //TX_MICMUTE_LOG_EYR_TH +903 0x0000 //TX_MICMUTE_CVG_TIME +904 0x0000 //TX_MICMUTE_RELEASE_TIME +905 0x0000 //TX_MIC_VOLUME_MIC0MUTE +906 0x0000 //TX_MICMUTE_EPD_OFFSET_0 +907 0x0000 //TX_MICMUTE_FRQ_AEC_L +908 0x0000 //TX_MICMUTE_EAD_THR +909 0x0000 //TX_MICMUTE_LAMBDA_CB_NLE +910 0x0000 //TX_MICMUTE_LAMBDA_RE_EST +911 0x0000 //TX_DTD_THR1_MICMUTE_0 +912 0x0000 //TX_DTD_THR1_MICMUTE_1 +913 0x0000 //TX_DTD_THR1_MICMUTE_2 +914 0x0000 //TX_DTD_THR1_MICMUTE_3 +915 0x0000 //TX_DTD_THR2_MICMUTE_0 +916 0x0000 //TX_MICMUTE_MIN_EQ_RE_EST_0 +917 0x0000 //TX_MICMUTE_MIN_EQ_RE_EST_1 +918 0x0000 //TX_MICMUTE_MIN_EQ_RE_EST_2 +919 0x0000 //TX_MICMUTE_MIN_EQ_RE_EST_3 +920 0x0000 //TX_MICMUTE_MIN_EQ_RE_EST_4 +921 0x0000 //TX_MICMUTE_C_POST_FLT +922 0x0000 //TX_MICMUTE_DT_CUT_K +923 0x0000 //TX_MICMUTE_DT_CUT_THR +924 0x0000 //TX_MICMUTE_DT_CUT_K2 +925 0x0000 //TX_MICMUTE_DT_CUT_THR2 +926 0x0000 //TX_MICMUTE_DT2_HOLD_N +927 0x0000 //TX_MICMUTE_RATIODTH_THCUT +928 0x0000 //TX_MICMUTE_B_POST_FLT_ECHOL +929 0x0000 //TX_MICMUTE_B_POST_FLT_ECHOH +930 0x0000 //TX_MICMUTE_C_POST_FLT_MASK +931 0x0000 //TX_MICMUTE_RATIODTL_CUT_TH +932 0x0000 //TX_MICMUTE_DT_CUT_K1 +933 0x0000 //TX_MICMUTE_N2_SN_EST +934 0x0000 //TX_MICMUTE_THR_SN_EST_0 +935 0x0000 //TX_MICMUTE_MIN_G_CTRL_0 +936 0x0000 //TX_MICMUTE_A_POST_FILT_S_0 +937 0x0000 //TX_MICMUTE_B_POST_FILT_0 +938 0x0000 //TX_MIC1RUB_AMP_THR +939 0x0000 //TX_MIC1MUTE_RATIO_THR +940 0x0000 //TX_MIC1MUTE_AMP_THR +941 0x0000 //TX_MIC1MUTE_CVG_TIME +942 0x0000 //TX_MIC1MUTE_RELEASE_TIME +943 0x0000 //TX_AMS_RESRV_01 +944 0x0000 //TX_AMS_RESRV_02 +945 0x0000 //TX_AMS_RESRV_03 +946 0x0000 //TX_AMS_RESRV_04 +947 0x0000 //TX_AMS_RESRV_05 +948 0x0000 //TX_AMS_RESRV_06 +949 0x0000 //TX_AMS_RESRV_07 +950 0x0000 //TX_AMS_RESRV_08 +951 0x0000 //TX_AMS_RESRV_09 +952 0x0000 //TX_AMS_RESRV_10 +953 0x0000 //TX_AMS_RESRV_11 +954 0x0000 //TX_AMS_RESRV_12 +955 0x0000 //TX_AMS_RESRV_13 +956 0x0000 //TX_AMS_RESRV_14 +957 0x0000 //TX_AMS_RESRV_15 +958 0x0000 //TX_AMS_RESRV_16 +959 0x0000 //TX_AMS_RESRV_17 +960 0x0000 //TX_AMS_RESRV_18 +961 0x0000 //TX_AMS_RESRV_19 #RX -0 0x0064 //RX_RECVFUNC_MODE_0 +0 0x2064 //RX_RECVFUNC_MODE_0 1 0x0000 //RX_RECVFUNC_MODE_1 2 0x0004 //RX_SAMPLINGFREQ_SIG 3 0x0004 //RX_SAMPLINGFREQ_PROC @@ -15779,10 +23181,862 @@ 110 0x0000 //RX_FDDRC_RESRV_0 129 0x0100 //RX_SPK_VOL 130 0x0000 //RX_VOL_RESRV_0 +#RX 2 +157 0x0064 //RX_RECVFUNC_MODE_0 +158 0x0000 //RX_RECVFUNC_MODE_1 +159 0x0004 //RX_SAMPLINGFREQ_SIG +160 0x0004 //RX_SAMPLINGFREQ_PROC +161 0x000A //RX_FRAME_SZ +162 0x0000 //RX_DELAY_OPT +163 0x1000 //RX_TDDRC_ALPHA_UP_1 +164 0x1000 //RX_TDDRC_ALPHA_UP_2 +165 0x1000 //RX_TDDRC_ALPHA_UP_3 +166 0x1000 //RX_TDDRC_ALPHA_UP_4 +167 0x0800 //RX_PGA +168 0x7FFF //RX_A_HP +169 0x4000 //RX_B_PE +170 0x7800 //RX_THR_PITCH_DET_0 +171 0x7000 //RX_THR_PITCH_DET_1 +172 0x6000 //RX_THR_PITCH_DET_2 +173 0x0008 //RX_PITCH_BFR_LEN +174 0x0003 //RX_SBD_PITCH_DET +175 0x0100 //RX_PP_RESRV_0 +176 0x0020 //RX_PP_RESRV_1 +177 0x0500 //RX_N_SN_EST +178 0x000C //RX_N2_SN_EST +179 0x000A //RX_NS_LVL_CTRL +180 0xF600 //RX_THR_SN_EST +181 0x7000 //RX_LAMBDA_PFILT +182 0x000A //RX_FENS_RESRV_0 +183 0x0190 //RX_FENS_RESRV_1 +184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +187 0x0002 //RX_EXTRA_NS_L +188 0x0800 //RX_EXTRA_NS_A +189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +190 0x7FFF //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +192 0x199A //RX_A_POST_FLT +193 0x0000 //RX_LMT_THRD +194 0x4000 //RX_LMT_ALPHA +195 0x0020 //RX_FDEQ_SUBNUM +196 0x4848 //RX_FDEQ_GAIN_0 +197 0x4848 //RX_FDEQ_GAIN_1 +198 0x4848 //RX_FDEQ_GAIN_2 +199 0x4848 //RX_FDEQ_GAIN_3 +200 0x4848 //RX_FDEQ_GAIN_4 +201 0x4848 //RX_FDEQ_GAIN_5 +202 0x4848 //RX_FDEQ_GAIN_6 +203 0x4848 //RX_FDEQ_GAIN_7 +204 0x4848 //RX_FDEQ_GAIN_8 +205 0x4848 //RX_FDEQ_GAIN_9 +206 0x4848 //RX_FDEQ_GAIN_10 +207 0x4848 //RX_FDEQ_GAIN_11 +208 0x4848 //RX_FDEQ_GAIN_12 +209 0x4848 //RX_FDEQ_GAIN_13 +210 0x4848 //RX_FDEQ_GAIN_14 +211 0x4848 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0202 //RX_FDEQ_BIN_0 +221 0x0203 //RX_FDEQ_BIN_1 +222 0x0304 //RX_FDEQ_BIN_2 +223 0x0405 //RX_FDEQ_BIN_3 +224 0x0607 //RX_FDEQ_BIN_4 +225 0x0809 //RX_FDEQ_BIN_5 +226 0x0A0B //RX_FDEQ_BIN_6 +227 0x0C0D //RX_FDEQ_BIN_7 +228 0x0E0F //RX_FDEQ_BIN_8 +229 0x1011 //RX_FDEQ_BIN_9 +230 0x1214 //RX_FDEQ_BIN_10 +231 0x1618 //RX_FDEQ_BIN_11 +232 0x1C1C //RX_FDEQ_BIN_12 +233 0x2020 //RX_FDEQ_BIN_13 +234 0x2020 //RX_FDEQ_BIN_14 +235 0x2011 //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x4000 //RX_FDEQ_RESRV_0 +245 0x0320 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0030 //RX_FDDRC_BAND_MARGIN_1 +248 0x0050 //RX_FDDRC_BAND_MARGIN_2 +249 0x0080 //RX_FDDRC_BAND_MARGIN_3 +250 0x0007 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x5000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x6400 //RX_FDDRC_THRD_3_2 +258 0x6400 //RX_FDDRC_THRD_3_3 +259 0x2000 //RX_FDDRC_SLANT_0_0 +260 0x2000 //RX_FDDRC_SLANT_0_1 +261 0x2000 //RX_FDDRC_SLANT_0_2 +262 0x2000 //RX_FDDRC_SLANT_0_3 +263 0x5333 //RX_FDDRC_SLANT_1_0 +264 0x5333 //RX_FDDRC_SLANT_1_1 +265 0x5333 //RX_FDDRC_SLANT_1_2 +266 0x5333 //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +268 0x0000 //RX_FILTINDX +269 0x0000 //RX_TDDRC_THRD_0 +270 0x0000 //RX_TDDRC_THRD_1 +271 0x7FFF //RX_TDDRC_THRD_2 +272 0x7FFF //RX_TDDRC_THRD_3 +273 0x7FFF //RX_TDDRC_SLANT_0 +274 0x7FFF //RX_TDDRC_SLANT_1 +275 0x1000 //RX_TDDRC_ALPHA_UP_0 +276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x199A //RX_TDDRC_HMNC_GAIN +279 0x0001 //RX_TDDRC_SMT_FLAG +280 0x0CCD //RX_TDDRC_SMT_W +281 0x0155 //RX_TDDRC_DRC_GAIN +282 0x7C00 //RX_LAMBDA_PKA_FP +283 0x2000 //RX_TPKA_FP +284 0x2000 //RX_MIN_G_FP +285 0x0080 //RX_MAX_G_FP +286 0x0100 //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 +288 0x0000 //RX_MAXLEVEL_CNG +289 0x3000 //RX_BWE_UV_TH +290 0x3000 //RX_BWE_UV_TH2 +291 0x1800 //RX_BWE_UV_TH3 +292 0x1000 //RX_BWE_V_TH +293 0x04CD //RX_BWE_GAIN1_V_TH1 +294 0x0F33 //RX_BWE_GAIN1_V_TH2 +295 0x7333 //RX_BWE_UV_EQ +296 0x199A //RX_BWE_V_EQ +297 0x7333 //RX_BWE_TONE_TH +298 0x0004 //RX_BWE_UV_HOLD_T +299 0x6CCD //RX_BWE_GAIN2_ALPHA +300 0x799A //RX_BWE_GAIN3_ALPHA +301 0x001E //RX_BWE_CUTOFF +302 0x3000 //RX_BWE_GAINFILL +303 0x3200 //RX_BWE_MAXTH_TONE +304 0x2000 //RX_BWE_EQ_0 +305 0x2000 //RX_BWE_EQ_1 +306 0x2000 //RX_BWE_EQ_2 +307 0x2000 //RX_BWE_EQ_3 +308 0x2000 //RX_BWE_EQ_4 +309 0x2000 //RX_BWE_EQ_5 +310 0x2000 //RX_BWE_EQ_6 +311 0x0000 //RX_BWE_RESRV_0 +312 0x0000 //RX_BWE_RESRV_1 +313 0x0000 //RX_BWE_RESRV_2 +#VOL 0 +163 0x1000 //RX_TDDRC_ALPHA_UP_1 +164 0x1000 //RX_TDDRC_ALPHA_UP_2 +165 0x1000 //RX_TDDRC_ALPHA_UP_3 +166 0x1000 //RX_TDDRC_ALPHA_UP_4 +184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +190 0x7FFF //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +269 0x0000 //RX_TDDRC_THRD_0 +270 0x0000 //RX_TDDRC_THRD_1 +271 0x7FFF //RX_TDDRC_THRD_2 +272 0x7FFF //RX_TDDRC_THRD_3 +273 0x7FFF //RX_TDDRC_SLANT_0 +274 0x7FFF //RX_TDDRC_SLANT_1 +275 0x1000 //RX_TDDRC_ALPHA_UP_0 +276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x199A //RX_TDDRC_HMNC_GAIN +279 0x0001 //RX_TDDRC_SMT_FLAG +280 0x0CCD //RX_TDDRC_SMT_W +281 0x0155 //RX_TDDRC_DRC_GAIN +195 0x0020 //RX_FDEQ_SUBNUM +196 0x4848 //RX_FDEQ_GAIN_0 +197 0x4848 //RX_FDEQ_GAIN_1 +198 0x4848 //RX_FDEQ_GAIN_2 +199 0x4848 //RX_FDEQ_GAIN_3 +200 0x4848 //RX_FDEQ_GAIN_4 +201 0x4848 //RX_FDEQ_GAIN_5 +202 0x4848 //RX_FDEQ_GAIN_6 +203 0x4848 //RX_FDEQ_GAIN_7 +204 0x4848 //RX_FDEQ_GAIN_8 +205 0x4848 //RX_FDEQ_GAIN_9 +206 0x4848 //RX_FDEQ_GAIN_10 +207 0x4848 //RX_FDEQ_GAIN_11 +208 0x4848 //RX_FDEQ_GAIN_12 +209 0x4848 //RX_FDEQ_GAIN_13 +210 0x4848 //RX_FDEQ_GAIN_14 +211 0x4848 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0202 //RX_FDEQ_BIN_0 +221 0x0203 //RX_FDEQ_BIN_1 +222 0x0304 //RX_FDEQ_BIN_2 +223 0x0405 //RX_FDEQ_BIN_3 +224 0x0607 //RX_FDEQ_BIN_4 +225 0x0809 //RX_FDEQ_BIN_5 +226 0x0A0B //RX_FDEQ_BIN_6 +227 0x0C0D //RX_FDEQ_BIN_7 +228 0x0E0F //RX_FDEQ_BIN_8 +229 0x1011 //RX_FDEQ_BIN_9 +230 0x1214 //RX_FDEQ_BIN_10 +231 0x1618 //RX_FDEQ_BIN_11 +232 0x1C1C //RX_FDEQ_BIN_12 +233 0x2020 //RX_FDEQ_BIN_13 +234 0x2020 //RX_FDEQ_BIN_14 +235 0x2011 //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x4000 //RX_FDEQ_RESRV_0 +245 0x0320 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0030 //RX_FDDRC_BAND_MARGIN_1 +248 0x0050 //RX_FDDRC_BAND_MARGIN_2 +249 0x0080 //RX_FDDRC_BAND_MARGIN_3 +250 0x0007 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x5000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x6400 //RX_FDDRC_THRD_3_2 +258 0x6400 //RX_FDDRC_THRD_3_3 +259 0x2000 //RX_FDDRC_SLANT_0_0 +260 0x2000 //RX_FDDRC_SLANT_0_1 +261 0x2000 //RX_FDDRC_SLANT_0_2 +262 0x2000 //RX_FDDRC_SLANT_0_3 +263 0x5333 //RX_FDDRC_SLANT_1_0 +264 0x5333 //RX_FDDRC_SLANT_1_1 +265 0x5333 //RX_FDDRC_SLANT_1_2 +266 0x5333 //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +286 0x0100 //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 +#VOL 1 +163 0x1000 //RX_TDDRC_ALPHA_UP_1 +164 0x1000 //RX_TDDRC_ALPHA_UP_2 +165 0x1000 //RX_TDDRC_ALPHA_UP_3 +166 0x1000 //RX_TDDRC_ALPHA_UP_4 +184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +190 0x7FFF //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +269 0x0000 //RX_TDDRC_THRD_0 +270 0x0000 //RX_TDDRC_THRD_1 +271 0x7FFF //RX_TDDRC_THRD_2 +272 0x7FFF //RX_TDDRC_THRD_3 +273 0x7FFF //RX_TDDRC_SLANT_0 +274 0x7FFF //RX_TDDRC_SLANT_1 +275 0x1000 //RX_TDDRC_ALPHA_UP_0 +276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x199A //RX_TDDRC_HMNC_GAIN +279 0x0001 //RX_TDDRC_SMT_FLAG +280 0x0CCD //RX_TDDRC_SMT_W +281 0x0155 //RX_TDDRC_DRC_GAIN +195 0x0020 //RX_FDEQ_SUBNUM +196 0x4848 //RX_FDEQ_GAIN_0 +197 0x4848 //RX_FDEQ_GAIN_1 +198 0x4848 //RX_FDEQ_GAIN_2 +199 0x4848 //RX_FDEQ_GAIN_3 +200 0x4848 //RX_FDEQ_GAIN_4 +201 0x4848 //RX_FDEQ_GAIN_5 +202 0x4848 //RX_FDEQ_GAIN_6 +203 0x4848 //RX_FDEQ_GAIN_7 +204 0x4848 //RX_FDEQ_GAIN_8 +205 0x4848 //RX_FDEQ_GAIN_9 +206 0x4848 //RX_FDEQ_GAIN_10 +207 0x4848 //RX_FDEQ_GAIN_11 +208 0x4848 //RX_FDEQ_GAIN_12 +209 0x4848 //RX_FDEQ_GAIN_13 +210 0x4848 //RX_FDEQ_GAIN_14 +211 0x4848 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0202 //RX_FDEQ_BIN_0 +221 0x0203 //RX_FDEQ_BIN_1 +222 0x0304 //RX_FDEQ_BIN_2 +223 0x0405 //RX_FDEQ_BIN_3 +224 0x0607 //RX_FDEQ_BIN_4 +225 0x0809 //RX_FDEQ_BIN_5 +226 0x0A0B //RX_FDEQ_BIN_6 +227 0x0C0D //RX_FDEQ_BIN_7 +228 0x0E0F //RX_FDEQ_BIN_8 +229 0x1011 //RX_FDEQ_BIN_9 +230 0x1214 //RX_FDEQ_BIN_10 +231 0x1618 //RX_FDEQ_BIN_11 +232 0x1C1C //RX_FDEQ_BIN_12 +233 0x2020 //RX_FDEQ_BIN_13 +234 0x2020 //RX_FDEQ_BIN_14 +235 0x2011 //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x4000 //RX_FDEQ_RESRV_0 +245 0x0320 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0030 //RX_FDDRC_BAND_MARGIN_1 +248 0x0050 //RX_FDDRC_BAND_MARGIN_2 +249 0x0080 //RX_FDDRC_BAND_MARGIN_3 +250 0x0007 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x5000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x6400 //RX_FDDRC_THRD_3_2 +258 0x6400 //RX_FDDRC_THRD_3_3 +259 0x2000 //RX_FDDRC_SLANT_0_0 +260 0x2000 //RX_FDDRC_SLANT_0_1 +261 0x2000 //RX_FDDRC_SLANT_0_2 +262 0x2000 //RX_FDDRC_SLANT_0_3 +263 0x5333 //RX_FDDRC_SLANT_1_0 +264 0x5333 //RX_FDDRC_SLANT_1_1 +265 0x5333 //RX_FDDRC_SLANT_1_2 +266 0x5333 //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +286 0x0100 //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 +#VOL 2 +163 0x1000 //RX_TDDRC_ALPHA_UP_1 +164 0x1000 //RX_TDDRC_ALPHA_UP_2 +165 0x1000 //RX_TDDRC_ALPHA_UP_3 +166 0x1000 //RX_TDDRC_ALPHA_UP_4 +184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +190 0x7FFF //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +269 0x0000 //RX_TDDRC_THRD_0 +270 0x0000 //RX_TDDRC_THRD_1 +271 0x7FFF //RX_TDDRC_THRD_2 +272 0x7FFF //RX_TDDRC_THRD_3 +273 0x7FFF //RX_TDDRC_SLANT_0 +274 0x7FFF //RX_TDDRC_SLANT_1 +275 0x1000 //RX_TDDRC_ALPHA_UP_0 +276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x199A //RX_TDDRC_HMNC_GAIN +279 0x0001 //RX_TDDRC_SMT_FLAG +280 0x0CCD //RX_TDDRC_SMT_W +281 0x0155 //RX_TDDRC_DRC_GAIN +195 0x0020 //RX_FDEQ_SUBNUM +196 0x4848 //RX_FDEQ_GAIN_0 +197 0x4848 //RX_FDEQ_GAIN_1 +198 0x4848 //RX_FDEQ_GAIN_2 +199 0x4848 //RX_FDEQ_GAIN_3 +200 0x4848 //RX_FDEQ_GAIN_4 +201 0x4848 //RX_FDEQ_GAIN_5 +202 0x4848 //RX_FDEQ_GAIN_6 +203 0x4848 //RX_FDEQ_GAIN_7 +204 0x4848 //RX_FDEQ_GAIN_8 +205 0x4848 //RX_FDEQ_GAIN_9 +206 0x4848 //RX_FDEQ_GAIN_10 +207 0x4848 //RX_FDEQ_GAIN_11 +208 0x4848 //RX_FDEQ_GAIN_12 +209 0x4848 //RX_FDEQ_GAIN_13 +210 0x4848 //RX_FDEQ_GAIN_14 +211 0x4848 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0202 //RX_FDEQ_BIN_0 +221 0x0203 //RX_FDEQ_BIN_1 +222 0x0304 //RX_FDEQ_BIN_2 +223 0x0405 //RX_FDEQ_BIN_3 +224 0x0607 //RX_FDEQ_BIN_4 +225 0x0809 //RX_FDEQ_BIN_5 +226 0x0A0B //RX_FDEQ_BIN_6 +227 0x0C0D //RX_FDEQ_BIN_7 +228 0x0E0F //RX_FDEQ_BIN_8 +229 0x1011 //RX_FDEQ_BIN_9 +230 0x1214 //RX_FDEQ_BIN_10 +231 0x1618 //RX_FDEQ_BIN_11 +232 0x1C1C //RX_FDEQ_BIN_12 +233 0x2020 //RX_FDEQ_BIN_13 +234 0x2020 //RX_FDEQ_BIN_14 +235 0x2011 //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x4000 //RX_FDEQ_RESRV_0 +245 0x0320 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0030 //RX_FDDRC_BAND_MARGIN_1 +248 0x0050 //RX_FDDRC_BAND_MARGIN_2 +249 0x0080 //RX_FDDRC_BAND_MARGIN_3 +250 0x0007 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x5000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x6400 //RX_FDDRC_THRD_3_2 +258 0x6400 //RX_FDDRC_THRD_3_3 +259 0x2000 //RX_FDDRC_SLANT_0_0 +260 0x2000 //RX_FDDRC_SLANT_0_1 +261 0x2000 //RX_FDDRC_SLANT_0_2 +262 0x2000 //RX_FDDRC_SLANT_0_3 +263 0x5333 //RX_FDDRC_SLANT_1_0 +264 0x5333 //RX_FDDRC_SLANT_1_1 +265 0x5333 //RX_FDDRC_SLANT_1_2 +266 0x5333 //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +286 0x0100 //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 +#VOL 3 +163 0x1000 //RX_TDDRC_ALPHA_UP_1 +164 0x1000 //RX_TDDRC_ALPHA_UP_2 +165 0x1000 //RX_TDDRC_ALPHA_UP_3 +166 0x1000 //RX_TDDRC_ALPHA_UP_4 +184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +190 0x7FFF //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +269 0x0000 //RX_TDDRC_THRD_0 +270 0x0000 //RX_TDDRC_THRD_1 +271 0x7FFF //RX_TDDRC_THRD_2 +272 0x7FFF //RX_TDDRC_THRD_3 +273 0x7FFF //RX_TDDRC_SLANT_0 +274 0x7FFF //RX_TDDRC_SLANT_1 +275 0x1000 //RX_TDDRC_ALPHA_UP_0 +276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x199A //RX_TDDRC_HMNC_GAIN +279 0x0001 //RX_TDDRC_SMT_FLAG +280 0x0CCD //RX_TDDRC_SMT_W +281 0x0155 //RX_TDDRC_DRC_GAIN +195 0x0020 //RX_FDEQ_SUBNUM +196 0x4848 //RX_FDEQ_GAIN_0 +197 0x4848 //RX_FDEQ_GAIN_1 +198 0x4848 //RX_FDEQ_GAIN_2 +199 0x4848 //RX_FDEQ_GAIN_3 +200 0x4848 //RX_FDEQ_GAIN_4 +201 0x4848 //RX_FDEQ_GAIN_5 +202 0x4848 //RX_FDEQ_GAIN_6 +203 0x4848 //RX_FDEQ_GAIN_7 +204 0x4848 //RX_FDEQ_GAIN_8 +205 0x4848 //RX_FDEQ_GAIN_9 +206 0x4848 //RX_FDEQ_GAIN_10 +207 0x4848 //RX_FDEQ_GAIN_11 +208 0x4848 //RX_FDEQ_GAIN_12 +209 0x4848 //RX_FDEQ_GAIN_13 +210 0x4848 //RX_FDEQ_GAIN_14 +211 0x4848 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0202 //RX_FDEQ_BIN_0 +221 0x0203 //RX_FDEQ_BIN_1 +222 0x0304 //RX_FDEQ_BIN_2 +223 0x0405 //RX_FDEQ_BIN_3 +224 0x0607 //RX_FDEQ_BIN_4 +225 0x0809 //RX_FDEQ_BIN_5 +226 0x0A0B //RX_FDEQ_BIN_6 +227 0x0C0D //RX_FDEQ_BIN_7 +228 0x0E0F //RX_FDEQ_BIN_8 +229 0x1011 //RX_FDEQ_BIN_9 +230 0x1214 //RX_FDEQ_BIN_10 +231 0x1618 //RX_FDEQ_BIN_11 +232 0x1C1C //RX_FDEQ_BIN_12 +233 0x2020 //RX_FDEQ_BIN_13 +234 0x2020 //RX_FDEQ_BIN_14 +235 0x2011 //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x4000 //RX_FDEQ_RESRV_0 +245 0x0320 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0030 //RX_FDDRC_BAND_MARGIN_1 +248 0x0050 //RX_FDDRC_BAND_MARGIN_2 +249 0x0080 //RX_FDDRC_BAND_MARGIN_3 +250 0x0007 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x5000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x6400 //RX_FDDRC_THRD_3_2 +258 0x6400 //RX_FDDRC_THRD_3_3 +259 0x2000 //RX_FDDRC_SLANT_0_0 +260 0x2000 //RX_FDDRC_SLANT_0_1 +261 0x2000 //RX_FDDRC_SLANT_0_2 +262 0x2000 //RX_FDDRC_SLANT_0_3 +263 0x5333 //RX_FDDRC_SLANT_1_0 +264 0x5333 //RX_FDDRC_SLANT_1_1 +265 0x5333 //RX_FDDRC_SLANT_1_2 +266 0x5333 //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +286 0x0100 //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 +#VOL 4 +163 0x1000 //RX_TDDRC_ALPHA_UP_1 +164 0x1000 //RX_TDDRC_ALPHA_UP_2 +165 0x1000 //RX_TDDRC_ALPHA_UP_3 +166 0x1000 //RX_TDDRC_ALPHA_UP_4 +184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +190 0x7FFF //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +269 0x0000 //RX_TDDRC_THRD_0 +270 0x0000 //RX_TDDRC_THRD_1 +271 0x7FFF //RX_TDDRC_THRD_2 +272 0x7FFF //RX_TDDRC_THRD_3 +273 0x7FFF //RX_TDDRC_SLANT_0 +274 0x7FFF //RX_TDDRC_SLANT_1 +275 0x1000 //RX_TDDRC_ALPHA_UP_0 +276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x199A //RX_TDDRC_HMNC_GAIN +279 0x0001 //RX_TDDRC_SMT_FLAG +280 0x0CCD //RX_TDDRC_SMT_W +281 0x0155 //RX_TDDRC_DRC_GAIN +195 0x0020 //RX_FDEQ_SUBNUM +196 0x4848 //RX_FDEQ_GAIN_0 +197 0x4848 //RX_FDEQ_GAIN_1 +198 0x4848 //RX_FDEQ_GAIN_2 +199 0x4848 //RX_FDEQ_GAIN_3 +200 0x4848 //RX_FDEQ_GAIN_4 +201 0x4848 //RX_FDEQ_GAIN_5 +202 0x4848 //RX_FDEQ_GAIN_6 +203 0x4848 //RX_FDEQ_GAIN_7 +204 0x4848 //RX_FDEQ_GAIN_8 +205 0x4848 //RX_FDEQ_GAIN_9 +206 0x4848 //RX_FDEQ_GAIN_10 +207 0x4848 //RX_FDEQ_GAIN_11 +208 0x4848 //RX_FDEQ_GAIN_12 +209 0x4848 //RX_FDEQ_GAIN_13 +210 0x4848 //RX_FDEQ_GAIN_14 +211 0x4848 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0202 //RX_FDEQ_BIN_0 +221 0x0203 //RX_FDEQ_BIN_1 +222 0x0304 //RX_FDEQ_BIN_2 +223 0x0405 //RX_FDEQ_BIN_3 +224 0x0607 //RX_FDEQ_BIN_4 +225 0x0809 //RX_FDEQ_BIN_5 +226 0x0A0B //RX_FDEQ_BIN_6 +227 0x0C0D //RX_FDEQ_BIN_7 +228 0x0E0F //RX_FDEQ_BIN_8 +229 0x1011 //RX_FDEQ_BIN_9 +230 0x1214 //RX_FDEQ_BIN_10 +231 0x1618 //RX_FDEQ_BIN_11 +232 0x1C1C //RX_FDEQ_BIN_12 +233 0x2020 //RX_FDEQ_BIN_13 +234 0x2020 //RX_FDEQ_BIN_14 +235 0x2011 //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x4000 //RX_FDEQ_RESRV_0 +245 0x0320 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0030 //RX_FDDRC_BAND_MARGIN_1 +248 0x0050 //RX_FDDRC_BAND_MARGIN_2 +249 0x0080 //RX_FDDRC_BAND_MARGIN_3 +250 0x0007 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x5000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x6400 //RX_FDDRC_THRD_3_2 +258 0x6400 //RX_FDDRC_THRD_3_3 +259 0x2000 //RX_FDDRC_SLANT_0_0 +260 0x2000 //RX_FDDRC_SLANT_0_1 +261 0x2000 //RX_FDDRC_SLANT_0_2 +262 0x2000 //RX_FDDRC_SLANT_0_3 +263 0x5333 //RX_FDDRC_SLANT_1_0 +264 0x5333 //RX_FDDRC_SLANT_1_1 +265 0x5333 //RX_FDDRC_SLANT_1_2 +266 0x5333 //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +286 0x0100 //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 +#VOL 5 +163 0x1000 //RX_TDDRC_ALPHA_UP_1 +164 0x1000 //RX_TDDRC_ALPHA_UP_2 +165 0x1000 //RX_TDDRC_ALPHA_UP_3 +166 0x1000 //RX_TDDRC_ALPHA_UP_4 +184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +190 0x7FFF //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +269 0x0000 //RX_TDDRC_THRD_0 +270 0x0000 //RX_TDDRC_THRD_1 +271 0x7FFF //RX_TDDRC_THRD_2 +272 0x7FFF //RX_TDDRC_THRD_3 +273 0x7FFF //RX_TDDRC_SLANT_0 +274 0x7FFF //RX_TDDRC_SLANT_1 +275 0x1000 //RX_TDDRC_ALPHA_UP_0 +276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x199A //RX_TDDRC_HMNC_GAIN +279 0x0001 //RX_TDDRC_SMT_FLAG +280 0x0CCD //RX_TDDRC_SMT_W +281 0x0155 //RX_TDDRC_DRC_GAIN +195 0x0020 //RX_FDEQ_SUBNUM +196 0x4848 //RX_FDEQ_GAIN_0 +197 0x4848 //RX_FDEQ_GAIN_1 +198 0x4848 //RX_FDEQ_GAIN_2 +199 0x4848 //RX_FDEQ_GAIN_3 +200 0x4848 //RX_FDEQ_GAIN_4 +201 0x4848 //RX_FDEQ_GAIN_5 +202 0x4848 //RX_FDEQ_GAIN_6 +203 0x4848 //RX_FDEQ_GAIN_7 +204 0x4848 //RX_FDEQ_GAIN_8 +205 0x4848 //RX_FDEQ_GAIN_9 +206 0x4848 //RX_FDEQ_GAIN_10 +207 0x4848 //RX_FDEQ_GAIN_11 +208 0x4848 //RX_FDEQ_GAIN_12 +209 0x4848 //RX_FDEQ_GAIN_13 +210 0x4848 //RX_FDEQ_GAIN_14 +211 0x4848 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0202 //RX_FDEQ_BIN_0 +221 0x0203 //RX_FDEQ_BIN_1 +222 0x0304 //RX_FDEQ_BIN_2 +223 0x0405 //RX_FDEQ_BIN_3 +224 0x0607 //RX_FDEQ_BIN_4 +225 0x0809 //RX_FDEQ_BIN_5 +226 0x0A0B //RX_FDEQ_BIN_6 +227 0x0C0D //RX_FDEQ_BIN_7 +228 0x0E0F //RX_FDEQ_BIN_8 +229 0x1011 //RX_FDEQ_BIN_9 +230 0x1214 //RX_FDEQ_BIN_10 +231 0x1618 //RX_FDEQ_BIN_11 +232 0x1C1C //RX_FDEQ_BIN_12 +233 0x2020 //RX_FDEQ_BIN_13 +234 0x2020 //RX_FDEQ_BIN_14 +235 0x2011 //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x4000 //RX_FDEQ_RESRV_0 +245 0x0320 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0030 //RX_FDDRC_BAND_MARGIN_1 +248 0x0050 //RX_FDDRC_BAND_MARGIN_2 +249 0x0080 //RX_FDDRC_BAND_MARGIN_3 +250 0x0007 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x5000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x6400 //RX_FDDRC_THRD_3_2 +258 0x6400 //RX_FDDRC_THRD_3_3 +259 0x2000 //RX_FDDRC_SLANT_0_0 +260 0x2000 //RX_FDDRC_SLANT_0_1 +261 0x2000 //RX_FDDRC_SLANT_0_2 +262 0x2000 //RX_FDDRC_SLANT_0_3 +263 0x5333 //RX_FDDRC_SLANT_1_0 +264 0x5333 //RX_FDDRC_SLANT_1_1 +265 0x5333 //RX_FDDRC_SLANT_1_2 +266 0x5333 //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +286 0x0100 //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 +#VOL 6 +163 0x1000 //RX_TDDRC_ALPHA_UP_1 +164 0x1000 //RX_TDDRC_ALPHA_UP_2 +165 0x1000 //RX_TDDRC_ALPHA_UP_3 +166 0x1000 //RX_TDDRC_ALPHA_UP_4 +184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +190 0x7FFF //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +269 0x0000 //RX_TDDRC_THRD_0 +270 0x0000 //RX_TDDRC_THRD_1 +271 0x7FFF //RX_TDDRC_THRD_2 +272 0x7FFF //RX_TDDRC_THRD_3 +273 0x7FFF //RX_TDDRC_SLANT_0 +274 0x7FFF //RX_TDDRC_SLANT_1 +275 0x1000 //RX_TDDRC_ALPHA_UP_0 +276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x199A //RX_TDDRC_HMNC_GAIN +279 0x0001 //RX_TDDRC_SMT_FLAG +280 0x0CCD //RX_TDDRC_SMT_W +281 0x0155 //RX_TDDRC_DRC_GAIN +195 0x0020 //RX_FDEQ_SUBNUM +196 0x4848 //RX_FDEQ_GAIN_0 +197 0x4848 //RX_FDEQ_GAIN_1 +198 0x4848 //RX_FDEQ_GAIN_2 +199 0x4848 //RX_FDEQ_GAIN_3 +200 0x4848 //RX_FDEQ_GAIN_4 +201 0x4848 //RX_FDEQ_GAIN_5 +202 0x4848 //RX_FDEQ_GAIN_6 +203 0x4848 //RX_FDEQ_GAIN_7 +204 0x4848 //RX_FDEQ_GAIN_8 +205 0x4848 //RX_FDEQ_GAIN_9 +206 0x4848 //RX_FDEQ_GAIN_10 +207 0x4848 //RX_FDEQ_GAIN_11 +208 0x4848 //RX_FDEQ_GAIN_12 +209 0x4848 //RX_FDEQ_GAIN_13 +210 0x4848 //RX_FDEQ_GAIN_14 +211 0x4848 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0202 //RX_FDEQ_BIN_0 +221 0x0203 //RX_FDEQ_BIN_1 +222 0x0304 //RX_FDEQ_BIN_2 +223 0x0405 //RX_FDEQ_BIN_3 +224 0x0607 //RX_FDEQ_BIN_4 +225 0x0809 //RX_FDEQ_BIN_5 +226 0x0A0B //RX_FDEQ_BIN_6 +227 0x0C0D //RX_FDEQ_BIN_7 +228 0x0E0F //RX_FDEQ_BIN_8 +229 0x1011 //RX_FDEQ_BIN_9 +230 0x1214 //RX_FDEQ_BIN_10 +231 0x1618 //RX_FDEQ_BIN_11 +232 0x1C1C //RX_FDEQ_BIN_12 +233 0x2020 //RX_FDEQ_BIN_13 +234 0x2020 //RX_FDEQ_BIN_14 +235 0x2011 //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x4000 //RX_FDEQ_RESRV_0 +245 0x0320 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0030 //RX_FDDRC_BAND_MARGIN_1 +248 0x0050 //RX_FDDRC_BAND_MARGIN_2 +249 0x0080 //RX_FDDRC_BAND_MARGIN_3 +250 0x0007 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x5000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x6400 //RX_FDDRC_THRD_3_2 +258 0x6400 //RX_FDDRC_THRD_3_3 +259 0x2000 //RX_FDDRC_SLANT_0_0 +260 0x2000 //RX_FDDRC_SLANT_0_1 +261 0x2000 //RX_FDDRC_SLANT_0_2 +262 0x2000 //RX_FDDRC_SLANT_0_3 +263 0x5333 //RX_FDDRC_SLANT_1_0 +264 0x5333 //RX_FDDRC_SLANT_1_1 +265 0x5333 //RX_FDDRC_SLANT_1_2 +266 0x5333 //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +286 0x0100 //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 #CASE_NAME BLUETOOTH-BTNB_NREC-VOICE_GENERIC-NB -#PARAM_TYPE TX+RX -#TOTAL_CUSTOM_STEP 7 +#PARAM_MODE Full +#PARAM_TYPE TX+2RX +#TOTAL_CUSTOM_STEP 7+7 #TX 0 0x0008 //TX_OPERATION_MODE_0 1 0x0008 //TX_OPERATION_MODE_1 @@ -16035,20 +24289,20 @@ 248 0xF400 //TX_THR_SN_EST_6 249 0xF600 //TX_THR_SN_EST_7 250 0x0000 //TX_DELTA_THR_SN_EST_0 -251 0x0000 //TX_DELTA_THR_SN_EST_1 +251 0x0200 //TX_DELTA_THR_SN_EST_1 252 0x0200 //TX_DELTA_THR_SN_EST_2 253 0x0200 //TX_DELTA_THR_SN_EST_3 254 0x0200 //TX_DELTA_THR_SN_EST_4 255 0x0200 //TX_DELTA_THR_SN_EST_5 -256 0x0200 //TX_DELTA_THR_SN_EST_6 +256 0x0000 //TX_DELTA_THR_SN_EST_6 257 0x0200 //TX_DELTA_THR_SN_EST_7 258 0x6000 //TX_LAMBDA_NN_EST_0 -259 0x6000 //TX_LAMBDA_NN_EST_1 +259 0x4000 //TX_LAMBDA_NN_EST_1 260 0x4000 //TX_LAMBDA_NN_EST_2 261 0x4000 //TX_LAMBDA_NN_EST_3 262 0x4000 //TX_LAMBDA_NN_EST_4 263 0x4000 //TX_LAMBDA_NN_EST_5 -264 0x4000 //TX_LAMBDA_NN_EST_6 +264 0x6000 //TX_LAMBDA_NN_EST_6 265 0x4000 //TX_LAMBDA_NN_EST_7 266 0x0400 //TX_N_SN_EST 267 0x001E //TX_INBEAM_T @@ -16066,16 +24320,16 @@ 279 0x1000 //TX_B_POST_FLT_0 280 0x1000 //TX_B_POST_FLT_1 281 0x000F //TX_NS_LVL_CTRL_0 -282 0x000F //TX_NS_LVL_CTRL_1 -283 0x0011 //TX_NS_LVL_CTRL_2 +282 0x0011 //TX_NS_LVL_CTRL_1 +283 0x000F //TX_NS_LVL_CTRL_2 284 0x000F //TX_NS_LVL_CTRL_3 285 0x000F //TX_NS_LVL_CTRL_4 286 0x000F //TX_NS_LVL_CTRL_5 287 0x000F //TX_NS_LVL_CTRL_6 288 0x0011 //TX_NS_LVL_CTRL_7 289 0x000C //TX_MIN_GAIN_S_0 -290 0x000C //TX_MIN_GAIN_S_1 -291 0x000F //TX_MIN_GAIN_S_2 +290 0x000F //TX_MIN_GAIN_S_1 +291 0x000C //TX_MIN_GAIN_S_2 292 0x000C //TX_MIN_GAIN_S_3 293 0x000C //TX_MIN_GAIN_S_4 294 0x000C //TX_MIN_GAIN_S_5 @@ -16099,12 +24353,12 @@ 312 0x7FFF //TX_A_POST_FILT_0 313 0x2000 //TX_A_POST_FILT_1 314 0x4000 //TX_A_POST_FILT_S_0 -315 0x4000 //TX_A_POST_FILT_S_1 +315 0x5000 //TX_A_POST_FILT_S_1 316 0x5000 //TX_A_POST_FILT_S_2 317 0x5000 //TX_A_POST_FILT_S_3 318 0x5000 //TX_A_POST_FILT_S_4 319 0x5000 //TX_A_POST_FILT_S_5 -320 0x5000 //TX_A_POST_FILT_S_6 +320 0x4000 //TX_A_POST_FILT_S_6 321 0x5000 //TX_A_POST_FILT_S_7 322 0x1000 //TX_B_POST_FILT_0 323 0x1000 //TX_B_POST_FILT_1 @@ -16164,10 +24418,10 @@ 377 0x7FFF //TX_NOISE_TH_5_4 378 0x044C //TX_NOISE_TH_6 379 0x0014 //TX_MINENOISE_TH -380 0x4000 //TX_MINENOISE_MIC0_TH_MTS -381 0xFFEE //TX_MINENOISE_MIC0_TH_EXP -382 0x6000 //TX_MINENOISE_MIC0_S_TH_MTS -383 0xFFF3 //TX_MINENOISE_MIC0_S_TH_EXP +380 0x4000 //TX_MORENS_TFMASK_TH +381 0xFFEE //TX_DRC_QUIET_FLOOR +382 0x6000 //TX_RATIODTL_CUT_TH +383 0xFFF3 //TX_DT_CUT_K1 384 0x0666 //TX_OUT_ENER_S_TH_CLEAN 385 0x0666 //TX_OUT_ENER_S_TH_LESSCLEAN 386 0x0333 //TX_OUT_ENER_S_TH_NOISY @@ -16175,15 +24429,15 @@ 388 0x0333 //TX_OUT_ENER_TH_SPEECH 389 0x2000 //TX_SN_NPB_GAIN 390 0x0000 //TX_NN_NPB_GAIN -391 0x0000 //TX_CSX_ALPHA_0 -392 0x0000 //TX_CSX_ALPHA_1 -393 0x0000 //TX_CSX_ALPHA_2 -394 0x0000 //TX_CSX_ALPHA_3 -395 0x0800 //TX_MU_ARSP_EST -396 0x00C8 //TX_P_OUTBEAM_MIN_TH +391 0x0000 //TX_POST_MASK_SUP_HSNE +392 0x0000 //TX_TAIL_DET_TH +393 0x0000 //TX_B_LESSCUT_RTO_WTA +394 0x0000 //TX_MEL_G_R +395 0x0800 //TX_SUPHIGH_TH +396 0x00C8 //TX_MASK_G_R 397 0x0002 //TX_EXTRA_NS_L -398 0x0800 //TX_EXTRA_NS_A -399 0x0005 //TX_VR_NOISE_FLOOR_TH +398 0x0800 //TX_C_POST_FLT_MASK +399 0x0005 //TX_A_POST_FLT_WNS 400 0x0148 //TX_MIN_G_LOW300HZ 401 0x0002 //TX_MAXLEVEL_CNG 402 0x00B4 //TX_STN_NOISE_TH @@ -16298,16 +24552,16 @@ 511 0x6666 //TX_MIC_TO_BFGAIN 512 0x0000 //TX_MICTOBFGAIN0 513 0x0000 //TX_FASTMUE_TH -514 0x0000 //TX_DERVB_LEN_0 -515 0x0000 //TX_DERVB_LEN_1 -516 0x0000 //TX_RHO_DERVB -517 0x0000 //TX_MIC_INDX_DERVB -518 0x0000 //TX_MU_DERVB -519 0x0000 //TX_DR_RESRV_0 -520 0x0000 //TX_DR_RESRV_1 -521 0x0000 //TX_DR_RESRV_2 -522 0x0000 //TX_DR_RESRV_3 -523 0x0000 //TX_DR_RESRV_4 +514 0x0000 //TX_DEREVERB_LF_MU +515 0x0000 //TX_DEREVERB_HF_MU +516 0x0000 //TX_DEREVERB_DELAY +517 0x0000 //TX_DEREVERB_COEF_LEN +518 0x0000 //TX_DEREVERB_DNR +519 0x0000 //TX_DEREVERB_ALPHA +520 0x0000 //TX_DEREVERB_BETA +521 0x0000 //TX_GSC_RTOL_TH +522 0x0000 //TX_GSC_RTOH_TH +523 0x0000 //TX_WIDE2_MEANHTH 524 0x0000 //TX_DR_RESRV_5 525 0x0000 //TX_DR_RESRV_6 526 0x0000 //TX_DR_RESRV_7 @@ -16681,8 +24935,73 @@ 894 0xC000 //TX_FASTNS_SSA_THHFL 895 0xCCCC //TX_FASTNS_SSA_THLFH 896 0xD999 //TX_FASTNS_SSA_THHFH +897 0x0000 //TX_SENDFUNC_REG_MICMUTE +898 0x0000 //TX_SENDFUNC_REG_MICMUTE1 +899 0x0000 //TX_MICMUTE_RATIO_THR +900 0x0000 //TX_MICMUTE_AMP_THR +901 0x0000 //TX_MICMUTE_HPF_IND +902 0x0000 //TX_MICMUTE_LOG_EYR_TH +903 0x0000 //TX_MICMUTE_CVG_TIME +904 0x0000 //TX_MICMUTE_RELEASE_TIME +905 0x0000 //TX_MIC_VOLUME_MIC0MUTE +906 0x0000 //TX_MICMUTE_EPD_OFFSET_0 +907 0x0000 //TX_MICMUTE_FRQ_AEC_L +908 0x0000 //TX_MICMUTE_EAD_THR +909 0x0000 //TX_MICMUTE_LAMBDA_CB_NLE +910 0x0000 //TX_MICMUTE_LAMBDA_RE_EST +911 0x0000 //TX_DTD_THR1_MICMUTE_0 +912 0x0000 //TX_DTD_THR1_MICMUTE_1 +913 0x0000 //TX_DTD_THR1_MICMUTE_2 +914 0x0000 //TX_DTD_THR1_MICMUTE_3 +915 0x0000 //TX_DTD_THR2_MICMUTE_0 +916 0x0000 //TX_MICMUTE_MIN_EQ_RE_EST_0 +917 0x0000 //TX_MICMUTE_MIN_EQ_RE_EST_1 +918 0x0000 //TX_MICMUTE_MIN_EQ_RE_EST_2 +919 0x0000 //TX_MICMUTE_MIN_EQ_RE_EST_3 +920 0x0000 //TX_MICMUTE_MIN_EQ_RE_EST_4 +921 0x0000 //TX_MICMUTE_C_POST_FLT +922 0x0000 //TX_MICMUTE_DT_CUT_K +923 0x0000 //TX_MICMUTE_DT_CUT_THR +924 0x0000 //TX_MICMUTE_DT_CUT_K2 +925 0x0000 //TX_MICMUTE_DT_CUT_THR2 +926 0x0000 //TX_MICMUTE_DT2_HOLD_N +927 0x0000 //TX_MICMUTE_RATIODTH_THCUT +928 0x0000 //TX_MICMUTE_B_POST_FLT_ECHOL +929 0x0000 //TX_MICMUTE_B_POST_FLT_ECHOH +930 0x0000 //TX_MICMUTE_C_POST_FLT_MASK +931 0x0000 //TX_MICMUTE_RATIODTL_CUT_TH +932 0x0000 //TX_MICMUTE_DT_CUT_K1 +933 0x0000 //TX_MICMUTE_N2_SN_EST +934 0x0000 //TX_MICMUTE_THR_SN_EST_0 +935 0x0000 //TX_MICMUTE_MIN_G_CTRL_0 +936 0x0000 //TX_MICMUTE_A_POST_FILT_S_0 +937 0x0000 //TX_MICMUTE_B_POST_FILT_0 +938 0x0000 //TX_MIC1RUB_AMP_THR +939 0x0000 //TX_MIC1MUTE_RATIO_THR +940 0x0000 //TX_MIC1MUTE_AMP_THR +941 0x0000 //TX_MIC1MUTE_CVG_TIME +942 0x0000 //TX_MIC1MUTE_RELEASE_TIME +943 0x0000 //TX_AMS_RESRV_01 +944 0x0000 //TX_AMS_RESRV_02 +945 0x0000 //TX_AMS_RESRV_03 +946 0x0000 //TX_AMS_RESRV_04 +947 0x0000 //TX_AMS_RESRV_05 +948 0x0000 //TX_AMS_RESRV_06 +949 0x0000 //TX_AMS_RESRV_07 +950 0x0000 //TX_AMS_RESRV_08 +951 0x0000 //TX_AMS_RESRV_09 +952 0x0000 //TX_AMS_RESRV_10 +953 0x0000 //TX_AMS_RESRV_11 +954 0x0000 //TX_AMS_RESRV_12 +955 0x0000 //TX_AMS_RESRV_13 +956 0x0000 //TX_AMS_RESRV_14 +957 0x0000 //TX_AMS_RESRV_15 +958 0x0000 //TX_AMS_RESRV_16 +959 0x0000 //TX_AMS_RESRV_17 +960 0x0000 //TX_AMS_RESRV_18 +961 0x0000 //TX_AMS_RESRV_19 #RX -0 0x006C //RX_RECVFUNC_MODE_0 +0 0x206C //RX_RECVFUNC_MODE_0 1 0x0000 //RX_RECVFUNC_MODE_1 2 0x0000 //RX_SAMPLINGFREQ_SIG 3 0x0000 //RX_SAMPLINGFREQ_PROC @@ -17532,10 +25851,862 @@ 110 0x0000 //RX_FDDRC_RESRV_0 129 0x0100 //RX_SPK_VOL 130 0x0000 //RX_VOL_RESRV_0 +#RX 2 +157 0x206C //RX_RECVFUNC_MODE_0 +158 0x0000 //RX_RECVFUNC_MODE_1 +159 0x0000 //RX_SAMPLINGFREQ_SIG +160 0x0000 //RX_SAMPLINGFREQ_PROC +161 0x000A //RX_FRAME_SZ +162 0x0000 //RX_DELAY_OPT +163 0x3000 //RX_TDDRC_ALPHA_UP_1 +164 0x3000 //RX_TDDRC_ALPHA_UP_2 +165 0x3000 //RX_TDDRC_ALPHA_UP_3 +166 0x3000 //RX_TDDRC_ALPHA_UP_4 +167 0x0800 //RX_PGA +168 0x7FFF //RX_A_HP +169 0x0000 //RX_B_PE +170 0x3800 //RX_THR_PITCH_DET_0 +171 0x3000 //RX_THR_PITCH_DET_1 +172 0x2800 //RX_THR_PITCH_DET_2 +173 0x0008 //RX_PITCH_BFR_LEN +174 0x0003 //RX_SBD_PITCH_DET +175 0x0100 //RX_PP_RESRV_0 +176 0x0020 //RX_PP_RESRV_1 +177 0x0600 //RX_N_SN_EST +178 0x000C //RX_N2_SN_EST +179 0x0010 //RX_NS_LVL_CTRL +180 0xF800 //RX_THR_SN_EST +181 0x7CCD //RX_LAMBDA_PFILT +182 0x000A //RX_FENS_RESRV_0 +183 0x0190 //RX_FENS_RESRV_1 +184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +187 0x0002 //RX_EXTRA_NS_L +188 0x0800 //RX_EXTRA_NS_A +189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +190 0x7FFF //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +192 0x199A //RX_A_POST_FLT +193 0x0000 //RX_LMT_THRD +194 0x4000 //RX_LMT_ALPHA +195 0x0014 //RX_FDEQ_SUBNUM +196 0x4848 //RX_FDEQ_GAIN_0 +197 0x4848 //RX_FDEQ_GAIN_1 +198 0x4848 //RX_FDEQ_GAIN_2 +199 0x4848 //RX_FDEQ_GAIN_3 +200 0x4848 //RX_FDEQ_GAIN_4 +201 0x4848 //RX_FDEQ_GAIN_5 +202 0x4444 //RX_FDEQ_GAIN_6 +203 0x4040 //RX_FDEQ_GAIN_7 +204 0x4040 //RX_FDEQ_GAIN_8 +205 0x4040 //RX_FDEQ_GAIN_9 +206 0x4848 //RX_FDEQ_GAIN_10 +207 0x4848 //RX_FDEQ_GAIN_11 +208 0x4848 //RX_FDEQ_GAIN_12 +209 0x4848 //RX_FDEQ_GAIN_13 +210 0x4848 //RX_FDEQ_GAIN_14 +211 0x4848 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0202 //RX_FDEQ_BIN_0 +221 0x0203 //RX_FDEQ_BIN_1 +222 0x0303 //RX_FDEQ_BIN_2 +223 0x0304 //RX_FDEQ_BIN_3 +224 0x0405 //RX_FDEQ_BIN_4 +225 0x0506 //RX_FDEQ_BIN_5 +226 0x0708 //RX_FDEQ_BIN_6 +227 0x090A //RX_FDEQ_BIN_7 +228 0x0B0C //RX_FDEQ_BIN_8 +229 0x0D0E //RX_FDEQ_BIN_9 +230 0x0000 //RX_FDEQ_BIN_10 +231 0x0000 //RX_FDEQ_BIN_11 +232 0x0000 //RX_FDEQ_BIN_12 +233 0x0000 //RX_FDEQ_BIN_13 +234 0x0000 //RX_FDEQ_BIN_14 +235 0x0000 //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x4000 //RX_FDEQ_RESRV_0 +245 0x0320 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0030 //RX_FDDRC_BAND_MARGIN_1 +248 0x0050 //RX_FDDRC_BAND_MARGIN_2 +249 0x0080 //RX_FDDRC_BAND_MARGIN_3 +250 0x0007 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x5000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x6400 //RX_FDDRC_THRD_3_2 +258 0x6400 //RX_FDDRC_THRD_3_3 +259 0x2000 //RX_FDDRC_SLANT_0_0 +260 0x2000 //RX_FDDRC_SLANT_0_1 +261 0x2000 //RX_FDDRC_SLANT_0_2 +262 0x2000 //RX_FDDRC_SLANT_0_3 +263 0x5333 //RX_FDDRC_SLANT_1_0 +264 0x5333 //RX_FDDRC_SLANT_1_1 +265 0x5333 //RX_FDDRC_SLANT_1_2 +266 0x5333 //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +268 0x0000 //RX_FILTINDX +269 0x0000 //RX_TDDRC_THRD_0 +270 0x0000 //RX_TDDRC_THRD_1 +271 0x7FFF //RX_TDDRC_THRD_2 +272 0x7FFF //RX_TDDRC_THRD_3 +273 0x7FFF //RX_TDDRC_SLANT_0 +274 0x7EB8 //RX_TDDRC_SLANT_1 +275 0x3000 //RX_TDDRC_ALPHA_UP_0 +276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x199A //RX_TDDRC_HMNC_GAIN +279 0x0001 //RX_TDDRC_SMT_FLAG +280 0x0CCD //RX_TDDRC_SMT_W +281 0x017F //RX_TDDRC_DRC_GAIN +282 0x7C00 //RX_LAMBDA_PKA_FP +283 0x2000 //RX_TPKA_FP +284 0x2000 //RX_MIN_G_FP +285 0x0080 //RX_MAX_G_FP +286 0x0100 //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 +288 0x0000 //RX_MAXLEVEL_CNG +289 0x3000 //RX_BWE_UV_TH +290 0x3000 //RX_BWE_UV_TH2 +291 0x1800 //RX_BWE_UV_TH3 +292 0x1000 //RX_BWE_V_TH +293 0x04CD //RX_BWE_GAIN1_V_TH1 +294 0x0F33 //RX_BWE_GAIN1_V_TH2 +295 0x7333 //RX_BWE_UV_EQ +296 0x199A //RX_BWE_V_EQ +297 0x7333 //RX_BWE_TONE_TH +298 0x0004 //RX_BWE_UV_HOLD_T +299 0x6CCD //RX_BWE_GAIN2_ALPHA +300 0x799A //RX_BWE_GAIN3_ALPHA +301 0x001E //RX_BWE_CUTOFF +302 0x3000 //RX_BWE_GAINFILL +303 0x3200 //RX_BWE_MAXTH_TONE +304 0x2000 //RX_BWE_EQ_0 +305 0x2000 //RX_BWE_EQ_1 +306 0x2000 //RX_BWE_EQ_2 +307 0x2000 //RX_BWE_EQ_3 +308 0x2000 //RX_BWE_EQ_4 +309 0x2000 //RX_BWE_EQ_5 +310 0x2000 //RX_BWE_EQ_6 +311 0x0000 //RX_BWE_RESRV_0 +312 0x0000 //RX_BWE_RESRV_1 +313 0x0000 //RX_BWE_RESRV_2 +#VOL 0 +163 0x3000 //RX_TDDRC_ALPHA_UP_1 +164 0x3000 //RX_TDDRC_ALPHA_UP_2 +165 0x3000 //RX_TDDRC_ALPHA_UP_3 +166 0x3000 //RX_TDDRC_ALPHA_UP_4 +184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +190 0x7FFF //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +269 0x0000 //RX_TDDRC_THRD_0 +270 0x0000 //RX_TDDRC_THRD_1 +271 0x7FFF //RX_TDDRC_THRD_2 +272 0x7FFF //RX_TDDRC_THRD_3 +273 0x7FFF //RX_TDDRC_SLANT_0 +274 0x7EB8 //RX_TDDRC_SLANT_1 +275 0x3000 //RX_TDDRC_ALPHA_UP_0 +276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x199A //RX_TDDRC_HMNC_GAIN +279 0x0001 //RX_TDDRC_SMT_FLAG +280 0x0CCD //RX_TDDRC_SMT_W +281 0x017F //RX_TDDRC_DRC_GAIN +195 0x0014 //RX_FDEQ_SUBNUM +196 0x4848 //RX_FDEQ_GAIN_0 +197 0x4848 //RX_FDEQ_GAIN_1 +198 0x4848 //RX_FDEQ_GAIN_2 +199 0x4848 //RX_FDEQ_GAIN_3 +200 0x4848 //RX_FDEQ_GAIN_4 +201 0x4848 //RX_FDEQ_GAIN_5 +202 0x4444 //RX_FDEQ_GAIN_6 +203 0x4040 //RX_FDEQ_GAIN_7 +204 0x4040 //RX_FDEQ_GAIN_8 +205 0x4040 //RX_FDEQ_GAIN_9 +206 0x4848 //RX_FDEQ_GAIN_10 +207 0x4848 //RX_FDEQ_GAIN_11 +208 0x4848 //RX_FDEQ_GAIN_12 +209 0x4848 //RX_FDEQ_GAIN_13 +210 0x4848 //RX_FDEQ_GAIN_14 +211 0x4848 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0202 //RX_FDEQ_BIN_0 +221 0x0203 //RX_FDEQ_BIN_1 +222 0x0303 //RX_FDEQ_BIN_2 +223 0x0304 //RX_FDEQ_BIN_3 +224 0x0405 //RX_FDEQ_BIN_4 +225 0x0506 //RX_FDEQ_BIN_5 +226 0x0708 //RX_FDEQ_BIN_6 +227 0x090A //RX_FDEQ_BIN_7 +228 0x0B0C //RX_FDEQ_BIN_8 +229 0x0D0E //RX_FDEQ_BIN_9 +230 0x0000 //RX_FDEQ_BIN_10 +231 0x0000 //RX_FDEQ_BIN_11 +232 0x0000 //RX_FDEQ_BIN_12 +233 0x0000 //RX_FDEQ_BIN_13 +234 0x0000 //RX_FDEQ_BIN_14 +235 0x0000 //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x4000 //RX_FDEQ_RESRV_0 +245 0x0320 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0030 //RX_FDDRC_BAND_MARGIN_1 +248 0x0050 //RX_FDDRC_BAND_MARGIN_2 +249 0x0080 //RX_FDDRC_BAND_MARGIN_3 +250 0x0007 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x5000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x6400 //RX_FDDRC_THRD_3_2 +258 0x6400 //RX_FDDRC_THRD_3_3 +259 0x2000 //RX_FDDRC_SLANT_0_0 +260 0x2000 //RX_FDDRC_SLANT_0_1 +261 0x2000 //RX_FDDRC_SLANT_0_2 +262 0x2000 //RX_FDDRC_SLANT_0_3 +263 0x5333 //RX_FDDRC_SLANT_1_0 +264 0x5333 //RX_FDDRC_SLANT_1_1 +265 0x5333 //RX_FDDRC_SLANT_1_2 +266 0x5333 //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +286 0x0100 //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 +#VOL 1 +163 0x3000 //RX_TDDRC_ALPHA_UP_1 +164 0x3000 //RX_TDDRC_ALPHA_UP_2 +165 0x3000 //RX_TDDRC_ALPHA_UP_3 +166 0x3000 //RX_TDDRC_ALPHA_UP_4 +184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +190 0x7FFF //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +269 0x0000 //RX_TDDRC_THRD_0 +270 0x0000 //RX_TDDRC_THRD_1 +271 0x7FFF //RX_TDDRC_THRD_2 +272 0x7FFF //RX_TDDRC_THRD_3 +273 0x7FFF //RX_TDDRC_SLANT_0 +274 0x7EB8 //RX_TDDRC_SLANT_1 +275 0x3000 //RX_TDDRC_ALPHA_UP_0 +276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x199A //RX_TDDRC_HMNC_GAIN +279 0x0001 //RX_TDDRC_SMT_FLAG +280 0x0CCD //RX_TDDRC_SMT_W +281 0x017F //RX_TDDRC_DRC_GAIN +195 0x0014 //RX_FDEQ_SUBNUM +196 0x4848 //RX_FDEQ_GAIN_0 +197 0x4848 //RX_FDEQ_GAIN_1 +198 0x4848 //RX_FDEQ_GAIN_2 +199 0x4848 //RX_FDEQ_GAIN_3 +200 0x4848 //RX_FDEQ_GAIN_4 +201 0x4848 //RX_FDEQ_GAIN_5 +202 0x4444 //RX_FDEQ_GAIN_6 +203 0x4040 //RX_FDEQ_GAIN_7 +204 0x4040 //RX_FDEQ_GAIN_8 +205 0x4040 //RX_FDEQ_GAIN_9 +206 0x4848 //RX_FDEQ_GAIN_10 +207 0x4848 //RX_FDEQ_GAIN_11 +208 0x4848 //RX_FDEQ_GAIN_12 +209 0x4848 //RX_FDEQ_GAIN_13 +210 0x4848 //RX_FDEQ_GAIN_14 +211 0x4848 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0202 //RX_FDEQ_BIN_0 +221 0x0203 //RX_FDEQ_BIN_1 +222 0x0303 //RX_FDEQ_BIN_2 +223 0x0304 //RX_FDEQ_BIN_3 +224 0x0405 //RX_FDEQ_BIN_4 +225 0x0506 //RX_FDEQ_BIN_5 +226 0x0708 //RX_FDEQ_BIN_6 +227 0x090A //RX_FDEQ_BIN_7 +228 0x0B0C //RX_FDEQ_BIN_8 +229 0x0D0E //RX_FDEQ_BIN_9 +230 0x0000 //RX_FDEQ_BIN_10 +231 0x0000 //RX_FDEQ_BIN_11 +232 0x0000 //RX_FDEQ_BIN_12 +233 0x0000 //RX_FDEQ_BIN_13 +234 0x0000 //RX_FDEQ_BIN_14 +235 0x0000 //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x4000 //RX_FDEQ_RESRV_0 +245 0x0320 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0030 //RX_FDDRC_BAND_MARGIN_1 +248 0x0050 //RX_FDDRC_BAND_MARGIN_2 +249 0x0080 //RX_FDDRC_BAND_MARGIN_3 +250 0x0007 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x5000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x6400 //RX_FDDRC_THRD_3_2 +258 0x6400 //RX_FDDRC_THRD_3_3 +259 0x2000 //RX_FDDRC_SLANT_0_0 +260 0x2000 //RX_FDDRC_SLANT_0_1 +261 0x2000 //RX_FDDRC_SLANT_0_2 +262 0x2000 //RX_FDDRC_SLANT_0_3 +263 0x5333 //RX_FDDRC_SLANT_1_0 +264 0x5333 //RX_FDDRC_SLANT_1_1 +265 0x5333 //RX_FDDRC_SLANT_1_2 +266 0x5333 //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +286 0x0100 //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 +#VOL 2 +163 0x3000 //RX_TDDRC_ALPHA_UP_1 +164 0x3000 //RX_TDDRC_ALPHA_UP_2 +165 0x3000 //RX_TDDRC_ALPHA_UP_3 +166 0x3000 //RX_TDDRC_ALPHA_UP_4 +184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +190 0x7FFF //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +269 0x0000 //RX_TDDRC_THRD_0 +270 0x0000 //RX_TDDRC_THRD_1 +271 0x7FFF //RX_TDDRC_THRD_2 +272 0x7FFF //RX_TDDRC_THRD_3 +273 0x7FFF //RX_TDDRC_SLANT_0 +274 0x7EB8 //RX_TDDRC_SLANT_1 +275 0x3000 //RX_TDDRC_ALPHA_UP_0 +276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x199A //RX_TDDRC_HMNC_GAIN +279 0x0001 //RX_TDDRC_SMT_FLAG +280 0x0CCD //RX_TDDRC_SMT_W +281 0x017F //RX_TDDRC_DRC_GAIN +195 0x0014 //RX_FDEQ_SUBNUM +196 0x4848 //RX_FDEQ_GAIN_0 +197 0x4848 //RX_FDEQ_GAIN_1 +198 0x4848 //RX_FDEQ_GAIN_2 +199 0x4848 //RX_FDEQ_GAIN_3 +200 0x4848 //RX_FDEQ_GAIN_4 +201 0x4848 //RX_FDEQ_GAIN_5 +202 0x4444 //RX_FDEQ_GAIN_6 +203 0x4040 //RX_FDEQ_GAIN_7 +204 0x4040 //RX_FDEQ_GAIN_8 +205 0x4040 //RX_FDEQ_GAIN_9 +206 0x4848 //RX_FDEQ_GAIN_10 +207 0x4848 //RX_FDEQ_GAIN_11 +208 0x4848 //RX_FDEQ_GAIN_12 +209 0x4848 //RX_FDEQ_GAIN_13 +210 0x4848 //RX_FDEQ_GAIN_14 +211 0x4848 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0202 //RX_FDEQ_BIN_0 +221 0x0203 //RX_FDEQ_BIN_1 +222 0x0303 //RX_FDEQ_BIN_2 +223 0x0304 //RX_FDEQ_BIN_3 +224 0x0405 //RX_FDEQ_BIN_4 +225 0x0506 //RX_FDEQ_BIN_5 +226 0x0708 //RX_FDEQ_BIN_6 +227 0x090A //RX_FDEQ_BIN_7 +228 0x0B0C //RX_FDEQ_BIN_8 +229 0x0D0E //RX_FDEQ_BIN_9 +230 0x0000 //RX_FDEQ_BIN_10 +231 0x0000 //RX_FDEQ_BIN_11 +232 0x0000 //RX_FDEQ_BIN_12 +233 0x0000 //RX_FDEQ_BIN_13 +234 0x0000 //RX_FDEQ_BIN_14 +235 0x0000 //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x4000 //RX_FDEQ_RESRV_0 +245 0x0320 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0030 //RX_FDDRC_BAND_MARGIN_1 +248 0x0050 //RX_FDDRC_BAND_MARGIN_2 +249 0x0080 //RX_FDDRC_BAND_MARGIN_3 +250 0x0007 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x5000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x6400 //RX_FDDRC_THRD_3_2 +258 0x6400 //RX_FDDRC_THRD_3_3 +259 0x2000 //RX_FDDRC_SLANT_0_0 +260 0x2000 //RX_FDDRC_SLANT_0_1 +261 0x2000 //RX_FDDRC_SLANT_0_2 +262 0x2000 //RX_FDDRC_SLANT_0_3 +263 0x5333 //RX_FDDRC_SLANT_1_0 +264 0x5333 //RX_FDDRC_SLANT_1_1 +265 0x5333 //RX_FDDRC_SLANT_1_2 +266 0x5333 //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +286 0x0100 //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 +#VOL 3 +163 0x3000 //RX_TDDRC_ALPHA_UP_1 +164 0x3000 //RX_TDDRC_ALPHA_UP_2 +165 0x3000 //RX_TDDRC_ALPHA_UP_3 +166 0x3000 //RX_TDDRC_ALPHA_UP_4 +184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +190 0x7FFF //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +269 0x0000 //RX_TDDRC_THRD_0 +270 0x0000 //RX_TDDRC_THRD_1 +271 0x7FFF //RX_TDDRC_THRD_2 +272 0x7FFF //RX_TDDRC_THRD_3 +273 0x7FFF //RX_TDDRC_SLANT_0 +274 0x7EB8 //RX_TDDRC_SLANT_1 +275 0x3000 //RX_TDDRC_ALPHA_UP_0 +276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x199A //RX_TDDRC_HMNC_GAIN +279 0x0001 //RX_TDDRC_SMT_FLAG +280 0x0CCD //RX_TDDRC_SMT_W +281 0x017F //RX_TDDRC_DRC_GAIN +195 0x0014 //RX_FDEQ_SUBNUM +196 0x4848 //RX_FDEQ_GAIN_0 +197 0x4848 //RX_FDEQ_GAIN_1 +198 0x4848 //RX_FDEQ_GAIN_2 +199 0x4848 //RX_FDEQ_GAIN_3 +200 0x4848 //RX_FDEQ_GAIN_4 +201 0x4848 //RX_FDEQ_GAIN_5 +202 0x4444 //RX_FDEQ_GAIN_6 +203 0x4040 //RX_FDEQ_GAIN_7 +204 0x4040 //RX_FDEQ_GAIN_8 +205 0x4040 //RX_FDEQ_GAIN_9 +206 0x4848 //RX_FDEQ_GAIN_10 +207 0x4848 //RX_FDEQ_GAIN_11 +208 0x4848 //RX_FDEQ_GAIN_12 +209 0x4848 //RX_FDEQ_GAIN_13 +210 0x4848 //RX_FDEQ_GAIN_14 +211 0x4848 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0202 //RX_FDEQ_BIN_0 +221 0x0203 //RX_FDEQ_BIN_1 +222 0x0303 //RX_FDEQ_BIN_2 +223 0x0304 //RX_FDEQ_BIN_3 +224 0x0405 //RX_FDEQ_BIN_4 +225 0x0506 //RX_FDEQ_BIN_5 +226 0x0708 //RX_FDEQ_BIN_6 +227 0x090A //RX_FDEQ_BIN_7 +228 0x0B0C //RX_FDEQ_BIN_8 +229 0x0D0E //RX_FDEQ_BIN_9 +230 0x0000 //RX_FDEQ_BIN_10 +231 0x0000 //RX_FDEQ_BIN_11 +232 0x0000 //RX_FDEQ_BIN_12 +233 0x0000 //RX_FDEQ_BIN_13 +234 0x0000 //RX_FDEQ_BIN_14 +235 0x0000 //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x4000 //RX_FDEQ_RESRV_0 +245 0x0320 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0030 //RX_FDDRC_BAND_MARGIN_1 +248 0x0050 //RX_FDDRC_BAND_MARGIN_2 +249 0x0080 //RX_FDDRC_BAND_MARGIN_3 +250 0x0007 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x5000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x6400 //RX_FDDRC_THRD_3_2 +258 0x6400 //RX_FDDRC_THRD_3_3 +259 0x2000 //RX_FDDRC_SLANT_0_0 +260 0x2000 //RX_FDDRC_SLANT_0_1 +261 0x2000 //RX_FDDRC_SLANT_0_2 +262 0x2000 //RX_FDDRC_SLANT_0_3 +263 0x5333 //RX_FDDRC_SLANT_1_0 +264 0x5333 //RX_FDDRC_SLANT_1_1 +265 0x5333 //RX_FDDRC_SLANT_1_2 +266 0x5333 //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +286 0x0100 //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 +#VOL 4 +163 0x3000 //RX_TDDRC_ALPHA_UP_1 +164 0x3000 //RX_TDDRC_ALPHA_UP_2 +165 0x3000 //RX_TDDRC_ALPHA_UP_3 +166 0x3000 //RX_TDDRC_ALPHA_UP_4 +184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +190 0x7FFF //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +269 0x0000 //RX_TDDRC_THRD_0 +270 0x0000 //RX_TDDRC_THRD_1 +271 0x7FFF //RX_TDDRC_THRD_2 +272 0x7FFF //RX_TDDRC_THRD_3 +273 0x7FFF //RX_TDDRC_SLANT_0 +274 0x7EB8 //RX_TDDRC_SLANT_1 +275 0x3000 //RX_TDDRC_ALPHA_UP_0 +276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x199A //RX_TDDRC_HMNC_GAIN +279 0x0001 //RX_TDDRC_SMT_FLAG +280 0x0CCD //RX_TDDRC_SMT_W +281 0x017F //RX_TDDRC_DRC_GAIN +195 0x0014 //RX_FDEQ_SUBNUM +196 0x4848 //RX_FDEQ_GAIN_0 +197 0x4848 //RX_FDEQ_GAIN_1 +198 0x4848 //RX_FDEQ_GAIN_2 +199 0x4848 //RX_FDEQ_GAIN_3 +200 0x4848 //RX_FDEQ_GAIN_4 +201 0x4848 //RX_FDEQ_GAIN_5 +202 0x4444 //RX_FDEQ_GAIN_6 +203 0x4040 //RX_FDEQ_GAIN_7 +204 0x4040 //RX_FDEQ_GAIN_8 +205 0x4040 //RX_FDEQ_GAIN_9 +206 0x4848 //RX_FDEQ_GAIN_10 +207 0x4848 //RX_FDEQ_GAIN_11 +208 0x4848 //RX_FDEQ_GAIN_12 +209 0x4848 //RX_FDEQ_GAIN_13 +210 0x4848 //RX_FDEQ_GAIN_14 +211 0x4848 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0202 //RX_FDEQ_BIN_0 +221 0x0203 //RX_FDEQ_BIN_1 +222 0x0303 //RX_FDEQ_BIN_2 +223 0x0304 //RX_FDEQ_BIN_3 +224 0x0405 //RX_FDEQ_BIN_4 +225 0x0506 //RX_FDEQ_BIN_5 +226 0x0708 //RX_FDEQ_BIN_6 +227 0x090A //RX_FDEQ_BIN_7 +228 0x0B0C //RX_FDEQ_BIN_8 +229 0x0D0E //RX_FDEQ_BIN_9 +230 0x0000 //RX_FDEQ_BIN_10 +231 0x0000 //RX_FDEQ_BIN_11 +232 0x0000 //RX_FDEQ_BIN_12 +233 0x0000 //RX_FDEQ_BIN_13 +234 0x0000 //RX_FDEQ_BIN_14 +235 0x0000 //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x4000 //RX_FDEQ_RESRV_0 +245 0x0320 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0030 //RX_FDDRC_BAND_MARGIN_1 +248 0x0050 //RX_FDDRC_BAND_MARGIN_2 +249 0x0080 //RX_FDDRC_BAND_MARGIN_3 +250 0x0007 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x5000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x6400 //RX_FDDRC_THRD_3_2 +258 0x6400 //RX_FDDRC_THRD_3_3 +259 0x2000 //RX_FDDRC_SLANT_0_0 +260 0x2000 //RX_FDDRC_SLANT_0_1 +261 0x2000 //RX_FDDRC_SLANT_0_2 +262 0x2000 //RX_FDDRC_SLANT_0_3 +263 0x5333 //RX_FDDRC_SLANT_1_0 +264 0x5333 //RX_FDDRC_SLANT_1_1 +265 0x5333 //RX_FDDRC_SLANT_1_2 +266 0x5333 //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +286 0x0100 //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 +#VOL 5 +163 0x3000 //RX_TDDRC_ALPHA_UP_1 +164 0x3000 //RX_TDDRC_ALPHA_UP_2 +165 0x3000 //RX_TDDRC_ALPHA_UP_3 +166 0x3000 //RX_TDDRC_ALPHA_UP_4 +184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +190 0x7FFF //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +269 0x0000 //RX_TDDRC_THRD_0 +270 0x0000 //RX_TDDRC_THRD_1 +271 0x7FFF //RX_TDDRC_THRD_2 +272 0x7FFF //RX_TDDRC_THRD_3 +273 0x7FFF //RX_TDDRC_SLANT_0 +274 0x7EB8 //RX_TDDRC_SLANT_1 +275 0x3000 //RX_TDDRC_ALPHA_UP_0 +276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x199A //RX_TDDRC_HMNC_GAIN +279 0x0001 //RX_TDDRC_SMT_FLAG +280 0x0CCD //RX_TDDRC_SMT_W +281 0x017F //RX_TDDRC_DRC_GAIN +195 0x0014 //RX_FDEQ_SUBNUM +196 0x4848 //RX_FDEQ_GAIN_0 +197 0x4848 //RX_FDEQ_GAIN_1 +198 0x4848 //RX_FDEQ_GAIN_2 +199 0x4848 //RX_FDEQ_GAIN_3 +200 0x4848 //RX_FDEQ_GAIN_4 +201 0x4848 //RX_FDEQ_GAIN_5 +202 0x4444 //RX_FDEQ_GAIN_6 +203 0x4040 //RX_FDEQ_GAIN_7 +204 0x4040 //RX_FDEQ_GAIN_8 +205 0x4040 //RX_FDEQ_GAIN_9 +206 0x4848 //RX_FDEQ_GAIN_10 +207 0x4848 //RX_FDEQ_GAIN_11 +208 0x4848 //RX_FDEQ_GAIN_12 +209 0x4848 //RX_FDEQ_GAIN_13 +210 0x4848 //RX_FDEQ_GAIN_14 +211 0x4848 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0202 //RX_FDEQ_BIN_0 +221 0x0203 //RX_FDEQ_BIN_1 +222 0x0303 //RX_FDEQ_BIN_2 +223 0x0304 //RX_FDEQ_BIN_3 +224 0x0405 //RX_FDEQ_BIN_4 +225 0x0506 //RX_FDEQ_BIN_5 +226 0x0708 //RX_FDEQ_BIN_6 +227 0x090A //RX_FDEQ_BIN_7 +228 0x0B0C //RX_FDEQ_BIN_8 +229 0x0D0E //RX_FDEQ_BIN_9 +230 0x0000 //RX_FDEQ_BIN_10 +231 0x0000 //RX_FDEQ_BIN_11 +232 0x0000 //RX_FDEQ_BIN_12 +233 0x0000 //RX_FDEQ_BIN_13 +234 0x0000 //RX_FDEQ_BIN_14 +235 0x0000 //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x4000 //RX_FDEQ_RESRV_0 +245 0x0320 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0030 //RX_FDDRC_BAND_MARGIN_1 +248 0x0050 //RX_FDDRC_BAND_MARGIN_2 +249 0x0080 //RX_FDDRC_BAND_MARGIN_3 +250 0x0007 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x5000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x6400 //RX_FDDRC_THRD_3_2 +258 0x6400 //RX_FDDRC_THRD_3_3 +259 0x2000 //RX_FDDRC_SLANT_0_0 +260 0x2000 //RX_FDDRC_SLANT_0_1 +261 0x2000 //RX_FDDRC_SLANT_0_2 +262 0x2000 //RX_FDDRC_SLANT_0_3 +263 0x5333 //RX_FDDRC_SLANT_1_0 +264 0x5333 //RX_FDDRC_SLANT_1_1 +265 0x5333 //RX_FDDRC_SLANT_1_2 +266 0x5333 //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +286 0x0100 //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 +#VOL 6 +163 0x3000 //RX_TDDRC_ALPHA_UP_1 +164 0x3000 //RX_TDDRC_ALPHA_UP_2 +165 0x3000 //RX_TDDRC_ALPHA_UP_3 +166 0x3000 //RX_TDDRC_ALPHA_UP_4 +184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +190 0x7FFF //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +269 0x0000 //RX_TDDRC_THRD_0 +270 0x0000 //RX_TDDRC_THRD_1 +271 0x7FFF //RX_TDDRC_THRD_2 +272 0x7FFF //RX_TDDRC_THRD_3 +273 0x7FFF //RX_TDDRC_SLANT_0 +274 0x7EB8 //RX_TDDRC_SLANT_1 +275 0x3000 //RX_TDDRC_ALPHA_UP_0 +276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x199A //RX_TDDRC_HMNC_GAIN +279 0x0001 //RX_TDDRC_SMT_FLAG +280 0x0CCD //RX_TDDRC_SMT_W +281 0x017F //RX_TDDRC_DRC_GAIN +195 0x0014 //RX_FDEQ_SUBNUM +196 0x4848 //RX_FDEQ_GAIN_0 +197 0x4848 //RX_FDEQ_GAIN_1 +198 0x4848 //RX_FDEQ_GAIN_2 +199 0x4848 //RX_FDEQ_GAIN_3 +200 0x4848 //RX_FDEQ_GAIN_4 +201 0x4848 //RX_FDEQ_GAIN_5 +202 0x4444 //RX_FDEQ_GAIN_6 +203 0x4040 //RX_FDEQ_GAIN_7 +204 0x4040 //RX_FDEQ_GAIN_8 +205 0x4040 //RX_FDEQ_GAIN_9 +206 0x4848 //RX_FDEQ_GAIN_10 +207 0x4848 //RX_FDEQ_GAIN_11 +208 0x4848 //RX_FDEQ_GAIN_12 +209 0x4848 //RX_FDEQ_GAIN_13 +210 0x4848 //RX_FDEQ_GAIN_14 +211 0x4848 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0202 //RX_FDEQ_BIN_0 +221 0x0203 //RX_FDEQ_BIN_1 +222 0x0303 //RX_FDEQ_BIN_2 +223 0x0304 //RX_FDEQ_BIN_3 +224 0x0405 //RX_FDEQ_BIN_4 +225 0x0506 //RX_FDEQ_BIN_5 +226 0x0708 //RX_FDEQ_BIN_6 +227 0x090A //RX_FDEQ_BIN_7 +228 0x0B0C //RX_FDEQ_BIN_8 +229 0x0D0E //RX_FDEQ_BIN_9 +230 0x0000 //RX_FDEQ_BIN_10 +231 0x0000 //RX_FDEQ_BIN_11 +232 0x0000 //RX_FDEQ_BIN_12 +233 0x0000 //RX_FDEQ_BIN_13 +234 0x0000 //RX_FDEQ_BIN_14 +235 0x0000 //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x4000 //RX_FDEQ_RESRV_0 +245 0x0320 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0030 //RX_FDDRC_BAND_MARGIN_1 +248 0x0050 //RX_FDDRC_BAND_MARGIN_2 +249 0x0080 //RX_FDDRC_BAND_MARGIN_3 +250 0x0007 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x5000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x6400 //RX_FDDRC_THRD_3_2 +258 0x6400 //RX_FDDRC_THRD_3_3 +259 0x2000 //RX_FDDRC_SLANT_0_0 +260 0x2000 //RX_FDDRC_SLANT_0_1 +261 0x2000 //RX_FDDRC_SLANT_0_2 +262 0x2000 //RX_FDDRC_SLANT_0_3 +263 0x5333 //RX_FDDRC_SLANT_1_0 +264 0x5333 //RX_FDDRC_SLANT_1_1 +265 0x5333 //RX_FDDRC_SLANT_1_2 +266 0x5333 //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +286 0x0100 //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 #CASE_NAME BLUETOOTH-BTNB_NREC-VOICE_GENERIC-WB -#PARAM_TYPE TX+RX -#TOTAL_CUSTOM_STEP 7 +#PARAM_MODE Full +#PARAM_TYPE TX+2RX +#TOTAL_CUSTOM_STEP 7+7 #TX 0 0x0008 //TX_OPERATION_MODE_0 1 0x0008 //TX_OPERATION_MODE_1 @@ -17788,20 +26959,20 @@ 248 0xF400 //TX_THR_SN_EST_6 249 0xF600 //TX_THR_SN_EST_7 250 0x0000 //TX_DELTA_THR_SN_EST_0 -251 0x0000 //TX_DELTA_THR_SN_EST_1 +251 0x0200 //TX_DELTA_THR_SN_EST_1 252 0x0200 //TX_DELTA_THR_SN_EST_2 253 0x0200 //TX_DELTA_THR_SN_EST_3 254 0x0200 //TX_DELTA_THR_SN_EST_4 255 0x0200 //TX_DELTA_THR_SN_EST_5 -256 0x0200 //TX_DELTA_THR_SN_EST_6 +256 0x0000 //TX_DELTA_THR_SN_EST_6 257 0x0200 //TX_DELTA_THR_SN_EST_7 258 0x6000 //TX_LAMBDA_NN_EST_0 -259 0x6000 //TX_LAMBDA_NN_EST_1 +259 0x4000 //TX_LAMBDA_NN_EST_1 260 0x4000 //TX_LAMBDA_NN_EST_2 261 0x4000 //TX_LAMBDA_NN_EST_3 262 0x4000 //TX_LAMBDA_NN_EST_4 263 0x4000 //TX_LAMBDA_NN_EST_5 -264 0x4000 //TX_LAMBDA_NN_EST_6 +264 0x6000 //TX_LAMBDA_NN_EST_6 265 0x4000 //TX_LAMBDA_NN_EST_7 266 0x0400 //TX_N_SN_EST 267 0x001E //TX_INBEAM_T @@ -17819,16 +26990,16 @@ 279 0x1000 //TX_B_POST_FLT_0 280 0x1000 //TX_B_POST_FLT_1 281 0x000F //TX_NS_LVL_CTRL_0 -282 0x000F //TX_NS_LVL_CTRL_1 -283 0x0011 //TX_NS_LVL_CTRL_2 +282 0x0011 //TX_NS_LVL_CTRL_1 +283 0x000F //TX_NS_LVL_CTRL_2 284 0x000F //TX_NS_LVL_CTRL_3 285 0x000F //TX_NS_LVL_CTRL_4 286 0x000F //TX_NS_LVL_CTRL_5 287 0x000F //TX_NS_LVL_CTRL_6 288 0x0011 //TX_NS_LVL_CTRL_7 289 0x000C //TX_MIN_GAIN_S_0 -290 0x000C //TX_MIN_GAIN_S_1 -291 0x000F //TX_MIN_GAIN_S_2 +290 0x000F //TX_MIN_GAIN_S_1 +291 0x000C //TX_MIN_GAIN_S_2 292 0x000C //TX_MIN_GAIN_S_3 293 0x000C //TX_MIN_GAIN_S_4 294 0x000C //TX_MIN_GAIN_S_5 @@ -17852,12 +27023,12 @@ 312 0x7FFF //TX_A_POST_FILT_0 313 0x2000 //TX_A_POST_FILT_1 314 0x4000 //TX_A_POST_FILT_S_0 -315 0x4000 //TX_A_POST_FILT_S_1 +315 0x5000 //TX_A_POST_FILT_S_1 316 0x5000 //TX_A_POST_FILT_S_2 317 0x5000 //TX_A_POST_FILT_S_3 318 0x5000 //TX_A_POST_FILT_S_4 319 0x5000 //TX_A_POST_FILT_S_5 -320 0x5000 //TX_A_POST_FILT_S_6 +320 0x4000 //TX_A_POST_FILT_S_6 321 0x5000 //TX_A_POST_FILT_S_7 322 0x1000 //TX_B_POST_FILT_0 323 0x1000 //TX_B_POST_FILT_1 @@ -17917,10 +27088,10 @@ 377 0x7FFF //TX_NOISE_TH_5_4 378 0x044C //TX_NOISE_TH_6 379 0x0014 //TX_MINENOISE_TH -380 0x4000 //TX_MINENOISE_MIC0_TH_MTS -381 0xFFEE //TX_MINENOISE_MIC0_TH_EXP -382 0x6000 //TX_MINENOISE_MIC0_S_TH_MTS -383 0xFFF3 //TX_MINENOISE_MIC0_S_TH_EXP +380 0x4000 //TX_MORENS_TFMASK_TH +381 0xFFEE //TX_DRC_QUIET_FLOOR +382 0x6000 //TX_RATIODTL_CUT_TH +383 0xFFF3 //TX_DT_CUT_K1 384 0x0666 //TX_OUT_ENER_S_TH_CLEAN 385 0x0666 //TX_OUT_ENER_S_TH_LESSCLEAN 386 0x0333 //TX_OUT_ENER_S_TH_NOISY @@ -17928,15 +27099,15 @@ 388 0x0333 //TX_OUT_ENER_TH_SPEECH 389 0x2000 //TX_SN_NPB_GAIN 390 0x0000 //TX_NN_NPB_GAIN -391 0x0000 //TX_CSX_ALPHA_0 -392 0x0000 //TX_CSX_ALPHA_1 -393 0x0000 //TX_CSX_ALPHA_2 -394 0x0000 //TX_CSX_ALPHA_3 -395 0x0800 //TX_MU_ARSP_EST -396 0x00C8 //TX_P_OUTBEAM_MIN_TH +391 0x0000 //TX_POST_MASK_SUP_HSNE +392 0x0000 //TX_TAIL_DET_TH +393 0x0000 //TX_B_LESSCUT_RTO_WTA +394 0x0000 //TX_MEL_G_R +395 0x0800 //TX_SUPHIGH_TH +396 0x00C8 //TX_MASK_G_R 397 0x0002 //TX_EXTRA_NS_L -398 0x0800 //TX_EXTRA_NS_A -399 0x0005 //TX_VR_NOISE_FLOOR_TH +398 0x0800 //TX_C_POST_FLT_MASK +399 0x0005 //TX_A_POST_FLT_WNS 400 0x0148 //TX_MIN_G_LOW300HZ 401 0x0002 //TX_MAXLEVEL_CNG 402 0x00B4 //TX_STN_NOISE_TH @@ -18051,16 +27222,16 @@ 511 0x6666 //TX_MIC_TO_BFGAIN 512 0x0000 //TX_MICTOBFGAIN0 513 0x0000 //TX_FASTMUE_TH -514 0x0000 //TX_DERVB_LEN_0 -515 0x0000 //TX_DERVB_LEN_1 -516 0x0000 //TX_RHO_DERVB -517 0x0000 //TX_MIC_INDX_DERVB -518 0x0000 //TX_MU_DERVB -519 0x0000 //TX_DR_RESRV_0 -520 0x0000 //TX_DR_RESRV_1 -521 0x0000 //TX_DR_RESRV_2 -522 0x0000 //TX_DR_RESRV_3 -523 0x0000 //TX_DR_RESRV_4 +514 0x0000 //TX_DEREVERB_LF_MU +515 0x0000 //TX_DEREVERB_HF_MU +516 0x0000 //TX_DEREVERB_DELAY +517 0x0000 //TX_DEREVERB_COEF_LEN +518 0x0000 //TX_DEREVERB_DNR +519 0x0000 //TX_DEREVERB_ALPHA +520 0x0000 //TX_DEREVERB_BETA +521 0x0000 //TX_GSC_RTOL_TH +522 0x0000 //TX_GSC_RTOH_TH +523 0x0000 //TX_WIDE2_MEANHTH 524 0x0000 //TX_DR_RESRV_5 525 0x0000 //TX_DR_RESRV_6 526 0x0000 //TX_DR_RESRV_7 @@ -18434,8 +27605,73 @@ 894 0xC000 //TX_FASTNS_SSA_THHFL 895 0xCCCC //TX_FASTNS_SSA_THLFH 896 0xD999 //TX_FASTNS_SSA_THHFH +897 0x0000 //TX_SENDFUNC_REG_MICMUTE +898 0x0000 //TX_SENDFUNC_REG_MICMUTE1 +899 0x0000 //TX_MICMUTE_RATIO_THR +900 0x0000 //TX_MICMUTE_AMP_THR +901 0x0000 //TX_MICMUTE_HPF_IND +902 0x0000 //TX_MICMUTE_LOG_EYR_TH +903 0x0000 //TX_MICMUTE_CVG_TIME +904 0x0000 //TX_MICMUTE_RELEASE_TIME +905 0x0000 //TX_MIC_VOLUME_MIC0MUTE +906 0x0000 //TX_MICMUTE_EPD_OFFSET_0 +907 0x0000 //TX_MICMUTE_FRQ_AEC_L +908 0x0000 //TX_MICMUTE_EAD_THR +909 0x0000 //TX_MICMUTE_LAMBDA_CB_NLE +910 0x0000 //TX_MICMUTE_LAMBDA_RE_EST +911 0x0000 //TX_DTD_THR1_MICMUTE_0 +912 0x0000 //TX_DTD_THR1_MICMUTE_1 +913 0x0000 //TX_DTD_THR1_MICMUTE_2 +914 0x0000 //TX_DTD_THR1_MICMUTE_3 +915 0x0000 //TX_DTD_THR2_MICMUTE_0 +916 0x0000 //TX_MICMUTE_MIN_EQ_RE_EST_0 +917 0x0000 //TX_MICMUTE_MIN_EQ_RE_EST_1 +918 0x0000 //TX_MICMUTE_MIN_EQ_RE_EST_2 +919 0x0000 //TX_MICMUTE_MIN_EQ_RE_EST_3 +920 0x0000 //TX_MICMUTE_MIN_EQ_RE_EST_4 +921 0x0000 //TX_MICMUTE_C_POST_FLT +922 0x0000 //TX_MICMUTE_DT_CUT_K +923 0x0000 //TX_MICMUTE_DT_CUT_THR +924 0x0000 //TX_MICMUTE_DT_CUT_K2 +925 0x0000 //TX_MICMUTE_DT_CUT_THR2 +926 0x0000 //TX_MICMUTE_DT2_HOLD_N +927 0x0000 //TX_MICMUTE_RATIODTH_THCUT +928 0x0000 //TX_MICMUTE_B_POST_FLT_ECHOL +929 0x0000 //TX_MICMUTE_B_POST_FLT_ECHOH +930 0x0000 //TX_MICMUTE_C_POST_FLT_MASK +931 0x0000 //TX_MICMUTE_RATIODTL_CUT_TH +932 0x0000 //TX_MICMUTE_DT_CUT_K1 +933 0x0000 //TX_MICMUTE_N2_SN_EST +934 0x0000 //TX_MICMUTE_THR_SN_EST_0 +935 0x0000 //TX_MICMUTE_MIN_G_CTRL_0 +936 0x0000 //TX_MICMUTE_A_POST_FILT_S_0 +937 0x0000 //TX_MICMUTE_B_POST_FILT_0 +938 0x0000 //TX_MIC1RUB_AMP_THR +939 0x0000 //TX_MIC1MUTE_RATIO_THR +940 0x0000 //TX_MIC1MUTE_AMP_THR +941 0x0000 //TX_MIC1MUTE_CVG_TIME +942 0x0000 //TX_MIC1MUTE_RELEASE_TIME +943 0x0000 //TX_AMS_RESRV_01 +944 0x0000 //TX_AMS_RESRV_02 +945 0x0000 //TX_AMS_RESRV_03 +946 0x0000 //TX_AMS_RESRV_04 +947 0x0000 //TX_AMS_RESRV_05 +948 0x0000 //TX_AMS_RESRV_06 +949 0x0000 //TX_AMS_RESRV_07 +950 0x0000 //TX_AMS_RESRV_08 +951 0x0000 //TX_AMS_RESRV_09 +952 0x0000 //TX_AMS_RESRV_10 +953 0x0000 //TX_AMS_RESRV_11 +954 0x0000 //TX_AMS_RESRV_12 +955 0x0000 //TX_AMS_RESRV_13 +956 0x0000 //TX_AMS_RESRV_14 +957 0x0000 //TX_AMS_RESRV_15 +958 0x0000 //TX_AMS_RESRV_16 +959 0x0000 //TX_AMS_RESRV_17 +960 0x0000 //TX_AMS_RESRV_18 +961 0x0000 //TX_AMS_RESRV_19 #RX -0 0x006C //RX_RECVFUNC_MODE_0 +0 0x206C //RX_RECVFUNC_MODE_0 1 0x0000 //RX_RECVFUNC_MODE_1 2 0x0001 //RX_SAMPLINGFREQ_SIG 3 0x0001 //RX_SAMPLINGFREQ_PROC @@ -19285,10 +28521,862 @@ 110 0x0000 //RX_FDDRC_RESRV_0 129 0x0100 //RX_SPK_VOL 130 0x0000 //RX_VOL_RESRV_0 +#RX 2 +157 0x206C //RX_RECVFUNC_MODE_0 +158 0x0000 //RX_RECVFUNC_MODE_1 +159 0x0001 //RX_SAMPLINGFREQ_SIG +160 0x0001 //RX_SAMPLINGFREQ_PROC +161 0x000A //RX_FRAME_SZ +162 0x0000 //RX_DELAY_OPT +163 0x1000 //RX_TDDRC_ALPHA_UP_1 +164 0x1000 //RX_TDDRC_ALPHA_UP_2 +165 0x1000 //RX_TDDRC_ALPHA_UP_3 +166 0x1000 //RX_TDDRC_ALPHA_UP_4 +167 0x0800 //RX_PGA +168 0x7FFF //RX_A_HP +169 0x4000 //RX_B_PE +170 0x3800 //RX_THR_PITCH_DET_0 +171 0x3000 //RX_THR_PITCH_DET_1 +172 0x2800 //RX_THR_PITCH_DET_2 +173 0x0008 //RX_PITCH_BFR_LEN +174 0x0003 //RX_SBD_PITCH_DET +175 0x0100 //RX_PP_RESRV_0 +176 0x0020 //RX_PP_RESRV_1 +177 0x0600 //RX_N_SN_EST +178 0x000C //RX_N2_SN_EST +179 0x0010 //RX_NS_LVL_CTRL +180 0xF800 //RX_THR_SN_EST +181 0x7CCD //RX_LAMBDA_PFILT +182 0x000A //RX_FENS_RESRV_0 +183 0x0190 //RX_FENS_RESRV_1 +184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +187 0x0002 //RX_EXTRA_NS_L +188 0x0800 //RX_EXTRA_NS_A +189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +190 0x7FFF //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +192 0x199A //RX_A_POST_FLT +193 0x0000 //RX_LMT_THRD +194 0x4000 //RX_LMT_ALPHA +195 0x001C //RX_FDEQ_SUBNUM +196 0x4848 //RX_FDEQ_GAIN_0 +197 0x4848 //RX_FDEQ_GAIN_1 +198 0x4848 //RX_FDEQ_GAIN_2 +199 0x4848 //RX_FDEQ_GAIN_3 +200 0x4848 //RX_FDEQ_GAIN_4 +201 0x4848 //RX_FDEQ_GAIN_5 +202 0x4848 //RX_FDEQ_GAIN_6 +203 0x4848 //RX_FDEQ_GAIN_7 +204 0x4848 //RX_FDEQ_GAIN_8 +205 0x3C3C //RX_FDEQ_GAIN_9 +206 0x3C3C //RX_FDEQ_GAIN_10 +207 0x3838 //RX_FDEQ_GAIN_11 +208 0x3838 //RX_FDEQ_GAIN_12 +209 0x3030 //RX_FDEQ_GAIN_13 +210 0x4848 //RX_FDEQ_GAIN_14 +211 0x4848 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0202 //RX_FDEQ_BIN_0 +221 0x0203 //RX_FDEQ_BIN_1 +222 0x0303 //RX_FDEQ_BIN_2 +223 0x0304 //RX_FDEQ_BIN_3 +224 0x0405 //RX_FDEQ_BIN_4 +225 0x0506 //RX_FDEQ_BIN_5 +226 0x0708 //RX_FDEQ_BIN_6 +227 0x090A //RX_FDEQ_BIN_7 +228 0x0B0C //RX_FDEQ_BIN_8 +229 0x0D0E //RX_FDEQ_BIN_9 +230 0x0E0F //RX_FDEQ_BIN_10 +231 0x0F10 //RX_FDEQ_BIN_11 +232 0x1011 //RX_FDEQ_BIN_12 +233 0x1112 //RX_FDEQ_BIN_13 +234 0x0000 //RX_FDEQ_BIN_14 +235 0x0000 //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x4000 //RX_FDEQ_RESRV_0 +245 0x0320 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0030 //RX_FDDRC_BAND_MARGIN_1 +248 0x0050 //RX_FDDRC_BAND_MARGIN_2 +249 0x0080 //RX_FDDRC_BAND_MARGIN_3 +250 0x0007 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x5000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x6400 //RX_FDDRC_THRD_3_2 +258 0x6400 //RX_FDDRC_THRD_3_3 +259 0x2000 //RX_FDDRC_SLANT_0_0 +260 0x2000 //RX_FDDRC_SLANT_0_1 +261 0x2000 //RX_FDDRC_SLANT_0_2 +262 0x2000 //RX_FDDRC_SLANT_0_3 +263 0x5333 //RX_FDDRC_SLANT_1_0 +264 0x5333 //RX_FDDRC_SLANT_1_1 +265 0x5333 //RX_FDDRC_SLANT_1_2 +266 0x5333 //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +268 0x0000 //RX_FILTINDX +269 0x0000 //RX_TDDRC_THRD_0 +270 0x0000 //RX_TDDRC_THRD_1 +271 0x7FFF //RX_TDDRC_THRD_2 +272 0x7FFF //RX_TDDRC_THRD_3 +273 0x7E70 //RX_TDDRC_SLANT_0 +274 0x7FFF //RX_TDDRC_SLANT_1 +275 0x1000 //RX_TDDRC_ALPHA_UP_0 +276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x199A //RX_TDDRC_HMNC_GAIN +279 0x0001 //RX_TDDRC_SMT_FLAG +280 0x0CCD //RX_TDDRC_SMT_W +281 0x0155 //RX_TDDRC_DRC_GAIN +282 0x7C00 //RX_LAMBDA_PKA_FP +283 0x2000 //RX_TPKA_FP +284 0x2000 //RX_MIN_G_FP +285 0x0080 //RX_MAX_G_FP +286 0x0100 //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 +288 0x0000 //RX_MAXLEVEL_CNG +289 0x3000 //RX_BWE_UV_TH +290 0x3000 //RX_BWE_UV_TH2 +291 0x1800 //RX_BWE_UV_TH3 +292 0x1000 //RX_BWE_V_TH +293 0x04CD //RX_BWE_GAIN1_V_TH1 +294 0x0F33 //RX_BWE_GAIN1_V_TH2 +295 0x7333 //RX_BWE_UV_EQ +296 0x199A //RX_BWE_V_EQ +297 0x7333 //RX_BWE_TONE_TH +298 0x0004 //RX_BWE_UV_HOLD_T +299 0x6CCD //RX_BWE_GAIN2_ALPHA +300 0x799A //RX_BWE_GAIN3_ALPHA +301 0x001E //RX_BWE_CUTOFF +302 0x3000 //RX_BWE_GAINFILL +303 0x3200 //RX_BWE_MAXTH_TONE +304 0x2000 //RX_BWE_EQ_0 +305 0x2000 //RX_BWE_EQ_1 +306 0x2000 //RX_BWE_EQ_2 +307 0x2000 //RX_BWE_EQ_3 +308 0x2000 //RX_BWE_EQ_4 +309 0x2000 //RX_BWE_EQ_5 +310 0x2000 //RX_BWE_EQ_6 +311 0x0000 //RX_BWE_RESRV_0 +312 0x0000 //RX_BWE_RESRV_1 +313 0x0000 //RX_BWE_RESRV_2 +#VOL 0 +163 0x1000 //RX_TDDRC_ALPHA_UP_1 +164 0x1000 //RX_TDDRC_ALPHA_UP_2 +165 0x1000 //RX_TDDRC_ALPHA_UP_3 +166 0x1000 //RX_TDDRC_ALPHA_UP_4 +184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +190 0x7FFF //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +269 0x0000 //RX_TDDRC_THRD_0 +270 0x0000 //RX_TDDRC_THRD_1 +271 0x7FFF //RX_TDDRC_THRD_2 +272 0x7FFF //RX_TDDRC_THRD_3 +273 0x7E70 //RX_TDDRC_SLANT_0 +274 0x7FFF //RX_TDDRC_SLANT_1 +275 0x1000 //RX_TDDRC_ALPHA_UP_0 +276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x199A //RX_TDDRC_HMNC_GAIN +279 0x0001 //RX_TDDRC_SMT_FLAG +280 0x0CCD //RX_TDDRC_SMT_W +281 0x0155 //RX_TDDRC_DRC_GAIN +195 0x001C //RX_FDEQ_SUBNUM +196 0x4848 //RX_FDEQ_GAIN_0 +197 0x4848 //RX_FDEQ_GAIN_1 +198 0x4848 //RX_FDEQ_GAIN_2 +199 0x4848 //RX_FDEQ_GAIN_3 +200 0x4848 //RX_FDEQ_GAIN_4 +201 0x4848 //RX_FDEQ_GAIN_5 +202 0x4848 //RX_FDEQ_GAIN_6 +203 0x4848 //RX_FDEQ_GAIN_7 +204 0x4848 //RX_FDEQ_GAIN_8 +205 0x3C3C //RX_FDEQ_GAIN_9 +206 0x3C3C //RX_FDEQ_GAIN_10 +207 0x3838 //RX_FDEQ_GAIN_11 +208 0x3838 //RX_FDEQ_GAIN_12 +209 0x3030 //RX_FDEQ_GAIN_13 +210 0x4848 //RX_FDEQ_GAIN_14 +211 0x4848 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0202 //RX_FDEQ_BIN_0 +221 0x0203 //RX_FDEQ_BIN_1 +222 0x0303 //RX_FDEQ_BIN_2 +223 0x0304 //RX_FDEQ_BIN_3 +224 0x0405 //RX_FDEQ_BIN_4 +225 0x0506 //RX_FDEQ_BIN_5 +226 0x0708 //RX_FDEQ_BIN_6 +227 0x090A //RX_FDEQ_BIN_7 +228 0x0B0C //RX_FDEQ_BIN_8 +229 0x0D0E //RX_FDEQ_BIN_9 +230 0x0E0F //RX_FDEQ_BIN_10 +231 0x0F10 //RX_FDEQ_BIN_11 +232 0x1011 //RX_FDEQ_BIN_12 +233 0x1112 //RX_FDEQ_BIN_13 +234 0x0000 //RX_FDEQ_BIN_14 +235 0x0000 //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x4000 //RX_FDEQ_RESRV_0 +245 0x0320 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0030 //RX_FDDRC_BAND_MARGIN_1 +248 0x0050 //RX_FDDRC_BAND_MARGIN_2 +249 0x0080 //RX_FDDRC_BAND_MARGIN_3 +250 0x0007 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x5000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x6400 //RX_FDDRC_THRD_3_2 +258 0x6400 //RX_FDDRC_THRD_3_3 +259 0x2000 //RX_FDDRC_SLANT_0_0 +260 0x2000 //RX_FDDRC_SLANT_0_1 +261 0x2000 //RX_FDDRC_SLANT_0_2 +262 0x2000 //RX_FDDRC_SLANT_0_3 +263 0x5333 //RX_FDDRC_SLANT_1_0 +264 0x5333 //RX_FDDRC_SLANT_1_1 +265 0x5333 //RX_FDDRC_SLANT_1_2 +266 0x5333 //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +286 0x0100 //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 +#VOL 1 +163 0x1000 //RX_TDDRC_ALPHA_UP_1 +164 0x1000 //RX_TDDRC_ALPHA_UP_2 +165 0x1000 //RX_TDDRC_ALPHA_UP_3 +166 0x1000 //RX_TDDRC_ALPHA_UP_4 +184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +190 0x7FFF //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +269 0x0000 //RX_TDDRC_THRD_0 +270 0x0000 //RX_TDDRC_THRD_1 +271 0x7FFF //RX_TDDRC_THRD_2 +272 0x7FFF //RX_TDDRC_THRD_3 +273 0x7E70 //RX_TDDRC_SLANT_0 +274 0x7FFF //RX_TDDRC_SLANT_1 +275 0x1000 //RX_TDDRC_ALPHA_UP_0 +276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x199A //RX_TDDRC_HMNC_GAIN +279 0x0001 //RX_TDDRC_SMT_FLAG +280 0x0CCD //RX_TDDRC_SMT_W +281 0x0155 //RX_TDDRC_DRC_GAIN +195 0x001C //RX_FDEQ_SUBNUM +196 0x4848 //RX_FDEQ_GAIN_0 +197 0x4848 //RX_FDEQ_GAIN_1 +198 0x4848 //RX_FDEQ_GAIN_2 +199 0x4848 //RX_FDEQ_GAIN_3 +200 0x4848 //RX_FDEQ_GAIN_4 +201 0x4848 //RX_FDEQ_GAIN_5 +202 0x4848 //RX_FDEQ_GAIN_6 +203 0x4848 //RX_FDEQ_GAIN_7 +204 0x4848 //RX_FDEQ_GAIN_8 +205 0x3C3C //RX_FDEQ_GAIN_9 +206 0x3C3C //RX_FDEQ_GAIN_10 +207 0x3838 //RX_FDEQ_GAIN_11 +208 0x3838 //RX_FDEQ_GAIN_12 +209 0x3030 //RX_FDEQ_GAIN_13 +210 0x4848 //RX_FDEQ_GAIN_14 +211 0x4848 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0202 //RX_FDEQ_BIN_0 +221 0x0203 //RX_FDEQ_BIN_1 +222 0x0303 //RX_FDEQ_BIN_2 +223 0x0304 //RX_FDEQ_BIN_3 +224 0x0405 //RX_FDEQ_BIN_4 +225 0x0506 //RX_FDEQ_BIN_5 +226 0x0708 //RX_FDEQ_BIN_6 +227 0x090A //RX_FDEQ_BIN_7 +228 0x0B0C //RX_FDEQ_BIN_8 +229 0x0D0E //RX_FDEQ_BIN_9 +230 0x0E0F //RX_FDEQ_BIN_10 +231 0x0F10 //RX_FDEQ_BIN_11 +232 0x1011 //RX_FDEQ_BIN_12 +233 0x1112 //RX_FDEQ_BIN_13 +234 0x0000 //RX_FDEQ_BIN_14 +235 0x0000 //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x4000 //RX_FDEQ_RESRV_0 +245 0x0320 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0030 //RX_FDDRC_BAND_MARGIN_1 +248 0x0050 //RX_FDDRC_BAND_MARGIN_2 +249 0x0080 //RX_FDDRC_BAND_MARGIN_3 +250 0x0007 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x5000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x6400 //RX_FDDRC_THRD_3_2 +258 0x6400 //RX_FDDRC_THRD_3_3 +259 0x2000 //RX_FDDRC_SLANT_0_0 +260 0x2000 //RX_FDDRC_SLANT_0_1 +261 0x2000 //RX_FDDRC_SLANT_0_2 +262 0x2000 //RX_FDDRC_SLANT_0_3 +263 0x5333 //RX_FDDRC_SLANT_1_0 +264 0x5333 //RX_FDDRC_SLANT_1_1 +265 0x5333 //RX_FDDRC_SLANT_1_2 +266 0x5333 //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +286 0x0100 //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 +#VOL 2 +163 0x1000 //RX_TDDRC_ALPHA_UP_1 +164 0x1000 //RX_TDDRC_ALPHA_UP_2 +165 0x1000 //RX_TDDRC_ALPHA_UP_3 +166 0x1000 //RX_TDDRC_ALPHA_UP_4 +184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +190 0x7FFF //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +269 0x0000 //RX_TDDRC_THRD_0 +270 0x0000 //RX_TDDRC_THRD_1 +271 0x7FFF //RX_TDDRC_THRD_2 +272 0x7FFF //RX_TDDRC_THRD_3 +273 0x7E70 //RX_TDDRC_SLANT_0 +274 0x7FFF //RX_TDDRC_SLANT_1 +275 0x1000 //RX_TDDRC_ALPHA_UP_0 +276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x199A //RX_TDDRC_HMNC_GAIN +279 0x0001 //RX_TDDRC_SMT_FLAG +280 0x0CCD //RX_TDDRC_SMT_W +281 0x0155 //RX_TDDRC_DRC_GAIN +195 0x001C //RX_FDEQ_SUBNUM +196 0x4848 //RX_FDEQ_GAIN_0 +197 0x4848 //RX_FDEQ_GAIN_1 +198 0x4848 //RX_FDEQ_GAIN_2 +199 0x4848 //RX_FDEQ_GAIN_3 +200 0x4848 //RX_FDEQ_GAIN_4 +201 0x4848 //RX_FDEQ_GAIN_5 +202 0x4848 //RX_FDEQ_GAIN_6 +203 0x4848 //RX_FDEQ_GAIN_7 +204 0x4848 //RX_FDEQ_GAIN_8 +205 0x3C3C //RX_FDEQ_GAIN_9 +206 0x3C3C //RX_FDEQ_GAIN_10 +207 0x3838 //RX_FDEQ_GAIN_11 +208 0x3838 //RX_FDEQ_GAIN_12 +209 0x3030 //RX_FDEQ_GAIN_13 +210 0x4848 //RX_FDEQ_GAIN_14 +211 0x4848 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0202 //RX_FDEQ_BIN_0 +221 0x0203 //RX_FDEQ_BIN_1 +222 0x0303 //RX_FDEQ_BIN_2 +223 0x0304 //RX_FDEQ_BIN_3 +224 0x0405 //RX_FDEQ_BIN_4 +225 0x0506 //RX_FDEQ_BIN_5 +226 0x0708 //RX_FDEQ_BIN_6 +227 0x090A //RX_FDEQ_BIN_7 +228 0x0B0C //RX_FDEQ_BIN_8 +229 0x0D0E //RX_FDEQ_BIN_9 +230 0x0E0F //RX_FDEQ_BIN_10 +231 0x0F10 //RX_FDEQ_BIN_11 +232 0x1011 //RX_FDEQ_BIN_12 +233 0x1112 //RX_FDEQ_BIN_13 +234 0x0000 //RX_FDEQ_BIN_14 +235 0x0000 //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x4000 //RX_FDEQ_RESRV_0 +245 0x0320 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0030 //RX_FDDRC_BAND_MARGIN_1 +248 0x0050 //RX_FDDRC_BAND_MARGIN_2 +249 0x0080 //RX_FDDRC_BAND_MARGIN_3 +250 0x0007 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x5000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x6400 //RX_FDDRC_THRD_3_2 +258 0x6400 //RX_FDDRC_THRD_3_3 +259 0x2000 //RX_FDDRC_SLANT_0_0 +260 0x2000 //RX_FDDRC_SLANT_0_1 +261 0x2000 //RX_FDDRC_SLANT_0_2 +262 0x2000 //RX_FDDRC_SLANT_0_3 +263 0x5333 //RX_FDDRC_SLANT_1_0 +264 0x5333 //RX_FDDRC_SLANT_1_1 +265 0x5333 //RX_FDDRC_SLANT_1_2 +266 0x5333 //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +286 0x0100 //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 +#VOL 3 +163 0x1000 //RX_TDDRC_ALPHA_UP_1 +164 0x1000 //RX_TDDRC_ALPHA_UP_2 +165 0x1000 //RX_TDDRC_ALPHA_UP_3 +166 0x1000 //RX_TDDRC_ALPHA_UP_4 +184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +190 0x7FFF //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +269 0x0000 //RX_TDDRC_THRD_0 +270 0x0000 //RX_TDDRC_THRD_1 +271 0x7FFF //RX_TDDRC_THRD_2 +272 0x7FFF //RX_TDDRC_THRD_3 +273 0x7E70 //RX_TDDRC_SLANT_0 +274 0x7FFF //RX_TDDRC_SLANT_1 +275 0x1000 //RX_TDDRC_ALPHA_UP_0 +276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x199A //RX_TDDRC_HMNC_GAIN +279 0x0001 //RX_TDDRC_SMT_FLAG +280 0x0CCD //RX_TDDRC_SMT_W +281 0x0155 //RX_TDDRC_DRC_GAIN +195 0x001C //RX_FDEQ_SUBNUM +196 0x4848 //RX_FDEQ_GAIN_0 +197 0x4848 //RX_FDEQ_GAIN_1 +198 0x4848 //RX_FDEQ_GAIN_2 +199 0x4848 //RX_FDEQ_GAIN_3 +200 0x4848 //RX_FDEQ_GAIN_4 +201 0x4848 //RX_FDEQ_GAIN_5 +202 0x4848 //RX_FDEQ_GAIN_6 +203 0x4848 //RX_FDEQ_GAIN_7 +204 0x4848 //RX_FDEQ_GAIN_8 +205 0x3C3C //RX_FDEQ_GAIN_9 +206 0x3C3C //RX_FDEQ_GAIN_10 +207 0x3838 //RX_FDEQ_GAIN_11 +208 0x3838 //RX_FDEQ_GAIN_12 +209 0x3030 //RX_FDEQ_GAIN_13 +210 0x4848 //RX_FDEQ_GAIN_14 +211 0x4848 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0202 //RX_FDEQ_BIN_0 +221 0x0203 //RX_FDEQ_BIN_1 +222 0x0303 //RX_FDEQ_BIN_2 +223 0x0304 //RX_FDEQ_BIN_3 +224 0x0405 //RX_FDEQ_BIN_4 +225 0x0506 //RX_FDEQ_BIN_5 +226 0x0708 //RX_FDEQ_BIN_6 +227 0x090A //RX_FDEQ_BIN_7 +228 0x0B0C //RX_FDEQ_BIN_8 +229 0x0D0E //RX_FDEQ_BIN_9 +230 0x0E0F //RX_FDEQ_BIN_10 +231 0x0F10 //RX_FDEQ_BIN_11 +232 0x1011 //RX_FDEQ_BIN_12 +233 0x1112 //RX_FDEQ_BIN_13 +234 0x0000 //RX_FDEQ_BIN_14 +235 0x0000 //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x4000 //RX_FDEQ_RESRV_0 +245 0x0320 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0030 //RX_FDDRC_BAND_MARGIN_1 +248 0x0050 //RX_FDDRC_BAND_MARGIN_2 +249 0x0080 //RX_FDDRC_BAND_MARGIN_3 +250 0x0007 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x5000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x6400 //RX_FDDRC_THRD_3_2 +258 0x6400 //RX_FDDRC_THRD_3_3 +259 0x2000 //RX_FDDRC_SLANT_0_0 +260 0x2000 //RX_FDDRC_SLANT_0_1 +261 0x2000 //RX_FDDRC_SLANT_0_2 +262 0x2000 //RX_FDDRC_SLANT_0_3 +263 0x5333 //RX_FDDRC_SLANT_1_0 +264 0x5333 //RX_FDDRC_SLANT_1_1 +265 0x5333 //RX_FDDRC_SLANT_1_2 +266 0x5333 //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +286 0x0100 //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 +#VOL 4 +163 0x1000 //RX_TDDRC_ALPHA_UP_1 +164 0x1000 //RX_TDDRC_ALPHA_UP_2 +165 0x1000 //RX_TDDRC_ALPHA_UP_3 +166 0x1000 //RX_TDDRC_ALPHA_UP_4 +184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +190 0x7FFF //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +269 0x0000 //RX_TDDRC_THRD_0 +270 0x0000 //RX_TDDRC_THRD_1 +271 0x7FFF //RX_TDDRC_THRD_2 +272 0x7FFF //RX_TDDRC_THRD_3 +273 0x7E70 //RX_TDDRC_SLANT_0 +274 0x7FFF //RX_TDDRC_SLANT_1 +275 0x1000 //RX_TDDRC_ALPHA_UP_0 +276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x199A //RX_TDDRC_HMNC_GAIN +279 0x0001 //RX_TDDRC_SMT_FLAG +280 0x0CCD //RX_TDDRC_SMT_W +281 0x0155 //RX_TDDRC_DRC_GAIN +195 0x001C //RX_FDEQ_SUBNUM +196 0x4848 //RX_FDEQ_GAIN_0 +197 0x4848 //RX_FDEQ_GAIN_1 +198 0x4848 //RX_FDEQ_GAIN_2 +199 0x4848 //RX_FDEQ_GAIN_3 +200 0x4848 //RX_FDEQ_GAIN_4 +201 0x4848 //RX_FDEQ_GAIN_5 +202 0x4848 //RX_FDEQ_GAIN_6 +203 0x4848 //RX_FDEQ_GAIN_7 +204 0x4848 //RX_FDEQ_GAIN_8 +205 0x3C3C //RX_FDEQ_GAIN_9 +206 0x3C3C //RX_FDEQ_GAIN_10 +207 0x3838 //RX_FDEQ_GAIN_11 +208 0x3838 //RX_FDEQ_GAIN_12 +209 0x3030 //RX_FDEQ_GAIN_13 +210 0x4848 //RX_FDEQ_GAIN_14 +211 0x4848 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0202 //RX_FDEQ_BIN_0 +221 0x0203 //RX_FDEQ_BIN_1 +222 0x0303 //RX_FDEQ_BIN_2 +223 0x0304 //RX_FDEQ_BIN_3 +224 0x0405 //RX_FDEQ_BIN_4 +225 0x0506 //RX_FDEQ_BIN_5 +226 0x0708 //RX_FDEQ_BIN_6 +227 0x090A //RX_FDEQ_BIN_7 +228 0x0B0C //RX_FDEQ_BIN_8 +229 0x0D0E //RX_FDEQ_BIN_9 +230 0x0E0F //RX_FDEQ_BIN_10 +231 0x0F10 //RX_FDEQ_BIN_11 +232 0x1011 //RX_FDEQ_BIN_12 +233 0x1112 //RX_FDEQ_BIN_13 +234 0x0000 //RX_FDEQ_BIN_14 +235 0x0000 //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x4000 //RX_FDEQ_RESRV_0 +245 0x0320 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0030 //RX_FDDRC_BAND_MARGIN_1 +248 0x0050 //RX_FDDRC_BAND_MARGIN_2 +249 0x0080 //RX_FDDRC_BAND_MARGIN_3 +250 0x0007 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x5000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x6400 //RX_FDDRC_THRD_3_2 +258 0x6400 //RX_FDDRC_THRD_3_3 +259 0x2000 //RX_FDDRC_SLANT_0_0 +260 0x2000 //RX_FDDRC_SLANT_0_1 +261 0x2000 //RX_FDDRC_SLANT_0_2 +262 0x2000 //RX_FDDRC_SLANT_0_3 +263 0x5333 //RX_FDDRC_SLANT_1_0 +264 0x5333 //RX_FDDRC_SLANT_1_1 +265 0x5333 //RX_FDDRC_SLANT_1_2 +266 0x5333 //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +286 0x0100 //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 +#VOL 5 +163 0x1000 //RX_TDDRC_ALPHA_UP_1 +164 0x1000 //RX_TDDRC_ALPHA_UP_2 +165 0x1000 //RX_TDDRC_ALPHA_UP_3 +166 0x1000 //RX_TDDRC_ALPHA_UP_4 +184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +190 0x7FFF //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +269 0x0000 //RX_TDDRC_THRD_0 +270 0x0000 //RX_TDDRC_THRD_1 +271 0x7FFF //RX_TDDRC_THRD_2 +272 0x7FFF //RX_TDDRC_THRD_3 +273 0x7E70 //RX_TDDRC_SLANT_0 +274 0x7FFF //RX_TDDRC_SLANT_1 +275 0x1000 //RX_TDDRC_ALPHA_UP_0 +276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x199A //RX_TDDRC_HMNC_GAIN +279 0x0001 //RX_TDDRC_SMT_FLAG +280 0x0CCD //RX_TDDRC_SMT_W +281 0x0155 //RX_TDDRC_DRC_GAIN +195 0x001C //RX_FDEQ_SUBNUM +196 0x4848 //RX_FDEQ_GAIN_0 +197 0x4848 //RX_FDEQ_GAIN_1 +198 0x4848 //RX_FDEQ_GAIN_2 +199 0x4848 //RX_FDEQ_GAIN_3 +200 0x4848 //RX_FDEQ_GAIN_4 +201 0x4848 //RX_FDEQ_GAIN_5 +202 0x4848 //RX_FDEQ_GAIN_6 +203 0x4848 //RX_FDEQ_GAIN_7 +204 0x4848 //RX_FDEQ_GAIN_8 +205 0x3C3C //RX_FDEQ_GAIN_9 +206 0x3C3C //RX_FDEQ_GAIN_10 +207 0x3838 //RX_FDEQ_GAIN_11 +208 0x3838 //RX_FDEQ_GAIN_12 +209 0x3030 //RX_FDEQ_GAIN_13 +210 0x4848 //RX_FDEQ_GAIN_14 +211 0x4848 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0202 //RX_FDEQ_BIN_0 +221 0x0203 //RX_FDEQ_BIN_1 +222 0x0303 //RX_FDEQ_BIN_2 +223 0x0304 //RX_FDEQ_BIN_3 +224 0x0405 //RX_FDEQ_BIN_4 +225 0x0506 //RX_FDEQ_BIN_5 +226 0x0708 //RX_FDEQ_BIN_6 +227 0x090A //RX_FDEQ_BIN_7 +228 0x0B0C //RX_FDEQ_BIN_8 +229 0x0D0E //RX_FDEQ_BIN_9 +230 0x0E0F //RX_FDEQ_BIN_10 +231 0x0F10 //RX_FDEQ_BIN_11 +232 0x1011 //RX_FDEQ_BIN_12 +233 0x1112 //RX_FDEQ_BIN_13 +234 0x0000 //RX_FDEQ_BIN_14 +235 0x0000 //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x4000 //RX_FDEQ_RESRV_0 +245 0x0320 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0030 //RX_FDDRC_BAND_MARGIN_1 +248 0x0050 //RX_FDDRC_BAND_MARGIN_2 +249 0x0080 //RX_FDDRC_BAND_MARGIN_3 +250 0x0007 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x5000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x6400 //RX_FDDRC_THRD_3_2 +258 0x6400 //RX_FDDRC_THRD_3_3 +259 0x2000 //RX_FDDRC_SLANT_0_0 +260 0x2000 //RX_FDDRC_SLANT_0_1 +261 0x2000 //RX_FDDRC_SLANT_0_2 +262 0x2000 //RX_FDDRC_SLANT_0_3 +263 0x5333 //RX_FDDRC_SLANT_1_0 +264 0x5333 //RX_FDDRC_SLANT_1_1 +265 0x5333 //RX_FDDRC_SLANT_1_2 +266 0x5333 //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +286 0x0100 //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 +#VOL 6 +163 0x1000 //RX_TDDRC_ALPHA_UP_1 +164 0x1000 //RX_TDDRC_ALPHA_UP_2 +165 0x1000 //RX_TDDRC_ALPHA_UP_3 +166 0x1000 //RX_TDDRC_ALPHA_UP_4 +184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +190 0x7FFF //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +269 0x0000 //RX_TDDRC_THRD_0 +270 0x0000 //RX_TDDRC_THRD_1 +271 0x7FFF //RX_TDDRC_THRD_2 +272 0x7FFF //RX_TDDRC_THRD_3 +273 0x7E70 //RX_TDDRC_SLANT_0 +274 0x7FFF //RX_TDDRC_SLANT_1 +275 0x1000 //RX_TDDRC_ALPHA_UP_0 +276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x199A //RX_TDDRC_HMNC_GAIN +279 0x0001 //RX_TDDRC_SMT_FLAG +280 0x0CCD //RX_TDDRC_SMT_W +281 0x0155 //RX_TDDRC_DRC_GAIN +195 0x001C //RX_FDEQ_SUBNUM +196 0x4848 //RX_FDEQ_GAIN_0 +197 0x4848 //RX_FDEQ_GAIN_1 +198 0x4848 //RX_FDEQ_GAIN_2 +199 0x4848 //RX_FDEQ_GAIN_3 +200 0x4848 //RX_FDEQ_GAIN_4 +201 0x4848 //RX_FDEQ_GAIN_5 +202 0x4848 //RX_FDEQ_GAIN_6 +203 0x4848 //RX_FDEQ_GAIN_7 +204 0x4848 //RX_FDEQ_GAIN_8 +205 0x3C3C //RX_FDEQ_GAIN_9 +206 0x3C3C //RX_FDEQ_GAIN_10 +207 0x3838 //RX_FDEQ_GAIN_11 +208 0x3838 //RX_FDEQ_GAIN_12 +209 0x3030 //RX_FDEQ_GAIN_13 +210 0x4848 //RX_FDEQ_GAIN_14 +211 0x4848 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0202 //RX_FDEQ_BIN_0 +221 0x0203 //RX_FDEQ_BIN_1 +222 0x0303 //RX_FDEQ_BIN_2 +223 0x0304 //RX_FDEQ_BIN_3 +224 0x0405 //RX_FDEQ_BIN_4 +225 0x0506 //RX_FDEQ_BIN_5 +226 0x0708 //RX_FDEQ_BIN_6 +227 0x090A //RX_FDEQ_BIN_7 +228 0x0B0C //RX_FDEQ_BIN_8 +229 0x0D0E //RX_FDEQ_BIN_9 +230 0x0E0F //RX_FDEQ_BIN_10 +231 0x0F10 //RX_FDEQ_BIN_11 +232 0x1011 //RX_FDEQ_BIN_12 +233 0x1112 //RX_FDEQ_BIN_13 +234 0x0000 //RX_FDEQ_BIN_14 +235 0x0000 //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x4000 //RX_FDEQ_RESRV_0 +245 0x0320 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0030 //RX_FDDRC_BAND_MARGIN_1 +248 0x0050 //RX_FDDRC_BAND_MARGIN_2 +249 0x0080 //RX_FDDRC_BAND_MARGIN_3 +250 0x0007 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x5000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x6400 //RX_FDDRC_THRD_3_2 +258 0x6400 //RX_FDDRC_THRD_3_3 +259 0x2000 //RX_FDDRC_SLANT_0_0 +260 0x2000 //RX_FDDRC_SLANT_0_1 +261 0x2000 //RX_FDDRC_SLANT_0_2 +262 0x2000 //RX_FDDRC_SLANT_0_3 +263 0x5333 //RX_FDDRC_SLANT_1_0 +264 0x5333 //RX_FDDRC_SLANT_1_1 +265 0x5333 //RX_FDDRC_SLANT_1_2 +266 0x5333 //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +286 0x0100 //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 #CASE_NAME BLUETOOTH-BTNB_NREC-VOICE_GENERIC-SWB -#PARAM_TYPE TX+RX -#TOTAL_CUSTOM_STEP 7 +#PARAM_MODE Full +#PARAM_TYPE TX+2RX +#TOTAL_CUSTOM_STEP 7+7 #TX 0 0x0001 //TX_OPERATION_MODE_0 1 0x0001 //TX_OPERATION_MODE_1 @@ -19541,20 +29629,20 @@ 248 0xF400 //TX_THR_SN_EST_6 249 0xF600 //TX_THR_SN_EST_7 250 0x0000 //TX_DELTA_THR_SN_EST_0 -251 0x0000 //TX_DELTA_THR_SN_EST_1 +251 0x0200 //TX_DELTA_THR_SN_EST_1 252 0x0200 //TX_DELTA_THR_SN_EST_2 253 0x0200 //TX_DELTA_THR_SN_EST_3 254 0x0200 //TX_DELTA_THR_SN_EST_4 255 0x0200 //TX_DELTA_THR_SN_EST_5 -256 0x0200 //TX_DELTA_THR_SN_EST_6 +256 0x0000 //TX_DELTA_THR_SN_EST_6 257 0x0200 //TX_DELTA_THR_SN_EST_7 258 0x6000 //TX_LAMBDA_NN_EST_0 -259 0x6000 //TX_LAMBDA_NN_EST_1 +259 0x4000 //TX_LAMBDA_NN_EST_1 260 0x4000 //TX_LAMBDA_NN_EST_2 261 0x4000 //TX_LAMBDA_NN_EST_3 262 0x4000 //TX_LAMBDA_NN_EST_4 263 0x4000 //TX_LAMBDA_NN_EST_5 -264 0x4000 //TX_LAMBDA_NN_EST_6 +264 0x6000 //TX_LAMBDA_NN_EST_6 265 0x4000 //TX_LAMBDA_NN_EST_7 266 0x0400 //TX_N_SN_EST 267 0x001E //TX_INBEAM_T @@ -19572,16 +29660,16 @@ 279 0x1000 //TX_B_POST_FLT_0 280 0x1000 //TX_B_POST_FLT_1 281 0x000B //TX_NS_LVL_CTRL_0 -282 0x000F //TX_NS_LVL_CTRL_1 -283 0x0011 //TX_NS_LVL_CTRL_2 +282 0x0011 //TX_NS_LVL_CTRL_1 +283 0x000F //TX_NS_LVL_CTRL_2 284 0x000F //TX_NS_LVL_CTRL_3 285 0x000F //TX_NS_LVL_CTRL_4 286 0x000F //TX_NS_LVL_CTRL_5 287 0x000F //TX_NS_LVL_CTRL_6 288 0x0011 //TX_NS_LVL_CTRL_7 289 0x000C //TX_MIN_GAIN_S_0 -290 0x000C //TX_MIN_GAIN_S_1 -291 0x000F //TX_MIN_GAIN_S_2 +290 0x000F //TX_MIN_GAIN_S_1 +291 0x000C //TX_MIN_GAIN_S_2 292 0x000C //TX_MIN_GAIN_S_3 293 0x000C //TX_MIN_GAIN_S_4 294 0x000C //TX_MIN_GAIN_S_5 @@ -19605,12 +29693,12 @@ 312 0x7FFF //TX_A_POST_FILT_0 313 0x2000 //TX_A_POST_FILT_1 314 0x2000 //TX_A_POST_FILT_S_0 -315 0x4000 //TX_A_POST_FILT_S_1 +315 0x5000 //TX_A_POST_FILT_S_1 316 0x5000 //TX_A_POST_FILT_S_2 317 0x5000 //TX_A_POST_FILT_S_3 318 0x5000 //TX_A_POST_FILT_S_4 319 0x5000 //TX_A_POST_FILT_S_5 -320 0x5000 //TX_A_POST_FILT_S_6 +320 0x4000 //TX_A_POST_FILT_S_6 321 0x5000 //TX_A_POST_FILT_S_7 322 0x1000 //TX_B_POST_FILT_0 323 0x1000 //TX_B_POST_FILT_1 @@ -19670,10 +29758,10 @@ 377 0x7FFF //TX_NOISE_TH_5_4 378 0x044C //TX_NOISE_TH_6 379 0x0014 //TX_MINENOISE_TH -380 0x4000 //TX_MINENOISE_MIC0_TH_MTS -381 0xFFEE //TX_MINENOISE_MIC0_TH_EXP -382 0x6000 //TX_MINENOISE_MIC0_S_TH_MTS -383 0xFFF3 //TX_MINENOISE_MIC0_S_TH_EXP +380 0x4000 //TX_MORENS_TFMASK_TH +381 0xFFEE //TX_DRC_QUIET_FLOOR +382 0x6000 //TX_RATIODTL_CUT_TH +383 0xFFF3 //TX_DT_CUT_K1 384 0x0666 //TX_OUT_ENER_S_TH_CLEAN 385 0x0666 //TX_OUT_ENER_S_TH_LESSCLEAN 386 0x0333 //TX_OUT_ENER_S_TH_NOISY @@ -19681,15 +29769,15 @@ 388 0x0333 //TX_OUT_ENER_TH_SPEECH 389 0x2000 //TX_SN_NPB_GAIN 390 0x0000 //TX_NN_NPB_GAIN -391 0x0000 //TX_CSX_ALPHA_0 -392 0x0000 //TX_CSX_ALPHA_1 -393 0x0000 //TX_CSX_ALPHA_2 -394 0x0000 //TX_CSX_ALPHA_3 -395 0x0800 //TX_MU_ARSP_EST -396 0x00C8 //TX_P_OUTBEAM_MIN_TH +391 0x0000 //TX_POST_MASK_SUP_HSNE +392 0x0000 //TX_TAIL_DET_TH +393 0x0000 //TX_B_LESSCUT_RTO_WTA +394 0x0000 //TX_MEL_G_R +395 0x0800 //TX_SUPHIGH_TH +396 0x00C8 //TX_MASK_G_R 397 0x0002 //TX_EXTRA_NS_L -398 0x0800 //TX_EXTRA_NS_A -399 0x0005 //TX_VR_NOISE_FLOOR_TH +398 0x0800 //TX_C_POST_FLT_MASK +399 0x0005 //TX_A_POST_FLT_WNS 400 0x0148 //TX_MIN_G_LOW300HZ 401 0x0002 //TX_MAXLEVEL_CNG 402 0x00B4 //TX_STN_NOISE_TH @@ -19804,16 +29892,16 @@ 511 0x6666 //TX_MIC_TO_BFGAIN 512 0x0000 //TX_MICTOBFGAIN0 513 0x0000 //TX_FASTMUE_TH -514 0x0000 //TX_DERVB_LEN_0 -515 0x0000 //TX_DERVB_LEN_1 -516 0x0000 //TX_RHO_DERVB -517 0x0000 //TX_MIC_INDX_DERVB -518 0x0000 //TX_MU_DERVB -519 0x0000 //TX_DR_RESRV_0 -520 0x0000 //TX_DR_RESRV_1 -521 0x0000 //TX_DR_RESRV_2 -522 0x0000 //TX_DR_RESRV_3 -523 0x0000 //TX_DR_RESRV_4 +514 0x0000 //TX_DEREVERB_LF_MU +515 0x0000 //TX_DEREVERB_HF_MU +516 0x0000 //TX_DEREVERB_DELAY +517 0x0000 //TX_DEREVERB_COEF_LEN +518 0x0000 //TX_DEREVERB_DNR +519 0x0000 //TX_DEREVERB_ALPHA +520 0x0000 //TX_DEREVERB_BETA +521 0x0000 //TX_GSC_RTOL_TH +522 0x0000 //TX_GSC_RTOH_TH +523 0x0000 //TX_WIDE2_MEANHTH 524 0x0000 //TX_DR_RESRV_5 525 0x0000 //TX_DR_RESRV_6 526 0x0000 //TX_DR_RESRV_7 @@ -20187,8 +30275,73 @@ 894 0xC000 //TX_FASTNS_SSA_THHFL 895 0xCCCC //TX_FASTNS_SSA_THLFH 896 0xD999 //TX_FASTNS_SSA_THHFH +897 0x0000 //TX_SENDFUNC_REG_MICMUTE +898 0x0000 //TX_SENDFUNC_REG_MICMUTE1 +899 0x0000 //TX_MICMUTE_RATIO_THR +900 0x0000 //TX_MICMUTE_AMP_THR +901 0x0000 //TX_MICMUTE_HPF_IND +902 0x0000 //TX_MICMUTE_LOG_EYR_TH +903 0x0000 //TX_MICMUTE_CVG_TIME +904 0x0000 //TX_MICMUTE_RELEASE_TIME +905 0x0000 //TX_MIC_VOLUME_MIC0MUTE +906 0x0000 //TX_MICMUTE_EPD_OFFSET_0 +907 0x0000 //TX_MICMUTE_FRQ_AEC_L +908 0x0000 //TX_MICMUTE_EAD_THR +909 0x0000 //TX_MICMUTE_LAMBDA_CB_NLE +910 0x0000 //TX_MICMUTE_LAMBDA_RE_EST +911 0x0000 //TX_DTD_THR1_MICMUTE_0 +912 0x0000 //TX_DTD_THR1_MICMUTE_1 +913 0x0000 //TX_DTD_THR1_MICMUTE_2 +914 0x0000 //TX_DTD_THR1_MICMUTE_3 +915 0x0000 //TX_DTD_THR2_MICMUTE_0 +916 0x0000 //TX_MICMUTE_MIN_EQ_RE_EST_0 +917 0x0000 //TX_MICMUTE_MIN_EQ_RE_EST_1 +918 0x0000 //TX_MICMUTE_MIN_EQ_RE_EST_2 +919 0x0000 //TX_MICMUTE_MIN_EQ_RE_EST_3 +920 0x0000 //TX_MICMUTE_MIN_EQ_RE_EST_4 +921 0x0000 //TX_MICMUTE_C_POST_FLT +922 0x0000 //TX_MICMUTE_DT_CUT_K +923 0x0000 //TX_MICMUTE_DT_CUT_THR +924 0x0000 //TX_MICMUTE_DT_CUT_K2 +925 0x0000 //TX_MICMUTE_DT_CUT_THR2 +926 0x0000 //TX_MICMUTE_DT2_HOLD_N +927 0x0000 //TX_MICMUTE_RATIODTH_THCUT +928 0x0000 //TX_MICMUTE_B_POST_FLT_ECHOL +929 0x0000 //TX_MICMUTE_B_POST_FLT_ECHOH +930 0x0000 //TX_MICMUTE_C_POST_FLT_MASK +931 0x0000 //TX_MICMUTE_RATIODTL_CUT_TH +932 0x0000 //TX_MICMUTE_DT_CUT_K1 +933 0x0000 //TX_MICMUTE_N2_SN_EST +934 0x0000 //TX_MICMUTE_THR_SN_EST_0 +935 0x0000 //TX_MICMUTE_MIN_G_CTRL_0 +936 0x0000 //TX_MICMUTE_A_POST_FILT_S_0 +937 0x0000 //TX_MICMUTE_B_POST_FILT_0 +938 0x0000 //TX_MIC1RUB_AMP_THR +939 0x0000 //TX_MIC1MUTE_RATIO_THR +940 0x0000 //TX_MIC1MUTE_AMP_THR +941 0x0000 //TX_MIC1MUTE_CVG_TIME +942 0x0000 //TX_MIC1MUTE_RELEASE_TIME +943 0x0000 //TX_AMS_RESRV_01 +944 0x0000 //TX_AMS_RESRV_02 +945 0x0000 //TX_AMS_RESRV_03 +946 0x0000 //TX_AMS_RESRV_04 +947 0x0000 //TX_AMS_RESRV_05 +948 0x0000 //TX_AMS_RESRV_06 +949 0x0000 //TX_AMS_RESRV_07 +950 0x0000 //TX_AMS_RESRV_08 +951 0x0000 //TX_AMS_RESRV_09 +952 0x0000 //TX_AMS_RESRV_10 +953 0x0000 //TX_AMS_RESRV_11 +954 0x0000 //TX_AMS_RESRV_12 +955 0x0000 //TX_AMS_RESRV_13 +956 0x0000 //TX_AMS_RESRV_14 +957 0x0000 //TX_AMS_RESRV_15 +958 0x0000 //TX_AMS_RESRV_16 +959 0x0000 //TX_AMS_RESRV_17 +960 0x0000 //TX_AMS_RESRV_18 +961 0x0000 //TX_AMS_RESRV_19 #RX -0 0x0064 //RX_RECVFUNC_MODE_0 +0 0x2064 //RX_RECVFUNC_MODE_0 1 0x0000 //RX_RECVFUNC_MODE_1 2 0x0003 //RX_SAMPLINGFREQ_SIG 3 0x0003 //RX_SAMPLINGFREQ_PROC @@ -21038,10 +31191,862 @@ 110 0x0000 //RX_FDDRC_RESRV_0 129 0x0100 //RX_SPK_VOL 130 0x0000 //RX_VOL_RESRV_0 +#RX 2 +157 0x2064 //RX_RECVFUNC_MODE_0 +158 0x0000 //RX_RECVFUNC_MODE_1 +159 0x0003 //RX_SAMPLINGFREQ_SIG +160 0x0003 //RX_SAMPLINGFREQ_PROC +161 0x000A //RX_FRAME_SZ +162 0x0000 //RX_DELAY_OPT +163 0x3000 //RX_TDDRC_ALPHA_UP_1 +164 0x3000 //RX_TDDRC_ALPHA_UP_2 +165 0x3000 //RX_TDDRC_ALPHA_UP_3 +166 0x3000 //RX_TDDRC_ALPHA_UP_4 +167 0x0800 //RX_PGA +168 0x7FFF //RX_A_HP +169 0x0000 //RX_B_PE +170 0x1800 //RX_THR_PITCH_DET_0 +171 0x1000 //RX_THR_PITCH_DET_1 +172 0x0800 //RX_THR_PITCH_DET_2 +173 0x0008 //RX_PITCH_BFR_LEN +174 0x0003 //RX_SBD_PITCH_DET +175 0x0100 //RX_PP_RESRV_0 +176 0x0020 //RX_PP_RESRV_1 +177 0x0400 //RX_N_SN_EST +178 0x000C //RX_N2_SN_EST +179 0x0003 //RX_NS_LVL_CTRL +180 0x9000 //RX_THR_SN_EST +181 0x7CCD //RX_LAMBDA_PFILT +182 0x000A //RX_FENS_RESRV_0 +183 0x0190 //RX_FENS_RESRV_1 +184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +187 0x0002 //RX_EXTRA_NS_L +188 0x0800 //RX_EXTRA_NS_A +189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +190 0x7FFF //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +192 0x199A //RX_A_POST_FLT +193 0x0000 //RX_LMT_THRD +194 0x4000 //RX_LMT_ALPHA +195 0x0020 //RX_FDEQ_SUBNUM +196 0x4848 //RX_FDEQ_GAIN_0 +197 0x4848 //RX_FDEQ_GAIN_1 +198 0x4848 //RX_FDEQ_GAIN_2 +199 0x4848 //RX_FDEQ_GAIN_3 +200 0x4848 //RX_FDEQ_GAIN_4 +201 0x4848 //RX_FDEQ_GAIN_5 +202 0x4848 //RX_FDEQ_GAIN_6 +203 0x4848 //RX_FDEQ_GAIN_7 +204 0x4848 //RX_FDEQ_GAIN_8 +205 0x4848 //RX_FDEQ_GAIN_9 +206 0x4848 //RX_FDEQ_GAIN_10 +207 0x4848 //RX_FDEQ_GAIN_11 +208 0x4848 //RX_FDEQ_GAIN_12 +209 0x4848 //RX_FDEQ_GAIN_13 +210 0x4848 //RX_FDEQ_GAIN_14 +211 0x4848 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0202 //RX_FDEQ_BIN_0 +221 0x0203 //RX_FDEQ_BIN_1 +222 0x0303 //RX_FDEQ_BIN_2 +223 0x0304 //RX_FDEQ_BIN_3 +224 0x0405 //RX_FDEQ_BIN_4 +225 0x0506 //RX_FDEQ_BIN_5 +226 0x0708 //RX_FDEQ_BIN_6 +227 0x090A //RX_FDEQ_BIN_7 +228 0x0B0C //RX_FDEQ_BIN_8 +229 0x0D0E //RX_FDEQ_BIN_9 +230 0x1013 //RX_FDEQ_BIN_10 +231 0x1719 //RX_FDEQ_BIN_11 +232 0x1B1E //RX_FDEQ_BIN_12 +233 0x1E1E //RX_FDEQ_BIN_13 +234 0x1E28 //RX_FDEQ_BIN_14 +235 0x282C //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x4000 //RX_FDEQ_RESRV_0 +245 0x0320 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0030 //RX_FDDRC_BAND_MARGIN_1 +248 0x0050 //RX_FDDRC_BAND_MARGIN_2 +249 0x0080 //RX_FDDRC_BAND_MARGIN_3 +250 0x0007 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x5000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x6400 //RX_FDDRC_THRD_3_2 +258 0x6400 //RX_FDDRC_THRD_3_3 +259 0x2000 //RX_FDDRC_SLANT_0_0 +260 0x2000 //RX_FDDRC_SLANT_0_1 +261 0x2000 //RX_FDDRC_SLANT_0_2 +262 0x2000 //RX_FDDRC_SLANT_0_3 +263 0x5333 //RX_FDDRC_SLANT_1_0 +264 0x5333 //RX_FDDRC_SLANT_1_1 +265 0x5333 //RX_FDDRC_SLANT_1_2 +266 0x5333 //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +268 0x0000 //RX_FILTINDX +269 0x0000 //RX_TDDRC_THRD_0 +270 0x0000 //RX_TDDRC_THRD_1 +271 0x7FFF //RX_TDDRC_THRD_2 +272 0x7FFF //RX_TDDRC_THRD_3 +273 0x7FFF //RX_TDDRC_SLANT_0 +274 0x7FFF //RX_TDDRC_SLANT_1 +275 0x3000 //RX_TDDRC_ALPHA_UP_0 +276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x199A //RX_TDDRC_HMNC_GAIN +279 0x0001 //RX_TDDRC_SMT_FLAG +280 0x0CCD //RX_TDDRC_SMT_W +281 0x0155 //RX_TDDRC_DRC_GAIN +282 0x7C00 //RX_LAMBDA_PKA_FP +283 0x2000 //RX_TPKA_FP +284 0x2000 //RX_MIN_G_FP +285 0x0080 //RX_MAX_G_FP +286 0x0100 //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 +288 0x0000 //RX_MAXLEVEL_CNG +289 0x3000 //RX_BWE_UV_TH +290 0x3000 //RX_BWE_UV_TH2 +291 0x1800 //RX_BWE_UV_TH3 +292 0x1000 //RX_BWE_V_TH +293 0x04CD //RX_BWE_GAIN1_V_TH1 +294 0x0F33 //RX_BWE_GAIN1_V_TH2 +295 0x7333 //RX_BWE_UV_EQ +296 0x199A //RX_BWE_V_EQ +297 0x7333 //RX_BWE_TONE_TH +298 0x0004 //RX_BWE_UV_HOLD_T +299 0x6CCD //RX_BWE_GAIN2_ALPHA +300 0x799A //RX_BWE_GAIN3_ALPHA +301 0x001E //RX_BWE_CUTOFF +302 0x3000 //RX_BWE_GAINFILL +303 0x3200 //RX_BWE_MAXTH_TONE +304 0x2000 //RX_BWE_EQ_0 +305 0x2000 //RX_BWE_EQ_1 +306 0x2000 //RX_BWE_EQ_2 +307 0x2000 //RX_BWE_EQ_3 +308 0x2000 //RX_BWE_EQ_4 +309 0x2000 //RX_BWE_EQ_5 +310 0x2000 //RX_BWE_EQ_6 +311 0x0000 //RX_BWE_RESRV_0 +312 0x0000 //RX_BWE_RESRV_1 +313 0x0000 //RX_BWE_RESRV_2 +#VOL 0 +163 0x3000 //RX_TDDRC_ALPHA_UP_1 +164 0x3000 //RX_TDDRC_ALPHA_UP_2 +165 0x3000 //RX_TDDRC_ALPHA_UP_3 +166 0x3000 //RX_TDDRC_ALPHA_UP_4 +184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +190 0x7FFF //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +269 0x0000 //RX_TDDRC_THRD_0 +270 0x0000 //RX_TDDRC_THRD_1 +271 0x7FFF //RX_TDDRC_THRD_2 +272 0x7FFF //RX_TDDRC_THRD_3 +273 0x7FFF //RX_TDDRC_SLANT_0 +274 0x7FFF //RX_TDDRC_SLANT_1 +275 0x3000 //RX_TDDRC_ALPHA_UP_0 +276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x199A //RX_TDDRC_HMNC_GAIN +279 0x0001 //RX_TDDRC_SMT_FLAG +280 0x0CCD //RX_TDDRC_SMT_W +281 0x0155 //RX_TDDRC_DRC_GAIN +195 0x0020 //RX_FDEQ_SUBNUM +196 0x4848 //RX_FDEQ_GAIN_0 +197 0x4848 //RX_FDEQ_GAIN_1 +198 0x4848 //RX_FDEQ_GAIN_2 +199 0x4848 //RX_FDEQ_GAIN_3 +200 0x4848 //RX_FDEQ_GAIN_4 +201 0x4848 //RX_FDEQ_GAIN_5 +202 0x4848 //RX_FDEQ_GAIN_6 +203 0x4848 //RX_FDEQ_GAIN_7 +204 0x4848 //RX_FDEQ_GAIN_8 +205 0x4848 //RX_FDEQ_GAIN_9 +206 0x4848 //RX_FDEQ_GAIN_10 +207 0x4848 //RX_FDEQ_GAIN_11 +208 0x4848 //RX_FDEQ_GAIN_12 +209 0x4848 //RX_FDEQ_GAIN_13 +210 0x4848 //RX_FDEQ_GAIN_14 +211 0x4848 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0202 //RX_FDEQ_BIN_0 +221 0x0203 //RX_FDEQ_BIN_1 +222 0x0303 //RX_FDEQ_BIN_2 +223 0x0304 //RX_FDEQ_BIN_3 +224 0x0405 //RX_FDEQ_BIN_4 +225 0x0506 //RX_FDEQ_BIN_5 +226 0x0708 //RX_FDEQ_BIN_6 +227 0x090A //RX_FDEQ_BIN_7 +228 0x0B0C //RX_FDEQ_BIN_8 +229 0x0D0E //RX_FDEQ_BIN_9 +230 0x1013 //RX_FDEQ_BIN_10 +231 0x1719 //RX_FDEQ_BIN_11 +232 0x1B1E //RX_FDEQ_BIN_12 +233 0x1E1E //RX_FDEQ_BIN_13 +234 0x1E28 //RX_FDEQ_BIN_14 +235 0x282C //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x4000 //RX_FDEQ_RESRV_0 +245 0x0320 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0030 //RX_FDDRC_BAND_MARGIN_1 +248 0x0050 //RX_FDDRC_BAND_MARGIN_2 +249 0x0080 //RX_FDDRC_BAND_MARGIN_3 +250 0x0007 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x5000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x6400 //RX_FDDRC_THRD_3_2 +258 0x6400 //RX_FDDRC_THRD_3_3 +259 0x2000 //RX_FDDRC_SLANT_0_0 +260 0x2000 //RX_FDDRC_SLANT_0_1 +261 0x2000 //RX_FDDRC_SLANT_0_2 +262 0x2000 //RX_FDDRC_SLANT_0_3 +263 0x5333 //RX_FDDRC_SLANT_1_0 +264 0x5333 //RX_FDDRC_SLANT_1_1 +265 0x5333 //RX_FDDRC_SLANT_1_2 +266 0x5333 //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +286 0x0100 //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 +#VOL 1 +163 0x3000 //RX_TDDRC_ALPHA_UP_1 +164 0x3000 //RX_TDDRC_ALPHA_UP_2 +165 0x3000 //RX_TDDRC_ALPHA_UP_3 +166 0x3000 //RX_TDDRC_ALPHA_UP_4 +184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +190 0x7FFF //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +269 0x0000 //RX_TDDRC_THRD_0 +270 0x0000 //RX_TDDRC_THRD_1 +271 0x7FFF //RX_TDDRC_THRD_2 +272 0x7FFF //RX_TDDRC_THRD_3 +273 0x7FFF //RX_TDDRC_SLANT_0 +274 0x7FFF //RX_TDDRC_SLANT_1 +275 0x3000 //RX_TDDRC_ALPHA_UP_0 +276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x199A //RX_TDDRC_HMNC_GAIN +279 0x0001 //RX_TDDRC_SMT_FLAG +280 0x0CCD //RX_TDDRC_SMT_W +281 0x0155 //RX_TDDRC_DRC_GAIN +195 0x0020 //RX_FDEQ_SUBNUM +196 0x4848 //RX_FDEQ_GAIN_0 +197 0x4848 //RX_FDEQ_GAIN_1 +198 0x4848 //RX_FDEQ_GAIN_2 +199 0x4848 //RX_FDEQ_GAIN_3 +200 0x4848 //RX_FDEQ_GAIN_4 +201 0x4848 //RX_FDEQ_GAIN_5 +202 0x4848 //RX_FDEQ_GAIN_6 +203 0x4848 //RX_FDEQ_GAIN_7 +204 0x4848 //RX_FDEQ_GAIN_8 +205 0x4848 //RX_FDEQ_GAIN_9 +206 0x4848 //RX_FDEQ_GAIN_10 +207 0x4848 //RX_FDEQ_GAIN_11 +208 0x4848 //RX_FDEQ_GAIN_12 +209 0x4848 //RX_FDEQ_GAIN_13 +210 0x4848 //RX_FDEQ_GAIN_14 +211 0x4848 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0202 //RX_FDEQ_BIN_0 +221 0x0203 //RX_FDEQ_BIN_1 +222 0x0303 //RX_FDEQ_BIN_2 +223 0x0304 //RX_FDEQ_BIN_3 +224 0x0405 //RX_FDEQ_BIN_4 +225 0x0506 //RX_FDEQ_BIN_5 +226 0x0708 //RX_FDEQ_BIN_6 +227 0x090A //RX_FDEQ_BIN_7 +228 0x0B0C //RX_FDEQ_BIN_8 +229 0x0D0E //RX_FDEQ_BIN_9 +230 0x1013 //RX_FDEQ_BIN_10 +231 0x1719 //RX_FDEQ_BIN_11 +232 0x1B1E //RX_FDEQ_BIN_12 +233 0x1E1E //RX_FDEQ_BIN_13 +234 0x1E28 //RX_FDEQ_BIN_14 +235 0x282C //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x4000 //RX_FDEQ_RESRV_0 +245 0x0320 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0030 //RX_FDDRC_BAND_MARGIN_1 +248 0x0050 //RX_FDDRC_BAND_MARGIN_2 +249 0x0080 //RX_FDDRC_BAND_MARGIN_3 +250 0x0007 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x5000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x6400 //RX_FDDRC_THRD_3_2 +258 0x6400 //RX_FDDRC_THRD_3_3 +259 0x2000 //RX_FDDRC_SLANT_0_0 +260 0x2000 //RX_FDDRC_SLANT_0_1 +261 0x2000 //RX_FDDRC_SLANT_0_2 +262 0x2000 //RX_FDDRC_SLANT_0_3 +263 0x5333 //RX_FDDRC_SLANT_1_0 +264 0x5333 //RX_FDDRC_SLANT_1_1 +265 0x5333 //RX_FDDRC_SLANT_1_2 +266 0x5333 //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +286 0x0100 //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 +#VOL 2 +163 0x3000 //RX_TDDRC_ALPHA_UP_1 +164 0x3000 //RX_TDDRC_ALPHA_UP_2 +165 0x3000 //RX_TDDRC_ALPHA_UP_3 +166 0x3000 //RX_TDDRC_ALPHA_UP_4 +184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +190 0x7FFF //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +269 0x0000 //RX_TDDRC_THRD_0 +270 0x0000 //RX_TDDRC_THRD_1 +271 0x7FFF //RX_TDDRC_THRD_2 +272 0x7FFF //RX_TDDRC_THRD_3 +273 0x7FFF //RX_TDDRC_SLANT_0 +274 0x7FFF //RX_TDDRC_SLANT_1 +275 0x3000 //RX_TDDRC_ALPHA_UP_0 +276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x199A //RX_TDDRC_HMNC_GAIN +279 0x0001 //RX_TDDRC_SMT_FLAG +280 0x0CCD //RX_TDDRC_SMT_W +281 0x0155 //RX_TDDRC_DRC_GAIN +195 0x0020 //RX_FDEQ_SUBNUM +196 0x4848 //RX_FDEQ_GAIN_0 +197 0x4848 //RX_FDEQ_GAIN_1 +198 0x4848 //RX_FDEQ_GAIN_2 +199 0x4848 //RX_FDEQ_GAIN_3 +200 0x4848 //RX_FDEQ_GAIN_4 +201 0x4848 //RX_FDEQ_GAIN_5 +202 0x4848 //RX_FDEQ_GAIN_6 +203 0x4848 //RX_FDEQ_GAIN_7 +204 0x4848 //RX_FDEQ_GAIN_8 +205 0x4848 //RX_FDEQ_GAIN_9 +206 0x4848 //RX_FDEQ_GAIN_10 +207 0x4848 //RX_FDEQ_GAIN_11 +208 0x4848 //RX_FDEQ_GAIN_12 +209 0x4848 //RX_FDEQ_GAIN_13 +210 0x4848 //RX_FDEQ_GAIN_14 +211 0x4848 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0202 //RX_FDEQ_BIN_0 +221 0x0203 //RX_FDEQ_BIN_1 +222 0x0303 //RX_FDEQ_BIN_2 +223 0x0304 //RX_FDEQ_BIN_3 +224 0x0405 //RX_FDEQ_BIN_4 +225 0x0506 //RX_FDEQ_BIN_5 +226 0x0708 //RX_FDEQ_BIN_6 +227 0x090A //RX_FDEQ_BIN_7 +228 0x0B0C //RX_FDEQ_BIN_8 +229 0x0D0E //RX_FDEQ_BIN_9 +230 0x1013 //RX_FDEQ_BIN_10 +231 0x1719 //RX_FDEQ_BIN_11 +232 0x1B1E //RX_FDEQ_BIN_12 +233 0x1E1E //RX_FDEQ_BIN_13 +234 0x1E28 //RX_FDEQ_BIN_14 +235 0x282C //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x4000 //RX_FDEQ_RESRV_0 +245 0x0320 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0030 //RX_FDDRC_BAND_MARGIN_1 +248 0x0050 //RX_FDDRC_BAND_MARGIN_2 +249 0x0080 //RX_FDDRC_BAND_MARGIN_3 +250 0x0007 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x5000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x6400 //RX_FDDRC_THRD_3_2 +258 0x6400 //RX_FDDRC_THRD_3_3 +259 0x2000 //RX_FDDRC_SLANT_0_0 +260 0x2000 //RX_FDDRC_SLANT_0_1 +261 0x2000 //RX_FDDRC_SLANT_0_2 +262 0x2000 //RX_FDDRC_SLANT_0_3 +263 0x5333 //RX_FDDRC_SLANT_1_0 +264 0x5333 //RX_FDDRC_SLANT_1_1 +265 0x5333 //RX_FDDRC_SLANT_1_2 +266 0x5333 //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +286 0x0100 //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 +#VOL 3 +163 0x3000 //RX_TDDRC_ALPHA_UP_1 +164 0x3000 //RX_TDDRC_ALPHA_UP_2 +165 0x3000 //RX_TDDRC_ALPHA_UP_3 +166 0x3000 //RX_TDDRC_ALPHA_UP_4 +184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +190 0x7FFF //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +269 0x0000 //RX_TDDRC_THRD_0 +270 0x0000 //RX_TDDRC_THRD_1 +271 0x7FFF //RX_TDDRC_THRD_2 +272 0x7FFF //RX_TDDRC_THRD_3 +273 0x7FFF //RX_TDDRC_SLANT_0 +274 0x7FFF //RX_TDDRC_SLANT_1 +275 0x3000 //RX_TDDRC_ALPHA_UP_0 +276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x199A //RX_TDDRC_HMNC_GAIN +279 0x0001 //RX_TDDRC_SMT_FLAG +280 0x0CCD //RX_TDDRC_SMT_W +281 0x0155 //RX_TDDRC_DRC_GAIN +195 0x0020 //RX_FDEQ_SUBNUM +196 0x4848 //RX_FDEQ_GAIN_0 +197 0x4848 //RX_FDEQ_GAIN_1 +198 0x4848 //RX_FDEQ_GAIN_2 +199 0x4848 //RX_FDEQ_GAIN_3 +200 0x4848 //RX_FDEQ_GAIN_4 +201 0x4848 //RX_FDEQ_GAIN_5 +202 0x4848 //RX_FDEQ_GAIN_6 +203 0x4848 //RX_FDEQ_GAIN_7 +204 0x4848 //RX_FDEQ_GAIN_8 +205 0x4848 //RX_FDEQ_GAIN_9 +206 0x4848 //RX_FDEQ_GAIN_10 +207 0x4848 //RX_FDEQ_GAIN_11 +208 0x4848 //RX_FDEQ_GAIN_12 +209 0x4848 //RX_FDEQ_GAIN_13 +210 0x4848 //RX_FDEQ_GAIN_14 +211 0x4848 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0202 //RX_FDEQ_BIN_0 +221 0x0203 //RX_FDEQ_BIN_1 +222 0x0303 //RX_FDEQ_BIN_2 +223 0x0304 //RX_FDEQ_BIN_3 +224 0x0405 //RX_FDEQ_BIN_4 +225 0x0506 //RX_FDEQ_BIN_5 +226 0x0708 //RX_FDEQ_BIN_6 +227 0x090A //RX_FDEQ_BIN_7 +228 0x0B0C //RX_FDEQ_BIN_8 +229 0x0D0E //RX_FDEQ_BIN_9 +230 0x1013 //RX_FDEQ_BIN_10 +231 0x1719 //RX_FDEQ_BIN_11 +232 0x1B1E //RX_FDEQ_BIN_12 +233 0x1E1E //RX_FDEQ_BIN_13 +234 0x1E28 //RX_FDEQ_BIN_14 +235 0x282C //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x4000 //RX_FDEQ_RESRV_0 +245 0x0320 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0030 //RX_FDDRC_BAND_MARGIN_1 +248 0x0050 //RX_FDDRC_BAND_MARGIN_2 +249 0x0080 //RX_FDDRC_BAND_MARGIN_3 +250 0x0007 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x5000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x6400 //RX_FDDRC_THRD_3_2 +258 0x6400 //RX_FDDRC_THRD_3_3 +259 0x2000 //RX_FDDRC_SLANT_0_0 +260 0x2000 //RX_FDDRC_SLANT_0_1 +261 0x2000 //RX_FDDRC_SLANT_0_2 +262 0x2000 //RX_FDDRC_SLANT_0_3 +263 0x5333 //RX_FDDRC_SLANT_1_0 +264 0x5333 //RX_FDDRC_SLANT_1_1 +265 0x5333 //RX_FDDRC_SLANT_1_2 +266 0x5333 //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +286 0x0100 //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 +#VOL 4 +163 0x3000 //RX_TDDRC_ALPHA_UP_1 +164 0x3000 //RX_TDDRC_ALPHA_UP_2 +165 0x3000 //RX_TDDRC_ALPHA_UP_3 +166 0x3000 //RX_TDDRC_ALPHA_UP_4 +184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +190 0x7FFF //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +269 0x0000 //RX_TDDRC_THRD_0 +270 0x0000 //RX_TDDRC_THRD_1 +271 0x7FFF //RX_TDDRC_THRD_2 +272 0x7FFF //RX_TDDRC_THRD_3 +273 0x7FFF //RX_TDDRC_SLANT_0 +274 0x7FFF //RX_TDDRC_SLANT_1 +275 0x3000 //RX_TDDRC_ALPHA_UP_0 +276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x199A //RX_TDDRC_HMNC_GAIN +279 0x0001 //RX_TDDRC_SMT_FLAG +280 0x0CCD //RX_TDDRC_SMT_W +281 0x0155 //RX_TDDRC_DRC_GAIN +195 0x0020 //RX_FDEQ_SUBNUM +196 0x4848 //RX_FDEQ_GAIN_0 +197 0x4848 //RX_FDEQ_GAIN_1 +198 0x4848 //RX_FDEQ_GAIN_2 +199 0x4848 //RX_FDEQ_GAIN_3 +200 0x4848 //RX_FDEQ_GAIN_4 +201 0x4848 //RX_FDEQ_GAIN_5 +202 0x4848 //RX_FDEQ_GAIN_6 +203 0x4848 //RX_FDEQ_GAIN_7 +204 0x4848 //RX_FDEQ_GAIN_8 +205 0x4848 //RX_FDEQ_GAIN_9 +206 0x4848 //RX_FDEQ_GAIN_10 +207 0x4848 //RX_FDEQ_GAIN_11 +208 0x4848 //RX_FDEQ_GAIN_12 +209 0x4848 //RX_FDEQ_GAIN_13 +210 0x4848 //RX_FDEQ_GAIN_14 +211 0x4848 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0202 //RX_FDEQ_BIN_0 +221 0x0203 //RX_FDEQ_BIN_1 +222 0x0303 //RX_FDEQ_BIN_2 +223 0x0304 //RX_FDEQ_BIN_3 +224 0x0405 //RX_FDEQ_BIN_4 +225 0x0506 //RX_FDEQ_BIN_5 +226 0x0708 //RX_FDEQ_BIN_6 +227 0x090A //RX_FDEQ_BIN_7 +228 0x0B0C //RX_FDEQ_BIN_8 +229 0x0D0E //RX_FDEQ_BIN_9 +230 0x1013 //RX_FDEQ_BIN_10 +231 0x1719 //RX_FDEQ_BIN_11 +232 0x1B1E //RX_FDEQ_BIN_12 +233 0x1E1E //RX_FDEQ_BIN_13 +234 0x1E28 //RX_FDEQ_BIN_14 +235 0x282C //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x4000 //RX_FDEQ_RESRV_0 +245 0x0320 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0030 //RX_FDDRC_BAND_MARGIN_1 +248 0x0050 //RX_FDDRC_BAND_MARGIN_2 +249 0x0080 //RX_FDDRC_BAND_MARGIN_3 +250 0x0007 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x5000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x6400 //RX_FDDRC_THRD_3_2 +258 0x6400 //RX_FDDRC_THRD_3_3 +259 0x2000 //RX_FDDRC_SLANT_0_0 +260 0x2000 //RX_FDDRC_SLANT_0_1 +261 0x2000 //RX_FDDRC_SLANT_0_2 +262 0x2000 //RX_FDDRC_SLANT_0_3 +263 0x5333 //RX_FDDRC_SLANT_1_0 +264 0x5333 //RX_FDDRC_SLANT_1_1 +265 0x5333 //RX_FDDRC_SLANT_1_2 +266 0x5333 //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +286 0x0100 //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 +#VOL 5 +163 0x3000 //RX_TDDRC_ALPHA_UP_1 +164 0x3000 //RX_TDDRC_ALPHA_UP_2 +165 0x3000 //RX_TDDRC_ALPHA_UP_3 +166 0x3000 //RX_TDDRC_ALPHA_UP_4 +184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +190 0x7FFF //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +269 0x0000 //RX_TDDRC_THRD_0 +270 0x0000 //RX_TDDRC_THRD_1 +271 0x7FFF //RX_TDDRC_THRD_2 +272 0x7FFF //RX_TDDRC_THRD_3 +273 0x7FFF //RX_TDDRC_SLANT_0 +274 0x7FFF //RX_TDDRC_SLANT_1 +275 0x3000 //RX_TDDRC_ALPHA_UP_0 +276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x199A //RX_TDDRC_HMNC_GAIN +279 0x0001 //RX_TDDRC_SMT_FLAG +280 0x0CCD //RX_TDDRC_SMT_W +281 0x0155 //RX_TDDRC_DRC_GAIN +195 0x0020 //RX_FDEQ_SUBNUM +196 0x4848 //RX_FDEQ_GAIN_0 +197 0x4848 //RX_FDEQ_GAIN_1 +198 0x4848 //RX_FDEQ_GAIN_2 +199 0x4848 //RX_FDEQ_GAIN_3 +200 0x4848 //RX_FDEQ_GAIN_4 +201 0x4848 //RX_FDEQ_GAIN_5 +202 0x4848 //RX_FDEQ_GAIN_6 +203 0x4848 //RX_FDEQ_GAIN_7 +204 0x4848 //RX_FDEQ_GAIN_8 +205 0x4848 //RX_FDEQ_GAIN_9 +206 0x4848 //RX_FDEQ_GAIN_10 +207 0x4848 //RX_FDEQ_GAIN_11 +208 0x4848 //RX_FDEQ_GAIN_12 +209 0x4848 //RX_FDEQ_GAIN_13 +210 0x4848 //RX_FDEQ_GAIN_14 +211 0x4848 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0202 //RX_FDEQ_BIN_0 +221 0x0203 //RX_FDEQ_BIN_1 +222 0x0303 //RX_FDEQ_BIN_2 +223 0x0304 //RX_FDEQ_BIN_3 +224 0x0405 //RX_FDEQ_BIN_4 +225 0x0506 //RX_FDEQ_BIN_5 +226 0x0708 //RX_FDEQ_BIN_6 +227 0x090A //RX_FDEQ_BIN_7 +228 0x0B0C //RX_FDEQ_BIN_8 +229 0x0D0E //RX_FDEQ_BIN_9 +230 0x1013 //RX_FDEQ_BIN_10 +231 0x1719 //RX_FDEQ_BIN_11 +232 0x1B1E //RX_FDEQ_BIN_12 +233 0x1E1E //RX_FDEQ_BIN_13 +234 0x1E28 //RX_FDEQ_BIN_14 +235 0x282C //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x4000 //RX_FDEQ_RESRV_0 +245 0x0320 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0030 //RX_FDDRC_BAND_MARGIN_1 +248 0x0050 //RX_FDDRC_BAND_MARGIN_2 +249 0x0080 //RX_FDDRC_BAND_MARGIN_3 +250 0x0007 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x5000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x6400 //RX_FDDRC_THRD_3_2 +258 0x6400 //RX_FDDRC_THRD_3_3 +259 0x2000 //RX_FDDRC_SLANT_0_0 +260 0x2000 //RX_FDDRC_SLANT_0_1 +261 0x2000 //RX_FDDRC_SLANT_0_2 +262 0x2000 //RX_FDDRC_SLANT_0_3 +263 0x5333 //RX_FDDRC_SLANT_1_0 +264 0x5333 //RX_FDDRC_SLANT_1_1 +265 0x5333 //RX_FDDRC_SLANT_1_2 +266 0x5333 //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +286 0x0100 //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 +#VOL 6 +163 0x3000 //RX_TDDRC_ALPHA_UP_1 +164 0x3000 //RX_TDDRC_ALPHA_UP_2 +165 0x3000 //RX_TDDRC_ALPHA_UP_3 +166 0x3000 //RX_TDDRC_ALPHA_UP_4 +184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +190 0x7FFF //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +269 0x0000 //RX_TDDRC_THRD_0 +270 0x0000 //RX_TDDRC_THRD_1 +271 0x7FFF //RX_TDDRC_THRD_2 +272 0x7FFF //RX_TDDRC_THRD_3 +273 0x7FFF //RX_TDDRC_SLANT_0 +274 0x7FFF //RX_TDDRC_SLANT_1 +275 0x3000 //RX_TDDRC_ALPHA_UP_0 +276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x199A //RX_TDDRC_HMNC_GAIN +279 0x0001 //RX_TDDRC_SMT_FLAG +280 0x0CCD //RX_TDDRC_SMT_W +281 0x0155 //RX_TDDRC_DRC_GAIN +195 0x0020 //RX_FDEQ_SUBNUM +196 0x4848 //RX_FDEQ_GAIN_0 +197 0x4848 //RX_FDEQ_GAIN_1 +198 0x4848 //RX_FDEQ_GAIN_2 +199 0x4848 //RX_FDEQ_GAIN_3 +200 0x4848 //RX_FDEQ_GAIN_4 +201 0x4848 //RX_FDEQ_GAIN_5 +202 0x4848 //RX_FDEQ_GAIN_6 +203 0x4848 //RX_FDEQ_GAIN_7 +204 0x4848 //RX_FDEQ_GAIN_8 +205 0x4848 //RX_FDEQ_GAIN_9 +206 0x4848 //RX_FDEQ_GAIN_10 +207 0x4848 //RX_FDEQ_GAIN_11 +208 0x4848 //RX_FDEQ_GAIN_12 +209 0x4848 //RX_FDEQ_GAIN_13 +210 0x4848 //RX_FDEQ_GAIN_14 +211 0x4848 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0202 //RX_FDEQ_BIN_0 +221 0x0203 //RX_FDEQ_BIN_1 +222 0x0303 //RX_FDEQ_BIN_2 +223 0x0304 //RX_FDEQ_BIN_3 +224 0x0405 //RX_FDEQ_BIN_4 +225 0x0506 //RX_FDEQ_BIN_5 +226 0x0708 //RX_FDEQ_BIN_6 +227 0x090A //RX_FDEQ_BIN_7 +228 0x0B0C //RX_FDEQ_BIN_8 +229 0x0D0E //RX_FDEQ_BIN_9 +230 0x1013 //RX_FDEQ_BIN_10 +231 0x1719 //RX_FDEQ_BIN_11 +232 0x1B1E //RX_FDEQ_BIN_12 +233 0x1E1E //RX_FDEQ_BIN_13 +234 0x1E28 //RX_FDEQ_BIN_14 +235 0x282C //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x4000 //RX_FDEQ_RESRV_0 +245 0x0320 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0030 //RX_FDDRC_BAND_MARGIN_1 +248 0x0050 //RX_FDDRC_BAND_MARGIN_2 +249 0x0080 //RX_FDDRC_BAND_MARGIN_3 +250 0x0007 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x5000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x6400 //RX_FDDRC_THRD_3_2 +258 0x6400 //RX_FDDRC_THRD_3_3 +259 0x2000 //RX_FDDRC_SLANT_0_0 +260 0x2000 //RX_FDDRC_SLANT_0_1 +261 0x2000 //RX_FDDRC_SLANT_0_2 +262 0x2000 //RX_FDDRC_SLANT_0_3 +263 0x5333 //RX_FDDRC_SLANT_1_0 +264 0x5333 //RX_FDDRC_SLANT_1_1 +265 0x5333 //RX_FDDRC_SLANT_1_2 +266 0x5333 //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +286 0x0100 //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 #CASE_NAME BLUETOOTH-BTNB_NREC-VOICE_GENERIC-FB -#PARAM_TYPE TX+RX -#TOTAL_CUSTOM_STEP 7 +#PARAM_MODE Full +#PARAM_TYPE TX+2RX +#TOTAL_CUSTOM_STEP 7+7 #TX 0 0x0009 //TX_OPERATION_MODE_0 1 0x0009 //TX_OPERATION_MODE_1 @@ -21294,10 +32299,10 @@ 248 0xF600 //TX_THR_SN_EST_6 249 0xF600 //TX_THR_SN_EST_7 250 0x0200 //TX_DELTA_THR_SN_EST_0 -251 0x0200 //TX_DELTA_THR_SN_EST_1 -252 0x0400 //TX_DELTA_THR_SN_EST_2 -253 0x0300 //TX_DELTA_THR_SN_EST_3 -254 0x0600 //TX_DELTA_THR_SN_EST_4 +251 0x0400 //TX_DELTA_THR_SN_EST_1 +252 0x0300 //TX_DELTA_THR_SN_EST_2 +253 0x0600 //TX_DELTA_THR_SN_EST_3 +254 0x0200 //TX_DELTA_THR_SN_EST_4 255 0x0200 //TX_DELTA_THR_SN_EST_5 256 0x0200 //TX_DELTA_THR_SN_EST_6 257 0x0200 //TX_DELTA_THR_SN_EST_7 @@ -21325,31 +32330,31 @@ 279 0x2000 //TX_B_POST_FLT_0 280 0x2000 //TX_B_POST_FLT_1 281 0x0012 //TX_NS_LVL_CTRL_0 -282 0x0019 //TX_NS_LVL_CTRL_1 +282 0x0016 //TX_NS_LVL_CTRL_1 283 0x0016 //TX_NS_LVL_CTRL_2 -284 0x0016 //TX_NS_LVL_CTRL_3 -285 0x0019 //TX_NS_LVL_CTRL_4 +284 0x0019 //TX_NS_LVL_CTRL_3 +285 0x0010 //TX_NS_LVL_CTRL_4 286 0x0010 //TX_NS_LVL_CTRL_5 -287 0x0010 //TX_NS_LVL_CTRL_6 +287 0x0019 //TX_NS_LVL_CTRL_6 288 0x0010 //TX_NS_LVL_CTRL_7 289 0x000C //TX_MIN_GAIN_S_0 -290 0x0011 //TX_MIN_GAIN_S_1 +290 0x000C //TX_MIN_GAIN_S_1 291 0x000C //TX_MIN_GAIN_S_2 -292 0x000C //TX_MIN_GAIN_S_3 -293 0x000F //TX_MIN_GAIN_S_4 +292 0x000F //TX_MIN_GAIN_S_3 +293 0x000C //TX_MIN_GAIN_S_4 294 0x000C //TX_MIN_GAIN_S_5 -295 0x000C //TX_MIN_GAIN_S_6 +295 0x0011 //TX_MIN_GAIN_S_6 296 0x000C //TX_MIN_GAIN_S_7 297 0x7FFF //TX_NMOS_SUP 298 0x0000 //TX_NS_MAX_PRI_SNR_TH 299 0x0000 //TX_NMOS_SUP_MENSA 300 0x7000 //TX_SNRI_SUP_0 -301 0x6000 //TX_SNRI_SUP_1 +301 0x7000 //TX_SNRI_SUP_1 302 0x7000 //TX_SNRI_SUP_2 -303 0x7000 //TX_SNRI_SUP_3 -304 0x6000 //TX_SNRI_SUP_4 +303 0x6000 //TX_SNRI_SUP_3 +304 0x7FFF //TX_SNRI_SUP_4 305 0x7FFF //TX_SNRI_SUP_5 -306 0x7FFF //TX_SNRI_SUP_6 +306 0x6000 //TX_SNRI_SUP_6 307 0x7FFF //TX_SNRI_SUP_7 308 0x7FFF //TX_THR_LFNS 309 0x0016 //TX_G_LFNS @@ -21366,8 +32371,8 @@ 320 0x6000 //TX_A_POST_FILT_S_6 321 0x6000 //TX_A_POST_FILT_S_7 322 0x2000 //TX_B_POST_FILT_0 -323 0x2000 //TX_B_POST_FILT_1 -324 0x4000 //TX_B_POST_FILT_2 +323 0x4000 //TX_B_POST_FILT_1 +324 0x2000 //TX_B_POST_FILT_2 325 0x2000 //TX_B_POST_FILT_3 326 0x2000 //TX_B_POST_FILT_4 327 0x2000 //TX_B_POST_FILT_5 @@ -21423,10 +32428,10 @@ 377 0x0000 //TX_NOISE_TH_5_4 378 0x02BC //TX_NOISE_TH_6 379 0x0020 //TX_MINENOISE_TH -380 0x4000 //TX_MINENOISE_MIC0_TH_MTS -381 0xFFEE //TX_MINENOISE_MIC0_TH_EXP -382 0x6000 //TX_MINENOISE_MIC0_S_TH_MTS -383 0xFFF3 //TX_MINENOISE_MIC0_S_TH_EXP +380 0x4000 //TX_MORENS_TFMASK_TH +381 0xFFEE //TX_DRC_QUIET_FLOOR +382 0x6000 //TX_RATIODTL_CUT_TH +383 0xFFF3 //TX_DT_CUT_K1 384 0x0666 //TX_OUT_ENER_S_TH_CLEAN 385 0x0666 //TX_OUT_ENER_S_TH_LESSCLEAN 386 0x0333 //TX_OUT_ENER_S_TH_NOISY @@ -21434,15 +32439,15 @@ 388 0x0333 //TX_OUT_ENER_TH_SPEECH 389 0x2000 //TX_SN_NPB_GAIN 390 0x0000 //TX_NN_NPB_GAIN -391 0x0000 //TX_CSX_ALPHA_0 -392 0x0000 //TX_CSX_ALPHA_1 -393 0x0000 //TX_CSX_ALPHA_2 -394 0x0000 //TX_CSX_ALPHA_3 -395 0x0800 //TX_MU_ARSP_EST -396 0x00C8 //TX_P_OUTBEAM_MIN_TH +391 0x0000 //TX_POST_MASK_SUP_HSNE +392 0x0000 //TX_TAIL_DET_TH +393 0x0000 //TX_B_LESSCUT_RTO_WTA +394 0x0000 //TX_MEL_G_R +395 0x0800 //TX_SUPHIGH_TH +396 0x00C8 //TX_MASK_G_R 397 0x0002 //TX_EXTRA_NS_L -398 0x0800 //TX_EXTRA_NS_A -399 0x0005 //TX_VR_NOISE_FLOOR_TH +398 0x0800 //TX_C_POST_FLT_MASK +399 0x0005 //TX_A_POST_FLT_WNS 400 0x0148 //TX_MIN_G_LOW300HZ 401 0x0002 //TX_MAXLEVEL_CNG 402 0x00B4 //TX_STN_NOISE_TH @@ -21557,16 +32562,16 @@ 511 0x6666 //TX_MIC_TO_BFGAIN 512 0x0000 //TX_MICTOBFGAIN0 513 0x0000 //TX_FASTMUE_TH -514 0x0000 //TX_DERVB_LEN_0 -515 0x0000 //TX_DERVB_LEN_1 -516 0x0000 //TX_RHO_DERVB -517 0x0000 //TX_MIC_INDX_DERVB -518 0x0000 //TX_MU_DERVB -519 0x0000 //TX_DR_RESRV_0 -520 0x0000 //TX_DR_RESRV_1 -521 0x0000 //TX_DR_RESRV_2 -522 0x0000 //TX_DR_RESRV_3 -523 0x0000 //TX_DR_RESRV_4 +514 0x0000 //TX_DEREVERB_LF_MU +515 0x0000 //TX_DEREVERB_HF_MU +516 0x0000 //TX_DEREVERB_DELAY +517 0x0000 //TX_DEREVERB_COEF_LEN +518 0x0000 //TX_DEREVERB_DNR +519 0x0000 //TX_DEREVERB_ALPHA +520 0x0000 //TX_DEREVERB_BETA +521 0x0000 //TX_GSC_RTOL_TH +522 0x0000 //TX_GSC_RTOH_TH +523 0x0000 //TX_WIDE2_MEANHTH 524 0x0000 //TX_DR_RESRV_5 525 0x0000 //TX_DR_RESRV_6 526 0x0000 //TX_DR_RESRV_7 @@ -21940,8 +32945,73 @@ 894 0xC000 //TX_FASTNS_SSA_THHFL 895 0xCCCC //TX_FASTNS_SSA_THLFH 896 0xD999 //TX_FASTNS_SSA_THHFH +897 0x0000 //TX_SENDFUNC_REG_MICMUTE +898 0x0000 //TX_SENDFUNC_REG_MICMUTE1 +899 0x0000 //TX_MICMUTE_RATIO_THR +900 0x0000 //TX_MICMUTE_AMP_THR +901 0x0000 //TX_MICMUTE_HPF_IND +902 0x0000 //TX_MICMUTE_LOG_EYR_TH +903 0x0000 //TX_MICMUTE_CVG_TIME +904 0x0000 //TX_MICMUTE_RELEASE_TIME +905 0x0000 //TX_MIC_VOLUME_MIC0MUTE +906 0x0000 //TX_MICMUTE_EPD_OFFSET_0 +907 0x0000 //TX_MICMUTE_FRQ_AEC_L +908 0x0000 //TX_MICMUTE_EAD_THR +909 0x0000 //TX_MICMUTE_LAMBDA_CB_NLE +910 0x0000 //TX_MICMUTE_LAMBDA_RE_EST +911 0x0000 //TX_DTD_THR1_MICMUTE_0 +912 0x0000 //TX_DTD_THR1_MICMUTE_1 +913 0x0000 //TX_DTD_THR1_MICMUTE_2 +914 0x0000 //TX_DTD_THR1_MICMUTE_3 +915 0x0000 //TX_DTD_THR2_MICMUTE_0 +916 0x0000 //TX_MICMUTE_MIN_EQ_RE_EST_0 +917 0x0000 //TX_MICMUTE_MIN_EQ_RE_EST_1 +918 0x0000 //TX_MICMUTE_MIN_EQ_RE_EST_2 +919 0x0000 //TX_MICMUTE_MIN_EQ_RE_EST_3 +920 0x0000 //TX_MICMUTE_MIN_EQ_RE_EST_4 +921 0x0000 //TX_MICMUTE_C_POST_FLT +922 0x0000 //TX_MICMUTE_DT_CUT_K +923 0x0000 //TX_MICMUTE_DT_CUT_THR +924 0x0000 //TX_MICMUTE_DT_CUT_K2 +925 0x0000 //TX_MICMUTE_DT_CUT_THR2 +926 0x0000 //TX_MICMUTE_DT2_HOLD_N +927 0x0000 //TX_MICMUTE_RATIODTH_THCUT +928 0x0000 //TX_MICMUTE_B_POST_FLT_ECHOL +929 0x0000 //TX_MICMUTE_B_POST_FLT_ECHOH +930 0x0000 //TX_MICMUTE_C_POST_FLT_MASK +931 0x0000 //TX_MICMUTE_RATIODTL_CUT_TH +932 0x0000 //TX_MICMUTE_DT_CUT_K1 +933 0x0000 //TX_MICMUTE_N2_SN_EST +934 0x0000 //TX_MICMUTE_THR_SN_EST_0 +935 0x0000 //TX_MICMUTE_MIN_G_CTRL_0 +936 0x0000 //TX_MICMUTE_A_POST_FILT_S_0 +937 0x0000 //TX_MICMUTE_B_POST_FILT_0 +938 0x0000 //TX_MIC1RUB_AMP_THR +939 0x0000 //TX_MIC1MUTE_RATIO_THR +940 0x0000 //TX_MIC1MUTE_AMP_THR +941 0x0000 //TX_MIC1MUTE_CVG_TIME +942 0x0000 //TX_MIC1MUTE_RELEASE_TIME +943 0x0000 //TX_AMS_RESRV_01 +944 0x0000 //TX_AMS_RESRV_02 +945 0x0000 //TX_AMS_RESRV_03 +946 0x0000 //TX_AMS_RESRV_04 +947 0x0000 //TX_AMS_RESRV_05 +948 0x0000 //TX_AMS_RESRV_06 +949 0x0000 //TX_AMS_RESRV_07 +950 0x0000 //TX_AMS_RESRV_08 +951 0x0000 //TX_AMS_RESRV_09 +952 0x0000 //TX_AMS_RESRV_10 +953 0x0000 //TX_AMS_RESRV_11 +954 0x0000 //TX_AMS_RESRV_12 +955 0x0000 //TX_AMS_RESRV_13 +956 0x0000 //TX_AMS_RESRV_14 +957 0x0000 //TX_AMS_RESRV_15 +958 0x0000 //TX_AMS_RESRV_16 +959 0x0000 //TX_AMS_RESRV_17 +960 0x0000 //TX_AMS_RESRV_18 +961 0x0000 //TX_AMS_RESRV_19 #RX -0 0x0064 //RX_RECVFUNC_MODE_0 +0 0x2064 //RX_RECVFUNC_MODE_0 1 0x0000 //RX_RECVFUNC_MODE_1 2 0x0004 //RX_SAMPLINGFREQ_SIG 3 0x0004 //RX_SAMPLINGFREQ_PROC @@ -22791,10 +33861,862 @@ 110 0x0000 //RX_FDDRC_RESRV_0 129 0x0100 //RX_SPK_VOL 130 0x0000 //RX_VOL_RESRV_0 +#RX 2 +157 0x0064 //RX_RECVFUNC_MODE_0 +158 0x0000 //RX_RECVFUNC_MODE_1 +159 0x0004 //RX_SAMPLINGFREQ_SIG +160 0x0004 //RX_SAMPLINGFREQ_PROC +161 0x000A //RX_FRAME_SZ +162 0x0000 //RX_DELAY_OPT +163 0x1000 //RX_TDDRC_ALPHA_UP_1 +164 0x1000 //RX_TDDRC_ALPHA_UP_2 +165 0x1000 //RX_TDDRC_ALPHA_UP_3 +166 0x1000 //RX_TDDRC_ALPHA_UP_4 +167 0x0800 //RX_PGA +168 0x7FFF //RX_A_HP +169 0x4000 //RX_B_PE +170 0x7800 //RX_THR_PITCH_DET_0 +171 0x7000 //RX_THR_PITCH_DET_1 +172 0x6000 //RX_THR_PITCH_DET_2 +173 0x0008 //RX_PITCH_BFR_LEN +174 0x0003 //RX_SBD_PITCH_DET +175 0x0100 //RX_PP_RESRV_0 +176 0x0020 //RX_PP_RESRV_1 +177 0x0500 //RX_N_SN_EST +178 0x000C //RX_N2_SN_EST +179 0x000A //RX_NS_LVL_CTRL +180 0xF600 //RX_THR_SN_EST +181 0x7000 //RX_LAMBDA_PFILT +182 0x000A //RX_FENS_RESRV_0 +183 0x0190 //RX_FENS_RESRV_1 +184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +187 0x0002 //RX_EXTRA_NS_L +188 0x0800 //RX_EXTRA_NS_A +189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +190 0x7FFF //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +192 0x199A //RX_A_POST_FLT +193 0x0000 //RX_LMT_THRD +194 0x4000 //RX_LMT_ALPHA +195 0x0020 //RX_FDEQ_SUBNUM +196 0x4848 //RX_FDEQ_GAIN_0 +197 0x4848 //RX_FDEQ_GAIN_1 +198 0x4848 //RX_FDEQ_GAIN_2 +199 0x4848 //RX_FDEQ_GAIN_3 +200 0x4848 //RX_FDEQ_GAIN_4 +201 0x4848 //RX_FDEQ_GAIN_5 +202 0x4848 //RX_FDEQ_GAIN_6 +203 0x4848 //RX_FDEQ_GAIN_7 +204 0x4848 //RX_FDEQ_GAIN_8 +205 0x4848 //RX_FDEQ_GAIN_9 +206 0x4848 //RX_FDEQ_GAIN_10 +207 0x4848 //RX_FDEQ_GAIN_11 +208 0x4848 //RX_FDEQ_GAIN_12 +209 0x4848 //RX_FDEQ_GAIN_13 +210 0x4848 //RX_FDEQ_GAIN_14 +211 0x4848 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0202 //RX_FDEQ_BIN_0 +221 0x0203 //RX_FDEQ_BIN_1 +222 0x0304 //RX_FDEQ_BIN_2 +223 0x0405 //RX_FDEQ_BIN_3 +224 0x0607 //RX_FDEQ_BIN_4 +225 0x0809 //RX_FDEQ_BIN_5 +226 0x0A0B //RX_FDEQ_BIN_6 +227 0x0C0D //RX_FDEQ_BIN_7 +228 0x0E0F //RX_FDEQ_BIN_8 +229 0x1011 //RX_FDEQ_BIN_9 +230 0x1214 //RX_FDEQ_BIN_10 +231 0x1618 //RX_FDEQ_BIN_11 +232 0x1C1C //RX_FDEQ_BIN_12 +233 0x2020 //RX_FDEQ_BIN_13 +234 0x2020 //RX_FDEQ_BIN_14 +235 0x2011 //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x4000 //RX_FDEQ_RESRV_0 +245 0x0320 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0030 //RX_FDDRC_BAND_MARGIN_1 +248 0x0050 //RX_FDDRC_BAND_MARGIN_2 +249 0x0080 //RX_FDDRC_BAND_MARGIN_3 +250 0x0007 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x5000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x6400 //RX_FDDRC_THRD_3_2 +258 0x6400 //RX_FDDRC_THRD_3_3 +259 0x2000 //RX_FDDRC_SLANT_0_0 +260 0x2000 //RX_FDDRC_SLANT_0_1 +261 0x2000 //RX_FDDRC_SLANT_0_2 +262 0x2000 //RX_FDDRC_SLANT_0_3 +263 0x5333 //RX_FDDRC_SLANT_1_0 +264 0x5333 //RX_FDDRC_SLANT_1_1 +265 0x5333 //RX_FDDRC_SLANT_1_2 +266 0x5333 //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +268 0x0000 //RX_FILTINDX +269 0x0000 //RX_TDDRC_THRD_0 +270 0x0000 //RX_TDDRC_THRD_1 +271 0x7FFF //RX_TDDRC_THRD_2 +272 0x7FFF //RX_TDDRC_THRD_3 +273 0x7FFF //RX_TDDRC_SLANT_0 +274 0x7FFF //RX_TDDRC_SLANT_1 +275 0x1000 //RX_TDDRC_ALPHA_UP_0 +276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x199A //RX_TDDRC_HMNC_GAIN +279 0x0001 //RX_TDDRC_SMT_FLAG +280 0x0CCD //RX_TDDRC_SMT_W +281 0x0155 //RX_TDDRC_DRC_GAIN +282 0x7C00 //RX_LAMBDA_PKA_FP +283 0x2000 //RX_TPKA_FP +284 0x2000 //RX_MIN_G_FP +285 0x0080 //RX_MAX_G_FP +286 0x0100 //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 +288 0x0000 //RX_MAXLEVEL_CNG +289 0x3000 //RX_BWE_UV_TH +290 0x3000 //RX_BWE_UV_TH2 +291 0x1800 //RX_BWE_UV_TH3 +292 0x1000 //RX_BWE_V_TH +293 0x04CD //RX_BWE_GAIN1_V_TH1 +294 0x0F33 //RX_BWE_GAIN1_V_TH2 +295 0x7333 //RX_BWE_UV_EQ +296 0x199A //RX_BWE_V_EQ +297 0x7333 //RX_BWE_TONE_TH +298 0x0004 //RX_BWE_UV_HOLD_T +299 0x6CCD //RX_BWE_GAIN2_ALPHA +300 0x799A //RX_BWE_GAIN3_ALPHA +301 0x001E //RX_BWE_CUTOFF +302 0x3000 //RX_BWE_GAINFILL +303 0x3200 //RX_BWE_MAXTH_TONE +304 0x2000 //RX_BWE_EQ_0 +305 0x2000 //RX_BWE_EQ_1 +306 0x2000 //RX_BWE_EQ_2 +307 0x2000 //RX_BWE_EQ_3 +308 0x2000 //RX_BWE_EQ_4 +309 0x2000 //RX_BWE_EQ_5 +310 0x2000 //RX_BWE_EQ_6 +311 0x0000 //RX_BWE_RESRV_0 +312 0x0000 //RX_BWE_RESRV_1 +313 0x0000 //RX_BWE_RESRV_2 +#VOL 0 +163 0x1000 //RX_TDDRC_ALPHA_UP_1 +164 0x1000 //RX_TDDRC_ALPHA_UP_2 +165 0x1000 //RX_TDDRC_ALPHA_UP_3 +166 0x1000 //RX_TDDRC_ALPHA_UP_4 +184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +190 0x7FFF //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +269 0x0000 //RX_TDDRC_THRD_0 +270 0x0000 //RX_TDDRC_THRD_1 +271 0x7FFF //RX_TDDRC_THRD_2 +272 0x7FFF //RX_TDDRC_THRD_3 +273 0x7FFF //RX_TDDRC_SLANT_0 +274 0x7FFF //RX_TDDRC_SLANT_1 +275 0x1000 //RX_TDDRC_ALPHA_UP_0 +276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x199A //RX_TDDRC_HMNC_GAIN +279 0x0001 //RX_TDDRC_SMT_FLAG +280 0x0CCD //RX_TDDRC_SMT_W +281 0x0155 //RX_TDDRC_DRC_GAIN +195 0x0020 //RX_FDEQ_SUBNUM +196 0x4848 //RX_FDEQ_GAIN_0 +197 0x4848 //RX_FDEQ_GAIN_1 +198 0x4848 //RX_FDEQ_GAIN_2 +199 0x4848 //RX_FDEQ_GAIN_3 +200 0x4848 //RX_FDEQ_GAIN_4 +201 0x4848 //RX_FDEQ_GAIN_5 +202 0x4848 //RX_FDEQ_GAIN_6 +203 0x4848 //RX_FDEQ_GAIN_7 +204 0x4848 //RX_FDEQ_GAIN_8 +205 0x4848 //RX_FDEQ_GAIN_9 +206 0x4848 //RX_FDEQ_GAIN_10 +207 0x4848 //RX_FDEQ_GAIN_11 +208 0x4848 //RX_FDEQ_GAIN_12 +209 0x4848 //RX_FDEQ_GAIN_13 +210 0x4848 //RX_FDEQ_GAIN_14 +211 0x4848 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0202 //RX_FDEQ_BIN_0 +221 0x0203 //RX_FDEQ_BIN_1 +222 0x0304 //RX_FDEQ_BIN_2 +223 0x0405 //RX_FDEQ_BIN_3 +224 0x0607 //RX_FDEQ_BIN_4 +225 0x0809 //RX_FDEQ_BIN_5 +226 0x0A0B //RX_FDEQ_BIN_6 +227 0x0C0D //RX_FDEQ_BIN_7 +228 0x0E0F //RX_FDEQ_BIN_8 +229 0x1011 //RX_FDEQ_BIN_9 +230 0x1214 //RX_FDEQ_BIN_10 +231 0x1618 //RX_FDEQ_BIN_11 +232 0x1C1C //RX_FDEQ_BIN_12 +233 0x2020 //RX_FDEQ_BIN_13 +234 0x2020 //RX_FDEQ_BIN_14 +235 0x2011 //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x4000 //RX_FDEQ_RESRV_0 +245 0x0320 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0030 //RX_FDDRC_BAND_MARGIN_1 +248 0x0050 //RX_FDDRC_BAND_MARGIN_2 +249 0x0080 //RX_FDDRC_BAND_MARGIN_3 +250 0x0007 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x5000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x6400 //RX_FDDRC_THRD_3_2 +258 0x6400 //RX_FDDRC_THRD_3_3 +259 0x2000 //RX_FDDRC_SLANT_0_0 +260 0x2000 //RX_FDDRC_SLANT_0_1 +261 0x2000 //RX_FDDRC_SLANT_0_2 +262 0x2000 //RX_FDDRC_SLANT_0_3 +263 0x5333 //RX_FDDRC_SLANT_1_0 +264 0x5333 //RX_FDDRC_SLANT_1_1 +265 0x5333 //RX_FDDRC_SLANT_1_2 +266 0x5333 //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +286 0x0100 //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 +#VOL 1 +163 0x1000 //RX_TDDRC_ALPHA_UP_1 +164 0x1000 //RX_TDDRC_ALPHA_UP_2 +165 0x1000 //RX_TDDRC_ALPHA_UP_3 +166 0x1000 //RX_TDDRC_ALPHA_UP_4 +184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +190 0x7FFF //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +269 0x0000 //RX_TDDRC_THRD_0 +270 0x0000 //RX_TDDRC_THRD_1 +271 0x7FFF //RX_TDDRC_THRD_2 +272 0x7FFF //RX_TDDRC_THRD_3 +273 0x7FFF //RX_TDDRC_SLANT_0 +274 0x7FFF //RX_TDDRC_SLANT_1 +275 0x1000 //RX_TDDRC_ALPHA_UP_0 +276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x199A //RX_TDDRC_HMNC_GAIN +279 0x0001 //RX_TDDRC_SMT_FLAG +280 0x0CCD //RX_TDDRC_SMT_W +281 0x0155 //RX_TDDRC_DRC_GAIN +195 0x0020 //RX_FDEQ_SUBNUM +196 0x4848 //RX_FDEQ_GAIN_0 +197 0x4848 //RX_FDEQ_GAIN_1 +198 0x4848 //RX_FDEQ_GAIN_2 +199 0x4848 //RX_FDEQ_GAIN_3 +200 0x4848 //RX_FDEQ_GAIN_4 +201 0x4848 //RX_FDEQ_GAIN_5 +202 0x4848 //RX_FDEQ_GAIN_6 +203 0x4848 //RX_FDEQ_GAIN_7 +204 0x4848 //RX_FDEQ_GAIN_8 +205 0x4848 //RX_FDEQ_GAIN_9 +206 0x4848 //RX_FDEQ_GAIN_10 +207 0x4848 //RX_FDEQ_GAIN_11 +208 0x4848 //RX_FDEQ_GAIN_12 +209 0x4848 //RX_FDEQ_GAIN_13 +210 0x4848 //RX_FDEQ_GAIN_14 +211 0x4848 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0202 //RX_FDEQ_BIN_0 +221 0x0203 //RX_FDEQ_BIN_1 +222 0x0304 //RX_FDEQ_BIN_2 +223 0x0405 //RX_FDEQ_BIN_3 +224 0x0607 //RX_FDEQ_BIN_4 +225 0x0809 //RX_FDEQ_BIN_5 +226 0x0A0B //RX_FDEQ_BIN_6 +227 0x0C0D //RX_FDEQ_BIN_7 +228 0x0E0F //RX_FDEQ_BIN_8 +229 0x1011 //RX_FDEQ_BIN_9 +230 0x1214 //RX_FDEQ_BIN_10 +231 0x1618 //RX_FDEQ_BIN_11 +232 0x1C1C //RX_FDEQ_BIN_12 +233 0x2020 //RX_FDEQ_BIN_13 +234 0x2020 //RX_FDEQ_BIN_14 +235 0x2011 //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x4000 //RX_FDEQ_RESRV_0 +245 0x0320 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0030 //RX_FDDRC_BAND_MARGIN_1 +248 0x0050 //RX_FDDRC_BAND_MARGIN_2 +249 0x0080 //RX_FDDRC_BAND_MARGIN_3 +250 0x0007 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x5000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x6400 //RX_FDDRC_THRD_3_2 +258 0x6400 //RX_FDDRC_THRD_3_3 +259 0x2000 //RX_FDDRC_SLANT_0_0 +260 0x2000 //RX_FDDRC_SLANT_0_1 +261 0x2000 //RX_FDDRC_SLANT_0_2 +262 0x2000 //RX_FDDRC_SLANT_0_3 +263 0x5333 //RX_FDDRC_SLANT_1_0 +264 0x5333 //RX_FDDRC_SLANT_1_1 +265 0x5333 //RX_FDDRC_SLANT_1_2 +266 0x5333 //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +286 0x0100 //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 +#VOL 2 +163 0x1000 //RX_TDDRC_ALPHA_UP_1 +164 0x1000 //RX_TDDRC_ALPHA_UP_2 +165 0x1000 //RX_TDDRC_ALPHA_UP_3 +166 0x1000 //RX_TDDRC_ALPHA_UP_4 +184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +190 0x7FFF //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +269 0x0000 //RX_TDDRC_THRD_0 +270 0x0000 //RX_TDDRC_THRD_1 +271 0x7FFF //RX_TDDRC_THRD_2 +272 0x7FFF //RX_TDDRC_THRD_3 +273 0x7FFF //RX_TDDRC_SLANT_0 +274 0x7FFF //RX_TDDRC_SLANT_1 +275 0x1000 //RX_TDDRC_ALPHA_UP_0 +276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x199A //RX_TDDRC_HMNC_GAIN +279 0x0001 //RX_TDDRC_SMT_FLAG +280 0x0CCD //RX_TDDRC_SMT_W +281 0x0155 //RX_TDDRC_DRC_GAIN +195 0x0020 //RX_FDEQ_SUBNUM +196 0x4848 //RX_FDEQ_GAIN_0 +197 0x4848 //RX_FDEQ_GAIN_1 +198 0x4848 //RX_FDEQ_GAIN_2 +199 0x4848 //RX_FDEQ_GAIN_3 +200 0x4848 //RX_FDEQ_GAIN_4 +201 0x4848 //RX_FDEQ_GAIN_5 +202 0x4848 //RX_FDEQ_GAIN_6 +203 0x4848 //RX_FDEQ_GAIN_7 +204 0x4848 //RX_FDEQ_GAIN_8 +205 0x4848 //RX_FDEQ_GAIN_9 +206 0x4848 //RX_FDEQ_GAIN_10 +207 0x4848 //RX_FDEQ_GAIN_11 +208 0x4848 //RX_FDEQ_GAIN_12 +209 0x4848 //RX_FDEQ_GAIN_13 +210 0x4848 //RX_FDEQ_GAIN_14 +211 0x4848 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0202 //RX_FDEQ_BIN_0 +221 0x0203 //RX_FDEQ_BIN_1 +222 0x0304 //RX_FDEQ_BIN_2 +223 0x0405 //RX_FDEQ_BIN_3 +224 0x0607 //RX_FDEQ_BIN_4 +225 0x0809 //RX_FDEQ_BIN_5 +226 0x0A0B //RX_FDEQ_BIN_6 +227 0x0C0D //RX_FDEQ_BIN_7 +228 0x0E0F //RX_FDEQ_BIN_8 +229 0x1011 //RX_FDEQ_BIN_9 +230 0x1214 //RX_FDEQ_BIN_10 +231 0x1618 //RX_FDEQ_BIN_11 +232 0x1C1C //RX_FDEQ_BIN_12 +233 0x2020 //RX_FDEQ_BIN_13 +234 0x2020 //RX_FDEQ_BIN_14 +235 0x2011 //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x4000 //RX_FDEQ_RESRV_0 +245 0x0320 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0030 //RX_FDDRC_BAND_MARGIN_1 +248 0x0050 //RX_FDDRC_BAND_MARGIN_2 +249 0x0080 //RX_FDDRC_BAND_MARGIN_3 +250 0x0007 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x5000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x6400 //RX_FDDRC_THRD_3_2 +258 0x6400 //RX_FDDRC_THRD_3_3 +259 0x2000 //RX_FDDRC_SLANT_0_0 +260 0x2000 //RX_FDDRC_SLANT_0_1 +261 0x2000 //RX_FDDRC_SLANT_0_2 +262 0x2000 //RX_FDDRC_SLANT_0_3 +263 0x5333 //RX_FDDRC_SLANT_1_0 +264 0x5333 //RX_FDDRC_SLANT_1_1 +265 0x5333 //RX_FDDRC_SLANT_1_2 +266 0x5333 //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +286 0x0100 //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 +#VOL 3 +163 0x1000 //RX_TDDRC_ALPHA_UP_1 +164 0x1000 //RX_TDDRC_ALPHA_UP_2 +165 0x1000 //RX_TDDRC_ALPHA_UP_3 +166 0x1000 //RX_TDDRC_ALPHA_UP_4 +184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +190 0x7FFF //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +269 0x0000 //RX_TDDRC_THRD_0 +270 0x0000 //RX_TDDRC_THRD_1 +271 0x7FFF //RX_TDDRC_THRD_2 +272 0x7FFF //RX_TDDRC_THRD_3 +273 0x7FFF //RX_TDDRC_SLANT_0 +274 0x7FFF //RX_TDDRC_SLANT_1 +275 0x1000 //RX_TDDRC_ALPHA_UP_0 +276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x199A //RX_TDDRC_HMNC_GAIN +279 0x0001 //RX_TDDRC_SMT_FLAG +280 0x0CCD //RX_TDDRC_SMT_W +281 0x0155 //RX_TDDRC_DRC_GAIN +195 0x0020 //RX_FDEQ_SUBNUM +196 0x4848 //RX_FDEQ_GAIN_0 +197 0x4848 //RX_FDEQ_GAIN_1 +198 0x4848 //RX_FDEQ_GAIN_2 +199 0x4848 //RX_FDEQ_GAIN_3 +200 0x4848 //RX_FDEQ_GAIN_4 +201 0x4848 //RX_FDEQ_GAIN_5 +202 0x4848 //RX_FDEQ_GAIN_6 +203 0x4848 //RX_FDEQ_GAIN_7 +204 0x4848 //RX_FDEQ_GAIN_8 +205 0x4848 //RX_FDEQ_GAIN_9 +206 0x4848 //RX_FDEQ_GAIN_10 +207 0x4848 //RX_FDEQ_GAIN_11 +208 0x4848 //RX_FDEQ_GAIN_12 +209 0x4848 //RX_FDEQ_GAIN_13 +210 0x4848 //RX_FDEQ_GAIN_14 +211 0x4848 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0202 //RX_FDEQ_BIN_0 +221 0x0203 //RX_FDEQ_BIN_1 +222 0x0304 //RX_FDEQ_BIN_2 +223 0x0405 //RX_FDEQ_BIN_3 +224 0x0607 //RX_FDEQ_BIN_4 +225 0x0809 //RX_FDEQ_BIN_5 +226 0x0A0B //RX_FDEQ_BIN_6 +227 0x0C0D //RX_FDEQ_BIN_7 +228 0x0E0F //RX_FDEQ_BIN_8 +229 0x1011 //RX_FDEQ_BIN_9 +230 0x1214 //RX_FDEQ_BIN_10 +231 0x1618 //RX_FDEQ_BIN_11 +232 0x1C1C //RX_FDEQ_BIN_12 +233 0x2020 //RX_FDEQ_BIN_13 +234 0x2020 //RX_FDEQ_BIN_14 +235 0x2011 //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x4000 //RX_FDEQ_RESRV_0 +245 0x0320 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0030 //RX_FDDRC_BAND_MARGIN_1 +248 0x0050 //RX_FDDRC_BAND_MARGIN_2 +249 0x0080 //RX_FDDRC_BAND_MARGIN_3 +250 0x0007 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x5000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x6400 //RX_FDDRC_THRD_3_2 +258 0x6400 //RX_FDDRC_THRD_3_3 +259 0x2000 //RX_FDDRC_SLANT_0_0 +260 0x2000 //RX_FDDRC_SLANT_0_1 +261 0x2000 //RX_FDDRC_SLANT_0_2 +262 0x2000 //RX_FDDRC_SLANT_0_3 +263 0x5333 //RX_FDDRC_SLANT_1_0 +264 0x5333 //RX_FDDRC_SLANT_1_1 +265 0x5333 //RX_FDDRC_SLANT_1_2 +266 0x5333 //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +286 0x0100 //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 +#VOL 4 +163 0x1000 //RX_TDDRC_ALPHA_UP_1 +164 0x1000 //RX_TDDRC_ALPHA_UP_2 +165 0x1000 //RX_TDDRC_ALPHA_UP_3 +166 0x1000 //RX_TDDRC_ALPHA_UP_4 +184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +190 0x7FFF //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +269 0x0000 //RX_TDDRC_THRD_0 +270 0x0000 //RX_TDDRC_THRD_1 +271 0x7FFF //RX_TDDRC_THRD_2 +272 0x7FFF //RX_TDDRC_THRD_3 +273 0x7FFF //RX_TDDRC_SLANT_0 +274 0x7FFF //RX_TDDRC_SLANT_1 +275 0x1000 //RX_TDDRC_ALPHA_UP_0 +276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x199A //RX_TDDRC_HMNC_GAIN +279 0x0001 //RX_TDDRC_SMT_FLAG +280 0x0CCD //RX_TDDRC_SMT_W +281 0x0155 //RX_TDDRC_DRC_GAIN +195 0x0020 //RX_FDEQ_SUBNUM +196 0x4848 //RX_FDEQ_GAIN_0 +197 0x4848 //RX_FDEQ_GAIN_1 +198 0x4848 //RX_FDEQ_GAIN_2 +199 0x4848 //RX_FDEQ_GAIN_3 +200 0x4848 //RX_FDEQ_GAIN_4 +201 0x4848 //RX_FDEQ_GAIN_5 +202 0x4848 //RX_FDEQ_GAIN_6 +203 0x4848 //RX_FDEQ_GAIN_7 +204 0x4848 //RX_FDEQ_GAIN_8 +205 0x4848 //RX_FDEQ_GAIN_9 +206 0x4848 //RX_FDEQ_GAIN_10 +207 0x4848 //RX_FDEQ_GAIN_11 +208 0x4848 //RX_FDEQ_GAIN_12 +209 0x4848 //RX_FDEQ_GAIN_13 +210 0x4848 //RX_FDEQ_GAIN_14 +211 0x4848 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0202 //RX_FDEQ_BIN_0 +221 0x0203 //RX_FDEQ_BIN_1 +222 0x0304 //RX_FDEQ_BIN_2 +223 0x0405 //RX_FDEQ_BIN_3 +224 0x0607 //RX_FDEQ_BIN_4 +225 0x0809 //RX_FDEQ_BIN_5 +226 0x0A0B //RX_FDEQ_BIN_6 +227 0x0C0D //RX_FDEQ_BIN_7 +228 0x0E0F //RX_FDEQ_BIN_8 +229 0x1011 //RX_FDEQ_BIN_9 +230 0x1214 //RX_FDEQ_BIN_10 +231 0x1618 //RX_FDEQ_BIN_11 +232 0x1C1C //RX_FDEQ_BIN_12 +233 0x2020 //RX_FDEQ_BIN_13 +234 0x2020 //RX_FDEQ_BIN_14 +235 0x2011 //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x4000 //RX_FDEQ_RESRV_0 +245 0x0320 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0030 //RX_FDDRC_BAND_MARGIN_1 +248 0x0050 //RX_FDDRC_BAND_MARGIN_2 +249 0x0080 //RX_FDDRC_BAND_MARGIN_3 +250 0x0007 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x5000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x6400 //RX_FDDRC_THRD_3_2 +258 0x6400 //RX_FDDRC_THRD_3_3 +259 0x2000 //RX_FDDRC_SLANT_0_0 +260 0x2000 //RX_FDDRC_SLANT_0_1 +261 0x2000 //RX_FDDRC_SLANT_0_2 +262 0x2000 //RX_FDDRC_SLANT_0_3 +263 0x5333 //RX_FDDRC_SLANT_1_0 +264 0x5333 //RX_FDDRC_SLANT_1_1 +265 0x5333 //RX_FDDRC_SLANT_1_2 +266 0x5333 //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +286 0x0100 //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 +#VOL 5 +163 0x1000 //RX_TDDRC_ALPHA_UP_1 +164 0x1000 //RX_TDDRC_ALPHA_UP_2 +165 0x1000 //RX_TDDRC_ALPHA_UP_3 +166 0x1000 //RX_TDDRC_ALPHA_UP_4 +184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +190 0x7FFF //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +269 0x0000 //RX_TDDRC_THRD_0 +270 0x0000 //RX_TDDRC_THRD_1 +271 0x7FFF //RX_TDDRC_THRD_2 +272 0x7FFF //RX_TDDRC_THRD_3 +273 0x7FFF //RX_TDDRC_SLANT_0 +274 0x7FFF //RX_TDDRC_SLANT_1 +275 0x1000 //RX_TDDRC_ALPHA_UP_0 +276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x199A //RX_TDDRC_HMNC_GAIN +279 0x0001 //RX_TDDRC_SMT_FLAG +280 0x0CCD //RX_TDDRC_SMT_W +281 0x0155 //RX_TDDRC_DRC_GAIN +195 0x0020 //RX_FDEQ_SUBNUM +196 0x4848 //RX_FDEQ_GAIN_0 +197 0x4848 //RX_FDEQ_GAIN_1 +198 0x4848 //RX_FDEQ_GAIN_2 +199 0x4848 //RX_FDEQ_GAIN_3 +200 0x4848 //RX_FDEQ_GAIN_4 +201 0x4848 //RX_FDEQ_GAIN_5 +202 0x4848 //RX_FDEQ_GAIN_6 +203 0x4848 //RX_FDEQ_GAIN_7 +204 0x4848 //RX_FDEQ_GAIN_8 +205 0x4848 //RX_FDEQ_GAIN_9 +206 0x4848 //RX_FDEQ_GAIN_10 +207 0x4848 //RX_FDEQ_GAIN_11 +208 0x4848 //RX_FDEQ_GAIN_12 +209 0x4848 //RX_FDEQ_GAIN_13 +210 0x4848 //RX_FDEQ_GAIN_14 +211 0x4848 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0202 //RX_FDEQ_BIN_0 +221 0x0203 //RX_FDEQ_BIN_1 +222 0x0304 //RX_FDEQ_BIN_2 +223 0x0405 //RX_FDEQ_BIN_3 +224 0x0607 //RX_FDEQ_BIN_4 +225 0x0809 //RX_FDEQ_BIN_5 +226 0x0A0B //RX_FDEQ_BIN_6 +227 0x0C0D //RX_FDEQ_BIN_7 +228 0x0E0F //RX_FDEQ_BIN_8 +229 0x1011 //RX_FDEQ_BIN_9 +230 0x1214 //RX_FDEQ_BIN_10 +231 0x1618 //RX_FDEQ_BIN_11 +232 0x1C1C //RX_FDEQ_BIN_12 +233 0x2020 //RX_FDEQ_BIN_13 +234 0x2020 //RX_FDEQ_BIN_14 +235 0x2011 //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x4000 //RX_FDEQ_RESRV_0 +245 0x0320 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0030 //RX_FDDRC_BAND_MARGIN_1 +248 0x0050 //RX_FDDRC_BAND_MARGIN_2 +249 0x0080 //RX_FDDRC_BAND_MARGIN_3 +250 0x0007 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x5000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x6400 //RX_FDDRC_THRD_3_2 +258 0x6400 //RX_FDDRC_THRD_3_3 +259 0x2000 //RX_FDDRC_SLANT_0_0 +260 0x2000 //RX_FDDRC_SLANT_0_1 +261 0x2000 //RX_FDDRC_SLANT_0_2 +262 0x2000 //RX_FDDRC_SLANT_0_3 +263 0x5333 //RX_FDDRC_SLANT_1_0 +264 0x5333 //RX_FDDRC_SLANT_1_1 +265 0x5333 //RX_FDDRC_SLANT_1_2 +266 0x5333 //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +286 0x0100 //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 +#VOL 6 +163 0x1000 //RX_TDDRC_ALPHA_UP_1 +164 0x1000 //RX_TDDRC_ALPHA_UP_2 +165 0x1000 //RX_TDDRC_ALPHA_UP_3 +166 0x1000 //RX_TDDRC_ALPHA_UP_4 +184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +190 0x7FFF //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +269 0x0000 //RX_TDDRC_THRD_0 +270 0x0000 //RX_TDDRC_THRD_1 +271 0x7FFF //RX_TDDRC_THRD_2 +272 0x7FFF //RX_TDDRC_THRD_3 +273 0x7FFF //RX_TDDRC_SLANT_0 +274 0x7FFF //RX_TDDRC_SLANT_1 +275 0x1000 //RX_TDDRC_ALPHA_UP_0 +276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x199A //RX_TDDRC_HMNC_GAIN +279 0x0001 //RX_TDDRC_SMT_FLAG +280 0x0CCD //RX_TDDRC_SMT_W +281 0x0155 //RX_TDDRC_DRC_GAIN +195 0x0020 //RX_FDEQ_SUBNUM +196 0x4848 //RX_FDEQ_GAIN_0 +197 0x4848 //RX_FDEQ_GAIN_1 +198 0x4848 //RX_FDEQ_GAIN_2 +199 0x4848 //RX_FDEQ_GAIN_3 +200 0x4848 //RX_FDEQ_GAIN_4 +201 0x4848 //RX_FDEQ_GAIN_5 +202 0x4848 //RX_FDEQ_GAIN_6 +203 0x4848 //RX_FDEQ_GAIN_7 +204 0x4848 //RX_FDEQ_GAIN_8 +205 0x4848 //RX_FDEQ_GAIN_9 +206 0x4848 //RX_FDEQ_GAIN_10 +207 0x4848 //RX_FDEQ_GAIN_11 +208 0x4848 //RX_FDEQ_GAIN_12 +209 0x4848 //RX_FDEQ_GAIN_13 +210 0x4848 //RX_FDEQ_GAIN_14 +211 0x4848 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0202 //RX_FDEQ_BIN_0 +221 0x0203 //RX_FDEQ_BIN_1 +222 0x0304 //RX_FDEQ_BIN_2 +223 0x0405 //RX_FDEQ_BIN_3 +224 0x0607 //RX_FDEQ_BIN_4 +225 0x0809 //RX_FDEQ_BIN_5 +226 0x0A0B //RX_FDEQ_BIN_6 +227 0x0C0D //RX_FDEQ_BIN_7 +228 0x0E0F //RX_FDEQ_BIN_8 +229 0x1011 //RX_FDEQ_BIN_9 +230 0x1214 //RX_FDEQ_BIN_10 +231 0x1618 //RX_FDEQ_BIN_11 +232 0x1C1C //RX_FDEQ_BIN_12 +233 0x2020 //RX_FDEQ_BIN_13 +234 0x2020 //RX_FDEQ_BIN_14 +235 0x2011 //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x4000 //RX_FDEQ_RESRV_0 +245 0x0320 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0030 //RX_FDDRC_BAND_MARGIN_1 +248 0x0050 //RX_FDDRC_BAND_MARGIN_2 +249 0x0080 //RX_FDDRC_BAND_MARGIN_3 +250 0x0007 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x5000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x6400 //RX_FDDRC_THRD_3_2 +258 0x6400 //RX_FDDRC_THRD_3_3 +259 0x2000 //RX_FDDRC_SLANT_0_0 +260 0x2000 //RX_FDDRC_SLANT_0_1 +261 0x2000 //RX_FDDRC_SLANT_0_2 +262 0x2000 //RX_FDDRC_SLANT_0_3 +263 0x5333 //RX_FDDRC_SLANT_1_0 +264 0x5333 //RX_FDDRC_SLANT_1_1 +265 0x5333 //RX_FDDRC_SLANT_1_2 +266 0x5333 //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +286 0x0100 //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 #CASE_NAME BLUETOOTH-BTWB-VOICE_GENERIC-NB -#PARAM_TYPE TX+RX -#TOTAL_CUSTOM_STEP 7 +#PARAM_MODE Full +#PARAM_TYPE TX+2RX +#TOTAL_CUSTOM_STEP 7+7 #TX 0 0x0008 //TX_OPERATION_MODE_0 1 0x0008 //TX_OPERATION_MODE_1 @@ -23047,20 +34969,20 @@ 248 0xF400 //TX_THR_SN_EST_6 249 0xF600 //TX_THR_SN_EST_7 250 0x0000 //TX_DELTA_THR_SN_EST_0 -251 0x0000 //TX_DELTA_THR_SN_EST_1 +251 0x0200 //TX_DELTA_THR_SN_EST_1 252 0x0200 //TX_DELTA_THR_SN_EST_2 253 0x0200 //TX_DELTA_THR_SN_EST_3 254 0x0200 //TX_DELTA_THR_SN_EST_4 255 0x0200 //TX_DELTA_THR_SN_EST_5 -256 0x0200 //TX_DELTA_THR_SN_EST_6 +256 0x0000 //TX_DELTA_THR_SN_EST_6 257 0x0200 //TX_DELTA_THR_SN_EST_7 258 0x6000 //TX_LAMBDA_NN_EST_0 -259 0x6000 //TX_LAMBDA_NN_EST_1 +259 0x4000 //TX_LAMBDA_NN_EST_1 260 0x4000 //TX_LAMBDA_NN_EST_2 261 0x4000 //TX_LAMBDA_NN_EST_3 262 0x4000 //TX_LAMBDA_NN_EST_4 263 0x4000 //TX_LAMBDA_NN_EST_5 -264 0x4000 //TX_LAMBDA_NN_EST_6 +264 0x6000 //TX_LAMBDA_NN_EST_6 265 0x4000 //TX_LAMBDA_NN_EST_7 266 0x0400 //TX_N_SN_EST 267 0x001E //TX_INBEAM_T @@ -23078,16 +35000,16 @@ 279 0x1000 //TX_B_POST_FLT_0 280 0x1000 //TX_B_POST_FLT_1 281 0x000F //TX_NS_LVL_CTRL_0 -282 0x000F //TX_NS_LVL_CTRL_1 -283 0x0011 //TX_NS_LVL_CTRL_2 +282 0x0011 //TX_NS_LVL_CTRL_1 +283 0x000F //TX_NS_LVL_CTRL_2 284 0x000F //TX_NS_LVL_CTRL_3 285 0x000F //TX_NS_LVL_CTRL_4 286 0x000F //TX_NS_LVL_CTRL_5 287 0x000F //TX_NS_LVL_CTRL_6 288 0x0011 //TX_NS_LVL_CTRL_7 289 0x000C //TX_MIN_GAIN_S_0 -290 0x000C //TX_MIN_GAIN_S_1 -291 0x000F //TX_MIN_GAIN_S_2 +290 0x000F //TX_MIN_GAIN_S_1 +291 0x000C //TX_MIN_GAIN_S_2 292 0x000C //TX_MIN_GAIN_S_3 293 0x000C //TX_MIN_GAIN_S_4 294 0x000C //TX_MIN_GAIN_S_5 @@ -23111,12 +35033,12 @@ 312 0x7FFF //TX_A_POST_FILT_0 313 0x2000 //TX_A_POST_FILT_1 314 0x4000 //TX_A_POST_FILT_S_0 -315 0x4000 //TX_A_POST_FILT_S_1 +315 0x5000 //TX_A_POST_FILT_S_1 316 0x5000 //TX_A_POST_FILT_S_2 317 0x5000 //TX_A_POST_FILT_S_3 318 0x5000 //TX_A_POST_FILT_S_4 319 0x5000 //TX_A_POST_FILT_S_5 -320 0x5000 //TX_A_POST_FILT_S_6 +320 0x4000 //TX_A_POST_FILT_S_6 321 0x5000 //TX_A_POST_FILT_S_7 322 0x1000 //TX_B_POST_FILT_0 323 0x1000 //TX_B_POST_FILT_1 @@ -23176,10 +35098,10 @@ 377 0x7FFF //TX_NOISE_TH_5_4 378 0x044C //TX_NOISE_TH_6 379 0x0014 //TX_MINENOISE_TH -380 0x4000 //TX_MINENOISE_MIC0_TH_MTS -381 0xFFEE //TX_MINENOISE_MIC0_TH_EXP -382 0x6000 //TX_MINENOISE_MIC0_S_TH_MTS -383 0xFFF3 //TX_MINENOISE_MIC0_S_TH_EXP +380 0x4000 //TX_MORENS_TFMASK_TH +381 0xFFEE //TX_DRC_QUIET_FLOOR +382 0x6000 //TX_RATIODTL_CUT_TH +383 0xFFF3 //TX_DT_CUT_K1 384 0x0666 //TX_OUT_ENER_S_TH_CLEAN 385 0x0666 //TX_OUT_ENER_S_TH_LESSCLEAN 386 0x0333 //TX_OUT_ENER_S_TH_NOISY @@ -23187,15 +35109,15 @@ 388 0x0333 //TX_OUT_ENER_TH_SPEECH 389 0x2000 //TX_SN_NPB_GAIN 390 0x0000 //TX_NN_NPB_GAIN -391 0x0000 //TX_CSX_ALPHA_0 -392 0x0000 //TX_CSX_ALPHA_1 -393 0x0000 //TX_CSX_ALPHA_2 -394 0x0000 //TX_CSX_ALPHA_3 -395 0x0800 //TX_MU_ARSP_EST -396 0x00C8 //TX_P_OUTBEAM_MIN_TH +391 0x0000 //TX_POST_MASK_SUP_HSNE +392 0x0000 //TX_TAIL_DET_TH +393 0x0000 //TX_B_LESSCUT_RTO_WTA +394 0x0000 //TX_MEL_G_R +395 0x0800 //TX_SUPHIGH_TH +396 0x00C8 //TX_MASK_G_R 397 0x0002 //TX_EXTRA_NS_L -398 0x0800 //TX_EXTRA_NS_A -399 0x0005 //TX_VR_NOISE_FLOOR_TH +398 0x0800 //TX_C_POST_FLT_MASK +399 0x0005 //TX_A_POST_FLT_WNS 400 0x0148 //TX_MIN_G_LOW300HZ 401 0x0002 //TX_MAXLEVEL_CNG 402 0x00B4 //TX_STN_NOISE_TH @@ -23310,16 +35232,16 @@ 511 0x6666 //TX_MIC_TO_BFGAIN 512 0x0000 //TX_MICTOBFGAIN0 513 0x0000 //TX_FASTMUE_TH -514 0x0000 //TX_DERVB_LEN_0 -515 0x0000 //TX_DERVB_LEN_1 -516 0x0000 //TX_RHO_DERVB -517 0x0000 //TX_MIC_INDX_DERVB -518 0x0000 //TX_MU_DERVB -519 0x0000 //TX_DR_RESRV_0 -520 0x0000 //TX_DR_RESRV_1 -521 0x0000 //TX_DR_RESRV_2 -522 0x0000 //TX_DR_RESRV_3 -523 0x0000 //TX_DR_RESRV_4 +514 0x0000 //TX_DEREVERB_LF_MU +515 0x0000 //TX_DEREVERB_HF_MU +516 0x0000 //TX_DEREVERB_DELAY +517 0x0000 //TX_DEREVERB_COEF_LEN +518 0x0000 //TX_DEREVERB_DNR +519 0x0000 //TX_DEREVERB_ALPHA +520 0x0000 //TX_DEREVERB_BETA +521 0x0000 //TX_GSC_RTOL_TH +522 0x0000 //TX_GSC_RTOH_TH +523 0x0000 //TX_WIDE2_MEANHTH 524 0x0000 //TX_DR_RESRV_5 525 0x0000 //TX_DR_RESRV_6 526 0x0000 //TX_DR_RESRV_7 @@ -23693,8 +35615,73 @@ 894 0xC000 //TX_FASTNS_SSA_THHFL 895 0xCCCC //TX_FASTNS_SSA_THLFH 896 0xD999 //TX_FASTNS_SSA_THHFH +897 0x0000 //TX_SENDFUNC_REG_MICMUTE +898 0x0000 //TX_SENDFUNC_REG_MICMUTE1 +899 0x0000 //TX_MICMUTE_RATIO_THR +900 0x0000 //TX_MICMUTE_AMP_THR +901 0x0000 //TX_MICMUTE_HPF_IND +902 0x0000 //TX_MICMUTE_LOG_EYR_TH +903 0x0000 //TX_MICMUTE_CVG_TIME +904 0x0000 //TX_MICMUTE_RELEASE_TIME +905 0x0000 //TX_MIC_VOLUME_MIC0MUTE +906 0x0000 //TX_MICMUTE_EPD_OFFSET_0 +907 0x0000 //TX_MICMUTE_FRQ_AEC_L +908 0x0000 //TX_MICMUTE_EAD_THR +909 0x0000 //TX_MICMUTE_LAMBDA_CB_NLE +910 0x0000 //TX_MICMUTE_LAMBDA_RE_EST +911 0x0000 //TX_DTD_THR1_MICMUTE_0 +912 0x0000 //TX_DTD_THR1_MICMUTE_1 +913 0x0000 //TX_DTD_THR1_MICMUTE_2 +914 0x0000 //TX_DTD_THR1_MICMUTE_3 +915 0x0000 //TX_DTD_THR2_MICMUTE_0 +916 0x0000 //TX_MICMUTE_MIN_EQ_RE_EST_0 +917 0x0000 //TX_MICMUTE_MIN_EQ_RE_EST_1 +918 0x0000 //TX_MICMUTE_MIN_EQ_RE_EST_2 +919 0x0000 //TX_MICMUTE_MIN_EQ_RE_EST_3 +920 0x0000 //TX_MICMUTE_MIN_EQ_RE_EST_4 +921 0x0000 //TX_MICMUTE_C_POST_FLT +922 0x0000 //TX_MICMUTE_DT_CUT_K +923 0x0000 //TX_MICMUTE_DT_CUT_THR +924 0x0000 //TX_MICMUTE_DT_CUT_K2 +925 0x0000 //TX_MICMUTE_DT_CUT_THR2 +926 0x0000 //TX_MICMUTE_DT2_HOLD_N +927 0x0000 //TX_MICMUTE_RATIODTH_THCUT +928 0x0000 //TX_MICMUTE_B_POST_FLT_ECHOL +929 0x0000 //TX_MICMUTE_B_POST_FLT_ECHOH +930 0x0000 //TX_MICMUTE_C_POST_FLT_MASK +931 0x0000 //TX_MICMUTE_RATIODTL_CUT_TH +932 0x0000 //TX_MICMUTE_DT_CUT_K1 +933 0x0000 //TX_MICMUTE_N2_SN_EST +934 0x0000 //TX_MICMUTE_THR_SN_EST_0 +935 0x0000 //TX_MICMUTE_MIN_G_CTRL_0 +936 0x0000 //TX_MICMUTE_A_POST_FILT_S_0 +937 0x0000 //TX_MICMUTE_B_POST_FILT_0 +938 0x0000 //TX_MIC1RUB_AMP_THR +939 0x0000 //TX_MIC1MUTE_RATIO_THR +940 0x0000 //TX_MIC1MUTE_AMP_THR +941 0x0000 //TX_MIC1MUTE_CVG_TIME +942 0x0000 //TX_MIC1MUTE_RELEASE_TIME +943 0x0000 //TX_AMS_RESRV_01 +944 0x0000 //TX_AMS_RESRV_02 +945 0x0000 //TX_AMS_RESRV_03 +946 0x0000 //TX_AMS_RESRV_04 +947 0x0000 //TX_AMS_RESRV_05 +948 0x0000 //TX_AMS_RESRV_06 +949 0x0000 //TX_AMS_RESRV_07 +950 0x0000 //TX_AMS_RESRV_08 +951 0x0000 //TX_AMS_RESRV_09 +952 0x0000 //TX_AMS_RESRV_10 +953 0x0000 //TX_AMS_RESRV_11 +954 0x0000 //TX_AMS_RESRV_12 +955 0x0000 //TX_AMS_RESRV_13 +956 0x0000 //TX_AMS_RESRV_14 +957 0x0000 //TX_AMS_RESRV_15 +958 0x0000 //TX_AMS_RESRV_16 +959 0x0000 //TX_AMS_RESRV_17 +960 0x0000 //TX_AMS_RESRV_18 +961 0x0000 //TX_AMS_RESRV_19 #RX -0 0x006C //RX_RECVFUNC_MODE_0 +0 0x206C //RX_RECVFUNC_MODE_0 1 0x0000 //RX_RECVFUNC_MODE_1 2 0x0000 //RX_SAMPLINGFREQ_SIG 3 0x0000 //RX_SAMPLINGFREQ_PROC @@ -24544,10 +36531,862 @@ 110 0x0000 //RX_FDDRC_RESRV_0 129 0x0100 //RX_SPK_VOL 130 0x0000 //RX_VOL_RESRV_0 +#RX 2 +157 0x206C //RX_RECVFUNC_MODE_0 +158 0x0000 //RX_RECVFUNC_MODE_1 +159 0x0000 //RX_SAMPLINGFREQ_SIG +160 0x0000 //RX_SAMPLINGFREQ_PROC +161 0x000A //RX_FRAME_SZ +162 0x0000 //RX_DELAY_OPT +163 0x3000 //RX_TDDRC_ALPHA_UP_1 +164 0x3000 //RX_TDDRC_ALPHA_UP_2 +165 0x3000 //RX_TDDRC_ALPHA_UP_3 +166 0x3000 //RX_TDDRC_ALPHA_UP_4 +167 0x0800 //RX_PGA +168 0x7FFF //RX_A_HP +169 0x0000 //RX_B_PE +170 0x3800 //RX_THR_PITCH_DET_0 +171 0x3000 //RX_THR_PITCH_DET_1 +172 0x2800 //RX_THR_PITCH_DET_2 +173 0x0008 //RX_PITCH_BFR_LEN +174 0x0003 //RX_SBD_PITCH_DET +175 0x0100 //RX_PP_RESRV_0 +176 0x0020 //RX_PP_RESRV_1 +177 0x0600 //RX_N_SN_EST +178 0x000C //RX_N2_SN_EST +179 0x0010 //RX_NS_LVL_CTRL +180 0xF800 //RX_THR_SN_EST +181 0x7CCD //RX_LAMBDA_PFILT +182 0x000A //RX_FENS_RESRV_0 +183 0x0190 //RX_FENS_RESRV_1 +184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +187 0x0002 //RX_EXTRA_NS_L +188 0x0800 //RX_EXTRA_NS_A +189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +190 0x7FFF //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +192 0x199A //RX_A_POST_FLT +193 0x0000 //RX_LMT_THRD +194 0x4000 //RX_LMT_ALPHA +195 0x0014 //RX_FDEQ_SUBNUM +196 0x4848 //RX_FDEQ_GAIN_0 +197 0x4848 //RX_FDEQ_GAIN_1 +198 0x4848 //RX_FDEQ_GAIN_2 +199 0x4848 //RX_FDEQ_GAIN_3 +200 0x4848 //RX_FDEQ_GAIN_4 +201 0x4848 //RX_FDEQ_GAIN_5 +202 0x4444 //RX_FDEQ_GAIN_6 +203 0x4040 //RX_FDEQ_GAIN_7 +204 0x4040 //RX_FDEQ_GAIN_8 +205 0x4040 //RX_FDEQ_GAIN_9 +206 0x4848 //RX_FDEQ_GAIN_10 +207 0x4848 //RX_FDEQ_GAIN_11 +208 0x4848 //RX_FDEQ_GAIN_12 +209 0x4848 //RX_FDEQ_GAIN_13 +210 0x4848 //RX_FDEQ_GAIN_14 +211 0x4848 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0202 //RX_FDEQ_BIN_0 +221 0x0203 //RX_FDEQ_BIN_1 +222 0x0303 //RX_FDEQ_BIN_2 +223 0x0304 //RX_FDEQ_BIN_3 +224 0x0405 //RX_FDEQ_BIN_4 +225 0x0506 //RX_FDEQ_BIN_5 +226 0x0708 //RX_FDEQ_BIN_6 +227 0x090A //RX_FDEQ_BIN_7 +228 0x0B0C //RX_FDEQ_BIN_8 +229 0x0D0E //RX_FDEQ_BIN_9 +230 0x0000 //RX_FDEQ_BIN_10 +231 0x0000 //RX_FDEQ_BIN_11 +232 0x0000 //RX_FDEQ_BIN_12 +233 0x0000 //RX_FDEQ_BIN_13 +234 0x0000 //RX_FDEQ_BIN_14 +235 0x0000 //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x4000 //RX_FDEQ_RESRV_0 +245 0x0320 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0030 //RX_FDDRC_BAND_MARGIN_1 +248 0x0050 //RX_FDDRC_BAND_MARGIN_2 +249 0x0080 //RX_FDDRC_BAND_MARGIN_3 +250 0x0007 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x5000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x6400 //RX_FDDRC_THRD_3_2 +258 0x6400 //RX_FDDRC_THRD_3_3 +259 0x2000 //RX_FDDRC_SLANT_0_0 +260 0x2000 //RX_FDDRC_SLANT_0_1 +261 0x2000 //RX_FDDRC_SLANT_0_2 +262 0x2000 //RX_FDDRC_SLANT_0_3 +263 0x5333 //RX_FDDRC_SLANT_1_0 +264 0x5333 //RX_FDDRC_SLANT_1_1 +265 0x5333 //RX_FDDRC_SLANT_1_2 +266 0x5333 //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +268 0x0000 //RX_FILTINDX +269 0x0000 //RX_TDDRC_THRD_0 +270 0x0000 //RX_TDDRC_THRD_1 +271 0x7FFF //RX_TDDRC_THRD_2 +272 0x7FFF //RX_TDDRC_THRD_3 +273 0x7FFF //RX_TDDRC_SLANT_0 +274 0x7EB8 //RX_TDDRC_SLANT_1 +275 0x3000 //RX_TDDRC_ALPHA_UP_0 +276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x199A //RX_TDDRC_HMNC_GAIN +279 0x0001 //RX_TDDRC_SMT_FLAG +280 0x0CCD //RX_TDDRC_SMT_W +281 0x017F //RX_TDDRC_DRC_GAIN +282 0x7C00 //RX_LAMBDA_PKA_FP +283 0x2000 //RX_TPKA_FP +284 0x2000 //RX_MIN_G_FP +285 0x0080 //RX_MAX_G_FP +286 0x0100 //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 +288 0x0000 //RX_MAXLEVEL_CNG +289 0x3000 //RX_BWE_UV_TH +290 0x3000 //RX_BWE_UV_TH2 +291 0x1800 //RX_BWE_UV_TH3 +292 0x1000 //RX_BWE_V_TH +293 0x04CD //RX_BWE_GAIN1_V_TH1 +294 0x0F33 //RX_BWE_GAIN1_V_TH2 +295 0x7333 //RX_BWE_UV_EQ +296 0x199A //RX_BWE_V_EQ +297 0x7333 //RX_BWE_TONE_TH +298 0x0004 //RX_BWE_UV_HOLD_T +299 0x6CCD //RX_BWE_GAIN2_ALPHA +300 0x799A //RX_BWE_GAIN3_ALPHA +301 0x001E //RX_BWE_CUTOFF +302 0x3000 //RX_BWE_GAINFILL +303 0x3200 //RX_BWE_MAXTH_TONE +304 0x2000 //RX_BWE_EQ_0 +305 0x2000 //RX_BWE_EQ_1 +306 0x2000 //RX_BWE_EQ_2 +307 0x2000 //RX_BWE_EQ_3 +308 0x2000 //RX_BWE_EQ_4 +309 0x2000 //RX_BWE_EQ_5 +310 0x2000 //RX_BWE_EQ_6 +311 0x0000 //RX_BWE_RESRV_0 +312 0x0000 //RX_BWE_RESRV_1 +313 0x0000 //RX_BWE_RESRV_2 +#VOL 0 +163 0x3000 //RX_TDDRC_ALPHA_UP_1 +164 0x3000 //RX_TDDRC_ALPHA_UP_2 +165 0x3000 //RX_TDDRC_ALPHA_UP_3 +166 0x3000 //RX_TDDRC_ALPHA_UP_4 +184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +190 0x7FFF //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +269 0x0000 //RX_TDDRC_THRD_0 +270 0x0000 //RX_TDDRC_THRD_1 +271 0x7FFF //RX_TDDRC_THRD_2 +272 0x7FFF //RX_TDDRC_THRD_3 +273 0x7FFF //RX_TDDRC_SLANT_0 +274 0x7EB8 //RX_TDDRC_SLANT_1 +275 0x3000 //RX_TDDRC_ALPHA_UP_0 +276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x199A //RX_TDDRC_HMNC_GAIN +279 0x0001 //RX_TDDRC_SMT_FLAG +280 0x0CCD //RX_TDDRC_SMT_W +281 0x017F //RX_TDDRC_DRC_GAIN +195 0x0014 //RX_FDEQ_SUBNUM +196 0x4848 //RX_FDEQ_GAIN_0 +197 0x4848 //RX_FDEQ_GAIN_1 +198 0x4848 //RX_FDEQ_GAIN_2 +199 0x4848 //RX_FDEQ_GAIN_3 +200 0x4848 //RX_FDEQ_GAIN_4 +201 0x4848 //RX_FDEQ_GAIN_5 +202 0x4444 //RX_FDEQ_GAIN_6 +203 0x4040 //RX_FDEQ_GAIN_7 +204 0x4040 //RX_FDEQ_GAIN_8 +205 0x4040 //RX_FDEQ_GAIN_9 +206 0x4848 //RX_FDEQ_GAIN_10 +207 0x4848 //RX_FDEQ_GAIN_11 +208 0x4848 //RX_FDEQ_GAIN_12 +209 0x4848 //RX_FDEQ_GAIN_13 +210 0x4848 //RX_FDEQ_GAIN_14 +211 0x4848 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0202 //RX_FDEQ_BIN_0 +221 0x0203 //RX_FDEQ_BIN_1 +222 0x0303 //RX_FDEQ_BIN_2 +223 0x0304 //RX_FDEQ_BIN_3 +224 0x0405 //RX_FDEQ_BIN_4 +225 0x0506 //RX_FDEQ_BIN_5 +226 0x0708 //RX_FDEQ_BIN_6 +227 0x090A //RX_FDEQ_BIN_7 +228 0x0B0C //RX_FDEQ_BIN_8 +229 0x0D0E //RX_FDEQ_BIN_9 +230 0x0000 //RX_FDEQ_BIN_10 +231 0x0000 //RX_FDEQ_BIN_11 +232 0x0000 //RX_FDEQ_BIN_12 +233 0x0000 //RX_FDEQ_BIN_13 +234 0x0000 //RX_FDEQ_BIN_14 +235 0x0000 //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x4000 //RX_FDEQ_RESRV_0 +245 0x0320 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0030 //RX_FDDRC_BAND_MARGIN_1 +248 0x0050 //RX_FDDRC_BAND_MARGIN_2 +249 0x0080 //RX_FDDRC_BAND_MARGIN_3 +250 0x0007 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x5000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x6400 //RX_FDDRC_THRD_3_2 +258 0x6400 //RX_FDDRC_THRD_3_3 +259 0x2000 //RX_FDDRC_SLANT_0_0 +260 0x2000 //RX_FDDRC_SLANT_0_1 +261 0x2000 //RX_FDDRC_SLANT_0_2 +262 0x2000 //RX_FDDRC_SLANT_0_3 +263 0x5333 //RX_FDDRC_SLANT_1_0 +264 0x5333 //RX_FDDRC_SLANT_1_1 +265 0x5333 //RX_FDDRC_SLANT_1_2 +266 0x5333 //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +286 0x0100 //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 +#VOL 1 +163 0x3000 //RX_TDDRC_ALPHA_UP_1 +164 0x3000 //RX_TDDRC_ALPHA_UP_2 +165 0x3000 //RX_TDDRC_ALPHA_UP_3 +166 0x3000 //RX_TDDRC_ALPHA_UP_4 +184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +190 0x7FFF //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +269 0x0000 //RX_TDDRC_THRD_0 +270 0x0000 //RX_TDDRC_THRD_1 +271 0x7FFF //RX_TDDRC_THRD_2 +272 0x7FFF //RX_TDDRC_THRD_3 +273 0x7FFF //RX_TDDRC_SLANT_0 +274 0x7EB8 //RX_TDDRC_SLANT_1 +275 0x3000 //RX_TDDRC_ALPHA_UP_0 +276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x199A //RX_TDDRC_HMNC_GAIN +279 0x0001 //RX_TDDRC_SMT_FLAG +280 0x0CCD //RX_TDDRC_SMT_W +281 0x017F //RX_TDDRC_DRC_GAIN +195 0x0014 //RX_FDEQ_SUBNUM +196 0x4848 //RX_FDEQ_GAIN_0 +197 0x4848 //RX_FDEQ_GAIN_1 +198 0x4848 //RX_FDEQ_GAIN_2 +199 0x4848 //RX_FDEQ_GAIN_3 +200 0x4848 //RX_FDEQ_GAIN_4 +201 0x4848 //RX_FDEQ_GAIN_5 +202 0x4444 //RX_FDEQ_GAIN_6 +203 0x4040 //RX_FDEQ_GAIN_7 +204 0x4040 //RX_FDEQ_GAIN_8 +205 0x4040 //RX_FDEQ_GAIN_9 +206 0x4848 //RX_FDEQ_GAIN_10 +207 0x4848 //RX_FDEQ_GAIN_11 +208 0x4848 //RX_FDEQ_GAIN_12 +209 0x4848 //RX_FDEQ_GAIN_13 +210 0x4848 //RX_FDEQ_GAIN_14 +211 0x4848 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0202 //RX_FDEQ_BIN_0 +221 0x0203 //RX_FDEQ_BIN_1 +222 0x0303 //RX_FDEQ_BIN_2 +223 0x0304 //RX_FDEQ_BIN_3 +224 0x0405 //RX_FDEQ_BIN_4 +225 0x0506 //RX_FDEQ_BIN_5 +226 0x0708 //RX_FDEQ_BIN_6 +227 0x090A //RX_FDEQ_BIN_7 +228 0x0B0C //RX_FDEQ_BIN_8 +229 0x0D0E //RX_FDEQ_BIN_9 +230 0x0000 //RX_FDEQ_BIN_10 +231 0x0000 //RX_FDEQ_BIN_11 +232 0x0000 //RX_FDEQ_BIN_12 +233 0x0000 //RX_FDEQ_BIN_13 +234 0x0000 //RX_FDEQ_BIN_14 +235 0x0000 //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x4000 //RX_FDEQ_RESRV_0 +245 0x0320 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0030 //RX_FDDRC_BAND_MARGIN_1 +248 0x0050 //RX_FDDRC_BAND_MARGIN_2 +249 0x0080 //RX_FDDRC_BAND_MARGIN_3 +250 0x0007 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x5000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x6400 //RX_FDDRC_THRD_3_2 +258 0x6400 //RX_FDDRC_THRD_3_3 +259 0x2000 //RX_FDDRC_SLANT_0_0 +260 0x2000 //RX_FDDRC_SLANT_0_1 +261 0x2000 //RX_FDDRC_SLANT_0_2 +262 0x2000 //RX_FDDRC_SLANT_0_3 +263 0x5333 //RX_FDDRC_SLANT_1_0 +264 0x5333 //RX_FDDRC_SLANT_1_1 +265 0x5333 //RX_FDDRC_SLANT_1_2 +266 0x5333 //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +286 0x0100 //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 +#VOL 2 +163 0x3000 //RX_TDDRC_ALPHA_UP_1 +164 0x3000 //RX_TDDRC_ALPHA_UP_2 +165 0x3000 //RX_TDDRC_ALPHA_UP_3 +166 0x3000 //RX_TDDRC_ALPHA_UP_4 +184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +190 0x7FFF //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +269 0x0000 //RX_TDDRC_THRD_0 +270 0x0000 //RX_TDDRC_THRD_1 +271 0x7FFF //RX_TDDRC_THRD_2 +272 0x7FFF //RX_TDDRC_THRD_3 +273 0x7FFF //RX_TDDRC_SLANT_0 +274 0x7EB8 //RX_TDDRC_SLANT_1 +275 0x3000 //RX_TDDRC_ALPHA_UP_0 +276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x199A //RX_TDDRC_HMNC_GAIN +279 0x0001 //RX_TDDRC_SMT_FLAG +280 0x0CCD //RX_TDDRC_SMT_W +281 0x017F //RX_TDDRC_DRC_GAIN +195 0x0014 //RX_FDEQ_SUBNUM +196 0x4848 //RX_FDEQ_GAIN_0 +197 0x4848 //RX_FDEQ_GAIN_1 +198 0x4848 //RX_FDEQ_GAIN_2 +199 0x4848 //RX_FDEQ_GAIN_3 +200 0x4848 //RX_FDEQ_GAIN_4 +201 0x4848 //RX_FDEQ_GAIN_5 +202 0x4444 //RX_FDEQ_GAIN_6 +203 0x4040 //RX_FDEQ_GAIN_7 +204 0x4040 //RX_FDEQ_GAIN_8 +205 0x4040 //RX_FDEQ_GAIN_9 +206 0x4848 //RX_FDEQ_GAIN_10 +207 0x4848 //RX_FDEQ_GAIN_11 +208 0x4848 //RX_FDEQ_GAIN_12 +209 0x4848 //RX_FDEQ_GAIN_13 +210 0x4848 //RX_FDEQ_GAIN_14 +211 0x4848 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0202 //RX_FDEQ_BIN_0 +221 0x0203 //RX_FDEQ_BIN_1 +222 0x0303 //RX_FDEQ_BIN_2 +223 0x0304 //RX_FDEQ_BIN_3 +224 0x0405 //RX_FDEQ_BIN_4 +225 0x0506 //RX_FDEQ_BIN_5 +226 0x0708 //RX_FDEQ_BIN_6 +227 0x090A //RX_FDEQ_BIN_7 +228 0x0B0C //RX_FDEQ_BIN_8 +229 0x0D0E //RX_FDEQ_BIN_9 +230 0x0000 //RX_FDEQ_BIN_10 +231 0x0000 //RX_FDEQ_BIN_11 +232 0x0000 //RX_FDEQ_BIN_12 +233 0x0000 //RX_FDEQ_BIN_13 +234 0x0000 //RX_FDEQ_BIN_14 +235 0x0000 //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x4000 //RX_FDEQ_RESRV_0 +245 0x0320 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0030 //RX_FDDRC_BAND_MARGIN_1 +248 0x0050 //RX_FDDRC_BAND_MARGIN_2 +249 0x0080 //RX_FDDRC_BAND_MARGIN_3 +250 0x0007 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x5000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x6400 //RX_FDDRC_THRD_3_2 +258 0x6400 //RX_FDDRC_THRD_3_3 +259 0x2000 //RX_FDDRC_SLANT_0_0 +260 0x2000 //RX_FDDRC_SLANT_0_1 +261 0x2000 //RX_FDDRC_SLANT_0_2 +262 0x2000 //RX_FDDRC_SLANT_0_3 +263 0x5333 //RX_FDDRC_SLANT_1_0 +264 0x5333 //RX_FDDRC_SLANT_1_1 +265 0x5333 //RX_FDDRC_SLANT_1_2 +266 0x5333 //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +286 0x0100 //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 +#VOL 3 +163 0x3000 //RX_TDDRC_ALPHA_UP_1 +164 0x3000 //RX_TDDRC_ALPHA_UP_2 +165 0x3000 //RX_TDDRC_ALPHA_UP_3 +166 0x3000 //RX_TDDRC_ALPHA_UP_4 +184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +190 0x7FFF //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +269 0x0000 //RX_TDDRC_THRD_0 +270 0x0000 //RX_TDDRC_THRD_1 +271 0x7FFF //RX_TDDRC_THRD_2 +272 0x7FFF //RX_TDDRC_THRD_3 +273 0x7FFF //RX_TDDRC_SLANT_0 +274 0x7EB8 //RX_TDDRC_SLANT_1 +275 0x3000 //RX_TDDRC_ALPHA_UP_0 +276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x199A //RX_TDDRC_HMNC_GAIN +279 0x0001 //RX_TDDRC_SMT_FLAG +280 0x0CCD //RX_TDDRC_SMT_W +281 0x017F //RX_TDDRC_DRC_GAIN +195 0x0014 //RX_FDEQ_SUBNUM +196 0x4848 //RX_FDEQ_GAIN_0 +197 0x4848 //RX_FDEQ_GAIN_1 +198 0x4848 //RX_FDEQ_GAIN_2 +199 0x4848 //RX_FDEQ_GAIN_3 +200 0x4848 //RX_FDEQ_GAIN_4 +201 0x4848 //RX_FDEQ_GAIN_5 +202 0x4444 //RX_FDEQ_GAIN_6 +203 0x4040 //RX_FDEQ_GAIN_7 +204 0x4040 //RX_FDEQ_GAIN_8 +205 0x4040 //RX_FDEQ_GAIN_9 +206 0x4848 //RX_FDEQ_GAIN_10 +207 0x4848 //RX_FDEQ_GAIN_11 +208 0x4848 //RX_FDEQ_GAIN_12 +209 0x4848 //RX_FDEQ_GAIN_13 +210 0x4848 //RX_FDEQ_GAIN_14 +211 0x4848 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0202 //RX_FDEQ_BIN_0 +221 0x0203 //RX_FDEQ_BIN_1 +222 0x0303 //RX_FDEQ_BIN_2 +223 0x0304 //RX_FDEQ_BIN_3 +224 0x0405 //RX_FDEQ_BIN_4 +225 0x0506 //RX_FDEQ_BIN_5 +226 0x0708 //RX_FDEQ_BIN_6 +227 0x090A //RX_FDEQ_BIN_7 +228 0x0B0C //RX_FDEQ_BIN_8 +229 0x0D0E //RX_FDEQ_BIN_9 +230 0x0000 //RX_FDEQ_BIN_10 +231 0x0000 //RX_FDEQ_BIN_11 +232 0x0000 //RX_FDEQ_BIN_12 +233 0x0000 //RX_FDEQ_BIN_13 +234 0x0000 //RX_FDEQ_BIN_14 +235 0x0000 //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x4000 //RX_FDEQ_RESRV_0 +245 0x0320 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0030 //RX_FDDRC_BAND_MARGIN_1 +248 0x0050 //RX_FDDRC_BAND_MARGIN_2 +249 0x0080 //RX_FDDRC_BAND_MARGIN_3 +250 0x0007 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x5000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x6400 //RX_FDDRC_THRD_3_2 +258 0x6400 //RX_FDDRC_THRD_3_3 +259 0x2000 //RX_FDDRC_SLANT_0_0 +260 0x2000 //RX_FDDRC_SLANT_0_1 +261 0x2000 //RX_FDDRC_SLANT_0_2 +262 0x2000 //RX_FDDRC_SLANT_0_3 +263 0x5333 //RX_FDDRC_SLANT_1_0 +264 0x5333 //RX_FDDRC_SLANT_1_1 +265 0x5333 //RX_FDDRC_SLANT_1_2 +266 0x5333 //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +286 0x0100 //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 +#VOL 4 +163 0x3000 //RX_TDDRC_ALPHA_UP_1 +164 0x3000 //RX_TDDRC_ALPHA_UP_2 +165 0x3000 //RX_TDDRC_ALPHA_UP_3 +166 0x3000 //RX_TDDRC_ALPHA_UP_4 +184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +190 0x7FFF //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +269 0x0000 //RX_TDDRC_THRD_0 +270 0x0000 //RX_TDDRC_THRD_1 +271 0x7FFF //RX_TDDRC_THRD_2 +272 0x7FFF //RX_TDDRC_THRD_3 +273 0x7FFF //RX_TDDRC_SLANT_0 +274 0x7EB8 //RX_TDDRC_SLANT_1 +275 0x3000 //RX_TDDRC_ALPHA_UP_0 +276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x199A //RX_TDDRC_HMNC_GAIN +279 0x0001 //RX_TDDRC_SMT_FLAG +280 0x0CCD //RX_TDDRC_SMT_W +281 0x017F //RX_TDDRC_DRC_GAIN +195 0x0014 //RX_FDEQ_SUBNUM +196 0x4848 //RX_FDEQ_GAIN_0 +197 0x4848 //RX_FDEQ_GAIN_1 +198 0x4848 //RX_FDEQ_GAIN_2 +199 0x4848 //RX_FDEQ_GAIN_3 +200 0x4848 //RX_FDEQ_GAIN_4 +201 0x4848 //RX_FDEQ_GAIN_5 +202 0x4444 //RX_FDEQ_GAIN_6 +203 0x4040 //RX_FDEQ_GAIN_7 +204 0x4040 //RX_FDEQ_GAIN_8 +205 0x4040 //RX_FDEQ_GAIN_9 +206 0x4848 //RX_FDEQ_GAIN_10 +207 0x4848 //RX_FDEQ_GAIN_11 +208 0x4848 //RX_FDEQ_GAIN_12 +209 0x4848 //RX_FDEQ_GAIN_13 +210 0x4848 //RX_FDEQ_GAIN_14 +211 0x4848 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0202 //RX_FDEQ_BIN_0 +221 0x0203 //RX_FDEQ_BIN_1 +222 0x0303 //RX_FDEQ_BIN_2 +223 0x0304 //RX_FDEQ_BIN_3 +224 0x0405 //RX_FDEQ_BIN_4 +225 0x0506 //RX_FDEQ_BIN_5 +226 0x0708 //RX_FDEQ_BIN_6 +227 0x090A //RX_FDEQ_BIN_7 +228 0x0B0C //RX_FDEQ_BIN_8 +229 0x0D0E //RX_FDEQ_BIN_9 +230 0x0000 //RX_FDEQ_BIN_10 +231 0x0000 //RX_FDEQ_BIN_11 +232 0x0000 //RX_FDEQ_BIN_12 +233 0x0000 //RX_FDEQ_BIN_13 +234 0x0000 //RX_FDEQ_BIN_14 +235 0x0000 //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x4000 //RX_FDEQ_RESRV_0 +245 0x0320 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0030 //RX_FDDRC_BAND_MARGIN_1 +248 0x0050 //RX_FDDRC_BAND_MARGIN_2 +249 0x0080 //RX_FDDRC_BAND_MARGIN_3 +250 0x0007 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x5000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x6400 //RX_FDDRC_THRD_3_2 +258 0x6400 //RX_FDDRC_THRD_3_3 +259 0x2000 //RX_FDDRC_SLANT_0_0 +260 0x2000 //RX_FDDRC_SLANT_0_1 +261 0x2000 //RX_FDDRC_SLANT_0_2 +262 0x2000 //RX_FDDRC_SLANT_0_3 +263 0x5333 //RX_FDDRC_SLANT_1_0 +264 0x5333 //RX_FDDRC_SLANT_1_1 +265 0x5333 //RX_FDDRC_SLANT_1_2 +266 0x5333 //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +286 0x0100 //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 +#VOL 5 +163 0x3000 //RX_TDDRC_ALPHA_UP_1 +164 0x3000 //RX_TDDRC_ALPHA_UP_2 +165 0x3000 //RX_TDDRC_ALPHA_UP_3 +166 0x3000 //RX_TDDRC_ALPHA_UP_4 +184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +190 0x7FFF //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +269 0x0000 //RX_TDDRC_THRD_0 +270 0x0000 //RX_TDDRC_THRD_1 +271 0x7FFF //RX_TDDRC_THRD_2 +272 0x7FFF //RX_TDDRC_THRD_3 +273 0x7FFF //RX_TDDRC_SLANT_0 +274 0x7EB8 //RX_TDDRC_SLANT_1 +275 0x3000 //RX_TDDRC_ALPHA_UP_0 +276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x199A //RX_TDDRC_HMNC_GAIN +279 0x0001 //RX_TDDRC_SMT_FLAG +280 0x0CCD //RX_TDDRC_SMT_W +281 0x017F //RX_TDDRC_DRC_GAIN +195 0x0014 //RX_FDEQ_SUBNUM +196 0x4848 //RX_FDEQ_GAIN_0 +197 0x4848 //RX_FDEQ_GAIN_1 +198 0x4848 //RX_FDEQ_GAIN_2 +199 0x4848 //RX_FDEQ_GAIN_3 +200 0x4848 //RX_FDEQ_GAIN_4 +201 0x4848 //RX_FDEQ_GAIN_5 +202 0x4444 //RX_FDEQ_GAIN_6 +203 0x4040 //RX_FDEQ_GAIN_7 +204 0x4040 //RX_FDEQ_GAIN_8 +205 0x4040 //RX_FDEQ_GAIN_9 +206 0x4848 //RX_FDEQ_GAIN_10 +207 0x4848 //RX_FDEQ_GAIN_11 +208 0x4848 //RX_FDEQ_GAIN_12 +209 0x4848 //RX_FDEQ_GAIN_13 +210 0x4848 //RX_FDEQ_GAIN_14 +211 0x4848 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0202 //RX_FDEQ_BIN_0 +221 0x0203 //RX_FDEQ_BIN_1 +222 0x0303 //RX_FDEQ_BIN_2 +223 0x0304 //RX_FDEQ_BIN_3 +224 0x0405 //RX_FDEQ_BIN_4 +225 0x0506 //RX_FDEQ_BIN_5 +226 0x0708 //RX_FDEQ_BIN_6 +227 0x090A //RX_FDEQ_BIN_7 +228 0x0B0C //RX_FDEQ_BIN_8 +229 0x0D0E //RX_FDEQ_BIN_9 +230 0x0000 //RX_FDEQ_BIN_10 +231 0x0000 //RX_FDEQ_BIN_11 +232 0x0000 //RX_FDEQ_BIN_12 +233 0x0000 //RX_FDEQ_BIN_13 +234 0x0000 //RX_FDEQ_BIN_14 +235 0x0000 //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x4000 //RX_FDEQ_RESRV_0 +245 0x0320 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0030 //RX_FDDRC_BAND_MARGIN_1 +248 0x0050 //RX_FDDRC_BAND_MARGIN_2 +249 0x0080 //RX_FDDRC_BAND_MARGIN_3 +250 0x0007 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x5000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x6400 //RX_FDDRC_THRD_3_2 +258 0x6400 //RX_FDDRC_THRD_3_3 +259 0x2000 //RX_FDDRC_SLANT_0_0 +260 0x2000 //RX_FDDRC_SLANT_0_1 +261 0x2000 //RX_FDDRC_SLANT_0_2 +262 0x2000 //RX_FDDRC_SLANT_0_3 +263 0x5333 //RX_FDDRC_SLANT_1_0 +264 0x5333 //RX_FDDRC_SLANT_1_1 +265 0x5333 //RX_FDDRC_SLANT_1_2 +266 0x5333 //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +286 0x0100 //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 +#VOL 6 +163 0x3000 //RX_TDDRC_ALPHA_UP_1 +164 0x3000 //RX_TDDRC_ALPHA_UP_2 +165 0x3000 //RX_TDDRC_ALPHA_UP_3 +166 0x3000 //RX_TDDRC_ALPHA_UP_4 +184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +190 0x7FFF //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +269 0x0000 //RX_TDDRC_THRD_0 +270 0x0000 //RX_TDDRC_THRD_1 +271 0x7FFF //RX_TDDRC_THRD_2 +272 0x7FFF //RX_TDDRC_THRD_3 +273 0x7FFF //RX_TDDRC_SLANT_0 +274 0x7EB8 //RX_TDDRC_SLANT_1 +275 0x3000 //RX_TDDRC_ALPHA_UP_0 +276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x199A //RX_TDDRC_HMNC_GAIN +279 0x0001 //RX_TDDRC_SMT_FLAG +280 0x0CCD //RX_TDDRC_SMT_W +281 0x017F //RX_TDDRC_DRC_GAIN +195 0x0014 //RX_FDEQ_SUBNUM +196 0x4848 //RX_FDEQ_GAIN_0 +197 0x4848 //RX_FDEQ_GAIN_1 +198 0x4848 //RX_FDEQ_GAIN_2 +199 0x4848 //RX_FDEQ_GAIN_3 +200 0x4848 //RX_FDEQ_GAIN_4 +201 0x4848 //RX_FDEQ_GAIN_5 +202 0x4444 //RX_FDEQ_GAIN_6 +203 0x4040 //RX_FDEQ_GAIN_7 +204 0x4040 //RX_FDEQ_GAIN_8 +205 0x4040 //RX_FDEQ_GAIN_9 +206 0x4848 //RX_FDEQ_GAIN_10 +207 0x4848 //RX_FDEQ_GAIN_11 +208 0x4848 //RX_FDEQ_GAIN_12 +209 0x4848 //RX_FDEQ_GAIN_13 +210 0x4848 //RX_FDEQ_GAIN_14 +211 0x4848 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0202 //RX_FDEQ_BIN_0 +221 0x0203 //RX_FDEQ_BIN_1 +222 0x0303 //RX_FDEQ_BIN_2 +223 0x0304 //RX_FDEQ_BIN_3 +224 0x0405 //RX_FDEQ_BIN_4 +225 0x0506 //RX_FDEQ_BIN_5 +226 0x0708 //RX_FDEQ_BIN_6 +227 0x090A //RX_FDEQ_BIN_7 +228 0x0B0C //RX_FDEQ_BIN_8 +229 0x0D0E //RX_FDEQ_BIN_9 +230 0x0000 //RX_FDEQ_BIN_10 +231 0x0000 //RX_FDEQ_BIN_11 +232 0x0000 //RX_FDEQ_BIN_12 +233 0x0000 //RX_FDEQ_BIN_13 +234 0x0000 //RX_FDEQ_BIN_14 +235 0x0000 //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x4000 //RX_FDEQ_RESRV_0 +245 0x0320 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0030 //RX_FDDRC_BAND_MARGIN_1 +248 0x0050 //RX_FDDRC_BAND_MARGIN_2 +249 0x0080 //RX_FDDRC_BAND_MARGIN_3 +250 0x0007 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x5000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x6400 //RX_FDDRC_THRD_3_2 +258 0x6400 //RX_FDDRC_THRD_3_3 +259 0x2000 //RX_FDDRC_SLANT_0_0 +260 0x2000 //RX_FDDRC_SLANT_0_1 +261 0x2000 //RX_FDDRC_SLANT_0_2 +262 0x2000 //RX_FDDRC_SLANT_0_3 +263 0x5333 //RX_FDDRC_SLANT_1_0 +264 0x5333 //RX_FDDRC_SLANT_1_1 +265 0x5333 //RX_FDDRC_SLANT_1_2 +266 0x5333 //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +286 0x0100 //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 #CASE_NAME BLUETOOTH-BTWB-VOICE_GENERIC-WB -#PARAM_TYPE TX+RX -#TOTAL_CUSTOM_STEP 7 +#PARAM_MODE Full +#PARAM_TYPE TX+2RX +#TOTAL_CUSTOM_STEP 7+7 #TX 0 0x0008 //TX_OPERATION_MODE_0 1 0x0008 //TX_OPERATION_MODE_1 @@ -24800,20 +37639,20 @@ 248 0xF400 //TX_THR_SN_EST_6 249 0xF600 //TX_THR_SN_EST_7 250 0x0000 //TX_DELTA_THR_SN_EST_0 -251 0x0000 //TX_DELTA_THR_SN_EST_1 +251 0x0200 //TX_DELTA_THR_SN_EST_1 252 0x0200 //TX_DELTA_THR_SN_EST_2 253 0x0200 //TX_DELTA_THR_SN_EST_3 254 0x0200 //TX_DELTA_THR_SN_EST_4 255 0x0200 //TX_DELTA_THR_SN_EST_5 -256 0x0200 //TX_DELTA_THR_SN_EST_6 +256 0x0000 //TX_DELTA_THR_SN_EST_6 257 0x0200 //TX_DELTA_THR_SN_EST_7 258 0x6000 //TX_LAMBDA_NN_EST_0 -259 0x6000 //TX_LAMBDA_NN_EST_1 +259 0x4000 //TX_LAMBDA_NN_EST_1 260 0x4000 //TX_LAMBDA_NN_EST_2 261 0x4000 //TX_LAMBDA_NN_EST_3 262 0x4000 //TX_LAMBDA_NN_EST_4 263 0x4000 //TX_LAMBDA_NN_EST_5 -264 0x4000 //TX_LAMBDA_NN_EST_6 +264 0x6000 //TX_LAMBDA_NN_EST_6 265 0x4000 //TX_LAMBDA_NN_EST_7 266 0x0400 //TX_N_SN_EST 267 0x001E //TX_INBEAM_T @@ -24831,16 +37670,16 @@ 279 0x1000 //TX_B_POST_FLT_0 280 0x1000 //TX_B_POST_FLT_1 281 0x000F //TX_NS_LVL_CTRL_0 -282 0x000F //TX_NS_LVL_CTRL_1 -283 0x0011 //TX_NS_LVL_CTRL_2 +282 0x0011 //TX_NS_LVL_CTRL_1 +283 0x000F //TX_NS_LVL_CTRL_2 284 0x000F //TX_NS_LVL_CTRL_3 285 0x000F //TX_NS_LVL_CTRL_4 286 0x000F //TX_NS_LVL_CTRL_5 287 0x000F //TX_NS_LVL_CTRL_6 288 0x0011 //TX_NS_LVL_CTRL_7 289 0x000C //TX_MIN_GAIN_S_0 -290 0x000C //TX_MIN_GAIN_S_1 -291 0x000F //TX_MIN_GAIN_S_2 +290 0x000F //TX_MIN_GAIN_S_1 +291 0x000C //TX_MIN_GAIN_S_2 292 0x000C //TX_MIN_GAIN_S_3 293 0x000C //TX_MIN_GAIN_S_4 294 0x000C //TX_MIN_GAIN_S_5 @@ -24864,12 +37703,12 @@ 312 0x7FFF //TX_A_POST_FILT_0 313 0x2000 //TX_A_POST_FILT_1 314 0x4000 //TX_A_POST_FILT_S_0 -315 0x4000 //TX_A_POST_FILT_S_1 +315 0x5000 //TX_A_POST_FILT_S_1 316 0x5000 //TX_A_POST_FILT_S_2 317 0x5000 //TX_A_POST_FILT_S_3 318 0x5000 //TX_A_POST_FILT_S_4 319 0x5000 //TX_A_POST_FILT_S_5 -320 0x5000 //TX_A_POST_FILT_S_6 +320 0x4000 //TX_A_POST_FILT_S_6 321 0x5000 //TX_A_POST_FILT_S_7 322 0x1000 //TX_B_POST_FILT_0 323 0x1000 //TX_B_POST_FILT_1 @@ -24929,10 +37768,10 @@ 377 0x7FFF //TX_NOISE_TH_5_4 378 0x044C //TX_NOISE_TH_6 379 0x0014 //TX_MINENOISE_TH -380 0x4000 //TX_MINENOISE_MIC0_TH_MTS -381 0xFFEE //TX_MINENOISE_MIC0_TH_EXP -382 0x6000 //TX_MINENOISE_MIC0_S_TH_MTS -383 0xFFF3 //TX_MINENOISE_MIC0_S_TH_EXP +380 0x4000 //TX_MORENS_TFMASK_TH +381 0xFFEE //TX_DRC_QUIET_FLOOR +382 0x6000 //TX_RATIODTL_CUT_TH +383 0xFFF3 //TX_DT_CUT_K1 384 0x0666 //TX_OUT_ENER_S_TH_CLEAN 385 0x0666 //TX_OUT_ENER_S_TH_LESSCLEAN 386 0x0333 //TX_OUT_ENER_S_TH_NOISY @@ -24940,15 +37779,15 @@ 388 0x0333 //TX_OUT_ENER_TH_SPEECH 389 0x2000 //TX_SN_NPB_GAIN 390 0x0000 //TX_NN_NPB_GAIN -391 0x0000 //TX_CSX_ALPHA_0 -392 0x0000 //TX_CSX_ALPHA_1 -393 0x0000 //TX_CSX_ALPHA_2 -394 0x0000 //TX_CSX_ALPHA_3 -395 0x0800 //TX_MU_ARSP_EST -396 0x00C8 //TX_P_OUTBEAM_MIN_TH +391 0x0000 //TX_POST_MASK_SUP_HSNE +392 0x0000 //TX_TAIL_DET_TH +393 0x0000 //TX_B_LESSCUT_RTO_WTA +394 0x0000 //TX_MEL_G_R +395 0x0800 //TX_SUPHIGH_TH +396 0x00C8 //TX_MASK_G_R 397 0x0002 //TX_EXTRA_NS_L -398 0x0800 //TX_EXTRA_NS_A -399 0x0005 //TX_VR_NOISE_FLOOR_TH +398 0x0800 //TX_C_POST_FLT_MASK +399 0x0005 //TX_A_POST_FLT_WNS 400 0x0148 //TX_MIN_G_LOW300HZ 401 0x0002 //TX_MAXLEVEL_CNG 402 0x00B4 //TX_STN_NOISE_TH @@ -25063,16 +37902,16 @@ 511 0x6666 //TX_MIC_TO_BFGAIN 512 0x0000 //TX_MICTOBFGAIN0 513 0x0000 //TX_FASTMUE_TH -514 0x0000 //TX_DERVB_LEN_0 -515 0x0000 //TX_DERVB_LEN_1 -516 0x0000 //TX_RHO_DERVB -517 0x0000 //TX_MIC_INDX_DERVB -518 0x0000 //TX_MU_DERVB -519 0x0000 //TX_DR_RESRV_0 -520 0x0000 //TX_DR_RESRV_1 -521 0x0000 //TX_DR_RESRV_2 -522 0x0000 //TX_DR_RESRV_3 -523 0x0000 //TX_DR_RESRV_4 +514 0x0000 //TX_DEREVERB_LF_MU +515 0x0000 //TX_DEREVERB_HF_MU +516 0x0000 //TX_DEREVERB_DELAY +517 0x0000 //TX_DEREVERB_COEF_LEN +518 0x0000 //TX_DEREVERB_DNR +519 0x0000 //TX_DEREVERB_ALPHA +520 0x0000 //TX_DEREVERB_BETA +521 0x0000 //TX_GSC_RTOL_TH +522 0x0000 //TX_GSC_RTOH_TH +523 0x0000 //TX_WIDE2_MEANHTH 524 0x0000 //TX_DR_RESRV_5 525 0x0000 //TX_DR_RESRV_6 526 0x0000 //TX_DR_RESRV_7 @@ -25446,8 +38285,73 @@ 894 0xC000 //TX_FASTNS_SSA_THHFL 895 0xCCCC //TX_FASTNS_SSA_THLFH 896 0xD999 //TX_FASTNS_SSA_THHFH +897 0x0000 //TX_SENDFUNC_REG_MICMUTE +898 0x0000 //TX_SENDFUNC_REG_MICMUTE1 +899 0x0000 //TX_MICMUTE_RATIO_THR +900 0x0000 //TX_MICMUTE_AMP_THR +901 0x0000 //TX_MICMUTE_HPF_IND +902 0x0000 //TX_MICMUTE_LOG_EYR_TH +903 0x0000 //TX_MICMUTE_CVG_TIME +904 0x0000 //TX_MICMUTE_RELEASE_TIME +905 0x0000 //TX_MIC_VOLUME_MIC0MUTE +906 0x0000 //TX_MICMUTE_EPD_OFFSET_0 +907 0x0000 //TX_MICMUTE_FRQ_AEC_L +908 0x0000 //TX_MICMUTE_EAD_THR +909 0x0000 //TX_MICMUTE_LAMBDA_CB_NLE +910 0x0000 //TX_MICMUTE_LAMBDA_RE_EST +911 0x0000 //TX_DTD_THR1_MICMUTE_0 +912 0x0000 //TX_DTD_THR1_MICMUTE_1 +913 0x0000 //TX_DTD_THR1_MICMUTE_2 +914 0x0000 //TX_DTD_THR1_MICMUTE_3 +915 0x0000 //TX_DTD_THR2_MICMUTE_0 +916 0x0000 //TX_MICMUTE_MIN_EQ_RE_EST_0 +917 0x0000 //TX_MICMUTE_MIN_EQ_RE_EST_1 +918 0x0000 //TX_MICMUTE_MIN_EQ_RE_EST_2 +919 0x0000 //TX_MICMUTE_MIN_EQ_RE_EST_3 +920 0x0000 //TX_MICMUTE_MIN_EQ_RE_EST_4 +921 0x0000 //TX_MICMUTE_C_POST_FLT +922 0x0000 //TX_MICMUTE_DT_CUT_K +923 0x0000 //TX_MICMUTE_DT_CUT_THR +924 0x0000 //TX_MICMUTE_DT_CUT_K2 +925 0x0000 //TX_MICMUTE_DT_CUT_THR2 +926 0x0000 //TX_MICMUTE_DT2_HOLD_N +927 0x0000 //TX_MICMUTE_RATIODTH_THCUT +928 0x0000 //TX_MICMUTE_B_POST_FLT_ECHOL +929 0x0000 //TX_MICMUTE_B_POST_FLT_ECHOH +930 0x0000 //TX_MICMUTE_C_POST_FLT_MASK +931 0x0000 //TX_MICMUTE_RATIODTL_CUT_TH +932 0x0000 //TX_MICMUTE_DT_CUT_K1 +933 0x0000 //TX_MICMUTE_N2_SN_EST +934 0x0000 //TX_MICMUTE_THR_SN_EST_0 +935 0x0000 //TX_MICMUTE_MIN_G_CTRL_0 +936 0x0000 //TX_MICMUTE_A_POST_FILT_S_0 +937 0x0000 //TX_MICMUTE_B_POST_FILT_0 +938 0x0000 //TX_MIC1RUB_AMP_THR +939 0x0000 //TX_MIC1MUTE_RATIO_THR +940 0x0000 //TX_MIC1MUTE_AMP_THR +941 0x0000 //TX_MIC1MUTE_CVG_TIME +942 0x0000 //TX_MIC1MUTE_RELEASE_TIME +943 0x0000 //TX_AMS_RESRV_01 +944 0x0000 //TX_AMS_RESRV_02 +945 0x0000 //TX_AMS_RESRV_03 +946 0x0000 //TX_AMS_RESRV_04 +947 0x0000 //TX_AMS_RESRV_05 +948 0x0000 //TX_AMS_RESRV_06 +949 0x0000 //TX_AMS_RESRV_07 +950 0x0000 //TX_AMS_RESRV_08 +951 0x0000 //TX_AMS_RESRV_09 +952 0x0000 //TX_AMS_RESRV_10 +953 0x0000 //TX_AMS_RESRV_11 +954 0x0000 //TX_AMS_RESRV_12 +955 0x0000 //TX_AMS_RESRV_13 +956 0x0000 //TX_AMS_RESRV_14 +957 0x0000 //TX_AMS_RESRV_15 +958 0x0000 //TX_AMS_RESRV_16 +959 0x0000 //TX_AMS_RESRV_17 +960 0x0000 //TX_AMS_RESRV_18 +961 0x0000 //TX_AMS_RESRV_19 #RX -0 0x006C //RX_RECVFUNC_MODE_0 +0 0x206C //RX_RECVFUNC_MODE_0 1 0x0000 //RX_RECVFUNC_MODE_1 2 0x0001 //RX_SAMPLINGFREQ_SIG 3 0x0001 //RX_SAMPLINGFREQ_PROC @@ -26297,10 +39201,862 @@ 110 0x0000 //RX_FDDRC_RESRV_0 129 0x0100 //RX_SPK_VOL 130 0x0000 //RX_VOL_RESRV_0 +#RX 2 +157 0x206C //RX_RECVFUNC_MODE_0 +158 0x0000 //RX_RECVFUNC_MODE_1 +159 0x0001 //RX_SAMPLINGFREQ_SIG +160 0x0001 //RX_SAMPLINGFREQ_PROC +161 0x000A //RX_FRAME_SZ +162 0x0000 //RX_DELAY_OPT +163 0x1000 //RX_TDDRC_ALPHA_UP_1 +164 0x1000 //RX_TDDRC_ALPHA_UP_2 +165 0x1000 //RX_TDDRC_ALPHA_UP_3 +166 0x1000 //RX_TDDRC_ALPHA_UP_4 +167 0x0800 //RX_PGA +168 0x7FFF //RX_A_HP +169 0x4000 //RX_B_PE +170 0x3800 //RX_THR_PITCH_DET_0 +171 0x3000 //RX_THR_PITCH_DET_1 +172 0x2800 //RX_THR_PITCH_DET_2 +173 0x0008 //RX_PITCH_BFR_LEN +174 0x0003 //RX_SBD_PITCH_DET +175 0x0100 //RX_PP_RESRV_0 +176 0x0020 //RX_PP_RESRV_1 +177 0x0600 //RX_N_SN_EST +178 0x000C //RX_N2_SN_EST +179 0x0010 //RX_NS_LVL_CTRL +180 0xF800 //RX_THR_SN_EST +181 0x7CCD //RX_LAMBDA_PFILT +182 0x000A //RX_FENS_RESRV_0 +183 0x0190 //RX_FENS_RESRV_1 +184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +187 0x0002 //RX_EXTRA_NS_L +188 0x0800 //RX_EXTRA_NS_A +189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +190 0x7FFF //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +192 0x199A //RX_A_POST_FLT +193 0x0000 //RX_LMT_THRD +194 0x4000 //RX_LMT_ALPHA +195 0x001C //RX_FDEQ_SUBNUM +196 0x4848 //RX_FDEQ_GAIN_0 +197 0x4848 //RX_FDEQ_GAIN_1 +198 0x4848 //RX_FDEQ_GAIN_2 +199 0x4848 //RX_FDEQ_GAIN_3 +200 0x4848 //RX_FDEQ_GAIN_4 +201 0x4848 //RX_FDEQ_GAIN_5 +202 0x4848 //RX_FDEQ_GAIN_6 +203 0x4848 //RX_FDEQ_GAIN_7 +204 0x4848 //RX_FDEQ_GAIN_8 +205 0x3C3C //RX_FDEQ_GAIN_9 +206 0x3C3C //RX_FDEQ_GAIN_10 +207 0x3838 //RX_FDEQ_GAIN_11 +208 0x3838 //RX_FDEQ_GAIN_12 +209 0x3030 //RX_FDEQ_GAIN_13 +210 0x4848 //RX_FDEQ_GAIN_14 +211 0x4848 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0202 //RX_FDEQ_BIN_0 +221 0x0203 //RX_FDEQ_BIN_1 +222 0x0303 //RX_FDEQ_BIN_2 +223 0x0304 //RX_FDEQ_BIN_3 +224 0x0405 //RX_FDEQ_BIN_4 +225 0x0506 //RX_FDEQ_BIN_5 +226 0x0708 //RX_FDEQ_BIN_6 +227 0x090A //RX_FDEQ_BIN_7 +228 0x0B0C //RX_FDEQ_BIN_8 +229 0x0D0E //RX_FDEQ_BIN_9 +230 0x0E0F //RX_FDEQ_BIN_10 +231 0x0F10 //RX_FDEQ_BIN_11 +232 0x1011 //RX_FDEQ_BIN_12 +233 0x1112 //RX_FDEQ_BIN_13 +234 0x0000 //RX_FDEQ_BIN_14 +235 0x0000 //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x4000 //RX_FDEQ_RESRV_0 +245 0x0320 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0030 //RX_FDDRC_BAND_MARGIN_1 +248 0x0050 //RX_FDDRC_BAND_MARGIN_2 +249 0x0080 //RX_FDDRC_BAND_MARGIN_3 +250 0x0007 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x5000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x6400 //RX_FDDRC_THRD_3_2 +258 0x6400 //RX_FDDRC_THRD_3_3 +259 0x2000 //RX_FDDRC_SLANT_0_0 +260 0x2000 //RX_FDDRC_SLANT_0_1 +261 0x2000 //RX_FDDRC_SLANT_0_2 +262 0x2000 //RX_FDDRC_SLANT_0_3 +263 0x5333 //RX_FDDRC_SLANT_1_0 +264 0x5333 //RX_FDDRC_SLANT_1_1 +265 0x5333 //RX_FDDRC_SLANT_1_2 +266 0x5333 //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +268 0x0000 //RX_FILTINDX +269 0x0000 //RX_TDDRC_THRD_0 +270 0x0000 //RX_TDDRC_THRD_1 +271 0x7FFF //RX_TDDRC_THRD_2 +272 0x7FFF //RX_TDDRC_THRD_3 +273 0x7E70 //RX_TDDRC_SLANT_0 +274 0x7FFF //RX_TDDRC_SLANT_1 +275 0x1000 //RX_TDDRC_ALPHA_UP_0 +276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x199A //RX_TDDRC_HMNC_GAIN +279 0x0001 //RX_TDDRC_SMT_FLAG +280 0x0CCD //RX_TDDRC_SMT_W +281 0x0155 //RX_TDDRC_DRC_GAIN +282 0x7C00 //RX_LAMBDA_PKA_FP +283 0x2000 //RX_TPKA_FP +284 0x2000 //RX_MIN_G_FP +285 0x0080 //RX_MAX_G_FP +286 0x0100 //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 +288 0x0000 //RX_MAXLEVEL_CNG +289 0x3000 //RX_BWE_UV_TH +290 0x3000 //RX_BWE_UV_TH2 +291 0x1800 //RX_BWE_UV_TH3 +292 0x1000 //RX_BWE_V_TH +293 0x04CD //RX_BWE_GAIN1_V_TH1 +294 0x0F33 //RX_BWE_GAIN1_V_TH2 +295 0x7333 //RX_BWE_UV_EQ +296 0x199A //RX_BWE_V_EQ +297 0x7333 //RX_BWE_TONE_TH +298 0x0004 //RX_BWE_UV_HOLD_T +299 0x6CCD //RX_BWE_GAIN2_ALPHA +300 0x799A //RX_BWE_GAIN3_ALPHA +301 0x001E //RX_BWE_CUTOFF +302 0x3000 //RX_BWE_GAINFILL +303 0x3200 //RX_BWE_MAXTH_TONE +304 0x2000 //RX_BWE_EQ_0 +305 0x2000 //RX_BWE_EQ_1 +306 0x2000 //RX_BWE_EQ_2 +307 0x2000 //RX_BWE_EQ_3 +308 0x2000 //RX_BWE_EQ_4 +309 0x2000 //RX_BWE_EQ_5 +310 0x2000 //RX_BWE_EQ_6 +311 0x0000 //RX_BWE_RESRV_0 +312 0x0000 //RX_BWE_RESRV_1 +313 0x0000 //RX_BWE_RESRV_2 +#VOL 0 +163 0x1000 //RX_TDDRC_ALPHA_UP_1 +164 0x1000 //RX_TDDRC_ALPHA_UP_2 +165 0x1000 //RX_TDDRC_ALPHA_UP_3 +166 0x1000 //RX_TDDRC_ALPHA_UP_4 +184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +190 0x7FFF //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +269 0x0000 //RX_TDDRC_THRD_0 +270 0x0000 //RX_TDDRC_THRD_1 +271 0x7FFF //RX_TDDRC_THRD_2 +272 0x7FFF //RX_TDDRC_THRD_3 +273 0x7E70 //RX_TDDRC_SLANT_0 +274 0x7FFF //RX_TDDRC_SLANT_1 +275 0x1000 //RX_TDDRC_ALPHA_UP_0 +276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x199A //RX_TDDRC_HMNC_GAIN +279 0x0001 //RX_TDDRC_SMT_FLAG +280 0x0CCD //RX_TDDRC_SMT_W +281 0x0155 //RX_TDDRC_DRC_GAIN +195 0x001C //RX_FDEQ_SUBNUM +196 0x4848 //RX_FDEQ_GAIN_0 +197 0x4848 //RX_FDEQ_GAIN_1 +198 0x4848 //RX_FDEQ_GAIN_2 +199 0x4848 //RX_FDEQ_GAIN_3 +200 0x4848 //RX_FDEQ_GAIN_4 +201 0x4848 //RX_FDEQ_GAIN_5 +202 0x4848 //RX_FDEQ_GAIN_6 +203 0x4848 //RX_FDEQ_GAIN_7 +204 0x4848 //RX_FDEQ_GAIN_8 +205 0x3C3C //RX_FDEQ_GAIN_9 +206 0x3C3C //RX_FDEQ_GAIN_10 +207 0x3838 //RX_FDEQ_GAIN_11 +208 0x3838 //RX_FDEQ_GAIN_12 +209 0x3030 //RX_FDEQ_GAIN_13 +210 0x4848 //RX_FDEQ_GAIN_14 +211 0x4848 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0202 //RX_FDEQ_BIN_0 +221 0x0203 //RX_FDEQ_BIN_1 +222 0x0303 //RX_FDEQ_BIN_2 +223 0x0304 //RX_FDEQ_BIN_3 +224 0x0405 //RX_FDEQ_BIN_4 +225 0x0506 //RX_FDEQ_BIN_5 +226 0x0708 //RX_FDEQ_BIN_6 +227 0x090A //RX_FDEQ_BIN_7 +228 0x0B0C //RX_FDEQ_BIN_8 +229 0x0D0E //RX_FDEQ_BIN_9 +230 0x0E0F //RX_FDEQ_BIN_10 +231 0x0F10 //RX_FDEQ_BIN_11 +232 0x1011 //RX_FDEQ_BIN_12 +233 0x1112 //RX_FDEQ_BIN_13 +234 0x0000 //RX_FDEQ_BIN_14 +235 0x0000 //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x4000 //RX_FDEQ_RESRV_0 +245 0x0320 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0030 //RX_FDDRC_BAND_MARGIN_1 +248 0x0050 //RX_FDDRC_BAND_MARGIN_2 +249 0x0080 //RX_FDDRC_BAND_MARGIN_3 +250 0x0007 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x5000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x6400 //RX_FDDRC_THRD_3_2 +258 0x6400 //RX_FDDRC_THRD_3_3 +259 0x2000 //RX_FDDRC_SLANT_0_0 +260 0x2000 //RX_FDDRC_SLANT_0_1 +261 0x2000 //RX_FDDRC_SLANT_0_2 +262 0x2000 //RX_FDDRC_SLANT_0_3 +263 0x5333 //RX_FDDRC_SLANT_1_0 +264 0x5333 //RX_FDDRC_SLANT_1_1 +265 0x5333 //RX_FDDRC_SLANT_1_2 +266 0x5333 //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +286 0x0100 //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 +#VOL 1 +163 0x1000 //RX_TDDRC_ALPHA_UP_1 +164 0x1000 //RX_TDDRC_ALPHA_UP_2 +165 0x1000 //RX_TDDRC_ALPHA_UP_3 +166 0x1000 //RX_TDDRC_ALPHA_UP_4 +184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +190 0x7FFF //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +269 0x0000 //RX_TDDRC_THRD_0 +270 0x0000 //RX_TDDRC_THRD_1 +271 0x7FFF //RX_TDDRC_THRD_2 +272 0x7FFF //RX_TDDRC_THRD_3 +273 0x7E70 //RX_TDDRC_SLANT_0 +274 0x7FFF //RX_TDDRC_SLANT_1 +275 0x1000 //RX_TDDRC_ALPHA_UP_0 +276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x199A //RX_TDDRC_HMNC_GAIN +279 0x0001 //RX_TDDRC_SMT_FLAG +280 0x0CCD //RX_TDDRC_SMT_W +281 0x0155 //RX_TDDRC_DRC_GAIN +195 0x001C //RX_FDEQ_SUBNUM +196 0x4848 //RX_FDEQ_GAIN_0 +197 0x4848 //RX_FDEQ_GAIN_1 +198 0x4848 //RX_FDEQ_GAIN_2 +199 0x4848 //RX_FDEQ_GAIN_3 +200 0x4848 //RX_FDEQ_GAIN_4 +201 0x4848 //RX_FDEQ_GAIN_5 +202 0x4848 //RX_FDEQ_GAIN_6 +203 0x4848 //RX_FDEQ_GAIN_7 +204 0x4848 //RX_FDEQ_GAIN_8 +205 0x3C3C //RX_FDEQ_GAIN_9 +206 0x3C3C //RX_FDEQ_GAIN_10 +207 0x3838 //RX_FDEQ_GAIN_11 +208 0x3838 //RX_FDEQ_GAIN_12 +209 0x3030 //RX_FDEQ_GAIN_13 +210 0x4848 //RX_FDEQ_GAIN_14 +211 0x4848 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0202 //RX_FDEQ_BIN_0 +221 0x0203 //RX_FDEQ_BIN_1 +222 0x0303 //RX_FDEQ_BIN_2 +223 0x0304 //RX_FDEQ_BIN_3 +224 0x0405 //RX_FDEQ_BIN_4 +225 0x0506 //RX_FDEQ_BIN_5 +226 0x0708 //RX_FDEQ_BIN_6 +227 0x090A //RX_FDEQ_BIN_7 +228 0x0B0C //RX_FDEQ_BIN_8 +229 0x0D0E //RX_FDEQ_BIN_9 +230 0x0E0F //RX_FDEQ_BIN_10 +231 0x0F10 //RX_FDEQ_BIN_11 +232 0x1011 //RX_FDEQ_BIN_12 +233 0x1112 //RX_FDEQ_BIN_13 +234 0x0000 //RX_FDEQ_BIN_14 +235 0x0000 //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x4000 //RX_FDEQ_RESRV_0 +245 0x0320 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0030 //RX_FDDRC_BAND_MARGIN_1 +248 0x0050 //RX_FDDRC_BAND_MARGIN_2 +249 0x0080 //RX_FDDRC_BAND_MARGIN_3 +250 0x0007 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x5000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x6400 //RX_FDDRC_THRD_3_2 +258 0x6400 //RX_FDDRC_THRD_3_3 +259 0x2000 //RX_FDDRC_SLANT_0_0 +260 0x2000 //RX_FDDRC_SLANT_0_1 +261 0x2000 //RX_FDDRC_SLANT_0_2 +262 0x2000 //RX_FDDRC_SLANT_0_3 +263 0x5333 //RX_FDDRC_SLANT_1_0 +264 0x5333 //RX_FDDRC_SLANT_1_1 +265 0x5333 //RX_FDDRC_SLANT_1_2 +266 0x5333 //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +286 0x0100 //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 +#VOL 2 +163 0x1000 //RX_TDDRC_ALPHA_UP_1 +164 0x1000 //RX_TDDRC_ALPHA_UP_2 +165 0x1000 //RX_TDDRC_ALPHA_UP_3 +166 0x1000 //RX_TDDRC_ALPHA_UP_4 +184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +190 0x7FFF //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +269 0x0000 //RX_TDDRC_THRD_0 +270 0x0000 //RX_TDDRC_THRD_1 +271 0x7FFF //RX_TDDRC_THRD_2 +272 0x7FFF //RX_TDDRC_THRD_3 +273 0x7E70 //RX_TDDRC_SLANT_0 +274 0x7FFF //RX_TDDRC_SLANT_1 +275 0x1000 //RX_TDDRC_ALPHA_UP_0 +276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x199A //RX_TDDRC_HMNC_GAIN +279 0x0001 //RX_TDDRC_SMT_FLAG +280 0x0CCD //RX_TDDRC_SMT_W +281 0x0155 //RX_TDDRC_DRC_GAIN +195 0x001C //RX_FDEQ_SUBNUM +196 0x4848 //RX_FDEQ_GAIN_0 +197 0x4848 //RX_FDEQ_GAIN_1 +198 0x4848 //RX_FDEQ_GAIN_2 +199 0x4848 //RX_FDEQ_GAIN_3 +200 0x4848 //RX_FDEQ_GAIN_4 +201 0x4848 //RX_FDEQ_GAIN_5 +202 0x4848 //RX_FDEQ_GAIN_6 +203 0x4848 //RX_FDEQ_GAIN_7 +204 0x4848 //RX_FDEQ_GAIN_8 +205 0x3C3C //RX_FDEQ_GAIN_9 +206 0x3C3C //RX_FDEQ_GAIN_10 +207 0x3838 //RX_FDEQ_GAIN_11 +208 0x3838 //RX_FDEQ_GAIN_12 +209 0x3030 //RX_FDEQ_GAIN_13 +210 0x4848 //RX_FDEQ_GAIN_14 +211 0x4848 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0202 //RX_FDEQ_BIN_0 +221 0x0203 //RX_FDEQ_BIN_1 +222 0x0303 //RX_FDEQ_BIN_2 +223 0x0304 //RX_FDEQ_BIN_3 +224 0x0405 //RX_FDEQ_BIN_4 +225 0x0506 //RX_FDEQ_BIN_5 +226 0x0708 //RX_FDEQ_BIN_6 +227 0x090A //RX_FDEQ_BIN_7 +228 0x0B0C //RX_FDEQ_BIN_8 +229 0x0D0E //RX_FDEQ_BIN_9 +230 0x0E0F //RX_FDEQ_BIN_10 +231 0x0F10 //RX_FDEQ_BIN_11 +232 0x1011 //RX_FDEQ_BIN_12 +233 0x1112 //RX_FDEQ_BIN_13 +234 0x0000 //RX_FDEQ_BIN_14 +235 0x0000 //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x4000 //RX_FDEQ_RESRV_0 +245 0x0320 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0030 //RX_FDDRC_BAND_MARGIN_1 +248 0x0050 //RX_FDDRC_BAND_MARGIN_2 +249 0x0080 //RX_FDDRC_BAND_MARGIN_3 +250 0x0007 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x5000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x6400 //RX_FDDRC_THRD_3_2 +258 0x6400 //RX_FDDRC_THRD_3_3 +259 0x2000 //RX_FDDRC_SLANT_0_0 +260 0x2000 //RX_FDDRC_SLANT_0_1 +261 0x2000 //RX_FDDRC_SLANT_0_2 +262 0x2000 //RX_FDDRC_SLANT_0_3 +263 0x5333 //RX_FDDRC_SLANT_1_0 +264 0x5333 //RX_FDDRC_SLANT_1_1 +265 0x5333 //RX_FDDRC_SLANT_1_2 +266 0x5333 //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +286 0x0100 //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 +#VOL 3 +163 0x1000 //RX_TDDRC_ALPHA_UP_1 +164 0x1000 //RX_TDDRC_ALPHA_UP_2 +165 0x1000 //RX_TDDRC_ALPHA_UP_3 +166 0x1000 //RX_TDDRC_ALPHA_UP_4 +184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +190 0x7FFF //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +269 0x0000 //RX_TDDRC_THRD_0 +270 0x0000 //RX_TDDRC_THRD_1 +271 0x7FFF //RX_TDDRC_THRD_2 +272 0x7FFF //RX_TDDRC_THRD_3 +273 0x7E70 //RX_TDDRC_SLANT_0 +274 0x7FFF //RX_TDDRC_SLANT_1 +275 0x1000 //RX_TDDRC_ALPHA_UP_0 +276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x199A //RX_TDDRC_HMNC_GAIN +279 0x0001 //RX_TDDRC_SMT_FLAG +280 0x0CCD //RX_TDDRC_SMT_W +281 0x0155 //RX_TDDRC_DRC_GAIN +195 0x001C //RX_FDEQ_SUBNUM +196 0x4848 //RX_FDEQ_GAIN_0 +197 0x4848 //RX_FDEQ_GAIN_1 +198 0x4848 //RX_FDEQ_GAIN_2 +199 0x4848 //RX_FDEQ_GAIN_3 +200 0x4848 //RX_FDEQ_GAIN_4 +201 0x4848 //RX_FDEQ_GAIN_5 +202 0x4848 //RX_FDEQ_GAIN_6 +203 0x4848 //RX_FDEQ_GAIN_7 +204 0x4848 //RX_FDEQ_GAIN_8 +205 0x3C3C //RX_FDEQ_GAIN_9 +206 0x3C3C //RX_FDEQ_GAIN_10 +207 0x3838 //RX_FDEQ_GAIN_11 +208 0x3838 //RX_FDEQ_GAIN_12 +209 0x3030 //RX_FDEQ_GAIN_13 +210 0x4848 //RX_FDEQ_GAIN_14 +211 0x4848 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0202 //RX_FDEQ_BIN_0 +221 0x0203 //RX_FDEQ_BIN_1 +222 0x0303 //RX_FDEQ_BIN_2 +223 0x0304 //RX_FDEQ_BIN_3 +224 0x0405 //RX_FDEQ_BIN_4 +225 0x0506 //RX_FDEQ_BIN_5 +226 0x0708 //RX_FDEQ_BIN_6 +227 0x090A //RX_FDEQ_BIN_7 +228 0x0B0C //RX_FDEQ_BIN_8 +229 0x0D0E //RX_FDEQ_BIN_9 +230 0x0E0F //RX_FDEQ_BIN_10 +231 0x0F10 //RX_FDEQ_BIN_11 +232 0x1011 //RX_FDEQ_BIN_12 +233 0x1112 //RX_FDEQ_BIN_13 +234 0x0000 //RX_FDEQ_BIN_14 +235 0x0000 //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x4000 //RX_FDEQ_RESRV_0 +245 0x0320 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0030 //RX_FDDRC_BAND_MARGIN_1 +248 0x0050 //RX_FDDRC_BAND_MARGIN_2 +249 0x0080 //RX_FDDRC_BAND_MARGIN_3 +250 0x0007 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x5000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x6400 //RX_FDDRC_THRD_3_2 +258 0x6400 //RX_FDDRC_THRD_3_3 +259 0x2000 //RX_FDDRC_SLANT_0_0 +260 0x2000 //RX_FDDRC_SLANT_0_1 +261 0x2000 //RX_FDDRC_SLANT_0_2 +262 0x2000 //RX_FDDRC_SLANT_0_3 +263 0x5333 //RX_FDDRC_SLANT_1_0 +264 0x5333 //RX_FDDRC_SLANT_1_1 +265 0x5333 //RX_FDDRC_SLANT_1_2 +266 0x5333 //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +286 0x0100 //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 +#VOL 4 +163 0x1000 //RX_TDDRC_ALPHA_UP_1 +164 0x1000 //RX_TDDRC_ALPHA_UP_2 +165 0x1000 //RX_TDDRC_ALPHA_UP_3 +166 0x1000 //RX_TDDRC_ALPHA_UP_4 +184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +190 0x7FFF //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +269 0x0000 //RX_TDDRC_THRD_0 +270 0x0000 //RX_TDDRC_THRD_1 +271 0x7FFF //RX_TDDRC_THRD_2 +272 0x7FFF //RX_TDDRC_THRD_3 +273 0x7E70 //RX_TDDRC_SLANT_0 +274 0x7FFF //RX_TDDRC_SLANT_1 +275 0x1000 //RX_TDDRC_ALPHA_UP_0 +276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x199A //RX_TDDRC_HMNC_GAIN +279 0x0001 //RX_TDDRC_SMT_FLAG +280 0x0CCD //RX_TDDRC_SMT_W +281 0x0155 //RX_TDDRC_DRC_GAIN +195 0x001C //RX_FDEQ_SUBNUM +196 0x4848 //RX_FDEQ_GAIN_0 +197 0x4848 //RX_FDEQ_GAIN_1 +198 0x4848 //RX_FDEQ_GAIN_2 +199 0x4848 //RX_FDEQ_GAIN_3 +200 0x4848 //RX_FDEQ_GAIN_4 +201 0x4848 //RX_FDEQ_GAIN_5 +202 0x4848 //RX_FDEQ_GAIN_6 +203 0x4848 //RX_FDEQ_GAIN_7 +204 0x4848 //RX_FDEQ_GAIN_8 +205 0x3C3C //RX_FDEQ_GAIN_9 +206 0x3C3C //RX_FDEQ_GAIN_10 +207 0x3838 //RX_FDEQ_GAIN_11 +208 0x3838 //RX_FDEQ_GAIN_12 +209 0x3030 //RX_FDEQ_GAIN_13 +210 0x4848 //RX_FDEQ_GAIN_14 +211 0x4848 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0202 //RX_FDEQ_BIN_0 +221 0x0203 //RX_FDEQ_BIN_1 +222 0x0303 //RX_FDEQ_BIN_2 +223 0x0304 //RX_FDEQ_BIN_3 +224 0x0405 //RX_FDEQ_BIN_4 +225 0x0506 //RX_FDEQ_BIN_5 +226 0x0708 //RX_FDEQ_BIN_6 +227 0x090A //RX_FDEQ_BIN_7 +228 0x0B0C //RX_FDEQ_BIN_8 +229 0x0D0E //RX_FDEQ_BIN_9 +230 0x0E0F //RX_FDEQ_BIN_10 +231 0x0F10 //RX_FDEQ_BIN_11 +232 0x1011 //RX_FDEQ_BIN_12 +233 0x1112 //RX_FDEQ_BIN_13 +234 0x0000 //RX_FDEQ_BIN_14 +235 0x0000 //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x4000 //RX_FDEQ_RESRV_0 +245 0x0320 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0030 //RX_FDDRC_BAND_MARGIN_1 +248 0x0050 //RX_FDDRC_BAND_MARGIN_2 +249 0x0080 //RX_FDDRC_BAND_MARGIN_3 +250 0x0007 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x5000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x6400 //RX_FDDRC_THRD_3_2 +258 0x6400 //RX_FDDRC_THRD_3_3 +259 0x2000 //RX_FDDRC_SLANT_0_0 +260 0x2000 //RX_FDDRC_SLANT_0_1 +261 0x2000 //RX_FDDRC_SLANT_0_2 +262 0x2000 //RX_FDDRC_SLANT_0_3 +263 0x5333 //RX_FDDRC_SLANT_1_0 +264 0x5333 //RX_FDDRC_SLANT_1_1 +265 0x5333 //RX_FDDRC_SLANT_1_2 +266 0x5333 //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +286 0x0100 //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 +#VOL 5 +163 0x1000 //RX_TDDRC_ALPHA_UP_1 +164 0x1000 //RX_TDDRC_ALPHA_UP_2 +165 0x1000 //RX_TDDRC_ALPHA_UP_3 +166 0x1000 //RX_TDDRC_ALPHA_UP_4 +184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +190 0x7FFF //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +269 0x0000 //RX_TDDRC_THRD_0 +270 0x0000 //RX_TDDRC_THRD_1 +271 0x7FFF //RX_TDDRC_THRD_2 +272 0x7FFF //RX_TDDRC_THRD_3 +273 0x7E70 //RX_TDDRC_SLANT_0 +274 0x7FFF //RX_TDDRC_SLANT_1 +275 0x1000 //RX_TDDRC_ALPHA_UP_0 +276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x199A //RX_TDDRC_HMNC_GAIN +279 0x0001 //RX_TDDRC_SMT_FLAG +280 0x0CCD //RX_TDDRC_SMT_W +281 0x0155 //RX_TDDRC_DRC_GAIN +195 0x001C //RX_FDEQ_SUBNUM +196 0x4848 //RX_FDEQ_GAIN_0 +197 0x4848 //RX_FDEQ_GAIN_1 +198 0x4848 //RX_FDEQ_GAIN_2 +199 0x4848 //RX_FDEQ_GAIN_3 +200 0x4848 //RX_FDEQ_GAIN_4 +201 0x4848 //RX_FDEQ_GAIN_5 +202 0x4848 //RX_FDEQ_GAIN_6 +203 0x4848 //RX_FDEQ_GAIN_7 +204 0x4848 //RX_FDEQ_GAIN_8 +205 0x3C3C //RX_FDEQ_GAIN_9 +206 0x3C3C //RX_FDEQ_GAIN_10 +207 0x3838 //RX_FDEQ_GAIN_11 +208 0x3838 //RX_FDEQ_GAIN_12 +209 0x3030 //RX_FDEQ_GAIN_13 +210 0x4848 //RX_FDEQ_GAIN_14 +211 0x4848 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0202 //RX_FDEQ_BIN_0 +221 0x0203 //RX_FDEQ_BIN_1 +222 0x0303 //RX_FDEQ_BIN_2 +223 0x0304 //RX_FDEQ_BIN_3 +224 0x0405 //RX_FDEQ_BIN_4 +225 0x0506 //RX_FDEQ_BIN_5 +226 0x0708 //RX_FDEQ_BIN_6 +227 0x090A //RX_FDEQ_BIN_7 +228 0x0B0C //RX_FDEQ_BIN_8 +229 0x0D0E //RX_FDEQ_BIN_9 +230 0x0E0F //RX_FDEQ_BIN_10 +231 0x0F10 //RX_FDEQ_BIN_11 +232 0x1011 //RX_FDEQ_BIN_12 +233 0x1112 //RX_FDEQ_BIN_13 +234 0x0000 //RX_FDEQ_BIN_14 +235 0x0000 //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x4000 //RX_FDEQ_RESRV_0 +245 0x0320 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0030 //RX_FDDRC_BAND_MARGIN_1 +248 0x0050 //RX_FDDRC_BAND_MARGIN_2 +249 0x0080 //RX_FDDRC_BAND_MARGIN_3 +250 0x0007 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x5000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x6400 //RX_FDDRC_THRD_3_2 +258 0x6400 //RX_FDDRC_THRD_3_3 +259 0x2000 //RX_FDDRC_SLANT_0_0 +260 0x2000 //RX_FDDRC_SLANT_0_1 +261 0x2000 //RX_FDDRC_SLANT_0_2 +262 0x2000 //RX_FDDRC_SLANT_0_3 +263 0x5333 //RX_FDDRC_SLANT_1_0 +264 0x5333 //RX_FDDRC_SLANT_1_1 +265 0x5333 //RX_FDDRC_SLANT_1_2 +266 0x5333 //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +286 0x0100 //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 +#VOL 6 +163 0x1000 //RX_TDDRC_ALPHA_UP_1 +164 0x1000 //RX_TDDRC_ALPHA_UP_2 +165 0x1000 //RX_TDDRC_ALPHA_UP_3 +166 0x1000 //RX_TDDRC_ALPHA_UP_4 +184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +190 0x7FFF //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +269 0x0000 //RX_TDDRC_THRD_0 +270 0x0000 //RX_TDDRC_THRD_1 +271 0x7FFF //RX_TDDRC_THRD_2 +272 0x7FFF //RX_TDDRC_THRD_3 +273 0x7E70 //RX_TDDRC_SLANT_0 +274 0x7FFF //RX_TDDRC_SLANT_1 +275 0x1000 //RX_TDDRC_ALPHA_UP_0 +276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x199A //RX_TDDRC_HMNC_GAIN +279 0x0001 //RX_TDDRC_SMT_FLAG +280 0x0CCD //RX_TDDRC_SMT_W +281 0x0155 //RX_TDDRC_DRC_GAIN +195 0x001C //RX_FDEQ_SUBNUM +196 0x4848 //RX_FDEQ_GAIN_0 +197 0x4848 //RX_FDEQ_GAIN_1 +198 0x4848 //RX_FDEQ_GAIN_2 +199 0x4848 //RX_FDEQ_GAIN_3 +200 0x4848 //RX_FDEQ_GAIN_4 +201 0x4848 //RX_FDEQ_GAIN_5 +202 0x4848 //RX_FDEQ_GAIN_6 +203 0x4848 //RX_FDEQ_GAIN_7 +204 0x4848 //RX_FDEQ_GAIN_8 +205 0x3C3C //RX_FDEQ_GAIN_9 +206 0x3C3C //RX_FDEQ_GAIN_10 +207 0x3838 //RX_FDEQ_GAIN_11 +208 0x3838 //RX_FDEQ_GAIN_12 +209 0x3030 //RX_FDEQ_GAIN_13 +210 0x4848 //RX_FDEQ_GAIN_14 +211 0x4848 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0202 //RX_FDEQ_BIN_0 +221 0x0203 //RX_FDEQ_BIN_1 +222 0x0303 //RX_FDEQ_BIN_2 +223 0x0304 //RX_FDEQ_BIN_3 +224 0x0405 //RX_FDEQ_BIN_4 +225 0x0506 //RX_FDEQ_BIN_5 +226 0x0708 //RX_FDEQ_BIN_6 +227 0x090A //RX_FDEQ_BIN_7 +228 0x0B0C //RX_FDEQ_BIN_8 +229 0x0D0E //RX_FDEQ_BIN_9 +230 0x0E0F //RX_FDEQ_BIN_10 +231 0x0F10 //RX_FDEQ_BIN_11 +232 0x1011 //RX_FDEQ_BIN_12 +233 0x1112 //RX_FDEQ_BIN_13 +234 0x0000 //RX_FDEQ_BIN_14 +235 0x0000 //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x4000 //RX_FDEQ_RESRV_0 +245 0x0320 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0030 //RX_FDDRC_BAND_MARGIN_1 +248 0x0050 //RX_FDDRC_BAND_MARGIN_2 +249 0x0080 //RX_FDDRC_BAND_MARGIN_3 +250 0x0007 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x5000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x6400 //RX_FDDRC_THRD_3_2 +258 0x6400 //RX_FDDRC_THRD_3_3 +259 0x2000 //RX_FDDRC_SLANT_0_0 +260 0x2000 //RX_FDDRC_SLANT_0_1 +261 0x2000 //RX_FDDRC_SLANT_0_2 +262 0x2000 //RX_FDDRC_SLANT_0_3 +263 0x5333 //RX_FDDRC_SLANT_1_0 +264 0x5333 //RX_FDDRC_SLANT_1_1 +265 0x5333 //RX_FDDRC_SLANT_1_2 +266 0x5333 //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +286 0x0100 //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 #CASE_NAME BLUETOOTH-BTWB-VOICE_GENERIC-SWB -#PARAM_TYPE TX+RX -#TOTAL_CUSTOM_STEP 7 +#PARAM_MODE Full +#PARAM_TYPE TX+2RX +#TOTAL_CUSTOM_STEP 7+7 #TX 0 0x0001 //TX_OPERATION_MODE_0 1 0x0001 //TX_OPERATION_MODE_1 @@ -26553,20 +40309,20 @@ 248 0xF400 //TX_THR_SN_EST_6 249 0xF600 //TX_THR_SN_EST_7 250 0x0000 //TX_DELTA_THR_SN_EST_0 -251 0x0000 //TX_DELTA_THR_SN_EST_1 +251 0x0200 //TX_DELTA_THR_SN_EST_1 252 0x0200 //TX_DELTA_THR_SN_EST_2 253 0x0200 //TX_DELTA_THR_SN_EST_3 254 0x0200 //TX_DELTA_THR_SN_EST_4 255 0x0200 //TX_DELTA_THR_SN_EST_5 -256 0x0200 //TX_DELTA_THR_SN_EST_6 +256 0x0000 //TX_DELTA_THR_SN_EST_6 257 0x0200 //TX_DELTA_THR_SN_EST_7 258 0x6000 //TX_LAMBDA_NN_EST_0 -259 0x6000 //TX_LAMBDA_NN_EST_1 +259 0x4000 //TX_LAMBDA_NN_EST_1 260 0x4000 //TX_LAMBDA_NN_EST_2 261 0x4000 //TX_LAMBDA_NN_EST_3 262 0x4000 //TX_LAMBDA_NN_EST_4 263 0x4000 //TX_LAMBDA_NN_EST_5 -264 0x4000 //TX_LAMBDA_NN_EST_6 +264 0x6000 //TX_LAMBDA_NN_EST_6 265 0x4000 //TX_LAMBDA_NN_EST_7 266 0x0400 //TX_N_SN_EST 267 0x001E //TX_INBEAM_T @@ -26584,16 +40340,16 @@ 279 0x1000 //TX_B_POST_FLT_0 280 0x1000 //TX_B_POST_FLT_1 281 0x000B //TX_NS_LVL_CTRL_0 -282 0x000F //TX_NS_LVL_CTRL_1 -283 0x0011 //TX_NS_LVL_CTRL_2 +282 0x0011 //TX_NS_LVL_CTRL_1 +283 0x000F //TX_NS_LVL_CTRL_2 284 0x000F //TX_NS_LVL_CTRL_3 285 0x000F //TX_NS_LVL_CTRL_4 286 0x000F //TX_NS_LVL_CTRL_5 287 0x000F //TX_NS_LVL_CTRL_6 288 0x0011 //TX_NS_LVL_CTRL_7 289 0x000C //TX_MIN_GAIN_S_0 -290 0x000C //TX_MIN_GAIN_S_1 -291 0x000F //TX_MIN_GAIN_S_2 +290 0x000F //TX_MIN_GAIN_S_1 +291 0x000C //TX_MIN_GAIN_S_2 292 0x000C //TX_MIN_GAIN_S_3 293 0x000C //TX_MIN_GAIN_S_4 294 0x000C //TX_MIN_GAIN_S_5 @@ -26617,12 +40373,12 @@ 312 0x7FFF //TX_A_POST_FILT_0 313 0x2000 //TX_A_POST_FILT_1 314 0x2000 //TX_A_POST_FILT_S_0 -315 0x4000 //TX_A_POST_FILT_S_1 +315 0x5000 //TX_A_POST_FILT_S_1 316 0x5000 //TX_A_POST_FILT_S_2 317 0x5000 //TX_A_POST_FILT_S_3 318 0x5000 //TX_A_POST_FILT_S_4 319 0x5000 //TX_A_POST_FILT_S_5 -320 0x5000 //TX_A_POST_FILT_S_6 +320 0x4000 //TX_A_POST_FILT_S_6 321 0x5000 //TX_A_POST_FILT_S_7 322 0x1000 //TX_B_POST_FILT_0 323 0x1000 //TX_B_POST_FILT_1 @@ -26682,10 +40438,10 @@ 377 0x7FFF //TX_NOISE_TH_5_4 378 0x044C //TX_NOISE_TH_6 379 0x0014 //TX_MINENOISE_TH -380 0x4000 //TX_MINENOISE_MIC0_TH_MTS -381 0xFFEE //TX_MINENOISE_MIC0_TH_EXP -382 0x6000 //TX_MINENOISE_MIC0_S_TH_MTS -383 0xFFF3 //TX_MINENOISE_MIC0_S_TH_EXP +380 0x4000 //TX_MORENS_TFMASK_TH +381 0xFFEE //TX_DRC_QUIET_FLOOR +382 0x6000 //TX_RATIODTL_CUT_TH +383 0xFFF3 //TX_DT_CUT_K1 384 0x0666 //TX_OUT_ENER_S_TH_CLEAN 385 0x0666 //TX_OUT_ENER_S_TH_LESSCLEAN 386 0x0333 //TX_OUT_ENER_S_TH_NOISY @@ -26693,15 +40449,15 @@ 388 0x0333 //TX_OUT_ENER_TH_SPEECH 389 0x2000 //TX_SN_NPB_GAIN 390 0x0000 //TX_NN_NPB_GAIN -391 0x0000 //TX_CSX_ALPHA_0 -392 0x0000 //TX_CSX_ALPHA_1 -393 0x0000 //TX_CSX_ALPHA_2 -394 0x0000 //TX_CSX_ALPHA_3 -395 0x0800 //TX_MU_ARSP_EST -396 0x00C8 //TX_P_OUTBEAM_MIN_TH +391 0x0000 //TX_POST_MASK_SUP_HSNE +392 0x0000 //TX_TAIL_DET_TH +393 0x0000 //TX_B_LESSCUT_RTO_WTA +394 0x0000 //TX_MEL_G_R +395 0x0800 //TX_SUPHIGH_TH +396 0x00C8 //TX_MASK_G_R 397 0x0002 //TX_EXTRA_NS_L -398 0x0800 //TX_EXTRA_NS_A -399 0x0005 //TX_VR_NOISE_FLOOR_TH +398 0x0800 //TX_C_POST_FLT_MASK +399 0x0005 //TX_A_POST_FLT_WNS 400 0x0148 //TX_MIN_G_LOW300HZ 401 0x0002 //TX_MAXLEVEL_CNG 402 0x00B4 //TX_STN_NOISE_TH @@ -26816,16 +40572,16 @@ 511 0x6666 //TX_MIC_TO_BFGAIN 512 0x0000 //TX_MICTOBFGAIN0 513 0x0000 //TX_FASTMUE_TH -514 0x0000 //TX_DERVB_LEN_0 -515 0x0000 //TX_DERVB_LEN_1 -516 0x0000 //TX_RHO_DERVB -517 0x0000 //TX_MIC_INDX_DERVB -518 0x0000 //TX_MU_DERVB -519 0x0000 //TX_DR_RESRV_0 -520 0x0000 //TX_DR_RESRV_1 -521 0x0000 //TX_DR_RESRV_2 -522 0x0000 //TX_DR_RESRV_3 -523 0x0000 //TX_DR_RESRV_4 +514 0x0000 //TX_DEREVERB_LF_MU +515 0x0000 //TX_DEREVERB_HF_MU +516 0x0000 //TX_DEREVERB_DELAY +517 0x0000 //TX_DEREVERB_COEF_LEN +518 0x0000 //TX_DEREVERB_DNR +519 0x0000 //TX_DEREVERB_ALPHA +520 0x0000 //TX_DEREVERB_BETA +521 0x0000 //TX_GSC_RTOL_TH +522 0x0000 //TX_GSC_RTOH_TH +523 0x0000 //TX_WIDE2_MEANHTH 524 0x0000 //TX_DR_RESRV_5 525 0x0000 //TX_DR_RESRV_6 526 0x0000 //TX_DR_RESRV_7 @@ -27199,8 +40955,73 @@ 894 0xC000 //TX_FASTNS_SSA_THHFL 895 0xCCCC //TX_FASTNS_SSA_THLFH 896 0xD999 //TX_FASTNS_SSA_THHFH +897 0x0000 //TX_SENDFUNC_REG_MICMUTE +898 0x0000 //TX_SENDFUNC_REG_MICMUTE1 +899 0x0000 //TX_MICMUTE_RATIO_THR +900 0x0000 //TX_MICMUTE_AMP_THR +901 0x0000 //TX_MICMUTE_HPF_IND +902 0x0000 //TX_MICMUTE_LOG_EYR_TH +903 0x0000 //TX_MICMUTE_CVG_TIME +904 0x0000 //TX_MICMUTE_RELEASE_TIME +905 0x0000 //TX_MIC_VOLUME_MIC0MUTE +906 0x0000 //TX_MICMUTE_EPD_OFFSET_0 +907 0x0000 //TX_MICMUTE_FRQ_AEC_L +908 0x0000 //TX_MICMUTE_EAD_THR +909 0x0000 //TX_MICMUTE_LAMBDA_CB_NLE +910 0x0000 //TX_MICMUTE_LAMBDA_RE_EST +911 0x0000 //TX_DTD_THR1_MICMUTE_0 +912 0x0000 //TX_DTD_THR1_MICMUTE_1 +913 0x0000 //TX_DTD_THR1_MICMUTE_2 +914 0x0000 //TX_DTD_THR1_MICMUTE_3 +915 0x0000 //TX_DTD_THR2_MICMUTE_0 +916 0x0000 //TX_MICMUTE_MIN_EQ_RE_EST_0 +917 0x0000 //TX_MICMUTE_MIN_EQ_RE_EST_1 +918 0x0000 //TX_MICMUTE_MIN_EQ_RE_EST_2 +919 0x0000 //TX_MICMUTE_MIN_EQ_RE_EST_3 +920 0x0000 //TX_MICMUTE_MIN_EQ_RE_EST_4 +921 0x0000 //TX_MICMUTE_C_POST_FLT +922 0x0000 //TX_MICMUTE_DT_CUT_K +923 0x0000 //TX_MICMUTE_DT_CUT_THR +924 0x0000 //TX_MICMUTE_DT_CUT_K2 +925 0x0000 //TX_MICMUTE_DT_CUT_THR2 +926 0x0000 //TX_MICMUTE_DT2_HOLD_N +927 0x0000 //TX_MICMUTE_RATIODTH_THCUT +928 0x0000 //TX_MICMUTE_B_POST_FLT_ECHOL +929 0x0000 //TX_MICMUTE_B_POST_FLT_ECHOH +930 0x0000 //TX_MICMUTE_C_POST_FLT_MASK +931 0x0000 //TX_MICMUTE_RATIODTL_CUT_TH +932 0x0000 //TX_MICMUTE_DT_CUT_K1 +933 0x0000 //TX_MICMUTE_N2_SN_EST +934 0x0000 //TX_MICMUTE_THR_SN_EST_0 +935 0x0000 //TX_MICMUTE_MIN_G_CTRL_0 +936 0x0000 //TX_MICMUTE_A_POST_FILT_S_0 +937 0x0000 //TX_MICMUTE_B_POST_FILT_0 +938 0x0000 //TX_MIC1RUB_AMP_THR +939 0x0000 //TX_MIC1MUTE_RATIO_THR +940 0x0000 //TX_MIC1MUTE_AMP_THR +941 0x0000 //TX_MIC1MUTE_CVG_TIME +942 0x0000 //TX_MIC1MUTE_RELEASE_TIME +943 0x0000 //TX_AMS_RESRV_01 +944 0x0000 //TX_AMS_RESRV_02 +945 0x0000 //TX_AMS_RESRV_03 +946 0x0000 //TX_AMS_RESRV_04 +947 0x0000 //TX_AMS_RESRV_05 +948 0x0000 //TX_AMS_RESRV_06 +949 0x0000 //TX_AMS_RESRV_07 +950 0x0000 //TX_AMS_RESRV_08 +951 0x0000 //TX_AMS_RESRV_09 +952 0x0000 //TX_AMS_RESRV_10 +953 0x0000 //TX_AMS_RESRV_11 +954 0x0000 //TX_AMS_RESRV_12 +955 0x0000 //TX_AMS_RESRV_13 +956 0x0000 //TX_AMS_RESRV_14 +957 0x0000 //TX_AMS_RESRV_15 +958 0x0000 //TX_AMS_RESRV_16 +959 0x0000 //TX_AMS_RESRV_17 +960 0x0000 //TX_AMS_RESRV_18 +961 0x0000 //TX_AMS_RESRV_19 #RX -0 0x0064 //RX_RECVFUNC_MODE_0 +0 0x2064 //RX_RECVFUNC_MODE_0 1 0x0000 //RX_RECVFUNC_MODE_1 2 0x0003 //RX_SAMPLINGFREQ_SIG 3 0x0003 //RX_SAMPLINGFREQ_PROC @@ -28050,10 +41871,862 @@ 110 0x0000 //RX_FDDRC_RESRV_0 129 0x0100 //RX_SPK_VOL 130 0x0000 //RX_VOL_RESRV_0 +#RX 2 +157 0x2064 //RX_RECVFUNC_MODE_0 +158 0x0000 //RX_RECVFUNC_MODE_1 +159 0x0003 //RX_SAMPLINGFREQ_SIG +160 0x0003 //RX_SAMPLINGFREQ_PROC +161 0x000A //RX_FRAME_SZ +162 0x0000 //RX_DELAY_OPT +163 0x3000 //RX_TDDRC_ALPHA_UP_1 +164 0x3000 //RX_TDDRC_ALPHA_UP_2 +165 0x3000 //RX_TDDRC_ALPHA_UP_3 +166 0x3000 //RX_TDDRC_ALPHA_UP_4 +167 0x0800 //RX_PGA +168 0x7FFF //RX_A_HP +169 0x0000 //RX_B_PE +170 0x1800 //RX_THR_PITCH_DET_0 +171 0x1000 //RX_THR_PITCH_DET_1 +172 0x0800 //RX_THR_PITCH_DET_2 +173 0x0008 //RX_PITCH_BFR_LEN +174 0x0003 //RX_SBD_PITCH_DET +175 0x0100 //RX_PP_RESRV_0 +176 0x0020 //RX_PP_RESRV_1 +177 0x0400 //RX_N_SN_EST +178 0x000C //RX_N2_SN_EST +179 0x0003 //RX_NS_LVL_CTRL +180 0x9000 //RX_THR_SN_EST +181 0x7CCD //RX_LAMBDA_PFILT +182 0x000A //RX_FENS_RESRV_0 +183 0x0190 //RX_FENS_RESRV_1 +184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +187 0x0002 //RX_EXTRA_NS_L +188 0x0800 //RX_EXTRA_NS_A +189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +190 0x7FFF //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +192 0x199A //RX_A_POST_FLT +193 0x0000 //RX_LMT_THRD +194 0x4000 //RX_LMT_ALPHA +195 0x0020 //RX_FDEQ_SUBNUM +196 0x4848 //RX_FDEQ_GAIN_0 +197 0x4848 //RX_FDEQ_GAIN_1 +198 0x4848 //RX_FDEQ_GAIN_2 +199 0x4848 //RX_FDEQ_GAIN_3 +200 0x4848 //RX_FDEQ_GAIN_4 +201 0x4848 //RX_FDEQ_GAIN_5 +202 0x4848 //RX_FDEQ_GAIN_6 +203 0x4848 //RX_FDEQ_GAIN_7 +204 0x4848 //RX_FDEQ_GAIN_8 +205 0x4848 //RX_FDEQ_GAIN_9 +206 0x4848 //RX_FDEQ_GAIN_10 +207 0x4848 //RX_FDEQ_GAIN_11 +208 0x4848 //RX_FDEQ_GAIN_12 +209 0x4848 //RX_FDEQ_GAIN_13 +210 0x4848 //RX_FDEQ_GAIN_14 +211 0x4848 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0202 //RX_FDEQ_BIN_0 +221 0x0203 //RX_FDEQ_BIN_1 +222 0x0303 //RX_FDEQ_BIN_2 +223 0x0304 //RX_FDEQ_BIN_3 +224 0x0405 //RX_FDEQ_BIN_4 +225 0x0506 //RX_FDEQ_BIN_5 +226 0x0708 //RX_FDEQ_BIN_6 +227 0x090A //RX_FDEQ_BIN_7 +228 0x0B0C //RX_FDEQ_BIN_8 +229 0x0D0E //RX_FDEQ_BIN_9 +230 0x1013 //RX_FDEQ_BIN_10 +231 0x1719 //RX_FDEQ_BIN_11 +232 0x1B1E //RX_FDEQ_BIN_12 +233 0x1E1E //RX_FDEQ_BIN_13 +234 0x1E28 //RX_FDEQ_BIN_14 +235 0x282C //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x4000 //RX_FDEQ_RESRV_0 +245 0x0320 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0030 //RX_FDDRC_BAND_MARGIN_1 +248 0x0050 //RX_FDDRC_BAND_MARGIN_2 +249 0x0080 //RX_FDDRC_BAND_MARGIN_3 +250 0x0007 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x5000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x6400 //RX_FDDRC_THRD_3_2 +258 0x6400 //RX_FDDRC_THRD_3_3 +259 0x2000 //RX_FDDRC_SLANT_0_0 +260 0x2000 //RX_FDDRC_SLANT_0_1 +261 0x2000 //RX_FDDRC_SLANT_0_2 +262 0x2000 //RX_FDDRC_SLANT_0_3 +263 0x5333 //RX_FDDRC_SLANT_1_0 +264 0x5333 //RX_FDDRC_SLANT_1_1 +265 0x5333 //RX_FDDRC_SLANT_1_2 +266 0x5333 //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +268 0x0000 //RX_FILTINDX +269 0x0000 //RX_TDDRC_THRD_0 +270 0x0000 //RX_TDDRC_THRD_1 +271 0x7FFF //RX_TDDRC_THRD_2 +272 0x7FFF //RX_TDDRC_THRD_3 +273 0x7FFF //RX_TDDRC_SLANT_0 +274 0x7FFF //RX_TDDRC_SLANT_1 +275 0x3000 //RX_TDDRC_ALPHA_UP_0 +276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x199A //RX_TDDRC_HMNC_GAIN +279 0x0001 //RX_TDDRC_SMT_FLAG +280 0x0CCD //RX_TDDRC_SMT_W +281 0x0155 //RX_TDDRC_DRC_GAIN +282 0x7C00 //RX_LAMBDA_PKA_FP +283 0x2000 //RX_TPKA_FP +284 0x2000 //RX_MIN_G_FP +285 0x0080 //RX_MAX_G_FP +286 0x0100 //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 +288 0x0000 //RX_MAXLEVEL_CNG +289 0x3000 //RX_BWE_UV_TH +290 0x3000 //RX_BWE_UV_TH2 +291 0x1800 //RX_BWE_UV_TH3 +292 0x1000 //RX_BWE_V_TH +293 0x04CD //RX_BWE_GAIN1_V_TH1 +294 0x0F33 //RX_BWE_GAIN1_V_TH2 +295 0x7333 //RX_BWE_UV_EQ +296 0x199A //RX_BWE_V_EQ +297 0x7333 //RX_BWE_TONE_TH +298 0x0004 //RX_BWE_UV_HOLD_T +299 0x6CCD //RX_BWE_GAIN2_ALPHA +300 0x799A //RX_BWE_GAIN3_ALPHA +301 0x001E //RX_BWE_CUTOFF +302 0x3000 //RX_BWE_GAINFILL +303 0x3200 //RX_BWE_MAXTH_TONE +304 0x2000 //RX_BWE_EQ_0 +305 0x2000 //RX_BWE_EQ_1 +306 0x2000 //RX_BWE_EQ_2 +307 0x2000 //RX_BWE_EQ_3 +308 0x2000 //RX_BWE_EQ_4 +309 0x2000 //RX_BWE_EQ_5 +310 0x2000 //RX_BWE_EQ_6 +311 0x0000 //RX_BWE_RESRV_0 +312 0x0000 //RX_BWE_RESRV_1 +313 0x0000 //RX_BWE_RESRV_2 +#VOL 0 +163 0x3000 //RX_TDDRC_ALPHA_UP_1 +164 0x3000 //RX_TDDRC_ALPHA_UP_2 +165 0x3000 //RX_TDDRC_ALPHA_UP_3 +166 0x3000 //RX_TDDRC_ALPHA_UP_4 +184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +190 0x7FFF //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +269 0x0000 //RX_TDDRC_THRD_0 +270 0x0000 //RX_TDDRC_THRD_1 +271 0x7FFF //RX_TDDRC_THRD_2 +272 0x7FFF //RX_TDDRC_THRD_3 +273 0x7FFF //RX_TDDRC_SLANT_0 +274 0x7FFF //RX_TDDRC_SLANT_1 +275 0x3000 //RX_TDDRC_ALPHA_UP_0 +276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x199A //RX_TDDRC_HMNC_GAIN +279 0x0001 //RX_TDDRC_SMT_FLAG +280 0x0CCD //RX_TDDRC_SMT_W +281 0x0155 //RX_TDDRC_DRC_GAIN +195 0x0020 //RX_FDEQ_SUBNUM +196 0x4848 //RX_FDEQ_GAIN_0 +197 0x4848 //RX_FDEQ_GAIN_1 +198 0x4848 //RX_FDEQ_GAIN_2 +199 0x4848 //RX_FDEQ_GAIN_3 +200 0x4848 //RX_FDEQ_GAIN_4 +201 0x4848 //RX_FDEQ_GAIN_5 +202 0x4848 //RX_FDEQ_GAIN_6 +203 0x4848 //RX_FDEQ_GAIN_7 +204 0x4848 //RX_FDEQ_GAIN_8 +205 0x4848 //RX_FDEQ_GAIN_9 +206 0x4848 //RX_FDEQ_GAIN_10 +207 0x4848 //RX_FDEQ_GAIN_11 +208 0x4848 //RX_FDEQ_GAIN_12 +209 0x4848 //RX_FDEQ_GAIN_13 +210 0x4848 //RX_FDEQ_GAIN_14 +211 0x4848 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0202 //RX_FDEQ_BIN_0 +221 0x0203 //RX_FDEQ_BIN_1 +222 0x0303 //RX_FDEQ_BIN_2 +223 0x0304 //RX_FDEQ_BIN_3 +224 0x0405 //RX_FDEQ_BIN_4 +225 0x0506 //RX_FDEQ_BIN_5 +226 0x0708 //RX_FDEQ_BIN_6 +227 0x090A //RX_FDEQ_BIN_7 +228 0x0B0C //RX_FDEQ_BIN_8 +229 0x0D0E //RX_FDEQ_BIN_9 +230 0x1013 //RX_FDEQ_BIN_10 +231 0x1719 //RX_FDEQ_BIN_11 +232 0x1B1E //RX_FDEQ_BIN_12 +233 0x1E1E //RX_FDEQ_BIN_13 +234 0x1E28 //RX_FDEQ_BIN_14 +235 0x282C //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x4000 //RX_FDEQ_RESRV_0 +245 0x0320 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0030 //RX_FDDRC_BAND_MARGIN_1 +248 0x0050 //RX_FDDRC_BAND_MARGIN_2 +249 0x0080 //RX_FDDRC_BAND_MARGIN_3 +250 0x0007 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x5000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x6400 //RX_FDDRC_THRD_3_2 +258 0x6400 //RX_FDDRC_THRD_3_3 +259 0x2000 //RX_FDDRC_SLANT_0_0 +260 0x2000 //RX_FDDRC_SLANT_0_1 +261 0x2000 //RX_FDDRC_SLANT_0_2 +262 0x2000 //RX_FDDRC_SLANT_0_3 +263 0x5333 //RX_FDDRC_SLANT_1_0 +264 0x5333 //RX_FDDRC_SLANT_1_1 +265 0x5333 //RX_FDDRC_SLANT_1_2 +266 0x5333 //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +286 0x0100 //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 +#VOL 1 +163 0x3000 //RX_TDDRC_ALPHA_UP_1 +164 0x3000 //RX_TDDRC_ALPHA_UP_2 +165 0x3000 //RX_TDDRC_ALPHA_UP_3 +166 0x3000 //RX_TDDRC_ALPHA_UP_4 +184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +190 0x7FFF //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +269 0x0000 //RX_TDDRC_THRD_0 +270 0x0000 //RX_TDDRC_THRD_1 +271 0x7FFF //RX_TDDRC_THRD_2 +272 0x7FFF //RX_TDDRC_THRD_3 +273 0x7FFF //RX_TDDRC_SLANT_0 +274 0x7FFF //RX_TDDRC_SLANT_1 +275 0x3000 //RX_TDDRC_ALPHA_UP_0 +276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x199A //RX_TDDRC_HMNC_GAIN +279 0x0001 //RX_TDDRC_SMT_FLAG +280 0x0CCD //RX_TDDRC_SMT_W +281 0x0155 //RX_TDDRC_DRC_GAIN +195 0x0020 //RX_FDEQ_SUBNUM +196 0x4848 //RX_FDEQ_GAIN_0 +197 0x4848 //RX_FDEQ_GAIN_1 +198 0x4848 //RX_FDEQ_GAIN_2 +199 0x4848 //RX_FDEQ_GAIN_3 +200 0x4848 //RX_FDEQ_GAIN_4 +201 0x4848 //RX_FDEQ_GAIN_5 +202 0x4848 //RX_FDEQ_GAIN_6 +203 0x4848 //RX_FDEQ_GAIN_7 +204 0x4848 //RX_FDEQ_GAIN_8 +205 0x4848 //RX_FDEQ_GAIN_9 +206 0x4848 //RX_FDEQ_GAIN_10 +207 0x4848 //RX_FDEQ_GAIN_11 +208 0x4848 //RX_FDEQ_GAIN_12 +209 0x4848 //RX_FDEQ_GAIN_13 +210 0x4848 //RX_FDEQ_GAIN_14 +211 0x4848 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0202 //RX_FDEQ_BIN_0 +221 0x0203 //RX_FDEQ_BIN_1 +222 0x0303 //RX_FDEQ_BIN_2 +223 0x0304 //RX_FDEQ_BIN_3 +224 0x0405 //RX_FDEQ_BIN_4 +225 0x0506 //RX_FDEQ_BIN_5 +226 0x0708 //RX_FDEQ_BIN_6 +227 0x090A //RX_FDEQ_BIN_7 +228 0x0B0C //RX_FDEQ_BIN_8 +229 0x0D0E //RX_FDEQ_BIN_9 +230 0x1013 //RX_FDEQ_BIN_10 +231 0x1719 //RX_FDEQ_BIN_11 +232 0x1B1E //RX_FDEQ_BIN_12 +233 0x1E1E //RX_FDEQ_BIN_13 +234 0x1E28 //RX_FDEQ_BIN_14 +235 0x282C //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x4000 //RX_FDEQ_RESRV_0 +245 0x0320 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0030 //RX_FDDRC_BAND_MARGIN_1 +248 0x0050 //RX_FDDRC_BAND_MARGIN_2 +249 0x0080 //RX_FDDRC_BAND_MARGIN_3 +250 0x0007 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x5000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x6400 //RX_FDDRC_THRD_3_2 +258 0x6400 //RX_FDDRC_THRD_3_3 +259 0x2000 //RX_FDDRC_SLANT_0_0 +260 0x2000 //RX_FDDRC_SLANT_0_1 +261 0x2000 //RX_FDDRC_SLANT_0_2 +262 0x2000 //RX_FDDRC_SLANT_0_3 +263 0x5333 //RX_FDDRC_SLANT_1_0 +264 0x5333 //RX_FDDRC_SLANT_1_1 +265 0x5333 //RX_FDDRC_SLANT_1_2 +266 0x5333 //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +286 0x0100 //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 +#VOL 2 +163 0x3000 //RX_TDDRC_ALPHA_UP_1 +164 0x3000 //RX_TDDRC_ALPHA_UP_2 +165 0x3000 //RX_TDDRC_ALPHA_UP_3 +166 0x3000 //RX_TDDRC_ALPHA_UP_4 +184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +190 0x7FFF //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +269 0x0000 //RX_TDDRC_THRD_0 +270 0x0000 //RX_TDDRC_THRD_1 +271 0x7FFF //RX_TDDRC_THRD_2 +272 0x7FFF //RX_TDDRC_THRD_3 +273 0x7FFF //RX_TDDRC_SLANT_0 +274 0x7FFF //RX_TDDRC_SLANT_1 +275 0x3000 //RX_TDDRC_ALPHA_UP_0 +276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x199A //RX_TDDRC_HMNC_GAIN +279 0x0001 //RX_TDDRC_SMT_FLAG +280 0x0CCD //RX_TDDRC_SMT_W +281 0x0155 //RX_TDDRC_DRC_GAIN +195 0x0020 //RX_FDEQ_SUBNUM +196 0x4848 //RX_FDEQ_GAIN_0 +197 0x4848 //RX_FDEQ_GAIN_1 +198 0x4848 //RX_FDEQ_GAIN_2 +199 0x4848 //RX_FDEQ_GAIN_3 +200 0x4848 //RX_FDEQ_GAIN_4 +201 0x4848 //RX_FDEQ_GAIN_5 +202 0x4848 //RX_FDEQ_GAIN_6 +203 0x4848 //RX_FDEQ_GAIN_7 +204 0x4848 //RX_FDEQ_GAIN_8 +205 0x4848 //RX_FDEQ_GAIN_9 +206 0x4848 //RX_FDEQ_GAIN_10 +207 0x4848 //RX_FDEQ_GAIN_11 +208 0x4848 //RX_FDEQ_GAIN_12 +209 0x4848 //RX_FDEQ_GAIN_13 +210 0x4848 //RX_FDEQ_GAIN_14 +211 0x4848 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0202 //RX_FDEQ_BIN_0 +221 0x0203 //RX_FDEQ_BIN_1 +222 0x0303 //RX_FDEQ_BIN_2 +223 0x0304 //RX_FDEQ_BIN_3 +224 0x0405 //RX_FDEQ_BIN_4 +225 0x0506 //RX_FDEQ_BIN_5 +226 0x0708 //RX_FDEQ_BIN_6 +227 0x090A //RX_FDEQ_BIN_7 +228 0x0B0C //RX_FDEQ_BIN_8 +229 0x0D0E //RX_FDEQ_BIN_9 +230 0x1013 //RX_FDEQ_BIN_10 +231 0x1719 //RX_FDEQ_BIN_11 +232 0x1B1E //RX_FDEQ_BIN_12 +233 0x1E1E //RX_FDEQ_BIN_13 +234 0x1E28 //RX_FDEQ_BIN_14 +235 0x282C //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x4000 //RX_FDEQ_RESRV_0 +245 0x0320 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0030 //RX_FDDRC_BAND_MARGIN_1 +248 0x0050 //RX_FDDRC_BAND_MARGIN_2 +249 0x0080 //RX_FDDRC_BAND_MARGIN_3 +250 0x0007 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x5000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x6400 //RX_FDDRC_THRD_3_2 +258 0x6400 //RX_FDDRC_THRD_3_3 +259 0x2000 //RX_FDDRC_SLANT_0_0 +260 0x2000 //RX_FDDRC_SLANT_0_1 +261 0x2000 //RX_FDDRC_SLANT_0_2 +262 0x2000 //RX_FDDRC_SLANT_0_3 +263 0x5333 //RX_FDDRC_SLANT_1_0 +264 0x5333 //RX_FDDRC_SLANT_1_1 +265 0x5333 //RX_FDDRC_SLANT_1_2 +266 0x5333 //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +286 0x0100 //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 +#VOL 3 +163 0x3000 //RX_TDDRC_ALPHA_UP_1 +164 0x3000 //RX_TDDRC_ALPHA_UP_2 +165 0x3000 //RX_TDDRC_ALPHA_UP_3 +166 0x3000 //RX_TDDRC_ALPHA_UP_4 +184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +190 0x7FFF //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +269 0x0000 //RX_TDDRC_THRD_0 +270 0x0000 //RX_TDDRC_THRD_1 +271 0x7FFF //RX_TDDRC_THRD_2 +272 0x7FFF //RX_TDDRC_THRD_3 +273 0x7FFF //RX_TDDRC_SLANT_0 +274 0x7FFF //RX_TDDRC_SLANT_1 +275 0x3000 //RX_TDDRC_ALPHA_UP_0 +276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x199A //RX_TDDRC_HMNC_GAIN +279 0x0001 //RX_TDDRC_SMT_FLAG +280 0x0CCD //RX_TDDRC_SMT_W +281 0x0155 //RX_TDDRC_DRC_GAIN +195 0x0020 //RX_FDEQ_SUBNUM +196 0x4848 //RX_FDEQ_GAIN_0 +197 0x4848 //RX_FDEQ_GAIN_1 +198 0x4848 //RX_FDEQ_GAIN_2 +199 0x4848 //RX_FDEQ_GAIN_3 +200 0x4848 //RX_FDEQ_GAIN_4 +201 0x4848 //RX_FDEQ_GAIN_5 +202 0x4848 //RX_FDEQ_GAIN_6 +203 0x4848 //RX_FDEQ_GAIN_7 +204 0x4848 //RX_FDEQ_GAIN_8 +205 0x4848 //RX_FDEQ_GAIN_9 +206 0x4848 //RX_FDEQ_GAIN_10 +207 0x4848 //RX_FDEQ_GAIN_11 +208 0x4848 //RX_FDEQ_GAIN_12 +209 0x4848 //RX_FDEQ_GAIN_13 +210 0x4848 //RX_FDEQ_GAIN_14 +211 0x4848 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0202 //RX_FDEQ_BIN_0 +221 0x0203 //RX_FDEQ_BIN_1 +222 0x0303 //RX_FDEQ_BIN_2 +223 0x0304 //RX_FDEQ_BIN_3 +224 0x0405 //RX_FDEQ_BIN_4 +225 0x0506 //RX_FDEQ_BIN_5 +226 0x0708 //RX_FDEQ_BIN_6 +227 0x090A //RX_FDEQ_BIN_7 +228 0x0B0C //RX_FDEQ_BIN_8 +229 0x0D0E //RX_FDEQ_BIN_9 +230 0x1013 //RX_FDEQ_BIN_10 +231 0x1719 //RX_FDEQ_BIN_11 +232 0x1B1E //RX_FDEQ_BIN_12 +233 0x1E1E //RX_FDEQ_BIN_13 +234 0x1E28 //RX_FDEQ_BIN_14 +235 0x282C //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x4000 //RX_FDEQ_RESRV_0 +245 0x0320 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0030 //RX_FDDRC_BAND_MARGIN_1 +248 0x0050 //RX_FDDRC_BAND_MARGIN_2 +249 0x0080 //RX_FDDRC_BAND_MARGIN_3 +250 0x0007 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x5000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x6400 //RX_FDDRC_THRD_3_2 +258 0x6400 //RX_FDDRC_THRD_3_3 +259 0x2000 //RX_FDDRC_SLANT_0_0 +260 0x2000 //RX_FDDRC_SLANT_0_1 +261 0x2000 //RX_FDDRC_SLANT_0_2 +262 0x2000 //RX_FDDRC_SLANT_0_3 +263 0x5333 //RX_FDDRC_SLANT_1_0 +264 0x5333 //RX_FDDRC_SLANT_1_1 +265 0x5333 //RX_FDDRC_SLANT_1_2 +266 0x5333 //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +286 0x0100 //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 +#VOL 4 +163 0x3000 //RX_TDDRC_ALPHA_UP_1 +164 0x3000 //RX_TDDRC_ALPHA_UP_2 +165 0x3000 //RX_TDDRC_ALPHA_UP_3 +166 0x3000 //RX_TDDRC_ALPHA_UP_4 +184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +190 0x7FFF //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +269 0x0000 //RX_TDDRC_THRD_0 +270 0x0000 //RX_TDDRC_THRD_1 +271 0x7FFF //RX_TDDRC_THRD_2 +272 0x7FFF //RX_TDDRC_THRD_3 +273 0x7FFF //RX_TDDRC_SLANT_0 +274 0x7FFF //RX_TDDRC_SLANT_1 +275 0x3000 //RX_TDDRC_ALPHA_UP_0 +276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x199A //RX_TDDRC_HMNC_GAIN +279 0x0001 //RX_TDDRC_SMT_FLAG +280 0x0CCD //RX_TDDRC_SMT_W +281 0x0155 //RX_TDDRC_DRC_GAIN +195 0x0020 //RX_FDEQ_SUBNUM +196 0x4848 //RX_FDEQ_GAIN_0 +197 0x4848 //RX_FDEQ_GAIN_1 +198 0x4848 //RX_FDEQ_GAIN_2 +199 0x4848 //RX_FDEQ_GAIN_3 +200 0x4848 //RX_FDEQ_GAIN_4 +201 0x4848 //RX_FDEQ_GAIN_5 +202 0x4848 //RX_FDEQ_GAIN_6 +203 0x4848 //RX_FDEQ_GAIN_7 +204 0x4848 //RX_FDEQ_GAIN_8 +205 0x4848 //RX_FDEQ_GAIN_9 +206 0x4848 //RX_FDEQ_GAIN_10 +207 0x4848 //RX_FDEQ_GAIN_11 +208 0x4848 //RX_FDEQ_GAIN_12 +209 0x4848 //RX_FDEQ_GAIN_13 +210 0x4848 //RX_FDEQ_GAIN_14 +211 0x4848 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0202 //RX_FDEQ_BIN_0 +221 0x0203 //RX_FDEQ_BIN_1 +222 0x0303 //RX_FDEQ_BIN_2 +223 0x0304 //RX_FDEQ_BIN_3 +224 0x0405 //RX_FDEQ_BIN_4 +225 0x0506 //RX_FDEQ_BIN_5 +226 0x0708 //RX_FDEQ_BIN_6 +227 0x090A //RX_FDEQ_BIN_7 +228 0x0B0C //RX_FDEQ_BIN_8 +229 0x0D0E //RX_FDEQ_BIN_9 +230 0x1013 //RX_FDEQ_BIN_10 +231 0x1719 //RX_FDEQ_BIN_11 +232 0x1B1E //RX_FDEQ_BIN_12 +233 0x1E1E //RX_FDEQ_BIN_13 +234 0x1E28 //RX_FDEQ_BIN_14 +235 0x282C //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x4000 //RX_FDEQ_RESRV_0 +245 0x0320 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0030 //RX_FDDRC_BAND_MARGIN_1 +248 0x0050 //RX_FDDRC_BAND_MARGIN_2 +249 0x0080 //RX_FDDRC_BAND_MARGIN_3 +250 0x0007 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x5000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x6400 //RX_FDDRC_THRD_3_2 +258 0x6400 //RX_FDDRC_THRD_3_3 +259 0x2000 //RX_FDDRC_SLANT_0_0 +260 0x2000 //RX_FDDRC_SLANT_0_1 +261 0x2000 //RX_FDDRC_SLANT_0_2 +262 0x2000 //RX_FDDRC_SLANT_0_3 +263 0x5333 //RX_FDDRC_SLANT_1_0 +264 0x5333 //RX_FDDRC_SLANT_1_1 +265 0x5333 //RX_FDDRC_SLANT_1_2 +266 0x5333 //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +286 0x0100 //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 +#VOL 5 +163 0x3000 //RX_TDDRC_ALPHA_UP_1 +164 0x3000 //RX_TDDRC_ALPHA_UP_2 +165 0x3000 //RX_TDDRC_ALPHA_UP_3 +166 0x3000 //RX_TDDRC_ALPHA_UP_4 +184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +190 0x7FFF //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +269 0x0000 //RX_TDDRC_THRD_0 +270 0x0000 //RX_TDDRC_THRD_1 +271 0x7FFF //RX_TDDRC_THRD_2 +272 0x7FFF //RX_TDDRC_THRD_3 +273 0x7FFF //RX_TDDRC_SLANT_0 +274 0x7FFF //RX_TDDRC_SLANT_1 +275 0x3000 //RX_TDDRC_ALPHA_UP_0 +276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x199A //RX_TDDRC_HMNC_GAIN +279 0x0001 //RX_TDDRC_SMT_FLAG +280 0x0CCD //RX_TDDRC_SMT_W +281 0x0155 //RX_TDDRC_DRC_GAIN +195 0x0020 //RX_FDEQ_SUBNUM +196 0x4848 //RX_FDEQ_GAIN_0 +197 0x4848 //RX_FDEQ_GAIN_1 +198 0x4848 //RX_FDEQ_GAIN_2 +199 0x4848 //RX_FDEQ_GAIN_3 +200 0x4848 //RX_FDEQ_GAIN_4 +201 0x4848 //RX_FDEQ_GAIN_5 +202 0x4848 //RX_FDEQ_GAIN_6 +203 0x4848 //RX_FDEQ_GAIN_7 +204 0x4848 //RX_FDEQ_GAIN_8 +205 0x4848 //RX_FDEQ_GAIN_9 +206 0x4848 //RX_FDEQ_GAIN_10 +207 0x4848 //RX_FDEQ_GAIN_11 +208 0x4848 //RX_FDEQ_GAIN_12 +209 0x4848 //RX_FDEQ_GAIN_13 +210 0x4848 //RX_FDEQ_GAIN_14 +211 0x4848 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0202 //RX_FDEQ_BIN_0 +221 0x0203 //RX_FDEQ_BIN_1 +222 0x0303 //RX_FDEQ_BIN_2 +223 0x0304 //RX_FDEQ_BIN_3 +224 0x0405 //RX_FDEQ_BIN_4 +225 0x0506 //RX_FDEQ_BIN_5 +226 0x0708 //RX_FDEQ_BIN_6 +227 0x090A //RX_FDEQ_BIN_7 +228 0x0B0C //RX_FDEQ_BIN_8 +229 0x0D0E //RX_FDEQ_BIN_9 +230 0x1013 //RX_FDEQ_BIN_10 +231 0x1719 //RX_FDEQ_BIN_11 +232 0x1B1E //RX_FDEQ_BIN_12 +233 0x1E1E //RX_FDEQ_BIN_13 +234 0x1E28 //RX_FDEQ_BIN_14 +235 0x282C //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x4000 //RX_FDEQ_RESRV_0 +245 0x0320 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0030 //RX_FDDRC_BAND_MARGIN_1 +248 0x0050 //RX_FDDRC_BAND_MARGIN_2 +249 0x0080 //RX_FDDRC_BAND_MARGIN_3 +250 0x0007 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x5000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x6400 //RX_FDDRC_THRD_3_2 +258 0x6400 //RX_FDDRC_THRD_3_3 +259 0x2000 //RX_FDDRC_SLANT_0_0 +260 0x2000 //RX_FDDRC_SLANT_0_1 +261 0x2000 //RX_FDDRC_SLANT_0_2 +262 0x2000 //RX_FDDRC_SLANT_0_3 +263 0x5333 //RX_FDDRC_SLANT_1_0 +264 0x5333 //RX_FDDRC_SLANT_1_1 +265 0x5333 //RX_FDDRC_SLANT_1_2 +266 0x5333 //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +286 0x0100 //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 +#VOL 6 +163 0x3000 //RX_TDDRC_ALPHA_UP_1 +164 0x3000 //RX_TDDRC_ALPHA_UP_2 +165 0x3000 //RX_TDDRC_ALPHA_UP_3 +166 0x3000 //RX_TDDRC_ALPHA_UP_4 +184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +190 0x7FFF //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +269 0x0000 //RX_TDDRC_THRD_0 +270 0x0000 //RX_TDDRC_THRD_1 +271 0x7FFF //RX_TDDRC_THRD_2 +272 0x7FFF //RX_TDDRC_THRD_3 +273 0x7FFF //RX_TDDRC_SLANT_0 +274 0x7FFF //RX_TDDRC_SLANT_1 +275 0x3000 //RX_TDDRC_ALPHA_UP_0 +276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x199A //RX_TDDRC_HMNC_GAIN +279 0x0001 //RX_TDDRC_SMT_FLAG +280 0x0CCD //RX_TDDRC_SMT_W +281 0x0155 //RX_TDDRC_DRC_GAIN +195 0x0020 //RX_FDEQ_SUBNUM +196 0x4848 //RX_FDEQ_GAIN_0 +197 0x4848 //RX_FDEQ_GAIN_1 +198 0x4848 //RX_FDEQ_GAIN_2 +199 0x4848 //RX_FDEQ_GAIN_3 +200 0x4848 //RX_FDEQ_GAIN_4 +201 0x4848 //RX_FDEQ_GAIN_5 +202 0x4848 //RX_FDEQ_GAIN_6 +203 0x4848 //RX_FDEQ_GAIN_7 +204 0x4848 //RX_FDEQ_GAIN_8 +205 0x4848 //RX_FDEQ_GAIN_9 +206 0x4848 //RX_FDEQ_GAIN_10 +207 0x4848 //RX_FDEQ_GAIN_11 +208 0x4848 //RX_FDEQ_GAIN_12 +209 0x4848 //RX_FDEQ_GAIN_13 +210 0x4848 //RX_FDEQ_GAIN_14 +211 0x4848 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0202 //RX_FDEQ_BIN_0 +221 0x0203 //RX_FDEQ_BIN_1 +222 0x0303 //RX_FDEQ_BIN_2 +223 0x0304 //RX_FDEQ_BIN_3 +224 0x0405 //RX_FDEQ_BIN_4 +225 0x0506 //RX_FDEQ_BIN_5 +226 0x0708 //RX_FDEQ_BIN_6 +227 0x090A //RX_FDEQ_BIN_7 +228 0x0B0C //RX_FDEQ_BIN_8 +229 0x0D0E //RX_FDEQ_BIN_9 +230 0x1013 //RX_FDEQ_BIN_10 +231 0x1719 //RX_FDEQ_BIN_11 +232 0x1B1E //RX_FDEQ_BIN_12 +233 0x1E1E //RX_FDEQ_BIN_13 +234 0x1E28 //RX_FDEQ_BIN_14 +235 0x282C //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x4000 //RX_FDEQ_RESRV_0 +245 0x0320 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0030 //RX_FDDRC_BAND_MARGIN_1 +248 0x0050 //RX_FDDRC_BAND_MARGIN_2 +249 0x0080 //RX_FDDRC_BAND_MARGIN_3 +250 0x0007 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x5000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x6400 //RX_FDDRC_THRD_3_2 +258 0x6400 //RX_FDDRC_THRD_3_3 +259 0x2000 //RX_FDDRC_SLANT_0_0 +260 0x2000 //RX_FDDRC_SLANT_0_1 +261 0x2000 //RX_FDDRC_SLANT_0_2 +262 0x2000 //RX_FDDRC_SLANT_0_3 +263 0x5333 //RX_FDDRC_SLANT_1_0 +264 0x5333 //RX_FDDRC_SLANT_1_1 +265 0x5333 //RX_FDDRC_SLANT_1_2 +266 0x5333 //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +286 0x0100 //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 #CASE_NAME BLUETOOTH-BTWB-VOICE_GENERIC-FB -#PARAM_TYPE TX+RX -#TOTAL_CUSTOM_STEP 7 +#PARAM_MODE Full +#PARAM_TYPE TX+2RX +#TOTAL_CUSTOM_STEP 7+7 #TX 0 0x0009 //TX_OPERATION_MODE_0 1 0x0009 //TX_OPERATION_MODE_1 @@ -28306,10 +42979,10 @@ 248 0xF600 //TX_THR_SN_EST_6 249 0xF600 //TX_THR_SN_EST_7 250 0x0200 //TX_DELTA_THR_SN_EST_0 -251 0x0200 //TX_DELTA_THR_SN_EST_1 -252 0x0400 //TX_DELTA_THR_SN_EST_2 -253 0x0300 //TX_DELTA_THR_SN_EST_3 -254 0x0600 //TX_DELTA_THR_SN_EST_4 +251 0x0400 //TX_DELTA_THR_SN_EST_1 +252 0x0300 //TX_DELTA_THR_SN_EST_2 +253 0x0600 //TX_DELTA_THR_SN_EST_3 +254 0x0200 //TX_DELTA_THR_SN_EST_4 255 0x0200 //TX_DELTA_THR_SN_EST_5 256 0x0200 //TX_DELTA_THR_SN_EST_6 257 0x0200 //TX_DELTA_THR_SN_EST_7 @@ -28337,31 +43010,31 @@ 279 0x2000 //TX_B_POST_FLT_0 280 0x2000 //TX_B_POST_FLT_1 281 0x0012 //TX_NS_LVL_CTRL_0 -282 0x0019 //TX_NS_LVL_CTRL_1 +282 0x0016 //TX_NS_LVL_CTRL_1 283 0x0016 //TX_NS_LVL_CTRL_2 -284 0x0016 //TX_NS_LVL_CTRL_3 -285 0x0019 //TX_NS_LVL_CTRL_4 +284 0x0019 //TX_NS_LVL_CTRL_3 +285 0x0010 //TX_NS_LVL_CTRL_4 286 0x0010 //TX_NS_LVL_CTRL_5 -287 0x0010 //TX_NS_LVL_CTRL_6 +287 0x0019 //TX_NS_LVL_CTRL_6 288 0x0010 //TX_NS_LVL_CTRL_7 289 0x000C //TX_MIN_GAIN_S_0 -290 0x0011 //TX_MIN_GAIN_S_1 +290 0x000C //TX_MIN_GAIN_S_1 291 0x000C //TX_MIN_GAIN_S_2 -292 0x000C //TX_MIN_GAIN_S_3 -293 0x000F //TX_MIN_GAIN_S_4 +292 0x000F //TX_MIN_GAIN_S_3 +293 0x000C //TX_MIN_GAIN_S_4 294 0x000C //TX_MIN_GAIN_S_5 -295 0x000C //TX_MIN_GAIN_S_6 +295 0x0011 //TX_MIN_GAIN_S_6 296 0x000C //TX_MIN_GAIN_S_7 297 0x7FFF //TX_NMOS_SUP 298 0x0000 //TX_NS_MAX_PRI_SNR_TH 299 0x0000 //TX_NMOS_SUP_MENSA 300 0x7000 //TX_SNRI_SUP_0 -301 0x6000 //TX_SNRI_SUP_1 +301 0x7000 //TX_SNRI_SUP_1 302 0x7000 //TX_SNRI_SUP_2 -303 0x7000 //TX_SNRI_SUP_3 -304 0x6000 //TX_SNRI_SUP_4 +303 0x6000 //TX_SNRI_SUP_3 +304 0x7FFF //TX_SNRI_SUP_4 305 0x7FFF //TX_SNRI_SUP_5 -306 0x7FFF //TX_SNRI_SUP_6 +306 0x6000 //TX_SNRI_SUP_6 307 0x7FFF //TX_SNRI_SUP_7 308 0x7FFF //TX_THR_LFNS 309 0x0016 //TX_G_LFNS @@ -28378,8 +43051,8 @@ 320 0x6000 //TX_A_POST_FILT_S_6 321 0x6000 //TX_A_POST_FILT_S_7 322 0x2000 //TX_B_POST_FILT_0 -323 0x2000 //TX_B_POST_FILT_1 -324 0x4000 //TX_B_POST_FILT_2 +323 0x4000 //TX_B_POST_FILT_1 +324 0x2000 //TX_B_POST_FILT_2 325 0x2000 //TX_B_POST_FILT_3 326 0x2000 //TX_B_POST_FILT_4 327 0x2000 //TX_B_POST_FILT_5 @@ -28435,10 +43108,10 @@ 377 0x0000 //TX_NOISE_TH_5_4 378 0x02BC //TX_NOISE_TH_6 379 0x0020 //TX_MINENOISE_TH -380 0x4000 //TX_MINENOISE_MIC0_TH_MTS -381 0xFFEE //TX_MINENOISE_MIC0_TH_EXP -382 0x6000 //TX_MINENOISE_MIC0_S_TH_MTS -383 0xFFF3 //TX_MINENOISE_MIC0_S_TH_EXP +380 0x4000 //TX_MORENS_TFMASK_TH +381 0xFFEE //TX_DRC_QUIET_FLOOR +382 0x6000 //TX_RATIODTL_CUT_TH +383 0xFFF3 //TX_DT_CUT_K1 384 0x0666 //TX_OUT_ENER_S_TH_CLEAN 385 0x0666 //TX_OUT_ENER_S_TH_LESSCLEAN 386 0x0333 //TX_OUT_ENER_S_TH_NOISY @@ -28446,15 +43119,15 @@ 388 0x0333 //TX_OUT_ENER_TH_SPEECH 389 0x2000 //TX_SN_NPB_GAIN 390 0x0000 //TX_NN_NPB_GAIN -391 0x0000 //TX_CSX_ALPHA_0 -392 0x0000 //TX_CSX_ALPHA_1 -393 0x0000 //TX_CSX_ALPHA_2 -394 0x0000 //TX_CSX_ALPHA_3 -395 0x0800 //TX_MU_ARSP_EST -396 0x00C8 //TX_P_OUTBEAM_MIN_TH +391 0x0000 //TX_POST_MASK_SUP_HSNE +392 0x0000 //TX_TAIL_DET_TH +393 0x0000 //TX_B_LESSCUT_RTO_WTA +394 0x0000 //TX_MEL_G_R +395 0x0800 //TX_SUPHIGH_TH +396 0x00C8 //TX_MASK_G_R 397 0x0002 //TX_EXTRA_NS_L -398 0x0800 //TX_EXTRA_NS_A -399 0x0005 //TX_VR_NOISE_FLOOR_TH +398 0x0800 //TX_C_POST_FLT_MASK +399 0x0005 //TX_A_POST_FLT_WNS 400 0x0148 //TX_MIN_G_LOW300HZ 401 0x0002 //TX_MAXLEVEL_CNG 402 0x00B4 //TX_STN_NOISE_TH @@ -28569,16 +43242,16 @@ 511 0x6666 //TX_MIC_TO_BFGAIN 512 0x0000 //TX_MICTOBFGAIN0 513 0x0000 //TX_FASTMUE_TH -514 0x0000 //TX_DERVB_LEN_0 -515 0x0000 //TX_DERVB_LEN_1 -516 0x0000 //TX_RHO_DERVB -517 0x0000 //TX_MIC_INDX_DERVB -518 0x0000 //TX_MU_DERVB -519 0x0000 //TX_DR_RESRV_0 -520 0x0000 //TX_DR_RESRV_1 -521 0x0000 //TX_DR_RESRV_2 -522 0x0000 //TX_DR_RESRV_3 -523 0x0000 //TX_DR_RESRV_4 +514 0x0000 //TX_DEREVERB_LF_MU +515 0x0000 //TX_DEREVERB_HF_MU +516 0x0000 //TX_DEREVERB_DELAY +517 0x0000 //TX_DEREVERB_COEF_LEN +518 0x0000 //TX_DEREVERB_DNR +519 0x0000 //TX_DEREVERB_ALPHA +520 0x0000 //TX_DEREVERB_BETA +521 0x0000 //TX_GSC_RTOL_TH +522 0x0000 //TX_GSC_RTOH_TH +523 0x0000 //TX_WIDE2_MEANHTH 524 0x0000 //TX_DR_RESRV_5 525 0x0000 //TX_DR_RESRV_6 526 0x0000 //TX_DR_RESRV_7 @@ -28952,8 +43625,73 @@ 894 0xC000 //TX_FASTNS_SSA_THHFL 895 0xCCCC //TX_FASTNS_SSA_THLFH 896 0xD999 //TX_FASTNS_SSA_THHFH +897 0x0000 //TX_SENDFUNC_REG_MICMUTE +898 0x0000 //TX_SENDFUNC_REG_MICMUTE1 +899 0x0000 //TX_MICMUTE_RATIO_THR +900 0x0000 //TX_MICMUTE_AMP_THR +901 0x0000 //TX_MICMUTE_HPF_IND +902 0x0000 //TX_MICMUTE_LOG_EYR_TH +903 0x0000 //TX_MICMUTE_CVG_TIME +904 0x0000 //TX_MICMUTE_RELEASE_TIME +905 0x0000 //TX_MIC_VOLUME_MIC0MUTE +906 0x0000 //TX_MICMUTE_EPD_OFFSET_0 +907 0x0000 //TX_MICMUTE_FRQ_AEC_L +908 0x0000 //TX_MICMUTE_EAD_THR +909 0x0000 //TX_MICMUTE_LAMBDA_CB_NLE +910 0x0000 //TX_MICMUTE_LAMBDA_RE_EST +911 0x0000 //TX_DTD_THR1_MICMUTE_0 +912 0x0000 //TX_DTD_THR1_MICMUTE_1 +913 0x0000 //TX_DTD_THR1_MICMUTE_2 +914 0x0000 //TX_DTD_THR1_MICMUTE_3 +915 0x0000 //TX_DTD_THR2_MICMUTE_0 +916 0x0000 //TX_MICMUTE_MIN_EQ_RE_EST_0 +917 0x0000 //TX_MICMUTE_MIN_EQ_RE_EST_1 +918 0x0000 //TX_MICMUTE_MIN_EQ_RE_EST_2 +919 0x0000 //TX_MICMUTE_MIN_EQ_RE_EST_3 +920 0x0000 //TX_MICMUTE_MIN_EQ_RE_EST_4 +921 0x0000 //TX_MICMUTE_C_POST_FLT +922 0x0000 //TX_MICMUTE_DT_CUT_K +923 0x0000 //TX_MICMUTE_DT_CUT_THR +924 0x0000 //TX_MICMUTE_DT_CUT_K2 +925 0x0000 //TX_MICMUTE_DT_CUT_THR2 +926 0x0000 //TX_MICMUTE_DT2_HOLD_N +927 0x0000 //TX_MICMUTE_RATIODTH_THCUT +928 0x0000 //TX_MICMUTE_B_POST_FLT_ECHOL +929 0x0000 //TX_MICMUTE_B_POST_FLT_ECHOH +930 0x0000 //TX_MICMUTE_C_POST_FLT_MASK +931 0x0000 //TX_MICMUTE_RATIODTL_CUT_TH +932 0x0000 //TX_MICMUTE_DT_CUT_K1 +933 0x0000 //TX_MICMUTE_N2_SN_EST +934 0x0000 //TX_MICMUTE_THR_SN_EST_0 +935 0x0000 //TX_MICMUTE_MIN_G_CTRL_0 +936 0x0000 //TX_MICMUTE_A_POST_FILT_S_0 +937 0x0000 //TX_MICMUTE_B_POST_FILT_0 +938 0x0000 //TX_MIC1RUB_AMP_THR +939 0x0000 //TX_MIC1MUTE_RATIO_THR +940 0x0000 //TX_MIC1MUTE_AMP_THR +941 0x0000 //TX_MIC1MUTE_CVG_TIME +942 0x0000 //TX_MIC1MUTE_RELEASE_TIME +943 0x0000 //TX_AMS_RESRV_01 +944 0x0000 //TX_AMS_RESRV_02 +945 0x0000 //TX_AMS_RESRV_03 +946 0x0000 //TX_AMS_RESRV_04 +947 0x0000 //TX_AMS_RESRV_05 +948 0x0000 //TX_AMS_RESRV_06 +949 0x0000 //TX_AMS_RESRV_07 +950 0x0000 //TX_AMS_RESRV_08 +951 0x0000 //TX_AMS_RESRV_09 +952 0x0000 //TX_AMS_RESRV_10 +953 0x0000 //TX_AMS_RESRV_11 +954 0x0000 //TX_AMS_RESRV_12 +955 0x0000 //TX_AMS_RESRV_13 +956 0x0000 //TX_AMS_RESRV_14 +957 0x0000 //TX_AMS_RESRV_15 +958 0x0000 //TX_AMS_RESRV_16 +959 0x0000 //TX_AMS_RESRV_17 +960 0x0000 //TX_AMS_RESRV_18 +961 0x0000 //TX_AMS_RESRV_19 #RX -0 0x0064 //RX_RECVFUNC_MODE_0 +0 0x2064 //RX_RECVFUNC_MODE_0 1 0x0000 //RX_RECVFUNC_MODE_1 2 0x0004 //RX_SAMPLINGFREQ_SIG 3 0x0004 //RX_SAMPLINGFREQ_PROC @@ -29803,10 +44541,862 @@ 110 0x0000 //RX_FDDRC_RESRV_0 129 0x0100 //RX_SPK_VOL 130 0x0000 //RX_VOL_RESRV_0 +#RX 2 +157 0x0064 //RX_RECVFUNC_MODE_0 +158 0x0000 //RX_RECVFUNC_MODE_1 +159 0x0004 //RX_SAMPLINGFREQ_SIG +160 0x0004 //RX_SAMPLINGFREQ_PROC +161 0x000A //RX_FRAME_SZ +162 0x0000 //RX_DELAY_OPT +163 0x1000 //RX_TDDRC_ALPHA_UP_1 +164 0x1000 //RX_TDDRC_ALPHA_UP_2 +165 0x1000 //RX_TDDRC_ALPHA_UP_3 +166 0x1000 //RX_TDDRC_ALPHA_UP_4 +167 0x0800 //RX_PGA +168 0x7FFF //RX_A_HP +169 0x4000 //RX_B_PE +170 0x7800 //RX_THR_PITCH_DET_0 +171 0x7000 //RX_THR_PITCH_DET_1 +172 0x6000 //RX_THR_PITCH_DET_2 +173 0x0008 //RX_PITCH_BFR_LEN +174 0x0003 //RX_SBD_PITCH_DET +175 0x0100 //RX_PP_RESRV_0 +176 0x0020 //RX_PP_RESRV_1 +177 0x0500 //RX_N_SN_EST +178 0x000C //RX_N2_SN_EST +179 0x000A //RX_NS_LVL_CTRL +180 0xF600 //RX_THR_SN_EST +181 0x7000 //RX_LAMBDA_PFILT +182 0x000A //RX_FENS_RESRV_0 +183 0x0190 //RX_FENS_RESRV_1 +184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +187 0x0002 //RX_EXTRA_NS_L +188 0x0800 //RX_EXTRA_NS_A +189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +190 0x7FFF //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +192 0x199A //RX_A_POST_FLT +193 0x0000 //RX_LMT_THRD +194 0x4000 //RX_LMT_ALPHA +195 0x0020 //RX_FDEQ_SUBNUM +196 0x4848 //RX_FDEQ_GAIN_0 +197 0x4848 //RX_FDEQ_GAIN_1 +198 0x4848 //RX_FDEQ_GAIN_2 +199 0x4848 //RX_FDEQ_GAIN_3 +200 0x4848 //RX_FDEQ_GAIN_4 +201 0x4848 //RX_FDEQ_GAIN_5 +202 0x4848 //RX_FDEQ_GAIN_6 +203 0x4848 //RX_FDEQ_GAIN_7 +204 0x4848 //RX_FDEQ_GAIN_8 +205 0x4848 //RX_FDEQ_GAIN_9 +206 0x4848 //RX_FDEQ_GAIN_10 +207 0x4848 //RX_FDEQ_GAIN_11 +208 0x4848 //RX_FDEQ_GAIN_12 +209 0x4848 //RX_FDEQ_GAIN_13 +210 0x4848 //RX_FDEQ_GAIN_14 +211 0x4848 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0202 //RX_FDEQ_BIN_0 +221 0x0203 //RX_FDEQ_BIN_1 +222 0x0304 //RX_FDEQ_BIN_2 +223 0x0405 //RX_FDEQ_BIN_3 +224 0x0607 //RX_FDEQ_BIN_4 +225 0x0809 //RX_FDEQ_BIN_5 +226 0x0A0B //RX_FDEQ_BIN_6 +227 0x0C0D //RX_FDEQ_BIN_7 +228 0x0E0F //RX_FDEQ_BIN_8 +229 0x1011 //RX_FDEQ_BIN_9 +230 0x1214 //RX_FDEQ_BIN_10 +231 0x1618 //RX_FDEQ_BIN_11 +232 0x1C1C //RX_FDEQ_BIN_12 +233 0x2020 //RX_FDEQ_BIN_13 +234 0x2020 //RX_FDEQ_BIN_14 +235 0x2011 //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x4000 //RX_FDEQ_RESRV_0 +245 0x0320 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0030 //RX_FDDRC_BAND_MARGIN_1 +248 0x0050 //RX_FDDRC_BAND_MARGIN_2 +249 0x0080 //RX_FDDRC_BAND_MARGIN_3 +250 0x0007 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x5000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x6400 //RX_FDDRC_THRD_3_2 +258 0x6400 //RX_FDDRC_THRD_3_3 +259 0x2000 //RX_FDDRC_SLANT_0_0 +260 0x2000 //RX_FDDRC_SLANT_0_1 +261 0x2000 //RX_FDDRC_SLANT_0_2 +262 0x2000 //RX_FDDRC_SLANT_0_3 +263 0x5333 //RX_FDDRC_SLANT_1_0 +264 0x5333 //RX_FDDRC_SLANT_1_1 +265 0x5333 //RX_FDDRC_SLANT_1_2 +266 0x5333 //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +268 0x0000 //RX_FILTINDX +269 0x0000 //RX_TDDRC_THRD_0 +270 0x0000 //RX_TDDRC_THRD_1 +271 0x7FFF //RX_TDDRC_THRD_2 +272 0x7FFF //RX_TDDRC_THRD_3 +273 0x7FFF //RX_TDDRC_SLANT_0 +274 0x7FFF //RX_TDDRC_SLANT_1 +275 0x1000 //RX_TDDRC_ALPHA_UP_0 +276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x199A //RX_TDDRC_HMNC_GAIN +279 0x0001 //RX_TDDRC_SMT_FLAG +280 0x0CCD //RX_TDDRC_SMT_W +281 0x0155 //RX_TDDRC_DRC_GAIN +282 0x7C00 //RX_LAMBDA_PKA_FP +283 0x2000 //RX_TPKA_FP +284 0x2000 //RX_MIN_G_FP +285 0x0080 //RX_MAX_G_FP +286 0x0100 //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 +288 0x0000 //RX_MAXLEVEL_CNG +289 0x3000 //RX_BWE_UV_TH +290 0x3000 //RX_BWE_UV_TH2 +291 0x1800 //RX_BWE_UV_TH3 +292 0x1000 //RX_BWE_V_TH +293 0x04CD //RX_BWE_GAIN1_V_TH1 +294 0x0F33 //RX_BWE_GAIN1_V_TH2 +295 0x7333 //RX_BWE_UV_EQ +296 0x199A //RX_BWE_V_EQ +297 0x7333 //RX_BWE_TONE_TH +298 0x0004 //RX_BWE_UV_HOLD_T +299 0x6CCD //RX_BWE_GAIN2_ALPHA +300 0x799A //RX_BWE_GAIN3_ALPHA +301 0x001E //RX_BWE_CUTOFF +302 0x3000 //RX_BWE_GAINFILL +303 0x3200 //RX_BWE_MAXTH_TONE +304 0x2000 //RX_BWE_EQ_0 +305 0x2000 //RX_BWE_EQ_1 +306 0x2000 //RX_BWE_EQ_2 +307 0x2000 //RX_BWE_EQ_3 +308 0x2000 //RX_BWE_EQ_4 +309 0x2000 //RX_BWE_EQ_5 +310 0x2000 //RX_BWE_EQ_6 +311 0x0000 //RX_BWE_RESRV_0 +312 0x0000 //RX_BWE_RESRV_1 +313 0x0000 //RX_BWE_RESRV_2 +#VOL 0 +163 0x1000 //RX_TDDRC_ALPHA_UP_1 +164 0x1000 //RX_TDDRC_ALPHA_UP_2 +165 0x1000 //RX_TDDRC_ALPHA_UP_3 +166 0x1000 //RX_TDDRC_ALPHA_UP_4 +184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +190 0x7FFF //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +269 0x0000 //RX_TDDRC_THRD_0 +270 0x0000 //RX_TDDRC_THRD_1 +271 0x7FFF //RX_TDDRC_THRD_2 +272 0x7FFF //RX_TDDRC_THRD_3 +273 0x7FFF //RX_TDDRC_SLANT_0 +274 0x7FFF //RX_TDDRC_SLANT_1 +275 0x1000 //RX_TDDRC_ALPHA_UP_0 +276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x199A //RX_TDDRC_HMNC_GAIN +279 0x0001 //RX_TDDRC_SMT_FLAG +280 0x0CCD //RX_TDDRC_SMT_W +281 0x0155 //RX_TDDRC_DRC_GAIN +195 0x0020 //RX_FDEQ_SUBNUM +196 0x4848 //RX_FDEQ_GAIN_0 +197 0x4848 //RX_FDEQ_GAIN_1 +198 0x4848 //RX_FDEQ_GAIN_2 +199 0x4848 //RX_FDEQ_GAIN_3 +200 0x4848 //RX_FDEQ_GAIN_4 +201 0x4848 //RX_FDEQ_GAIN_5 +202 0x4848 //RX_FDEQ_GAIN_6 +203 0x4848 //RX_FDEQ_GAIN_7 +204 0x4848 //RX_FDEQ_GAIN_8 +205 0x4848 //RX_FDEQ_GAIN_9 +206 0x4848 //RX_FDEQ_GAIN_10 +207 0x4848 //RX_FDEQ_GAIN_11 +208 0x4848 //RX_FDEQ_GAIN_12 +209 0x4848 //RX_FDEQ_GAIN_13 +210 0x4848 //RX_FDEQ_GAIN_14 +211 0x4848 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0202 //RX_FDEQ_BIN_0 +221 0x0203 //RX_FDEQ_BIN_1 +222 0x0304 //RX_FDEQ_BIN_2 +223 0x0405 //RX_FDEQ_BIN_3 +224 0x0607 //RX_FDEQ_BIN_4 +225 0x0809 //RX_FDEQ_BIN_5 +226 0x0A0B //RX_FDEQ_BIN_6 +227 0x0C0D //RX_FDEQ_BIN_7 +228 0x0E0F //RX_FDEQ_BIN_8 +229 0x1011 //RX_FDEQ_BIN_9 +230 0x1214 //RX_FDEQ_BIN_10 +231 0x1618 //RX_FDEQ_BIN_11 +232 0x1C1C //RX_FDEQ_BIN_12 +233 0x2020 //RX_FDEQ_BIN_13 +234 0x2020 //RX_FDEQ_BIN_14 +235 0x2011 //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x4000 //RX_FDEQ_RESRV_0 +245 0x0320 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0030 //RX_FDDRC_BAND_MARGIN_1 +248 0x0050 //RX_FDDRC_BAND_MARGIN_2 +249 0x0080 //RX_FDDRC_BAND_MARGIN_3 +250 0x0007 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x5000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x6400 //RX_FDDRC_THRD_3_2 +258 0x6400 //RX_FDDRC_THRD_3_3 +259 0x2000 //RX_FDDRC_SLANT_0_0 +260 0x2000 //RX_FDDRC_SLANT_0_1 +261 0x2000 //RX_FDDRC_SLANT_0_2 +262 0x2000 //RX_FDDRC_SLANT_0_3 +263 0x5333 //RX_FDDRC_SLANT_1_0 +264 0x5333 //RX_FDDRC_SLANT_1_1 +265 0x5333 //RX_FDDRC_SLANT_1_2 +266 0x5333 //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +286 0x0100 //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 +#VOL 1 +163 0x1000 //RX_TDDRC_ALPHA_UP_1 +164 0x1000 //RX_TDDRC_ALPHA_UP_2 +165 0x1000 //RX_TDDRC_ALPHA_UP_3 +166 0x1000 //RX_TDDRC_ALPHA_UP_4 +184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +190 0x7FFF //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +269 0x0000 //RX_TDDRC_THRD_0 +270 0x0000 //RX_TDDRC_THRD_1 +271 0x7FFF //RX_TDDRC_THRD_2 +272 0x7FFF //RX_TDDRC_THRD_3 +273 0x7FFF //RX_TDDRC_SLANT_0 +274 0x7FFF //RX_TDDRC_SLANT_1 +275 0x1000 //RX_TDDRC_ALPHA_UP_0 +276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x199A //RX_TDDRC_HMNC_GAIN +279 0x0001 //RX_TDDRC_SMT_FLAG +280 0x0CCD //RX_TDDRC_SMT_W +281 0x0155 //RX_TDDRC_DRC_GAIN +195 0x0020 //RX_FDEQ_SUBNUM +196 0x4848 //RX_FDEQ_GAIN_0 +197 0x4848 //RX_FDEQ_GAIN_1 +198 0x4848 //RX_FDEQ_GAIN_2 +199 0x4848 //RX_FDEQ_GAIN_3 +200 0x4848 //RX_FDEQ_GAIN_4 +201 0x4848 //RX_FDEQ_GAIN_5 +202 0x4848 //RX_FDEQ_GAIN_6 +203 0x4848 //RX_FDEQ_GAIN_7 +204 0x4848 //RX_FDEQ_GAIN_8 +205 0x4848 //RX_FDEQ_GAIN_9 +206 0x4848 //RX_FDEQ_GAIN_10 +207 0x4848 //RX_FDEQ_GAIN_11 +208 0x4848 //RX_FDEQ_GAIN_12 +209 0x4848 //RX_FDEQ_GAIN_13 +210 0x4848 //RX_FDEQ_GAIN_14 +211 0x4848 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0202 //RX_FDEQ_BIN_0 +221 0x0203 //RX_FDEQ_BIN_1 +222 0x0304 //RX_FDEQ_BIN_2 +223 0x0405 //RX_FDEQ_BIN_3 +224 0x0607 //RX_FDEQ_BIN_4 +225 0x0809 //RX_FDEQ_BIN_5 +226 0x0A0B //RX_FDEQ_BIN_6 +227 0x0C0D //RX_FDEQ_BIN_7 +228 0x0E0F //RX_FDEQ_BIN_8 +229 0x1011 //RX_FDEQ_BIN_9 +230 0x1214 //RX_FDEQ_BIN_10 +231 0x1618 //RX_FDEQ_BIN_11 +232 0x1C1C //RX_FDEQ_BIN_12 +233 0x2020 //RX_FDEQ_BIN_13 +234 0x2020 //RX_FDEQ_BIN_14 +235 0x2011 //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x4000 //RX_FDEQ_RESRV_0 +245 0x0320 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0030 //RX_FDDRC_BAND_MARGIN_1 +248 0x0050 //RX_FDDRC_BAND_MARGIN_2 +249 0x0080 //RX_FDDRC_BAND_MARGIN_3 +250 0x0007 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x5000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x6400 //RX_FDDRC_THRD_3_2 +258 0x6400 //RX_FDDRC_THRD_3_3 +259 0x2000 //RX_FDDRC_SLANT_0_0 +260 0x2000 //RX_FDDRC_SLANT_0_1 +261 0x2000 //RX_FDDRC_SLANT_0_2 +262 0x2000 //RX_FDDRC_SLANT_0_3 +263 0x5333 //RX_FDDRC_SLANT_1_0 +264 0x5333 //RX_FDDRC_SLANT_1_1 +265 0x5333 //RX_FDDRC_SLANT_1_2 +266 0x5333 //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +286 0x0100 //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 +#VOL 2 +163 0x1000 //RX_TDDRC_ALPHA_UP_1 +164 0x1000 //RX_TDDRC_ALPHA_UP_2 +165 0x1000 //RX_TDDRC_ALPHA_UP_3 +166 0x1000 //RX_TDDRC_ALPHA_UP_4 +184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +190 0x7FFF //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +269 0x0000 //RX_TDDRC_THRD_0 +270 0x0000 //RX_TDDRC_THRD_1 +271 0x7FFF //RX_TDDRC_THRD_2 +272 0x7FFF //RX_TDDRC_THRD_3 +273 0x7FFF //RX_TDDRC_SLANT_0 +274 0x7FFF //RX_TDDRC_SLANT_1 +275 0x1000 //RX_TDDRC_ALPHA_UP_0 +276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x199A //RX_TDDRC_HMNC_GAIN +279 0x0001 //RX_TDDRC_SMT_FLAG +280 0x0CCD //RX_TDDRC_SMT_W +281 0x0155 //RX_TDDRC_DRC_GAIN +195 0x0020 //RX_FDEQ_SUBNUM +196 0x4848 //RX_FDEQ_GAIN_0 +197 0x4848 //RX_FDEQ_GAIN_1 +198 0x4848 //RX_FDEQ_GAIN_2 +199 0x4848 //RX_FDEQ_GAIN_3 +200 0x4848 //RX_FDEQ_GAIN_4 +201 0x4848 //RX_FDEQ_GAIN_5 +202 0x4848 //RX_FDEQ_GAIN_6 +203 0x4848 //RX_FDEQ_GAIN_7 +204 0x4848 //RX_FDEQ_GAIN_8 +205 0x4848 //RX_FDEQ_GAIN_9 +206 0x4848 //RX_FDEQ_GAIN_10 +207 0x4848 //RX_FDEQ_GAIN_11 +208 0x4848 //RX_FDEQ_GAIN_12 +209 0x4848 //RX_FDEQ_GAIN_13 +210 0x4848 //RX_FDEQ_GAIN_14 +211 0x4848 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0202 //RX_FDEQ_BIN_0 +221 0x0203 //RX_FDEQ_BIN_1 +222 0x0304 //RX_FDEQ_BIN_2 +223 0x0405 //RX_FDEQ_BIN_3 +224 0x0607 //RX_FDEQ_BIN_4 +225 0x0809 //RX_FDEQ_BIN_5 +226 0x0A0B //RX_FDEQ_BIN_6 +227 0x0C0D //RX_FDEQ_BIN_7 +228 0x0E0F //RX_FDEQ_BIN_8 +229 0x1011 //RX_FDEQ_BIN_9 +230 0x1214 //RX_FDEQ_BIN_10 +231 0x1618 //RX_FDEQ_BIN_11 +232 0x1C1C //RX_FDEQ_BIN_12 +233 0x2020 //RX_FDEQ_BIN_13 +234 0x2020 //RX_FDEQ_BIN_14 +235 0x2011 //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x4000 //RX_FDEQ_RESRV_0 +245 0x0320 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0030 //RX_FDDRC_BAND_MARGIN_1 +248 0x0050 //RX_FDDRC_BAND_MARGIN_2 +249 0x0080 //RX_FDDRC_BAND_MARGIN_3 +250 0x0007 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x5000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x6400 //RX_FDDRC_THRD_3_2 +258 0x6400 //RX_FDDRC_THRD_3_3 +259 0x2000 //RX_FDDRC_SLANT_0_0 +260 0x2000 //RX_FDDRC_SLANT_0_1 +261 0x2000 //RX_FDDRC_SLANT_0_2 +262 0x2000 //RX_FDDRC_SLANT_0_3 +263 0x5333 //RX_FDDRC_SLANT_1_0 +264 0x5333 //RX_FDDRC_SLANT_1_1 +265 0x5333 //RX_FDDRC_SLANT_1_2 +266 0x5333 //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +286 0x0100 //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 +#VOL 3 +163 0x1000 //RX_TDDRC_ALPHA_UP_1 +164 0x1000 //RX_TDDRC_ALPHA_UP_2 +165 0x1000 //RX_TDDRC_ALPHA_UP_3 +166 0x1000 //RX_TDDRC_ALPHA_UP_4 +184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +190 0x7FFF //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +269 0x0000 //RX_TDDRC_THRD_0 +270 0x0000 //RX_TDDRC_THRD_1 +271 0x7FFF //RX_TDDRC_THRD_2 +272 0x7FFF //RX_TDDRC_THRD_3 +273 0x7FFF //RX_TDDRC_SLANT_0 +274 0x7FFF //RX_TDDRC_SLANT_1 +275 0x1000 //RX_TDDRC_ALPHA_UP_0 +276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x199A //RX_TDDRC_HMNC_GAIN +279 0x0001 //RX_TDDRC_SMT_FLAG +280 0x0CCD //RX_TDDRC_SMT_W +281 0x0155 //RX_TDDRC_DRC_GAIN +195 0x0020 //RX_FDEQ_SUBNUM +196 0x4848 //RX_FDEQ_GAIN_0 +197 0x4848 //RX_FDEQ_GAIN_1 +198 0x4848 //RX_FDEQ_GAIN_2 +199 0x4848 //RX_FDEQ_GAIN_3 +200 0x4848 //RX_FDEQ_GAIN_4 +201 0x4848 //RX_FDEQ_GAIN_5 +202 0x4848 //RX_FDEQ_GAIN_6 +203 0x4848 //RX_FDEQ_GAIN_7 +204 0x4848 //RX_FDEQ_GAIN_8 +205 0x4848 //RX_FDEQ_GAIN_9 +206 0x4848 //RX_FDEQ_GAIN_10 +207 0x4848 //RX_FDEQ_GAIN_11 +208 0x4848 //RX_FDEQ_GAIN_12 +209 0x4848 //RX_FDEQ_GAIN_13 +210 0x4848 //RX_FDEQ_GAIN_14 +211 0x4848 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0202 //RX_FDEQ_BIN_0 +221 0x0203 //RX_FDEQ_BIN_1 +222 0x0304 //RX_FDEQ_BIN_2 +223 0x0405 //RX_FDEQ_BIN_3 +224 0x0607 //RX_FDEQ_BIN_4 +225 0x0809 //RX_FDEQ_BIN_5 +226 0x0A0B //RX_FDEQ_BIN_6 +227 0x0C0D //RX_FDEQ_BIN_7 +228 0x0E0F //RX_FDEQ_BIN_8 +229 0x1011 //RX_FDEQ_BIN_9 +230 0x1214 //RX_FDEQ_BIN_10 +231 0x1618 //RX_FDEQ_BIN_11 +232 0x1C1C //RX_FDEQ_BIN_12 +233 0x2020 //RX_FDEQ_BIN_13 +234 0x2020 //RX_FDEQ_BIN_14 +235 0x2011 //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x4000 //RX_FDEQ_RESRV_0 +245 0x0320 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0030 //RX_FDDRC_BAND_MARGIN_1 +248 0x0050 //RX_FDDRC_BAND_MARGIN_2 +249 0x0080 //RX_FDDRC_BAND_MARGIN_3 +250 0x0007 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x5000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x6400 //RX_FDDRC_THRD_3_2 +258 0x6400 //RX_FDDRC_THRD_3_3 +259 0x2000 //RX_FDDRC_SLANT_0_0 +260 0x2000 //RX_FDDRC_SLANT_0_1 +261 0x2000 //RX_FDDRC_SLANT_0_2 +262 0x2000 //RX_FDDRC_SLANT_0_3 +263 0x5333 //RX_FDDRC_SLANT_1_0 +264 0x5333 //RX_FDDRC_SLANT_1_1 +265 0x5333 //RX_FDDRC_SLANT_1_2 +266 0x5333 //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +286 0x0100 //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 +#VOL 4 +163 0x1000 //RX_TDDRC_ALPHA_UP_1 +164 0x1000 //RX_TDDRC_ALPHA_UP_2 +165 0x1000 //RX_TDDRC_ALPHA_UP_3 +166 0x1000 //RX_TDDRC_ALPHA_UP_4 +184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +190 0x7FFF //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +269 0x0000 //RX_TDDRC_THRD_0 +270 0x0000 //RX_TDDRC_THRD_1 +271 0x7FFF //RX_TDDRC_THRD_2 +272 0x7FFF //RX_TDDRC_THRD_3 +273 0x7FFF //RX_TDDRC_SLANT_0 +274 0x7FFF //RX_TDDRC_SLANT_1 +275 0x1000 //RX_TDDRC_ALPHA_UP_0 +276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x199A //RX_TDDRC_HMNC_GAIN +279 0x0001 //RX_TDDRC_SMT_FLAG +280 0x0CCD //RX_TDDRC_SMT_W +281 0x0155 //RX_TDDRC_DRC_GAIN +195 0x0020 //RX_FDEQ_SUBNUM +196 0x4848 //RX_FDEQ_GAIN_0 +197 0x4848 //RX_FDEQ_GAIN_1 +198 0x4848 //RX_FDEQ_GAIN_2 +199 0x4848 //RX_FDEQ_GAIN_3 +200 0x4848 //RX_FDEQ_GAIN_4 +201 0x4848 //RX_FDEQ_GAIN_5 +202 0x4848 //RX_FDEQ_GAIN_6 +203 0x4848 //RX_FDEQ_GAIN_7 +204 0x4848 //RX_FDEQ_GAIN_8 +205 0x4848 //RX_FDEQ_GAIN_9 +206 0x4848 //RX_FDEQ_GAIN_10 +207 0x4848 //RX_FDEQ_GAIN_11 +208 0x4848 //RX_FDEQ_GAIN_12 +209 0x4848 //RX_FDEQ_GAIN_13 +210 0x4848 //RX_FDEQ_GAIN_14 +211 0x4848 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0202 //RX_FDEQ_BIN_0 +221 0x0203 //RX_FDEQ_BIN_1 +222 0x0304 //RX_FDEQ_BIN_2 +223 0x0405 //RX_FDEQ_BIN_3 +224 0x0607 //RX_FDEQ_BIN_4 +225 0x0809 //RX_FDEQ_BIN_5 +226 0x0A0B //RX_FDEQ_BIN_6 +227 0x0C0D //RX_FDEQ_BIN_7 +228 0x0E0F //RX_FDEQ_BIN_8 +229 0x1011 //RX_FDEQ_BIN_9 +230 0x1214 //RX_FDEQ_BIN_10 +231 0x1618 //RX_FDEQ_BIN_11 +232 0x1C1C //RX_FDEQ_BIN_12 +233 0x2020 //RX_FDEQ_BIN_13 +234 0x2020 //RX_FDEQ_BIN_14 +235 0x2011 //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x4000 //RX_FDEQ_RESRV_0 +245 0x0320 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0030 //RX_FDDRC_BAND_MARGIN_1 +248 0x0050 //RX_FDDRC_BAND_MARGIN_2 +249 0x0080 //RX_FDDRC_BAND_MARGIN_3 +250 0x0007 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x5000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x6400 //RX_FDDRC_THRD_3_2 +258 0x6400 //RX_FDDRC_THRD_3_3 +259 0x2000 //RX_FDDRC_SLANT_0_0 +260 0x2000 //RX_FDDRC_SLANT_0_1 +261 0x2000 //RX_FDDRC_SLANT_0_2 +262 0x2000 //RX_FDDRC_SLANT_0_3 +263 0x5333 //RX_FDDRC_SLANT_1_0 +264 0x5333 //RX_FDDRC_SLANT_1_1 +265 0x5333 //RX_FDDRC_SLANT_1_2 +266 0x5333 //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +286 0x0100 //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 +#VOL 5 +163 0x1000 //RX_TDDRC_ALPHA_UP_1 +164 0x1000 //RX_TDDRC_ALPHA_UP_2 +165 0x1000 //RX_TDDRC_ALPHA_UP_3 +166 0x1000 //RX_TDDRC_ALPHA_UP_4 +184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +190 0x7FFF //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +269 0x0000 //RX_TDDRC_THRD_0 +270 0x0000 //RX_TDDRC_THRD_1 +271 0x7FFF //RX_TDDRC_THRD_2 +272 0x7FFF //RX_TDDRC_THRD_3 +273 0x7FFF //RX_TDDRC_SLANT_0 +274 0x7FFF //RX_TDDRC_SLANT_1 +275 0x1000 //RX_TDDRC_ALPHA_UP_0 +276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x199A //RX_TDDRC_HMNC_GAIN +279 0x0001 //RX_TDDRC_SMT_FLAG +280 0x0CCD //RX_TDDRC_SMT_W +281 0x0155 //RX_TDDRC_DRC_GAIN +195 0x0020 //RX_FDEQ_SUBNUM +196 0x4848 //RX_FDEQ_GAIN_0 +197 0x4848 //RX_FDEQ_GAIN_1 +198 0x4848 //RX_FDEQ_GAIN_2 +199 0x4848 //RX_FDEQ_GAIN_3 +200 0x4848 //RX_FDEQ_GAIN_4 +201 0x4848 //RX_FDEQ_GAIN_5 +202 0x4848 //RX_FDEQ_GAIN_6 +203 0x4848 //RX_FDEQ_GAIN_7 +204 0x4848 //RX_FDEQ_GAIN_8 +205 0x4848 //RX_FDEQ_GAIN_9 +206 0x4848 //RX_FDEQ_GAIN_10 +207 0x4848 //RX_FDEQ_GAIN_11 +208 0x4848 //RX_FDEQ_GAIN_12 +209 0x4848 //RX_FDEQ_GAIN_13 +210 0x4848 //RX_FDEQ_GAIN_14 +211 0x4848 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0202 //RX_FDEQ_BIN_0 +221 0x0203 //RX_FDEQ_BIN_1 +222 0x0304 //RX_FDEQ_BIN_2 +223 0x0405 //RX_FDEQ_BIN_3 +224 0x0607 //RX_FDEQ_BIN_4 +225 0x0809 //RX_FDEQ_BIN_5 +226 0x0A0B //RX_FDEQ_BIN_6 +227 0x0C0D //RX_FDEQ_BIN_7 +228 0x0E0F //RX_FDEQ_BIN_8 +229 0x1011 //RX_FDEQ_BIN_9 +230 0x1214 //RX_FDEQ_BIN_10 +231 0x1618 //RX_FDEQ_BIN_11 +232 0x1C1C //RX_FDEQ_BIN_12 +233 0x2020 //RX_FDEQ_BIN_13 +234 0x2020 //RX_FDEQ_BIN_14 +235 0x2011 //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x4000 //RX_FDEQ_RESRV_0 +245 0x0320 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0030 //RX_FDDRC_BAND_MARGIN_1 +248 0x0050 //RX_FDDRC_BAND_MARGIN_2 +249 0x0080 //RX_FDDRC_BAND_MARGIN_3 +250 0x0007 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x5000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x6400 //RX_FDDRC_THRD_3_2 +258 0x6400 //RX_FDDRC_THRD_3_3 +259 0x2000 //RX_FDDRC_SLANT_0_0 +260 0x2000 //RX_FDDRC_SLANT_0_1 +261 0x2000 //RX_FDDRC_SLANT_0_2 +262 0x2000 //RX_FDDRC_SLANT_0_3 +263 0x5333 //RX_FDDRC_SLANT_1_0 +264 0x5333 //RX_FDDRC_SLANT_1_1 +265 0x5333 //RX_FDDRC_SLANT_1_2 +266 0x5333 //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +286 0x0100 //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 +#VOL 6 +163 0x1000 //RX_TDDRC_ALPHA_UP_1 +164 0x1000 //RX_TDDRC_ALPHA_UP_2 +165 0x1000 //RX_TDDRC_ALPHA_UP_3 +166 0x1000 //RX_TDDRC_ALPHA_UP_4 +184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +190 0x7FFF //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +269 0x0000 //RX_TDDRC_THRD_0 +270 0x0000 //RX_TDDRC_THRD_1 +271 0x7FFF //RX_TDDRC_THRD_2 +272 0x7FFF //RX_TDDRC_THRD_3 +273 0x7FFF //RX_TDDRC_SLANT_0 +274 0x7FFF //RX_TDDRC_SLANT_1 +275 0x1000 //RX_TDDRC_ALPHA_UP_0 +276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x199A //RX_TDDRC_HMNC_GAIN +279 0x0001 //RX_TDDRC_SMT_FLAG +280 0x0CCD //RX_TDDRC_SMT_W +281 0x0155 //RX_TDDRC_DRC_GAIN +195 0x0020 //RX_FDEQ_SUBNUM +196 0x4848 //RX_FDEQ_GAIN_0 +197 0x4848 //RX_FDEQ_GAIN_1 +198 0x4848 //RX_FDEQ_GAIN_2 +199 0x4848 //RX_FDEQ_GAIN_3 +200 0x4848 //RX_FDEQ_GAIN_4 +201 0x4848 //RX_FDEQ_GAIN_5 +202 0x4848 //RX_FDEQ_GAIN_6 +203 0x4848 //RX_FDEQ_GAIN_7 +204 0x4848 //RX_FDEQ_GAIN_8 +205 0x4848 //RX_FDEQ_GAIN_9 +206 0x4848 //RX_FDEQ_GAIN_10 +207 0x4848 //RX_FDEQ_GAIN_11 +208 0x4848 //RX_FDEQ_GAIN_12 +209 0x4848 //RX_FDEQ_GAIN_13 +210 0x4848 //RX_FDEQ_GAIN_14 +211 0x4848 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0202 //RX_FDEQ_BIN_0 +221 0x0203 //RX_FDEQ_BIN_1 +222 0x0304 //RX_FDEQ_BIN_2 +223 0x0405 //RX_FDEQ_BIN_3 +224 0x0607 //RX_FDEQ_BIN_4 +225 0x0809 //RX_FDEQ_BIN_5 +226 0x0A0B //RX_FDEQ_BIN_6 +227 0x0C0D //RX_FDEQ_BIN_7 +228 0x0E0F //RX_FDEQ_BIN_8 +229 0x1011 //RX_FDEQ_BIN_9 +230 0x1214 //RX_FDEQ_BIN_10 +231 0x1618 //RX_FDEQ_BIN_11 +232 0x1C1C //RX_FDEQ_BIN_12 +233 0x2020 //RX_FDEQ_BIN_13 +234 0x2020 //RX_FDEQ_BIN_14 +235 0x2011 //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x4000 //RX_FDEQ_RESRV_0 +245 0x0320 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0030 //RX_FDDRC_BAND_MARGIN_1 +248 0x0050 //RX_FDDRC_BAND_MARGIN_2 +249 0x0080 //RX_FDDRC_BAND_MARGIN_3 +250 0x0007 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x5000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x6400 //RX_FDDRC_THRD_3_2 +258 0x6400 //RX_FDDRC_THRD_3_3 +259 0x2000 //RX_FDDRC_SLANT_0_0 +260 0x2000 //RX_FDDRC_SLANT_0_1 +261 0x2000 //RX_FDDRC_SLANT_0_2 +262 0x2000 //RX_FDDRC_SLANT_0_3 +263 0x5333 //RX_FDDRC_SLANT_1_0 +264 0x5333 //RX_FDDRC_SLANT_1_1 +265 0x5333 //RX_FDDRC_SLANT_1_2 +266 0x5333 //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +286 0x0100 //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 #CASE_NAME BLUETOOTH-BTWB_NREC-VOICE_GENERIC-NB -#PARAM_TYPE TX+RX -#TOTAL_CUSTOM_STEP 7 +#PARAM_MODE Full +#PARAM_TYPE TX+2RX +#TOTAL_CUSTOM_STEP 7+7 #TX 0 0x0008 //TX_OPERATION_MODE_0 1 0x0008 //TX_OPERATION_MODE_1 @@ -30059,20 +45649,20 @@ 248 0xF400 //TX_THR_SN_EST_6 249 0xF600 //TX_THR_SN_EST_7 250 0x0000 //TX_DELTA_THR_SN_EST_0 -251 0x0000 //TX_DELTA_THR_SN_EST_1 +251 0x0200 //TX_DELTA_THR_SN_EST_1 252 0x0200 //TX_DELTA_THR_SN_EST_2 253 0x0200 //TX_DELTA_THR_SN_EST_3 254 0x0200 //TX_DELTA_THR_SN_EST_4 255 0x0200 //TX_DELTA_THR_SN_EST_5 -256 0x0200 //TX_DELTA_THR_SN_EST_6 +256 0x0000 //TX_DELTA_THR_SN_EST_6 257 0x0200 //TX_DELTA_THR_SN_EST_7 258 0x6000 //TX_LAMBDA_NN_EST_0 -259 0x6000 //TX_LAMBDA_NN_EST_1 +259 0x4000 //TX_LAMBDA_NN_EST_1 260 0x4000 //TX_LAMBDA_NN_EST_2 261 0x4000 //TX_LAMBDA_NN_EST_3 262 0x4000 //TX_LAMBDA_NN_EST_4 263 0x4000 //TX_LAMBDA_NN_EST_5 -264 0x4000 //TX_LAMBDA_NN_EST_6 +264 0x6000 //TX_LAMBDA_NN_EST_6 265 0x4000 //TX_LAMBDA_NN_EST_7 266 0x0400 //TX_N_SN_EST 267 0x001E //TX_INBEAM_T @@ -30090,16 +45680,16 @@ 279 0x1000 //TX_B_POST_FLT_0 280 0x1000 //TX_B_POST_FLT_1 281 0x000F //TX_NS_LVL_CTRL_0 -282 0x000F //TX_NS_LVL_CTRL_1 -283 0x0011 //TX_NS_LVL_CTRL_2 +282 0x0011 //TX_NS_LVL_CTRL_1 +283 0x000F //TX_NS_LVL_CTRL_2 284 0x000F //TX_NS_LVL_CTRL_3 285 0x000F //TX_NS_LVL_CTRL_4 286 0x000F //TX_NS_LVL_CTRL_5 287 0x000F //TX_NS_LVL_CTRL_6 288 0x0011 //TX_NS_LVL_CTRL_7 289 0x000C //TX_MIN_GAIN_S_0 -290 0x000C //TX_MIN_GAIN_S_1 -291 0x000F //TX_MIN_GAIN_S_2 +290 0x000F //TX_MIN_GAIN_S_1 +291 0x000C //TX_MIN_GAIN_S_2 292 0x000C //TX_MIN_GAIN_S_3 293 0x000C //TX_MIN_GAIN_S_4 294 0x000C //TX_MIN_GAIN_S_5 @@ -30123,12 +45713,12 @@ 312 0x7FFF //TX_A_POST_FILT_0 313 0x2000 //TX_A_POST_FILT_1 314 0x4000 //TX_A_POST_FILT_S_0 -315 0x4000 //TX_A_POST_FILT_S_1 +315 0x5000 //TX_A_POST_FILT_S_1 316 0x5000 //TX_A_POST_FILT_S_2 317 0x5000 //TX_A_POST_FILT_S_3 318 0x5000 //TX_A_POST_FILT_S_4 319 0x5000 //TX_A_POST_FILT_S_5 -320 0x5000 //TX_A_POST_FILT_S_6 +320 0x4000 //TX_A_POST_FILT_S_6 321 0x5000 //TX_A_POST_FILT_S_7 322 0x1000 //TX_B_POST_FILT_0 323 0x1000 //TX_B_POST_FILT_1 @@ -30188,10 +45778,10 @@ 377 0x7FFF //TX_NOISE_TH_5_4 378 0x044C //TX_NOISE_TH_6 379 0x0014 //TX_MINENOISE_TH -380 0x4000 //TX_MINENOISE_MIC0_TH_MTS -381 0xFFEE //TX_MINENOISE_MIC0_TH_EXP -382 0x6000 //TX_MINENOISE_MIC0_S_TH_MTS -383 0xFFF3 //TX_MINENOISE_MIC0_S_TH_EXP +380 0x4000 //TX_MORENS_TFMASK_TH +381 0xFFEE //TX_DRC_QUIET_FLOOR +382 0x6000 //TX_RATIODTL_CUT_TH +383 0xFFF3 //TX_DT_CUT_K1 384 0x0666 //TX_OUT_ENER_S_TH_CLEAN 385 0x0666 //TX_OUT_ENER_S_TH_LESSCLEAN 386 0x0333 //TX_OUT_ENER_S_TH_NOISY @@ -30199,15 +45789,15 @@ 388 0x0333 //TX_OUT_ENER_TH_SPEECH 389 0x2000 //TX_SN_NPB_GAIN 390 0x0000 //TX_NN_NPB_GAIN -391 0x0000 //TX_CSX_ALPHA_0 -392 0x0000 //TX_CSX_ALPHA_1 -393 0x0000 //TX_CSX_ALPHA_2 -394 0x0000 //TX_CSX_ALPHA_3 -395 0x0800 //TX_MU_ARSP_EST -396 0x00C8 //TX_P_OUTBEAM_MIN_TH +391 0x0000 //TX_POST_MASK_SUP_HSNE +392 0x0000 //TX_TAIL_DET_TH +393 0x0000 //TX_B_LESSCUT_RTO_WTA +394 0x0000 //TX_MEL_G_R +395 0x0800 //TX_SUPHIGH_TH +396 0x00C8 //TX_MASK_G_R 397 0x0002 //TX_EXTRA_NS_L -398 0x0800 //TX_EXTRA_NS_A -399 0x0005 //TX_VR_NOISE_FLOOR_TH +398 0x0800 //TX_C_POST_FLT_MASK +399 0x0005 //TX_A_POST_FLT_WNS 400 0x0148 //TX_MIN_G_LOW300HZ 401 0x0002 //TX_MAXLEVEL_CNG 402 0x00B4 //TX_STN_NOISE_TH @@ -30322,16 +45912,16 @@ 511 0x6666 //TX_MIC_TO_BFGAIN 512 0x0000 //TX_MICTOBFGAIN0 513 0x0000 //TX_FASTMUE_TH -514 0x0000 //TX_DERVB_LEN_0 -515 0x0000 //TX_DERVB_LEN_1 -516 0x0000 //TX_RHO_DERVB -517 0x0000 //TX_MIC_INDX_DERVB -518 0x0000 //TX_MU_DERVB -519 0x0000 //TX_DR_RESRV_0 -520 0x0000 //TX_DR_RESRV_1 -521 0x0000 //TX_DR_RESRV_2 -522 0x0000 //TX_DR_RESRV_3 -523 0x0000 //TX_DR_RESRV_4 +514 0x0000 //TX_DEREVERB_LF_MU +515 0x0000 //TX_DEREVERB_HF_MU +516 0x0000 //TX_DEREVERB_DELAY +517 0x0000 //TX_DEREVERB_COEF_LEN +518 0x0000 //TX_DEREVERB_DNR +519 0x0000 //TX_DEREVERB_ALPHA +520 0x0000 //TX_DEREVERB_BETA +521 0x0000 //TX_GSC_RTOL_TH +522 0x0000 //TX_GSC_RTOH_TH +523 0x0000 //TX_WIDE2_MEANHTH 524 0x0000 //TX_DR_RESRV_5 525 0x0000 //TX_DR_RESRV_6 526 0x0000 //TX_DR_RESRV_7 @@ -30705,8 +46295,73 @@ 894 0xC000 //TX_FASTNS_SSA_THHFL 895 0xCCCC //TX_FASTNS_SSA_THLFH 896 0xD999 //TX_FASTNS_SSA_THHFH +897 0x0000 //TX_SENDFUNC_REG_MICMUTE +898 0x0000 //TX_SENDFUNC_REG_MICMUTE1 +899 0x0000 //TX_MICMUTE_RATIO_THR +900 0x0000 //TX_MICMUTE_AMP_THR +901 0x0000 //TX_MICMUTE_HPF_IND +902 0x0000 //TX_MICMUTE_LOG_EYR_TH +903 0x0000 //TX_MICMUTE_CVG_TIME +904 0x0000 //TX_MICMUTE_RELEASE_TIME +905 0x0000 //TX_MIC_VOLUME_MIC0MUTE +906 0x0000 //TX_MICMUTE_EPD_OFFSET_0 +907 0x0000 //TX_MICMUTE_FRQ_AEC_L +908 0x0000 //TX_MICMUTE_EAD_THR +909 0x0000 //TX_MICMUTE_LAMBDA_CB_NLE +910 0x0000 //TX_MICMUTE_LAMBDA_RE_EST +911 0x0000 //TX_DTD_THR1_MICMUTE_0 +912 0x0000 //TX_DTD_THR1_MICMUTE_1 +913 0x0000 //TX_DTD_THR1_MICMUTE_2 +914 0x0000 //TX_DTD_THR1_MICMUTE_3 +915 0x0000 //TX_DTD_THR2_MICMUTE_0 +916 0x0000 //TX_MICMUTE_MIN_EQ_RE_EST_0 +917 0x0000 //TX_MICMUTE_MIN_EQ_RE_EST_1 +918 0x0000 //TX_MICMUTE_MIN_EQ_RE_EST_2 +919 0x0000 //TX_MICMUTE_MIN_EQ_RE_EST_3 +920 0x0000 //TX_MICMUTE_MIN_EQ_RE_EST_4 +921 0x0000 //TX_MICMUTE_C_POST_FLT +922 0x0000 //TX_MICMUTE_DT_CUT_K +923 0x0000 //TX_MICMUTE_DT_CUT_THR +924 0x0000 //TX_MICMUTE_DT_CUT_K2 +925 0x0000 //TX_MICMUTE_DT_CUT_THR2 +926 0x0000 //TX_MICMUTE_DT2_HOLD_N +927 0x0000 //TX_MICMUTE_RATIODTH_THCUT +928 0x0000 //TX_MICMUTE_B_POST_FLT_ECHOL +929 0x0000 //TX_MICMUTE_B_POST_FLT_ECHOH +930 0x0000 //TX_MICMUTE_C_POST_FLT_MASK +931 0x0000 //TX_MICMUTE_RATIODTL_CUT_TH +932 0x0000 //TX_MICMUTE_DT_CUT_K1 +933 0x0000 //TX_MICMUTE_N2_SN_EST +934 0x0000 //TX_MICMUTE_THR_SN_EST_0 +935 0x0000 //TX_MICMUTE_MIN_G_CTRL_0 +936 0x0000 //TX_MICMUTE_A_POST_FILT_S_0 +937 0x0000 //TX_MICMUTE_B_POST_FILT_0 +938 0x0000 //TX_MIC1RUB_AMP_THR +939 0x0000 //TX_MIC1MUTE_RATIO_THR +940 0x0000 //TX_MIC1MUTE_AMP_THR +941 0x0000 //TX_MIC1MUTE_CVG_TIME +942 0x0000 //TX_MIC1MUTE_RELEASE_TIME +943 0x0000 //TX_AMS_RESRV_01 +944 0x0000 //TX_AMS_RESRV_02 +945 0x0000 //TX_AMS_RESRV_03 +946 0x0000 //TX_AMS_RESRV_04 +947 0x0000 //TX_AMS_RESRV_05 +948 0x0000 //TX_AMS_RESRV_06 +949 0x0000 //TX_AMS_RESRV_07 +950 0x0000 //TX_AMS_RESRV_08 +951 0x0000 //TX_AMS_RESRV_09 +952 0x0000 //TX_AMS_RESRV_10 +953 0x0000 //TX_AMS_RESRV_11 +954 0x0000 //TX_AMS_RESRV_12 +955 0x0000 //TX_AMS_RESRV_13 +956 0x0000 //TX_AMS_RESRV_14 +957 0x0000 //TX_AMS_RESRV_15 +958 0x0000 //TX_AMS_RESRV_16 +959 0x0000 //TX_AMS_RESRV_17 +960 0x0000 //TX_AMS_RESRV_18 +961 0x0000 //TX_AMS_RESRV_19 #RX -0 0x006C //RX_RECVFUNC_MODE_0 +0 0x206C //RX_RECVFUNC_MODE_0 1 0x0000 //RX_RECVFUNC_MODE_1 2 0x0000 //RX_SAMPLINGFREQ_SIG 3 0x0000 //RX_SAMPLINGFREQ_PROC @@ -31556,10 +47211,862 @@ 110 0x0000 //RX_FDDRC_RESRV_0 129 0x0100 //RX_SPK_VOL 130 0x0000 //RX_VOL_RESRV_0 +#RX 2 +157 0x206C //RX_RECVFUNC_MODE_0 +158 0x0000 //RX_RECVFUNC_MODE_1 +159 0x0000 //RX_SAMPLINGFREQ_SIG +160 0x0000 //RX_SAMPLINGFREQ_PROC +161 0x000A //RX_FRAME_SZ +162 0x0000 //RX_DELAY_OPT +163 0x3000 //RX_TDDRC_ALPHA_UP_1 +164 0x3000 //RX_TDDRC_ALPHA_UP_2 +165 0x3000 //RX_TDDRC_ALPHA_UP_3 +166 0x3000 //RX_TDDRC_ALPHA_UP_4 +167 0x0800 //RX_PGA +168 0x7FFF //RX_A_HP +169 0x0000 //RX_B_PE +170 0x3800 //RX_THR_PITCH_DET_0 +171 0x3000 //RX_THR_PITCH_DET_1 +172 0x2800 //RX_THR_PITCH_DET_2 +173 0x0008 //RX_PITCH_BFR_LEN +174 0x0003 //RX_SBD_PITCH_DET +175 0x0100 //RX_PP_RESRV_0 +176 0x0020 //RX_PP_RESRV_1 +177 0x0600 //RX_N_SN_EST +178 0x000C //RX_N2_SN_EST +179 0x0010 //RX_NS_LVL_CTRL +180 0xF800 //RX_THR_SN_EST +181 0x7CCD //RX_LAMBDA_PFILT +182 0x000A //RX_FENS_RESRV_0 +183 0x0190 //RX_FENS_RESRV_1 +184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +187 0x0002 //RX_EXTRA_NS_L +188 0x0800 //RX_EXTRA_NS_A +189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +190 0x7FFF //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +192 0x199A //RX_A_POST_FLT +193 0x0000 //RX_LMT_THRD +194 0x4000 //RX_LMT_ALPHA +195 0x0014 //RX_FDEQ_SUBNUM +196 0x4848 //RX_FDEQ_GAIN_0 +197 0x4848 //RX_FDEQ_GAIN_1 +198 0x4848 //RX_FDEQ_GAIN_2 +199 0x4848 //RX_FDEQ_GAIN_3 +200 0x4848 //RX_FDEQ_GAIN_4 +201 0x4848 //RX_FDEQ_GAIN_5 +202 0x4444 //RX_FDEQ_GAIN_6 +203 0x4040 //RX_FDEQ_GAIN_7 +204 0x4040 //RX_FDEQ_GAIN_8 +205 0x4040 //RX_FDEQ_GAIN_9 +206 0x4848 //RX_FDEQ_GAIN_10 +207 0x4848 //RX_FDEQ_GAIN_11 +208 0x4848 //RX_FDEQ_GAIN_12 +209 0x4848 //RX_FDEQ_GAIN_13 +210 0x4848 //RX_FDEQ_GAIN_14 +211 0x4848 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0202 //RX_FDEQ_BIN_0 +221 0x0203 //RX_FDEQ_BIN_1 +222 0x0303 //RX_FDEQ_BIN_2 +223 0x0304 //RX_FDEQ_BIN_3 +224 0x0405 //RX_FDEQ_BIN_4 +225 0x0506 //RX_FDEQ_BIN_5 +226 0x0708 //RX_FDEQ_BIN_6 +227 0x090A //RX_FDEQ_BIN_7 +228 0x0B0C //RX_FDEQ_BIN_8 +229 0x0D0E //RX_FDEQ_BIN_9 +230 0x0000 //RX_FDEQ_BIN_10 +231 0x0000 //RX_FDEQ_BIN_11 +232 0x0000 //RX_FDEQ_BIN_12 +233 0x0000 //RX_FDEQ_BIN_13 +234 0x0000 //RX_FDEQ_BIN_14 +235 0x0000 //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x4000 //RX_FDEQ_RESRV_0 +245 0x0320 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0030 //RX_FDDRC_BAND_MARGIN_1 +248 0x0050 //RX_FDDRC_BAND_MARGIN_2 +249 0x0080 //RX_FDDRC_BAND_MARGIN_3 +250 0x0007 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x5000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x6400 //RX_FDDRC_THRD_3_2 +258 0x6400 //RX_FDDRC_THRD_3_3 +259 0x2000 //RX_FDDRC_SLANT_0_0 +260 0x2000 //RX_FDDRC_SLANT_0_1 +261 0x2000 //RX_FDDRC_SLANT_0_2 +262 0x2000 //RX_FDDRC_SLANT_0_3 +263 0x5333 //RX_FDDRC_SLANT_1_0 +264 0x5333 //RX_FDDRC_SLANT_1_1 +265 0x5333 //RX_FDDRC_SLANT_1_2 +266 0x5333 //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +268 0x0000 //RX_FILTINDX +269 0x0000 //RX_TDDRC_THRD_0 +270 0x0000 //RX_TDDRC_THRD_1 +271 0x7FFF //RX_TDDRC_THRD_2 +272 0x7FFF //RX_TDDRC_THRD_3 +273 0x7FFF //RX_TDDRC_SLANT_0 +274 0x7EB8 //RX_TDDRC_SLANT_1 +275 0x3000 //RX_TDDRC_ALPHA_UP_0 +276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x199A //RX_TDDRC_HMNC_GAIN +279 0x0001 //RX_TDDRC_SMT_FLAG +280 0x0CCD //RX_TDDRC_SMT_W +281 0x017F //RX_TDDRC_DRC_GAIN +282 0x7C00 //RX_LAMBDA_PKA_FP +283 0x2000 //RX_TPKA_FP +284 0x2000 //RX_MIN_G_FP +285 0x0080 //RX_MAX_G_FP +286 0x0100 //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 +288 0x0000 //RX_MAXLEVEL_CNG +289 0x3000 //RX_BWE_UV_TH +290 0x3000 //RX_BWE_UV_TH2 +291 0x1800 //RX_BWE_UV_TH3 +292 0x1000 //RX_BWE_V_TH +293 0x04CD //RX_BWE_GAIN1_V_TH1 +294 0x0F33 //RX_BWE_GAIN1_V_TH2 +295 0x7333 //RX_BWE_UV_EQ +296 0x199A //RX_BWE_V_EQ +297 0x7333 //RX_BWE_TONE_TH +298 0x0004 //RX_BWE_UV_HOLD_T +299 0x6CCD //RX_BWE_GAIN2_ALPHA +300 0x799A //RX_BWE_GAIN3_ALPHA +301 0x001E //RX_BWE_CUTOFF +302 0x3000 //RX_BWE_GAINFILL +303 0x3200 //RX_BWE_MAXTH_TONE +304 0x2000 //RX_BWE_EQ_0 +305 0x2000 //RX_BWE_EQ_1 +306 0x2000 //RX_BWE_EQ_2 +307 0x2000 //RX_BWE_EQ_3 +308 0x2000 //RX_BWE_EQ_4 +309 0x2000 //RX_BWE_EQ_5 +310 0x2000 //RX_BWE_EQ_6 +311 0x0000 //RX_BWE_RESRV_0 +312 0x0000 //RX_BWE_RESRV_1 +313 0x0000 //RX_BWE_RESRV_2 +#VOL 0 +163 0x3000 //RX_TDDRC_ALPHA_UP_1 +164 0x3000 //RX_TDDRC_ALPHA_UP_2 +165 0x3000 //RX_TDDRC_ALPHA_UP_3 +166 0x3000 //RX_TDDRC_ALPHA_UP_4 +184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +190 0x7FFF //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +269 0x0000 //RX_TDDRC_THRD_0 +270 0x0000 //RX_TDDRC_THRD_1 +271 0x7FFF //RX_TDDRC_THRD_2 +272 0x7FFF //RX_TDDRC_THRD_3 +273 0x7FFF //RX_TDDRC_SLANT_0 +274 0x7EB8 //RX_TDDRC_SLANT_1 +275 0x3000 //RX_TDDRC_ALPHA_UP_0 +276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x199A //RX_TDDRC_HMNC_GAIN +279 0x0001 //RX_TDDRC_SMT_FLAG +280 0x0CCD //RX_TDDRC_SMT_W +281 0x017F //RX_TDDRC_DRC_GAIN +195 0x0014 //RX_FDEQ_SUBNUM +196 0x4848 //RX_FDEQ_GAIN_0 +197 0x4848 //RX_FDEQ_GAIN_1 +198 0x4848 //RX_FDEQ_GAIN_2 +199 0x4848 //RX_FDEQ_GAIN_3 +200 0x4848 //RX_FDEQ_GAIN_4 +201 0x4848 //RX_FDEQ_GAIN_5 +202 0x4444 //RX_FDEQ_GAIN_6 +203 0x4040 //RX_FDEQ_GAIN_7 +204 0x4040 //RX_FDEQ_GAIN_8 +205 0x4040 //RX_FDEQ_GAIN_9 +206 0x4848 //RX_FDEQ_GAIN_10 +207 0x4848 //RX_FDEQ_GAIN_11 +208 0x4848 //RX_FDEQ_GAIN_12 +209 0x4848 //RX_FDEQ_GAIN_13 +210 0x4848 //RX_FDEQ_GAIN_14 +211 0x4848 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0202 //RX_FDEQ_BIN_0 +221 0x0203 //RX_FDEQ_BIN_1 +222 0x0303 //RX_FDEQ_BIN_2 +223 0x0304 //RX_FDEQ_BIN_3 +224 0x0405 //RX_FDEQ_BIN_4 +225 0x0506 //RX_FDEQ_BIN_5 +226 0x0708 //RX_FDEQ_BIN_6 +227 0x090A //RX_FDEQ_BIN_7 +228 0x0B0C //RX_FDEQ_BIN_8 +229 0x0D0E //RX_FDEQ_BIN_9 +230 0x0000 //RX_FDEQ_BIN_10 +231 0x0000 //RX_FDEQ_BIN_11 +232 0x0000 //RX_FDEQ_BIN_12 +233 0x0000 //RX_FDEQ_BIN_13 +234 0x0000 //RX_FDEQ_BIN_14 +235 0x0000 //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x4000 //RX_FDEQ_RESRV_0 +245 0x0320 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0030 //RX_FDDRC_BAND_MARGIN_1 +248 0x0050 //RX_FDDRC_BAND_MARGIN_2 +249 0x0080 //RX_FDDRC_BAND_MARGIN_3 +250 0x0007 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x5000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x6400 //RX_FDDRC_THRD_3_2 +258 0x6400 //RX_FDDRC_THRD_3_3 +259 0x2000 //RX_FDDRC_SLANT_0_0 +260 0x2000 //RX_FDDRC_SLANT_0_1 +261 0x2000 //RX_FDDRC_SLANT_0_2 +262 0x2000 //RX_FDDRC_SLANT_0_3 +263 0x5333 //RX_FDDRC_SLANT_1_0 +264 0x5333 //RX_FDDRC_SLANT_1_1 +265 0x5333 //RX_FDDRC_SLANT_1_2 +266 0x5333 //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +286 0x0100 //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 +#VOL 1 +163 0x3000 //RX_TDDRC_ALPHA_UP_1 +164 0x3000 //RX_TDDRC_ALPHA_UP_2 +165 0x3000 //RX_TDDRC_ALPHA_UP_3 +166 0x3000 //RX_TDDRC_ALPHA_UP_4 +184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +190 0x7FFF //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +269 0x0000 //RX_TDDRC_THRD_0 +270 0x0000 //RX_TDDRC_THRD_1 +271 0x7FFF //RX_TDDRC_THRD_2 +272 0x7FFF //RX_TDDRC_THRD_3 +273 0x7FFF //RX_TDDRC_SLANT_0 +274 0x7EB8 //RX_TDDRC_SLANT_1 +275 0x3000 //RX_TDDRC_ALPHA_UP_0 +276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x199A //RX_TDDRC_HMNC_GAIN +279 0x0001 //RX_TDDRC_SMT_FLAG +280 0x0CCD //RX_TDDRC_SMT_W +281 0x017F //RX_TDDRC_DRC_GAIN +195 0x0014 //RX_FDEQ_SUBNUM +196 0x4848 //RX_FDEQ_GAIN_0 +197 0x4848 //RX_FDEQ_GAIN_1 +198 0x4848 //RX_FDEQ_GAIN_2 +199 0x4848 //RX_FDEQ_GAIN_3 +200 0x4848 //RX_FDEQ_GAIN_4 +201 0x4848 //RX_FDEQ_GAIN_5 +202 0x4444 //RX_FDEQ_GAIN_6 +203 0x4040 //RX_FDEQ_GAIN_7 +204 0x4040 //RX_FDEQ_GAIN_8 +205 0x4040 //RX_FDEQ_GAIN_9 +206 0x4848 //RX_FDEQ_GAIN_10 +207 0x4848 //RX_FDEQ_GAIN_11 +208 0x4848 //RX_FDEQ_GAIN_12 +209 0x4848 //RX_FDEQ_GAIN_13 +210 0x4848 //RX_FDEQ_GAIN_14 +211 0x4848 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0202 //RX_FDEQ_BIN_0 +221 0x0203 //RX_FDEQ_BIN_1 +222 0x0303 //RX_FDEQ_BIN_2 +223 0x0304 //RX_FDEQ_BIN_3 +224 0x0405 //RX_FDEQ_BIN_4 +225 0x0506 //RX_FDEQ_BIN_5 +226 0x0708 //RX_FDEQ_BIN_6 +227 0x090A //RX_FDEQ_BIN_7 +228 0x0B0C //RX_FDEQ_BIN_8 +229 0x0D0E //RX_FDEQ_BIN_9 +230 0x0000 //RX_FDEQ_BIN_10 +231 0x0000 //RX_FDEQ_BIN_11 +232 0x0000 //RX_FDEQ_BIN_12 +233 0x0000 //RX_FDEQ_BIN_13 +234 0x0000 //RX_FDEQ_BIN_14 +235 0x0000 //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x4000 //RX_FDEQ_RESRV_0 +245 0x0320 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0030 //RX_FDDRC_BAND_MARGIN_1 +248 0x0050 //RX_FDDRC_BAND_MARGIN_2 +249 0x0080 //RX_FDDRC_BAND_MARGIN_3 +250 0x0007 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x5000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x6400 //RX_FDDRC_THRD_3_2 +258 0x6400 //RX_FDDRC_THRD_3_3 +259 0x2000 //RX_FDDRC_SLANT_0_0 +260 0x2000 //RX_FDDRC_SLANT_0_1 +261 0x2000 //RX_FDDRC_SLANT_0_2 +262 0x2000 //RX_FDDRC_SLANT_0_3 +263 0x5333 //RX_FDDRC_SLANT_1_0 +264 0x5333 //RX_FDDRC_SLANT_1_1 +265 0x5333 //RX_FDDRC_SLANT_1_2 +266 0x5333 //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +286 0x0100 //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 +#VOL 2 +163 0x3000 //RX_TDDRC_ALPHA_UP_1 +164 0x3000 //RX_TDDRC_ALPHA_UP_2 +165 0x3000 //RX_TDDRC_ALPHA_UP_3 +166 0x3000 //RX_TDDRC_ALPHA_UP_4 +184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +190 0x7FFF //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +269 0x0000 //RX_TDDRC_THRD_0 +270 0x0000 //RX_TDDRC_THRD_1 +271 0x7FFF //RX_TDDRC_THRD_2 +272 0x7FFF //RX_TDDRC_THRD_3 +273 0x7FFF //RX_TDDRC_SLANT_0 +274 0x7EB8 //RX_TDDRC_SLANT_1 +275 0x3000 //RX_TDDRC_ALPHA_UP_0 +276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x199A //RX_TDDRC_HMNC_GAIN +279 0x0001 //RX_TDDRC_SMT_FLAG +280 0x0CCD //RX_TDDRC_SMT_W +281 0x017F //RX_TDDRC_DRC_GAIN +195 0x0014 //RX_FDEQ_SUBNUM +196 0x4848 //RX_FDEQ_GAIN_0 +197 0x4848 //RX_FDEQ_GAIN_1 +198 0x4848 //RX_FDEQ_GAIN_2 +199 0x4848 //RX_FDEQ_GAIN_3 +200 0x4848 //RX_FDEQ_GAIN_4 +201 0x4848 //RX_FDEQ_GAIN_5 +202 0x4444 //RX_FDEQ_GAIN_6 +203 0x4040 //RX_FDEQ_GAIN_7 +204 0x4040 //RX_FDEQ_GAIN_8 +205 0x4040 //RX_FDEQ_GAIN_9 +206 0x4848 //RX_FDEQ_GAIN_10 +207 0x4848 //RX_FDEQ_GAIN_11 +208 0x4848 //RX_FDEQ_GAIN_12 +209 0x4848 //RX_FDEQ_GAIN_13 +210 0x4848 //RX_FDEQ_GAIN_14 +211 0x4848 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0202 //RX_FDEQ_BIN_0 +221 0x0203 //RX_FDEQ_BIN_1 +222 0x0303 //RX_FDEQ_BIN_2 +223 0x0304 //RX_FDEQ_BIN_3 +224 0x0405 //RX_FDEQ_BIN_4 +225 0x0506 //RX_FDEQ_BIN_5 +226 0x0708 //RX_FDEQ_BIN_6 +227 0x090A //RX_FDEQ_BIN_7 +228 0x0B0C //RX_FDEQ_BIN_8 +229 0x0D0E //RX_FDEQ_BIN_9 +230 0x0000 //RX_FDEQ_BIN_10 +231 0x0000 //RX_FDEQ_BIN_11 +232 0x0000 //RX_FDEQ_BIN_12 +233 0x0000 //RX_FDEQ_BIN_13 +234 0x0000 //RX_FDEQ_BIN_14 +235 0x0000 //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x4000 //RX_FDEQ_RESRV_0 +245 0x0320 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0030 //RX_FDDRC_BAND_MARGIN_1 +248 0x0050 //RX_FDDRC_BAND_MARGIN_2 +249 0x0080 //RX_FDDRC_BAND_MARGIN_3 +250 0x0007 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x5000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x6400 //RX_FDDRC_THRD_3_2 +258 0x6400 //RX_FDDRC_THRD_3_3 +259 0x2000 //RX_FDDRC_SLANT_0_0 +260 0x2000 //RX_FDDRC_SLANT_0_1 +261 0x2000 //RX_FDDRC_SLANT_0_2 +262 0x2000 //RX_FDDRC_SLANT_0_3 +263 0x5333 //RX_FDDRC_SLANT_1_0 +264 0x5333 //RX_FDDRC_SLANT_1_1 +265 0x5333 //RX_FDDRC_SLANT_1_2 +266 0x5333 //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +286 0x0100 //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 +#VOL 3 +163 0x3000 //RX_TDDRC_ALPHA_UP_1 +164 0x3000 //RX_TDDRC_ALPHA_UP_2 +165 0x3000 //RX_TDDRC_ALPHA_UP_3 +166 0x3000 //RX_TDDRC_ALPHA_UP_4 +184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +190 0x7FFF //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +269 0x0000 //RX_TDDRC_THRD_0 +270 0x0000 //RX_TDDRC_THRD_1 +271 0x7FFF //RX_TDDRC_THRD_2 +272 0x7FFF //RX_TDDRC_THRD_3 +273 0x7FFF //RX_TDDRC_SLANT_0 +274 0x7EB8 //RX_TDDRC_SLANT_1 +275 0x3000 //RX_TDDRC_ALPHA_UP_0 +276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x199A //RX_TDDRC_HMNC_GAIN +279 0x0001 //RX_TDDRC_SMT_FLAG +280 0x0CCD //RX_TDDRC_SMT_W +281 0x017F //RX_TDDRC_DRC_GAIN +195 0x0014 //RX_FDEQ_SUBNUM +196 0x4848 //RX_FDEQ_GAIN_0 +197 0x4848 //RX_FDEQ_GAIN_1 +198 0x4848 //RX_FDEQ_GAIN_2 +199 0x4848 //RX_FDEQ_GAIN_3 +200 0x4848 //RX_FDEQ_GAIN_4 +201 0x4848 //RX_FDEQ_GAIN_5 +202 0x4444 //RX_FDEQ_GAIN_6 +203 0x4040 //RX_FDEQ_GAIN_7 +204 0x4040 //RX_FDEQ_GAIN_8 +205 0x4040 //RX_FDEQ_GAIN_9 +206 0x4848 //RX_FDEQ_GAIN_10 +207 0x4848 //RX_FDEQ_GAIN_11 +208 0x4848 //RX_FDEQ_GAIN_12 +209 0x4848 //RX_FDEQ_GAIN_13 +210 0x4848 //RX_FDEQ_GAIN_14 +211 0x4848 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0202 //RX_FDEQ_BIN_0 +221 0x0203 //RX_FDEQ_BIN_1 +222 0x0303 //RX_FDEQ_BIN_2 +223 0x0304 //RX_FDEQ_BIN_3 +224 0x0405 //RX_FDEQ_BIN_4 +225 0x0506 //RX_FDEQ_BIN_5 +226 0x0708 //RX_FDEQ_BIN_6 +227 0x090A //RX_FDEQ_BIN_7 +228 0x0B0C //RX_FDEQ_BIN_8 +229 0x0D0E //RX_FDEQ_BIN_9 +230 0x0000 //RX_FDEQ_BIN_10 +231 0x0000 //RX_FDEQ_BIN_11 +232 0x0000 //RX_FDEQ_BIN_12 +233 0x0000 //RX_FDEQ_BIN_13 +234 0x0000 //RX_FDEQ_BIN_14 +235 0x0000 //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x4000 //RX_FDEQ_RESRV_0 +245 0x0320 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0030 //RX_FDDRC_BAND_MARGIN_1 +248 0x0050 //RX_FDDRC_BAND_MARGIN_2 +249 0x0080 //RX_FDDRC_BAND_MARGIN_3 +250 0x0007 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x5000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x6400 //RX_FDDRC_THRD_3_2 +258 0x6400 //RX_FDDRC_THRD_3_3 +259 0x2000 //RX_FDDRC_SLANT_0_0 +260 0x2000 //RX_FDDRC_SLANT_0_1 +261 0x2000 //RX_FDDRC_SLANT_0_2 +262 0x2000 //RX_FDDRC_SLANT_0_3 +263 0x5333 //RX_FDDRC_SLANT_1_0 +264 0x5333 //RX_FDDRC_SLANT_1_1 +265 0x5333 //RX_FDDRC_SLANT_1_2 +266 0x5333 //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +286 0x0100 //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 +#VOL 4 +163 0x3000 //RX_TDDRC_ALPHA_UP_1 +164 0x3000 //RX_TDDRC_ALPHA_UP_2 +165 0x3000 //RX_TDDRC_ALPHA_UP_3 +166 0x3000 //RX_TDDRC_ALPHA_UP_4 +184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +190 0x7FFF //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +269 0x0000 //RX_TDDRC_THRD_0 +270 0x0000 //RX_TDDRC_THRD_1 +271 0x7FFF //RX_TDDRC_THRD_2 +272 0x7FFF //RX_TDDRC_THRD_3 +273 0x7FFF //RX_TDDRC_SLANT_0 +274 0x7EB8 //RX_TDDRC_SLANT_1 +275 0x3000 //RX_TDDRC_ALPHA_UP_0 +276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x199A //RX_TDDRC_HMNC_GAIN +279 0x0001 //RX_TDDRC_SMT_FLAG +280 0x0CCD //RX_TDDRC_SMT_W +281 0x017F //RX_TDDRC_DRC_GAIN +195 0x0014 //RX_FDEQ_SUBNUM +196 0x4848 //RX_FDEQ_GAIN_0 +197 0x4848 //RX_FDEQ_GAIN_1 +198 0x4848 //RX_FDEQ_GAIN_2 +199 0x4848 //RX_FDEQ_GAIN_3 +200 0x4848 //RX_FDEQ_GAIN_4 +201 0x4848 //RX_FDEQ_GAIN_5 +202 0x4444 //RX_FDEQ_GAIN_6 +203 0x4040 //RX_FDEQ_GAIN_7 +204 0x4040 //RX_FDEQ_GAIN_8 +205 0x4040 //RX_FDEQ_GAIN_9 +206 0x4848 //RX_FDEQ_GAIN_10 +207 0x4848 //RX_FDEQ_GAIN_11 +208 0x4848 //RX_FDEQ_GAIN_12 +209 0x4848 //RX_FDEQ_GAIN_13 +210 0x4848 //RX_FDEQ_GAIN_14 +211 0x4848 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0202 //RX_FDEQ_BIN_0 +221 0x0203 //RX_FDEQ_BIN_1 +222 0x0303 //RX_FDEQ_BIN_2 +223 0x0304 //RX_FDEQ_BIN_3 +224 0x0405 //RX_FDEQ_BIN_4 +225 0x0506 //RX_FDEQ_BIN_5 +226 0x0708 //RX_FDEQ_BIN_6 +227 0x090A //RX_FDEQ_BIN_7 +228 0x0B0C //RX_FDEQ_BIN_8 +229 0x0D0E //RX_FDEQ_BIN_9 +230 0x0000 //RX_FDEQ_BIN_10 +231 0x0000 //RX_FDEQ_BIN_11 +232 0x0000 //RX_FDEQ_BIN_12 +233 0x0000 //RX_FDEQ_BIN_13 +234 0x0000 //RX_FDEQ_BIN_14 +235 0x0000 //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x4000 //RX_FDEQ_RESRV_0 +245 0x0320 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0030 //RX_FDDRC_BAND_MARGIN_1 +248 0x0050 //RX_FDDRC_BAND_MARGIN_2 +249 0x0080 //RX_FDDRC_BAND_MARGIN_3 +250 0x0007 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x5000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x6400 //RX_FDDRC_THRD_3_2 +258 0x6400 //RX_FDDRC_THRD_3_3 +259 0x2000 //RX_FDDRC_SLANT_0_0 +260 0x2000 //RX_FDDRC_SLANT_0_1 +261 0x2000 //RX_FDDRC_SLANT_0_2 +262 0x2000 //RX_FDDRC_SLANT_0_3 +263 0x5333 //RX_FDDRC_SLANT_1_0 +264 0x5333 //RX_FDDRC_SLANT_1_1 +265 0x5333 //RX_FDDRC_SLANT_1_2 +266 0x5333 //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +286 0x0100 //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 +#VOL 5 +163 0x3000 //RX_TDDRC_ALPHA_UP_1 +164 0x3000 //RX_TDDRC_ALPHA_UP_2 +165 0x3000 //RX_TDDRC_ALPHA_UP_3 +166 0x3000 //RX_TDDRC_ALPHA_UP_4 +184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +190 0x7FFF //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +269 0x0000 //RX_TDDRC_THRD_0 +270 0x0000 //RX_TDDRC_THRD_1 +271 0x7FFF //RX_TDDRC_THRD_2 +272 0x7FFF //RX_TDDRC_THRD_3 +273 0x7FFF //RX_TDDRC_SLANT_0 +274 0x7EB8 //RX_TDDRC_SLANT_1 +275 0x3000 //RX_TDDRC_ALPHA_UP_0 +276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x199A //RX_TDDRC_HMNC_GAIN +279 0x0001 //RX_TDDRC_SMT_FLAG +280 0x0CCD //RX_TDDRC_SMT_W +281 0x017F //RX_TDDRC_DRC_GAIN +195 0x0014 //RX_FDEQ_SUBNUM +196 0x4848 //RX_FDEQ_GAIN_0 +197 0x4848 //RX_FDEQ_GAIN_1 +198 0x4848 //RX_FDEQ_GAIN_2 +199 0x4848 //RX_FDEQ_GAIN_3 +200 0x4848 //RX_FDEQ_GAIN_4 +201 0x4848 //RX_FDEQ_GAIN_5 +202 0x4444 //RX_FDEQ_GAIN_6 +203 0x4040 //RX_FDEQ_GAIN_7 +204 0x4040 //RX_FDEQ_GAIN_8 +205 0x4040 //RX_FDEQ_GAIN_9 +206 0x4848 //RX_FDEQ_GAIN_10 +207 0x4848 //RX_FDEQ_GAIN_11 +208 0x4848 //RX_FDEQ_GAIN_12 +209 0x4848 //RX_FDEQ_GAIN_13 +210 0x4848 //RX_FDEQ_GAIN_14 +211 0x4848 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0202 //RX_FDEQ_BIN_0 +221 0x0203 //RX_FDEQ_BIN_1 +222 0x0303 //RX_FDEQ_BIN_2 +223 0x0304 //RX_FDEQ_BIN_3 +224 0x0405 //RX_FDEQ_BIN_4 +225 0x0506 //RX_FDEQ_BIN_5 +226 0x0708 //RX_FDEQ_BIN_6 +227 0x090A //RX_FDEQ_BIN_7 +228 0x0B0C //RX_FDEQ_BIN_8 +229 0x0D0E //RX_FDEQ_BIN_9 +230 0x0000 //RX_FDEQ_BIN_10 +231 0x0000 //RX_FDEQ_BIN_11 +232 0x0000 //RX_FDEQ_BIN_12 +233 0x0000 //RX_FDEQ_BIN_13 +234 0x0000 //RX_FDEQ_BIN_14 +235 0x0000 //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x4000 //RX_FDEQ_RESRV_0 +245 0x0320 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0030 //RX_FDDRC_BAND_MARGIN_1 +248 0x0050 //RX_FDDRC_BAND_MARGIN_2 +249 0x0080 //RX_FDDRC_BAND_MARGIN_3 +250 0x0007 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x5000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x6400 //RX_FDDRC_THRD_3_2 +258 0x6400 //RX_FDDRC_THRD_3_3 +259 0x2000 //RX_FDDRC_SLANT_0_0 +260 0x2000 //RX_FDDRC_SLANT_0_1 +261 0x2000 //RX_FDDRC_SLANT_0_2 +262 0x2000 //RX_FDDRC_SLANT_0_3 +263 0x5333 //RX_FDDRC_SLANT_1_0 +264 0x5333 //RX_FDDRC_SLANT_1_1 +265 0x5333 //RX_FDDRC_SLANT_1_2 +266 0x5333 //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +286 0x0100 //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 +#VOL 6 +163 0x3000 //RX_TDDRC_ALPHA_UP_1 +164 0x3000 //RX_TDDRC_ALPHA_UP_2 +165 0x3000 //RX_TDDRC_ALPHA_UP_3 +166 0x3000 //RX_TDDRC_ALPHA_UP_4 +184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +190 0x7FFF //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +269 0x0000 //RX_TDDRC_THRD_0 +270 0x0000 //RX_TDDRC_THRD_1 +271 0x7FFF //RX_TDDRC_THRD_2 +272 0x7FFF //RX_TDDRC_THRD_3 +273 0x7FFF //RX_TDDRC_SLANT_0 +274 0x7EB8 //RX_TDDRC_SLANT_1 +275 0x3000 //RX_TDDRC_ALPHA_UP_0 +276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x199A //RX_TDDRC_HMNC_GAIN +279 0x0001 //RX_TDDRC_SMT_FLAG +280 0x0CCD //RX_TDDRC_SMT_W +281 0x017F //RX_TDDRC_DRC_GAIN +195 0x0014 //RX_FDEQ_SUBNUM +196 0x4848 //RX_FDEQ_GAIN_0 +197 0x4848 //RX_FDEQ_GAIN_1 +198 0x4848 //RX_FDEQ_GAIN_2 +199 0x4848 //RX_FDEQ_GAIN_3 +200 0x4848 //RX_FDEQ_GAIN_4 +201 0x4848 //RX_FDEQ_GAIN_5 +202 0x4444 //RX_FDEQ_GAIN_6 +203 0x4040 //RX_FDEQ_GAIN_7 +204 0x4040 //RX_FDEQ_GAIN_8 +205 0x4040 //RX_FDEQ_GAIN_9 +206 0x4848 //RX_FDEQ_GAIN_10 +207 0x4848 //RX_FDEQ_GAIN_11 +208 0x4848 //RX_FDEQ_GAIN_12 +209 0x4848 //RX_FDEQ_GAIN_13 +210 0x4848 //RX_FDEQ_GAIN_14 +211 0x4848 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0202 //RX_FDEQ_BIN_0 +221 0x0203 //RX_FDEQ_BIN_1 +222 0x0303 //RX_FDEQ_BIN_2 +223 0x0304 //RX_FDEQ_BIN_3 +224 0x0405 //RX_FDEQ_BIN_4 +225 0x0506 //RX_FDEQ_BIN_5 +226 0x0708 //RX_FDEQ_BIN_6 +227 0x090A //RX_FDEQ_BIN_7 +228 0x0B0C //RX_FDEQ_BIN_8 +229 0x0D0E //RX_FDEQ_BIN_9 +230 0x0000 //RX_FDEQ_BIN_10 +231 0x0000 //RX_FDEQ_BIN_11 +232 0x0000 //RX_FDEQ_BIN_12 +233 0x0000 //RX_FDEQ_BIN_13 +234 0x0000 //RX_FDEQ_BIN_14 +235 0x0000 //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x4000 //RX_FDEQ_RESRV_0 +245 0x0320 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0030 //RX_FDDRC_BAND_MARGIN_1 +248 0x0050 //RX_FDDRC_BAND_MARGIN_2 +249 0x0080 //RX_FDDRC_BAND_MARGIN_3 +250 0x0007 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x5000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x6400 //RX_FDDRC_THRD_3_2 +258 0x6400 //RX_FDDRC_THRD_3_3 +259 0x2000 //RX_FDDRC_SLANT_0_0 +260 0x2000 //RX_FDDRC_SLANT_0_1 +261 0x2000 //RX_FDDRC_SLANT_0_2 +262 0x2000 //RX_FDDRC_SLANT_0_3 +263 0x5333 //RX_FDDRC_SLANT_1_0 +264 0x5333 //RX_FDDRC_SLANT_1_1 +265 0x5333 //RX_FDDRC_SLANT_1_2 +266 0x5333 //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +286 0x0100 //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 #CASE_NAME BLUETOOTH-BTWB_NREC-VOICE_GENERIC-WB -#PARAM_TYPE TX+RX -#TOTAL_CUSTOM_STEP 7 +#PARAM_MODE Full +#PARAM_TYPE TX+2RX +#TOTAL_CUSTOM_STEP 7+7 #TX 0 0x0008 //TX_OPERATION_MODE_0 1 0x0008 //TX_OPERATION_MODE_1 @@ -31812,20 +48319,20 @@ 248 0xF400 //TX_THR_SN_EST_6 249 0xF600 //TX_THR_SN_EST_7 250 0x0000 //TX_DELTA_THR_SN_EST_0 -251 0x0000 //TX_DELTA_THR_SN_EST_1 +251 0x0200 //TX_DELTA_THR_SN_EST_1 252 0x0200 //TX_DELTA_THR_SN_EST_2 253 0x0200 //TX_DELTA_THR_SN_EST_3 254 0x0200 //TX_DELTA_THR_SN_EST_4 255 0x0200 //TX_DELTA_THR_SN_EST_5 -256 0x0200 //TX_DELTA_THR_SN_EST_6 +256 0x0000 //TX_DELTA_THR_SN_EST_6 257 0x0200 //TX_DELTA_THR_SN_EST_7 258 0x6000 //TX_LAMBDA_NN_EST_0 -259 0x6000 //TX_LAMBDA_NN_EST_1 +259 0x4000 //TX_LAMBDA_NN_EST_1 260 0x4000 //TX_LAMBDA_NN_EST_2 261 0x4000 //TX_LAMBDA_NN_EST_3 262 0x4000 //TX_LAMBDA_NN_EST_4 263 0x4000 //TX_LAMBDA_NN_EST_5 -264 0x4000 //TX_LAMBDA_NN_EST_6 +264 0x6000 //TX_LAMBDA_NN_EST_6 265 0x4000 //TX_LAMBDA_NN_EST_7 266 0x0400 //TX_N_SN_EST 267 0x001E //TX_INBEAM_T @@ -31843,16 +48350,16 @@ 279 0x1000 //TX_B_POST_FLT_0 280 0x1000 //TX_B_POST_FLT_1 281 0x000F //TX_NS_LVL_CTRL_0 -282 0x000F //TX_NS_LVL_CTRL_1 -283 0x0011 //TX_NS_LVL_CTRL_2 +282 0x0011 //TX_NS_LVL_CTRL_1 +283 0x000F //TX_NS_LVL_CTRL_2 284 0x000F //TX_NS_LVL_CTRL_3 285 0x000F //TX_NS_LVL_CTRL_4 286 0x000F //TX_NS_LVL_CTRL_5 287 0x000F //TX_NS_LVL_CTRL_6 288 0x0011 //TX_NS_LVL_CTRL_7 289 0x000C //TX_MIN_GAIN_S_0 -290 0x000C //TX_MIN_GAIN_S_1 -291 0x000F //TX_MIN_GAIN_S_2 +290 0x000F //TX_MIN_GAIN_S_1 +291 0x000C //TX_MIN_GAIN_S_2 292 0x000C //TX_MIN_GAIN_S_3 293 0x000C //TX_MIN_GAIN_S_4 294 0x000C //TX_MIN_GAIN_S_5 @@ -31876,12 +48383,12 @@ 312 0x7FFF //TX_A_POST_FILT_0 313 0x2000 //TX_A_POST_FILT_1 314 0x4000 //TX_A_POST_FILT_S_0 -315 0x4000 //TX_A_POST_FILT_S_1 +315 0x5000 //TX_A_POST_FILT_S_1 316 0x5000 //TX_A_POST_FILT_S_2 317 0x5000 //TX_A_POST_FILT_S_3 318 0x5000 //TX_A_POST_FILT_S_4 319 0x5000 //TX_A_POST_FILT_S_5 -320 0x5000 //TX_A_POST_FILT_S_6 +320 0x4000 //TX_A_POST_FILT_S_6 321 0x5000 //TX_A_POST_FILT_S_7 322 0x1000 //TX_B_POST_FILT_0 323 0x1000 //TX_B_POST_FILT_1 @@ -31941,10 +48448,10 @@ 377 0x7FFF //TX_NOISE_TH_5_4 378 0x044C //TX_NOISE_TH_6 379 0x0014 //TX_MINENOISE_TH -380 0x4000 //TX_MINENOISE_MIC0_TH_MTS -381 0xFFEE //TX_MINENOISE_MIC0_TH_EXP -382 0x6000 //TX_MINENOISE_MIC0_S_TH_MTS -383 0xFFF3 //TX_MINENOISE_MIC0_S_TH_EXP +380 0x4000 //TX_MORENS_TFMASK_TH +381 0xFFEE //TX_DRC_QUIET_FLOOR +382 0x6000 //TX_RATIODTL_CUT_TH +383 0xFFF3 //TX_DT_CUT_K1 384 0x0666 //TX_OUT_ENER_S_TH_CLEAN 385 0x0666 //TX_OUT_ENER_S_TH_LESSCLEAN 386 0x0333 //TX_OUT_ENER_S_TH_NOISY @@ -31952,15 +48459,15 @@ 388 0x0333 //TX_OUT_ENER_TH_SPEECH 389 0x2000 //TX_SN_NPB_GAIN 390 0x0000 //TX_NN_NPB_GAIN -391 0x0000 //TX_CSX_ALPHA_0 -392 0x0000 //TX_CSX_ALPHA_1 -393 0x0000 //TX_CSX_ALPHA_2 -394 0x0000 //TX_CSX_ALPHA_3 -395 0x0800 //TX_MU_ARSP_EST -396 0x00C8 //TX_P_OUTBEAM_MIN_TH +391 0x0000 //TX_POST_MASK_SUP_HSNE +392 0x0000 //TX_TAIL_DET_TH +393 0x0000 //TX_B_LESSCUT_RTO_WTA +394 0x0000 //TX_MEL_G_R +395 0x0800 //TX_SUPHIGH_TH +396 0x00C8 //TX_MASK_G_R 397 0x0002 //TX_EXTRA_NS_L -398 0x0800 //TX_EXTRA_NS_A -399 0x0005 //TX_VR_NOISE_FLOOR_TH +398 0x0800 //TX_C_POST_FLT_MASK +399 0x0005 //TX_A_POST_FLT_WNS 400 0x0148 //TX_MIN_G_LOW300HZ 401 0x0002 //TX_MAXLEVEL_CNG 402 0x00B4 //TX_STN_NOISE_TH @@ -32075,16 +48582,16 @@ 511 0x6666 //TX_MIC_TO_BFGAIN 512 0x0000 //TX_MICTOBFGAIN0 513 0x0000 //TX_FASTMUE_TH -514 0x0000 //TX_DERVB_LEN_0 -515 0x0000 //TX_DERVB_LEN_1 -516 0x0000 //TX_RHO_DERVB -517 0x0000 //TX_MIC_INDX_DERVB -518 0x0000 //TX_MU_DERVB -519 0x0000 //TX_DR_RESRV_0 -520 0x0000 //TX_DR_RESRV_1 -521 0x0000 //TX_DR_RESRV_2 -522 0x0000 //TX_DR_RESRV_3 -523 0x0000 //TX_DR_RESRV_4 +514 0x0000 //TX_DEREVERB_LF_MU +515 0x0000 //TX_DEREVERB_HF_MU +516 0x0000 //TX_DEREVERB_DELAY +517 0x0000 //TX_DEREVERB_COEF_LEN +518 0x0000 //TX_DEREVERB_DNR +519 0x0000 //TX_DEREVERB_ALPHA +520 0x0000 //TX_DEREVERB_BETA +521 0x0000 //TX_GSC_RTOL_TH +522 0x0000 //TX_GSC_RTOH_TH +523 0x0000 //TX_WIDE2_MEANHTH 524 0x0000 //TX_DR_RESRV_5 525 0x0000 //TX_DR_RESRV_6 526 0x0000 //TX_DR_RESRV_7 @@ -32458,8 +48965,73 @@ 894 0xC000 //TX_FASTNS_SSA_THHFL 895 0xCCCC //TX_FASTNS_SSA_THLFH 896 0xD999 //TX_FASTNS_SSA_THHFH +897 0x0000 //TX_SENDFUNC_REG_MICMUTE +898 0x0000 //TX_SENDFUNC_REG_MICMUTE1 +899 0x0000 //TX_MICMUTE_RATIO_THR +900 0x0000 //TX_MICMUTE_AMP_THR +901 0x0000 //TX_MICMUTE_HPF_IND +902 0x0000 //TX_MICMUTE_LOG_EYR_TH +903 0x0000 //TX_MICMUTE_CVG_TIME +904 0x0000 //TX_MICMUTE_RELEASE_TIME +905 0x0000 //TX_MIC_VOLUME_MIC0MUTE +906 0x0000 //TX_MICMUTE_EPD_OFFSET_0 +907 0x0000 //TX_MICMUTE_FRQ_AEC_L +908 0x0000 //TX_MICMUTE_EAD_THR +909 0x0000 //TX_MICMUTE_LAMBDA_CB_NLE +910 0x0000 //TX_MICMUTE_LAMBDA_RE_EST +911 0x0000 //TX_DTD_THR1_MICMUTE_0 +912 0x0000 //TX_DTD_THR1_MICMUTE_1 +913 0x0000 //TX_DTD_THR1_MICMUTE_2 +914 0x0000 //TX_DTD_THR1_MICMUTE_3 +915 0x0000 //TX_DTD_THR2_MICMUTE_0 +916 0x0000 //TX_MICMUTE_MIN_EQ_RE_EST_0 +917 0x0000 //TX_MICMUTE_MIN_EQ_RE_EST_1 +918 0x0000 //TX_MICMUTE_MIN_EQ_RE_EST_2 +919 0x0000 //TX_MICMUTE_MIN_EQ_RE_EST_3 +920 0x0000 //TX_MICMUTE_MIN_EQ_RE_EST_4 +921 0x0000 //TX_MICMUTE_C_POST_FLT +922 0x0000 //TX_MICMUTE_DT_CUT_K +923 0x0000 //TX_MICMUTE_DT_CUT_THR +924 0x0000 //TX_MICMUTE_DT_CUT_K2 +925 0x0000 //TX_MICMUTE_DT_CUT_THR2 +926 0x0000 //TX_MICMUTE_DT2_HOLD_N +927 0x0000 //TX_MICMUTE_RATIODTH_THCUT +928 0x0000 //TX_MICMUTE_B_POST_FLT_ECHOL +929 0x0000 //TX_MICMUTE_B_POST_FLT_ECHOH +930 0x0000 //TX_MICMUTE_C_POST_FLT_MASK +931 0x0000 //TX_MICMUTE_RATIODTL_CUT_TH +932 0x0000 //TX_MICMUTE_DT_CUT_K1 +933 0x0000 //TX_MICMUTE_N2_SN_EST +934 0x0000 //TX_MICMUTE_THR_SN_EST_0 +935 0x0000 //TX_MICMUTE_MIN_G_CTRL_0 +936 0x0000 //TX_MICMUTE_A_POST_FILT_S_0 +937 0x0000 //TX_MICMUTE_B_POST_FILT_0 +938 0x0000 //TX_MIC1RUB_AMP_THR +939 0x0000 //TX_MIC1MUTE_RATIO_THR +940 0x0000 //TX_MIC1MUTE_AMP_THR +941 0x0000 //TX_MIC1MUTE_CVG_TIME +942 0x0000 //TX_MIC1MUTE_RELEASE_TIME +943 0x0000 //TX_AMS_RESRV_01 +944 0x0000 //TX_AMS_RESRV_02 +945 0x0000 //TX_AMS_RESRV_03 +946 0x0000 //TX_AMS_RESRV_04 +947 0x0000 //TX_AMS_RESRV_05 +948 0x0000 //TX_AMS_RESRV_06 +949 0x0000 //TX_AMS_RESRV_07 +950 0x0000 //TX_AMS_RESRV_08 +951 0x0000 //TX_AMS_RESRV_09 +952 0x0000 //TX_AMS_RESRV_10 +953 0x0000 //TX_AMS_RESRV_11 +954 0x0000 //TX_AMS_RESRV_12 +955 0x0000 //TX_AMS_RESRV_13 +956 0x0000 //TX_AMS_RESRV_14 +957 0x0000 //TX_AMS_RESRV_15 +958 0x0000 //TX_AMS_RESRV_16 +959 0x0000 //TX_AMS_RESRV_17 +960 0x0000 //TX_AMS_RESRV_18 +961 0x0000 //TX_AMS_RESRV_19 #RX -0 0x006C //RX_RECVFUNC_MODE_0 +0 0x206C //RX_RECVFUNC_MODE_0 1 0x0000 //RX_RECVFUNC_MODE_1 2 0x0001 //RX_SAMPLINGFREQ_SIG 3 0x0001 //RX_SAMPLINGFREQ_PROC @@ -33309,10 +49881,862 @@ 110 0x0000 //RX_FDDRC_RESRV_0 129 0x0100 //RX_SPK_VOL 130 0x0000 //RX_VOL_RESRV_0 +#RX 2 +157 0x206C //RX_RECVFUNC_MODE_0 +158 0x0000 //RX_RECVFUNC_MODE_1 +159 0x0001 //RX_SAMPLINGFREQ_SIG +160 0x0001 //RX_SAMPLINGFREQ_PROC +161 0x000A //RX_FRAME_SZ +162 0x0000 //RX_DELAY_OPT +163 0x1000 //RX_TDDRC_ALPHA_UP_1 +164 0x1000 //RX_TDDRC_ALPHA_UP_2 +165 0x1000 //RX_TDDRC_ALPHA_UP_3 +166 0x1000 //RX_TDDRC_ALPHA_UP_4 +167 0x0800 //RX_PGA +168 0x7FFF //RX_A_HP +169 0x4000 //RX_B_PE +170 0x3800 //RX_THR_PITCH_DET_0 +171 0x3000 //RX_THR_PITCH_DET_1 +172 0x2800 //RX_THR_PITCH_DET_2 +173 0x0008 //RX_PITCH_BFR_LEN +174 0x0003 //RX_SBD_PITCH_DET +175 0x0100 //RX_PP_RESRV_0 +176 0x0020 //RX_PP_RESRV_1 +177 0x0600 //RX_N_SN_EST +178 0x000C //RX_N2_SN_EST +179 0x0010 //RX_NS_LVL_CTRL +180 0xF800 //RX_THR_SN_EST +181 0x7CCD //RX_LAMBDA_PFILT +182 0x000A //RX_FENS_RESRV_0 +183 0x0190 //RX_FENS_RESRV_1 +184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +187 0x0002 //RX_EXTRA_NS_L +188 0x0800 //RX_EXTRA_NS_A +189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +190 0x7FFF //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +192 0x199A //RX_A_POST_FLT +193 0x0000 //RX_LMT_THRD +194 0x4000 //RX_LMT_ALPHA +195 0x001C //RX_FDEQ_SUBNUM +196 0x4848 //RX_FDEQ_GAIN_0 +197 0x4848 //RX_FDEQ_GAIN_1 +198 0x4848 //RX_FDEQ_GAIN_2 +199 0x4848 //RX_FDEQ_GAIN_3 +200 0x4848 //RX_FDEQ_GAIN_4 +201 0x4848 //RX_FDEQ_GAIN_5 +202 0x4848 //RX_FDEQ_GAIN_6 +203 0x4848 //RX_FDEQ_GAIN_7 +204 0x4848 //RX_FDEQ_GAIN_8 +205 0x3C3C //RX_FDEQ_GAIN_9 +206 0x3C3C //RX_FDEQ_GAIN_10 +207 0x3838 //RX_FDEQ_GAIN_11 +208 0x3838 //RX_FDEQ_GAIN_12 +209 0x3030 //RX_FDEQ_GAIN_13 +210 0x4848 //RX_FDEQ_GAIN_14 +211 0x4848 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0202 //RX_FDEQ_BIN_0 +221 0x0203 //RX_FDEQ_BIN_1 +222 0x0303 //RX_FDEQ_BIN_2 +223 0x0304 //RX_FDEQ_BIN_3 +224 0x0405 //RX_FDEQ_BIN_4 +225 0x0506 //RX_FDEQ_BIN_5 +226 0x0708 //RX_FDEQ_BIN_6 +227 0x090A //RX_FDEQ_BIN_7 +228 0x0B0C //RX_FDEQ_BIN_8 +229 0x0D0E //RX_FDEQ_BIN_9 +230 0x0E0F //RX_FDEQ_BIN_10 +231 0x0F10 //RX_FDEQ_BIN_11 +232 0x1011 //RX_FDEQ_BIN_12 +233 0x1112 //RX_FDEQ_BIN_13 +234 0x0000 //RX_FDEQ_BIN_14 +235 0x0000 //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x4000 //RX_FDEQ_RESRV_0 +245 0x0320 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0030 //RX_FDDRC_BAND_MARGIN_1 +248 0x0050 //RX_FDDRC_BAND_MARGIN_2 +249 0x0080 //RX_FDDRC_BAND_MARGIN_3 +250 0x0007 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x5000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x6400 //RX_FDDRC_THRD_3_2 +258 0x6400 //RX_FDDRC_THRD_3_3 +259 0x2000 //RX_FDDRC_SLANT_0_0 +260 0x2000 //RX_FDDRC_SLANT_0_1 +261 0x2000 //RX_FDDRC_SLANT_0_2 +262 0x2000 //RX_FDDRC_SLANT_0_3 +263 0x5333 //RX_FDDRC_SLANT_1_0 +264 0x5333 //RX_FDDRC_SLANT_1_1 +265 0x5333 //RX_FDDRC_SLANT_1_2 +266 0x5333 //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +268 0x0000 //RX_FILTINDX +269 0x0000 //RX_TDDRC_THRD_0 +270 0x0000 //RX_TDDRC_THRD_1 +271 0x7FFF //RX_TDDRC_THRD_2 +272 0x7FFF //RX_TDDRC_THRD_3 +273 0x7E70 //RX_TDDRC_SLANT_0 +274 0x7FFF //RX_TDDRC_SLANT_1 +275 0x1000 //RX_TDDRC_ALPHA_UP_0 +276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x199A //RX_TDDRC_HMNC_GAIN +279 0x0001 //RX_TDDRC_SMT_FLAG +280 0x0CCD //RX_TDDRC_SMT_W +281 0x0155 //RX_TDDRC_DRC_GAIN +282 0x7C00 //RX_LAMBDA_PKA_FP +283 0x2000 //RX_TPKA_FP +284 0x2000 //RX_MIN_G_FP +285 0x0080 //RX_MAX_G_FP +286 0x0100 //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 +288 0x0000 //RX_MAXLEVEL_CNG +289 0x3000 //RX_BWE_UV_TH +290 0x3000 //RX_BWE_UV_TH2 +291 0x1800 //RX_BWE_UV_TH3 +292 0x1000 //RX_BWE_V_TH +293 0x04CD //RX_BWE_GAIN1_V_TH1 +294 0x0F33 //RX_BWE_GAIN1_V_TH2 +295 0x7333 //RX_BWE_UV_EQ +296 0x199A //RX_BWE_V_EQ +297 0x7333 //RX_BWE_TONE_TH +298 0x0004 //RX_BWE_UV_HOLD_T +299 0x6CCD //RX_BWE_GAIN2_ALPHA +300 0x799A //RX_BWE_GAIN3_ALPHA +301 0x001E //RX_BWE_CUTOFF +302 0x3000 //RX_BWE_GAINFILL +303 0x3200 //RX_BWE_MAXTH_TONE +304 0x2000 //RX_BWE_EQ_0 +305 0x2000 //RX_BWE_EQ_1 +306 0x2000 //RX_BWE_EQ_2 +307 0x2000 //RX_BWE_EQ_3 +308 0x2000 //RX_BWE_EQ_4 +309 0x2000 //RX_BWE_EQ_5 +310 0x2000 //RX_BWE_EQ_6 +311 0x0000 //RX_BWE_RESRV_0 +312 0x0000 //RX_BWE_RESRV_1 +313 0x0000 //RX_BWE_RESRV_2 +#VOL 0 +163 0x1000 //RX_TDDRC_ALPHA_UP_1 +164 0x1000 //RX_TDDRC_ALPHA_UP_2 +165 0x1000 //RX_TDDRC_ALPHA_UP_3 +166 0x1000 //RX_TDDRC_ALPHA_UP_4 +184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +190 0x7FFF //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +269 0x0000 //RX_TDDRC_THRD_0 +270 0x0000 //RX_TDDRC_THRD_1 +271 0x7FFF //RX_TDDRC_THRD_2 +272 0x7FFF //RX_TDDRC_THRD_3 +273 0x7E70 //RX_TDDRC_SLANT_0 +274 0x7FFF //RX_TDDRC_SLANT_1 +275 0x1000 //RX_TDDRC_ALPHA_UP_0 +276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x199A //RX_TDDRC_HMNC_GAIN +279 0x0001 //RX_TDDRC_SMT_FLAG +280 0x0CCD //RX_TDDRC_SMT_W +281 0x0155 //RX_TDDRC_DRC_GAIN +195 0x001C //RX_FDEQ_SUBNUM +196 0x4848 //RX_FDEQ_GAIN_0 +197 0x4848 //RX_FDEQ_GAIN_1 +198 0x4848 //RX_FDEQ_GAIN_2 +199 0x4848 //RX_FDEQ_GAIN_3 +200 0x4848 //RX_FDEQ_GAIN_4 +201 0x4848 //RX_FDEQ_GAIN_5 +202 0x4848 //RX_FDEQ_GAIN_6 +203 0x4848 //RX_FDEQ_GAIN_7 +204 0x4848 //RX_FDEQ_GAIN_8 +205 0x3C3C //RX_FDEQ_GAIN_9 +206 0x3C3C //RX_FDEQ_GAIN_10 +207 0x3838 //RX_FDEQ_GAIN_11 +208 0x3838 //RX_FDEQ_GAIN_12 +209 0x3030 //RX_FDEQ_GAIN_13 +210 0x4848 //RX_FDEQ_GAIN_14 +211 0x4848 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0202 //RX_FDEQ_BIN_0 +221 0x0203 //RX_FDEQ_BIN_1 +222 0x0303 //RX_FDEQ_BIN_2 +223 0x0304 //RX_FDEQ_BIN_3 +224 0x0405 //RX_FDEQ_BIN_4 +225 0x0506 //RX_FDEQ_BIN_5 +226 0x0708 //RX_FDEQ_BIN_6 +227 0x090A //RX_FDEQ_BIN_7 +228 0x0B0C //RX_FDEQ_BIN_8 +229 0x0D0E //RX_FDEQ_BIN_9 +230 0x0E0F //RX_FDEQ_BIN_10 +231 0x0F10 //RX_FDEQ_BIN_11 +232 0x1011 //RX_FDEQ_BIN_12 +233 0x1112 //RX_FDEQ_BIN_13 +234 0x0000 //RX_FDEQ_BIN_14 +235 0x0000 //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x4000 //RX_FDEQ_RESRV_0 +245 0x0320 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0030 //RX_FDDRC_BAND_MARGIN_1 +248 0x0050 //RX_FDDRC_BAND_MARGIN_2 +249 0x0080 //RX_FDDRC_BAND_MARGIN_3 +250 0x0007 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x5000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x6400 //RX_FDDRC_THRD_3_2 +258 0x6400 //RX_FDDRC_THRD_3_3 +259 0x2000 //RX_FDDRC_SLANT_0_0 +260 0x2000 //RX_FDDRC_SLANT_0_1 +261 0x2000 //RX_FDDRC_SLANT_0_2 +262 0x2000 //RX_FDDRC_SLANT_0_3 +263 0x5333 //RX_FDDRC_SLANT_1_0 +264 0x5333 //RX_FDDRC_SLANT_1_1 +265 0x5333 //RX_FDDRC_SLANT_1_2 +266 0x5333 //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +286 0x0100 //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 +#VOL 1 +163 0x1000 //RX_TDDRC_ALPHA_UP_1 +164 0x1000 //RX_TDDRC_ALPHA_UP_2 +165 0x1000 //RX_TDDRC_ALPHA_UP_3 +166 0x1000 //RX_TDDRC_ALPHA_UP_4 +184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +190 0x7FFF //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +269 0x0000 //RX_TDDRC_THRD_0 +270 0x0000 //RX_TDDRC_THRD_1 +271 0x7FFF //RX_TDDRC_THRD_2 +272 0x7FFF //RX_TDDRC_THRD_3 +273 0x7E70 //RX_TDDRC_SLANT_0 +274 0x7FFF //RX_TDDRC_SLANT_1 +275 0x1000 //RX_TDDRC_ALPHA_UP_0 +276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x199A //RX_TDDRC_HMNC_GAIN +279 0x0001 //RX_TDDRC_SMT_FLAG +280 0x0CCD //RX_TDDRC_SMT_W +281 0x0155 //RX_TDDRC_DRC_GAIN +195 0x001C //RX_FDEQ_SUBNUM +196 0x4848 //RX_FDEQ_GAIN_0 +197 0x4848 //RX_FDEQ_GAIN_1 +198 0x4848 //RX_FDEQ_GAIN_2 +199 0x4848 //RX_FDEQ_GAIN_3 +200 0x4848 //RX_FDEQ_GAIN_4 +201 0x4848 //RX_FDEQ_GAIN_5 +202 0x4848 //RX_FDEQ_GAIN_6 +203 0x4848 //RX_FDEQ_GAIN_7 +204 0x4848 //RX_FDEQ_GAIN_8 +205 0x3C3C //RX_FDEQ_GAIN_9 +206 0x3C3C //RX_FDEQ_GAIN_10 +207 0x3838 //RX_FDEQ_GAIN_11 +208 0x3838 //RX_FDEQ_GAIN_12 +209 0x3030 //RX_FDEQ_GAIN_13 +210 0x4848 //RX_FDEQ_GAIN_14 +211 0x4848 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0202 //RX_FDEQ_BIN_0 +221 0x0203 //RX_FDEQ_BIN_1 +222 0x0303 //RX_FDEQ_BIN_2 +223 0x0304 //RX_FDEQ_BIN_3 +224 0x0405 //RX_FDEQ_BIN_4 +225 0x0506 //RX_FDEQ_BIN_5 +226 0x0708 //RX_FDEQ_BIN_6 +227 0x090A //RX_FDEQ_BIN_7 +228 0x0B0C //RX_FDEQ_BIN_8 +229 0x0D0E //RX_FDEQ_BIN_9 +230 0x0E0F //RX_FDEQ_BIN_10 +231 0x0F10 //RX_FDEQ_BIN_11 +232 0x1011 //RX_FDEQ_BIN_12 +233 0x1112 //RX_FDEQ_BIN_13 +234 0x0000 //RX_FDEQ_BIN_14 +235 0x0000 //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x4000 //RX_FDEQ_RESRV_0 +245 0x0320 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0030 //RX_FDDRC_BAND_MARGIN_1 +248 0x0050 //RX_FDDRC_BAND_MARGIN_2 +249 0x0080 //RX_FDDRC_BAND_MARGIN_3 +250 0x0007 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x5000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x6400 //RX_FDDRC_THRD_3_2 +258 0x6400 //RX_FDDRC_THRD_3_3 +259 0x2000 //RX_FDDRC_SLANT_0_0 +260 0x2000 //RX_FDDRC_SLANT_0_1 +261 0x2000 //RX_FDDRC_SLANT_0_2 +262 0x2000 //RX_FDDRC_SLANT_0_3 +263 0x5333 //RX_FDDRC_SLANT_1_0 +264 0x5333 //RX_FDDRC_SLANT_1_1 +265 0x5333 //RX_FDDRC_SLANT_1_2 +266 0x5333 //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +286 0x0100 //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 +#VOL 2 +163 0x1000 //RX_TDDRC_ALPHA_UP_1 +164 0x1000 //RX_TDDRC_ALPHA_UP_2 +165 0x1000 //RX_TDDRC_ALPHA_UP_3 +166 0x1000 //RX_TDDRC_ALPHA_UP_4 +184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +190 0x7FFF //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +269 0x0000 //RX_TDDRC_THRD_0 +270 0x0000 //RX_TDDRC_THRD_1 +271 0x7FFF //RX_TDDRC_THRD_2 +272 0x7FFF //RX_TDDRC_THRD_3 +273 0x7E70 //RX_TDDRC_SLANT_0 +274 0x7FFF //RX_TDDRC_SLANT_1 +275 0x1000 //RX_TDDRC_ALPHA_UP_0 +276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x199A //RX_TDDRC_HMNC_GAIN +279 0x0001 //RX_TDDRC_SMT_FLAG +280 0x0CCD //RX_TDDRC_SMT_W +281 0x0155 //RX_TDDRC_DRC_GAIN +195 0x001C //RX_FDEQ_SUBNUM +196 0x4848 //RX_FDEQ_GAIN_0 +197 0x4848 //RX_FDEQ_GAIN_1 +198 0x4848 //RX_FDEQ_GAIN_2 +199 0x4848 //RX_FDEQ_GAIN_3 +200 0x4848 //RX_FDEQ_GAIN_4 +201 0x4848 //RX_FDEQ_GAIN_5 +202 0x4848 //RX_FDEQ_GAIN_6 +203 0x4848 //RX_FDEQ_GAIN_7 +204 0x4848 //RX_FDEQ_GAIN_8 +205 0x3C3C //RX_FDEQ_GAIN_9 +206 0x3C3C //RX_FDEQ_GAIN_10 +207 0x3838 //RX_FDEQ_GAIN_11 +208 0x3838 //RX_FDEQ_GAIN_12 +209 0x3030 //RX_FDEQ_GAIN_13 +210 0x4848 //RX_FDEQ_GAIN_14 +211 0x4848 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0202 //RX_FDEQ_BIN_0 +221 0x0203 //RX_FDEQ_BIN_1 +222 0x0303 //RX_FDEQ_BIN_2 +223 0x0304 //RX_FDEQ_BIN_3 +224 0x0405 //RX_FDEQ_BIN_4 +225 0x0506 //RX_FDEQ_BIN_5 +226 0x0708 //RX_FDEQ_BIN_6 +227 0x090A //RX_FDEQ_BIN_7 +228 0x0B0C //RX_FDEQ_BIN_8 +229 0x0D0E //RX_FDEQ_BIN_9 +230 0x0E0F //RX_FDEQ_BIN_10 +231 0x0F10 //RX_FDEQ_BIN_11 +232 0x1011 //RX_FDEQ_BIN_12 +233 0x1112 //RX_FDEQ_BIN_13 +234 0x0000 //RX_FDEQ_BIN_14 +235 0x0000 //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x4000 //RX_FDEQ_RESRV_0 +245 0x0320 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0030 //RX_FDDRC_BAND_MARGIN_1 +248 0x0050 //RX_FDDRC_BAND_MARGIN_2 +249 0x0080 //RX_FDDRC_BAND_MARGIN_3 +250 0x0007 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x5000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x6400 //RX_FDDRC_THRD_3_2 +258 0x6400 //RX_FDDRC_THRD_3_3 +259 0x2000 //RX_FDDRC_SLANT_0_0 +260 0x2000 //RX_FDDRC_SLANT_0_1 +261 0x2000 //RX_FDDRC_SLANT_0_2 +262 0x2000 //RX_FDDRC_SLANT_0_3 +263 0x5333 //RX_FDDRC_SLANT_1_0 +264 0x5333 //RX_FDDRC_SLANT_1_1 +265 0x5333 //RX_FDDRC_SLANT_1_2 +266 0x5333 //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +286 0x0100 //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 +#VOL 3 +163 0x1000 //RX_TDDRC_ALPHA_UP_1 +164 0x1000 //RX_TDDRC_ALPHA_UP_2 +165 0x1000 //RX_TDDRC_ALPHA_UP_3 +166 0x1000 //RX_TDDRC_ALPHA_UP_4 +184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +190 0x7FFF //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +269 0x0000 //RX_TDDRC_THRD_0 +270 0x0000 //RX_TDDRC_THRD_1 +271 0x7FFF //RX_TDDRC_THRD_2 +272 0x7FFF //RX_TDDRC_THRD_3 +273 0x7E70 //RX_TDDRC_SLANT_0 +274 0x7FFF //RX_TDDRC_SLANT_1 +275 0x1000 //RX_TDDRC_ALPHA_UP_0 +276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x199A //RX_TDDRC_HMNC_GAIN +279 0x0001 //RX_TDDRC_SMT_FLAG +280 0x0CCD //RX_TDDRC_SMT_W +281 0x0155 //RX_TDDRC_DRC_GAIN +195 0x001C //RX_FDEQ_SUBNUM +196 0x4848 //RX_FDEQ_GAIN_0 +197 0x4848 //RX_FDEQ_GAIN_1 +198 0x4848 //RX_FDEQ_GAIN_2 +199 0x4848 //RX_FDEQ_GAIN_3 +200 0x4848 //RX_FDEQ_GAIN_4 +201 0x4848 //RX_FDEQ_GAIN_5 +202 0x4848 //RX_FDEQ_GAIN_6 +203 0x4848 //RX_FDEQ_GAIN_7 +204 0x4848 //RX_FDEQ_GAIN_8 +205 0x3C3C //RX_FDEQ_GAIN_9 +206 0x3C3C //RX_FDEQ_GAIN_10 +207 0x3838 //RX_FDEQ_GAIN_11 +208 0x3838 //RX_FDEQ_GAIN_12 +209 0x3030 //RX_FDEQ_GAIN_13 +210 0x4848 //RX_FDEQ_GAIN_14 +211 0x4848 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0202 //RX_FDEQ_BIN_0 +221 0x0203 //RX_FDEQ_BIN_1 +222 0x0303 //RX_FDEQ_BIN_2 +223 0x0304 //RX_FDEQ_BIN_3 +224 0x0405 //RX_FDEQ_BIN_4 +225 0x0506 //RX_FDEQ_BIN_5 +226 0x0708 //RX_FDEQ_BIN_6 +227 0x090A //RX_FDEQ_BIN_7 +228 0x0B0C //RX_FDEQ_BIN_8 +229 0x0D0E //RX_FDEQ_BIN_9 +230 0x0E0F //RX_FDEQ_BIN_10 +231 0x0F10 //RX_FDEQ_BIN_11 +232 0x1011 //RX_FDEQ_BIN_12 +233 0x1112 //RX_FDEQ_BIN_13 +234 0x0000 //RX_FDEQ_BIN_14 +235 0x0000 //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x4000 //RX_FDEQ_RESRV_0 +245 0x0320 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0030 //RX_FDDRC_BAND_MARGIN_1 +248 0x0050 //RX_FDDRC_BAND_MARGIN_2 +249 0x0080 //RX_FDDRC_BAND_MARGIN_3 +250 0x0007 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x5000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x6400 //RX_FDDRC_THRD_3_2 +258 0x6400 //RX_FDDRC_THRD_3_3 +259 0x2000 //RX_FDDRC_SLANT_0_0 +260 0x2000 //RX_FDDRC_SLANT_0_1 +261 0x2000 //RX_FDDRC_SLANT_0_2 +262 0x2000 //RX_FDDRC_SLANT_0_3 +263 0x5333 //RX_FDDRC_SLANT_1_0 +264 0x5333 //RX_FDDRC_SLANT_1_1 +265 0x5333 //RX_FDDRC_SLANT_1_2 +266 0x5333 //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +286 0x0100 //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 +#VOL 4 +163 0x1000 //RX_TDDRC_ALPHA_UP_1 +164 0x1000 //RX_TDDRC_ALPHA_UP_2 +165 0x1000 //RX_TDDRC_ALPHA_UP_3 +166 0x1000 //RX_TDDRC_ALPHA_UP_4 +184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +190 0x7FFF //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +269 0x0000 //RX_TDDRC_THRD_0 +270 0x0000 //RX_TDDRC_THRD_1 +271 0x7FFF //RX_TDDRC_THRD_2 +272 0x7FFF //RX_TDDRC_THRD_3 +273 0x7E70 //RX_TDDRC_SLANT_0 +274 0x7FFF //RX_TDDRC_SLANT_1 +275 0x1000 //RX_TDDRC_ALPHA_UP_0 +276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x199A //RX_TDDRC_HMNC_GAIN +279 0x0001 //RX_TDDRC_SMT_FLAG +280 0x0CCD //RX_TDDRC_SMT_W +281 0x0155 //RX_TDDRC_DRC_GAIN +195 0x001C //RX_FDEQ_SUBNUM +196 0x4848 //RX_FDEQ_GAIN_0 +197 0x4848 //RX_FDEQ_GAIN_1 +198 0x4848 //RX_FDEQ_GAIN_2 +199 0x4848 //RX_FDEQ_GAIN_3 +200 0x4848 //RX_FDEQ_GAIN_4 +201 0x4848 //RX_FDEQ_GAIN_5 +202 0x4848 //RX_FDEQ_GAIN_6 +203 0x4848 //RX_FDEQ_GAIN_7 +204 0x4848 //RX_FDEQ_GAIN_8 +205 0x3C3C //RX_FDEQ_GAIN_9 +206 0x3C3C //RX_FDEQ_GAIN_10 +207 0x3838 //RX_FDEQ_GAIN_11 +208 0x3838 //RX_FDEQ_GAIN_12 +209 0x3030 //RX_FDEQ_GAIN_13 +210 0x4848 //RX_FDEQ_GAIN_14 +211 0x4848 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0202 //RX_FDEQ_BIN_0 +221 0x0203 //RX_FDEQ_BIN_1 +222 0x0303 //RX_FDEQ_BIN_2 +223 0x0304 //RX_FDEQ_BIN_3 +224 0x0405 //RX_FDEQ_BIN_4 +225 0x0506 //RX_FDEQ_BIN_5 +226 0x0708 //RX_FDEQ_BIN_6 +227 0x090A //RX_FDEQ_BIN_7 +228 0x0B0C //RX_FDEQ_BIN_8 +229 0x0D0E //RX_FDEQ_BIN_9 +230 0x0E0F //RX_FDEQ_BIN_10 +231 0x0F10 //RX_FDEQ_BIN_11 +232 0x1011 //RX_FDEQ_BIN_12 +233 0x1112 //RX_FDEQ_BIN_13 +234 0x0000 //RX_FDEQ_BIN_14 +235 0x0000 //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x4000 //RX_FDEQ_RESRV_0 +245 0x0320 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0030 //RX_FDDRC_BAND_MARGIN_1 +248 0x0050 //RX_FDDRC_BAND_MARGIN_2 +249 0x0080 //RX_FDDRC_BAND_MARGIN_3 +250 0x0007 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x5000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x6400 //RX_FDDRC_THRD_3_2 +258 0x6400 //RX_FDDRC_THRD_3_3 +259 0x2000 //RX_FDDRC_SLANT_0_0 +260 0x2000 //RX_FDDRC_SLANT_0_1 +261 0x2000 //RX_FDDRC_SLANT_0_2 +262 0x2000 //RX_FDDRC_SLANT_0_3 +263 0x5333 //RX_FDDRC_SLANT_1_0 +264 0x5333 //RX_FDDRC_SLANT_1_1 +265 0x5333 //RX_FDDRC_SLANT_1_2 +266 0x5333 //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +286 0x0100 //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 +#VOL 5 +163 0x1000 //RX_TDDRC_ALPHA_UP_1 +164 0x1000 //RX_TDDRC_ALPHA_UP_2 +165 0x1000 //RX_TDDRC_ALPHA_UP_3 +166 0x1000 //RX_TDDRC_ALPHA_UP_4 +184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +190 0x7FFF //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +269 0x0000 //RX_TDDRC_THRD_0 +270 0x0000 //RX_TDDRC_THRD_1 +271 0x7FFF //RX_TDDRC_THRD_2 +272 0x7FFF //RX_TDDRC_THRD_3 +273 0x7E70 //RX_TDDRC_SLANT_0 +274 0x7FFF //RX_TDDRC_SLANT_1 +275 0x1000 //RX_TDDRC_ALPHA_UP_0 +276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x199A //RX_TDDRC_HMNC_GAIN +279 0x0001 //RX_TDDRC_SMT_FLAG +280 0x0CCD //RX_TDDRC_SMT_W +281 0x0155 //RX_TDDRC_DRC_GAIN +195 0x001C //RX_FDEQ_SUBNUM +196 0x4848 //RX_FDEQ_GAIN_0 +197 0x4848 //RX_FDEQ_GAIN_1 +198 0x4848 //RX_FDEQ_GAIN_2 +199 0x4848 //RX_FDEQ_GAIN_3 +200 0x4848 //RX_FDEQ_GAIN_4 +201 0x4848 //RX_FDEQ_GAIN_5 +202 0x4848 //RX_FDEQ_GAIN_6 +203 0x4848 //RX_FDEQ_GAIN_7 +204 0x4848 //RX_FDEQ_GAIN_8 +205 0x3C3C //RX_FDEQ_GAIN_9 +206 0x3C3C //RX_FDEQ_GAIN_10 +207 0x3838 //RX_FDEQ_GAIN_11 +208 0x3838 //RX_FDEQ_GAIN_12 +209 0x3030 //RX_FDEQ_GAIN_13 +210 0x4848 //RX_FDEQ_GAIN_14 +211 0x4848 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0202 //RX_FDEQ_BIN_0 +221 0x0203 //RX_FDEQ_BIN_1 +222 0x0303 //RX_FDEQ_BIN_2 +223 0x0304 //RX_FDEQ_BIN_3 +224 0x0405 //RX_FDEQ_BIN_4 +225 0x0506 //RX_FDEQ_BIN_5 +226 0x0708 //RX_FDEQ_BIN_6 +227 0x090A //RX_FDEQ_BIN_7 +228 0x0B0C //RX_FDEQ_BIN_8 +229 0x0D0E //RX_FDEQ_BIN_9 +230 0x0E0F //RX_FDEQ_BIN_10 +231 0x0F10 //RX_FDEQ_BIN_11 +232 0x1011 //RX_FDEQ_BIN_12 +233 0x1112 //RX_FDEQ_BIN_13 +234 0x0000 //RX_FDEQ_BIN_14 +235 0x0000 //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x4000 //RX_FDEQ_RESRV_0 +245 0x0320 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0030 //RX_FDDRC_BAND_MARGIN_1 +248 0x0050 //RX_FDDRC_BAND_MARGIN_2 +249 0x0080 //RX_FDDRC_BAND_MARGIN_3 +250 0x0007 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x5000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x6400 //RX_FDDRC_THRD_3_2 +258 0x6400 //RX_FDDRC_THRD_3_3 +259 0x2000 //RX_FDDRC_SLANT_0_0 +260 0x2000 //RX_FDDRC_SLANT_0_1 +261 0x2000 //RX_FDDRC_SLANT_0_2 +262 0x2000 //RX_FDDRC_SLANT_0_3 +263 0x5333 //RX_FDDRC_SLANT_1_0 +264 0x5333 //RX_FDDRC_SLANT_1_1 +265 0x5333 //RX_FDDRC_SLANT_1_2 +266 0x5333 //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +286 0x0100 //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 +#VOL 6 +163 0x1000 //RX_TDDRC_ALPHA_UP_1 +164 0x1000 //RX_TDDRC_ALPHA_UP_2 +165 0x1000 //RX_TDDRC_ALPHA_UP_3 +166 0x1000 //RX_TDDRC_ALPHA_UP_4 +184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +190 0x7FFF //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +269 0x0000 //RX_TDDRC_THRD_0 +270 0x0000 //RX_TDDRC_THRD_1 +271 0x7FFF //RX_TDDRC_THRD_2 +272 0x7FFF //RX_TDDRC_THRD_3 +273 0x7E70 //RX_TDDRC_SLANT_0 +274 0x7FFF //RX_TDDRC_SLANT_1 +275 0x1000 //RX_TDDRC_ALPHA_UP_0 +276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x199A //RX_TDDRC_HMNC_GAIN +279 0x0001 //RX_TDDRC_SMT_FLAG +280 0x0CCD //RX_TDDRC_SMT_W +281 0x0155 //RX_TDDRC_DRC_GAIN +195 0x001C //RX_FDEQ_SUBNUM +196 0x4848 //RX_FDEQ_GAIN_0 +197 0x4848 //RX_FDEQ_GAIN_1 +198 0x4848 //RX_FDEQ_GAIN_2 +199 0x4848 //RX_FDEQ_GAIN_3 +200 0x4848 //RX_FDEQ_GAIN_4 +201 0x4848 //RX_FDEQ_GAIN_5 +202 0x4848 //RX_FDEQ_GAIN_6 +203 0x4848 //RX_FDEQ_GAIN_7 +204 0x4848 //RX_FDEQ_GAIN_8 +205 0x3C3C //RX_FDEQ_GAIN_9 +206 0x3C3C //RX_FDEQ_GAIN_10 +207 0x3838 //RX_FDEQ_GAIN_11 +208 0x3838 //RX_FDEQ_GAIN_12 +209 0x3030 //RX_FDEQ_GAIN_13 +210 0x4848 //RX_FDEQ_GAIN_14 +211 0x4848 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0202 //RX_FDEQ_BIN_0 +221 0x0203 //RX_FDEQ_BIN_1 +222 0x0303 //RX_FDEQ_BIN_2 +223 0x0304 //RX_FDEQ_BIN_3 +224 0x0405 //RX_FDEQ_BIN_4 +225 0x0506 //RX_FDEQ_BIN_5 +226 0x0708 //RX_FDEQ_BIN_6 +227 0x090A //RX_FDEQ_BIN_7 +228 0x0B0C //RX_FDEQ_BIN_8 +229 0x0D0E //RX_FDEQ_BIN_9 +230 0x0E0F //RX_FDEQ_BIN_10 +231 0x0F10 //RX_FDEQ_BIN_11 +232 0x1011 //RX_FDEQ_BIN_12 +233 0x1112 //RX_FDEQ_BIN_13 +234 0x0000 //RX_FDEQ_BIN_14 +235 0x0000 //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x4000 //RX_FDEQ_RESRV_0 +245 0x0320 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0030 //RX_FDDRC_BAND_MARGIN_1 +248 0x0050 //RX_FDDRC_BAND_MARGIN_2 +249 0x0080 //RX_FDDRC_BAND_MARGIN_3 +250 0x0007 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x5000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x6400 //RX_FDDRC_THRD_3_2 +258 0x6400 //RX_FDDRC_THRD_3_3 +259 0x2000 //RX_FDDRC_SLANT_0_0 +260 0x2000 //RX_FDDRC_SLANT_0_1 +261 0x2000 //RX_FDDRC_SLANT_0_2 +262 0x2000 //RX_FDDRC_SLANT_0_3 +263 0x5333 //RX_FDDRC_SLANT_1_0 +264 0x5333 //RX_FDDRC_SLANT_1_1 +265 0x5333 //RX_FDDRC_SLANT_1_2 +266 0x5333 //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +286 0x0100 //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 #CASE_NAME BLUETOOTH-BTWB_NREC-VOICE_GENERIC-SWB -#PARAM_TYPE TX+RX -#TOTAL_CUSTOM_STEP 7 +#PARAM_MODE Full +#PARAM_TYPE TX+2RX +#TOTAL_CUSTOM_STEP 7+7 #TX 0 0x0001 //TX_OPERATION_MODE_0 1 0x0001 //TX_OPERATION_MODE_1 @@ -33565,20 +50989,20 @@ 248 0xF400 //TX_THR_SN_EST_6 249 0xF600 //TX_THR_SN_EST_7 250 0x0000 //TX_DELTA_THR_SN_EST_0 -251 0x0000 //TX_DELTA_THR_SN_EST_1 +251 0x0200 //TX_DELTA_THR_SN_EST_1 252 0x0200 //TX_DELTA_THR_SN_EST_2 253 0x0200 //TX_DELTA_THR_SN_EST_3 254 0x0200 //TX_DELTA_THR_SN_EST_4 255 0x0200 //TX_DELTA_THR_SN_EST_5 -256 0x0200 //TX_DELTA_THR_SN_EST_6 +256 0x0000 //TX_DELTA_THR_SN_EST_6 257 0x0200 //TX_DELTA_THR_SN_EST_7 258 0x6000 //TX_LAMBDA_NN_EST_0 -259 0x6000 //TX_LAMBDA_NN_EST_1 +259 0x4000 //TX_LAMBDA_NN_EST_1 260 0x4000 //TX_LAMBDA_NN_EST_2 261 0x4000 //TX_LAMBDA_NN_EST_3 262 0x4000 //TX_LAMBDA_NN_EST_4 263 0x4000 //TX_LAMBDA_NN_EST_5 -264 0x4000 //TX_LAMBDA_NN_EST_6 +264 0x6000 //TX_LAMBDA_NN_EST_6 265 0x4000 //TX_LAMBDA_NN_EST_7 266 0x0400 //TX_N_SN_EST 267 0x001E //TX_INBEAM_T @@ -33596,16 +51020,16 @@ 279 0x1000 //TX_B_POST_FLT_0 280 0x1000 //TX_B_POST_FLT_1 281 0x000B //TX_NS_LVL_CTRL_0 -282 0x000F //TX_NS_LVL_CTRL_1 -283 0x0011 //TX_NS_LVL_CTRL_2 +282 0x0011 //TX_NS_LVL_CTRL_1 +283 0x000F //TX_NS_LVL_CTRL_2 284 0x000F //TX_NS_LVL_CTRL_3 285 0x000F //TX_NS_LVL_CTRL_4 286 0x000F //TX_NS_LVL_CTRL_5 287 0x000F //TX_NS_LVL_CTRL_6 288 0x0011 //TX_NS_LVL_CTRL_7 289 0x000C //TX_MIN_GAIN_S_0 -290 0x000C //TX_MIN_GAIN_S_1 -291 0x000F //TX_MIN_GAIN_S_2 +290 0x000F //TX_MIN_GAIN_S_1 +291 0x000C //TX_MIN_GAIN_S_2 292 0x000C //TX_MIN_GAIN_S_3 293 0x000C //TX_MIN_GAIN_S_4 294 0x000C //TX_MIN_GAIN_S_5 @@ -33629,12 +51053,12 @@ 312 0x7FFF //TX_A_POST_FILT_0 313 0x2000 //TX_A_POST_FILT_1 314 0x2000 //TX_A_POST_FILT_S_0 -315 0x4000 //TX_A_POST_FILT_S_1 +315 0x5000 //TX_A_POST_FILT_S_1 316 0x5000 //TX_A_POST_FILT_S_2 317 0x5000 //TX_A_POST_FILT_S_3 318 0x5000 //TX_A_POST_FILT_S_4 319 0x5000 //TX_A_POST_FILT_S_5 -320 0x5000 //TX_A_POST_FILT_S_6 +320 0x4000 //TX_A_POST_FILT_S_6 321 0x5000 //TX_A_POST_FILT_S_7 322 0x1000 //TX_B_POST_FILT_0 323 0x1000 //TX_B_POST_FILT_1 @@ -33694,10 +51118,10 @@ 377 0x7FFF //TX_NOISE_TH_5_4 378 0x044C //TX_NOISE_TH_6 379 0x0014 //TX_MINENOISE_TH -380 0x4000 //TX_MINENOISE_MIC0_TH_MTS -381 0xFFEE //TX_MINENOISE_MIC0_TH_EXP -382 0x6000 //TX_MINENOISE_MIC0_S_TH_MTS -383 0xFFF3 //TX_MINENOISE_MIC0_S_TH_EXP +380 0x4000 //TX_MORENS_TFMASK_TH +381 0xFFEE //TX_DRC_QUIET_FLOOR +382 0x6000 //TX_RATIODTL_CUT_TH +383 0xFFF3 //TX_DT_CUT_K1 384 0x0666 //TX_OUT_ENER_S_TH_CLEAN 385 0x0666 //TX_OUT_ENER_S_TH_LESSCLEAN 386 0x0333 //TX_OUT_ENER_S_TH_NOISY @@ -33705,15 +51129,15 @@ 388 0x0333 //TX_OUT_ENER_TH_SPEECH 389 0x2000 //TX_SN_NPB_GAIN 390 0x0000 //TX_NN_NPB_GAIN -391 0x0000 //TX_CSX_ALPHA_0 -392 0x0000 //TX_CSX_ALPHA_1 -393 0x0000 //TX_CSX_ALPHA_2 -394 0x0000 //TX_CSX_ALPHA_3 -395 0x0800 //TX_MU_ARSP_EST -396 0x00C8 //TX_P_OUTBEAM_MIN_TH +391 0x0000 //TX_POST_MASK_SUP_HSNE +392 0x0000 //TX_TAIL_DET_TH +393 0x0000 //TX_B_LESSCUT_RTO_WTA +394 0x0000 //TX_MEL_G_R +395 0x0800 //TX_SUPHIGH_TH +396 0x00C8 //TX_MASK_G_R 397 0x0002 //TX_EXTRA_NS_L -398 0x0800 //TX_EXTRA_NS_A -399 0x0005 //TX_VR_NOISE_FLOOR_TH +398 0x0800 //TX_C_POST_FLT_MASK +399 0x0005 //TX_A_POST_FLT_WNS 400 0x0148 //TX_MIN_G_LOW300HZ 401 0x0002 //TX_MAXLEVEL_CNG 402 0x00B4 //TX_STN_NOISE_TH @@ -33828,16 +51252,16 @@ 511 0x6666 //TX_MIC_TO_BFGAIN 512 0x0000 //TX_MICTOBFGAIN0 513 0x0000 //TX_FASTMUE_TH -514 0x0000 //TX_DERVB_LEN_0 -515 0x0000 //TX_DERVB_LEN_1 -516 0x0000 //TX_RHO_DERVB -517 0x0000 //TX_MIC_INDX_DERVB -518 0x0000 //TX_MU_DERVB -519 0x0000 //TX_DR_RESRV_0 -520 0x0000 //TX_DR_RESRV_1 -521 0x0000 //TX_DR_RESRV_2 -522 0x0000 //TX_DR_RESRV_3 -523 0x0000 //TX_DR_RESRV_4 +514 0x0000 //TX_DEREVERB_LF_MU +515 0x0000 //TX_DEREVERB_HF_MU +516 0x0000 //TX_DEREVERB_DELAY +517 0x0000 //TX_DEREVERB_COEF_LEN +518 0x0000 //TX_DEREVERB_DNR +519 0x0000 //TX_DEREVERB_ALPHA +520 0x0000 //TX_DEREVERB_BETA +521 0x0000 //TX_GSC_RTOL_TH +522 0x0000 //TX_GSC_RTOH_TH +523 0x0000 //TX_WIDE2_MEANHTH 524 0x0000 //TX_DR_RESRV_5 525 0x0000 //TX_DR_RESRV_6 526 0x0000 //TX_DR_RESRV_7 @@ -34211,8 +51635,73 @@ 894 0xC000 //TX_FASTNS_SSA_THHFL 895 0xCCCC //TX_FASTNS_SSA_THLFH 896 0xD999 //TX_FASTNS_SSA_THHFH +897 0x0000 //TX_SENDFUNC_REG_MICMUTE +898 0x0000 //TX_SENDFUNC_REG_MICMUTE1 +899 0x0000 //TX_MICMUTE_RATIO_THR +900 0x0000 //TX_MICMUTE_AMP_THR +901 0x0000 //TX_MICMUTE_HPF_IND +902 0x0000 //TX_MICMUTE_LOG_EYR_TH +903 0x0000 //TX_MICMUTE_CVG_TIME +904 0x0000 //TX_MICMUTE_RELEASE_TIME +905 0x0000 //TX_MIC_VOLUME_MIC0MUTE +906 0x0000 //TX_MICMUTE_EPD_OFFSET_0 +907 0x0000 //TX_MICMUTE_FRQ_AEC_L +908 0x0000 //TX_MICMUTE_EAD_THR +909 0x0000 //TX_MICMUTE_LAMBDA_CB_NLE +910 0x0000 //TX_MICMUTE_LAMBDA_RE_EST +911 0x0000 //TX_DTD_THR1_MICMUTE_0 +912 0x0000 //TX_DTD_THR1_MICMUTE_1 +913 0x0000 //TX_DTD_THR1_MICMUTE_2 +914 0x0000 //TX_DTD_THR1_MICMUTE_3 +915 0x0000 //TX_DTD_THR2_MICMUTE_0 +916 0x0000 //TX_MICMUTE_MIN_EQ_RE_EST_0 +917 0x0000 //TX_MICMUTE_MIN_EQ_RE_EST_1 +918 0x0000 //TX_MICMUTE_MIN_EQ_RE_EST_2 +919 0x0000 //TX_MICMUTE_MIN_EQ_RE_EST_3 +920 0x0000 //TX_MICMUTE_MIN_EQ_RE_EST_4 +921 0x0000 //TX_MICMUTE_C_POST_FLT +922 0x0000 //TX_MICMUTE_DT_CUT_K +923 0x0000 //TX_MICMUTE_DT_CUT_THR +924 0x0000 //TX_MICMUTE_DT_CUT_K2 +925 0x0000 //TX_MICMUTE_DT_CUT_THR2 +926 0x0000 //TX_MICMUTE_DT2_HOLD_N +927 0x0000 //TX_MICMUTE_RATIODTH_THCUT +928 0x0000 //TX_MICMUTE_B_POST_FLT_ECHOL +929 0x0000 //TX_MICMUTE_B_POST_FLT_ECHOH +930 0x0000 //TX_MICMUTE_C_POST_FLT_MASK +931 0x0000 //TX_MICMUTE_RATIODTL_CUT_TH +932 0x0000 //TX_MICMUTE_DT_CUT_K1 +933 0x0000 //TX_MICMUTE_N2_SN_EST +934 0x0000 //TX_MICMUTE_THR_SN_EST_0 +935 0x0000 //TX_MICMUTE_MIN_G_CTRL_0 +936 0x0000 //TX_MICMUTE_A_POST_FILT_S_0 +937 0x0000 //TX_MICMUTE_B_POST_FILT_0 +938 0x0000 //TX_MIC1RUB_AMP_THR +939 0x0000 //TX_MIC1MUTE_RATIO_THR +940 0x0000 //TX_MIC1MUTE_AMP_THR +941 0x0000 //TX_MIC1MUTE_CVG_TIME +942 0x0000 //TX_MIC1MUTE_RELEASE_TIME +943 0x0000 //TX_AMS_RESRV_01 +944 0x0000 //TX_AMS_RESRV_02 +945 0x0000 //TX_AMS_RESRV_03 +946 0x0000 //TX_AMS_RESRV_04 +947 0x0000 //TX_AMS_RESRV_05 +948 0x0000 //TX_AMS_RESRV_06 +949 0x0000 //TX_AMS_RESRV_07 +950 0x0000 //TX_AMS_RESRV_08 +951 0x0000 //TX_AMS_RESRV_09 +952 0x0000 //TX_AMS_RESRV_10 +953 0x0000 //TX_AMS_RESRV_11 +954 0x0000 //TX_AMS_RESRV_12 +955 0x0000 //TX_AMS_RESRV_13 +956 0x0000 //TX_AMS_RESRV_14 +957 0x0000 //TX_AMS_RESRV_15 +958 0x0000 //TX_AMS_RESRV_16 +959 0x0000 //TX_AMS_RESRV_17 +960 0x0000 //TX_AMS_RESRV_18 +961 0x0000 //TX_AMS_RESRV_19 #RX -0 0x0064 //RX_RECVFUNC_MODE_0 +0 0x2064 //RX_RECVFUNC_MODE_0 1 0x0000 //RX_RECVFUNC_MODE_1 2 0x0003 //RX_SAMPLINGFREQ_SIG 3 0x0003 //RX_SAMPLINGFREQ_PROC @@ -35062,10 +52551,862 @@ 110 0x0000 //RX_FDDRC_RESRV_0 129 0x0100 //RX_SPK_VOL 130 0x0000 //RX_VOL_RESRV_0 +#RX 2 +157 0x2064 //RX_RECVFUNC_MODE_0 +158 0x0000 //RX_RECVFUNC_MODE_1 +159 0x0003 //RX_SAMPLINGFREQ_SIG +160 0x0003 //RX_SAMPLINGFREQ_PROC +161 0x000A //RX_FRAME_SZ +162 0x0000 //RX_DELAY_OPT +163 0x3000 //RX_TDDRC_ALPHA_UP_1 +164 0x3000 //RX_TDDRC_ALPHA_UP_2 +165 0x3000 //RX_TDDRC_ALPHA_UP_3 +166 0x3000 //RX_TDDRC_ALPHA_UP_4 +167 0x0800 //RX_PGA +168 0x7FFF //RX_A_HP +169 0x0000 //RX_B_PE +170 0x1800 //RX_THR_PITCH_DET_0 +171 0x1000 //RX_THR_PITCH_DET_1 +172 0x0800 //RX_THR_PITCH_DET_2 +173 0x0008 //RX_PITCH_BFR_LEN +174 0x0003 //RX_SBD_PITCH_DET +175 0x0100 //RX_PP_RESRV_0 +176 0x0020 //RX_PP_RESRV_1 +177 0x0400 //RX_N_SN_EST +178 0x000C //RX_N2_SN_EST +179 0x0003 //RX_NS_LVL_CTRL +180 0x9000 //RX_THR_SN_EST +181 0x7CCD //RX_LAMBDA_PFILT +182 0x000A //RX_FENS_RESRV_0 +183 0x0190 //RX_FENS_RESRV_1 +184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +187 0x0002 //RX_EXTRA_NS_L +188 0x0800 //RX_EXTRA_NS_A +189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +190 0x7FFF //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +192 0x199A //RX_A_POST_FLT +193 0x0000 //RX_LMT_THRD +194 0x4000 //RX_LMT_ALPHA +195 0x0020 //RX_FDEQ_SUBNUM +196 0x4848 //RX_FDEQ_GAIN_0 +197 0x4848 //RX_FDEQ_GAIN_1 +198 0x4848 //RX_FDEQ_GAIN_2 +199 0x4848 //RX_FDEQ_GAIN_3 +200 0x4848 //RX_FDEQ_GAIN_4 +201 0x4848 //RX_FDEQ_GAIN_5 +202 0x4848 //RX_FDEQ_GAIN_6 +203 0x4848 //RX_FDEQ_GAIN_7 +204 0x4848 //RX_FDEQ_GAIN_8 +205 0x4848 //RX_FDEQ_GAIN_9 +206 0x4848 //RX_FDEQ_GAIN_10 +207 0x4848 //RX_FDEQ_GAIN_11 +208 0x4848 //RX_FDEQ_GAIN_12 +209 0x4848 //RX_FDEQ_GAIN_13 +210 0x4848 //RX_FDEQ_GAIN_14 +211 0x4848 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0202 //RX_FDEQ_BIN_0 +221 0x0203 //RX_FDEQ_BIN_1 +222 0x0303 //RX_FDEQ_BIN_2 +223 0x0304 //RX_FDEQ_BIN_3 +224 0x0405 //RX_FDEQ_BIN_4 +225 0x0506 //RX_FDEQ_BIN_5 +226 0x0708 //RX_FDEQ_BIN_6 +227 0x090A //RX_FDEQ_BIN_7 +228 0x0B0C //RX_FDEQ_BIN_8 +229 0x0D0E //RX_FDEQ_BIN_9 +230 0x1013 //RX_FDEQ_BIN_10 +231 0x1719 //RX_FDEQ_BIN_11 +232 0x1B1E //RX_FDEQ_BIN_12 +233 0x1E1E //RX_FDEQ_BIN_13 +234 0x1E28 //RX_FDEQ_BIN_14 +235 0x282C //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x4000 //RX_FDEQ_RESRV_0 +245 0x0320 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0030 //RX_FDDRC_BAND_MARGIN_1 +248 0x0050 //RX_FDDRC_BAND_MARGIN_2 +249 0x0080 //RX_FDDRC_BAND_MARGIN_3 +250 0x0007 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x5000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x6400 //RX_FDDRC_THRD_3_2 +258 0x6400 //RX_FDDRC_THRD_3_3 +259 0x2000 //RX_FDDRC_SLANT_0_0 +260 0x2000 //RX_FDDRC_SLANT_0_1 +261 0x2000 //RX_FDDRC_SLANT_0_2 +262 0x2000 //RX_FDDRC_SLANT_0_3 +263 0x5333 //RX_FDDRC_SLANT_1_0 +264 0x5333 //RX_FDDRC_SLANT_1_1 +265 0x5333 //RX_FDDRC_SLANT_1_2 +266 0x5333 //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +268 0x0000 //RX_FILTINDX +269 0x0000 //RX_TDDRC_THRD_0 +270 0x0000 //RX_TDDRC_THRD_1 +271 0x7FFF //RX_TDDRC_THRD_2 +272 0x7FFF //RX_TDDRC_THRD_3 +273 0x7FFF //RX_TDDRC_SLANT_0 +274 0x7FFF //RX_TDDRC_SLANT_1 +275 0x3000 //RX_TDDRC_ALPHA_UP_0 +276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x199A //RX_TDDRC_HMNC_GAIN +279 0x0001 //RX_TDDRC_SMT_FLAG +280 0x0CCD //RX_TDDRC_SMT_W +281 0x0155 //RX_TDDRC_DRC_GAIN +282 0x7C00 //RX_LAMBDA_PKA_FP +283 0x2000 //RX_TPKA_FP +284 0x2000 //RX_MIN_G_FP +285 0x0080 //RX_MAX_G_FP +286 0x0100 //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 +288 0x0000 //RX_MAXLEVEL_CNG +289 0x3000 //RX_BWE_UV_TH +290 0x3000 //RX_BWE_UV_TH2 +291 0x1800 //RX_BWE_UV_TH3 +292 0x1000 //RX_BWE_V_TH +293 0x04CD //RX_BWE_GAIN1_V_TH1 +294 0x0F33 //RX_BWE_GAIN1_V_TH2 +295 0x7333 //RX_BWE_UV_EQ +296 0x199A //RX_BWE_V_EQ +297 0x7333 //RX_BWE_TONE_TH +298 0x0004 //RX_BWE_UV_HOLD_T +299 0x6CCD //RX_BWE_GAIN2_ALPHA +300 0x799A //RX_BWE_GAIN3_ALPHA +301 0x001E //RX_BWE_CUTOFF +302 0x3000 //RX_BWE_GAINFILL +303 0x3200 //RX_BWE_MAXTH_TONE +304 0x2000 //RX_BWE_EQ_0 +305 0x2000 //RX_BWE_EQ_1 +306 0x2000 //RX_BWE_EQ_2 +307 0x2000 //RX_BWE_EQ_3 +308 0x2000 //RX_BWE_EQ_4 +309 0x2000 //RX_BWE_EQ_5 +310 0x2000 //RX_BWE_EQ_6 +311 0x0000 //RX_BWE_RESRV_0 +312 0x0000 //RX_BWE_RESRV_1 +313 0x0000 //RX_BWE_RESRV_2 +#VOL 0 +163 0x3000 //RX_TDDRC_ALPHA_UP_1 +164 0x3000 //RX_TDDRC_ALPHA_UP_2 +165 0x3000 //RX_TDDRC_ALPHA_UP_3 +166 0x3000 //RX_TDDRC_ALPHA_UP_4 +184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +190 0x7FFF //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +269 0x0000 //RX_TDDRC_THRD_0 +270 0x0000 //RX_TDDRC_THRD_1 +271 0x7FFF //RX_TDDRC_THRD_2 +272 0x7FFF //RX_TDDRC_THRD_3 +273 0x7FFF //RX_TDDRC_SLANT_0 +274 0x7FFF //RX_TDDRC_SLANT_1 +275 0x3000 //RX_TDDRC_ALPHA_UP_0 +276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x199A //RX_TDDRC_HMNC_GAIN +279 0x0001 //RX_TDDRC_SMT_FLAG +280 0x0CCD //RX_TDDRC_SMT_W +281 0x0155 //RX_TDDRC_DRC_GAIN +195 0x0020 //RX_FDEQ_SUBNUM +196 0x4848 //RX_FDEQ_GAIN_0 +197 0x4848 //RX_FDEQ_GAIN_1 +198 0x4848 //RX_FDEQ_GAIN_2 +199 0x4848 //RX_FDEQ_GAIN_3 +200 0x4848 //RX_FDEQ_GAIN_4 +201 0x4848 //RX_FDEQ_GAIN_5 +202 0x4848 //RX_FDEQ_GAIN_6 +203 0x4848 //RX_FDEQ_GAIN_7 +204 0x4848 //RX_FDEQ_GAIN_8 +205 0x4848 //RX_FDEQ_GAIN_9 +206 0x4848 //RX_FDEQ_GAIN_10 +207 0x4848 //RX_FDEQ_GAIN_11 +208 0x4848 //RX_FDEQ_GAIN_12 +209 0x4848 //RX_FDEQ_GAIN_13 +210 0x4848 //RX_FDEQ_GAIN_14 +211 0x4848 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0202 //RX_FDEQ_BIN_0 +221 0x0203 //RX_FDEQ_BIN_1 +222 0x0303 //RX_FDEQ_BIN_2 +223 0x0304 //RX_FDEQ_BIN_3 +224 0x0405 //RX_FDEQ_BIN_4 +225 0x0506 //RX_FDEQ_BIN_5 +226 0x0708 //RX_FDEQ_BIN_6 +227 0x090A //RX_FDEQ_BIN_7 +228 0x0B0C //RX_FDEQ_BIN_8 +229 0x0D0E //RX_FDEQ_BIN_9 +230 0x1013 //RX_FDEQ_BIN_10 +231 0x1719 //RX_FDEQ_BIN_11 +232 0x1B1E //RX_FDEQ_BIN_12 +233 0x1E1E //RX_FDEQ_BIN_13 +234 0x1E28 //RX_FDEQ_BIN_14 +235 0x282C //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x4000 //RX_FDEQ_RESRV_0 +245 0x0320 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0030 //RX_FDDRC_BAND_MARGIN_1 +248 0x0050 //RX_FDDRC_BAND_MARGIN_2 +249 0x0080 //RX_FDDRC_BAND_MARGIN_3 +250 0x0007 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x5000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x6400 //RX_FDDRC_THRD_3_2 +258 0x6400 //RX_FDDRC_THRD_3_3 +259 0x2000 //RX_FDDRC_SLANT_0_0 +260 0x2000 //RX_FDDRC_SLANT_0_1 +261 0x2000 //RX_FDDRC_SLANT_0_2 +262 0x2000 //RX_FDDRC_SLANT_0_3 +263 0x5333 //RX_FDDRC_SLANT_1_0 +264 0x5333 //RX_FDDRC_SLANT_1_1 +265 0x5333 //RX_FDDRC_SLANT_1_2 +266 0x5333 //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +286 0x0100 //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 +#VOL 1 +163 0x3000 //RX_TDDRC_ALPHA_UP_1 +164 0x3000 //RX_TDDRC_ALPHA_UP_2 +165 0x3000 //RX_TDDRC_ALPHA_UP_3 +166 0x3000 //RX_TDDRC_ALPHA_UP_4 +184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +190 0x7FFF //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +269 0x0000 //RX_TDDRC_THRD_0 +270 0x0000 //RX_TDDRC_THRD_1 +271 0x7FFF //RX_TDDRC_THRD_2 +272 0x7FFF //RX_TDDRC_THRD_3 +273 0x7FFF //RX_TDDRC_SLANT_0 +274 0x7FFF //RX_TDDRC_SLANT_1 +275 0x3000 //RX_TDDRC_ALPHA_UP_0 +276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x199A //RX_TDDRC_HMNC_GAIN +279 0x0001 //RX_TDDRC_SMT_FLAG +280 0x0CCD //RX_TDDRC_SMT_W +281 0x0155 //RX_TDDRC_DRC_GAIN +195 0x0020 //RX_FDEQ_SUBNUM +196 0x4848 //RX_FDEQ_GAIN_0 +197 0x4848 //RX_FDEQ_GAIN_1 +198 0x4848 //RX_FDEQ_GAIN_2 +199 0x4848 //RX_FDEQ_GAIN_3 +200 0x4848 //RX_FDEQ_GAIN_4 +201 0x4848 //RX_FDEQ_GAIN_5 +202 0x4848 //RX_FDEQ_GAIN_6 +203 0x4848 //RX_FDEQ_GAIN_7 +204 0x4848 //RX_FDEQ_GAIN_8 +205 0x4848 //RX_FDEQ_GAIN_9 +206 0x4848 //RX_FDEQ_GAIN_10 +207 0x4848 //RX_FDEQ_GAIN_11 +208 0x4848 //RX_FDEQ_GAIN_12 +209 0x4848 //RX_FDEQ_GAIN_13 +210 0x4848 //RX_FDEQ_GAIN_14 +211 0x4848 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0202 //RX_FDEQ_BIN_0 +221 0x0203 //RX_FDEQ_BIN_1 +222 0x0303 //RX_FDEQ_BIN_2 +223 0x0304 //RX_FDEQ_BIN_3 +224 0x0405 //RX_FDEQ_BIN_4 +225 0x0506 //RX_FDEQ_BIN_5 +226 0x0708 //RX_FDEQ_BIN_6 +227 0x090A //RX_FDEQ_BIN_7 +228 0x0B0C //RX_FDEQ_BIN_8 +229 0x0D0E //RX_FDEQ_BIN_9 +230 0x1013 //RX_FDEQ_BIN_10 +231 0x1719 //RX_FDEQ_BIN_11 +232 0x1B1E //RX_FDEQ_BIN_12 +233 0x1E1E //RX_FDEQ_BIN_13 +234 0x1E28 //RX_FDEQ_BIN_14 +235 0x282C //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x4000 //RX_FDEQ_RESRV_0 +245 0x0320 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0030 //RX_FDDRC_BAND_MARGIN_1 +248 0x0050 //RX_FDDRC_BAND_MARGIN_2 +249 0x0080 //RX_FDDRC_BAND_MARGIN_3 +250 0x0007 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x5000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x6400 //RX_FDDRC_THRD_3_2 +258 0x6400 //RX_FDDRC_THRD_3_3 +259 0x2000 //RX_FDDRC_SLANT_0_0 +260 0x2000 //RX_FDDRC_SLANT_0_1 +261 0x2000 //RX_FDDRC_SLANT_0_2 +262 0x2000 //RX_FDDRC_SLANT_0_3 +263 0x5333 //RX_FDDRC_SLANT_1_0 +264 0x5333 //RX_FDDRC_SLANT_1_1 +265 0x5333 //RX_FDDRC_SLANT_1_2 +266 0x5333 //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +286 0x0100 //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 +#VOL 2 +163 0x3000 //RX_TDDRC_ALPHA_UP_1 +164 0x3000 //RX_TDDRC_ALPHA_UP_2 +165 0x3000 //RX_TDDRC_ALPHA_UP_3 +166 0x3000 //RX_TDDRC_ALPHA_UP_4 +184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +190 0x7FFF //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +269 0x0000 //RX_TDDRC_THRD_0 +270 0x0000 //RX_TDDRC_THRD_1 +271 0x7FFF //RX_TDDRC_THRD_2 +272 0x7FFF //RX_TDDRC_THRD_3 +273 0x7FFF //RX_TDDRC_SLANT_0 +274 0x7FFF //RX_TDDRC_SLANT_1 +275 0x3000 //RX_TDDRC_ALPHA_UP_0 +276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x199A //RX_TDDRC_HMNC_GAIN +279 0x0001 //RX_TDDRC_SMT_FLAG +280 0x0CCD //RX_TDDRC_SMT_W +281 0x0155 //RX_TDDRC_DRC_GAIN +195 0x0020 //RX_FDEQ_SUBNUM +196 0x4848 //RX_FDEQ_GAIN_0 +197 0x4848 //RX_FDEQ_GAIN_1 +198 0x4848 //RX_FDEQ_GAIN_2 +199 0x4848 //RX_FDEQ_GAIN_3 +200 0x4848 //RX_FDEQ_GAIN_4 +201 0x4848 //RX_FDEQ_GAIN_5 +202 0x4848 //RX_FDEQ_GAIN_6 +203 0x4848 //RX_FDEQ_GAIN_7 +204 0x4848 //RX_FDEQ_GAIN_8 +205 0x4848 //RX_FDEQ_GAIN_9 +206 0x4848 //RX_FDEQ_GAIN_10 +207 0x4848 //RX_FDEQ_GAIN_11 +208 0x4848 //RX_FDEQ_GAIN_12 +209 0x4848 //RX_FDEQ_GAIN_13 +210 0x4848 //RX_FDEQ_GAIN_14 +211 0x4848 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0202 //RX_FDEQ_BIN_0 +221 0x0203 //RX_FDEQ_BIN_1 +222 0x0303 //RX_FDEQ_BIN_2 +223 0x0304 //RX_FDEQ_BIN_3 +224 0x0405 //RX_FDEQ_BIN_4 +225 0x0506 //RX_FDEQ_BIN_5 +226 0x0708 //RX_FDEQ_BIN_6 +227 0x090A //RX_FDEQ_BIN_7 +228 0x0B0C //RX_FDEQ_BIN_8 +229 0x0D0E //RX_FDEQ_BIN_9 +230 0x1013 //RX_FDEQ_BIN_10 +231 0x1719 //RX_FDEQ_BIN_11 +232 0x1B1E //RX_FDEQ_BIN_12 +233 0x1E1E //RX_FDEQ_BIN_13 +234 0x1E28 //RX_FDEQ_BIN_14 +235 0x282C //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x4000 //RX_FDEQ_RESRV_0 +245 0x0320 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0030 //RX_FDDRC_BAND_MARGIN_1 +248 0x0050 //RX_FDDRC_BAND_MARGIN_2 +249 0x0080 //RX_FDDRC_BAND_MARGIN_3 +250 0x0007 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x5000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x6400 //RX_FDDRC_THRD_3_2 +258 0x6400 //RX_FDDRC_THRD_3_3 +259 0x2000 //RX_FDDRC_SLANT_0_0 +260 0x2000 //RX_FDDRC_SLANT_0_1 +261 0x2000 //RX_FDDRC_SLANT_0_2 +262 0x2000 //RX_FDDRC_SLANT_0_3 +263 0x5333 //RX_FDDRC_SLANT_1_0 +264 0x5333 //RX_FDDRC_SLANT_1_1 +265 0x5333 //RX_FDDRC_SLANT_1_2 +266 0x5333 //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +286 0x0100 //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 +#VOL 3 +163 0x3000 //RX_TDDRC_ALPHA_UP_1 +164 0x3000 //RX_TDDRC_ALPHA_UP_2 +165 0x3000 //RX_TDDRC_ALPHA_UP_3 +166 0x3000 //RX_TDDRC_ALPHA_UP_4 +184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +190 0x7FFF //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +269 0x0000 //RX_TDDRC_THRD_0 +270 0x0000 //RX_TDDRC_THRD_1 +271 0x7FFF //RX_TDDRC_THRD_2 +272 0x7FFF //RX_TDDRC_THRD_3 +273 0x7FFF //RX_TDDRC_SLANT_0 +274 0x7FFF //RX_TDDRC_SLANT_1 +275 0x3000 //RX_TDDRC_ALPHA_UP_0 +276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x199A //RX_TDDRC_HMNC_GAIN +279 0x0001 //RX_TDDRC_SMT_FLAG +280 0x0CCD //RX_TDDRC_SMT_W +281 0x0155 //RX_TDDRC_DRC_GAIN +195 0x0020 //RX_FDEQ_SUBNUM +196 0x4848 //RX_FDEQ_GAIN_0 +197 0x4848 //RX_FDEQ_GAIN_1 +198 0x4848 //RX_FDEQ_GAIN_2 +199 0x4848 //RX_FDEQ_GAIN_3 +200 0x4848 //RX_FDEQ_GAIN_4 +201 0x4848 //RX_FDEQ_GAIN_5 +202 0x4848 //RX_FDEQ_GAIN_6 +203 0x4848 //RX_FDEQ_GAIN_7 +204 0x4848 //RX_FDEQ_GAIN_8 +205 0x4848 //RX_FDEQ_GAIN_9 +206 0x4848 //RX_FDEQ_GAIN_10 +207 0x4848 //RX_FDEQ_GAIN_11 +208 0x4848 //RX_FDEQ_GAIN_12 +209 0x4848 //RX_FDEQ_GAIN_13 +210 0x4848 //RX_FDEQ_GAIN_14 +211 0x4848 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0202 //RX_FDEQ_BIN_0 +221 0x0203 //RX_FDEQ_BIN_1 +222 0x0303 //RX_FDEQ_BIN_2 +223 0x0304 //RX_FDEQ_BIN_3 +224 0x0405 //RX_FDEQ_BIN_4 +225 0x0506 //RX_FDEQ_BIN_5 +226 0x0708 //RX_FDEQ_BIN_6 +227 0x090A //RX_FDEQ_BIN_7 +228 0x0B0C //RX_FDEQ_BIN_8 +229 0x0D0E //RX_FDEQ_BIN_9 +230 0x1013 //RX_FDEQ_BIN_10 +231 0x1719 //RX_FDEQ_BIN_11 +232 0x1B1E //RX_FDEQ_BIN_12 +233 0x1E1E //RX_FDEQ_BIN_13 +234 0x1E28 //RX_FDEQ_BIN_14 +235 0x282C //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x4000 //RX_FDEQ_RESRV_0 +245 0x0320 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0030 //RX_FDDRC_BAND_MARGIN_1 +248 0x0050 //RX_FDDRC_BAND_MARGIN_2 +249 0x0080 //RX_FDDRC_BAND_MARGIN_3 +250 0x0007 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x5000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x6400 //RX_FDDRC_THRD_3_2 +258 0x6400 //RX_FDDRC_THRD_3_3 +259 0x2000 //RX_FDDRC_SLANT_0_0 +260 0x2000 //RX_FDDRC_SLANT_0_1 +261 0x2000 //RX_FDDRC_SLANT_0_2 +262 0x2000 //RX_FDDRC_SLANT_0_3 +263 0x5333 //RX_FDDRC_SLANT_1_0 +264 0x5333 //RX_FDDRC_SLANT_1_1 +265 0x5333 //RX_FDDRC_SLANT_1_2 +266 0x5333 //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +286 0x0100 //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 +#VOL 4 +163 0x3000 //RX_TDDRC_ALPHA_UP_1 +164 0x3000 //RX_TDDRC_ALPHA_UP_2 +165 0x3000 //RX_TDDRC_ALPHA_UP_3 +166 0x3000 //RX_TDDRC_ALPHA_UP_4 +184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +190 0x7FFF //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +269 0x0000 //RX_TDDRC_THRD_0 +270 0x0000 //RX_TDDRC_THRD_1 +271 0x7FFF //RX_TDDRC_THRD_2 +272 0x7FFF //RX_TDDRC_THRD_3 +273 0x7FFF //RX_TDDRC_SLANT_0 +274 0x7FFF //RX_TDDRC_SLANT_1 +275 0x3000 //RX_TDDRC_ALPHA_UP_0 +276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x199A //RX_TDDRC_HMNC_GAIN +279 0x0001 //RX_TDDRC_SMT_FLAG +280 0x0CCD //RX_TDDRC_SMT_W +281 0x0155 //RX_TDDRC_DRC_GAIN +195 0x0020 //RX_FDEQ_SUBNUM +196 0x4848 //RX_FDEQ_GAIN_0 +197 0x4848 //RX_FDEQ_GAIN_1 +198 0x4848 //RX_FDEQ_GAIN_2 +199 0x4848 //RX_FDEQ_GAIN_3 +200 0x4848 //RX_FDEQ_GAIN_4 +201 0x4848 //RX_FDEQ_GAIN_5 +202 0x4848 //RX_FDEQ_GAIN_6 +203 0x4848 //RX_FDEQ_GAIN_7 +204 0x4848 //RX_FDEQ_GAIN_8 +205 0x4848 //RX_FDEQ_GAIN_9 +206 0x4848 //RX_FDEQ_GAIN_10 +207 0x4848 //RX_FDEQ_GAIN_11 +208 0x4848 //RX_FDEQ_GAIN_12 +209 0x4848 //RX_FDEQ_GAIN_13 +210 0x4848 //RX_FDEQ_GAIN_14 +211 0x4848 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0202 //RX_FDEQ_BIN_0 +221 0x0203 //RX_FDEQ_BIN_1 +222 0x0303 //RX_FDEQ_BIN_2 +223 0x0304 //RX_FDEQ_BIN_3 +224 0x0405 //RX_FDEQ_BIN_4 +225 0x0506 //RX_FDEQ_BIN_5 +226 0x0708 //RX_FDEQ_BIN_6 +227 0x090A //RX_FDEQ_BIN_7 +228 0x0B0C //RX_FDEQ_BIN_8 +229 0x0D0E //RX_FDEQ_BIN_9 +230 0x1013 //RX_FDEQ_BIN_10 +231 0x1719 //RX_FDEQ_BIN_11 +232 0x1B1E //RX_FDEQ_BIN_12 +233 0x1E1E //RX_FDEQ_BIN_13 +234 0x1E28 //RX_FDEQ_BIN_14 +235 0x282C //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x4000 //RX_FDEQ_RESRV_0 +245 0x0320 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0030 //RX_FDDRC_BAND_MARGIN_1 +248 0x0050 //RX_FDDRC_BAND_MARGIN_2 +249 0x0080 //RX_FDDRC_BAND_MARGIN_3 +250 0x0007 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x5000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x6400 //RX_FDDRC_THRD_3_2 +258 0x6400 //RX_FDDRC_THRD_3_3 +259 0x2000 //RX_FDDRC_SLANT_0_0 +260 0x2000 //RX_FDDRC_SLANT_0_1 +261 0x2000 //RX_FDDRC_SLANT_0_2 +262 0x2000 //RX_FDDRC_SLANT_0_3 +263 0x5333 //RX_FDDRC_SLANT_1_0 +264 0x5333 //RX_FDDRC_SLANT_1_1 +265 0x5333 //RX_FDDRC_SLANT_1_2 +266 0x5333 //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +286 0x0100 //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 +#VOL 5 +163 0x3000 //RX_TDDRC_ALPHA_UP_1 +164 0x3000 //RX_TDDRC_ALPHA_UP_2 +165 0x3000 //RX_TDDRC_ALPHA_UP_3 +166 0x3000 //RX_TDDRC_ALPHA_UP_4 +184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +190 0x7FFF //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +269 0x0000 //RX_TDDRC_THRD_0 +270 0x0000 //RX_TDDRC_THRD_1 +271 0x7FFF //RX_TDDRC_THRD_2 +272 0x7FFF //RX_TDDRC_THRD_3 +273 0x7FFF //RX_TDDRC_SLANT_0 +274 0x7FFF //RX_TDDRC_SLANT_1 +275 0x3000 //RX_TDDRC_ALPHA_UP_0 +276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x199A //RX_TDDRC_HMNC_GAIN +279 0x0001 //RX_TDDRC_SMT_FLAG +280 0x0CCD //RX_TDDRC_SMT_W +281 0x0155 //RX_TDDRC_DRC_GAIN +195 0x0020 //RX_FDEQ_SUBNUM +196 0x4848 //RX_FDEQ_GAIN_0 +197 0x4848 //RX_FDEQ_GAIN_1 +198 0x4848 //RX_FDEQ_GAIN_2 +199 0x4848 //RX_FDEQ_GAIN_3 +200 0x4848 //RX_FDEQ_GAIN_4 +201 0x4848 //RX_FDEQ_GAIN_5 +202 0x4848 //RX_FDEQ_GAIN_6 +203 0x4848 //RX_FDEQ_GAIN_7 +204 0x4848 //RX_FDEQ_GAIN_8 +205 0x4848 //RX_FDEQ_GAIN_9 +206 0x4848 //RX_FDEQ_GAIN_10 +207 0x4848 //RX_FDEQ_GAIN_11 +208 0x4848 //RX_FDEQ_GAIN_12 +209 0x4848 //RX_FDEQ_GAIN_13 +210 0x4848 //RX_FDEQ_GAIN_14 +211 0x4848 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0202 //RX_FDEQ_BIN_0 +221 0x0203 //RX_FDEQ_BIN_1 +222 0x0303 //RX_FDEQ_BIN_2 +223 0x0304 //RX_FDEQ_BIN_3 +224 0x0405 //RX_FDEQ_BIN_4 +225 0x0506 //RX_FDEQ_BIN_5 +226 0x0708 //RX_FDEQ_BIN_6 +227 0x090A //RX_FDEQ_BIN_7 +228 0x0B0C //RX_FDEQ_BIN_8 +229 0x0D0E //RX_FDEQ_BIN_9 +230 0x1013 //RX_FDEQ_BIN_10 +231 0x1719 //RX_FDEQ_BIN_11 +232 0x1B1E //RX_FDEQ_BIN_12 +233 0x1E1E //RX_FDEQ_BIN_13 +234 0x1E28 //RX_FDEQ_BIN_14 +235 0x282C //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x4000 //RX_FDEQ_RESRV_0 +245 0x0320 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0030 //RX_FDDRC_BAND_MARGIN_1 +248 0x0050 //RX_FDDRC_BAND_MARGIN_2 +249 0x0080 //RX_FDDRC_BAND_MARGIN_3 +250 0x0007 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x5000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x6400 //RX_FDDRC_THRD_3_2 +258 0x6400 //RX_FDDRC_THRD_3_3 +259 0x2000 //RX_FDDRC_SLANT_0_0 +260 0x2000 //RX_FDDRC_SLANT_0_1 +261 0x2000 //RX_FDDRC_SLANT_0_2 +262 0x2000 //RX_FDDRC_SLANT_0_3 +263 0x5333 //RX_FDDRC_SLANT_1_0 +264 0x5333 //RX_FDDRC_SLANT_1_1 +265 0x5333 //RX_FDDRC_SLANT_1_2 +266 0x5333 //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +286 0x0100 //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 +#VOL 6 +163 0x3000 //RX_TDDRC_ALPHA_UP_1 +164 0x3000 //RX_TDDRC_ALPHA_UP_2 +165 0x3000 //RX_TDDRC_ALPHA_UP_3 +166 0x3000 //RX_TDDRC_ALPHA_UP_4 +184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +190 0x7FFF //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +269 0x0000 //RX_TDDRC_THRD_0 +270 0x0000 //RX_TDDRC_THRD_1 +271 0x7FFF //RX_TDDRC_THRD_2 +272 0x7FFF //RX_TDDRC_THRD_3 +273 0x7FFF //RX_TDDRC_SLANT_0 +274 0x7FFF //RX_TDDRC_SLANT_1 +275 0x3000 //RX_TDDRC_ALPHA_UP_0 +276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x199A //RX_TDDRC_HMNC_GAIN +279 0x0001 //RX_TDDRC_SMT_FLAG +280 0x0CCD //RX_TDDRC_SMT_W +281 0x0155 //RX_TDDRC_DRC_GAIN +195 0x0020 //RX_FDEQ_SUBNUM +196 0x4848 //RX_FDEQ_GAIN_0 +197 0x4848 //RX_FDEQ_GAIN_1 +198 0x4848 //RX_FDEQ_GAIN_2 +199 0x4848 //RX_FDEQ_GAIN_3 +200 0x4848 //RX_FDEQ_GAIN_4 +201 0x4848 //RX_FDEQ_GAIN_5 +202 0x4848 //RX_FDEQ_GAIN_6 +203 0x4848 //RX_FDEQ_GAIN_7 +204 0x4848 //RX_FDEQ_GAIN_8 +205 0x4848 //RX_FDEQ_GAIN_9 +206 0x4848 //RX_FDEQ_GAIN_10 +207 0x4848 //RX_FDEQ_GAIN_11 +208 0x4848 //RX_FDEQ_GAIN_12 +209 0x4848 //RX_FDEQ_GAIN_13 +210 0x4848 //RX_FDEQ_GAIN_14 +211 0x4848 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0202 //RX_FDEQ_BIN_0 +221 0x0203 //RX_FDEQ_BIN_1 +222 0x0303 //RX_FDEQ_BIN_2 +223 0x0304 //RX_FDEQ_BIN_3 +224 0x0405 //RX_FDEQ_BIN_4 +225 0x0506 //RX_FDEQ_BIN_5 +226 0x0708 //RX_FDEQ_BIN_6 +227 0x090A //RX_FDEQ_BIN_7 +228 0x0B0C //RX_FDEQ_BIN_8 +229 0x0D0E //RX_FDEQ_BIN_9 +230 0x1013 //RX_FDEQ_BIN_10 +231 0x1719 //RX_FDEQ_BIN_11 +232 0x1B1E //RX_FDEQ_BIN_12 +233 0x1E1E //RX_FDEQ_BIN_13 +234 0x1E28 //RX_FDEQ_BIN_14 +235 0x282C //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x4000 //RX_FDEQ_RESRV_0 +245 0x0320 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0030 //RX_FDDRC_BAND_MARGIN_1 +248 0x0050 //RX_FDDRC_BAND_MARGIN_2 +249 0x0080 //RX_FDDRC_BAND_MARGIN_3 +250 0x0007 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x5000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x6400 //RX_FDDRC_THRD_3_2 +258 0x6400 //RX_FDDRC_THRD_3_3 +259 0x2000 //RX_FDDRC_SLANT_0_0 +260 0x2000 //RX_FDDRC_SLANT_0_1 +261 0x2000 //RX_FDDRC_SLANT_0_2 +262 0x2000 //RX_FDDRC_SLANT_0_3 +263 0x5333 //RX_FDDRC_SLANT_1_0 +264 0x5333 //RX_FDDRC_SLANT_1_1 +265 0x5333 //RX_FDDRC_SLANT_1_2 +266 0x5333 //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +286 0x0100 //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 #CASE_NAME BLUETOOTH-BTWB_NREC-VOICE_GENERIC-FB -#PARAM_TYPE TX+RX -#TOTAL_CUSTOM_STEP 7 +#PARAM_MODE Full +#PARAM_TYPE TX+2RX +#TOTAL_CUSTOM_STEP 7+7 #TX 0 0x0009 //TX_OPERATION_MODE_0 1 0x0009 //TX_OPERATION_MODE_1 @@ -35318,10 +53659,10 @@ 248 0xF600 //TX_THR_SN_EST_6 249 0xF600 //TX_THR_SN_EST_7 250 0x0200 //TX_DELTA_THR_SN_EST_0 -251 0x0200 //TX_DELTA_THR_SN_EST_1 -252 0x0400 //TX_DELTA_THR_SN_EST_2 -253 0x0300 //TX_DELTA_THR_SN_EST_3 -254 0x0600 //TX_DELTA_THR_SN_EST_4 +251 0x0400 //TX_DELTA_THR_SN_EST_1 +252 0x0300 //TX_DELTA_THR_SN_EST_2 +253 0x0600 //TX_DELTA_THR_SN_EST_3 +254 0x0200 //TX_DELTA_THR_SN_EST_4 255 0x0200 //TX_DELTA_THR_SN_EST_5 256 0x0200 //TX_DELTA_THR_SN_EST_6 257 0x0200 //TX_DELTA_THR_SN_EST_7 @@ -35349,31 +53690,31 @@ 279 0x2000 //TX_B_POST_FLT_0 280 0x2000 //TX_B_POST_FLT_1 281 0x0012 //TX_NS_LVL_CTRL_0 -282 0x0019 //TX_NS_LVL_CTRL_1 +282 0x0016 //TX_NS_LVL_CTRL_1 283 0x0016 //TX_NS_LVL_CTRL_2 -284 0x0016 //TX_NS_LVL_CTRL_3 -285 0x0019 //TX_NS_LVL_CTRL_4 +284 0x0019 //TX_NS_LVL_CTRL_3 +285 0x0010 //TX_NS_LVL_CTRL_4 286 0x0010 //TX_NS_LVL_CTRL_5 -287 0x0010 //TX_NS_LVL_CTRL_6 +287 0x0019 //TX_NS_LVL_CTRL_6 288 0x0010 //TX_NS_LVL_CTRL_7 289 0x000C //TX_MIN_GAIN_S_0 -290 0x0011 //TX_MIN_GAIN_S_1 +290 0x000C //TX_MIN_GAIN_S_1 291 0x000C //TX_MIN_GAIN_S_2 -292 0x000C //TX_MIN_GAIN_S_3 -293 0x000F //TX_MIN_GAIN_S_4 +292 0x000F //TX_MIN_GAIN_S_3 +293 0x000C //TX_MIN_GAIN_S_4 294 0x000C //TX_MIN_GAIN_S_5 -295 0x000C //TX_MIN_GAIN_S_6 +295 0x0011 //TX_MIN_GAIN_S_6 296 0x000C //TX_MIN_GAIN_S_7 297 0x7FFF //TX_NMOS_SUP 298 0x0000 //TX_NS_MAX_PRI_SNR_TH 299 0x0000 //TX_NMOS_SUP_MENSA 300 0x7000 //TX_SNRI_SUP_0 -301 0x6000 //TX_SNRI_SUP_1 +301 0x7000 //TX_SNRI_SUP_1 302 0x7000 //TX_SNRI_SUP_2 -303 0x7000 //TX_SNRI_SUP_3 -304 0x6000 //TX_SNRI_SUP_4 +303 0x6000 //TX_SNRI_SUP_3 +304 0x7FFF //TX_SNRI_SUP_4 305 0x7FFF //TX_SNRI_SUP_5 -306 0x7FFF //TX_SNRI_SUP_6 +306 0x6000 //TX_SNRI_SUP_6 307 0x7FFF //TX_SNRI_SUP_7 308 0x7FFF //TX_THR_LFNS 309 0x0016 //TX_G_LFNS @@ -35390,8 +53731,8 @@ 320 0x6000 //TX_A_POST_FILT_S_6 321 0x6000 //TX_A_POST_FILT_S_7 322 0x2000 //TX_B_POST_FILT_0 -323 0x2000 //TX_B_POST_FILT_1 -324 0x4000 //TX_B_POST_FILT_2 +323 0x4000 //TX_B_POST_FILT_1 +324 0x2000 //TX_B_POST_FILT_2 325 0x2000 //TX_B_POST_FILT_3 326 0x2000 //TX_B_POST_FILT_4 327 0x2000 //TX_B_POST_FILT_5 @@ -35447,10 +53788,10 @@ 377 0x0000 //TX_NOISE_TH_5_4 378 0x02BC //TX_NOISE_TH_6 379 0x0020 //TX_MINENOISE_TH -380 0x4000 //TX_MINENOISE_MIC0_TH_MTS -381 0xFFEE //TX_MINENOISE_MIC0_TH_EXP -382 0x6000 //TX_MINENOISE_MIC0_S_TH_MTS -383 0xFFF3 //TX_MINENOISE_MIC0_S_TH_EXP +380 0x4000 //TX_MORENS_TFMASK_TH +381 0xFFEE //TX_DRC_QUIET_FLOOR +382 0x6000 //TX_RATIODTL_CUT_TH +383 0xFFF3 //TX_DT_CUT_K1 384 0x0666 //TX_OUT_ENER_S_TH_CLEAN 385 0x0666 //TX_OUT_ENER_S_TH_LESSCLEAN 386 0x0333 //TX_OUT_ENER_S_TH_NOISY @@ -35458,15 +53799,15 @@ 388 0x0333 //TX_OUT_ENER_TH_SPEECH 389 0x2000 //TX_SN_NPB_GAIN 390 0x0000 //TX_NN_NPB_GAIN -391 0x0000 //TX_CSX_ALPHA_0 -392 0x0000 //TX_CSX_ALPHA_1 -393 0x0000 //TX_CSX_ALPHA_2 -394 0x0000 //TX_CSX_ALPHA_3 -395 0x0800 //TX_MU_ARSP_EST -396 0x00C8 //TX_P_OUTBEAM_MIN_TH +391 0x0000 //TX_POST_MASK_SUP_HSNE +392 0x0000 //TX_TAIL_DET_TH +393 0x0000 //TX_B_LESSCUT_RTO_WTA +394 0x0000 //TX_MEL_G_R +395 0x0800 //TX_SUPHIGH_TH +396 0x00C8 //TX_MASK_G_R 397 0x0002 //TX_EXTRA_NS_L -398 0x0800 //TX_EXTRA_NS_A -399 0x0005 //TX_VR_NOISE_FLOOR_TH +398 0x0800 //TX_C_POST_FLT_MASK +399 0x0005 //TX_A_POST_FLT_WNS 400 0x0148 //TX_MIN_G_LOW300HZ 401 0x0002 //TX_MAXLEVEL_CNG 402 0x00B4 //TX_STN_NOISE_TH @@ -35581,16 +53922,16 @@ 511 0x6666 //TX_MIC_TO_BFGAIN 512 0x0000 //TX_MICTOBFGAIN0 513 0x0000 //TX_FASTMUE_TH -514 0x0000 //TX_DERVB_LEN_0 -515 0x0000 //TX_DERVB_LEN_1 -516 0x0000 //TX_RHO_DERVB -517 0x0000 //TX_MIC_INDX_DERVB -518 0x0000 //TX_MU_DERVB -519 0x0000 //TX_DR_RESRV_0 -520 0x0000 //TX_DR_RESRV_1 -521 0x0000 //TX_DR_RESRV_2 -522 0x0000 //TX_DR_RESRV_3 -523 0x0000 //TX_DR_RESRV_4 +514 0x0000 //TX_DEREVERB_LF_MU +515 0x0000 //TX_DEREVERB_HF_MU +516 0x0000 //TX_DEREVERB_DELAY +517 0x0000 //TX_DEREVERB_COEF_LEN +518 0x0000 //TX_DEREVERB_DNR +519 0x0000 //TX_DEREVERB_ALPHA +520 0x0000 //TX_DEREVERB_BETA +521 0x0000 //TX_GSC_RTOL_TH +522 0x0000 //TX_GSC_RTOH_TH +523 0x0000 //TX_WIDE2_MEANHTH 524 0x0000 //TX_DR_RESRV_5 525 0x0000 //TX_DR_RESRV_6 526 0x0000 //TX_DR_RESRV_7 @@ -35964,8 +54305,73 @@ 894 0xC000 //TX_FASTNS_SSA_THHFL 895 0xCCCC //TX_FASTNS_SSA_THLFH 896 0xD999 //TX_FASTNS_SSA_THHFH +897 0x0000 //TX_SENDFUNC_REG_MICMUTE +898 0x0000 //TX_SENDFUNC_REG_MICMUTE1 +899 0x0000 //TX_MICMUTE_RATIO_THR +900 0x0000 //TX_MICMUTE_AMP_THR +901 0x0000 //TX_MICMUTE_HPF_IND +902 0x0000 //TX_MICMUTE_LOG_EYR_TH +903 0x0000 //TX_MICMUTE_CVG_TIME +904 0x0000 //TX_MICMUTE_RELEASE_TIME +905 0x0000 //TX_MIC_VOLUME_MIC0MUTE +906 0x0000 //TX_MICMUTE_EPD_OFFSET_0 +907 0x0000 //TX_MICMUTE_FRQ_AEC_L +908 0x0000 //TX_MICMUTE_EAD_THR +909 0x0000 //TX_MICMUTE_LAMBDA_CB_NLE +910 0x0000 //TX_MICMUTE_LAMBDA_RE_EST +911 0x0000 //TX_DTD_THR1_MICMUTE_0 +912 0x0000 //TX_DTD_THR1_MICMUTE_1 +913 0x0000 //TX_DTD_THR1_MICMUTE_2 +914 0x0000 //TX_DTD_THR1_MICMUTE_3 +915 0x0000 //TX_DTD_THR2_MICMUTE_0 +916 0x0000 //TX_MICMUTE_MIN_EQ_RE_EST_0 +917 0x0000 //TX_MICMUTE_MIN_EQ_RE_EST_1 +918 0x0000 //TX_MICMUTE_MIN_EQ_RE_EST_2 +919 0x0000 //TX_MICMUTE_MIN_EQ_RE_EST_3 +920 0x0000 //TX_MICMUTE_MIN_EQ_RE_EST_4 +921 0x0000 //TX_MICMUTE_C_POST_FLT +922 0x0000 //TX_MICMUTE_DT_CUT_K +923 0x0000 //TX_MICMUTE_DT_CUT_THR +924 0x0000 //TX_MICMUTE_DT_CUT_K2 +925 0x0000 //TX_MICMUTE_DT_CUT_THR2 +926 0x0000 //TX_MICMUTE_DT2_HOLD_N +927 0x0000 //TX_MICMUTE_RATIODTH_THCUT +928 0x0000 //TX_MICMUTE_B_POST_FLT_ECHOL +929 0x0000 //TX_MICMUTE_B_POST_FLT_ECHOH +930 0x0000 //TX_MICMUTE_C_POST_FLT_MASK +931 0x0000 //TX_MICMUTE_RATIODTL_CUT_TH +932 0x0000 //TX_MICMUTE_DT_CUT_K1 +933 0x0000 //TX_MICMUTE_N2_SN_EST +934 0x0000 //TX_MICMUTE_THR_SN_EST_0 +935 0x0000 //TX_MICMUTE_MIN_G_CTRL_0 +936 0x0000 //TX_MICMUTE_A_POST_FILT_S_0 +937 0x0000 //TX_MICMUTE_B_POST_FILT_0 +938 0x0000 //TX_MIC1RUB_AMP_THR +939 0x0000 //TX_MIC1MUTE_RATIO_THR +940 0x0000 //TX_MIC1MUTE_AMP_THR +941 0x0000 //TX_MIC1MUTE_CVG_TIME +942 0x0000 //TX_MIC1MUTE_RELEASE_TIME +943 0x0000 //TX_AMS_RESRV_01 +944 0x0000 //TX_AMS_RESRV_02 +945 0x0000 //TX_AMS_RESRV_03 +946 0x0000 //TX_AMS_RESRV_04 +947 0x0000 //TX_AMS_RESRV_05 +948 0x0000 //TX_AMS_RESRV_06 +949 0x0000 //TX_AMS_RESRV_07 +950 0x0000 //TX_AMS_RESRV_08 +951 0x0000 //TX_AMS_RESRV_09 +952 0x0000 //TX_AMS_RESRV_10 +953 0x0000 //TX_AMS_RESRV_11 +954 0x0000 //TX_AMS_RESRV_12 +955 0x0000 //TX_AMS_RESRV_13 +956 0x0000 //TX_AMS_RESRV_14 +957 0x0000 //TX_AMS_RESRV_15 +958 0x0000 //TX_AMS_RESRV_16 +959 0x0000 //TX_AMS_RESRV_17 +960 0x0000 //TX_AMS_RESRV_18 +961 0x0000 //TX_AMS_RESRV_19 #RX -0 0x0064 //RX_RECVFUNC_MODE_0 +0 0x2064 //RX_RECVFUNC_MODE_0 1 0x0000 //RX_RECVFUNC_MODE_1 2 0x0004 //RX_SAMPLINGFREQ_SIG 3 0x0004 //RX_SAMPLINGFREQ_PROC @@ -36815,4 +55221,855 @@ 110 0x0000 //RX_FDDRC_RESRV_0 129 0x0100 //RX_SPK_VOL 130 0x0000 //RX_VOL_RESRV_0 +#RX 2 +157 0x0064 //RX_RECVFUNC_MODE_0 +158 0x0000 //RX_RECVFUNC_MODE_1 +159 0x0004 //RX_SAMPLINGFREQ_SIG +160 0x0004 //RX_SAMPLINGFREQ_PROC +161 0x000A //RX_FRAME_SZ +162 0x0000 //RX_DELAY_OPT +163 0x1000 //RX_TDDRC_ALPHA_UP_1 +164 0x1000 //RX_TDDRC_ALPHA_UP_2 +165 0x1000 //RX_TDDRC_ALPHA_UP_3 +166 0x1000 //RX_TDDRC_ALPHA_UP_4 +167 0x0800 //RX_PGA +168 0x7FFF //RX_A_HP +169 0x4000 //RX_B_PE +170 0x7800 //RX_THR_PITCH_DET_0 +171 0x7000 //RX_THR_PITCH_DET_1 +172 0x6000 //RX_THR_PITCH_DET_2 +173 0x0008 //RX_PITCH_BFR_LEN +174 0x0003 //RX_SBD_PITCH_DET +175 0x0100 //RX_PP_RESRV_0 +176 0x0020 //RX_PP_RESRV_1 +177 0x0500 //RX_N_SN_EST +178 0x000C //RX_N2_SN_EST +179 0x000A //RX_NS_LVL_CTRL +180 0xF600 //RX_THR_SN_EST +181 0x7000 //RX_LAMBDA_PFILT +182 0x000A //RX_FENS_RESRV_0 +183 0x0190 //RX_FENS_RESRV_1 +184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +187 0x0002 //RX_EXTRA_NS_L +188 0x0800 //RX_EXTRA_NS_A +189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +190 0x7FFF //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +192 0x199A //RX_A_POST_FLT +193 0x0000 //RX_LMT_THRD +194 0x4000 //RX_LMT_ALPHA +195 0x0020 //RX_FDEQ_SUBNUM +196 0x4848 //RX_FDEQ_GAIN_0 +197 0x4848 //RX_FDEQ_GAIN_1 +198 0x4848 //RX_FDEQ_GAIN_2 +199 0x4848 //RX_FDEQ_GAIN_3 +200 0x4848 //RX_FDEQ_GAIN_4 +201 0x4848 //RX_FDEQ_GAIN_5 +202 0x4848 //RX_FDEQ_GAIN_6 +203 0x4848 //RX_FDEQ_GAIN_7 +204 0x4848 //RX_FDEQ_GAIN_8 +205 0x4848 //RX_FDEQ_GAIN_9 +206 0x4848 //RX_FDEQ_GAIN_10 +207 0x4848 //RX_FDEQ_GAIN_11 +208 0x4848 //RX_FDEQ_GAIN_12 +209 0x4848 //RX_FDEQ_GAIN_13 +210 0x4848 //RX_FDEQ_GAIN_14 +211 0x4848 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0202 //RX_FDEQ_BIN_0 +221 0x0203 //RX_FDEQ_BIN_1 +222 0x0304 //RX_FDEQ_BIN_2 +223 0x0405 //RX_FDEQ_BIN_3 +224 0x0607 //RX_FDEQ_BIN_4 +225 0x0809 //RX_FDEQ_BIN_5 +226 0x0A0B //RX_FDEQ_BIN_6 +227 0x0C0D //RX_FDEQ_BIN_7 +228 0x0E0F //RX_FDEQ_BIN_8 +229 0x1011 //RX_FDEQ_BIN_9 +230 0x1214 //RX_FDEQ_BIN_10 +231 0x1618 //RX_FDEQ_BIN_11 +232 0x1C1C //RX_FDEQ_BIN_12 +233 0x2020 //RX_FDEQ_BIN_13 +234 0x2020 //RX_FDEQ_BIN_14 +235 0x2011 //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x4000 //RX_FDEQ_RESRV_0 +245 0x0320 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0030 //RX_FDDRC_BAND_MARGIN_1 +248 0x0050 //RX_FDDRC_BAND_MARGIN_2 +249 0x0080 //RX_FDDRC_BAND_MARGIN_3 +250 0x0007 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x5000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x6400 //RX_FDDRC_THRD_3_2 +258 0x6400 //RX_FDDRC_THRD_3_3 +259 0x2000 //RX_FDDRC_SLANT_0_0 +260 0x2000 //RX_FDDRC_SLANT_0_1 +261 0x2000 //RX_FDDRC_SLANT_0_2 +262 0x2000 //RX_FDDRC_SLANT_0_3 +263 0x5333 //RX_FDDRC_SLANT_1_0 +264 0x5333 //RX_FDDRC_SLANT_1_1 +265 0x5333 //RX_FDDRC_SLANT_1_2 +266 0x5333 //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +268 0x0000 //RX_FILTINDX +269 0x0000 //RX_TDDRC_THRD_0 +270 0x0000 //RX_TDDRC_THRD_1 +271 0x7FFF //RX_TDDRC_THRD_2 +272 0x7FFF //RX_TDDRC_THRD_3 +273 0x7FFF //RX_TDDRC_SLANT_0 +274 0x7FFF //RX_TDDRC_SLANT_1 +275 0x1000 //RX_TDDRC_ALPHA_UP_0 +276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x199A //RX_TDDRC_HMNC_GAIN +279 0x0001 //RX_TDDRC_SMT_FLAG +280 0x0CCD //RX_TDDRC_SMT_W +281 0x0155 //RX_TDDRC_DRC_GAIN +282 0x7C00 //RX_LAMBDA_PKA_FP +283 0x2000 //RX_TPKA_FP +284 0x2000 //RX_MIN_G_FP +285 0x0080 //RX_MAX_G_FP +286 0x0100 //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 +288 0x0000 //RX_MAXLEVEL_CNG +289 0x3000 //RX_BWE_UV_TH +290 0x3000 //RX_BWE_UV_TH2 +291 0x1800 //RX_BWE_UV_TH3 +292 0x1000 //RX_BWE_V_TH +293 0x04CD //RX_BWE_GAIN1_V_TH1 +294 0x0F33 //RX_BWE_GAIN1_V_TH2 +295 0x7333 //RX_BWE_UV_EQ +296 0x199A //RX_BWE_V_EQ +297 0x7333 //RX_BWE_TONE_TH +298 0x0004 //RX_BWE_UV_HOLD_T +299 0x6CCD //RX_BWE_GAIN2_ALPHA +300 0x799A //RX_BWE_GAIN3_ALPHA +301 0x001E //RX_BWE_CUTOFF +302 0x3000 //RX_BWE_GAINFILL +303 0x3200 //RX_BWE_MAXTH_TONE +304 0x2000 //RX_BWE_EQ_0 +305 0x2000 //RX_BWE_EQ_1 +306 0x2000 //RX_BWE_EQ_2 +307 0x2000 //RX_BWE_EQ_3 +308 0x2000 //RX_BWE_EQ_4 +309 0x2000 //RX_BWE_EQ_5 +310 0x2000 //RX_BWE_EQ_6 +311 0x0000 //RX_BWE_RESRV_0 +312 0x0000 //RX_BWE_RESRV_1 +313 0x0000 //RX_BWE_RESRV_2 +#VOL 0 +163 0x1000 //RX_TDDRC_ALPHA_UP_1 +164 0x1000 //RX_TDDRC_ALPHA_UP_2 +165 0x1000 //RX_TDDRC_ALPHA_UP_3 +166 0x1000 //RX_TDDRC_ALPHA_UP_4 +184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +190 0x7FFF //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +269 0x0000 //RX_TDDRC_THRD_0 +270 0x0000 //RX_TDDRC_THRD_1 +271 0x7FFF //RX_TDDRC_THRD_2 +272 0x7FFF //RX_TDDRC_THRD_3 +273 0x7FFF //RX_TDDRC_SLANT_0 +274 0x7FFF //RX_TDDRC_SLANT_1 +275 0x1000 //RX_TDDRC_ALPHA_UP_0 +276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x199A //RX_TDDRC_HMNC_GAIN +279 0x0001 //RX_TDDRC_SMT_FLAG +280 0x0CCD //RX_TDDRC_SMT_W +281 0x0155 //RX_TDDRC_DRC_GAIN +195 0x0020 //RX_FDEQ_SUBNUM +196 0x4848 //RX_FDEQ_GAIN_0 +197 0x4848 //RX_FDEQ_GAIN_1 +198 0x4848 //RX_FDEQ_GAIN_2 +199 0x4848 //RX_FDEQ_GAIN_3 +200 0x4848 //RX_FDEQ_GAIN_4 +201 0x4848 //RX_FDEQ_GAIN_5 +202 0x4848 //RX_FDEQ_GAIN_6 +203 0x4848 //RX_FDEQ_GAIN_7 +204 0x4848 //RX_FDEQ_GAIN_8 +205 0x4848 //RX_FDEQ_GAIN_9 +206 0x4848 //RX_FDEQ_GAIN_10 +207 0x4848 //RX_FDEQ_GAIN_11 +208 0x4848 //RX_FDEQ_GAIN_12 +209 0x4848 //RX_FDEQ_GAIN_13 +210 0x4848 //RX_FDEQ_GAIN_14 +211 0x4848 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0202 //RX_FDEQ_BIN_0 +221 0x0203 //RX_FDEQ_BIN_1 +222 0x0304 //RX_FDEQ_BIN_2 +223 0x0405 //RX_FDEQ_BIN_3 +224 0x0607 //RX_FDEQ_BIN_4 +225 0x0809 //RX_FDEQ_BIN_5 +226 0x0A0B //RX_FDEQ_BIN_6 +227 0x0C0D //RX_FDEQ_BIN_7 +228 0x0E0F //RX_FDEQ_BIN_8 +229 0x1011 //RX_FDEQ_BIN_9 +230 0x1214 //RX_FDEQ_BIN_10 +231 0x1618 //RX_FDEQ_BIN_11 +232 0x1C1C //RX_FDEQ_BIN_12 +233 0x2020 //RX_FDEQ_BIN_13 +234 0x2020 //RX_FDEQ_BIN_14 +235 0x2011 //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x4000 //RX_FDEQ_RESRV_0 +245 0x0320 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0030 //RX_FDDRC_BAND_MARGIN_1 +248 0x0050 //RX_FDDRC_BAND_MARGIN_2 +249 0x0080 //RX_FDDRC_BAND_MARGIN_3 +250 0x0007 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x5000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x6400 //RX_FDDRC_THRD_3_2 +258 0x6400 //RX_FDDRC_THRD_3_3 +259 0x2000 //RX_FDDRC_SLANT_0_0 +260 0x2000 //RX_FDDRC_SLANT_0_1 +261 0x2000 //RX_FDDRC_SLANT_0_2 +262 0x2000 //RX_FDDRC_SLANT_0_3 +263 0x5333 //RX_FDDRC_SLANT_1_0 +264 0x5333 //RX_FDDRC_SLANT_1_1 +265 0x5333 //RX_FDDRC_SLANT_1_2 +266 0x5333 //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +286 0x0100 //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 +#VOL 1 +163 0x1000 //RX_TDDRC_ALPHA_UP_1 +164 0x1000 //RX_TDDRC_ALPHA_UP_2 +165 0x1000 //RX_TDDRC_ALPHA_UP_3 +166 0x1000 //RX_TDDRC_ALPHA_UP_4 +184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +190 0x7FFF //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +269 0x0000 //RX_TDDRC_THRD_0 +270 0x0000 //RX_TDDRC_THRD_1 +271 0x7FFF //RX_TDDRC_THRD_2 +272 0x7FFF //RX_TDDRC_THRD_3 +273 0x7FFF //RX_TDDRC_SLANT_0 +274 0x7FFF //RX_TDDRC_SLANT_1 +275 0x1000 //RX_TDDRC_ALPHA_UP_0 +276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x199A //RX_TDDRC_HMNC_GAIN +279 0x0001 //RX_TDDRC_SMT_FLAG +280 0x0CCD //RX_TDDRC_SMT_W +281 0x0155 //RX_TDDRC_DRC_GAIN +195 0x0020 //RX_FDEQ_SUBNUM +196 0x4848 //RX_FDEQ_GAIN_0 +197 0x4848 //RX_FDEQ_GAIN_1 +198 0x4848 //RX_FDEQ_GAIN_2 +199 0x4848 //RX_FDEQ_GAIN_3 +200 0x4848 //RX_FDEQ_GAIN_4 +201 0x4848 //RX_FDEQ_GAIN_5 +202 0x4848 //RX_FDEQ_GAIN_6 +203 0x4848 //RX_FDEQ_GAIN_7 +204 0x4848 //RX_FDEQ_GAIN_8 +205 0x4848 //RX_FDEQ_GAIN_9 +206 0x4848 //RX_FDEQ_GAIN_10 +207 0x4848 //RX_FDEQ_GAIN_11 +208 0x4848 //RX_FDEQ_GAIN_12 +209 0x4848 //RX_FDEQ_GAIN_13 +210 0x4848 //RX_FDEQ_GAIN_14 +211 0x4848 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0202 //RX_FDEQ_BIN_0 +221 0x0203 //RX_FDEQ_BIN_1 +222 0x0304 //RX_FDEQ_BIN_2 +223 0x0405 //RX_FDEQ_BIN_3 +224 0x0607 //RX_FDEQ_BIN_4 +225 0x0809 //RX_FDEQ_BIN_5 +226 0x0A0B //RX_FDEQ_BIN_6 +227 0x0C0D //RX_FDEQ_BIN_7 +228 0x0E0F //RX_FDEQ_BIN_8 +229 0x1011 //RX_FDEQ_BIN_9 +230 0x1214 //RX_FDEQ_BIN_10 +231 0x1618 //RX_FDEQ_BIN_11 +232 0x1C1C //RX_FDEQ_BIN_12 +233 0x2020 //RX_FDEQ_BIN_13 +234 0x2020 //RX_FDEQ_BIN_14 +235 0x2011 //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x4000 //RX_FDEQ_RESRV_0 +245 0x0320 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0030 //RX_FDDRC_BAND_MARGIN_1 +248 0x0050 //RX_FDDRC_BAND_MARGIN_2 +249 0x0080 //RX_FDDRC_BAND_MARGIN_3 +250 0x0007 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x5000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x6400 //RX_FDDRC_THRD_3_2 +258 0x6400 //RX_FDDRC_THRD_3_3 +259 0x2000 //RX_FDDRC_SLANT_0_0 +260 0x2000 //RX_FDDRC_SLANT_0_1 +261 0x2000 //RX_FDDRC_SLANT_0_2 +262 0x2000 //RX_FDDRC_SLANT_0_3 +263 0x5333 //RX_FDDRC_SLANT_1_0 +264 0x5333 //RX_FDDRC_SLANT_1_1 +265 0x5333 //RX_FDDRC_SLANT_1_2 +266 0x5333 //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +286 0x0100 //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 +#VOL 2 +163 0x1000 //RX_TDDRC_ALPHA_UP_1 +164 0x1000 //RX_TDDRC_ALPHA_UP_2 +165 0x1000 //RX_TDDRC_ALPHA_UP_3 +166 0x1000 //RX_TDDRC_ALPHA_UP_4 +184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +190 0x7FFF //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +269 0x0000 //RX_TDDRC_THRD_0 +270 0x0000 //RX_TDDRC_THRD_1 +271 0x7FFF //RX_TDDRC_THRD_2 +272 0x7FFF //RX_TDDRC_THRD_3 +273 0x7FFF //RX_TDDRC_SLANT_0 +274 0x7FFF //RX_TDDRC_SLANT_1 +275 0x1000 //RX_TDDRC_ALPHA_UP_0 +276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x199A //RX_TDDRC_HMNC_GAIN +279 0x0001 //RX_TDDRC_SMT_FLAG +280 0x0CCD //RX_TDDRC_SMT_W +281 0x0155 //RX_TDDRC_DRC_GAIN +195 0x0020 //RX_FDEQ_SUBNUM +196 0x4848 //RX_FDEQ_GAIN_0 +197 0x4848 //RX_FDEQ_GAIN_1 +198 0x4848 //RX_FDEQ_GAIN_2 +199 0x4848 //RX_FDEQ_GAIN_3 +200 0x4848 //RX_FDEQ_GAIN_4 +201 0x4848 //RX_FDEQ_GAIN_5 +202 0x4848 //RX_FDEQ_GAIN_6 +203 0x4848 //RX_FDEQ_GAIN_7 +204 0x4848 //RX_FDEQ_GAIN_8 +205 0x4848 //RX_FDEQ_GAIN_9 +206 0x4848 //RX_FDEQ_GAIN_10 +207 0x4848 //RX_FDEQ_GAIN_11 +208 0x4848 //RX_FDEQ_GAIN_12 +209 0x4848 //RX_FDEQ_GAIN_13 +210 0x4848 //RX_FDEQ_GAIN_14 +211 0x4848 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0202 //RX_FDEQ_BIN_0 +221 0x0203 //RX_FDEQ_BIN_1 +222 0x0304 //RX_FDEQ_BIN_2 +223 0x0405 //RX_FDEQ_BIN_3 +224 0x0607 //RX_FDEQ_BIN_4 +225 0x0809 //RX_FDEQ_BIN_5 +226 0x0A0B //RX_FDEQ_BIN_6 +227 0x0C0D //RX_FDEQ_BIN_7 +228 0x0E0F //RX_FDEQ_BIN_8 +229 0x1011 //RX_FDEQ_BIN_9 +230 0x1214 //RX_FDEQ_BIN_10 +231 0x1618 //RX_FDEQ_BIN_11 +232 0x1C1C //RX_FDEQ_BIN_12 +233 0x2020 //RX_FDEQ_BIN_13 +234 0x2020 //RX_FDEQ_BIN_14 +235 0x2011 //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x4000 //RX_FDEQ_RESRV_0 +245 0x0320 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0030 //RX_FDDRC_BAND_MARGIN_1 +248 0x0050 //RX_FDDRC_BAND_MARGIN_2 +249 0x0080 //RX_FDDRC_BAND_MARGIN_3 +250 0x0007 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x5000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x6400 //RX_FDDRC_THRD_3_2 +258 0x6400 //RX_FDDRC_THRD_3_3 +259 0x2000 //RX_FDDRC_SLANT_0_0 +260 0x2000 //RX_FDDRC_SLANT_0_1 +261 0x2000 //RX_FDDRC_SLANT_0_2 +262 0x2000 //RX_FDDRC_SLANT_0_3 +263 0x5333 //RX_FDDRC_SLANT_1_0 +264 0x5333 //RX_FDDRC_SLANT_1_1 +265 0x5333 //RX_FDDRC_SLANT_1_2 +266 0x5333 //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +286 0x0100 //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 +#VOL 3 +163 0x1000 //RX_TDDRC_ALPHA_UP_1 +164 0x1000 //RX_TDDRC_ALPHA_UP_2 +165 0x1000 //RX_TDDRC_ALPHA_UP_3 +166 0x1000 //RX_TDDRC_ALPHA_UP_4 +184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +190 0x7FFF //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +269 0x0000 //RX_TDDRC_THRD_0 +270 0x0000 //RX_TDDRC_THRD_1 +271 0x7FFF //RX_TDDRC_THRD_2 +272 0x7FFF //RX_TDDRC_THRD_3 +273 0x7FFF //RX_TDDRC_SLANT_0 +274 0x7FFF //RX_TDDRC_SLANT_1 +275 0x1000 //RX_TDDRC_ALPHA_UP_0 +276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x199A //RX_TDDRC_HMNC_GAIN +279 0x0001 //RX_TDDRC_SMT_FLAG +280 0x0CCD //RX_TDDRC_SMT_W +281 0x0155 //RX_TDDRC_DRC_GAIN +195 0x0020 //RX_FDEQ_SUBNUM +196 0x4848 //RX_FDEQ_GAIN_0 +197 0x4848 //RX_FDEQ_GAIN_1 +198 0x4848 //RX_FDEQ_GAIN_2 +199 0x4848 //RX_FDEQ_GAIN_3 +200 0x4848 //RX_FDEQ_GAIN_4 +201 0x4848 //RX_FDEQ_GAIN_5 +202 0x4848 //RX_FDEQ_GAIN_6 +203 0x4848 //RX_FDEQ_GAIN_7 +204 0x4848 //RX_FDEQ_GAIN_8 +205 0x4848 //RX_FDEQ_GAIN_9 +206 0x4848 //RX_FDEQ_GAIN_10 +207 0x4848 //RX_FDEQ_GAIN_11 +208 0x4848 //RX_FDEQ_GAIN_12 +209 0x4848 //RX_FDEQ_GAIN_13 +210 0x4848 //RX_FDEQ_GAIN_14 +211 0x4848 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0202 //RX_FDEQ_BIN_0 +221 0x0203 //RX_FDEQ_BIN_1 +222 0x0304 //RX_FDEQ_BIN_2 +223 0x0405 //RX_FDEQ_BIN_3 +224 0x0607 //RX_FDEQ_BIN_4 +225 0x0809 //RX_FDEQ_BIN_5 +226 0x0A0B //RX_FDEQ_BIN_6 +227 0x0C0D //RX_FDEQ_BIN_7 +228 0x0E0F //RX_FDEQ_BIN_8 +229 0x1011 //RX_FDEQ_BIN_9 +230 0x1214 //RX_FDEQ_BIN_10 +231 0x1618 //RX_FDEQ_BIN_11 +232 0x1C1C //RX_FDEQ_BIN_12 +233 0x2020 //RX_FDEQ_BIN_13 +234 0x2020 //RX_FDEQ_BIN_14 +235 0x2011 //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x4000 //RX_FDEQ_RESRV_0 +245 0x0320 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0030 //RX_FDDRC_BAND_MARGIN_1 +248 0x0050 //RX_FDDRC_BAND_MARGIN_2 +249 0x0080 //RX_FDDRC_BAND_MARGIN_3 +250 0x0007 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x5000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x6400 //RX_FDDRC_THRD_3_2 +258 0x6400 //RX_FDDRC_THRD_3_3 +259 0x2000 //RX_FDDRC_SLANT_0_0 +260 0x2000 //RX_FDDRC_SLANT_0_1 +261 0x2000 //RX_FDDRC_SLANT_0_2 +262 0x2000 //RX_FDDRC_SLANT_0_3 +263 0x5333 //RX_FDDRC_SLANT_1_0 +264 0x5333 //RX_FDDRC_SLANT_1_1 +265 0x5333 //RX_FDDRC_SLANT_1_2 +266 0x5333 //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +286 0x0100 //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 +#VOL 4 +163 0x1000 //RX_TDDRC_ALPHA_UP_1 +164 0x1000 //RX_TDDRC_ALPHA_UP_2 +165 0x1000 //RX_TDDRC_ALPHA_UP_3 +166 0x1000 //RX_TDDRC_ALPHA_UP_4 +184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +190 0x7FFF //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +269 0x0000 //RX_TDDRC_THRD_0 +270 0x0000 //RX_TDDRC_THRD_1 +271 0x7FFF //RX_TDDRC_THRD_2 +272 0x7FFF //RX_TDDRC_THRD_3 +273 0x7FFF //RX_TDDRC_SLANT_0 +274 0x7FFF //RX_TDDRC_SLANT_1 +275 0x1000 //RX_TDDRC_ALPHA_UP_0 +276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x199A //RX_TDDRC_HMNC_GAIN +279 0x0001 //RX_TDDRC_SMT_FLAG +280 0x0CCD //RX_TDDRC_SMT_W +281 0x0155 //RX_TDDRC_DRC_GAIN +195 0x0020 //RX_FDEQ_SUBNUM +196 0x4848 //RX_FDEQ_GAIN_0 +197 0x4848 //RX_FDEQ_GAIN_1 +198 0x4848 //RX_FDEQ_GAIN_2 +199 0x4848 //RX_FDEQ_GAIN_3 +200 0x4848 //RX_FDEQ_GAIN_4 +201 0x4848 //RX_FDEQ_GAIN_5 +202 0x4848 //RX_FDEQ_GAIN_6 +203 0x4848 //RX_FDEQ_GAIN_7 +204 0x4848 //RX_FDEQ_GAIN_8 +205 0x4848 //RX_FDEQ_GAIN_9 +206 0x4848 //RX_FDEQ_GAIN_10 +207 0x4848 //RX_FDEQ_GAIN_11 +208 0x4848 //RX_FDEQ_GAIN_12 +209 0x4848 //RX_FDEQ_GAIN_13 +210 0x4848 //RX_FDEQ_GAIN_14 +211 0x4848 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0202 //RX_FDEQ_BIN_0 +221 0x0203 //RX_FDEQ_BIN_1 +222 0x0304 //RX_FDEQ_BIN_2 +223 0x0405 //RX_FDEQ_BIN_3 +224 0x0607 //RX_FDEQ_BIN_4 +225 0x0809 //RX_FDEQ_BIN_5 +226 0x0A0B //RX_FDEQ_BIN_6 +227 0x0C0D //RX_FDEQ_BIN_7 +228 0x0E0F //RX_FDEQ_BIN_8 +229 0x1011 //RX_FDEQ_BIN_9 +230 0x1214 //RX_FDEQ_BIN_10 +231 0x1618 //RX_FDEQ_BIN_11 +232 0x1C1C //RX_FDEQ_BIN_12 +233 0x2020 //RX_FDEQ_BIN_13 +234 0x2020 //RX_FDEQ_BIN_14 +235 0x2011 //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x4000 //RX_FDEQ_RESRV_0 +245 0x0320 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0030 //RX_FDDRC_BAND_MARGIN_1 +248 0x0050 //RX_FDDRC_BAND_MARGIN_2 +249 0x0080 //RX_FDDRC_BAND_MARGIN_3 +250 0x0007 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x5000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x6400 //RX_FDDRC_THRD_3_2 +258 0x6400 //RX_FDDRC_THRD_3_3 +259 0x2000 //RX_FDDRC_SLANT_0_0 +260 0x2000 //RX_FDDRC_SLANT_0_1 +261 0x2000 //RX_FDDRC_SLANT_0_2 +262 0x2000 //RX_FDDRC_SLANT_0_3 +263 0x5333 //RX_FDDRC_SLANT_1_0 +264 0x5333 //RX_FDDRC_SLANT_1_1 +265 0x5333 //RX_FDDRC_SLANT_1_2 +266 0x5333 //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +286 0x0100 //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 +#VOL 5 +163 0x1000 //RX_TDDRC_ALPHA_UP_1 +164 0x1000 //RX_TDDRC_ALPHA_UP_2 +165 0x1000 //RX_TDDRC_ALPHA_UP_3 +166 0x1000 //RX_TDDRC_ALPHA_UP_4 +184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +190 0x7FFF //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +269 0x0000 //RX_TDDRC_THRD_0 +270 0x0000 //RX_TDDRC_THRD_1 +271 0x7FFF //RX_TDDRC_THRD_2 +272 0x7FFF //RX_TDDRC_THRD_3 +273 0x7FFF //RX_TDDRC_SLANT_0 +274 0x7FFF //RX_TDDRC_SLANT_1 +275 0x1000 //RX_TDDRC_ALPHA_UP_0 +276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x199A //RX_TDDRC_HMNC_GAIN +279 0x0001 //RX_TDDRC_SMT_FLAG +280 0x0CCD //RX_TDDRC_SMT_W +281 0x0155 //RX_TDDRC_DRC_GAIN +195 0x0020 //RX_FDEQ_SUBNUM +196 0x4848 //RX_FDEQ_GAIN_0 +197 0x4848 //RX_FDEQ_GAIN_1 +198 0x4848 //RX_FDEQ_GAIN_2 +199 0x4848 //RX_FDEQ_GAIN_3 +200 0x4848 //RX_FDEQ_GAIN_4 +201 0x4848 //RX_FDEQ_GAIN_5 +202 0x4848 //RX_FDEQ_GAIN_6 +203 0x4848 //RX_FDEQ_GAIN_7 +204 0x4848 //RX_FDEQ_GAIN_8 +205 0x4848 //RX_FDEQ_GAIN_9 +206 0x4848 //RX_FDEQ_GAIN_10 +207 0x4848 //RX_FDEQ_GAIN_11 +208 0x4848 //RX_FDEQ_GAIN_12 +209 0x4848 //RX_FDEQ_GAIN_13 +210 0x4848 //RX_FDEQ_GAIN_14 +211 0x4848 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0202 //RX_FDEQ_BIN_0 +221 0x0203 //RX_FDEQ_BIN_1 +222 0x0304 //RX_FDEQ_BIN_2 +223 0x0405 //RX_FDEQ_BIN_3 +224 0x0607 //RX_FDEQ_BIN_4 +225 0x0809 //RX_FDEQ_BIN_5 +226 0x0A0B //RX_FDEQ_BIN_6 +227 0x0C0D //RX_FDEQ_BIN_7 +228 0x0E0F //RX_FDEQ_BIN_8 +229 0x1011 //RX_FDEQ_BIN_9 +230 0x1214 //RX_FDEQ_BIN_10 +231 0x1618 //RX_FDEQ_BIN_11 +232 0x1C1C //RX_FDEQ_BIN_12 +233 0x2020 //RX_FDEQ_BIN_13 +234 0x2020 //RX_FDEQ_BIN_14 +235 0x2011 //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x4000 //RX_FDEQ_RESRV_0 +245 0x0320 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0030 //RX_FDDRC_BAND_MARGIN_1 +248 0x0050 //RX_FDDRC_BAND_MARGIN_2 +249 0x0080 //RX_FDDRC_BAND_MARGIN_3 +250 0x0007 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x5000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x6400 //RX_FDDRC_THRD_3_2 +258 0x6400 //RX_FDDRC_THRD_3_3 +259 0x2000 //RX_FDDRC_SLANT_0_0 +260 0x2000 //RX_FDDRC_SLANT_0_1 +261 0x2000 //RX_FDDRC_SLANT_0_2 +262 0x2000 //RX_FDDRC_SLANT_0_3 +263 0x5333 //RX_FDDRC_SLANT_1_0 +264 0x5333 //RX_FDDRC_SLANT_1_1 +265 0x5333 //RX_FDDRC_SLANT_1_2 +266 0x5333 //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +286 0x0100 //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 +#VOL 6 +163 0x1000 //RX_TDDRC_ALPHA_UP_1 +164 0x1000 //RX_TDDRC_ALPHA_UP_2 +165 0x1000 //RX_TDDRC_ALPHA_UP_3 +166 0x1000 //RX_TDDRC_ALPHA_UP_4 +184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +190 0x7FFF //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +269 0x0000 //RX_TDDRC_THRD_0 +270 0x0000 //RX_TDDRC_THRD_1 +271 0x7FFF //RX_TDDRC_THRD_2 +272 0x7FFF //RX_TDDRC_THRD_3 +273 0x7FFF //RX_TDDRC_SLANT_0 +274 0x7FFF //RX_TDDRC_SLANT_1 +275 0x1000 //RX_TDDRC_ALPHA_UP_0 +276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x199A //RX_TDDRC_HMNC_GAIN +279 0x0001 //RX_TDDRC_SMT_FLAG +280 0x0CCD //RX_TDDRC_SMT_W +281 0x0155 //RX_TDDRC_DRC_GAIN +195 0x0020 //RX_FDEQ_SUBNUM +196 0x4848 //RX_FDEQ_GAIN_0 +197 0x4848 //RX_FDEQ_GAIN_1 +198 0x4848 //RX_FDEQ_GAIN_2 +199 0x4848 //RX_FDEQ_GAIN_3 +200 0x4848 //RX_FDEQ_GAIN_4 +201 0x4848 //RX_FDEQ_GAIN_5 +202 0x4848 //RX_FDEQ_GAIN_6 +203 0x4848 //RX_FDEQ_GAIN_7 +204 0x4848 //RX_FDEQ_GAIN_8 +205 0x4848 //RX_FDEQ_GAIN_9 +206 0x4848 //RX_FDEQ_GAIN_10 +207 0x4848 //RX_FDEQ_GAIN_11 +208 0x4848 //RX_FDEQ_GAIN_12 +209 0x4848 //RX_FDEQ_GAIN_13 +210 0x4848 //RX_FDEQ_GAIN_14 +211 0x4848 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0202 //RX_FDEQ_BIN_0 +221 0x0203 //RX_FDEQ_BIN_1 +222 0x0304 //RX_FDEQ_BIN_2 +223 0x0405 //RX_FDEQ_BIN_3 +224 0x0607 //RX_FDEQ_BIN_4 +225 0x0809 //RX_FDEQ_BIN_5 +226 0x0A0B //RX_FDEQ_BIN_6 +227 0x0C0D //RX_FDEQ_BIN_7 +228 0x0E0F //RX_FDEQ_BIN_8 +229 0x1011 //RX_FDEQ_BIN_9 +230 0x1214 //RX_FDEQ_BIN_10 +231 0x1618 //RX_FDEQ_BIN_11 +232 0x1C1C //RX_FDEQ_BIN_12 +233 0x2020 //RX_FDEQ_BIN_13 +234 0x2020 //RX_FDEQ_BIN_14 +235 0x2011 //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x4000 //RX_FDEQ_RESRV_0 +245 0x0320 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0030 //RX_FDDRC_BAND_MARGIN_1 +248 0x0050 //RX_FDDRC_BAND_MARGIN_2 +249 0x0080 //RX_FDDRC_BAND_MARGIN_3 +250 0x0007 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x5000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x6400 //RX_FDDRC_THRD_3_2 +258 0x6400 //RX_FDDRC_THRD_3_3 +259 0x2000 //RX_FDDRC_SLANT_0_0 +260 0x2000 //RX_FDDRC_SLANT_0_1 +261 0x2000 //RX_FDDRC_SLANT_0_2 +262 0x2000 //RX_FDDRC_SLANT_0_3 +263 0x5333 //RX_FDDRC_SLANT_1_0 +264 0x5333 //RX_FDDRC_SLANT_1_1 +265 0x5333 //RX_FDDRC_SLANT_1_2 +266 0x5333 //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +286 0x0100 //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 diff --git a/audio/cheetah/tuning/fortemedia/HANDSET.dat b/audio/cheetah/tuning/fortemedia/HANDSET.dat index 2364abe..2967647 100644 Binary files a/audio/cheetah/tuning/fortemedia/HANDSET.dat and b/audio/cheetah/tuning/fortemedia/HANDSET.dat differ diff --git a/audio/cheetah/tuning/fortemedia/HANDSET.mods b/audio/cheetah/tuning/fortemedia/HANDSET.mods index 6b7ee46..c5b6822 100644 --- a/audio/cheetah/tuning/fortemedia/HANDSET.mods +++ b/audio/cheetah/tuning/fortemedia/HANDSET.mods @@ -1,11 +1,12 @@ #PLATFORM_NAME gChip #EXPORT_FLAG HANDSET -#SINGLE_API_VER 1.1.6 -#SAVE_TIME 2021-12-20 19:22:45 +#SINGLE_API_VER 1.2.0 +#SAVE_TIME 2022-02-24 17:06:03 #CASE_NAME HANDSET-HANDSET-RESERVE1-FB -#PARAM_TYPE TX+RX -#TOTAL_CUSTOM_STEP 7 +#PARAM_MODE FULL +#PARAM_TYPE TX+2RX +#TOTAL_CUSTOM_STEP 7+7 #TX 0 0x0000 //TX_OPERATION_MODE_0 1 0x0000 //TX_OPERATION_MODE_1 @@ -258,12 +259,12 @@ 248 0xF800 //TX_THR_SN_EST_6 249 0xF700 //TX_THR_SN_EST_7 250 0x0000 //TX_DELTA_THR_SN_EST_0 -251 0x0100 //TX_DELTA_THR_SN_EST_1 +251 0x0200 //TX_DELTA_THR_SN_EST_1 252 0x0200 //TX_DELTA_THR_SN_EST_2 253 0x0200 //TX_DELTA_THR_SN_EST_3 -254 0x0200 //TX_DELTA_THR_SN_EST_4 -255 0x0100 //TX_DELTA_THR_SN_EST_5 -256 0x0200 //TX_DELTA_THR_SN_EST_6 +254 0x0100 //TX_DELTA_THR_SN_EST_4 +255 0x0200 //TX_DELTA_THR_SN_EST_5 +256 0x0100 //TX_DELTA_THR_SN_EST_6 257 0x0200 //TX_DELTA_THR_SN_EST_7 258 0x4000 //TX_LAMBDA_NN_EST_0 259 0x4000 //TX_LAMBDA_NN_EST_1 @@ -291,16 +292,16 @@ 281 0x0014 //TX_NS_LVL_CTRL_0 282 0x0016 //TX_NS_LVL_CTRL_1 283 0x0016 //TX_NS_LVL_CTRL_2 -284 0x0016 //TX_NS_LVL_CTRL_3 -285 0x0018 //TX_NS_LVL_CTRL_4 -286 0x0016 //TX_NS_LVL_CTRL_5 -287 0x0012 //TX_NS_LVL_CTRL_6 +284 0x0018 //TX_NS_LVL_CTRL_3 +285 0x0016 //TX_NS_LVL_CTRL_4 +286 0x0012 //TX_NS_LVL_CTRL_5 +287 0x0016 //TX_NS_LVL_CTRL_6 288 0x0017 //TX_NS_LVL_CTRL_7 289 0x000E //TX_MIN_GAIN_S_0 -290 0x0012 //TX_MIN_GAIN_S_1 -291 0x0007 //TX_MIN_GAIN_S_2 -292 0x0012 //TX_MIN_GAIN_S_3 -293 0x0010 //TX_MIN_GAIN_S_4 +290 0x0007 //TX_MIN_GAIN_S_1 +291 0x0012 //TX_MIN_GAIN_S_2 +292 0x0010 //TX_MIN_GAIN_S_3 +293 0x0012 //TX_MIN_GAIN_S_4 294 0x0012 //TX_MIN_GAIN_S_5 295 0x0012 //TX_MIN_GAIN_S_6 296 0x0012 //TX_MIN_GAIN_S_7 @@ -322,29 +323,29 @@ 312 0x7FFF //TX_A_POST_FILT_0 313 0x2000 //TX_A_POST_FILT_1 314 0x4000 //TX_A_POST_FILT_S_0 -315 0x5000 //TX_A_POST_FILT_S_1 +315 0x4000 //TX_A_POST_FILT_S_1 316 0x4000 //TX_A_POST_FILT_S_2 317 0x4000 //TX_A_POST_FILT_S_3 318 0x4000 //TX_A_POST_FILT_S_4 319 0x4000 //TX_A_POST_FILT_S_5 -320 0x4000 //TX_A_POST_FILT_S_6 +320 0x5000 //TX_A_POST_FILT_S_6 321 0x7000 //TX_A_POST_FILT_S_7 322 0x1000 //TX_B_POST_FILT_0 323 0x2000 //TX_B_POST_FILT_1 -324 0x3000 //TX_B_POST_FILT_2 +324 0x2000 //TX_B_POST_FILT_2 325 0x2000 //TX_B_POST_FILT_3 -326 0x5000 //TX_B_POST_FILT_4 +326 0x2000 //TX_B_POST_FILT_4 327 0x2000 //TX_B_POST_FILT_5 -328 0x6000 //TX_B_POST_FILT_6 +328 0x3000 //TX_B_POST_FILT_6 329 0x3000 //TX_B_POST_FILT_7 330 0x1000 //TX_B_LESSCUT_RTO_S_0 -331 0x6000 //TX_B_LESSCUT_RTO_S_1 -332 0x6000 //TX_B_LESSCUT_RTO_S_2 -333 0x6000 //TX_B_LESSCUT_RTO_S_3 -334 0x6000 //TX_B_LESSCUT_RTO_S_4 -335 0x6000 //TX_B_LESSCUT_RTO_S_5 -336 0x7FFF //TX_B_LESSCUT_RTO_S_6 -337 0x7FFF //TX_B_LESSCUT_RTO_S_7 +331 0x1000 //TX_B_LESSCUT_RTO_S_1 +332 0x1000 //TX_B_LESSCUT_RTO_S_2 +333 0x1000 //TX_B_LESSCUT_RTO_S_3 +334 0x1000 //TX_B_LESSCUT_RTO_S_4 +335 0x1000 //TX_B_LESSCUT_RTO_S_5 +336 0x1000 //TX_B_LESSCUT_RTO_S_6 +337 0x1000 //TX_B_LESSCUT_RTO_S_7 338 0x7E14 //TX_LAMBDA_PFILT 339 0x7C29 //TX_LAMBDA_PFILT_S_0 340 0x7C29 //TX_LAMBDA_PFILT_S_1 @@ -387,10 +388,10 @@ 377 0x4E20 //TX_NOISE_TH_5_4 378 0x39DF //TX_NOISE_TH_6 379 0x0014 //TX_MINENOISE_TH -380 0x4000 //TX_MINENOISE_MIC0_TH_MTS -381 0xFFEE //TX_MINENOISE_MIC0_TH_EXP -382 0x6000 //TX_MINENOISE_MIC0_S_TH_MTS -383 0xFFF3 //TX_MINENOISE_MIC0_S_TH_EXP +380 0xD508 //TX_MORENS_TFMASK_TH +381 0x0001 //TX_DRC_QUIET_FLOOR +382 0x6D60 //TX_RATIODTL_CUT_TH +383 0x1482 //TX_DT_CUT_K1 384 0x00A5 //TX_OUT_ENER_S_TH_CLEAN 385 0x00A5 //TX_OUT_ENER_S_TH_LESSCLEAN 386 0x00A5 //TX_OUT_ENER_S_TH_NOISY @@ -398,15 +399,15 @@ 388 0x0200 //TX_OUT_ENER_TH_SPEECH 389 0x2000 //TX_SN_NPB_GAIN 390 0x0000 //TX_NN_NPB_GAIN -391 0x0000 //TX_CSX_ALPHA_0 -392 0x0000 //TX_CSX_ALPHA_1 -393 0x0000 //TX_CSX_ALPHA_2 -394 0x0000 //TX_CSX_ALPHA_3 -395 0x0800 //TX_MU_ARSP_EST -396 0x00C8 //TX_P_OUTBEAM_MIN_TH +391 0x3000 //TX_POST_MASK_SUP_HSNE +392 0x07D0 //TX_TAIL_DET_TH +393 0x4000 //TX_B_LESSCUT_RTO_WTA +394 0x0000 //TX_MEL_G_R +395 0x0080 //TX_SUPHIGH_TH +396 0x0000 //TX_MASK_G_R 397 0x0002 //TX_EXTRA_NS_L -398 0x0800 //TX_EXTRA_NS_A -399 0x0005 //TX_VR_NOISE_FLOOR_TH +398 0x1800 //TX_C_POST_FLT_MASK +399 0x7FFF //TX_A_POST_FLT_WNS 400 0x0148 //TX_MIN_G_LOW300HZ 401 0x0004 //TX_MAXLEVEL_CNG 402 0x00B4 //TX_STN_NOISE_TH @@ -521,16 +522,16 @@ 511 0x6666 //TX_MIC_TO_BFGAIN 512 0x0000 //TX_MICTOBFGAIN0 513 0x0000 //TX_FASTMUE_TH -514 0x0000 //TX_DERVB_LEN_0 -515 0x0000 //TX_DERVB_LEN_1 -516 0x0000 //TX_RHO_DERVB -517 0x0000 //TX_MIC_INDX_DERVB -518 0x0000 //TX_MU_DERVB -519 0x0000 //TX_DR_RESRV_0 -520 0x0000 //TX_DR_RESRV_1 -521 0x0000 //TX_DR_RESRV_2 -522 0x0000 //TX_DR_RESRV_3 -523 0x0000 //TX_DR_RESRV_4 +514 0x2CCC //TX_DEREVERB_LF_MU +515 0x3200 //TX_DEREVERB_HF_MU +516 0x0007 //TX_DEREVERB_DELAY +517 0x0004 //TX_DEREVERB_COEF_LEN +518 0x0003 //TX_DEREVERB_DNR +519 0x0000 //TX_DEREVERB_ALPHA +520 0x0000 //TX_DEREVERB_BETA +521 0x7FFF //TX_GSC_RTOL_TH +522 0x7FFF //TX_GSC_RTOH_TH +523 0x7E2C //TX_WIDE2_MEANHTH 524 0x0000 //TX_DR_RESRV_5 525 0x0000 //TX_DR_RESRV_6 526 0x0000 //TX_DR_RESRV_7 @@ -904,6 +905,71 @@ 894 0xC000 //TX_FASTNS_SSA_THHFL 895 0xCCCC //TX_FASTNS_SSA_THLFH 896 0xD999 //TX_FASTNS_SSA_THHFH +897 0x2339 //TX_SENDFUNC_REG_MICMUTE +898 0x0021 //TX_SENDFUNC_REG_MICMUTE1 +899 0x02BC //TX_MICMUTE_RATIO_THR +900 0x0140 //TX_MICMUTE_AMP_THR +901 0x0004 //TX_MICMUTE_HPF_IND +902 0x00C0 //TX_MICMUTE_LOG_EYR_TH +903 0x0008 //TX_MICMUTE_CVG_TIME +904 0x0008 //TX_MICMUTE_RELEASE_TIME +905 0x01FE //TX_MIC_VOLUME_MIC0MUTE +906 0x0020 //TX_MICMUTE_EPD_OFFSET_0 +907 0x001E //TX_MICMUTE_FRQ_AEC_L +908 0x7999 //TX_MICMUTE_EAD_THR +909 0x7FFF //TX_MICMUTE_LAMBDA_CB_NLE +910 0x7FFF //TX_MICMUTE_LAMBDA_RE_EST +911 0x4000 //TX_DTD_THR1_MICMUTE_0 +912 0x7000 //TX_DTD_THR1_MICMUTE_1 +913 0x7FFF //TX_DTD_THR1_MICMUTE_2 +914 0x7FFF //TX_DTD_THR1_MICMUTE_3 +915 0x6CCC //TX_DTD_THR2_MICMUTE_0 +916 0x0400 //TX_MICMUTE_MIN_EQ_RE_EST_0 +917 0x0400 //TX_MICMUTE_MIN_EQ_RE_EST_1 +918 0x1000 //TX_MICMUTE_MIN_EQ_RE_EST_2 +919 0x7FFF //TX_MICMUTE_MIN_EQ_RE_EST_3 +920 0x7FFF //TX_MICMUTE_MIN_EQ_RE_EST_4 +921 0x4000 //TX_MICMUTE_C_POST_FLT +922 0x03E8 //TX_MICMUTE_DT_CUT_K +923 0x0001 //TX_MICMUTE_DT_CUT_THR +924 0x03E8 //TX_MICMUTE_DT_CUT_K2 +925 0x0001 //TX_MICMUTE_DT_CUT_THR2 +926 0x0064 //TX_MICMUTE_DT2_HOLD_N +927 0x1000 //TX_MICMUTE_RATIODTH_THCUT +928 0x1000 //TX_MICMUTE_B_POST_FLT_ECHOL +929 0x7FFF //TX_MICMUTE_B_POST_FLT_ECHOH +930 0x0400 //TX_MICMUTE_C_POST_FLT_MASK +931 0x7999 //TX_MICMUTE_RATIODTL_CUT_TH +932 0x0258 //TX_MICMUTE_DT_CUT_K1 +933 0x0800 //TX_MICMUTE_N2_SN_EST +934 0xFC00 //TX_MICMUTE_THR_SN_EST_0 +935 0x001C //TX_MICMUTE_MIN_G_CTRL_0 +936 0x6000 //TX_MICMUTE_A_POST_FILT_S_0 +937 0x7000 //TX_MICMUTE_B_POST_FILT_0 +938 0x2710 //TX_MIC1RUB_AMP_THR +939 0x0010 //TX_MIC1MUTE_RATIO_THR +940 0x0450 //TX_MIC1MUTE_AMP_THR +941 0x0008 //TX_MIC1MUTE_CVG_TIME +942 0x0008 //TX_MIC1MUTE_RELEASE_TIME +943 0x0000 //TX_AMS_RESRV_01 +944 0x0000 //TX_AMS_RESRV_02 +945 0x0000 //TX_AMS_RESRV_03 +946 0x0000 //TX_AMS_RESRV_04 +947 0x0000 //TX_AMS_RESRV_05 +948 0x0000 //TX_AMS_RESRV_06 +949 0x0000 //TX_AMS_RESRV_07 +950 0x0000 //TX_AMS_RESRV_08 +951 0x0000 //TX_AMS_RESRV_09 +952 0x0000 //TX_AMS_RESRV_10 +953 0x0000 //TX_AMS_RESRV_11 +954 0x0000 //TX_AMS_RESRV_12 +955 0x0000 //TX_AMS_RESRV_13 +956 0x0000 //TX_AMS_RESRV_14 +957 0x0000 //TX_AMS_RESRV_15 +958 0x0000 //TX_AMS_RESRV_16 +959 0x0000 //TX_AMS_RESRV_17 +960 0x0000 //TX_AMS_RESRV_18 +961 0x0000 //TX_AMS_RESRV_19 #RX 0 0x003C //RX_RECVFUNC_MODE_0 1 0x0000 //RX_RECVFUNC_MODE_1 @@ -1755,10 +1821,862 @@ 110 0x0000 //RX_FDDRC_RESRV_0 129 0x0100 //RX_SPK_VOL 130 0x0000 //RX_VOL_RESRV_0 +#RX 2 +157 0x003C //RX_RECVFUNC_MODE_0 +158 0x0000 //RX_RECVFUNC_MODE_1 +159 0x0004 //RX_SAMPLINGFREQ_SIG +160 0x0004 //RX_SAMPLINGFREQ_PROC +161 0x000A //RX_FRAME_SZ +162 0x0000 //RX_DELAY_OPT +163 0x1000 //RX_TDDRC_ALPHA_UP_1 +164 0x1000 //RX_TDDRC_ALPHA_UP_2 +165 0x1000 //RX_TDDRC_ALPHA_UP_3 +166 0x1000 //RX_TDDRC_ALPHA_UP_4 +167 0x0722 //RX_PGA +168 0x7FFF //RX_A_HP +169 0x4000 //RX_B_PE +170 0x5800 //RX_THR_PITCH_DET_0 +171 0x5000 //RX_THR_PITCH_DET_1 +172 0x4000 //RX_THR_PITCH_DET_2 +173 0x0008 //RX_PITCH_BFR_LEN +174 0x0003 //RX_SBD_PITCH_DET +175 0x0100 //RX_PP_RESRV_0 +176 0x0020 //RX_PP_RESRV_1 +177 0x0600 //RX_N_SN_EST +178 0x000C //RX_N2_SN_EST +179 0x000F //RX_NS_LVL_CTRL +180 0xF800 //RX_THR_SN_EST +181 0x7E00 //RX_LAMBDA_PFILT +182 0x000A //RX_FENS_RESRV_0 +183 0x0190 //RX_FENS_RESRV_1 +184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +187 0x0002 //RX_EXTRA_NS_L +188 0x0800 //RX_EXTRA_NS_A +189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +190 0x7000 //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +192 0x199A //RX_A_POST_FLT +193 0x0000 //RX_LMT_THRD +194 0x4000 //RX_LMT_ALPHA +195 0x0020 //RX_FDEQ_SUBNUM +196 0x4E4E //RX_FDEQ_GAIN_0 +197 0x4E56 //RX_FDEQ_GAIN_1 +198 0x6878 //RX_FDEQ_GAIN_2 +199 0x8088 //RX_FDEQ_GAIN_3 +200 0x848B //RX_FDEQ_GAIN_4 +201 0x8F8E //RX_FDEQ_GAIN_5 +202 0x9494 //RX_FDEQ_GAIN_6 +203 0x96A0 //RX_FDEQ_GAIN_7 +204 0xB8A0 //RX_FDEQ_GAIN_8 +205 0xA99D //RX_FDEQ_GAIN_9 +206 0x9D6A //RX_FDEQ_GAIN_10 +207 0x626B //RX_FDEQ_GAIN_11 +208 0x6C78 //RX_FDEQ_GAIN_12 +209 0x7884 //RX_FDEQ_GAIN_13 +210 0x9098 //RX_FDEQ_GAIN_14 +211 0x9CAC //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0202 //RX_FDEQ_BIN_0 +221 0x0202 //RX_FDEQ_BIN_1 +222 0x0302 //RX_FDEQ_BIN_2 +223 0x0304 //RX_FDEQ_BIN_3 +224 0x0405 //RX_FDEQ_BIN_4 +225 0x0506 //RX_FDEQ_BIN_5 +226 0x0708 //RX_FDEQ_BIN_6 +227 0x090A //RX_FDEQ_BIN_7 +228 0x0B0C //RX_FDEQ_BIN_8 +229 0x0D0E //RX_FDEQ_BIN_9 +230 0x1013 //RX_FDEQ_BIN_10 +231 0x1719 //RX_FDEQ_BIN_11 +232 0x1B1E //RX_FDEQ_BIN_12 +233 0x1E1E //RX_FDEQ_BIN_13 +234 0x1E28 //RX_FDEQ_BIN_14 +235 0x282C //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x4000 //RX_FDEQ_RESRV_0 +245 0x0320 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0030 //RX_FDDRC_BAND_MARGIN_1 +248 0x0050 //RX_FDDRC_BAND_MARGIN_2 +249 0x0080 //RX_FDDRC_BAND_MARGIN_3 +250 0x0007 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x5000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x6400 //RX_FDDRC_THRD_3_2 +258 0x6400 //RX_FDDRC_THRD_3_3 +259 0x2000 //RX_FDDRC_SLANT_0_0 +260 0x2000 //RX_FDDRC_SLANT_0_1 +261 0x2000 //RX_FDDRC_SLANT_0_2 +262 0x2000 //RX_FDDRC_SLANT_0_3 +263 0x5333 //RX_FDDRC_SLANT_1_0 +264 0x5333 //RX_FDDRC_SLANT_1_1 +265 0x5333 //RX_FDDRC_SLANT_1_2 +266 0x5333 //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +268 0x0002 //RX_FILTINDX +269 0x0000 //RX_TDDRC_THRD_0 +270 0x0000 //RX_TDDRC_THRD_1 +271 0x1800 //RX_TDDRC_THRD_2 +272 0x1800 //RX_TDDRC_THRD_3 +273 0x3000 //RX_TDDRC_SLANT_0 +274 0x6E00 //RX_TDDRC_SLANT_1 +275 0x1000 //RX_TDDRC_ALPHA_UP_0 +276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x199A //RX_TDDRC_HMNC_GAIN +279 0x0001 //RX_TDDRC_SMT_FLAG +280 0x0CCD //RX_TDDRC_SMT_W +281 0x02FD //RX_TDDRC_DRC_GAIN +282 0x7C00 //RX_LAMBDA_PKA_FP +283 0x2000 //RX_TPKA_FP +284 0x2000 //RX_MIN_G_FP +285 0x0080 //RX_MAX_G_FP +286 0x000D //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 +288 0x0000 //RX_MAXLEVEL_CNG +289 0x3000 //RX_BWE_UV_TH +290 0x3000 //RX_BWE_UV_TH2 +291 0x1800 //RX_BWE_UV_TH3 +292 0x1000 //RX_BWE_V_TH +293 0x04CD //RX_BWE_GAIN1_V_TH1 +294 0x0F33 //RX_BWE_GAIN1_V_TH2 +295 0x7333 //RX_BWE_UV_EQ +296 0x199A //RX_BWE_V_EQ +297 0x7333 //RX_BWE_TONE_TH +298 0x0004 //RX_BWE_UV_HOLD_T +299 0x6CCD //RX_BWE_GAIN2_ALPHA +300 0x799A //RX_BWE_GAIN3_ALPHA +301 0x001E //RX_BWE_CUTOFF +302 0x3000 //RX_BWE_GAINFILL +303 0x3200 //RX_BWE_MAXTH_TONE +304 0x2000 //RX_BWE_EQ_0 +305 0x2000 //RX_BWE_EQ_1 +306 0x2000 //RX_BWE_EQ_2 +307 0x2000 //RX_BWE_EQ_3 +308 0x2000 //RX_BWE_EQ_4 +309 0x2000 //RX_BWE_EQ_5 +310 0x2000 //RX_BWE_EQ_6 +311 0x0000 //RX_BWE_RESRV_0 +312 0x0000 //RX_BWE_RESRV_1 +313 0x0000 //RX_BWE_RESRV_2 +#VOL 0 +163 0x1000 //RX_TDDRC_ALPHA_UP_1 +164 0x1000 //RX_TDDRC_ALPHA_UP_2 +165 0x1000 //RX_TDDRC_ALPHA_UP_3 +166 0x1000 //RX_TDDRC_ALPHA_UP_4 +184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +190 0x7000 //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +269 0x0000 //RX_TDDRC_THRD_0 +270 0x0000 //RX_TDDRC_THRD_1 +271 0x1800 //RX_TDDRC_THRD_2 +272 0x1800 //RX_TDDRC_THRD_3 +273 0x3000 //RX_TDDRC_SLANT_0 +274 0x6E00 //RX_TDDRC_SLANT_1 +275 0x1000 //RX_TDDRC_ALPHA_UP_0 +276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x199A //RX_TDDRC_HMNC_GAIN +279 0x0001 //RX_TDDRC_SMT_FLAG +280 0x0CCD //RX_TDDRC_SMT_W +281 0x02FD //RX_TDDRC_DRC_GAIN +195 0x0020 //RX_FDEQ_SUBNUM +196 0x4E4E //RX_FDEQ_GAIN_0 +197 0x4E56 //RX_FDEQ_GAIN_1 +198 0x6878 //RX_FDEQ_GAIN_2 +199 0x8088 //RX_FDEQ_GAIN_3 +200 0x848B //RX_FDEQ_GAIN_4 +201 0x8F8E //RX_FDEQ_GAIN_5 +202 0x9494 //RX_FDEQ_GAIN_6 +203 0x96A0 //RX_FDEQ_GAIN_7 +204 0xB8A0 //RX_FDEQ_GAIN_8 +205 0xA99D //RX_FDEQ_GAIN_9 +206 0x9D6A //RX_FDEQ_GAIN_10 +207 0x626B //RX_FDEQ_GAIN_11 +208 0x6C78 //RX_FDEQ_GAIN_12 +209 0x7884 //RX_FDEQ_GAIN_13 +210 0x9098 //RX_FDEQ_GAIN_14 +211 0x9CAC //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0202 //RX_FDEQ_BIN_0 +221 0x0202 //RX_FDEQ_BIN_1 +222 0x0302 //RX_FDEQ_BIN_2 +223 0x0304 //RX_FDEQ_BIN_3 +224 0x0405 //RX_FDEQ_BIN_4 +225 0x0506 //RX_FDEQ_BIN_5 +226 0x0708 //RX_FDEQ_BIN_6 +227 0x090A //RX_FDEQ_BIN_7 +228 0x0B0C //RX_FDEQ_BIN_8 +229 0x0D0E //RX_FDEQ_BIN_9 +230 0x1013 //RX_FDEQ_BIN_10 +231 0x1719 //RX_FDEQ_BIN_11 +232 0x1B1E //RX_FDEQ_BIN_12 +233 0x1E1E //RX_FDEQ_BIN_13 +234 0x1E28 //RX_FDEQ_BIN_14 +235 0x282C //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x4000 //RX_FDEQ_RESRV_0 +245 0x0320 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0030 //RX_FDDRC_BAND_MARGIN_1 +248 0x0050 //RX_FDDRC_BAND_MARGIN_2 +249 0x0080 //RX_FDDRC_BAND_MARGIN_3 +250 0x0007 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x5000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x6400 //RX_FDDRC_THRD_3_2 +258 0x6400 //RX_FDDRC_THRD_3_3 +259 0x2000 //RX_FDDRC_SLANT_0_0 +260 0x2000 //RX_FDDRC_SLANT_0_1 +261 0x2000 //RX_FDDRC_SLANT_0_2 +262 0x2000 //RX_FDDRC_SLANT_0_3 +263 0x5333 //RX_FDDRC_SLANT_1_0 +264 0x5333 //RX_FDDRC_SLANT_1_1 +265 0x5333 //RX_FDDRC_SLANT_1_2 +266 0x5333 //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +286 0x000D //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 +#VOL 1 +163 0x1000 //RX_TDDRC_ALPHA_UP_1 +164 0x1000 //RX_TDDRC_ALPHA_UP_2 +165 0x1000 //RX_TDDRC_ALPHA_UP_3 +166 0x1000 //RX_TDDRC_ALPHA_UP_4 +184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +190 0x7000 //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +269 0x0000 //RX_TDDRC_THRD_0 +270 0x0000 //RX_TDDRC_THRD_1 +271 0x1800 //RX_TDDRC_THRD_2 +272 0x1800 //RX_TDDRC_THRD_3 +273 0x3000 //RX_TDDRC_SLANT_0 +274 0x6E00 //RX_TDDRC_SLANT_1 +275 0x1000 //RX_TDDRC_ALPHA_UP_0 +276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x199A //RX_TDDRC_HMNC_GAIN +279 0x0001 //RX_TDDRC_SMT_FLAG +280 0x0CCD //RX_TDDRC_SMT_W +281 0x02FD //RX_TDDRC_DRC_GAIN +195 0x0020 //RX_FDEQ_SUBNUM +196 0x4E4E //RX_FDEQ_GAIN_0 +197 0x4E56 //RX_FDEQ_GAIN_1 +198 0x6878 //RX_FDEQ_GAIN_2 +199 0x8088 //RX_FDEQ_GAIN_3 +200 0x848B //RX_FDEQ_GAIN_4 +201 0x8F8E //RX_FDEQ_GAIN_5 +202 0x9494 //RX_FDEQ_GAIN_6 +203 0x96A0 //RX_FDEQ_GAIN_7 +204 0xB8A0 //RX_FDEQ_GAIN_8 +205 0xA99D //RX_FDEQ_GAIN_9 +206 0x9D6A //RX_FDEQ_GAIN_10 +207 0x626B //RX_FDEQ_GAIN_11 +208 0x6C78 //RX_FDEQ_GAIN_12 +209 0x7884 //RX_FDEQ_GAIN_13 +210 0x9098 //RX_FDEQ_GAIN_14 +211 0x9CAC //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0202 //RX_FDEQ_BIN_0 +221 0x0202 //RX_FDEQ_BIN_1 +222 0x0302 //RX_FDEQ_BIN_2 +223 0x0304 //RX_FDEQ_BIN_3 +224 0x0405 //RX_FDEQ_BIN_4 +225 0x0506 //RX_FDEQ_BIN_5 +226 0x0708 //RX_FDEQ_BIN_6 +227 0x090A //RX_FDEQ_BIN_7 +228 0x0B0C //RX_FDEQ_BIN_8 +229 0x0D0E //RX_FDEQ_BIN_9 +230 0x1013 //RX_FDEQ_BIN_10 +231 0x1719 //RX_FDEQ_BIN_11 +232 0x1B1E //RX_FDEQ_BIN_12 +233 0x1E1E //RX_FDEQ_BIN_13 +234 0x1E28 //RX_FDEQ_BIN_14 +235 0x282C //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x4000 //RX_FDEQ_RESRV_0 +245 0x0320 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0030 //RX_FDDRC_BAND_MARGIN_1 +248 0x0050 //RX_FDDRC_BAND_MARGIN_2 +249 0x0080 //RX_FDDRC_BAND_MARGIN_3 +250 0x0007 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x5000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x6400 //RX_FDDRC_THRD_3_2 +258 0x6400 //RX_FDDRC_THRD_3_3 +259 0x2000 //RX_FDDRC_SLANT_0_0 +260 0x2000 //RX_FDDRC_SLANT_0_1 +261 0x2000 //RX_FDDRC_SLANT_0_2 +262 0x2000 //RX_FDDRC_SLANT_0_3 +263 0x5333 //RX_FDDRC_SLANT_1_0 +264 0x5333 //RX_FDDRC_SLANT_1_1 +265 0x5333 //RX_FDDRC_SLANT_1_2 +266 0x5333 //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +286 0x0016 //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 +#VOL 2 +163 0x1000 //RX_TDDRC_ALPHA_UP_1 +164 0x1000 //RX_TDDRC_ALPHA_UP_2 +165 0x1000 //RX_TDDRC_ALPHA_UP_3 +166 0x1000 //RX_TDDRC_ALPHA_UP_4 +184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +190 0x7000 //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +269 0x0000 //RX_TDDRC_THRD_0 +270 0x0000 //RX_TDDRC_THRD_1 +271 0x1800 //RX_TDDRC_THRD_2 +272 0x1800 //RX_TDDRC_THRD_3 +273 0x3000 //RX_TDDRC_SLANT_0 +274 0x6E00 //RX_TDDRC_SLANT_1 +275 0x1000 //RX_TDDRC_ALPHA_UP_0 +276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x199A //RX_TDDRC_HMNC_GAIN +279 0x0001 //RX_TDDRC_SMT_FLAG +280 0x0CCD //RX_TDDRC_SMT_W +281 0x02FD //RX_TDDRC_DRC_GAIN +195 0x0020 //RX_FDEQ_SUBNUM +196 0x4E4E //RX_FDEQ_GAIN_0 +197 0x4E56 //RX_FDEQ_GAIN_1 +198 0x6878 //RX_FDEQ_GAIN_2 +199 0x8088 //RX_FDEQ_GAIN_3 +200 0x848B //RX_FDEQ_GAIN_4 +201 0x8F8E //RX_FDEQ_GAIN_5 +202 0x9494 //RX_FDEQ_GAIN_6 +203 0x96A0 //RX_FDEQ_GAIN_7 +204 0xB8A0 //RX_FDEQ_GAIN_8 +205 0xA99D //RX_FDEQ_GAIN_9 +206 0x9D6A //RX_FDEQ_GAIN_10 +207 0x626B //RX_FDEQ_GAIN_11 +208 0x6C78 //RX_FDEQ_GAIN_12 +209 0x7884 //RX_FDEQ_GAIN_13 +210 0x9098 //RX_FDEQ_GAIN_14 +211 0x9CAC //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0202 //RX_FDEQ_BIN_0 +221 0x0202 //RX_FDEQ_BIN_1 +222 0x0302 //RX_FDEQ_BIN_2 +223 0x0304 //RX_FDEQ_BIN_3 +224 0x0405 //RX_FDEQ_BIN_4 +225 0x0506 //RX_FDEQ_BIN_5 +226 0x0708 //RX_FDEQ_BIN_6 +227 0x090A //RX_FDEQ_BIN_7 +228 0x0B0C //RX_FDEQ_BIN_8 +229 0x0D0E //RX_FDEQ_BIN_9 +230 0x1013 //RX_FDEQ_BIN_10 +231 0x1719 //RX_FDEQ_BIN_11 +232 0x1B1E //RX_FDEQ_BIN_12 +233 0x1E1E //RX_FDEQ_BIN_13 +234 0x1E28 //RX_FDEQ_BIN_14 +235 0x282C //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x4000 //RX_FDEQ_RESRV_0 +245 0x0320 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0030 //RX_FDDRC_BAND_MARGIN_1 +248 0x0050 //RX_FDDRC_BAND_MARGIN_2 +249 0x0080 //RX_FDDRC_BAND_MARGIN_3 +250 0x0007 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x5000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x6400 //RX_FDDRC_THRD_3_2 +258 0x6400 //RX_FDDRC_THRD_3_3 +259 0x2000 //RX_FDDRC_SLANT_0_0 +260 0x2000 //RX_FDDRC_SLANT_0_1 +261 0x2000 //RX_FDDRC_SLANT_0_2 +262 0x2000 //RX_FDDRC_SLANT_0_3 +263 0x5333 //RX_FDDRC_SLANT_1_0 +264 0x5333 //RX_FDDRC_SLANT_1_1 +265 0x5333 //RX_FDDRC_SLANT_1_2 +266 0x5333 //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +286 0x0024 //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 +#VOL 3 +163 0x1000 //RX_TDDRC_ALPHA_UP_1 +164 0x1000 //RX_TDDRC_ALPHA_UP_2 +165 0x1000 //RX_TDDRC_ALPHA_UP_3 +166 0x1000 //RX_TDDRC_ALPHA_UP_4 +184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +190 0x7000 //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +269 0x0000 //RX_TDDRC_THRD_0 +270 0x0000 //RX_TDDRC_THRD_1 +271 0x1800 //RX_TDDRC_THRD_2 +272 0x1800 //RX_TDDRC_THRD_3 +273 0x3000 //RX_TDDRC_SLANT_0 +274 0x6E00 //RX_TDDRC_SLANT_1 +275 0x1000 //RX_TDDRC_ALPHA_UP_0 +276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x199A //RX_TDDRC_HMNC_GAIN +279 0x0001 //RX_TDDRC_SMT_FLAG +280 0x0CCD //RX_TDDRC_SMT_W +281 0x02FD //RX_TDDRC_DRC_GAIN +195 0x0020 //RX_FDEQ_SUBNUM +196 0x4E4E //RX_FDEQ_GAIN_0 +197 0x4E56 //RX_FDEQ_GAIN_1 +198 0x6878 //RX_FDEQ_GAIN_2 +199 0x8088 //RX_FDEQ_GAIN_3 +200 0x848B //RX_FDEQ_GAIN_4 +201 0x8F8E //RX_FDEQ_GAIN_5 +202 0x9494 //RX_FDEQ_GAIN_6 +203 0x96A0 //RX_FDEQ_GAIN_7 +204 0xB8A0 //RX_FDEQ_GAIN_8 +205 0xA99D //RX_FDEQ_GAIN_9 +206 0x9D6A //RX_FDEQ_GAIN_10 +207 0x626B //RX_FDEQ_GAIN_11 +208 0x6C78 //RX_FDEQ_GAIN_12 +209 0x7884 //RX_FDEQ_GAIN_13 +210 0x9098 //RX_FDEQ_GAIN_14 +211 0x9CAC //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0202 //RX_FDEQ_BIN_0 +221 0x0202 //RX_FDEQ_BIN_1 +222 0x0302 //RX_FDEQ_BIN_2 +223 0x0304 //RX_FDEQ_BIN_3 +224 0x0405 //RX_FDEQ_BIN_4 +225 0x0506 //RX_FDEQ_BIN_5 +226 0x0708 //RX_FDEQ_BIN_6 +227 0x090A //RX_FDEQ_BIN_7 +228 0x0B0C //RX_FDEQ_BIN_8 +229 0x0D0E //RX_FDEQ_BIN_9 +230 0x1013 //RX_FDEQ_BIN_10 +231 0x1719 //RX_FDEQ_BIN_11 +232 0x1B1E //RX_FDEQ_BIN_12 +233 0x1E1E //RX_FDEQ_BIN_13 +234 0x1E28 //RX_FDEQ_BIN_14 +235 0x282C //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x4000 //RX_FDEQ_RESRV_0 +245 0x0320 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0030 //RX_FDDRC_BAND_MARGIN_1 +248 0x0050 //RX_FDDRC_BAND_MARGIN_2 +249 0x0080 //RX_FDDRC_BAND_MARGIN_3 +250 0x0007 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x5000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x6400 //RX_FDDRC_THRD_3_2 +258 0x6400 //RX_FDDRC_THRD_3_3 +259 0x2000 //RX_FDDRC_SLANT_0_0 +260 0x2000 //RX_FDDRC_SLANT_0_1 +261 0x2000 //RX_FDDRC_SLANT_0_2 +262 0x2000 //RX_FDDRC_SLANT_0_3 +263 0x5333 //RX_FDDRC_SLANT_1_0 +264 0x5333 //RX_FDDRC_SLANT_1_1 +265 0x5333 //RX_FDDRC_SLANT_1_2 +266 0x5333 //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +286 0x003A //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 +#VOL 4 +163 0x1000 //RX_TDDRC_ALPHA_UP_1 +164 0x1000 //RX_TDDRC_ALPHA_UP_2 +165 0x1000 //RX_TDDRC_ALPHA_UP_3 +166 0x1000 //RX_TDDRC_ALPHA_UP_4 +184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +190 0x7000 //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +269 0x0000 //RX_TDDRC_THRD_0 +270 0x0000 //RX_TDDRC_THRD_1 +271 0x1800 //RX_TDDRC_THRD_2 +272 0x1800 //RX_TDDRC_THRD_3 +273 0x3000 //RX_TDDRC_SLANT_0 +274 0x6E00 //RX_TDDRC_SLANT_1 +275 0x1000 //RX_TDDRC_ALPHA_UP_0 +276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x199A //RX_TDDRC_HMNC_GAIN +279 0x0001 //RX_TDDRC_SMT_FLAG +280 0x0CCD //RX_TDDRC_SMT_W +281 0x02FD //RX_TDDRC_DRC_GAIN +195 0x0020 //RX_FDEQ_SUBNUM +196 0x4E4E //RX_FDEQ_GAIN_0 +197 0x4E56 //RX_FDEQ_GAIN_1 +198 0x6878 //RX_FDEQ_GAIN_2 +199 0x8088 //RX_FDEQ_GAIN_3 +200 0x848B //RX_FDEQ_GAIN_4 +201 0x8F8E //RX_FDEQ_GAIN_5 +202 0x9494 //RX_FDEQ_GAIN_6 +203 0x96A0 //RX_FDEQ_GAIN_7 +204 0xB8A0 //RX_FDEQ_GAIN_8 +205 0xA99D //RX_FDEQ_GAIN_9 +206 0x9D6A //RX_FDEQ_GAIN_10 +207 0x626B //RX_FDEQ_GAIN_11 +208 0x6C78 //RX_FDEQ_GAIN_12 +209 0x7884 //RX_FDEQ_GAIN_13 +210 0x9098 //RX_FDEQ_GAIN_14 +211 0x9CAC //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0202 //RX_FDEQ_BIN_0 +221 0x0202 //RX_FDEQ_BIN_1 +222 0x0302 //RX_FDEQ_BIN_2 +223 0x0304 //RX_FDEQ_BIN_3 +224 0x0405 //RX_FDEQ_BIN_4 +225 0x0506 //RX_FDEQ_BIN_5 +226 0x0708 //RX_FDEQ_BIN_6 +227 0x090A //RX_FDEQ_BIN_7 +228 0x0B0C //RX_FDEQ_BIN_8 +229 0x0D0E //RX_FDEQ_BIN_9 +230 0x1013 //RX_FDEQ_BIN_10 +231 0x1719 //RX_FDEQ_BIN_11 +232 0x1B1E //RX_FDEQ_BIN_12 +233 0x1E1E //RX_FDEQ_BIN_13 +234 0x1E28 //RX_FDEQ_BIN_14 +235 0x282C //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x4000 //RX_FDEQ_RESRV_0 +245 0x0320 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0030 //RX_FDDRC_BAND_MARGIN_1 +248 0x0050 //RX_FDDRC_BAND_MARGIN_2 +249 0x0080 //RX_FDDRC_BAND_MARGIN_3 +250 0x0007 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x5000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x6400 //RX_FDDRC_THRD_3_2 +258 0x6400 //RX_FDDRC_THRD_3_3 +259 0x2000 //RX_FDDRC_SLANT_0_0 +260 0x2000 //RX_FDDRC_SLANT_0_1 +261 0x2000 //RX_FDDRC_SLANT_0_2 +262 0x2000 //RX_FDDRC_SLANT_0_3 +263 0x5333 //RX_FDDRC_SLANT_1_0 +264 0x5333 //RX_FDDRC_SLANT_1_1 +265 0x5333 //RX_FDDRC_SLANT_1_2 +266 0x5333 //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +286 0x0059 //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 +#VOL 5 +163 0x1000 //RX_TDDRC_ALPHA_UP_1 +164 0x1000 //RX_TDDRC_ALPHA_UP_2 +165 0x1000 //RX_TDDRC_ALPHA_UP_3 +166 0x1000 //RX_TDDRC_ALPHA_UP_4 +184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +190 0x7000 //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +269 0x0000 //RX_TDDRC_THRD_0 +270 0x0000 //RX_TDDRC_THRD_1 +271 0x1800 //RX_TDDRC_THRD_2 +272 0x1800 //RX_TDDRC_THRD_3 +273 0x3000 //RX_TDDRC_SLANT_0 +274 0x6E00 //RX_TDDRC_SLANT_1 +275 0x1000 //RX_TDDRC_ALPHA_UP_0 +276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x199A //RX_TDDRC_HMNC_GAIN +279 0x0001 //RX_TDDRC_SMT_FLAG +280 0x0CCD //RX_TDDRC_SMT_W +281 0x02FD //RX_TDDRC_DRC_GAIN +195 0x0020 //RX_FDEQ_SUBNUM +196 0x4E4E //RX_FDEQ_GAIN_0 +197 0x4E56 //RX_FDEQ_GAIN_1 +198 0x6878 //RX_FDEQ_GAIN_2 +199 0x8088 //RX_FDEQ_GAIN_3 +200 0x848B //RX_FDEQ_GAIN_4 +201 0x8F8E //RX_FDEQ_GAIN_5 +202 0x9494 //RX_FDEQ_GAIN_6 +203 0x96A0 //RX_FDEQ_GAIN_7 +204 0xB8A0 //RX_FDEQ_GAIN_8 +205 0xA99D //RX_FDEQ_GAIN_9 +206 0x9D6A //RX_FDEQ_GAIN_10 +207 0x626B //RX_FDEQ_GAIN_11 +208 0x6C78 //RX_FDEQ_GAIN_12 +209 0x7884 //RX_FDEQ_GAIN_13 +210 0x9098 //RX_FDEQ_GAIN_14 +211 0x9CAC //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0202 //RX_FDEQ_BIN_0 +221 0x0202 //RX_FDEQ_BIN_1 +222 0x0302 //RX_FDEQ_BIN_2 +223 0x0304 //RX_FDEQ_BIN_3 +224 0x0405 //RX_FDEQ_BIN_4 +225 0x0506 //RX_FDEQ_BIN_5 +226 0x0708 //RX_FDEQ_BIN_6 +227 0x090A //RX_FDEQ_BIN_7 +228 0x0B0C //RX_FDEQ_BIN_8 +229 0x0D0E //RX_FDEQ_BIN_9 +230 0x1013 //RX_FDEQ_BIN_10 +231 0x1719 //RX_FDEQ_BIN_11 +232 0x1B1E //RX_FDEQ_BIN_12 +233 0x1E1E //RX_FDEQ_BIN_13 +234 0x1E28 //RX_FDEQ_BIN_14 +235 0x282C //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x4000 //RX_FDEQ_RESRV_0 +245 0x0320 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0030 //RX_FDDRC_BAND_MARGIN_1 +248 0x0050 //RX_FDDRC_BAND_MARGIN_2 +249 0x0080 //RX_FDDRC_BAND_MARGIN_3 +250 0x0007 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x5000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x6400 //RX_FDDRC_THRD_3_2 +258 0x6400 //RX_FDDRC_THRD_3_3 +259 0x2000 //RX_FDDRC_SLANT_0_0 +260 0x2000 //RX_FDDRC_SLANT_0_1 +261 0x2000 //RX_FDDRC_SLANT_0_2 +262 0x2000 //RX_FDDRC_SLANT_0_3 +263 0x5333 //RX_FDDRC_SLANT_1_0 +264 0x5333 //RX_FDDRC_SLANT_1_1 +265 0x5333 //RX_FDDRC_SLANT_1_2 +266 0x5333 //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +286 0x0090 //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 +#VOL 6 +163 0x1000 //RX_TDDRC_ALPHA_UP_1 +164 0x1000 //RX_TDDRC_ALPHA_UP_2 +165 0x1000 //RX_TDDRC_ALPHA_UP_3 +166 0x1000 //RX_TDDRC_ALPHA_UP_4 +184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +190 0x7000 //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +269 0x0000 //RX_TDDRC_THRD_0 +270 0x0000 //RX_TDDRC_THRD_1 +271 0x1800 //RX_TDDRC_THRD_2 +272 0x1800 //RX_TDDRC_THRD_3 +273 0x3000 //RX_TDDRC_SLANT_0 +274 0x6E00 //RX_TDDRC_SLANT_1 +275 0x1000 //RX_TDDRC_ALPHA_UP_0 +276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x199A //RX_TDDRC_HMNC_GAIN +279 0x0001 //RX_TDDRC_SMT_FLAG +280 0x0CCD //RX_TDDRC_SMT_W +281 0x02FD //RX_TDDRC_DRC_GAIN +195 0x0020 //RX_FDEQ_SUBNUM +196 0x4E4E //RX_FDEQ_GAIN_0 +197 0x4E56 //RX_FDEQ_GAIN_1 +198 0x6878 //RX_FDEQ_GAIN_2 +199 0x8088 //RX_FDEQ_GAIN_3 +200 0x848B //RX_FDEQ_GAIN_4 +201 0x8F8E //RX_FDEQ_GAIN_5 +202 0x9494 //RX_FDEQ_GAIN_6 +203 0x96A0 //RX_FDEQ_GAIN_7 +204 0xB8A0 //RX_FDEQ_GAIN_8 +205 0xA99D //RX_FDEQ_GAIN_9 +206 0x9D6A //RX_FDEQ_GAIN_10 +207 0x626B //RX_FDEQ_GAIN_11 +208 0x6C78 //RX_FDEQ_GAIN_12 +209 0x7884 //RX_FDEQ_GAIN_13 +210 0x9098 //RX_FDEQ_GAIN_14 +211 0x9CAC //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0202 //RX_FDEQ_BIN_0 +221 0x0202 //RX_FDEQ_BIN_1 +222 0x0302 //RX_FDEQ_BIN_2 +223 0x0304 //RX_FDEQ_BIN_3 +224 0x0405 //RX_FDEQ_BIN_4 +225 0x0506 //RX_FDEQ_BIN_5 +226 0x0708 //RX_FDEQ_BIN_6 +227 0x090A //RX_FDEQ_BIN_7 +228 0x0B0C //RX_FDEQ_BIN_8 +229 0x0D0E //RX_FDEQ_BIN_9 +230 0x1013 //RX_FDEQ_BIN_10 +231 0x1719 //RX_FDEQ_BIN_11 +232 0x1B1E //RX_FDEQ_BIN_12 +233 0x1E1E //RX_FDEQ_BIN_13 +234 0x1E28 //RX_FDEQ_BIN_14 +235 0x282C //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x4000 //RX_FDEQ_RESRV_0 +245 0x0320 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0030 //RX_FDDRC_BAND_MARGIN_1 +248 0x0050 //RX_FDDRC_BAND_MARGIN_2 +249 0x0080 //RX_FDDRC_BAND_MARGIN_3 +250 0x0007 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x5000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x6400 //RX_FDDRC_THRD_3_2 +258 0x6400 //RX_FDDRC_THRD_3_3 +259 0x2000 //RX_FDDRC_SLANT_0_0 +260 0x2000 //RX_FDDRC_SLANT_0_1 +261 0x2000 //RX_FDDRC_SLANT_0_2 +262 0x2000 //RX_FDDRC_SLANT_0_3 +263 0x5333 //RX_FDDRC_SLANT_1_0 +264 0x5333 //RX_FDDRC_SLANT_1_1 +265 0x5333 //RX_FDDRC_SLANT_1_2 +266 0x5333 //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +286 0x0100 //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 #CASE_NAME HANDSET-HANDSET-CUSTOM2-FB -#PARAM_TYPE TX+RX -#TOTAL_CUSTOM_STEP 7 +#PARAM_MODE FULL +#PARAM_TYPE TX+2RX +#TOTAL_CUSTOM_STEP 7+7 #TX 0 0x0000 //TX_OPERATION_MODE_0 1 0x0000 //TX_OPERATION_MODE_1 @@ -2011,12 +2929,12 @@ 248 0xF800 //TX_THR_SN_EST_6 249 0xF700 //TX_THR_SN_EST_7 250 0x0000 //TX_DELTA_THR_SN_EST_0 -251 0x0100 //TX_DELTA_THR_SN_EST_1 +251 0x0200 //TX_DELTA_THR_SN_EST_1 252 0x0200 //TX_DELTA_THR_SN_EST_2 253 0x0200 //TX_DELTA_THR_SN_EST_3 -254 0x0200 //TX_DELTA_THR_SN_EST_4 -255 0x0100 //TX_DELTA_THR_SN_EST_5 -256 0x0200 //TX_DELTA_THR_SN_EST_6 +254 0x0100 //TX_DELTA_THR_SN_EST_4 +255 0x0200 //TX_DELTA_THR_SN_EST_5 +256 0x0100 //TX_DELTA_THR_SN_EST_6 257 0x0200 //TX_DELTA_THR_SN_EST_7 258 0x4000 //TX_LAMBDA_NN_EST_0 259 0x4000 //TX_LAMBDA_NN_EST_1 @@ -2044,16 +2962,16 @@ 281 0x0014 //TX_NS_LVL_CTRL_0 282 0x0016 //TX_NS_LVL_CTRL_1 283 0x0016 //TX_NS_LVL_CTRL_2 -284 0x0016 //TX_NS_LVL_CTRL_3 -285 0x0018 //TX_NS_LVL_CTRL_4 -286 0x0016 //TX_NS_LVL_CTRL_5 -287 0x0012 //TX_NS_LVL_CTRL_6 +284 0x0018 //TX_NS_LVL_CTRL_3 +285 0x0016 //TX_NS_LVL_CTRL_4 +286 0x0012 //TX_NS_LVL_CTRL_5 +287 0x0016 //TX_NS_LVL_CTRL_6 288 0x0017 //TX_NS_LVL_CTRL_7 289 0x000E //TX_MIN_GAIN_S_0 -290 0x0012 //TX_MIN_GAIN_S_1 -291 0x0007 //TX_MIN_GAIN_S_2 -292 0x0012 //TX_MIN_GAIN_S_3 -293 0x0010 //TX_MIN_GAIN_S_4 +290 0x0007 //TX_MIN_GAIN_S_1 +291 0x0012 //TX_MIN_GAIN_S_2 +292 0x0010 //TX_MIN_GAIN_S_3 +293 0x0012 //TX_MIN_GAIN_S_4 294 0x0012 //TX_MIN_GAIN_S_5 295 0x0012 //TX_MIN_GAIN_S_6 296 0x0012 //TX_MIN_GAIN_S_7 @@ -2075,29 +2993,29 @@ 312 0x7FFF //TX_A_POST_FILT_0 313 0x2000 //TX_A_POST_FILT_1 314 0x4000 //TX_A_POST_FILT_S_0 -315 0x5000 //TX_A_POST_FILT_S_1 +315 0x4000 //TX_A_POST_FILT_S_1 316 0x4000 //TX_A_POST_FILT_S_2 317 0x4000 //TX_A_POST_FILT_S_3 318 0x4000 //TX_A_POST_FILT_S_4 319 0x4000 //TX_A_POST_FILT_S_5 -320 0x4000 //TX_A_POST_FILT_S_6 +320 0x5000 //TX_A_POST_FILT_S_6 321 0x7000 //TX_A_POST_FILT_S_7 322 0x1000 //TX_B_POST_FILT_0 323 0x2000 //TX_B_POST_FILT_1 -324 0x3000 //TX_B_POST_FILT_2 +324 0x2000 //TX_B_POST_FILT_2 325 0x2000 //TX_B_POST_FILT_3 -326 0x5000 //TX_B_POST_FILT_4 +326 0x2000 //TX_B_POST_FILT_4 327 0x2000 //TX_B_POST_FILT_5 -328 0x6000 //TX_B_POST_FILT_6 +328 0x3000 //TX_B_POST_FILT_6 329 0x3000 //TX_B_POST_FILT_7 330 0x1000 //TX_B_LESSCUT_RTO_S_0 -331 0x6000 //TX_B_LESSCUT_RTO_S_1 -332 0x6000 //TX_B_LESSCUT_RTO_S_2 -333 0x6000 //TX_B_LESSCUT_RTO_S_3 -334 0x6000 //TX_B_LESSCUT_RTO_S_4 -335 0x6000 //TX_B_LESSCUT_RTO_S_5 -336 0x7FFF //TX_B_LESSCUT_RTO_S_6 -337 0x7FFF //TX_B_LESSCUT_RTO_S_7 +331 0x1000 //TX_B_LESSCUT_RTO_S_1 +332 0x1000 //TX_B_LESSCUT_RTO_S_2 +333 0x1000 //TX_B_LESSCUT_RTO_S_3 +334 0x1000 //TX_B_LESSCUT_RTO_S_4 +335 0x1000 //TX_B_LESSCUT_RTO_S_5 +336 0x1000 //TX_B_LESSCUT_RTO_S_6 +337 0x1000 //TX_B_LESSCUT_RTO_S_7 338 0x7E14 //TX_LAMBDA_PFILT 339 0x7C29 //TX_LAMBDA_PFILT_S_0 340 0x7C29 //TX_LAMBDA_PFILT_S_1 @@ -2140,10 +3058,10 @@ 377 0x4E20 //TX_NOISE_TH_5_4 378 0x39DF //TX_NOISE_TH_6 379 0x0014 //TX_MINENOISE_TH -380 0x4000 //TX_MINENOISE_MIC0_TH_MTS -381 0xFFEE //TX_MINENOISE_MIC0_TH_EXP -382 0x6000 //TX_MINENOISE_MIC0_S_TH_MTS -383 0xFFF3 //TX_MINENOISE_MIC0_S_TH_EXP +380 0xD508 //TX_MORENS_TFMASK_TH +381 0x0001 //TX_DRC_QUIET_FLOOR +382 0x6D60 //TX_RATIODTL_CUT_TH +383 0x1482 //TX_DT_CUT_K1 384 0x00A5 //TX_OUT_ENER_S_TH_CLEAN 385 0x00A5 //TX_OUT_ENER_S_TH_LESSCLEAN 386 0x00A5 //TX_OUT_ENER_S_TH_NOISY @@ -2151,15 +3069,15 @@ 388 0x0200 //TX_OUT_ENER_TH_SPEECH 389 0x2000 //TX_SN_NPB_GAIN 390 0x0000 //TX_NN_NPB_GAIN -391 0x0000 //TX_CSX_ALPHA_0 -392 0x0000 //TX_CSX_ALPHA_1 -393 0x0000 //TX_CSX_ALPHA_2 -394 0x0000 //TX_CSX_ALPHA_3 -395 0x0800 //TX_MU_ARSP_EST -396 0x00C8 //TX_P_OUTBEAM_MIN_TH +391 0x3000 //TX_POST_MASK_SUP_HSNE +392 0x07D0 //TX_TAIL_DET_TH +393 0x4000 //TX_B_LESSCUT_RTO_WTA +394 0x0000 //TX_MEL_G_R +395 0x0080 //TX_SUPHIGH_TH +396 0x0000 //TX_MASK_G_R 397 0x0002 //TX_EXTRA_NS_L -398 0x0800 //TX_EXTRA_NS_A -399 0x0005 //TX_VR_NOISE_FLOOR_TH +398 0x1800 //TX_C_POST_FLT_MASK +399 0x7FFF //TX_A_POST_FLT_WNS 400 0x0148 //TX_MIN_G_LOW300HZ 401 0x0004 //TX_MAXLEVEL_CNG 402 0x00B4 //TX_STN_NOISE_TH @@ -2274,16 +3192,16 @@ 511 0x6666 //TX_MIC_TO_BFGAIN 512 0x0000 //TX_MICTOBFGAIN0 513 0x0000 //TX_FASTMUE_TH -514 0x0000 //TX_DERVB_LEN_0 -515 0x0000 //TX_DERVB_LEN_1 -516 0x0000 //TX_RHO_DERVB -517 0x0000 //TX_MIC_INDX_DERVB -518 0x0000 //TX_MU_DERVB -519 0x0000 //TX_DR_RESRV_0 -520 0x0000 //TX_DR_RESRV_1 -521 0x0000 //TX_DR_RESRV_2 -522 0x0000 //TX_DR_RESRV_3 -523 0x0000 //TX_DR_RESRV_4 +514 0x2CCC //TX_DEREVERB_LF_MU +515 0x3200 //TX_DEREVERB_HF_MU +516 0x0007 //TX_DEREVERB_DELAY +517 0x0004 //TX_DEREVERB_COEF_LEN +518 0x0003 //TX_DEREVERB_DNR +519 0x0000 //TX_DEREVERB_ALPHA +520 0x0000 //TX_DEREVERB_BETA +521 0x7FFF //TX_GSC_RTOL_TH +522 0x7FFF //TX_GSC_RTOH_TH +523 0x7E2C //TX_WIDE2_MEANHTH 524 0x0000 //TX_DR_RESRV_5 525 0x0000 //TX_DR_RESRV_6 526 0x0000 //TX_DR_RESRV_7 @@ -2657,6 +3575,71 @@ 894 0xC000 //TX_FASTNS_SSA_THHFL 895 0xCCCC //TX_FASTNS_SSA_THLFH 896 0xD999 //TX_FASTNS_SSA_THHFH +897 0x2339 //TX_SENDFUNC_REG_MICMUTE +898 0x0021 //TX_SENDFUNC_REG_MICMUTE1 +899 0x02BC //TX_MICMUTE_RATIO_THR +900 0x0140 //TX_MICMUTE_AMP_THR +901 0x0004 //TX_MICMUTE_HPF_IND +902 0x00C0 //TX_MICMUTE_LOG_EYR_TH +903 0x0008 //TX_MICMUTE_CVG_TIME +904 0x0008 //TX_MICMUTE_RELEASE_TIME +905 0x01FE //TX_MIC_VOLUME_MIC0MUTE +906 0x0020 //TX_MICMUTE_EPD_OFFSET_0 +907 0x001E //TX_MICMUTE_FRQ_AEC_L +908 0x7999 //TX_MICMUTE_EAD_THR +909 0x7FFF //TX_MICMUTE_LAMBDA_CB_NLE +910 0x7FFF //TX_MICMUTE_LAMBDA_RE_EST +911 0x4000 //TX_DTD_THR1_MICMUTE_0 +912 0x7000 //TX_DTD_THR1_MICMUTE_1 +913 0x7FFF //TX_DTD_THR1_MICMUTE_2 +914 0x7FFF //TX_DTD_THR1_MICMUTE_3 +915 0x6CCC //TX_DTD_THR2_MICMUTE_0 +916 0x0400 //TX_MICMUTE_MIN_EQ_RE_EST_0 +917 0x0400 //TX_MICMUTE_MIN_EQ_RE_EST_1 +918 0x1000 //TX_MICMUTE_MIN_EQ_RE_EST_2 +919 0x7FFF //TX_MICMUTE_MIN_EQ_RE_EST_3 +920 0x7FFF //TX_MICMUTE_MIN_EQ_RE_EST_4 +921 0x4000 //TX_MICMUTE_C_POST_FLT +922 0x03E8 //TX_MICMUTE_DT_CUT_K +923 0x0001 //TX_MICMUTE_DT_CUT_THR +924 0x03E8 //TX_MICMUTE_DT_CUT_K2 +925 0x0001 //TX_MICMUTE_DT_CUT_THR2 +926 0x0064 //TX_MICMUTE_DT2_HOLD_N +927 0x1000 //TX_MICMUTE_RATIODTH_THCUT +928 0x1000 //TX_MICMUTE_B_POST_FLT_ECHOL +929 0x7FFF //TX_MICMUTE_B_POST_FLT_ECHOH +930 0x0400 //TX_MICMUTE_C_POST_FLT_MASK +931 0x7999 //TX_MICMUTE_RATIODTL_CUT_TH +932 0x0258 //TX_MICMUTE_DT_CUT_K1 +933 0x0800 //TX_MICMUTE_N2_SN_EST +934 0xFC00 //TX_MICMUTE_THR_SN_EST_0 +935 0x001C //TX_MICMUTE_MIN_G_CTRL_0 +936 0x6000 //TX_MICMUTE_A_POST_FILT_S_0 +937 0x7000 //TX_MICMUTE_B_POST_FILT_0 +938 0x2710 //TX_MIC1RUB_AMP_THR +939 0x0010 //TX_MIC1MUTE_RATIO_THR +940 0x0450 //TX_MIC1MUTE_AMP_THR +941 0x0008 //TX_MIC1MUTE_CVG_TIME +942 0x0008 //TX_MIC1MUTE_RELEASE_TIME +943 0x0000 //TX_AMS_RESRV_01 +944 0x0000 //TX_AMS_RESRV_02 +945 0x0000 //TX_AMS_RESRV_03 +946 0x0000 //TX_AMS_RESRV_04 +947 0x0000 //TX_AMS_RESRV_05 +948 0x0000 //TX_AMS_RESRV_06 +949 0x0000 //TX_AMS_RESRV_07 +950 0x0000 //TX_AMS_RESRV_08 +951 0x0000 //TX_AMS_RESRV_09 +952 0x0000 //TX_AMS_RESRV_10 +953 0x0000 //TX_AMS_RESRV_11 +954 0x0000 //TX_AMS_RESRV_12 +955 0x0000 //TX_AMS_RESRV_13 +956 0x0000 //TX_AMS_RESRV_14 +957 0x0000 //TX_AMS_RESRV_15 +958 0x0000 //TX_AMS_RESRV_16 +959 0x0000 //TX_AMS_RESRV_17 +960 0x0000 //TX_AMS_RESRV_18 +961 0x0000 //TX_AMS_RESRV_19 #RX 0 0x003C //RX_RECVFUNC_MODE_0 1 0x0000 //RX_RECVFUNC_MODE_1 @@ -3508,10 +4491,862 @@ 110 0x0000 //RX_FDDRC_RESRV_0 129 0x0100 //RX_SPK_VOL 130 0x0000 //RX_VOL_RESRV_0 +#RX 2 +157 0x003C //RX_RECVFUNC_MODE_0 +158 0x0000 //RX_RECVFUNC_MODE_1 +159 0x0004 //RX_SAMPLINGFREQ_SIG +160 0x0004 //RX_SAMPLINGFREQ_PROC +161 0x000A //RX_FRAME_SZ +162 0x0000 //RX_DELAY_OPT +163 0x1000 //RX_TDDRC_ALPHA_UP_1 +164 0x1000 //RX_TDDRC_ALPHA_UP_2 +165 0x1000 //RX_TDDRC_ALPHA_UP_3 +166 0x1000 //RX_TDDRC_ALPHA_UP_4 +167 0x0722 //RX_PGA +168 0x7FFF //RX_A_HP +169 0x4000 //RX_B_PE +170 0x5800 //RX_THR_PITCH_DET_0 +171 0x5000 //RX_THR_PITCH_DET_1 +172 0x4000 //RX_THR_PITCH_DET_2 +173 0x0008 //RX_PITCH_BFR_LEN +174 0x0003 //RX_SBD_PITCH_DET +175 0x0100 //RX_PP_RESRV_0 +176 0x0020 //RX_PP_RESRV_1 +177 0x0600 //RX_N_SN_EST +178 0x000C //RX_N2_SN_EST +179 0x000F //RX_NS_LVL_CTRL +180 0xF800 //RX_THR_SN_EST +181 0x7E00 //RX_LAMBDA_PFILT +182 0x000A //RX_FENS_RESRV_0 +183 0x0190 //RX_FENS_RESRV_1 +184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +187 0x0002 //RX_EXTRA_NS_L +188 0x0800 //RX_EXTRA_NS_A +189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +190 0x7000 //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +192 0x199A //RX_A_POST_FLT +193 0x0000 //RX_LMT_THRD +194 0x4000 //RX_LMT_ALPHA +195 0x0020 //RX_FDEQ_SUBNUM +196 0x4E4E //RX_FDEQ_GAIN_0 +197 0x4E56 //RX_FDEQ_GAIN_1 +198 0x6878 //RX_FDEQ_GAIN_2 +199 0x8088 //RX_FDEQ_GAIN_3 +200 0x848B //RX_FDEQ_GAIN_4 +201 0x8F8E //RX_FDEQ_GAIN_5 +202 0x9494 //RX_FDEQ_GAIN_6 +203 0x96A0 //RX_FDEQ_GAIN_7 +204 0xB8A0 //RX_FDEQ_GAIN_8 +205 0xA99D //RX_FDEQ_GAIN_9 +206 0x9D6A //RX_FDEQ_GAIN_10 +207 0x626B //RX_FDEQ_GAIN_11 +208 0x6C78 //RX_FDEQ_GAIN_12 +209 0x7884 //RX_FDEQ_GAIN_13 +210 0x9098 //RX_FDEQ_GAIN_14 +211 0x9CAC //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0202 //RX_FDEQ_BIN_0 +221 0x0202 //RX_FDEQ_BIN_1 +222 0x0302 //RX_FDEQ_BIN_2 +223 0x0304 //RX_FDEQ_BIN_3 +224 0x0405 //RX_FDEQ_BIN_4 +225 0x0506 //RX_FDEQ_BIN_5 +226 0x0708 //RX_FDEQ_BIN_6 +227 0x090A //RX_FDEQ_BIN_7 +228 0x0B0C //RX_FDEQ_BIN_8 +229 0x0D0E //RX_FDEQ_BIN_9 +230 0x1013 //RX_FDEQ_BIN_10 +231 0x1719 //RX_FDEQ_BIN_11 +232 0x1B1E //RX_FDEQ_BIN_12 +233 0x1E1E //RX_FDEQ_BIN_13 +234 0x1E28 //RX_FDEQ_BIN_14 +235 0x282C //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x4000 //RX_FDEQ_RESRV_0 +245 0x0320 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0030 //RX_FDDRC_BAND_MARGIN_1 +248 0x0050 //RX_FDDRC_BAND_MARGIN_2 +249 0x0080 //RX_FDDRC_BAND_MARGIN_3 +250 0x0007 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x5000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x6400 //RX_FDDRC_THRD_3_2 +258 0x6400 //RX_FDDRC_THRD_3_3 +259 0x2000 //RX_FDDRC_SLANT_0_0 +260 0x2000 //RX_FDDRC_SLANT_0_1 +261 0x2000 //RX_FDDRC_SLANT_0_2 +262 0x2000 //RX_FDDRC_SLANT_0_3 +263 0x5333 //RX_FDDRC_SLANT_1_0 +264 0x5333 //RX_FDDRC_SLANT_1_1 +265 0x5333 //RX_FDDRC_SLANT_1_2 +266 0x5333 //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +268 0x0002 //RX_FILTINDX +269 0x0000 //RX_TDDRC_THRD_0 +270 0x0000 //RX_TDDRC_THRD_1 +271 0x1800 //RX_TDDRC_THRD_2 +272 0x1800 //RX_TDDRC_THRD_3 +273 0x3000 //RX_TDDRC_SLANT_0 +274 0x6E00 //RX_TDDRC_SLANT_1 +275 0x1000 //RX_TDDRC_ALPHA_UP_0 +276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x199A //RX_TDDRC_HMNC_GAIN +279 0x0001 //RX_TDDRC_SMT_FLAG +280 0x0CCD //RX_TDDRC_SMT_W +281 0x02FD //RX_TDDRC_DRC_GAIN +282 0x7C00 //RX_LAMBDA_PKA_FP +283 0x2000 //RX_TPKA_FP +284 0x2000 //RX_MIN_G_FP +285 0x0080 //RX_MAX_G_FP +286 0x000D //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 +288 0x0000 //RX_MAXLEVEL_CNG +289 0x3000 //RX_BWE_UV_TH +290 0x3000 //RX_BWE_UV_TH2 +291 0x1800 //RX_BWE_UV_TH3 +292 0x1000 //RX_BWE_V_TH +293 0x04CD //RX_BWE_GAIN1_V_TH1 +294 0x0F33 //RX_BWE_GAIN1_V_TH2 +295 0x7333 //RX_BWE_UV_EQ +296 0x199A //RX_BWE_V_EQ +297 0x7333 //RX_BWE_TONE_TH +298 0x0004 //RX_BWE_UV_HOLD_T +299 0x6CCD //RX_BWE_GAIN2_ALPHA +300 0x799A //RX_BWE_GAIN3_ALPHA +301 0x001E //RX_BWE_CUTOFF +302 0x3000 //RX_BWE_GAINFILL +303 0x3200 //RX_BWE_MAXTH_TONE +304 0x2000 //RX_BWE_EQ_0 +305 0x2000 //RX_BWE_EQ_1 +306 0x2000 //RX_BWE_EQ_2 +307 0x2000 //RX_BWE_EQ_3 +308 0x2000 //RX_BWE_EQ_4 +309 0x2000 //RX_BWE_EQ_5 +310 0x2000 //RX_BWE_EQ_6 +311 0x0000 //RX_BWE_RESRV_0 +312 0x0000 //RX_BWE_RESRV_1 +313 0x0000 //RX_BWE_RESRV_2 +#VOL 0 +163 0x1000 //RX_TDDRC_ALPHA_UP_1 +164 0x1000 //RX_TDDRC_ALPHA_UP_2 +165 0x1000 //RX_TDDRC_ALPHA_UP_3 +166 0x1000 //RX_TDDRC_ALPHA_UP_4 +184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +190 0x7000 //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +269 0x0000 //RX_TDDRC_THRD_0 +270 0x0000 //RX_TDDRC_THRD_1 +271 0x1800 //RX_TDDRC_THRD_2 +272 0x1800 //RX_TDDRC_THRD_3 +273 0x3000 //RX_TDDRC_SLANT_0 +274 0x6E00 //RX_TDDRC_SLANT_1 +275 0x1000 //RX_TDDRC_ALPHA_UP_0 +276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x199A //RX_TDDRC_HMNC_GAIN +279 0x0001 //RX_TDDRC_SMT_FLAG +280 0x0CCD //RX_TDDRC_SMT_W +281 0x02FD //RX_TDDRC_DRC_GAIN +195 0x0020 //RX_FDEQ_SUBNUM +196 0x4E4E //RX_FDEQ_GAIN_0 +197 0x4E56 //RX_FDEQ_GAIN_1 +198 0x6878 //RX_FDEQ_GAIN_2 +199 0x8088 //RX_FDEQ_GAIN_3 +200 0x848B //RX_FDEQ_GAIN_4 +201 0x8F8E //RX_FDEQ_GAIN_5 +202 0x9494 //RX_FDEQ_GAIN_6 +203 0x96A0 //RX_FDEQ_GAIN_7 +204 0xB8A0 //RX_FDEQ_GAIN_8 +205 0xA99D //RX_FDEQ_GAIN_9 +206 0x9D6A //RX_FDEQ_GAIN_10 +207 0x626B //RX_FDEQ_GAIN_11 +208 0x6C78 //RX_FDEQ_GAIN_12 +209 0x7884 //RX_FDEQ_GAIN_13 +210 0x9098 //RX_FDEQ_GAIN_14 +211 0x9CAC //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0202 //RX_FDEQ_BIN_0 +221 0x0202 //RX_FDEQ_BIN_1 +222 0x0302 //RX_FDEQ_BIN_2 +223 0x0304 //RX_FDEQ_BIN_3 +224 0x0405 //RX_FDEQ_BIN_4 +225 0x0506 //RX_FDEQ_BIN_5 +226 0x0708 //RX_FDEQ_BIN_6 +227 0x090A //RX_FDEQ_BIN_7 +228 0x0B0C //RX_FDEQ_BIN_8 +229 0x0D0E //RX_FDEQ_BIN_9 +230 0x1013 //RX_FDEQ_BIN_10 +231 0x1719 //RX_FDEQ_BIN_11 +232 0x1B1E //RX_FDEQ_BIN_12 +233 0x1E1E //RX_FDEQ_BIN_13 +234 0x1E28 //RX_FDEQ_BIN_14 +235 0x282C //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x4000 //RX_FDEQ_RESRV_0 +245 0x0320 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0030 //RX_FDDRC_BAND_MARGIN_1 +248 0x0050 //RX_FDDRC_BAND_MARGIN_2 +249 0x0080 //RX_FDDRC_BAND_MARGIN_3 +250 0x0007 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x5000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x6400 //RX_FDDRC_THRD_3_2 +258 0x6400 //RX_FDDRC_THRD_3_3 +259 0x2000 //RX_FDDRC_SLANT_0_0 +260 0x2000 //RX_FDDRC_SLANT_0_1 +261 0x2000 //RX_FDDRC_SLANT_0_2 +262 0x2000 //RX_FDDRC_SLANT_0_3 +263 0x5333 //RX_FDDRC_SLANT_1_0 +264 0x5333 //RX_FDDRC_SLANT_1_1 +265 0x5333 //RX_FDDRC_SLANT_1_2 +266 0x5333 //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +286 0x000D //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 +#VOL 1 +163 0x1000 //RX_TDDRC_ALPHA_UP_1 +164 0x1000 //RX_TDDRC_ALPHA_UP_2 +165 0x1000 //RX_TDDRC_ALPHA_UP_3 +166 0x1000 //RX_TDDRC_ALPHA_UP_4 +184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +190 0x7000 //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +269 0x0000 //RX_TDDRC_THRD_0 +270 0x0000 //RX_TDDRC_THRD_1 +271 0x1800 //RX_TDDRC_THRD_2 +272 0x1800 //RX_TDDRC_THRD_3 +273 0x3000 //RX_TDDRC_SLANT_0 +274 0x6E00 //RX_TDDRC_SLANT_1 +275 0x1000 //RX_TDDRC_ALPHA_UP_0 +276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x199A //RX_TDDRC_HMNC_GAIN +279 0x0001 //RX_TDDRC_SMT_FLAG +280 0x0CCD //RX_TDDRC_SMT_W +281 0x02FD //RX_TDDRC_DRC_GAIN +195 0x0020 //RX_FDEQ_SUBNUM +196 0x4E4E //RX_FDEQ_GAIN_0 +197 0x4E56 //RX_FDEQ_GAIN_1 +198 0x6878 //RX_FDEQ_GAIN_2 +199 0x8088 //RX_FDEQ_GAIN_3 +200 0x848B //RX_FDEQ_GAIN_4 +201 0x8F8E //RX_FDEQ_GAIN_5 +202 0x9494 //RX_FDEQ_GAIN_6 +203 0x96A0 //RX_FDEQ_GAIN_7 +204 0xB8A0 //RX_FDEQ_GAIN_8 +205 0xA99D //RX_FDEQ_GAIN_9 +206 0x9D6A //RX_FDEQ_GAIN_10 +207 0x626B //RX_FDEQ_GAIN_11 +208 0x6C78 //RX_FDEQ_GAIN_12 +209 0x7884 //RX_FDEQ_GAIN_13 +210 0x9098 //RX_FDEQ_GAIN_14 +211 0x9CAC //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0202 //RX_FDEQ_BIN_0 +221 0x0202 //RX_FDEQ_BIN_1 +222 0x0302 //RX_FDEQ_BIN_2 +223 0x0304 //RX_FDEQ_BIN_3 +224 0x0405 //RX_FDEQ_BIN_4 +225 0x0506 //RX_FDEQ_BIN_5 +226 0x0708 //RX_FDEQ_BIN_6 +227 0x090A //RX_FDEQ_BIN_7 +228 0x0B0C //RX_FDEQ_BIN_8 +229 0x0D0E //RX_FDEQ_BIN_9 +230 0x1013 //RX_FDEQ_BIN_10 +231 0x1719 //RX_FDEQ_BIN_11 +232 0x1B1E //RX_FDEQ_BIN_12 +233 0x1E1E //RX_FDEQ_BIN_13 +234 0x1E28 //RX_FDEQ_BIN_14 +235 0x282C //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x4000 //RX_FDEQ_RESRV_0 +245 0x0320 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0030 //RX_FDDRC_BAND_MARGIN_1 +248 0x0050 //RX_FDDRC_BAND_MARGIN_2 +249 0x0080 //RX_FDDRC_BAND_MARGIN_3 +250 0x0007 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x5000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x6400 //RX_FDDRC_THRD_3_2 +258 0x6400 //RX_FDDRC_THRD_3_3 +259 0x2000 //RX_FDDRC_SLANT_0_0 +260 0x2000 //RX_FDDRC_SLANT_0_1 +261 0x2000 //RX_FDDRC_SLANT_0_2 +262 0x2000 //RX_FDDRC_SLANT_0_3 +263 0x5333 //RX_FDDRC_SLANT_1_0 +264 0x5333 //RX_FDDRC_SLANT_1_1 +265 0x5333 //RX_FDDRC_SLANT_1_2 +266 0x5333 //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +286 0x0016 //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 +#VOL 2 +163 0x1000 //RX_TDDRC_ALPHA_UP_1 +164 0x1000 //RX_TDDRC_ALPHA_UP_2 +165 0x1000 //RX_TDDRC_ALPHA_UP_3 +166 0x1000 //RX_TDDRC_ALPHA_UP_4 +184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +190 0x7000 //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +269 0x0000 //RX_TDDRC_THRD_0 +270 0x0000 //RX_TDDRC_THRD_1 +271 0x1800 //RX_TDDRC_THRD_2 +272 0x1800 //RX_TDDRC_THRD_3 +273 0x3000 //RX_TDDRC_SLANT_0 +274 0x6E00 //RX_TDDRC_SLANT_1 +275 0x1000 //RX_TDDRC_ALPHA_UP_0 +276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x199A //RX_TDDRC_HMNC_GAIN +279 0x0001 //RX_TDDRC_SMT_FLAG +280 0x0CCD //RX_TDDRC_SMT_W +281 0x02FD //RX_TDDRC_DRC_GAIN +195 0x0020 //RX_FDEQ_SUBNUM +196 0x4E4E //RX_FDEQ_GAIN_0 +197 0x4E56 //RX_FDEQ_GAIN_1 +198 0x6878 //RX_FDEQ_GAIN_2 +199 0x8088 //RX_FDEQ_GAIN_3 +200 0x848B //RX_FDEQ_GAIN_4 +201 0x8F8E //RX_FDEQ_GAIN_5 +202 0x9494 //RX_FDEQ_GAIN_6 +203 0x96A0 //RX_FDEQ_GAIN_7 +204 0xB8A0 //RX_FDEQ_GAIN_8 +205 0xA99D //RX_FDEQ_GAIN_9 +206 0x9D6A //RX_FDEQ_GAIN_10 +207 0x626B //RX_FDEQ_GAIN_11 +208 0x6C78 //RX_FDEQ_GAIN_12 +209 0x7884 //RX_FDEQ_GAIN_13 +210 0x9098 //RX_FDEQ_GAIN_14 +211 0x9CAC //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0202 //RX_FDEQ_BIN_0 +221 0x0202 //RX_FDEQ_BIN_1 +222 0x0302 //RX_FDEQ_BIN_2 +223 0x0304 //RX_FDEQ_BIN_3 +224 0x0405 //RX_FDEQ_BIN_4 +225 0x0506 //RX_FDEQ_BIN_5 +226 0x0708 //RX_FDEQ_BIN_6 +227 0x090A //RX_FDEQ_BIN_7 +228 0x0B0C //RX_FDEQ_BIN_8 +229 0x0D0E //RX_FDEQ_BIN_9 +230 0x1013 //RX_FDEQ_BIN_10 +231 0x1719 //RX_FDEQ_BIN_11 +232 0x1B1E //RX_FDEQ_BIN_12 +233 0x1E1E //RX_FDEQ_BIN_13 +234 0x1E28 //RX_FDEQ_BIN_14 +235 0x282C //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x4000 //RX_FDEQ_RESRV_0 +245 0x0320 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0030 //RX_FDDRC_BAND_MARGIN_1 +248 0x0050 //RX_FDDRC_BAND_MARGIN_2 +249 0x0080 //RX_FDDRC_BAND_MARGIN_3 +250 0x0007 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x5000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x6400 //RX_FDDRC_THRD_3_2 +258 0x6400 //RX_FDDRC_THRD_3_3 +259 0x2000 //RX_FDDRC_SLANT_0_0 +260 0x2000 //RX_FDDRC_SLANT_0_1 +261 0x2000 //RX_FDDRC_SLANT_0_2 +262 0x2000 //RX_FDDRC_SLANT_0_3 +263 0x5333 //RX_FDDRC_SLANT_1_0 +264 0x5333 //RX_FDDRC_SLANT_1_1 +265 0x5333 //RX_FDDRC_SLANT_1_2 +266 0x5333 //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +286 0x0024 //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 +#VOL 3 +163 0x1000 //RX_TDDRC_ALPHA_UP_1 +164 0x1000 //RX_TDDRC_ALPHA_UP_2 +165 0x1000 //RX_TDDRC_ALPHA_UP_3 +166 0x1000 //RX_TDDRC_ALPHA_UP_4 +184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +190 0x7000 //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +269 0x0000 //RX_TDDRC_THRD_0 +270 0x0000 //RX_TDDRC_THRD_1 +271 0x1800 //RX_TDDRC_THRD_2 +272 0x1800 //RX_TDDRC_THRD_3 +273 0x3000 //RX_TDDRC_SLANT_0 +274 0x6E00 //RX_TDDRC_SLANT_1 +275 0x1000 //RX_TDDRC_ALPHA_UP_0 +276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x199A //RX_TDDRC_HMNC_GAIN +279 0x0001 //RX_TDDRC_SMT_FLAG +280 0x0CCD //RX_TDDRC_SMT_W +281 0x02FD //RX_TDDRC_DRC_GAIN +195 0x0020 //RX_FDEQ_SUBNUM +196 0x4E4E //RX_FDEQ_GAIN_0 +197 0x4E56 //RX_FDEQ_GAIN_1 +198 0x6878 //RX_FDEQ_GAIN_2 +199 0x8088 //RX_FDEQ_GAIN_3 +200 0x848B //RX_FDEQ_GAIN_4 +201 0x8F8E //RX_FDEQ_GAIN_5 +202 0x9494 //RX_FDEQ_GAIN_6 +203 0x96A0 //RX_FDEQ_GAIN_7 +204 0xB8A0 //RX_FDEQ_GAIN_8 +205 0xA99D //RX_FDEQ_GAIN_9 +206 0x9D6A //RX_FDEQ_GAIN_10 +207 0x626B //RX_FDEQ_GAIN_11 +208 0x6C78 //RX_FDEQ_GAIN_12 +209 0x7884 //RX_FDEQ_GAIN_13 +210 0x9098 //RX_FDEQ_GAIN_14 +211 0x9CAC //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0202 //RX_FDEQ_BIN_0 +221 0x0202 //RX_FDEQ_BIN_1 +222 0x0302 //RX_FDEQ_BIN_2 +223 0x0304 //RX_FDEQ_BIN_3 +224 0x0405 //RX_FDEQ_BIN_4 +225 0x0506 //RX_FDEQ_BIN_5 +226 0x0708 //RX_FDEQ_BIN_6 +227 0x090A //RX_FDEQ_BIN_7 +228 0x0B0C //RX_FDEQ_BIN_8 +229 0x0D0E //RX_FDEQ_BIN_9 +230 0x1013 //RX_FDEQ_BIN_10 +231 0x1719 //RX_FDEQ_BIN_11 +232 0x1B1E //RX_FDEQ_BIN_12 +233 0x1E1E //RX_FDEQ_BIN_13 +234 0x1E28 //RX_FDEQ_BIN_14 +235 0x282C //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x4000 //RX_FDEQ_RESRV_0 +245 0x0320 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0030 //RX_FDDRC_BAND_MARGIN_1 +248 0x0050 //RX_FDDRC_BAND_MARGIN_2 +249 0x0080 //RX_FDDRC_BAND_MARGIN_3 +250 0x0007 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x5000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x6400 //RX_FDDRC_THRD_3_2 +258 0x6400 //RX_FDDRC_THRD_3_3 +259 0x2000 //RX_FDDRC_SLANT_0_0 +260 0x2000 //RX_FDDRC_SLANT_0_1 +261 0x2000 //RX_FDDRC_SLANT_0_2 +262 0x2000 //RX_FDDRC_SLANT_0_3 +263 0x5333 //RX_FDDRC_SLANT_1_0 +264 0x5333 //RX_FDDRC_SLANT_1_1 +265 0x5333 //RX_FDDRC_SLANT_1_2 +266 0x5333 //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +286 0x003A //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 +#VOL 4 +163 0x1000 //RX_TDDRC_ALPHA_UP_1 +164 0x1000 //RX_TDDRC_ALPHA_UP_2 +165 0x1000 //RX_TDDRC_ALPHA_UP_3 +166 0x1000 //RX_TDDRC_ALPHA_UP_4 +184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +190 0x7000 //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +269 0x0000 //RX_TDDRC_THRD_0 +270 0x0000 //RX_TDDRC_THRD_1 +271 0x1800 //RX_TDDRC_THRD_2 +272 0x1800 //RX_TDDRC_THRD_3 +273 0x3000 //RX_TDDRC_SLANT_0 +274 0x6E00 //RX_TDDRC_SLANT_1 +275 0x1000 //RX_TDDRC_ALPHA_UP_0 +276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x199A //RX_TDDRC_HMNC_GAIN +279 0x0001 //RX_TDDRC_SMT_FLAG +280 0x0CCD //RX_TDDRC_SMT_W +281 0x02FD //RX_TDDRC_DRC_GAIN +195 0x0020 //RX_FDEQ_SUBNUM +196 0x4E4E //RX_FDEQ_GAIN_0 +197 0x4E56 //RX_FDEQ_GAIN_1 +198 0x6878 //RX_FDEQ_GAIN_2 +199 0x8088 //RX_FDEQ_GAIN_3 +200 0x848B //RX_FDEQ_GAIN_4 +201 0x8F8E //RX_FDEQ_GAIN_5 +202 0x9494 //RX_FDEQ_GAIN_6 +203 0x96A0 //RX_FDEQ_GAIN_7 +204 0xB8A0 //RX_FDEQ_GAIN_8 +205 0xA99D //RX_FDEQ_GAIN_9 +206 0x9D6A //RX_FDEQ_GAIN_10 +207 0x626B //RX_FDEQ_GAIN_11 +208 0x6C78 //RX_FDEQ_GAIN_12 +209 0x7884 //RX_FDEQ_GAIN_13 +210 0x9098 //RX_FDEQ_GAIN_14 +211 0x9CAC //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0202 //RX_FDEQ_BIN_0 +221 0x0202 //RX_FDEQ_BIN_1 +222 0x0302 //RX_FDEQ_BIN_2 +223 0x0304 //RX_FDEQ_BIN_3 +224 0x0405 //RX_FDEQ_BIN_4 +225 0x0506 //RX_FDEQ_BIN_5 +226 0x0708 //RX_FDEQ_BIN_6 +227 0x090A //RX_FDEQ_BIN_7 +228 0x0B0C //RX_FDEQ_BIN_8 +229 0x0D0E //RX_FDEQ_BIN_9 +230 0x1013 //RX_FDEQ_BIN_10 +231 0x1719 //RX_FDEQ_BIN_11 +232 0x1B1E //RX_FDEQ_BIN_12 +233 0x1E1E //RX_FDEQ_BIN_13 +234 0x1E28 //RX_FDEQ_BIN_14 +235 0x282C //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x4000 //RX_FDEQ_RESRV_0 +245 0x0320 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0030 //RX_FDDRC_BAND_MARGIN_1 +248 0x0050 //RX_FDDRC_BAND_MARGIN_2 +249 0x0080 //RX_FDDRC_BAND_MARGIN_3 +250 0x0007 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x5000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x6400 //RX_FDDRC_THRD_3_2 +258 0x6400 //RX_FDDRC_THRD_3_3 +259 0x2000 //RX_FDDRC_SLANT_0_0 +260 0x2000 //RX_FDDRC_SLANT_0_1 +261 0x2000 //RX_FDDRC_SLANT_0_2 +262 0x2000 //RX_FDDRC_SLANT_0_3 +263 0x5333 //RX_FDDRC_SLANT_1_0 +264 0x5333 //RX_FDDRC_SLANT_1_1 +265 0x5333 //RX_FDDRC_SLANT_1_2 +266 0x5333 //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +286 0x0059 //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 +#VOL 5 +163 0x1000 //RX_TDDRC_ALPHA_UP_1 +164 0x1000 //RX_TDDRC_ALPHA_UP_2 +165 0x1000 //RX_TDDRC_ALPHA_UP_3 +166 0x1000 //RX_TDDRC_ALPHA_UP_4 +184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +190 0x7000 //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +269 0x0000 //RX_TDDRC_THRD_0 +270 0x0000 //RX_TDDRC_THRD_1 +271 0x1800 //RX_TDDRC_THRD_2 +272 0x1800 //RX_TDDRC_THRD_3 +273 0x3000 //RX_TDDRC_SLANT_0 +274 0x6E00 //RX_TDDRC_SLANT_1 +275 0x1000 //RX_TDDRC_ALPHA_UP_0 +276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x199A //RX_TDDRC_HMNC_GAIN +279 0x0001 //RX_TDDRC_SMT_FLAG +280 0x0CCD //RX_TDDRC_SMT_W +281 0x02FD //RX_TDDRC_DRC_GAIN +195 0x0020 //RX_FDEQ_SUBNUM +196 0x4E4E //RX_FDEQ_GAIN_0 +197 0x4E56 //RX_FDEQ_GAIN_1 +198 0x6878 //RX_FDEQ_GAIN_2 +199 0x8088 //RX_FDEQ_GAIN_3 +200 0x848B //RX_FDEQ_GAIN_4 +201 0x8F8E //RX_FDEQ_GAIN_5 +202 0x9494 //RX_FDEQ_GAIN_6 +203 0x96A0 //RX_FDEQ_GAIN_7 +204 0xB8A0 //RX_FDEQ_GAIN_8 +205 0xA99D //RX_FDEQ_GAIN_9 +206 0x9D6A //RX_FDEQ_GAIN_10 +207 0x626B //RX_FDEQ_GAIN_11 +208 0x6C78 //RX_FDEQ_GAIN_12 +209 0x7884 //RX_FDEQ_GAIN_13 +210 0x9098 //RX_FDEQ_GAIN_14 +211 0x9CAC //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0202 //RX_FDEQ_BIN_0 +221 0x0202 //RX_FDEQ_BIN_1 +222 0x0302 //RX_FDEQ_BIN_2 +223 0x0304 //RX_FDEQ_BIN_3 +224 0x0405 //RX_FDEQ_BIN_4 +225 0x0506 //RX_FDEQ_BIN_5 +226 0x0708 //RX_FDEQ_BIN_6 +227 0x090A //RX_FDEQ_BIN_7 +228 0x0B0C //RX_FDEQ_BIN_8 +229 0x0D0E //RX_FDEQ_BIN_9 +230 0x1013 //RX_FDEQ_BIN_10 +231 0x1719 //RX_FDEQ_BIN_11 +232 0x1B1E //RX_FDEQ_BIN_12 +233 0x1E1E //RX_FDEQ_BIN_13 +234 0x1E28 //RX_FDEQ_BIN_14 +235 0x282C //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x4000 //RX_FDEQ_RESRV_0 +245 0x0320 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0030 //RX_FDDRC_BAND_MARGIN_1 +248 0x0050 //RX_FDDRC_BAND_MARGIN_2 +249 0x0080 //RX_FDDRC_BAND_MARGIN_3 +250 0x0007 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x5000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x6400 //RX_FDDRC_THRD_3_2 +258 0x6400 //RX_FDDRC_THRD_3_3 +259 0x2000 //RX_FDDRC_SLANT_0_0 +260 0x2000 //RX_FDDRC_SLANT_0_1 +261 0x2000 //RX_FDDRC_SLANT_0_2 +262 0x2000 //RX_FDDRC_SLANT_0_3 +263 0x5333 //RX_FDDRC_SLANT_1_0 +264 0x5333 //RX_FDDRC_SLANT_1_1 +265 0x5333 //RX_FDDRC_SLANT_1_2 +266 0x5333 //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +286 0x0090 //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 +#VOL 6 +163 0x1000 //RX_TDDRC_ALPHA_UP_1 +164 0x1000 //RX_TDDRC_ALPHA_UP_2 +165 0x1000 //RX_TDDRC_ALPHA_UP_3 +166 0x1000 //RX_TDDRC_ALPHA_UP_4 +184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +190 0x7000 //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +269 0x0000 //RX_TDDRC_THRD_0 +270 0x0000 //RX_TDDRC_THRD_1 +271 0x1800 //RX_TDDRC_THRD_2 +272 0x1800 //RX_TDDRC_THRD_3 +273 0x3000 //RX_TDDRC_SLANT_0 +274 0x6E00 //RX_TDDRC_SLANT_1 +275 0x1000 //RX_TDDRC_ALPHA_UP_0 +276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x199A //RX_TDDRC_HMNC_GAIN +279 0x0001 //RX_TDDRC_SMT_FLAG +280 0x0CCD //RX_TDDRC_SMT_W +281 0x02FD //RX_TDDRC_DRC_GAIN +195 0x0020 //RX_FDEQ_SUBNUM +196 0x4E4E //RX_FDEQ_GAIN_0 +197 0x4E56 //RX_FDEQ_GAIN_1 +198 0x6878 //RX_FDEQ_GAIN_2 +199 0x8088 //RX_FDEQ_GAIN_3 +200 0x848B //RX_FDEQ_GAIN_4 +201 0x8F8E //RX_FDEQ_GAIN_5 +202 0x9494 //RX_FDEQ_GAIN_6 +203 0x96A0 //RX_FDEQ_GAIN_7 +204 0xB8A0 //RX_FDEQ_GAIN_8 +205 0xA99D //RX_FDEQ_GAIN_9 +206 0x9D6A //RX_FDEQ_GAIN_10 +207 0x626B //RX_FDEQ_GAIN_11 +208 0x6C78 //RX_FDEQ_GAIN_12 +209 0x7884 //RX_FDEQ_GAIN_13 +210 0x9098 //RX_FDEQ_GAIN_14 +211 0x9CAC //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0202 //RX_FDEQ_BIN_0 +221 0x0202 //RX_FDEQ_BIN_1 +222 0x0302 //RX_FDEQ_BIN_2 +223 0x0304 //RX_FDEQ_BIN_3 +224 0x0405 //RX_FDEQ_BIN_4 +225 0x0506 //RX_FDEQ_BIN_5 +226 0x0708 //RX_FDEQ_BIN_6 +227 0x090A //RX_FDEQ_BIN_7 +228 0x0B0C //RX_FDEQ_BIN_8 +229 0x0D0E //RX_FDEQ_BIN_9 +230 0x1013 //RX_FDEQ_BIN_10 +231 0x1719 //RX_FDEQ_BIN_11 +232 0x1B1E //RX_FDEQ_BIN_12 +233 0x1E1E //RX_FDEQ_BIN_13 +234 0x1E28 //RX_FDEQ_BIN_14 +235 0x282C //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x4000 //RX_FDEQ_RESRV_0 +245 0x0320 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0030 //RX_FDDRC_BAND_MARGIN_1 +248 0x0050 //RX_FDDRC_BAND_MARGIN_2 +249 0x0080 //RX_FDDRC_BAND_MARGIN_3 +250 0x0007 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x5000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x6400 //RX_FDDRC_THRD_3_2 +258 0x6400 //RX_FDDRC_THRD_3_3 +259 0x2000 //RX_FDDRC_SLANT_0_0 +260 0x2000 //RX_FDDRC_SLANT_0_1 +261 0x2000 //RX_FDDRC_SLANT_0_2 +262 0x2000 //RX_FDDRC_SLANT_0_3 +263 0x5333 //RX_FDDRC_SLANT_1_0 +264 0x5333 //RX_FDDRC_SLANT_1_1 +265 0x5333 //RX_FDDRC_SLANT_1_2 +266 0x5333 //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +286 0x0100 //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 #CASE_NAME HANDSET-HANDSET-CUSTOM1-FB -#PARAM_TYPE TX+RX -#TOTAL_CUSTOM_STEP 7 +#PARAM_MODE FULL +#PARAM_TYPE TX+2RX +#TOTAL_CUSTOM_STEP 7+7 #TX 0 0x0000 //TX_OPERATION_MODE_0 1 0x0000 //TX_OPERATION_MODE_1 @@ -3764,12 +5599,12 @@ 248 0xF800 //TX_THR_SN_EST_6 249 0xF700 //TX_THR_SN_EST_7 250 0x0000 //TX_DELTA_THR_SN_EST_0 -251 0x0100 //TX_DELTA_THR_SN_EST_1 +251 0x0200 //TX_DELTA_THR_SN_EST_1 252 0x0200 //TX_DELTA_THR_SN_EST_2 253 0x0200 //TX_DELTA_THR_SN_EST_3 -254 0x0200 //TX_DELTA_THR_SN_EST_4 -255 0x0100 //TX_DELTA_THR_SN_EST_5 -256 0x0200 //TX_DELTA_THR_SN_EST_6 +254 0x0100 //TX_DELTA_THR_SN_EST_4 +255 0x0200 //TX_DELTA_THR_SN_EST_5 +256 0x0100 //TX_DELTA_THR_SN_EST_6 257 0x0200 //TX_DELTA_THR_SN_EST_7 258 0x4000 //TX_LAMBDA_NN_EST_0 259 0x4000 //TX_LAMBDA_NN_EST_1 @@ -3797,16 +5632,16 @@ 281 0x0014 //TX_NS_LVL_CTRL_0 282 0x0016 //TX_NS_LVL_CTRL_1 283 0x0016 //TX_NS_LVL_CTRL_2 -284 0x0016 //TX_NS_LVL_CTRL_3 -285 0x0018 //TX_NS_LVL_CTRL_4 -286 0x0016 //TX_NS_LVL_CTRL_5 -287 0x0012 //TX_NS_LVL_CTRL_6 +284 0x0018 //TX_NS_LVL_CTRL_3 +285 0x0016 //TX_NS_LVL_CTRL_4 +286 0x0012 //TX_NS_LVL_CTRL_5 +287 0x0016 //TX_NS_LVL_CTRL_6 288 0x0017 //TX_NS_LVL_CTRL_7 289 0x000E //TX_MIN_GAIN_S_0 -290 0x0012 //TX_MIN_GAIN_S_1 -291 0x0007 //TX_MIN_GAIN_S_2 -292 0x0012 //TX_MIN_GAIN_S_3 -293 0x0010 //TX_MIN_GAIN_S_4 +290 0x0007 //TX_MIN_GAIN_S_1 +291 0x0012 //TX_MIN_GAIN_S_2 +292 0x0010 //TX_MIN_GAIN_S_3 +293 0x0012 //TX_MIN_GAIN_S_4 294 0x0012 //TX_MIN_GAIN_S_5 295 0x0012 //TX_MIN_GAIN_S_6 296 0x0012 //TX_MIN_GAIN_S_7 @@ -3828,29 +5663,29 @@ 312 0x7FFF //TX_A_POST_FILT_0 313 0x2000 //TX_A_POST_FILT_1 314 0x4000 //TX_A_POST_FILT_S_0 -315 0x5000 //TX_A_POST_FILT_S_1 +315 0x4000 //TX_A_POST_FILT_S_1 316 0x4000 //TX_A_POST_FILT_S_2 317 0x4000 //TX_A_POST_FILT_S_3 318 0x4000 //TX_A_POST_FILT_S_4 319 0x4000 //TX_A_POST_FILT_S_5 -320 0x4000 //TX_A_POST_FILT_S_6 +320 0x5000 //TX_A_POST_FILT_S_6 321 0x7000 //TX_A_POST_FILT_S_7 322 0x1000 //TX_B_POST_FILT_0 323 0x2000 //TX_B_POST_FILT_1 -324 0x3000 //TX_B_POST_FILT_2 +324 0x2000 //TX_B_POST_FILT_2 325 0x2000 //TX_B_POST_FILT_3 -326 0x5000 //TX_B_POST_FILT_4 +326 0x2000 //TX_B_POST_FILT_4 327 0x2000 //TX_B_POST_FILT_5 -328 0x6000 //TX_B_POST_FILT_6 +328 0x3000 //TX_B_POST_FILT_6 329 0x3000 //TX_B_POST_FILT_7 330 0x1000 //TX_B_LESSCUT_RTO_S_0 -331 0x6000 //TX_B_LESSCUT_RTO_S_1 -332 0x6000 //TX_B_LESSCUT_RTO_S_2 -333 0x6000 //TX_B_LESSCUT_RTO_S_3 -334 0x6000 //TX_B_LESSCUT_RTO_S_4 -335 0x6000 //TX_B_LESSCUT_RTO_S_5 -336 0x7FFF //TX_B_LESSCUT_RTO_S_6 -337 0x7FFF //TX_B_LESSCUT_RTO_S_7 +331 0x1000 //TX_B_LESSCUT_RTO_S_1 +332 0x1000 //TX_B_LESSCUT_RTO_S_2 +333 0x1000 //TX_B_LESSCUT_RTO_S_3 +334 0x1000 //TX_B_LESSCUT_RTO_S_4 +335 0x1000 //TX_B_LESSCUT_RTO_S_5 +336 0x1000 //TX_B_LESSCUT_RTO_S_6 +337 0x1000 //TX_B_LESSCUT_RTO_S_7 338 0x7E14 //TX_LAMBDA_PFILT 339 0x7C29 //TX_LAMBDA_PFILT_S_0 340 0x7C29 //TX_LAMBDA_PFILT_S_1 @@ -3893,10 +5728,10 @@ 377 0x4E20 //TX_NOISE_TH_5_4 378 0x39DF //TX_NOISE_TH_6 379 0x0014 //TX_MINENOISE_TH -380 0x4000 //TX_MINENOISE_MIC0_TH_MTS -381 0xFFEE //TX_MINENOISE_MIC0_TH_EXP -382 0x6000 //TX_MINENOISE_MIC0_S_TH_MTS -383 0xFFF3 //TX_MINENOISE_MIC0_S_TH_EXP +380 0xD508 //TX_MORENS_TFMASK_TH +381 0x0001 //TX_DRC_QUIET_FLOOR +382 0x6D60 //TX_RATIODTL_CUT_TH +383 0x1482 //TX_DT_CUT_K1 384 0x00A5 //TX_OUT_ENER_S_TH_CLEAN 385 0x00A5 //TX_OUT_ENER_S_TH_LESSCLEAN 386 0x00A5 //TX_OUT_ENER_S_TH_NOISY @@ -3904,15 +5739,15 @@ 388 0x0200 //TX_OUT_ENER_TH_SPEECH 389 0x2000 //TX_SN_NPB_GAIN 390 0x0000 //TX_NN_NPB_GAIN -391 0x0000 //TX_CSX_ALPHA_0 -392 0x0000 //TX_CSX_ALPHA_1 -393 0x0000 //TX_CSX_ALPHA_2 -394 0x0000 //TX_CSX_ALPHA_3 -395 0x0800 //TX_MU_ARSP_EST -396 0x00C8 //TX_P_OUTBEAM_MIN_TH +391 0x3000 //TX_POST_MASK_SUP_HSNE +392 0x07D0 //TX_TAIL_DET_TH +393 0x4000 //TX_B_LESSCUT_RTO_WTA +394 0x0000 //TX_MEL_G_R +395 0x0080 //TX_SUPHIGH_TH +396 0x0000 //TX_MASK_G_R 397 0x0002 //TX_EXTRA_NS_L -398 0x0800 //TX_EXTRA_NS_A -399 0x0005 //TX_VR_NOISE_FLOOR_TH +398 0x1800 //TX_C_POST_FLT_MASK +399 0x7FFF //TX_A_POST_FLT_WNS 400 0x0148 //TX_MIN_G_LOW300HZ 401 0x0004 //TX_MAXLEVEL_CNG 402 0x00B4 //TX_STN_NOISE_TH @@ -4027,16 +5862,16 @@ 511 0x6666 //TX_MIC_TO_BFGAIN 512 0x0000 //TX_MICTOBFGAIN0 513 0x0000 //TX_FASTMUE_TH -514 0x0000 //TX_DERVB_LEN_0 -515 0x0000 //TX_DERVB_LEN_1 -516 0x0000 //TX_RHO_DERVB -517 0x0000 //TX_MIC_INDX_DERVB -518 0x0000 //TX_MU_DERVB -519 0x0000 //TX_DR_RESRV_0 -520 0x0000 //TX_DR_RESRV_1 -521 0x0000 //TX_DR_RESRV_2 -522 0x0000 //TX_DR_RESRV_3 -523 0x0000 //TX_DR_RESRV_4 +514 0x2CCC //TX_DEREVERB_LF_MU +515 0x3200 //TX_DEREVERB_HF_MU +516 0x0007 //TX_DEREVERB_DELAY +517 0x0004 //TX_DEREVERB_COEF_LEN +518 0x0003 //TX_DEREVERB_DNR +519 0x0000 //TX_DEREVERB_ALPHA +520 0x0000 //TX_DEREVERB_BETA +521 0x7FFF //TX_GSC_RTOL_TH +522 0x7FFF //TX_GSC_RTOH_TH +523 0x7E2C //TX_WIDE2_MEANHTH 524 0x0000 //TX_DR_RESRV_5 525 0x0000 //TX_DR_RESRV_6 526 0x0000 //TX_DR_RESRV_7 @@ -4410,6 +6245,71 @@ 894 0xC000 //TX_FASTNS_SSA_THHFL 895 0xCCCC //TX_FASTNS_SSA_THLFH 896 0xD999 //TX_FASTNS_SSA_THHFH +897 0x2339 //TX_SENDFUNC_REG_MICMUTE +898 0x0021 //TX_SENDFUNC_REG_MICMUTE1 +899 0x02BC //TX_MICMUTE_RATIO_THR +900 0x0140 //TX_MICMUTE_AMP_THR +901 0x0004 //TX_MICMUTE_HPF_IND +902 0x00C0 //TX_MICMUTE_LOG_EYR_TH +903 0x0008 //TX_MICMUTE_CVG_TIME +904 0x0008 //TX_MICMUTE_RELEASE_TIME +905 0x01FE //TX_MIC_VOLUME_MIC0MUTE +906 0x0020 //TX_MICMUTE_EPD_OFFSET_0 +907 0x001E //TX_MICMUTE_FRQ_AEC_L +908 0x7999 //TX_MICMUTE_EAD_THR +909 0x7FFF //TX_MICMUTE_LAMBDA_CB_NLE +910 0x7FFF //TX_MICMUTE_LAMBDA_RE_EST +911 0x4000 //TX_DTD_THR1_MICMUTE_0 +912 0x7000 //TX_DTD_THR1_MICMUTE_1 +913 0x7FFF //TX_DTD_THR1_MICMUTE_2 +914 0x7FFF //TX_DTD_THR1_MICMUTE_3 +915 0x6CCC //TX_DTD_THR2_MICMUTE_0 +916 0x0400 //TX_MICMUTE_MIN_EQ_RE_EST_0 +917 0x0400 //TX_MICMUTE_MIN_EQ_RE_EST_1 +918 0x1000 //TX_MICMUTE_MIN_EQ_RE_EST_2 +919 0x7FFF //TX_MICMUTE_MIN_EQ_RE_EST_3 +920 0x7FFF //TX_MICMUTE_MIN_EQ_RE_EST_4 +921 0x4000 //TX_MICMUTE_C_POST_FLT +922 0x03E8 //TX_MICMUTE_DT_CUT_K +923 0x0001 //TX_MICMUTE_DT_CUT_THR +924 0x03E8 //TX_MICMUTE_DT_CUT_K2 +925 0x0001 //TX_MICMUTE_DT_CUT_THR2 +926 0x0064 //TX_MICMUTE_DT2_HOLD_N +927 0x1000 //TX_MICMUTE_RATIODTH_THCUT +928 0x1000 //TX_MICMUTE_B_POST_FLT_ECHOL +929 0x7FFF //TX_MICMUTE_B_POST_FLT_ECHOH +930 0x0400 //TX_MICMUTE_C_POST_FLT_MASK +931 0x7999 //TX_MICMUTE_RATIODTL_CUT_TH +932 0x0258 //TX_MICMUTE_DT_CUT_K1 +933 0x0800 //TX_MICMUTE_N2_SN_EST +934 0xFC00 //TX_MICMUTE_THR_SN_EST_0 +935 0x001C //TX_MICMUTE_MIN_G_CTRL_0 +936 0x6000 //TX_MICMUTE_A_POST_FILT_S_0 +937 0x7000 //TX_MICMUTE_B_POST_FILT_0 +938 0x2710 //TX_MIC1RUB_AMP_THR +939 0x0010 //TX_MIC1MUTE_RATIO_THR +940 0x0450 //TX_MIC1MUTE_AMP_THR +941 0x0008 //TX_MIC1MUTE_CVG_TIME +942 0x0008 //TX_MIC1MUTE_RELEASE_TIME +943 0x0000 //TX_AMS_RESRV_01 +944 0x0000 //TX_AMS_RESRV_02 +945 0x0000 //TX_AMS_RESRV_03 +946 0x0000 //TX_AMS_RESRV_04 +947 0x0000 //TX_AMS_RESRV_05 +948 0x0000 //TX_AMS_RESRV_06 +949 0x0000 //TX_AMS_RESRV_07 +950 0x0000 //TX_AMS_RESRV_08 +951 0x0000 //TX_AMS_RESRV_09 +952 0x0000 //TX_AMS_RESRV_10 +953 0x0000 //TX_AMS_RESRV_11 +954 0x0000 //TX_AMS_RESRV_12 +955 0x0000 //TX_AMS_RESRV_13 +956 0x0000 //TX_AMS_RESRV_14 +957 0x0000 //TX_AMS_RESRV_15 +958 0x0000 //TX_AMS_RESRV_16 +959 0x0000 //TX_AMS_RESRV_17 +960 0x0000 //TX_AMS_RESRV_18 +961 0x0000 //TX_AMS_RESRV_19 #RX 0 0x003C //RX_RECVFUNC_MODE_0 1 0x0000 //RX_RECVFUNC_MODE_1 @@ -5261,14 +7161,866 @@ 110 0x0000 //RX_FDDRC_RESRV_0 129 0x0100 //RX_SPK_VOL 130 0x0000 //RX_VOL_RESRV_0 +#RX 2 +157 0x003C //RX_RECVFUNC_MODE_0 +158 0x0000 //RX_RECVFUNC_MODE_1 +159 0x0004 //RX_SAMPLINGFREQ_SIG +160 0x0004 //RX_SAMPLINGFREQ_PROC +161 0x000A //RX_FRAME_SZ +162 0x0000 //RX_DELAY_OPT +163 0x1000 //RX_TDDRC_ALPHA_UP_1 +164 0x1000 //RX_TDDRC_ALPHA_UP_2 +165 0x1000 //RX_TDDRC_ALPHA_UP_3 +166 0x1000 //RX_TDDRC_ALPHA_UP_4 +167 0x0722 //RX_PGA +168 0x7FFF //RX_A_HP +169 0x4000 //RX_B_PE +170 0x5800 //RX_THR_PITCH_DET_0 +171 0x5000 //RX_THR_PITCH_DET_1 +172 0x4000 //RX_THR_PITCH_DET_2 +173 0x0008 //RX_PITCH_BFR_LEN +174 0x0003 //RX_SBD_PITCH_DET +175 0x0100 //RX_PP_RESRV_0 +176 0x0020 //RX_PP_RESRV_1 +177 0x0600 //RX_N_SN_EST +178 0x000C //RX_N2_SN_EST +179 0x000F //RX_NS_LVL_CTRL +180 0xF800 //RX_THR_SN_EST +181 0x7E00 //RX_LAMBDA_PFILT +182 0x000A //RX_FENS_RESRV_0 +183 0x0190 //RX_FENS_RESRV_1 +184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +187 0x0002 //RX_EXTRA_NS_L +188 0x0800 //RX_EXTRA_NS_A +189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +190 0x7000 //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +192 0x199A //RX_A_POST_FLT +193 0x0000 //RX_LMT_THRD +194 0x4000 //RX_LMT_ALPHA +195 0x0020 //RX_FDEQ_SUBNUM +196 0x4E4E //RX_FDEQ_GAIN_0 +197 0x4E56 //RX_FDEQ_GAIN_1 +198 0x6878 //RX_FDEQ_GAIN_2 +199 0x8088 //RX_FDEQ_GAIN_3 +200 0x848B //RX_FDEQ_GAIN_4 +201 0x8F8E //RX_FDEQ_GAIN_5 +202 0x9494 //RX_FDEQ_GAIN_6 +203 0x96A0 //RX_FDEQ_GAIN_7 +204 0xB8A0 //RX_FDEQ_GAIN_8 +205 0xA99D //RX_FDEQ_GAIN_9 +206 0x9D6A //RX_FDEQ_GAIN_10 +207 0x626B //RX_FDEQ_GAIN_11 +208 0x6C78 //RX_FDEQ_GAIN_12 +209 0x7884 //RX_FDEQ_GAIN_13 +210 0x9098 //RX_FDEQ_GAIN_14 +211 0x9CAC //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0202 //RX_FDEQ_BIN_0 +221 0x0202 //RX_FDEQ_BIN_1 +222 0x0302 //RX_FDEQ_BIN_2 +223 0x0304 //RX_FDEQ_BIN_3 +224 0x0405 //RX_FDEQ_BIN_4 +225 0x0506 //RX_FDEQ_BIN_5 +226 0x0708 //RX_FDEQ_BIN_6 +227 0x090A //RX_FDEQ_BIN_7 +228 0x0B0C //RX_FDEQ_BIN_8 +229 0x0D0E //RX_FDEQ_BIN_9 +230 0x1013 //RX_FDEQ_BIN_10 +231 0x1719 //RX_FDEQ_BIN_11 +232 0x1B1E //RX_FDEQ_BIN_12 +233 0x1E1E //RX_FDEQ_BIN_13 +234 0x1E28 //RX_FDEQ_BIN_14 +235 0x282C //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x4000 //RX_FDEQ_RESRV_0 +245 0x0320 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0030 //RX_FDDRC_BAND_MARGIN_1 +248 0x0050 //RX_FDDRC_BAND_MARGIN_2 +249 0x0080 //RX_FDDRC_BAND_MARGIN_3 +250 0x0007 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x5000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x6400 //RX_FDDRC_THRD_3_2 +258 0x6400 //RX_FDDRC_THRD_3_3 +259 0x2000 //RX_FDDRC_SLANT_0_0 +260 0x2000 //RX_FDDRC_SLANT_0_1 +261 0x2000 //RX_FDDRC_SLANT_0_2 +262 0x2000 //RX_FDDRC_SLANT_0_3 +263 0x5333 //RX_FDDRC_SLANT_1_0 +264 0x5333 //RX_FDDRC_SLANT_1_1 +265 0x5333 //RX_FDDRC_SLANT_1_2 +266 0x5333 //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +268 0x0002 //RX_FILTINDX +269 0x0000 //RX_TDDRC_THRD_0 +270 0x0000 //RX_TDDRC_THRD_1 +271 0x1800 //RX_TDDRC_THRD_2 +272 0x1800 //RX_TDDRC_THRD_3 +273 0x3000 //RX_TDDRC_SLANT_0 +274 0x6E00 //RX_TDDRC_SLANT_1 +275 0x1000 //RX_TDDRC_ALPHA_UP_0 +276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x199A //RX_TDDRC_HMNC_GAIN +279 0x0001 //RX_TDDRC_SMT_FLAG +280 0x0CCD //RX_TDDRC_SMT_W +281 0x02FD //RX_TDDRC_DRC_GAIN +282 0x7C00 //RX_LAMBDA_PKA_FP +283 0x2000 //RX_TPKA_FP +284 0x2000 //RX_MIN_G_FP +285 0x0080 //RX_MAX_G_FP +286 0x000D //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 +288 0x0000 //RX_MAXLEVEL_CNG +289 0x3000 //RX_BWE_UV_TH +290 0x3000 //RX_BWE_UV_TH2 +291 0x1800 //RX_BWE_UV_TH3 +292 0x1000 //RX_BWE_V_TH +293 0x04CD //RX_BWE_GAIN1_V_TH1 +294 0x0F33 //RX_BWE_GAIN1_V_TH2 +295 0x7333 //RX_BWE_UV_EQ +296 0x199A //RX_BWE_V_EQ +297 0x7333 //RX_BWE_TONE_TH +298 0x0004 //RX_BWE_UV_HOLD_T +299 0x6CCD //RX_BWE_GAIN2_ALPHA +300 0x799A //RX_BWE_GAIN3_ALPHA +301 0x001E //RX_BWE_CUTOFF +302 0x3000 //RX_BWE_GAINFILL +303 0x3200 //RX_BWE_MAXTH_TONE +304 0x2000 //RX_BWE_EQ_0 +305 0x2000 //RX_BWE_EQ_1 +306 0x2000 //RX_BWE_EQ_2 +307 0x2000 //RX_BWE_EQ_3 +308 0x2000 //RX_BWE_EQ_4 +309 0x2000 //RX_BWE_EQ_5 +310 0x2000 //RX_BWE_EQ_6 +311 0x0000 //RX_BWE_RESRV_0 +312 0x0000 //RX_BWE_RESRV_1 +313 0x0000 //RX_BWE_RESRV_2 +#VOL 0 +163 0x1000 //RX_TDDRC_ALPHA_UP_1 +164 0x1000 //RX_TDDRC_ALPHA_UP_2 +165 0x1000 //RX_TDDRC_ALPHA_UP_3 +166 0x1000 //RX_TDDRC_ALPHA_UP_4 +184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +190 0x7000 //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +269 0x0000 //RX_TDDRC_THRD_0 +270 0x0000 //RX_TDDRC_THRD_1 +271 0x1800 //RX_TDDRC_THRD_2 +272 0x1800 //RX_TDDRC_THRD_3 +273 0x3000 //RX_TDDRC_SLANT_0 +274 0x6E00 //RX_TDDRC_SLANT_1 +275 0x1000 //RX_TDDRC_ALPHA_UP_0 +276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x199A //RX_TDDRC_HMNC_GAIN +279 0x0001 //RX_TDDRC_SMT_FLAG +280 0x0CCD //RX_TDDRC_SMT_W +281 0x02FD //RX_TDDRC_DRC_GAIN +195 0x0020 //RX_FDEQ_SUBNUM +196 0x4E4E //RX_FDEQ_GAIN_0 +197 0x4E56 //RX_FDEQ_GAIN_1 +198 0x6878 //RX_FDEQ_GAIN_2 +199 0x8088 //RX_FDEQ_GAIN_3 +200 0x848B //RX_FDEQ_GAIN_4 +201 0x8F8E //RX_FDEQ_GAIN_5 +202 0x9494 //RX_FDEQ_GAIN_6 +203 0x96A0 //RX_FDEQ_GAIN_7 +204 0xB8A0 //RX_FDEQ_GAIN_8 +205 0xA99D //RX_FDEQ_GAIN_9 +206 0x9D6A //RX_FDEQ_GAIN_10 +207 0x626B //RX_FDEQ_GAIN_11 +208 0x6C78 //RX_FDEQ_GAIN_12 +209 0x7884 //RX_FDEQ_GAIN_13 +210 0x9098 //RX_FDEQ_GAIN_14 +211 0x9CAC //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0202 //RX_FDEQ_BIN_0 +221 0x0202 //RX_FDEQ_BIN_1 +222 0x0302 //RX_FDEQ_BIN_2 +223 0x0304 //RX_FDEQ_BIN_3 +224 0x0405 //RX_FDEQ_BIN_4 +225 0x0506 //RX_FDEQ_BIN_5 +226 0x0708 //RX_FDEQ_BIN_6 +227 0x090A //RX_FDEQ_BIN_7 +228 0x0B0C //RX_FDEQ_BIN_8 +229 0x0D0E //RX_FDEQ_BIN_9 +230 0x1013 //RX_FDEQ_BIN_10 +231 0x1719 //RX_FDEQ_BIN_11 +232 0x1B1E //RX_FDEQ_BIN_12 +233 0x1E1E //RX_FDEQ_BIN_13 +234 0x1E28 //RX_FDEQ_BIN_14 +235 0x282C //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x4000 //RX_FDEQ_RESRV_0 +245 0x0320 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0030 //RX_FDDRC_BAND_MARGIN_1 +248 0x0050 //RX_FDDRC_BAND_MARGIN_2 +249 0x0080 //RX_FDDRC_BAND_MARGIN_3 +250 0x0007 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x5000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x6400 //RX_FDDRC_THRD_3_2 +258 0x6400 //RX_FDDRC_THRD_3_3 +259 0x2000 //RX_FDDRC_SLANT_0_0 +260 0x2000 //RX_FDDRC_SLANT_0_1 +261 0x2000 //RX_FDDRC_SLANT_0_2 +262 0x2000 //RX_FDDRC_SLANT_0_3 +263 0x5333 //RX_FDDRC_SLANT_1_0 +264 0x5333 //RX_FDDRC_SLANT_1_1 +265 0x5333 //RX_FDDRC_SLANT_1_2 +266 0x5333 //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +286 0x000D //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 +#VOL 1 +163 0x1000 //RX_TDDRC_ALPHA_UP_1 +164 0x1000 //RX_TDDRC_ALPHA_UP_2 +165 0x1000 //RX_TDDRC_ALPHA_UP_3 +166 0x1000 //RX_TDDRC_ALPHA_UP_4 +184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +190 0x7000 //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +269 0x0000 //RX_TDDRC_THRD_0 +270 0x0000 //RX_TDDRC_THRD_1 +271 0x1800 //RX_TDDRC_THRD_2 +272 0x1800 //RX_TDDRC_THRD_3 +273 0x3000 //RX_TDDRC_SLANT_0 +274 0x6E00 //RX_TDDRC_SLANT_1 +275 0x1000 //RX_TDDRC_ALPHA_UP_0 +276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x199A //RX_TDDRC_HMNC_GAIN +279 0x0001 //RX_TDDRC_SMT_FLAG +280 0x0CCD //RX_TDDRC_SMT_W +281 0x02FD //RX_TDDRC_DRC_GAIN +195 0x0020 //RX_FDEQ_SUBNUM +196 0x4E4E //RX_FDEQ_GAIN_0 +197 0x4E56 //RX_FDEQ_GAIN_1 +198 0x6878 //RX_FDEQ_GAIN_2 +199 0x8088 //RX_FDEQ_GAIN_3 +200 0x848B //RX_FDEQ_GAIN_4 +201 0x8F8E //RX_FDEQ_GAIN_5 +202 0x9494 //RX_FDEQ_GAIN_6 +203 0x96A0 //RX_FDEQ_GAIN_7 +204 0xB8A0 //RX_FDEQ_GAIN_8 +205 0xA99D //RX_FDEQ_GAIN_9 +206 0x9D6A //RX_FDEQ_GAIN_10 +207 0x626B //RX_FDEQ_GAIN_11 +208 0x6C78 //RX_FDEQ_GAIN_12 +209 0x7884 //RX_FDEQ_GAIN_13 +210 0x9098 //RX_FDEQ_GAIN_14 +211 0x9CAC //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0202 //RX_FDEQ_BIN_0 +221 0x0202 //RX_FDEQ_BIN_1 +222 0x0302 //RX_FDEQ_BIN_2 +223 0x0304 //RX_FDEQ_BIN_3 +224 0x0405 //RX_FDEQ_BIN_4 +225 0x0506 //RX_FDEQ_BIN_5 +226 0x0708 //RX_FDEQ_BIN_6 +227 0x090A //RX_FDEQ_BIN_7 +228 0x0B0C //RX_FDEQ_BIN_8 +229 0x0D0E //RX_FDEQ_BIN_9 +230 0x1013 //RX_FDEQ_BIN_10 +231 0x1719 //RX_FDEQ_BIN_11 +232 0x1B1E //RX_FDEQ_BIN_12 +233 0x1E1E //RX_FDEQ_BIN_13 +234 0x1E28 //RX_FDEQ_BIN_14 +235 0x282C //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x4000 //RX_FDEQ_RESRV_0 +245 0x0320 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0030 //RX_FDDRC_BAND_MARGIN_1 +248 0x0050 //RX_FDDRC_BAND_MARGIN_2 +249 0x0080 //RX_FDDRC_BAND_MARGIN_3 +250 0x0007 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x5000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x6400 //RX_FDDRC_THRD_3_2 +258 0x6400 //RX_FDDRC_THRD_3_3 +259 0x2000 //RX_FDDRC_SLANT_0_0 +260 0x2000 //RX_FDDRC_SLANT_0_1 +261 0x2000 //RX_FDDRC_SLANT_0_2 +262 0x2000 //RX_FDDRC_SLANT_0_3 +263 0x5333 //RX_FDDRC_SLANT_1_0 +264 0x5333 //RX_FDDRC_SLANT_1_1 +265 0x5333 //RX_FDDRC_SLANT_1_2 +266 0x5333 //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +286 0x0016 //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 +#VOL 2 +163 0x1000 //RX_TDDRC_ALPHA_UP_1 +164 0x1000 //RX_TDDRC_ALPHA_UP_2 +165 0x1000 //RX_TDDRC_ALPHA_UP_3 +166 0x1000 //RX_TDDRC_ALPHA_UP_4 +184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +190 0x7000 //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +269 0x0000 //RX_TDDRC_THRD_0 +270 0x0000 //RX_TDDRC_THRD_1 +271 0x1800 //RX_TDDRC_THRD_2 +272 0x1800 //RX_TDDRC_THRD_3 +273 0x3000 //RX_TDDRC_SLANT_0 +274 0x6E00 //RX_TDDRC_SLANT_1 +275 0x1000 //RX_TDDRC_ALPHA_UP_0 +276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x199A //RX_TDDRC_HMNC_GAIN +279 0x0001 //RX_TDDRC_SMT_FLAG +280 0x0CCD //RX_TDDRC_SMT_W +281 0x02FD //RX_TDDRC_DRC_GAIN +195 0x0020 //RX_FDEQ_SUBNUM +196 0x4E4E //RX_FDEQ_GAIN_0 +197 0x4E56 //RX_FDEQ_GAIN_1 +198 0x6878 //RX_FDEQ_GAIN_2 +199 0x8088 //RX_FDEQ_GAIN_3 +200 0x848B //RX_FDEQ_GAIN_4 +201 0x8F8E //RX_FDEQ_GAIN_5 +202 0x9494 //RX_FDEQ_GAIN_6 +203 0x96A0 //RX_FDEQ_GAIN_7 +204 0xB8A0 //RX_FDEQ_GAIN_8 +205 0xA99D //RX_FDEQ_GAIN_9 +206 0x9D6A //RX_FDEQ_GAIN_10 +207 0x626B //RX_FDEQ_GAIN_11 +208 0x6C78 //RX_FDEQ_GAIN_12 +209 0x7884 //RX_FDEQ_GAIN_13 +210 0x9098 //RX_FDEQ_GAIN_14 +211 0x9CAC //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0202 //RX_FDEQ_BIN_0 +221 0x0202 //RX_FDEQ_BIN_1 +222 0x0302 //RX_FDEQ_BIN_2 +223 0x0304 //RX_FDEQ_BIN_3 +224 0x0405 //RX_FDEQ_BIN_4 +225 0x0506 //RX_FDEQ_BIN_5 +226 0x0708 //RX_FDEQ_BIN_6 +227 0x090A //RX_FDEQ_BIN_7 +228 0x0B0C //RX_FDEQ_BIN_8 +229 0x0D0E //RX_FDEQ_BIN_9 +230 0x1013 //RX_FDEQ_BIN_10 +231 0x1719 //RX_FDEQ_BIN_11 +232 0x1B1E //RX_FDEQ_BIN_12 +233 0x1E1E //RX_FDEQ_BIN_13 +234 0x1E28 //RX_FDEQ_BIN_14 +235 0x282C //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x4000 //RX_FDEQ_RESRV_0 +245 0x0320 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0030 //RX_FDDRC_BAND_MARGIN_1 +248 0x0050 //RX_FDDRC_BAND_MARGIN_2 +249 0x0080 //RX_FDDRC_BAND_MARGIN_3 +250 0x0007 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x5000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x6400 //RX_FDDRC_THRD_3_2 +258 0x6400 //RX_FDDRC_THRD_3_3 +259 0x2000 //RX_FDDRC_SLANT_0_0 +260 0x2000 //RX_FDDRC_SLANT_0_1 +261 0x2000 //RX_FDDRC_SLANT_0_2 +262 0x2000 //RX_FDDRC_SLANT_0_3 +263 0x5333 //RX_FDDRC_SLANT_1_0 +264 0x5333 //RX_FDDRC_SLANT_1_1 +265 0x5333 //RX_FDDRC_SLANT_1_2 +266 0x5333 //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +286 0x0024 //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 +#VOL 3 +163 0x1000 //RX_TDDRC_ALPHA_UP_1 +164 0x1000 //RX_TDDRC_ALPHA_UP_2 +165 0x1000 //RX_TDDRC_ALPHA_UP_3 +166 0x1000 //RX_TDDRC_ALPHA_UP_4 +184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +190 0x7000 //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +269 0x0000 //RX_TDDRC_THRD_0 +270 0x0000 //RX_TDDRC_THRD_1 +271 0x1800 //RX_TDDRC_THRD_2 +272 0x1800 //RX_TDDRC_THRD_3 +273 0x3000 //RX_TDDRC_SLANT_0 +274 0x6E00 //RX_TDDRC_SLANT_1 +275 0x1000 //RX_TDDRC_ALPHA_UP_0 +276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x199A //RX_TDDRC_HMNC_GAIN +279 0x0001 //RX_TDDRC_SMT_FLAG +280 0x0CCD //RX_TDDRC_SMT_W +281 0x02FD //RX_TDDRC_DRC_GAIN +195 0x0020 //RX_FDEQ_SUBNUM +196 0x4E4E //RX_FDEQ_GAIN_0 +197 0x4E56 //RX_FDEQ_GAIN_1 +198 0x6878 //RX_FDEQ_GAIN_2 +199 0x8088 //RX_FDEQ_GAIN_3 +200 0x848B //RX_FDEQ_GAIN_4 +201 0x8F8E //RX_FDEQ_GAIN_5 +202 0x9494 //RX_FDEQ_GAIN_6 +203 0x96A0 //RX_FDEQ_GAIN_7 +204 0xB8A0 //RX_FDEQ_GAIN_8 +205 0xA99D //RX_FDEQ_GAIN_9 +206 0x9D6A //RX_FDEQ_GAIN_10 +207 0x626B //RX_FDEQ_GAIN_11 +208 0x6C78 //RX_FDEQ_GAIN_12 +209 0x7884 //RX_FDEQ_GAIN_13 +210 0x9098 //RX_FDEQ_GAIN_14 +211 0x9CAC //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0202 //RX_FDEQ_BIN_0 +221 0x0202 //RX_FDEQ_BIN_1 +222 0x0302 //RX_FDEQ_BIN_2 +223 0x0304 //RX_FDEQ_BIN_3 +224 0x0405 //RX_FDEQ_BIN_4 +225 0x0506 //RX_FDEQ_BIN_5 +226 0x0708 //RX_FDEQ_BIN_6 +227 0x090A //RX_FDEQ_BIN_7 +228 0x0B0C //RX_FDEQ_BIN_8 +229 0x0D0E //RX_FDEQ_BIN_9 +230 0x1013 //RX_FDEQ_BIN_10 +231 0x1719 //RX_FDEQ_BIN_11 +232 0x1B1E //RX_FDEQ_BIN_12 +233 0x1E1E //RX_FDEQ_BIN_13 +234 0x1E28 //RX_FDEQ_BIN_14 +235 0x282C //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x4000 //RX_FDEQ_RESRV_0 +245 0x0320 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0030 //RX_FDDRC_BAND_MARGIN_1 +248 0x0050 //RX_FDDRC_BAND_MARGIN_2 +249 0x0080 //RX_FDDRC_BAND_MARGIN_3 +250 0x0007 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x5000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x6400 //RX_FDDRC_THRD_3_2 +258 0x6400 //RX_FDDRC_THRD_3_3 +259 0x2000 //RX_FDDRC_SLANT_0_0 +260 0x2000 //RX_FDDRC_SLANT_0_1 +261 0x2000 //RX_FDDRC_SLANT_0_2 +262 0x2000 //RX_FDDRC_SLANT_0_3 +263 0x5333 //RX_FDDRC_SLANT_1_0 +264 0x5333 //RX_FDDRC_SLANT_1_1 +265 0x5333 //RX_FDDRC_SLANT_1_2 +266 0x5333 //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +286 0x003A //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 +#VOL 4 +163 0x1000 //RX_TDDRC_ALPHA_UP_1 +164 0x1000 //RX_TDDRC_ALPHA_UP_2 +165 0x1000 //RX_TDDRC_ALPHA_UP_3 +166 0x1000 //RX_TDDRC_ALPHA_UP_4 +184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +190 0x7000 //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +269 0x0000 //RX_TDDRC_THRD_0 +270 0x0000 //RX_TDDRC_THRD_1 +271 0x1800 //RX_TDDRC_THRD_2 +272 0x1800 //RX_TDDRC_THRD_3 +273 0x3000 //RX_TDDRC_SLANT_0 +274 0x6E00 //RX_TDDRC_SLANT_1 +275 0x1000 //RX_TDDRC_ALPHA_UP_0 +276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x199A //RX_TDDRC_HMNC_GAIN +279 0x0001 //RX_TDDRC_SMT_FLAG +280 0x0CCD //RX_TDDRC_SMT_W +281 0x02FD //RX_TDDRC_DRC_GAIN +195 0x0020 //RX_FDEQ_SUBNUM +196 0x4E4E //RX_FDEQ_GAIN_0 +197 0x4E56 //RX_FDEQ_GAIN_1 +198 0x6878 //RX_FDEQ_GAIN_2 +199 0x8088 //RX_FDEQ_GAIN_3 +200 0x848B //RX_FDEQ_GAIN_4 +201 0x8F8E //RX_FDEQ_GAIN_5 +202 0x9494 //RX_FDEQ_GAIN_6 +203 0x96A0 //RX_FDEQ_GAIN_7 +204 0xB8A0 //RX_FDEQ_GAIN_8 +205 0xA99D //RX_FDEQ_GAIN_9 +206 0x9D6A //RX_FDEQ_GAIN_10 +207 0x626B //RX_FDEQ_GAIN_11 +208 0x6C78 //RX_FDEQ_GAIN_12 +209 0x7884 //RX_FDEQ_GAIN_13 +210 0x9098 //RX_FDEQ_GAIN_14 +211 0x9CAC //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0202 //RX_FDEQ_BIN_0 +221 0x0202 //RX_FDEQ_BIN_1 +222 0x0302 //RX_FDEQ_BIN_2 +223 0x0304 //RX_FDEQ_BIN_3 +224 0x0405 //RX_FDEQ_BIN_4 +225 0x0506 //RX_FDEQ_BIN_5 +226 0x0708 //RX_FDEQ_BIN_6 +227 0x090A //RX_FDEQ_BIN_7 +228 0x0B0C //RX_FDEQ_BIN_8 +229 0x0D0E //RX_FDEQ_BIN_9 +230 0x1013 //RX_FDEQ_BIN_10 +231 0x1719 //RX_FDEQ_BIN_11 +232 0x1B1E //RX_FDEQ_BIN_12 +233 0x1E1E //RX_FDEQ_BIN_13 +234 0x1E28 //RX_FDEQ_BIN_14 +235 0x282C //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x4000 //RX_FDEQ_RESRV_0 +245 0x0320 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0030 //RX_FDDRC_BAND_MARGIN_1 +248 0x0050 //RX_FDDRC_BAND_MARGIN_2 +249 0x0080 //RX_FDDRC_BAND_MARGIN_3 +250 0x0007 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x5000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x6400 //RX_FDDRC_THRD_3_2 +258 0x6400 //RX_FDDRC_THRD_3_3 +259 0x2000 //RX_FDDRC_SLANT_0_0 +260 0x2000 //RX_FDDRC_SLANT_0_1 +261 0x2000 //RX_FDDRC_SLANT_0_2 +262 0x2000 //RX_FDDRC_SLANT_0_3 +263 0x5333 //RX_FDDRC_SLANT_1_0 +264 0x5333 //RX_FDDRC_SLANT_1_1 +265 0x5333 //RX_FDDRC_SLANT_1_2 +266 0x5333 //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +286 0x0059 //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 +#VOL 5 +163 0x1000 //RX_TDDRC_ALPHA_UP_1 +164 0x1000 //RX_TDDRC_ALPHA_UP_2 +165 0x1000 //RX_TDDRC_ALPHA_UP_3 +166 0x1000 //RX_TDDRC_ALPHA_UP_4 +184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +190 0x7000 //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +269 0x0000 //RX_TDDRC_THRD_0 +270 0x0000 //RX_TDDRC_THRD_1 +271 0x1800 //RX_TDDRC_THRD_2 +272 0x1800 //RX_TDDRC_THRD_3 +273 0x3000 //RX_TDDRC_SLANT_0 +274 0x6E00 //RX_TDDRC_SLANT_1 +275 0x1000 //RX_TDDRC_ALPHA_UP_0 +276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x199A //RX_TDDRC_HMNC_GAIN +279 0x0001 //RX_TDDRC_SMT_FLAG +280 0x0CCD //RX_TDDRC_SMT_W +281 0x02FD //RX_TDDRC_DRC_GAIN +195 0x0020 //RX_FDEQ_SUBNUM +196 0x4E4E //RX_FDEQ_GAIN_0 +197 0x4E56 //RX_FDEQ_GAIN_1 +198 0x6878 //RX_FDEQ_GAIN_2 +199 0x8088 //RX_FDEQ_GAIN_3 +200 0x848B //RX_FDEQ_GAIN_4 +201 0x8F8E //RX_FDEQ_GAIN_5 +202 0x9494 //RX_FDEQ_GAIN_6 +203 0x96A0 //RX_FDEQ_GAIN_7 +204 0xB8A0 //RX_FDEQ_GAIN_8 +205 0xA99D //RX_FDEQ_GAIN_9 +206 0x9D6A //RX_FDEQ_GAIN_10 +207 0x626B //RX_FDEQ_GAIN_11 +208 0x6C78 //RX_FDEQ_GAIN_12 +209 0x7884 //RX_FDEQ_GAIN_13 +210 0x9098 //RX_FDEQ_GAIN_14 +211 0x9CAC //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0202 //RX_FDEQ_BIN_0 +221 0x0202 //RX_FDEQ_BIN_1 +222 0x0302 //RX_FDEQ_BIN_2 +223 0x0304 //RX_FDEQ_BIN_3 +224 0x0405 //RX_FDEQ_BIN_4 +225 0x0506 //RX_FDEQ_BIN_5 +226 0x0708 //RX_FDEQ_BIN_6 +227 0x090A //RX_FDEQ_BIN_7 +228 0x0B0C //RX_FDEQ_BIN_8 +229 0x0D0E //RX_FDEQ_BIN_9 +230 0x1013 //RX_FDEQ_BIN_10 +231 0x1719 //RX_FDEQ_BIN_11 +232 0x1B1E //RX_FDEQ_BIN_12 +233 0x1E1E //RX_FDEQ_BIN_13 +234 0x1E28 //RX_FDEQ_BIN_14 +235 0x282C //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x4000 //RX_FDEQ_RESRV_0 +245 0x0320 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0030 //RX_FDDRC_BAND_MARGIN_1 +248 0x0050 //RX_FDDRC_BAND_MARGIN_2 +249 0x0080 //RX_FDDRC_BAND_MARGIN_3 +250 0x0007 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x5000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x6400 //RX_FDDRC_THRD_3_2 +258 0x6400 //RX_FDDRC_THRD_3_3 +259 0x2000 //RX_FDDRC_SLANT_0_0 +260 0x2000 //RX_FDDRC_SLANT_0_1 +261 0x2000 //RX_FDDRC_SLANT_0_2 +262 0x2000 //RX_FDDRC_SLANT_0_3 +263 0x5333 //RX_FDDRC_SLANT_1_0 +264 0x5333 //RX_FDDRC_SLANT_1_1 +265 0x5333 //RX_FDDRC_SLANT_1_2 +266 0x5333 //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +286 0x0090 //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 +#VOL 6 +163 0x1000 //RX_TDDRC_ALPHA_UP_1 +164 0x1000 //RX_TDDRC_ALPHA_UP_2 +165 0x1000 //RX_TDDRC_ALPHA_UP_3 +166 0x1000 //RX_TDDRC_ALPHA_UP_4 +184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +190 0x7000 //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +269 0x0000 //RX_TDDRC_THRD_0 +270 0x0000 //RX_TDDRC_THRD_1 +271 0x1800 //RX_TDDRC_THRD_2 +272 0x1800 //RX_TDDRC_THRD_3 +273 0x3000 //RX_TDDRC_SLANT_0 +274 0x6E00 //RX_TDDRC_SLANT_1 +275 0x1000 //RX_TDDRC_ALPHA_UP_0 +276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x199A //RX_TDDRC_HMNC_GAIN +279 0x0001 //RX_TDDRC_SMT_FLAG +280 0x0CCD //RX_TDDRC_SMT_W +281 0x02FD //RX_TDDRC_DRC_GAIN +195 0x0020 //RX_FDEQ_SUBNUM +196 0x4E4E //RX_FDEQ_GAIN_0 +197 0x4E56 //RX_FDEQ_GAIN_1 +198 0x6878 //RX_FDEQ_GAIN_2 +199 0x8088 //RX_FDEQ_GAIN_3 +200 0x848B //RX_FDEQ_GAIN_4 +201 0x8F8E //RX_FDEQ_GAIN_5 +202 0x9494 //RX_FDEQ_GAIN_6 +203 0x96A0 //RX_FDEQ_GAIN_7 +204 0xB8A0 //RX_FDEQ_GAIN_8 +205 0xA99D //RX_FDEQ_GAIN_9 +206 0x9D6A //RX_FDEQ_GAIN_10 +207 0x626B //RX_FDEQ_GAIN_11 +208 0x6C78 //RX_FDEQ_GAIN_12 +209 0x7884 //RX_FDEQ_GAIN_13 +210 0x9098 //RX_FDEQ_GAIN_14 +211 0x9CAC //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0202 //RX_FDEQ_BIN_0 +221 0x0202 //RX_FDEQ_BIN_1 +222 0x0302 //RX_FDEQ_BIN_2 +223 0x0304 //RX_FDEQ_BIN_3 +224 0x0405 //RX_FDEQ_BIN_4 +225 0x0506 //RX_FDEQ_BIN_5 +226 0x0708 //RX_FDEQ_BIN_6 +227 0x090A //RX_FDEQ_BIN_7 +228 0x0B0C //RX_FDEQ_BIN_8 +229 0x0D0E //RX_FDEQ_BIN_9 +230 0x1013 //RX_FDEQ_BIN_10 +231 0x1719 //RX_FDEQ_BIN_11 +232 0x1B1E //RX_FDEQ_BIN_12 +233 0x1E1E //RX_FDEQ_BIN_13 +234 0x1E28 //RX_FDEQ_BIN_14 +235 0x282C //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x4000 //RX_FDEQ_RESRV_0 +245 0x0320 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0030 //RX_FDDRC_BAND_MARGIN_1 +248 0x0050 //RX_FDDRC_BAND_MARGIN_2 +249 0x0080 //RX_FDDRC_BAND_MARGIN_3 +250 0x0007 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x5000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x6400 //RX_FDDRC_THRD_3_2 +258 0x6400 //RX_FDDRC_THRD_3_3 +259 0x2000 //RX_FDDRC_SLANT_0_0 +260 0x2000 //RX_FDDRC_SLANT_0_1 +261 0x2000 //RX_FDDRC_SLANT_0_2 +262 0x2000 //RX_FDDRC_SLANT_0_3 +263 0x5333 //RX_FDDRC_SLANT_1_0 +264 0x5333 //RX_FDDRC_SLANT_1_1 +265 0x5333 //RX_FDDRC_SLANT_1_2 +266 0x5333 //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +286 0x0100 //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 #CASE_NAME HANDSET-HANDSET-VOICE_GENERIC-NB -#PARAM_TYPE TX+RX -#TOTAL_CUSTOM_STEP 7 +#PARAM_MODE FULL +#PARAM_TYPE TX+2RX +#TOTAL_CUSTOM_STEP 7+7 #TX 0 0x0000 //TX_OPERATION_MODE_0 1 0x0000 //TX_OPERATION_MODE_1 -2 0x0036 //TX_PATCH_REG +2 0x0076 //TX_PATCH_REG 3 0x6F7E //TX_SENDFUNC_MODE_0 4 0x0001 //TX_SENDFUNC_MODE_1 5 0x0002 //TX_NUM_MIC @@ -5287,7 +8039,7 @@ 18 0x0000 //TX_SYS_RESRV_2 19 0x0000 //TX_SYS_RESRV_3 20 0x0000 //TX_DIST2REF0 -21 0x00A4 //TX_DIST2REF1 +21 0x00A3 //TX_DIST2REF1 22 0x0000 //TX_DIST2REF_02 23 0x0000 //TX_DIST2REF_03 24 0x0000 //TX_DIST2REF_04 @@ -5517,19 +8269,19 @@ 248 0xF800 //TX_THR_SN_EST_6 249 0xF700 //TX_THR_SN_EST_7 250 0x0000 //TX_DELTA_THR_SN_EST_0 -251 0x01A0 //TX_DELTA_THR_SN_EST_1 -252 0x0100 //TX_DELTA_THR_SN_EST_2 -253 0x0200 //TX_DELTA_THR_SN_EST_3 -254 0x01A0 //TX_DELTA_THR_SN_EST_4 -255 0x0100 //TX_DELTA_THR_SN_EST_5 -256 0x0000 //TX_DELTA_THR_SN_EST_6 +251 0x0100 //TX_DELTA_THR_SN_EST_1 +252 0x0200 //TX_DELTA_THR_SN_EST_2 +253 0x01A0 //TX_DELTA_THR_SN_EST_3 +254 0x0100 //TX_DELTA_THR_SN_EST_4 +255 0x0000 //TX_DELTA_THR_SN_EST_5 +256 0x01A0 //TX_DELTA_THR_SN_EST_6 257 0x0200 //TX_DELTA_THR_SN_EST_7 258 0x4000 //TX_LAMBDA_NN_EST_0 -259 0x4000 //TX_LAMBDA_NN_EST_1 -260 0x3000 //TX_LAMBDA_NN_EST_2 -261 0x4000 //TX_LAMBDA_NN_EST_3 +259 0x3000 //TX_LAMBDA_NN_EST_1 +260 0x4000 //TX_LAMBDA_NN_EST_2 +261 0x3000 //TX_LAMBDA_NN_EST_3 262 0x3000 //TX_LAMBDA_NN_EST_4 -263 0x3000 //TX_LAMBDA_NN_EST_5 +263 0x4000 //TX_LAMBDA_NN_EST_5 264 0x4000 //TX_LAMBDA_NN_EST_6 265 0x4000 //TX_LAMBDA_NN_EST_7 266 0x0400 //TX_N_SN_EST @@ -5548,20 +8300,20 @@ 279 0x4000 //TX_B_POST_FLT_0 280 0x4000 //TX_B_POST_FLT_1 281 0x0014 //TX_NS_LVL_CTRL_0 -282 0x001B //TX_NS_LVL_CTRL_1 -283 0x0019 //TX_NS_LVL_CTRL_2 +282 0x0019 //TX_NS_LVL_CTRL_1 +283 0x0017 //TX_NS_LVL_CTRL_2 284 0x0017 //TX_NS_LVL_CTRL_3 -285 0x0017 //TX_NS_LVL_CTRL_4 -286 0x0019 //TX_NS_LVL_CTRL_5 -287 0x0014 //TX_NS_LVL_CTRL_6 +285 0x0019 //TX_NS_LVL_CTRL_4 +286 0x0014 //TX_NS_LVL_CTRL_5 +287 0x001B //TX_NS_LVL_CTRL_6 288 0x0010 //TX_NS_LVL_CTRL_7 289 0x0010 //TX_MIN_GAIN_S_0 290 0x000C //TX_MIN_GAIN_S_1 -291 0x000C //TX_MIN_GAIN_S_2 +291 0x0010 //TX_MIN_GAIN_S_2 292 0x0010 //TX_MIN_GAIN_S_3 -293 0x0010 //TX_MIN_GAIN_S_4 -294 0x000C //TX_MIN_GAIN_S_5 -295 0x0014 //TX_MIN_GAIN_S_6 +293 0x000C //TX_MIN_GAIN_S_4 +294 0x0014 //TX_MIN_GAIN_S_5 +295 0x000C //TX_MIN_GAIN_S_6 296 0x0014 //TX_MIN_GAIN_S_7 297 0x5000 //TX_NMOS_SUP 298 0x0000 //TX_NS_MAX_PRI_SNR_TH @@ -5571,8 +8323,8 @@ 302 0x4000 //TX_SNRI_SUP_2 303 0x4000 //TX_SNRI_SUP_3 304 0x4000 //TX_SNRI_SUP_4 -305 0x4000 //TX_SNRI_SUP_5 -306 0x7FFF //TX_SNRI_SUP_6 +305 0x7FFF //TX_SNRI_SUP_5 +306 0x4000 //TX_SNRI_SUP_6 307 0x3000 //TX_SNRI_SUP_7 308 0x3000 //TX_THR_LFNS 309 0x001A //TX_G_LFNS @@ -5581,36 +8333,36 @@ 312 0x7FFF //TX_A_POST_FILT_0 313 0x2000 //TX_A_POST_FILT_1 314 0x2000 //TX_A_POST_FILT_S_0 -315 0x7000 //TX_A_POST_FILT_S_1 -316 0x6000 //TX_A_POST_FILT_S_2 -317 0x5000 //TX_A_POST_FILT_S_3 -318 0x2000 //TX_A_POST_FILT_S_4 -319 0x6000 //TX_A_POST_FILT_S_5 -320 0x2000 //TX_A_POST_FILT_S_6 +315 0x6000 //TX_A_POST_FILT_S_1 +316 0x5000 //TX_A_POST_FILT_S_2 +317 0x2000 //TX_A_POST_FILT_S_3 +318 0x6000 //TX_A_POST_FILT_S_4 +319 0x2000 //TX_A_POST_FILT_S_5 +320 0x7000 //TX_A_POST_FILT_S_6 321 0x7000 //TX_A_POST_FILT_S_7 322 0x4000 //TX_B_POST_FILT_0 323 0x4000 //TX_B_POST_FILT_1 -324 0x7FFF //TX_B_POST_FILT_2 -325 0x5000 //TX_B_POST_FILT_3 -326 0x7FFF //TX_B_POST_FILT_4 -327 0x7FFF //TX_B_POST_FILT_5 +324 0x5000 //TX_B_POST_FILT_2 +325 0x4000 //TX_B_POST_FILT_3 +326 0x4000 //TX_B_POST_FILT_4 +327 0x4000 //TX_B_POST_FILT_5 328 0x4000 //TX_B_POST_FILT_6 329 0x2000 //TX_B_POST_FILT_7 330 0x7FFF //TX_B_LESSCUT_RTO_S_0 -331 0x7FFF //TX_B_LESSCUT_RTO_S_1 -332 0x7FFF //TX_B_LESSCUT_RTO_S_2 -333 0x7FFF //TX_B_LESSCUT_RTO_S_3 -334 0x7FFF //TX_B_LESSCUT_RTO_S_4 -335 0x7FFF //TX_B_LESSCUT_RTO_S_5 -336 0x7FFF //TX_B_LESSCUT_RTO_S_6 -337 0x7FFF //TX_B_LESSCUT_RTO_S_7 +331 0x1000 //TX_B_LESSCUT_RTO_S_1 +332 0x1000 //TX_B_LESSCUT_RTO_S_2 +333 0x1000 //TX_B_LESSCUT_RTO_S_3 +334 0x1000 //TX_B_LESSCUT_RTO_S_4 +335 0x1000 //TX_B_LESSCUT_RTO_S_5 +336 0x1000 //TX_B_LESSCUT_RTO_S_6 +337 0x1000 //TX_B_LESSCUT_RTO_S_7 338 0x7E14 //TX_LAMBDA_PFILT 339 0x7C29 //TX_LAMBDA_PFILT_S_0 -340 0x7C29 //TX_LAMBDA_PFILT_S_1 -341 0x7200 //TX_LAMBDA_PFILT_S_2 -342 0x7900 //TX_LAMBDA_PFILT_S_3 -343 0x7400 //TX_LAMBDA_PFILT_S_4 -344 0x7200 //TX_LAMBDA_PFILT_S_5 +340 0x7200 //TX_LAMBDA_PFILT_S_1 +341 0x7900 //TX_LAMBDA_PFILT_S_2 +342 0x7400 //TX_LAMBDA_PFILT_S_3 +343 0x7200 //TX_LAMBDA_PFILT_S_4 +344 0x7C29 //TX_LAMBDA_PFILT_S_5 345 0x7C29 //TX_LAMBDA_PFILT_S_6 346 0x7C29 //TX_LAMBDA_PFILT_S_7 347 0x0200 //TX_K_PEPPER @@ -5646,10 +8398,10 @@ 377 0x0000 //TX_NOISE_TH_5_4 378 0x07D0 //TX_NOISE_TH_6 379 0x0004 //TX_MINENOISE_TH -380 0x4000 //TX_MINENOISE_MIC0_TH_MTS -381 0xFFEE //TX_MINENOISE_MIC0_TH_EXP -382 0x6000 //TX_MINENOISE_MIC0_S_TH_MTS -383 0xFFF3 //TX_MINENOISE_MIC0_S_TH_EXP +380 0xD508 //TX_MORENS_TFMASK_TH +381 0x0001 //TX_DRC_QUIET_FLOOR +382 0x6D60 //TX_RATIODTL_CUT_TH +383 0x0DAC //TX_DT_CUT_K1 384 0x00A5 //TX_OUT_ENER_S_TH_CLEAN 385 0x00A5 //TX_OUT_ENER_S_TH_LESSCLEAN 386 0x00A5 //TX_OUT_ENER_S_TH_NOISY @@ -5657,15 +8409,15 @@ 388 0x00CE //TX_OUT_ENER_TH_SPEECH 389 0x2000 //TX_SN_NPB_GAIN 390 0x0000 //TX_NN_NPB_GAIN -391 0x0000 //TX_CSX_ALPHA_0 -392 0x0000 //TX_CSX_ALPHA_1 -393 0x0000 //TX_CSX_ALPHA_2 -394 0x0000 //TX_CSX_ALPHA_3 -395 0x0800 //TX_MU_ARSP_EST -396 0x00C8 //TX_P_OUTBEAM_MIN_TH +391 0x3000 //TX_POST_MASK_SUP_HSNE +392 0x07D0 //TX_TAIL_DET_TH +393 0x4000 //TX_B_LESSCUT_RTO_WTA +394 0x0000 //TX_MEL_G_R +395 0x0080 //TX_SUPHIGH_TH +396 0x0000 //TX_MASK_G_R 397 0x0002 //TX_EXTRA_NS_L -398 0x0800 //TX_EXTRA_NS_A -399 0x0005 //TX_VR_NOISE_FLOOR_TH +398 0x1800 //TX_C_POST_FLT_MASK +399 0x7FFF //TX_A_POST_FLT_WNS 400 0x0148 //TX_MIN_G_LOW300HZ 401 0x0001 //TX_MAXLEVEL_CNG 402 0x00B4 //TX_STN_NOISE_TH @@ -5780,16 +8532,16 @@ 511 0x6666 //TX_MIC_TO_BFGAIN 512 0x0000 //TX_MICTOBFGAIN0 513 0x0000 //TX_FASTMUE_TH -514 0x0000 //TX_DERVB_LEN_0 -515 0x0000 //TX_DERVB_LEN_1 -516 0x0000 //TX_RHO_DERVB -517 0x0000 //TX_MIC_INDX_DERVB -518 0x0000 //TX_MU_DERVB -519 0x0000 //TX_DR_RESRV_0 -520 0x0000 //TX_DR_RESRV_1 -521 0x0000 //TX_DR_RESRV_2 -522 0x0000 //TX_DR_RESRV_3 -523 0x0000 //TX_DR_RESRV_4 +514 0x3000 //TX_DEREVERB_LF_MU +515 0x34CD //TX_DEREVERB_HF_MU +516 0x0007 //TX_DEREVERB_DELAY +517 0x0004 //TX_DEREVERB_COEF_LEN +518 0x0003 //TX_DEREVERB_DNR +519 0x0000 //TX_DEREVERB_ALPHA +520 0x0000 //TX_DEREVERB_BETA +521 0x3A98 //TX_GSC_RTOL_TH +522 0x3A98 //TX_GSC_RTOH_TH +523 0x7E2C //TX_WIDE2_MEANHTH 524 0x0000 //TX_DR_RESRV_5 525 0x0000 //TX_DR_RESRV_6 526 0x0000 //TX_DR_RESRV_7 @@ -5866,7 +8618,7 @@ 597 0x0808 //TX_FDEQ_BIN_6 598 0x050E //TX_FDEQ_BIN_7 599 0x0B0C //TX_FDEQ_BIN_8 -600 0x0F0F //TX_FDEQ_BIN_9 +600 0x0F09 //TX_FDEQ_BIN_9 601 0x0000 //TX_FDEQ_BIN_10 602 0x0000 //TX_FDEQ_BIN_11 603 0x0000 //TX_FDEQ_BIN_12 @@ -5938,10 +8690,10 @@ 669 0x4848 //TX_PREEQ_GAIN_MIC1_3 670 0x4848 //TX_PREEQ_GAIN_MIC1_4 671 0x4848 //TX_PREEQ_GAIN_MIC1_5 -672 0x4848 //TX_PREEQ_GAIN_MIC1_6 -673 0x484A //TX_PREEQ_GAIN_MIC1_7 -674 0x4C4D //TX_PREEQ_GAIN_MIC1_8 -675 0x4F52 //TX_PREEQ_GAIN_MIC1_9 +672 0x494A //TX_PREEQ_GAIN_MIC1_6 +673 0x4B4C //TX_PREEQ_GAIN_MIC1_7 +674 0x4D4E //TX_PREEQ_GAIN_MIC1_8 +675 0x4F51 //TX_PREEQ_GAIN_MIC1_9 676 0x4848 //TX_PREEQ_GAIN_MIC1_10 677 0x4848 //TX_PREEQ_GAIN_MIC1_11 678 0x4848 //TX_PREEQ_GAIN_MIC1_12 @@ -6132,7 +8884,7 @@ 863 0x199A //TX_TDDRC_HMNC_GAIN 864 0x0000 //TX_TDDRC_SMT_FLAG 865 0x0CCD //TX_TDDRC_SMT_W -866 0x0550 //TX_TDDRC_DRC_GAIN +866 0x05A0 //TX_TDDRC_DRC_GAIN 867 0x7FFF //TX_TDDRC_LMT_THRD 868 0x0000 //TX_TDDRC_LMT_ALPHA 869 0x0000 //TX_TFMASKLTH @@ -6163,8 +8915,73 @@ 894 0xC000 //TX_FASTNS_SSA_THHFL 895 0xCCCC //TX_FASTNS_SSA_THLFH 896 0xD999 //TX_FASTNS_SSA_THHFH +897 0x2339 //TX_SENDFUNC_REG_MICMUTE +898 0x0021 //TX_SENDFUNC_REG_MICMUTE1 +899 0x02BC //TX_MICMUTE_RATIO_THR +900 0x0140 //TX_MICMUTE_AMP_THR +901 0x0004 //TX_MICMUTE_HPF_IND +902 0x00C0 //TX_MICMUTE_LOG_EYR_TH +903 0x0008 //TX_MICMUTE_CVG_TIME +904 0x0008 //TX_MICMUTE_RELEASE_TIME +905 0x01FE //TX_MIC_VOLUME_MIC0MUTE +906 0x0020 //TX_MICMUTE_EPD_OFFSET_0 +907 0x001E //TX_MICMUTE_FRQ_AEC_L +908 0x7999 //TX_MICMUTE_EAD_THR +909 0x7FFF //TX_MICMUTE_LAMBDA_CB_NLE +910 0x7FFF //TX_MICMUTE_LAMBDA_RE_EST +911 0x4000 //TX_DTD_THR1_MICMUTE_0 +912 0x7000 //TX_DTD_THR1_MICMUTE_1 +913 0x7FFF //TX_DTD_THR1_MICMUTE_2 +914 0x7FFF //TX_DTD_THR1_MICMUTE_3 +915 0x6CCC //TX_DTD_THR2_MICMUTE_0 +916 0x0400 //TX_MICMUTE_MIN_EQ_RE_EST_0 +917 0x0400 //TX_MICMUTE_MIN_EQ_RE_EST_1 +918 0x1000 //TX_MICMUTE_MIN_EQ_RE_EST_2 +919 0x7FFF //TX_MICMUTE_MIN_EQ_RE_EST_3 +920 0x7FFF //TX_MICMUTE_MIN_EQ_RE_EST_4 +921 0x4000 //TX_MICMUTE_C_POST_FLT +922 0x03E8 //TX_MICMUTE_DT_CUT_K +923 0x0001 //TX_MICMUTE_DT_CUT_THR +924 0x03E8 //TX_MICMUTE_DT_CUT_K2 +925 0x0001 //TX_MICMUTE_DT_CUT_THR2 +926 0x0064 //TX_MICMUTE_DT2_HOLD_N +927 0x1000 //TX_MICMUTE_RATIODTH_THCUT +928 0x1000 //TX_MICMUTE_B_POST_FLT_ECHOL +929 0x7FFF //TX_MICMUTE_B_POST_FLT_ECHOH +930 0x0400 //TX_MICMUTE_C_POST_FLT_MASK +931 0x7999 //TX_MICMUTE_RATIODTL_CUT_TH +932 0x0258 //TX_MICMUTE_DT_CUT_K1 +933 0x0800 //TX_MICMUTE_N2_SN_EST +934 0xFC00 //TX_MICMUTE_THR_SN_EST_0 +935 0x001C //TX_MICMUTE_MIN_G_CTRL_0 +936 0x6000 //TX_MICMUTE_A_POST_FILT_S_0 +937 0x7000 //TX_MICMUTE_B_POST_FILT_0 +938 0x2710 //TX_MIC1RUB_AMP_THR +939 0x0010 //TX_MIC1MUTE_RATIO_THR +940 0x0450 //TX_MIC1MUTE_AMP_THR +941 0x0008 //TX_MIC1MUTE_CVG_TIME +942 0x0008 //TX_MIC1MUTE_RELEASE_TIME +943 0x0000 //TX_AMS_RESRV_01 +944 0x0000 //TX_AMS_RESRV_02 +945 0x0000 //TX_AMS_RESRV_03 +946 0x0000 //TX_AMS_RESRV_04 +947 0x0000 //TX_AMS_RESRV_05 +948 0x0000 //TX_AMS_RESRV_06 +949 0x0000 //TX_AMS_RESRV_07 +950 0x0000 //TX_AMS_RESRV_08 +951 0x0000 //TX_AMS_RESRV_09 +952 0x0000 //TX_AMS_RESRV_10 +953 0x0000 //TX_AMS_RESRV_11 +954 0x0000 //TX_AMS_RESRV_12 +955 0x0000 //TX_AMS_RESRV_13 +956 0x0000 //TX_AMS_RESRV_14 +957 0x0000 //TX_AMS_RESRV_15 +958 0x0000 //TX_AMS_RESRV_16 +959 0x0000 //TX_AMS_RESRV_17 +960 0x0000 //TX_AMS_RESRV_18 +961 0x0000 //TX_AMS_RESRV_19 #RX -0 0x003C //RX_RECVFUNC_MODE_0 +0 0x203C //RX_RECVFUNC_MODE_0 1 0x0000 //RX_RECVFUNC_MODE_1 2 0x0000 //RX_SAMPLINGFREQ_SIG 3 0x0000 //RX_SAMPLINGFREQ_PROC @@ -6348,12 +9165,12 @@ 38 0x0014 //RX_FDEQ_SUBNUM 39 0x4840 //RX_FDEQ_GAIN_0 40 0x3E40 //RX_FDEQ_GAIN_1 -41 0x515E //RX_FDEQ_GAIN_2 -42 0x6470 //RX_FDEQ_GAIN_3 -43 0x7A84 //RX_FDEQ_GAIN_4 -44 0x7C7A //RX_FDEQ_GAIN_5 -45 0x7C7C //RX_FDEQ_GAIN_6 -46 0x7D7C //RX_FDEQ_GAIN_7 +41 0x4D5A //RX_FDEQ_GAIN_2 +42 0x606C //RX_FDEQ_GAIN_3 +43 0x767C //RX_FDEQ_GAIN_4 +44 0x7876 //RX_FDEQ_GAIN_5 +45 0x7878 //RX_FDEQ_GAIN_6 +46 0x797C //RX_FDEQ_GAIN_7 47 0x7E82 //RX_FDEQ_GAIN_8 48 0x7C80 //RX_FDEQ_GAIN_9 49 0x4848 //RX_FDEQ_GAIN_10 @@ -6447,12 +9264,12 @@ 38 0x0014 //RX_FDEQ_SUBNUM 39 0x4840 //RX_FDEQ_GAIN_0 40 0x3E40 //RX_FDEQ_GAIN_1 -41 0x515E //RX_FDEQ_GAIN_2 -42 0x6470 //RX_FDEQ_GAIN_3 -43 0x7A84 //RX_FDEQ_GAIN_4 -44 0x7C7A //RX_FDEQ_GAIN_5 -45 0x7C7C //RX_FDEQ_GAIN_6 -46 0x7D7C //RX_FDEQ_GAIN_7 +41 0x4D5A //RX_FDEQ_GAIN_2 +42 0x606C //RX_FDEQ_GAIN_3 +43 0x767C //RX_FDEQ_GAIN_4 +44 0x7876 //RX_FDEQ_GAIN_5 +45 0x7878 //RX_FDEQ_GAIN_6 +46 0x797C //RX_FDEQ_GAIN_7 47 0x7E82 //RX_FDEQ_GAIN_8 48 0x7C80 //RX_FDEQ_GAIN_9 49 0x4848 //RX_FDEQ_GAIN_10 @@ -6546,12 +9363,12 @@ 38 0x0014 //RX_FDEQ_SUBNUM 39 0x4840 //RX_FDEQ_GAIN_0 40 0x3E40 //RX_FDEQ_GAIN_1 -41 0x515E //RX_FDEQ_GAIN_2 -42 0x6470 //RX_FDEQ_GAIN_3 -43 0x7A84 //RX_FDEQ_GAIN_4 -44 0x7C7A //RX_FDEQ_GAIN_5 -45 0x7C7C //RX_FDEQ_GAIN_6 -46 0x7D7C //RX_FDEQ_GAIN_7 +41 0x4D5A //RX_FDEQ_GAIN_2 +42 0x606C //RX_FDEQ_GAIN_3 +43 0x767C //RX_FDEQ_GAIN_4 +44 0x7876 //RX_FDEQ_GAIN_5 +45 0x7878 //RX_FDEQ_GAIN_6 +46 0x797C //RX_FDEQ_GAIN_7 47 0x7E82 //RX_FDEQ_GAIN_8 48 0x7C80 //RX_FDEQ_GAIN_9 49 0x4848 //RX_FDEQ_GAIN_10 @@ -6645,12 +9462,12 @@ 38 0x0014 //RX_FDEQ_SUBNUM 39 0x4840 //RX_FDEQ_GAIN_0 40 0x3E40 //RX_FDEQ_GAIN_1 -41 0x515E //RX_FDEQ_GAIN_2 -42 0x6470 //RX_FDEQ_GAIN_3 -43 0x7A84 //RX_FDEQ_GAIN_4 -44 0x7C7A //RX_FDEQ_GAIN_5 -45 0x7C7C //RX_FDEQ_GAIN_6 -46 0x7D7C //RX_FDEQ_GAIN_7 +41 0x4D5A //RX_FDEQ_GAIN_2 +42 0x606C //RX_FDEQ_GAIN_3 +43 0x767C //RX_FDEQ_GAIN_4 +44 0x7876 //RX_FDEQ_GAIN_5 +45 0x7878 //RX_FDEQ_GAIN_6 +46 0x797C //RX_FDEQ_GAIN_7 47 0x7E82 //RX_FDEQ_GAIN_8 48 0x7C80 //RX_FDEQ_GAIN_9 49 0x4848 //RX_FDEQ_GAIN_10 @@ -6715,7 +9532,7 @@ 108 0x5333 //RX_FDDRC_SLANT_1_2 109 0x5333 //RX_FDDRC_SLANT_1_3 110 0x0000 //RX_FDDRC_RESRV_0 -129 0x0034 //RX_SPK_VOL +129 0x0031 //RX_SPK_VOL 130 0x0000 //RX_VOL_RESRV_0 #VOL 4 6 0x1000 //RX_TDDRC_ALPHA_UP_1 @@ -6744,12 +9561,12 @@ 38 0x0014 //RX_FDEQ_SUBNUM 39 0x4840 //RX_FDEQ_GAIN_0 40 0x3E40 //RX_FDEQ_GAIN_1 -41 0x515E //RX_FDEQ_GAIN_2 -42 0x6470 //RX_FDEQ_GAIN_3 -43 0x7A84 //RX_FDEQ_GAIN_4 -44 0x7C7A //RX_FDEQ_GAIN_5 -45 0x7C7C //RX_FDEQ_GAIN_6 -46 0x7D7C //RX_FDEQ_GAIN_7 +41 0x4D5A //RX_FDEQ_GAIN_2 +42 0x606C //RX_FDEQ_GAIN_3 +43 0x767C //RX_FDEQ_GAIN_4 +44 0x7876 //RX_FDEQ_GAIN_5 +45 0x7878 //RX_FDEQ_GAIN_6 +46 0x797C //RX_FDEQ_GAIN_7 47 0x7E82 //RX_FDEQ_GAIN_8 48 0x7C80 //RX_FDEQ_GAIN_9 49 0x4848 //RX_FDEQ_GAIN_10 @@ -6843,12 +9660,12 @@ 38 0x0014 //RX_FDEQ_SUBNUM 39 0x4840 //RX_FDEQ_GAIN_0 40 0x3E40 //RX_FDEQ_GAIN_1 -41 0x515E //RX_FDEQ_GAIN_2 -42 0x6470 //RX_FDEQ_GAIN_3 -43 0x7A84 //RX_FDEQ_GAIN_4 -44 0x7C7A //RX_FDEQ_GAIN_5 -45 0x7C7C //RX_FDEQ_GAIN_6 -46 0x7D7C //RX_FDEQ_GAIN_7 +41 0x4D5A //RX_FDEQ_GAIN_2 +42 0x606C //RX_FDEQ_GAIN_3 +43 0x767C //RX_FDEQ_GAIN_4 +44 0x7876 //RX_FDEQ_GAIN_5 +45 0x7878 //RX_FDEQ_GAIN_6 +46 0x797C //RX_FDEQ_GAIN_7 47 0x7E82 //RX_FDEQ_GAIN_8 48 0x7C80 //RX_FDEQ_GAIN_9 49 0x4848 //RX_FDEQ_GAIN_10 @@ -6942,12 +9759,12 @@ 38 0x0014 //RX_FDEQ_SUBNUM 39 0x4840 //RX_FDEQ_GAIN_0 40 0x3E40 //RX_FDEQ_GAIN_1 -41 0x515E //RX_FDEQ_GAIN_2 -42 0x6470 //RX_FDEQ_GAIN_3 -43 0x7A84 //RX_FDEQ_GAIN_4 -44 0x7C7A //RX_FDEQ_GAIN_5 -45 0x7C7C //RX_FDEQ_GAIN_6 -46 0x7D7C //RX_FDEQ_GAIN_7 +41 0x4D5A //RX_FDEQ_GAIN_2 +42 0x606C //RX_FDEQ_GAIN_3 +43 0x767C //RX_FDEQ_GAIN_4 +44 0x7876 //RX_FDEQ_GAIN_5 +45 0x7878 //RX_FDEQ_GAIN_6 +46 0x797C //RX_FDEQ_GAIN_7 47 0x7E82 //RX_FDEQ_GAIN_8 48 0x7C80 //RX_FDEQ_GAIN_9 49 0x4848 //RX_FDEQ_GAIN_10 @@ -7014,10 +9831,862 @@ 110 0x0000 //RX_FDDRC_RESRV_0 129 0x0100 //RX_SPK_VOL 130 0x0000 //RX_VOL_RESRV_0 +#RX 2 +157 0x003C //RX_RECVFUNC_MODE_0 +158 0x0000 //RX_RECVFUNC_MODE_1 +159 0x0000 //RX_SAMPLINGFREQ_SIG +160 0x0000 //RX_SAMPLINGFREQ_PROC +161 0x000A //RX_FRAME_SZ +162 0x0000 //RX_DELAY_OPT +163 0x1000 //RX_TDDRC_ALPHA_UP_1 +164 0x1000 //RX_TDDRC_ALPHA_UP_2 +165 0x1000 //RX_TDDRC_ALPHA_UP_3 +166 0x1000 //RX_TDDRC_ALPHA_UP_4 +167 0x0600 //RX_PGA +168 0x7FFF //RX_A_HP +169 0x4000 //RX_B_PE +170 0x7800 //RX_THR_PITCH_DET_0 +171 0x7000 //RX_THR_PITCH_DET_1 +172 0x6000 //RX_THR_PITCH_DET_2 +173 0x0008 //RX_PITCH_BFR_LEN +174 0x0003 //RX_SBD_PITCH_DET +175 0x0100 //RX_PP_RESRV_0 +176 0x0020 //RX_PP_RESRV_1 +177 0x0400 //RX_N_SN_EST +178 0x000C //RX_N2_SN_EST +179 0x0014 //RX_NS_LVL_CTRL +180 0xF800 //RX_THR_SN_EST +181 0x7E00 //RX_LAMBDA_PFILT +182 0x000A //RX_FENS_RESRV_0 +183 0x0190 //RX_FENS_RESRV_1 +184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +187 0x0002 //RX_EXTRA_NS_L +188 0x0800 //RX_EXTRA_NS_A +189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +190 0x7000 //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +192 0x199A //RX_A_POST_FLT +193 0x0000 //RX_LMT_THRD +194 0x4000 //RX_LMT_ALPHA +195 0x0014 //RX_FDEQ_SUBNUM +196 0x4840 //RX_FDEQ_GAIN_0 +197 0x3E40 //RX_FDEQ_GAIN_1 +198 0x515E //RX_FDEQ_GAIN_2 +199 0x6470 //RX_FDEQ_GAIN_3 +200 0x7A84 //RX_FDEQ_GAIN_4 +201 0x7C7A //RX_FDEQ_GAIN_5 +202 0x7C7C //RX_FDEQ_GAIN_6 +203 0x7D7C //RX_FDEQ_GAIN_7 +204 0x7E82 //RX_FDEQ_GAIN_8 +205 0x7C80 //RX_FDEQ_GAIN_9 +206 0x4848 //RX_FDEQ_GAIN_10 +207 0x4848 //RX_FDEQ_GAIN_11 +208 0x4848 //RX_FDEQ_GAIN_12 +209 0x4848 //RX_FDEQ_GAIN_13 +210 0x4848 //RX_FDEQ_GAIN_14 +211 0x4848 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0202 //RX_FDEQ_BIN_0 +221 0x0204 //RX_FDEQ_BIN_1 +222 0x0203 //RX_FDEQ_BIN_2 +223 0x0304 //RX_FDEQ_BIN_3 +224 0x0405 //RX_FDEQ_BIN_4 +225 0x0506 //RX_FDEQ_BIN_5 +226 0x0708 //RX_FDEQ_BIN_6 +227 0x090A //RX_FDEQ_BIN_7 +228 0x0B0C //RX_FDEQ_BIN_8 +229 0x0D08 //RX_FDEQ_BIN_9 +230 0x0000 //RX_FDEQ_BIN_10 +231 0x0000 //RX_FDEQ_BIN_11 +232 0x0000 //RX_FDEQ_BIN_12 +233 0x0000 //RX_FDEQ_BIN_13 +234 0x0000 //RX_FDEQ_BIN_14 +235 0x0000 //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x4000 //RX_FDEQ_RESRV_0 +245 0x0320 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0030 //RX_FDDRC_BAND_MARGIN_1 +248 0x0050 //RX_FDDRC_BAND_MARGIN_2 +249 0x0080 //RX_FDDRC_BAND_MARGIN_3 +250 0x0007 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x5000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x6400 //RX_FDDRC_THRD_3_2 +258 0x6400 //RX_FDDRC_THRD_3_3 +259 0x2000 //RX_FDDRC_SLANT_0_0 +260 0x2000 //RX_FDDRC_SLANT_0_1 +261 0x2000 //RX_FDDRC_SLANT_0_2 +262 0x2000 //RX_FDDRC_SLANT_0_3 +263 0x5333 //RX_FDDRC_SLANT_1_0 +264 0x5333 //RX_FDDRC_SLANT_1_1 +265 0x5333 //RX_FDDRC_SLANT_1_2 +266 0x5333 //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +268 0x0002 //RX_FILTINDX +269 0x0000 //RX_TDDRC_THRD_0 +270 0x0000 //RX_TDDRC_THRD_1 +271 0x1800 //RX_TDDRC_THRD_2 +272 0x1800 //RX_TDDRC_THRD_3 +273 0x3000 //RX_TDDRC_SLANT_0 +274 0x6E00 //RX_TDDRC_SLANT_1 +275 0x1000 //RX_TDDRC_ALPHA_UP_0 +276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x199A //RX_TDDRC_HMNC_GAIN +279 0x0001 //RX_TDDRC_SMT_FLAG +280 0x0CCD //RX_TDDRC_SMT_W +281 0x055F //RX_TDDRC_DRC_GAIN +282 0x7C00 //RX_LAMBDA_PKA_FP +283 0x13E0 //RX_TPKA_FP +284 0x0080 //RX_MIN_G_FP +285 0x2000 //RX_MAX_G_FP +286 0x000A //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 +288 0x0000 //RX_MAXLEVEL_CNG +289 0x3000 //RX_BWE_UV_TH +290 0x3000 //RX_BWE_UV_TH2 +291 0x1800 //RX_BWE_UV_TH3 +292 0x1000 //RX_BWE_V_TH +293 0x04CD //RX_BWE_GAIN1_V_TH1 +294 0x0F33 //RX_BWE_GAIN1_V_TH2 +295 0x7333 //RX_BWE_UV_EQ +296 0x199A //RX_BWE_V_EQ +297 0x7333 //RX_BWE_TONE_TH +298 0x0004 //RX_BWE_UV_HOLD_T +299 0x6CCD //RX_BWE_GAIN2_ALPHA +300 0x799A //RX_BWE_GAIN3_ALPHA +301 0x001E //RX_BWE_CUTOFF +302 0x3000 //RX_BWE_GAINFILL +303 0x3200 //RX_BWE_MAXTH_TONE +304 0x2000 //RX_BWE_EQ_0 +305 0x2000 //RX_BWE_EQ_1 +306 0x2000 //RX_BWE_EQ_2 +307 0x2000 //RX_BWE_EQ_3 +308 0x2000 //RX_BWE_EQ_4 +309 0x2000 //RX_BWE_EQ_5 +310 0x2000 //RX_BWE_EQ_6 +311 0x0000 //RX_BWE_RESRV_0 +312 0x0000 //RX_BWE_RESRV_1 +313 0x0000 //RX_BWE_RESRV_2 +#VOL 0 +163 0x1000 //RX_TDDRC_ALPHA_UP_1 +164 0x1000 //RX_TDDRC_ALPHA_UP_2 +165 0x1000 //RX_TDDRC_ALPHA_UP_3 +166 0x1000 //RX_TDDRC_ALPHA_UP_4 +184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +190 0x7000 //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +269 0x0000 //RX_TDDRC_THRD_0 +270 0x0000 //RX_TDDRC_THRD_1 +271 0x1800 //RX_TDDRC_THRD_2 +272 0x1800 //RX_TDDRC_THRD_3 +273 0x3000 //RX_TDDRC_SLANT_0 +274 0x6E00 //RX_TDDRC_SLANT_1 +275 0x1000 //RX_TDDRC_ALPHA_UP_0 +276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x199A //RX_TDDRC_HMNC_GAIN +279 0x0001 //RX_TDDRC_SMT_FLAG +280 0x0CCD //RX_TDDRC_SMT_W +281 0x055F //RX_TDDRC_DRC_GAIN +195 0x0014 //RX_FDEQ_SUBNUM +196 0x4840 //RX_FDEQ_GAIN_0 +197 0x3E40 //RX_FDEQ_GAIN_1 +198 0x515E //RX_FDEQ_GAIN_2 +199 0x6470 //RX_FDEQ_GAIN_3 +200 0x7A84 //RX_FDEQ_GAIN_4 +201 0x7C7A //RX_FDEQ_GAIN_5 +202 0x7C7C //RX_FDEQ_GAIN_6 +203 0x7D7C //RX_FDEQ_GAIN_7 +204 0x7E82 //RX_FDEQ_GAIN_8 +205 0x7C80 //RX_FDEQ_GAIN_9 +206 0x4848 //RX_FDEQ_GAIN_10 +207 0x4848 //RX_FDEQ_GAIN_11 +208 0x4848 //RX_FDEQ_GAIN_12 +209 0x4848 //RX_FDEQ_GAIN_13 +210 0x4848 //RX_FDEQ_GAIN_14 +211 0x4848 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0202 //RX_FDEQ_BIN_0 +221 0x0204 //RX_FDEQ_BIN_1 +222 0x0203 //RX_FDEQ_BIN_2 +223 0x0304 //RX_FDEQ_BIN_3 +224 0x0405 //RX_FDEQ_BIN_4 +225 0x0506 //RX_FDEQ_BIN_5 +226 0x0708 //RX_FDEQ_BIN_6 +227 0x090A //RX_FDEQ_BIN_7 +228 0x0B0C //RX_FDEQ_BIN_8 +229 0x0D08 //RX_FDEQ_BIN_9 +230 0x0000 //RX_FDEQ_BIN_10 +231 0x0000 //RX_FDEQ_BIN_11 +232 0x0000 //RX_FDEQ_BIN_12 +233 0x0000 //RX_FDEQ_BIN_13 +234 0x0000 //RX_FDEQ_BIN_14 +235 0x0000 //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x4000 //RX_FDEQ_RESRV_0 +245 0x0320 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0030 //RX_FDDRC_BAND_MARGIN_1 +248 0x0050 //RX_FDDRC_BAND_MARGIN_2 +249 0x0080 //RX_FDDRC_BAND_MARGIN_3 +250 0x0007 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x5000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x6400 //RX_FDDRC_THRD_3_2 +258 0x6400 //RX_FDDRC_THRD_3_3 +259 0x2000 //RX_FDDRC_SLANT_0_0 +260 0x2000 //RX_FDDRC_SLANT_0_1 +261 0x2000 //RX_FDDRC_SLANT_0_2 +262 0x2000 //RX_FDDRC_SLANT_0_3 +263 0x5333 //RX_FDDRC_SLANT_1_0 +264 0x5333 //RX_FDDRC_SLANT_1_1 +265 0x5333 //RX_FDDRC_SLANT_1_2 +266 0x5333 //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +286 0x000A //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 +#VOL 1 +163 0x1000 //RX_TDDRC_ALPHA_UP_1 +164 0x1000 //RX_TDDRC_ALPHA_UP_2 +165 0x1000 //RX_TDDRC_ALPHA_UP_3 +166 0x1000 //RX_TDDRC_ALPHA_UP_4 +184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +190 0x7000 //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +269 0x0000 //RX_TDDRC_THRD_0 +270 0x0000 //RX_TDDRC_THRD_1 +271 0x1800 //RX_TDDRC_THRD_2 +272 0x1800 //RX_TDDRC_THRD_3 +273 0x3000 //RX_TDDRC_SLANT_0 +274 0x6E00 //RX_TDDRC_SLANT_1 +275 0x1000 //RX_TDDRC_ALPHA_UP_0 +276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x199A //RX_TDDRC_HMNC_GAIN +279 0x0001 //RX_TDDRC_SMT_FLAG +280 0x0CCD //RX_TDDRC_SMT_W +281 0x055F //RX_TDDRC_DRC_GAIN +195 0x0014 //RX_FDEQ_SUBNUM +196 0x4840 //RX_FDEQ_GAIN_0 +197 0x3E40 //RX_FDEQ_GAIN_1 +198 0x515E //RX_FDEQ_GAIN_2 +199 0x6470 //RX_FDEQ_GAIN_3 +200 0x7A84 //RX_FDEQ_GAIN_4 +201 0x7C7A //RX_FDEQ_GAIN_5 +202 0x7C7C //RX_FDEQ_GAIN_6 +203 0x7D7C //RX_FDEQ_GAIN_7 +204 0x7E82 //RX_FDEQ_GAIN_8 +205 0x7C80 //RX_FDEQ_GAIN_9 +206 0x4848 //RX_FDEQ_GAIN_10 +207 0x4848 //RX_FDEQ_GAIN_11 +208 0x4848 //RX_FDEQ_GAIN_12 +209 0x4848 //RX_FDEQ_GAIN_13 +210 0x4848 //RX_FDEQ_GAIN_14 +211 0x4848 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0202 //RX_FDEQ_BIN_0 +221 0x0204 //RX_FDEQ_BIN_1 +222 0x0203 //RX_FDEQ_BIN_2 +223 0x0304 //RX_FDEQ_BIN_3 +224 0x0405 //RX_FDEQ_BIN_4 +225 0x0506 //RX_FDEQ_BIN_5 +226 0x0708 //RX_FDEQ_BIN_6 +227 0x090A //RX_FDEQ_BIN_7 +228 0x0B0C //RX_FDEQ_BIN_8 +229 0x0D08 //RX_FDEQ_BIN_9 +230 0x0000 //RX_FDEQ_BIN_10 +231 0x0000 //RX_FDEQ_BIN_11 +232 0x0000 //RX_FDEQ_BIN_12 +233 0x0000 //RX_FDEQ_BIN_13 +234 0x0000 //RX_FDEQ_BIN_14 +235 0x0000 //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x4000 //RX_FDEQ_RESRV_0 +245 0x0320 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0030 //RX_FDDRC_BAND_MARGIN_1 +248 0x0050 //RX_FDDRC_BAND_MARGIN_2 +249 0x0080 //RX_FDDRC_BAND_MARGIN_3 +250 0x0007 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x5000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x6400 //RX_FDDRC_THRD_3_2 +258 0x6400 //RX_FDDRC_THRD_3_3 +259 0x2000 //RX_FDDRC_SLANT_0_0 +260 0x2000 //RX_FDDRC_SLANT_0_1 +261 0x2000 //RX_FDDRC_SLANT_0_2 +262 0x2000 //RX_FDDRC_SLANT_0_3 +263 0x5333 //RX_FDDRC_SLANT_1_0 +264 0x5333 //RX_FDDRC_SLANT_1_1 +265 0x5333 //RX_FDDRC_SLANT_1_2 +266 0x5333 //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +286 0x0010 //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 +#VOL 2 +163 0x1000 //RX_TDDRC_ALPHA_UP_1 +164 0x1000 //RX_TDDRC_ALPHA_UP_2 +165 0x1000 //RX_TDDRC_ALPHA_UP_3 +166 0x1000 //RX_TDDRC_ALPHA_UP_4 +184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +190 0x7000 //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +269 0x0000 //RX_TDDRC_THRD_0 +270 0x0000 //RX_TDDRC_THRD_1 +271 0x1800 //RX_TDDRC_THRD_2 +272 0x1800 //RX_TDDRC_THRD_3 +273 0x3000 //RX_TDDRC_SLANT_0 +274 0x6E00 //RX_TDDRC_SLANT_1 +275 0x1000 //RX_TDDRC_ALPHA_UP_0 +276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x199A //RX_TDDRC_HMNC_GAIN +279 0x0001 //RX_TDDRC_SMT_FLAG +280 0x0CCD //RX_TDDRC_SMT_W +281 0x055F //RX_TDDRC_DRC_GAIN +195 0x0014 //RX_FDEQ_SUBNUM +196 0x4840 //RX_FDEQ_GAIN_0 +197 0x3E40 //RX_FDEQ_GAIN_1 +198 0x515E //RX_FDEQ_GAIN_2 +199 0x6470 //RX_FDEQ_GAIN_3 +200 0x7A84 //RX_FDEQ_GAIN_4 +201 0x7C7A //RX_FDEQ_GAIN_5 +202 0x7C7C //RX_FDEQ_GAIN_6 +203 0x7D7C //RX_FDEQ_GAIN_7 +204 0x7E82 //RX_FDEQ_GAIN_8 +205 0x7C80 //RX_FDEQ_GAIN_9 +206 0x4848 //RX_FDEQ_GAIN_10 +207 0x4848 //RX_FDEQ_GAIN_11 +208 0x4848 //RX_FDEQ_GAIN_12 +209 0x4848 //RX_FDEQ_GAIN_13 +210 0x4848 //RX_FDEQ_GAIN_14 +211 0x4848 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0202 //RX_FDEQ_BIN_0 +221 0x0204 //RX_FDEQ_BIN_1 +222 0x0203 //RX_FDEQ_BIN_2 +223 0x0304 //RX_FDEQ_BIN_3 +224 0x0405 //RX_FDEQ_BIN_4 +225 0x0506 //RX_FDEQ_BIN_5 +226 0x0708 //RX_FDEQ_BIN_6 +227 0x090A //RX_FDEQ_BIN_7 +228 0x0B0C //RX_FDEQ_BIN_8 +229 0x0D08 //RX_FDEQ_BIN_9 +230 0x0000 //RX_FDEQ_BIN_10 +231 0x0000 //RX_FDEQ_BIN_11 +232 0x0000 //RX_FDEQ_BIN_12 +233 0x0000 //RX_FDEQ_BIN_13 +234 0x0000 //RX_FDEQ_BIN_14 +235 0x0000 //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x4000 //RX_FDEQ_RESRV_0 +245 0x0320 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0030 //RX_FDDRC_BAND_MARGIN_1 +248 0x0050 //RX_FDDRC_BAND_MARGIN_2 +249 0x0080 //RX_FDDRC_BAND_MARGIN_3 +250 0x0007 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x5000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x6400 //RX_FDDRC_THRD_3_2 +258 0x6400 //RX_FDDRC_THRD_3_3 +259 0x2000 //RX_FDDRC_SLANT_0_0 +260 0x2000 //RX_FDDRC_SLANT_0_1 +261 0x2000 //RX_FDDRC_SLANT_0_2 +262 0x2000 //RX_FDDRC_SLANT_0_3 +263 0x5333 //RX_FDDRC_SLANT_1_0 +264 0x5333 //RX_FDDRC_SLANT_1_1 +265 0x5333 //RX_FDDRC_SLANT_1_2 +266 0x5333 //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +286 0x001A //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 +#VOL 3 +163 0x1000 //RX_TDDRC_ALPHA_UP_1 +164 0x1000 //RX_TDDRC_ALPHA_UP_2 +165 0x1000 //RX_TDDRC_ALPHA_UP_3 +166 0x1000 //RX_TDDRC_ALPHA_UP_4 +184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +190 0x7000 //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +269 0x0000 //RX_TDDRC_THRD_0 +270 0x0000 //RX_TDDRC_THRD_1 +271 0x1800 //RX_TDDRC_THRD_2 +272 0x1800 //RX_TDDRC_THRD_3 +273 0x3000 //RX_TDDRC_SLANT_0 +274 0x6E00 //RX_TDDRC_SLANT_1 +275 0x1000 //RX_TDDRC_ALPHA_UP_0 +276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x199A //RX_TDDRC_HMNC_GAIN +279 0x0001 //RX_TDDRC_SMT_FLAG +280 0x0CCD //RX_TDDRC_SMT_W +281 0x055F //RX_TDDRC_DRC_GAIN +195 0x0014 //RX_FDEQ_SUBNUM +196 0x4840 //RX_FDEQ_GAIN_0 +197 0x3E40 //RX_FDEQ_GAIN_1 +198 0x515E //RX_FDEQ_GAIN_2 +199 0x6470 //RX_FDEQ_GAIN_3 +200 0x7A84 //RX_FDEQ_GAIN_4 +201 0x7C7A //RX_FDEQ_GAIN_5 +202 0x7C7C //RX_FDEQ_GAIN_6 +203 0x7D7C //RX_FDEQ_GAIN_7 +204 0x7E82 //RX_FDEQ_GAIN_8 +205 0x7C80 //RX_FDEQ_GAIN_9 +206 0x4848 //RX_FDEQ_GAIN_10 +207 0x4848 //RX_FDEQ_GAIN_11 +208 0x4848 //RX_FDEQ_GAIN_12 +209 0x4848 //RX_FDEQ_GAIN_13 +210 0x4848 //RX_FDEQ_GAIN_14 +211 0x4848 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0202 //RX_FDEQ_BIN_0 +221 0x0204 //RX_FDEQ_BIN_1 +222 0x0203 //RX_FDEQ_BIN_2 +223 0x0304 //RX_FDEQ_BIN_3 +224 0x0405 //RX_FDEQ_BIN_4 +225 0x0506 //RX_FDEQ_BIN_5 +226 0x0708 //RX_FDEQ_BIN_6 +227 0x090A //RX_FDEQ_BIN_7 +228 0x0B0C //RX_FDEQ_BIN_8 +229 0x0D08 //RX_FDEQ_BIN_9 +230 0x0000 //RX_FDEQ_BIN_10 +231 0x0000 //RX_FDEQ_BIN_11 +232 0x0000 //RX_FDEQ_BIN_12 +233 0x0000 //RX_FDEQ_BIN_13 +234 0x0000 //RX_FDEQ_BIN_14 +235 0x0000 //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x4000 //RX_FDEQ_RESRV_0 +245 0x0320 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0030 //RX_FDDRC_BAND_MARGIN_1 +248 0x0050 //RX_FDDRC_BAND_MARGIN_2 +249 0x0080 //RX_FDDRC_BAND_MARGIN_3 +250 0x0007 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x5000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x6400 //RX_FDDRC_THRD_3_2 +258 0x6400 //RX_FDDRC_THRD_3_3 +259 0x2000 //RX_FDDRC_SLANT_0_0 +260 0x2000 //RX_FDDRC_SLANT_0_1 +261 0x2000 //RX_FDDRC_SLANT_0_2 +262 0x2000 //RX_FDDRC_SLANT_0_3 +263 0x5333 //RX_FDDRC_SLANT_1_0 +264 0x5333 //RX_FDDRC_SLANT_1_1 +265 0x5333 //RX_FDDRC_SLANT_1_2 +266 0x5333 //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +286 0x0034 //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 +#VOL 4 +163 0x1000 //RX_TDDRC_ALPHA_UP_1 +164 0x1000 //RX_TDDRC_ALPHA_UP_2 +165 0x1000 //RX_TDDRC_ALPHA_UP_3 +166 0x1000 //RX_TDDRC_ALPHA_UP_4 +184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +190 0x7000 //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +269 0x0000 //RX_TDDRC_THRD_0 +270 0x0000 //RX_TDDRC_THRD_1 +271 0x1800 //RX_TDDRC_THRD_2 +272 0x1800 //RX_TDDRC_THRD_3 +273 0x3000 //RX_TDDRC_SLANT_0 +274 0x6E00 //RX_TDDRC_SLANT_1 +275 0x1000 //RX_TDDRC_ALPHA_UP_0 +276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x199A //RX_TDDRC_HMNC_GAIN +279 0x0001 //RX_TDDRC_SMT_FLAG +280 0x0CCD //RX_TDDRC_SMT_W +281 0x055F //RX_TDDRC_DRC_GAIN +195 0x0014 //RX_FDEQ_SUBNUM +196 0x4840 //RX_FDEQ_GAIN_0 +197 0x3E40 //RX_FDEQ_GAIN_1 +198 0x515E //RX_FDEQ_GAIN_2 +199 0x6470 //RX_FDEQ_GAIN_3 +200 0x7A84 //RX_FDEQ_GAIN_4 +201 0x7C7A //RX_FDEQ_GAIN_5 +202 0x7C7C //RX_FDEQ_GAIN_6 +203 0x7D7C //RX_FDEQ_GAIN_7 +204 0x7E82 //RX_FDEQ_GAIN_8 +205 0x7C80 //RX_FDEQ_GAIN_9 +206 0x4848 //RX_FDEQ_GAIN_10 +207 0x4848 //RX_FDEQ_GAIN_11 +208 0x4848 //RX_FDEQ_GAIN_12 +209 0x4848 //RX_FDEQ_GAIN_13 +210 0x4848 //RX_FDEQ_GAIN_14 +211 0x4848 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0202 //RX_FDEQ_BIN_0 +221 0x0204 //RX_FDEQ_BIN_1 +222 0x0203 //RX_FDEQ_BIN_2 +223 0x0304 //RX_FDEQ_BIN_3 +224 0x0405 //RX_FDEQ_BIN_4 +225 0x0506 //RX_FDEQ_BIN_5 +226 0x0708 //RX_FDEQ_BIN_6 +227 0x090A //RX_FDEQ_BIN_7 +228 0x0B0C //RX_FDEQ_BIN_8 +229 0x0D08 //RX_FDEQ_BIN_9 +230 0x0000 //RX_FDEQ_BIN_10 +231 0x0000 //RX_FDEQ_BIN_11 +232 0x0000 //RX_FDEQ_BIN_12 +233 0x0000 //RX_FDEQ_BIN_13 +234 0x0000 //RX_FDEQ_BIN_14 +235 0x0000 //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x4000 //RX_FDEQ_RESRV_0 +245 0x0320 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0030 //RX_FDDRC_BAND_MARGIN_1 +248 0x0050 //RX_FDDRC_BAND_MARGIN_2 +249 0x0080 //RX_FDDRC_BAND_MARGIN_3 +250 0x0007 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x5000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x6400 //RX_FDDRC_THRD_3_2 +258 0x6400 //RX_FDDRC_THRD_3_3 +259 0x2000 //RX_FDDRC_SLANT_0_0 +260 0x2000 //RX_FDDRC_SLANT_0_1 +261 0x2000 //RX_FDDRC_SLANT_0_2 +262 0x2000 //RX_FDDRC_SLANT_0_3 +263 0x5333 //RX_FDDRC_SLANT_1_0 +264 0x5333 //RX_FDDRC_SLANT_1_1 +265 0x5333 //RX_FDDRC_SLANT_1_2 +266 0x5333 //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +286 0x0045 //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 +#VOL 5 +163 0x1000 //RX_TDDRC_ALPHA_UP_1 +164 0x1000 //RX_TDDRC_ALPHA_UP_2 +165 0x1000 //RX_TDDRC_ALPHA_UP_3 +166 0x1000 //RX_TDDRC_ALPHA_UP_4 +184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +190 0x7000 //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +269 0x0000 //RX_TDDRC_THRD_0 +270 0x0000 //RX_TDDRC_THRD_1 +271 0x1800 //RX_TDDRC_THRD_2 +272 0x1800 //RX_TDDRC_THRD_3 +273 0x3000 //RX_TDDRC_SLANT_0 +274 0x6E00 //RX_TDDRC_SLANT_1 +275 0x1000 //RX_TDDRC_ALPHA_UP_0 +276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x199A //RX_TDDRC_HMNC_GAIN +279 0x0001 //RX_TDDRC_SMT_FLAG +280 0x0CCD //RX_TDDRC_SMT_W +281 0x055F //RX_TDDRC_DRC_GAIN +195 0x0014 //RX_FDEQ_SUBNUM +196 0x4840 //RX_FDEQ_GAIN_0 +197 0x3E40 //RX_FDEQ_GAIN_1 +198 0x515E //RX_FDEQ_GAIN_2 +199 0x6470 //RX_FDEQ_GAIN_3 +200 0x7A84 //RX_FDEQ_GAIN_4 +201 0x7C7A //RX_FDEQ_GAIN_5 +202 0x7C7C //RX_FDEQ_GAIN_6 +203 0x7D7C //RX_FDEQ_GAIN_7 +204 0x7E82 //RX_FDEQ_GAIN_8 +205 0x7C80 //RX_FDEQ_GAIN_9 +206 0x4848 //RX_FDEQ_GAIN_10 +207 0x4848 //RX_FDEQ_GAIN_11 +208 0x4848 //RX_FDEQ_GAIN_12 +209 0x4848 //RX_FDEQ_GAIN_13 +210 0x4848 //RX_FDEQ_GAIN_14 +211 0x4848 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0202 //RX_FDEQ_BIN_0 +221 0x0204 //RX_FDEQ_BIN_1 +222 0x0203 //RX_FDEQ_BIN_2 +223 0x0304 //RX_FDEQ_BIN_3 +224 0x0405 //RX_FDEQ_BIN_4 +225 0x0506 //RX_FDEQ_BIN_5 +226 0x0708 //RX_FDEQ_BIN_6 +227 0x090A //RX_FDEQ_BIN_7 +228 0x0B0C //RX_FDEQ_BIN_8 +229 0x0D08 //RX_FDEQ_BIN_9 +230 0x0000 //RX_FDEQ_BIN_10 +231 0x0000 //RX_FDEQ_BIN_11 +232 0x0000 //RX_FDEQ_BIN_12 +233 0x0000 //RX_FDEQ_BIN_13 +234 0x0000 //RX_FDEQ_BIN_14 +235 0x0000 //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x4000 //RX_FDEQ_RESRV_0 +245 0x0320 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0030 //RX_FDDRC_BAND_MARGIN_1 +248 0x0050 //RX_FDDRC_BAND_MARGIN_2 +249 0x0080 //RX_FDDRC_BAND_MARGIN_3 +250 0x0007 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x5000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x6400 //RX_FDDRC_THRD_3_2 +258 0x6400 //RX_FDDRC_THRD_3_3 +259 0x2000 //RX_FDDRC_SLANT_0_0 +260 0x2000 //RX_FDDRC_SLANT_0_1 +261 0x2000 //RX_FDDRC_SLANT_0_2 +262 0x2000 //RX_FDDRC_SLANT_0_3 +263 0x5333 //RX_FDDRC_SLANT_1_0 +264 0x5333 //RX_FDDRC_SLANT_1_1 +265 0x5333 //RX_FDDRC_SLANT_1_2 +266 0x5333 //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +286 0x0074 //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 +#VOL 6 +163 0x1000 //RX_TDDRC_ALPHA_UP_1 +164 0x1000 //RX_TDDRC_ALPHA_UP_2 +165 0x1000 //RX_TDDRC_ALPHA_UP_3 +166 0x1000 //RX_TDDRC_ALPHA_UP_4 +184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +190 0x7000 //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +269 0x0000 //RX_TDDRC_THRD_0 +270 0x0000 //RX_TDDRC_THRD_1 +271 0x1800 //RX_TDDRC_THRD_2 +272 0x1800 //RX_TDDRC_THRD_3 +273 0x3000 //RX_TDDRC_SLANT_0 +274 0x6E00 //RX_TDDRC_SLANT_1 +275 0x1000 //RX_TDDRC_ALPHA_UP_0 +276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x199A //RX_TDDRC_HMNC_GAIN +279 0x0001 //RX_TDDRC_SMT_FLAG +280 0x0CCD //RX_TDDRC_SMT_W +281 0x055F //RX_TDDRC_DRC_GAIN +195 0x0014 //RX_FDEQ_SUBNUM +196 0x4840 //RX_FDEQ_GAIN_0 +197 0x3E40 //RX_FDEQ_GAIN_1 +198 0x515E //RX_FDEQ_GAIN_2 +199 0x6470 //RX_FDEQ_GAIN_3 +200 0x7A84 //RX_FDEQ_GAIN_4 +201 0x7C7A //RX_FDEQ_GAIN_5 +202 0x7C7C //RX_FDEQ_GAIN_6 +203 0x7D7C //RX_FDEQ_GAIN_7 +204 0x7E82 //RX_FDEQ_GAIN_8 +205 0x7C80 //RX_FDEQ_GAIN_9 +206 0x4848 //RX_FDEQ_GAIN_10 +207 0x4848 //RX_FDEQ_GAIN_11 +208 0x4848 //RX_FDEQ_GAIN_12 +209 0x4848 //RX_FDEQ_GAIN_13 +210 0x4848 //RX_FDEQ_GAIN_14 +211 0x4848 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0202 //RX_FDEQ_BIN_0 +221 0x0204 //RX_FDEQ_BIN_1 +222 0x0203 //RX_FDEQ_BIN_2 +223 0x0304 //RX_FDEQ_BIN_3 +224 0x0405 //RX_FDEQ_BIN_4 +225 0x0506 //RX_FDEQ_BIN_5 +226 0x0708 //RX_FDEQ_BIN_6 +227 0x090A //RX_FDEQ_BIN_7 +228 0x0B0C //RX_FDEQ_BIN_8 +229 0x0D08 //RX_FDEQ_BIN_9 +230 0x0000 //RX_FDEQ_BIN_10 +231 0x0000 //RX_FDEQ_BIN_11 +232 0x0000 //RX_FDEQ_BIN_12 +233 0x0000 //RX_FDEQ_BIN_13 +234 0x0000 //RX_FDEQ_BIN_14 +235 0x0000 //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x4000 //RX_FDEQ_RESRV_0 +245 0x0320 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0030 //RX_FDDRC_BAND_MARGIN_1 +248 0x0050 //RX_FDDRC_BAND_MARGIN_2 +249 0x0080 //RX_FDDRC_BAND_MARGIN_3 +250 0x0007 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x5000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x6400 //RX_FDDRC_THRD_3_2 +258 0x6400 //RX_FDDRC_THRD_3_3 +259 0x2000 //RX_FDDRC_SLANT_0_0 +260 0x2000 //RX_FDDRC_SLANT_0_1 +261 0x2000 //RX_FDDRC_SLANT_0_2 +262 0x2000 //RX_FDDRC_SLANT_0_3 +263 0x5333 //RX_FDDRC_SLANT_1_0 +264 0x5333 //RX_FDDRC_SLANT_1_1 +265 0x5333 //RX_FDDRC_SLANT_1_2 +266 0x5333 //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +286 0x0100 //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 #CASE_NAME HANDSET-HANDSET-VOICE_GENERIC-WB -#PARAM_TYPE TX+RX -#TOTAL_CUSTOM_STEP 7 +#PARAM_MODE FULL +#PARAM_TYPE TX+2RX +#TOTAL_CUSTOM_STEP 7+7 #TX 0 0x0000 //TX_OPERATION_MODE_0 1 0x0000 //TX_OPERATION_MODE_1 @@ -7040,7 +10709,7 @@ 18 0x0000 //TX_SYS_RESRV_2 19 0x0000 //TX_SYS_RESRV_3 20 0x0000 //TX_DIST2REF0 -21 0x00A4 //TX_DIST2REF1 +21 0x00A3 //TX_DIST2REF1 22 0x0000 //TX_DIST2REF_02 23 0x0000 //TX_DIST2REF_03 24 0x0000 //TX_DIST2REF_04 @@ -7270,16 +10939,16 @@ 248 0xF800 //TX_THR_SN_EST_6 249 0xF700 //TX_THR_SN_EST_7 250 0x0000 //TX_DELTA_THR_SN_EST_0 -251 0x0100 //TX_DELTA_THR_SN_EST_1 -252 0x01A0 //TX_DELTA_THR_SN_EST_2 +251 0x01A0 //TX_DELTA_THR_SN_EST_1 +252 0x0200 //TX_DELTA_THR_SN_EST_2 253 0x0200 //TX_DELTA_THR_SN_EST_3 -254 0x0200 //TX_DELTA_THR_SN_EST_4 -255 0x0100 //TX_DELTA_THR_SN_EST_5 -256 0x0200 //TX_DELTA_THR_SN_EST_6 +254 0x0100 //TX_DELTA_THR_SN_EST_4 +255 0x0200 //TX_DELTA_THR_SN_EST_5 +256 0x0100 //TX_DELTA_THR_SN_EST_6 257 0x0200 //TX_DELTA_THR_SN_EST_7 258 0x4000 //TX_LAMBDA_NN_EST_0 -259 0x4000 //TX_LAMBDA_NN_EST_1 -260 0x5000 //TX_LAMBDA_NN_EST_2 +259 0x5000 //TX_LAMBDA_NN_EST_1 +260 0x4000 //TX_LAMBDA_NN_EST_2 261 0x4000 //TX_LAMBDA_NN_EST_3 262 0x4000 //TX_LAMBDA_NN_EST_4 263 0x4000 //TX_LAMBDA_NN_EST_5 @@ -7301,18 +10970,18 @@ 279 0x1000 //TX_B_POST_FLT_0 280 0x4000 //TX_B_POST_FLT_1 281 0x0018 //TX_NS_LVL_CTRL_0 -282 0x001C //TX_NS_LVL_CTRL_1 -283 0x0019 //TX_NS_LVL_CTRL_2 -284 0x0018 //TX_NS_LVL_CTRL_3 -285 0x0019 //TX_NS_LVL_CTRL_4 -286 0x001A //TX_NS_LVL_CTRL_5 -287 0x001E //TX_NS_LVL_CTRL_6 +282 0x0019 //TX_NS_LVL_CTRL_1 +283 0x0018 //TX_NS_LVL_CTRL_2 +284 0x0019 //TX_NS_LVL_CTRL_3 +285 0x001A //TX_NS_LVL_CTRL_4 +286 0x001E //TX_NS_LVL_CTRL_5 +287 0x001C //TX_NS_LVL_CTRL_6 288 0x001C //TX_NS_LVL_CTRL_7 289 0x000E //TX_MIN_GAIN_S_0 -290 0x0018 //TX_MIN_GAIN_S_1 +290 0x0012 //TX_MIN_GAIN_S_1 291 0x0012 //TX_MIN_GAIN_S_2 292 0x0012 //TX_MIN_GAIN_S_3 -293 0x0012 //TX_MIN_GAIN_S_4 +293 0x0018 //TX_MIN_GAIN_S_4 294 0x0018 //TX_MIN_GAIN_S_5 295 0x0018 //TX_MIN_GAIN_S_6 296 0x0018 //TX_MIN_GAIN_S_7 @@ -7320,8 +10989,8 @@ 298 0x0000 //TX_NS_MAX_PRI_SNR_TH 299 0x0000 //TX_NMOS_SUP_MENSA 300 0x7FFF //TX_SNRI_SUP_0 -301 0x4000 //TX_SNRI_SUP_1 -302 0x5000 //TX_SNRI_SUP_2 +301 0x5000 //TX_SNRI_SUP_1 +302 0x4000 //TX_SNRI_SUP_2 303 0x4000 //TX_SNRI_SUP_3 304 0x4000 //TX_SNRI_SUP_4 305 0x4000 //TX_SNRI_SUP_5 @@ -7334,28 +11003,28 @@ 312 0x7FFF //TX_A_POST_FILT_0 313 0x2000 //TX_A_POST_FILT_1 314 0x7000 //TX_A_POST_FILT_S_0 -315 0x7000 //TX_A_POST_FILT_S_1 +315 0x3000 //TX_A_POST_FILT_S_1 316 0x3000 //TX_A_POST_FILT_S_2 -317 0x3000 //TX_A_POST_FILT_S_3 -318 0x2000 //TX_A_POST_FILT_S_4 +317 0x2000 //TX_A_POST_FILT_S_3 +318 0x7000 //TX_A_POST_FILT_S_4 319 0x7000 //TX_A_POST_FILT_S_5 320 0x7000 //TX_A_POST_FILT_S_6 321 0x7000 //TX_A_POST_FILT_S_7 322 0x1000 //TX_B_POST_FILT_0 323 0x4000 //TX_B_POST_FILT_1 -324 0x5000 //TX_B_POST_FILT_2 +324 0x4000 //TX_B_POST_FILT_2 325 0x4000 //TX_B_POST_FILT_3 326 0x4000 //TX_B_POST_FILT_4 327 0x4000 //TX_B_POST_FILT_5 -328 0x4000 //TX_B_POST_FILT_6 +328 0x5000 //TX_B_POST_FILT_6 329 0x4000 //TX_B_POST_FILT_7 330 0x4000 //TX_B_LESSCUT_RTO_S_0 331 0x6000 //TX_B_LESSCUT_RTO_S_1 332 0x6000 //TX_B_LESSCUT_RTO_S_2 333 0x6000 //TX_B_LESSCUT_RTO_S_3 -334 0x6000 //TX_B_LESSCUT_RTO_S_4 +334 0x7FFF //TX_B_LESSCUT_RTO_S_4 335 0x6000 //TX_B_LESSCUT_RTO_S_5 -336 0x7FFF //TX_B_LESSCUT_RTO_S_6 +336 0x6000 //TX_B_LESSCUT_RTO_S_6 337 0x7FFF //TX_B_LESSCUT_RTO_S_7 338 0x7C29 //TX_LAMBDA_PFILT 339 0x7C29 //TX_LAMBDA_PFILT_S_0 @@ -7399,10 +11068,10 @@ 377 0x4E20 //TX_NOISE_TH_5_4 378 0x21E8 //TX_NOISE_TH_6 379 0x0014 //TX_MINENOISE_TH -380 0x4000 //TX_MINENOISE_MIC0_TH_MTS -381 0xFFEE //TX_MINENOISE_MIC0_TH_EXP -382 0x6000 //TX_MINENOISE_MIC0_S_TH_MTS -383 0xFFF3 //TX_MINENOISE_MIC0_S_TH_EXP +380 0xD508 //TX_MORENS_TFMASK_TH +381 0x0001 //TX_DRC_QUIET_FLOOR +382 0x6D60 //TX_RATIODTL_CUT_TH +383 0x0DAC //TX_DT_CUT_K1 384 0x00A5 //TX_OUT_ENER_S_TH_CLEAN 385 0x00A5 //TX_OUT_ENER_S_TH_LESSCLEAN 386 0x00A5 //TX_OUT_ENER_S_TH_NOISY @@ -7410,15 +11079,15 @@ 388 0x00CE //TX_OUT_ENER_TH_SPEECH 389 0x2000 //TX_SN_NPB_GAIN 390 0x0000 //TX_NN_NPB_GAIN -391 0x0000 //TX_CSX_ALPHA_0 -392 0x0000 //TX_CSX_ALPHA_1 -393 0x0000 //TX_CSX_ALPHA_2 -394 0x0000 //TX_CSX_ALPHA_3 -395 0x0800 //TX_MU_ARSP_EST -396 0x00C8 //TX_P_OUTBEAM_MIN_TH +391 0x3000 //TX_POST_MASK_SUP_HSNE +392 0x07D0 //TX_TAIL_DET_TH +393 0x4000 //TX_B_LESSCUT_RTO_WTA +394 0x0000 //TX_MEL_G_R +395 0x0080 //TX_SUPHIGH_TH +396 0x4000 //TX_MASK_G_R 397 0x0002 //TX_EXTRA_NS_L -398 0x0800 //TX_EXTRA_NS_A -399 0x0005 //TX_VR_NOISE_FLOOR_TH +398 0x1800 //TX_C_POST_FLT_MASK +399 0x7FFF //TX_A_POST_FLT_WNS 400 0x0148 //TX_MIN_G_LOW300HZ 401 0x0004 //TX_MAXLEVEL_CNG 402 0x00B4 //TX_STN_NOISE_TH @@ -7533,16 +11202,16 @@ 511 0x6666 //TX_MIC_TO_BFGAIN 512 0x0000 //TX_MICTOBFGAIN0 513 0x0000 //TX_FASTMUE_TH -514 0x0000 //TX_DERVB_LEN_0 -515 0x0000 //TX_DERVB_LEN_1 -516 0x0000 //TX_RHO_DERVB -517 0x0000 //TX_MIC_INDX_DERVB -518 0x0000 //TX_MU_DERVB -519 0x0000 //TX_DR_RESRV_0 -520 0x0000 //TX_DR_RESRV_1 -521 0x0000 //TX_DR_RESRV_2 -522 0x0000 //TX_DR_RESRV_3 -523 0x0000 //TX_DR_RESRV_4 +514 0x3000 //TX_DEREVERB_LF_MU +515 0x34CD //TX_DEREVERB_HF_MU +516 0x0007 //TX_DEREVERB_DELAY +517 0x0004 //TX_DEREVERB_COEF_LEN +518 0x0003 //TX_DEREVERB_DNR +519 0x0000 //TX_DEREVERB_ALPHA +520 0x0000 //TX_DEREVERB_BETA +521 0x0000 //TX_GSC_RTOL_TH +522 0x0000 //TX_GSC_RTOH_TH +523 0x7E2C //TX_WIDE2_MEANHTH 524 0x0000 //TX_DR_RESRV_5 525 0x0000 //TX_DR_RESRV_6 526 0x0000 //TX_DR_RESRV_7 @@ -7691,14 +11360,14 @@ 669 0x4848 //TX_PREEQ_GAIN_MIC1_3 670 0x4848 //TX_PREEQ_GAIN_MIC1_4 671 0x4848 //TX_PREEQ_GAIN_MIC1_5 -672 0x4848 //TX_PREEQ_GAIN_MIC1_6 -673 0x4849 //TX_PREEQ_GAIN_MIC1_7 -674 0x484E //TX_PREEQ_GAIN_MIC1_8 +672 0x494A //TX_PREEQ_GAIN_MIC1_6 +673 0x4B4C //TX_PREEQ_GAIN_MIC1_7 +674 0x4D4E //TX_PREEQ_GAIN_MIC1_8 675 0x5051 //TX_PREEQ_GAIN_MIC1_9 676 0x5255 //TX_PREEQ_GAIN_MIC1_10 -677 0x5759 //TX_PREEQ_GAIN_MIC1_11 -678 0x5A60 //TX_PREEQ_GAIN_MIC1_12 -679 0x6670 //TX_PREEQ_GAIN_MIC1_13 +677 0x585A //TX_PREEQ_GAIN_MIC1_11 +678 0x5C5F //TX_PREEQ_GAIN_MIC1_12 +679 0x636A //TX_PREEQ_GAIN_MIC1_13 680 0x4848 //TX_PREEQ_GAIN_MIC1_14 681 0x4848 //TX_PREEQ_GAIN_MIC1_15 682 0x4848 //TX_PREEQ_GAIN_MIC1_16 @@ -7885,7 +11554,7 @@ 863 0x199A //TX_TDDRC_HMNC_GAIN 864 0x0000 //TX_TDDRC_SMT_FLAG 865 0x0CCD //TX_TDDRC_SMT_W -866 0x0550 //TX_TDDRC_DRC_GAIN +866 0x05A0 //TX_TDDRC_DRC_GAIN 867 0x7FFF //TX_TDDRC_LMT_THRD 868 0x0000 //TX_TDDRC_LMT_ALPHA 869 0x0000 //TX_TFMASKLTH @@ -7916,8 +11585,73 @@ 894 0xC000 //TX_FASTNS_SSA_THHFL 895 0xCCCC //TX_FASTNS_SSA_THLFH 896 0xD999 //TX_FASTNS_SSA_THHFH +897 0x2339 //TX_SENDFUNC_REG_MICMUTE +898 0x0021 //TX_SENDFUNC_REG_MICMUTE1 +899 0x02BC //TX_MICMUTE_RATIO_THR +900 0x0140 //TX_MICMUTE_AMP_THR +901 0x0004 //TX_MICMUTE_HPF_IND +902 0x00C0 //TX_MICMUTE_LOG_EYR_TH +903 0x0008 //TX_MICMUTE_CVG_TIME +904 0x0008 //TX_MICMUTE_RELEASE_TIME +905 0x01FE //TX_MIC_VOLUME_MIC0MUTE +906 0x0020 //TX_MICMUTE_EPD_OFFSET_0 +907 0x001E //TX_MICMUTE_FRQ_AEC_L +908 0x7999 //TX_MICMUTE_EAD_THR +909 0x7FFF //TX_MICMUTE_LAMBDA_CB_NLE +910 0x7FFF //TX_MICMUTE_LAMBDA_RE_EST +911 0x4000 //TX_DTD_THR1_MICMUTE_0 +912 0x7000 //TX_DTD_THR1_MICMUTE_1 +913 0x7FFF //TX_DTD_THR1_MICMUTE_2 +914 0x7FFF //TX_DTD_THR1_MICMUTE_3 +915 0x6CCC //TX_DTD_THR2_MICMUTE_0 +916 0x0400 //TX_MICMUTE_MIN_EQ_RE_EST_0 +917 0x0400 //TX_MICMUTE_MIN_EQ_RE_EST_1 +918 0x1000 //TX_MICMUTE_MIN_EQ_RE_EST_2 +919 0x7FFF //TX_MICMUTE_MIN_EQ_RE_EST_3 +920 0x7FFF //TX_MICMUTE_MIN_EQ_RE_EST_4 +921 0x4000 //TX_MICMUTE_C_POST_FLT +922 0x03E8 //TX_MICMUTE_DT_CUT_K +923 0x0001 //TX_MICMUTE_DT_CUT_THR +924 0x03E8 //TX_MICMUTE_DT_CUT_K2 +925 0x0001 //TX_MICMUTE_DT_CUT_THR2 +926 0x0064 //TX_MICMUTE_DT2_HOLD_N +927 0x1000 //TX_MICMUTE_RATIODTH_THCUT +928 0x1000 //TX_MICMUTE_B_POST_FLT_ECHOL +929 0x7FFF //TX_MICMUTE_B_POST_FLT_ECHOH +930 0x0400 //TX_MICMUTE_C_POST_FLT_MASK +931 0x7999 //TX_MICMUTE_RATIODTL_CUT_TH +932 0x0258 //TX_MICMUTE_DT_CUT_K1 +933 0x0800 //TX_MICMUTE_N2_SN_EST +934 0xFC00 //TX_MICMUTE_THR_SN_EST_0 +935 0x001C //TX_MICMUTE_MIN_G_CTRL_0 +936 0x6000 //TX_MICMUTE_A_POST_FILT_S_0 +937 0x7000 //TX_MICMUTE_B_POST_FILT_0 +938 0x2710 //TX_MIC1RUB_AMP_THR +939 0x0010 //TX_MIC1MUTE_RATIO_THR +940 0x0450 //TX_MIC1MUTE_AMP_THR +941 0x0008 //TX_MIC1MUTE_CVG_TIME +942 0x0008 //TX_MIC1MUTE_RELEASE_TIME +943 0x0000 //TX_AMS_RESRV_01 +944 0x0000 //TX_AMS_RESRV_02 +945 0x0000 //TX_AMS_RESRV_03 +946 0x0000 //TX_AMS_RESRV_04 +947 0x0000 //TX_AMS_RESRV_05 +948 0x0000 //TX_AMS_RESRV_06 +949 0x0000 //TX_AMS_RESRV_07 +950 0x0000 //TX_AMS_RESRV_08 +951 0x0000 //TX_AMS_RESRV_09 +952 0x0000 //TX_AMS_RESRV_10 +953 0x0000 //TX_AMS_RESRV_11 +954 0x0000 //TX_AMS_RESRV_12 +955 0x0000 //TX_AMS_RESRV_13 +956 0x0000 //TX_AMS_RESRV_14 +957 0x0000 //TX_AMS_RESRV_15 +958 0x0000 //TX_AMS_RESRV_16 +959 0x0000 //TX_AMS_RESRV_17 +960 0x0000 //TX_AMS_RESRV_18 +961 0x0000 //TX_AMS_RESRV_19 #RX -0 0x003C //RX_RECVFUNC_MODE_0 +0 0x203C //RX_RECVFUNC_MODE_0 1 0x0000 //RX_RECVFUNC_MODE_1 2 0x0001 //RX_SAMPLINGFREQ_SIG 3 0x0001 //RX_SAMPLINGFREQ_PROC @@ -7958,16 +11692,16 @@ 38 0x001C //RX_FDEQ_SUBNUM 39 0x4840 //RX_FDEQ_GAIN_0 40 0x4040 //RX_FDEQ_GAIN_1 -41 0x4659 //RX_FDEQ_GAIN_2 -42 0x6474 //RX_FDEQ_GAIN_3 -43 0x7A82 //RX_FDEQ_GAIN_4 -44 0x8180 //RX_FDEQ_GAIN_5 -45 0x8084 //RX_FDEQ_GAIN_6 -46 0x8A88 //RX_FDEQ_GAIN_7 +41 0x4655 //RX_FDEQ_GAIN_2 +42 0x606C //RX_FDEQ_GAIN_3 +43 0x7276 //RX_FDEQ_GAIN_4 +44 0x7A7A //RX_FDEQ_GAIN_5 +45 0x7D81 //RX_FDEQ_GAIN_6 +46 0x8786 //RX_FDEQ_GAIN_7 47 0x8C8C //RX_FDEQ_GAIN_8 -48 0x8A95 //RX_FDEQ_GAIN_9 -49 0x978E //RX_FDEQ_GAIN_10 -50 0x8C8C //RX_FDEQ_GAIN_11 +48 0x8A94 //RX_FDEQ_GAIN_9 +49 0x9684 //RX_FDEQ_GAIN_10 +50 0x7A8A //RX_FDEQ_GAIN_11 51 0x7068 //RX_FDEQ_GAIN_12 52 0x6050 //RX_FDEQ_GAIN_13 53 0x4848 //RX_FDEQ_GAIN_14 @@ -7991,7 +11725,7 @@ 71 0x0B0C //RX_FDEQ_BIN_8 72 0x0D0E //RX_FDEQ_BIN_9 73 0x0E0F //RX_FDEQ_BIN_10 -74 0x0F0E //RX_FDEQ_BIN_11 +74 0x0815 //RX_FDEQ_BIN_11 75 0x100D //RX_FDEQ_BIN_12 76 0x110A //RX_FDEQ_BIN_13 77 0x0000 //RX_FDEQ_BIN_14 @@ -8046,7 +11780,7 @@ 126 0x13E0 //RX_TPKA_FP 127 0x0080 //RX_MIN_G_FP 128 0x2000 //RX_MAX_G_FP -129 0x000B //RX_SPK_VOL +129 0x0034 //RX_SPK_VOL 130 0x0000 //RX_VOL_RESRV_0 131 0x0000 //RX_MAXLEVEL_CNG 132 0x3000 //RX_BWE_UV_TH @@ -8101,16 +11835,16 @@ 38 0x001C //RX_FDEQ_SUBNUM 39 0x4840 //RX_FDEQ_GAIN_0 40 0x4040 //RX_FDEQ_GAIN_1 -41 0x4659 //RX_FDEQ_GAIN_2 -42 0x6474 //RX_FDEQ_GAIN_3 -43 0x7A82 //RX_FDEQ_GAIN_4 -44 0x8180 //RX_FDEQ_GAIN_5 -45 0x8084 //RX_FDEQ_GAIN_6 -46 0x8A88 //RX_FDEQ_GAIN_7 +41 0x4655 //RX_FDEQ_GAIN_2 +42 0x606C //RX_FDEQ_GAIN_3 +43 0x7276 //RX_FDEQ_GAIN_4 +44 0x7A7A //RX_FDEQ_GAIN_5 +45 0x7D81 //RX_FDEQ_GAIN_6 +46 0x8786 //RX_FDEQ_GAIN_7 47 0x8C8C //RX_FDEQ_GAIN_8 -48 0x8A95 //RX_FDEQ_GAIN_9 -49 0x978E //RX_FDEQ_GAIN_10 -50 0x8C8C //RX_FDEQ_GAIN_11 +48 0x8A94 //RX_FDEQ_GAIN_9 +49 0x9684 //RX_FDEQ_GAIN_10 +50 0x7A8A //RX_FDEQ_GAIN_11 51 0x7068 //RX_FDEQ_GAIN_12 52 0x6050 //RX_FDEQ_GAIN_13 53 0x4848 //RX_FDEQ_GAIN_14 @@ -8134,7 +11868,7 @@ 71 0x0B0C //RX_FDEQ_BIN_8 72 0x0D0E //RX_FDEQ_BIN_9 73 0x0E0F //RX_FDEQ_BIN_10 -74 0x0F0E //RX_FDEQ_BIN_11 +74 0x0815 //RX_FDEQ_BIN_11 75 0x100D //RX_FDEQ_BIN_12 76 0x110A //RX_FDEQ_BIN_13 77 0x0000 //RX_FDEQ_BIN_14 @@ -8200,16 +11934,16 @@ 38 0x001C //RX_FDEQ_SUBNUM 39 0x4840 //RX_FDEQ_GAIN_0 40 0x4040 //RX_FDEQ_GAIN_1 -41 0x4659 //RX_FDEQ_GAIN_2 -42 0x6474 //RX_FDEQ_GAIN_3 -43 0x7A82 //RX_FDEQ_GAIN_4 -44 0x8180 //RX_FDEQ_GAIN_5 -45 0x8084 //RX_FDEQ_GAIN_6 -46 0x8A88 //RX_FDEQ_GAIN_7 +41 0x4655 //RX_FDEQ_GAIN_2 +42 0x606C //RX_FDEQ_GAIN_3 +43 0x7276 //RX_FDEQ_GAIN_4 +44 0x7A7A //RX_FDEQ_GAIN_5 +45 0x7D81 //RX_FDEQ_GAIN_6 +46 0x8786 //RX_FDEQ_GAIN_7 47 0x8C8C //RX_FDEQ_GAIN_8 -48 0x8A95 //RX_FDEQ_GAIN_9 -49 0x978E //RX_FDEQ_GAIN_10 -50 0x8C8C //RX_FDEQ_GAIN_11 +48 0x8A94 //RX_FDEQ_GAIN_9 +49 0x9684 //RX_FDEQ_GAIN_10 +50 0x7A8A //RX_FDEQ_GAIN_11 51 0x7068 //RX_FDEQ_GAIN_12 52 0x6050 //RX_FDEQ_GAIN_13 53 0x4848 //RX_FDEQ_GAIN_14 @@ -8233,7 +11967,7 @@ 71 0x0B0C //RX_FDEQ_BIN_8 72 0x0D0E //RX_FDEQ_BIN_9 73 0x0E0F //RX_FDEQ_BIN_10 -74 0x0F0E //RX_FDEQ_BIN_11 +74 0x0815 //RX_FDEQ_BIN_11 75 0x100D //RX_FDEQ_BIN_12 76 0x110A //RX_FDEQ_BIN_13 77 0x0000 //RX_FDEQ_BIN_14 @@ -8299,16 +12033,16 @@ 38 0x001C //RX_FDEQ_SUBNUM 39 0x4840 //RX_FDEQ_GAIN_0 40 0x4040 //RX_FDEQ_GAIN_1 -41 0x4659 //RX_FDEQ_GAIN_2 -42 0x6474 //RX_FDEQ_GAIN_3 -43 0x7A82 //RX_FDEQ_GAIN_4 -44 0x8180 //RX_FDEQ_GAIN_5 -45 0x8084 //RX_FDEQ_GAIN_6 -46 0x8A88 //RX_FDEQ_GAIN_7 +41 0x4655 //RX_FDEQ_GAIN_2 +42 0x606C //RX_FDEQ_GAIN_3 +43 0x7276 //RX_FDEQ_GAIN_4 +44 0x7A7A //RX_FDEQ_GAIN_5 +45 0x7D81 //RX_FDEQ_GAIN_6 +46 0x8786 //RX_FDEQ_GAIN_7 47 0x8C8C //RX_FDEQ_GAIN_8 -48 0x8A95 //RX_FDEQ_GAIN_9 -49 0x978E //RX_FDEQ_GAIN_10 -50 0x8C8C //RX_FDEQ_GAIN_11 +48 0x8A94 //RX_FDEQ_GAIN_9 +49 0x9684 //RX_FDEQ_GAIN_10 +50 0x7A8A //RX_FDEQ_GAIN_11 51 0x7068 //RX_FDEQ_GAIN_12 52 0x6050 //RX_FDEQ_GAIN_13 53 0x4848 //RX_FDEQ_GAIN_14 @@ -8332,7 +12066,7 @@ 71 0x0B0C //RX_FDEQ_BIN_8 72 0x0D0E //RX_FDEQ_BIN_9 73 0x0E0F //RX_FDEQ_BIN_10 -74 0x0F0E //RX_FDEQ_BIN_11 +74 0x0815 //RX_FDEQ_BIN_11 75 0x100D //RX_FDEQ_BIN_12 76 0x110A //RX_FDEQ_BIN_13 77 0x0000 //RX_FDEQ_BIN_14 @@ -8398,16 +12132,16 @@ 38 0x001C //RX_FDEQ_SUBNUM 39 0x4840 //RX_FDEQ_GAIN_0 40 0x4040 //RX_FDEQ_GAIN_1 -41 0x4659 //RX_FDEQ_GAIN_2 -42 0x6474 //RX_FDEQ_GAIN_3 -43 0x7A82 //RX_FDEQ_GAIN_4 -44 0x8180 //RX_FDEQ_GAIN_5 -45 0x8084 //RX_FDEQ_GAIN_6 -46 0x8A88 //RX_FDEQ_GAIN_7 +41 0x4655 //RX_FDEQ_GAIN_2 +42 0x606C //RX_FDEQ_GAIN_3 +43 0x7276 //RX_FDEQ_GAIN_4 +44 0x7A7A //RX_FDEQ_GAIN_5 +45 0x7D81 //RX_FDEQ_GAIN_6 +46 0x8786 //RX_FDEQ_GAIN_7 47 0x8C8C //RX_FDEQ_GAIN_8 -48 0x8A95 //RX_FDEQ_GAIN_9 -49 0x978E //RX_FDEQ_GAIN_10 -50 0x8C8C //RX_FDEQ_GAIN_11 +48 0x8A94 //RX_FDEQ_GAIN_9 +49 0x9684 //RX_FDEQ_GAIN_10 +50 0x7A8A //RX_FDEQ_GAIN_11 51 0x7068 //RX_FDEQ_GAIN_12 52 0x6050 //RX_FDEQ_GAIN_13 53 0x4848 //RX_FDEQ_GAIN_14 @@ -8431,7 +12165,7 @@ 71 0x0B0C //RX_FDEQ_BIN_8 72 0x0D0E //RX_FDEQ_BIN_9 73 0x0E0F //RX_FDEQ_BIN_10 -74 0x0F0E //RX_FDEQ_BIN_11 +74 0x0815 //RX_FDEQ_BIN_11 75 0x100D //RX_FDEQ_BIN_12 76 0x110A //RX_FDEQ_BIN_13 77 0x0000 //RX_FDEQ_BIN_14 @@ -8468,7 +12202,7 @@ 108 0x5333 //RX_FDDRC_SLANT_1_2 109 0x5333 //RX_FDDRC_SLANT_1_3 110 0x0000 //RX_FDDRC_RESRV_0 -129 0x0031 //RX_SPK_VOL +129 0x0034 //RX_SPK_VOL 130 0x0000 //RX_VOL_RESRV_0 #VOL 4 6 0x1000 //RX_TDDRC_ALPHA_UP_1 @@ -8497,16 +12231,16 @@ 38 0x001C //RX_FDEQ_SUBNUM 39 0x4840 //RX_FDEQ_GAIN_0 40 0x4040 //RX_FDEQ_GAIN_1 -41 0x4659 //RX_FDEQ_GAIN_2 -42 0x6474 //RX_FDEQ_GAIN_3 -43 0x7A82 //RX_FDEQ_GAIN_4 -44 0x8180 //RX_FDEQ_GAIN_5 -45 0x8084 //RX_FDEQ_GAIN_6 -46 0x8A88 //RX_FDEQ_GAIN_7 +41 0x4655 //RX_FDEQ_GAIN_2 +42 0x606C //RX_FDEQ_GAIN_3 +43 0x7276 //RX_FDEQ_GAIN_4 +44 0x7A7A //RX_FDEQ_GAIN_5 +45 0x7D81 //RX_FDEQ_GAIN_6 +46 0x8786 //RX_FDEQ_GAIN_7 47 0x8C8C //RX_FDEQ_GAIN_8 -48 0x8A95 //RX_FDEQ_GAIN_9 -49 0x978E //RX_FDEQ_GAIN_10 -50 0x8C8C //RX_FDEQ_GAIN_11 +48 0x8A94 //RX_FDEQ_GAIN_9 +49 0x9684 //RX_FDEQ_GAIN_10 +50 0x7A8A //RX_FDEQ_GAIN_11 51 0x7068 //RX_FDEQ_GAIN_12 52 0x6050 //RX_FDEQ_GAIN_13 53 0x4848 //RX_FDEQ_GAIN_14 @@ -8530,7 +12264,7 @@ 71 0x0B0C //RX_FDEQ_BIN_8 72 0x0D0E //RX_FDEQ_BIN_9 73 0x0E0F //RX_FDEQ_BIN_10 -74 0x0F0E //RX_FDEQ_BIN_11 +74 0x0815 //RX_FDEQ_BIN_11 75 0x100D //RX_FDEQ_BIN_12 76 0x110A //RX_FDEQ_BIN_13 77 0x0000 //RX_FDEQ_BIN_14 @@ -8596,16 +12330,16 @@ 38 0x001C //RX_FDEQ_SUBNUM 39 0x4840 //RX_FDEQ_GAIN_0 40 0x4040 //RX_FDEQ_GAIN_1 -41 0x4659 //RX_FDEQ_GAIN_2 -42 0x6474 //RX_FDEQ_GAIN_3 -43 0x7A82 //RX_FDEQ_GAIN_4 -44 0x8180 //RX_FDEQ_GAIN_5 -45 0x8084 //RX_FDEQ_GAIN_6 -46 0x8A88 //RX_FDEQ_GAIN_7 +41 0x4655 //RX_FDEQ_GAIN_2 +42 0x606C //RX_FDEQ_GAIN_3 +43 0x7276 //RX_FDEQ_GAIN_4 +44 0x7A7A //RX_FDEQ_GAIN_5 +45 0x7D81 //RX_FDEQ_GAIN_6 +46 0x8786 //RX_FDEQ_GAIN_7 47 0x8C8C //RX_FDEQ_GAIN_8 -48 0x8A95 //RX_FDEQ_GAIN_9 -49 0x978E //RX_FDEQ_GAIN_10 -50 0x8C8C //RX_FDEQ_GAIN_11 +48 0x8A94 //RX_FDEQ_GAIN_9 +49 0x9684 //RX_FDEQ_GAIN_10 +50 0x7A8A //RX_FDEQ_GAIN_11 51 0x7068 //RX_FDEQ_GAIN_12 52 0x6050 //RX_FDEQ_GAIN_13 53 0x4848 //RX_FDEQ_GAIN_14 @@ -8629,7 +12363,7 @@ 71 0x0B0C //RX_FDEQ_BIN_8 72 0x0D0E //RX_FDEQ_BIN_9 73 0x0E0F //RX_FDEQ_BIN_10 -74 0x0F0E //RX_FDEQ_BIN_11 +74 0x0815 //RX_FDEQ_BIN_11 75 0x100D //RX_FDEQ_BIN_12 76 0x110A //RX_FDEQ_BIN_13 77 0x0000 //RX_FDEQ_BIN_14 @@ -8695,16 +12429,16 @@ 38 0x001C //RX_FDEQ_SUBNUM 39 0x4840 //RX_FDEQ_GAIN_0 40 0x4040 //RX_FDEQ_GAIN_1 -41 0x4659 //RX_FDEQ_GAIN_2 -42 0x6474 //RX_FDEQ_GAIN_3 -43 0x7A82 //RX_FDEQ_GAIN_4 -44 0x8180 //RX_FDEQ_GAIN_5 -45 0x8084 //RX_FDEQ_GAIN_6 -46 0x8A88 //RX_FDEQ_GAIN_7 +41 0x4655 //RX_FDEQ_GAIN_2 +42 0x606C //RX_FDEQ_GAIN_3 +43 0x7276 //RX_FDEQ_GAIN_4 +44 0x7A7A //RX_FDEQ_GAIN_5 +45 0x7D81 //RX_FDEQ_GAIN_6 +46 0x8786 //RX_FDEQ_GAIN_7 47 0x8C8C //RX_FDEQ_GAIN_8 -48 0x8A95 //RX_FDEQ_GAIN_9 -49 0x978E //RX_FDEQ_GAIN_10 -50 0x8C8C //RX_FDEQ_GAIN_11 +48 0x8A94 //RX_FDEQ_GAIN_9 +49 0x9684 //RX_FDEQ_GAIN_10 +50 0x7A8A //RX_FDEQ_GAIN_11 51 0x7068 //RX_FDEQ_GAIN_12 52 0x6050 //RX_FDEQ_GAIN_13 53 0x4848 //RX_FDEQ_GAIN_14 @@ -8728,7 +12462,7 @@ 71 0x0B0C //RX_FDEQ_BIN_8 72 0x0D0E //RX_FDEQ_BIN_9 73 0x0E0F //RX_FDEQ_BIN_10 -74 0x0F0E //RX_FDEQ_BIN_11 +74 0x0815 //RX_FDEQ_BIN_11 75 0x100D //RX_FDEQ_BIN_12 76 0x110A //RX_FDEQ_BIN_13 77 0x0000 //RX_FDEQ_BIN_14 @@ -8767,14 +12501,866 @@ 110 0x0000 //RX_FDDRC_RESRV_0 129 0x0100 //RX_SPK_VOL 130 0x0000 //RX_VOL_RESRV_0 +#RX 2 +157 0x003C //RX_RECVFUNC_MODE_0 +158 0x0000 //RX_RECVFUNC_MODE_1 +159 0x0001 //RX_SAMPLINGFREQ_SIG +160 0x0001 //RX_SAMPLINGFREQ_PROC +161 0x000A //RX_FRAME_SZ +162 0x0000 //RX_DELAY_OPT +163 0x1000 //RX_TDDRC_ALPHA_UP_1 +164 0x1000 //RX_TDDRC_ALPHA_UP_2 +165 0x1000 //RX_TDDRC_ALPHA_UP_3 +166 0x1000 //RX_TDDRC_ALPHA_UP_4 +167 0x0600 //RX_PGA +168 0x7FFF //RX_A_HP +169 0x4000 //RX_B_PE +170 0x7800 //RX_THR_PITCH_DET_0 +171 0x7000 //RX_THR_PITCH_DET_1 +172 0x6000 //RX_THR_PITCH_DET_2 +173 0x0008 //RX_PITCH_BFR_LEN +174 0x0003 //RX_SBD_PITCH_DET +175 0x0100 //RX_PP_RESRV_0 +176 0x0020 //RX_PP_RESRV_1 +177 0x0400 //RX_N_SN_EST +178 0x000C //RX_N2_SN_EST +179 0x0014 //RX_NS_LVL_CTRL +180 0xF800 //RX_THR_SN_EST +181 0x7E00 //RX_LAMBDA_PFILT +182 0x000A //RX_FENS_RESRV_0 +183 0x0190 //RX_FENS_RESRV_1 +184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +187 0x0002 //RX_EXTRA_NS_L +188 0x0800 //RX_EXTRA_NS_A +189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +190 0x7000 //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +192 0x199A //RX_A_POST_FLT +193 0x1000 //RX_LMT_THRD +194 0x7FDF //RX_LMT_ALPHA +195 0x001C //RX_FDEQ_SUBNUM +196 0x4840 //RX_FDEQ_GAIN_0 +197 0x4040 //RX_FDEQ_GAIN_1 +198 0x4659 //RX_FDEQ_GAIN_2 +199 0x6474 //RX_FDEQ_GAIN_3 +200 0x7A82 //RX_FDEQ_GAIN_4 +201 0x8180 //RX_FDEQ_GAIN_5 +202 0x8084 //RX_FDEQ_GAIN_6 +203 0x8A88 //RX_FDEQ_GAIN_7 +204 0x8C8C //RX_FDEQ_GAIN_8 +205 0x8A95 //RX_FDEQ_GAIN_9 +206 0x978E //RX_FDEQ_GAIN_10 +207 0x8C8C //RX_FDEQ_GAIN_11 +208 0x7068 //RX_FDEQ_GAIN_12 +209 0x6050 //RX_FDEQ_GAIN_13 +210 0x4848 //RX_FDEQ_GAIN_14 +211 0x4848 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0202 //RX_FDEQ_BIN_0 +221 0x0203 //RX_FDEQ_BIN_1 +222 0x0303 //RX_FDEQ_BIN_2 +223 0x0304 //RX_FDEQ_BIN_3 +224 0x0405 //RX_FDEQ_BIN_4 +225 0x0506 //RX_FDEQ_BIN_5 +226 0x0708 //RX_FDEQ_BIN_6 +227 0x090A //RX_FDEQ_BIN_7 +228 0x0B0C //RX_FDEQ_BIN_8 +229 0x0D0E //RX_FDEQ_BIN_9 +230 0x0E0F //RX_FDEQ_BIN_10 +231 0x0F0E //RX_FDEQ_BIN_11 +232 0x100D //RX_FDEQ_BIN_12 +233 0x110A //RX_FDEQ_BIN_13 +234 0x0000 //RX_FDEQ_BIN_14 +235 0x0000 //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x4000 //RX_FDEQ_RESRV_0 +245 0x0320 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0030 //RX_FDDRC_BAND_MARGIN_1 +248 0x0050 //RX_FDDRC_BAND_MARGIN_2 +249 0x0080 //RX_FDDRC_BAND_MARGIN_3 +250 0x0007 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x5000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x6400 //RX_FDDRC_THRD_3_2 +258 0x6400 //RX_FDDRC_THRD_3_3 +259 0x2000 //RX_FDDRC_SLANT_0_0 +260 0x2000 //RX_FDDRC_SLANT_0_1 +261 0x2000 //RX_FDDRC_SLANT_0_2 +262 0x2000 //RX_FDDRC_SLANT_0_3 +263 0x5333 //RX_FDDRC_SLANT_1_0 +264 0x5333 //RX_FDDRC_SLANT_1_1 +265 0x5333 //RX_FDDRC_SLANT_1_2 +266 0x5333 //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +268 0x0002 //RX_FILTINDX +269 0x0000 //RX_TDDRC_THRD_0 +270 0x0000 //RX_TDDRC_THRD_1 +271 0x1800 //RX_TDDRC_THRD_2 +272 0x1800 //RX_TDDRC_THRD_3 +273 0x3000 //RX_TDDRC_SLANT_0 +274 0x6E00 //RX_TDDRC_SLANT_1 +275 0x1000 //RX_TDDRC_ALPHA_UP_0 +276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x199A //RX_TDDRC_HMNC_GAIN +279 0x0001 //RX_TDDRC_SMT_FLAG +280 0x0CCD //RX_TDDRC_SMT_W +281 0x04E6 //RX_TDDRC_DRC_GAIN +282 0x7C00 //RX_LAMBDA_PKA_FP +283 0x13E0 //RX_TPKA_FP +284 0x0080 //RX_MIN_G_FP +285 0x2000 //RX_MAX_G_FP +286 0x000B //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 +288 0x0000 //RX_MAXLEVEL_CNG +289 0x3000 //RX_BWE_UV_TH +290 0x3000 //RX_BWE_UV_TH2 +291 0x1800 //RX_BWE_UV_TH3 +292 0x1000 //RX_BWE_V_TH +293 0x04CD //RX_BWE_GAIN1_V_TH1 +294 0x0F33 //RX_BWE_GAIN1_V_TH2 +295 0x7333 //RX_BWE_UV_EQ +296 0x199A //RX_BWE_V_EQ +297 0x7333 //RX_BWE_TONE_TH +298 0x0004 //RX_BWE_UV_HOLD_T +299 0x6CCD //RX_BWE_GAIN2_ALPHA +300 0x799A //RX_BWE_GAIN3_ALPHA +301 0x001E //RX_BWE_CUTOFF +302 0x3000 //RX_BWE_GAINFILL +303 0x3200 //RX_BWE_MAXTH_TONE +304 0x2000 //RX_BWE_EQ_0 +305 0x2000 //RX_BWE_EQ_1 +306 0x2000 //RX_BWE_EQ_2 +307 0x2000 //RX_BWE_EQ_3 +308 0x2000 //RX_BWE_EQ_4 +309 0x2000 //RX_BWE_EQ_5 +310 0x2000 //RX_BWE_EQ_6 +311 0x0000 //RX_BWE_RESRV_0 +312 0x0000 //RX_BWE_RESRV_1 +313 0x0000 //RX_BWE_RESRV_2 +#VOL 0 +163 0x1000 //RX_TDDRC_ALPHA_UP_1 +164 0x1000 //RX_TDDRC_ALPHA_UP_2 +165 0x1000 //RX_TDDRC_ALPHA_UP_3 +166 0x1000 //RX_TDDRC_ALPHA_UP_4 +184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +190 0x7000 //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +269 0x0000 //RX_TDDRC_THRD_0 +270 0x0000 //RX_TDDRC_THRD_1 +271 0x1800 //RX_TDDRC_THRD_2 +272 0x1800 //RX_TDDRC_THRD_3 +273 0x3000 //RX_TDDRC_SLANT_0 +274 0x6E00 //RX_TDDRC_SLANT_1 +275 0x1000 //RX_TDDRC_ALPHA_UP_0 +276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x199A //RX_TDDRC_HMNC_GAIN +279 0x0001 //RX_TDDRC_SMT_FLAG +280 0x0CCD //RX_TDDRC_SMT_W +281 0x04E6 //RX_TDDRC_DRC_GAIN +195 0x001C //RX_FDEQ_SUBNUM +196 0x4840 //RX_FDEQ_GAIN_0 +197 0x4040 //RX_FDEQ_GAIN_1 +198 0x4659 //RX_FDEQ_GAIN_2 +199 0x6474 //RX_FDEQ_GAIN_3 +200 0x7A82 //RX_FDEQ_GAIN_4 +201 0x8180 //RX_FDEQ_GAIN_5 +202 0x8084 //RX_FDEQ_GAIN_6 +203 0x8A88 //RX_FDEQ_GAIN_7 +204 0x8C8C //RX_FDEQ_GAIN_8 +205 0x8A95 //RX_FDEQ_GAIN_9 +206 0x978E //RX_FDEQ_GAIN_10 +207 0x8C8C //RX_FDEQ_GAIN_11 +208 0x7068 //RX_FDEQ_GAIN_12 +209 0x6050 //RX_FDEQ_GAIN_13 +210 0x4848 //RX_FDEQ_GAIN_14 +211 0x4848 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0202 //RX_FDEQ_BIN_0 +221 0x0203 //RX_FDEQ_BIN_1 +222 0x0303 //RX_FDEQ_BIN_2 +223 0x0304 //RX_FDEQ_BIN_3 +224 0x0405 //RX_FDEQ_BIN_4 +225 0x0506 //RX_FDEQ_BIN_5 +226 0x0708 //RX_FDEQ_BIN_6 +227 0x090A //RX_FDEQ_BIN_7 +228 0x0B0C //RX_FDEQ_BIN_8 +229 0x0D0E //RX_FDEQ_BIN_9 +230 0x0E0F //RX_FDEQ_BIN_10 +231 0x0F0E //RX_FDEQ_BIN_11 +232 0x100D //RX_FDEQ_BIN_12 +233 0x110A //RX_FDEQ_BIN_13 +234 0x0000 //RX_FDEQ_BIN_14 +235 0x0000 //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x4000 //RX_FDEQ_RESRV_0 +245 0x0320 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0030 //RX_FDDRC_BAND_MARGIN_1 +248 0x0050 //RX_FDDRC_BAND_MARGIN_2 +249 0x0080 //RX_FDDRC_BAND_MARGIN_3 +250 0x0007 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x5000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x6400 //RX_FDDRC_THRD_3_2 +258 0x6400 //RX_FDDRC_THRD_3_3 +259 0x2000 //RX_FDDRC_SLANT_0_0 +260 0x2000 //RX_FDDRC_SLANT_0_1 +261 0x2000 //RX_FDDRC_SLANT_0_2 +262 0x2000 //RX_FDDRC_SLANT_0_3 +263 0x5333 //RX_FDDRC_SLANT_1_0 +264 0x5333 //RX_FDDRC_SLANT_1_1 +265 0x5333 //RX_FDDRC_SLANT_1_2 +266 0x5333 //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +286 0x000B //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 +#VOL 1 +163 0x1000 //RX_TDDRC_ALPHA_UP_1 +164 0x1000 //RX_TDDRC_ALPHA_UP_2 +165 0x1000 //RX_TDDRC_ALPHA_UP_3 +166 0x1000 //RX_TDDRC_ALPHA_UP_4 +184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +190 0x7000 //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +269 0x0000 //RX_TDDRC_THRD_0 +270 0x0000 //RX_TDDRC_THRD_1 +271 0x1800 //RX_TDDRC_THRD_2 +272 0x1800 //RX_TDDRC_THRD_3 +273 0x3000 //RX_TDDRC_SLANT_0 +274 0x6E00 //RX_TDDRC_SLANT_1 +275 0x1000 //RX_TDDRC_ALPHA_UP_0 +276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x199A //RX_TDDRC_HMNC_GAIN +279 0x0001 //RX_TDDRC_SMT_FLAG +280 0x0CCD //RX_TDDRC_SMT_W +281 0x04E6 //RX_TDDRC_DRC_GAIN +195 0x001C //RX_FDEQ_SUBNUM +196 0x4840 //RX_FDEQ_GAIN_0 +197 0x4040 //RX_FDEQ_GAIN_1 +198 0x4659 //RX_FDEQ_GAIN_2 +199 0x6474 //RX_FDEQ_GAIN_3 +200 0x7A82 //RX_FDEQ_GAIN_4 +201 0x8180 //RX_FDEQ_GAIN_5 +202 0x8084 //RX_FDEQ_GAIN_6 +203 0x8A88 //RX_FDEQ_GAIN_7 +204 0x8C8C //RX_FDEQ_GAIN_8 +205 0x8A95 //RX_FDEQ_GAIN_9 +206 0x978E //RX_FDEQ_GAIN_10 +207 0x8C8C //RX_FDEQ_GAIN_11 +208 0x7068 //RX_FDEQ_GAIN_12 +209 0x6050 //RX_FDEQ_GAIN_13 +210 0x4848 //RX_FDEQ_GAIN_14 +211 0x4848 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0202 //RX_FDEQ_BIN_0 +221 0x0203 //RX_FDEQ_BIN_1 +222 0x0303 //RX_FDEQ_BIN_2 +223 0x0304 //RX_FDEQ_BIN_3 +224 0x0405 //RX_FDEQ_BIN_4 +225 0x0506 //RX_FDEQ_BIN_5 +226 0x0708 //RX_FDEQ_BIN_6 +227 0x090A //RX_FDEQ_BIN_7 +228 0x0B0C //RX_FDEQ_BIN_8 +229 0x0D0E //RX_FDEQ_BIN_9 +230 0x0E0F //RX_FDEQ_BIN_10 +231 0x0F0E //RX_FDEQ_BIN_11 +232 0x100D //RX_FDEQ_BIN_12 +233 0x110A //RX_FDEQ_BIN_13 +234 0x0000 //RX_FDEQ_BIN_14 +235 0x0000 //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x4000 //RX_FDEQ_RESRV_0 +245 0x0320 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0030 //RX_FDDRC_BAND_MARGIN_1 +248 0x0050 //RX_FDDRC_BAND_MARGIN_2 +249 0x0080 //RX_FDDRC_BAND_MARGIN_3 +250 0x0007 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x5000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x6400 //RX_FDDRC_THRD_3_2 +258 0x6400 //RX_FDDRC_THRD_3_3 +259 0x2000 //RX_FDDRC_SLANT_0_0 +260 0x2000 //RX_FDDRC_SLANT_0_1 +261 0x2000 //RX_FDDRC_SLANT_0_2 +262 0x2000 //RX_FDDRC_SLANT_0_3 +263 0x5333 //RX_FDDRC_SLANT_1_0 +264 0x5333 //RX_FDDRC_SLANT_1_1 +265 0x5333 //RX_FDDRC_SLANT_1_2 +266 0x5333 //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +286 0x0012 //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 +#VOL 2 +163 0x1000 //RX_TDDRC_ALPHA_UP_1 +164 0x1000 //RX_TDDRC_ALPHA_UP_2 +165 0x1000 //RX_TDDRC_ALPHA_UP_3 +166 0x1000 //RX_TDDRC_ALPHA_UP_4 +184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +190 0x7000 //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +269 0x0000 //RX_TDDRC_THRD_0 +270 0x0000 //RX_TDDRC_THRD_1 +271 0x1800 //RX_TDDRC_THRD_2 +272 0x1800 //RX_TDDRC_THRD_3 +273 0x3000 //RX_TDDRC_SLANT_0 +274 0x6E00 //RX_TDDRC_SLANT_1 +275 0x1000 //RX_TDDRC_ALPHA_UP_0 +276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x199A //RX_TDDRC_HMNC_GAIN +279 0x0001 //RX_TDDRC_SMT_FLAG +280 0x0CCD //RX_TDDRC_SMT_W +281 0x04E6 //RX_TDDRC_DRC_GAIN +195 0x001C //RX_FDEQ_SUBNUM +196 0x4840 //RX_FDEQ_GAIN_0 +197 0x4040 //RX_FDEQ_GAIN_1 +198 0x4659 //RX_FDEQ_GAIN_2 +199 0x6474 //RX_FDEQ_GAIN_3 +200 0x7A82 //RX_FDEQ_GAIN_4 +201 0x8180 //RX_FDEQ_GAIN_5 +202 0x8084 //RX_FDEQ_GAIN_6 +203 0x8A88 //RX_FDEQ_GAIN_7 +204 0x8C8C //RX_FDEQ_GAIN_8 +205 0x8A95 //RX_FDEQ_GAIN_9 +206 0x978E //RX_FDEQ_GAIN_10 +207 0x8C8C //RX_FDEQ_GAIN_11 +208 0x7068 //RX_FDEQ_GAIN_12 +209 0x6050 //RX_FDEQ_GAIN_13 +210 0x4848 //RX_FDEQ_GAIN_14 +211 0x4848 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0202 //RX_FDEQ_BIN_0 +221 0x0203 //RX_FDEQ_BIN_1 +222 0x0303 //RX_FDEQ_BIN_2 +223 0x0304 //RX_FDEQ_BIN_3 +224 0x0405 //RX_FDEQ_BIN_4 +225 0x0506 //RX_FDEQ_BIN_5 +226 0x0708 //RX_FDEQ_BIN_6 +227 0x090A //RX_FDEQ_BIN_7 +228 0x0B0C //RX_FDEQ_BIN_8 +229 0x0D0E //RX_FDEQ_BIN_9 +230 0x0E0F //RX_FDEQ_BIN_10 +231 0x0F0E //RX_FDEQ_BIN_11 +232 0x100D //RX_FDEQ_BIN_12 +233 0x110A //RX_FDEQ_BIN_13 +234 0x0000 //RX_FDEQ_BIN_14 +235 0x0000 //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x4000 //RX_FDEQ_RESRV_0 +245 0x0320 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0030 //RX_FDDRC_BAND_MARGIN_1 +248 0x0050 //RX_FDDRC_BAND_MARGIN_2 +249 0x0080 //RX_FDDRC_BAND_MARGIN_3 +250 0x0007 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x5000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x6400 //RX_FDDRC_THRD_3_2 +258 0x6400 //RX_FDDRC_THRD_3_3 +259 0x2000 //RX_FDDRC_SLANT_0_0 +260 0x2000 //RX_FDDRC_SLANT_0_1 +261 0x2000 //RX_FDDRC_SLANT_0_2 +262 0x2000 //RX_FDDRC_SLANT_0_3 +263 0x5333 //RX_FDDRC_SLANT_1_0 +264 0x5333 //RX_FDDRC_SLANT_1_1 +265 0x5333 //RX_FDDRC_SLANT_1_2 +266 0x5333 //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +286 0x001E //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 +#VOL 3 +163 0x1000 //RX_TDDRC_ALPHA_UP_1 +164 0x1000 //RX_TDDRC_ALPHA_UP_2 +165 0x1000 //RX_TDDRC_ALPHA_UP_3 +166 0x1000 //RX_TDDRC_ALPHA_UP_4 +184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +190 0x7000 //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +269 0x0000 //RX_TDDRC_THRD_0 +270 0x0000 //RX_TDDRC_THRD_1 +271 0x1800 //RX_TDDRC_THRD_2 +272 0x1800 //RX_TDDRC_THRD_3 +273 0x3000 //RX_TDDRC_SLANT_0 +274 0x6E00 //RX_TDDRC_SLANT_1 +275 0x1000 //RX_TDDRC_ALPHA_UP_0 +276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x199A //RX_TDDRC_HMNC_GAIN +279 0x0001 //RX_TDDRC_SMT_FLAG +280 0x0CCD //RX_TDDRC_SMT_W +281 0x04E6 //RX_TDDRC_DRC_GAIN +195 0x001C //RX_FDEQ_SUBNUM +196 0x4840 //RX_FDEQ_GAIN_0 +197 0x4040 //RX_FDEQ_GAIN_1 +198 0x4659 //RX_FDEQ_GAIN_2 +199 0x6474 //RX_FDEQ_GAIN_3 +200 0x7A82 //RX_FDEQ_GAIN_4 +201 0x8180 //RX_FDEQ_GAIN_5 +202 0x8084 //RX_FDEQ_GAIN_6 +203 0x8A88 //RX_FDEQ_GAIN_7 +204 0x8C8C //RX_FDEQ_GAIN_8 +205 0x8A95 //RX_FDEQ_GAIN_9 +206 0x978E //RX_FDEQ_GAIN_10 +207 0x8C8C //RX_FDEQ_GAIN_11 +208 0x7068 //RX_FDEQ_GAIN_12 +209 0x6050 //RX_FDEQ_GAIN_13 +210 0x4848 //RX_FDEQ_GAIN_14 +211 0x4848 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0202 //RX_FDEQ_BIN_0 +221 0x0203 //RX_FDEQ_BIN_1 +222 0x0303 //RX_FDEQ_BIN_2 +223 0x0304 //RX_FDEQ_BIN_3 +224 0x0405 //RX_FDEQ_BIN_4 +225 0x0506 //RX_FDEQ_BIN_5 +226 0x0708 //RX_FDEQ_BIN_6 +227 0x090A //RX_FDEQ_BIN_7 +228 0x0B0C //RX_FDEQ_BIN_8 +229 0x0D0E //RX_FDEQ_BIN_9 +230 0x0E0F //RX_FDEQ_BIN_10 +231 0x0F0E //RX_FDEQ_BIN_11 +232 0x100D //RX_FDEQ_BIN_12 +233 0x110A //RX_FDEQ_BIN_13 +234 0x0000 //RX_FDEQ_BIN_14 +235 0x0000 //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x4000 //RX_FDEQ_RESRV_0 +245 0x0320 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0030 //RX_FDDRC_BAND_MARGIN_1 +248 0x0050 //RX_FDDRC_BAND_MARGIN_2 +249 0x0080 //RX_FDDRC_BAND_MARGIN_3 +250 0x0007 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x5000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x6400 //RX_FDDRC_THRD_3_2 +258 0x6400 //RX_FDDRC_THRD_3_3 +259 0x2000 //RX_FDDRC_SLANT_0_0 +260 0x2000 //RX_FDDRC_SLANT_0_1 +261 0x2000 //RX_FDDRC_SLANT_0_2 +262 0x2000 //RX_FDDRC_SLANT_0_3 +263 0x5333 //RX_FDDRC_SLANT_1_0 +264 0x5333 //RX_FDDRC_SLANT_1_1 +265 0x5333 //RX_FDDRC_SLANT_1_2 +266 0x5333 //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +286 0x0031 //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 +#VOL 4 +163 0x1000 //RX_TDDRC_ALPHA_UP_1 +164 0x1000 //RX_TDDRC_ALPHA_UP_2 +165 0x1000 //RX_TDDRC_ALPHA_UP_3 +166 0x1000 //RX_TDDRC_ALPHA_UP_4 +184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +190 0x7000 //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +269 0x0000 //RX_TDDRC_THRD_0 +270 0x0000 //RX_TDDRC_THRD_1 +271 0x1800 //RX_TDDRC_THRD_2 +272 0x1800 //RX_TDDRC_THRD_3 +273 0x3000 //RX_TDDRC_SLANT_0 +274 0x6E00 //RX_TDDRC_SLANT_1 +275 0x1000 //RX_TDDRC_ALPHA_UP_0 +276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x199A //RX_TDDRC_HMNC_GAIN +279 0x0001 //RX_TDDRC_SMT_FLAG +280 0x0CCD //RX_TDDRC_SMT_W +281 0x04E6 //RX_TDDRC_DRC_GAIN +195 0x001C //RX_FDEQ_SUBNUM +196 0x4840 //RX_FDEQ_GAIN_0 +197 0x4040 //RX_FDEQ_GAIN_1 +198 0x4659 //RX_FDEQ_GAIN_2 +199 0x6474 //RX_FDEQ_GAIN_3 +200 0x7A82 //RX_FDEQ_GAIN_4 +201 0x8180 //RX_FDEQ_GAIN_5 +202 0x8084 //RX_FDEQ_GAIN_6 +203 0x8A88 //RX_FDEQ_GAIN_7 +204 0x8C8C //RX_FDEQ_GAIN_8 +205 0x8A95 //RX_FDEQ_GAIN_9 +206 0x978E //RX_FDEQ_GAIN_10 +207 0x8C8C //RX_FDEQ_GAIN_11 +208 0x7068 //RX_FDEQ_GAIN_12 +209 0x6050 //RX_FDEQ_GAIN_13 +210 0x4848 //RX_FDEQ_GAIN_14 +211 0x4848 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0202 //RX_FDEQ_BIN_0 +221 0x0203 //RX_FDEQ_BIN_1 +222 0x0303 //RX_FDEQ_BIN_2 +223 0x0304 //RX_FDEQ_BIN_3 +224 0x0405 //RX_FDEQ_BIN_4 +225 0x0506 //RX_FDEQ_BIN_5 +226 0x0708 //RX_FDEQ_BIN_6 +227 0x090A //RX_FDEQ_BIN_7 +228 0x0B0C //RX_FDEQ_BIN_8 +229 0x0D0E //RX_FDEQ_BIN_9 +230 0x0E0F //RX_FDEQ_BIN_10 +231 0x0F0E //RX_FDEQ_BIN_11 +232 0x100D //RX_FDEQ_BIN_12 +233 0x110A //RX_FDEQ_BIN_13 +234 0x0000 //RX_FDEQ_BIN_14 +235 0x0000 //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x4000 //RX_FDEQ_RESRV_0 +245 0x0320 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0030 //RX_FDDRC_BAND_MARGIN_1 +248 0x0050 //RX_FDDRC_BAND_MARGIN_2 +249 0x0080 //RX_FDDRC_BAND_MARGIN_3 +250 0x0007 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x5000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x6400 //RX_FDDRC_THRD_3_2 +258 0x6400 //RX_FDDRC_THRD_3_3 +259 0x2000 //RX_FDDRC_SLANT_0_0 +260 0x2000 //RX_FDDRC_SLANT_0_1 +261 0x2000 //RX_FDDRC_SLANT_0_2 +262 0x2000 //RX_FDDRC_SLANT_0_3 +263 0x5333 //RX_FDDRC_SLANT_1_0 +264 0x5333 //RX_FDDRC_SLANT_1_1 +265 0x5333 //RX_FDDRC_SLANT_1_2 +266 0x5333 //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +286 0x0050 //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 +#VOL 5 +163 0x1000 //RX_TDDRC_ALPHA_UP_1 +164 0x1000 //RX_TDDRC_ALPHA_UP_2 +165 0x1000 //RX_TDDRC_ALPHA_UP_3 +166 0x1000 //RX_TDDRC_ALPHA_UP_4 +184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +190 0x7000 //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +269 0x0000 //RX_TDDRC_THRD_0 +270 0x0000 //RX_TDDRC_THRD_1 +271 0x1800 //RX_TDDRC_THRD_2 +272 0x1800 //RX_TDDRC_THRD_3 +273 0x3000 //RX_TDDRC_SLANT_0 +274 0x6E00 //RX_TDDRC_SLANT_1 +275 0x1000 //RX_TDDRC_ALPHA_UP_0 +276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x199A //RX_TDDRC_HMNC_GAIN +279 0x0001 //RX_TDDRC_SMT_FLAG +280 0x0CCD //RX_TDDRC_SMT_W +281 0x04E6 //RX_TDDRC_DRC_GAIN +195 0x001C //RX_FDEQ_SUBNUM +196 0x4840 //RX_FDEQ_GAIN_0 +197 0x4040 //RX_FDEQ_GAIN_1 +198 0x4659 //RX_FDEQ_GAIN_2 +199 0x6474 //RX_FDEQ_GAIN_3 +200 0x7A82 //RX_FDEQ_GAIN_4 +201 0x8180 //RX_FDEQ_GAIN_5 +202 0x8084 //RX_FDEQ_GAIN_6 +203 0x8A88 //RX_FDEQ_GAIN_7 +204 0x8C8C //RX_FDEQ_GAIN_8 +205 0x8A95 //RX_FDEQ_GAIN_9 +206 0x978E //RX_FDEQ_GAIN_10 +207 0x8C8C //RX_FDEQ_GAIN_11 +208 0x7068 //RX_FDEQ_GAIN_12 +209 0x6050 //RX_FDEQ_GAIN_13 +210 0x4848 //RX_FDEQ_GAIN_14 +211 0x4848 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0202 //RX_FDEQ_BIN_0 +221 0x0203 //RX_FDEQ_BIN_1 +222 0x0303 //RX_FDEQ_BIN_2 +223 0x0304 //RX_FDEQ_BIN_3 +224 0x0405 //RX_FDEQ_BIN_4 +225 0x0506 //RX_FDEQ_BIN_5 +226 0x0708 //RX_FDEQ_BIN_6 +227 0x090A //RX_FDEQ_BIN_7 +228 0x0B0C //RX_FDEQ_BIN_8 +229 0x0D0E //RX_FDEQ_BIN_9 +230 0x0E0F //RX_FDEQ_BIN_10 +231 0x0F0E //RX_FDEQ_BIN_11 +232 0x100D //RX_FDEQ_BIN_12 +233 0x110A //RX_FDEQ_BIN_13 +234 0x0000 //RX_FDEQ_BIN_14 +235 0x0000 //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x4000 //RX_FDEQ_RESRV_0 +245 0x0320 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0030 //RX_FDDRC_BAND_MARGIN_1 +248 0x0050 //RX_FDDRC_BAND_MARGIN_2 +249 0x0080 //RX_FDDRC_BAND_MARGIN_3 +250 0x0007 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x5000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x6400 //RX_FDDRC_THRD_3_2 +258 0x6400 //RX_FDDRC_THRD_3_3 +259 0x2000 //RX_FDDRC_SLANT_0_0 +260 0x2000 //RX_FDDRC_SLANT_0_1 +261 0x2000 //RX_FDDRC_SLANT_0_2 +262 0x2000 //RX_FDDRC_SLANT_0_3 +263 0x5333 //RX_FDDRC_SLANT_1_0 +264 0x5333 //RX_FDDRC_SLANT_1_1 +265 0x5333 //RX_FDDRC_SLANT_1_2 +266 0x5333 //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +286 0x0086 //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 +#VOL 6 +163 0x1000 //RX_TDDRC_ALPHA_UP_1 +164 0x1000 //RX_TDDRC_ALPHA_UP_2 +165 0x1000 //RX_TDDRC_ALPHA_UP_3 +166 0x1000 //RX_TDDRC_ALPHA_UP_4 +184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +190 0x7000 //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +269 0x0000 //RX_TDDRC_THRD_0 +270 0x0000 //RX_TDDRC_THRD_1 +271 0x1800 //RX_TDDRC_THRD_2 +272 0x1800 //RX_TDDRC_THRD_3 +273 0x3000 //RX_TDDRC_SLANT_0 +274 0x6E00 //RX_TDDRC_SLANT_1 +275 0x1000 //RX_TDDRC_ALPHA_UP_0 +276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x199A //RX_TDDRC_HMNC_GAIN +279 0x0001 //RX_TDDRC_SMT_FLAG +280 0x0CCD //RX_TDDRC_SMT_W +281 0x04E6 //RX_TDDRC_DRC_GAIN +195 0x001C //RX_FDEQ_SUBNUM +196 0x4840 //RX_FDEQ_GAIN_0 +197 0x4040 //RX_FDEQ_GAIN_1 +198 0x4659 //RX_FDEQ_GAIN_2 +199 0x6474 //RX_FDEQ_GAIN_3 +200 0x7A82 //RX_FDEQ_GAIN_4 +201 0x8180 //RX_FDEQ_GAIN_5 +202 0x8084 //RX_FDEQ_GAIN_6 +203 0x8A88 //RX_FDEQ_GAIN_7 +204 0x8C8C //RX_FDEQ_GAIN_8 +205 0x8A95 //RX_FDEQ_GAIN_9 +206 0x978E //RX_FDEQ_GAIN_10 +207 0x8C8C //RX_FDEQ_GAIN_11 +208 0x7068 //RX_FDEQ_GAIN_12 +209 0x6050 //RX_FDEQ_GAIN_13 +210 0x4848 //RX_FDEQ_GAIN_14 +211 0x4848 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0202 //RX_FDEQ_BIN_0 +221 0x0203 //RX_FDEQ_BIN_1 +222 0x0303 //RX_FDEQ_BIN_2 +223 0x0304 //RX_FDEQ_BIN_3 +224 0x0405 //RX_FDEQ_BIN_4 +225 0x0506 //RX_FDEQ_BIN_5 +226 0x0708 //RX_FDEQ_BIN_6 +227 0x090A //RX_FDEQ_BIN_7 +228 0x0B0C //RX_FDEQ_BIN_8 +229 0x0D0E //RX_FDEQ_BIN_9 +230 0x0E0F //RX_FDEQ_BIN_10 +231 0x0F0E //RX_FDEQ_BIN_11 +232 0x100D //RX_FDEQ_BIN_12 +233 0x110A //RX_FDEQ_BIN_13 +234 0x0000 //RX_FDEQ_BIN_14 +235 0x0000 //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x4000 //RX_FDEQ_RESRV_0 +245 0x0320 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0030 //RX_FDDRC_BAND_MARGIN_1 +248 0x0050 //RX_FDDRC_BAND_MARGIN_2 +249 0x0080 //RX_FDDRC_BAND_MARGIN_3 +250 0x0007 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x5000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x6400 //RX_FDDRC_THRD_3_2 +258 0x6400 //RX_FDDRC_THRD_3_3 +259 0x2000 //RX_FDDRC_SLANT_0_0 +260 0x2000 //RX_FDDRC_SLANT_0_1 +261 0x2000 //RX_FDDRC_SLANT_0_2 +262 0x2000 //RX_FDDRC_SLANT_0_3 +263 0x5333 //RX_FDDRC_SLANT_1_0 +264 0x5333 //RX_FDDRC_SLANT_1_1 +265 0x5333 //RX_FDDRC_SLANT_1_2 +266 0x5333 //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +286 0x0100 //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 #CASE_NAME HANDSET-HANDSET-VOICE_GENERIC-SWB -#PARAM_TYPE TX+RX -#TOTAL_CUSTOM_STEP 7 +#PARAM_MODE FULL +#PARAM_TYPE TX+2RX +#TOTAL_CUSTOM_STEP 7+7 #TX 0 0x0000 //TX_OPERATION_MODE_0 1 0x0000 //TX_OPERATION_MODE_1 -2 0x0026 //TX_PATCH_REG +2 0x0076 //TX_PATCH_REG 3 0x6F7E //TX_SENDFUNC_MODE_0 4 0x0001 //TX_SENDFUNC_MODE_1 5 0x0002 //TX_NUM_MIC @@ -8793,7 +13379,7 @@ 18 0x0000 //TX_SYS_RESRV_2 19 0x0000 //TX_SYS_RESRV_3 20 0x0000 //TX_DIST2REF0 -21 0x00A4 //TX_DIST2REF1 +21 0x00A3 //TX_DIST2REF1 22 0x0000 //TX_DIST2REF_02 23 0x0000 //TX_DIST2REF_03 24 0x0000 //TX_DIST2REF_04 @@ -9023,12 +13609,12 @@ 248 0xF800 //TX_THR_SN_EST_6 249 0xF700 //TX_THR_SN_EST_7 250 0x0000 //TX_DELTA_THR_SN_EST_0 -251 0x0100 //TX_DELTA_THR_SN_EST_1 +251 0x0200 //TX_DELTA_THR_SN_EST_1 252 0x0200 //TX_DELTA_THR_SN_EST_2 253 0x0200 //TX_DELTA_THR_SN_EST_3 -254 0x0200 //TX_DELTA_THR_SN_EST_4 -255 0x0100 //TX_DELTA_THR_SN_EST_5 -256 0x0200 //TX_DELTA_THR_SN_EST_6 +254 0x0100 //TX_DELTA_THR_SN_EST_4 +255 0x0200 //TX_DELTA_THR_SN_EST_5 +256 0x0100 //TX_DELTA_THR_SN_EST_6 257 0x0200 //TX_DELTA_THR_SN_EST_7 258 0x4000 //TX_LAMBDA_NN_EST_0 259 0x4000 //TX_LAMBDA_NN_EST_1 @@ -9054,18 +13640,18 @@ 279 0x1000 //TX_B_POST_FLT_0 280 0x1000 //TX_B_POST_FLT_1 281 0x0014 //TX_NS_LVL_CTRL_0 -282 0x0016 //TX_NS_LVL_CTRL_1 -283 0x002C //TX_NS_LVL_CTRL_2 -284 0x0016 //TX_NS_LVL_CTRL_3 -285 0x0018 //TX_NS_LVL_CTRL_4 -286 0x0016 //TX_NS_LVL_CTRL_5 -287 0x0012 //TX_NS_LVL_CTRL_6 +282 0x002C //TX_NS_LVL_CTRL_1 +283 0x0016 //TX_NS_LVL_CTRL_2 +284 0x0018 //TX_NS_LVL_CTRL_3 +285 0x0016 //TX_NS_LVL_CTRL_4 +286 0x0012 //TX_NS_LVL_CTRL_5 +287 0x0016 //TX_NS_LVL_CTRL_6 288 0x0017 //TX_NS_LVL_CTRL_7 289 0x000E //TX_MIN_GAIN_S_0 -290 0x0012 //TX_MIN_GAIN_S_1 -291 0x000D //TX_MIN_GAIN_S_2 -292 0x0012 //TX_MIN_GAIN_S_3 -293 0x0010 //TX_MIN_GAIN_S_4 +290 0x000D //TX_MIN_GAIN_S_1 +291 0x0012 //TX_MIN_GAIN_S_2 +292 0x0010 //TX_MIN_GAIN_S_3 +293 0x0012 //TX_MIN_GAIN_S_4 294 0x0012 //TX_MIN_GAIN_S_5 295 0x0012 //TX_MIN_GAIN_S_6 296 0x0012 //TX_MIN_GAIN_S_7 @@ -9087,29 +13673,29 @@ 312 0x7FFF //TX_A_POST_FILT_0 313 0x2000 //TX_A_POST_FILT_1 314 0x4000 //TX_A_POST_FILT_S_0 -315 0x5000 //TX_A_POST_FILT_S_1 +315 0x4000 //TX_A_POST_FILT_S_1 316 0x4000 //TX_A_POST_FILT_S_2 317 0x4000 //TX_A_POST_FILT_S_3 318 0x4000 //TX_A_POST_FILT_S_4 319 0x4000 //TX_A_POST_FILT_S_5 -320 0x4000 //TX_A_POST_FILT_S_6 +320 0x5000 //TX_A_POST_FILT_S_6 321 0x7000 //TX_A_POST_FILT_S_7 322 0x1000 //TX_B_POST_FILT_0 323 0x1000 //TX_B_POST_FILT_1 -324 0x3000 //TX_B_POST_FILT_2 -325 0x1000 //TX_B_POST_FILT_3 -326 0x5000 //TX_B_POST_FILT_4 -327 0x2000 //TX_B_POST_FILT_5 -328 0x6000 //TX_B_POST_FILT_6 +324 0x2000 //TX_B_POST_FILT_2 +325 0x2000 //TX_B_POST_FILT_3 +326 0x2000 //TX_B_POST_FILT_4 +327 0x1000 //TX_B_POST_FILT_5 +328 0x3000 //TX_B_POST_FILT_6 329 0x3000 //TX_B_POST_FILT_7 330 0x1000 //TX_B_LESSCUT_RTO_S_0 -331 0x6000 //TX_B_LESSCUT_RTO_S_1 -332 0x6000 //TX_B_LESSCUT_RTO_S_2 -333 0x6000 //TX_B_LESSCUT_RTO_S_3 -334 0x6000 //TX_B_LESSCUT_RTO_S_4 -335 0x6000 //TX_B_LESSCUT_RTO_S_5 -336 0x7FFF //TX_B_LESSCUT_RTO_S_6 -337 0x7FFF //TX_B_LESSCUT_RTO_S_7 +331 0x1000 //TX_B_LESSCUT_RTO_S_1 +332 0x1000 //TX_B_LESSCUT_RTO_S_2 +333 0x1000 //TX_B_LESSCUT_RTO_S_3 +334 0x1000 //TX_B_LESSCUT_RTO_S_4 +335 0x1000 //TX_B_LESSCUT_RTO_S_5 +336 0x1000 //TX_B_LESSCUT_RTO_S_6 +337 0x1000 //TX_B_LESSCUT_RTO_S_7 338 0x7E14 //TX_LAMBDA_PFILT 339 0x7C29 //TX_LAMBDA_PFILT_S_0 340 0x7C29 //TX_LAMBDA_PFILT_S_1 @@ -9152,10 +13738,10 @@ 377 0x4E20 //TX_NOISE_TH_5_4 378 0x1194 //TX_NOISE_TH_6 379 0x0014 //TX_MINENOISE_TH -380 0x4000 //TX_MINENOISE_MIC0_TH_MTS -381 0xFFEE //TX_MINENOISE_MIC0_TH_EXP -382 0x6000 //TX_MINENOISE_MIC0_S_TH_MTS -383 0xFFF3 //TX_MINENOISE_MIC0_S_TH_EXP +380 0xD508 //TX_MORENS_TFMASK_TH +381 0x0001 //TX_DRC_QUIET_FLOOR +382 0x6D60 //TX_RATIODTL_CUT_TH +383 0x0DAC //TX_DT_CUT_K1 384 0x00A5 //TX_OUT_ENER_S_TH_CLEAN 385 0x00A5 //TX_OUT_ENER_S_TH_LESSCLEAN 386 0x00A5 //TX_OUT_ENER_S_TH_NOISY @@ -9163,15 +13749,15 @@ 388 0x0200 //TX_OUT_ENER_TH_SPEECH 389 0x2000 //TX_SN_NPB_GAIN 390 0x0000 //TX_NN_NPB_GAIN -391 0x0000 //TX_CSX_ALPHA_0 -392 0x0000 //TX_CSX_ALPHA_1 -393 0x0000 //TX_CSX_ALPHA_2 -394 0x0000 //TX_CSX_ALPHA_3 -395 0x0800 //TX_MU_ARSP_EST -396 0x00C8 //TX_P_OUTBEAM_MIN_TH +391 0x3000 //TX_POST_MASK_SUP_HSNE +392 0x07D0 //TX_TAIL_DET_TH +393 0x4000 //TX_B_LESSCUT_RTO_WTA +394 0x0000 //TX_MEL_G_R +395 0x0080 //TX_SUPHIGH_TH +396 0x0000 //TX_MASK_G_R 397 0x0002 //TX_EXTRA_NS_L -398 0x0800 //TX_EXTRA_NS_A -399 0x0005 //TX_VR_NOISE_FLOOR_TH +398 0x1800 //TX_C_POST_FLT_MASK +399 0x7FFF //TX_A_POST_FLT_WNS 400 0x0148 //TX_MIN_G_LOW300HZ 401 0x0004 //TX_MAXLEVEL_CNG 402 0x00B4 //TX_STN_NOISE_TH @@ -9286,16 +13872,16 @@ 511 0x6666 //TX_MIC_TO_BFGAIN 512 0x0000 //TX_MICTOBFGAIN0 513 0x0000 //TX_FASTMUE_TH -514 0x0000 //TX_DERVB_LEN_0 -515 0x0000 //TX_DERVB_LEN_1 -516 0x0000 //TX_RHO_DERVB -517 0x0000 //TX_MIC_INDX_DERVB -518 0x0000 //TX_MU_DERVB -519 0x0000 //TX_DR_RESRV_0 -520 0x0000 //TX_DR_RESRV_1 -521 0x0000 //TX_DR_RESRV_2 -522 0x0000 //TX_DR_RESRV_3 -523 0x0000 //TX_DR_RESRV_4 +514 0x2CCC //TX_DEREVERB_LF_MU +515 0x3200 //TX_DEREVERB_HF_MU +516 0x0007 //TX_DEREVERB_DELAY +517 0x0004 //TX_DEREVERB_COEF_LEN +518 0x0003 //TX_DEREVERB_DNR +519 0x0000 //TX_DEREVERB_ALPHA +520 0x0000 //TX_DEREVERB_BETA +521 0x3A98 //TX_GSC_RTOL_TH +522 0x3A98 //TX_GSC_RTOH_TH +523 0x7E2C //TX_WIDE2_MEANHTH 524 0x0000 //TX_DR_RESRV_5 525 0x0000 //TX_DR_RESRV_6 526 0x0000 //TX_DR_RESRV_7 @@ -9339,23 +13925,23 @@ 564 0x0000 //TX_PB_RESRV_0 565 0x0000 //TX_PB_RESRV_1 566 0x0030 //TX_FDEQ_SUBNUM -567 0x5C54 //TX_FDEQ_GAIN_0 +567 0x5C58 //TX_FDEQ_GAIN_0 568 0x5048 //TX_FDEQ_GAIN_1 569 0x4C4C //TX_FDEQ_GAIN_2 570 0x494D //TX_FDEQ_GAIN_3 571 0x4442 //TX_FDEQ_GAIN_4 -572 0x4448 //TX_FDEQ_GAIN_5 -573 0x4C53 //TX_FDEQ_GAIN_6 -574 0x6244 //TX_FDEQ_GAIN_7 +572 0x444C //TX_FDEQ_GAIN_5 +573 0x5053 //TX_FDEQ_GAIN_6 +574 0x6248 //TX_FDEQ_GAIN_7 575 0x434A //TX_FDEQ_GAIN_8 576 0x4B4D //TX_FDEQ_GAIN_9 577 0x4C4B //TX_FDEQ_GAIN_10 -578 0x5652 //TX_FDEQ_GAIN_11 -579 0x5252 //TX_FDEQ_GAIN_12 -580 0x5458 //TX_FDEQ_GAIN_13 -581 0x686E //TX_FDEQ_GAIN_14 -582 0x8089 //TX_FDEQ_GAIN_15 -583 0x4848 //TX_FDEQ_GAIN_16 +578 0x4E4A //TX_FDEQ_GAIN_11 +579 0x4842 //TX_FDEQ_GAIN_12 +580 0x4C44 //TX_FDEQ_GAIN_13 +581 0x3A4A //TX_FDEQ_GAIN_14 +582 0x6478 //TX_FDEQ_GAIN_15 +583 0x5848 //TX_FDEQ_GAIN_16 584 0x4848 //TX_FDEQ_GAIN_17 585 0x4848 //TX_FDEQ_GAIN_18 586 0x4848 //TX_FDEQ_GAIN_19 @@ -9375,9 +13961,9 @@ 600 0x0F0F //TX_FDEQ_BIN_9 601 0x0E0D //TX_FDEQ_BIN_10 602 0x0F28 //TX_FDEQ_BIN_11 -603 0x111B //TX_FDEQ_BIN_12 -604 0x291E //TX_FDEQ_BIN_13 -605 0x1E10 //TX_FDEQ_BIN_14 +603 0x110F //TX_FDEQ_BIN_12 +604 0x350F //TX_FDEQ_BIN_13 +605 0x1924 //TX_FDEQ_BIN_14 606 0x1810 //TX_FDEQ_BIN_15 607 0x1021 //TX_FDEQ_BIN_16 608 0x1000 //TX_FDEQ_BIN_17 @@ -9444,16 +14030,16 @@ 669 0x4848 //TX_PREEQ_GAIN_MIC1_3 670 0x4848 //TX_PREEQ_GAIN_MIC1_4 671 0x4848 //TX_PREEQ_GAIN_MIC1_5 -672 0x4848 //TX_PREEQ_GAIN_MIC1_6 -673 0x484A //TX_PREEQ_GAIN_MIC1_7 -674 0x4C4E //TX_PREEQ_GAIN_MIC1_8 -675 0x4F50 //TX_PREEQ_GAIN_MIC1_9 -676 0x5356 //TX_PREEQ_GAIN_MIC1_10 -677 0x575B //TX_PREEQ_GAIN_MIC1_11 -678 0x6470 //TX_PREEQ_GAIN_MIC1_12 -679 0x725D //TX_PREEQ_GAIN_MIC1_13 -680 0x5148 //TX_PREEQ_GAIN_MIC1_14 -681 0x3836 //TX_PREEQ_GAIN_MIC1_15 +672 0x494A //TX_PREEQ_GAIN_MIC1_6 +673 0x4B4C //TX_PREEQ_GAIN_MIC1_7 +674 0x4D4E //TX_PREEQ_GAIN_MIC1_8 +675 0x4F52 //TX_PREEQ_GAIN_MIC1_9 +676 0x5355 //TX_PREEQ_GAIN_MIC1_10 +677 0x585C //TX_PREEQ_GAIN_MIC1_11 +678 0x616A //TX_PREEQ_GAIN_MIC1_12 +679 0x726E //TX_PREEQ_GAIN_MIC1_13 +680 0x5C48 //TX_PREEQ_GAIN_MIC1_14 +681 0x3B38 //TX_PREEQ_GAIN_MIC1_15 682 0x4848 //TX_PREEQ_GAIN_MIC1_16 683 0x4848 //TX_PREEQ_GAIN_MIC1_17 684 0x4848 //TX_PREEQ_GAIN_MIC1_18 @@ -9638,7 +14224,7 @@ 863 0x199A //TX_TDDRC_HMNC_GAIN 864 0x0000 //TX_TDDRC_SMT_FLAG 865 0x0CCD //TX_TDDRC_SMT_W -866 0x0550 //TX_TDDRC_DRC_GAIN +866 0x06EC //TX_TDDRC_DRC_GAIN 867 0x7FFF //TX_TDDRC_LMT_THRD 868 0x0000 //TX_TDDRC_LMT_ALPHA 869 0x0000 //TX_TFMASKLTH @@ -9669,8 +14255,73 @@ 894 0xC000 //TX_FASTNS_SSA_THHFL 895 0xCCCC //TX_FASTNS_SSA_THLFH 896 0xD999 //TX_FASTNS_SSA_THHFH +897 0x2339 //TX_SENDFUNC_REG_MICMUTE +898 0x0021 //TX_SENDFUNC_REG_MICMUTE1 +899 0x02BC //TX_MICMUTE_RATIO_THR +900 0x0140 //TX_MICMUTE_AMP_THR +901 0x0004 //TX_MICMUTE_HPF_IND +902 0x00C0 //TX_MICMUTE_LOG_EYR_TH +903 0x0008 //TX_MICMUTE_CVG_TIME +904 0x0008 //TX_MICMUTE_RELEASE_TIME +905 0x01FE //TX_MIC_VOLUME_MIC0MUTE +906 0x0020 //TX_MICMUTE_EPD_OFFSET_0 +907 0x001E //TX_MICMUTE_FRQ_AEC_L +908 0x7999 //TX_MICMUTE_EAD_THR +909 0x7FFF //TX_MICMUTE_LAMBDA_CB_NLE +910 0x7FFF //TX_MICMUTE_LAMBDA_RE_EST +911 0x4000 //TX_DTD_THR1_MICMUTE_0 +912 0x7000 //TX_DTD_THR1_MICMUTE_1 +913 0x7FFF //TX_DTD_THR1_MICMUTE_2 +914 0x7FFF //TX_DTD_THR1_MICMUTE_3 +915 0x6CCC //TX_DTD_THR2_MICMUTE_0 +916 0x0400 //TX_MICMUTE_MIN_EQ_RE_EST_0 +917 0x0400 //TX_MICMUTE_MIN_EQ_RE_EST_1 +918 0x1000 //TX_MICMUTE_MIN_EQ_RE_EST_2 +919 0x7FFF //TX_MICMUTE_MIN_EQ_RE_EST_3 +920 0x7FFF //TX_MICMUTE_MIN_EQ_RE_EST_4 +921 0x4000 //TX_MICMUTE_C_POST_FLT +922 0x03E8 //TX_MICMUTE_DT_CUT_K +923 0x0001 //TX_MICMUTE_DT_CUT_THR +924 0x03E8 //TX_MICMUTE_DT_CUT_K2 +925 0x0001 //TX_MICMUTE_DT_CUT_THR2 +926 0x0064 //TX_MICMUTE_DT2_HOLD_N +927 0x1000 //TX_MICMUTE_RATIODTH_THCUT +928 0x1000 //TX_MICMUTE_B_POST_FLT_ECHOL +929 0x7FFF //TX_MICMUTE_B_POST_FLT_ECHOH +930 0x0400 //TX_MICMUTE_C_POST_FLT_MASK +931 0x7999 //TX_MICMUTE_RATIODTL_CUT_TH +932 0x0258 //TX_MICMUTE_DT_CUT_K1 +933 0x0800 //TX_MICMUTE_N2_SN_EST +934 0xFC00 //TX_MICMUTE_THR_SN_EST_0 +935 0x001C //TX_MICMUTE_MIN_G_CTRL_0 +936 0x6000 //TX_MICMUTE_A_POST_FILT_S_0 +937 0x7000 //TX_MICMUTE_B_POST_FILT_0 +938 0x2710 //TX_MIC1RUB_AMP_THR +939 0x0010 //TX_MIC1MUTE_RATIO_THR +940 0x0450 //TX_MIC1MUTE_AMP_THR +941 0x0008 //TX_MIC1MUTE_CVG_TIME +942 0x0008 //TX_MIC1MUTE_RELEASE_TIME +943 0x0000 //TX_AMS_RESRV_01 +944 0x0000 //TX_AMS_RESRV_02 +945 0x0000 //TX_AMS_RESRV_03 +946 0x0000 //TX_AMS_RESRV_04 +947 0x0000 //TX_AMS_RESRV_05 +948 0x0000 //TX_AMS_RESRV_06 +949 0x0000 //TX_AMS_RESRV_07 +950 0x0000 //TX_AMS_RESRV_08 +951 0x0000 //TX_AMS_RESRV_09 +952 0x0000 //TX_AMS_RESRV_10 +953 0x0000 //TX_AMS_RESRV_11 +954 0x0000 //TX_AMS_RESRV_12 +955 0x0000 //TX_AMS_RESRV_13 +956 0x0000 //TX_AMS_RESRV_14 +957 0x0000 //TX_AMS_RESRV_15 +958 0x0000 //TX_AMS_RESRV_16 +959 0x0000 //TX_AMS_RESRV_17 +960 0x0000 //TX_AMS_RESRV_18 +961 0x0000 //TX_AMS_RESRV_19 #RX -0 0x003C //RX_RECVFUNC_MODE_0 +0 0x203C //RX_RECVFUNC_MODE_0 1 0x0000 //RX_RECVFUNC_MODE_1 2 0x0003 //RX_SAMPLINGFREQ_SIG 3 0x0003 //RX_SAMPLINGFREQ_PROC @@ -9711,15 +14362,15 @@ 38 0x0020 //RX_FDEQ_SUBNUM 39 0x483E //RX_FDEQ_GAIN_0 40 0x3E3E //RX_FDEQ_GAIN_1 -41 0x3E4C //RX_FDEQ_GAIN_2 -42 0x5064 //RX_FDEQ_GAIN_3 -43 0x7076 //RX_FDEQ_GAIN_4 -44 0x897A //RX_FDEQ_GAIN_5 -45 0x7C80 //RX_FDEQ_GAIN_6 +41 0x3E4A //RX_FDEQ_GAIN_2 +42 0x5464 //RX_FDEQ_GAIN_3 +43 0x7072 //RX_FDEQ_GAIN_4 +44 0x8576 //RX_FDEQ_GAIN_5 +45 0x7880 //RX_FDEQ_GAIN_6 46 0x8888 //RX_FDEQ_GAIN_7 47 0x949C //RX_FDEQ_GAIN_8 48 0x96A4 //RX_FDEQ_GAIN_9 -49 0xA9A0 //RX_FDEQ_GAIN_10 +49 0xA994 //RX_FDEQ_GAIN_10 50 0x9487 //RX_FDEQ_GAIN_11 51 0x6F64 //RX_FDEQ_GAIN_12 52 0x625A //RX_FDEQ_GAIN_13 @@ -9736,7 +14387,7 @@ 63 0x0202 //RX_FDEQ_BIN_0 64 0x0202 //RX_FDEQ_BIN_1 65 0x0301 //RX_FDEQ_BIN_2 -66 0x0404 //RX_FDEQ_BIN_3 +66 0x0503 //RX_FDEQ_BIN_3 67 0x0406 //RX_FDEQ_BIN_4 68 0x0109 //RX_FDEQ_BIN_5 69 0x0708 //RX_FDEQ_BIN_6 @@ -9794,7 +14445,7 @@ 121 0x199A //RX_TDDRC_HMNC_GAIN 122 0x0001 //RX_TDDRC_SMT_FLAG 123 0x0CCD //RX_TDDRC_SMT_W -124 0x0551 //RX_TDDRC_DRC_GAIN +124 0x057F //RX_TDDRC_DRC_GAIN 125 0x7C00 //RX_LAMBDA_PKA_FP 126 0x13E0 //RX_TPKA_FP 127 0x0080 //RX_MIN_G_FP @@ -9850,19 +14501,19 @@ 121 0x199A //RX_TDDRC_HMNC_GAIN 122 0x0001 //RX_TDDRC_SMT_FLAG 123 0x0CCD //RX_TDDRC_SMT_W -124 0x0551 //RX_TDDRC_DRC_GAIN +124 0x057F //RX_TDDRC_DRC_GAIN 38 0x0020 //RX_FDEQ_SUBNUM 39 0x483E //RX_FDEQ_GAIN_0 40 0x3E3E //RX_FDEQ_GAIN_1 -41 0x3E4C //RX_FDEQ_GAIN_2 -42 0x5064 //RX_FDEQ_GAIN_3 -43 0x7076 //RX_FDEQ_GAIN_4 -44 0x897A //RX_FDEQ_GAIN_5 -45 0x7C80 //RX_FDEQ_GAIN_6 +41 0x3E4A //RX_FDEQ_GAIN_2 +42 0x5464 //RX_FDEQ_GAIN_3 +43 0x7072 //RX_FDEQ_GAIN_4 +44 0x8576 //RX_FDEQ_GAIN_5 +45 0x7880 //RX_FDEQ_GAIN_6 46 0x8888 //RX_FDEQ_GAIN_7 47 0x949C //RX_FDEQ_GAIN_8 48 0x96A4 //RX_FDEQ_GAIN_9 -49 0xA9A0 //RX_FDEQ_GAIN_10 +49 0xA994 //RX_FDEQ_GAIN_10 50 0x9487 //RX_FDEQ_GAIN_11 51 0x6F64 //RX_FDEQ_GAIN_12 52 0x625A //RX_FDEQ_GAIN_13 @@ -9879,7 +14530,7 @@ 63 0x0202 //RX_FDEQ_BIN_0 64 0x0202 //RX_FDEQ_BIN_1 65 0x0301 //RX_FDEQ_BIN_2 -66 0x0404 //RX_FDEQ_BIN_3 +66 0x0503 //RX_FDEQ_BIN_3 67 0x0406 //RX_FDEQ_BIN_4 68 0x0109 //RX_FDEQ_BIN_5 69 0x0708 //RX_FDEQ_BIN_6 @@ -9949,19 +14600,19 @@ 121 0x199A //RX_TDDRC_HMNC_GAIN 122 0x0001 //RX_TDDRC_SMT_FLAG 123 0x0CCD //RX_TDDRC_SMT_W -124 0x0551 //RX_TDDRC_DRC_GAIN +124 0x057F //RX_TDDRC_DRC_GAIN 38 0x0020 //RX_FDEQ_SUBNUM 39 0x483E //RX_FDEQ_GAIN_0 40 0x3E3E //RX_FDEQ_GAIN_1 -41 0x3E4C //RX_FDEQ_GAIN_2 -42 0x5064 //RX_FDEQ_GAIN_3 -43 0x7076 //RX_FDEQ_GAIN_4 -44 0x897A //RX_FDEQ_GAIN_5 -45 0x7C80 //RX_FDEQ_GAIN_6 +41 0x3E4A //RX_FDEQ_GAIN_2 +42 0x5464 //RX_FDEQ_GAIN_3 +43 0x7072 //RX_FDEQ_GAIN_4 +44 0x8576 //RX_FDEQ_GAIN_5 +45 0x7880 //RX_FDEQ_GAIN_6 46 0x8888 //RX_FDEQ_GAIN_7 47 0x949C //RX_FDEQ_GAIN_8 48 0x96A4 //RX_FDEQ_GAIN_9 -49 0xA9A0 //RX_FDEQ_GAIN_10 +49 0xA994 //RX_FDEQ_GAIN_10 50 0x9487 //RX_FDEQ_GAIN_11 51 0x6F64 //RX_FDEQ_GAIN_12 52 0x625A //RX_FDEQ_GAIN_13 @@ -9978,7 +14629,7 @@ 63 0x0202 //RX_FDEQ_BIN_0 64 0x0202 //RX_FDEQ_BIN_1 65 0x0301 //RX_FDEQ_BIN_2 -66 0x0404 //RX_FDEQ_BIN_3 +66 0x0503 //RX_FDEQ_BIN_3 67 0x0406 //RX_FDEQ_BIN_4 68 0x0109 //RX_FDEQ_BIN_5 69 0x0708 //RX_FDEQ_BIN_6 @@ -10048,19 +14699,19 @@ 121 0x199A //RX_TDDRC_HMNC_GAIN 122 0x0001 //RX_TDDRC_SMT_FLAG 123 0x0CCD //RX_TDDRC_SMT_W -124 0x0551 //RX_TDDRC_DRC_GAIN +124 0x057F //RX_TDDRC_DRC_GAIN 38 0x0020 //RX_FDEQ_SUBNUM 39 0x483E //RX_FDEQ_GAIN_0 40 0x3E3E //RX_FDEQ_GAIN_1 -41 0x3E4C //RX_FDEQ_GAIN_2 -42 0x5064 //RX_FDEQ_GAIN_3 -43 0x7076 //RX_FDEQ_GAIN_4 -44 0x897A //RX_FDEQ_GAIN_5 -45 0x7C80 //RX_FDEQ_GAIN_6 +41 0x3E4A //RX_FDEQ_GAIN_2 +42 0x5464 //RX_FDEQ_GAIN_3 +43 0x7072 //RX_FDEQ_GAIN_4 +44 0x8576 //RX_FDEQ_GAIN_5 +45 0x7880 //RX_FDEQ_GAIN_6 46 0x8888 //RX_FDEQ_GAIN_7 47 0x949C //RX_FDEQ_GAIN_8 48 0x96A4 //RX_FDEQ_GAIN_9 -49 0xA9A0 //RX_FDEQ_GAIN_10 +49 0xA994 //RX_FDEQ_GAIN_10 50 0x9487 //RX_FDEQ_GAIN_11 51 0x6F64 //RX_FDEQ_GAIN_12 52 0x625A //RX_FDEQ_GAIN_13 @@ -10077,7 +14728,7 @@ 63 0x0202 //RX_FDEQ_BIN_0 64 0x0202 //RX_FDEQ_BIN_1 65 0x0301 //RX_FDEQ_BIN_2 -66 0x0404 //RX_FDEQ_BIN_3 +66 0x0503 //RX_FDEQ_BIN_3 67 0x0406 //RX_FDEQ_BIN_4 68 0x0109 //RX_FDEQ_BIN_5 69 0x0708 //RX_FDEQ_BIN_6 @@ -10147,19 +14798,19 @@ 121 0x199A //RX_TDDRC_HMNC_GAIN 122 0x0001 //RX_TDDRC_SMT_FLAG 123 0x0CCD //RX_TDDRC_SMT_W -124 0x0551 //RX_TDDRC_DRC_GAIN +124 0x057F //RX_TDDRC_DRC_GAIN 38 0x0020 //RX_FDEQ_SUBNUM 39 0x483E //RX_FDEQ_GAIN_0 40 0x3E3E //RX_FDEQ_GAIN_1 -41 0x3E4C //RX_FDEQ_GAIN_2 -42 0x5064 //RX_FDEQ_GAIN_3 -43 0x7076 //RX_FDEQ_GAIN_4 -44 0x897A //RX_FDEQ_GAIN_5 -45 0x7C80 //RX_FDEQ_GAIN_6 +41 0x3E4A //RX_FDEQ_GAIN_2 +42 0x5464 //RX_FDEQ_GAIN_3 +43 0x7072 //RX_FDEQ_GAIN_4 +44 0x8576 //RX_FDEQ_GAIN_5 +45 0x7880 //RX_FDEQ_GAIN_6 46 0x8888 //RX_FDEQ_GAIN_7 47 0x949C //RX_FDEQ_GAIN_8 48 0x96A4 //RX_FDEQ_GAIN_9 -49 0xA9A0 //RX_FDEQ_GAIN_10 +49 0xA994 //RX_FDEQ_GAIN_10 50 0x9487 //RX_FDEQ_GAIN_11 51 0x6F64 //RX_FDEQ_GAIN_12 52 0x625A //RX_FDEQ_GAIN_13 @@ -10176,7 +14827,7 @@ 63 0x0202 //RX_FDEQ_BIN_0 64 0x0202 //RX_FDEQ_BIN_1 65 0x0301 //RX_FDEQ_BIN_2 -66 0x0404 //RX_FDEQ_BIN_3 +66 0x0503 //RX_FDEQ_BIN_3 67 0x0406 //RX_FDEQ_BIN_4 68 0x0109 //RX_FDEQ_BIN_5 69 0x0708 //RX_FDEQ_BIN_6 @@ -10246,19 +14897,19 @@ 121 0x199A //RX_TDDRC_HMNC_GAIN 122 0x0001 //RX_TDDRC_SMT_FLAG 123 0x0CCD //RX_TDDRC_SMT_W -124 0x0551 //RX_TDDRC_DRC_GAIN +124 0x057F //RX_TDDRC_DRC_GAIN 38 0x0020 //RX_FDEQ_SUBNUM 39 0x483E //RX_FDEQ_GAIN_0 40 0x3E3E //RX_FDEQ_GAIN_1 -41 0x3E4C //RX_FDEQ_GAIN_2 -42 0x5064 //RX_FDEQ_GAIN_3 -43 0x7076 //RX_FDEQ_GAIN_4 -44 0x897A //RX_FDEQ_GAIN_5 -45 0x7C80 //RX_FDEQ_GAIN_6 +41 0x3E4A //RX_FDEQ_GAIN_2 +42 0x5464 //RX_FDEQ_GAIN_3 +43 0x7072 //RX_FDEQ_GAIN_4 +44 0x8576 //RX_FDEQ_GAIN_5 +45 0x7880 //RX_FDEQ_GAIN_6 46 0x8888 //RX_FDEQ_GAIN_7 47 0x949C //RX_FDEQ_GAIN_8 48 0x96A4 //RX_FDEQ_GAIN_9 -49 0xA9A0 //RX_FDEQ_GAIN_10 +49 0xA994 //RX_FDEQ_GAIN_10 50 0x9487 //RX_FDEQ_GAIN_11 51 0x6F64 //RX_FDEQ_GAIN_12 52 0x625A //RX_FDEQ_GAIN_13 @@ -10275,7 +14926,7 @@ 63 0x0202 //RX_FDEQ_BIN_0 64 0x0202 //RX_FDEQ_BIN_1 65 0x0301 //RX_FDEQ_BIN_2 -66 0x0404 //RX_FDEQ_BIN_3 +66 0x0503 //RX_FDEQ_BIN_3 67 0x0406 //RX_FDEQ_BIN_4 68 0x0109 //RX_FDEQ_BIN_5 69 0x0708 //RX_FDEQ_BIN_6 @@ -10345,19 +14996,19 @@ 121 0x199A //RX_TDDRC_HMNC_GAIN 122 0x0001 //RX_TDDRC_SMT_FLAG 123 0x0CCD //RX_TDDRC_SMT_W -124 0x0551 //RX_TDDRC_DRC_GAIN +124 0x057F //RX_TDDRC_DRC_GAIN 38 0x0020 //RX_FDEQ_SUBNUM 39 0x483E //RX_FDEQ_GAIN_0 40 0x3E3E //RX_FDEQ_GAIN_1 -41 0x3E4C //RX_FDEQ_GAIN_2 -42 0x5064 //RX_FDEQ_GAIN_3 -43 0x7076 //RX_FDEQ_GAIN_4 -44 0x897A //RX_FDEQ_GAIN_5 -45 0x7C80 //RX_FDEQ_GAIN_6 +41 0x3E4A //RX_FDEQ_GAIN_2 +42 0x5464 //RX_FDEQ_GAIN_3 +43 0x7072 //RX_FDEQ_GAIN_4 +44 0x8576 //RX_FDEQ_GAIN_5 +45 0x7880 //RX_FDEQ_GAIN_6 46 0x8888 //RX_FDEQ_GAIN_7 47 0x949C //RX_FDEQ_GAIN_8 48 0x96A4 //RX_FDEQ_GAIN_9 -49 0xA9A0 //RX_FDEQ_GAIN_10 +49 0xA994 //RX_FDEQ_GAIN_10 50 0x9487 //RX_FDEQ_GAIN_11 51 0x6F64 //RX_FDEQ_GAIN_12 52 0x625A //RX_FDEQ_GAIN_13 @@ -10374,7 +15025,7 @@ 63 0x0202 //RX_FDEQ_BIN_0 64 0x0202 //RX_FDEQ_BIN_1 65 0x0301 //RX_FDEQ_BIN_2 -66 0x0404 //RX_FDEQ_BIN_3 +66 0x0503 //RX_FDEQ_BIN_3 67 0x0406 //RX_FDEQ_BIN_4 68 0x0109 //RX_FDEQ_BIN_5 69 0x0708 //RX_FDEQ_BIN_6 @@ -10444,19 +15095,19 @@ 121 0x199A //RX_TDDRC_HMNC_GAIN 122 0x0001 //RX_TDDRC_SMT_FLAG 123 0x0CCD //RX_TDDRC_SMT_W -124 0x0551 //RX_TDDRC_DRC_GAIN +124 0x057F //RX_TDDRC_DRC_GAIN 38 0x0020 //RX_FDEQ_SUBNUM 39 0x483E //RX_FDEQ_GAIN_0 40 0x3E3E //RX_FDEQ_GAIN_1 -41 0x3E4C //RX_FDEQ_GAIN_2 -42 0x5064 //RX_FDEQ_GAIN_3 -43 0x7076 //RX_FDEQ_GAIN_4 -44 0x897A //RX_FDEQ_GAIN_5 -45 0x7C80 //RX_FDEQ_GAIN_6 +41 0x3E4A //RX_FDEQ_GAIN_2 +42 0x5464 //RX_FDEQ_GAIN_3 +43 0x7072 //RX_FDEQ_GAIN_4 +44 0x8576 //RX_FDEQ_GAIN_5 +45 0x7880 //RX_FDEQ_GAIN_6 46 0x8888 //RX_FDEQ_GAIN_7 47 0x949C //RX_FDEQ_GAIN_8 48 0x96A4 //RX_FDEQ_GAIN_9 -49 0xA9A0 //RX_FDEQ_GAIN_10 +49 0xA994 //RX_FDEQ_GAIN_10 50 0x9487 //RX_FDEQ_GAIN_11 51 0x6F64 //RX_FDEQ_GAIN_12 52 0x625A //RX_FDEQ_GAIN_13 @@ -10473,7 +15124,7 @@ 63 0x0202 //RX_FDEQ_BIN_0 64 0x0202 //RX_FDEQ_BIN_1 65 0x0301 //RX_FDEQ_BIN_2 -66 0x0404 //RX_FDEQ_BIN_3 +66 0x0503 //RX_FDEQ_BIN_3 67 0x0406 //RX_FDEQ_BIN_4 68 0x0109 //RX_FDEQ_BIN_5 69 0x0708 //RX_FDEQ_BIN_6 @@ -10520,10 +15171,862 @@ 110 0x0000 //RX_FDDRC_RESRV_0 129 0x0100 //RX_SPK_VOL 130 0x0000 //RX_VOL_RESRV_0 +#RX 2 +157 0x003C //RX_RECVFUNC_MODE_0 +158 0x0000 //RX_RECVFUNC_MODE_1 +159 0x0003 //RX_SAMPLINGFREQ_SIG +160 0x0003 //RX_SAMPLINGFREQ_PROC +161 0x000A //RX_FRAME_SZ +162 0x0000 //RX_DELAY_OPT +163 0x1000 //RX_TDDRC_ALPHA_UP_1 +164 0x1000 //RX_TDDRC_ALPHA_UP_2 +165 0x1000 //RX_TDDRC_ALPHA_UP_3 +166 0x1000 //RX_TDDRC_ALPHA_UP_4 +167 0x05AA //RX_PGA +168 0x7FFF //RX_A_HP +169 0x4000 //RX_B_PE +170 0x5800 //RX_THR_PITCH_DET_0 +171 0x5000 //RX_THR_PITCH_DET_1 +172 0x4000 //RX_THR_PITCH_DET_2 +173 0x0008 //RX_PITCH_BFR_LEN +174 0x0003 //RX_SBD_PITCH_DET +175 0x0100 //RX_PP_RESRV_0 +176 0x0020 //RX_PP_RESRV_1 +177 0x0600 //RX_N_SN_EST +178 0x000C //RX_N2_SN_EST +179 0x000F //RX_NS_LVL_CTRL +180 0xF800 //RX_THR_SN_EST +181 0x7E00 //RX_LAMBDA_PFILT +182 0x000A //RX_FENS_RESRV_0 +183 0x0190 //RX_FENS_RESRV_1 +184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +187 0x0002 //RX_EXTRA_NS_L +188 0x0800 //RX_EXTRA_NS_A +189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +190 0x7000 //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +192 0x199A //RX_A_POST_FLT +193 0x0000 //RX_LMT_THRD +194 0x4000 //RX_LMT_ALPHA +195 0x0020 //RX_FDEQ_SUBNUM +196 0x483E //RX_FDEQ_GAIN_0 +197 0x3E3E //RX_FDEQ_GAIN_1 +198 0x3E4C //RX_FDEQ_GAIN_2 +199 0x5064 //RX_FDEQ_GAIN_3 +200 0x7076 //RX_FDEQ_GAIN_4 +201 0x897A //RX_FDEQ_GAIN_5 +202 0x7C80 //RX_FDEQ_GAIN_6 +203 0x8888 //RX_FDEQ_GAIN_7 +204 0x949C //RX_FDEQ_GAIN_8 +205 0x96A4 //RX_FDEQ_GAIN_9 +206 0xA9A0 //RX_FDEQ_GAIN_10 +207 0x9487 //RX_FDEQ_GAIN_11 +208 0x6F64 //RX_FDEQ_GAIN_12 +209 0x625A //RX_FDEQ_GAIN_13 +210 0x5D80 //RX_FDEQ_GAIN_14 +211 0x8890 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0202 //RX_FDEQ_BIN_0 +221 0x0202 //RX_FDEQ_BIN_1 +222 0x0301 //RX_FDEQ_BIN_2 +223 0x0404 //RX_FDEQ_BIN_3 +224 0x0406 //RX_FDEQ_BIN_4 +225 0x0109 //RX_FDEQ_BIN_5 +226 0x0708 //RX_FDEQ_BIN_6 +227 0x090A //RX_FDEQ_BIN_7 +228 0x0B0C //RX_FDEQ_BIN_8 +229 0x0D0E //RX_FDEQ_BIN_9 +230 0x1013 //RX_FDEQ_BIN_10 +231 0x1719 //RX_FDEQ_BIN_11 +232 0x1B0F //RX_FDEQ_BIN_12 +233 0x141E //RX_FDEQ_BIN_13 +234 0x3728 //RX_FDEQ_BIN_14 +235 0x282C //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x4000 //RX_FDEQ_RESRV_0 +245 0x0320 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0030 //RX_FDDRC_BAND_MARGIN_1 +248 0x0050 //RX_FDDRC_BAND_MARGIN_2 +249 0x0080 //RX_FDDRC_BAND_MARGIN_3 +250 0x0007 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x5000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x6400 //RX_FDDRC_THRD_3_2 +258 0x6400 //RX_FDDRC_THRD_3_3 +259 0x2000 //RX_FDDRC_SLANT_0_0 +260 0x2000 //RX_FDDRC_SLANT_0_1 +261 0x2000 //RX_FDDRC_SLANT_0_2 +262 0x2000 //RX_FDDRC_SLANT_0_3 +263 0x5333 //RX_FDDRC_SLANT_1_0 +264 0x5333 //RX_FDDRC_SLANT_1_1 +265 0x5333 //RX_FDDRC_SLANT_1_2 +266 0x5333 //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +268 0x0002 //RX_FILTINDX +269 0x0001 //RX_TDDRC_THRD_0 +270 0x0002 //RX_TDDRC_THRD_1 +271 0x1800 //RX_TDDRC_THRD_2 +272 0x1800 //RX_TDDRC_THRD_3 +273 0x7FFF //RX_TDDRC_SLANT_0 +274 0x7FFF //RX_TDDRC_SLANT_1 +275 0x1000 //RX_TDDRC_ALPHA_UP_0 +276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x199A //RX_TDDRC_HMNC_GAIN +279 0x0001 //RX_TDDRC_SMT_FLAG +280 0x0CCD //RX_TDDRC_SMT_W +281 0x0551 //RX_TDDRC_DRC_GAIN +282 0x7C00 //RX_LAMBDA_PKA_FP +283 0x13E0 //RX_TPKA_FP +284 0x0080 //RX_MIN_G_FP +285 0x2000 //RX_MAX_G_FP +286 0x0100 //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 +288 0x0000 //RX_MAXLEVEL_CNG +289 0x3000 //RX_BWE_UV_TH +290 0x3000 //RX_BWE_UV_TH2 +291 0x1800 //RX_BWE_UV_TH3 +292 0x1000 //RX_BWE_V_TH +293 0x04CD //RX_BWE_GAIN1_V_TH1 +294 0x0F33 //RX_BWE_GAIN1_V_TH2 +295 0x7333 //RX_BWE_UV_EQ +296 0x199A //RX_BWE_V_EQ +297 0x7333 //RX_BWE_TONE_TH +298 0x0004 //RX_BWE_UV_HOLD_T +299 0x6CCD //RX_BWE_GAIN2_ALPHA +300 0x799A //RX_BWE_GAIN3_ALPHA +301 0x001E //RX_BWE_CUTOFF +302 0x3000 //RX_BWE_GAINFILL +303 0x3200 //RX_BWE_MAXTH_TONE +304 0x2000 //RX_BWE_EQ_0 +305 0x2000 //RX_BWE_EQ_1 +306 0x2000 //RX_BWE_EQ_2 +307 0x2000 //RX_BWE_EQ_3 +308 0x2000 //RX_BWE_EQ_4 +309 0x2000 //RX_BWE_EQ_5 +310 0x2000 //RX_BWE_EQ_6 +311 0x0000 //RX_BWE_RESRV_0 +312 0x0000 //RX_BWE_RESRV_1 +313 0x0000 //RX_BWE_RESRV_2 +#VOL 0 +163 0x1000 //RX_TDDRC_ALPHA_UP_1 +164 0x1000 //RX_TDDRC_ALPHA_UP_2 +165 0x1000 //RX_TDDRC_ALPHA_UP_3 +166 0x1000 //RX_TDDRC_ALPHA_UP_4 +184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +190 0x7000 //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +269 0x0001 //RX_TDDRC_THRD_0 +270 0x0002 //RX_TDDRC_THRD_1 +271 0x1800 //RX_TDDRC_THRD_2 +272 0x1800 //RX_TDDRC_THRD_3 +273 0x7FFF //RX_TDDRC_SLANT_0 +274 0x7FFF //RX_TDDRC_SLANT_1 +275 0x1000 //RX_TDDRC_ALPHA_UP_0 +276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x199A //RX_TDDRC_HMNC_GAIN +279 0x0001 //RX_TDDRC_SMT_FLAG +280 0x0CCD //RX_TDDRC_SMT_W +281 0x0551 //RX_TDDRC_DRC_GAIN +195 0x0020 //RX_FDEQ_SUBNUM +196 0x483E //RX_FDEQ_GAIN_0 +197 0x3E3E //RX_FDEQ_GAIN_1 +198 0x3E4C //RX_FDEQ_GAIN_2 +199 0x5064 //RX_FDEQ_GAIN_3 +200 0x7076 //RX_FDEQ_GAIN_4 +201 0x897A //RX_FDEQ_GAIN_5 +202 0x7C80 //RX_FDEQ_GAIN_6 +203 0x8888 //RX_FDEQ_GAIN_7 +204 0x949C //RX_FDEQ_GAIN_8 +205 0x96A4 //RX_FDEQ_GAIN_9 +206 0xA9A0 //RX_FDEQ_GAIN_10 +207 0x9487 //RX_FDEQ_GAIN_11 +208 0x6F64 //RX_FDEQ_GAIN_12 +209 0x625A //RX_FDEQ_GAIN_13 +210 0x5D80 //RX_FDEQ_GAIN_14 +211 0x8890 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0202 //RX_FDEQ_BIN_0 +221 0x0202 //RX_FDEQ_BIN_1 +222 0x0301 //RX_FDEQ_BIN_2 +223 0x0404 //RX_FDEQ_BIN_3 +224 0x0406 //RX_FDEQ_BIN_4 +225 0x0109 //RX_FDEQ_BIN_5 +226 0x0708 //RX_FDEQ_BIN_6 +227 0x090A //RX_FDEQ_BIN_7 +228 0x0B0C //RX_FDEQ_BIN_8 +229 0x0D0E //RX_FDEQ_BIN_9 +230 0x1013 //RX_FDEQ_BIN_10 +231 0x1719 //RX_FDEQ_BIN_11 +232 0x1B0F //RX_FDEQ_BIN_12 +233 0x141E //RX_FDEQ_BIN_13 +234 0x3728 //RX_FDEQ_BIN_14 +235 0x282C //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x4000 //RX_FDEQ_RESRV_0 +245 0x0320 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0030 //RX_FDDRC_BAND_MARGIN_1 +248 0x0050 //RX_FDDRC_BAND_MARGIN_2 +249 0x0080 //RX_FDDRC_BAND_MARGIN_3 +250 0x0007 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x5000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x6400 //RX_FDDRC_THRD_3_2 +258 0x6400 //RX_FDDRC_THRD_3_3 +259 0x2000 //RX_FDDRC_SLANT_0_0 +260 0x2000 //RX_FDDRC_SLANT_0_1 +261 0x2000 //RX_FDDRC_SLANT_0_2 +262 0x2000 //RX_FDDRC_SLANT_0_3 +263 0x5333 //RX_FDDRC_SLANT_1_0 +264 0x5333 //RX_FDDRC_SLANT_1_1 +265 0x5333 //RX_FDDRC_SLANT_1_2 +266 0x5333 //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +286 0x000A //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 +#VOL 1 +163 0x1000 //RX_TDDRC_ALPHA_UP_1 +164 0x1000 //RX_TDDRC_ALPHA_UP_2 +165 0x1000 //RX_TDDRC_ALPHA_UP_3 +166 0x1000 //RX_TDDRC_ALPHA_UP_4 +184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +190 0x7000 //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +269 0x0001 //RX_TDDRC_THRD_0 +270 0x0002 //RX_TDDRC_THRD_1 +271 0x1800 //RX_TDDRC_THRD_2 +272 0x1800 //RX_TDDRC_THRD_3 +273 0x7FFF //RX_TDDRC_SLANT_0 +274 0x7FFF //RX_TDDRC_SLANT_1 +275 0x1000 //RX_TDDRC_ALPHA_UP_0 +276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x199A //RX_TDDRC_HMNC_GAIN +279 0x0001 //RX_TDDRC_SMT_FLAG +280 0x0CCD //RX_TDDRC_SMT_W +281 0x0551 //RX_TDDRC_DRC_GAIN +195 0x0020 //RX_FDEQ_SUBNUM +196 0x483E //RX_FDEQ_GAIN_0 +197 0x3E3E //RX_FDEQ_GAIN_1 +198 0x3E4C //RX_FDEQ_GAIN_2 +199 0x5064 //RX_FDEQ_GAIN_3 +200 0x7076 //RX_FDEQ_GAIN_4 +201 0x897A //RX_FDEQ_GAIN_5 +202 0x7C80 //RX_FDEQ_GAIN_6 +203 0x8888 //RX_FDEQ_GAIN_7 +204 0x949C //RX_FDEQ_GAIN_8 +205 0x96A4 //RX_FDEQ_GAIN_9 +206 0xA9A0 //RX_FDEQ_GAIN_10 +207 0x9487 //RX_FDEQ_GAIN_11 +208 0x6F64 //RX_FDEQ_GAIN_12 +209 0x625A //RX_FDEQ_GAIN_13 +210 0x5D80 //RX_FDEQ_GAIN_14 +211 0x8890 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0202 //RX_FDEQ_BIN_0 +221 0x0202 //RX_FDEQ_BIN_1 +222 0x0301 //RX_FDEQ_BIN_2 +223 0x0404 //RX_FDEQ_BIN_3 +224 0x0406 //RX_FDEQ_BIN_4 +225 0x0109 //RX_FDEQ_BIN_5 +226 0x0708 //RX_FDEQ_BIN_6 +227 0x090A //RX_FDEQ_BIN_7 +228 0x0B0C //RX_FDEQ_BIN_8 +229 0x0D0E //RX_FDEQ_BIN_9 +230 0x1013 //RX_FDEQ_BIN_10 +231 0x1719 //RX_FDEQ_BIN_11 +232 0x1B0F //RX_FDEQ_BIN_12 +233 0x141E //RX_FDEQ_BIN_13 +234 0x3728 //RX_FDEQ_BIN_14 +235 0x282C //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x4000 //RX_FDEQ_RESRV_0 +245 0x0320 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0030 //RX_FDDRC_BAND_MARGIN_1 +248 0x0050 //RX_FDDRC_BAND_MARGIN_2 +249 0x0080 //RX_FDDRC_BAND_MARGIN_3 +250 0x0007 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x5000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x6400 //RX_FDDRC_THRD_3_2 +258 0x6400 //RX_FDDRC_THRD_3_3 +259 0x2000 //RX_FDDRC_SLANT_0_0 +260 0x2000 //RX_FDDRC_SLANT_0_1 +261 0x2000 //RX_FDDRC_SLANT_0_2 +262 0x2000 //RX_FDDRC_SLANT_0_3 +263 0x5333 //RX_FDDRC_SLANT_1_0 +264 0x5333 //RX_FDDRC_SLANT_1_1 +265 0x5333 //RX_FDDRC_SLANT_1_2 +266 0x5333 //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +286 0x0010 //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 +#VOL 2 +163 0x1000 //RX_TDDRC_ALPHA_UP_1 +164 0x1000 //RX_TDDRC_ALPHA_UP_2 +165 0x1000 //RX_TDDRC_ALPHA_UP_3 +166 0x1000 //RX_TDDRC_ALPHA_UP_4 +184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +190 0x7000 //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +269 0x0001 //RX_TDDRC_THRD_0 +270 0x0002 //RX_TDDRC_THRD_1 +271 0x1800 //RX_TDDRC_THRD_2 +272 0x1800 //RX_TDDRC_THRD_3 +273 0x7FFF //RX_TDDRC_SLANT_0 +274 0x7FFF //RX_TDDRC_SLANT_1 +275 0x1000 //RX_TDDRC_ALPHA_UP_0 +276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x199A //RX_TDDRC_HMNC_GAIN +279 0x0001 //RX_TDDRC_SMT_FLAG +280 0x0CCD //RX_TDDRC_SMT_W +281 0x0551 //RX_TDDRC_DRC_GAIN +195 0x0020 //RX_FDEQ_SUBNUM +196 0x483E //RX_FDEQ_GAIN_0 +197 0x3E3E //RX_FDEQ_GAIN_1 +198 0x3E4C //RX_FDEQ_GAIN_2 +199 0x5064 //RX_FDEQ_GAIN_3 +200 0x7076 //RX_FDEQ_GAIN_4 +201 0x897A //RX_FDEQ_GAIN_5 +202 0x7C80 //RX_FDEQ_GAIN_6 +203 0x8888 //RX_FDEQ_GAIN_7 +204 0x949C //RX_FDEQ_GAIN_8 +205 0x96A4 //RX_FDEQ_GAIN_9 +206 0xA9A0 //RX_FDEQ_GAIN_10 +207 0x9487 //RX_FDEQ_GAIN_11 +208 0x6F64 //RX_FDEQ_GAIN_12 +209 0x625A //RX_FDEQ_GAIN_13 +210 0x5D80 //RX_FDEQ_GAIN_14 +211 0x8890 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0202 //RX_FDEQ_BIN_0 +221 0x0202 //RX_FDEQ_BIN_1 +222 0x0301 //RX_FDEQ_BIN_2 +223 0x0404 //RX_FDEQ_BIN_3 +224 0x0406 //RX_FDEQ_BIN_4 +225 0x0109 //RX_FDEQ_BIN_5 +226 0x0708 //RX_FDEQ_BIN_6 +227 0x090A //RX_FDEQ_BIN_7 +228 0x0B0C //RX_FDEQ_BIN_8 +229 0x0D0E //RX_FDEQ_BIN_9 +230 0x1013 //RX_FDEQ_BIN_10 +231 0x1719 //RX_FDEQ_BIN_11 +232 0x1B0F //RX_FDEQ_BIN_12 +233 0x141E //RX_FDEQ_BIN_13 +234 0x3728 //RX_FDEQ_BIN_14 +235 0x282C //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x4000 //RX_FDEQ_RESRV_0 +245 0x0320 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0030 //RX_FDDRC_BAND_MARGIN_1 +248 0x0050 //RX_FDDRC_BAND_MARGIN_2 +249 0x0080 //RX_FDDRC_BAND_MARGIN_3 +250 0x0007 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x5000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x6400 //RX_FDDRC_THRD_3_2 +258 0x6400 //RX_FDDRC_THRD_3_3 +259 0x2000 //RX_FDDRC_SLANT_0_0 +260 0x2000 //RX_FDDRC_SLANT_0_1 +261 0x2000 //RX_FDDRC_SLANT_0_2 +262 0x2000 //RX_FDDRC_SLANT_0_3 +263 0x5333 //RX_FDDRC_SLANT_1_0 +264 0x5333 //RX_FDDRC_SLANT_1_1 +265 0x5333 //RX_FDDRC_SLANT_1_2 +266 0x5333 //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +286 0x001B //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 +#VOL 3 +163 0x1000 //RX_TDDRC_ALPHA_UP_1 +164 0x1000 //RX_TDDRC_ALPHA_UP_2 +165 0x1000 //RX_TDDRC_ALPHA_UP_3 +166 0x1000 //RX_TDDRC_ALPHA_UP_4 +184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +190 0x7000 //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +269 0x0001 //RX_TDDRC_THRD_0 +270 0x0002 //RX_TDDRC_THRD_1 +271 0x1800 //RX_TDDRC_THRD_2 +272 0x1800 //RX_TDDRC_THRD_3 +273 0x7FFF //RX_TDDRC_SLANT_0 +274 0x7FFF //RX_TDDRC_SLANT_1 +275 0x1000 //RX_TDDRC_ALPHA_UP_0 +276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x199A //RX_TDDRC_HMNC_GAIN +279 0x0001 //RX_TDDRC_SMT_FLAG +280 0x0CCD //RX_TDDRC_SMT_W +281 0x0551 //RX_TDDRC_DRC_GAIN +195 0x0020 //RX_FDEQ_SUBNUM +196 0x483E //RX_FDEQ_GAIN_0 +197 0x3E3E //RX_FDEQ_GAIN_1 +198 0x3E4C //RX_FDEQ_GAIN_2 +199 0x5064 //RX_FDEQ_GAIN_3 +200 0x7076 //RX_FDEQ_GAIN_4 +201 0x897A //RX_FDEQ_GAIN_5 +202 0x7C80 //RX_FDEQ_GAIN_6 +203 0x8888 //RX_FDEQ_GAIN_7 +204 0x949C //RX_FDEQ_GAIN_8 +205 0x96A4 //RX_FDEQ_GAIN_9 +206 0xA9A0 //RX_FDEQ_GAIN_10 +207 0x9487 //RX_FDEQ_GAIN_11 +208 0x6F64 //RX_FDEQ_GAIN_12 +209 0x625A //RX_FDEQ_GAIN_13 +210 0x5D80 //RX_FDEQ_GAIN_14 +211 0x8890 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0202 //RX_FDEQ_BIN_0 +221 0x0202 //RX_FDEQ_BIN_1 +222 0x0301 //RX_FDEQ_BIN_2 +223 0x0404 //RX_FDEQ_BIN_3 +224 0x0406 //RX_FDEQ_BIN_4 +225 0x0109 //RX_FDEQ_BIN_5 +226 0x0708 //RX_FDEQ_BIN_6 +227 0x090A //RX_FDEQ_BIN_7 +228 0x0B0C //RX_FDEQ_BIN_8 +229 0x0D0E //RX_FDEQ_BIN_9 +230 0x1013 //RX_FDEQ_BIN_10 +231 0x1719 //RX_FDEQ_BIN_11 +232 0x1B0F //RX_FDEQ_BIN_12 +233 0x141E //RX_FDEQ_BIN_13 +234 0x3728 //RX_FDEQ_BIN_14 +235 0x282C //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x4000 //RX_FDEQ_RESRV_0 +245 0x0320 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0030 //RX_FDDRC_BAND_MARGIN_1 +248 0x0050 //RX_FDDRC_BAND_MARGIN_2 +249 0x0080 //RX_FDDRC_BAND_MARGIN_3 +250 0x0007 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x5000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x6400 //RX_FDDRC_THRD_3_2 +258 0x6400 //RX_FDDRC_THRD_3_3 +259 0x2000 //RX_FDDRC_SLANT_0_0 +260 0x2000 //RX_FDDRC_SLANT_0_1 +261 0x2000 //RX_FDDRC_SLANT_0_2 +262 0x2000 //RX_FDDRC_SLANT_0_3 +263 0x5333 //RX_FDDRC_SLANT_1_0 +264 0x5333 //RX_FDDRC_SLANT_1_1 +265 0x5333 //RX_FDDRC_SLANT_1_2 +266 0x5333 //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +286 0x0032 //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 +#VOL 4 +163 0x1000 //RX_TDDRC_ALPHA_UP_1 +164 0x1000 //RX_TDDRC_ALPHA_UP_2 +165 0x1000 //RX_TDDRC_ALPHA_UP_3 +166 0x1000 //RX_TDDRC_ALPHA_UP_4 +184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +190 0x7000 //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +269 0x0001 //RX_TDDRC_THRD_0 +270 0x0002 //RX_TDDRC_THRD_1 +271 0x1800 //RX_TDDRC_THRD_2 +272 0x1800 //RX_TDDRC_THRD_3 +273 0x7FFF //RX_TDDRC_SLANT_0 +274 0x7FFF //RX_TDDRC_SLANT_1 +275 0x1000 //RX_TDDRC_ALPHA_UP_0 +276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x199A //RX_TDDRC_HMNC_GAIN +279 0x0001 //RX_TDDRC_SMT_FLAG +280 0x0CCD //RX_TDDRC_SMT_W +281 0x0551 //RX_TDDRC_DRC_GAIN +195 0x0020 //RX_FDEQ_SUBNUM +196 0x483E //RX_FDEQ_GAIN_0 +197 0x3E3E //RX_FDEQ_GAIN_1 +198 0x3E4C //RX_FDEQ_GAIN_2 +199 0x5064 //RX_FDEQ_GAIN_3 +200 0x7076 //RX_FDEQ_GAIN_4 +201 0x897A //RX_FDEQ_GAIN_5 +202 0x7C80 //RX_FDEQ_GAIN_6 +203 0x8888 //RX_FDEQ_GAIN_7 +204 0x949C //RX_FDEQ_GAIN_8 +205 0x96A4 //RX_FDEQ_GAIN_9 +206 0xA9A0 //RX_FDEQ_GAIN_10 +207 0x9487 //RX_FDEQ_GAIN_11 +208 0x6F64 //RX_FDEQ_GAIN_12 +209 0x625A //RX_FDEQ_GAIN_13 +210 0x5D80 //RX_FDEQ_GAIN_14 +211 0x8890 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0202 //RX_FDEQ_BIN_0 +221 0x0202 //RX_FDEQ_BIN_1 +222 0x0301 //RX_FDEQ_BIN_2 +223 0x0404 //RX_FDEQ_BIN_3 +224 0x0406 //RX_FDEQ_BIN_4 +225 0x0109 //RX_FDEQ_BIN_5 +226 0x0708 //RX_FDEQ_BIN_6 +227 0x090A //RX_FDEQ_BIN_7 +228 0x0B0C //RX_FDEQ_BIN_8 +229 0x0D0E //RX_FDEQ_BIN_9 +230 0x1013 //RX_FDEQ_BIN_10 +231 0x1719 //RX_FDEQ_BIN_11 +232 0x1B0F //RX_FDEQ_BIN_12 +233 0x141E //RX_FDEQ_BIN_13 +234 0x3728 //RX_FDEQ_BIN_14 +235 0x282C //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x4000 //RX_FDEQ_RESRV_0 +245 0x0320 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0030 //RX_FDDRC_BAND_MARGIN_1 +248 0x0050 //RX_FDDRC_BAND_MARGIN_2 +249 0x0080 //RX_FDDRC_BAND_MARGIN_3 +250 0x0007 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x5000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x6400 //RX_FDDRC_THRD_3_2 +258 0x6400 //RX_FDDRC_THRD_3_3 +259 0x2000 //RX_FDDRC_SLANT_0_0 +260 0x2000 //RX_FDDRC_SLANT_0_1 +261 0x2000 //RX_FDDRC_SLANT_0_2 +262 0x2000 //RX_FDDRC_SLANT_0_3 +263 0x5333 //RX_FDDRC_SLANT_1_0 +264 0x5333 //RX_FDDRC_SLANT_1_1 +265 0x5333 //RX_FDDRC_SLANT_1_2 +266 0x5333 //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +286 0x0047 //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 +#VOL 5 +163 0x1000 //RX_TDDRC_ALPHA_UP_1 +164 0x1000 //RX_TDDRC_ALPHA_UP_2 +165 0x1000 //RX_TDDRC_ALPHA_UP_3 +166 0x1000 //RX_TDDRC_ALPHA_UP_4 +184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +190 0x7000 //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +269 0x0001 //RX_TDDRC_THRD_0 +270 0x0002 //RX_TDDRC_THRD_1 +271 0x1800 //RX_TDDRC_THRD_2 +272 0x1800 //RX_TDDRC_THRD_3 +273 0x7FFF //RX_TDDRC_SLANT_0 +274 0x7FFF //RX_TDDRC_SLANT_1 +275 0x1000 //RX_TDDRC_ALPHA_UP_0 +276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x199A //RX_TDDRC_HMNC_GAIN +279 0x0001 //RX_TDDRC_SMT_FLAG +280 0x0CCD //RX_TDDRC_SMT_W +281 0x0551 //RX_TDDRC_DRC_GAIN +195 0x0020 //RX_FDEQ_SUBNUM +196 0x483E //RX_FDEQ_GAIN_0 +197 0x3E3E //RX_FDEQ_GAIN_1 +198 0x3E4C //RX_FDEQ_GAIN_2 +199 0x5064 //RX_FDEQ_GAIN_3 +200 0x7076 //RX_FDEQ_GAIN_4 +201 0x897A //RX_FDEQ_GAIN_5 +202 0x7C80 //RX_FDEQ_GAIN_6 +203 0x8888 //RX_FDEQ_GAIN_7 +204 0x949C //RX_FDEQ_GAIN_8 +205 0x96A4 //RX_FDEQ_GAIN_9 +206 0xA9A0 //RX_FDEQ_GAIN_10 +207 0x9487 //RX_FDEQ_GAIN_11 +208 0x6F64 //RX_FDEQ_GAIN_12 +209 0x625A //RX_FDEQ_GAIN_13 +210 0x5D80 //RX_FDEQ_GAIN_14 +211 0x8890 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0202 //RX_FDEQ_BIN_0 +221 0x0202 //RX_FDEQ_BIN_1 +222 0x0301 //RX_FDEQ_BIN_2 +223 0x0404 //RX_FDEQ_BIN_3 +224 0x0406 //RX_FDEQ_BIN_4 +225 0x0109 //RX_FDEQ_BIN_5 +226 0x0708 //RX_FDEQ_BIN_6 +227 0x090A //RX_FDEQ_BIN_7 +228 0x0B0C //RX_FDEQ_BIN_8 +229 0x0D0E //RX_FDEQ_BIN_9 +230 0x1013 //RX_FDEQ_BIN_10 +231 0x1719 //RX_FDEQ_BIN_11 +232 0x1B0F //RX_FDEQ_BIN_12 +233 0x141E //RX_FDEQ_BIN_13 +234 0x3728 //RX_FDEQ_BIN_14 +235 0x282C //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x4000 //RX_FDEQ_RESRV_0 +245 0x0320 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0030 //RX_FDDRC_BAND_MARGIN_1 +248 0x0050 //RX_FDDRC_BAND_MARGIN_2 +249 0x0080 //RX_FDDRC_BAND_MARGIN_3 +250 0x0007 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x5000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x6400 //RX_FDDRC_THRD_3_2 +258 0x6400 //RX_FDDRC_THRD_3_3 +259 0x2000 //RX_FDDRC_SLANT_0_0 +260 0x2000 //RX_FDDRC_SLANT_0_1 +261 0x2000 //RX_FDDRC_SLANT_0_2 +262 0x2000 //RX_FDDRC_SLANT_0_3 +263 0x5333 //RX_FDDRC_SLANT_1_0 +264 0x5333 //RX_FDDRC_SLANT_1_1 +265 0x5333 //RX_FDDRC_SLANT_1_2 +266 0x5333 //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +286 0x0076 //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 +#VOL 6 +163 0x1000 //RX_TDDRC_ALPHA_UP_1 +164 0x1000 //RX_TDDRC_ALPHA_UP_2 +165 0x1000 //RX_TDDRC_ALPHA_UP_3 +166 0x1000 //RX_TDDRC_ALPHA_UP_4 +184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +190 0x7000 //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +269 0x0001 //RX_TDDRC_THRD_0 +270 0x0002 //RX_TDDRC_THRD_1 +271 0x1800 //RX_TDDRC_THRD_2 +272 0x1800 //RX_TDDRC_THRD_3 +273 0x7FFF //RX_TDDRC_SLANT_0 +274 0x7FFF //RX_TDDRC_SLANT_1 +275 0x1000 //RX_TDDRC_ALPHA_UP_0 +276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x199A //RX_TDDRC_HMNC_GAIN +279 0x0001 //RX_TDDRC_SMT_FLAG +280 0x0CCD //RX_TDDRC_SMT_W +281 0x0551 //RX_TDDRC_DRC_GAIN +195 0x0020 //RX_FDEQ_SUBNUM +196 0x483E //RX_FDEQ_GAIN_0 +197 0x3E3E //RX_FDEQ_GAIN_1 +198 0x3E4C //RX_FDEQ_GAIN_2 +199 0x5064 //RX_FDEQ_GAIN_3 +200 0x7076 //RX_FDEQ_GAIN_4 +201 0x897A //RX_FDEQ_GAIN_5 +202 0x7C80 //RX_FDEQ_GAIN_6 +203 0x8888 //RX_FDEQ_GAIN_7 +204 0x949C //RX_FDEQ_GAIN_8 +205 0x96A4 //RX_FDEQ_GAIN_9 +206 0xA9A0 //RX_FDEQ_GAIN_10 +207 0x9487 //RX_FDEQ_GAIN_11 +208 0x6F64 //RX_FDEQ_GAIN_12 +209 0x625A //RX_FDEQ_GAIN_13 +210 0x5D80 //RX_FDEQ_GAIN_14 +211 0x8890 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0202 //RX_FDEQ_BIN_0 +221 0x0202 //RX_FDEQ_BIN_1 +222 0x0301 //RX_FDEQ_BIN_2 +223 0x0404 //RX_FDEQ_BIN_3 +224 0x0406 //RX_FDEQ_BIN_4 +225 0x0109 //RX_FDEQ_BIN_5 +226 0x0708 //RX_FDEQ_BIN_6 +227 0x090A //RX_FDEQ_BIN_7 +228 0x0B0C //RX_FDEQ_BIN_8 +229 0x0D0E //RX_FDEQ_BIN_9 +230 0x1013 //RX_FDEQ_BIN_10 +231 0x1719 //RX_FDEQ_BIN_11 +232 0x1B0F //RX_FDEQ_BIN_12 +233 0x141E //RX_FDEQ_BIN_13 +234 0x3728 //RX_FDEQ_BIN_14 +235 0x282C //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x4000 //RX_FDEQ_RESRV_0 +245 0x0320 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0030 //RX_FDDRC_BAND_MARGIN_1 +248 0x0050 //RX_FDDRC_BAND_MARGIN_2 +249 0x0080 //RX_FDDRC_BAND_MARGIN_3 +250 0x0007 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x5000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x6400 //RX_FDDRC_THRD_3_2 +258 0x6400 //RX_FDDRC_THRD_3_3 +259 0x2000 //RX_FDDRC_SLANT_0_0 +260 0x2000 //RX_FDDRC_SLANT_0_1 +261 0x2000 //RX_FDDRC_SLANT_0_2 +262 0x2000 //RX_FDDRC_SLANT_0_3 +263 0x5333 //RX_FDDRC_SLANT_1_0 +264 0x5333 //RX_FDDRC_SLANT_1_1 +265 0x5333 //RX_FDDRC_SLANT_1_2 +266 0x5333 //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +286 0x0100 //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 #CASE_NAME HANDSET-HANDSET-VOICE_GENERIC-FB -#PARAM_TYPE TX+RX -#TOTAL_CUSTOM_STEP 7 +#PARAM_MODE FULL +#PARAM_TYPE TX+2RX +#TOTAL_CUSTOM_STEP 7+7 #TX 0 0x0000 //TX_OPERATION_MODE_0 1 0x0000 //TX_OPERATION_MODE_1 @@ -10546,7 +16049,7 @@ 18 0x0000 //TX_SYS_RESRV_2 19 0x0000 //TX_SYS_RESRV_3 20 0x0000 //TX_DIST2REF0 -21 0x00A4 //TX_DIST2REF1 +21 0x00A3 //TX_DIST2REF1 22 0x0000 //TX_DIST2REF_02 23 0x0000 //TX_DIST2REF_03 24 0x0000 //TX_DIST2REF_04 @@ -10776,12 +16279,12 @@ 248 0xF800 //TX_THR_SN_EST_6 249 0xF700 //TX_THR_SN_EST_7 250 0x0000 //TX_DELTA_THR_SN_EST_0 -251 0x0100 //TX_DELTA_THR_SN_EST_1 +251 0x0200 //TX_DELTA_THR_SN_EST_1 252 0x0200 //TX_DELTA_THR_SN_EST_2 253 0x0200 //TX_DELTA_THR_SN_EST_3 -254 0x0200 //TX_DELTA_THR_SN_EST_4 -255 0x0100 //TX_DELTA_THR_SN_EST_5 -256 0x0200 //TX_DELTA_THR_SN_EST_6 +254 0x0100 //TX_DELTA_THR_SN_EST_4 +255 0x0200 //TX_DELTA_THR_SN_EST_5 +256 0x0100 //TX_DELTA_THR_SN_EST_6 257 0x0200 //TX_DELTA_THR_SN_EST_7 258 0x4000 //TX_LAMBDA_NN_EST_0 259 0x4000 //TX_LAMBDA_NN_EST_1 @@ -10809,16 +16312,16 @@ 281 0x0014 //TX_NS_LVL_CTRL_0 282 0x0016 //TX_NS_LVL_CTRL_1 283 0x0016 //TX_NS_LVL_CTRL_2 -284 0x0016 //TX_NS_LVL_CTRL_3 -285 0x0018 //TX_NS_LVL_CTRL_4 -286 0x0016 //TX_NS_LVL_CTRL_5 -287 0x0012 //TX_NS_LVL_CTRL_6 +284 0x0018 //TX_NS_LVL_CTRL_3 +285 0x0016 //TX_NS_LVL_CTRL_4 +286 0x0012 //TX_NS_LVL_CTRL_5 +287 0x0016 //TX_NS_LVL_CTRL_6 288 0x0017 //TX_NS_LVL_CTRL_7 289 0x000E //TX_MIN_GAIN_S_0 -290 0x0012 //TX_MIN_GAIN_S_1 -291 0x0007 //TX_MIN_GAIN_S_2 -292 0x0012 //TX_MIN_GAIN_S_3 -293 0x0010 //TX_MIN_GAIN_S_4 +290 0x0007 //TX_MIN_GAIN_S_1 +291 0x0012 //TX_MIN_GAIN_S_2 +292 0x0010 //TX_MIN_GAIN_S_3 +293 0x0012 //TX_MIN_GAIN_S_4 294 0x0012 //TX_MIN_GAIN_S_5 295 0x0012 //TX_MIN_GAIN_S_6 296 0x0012 //TX_MIN_GAIN_S_7 @@ -10840,29 +16343,29 @@ 312 0x7FFF //TX_A_POST_FILT_0 313 0x2000 //TX_A_POST_FILT_1 314 0x4000 //TX_A_POST_FILT_S_0 -315 0x5000 //TX_A_POST_FILT_S_1 +315 0x4000 //TX_A_POST_FILT_S_1 316 0x4000 //TX_A_POST_FILT_S_2 317 0x4000 //TX_A_POST_FILT_S_3 318 0x4000 //TX_A_POST_FILT_S_4 319 0x4000 //TX_A_POST_FILT_S_5 -320 0x4000 //TX_A_POST_FILT_S_6 +320 0x5000 //TX_A_POST_FILT_S_6 321 0x7000 //TX_A_POST_FILT_S_7 322 0x1000 //TX_B_POST_FILT_0 323 0x2000 //TX_B_POST_FILT_1 -324 0x3000 //TX_B_POST_FILT_2 +324 0x2000 //TX_B_POST_FILT_2 325 0x2000 //TX_B_POST_FILT_3 -326 0x5000 //TX_B_POST_FILT_4 +326 0x2000 //TX_B_POST_FILT_4 327 0x2000 //TX_B_POST_FILT_5 -328 0x6000 //TX_B_POST_FILT_6 +328 0x3000 //TX_B_POST_FILT_6 329 0x3000 //TX_B_POST_FILT_7 330 0x1000 //TX_B_LESSCUT_RTO_S_0 -331 0x6000 //TX_B_LESSCUT_RTO_S_1 -332 0x6000 //TX_B_LESSCUT_RTO_S_2 -333 0x6000 //TX_B_LESSCUT_RTO_S_3 -334 0x6000 //TX_B_LESSCUT_RTO_S_4 -335 0x6000 //TX_B_LESSCUT_RTO_S_5 -336 0x7FFF //TX_B_LESSCUT_RTO_S_6 -337 0x7FFF //TX_B_LESSCUT_RTO_S_7 +331 0x1000 //TX_B_LESSCUT_RTO_S_1 +332 0x1000 //TX_B_LESSCUT_RTO_S_2 +333 0x1000 //TX_B_LESSCUT_RTO_S_3 +334 0x1000 //TX_B_LESSCUT_RTO_S_4 +335 0x1000 //TX_B_LESSCUT_RTO_S_5 +336 0x1000 //TX_B_LESSCUT_RTO_S_6 +337 0x1000 //TX_B_LESSCUT_RTO_S_7 338 0x7E14 //TX_LAMBDA_PFILT 339 0x7C29 //TX_LAMBDA_PFILT_S_0 340 0x7C29 //TX_LAMBDA_PFILT_S_1 @@ -10905,10 +16408,10 @@ 377 0x4E20 //TX_NOISE_TH_5_4 378 0x39DF //TX_NOISE_TH_6 379 0x0014 //TX_MINENOISE_TH -380 0x4000 //TX_MINENOISE_MIC0_TH_MTS -381 0xFFEE //TX_MINENOISE_MIC0_TH_EXP -382 0x6000 //TX_MINENOISE_MIC0_S_TH_MTS -383 0xFFF3 //TX_MINENOISE_MIC0_S_TH_EXP +380 0xD508 //TX_MORENS_TFMASK_TH +381 0x0001 //TX_DRC_QUIET_FLOOR +382 0x6D60 //TX_RATIODTL_CUT_TH +383 0x1482 //TX_DT_CUT_K1 384 0x00A5 //TX_OUT_ENER_S_TH_CLEAN 385 0x00A5 //TX_OUT_ENER_S_TH_LESSCLEAN 386 0x00A5 //TX_OUT_ENER_S_TH_NOISY @@ -10916,15 +16419,15 @@ 388 0x0200 //TX_OUT_ENER_TH_SPEECH 389 0x2000 //TX_SN_NPB_GAIN 390 0x0000 //TX_NN_NPB_GAIN -391 0x0000 //TX_CSX_ALPHA_0 -392 0x0000 //TX_CSX_ALPHA_1 -393 0x0000 //TX_CSX_ALPHA_2 -394 0x0000 //TX_CSX_ALPHA_3 -395 0x0800 //TX_MU_ARSP_EST -396 0x00C8 //TX_P_OUTBEAM_MIN_TH +391 0x3000 //TX_POST_MASK_SUP_HSNE +392 0x07D0 //TX_TAIL_DET_TH +393 0x4000 //TX_B_LESSCUT_RTO_WTA +394 0x0000 //TX_MEL_G_R +395 0x0080 //TX_SUPHIGH_TH +396 0x0000 //TX_MASK_G_R 397 0x0002 //TX_EXTRA_NS_L -398 0x0800 //TX_EXTRA_NS_A -399 0x0005 //TX_VR_NOISE_FLOOR_TH +398 0x1800 //TX_C_POST_FLT_MASK +399 0x7FFF //TX_A_POST_FLT_WNS 400 0x0148 //TX_MIN_G_LOW300HZ 401 0x0004 //TX_MAXLEVEL_CNG 402 0x00B4 //TX_STN_NOISE_TH @@ -11039,16 +16542,16 @@ 511 0x6666 //TX_MIC_TO_BFGAIN 512 0x0000 //TX_MICTOBFGAIN0 513 0x0000 //TX_FASTMUE_TH -514 0x0000 //TX_DERVB_LEN_0 -515 0x0000 //TX_DERVB_LEN_1 -516 0x0000 //TX_RHO_DERVB -517 0x0000 //TX_MIC_INDX_DERVB -518 0x0000 //TX_MU_DERVB -519 0x0000 //TX_DR_RESRV_0 -520 0x0000 //TX_DR_RESRV_1 -521 0x0000 //TX_DR_RESRV_2 -522 0x0000 //TX_DR_RESRV_3 -523 0x0000 //TX_DR_RESRV_4 +514 0x2CCC //TX_DEREVERB_LF_MU +515 0x3200 //TX_DEREVERB_HF_MU +516 0x0007 //TX_DEREVERB_DELAY +517 0x0004 //TX_DEREVERB_COEF_LEN +518 0x0003 //TX_DEREVERB_DNR +519 0x0000 //TX_DEREVERB_ALPHA +520 0x0000 //TX_DEREVERB_BETA +521 0x7FFF //TX_GSC_RTOL_TH +522 0x7FFF //TX_GSC_RTOH_TH +523 0x7E2C //TX_WIDE2_MEANHTH 524 0x0000 //TX_DR_RESRV_5 525 0x0000 //TX_DR_RESRV_6 526 0x0000 //TX_DR_RESRV_7 @@ -11422,8 +16925,73 @@ 894 0xC000 //TX_FASTNS_SSA_THHFL 895 0xCCCC //TX_FASTNS_SSA_THLFH 896 0xD999 //TX_FASTNS_SSA_THHFH +897 0x2339 //TX_SENDFUNC_REG_MICMUTE +898 0x0021 //TX_SENDFUNC_REG_MICMUTE1 +899 0x02BC //TX_MICMUTE_RATIO_THR +900 0x0140 //TX_MICMUTE_AMP_THR +901 0x0004 //TX_MICMUTE_HPF_IND +902 0x00C0 //TX_MICMUTE_LOG_EYR_TH +903 0x0008 //TX_MICMUTE_CVG_TIME +904 0x0008 //TX_MICMUTE_RELEASE_TIME +905 0x01FE //TX_MIC_VOLUME_MIC0MUTE +906 0x0020 //TX_MICMUTE_EPD_OFFSET_0 +907 0x001E //TX_MICMUTE_FRQ_AEC_L +908 0x7999 //TX_MICMUTE_EAD_THR +909 0x7FFF //TX_MICMUTE_LAMBDA_CB_NLE +910 0x7FFF //TX_MICMUTE_LAMBDA_RE_EST +911 0x4000 //TX_DTD_THR1_MICMUTE_0 +912 0x7000 //TX_DTD_THR1_MICMUTE_1 +913 0x7FFF //TX_DTD_THR1_MICMUTE_2 +914 0x7FFF //TX_DTD_THR1_MICMUTE_3 +915 0x6CCC //TX_DTD_THR2_MICMUTE_0 +916 0x0400 //TX_MICMUTE_MIN_EQ_RE_EST_0 +917 0x0400 //TX_MICMUTE_MIN_EQ_RE_EST_1 +918 0x1000 //TX_MICMUTE_MIN_EQ_RE_EST_2 +919 0x7FFF //TX_MICMUTE_MIN_EQ_RE_EST_3 +920 0x7FFF //TX_MICMUTE_MIN_EQ_RE_EST_4 +921 0x4000 //TX_MICMUTE_C_POST_FLT +922 0x03E8 //TX_MICMUTE_DT_CUT_K +923 0x0001 //TX_MICMUTE_DT_CUT_THR +924 0x03E8 //TX_MICMUTE_DT_CUT_K2 +925 0x0001 //TX_MICMUTE_DT_CUT_THR2 +926 0x0064 //TX_MICMUTE_DT2_HOLD_N +927 0x1000 //TX_MICMUTE_RATIODTH_THCUT +928 0x1000 //TX_MICMUTE_B_POST_FLT_ECHOL +929 0x7FFF //TX_MICMUTE_B_POST_FLT_ECHOH +930 0x0400 //TX_MICMUTE_C_POST_FLT_MASK +931 0x7999 //TX_MICMUTE_RATIODTL_CUT_TH +932 0x0258 //TX_MICMUTE_DT_CUT_K1 +933 0x0800 //TX_MICMUTE_N2_SN_EST +934 0xFC00 //TX_MICMUTE_THR_SN_EST_0 +935 0x001C //TX_MICMUTE_MIN_G_CTRL_0 +936 0x6000 //TX_MICMUTE_A_POST_FILT_S_0 +937 0x7000 //TX_MICMUTE_B_POST_FILT_0 +938 0x2710 //TX_MIC1RUB_AMP_THR +939 0x0010 //TX_MIC1MUTE_RATIO_THR +940 0x0450 //TX_MIC1MUTE_AMP_THR +941 0x0008 //TX_MIC1MUTE_CVG_TIME +942 0x0008 //TX_MIC1MUTE_RELEASE_TIME +943 0x0000 //TX_AMS_RESRV_01 +944 0x0000 //TX_AMS_RESRV_02 +945 0x0000 //TX_AMS_RESRV_03 +946 0x0000 //TX_AMS_RESRV_04 +947 0x0000 //TX_AMS_RESRV_05 +948 0x0000 //TX_AMS_RESRV_06 +949 0x0000 //TX_AMS_RESRV_07 +950 0x0000 //TX_AMS_RESRV_08 +951 0x0000 //TX_AMS_RESRV_09 +952 0x0000 //TX_AMS_RESRV_10 +953 0x0000 //TX_AMS_RESRV_11 +954 0x0000 //TX_AMS_RESRV_12 +955 0x0000 //TX_AMS_RESRV_13 +956 0x0000 //TX_AMS_RESRV_14 +957 0x0000 //TX_AMS_RESRV_15 +958 0x0000 //TX_AMS_RESRV_16 +959 0x0000 //TX_AMS_RESRV_17 +960 0x0000 //TX_AMS_RESRV_18 +961 0x0000 //TX_AMS_RESRV_19 #RX -0 0x002C //RX_RECVFUNC_MODE_0 +0 0x202C //RX_RECVFUNC_MODE_0 1 0x0000 //RX_RECVFUNC_MODE_1 2 0x0004 //RX_SAMPLINGFREQ_SIG 3 0x0004 //RX_SAMPLINGFREQ_PROC @@ -12273,14 +17841,866 @@ 110 0x0000 //RX_FDDRC_RESRV_0 129 0x0100 //RX_SPK_VOL 130 0x0000 //RX_VOL_RESRV_0 +#RX 2 +157 0x002C //RX_RECVFUNC_MODE_0 +158 0x0000 //RX_RECVFUNC_MODE_1 +159 0x0004 //RX_SAMPLINGFREQ_SIG +160 0x0004 //RX_SAMPLINGFREQ_PROC +161 0x000A //RX_FRAME_SZ +162 0x0000 //RX_DELAY_OPT +163 0x1000 //RX_TDDRC_ALPHA_UP_1 +164 0x1000 //RX_TDDRC_ALPHA_UP_2 +165 0x1000 //RX_TDDRC_ALPHA_UP_3 +166 0x1000 //RX_TDDRC_ALPHA_UP_4 +167 0x0722 //RX_PGA +168 0x7FFF //RX_A_HP +169 0x4000 //RX_B_PE +170 0x5800 //RX_THR_PITCH_DET_0 +171 0x5000 //RX_THR_PITCH_DET_1 +172 0x4000 //RX_THR_PITCH_DET_2 +173 0x0008 //RX_PITCH_BFR_LEN +174 0x0003 //RX_SBD_PITCH_DET +175 0x0100 //RX_PP_RESRV_0 +176 0x0020 //RX_PP_RESRV_1 +177 0x0600 //RX_N_SN_EST +178 0x000C //RX_N2_SN_EST +179 0x000F //RX_NS_LVL_CTRL +180 0xF800 //RX_THR_SN_EST +181 0x7E00 //RX_LAMBDA_PFILT +182 0x000A //RX_FENS_RESRV_0 +183 0x0190 //RX_FENS_RESRV_1 +184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +187 0x0002 //RX_EXTRA_NS_L +188 0x0800 //RX_EXTRA_NS_A +189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +190 0x7000 //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +192 0x199A //RX_A_POST_FLT +193 0x0000 //RX_LMT_THRD +194 0x4000 //RX_LMT_ALPHA +195 0x0020 //RX_FDEQ_SUBNUM +196 0x4E4E //RX_FDEQ_GAIN_0 +197 0x4E56 //RX_FDEQ_GAIN_1 +198 0x6878 //RX_FDEQ_GAIN_2 +199 0x8088 //RX_FDEQ_GAIN_3 +200 0x848B //RX_FDEQ_GAIN_4 +201 0x8F8E //RX_FDEQ_GAIN_5 +202 0x9494 //RX_FDEQ_GAIN_6 +203 0x96A0 //RX_FDEQ_GAIN_7 +204 0xB8A0 //RX_FDEQ_GAIN_8 +205 0xA99D //RX_FDEQ_GAIN_9 +206 0x9D6A //RX_FDEQ_GAIN_10 +207 0x626B //RX_FDEQ_GAIN_11 +208 0x6C78 //RX_FDEQ_GAIN_12 +209 0x7884 //RX_FDEQ_GAIN_13 +210 0x9098 //RX_FDEQ_GAIN_14 +211 0x9CAC //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0202 //RX_FDEQ_BIN_0 +221 0x0202 //RX_FDEQ_BIN_1 +222 0x0302 //RX_FDEQ_BIN_2 +223 0x0304 //RX_FDEQ_BIN_3 +224 0x0405 //RX_FDEQ_BIN_4 +225 0x0506 //RX_FDEQ_BIN_5 +226 0x0708 //RX_FDEQ_BIN_6 +227 0x090A //RX_FDEQ_BIN_7 +228 0x0B0C //RX_FDEQ_BIN_8 +229 0x0D0E //RX_FDEQ_BIN_9 +230 0x1013 //RX_FDEQ_BIN_10 +231 0x1719 //RX_FDEQ_BIN_11 +232 0x1B1E //RX_FDEQ_BIN_12 +233 0x1E1E //RX_FDEQ_BIN_13 +234 0x1E28 //RX_FDEQ_BIN_14 +235 0x282C //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x4000 //RX_FDEQ_RESRV_0 +245 0x0320 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0030 //RX_FDDRC_BAND_MARGIN_1 +248 0x0050 //RX_FDDRC_BAND_MARGIN_2 +249 0x0080 //RX_FDDRC_BAND_MARGIN_3 +250 0x0007 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x5000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x6400 //RX_FDDRC_THRD_3_2 +258 0x6400 //RX_FDDRC_THRD_3_3 +259 0x2000 //RX_FDDRC_SLANT_0_0 +260 0x2000 //RX_FDDRC_SLANT_0_1 +261 0x2000 //RX_FDDRC_SLANT_0_2 +262 0x2000 //RX_FDDRC_SLANT_0_3 +263 0x5333 //RX_FDDRC_SLANT_1_0 +264 0x5333 //RX_FDDRC_SLANT_1_1 +265 0x5333 //RX_FDDRC_SLANT_1_2 +266 0x5333 //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +268 0x0002 //RX_FILTINDX +269 0x0000 //RX_TDDRC_THRD_0 +270 0x0000 //RX_TDDRC_THRD_1 +271 0x1800 //RX_TDDRC_THRD_2 +272 0x1800 //RX_TDDRC_THRD_3 +273 0x3000 //RX_TDDRC_SLANT_0 +274 0x6E00 //RX_TDDRC_SLANT_1 +275 0x1000 //RX_TDDRC_ALPHA_UP_0 +276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x199A //RX_TDDRC_HMNC_GAIN +279 0x0001 //RX_TDDRC_SMT_FLAG +280 0x0CCD //RX_TDDRC_SMT_W +281 0x02FD //RX_TDDRC_DRC_GAIN +282 0x7C00 //RX_LAMBDA_PKA_FP +283 0x1964 //RX_TPKA_FP +284 0x0080 //RX_MIN_G_FP +285 0x2000 //RX_MAX_G_FP +286 0x000D //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 +288 0x0000 //RX_MAXLEVEL_CNG +289 0x3000 //RX_BWE_UV_TH +290 0x3000 //RX_BWE_UV_TH2 +291 0x1800 //RX_BWE_UV_TH3 +292 0x1000 //RX_BWE_V_TH +293 0x04CD //RX_BWE_GAIN1_V_TH1 +294 0x0F33 //RX_BWE_GAIN1_V_TH2 +295 0x7333 //RX_BWE_UV_EQ +296 0x199A //RX_BWE_V_EQ +297 0x7333 //RX_BWE_TONE_TH +298 0x0004 //RX_BWE_UV_HOLD_T +299 0x6CCD //RX_BWE_GAIN2_ALPHA +300 0x799A //RX_BWE_GAIN3_ALPHA +301 0x001E //RX_BWE_CUTOFF +302 0x3000 //RX_BWE_GAINFILL +303 0x3200 //RX_BWE_MAXTH_TONE +304 0x2000 //RX_BWE_EQ_0 +305 0x2000 //RX_BWE_EQ_1 +306 0x2000 //RX_BWE_EQ_2 +307 0x2000 //RX_BWE_EQ_3 +308 0x2000 //RX_BWE_EQ_4 +309 0x2000 //RX_BWE_EQ_5 +310 0x2000 //RX_BWE_EQ_6 +311 0x0000 //RX_BWE_RESRV_0 +312 0x0000 //RX_BWE_RESRV_1 +313 0x0000 //RX_BWE_RESRV_2 +#VOL 0 +163 0x1000 //RX_TDDRC_ALPHA_UP_1 +164 0x1000 //RX_TDDRC_ALPHA_UP_2 +165 0x1000 //RX_TDDRC_ALPHA_UP_3 +166 0x1000 //RX_TDDRC_ALPHA_UP_4 +184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +190 0x7000 //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +269 0x0000 //RX_TDDRC_THRD_0 +270 0x0000 //RX_TDDRC_THRD_1 +271 0x1800 //RX_TDDRC_THRD_2 +272 0x1800 //RX_TDDRC_THRD_3 +273 0x3000 //RX_TDDRC_SLANT_0 +274 0x6E00 //RX_TDDRC_SLANT_1 +275 0x1000 //RX_TDDRC_ALPHA_UP_0 +276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x199A //RX_TDDRC_HMNC_GAIN +279 0x0001 //RX_TDDRC_SMT_FLAG +280 0x0CCD //RX_TDDRC_SMT_W +281 0x02FD //RX_TDDRC_DRC_GAIN +195 0x0020 //RX_FDEQ_SUBNUM +196 0x4E4E //RX_FDEQ_GAIN_0 +197 0x4E56 //RX_FDEQ_GAIN_1 +198 0x6878 //RX_FDEQ_GAIN_2 +199 0x8088 //RX_FDEQ_GAIN_3 +200 0x848B //RX_FDEQ_GAIN_4 +201 0x8F8E //RX_FDEQ_GAIN_5 +202 0x9494 //RX_FDEQ_GAIN_6 +203 0x96A0 //RX_FDEQ_GAIN_7 +204 0xB8A0 //RX_FDEQ_GAIN_8 +205 0xA99D //RX_FDEQ_GAIN_9 +206 0x9D6A //RX_FDEQ_GAIN_10 +207 0x626B //RX_FDEQ_GAIN_11 +208 0x6C78 //RX_FDEQ_GAIN_12 +209 0x7884 //RX_FDEQ_GAIN_13 +210 0x9098 //RX_FDEQ_GAIN_14 +211 0x9CAC //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0202 //RX_FDEQ_BIN_0 +221 0x0202 //RX_FDEQ_BIN_1 +222 0x0302 //RX_FDEQ_BIN_2 +223 0x0304 //RX_FDEQ_BIN_3 +224 0x0405 //RX_FDEQ_BIN_4 +225 0x0506 //RX_FDEQ_BIN_5 +226 0x0708 //RX_FDEQ_BIN_6 +227 0x090A //RX_FDEQ_BIN_7 +228 0x0B0C //RX_FDEQ_BIN_8 +229 0x0D0E //RX_FDEQ_BIN_9 +230 0x1013 //RX_FDEQ_BIN_10 +231 0x1719 //RX_FDEQ_BIN_11 +232 0x1B1E //RX_FDEQ_BIN_12 +233 0x1E1E //RX_FDEQ_BIN_13 +234 0x1E28 //RX_FDEQ_BIN_14 +235 0x282C //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x4000 //RX_FDEQ_RESRV_0 +245 0x0320 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0030 //RX_FDDRC_BAND_MARGIN_1 +248 0x0050 //RX_FDDRC_BAND_MARGIN_2 +249 0x0080 //RX_FDDRC_BAND_MARGIN_3 +250 0x0007 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x5000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x6400 //RX_FDDRC_THRD_3_2 +258 0x6400 //RX_FDDRC_THRD_3_3 +259 0x2000 //RX_FDDRC_SLANT_0_0 +260 0x2000 //RX_FDDRC_SLANT_0_1 +261 0x2000 //RX_FDDRC_SLANT_0_2 +262 0x2000 //RX_FDDRC_SLANT_0_3 +263 0x5333 //RX_FDDRC_SLANT_1_0 +264 0x5333 //RX_FDDRC_SLANT_1_1 +265 0x5333 //RX_FDDRC_SLANT_1_2 +266 0x5333 //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +286 0x000D //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 +#VOL 1 +163 0x1000 //RX_TDDRC_ALPHA_UP_1 +164 0x1000 //RX_TDDRC_ALPHA_UP_2 +165 0x1000 //RX_TDDRC_ALPHA_UP_3 +166 0x1000 //RX_TDDRC_ALPHA_UP_4 +184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +190 0x7000 //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +269 0x0000 //RX_TDDRC_THRD_0 +270 0x0000 //RX_TDDRC_THRD_1 +271 0x1800 //RX_TDDRC_THRD_2 +272 0x1800 //RX_TDDRC_THRD_3 +273 0x3000 //RX_TDDRC_SLANT_0 +274 0x6E00 //RX_TDDRC_SLANT_1 +275 0x1000 //RX_TDDRC_ALPHA_UP_0 +276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x199A //RX_TDDRC_HMNC_GAIN +279 0x0001 //RX_TDDRC_SMT_FLAG +280 0x0CCD //RX_TDDRC_SMT_W +281 0x02FD //RX_TDDRC_DRC_GAIN +195 0x0020 //RX_FDEQ_SUBNUM +196 0x4E4E //RX_FDEQ_GAIN_0 +197 0x4E56 //RX_FDEQ_GAIN_1 +198 0x6878 //RX_FDEQ_GAIN_2 +199 0x8088 //RX_FDEQ_GAIN_3 +200 0x848B //RX_FDEQ_GAIN_4 +201 0x8F8E //RX_FDEQ_GAIN_5 +202 0x9494 //RX_FDEQ_GAIN_6 +203 0x96A0 //RX_FDEQ_GAIN_7 +204 0xB8A0 //RX_FDEQ_GAIN_8 +205 0xA99D //RX_FDEQ_GAIN_9 +206 0x9D6A //RX_FDEQ_GAIN_10 +207 0x626B //RX_FDEQ_GAIN_11 +208 0x6C78 //RX_FDEQ_GAIN_12 +209 0x7884 //RX_FDEQ_GAIN_13 +210 0x9098 //RX_FDEQ_GAIN_14 +211 0x9CAC //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0202 //RX_FDEQ_BIN_0 +221 0x0202 //RX_FDEQ_BIN_1 +222 0x0302 //RX_FDEQ_BIN_2 +223 0x0304 //RX_FDEQ_BIN_3 +224 0x0405 //RX_FDEQ_BIN_4 +225 0x0506 //RX_FDEQ_BIN_5 +226 0x0708 //RX_FDEQ_BIN_6 +227 0x090A //RX_FDEQ_BIN_7 +228 0x0B0C //RX_FDEQ_BIN_8 +229 0x0D0E //RX_FDEQ_BIN_9 +230 0x1013 //RX_FDEQ_BIN_10 +231 0x1719 //RX_FDEQ_BIN_11 +232 0x1B1E //RX_FDEQ_BIN_12 +233 0x1E1E //RX_FDEQ_BIN_13 +234 0x1E28 //RX_FDEQ_BIN_14 +235 0x282C //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x4000 //RX_FDEQ_RESRV_0 +245 0x0320 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0030 //RX_FDDRC_BAND_MARGIN_1 +248 0x0050 //RX_FDDRC_BAND_MARGIN_2 +249 0x0080 //RX_FDDRC_BAND_MARGIN_3 +250 0x0007 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x5000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x6400 //RX_FDDRC_THRD_3_2 +258 0x6400 //RX_FDDRC_THRD_3_3 +259 0x2000 //RX_FDDRC_SLANT_0_0 +260 0x2000 //RX_FDDRC_SLANT_0_1 +261 0x2000 //RX_FDDRC_SLANT_0_2 +262 0x2000 //RX_FDDRC_SLANT_0_3 +263 0x5333 //RX_FDDRC_SLANT_1_0 +264 0x5333 //RX_FDDRC_SLANT_1_1 +265 0x5333 //RX_FDDRC_SLANT_1_2 +266 0x5333 //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +286 0x0016 //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 +#VOL 2 +163 0x1000 //RX_TDDRC_ALPHA_UP_1 +164 0x1000 //RX_TDDRC_ALPHA_UP_2 +165 0x1000 //RX_TDDRC_ALPHA_UP_3 +166 0x1000 //RX_TDDRC_ALPHA_UP_4 +184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +190 0x7000 //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +269 0x0000 //RX_TDDRC_THRD_0 +270 0x0000 //RX_TDDRC_THRD_1 +271 0x1800 //RX_TDDRC_THRD_2 +272 0x1800 //RX_TDDRC_THRD_3 +273 0x3000 //RX_TDDRC_SLANT_0 +274 0x6E00 //RX_TDDRC_SLANT_1 +275 0x1000 //RX_TDDRC_ALPHA_UP_0 +276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x199A //RX_TDDRC_HMNC_GAIN +279 0x0001 //RX_TDDRC_SMT_FLAG +280 0x0CCD //RX_TDDRC_SMT_W +281 0x02FD //RX_TDDRC_DRC_GAIN +195 0x0020 //RX_FDEQ_SUBNUM +196 0x4E4E //RX_FDEQ_GAIN_0 +197 0x4E56 //RX_FDEQ_GAIN_1 +198 0x6878 //RX_FDEQ_GAIN_2 +199 0x8088 //RX_FDEQ_GAIN_3 +200 0x848B //RX_FDEQ_GAIN_4 +201 0x8F8E //RX_FDEQ_GAIN_5 +202 0x9494 //RX_FDEQ_GAIN_6 +203 0x96A0 //RX_FDEQ_GAIN_7 +204 0xB8A0 //RX_FDEQ_GAIN_8 +205 0xA99D //RX_FDEQ_GAIN_9 +206 0x9D6A //RX_FDEQ_GAIN_10 +207 0x626B //RX_FDEQ_GAIN_11 +208 0x6C78 //RX_FDEQ_GAIN_12 +209 0x7884 //RX_FDEQ_GAIN_13 +210 0x9098 //RX_FDEQ_GAIN_14 +211 0x9CAC //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0202 //RX_FDEQ_BIN_0 +221 0x0202 //RX_FDEQ_BIN_1 +222 0x0302 //RX_FDEQ_BIN_2 +223 0x0304 //RX_FDEQ_BIN_3 +224 0x0405 //RX_FDEQ_BIN_4 +225 0x0506 //RX_FDEQ_BIN_5 +226 0x0708 //RX_FDEQ_BIN_6 +227 0x090A //RX_FDEQ_BIN_7 +228 0x0B0C //RX_FDEQ_BIN_8 +229 0x0D0E //RX_FDEQ_BIN_9 +230 0x1013 //RX_FDEQ_BIN_10 +231 0x1719 //RX_FDEQ_BIN_11 +232 0x1B1E //RX_FDEQ_BIN_12 +233 0x1E1E //RX_FDEQ_BIN_13 +234 0x1E28 //RX_FDEQ_BIN_14 +235 0x282C //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x4000 //RX_FDEQ_RESRV_0 +245 0x0320 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0030 //RX_FDDRC_BAND_MARGIN_1 +248 0x0050 //RX_FDDRC_BAND_MARGIN_2 +249 0x0080 //RX_FDDRC_BAND_MARGIN_3 +250 0x0007 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x5000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x6400 //RX_FDDRC_THRD_3_2 +258 0x6400 //RX_FDDRC_THRD_3_3 +259 0x2000 //RX_FDDRC_SLANT_0_0 +260 0x2000 //RX_FDDRC_SLANT_0_1 +261 0x2000 //RX_FDDRC_SLANT_0_2 +262 0x2000 //RX_FDDRC_SLANT_0_3 +263 0x5333 //RX_FDDRC_SLANT_1_0 +264 0x5333 //RX_FDDRC_SLANT_1_1 +265 0x5333 //RX_FDDRC_SLANT_1_2 +266 0x5333 //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +286 0x0024 //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 +#VOL 3 +163 0x1000 //RX_TDDRC_ALPHA_UP_1 +164 0x1000 //RX_TDDRC_ALPHA_UP_2 +165 0x1000 //RX_TDDRC_ALPHA_UP_3 +166 0x1000 //RX_TDDRC_ALPHA_UP_4 +184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +190 0x7000 //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +269 0x0000 //RX_TDDRC_THRD_0 +270 0x0000 //RX_TDDRC_THRD_1 +271 0x1800 //RX_TDDRC_THRD_2 +272 0x1800 //RX_TDDRC_THRD_3 +273 0x3000 //RX_TDDRC_SLANT_0 +274 0x6E00 //RX_TDDRC_SLANT_1 +275 0x1000 //RX_TDDRC_ALPHA_UP_0 +276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x199A //RX_TDDRC_HMNC_GAIN +279 0x0001 //RX_TDDRC_SMT_FLAG +280 0x0CCD //RX_TDDRC_SMT_W +281 0x02FD //RX_TDDRC_DRC_GAIN +195 0x0020 //RX_FDEQ_SUBNUM +196 0x4E4E //RX_FDEQ_GAIN_0 +197 0x4E56 //RX_FDEQ_GAIN_1 +198 0x6878 //RX_FDEQ_GAIN_2 +199 0x8088 //RX_FDEQ_GAIN_3 +200 0x848B //RX_FDEQ_GAIN_4 +201 0x8F8E //RX_FDEQ_GAIN_5 +202 0x9494 //RX_FDEQ_GAIN_6 +203 0x96A0 //RX_FDEQ_GAIN_7 +204 0xB8A0 //RX_FDEQ_GAIN_8 +205 0xA99D //RX_FDEQ_GAIN_9 +206 0x9D6A //RX_FDEQ_GAIN_10 +207 0x626B //RX_FDEQ_GAIN_11 +208 0x6C78 //RX_FDEQ_GAIN_12 +209 0x7884 //RX_FDEQ_GAIN_13 +210 0x9098 //RX_FDEQ_GAIN_14 +211 0x9CAC //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0202 //RX_FDEQ_BIN_0 +221 0x0202 //RX_FDEQ_BIN_1 +222 0x0302 //RX_FDEQ_BIN_2 +223 0x0304 //RX_FDEQ_BIN_3 +224 0x0405 //RX_FDEQ_BIN_4 +225 0x0506 //RX_FDEQ_BIN_5 +226 0x0708 //RX_FDEQ_BIN_6 +227 0x090A //RX_FDEQ_BIN_7 +228 0x0B0C //RX_FDEQ_BIN_8 +229 0x0D0E //RX_FDEQ_BIN_9 +230 0x1013 //RX_FDEQ_BIN_10 +231 0x1719 //RX_FDEQ_BIN_11 +232 0x1B1E //RX_FDEQ_BIN_12 +233 0x1E1E //RX_FDEQ_BIN_13 +234 0x1E28 //RX_FDEQ_BIN_14 +235 0x282C //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x4000 //RX_FDEQ_RESRV_0 +245 0x0320 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0030 //RX_FDDRC_BAND_MARGIN_1 +248 0x0050 //RX_FDDRC_BAND_MARGIN_2 +249 0x0080 //RX_FDDRC_BAND_MARGIN_3 +250 0x0007 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x5000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x6400 //RX_FDDRC_THRD_3_2 +258 0x6400 //RX_FDDRC_THRD_3_3 +259 0x2000 //RX_FDDRC_SLANT_0_0 +260 0x2000 //RX_FDDRC_SLANT_0_1 +261 0x2000 //RX_FDDRC_SLANT_0_2 +262 0x2000 //RX_FDDRC_SLANT_0_3 +263 0x5333 //RX_FDDRC_SLANT_1_0 +264 0x5333 //RX_FDDRC_SLANT_1_1 +265 0x5333 //RX_FDDRC_SLANT_1_2 +266 0x5333 //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +286 0x003A //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 +#VOL 4 +163 0x1000 //RX_TDDRC_ALPHA_UP_1 +164 0x1000 //RX_TDDRC_ALPHA_UP_2 +165 0x1000 //RX_TDDRC_ALPHA_UP_3 +166 0x1000 //RX_TDDRC_ALPHA_UP_4 +184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +190 0x7000 //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +269 0x0000 //RX_TDDRC_THRD_0 +270 0x0000 //RX_TDDRC_THRD_1 +271 0x1800 //RX_TDDRC_THRD_2 +272 0x1800 //RX_TDDRC_THRD_3 +273 0x3000 //RX_TDDRC_SLANT_0 +274 0x6E00 //RX_TDDRC_SLANT_1 +275 0x1000 //RX_TDDRC_ALPHA_UP_0 +276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x199A //RX_TDDRC_HMNC_GAIN +279 0x0001 //RX_TDDRC_SMT_FLAG +280 0x0CCD //RX_TDDRC_SMT_W +281 0x02FD //RX_TDDRC_DRC_GAIN +195 0x0020 //RX_FDEQ_SUBNUM +196 0x4E4E //RX_FDEQ_GAIN_0 +197 0x4E56 //RX_FDEQ_GAIN_1 +198 0x6878 //RX_FDEQ_GAIN_2 +199 0x8088 //RX_FDEQ_GAIN_3 +200 0x848B //RX_FDEQ_GAIN_4 +201 0x8F8E //RX_FDEQ_GAIN_5 +202 0x9494 //RX_FDEQ_GAIN_6 +203 0x96A0 //RX_FDEQ_GAIN_7 +204 0xB8A0 //RX_FDEQ_GAIN_8 +205 0xA99D //RX_FDEQ_GAIN_9 +206 0x9D6A //RX_FDEQ_GAIN_10 +207 0x626B //RX_FDEQ_GAIN_11 +208 0x6C78 //RX_FDEQ_GAIN_12 +209 0x7884 //RX_FDEQ_GAIN_13 +210 0x9098 //RX_FDEQ_GAIN_14 +211 0x9CAC //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0202 //RX_FDEQ_BIN_0 +221 0x0202 //RX_FDEQ_BIN_1 +222 0x0302 //RX_FDEQ_BIN_2 +223 0x0304 //RX_FDEQ_BIN_3 +224 0x0405 //RX_FDEQ_BIN_4 +225 0x0506 //RX_FDEQ_BIN_5 +226 0x0708 //RX_FDEQ_BIN_6 +227 0x090A //RX_FDEQ_BIN_7 +228 0x0B0C //RX_FDEQ_BIN_8 +229 0x0D0E //RX_FDEQ_BIN_9 +230 0x1013 //RX_FDEQ_BIN_10 +231 0x1719 //RX_FDEQ_BIN_11 +232 0x1B1E //RX_FDEQ_BIN_12 +233 0x1E1E //RX_FDEQ_BIN_13 +234 0x1E28 //RX_FDEQ_BIN_14 +235 0x282C //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x4000 //RX_FDEQ_RESRV_0 +245 0x0320 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0030 //RX_FDDRC_BAND_MARGIN_1 +248 0x0050 //RX_FDDRC_BAND_MARGIN_2 +249 0x0080 //RX_FDDRC_BAND_MARGIN_3 +250 0x0007 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x5000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x6400 //RX_FDDRC_THRD_3_2 +258 0x6400 //RX_FDDRC_THRD_3_3 +259 0x2000 //RX_FDDRC_SLANT_0_0 +260 0x2000 //RX_FDDRC_SLANT_0_1 +261 0x2000 //RX_FDDRC_SLANT_0_2 +262 0x2000 //RX_FDDRC_SLANT_0_3 +263 0x5333 //RX_FDDRC_SLANT_1_0 +264 0x5333 //RX_FDDRC_SLANT_1_1 +265 0x5333 //RX_FDDRC_SLANT_1_2 +266 0x5333 //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +286 0x0059 //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 +#VOL 5 +163 0x1000 //RX_TDDRC_ALPHA_UP_1 +164 0x1000 //RX_TDDRC_ALPHA_UP_2 +165 0x1000 //RX_TDDRC_ALPHA_UP_3 +166 0x1000 //RX_TDDRC_ALPHA_UP_4 +184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +190 0x7000 //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +269 0x0000 //RX_TDDRC_THRD_0 +270 0x0000 //RX_TDDRC_THRD_1 +271 0x1800 //RX_TDDRC_THRD_2 +272 0x1800 //RX_TDDRC_THRD_3 +273 0x3000 //RX_TDDRC_SLANT_0 +274 0x6E00 //RX_TDDRC_SLANT_1 +275 0x1000 //RX_TDDRC_ALPHA_UP_0 +276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x199A //RX_TDDRC_HMNC_GAIN +279 0x0001 //RX_TDDRC_SMT_FLAG +280 0x0CCD //RX_TDDRC_SMT_W +281 0x02FD //RX_TDDRC_DRC_GAIN +195 0x0020 //RX_FDEQ_SUBNUM +196 0x4E4E //RX_FDEQ_GAIN_0 +197 0x4E56 //RX_FDEQ_GAIN_1 +198 0x6878 //RX_FDEQ_GAIN_2 +199 0x8088 //RX_FDEQ_GAIN_3 +200 0x848B //RX_FDEQ_GAIN_4 +201 0x8F8E //RX_FDEQ_GAIN_5 +202 0x9494 //RX_FDEQ_GAIN_6 +203 0x96A0 //RX_FDEQ_GAIN_7 +204 0xB8A0 //RX_FDEQ_GAIN_8 +205 0xA99D //RX_FDEQ_GAIN_9 +206 0x9D6A //RX_FDEQ_GAIN_10 +207 0x626B //RX_FDEQ_GAIN_11 +208 0x6C78 //RX_FDEQ_GAIN_12 +209 0x7884 //RX_FDEQ_GAIN_13 +210 0x9098 //RX_FDEQ_GAIN_14 +211 0x9CAC //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0202 //RX_FDEQ_BIN_0 +221 0x0202 //RX_FDEQ_BIN_1 +222 0x0302 //RX_FDEQ_BIN_2 +223 0x0304 //RX_FDEQ_BIN_3 +224 0x0405 //RX_FDEQ_BIN_4 +225 0x0506 //RX_FDEQ_BIN_5 +226 0x0708 //RX_FDEQ_BIN_6 +227 0x090A //RX_FDEQ_BIN_7 +228 0x0B0C //RX_FDEQ_BIN_8 +229 0x0D0E //RX_FDEQ_BIN_9 +230 0x1013 //RX_FDEQ_BIN_10 +231 0x1719 //RX_FDEQ_BIN_11 +232 0x1B1E //RX_FDEQ_BIN_12 +233 0x1E1E //RX_FDEQ_BIN_13 +234 0x1E28 //RX_FDEQ_BIN_14 +235 0x282C //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x4000 //RX_FDEQ_RESRV_0 +245 0x0320 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0030 //RX_FDDRC_BAND_MARGIN_1 +248 0x0050 //RX_FDDRC_BAND_MARGIN_2 +249 0x0080 //RX_FDDRC_BAND_MARGIN_3 +250 0x0007 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x5000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x6400 //RX_FDDRC_THRD_3_2 +258 0x6400 //RX_FDDRC_THRD_3_3 +259 0x2000 //RX_FDDRC_SLANT_0_0 +260 0x2000 //RX_FDDRC_SLANT_0_1 +261 0x2000 //RX_FDDRC_SLANT_0_2 +262 0x2000 //RX_FDDRC_SLANT_0_3 +263 0x5333 //RX_FDDRC_SLANT_1_0 +264 0x5333 //RX_FDDRC_SLANT_1_1 +265 0x5333 //RX_FDDRC_SLANT_1_2 +266 0x5333 //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +286 0x0090 //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 +#VOL 6 +163 0x1000 //RX_TDDRC_ALPHA_UP_1 +164 0x1000 //RX_TDDRC_ALPHA_UP_2 +165 0x1000 //RX_TDDRC_ALPHA_UP_3 +166 0x1000 //RX_TDDRC_ALPHA_UP_4 +184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +190 0x7000 //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +269 0x0000 //RX_TDDRC_THRD_0 +270 0x0000 //RX_TDDRC_THRD_1 +271 0x1800 //RX_TDDRC_THRD_2 +272 0x1800 //RX_TDDRC_THRD_3 +273 0x3000 //RX_TDDRC_SLANT_0 +274 0x6E00 //RX_TDDRC_SLANT_1 +275 0x1000 //RX_TDDRC_ALPHA_UP_0 +276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x199A //RX_TDDRC_HMNC_GAIN +279 0x0001 //RX_TDDRC_SMT_FLAG +280 0x0CCD //RX_TDDRC_SMT_W +281 0x02FD //RX_TDDRC_DRC_GAIN +195 0x0020 //RX_FDEQ_SUBNUM +196 0x4E4E //RX_FDEQ_GAIN_0 +197 0x4E56 //RX_FDEQ_GAIN_1 +198 0x6878 //RX_FDEQ_GAIN_2 +199 0x8088 //RX_FDEQ_GAIN_3 +200 0x848B //RX_FDEQ_GAIN_4 +201 0x8F8E //RX_FDEQ_GAIN_5 +202 0x9494 //RX_FDEQ_GAIN_6 +203 0x96A0 //RX_FDEQ_GAIN_7 +204 0xB8A0 //RX_FDEQ_GAIN_8 +205 0xA99D //RX_FDEQ_GAIN_9 +206 0x9D6A //RX_FDEQ_GAIN_10 +207 0x626B //RX_FDEQ_GAIN_11 +208 0x6C78 //RX_FDEQ_GAIN_12 +209 0x7884 //RX_FDEQ_GAIN_13 +210 0x9098 //RX_FDEQ_GAIN_14 +211 0x9CAC //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0202 //RX_FDEQ_BIN_0 +221 0x0202 //RX_FDEQ_BIN_1 +222 0x0302 //RX_FDEQ_BIN_2 +223 0x0304 //RX_FDEQ_BIN_3 +224 0x0405 //RX_FDEQ_BIN_4 +225 0x0506 //RX_FDEQ_BIN_5 +226 0x0708 //RX_FDEQ_BIN_6 +227 0x090A //RX_FDEQ_BIN_7 +228 0x0B0C //RX_FDEQ_BIN_8 +229 0x0D0E //RX_FDEQ_BIN_9 +230 0x1013 //RX_FDEQ_BIN_10 +231 0x1719 //RX_FDEQ_BIN_11 +232 0x1B1E //RX_FDEQ_BIN_12 +233 0x1E1E //RX_FDEQ_BIN_13 +234 0x1E28 //RX_FDEQ_BIN_14 +235 0x282C //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x4000 //RX_FDEQ_RESRV_0 +245 0x0320 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0030 //RX_FDDRC_BAND_MARGIN_1 +248 0x0050 //RX_FDDRC_BAND_MARGIN_2 +249 0x0080 //RX_FDDRC_BAND_MARGIN_3 +250 0x0007 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x5000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x6400 //RX_FDDRC_THRD_3_2 +258 0x6400 //RX_FDDRC_THRD_3_3 +259 0x2000 //RX_FDDRC_SLANT_0_0 +260 0x2000 //RX_FDDRC_SLANT_0_1 +261 0x2000 //RX_FDDRC_SLANT_0_2 +262 0x2000 //RX_FDDRC_SLANT_0_3 +263 0x5333 //RX_FDDRC_SLANT_1_0 +264 0x5333 //RX_FDDRC_SLANT_1_1 +265 0x5333 //RX_FDDRC_SLANT_1_2 +266 0x5333 //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +286 0x0100 //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 #CASE_NAME HANDSET-HANDSET_HAC-VOICE_GENERIC-NB -#PARAM_TYPE TX+RX -#TOTAL_CUSTOM_STEP 7 +#PARAM_MODE FULL +#PARAM_TYPE TX+2RX +#TOTAL_CUSTOM_STEP 7+7 #TX 0 0x0000 //TX_OPERATION_MODE_0 1 0x0000 //TX_OPERATION_MODE_1 -2 0x0036 //TX_PATCH_REG +2 0x0076 //TX_PATCH_REG 3 0x6F7E //TX_SENDFUNC_MODE_0 4 0x0001 //TX_SENDFUNC_MODE_1 5 0x0002 //TX_NUM_MIC @@ -12299,7 +18719,7 @@ 18 0x0000 //TX_SYS_RESRV_2 19 0x0000 //TX_SYS_RESRV_3 20 0x0000 //TX_DIST2REF0 -21 0x00A4 //TX_DIST2REF1 +21 0x00A3 //TX_DIST2REF1 22 0x0000 //TX_DIST2REF_02 23 0x0000 //TX_DIST2REF_03 24 0x0000 //TX_DIST2REF_04 @@ -12529,19 +18949,19 @@ 248 0xF800 //TX_THR_SN_EST_6 249 0xF700 //TX_THR_SN_EST_7 250 0x0000 //TX_DELTA_THR_SN_EST_0 -251 0x01A0 //TX_DELTA_THR_SN_EST_1 -252 0x0100 //TX_DELTA_THR_SN_EST_2 -253 0x0200 //TX_DELTA_THR_SN_EST_3 -254 0x01A0 //TX_DELTA_THR_SN_EST_4 -255 0x0100 //TX_DELTA_THR_SN_EST_5 -256 0x0000 //TX_DELTA_THR_SN_EST_6 +251 0x0100 //TX_DELTA_THR_SN_EST_1 +252 0x0200 //TX_DELTA_THR_SN_EST_2 +253 0x01A0 //TX_DELTA_THR_SN_EST_3 +254 0x0100 //TX_DELTA_THR_SN_EST_4 +255 0x0000 //TX_DELTA_THR_SN_EST_5 +256 0x01A0 //TX_DELTA_THR_SN_EST_6 257 0x0200 //TX_DELTA_THR_SN_EST_7 258 0x4000 //TX_LAMBDA_NN_EST_0 -259 0x4000 //TX_LAMBDA_NN_EST_1 -260 0x3000 //TX_LAMBDA_NN_EST_2 -261 0x4000 //TX_LAMBDA_NN_EST_3 +259 0x3000 //TX_LAMBDA_NN_EST_1 +260 0x4000 //TX_LAMBDA_NN_EST_2 +261 0x3000 //TX_LAMBDA_NN_EST_3 262 0x3000 //TX_LAMBDA_NN_EST_4 -263 0x3000 //TX_LAMBDA_NN_EST_5 +263 0x4000 //TX_LAMBDA_NN_EST_5 264 0x4000 //TX_LAMBDA_NN_EST_6 265 0x4000 //TX_LAMBDA_NN_EST_7 266 0x0400 //TX_N_SN_EST @@ -12560,20 +18980,20 @@ 279 0x4000 //TX_B_POST_FLT_0 280 0x4000 //TX_B_POST_FLT_1 281 0x0014 //TX_NS_LVL_CTRL_0 -282 0x001B //TX_NS_LVL_CTRL_1 -283 0x0019 //TX_NS_LVL_CTRL_2 +282 0x0019 //TX_NS_LVL_CTRL_1 +283 0x0017 //TX_NS_LVL_CTRL_2 284 0x0017 //TX_NS_LVL_CTRL_3 -285 0x0017 //TX_NS_LVL_CTRL_4 -286 0x0019 //TX_NS_LVL_CTRL_5 -287 0x0014 //TX_NS_LVL_CTRL_6 +285 0x0019 //TX_NS_LVL_CTRL_4 +286 0x0014 //TX_NS_LVL_CTRL_5 +287 0x001B //TX_NS_LVL_CTRL_6 288 0x0010 //TX_NS_LVL_CTRL_7 289 0x0010 //TX_MIN_GAIN_S_0 290 0x000C //TX_MIN_GAIN_S_1 -291 0x000C //TX_MIN_GAIN_S_2 +291 0x0010 //TX_MIN_GAIN_S_2 292 0x0010 //TX_MIN_GAIN_S_3 -293 0x0010 //TX_MIN_GAIN_S_4 -294 0x000C //TX_MIN_GAIN_S_5 -295 0x0014 //TX_MIN_GAIN_S_6 +293 0x000C //TX_MIN_GAIN_S_4 +294 0x0014 //TX_MIN_GAIN_S_5 +295 0x000C //TX_MIN_GAIN_S_6 296 0x0014 //TX_MIN_GAIN_S_7 297 0x5000 //TX_NMOS_SUP 298 0x0000 //TX_NS_MAX_PRI_SNR_TH @@ -12583,8 +19003,8 @@ 302 0x4000 //TX_SNRI_SUP_2 303 0x4000 //TX_SNRI_SUP_3 304 0x4000 //TX_SNRI_SUP_4 -305 0x4000 //TX_SNRI_SUP_5 -306 0x7FFF //TX_SNRI_SUP_6 +305 0x7FFF //TX_SNRI_SUP_5 +306 0x4000 //TX_SNRI_SUP_6 307 0x3000 //TX_SNRI_SUP_7 308 0x3000 //TX_THR_LFNS 309 0x001A //TX_G_LFNS @@ -12593,36 +19013,36 @@ 312 0x7FFF //TX_A_POST_FILT_0 313 0x2000 //TX_A_POST_FILT_1 314 0x2000 //TX_A_POST_FILT_S_0 -315 0x7000 //TX_A_POST_FILT_S_1 -316 0x6000 //TX_A_POST_FILT_S_2 -317 0x5000 //TX_A_POST_FILT_S_3 -318 0x2000 //TX_A_POST_FILT_S_4 -319 0x6000 //TX_A_POST_FILT_S_5 -320 0x2000 //TX_A_POST_FILT_S_6 +315 0x6000 //TX_A_POST_FILT_S_1 +316 0x5000 //TX_A_POST_FILT_S_2 +317 0x2000 //TX_A_POST_FILT_S_3 +318 0x6000 //TX_A_POST_FILT_S_4 +319 0x2000 //TX_A_POST_FILT_S_5 +320 0x7000 //TX_A_POST_FILT_S_6 321 0x7000 //TX_A_POST_FILT_S_7 322 0x4000 //TX_B_POST_FILT_0 323 0x4000 //TX_B_POST_FILT_1 -324 0x7FFF //TX_B_POST_FILT_2 -325 0x5000 //TX_B_POST_FILT_3 -326 0x7FFF //TX_B_POST_FILT_4 -327 0x7FFF //TX_B_POST_FILT_5 +324 0x5000 //TX_B_POST_FILT_2 +325 0x4000 //TX_B_POST_FILT_3 +326 0x4000 //TX_B_POST_FILT_4 +327 0x4000 //TX_B_POST_FILT_5 328 0x4000 //TX_B_POST_FILT_6 329 0x2000 //TX_B_POST_FILT_7 330 0x7FFF //TX_B_LESSCUT_RTO_S_0 -331 0x7FFF //TX_B_LESSCUT_RTO_S_1 -332 0x7FFF //TX_B_LESSCUT_RTO_S_2 -333 0x7FFF //TX_B_LESSCUT_RTO_S_3 -334 0x7FFF //TX_B_LESSCUT_RTO_S_4 -335 0x7FFF //TX_B_LESSCUT_RTO_S_5 -336 0x7FFF //TX_B_LESSCUT_RTO_S_6 -337 0x7FFF //TX_B_LESSCUT_RTO_S_7 +331 0x1000 //TX_B_LESSCUT_RTO_S_1 +332 0x1000 //TX_B_LESSCUT_RTO_S_2 +333 0x1000 //TX_B_LESSCUT_RTO_S_3 +334 0x1000 //TX_B_LESSCUT_RTO_S_4 +335 0x1000 //TX_B_LESSCUT_RTO_S_5 +336 0x1000 //TX_B_LESSCUT_RTO_S_6 +337 0x1000 //TX_B_LESSCUT_RTO_S_7 338 0x7E14 //TX_LAMBDA_PFILT 339 0x7C29 //TX_LAMBDA_PFILT_S_0 -340 0x7C29 //TX_LAMBDA_PFILT_S_1 -341 0x7200 //TX_LAMBDA_PFILT_S_2 -342 0x7900 //TX_LAMBDA_PFILT_S_3 -343 0x7400 //TX_LAMBDA_PFILT_S_4 -344 0x7200 //TX_LAMBDA_PFILT_S_5 +340 0x7200 //TX_LAMBDA_PFILT_S_1 +341 0x7900 //TX_LAMBDA_PFILT_S_2 +342 0x7400 //TX_LAMBDA_PFILT_S_3 +343 0x7200 //TX_LAMBDA_PFILT_S_4 +344 0x7C29 //TX_LAMBDA_PFILT_S_5 345 0x7C29 //TX_LAMBDA_PFILT_S_6 346 0x7C29 //TX_LAMBDA_PFILT_S_7 347 0x0200 //TX_K_PEPPER @@ -12658,10 +19078,10 @@ 377 0x0000 //TX_NOISE_TH_5_4 378 0x07D0 //TX_NOISE_TH_6 379 0x0004 //TX_MINENOISE_TH -380 0x4000 //TX_MINENOISE_MIC0_TH_MTS -381 0xFFEE //TX_MINENOISE_MIC0_TH_EXP -382 0x6000 //TX_MINENOISE_MIC0_S_TH_MTS -383 0xFFF3 //TX_MINENOISE_MIC0_S_TH_EXP +380 0xD508 //TX_MORENS_TFMASK_TH +381 0x0001 //TX_DRC_QUIET_FLOOR +382 0x6D60 //TX_RATIODTL_CUT_TH +383 0x0DAC //TX_DT_CUT_K1 384 0x00A5 //TX_OUT_ENER_S_TH_CLEAN 385 0x00A5 //TX_OUT_ENER_S_TH_LESSCLEAN 386 0x00A5 //TX_OUT_ENER_S_TH_NOISY @@ -12669,15 +19089,15 @@ 388 0x00CE //TX_OUT_ENER_TH_SPEECH 389 0x2000 //TX_SN_NPB_GAIN 390 0x0000 //TX_NN_NPB_GAIN -391 0x0000 //TX_CSX_ALPHA_0 -392 0x0000 //TX_CSX_ALPHA_1 -393 0x0000 //TX_CSX_ALPHA_2 -394 0x0000 //TX_CSX_ALPHA_3 -395 0x0800 //TX_MU_ARSP_EST -396 0x00C8 //TX_P_OUTBEAM_MIN_TH +391 0x3000 //TX_POST_MASK_SUP_HSNE +392 0x07D0 //TX_TAIL_DET_TH +393 0x4000 //TX_B_LESSCUT_RTO_WTA +394 0x0000 //TX_MEL_G_R +395 0x0080 //TX_SUPHIGH_TH +396 0x0000 //TX_MASK_G_R 397 0x0002 //TX_EXTRA_NS_L -398 0x0800 //TX_EXTRA_NS_A -399 0x0005 //TX_VR_NOISE_FLOOR_TH +398 0x1800 //TX_C_POST_FLT_MASK +399 0x7FFF //TX_A_POST_FLT_WNS 400 0x0148 //TX_MIN_G_LOW300HZ 401 0x0001 //TX_MAXLEVEL_CNG 402 0x00B4 //TX_STN_NOISE_TH @@ -12792,16 +19212,16 @@ 511 0x6666 //TX_MIC_TO_BFGAIN 512 0x0000 //TX_MICTOBFGAIN0 513 0x0000 //TX_FASTMUE_TH -514 0x0000 //TX_DERVB_LEN_0 -515 0x0000 //TX_DERVB_LEN_1 -516 0x0000 //TX_RHO_DERVB -517 0x0000 //TX_MIC_INDX_DERVB -518 0x0000 //TX_MU_DERVB -519 0x0000 //TX_DR_RESRV_0 -520 0x0000 //TX_DR_RESRV_1 -521 0x0000 //TX_DR_RESRV_2 -522 0x0000 //TX_DR_RESRV_3 -523 0x0000 //TX_DR_RESRV_4 +514 0x3000 //TX_DEREVERB_LF_MU +515 0x34CD //TX_DEREVERB_HF_MU +516 0x0007 //TX_DEREVERB_DELAY +517 0x0004 //TX_DEREVERB_COEF_LEN +518 0x0003 //TX_DEREVERB_DNR +519 0x0000 //TX_DEREVERB_ALPHA +520 0x0000 //TX_DEREVERB_BETA +521 0x3A98 //TX_GSC_RTOL_TH +522 0x3A98 //TX_GSC_RTOH_TH +523 0x7E2C //TX_WIDE2_MEANHTH 524 0x0000 //TX_DR_RESRV_5 525 0x0000 //TX_DR_RESRV_6 526 0x0000 //TX_DR_RESRV_7 @@ -12878,7 +19298,7 @@ 597 0x0808 //TX_FDEQ_BIN_6 598 0x050E //TX_FDEQ_BIN_7 599 0x0B0C //TX_FDEQ_BIN_8 -600 0x0F0F //TX_FDEQ_BIN_9 +600 0x0F09 //TX_FDEQ_BIN_9 601 0x0000 //TX_FDEQ_BIN_10 602 0x0000 //TX_FDEQ_BIN_11 603 0x0000 //TX_FDEQ_BIN_12 @@ -12950,10 +19370,10 @@ 669 0x4848 //TX_PREEQ_GAIN_MIC1_3 670 0x4848 //TX_PREEQ_GAIN_MIC1_4 671 0x4848 //TX_PREEQ_GAIN_MIC1_5 -672 0x4848 //TX_PREEQ_GAIN_MIC1_6 -673 0x484A //TX_PREEQ_GAIN_MIC1_7 -674 0x4B4E //TX_PREEQ_GAIN_MIC1_8 -675 0x5054 //TX_PREEQ_GAIN_MIC1_9 +672 0x494A //TX_PREEQ_GAIN_MIC1_6 +673 0x4B4C //TX_PREEQ_GAIN_MIC1_7 +674 0x4D4E //TX_PREEQ_GAIN_MIC1_8 +675 0x4F51 //TX_PREEQ_GAIN_MIC1_9 676 0x4848 //TX_PREEQ_GAIN_MIC1_10 677 0x4848 //TX_PREEQ_GAIN_MIC1_11 678 0x4848 //TX_PREEQ_GAIN_MIC1_12 @@ -12977,7 +19397,7 @@ 696 0x0708 //TX_PREEQ_BIN_MIC1_6 697 0x090A //TX_PREEQ_BIN_MIC1_7 698 0x0B0C //TX_PREEQ_BIN_MIC1_8 -699 0x0D08 //TX_PREEQ_BIN_MIC1_9 +699 0x0D0E //TX_PREEQ_BIN_MIC1_9 700 0x0000 //TX_PREEQ_BIN_MIC1_10 701 0x0000 //TX_PREEQ_BIN_MIC1_11 702 0x0000 //TX_PREEQ_BIN_MIC1_12 @@ -13053,8 +19473,8 @@ 772 0x0044 //TX_MIC_PWR_BIAS_3 773 0x0000 //TX_GAIN_LIMIT_0 774 0x0000 //TX_GAIN_LIMIT_1 -775 0x0006 //TX_GAIN_LIMIT_2 -776 0x0006 //TX_GAIN_LIMIT_3 +775 0x0007 //TX_GAIN_LIMIT_2 +776 0x0007 //TX_GAIN_LIMIT_3 777 0x7F5B //TX_BVE_NOVAD0_ALPHADOWN 778 0x7FDE //TX_BVE_VAD0_ALPHAUP 779 0x7F3A //TX_BVE_VAD0_ALPHADOWN @@ -13144,7 +19564,7 @@ 863 0x199A //TX_TDDRC_HMNC_GAIN 864 0x0000 //TX_TDDRC_SMT_FLAG 865 0x0CCD //TX_TDDRC_SMT_W -866 0x0550 //TX_TDDRC_DRC_GAIN +866 0x05A0 //TX_TDDRC_DRC_GAIN 867 0x7FFF //TX_TDDRC_LMT_THRD 868 0x0000 //TX_TDDRC_LMT_ALPHA 869 0x0000 //TX_TFMASKLTH @@ -13175,6 +19595,71 @@ 894 0xC000 //TX_FASTNS_SSA_THHFL 895 0xCCCC //TX_FASTNS_SSA_THLFH 896 0xD999 //TX_FASTNS_SSA_THHFH +897 0x2339 //TX_SENDFUNC_REG_MICMUTE +898 0x0021 //TX_SENDFUNC_REG_MICMUTE1 +899 0x02BC //TX_MICMUTE_RATIO_THR +900 0x0140 //TX_MICMUTE_AMP_THR +901 0x0004 //TX_MICMUTE_HPF_IND +902 0x00C0 //TX_MICMUTE_LOG_EYR_TH +903 0x0008 //TX_MICMUTE_CVG_TIME +904 0x0008 //TX_MICMUTE_RELEASE_TIME +905 0x01FE //TX_MIC_VOLUME_MIC0MUTE +906 0x0020 //TX_MICMUTE_EPD_OFFSET_0 +907 0x001E //TX_MICMUTE_FRQ_AEC_L +908 0x7999 //TX_MICMUTE_EAD_THR +909 0x7FFF //TX_MICMUTE_LAMBDA_CB_NLE +910 0x7FFF //TX_MICMUTE_LAMBDA_RE_EST +911 0x4000 //TX_DTD_THR1_MICMUTE_0 +912 0x7000 //TX_DTD_THR1_MICMUTE_1 +913 0x7FFF //TX_DTD_THR1_MICMUTE_2 +914 0x7FFF //TX_DTD_THR1_MICMUTE_3 +915 0x6CCC //TX_DTD_THR2_MICMUTE_0 +916 0x0400 //TX_MICMUTE_MIN_EQ_RE_EST_0 +917 0x0400 //TX_MICMUTE_MIN_EQ_RE_EST_1 +918 0x1000 //TX_MICMUTE_MIN_EQ_RE_EST_2 +919 0x7FFF //TX_MICMUTE_MIN_EQ_RE_EST_3 +920 0x7FFF //TX_MICMUTE_MIN_EQ_RE_EST_4 +921 0x4000 //TX_MICMUTE_C_POST_FLT +922 0x03E8 //TX_MICMUTE_DT_CUT_K +923 0x0001 //TX_MICMUTE_DT_CUT_THR +924 0x03E8 //TX_MICMUTE_DT_CUT_K2 +925 0x0001 //TX_MICMUTE_DT_CUT_THR2 +926 0x0064 //TX_MICMUTE_DT2_HOLD_N +927 0x1000 //TX_MICMUTE_RATIODTH_THCUT +928 0x1000 //TX_MICMUTE_B_POST_FLT_ECHOL +929 0x7FFF //TX_MICMUTE_B_POST_FLT_ECHOH +930 0x0400 //TX_MICMUTE_C_POST_FLT_MASK +931 0x7999 //TX_MICMUTE_RATIODTL_CUT_TH +932 0x0258 //TX_MICMUTE_DT_CUT_K1 +933 0x0800 //TX_MICMUTE_N2_SN_EST +934 0xFC00 //TX_MICMUTE_THR_SN_EST_0 +935 0x001C //TX_MICMUTE_MIN_G_CTRL_0 +936 0x6000 //TX_MICMUTE_A_POST_FILT_S_0 +937 0x7000 //TX_MICMUTE_B_POST_FILT_0 +938 0x2710 //TX_MIC1RUB_AMP_THR +939 0x0010 //TX_MIC1MUTE_RATIO_THR +940 0x0450 //TX_MIC1MUTE_AMP_THR +941 0x0008 //TX_MIC1MUTE_CVG_TIME +942 0x0008 //TX_MIC1MUTE_RELEASE_TIME +943 0x0000 //TX_AMS_RESRV_01 +944 0x0000 //TX_AMS_RESRV_02 +945 0x0000 //TX_AMS_RESRV_03 +946 0x0000 //TX_AMS_RESRV_04 +947 0x0000 //TX_AMS_RESRV_05 +948 0x0000 //TX_AMS_RESRV_06 +949 0x0000 //TX_AMS_RESRV_07 +950 0x0000 //TX_AMS_RESRV_08 +951 0x0000 //TX_AMS_RESRV_09 +952 0x0000 //TX_AMS_RESRV_10 +953 0x0000 //TX_AMS_RESRV_11 +954 0x0000 //TX_AMS_RESRV_12 +955 0x0000 //TX_AMS_RESRV_13 +956 0x0000 //TX_AMS_RESRV_14 +957 0x0000 //TX_AMS_RESRV_15 +958 0x0000 //TX_AMS_RESRV_16 +959 0x0000 //TX_AMS_RESRV_17 +960 0x0000 //TX_AMS_RESRV_18 +961 0x0000 //TX_AMS_RESRV_19 #RX 0 0x000C //RX_RECVFUNC_MODE_0 1 0x0000 //RX_RECVFUNC_MODE_1 @@ -14026,10 +20511,862 @@ 110 0x0000 //RX_FDDRC_RESRV_0 129 0x0100 //RX_SPK_VOL 130 0x0000 //RX_VOL_RESRV_0 +#RX 2 +157 0x000C //RX_RECVFUNC_MODE_0 +158 0x0000 //RX_RECVFUNC_MODE_1 +159 0x0000 //RX_SAMPLINGFREQ_SIG +160 0x0000 //RX_SAMPLINGFREQ_PROC +161 0x000A //RX_FRAME_SZ +162 0x0000 //RX_DELAY_OPT +163 0x1000 //RX_TDDRC_ALPHA_UP_1 +164 0x1000 //RX_TDDRC_ALPHA_UP_2 +165 0x1000 //RX_TDDRC_ALPHA_UP_3 +166 0x1000 //RX_TDDRC_ALPHA_UP_4 +167 0x0800 //RX_PGA +168 0x7FFF //RX_A_HP +169 0x4000 //RX_B_PE +170 0x7800 //RX_THR_PITCH_DET_0 +171 0x7000 //RX_THR_PITCH_DET_1 +172 0x6000 //RX_THR_PITCH_DET_2 +173 0x0008 //RX_PITCH_BFR_LEN +174 0x0003 //RX_SBD_PITCH_DET +175 0x0100 //RX_PP_RESRV_0 +176 0x0020 //RX_PP_RESRV_1 +177 0x0400 //RX_N_SN_EST +178 0x000C //RX_N2_SN_EST +179 0x0014 //RX_NS_LVL_CTRL +180 0xF800 //RX_THR_SN_EST +181 0x7E00 //RX_LAMBDA_PFILT +182 0x000A //RX_FENS_RESRV_0 +183 0x0190 //RX_FENS_RESRV_1 +184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +187 0x0002 //RX_EXTRA_NS_L +188 0x0800 //RX_EXTRA_NS_A +189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +190 0x7000 //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +192 0x199A //RX_A_POST_FLT +193 0x0000 //RX_LMT_THRD +194 0x4000 //RX_LMT_ALPHA +195 0x0030 //RX_FDEQ_SUBNUM +196 0x4848 //RX_FDEQ_GAIN_0 +197 0x4848 //RX_FDEQ_GAIN_1 +198 0x4844 //RX_FDEQ_GAIN_2 +199 0x4A4C //RX_FDEQ_GAIN_3 +200 0x4E50 //RX_FDEQ_GAIN_4 +201 0x5254 //RX_FDEQ_GAIN_5 +202 0x5658 //RX_FDEQ_GAIN_6 +203 0x5A5C //RX_FDEQ_GAIN_7 +204 0x5C5C //RX_FDEQ_GAIN_8 +205 0x5C5C //RX_FDEQ_GAIN_9 +206 0x5C5C //RX_FDEQ_GAIN_10 +207 0x5C48 //RX_FDEQ_GAIN_11 +208 0x4848 //RX_FDEQ_GAIN_12 +209 0x4848 //RX_FDEQ_GAIN_13 +210 0x4848 //RX_FDEQ_GAIN_14 +211 0x4848 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0202 //RX_FDEQ_BIN_0 +221 0x0203 //RX_FDEQ_BIN_1 +222 0x0402 //RX_FDEQ_BIN_2 +223 0x0303 //RX_FDEQ_BIN_3 +224 0x0303 //RX_FDEQ_BIN_4 +225 0x0303 //RX_FDEQ_BIN_5 +226 0x0303 //RX_FDEQ_BIN_6 +227 0x0303 //RX_FDEQ_BIN_7 +228 0x0A0A //RX_FDEQ_BIN_8 +229 0x0A0E //RX_FDEQ_BIN_9 +230 0x0000 //RX_FDEQ_BIN_10 +231 0x0000 //RX_FDEQ_BIN_11 +232 0x0000 //RX_FDEQ_BIN_12 +233 0x0000 //RX_FDEQ_BIN_13 +234 0x0000 //RX_FDEQ_BIN_14 +235 0x0000 //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x4000 //RX_FDEQ_RESRV_0 +245 0x0320 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0030 //RX_FDDRC_BAND_MARGIN_1 +248 0x0050 //RX_FDDRC_BAND_MARGIN_2 +249 0x0080 //RX_FDDRC_BAND_MARGIN_3 +250 0x0007 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x5000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x6400 //RX_FDDRC_THRD_3_2 +258 0x6400 //RX_FDDRC_THRD_3_3 +259 0x2000 //RX_FDDRC_SLANT_0_0 +260 0x2000 //RX_FDDRC_SLANT_0_1 +261 0x2000 //RX_FDDRC_SLANT_0_2 +262 0x2000 //RX_FDDRC_SLANT_0_3 +263 0x5333 //RX_FDDRC_SLANT_1_0 +264 0x5333 //RX_FDDRC_SLANT_1_1 +265 0x5333 //RX_FDDRC_SLANT_1_2 +266 0x5333 //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +268 0x0002 //RX_FILTINDX +269 0x0000 //RX_TDDRC_THRD_0 +270 0x0000 //RX_TDDRC_THRD_1 +271 0x1800 //RX_TDDRC_THRD_2 +272 0x1800 //RX_TDDRC_THRD_3 +273 0x3000 //RX_TDDRC_SLANT_0 +274 0x6E00 //RX_TDDRC_SLANT_1 +275 0x1000 //RX_TDDRC_ALPHA_UP_0 +276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x199A //RX_TDDRC_HMNC_GAIN +279 0x0001 //RX_TDDRC_SMT_FLAG +280 0x0CCD //RX_TDDRC_SMT_W +281 0x0360 //RX_TDDRC_DRC_GAIN +282 0x7C00 //RX_LAMBDA_PKA_FP +283 0x2000 //RX_TPKA_FP +284 0x2000 //RX_MIN_G_FP +285 0x0080 //RX_MAX_G_FP +286 0x0100 //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 +288 0x0000 //RX_MAXLEVEL_CNG +289 0x3000 //RX_BWE_UV_TH +290 0x3000 //RX_BWE_UV_TH2 +291 0x1800 //RX_BWE_UV_TH3 +292 0x1000 //RX_BWE_V_TH +293 0x04CD //RX_BWE_GAIN1_V_TH1 +294 0x0F33 //RX_BWE_GAIN1_V_TH2 +295 0x7333 //RX_BWE_UV_EQ +296 0x199A //RX_BWE_V_EQ +297 0x7333 //RX_BWE_TONE_TH +298 0x0004 //RX_BWE_UV_HOLD_T +299 0x6CCD //RX_BWE_GAIN2_ALPHA +300 0x799A //RX_BWE_GAIN3_ALPHA +301 0x001E //RX_BWE_CUTOFF +302 0x3000 //RX_BWE_GAINFILL +303 0x3200 //RX_BWE_MAXTH_TONE +304 0x2000 //RX_BWE_EQ_0 +305 0x2000 //RX_BWE_EQ_1 +306 0x2000 //RX_BWE_EQ_2 +307 0x2000 //RX_BWE_EQ_3 +308 0x2000 //RX_BWE_EQ_4 +309 0x2000 //RX_BWE_EQ_5 +310 0x2000 //RX_BWE_EQ_6 +311 0x0000 //RX_BWE_RESRV_0 +312 0x0000 //RX_BWE_RESRV_1 +313 0x0000 //RX_BWE_RESRV_2 +#VOL 0 +163 0x1000 //RX_TDDRC_ALPHA_UP_1 +164 0x1000 //RX_TDDRC_ALPHA_UP_2 +165 0x1000 //RX_TDDRC_ALPHA_UP_3 +166 0x1000 //RX_TDDRC_ALPHA_UP_4 +184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +190 0x7000 //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +269 0x0000 //RX_TDDRC_THRD_0 +270 0x0000 //RX_TDDRC_THRD_1 +271 0x1800 //RX_TDDRC_THRD_2 +272 0x1800 //RX_TDDRC_THRD_3 +273 0x3000 //RX_TDDRC_SLANT_0 +274 0x6E00 //RX_TDDRC_SLANT_1 +275 0x1000 //RX_TDDRC_ALPHA_UP_0 +276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x199A //RX_TDDRC_HMNC_GAIN +279 0x0001 //RX_TDDRC_SMT_FLAG +280 0x0CCD //RX_TDDRC_SMT_W +281 0x0360 //RX_TDDRC_DRC_GAIN +195 0x0030 //RX_FDEQ_SUBNUM +196 0x4848 //RX_FDEQ_GAIN_0 +197 0x4848 //RX_FDEQ_GAIN_1 +198 0x4844 //RX_FDEQ_GAIN_2 +199 0x4A4C //RX_FDEQ_GAIN_3 +200 0x4E50 //RX_FDEQ_GAIN_4 +201 0x5254 //RX_FDEQ_GAIN_5 +202 0x5658 //RX_FDEQ_GAIN_6 +203 0x5A5C //RX_FDEQ_GAIN_7 +204 0x5C5C //RX_FDEQ_GAIN_8 +205 0x5C5C //RX_FDEQ_GAIN_9 +206 0x5C5C //RX_FDEQ_GAIN_10 +207 0x5C48 //RX_FDEQ_GAIN_11 +208 0x4848 //RX_FDEQ_GAIN_12 +209 0x4848 //RX_FDEQ_GAIN_13 +210 0x4848 //RX_FDEQ_GAIN_14 +211 0x4848 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0202 //RX_FDEQ_BIN_0 +221 0x0203 //RX_FDEQ_BIN_1 +222 0x0402 //RX_FDEQ_BIN_2 +223 0x0303 //RX_FDEQ_BIN_3 +224 0x0303 //RX_FDEQ_BIN_4 +225 0x0303 //RX_FDEQ_BIN_5 +226 0x0303 //RX_FDEQ_BIN_6 +227 0x0303 //RX_FDEQ_BIN_7 +228 0x0A0A //RX_FDEQ_BIN_8 +229 0x0A0E //RX_FDEQ_BIN_9 +230 0x0000 //RX_FDEQ_BIN_10 +231 0x0000 //RX_FDEQ_BIN_11 +232 0x0000 //RX_FDEQ_BIN_12 +233 0x0000 //RX_FDEQ_BIN_13 +234 0x0000 //RX_FDEQ_BIN_14 +235 0x0000 //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x4000 //RX_FDEQ_RESRV_0 +245 0x0320 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0030 //RX_FDDRC_BAND_MARGIN_1 +248 0x0050 //RX_FDDRC_BAND_MARGIN_2 +249 0x0080 //RX_FDDRC_BAND_MARGIN_3 +250 0x0007 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x5000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x6400 //RX_FDDRC_THRD_3_2 +258 0x6400 //RX_FDDRC_THRD_3_3 +259 0x2000 //RX_FDDRC_SLANT_0_0 +260 0x2000 //RX_FDDRC_SLANT_0_1 +261 0x2000 //RX_FDDRC_SLANT_0_2 +262 0x2000 //RX_FDDRC_SLANT_0_3 +263 0x5333 //RX_FDDRC_SLANT_1_0 +264 0x5333 //RX_FDDRC_SLANT_1_1 +265 0x5333 //RX_FDDRC_SLANT_1_2 +266 0x5333 //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +286 0x0100 //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 +#VOL 1 +163 0x1000 //RX_TDDRC_ALPHA_UP_1 +164 0x1000 //RX_TDDRC_ALPHA_UP_2 +165 0x1000 //RX_TDDRC_ALPHA_UP_3 +166 0x1000 //RX_TDDRC_ALPHA_UP_4 +184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +190 0x7000 //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +269 0x0000 //RX_TDDRC_THRD_0 +270 0x0000 //RX_TDDRC_THRD_1 +271 0x1800 //RX_TDDRC_THRD_2 +272 0x1800 //RX_TDDRC_THRD_3 +273 0x3000 //RX_TDDRC_SLANT_0 +274 0x6E00 //RX_TDDRC_SLANT_1 +275 0x1000 //RX_TDDRC_ALPHA_UP_0 +276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x199A //RX_TDDRC_HMNC_GAIN +279 0x0001 //RX_TDDRC_SMT_FLAG +280 0x0CCD //RX_TDDRC_SMT_W +281 0x0360 //RX_TDDRC_DRC_GAIN +195 0x0030 //RX_FDEQ_SUBNUM +196 0x4848 //RX_FDEQ_GAIN_0 +197 0x4848 //RX_FDEQ_GAIN_1 +198 0x4844 //RX_FDEQ_GAIN_2 +199 0x4A4C //RX_FDEQ_GAIN_3 +200 0x4E50 //RX_FDEQ_GAIN_4 +201 0x5254 //RX_FDEQ_GAIN_5 +202 0x5658 //RX_FDEQ_GAIN_6 +203 0x5A5C //RX_FDEQ_GAIN_7 +204 0x5C5C //RX_FDEQ_GAIN_8 +205 0x5C5C //RX_FDEQ_GAIN_9 +206 0x5C5C //RX_FDEQ_GAIN_10 +207 0x5C48 //RX_FDEQ_GAIN_11 +208 0x4848 //RX_FDEQ_GAIN_12 +209 0x4848 //RX_FDEQ_GAIN_13 +210 0x4848 //RX_FDEQ_GAIN_14 +211 0x4848 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0202 //RX_FDEQ_BIN_0 +221 0x0203 //RX_FDEQ_BIN_1 +222 0x0402 //RX_FDEQ_BIN_2 +223 0x0303 //RX_FDEQ_BIN_3 +224 0x0303 //RX_FDEQ_BIN_4 +225 0x0303 //RX_FDEQ_BIN_5 +226 0x0303 //RX_FDEQ_BIN_6 +227 0x0303 //RX_FDEQ_BIN_7 +228 0x0A0A //RX_FDEQ_BIN_8 +229 0x0A0E //RX_FDEQ_BIN_9 +230 0x0000 //RX_FDEQ_BIN_10 +231 0x0000 //RX_FDEQ_BIN_11 +232 0x0000 //RX_FDEQ_BIN_12 +233 0x0000 //RX_FDEQ_BIN_13 +234 0x0000 //RX_FDEQ_BIN_14 +235 0x0000 //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x4000 //RX_FDEQ_RESRV_0 +245 0x0320 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0030 //RX_FDDRC_BAND_MARGIN_1 +248 0x0050 //RX_FDDRC_BAND_MARGIN_2 +249 0x0080 //RX_FDDRC_BAND_MARGIN_3 +250 0x0007 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x5000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x6400 //RX_FDDRC_THRD_3_2 +258 0x6400 //RX_FDDRC_THRD_3_3 +259 0x2000 //RX_FDDRC_SLANT_0_0 +260 0x2000 //RX_FDDRC_SLANT_0_1 +261 0x2000 //RX_FDDRC_SLANT_0_2 +262 0x2000 //RX_FDDRC_SLANT_0_3 +263 0x5333 //RX_FDDRC_SLANT_1_0 +264 0x5333 //RX_FDDRC_SLANT_1_1 +265 0x5333 //RX_FDDRC_SLANT_1_2 +266 0x5333 //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +286 0x0100 //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 +#VOL 2 +163 0x1000 //RX_TDDRC_ALPHA_UP_1 +164 0x1000 //RX_TDDRC_ALPHA_UP_2 +165 0x1000 //RX_TDDRC_ALPHA_UP_3 +166 0x1000 //RX_TDDRC_ALPHA_UP_4 +184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +190 0x7000 //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +269 0x0000 //RX_TDDRC_THRD_0 +270 0x0000 //RX_TDDRC_THRD_1 +271 0x1800 //RX_TDDRC_THRD_2 +272 0x1800 //RX_TDDRC_THRD_3 +273 0x3000 //RX_TDDRC_SLANT_0 +274 0x6E00 //RX_TDDRC_SLANT_1 +275 0x1000 //RX_TDDRC_ALPHA_UP_0 +276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x199A //RX_TDDRC_HMNC_GAIN +279 0x0001 //RX_TDDRC_SMT_FLAG +280 0x0CCD //RX_TDDRC_SMT_W +281 0x0360 //RX_TDDRC_DRC_GAIN +195 0x0030 //RX_FDEQ_SUBNUM +196 0x4848 //RX_FDEQ_GAIN_0 +197 0x4848 //RX_FDEQ_GAIN_1 +198 0x4844 //RX_FDEQ_GAIN_2 +199 0x4A4C //RX_FDEQ_GAIN_3 +200 0x4E50 //RX_FDEQ_GAIN_4 +201 0x5254 //RX_FDEQ_GAIN_5 +202 0x5658 //RX_FDEQ_GAIN_6 +203 0x5A5C //RX_FDEQ_GAIN_7 +204 0x5C5C //RX_FDEQ_GAIN_8 +205 0x5C5C //RX_FDEQ_GAIN_9 +206 0x5C5C //RX_FDEQ_GAIN_10 +207 0x5C48 //RX_FDEQ_GAIN_11 +208 0x4848 //RX_FDEQ_GAIN_12 +209 0x4848 //RX_FDEQ_GAIN_13 +210 0x4848 //RX_FDEQ_GAIN_14 +211 0x4848 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0202 //RX_FDEQ_BIN_0 +221 0x0203 //RX_FDEQ_BIN_1 +222 0x0402 //RX_FDEQ_BIN_2 +223 0x0303 //RX_FDEQ_BIN_3 +224 0x0303 //RX_FDEQ_BIN_4 +225 0x0303 //RX_FDEQ_BIN_5 +226 0x0303 //RX_FDEQ_BIN_6 +227 0x0303 //RX_FDEQ_BIN_7 +228 0x0A0A //RX_FDEQ_BIN_8 +229 0x0A0E //RX_FDEQ_BIN_9 +230 0x0000 //RX_FDEQ_BIN_10 +231 0x0000 //RX_FDEQ_BIN_11 +232 0x0000 //RX_FDEQ_BIN_12 +233 0x0000 //RX_FDEQ_BIN_13 +234 0x0000 //RX_FDEQ_BIN_14 +235 0x0000 //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x4000 //RX_FDEQ_RESRV_0 +245 0x0320 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0030 //RX_FDDRC_BAND_MARGIN_1 +248 0x0050 //RX_FDDRC_BAND_MARGIN_2 +249 0x0080 //RX_FDDRC_BAND_MARGIN_3 +250 0x0007 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x5000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x6400 //RX_FDDRC_THRD_3_2 +258 0x6400 //RX_FDDRC_THRD_3_3 +259 0x2000 //RX_FDDRC_SLANT_0_0 +260 0x2000 //RX_FDDRC_SLANT_0_1 +261 0x2000 //RX_FDDRC_SLANT_0_2 +262 0x2000 //RX_FDDRC_SLANT_0_3 +263 0x5333 //RX_FDDRC_SLANT_1_0 +264 0x5333 //RX_FDDRC_SLANT_1_1 +265 0x5333 //RX_FDDRC_SLANT_1_2 +266 0x5333 //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +286 0x0100 //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 +#VOL 3 +163 0x1000 //RX_TDDRC_ALPHA_UP_1 +164 0x1000 //RX_TDDRC_ALPHA_UP_2 +165 0x1000 //RX_TDDRC_ALPHA_UP_3 +166 0x1000 //RX_TDDRC_ALPHA_UP_4 +184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +190 0x7000 //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +269 0x0000 //RX_TDDRC_THRD_0 +270 0x0000 //RX_TDDRC_THRD_1 +271 0x1800 //RX_TDDRC_THRD_2 +272 0x1800 //RX_TDDRC_THRD_3 +273 0x3000 //RX_TDDRC_SLANT_0 +274 0x6E00 //RX_TDDRC_SLANT_1 +275 0x1000 //RX_TDDRC_ALPHA_UP_0 +276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x199A //RX_TDDRC_HMNC_GAIN +279 0x0001 //RX_TDDRC_SMT_FLAG +280 0x0CCD //RX_TDDRC_SMT_W +281 0x0360 //RX_TDDRC_DRC_GAIN +195 0x0030 //RX_FDEQ_SUBNUM +196 0x4848 //RX_FDEQ_GAIN_0 +197 0x4848 //RX_FDEQ_GAIN_1 +198 0x4844 //RX_FDEQ_GAIN_2 +199 0x4A4C //RX_FDEQ_GAIN_3 +200 0x4E50 //RX_FDEQ_GAIN_4 +201 0x5254 //RX_FDEQ_GAIN_5 +202 0x5658 //RX_FDEQ_GAIN_6 +203 0x5A5C //RX_FDEQ_GAIN_7 +204 0x5C5C //RX_FDEQ_GAIN_8 +205 0x5C5C //RX_FDEQ_GAIN_9 +206 0x5C5C //RX_FDEQ_GAIN_10 +207 0x5C48 //RX_FDEQ_GAIN_11 +208 0x4848 //RX_FDEQ_GAIN_12 +209 0x4848 //RX_FDEQ_GAIN_13 +210 0x4848 //RX_FDEQ_GAIN_14 +211 0x4848 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0202 //RX_FDEQ_BIN_0 +221 0x0203 //RX_FDEQ_BIN_1 +222 0x0402 //RX_FDEQ_BIN_2 +223 0x0303 //RX_FDEQ_BIN_3 +224 0x0303 //RX_FDEQ_BIN_4 +225 0x0303 //RX_FDEQ_BIN_5 +226 0x0303 //RX_FDEQ_BIN_6 +227 0x0303 //RX_FDEQ_BIN_7 +228 0x0A0A //RX_FDEQ_BIN_8 +229 0x0A0E //RX_FDEQ_BIN_9 +230 0x0000 //RX_FDEQ_BIN_10 +231 0x0000 //RX_FDEQ_BIN_11 +232 0x0000 //RX_FDEQ_BIN_12 +233 0x0000 //RX_FDEQ_BIN_13 +234 0x0000 //RX_FDEQ_BIN_14 +235 0x0000 //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x4000 //RX_FDEQ_RESRV_0 +245 0x0320 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0030 //RX_FDDRC_BAND_MARGIN_1 +248 0x0050 //RX_FDDRC_BAND_MARGIN_2 +249 0x0080 //RX_FDDRC_BAND_MARGIN_3 +250 0x0007 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x5000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x6400 //RX_FDDRC_THRD_3_2 +258 0x6400 //RX_FDDRC_THRD_3_3 +259 0x2000 //RX_FDDRC_SLANT_0_0 +260 0x2000 //RX_FDDRC_SLANT_0_1 +261 0x2000 //RX_FDDRC_SLANT_0_2 +262 0x2000 //RX_FDDRC_SLANT_0_3 +263 0x5333 //RX_FDDRC_SLANT_1_0 +264 0x5333 //RX_FDDRC_SLANT_1_1 +265 0x5333 //RX_FDDRC_SLANT_1_2 +266 0x5333 //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +286 0x0100 //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 +#VOL 4 +163 0x1000 //RX_TDDRC_ALPHA_UP_1 +164 0x1000 //RX_TDDRC_ALPHA_UP_2 +165 0x1000 //RX_TDDRC_ALPHA_UP_3 +166 0x1000 //RX_TDDRC_ALPHA_UP_4 +184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +190 0x7000 //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +269 0x0000 //RX_TDDRC_THRD_0 +270 0x0000 //RX_TDDRC_THRD_1 +271 0x1800 //RX_TDDRC_THRD_2 +272 0x1800 //RX_TDDRC_THRD_3 +273 0x3000 //RX_TDDRC_SLANT_0 +274 0x6E00 //RX_TDDRC_SLANT_1 +275 0x1000 //RX_TDDRC_ALPHA_UP_0 +276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x199A //RX_TDDRC_HMNC_GAIN +279 0x0001 //RX_TDDRC_SMT_FLAG +280 0x0CCD //RX_TDDRC_SMT_W +281 0x0360 //RX_TDDRC_DRC_GAIN +195 0x0030 //RX_FDEQ_SUBNUM +196 0x4848 //RX_FDEQ_GAIN_0 +197 0x4848 //RX_FDEQ_GAIN_1 +198 0x4844 //RX_FDEQ_GAIN_2 +199 0x4A4C //RX_FDEQ_GAIN_3 +200 0x4E50 //RX_FDEQ_GAIN_4 +201 0x5254 //RX_FDEQ_GAIN_5 +202 0x5658 //RX_FDEQ_GAIN_6 +203 0x5A5C //RX_FDEQ_GAIN_7 +204 0x5C5C //RX_FDEQ_GAIN_8 +205 0x5C5C //RX_FDEQ_GAIN_9 +206 0x5C5C //RX_FDEQ_GAIN_10 +207 0x5C48 //RX_FDEQ_GAIN_11 +208 0x4848 //RX_FDEQ_GAIN_12 +209 0x4848 //RX_FDEQ_GAIN_13 +210 0x4848 //RX_FDEQ_GAIN_14 +211 0x4848 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0202 //RX_FDEQ_BIN_0 +221 0x0203 //RX_FDEQ_BIN_1 +222 0x0402 //RX_FDEQ_BIN_2 +223 0x0303 //RX_FDEQ_BIN_3 +224 0x0303 //RX_FDEQ_BIN_4 +225 0x0303 //RX_FDEQ_BIN_5 +226 0x0303 //RX_FDEQ_BIN_6 +227 0x0303 //RX_FDEQ_BIN_7 +228 0x0A0A //RX_FDEQ_BIN_8 +229 0x0A0E //RX_FDEQ_BIN_9 +230 0x0000 //RX_FDEQ_BIN_10 +231 0x0000 //RX_FDEQ_BIN_11 +232 0x0000 //RX_FDEQ_BIN_12 +233 0x0000 //RX_FDEQ_BIN_13 +234 0x0000 //RX_FDEQ_BIN_14 +235 0x0000 //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x4000 //RX_FDEQ_RESRV_0 +245 0x0320 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0030 //RX_FDDRC_BAND_MARGIN_1 +248 0x0050 //RX_FDDRC_BAND_MARGIN_2 +249 0x0080 //RX_FDDRC_BAND_MARGIN_3 +250 0x0007 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x5000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x6400 //RX_FDDRC_THRD_3_2 +258 0x6400 //RX_FDDRC_THRD_3_3 +259 0x2000 //RX_FDDRC_SLANT_0_0 +260 0x2000 //RX_FDDRC_SLANT_0_1 +261 0x2000 //RX_FDDRC_SLANT_0_2 +262 0x2000 //RX_FDDRC_SLANT_0_3 +263 0x5333 //RX_FDDRC_SLANT_1_0 +264 0x5333 //RX_FDDRC_SLANT_1_1 +265 0x5333 //RX_FDDRC_SLANT_1_2 +266 0x5333 //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +286 0x0100 //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 +#VOL 5 +163 0x1000 //RX_TDDRC_ALPHA_UP_1 +164 0x1000 //RX_TDDRC_ALPHA_UP_2 +165 0x1000 //RX_TDDRC_ALPHA_UP_3 +166 0x1000 //RX_TDDRC_ALPHA_UP_4 +184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +190 0x7000 //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +269 0x0000 //RX_TDDRC_THRD_0 +270 0x0000 //RX_TDDRC_THRD_1 +271 0x1800 //RX_TDDRC_THRD_2 +272 0x1800 //RX_TDDRC_THRD_3 +273 0x3000 //RX_TDDRC_SLANT_0 +274 0x6E00 //RX_TDDRC_SLANT_1 +275 0x1000 //RX_TDDRC_ALPHA_UP_0 +276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x199A //RX_TDDRC_HMNC_GAIN +279 0x0001 //RX_TDDRC_SMT_FLAG +280 0x0CCD //RX_TDDRC_SMT_W +281 0x0360 //RX_TDDRC_DRC_GAIN +195 0x0030 //RX_FDEQ_SUBNUM +196 0x4848 //RX_FDEQ_GAIN_0 +197 0x4848 //RX_FDEQ_GAIN_1 +198 0x4844 //RX_FDEQ_GAIN_2 +199 0x4A4C //RX_FDEQ_GAIN_3 +200 0x4E50 //RX_FDEQ_GAIN_4 +201 0x5254 //RX_FDEQ_GAIN_5 +202 0x5658 //RX_FDEQ_GAIN_6 +203 0x5A5C //RX_FDEQ_GAIN_7 +204 0x5C5C //RX_FDEQ_GAIN_8 +205 0x5C5C //RX_FDEQ_GAIN_9 +206 0x5C5C //RX_FDEQ_GAIN_10 +207 0x5C48 //RX_FDEQ_GAIN_11 +208 0x4848 //RX_FDEQ_GAIN_12 +209 0x4848 //RX_FDEQ_GAIN_13 +210 0x4848 //RX_FDEQ_GAIN_14 +211 0x4848 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0202 //RX_FDEQ_BIN_0 +221 0x0203 //RX_FDEQ_BIN_1 +222 0x0402 //RX_FDEQ_BIN_2 +223 0x0303 //RX_FDEQ_BIN_3 +224 0x0303 //RX_FDEQ_BIN_4 +225 0x0303 //RX_FDEQ_BIN_5 +226 0x0303 //RX_FDEQ_BIN_6 +227 0x0303 //RX_FDEQ_BIN_7 +228 0x0A0A //RX_FDEQ_BIN_8 +229 0x0A0E //RX_FDEQ_BIN_9 +230 0x0000 //RX_FDEQ_BIN_10 +231 0x0000 //RX_FDEQ_BIN_11 +232 0x0000 //RX_FDEQ_BIN_12 +233 0x0000 //RX_FDEQ_BIN_13 +234 0x0000 //RX_FDEQ_BIN_14 +235 0x0000 //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x4000 //RX_FDEQ_RESRV_0 +245 0x0320 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0030 //RX_FDDRC_BAND_MARGIN_1 +248 0x0050 //RX_FDDRC_BAND_MARGIN_2 +249 0x0080 //RX_FDDRC_BAND_MARGIN_3 +250 0x0007 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x5000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x6400 //RX_FDDRC_THRD_3_2 +258 0x6400 //RX_FDDRC_THRD_3_3 +259 0x2000 //RX_FDDRC_SLANT_0_0 +260 0x2000 //RX_FDDRC_SLANT_0_1 +261 0x2000 //RX_FDDRC_SLANT_0_2 +262 0x2000 //RX_FDDRC_SLANT_0_3 +263 0x5333 //RX_FDDRC_SLANT_1_0 +264 0x5333 //RX_FDDRC_SLANT_1_1 +265 0x5333 //RX_FDDRC_SLANT_1_2 +266 0x5333 //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +286 0x0100 //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 +#VOL 6 +163 0x1000 //RX_TDDRC_ALPHA_UP_1 +164 0x1000 //RX_TDDRC_ALPHA_UP_2 +165 0x1000 //RX_TDDRC_ALPHA_UP_3 +166 0x1000 //RX_TDDRC_ALPHA_UP_4 +184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +190 0x7000 //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +269 0x0000 //RX_TDDRC_THRD_0 +270 0x0000 //RX_TDDRC_THRD_1 +271 0x1800 //RX_TDDRC_THRD_2 +272 0x1800 //RX_TDDRC_THRD_3 +273 0x3000 //RX_TDDRC_SLANT_0 +274 0x6E00 //RX_TDDRC_SLANT_1 +275 0x1000 //RX_TDDRC_ALPHA_UP_0 +276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x199A //RX_TDDRC_HMNC_GAIN +279 0x0001 //RX_TDDRC_SMT_FLAG +280 0x0CCD //RX_TDDRC_SMT_W +281 0x0360 //RX_TDDRC_DRC_GAIN +195 0x0030 //RX_FDEQ_SUBNUM +196 0x4848 //RX_FDEQ_GAIN_0 +197 0x4848 //RX_FDEQ_GAIN_1 +198 0x4844 //RX_FDEQ_GAIN_2 +199 0x4A4C //RX_FDEQ_GAIN_3 +200 0x4E50 //RX_FDEQ_GAIN_4 +201 0x5254 //RX_FDEQ_GAIN_5 +202 0x5658 //RX_FDEQ_GAIN_6 +203 0x5A5C //RX_FDEQ_GAIN_7 +204 0x5C5C //RX_FDEQ_GAIN_8 +205 0x5C5C //RX_FDEQ_GAIN_9 +206 0x5C5C //RX_FDEQ_GAIN_10 +207 0x5C48 //RX_FDEQ_GAIN_11 +208 0x4848 //RX_FDEQ_GAIN_12 +209 0x4848 //RX_FDEQ_GAIN_13 +210 0x4848 //RX_FDEQ_GAIN_14 +211 0x4848 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0202 //RX_FDEQ_BIN_0 +221 0x0203 //RX_FDEQ_BIN_1 +222 0x0402 //RX_FDEQ_BIN_2 +223 0x0303 //RX_FDEQ_BIN_3 +224 0x0303 //RX_FDEQ_BIN_4 +225 0x0303 //RX_FDEQ_BIN_5 +226 0x0303 //RX_FDEQ_BIN_6 +227 0x0303 //RX_FDEQ_BIN_7 +228 0x0A0A //RX_FDEQ_BIN_8 +229 0x0A0E //RX_FDEQ_BIN_9 +230 0x0000 //RX_FDEQ_BIN_10 +231 0x0000 //RX_FDEQ_BIN_11 +232 0x0000 //RX_FDEQ_BIN_12 +233 0x0000 //RX_FDEQ_BIN_13 +234 0x0000 //RX_FDEQ_BIN_14 +235 0x0000 //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x4000 //RX_FDEQ_RESRV_0 +245 0x0320 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0030 //RX_FDDRC_BAND_MARGIN_1 +248 0x0050 //RX_FDDRC_BAND_MARGIN_2 +249 0x0080 //RX_FDDRC_BAND_MARGIN_3 +250 0x0007 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x5000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x6400 //RX_FDDRC_THRD_3_2 +258 0x6400 //RX_FDDRC_THRD_3_3 +259 0x2000 //RX_FDDRC_SLANT_0_0 +260 0x2000 //RX_FDDRC_SLANT_0_1 +261 0x2000 //RX_FDDRC_SLANT_0_2 +262 0x2000 //RX_FDDRC_SLANT_0_3 +263 0x5333 //RX_FDDRC_SLANT_1_0 +264 0x5333 //RX_FDDRC_SLANT_1_1 +265 0x5333 //RX_FDDRC_SLANT_1_2 +266 0x5333 //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +286 0x0100 //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 #CASE_NAME HANDSET-HANDSET_HAC-VOICE_GENERIC-WB -#PARAM_TYPE TX+RX -#TOTAL_CUSTOM_STEP 7 +#PARAM_MODE Full +#PARAM_TYPE TX+2RX +#TOTAL_CUSTOM_STEP 7+7 #TX 0 0x0000 //TX_OPERATION_MODE_0 1 0x0000 //TX_OPERATION_MODE_1 @@ -14052,7 +21389,7 @@ 18 0x0000 //TX_SYS_RESRV_2 19 0x0000 //TX_SYS_RESRV_3 20 0x0000 //TX_DIST2REF0 -21 0x00A4 //TX_DIST2REF1 +21 0x00A3 //TX_DIST2REF1 22 0x0000 //TX_DIST2REF_02 23 0x0000 //TX_DIST2REF_03 24 0x0000 //TX_DIST2REF_04 @@ -14282,16 +21619,16 @@ 248 0xF800 //TX_THR_SN_EST_6 249 0xF700 //TX_THR_SN_EST_7 250 0x0000 //TX_DELTA_THR_SN_EST_0 -251 0x0100 //TX_DELTA_THR_SN_EST_1 -252 0x01A0 //TX_DELTA_THR_SN_EST_2 +251 0x01A0 //TX_DELTA_THR_SN_EST_1 +252 0x0200 //TX_DELTA_THR_SN_EST_2 253 0x0200 //TX_DELTA_THR_SN_EST_3 -254 0x0200 //TX_DELTA_THR_SN_EST_4 -255 0x0100 //TX_DELTA_THR_SN_EST_5 -256 0x0200 //TX_DELTA_THR_SN_EST_6 +254 0x0100 //TX_DELTA_THR_SN_EST_4 +255 0x0200 //TX_DELTA_THR_SN_EST_5 +256 0x0100 //TX_DELTA_THR_SN_EST_6 257 0x0200 //TX_DELTA_THR_SN_EST_7 258 0x4000 //TX_LAMBDA_NN_EST_0 -259 0x4000 //TX_LAMBDA_NN_EST_1 -260 0x5000 //TX_LAMBDA_NN_EST_2 +259 0x5000 //TX_LAMBDA_NN_EST_1 +260 0x4000 //TX_LAMBDA_NN_EST_2 261 0x4000 //TX_LAMBDA_NN_EST_3 262 0x4000 //TX_LAMBDA_NN_EST_4 263 0x4000 //TX_LAMBDA_NN_EST_5 @@ -14313,18 +21650,18 @@ 279 0x1000 //TX_B_POST_FLT_0 280 0x4000 //TX_B_POST_FLT_1 281 0x0018 //TX_NS_LVL_CTRL_0 -282 0x001C //TX_NS_LVL_CTRL_1 -283 0x0019 //TX_NS_LVL_CTRL_2 -284 0x0018 //TX_NS_LVL_CTRL_3 -285 0x0019 //TX_NS_LVL_CTRL_4 -286 0x001A //TX_NS_LVL_CTRL_5 -287 0x001E //TX_NS_LVL_CTRL_6 +282 0x0019 //TX_NS_LVL_CTRL_1 +283 0x0018 //TX_NS_LVL_CTRL_2 +284 0x0019 //TX_NS_LVL_CTRL_3 +285 0x001A //TX_NS_LVL_CTRL_4 +286 0x001E //TX_NS_LVL_CTRL_5 +287 0x001C //TX_NS_LVL_CTRL_6 288 0x001C //TX_NS_LVL_CTRL_7 289 0x000E //TX_MIN_GAIN_S_0 -290 0x0018 //TX_MIN_GAIN_S_1 +290 0x0012 //TX_MIN_GAIN_S_1 291 0x0012 //TX_MIN_GAIN_S_2 292 0x0012 //TX_MIN_GAIN_S_3 -293 0x0012 //TX_MIN_GAIN_S_4 +293 0x0018 //TX_MIN_GAIN_S_4 294 0x0018 //TX_MIN_GAIN_S_5 295 0x0018 //TX_MIN_GAIN_S_6 296 0x0018 //TX_MIN_GAIN_S_7 @@ -14332,8 +21669,8 @@ 298 0x0000 //TX_NS_MAX_PRI_SNR_TH 299 0x0000 //TX_NMOS_SUP_MENSA 300 0x7FFF //TX_SNRI_SUP_0 -301 0x4000 //TX_SNRI_SUP_1 -302 0x5000 //TX_SNRI_SUP_2 +301 0x5000 //TX_SNRI_SUP_1 +302 0x4000 //TX_SNRI_SUP_2 303 0x4000 //TX_SNRI_SUP_3 304 0x4000 //TX_SNRI_SUP_4 305 0x4000 //TX_SNRI_SUP_5 @@ -14346,28 +21683,28 @@ 312 0x7FFF //TX_A_POST_FILT_0 313 0x2000 //TX_A_POST_FILT_1 314 0x7000 //TX_A_POST_FILT_S_0 -315 0x7000 //TX_A_POST_FILT_S_1 +315 0x3000 //TX_A_POST_FILT_S_1 316 0x3000 //TX_A_POST_FILT_S_2 -317 0x3000 //TX_A_POST_FILT_S_3 -318 0x2000 //TX_A_POST_FILT_S_4 +317 0x2000 //TX_A_POST_FILT_S_3 +318 0x7000 //TX_A_POST_FILT_S_4 319 0x7000 //TX_A_POST_FILT_S_5 320 0x7000 //TX_A_POST_FILT_S_6 321 0x7000 //TX_A_POST_FILT_S_7 322 0x1000 //TX_B_POST_FILT_0 323 0x4000 //TX_B_POST_FILT_1 -324 0x5000 //TX_B_POST_FILT_2 +324 0x4000 //TX_B_POST_FILT_2 325 0x4000 //TX_B_POST_FILT_3 326 0x4000 //TX_B_POST_FILT_4 327 0x4000 //TX_B_POST_FILT_5 -328 0x4000 //TX_B_POST_FILT_6 +328 0x5000 //TX_B_POST_FILT_6 329 0x4000 //TX_B_POST_FILT_7 330 0x4000 //TX_B_LESSCUT_RTO_S_0 331 0x6000 //TX_B_LESSCUT_RTO_S_1 332 0x6000 //TX_B_LESSCUT_RTO_S_2 333 0x6000 //TX_B_LESSCUT_RTO_S_3 -334 0x6000 //TX_B_LESSCUT_RTO_S_4 +334 0x7FFF //TX_B_LESSCUT_RTO_S_4 335 0x6000 //TX_B_LESSCUT_RTO_S_5 -336 0x7FFF //TX_B_LESSCUT_RTO_S_6 +336 0x6000 //TX_B_LESSCUT_RTO_S_6 337 0x7FFF //TX_B_LESSCUT_RTO_S_7 338 0x7C29 //TX_LAMBDA_PFILT 339 0x7C29 //TX_LAMBDA_PFILT_S_0 @@ -14411,10 +21748,10 @@ 377 0x4E20 //TX_NOISE_TH_5_4 378 0x21E8 //TX_NOISE_TH_6 379 0x0014 //TX_MINENOISE_TH -380 0x4000 //TX_MINENOISE_MIC0_TH_MTS -381 0xFFEE //TX_MINENOISE_MIC0_TH_EXP -382 0x6000 //TX_MINENOISE_MIC0_S_TH_MTS -383 0xFFF3 //TX_MINENOISE_MIC0_S_TH_EXP +380 0xD508 //TX_MORENS_TFMASK_TH +381 0x0001 //TX_DRC_QUIET_FLOOR +382 0x6D60 //TX_RATIODTL_CUT_TH +383 0x0DAC //TX_DT_CUT_K1 384 0x00A5 //TX_OUT_ENER_S_TH_CLEAN 385 0x00A5 //TX_OUT_ENER_S_TH_LESSCLEAN 386 0x00A5 //TX_OUT_ENER_S_TH_NOISY @@ -14422,15 +21759,15 @@ 388 0x00CE //TX_OUT_ENER_TH_SPEECH 389 0x2000 //TX_SN_NPB_GAIN 390 0x0000 //TX_NN_NPB_GAIN -391 0x0000 //TX_CSX_ALPHA_0 -392 0x0000 //TX_CSX_ALPHA_1 -393 0x0000 //TX_CSX_ALPHA_2 -394 0x0000 //TX_CSX_ALPHA_3 -395 0x0800 //TX_MU_ARSP_EST -396 0x00C8 //TX_P_OUTBEAM_MIN_TH +391 0x3000 //TX_POST_MASK_SUP_HSNE +392 0x07D0 //TX_TAIL_DET_TH +393 0x4000 //TX_B_LESSCUT_RTO_WTA +394 0x0000 //TX_MEL_G_R +395 0x0080 //TX_SUPHIGH_TH +396 0x4000 //TX_MASK_G_R 397 0x0002 //TX_EXTRA_NS_L -398 0x0800 //TX_EXTRA_NS_A -399 0x0005 //TX_VR_NOISE_FLOOR_TH +398 0x1800 //TX_C_POST_FLT_MASK +399 0x7FFF //TX_A_POST_FLT_WNS 400 0x0148 //TX_MIN_G_LOW300HZ 401 0x0004 //TX_MAXLEVEL_CNG 402 0x00B4 //TX_STN_NOISE_TH @@ -14545,16 +21882,16 @@ 511 0x6666 //TX_MIC_TO_BFGAIN 512 0x0000 //TX_MICTOBFGAIN0 513 0x0000 //TX_FASTMUE_TH -514 0x0000 //TX_DERVB_LEN_0 -515 0x0000 //TX_DERVB_LEN_1 -516 0x0000 //TX_RHO_DERVB -517 0x0000 //TX_MIC_INDX_DERVB -518 0x0000 //TX_MU_DERVB -519 0x0000 //TX_DR_RESRV_0 -520 0x0000 //TX_DR_RESRV_1 -521 0x0000 //TX_DR_RESRV_2 -522 0x0000 //TX_DR_RESRV_3 -523 0x0000 //TX_DR_RESRV_4 +514 0x3000 //TX_DEREVERB_LF_MU +515 0x34CD //TX_DEREVERB_HF_MU +516 0x0007 //TX_DEREVERB_DELAY +517 0x0004 //TX_DEREVERB_COEF_LEN +518 0x0003 //TX_DEREVERB_DNR +519 0x0000 //TX_DEREVERB_ALPHA +520 0x0000 //TX_DEREVERB_BETA +521 0x0000 //TX_GSC_RTOL_TH +522 0x0000 //TX_GSC_RTOH_TH +523 0x7E2C //TX_WIDE2_MEANHTH 524 0x0000 //TX_DR_RESRV_5 525 0x0000 //TX_DR_RESRV_6 526 0x0000 //TX_DR_RESRV_7 @@ -14703,14 +22040,14 @@ 669 0x4848 //TX_PREEQ_GAIN_MIC1_3 670 0x4848 //TX_PREEQ_GAIN_MIC1_4 671 0x4848 //TX_PREEQ_GAIN_MIC1_5 -672 0x4848 //TX_PREEQ_GAIN_MIC1_6 -673 0x484A //TX_PREEQ_GAIN_MIC1_7 -674 0x4C4E //TX_PREEQ_GAIN_MIC1_8 -675 0x5054 //TX_PREEQ_GAIN_MIC1_9 -676 0x5658 //TX_PREEQ_GAIN_MIC1_10 -677 0x5C5C //TX_PREEQ_GAIN_MIC1_11 -678 0x5E64 //TX_PREEQ_GAIN_MIC1_12 -679 0x6464 //TX_PREEQ_GAIN_MIC1_13 +672 0x494A //TX_PREEQ_GAIN_MIC1_6 +673 0x4B4C //TX_PREEQ_GAIN_MIC1_7 +674 0x4D4E //TX_PREEQ_GAIN_MIC1_8 +675 0x5051 //TX_PREEQ_GAIN_MIC1_9 +676 0x5255 //TX_PREEQ_GAIN_MIC1_10 +677 0x585A //TX_PREEQ_GAIN_MIC1_11 +678 0x5C5F //TX_PREEQ_GAIN_MIC1_12 +679 0x636A //TX_PREEQ_GAIN_MIC1_13 680 0x4848 //TX_PREEQ_GAIN_MIC1_14 681 0x4848 //TX_PREEQ_GAIN_MIC1_15 682 0x4848 //TX_PREEQ_GAIN_MIC1_16 @@ -14734,7 +22071,7 @@ 700 0x0F10 //TX_PREEQ_BIN_MIC1_10 701 0x1011 //TX_PREEQ_BIN_MIC1_11 702 0x1104 //TX_PREEQ_BIN_MIC1_12 -703 0x1010 //TX_PREEQ_BIN_MIC1_13 +703 0x101B //TX_PREEQ_BIN_MIC1_13 704 0x0000 //TX_PREEQ_BIN_MIC1_14 705 0x0000 //TX_PREEQ_BIN_MIC1_15 706 0x0000 //TX_PREEQ_BIN_MIC1_16 @@ -14807,7 +22144,7 @@ 773 0x0000 //TX_GAIN_LIMIT_0 774 0x0000 //TX_GAIN_LIMIT_1 775 0x0006 //TX_GAIN_LIMIT_2 -776 0x0006 //TX_GAIN_LIMIT_3 +776 0x0007 //TX_GAIN_LIMIT_3 777 0x7F5B //TX_BVE_NOVAD0_ALPHADOWN 778 0x7FDE //TX_BVE_VAD0_ALPHAUP 779 0x7F3A //TX_BVE_VAD0_ALPHADOWN @@ -14897,7 +22234,7 @@ 863 0x199A //TX_TDDRC_HMNC_GAIN 864 0x0000 //TX_TDDRC_SMT_FLAG 865 0x0CCD //TX_TDDRC_SMT_W -866 0x0550 //TX_TDDRC_DRC_GAIN +866 0x05A0 //TX_TDDRC_DRC_GAIN 867 0x7FFF //TX_TDDRC_LMT_THRD 868 0x0000 //TX_TDDRC_LMT_ALPHA 869 0x0000 //TX_TFMASKLTH @@ -14928,6 +22265,71 @@ 894 0xC000 //TX_FASTNS_SSA_THHFL 895 0xCCCC //TX_FASTNS_SSA_THLFH 896 0xD999 //TX_FASTNS_SSA_THHFH +897 0x2339 //TX_SENDFUNC_REG_MICMUTE +898 0x0021 //TX_SENDFUNC_REG_MICMUTE1 +899 0x02BC //TX_MICMUTE_RATIO_THR +900 0x0140 //TX_MICMUTE_AMP_THR +901 0x0004 //TX_MICMUTE_HPF_IND +902 0x00C0 //TX_MICMUTE_LOG_EYR_TH +903 0x0008 //TX_MICMUTE_CVG_TIME +904 0x0008 //TX_MICMUTE_RELEASE_TIME +905 0x01FE //TX_MIC_VOLUME_MIC0MUTE +906 0x0020 //TX_MICMUTE_EPD_OFFSET_0 +907 0x001E //TX_MICMUTE_FRQ_AEC_L +908 0x7999 //TX_MICMUTE_EAD_THR +909 0x7FFF //TX_MICMUTE_LAMBDA_CB_NLE +910 0x7FFF //TX_MICMUTE_LAMBDA_RE_EST +911 0x4000 //TX_DTD_THR1_MICMUTE_0 +912 0x7000 //TX_DTD_THR1_MICMUTE_1 +913 0x7FFF //TX_DTD_THR1_MICMUTE_2 +914 0x7FFF //TX_DTD_THR1_MICMUTE_3 +915 0x6CCC //TX_DTD_THR2_MICMUTE_0 +916 0x0400 //TX_MICMUTE_MIN_EQ_RE_EST_0 +917 0x0400 //TX_MICMUTE_MIN_EQ_RE_EST_1 +918 0x1000 //TX_MICMUTE_MIN_EQ_RE_EST_2 +919 0x7FFF //TX_MICMUTE_MIN_EQ_RE_EST_3 +920 0x7FFF //TX_MICMUTE_MIN_EQ_RE_EST_4 +921 0x4000 //TX_MICMUTE_C_POST_FLT +922 0x03E8 //TX_MICMUTE_DT_CUT_K +923 0x0001 //TX_MICMUTE_DT_CUT_THR +924 0x03E8 //TX_MICMUTE_DT_CUT_K2 +925 0x0001 //TX_MICMUTE_DT_CUT_THR2 +926 0x0064 //TX_MICMUTE_DT2_HOLD_N +927 0x1000 //TX_MICMUTE_RATIODTH_THCUT +928 0x1000 //TX_MICMUTE_B_POST_FLT_ECHOL +929 0x7FFF //TX_MICMUTE_B_POST_FLT_ECHOH +930 0x0400 //TX_MICMUTE_C_POST_FLT_MASK +931 0x7999 //TX_MICMUTE_RATIODTL_CUT_TH +932 0x0258 //TX_MICMUTE_DT_CUT_K1 +933 0x0800 //TX_MICMUTE_N2_SN_EST +934 0xFC00 //TX_MICMUTE_THR_SN_EST_0 +935 0x001C //TX_MICMUTE_MIN_G_CTRL_0 +936 0x6000 //TX_MICMUTE_A_POST_FILT_S_0 +937 0x7000 //TX_MICMUTE_B_POST_FILT_0 +938 0x2710 //TX_MIC1RUB_AMP_THR +939 0x0010 //TX_MIC1MUTE_RATIO_THR +940 0x0450 //TX_MIC1MUTE_AMP_THR +941 0x0008 //TX_MIC1MUTE_CVG_TIME +942 0x0008 //TX_MIC1MUTE_RELEASE_TIME +943 0x0000 //TX_AMS_RESRV_01 +944 0x0000 //TX_AMS_RESRV_02 +945 0x0000 //TX_AMS_RESRV_03 +946 0x0000 //TX_AMS_RESRV_04 +947 0x0000 //TX_AMS_RESRV_05 +948 0x0000 //TX_AMS_RESRV_06 +949 0x0000 //TX_AMS_RESRV_07 +950 0x0000 //TX_AMS_RESRV_08 +951 0x0000 //TX_AMS_RESRV_09 +952 0x0000 //TX_AMS_RESRV_10 +953 0x0000 //TX_AMS_RESRV_11 +954 0x0000 //TX_AMS_RESRV_12 +955 0x0000 //TX_AMS_RESRV_13 +956 0x0000 //TX_AMS_RESRV_14 +957 0x0000 //TX_AMS_RESRV_15 +958 0x0000 //TX_AMS_RESRV_16 +959 0x0000 //TX_AMS_RESRV_17 +960 0x0000 //TX_AMS_RESRV_18 +961 0x0000 //TX_AMS_RESRV_19 #RX 0 0x000C //RX_RECVFUNC_MODE_0 1 0x0000 //RX_RECVFUNC_MODE_1 @@ -15779,14 +23181,866 @@ 110 0x0000 //RX_FDDRC_RESRV_0 129 0x0100 //RX_SPK_VOL 130 0x0000 //RX_VOL_RESRV_0 +#RX 2 +157 0x000C //RX_RECVFUNC_MODE_0 +158 0x0000 //RX_RECVFUNC_MODE_1 +159 0x0001 //RX_SAMPLINGFREQ_SIG +160 0x0001 //RX_SAMPLINGFREQ_PROC +161 0x000A //RX_FRAME_SZ +162 0x0000 //RX_DELAY_OPT +163 0x1000 //RX_TDDRC_ALPHA_UP_1 +164 0x1000 //RX_TDDRC_ALPHA_UP_2 +165 0x1000 //RX_TDDRC_ALPHA_UP_3 +166 0x1000 //RX_TDDRC_ALPHA_UP_4 +167 0x0800 //RX_PGA +168 0x7FFF //RX_A_HP +169 0x4000 //RX_B_PE +170 0x7800 //RX_THR_PITCH_DET_0 +171 0x7000 //RX_THR_PITCH_DET_1 +172 0x6000 //RX_THR_PITCH_DET_2 +173 0x0008 //RX_PITCH_BFR_LEN +174 0x0003 //RX_SBD_PITCH_DET +175 0x0100 //RX_PP_RESRV_0 +176 0x0020 //RX_PP_RESRV_1 +177 0x0400 //RX_N_SN_EST +178 0x000C //RX_N2_SN_EST +179 0x0014 //RX_NS_LVL_CTRL +180 0xF800 //RX_THR_SN_EST +181 0x7E00 //RX_LAMBDA_PFILT +182 0x000A //RX_FENS_RESRV_0 +183 0x0190 //RX_FENS_RESRV_1 +184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +187 0x0002 //RX_EXTRA_NS_L +188 0x0800 //RX_EXTRA_NS_A +189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +190 0x7000 //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +192 0x199A //RX_A_POST_FLT +193 0x0000 //RX_LMT_THRD +194 0x4000 //RX_LMT_ALPHA +195 0x0030 //RX_FDEQ_SUBNUM +196 0x4848 //RX_FDEQ_GAIN_0 +197 0x4848 //RX_FDEQ_GAIN_1 +198 0x4844 //RX_FDEQ_GAIN_2 +199 0x4A4C //RX_FDEQ_GAIN_3 +200 0x4E50 //RX_FDEQ_GAIN_4 +201 0x5254 //RX_FDEQ_GAIN_5 +202 0x5658 //RX_FDEQ_GAIN_6 +203 0x5A5C //RX_FDEQ_GAIN_7 +204 0x5C5C //RX_FDEQ_GAIN_8 +205 0x5C5C //RX_FDEQ_GAIN_9 +206 0x5C5C //RX_FDEQ_GAIN_10 +207 0x5C5C //RX_FDEQ_GAIN_11 +208 0x5C5C //RX_FDEQ_GAIN_12 +209 0x5C5C //RX_FDEQ_GAIN_13 +210 0x4848 //RX_FDEQ_GAIN_14 +211 0x4848 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0202 //RX_FDEQ_BIN_0 +221 0x0203 //RX_FDEQ_BIN_1 +222 0x0402 //RX_FDEQ_BIN_2 +223 0x0505 //RX_FDEQ_BIN_3 +224 0x0505 //RX_FDEQ_BIN_4 +225 0x0505 //RX_FDEQ_BIN_5 +226 0x0505 //RX_FDEQ_BIN_6 +227 0x0505 //RX_FDEQ_BIN_7 +228 0x160C //RX_FDEQ_BIN_8 +229 0x0D0E //RX_FDEQ_BIN_9 +230 0x0E0F //RX_FDEQ_BIN_10 +231 0x0F10 //RX_FDEQ_BIN_11 +232 0x1011 //RX_FDEQ_BIN_12 +233 0x1104 //RX_FDEQ_BIN_13 +234 0x0000 //RX_FDEQ_BIN_14 +235 0x0000 //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x4000 //RX_FDEQ_RESRV_0 +245 0x0320 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0030 //RX_FDDRC_BAND_MARGIN_1 +248 0x0050 //RX_FDDRC_BAND_MARGIN_2 +249 0x0080 //RX_FDDRC_BAND_MARGIN_3 +250 0x0007 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x5000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x6400 //RX_FDDRC_THRD_3_2 +258 0x6400 //RX_FDDRC_THRD_3_3 +259 0x2000 //RX_FDDRC_SLANT_0_0 +260 0x2000 //RX_FDDRC_SLANT_0_1 +261 0x2000 //RX_FDDRC_SLANT_0_2 +262 0x2000 //RX_FDDRC_SLANT_0_3 +263 0x5333 //RX_FDDRC_SLANT_1_0 +264 0x5333 //RX_FDDRC_SLANT_1_1 +265 0x5333 //RX_FDDRC_SLANT_1_2 +266 0x5333 //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +268 0x0002 //RX_FILTINDX +269 0x0000 //RX_TDDRC_THRD_0 +270 0x0000 //RX_TDDRC_THRD_1 +271 0x1800 //RX_TDDRC_THRD_2 +272 0x1800 //RX_TDDRC_THRD_3 +273 0x3000 //RX_TDDRC_SLANT_0 +274 0x6E00 //RX_TDDRC_SLANT_1 +275 0x1000 //RX_TDDRC_ALPHA_UP_0 +276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x199A //RX_TDDRC_HMNC_GAIN +279 0x0001 //RX_TDDRC_SMT_FLAG +280 0x0CCD //RX_TDDRC_SMT_W +281 0x0400 //RX_TDDRC_DRC_GAIN +282 0x7C00 //RX_LAMBDA_PKA_FP +283 0x2000 //RX_TPKA_FP +284 0x2000 //RX_MIN_G_FP +285 0x0080 //RX_MAX_G_FP +286 0x0100 //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 +288 0x0000 //RX_MAXLEVEL_CNG +289 0x3000 //RX_BWE_UV_TH +290 0x3000 //RX_BWE_UV_TH2 +291 0x1800 //RX_BWE_UV_TH3 +292 0x1000 //RX_BWE_V_TH +293 0x04CD //RX_BWE_GAIN1_V_TH1 +294 0x0F33 //RX_BWE_GAIN1_V_TH2 +295 0x7333 //RX_BWE_UV_EQ +296 0x199A //RX_BWE_V_EQ +297 0x7333 //RX_BWE_TONE_TH +298 0x0004 //RX_BWE_UV_HOLD_T +299 0x6CCD //RX_BWE_GAIN2_ALPHA +300 0x799A //RX_BWE_GAIN3_ALPHA +301 0x001E //RX_BWE_CUTOFF +302 0x3000 //RX_BWE_GAINFILL +303 0x3200 //RX_BWE_MAXTH_TONE +304 0x2000 //RX_BWE_EQ_0 +305 0x2000 //RX_BWE_EQ_1 +306 0x2000 //RX_BWE_EQ_2 +307 0x2000 //RX_BWE_EQ_3 +308 0x2000 //RX_BWE_EQ_4 +309 0x2000 //RX_BWE_EQ_5 +310 0x2000 //RX_BWE_EQ_6 +311 0x0000 //RX_BWE_RESRV_0 +312 0x0000 //RX_BWE_RESRV_1 +313 0x0000 //RX_BWE_RESRV_2 +#VOL 0 +163 0x1000 //RX_TDDRC_ALPHA_UP_1 +164 0x1000 //RX_TDDRC_ALPHA_UP_2 +165 0x1000 //RX_TDDRC_ALPHA_UP_3 +166 0x1000 //RX_TDDRC_ALPHA_UP_4 +184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +190 0x7000 //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +269 0x0000 //RX_TDDRC_THRD_0 +270 0x0000 //RX_TDDRC_THRD_1 +271 0x1800 //RX_TDDRC_THRD_2 +272 0x1800 //RX_TDDRC_THRD_3 +273 0x3000 //RX_TDDRC_SLANT_0 +274 0x6E00 //RX_TDDRC_SLANT_1 +275 0x1000 //RX_TDDRC_ALPHA_UP_0 +276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x199A //RX_TDDRC_HMNC_GAIN +279 0x0001 //RX_TDDRC_SMT_FLAG +280 0x0CCD //RX_TDDRC_SMT_W +281 0x0400 //RX_TDDRC_DRC_GAIN +195 0x0030 //RX_FDEQ_SUBNUM +196 0x4848 //RX_FDEQ_GAIN_0 +197 0x4848 //RX_FDEQ_GAIN_1 +198 0x4844 //RX_FDEQ_GAIN_2 +199 0x4A4C //RX_FDEQ_GAIN_3 +200 0x4E50 //RX_FDEQ_GAIN_4 +201 0x5254 //RX_FDEQ_GAIN_5 +202 0x5658 //RX_FDEQ_GAIN_6 +203 0x5A5C //RX_FDEQ_GAIN_7 +204 0x5C5C //RX_FDEQ_GAIN_8 +205 0x5C5C //RX_FDEQ_GAIN_9 +206 0x5C5C //RX_FDEQ_GAIN_10 +207 0x5C5C //RX_FDEQ_GAIN_11 +208 0x5C5C //RX_FDEQ_GAIN_12 +209 0x5C5C //RX_FDEQ_GAIN_13 +210 0x4848 //RX_FDEQ_GAIN_14 +211 0x4848 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0202 //RX_FDEQ_BIN_0 +221 0x0203 //RX_FDEQ_BIN_1 +222 0x0402 //RX_FDEQ_BIN_2 +223 0x0505 //RX_FDEQ_BIN_3 +224 0x0505 //RX_FDEQ_BIN_4 +225 0x0505 //RX_FDEQ_BIN_5 +226 0x0505 //RX_FDEQ_BIN_6 +227 0x0505 //RX_FDEQ_BIN_7 +228 0x160C //RX_FDEQ_BIN_8 +229 0x0D0E //RX_FDEQ_BIN_9 +230 0x0E0F //RX_FDEQ_BIN_10 +231 0x0F10 //RX_FDEQ_BIN_11 +232 0x1011 //RX_FDEQ_BIN_12 +233 0x1104 //RX_FDEQ_BIN_13 +234 0x0000 //RX_FDEQ_BIN_14 +235 0x0000 //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x4000 //RX_FDEQ_RESRV_0 +245 0x0320 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0030 //RX_FDDRC_BAND_MARGIN_1 +248 0x0050 //RX_FDDRC_BAND_MARGIN_2 +249 0x0080 //RX_FDDRC_BAND_MARGIN_3 +250 0x0007 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x5000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x6400 //RX_FDDRC_THRD_3_2 +258 0x6400 //RX_FDDRC_THRD_3_3 +259 0x2000 //RX_FDDRC_SLANT_0_0 +260 0x2000 //RX_FDDRC_SLANT_0_1 +261 0x2000 //RX_FDDRC_SLANT_0_2 +262 0x2000 //RX_FDDRC_SLANT_0_3 +263 0x5333 //RX_FDDRC_SLANT_1_0 +264 0x5333 //RX_FDDRC_SLANT_1_1 +265 0x5333 //RX_FDDRC_SLANT_1_2 +266 0x5333 //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +286 0x0100 //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 +#VOL 1 +163 0x1000 //RX_TDDRC_ALPHA_UP_1 +164 0x1000 //RX_TDDRC_ALPHA_UP_2 +165 0x1000 //RX_TDDRC_ALPHA_UP_3 +166 0x1000 //RX_TDDRC_ALPHA_UP_4 +184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +190 0x7000 //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +269 0x0000 //RX_TDDRC_THRD_0 +270 0x0000 //RX_TDDRC_THRD_1 +271 0x1800 //RX_TDDRC_THRD_2 +272 0x1800 //RX_TDDRC_THRD_3 +273 0x3000 //RX_TDDRC_SLANT_0 +274 0x6E00 //RX_TDDRC_SLANT_1 +275 0x1000 //RX_TDDRC_ALPHA_UP_0 +276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x199A //RX_TDDRC_HMNC_GAIN +279 0x0001 //RX_TDDRC_SMT_FLAG +280 0x0CCD //RX_TDDRC_SMT_W +281 0x0400 //RX_TDDRC_DRC_GAIN +195 0x0030 //RX_FDEQ_SUBNUM +196 0x4848 //RX_FDEQ_GAIN_0 +197 0x4848 //RX_FDEQ_GAIN_1 +198 0x4844 //RX_FDEQ_GAIN_2 +199 0x4A4C //RX_FDEQ_GAIN_3 +200 0x4E50 //RX_FDEQ_GAIN_4 +201 0x5254 //RX_FDEQ_GAIN_5 +202 0x5658 //RX_FDEQ_GAIN_6 +203 0x5A5C //RX_FDEQ_GAIN_7 +204 0x5C5C //RX_FDEQ_GAIN_8 +205 0x5C5C //RX_FDEQ_GAIN_9 +206 0x5C5C //RX_FDEQ_GAIN_10 +207 0x5C5C //RX_FDEQ_GAIN_11 +208 0x5C5C //RX_FDEQ_GAIN_12 +209 0x5C5C //RX_FDEQ_GAIN_13 +210 0x4848 //RX_FDEQ_GAIN_14 +211 0x4848 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0202 //RX_FDEQ_BIN_0 +221 0x0203 //RX_FDEQ_BIN_1 +222 0x0402 //RX_FDEQ_BIN_2 +223 0x0505 //RX_FDEQ_BIN_3 +224 0x0505 //RX_FDEQ_BIN_4 +225 0x0505 //RX_FDEQ_BIN_5 +226 0x0505 //RX_FDEQ_BIN_6 +227 0x0505 //RX_FDEQ_BIN_7 +228 0x160C //RX_FDEQ_BIN_8 +229 0x0D0E //RX_FDEQ_BIN_9 +230 0x0E0F //RX_FDEQ_BIN_10 +231 0x0F10 //RX_FDEQ_BIN_11 +232 0x1011 //RX_FDEQ_BIN_12 +233 0x1104 //RX_FDEQ_BIN_13 +234 0x0000 //RX_FDEQ_BIN_14 +235 0x0000 //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x4000 //RX_FDEQ_RESRV_0 +245 0x0320 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0030 //RX_FDDRC_BAND_MARGIN_1 +248 0x0050 //RX_FDDRC_BAND_MARGIN_2 +249 0x0080 //RX_FDDRC_BAND_MARGIN_3 +250 0x0007 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x5000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x6400 //RX_FDDRC_THRD_3_2 +258 0x6400 //RX_FDDRC_THRD_3_3 +259 0x2000 //RX_FDDRC_SLANT_0_0 +260 0x2000 //RX_FDDRC_SLANT_0_1 +261 0x2000 //RX_FDDRC_SLANT_0_2 +262 0x2000 //RX_FDDRC_SLANT_0_3 +263 0x5333 //RX_FDDRC_SLANT_1_0 +264 0x5333 //RX_FDDRC_SLANT_1_1 +265 0x5333 //RX_FDDRC_SLANT_1_2 +266 0x5333 //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +286 0x0100 //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 +#VOL 2 +163 0x1000 //RX_TDDRC_ALPHA_UP_1 +164 0x1000 //RX_TDDRC_ALPHA_UP_2 +165 0x1000 //RX_TDDRC_ALPHA_UP_3 +166 0x1000 //RX_TDDRC_ALPHA_UP_4 +184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +190 0x7000 //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +269 0x0000 //RX_TDDRC_THRD_0 +270 0x0000 //RX_TDDRC_THRD_1 +271 0x1800 //RX_TDDRC_THRD_2 +272 0x1800 //RX_TDDRC_THRD_3 +273 0x3000 //RX_TDDRC_SLANT_0 +274 0x6E00 //RX_TDDRC_SLANT_1 +275 0x1000 //RX_TDDRC_ALPHA_UP_0 +276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x199A //RX_TDDRC_HMNC_GAIN +279 0x0001 //RX_TDDRC_SMT_FLAG +280 0x0CCD //RX_TDDRC_SMT_W +281 0x0400 //RX_TDDRC_DRC_GAIN +195 0x0030 //RX_FDEQ_SUBNUM +196 0x4848 //RX_FDEQ_GAIN_0 +197 0x4848 //RX_FDEQ_GAIN_1 +198 0x4844 //RX_FDEQ_GAIN_2 +199 0x4A4C //RX_FDEQ_GAIN_3 +200 0x4E50 //RX_FDEQ_GAIN_4 +201 0x5254 //RX_FDEQ_GAIN_5 +202 0x5658 //RX_FDEQ_GAIN_6 +203 0x5A5C //RX_FDEQ_GAIN_7 +204 0x5C5C //RX_FDEQ_GAIN_8 +205 0x5C5C //RX_FDEQ_GAIN_9 +206 0x5C5C //RX_FDEQ_GAIN_10 +207 0x5C5C //RX_FDEQ_GAIN_11 +208 0x5C5C //RX_FDEQ_GAIN_12 +209 0x5C5C //RX_FDEQ_GAIN_13 +210 0x4848 //RX_FDEQ_GAIN_14 +211 0x4848 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0202 //RX_FDEQ_BIN_0 +221 0x0203 //RX_FDEQ_BIN_1 +222 0x0402 //RX_FDEQ_BIN_2 +223 0x0505 //RX_FDEQ_BIN_3 +224 0x0505 //RX_FDEQ_BIN_4 +225 0x0505 //RX_FDEQ_BIN_5 +226 0x0505 //RX_FDEQ_BIN_6 +227 0x0505 //RX_FDEQ_BIN_7 +228 0x160C //RX_FDEQ_BIN_8 +229 0x0D0E //RX_FDEQ_BIN_9 +230 0x0E0F //RX_FDEQ_BIN_10 +231 0x0F10 //RX_FDEQ_BIN_11 +232 0x1011 //RX_FDEQ_BIN_12 +233 0x1104 //RX_FDEQ_BIN_13 +234 0x0000 //RX_FDEQ_BIN_14 +235 0x0000 //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x4000 //RX_FDEQ_RESRV_0 +245 0x0320 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0030 //RX_FDDRC_BAND_MARGIN_1 +248 0x0050 //RX_FDDRC_BAND_MARGIN_2 +249 0x0080 //RX_FDDRC_BAND_MARGIN_3 +250 0x0007 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x5000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x6400 //RX_FDDRC_THRD_3_2 +258 0x6400 //RX_FDDRC_THRD_3_3 +259 0x2000 //RX_FDDRC_SLANT_0_0 +260 0x2000 //RX_FDDRC_SLANT_0_1 +261 0x2000 //RX_FDDRC_SLANT_0_2 +262 0x2000 //RX_FDDRC_SLANT_0_3 +263 0x5333 //RX_FDDRC_SLANT_1_0 +264 0x5333 //RX_FDDRC_SLANT_1_1 +265 0x5333 //RX_FDDRC_SLANT_1_2 +266 0x5333 //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +286 0x0100 //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 +#VOL 3 +163 0x1000 //RX_TDDRC_ALPHA_UP_1 +164 0x1000 //RX_TDDRC_ALPHA_UP_2 +165 0x1000 //RX_TDDRC_ALPHA_UP_3 +166 0x1000 //RX_TDDRC_ALPHA_UP_4 +184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +190 0x7000 //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +269 0x0000 //RX_TDDRC_THRD_0 +270 0x0000 //RX_TDDRC_THRD_1 +271 0x1800 //RX_TDDRC_THRD_2 +272 0x1800 //RX_TDDRC_THRD_3 +273 0x3000 //RX_TDDRC_SLANT_0 +274 0x6E00 //RX_TDDRC_SLANT_1 +275 0x1000 //RX_TDDRC_ALPHA_UP_0 +276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x199A //RX_TDDRC_HMNC_GAIN +279 0x0001 //RX_TDDRC_SMT_FLAG +280 0x0CCD //RX_TDDRC_SMT_W +281 0x0400 //RX_TDDRC_DRC_GAIN +195 0x0030 //RX_FDEQ_SUBNUM +196 0x4848 //RX_FDEQ_GAIN_0 +197 0x4848 //RX_FDEQ_GAIN_1 +198 0x4844 //RX_FDEQ_GAIN_2 +199 0x4A4C //RX_FDEQ_GAIN_3 +200 0x4E50 //RX_FDEQ_GAIN_4 +201 0x5254 //RX_FDEQ_GAIN_5 +202 0x5658 //RX_FDEQ_GAIN_6 +203 0x5A5C //RX_FDEQ_GAIN_7 +204 0x5C5C //RX_FDEQ_GAIN_8 +205 0x5C5C //RX_FDEQ_GAIN_9 +206 0x5C5C //RX_FDEQ_GAIN_10 +207 0x5C5C //RX_FDEQ_GAIN_11 +208 0x5C5C //RX_FDEQ_GAIN_12 +209 0x5C5C //RX_FDEQ_GAIN_13 +210 0x4848 //RX_FDEQ_GAIN_14 +211 0x4848 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0202 //RX_FDEQ_BIN_0 +221 0x0203 //RX_FDEQ_BIN_1 +222 0x0402 //RX_FDEQ_BIN_2 +223 0x0505 //RX_FDEQ_BIN_3 +224 0x0505 //RX_FDEQ_BIN_4 +225 0x0505 //RX_FDEQ_BIN_5 +226 0x0505 //RX_FDEQ_BIN_6 +227 0x0505 //RX_FDEQ_BIN_7 +228 0x160C //RX_FDEQ_BIN_8 +229 0x0D0E //RX_FDEQ_BIN_9 +230 0x0E0F //RX_FDEQ_BIN_10 +231 0x0F10 //RX_FDEQ_BIN_11 +232 0x1011 //RX_FDEQ_BIN_12 +233 0x1104 //RX_FDEQ_BIN_13 +234 0x0000 //RX_FDEQ_BIN_14 +235 0x0000 //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x4000 //RX_FDEQ_RESRV_0 +245 0x0320 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0030 //RX_FDDRC_BAND_MARGIN_1 +248 0x0050 //RX_FDDRC_BAND_MARGIN_2 +249 0x0080 //RX_FDDRC_BAND_MARGIN_3 +250 0x0007 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x5000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x6400 //RX_FDDRC_THRD_3_2 +258 0x6400 //RX_FDDRC_THRD_3_3 +259 0x2000 //RX_FDDRC_SLANT_0_0 +260 0x2000 //RX_FDDRC_SLANT_0_1 +261 0x2000 //RX_FDDRC_SLANT_0_2 +262 0x2000 //RX_FDDRC_SLANT_0_3 +263 0x5333 //RX_FDDRC_SLANT_1_0 +264 0x5333 //RX_FDDRC_SLANT_1_1 +265 0x5333 //RX_FDDRC_SLANT_1_2 +266 0x5333 //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +286 0x0100 //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 +#VOL 4 +163 0x1000 //RX_TDDRC_ALPHA_UP_1 +164 0x1000 //RX_TDDRC_ALPHA_UP_2 +165 0x1000 //RX_TDDRC_ALPHA_UP_3 +166 0x1000 //RX_TDDRC_ALPHA_UP_4 +184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +190 0x7000 //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +269 0x0000 //RX_TDDRC_THRD_0 +270 0x0000 //RX_TDDRC_THRD_1 +271 0x1800 //RX_TDDRC_THRD_2 +272 0x1800 //RX_TDDRC_THRD_3 +273 0x3000 //RX_TDDRC_SLANT_0 +274 0x6E00 //RX_TDDRC_SLANT_1 +275 0x1000 //RX_TDDRC_ALPHA_UP_0 +276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x199A //RX_TDDRC_HMNC_GAIN +279 0x0001 //RX_TDDRC_SMT_FLAG +280 0x0CCD //RX_TDDRC_SMT_W +281 0x0400 //RX_TDDRC_DRC_GAIN +195 0x0030 //RX_FDEQ_SUBNUM +196 0x4848 //RX_FDEQ_GAIN_0 +197 0x4848 //RX_FDEQ_GAIN_1 +198 0x4844 //RX_FDEQ_GAIN_2 +199 0x4A4C //RX_FDEQ_GAIN_3 +200 0x4E50 //RX_FDEQ_GAIN_4 +201 0x5254 //RX_FDEQ_GAIN_5 +202 0x5658 //RX_FDEQ_GAIN_6 +203 0x5A5C //RX_FDEQ_GAIN_7 +204 0x5C5C //RX_FDEQ_GAIN_8 +205 0x5C5C //RX_FDEQ_GAIN_9 +206 0x5C5C //RX_FDEQ_GAIN_10 +207 0x5C5C //RX_FDEQ_GAIN_11 +208 0x5C5C //RX_FDEQ_GAIN_12 +209 0x5C5C //RX_FDEQ_GAIN_13 +210 0x4848 //RX_FDEQ_GAIN_14 +211 0x4848 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0202 //RX_FDEQ_BIN_0 +221 0x0203 //RX_FDEQ_BIN_1 +222 0x0402 //RX_FDEQ_BIN_2 +223 0x0505 //RX_FDEQ_BIN_3 +224 0x0505 //RX_FDEQ_BIN_4 +225 0x0505 //RX_FDEQ_BIN_5 +226 0x0505 //RX_FDEQ_BIN_6 +227 0x0505 //RX_FDEQ_BIN_7 +228 0x160C //RX_FDEQ_BIN_8 +229 0x0D0E //RX_FDEQ_BIN_9 +230 0x0E0F //RX_FDEQ_BIN_10 +231 0x0F10 //RX_FDEQ_BIN_11 +232 0x1011 //RX_FDEQ_BIN_12 +233 0x1104 //RX_FDEQ_BIN_13 +234 0x0000 //RX_FDEQ_BIN_14 +235 0x0000 //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x4000 //RX_FDEQ_RESRV_0 +245 0x0320 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0030 //RX_FDDRC_BAND_MARGIN_1 +248 0x0050 //RX_FDDRC_BAND_MARGIN_2 +249 0x0080 //RX_FDDRC_BAND_MARGIN_3 +250 0x0007 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x5000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x6400 //RX_FDDRC_THRD_3_2 +258 0x6400 //RX_FDDRC_THRD_3_3 +259 0x2000 //RX_FDDRC_SLANT_0_0 +260 0x2000 //RX_FDDRC_SLANT_0_1 +261 0x2000 //RX_FDDRC_SLANT_0_2 +262 0x2000 //RX_FDDRC_SLANT_0_3 +263 0x5333 //RX_FDDRC_SLANT_1_0 +264 0x5333 //RX_FDDRC_SLANT_1_1 +265 0x5333 //RX_FDDRC_SLANT_1_2 +266 0x5333 //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +286 0x0100 //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 +#VOL 5 +163 0x1000 //RX_TDDRC_ALPHA_UP_1 +164 0x1000 //RX_TDDRC_ALPHA_UP_2 +165 0x1000 //RX_TDDRC_ALPHA_UP_3 +166 0x1000 //RX_TDDRC_ALPHA_UP_4 +184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +190 0x7000 //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +269 0x0000 //RX_TDDRC_THRD_0 +270 0x0000 //RX_TDDRC_THRD_1 +271 0x1800 //RX_TDDRC_THRD_2 +272 0x1800 //RX_TDDRC_THRD_3 +273 0x3000 //RX_TDDRC_SLANT_0 +274 0x6E00 //RX_TDDRC_SLANT_1 +275 0x1000 //RX_TDDRC_ALPHA_UP_0 +276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x199A //RX_TDDRC_HMNC_GAIN +279 0x0001 //RX_TDDRC_SMT_FLAG +280 0x0CCD //RX_TDDRC_SMT_W +281 0x0400 //RX_TDDRC_DRC_GAIN +195 0x0030 //RX_FDEQ_SUBNUM +196 0x4848 //RX_FDEQ_GAIN_0 +197 0x4848 //RX_FDEQ_GAIN_1 +198 0x4844 //RX_FDEQ_GAIN_2 +199 0x4A4C //RX_FDEQ_GAIN_3 +200 0x4E50 //RX_FDEQ_GAIN_4 +201 0x5254 //RX_FDEQ_GAIN_5 +202 0x5658 //RX_FDEQ_GAIN_6 +203 0x5A5C //RX_FDEQ_GAIN_7 +204 0x5C5C //RX_FDEQ_GAIN_8 +205 0x5C5C //RX_FDEQ_GAIN_9 +206 0x5C5C //RX_FDEQ_GAIN_10 +207 0x5C5C //RX_FDEQ_GAIN_11 +208 0x5C5C //RX_FDEQ_GAIN_12 +209 0x5C5C //RX_FDEQ_GAIN_13 +210 0x4848 //RX_FDEQ_GAIN_14 +211 0x4848 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0202 //RX_FDEQ_BIN_0 +221 0x0203 //RX_FDEQ_BIN_1 +222 0x0402 //RX_FDEQ_BIN_2 +223 0x0505 //RX_FDEQ_BIN_3 +224 0x0505 //RX_FDEQ_BIN_4 +225 0x0505 //RX_FDEQ_BIN_5 +226 0x0505 //RX_FDEQ_BIN_6 +227 0x0505 //RX_FDEQ_BIN_7 +228 0x160C //RX_FDEQ_BIN_8 +229 0x0D0E //RX_FDEQ_BIN_9 +230 0x0E0F //RX_FDEQ_BIN_10 +231 0x0F10 //RX_FDEQ_BIN_11 +232 0x1011 //RX_FDEQ_BIN_12 +233 0x1104 //RX_FDEQ_BIN_13 +234 0x0000 //RX_FDEQ_BIN_14 +235 0x0000 //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x4000 //RX_FDEQ_RESRV_0 +245 0x0320 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0030 //RX_FDDRC_BAND_MARGIN_1 +248 0x0050 //RX_FDDRC_BAND_MARGIN_2 +249 0x0080 //RX_FDDRC_BAND_MARGIN_3 +250 0x0007 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x5000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x6400 //RX_FDDRC_THRD_3_2 +258 0x6400 //RX_FDDRC_THRD_3_3 +259 0x2000 //RX_FDDRC_SLANT_0_0 +260 0x2000 //RX_FDDRC_SLANT_0_1 +261 0x2000 //RX_FDDRC_SLANT_0_2 +262 0x2000 //RX_FDDRC_SLANT_0_3 +263 0x5333 //RX_FDDRC_SLANT_1_0 +264 0x5333 //RX_FDDRC_SLANT_1_1 +265 0x5333 //RX_FDDRC_SLANT_1_2 +266 0x5333 //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +286 0x0100 //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 +#VOL 6 +163 0x1000 //RX_TDDRC_ALPHA_UP_1 +164 0x1000 //RX_TDDRC_ALPHA_UP_2 +165 0x1000 //RX_TDDRC_ALPHA_UP_3 +166 0x1000 //RX_TDDRC_ALPHA_UP_4 +184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +190 0x7000 //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +269 0x0000 //RX_TDDRC_THRD_0 +270 0x0000 //RX_TDDRC_THRD_1 +271 0x1800 //RX_TDDRC_THRD_2 +272 0x1800 //RX_TDDRC_THRD_3 +273 0x3000 //RX_TDDRC_SLANT_0 +274 0x6E00 //RX_TDDRC_SLANT_1 +275 0x1000 //RX_TDDRC_ALPHA_UP_0 +276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x199A //RX_TDDRC_HMNC_GAIN +279 0x0001 //RX_TDDRC_SMT_FLAG +280 0x0CCD //RX_TDDRC_SMT_W +281 0x0400 //RX_TDDRC_DRC_GAIN +195 0x0030 //RX_FDEQ_SUBNUM +196 0x4848 //RX_FDEQ_GAIN_0 +197 0x4848 //RX_FDEQ_GAIN_1 +198 0x4844 //RX_FDEQ_GAIN_2 +199 0x4A4C //RX_FDEQ_GAIN_3 +200 0x4E50 //RX_FDEQ_GAIN_4 +201 0x5254 //RX_FDEQ_GAIN_5 +202 0x5658 //RX_FDEQ_GAIN_6 +203 0x5A5C //RX_FDEQ_GAIN_7 +204 0x5C5C //RX_FDEQ_GAIN_8 +205 0x5C5C //RX_FDEQ_GAIN_9 +206 0x5C5C //RX_FDEQ_GAIN_10 +207 0x5C5C //RX_FDEQ_GAIN_11 +208 0x5C5C //RX_FDEQ_GAIN_12 +209 0x5C5C //RX_FDEQ_GAIN_13 +210 0x4848 //RX_FDEQ_GAIN_14 +211 0x4848 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0202 //RX_FDEQ_BIN_0 +221 0x0203 //RX_FDEQ_BIN_1 +222 0x0402 //RX_FDEQ_BIN_2 +223 0x0505 //RX_FDEQ_BIN_3 +224 0x0505 //RX_FDEQ_BIN_4 +225 0x0505 //RX_FDEQ_BIN_5 +226 0x0505 //RX_FDEQ_BIN_6 +227 0x0505 //RX_FDEQ_BIN_7 +228 0x160C //RX_FDEQ_BIN_8 +229 0x0D0E //RX_FDEQ_BIN_9 +230 0x0E0F //RX_FDEQ_BIN_10 +231 0x0F10 //RX_FDEQ_BIN_11 +232 0x1011 //RX_FDEQ_BIN_12 +233 0x1104 //RX_FDEQ_BIN_13 +234 0x0000 //RX_FDEQ_BIN_14 +235 0x0000 //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x4000 //RX_FDEQ_RESRV_0 +245 0x0320 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0030 //RX_FDDRC_BAND_MARGIN_1 +248 0x0050 //RX_FDDRC_BAND_MARGIN_2 +249 0x0080 //RX_FDDRC_BAND_MARGIN_3 +250 0x0007 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x5000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x6400 //RX_FDDRC_THRD_3_2 +258 0x6400 //RX_FDDRC_THRD_3_3 +259 0x2000 //RX_FDDRC_SLANT_0_0 +260 0x2000 //RX_FDDRC_SLANT_0_1 +261 0x2000 //RX_FDDRC_SLANT_0_2 +262 0x2000 //RX_FDDRC_SLANT_0_3 +263 0x5333 //RX_FDDRC_SLANT_1_0 +264 0x5333 //RX_FDDRC_SLANT_1_1 +265 0x5333 //RX_FDDRC_SLANT_1_2 +266 0x5333 //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +286 0x0100 //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 #CASE_NAME HANDSET-HANDSET_HAC-VOICE_GENERIC-SWB -#PARAM_TYPE TX+RX -#TOTAL_CUSTOM_STEP 7 +#PARAM_MODE Full +#PARAM_TYPE TX+2RX +#TOTAL_CUSTOM_STEP 7+7 #TX 0 0x0000 //TX_OPERATION_MODE_0 1 0x0000 //TX_OPERATION_MODE_1 -2 0x0026 //TX_PATCH_REG +2 0x0076 //TX_PATCH_REG 3 0x6F7E //TX_SENDFUNC_MODE_0 4 0x0001 //TX_SENDFUNC_MODE_1 5 0x0002 //TX_NUM_MIC @@ -15805,7 +24059,7 @@ 18 0x0000 //TX_SYS_RESRV_2 19 0x0000 //TX_SYS_RESRV_3 20 0x0000 //TX_DIST2REF0 -21 0x00A4 //TX_DIST2REF1 +21 0x00A3 //TX_DIST2REF1 22 0x0000 //TX_DIST2REF_02 23 0x0000 //TX_DIST2REF_03 24 0x0000 //TX_DIST2REF_04 @@ -16035,12 +24289,12 @@ 248 0xF800 //TX_THR_SN_EST_6 249 0xF700 //TX_THR_SN_EST_7 250 0x0000 //TX_DELTA_THR_SN_EST_0 -251 0x0100 //TX_DELTA_THR_SN_EST_1 +251 0x0200 //TX_DELTA_THR_SN_EST_1 252 0x0200 //TX_DELTA_THR_SN_EST_2 253 0x0200 //TX_DELTA_THR_SN_EST_3 -254 0x0200 //TX_DELTA_THR_SN_EST_4 -255 0x0100 //TX_DELTA_THR_SN_EST_5 -256 0x0200 //TX_DELTA_THR_SN_EST_6 +254 0x0100 //TX_DELTA_THR_SN_EST_4 +255 0x0200 //TX_DELTA_THR_SN_EST_5 +256 0x0100 //TX_DELTA_THR_SN_EST_6 257 0x0200 //TX_DELTA_THR_SN_EST_7 258 0x4000 //TX_LAMBDA_NN_EST_0 259 0x4000 //TX_LAMBDA_NN_EST_1 @@ -16066,18 +24320,18 @@ 279 0x1000 //TX_B_POST_FLT_0 280 0x1000 //TX_B_POST_FLT_1 281 0x0014 //TX_NS_LVL_CTRL_0 -282 0x0016 //TX_NS_LVL_CTRL_1 -283 0x002C //TX_NS_LVL_CTRL_2 -284 0x0016 //TX_NS_LVL_CTRL_3 -285 0x0018 //TX_NS_LVL_CTRL_4 -286 0x0016 //TX_NS_LVL_CTRL_5 -287 0x0012 //TX_NS_LVL_CTRL_6 +282 0x002C //TX_NS_LVL_CTRL_1 +283 0x0016 //TX_NS_LVL_CTRL_2 +284 0x0018 //TX_NS_LVL_CTRL_3 +285 0x0016 //TX_NS_LVL_CTRL_4 +286 0x0012 //TX_NS_LVL_CTRL_5 +287 0x0016 //TX_NS_LVL_CTRL_6 288 0x0017 //TX_NS_LVL_CTRL_7 289 0x000E //TX_MIN_GAIN_S_0 -290 0x0012 //TX_MIN_GAIN_S_1 -291 0x000D //TX_MIN_GAIN_S_2 -292 0x0012 //TX_MIN_GAIN_S_3 -293 0x0010 //TX_MIN_GAIN_S_4 +290 0x000D //TX_MIN_GAIN_S_1 +291 0x0012 //TX_MIN_GAIN_S_2 +292 0x0010 //TX_MIN_GAIN_S_3 +293 0x0012 //TX_MIN_GAIN_S_4 294 0x0012 //TX_MIN_GAIN_S_5 295 0x0012 //TX_MIN_GAIN_S_6 296 0x0012 //TX_MIN_GAIN_S_7 @@ -16099,29 +24353,29 @@ 312 0x7FFF //TX_A_POST_FILT_0 313 0x2000 //TX_A_POST_FILT_1 314 0x4000 //TX_A_POST_FILT_S_0 -315 0x5000 //TX_A_POST_FILT_S_1 +315 0x4000 //TX_A_POST_FILT_S_1 316 0x4000 //TX_A_POST_FILT_S_2 317 0x4000 //TX_A_POST_FILT_S_3 318 0x4000 //TX_A_POST_FILT_S_4 319 0x4000 //TX_A_POST_FILT_S_5 -320 0x4000 //TX_A_POST_FILT_S_6 +320 0x5000 //TX_A_POST_FILT_S_6 321 0x7000 //TX_A_POST_FILT_S_7 322 0x1000 //TX_B_POST_FILT_0 323 0x1000 //TX_B_POST_FILT_1 -324 0x3000 //TX_B_POST_FILT_2 -325 0x1000 //TX_B_POST_FILT_3 -326 0x5000 //TX_B_POST_FILT_4 -327 0x2000 //TX_B_POST_FILT_5 -328 0x6000 //TX_B_POST_FILT_6 +324 0x2000 //TX_B_POST_FILT_2 +325 0x2000 //TX_B_POST_FILT_3 +326 0x2000 //TX_B_POST_FILT_4 +327 0x1000 //TX_B_POST_FILT_5 +328 0x3000 //TX_B_POST_FILT_6 329 0x3000 //TX_B_POST_FILT_7 330 0x1000 //TX_B_LESSCUT_RTO_S_0 -331 0x6000 //TX_B_LESSCUT_RTO_S_1 -332 0x6000 //TX_B_LESSCUT_RTO_S_2 -333 0x6000 //TX_B_LESSCUT_RTO_S_3 -334 0x6000 //TX_B_LESSCUT_RTO_S_4 -335 0x6000 //TX_B_LESSCUT_RTO_S_5 -336 0x7FFF //TX_B_LESSCUT_RTO_S_6 -337 0x7FFF //TX_B_LESSCUT_RTO_S_7 +331 0x1000 //TX_B_LESSCUT_RTO_S_1 +332 0x1000 //TX_B_LESSCUT_RTO_S_2 +333 0x1000 //TX_B_LESSCUT_RTO_S_3 +334 0x1000 //TX_B_LESSCUT_RTO_S_4 +335 0x1000 //TX_B_LESSCUT_RTO_S_5 +336 0x1000 //TX_B_LESSCUT_RTO_S_6 +337 0x1000 //TX_B_LESSCUT_RTO_S_7 338 0x7E14 //TX_LAMBDA_PFILT 339 0x7C29 //TX_LAMBDA_PFILT_S_0 340 0x7C29 //TX_LAMBDA_PFILT_S_1 @@ -16164,10 +24418,10 @@ 377 0x4E20 //TX_NOISE_TH_5_4 378 0x1194 //TX_NOISE_TH_6 379 0x0014 //TX_MINENOISE_TH -380 0x4000 //TX_MINENOISE_MIC0_TH_MTS -381 0xFFEE //TX_MINENOISE_MIC0_TH_EXP -382 0x6000 //TX_MINENOISE_MIC0_S_TH_MTS -383 0xFFF3 //TX_MINENOISE_MIC0_S_TH_EXP +380 0xD508 //TX_MORENS_TFMASK_TH +381 0x0001 //TX_DRC_QUIET_FLOOR +382 0x6D60 //TX_RATIODTL_CUT_TH +383 0x0DAC //TX_DT_CUT_K1 384 0x00A5 //TX_OUT_ENER_S_TH_CLEAN 385 0x00A5 //TX_OUT_ENER_S_TH_LESSCLEAN 386 0x00A5 //TX_OUT_ENER_S_TH_NOISY @@ -16175,15 +24429,15 @@ 388 0x0200 //TX_OUT_ENER_TH_SPEECH 389 0x2000 //TX_SN_NPB_GAIN 390 0x0000 //TX_NN_NPB_GAIN -391 0x0000 //TX_CSX_ALPHA_0 -392 0x0000 //TX_CSX_ALPHA_1 -393 0x0000 //TX_CSX_ALPHA_2 -394 0x0000 //TX_CSX_ALPHA_3 -395 0x0800 //TX_MU_ARSP_EST -396 0x00C8 //TX_P_OUTBEAM_MIN_TH +391 0x3000 //TX_POST_MASK_SUP_HSNE +392 0x07D0 //TX_TAIL_DET_TH +393 0x4000 //TX_B_LESSCUT_RTO_WTA +394 0x0000 //TX_MEL_G_R +395 0x0080 //TX_SUPHIGH_TH +396 0x0000 //TX_MASK_G_R 397 0x0002 //TX_EXTRA_NS_L -398 0x0800 //TX_EXTRA_NS_A -399 0x0005 //TX_VR_NOISE_FLOOR_TH +398 0x1800 //TX_C_POST_FLT_MASK +399 0x7FFF //TX_A_POST_FLT_WNS 400 0x0148 //TX_MIN_G_LOW300HZ 401 0x0004 //TX_MAXLEVEL_CNG 402 0x00B4 //TX_STN_NOISE_TH @@ -16298,16 +24552,16 @@ 511 0x6666 //TX_MIC_TO_BFGAIN 512 0x0000 //TX_MICTOBFGAIN0 513 0x0000 //TX_FASTMUE_TH -514 0x0000 //TX_DERVB_LEN_0 -515 0x0000 //TX_DERVB_LEN_1 -516 0x0000 //TX_RHO_DERVB -517 0x0000 //TX_MIC_INDX_DERVB -518 0x0000 //TX_MU_DERVB -519 0x0000 //TX_DR_RESRV_0 -520 0x0000 //TX_DR_RESRV_1 -521 0x0000 //TX_DR_RESRV_2 -522 0x0000 //TX_DR_RESRV_3 -523 0x0000 //TX_DR_RESRV_4 +514 0x2CCC //TX_DEREVERB_LF_MU +515 0x3200 //TX_DEREVERB_HF_MU +516 0x0007 //TX_DEREVERB_DELAY +517 0x0004 //TX_DEREVERB_COEF_LEN +518 0x0003 //TX_DEREVERB_DNR +519 0x0000 //TX_DEREVERB_ALPHA +520 0x0000 //TX_DEREVERB_BETA +521 0x3A98 //TX_GSC_RTOL_TH +522 0x3A98 //TX_GSC_RTOH_TH +523 0x7E2C //TX_WIDE2_MEANHTH 524 0x0000 //TX_DR_RESRV_5 525 0x0000 //TX_DR_RESRV_6 526 0x0000 //TX_DR_RESRV_7 @@ -16351,23 +24605,23 @@ 564 0x0000 //TX_PB_RESRV_0 565 0x0000 //TX_PB_RESRV_1 566 0x0030 //TX_FDEQ_SUBNUM -567 0x5C54 //TX_FDEQ_GAIN_0 +567 0x5C58 //TX_FDEQ_GAIN_0 568 0x5048 //TX_FDEQ_GAIN_1 569 0x4C4C //TX_FDEQ_GAIN_2 570 0x494D //TX_FDEQ_GAIN_3 571 0x4442 //TX_FDEQ_GAIN_4 -572 0x4448 //TX_FDEQ_GAIN_5 -573 0x4C53 //TX_FDEQ_GAIN_6 -574 0x6244 //TX_FDEQ_GAIN_7 +572 0x444C //TX_FDEQ_GAIN_5 +573 0x5053 //TX_FDEQ_GAIN_6 +574 0x6248 //TX_FDEQ_GAIN_7 575 0x434A //TX_FDEQ_GAIN_8 576 0x4B4D //TX_FDEQ_GAIN_9 577 0x4C4B //TX_FDEQ_GAIN_10 -578 0x4C48 //TX_FDEQ_GAIN_11 -579 0x4747 //TX_FDEQ_GAIN_12 -580 0x4A4B //TX_FDEQ_GAIN_13 -581 0x5059 //TX_FDEQ_GAIN_14 -582 0x6E6E //TX_FDEQ_GAIN_15 -583 0x4848 //TX_FDEQ_GAIN_16 +578 0x4E4A //TX_FDEQ_GAIN_11 +579 0x4842 //TX_FDEQ_GAIN_12 +580 0x4C44 //TX_FDEQ_GAIN_13 +581 0x3A4A //TX_FDEQ_GAIN_14 +582 0x6478 //TX_FDEQ_GAIN_15 +583 0x5848 //TX_FDEQ_GAIN_16 584 0x4848 //TX_FDEQ_GAIN_17 585 0x4848 //TX_FDEQ_GAIN_18 586 0x4848 //TX_FDEQ_GAIN_19 @@ -16387,9 +24641,9 @@ 600 0x0F0F //TX_FDEQ_BIN_9 601 0x0E0D //TX_FDEQ_BIN_10 602 0x0F28 //TX_FDEQ_BIN_11 -603 0x111B //TX_FDEQ_BIN_12 -604 0x291E //TX_FDEQ_BIN_13 -605 0x1E10 //TX_FDEQ_BIN_14 +603 0x110F //TX_FDEQ_BIN_12 +604 0x350F //TX_FDEQ_BIN_13 +605 0x1924 //TX_FDEQ_BIN_14 606 0x1810 //TX_FDEQ_BIN_15 607 0x1021 //TX_FDEQ_BIN_16 608 0x1000 //TX_FDEQ_BIN_17 @@ -16456,16 +24710,16 @@ 669 0x4848 //TX_PREEQ_GAIN_MIC1_3 670 0x4848 //TX_PREEQ_GAIN_MIC1_4 671 0x4848 //TX_PREEQ_GAIN_MIC1_5 -672 0x4848 //TX_PREEQ_GAIN_MIC1_6 -673 0x484A //TX_PREEQ_GAIN_MIC1_7 -674 0x4C4E //TX_PREEQ_GAIN_MIC1_8 -675 0x5054 //TX_PREEQ_GAIN_MIC1_9 -676 0x5658 //TX_PREEQ_GAIN_MIC1_10 -677 0x5C5C //TX_PREEQ_GAIN_MIC1_11 -678 0x6474 //TX_PREEQ_GAIN_MIC1_12 -679 0x7870 //TX_PREEQ_GAIN_MIC1_13 +672 0x494A //TX_PREEQ_GAIN_MIC1_6 +673 0x4B4C //TX_PREEQ_GAIN_MIC1_7 +674 0x4D4E //TX_PREEQ_GAIN_MIC1_8 +675 0x4F52 //TX_PREEQ_GAIN_MIC1_9 +676 0x5355 //TX_PREEQ_GAIN_MIC1_10 +677 0x585C //TX_PREEQ_GAIN_MIC1_11 +678 0x616A //TX_PREEQ_GAIN_MIC1_12 +679 0x726E //TX_PREEQ_GAIN_MIC1_13 680 0x5C48 //TX_PREEQ_GAIN_MIC1_14 -681 0x383C //TX_PREEQ_GAIN_MIC1_15 +681 0x3B38 //TX_PREEQ_GAIN_MIC1_15 682 0x4848 //TX_PREEQ_GAIN_MIC1_16 683 0x4848 //TX_PREEQ_GAIN_MIC1_17 684 0x4848 //TX_PREEQ_GAIN_MIC1_18 @@ -16489,7 +24743,7 @@ 702 0x1B1E //TX_PREEQ_BIN_MIC1_12 703 0x1E1E //TX_PREEQ_BIN_MIC1_13 704 0x1E28 //TX_PREEQ_BIN_MIC1_14 -705 0x282C //TX_PREEQ_BIN_MIC1_15 +705 0x3042 //TX_PREEQ_BIN_MIC1_15 706 0x0000 //TX_PREEQ_BIN_MIC1_16 707 0x0000 //TX_PREEQ_BIN_MIC1_17 708 0x0000 //TX_PREEQ_BIN_MIC1_18 @@ -16650,7 +24904,7 @@ 863 0x199A //TX_TDDRC_HMNC_GAIN 864 0x0000 //TX_TDDRC_SMT_FLAG 865 0x0CCD //TX_TDDRC_SMT_W -866 0x057F //TX_TDDRC_DRC_GAIN +866 0x06EC //TX_TDDRC_DRC_GAIN 867 0x7FFF //TX_TDDRC_LMT_THRD 868 0x0000 //TX_TDDRC_LMT_ALPHA 869 0x0000 //TX_TFMASKLTH @@ -16681,6 +24935,71 @@ 894 0xC000 //TX_FASTNS_SSA_THHFL 895 0xCCCC //TX_FASTNS_SSA_THLFH 896 0xD999 //TX_FASTNS_SSA_THHFH +897 0x2339 //TX_SENDFUNC_REG_MICMUTE +898 0x0021 //TX_SENDFUNC_REG_MICMUTE1 +899 0x02BC //TX_MICMUTE_RATIO_THR +900 0x0140 //TX_MICMUTE_AMP_THR +901 0x0004 //TX_MICMUTE_HPF_IND +902 0x00C0 //TX_MICMUTE_LOG_EYR_TH +903 0x0008 //TX_MICMUTE_CVG_TIME +904 0x0008 //TX_MICMUTE_RELEASE_TIME +905 0x01FE //TX_MIC_VOLUME_MIC0MUTE +906 0x0020 //TX_MICMUTE_EPD_OFFSET_0 +907 0x001E //TX_MICMUTE_FRQ_AEC_L +908 0x7999 //TX_MICMUTE_EAD_THR +909 0x7FFF //TX_MICMUTE_LAMBDA_CB_NLE +910 0x7FFF //TX_MICMUTE_LAMBDA_RE_EST +911 0x4000 //TX_DTD_THR1_MICMUTE_0 +912 0x7000 //TX_DTD_THR1_MICMUTE_1 +913 0x7FFF //TX_DTD_THR1_MICMUTE_2 +914 0x7FFF //TX_DTD_THR1_MICMUTE_3 +915 0x6CCC //TX_DTD_THR2_MICMUTE_0 +916 0x0400 //TX_MICMUTE_MIN_EQ_RE_EST_0 +917 0x0400 //TX_MICMUTE_MIN_EQ_RE_EST_1 +918 0x1000 //TX_MICMUTE_MIN_EQ_RE_EST_2 +919 0x7FFF //TX_MICMUTE_MIN_EQ_RE_EST_3 +920 0x7FFF //TX_MICMUTE_MIN_EQ_RE_EST_4 +921 0x4000 //TX_MICMUTE_C_POST_FLT +922 0x03E8 //TX_MICMUTE_DT_CUT_K +923 0x0001 //TX_MICMUTE_DT_CUT_THR +924 0x03E8 //TX_MICMUTE_DT_CUT_K2 +925 0x0001 //TX_MICMUTE_DT_CUT_THR2 +926 0x0064 //TX_MICMUTE_DT2_HOLD_N +927 0x1000 //TX_MICMUTE_RATIODTH_THCUT +928 0x1000 //TX_MICMUTE_B_POST_FLT_ECHOL +929 0x7FFF //TX_MICMUTE_B_POST_FLT_ECHOH +930 0x0400 //TX_MICMUTE_C_POST_FLT_MASK +931 0x7999 //TX_MICMUTE_RATIODTL_CUT_TH +932 0x0258 //TX_MICMUTE_DT_CUT_K1 +933 0x0800 //TX_MICMUTE_N2_SN_EST +934 0xFC00 //TX_MICMUTE_THR_SN_EST_0 +935 0x001C //TX_MICMUTE_MIN_G_CTRL_0 +936 0x6000 //TX_MICMUTE_A_POST_FILT_S_0 +937 0x7000 //TX_MICMUTE_B_POST_FILT_0 +938 0x2710 //TX_MIC1RUB_AMP_THR +939 0x0010 //TX_MIC1MUTE_RATIO_THR +940 0x0450 //TX_MIC1MUTE_AMP_THR +941 0x0008 //TX_MIC1MUTE_CVG_TIME +942 0x0008 //TX_MIC1MUTE_RELEASE_TIME +943 0x0000 //TX_AMS_RESRV_01 +944 0x0000 //TX_AMS_RESRV_02 +945 0x0000 //TX_AMS_RESRV_03 +946 0x0000 //TX_AMS_RESRV_04 +947 0x0000 //TX_AMS_RESRV_05 +948 0x0000 //TX_AMS_RESRV_06 +949 0x0000 //TX_AMS_RESRV_07 +950 0x0000 //TX_AMS_RESRV_08 +951 0x0000 //TX_AMS_RESRV_09 +952 0x0000 //TX_AMS_RESRV_10 +953 0x0000 //TX_AMS_RESRV_11 +954 0x0000 //TX_AMS_RESRV_12 +955 0x0000 //TX_AMS_RESRV_13 +956 0x0000 //TX_AMS_RESRV_14 +957 0x0000 //TX_AMS_RESRV_15 +958 0x0000 //TX_AMS_RESRV_16 +959 0x0000 //TX_AMS_RESRV_17 +960 0x0000 //TX_AMS_RESRV_18 +961 0x0000 //TX_AMS_RESRV_19 #RX 0 0x000C //RX_RECVFUNC_MODE_0 1 0x0000 //RX_RECVFUNC_MODE_1 @@ -17532,10 +25851,862 @@ 110 0x0000 //RX_FDDRC_RESRV_0 129 0x0100 //RX_SPK_VOL 130 0x0000 //RX_VOL_RESRV_0 +#RX 2 +157 0x000C //RX_RECVFUNC_MODE_0 +158 0x0000 //RX_RECVFUNC_MODE_1 +159 0x0003 //RX_SAMPLINGFREQ_SIG +160 0x0003 //RX_SAMPLINGFREQ_PROC +161 0x000A //RX_FRAME_SZ +162 0x0000 //RX_DELAY_OPT +163 0x1000 //RX_TDDRC_ALPHA_UP_1 +164 0x1000 //RX_TDDRC_ALPHA_UP_2 +165 0x1000 //RX_TDDRC_ALPHA_UP_3 +166 0x1000 //RX_TDDRC_ALPHA_UP_4 +167 0x0800 //RX_PGA +168 0x7FFF //RX_A_HP +169 0x4000 //RX_B_PE +170 0x5800 //RX_THR_PITCH_DET_0 +171 0x5000 //RX_THR_PITCH_DET_1 +172 0x4000 //RX_THR_PITCH_DET_2 +173 0x0008 //RX_PITCH_BFR_LEN +174 0x0003 //RX_SBD_PITCH_DET +175 0x0100 //RX_PP_RESRV_0 +176 0x0020 //RX_PP_RESRV_1 +177 0x0600 //RX_N_SN_EST +178 0x000C //RX_N2_SN_EST +179 0x000F //RX_NS_LVL_CTRL +180 0xF800 //RX_THR_SN_EST +181 0x7E00 //RX_LAMBDA_PFILT +182 0x000A //RX_FENS_RESRV_0 +183 0x0190 //RX_FENS_RESRV_1 +184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +187 0x0002 //RX_EXTRA_NS_L +188 0x0800 //RX_EXTRA_NS_A +189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +190 0x7000 //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +192 0x199A //RX_A_POST_FLT +193 0x0000 //RX_LMT_THRD +194 0x4000 //RX_LMT_ALPHA +195 0x0030 //RX_FDEQ_SUBNUM +196 0x4848 //RX_FDEQ_GAIN_0 +197 0x4848 //RX_FDEQ_GAIN_1 +198 0x4844 //RX_FDEQ_GAIN_2 +199 0x4B4D //RX_FDEQ_GAIN_3 +200 0x4E50 //RX_FDEQ_GAIN_4 +201 0x5254 //RX_FDEQ_GAIN_5 +202 0x5658 //RX_FDEQ_GAIN_6 +203 0x5C60 //RX_FDEQ_GAIN_7 +204 0x6468 //RX_FDEQ_GAIN_8 +205 0x6C70 //RX_FDEQ_GAIN_9 +206 0x7474 //RX_FDEQ_GAIN_10 +207 0x7474 //RX_FDEQ_GAIN_11 +208 0x7474 //RX_FDEQ_GAIN_12 +209 0x7474 //RX_FDEQ_GAIN_13 +210 0x7474 //RX_FDEQ_GAIN_14 +211 0x7474 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0202 //RX_FDEQ_BIN_0 +221 0x0203 //RX_FDEQ_BIN_1 +222 0x0402 //RX_FDEQ_BIN_2 +223 0x0304 //RX_FDEQ_BIN_3 +224 0x0405 //RX_FDEQ_BIN_4 +225 0x0506 //RX_FDEQ_BIN_5 +226 0x0708 //RX_FDEQ_BIN_6 +227 0x090A //RX_FDEQ_BIN_7 +228 0x0B0C //RX_FDEQ_BIN_8 +229 0x0D0E //RX_FDEQ_BIN_9 +230 0x1214 //RX_FDEQ_BIN_10 +231 0x1E1E //RX_FDEQ_BIN_11 +232 0x1E1E //RX_FDEQ_BIN_12 +233 0x1E1E //RX_FDEQ_BIN_13 +234 0x1E1E //RX_FDEQ_BIN_14 +235 0x202C //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x4000 //RX_FDEQ_RESRV_0 +245 0x0320 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0030 //RX_FDDRC_BAND_MARGIN_1 +248 0x0050 //RX_FDDRC_BAND_MARGIN_2 +249 0x0080 //RX_FDDRC_BAND_MARGIN_3 +250 0x0007 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x5000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x6400 //RX_FDDRC_THRD_3_2 +258 0x6400 //RX_FDDRC_THRD_3_3 +259 0x2000 //RX_FDDRC_SLANT_0_0 +260 0x2000 //RX_FDDRC_SLANT_0_1 +261 0x2000 //RX_FDDRC_SLANT_0_2 +262 0x2000 //RX_FDDRC_SLANT_0_3 +263 0x5333 //RX_FDDRC_SLANT_1_0 +264 0x5333 //RX_FDDRC_SLANT_1_1 +265 0x5333 //RX_FDDRC_SLANT_1_2 +266 0x5333 //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +268 0x0002 //RX_FILTINDX +269 0x0000 //RX_TDDRC_THRD_0 +270 0x0000 //RX_TDDRC_THRD_1 +271 0x1800 //RX_TDDRC_THRD_2 +272 0x1800 //RX_TDDRC_THRD_3 +273 0x3000 //RX_TDDRC_SLANT_0 +274 0x6E00 //RX_TDDRC_SLANT_1 +275 0x1000 //RX_TDDRC_ALPHA_UP_0 +276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x199A //RX_TDDRC_HMNC_GAIN +279 0x0001 //RX_TDDRC_SMT_FLAG +280 0x0CCD //RX_TDDRC_SMT_W +281 0x01E0 //RX_TDDRC_DRC_GAIN +282 0x7C00 //RX_LAMBDA_PKA_FP +283 0x2000 //RX_TPKA_FP +284 0x2000 //RX_MIN_G_FP +285 0x0080 //RX_MAX_G_FP +286 0x0100 //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 +288 0x0000 //RX_MAXLEVEL_CNG +289 0x3000 //RX_BWE_UV_TH +290 0x3000 //RX_BWE_UV_TH2 +291 0x1800 //RX_BWE_UV_TH3 +292 0x1000 //RX_BWE_V_TH +293 0x04CD //RX_BWE_GAIN1_V_TH1 +294 0x0F33 //RX_BWE_GAIN1_V_TH2 +295 0x7333 //RX_BWE_UV_EQ +296 0x199A //RX_BWE_V_EQ +297 0x7333 //RX_BWE_TONE_TH +298 0x0004 //RX_BWE_UV_HOLD_T +299 0x6CCD //RX_BWE_GAIN2_ALPHA +300 0x799A //RX_BWE_GAIN3_ALPHA +301 0x001E //RX_BWE_CUTOFF +302 0x3000 //RX_BWE_GAINFILL +303 0x3200 //RX_BWE_MAXTH_TONE +304 0x2000 //RX_BWE_EQ_0 +305 0x2000 //RX_BWE_EQ_1 +306 0x2000 //RX_BWE_EQ_2 +307 0x2000 //RX_BWE_EQ_3 +308 0x2000 //RX_BWE_EQ_4 +309 0x2000 //RX_BWE_EQ_5 +310 0x2000 //RX_BWE_EQ_6 +311 0x0000 //RX_BWE_RESRV_0 +312 0x0000 //RX_BWE_RESRV_1 +313 0x0000 //RX_BWE_RESRV_2 +#VOL 0 +163 0x1000 //RX_TDDRC_ALPHA_UP_1 +164 0x1000 //RX_TDDRC_ALPHA_UP_2 +165 0x1000 //RX_TDDRC_ALPHA_UP_3 +166 0x1000 //RX_TDDRC_ALPHA_UP_4 +184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +190 0x7000 //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +269 0x0000 //RX_TDDRC_THRD_0 +270 0x0000 //RX_TDDRC_THRD_1 +271 0x1800 //RX_TDDRC_THRD_2 +272 0x1800 //RX_TDDRC_THRD_3 +273 0x3000 //RX_TDDRC_SLANT_0 +274 0x6E00 //RX_TDDRC_SLANT_1 +275 0x1000 //RX_TDDRC_ALPHA_UP_0 +276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x199A //RX_TDDRC_HMNC_GAIN +279 0x0001 //RX_TDDRC_SMT_FLAG +280 0x0CCD //RX_TDDRC_SMT_W +281 0x01E0 //RX_TDDRC_DRC_GAIN +195 0x0030 //RX_FDEQ_SUBNUM +196 0x4848 //RX_FDEQ_GAIN_0 +197 0x4848 //RX_FDEQ_GAIN_1 +198 0x4844 //RX_FDEQ_GAIN_2 +199 0x4B4D //RX_FDEQ_GAIN_3 +200 0x4E50 //RX_FDEQ_GAIN_4 +201 0x5254 //RX_FDEQ_GAIN_5 +202 0x5658 //RX_FDEQ_GAIN_6 +203 0x5C60 //RX_FDEQ_GAIN_7 +204 0x6468 //RX_FDEQ_GAIN_8 +205 0x6C70 //RX_FDEQ_GAIN_9 +206 0x7474 //RX_FDEQ_GAIN_10 +207 0x7474 //RX_FDEQ_GAIN_11 +208 0x7474 //RX_FDEQ_GAIN_12 +209 0x7474 //RX_FDEQ_GAIN_13 +210 0x7474 //RX_FDEQ_GAIN_14 +211 0x7474 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0202 //RX_FDEQ_BIN_0 +221 0x0203 //RX_FDEQ_BIN_1 +222 0x0402 //RX_FDEQ_BIN_2 +223 0x0304 //RX_FDEQ_BIN_3 +224 0x0405 //RX_FDEQ_BIN_4 +225 0x0506 //RX_FDEQ_BIN_5 +226 0x0708 //RX_FDEQ_BIN_6 +227 0x090A //RX_FDEQ_BIN_7 +228 0x0B0C //RX_FDEQ_BIN_8 +229 0x0D0E //RX_FDEQ_BIN_9 +230 0x1214 //RX_FDEQ_BIN_10 +231 0x1E1E //RX_FDEQ_BIN_11 +232 0x1E1E //RX_FDEQ_BIN_12 +233 0x1E1E //RX_FDEQ_BIN_13 +234 0x1E1E //RX_FDEQ_BIN_14 +235 0x202C //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x4000 //RX_FDEQ_RESRV_0 +245 0x0320 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0030 //RX_FDDRC_BAND_MARGIN_1 +248 0x0050 //RX_FDDRC_BAND_MARGIN_2 +249 0x0080 //RX_FDDRC_BAND_MARGIN_3 +250 0x0007 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x5000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x6400 //RX_FDDRC_THRD_3_2 +258 0x6400 //RX_FDDRC_THRD_3_3 +259 0x2000 //RX_FDDRC_SLANT_0_0 +260 0x2000 //RX_FDDRC_SLANT_0_1 +261 0x2000 //RX_FDDRC_SLANT_0_2 +262 0x2000 //RX_FDDRC_SLANT_0_3 +263 0x5333 //RX_FDDRC_SLANT_1_0 +264 0x5333 //RX_FDDRC_SLANT_1_1 +265 0x5333 //RX_FDDRC_SLANT_1_2 +266 0x5333 //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +286 0x0100 //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 +#VOL 1 +163 0x1000 //RX_TDDRC_ALPHA_UP_1 +164 0x1000 //RX_TDDRC_ALPHA_UP_2 +165 0x1000 //RX_TDDRC_ALPHA_UP_3 +166 0x1000 //RX_TDDRC_ALPHA_UP_4 +184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +190 0x7000 //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +269 0x0000 //RX_TDDRC_THRD_0 +270 0x0000 //RX_TDDRC_THRD_1 +271 0x1800 //RX_TDDRC_THRD_2 +272 0x1800 //RX_TDDRC_THRD_3 +273 0x3000 //RX_TDDRC_SLANT_0 +274 0x6E00 //RX_TDDRC_SLANT_1 +275 0x1000 //RX_TDDRC_ALPHA_UP_0 +276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x199A //RX_TDDRC_HMNC_GAIN +279 0x0001 //RX_TDDRC_SMT_FLAG +280 0x0CCD //RX_TDDRC_SMT_W +281 0x01E0 //RX_TDDRC_DRC_GAIN +195 0x0030 //RX_FDEQ_SUBNUM +196 0x4848 //RX_FDEQ_GAIN_0 +197 0x4848 //RX_FDEQ_GAIN_1 +198 0x4844 //RX_FDEQ_GAIN_2 +199 0x4B4D //RX_FDEQ_GAIN_3 +200 0x4E50 //RX_FDEQ_GAIN_4 +201 0x5254 //RX_FDEQ_GAIN_5 +202 0x5658 //RX_FDEQ_GAIN_6 +203 0x5C60 //RX_FDEQ_GAIN_7 +204 0x6468 //RX_FDEQ_GAIN_8 +205 0x6C70 //RX_FDEQ_GAIN_9 +206 0x7474 //RX_FDEQ_GAIN_10 +207 0x7474 //RX_FDEQ_GAIN_11 +208 0x7474 //RX_FDEQ_GAIN_12 +209 0x7474 //RX_FDEQ_GAIN_13 +210 0x7474 //RX_FDEQ_GAIN_14 +211 0x7474 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0202 //RX_FDEQ_BIN_0 +221 0x0203 //RX_FDEQ_BIN_1 +222 0x0402 //RX_FDEQ_BIN_2 +223 0x0304 //RX_FDEQ_BIN_3 +224 0x0405 //RX_FDEQ_BIN_4 +225 0x0506 //RX_FDEQ_BIN_5 +226 0x0708 //RX_FDEQ_BIN_6 +227 0x090A //RX_FDEQ_BIN_7 +228 0x0B0C //RX_FDEQ_BIN_8 +229 0x0D0E //RX_FDEQ_BIN_9 +230 0x1214 //RX_FDEQ_BIN_10 +231 0x1E1E //RX_FDEQ_BIN_11 +232 0x1E1E //RX_FDEQ_BIN_12 +233 0x1E1E //RX_FDEQ_BIN_13 +234 0x1E1E //RX_FDEQ_BIN_14 +235 0x202C //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x4000 //RX_FDEQ_RESRV_0 +245 0x0320 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0030 //RX_FDDRC_BAND_MARGIN_1 +248 0x0050 //RX_FDDRC_BAND_MARGIN_2 +249 0x0080 //RX_FDDRC_BAND_MARGIN_3 +250 0x0007 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x5000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x6400 //RX_FDDRC_THRD_3_2 +258 0x6400 //RX_FDDRC_THRD_3_3 +259 0x2000 //RX_FDDRC_SLANT_0_0 +260 0x2000 //RX_FDDRC_SLANT_0_1 +261 0x2000 //RX_FDDRC_SLANT_0_2 +262 0x2000 //RX_FDDRC_SLANT_0_3 +263 0x5333 //RX_FDDRC_SLANT_1_0 +264 0x5333 //RX_FDDRC_SLANT_1_1 +265 0x5333 //RX_FDDRC_SLANT_1_2 +266 0x5333 //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +286 0x0100 //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 +#VOL 2 +163 0x1000 //RX_TDDRC_ALPHA_UP_1 +164 0x1000 //RX_TDDRC_ALPHA_UP_2 +165 0x1000 //RX_TDDRC_ALPHA_UP_3 +166 0x1000 //RX_TDDRC_ALPHA_UP_4 +184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +190 0x7000 //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +269 0x0000 //RX_TDDRC_THRD_0 +270 0x0000 //RX_TDDRC_THRD_1 +271 0x1800 //RX_TDDRC_THRD_2 +272 0x1800 //RX_TDDRC_THRD_3 +273 0x3000 //RX_TDDRC_SLANT_0 +274 0x6E00 //RX_TDDRC_SLANT_1 +275 0x1000 //RX_TDDRC_ALPHA_UP_0 +276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x199A //RX_TDDRC_HMNC_GAIN +279 0x0001 //RX_TDDRC_SMT_FLAG +280 0x0CCD //RX_TDDRC_SMT_W +281 0x01E0 //RX_TDDRC_DRC_GAIN +195 0x0030 //RX_FDEQ_SUBNUM +196 0x4848 //RX_FDEQ_GAIN_0 +197 0x4848 //RX_FDEQ_GAIN_1 +198 0x4844 //RX_FDEQ_GAIN_2 +199 0x4B4D //RX_FDEQ_GAIN_3 +200 0x4E50 //RX_FDEQ_GAIN_4 +201 0x5254 //RX_FDEQ_GAIN_5 +202 0x5658 //RX_FDEQ_GAIN_6 +203 0x5C60 //RX_FDEQ_GAIN_7 +204 0x6468 //RX_FDEQ_GAIN_8 +205 0x6C70 //RX_FDEQ_GAIN_9 +206 0x7474 //RX_FDEQ_GAIN_10 +207 0x7474 //RX_FDEQ_GAIN_11 +208 0x7474 //RX_FDEQ_GAIN_12 +209 0x7474 //RX_FDEQ_GAIN_13 +210 0x7474 //RX_FDEQ_GAIN_14 +211 0x7474 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0202 //RX_FDEQ_BIN_0 +221 0x0203 //RX_FDEQ_BIN_1 +222 0x0402 //RX_FDEQ_BIN_2 +223 0x0304 //RX_FDEQ_BIN_3 +224 0x0405 //RX_FDEQ_BIN_4 +225 0x0506 //RX_FDEQ_BIN_5 +226 0x0708 //RX_FDEQ_BIN_6 +227 0x090A //RX_FDEQ_BIN_7 +228 0x0B0C //RX_FDEQ_BIN_8 +229 0x0D0E //RX_FDEQ_BIN_9 +230 0x1214 //RX_FDEQ_BIN_10 +231 0x1E1E //RX_FDEQ_BIN_11 +232 0x1E1E //RX_FDEQ_BIN_12 +233 0x1E1E //RX_FDEQ_BIN_13 +234 0x1E1E //RX_FDEQ_BIN_14 +235 0x202C //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x4000 //RX_FDEQ_RESRV_0 +245 0x0320 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0030 //RX_FDDRC_BAND_MARGIN_1 +248 0x0050 //RX_FDDRC_BAND_MARGIN_2 +249 0x0080 //RX_FDDRC_BAND_MARGIN_3 +250 0x0007 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x5000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x6400 //RX_FDDRC_THRD_3_2 +258 0x6400 //RX_FDDRC_THRD_3_3 +259 0x2000 //RX_FDDRC_SLANT_0_0 +260 0x2000 //RX_FDDRC_SLANT_0_1 +261 0x2000 //RX_FDDRC_SLANT_0_2 +262 0x2000 //RX_FDDRC_SLANT_0_3 +263 0x5333 //RX_FDDRC_SLANT_1_0 +264 0x5333 //RX_FDDRC_SLANT_1_1 +265 0x5333 //RX_FDDRC_SLANT_1_2 +266 0x5333 //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +286 0x0100 //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 +#VOL 3 +163 0x1000 //RX_TDDRC_ALPHA_UP_1 +164 0x1000 //RX_TDDRC_ALPHA_UP_2 +165 0x1000 //RX_TDDRC_ALPHA_UP_3 +166 0x1000 //RX_TDDRC_ALPHA_UP_4 +184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +190 0x7000 //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +269 0x0000 //RX_TDDRC_THRD_0 +270 0x0000 //RX_TDDRC_THRD_1 +271 0x1800 //RX_TDDRC_THRD_2 +272 0x1800 //RX_TDDRC_THRD_3 +273 0x3000 //RX_TDDRC_SLANT_0 +274 0x6E00 //RX_TDDRC_SLANT_1 +275 0x1000 //RX_TDDRC_ALPHA_UP_0 +276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x199A //RX_TDDRC_HMNC_GAIN +279 0x0001 //RX_TDDRC_SMT_FLAG +280 0x0CCD //RX_TDDRC_SMT_W +281 0x01E0 //RX_TDDRC_DRC_GAIN +195 0x0030 //RX_FDEQ_SUBNUM +196 0x4848 //RX_FDEQ_GAIN_0 +197 0x4848 //RX_FDEQ_GAIN_1 +198 0x4844 //RX_FDEQ_GAIN_2 +199 0x4B4D //RX_FDEQ_GAIN_3 +200 0x4E50 //RX_FDEQ_GAIN_4 +201 0x5254 //RX_FDEQ_GAIN_5 +202 0x5658 //RX_FDEQ_GAIN_6 +203 0x5C60 //RX_FDEQ_GAIN_7 +204 0x6468 //RX_FDEQ_GAIN_8 +205 0x6C70 //RX_FDEQ_GAIN_9 +206 0x7474 //RX_FDEQ_GAIN_10 +207 0x7474 //RX_FDEQ_GAIN_11 +208 0x7474 //RX_FDEQ_GAIN_12 +209 0x7474 //RX_FDEQ_GAIN_13 +210 0x7474 //RX_FDEQ_GAIN_14 +211 0x7474 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0202 //RX_FDEQ_BIN_0 +221 0x0203 //RX_FDEQ_BIN_1 +222 0x0402 //RX_FDEQ_BIN_2 +223 0x0304 //RX_FDEQ_BIN_3 +224 0x0405 //RX_FDEQ_BIN_4 +225 0x0506 //RX_FDEQ_BIN_5 +226 0x0708 //RX_FDEQ_BIN_6 +227 0x090A //RX_FDEQ_BIN_7 +228 0x0B0C //RX_FDEQ_BIN_8 +229 0x0D0E //RX_FDEQ_BIN_9 +230 0x1214 //RX_FDEQ_BIN_10 +231 0x1E1E //RX_FDEQ_BIN_11 +232 0x1E1E //RX_FDEQ_BIN_12 +233 0x1E1E //RX_FDEQ_BIN_13 +234 0x1E1E //RX_FDEQ_BIN_14 +235 0x202C //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x4000 //RX_FDEQ_RESRV_0 +245 0x0320 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0030 //RX_FDDRC_BAND_MARGIN_1 +248 0x0050 //RX_FDDRC_BAND_MARGIN_2 +249 0x0080 //RX_FDDRC_BAND_MARGIN_3 +250 0x0007 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x5000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x6400 //RX_FDDRC_THRD_3_2 +258 0x6400 //RX_FDDRC_THRD_3_3 +259 0x2000 //RX_FDDRC_SLANT_0_0 +260 0x2000 //RX_FDDRC_SLANT_0_1 +261 0x2000 //RX_FDDRC_SLANT_0_2 +262 0x2000 //RX_FDDRC_SLANT_0_3 +263 0x5333 //RX_FDDRC_SLANT_1_0 +264 0x5333 //RX_FDDRC_SLANT_1_1 +265 0x5333 //RX_FDDRC_SLANT_1_2 +266 0x5333 //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +286 0x0100 //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 +#VOL 4 +163 0x1000 //RX_TDDRC_ALPHA_UP_1 +164 0x1000 //RX_TDDRC_ALPHA_UP_2 +165 0x1000 //RX_TDDRC_ALPHA_UP_3 +166 0x1000 //RX_TDDRC_ALPHA_UP_4 +184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +190 0x7000 //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +269 0x0000 //RX_TDDRC_THRD_0 +270 0x0000 //RX_TDDRC_THRD_1 +271 0x1800 //RX_TDDRC_THRD_2 +272 0x1800 //RX_TDDRC_THRD_3 +273 0x3000 //RX_TDDRC_SLANT_0 +274 0x6E00 //RX_TDDRC_SLANT_1 +275 0x1000 //RX_TDDRC_ALPHA_UP_0 +276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x199A //RX_TDDRC_HMNC_GAIN +279 0x0001 //RX_TDDRC_SMT_FLAG +280 0x0CCD //RX_TDDRC_SMT_W +281 0x01E0 //RX_TDDRC_DRC_GAIN +195 0x0030 //RX_FDEQ_SUBNUM +196 0x4848 //RX_FDEQ_GAIN_0 +197 0x4848 //RX_FDEQ_GAIN_1 +198 0x4844 //RX_FDEQ_GAIN_2 +199 0x4B4D //RX_FDEQ_GAIN_3 +200 0x4E50 //RX_FDEQ_GAIN_4 +201 0x5254 //RX_FDEQ_GAIN_5 +202 0x5658 //RX_FDEQ_GAIN_6 +203 0x5C60 //RX_FDEQ_GAIN_7 +204 0x6468 //RX_FDEQ_GAIN_8 +205 0x6C70 //RX_FDEQ_GAIN_9 +206 0x7474 //RX_FDEQ_GAIN_10 +207 0x7474 //RX_FDEQ_GAIN_11 +208 0x7474 //RX_FDEQ_GAIN_12 +209 0x7474 //RX_FDEQ_GAIN_13 +210 0x7474 //RX_FDEQ_GAIN_14 +211 0x7474 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0202 //RX_FDEQ_BIN_0 +221 0x0203 //RX_FDEQ_BIN_1 +222 0x0402 //RX_FDEQ_BIN_2 +223 0x0304 //RX_FDEQ_BIN_3 +224 0x0405 //RX_FDEQ_BIN_4 +225 0x0506 //RX_FDEQ_BIN_5 +226 0x0708 //RX_FDEQ_BIN_6 +227 0x090A //RX_FDEQ_BIN_7 +228 0x0B0C //RX_FDEQ_BIN_8 +229 0x0D0E //RX_FDEQ_BIN_9 +230 0x1214 //RX_FDEQ_BIN_10 +231 0x1E1E //RX_FDEQ_BIN_11 +232 0x1E1E //RX_FDEQ_BIN_12 +233 0x1E1E //RX_FDEQ_BIN_13 +234 0x1E1E //RX_FDEQ_BIN_14 +235 0x202C //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x4000 //RX_FDEQ_RESRV_0 +245 0x0320 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0030 //RX_FDDRC_BAND_MARGIN_1 +248 0x0050 //RX_FDDRC_BAND_MARGIN_2 +249 0x0080 //RX_FDDRC_BAND_MARGIN_3 +250 0x0007 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x5000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x6400 //RX_FDDRC_THRD_3_2 +258 0x6400 //RX_FDDRC_THRD_3_3 +259 0x2000 //RX_FDDRC_SLANT_0_0 +260 0x2000 //RX_FDDRC_SLANT_0_1 +261 0x2000 //RX_FDDRC_SLANT_0_2 +262 0x2000 //RX_FDDRC_SLANT_0_3 +263 0x5333 //RX_FDDRC_SLANT_1_0 +264 0x5333 //RX_FDDRC_SLANT_1_1 +265 0x5333 //RX_FDDRC_SLANT_1_2 +266 0x5333 //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +286 0x0100 //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 +#VOL 5 +163 0x1000 //RX_TDDRC_ALPHA_UP_1 +164 0x1000 //RX_TDDRC_ALPHA_UP_2 +165 0x1000 //RX_TDDRC_ALPHA_UP_3 +166 0x1000 //RX_TDDRC_ALPHA_UP_4 +184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +190 0x7000 //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +269 0x0000 //RX_TDDRC_THRD_0 +270 0x0000 //RX_TDDRC_THRD_1 +271 0x1800 //RX_TDDRC_THRD_2 +272 0x1800 //RX_TDDRC_THRD_3 +273 0x3000 //RX_TDDRC_SLANT_0 +274 0x6E00 //RX_TDDRC_SLANT_1 +275 0x1000 //RX_TDDRC_ALPHA_UP_0 +276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x199A //RX_TDDRC_HMNC_GAIN +279 0x0001 //RX_TDDRC_SMT_FLAG +280 0x0CCD //RX_TDDRC_SMT_W +281 0x01E0 //RX_TDDRC_DRC_GAIN +195 0x0030 //RX_FDEQ_SUBNUM +196 0x4848 //RX_FDEQ_GAIN_0 +197 0x4848 //RX_FDEQ_GAIN_1 +198 0x4844 //RX_FDEQ_GAIN_2 +199 0x4B4D //RX_FDEQ_GAIN_3 +200 0x4E50 //RX_FDEQ_GAIN_4 +201 0x5254 //RX_FDEQ_GAIN_5 +202 0x5658 //RX_FDEQ_GAIN_6 +203 0x5C60 //RX_FDEQ_GAIN_7 +204 0x6468 //RX_FDEQ_GAIN_8 +205 0x6C70 //RX_FDEQ_GAIN_9 +206 0x7474 //RX_FDEQ_GAIN_10 +207 0x7474 //RX_FDEQ_GAIN_11 +208 0x7474 //RX_FDEQ_GAIN_12 +209 0x7474 //RX_FDEQ_GAIN_13 +210 0x7474 //RX_FDEQ_GAIN_14 +211 0x7474 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0202 //RX_FDEQ_BIN_0 +221 0x0203 //RX_FDEQ_BIN_1 +222 0x0402 //RX_FDEQ_BIN_2 +223 0x0304 //RX_FDEQ_BIN_3 +224 0x0405 //RX_FDEQ_BIN_4 +225 0x0506 //RX_FDEQ_BIN_5 +226 0x0708 //RX_FDEQ_BIN_6 +227 0x090A //RX_FDEQ_BIN_7 +228 0x0B0C //RX_FDEQ_BIN_8 +229 0x0D0E //RX_FDEQ_BIN_9 +230 0x1214 //RX_FDEQ_BIN_10 +231 0x1E1E //RX_FDEQ_BIN_11 +232 0x1E1E //RX_FDEQ_BIN_12 +233 0x1E1E //RX_FDEQ_BIN_13 +234 0x1E1E //RX_FDEQ_BIN_14 +235 0x202C //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x4000 //RX_FDEQ_RESRV_0 +245 0x0320 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0030 //RX_FDDRC_BAND_MARGIN_1 +248 0x0050 //RX_FDDRC_BAND_MARGIN_2 +249 0x0080 //RX_FDDRC_BAND_MARGIN_3 +250 0x0007 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x5000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x6400 //RX_FDDRC_THRD_3_2 +258 0x6400 //RX_FDDRC_THRD_3_3 +259 0x2000 //RX_FDDRC_SLANT_0_0 +260 0x2000 //RX_FDDRC_SLANT_0_1 +261 0x2000 //RX_FDDRC_SLANT_0_2 +262 0x2000 //RX_FDDRC_SLANT_0_3 +263 0x5333 //RX_FDDRC_SLANT_1_0 +264 0x5333 //RX_FDDRC_SLANT_1_1 +265 0x5333 //RX_FDDRC_SLANT_1_2 +266 0x5333 //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +286 0x0100 //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 +#VOL 6 +163 0x1000 //RX_TDDRC_ALPHA_UP_1 +164 0x1000 //RX_TDDRC_ALPHA_UP_2 +165 0x1000 //RX_TDDRC_ALPHA_UP_3 +166 0x1000 //RX_TDDRC_ALPHA_UP_4 +184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +190 0x7000 //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +269 0x0000 //RX_TDDRC_THRD_0 +270 0x0000 //RX_TDDRC_THRD_1 +271 0x1800 //RX_TDDRC_THRD_2 +272 0x1800 //RX_TDDRC_THRD_3 +273 0x3000 //RX_TDDRC_SLANT_0 +274 0x6E00 //RX_TDDRC_SLANT_1 +275 0x1000 //RX_TDDRC_ALPHA_UP_0 +276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x199A //RX_TDDRC_HMNC_GAIN +279 0x0001 //RX_TDDRC_SMT_FLAG +280 0x0CCD //RX_TDDRC_SMT_W +281 0x01E0 //RX_TDDRC_DRC_GAIN +195 0x0030 //RX_FDEQ_SUBNUM +196 0x4848 //RX_FDEQ_GAIN_0 +197 0x4848 //RX_FDEQ_GAIN_1 +198 0x4844 //RX_FDEQ_GAIN_2 +199 0x4B4D //RX_FDEQ_GAIN_3 +200 0x4E50 //RX_FDEQ_GAIN_4 +201 0x5254 //RX_FDEQ_GAIN_5 +202 0x5658 //RX_FDEQ_GAIN_6 +203 0x5C60 //RX_FDEQ_GAIN_7 +204 0x6468 //RX_FDEQ_GAIN_8 +205 0x6C70 //RX_FDEQ_GAIN_9 +206 0x7474 //RX_FDEQ_GAIN_10 +207 0x7474 //RX_FDEQ_GAIN_11 +208 0x7474 //RX_FDEQ_GAIN_12 +209 0x7474 //RX_FDEQ_GAIN_13 +210 0x7474 //RX_FDEQ_GAIN_14 +211 0x7474 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0202 //RX_FDEQ_BIN_0 +221 0x0203 //RX_FDEQ_BIN_1 +222 0x0402 //RX_FDEQ_BIN_2 +223 0x0304 //RX_FDEQ_BIN_3 +224 0x0405 //RX_FDEQ_BIN_4 +225 0x0506 //RX_FDEQ_BIN_5 +226 0x0708 //RX_FDEQ_BIN_6 +227 0x090A //RX_FDEQ_BIN_7 +228 0x0B0C //RX_FDEQ_BIN_8 +229 0x0D0E //RX_FDEQ_BIN_9 +230 0x1214 //RX_FDEQ_BIN_10 +231 0x1E1E //RX_FDEQ_BIN_11 +232 0x1E1E //RX_FDEQ_BIN_12 +233 0x1E1E //RX_FDEQ_BIN_13 +234 0x1E1E //RX_FDEQ_BIN_14 +235 0x202C //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x4000 //RX_FDEQ_RESRV_0 +245 0x0320 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0030 //RX_FDDRC_BAND_MARGIN_1 +248 0x0050 //RX_FDDRC_BAND_MARGIN_2 +249 0x0080 //RX_FDDRC_BAND_MARGIN_3 +250 0x0007 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x5000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x6400 //RX_FDDRC_THRD_3_2 +258 0x6400 //RX_FDDRC_THRD_3_3 +259 0x2000 //RX_FDDRC_SLANT_0_0 +260 0x2000 //RX_FDDRC_SLANT_0_1 +261 0x2000 //RX_FDDRC_SLANT_0_2 +262 0x2000 //RX_FDDRC_SLANT_0_3 +263 0x5333 //RX_FDDRC_SLANT_1_0 +264 0x5333 //RX_FDDRC_SLANT_1_1 +265 0x5333 //RX_FDDRC_SLANT_1_2 +266 0x5333 //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +286 0x0100 //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 #CASE_NAME HANDSET-HANDSET_HAC-VOICE_GENERIC-FB -#PARAM_TYPE TX+RX -#TOTAL_CUSTOM_STEP 7 +#PARAM_MODE Full +#PARAM_TYPE TX+2RX +#TOTAL_CUSTOM_STEP 7+7 #TX 0 0x0000 //TX_OPERATION_MODE_0 1 0x0000 //TX_OPERATION_MODE_1 @@ -17558,7 +26729,7 @@ 18 0x0000 //TX_SYS_RESRV_2 19 0x0000 //TX_SYS_RESRV_3 20 0x0000 //TX_DIST2REF0 -21 0x00A4 //TX_DIST2REF1 +21 0x00A3 //TX_DIST2REF1 22 0x0000 //TX_DIST2REF_02 23 0x0000 //TX_DIST2REF_03 24 0x0000 //TX_DIST2REF_04 @@ -17788,12 +26959,12 @@ 248 0xF800 //TX_THR_SN_EST_6 249 0xF700 //TX_THR_SN_EST_7 250 0x0000 //TX_DELTA_THR_SN_EST_0 -251 0x0100 //TX_DELTA_THR_SN_EST_1 +251 0x0200 //TX_DELTA_THR_SN_EST_1 252 0x0200 //TX_DELTA_THR_SN_EST_2 253 0x0200 //TX_DELTA_THR_SN_EST_3 -254 0x0200 //TX_DELTA_THR_SN_EST_4 -255 0x0100 //TX_DELTA_THR_SN_EST_5 -256 0x0200 //TX_DELTA_THR_SN_EST_6 +254 0x0100 //TX_DELTA_THR_SN_EST_4 +255 0x0200 //TX_DELTA_THR_SN_EST_5 +256 0x0100 //TX_DELTA_THR_SN_EST_6 257 0x0200 //TX_DELTA_THR_SN_EST_7 258 0x4000 //TX_LAMBDA_NN_EST_0 259 0x4000 //TX_LAMBDA_NN_EST_1 @@ -17821,16 +26992,16 @@ 281 0x0014 //TX_NS_LVL_CTRL_0 282 0x0016 //TX_NS_LVL_CTRL_1 283 0x0016 //TX_NS_LVL_CTRL_2 -284 0x0016 //TX_NS_LVL_CTRL_3 -285 0x0018 //TX_NS_LVL_CTRL_4 -286 0x0016 //TX_NS_LVL_CTRL_5 -287 0x0012 //TX_NS_LVL_CTRL_6 +284 0x0018 //TX_NS_LVL_CTRL_3 +285 0x0016 //TX_NS_LVL_CTRL_4 +286 0x0012 //TX_NS_LVL_CTRL_5 +287 0x0016 //TX_NS_LVL_CTRL_6 288 0x0017 //TX_NS_LVL_CTRL_7 289 0x000E //TX_MIN_GAIN_S_0 -290 0x0012 //TX_MIN_GAIN_S_1 -291 0x0007 //TX_MIN_GAIN_S_2 -292 0x0012 //TX_MIN_GAIN_S_3 -293 0x0010 //TX_MIN_GAIN_S_4 +290 0x0007 //TX_MIN_GAIN_S_1 +291 0x0012 //TX_MIN_GAIN_S_2 +292 0x0010 //TX_MIN_GAIN_S_3 +293 0x0012 //TX_MIN_GAIN_S_4 294 0x0012 //TX_MIN_GAIN_S_5 295 0x0012 //TX_MIN_GAIN_S_6 296 0x0012 //TX_MIN_GAIN_S_7 @@ -17852,29 +27023,29 @@ 312 0x7FFF //TX_A_POST_FILT_0 313 0x2000 //TX_A_POST_FILT_1 314 0x4000 //TX_A_POST_FILT_S_0 -315 0x5000 //TX_A_POST_FILT_S_1 +315 0x4000 //TX_A_POST_FILT_S_1 316 0x4000 //TX_A_POST_FILT_S_2 317 0x4000 //TX_A_POST_FILT_S_3 318 0x4000 //TX_A_POST_FILT_S_4 319 0x4000 //TX_A_POST_FILT_S_5 -320 0x4000 //TX_A_POST_FILT_S_6 +320 0x5000 //TX_A_POST_FILT_S_6 321 0x7000 //TX_A_POST_FILT_S_7 322 0x1000 //TX_B_POST_FILT_0 323 0x2000 //TX_B_POST_FILT_1 -324 0x3000 //TX_B_POST_FILT_2 +324 0x2000 //TX_B_POST_FILT_2 325 0x2000 //TX_B_POST_FILT_3 -326 0x5000 //TX_B_POST_FILT_4 +326 0x2000 //TX_B_POST_FILT_4 327 0x2000 //TX_B_POST_FILT_5 -328 0x6000 //TX_B_POST_FILT_6 +328 0x3000 //TX_B_POST_FILT_6 329 0x3000 //TX_B_POST_FILT_7 330 0x1000 //TX_B_LESSCUT_RTO_S_0 -331 0x6000 //TX_B_LESSCUT_RTO_S_1 -332 0x6000 //TX_B_LESSCUT_RTO_S_2 -333 0x6000 //TX_B_LESSCUT_RTO_S_3 -334 0x6000 //TX_B_LESSCUT_RTO_S_4 -335 0x6000 //TX_B_LESSCUT_RTO_S_5 -336 0x7FFF //TX_B_LESSCUT_RTO_S_6 -337 0x7FFF //TX_B_LESSCUT_RTO_S_7 +331 0x1000 //TX_B_LESSCUT_RTO_S_1 +332 0x1000 //TX_B_LESSCUT_RTO_S_2 +333 0x1000 //TX_B_LESSCUT_RTO_S_3 +334 0x1000 //TX_B_LESSCUT_RTO_S_4 +335 0x1000 //TX_B_LESSCUT_RTO_S_5 +336 0x1000 //TX_B_LESSCUT_RTO_S_6 +337 0x1000 //TX_B_LESSCUT_RTO_S_7 338 0x7E14 //TX_LAMBDA_PFILT 339 0x7C29 //TX_LAMBDA_PFILT_S_0 340 0x7C29 //TX_LAMBDA_PFILT_S_1 @@ -17917,10 +27088,10 @@ 377 0x4E20 //TX_NOISE_TH_5_4 378 0x39DF //TX_NOISE_TH_6 379 0x0014 //TX_MINENOISE_TH -380 0x4000 //TX_MINENOISE_MIC0_TH_MTS -381 0xFFEE //TX_MINENOISE_MIC0_TH_EXP -382 0x6000 //TX_MINENOISE_MIC0_S_TH_MTS -383 0xFFF3 //TX_MINENOISE_MIC0_S_TH_EXP +380 0xD508 //TX_MORENS_TFMASK_TH +381 0x0001 //TX_DRC_QUIET_FLOOR +382 0x6D60 //TX_RATIODTL_CUT_TH +383 0x1482 //TX_DT_CUT_K1 384 0x00A5 //TX_OUT_ENER_S_TH_CLEAN 385 0x00A5 //TX_OUT_ENER_S_TH_LESSCLEAN 386 0x00A5 //TX_OUT_ENER_S_TH_NOISY @@ -17928,15 +27099,15 @@ 388 0x0200 //TX_OUT_ENER_TH_SPEECH 389 0x2000 //TX_SN_NPB_GAIN 390 0x0000 //TX_NN_NPB_GAIN -391 0x0000 //TX_CSX_ALPHA_0 -392 0x0000 //TX_CSX_ALPHA_1 -393 0x0000 //TX_CSX_ALPHA_2 -394 0x0000 //TX_CSX_ALPHA_3 -395 0x0800 //TX_MU_ARSP_EST -396 0x00C8 //TX_P_OUTBEAM_MIN_TH +391 0x3000 //TX_POST_MASK_SUP_HSNE +392 0x07D0 //TX_TAIL_DET_TH +393 0x4000 //TX_B_LESSCUT_RTO_WTA +394 0x0000 //TX_MEL_G_R +395 0x0080 //TX_SUPHIGH_TH +396 0x0000 //TX_MASK_G_R 397 0x0002 //TX_EXTRA_NS_L -398 0x0800 //TX_EXTRA_NS_A -399 0x0005 //TX_VR_NOISE_FLOOR_TH +398 0x1800 //TX_C_POST_FLT_MASK +399 0x7FFF //TX_A_POST_FLT_WNS 400 0x0148 //TX_MIN_G_LOW300HZ 401 0x0004 //TX_MAXLEVEL_CNG 402 0x00B4 //TX_STN_NOISE_TH @@ -18051,16 +27222,16 @@ 511 0x6666 //TX_MIC_TO_BFGAIN 512 0x0000 //TX_MICTOBFGAIN0 513 0x0000 //TX_FASTMUE_TH -514 0x0000 //TX_DERVB_LEN_0 -515 0x0000 //TX_DERVB_LEN_1 -516 0x0000 //TX_RHO_DERVB -517 0x0000 //TX_MIC_INDX_DERVB -518 0x0000 //TX_MU_DERVB -519 0x0000 //TX_DR_RESRV_0 -520 0x0000 //TX_DR_RESRV_1 -521 0x0000 //TX_DR_RESRV_2 -522 0x0000 //TX_DR_RESRV_3 -523 0x0000 //TX_DR_RESRV_4 +514 0x2CCC //TX_DEREVERB_LF_MU +515 0x3200 //TX_DEREVERB_HF_MU +516 0x0007 //TX_DEREVERB_DELAY +517 0x0004 //TX_DEREVERB_COEF_LEN +518 0x0003 //TX_DEREVERB_DNR +519 0x0000 //TX_DEREVERB_ALPHA +520 0x0000 //TX_DEREVERB_BETA +521 0x7FFF //TX_GSC_RTOL_TH +522 0x7FFF //TX_GSC_RTOH_TH +523 0x7E2C //TX_WIDE2_MEANHTH 524 0x0000 //TX_DR_RESRV_5 525 0x0000 //TX_DR_RESRV_6 526 0x0000 //TX_DR_RESRV_7 @@ -18434,6 +27605,71 @@ 894 0xC000 //TX_FASTNS_SSA_THHFL 895 0xCCCC //TX_FASTNS_SSA_THLFH 896 0xD999 //TX_FASTNS_SSA_THHFH +897 0x2339 //TX_SENDFUNC_REG_MICMUTE +898 0x0021 //TX_SENDFUNC_REG_MICMUTE1 +899 0x02BC //TX_MICMUTE_RATIO_THR +900 0x0140 //TX_MICMUTE_AMP_THR +901 0x0004 //TX_MICMUTE_HPF_IND +902 0x00C0 //TX_MICMUTE_LOG_EYR_TH +903 0x0008 //TX_MICMUTE_CVG_TIME +904 0x0008 //TX_MICMUTE_RELEASE_TIME +905 0x01FE //TX_MIC_VOLUME_MIC0MUTE +906 0x0020 //TX_MICMUTE_EPD_OFFSET_0 +907 0x001E //TX_MICMUTE_FRQ_AEC_L +908 0x7999 //TX_MICMUTE_EAD_THR +909 0x7FFF //TX_MICMUTE_LAMBDA_CB_NLE +910 0x7FFF //TX_MICMUTE_LAMBDA_RE_EST +911 0x4000 //TX_DTD_THR1_MICMUTE_0 +912 0x7000 //TX_DTD_THR1_MICMUTE_1 +913 0x7FFF //TX_DTD_THR1_MICMUTE_2 +914 0x7FFF //TX_DTD_THR1_MICMUTE_3 +915 0x6CCC //TX_DTD_THR2_MICMUTE_0 +916 0x0400 //TX_MICMUTE_MIN_EQ_RE_EST_0 +917 0x0400 //TX_MICMUTE_MIN_EQ_RE_EST_1 +918 0x1000 //TX_MICMUTE_MIN_EQ_RE_EST_2 +919 0x7FFF //TX_MICMUTE_MIN_EQ_RE_EST_3 +920 0x7FFF //TX_MICMUTE_MIN_EQ_RE_EST_4 +921 0x4000 //TX_MICMUTE_C_POST_FLT +922 0x03E8 //TX_MICMUTE_DT_CUT_K +923 0x0001 //TX_MICMUTE_DT_CUT_THR +924 0x03E8 //TX_MICMUTE_DT_CUT_K2 +925 0x0001 //TX_MICMUTE_DT_CUT_THR2 +926 0x0064 //TX_MICMUTE_DT2_HOLD_N +927 0x1000 //TX_MICMUTE_RATIODTH_THCUT +928 0x1000 //TX_MICMUTE_B_POST_FLT_ECHOL +929 0x7FFF //TX_MICMUTE_B_POST_FLT_ECHOH +930 0x0400 //TX_MICMUTE_C_POST_FLT_MASK +931 0x7999 //TX_MICMUTE_RATIODTL_CUT_TH +932 0x0258 //TX_MICMUTE_DT_CUT_K1 +933 0x0800 //TX_MICMUTE_N2_SN_EST +934 0xFC00 //TX_MICMUTE_THR_SN_EST_0 +935 0x001C //TX_MICMUTE_MIN_G_CTRL_0 +936 0x6000 //TX_MICMUTE_A_POST_FILT_S_0 +937 0x7000 //TX_MICMUTE_B_POST_FILT_0 +938 0x2710 //TX_MIC1RUB_AMP_THR +939 0x0010 //TX_MIC1MUTE_RATIO_THR +940 0x0450 //TX_MIC1MUTE_AMP_THR +941 0x0008 //TX_MIC1MUTE_CVG_TIME +942 0x0008 //TX_MIC1MUTE_RELEASE_TIME +943 0x0000 //TX_AMS_RESRV_01 +944 0x0000 //TX_AMS_RESRV_02 +945 0x0000 //TX_AMS_RESRV_03 +946 0x0000 //TX_AMS_RESRV_04 +947 0x0000 //TX_AMS_RESRV_05 +948 0x0000 //TX_AMS_RESRV_06 +949 0x0000 //TX_AMS_RESRV_07 +950 0x0000 //TX_AMS_RESRV_08 +951 0x0000 //TX_AMS_RESRV_09 +952 0x0000 //TX_AMS_RESRV_10 +953 0x0000 //TX_AMS_RESRV_11 +954 0x0000 //TX_AMS_RESRV_12 +955 0x0000 //TX_AMS_RESRV_13 +956 0x0000 //TX_AMS_RESRV_14 +957 0x0000 //TX_AMS_RESRV_15 +958 0x0000 //TX_AMS_RESRV_16 +959 0x0000 //TX_AMS_RESRV_17 +960 0x0000 //TX_AMS_RESRV_18 +961 0x0000 //TX_AMS_RESRV_19 #RX 0 0x000C //RX_RECVFUNC_MODE_0 1 0x0000 //RX_RECVFUNC_MODE_1 @@ -19285,14 +28521,866 @@ 110 0x0000 //RX_FDDRC_RESRV_0 129 0x0100 //RX_SPK_VOL 130 0x0000 //RX_VOL_RESRV_0 +#RX 2 +157 0x000C //RX_RECVFUNC_MODE_0 +158 0x0000 //RX_RECVFUNC_MODE_1 +159 0x0004 //RX_SAMPLINGFREQ_SIG +160 0x0004 //RX_SAMPLINGFREQ_PROC +161 0x000A //RX_FRAME_SZ +162 0x0000 //RX_DELAY_OPT +163 0x1000 //RX_TDDRC_ALPHA_UP_1 +164 0x1000 //RX_TDDRC_ALPHA_UP_2 +165 0x1000 //RX_TDDRC_ALPHA_UP_3 +166 0x1000 //RX_TDDRC_ALPHA_UP_4 +167 0x0800 //RX_PGA +168 0x7FFF //RX_A_HP +169 0x4000 //RX_B_PE +170 0x5800 //RX_THR_PITCH_DET_0 +171 0x5000 //RX_THR_PITCH_DET_1 +172 0x4000 //RX_THR_PITCH_DET_2 +173 0x0008 //RX_PITCH_BFR_LEN +174 0x0003 //RX_SBD_PITCH_DET +175 0x0100 //RX_PP_RESRV_0 +176 0x0020 //RX_PP_RESRV_1 +177 0x0600 //RX_N_SN_EST +178 0x000C //RX_N2_SN_EST +179 0x000F //RX_NS_LVL_CTRL +180 0xF800 //RX_THR_SN_EST +181 0x7E00 //RX_LAMBDA_PFILT +182 0x000A //RX_FENS_RESRV_0 +183 0x0190 //RX_FENS_RESRV_1 +184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +187 0x0002 //RX_EXTRA_NS_L +188 0x0800 //RX_EXTRA_NS_A +189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +190 0x7000 //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +192 0x199A //RX_A_POST_FLT +193 0x0000 //RX_LMT_THRD +194 0x4000 //RX_LMT_ALPHA +195 0x0030 //RX_FDEQ_SUBNUM +196 0x4848 //RX_FDEQ_GAIN_0 +197 0x4848 //RX_FDEQ_GAIN_1 +198 0x4844 //RX_FDEQ_GAIN_2 +199 0x4B4D //RX_FDEQ_GAIN_3 +200 0x4E50 //RX_FDEQ_GAIN_4 +201 0x5254 //RX_FDEQ_GAIN_5 +202 0x5658 //RX_FDEQ_GAIN_6 +203 0x5C60 //RX_FDEQ_GAIN_7 +204 0x6468 //RX_FDEQ_GAIN_8 +205 0x6C70 //RX_FDEQ_GAIN_9 +206 0x7474 //RX_FDEQ_GAIN_10 +207 0x7474 //RX_FDEQ_GAIN_11 +208 0x7474 //RX_FDEQ_GAIN_12 +209 0x7474 //RX_FDEQ_GAIN_13 +210 0x7474 //RX_FDEQ_GAIN_14 +211 0x7474 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0202 //RX_FDEQ_BIN_0 +221 0x0203 //RX_FDEQ_BIN_1 +222 0x0402 //RX_FDEQ_BIN_2 +223 0x0304 //RX_FDEQ_BIN_3 +224 0x0405 //RX_FDEQ_BIN_4 +225 0x0506 //RX_FDEQ_BIN_5 +226 0x0708 //RX_FDEQ_BIN_6 +227 0x090A //RX_FDEQ_BIN_7 +228 0x0B0C //RX_FDEQ_BIN_8 +229 0x0D0E //RX_FDEQ_BIN_9 +230 0x1214 //RX_FDEQ_BIN_10 +231 0x1E1E //RX_FDEQ_BIN_11 +232 0x1E1E //RX_FDEQ_BIN_12 +233 0x1E1E //RX_FDEQ_BIN_13 +234 0x1E1E //RX_FDEQ_BIN_14 +235 0x202C //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x4000 //RX_FDEQ_RESRV_0 +245 0x0320 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0030 //RX_FDDRC_BAND_MARGIN_1 +248 0x0050 //RX_FDDRC_BAND_MARGIN_2 +249 0x0080 //RX_FDDRC_BAND_MARGIN_3 +250 0x0007 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x5000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x6400 //RX_FDDRC_THRD_3_2 +258 0x6400 //RX_FDDRC_THRD_3_3 +259 0x2000 //RX_FDDRC_SLANT_0_0 +260 0x2000 //RX_FDDRC_SLANT_0_1 +261 0x2000 //RX_FDDRC_SLANT_0_2 +262 0x2000 //RX_FDDRC_SLANT_0_3 +263 0x5333 //RX_FDDRC_SLANT_1_0 +264 0x5333 //RX_FDDRC_SLANT_1_1 +265 0x5333 //RX_FDDRC_SLANT_1_2 +266 0x5333 //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +268 0x0002 //RX_FILTINDX +269 0x0000 //RX_TDDRC_THRD_0 +270 0x0000 //RX_TDDRC_THRD_1 +271 0x1800 //RX_TDDRC_THRD_2 +272 0x1800 //RX_TDDRC_THRD_3 +273 0x3000 //RX_TDDRC_SLANT_0 +274 0x6E00 //RX_TDDRC_SLANT_1 +275 0x1000 //RX_TDDRC_ALPHA_UP_0 +276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x199A //RX_TDDRC_HMNC_GAIN +279 0x0001 //RX_TDDRC_SMT_FLAG +280 0x0CCD //RX_TDDRC_SMT_W +281 0x01E0 //RX_TDDRC_DRC_GAIN +282 0x7C00 //RX_LAMBDA_PKA_FP +283 0x2000 //RX_TPKA_FP +284 0x2000 //RX_MIN_G_FP +285 0x0080 //RX_MAX_G_FP +286 0x0100 //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 +288 0x0000 //RX_MAXLEVEL_CNG +289 0x3000 //RX_BWE_UV_TH +290 0x3000 //RX_BWE_UV_TH2 +291 0x1800 //RX_BWE_UV_TH3 +292 0x1000 //RX_BWE_V_TH +293 0x04CD //RX_BWE_GAIN1_V_TH1 +294 0x0F33 //RX_BWE_GAIN1_V_TH2 +295 0x7333 //RX_BWE_UV_EQ +296 0x199A //RX_BWE_V_EQ +297 0x7333 //RX_BWE_TONE_TH +298 0x0004 //RX_BWE_UV_HOLD_T +299 0x6CCD //RX_BWE_GAIN2_ALPHA +300 0x799A //RX_BWE_GAIN3_ALPHA +301 0x001E //RX_BWE_CUTOFF +302 0x3000 //RX_BWE_GAINFILL +303 0x3200 //RX_BWE_MAXTH_TONE +304 0x2000 //RX_BWE_EQ_0 +305 0x2000 //RX_BWE_EQ_1 +306 0x2000 //RX_BWE_EQ_2 +307 0x2000 //RX_BWE_EQ_3 +308 0x2000 //RX_BWE_EQ_4 +309 0x2000 //RX_BWE_EQ_5 +310 0x2000 //RX_BWE_EQ_6 +311 0x0000 //RX_BWE_RESRV_0 +312 0x0000 //RX_BWE_RESRV_1 +313 0x0000 //RX_BWE_RESRV_2 +#VOL 0 +163 0x1000 //RX_TDDRC_ALPHA_UP_1 +164 0x1000 //RX_TDDRC_ALPHA_UP_2 +165 0x1000 //RX_TDDRC_ALPHA_UP_3 +166 0x1000 //RX_TDDRC_ALPHA_UP_4 +184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +190 0x7000 //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +269 0x0000 //RX_TDDRC_THRD_0 +270 0x0000 //RX_TDDRC_THRD_1 +271 0x1800 //RX_TDDRC_THRD_2 +272 0x1800 //RX_TDDRC_THRD_3 +273 0x3000 //RX_TDDRC_SLANT_0 +274 0x6E00 //RX_TDDRC_SLANT_1 +275 0x1000 //RX_TDDRC_ALPHA_UP_0 +276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x199A //RX_TDDRC_HMNC_GAIN +279 0x0001 //RX_TDDRC_SMT_FLAG +280 0x0CCD //RX_TDDRC_SMT_W +281 0x01E0 //RX_TDDRC_DRC_GAIN +195 0x0030 //RX_FDEQ_SUBNUM +196 0x4848 //RX_FDEQ_GAIN_0 +197 0x4848 //RX_FDEQ_GAIN_1 +198 0x4844 //RX_FDEQ_GAIN_2 +199 0x4B4D //RX_FDEQ_GAIN_3 +200 0x4E50 //RX_FDEQ_GAIN_4 +201 0x5254 //RX_FDEQ_GAIN_5 +202 0x5658 //RX_FDEQ_GAIN_6 +203 0x5C60 //RX_FDEQ_GAIN_7 +204 0x6468 //RX_FDEQ_GAIN_8 +205 0x6C70 //RX_FDEQ_GAIN_9 +206 0x7474 //RX_FDEQ_GAIN_10 +207 0x7474 //RX_FDEQ_GAIN_11 +208 0x7474 //RX_FDEQ_GAIN_12 +209 0x7474 //RX_FDEQ_GAIN_13 +210 0x7474 //RX_FDEQ_GAIN_14 +211 0x7474 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0202 //RX_FDEQ_BIN_0 +221 0x0203 //RX_FDEQ_BIN_1 +222 0x0402 //RX_FDEQ_BIN_2 +223 0x0304 //RX_FDEQ_BIN_3 +224 0x0405 //RX_FDEQ_BIN_4 +225 0x0506 //RX_FDEQ_BIN_5 +226 0x0708 //RX_FDEQ_BIN_6 +227 0x090A //RX_FDEQ_BIN_7 +228 0x0B0C //RX_FDEQ_BIN_8 +229 0x0D0E //RX_FDEQ_BIN_9 +230 0x1214 //RX_FDEQ_BIN_10 +231 0x1E1E //RX_FDEQ_BIN_11 +232 0x1E1E //RX_FDEQ_BIN_12 +233 0x1E1E //RX_FDEQ_BIN_13 +234 0x1E1E //RX_FDEQ_BIN_14 +235 0x202C //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x4000 //RX_FDEQ_RESRV_0 +245 0x0320 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0030 //RX_FDDRC_BAND_MARGIN_1 +248 0x0050 //RX_FDDRC_BAND_MARGIN_2 +249 0x0080 //RX_FDDRC_BAND_MARGIN_3 +250 0x0007 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x5000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x6400 //RX_FDDRC_THRD_3_2 +258 0x6400 //RX_FDDRC_THRD_3_3 +259 0x2000 //RX_FDDRC_SLANT_0_0 +260 0x2000 //RX_FDDRC_SLANT_0_1 +261 0x2000 //RX_FDDRC_SLANT_0_2 +262 0x2000 //RX_FDDRC_SLANT_0_3 +263 0x5333 //RX_FDDRC_SLANT_1_0 +264 0x5333 //RX_FDDRC_SLANT_1_1 +265 0x5333 //RX_FDDRC_SLANT_1_2 +266 0x5333 //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +286 0x0100 //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 +#VOL 1 +163 0x1000 //RX_TDDRC_ALPHA_UP_1 +164 0x1000 //RX_TDDRC_ALPHA_UP_2 +165 0x1000 //RX_TDDRC_ALPHA_UP_3 +166 0x1000 //RX_TDDRC_ALPHA_UP_4 +184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +190 0x7000 //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +269 0x0000 //RX_TDDRC_THRD_0 +270 0x0000 //RX_TDDRC_THRD_1 +271 0x1800 //RX_TDDRC_THRD_2 +272 0x1800 //RX_TDDRC_THRD_3 +273 0x3000 //RX_TDDRC_SLANT_0 +274 0x6E00 //RX_TDDRC_SLANT_1 +275 0x1000 //RX_TDDRC_ALPHA_UP_0 +276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x199A //RX_TDDRC_HMNC_GAIN +279 0x0001 //RX_TDDRC_SMT_FLAG +280 0x0CCD //RX_TDDRC_SMT_W +281 0x01E0 //RX_TDDRC_DRC_GAIN +195 0x0030 //RX_FDEQ_SUBNUM +196 0x4848 //RX_FDEQ_GAIN_0 +197 0x4848 //RX_FDEQ_GAIN_1 +198 0x4844 //RX_FDEQ_GAIN_2 +199 0x4B4D //RX_FDEQ_GAIN_3 +200 0x4E50 //RX_FDEQ_GAIN_4 +201 0x5254 //RX_FDEQ_GAIN_5 +202 0x5658 //RX_FDEQ_GAIN_6 +203 0x5C60 //RX_FDEQ_GAIN_7 +204 0x6468 //RX_FDEQ_GAIN_8 +205 0x6C70 //RX_FDEQ_GAIN_9 +206 0x7474 //RX_FDEQ_GAIN_10 +207 0x7474 //RX_FDEQ_GAIN_11 +208 0x7474 //RX_FDEQ_GAIN_12 +209 0x7474 //RX_FDEQ_GAIN_13 +210 0x7474 //RX_FDEQ_GAIN_14 +211 0x7474 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0202 //RX_FDEQ_BIN_0 +221 0x0203 //RX_FDEQ_BIN_1 +222 0x0402 //RX_FDEQ_BIN_2 +223 0x0304 //RX_FDEQ_BIN_3 +224 0x0405 //RX_FDEQ_BIN_4 +225 0x0506 //RX_FDEQ_BIN_5 +226 0x0708 //RX_FDEQ_BIN_6 +227 0x090A //RX_FDEQ_BIN_7 +228 0x0B0C //RX_FDEQ_BIN_8 +229 0x0D0E //RX_FDEQ_BIN_9 +230 0x1214 //RX_FDEQ_BIN_10 +231 0x1E1E //RX_FDEQ_BIN_11 +232 0x1E1E //RX_FDEQ_BIN_12 +233 0x1E1E //RX_FDEQ_BIN_13 +234 0x1E1E //RX_FDEQ_BIN_14 +235 0x202C //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x4000 //RX_FDEQ_RESRV_0 +245 0x0320 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0030 //RX_FDDRC_BAND_MARGIN_1 +248 0x0050 //RX_FDDRC_BAND_MARGIN_2 +249 0x0080 //RX_FDDRC_BAND_MARGIN_3 +250 0x0007 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x5000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x6400 //RX_FDDRC_THRD_3_2 +258 0x6400 //RX_FDDRC_THRD_3_3 +259 0x2000 //RX_FDDRC_SLANT_0_0 +260 0x2000 //RX_FDDRC_SLANT_0_1 +261 0x2000 //RX_FDDRC_SLANT_0_2 +262 0x2000 //RX_FDDRC_SLANT_0_3 +263 0x5333 //RX_FDDRC_SLANT_1_0 +264 0x5333 //RX_FDDRC_SLANT_1_1 +265 0x5333 //RX_FDDRC_SLANT_1_2 +266 0x5333 //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +286 0x0100 //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 +#VOL 2 +163 0x1000 //RX_TDDRC_ALPHA_UP_1 +164 0x1000 //RX_TDDRC_ALPHA_UP_2 +165 0x1000 //RX_TDDRC_ALPHA_UP_3 +166 0x1000 //RX_TDDRC_ALPHA_UP_4 +184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +190 0x7000 //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +269 0x0000 //RX_TDDRC_THRD_0 +270 0x0000 //RX_TDDRC_THRD_1 +271 0x1800 //RX_TDDRC_THRD_2 +272 0x1800 //RX_TDDRC_THRD_3 +273 0x3000 //RX_TDDRC_SLANT_0 +274 0x6E00 //RX_TDDRC_SLANT_1 +275 0x1000 //RX_TDDRC_ALPHA_UP_0 +276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x199A //RX_TDDRC_HMNC_GAIN +279 0x0001 //RX_TDDRC_SMT_FLAG +280 0x0CCD //RX_TDDRC_SMT_W +281 0x01E0 //RX_TDDRC_DRC_GAIN +195 0x0030 //RX_FDEQ_SUBNUM +196 0x4848 //RX_FDEQ_GAIN_0 +197 0x4848 //RX_FDEQ_GAIN_1 +198 0x4844 //RX_FDEQ_GAIN_2 +199 0x4B4D //RX_FDEQ_GAIN_3 +200 0x4E50 //RX_FDEQ_GAIN_4 +201 0x5254 //RX_FDEQ_GAIN_5 +202 0x5658 //RX_FDEQ_GAIN_6 +203 0x5C60 //RX_FDEQ_GAIN_7 +204 0x6468 //RX_FDEQ_GAIN_8 +205 0x6C70 //RX_FDEQ_GAIN_9 +206 0x7474 //RX_FDEQ_GAIN_10 +207 0x7474 //RX_FDEQ_GAIN_11 +208 0x7474 //RX_FDEQ_GAIN_12 +209 0x7474 //RX_FDEQ_GAIN_13 +210 0x7474 //RX_FDEQ_GAIN_14 +211 0x7474 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0202 //RX_FDEQ_BIN_0 +221 0x0203 //RX_FDEQ_BIN_1 +222 0x0402 //RX_FDEQ_BIN_2 +223 0x0304 //RX_FDEQ_BIN_3 +224 0x0405 //RX_FDEQ_BIN_4 +225 0x0506 //RX_FDEQ_BIN_5 +226 0x0708 //RX_FDEQ_BIN_6 +227 0x090A //RX_FDEQ_BIN_7 +228 0x0B0C //RX_FDEQ_BIN_8 +229 0x0D0E //RX_FDEQ_BIN_9 +230 0x1214 //RX_FDEQ_BIN_10 +231 0x1E1E //RX_FDEQ_BIN_11 +232 0x1E1E //RX_FDEQ_BIN_12 +233 0x1E1E //RX_FDEQ_BIN_13 +234 0x1E1E //RX_FDEQ_BIN_14 +235 0x202C //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x4000 //RX_FDEQ_RESRV_0 +245 0x0320 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0030 //RX_FDDRC_BAND_MARGIN_1 +248 0x0050 //RX_FDDRC_BAND_MARGIN_2 +249 0x0080 //RX_FDDRC_BAND_MARGIN_3 +250 0x0007 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x5000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x6400 //RX_FDDRC_THRD_3_2 +258 0x6400 //RX_FDDRC_THRD_3_3 +259 0x2000 //RX_FDDRC_SLANT_0_0 +260 0x2000 //RX_FDDRC_SLANT_0_1 +261 0x2000 //RX_FDDRC_SLANT_0_2 +262 0x2000 //RX_FDDRC_SLANT_0_3 +263 0x5333 //RX_FDDRC_SLANT_1_0 +264 0x5333 //RX_FDDRC_SLANT_1_1 +265 0x5333 //RX_FDDRC_SLANT_1_2 +266 0x5333 //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +286 0x0100 //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 +#VOL 3 +163 0x1000 //RX_TDDRC_ALPHA_UP_1 +164 0x1000 //RX_TDDRC_ALPHA_UP_2 +165 0x1000 //RX_TDDRC_ALPHA_UP_3 +166 0x1000 //RX_TDDRC_ALPHA_UP_4 +184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +190 0x7000 //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +269 0x0000 //RX_TDDRC_THRD_0 +270 0x0000 //RX_TDDRC_THRD_1 +271 0x1800 //RX_TDDRC_THRD_2 +272 0x1800 //RX_TDDRC_THRD_3 +273 0x3000 //RX_TDDRC_SLANT_0 +274 0x6E00 //RX_TDDRC_SLANT_1 +275 0x1000 //RX_TDDRC_ALPHA_UP_0 +276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x199A //RX_TDDRC_HMNC_GAIN +279 0x0001 //RX_TDDRC_SMT_FLAG +280 0x0CCD //RX_TDDRC_SMT_W +281 0x01E0 //RX_TDDRC_DRC_GAIN +195 0x0030 //RX_FDEQ_SUBNUM +196 0x4848 //RX_FDEQ_GAIN_0 +197 0x4848 //RX_FDEQ_GAIN_1 +198 0x4844 //RX_FDEQ_GAIN_2 +199 0x4B4D //RX_FDEQ_GAIN_3 +200 0x4E50 //RX_FDEQ_GAIN_4 +201 0x5254 //RX_FDEQ_GAIN_5 +202 0x5658 //RX_FDEQ_GAIN_6 +203 0x5C60 //RX_FDEQ_GAIN_7 +204 0x6468 //RX_FDEQ_GAIN_8 +205 0x6C70 //RX_FDEQ_GAIN_9 +206 0x7474 //RX_FDEQ_GAIN_10 +207 0x7474 //RX_FDEQ_GAIN_11 +208 0x7474 //RX_FDEQ_GAIN_12 +209 0x7474 //RX_FDEQ_GAIN_13 +210 0x7474 //RX_FDEQ_GAIN_14 +211 0x7474 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0202 //RX_FDEQ_BIN_0 +221 0x0203 //RX_FDEQ_BIN_1 +222 0x0402 //RX_FDEQ_BIN_2 +223 0x0304 //RX_FDEQ_BIN_3 +224 0x0405 //RX_FDEQ_BIN_4 +225 0x0506 //RX_FDEQ_BIN_5 +226 0x0708 //RX_FDEQ_BIN_6 +227 0x090A //RX_FDEQ_BIN_7 +228 0x0B0C //RX_FDEQ_BIN_8 +229 0x0D0E //RX_FDEQ_BIN_9 +230 0x1214 //RX_FDEQ_BIN_10 +231 0x1E1E //RX_FDEQ_BIN_11 +232 0x1E1E //RX_FDEQ_BIN_12 +233 0x1E1E //RX_FDEQ_BIN_13 +234 0x1E1E //RX_FDEQ_BIN_14 +235 0x202C //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x4000 //RX_FDEQ_RESRV_0 +245 0x0320 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0030 //RX_FDDRC_BAND_MARGIN_1 +248 0x0050 //RX_FDDRC_BAND_MARGIN_2 +249 0x0080 //RX_FDDRC_BAND_MARGIN_3 +250 0x0007 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x5000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x6400 //RX_FDDRC_THRD_3_2 +258 0x6400 //RX_FDDRC_THRD_3_3 +259 0x2000 //RX_FDDRC_SLANT_0_0 +260 0x2000 //RX_FDDRC_SLANT_0_1 +261 0x2000 //RX_FDDRC_SLANT_0_2 +262 0x2000 //RX_FDDRC_SLANT_0_3 +263 0x5333 //RX_FDDRC_SLANT_1_0 +264 0x5333 //RX_FDDRC_SLANT_1_1 +265 0x5333 //RX_FDDRC_SLANT_1_2 +266 0x5333 //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +286 0x0100 //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 +#VOL 4 +163 0x1000 //RX_TDDRC_ALPHA_UP_1 +164 0x1000 //RX_TDDRC_ALPHA_UP_2 +165 0x1000 //RX_TDDRC_ALPHA_UP_3 +166 0x1000 //RX_TDDRC_ALPHA_UP_4 +184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +190 0x7000 //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +269 0x0000 //RX_TDDRC_THRD_0 +270 0x0000 //RX_TDDRC_THRD_1 +271 0x1800 //RX_TDDRC_THRD_2 +272 0x1800 //RX_TDDRC_THRD_3 +273 0x3000 //RX_TDDRC_SLANT_0 +274 0x6E00 //RX_TDDRC_SLANT_1 +275 0x1000 //RX_TDDRC_ALPHA_UP_0 +276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x199A //RX_TDDRC_HMNC_GAIN +279 0x0001 //RX_TDDRC_SMT_FLAG +280 0x0CCD //RX_TDDRC_SMT_W +281 0x01E0 //RX_TDDRC_DRC_GAIN +195 0x0030 //RX_FDEQ_SUBNUM +196 0x4848 //RX_FDEQ_GAIN_0 +197 0x4848 //RX_FDEQ_GAIN_1 +198 0x4844 //RX_FDEQ_GAIN_2 +199 0x4B4D //RX_FDEQ_GAIN_3 +200 0x4E50 //RX_FDEQ_GAIN_4 +201 0x5254 //RX_FDEQ_GAIN_5 +202 0x5658 //RX_FDEQ_GAIN_6 +203 0x5C60 //RX_FDEQ_GAIN_7 +204 0x6468 //RX_FDEQ_GAIN_8 +205 0x6C70 //RX_FDEQ_GAIN_9 +206 0x7474 //RX_FDEQ_GAIN_10 +207 0x7474 //RX_FDEQ_GAIN_11 +208 0x7474 //RX_FDEQ_GAIN_12 +209 0x7474 //RX_FDEQ_GAIN_13 +210 0x7474 //RX_FDEQ_GAIN_14 +211 0x7474 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0202 //RX_FDEQ_BIN_0 +221 0x0203 //RX_FDEQ_BIN_1 +222 0x0402 //RX_FDEQ_BIN_2 +223 0x0304 //RX_FDEQ_BIN_3 +224 0x0405 //RX_FDEQ_BIN_4 +225 0x0506 //RX_FDEQ_BIN_5 +226 0x0708 //RX_FDEQ_BIN_6 +227 0x090A //RX_FDEQ_BIN_7 +228 0x0B0C //RX_FDEQ_BIN_8 +229 0x0D0E //RX_FDEQ_BIN_9 +230 0x1214 //RX_FDEQ_BIN_10 +231 0x1E1E //RX_FDEQ_BIN_11 +232 0x1E1E //RX_FDEQ_BIN_12 +233 0x1E1E //RX_FDEQ_BIN_13 +234 0x1E1E //RX_FDEQ_BIN_14 +235 0x202C //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x4000 //RX_FDEQ_RESRV_0 +245 0x0320 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0030 //RX_FDDRC_BAND_MARGIN_1 +248 0x0050 //RX_FDDRC_BAND_MARGIN_2 +249 0x0080 //RX_FDDRC_BAND_MARGIN_3 +250 0x0007 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x5000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x6400 //RX_FDDRC_THRD_3_2 +258 0x6400 //RX_FDDRC_THRD_3_3 +259 0x2000 //RX_FDDRC_SLANT_0_0 +260 0x2000 //RX_FDDRC_SLANT_0_1 +261 0x2000 //RX_FDDRC_SLANT_0_2 +262 0x2000 //RX_FDDRC_SLANT_0_3 +263 0x5333 //RX_FDDRC_SLANT_1_0 +264 0x5333 //RX_FDDRC_SLANT_1_1 +265 0x5333 //RX_FDDRC_SLANT_1_2 +266 0x5333 //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +286 0x0100 //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 +#VOL 5 +163 0x1000 //RX_TDDRC_ALPHA_UP_1 +164 0x1000 //RX_TDDRC_ALPHA_UP_2 +165 0x1000 //RX_TDDRC_ALPHA_UP_3 +166 0x1000 //RX_TDDRC_ALPHA_UP_4 +184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +190 0x7000 //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +269 0x0000 //RX_TDDRC_THRD_0 +270 0x0000 //RX_TDDRC_THRD_1 +271 0x1800 //RX_TDDRC_THRD_2 +272 0x1800 //RX_TDDRC_THRD_3 +273 0x3000 //RX_TDDRC_SLANT_0 +274 0x6E00 //RX_TDDRC_SLANT_1 +275 0x1000 //RX_TDDRC_ALPHA_UP_0 +276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x199A //RX_TDDRC_HMNC_GAIN +279 0x0001 //RX_TDDRC_SMT_FLAG +280 0x0CCD //RX_TDDRC_SMT_W +281 0x01E0 //RX_TDDRC_DRC_GAIN +195 0x0030 //RX_FDEQ_SUBNUM +196 0x4848 //RX_FDEQ_GAIN_0 +197 0x4848 //RX_FDEQ_GAIN_1 +198 0x4844 //RX_FDEQ_GAIN_2 +199 0x4B4D //RX_FDEQ_GAIN_3 +200 0x4E50 //RX_FDEQ_GAIN_4 +201 0x5254 //RX_FDEQ_GAIN_5 +202 0x5658 //RX_FDEQ_GAIN_6 +203 0x5C60 //RX_FDEQ_GAIN_7 +204 0x6468 //RX_FDEQ_GAIN_8 +205 0x6C70 //RX_FDEQ_GAIN_9 +206 0x7474 //RX_FDEQ_GAIN_10 +207 0x7474 //RX_FDEQ_GAIN_11 +208 0x7474 //RX_FDEQ_GAIN_12 +209 0x7474 //RX_FDEQ_GAIN_13 +210 0x7474 //RX_FDEQ_GAIN_14 +211 0x7474 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0202 //RX_FDEQ_BIN_0 +221 0x0203 //RX_FDEQ_BIN_1 +222 0x0402 //RX_FDEQ_BIN_2 +223 0x0304 //RX_FDEQ_BIN_3 +224 0x0405 //RX_FDEQ_BIN_4 +225 0x0506 //RX_FDEQ_BIN_5 +226 0x0708 //RX_FDEQ_BIN_6 +227 0x090A //RX_FDEQ_BIN_7 +228 0x0B0C //RX_FDEQ_BIN_8 +229 0x0D0E //RX_FDEQ_BIN_9 +230 0x1214 //RX_FDEQ_BIN_10 +231 0x1E1E //RX_FDEQ_BIN_11 +232 0x1E1E //RX_FDEQ_BIN_12 +233 0x1E1E //RX_FDEQ_BIN_13 +234 0x1E1E //RX_FDEQ_BIN_14 +235 0x202C //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x4000 //RX_FDEQ_RESRV_0 +245 0x0320 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0030 //RX_FDDRC_BAND_MARGIN_1 +248 0x0050 //RX_FDDRC_BAND_MARGIN_2 +249 0x0080 //RX_FDDRC_BAND_MARGIN_3 +250 0x0007 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x5000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x6400 //RX_FDDRC_THRD_3_2 +258 0x6400 //RX_FDDRC_THRD_3_3 +259 0x2000 //RX_FDDRC_SLANT_0_0 +260 0x2000 //RX_FDDRC_SLANT_0_1 +261 0x2000 //RX_FDDRC_SLANT_0_2 +262 0x2000 //RX_FDDRC_SLANT_0_3 +263 0x5333 //RX_FDDRC_SLANT_1_0 +264 0x5333 //RX_FDDRC_SLANT_1_1 +265 0x5333 //RX_FDDRC_SLANT_1_2 +266 0x5333 //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +286 0x0100 //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 +#VOL 6 +163 0x1000 //RX_TDDRC_ALPHA_UP_1 +164 0x1000 //RX_TDDRC_ALPHA_UP_2 +165 0x1000 //RX_TDDRC_ALPHA_UP_3 +166 0x1000 //RX_TDDRC_ALPHA_UP_4 +184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +190 0x7000 //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +269 0x0000 //RX_TDDRC_THRD_0 +270 0x0000 //RX_TDDRC_THRD_1 +271 0x1800 //RX_TDDRC_THRD_2 +272 0x1800 //RX_TDDRC_THRD_3 +273 0x3000 //RX_TDDRC_SLANT_0 +274 0x6E00 //RX_TDDRC_SLANT_1 +275 0x1000 //RX_TDDRC_ALPHA_UP_0 +276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x199A //RX_TDDRC_HMNC_GAIN +279 0x0001 //RX_TDDRC_SMT_FLAG +280 0x0CCD //RX_TDDRC_SMT_W +281 0x01E0 //RX_TDDRC_DRC_GAIN +195 0x0030 //RX_FDEQ_SUBNUM +196 0x4848 //RX_FDEQ_GAIN_0 +197 0x4848 //RX_FDEQ_GAIN_1 +198 0x4844 //RX_FDEQ_GAIN_2 +199 0x4B4D //RX_FDEQ_GAIN_3 +200 0x4E50 //RX_FDEQ_GAIN_4 +201 0x5254 //RX_FDEQ_GAIN_5 +202 0x5658 //RX_FDEQ_GAIN_6 +203 0x5C60 //RX_FDEQ_GAIN_7 +204 0x6468 //RX_FDEQ_GAIN_8 +205 0x6C70 //RX_FDEQ_GAIN_9 +206 0x7474 //RX_FDEQ_GAIN_10 +207 0x7474 //RX_FDEQ_GAIN_11 +208 0x7474 //RX_FDEQ_GAIN_12 +209 0x7474 //RX_FDEQ_GAIN_13 +210 0x7474 //RX_FDEQ_GAIN_14 +211 0x7474 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0202 //RX_FDEQ_BIN_0 +221 0x0203 //RX_FDEQ_BIN_1 +222 0x0402 //RX_FDEQ_BIN_2 +223 0x0304 //RX_FDEQ_BIN_3 +224 0x0405 //RX_FDEQ_BIN_4 +225 0x0506 //RX_FDEQ_BIN_5 +226 0x0708 //RX_FDEQ_BIN_6 +227 0x090A //RX_FDEQ_BIN_7 +228 0x0B0C //RX_FDEQ_BIN_8 +229 0x0D0E //RX_FDEQ_BIN_9 +230 0x1214 //RX_FDEQ_BIN_10 +231 0x1E1E //RX_FDEQ_BIN_11 +232 0x1E1E //RX_FDEQ_BIN_12 +233 0x1E1E //RX_FDEQ_BIN_13 +234 0x1E1E //RX_FDEQ_BIN_14 +235 0x202C //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x4000 //RX_FDEQ_RESRV_0 +245 0x0320 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0030 //RX_FDDRC_BAND_MARGIN_1 +248 0x0050 //RX_FDDRC_BAND_MARGIN_2 +249 0x0080 //RX_FDDRC_BAND_MARGIN_3 +250 0x0007 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x5000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x6400 //RX_FDDRC_THRD_3_2 +258 0x6400 //RX_FDDRC_THRD_3_3 +259 0x2000 //RX_FDDRC_SLANT_0_0 +260 0x2000 //RX_FDDRC_SLANT_0_1 +261 0x2000 //RX_FDDRC_SLANT_0_2 +262 0x2000 //RX_FDDRC_SLANT_0_3 +263 0x5333 //RX_FDDRC_SLANT_1_0 +264 0x5333 //RX_FDDRC_SLANT_1_1 +265 0x5333 //RX_FDDRC_SLANT_1_2 +266 0x5333 //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +286 0x0100 //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 #CASE_NAME HANDSET-HANDSET-TMOBILE_US-NB -#PARAM_TYPE TX+RX -#TOTAL_CUSTOM_STEP 7 +#PARAM_MODE Full +#PARAM_TYPE TX+2RX +#TOTAL_CUSTOM_STEP 7+7 #TX 0 0x0000 //TX_OPERATION_MODE_0 1 0x0000 //TX_OPERATION_MODE_1 -2 0x0036 //TX_PATCH_REG +2 0x0076 //TX_PATCH_REG 3 0x6F7E //TX_SENDFUNC_MODE_0 4 0x0001 //TX_SENDFUNC_MODE_1 5 0x0002 //TX_NUM_MIC @@ -19311,7 +29399,7 @@ 18 0x0000 //TX_SYS_RESRV_2 19 0x0000 //TX_SYS_RESRV_3 20 0x0000 //TX_DIST2REF0 -21 0x00A4 //TX_DIST2REF1 +21 0x00A3 //TX_DIST2REF1 22 0x0000 //TX_DIST2REF_02 23 0x0000 //TX_DIST2REF_03 24 0x0000 //TX_DIST2REF_04 @@ -19541,19 +29629,19 @@ 248 0xF800 //TX_THR_SN_EST_6 249 0xF700 //TX_THR_SN_EST_7 250 0x0000 //TX_DELTA_THR_SN_EST_0 -251 0x01A0 //TX_DELTA_THR_SN_EST_1 -252 0x0100 //TX_DELTA_THR_SN_EST_2 -253 0x0200 //TX_DELTA_THR_SN_EST_3 -254 0x01A0 //TX_DELTA_THR_SN_EST_4 -255 0x0100 //TX_DELTA_THR_SN_EST_5 -256 0x0000 //TX_DELTA_THR_SN_EST_6 +251 0x0100 //TX_DELTA_THR_SN_EST_1 +252 0x0200 //TX_DELTA_THR_SN_EST_2 +253 0x01A0 //TX_DELTA_THR_SN_EST_3 +254 0x0100 //TX_DELTA_THR_SN_EST_4 +255 0x0000 //TX_DELTA_THR_SN_EST_5 +256 0x01A0 //TX_DELTA_THR_SN_EST_6 257 0x0200 //TX_DELTA_THR_SN_EST_7 258 0x4000 //TX_LAMBDA_NN_EST_0 -259 0x4000 //TX_LAMBDA_NN_EST_1 -260 0x3000 //TX_LAMBDA_NN_EST_2 -261 0x4000 //TX_LAMBDA_NN_EST_3 +259 0x3000 //TX_LAMBDA_NN_EST_1 +260 0x4000 //TX_LAMBDA_NN_EST_2 +261 0x3000 //TX_LAMBDA_NN_EST_3 262 0x3000 //TX_LAMBDA_NN_EST_4 -263 0x3000 //TX_LAMBDA_NN_EST_5 +263 0x4000 //TX_LAMBDA_NN_EST_5 264 0x4000 //TX_LAMBDA_NN_EST_6 265 0x4000 //TX_LAMBDA_NN_EST_7 266 0x0400 //TX_N_SN_EST @@ -19572,20 +29660,20 @@ 279 0x4000 //TX_B_POST_FLT_0 280 0x4000 //TX_B_POST_FLT_1 281 0x0014 //TX_NS_LVL_CTRL_0 -282 0x001B //TX_NS_LVL_CTRL_1 -283 0x0019 //TX_NS_LVL_CTRL_2 +282 0x0019 //TX_NS_LVL_CTRL_1 +283 0x0017 //TX_NS_LVL_CTRL_2 284 0x0017 //TX_NS_LVL_CTRL_3 -285 0x0017 //TX_NS_LVL_CTRL_4 -286 0x0019 //TX_NS_LVL_CTRL_5 -287 0x0014 //TX_NS_LVL_CTRL_6 +285 0x0019 //TX_NS_LVL_CTRL_4 +286 0x0014 //TX_NS_LVL_CTRL_5 +287 0x001B //TX_NS_LVL_CTRL_6 288 0x0010 //TX_NS_LVL_CTRL_7 289 0x0010 //TX_MIN_GAIN_S_0 290 0x000C //TX_MIN_GAIN_S_1 -291 0x000C //TX_MIN_GAIN_S_2 +291 0x0010 //TX_MIN_GAIN_S_2 292 0x0010 //TX_MIN_GAIN_S_3 -293 0x0010 //TX_MIN_GAIN_S_4 -294 0x000C //TX_MIN_GAIN_S_5 -295 0x0014 //TX_MIN_GAIN_S_6 +293 0x000C //TX_MIN_GAIN_S_4 +294 0x0014 //TX_MIN_GAIN_S_5 +295 0x000C //TX_MIN_GAIN_S_6 296 0x0014 //TX_MIN_GAIN_S_7 297 0x5000 //TX_NMOS_SUP 298 0x0000 //TX_NS_MAX_PRI_SNR_TH @@ -19595,8 +29683,8 @@ 302 0x4000 //TX_SNRI_SUP_2 303 0x4000 //TX_SNRI_SUP_3 304 0x4000 //TX_SNRI_SUP_4 -305 0x4000 //TX_SNRI_SUP_5 -306 0x7FFF //TX_SNRI_SUP_6 +305 0x7FFF //TX_SNRI_SUP_5 +306 0x4000 //TX_SNRI_SUP_6 307 0x3000 //TX_SNRI_SUP_7 308 0x3000 //TX_THR_LFNS 309 0x001A //TX_G_LFNS @@ -19605,36 +29693,36 @@ 312 0x7FFF //TX_A_POST_FILT_0 313 0x2000 //TX_A_POST_FILT_1 314 0x2000 //TX_A_POST_FILT_S_0 -315 0x7000 //TX_A_POST_FILT_S_1 -316 0x6000 //TX_A_POST_FILT_S_2 -317 0x5000 //TX_A_POST_FILT_S_3 -318 0x2000 //TX_A_POST_FILT_S_4 -319 0x6000 //TX_A_POST_FILT_S_5 -320 0x2000 //TX_A_POST_FILT_S_6 +315 0x6000 //TX_A_POST_FILT_S_1 +316 0x5000 //TX_A_POST_FILT_S_2 +317 0x2000 //TX_A_POST_FILT_S_3 +318 0x6000 //TX_A_POST_FILT_S_4 +319 0x2000 //TX_A_POST_FILT_S_5 +320 0x7000 //TX_A_POST_FILT_S_6 321 0x7000 //TX_A_POST_FILT_S_7 322 0x4000 //TX_B_POST_FILT_0 323 0x4000 //TX_B_POST_FILT_1 -324 0x7FFF //TX_B_POST_FILT_2 -325 0x5000 //TX_B_POST_FILT_3 -326 0x7FFF //TX_B_POST_FILT_4 -327 0x7FFF //TX_B_POST_FILT_5 +324 0x5000 //TX_B_POST_FILT_2 +325 0x4000 //TX_B_POST_FILT_3 +326 0x4000 //TX_B_POST_FILT_4 +327 0x4000 //TX_B_POST_FILT_5 328 0x4000 //TX_B_POST_FILT_6 329 0x2000 //TX_B_POST_FILT_7 330 0x7FFF //TX_B_LESSCUT_RTO_S_0 -331 0x7FFF //TX_B_LESSCUT_RTO_S_1 -332 0x7FFF //TX_B_LESSCUT_RTO_S_2 -333 0x7FFF //TX_B_LESSCUT_RTO_S_3 -334 0x7FFF //TX_B_LESSCUT_RTO_S_4 -335 0x7FFF //TX_B_LESSCUT_RTO_S_5 -336 0x7FFF //TX_B_LESSCUT_RTO_S_6 -337 0x7FFF //TX_B_LESSCUT_RTO_S_7 +331 0x1000 //TX_B_LESSCUT_RTO_S_1 +332 0x1000 //TX_B_LESSCUT_RTO_S_2 +333 0x1000 //TX_B_LESSCUT_RTO_S_3 +334 0x1000 //TX_B_LESSCUT_RTO_S_4 +335 0x1000 //TX_B_LESSCUT_RTO_S_5 +336 0x1000 //TX_B_LESSCUT_RTO_S_6 +337 0x1000 //TX_B_LESSCUT_RTO_S_7 338 0x7E14 //TX_LAMBDA_PFILT 339 0x7C29 //TX_LAMBDA_PFILT_S_0 -340 0x7C29 //TX_LAMBDA_PFILT_S_1 -341 0x7200 //TX_LAMBDA_PFILT_S_2 -342 0x7900 //TX_LAMBDA_PFILT_S_3 -343 0x7400 //TX_LAMBDA_PFILT_S_4 -344 0x7200 //TX_LAMBDA_PFILT_S_5 +340 0x7200 //TX_LAMBDA_PFILT_S_1 +341 0x7900 //TX_LAMBDA_PFILT_S_2 +342 0x7400 //TX_LAMBDA_PFILT_S_3 +343 0x7200 //TX_LAMBDA_PFILT_S_4 +344 0x7C29 //TX_LAMBDA_PFILT_S_5 345 0x7C29 //TX_LAMBDA_PFILT_S_6 346 0x7C29 //TX_LAMBDA_PFILT_S_7 347 0x0200 //TX_K_PEPPER @@ -19670,10 +29758,10 @@ 377 0x0000 //TX_NOISE_TH_5_4 378 0x07D0 //TX_NOISE_TH_6 379 0x0004 //TX_MINENOISE_TH -380 0x4000 //TX_MINENOISE_MIC0_TH_MTS -381 0xFFEE //TX_MINENOISE_MIC0_TH_EXP -382 0x6000 //TX_MINENOISE_MIC0_S_TH_MTS -383 0xFFF3 //TX_MINENOISE_MIC0_S_TH_EXP +380 0xD508 //TX_MORENS_TFMASK_TH +381 0x0001 //TX_DRC_QUIET_FLOOR +382 0x6D60 //TX_RATIODTL_CUT_TH +383 0x0DAC //TX_DT_CUT_K1 384 0x00A5 //TX_OUT_ENER_S_TH_CLEAN 385 0x00A5 //TX_OUT_ENER_S_TH_LESSCLEAN 386 0x00A5 //TX_OUT_ENER_S_TH_NOISY @@ -19681,15 +29769,15 @@ 388 0x00CE //TX_OUT_ENER_TH_SPEECH 389 0x2000 //TX_SN_NPB_GAIN 390 0x0000 //TX_NN_NPB_GAIN -391 0x0000 //TX_CSX_ALPHA_0 -392 0x0000 //TX_CSX_ALPHA_1 -393 0x0000 //TX_CSX_ALPHA_2 -394 0x0000 //TX_CSX_ALPHA_3 -395 0x0800 //TX_MU_ARSP_EST -396 0x00C8 //TX_P_OUTBEAM_MIN_TH +391 0x3000 //TX_POST_MASK_SUP_HSNE +392 0x07D0 //TX_TAIL_DET_TH +393 0x4000 //TX_B_LESSCUT_RTO_WTA +394 0x0000 //TX_MEL_G_R +395 0x0080 //TX_SUPHIGH_TH +396 0x0000 //TX_MASK_G_R 397 0x0002 //TX_EXTRA_NS_L -398 0x0800 //TX_EXTRA_NS_A -399 0x0005 //TX_VR_NOISE_FLOOR_TH +398 0x1800 //TX_C_POST_FLT_MASK +399 0x7FFF //TX_A_POST_FLT_WNS 400 0x0148 //TX_MIN_G_LOW300HZ 401 0x0001 //TX_MAXLEVEL_CNG 402 0x00B4 //TX_STN_NOISE_TH @@ -19804,16 +29892,16 @@ 511 0x6666 //TX_MIC_TO_BFGAIN 512 0x0000 //TX_MICTOBFGAIN0 513 0x0000 //TX_FASTMUE_TH -514 0x0000 //TX_DERVB_LEN_0 -515 0x0000 //TX_DERVB_LEN_1 -516 0x0000 //TX_RHO_DERVB -517 0x0000 //TX_MIC_INDX_DERVB -518 0x0000 //TX_MU_DERVB -519 0x0000 //TX_DR_RESRV_0 -520 0x0000 //TX_DR_RESRV_1 -521 0x0000 //TX_DR_RESRV_2 -522 0x0000 //TX_DR_RESRV_3 -523 0x0000 //TX_DR_RESRV_4 +514 0x3000 //TX_DEREVERB_LF_MU +515 0x34CD //TX_DEREVERB_HF_MU +516 0x0007 //TX_DEREVERB_DELAY +517 0x0004 //TX_DEREVERB_COEF_LEN +518 0x0003 //TX_DEREVERB_DNR +519 0x0000 //TX_DEREVERB_ALPHA +520 0x0000 //TX_DEREVERB_BETA +521 0x3A98 //TX_GSC_RTOL_TH +522 0x3A98 //TX_GSC_RTOH_TH +523 0x7E2C //TX_WIDE2_MEANHTH 524 0x0000 //TX_DR_RESRV_5 525 0x0000 //TX_DR_RESRV_6 526 0x0000 //TX_DR_RESRV_7 @@ -19863,8 +29951,8 @@ 570 0x474A //TX_FDEQ_GAIN_3 571 0x473F //TX_FDEQ_GAIN_4 572 0x4240 //TX_FDEQ_GAIN_5 -573 0x3E38 //TX_FDEQ_GAIN_6 -574 0x322E //TX_FDEQ_GAIN_7 +573 0x4040 //TX_FDEQ_GAIN_6 +574 0x3630 //TX_FDEQ_GAIN_7 575 0x2726 //TX_FDEQ_GAIN_8 576 0x383C //TX_FDEQ_GAIN_9 577 0x4848 //TX_FDEQ_GAIN_10 @@ -19890,7 +29978,7 @@ 597 0x0808 //TX_FDEQ_BIN_6 598 0x050E //TX_FDEQ_BIN_7 599 0x0B0C //TX_FDEQ_BIN_8 -600 0x0F0F //TX_FDEQ_BIN_9 +600 0x0F09 //TX_FDEQ_BIN_9 601 0x0000 //TX_FDEQ_BIN_10 602 0x0000 //TX_FDEQ_BIN_11 603 0x0000 //TX_FDEQ_BIN_12 @@ -19962,10 +30050,10 @@ 669 0x4848 //TX_PREEQ_GAIN_MIC1_3 670 0x4848 //TX_PREEQ_GAIN_MIC1_4 671 0x4848 //TX_PREEQ_GAIN_MIC1_5 -672 0x4848 //TX_PREEQ_GAIN_MIC1_6 -673 0x484A //TX_PREEQ_GAIN_MIC1_7 -674 0x4B4E //TX_PREEQ_GAIN_MIC1_8 -675 0x5054 //TX_PREEQ_GAIN_MIC1_9 +672 0x494A //TX_PREEQ_GAIN_MIC1_6 +673 0x4B4C //TX_PREEQ_GAIN_MIC1_7 +674 0x4D4E //TX_PREEQ_GAIN_MIC1_8 +675 0x4F51 //TX_PREEQ_GAIN_MIC1_9 676 0x4848 //TX_PREEQ_GAIN_MIC1_10 677 0x4848 //TX_PREEQ_GAIN_MIC1_11 678 0x4848 //TX_PREEQ_GAIN_MIC1_12 @@ -19989,7 +30077,7 @@ 696 0x0708 //TX_PREEQ_BIN_MIC1_6 697 0x090A //TX_PREEQ_BIN_MIC1_7 698 0x0B0C //TX_PREEQ_BIN_MIC1_8 -699 0x0D08 //TX_PREEQ_BIN_MIC1_9 +699 0x0D0E //TX_PREEQ_BIN_MIC1_9 700 0x0000 //TX_PREEQ_BIN_MIC1_10 701 0x0000 //TX_PREEQ_BIN_MIC1_11 702 0x0000 //TX_PREEQ_BIN_MIC1_12 @@ -20065,8 +30153,8 @@ 772 0x0044 //TX_MIC_PWR_BIAS_3 773 0x0000 //TX_GAIN_LIMIT_0 774 0x0000 //TX_GAIN_LIMIT_1 -775 0x0005 //TX_GAIN_LIMIT_2 -776 0x0005 //TX_GAIN_LIMIT_3 +775 0x0007 //TX_GAIN_LIMIT_2 +776 0x0007 //TX_GAIN_LIMIT_3 777 0x7F5B //TX_BVE_NOVAD0_ALPHADOWN 778 0x7FDE //TX_BVE_VAD0_ALPHAUP 779 0x7F3A //TX_BVE_VAD0_ALPHADOWN @@ -20156,7 +30244,7 @@ 863 0x199A //TX_TDDRC_HMNC_GAIN 864 0x0000 //TX_TDDRC_SMT_FLAG 865 0x0CCD //TX_TDDRC_SMT_W -866 0x0607 //TX_TDDRC_DRC_GAIN +866 0x05A0 //TX_TDDRC_DRC_GAIN 867 0x7FFF //TX_TDDRC_LMT_THRD 868 0x0000 //TX_TDDRC_LMT_ALPHA 869 0x0000 //TX_TFMASKLTH @@ -20187,8 +30275,73 @@ 894 0xC000 //TX_FASTNS_SSA_THHFL 895 0xCCCC //TX_FASTNS_SSA_THLFH 896 0xD999 //TX_FASTNS_SSA_THHFH +897 0x2339 //TX_SENDFUNC_REG_MICMUTE +898 0x0021 //TX_SENDFUNC_REG_MICMUTE1 +899 0x02BC //TX_MICMUTE_RATIO_THR +900 0x0140 //TX_MICMUTE_AMP_THR +901 0x0004 //TX_MICMUTE_HPF_IND +902 0x00C0 //TX_MICMUTE_LOG_EYR_TH +903 0x0008 //TX_MICMUTE_CVG_TIME +904 0x0008 //TX_MICMUTE_RELEASE_TIME +905 0x01FE //TX_MIC_VOLUME_MIC0MUTE +906 0x0020 //TX_MICMUTE_EPD_OFFSET_0 +907 0x001E //TX_MICMUTE_FRQ_AEC_L +908 0x7999 //TX_MICMUTE_EAD_THR +909 0x7FFF //TX_MICMUTE_LAMBDA_CB_NLE +910 0x7FFF //TX_MICMUTE_LAMBDA_RE_EST +911 0x4000 //TX_DTD_THR1_MICMUTE_0 +912 0x7000 //TX_DTD_THR1_MICMUTE_1 +913 0x7FFF //TX_DTD_THR1_MICMUTE_2 +914 0x7FFF //TX_DTD_THR1_MICMUTE_3 +915 0x6CCC //TX_DTD_THR2_MICMUTE_0 +916 0x0400 //TX_MICMUTE_MIN_EQ_RE_EST_0 +917 0x0400 //TX_MICMUTE_MIN_EQ_RE_EST_1 +918 0x1000 //TX_MICMUTE_MIN_EQ_RE_EST_2 +919 0x7FFF //TX_MICMUTE_MIN_EQ_RE_EST_3 +920 0x7FFF //TX_MICMUTE_MIN_EQ_RE_EST_4 +921 0x4000 //TX_MICMUTE_C_POST_FLT +922 0x03E8 //TX_MICMUTE_DT_CUT_K +923 0x0001 //TX_MICMUTE_DT_CUT_THR +924 0x03E8 //TX_MICMUTE_DT_CUT_K2 +925 0x0001 //TX_MICMUTE_DT_CUT_THR2 +926 0x0064 //TX_MICMUTE_DT2_HOLD_N +927 0x1000 //TX_MICMUTE_RATIODTH_THCUT +928 0x1000 //TX_MICMUTE_B_POST_FLT_ECHOL +929 0x7FFF //TX_MICMUTE_B_POST_FLT_ECHOH +930 0x0400 //TX_MICMUTE_C_POST_FLT_MASK +931 0x7999 //TX_MICMUTE_RATIODTL_CUT_TH +932 0x0258 //TX_MICMUTE_DT_CUT_K1 +933 0x0800 //TX_MICMUTE_N2_SN_EST +934 0xFC00 //TX_MICMUTE_THR_SN_EST_0 +935 0x001C //TX_MICMUTE_MIN_G_CTRL_0 +936 0x6000 //TX_MICMUTE_A_POST_FILT_S_0 +937 0x7000 //TX_MICMUTE_B_POST_FILT_0 +938 0x2710 //TX_MIC1RUB_AMP_THR +939 0x0010 //TX_MIC1MUTE_RATIO_THR +940 0x0450 //TX_MIC1MUTE_AMP_THR +941 0x0008 //TX_MIC1MUTE_CVG_TIME +942 0x0008 //TX_MIC1MUTE_RELEASE_TIME +943 0x0000 //TX_AMS_RESRV_01 +944 0x0000 //TX_AMS_RESRV_02 +945 0x0000 //TX_AMS_RESRV_03 +946 0x0000 //TX_AMS_RESRV_04 +947 0x0000 //TX_AMS_RESRV_05 +948 0x0000 //TX_AMS_RESRV_06 +949 0x0000 //TX_AMS_RESRV_07 +950 0x0000 //TX_AMS_RESRV_08 +951 0x0000 //TX_AMS_RESRV_09 +952 0x0000 //TX_AMS_RESRV_10 +953 0x0000 //TX_AMS_RESRV_11 +954 0x0000 //TX_AMS_RESRV_12 +955 0x0000 //TX_AMS_RESRV_13 +956 0x0000 //TX_AMS_RESRV_14 +957 0x0000 //TX_AMS_RESRV_15 +958 0x0000 //TX_AMS_RESRV_16 +959 0x0000 //TX_AMS_RESRV_17 +960 0x0000 //TX_AMS_RESRV_18 +961 0x0000 //TX_AMS_RESRV_19 #RX -0 0x003C //RX_RECVFUNC_MODE_0 +0 0x203C //RX_RECVFUNC_MODE_0 1 0x0000 //RX_RECVFUNC_MODE_1 2 0x0000 //RX_SAMPLINGFREQ_SIG 3 0x0000 //RX_SAMPLINGFREQ_PROC @@ -20228,15 +30381,15 @@ 37 0x4000 //RX_LMT_ALPHA 38 0x0014 //RX_FDEQ_SUBNUM 39 0x4840 //RX_FDEQ_GAIN_0 -40 0x3E3E //RX_FDEQ_GAIN_1 -41 0x4248 //RX_FDEQ_GAIN_2 -42 0x5066 //RX_FDEQ_GAIN_3 -43 0x6A7C //RX_FDEQ_GAIN_4 -44 0x706D //RX_FDEQ_GAIN_5 -45 0x6967 //RX_FDEQ_GAIN_6 -46 0x6666 //RX_FDEQ_GAIN_7 -47 0x6964 //RX_FDEQ_GAIN_8 -48 0x6774 //RX_FDEQ_GAIN_9 +40 0x3E40 //RX_FDEQ_GAIN_1 +41 0x515E //RX_FDEQ_GAIN_2 +42 0x6470 //RX_FDEQ_GAIN_3 +43 0x7A84 //RX_FDEQ_GAIN_4 +44 0x7C7A //RX_FDEQ_GAIN_5 +45 0x7C7C //RX_FDEQ_GAIN_6 +46 0x7D7C //RX_FDEQ_GAIN_7 +47 0x7E82 //RX_FDEQ_GAIN_8 +48 0x7C80 //RX_FDEQ_GAIN_9 49 0x4848 //RX_FDEQ_GAIN_10 50 0x4848 //RX_FDEQ_GAIN_11 51 0x4848 //RX_FDEQ_GAIN_12 @@ -20312,12 +30465,12 @@ 121 0x199A //RX_TDDRC_HMNC_GAIN 122 0x0001 //RX_TDDRC_SMT_FLAG 123 0x0CCD //RX_TDDRC_SMT_W -124 0x030A //RX_TDDRC_DRC_GAIN +124 0x055F //RX_TDDRC_DRC_GAIN 125 0x7C00 //RX_LAMBDA_PKA_FP 126 0x13E0 //RX_TPKA_FP 127 0x0080 //RX_MIN_G_FP 128 0x2000 //RX_MAX_G_FP -129 0x000E //RX_SPK_VOL +129 0x000A //RX_SPK_VOL 130 0x0000 //RX_VOL_RESRV_0 131 0x0000 //RX_MAXLEVEL_CNG 132 0x3000 //RX_BWE_UV_TH @@ -20368,18 +30521,18 @@ 121 0x199A //RX_TDDRC_HMNC_GAIN 122 0x0001 //RX_TDDRC_SMT_FLAG 123 0x0CCD //RX_TDDRC_SMT_W -124 0x030A //RX_TDDRC_DRC_GAIN +124 0x055F //RX_TDDRC_DRC_GAIN 38 0x0014 //RX_FDEQ_SUBNUM 39 0x4840 //RX_FDEQ_GAIN_0 -40 0x3E3E //RX_FDEQ_GAIN_1 -41 0x4248 //RX_FDEQ_GAIN_2 -42 0x5066 //RX_FDEQ_GAIN_3 -43 0x6A7C //RX_FDEQ_GAIN_4 -44 0x706D //RX_FDEQ_GAIN_5 -45 0x6967 //RX_FDEQ_GAIN_6 -46 0x6666 //RX_FDEQ_GAIN_7 -47 0x6964 //RX_FDEQ_GAIN_8 -48 0x6774 //RX_FDEQ_GAIN_9 +40 0x3E40 //RX_FDEQ_GAIN_1 +41 0x4D5A //RX_FDEQ_GAIN_2 +42 0x606C //RX_FDEQ_GAIN_3 +43 0x767C //RX_FDEQ_GAIN_4 +44 0x7876 //RX_FDEQ_GAIN_5 +45 0x7878 //RX_FDEQ_GAIN_6 +46 0x797C //RX_FDEQ_GAIN_7 +47 0x7E82 //RX_FDEQ_GAIN_8 +48 0x7C80 //RX_FDEQ_GAIN_9 49 0x4848 //RX_FDEQ_GAIN_10 50 0x4848 //RX_FDEQ_GAIN_11 51 0x4848 //RX_FDEQ_GAIN_12 @@ -20442,7 +30595,7 @@ 108 0x5333 //RX_FDDRC_SLANT_1_2 109 0x5333 //RX_FDDRC_SLANT_1_3 110 0x0000 //RX_FDDRC_RESRV_0 -129 0x000E //RX_SPK_VOL +129 0x000A //RX_SPK_VOL 130 0x0000 //RX_VOL_RESRV_0 #VOL 1 6 0x1000 //RX_TDDRC_ALPHA_UP_1 @@ -20467,18 +30620,18 @@ 121 0x199A //RX_TDDRC_HMNC_GAIN 122 0x0001 //RX_TDDRC_SMT_FLAG 123 0x0CCD //RX_TDDRC_SMT_W -124 0x0318 //RX_TDDRC_DRC_GAIN +124 0x055F //RX_TDDRC_DRC_GAIN 38 0x0014 //RX_FDEQ_SUBNUM 39 0x4840 //RX_FDEQ_GAIN_0 -40 0x3E3E //RX_FDEQ_GAIN_1 -41 0x4248 //RX_FDEQ_GAIN_2 -42 0x5066 //RX_FDEQ_GAIN_3 -43 0x6A7C //RX_FDEQ_GAIN_4 -44 0x706D //RX_FDEQ_GAIN_5 -45 0x6967 //RX_FDEQ_GAIN_6 -46 0x6666 //RX_FDEQ_GAIN_7 -47 0x6964 //RX_FDEQ_GAIN_8 -48 0x6774 //RX_FDEQ_GAIN_9 +40 0x3E40 //RX_FDEQ_GAIN_1 +41 0x4D5A //RX_FDEQ_GAIN_2 +42 0x606C //RX_FDEQ_GAIN_3 +43 0x767C //RX_FDEQ_GAIN_4 +44 0x7876 //RX_FDEQ_GAIN_5 +45 0x7878 //RX_FDEQ_GAIN_6 +46 0x797C //RX_FDEQ_GAIN_7 +47 0x7E82 //RX_FDEQ_GAIN_8 +48 0x7C80 //RX_FDEQ_GAIN_9 49 0x4848 //RX_FDEQ_GAIN_10 50 0x4848 //RX_FDEQ_GAIN_11 51 0x4848 //RX_FDEQ_GAIN_12 @@ -20541,7 +30694,7 @@ 108 0x5333 //RX_FDDRC_SLANT_1_2 109 0x5333 //RX_FDDRC_SLANT_1_3 110 0x0000 //RX_FDDRC_RESRV_0 -129 0x0016 //RX_SPK_VOL +129 0x0010 //RX_SPK_VOL 130 0x0000 //RX_VOL_RESRV_0 #VOL 2 6 0x1000 //RX_TDDRC_ALPHA_UP_1 @@ -20566,18 +30719,18 @@ 121 0x199A //RX_TDDRC_HMNC_GAIN 122 0x0001 //RX_TDDRC_SMT_FLAG 123 0x0CCD //RX_TDDRC_SMT_W -124 0x0306 //RX_TDDRC_DRC_GAIN +124 0x055F //RX_TDDRC_DRC_GAIN 38 0x0014 //RX_FDEQ_SUBNUM 39 0x4840 //RX_FDEQ_GAIN_0 -40 0x3E3E //RX_FDEQ_GAIN_1 -41 0x4248 //RX_FDEQ_GAIN_2 -42 0x5066 //RX_FDEQ_GAIN_3 -43 0x6A7C //RX_FDEQ_GAIN_4 -44 0x706D //RX_FDEQ_GAIN_5 -45 0x6967 //RX_FDEQ_GAIN_6 -46 0x6666 //RX_FDEQ_GAIN_7 -47 0x6964 //RX_FDEQ_GAIN_8 -48 0x6774 //RX_FDEQ_GAIN_9 +40 0x3E40 //RX_FDEQ_GAIN_1 +41 0x4D5A //RX_FDEQ_GAIN_2 +42 0x606C //RX_FDEQ_GAIN_3 +43 0x767C //RX_FDEQ_GAIN_4 +44 0x7876 //RX_FDEQ_GAIN_5 +45 0x7878 //RX_FDEQ_GAIN_6 +46 0x797C //RX_FDEQ_GAIN_7 +47 0x7E82 //RX_FDEQ_GAIN_8 +48 0x7C80 //RX_FDEQ_GAIN_9 49 0x4848 //RX_FDEQ_GAIN_10 50 0x4848 //RX_FDEQ_GAIN_11 51 0x4848 //RX_FDEQ_GAIN_12 @@ -20640,7 +30793,7 @@ 108 0x5333 //RX_FDDRC_SLANT_1_2 109 0x5333 //RX_FDDRC_SLANT_1_3 110 0x0000 //RX_FDDRC_RESRV_0 -129 0x0024 //RX_SPK_VOL +129 0x001A //RX_SPK_VOL 130 0x0000 //RX_VOL_RESRV_0 #VOL 3 6 0x1000 //RX_TDDRC_ALPHA_UP_1 @@ -20665,18 +30818,18 @@ 121 0x199A //RX_TDDRC_HMNC_GAIN 122 0x0001 //RX_TDDRC_SMT_FLAG 123 0x0CCD //RX_TDDRC_SMT_W -124 0x0306 //RX_TDDRC_DRC_GAIN +124 0x055F //RX_TDDRC_DRC_GAIN 38 0x0014 //RX_FDEQ_SUBNUM 39 0x4840 //RX_FDEQ_GAIN_0 -40 0x3E3E //RX_FDEQ_GAIN_1 -41 0x4248 //RX_FDEQ_GAIN_2 -42 0x5066 //RX_FDEQ_GAIN_3 -43 0x6A7C //RX_FDEQ_GAIN_4 -44 0x706D //RX_FDEQ_GAIN_5 -45 0x6967 //RX_FDEQ_GAIN_6 -46 0x6666 //RX_FDEQ_GAIN_7 -47 0x6964 //RX_FDEQ_GAIN_8 -48 0x6774 //RX_FDEQ_GAIN_9 +40 0x3E40 //RX_FDEQ_GAIN_1 +41 0x4D5A //RX_FDEQ_GAIN_2 +42 0x606C //RX_FDEQ_GAIN_3 +43 0x767C //RX_FDEQ_GAIN_4 +44 0x7876 //RX_FDEQ_GAIN_5 +45 0x7878 //RX_FDEQ_GAIN_6 +46 0x797C //RX_FDEQ_GAIN_7 +47 0x7E82 //RX_FDEQ_GAIN_8 +48 0x7C80 //RX_FDEQ_GAIN_9 49 0x4848 //RX_FDEQ_GAIN_10 50 0x4848 //RX_FDEQ_GAIN_11 51 0x4848 //RX_FDEQ_GAIN_12 @@ -20739,7 +30892,7 @@ 108 0x5333 //RX_FDDRC_SLANT_1_2 109 0x5333 //RX_FDDRC_SLANT_1_3 110 0x0000 //RX_FDDRC_RESRV_0 -129 0x003A //RX_SPK_VOL +129 0x0031 //RX_SPK_VOL 130 0x0000 //RX_VOL_RESRV_0 #VOL 4 6 0x1000 //RX_TDDRC_ALPHA_UP_1 @@ -20764,18 +30917,18 @@ 121 0x199A //RX_TDDRC_HMNC_GAIN 122 0x0001 //RX_TDDRC_SMT_FLAG 123 0x0CCD //RX_TDDRC_SMT_W -124 0x0306 //RX_TDDRC_DRC_GAIN +124 0x055F //RX_TDDRC_DRC_GAIN 38 0x0014 //RX_FDEQ_SUBNUM 39 0x4840 //RX_FDEQ_GAIN_0 -40 0x3E3E //RX_FDEQ_GAIN_1 -41 0x4248 //RX_FDEQ_GAIN_2 -42 0x5066 //RX_FDEQ_GAIN_3 -43 0x6A7C //RX_FDEQ_GAIN_4 -44 0x706D //RX_FDEQ_GAIN_5 -45 0x6967 //RX_FDEQ_GAIN_6 -46 0x6666 //RX_FDEQ_GAIN_7 -47 0x6964 //RX_FDEQ_GAIN_8 -48 0x6774 //RX_FDEQ_GAIN_9 +40 0x3E40 //RX_FDEQ_GAIN_1 +41 0x4D5A //RX_FDEQ_GAIN_2 +42 0x606C //RX_FDEQ_GAIN_3 +43 0x767C //RX_FDEQ_GAIN_4 +44 0x7876 //RX_FDEQ_GAIN_5 +45 0x7878 //RX_FDEQ_GAIN_6 +46 0x797C //RX_FDEQ_GAIN_7 +47 0x7E82 //RX_FDEQ_GAIN_8 +48 0x7C80 //RX_FDEQ_GAIN_9 49 0x4848 //RX_FDEQ_GAIN_10 50 0x4848 //RX_FDEQ_GAIN_11 51 0x4848 //RX_FDEQ_GAIN_12 @@ -20838,7 +30991,7 @@ 108 0x5333 //RX_FDDRC_SLANT_1_2 109 0x5333 //RX_FDDRC_SLANT_1_3 110 0x0000 //RX_FDDRC_RESRV_0 -129 0x005D //RX_SPK_VOL +129 0x0045 //RX_SPK_VOL 130 0x0000 //RX_VOL_RESRV_0 #VOL 5 6 0x1000 //RX_TDDRC_ALPHA_UP_1 @@ -20863,18 +31016,18 @@ 121 0x199A //RX_TDDRC_HMNC_GAIN 122 0x0001 //RX_TDDRC_SMT_FLAG 123 0x0CCD //RX_TDDRC_SMT_W -124 0x0306 //RX_TDDRC_DRC_GAIN +124 0x055F //RX_TDDRC_DRC_GAIN 38 0x0014 //RX_FDEQ_SUBNUM 39 0x4840 //RX_FDEQ_GAIN_0 -40 0x3E3E //RX_FDEQ_GAIN_1 -41 0x4248 //RX_FDEQ_GAIN_2 -42 0x5066 //RX_FDEQ_GAIN_3 -43 0x6A7C //RX_FDEQ_GAIN_4 -44 0x706D //RX_FDEQ_GAIN_5 -45 0x6967 //RX_FDEQ_GAIN_6 -46 0x6666 //RX_FDEQ_GAIN_7 -47 0x6964 //RX_FDEQ_GAIN_8 -48 0x6774 //RX_FDEQ_GAIN_9 +40 0x3E40 //RX_FDEQ_GAIN_1 +41 0x4D5A //RX_FDEQ_GAIN_2 +42 0x606C //RX_FDEQ_GAIN_3 +43 0x767C //RX_FDEQ_GAIN_4 +44 0x7876 //RX_FDEQ_GAIN_5 +45 0x7878 //RX_FDEQ_GAIN_6 +46 0x797C //RX_FDEQ_GAIN_7 +47 0x7E82 //RX_FDEQ_GAIN_8 +48 0x7C80 //RX_FDEQ_GAIN_9 49 0x4848 //RX_FDEQ_GAIN_10 50 0x4848 //RX_FDEQ_GAIN_11 51 0x4848 //RX_FDEQ_GAIN_12 @@ -20937,7 +31090,7 @@ 108 0x5333 //RX_FDDRC_SLANT_1_2 109 0x5333 //RX_FDDRC_SLANT_1_3 110 0x0000 //RX_FDDRC_RESRV_0 -129 0x0095 //RX_SPK_VOL +129 0x0074 //RX_SPK_VOL 130 0x0000 //RX_VOL_RESRV_0 #VOL 6 6 0x1000 //RX_TDDRC_ALPHA_UP_1 @@ -20962,18 +31115,18 @@ 121 0x199A //RX_TDDRC_HMNC_GAIN 122 0x0001 //RX_TDDRC_SMT_FLAG 123 0x0CCD //RX_TDDRC_SMT_W -124 0x0306 //RX_TDDRC_DRC_GAIN +124 0x055F //RX_TDDRC_DRC_GAIN 38 0x0014 //RX_FDEQ_SUBNUM 39 0x4840 //RX_FDEQ_GAIN_0 -40 0x3E3E //RX_FDEQ_GAIN_1 -41 0x4248 //RX_FDEQ_GAIN_2 -42 0x5066 //RX_FDEQ_GAIN_3 -43 0x6A7C //RX_FDEQ_GAIN_4 -44 0x706D //RX_FDEQ_GAIN_5 -45 0x6967 //RX_FDEQ_GAIN_6 -46 0x6666 //RX_FDEQ_GAIN_7 -47 0x6964 //RX_FDEQ_GAIN_8 -48 0x6774 //RX_FDEQ_GAIN_9 +40 0x3E40 //RX_FDEQ_GAIN_1 +41 0x4D5A //RX_FDEQ_GAIN_2 +42 0x606C //RX_FDEQ_GAIN_3 +43 0x767C //RX_FDEQ_GAIN_4 +44 0x7876 //RX_FDEQ_GAIN_5 +45 0x7878 //RX_FDEQ_GAIN_6 +46 0x797C //RX_FDEQ_GAIN_7 +47 0x7E82 //RX_FDEQ_GAIN_8 +48 0x7C80 //RX_FDEQ_GAIN_9 49 0x4848 //RX_FDEQ_GAIN_10 50 0x4848 //RX_FDEQ_GAIN_11 51 0x4848 //RX_FDEQ_GAIN_12 @@ -21038,10 +31191,862 @@ 110 0x0000 //RX_FDDRC_RESRV_0 129 0x0100 //RX_SPK_VOL 130 0x0000 //RX_VOL_RESRV_0 +#RX 2 +157 0x003C //RX_RECVFUNC_MODE_0 +158 0x0000 //RX_RECVFUNC_MODE_1 +159 0x0000 //RX_SAMPLINGFREQ_SIG +160 0x0000 //RX_SAMPLINGFREQ_PROC +161 0x000A //RX_FRAME_SZ +162 0x0000 //RX_DELAY_OPT +163 0x1000 //RX_TDDRC_ALPHA_UP_1 +164 0x1000 //RX_TDDRC_ALPHA_UP_2 +165 0x1000 //RX_TDDRC_ALPHA_UP_3 +166 0x1000 //RX_TDDRC_ALPHA_UP_4 +167 0x0600 //RX_PGA +168 0x7FFF //RX_A_HP +169 0x4000 //RX_B_PE +170 0x7800 //RX_THR_PITCH_DET_0 +171 0x7000 //RX_THR_PITCH_DET_1 +172 0x6000 //RX_THR_PITCH_DET_2 +173 0x0008 //RX_PITCH_BFR_LEN +174 0x0003 //RX_SBD_PITCH_DET +175 0x0100 //RX_PP_RESRV_0 +176 0x0020 //RX_PP_RESRV_1 +177 0x0400 //RX_N_SN_EST +178 0x000C //RX_N2_SN_EST +179 0x0014 //RX_NS_LVL_CTRL +180 0xF800 //RX_THR_SN_EST +181 0x7E00 //RX_LAMBDA_PFILT +182 0x000A //RX_FENS_RESRV_0 +183 0x0190 //RX_FENS_RESRV_1 +184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +187 0x0002 //RX_EXTRA_NS_L +188 0x0800 //RX_EXTRA_NS_A +189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +190 0x7000 //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +192 0x199A //RX_A_POST_FLT +193 0x0000 //RX_LMT_THRD +194 0x4000 //RX_LMT_ALPHA +195 0x0014 //RX_FDEQ_SUBNUM +196 0x4840 //RX_FDEQ_GAIN_0 +197 0x3E40 //RX_FDEQ_GAIN_1 +198 0x515E //RX_FDEQ_GAIN_2 +199 0x6470 //RX_FDEQ_GAIN_3 +200 0x7A84 //RX_FDEQ_GAIN_4 +201 0x7C7A //RX_FDEQ_GAIN_5 +202 0x7C7C //RX_FDEQ_GAIN_6 +203 0x7D7C //RX_FDEQ_GAIN_7 +204 0x7E82 //RX_FDEQ_GAIN_8 +205 0x7C80 //RX_FDEQ_GAIN_9 +206 0x4848 //RX_FDEQ_GAIN_10 +207 0x4848 //RX_FDEQ_GAIN_11 +208 0x4848 //RX_FDEQ_GAIN_12 +209 0x4848 //RX_FDEQ_GAIN_13 +210 0x4848 //RX_FDEQ_GAIN_14 +211 0x4848 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0202 //RX_FDEQ_BIN_0 +221 0x0204 //RX_FDEQ_BIN_1 +222 0x0203 //RX_FDEQ_BIN_2 +223 0x0304 //RX_FDEQ_BIN_3 +224 0x0405 //RX_FDEQ_BIN_4 +225 0x0506 //RX_FDEQ_BIN_5 +226 0x0708 //RX_FDEQ_BIN_6 +227 0x090A //RX_FDEQ_BIN_7 +228 0x0B0C //RX_FDEQ_BIN_8 +229 0x0D08 //RX_FDEQ_BIN_9 +230 0x0000 //RX_FDEQ_BIN_10 +231 0x0000 //RX_FDEQ_BIN_11 +232 0x0000 //RX_FDEQ_BIN_12 +233 0x0000 //RX_FDEQ_BIN_13 +234 0x0000 //RX_FDEQ_BIN_14 +235 0x0000 //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x4000 //RX_FDEQ_RESRV_0 +245 0x0320 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0030 //RX_FDDRC_BAND_MARGIN_1 +248 0x0050 //RX_FDDRC_BAND_MARGIN_2 +249 0x0080 //RX_FDDRC_BAND_MARGIN_3 +250 0x0007 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x5000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x6400 //RX_FDDRC_THRD_3_2 +258 0x6400 //RX_FDDRC_THRD_3_3 +259 0x2000 //RX_FDDRC_SLANT_0_0 +260 0x2000 //RX_FDDRC_SLANT_0_1 +261 0x2000 //RX_FDDRC_SLANT_0_2 +262 0x2000 //RX_FDDRC_SLANT_0_3 +263 0x5333 //RX_FDDRC_SLANT_1_0 +264 0x5333 //RX_FDDRC_SLANT_1_1 +265 0x5333 //RX_FDDRC_SLANT_1_2 +266 0x5333 //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +268 0x0002 //RX_FILTINDX +269 0x0000 //RX_TDDRC_THRD_0 +270 0x0000 //RX_TDDRC_THRD_1 +271 0x1800 //RX_TDDRC_THRD_2 +272 0x1800 //RX_TDDRC_THRD_3 +273 0x3000 //RX_TDDRC_SLANT_0 +274 0x6E00 //RX_TDDRC_SLANT_1 +275 0x1000 //RX_TDDRC_ALPHA_UP_0 +276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x199A //RX_TDDRC_HMNC_GAIN +279 0x0001 //RX_TDDRC_SMT_FLAG +280 0x0CCD //RX_TDDRC_SMT_W +281 0x055F //RX_TDDRC_DRC_GAIN +282 0x7C00 //RX_LAMBDA_PKA_FP +283 0x13E0 //RX_TPKA_FP +284 0x0080 //RX_MIN_G_FP +285 0x2000 //RX_MAX_G_FP +286 0x000A //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 +288 0x0000 //RX_MAXLEVEL_CNG +289 0x3000 //RX_BWE_UV_TH +290 0x3000 //RX_BWE_UV_TH2 +291 0x1800 //RX_BWE_UV_TH3 +292 0x1000 //RX_BWE_V_TH +293 0x04CD //RX_BWE_GAIN1_V_TH1 +294 0x0F33 //RX_BWE_GAIN1_V_TH2 +295 0x7333 //RX_BWE_UV_EQ +296 0x199A //RX_BWE_V_EQ +297 0x7333 //RX_BWE_TONE_TH +298 0x0004 //RX_BWE_UV_HOLD_T +299 0x6CCD //RX_BWE_GAIN2_ALPHA +300 0x799A //RX_BWE_GAIN3_ALPHA +301 0x001E //RX_BWE_CUTOFF +302 0x3000 //RX_BWE_GAINFILL +303 0x3200 //RX_BWE_MAXTH_TONE +304 0x2000 //RX_BWE_EQ_0 +305 0x2000 //RX_BWE_EQ_1 +306 0x2000 //RX_BWE_EQ_2 +307 0x2000 //RX_BWE_EQ_3 +308 0x2000 //RX_BWE_EQ_4 +309 0x2000 //RX_BWE_EQ_5 +310 0x2000 //RX_BWE_EQ_6 +311 0x0000 //RX_BWE_RESRV_0 +312 0x0000 //RX_BWE_RESRV_1 +313 0x0000 //RX_BWE_RESRV_2 +#VOL 0 +163 0x1000 //RX_TDDRC_ALPHA_UP_1 +164 0x1000 //RX_TDDRC_ALPHA_UP_2 +165 0x1000 //RX_TDDRC_ALPHA_UP_3 +166 0x1000 //RX_TDDRC_ALPHA_UP_4 +184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +190 0x7000 //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +269 0x0000 //RX_TDDRC_THRD_0 +270 0x0000 //RX_TDDRC_THRD_1 +271 0x1800 //RX_TDDRC_THRD_2 +272 0x1800 //RX_TDDRC_THRD_3 +273 0x3000 //RX_TDDRC_SLANT_0 +274 0x6E00 //RX_TDDRC_SLANT_1 +275 0x1000 //RX_TDDRC_ALPHA_UP_0 +276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x199A //RX_TDDRC_HMNC_GAIN +279 0x0001 //RX_TDDRC_SMT_FLAG +280 0x0CCD //RX_TDDRC_SMT_W +281 0x055F //RX_TDDRC_DRC_GAIN +195 0x0014 //RX_FDEQ_SUBNUM +196 0x4840 //RX_FDEQ_GAIN_0 +197 0x3E40 //RX_FDEQ_GAIN_1 +198 0x515E //RX_FDEQ_GAIN_2 +199 0x6470 //RX_FDEQ_GAIN_3 +200 0x7A84 //RX_FDEQ_GAIN_4 +201 0x7C7A //RX_FDEQ_GAIN_5 +202 0x7C7C //RX_FDEQ_GAIN_6 +203 0x7D7C //RX_FDEQ_GAIN_7 +204 0x7E82 //RX_FDEQ_GAIN_8 +205 0x7C80 //RX_FDEQ_GAIN_9 +206 0x4848 //RX_FDEQ_GAIN_10 +207 0x4848 //RX_FDEQ_GAIN_11 +208 0x4848 //RX_FDEQ_GAIN_12 +209 0x4848 //RX_FDEQ_GAIN_13 +210 0x4848 //RX_FDEQ_GAIN_14 +211 0x4848 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0202 //RX_FDEQ_BIN_0 +221 0x0204 //RX_FDEQ_BIN_1 +222 0x0203 //RX_FDEQ_BIN_2 +223 0x0304 //RX_FDEQ_BIN_3 +224 0x0405 //RX_FDEQ_BIN_4 +225 0x0506 //RX_FDEQ_BIN_5 +226 0x0708 //RX_FDEQ_BIN_6 +227 0x090A //RX_FDEQ_BIN_7 +228 0x0B0C //RX_FDEQ_BIN_8 +229 0x0D08 //RX_FDEQ_BIN_9 +230 0x0000 //RX_FDEQ_BIN_10 +231 0x0000 //RX_FDEQ_BIN_11 +232 0x0000 //RX_FDEQ_BIN_12 +233 0x0000 //RX_FDEQ_BIN_13 +234 0x0000 //RX_FDEQ_BIN_14 +235 0x0000 //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x4000 //RX_FDEQ_RESRV_0 +245 0x0320 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0030 //RX_FDDRC_BAND_MARGIN_1 +248 0x0050 //RX_FDDRC_BAND_MARGIN_2 +249 0x0080 //RX_FDDRC_BAND_MARGIN_3 +250 0x0007 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x5000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x6400 //RX_FDDRC_THRD_3_2 +258 0x6400 //RX_FDDRC_THRD_3_3 +259 0x2000 //RX_FDDRC_SLANT_0_0 +260 0x2000 //RX_FDDRC_SLANT_0_1 +261 0x2000 //RX_FDDRC_SLANT_0_2 +262 0x2000 //RX_FDDRC_SLANT_0_3 +263 0x5333 //RX_FDDRC_SLANT_1_0 +264 0x5333 //RX_FDDRC_SLANT_1_1 +265 0x5333 //RX_FDDRC_SLANT_1_2 +266 0x5333 //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +286 0x000A //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 +#VOL 1 +163 0x1000 //RX_TDDRC_ALPHA_UP_1 +164 0x1000 //RX_TDDRC_ALPHA_UP_2 +165 0x1000 //RX_TDDRC_ALPHA_UP_3 +166 0x1000 //RX_TDDRC_ALPHA_UP_4 +184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +190 0x7000 //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +269 0x0000 //RX_TDDRC_THRD_0 +270 0x0000 //RX_TDDRC_THRD_1 +271 0x1800 //RX_TDDRC_THRD_2 +272 0x1800 //RX_TDDRC_THRD_3 +273 0x3000 //RX_TDDRC_SLANT_0 +274 0x6E00 //RX_TDDRC_SLANT_1 +275 0x1000 //RX_TDDRC_ALPHA_UP_0 +276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x199A //RX_TDDRC_HMNC_GAIN +279 0x0001 //RX_TDDRC_SMT_FLAG +280 0x0CCD //RX_TDDRC_SMT_W +281 0x055F //RX_TDDRC_DRC_GAIN +195 0x0014 //RX_FDEQ_SUBNUM +196 0x4840 //RX_FDEQ_GAIN_0 +197 0x3E40 //RX_FDEQ_GAIN_1 +198 0x515E //RX_FDEQ_GAIN_2 +199 0x6470 //RX_FDEQ_GAIN_3 +200 0x7A84 //RX_FDEQ_GAIN_4 +201 0x7C7A //RX_FDEQ_GAIN_5 +202 0x7C7C //RX_FDEQ_GAIN_6 +203 0x7D7C //RX_FDEQ_GAIN_7 +204 0x7E82 //RX_FDEQ_GAIN_8 +205 0x7C80 //RX_FDEQ_GAIN_9 +206 0x4848 //RX_FDEQ_GAIN_10 +207 0x4848 //RX_FDEQ_GAIN_11 +208 0x4848 //RX_FDEQ_GAIN_12 +209 0x4848 //RX_FDEQ_GAIN_13 +210 0x4848 //RX_FDEQ_GAIN_14 +211 0x4848 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0202 //RX_FDEQ_BIN_0 +221 0x0204 //RX_FDEQ_BIN_1 +222 0x0203 //RX_FDEQ_BIN_2 +223 0x0304 //RX_FDEQ_BIN_3 +224 0x0405 //RX_FDEQ_BIN_4 +225 0x0506 //RX_FDEQ_BIN_5 +226 0x0708 //RX_FDEQ_BIN_6 +227 0x090A //RX_FDEQ_BIN_7 +228 0x0B0C //RX_FDEQ_BIN_8 +229 0x0D08 //RX_FDEQ_BIN_9 +230 0x0000 //RX_FDEQ_BIN_10 +231 0x0000 //RX_FDEQ_BIN_11 +232 0x0000 //RX_FDEQ_BIN_12 +233 0x0000 //RX_FDEQ_BIN_13 +234 0x0000 //RX_FDEQ_BIN_14 +235 0x0000 //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x4000 //RX_FDEQ_RESRV_0 +245 0x0320 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0030 //RX_FDDRC_BAND_MARGIN_1 +248 0x0050 //RX_FDDRC_BAND_MARGIN_2 +249 0x0080 //RX_FDDRC_BAND_MARGIN_3 +250 0x0007 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x5000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x6400 //RX_FDDRC_THRD_3_2 +258 0x6400 //RX_FDDRC_THRD_3_3 +259 0x2000 //RX_FDDRC_SLANT_0_0 +260 0x2000 //RX_FDDRC_SLANT_0_1 +261 0x2000 //RX_FDDRC_SLANT_0_2 +262 0x2000 //RX_FDDRC_SLANT_0_3 +263 0x5333 //RX_FDDRC_SLANT_1_0 +264 0x5333 //RX_FDDRC_SLANT_1_1 +265 0x5333 //RX_FDDRC_SLANT_1_2 +266 0x5333 //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +286 0x0010 //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 +#VOL 2 +163 0x1000 //RX_TDDRC_ALPHA_UP_1 +164 0x1000 //RX_TDDRC_ALPHA_UP_2 +165 0x1000 //RX_TDDRC_ALPHA_UP_3 +166 0x1000 //RX_TDDRC_ALPHA_UP_4 +184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +190 0x7000 //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +269 0x0000 //RX_TDDRC_THRD_0 +270 0x0000 //RX_TDDRC_THRD_1 +271 0x1800 //RX_TDDRC_THRD_2 +272 0x1800 //RX_TDDRC_THRD_3 +273 0x3000 //RX_TDDRC_SLANT_0 +274 0x6E00 //RX_TDDRC_SLANT_1 +275 0x1000 //RX_TDDRC_ALPHA_UP_0 +276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x199A //RX_TDDRC_HMNC_GAIN +279 0x0001 //RX_TDDRC_SMT_FLAG +280 0x0CCD //RX_TDDRC_SMT_W +281 0x055F //RX_TDDRC_DRC_GAIN +195 0x0014 //RX_FDEQ_SUBNUM +196 0x4840 //RX_FDEQ_GAIN_0 +197 0x3E40 //RX_FDEQ_GAIN_1 +198 0x515E //RX_FDEQ_GAIN_2 +199 0x6470 //RX_FDEQ_GAIN_3 +200 0x7A84 //RX_FDEQ_GAIN_4 +201 0x7C7A //RX_FDEQ_GAIN_5 +202 0x7C7C //RX_FDEQ_GAIN_6 +203 0x7D7C //RX_FDEQ_GAIN_7 +204 0x7E82 //RX_FDEQ_GAIN_8 +205 0x7C80 //RX_FDEQ_GAIN_9 +206 0x4848 //RX_FDEQ_GAIN_10 +207 0x4848 //RX_FDEQ_GAIN_11 +208 0x4848 //RX_FDEQ_GAIN_12 +209 0x4848 //RX_FDEQ_GAIN_13 +210 0x4848 //RX_FDEQ_GAIN_14 +211 0x4848 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0202 //RX_FDEQ_BIN_0 +221 0x0204 //RX_FDEQ_BIN_1 +222 0x0203 //RX_FDEQ_BIN_2 +223 0x0304 //RX_FDEQ_BIN_3 +224 0x0405 //RX_FDEQ_BIN_4 +225 0x0506 //RX_FDEQ_BIN_5 +226 0x0708 //RX_FDEQ_BIN_6 +227 0x090A //RX_FDEQ_BIN_7 +228 0x0B0C //RX_FDEQ_BIN_8 +229 0x0D08 //RX_FDEQ_BIN_9 +230 0x0000 //RX_FDEQ_BIN_10 +231 0x0000 //RX_FDEQ_BIN_11 +232 0x0000 //RX_FDEQ_BIN_12 +233 0x0000 //RX_FDEQ_BIN_13 +234 0x0000 //RX_FDEQ_BIN_14 +235 0x0000 //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x4000 //RX_FDEQ_RESRV_0 +245 0x0320 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0030 //RX_FDDRC_BAND_MARGIN_1 +248 0x0050 //RX_FDDRC_BAND_MARGIN_2 +249 0x0080 //RX_FDDRC_BAND_MARGIN_3 +250 0x0007 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x5000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x6400 //RX_FDDRC_THRD_3_2 +258 0x6400 //RX_FDDRC_THRD_3_3 +259 0x2000 //RX_FDDRC_SLANT_0_0 +260 0x2000 //RX_FDDRC_SLANT_0_1 +261 0x2000 //RX_FDDRC_SLANT_0_2 +262 0x2000 //RX_FDDRC_SLANT_0_3 +263 0x5333 //RX_FDDRC_SLANT_1_0 +264 0x5333 //RX_FDDRC_SLANT_1_1 +265 0x5333 //RX_FDDRC_SLANT_1_2 +266 0x5333 //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +286 0x001A //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 +#VOL 3 +163 0x1000 //RX_TDDRC_ALPHA_UP_1 +164 0x1000 //RX_TDDRC_ALPHA_UP_2 +165 0x1000 //RX_TDDRC_ALPHA_UP_3 +166 0x1000 //RX_TDDRC_ALPHA_UP_4 +184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +190 0x7000 //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +269 0x0000 //RX_TDDRC_THRD_0 +270 0x0000 //RX_TDDRC_THRD_1 +271 0x1800 //RX_TDDRC_THRD_2 +272 0x1800 //RX_TDDRC_THRD_3 +273 0x3000 //RX_TDDRC_SLANT_0 +274 0x6E00 //RX_TDDRC_SLANT_1 +275 0x1000 //RX_TDDRC_ALPHA_UP_0 +276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x199A //RX_TDDRC_HMNC_GAIN +279 0x0001 //RX_TDDRC_SMT_FLAG +280 0x0CCD //RX_TDDRC_SMT_W +281 0x055F //RX_TDDRC_DRC_GAIN +195 0x0014 //RX_FDEQ_SUBNUM +196 0x4840 //RX_FDEQ_GAIN_0 +197 0x3E40 //RX_FDEQ_GAIN_1 +198 0x515E //RX_FDEQ_GAIN_2 +199 0x6470 //RX_FDEQ_GAIN_3 +200 0x7A84 //RX_FDEQ_GAIN_4 +201 0x7C7A //RX_FDEQ_GAIN_5 +202 0x7C7C //RX_FDEQ_GAIN_6 +203 0x7D7C //RX_FDEQ_GAIN_7 +204 0x7E82 //RX_FDEQ_GAIN_8 +205 0x7C80 //RX_FDEQ_GAIN_9 +206 0x4848 //RX_FDEQ_GAIN_10 +207 0x4848 //RX_FDEQ_GAIN_11 +208 0x4848 //RX_FDEQ_GAIN_12 +209 0x4848 //RX_FDEQ_GAIN_13 +210 0x4848 //RX_FDEQ_GAIN_14 +211 0x4848 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0202 //RX_FDEQ_BIN_0 +221 0x0204 //RX_FDEQ_BIN_1 +222 0x0203 //RX_FDEQ_BIN_2 +223 0x0304 //RX_FDEQ_BIN_3 +224 0x0405 //RX_FDEQ_BIN_4 +225 0x0506 //RX_FDEQ_BIN_5 +226 0x0708 //RX_FDEQ_BIN_6 +227 0x090A //RX_FDEQ_BIN_7 +228 0x0B0C //RX_FDEQ_BIN_8 +229 0x0D08 //RX_FDEQ_BIN_9 +230 0x0000 //RX_FDEQ_BIN_10 +231 0x0000 //RX_FDEQ_BIN_11 +232 0x0000 //RX_FDEQ_BIN_12 +233 0x0000 //RX_FDEQ_BIN_13 +234 0x0000 //RX_FDEQ_BIN_14 +235 0x0000 //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x4000 //RX_FDEQ_RESRV_0 +245 0x0320 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0030 //RX_FDDRC_BAND_MARGIN_1 +248 0x0050 //RX_FDDRC_BAND_MARGIN_2 +249 0x0080 //RX_FDDRC_BAND_MARGIN_3 +250 0x0007 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x5000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x6400 //RX_FDDRC_THRD_3_2 +258 0x6400 //RX_FDDRC_THRD_3_3 +259 0x2000 //RX_FDDRC_SLANT_0_0 +260 0x2000 //RX_FDDRC_SLANT_0_1 +261 0x2000 //RX_FDDRC_SLANT_0_2 +262 0x2000 //RX_FDDRC_SLANT_0_3 +263 0x5333 //RX_FDDRC_SLANT_1_0 +264 0x5333 //RX_FDDRC_SLANT_1_1 +265 0x5333 //RX_FDDRC_SLANT_1_2 +266 0x5333 //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +286 0x0034 //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 +#VOL 4 +163 0x1000 //RX_TDDRC_ALPHA_UP_1 +164 0x1000 //RX_TDDRC_ALPHA_UP_2 +165 0x1000 //RX_TDDRC_ALPHA_UP_3 +166 0x1000 //RX_TDDRC_ALPHA_UP_4 +184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +190 0x7000 //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +269 0x0000 //RX_TDDRC_THRD_0 +270 0x0000 //RX_TDDRC_THRD_1 +271 0x1800 //RX_TDDRC_THRD_2 +272 0x1800 //RX_TDDRC_THRD_3 +273 0x3000 //RX_TDDRC_SLANT_0 +274 0x6E00 //RX_TDDRC_SLANT_1 +275 0x1000 //RX_TDDRC_ALPHA_UP_0 +276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x199A //RX_TDDRC_HMNC_GAIN +279 0x0001 //RX_TDDRC_SMT_FLAG +280 0x0CCD //RX_TDDRC_SMT_W +281 0x055F //RX_TDDRC_DRC_GAIN +195 0x0014 //RX_FDEQ_SUBNUM +196 0x4840 //RX_FDEQ_GAIN_0 +197 0x3E40 //RX_FDEQ_GAIN_1 +198 0x515E //RX_FDEQ_GAIN_2 +199 0x6470 //RX_FDEQ_GAIN_3 +200 0x7A84 //RX_FDEQ_GAIN_4 +201 0x7C7A //RX_FDEQ_GAIN_5 +202 0x7C7C //RX_FDEQ_GAIN_6 +203 0x7D7C //RX_FDEQ_GAIN_7 +204 0x7E82 //RX_FDEQ_GAIN_8 +205 0x7C80 //RX_FDEQ_GAIN_9 +206 0x4848 //RX_FDEQ_GAIN_10 +207 0x4848 //RX_FDEQ_GAIN_11 +208 0x4848 //RX_FDEQ_GAIN_12 +209 0x4848 //RX_FDEQ_GAIN_13 +210 0x4848 //RX_FDEQ_GAIN_14 +211 0x4848 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0202 //RX_FDEQ_BIN_0 +221 0x0204 //RX_FDEQ_BIN_1 +222 0x0203 //RX_FDEQ_BIN_2 +223 0x0304 //RX_FDEQ_BIN_3 +224 0x0405 //RX_FDEQ_BIN_4 +225 0x0506 //RX_FDEQ_BIN_5 +226 0x0708 //RX_FDEQ_BIN_6 +227 0x090A //RX_FDEQ_BIN_7 +228 0x0B0C //RX_FDEQ_BIN_8 +229 0x0D08 //RX_FDEQ_BIN_9 +230 0x0000 //RX_FDEQ_BIN_10 +231 0x0000 //RX_FDEQ_BIN_11 +232 0x0000 //RX_FDEQ_BIN_12 +233 0x0000 //RX_FDEQ_BIN_13 +234 0x0000 //RX_FDEQ_BIN_14 +235 0x0000 //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x4000 //RX_FDEQ_RESRV_0 +245 0x0320 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0030 //RX_FDDRC_BAND_MARGIN_1 +248 0x0050 //RX_FDDRC_BAND_MARGIN_2 +249 0x0080 //RX_FDDRC_BAND_MARGIN_3 +250 0x0007 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x5000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x6400 //RX_FDDRC_THRD_3_2 +258 0x6400 //RX_FDDRC_THRD_3_3 +259 0x2000 //RX_FDDRC_SLANT_0_0 +260 0x2000 //RX_FDDRC_SLANT_0_1 +261 0x2000 //RX_FDDRC_SLANT_0_2 +262 0x2000 //RX_FDDRC_SLANT_0_3 +263 0x5333 //RX_FDDRC_SLANT_1_0 +264 0x5333 //RX_FDDRC_SLANT_1_1 +265 0x5333 //RX_FDDRC_SLANT_1_2 +266 0x5333 //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +286 0x0045 //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 +#VOL 5 +163 0x1000 //RX_TDDRC_ALPHA_UP_1 +164 0x1000 //RX_TDDRC_ALPHA_UP_2 +165 0x1000 //RX_TDDRC_ALPHA_UP_3 +166 0x1000 //RX_TDDRC_ALPHA_UP_4 +184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +190 0x7000 //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +269 0x0000 //RX_TDDRC_THRD_0 +270 0x0000 //RX_TDDRC_THRD_1 +271 0x1800 //RX_TDDRC_THRD_2 +272 0x1800 //RX_TDDRC_THRD_3 +273 0x3000 //RX_TDDRC_SLANT_0 +274 0x6E00 //RX_TDDRC_SLANT_1 +275 0x1000 //RX_TDDRC_ALPHA_UP_0 +276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x199A //RX_TDDRC_HMNC_GAIN +279 0x0001 //RX_TDDRC_SMT_FLAG +280 0x0CCD //RX_TDDRC_SMT_W +281 0x055F //RX_TDDRC_DRC_GAIN +195 0x0014 //RX_FDEQ_SUBNUM +196 0x4840 //RX_FDEQ_GAIN_0 +197 0x3E40 //RX_FDEQ_GAIN_1 +198 0x515E //RX_FDEQ_GAIN_2 +199 0x6470 //RX_FDEQ_GAIN_3 +200 0x7A84 //RX_FDEQ_GAIN_4 +201 0x7C7A //RX_FDEQ_GAIN_5 +202 0x7C7C //RX_FDEQ_GAIN_6 +203 0x7D7C //RX_FDEQ_GAIN_7 +204 0x7E82 //RX_FDEQ_GAIN_8 +205 0x7C80 //RX_FDEQ_GAIN_9 +206 0x4848 //RX_FDEQ_GAIN_10 +207 0x4848 //RX_FDEQ_GAIN_11 +208 0x4848 //RX_FDEQ_GAIN_12 +209 0x4848 //RX_FDEQ_GAIN_13 +210 0x4848 //RX_FDEQ_GAIN_14 +211 0x4848 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0202 //RX_FDEQ_BIN_0 +221 0x0204 //RX_FDEQ_BIN_1 +222 0x0203 //RX_FDEQ_BIN_2 +223 0x0304 //RX_FDEQ_BIN_3 +224 0x0405 //RX_FDEQ_BIN_4 +225 0x0506 //RX_FDEQ_BIN_5 +226 0x0708 //RX_FDEQ_BIN_6 +227 0x090A //RX_FDEQ_BIN_7 +228 0x0B0C //RX_FDEQ_BIN_8 +229 0x0D08 //RX_FDEQ_BIN_9 +230 0x0000 //RX_FDEQ_BIN_10 +231 0x0000 //RX_FDEQ_BIN_11 +232 0x0000 //RX_FDEQ_BIN_12 +233 0x0000 //RX_FDEQ_BIN_13 +234 0x0000 //RX_FDEQ_BIN_14 +235 0x0000 //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x4000 //RX_FDEQ_RESRV_0 +245 0x0320 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0030 //RX_FDDRC_BAND_MARGIN_1 +248 0x0050 //RX_FDDRC_BAND_MARGIN_2 +249 0x0080 //RX_FDDRC_BAND_MARGIN_3 +250 0x0007 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x5000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x6400 //RX_FDDRC_THRD_3_2 +258 0x6400 //RX_FDDRC_THRD_3_3 +259 0x2000 //RX_FDDRC_SLANT_0_0 +260 0x2000 //RX_FDDRC_SLANT_0_1 +261 0x2000 //RX_FDDRC_SLANT_0_2 +262 0x2000 //RX_FDDRC_SLANT_0_3 +263 0x5333 //RX_FDDRC_SLANT_1_0 +264 0x5333 //RX_FDDRC_SLANT_1_1 +265 0x5333 //RX_FDDRC_SLANT_1_2 +266 0x5333 //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +286 0x0074 //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 +#VOL 6 +163 0x1000 //RX_TDDRC_ALPHA_UP_1 +164 0x1000 //RX_TDDRC_ALPHA_UP_2 +165 0x1000 //RX_TDDRC_ALPHA_UP_3 +166 0x1000 //RX_TDDRC_ALPHA_UP_4 +184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +190 0x7000 //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +269 0x0000 //RX_TDDRC_THRD_0 +270 0x0000 //RX_TDDRC_THRD_1 +271 0x1800 //RX_TDDRC_THRD_2 +272 0x1800 //RX_TDDRC_THRD_3 +273 0x3000 //RX_TDDRC_SLANT_0 +274 0x6E00 //RX_TDDRC_SLANT_1 +275 0x1000 //RX_TDDRC_ALPHA_UP_0 +276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x199A //RX_TDDRC_HMNC_GAIN +279 0x0001 //RX_TDDRC_SMT_FLAG +280 0x0CCD //RX_TDDRC_SMT_W +281 0x055F //RX_TDDRC_DRC_GAIN +195 0x0014 //RX_FDEQ_SUBNUM +196 0x4840 //RX_FDEQ_GAIN_0 +197 0x3E40 //RX_FDEQ_GAIN_1 +198 0x515E //RX_FDEQ_GAIN_2 +199 0x6470 //RX_FDEQ_GAIN_3 +200 0x7A84 //RX_FDEQ_GAIN_4 +201 0x7C7A //RX_FDEQ_GAIN_5 +202 0x7C7C //RX_FDEQ_GAIN_6 +203 0x7D7C //RX_FDEQ_GAIN_7 +204 0x7E82 //RX_FDEQ_GAIN_8 +205 0x7C80 //RX_FDEQ_GAIN_9 +206 0x4848 //RX_FDEQ_GAIN_10 +207 0x4848 //RX_FDEQ_GAIN_11 +208 0x4848 //RX_FDEQ_GAIN_12 +209 0x4848 //RX_FDEQ_GAIN_13 +210 0x4848 //RX_FDEQ_GAIN_14 +211 0x4848 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0202 //RX_FDEQ_BIN_0 +221 0x0204 //RX_FDEQ_BIN_1 +222 0x0203 //RX_FDEQ_BIN_2 +223 0x0304 //RX_FDEQ_BIN_3 +224 0x0405 //RX_FDEQ_BIN_4 +225 0x0506 //RX_FDEQ_BIN_5 +226 0x0708 //RX_FDEQ_BIN_6 +227 0x090A //RX_FDEQ_BIN_7 +228 0x0B0C //RX_FDEQ_BIN_8 +229 0x0D08 //RX_FDEQ_BIN_9 +230 0x0000 //RX_FDEQ_BIN_10 +231 0x0000 //RX_FDEQ_BIN_11 +232 0x0000 //RX_FDEQ_BIN_12 +233 0x0000 //RX_FDEQ_BIN_13 +234 0x0000 //RX_FDEQ_BIN_14 +235 0x0000 //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x4000 //RX_FDEQ_RESRV_0 +245 0x0320 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0030 //RX_FDDRC_BAND_MARGIN_1 +248 0x0050 //RX_FDDRC_BAND_MARGIN_2 +249 0x0080 //RX_FDDRC_BAND_MARGIN_3 +250 0x0007 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x5000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x6400 //RX_FDDRC_THRD_3_2 +258 0x6400 //RX_FDDRC_THRD_3_3 +259 0x2000 //RX_FDDRC_SLANT_0_0 +260 0x2000 //RX_FDDRC_SLANT_0_1 +261 0x2000 //RX_FDDRC_SLANT_0_2 +262 0x2000 //RX_FDDRC_SLANT_0_3 +263 0x5333 //RX_FDDRC_SLANT_1_0 +264 0x5333 //RX_FDDRC_SLANT_1_1 +265 0x5333 //RX_FDDRC_SLANT_1_2 +266 0x5333 //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +286 0x0100 //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 #CASE_NAME HANDSET-HANDSET-TMOBILE_US-WB -#PARAM_TYPE TX+RX -#TOTAL_CUSTOM_STEP 7 +#PARAM_MODE Full +#PARAM_TYPE TX+2RX +#TOTAL_CUSTOM_STEP 7+7 #TX 0 0x0000 //TX_OPERATION_MODE_0 1 0x0000 //TX_OPERATION_MODE_1 @@ -21064,7 +32069,7 @@ 18 0x0000 //TX_SYS_RESRV_2 19 0x0000 //TX_SYS_RESRV_3 20 0x0000 //TX_DIST2REF0 -21 0x00A4 //TX_DIST2REF1 +21 0x00A3 //TX_DIST2REF1 22 0x0000 //TX_DIST2REF_02 23 0x0000 //TX_DIST2REF_03 24 0x0000 //TX_DIST2REF_04 @@ -21294,16 +32299,16 @@ 248 0xF800 //TX_THR_SN_EST_6 249 0xF700 //TX_THR_SN_EST_7 250 0x0000 //TX_DELTA_THR_SN_EST_0 -251 0x0100 //TX_DELTA_THR_SN_EST_1 -252 0x01A0 //TX_DELTA_THR_SN_EST_2 +251 0x01A0 //TX_DELTA_THR_SN_EST_1 +252 0x0200 //TX_DELTA_THR_SN_EST_2 253 0x0200 //TX_DELTA_THR_SN_EST_3 -254 0x0200 //TX_DELTA_THR_SN_EST_4 -255 0x0100 //TX_DELTA_THR_SN_EST_5 -256 0x0200 //TX_DELTA_THR_SN_EST_6 +254 0x0100 //TX_DELTA_THR_SN_EST_4 +255 0x0200 //TX_DELTA_THR_SN_EST_5 +256 0x0100 //TX_DELTA_THR_SN_EST_6 257 0x0200 //TX_DELTA_THR_SN_EST_7 258 0x4000 //TX_LAMBDA_NN_EST_0 -259 0x4000 //TX_LAMBDA_NN_EST_1 -260 0x5000 //TX_LAMBDA_NN_EST_2 +259 0x5000 //TX_LAMBDA_NN_EST_1 +260 0x4000 //TX_LAMBDA_NN_EST_2 261 0x4000 //TX_LAMBDA_NN_EST_3 262 0x4000 //TX_LAMBDA_NN_EST_4 263 0x4000 //TX_LAMBDA_NN_EST_5 @@ -21325,18 +32330,18 @@ 279 0x1000 //TX_B_POST_FLT_0 280 0x4000 //TX_B_POST_FLT_1 281 0x0018 //TX_NS_LVL_CTRL_0 -282 0x001C //TX_NS_LVL_CTRL_1 -283 0x0019 //TX_NS_LVL_CTRL_2 -284 0x0018 //TX_NS_LVL_CTRL_3 -285 0x0019 //TX_NS_LVL_CTRL_4 -286 0x001A //TX_NS_LVL_CTRL_5 -287 0x001E //TX_NS_LVL_CTRL_6 +282 0x0019 //TX_NS_LVL_CTRL_1 +283 0x0018 //TX_NS_LVL_CTRL_2 +284 0x0019 //TX_NS_LVL_CTRL_3 +285 0x001A //TX_NS_LVL_CTRL_4 +286 0x001E //TX_NS_LVL_CTRL_5 +287 0x001C //TX_NS_LVL_CTRL_6 288 0x001C //TX_NS_LVL_CTRL_7 289 0x000E //TX_MIN_GAIN_S_0 -290 0x0018 //TX_MIN_GAIN_S_1 +290 0x0012 //TX_MIN_GAIN_S_1 291 0x0012 //TX_MIN_GAIN_S_2 292 0x0012 //TX_MIN_GAIN_S_3 -293 0x0012 //TX_MIN_GAIN_S_4 +293 0x0018 //TX_MIN_GAIN_S_4 294 0x0018 //TX_MIN_GAIN_S_5 295 0x0018 //TX_MIN_GAIN_S_6 296 0x0018 //TX_MIN_GAIN_S_7 @@ -21344,8 +32349,8 @@ 298 0x0000 //TX_NS_MAX_PRI_SNR_TH 299 0x0000 //TX_NMOS_SUP_MENSA 300 0x7FFF //TX_SNRI_SUP_0 -301 0x4000 //TX_SNRI_SUP_1 -302 0x5000 //TX_SNRI_SUP_2 +301 0x5000 //TX_SNRI_SUP_1 +302 0x4000 //TX_SNRI_SUP_2 303 0x4000 //TX_SNRI_SUP_3 304 0x4000 //TX_SNRI_SUP_4 305 0x4000 //TX_SNRI_SUP_5 @@ -21358,28 +32363,28 @@ 312 0x7FFF //TX_A_POST_FILT_0 313 0x2000 //TX_A_POST_FILT_1 314 0x7000 //TX_A_POST_FILT_S_0 -315 0x7000 //TX_A_POST_FILT_S_1 +315 0x3000 //TX_A_POST_FILT_S_1 316 0x3000 //TX_A_POST_FILT_S_2 -317 0x3000 //TX_A_POST_FILT_S_3 -318 0x2000 //TX_A_POST_FILT_S_4 +317 0x2000 //TX_A_POST_FILT_S_3 +318 0x7000 //TX_A_POST_FILT_S_4 319 0x7000 //TX_A_POST_FILT_S_5 320 0x7000 //TX_A_POST_FILT_S_6 321 0x7000 //TX_A_POST_FILT_S_7 322 0x1000 //TX_B_POST_FILT_0 323 0x4000 //TX_B_POST_FILT_1 -324 0x5000 //TX_B_POST_FILT_2 +324 0x4000 //TX_B_POST_FILT_2 325 0x4000 //TX_B_POST_FILT_3 326 0x4000 //TX_B_POST_FILT_4 327 0x4000 //TX_B_POST_FILT_5 -328 0x4000 //TX_B_POST_FILT_6 +328 0x5000 //TX_B_POST_FILT_6 329 0x4000 //TX_B_POST_FILT_7 330 0x4000 //TX_B_LESSCUT_RTO_S_0 331 0x6000 //TX_B_LESSCUT_RTO_S_1 332 0x6000 //TX_B_LESSCUT_RTO_S_2 333 0x6000 //TX_B_LESSCUT_RTO_S_3 -334 0x6000 //TX_B_LESSCUT_RTO_S_4 +334 0x7FFF //TX_B_LESSCUT_RTO_S_4 335 0x6000 //TX_B_LESSCUT_RTO_S_5 -336 0x7FFF //TX_B_LESSCUT_RTO_S_6 +336 0x6000 //TX_B_LESSCUT_RTO_S_6 337 0x7FFF //TX_B_LESSCUT_RTO_S_7 338 0x7C29 //TX_LAMBDA_PFILT 339 0x7C29 //TX_LAMBDA_PFILT_S_0 @@ -21423,10 +32428,10 @@ 377 0x4E20 //TX_NOISE_TH_5_4 378 0x21E8 //TX_NOISE_TH_6 379 0x0014 //TX_MINENOISE_TH -380 0x4000 //TX_MINENOISE_MIC0_TH_MTS -381 0xFFEE //TX_MINENOISE_MIC0_TH_EXP -382 0x6000 //TX_MINENOISE_MIC0_S_TH_MTS -383 0xFFF3 //TX_MINENOISE_MIC0_S_TH_EXP +380 0xD508 //TX_MORENS_TFMASK_TH +381 0x0001 //TX_DRC_QUIET_FLOOR +382 0x6D60 //TX_RATIODTL_CUT_TH +383 0x0DAC //TX_DT_CUT_K1 384 0x00A5 //TX_OUT_ENER_S_TH_CLEAN 385 0x00A5 //TX_OUT_ENER_S_TH_LESSCLEAN 386 0x00A5 //TX_OUT_ENER_S_TH_NOISY @@ -21434,15 +32439,15 @@ 388 0x00CE //TX_OUT_ENER_TH_SPEECH 389 0x2000 //TX_SN_NPB_GAIN 390 0x0000 //TX_NN_NPB_GAIN -391 0x0000 //TX_CSX_ALPHA_0 -392 0x0000 //TX_CSX_ALPHA_1 -393 0x0000 //TX_CSX_ALPHA_2 -394 0x0000 //TX_CSX_ALPHA_3 -395 0x0800 //TX_MU_ARSP_EST -396 0x00C8 //TX_P_OUTBEAM_MIN_TH +391 0x3000 //TX_POST_MASK_SUP_HSNE +392 0x07D0 //TX_TAIL_DET_TH +393 0x4000 //TX_B_LESSCUT_RTO_WTA +394 0x0000 //TX_MEL_G_R +395 0x0080 //TX_SUPHIGH_TH +396 0x4000 //TX_MASK_G_R 397 0x0002 //TX_EXTRA_NS_L -398 0x0800 //TX_EXTRA_NS_A -399 0x0005 //TX_VR_NOISE_FLOOR_TH +398 0x1800 //TX_C_POST_FLT_MASK +399 0x7FFF //TX_A_POST_FLT_WNS 400 0x0148 //TX_MIN_G_LOW300HZ 401 0x0004 //TX_MAXLEVEL_CNG 402 0x00B4 //TX_STN_NOISE_TH @@ -21557,16 +32562,16 @@ 511 0x6666 //TX_MIC_TO_BFGAIN 512 0x0000 //TX_MICTOBFGAIN0 513 0x0000 //TX_FASTMUE_TH -514 0x0000 //TX_DERVB_LEN_0 -515 0x0000 //TX_DERVB_LEN_1 -516 0x0000 //TX_RHO_DERVB -517 0x0000 //TX_MIC_INDX_DERVB -518 0x0000 //TX_MU_DERVB -519 0x0000 //TX_DR_RESRV_0 -520 0x0000 //TX_DR_RESRV_1 -521 0x0000 //TX_DR_RESRV_2 -522 0x0000 //TX_DR_RESRV_3 -523 0x0000 //TX_DR_RESRV_4 +514 0x3000 //TX_DEREVERB_LF_MU +515 0x34CD //TX_DEREVERB_HF_MU +516 0x0007 //TX_DEREVERB_DELAY +517 0x0004 //TX_DEREVERB_COEF_LEN +518 0x0003 //TX_DEREVERB_DNR +519 0x0000 //TX_DEREVERB_ALPHA +520 0x0000 //TX_DEREVERB_BETA +521 0x0000 //TX_GSC_RTOL_TH +522 0x0000 //TX_GSC_RTOH_TH +523 0x7E2C //TX_WIDE2_MEANHTH 524 0x0000 //TX_DR_RESRV_5 525 0x0000 //TX_DR_RESRV_6 526 0x0000 //TX_DR_RESRV_7 @@ -21613,15 +32618,15 @@ 567 0x5C54 //TX_FDEQ_GAIN_0 568 0x5048 //TX_FDEQ_GAIN_1 569 0x4C4C //TX_FDEQ_GAIN_2 -570 0x4A4A //TX_FDEQ_GAIN_3 -571 0x4744 //TX_FDEQ_GAIN_4 -572 0x4241 //TX_FDEQ_GAIN_5 -573 0x3F3E //TX_FDEQ_GAIN_6 -574 0x4145 //TX_FDEQ_GAIN_7 +570 0x474A //TX_FDEQ_GAIN_3 +571 0x473F //TX_FDEQ_GAIN_4 +572 0x4245 //TX_FDEQ_GAIN_5 +573 0x4B53 //TX_FDEQ_GAIN_6 +574 0x564A //TX_FDEQ_GAIN_7 575 0x3D3A //TX_FDEQ_GAIN_8 576 0x3B3C //TX_FDEQ_GAIN_9 -577 0x3A35 //TX_FDEQ_GAIN_10 -578 0x3535 //TX_FDEQ_GAIN_11 +577 0x3C36 //TX_FDEQ_GAIN_10 +578 0x3636 //TX_FDEQ_GAIN_11 579 0x3D3E //TX_FDEQ_GAIN_12 580 0x4548 //TX_FDEQ_GAIN_13 581 0x4848 //TX_FDEQ_GAIN_14 @@ -21715,14 +32720,14 @@ 669 0x4848 //TX_PREEQ_GAIN_MIC1_3 670 0x4848 //TX_PREEQ_GAIN_MIC1_4 671 0x4848 //TX_PREEQ_GAIN_MIC1_5 -672 0x4848 //TX_PREEQ_GAIN_MIC1_6 -673 0x484A //TX_PREEQ_GAIN_MIC1_7 -674 0x4C4E //TX_PREEQ_GAIN_MIC1_8 -675 0x5054 //TX_PREEQ_GAIN_MIC1_9 -676 0x5658 //TX_PREEQ_GAIN_MIC1_10 -677 0x5C5C //TX_PREEQ_GAIN_MIC1_11 -678 0x5E64 //TX_PREEQ_GAIN_MIC1_12 -679 0x6464 //TX_PREEQ_GAIN_MIC1_13 +672 0x494A //TX_PREEQ_GAIN_MIC1_6 +673 0x4B4C //TX_PREEQ_GAIN_MIC1_7 +674 0x4D4E //TX_PREEQ_GAIN_MIC1_8 +675 0x5051 //TX_PREEQ_GAIN_MIC1_9 +676 0x5255 //TX_PREEQ_GAIN_MIC1_10 +677 0x585A //TX_PREEQ_GAIN_MIC1_11 +678 0x5C5F //TX_PREEQ_GAIN_MIC1_12 +679 0x636A //TX_PREEQ_GAIN_MIC1_13 680 0x4848 //TX_PREEQ_GAIN_MIC1_14 681 0x4848 //TX_PREEQ_GAIN_MIC1_15 682 0x4848 //TX_PREEQ_GAIN_MIC1_16 @@ -21746,7 +32751,7 @@ 700 0x0F10 //TX_PREEQ_BIN_MIC1_10 701 0x1011 //TX_PREEQ_BIN_MIC1_11 702 0x1104 //TX_PREEQ_BIN_MIC1_12 -703 0x1010 //TX_PREEQ_BIN_MIC1_13 +703 0x101B //TX_PREEQ_BIN_MIC1_13 704 0x0000 //TX_PREEQ_BIN_MIC1_14 705 0x0000 //TX_PREEQ_BIN_MIC1_15 706 0x0000 //TX_PREEQ_BIN_MIC1_16 @@ -21819,7 +32824,7 @@ 773 0x0000 //TX_GAIN_LIMIT_0 774 0x0000 //TX_GAIN_LIMIT_1 775 0x0006 //TX_GAIN_LIMIT_2 -776 0x0005 //TX_GAIN_LIMIT_3 +776 0x0007 //TX_GAIN_LIMIT_3 777 0x7F5B //TX_BVE_NOVAD0_ALPHADOWN 778 0x7FDE //TX_BVE_VAD0_ALPHAUP 779 0x7F3A //TX_BVE_VAD0_ALPHADOWN @@ -21940,8 +32945,73 @@ 894 0xC000 //TX_FASTNS_SSA_THHFL 895 0xCCCC //TX_FASTNS_SSA_THLFH 896 0xD999 //TX_FASTNS_SSA_THHFH +897 0x2339 //TX_SENDFUNC_REG_MICMUTE +898 0x0021 //TX_SENDFUNC_REG_MICMUTE1 +899 0x02BC //TX_MICMUTE_RATIO_THR +900 0x0140 //TX_MICMUTE_AMP_THR +901 0x0004 //TX_MICMUTE_HPF_IND +902 0x00C0 //TX_MICMUTE_LOG_EYR_TH +903 0x0008 //TX_MICMUTE_CVG_TIME +904 0x0008 //TX_MICMUTE_RELEASE_TIME +905 0x01FE //TX_MIC_VOLUME_MIC0MUTE +906 0x0020 //TX_MICMUTE_EPD_OFFSET_0 +907 0x001E //TX_MICMUTE_FRQ_AEC_L +908 0x7999 //TX_MICMUTE_EAD_THR +909 0x7FFF //TX_MICMUTE_LAMBDA_CB_NLE +910 0x7FFF //TX_MICMUTE_LAMBDA_RE_EST +911 0x4000 //TX_DTD_THR1_MICMUTE_0 +912 0x7000 //TX_DTD_THR1_MICMUTE_1 +913 0x7FFF //TX_DTD_THR1_MICMUTE_2 +914 0x7FFF //TX_DTD_THR1_MICMUTE_3 +915 0x6CCC //TX_DTD_THR2_MICMUTE_0 +916 0x0400 //TX_MICMUTE_MIN_EQ_RE_EST_0 +917 0x0400 //TX_MICMUTE_MIN_EQ_RE_EST_1 +918 0x1000 //TX_MICMUTE_MIN_EQ_RE_EST_2 +919 0x7FFF //TX_MICMUTE_MIN_EQ_RE_EST_3 +920 0x7FFF //TX_MICMUTE_MIN_EQ_RE_EST_4 +921 0x4000 //TX_MICMUTE_C_POST_FLT +922 0x03E8 //TX_MICMUTE_DT_CUT_K +923 0x0001 //TX_MICMUTE_DT_CUT_THR +924 0x03E8 //TX_MICMUTE_DT_CUT_K2 +925 0x0001 //TX_MICMUTE_DT_CUT_THR2 +926 0x0064 //TX_MICMUTE_DT2_HOLD_N +927 0x1000 //TX_MICMUTE_RATIODTH_THCUT +928 0x1000 //TX_MICMUTE_B_POST_FLT_ECHOL +929 0x7FFF //TX_MICMUTE_B_POST_FLT_ECHOH +930 0x0400 //TX_MICMUTE_C_POST_FLT_MASK +931 0x7999 //TX_MICMUTE_RATIODTL_CUT_TH +932 0x0258 //TX_MICMUTE_DT_CUT_K1 +933 0x0800 //TX_MICMUTE_N2_SN_EST +934 0xFC00 //TX_MICMUTE_THR_SN_EST_0 +935 0x001C //TX_MICMUTE_MIN_G_CTRL_0 +936 0x6000 //TX_MICMUTE_A_POST_FILT_S_0 +937 0x7000 //TX_MICMUTE_B_POST_FILT_0 +938 0x2710 //TX_MIC1RUB_AMP_THR +939 0x0010 //TX_MIC1MUTE_RATIO_THR +940 0x0450 //TX_MIC1MUTE_AMP_THR +941 0x0008 //TX_MIC1MUTE_CVG_TIME +942 0x0008 //TX_MIC1MUTE_RELEASE_TIME +943 0x0000 //TX_AMS_RESRV_01 +944 0x0000 //TX_AMS_RESRV_02 +945 0x0000 //TX_AMS_RESRV_03 +946 0x0000 //TX_AMS_RESRV_04 +947 0x0000 //TX_AMS_RESRV_05 +948 0x0000 //TX_AMS_RESRV_06 +949 0x0000 //TX_AMS_RESRV_07 +950 0x0000 //TX_AMS_RESRV_08 +951 0x0000 //TX_AMS_RESRV_09 +952 0x0000 //TX_AMS_RESRV_10 +953 0x0000 //TX_AMS_RESRV_11 +954 0x0000 //TX_AMS_RESRV_12 +955 0x0000 //TX_AMS_RESRV_13 +956 0x0000 //TX_AMS_RESRV_14 +957 0x0000 //TX_AMS_RESRV_15 +958 0x0000 //TX_AMS_RESRV_16 +959 0x0000 //TX_AMS_RESRV_17 +960 0x0000 //TX_AMS_RESRV_18 +961 0x0000 //TX_AMS_RESRV_19 #RX -0 0x003C //RX_RECVFUNC_MODE_0 +0 0x203C //RX_RECVFUNC_MODE_0 1 0x0000 //RX_RECVFUNC_MODE_1 2 0x0001 //RX_SAMPLINGFREQ_SIG 3 0x0001 //RX_SAMPLINGFREQ_PROC @@ -21982,18 +33052,18 @@ 38 0x001C //RX_FDEQ_SUBNUM 39 0x4840 //RX_FDEQ_GAIN_0 40 0x4040 //RX_FDEQ_GAIN_1 -41 0x4149 //RX_FDEQ_GAIN_2 -42 0x5461 //RX_FDEQ_GAIN_3 -43 0x7282 //RX_FDEQ_GAIN_4 -44 0x8084 //RX_FDEQ_GAIN_5 -45 0x8785 //RX_FDEQ_GAIN_6 -46 0x8780 //RX_FDEQ_GAIN_7 -47 0x7A79 //RX_FDEQ_GAIN_8 -48 0x7583 //RX_FDEQ_GAIN_9 -49 0x877D //RX_FDEQ_GAIN_10 -50 0x6F69 //RX_FDEQ_GAIN_11 -51 0x5E56 //RX_FDEQ_GAIN_12 -52 0x5556 //RX_FDEQ_GAIN_13 +41 0x4655 //RX_FDEQ_GAIN_2 +42 0x606C //RX_FDEQ_GAIN_3 +43 0x7276 //RX_FDEQ_GAIN_4 +44 0x7A7A //RX_FDEQ_GAIN_5 +45 0x7D81 //RX_FDEQ_GAIN_6 +46 0x8786 //RX_FDEQ_GAIN_7 +47 0x8C8C //RX_FDEQ_GAIN_8 +48 0x8A94 //RX_FDEQ_GAIN_9 +49 0x9684 //RX_FDEQ_GAIN_10 +50 0x7A8A //RX_FDEQ_GAIN_11 +51 0x7068 //RX_FDEQ_GAIN_12 +52 0x6050 //RX_FDEQ_GAIN_13 53 0x4848 //RX_FDEQ_GAIN_14 54 0x4848 //RX_FDEQ_GAIN_15 55 0x4848 //RX_FDEQ_GAIN_16 @@ -22015,7 +33085,7 @@ 71 0x0B0C //RX_FDEQ_BIN_8 72 0x0D0E //RX_FDEQ_BIN_9 73 0x0E0F //RX_FDEQ_BIN_10 -74 0x0F0E //RX_FDEQ_BIN_11 +74 0x0815 //RX_FDEQ_BIN_11 75 0x100D //RX_FDEQ_BIN_12 76 0x110A //RX_FDEQ_BIN_13 77 0x0000 //RX_FDEQ_BIN_14 @@ -22065,12 +33135,12 @@ 121 0x199A //RX_TDDRC_HMNC_GAIN 122 0x0001 //RX_TDDRC_SMT_FLAG 123 0x0CCD //RX_TDDRC_SMT_W -124 0x03AA //RX_TDDRC_DRC_GAIN +124 0x04E6 //RX_TDDRC_DRC_GAIN 125 0x7C00 //RX_LAMBDA_PKA_FP 126 0x13E0 //RX_TPKA_FP 127 0x0080 //RX_MIN_G_FP 128 0x2000 //RX_MAX_G_FP -129 0x000E //RX_SPK_VOL +129 0x0034 //RX_SPK_VOL 130 0x0000 //RX_VOL_RESRV_0 131 0x0000 //RX_MAXLEVEL_CNG 132 0x3000 //RX_BWE_UV_TH @@ -22121,22 +33191,22 @@ 121 0x199A //RX_TDDRC_HMNC_GAIN 122 0x0001 //RX_TDDRC_SMT_FLAG 123 0x0CCD //RX_TDDRC_SMT_W -124 0x03AA //RX_TDDRC_DRC_GAIN +124 0x04E6 //RX_TDDRC_DRC_GAIN 38 0x001C //RX_FDEQ_SUBNUM 39 0x4840 //RX_FDEQ_GAIN_0 40 0x4040 //RX_FDEQ_GAIN_1 -41 0x4149 //RX_FDEQ_GAIN_2 -42 0x5461 //RX_FDEQ_GAIN_3 -43 0x7282 //RX_FDEQ_GAIN_4 -44 0x8084 //RX_FDEQ_GAIN_5 -45 0x8785 //RX_FDEQ_GAIN_6 -46 0x8780 //RX_FDEQ_GAIN_7 -47 0x7A79 //RX_FDEQ_GAIN_8 -48 0x7583 //RX_FDEQ_GAIN_9 -49 0x877D //RX_FDEQ_GAIN_10 -50 0x6F69 //RX_FDEQ_GAIN_11 -51 0x5E56 //RX_FDEQ_GAIN_12 -52 0x5556 //RX_FDEQ_GAIN_13 +41 0x4655 //RX_FDEQ_GAIN_2 +42 0x606C //RX_FDEQ_GAIN_3 +43 0x7276 //RX_FDEQ_GAIN_4 +44 0x7A7A //RX_FDEQ_GAIN_5 +45 0x7D81 //RX_FDEQ_GAIN_6 +46 0x8786 //RX_FDEQ_GAIN_7 +47 0x8C8C //RX_FDEQ_GAIN_8 +48 0x8A94 //RX_FDEQ_GAIN_9 +49 0x9684 //RX_FDEQ_GAIN_10 +50 0x7A8A //RX_FDEQ_GAIN_11 +51 0x7068 //RX_FDEQ_GAIN_12 +52 0x6050 //RX_FDEQ_GAIN_13 53 0x4848 //RX_FDEQ_GAIN_14 54 0x4848 //RX_FDEQ_GAIN_15 55 0x4848 //RX_FDEQ_GAIN_16 @@ -22158,7 +33228,7 @@ 71 0x0B0C //RX_FDEQ_BIN_8 72 0x0D0E //RX_FDEQ_BIN_9 73 0x0E0F //RX_FDEQ_BIN_10 -74 0x0F0E //RX_FDEQ_BIN_11 +74 0x0815 //RX_FDEQ_BIN_11 75 0x100D //RX_FDEQ_BIN_12 76 0x110A //RX_FDEQ_BIN_13 77 0x0000 //RX_FDEQ_BIN_14 @@ -22195,7 +33265,7 @@ 108 0x5333 //RX_FDDRC_SLANT_1_2 109 0x5333 //RX_FDDRC_SLANT_1_3 110 0x0000 //RX_FDDRC_RESRV_0 -129 0x000E //RX_SPK_VOL +129 0x000B //RX_SPK_VOL 130 0x0000 //RX_VOL_RESRV_0 #VOL 1 6 0x1000 //RX_TDDRC_ALPHA_UP_1 @@ -22220,22 +33290,22 @@ 121 0x199A //RX_TDDRC_HMNC_GAIN 122 0x0001 //RX_TDDRC_SMT_FLAG 123 0x0CCD //RX_TDDRC_SMT_W -124 0x03B8 //RX_TDDRC_DRC_GAIN +124 0x04E6 //RX_TDDRC_DRC_GAIN 38 0x001C //RX_FDEQ_SUBNUM 39 0x4840 //RX_FDEQ_GAIN_0 40 0x4040 //RX_FDEQ_GAIN_1 -41 0x4149 //RX_FDEQ_GAIN_2 -42 0x5461 //RX_FDEQ_GAIN_3 -43 0x7282 //RX_FDEQ_GAIN_4 -44 0x8084 //RX_FDEQ_GAIN_5 -45 0x8785 //RX_FDEQ_GAIN_6 -46 0x8780 //RX_FDEQ_GAIN_7 -47 0x7A79 //RX_FDEQ_GAIN_8 -48 0x7583 //RX_FDEQ_GAIN_9 -49 0x877D //RX_FDEQ_GAIN_10 -50 0x6F69 //RX_FDEQ_GAIN_11 -51 0x5E56 //RX_FDEQ_GAIN_12 -52 0x5556 //RX_FDEQ_GAIN_13 +41 0x4655 //RX_FDEQ_GAIN_2 +42 0x606C //RX_FDEQ_GAIN_3 +43 0x7276 //RX_FDEQ_GAIN_4 +44 0x7A7A //RX_FDEQ_GAIN_5 +45 0x7D81 //RX_FDEQ_GAIN_6 +46 0x8786 //RX_FDEQ_GAIN_7 +47 0x8C8C //RX_FDEQ_GAIN_8 +48 0x8A94 //RX_FDEQ_GAIN_9 +49 0x9684 //RX_FDEQ_GAIN_10 +50 0x7A8A //RX_FDEQ_GAIN_11 +51 0x7068 //RX_FDEQ_GAIN_12 +52 0x6050 //RX_FDEQ_GAIN_13 53 0x4848 //RX_FDEQ_GAIN_14 54 0x4848 //RX_FDEQ_GAIN_15 55 0x4848 //RX_FDEQ_GAIN_16 @@ -22257,7 +33327,7 @@ 71 0x0B0C //RX_FDEQ_BIN_8 72 0x0D0E //RX_FDEQ_BIN_9 73 0x0E0F //RX_FDEQ_BIN_10 -74 0x0F0E //RX_FDEQ_BIN_11 +74 0x0815 //RX_FDEQ_BIN_11 75 0x100D //RX_FDEQ_BIN_12 76 0x110A //RX_FDEQ_BIN_13 77 0x0000 //RX_FDEQ_BIN_14 @@ -22294,7 +33364,7 @@ 108 0x5333 //RX_FDDRC_SLANT_1_2 109 0x5333 //RX_FDDRC_SLANT_1_3 110 0x0000 //RX_FDDRC_RESRV_0 -129 0x0016 //RX_SPK_VOL +129 0x0012 //RX_SPK_VOL 130 0x0000 //RX_VOL_RESRV_0 #VOL 2 6 0x1000 //RX_TDDRC_ALPHA_UP_1 @@ -22319,22 +33389,22 @@ 121 0x199A //RX_TDDRC_HMNC_GAIN 122 0x0001 //RX_TDDRC_SMT_FLAG 123 0x0CCD //RX_TDDRC_SMT_W -124 0x03B8 //RX_TDDRC_DRC_GAIN +124 0x04E6 //RX_TDDRC_DRC_GAIN 38 0x001C //RX_FDEQ_SUBNUM 39 0x4840 //RX_FDEQ_GAIN_0 40 0x4040 //RX_FDEQ_GAIN_1 -41 0x4149 //RX_FDEQ_GAIN_2 -42 0x5461 //RX_FDEQ_GAIN_3 -43 0x7282 //RX_FDEQ_GAIN_4 -44 0x8084 //RX_FDEQ_GAIN_5 -45 0x8785 //RX_FDEQ_GAIN_6 -46 0x8780 //RX_FDEQ_GAIN_7 -47 0x7A79 //RX_FDEQ_GAIN_8 -48 0x7583 //RX_FDEQ_GAIN_9 -49 0x877D //RX_FDEQ_GAIN_10 -50 0x6F69 //RX_FDEQ_GAIN_11 -51 0x5E56 //RX_FDEQ_GAIN_12 -52 0x5556 //RX_FDEQ_GAIN_13 +41 0x4655 //RX_FDEQ_GAIN_2 +42 0x606C //RX_FDEQ_GAIN_3 +43 0x7276 //RX_FDEQ_GAIN_4 +44 0x7A7A //RX_FDEQ_GAIN_5 +45 0x7D81 //RX_FDEQ_GAIN_6 +46 0x8786 //RX_FDEQ_GAIN_7 +47 0x8C8C //RX_FDEQ_GAIN_8 +48 0x8A94 //RX_FDEQ_GAIN_9 +49 0x9684 //RX_FDEQ_GAIN_10 +50 0x7A8A //RX_FDEQ_GAIN_11 +51 0x7068 //RX_FDEQ_GAIN_12 +52 0x6050 //RX_FDEQ_GAIN_13 53 0x4848 //RX_FDEQ_GAIN_14 54 0x4848 //RX_FDEQ_GAIN_15 55 0x4848 //RX_FDEQ_GAIN_16 @@ -22356,7 +33426,7 @@ 71 0x0B0C //RX_FDEQ_BIN_8 72 0x0D0E //RX_FDEQ_BIN_9 73 0x0E0F //RX_FDEQ_BIN_10 -74 0x0F0E //RX_FDEQ_BIN_11 +74 0x0815 //RX_FDEQ_BIN_11 75 0x100D //RX_FDEQ_BIN_12 76 0x110A //RX_FDEQ_BIN_13 77 0x0000 //RX_FDEQ_BIN_14 @@ -22393,7 +33463,7 @@ 108 0x5333 //RX_FDDRC_SLANT_1_2 109 0x5333 //RX_FDDRC_SLANT_1_3 110 0x0000 //RX_FDDRC_RESRV_0 -129 0x0023 //RX_SPK_VOL +129 0x001E //RX_SPK_VOL 130 0x0000 //RX_VOL_RESRV_0 #VOL 3 6 0x1000 //RX_TDDRC_ALPHA_UP_1 @@ -22418,22 +33488,22 @@ 121 0x199A //RX_TDDRC_HMNC_GAIN 122 0x0001 //RX_TDDRC_SMT_FLAG 123 0x0CCD //RX_TDDRC_SMT_W -124 0x03B8 //RX_TDDRC_DRC_GAIN +124 0x04E6 //RX_TDDRC_DRC_GAIN 38 0x001C //RX_FDEQ_SUBNUM 39 0x4840 //RX_FDEQ_GAIN_0 40 0x4040 //RX_FDEQ_GAIN_1 -41 0x4149 //RX_FDEQ_GAIN_2 -42 0x5461 //RX_FDEQ_GAIN_3 -43 0x7282 //RX_FDEQ_GAIN_4 -44 0x8084 //RX_FDEQ_GAIN_5 -45 0x8785 //RX_FDEQ_GAIN_6 -46 0x8780 //RX_FDEQ_GAIN_7 -47 0x7A79 //RX_FDEQ_GAIN_8 -48 0x7583 //RX_FDEQ_GAIN_9 -49 0x877D //RX_FDEQ_GAIN_10 -50 0x6F69 //RX_FDEQ_GAIN_11 -51 0x5E56 //RX_FDEQ_GAIN_12 -52 0x5556 //RX_FDEQ_GAIN_13 +41 0x4655 //RX_FDEQ_GAIN_2 +42 0x606C //RX_FDEQ_GAIN_3 +43 0x7276 //RX_FDEQ_GAIN_4 +44 0x7A7A //RX_FDEQ_GAIN_5 +45 0x7D81 //RX_FDEQ_GAIN_6 +46 0x8786 //RX_FDEQ_GAIN_7 +47 0x8C8C //RX_FDEQ_GAIN_8 +48 0x8A94 //RX_FDEQ_GAIN_9 +49 0x9684 //RX_FDEQ_GAIN_10 +50 0x7A8A //RX_FDEQ_GAIN_11 +51 0x7068 //RX_FDEQ_GAIN_12 +52 0x6050 //RX_FDEQ_GAIN_13 53 0x4848 //RX_FDEQ_GAIN_14 54 0x4848 //RX_FDEQ_GAIN_15 55 0x4848 //RX_FDEQ_GAIN_16 @@ -22455,7 +33525,7 @@ 71 0x0B0C //RX_FDEQ_BIN_8 72 0x0D0E //RX_FDEQ_BIN_9 73 0x0E0F //RX_FDEQ_BIN_10 -74 0x0F0E //RX_FDEQ_BIN_11 +74 0x0815 //RX_FDEQ_BIN_11 75 0x100D //RX_FDEQ_BIN_12 76 0x110A //RX_FDEQ_BIN_13 77 0x0000 //RX_FDEQ_BIN_14 @@ -22492,7 +33562,7 @@ 108 0x5333 //RX_FDDRC_SLANT_1_2 109 0x5333 //RX_FDDRC_SLANT_1_3 110 0x0000 //RX_FDDRC_RESRV_0 -129 0x0038 //RX_SPK_VOL +129 0x0034 //RX_SPK_VOL 130 0x0000 //RX_VOL_RESRV_0 #VOL 4 6 0x1000 //RX_TDDRC_ALPHA_UP_1 @@ -22517,22 +33587,22 @@ 121 0x199A //RX_TDDRC_HMNC_GAIN 122 0x0001 //RX_TDDRC_SMT_FLAG 123 0x0CCD //RX_TDDRC_SMT_W -124 0x03B8 //RX_TDDRC_DRC_GAIN +124 0x04E6 //RX_TDDRC_DRC_GAIN 38 0x001C //RX_FDEQ_SUBNUM 39 0x4840 //RX_FDEQ_GAIN_0 40 0x4040 //RX_FDEQ_GAIN_1 -41 0x4149 //RX_FDEQ_GAIN_2 -42 0x5461 //RX_FDEQ_GAIN_3 -43 0x7282 //RX_FDEQ_GAIN_4 -44 0x8084 //RX_FDEQ_GAIN_5 -45 0x8785 //RX_FDEQ_GAIN_6 -46 0x8780 //RX_FDEQ_GAIN_7 -47 0x7A79 //RX_FDEQ_GAIN_8 -48 0x7583 //RX_FDEQ_GAIN_9 -49 0x877D //RX_FDEQ_GAIN_10 -50 0x6F69 //RX_FDEQ_GAIN_11 -51 0x5E56 //RX_FDEQ_GAIN_12 -52 0x5556 //RX_FDEQ_GAIN_13 +41 0x4655 //RX_FDEQ_GAIN_2 +42 0x606C //RX_FDEQ_GAIN_3 +43 0x7276 //RX_FDEQ_GAIN_4 +44 0x7A7A //RX_FDEQ_GAIN_5 +45 0x7D81 //RX_FDEQ_GAIN_6 +46 0x8786 //RX_FDEQ_GAIN_7 +47 0x8C8C //RX_FDEQ_GAIN_8 +48 0x8A94 //RX_FDEQ_GAIN_9 +49 0x9684 //RX_FDEQ_GAIN_10 +50 0x7A8A //RX_FDEQ_GAIN_11 +51 0x7068 //RX_FDEQ_GAIN_12 +52 0x6050 //RX_FDEQ_GAIN_13 53 0x4848 //RX_FDEQ_GAIN_14 54 0x4848 //RX_FDEQ_GAIN_15 55 0x4848 //RX_FDEQ_GAIN_16 @@ -22554,7 +33624,7 @@ 71 0x0B0C //RX_FDEQ_BIN_8 72 0x0D0E //RX_FDEQ_BIN_9 73 0x0E0F //RX_FDEQ_BIN_10 -74 0x0F0E //RX_FDEQ_BIN_11 +74 0x0815 //RX_FDEQ_BIN_11 75 0x100D //RX_FDEQ_BIN_12 76 0x110A //RX_FDEQ_BIN_13 77 0x0000 //RX_FDEQ_BIN_14 @@ -22591,7 +33661,7 @@ 108 0x5333 //RX_FDDRC_SLANT_1_2 109 0x5333 //RX_FDDRC_SLANT_1_3 110 0x0000 //RX_FDDRC_RESRV_0 -129 0x005A //RX_SPK_VOL +129 0x0050 //RX_SPK_VOL 130 0x0000 //RX_VOL_RESRV_0 #VOL 5 6 0x1000 //RX_TDDRC_ALPHA_UP_1 @@ -22616,22 +33686,22 @@ 121 0x199A //RX_TDDRC_HMNC_GAIN 122 0x0001 //RX_TDDRC_SMT_FLAG 123 0x0CCD //RX_TDDRC_SMT_W -124 0x03B8 //RX_TDDRC_DRC_GAIN +124 0x04E6 //RX_TDDRC_DRC_GAIN 38 0x001C //RX_FDEQ_SUBNUM 39 0x4840 //RX_FDEQ_GAIN_0 40 0x4040 //RX_FDEQ_GAIN_1 -41 0x4149 //RX_FDEQ_GAIN_2 -42 0x5461 //RX_FDEQ_GAIN_3 -43 0x7282 //RX_FDEQ_GAIN_4 -44 0x8084 //RX_FDEQ_GAIN_5 -45 0x8785 //RX_FDEQ_GAIN_6 -46 0x8780 //RX_FDEQ_GAIN_7 -47 0x7A79 //RX_FDEQ_GAIN_8 -48 0x7583 //RX_FDEQ_GAIN_9 -49 0x877D //RX_FDEQ_GAIN_10 -50 0x6F69 //RX_FDEQ_GAIN_11 -51 0x5E56 //RX_FDEQ_GAIN_12 -52 0x5556 //RX_FDEQ_GAIN_13 +41 0x4655 //RX_FDEQ_GAIN_2 +42 0x606C //RX_FDEQ_GAIN_3 +43 0x7276 //RX_FDEQ_GAIN_4 +44 0x7A7A //RX_FDEQ_GAIN_5 +45 0x7D81 //RX_FDEQ_GAIN_6 +46 0x8786 //RX_FDEQ_GAIN_7 +47 0x8C8C //RX_FDEQ_GAIN_8 +48 0x8A94 //RX_FDEQ_GAIN_9 +49 0x9684 //RX_FDEQ_GAIN_10 +50 0x7A8A //RX_FDEQ_GAIN_11 +51 0x7068 //RX_FDEQ_GAIN_12 +52 0x6050 //RX_FDEQ_GAIN_13 53 0x4848 //RX_FDEQ_GAIN_14 54 0x4848 //RX_FDEQ_GAIN_15 55 0x4848 //RX_FDEQ_GAIN_16 @@ -22653,7 +33723,7 @@ 71 0x0B0C //RX_FDEQ_BIN_8 72 0x0D0E //RX_FDEQ_BIN_9 73 0x0E0F //RX_FDEQ_BIN_10 -74 0x0F0E //RX_FDEQ_BIN_11 +74 0x0815 //RX_FDEQ_BIN_11 75 0x100D //RX_FDEQ_BIN_12 76 0x110A //RX_FDEQ_BIN_13 77 0x0000 //RX_FDEQ_BIN_14 @@ -22690,7 +33760,7 @@ 108 0x5333 //RX_FDDRC_SLANT_1_2 109 0x5333 //RX_FDDRC_SLANT_1_3 110 0x0000 //RX_FDDRC_RESRV_0 -129 0x0090 //RX_SPK_VOL +129 0x0086 //RX_SPK_VOL 130 0x0000 //RX_VOL_RESRV_0 #VOL 6 6 0x1000 //RX_TDDRC_ALPHA_UP_1 @@ -22715,22 +33785,22 @@ 121 0x199A //RX_TDDRC_HMNC_GAIN 122 0x0001 //RX_TDDRC_SMT_FLAG 123 0x0CCD //RX_TDDRC_SMT_W -124 0x03B8 //RX_TDDRC_DRC_GAIN +124 0x04E6 //RX_TDDRC_DRC_GAIN 38 0x001C //RX_FDEQ_SUBNUM 39 0x4840 //RX_FDEQ_GAIN_0 40 0x4040 //RX_FDEQ_GAIN_1 -41 0x4149 //RX_FDEQ_GAIN_2 -42 0x5461 //RX_FDEQ_GAIN_3 -43 0x7282 //RX_FDEQ_GAIN_4 -44 0x8084 //RX_FDEQ_GAIN_5 -45 0x8785 //RX_FDEQ_GAIN_6 -46 0x8780 //RX_FDEQ_GAIN_7 -47 0x7A79 //RX_FDEQ_GAIN_8 -48 0x7583 //RX_FDEQ_GAIN_9 -49 0x877D //RX_FDEQ_GAIN_10 -50 0x6F69 //RX_FDEQ_GAIN_11 -51 0x5E56 //RX_FDEQ_GAIN_12 -52 0x5556 //RX_FDEQ_GAIN_13 +41 0x4655 //RX_FDEQ_GAIN_2 +42 0x606C //RX_FDEQ_GAIN_3 +43 0x7276 //RX_FDEQ_GAIN_4 +44 0x7A7A //RX_FDEQ_GAIN_5 +45 0x7D81 //RX_FDEQ_GAIN_6 +46 0x8786 //RX_FDEQ_GAIN_7 +47 0x8C8C //RX_FDEQ_GAIN_8 +48 0x8A94 //RX_FDEQ_GAIN_9 +49 0x9684 //RX_FDEQ_GAIN_10 +50 0x7A8A //RX_FDEQ_GAIN_11 +51 0x7068 //RX_FDEQ_GAIN_12 +52 0x6050 //RX_FDEQ_GAIN_13 53 0x4848 //RX_FDEQ_GAIN_14 54 0x4848 //RX_FDEQ_GAIN_15 55 0x4848 //RX_FDEQ_GAIN_16 @@ -22752,7 +33822,7 @@ 71 0x0B0C //RX_FDEQ_BIN_8 72 0x0D0E //RX_FDEQ_BIN_9 73 0x0E0F //RX_FDEQ_BIN_10 -74 0x0F0E //RX_FDEQ_BIN_11 +74 0x0815 //RX_FDEQ_BIN_11 75 0x100D //RX_FDEQ_BIN_12 76 0x110A //RX_FDEQ_BIN_13 77 0x0000 //RX_FDEQ_BIN_14 @@ -22791,14 +33861,866 @@ 110 0x0000 //RX_FDDRC_RESRV_0 129 0x0100 //RX_SPK_VOL 130 0x0000 //RX_VOL_RESRV_0 +#RX 2 +157 0x003C //RX_RECVFUNC_MODE_0 +158 0x0000 //RX_RECVFUNC_MODE_1 +159 0x0001 //RX_SAMPLINGFREQ_SIG +160 0x0001 //RX_SAMPLINGFREQ_PROC +161 0x000A //RX_FRAME_SZ +162 0x0000 //RX_DELAY_OPT +163 0x1000 //RX_TDDRC_ALPHA_UP_1 +164 0x1000 //RX_TDDRC_ALPHA_UP_2 +165 0x1000 //RX_TDDRC_ALPHA_UP_3 +166 0x1000 //RX_TDDRC_ALPHA_UP_4 +167 0x0600 //RX_PGA +168 0x7FFF //RX_A_HP +169 0x4000 //RX_B_PE +170 0x7800 //RX_THR_PITCH_DET_0 +171 0x7000 //RX_THR_PITCH_DET_1 +172 0x6000 //RX_THR_PITCH_DET_2 +173 0x0008 //RX_PITCH_BFR_LEN +174 0x0003 //RX_SBD_PITCH_DET +175 0x0100 //RX_PP_RESRV_0 +176 0x0020 //RX_PP_RESRV_1 +177 0x0400 //RX_N_SN_EST +178 0x000C //RX_N2_SN_EST +179 0x0014 //RX_NS_LVL_CTRL +180 0xF800 //RX_THR_SN_EST +181 0x7E00 //RX_LAMBDA_PFILT +182 0x000A //RX_FENS_RESRV_0 +183 0x0190 //RX_FENS_RESRV_1 +184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +187 0x0002 //RX_EXTRA_NS_L +188 0x0800 //RX_EXTRA_NS_A +189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +190 0x7000 //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +192 0x199A //RX_A_POST_FLT +193 0x1000 //RX_LMT_THRD +194 0x7FDF //RX_LMT_ALPHA +195 0x001C //RX_FDEQ_SUBNUM +196 0x4840 //RX_FDEQ_GAIN_0 +197 0x4040 //RX_FDEQ_GAIN_1 +198 0x4659 //RX_FDEQ_GAIN_2 +199 0x6474 //RX_FDEQ_GAIN_3 +200 0x7A82 //RX_FDEQ_GAIN_4 +201 0x8180 //RX_FDEQ_GAIN_5 +202 0x8084 //RX_FDEQ_GAIN_6 +203 0x8A88 //RX_FDEQ_GAIN_7 +204 0x8C8C //RX_FDEQ_GAIN_8 +205 0x8A95 //RX_FDEQ_GAIN_9 +206 0x978E //RX_FDEQ_GAIN_10 +207 0x8C8C //RX_FDEQ_GAIN_11 +208 0x7068 //RX_FDEQ_GAIN_12 +209 0x6050 //RX_FDEQ_GAIN_13 +210 0x4848 //RX_FDEQ_GAIN_14 +211 0x4848 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0202 //RX_FDEQ_BIN_0 +221 0x0203 //RX_FDEQ_BIN_1 +222 0x0303 //RX_FDEQ_BIN_2 +223 0x0304 //RX_FDEQ_BIN_3 +224 0x0405 //RX_FDEQ_BIN_4 +225 0x0506 //RX_FDEQ_BIN_5 +226 0x0708 //RX_FDEQ_BIN_6 +227 0x090A //RX_FDEQ_BIN_7 +228 0x0B0C //RX_FDEQ_BIN_8 +229 0x0D0E //RX_FDEQ_BIN_9 +230 0x0E0F //RX_FDEQ_BIN_10 +231 0x0F0E //RX_FDEQ_BIN_11 +232 0x100D //RX_FDEQ_BIN_12 +233 0x110A //RX_FDEQ_BIN_13 +234 0x0000 //RX_FDEQ_BIN_14 +235 0x0000 //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x4000 //RX_FDEQ_RESRV_0 +245 0x0320 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0030 //RX_FDDRC_BAND_MARGIN_1 +248 0x0050 //RX_FDDRC_BAND_MARGIN_2 +249 0x0080 //RX_FDDRC_BAND_MARGIN_3 +250 0x0007 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x5000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x6400 //RX_FDDRC_THRD_3_2 +258 0x6400 //RX_FDDRC_THRD_3_3 +259 0x2000 //RX_FDDRC_SLANT_0_0 +260 0x2000 //RX_FDDRC_SLANT_0_1 +261 0x2000 //RX_FDDRC_SLANT_0_2 +262 0x2000 //RX_FDDRC_SLANT_0_3 +263 0x5333 //RX_FDDRC_SLANT_1_0 +264 0x5333 //RX_FDDRC_SLANT_1_1 +265 0x5333 //RX_FDDRC_SLANT_1_2 +266 0x5333 //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +268 0x0002 //RX_FILTINDX +269 0x0000 //RX_TDDRC_THRD_0 +270 0x0000 //RX_TDDRC_THRD_1 +271 0x1800 //RX_TDDRC_THRD_2 +272 0x1800 //RX_TDDRC_THRD_3 +273 0x3000 //RX_TDDRC_SLANT_0 +274 0x6E00 //RX_TDDRC_SLANT_1 +275 0x1000 //RX_TDDRC_ALPHA_UP_0 +276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x199A //RX_TDDRC_HMNC_GAIN +279 0x0001 //RX_TDDRC_SMT_FLAG +280 0x0CCD //RX_TDDRC_SMT_W +281 0x04E6 //RX_TDDRC_DRC_GAIN +282 0x7C00 //RX_LAMBDA_PKA_FP +283 0x13E0 //RX_TPKA_FP +284 0x0080 //RX_MIN_G_FP +285 0x2000 //RX_MAX_G_FP +286 0x000B //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 +288 0x0000 //RX_MAXLEVEL_CNG +289 0x3000 //RX_BWE_UV_TH +290 0x3000 //RX_BWE_UV_TH2 +291 0x1800 //RX_BWE_UV_TH3 +292 0x1000 //RX_BWE_V_TH +293 0x04CD //RX_BWE_GAIN1_V_TH1 +294 0x0F33 //RX_BWE_GAIN1_V_TH2 +295 0x7333 //RX_BWE_UV_EQ +296 0x199A //RX_BWE_V_EQ +297 0x7333 //RX_BWE_TONE_TH +298 0x0004 //RX_BWE_UV_HOLD_T +299 0x6CCD //RX_BWE_GAIN2_ALPHA +300 0x799A //RX_BWE_GAIN3_ALPHA +301 0x001E //RX_BWE_CUTOFF +302 0x3000 //RX_BWE_GAINFILL +303 0x3200 //RX_BWE_MAXTH_TONE +304 0x2000 //RX_BWE_EQ_0 +305 0x2000 //RX_BWE_EQ_1 +306 0x2000 //RX_BWE_EQ_2 +307 0x2000 //RX_BWE_EQ_3 +308 0x2000 //RX_BWE_EQ_4 +309 0x2000 //RX_BWE_EQ_5 +310 0x2000 //RX_BWE_EQ_6 +311 0x0000 //RX_BWE_RESRV_0 +312 0x0000 //RX_BWE_RESRV_1 +313 0x0000 //RX_BWE_RESRV_2 +#VOL 0 +163 0x1000 //RX_TDDRC_ALPHA_UP_1 +164 0x1000 //RX_TDDRC_ALPHA_UP_2 +165 0x1000 //RX_TDDRC_ALPHA_UP_3 +166 0x1000 //RX_TDDRC_ALPHA_UP_4 +184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +190 0x7000 //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +269 0x0000 //RX_TDDRC_THRD_0 +270 0x0000 //RX_TDDRC_THRD_1 +271 0x1800 //RX_TDDRC_THRD_2 +272 0x1800 //RX_TDDRC_THRD_3 +273 0x3000 //RX_TDDRC_SLANT_0 +274 0x6E00 //RX_TDDRC_SLANT_1 +275 0x1000 //RX_TDDRC_ALPHA_UP_0 +276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x199A //RX_TDDRC_HMNC_GAIN +279 0x0001 //RX_TDDRC_SMT_FLAG +280 0x0CCD //RX_TDDRC_SMT_W +281 0x04E6 //RX_TDDRC_DRC_GAIN +195 0x001C //RX_FDEQ_SUBNUM +196 0x4840 //RX_FDEQ_GAIN_0 +197 0x4040 //RX_FDEQ_GAIN_1 +198 0x4659 //RX_FDEQ_GAIN_2 +199 0x6474 //RX_FDEQ_GAIN_3 +200 0x7A82 //RX_FDEQ_GAIN_4 +201 0x8180 //RX_FDEQ_GAIN_5 +202 0x8084 //RX_FDEQ_GAIN_6 +203 0x8A88 //RX_FDEQ_GAIN_7 +204 0x8C8C //RX_FDEQ_GAIN_8 +205 0x8A95 //RX_FDEQ_GAIN_9 +206 0x978E //RX_FDEQ_GAIN_10 +207 0x8C8C //RX_FDEQ_GAIN_11 +208 0x7068 //RX_FDEQ_GAIN_12 +209 0x6050 //RX_FDEQ_GAIN_13 +210 0x4848 //RX_FDEQ_GAIN_14 +211 0x4848 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0202 //RX_FDEQ_BIN_0 +221 0x0203 //RX_FDEQ_BIN_1 +222 0x0303 //RX_FDEQ_BIN_2 +223 0x0304 //RX_FDEQ_BIN_3 +224 0x0405 //RX_FDEQ_BIN_4 +225 0x0506 //RX_FDEQ_BIN_5 +226 0x0708 //RX_FDEQ_BIN_6 +227 0x090A //RX_FDEQ_BIN_7 +228 0x0B0C //RX_FDEQ_BIN_8 +229 0x0D0E //RX_FDEQ_BIN_9 +230 0x0E0F //RX_FDEQ_BIN_10 +231 0x0F0E //RX_FDEQ_BIN_11 +232 0x100D //RX_FDEQ_BIN_12 +233 0x110A //RX_FDEQ_BIN_13 +234 0x0000 //RX_FDEQ_BIN_14 +235 0x0000 //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x4000 //RX_FDEQ_RESRV_0 +245 0x0320 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0030 //RX_FDDRC_BAND_MARGIN_1 +248 0x0050 //RX_FDDRC_BAND_MARGIN_2 +249 0x0080 //RX_FDDRC_BAND_MARGIN_3 +250 0x0007 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x5000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x6400 //RX_FDDRC_THRD_3_2 +258 0x6400 //RX_FDDRC_THRD_3_3 +259 0x2000 //RX_FDDRC_SLANT_0_0 +260 0x2000 //RX_FDDRC_SLANT_0_1 +261 0x2000 //RX_FDDRC_SLANT_0_2 +262 0x2000 //RX_FDDRC_SLANT_0_3 +263 0x5333 //RX_FDDRC_SLANT_1_0 +264 0x5333 //RX_FDDRC_SLANT_1_1 +265 0x5333 //RX_FDDRC_SLANT_1_2 +266 0x5333 //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +286 0x000B //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 +#VOL 1 +163 0x1000 //RX_TDDRC_ALPHA_UP_1 +164 0x1000 //RX_TDDRC_ALPHA_UP_2 +165 0x1000 //RX_TDDRC_ALPHA_UP_3 +166 0x1000 //RX_TDDRC_ALPHA_UP_4 +184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +190 0x7000 //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +269 0x0000 //RX_TDDRC_THRD_0 +270 0x0000 //RX_TDDRC_THRD_1 +271 0x1800 //RX_TDDRC_THRD_2 +272 0x1800 //RX_TDDRC_THRD_3 +273 0x3000 //RX_TDDRC_SLANT_0 +274 0x6E00 //RX_TDDRC_SLANT_1 +275 0x1000 //RX_TDDRC_ALPHA_UP_0 +276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x199A //RX_TDDRC_HMNC_GAIN +279 0x0001 //RX_TDDRC_SMT_FLAG +280 0x0CCD //RX_TDDRC_SMT_W +281 0x04E6 //RX_TDDRC_DRC_GAIN +195 0x001C //RX_FDEQ_SUBNUM +196 0x4840 //RX_FDEQ_GAIN_0 +197 0x4040 //RX_FDEQ_GAIN_1 +198 0x4659 //RX_FDEQ_GAIN_2 +199 0x6474 //RX_FDEQ_GAIN_3 +200 0x7A82 //RX_FDEQ_GAIN_4 +201 0x8180 //RX_FDEQ_GAIN_5 +202 0x8084 //RX_FDEQ_GAIN_6 +203 0x8A88 //RX_FDEQ_GAIN_7 +204 0x8C8C //RX_FDEQ_GAIN_8 +205 0x8A95 //RX_FDEQ_GAIN_9 +206 0x978E //RX_FDEQ_GAIN_10 +207 0x8C8C //RX_FDEQ_GAIN_11 +208 0x7068 //RX_FDEQ_GAIN_12 +209 0x6050 //RX_FDEQ_GAIN_13 +210 0x4848 //RX_FDEQ_GAIN_14 +211 0x4848 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0202 //RX_FDEQ_BIN_0 +221 0x0203 //RX_FDEQ_BIN_1 +222 0x0303 //RX_FDEQ_BIN_2 +223 0x0304 //RX_FDEQ_BIN_3 +224 0x0405 //RX_FDEQ_BIN_4 +225 0x0506 //RX_FDEQ_BIN_5 +226 0x0708 //RX_FDEQ_BIN_6 +227 0x090A //RX_FDEQ_BIN_7 +228 0x0B0C //RX_FDEQ_BIN_8 +229 0x0D0E //RX_FDEQ_BIN_9 +230 0x0E0F //RX_FDEQ_BIN_10 +231 0x0F0E //RX_FDEQ_BIN_11 +232 0x100D //RX_FDEQ_BIN_12 +233 0x110A //RX_FDEQ_BIN_13 +234 0x0000 //RX_FDEQ_BIN_14 +235 0x0000 //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x4000 //RX_FDEQ_RESRV_0 +245 0x0320 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0030 //RX_FDDRC_BAND_MARGIN_1 +248 0x0050 //RX_FDDRC_BAND_MARGIN_2 +249 0x0080 //RX_FDDRC_BAND_MARGIN_3 +250 0x0007 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x5000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x6400 //RX_FDDRC_THRD_3_2 +258 0x6400 //RX_FDDRC_THRD_3_3 +259 0x2000 //RX_FDDRC_SLANT_0_0 +260 0x2000 //RX_FDDRC_SLANT_0_1 +261 0x2000 //RX_FDDRC_SLANT_0_2 +262 0x2000 //RX_FDDRC_SLANT_0_3 +263 0x5333 //RX_FDDRC_SLANT_1_0 +264 0x5333 //RX_FDDRC_SLANT_1_1 +265 0x5333 //RX_FDDRC_SLANT_1_2 +266 0x5333 //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +286 0x0012 //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 +#VOL 2 +163 0x1000 //RX_TDDRC_ALPHA_UP_1 +164 0x1000 //RX_TDDRC_ALPHA_UP_2 +165 0x1000 //RX_TDDRC_ALPHA_UP_3 +166 0x1000 //RX_TDDRC_ALPHA_UP_4 +184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +190 0x7000 //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +269 0x0000 //RX_TDDRC_THRD_0 +270 0x0000 //RX_TDDRC_THRD_1 +271 0x1800 //RX_TDDRC_THRD_2 +272 0x1800 //RX_TDDRC_THRD_3 +273 0x3000 //RX_TDDRC_SLANT_0 +274 0x6E00 //RX_TDDRC_SLANT_1 +275 0x1000 //RX_TDDRC_ALPHA_UP_0 +276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x199A //RX_TDDRC_HMNC_GAIN +279 0x0001 //RX_TDDRC_SMT_FLAG +280 0x0CCD //RX_TDDRC_SMT_W +281 0x04E6 //RX_TDDRC_DRC_GAIN +195 0x001C //RX_FDEQ_SUBNUM +196 0x4840 //RX_FDEQ_GAIN_0 +197 0x4040 //RX_FDEQ_GAIN_1 +198 0x4659 //RX_FDEQ_GAIN_2 +199 0x6474 //RX_FDEQ_GAIN_3 +200 0x7A82 //RX_FDEQ_GAIN_4 +201 0x8180 //RX_FDEQ_GAIN_5 +202 0x8084 //RX_FDEQ_GAIN_6 +203 0x8A88 //RX_FDEQ_GAIN_7 +204 0x8C8C //RX_FDEQ_GAIN_8 +205 0x8A95 //RX_FDEQ_GAIN_9 +206 0x978E //RX_FDEQ_GAIN_10 +207 0x8C8C //RX_FDEQ_GAIN_11 +208 0x7068 //RX_FDEQ_GAIN_12 +209 0x6050 //RX_FDEQ_GAIN_13 +210 0x4848 //RX_FDEQ_GAIN_14 +211 0x4848 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0202 //RX_FDEQ_BIN_0 +221 0x0203 //RX_FDEQ_BIN_1 +222 0x0303 //RX_FDEQ_BIN_2 +223 0x0304 //RX_FDEQ_BIN_3 +224 0x0405 //RX_FDEQ_BIN_4 +225 0x0506 //RX_FDEQ_BIN_5 +226 0x0708 //RX_FDEQ_BIN_6 +227 0x090A //RX_FDEQ_BIN_7 +228 0x0B0C //RX_FDEQ_BIN_8 +229 0x0D0E //RX_FDEQ_BIN_9 +230 0x0E0F //RX_FDEQ_BIN_10 +231 0x0F0E //RX_FDEQ_BIN_11 +232 0x100D //RX_FDEQ_BIN_12 +233 0x110A //RX_FDEQ_BIN_13 +234 0x0000 //RX_FDEQ_BIN_14 +235 0x0000 //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x4000 //RX_FDEQ_RESRV_0 +245 0x0320 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0030 //RX_FDDRC_BAND_MARGIN_1 +248 0x0050 //RX_FDDRC_BAND_MARGIN_2 +249 0x0080 //RX_FDDRC_BAND_MARGIN_3 +250 0x0007 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x5000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x6400 //RX_FDDRC_THRD_3_2 +258 0x6400 //RX_FDDRC_THRD_3_3 +259 0x2000 //RX_FDDRC_SLANT_0_0 +260 0x2000 //RX_FDDRC_SLANT_0_1 +261 0x2000 //RX_FDDRC_SLANT_0_2 +262 0x2000 //RX_FDDRC_SLANT_0_3 +263 0x5333 //RX_FDDRC_SLANT_1_0 +264 0x5333 //RX_FDDRC_SLANT_1_1 +265 0x5333 //RX_FDDRC_SLANT_1_2 +266 0x5333 //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +286 0x001E //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 +#VOL 3 +163 0x1000 //RX_TDDRC_ALPHA_UP_1 +164 0x1000 //RX_TDDRC_ALPHA_UP_2 +165 0x1000 //RX_TDDRC_ALPHA_UP_3 +166 0x1000 //RX_TDDRC_ALPHA_UP_4 +184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +190 0x7000 //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +269 0x0000 //RX_TDDRC_THRD_0 +270 0x0000 //RX_TDDRC_THRD_1 +271 0x1800 //RX_TDDRC_THRD_2 +272 0x1800 //RX_TDDRC_THRD_3 +273 0x3000 //RX_TDDRC_SLANT_0 +274 0x6E00 //RX_TDDRC_SLANT_1 +275 0x1000 //RX_TDDRC_ALPHA_UP_0 +276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x199A //RX_TDDRC_HMNC_GAIN +279 0x0001 //RX_TDDRC_SMT_FLAG +280 0x0CCD //RX_TDDRC_SMT_W +281 0x04E6 //RX_TDDRC_DRC_GAIN +195 0x001C //RX_FDEQ_SUBNUM +196 0x4840 //RX_FDEQ_GAIN_0 +197 0x4040 //RX_FDEQ_GAIN_1 +198 0x4659 //RX_FDEQ_GAIN_2 +199 0x6474 //RX_FDEQ_GAIN_3 +200 0x7A82 //RX_FDEQ_GAIN_4 +201 0x8180 //RX_FDEQ_GAIN_5 +202 0x8084 //RX_FDEQ_GAIN_6 +203 0x8A88 //RX_FDEQ_GAIN_7 +204 0x8C8C //RX_FDEQ_GAIN_8 +205 0x8A95 //RX_FDEQ_GAIN_9 +206 0x978E //RX_FDEQ_GAIN_10 +207 0x8C8C //RX_FDEQ_GAIN_11 +208 0x7068 //RX_FDEQ_GAIN_12 +209 0x6050 //RX_FDEQ_GAIN_13 +210 0x4848 //RX_FDEQ_GAIN_14 +211 0x4848 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0202 //RX_FDEQ_BIN_0 +221 0x0203 //RX_FDEQ_BIN_1 +222 0x0303 //RX_FDEQ_BIN_2 +223 0x0304 //RX_FDEQ_BIN_3 +224 0x0405 //RX_FDEQ_BIN_4 +225 0x0506 //RX_FDEQ_BIN_5 +226 0x0708 //RX_FDEQ_BIN_6 +227 0x090A //RX_FDEQ_BIN_7 +228 0x0B0C //RX_FDEQ_BIN_8 +229 0x0D0E //RX_FDEQ_BIN_9 +230 0x0E0F //RX_FDEQ_BIN_10 +231 0x0F0E //RX_FDEQ_BIN_11 +232 0x100D //RX_FDEQ_BIN_12 +233 0x110A //RX_FDEQ_BIN_13 +234 0x0000 //RX_FDEQ_BIN_14 +235 0x0000 //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x4000 //RX_FDEQ_RESRV_0 +245 0x0320 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0030 //RX_FDDRC_BAND_MARGIN_1 +248 0x0050 //RX_FDDRC_BAND_MARGIN_2 +249 0x0080 //RX_FDDRC_BAND_MARGIN_3 +250 0x0007 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x5000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x6400 //RX_FDDRC_THRD_3_2 +258 0x6400 //RX_FDDRC_THRD_3_3 +259 0x2000 //RX_FDDRC_SLANT_0_0 +260 0x2000 //RX_FDDRC_SLANT_0_1 +261 0x2000 //RX_FDDRC_SLANT_0_2 +262 0x2000 //RX_FDDRC_SLANT_0_3 +263 0x5333 //RX_FDDRC_SLANT_1_0 +264 0x5333 //RX_FDDRC_SLANT_1_1 +265 0x5333 //RX_FDDRC_SLANT_1_2 +266 0x5333 //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +286 0x0031 //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 +#VOL 4 +163 0x1000 //RX_TDDRC_ALPHA_UP_1 +164 0x1000 //RX_TDDRC_ALPHA_UP_2 +165 0x1000 //RX_TDDRC_ALPHA_UP_3 +166 0x1000 //RX_TDDRC_ALPHA_UP_4 +184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +190 0x7000 //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +269 0x0000 //RX_TDDRC_THRD_0 +270 0x0000 //RX_TDDRC_THRD_1 +271 0x1800 //RX_TDDRC_THRD_2 +272 0x1800 //RX_TDDRC_THRD_3 +273 0x3000 //RX_TDDRC_SLANT_0 +274 0x6E00 //RX_TDDRC_SLANT_1 +275 0x1000 //RX_TDDRC_ALPHA_UP_0 +276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x199A //RX_TDDRC_HMNC_GAIN +279 0x0001 //RX_TDDRC_SMT_FLAG +280 0x0CCD //RX_TDDRC_SMT_W +281 0x04E6 //RX_TDDRC_DRC_GAIN +195 0x001C //RX_FDEQ_SUBNUM +196 0x4840 //RX_FDEQ_GAIN_0 +197 0x4040 //RX_FDEQ_GAIN_1 +198 0x4659 //RX_FDEQ_GAIN_2 +199 0x6474 //RX_FDEQ_GAIN_3 +200 0x7A82 //RX_FDEQ_GAIN_4 +201 0x8180 //RX_FDEQ_GAIN_5 +202 0x8084 //RX_FDEQ_GAIN_6 +203 0x8A88 //RX_FDEQ_GAIN_7 +204 0x8C8C //RX_FDEQ_GAIN_8 +205 0x8A95 //RX_FDEQ_GAIN_9 +206 0x978E //RX_FDEQ_GAIN_10 +207 0x8C8C //RX_FDEQ_GAIN_11 +208 0x7068 //RX_FDEQ_GAIN_12 +209 0x6050 //RX_FDEQ_GAIN_13 +210 0x4848 //RX_FDEQ_GAIN_14 +211 0x4848 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0202 //RX_FDEQ_BIN_0 +221 0x0203 //RX_FDEQ_BIN_1 +222 0x0303 //RX_FDEQ_BIN_2 +223 0x0304 //RX_FDEQ_BIN_3 +224 0x0405 //RX_FDEQ_BIN_4 +225 0x0506 //RX_FDEQ_BIN_5 +226 0x0708 //RX_FDEQ_BIN_6 +227 0x090A //RX_FDEQ_BIN_7 +228 0x0B0C //RX_FDEQ_BIN_8 +229 0x0D0E //RX_FDEQ_BIN_9 +230 0x0E0F //RX_FDEQ_BIN_10 +231 0x0F0E //RX_FDEQ_BIN_11 +232 0x100D //RX_FDEQ_BIN_12 +233 0x110A //RX_FDEQ_BIN_13 +234 0x0000 //RX_FDEQ_BIN_14 +235 0x0000 //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x4000 //RX_FDEQ_RESRV_0 +245 0x0320 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0030 //RX_FDDRC_BAND_MARGIN_1 +248 0x0050 //RX_FDDRC_BAND_MARGIN_2 +249 0x0080 //RX_FDDRC_BAND_MARGIN_3 +250 0x0007 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x5000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x6400 //RX_FDDRC_THRD_3_2 +258 0x6400 //RX_FDDRC_THRD_3_3 +259 0x2000 //RX_FDDRC_SLANT_0_0 +260 0x2000 //RX_FDDRC_SLANT_0_1 +261 0x2000 //RX_FDDRC_SLANT_0_2 +262 0x2000 //RX_FDDRC_SLANT_0_3 +263 0x5333 //RX_FDDRC_SLANT_1_0 +264 0x5333 //RX_FDDRC_SLANT_1_1 +265 0x5333 //RX_FDDRC_SLANT_1_2 +266 0x5333 //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +286 0x0050 //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 +#VOL 5 +163 0x1000 //RX_TDDRC_ALPHA_UP_1 +164 0x1000 //RX_TDDRC_ALPHA_UP_2 +165 0x1000 //RX_TDDRC_ALPHA_UP_3 +166 0x1000 //RX_TDDRC_ALPHA_UP_4 +184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +190 0x7000 //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +269 0x0000 //RX_TDDRC_THRD_0 +270 0x0000 //RX_TDDRC_THRD_1 +271 0x1800 //RX_TDDRC_THRD_2 +272 0x1800 //RX_TDDRC_THRD_3 +273 0x3000 //RX_TDDRC_SLANT_0 +274 0x6E00 //RX_TDDRC_SLANT_1 +275 0x1000 //RX_TDDRC_ALPHA_UP_0 +276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x199A //RX_TDDRC_HMNC_GAIN +279 0x0001 //RX_TDDRC_SMT_FLAG +280 0x0CCD //RX_TDDRC_SMT_W +281 0x04E6 //RX_TDDRC_DRC_GAIN +195 0x001C //RX_FDEQ_SUBNUM +196 0x4840 //RX_FDEQ_GAIN_0 +197 0x4040 //RX_FDEQ_GAIN_1 +198 0x4659 //RX_FDEQ_GAIN_2 +199 0x6474 //RX_FDEQ_GAIN_3 +200 0x7A82 //RX_FDEQ_GAIN_4 +201 0x8180 //RX_FDEQ_GAIN_5 +202 0x8084 //RX_FDEQ_GAIN_6 +203 0x8A88 //RX_FDEQ_GAIN_7 +204 0x8C8C //RX_FDEQ_GAIN_8 +205 0x8A95 //RX_FDEQ_GAIN_9 +206 0x978E //RX_FDEQ_GAIN_10 +207 0x8C8C //RX_FDEQ_GAIN_11 +208 0x7068 //RX_FDEQ_GAIN_12 +209 0x6050 //RX_FDEQ_GAIN_13 +210 0x4848 //RX_FDEQ_GAIN_14 +211 0x4848 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0202 //RX_FDEQ_BIN_0 +221 0x0203 //RX_FDEQ_BIN_1 +222 0x0303 //RX_FDEQ_BIN_2 +223 0x0304 //RX_FDEQ_BIN_3 +224 0x0405 //RX_FDEQ_BIN_4 +225 0x0506 //RX_FDEQ_BIN_5 +226 0x0708 //RX_FDEQ_BIN_6 +227 0x090A //RX_FDEQ_BIN_7 +228 0x0B0C //RX_FDEQ_BIN_8 +229 0x0D0E //RX_FDEQ_BIN_9 +230 0x0E0F //RX_FDEQ_BIN_10 +231 0x0F0E //RX_FDEQ_BIN_11 +232 0x100D //RX_FDEQ_BIN_12 +233 0x110A //RX_FDEQ_BIN_13 +234 0x0000 //RX_FDEQ_BIN_14 +235 0x0000 //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x4000 //RX_FDEQ_RESRV_0 +245 0x0320 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0030 //RX_FDDRC_BAND_MARGIN_1 +248 0x0050 //RX_FDDRC_BAND_MARGIN_2 +249 0x0080 //RX_FDDRC_BAND_MARGIN_3 +250 0x0007 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x5000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x6400 //RX_FDDRC_THRD_3_2 +258 0x6400 //RX_FDDRC_THRD_3_3 +259 0x2000 //RX_FDDRC_SLANT_0_0 +260 0x2000 //RX_FDDRC_SLANT_0_1 +261 0x2000 //RX_FDDRC_SLANT_0_2 +262 0x2000 //RX_FDDRC_SLANT_0_3 +263 0x5333 //RX_FDDRC_SLANT_1_0 +264 0x5333 //RX_FDDRC_SLANT_1_1 +265 0x5333 //RX_FDDRC_SLANT_1_2 +266 0x5333 //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +286 0x0086 //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 +#VOL 6 +163 0x1000 //RX_TDDRC_ALPHA_UP_1 +164 0x1000 //RX_TDDRC_ALPHA_UP_2 +165 0x1000 //RX_TDDRC_ALPHA_UP_3 +166 0x1000 //RX_TDDRC_ALPHA_UP_4 +184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +190 0x7000 //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +269 0x0000 //RX_TDDRC_THRD_0 +270 0x0000 //RX_TDDRC_THRD_1 +271 0x1800 //RX_TDDRC_THRD_2 +272 0x1800 //RX_TDDRC_THRD_3 +273 0x3000 //RX_TDDRC_SLANT_0 +274 0x6E00 //RX_TDDRC_SLANT_1 +275 0x1000 //RX_TDDRC_ALPHA_UP_0 +276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x199A //RX_TDDRC_HMNC_GAIN +279 0x0001 //RX_TDDRC_SMT_FLAG +280 0x0CCD //RX_TDDRC_SMT_W +281 0x04E6 //RX_TDDRC_DRC_GAIN +195 0x001C //RX_FDEQ_SUBNUM +196 0x4840 //RX_FDEQ_GAIN_0 +197 0x4040 //RX_FDEQ_GAIN_1 +198 0x4659 //RX_FDEQ_GAIN_2 +199 0x6474 //RX_FDEQ_GAIN_3 +200 0x7A82 //RX_FDEQ_GAIN_4 +201 0x8180 //RX_FDEQ_GAIN_5 +202 0x8084 //RX_FDEQ_GAIN_6 +203 0x8A88 //RX_FDEQ_GAIN_7 +204 0x8C8C //RX_FDEQ_GAIN_8 +205 0x8A95 //RX_FDEQ_GAIN_9 +206 0x978E //RX_FDEQ_GAIN_10 +207 0x8C8C //RX_FDEQ_GAIN_11 +208 0x7068 //RX_FDEQ_GAIN_12 +209 0x6050 //RX_FDEQ_GAIN_13 +210 0x4848 //RX_FDEQ_GAIN_14 +211 0x4848 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0202 //RX_FDEQ_BIN_0 +221 0x0203 //RX_FDEQ_BIN_1 +222 0x0303 //RX_FDEQ_BIN_2 +223 0x0304 //RX_FDEQ_BIN_3 +224 0x0405 //RX_FDEQ_BIN_4 +225 0x0506 //RX_FDEQ_BIN_5 +226 0x0708 //RX_FDEQ_BIN_6 +227 0x090A //RX_FDEQ_BIN_7 +228 0x0B0C //RX_FDEQ_BIN_8 +229 0x0D0E //RX_FDEQ_BIN_9 +230 0x0E0F //RX_FDEQ_BIN_10 +231 0x0F0E //RX_FDEQ_BIN_11 +232 0x100D //RX_FDEQ_BIN_12 +233 0x110A //RX_FDEQ_BIN_13 +234 0x0000 //RX_FDEQ_BIN_14 +235 0x0000 //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x4000 //RX_FDEQ_RESRV_0 +245 0x0320 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0030 //RX_FDDRC_BAND_MARGIN_1 +248 0x0050 //RX_FDDRC_BAND_MARGIN_2 +249 0x0080 //RX_FDDRC_BAND_MARGIN_3 +250 0x0007 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x5000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x6400 //RX_FDDRC_THRD_3_2 +258 0x6400 //RX_FDDRC_THRD_3_3 +259 0x2000 //RX_FDDRC_SLANT_0_0 +260 0x2000 //RX_FDDRC_SLANT_0_1 +261 0x2000 //RX_FDDRC_SLANT_0_2 +262 0x2000 //RX_FDDRC_SLANT_0_3 +263 0x5333 //RX_FDDRC_SLANT_1_0 +264 0x5333 //RX_FDDRC_SLANT_1_1 +265 0x5333 //RX_FDDRC_SLANT_1_2 +266 0x5333 //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +286 0x0100 //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 #CASE_NAME HANDSET-HANDSET-TMOBILE_US-SWB -#PARAM_TYPE TX+RX -#TOTAL_CUSTOM_STEP 7 +#PARAM_MODE Full +#PARAM_TYPE TX+2RX +#TOTAL_CUSTOM_STEP 7+7 #TX 0 0x0000 //TX_OPERATION_MODE_0 1 0x0000 //TX_OPERATION_MODE_1 -2 0x0026 //TX_PATCH_REG +2 0x0076 //TX_PATCH_REG 3 0x6F7E //TX_SENDFUNC_MODE_0 4 0x0001 //TX_SENDFUNC_MODE_1 5 0x0002 //TX_NUM_MIC @@ -22817,7 +34739,7 @@ 18 0x0000 //TX_SYS_RESRV_2 19 0x0000 //TX_SYS_RESRV_3 20 0x0000 //TX_DIST2REF0 -21 0x00A4 //TX_DIST2REF1 +21 0x00A3 //TX_DIST2REF1 22 0x0000 //TX_DIST2REF_02 23 0x0000 //TX_DIST2REF_03 24 0x0000 //TX_DIST2REF_04 @@ -23047,12 +34969,12 @@ 248 0xF800 //TX_THR_SN_EST_6 249 0xF700 //TX_THR_SN_EST_7 250 0x0000 //TX_DELTA_THR_SN_EST_0 -251 0x0100 //TX_DELTA_THR_SN_EST_1 +251 0x0200 //TX_DELTA_THR_SN_EST_1 252 0x0200 //TX_DELTA_THR_SN_EST_2 253 0x0200 //TX_DELTA_THR_SN_EST_3 -254 0x0200 //TX_DELTA_THR_SN_EST_4 -255 0x0100 //TX_DELTA_THR_SN_EST_5 -256 0x0200 //TX_DELTA_THR_SN_EST_6 +254 0x0100 //TX_DELTA_THR_SN_EST_4 +255 0x0200 //TX_DELTA_THR_SN_EST_5 +256 0x0100 //TX_DELTA_THR_SN_EST_6 257 0x0200 //TX_DELTA_THR_SN_EST_7 258 0x4000 //TX_LAMBDA_NN_EST_0 259 0x4000 //TX_LAMBDA_NN_EST_1 @@ -23078,18 +35000,18 @@ 279 0x1000 //TX_B_POST_FLT_0 280 0x1000 //TX_B_POST_FLT_1 281 0x0014 //TX_NS_LVL_CTRL_0 -282 0x0016 //TX_NS_LVL_CTRL_1 -283 0x002C //TX_NS_LVL_CTRL_2 -284 0x0016 //TX_NS_LVL_CTRL_3 -285 0x0018 //TX_NS_LVL_CTRL_4 -286 0x0016 //TX_NS_LVL_CTRL_5 -287 0x0012 //TX_NS_LVL_CTRL_6 +282 0x002C //TX_NS_LVL_CTRL_1 +283 0x0016 //TX_NS_LVL_CTRL_2 +284 0x0018 //TX_NS_LVL_CTRL_3 +285 0x0016 //TX_NS_LVL_CTRL_4 +286 0x0012 //TX_NS_LVL_CTRL_5 +287 0x0016 //TX_NS_LVL_CTRL_6 288 0x0017 //TX_NS_LVL_CTRL_7 289 0x000E //TX_MIN_GAIN_S_0 -290 0x0012 //TX_MIN_GAIN_S_1 -291 0x000D //TX_MIN_GAIN_S_2 -292 0x0012 //TX_MIN_GAIN_S_3 -293 0x0010 //TX_MIN_GAIN_S_4 +290 0x000D //TX_MIN_GAIN_S_1 +291 0x0012 //TX_MIN_GAIN_S_2 +292 0x0010 //TX_MIN_GAIN_S_3 +293 0x0012 //TX_MIN_GAIN_S_4 294 0x0012 //TX_MIN_GAIN_S_5 295 0x0012 //TX_MIN_GAIN_S_6 296 0x0012 //TX_MIN_GAIN_S_7 @@ -23111,29 +35033,29 @@ 312 0x7FFF //TX_A_POST_FILT_0 313 0x2000 //TX_A_POST_FILT_1 314 0x4000 //TX_A_POST_FILT_S_0 -315 0x5000 //TX_A_POST_FILT_S_1 +315 0x4000 //TX_A_POST_FILT_S_1 316 0x4000 //TX_A_POST_FILT_S_2 317 0x4000 //TX_A_POST_FILT_S_3 318 0x4000 //TX_A_POST_FILT_S_4 319 0x4000 //TX_A_POST_FILT_S_5 -320 0x4000 //TX_A_POST_FILT_S_6 +320 0x5000 //TX_A_POST_FILT_S_6 321 0x7000 //TX_A_POST_FILT_S_7 322 0x1000 //TX_B_POST_FILT_0 323 0x1000 //TX_B_POST_FILT_1 -324 0x3000 //TX_B_POST_FILT_2 -325 0x1000 //TX_B_POST_FILT_3 -326 0x5000 //TX_B_POST_FILT_4 -327 0x2000 //TX_B_POST_FILT_5 -328 0x6000 //TX_B_POST_FILT_6 +324 0x2000 //TX_B_POST_FILT_2 +325 0x2000 //TX_B_POST_FILT_3 +326 0x2000 //TX_B_POST_FILT_4 +327 0x1000 //TX_B_POST_FILT_5 +328 0x3000 //TX_B_POST_FILT_6 329 0x3000 //TX_B_POST_FILT_7 330 0x1000 //TX_B_LESSCUT_RTO_S_0 -331 0x6000 //TX_B_LESSCUT_RTO_S_1 -332 0x6000 //TX_B_LESSCUT_RTO_S_2 -333 0x6000 //TX_B_LESSCUT_RTO_S_3 -334 0x6000 //TX_B_LESSCUT_RTO_S_4 -335 0x6000 //TX_B_LESSCUT_RTO_S_5 -336 0x7FFF //TX_B_LESSCUT_RTO_S_6 -337 0x7FFF //TX_B_LESSCUT_RTO_S_7 +331 0x1000 //TX_B_LESSCUT_RTO_S_1 +332 0x1000 //TX_B_LESSCUT_RTO_S_2 +333 0x1000 //TX_B_LESSCUT_RTO_S_3 +334 0x1000 //TX_B_LESSCUT_RTO_S_4 +335 0x1000 //TX_B_LESSCUT_RTO_S_5 +336 0x1000 //TX_B_LESSCUT_RTO_S_6 +337 0x1000 //TX_B_LESSCUT_RTO_S_7 338 0x7E14 //TX_LAMBDA_PFILT 339 0x7C29 //TX_LAMBDA_PFILT_S_0 340 0x7C29 //TX_LAMBDA_PFILT_S_1 @@ -23176,10 +35098,10 @@ 377 0x4E20 //TX_NOISE_TH_5_4 378 0x1194 //TX_NOISE_TH_6 379 0x0014 //TX_MINENOISE_TH -380 0x4000 //TX_MINENOISE_MIC0_TH_MTS -381 0xFFEE //TX_MINENOISE_MIC0_TH_EXP -382 0x6000 //TX_MINENOISE_MIC0_S_TH_MTS -383 0xFFF3 //TX_MINENOISE_MIC0_S_TH_EXP +380 0xD508 //TX_MORENS_TFMASK_TH +381 0x0001 //TX_DRC_QUIET_FLOOR +382 0x6D60 //TX_RATIODTL_CUT_TH +383 0x0DAC //TX_DT_CUT_K1 384 0x00A5 //TX_OUT_ENER_S_TH_CLEAN 385 0x00A5 //TX_OUT_ENER_S_TH_LESSCLEAN 386 0x00A5 //TX_OUT_ENER_S_TH_NOISY @@ -23187,15 +35109,15 @@ 388 0x0200 //TX_OUT_ENER_TH_SPEECH 389 0x2000 //TX_SN_NPB_GAIN 390 0x0000 //TX_NN_NPB_GAIN -391 0x0000 //TX_CSX_ALPHA_0 -392 0x0000 //TX_CSX_ALPHA_1 -393 0x0000 //TX_CSX_ALPHA_2 -394 0x0000 //TX_CSX_ALPHA_3 -395 0x0800 //TX_MU_ARSP_EST -396 0x00C8 //TX_P_OUTBEAM_MIN_TH +391 0x3000 //TX_POST_MASK_SUP_HSNE +392 0x07D0 //TX_TAIL_DET_TH +393 0x4000 //TX_B_LESSCUT_RTO_WTA +394 0x0000 //TX_MEL_G_R +395 0x0080 //TX_SUPHIGH_TH +396 0x0000 //TX_MASK_G_R 397 0x0002 //TX_EXTRA_NS_L -398 0x0800 //TX_EXTRA_NS_A -399 0x0005 //TX_VR_NOISE_FLOOR_TH +398 0x1800 //TX_C_POST_FLT_MASK +399 0x7FFF //TX_A_POST_FLT_WNS 400 0x0148 //TX_MIN_G_LOW300HZ 401 0x0004 //TX_MAXLEVEL_CNG 402 0x00B4 //TX_STN_NOISE_TH @@ -23310,16 +35232,16 @@ 511 0x6666 //TX_MIC_TO_BFGAIN 512 0x0000 //TX_MICTOBFGAIN0 513 0x0000 //TX_FASTMUE_TH -514 0x0000 //TX_DERVB_LEN_0 -515 0x0000 //TX_DERVB_LEN_1 -516 0x0000 //TX_RHO_DERVB -517 0x0000 //TX_MIC_INDX_DERVB -518 0x0000 //TX_MU_DERVB -519 0x0000 //TX_DR_RESRV_0 -520 0x0000 //TX_DR_RESRV_1 -521 0x0000 //TX_DR_RESRV_2 -522 0x0000 //TX_DR_RESRV_3 -523 0x0000 //TX_DR_RESRV_4 +514 0x2CCC //TX_DEREVERB_LF_MU +515 0x3200 //TX_DEREVERB_HF_MU +516 0x0007 //TX_DEREVERB_DELAY +517 0x0004 //TX_DEREVERB_COEF_LEN +518 0x0003 //TX_DEREVERB_DNR +519 0x0000 //TX_DEREVERB_ALPHA +520 0x0000 //TX_DEREVERB_BETA +521 0x3A98 //TX_GSC_RTOL_TH +522 0x3A98 //TX_GSC_RTOH_TH +523 0x7E2C //TX_WIDE2_MEANHTH 524 0x0000 //TX_DR_RESRV_5 525 0x0000 //TX_DR_RESRV_6 526 0x0000 //TX_DR_RESRV_7 @@ -23363,23 +35285,23 @@ 564 0x0000 //TX_PB_RESRV_0 565 0x0000 //TX_PB_RESRV_1 566 0x0030 //TX_FDEQ_SUBNUM -567 0x5C54 //TX_FDEQ_GAIN_0 +567 0x5C58 //TX_FDEQ_GAIN_0 568 0x5048 //TX_FDEQ_GAIN_1 569 0x4C4C //TX_FDEQ_GAIN_2 570 0x494D //TX_FDEQ_GAIN_3 -571 0x4846 //TX_FDEQ_GAIN_4 -572 0x4644 //TX_FDEQ_GAIN_5 -573 0x4642 //TX_FDEQ_GAIN_6 -574 0x4444 //TX_FDEQ_GAIN_7 -575 0x4245 //TX_FDEQ_GAIN_8 -576 0x464C //TX_FDEQ_GAIN_9 -577 0x443E //TX_FDEQ_GAIN_10 -578 0x4040 //TX_FDEQ_GAIN_11 -579 0x4146 //TX_FDEQ_GAIN_12 -580 0x4244 //TX_FDEQ_GAIN_13 -581 0x4759 //TX_FDEQ_GAIN_14 -582 0x6E6E //TX_FDEQ_GAIN_15 -583 0x4848 //TX_FDEQ_GAIN_16 +571 0x4442 //TX_FDEQ_GAIN_4 +572 0x444C //TX_FDEQ_GAIN_5 +573 0x5053 //TX_FDEQ_GAIN_6 +574 0x6248 //TX_FDEQ_GAIN_7 +575 0x434A //TX_FDEQ_GAIN_8 +576 0x4B4D //TX_FDEQ_GAIN_9 +577 0x4C4B //TX_FDEQ_GAIN_10 +578 0x4E4A //TX_FDEQ_GAIN_11 +579 0x4842 //TX_FDEQ_GAIN_12 +580 0x4C44 //TX_FDEQ_GAIN_13 +581 0x3A4A //TX_FDEQ_GAIN_14 +582 0x6478 //TX_FDEQ_GAIN_15 +583 0x5848 //TX_FDEQ_GAIN_16 584 0x4848 //TX_FDEQ_GAIN_17 585 0x4848 //TX_FDEQ_GAIN_18 586 0x4848 //TX_FDEQ_GAIN_19 @@ -23399,9 +35321,9 @@ 600 0x0F0F //TX_FDEQ_BIN_9 601 0x0E0D //TX_FDEQ_BIN_10 602 0x0F28 //TX_FDEQ_BIN_11 -603 0x111B //TX_FDEQ_BIN_12 -604 0x291E //TX_FDEQ_BIN_13 -605 0x1E10 //TX_FDEQ_BIN_14 +603 0x110F //TX_FDEQ_BIN_12 +604 0x350F //TX_FDEQ_BIN_13 +605 0x1924 //TX_FDEQ_BIN_14 606 0x1810 //TX_FDEQ_BIN_15 607 0x1021 //TX_FDEQ_BIN_16 608 0x1000 //TX_FDEQ_BIN_17 @@ -23468,16 +35390,16 @@ 669 0x4848 //TX_PREEQ_GAIN_MIC1_3 670 0x4848 //TX_PREEQ_GAIN_MIC1_4 671 0x4848 //TX_PREEQ_GAIN_MIC1_5 -672 0x4848 //TX_PREEQ_GAIN_MIC1_6 -673 0x484A //TX_PREEQ_GAIN_MIC1_7 -674 0x4C4E //TX_PREEQ_GAIN_MIC1_8 -675 0x5054 //TX_PREEQ_GAIN_MIC1_9 -676 0x5658 //TX_PREEQ_GAIN_MIC1_10 -677 0x5C5C //TX_PREEQ_GAIN_MIC1_11 -678 0x6474 //TX_PREEQ_GAIN_MIC1_12 -679 0x7870 //TX_PREEQ_GAIN_MIC1_13 +672 0x494A //TX_PREEQ_GAIN_MIC1_6 +673 0x4B4C //TX_PREEQ_GAIN_MIC1_7 +674 0x4D4E //TX_PREEQ_GAIN_MIC1_8 +675 0x4F52 //TX_PREEQ_GAIN_MIC1_9 +676 0x5355 //TX_PREEQ_GAIN_MIC1_10 +677 0x585C //TX_PREEQ_GAIN_MIC1_11 +678 0x616A //TX_PREEQ_GAIN_MIC1_12 +679 0x726E //TX_PREEQ_GAIN_MIC1_13 680 0x5C48 //TX_PREEQ_GAIN_MIC1_14 -681 0x383C //TX_PREEQ_GAIN_MIC1_15 +681 0x3B38 //TX_PREEQ_GAIN_MIC1_15 682 0x4848 //TX_PREEQ_GAIN_MIC1_16 683 0x4848 //TX_PREEQ_GAIN_MIC1_17 684 0x4848 //TX_PREEQ_GAIN_MIC1_18 @@ -23501,7 +35423,7 @@ 702 0x1B1E //TX_PREEQ_BIN_MIC1_12 703 0x1E1E //TX_PREEQ_BIN_MIC1_13 704 0x1E28 //TX_PREEQ_BIN_MIC1_14 -705 0x282C //TX_PREEQ_BIN_MIC1_15 +705 0x3042 //TX_PREEQ_BIN_MIC1_15 706 0x0000 //TX_PREEQ_BIN_MIC1_16 707 0x0000 //TX_PREEQ_BIN_MIC1_17 708 0x0000 //TX_PREEQ_BIN_MIC1_18 @@ -23662,7 +35584,7 @@ 863 0x199A //TX_TDDRC_HMNC_GAIN 864 0x0000 //TX_TDDRC_SMT_FLAG 865 0x0CCD //TX_TDDRC_SMT_W -866 0x060B //TX_TDDRC_DRC_GAIN +866 0x06EC //TX_TDDRC_DRC_GAIN 867 0x7FFF //TX_TDDRC_LMT_THRD 868 0x0000 //TX_TDDRC_LMT_ALPHA 869 0x0000 //TX_TFMASKLTH @@ -23693,8 +35615,73 @@ 894 0xC000 //TX_FASTNS_SSA_THHFL 895 0xCCCC //TX_FASTNS_SSA_THLFH 896 0xD999 //TX_FASTNS_SSA_THHFH +897 0x2339 //TX_SENDFUNC_REG_MICMUTE +898 0x0021 //TX_SENDFUNC_REG_MICMUTE1 +899 0x02BC //TX_MICMUTE_RATIO_THR +900 0x0140 //TX_MICMUTE_AMP_THR +901 0x0004 //TX_MICMUTE_HPF_IND +902 0x00C0 //TX_MICMUTE_LOG_EYR_TH +903 0x0008 //TX_MICMUTE_CVG_TIME +904 0x0008 //TX_MICMUTE_RELEASE_TIME +905 0x01FE //TX_MIC_VOLUME_MIC0MUTE +906 0x0020 //TX_MICMUTE_EPD_OFFSET_0 +907 0x001E //TX_MICMUTE_FRQ_AEC_L +908 0x7999 //TX_MICMUTE_EAD_THR +909 0x7FFF //TX_MICMUTE_LAMBDA_CB_NLE +910 0x7FFF //TX_MICMUTE_LAMBDA_RE_EST +911 0x4000 //TX_DTD_THR1_MICMUTE_0 +912 0x7000 //TX_DTD_THR1_MICMUTE_1 +913 0x7FFF //TX_DTD_THR1_MICMUTE_2 +914 0x7FFF //TX_DTD_THR1_MICMUTE_3 +915 0x6CCC //TX_DTD_THR2_MICMUTE_0 +916 0x0400 //TX_MICMUTE_MIN_EQ_RE_EST_0 +917 0x0400 //TX_MICMUTE_MIN_EQ_RE_EST_1 +918 0x1000 //TX_MICMUTE_MIN_EQ_RE_EST_2 +919 0x7FFF //TX_MICMUTE_MIN_EQ_RE_EST_3 +920 0x7FFF //TX_MICMUTE_MIN_EQ_RE_EST_4 +921 0x4000 //TX_MICMUTE_C_POST_FLT +922 0x03E8 //TX_MICMUTE_DT_CUT_K +923 0x0001 //TX_MICMUTE_DT_CUT_THR +924 0x03E8 //TX_MICMUTE_DT_CUT_K2 +925 0x0001 //TX_MICMUTE_DT_CUT_THR2 +926 0x0064 //TX_MICMUTE_DT2_HOLD_N +927 0x1000 //TX_MICMUTE_RATIODTH_THCUT +928 0x1000 //TX_MICMUTE_B_POST_FLT_ECHOL +929 0x7FFF //TX_MICMUTE_B_POST_FLT_ECHOH +930 0x0400 //TX_MICMUTE_C_POST_FLT_MASK +931 0x7999 //TX_MICMUTE_RATIODTL_CUT_TH +932 0x0258 //TX_MICMUTE_DT_CUT_K1 +933 0x0800 //TX_MICMUTE_N2_SN_EST +934 0xFC00 //TX_MICMUTE_THR_SN_EST_0 +935 0x001C //TX_MICMUTE_MIN_G_CTRL_0 +936 0x6000 //TX_MICMUTE_A_POST_FILT_S_0 +937 0x7000 //TX_MICMUTE_B_POST_FILT_0 +938 0x2710 //TX_MIC1RUB_AMP_THR +939 0x0010 //TX_MIC1MUTE_RATIO_THR +940 0x0450 //TX_MIC1MUTE_AMP_THR +941 0x0008 //TX_MIC1MUTE_CVG_TIME +942 0x0008 //TX_MIC1MUTE_RELEASE_TIME +943 0x0000 //TX_AMS_RESRV_01 +944 0x0000 //TX_AMS_RESRV_02 +945 0x0000 //TX_AMS_RESRV_03 +946 0x0000 //TX_AMS_RESRV_04 +947 0x0000 //TX_AMS_RESRV_05 +948 0x0000 //TX_AMS_RESRV_06 +949 0x0000 //TX_AMS_RESRV_07 +950 0x0000 //TX_AMS_RESRV_08 +951 0x0000 //TX_AMS_RESRV_09 +952 0x0000 //TX_AMS_RESRV_10 +953 0x0000 //TX_AMS_RESRV_11 +954 0x0000 //TX_AMS_RESRV_12 +955 0x0000 //TX_AMS_RESRV_13 +956 0x0000 //TX_AMS_RESRV_14 +957 0x0000 //TX_AMS_RESRV_15 +958 0x0000 //TX_AMS_RESRV_16 +959 0x0000 //TX_AMS_RESRV_17 +960 0x0000 //TX_AMS_RESRV_18 +961 0x0000 //TX_AMS_RESRV_19 #RX -0 0x003C //RX_RECVFUNC_MODE_0 +0 0x203C //RX_RECVFUNC_MODE_0 1 0x0000 //RX_RECVFUNC_MODE_1 2 0x0003 //RX_SAMPLINGFREQ_SIG 3 0x0003 //RX_SAMPLINGFREQ_PROC @@ -23704,7 +35691,7 @@ 7 0x1000 //RX_TDDRC_ALPHA_UP_2 8 0x1000 //RX_TDDRC_ALPHA_UP_3 9 0x1000 //RX_TDDRC_ALPHA_UP_4 -10 0x0600 //RX_PGA +10 0x05AA //RX_PGA 11 0x7FFF //RX_A_HP 12 0x4000 //RX_B_PE 13 0x5800 //RX_THR_PITCH_DET_0 @@ -23733,22 +35720,22 @@ 36 0x0000 //RX_LMT_THRD 37 0x4000 //RX_LMT_ALPHA 38 0x0020 //RX_FDEQ_SUBNUM -39 0x4840 //RX_FDEQ_GAIN_0 -40 0x4040 //RX_FDEQ_GAIN_1 -41 0x4054 //RX_FDEQ_GAIN_2 -42 0x5E66 //RX_FDEQ_GAIN_3 -43 0x777C //RX_FDEQ_GAIN_4 -44 0x9681 //RX_FDEQ_GAIN_5 -45 0x7C81 //RX_FDEQ_GAIN_6 -46 0x8787 //RX_FDEQ_GAIN_7 -47 0x8D8E //RX_FDEQ_GAIN_8 -48 0x8F9A //RX_FDEQ_GAIN_9 -49 0xA7AA //RX_FDEQ_GAIN_10 -50 0x9C89 //RX_FDEQ_GAIN_11 -51 0x6F5A //RX_FDEQ_GAIN_12 -52 0x4A48 //RX_FDEQ_GAIN_13 -53 0x4857 //RX_FDEQ_GAIN_14 -54 0x5B6C //RX_FDEQ_GAIN_15 +39 0x483E //RX_FDEQ_GAIN_0 +40 0x3E3E //RX_FDEQ_GAIN_1 +41 0x3E4A //RX_FDEQ_GAIN_2 +42 0x5464 //RX_FDEQ_GAIN_3 +43 0x7072 //RX_FDEQ_GAIN_4 +44 0x8576 //RX_FDEQ_GAIN_5 +45 0x7880 //RX_FDEQ_GAIN_6 +46 0x8888 //RX_FDEQ_GAIN_7 +47 0x949C //RX_FDEQ_GAIN_8 +48 0x96A4 //RX_FDEQ_GAIN_9 +49 0xA994 //RX_FDEQ_GAIN_10 +50 0x9487 //RX_FDEQ_GAIN_11 +51 0x6F64 //RX_FDEQ_GAIN_12 +52 0x625A //RX_FDEQ_GAIN_13 +53 0x5D80 //RX_FDEQ_GAIN_14 +54 0x8890 //RX_FDEQ_GAIN_15 55 0x4848 //RX_FDEQ_GAIN_16 56 0x4848 //RX_FDEQ_GAIN_17 57 0x4848 //RX_FDEQ_GAIN_18 @@ -23760,7 +35747,7 @@ 63 0x0202 //RX_FDEQ_BIN_0 64 0x0202 //RX_FDEQ_BIN_1 65 0x0301 //RX_FDEQ_BIN_2 -66 0x0404 //RX_FDEQ_BIN_3 +66 0x0503 //RX_FDEQ_BIN_3 67 0x0406 //RX_FDEQ_BIN_4 68 0x0109 //RX_FDEQ_BIN_5 69 0x0708 //RX_FDEQ_BIN_6 @@ -23769,9 +35756,9 @@ 72 0x0D0E //RX_FDEQ_BIN_9 73 0x1013 //RX_FDEQ_BIN_10 74 0x1719 //RX_FDEQ_BIN_11 -75 0x1B1E //RX_FDEQ_BIN_12 -76 0x1E1E //RX_FDEQ_BIN_13 -77 0x1E28 //RX_FDEQ_BIN_14 +75 0x1B0F //RX_FDEQ_BIN_12 +76 0x141E //RX_FDEQ_BIN_13 +77 0x3728 //RX_FDEQ_BIN_14 78 0x282C //RX_FDEQ_BIN_15 79 0x0000 //RX_FDEQ_BIN_16 80 0x0000 //RX_FDEQ_BIN_17 @@ -23810,20 +35797,20 @@ 113 0x0002 //RX_TDDRC_THRD_1 114 0x1800 //RX_TDDRC_THRD_2 115 0x1800 //RX_TDDRC_THRD_3 -116 0x3000 //RX_TDDRC_SLANT_0 -117 0x6E00 //RX_TDDRC_SLANT_1 +116 0x7FFF //RX_TDDRC_SLANT_0 +117 0x7FFF //RX_TDDRC_SLANT_1 118 0x1000 //RX_TDDRC_ALPHA_UP_0 119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 120 0x0000 //RX_TDDRC_HMNC_FLAG 121 0x199A //RX_TDDRC_HMNC_GAIN 122 0x0001 //RX_TDDRC_SMT_FLAG 123 0x0CCD //RX_TDDRC_SMT_W -124 0x04FC //RX_TDDRC_DRC_GAIN +124 0x057F //RX_TDDRC_DRC_GAIN 125 0x7C00 //RX_LAMBDA_PKA_FP 126 0x13E0 //RX_TPKA_FP 127 0x0080 //RX_MIN_G_FP 128 0x2000 //RX_MAX_G_FP -129 0x000D //RX_SPK_VOL +129 0x0100 //RX_SPK_VOL 130 0x0000 //RX_VOL_RESRV_0 131 0x0000 //RX_MAXLEVEL_CNG 132 0x3000 //RX_BWE_UV_TH @@ -23866,32 +35853,32 @@ 113 0x0002 //RX_TDDRC_THRD_1 114 0x1800 //RX_TDDRC_THRD_2 115 0x1800 //RX_TDDRC_THRD_3 -116 0x3000 //RX_TDDRC_SLANT_0 -117 0x6E00 //RX_TDDRC_SLANT_1 +116 0x7FFF //RX_TDDRC_SLANT_0 +117 0x7FFF //RX_TDDRC_SLANT_1 118 0x1000 //RX_TDDRC_ALPHA_UP_0 119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 120 0x0000 //RX_TDDRC_HMNC_FLAG 121 0x199A //RX_TDDRC_HMNC_GAIN 122 0x0001 //RX_TDDRC_SMT_FLAG 123 0x0CCD //RX_TDDRC_SMT_W -124 0x04FC //RX_TDDRC_DRC_GAIN +124 0x057F //RX_TDDRC_DRC_GAIN 38 0x0020 //RX_FDEQ_SUBNUM -39 0x4840 //RX_FDEQ_GAIN_0 -40 0x4040 //RX_FDEQ_GAIN_1 -41 0x4054 //RX_FDEQ_GAIN_2 -42 0x5E66 //RX_FDEQ_GAIN_3 -43 0x777C //RX_FDEQ_GAIN_4 -44 0x9681 //RX_FDEQ_GAIN_5 -45 0x7C81 //RX_FDEQ_GAIN_6 -46 0x8787 //RX_FDEQ_GAIN_7 -47 0x8D8E //RX_FDEQ_GAIN_8 -48 0x8F9A //RX_FDEQ_GAIN_9 -49 0xA7AA //RX_FDEQ_GAIN_10 -50 0x9C89 //RX_FDEQ_GAIN_11 -51 0x6F5A //RX_FDEQ_GAIN_12 -52 0x4A48 //RX_FDEQ_GAIN_13 -53 0x4857 //RX_FDEQ_GAIN_14 -54 0x5B6C //RX_FDEQ_GAIN_15 +39 0x483E //RX_FDEQ_GAIN_0 +40 0x3E3E //RX_FDEQ_GAIN_1 +41 0x3E4A //RX_FDEQ_GAIN_2 +42 0x5464 //RX_FDEQ_GAIN_3 +43 0x7072 //RX_FDEQ_GAIN_4 +44 0x8576 //RX_FDEQ_GAIN_5 +45 0x7880 //RX_FDEQ_GAIN_6 +46 0x8888 //RX_FDEQ_GAIN_7 +47 0x949C //RX_FDEQ_GAIN_8 +48 0x96A4 //RX_FDEQ_GAIN_9 +49 0xA994 //RX_FDEQ_GAIN_10 +50 0x9487 //RX_FDEQ_GAIN_11 +51 0x6F64 //RX_FDEQ_GAIN_12 +52 0x625A //RX_FDEQ_GAIN_13 +53 0x5D80 //RX_FDEQ_GAIN_14 +54 0x8890 //RX_FDEQ_GAIN_15 55 0x4848 //RX_FDEQ_GAIN_16 56 0x4848 //RX_FDEQ_GAIN_17 57 0x4848 //RX_FDEQ_GAIN_18 @@ -23903,7 +35890,7 @@ 63 0x0202 //RX_FDEQ_BIN_0 64 0x0202 //RX_FDEQ_BIN_1 65 0x0301 //RX_FDEQ_BIN_2 -66 0x0404 //RX_FDEQ_BIN_3 +66 0x0503 //RX_FDEQ_BIN_3 67 0x0406 //RX_FDEQ_BIN_4 68 0x0109 //RX_FDEQ_BIN_5 69 0x0708 //RX_FDEQ_BIN_6 @@ -23912,9 +35899,9 @@ 72 0x0D0E //RX_FDEQ_BIN_9 73 0x1013 //RX_FDEQ_BIN_10 74 0x1719 //RX_FDEQ_BIN_11 -75 0x1B1E //RX_FDEQ_BIN_12 -76 0x1E1E //RX_FDEQ_BIN_13 -77 0x1E28 //RX_FDEQ_BIN_14 +75 0x1B0F //RX_FDEQ_BIN_12 +76 0x141E //RX_FDEQ_BIN_13 +77 0x3728 //RX_FDEQ_BIN_14 78 0x282C //RX_FDEQ_BIN_15 79 0x0000 //RX_FDEQ_BIN_16 80 0x0000 //RX_FDEQ_BIN_17 @@ -23948,7 +35935,7 @@ 108 0x5333 //RX_FDDRC_SLANT_1_2 109 0x5333 //RX_FDDRC_SLANT_1_3 110 0x0000 //RX_FDDRC_RESRV_0 -129 0x000D //RX_SPK_VOL +129 0x000A //RX_SPK_VOL 130 0x0000 //RX_VOL_RESRV_0 #VOL 1 6 0x1000 //RX_TDDRC_ALPHA_UP_1 @@ -23965,32 +35952,32 @@ 113 0x0002 //RX_TDDRC_THRD_1 114 0x1800 //RX_TDDRC_THRD_2 115 0x1800 //RX_TDDRC_THRD_3 -116 0x3000 //RX_TDDRC_SLANT_0 -117 0x6E00 //RX_TDDRC_SLANT_1 +116 0x7FFF //RX_TDDRC_SLANT_0 +117 0x7FFF //RX_TDDRC_SLANT_1 118 0x1000 //RX_TDDRC_ALPHA_UP_0 119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 120 0x0000 //RX_TDDRC_HMNC_FLAG 121 0x199A //RX_TDDRC_HMNC_GAIN 122 0x0001 //RX_TDDRC_SMT_FLAG 123 0x0CCD //RX_TDDRC_SMT_W -124 0x04E6 //RX_TDDRC_DRC_GAIN +124 0x057F //RX_TDDRC_DRC_GAIN 38 0x0020 //RX_FDEQ_SUBNUM -39 0x4840 //RX_FDEQ_GAIN_0 -40 0x4040 //RX_FDEQ_GAIN_1 -41 0x4054 //RX_FDEQ_GAIN_2 -42 0x5E66 //RX_FDEQ_GAIN_3 -43 0x777C //RX_FDEQ_GAIN_4 -44 0x9681 //RX_FDEQ_GAIN_5 -45 0x7C81 //RX_FDEQ_GAIN_6 -46 0x8787 //RX_FDEQ_GAIN_7 -47 0x8D8E //RX_FDEQ_GAIN_8 -48 0x8F9A //RX_FDEQ_GAIN_9 -49 0xA7AA //RX_FDEQ_GAIN_10 -50 0x9C89 //RX_FDEQ_GAIN_11 -51 0x6F5A //RX_FDEQ_GAIN_12 -52 0x4A48 //RX_FDEQ_GAIN_13 -53 0x4857 //RX_FDEQ_GAIN_14 -54 0x5B6C //RX_FDEQ_GAIN_15 +39 0x483E //RX_FDEQ_GAIN_0 +40 0x3E3E //RX_FDEQ_GAIN_1 +41 0x3E4A //RX_FDEQ_GAIN_2 +42 0x5464 //RX_FDEQ_GAIN_3 +43 0x7072 //RX_FDEQ_GAIN_4 +44 0x8576 //RX_FDEQ_GAIN_5 +45 0x7880 //RX_FDEQ_GAIN_6 +46 0x8888 //RX_FDEQ_GAIN_7 +47 0x949C //RX_FDEQ_GAIN_8 +48 0x96A4 //RX_FDEQ_GAIN_9 +49 0xA994 //RX_FDEQ_GAIN_10 +50 0x9487 //RX_FDEQ_GAIN_11 +51 0x6F64 //RX_FDEQ_GAIN_12 +52 0x625A //RX_FDEQ_GAIN_13 +53 0x5D80 //RX_FDEQ_GAIN_14 +54 0x8890 //RX_FDEQ_GAIN_15 55 0x4848 //RX_FDEQ_GAIN_16 56 0x4848 //RX_FDEQ_GAIN_17 57 0x4848 //RX_FDEQ_GAIN_18 @@ -24002,7 +35989,7 @@ 63 0x0202 //RX_FDEQ_BIN_0 64 0x0202 //RX_FDEQ_BIN_1 65 0x0301 //RX_FDEQ_BIN_2 -66 0x0404 //RX_FDEQ_BIN_3 +66 0x0503 //RX_FDEQ_BIN_3 67 0x0406 //RX_FDEQ_BIN_4 68 0x0109 //RX_FDEQ_BIN_5 69 0x0708 //RX_FDEQ_BIN_6 @@ -24011,9 +35998,9 @@ 72 0x0D0E //RX_FDEQ_BIN_9 73 0x1013 //RX_FDEQ_BIN_10 74 0x1719 //RX_FDEQ_BIN_11 -75 0x1B1E //RX_FDEQ_BIN_12 -76 0x1E1E //RX_FDEQ_BIN_13 -77 0x1E28 //RX_FDEQ_BIN_14 +75 0x1B0F //RX_FDEQ_BIN_12 +76 0x141E //RX_FDEQ_BIN_13 +77 0x3728 //RX_FDEQ_BIN_14 78 0x282C //RX_FDEQ_BIN_15 79 0x0000 //RX_FDEQ_BIN_16 80 0x0000 //RX_FDEQ_BIN_17 @@ -24047,7 +36034,7 @@ 108 0x5333 //RX_FDDRC_SLANT_1_2 109 0x5333 //RX_FDDRC_SLANT_1_3 110 0x0000 //RX_FDDRC_RESRV_0 -129 0x0015 //RX_SPK_VOL +129 0x0010 //RX_SPK_VOL 130 0x0000 //RX_VOL_RESRV_0 #VOL 2 6 0x1000 //RX_TDDRC_ALPHA_UP_1 @@ -24064,32 +36051,32 @@ 113 0x0002 //RX_TDDRC_THRD_1 114 0x1800 //RX_TDDRC_THRD_2 115 0x1800 //RX_TDDRC_THRD_3 -116 0x3000 //RX_TDDRC_SLANT_0 -117 0x6E00 //RX_TDDRC_SLANT_1 +116 0x7FFF //RX_TDDRC_SLANT_0 +117 0x7FFF //RX_TDDRC_SLANT_1 118 0x1000 //RX_TDDRC_ALPHA_UP_0 119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 120 0x0000 //RX_TDDRC_HMNC_FLAG 121 0x199A //RX_TDDRC_HMNC_GAIN 122 0x0001 //RX_TDDRC_SMT_FLAG 123 0x0CCD //RX_TDDRC_SMT_W -124 0x04D8 //RX_TDDRC_DRC_GAIN +124 0x057F //RX_TDDRC_DRC_GAIN 38 0x0020 //RX_FDEQ_SUBNUM -39 0x4840 //RX_FDEQ_GAIN_0 -40 0x4040 //RX_FDEQ_GAIN_1 -41 0x4054 //RX_FDEQ_GAIN_2 -42 0x5E66 //RX_FDEQ_GAIN_3 -43 0x777C //RX_FDEQ_GAIN_4 -44 0x9681 //RX_FDEQ_GAIN_5 -45 0x7C81 //RX_FDEQ_GAIN_6 -46 0x8787 //RX_FDEQ_GAIN_7 -47 0x8D8E //RX_FDEQ_GAIN_8 -48 0x8F9A //RX_FDEQ_GAIN_9 -49 0xA7AA //RX_FDEQ_GAIN_10 -50 0x9C89 //RX_FDEQ_GAIN_11 -51 0x6F5A //RX_FDEQ_GAIN_12 -52 0x4A48 //RX_FDEQ_GAIN_13 -53 0x4857 //RX_FDEQ_GAIN_14 -54 0x5B6C //RX_FDEQ_GAIN_15 +39 0x483E //RX_FDEQ_GAIN_0 +40 0x3E3E //RX_FDEQ_GAIN_1 +41 0x3E4A //RX_FDEQ_GAIN_2 +42 0x5464 //RX_FDEQ_GAIN_3 +43 0x7072 //RX_FDEQ_GAIN_4 +44 0x8576 //RX_FDEQ_GAIN_5 +45 0x7880 //RX_FDEQ_GAIN_6 +46 0x8888 //RX_FDEQ_GAIN_7 +47 0x949C //RX_FDEQ_GAIN_8 +48 0x96A4 //RX_FDEQ_GAIN_9 +49 0xA994 //RX_FDEQ_GAIN_10 +50 0x9487 //RX_FDEQ_GAIN_11 +51 0x6F64 //RX_FDEQ_GAIN_12 +52 0x625A //RX_FDEQ_GAIN_13 +53 0x5D80 //RX_FDEQ_GAIN_14 +54 0x8890 //RX_FDEQ_GAIN_15 55 0x4848 //RX_FDEQ_GAIN_16 56 0x4848 //RX_FDEQ_GAIN_17 57 0x4848 //RX_FDEQ_GAIN_18 @@ -24101,7 +36088,7 @@ 63 0x0202 //RX_FDEQ_BIN_0 64 0x0202 //RX_FDEQ_BIN_1 65 0x0301 //RX_FDEQ_BIN_2 -66 0x0404 //RX_FDEQ_BIN_3 +66 0x0503 //RX_FDEQ_BIN_3 67 0x0406 //RX_FDEQ_BIN_4 68 0x0109 //RX_FDEQ_BIN_5 69 0x0708 //RX_FDEQ_BIN_6 @@ -24110,9 +36097,9 @@ 72 0x0D0E //RX_FDEQ_BIN_9 73 0x1013 //RX_FDEQ_BIN_10 74 0x1719 //RX_FDEQ_BIN_11 -75 0x1B1E //RX_FDEQ_BIN_12 -76 0x1E1E //RX_FDEQ_BIN_13 -77 0x1E28 //RX_FDEQ_BIN_14 +75 0x1B0F //RX_FDEQ_BIN_12 +76 0x141E //RX_FDEQ_BIN_13 +77 0x3728 //RX_FDEQ_BIN_14 78 0x282C //RX_FDEQ_BIN_15 79 0x0000 //RX_FDEQ_BIN_16 80 0x0000 //RX_FDEQ_BIN_17 @@ -24146,7 +36133,7 @@ 108 0x5333 //RX_FDDRC_SLANT_1_2 109 0x5333 //RX_FDDRC_SLANT_1_3 110 0x0000 //RX_FDDRC_RESRV_0 -129 0x0022 //RX_SPK_VOL +129 0x001B //RX_SPK_VOL 130 0x0000 //RX_VOL_RESRV_0 #VOL 3 6 0x1000 //RX_TDDRC_ALPHA_UP_1 @@ -24163,32 +36150,32 @@ 113 0x0002 //RX_TDDRC_THRD_1 114 0x1800 //RX_TDDRC_THRD_2 115 0x1800 //RX_TDDRC_THRD_3 -116 0x3000 //RX_TDDRC_SLANT_0 -117 0x6E00 //RX_TDDRC_SLANT_1 +116 0x7FFF //RX_TDDRC_SLANT_0 +117 0x7FFF //RX_TDDRC_SLANT_1 118 0x1000 //RX_TDDRC_ALPHA_UP_0 119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 120 0x0000 //RX_TDDRC_HMNC_FLAG 121 0x199A //RX_TDDRC_HMNC_GAIN 122 0x0001 //RX_TDDRC_SMT_FLAG 123 0x0CCD //RX_TDDRC_SMT_W -124 0x04E6 //RX_TDDRC_DRC_GAIN +124 0x057F //RX_TDDRC_DRC_GAIN 38 0x0020 //RX_FDEQ_SUBNUM -39 0x4840 //RX_FDEQ_GAIN_0 -40 0x4040 //RX_FDEQ_GAIN_1 -41 0x4054 //RX_FDEQ_GAIN_2 -42 0x5E66 //RX_FDEQ_GAIN_3 -43 0x777C //RX_FDEQ_GAIN_4 -44 0x9681 //RX_FDEQ_GAIN_5 -45 0x7C81 //RX_FDEQ_GAIN_6 -46 0x8787 //RX_FDEQ_GAIN_7 -47 0x8D8E //RX_FDEQ_GAIN_8 -48 0x8F9A //RX_FDEQ_GAIN_9 -49 0xA7AA //RX_FDEQ_GAIN_10 -50 0x9C89 //RX_FDEQ_GAIN_11 -51 0x6F5A //RX_FDEQ_GAIN_12 -52 0x4A48 //RX_FDEQ_GAIN_13 -53 0x4857 //RX_FDEQ_GAIN_14 -54 0x5B6C //RX_FDEQ_GAIN_15 +39 0x483E //RX_FDEQ_GAIN_0 +40 0x3E3E //RX_FDEQ_GAIN_1 +41 0x3E4A //RX_FDEQ_GAIN_2 +42 0x5464 //RX_FDEQ_GAIN_3 +43 0x7072 //RX_FDEQ_GAIN_4 +44 0x8576 //RX_FDEQ_GAIN_5 +45 0x7880 //RX_FDEQ_GAIN_6 +46 0x8888 //RX_FDEQ_GAIN_7 +47 0x949C //RX_FDEQ_GAIN_8 +48 0x96A4 //RX_FDEQ_GAIN_9 +49 0xA994 //RX_FDEQ_GAIN_10 +50 0x9487 //RX_FDEQ_GAIN_11 +51 0x6F64 //RX_FDEQ_GAIN_12 +52 0x625A //RX_FDEQ_GAIN_13 +53 0x5D80 //RX_FDEQ_GAIN_14 +54 0x8890 //RX_FDEQ_GAIN_15 55 0x4848 //RX_FDEQ_GAIN_16 56 0x4848 //RX_FDEQ_GAIN_17 57 0x4848 //RX_FDEQ_GAIN_18 @@ -24200,7 +36187,7 @@ 63 0x0202 //RX_FDEQ_BIN_0 64 0x0202 //RX_FDEQ_BIN_1 65 0x0301 //RX_FDEQ_BIN_2 -66 0x0404 //RX_FDEQ_BIN_3 +66 0x0503 //RX_FDEQ_BIN_3 67 0x0406 //RX_FDEQ_BIN_4 68 0x0109 //RX_FDEQ_BIN_5 69 0x0708 //RX_FDEQ_BIN_6 @@ -24209,9 +36196,9 @@ 72 0x0D0E //RX_FDEQ_BIN_9 73 0x1013 //RX_FDEQ_BIN_10 74 0x1719 //RX_FDEQ_BIN_11 -75 0x1B1E //RX_FDEQ_BIN_12 -76 0x1E1E //RX_FDEQ_BIN_13 -77 0x1E28 //RX_FDEQ_BIN_14 +75 0x1B0F //RX_FDEQ_BIN_12 +76 0x141E //RX_FDEQ_BIN_13 +77 0x3728 //RX_FDEQ_BIN_14 78 0x282C //RX_FDEQ_BIN_15 79 0x0000 //RX_FDEQ_BIN_16 80 0x0000 //RX_FDEQ_BIN_17 @@ -24245,7 +36232,7 @@ 108 0x5333 //RX_FDDRC_SLANT_1_2 109 0x5333 //RX_FDDRC_SLANT_1_3 110 0x0000 //RX_FDDRC_RESRV_0 -129 0x0036 //RX_SPK_VOL +129 0x0032 //RX_SPK_VOL 130 0x0000 //RX_VOL_RESRV_0 #VOL 4 6 0x1000 //RX_TDDRC_ALPHA_UP_1 @@ -24262,32 +36249,32 @@ 113 0x0002 //RX_TDDRC_THRD_1 114 0x1800 //RX_TDDRC_THRD_2 115 0x1800 //RX_TDDRC_THRD_3 -116 0x3000 //RX_TDDRC_SLANT_0 -117 0x6E00 //RX_TDDRC_SLANT_1 +116 0x7FFF //RX_TDDRC_SLANT_0 +117 0x7FFF //RX_TDDRC_SLANT_1 118 0x1000 //RX_TDDRC_ALPHA_UP_0 119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 120 0x0000 //RX_TDDRC_HMNC_FLAG 121 0x199A //RX_TDDRC_HMNC_GAIN 122 0x0001 //RX_TDDRC_SMT_FLAG 123 0x0CCD //RX_TDDRC_SMT_W -124 0x04E6 //RX_TDDRC_DRC_GAIN +124 0x057F //RX_TDDRC_DRC_GAIN 38 0x0020 //RX_FDEQ_SUBNUM -39 0x4840 //RX_FDEQ_GAIN_0 -40 0x4040 //RX_FDEQ_GAIN_1 -41 0x4054 //RX_FDEQ_GAIN_2 -42 0x5E66 //RX_FDEQ_GAIN_3 -43 0x777C //RX_FDEQ_GAIN_4 -44 0x9681 //RX_FDEQ_GAIN_5 -45 0x7C81 //RX_FDEQ_GAIN_6 -46 0x8787 //RX_FDEQ_GAIN_7 -47 0x8D8E //RX_FDEQ_GAIN_8 -48 0x8F9A //RX_FDEQ_GAIN_9 -49 0xA7AA //RX_FDEQ_GAIN_10 -50 0x9C89 //RX_FDEQ_GAIN_11 -51 0x6F5A //RX_FDEQ_GAIN_12 -52 0x4A48 //RX_FDEQ_GAIN_13 -53 0x4857 //RX_FDEQ_GAIN_14 -54 0x5B6C //RX_FDEQ_GAIN_15 +39 0x483E //RX_FDEQ_GAIN_0 +40 0x3E3E //RX_FDEQ_GAIN_1 +41 0x3E4A //RX_FDEQ_GAIN_2 +42 0x5464 //RX_FDEQ_GAIN_3 +43 0x7072 //RX_FDEQ_GAIN_4 +44 0x8576 //RX_FDEQ_GAIN_5 +45 0x7880 //RX_FDEQ_GAIN_6 +46 0x8888 //RX_FDEQ_GAIN_7 +47 0x949C //RX_FDEQ_GAIN_8 +48 0x96A4 //RX_FDEQ_GAIN_9 +49 0xA994 //RX_FDEQ_GAIN_10 +50 0x9487 //RX_FDEQ_GAIN_11 +51 0x6F64 //RX_FDEQ_GAIN_12 +52 0x625A //RX_FDEQ_GAIN_13 +53 0x5D80 //RX_FDEQ_GAIN_14 +54 0x8890 //RX_FDEQ_GAIN_15 55 0x4848 //RX_FDEQ_GAIN_16 56 0x4848 //RX_FDEQ_GAIN_17 57 0x4848 //RX_FDEQ_GAIN_18 @@ -24299,7 +36286,7 @@ 63 0x0202 //RX_FDEQ_BIN_0 64 0x0202 //RX_FDEQ_BIN_1 65 0x0301 //RX_FDEQ_BIN_2 -66 0x0404 //RX_FDEQ_BIN_3 +66 0x0503 //RX_FDEQ_BIN_3 67 0x0406 //RX_FDEQ_BIN_4 68 0x0109 //RX_FDEQ_BIN_5 69 0x0708 //RX_FDEQ_BIN_6 @@ -24308,9 +36295,9 @@ 72 0x0D0E //RX_FDEQ_BIN_9 73 0x1013 //RX_FDEQ_BIN_10 74 0x1719 //RX_FDEQ_BIN_11 -75 0x1B1E //RX_FDEQ_BIN_12 -76 0x1E1E //RX_FDEQ_BIN_13 -77 0x1E28 //RX_FDEQ_BIN_14 +75 0x1B0F //RX_FDEQ_BIN_12 +76 0x141E //RX_FDEQ_BIN_13 +77 0x3728 //RX_FDEQ_BIN_14 78 0x282C //RX_FDEQ_BIN_15 79 0x0000 //RX_FDEQ_BIN_16 80 0x0000 //RX_FDEQ_BIN_17 @@ -24344,7 +36331,7 @@ 108 0x5333 //RX_FDDRC_SLANT_1_2 109 0x5333 //RX_FDDRC_SLANT_1_3 110 0x0000 //RX_FDDRC_RESRV_0 -129 0x0057 //RX_SPK_VOL +129 0x0047 //RX_SPK_VOL 130 0x0000 //RX_VOL_RESRV_0 #VOL 5 6 0x1000 //RX_TDDRC_ALPHA_UP_1 @@ -24361,32 +36348,32 @@ 113 0x0002 //RX_TDDRC_THRD_1 114 0x1800 //RX_TDDRC_THRD_2 115 0x1800 //RX_TDDRC_THRD_3 -116 0x3000 //RX_TDDRC_SLANT_0 -117 0x6E00 //RX_TDDRC_SLANT_1 +116 0x7FFF //RX_TDDRC_SLANT_0 +117 0x7FFF //RX_TDDRC_SLANT_1 118 0x1000 //RX_TDDRC_ALPHA_UP_0 119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 120 0x0000 //RX_TDDRC_HMNC_FLAG 121 0x199A //RX_TDDRC_HMNC_GAIN 122 0x0001 //RX_TDDRC_SMT_FLAG 123 0x0CCD //RX_TDDRC_SMT_W -124 0x04E6 //RX_TDDRC_DRC_GAIN +124 0x057F //RX_TDDRC_DRC_GAIN 38 0x0020 //RX_FDEQ_SUBNUM -39 0x4840 //RX_FDEQ_GAIN_0 -40 0x4040 //RX_FDEQ_GAIN_1 -41 0x4054 //RX_FDEQ_GAIN_2 -42 0x5E66 //RX_FDEQ_GAIN_3 -43 0x777C //RX_FDEQ_GAIN_4 -44 0x9681 //RX_FDEQ_GAIN_5 -45 0x7C81 //RX_FDEQ_GAIN_6 -46 0x8787 //RX_FDEQ_GAIN_7 -47 0x8D8E //RX_FDEQ_GAIN_8 -48 0x8F9A //RX_FDEQ_GAIN_9 -49 0xA7AA //RX_FDEQ_GAIN_10 -50 0x9C89 //RX_FDEQ_GAIN_11 -51 0x6F5A //RX_FDEQ_GAIN_12 -52 0x4A48 //RX_FDEQ_GAIN_13 -53 0x4857 //RX_FDEQ_GAIN_14 -54 0x5B6C //RX_FDEQ_GAIN_15 +39 0x483E //RX_FDEQ_GAIN_0 +40 0x3E3E //RX_FDEQ_GAIN_1 +41 0x3E4A //RX_FDEQ_GAIN_2 +42 0x5464 //RX_FDEQ_GAIN_3 +43 0x7072 //RX_FDEQ_GAIN_4 +44 0x8576 //RX_FDEQ_GAIN_5 +45 0x7880 //RX_FDEQ_GAIN_6 +46 0x8888 //RX_FDEQ_GAIN_7 +47 0x949C //RX_FDEQ_GAIN_8 +48 0x96A4 //RX_FDEQ_GAIN_9 +49 0xA994 //RX_FDEQ_GAIN_10 +50 0x9487 //RX_FDEQ_GAIN_11 +51 0x6F64 //RX_FDEQ_GAIN_12 +52 0x625A //RX_FDEQ_GAIN_13 +53 0x5D80 //RX_FDEQ_GAIN_14 +54 0x8890 //RX_FDEQ_GAIN_15 55 0x4848 //RX_FDEQ_GAIN_16 56 0x4848 //RX_FDEQ_GAIN_17 57 0x4848 //RX_FDEQ_GAIN_18 @@ -24398,7 +36385,7 @@ 63 0x0202 //RX_FDEQ_BIN_0 64 0x0202 //RX_FDEQ_BIN_1 65 0x0301 //RX_FDEQ_BIN_2 -66 0x0404 //RX_FDEQ_BIN_3 +66 0x0503 //RX_FDEQ_BIN_3 67 0x0406 //RX_FDEQ_BIN_4 68 0x0109 //RX_FDEQ_BIN_5 69 0x0708 //RX_FDEQ_BIN_6 @@ -24407,9 +36394,9 @@ 72 0x0D0E //RX_FDEQ_BIN_9 73 0x1013 //RX_FDEQ_BIN_10 74 0x1719 //RX_FDEQ_BIN_11 -75 0x1B1E //RX_FDEQ_BIN_12 -76 0x1E1E //RX_FDEQ_BIN_13 -77 0x1E28 //RX_FDEQ_BIN_14 +75 0x1B0F //RX_FDEQ_BIN_12 +76 0x141E //RX_FDEQ_BIN_13 +77 0x3728 //RX_FDEQ_BIN_14 78 0x282C //RX_FDEQ_BIN_15 79 0x0000 //RX_FDEQ_BIN_16 80 0x0000 //RX_FDEQ_BIN_17 @@ -24443,7 +36430,7 @@ 108 0x5333 //RX_FDDRC_SLANT_1_2 109 0x5333 //RX_FDDRC_SLANT_1_3 110 0x0000 //RX_FDDRC_RESRV_0 -129 0x008D //RX_SPK_VOL +129 0x0076 //RX_SPK_VOL 130 0x0000 //RX_VOL_RESRV_0 #VOL 6 6 0x1000 //RX_TDDRC_ALPHA_UP_1 @@ -24460,32 +36447,32 @@ 113 0x0002 //RX_TDDRC_THRD_1 114 0x1800 //RX_TDDRC_THRD_2 115 0x1800 //RX_TDDRC_THRD_3 -116 0x3000 //RX_TDDRC_SLANT_0 -117 0x6E00 //RX_TDDRC_SLANT_1 +116 0x7FFF //RX_TDDRC_SLANT_0 +117 0x7FFF //RX_TDDRC_SLANT_1 118 0x1000 //RX_TDDRC_ALPHA_UP_0 119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 120 0x0000 //RX_TDDRC_HMNC_FLAG 121 0x199A //RX_TDDRC_HMNC_GAIN 122 0x0001 //RX_TDDRC_SMT_FLAG 123 0x0CCD //RX_TDDRC_SMT_W -124 0x04E6 //RX_TDDRC_DRC_GAIN +124 0x057F //RX_TDDRC_DRC_GAIN 38 0x0020 //RX_FDEQ_SUBNUM -39 0x4840 //RX_FDEQ_GAIN_0 -40 0x4040 //RX_FDEQ_GAIN_1 -41 0x4054 //RX_FDEQ_GAIN_2 -42 0x5E66 //RX_FDEQ_GAIN_3 -43 0x777C //RX_FDEQ_GAIN_4 -44 0x9681 //RX_FDEQ_GAIN_5 -45 0x7C81 //RX_FDEQ_GAIN_6 -46 0x8787 //RX_FDEQ_GAIN_7 -47 0x8D8E //RX_FDEQ_GAIN_8 -48 0x8F9A //RX_FDEQ_GAIN_9 -49 0xA7AA //RX_FDEQ_GAIN_10 -50 0x9C89 //RX_FDEQ_GAIN_11 -51 0x6F5A //RX_FDEQ_GAIN_12 -52 0x4A48 //RX_FDEQ_GAIN_13 -53 0x4857 //RX_FDEQ_GAIN_14 -54 0x5B6C //RX_FDEQ_GAIN_15 +39 0x483E //RX_FDEQ_GAIN_0 +40 0x3E3E //RX_FDEQ_GAIN_1 +41 0x3E4A //RX_FDEQ_GAIN_2 +42 0x5464 //RX_FDEQ_GAIN_3 +43 0x7072 //RX_FDEQ_GAIN_4 +44 0x8576 //RX_FDEQ_GAIN_5 +45 0x7880 //RX_FDEQ_GAIN_6 +46 0x8888 //RX_FDEQ_GAIN_7 +47 0x949C //RX_FDEQ_GAIN_8 +48 0x96A4 //RX_FDEQ_GAIN_9 +49 0xA994 //RX_FDEQ_GAIN_10 +50 0x9487 //RX_FDEQ_GAIN_11 +51 0x6F64 //RX_FDEQ_GAIN_12 +52 0x625A //RX_FDEQ_GAIN_13 +53 0x5D80 //RX_FDEQ_GAIN_14 +54 0x8890 //RX_FDEQ_GAIN_15 55 0x4848 //RX_FDEQ_GAIN_16 56 0x4848 //RX_FDEQ_GAIN_17 57 0x4848 //RX_FDEQ_GAIN_18 @@ -24497,7 +36484,7 @@ 63 0x0202 //RX_FDEQ_BIN_0 64 0x0202 //RX_FDEQ_BIN_1 65 0x0301 //RX_FDEQ_BIN_2 -66 0x0404 //RX_FDEQ_BIN_3 +66 0x0503 //RX_FDEQ_BIN_3 67 0x0406 //RX_FDEQ_BIN_4 68 0x0109 //RX_FDEQ_BIN_5 69 0x0708 //RX_FDEQ_BIN_6 @@ -24506,9 +36493,9 @@ 72 0x0D0E //RX_FDEQ_BIN_9 73 0x1013 //RX_FDEQ_BIN_10 74 0x1719 //RX_FDEQ_BIN_11 -75 0x1B1E //RX_FDEQ_BIN_12 -76 0x1E1E //RX_FDEQ_BIN_13 -77 0x1E28 //RX_FDEQ_BIN_14 +75 0x1B0F //RX_FDEQ_BIN_12 +76 0x141E //RX_FDEQ_BIN_13 +77 0x3728 //RX_FDEQ_BIN_14 78 0x282C //RX_FDEQ_BIN_15 79 0x0000 //RX_FDEQ_BIN_16 80 0x0000 //RX_FDEQ_BIN_17 @@ -24544,10 +36531,862 @@ 110 0x0000 //RX_FDDRC_RESRV_0 129 0x0100 //RX_SPK_VOL 130 0x0000 //RX_VOL_RESRV_0 +#RX 2 +157 0x003C //RX_RECVFUNC_MODE_0 +158 0x0000 //RX_RECVFUNC_MODE_1 +159 0x0003 //RX_SAMPLINGFREQ_SIG +160 0x0003 //RX_SAMPLINGFREQ_PROC +161 0x000A //RX_FRAME_SZ +162 0x0000 //RX_DELAY_OPT +163 0x1000 //RX_TDDRC_ALPHA_UP_1 +164 0x1000 //RX_TDDRC_ALPHA_UP_2 +165 0x1000 //RX_TDDRC_ALPHA_UP_3 +166 0x1000 //RX_TDDRC_ALPHA_UP_4 +167 0x05AA //RX_PGA +168 0x7FFF //RX_A_HP +169 0x4000 //RX_B_PE +170 0x5800 //RX_THR_PITCH_DET_0 +171 0x5000 //RX_THR_PITCH_DET_1 +172 0x4000 //RX_THR_PITCH_DET_2 +173 0x0008 //RX_PITCH_BFR_LEN +174 0x0003 //RX_SBD_PITCH_DET +175 0x0100 //RX_PP_RESRV_0 +176 0x0020 //RX_PP_RESRV_1 +177 0x0600 //RX_N_SN_EST +178 0x000C //RX_N2_SN_EST +179 0x000F //RX_NS_LVL_CTRL +180 0xF800 //RX_THR_SN_EST +181 0x7E00 //RX_LAMBDA_PFILT +182 0x000A //RX_FENS_RESRV_0 +183 0x0190 //RX_FENS_RESRV_1 +184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +187 0x0002 //RX_EXTRA_NS_L +188 0x0800 //RX_EXTRA_NS_A +189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +190 0x7000 //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +192 0x199A //RX_A_POST_FLT +193 0x0000 //RX_LMT_THRD +194 0x4000 //RX_LMT_ALPHA +195 0x0020 //RX_FDEQ_SUBNUM +196 0x483E //RX_FDEQ_GAIN_0 +197 0x3E3E //RX_FDEQ_GAIN_1 +198 0x3E4C //RX_FDEQ_GAIN_2 +199 0x5064 //RX_FDEQ_GAIN_3 +200 0x7076 //RX_FDEQ_GAIN_4 +201 0x897A //RX_FDEQ_GAIN_5 +202 0x7C80 //RX_FDEQ_GAIN_6 +203 0x8888 //RX_FDEQ_GAIN_7 +204 0x949C //RX_FDEQ_GAIN_8 +205 0x96A4 //RX_FDEQ_GAIN_9 +206 0xA9A0 //RX_FDEQ_GAIN_10 +207 0x9487 //RX_FDEQ_GAIN_11 +208 0x6F64 //RX_FDEQ_GAIN_12 +209 0x625A //RX_FDEQ_GAIN_13 +210 0x5D80 //RX_FDEQ_GAIN_14 +211 0x8890 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0202 //RX_FDEQ_BIN_0 +221 0x0202 //RX_FDEQ_BIN_1 +222 0x0301 //RX_FDEQ_BIN_2 +223 0x0404 //RX_FDEQ_BIN_3 +224 0x0406 //RX_FDEQ_BIN_4 +225 0x0109 //RX_FDEQ_BIN_5 +226 0x0708 //RX_FDEQ_BIN_6 +227 0x090A //RX_FDEQ_BIN_7 +228 0x0B0C //RX_FDEQ_BIN_8 +229 0x0D0E //RX_FDEQ_BIN_9 +230 0x1013 //RX_FDEQ_BIN_10 +231 0x1719 //RX_FDEQ_BIN_11 +232 0x1B0F //RX_FDEQ_BIN_12 +233 0x141E //RX_FDEQ_BIN_13 +234 0x3728 //RX_FDEQ_BIN_14 +235 0x282C //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x4000 //RX_FDEQ_RESRV_0 +245 0x0320 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0030 //RX_FDDRC_BAND_MARGIN_1 +248 0x0050 //RX_FDDRC_BAND_MARGIN_2 +249 0x0080 //RX_FDDRC_BAND_MARGIN_3 +250 0x0007 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x5000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x6400 //RX_FDDRC_THRD_3_2 +258 0x6400 //RX_FDDRC_THRD_3_3 +259 0x2000 //RX_FDDRC_SLANT_0_0 +260 0x2000 //RX_FDDRC_SLANT_0_1 +261 0x2000 //RX_FDDRC_SLANT_0_2 +262 0x2000 //RX_FDDRC_SLANT_0_3 +263 0x5333 //RX_FDDRC_SLANT_1_0 +264 0x5333 //RX_FDDRC_SLANT_1_1 +265 0x5333 //RX_FDDRC_SLANT_1_2 +266 0x5333 //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +268 0x0002 //RX_FILTINDX +269 0x0001 //RX_TDDRC_THRD_0 +270 0x0002 //RX_TDDRC_THRD_1 +271 0x1800 //RX_TDDRC_THRD_2 +272 0x1800 //RX_TDDRC_THRD_3 +273 0x7FFF //RX_TDDRC_SLANT_0 +274 0x7FFF //RX_TDDRC_SLANT_1 +275 0x1000 //RX_TDDRC_ALPHA_UP_0 +276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x199A //RX_TDDRC_HMNC_GAIN +279 0x0001 //RX_TDDRC_SMT_FLAG +280 0x0CCD //RX_TDDRC_SMT_W +281 0x0551 //RX_TDDRC_DRC_GAIN +282 0x7C00 //RX_LAMBDA_PKA_FP +283 0x13E0 //RX_TPKA_FP +284 0x0080 //RX_MIN_G_FP +285 0x2000 //RX_MAX_G_FP +286 0x0100 //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 +288 0x0000 //RX_MAXLEVEL_CNG +289 0x3000 //RX_BWE_UV_TH +290 0x3000 //RX_BWE_UV_TH2 +291 0x1800 //RX_BWE_UV_TH3 +292 0x1000 //RX_BWE_V_TH +293 0x04CD //RX_BWE_GAIN1_V_TH1 +294 0x0F33 //RX_BWE_GAIN1_V_TH2 +295 0x7333 //RX_BWE_UV_EQ +296 0x199A //RX_BWE_V_EQ +297 0x7333 //RX_BWE_TONE_TH +298 0x0004 //RX_BWE_UV_HOLD_T +299 0x6CCD //RX_BWE_GAIN2_ALPHA +300 0x799A //RX_BWE_GAIN3_ALPHA +301 0x001E //RX_BWE_CUTOFF +302 0x3000 //RX_BWE_GAINFILL +303 0x3200 //RX_BWE_MAXTH_TONE +304 0x2000 //RX_BWE_EQ_0 +305 0x2000 //RX_BWE_EQ_1 +306 0x2000 //RX_BWE_EQ_2 +307 0x2000 //RX_BWE_EQ_3 +308 0x2000 //RX_BWE_EQ_4 +309 0x2000 //RX_BWE_EQ_5 +310 0x2000 //RX_BWE_EQ_6 +311 0x0000 //RX_BWE_RESRV_0 +312 0x0000 //RX_BWE_RESRV_1 +313 0x0000 //RX_BWE_RESRV_2 +#VOL 0 +163 0x1000 //RX_TDDRC_ALPHA_UP_1 +164 0x1000 //RX_TDDRC_ALPHA_UP_2 +165 0x1000 //RX_TDDRC_ALPHA_UP_3 +166 0x1000 //RX_TDDRC_ALPHA_UP_4 +184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +190 0x7000 //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +269 0x0001 //RX_TDDRC_THRD_0 +270 0x0002 //RX_TDDRC_THRD_1 +271 0x1800 //RX_TDDRC_THRD_2 +272 0x1800 //RX_TDDRC_THRD_3 +273 0x7FFF //RX_TDDRC_SLANT_0 +274 0x7FFF //RX_TDDRC_SLANT_1 +275 0x1000 //RX_TDDRC_ALPHA_UP_0 +276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x199A //RX_TDDRC_HMNC_GAIN +279 0x0001 //RX_TDDRC_SMT_FLAG +280 0x0CCD //RX_TDDRC_SMT_W +281 0x0551 //RX_TDDRC_DRC_GAIN +195 0x0020 //RX_FDEQ_SUBNUM +196 0x483E //RX_FDEQ_GAIN_0 +197 0x3E3E //RX_FDEQ_GAIN_1 +198 0x3E4C //RX_FDEQ_GAIN_2 +199 0x5064 //RX_FDEQ_GAIN_3 +200 0x7076 //RX_FDEQ_GAIN_4 +201 0x897A //RX_FDEQ_GAIN_5 +202 0x7C80 //RX_FDEQ_GAIN_6 +203 0x8888 //RX_FDEQ_GAIN_7 +204 0x949C //RX_FDEQ_GAIN_8 +205 0x96A4 //RX_FDEQ_GAIN_9 +206 0xA9A0 //RX_FDEQ_GAIN_10 +207 0x9487 //RX_FDEQ_GAIN_11 +208 0x6F64 //RX_FDEQ_GAIN_12 +209 0x625A //RX_FDEQ_GAIN_13 +210 0x5D80 //RX_FDEQ_GAIN_14 +211 0x8890 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0202 //RX_FDEQ_BIN_0 +221 0x0202 //RX_FDEQ_BIN_1 +222 0x0301 //RX_FDEQ_BIN_2 +223 0x0404 //RX_FDEQ_BIN_3 +224 0x0406 //RX_FDEQ_BIN_4 +225 0x0109 //RX_FDEQ_BIN_5 +226 0x0708 //RX_FDEQ_BIN_6 +227 0x090A //RX_FDEQ_BIN_7 +228 0x0B0C //RX_FDEQ_BIN_8 +229 0x0D0E //RX_FDEQ_BIN_9 +230 0x1013 //RX_FDEQ_BIN_10 +231 0x1719 //RX_FDEQ_BIN_11 +232 0x1B0F //RX_FDEQ_BIN_12 +233 0x141E //RX_FDEQ_BIN_13 +234 0x3728 //RX_FDEQ_BIN_14 +235 0x282C //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x4000 //RX_FDEQ_RESRV_0 +245 0x0320 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0030 //RX_FDDRC_BAND_MARGIN_1 +248 0x0050 //RX_FDDRC_BAND_MARGIN_2 +249 0x0080 //RX_FDDRC_BAND_MARGIN_3 +250 0x0007 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x5000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x6400 //RX_FDDRC_THRD_3_2 +258 0x6400 //RX_FDDRC_THRD_3_3 +259 0x2000 //RX_FDDRC_SLANT_0_0 +260 0x2000 //RX_FDDRC_SLANT_0_1 +261 0x2000 //RX_FDDRC_SLANT_0_2 +262 0x2000 //RX_FDDRC_SLANT_0_3 +263 0x5333 //RX_FDDRC_SLANT_1_0 +264 0x5333 //RX_FDDRC_SLANT_1_1 +265 0x5333 //RX_FDDRC_SLANT_1_2 +266 0x5333 //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +286 0x000A //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 +#VOL 1 +163 0x1000 //RX_TDDRC_ALPHA_UP_1 +164 0x1000 //RX_TDDRC_ALPHA_UP_2 +165 0x1000 //RX_TDDRC_ALPHA_UP_3 +166 0x1000 //RX_TDDRC_ALPHA_UP_4 +184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +190 0x7000 //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +269 0x0001 //RX_TDDRC_THRD_0 +270 0x0002 //RX_TDDRC_THRD_1 +271 0x1800 //RX_TDDRC_THRD_2 +272 0x1800 //RX_TDDRC_THRD_3 +273 0x7FFF //RX_TDDRC_SLANT_0 +274 0x7FFF //RX_TDDRC_SLANT_1 +275 0x1000 //RX_TDDRC_ALPHA_UP_0 +276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x199A //RX_TDDRC_HMNC_GAIN +279 0x0001 //RX_TDDRC_SMT_FLAG +280 0x0CCD //RX_TDDRC_SMT_W +281 0x0551 //RX_TDDRC_DRC_GAIN +195 0x0020 //RX_FDEQ_SUBNUM +196 0x483E //RX_FDEQ_GAIN_0 +197 0x3E3E //RX_FDEQ_GAIN_1 +198 0x3E4C //RX_FDEQ_GAIN_2 +199 0x5064 //RX_FDEQ_GAIN_3 +200 0x7076 //RX_FDEQ_GAIN_4 +201 0x897A //RX_FDEQ_GAIN_5 +202 0x7C80 //RX_FDEQ_GAIN_6 +203 0x8888 //RX_FDEQ_GAIN_7 +204 0x949C //RX_FDEQ_GAIN_8 +205 0x96A4 //RX_FDEQ_GAIN_9 +206 0xA9A0 //RX_FDEQ_GAIN_10 +207 0x9487 //RX_FDEQ_GAIN_11 +208 0x6F64 //RX_FDEQ_GAIN_12 +209 0x625A //RX_FDEQ_GAIN_13 +210 0x5D80 //RX_FDEQ_GAIN_14 +211 0x8890 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0202 //RX_FDEQ_BIN_0 +221 0x0202 //RX_FDEQ_BIN_1 +222 0x0301 //RX_FDEQ_BIN_2 +223 0x0404 //RX_FDEQ_BIN_3 +224 0x0406 //RX_FDEQ_BIN_4 +225 0x0109 //RX_FDEQ_BIN_5 +226 0x0708 //RX_FDEQ_BIN_6 +227 0x090A //RX_FDEQ_BIN_7 +228 0x0B0C //RX_FDEQ_BIN_8 +229 0x0D0E //RX_FDEQ_BIN_9 +230 0x1013 //RX_FDEQ_BIN_10 +231 0x1719 //RX_FDEQ_BIN_11 +232 0x1B0F //RX_FDEQ_BIN_12 +233 0x141E //RX_FDEQ_BIN_13 +234 0x3728 //RX_FDEQ_BIN_14 +235 0x282C //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x4000 //RX_FDEQ_RESRV_0 +245 0x0320 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0030 //RX_FDDRC_BAND_MARGIN_1 +248 0x0050 //RX_FDDRC_BAND_MARGIN_2 +249 0x0080 //RX_FDDRC_BAND_MARGIN_3 +250 0x0007 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x5000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x6400 //RX_FDDRC_THRD_3_2 +258 0x6400 //RX_FDDRC_THRD_3_3 +259 0x2000 //RX_FDDRC_SLANT_0_0 +260 0x2000 //RX_FDDRC_SLANT_0_1 +261 0x2000 //RX_FDDRC_SLANT_0_2 +262 0x2000 //RX_FDDRC_SLANT_0_3 +263 0x5333 //RX_FDDRC_SLANT_1_0 +264 0x5333 //RX_FDDRC_SLANT_1_1 +265 0x5333 //RX_FDDRC_SLANT_1_2 +266 0x5333 //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +286 0x0010 //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 +#VOL 2 +163 0x1000 //RX_TDDRC_ALPHA_UP_1 +164 0x1000 //RX_TDDRC_ALPHA_UP_2 +165 0x1000 //RX_TDDRC_ALPHA_UP_3 +166 0x1000 //RX_TDDRC_ALPHA_UP_4 +184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +190 0x7000 //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +269 0x0001 //RX_TDDRC_THRD_0 +270 0x0002 //RX_TDDRC_THRD_1 +271 0x1800 //RX_TDDRC_THRD_2 +272 0x1800 //RX_TDDRC_THRD_3 +273 0x7FFF //RX_TDDRC_SLANT_0 +274 0x7FFF //RX_TDDRC_SLANT_1 +275 0x1000 //RX_TDDRC_ALPHA_UP_0 +276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x199A //RX_TDDRC_HMNC_GAIN +279 0x0001 //RX_TDDRC_SMT_FLAG +280 0x0CCD //RX_TDDRC_SMT_W +281 0x0551 //RX_TDDRC_DRC_GAIN +195 0x0020 //RX_FDEQ_SUBNUM +196 0x483E //RX_FDEQ_GAIN_0 +197 0x3E3E //RX_FDEQ_GAIN_1 +198 0x3E4C //RX_FDEQ_GAIN_2 +199 0x5064 //RX_FDEQ_GAIN_3 +200 0x7076 //RX_FDEQ_GAIN_4 +201 0x897A //RX_FDEQ_GAIN_5 +202 0x7C80 //RX_FDEQ_GAIN_6 +203 0x8888 //RX_FDEQ_GAIN_7 +204 0x949C //RX_FDEQ_GAIN_8 +205 0x96A4 //RX_FDEQ_GAIN_9 +206 0xA9A0 //RX_FDEQ_GAIN_10 +207 0x9487 //RX_FDEQ_GAIN_11 +208 0x6F64 //RX_FDEQ_GAIN_12 +209 0x625A //RX_FDEQ_GAIN_13 +210 0x5D80 //RX_FDEQ_GAIN_14 +211 0x8890 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0202 //RX_FDEQ_BIN_0 +221 0x0202 //RX_FDEQ_BIN_1 +222 0x0301 //RX_FDEQ_BIN_2 +223 0x0404 //RX_FDEQ_BIN_3 +224 0x0406 //RX_FDEQ_BIN_4 +225 0x0109 //RX_FDEQ_BIN_5 +226 0x0708 //RX_FDEQ_BIN_6 +227 0x090A //RX_FDEQ_BIN_7 +228 0x0B0C //RX_FDEQ_BIN_8 +229 0x0D0E //RX_FDEQ_BIN_9 +230 0x1013 //RX_FDEQ_BIN_10 +231 0x1719 //RX_FDEQ_BIN_11 +232 0x1B0F //RX_FDEQ_BIN_12 +233 0x141E //RX_FDEQ_BIN_13 +234 0x3728 //RX_FDEQ_BIN_14 +235 0x282C //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x4000 //RX_FDEQ_RESRV_0 +245 0x0320 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0030 //RX_FDDRC_BAND_MARGIN_1 +248 0x0050 //RX_FDDRC_BAND_MARGIN_2 +249 0x0080 //RX_FDDRC_BAND_MARGIN_3 +250 0x0007 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x5000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x6400 //RX_FDDRC_THRD_3_2 +258 0x6400 //RX_FDDRC_THRD_3_3 +259 0x2000 //RX_FDDRC_SLANT_0_0 +260 0x2000 //RX_FDDRC_SLANT_0_1 +261 0x2000 //RX_FDDRC_SLANT_0_2 +262 0x2000 //RX_FDDRC_SLANT_0_3 +263 0x5333 //RX_FDDRC_SLANT_1_0 +264 0x5333 //RX_FDDRC_SLANT_1_1 +265 0x5333 //RX_FDDRC_SLANT_1_2 +266 0x5333 //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +286 0x001B //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 +#VOL 3 +163 0x1000 //RX_TDDRC_ALPHA_UP_1 +164 0x1000 //RX_TDDRC_ALPHA_UP_2 +165 0x1000 //RX_TDDRC_ALPHA_UP_3 +166 0x1000 //RX_TDDRC_ALPHA_UP_4 +184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +190 0x7000 //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +269 0x0001 //RX_TDDRC_THRD_0 +270 0x0002 //RX_TDDRC_THRD_1 +271 0x1800 //RX_TDDRC_THRD_2 +272 0x1800 //RX_TDDRC_THRD_3 +273 0x7FFF //RX_TDDRC_SLANT_0 +274 0x7FFF //RX_TDDRC_SLANT_1 +275 0x1000 //RX_TDDRC_ALPHA_UP_0 +276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x199A //RX_TDDRC_HMNC_GAIN +279 0x0001 //RX_TDDRC_SMT_FLAG +280 0x0CCD //RX_TDDRC_SMT_W +281 0x0551 //RX_TDDRC_DRC_GAIN +195 0x0020 //RX_FDEQ_SUBNUM +196 0x483E //RX_FDEQ_GAIN_0 +197 0x3E3E //RX_FDEQ_GAIN_1 +198 0x3E4C //RX_FDEQ_GAIN_2 +199 0x5064 //RX_FDEQ_GAIN_3 +200 0x7076 //RX_FDEQ_GAIN_4 +201 0x897A //RX_FDEQ_GAIN_5 +202 0x7C80 //RX_FDEQ_GAIN_6 +203 0x8888 //RX_FDEQ_GAIN_7 +204 0x949C //RX_FDEQ_GAIN_8 +205 0x96A4 //RX_FDEQ_GAIN_9 +206 0xA9A0 //RX_FDEQ_GAIN_10 +207 0x9487 //RX_FDEQ_GAIN_11 +208 0x6F64 //RX_FDEQ_GAIN_12 +209 0x625A //RX_FDEQ_GAIN_13 +210 0x5D80 //RX_FDEQ_GAIN_14 +211 0x8890 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0202 //RX_FDEQ_BIN_0 +221 0x0202 //RX_FDEQ_BIN_1 +222 0x0301 //RX_FDEQ_BIN_2 +223 0x0404 //RX_FDEQ_BIN_3 +224 0x0406 //RX_FDEQ_BIN_4 +225 0x0109 //RX_FDEQ_BIN_5 +226 0x0708 //RX_FDEQ_BIN_6 +227 0x090A //RX_FDEQ_BIN_7 +228 0x0B0C //RX_FDEQ_BIN_8 +229 0x0D0E //RX_FDEQ_BIN_9 +230 0x1013 //RX_FDEQ_BIN_10 +231 0x1719 //RX_FDEQ_BIN_11 +232 0x1B0F //RX_FDEQ_BIN_12 +233 0x141E //RX_FDEQ_BIN_13 +234 0x3728 //RX_FDEQ_BIN_14 +235 0x282C //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x4000 //RX_FDEQ_RESRV_0 +245 0x0320 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0030 //RX_FDDRC_BAND_MARGIN_1 +248 0x0050 //RX_FDDRC_BAND_MARGIN_2 +249 0x0080 //RX_FDDRC_BAND_MARGIN_3 +250 0x0007 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x5000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x6400 //RX_FDDRC_THRD_3_2 +258 0x6400 //RX_FDDRC_THRD_3_3 +259 0x2000 //RX_FDDRC_SLANT_0_0 +260 0x2000 //RX_FDDRC_SLANT_0_1 +261 0x2000 //RX_FDDRC_SLANT_0_2 +262 0x2000 //RX_FDDRC_SLANT_0_3 +263 0x5333 //RX_FDDRC_SLANT_1_0 +264 0x5333 //RX_FDDRC_SLANT_1_1 +265 0x5333 //RX_FDDRC_SLANT_1_2 +266 0x5333 //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +286 0x0032 //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 +#VOL 4 +163 0x1000 //RX_TDDRC_ALPHA_UP_1 +164 0x1000 //RX_TDDRC_ALPHA_UP_2 +165 0x1000 //RX_TDDRC_ALPHA_UP_3 +166 0x1000 //RX_TDDRC_ALPHA_UP_4 +184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +190 0x7000 //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +269 0x0001 //RX_TDDRC_THRD_0 +270 0x0002 //RX_TDDRC_THRD_1 +271 0x1800 //RX_TDDRC_THRD_2 +272 0x1800 //RX_TDDRC_THRD_3 +273 0x7FFF //RX_TDDRC_SLANT_0 +274 0x7FFF //RX_TDDRC_SLANT_1 +275 0x1000 //RX_TDDRC_ALPHA_UP_0 +276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x199A //RX_TDDRC_HMNC_GAIN +279 0x0001 //RX_TDDRC_SMT_FLAG +280 0x0CCD //RX_TDDRC_SMT_W +281 0x0551 //RX_TDDRC_DRC_GAIN +195 0x0020 //RX_FDEQ_SUBNUM +196 0x483E //RX_FDEQ_GAIN_0 +197 0x3E3E //RX_FDEQ_GAIN_1 +198 0x3E4C //RX_FDEQ_GAIN_2 +199 0x5064 //RX_FDEQ_GAIN_3 +200 0x7076 //RX_FDEQ_GAIN_4 +201 0x897A //RX_FDEQ_GAIN_5 +202 0x7C80 //RX_FDEQ_GAIN_6 +203 0x8888 //RX_FDEQ_GAIN_7 +204 0x949C //RX_FDEQ_GAIN_8 +205 0x96A4 //RX_FDEQ_GAIN_9 +206 0xA9A0 //RX_FDEQ_GAIN_10 +207 0x9487 //RX_FDEQ_GAIN_11 +208 0x6F64 //RX_FDEQ_GAIN_12 +209 0x625A //RX_FDEQ_GAIN_13 +210 0x5D80 //RX_FDEQ_GAIN_14 +211 0x8890 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0202 //RX_FDEQ_BIN_0 +221 0x0202 //RX_FDEQ_BIN_1 +222 0x0301 //RX_FDEQ_BIN_2 +223 0x0404 //RX_FDEQ_BIN_3 +224 0x0406 //RX_FDEQ_BIN_4 +225 0x0109 //RX_FDEQ_BIN_5 +226 0x0708 //RX_FDEQ_BIN_6 +227 0x090A //RX_FDEQ_BIN_7 +228 0x0B0C //RX_FDEQ_BIN_8 +229 0x0D0E //RX_FDEQ_BIN_9 +230 0x1013 //RX_FDEQ_BIN_10 +231 0x1719 //RX_FDEQ_BIN_11 +232 0x1B0F //RX_FDEQ_BIN_12 +233 0x141E //RX_FDEQ_BIN_13 +234 0x3728 //RX_FDEQ_BIN_14 +235 0x282C //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x4000 //RX_FDEQ_RESRV_0 +245 0x0320 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0030 //RX_FDDRC_BAND_MARGIN_1 +248 0x0050 //RX_FDDRC_BAND_MARGIN_2 +249 0x0080 //RX_FDDRC_BAND_MARGIN_3 +250 0x0007 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x5000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x6400 //RX_FDDRC_THRD_3_2 +258 0x6400 //RX_FDDRC_THRD_3_3 +259 0x2000 //RX_FDDRC_SLANT_0_0 +260 0x2000 //RX_FDDRC_SLANT_0_1 +261 0x2000 //RX_FDDRC_SLANT_0_2 +262 0x2000 //RX_FDDRC_SLANT_0_3 +263 0x5333 //RX_FDDRC_SLANT_1_0 +264 0x5333 //RX_FDDRC_SLANT_1_1 +265 0x5333 //RX_FDDRC_SLANT_1_2 +266 0x5333 //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +286 0x0047 //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 +#VOL 5 +163 0x1000 //RX_TDDRC_ALPHA_UP_1 +164 0x1000 //RX_TDDRC_ALPHA_UP_2 +165 0x1000 //RX_TDDRC_ALPHA_UP_3 +166 0x1000 //RX_TDDRC_ALPHA_UP_4 +184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +190 0x7000 //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +269 0x0001 //RX_TDDRC_THRD_0 +270 0x0002 //RX_TDDRC_THRD_1 +271 0x1800 //RX_TDDRC_THRD_2 +272 0x1800 //RX_TDDRC_THRD_3 +273 0x7FFF //RX_TDDRC_SLANT_0 +274 0x7FFF //RX_TDDRC_SLANT_1 +275 0x1000 //RX_TDDRC_ALPHA_UP_0 +276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x199A //RX_TDDRC_HMNC_GAIN +279 0x0001 //RX_TDDRC_SMT_FLAG +280 0x0CCD //RX_TDDRC_SMT_W +281 0x0551 //RX_TDDRC_DRC_GAIN +195 0x0020 //RX_FDEQ_SUBNUM +196 0x483E //RX_FDEQ_GAIN_0 +197 0x3E3E //RX_FDEQ_GAIN_1 +198 0x3E4C //RX_FDEQ_GAIN_2 +199 0x5064 //RX_FDEQ_GAIN_3 +200 0x7076 //RX_FDEQ_GAIN_4 +201 0x897A //RX_FDEQ_GAIN_5 +202 0x7C80 //RX_FDEQ_GAIN_6 +203 0x8888 //RX_FDEQ_GAIN_7 +204 0x949C //RX_FDEQ_GAIN_8 +205 0x96A4 //RX_FDEQ_GAIN_9 +206 0xA9A0 //RX_FDEQ_GAIN_10 +207 0x9487 //RX_FDEQ_GAIN_11 +208 0x6F64 //RX_FDEQ_GAIN_12 +209 0x625A //RX_FDEQ_GAIN_13 +210 0x5D80 //RX_FDEQ_GAIN_14 +211 0x8890 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0202 //RX_FDEQ_BIN_0 +221 0x0202 //RX_FDEQ_BIN_1 +222 0x0301 //RX_FDEQ_BIN_2 +223 0x0404 //RX_FDEQ_BIN_3 +224 0x0406 //RX_FDEQ_BIN_4 +225 0x0109 //RX_FDEQ_BIN_5 +226 0x0708 //RX_FDEQ_BIN_6 +227 0x090A //RX_FDEQ_BIN_7 +228 0x0B0C //RX_FDEQ_BIN_8 +229 0x0D0E //RX_FDEQ_BIN_9 +230 0x1013 //RX_FDEQ_BIN_10 +231 0x1719 //RX_FDEQ_BIN_11 +232 0x1B0F //RX_FDEQ_BIN_12 +233 0x141E //RX_FDEQ_BIN_13 +234 0x3728 //RX_FDEQ_BIN_14 +235 0x282C //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x4000 //RX_FDEQ_RESRV_0 +245 0x0320 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0030 //RX_FDDRC_BAND_MARGIN_1 +248 0x0050 //RX_FDDRC_BAND_MARGIN_2 +249 0x0080 //RX_FDDRC_BAND_MARGIN_3 +250 0x0007 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x5000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x6400 //RX_FDDRC_THRD_3_2 +258 0x6400 //RX_FDDRC_THRD_3_3 +259 0x2000 //RX_FDDRC_SLANT_0_0 +260 0x2000 //RX_FDDRC_SLANT_0_1 +261 0x2000 //RX_FDDRC_SLANT_0_2 +262 0x2000 //RX_FDDRC_SLANT_0_3 +263 0x5333 //RX_FDDRC_SLANT_1_0 +264 0x5333 //RX_FDDRC_SLANT_1_1 +265 0x5333 //RX_FDDRC_SLANT_1_2 +266 0x5333 //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +286 0x0076 //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 +#VOL 6 +163 0x1000 //RX_TDDRC_ALPHA_UP_1 +164 0x1000 //RX_TDDRC_ALPHA_UP_2 +165 0x1000 //RX_TDDRC_ALPHA_UP_3 +166 0x1000 //RX_TDDRC_ALPHA_UP_4 +184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +190 0x7000 //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +269 0x0001 //RX_TDDRC_THRD_0 +270 0x0002 //RX_TDDRC_THRD_1 +271 0x1800 //RX_TDDRC_THRD_2 +272 0x1800 //RX_TDDRC_THRD_3 +273 0x7FFF //RX_TDDRC_SLANT_0 +274 0x7FFF //RX_TDDRC_SLANT_1 +275 0x1000 //RX_TDDRC_ALPHA_UP_0 +276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x199A //RX_TDDRC_HMNC_GAIN +279 0x0001 //RX_TDDRC_SMT_FLAG +280 0x0CCD //RX_TDDRC_SMT_W +281 0x0551 //RX_TDDRC_DRC_GAIN +195 0x0020 //RX_FDEQ_SUBNUM +196 0x483E //RX_FDEQ_GAIN_0 +197 0x3E3E //RX_FDEQ_GAIN_1 +198 0x3E4C //RX_FDEQ_GAIN_2 +199 0x5064 //RX_FDEQ_GAIN_3 +200 0x7076 //RX_FDEQ_GAIN_4 +201 0x897A //RX_FDEQ_GAIN_5 +202 0x7C80 //RX_FDEQ_GAIN_6 +203 0x8888 //RX_FDEQ_GAIN_7 +204 0x949C //RX_FDEQ_GAIN_8 +205 0x96A4 //RX_FDEQ_GAIN_9 +206 0xA9A0 //RX_FDEQ_GAIN_10 +207 0x9487 //RX_FDEQ_GAIN_11 +208 0x6F64 //RX_FDEQ_GAIN_12 +209 0x625A //RX_FDEQ_GAIN_13 +210 0x5D80 //RX_FDEQ_GAIN_14 +211 0x8890 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0202 //RX_FDEQ_BIN_0 +221 0x0202 //RX_FDEQ_BIN_1 +222 0x0301 //RX_FDEQ_BIN_2 +223 0x0404 //RX_FDEQ_BIN_3 +224 0x0406 //RX_FDEQ_BIN_4 +225 0x0109 //RX_FDEQ_BIN_5 +226 0x0708 //RX_FDEQ_BIN_6 +227 0x090A //RX_FDEQ_BIN_7 +228 0x0B0C //RX_FDEQ_BIN_8 +229 0x0D0E //RX_FDEQ_BIN_9 +230 0x1013 //RX_FDEQ_BIN_10 +231 0x1719 //RX_FDEQ_BIN_11 +232 0x1B0F //RX_FDEQ_BIN_12 +233 0x141E //RX_FDEQ_BIN_13 +234 0x3728 //RX_FDEQ_BIN_14 +235 0x282C //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x4000 //RX_FDEQ_RESRV_0 +245 0x0320 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0030 //RX_FDDRC_BAND_MARGIN_1 +248 0x0050 //RX_FDDRC_BAND_MARGIN_2 +249 0x0080 //RX_FDDRC_BAND_MARGIN_3 +250 0x0007 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x5000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x6400 //RX_FDDRC_THRD_3_2 +258 0x6400 //RX_FDDRC_THRD_3_3 +259 0x2000 //RX_FDDRC_SLANT_0_0 +260 0x2000 //RX_FDDRC_SLANT_0_1 +261 0x2000 //RX_FDDRC_SLANT_0_2 +262 0x2000 //RX_FDDRC_SLANT_0_3 +263 0x5333 //RX_FDDRC_SLANT_1_0 +264 0x5333 //RX_FDDRC_SLANT_1_1 +265 0x5333 //RX_FDDRC_SLANT_1_2 +266 0x5333 //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +286 0x0100 //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 #CASE_NAME HANDSET-HANDSET-TMOBILE_US-FB -#PARAM_TYPE TX+RX -#TOTAL_CUSTOM_STEP 7 +#PARAM_MODE Full +#PARAM_TYPE TX+2RX +#TOTAL_CUSTOM_STEP 7+7 #TX 0 0x0000 //TX_OPERATION_MODE_0 1 0x0000 //TX_OPERATION_MODE_1 @@ -24570,7 +37409,7 @@ 18 0x0000 //TX_SYS_RESRV_2 19 0x0000 //TX_SYS_RESRV_3 20 0x0000 //TX_DIST2REF0 -21 0x00A4 //TX_DIST2REF1 +21 0x00A3 //TX_DIST2REF1 22 0x0000 //TX_DIST2REF_02 23 0x0000 //TX_DIST2REF_03 24 0x0000 //TX_DIST2REF_04 @@ -24800,12 +37639,12 @@ 248 0xF800 //TX_THR_SN_EST_6 249 0xF700 //TX_THR_SN_EST_7 250 0x0000 //TX_DELTA_THR_SN_EST_0 -251 0x0100 //TX_DELTA_THR_SN_EST_1 +251 0x0200 //TX_DELTA_THR_SN_EST_1 252 0x0200 //TX_DELTA_THR_SN_EST_2 253 0x0200 //TX_DELTA_THR_SN_EST_3 -254 0x0200 //TX_DELTA_THR_SN_EST_4 -255 0x0100 //TX_DELTA_THR_SN_EST_5 -256 0x0200 //TX_DELTA_THR_SN_EST_6 +254 0x0100 //TX_DELTA_THR_SN_EST_4 +255 0x0200 //TX_DELTA_THR_SN_EST_5 +256 0x0100 //TX_DELTA_THR_SN_EST_6 257 0x0200 //TX_DELTA_THR_SN_EST_7 258 0x4000 //TX_LAMBDA_NN_EST_0 259 0x4000 //TX_LAMBDA_NN_EST_1 @@ -24833,16 +37672,16 @@ 281 0x0014 //TX_NS_LVL_CTRL_0 282 0x0016 //TX_NS_LVL_CTRL_1 283 0x0016 //TX_NS_LVL_CTRL_2 -284 0x0016 //TX_NS_LVL_CTRL_3 -285 0x0018 //TX_NS_LVL_CTRL_4 -286 0x0016 //TX_NS_LVL_CTRL_5 -287 0x0012 //TX_NS_LVL_CTRL_6 +284 0x0018 //TX_NS_LVL_CTRL_3 +285 0x0016 //TX_NS_LVL_CTRL_4 +286 0x0012 //TX_NS_LVL_CTRL_5 +287 0x0016 //TX_NS_LVL_CTRL_6 288 0x0017 //TX_NS_LVL_CTRL_7 289 0x000E //TX_MIN_GAIN_S_0 -290 0x0012 //TX_MIN_GAIN_S_1 -291 0x0007 //TX_MIN_GAIN_S_2 -292 0x0012 //TX_MIN_GAIN_S_3 -293 0x0010 //TX_MIN_GAIN_S_4 +290 0x0007 //TX_MIN_GAIN_S_1 +291 0x0012 //TX_MIN_GAIN_S_2 +292 0x0010 //TX_MIN_GAIN_S_3 +293 0x0012 //TX_MIN_GAIN_S_4 294 0x0012 //TX_MIN_GAIN_S_5 295 0x0012 //TX_MIN_GAIN_S_6 296 0x0012 //TX_MIN_GAIN_S_7 @@ -24864,29 +37703,29 @@ 312 0x7FFF //TX_A_POST_FILT_0 313 0x2000 //TX_A_POST_FILT_1 314 0x4000 //TX_A_POST_FILT_S_0 -315 0x5000 //TX_A_POST_FILT_S_1 +315 0x4000 //TX_A_POST_FILT_S_1 316 0x4000 //TX_A_POST_FILT_S_2 317 0x4000 //TX_A_POST_FILT_S_3 318 0x4000 //TX_A_POST_FILT_S_4 319 0x4000 //TX_A_POST_FILT_S_5 -320 0x4000 //TX_A_POST_FILT_S_6 +320 0x5000 //TX_A_POST_FILT_S_6 321 0x7000 //TX_A_POST_FILT_S_7 322 0x1000 //TX_B_POST_FILT_0 323 0x2000 //TX_B_POST_FILT_1 -324 0x3000 //TX_B_POST_FILT_2 +324 0x2000 //TX_B_POST_FILT_2 325 0x2000 //TX_B_POST_FILT_3 -326 0x5000 //TX_B_POST_FILT_4 +326 0x2000 //TX_B_POST_FILT_4 327 0x2000 //TX_B_POST_FILT_5 -328 0x6000 //TX_B_POST_FILT_6 +328 0x3000 //TX_B_POST_FILT_6 329 0x3000 //TX_B_POST_FILT_7 330 0x1000 //TX_B_LESSCUT_RTO_S_0 -331 0x6000 //TX_B_LESSCUT_RTO_S_1 -332 0x6000 //TX_B_LESSCUT_RTO_S_2 -333 0x6000 //TX_B_LESSCUT_RTO_S_3 -334 0x6000 //TX_B_LESSCUT_RTO_S_4 -335 0x6000 //TX_B_LESSCUT_RTO_S_5 -336 0x7FFF //TX_B_LESSCUT_RTO_S_6 -337 0x7FFF //TX_B_LESSCUT_RTO_S_7 +331 0x1000 //TX_B_LESSCUT_RTO_S_1 +332 0x1000 //TX_B_LESSCUT_RTO_S_2 +333 0x1000 //TX_B_LESSCUT_RTO_S_3 +334 0x1000 //TX_B_LESSCUT_RTO_S_4 +335 0x1000 //TX_B_LESSCUT_RTO_S_5 +336 0x1000 //TX_B_LESSCUT_RTO_S_6 +337 0x1000 //TX_B_LESSCUT_RTO_S_7 338 0x7E14 //TX_LAMBDA_PFILT 339 0x7C29 //TX_LAMBDA_PFILT_S_0 340 0x7C29 //TX_LAMBDA_PFILT_S_1 @@ -24929,10 +37768,10 @@ 377 0x4E20 //TX_NOISE_TH_5_4 378 0x39DF //TX_NOISE_TH_6 379 0x0014 //TX_MINENOISE_TH -380 0x4000 //TX_MINENOISE_MIC0_TH_MTS -381 0xFFEE //TX_MINENOISE_MIC0_TH_EXP -382 0x6000 //TX_MINENOISE_MIC0_S_TH_MTS -383 0xFFF3 //TX_MINENOISE_MIC0_S_TH_EXP +380 0xD508 //TX_MORENS_TFMASK_TH +381 0x0001 //TX_DRC_QUIET_FLOOR +382 0x6D60 //TX_RATIODTL_CUT_TH +383 0x1482 //TX_DT_CUT_K1 384 0x00A5 //TX_OUT_ENER_S_TH_CLEAN 385 0x00A5 //TX_OUT_ENER_S_TH_LESSCLEAN 386 0x00A5 //TX_OUT_ENER_S_TH_NOISY @@ -24940,15 +37779,15 @@ 388 0x0200 //TX_OUT_ENER_TH_SPEECH 389 0x2000 //TX_SN_NPB_GAIN 390 0x0000 //TX_NN_NPB_GAIN -391 0x0000 //TX_CSX_ALPHA_0 -392 0x0000 //TX_CSX_ALPHA_1 -393 0x0000 //TX_CSX_ALPHA_2 -394 0x0000 //TX_CSX_ALPHA_3 -395 0x0800 //TX_MU_ARSP_EST -396 0x00C8 //TX_P_OUTBEAM_MIN_TH +391 0x3000 //TX_POST_MASK_SUP_HSNE +392 0x07D0 //TX_TAIL_DET_TH +393 0x4000 //TX_B_LESSCUT_RTO_WTA +394 0x0000 //TX_MEL_G_R +395 0x0080 //TX_SUPHIGH_TH +396 0x0000 //TX_MASK_G_R 397 0x0002 //TX_EXTRA_NS_L -398 0x0800 //TX_EXTRA_NS_A -399 0x0005 //TX_VR_NOISE_FLOOR_TH +398 0x1800 //TX_C_POST_FLT_MASK +399 0x7FFF //TX_A_POST_FLT_WNS 400 0x0148 //TX_MIN_G_LOW300HZ 401 0x0004 //TX_MAXLEVEL_CNG 402 0x00B4 //TX_STN_NOISE_TH @@ -25063,16 +37902,16 @@ 511 0x6666 //TX_MIC_TO_BFGAIN 512 0x0000 //TX_MICTOBFGAIN0 513 0x0000 //TX_FASTMUE_TH -514 0x0000 //TX_DERVB_LEN_0 -515 0x0000 //TX_DERVB_LEN_1 -516 0x0000 //TX_RHO_DERVB -517 0x0000 //TX_MIC_INDX_DERVB -518 0x0000 //TX_MU_DERVB -519 0x0000 //TX_DR_RESRV_0 -520 0x0000 //TX_DR_RESRV_1 -521 0x0000 //TX_DR_RESRV_2 -522 0x0000 //TX_DR_RESRV_3 -523 0x0000 //TX_DR_RESRV_4 +514 0x2CCC //TX_DEREVERB_LF_MU +515 0x3200 //TX_DEREVERB_HF_MU +516 0x0007 //TX_DEREVERB_DELAY +517 0x0004 //TX_DEREVERB_COEF_LEN +518 0x0003 //TX_DEREVERB_DNR +519 0x0000 //TX_DEREVERB_ALPHA +520 0x0000 //TX_DEREVERB_BETA +521 0x7FFF //TX_GSC_RTOL_TH +522 0x7FFF //TX_GSC_RTOH_TH +523 0x7E2C //TX_WIDE2_MEANHTH 524 0x0000 //TX_DR_RESRV_5 525 0x0000 //TX_DR_RESRV_6 526 0x0000 //TX_DR_RESRV_7 @@ -25446,8 +38285,73 @@ 894 0xC000 //TX_FASTNS_SSA_THHFL 895 0xCCCC //TX_FASTNS_SSA_THLFH 896 0xD999 //TX_FASTNS_SSA_THHFH +897 0x2339 //TX_SENDFUNC_REG_MICMUTE +898 0x0021 //TX_SENDFUNC_REG_MICMUTE1 +899 0x02BC //TX_MICMUTE_RATIO_THR +900 0x0140 //TX_MICMUTE_AMP_THR +901 0x0004 //TX_MICMUTE_HPF_IND +902 0x00C0 //TX_MICMUTE_LOG_EYR_TH +903 0x0008 //TX_MICMUTE_CVG_TIME +904 0x0008 //TX_MICMUTE_RELEASE_TIME +905 0x01FE //TX_MIC_VOLUME_MIC0MUTE +906 0x0020 //TX_MICMUTE_EPD_OFFSET_0 +907 0x001E //TX_MICMUTE_FRQ_AEC_L +908 0x7999 //TX_MICMUTE_EAD_THR +909 0x7FFF //TX_MICMUTE_LAMBDA_CB_NLE +910 0x7FFF //TX_MICMUTE_LAMBDA_RE_EST +911 0x4000 //TX_DTD_THR1_MICMUTE_0 +912 0x7000 //TX_DTD_THR1_MICMUTE_1 +913 0x7FFF //TX_DTD_THR1_MICMUTE_2 +914 0x7FFF //TX_DTD_THR1_MICMUTE_3 +915 0x6CCC //TX_DTD_THR2_MICMUTE_0 +916 0x0400 //TX_MICMUTE_MIN_EQ_RE_EST_0 +917 0x0400 //TX_MICMUTE_MIN_EQ_RE_EST_1 +918 0x1000 //TX_MICMUTE_MIN_EQ_RE_EST_2 +919 0x7FFF //TX_MICMUTE_MIN_EQ_RE_EST_3 +920 0x7FFF //TX_MICMUTE_MIN_EQ_RE_EST_4 +921 0x4000 //TX_MICMUTE_C_POST_FLT +922 0x03E8 //TX_MICMUTE_DT_CUT_K +923 0x0001 //TX_MICMUTE_DT_CUT_THR +924 0x03E8 //TX_MICMUTE_DT_CUT_K2 +925 0x0001 //TX_MICMUTE_DT_CUT_THR2 +926 0x0064 //TX_MICMUTE_DT2_HOLD_N +927 0x1000 //TX_MICMUTE_RATIODTH_THCUT +928 0x1000 //TX_MICMUTE_B_POST_FLT_ECHOL +929 0x7FFF //TX_MICMUTE_B_POST_FLT_ECHOH +930 0x0400 //TX_MICMUTE_C_POST_FLT_MASK +931 0x7999 //TX_MICMUTE_RATIODTL_CUT_TH +932 0x0258 //TX_MICMUTE_DT_CUT_K1 +933 0x0800 //TX_MICMUTE_N2_SN_EST +934 0xFC00 //TX_MICMUTE_THR_SN_EST_0 +935 0x001C //TX_MICMUTE_MIN_G_CTRL_0 +936 0x6000 //TX_MICMUTE_A_POST_FILT_S_0 +937 0x7000 //TX_MICMUTE_B_POST_FILT_0 +938 0x2710 //TX_MIC1RUB_AMP_THR +939 0x0010 //TX_MIC1MUTE_RATIO_THR +940 0x0450 //TX_MIC1MUTE_AMP_THR +941 0x0008 //TX_MIC1MUTE_CVG_TIME +942 0x0008 //TX_MIC1MUTE_RELEASE_TIME +943 0x0000 //TX_AMS_RESRV_01 +944 0x0000 //TX_AMS_RESRV_02 +945 0x0000 //TX_AMS_RESRV_03 +946 0x0000 //TX_AMS_RESRV_04 +947 0x0000 //TX_AMS_RESRV_05 +948 0x0000 //TX_AMS_RESRV_06 +949 0x0000 //TX_AMS_RESRV_07 +950 0x0000 //TX_AMS_RESRV_08 +951 0x0000 //TX_AMS_RESRV_09 +952 0x0000 //TX_AMS_RESRV_10 +953 0x0000 //TX_AMS_RESRV_11 +954 0x0000 //TX_AMS_RESRV_12 +955 0x0000 //TX_AMS_RESRV_13 +956 0x0000 //TX_AMS_RESRV_14 +957 0x0000 //TX_AMS_RESRV_15 +958 0x0000 //TX_AMS_RESRV_16 +959 0x0000 //TX_AMS_RESRV_17 +960 0x0000 //TX_AMS_RESRV_18 +961 0x0000 //TX_AMS_RESRV_19 #RX -0 0x002C //RX_RECVFUNC_MODE_0 +0 0x202C //RX_RECVFUNC_MODE_0 1 0x0000 //RX_RECVFUNC_MODE_1 2 0x0004 //RX_SAMPLINGFREQ_SIG 3 0x0004 //RX_SAMPLINGFREQ_PROC @@ -26297,14 +39201,866 @@ 110 0x0000 //RX_FDDRC_RESRV_0 129 0x0100 //RX_SPK_VOL 130 0x0000 //RX_VOL_RESRV_0 +#RX 2 +157 0x002C //RX_RECVFUNC_MODE_0 +158 0x0000 //RX_RECVFUNC_MODE_1 +159 0x0004 //RX_SAMPLINGFREQ_SIG +160 0x0004 //RX_SAMPLINGFREQ_PROC +161 0x000A //RX_FRAME_SZ +162 0x0000 //RX_DELAY_OPT +163 0x1000 //RX_TDDRC_ALPHA_UP_1 +164 0x1000 //RX_TDDRC_ALPHA_UP_2 +165 0x1000 //RX_TDDRC_ALPHA_UP_3 +166 0x1000 //RX_TDDRC_ALPHA_UP_4 +167 0x0722 //RX_PGA +168 0x7FFF //RX_A_HP +169 0x4000 //RX_B_PE +170 0x5800 //RX_THR_PITCH_DET_0 +171 0x5000 //RX_THR_PITCH_DET_1 +172 0x4000 //RX_THR_PITCH_DET_2 +173 0x0008 //RX_PITCH_BFR_LEN +174 0x0003 //RX_SBD_PITCH_DET +175 0x0100 //RX_PP_RESRV_0 +176 0x0020 //RX_PP_RESRV_1 +177 0x0600 //RX_N_SN_EST +178 0x000C //RX_N2_SN_EST +179 0x000F //RX_NS_LVL_CTRL +180 0xF800 //RX_THR_SN_EST +181 0x7E00 //RX_LAMBDA_PFILT +182 0x000A //RX_FENS_RESRV_0 +183 0x0190 //RX_FENS_RESRV_1 +184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +187 0x0002 //RX_EXTRA_NS_L +188 0x0800 //RX_EXTRA_NS_A +189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +190 0x7000 //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +192 0x199A //RX_A_POST_FLT +193 0x0000 //RX_LMT_THRD +194 0x4000 //RX_LMT_ALPHA +195 0x0020 //RX_FDEQ_SUBNUM +196 0x4E4E //RX_FDEQ_GAIN_0 +197 0x4E56 //RX_FDEQ_GAIN_1 +198 0x6878 //RX_FDEQ_GAIN_2 +199 0x8088 //RX_FDEQ_GAIN_3 +200 0x848B //RX_FDEQ_GAIN_4 +201 0x8F8E //RX_FDEQ_GAIN_5 +202 0x9494 //RX_FDEQ_GAIN_6 +203 0x96A0 //RX_FDEQ_GAIN_7 +204 0xB8A0 //RX_FDEQ_GAIN_8 +205 0xA99D //RX_FDEQ_GAIN_9 +206 0x9D6A //RX_FDEQ_GAIN_10 +207 0x626B //RX_FDEQ_GAIN_11 +208 0x6C78 //RX_FDEQ_GAIN_12 +209 0x7884 //RX_FDEQ_GAIN_13 +210 0x9098 //RX_FDEQ_GAIN_14 +211 0x9CAC //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0202 //RX_FDEQ_BIN_0 +221 0x0202 //RX_FDEQ_BIN_1 +222 0x0302 //RX_FDEQ_BIN_2 +223 0x0304 //RX_FDEQ_BIN_3 +224 0x0405 //RX_FDEQ_BIN_4 +225 0x0506 //RX_FDEQ_BIN_5 +226 0x0708 //RX_FDEQ_BIN_6 +227 0x090A //RX_FDEQ_BIN_7 +228 0x0B0C //RX_FDEQ_BIN_8 +229 0x0D0E //RX_FDEQ_BIN_9 +230 0x1013 //RX_FDEQ_BIN_10 +231 0x1719 //RX_FDEQ_BIN_11 +232 0x1B1E //RX_FDEQ_BIN_12 +233 0x1E1E //RX_FDEQ_BIN_13 +234 0x1E28 //RX_FDEQ_BIN_14 +235 0x282C //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x4000 //RX_FDEQ_RESRV_0 +245 0x0320 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0030 //RX_FDDRC_BAND_MARGIN_1 +248 0x0050 //RX_FDDRC_BAND_MARGIN_2 +249 0x0080 //RX_FDDRC_BAND_MARGIN_3 +250 0x0007 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x5000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x6400 //RX_FDDRC_THRD_3_2 +258 0x6400 //RX_FDDRC_THRD_3_3 +259 0x2000 //RX_FDDRC_SLANT_0_0 +260 0x2000 //RX_FDDRC_SLANT_0_1 +261 0x2000 //RX_FDDRC_SLANT_0_2 +262 0x2000 //RX_FDDRC_SLANT_0_3 +263 0x5333 //RX_FDDRC_SLANT_1_0 +264 0x5333 //RX_FDDRC_SLANT_1_1 +265 0x5333 //RX_FDDRC_SLANT_1_2 +266 0x5333 //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +268 0x0002 //RX_FILTINDX +269 0x0000 //RX_TDDRC_THRD_0 +270 0x0000 //RX_TDDRC_THRD_1 +271 0x1800 //RX_TDDRC_THRD_2 +272 0x1800 //RX_TDDRC_THRD_3 +273 0x3000 //RX_TDDRC_SLANT_0 +274 0x6E00 //RX_TDDRC_SLANT_1 +275 0x1000 //RX_TDDRC_ALPHA_UP_0 +276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x199A //RX_TDDRC_HMNC_GAIN +279 0x0001 //RX_TDDRC_SMT_FLAG +280 0x0CCD //RX_TDDRC_SMT_W +281 0x02FD //RX_TDDRC_DRC_GAIN +282 0x7C00 //RX_LAMBDA_PKA_FP +283 0x1964 //RX_TPKA_FP +284 0x0080 //RX_MIN_G_FP +285 0x2000 //RX_MAX_G_FP +286 0x000D //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 +288 0x0000 //RX_MAXLEVEL_CNG +289 0x3000 //RX_BWE_UV_TH +290 0x3000 //RX_BWE_UV_TH2 +291 0x1800 //RX_BWE_UV_TH3 +292 0x1000 //RX_BWE_V_TH +293 0x04CD //RX_BWE_GAIN1_V_TH1 +294 0x0F33 //RX_BWE_GAIN1_V_TH2 +295 0x7333 //RX_BWE_UV_EQ +296 0x199A //RX_BWE_V_EQ +297 0x7333 //RX_BWE_TONE_TH +298 0x0004 //RX_BWE_UV_HOLD_T +299 0x6CCD //RX_BWE_GAIN2_ALPHA +300 0x799A //RX_BWE_GAIN3_ALPHA +301 0x001E //RX_BWE_CUTOFF +302 0x3000 //RX_BWE_GAINFILL +303 0x3200 //RX_BWE_MAXTH_TONE +304 0x2000 //RX_BWE_EQ_0 +305 0x2000 //RX_BWE_EQ_1 +306 0x2000 //RX_BWE_EQ_2 +307 0x2000 //RX_BWE_EQ_3 +308 0x2000 //RX_BWE_EQ_4 +309 0x2000 //RX_BWE_EQ_5 +310 0x2000 //RX_BWE_EQ_6 +311 0x0000 //RX_BWE_RESRV_0 +312 0x0000 //RX_BWE_RESRV_1 +313 0x0000 //RX_BWE_RESRV_2 +#VOL 0 +163 0x1000 //RX_TDDRC_ALPHA_UP_1 +164 0x1000 //RX_TDDRC_ALPHA_UP_2 +165 0x1000 //RX_TDDRC_ALPHA_UP_3 +166 0x1000 //RX_TDDRC_ALPHA_UP_4 +184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +190 0x7000 //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +269 0x0000 //RX_TDDRC_THRD_0 +270 0x0000 //RX_TDDRC_THRD_1 +271 0x1800 //RX_TDDRC_THRD_2 +272 0x1800 //RX_TDDRC_THRD_3 +273 0x3000 //RX_TDDRC_SLANT_0 +274 0x6E00 //RX_TDDRC_SLANT_1 +275 0x1000 //RX_TDDRC_ALPHA_UP_0 +276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x199A //RX_TDDRC_HMNC_GAIN +279 0x0001 //RX_TDDRC_SMT_FLAG +280 0x0CCD //RX_TDDRC_SMT_W +281 0x02FD //RX_TDDRC_DRC_GAIN +195 0x0020 //RX_FDEQ_SUBNUM +196 0x4E4E //RX_FDEQ_GAIN_0 +197 0x4E56 //RX_FDEQ_GAIN_1 +198 0x6878 //RX_FDEQ_GAIN_2 +199 0x8088 //RX_FDEQ_GAIN_3 +200 0x848B //RX_FDEQ_GAIN_4 +201 0x8F8E //RX_FDEQ_GAIN_5 +202 0x9494 //RX_FDEQ_GAIN_6 +203 0x96A0 //RX_FDEQ_GAIN_7 +204 0xB8A0 //RX_FDEQ_GAIN_8 +205 0xA99D //RX_FDEQ_GAIN_9 +206 0x9D6A //RX_FDEQ_GAIN_10 +207 0x626B //RX_FDEQ_GAIN_11 +208 0x6C78 //RX_FDEQ_GAIN_12 +209 0x7884 //RX_FDEQ_GAIN_13 +210 0x9098 //RX_FDEQ_GAIN_14 +211 0x9CAC //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0202 //RX_FDEQ_BIN_0 +221 0x0202 //RX_FDEQ_BIN_1 +222 0x0302 //RX_FDEQ_BIN_2 +223 0x0304 //RX_FDEQ_BIN_3 +224 0x0405 //RX_FDEQ_BIN_4 +225 0x0506 //RX_FDEQ_BIN_5 +226 0x0708 //RX_FDEQ_BIN_6 +227 0x090A //RX_FDEQ_BIN_7 +228 0x0B0C //RX_FDEQ_BIN_8 +229 0x0D0E //RX_FDEQ_BIN_9 +230 0x1013 //RX_FDEQ_BIN_10 +231 0x1719 //RX_FDEQ_BIN_11 +232 0x1B1E //RX_FDEQ_BIN_12 +233 0x1E1E //RX_FDEQ_BIN_13 +234 0x1E28 //RX_FDEQ_BIN_14 +235 0x282C //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x4000 //RX_FDEQ_RESRV_0 +245 0x0320 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0030 //RX_FDDRC_BAND_MARGIN_1 +248 0x0050 //RX_FDDRC_BAND_MARGIN_2 +249 0x0080 //RX_FDDRC_BAND_MARGIN_3 +250 0x0007 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x5000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x6400 //RX_FDDRC_THRD_3_2 +258 0x6400 //RX_FDDRC_THRD_3_3 +259 0x2000 //RX_FDDRC_SLANT_0_0 +260 0x2000 //RX_FDDRC_SLANT_0_1 +261 0x2000 //RX_FDDRC_SLANT_0_2 +262 0x2000 //RX_FDDRC_SLANT_0_3 +263 0x5333 //RX_FDDRC_SLANT_1_0 +264 0x5333 //RX_FDDRC_SLANT_1_1 +265 0x5333 //RX_FDDRC_SLANT_1_2 +266 0x5333 //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +286 0x000D //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 +#VOL 1 +163 0x1000 //RX_TDDRC_ALPHA_UP_1 +164 0x1000 //RX_TDDRC_ALPHA_UP_2 +165 0x1000 //RX_TDDRC_ALPHA_UP_3 +166 0x1000 //RX_TDDRC_ALPHA_UP_4 +184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +190 0x7000 //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +269 0x0000 //RX_TDDRC_THRD_0 +270 0x0000 //RX_TDDRC_THRD_1 +271 0x1800 //RX_TDDRC_THRD_2 +272 0x1800 //RX_TDDRC_THRD_3 +273 0x3000 //RX_TDDRC_SLANT_0 +274 0x6E00 //RX_TDDRC_SLANT_1 +275 0x1000 //RX_TDDRC_ALPHA_UP_0 +276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x199A //RX_TDDRC_HMNC_GAIN +279 0x0001 //RX_TDDRC_SMT_FLAG +280 0x0CCD //RX_TDDRC_SMT_W +281 0x02FD //RX_TDDRC_DRC_GAIN +195 0x0020 //RX_FDEQ_SUBNUM +196 0x4E4E //RX_FDEQ_GAIN_0 +197 0x4E56 //RX_FDEQ_GAIN_1 +198 0x6878 //RX_FDEQ_GAIN_2 +199 0x8088 //RX_FDEQ_GAIN_3 +200 0x848B //RX_FDEQ_GAIN_4 +201 0x8F8E //RX_FDEQ_GAIN_5 +202 0x9494 //RX_FDEQ_GAIN_6 +203 0x96A0 //RX_FDEQ_GAIN_7 +204 0xB8A0 //RX_FDEQ_GAIN_8 +205 0xA99D //RX_FDEQ_GAIN_9 +206 0x9D6A //RX_FDEQ_GAIN_10 +207 0x626B //RX_FDEQ_GAIN_11 +208 0x6C78 //RX_FDEQ_GAIN_12 +209 0x7884 //RX_FDEQ_GAIN_13 +210 0x9098 //RX_FDEQ_GAIN_14 +211 0x9CAC //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0202 //RX_FDEQ_BIN_0 +221 0x0202 //RX_FDEQ_BIN_1 +222 0x0302 //RX_FDEQ_BIN_2 +223 0x0304 //RX_FDEQ_BIN_3 +224 0x0405 //RX_FDEQ_BIN_4 +225 0x0506 //RX_FDEQ_BIN_5 +226 0x0708 //RX_FDEQ_BIN_6 +227 0x090A //RX_FDEQ_BIN_7 +228 0x0B0C //RX_FDEQ_BIN_8 +229 0x0D0E //RX_FDEQ_BIN_9 +230 0x1013 //RX_FDEQ_BIN_10 +231 0x1719 //RX_FDEQ_BIN_11 +232 0x1B1E //RX_FDEQ_BIN_12 +233 0x1E1E //RX_FDEQ_BIN_13 +234 0x1E28 //RX_FDEQ_BIN_14 +235 0x282C //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x4000 //RX_FDEQ_RESRV_0 +245 0x0320 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0030 //RX_FDDRC_BAND_MARGIN_1 +248 0x0050 //RX_FDDRC_BAND_MARGIN_2 +249 0x0080 //RX_FDDRC_BAND_MARGIN_3 +250 0x0007 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x5000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x6400 //RX_FDDRC_THRD_3_2 +258 0x6400 //RX_FDDRC_THRD_3_3 +259 0x2000 //RX_FDDRC_SLANT_0_0 +260 0x2000 //RX_FDDRC_SLANT_0_1 +261 0x2000 //RX_FDDRC_SLANT_0_2 +262 0x2000 //RX_FDDRC_SLANT_0_3 +263 0x5333 //RX_FDDRC_SLANT_1_0 +264 0x5333 //RX_FDDRC_SLANT_1_1 +265 0x5333 //RX_FDDRC_SLANT_1_2 +266 0x5333 //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +286 0x0016 //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 +#VOL 2 +163 0x1000 //RX_TDDRC_ALPHA_UP_1 +164 0x1000 //RX_TDDRC_ALPHA_UP_2 +165 0x1000 //RX_TDDRC_ALPHA_UP_3 +166 0x1000 //RX_TDDRC_ALPHA_UP_4 +184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +190 0x7000 //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +269 0x0000 //RX_TDDRC_THRD_0 +270 0x0000 //RX_TDDRC_THRD_1 +271 0x1800 //RX_TDDRC_THRD_2 +272 0x1800 //RX_TDDRC_THRD_3 +273 0x3000 //RX_TDDRC_SLANT_0 +274 0x6E00 //RX_TDDRC_SLANT_1 +275 0x1000 //RX_TDDRC_ALPHA_UP_0 +276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x199A //RX_TDDRC_HMNC_GAIN +279 0x0001 //RX_TDDRC_SMT_FLAG +280 0x0CCD //RX_TDDRC_SMT_W +281 0x02FD //RX_TDDRC_DRC_GAIN +195 0x0020 //RX_FDEQ_SUBNUM +196 0x4E4E //RX_FDEQ_GAIN_0 +197 0x4E56 //RX_FDEQ_GAIN_1 +198 0x6878 //RX_FDEQ_GAIN_2 +199 0x8088 //RX_FDEQ_GAIN_3 +200 0x848B //RX_FDEQ_GAIN_4 +201 0x8F8E //RX_FDEQ_GAIN_5 +202 0x9494 //RX_FDEQ_GAIN_6 +203 0x96A0 //RX_FDEQ_GAIN_7 +204 0xB8A0 //RX_FDEQ_GAIN_8 +205 0xA99D //RX_FDEQ_GAIN_9 +206 0x9D6A //RX_FDEQ_GAIN_10 +207 0x626B //RX_FDEQ_GAIN_11 +208 0x6C78 //RX_FDEQ_GAIN_12 +209 0x7884 //RX_FDEQ_GAIN_13 +210 0x9098 //RX_FDEQ_GAIN_14 +211 0x9CAC //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0202 //RX_FDEQ_BIN_0 +221 0x0202 //RX_FDEQ_BIN_1 +222 0x0302 //RX_FDEQ_BIN_2 +223 0x0304 //RX_FDEQ_BIN_3 +224 0x0405 //RX_FDEQ_BIN_4 +225 0x0506 //RX_FDEQ_BIN_5 +226 0x0708 //RX_FDEQ_BIN_6 +227 0x090A //RX_FDEQ_BIN_7 +228 0x0B0C //RX_FDEQ_BIN_8 +229 0x0D0E //RX_FDEQ_BIN_9 +230 0x1013 //RX_FDEQ_BIN_10 +231 0x1719 //RX_FDEQ_BIN_11 +232 0x1B1E //RX_FDEQ_BIN_12 +233 0x1E1E //RX_FDEQ_BIN_13 +234 0x1E28 //RX_FDEQ_BIN_14 +235 0x282C //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x4000 //RX_FDEQ_RESRV_0 +245 0x0320 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0030 //RX_FDDRC_BAND_MARGIN_1 +248 0x0050 //RX_FDDRC_BAND_MARGIN_2 +249 0x0080 //RX_FDDRC_BAND_MARGIN_3 +250 0x0007 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x5000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x6400 //RX_FDDRC_THRD_3_2 +258 0x6400 //RX_FDDRC_THRD_3_3 +259 0x2000 //RX_FDDRC_SLANT_0_0 +260 0x2000 //RX_FDDRC_SLANT_0_1 +261 0x2000 //RX_FDDRC_SLANT_0_2 +262 0x2000 //RX_FDDRC_SLANT_0_3 +263 0x5333 //RX_FDDRC_SLANT_1_0 +264 0x5333 //RX_FDDRC_SLANT_1_1 +265 0x5333 //RX_FDDRC_SLANT_1_2 +266 0x5333 //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +286 0x0024 //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 +#VOL 3 +163 0x1000 //RX_TDDRC_ALPHA_UP_1 +164 0x1000 //RX_TDDRC_ALPHA_UP_2 +165 0x1000 //RX_TDDRC_ALPHA_UP_3 +166 0x1000 //RX_TDDRC_ALPHA_UP_4 +184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +190 0x7000 //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +269 0x0000 //RX_TDDRC_THRD_0 +270 0x0000 //RX_TDDRC_THRD_1 +271 0x1800 //RX_TDDRC_THRD_2 +272 0x1800 //RX_TDDRC_THRD_3 +273 0x3000 //RX_TDDRC_SLANT_0 +274 0x6E00 //RX_TDDRC_SLANT_1 +275 0x1000 //RX_TDDRC_ALPHA_UP_0 +276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x199A //RX_TDDRC_HMNC_GAIN +279 0x0001 //RX_TDDRC_SMT_FLAG +280 0x0CCD //RX_TDDRC_SMT_W +281 0x02FD //RX_TDDRC_DRC_GAIN +195 0x0020 //RX_FDEQ_SUBNUM +196 0x4E4E //RX_FDEQ_GAIN_0 +197 0x4E56 //RX_FDEQ_GAIN_1 +198 0x6878 //RX_FDEQ_GAIN_2 +199 0x8088 //RX_FDEQ_GAIN_3 +200 0x848B //RX_FDEQ_GAIN_4 +201 0x8F8E //RX_FDEQ_GAIN_5 +202 0x9494 //RX_FDEQ_GAIN_6 +203 0x96A0 //RX_FDEQ_GAIN_7 +204 0xB8A0 //RX_FDEQ_GAIN_8 +205 0xA99D //RX_FDEQ_GAIN_9 +206 0x9D6A //RX_FDEQ_GAIN_10 +207 0x626B //RX_FDEQ_GAIN_11 +208 0x6C78 //RX_FDEQ_GAIN_12 +209 0x7884 //RX_FDEQ_GAIN_13 +210 0x9098 //RX_FDEQ_GAIN_14 +211 0x9CAC //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0202 //RX_FDEQ_BIN_0 +221 0x0202 //RX_FDEQ_BIN_1 +222 0x0302 //RX_FDEQ_BIN_2 +223 0x0304 //RX_FDEQ_BIN_3 +224 0x0405 //RX_FDEQ_BIN_4 +225 0x0506 //RX_FDEQ_BIN_5 +226 0x0708 //RX_FDEQ_BIN_6 +227 0x090A //RX_FDEQ_BIN_7 +228 0x0B0C //RX_FDEQ_BIN_8 +229 0x0D0E //RX_FDEQ_BIN_9 +230 0x1013 //RX_FDEQ_BIN_10 +231 0x1719 //RX_FDEQ_BIN_11 +232 0x1B1E //RX_FDEQ_BIN_12 +233 0x1E1E //RX_FDEQ_BIN_13 +234 0x1E28 //RX_FDEQ_BIN_14 +235 0x282C //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x4000 //RX_FDEQ_RESRV_0 +245 0x0320 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0030 //RX_FDDRC_BAND_MARGIN_1 +248 0x0050 //RX_FDDRC_BAND_MARGIN_2 +249 0x0080 //RX_FDDRC_BAND_MARGIN_3 +250 0x0007 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x5000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x6400 //RX_FDDRC_THRD_3_2 +258 0x6400 //RX_FDDRC_THRD_3_3 +259 0x2000 //RX_FDDRC_SLANT_0_0 +260 0x2000 //RX_FDDRC_SLANT_0_1 +261 0x2000 //RX_FDDRC_SLANT_0_2 +262 0x2000 //RX_FDDRC_SLANT_0_3 +263 0x5333 //RX_FDDRC_SLANT_1_0 +264 0x5333 //RX_FDDRC_SLANT_1_1 +265 0x5333 //RX_FDDRC_SLANT_1_2 +266 0x5333 //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +286 0x003A //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 +#VOL 4 +163 0x1000 //RX_TDDRC_ALPHA_UP_1 +164 0x1000 //RX_TDDRC_ALPHA_UP_2 +165 0x1000 //RX_TDDRC_ALPHA_UP_3 +166 0x1000 //RX_TDDRC_ALPHA_UP_4 +184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +190 0x7000 //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +269 0x0000 //RX_TDDRC_THRD_0 +270 0x0000 //RX_TDDRC_THRD_1 +271 0x1800 //RX_TDDRC_THRD_2 +272 0x1800 //RX_TDDRC_THRD_3 +273 0x3000 //RX_TDDRC_SLANT_0 +274 0x6E00 //RX_TDDRC_SLANT_1 +275 0x1000 //RX_TDDRC_ALPHA_UP_0 +276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x199A //RX_TDDRC_HMNC_GAIN +279 0x0001 //RX_TDDRC_SMT_FLAG +280 0x0CCD //RX_TDDRC_SMT_W +281 0x02FD //RX_TDDRC_DRC_GAIN +195 0x0020 //RX_FDEQ_SUBNUM +196 0x4E4E //RX_FDEQ_GAIN_0 +197 0x4E56 //RX_FDEQ_GAIN_1 +198 0x6878 //RX_FDEQ_GAIN_2 +199 0x8088 //RX_FDEQ_GAIN_3 +200 0x848B //RX_FDEQ_GAIN_4 +201 0x8F8E //RX_FDEQ_GAIN_5 +202 0x9494 //RX_FDEQ_GAIN_6 +203 0x96A0 //RX_FDEQ_GAIN_7 +204 0xB8A0 //RX_FDEQ_GAIN_8 +205 0xA99D //RX_FDEQ_GAIN_9 +206 0x9D6A //RX_FDEQ_GAIN_10 +207 0x626B //RX_FDEQ_GAIN_11 +208 0x6C78 //RX_FDEQ_GAIN_12 +209 0x7884 //RX_FDEQ_GAIN_13 +210 0x9098 //RX_FDEQ_GAIN_14 +211 0x9CAC //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0202 //RX_FDEQ_BIN_0 +221 0x0202 //RX_FDEQ_BIN_1 +222 0x0302 //RX_FDEQ_BIN_2 +223 0x0304 //RX_FDEQ_BIN_3 +224 0x0405 //RX_FDEQ_BIN_4 +225 0x0506 //RX_FDEQ_BIN_5 +226 0x0708 //RX_FDEQ_BIN_6 +227 0x090A //RX_FDEQ_BIN_7 +228 0x0B0C //RX_FDEQ_BIN_8 +229 0x0D0E //RX_FDEQ_BIN_9 +230 0x1013 //RX_FDEQ_BIN_10 +231 0x1719 //RX_FDEQ_BIN_11 +232 0x1B1E //RX_FDEQ_BIN_12 +233 0x1E1E //RX_FDEQ_BIN_13 +234 0x1E28 //RX_FDEQ_BIN_14 +235 0x282C //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x4000 //RX_FDEQ_RESRV_0 +245 0x0320 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0030 //RX_FDDRC_BAND_MARGIN_1 +248 0x0050 //RX_FDDRC_BAND_MARGIN_2 +249 0x0080 //RX_FDDRC_BAND_MARGIN_3 +250 0x0007 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x5000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x6400 //RX_FDDRC_THRD_3_2 +258 0x6400 //RX_FDDRC_THRD_3_3 +259 0x2000 //RX_FDDRC_SLANT_0_0 +260 0x2000 //RX_FDDRC_SLANT_0_1 +261 0x2000 //RX_FDDRC_SLANT_0_2 +262 0x2000 //RX_FDDRC_SLANT_0_3 +263 0x5333 //RX_FDDRC_SLANT_1_0 +264 0x5333 //RX_FDDRC_SLANT_1_1 +265 0x5333 //RX_FDDRC_SLANT_1_2 +266 0x5333 //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +286 0x0059 //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 +#VOL 5 +163 0x1000 //RX_TDDRC_ALPHA_UP_1 +164 0x1000 //RX_TDDRC_ALPHA_UP_2 +165 0x1000 //RX_TDDRC_ALPHA_UP_3 +166 0x1000 //RX_TDDRC_ALPHA_UP_4 +184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +190 0x7000 //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +269 0x0000 //RX_TDDRC_THRD_0 +270 0x0000 //RX_TDDRC_THRD_1 +271 0x1800 //RX_TDDRC_THRD_2 +272 0x1800 //RX_TDDRC_THRD_3 +273 0x3000 //RX_TDDRC_SLANT_0 +274 0x6E00 //RX_TDDRC_SLANT_1 +275 0x1000 //RX_TDDRC_ALPHA_UP_0 +276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x199A //RX_TDDRC_HMNC_GAIN +279 0x0001 //RX_TDDRC_SMT_FLAG +280 0x0CCD //RX_TDDRC_SMT_W +281 0x02FD //RX_TDDRC_DRC_GAIN +195 0x0020 //RX_FDEQ_SUBNUM +196 0x4E4E //RX_FDEQ_GAIN_0 +197 0x4E56 //RX_FDEQ_GAIN_1 +198 0x6878 //RX_FDEQ_GAIN_2 +199 0x8088 //RX_FDEQ_GAIN_3 +200 0x848B //RX_FDEQ_GAIN_4 +201 0x8F8E //RX_FDEQ_GAIN_5 +202 0x9494 //RX_FDEQ_GAIN_6 +203 0x96A0 //RX_FDEQ_GAIN_7 +204 0xB8A0 //RX_FDEQ_GAIN_8 +205 0xA99D //RX_FDEQ_GAIN_9 +206 0x9D6A //RX_FDEQ_GAIN_10 +207 0x626B //RX_FDEQ_GAIN_11 +208 0x6C78 //RX_FDEQ_GAIN_12 +209 0x7884 //RX_FDEQ_GAIN_13 +210 0x9098 //RX_FDEQ_GAIN_14 +211 0x9CAC //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0202 //RX_FDEQ_BIN_0 +221 0x0202 //RX_FDEQ_BIN_1 +222 0x0302 //RX_FDEQ_BIN_2 +223 0x0304 //RX_FDEQ_BIN_3 +224 0x0405 //RX_FDEQ_BIN_4 +225 0x0506 //RX_FDEQ_BIN_5 +226 0x0708 //RX_FDEQ_BIN_6 +227 0x090A //RX_FDEQ_BIN_7 +228 0x0B0C //RX_FDEQ_BIN_8 +229 0x0D0E //RX_FDEQ_BIN_9 +230 0x1013 //RX_FDEQ_BIN_10 +231 0x1719 //RX_FDEQ_BIN_11 +232 0x1B1E //RX_FDEQ_BIN_12 +233 0x1E1E //RX_FDEQ_BIN_13 +234 0x1E28 //RX_FDEQ_BIN_14 +235 0x282C //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x4000 //RX_FDEQ_RESRV_0 +245 0x0320 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0030 //RX_FDDRC_BAND_MARGIN_1 +248 0x0050 //RX_FDDRC_BAND_MARGIN_2 +249 0x0080 //RX_FDDRC_BAND_MARGIN_3 +250 0x0007 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x5000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x6400 //RX_FDDRC_THRD_3_2 +258 0x6400 //RX_FDDRC_THRD_3_3 +259 0x2000 //RX_FDDRC_SLANT_0_0 +260 0x2000 //RX_FDDRC_SLANT_0_1 +261 0x2000 //RX_FDDRC_SLANT_0_2 +262 0x2000 //RX_FDDRC_SLANT_0_3 +263 0x5333 //RX_FDDRC_SLANT_1_0 +264 0x5333 //RX_FDDRC_SLANT_1_1 +265 0x5333 //RX_FDDRC_SLANT_1_2 +266 0x5333 //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +286 0x0090 //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 +#VOL 6 +163 0x1000 //RX_TDDRC_ALPHA_UP_1 +164 0x1000 //RX_TDDRC_ALPHA_UP_2 +165 0x1000 //RX_TDDRC_ALPHA_UP_3 +166 0x1000 //RX_TDDRC_ALPHA_UP_4 +184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +190 0x7000 //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +269 0x0000 //RX_TDDRC_THRD_0 +270 0x0000 //RX_TDDRC_THRD_1 +271 0x1800 //RX_TDDRC_THRD_2 +272 0x1800 //RX_TDDRC_THRD_3 +273 0x3000 //RX_TDDRC_SLANT_0 +274 0x6E00 //RX_TDDRC_SLANT_1 +275 0x1000 //RX_TDDRC_ALPHA_UP_0 +276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x199A //RX_TDDRC_HMNC_GAIN +279 0x0001 //RX_TDDRC_SMT_FLAG +280 0x0CCD //RX_TDDRC_SMT_W +281 0x02FD //RX_TDDRC_DRC_GAIN +195 0x0020 //RX_FDEQ_SUBNUM +196 0x4E4E //RX_FDEQ_GAIN_0 +197 0x4E56 //RX_FDEQ_GAIN_1 +198 0x6878 //RX_FDEQ_GAIN_2 +199 0x8088 //RX_FDEQ_GAIN_3 +200 0x848B //RX_FDEQ_GAIN_4 +201 0x8F8E //RX_FDEQ_GAIN_5 +202 0x9494 //RX_FDEQ_GAIN_6 +203 0x96A0 //RX_FDEQ_GAIN_7 +204 0xB8A0 //RX_FDEQ_GAIN_8 +205 0xA99D //RX_FDEQ_GAIN_9 +206 0x9D6A //RX_FDEQ_GAIN_10 +207 0x626B //RX_FDEQ_GAIN_11 +208 0x6C78 //RX_FDEQ_GAIN_12 +209 0x7884 //RX_FDEQ_GAIN_13 +210 0x9098 //RX_FDEQ_GAIN_14 +211 0x9CAC //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0202 //RX_FDEQ_BIN_0 +221 0x0202 //RX_FDEQ_BIN_1 +222 0x0302 //RX_FDEQ_BIN_2 +223 0x0304 //RX_FDEQ_BIN_3 +224 0x0405 //RX_FDEQ_BIN_4 +225 0x0506 //RX_FDEQ_BIN_5 +226 0x0708 //RX_FDEQ_BIN_6 +227 0x090A //RX_FDEQ_BIN_7 +228 0x0B0C //RX_FDEQ_BIN_8 +229 0x0D0E //RX_FDEQ_BIN_9 +230 0x1013 //RX_FDEQ_BIN_10 +231 0x1719 //RX_FDEQ_BIN_11 +232 0x1B1E //RX_FDEQ_BIN_12 +233 0x1E1E //RX_FDEQ_BIN_13 +234 0x1E28 //RX_FDEQ_BIN_14 +235 0x282C //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x4000 //RX_FDEQ_RESRV_0 +245 0x0320 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0030 //RX_FDDRC_BAND_MARGIN_1 +248 0x0050 //RX_FDDRC_BAND_MARGIN_2 +249 0x0080 //RX_FDDRC_BAND_MARGIN_3 +250 0x0007 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x5000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x6400 //RX_FDDRC_THRD_3_2 +258 0x6400 //RX_FDDRC_THRD_3_3 +259 0x2000 //RX_FDDRC_SLANT_0_0 +260 0x2000 //RX_FDDRC_SLANT_0_1 +261 0x2000 //RX_FDDRC_SLANT_0_2 +262 0x2000 //RX_FDDRC_SLANT_0_3 +263 0x5333 //RX_FDDRC_SLANT_1_0 +264 0x5333 //RX_FDDRC_SLANT_1_1 +265 0x5333 //RX_FDDRC_SLANT_1_2 +266 0x5333 //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +286 0x0100 //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 #CASE_NAME HANDSET-HANDSET_HAC-TMOBILE_US-NB -#PARAM_TYPE TX+RX -#TOTAL_CUSTOM_STEP 7 +#PARAM_MODE Full +#PARAM_TYPE TX+2RX +#TOTAL_CUSTOM_STEP 7+7 #TX 0 0x0000 //TX_OPERATION_MODE_0 1 0x0000 //TX_OPERATION_MODE_1 -2 0x0036 //TX_PATCH_REG +2 0x0076 //TX_PATCH_REG 3 0x6F7E //TX_SENDFUNC_MODE_0 4 0x0001 //TX_SENDFUNC_MODE_1 5 0x0002 //TX_NUM_MIC @@ -26323,7 +40079,7 @@ 18 0x0000 //TX_SYS_RESRV_2 19 0x0000 //TX_SYS_RESRV_3 20 0x0000 //TX_DIST2REF0 -21 0x00A4 //TX_DIST2REF1 +21 0x00A3 //TX_DIST2REF1 22 0x0000 //TX_DIST2REF_02 23 0x0000 //TX_DIST2REF_03 24 0x0000 //TX_DIST2REF_04 @@ -26553,19 +40309,19 @@ 248 0xF800 //TX_THR_SN_EST_6 249 0xF700 //TX_THR_SN_EST_7 250 0x0000 //TX_DELTA_THR_SN_EST_0 -251 0x01A0 //TX_DELTA_THR_SN_EST_1 -252 0x0100 //TX_DELTA_THR_SN_EST_2 -253 0x0200 //TX_DELTA_THR_SN_EST_3 -254 0x01A0 //TX_DELTA_THR_SN_EST_4 -255 0x0100 //TX_DELTA_THR_SN_EST_5 -256 0x0000 //TX_DELTA_THR_SN_EST_6 +251 0x0100 //TX_DELTA_THR_SN_EST_1 +252 0x0200 //TX_DELTA_THR_SN_EST_2 +253 0x01A0 //TX_DELTA_THR_SN_EST_3 +254 0x0100 //TX_DELTA_THR_SN_EST_4 +255 0x0000 //TX_DELTA_THR_SN_EST_5 +256 0x01A0 //TX_DELTA_THR_SN_EST_6 257 0x0200 //TX_DELTA_THR_SN_EST_7 258 0x4000 //TX_LAMBDA_NN_EST_0 -259 0x4000 //TX_LAMBDA_NN_EST_1 -260 0x3000 //TX_LAMBDA_NN_EST_2 -261 0x4000 //TX_LAMBDA_NN_EST_3 +259 0x3000 //TX_LAMBDA_NN_EST_1 +260 0x4000 //TX_LAMBDA_NN_EST_2 +261 0x3000 //TX_LAMBDA_NN_EST_3 262 0x3000 //TX_LAMBDA_NN_EST_4 -263 0x3000 //TX_LAMBDA_NN_EST_5 +263 0x4000 //TX_LAMBDA_NN_EST_5 264 0x4000 //TX_LAMBDA_NN_EST_6 265 0x4000 //TX_LAMBDA_NN_EST_7 266 0x0400 //TX_N_SN_EST @@ -26584,20 +40340,20 @@ 279 0x4000 //TX_B_POST_FLT_0 280 0x4000 //TX_B_POST_FLT_1 281 0x0014 //TX_NS_LVL_CTRL_0 -282 0x001B //TX_NS_LVL_CTRL_1 -283 0x0019 //TX_NS_LVL_CTRL_2 +282 0x0019 //TX_NS_LVL_CTRL_1 +283 0x0017 //TX_NS_LVL_CTRL_2 284 0x0017 //TX_NS_LVL_CTRL_3 -285 0x0017 //TX_NS_LVL_CTRL_4 -286 0x0019 //TX_NS_LVL_CTRL_5 -287 0x0014 //TX_NS_LVL_CTRL_6 +285 0x0019 //TX_NS_LVL_CTRL_4 +286 0x0014 //TX_NS_LVL_CTRL_5 +287 0x001B //TX_NS_LVL_CTRL_6 288 0x0010 //TX_NS_LVL_CTRL_7 289 0x0010 //TX_MIN_GAIN_S_0 290 0x000C //TX_MIN_GAIN_S_1 -291 0x000C //TX_MIN_GAIN_S_2 +291 0x0010 //TX_MIN_GAIN_S_2 292 0x0010 //TX_MIN_GAIN_S_3 -293 0x0010 //TX_MIN_GAIN_S_4 -294 0x000C //TX_MIN_GAIN_S_5 -295 0x0014 //TX_MIN_GAIN_S_6 +293 0x000C //TX_MIN_GAIN_S_4 +294 0x0014 //TX_MIN_GAIN_S_5 +295 0x000C //TX_MIN_GAIN_S_6 296 0x0014 //TX_MIN_GAIN_S_7 297 0x5000 //TX_NMOS_SUP 298 0x0000 //TX_NS_MAX_PRI_SNR_TH @@ -26607,8 +40363,8 @@ 302 0x4000 //TX_SNRI_SUP_2 303 0x4000 //TX_SNRI_SUP_3 304 0x4000 //TX_SNRI_SUP_4 -305 0x4000 //TX_SNRI_SUP_5 -306 0x7FFF //TX_SNRI_SUP_6 +305 0x7FFF //TX_SNRI_SUP_5 +306 0x4000 //TX_SNRI_SUP_6 307 0x3000 //TX_SNRI_SUP_7 308 0x3000 //TX_THR_LFNS 309 0x001A //TX_G_LFNS @@ -26617,36 +40373,36 @@ 312 0x7FFF //TX_A_POST_FILT_0 313 0x2000 //TX_A_POST_FILT_1 314 0x2000 //TX_A_POST_FILT_S_0 -315 0x7000 //TX_A_POST_FILT_S_1 -316 0x6000 //TX_A_POST_FILT_S_2 -317 0x5000 //TX_A_POST_FILT_S_3 -318 0x2000 //TX_A_POST_FILT_S_4 -319 0x6000 //TX_A_POST_FILT_S_5 -320 0x2000 //TX_A_POST_FILT_S_6 +315 0x6000 //TX_A_POST_FILT_S_1 +316 0x5000 //TX_A_POST_FILT_S_2 +317 0x2000 //TX_A_POST_FILT_S_3 +318 0x6000 //TX_A_POST_FILT_S_4 +319 0x2000 //TX_A_POST_FILT_S_5 +320 0x7000 //TX_A_POST_FILT_S_6 321 0x7000 //TX_A_POST_FILT_S_7 322 0x4000 //TX_B_POST_FILT_0 323 0x4000 //TX_B_POST_FILT_1 -324 0x7FFF //TX_B_POST_FILT_2 -325 0x5000 //TX_B_POST_FILT_3 -326 0x7FFF //TX_B_POST_FILT_4 -327 0x7FFF //TX_B_POST_FILT_5 +324 0x5000 //TX_B_POST_FILT_2 +325 0x4000 //TX_B_POST_FILT_3 +326 0x4000 //TX_B_POST_FILT_4 +327 0x4000 //TX_B_POST_FILT_5 328 0x4000 //TX_B_POST_FILT_6 329 0x2000 //TX_B_POST_FILT_7 330 0x7FFF //TX_B_LESSCUT_RTO_S_0 -331 0x7FFF //TX_B_LESSCUT_RTO_S_1 -332 0x7FFF //TX_B_LESSCUT_RTO_S_2 -333 0x7FFF //TX_B_LESSCUT_RTO_S_3 -334 0x7FFF //TX_B_LESSCUT_RTO_S_4 -335 0x7FFF //TX_B_LESSCUT_RTO_S_5 -336 0x7FFF //TX_B_LESSCUT_RTO_S_6 -337 0x7FFF //TX_B_LESSCUT_RTO_S_7 +331 0x1000 //TX_B_LESSCUT_RTO_S_1 +332 0x1000 //TX_B_LESSCUT_RTO_S_2 +333 0x1000 //TX_B_LESSCUT_RTO_S_3 +334 0x1000 //TX_B_LESSCUT_RTO_S_4 +335 0x1000 //TX_B_LESSCUT_RTO_S_5 +336 0x1000 //TX_B_LESSCUT_RTO_S_6 +337 0x1000 //TX_B_LESSCUT_RTO_S_7 338 0x7E14 //TX_LAMBDA_PFILT 339 0x7C29 //TX_LAMBDA_PFILT_S_0 -340 0x7C29 //TX_LAMBDA_PFILT_S_1 -341 0x7200 //TX_LAMBDA_PFILT_S_2 -342 0x7900 //TX_LAMBDA_PFILT_S_3 -343 0x7400 //TX_LAMBDA_PFILT_S_4 -344 0x7200 //TX_LAMBDA_PFILT_S_5 +340 0x7200 //TX_LAMBDA_PFILT_S_1 +341 0x7900 //TX_LAMBDA_PFILT_S_2 +342 0x7400 //TX_LAMBDA_PFILT_S_3 +343 0x7200 //TX_LAMBDA_PFILT_S_4 +344 0x7C29 //TX_LAMBDA_PFILT_S_5 345 0x7C29 //TX_LAMBDA_PFILT_S_6 346 0x7C29 //TX_LAMBDA_PFILT_S_7 347 0x0200 //TX_K_PEPPER @@ -26682,10 +40438,10 @@ 377 0x0000 //TX_NOISE_TH_5_4 378 0x07D0 //TX_NOISE_TH_6 379 0x0004 //TX_MINENOISE_TH -380 0x4000 //TX_MINENOISE_MIC0_TH_MTS -381 0xFFEE //TX_MINENOISE_MIC0_TH_EXP -382 0x6000 //TX_MINENOISE_MIC0_S_TH_MTS -383 0xFFF3 //TX_MINENOISE_MIC0_S_TH_EXP +380 0xD508 //TX_MORENS_TFMASK_TH +381 0x0001 //TX_DRC_QUIET_FLOOR +382 0x6D60 //TX_RATIODTL_CUT_TH +383 0x0DAC //TX_DT_CUT_K1 384 0x00A5 //TX_OUT_ENER_S_TH_CLEAN 385 0x00A5 //TX_OUT_ENER_S_TH_LESSCLEAN 386 0x00A5 //TX_OUT_ENER_S_TH_NOISY @@ -26693,15 +40449,15 @@ 388 0x00CE //TX_OUT_ENER_TH_SPEECH 389 0x2000 //TX_SN_NPB_GAIN 390 0x0000 //TX_NN_NPB_GAIN -391 0x0000 //TX_CSX_ALPHA_0 -392 0x0000 //TX_CSX_ALPHA_1 -393 0x0000 //TX_CSX_ALPHA_2 -394 0x0000 //TX_CSX_ALPHA_3 -395 0x0800 //TX_MU_ARSP_EST -396 0x00C8 //TX_P_OUTBEAM_MIN_TH +391 0x3000 //TX_POST_MASK_SUP_HSNE +392 0x07D0 //TX_TAIL_DET_TH +393 0x4000 //TX_B_LESSCUT_RTO_WTA +394 0x0000 //TX_MEL_G_R +395 0x0080 //TX_SUPHIGH_TH +396 0x0000 //TX_MASK_G_R 397 0x0002 //TX_EXTRA_NS_L -398 0x0800 //TX_EXTRA_NS_A -399 0x0005 //TX_VR_NOISE_FLOOR_TH +398 0x1800 //TX_C_POST_FLT_MASK +399 0x7FFF //TX_A_POST_FLT_WNS 400 0x0148 //TX_MIN_G_LOW300HZ 401 0x0001 //TX_MAXLEVEL_CNG 402 0x00B4 //TX_STN_NOISE_TH @@ -26816,16 +40572,16 @@ 511 0x6666 //TX_MIC_TO_BFGAIN 512 0x0000 //TX_MICTOBFGAIN0 513 0x0000 //TX_FASTMUE_TH -514 0x0000 //TX_DERVB_LEN_0 -515 0x0000 //TX_DERVB_LEN_1 -516 0x0000 //TX_RHO_DERVB -517 0x0000 //TX_MIC_INDX_DERVB -518 0x0000 //TX_MU_DERVB -519 0x0000 //TX_DR_RESRV_0 -520 0x0000 //TX_DR_RESRV_1 -521 0x0000 //TX_DR_RESRV_2 -522 0x0000 //TX_DR_RESRV_3 -523 0x0000 //TX_DR_RESRV_4 +514 0x3000 //TX_DEREVERB_LF_MU +515 0x34CD //TX_DEREVERB_HF_MU +516 0x0007 //TX_DEREVERB_DELAY +517 0x0004 //TX_DEREVERB_COEF_LEN +518 0x0003 //TX_DEREVERB_DNR +519 0x0000 //TX_DEREVERB_ALPHA +520 0x0000 //TX_DEREVERB_BETA +521 0x3A98 //TX_GSC_RTOL_TH +522 0x3A98 //TX_GSC_RTOH_TH +523 0x7E2C //TX_WIDE2_MEANHTH 524 0x0000 //TX_DR_RESRV_5 525 0x0000 //TX_DR_RESRV_6 526 0x0000 //TX_DR_RESRV_7 @@ -26875,8 +40631,8 @@ 570 0x474A //TX_FDEQ_GAIN_3 571 0x473F //TX_FDEQ_GAIN_4 572 0x4240 //TX_FDEQ_GAIN_5 -573 0x3E38 //TX_FDEQ_GAIN_6 -574 0x322E //TX_FDEQ_GAIN_7 +573 0x4040 //TX_FDEQ_GAIN_6 +574 0x3630 //TX_FDEQ_GAIN_7 575 0x2726 //TX_FDEQ_GAIN_8 576 0x383C //TX_FDEQ_GAIN_9 577 0x4848 //TX_FDEQ_GAIN_10 @@ -26902,7 +40658,7 @@ 597 0x0808 //TX_FDEQ_BIN_6 598 0x050E //TX_FDEQ_BIN_7 599 0x0B0C //TX_FDEQ_BIN_8 -600 0x0F0F //TX_FDEQ_BIN_9 +600 0x0F09 //TX_FDEQ_BIN_9 601 0x0000 //TX_FDEQ_BIN_10 602 0x0000 //TX_FDEQ_BIN_11 603 0x0000 //TX_FDEQ_BIN_12 @@ -26974,10 +40730,10 @@ 669 0x4848 //TX_PREEQ_GAIN_MIC1_3 670 0x4848 //TX_PREEQ_GAIN_MIC1_4 671 0x4848 //TX_PREEQ_GAIN_MIC1_5 -672 0x4848 //TX_PREEQ_GAIN_MIC1_6 -673 0x484A //TX_PREEQ_GAIN_MIC1_7 -674 0x4B4E //TX_PREEQ_GAIN_MIC1_8 -675 0x5054 //TX_PREEQ_GAIN_MIC1_9 +672 0x494A //TX_PREEQ_GAIN_MIC1_6 +673 0x4B4C //TX_PREEQ_GAIN_MIC1_7 +674 0x4D4E //TX_PREEQ_GAIN_MIC1_8 +675 0x4F51 //TX_PREEQ_GAIN_MIC1_9 676 0x4848 //TX_PREEQ_GAIN_MIC1_10 677 0x4848 //TX_PREEQ_GAIN_MIC1_11 678 0x4848 //TX_PREEQ_GAIN_MIC1_12 @@ -27001,7 +40757,7 @@ 696 0x0708 //TX_PREEQ_BIN_MIC1_6 697 0x090A //TX_PREEQ_BIN_MIC1_7 698 0x0B0C //TX_PREEQ_BIN_MIC1_8 -699 0x0D08 //TX_PREEQ_BIN_MIC1_9 +699 0x0D0E //TX_PREEQ_BIN_MIC1_9 700 0x0000 //TX_PREEQ_BIN_MIC1_10 701 0x0000 //TX_PREEQ_BIN_MIC1_11 702 0x0000 //TX_PREEQ_BIN_MIC1_12 @@ -27077,8 +40833,8 @@ 772 0x0044 //TX_MIC_PWR_BIAS_3 773 0x0000 //TX_GAIN_LIMIT_0 774 0x0000 //TX_GAIN_LIMIT_1 -775 0x0006 //TX_GAIN_LIMIT_2 -776 0x0006 //TX_GAIN_LIMIT_3 +775 0x0007 //TX_GAIN_LIMIT_2 +776 0x0007 //TX_GAIN_LIMIT_3 777 0x7F5B //TX_BVE_NOVAD0_ALPHADOWN 778 0x7FDE //TX_BVE_VAD0_ALPHAUP 779 0x7F3A //TX_BVE_VAD0_ALPHADOWN @@ -27168,7 +40924,7 @@ 863 0x199A //TX_TDDRC_HMNC_GAIN 864 0x0000 //TX_TDDRC_SMT_FLAG 865 0x0CCD //TX_TDDRC_SMT_W -866 0x0607 //TX_TDDRC_DRC_GAIN +866 0x05A0 //TX_TDDRC_DRC_GAIN 867 0x7FFF //TX_TDDRC_LMT_THRD 868 0x0000 //TX_TDDRC_LMT_ALPHA 869 0x0000 //TX_TFMASKLTH @@ -27199,6 +40955,71 @@ 894 0xC000 //TX_FASTNS_SSA_THHFL 895 0xCCCC //TX_FASTNS_SSA_THLFH 896 0xD999 //TX_FASTNS_SSA_THHFH +897 0x2339 //TX_SENDFUNC_REG_MICMUTE +898 0x0021 //TX_SENDFUNC_REG_MICMUTE1 +899 0x02BC //TX_MICMUTE_RATIO_THR +900 0x0140 //TX_MICMUTE_AMP_THR +901 0x0004 //TX_MICMUTE_HPF_IND +902 0x00C0 //TX_MICMUTE_LOG_EYR_TH +903 0x0008 //TX_MICMUTE_CVG_TIME +904 0x0008 //TX_MICMUTE_RELEASE_TIME +905 0x01FE //TX_MIC_VOLUME_MIC0MUTE +906 0x0020 //TX_MICMUTE_EPD_OFFSET_0 +907 0x001E //TX_MICMUTE_FRQ_AEC_L +908 0x7999 //TX_MICMUTE_EAD_THR +909 0x7FFF //TX_MICMUTE_LAMBDA_CB_NLE +910 0x7FFF //TX_MICMUTE_LAMBDA_RE_EST +911 0x4000 //TX_DTD_THR1_MICMUTE_0 +912 0x7000 //TX_DTD_THR1_MICMUTE_1 +913 0x7FFF //TX_DTD_THR1_MICMUTE_2 +914 0x7FFF //TX_DTD_THR1_MICMUTE_3 +915 0x6CCC //TX_DTD_THR2_MICMUTE_0 +916 0x0400 //TX_MICMUTE_MIN_EQ_RE_EST_0 +917 0x0400 //TX_MICMUTE_MIN_EQ_RE_EST_1 +918 0x1000 //TX_MICMUTE_MIN_EQ_RE_EST_2 +919 0x7FFF //TX_MICMUTE_MIN_EQ_RE_EST_3 +920 0x7FFF //TX_MICMUTE_MIN_EQ_RE_EST_4 +921 0x4000 //TX_MICMUTE_C_POST_FLT +922 0x03E8 //TX_MICMUTE_DT_CUT_K +923 0x0001 //TX_MICMUTE_DT_CUT_THR +924 0x03E8 //TX_MICMUTE_DT_CUT_K2 +925 0x0001 //TX_MICMUTE_DT_CUT_THR2 +926 0x0064 //TX_MICMUTE_DT2_HOLD_N +927 0x1000 //TX_MICMUTE_RATIODTH_THCUT +928 0x1000 //TX_MICMUTE_B_POST_FLT_ECHOL +929 0x7FFF //TX_MICMUTE_B_POST_FLT_ECHOH +930 0x0400 //TX_MICMUTE_C_POST_FLT_MASK +931 0x7999 //TX_MICMUTE_RATIODTL_CUT_TH +932 0x0258 //TX_MICMUTE_DT_CUT_K1 +933 0x0800 //TX_MICMUTE_N2_SN_EST +934 0xFC00 //TX_MICMUTE_THR_SN_EST_0 +935 0x001C //TX_MICMUTE_MIN_G_CTRL_0 +936 0x6000 //TX_MICMUTE_A_POST_FILT_S_0 +937 0x7000 //TX_MICMUTE_B_POST_FILT_0 +938 0x2710 //TX_MIC1RUB_AMP_THR +939 0x0010 //TX_MIC1MUTE_RATIO_THR +940 0x0450 //TX_MIC1MUTE_AMP_THR +941 0x0008 //TX_MIC1MUTE_CVG_TIME +942 0x0008 //TX_MIC1MUTE_RELEASE_TIME +943 0x0000 //TX_AMS_RESRV_01 +944 0x0000 //TX_AMS_RESRV_02 +945 0x0000 //TX_AMS_RESRV_03 +946 0x0000 //TX_AMS_RESRV_04 +947 0x0000 //TX_AMS_RESRV_05 +948 0x0000 //TX_AMS_RESRV_06 +949 0x0000 //TX_AMS_RESRV_07 +950 0x0000 //TX_AMS_RESRV_08 +951 0x0000 //TX_AMS_RESRV_09 +952 0x0000 //TX_AMS_RESRV_10 +953 0x0000 //TX_AMS_RESRV_11 +954 0x0000 //TX_AMS_RESRV_12 +955 0x0000 //TX_AMS_RESRV_13 +956 0x0000 //TX_AMS_RESRV_14 +957 0x0000 //TX_AMS_RESRV_15 +958 0x0000 //TX_AMS_RESRV_16 +959 0x0000 //TX_AMS_RESRV_17 +960 0x0000 //TX_AMS_RESRV_18 +961 0x0000 //TX_AMS_RESRV_19 #RX 0 0x000C //RX_RECVFUNC_MODE_0 1 0x0000 //RX_RECVFUNC_MODE_1 @@ -28050,10 +41871,862 @@ 110 0x0000 //RX_FDDRC_RESRV_0 129 0x0100 //RX_SPK_VOL 130 0x0000 //RX_VOL_RESRV_0 +#RX 2 +157 0x000C //RX_RECVFUNC_MODE_0 +158 0x0000 //RX_RECVFUNC_MODE_1 +159 0x0000 //RX_SAMPLINGFREQ_SIG +160 0x0000 //RX_SAMPLINGFREQ_PROC +161 0x000A //RX_FRAME_SZ +162 0x0000 //RX_DELAY_OPT +163 0x1000 //RX_TDDRC_ALPHA_UP_1 +164 0x1000 //RX_TDDRC_ALPHA_UP_2 +165 0x1000 //RX_TDDRC_ALPHA_UP_3 +166 0x1000 //RX_TDDRC_ALPHA_UP_4 +167 0x0800 //RX_PGA +168 0x7FFF //RX_A_HP +169 0x4000 //RX_B_PE +170 0x7800 //RX_THR_PITCH_DET_0 +171 0x7000 //RX_THR_PITCH_DET_1 +172 0x6000 //RX_THR_PITCH_DET_2 +173 0x0008 //RX_PITCH_BFR_LEN +174 0x0003 //RX_SBD_PITCH_DET +175 0x0100 //RX_PP_RESRV_0 +176 0x0020 //RX_PP_RESRV_1 +177 0x0400 //RX_N_SN_EST +178 0x000C //RX_N2_SN_EST +179 0x0014 //RX_NS_LVL_CTRL +180 0xF800 //RX_THR_SN_EST +181 0x7E00 //RX_LAMBDA_PFILT +182 0x000A //RX_FENS_RESRV_0 +183 0x0190 //RX_FENS_RESRV_1 +184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +187 0x0002 //RX_EXTRA_NS_L +188 0x0800 //RX_EXTRA_NS_A +189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +190 0x7000 //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +192 0x199A //RX_A_POST_FLT +193 0x0000 //RX_LMT_THRD +194 0x4000 //RX_LMT_ALPHA +195 0x0030 //RX_FDEQ_SUBNUM +196 0x4848 //RX_FDEQ_GAIN_0 +197 0x4848 //RX_FDEQ_GAIN_1 +198 0x4844 //RX_FDEQ_GAIN_2 +199 0x4A4C //RX_FDEQ_GAIN_3 +200 0x4E50 //RX_FDEQ_GAIN_4 +201 0x5254 //RX_FDEQ_GAIN_5 +202 0x5658 //RX_FDEQ_GAIN_6 +203 0x5A5C //RX_FDEQ_GAIN_7 +204 0x5C5C //RX_FDEQ_GAIN_8 +205 0x5C5C //RX_FDEQ_GAIN_9 +206 0x5C5C //RX_FDEQ_GAIN_10 +207 0x5C48 //RX_FDEQ_GAIN_11 +208 0x4848 //RX_FDEQ_GAIN_12 +209 0x4848 //RX_FDEQ_GAIN_13 +210 0x4848 //RX_FDEQ_GAIN_14 +211 0x4848 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0202 //RX_FDEQ_BIN_0 +221 0x0203 //RX_FDEQ_BIN_1 +222 0x0402 //RX_FDEQ_BIN_2 +223 0x0303 //RX_FDEQ_BIN_3 +224 0x0303 //RX_FDEQ_BIN_4 +225 0x0303 //RX_FDEQ_BIN_5 +226 0x0303 //RX_FDEQ_BIN_6 +227 0x0303 //RX_FDEQ_BIN_7 +228 0x0A0A //RX_FDEQ_BIN_8 +229 0x0A0E //RX_FDEQ_BIN_9 +230 0x0000 //RX_FDEQ_BIN_10 +231 0x0000 //RX_FDEQ_BIN_11 +232 0x0000 //RX_FDEQ_BIN_12 +233 0x0000 //RX_FDEQ_BIN_13 +234 0x0000 //RX_FDEQ_BIN_14 +235 0x0000 //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x4000 //RX_FDEQ_RESRV_0 +245 0x0320 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0030 //RX_FDDRC_BAND_MARGIN_1 +248 0x0050 //RX_FDDRC_BAND_MARGIN_2 +249 0x0080 //RX_FDDRC_BAND_MARGIN_3 +250 0x0007 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x5000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x6400 //RX_FDDRC_THRD_3_2 +258 0x6400 //RX_FDDRC_THRD_3_3 +259 0x2000 //RX_FDDRC_SLANT_0_0 +260 0x2000 //RX_FDDRC_SLANT_0_1 +261 0x2000 //RX_FDDRC_SLANT_0_2 +262 0x2000 //RX_FDDRC_SLANT_0_3 +263 0x5333 //RX_FDDRC_SLANT_1_0 +264 0x5333 //RX_FDDRC_SLANT_1_1 +265 0x5333 //RX_FDDRC_SLANT_1_2 +266 0x5333 //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +268 0x0002 //RX_FILTINDX +269 0x0000 //RX_TDDRC_THRD_0 +270 0x0000 //RX_TDDRC_THRD_1 +271 0x1800 //RX_TDDRC_THRD_2 +272 0x1800 //RX_TDDRC_THRD_3 +273 0x3000 //RX_TDDRC_SLANT_0 +274 0x6E00 //RX_TDDRC_SLANT_1 +275 0x1000 //RX_TDDRC_ALPHA_UP_0 +276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x199A //RX_TDDRC_HMNC_GAIN +279 0x0001 //RX_TDDRC_SMT_FLAG +280 0x0CCD //RX_TDDRC_SMT_W +281 0x0360 //RX_TDDRC_DRC_GAIN +282 0x7C00 //RX_LAMBDA_PKA_FP +283 0x2000 //RX_TPKA_FP +284 0x2000 //RX_MIN_G_FP +285 0x0080 //RX_MAX_G_FP +286 0x0100 //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 +288 0x0000 //RX_MAXLEVEL_CNG +289 0x3000 //RX_BWE_UV_TH +290 0x3000 //RX_BWE_UV_TH2 +291 0x1800 //RX_BWE_UV_TH3 +292 0x1000 //RX_BWE_V_TH +293 0x04CD //RX_BWE_GAIN1_V_TH1 +294 0x0F33 //RX_BWE_GAIN1_V_TH2 +295 0x7333 //RX_BWE_UV_EQ +296 0x199A //RX_BWE_V_EQ +297 0x7333 //RX_BWE_TONE_TH +298 0x0004 //RX_BWE_UV_HOLD_T +299 0x6CCD //RX_BWE_GAIN2_ALPHA +300 0x799A //RX_BWE_GAIN3_ALPHA +301 0x001E //RX_BWE_CUTOFF +302 0x3000 //RX_BWE_GAINFILL +303 0x3200 //RX_BWE_MAXTH_TONE +304 0x2000 //RX_BWE_EQ_0 +305 0x2000 //RX_BWE_EQ_1 +306 0x2000 //RX_BWE_EQ_2 +307 0x2000 //RX_BWE_EQ_3 +308 0x2000 //RX_BWE_EQ_4 +309 0x2000 //RX_BWE_EQ_5 +310 0x2000 //RX_BWE_EQ_6 +311 0x0000 //RX_BWE_RESRV_0 +312 0x0000 //RX_BWE_RESRV_1 +313 0x0000 //RX_BWE_RESRV_2 +#VOL 0 +163 0x1000 //RX_TDDRC_ALPHA_UP_1 +164 0x1000 //RX_TDDRC_ALPHA_UP_2 +165 0x1000 //RX_TDDRC_ALPHA_UP_3 +166 0x1000 //RX_TDDRC_ALPHA_UP_4 +184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +190 0x7000 //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +269 0x0000 //RX_TDDRC_THRD_0 +270 0x0000 //RX_TDDRC_THRD_1 +271 0x1800 //RX_TDDRC_THRD_2 +272 0x1800 //RX_TDDRC_THRD_3 +273 0x3000 //RX_TDDRC_SLANT_0 +274 0x6E00 //RX_TDDRC_SLANT_1 +275 0x1000 //RX_TDDRC_ALPHA_UP_0 +276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x199A //RX_TDDRC_HMNC_GAIN +279 0x0001 //RX_TDDRC_SMT_FLAG +280 0x0CCD //RX_TDDRC_SMT_W +281 0x0360 //RX_TDDRC_DRC_GAIN +195 0x0030 //RX_FDEQ_SUBNUM +196 0x4848 //RX_FDEQ_GAIN_0 +197 0x4848 //RX_FDEQ_GAIN_1 +198 0x4844 //RX_FDEQ_GAIN_2 +199 0x4A4C //RX_FDEQ_GAIN_3 +200 0x4E50 //RX_FDEQ_GAIN_4 +201 0x5254 //RX_FDEQ_GAIN_5 +202 0x5658 //RX_FDEQ_GAIN_6 +203 0x5A5C //RX_FDEQ_GAIN_7 +204 0x5C5C //RX_FDEQ_GAIN_8 +205 0x5C5C //RX_FDEQ_GAIN_9 +206 0x5C5C //RX_FDEQ_GAIN_10 +207 0x5C48 //RX_FDEQ_GAIN_11 +208 0x4848 //RX_FDEQ_GAIN_12 +209 0x4848 //RX_FDEQ_GAIN_13 +210 0x4848 //RX_FDEQ_GAIN_14 +211 0x4848 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0202 //RX_FDEQ_BIN_0 +221 0x0203 //RX_FDEQ_BIN_1 +222 0x0402 //RX_FDEQ_BIN_2 +223 0x0303 //RX_FDEQ_BIN_3 +224 0x0303 //RX_FDEQ_BIN_4 +225 0x0303 //RX_FDEQ_BIN_5 +226 0x0303 //RX_FDEQ_BIN_6 +227 0x0303 //RX_FDEQ_BIN_7 +228 0x0A0A //RX_FDEQ_BIN_8 +229 0x0A0E //RX_FDEQ_BIN_9 +230 0x0000 //RX_FDEQ_BIN_10 +231 0x0000 //RX_FDEQ_BIN_11 +232 0x0000 //RX_FDEQ_BIN_12 +233 0x0000 //RX_FDEQ_BIN_13 +234 0x0000 //RX_FDEQ_BIN_14 +235 0x0000 //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x4000 //RX_FDEQ_RESRV_0 +245 0x0320 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0030 //RX_FDDRC_BAND_MARGIN_1 +248 0x0050 //RX_FDDRC_BAND_MARGIN_2 +249 0x0080 //RX_FDDRC_BAND_MARGIN_3 +250 0x0007 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x5000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x6400 //RX_FDDRC_THRD_3_2 +258 0x6400 //RX_FDDRC_THRD_3_3 +259 0x2000 //RX_FDDRC_SLANT_0_0 +260 0x2000 //RX_FDDRC_SLANT_0_1 +261 0x2000 //RX_FDDRC_SLANT_0_2 +262 0x2000 //RX_FDDRC_SLANT_0_3 +263 0x5333 //RX_FDDRC_SLANT_1_0 +264 0x5333 //RX_FDDRC_SLANT_1_1 +265 0x5333 //RX_FDDRC_SLANT_1_2 +266 0x5333 //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +286 0x0100 //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 +#VOL 1 +163 0x1000 //RX_TDDRC_ALPHA_UP_1 +164 0x1000 //RX_TDDRC_ALPHA_UP_2 +165 0x1000 //RX_TDDRC_ALPHA_UP_3 +166 0x1000 //RX_TDDRC_ALPHA_UP_4 +184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +190 0x7000 //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +269 0x0000 //RX_TDDRC_THRD_0 +270 0x0000 //RX_TDDRC_THRD_1 +271 0x1800 //RX_TDDRC_THRD_2 +272 0x1800 //RX_TDDRC_THRD_3 +273 0x3000 //RX_TDDRC_SLANT_0 +274 0x6E00 //RX_TDDRC_SLANT_1 +275 0x1000 //RX_TDDRC_ALPHA_UP_0 +276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x199A //RX_TDDRC_HMNC_GAIN +279 0x0001 //RX_TDDRC_SMT_FLAG +280 0x0CCD //RX_TDDRC_SMT_W +281 0x0360 //RX_TDDRC_DRC_GAIN +195 0x0030 //RX_FDEQ_SUBNUM +196 0x4848 //RX_FDEQ_GAIN_0 +197 0x4848 //RX_FDEQ_GAIN_1 +198 0x4844 //RX_FDEQ_GAIN_2 +199 0x4A4C //RX_FDEQ_GAIN_3 +200 0x4E50 //RX_FDEQ_GAIN_4 +201 0x5254 //RX_FDEQ_GAIN_5 +202 0x5658 //RX_FDEQ_GAIN_6 +203 0x5A5C //RX_FDEQ_GAIN_7 +204 0x5C5C //RX_FDEQ_GAIN_8 +205 0x5C5C //RX_FDEQ_GAIN_9 +206 0x5C5C //RX_FDEQ_GAIN_10 +207 0x5C48 //RX_FDEQ_GAIN_11 +208 0x4848 //RX_FDEQ_GAIN_12 +209 0x4848 //RX_FDEQ_GAIN_13 +210 0x4848 //RX_FDEQ_GAIN_14 +211 0x4848 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0202 //RX_FDEQ_BIN_0 +221 0x0203 //RX_FDEQ_BIN_1 +222 0x0402 //RX_FDEQ_BIN_2 +223 0x0303 //RX_FDEQ_BIN_3 +224 0x0303 //RX_FDEQ_BIN_4 +225 0x0303 //RX_FDEQ_BIN_5 +226 0x0303 //RX_FDEQ_BIN_6 +227 0x0303 //RX_FDEQ_BIN_7 +228 0x0A0A //RX_FDEQ_BIN_8 +229 0x0A0E //RX_FDEQ_BIN_9 +230 0x0000 //RX_FDEQ_BIN_10 +231 0x0000 //RX_FDEQ_BIN_11 +232 0x0000 //RX_FDEQ_BIN_12 +233 0x0000 //RX_FDEQ_BIN_13 +234 0x0000 //RX_FDEQ_BIN_14 +235 0x0000 //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x4000 //RX_FDEQ_RESRV_0 +245 0x0320 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0030 //RX_FDDRC_BAND_MARGIN_1 +248 0x0050 //RX_FDDRC_BAND_MARGIN_2 +249 0x0080 //RX_FDDRC_BAND_MARGIN_3 +250 0x0007 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x5000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x6400 //RX_FDDRC_THRD_3_2 +258 0x6400 //RX_FDDRC_THRD_3_3 +259 0x2000 //RX_FDDRC_SLANT_0_0 +260 0x2000 //RX_FDDRC_SLANT_0_1 +261 0x2000 //RX_FDDRC_SLANT_0_2 +262 0x2000 //RX_FDDRC_SLANT_0_3 +263 0x5333 //RX_FDDRC_SLANT_1_0 +264 0x5333 //RX_FDDRC_SLANT_1_1 +265 0x5333 //RX_FDDRC_SLANT_1_2 +266 0x5333 //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +286 0x0100 //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 +#VOL 2 +163 0x1000 //RX_TDDRC_ALPHA_UP_1 +164 0x1000 //RX_TDDRC_ALPHA_UP_2 +165 0x1000 //RX_TDDRC_ALPHA_UP_3 +166 0x1000 //RX_TDDRC_ALPHA_UP_4 +184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +190 0x7000 //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +269 0x0000 //RX_TDDRC_THRD_0 +270 0x0000 //RX_TDDRC_THRD_1 +271 0x1800 //RX_TDDRC_THRD_2 +272 0x1800 //RX_TDDRC_THRD_3 +273 0x3000 //RX_TDDRC_SLANT_0 +274 0x6E00 //RX_TDDRC_SLANT_1 +275 0x1000 //RX_TDDRC_ALPHA_UP_0 +276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x199A //RX_TDDRC_HMNC_GAIN +279 0x0001 //RX_TDDRC_SMT_FLAG +280 0x0CCD //RX_TDDRC_SMT_W +281 0x0360 //RX_TDDRC_DRC_GAIN +195 0x0030 //RX_FDEQ_SUBNUM +196 0x4848 //RX_FDEQ_GAIN_0 +197 0x4848 //RX_FDEQ_GAIN_1 +198 0x4844 //RX_FDEQ_GAIN_2 +199 0x4A4C //RX_FDEQ_GAIN_3 +200 0x4E50 //RX_FDEQ_GAIN_4 +201 0x5254 //RX_FDEQ_GAIN_5 +202 0x5658 //RX_FDEQ_GAIN_6 +203 0x5A5C //RX_FDEQ_GAIN_7 +204 0x5C5C //RX_FDEQ_GAIN_8 +205 0x5C5C //RX_FDEQ_GAIN_9 +206 0x5C5C //RX_FDEQ_GAIN_10 +207 0x5C48 //RX_FDEQ_GAIN_11 +208 0x4848 //RX_FDEQ_GAIN_12 +209 0x4848 //RX_FDEQ_GAIN_13 +210 0x4848 //RX_FDEQ_GAIN_14 +211 0x4848 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0202 //RX_FDEQ_BIN_0 +221 0x0203 //RX_FDEQ_BIN_1 +222 0x0402 //RX_FDEQ_BIN_2 +223 0x0303 //RX_FDEQ_BIN_3 +224 0x0303 //RX_FDEQ_BIN_4 +225 0x0303 //RX_FDEQ_BIN_5 +226 0x0303 //RX_FDEQ_BIN_6 +227 0x0303 //RX_FDEQ_BIN_7 +228 0x0A0A //RX_FDEQ_BIN_8 +229 0x0A0E //RX_FDEQ_BIN_9 +230 0x0000 //RX_FDEQ_BIN_10 +231 0x0000 //RX_FDEQ_BIN_11 +232 0x0000 //RX_FDEQ_BIN_12 +233 0x0000 //RX_FDEQ_BIN_13 +234 0x0000 //RX_FDEQ_BIN_14 +235 0x0000 //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x4000 //RX_FDEQ_RESRV_0 +245 0x0320 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0030 //RX_FDDRC_BAND_MARGIN_1 +248 0x0050 //RX_FDDRC_BAND_MARGIN_2 +249 0x0080 //RX_FDDRC_BAND_MARGIN_3 +250 0x0007 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x5000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x6400 //RX_FDDRC_THRD_3_2 +258 0x6400 //RX_FDDRC_THRD_3_3 +259 0x2000 //RX_FDDRC_SLANT_0_0 +260 0x2000 //RX_FDDRC_SLANT_0_1 +261 0x2000 //RX_FDDRC_SLANT_0_2 +262 0x2000 //RX_FDDRC_SLANT_0_3 +263 0x5333 //RX_FDDRC_SLANT_1_0 +264 0x5333 //RX_FDDRC_SLANT_1_1 +265 0x5333 //RX_FDDRC_SLANT_1_2 +266 0x5333 //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +286 0x0100 //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 +#VOL 3 +163 0x1000 //RX_TDDRC_ALPHA_UP_1 +164 0x1000 //RX_TDDRC_ALPHA_UP_2 +165 0x1000 //RX_TDDRC_ALPHA_UP_3 +166 0x1000 //RX_TDDRC_ALPHA_UP_4 +184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +190 0x7000 //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +269 0x0000 //RX_TDDRC_THRD_0 +270 0x0000 //RX_TDDRC_THRD_1 +271 0x1800 //RX_TDDRC_THRD_2 +272 0x1800 //RX_TDDRC_THRD_3 +273 0x3000 //RX_TDDRC_SLANT_0 +274 0x6E00 //RX_TDDRC_SLANT_1 +275 0x1000 //RX_TDDRC_ALPHA_UP_0 +276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x199A //RX_TDDRC_HMNC_GAIN +279 0x0001 //RX_TDDRC_SMT_FLAG +280 0x0CCD //RX_TDDRC_SMT_W +281 0x0360 //RX_TDDRC_DRC_GAIN +195 0x0030 //RX_FDEQ_SUBNUM +196 0x4848 //RX_FDEQ_GAIN_0 +197 0x4848 //RX_FDEQ_GAIN_1 +198 0x4844 //RX_FDEQ_GAIN_2 +199 0x4A4C //RX_FDEQ_GAIN_3 +200 0x4E50 //RX_FDEQ_GAIN_4 +201 0x5254 //RX_FDEQ_GAIN_5 +202 0x5658 //RX_FDEQ_GAIN_6 +203 0x5A5C //RX_FDEQ_GAIN_7 +204 0x5C5C //RX_FDEQ_GAIN_8 +205 0x5C5C //RX_FDEQ_GAIN_9 +206 0x5C5C //RX_FDEQ_GAIN_10 +207 0x5C48 //RX_FDEQ_GAIN_11 +208 0x4848 //RX_FDEQ_GAIN_12 +209 0x4848 //RX_FDEQ_GAIN_13 +210 0x4848 //RX_FDEQ_GAIN_14 +211 0x4848 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0202 //RX_FDEQ_BIN_0 +221 0x0203 //RX_FDEQ_BIN_1 +222 0x0402 //RX_FDEQ_BIN_2 +223 0x0303 //RX_FDEQ_BIN_3 +224 0x0303 //RX_FDEQ_BIN_4 +225 0x0303 //RX_FDEQ_BIN_5 +226 0x0303 //RX_FDEQ_BIN_6 +227 0x0303 //RX_FDEQ_BIN_7 +228 0x0A0A //RX_FDEQ_BIN_8 +229 0x0A0E //RX_FDEQ_BIN_9 +230 0x0000 //RX_FDEQ_BIN_10 +231 0x0000 //RX_FDEQ_BIN_11 +232 0x0000 //RX_FDEQ_BIN_12 +233 0x0000 //RX_FDEQ_BIN_13 +234 0x0000 //RX_FDEQ_BIN_14 +235 0x0000 //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x4000 //RX_FDEQ_RESRV_0 +245 0x0320 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0030 //RX_FDDRC_BAND_MARGIN_1 +248 0x0050 //RX_FDDRC_BAND_MARGIN_2 +249 0x0080 //RX_FDDRC_BAND_MARGIN_3 +250 0x0007 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x5000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x6400 //RX_FDDRC_THRD_3_2 +258 0x6400 //RX_FDDRC_THRD_3_3 +259 0x2000 //RX_FDDRC_SLANT_0_0 +260 0x2000 //RX_FDDRC_SLANT_0_1 +261 0x2000 //RX_FDDRC_SLANT_0_2 +262 0x2000 //RX_FDDRC_SLANT_0_3 +263 0x5333 //RX_FDDRC_SLANT_1_0 +264 0x5333 //RX_FDDRC_SLANT_1_1 +265 0x5333 //RX_FDDRC_SLANT_1_2 +266 0x5333 //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +286 0x0100 //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 +#VOL 4 +163 0x1000 //RX_TDDRC_ALPHA_UP_1 +164 0x1000 //RX_TDDRC_ALPHA_UP_2 +165 0x1000 //RX_TDDRC_ALPHA_UP_3 +166 0x1000 //RX_TDDRC_ALPHA_UP_4 +184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +190 0x7000 //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +269 0x0000 //RX_TDDRC_THRD_0 +270 0x0000 //RX_TDDRC_THRD_1 +271 0x1800 //RX_TDDRC_THRD_2 +272 0x1800 //RX_TDDRC_THRD_3 +273 0x3000 //RX_TDDRC_SLANT_0 +274 0x6E00 //RX_TDDRC_SLANT_1 +275 0x1000 //RX_TDDRC_ALPHA_UP_0 +276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x199A //RX_TDDRC_HMNC_GAIN +279 0x0001 //RX_TDDRC_SMT_FLAG +280 0x0CCD //RX_TDDRC_SMT_W +281 0x0360 //RX_TDDRC_DRC_GAIN +195 0x0030 //RX_FDEQ_SUBNUM +196 0x4848 //RX_FDEQ_GAIN_0 +197 0x4848 //RX_FDEQ_GAIN_1 +198 0x4844 //RX_FDEQ_GAIN_2 +199 0x4A4C //RX_FDEQ_GAIN_3 +200 0x4E50 //RX_FDEQ_GAIN_4 +201 0x5254 //RX_FDEQ_GAIN_5 +202 0x5658 //RX_FDEQ_GAIN_6 +203 0x5A5C //RX_FDEQ_GAIN_7 +204 0x5C5C //RX_FDEQ_GAIN_8 +205 0x5C5C //RX_FDEQ_GAIN_9 +206 0x5C5C //RX_FDEQ_GAIN_10 +207 0x5C48 //RX_FDEQ_GAIN_11 +208 0x4848 //RX_FDEQ_GAIN_12 +209 0x4848 //RX_FDEQ_GAIN_13 +210 0x4848 //RX_FDEQ_GAIN_14 +211 0x4848 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0202 //RX_FDEQ_BIN_0 +221 0x0203 //RX_FDEQ_BIN_1 +222 0x0402 //RX_FDEQ_BIN_2 +223 0x0303 //RX_FDEQ_BIN_3 +224 0x0303 //RX_FDEQ_BIN_4 +225 0x0303 //RX_FDEQ_BIN_5 +226 0x0303 //RX_FDEQ_BIN_6 +227 0x0303 //RX_FDEQ_BIN_7 +228 0x0A0A //RX_FDEQ_BIN_8 +229 0x0A0E //RX_FDEQ_BIN_9 +230 0x0000 //RX_FDEQ_BIN_10 +231 0x0000 //RX_FDEQ_BIN_11 +232 0x0000 //RX_FDEQ_BIN_12 +233 0x0000 //RX_FDEQ_BIN_13 +234 0x0000 //RX_FDEQ_BIN_14 +235 0x0000 //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x4000 //RX_FDEQ_RESRV_0 +245 0x0320 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0030 //RX_FDDRC_BAND_MARGIN_1 +248 0x0050 //RX_FDDRC_BAND_MARGIN_2 +249 0x0080 //RX_FDDRC_BAND_MARGIN_3 +250 0x0007 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x5000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x6400 //RX_FDDRC_THRD_3_2 +258 0x6400 //RX_FDDRC_THRD_3_3 +259 0x2000 //RX_FDDRC_SLANT_0_0 +260 0x2000 //RX_FDDRC_SLANT_0_1 +261 0x2000 //RX_FDDRC_SLANT_0_2 +262 0x2000 //RX_FDDRC_SLANT_0_3 +263 0x5333 //RX_FDDRC_SLANT_1_0 +264 0x5333 //RX_FDDRC_SLANT_1_1 +265 0x5333 //RX_FDDRC_SLANT_1_2 +266 0x5333 //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +286 0x0100 //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 +#VOL 5 +163 0x1000 //RX_TDDRC_ALPHA_UP_1 +164 0x1000 //RX_TDDRC_ALPHA_UP_2 +165 0x1000 //RX_TDDRC_ALPHA_UP_3 +166 0x1000 //RX_TDDRC_ALPHA_UP_4 +184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +190 0x7000 //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +269 0x0000 //RX_TDDRC_THRD_0 +270 0x0000 //RX_TDDRC_THRD_1 +271 0x1800 //RX_TDDRC_THRD_2 +272 0x1800 //RX_TDDRC_THRD_3 +273 0x3000 //RX_TDDRC_SLANT_0 +274 0x6E00 //RX_TDDRC_SLANT_1 +275 0x1000 //RX_TDDRC_ALPHA_UP_0 +276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x199A //RX_TDDRC_HMNC_GAIN +279 0x0001 //RX_TDDRC_SMT_FLAG +280 0x0CCD //RX_TDDRC_SMT_W +281 0x0360 //RX_TDDRC_DRC_GAIN +195 0x0030 //RX_FDEQ_SUBNUM +196 0x4848 //RX_FDEQ_GAIN_0 +197 0x4848 //RX_FDEQ_GAIN_1 +198 0x4844 //RX_FDEQ_GAIN_2 +199 0x4A4C //RX_FDEQ_GAIN_3 +200 0x4E50 //RX_FDEQ_GAIN_4 +201 0x5254 //RX_FDEQ_GAIN_5 +202 0x5658 //RX_FDEQ_GAIN_6 +203 0x5A5C //RX_FDEQ_GAIN_7 +204 0x5C5C //RX_FDEQ_GAIN_8 +205 0x5C5C //RX_FDEQ_GAIN_9 +206 0x5C5C //RX_FDEQ_GAIN_10 +207 0x5C48 //RX_FDEQ_GAIN_11 +208 0x4848 //RX_FDEQ_GAIN_12 +209 0x4848 //RX_FDEQ_GAIN_13 +210 0x4848 //RX_FDEQ_GAIN_14 +211 0x4848 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0202 //RX_FDEQ_BIN_0 +221 0x0203 //RX_FDEQ_BIN_1 +222 0x0402 //RX_FDEQ_BIN_2 +223 0x0303 //RX_FDEQ_BIN_3 +224 0x0303 //RX_FDEQ_BIN_4 +225 0x0303 //RX_FDEQ_BIN_5 +226 0x0303 //RX_FDEQ_BIN_6 +227 0x0303 //RX_FDEQ_BIN_7 +228 0x0A0A //RX_FDEQ_BIN_8 +229 0x0A0E //RX_FDEQ_BIN_9 +230 0x0000 //RX_FDEQ_BIN_10 +231 0x0000 //RX_FDEQ_BIN_11 +232 0x0000 //RX_FDEQ_BIN_12 +233 0x0000 //RX_FDEQ_BIN_13 +234 0x0000 //RX_FDEQ_BIN_14 +235 0x0000 //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x4000 //RX_FDEQ_RESRV_0 +245 0x0320 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0030 //RX_FDDRC_BAND_MARGIN_1 +248 0x0050 //RX_FDDRC_BAND_MARGIN_2 +249 0x0080 //RX_FDDRC_BAND_MARGIN_3 +250 0x0007 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x5000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x6400 //RX_FDDRC_THRD_3_2 +258 0x6400 //RX_FDDRC_THRD_3_3 +259 0x2000 //RX_FDDRC_SLANT_0_0 +260 0x2000 //RX_FDDRC_SLANT_0_1 +261 0x2000 //RX_FDDRC_SLANT_0_2 +262 0x2000 //RX_FDDRC_SLANT_0_3 +263 0x5333 //RX_FDDRC_SLANT_1_0 +264 0x5333 //RX_FDDRC_SLANT_1_1 +265 0x5333 //RX_FDDRC_SLANT_1_2 +266 0x5333 //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +286 0x0100 //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 +#VOL 6 +163 0x1000 //RX_TDDRC_ALPHA_UP_1 +164 0x1000 //RX_TDDRC_ALPHA_UP_2 +165 0x1000 //RX_TDDRC_ALPHA_UP_3 +166 0x1000 //RX_TDDRC_ALPHA_UP_4 +184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +190 0x7000 //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +269 0x0000 //RX_TDDRC_THRD_0 +270 0x0000 //RX_TDDRC_THRD_1 +271 0x1800 //RX_TDDRC_THRD_2 +272 0x1800 //RX_TDDRC_THRD_3 +273 0x3000 //RX_TDDRC_SLANT_0 +274 0x6E00 //RX_TDDRC_SLANT_1 +275 0x1000 //RX_TDDRC_ALPHA_UP_0 +276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x199A //RX_TDDRC_HMNC_GAIN +279 0x0001 //RX_TDDRC_SMT_FLAG +280 0x0CCD //RX_TDDRC_SMT_W +281 0x0360 //RX_TDDRC_DRC_GAIN +195 0x0030 //RX_FDEQ_SUBNUM +196 0x4848 //RX_FDEQ_GAIN_0 +197 0x4848 //RX_FDEQ_GAIN_1 +198 0x4844 //RX_FDEQ_GAIN_2 +199 0x4A4C //RX_FDEQ_GAIN_3 +200 0x4E50 //RX_FDEQ_GAIN_4 +201 0x5254 //RX_FDEQ_GAIN_5 +202 0x5658 //RX_FDEQ_GAIN_6 +203 0x5A5C //RX_FDEQ_GAIN_7 +204 0x5C5C //RX_FDEQ_GAIN_8 +205 0x5C5C //RX_FDEQ_GAIN_9 +206 0x5C5C //RX_FDEQ_GAIN_10 +207 0x5C48 //RX_FDEQ_GAIN_11 +208 0x4848 //RX_FDEQ_GAIN_12 +209 0x4848 //RX_FDEQ_GAIN_13 +210 0x4848 //RX_FDEQ_GAIN_14 +211 0x4848 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0202 //RX_FDEQ_BIN_0 +221 0x0203 //RX_FDEQ_BIN_1 +222 0x0402 //RX_FDEQ_BIN_2 +223 0x0303 //RX_FDEQ_BIN_3 +224 0x0303 //RX_FDEQ_BIN_4 +225 0x0303 //RX_FDEQ_BIN_5 +226 0x0303 //RX_FDEQ_BIN_6 +227 0x0303 //RX_FDEQ_BIN_7 +228 0x0A0A //RX_FDEQ_BIN_8 +229 0x0A0E //RX_FDEQ_BIN_9 +230 0x0000 //RX_FDEQ_BIN_10 +231 0x0000 //RX_FDEQ_BIN_11 +232 0x0000 //RX_FDEQ_BIN_12 +233 0x0000 //RX_FDEQ_BIN_13 +234 0x0000 //RX_FDEQ_BIN_14 +235 0x0000 //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x4000 //RX_FDEQ_RESRV_0 +245 0x0320 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0030 //RX_FDDRC_BAND_MARGIN_1 +248 0x0050 //RX_FDDRC_BAND_MARGIN_2 +249 0x0080 //RX_FDDRC_BAND_MARGIN_3 +250 0x0007 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x5000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x6400 //RX_FDDRC_THRD_3_2 +258 0x6400 //RX_FDDRC_THRD_3_3 +259 0x2000 //RX_FDDRC_SLANT_0_0 +260 0x2000 //RX_FDDRC_SLANT_0_1 +261 0x2000 //RX_FDDRC_SLANT_0_2 +262 0x2000 //RX_FDDRC_SLANT_0_3 +263 0x5333 //RX_FDDRC_SLANT_1_0 +264 0x5333 //RX_FDDRC_SLANT_1_1 +265 0x5333 //RX_FDDRC_SLANT_1_2 +266 0x5333 //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +286 0x0100 //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 #CASE_NAME HANDSET-HANDSET_HAC-TMOBILE_US-WB -#PARAM_TYPE TX+RX -#TOTAL_CUSTOM_STEP 7 +#PARAM_MODE Full +#PARAM_TYPE TX+2RX +#TOTAL_CUSTOM_STEP 7+7 #TX 0 0x0000 //TX_OPERATION_MODE_0 1 0x0000 //TX_OPERATION_MODE_1 @@ -28076,7 +42749,7 @@ 18 0x0000 //TX_SYS_RESRV_2 19 0x0000 //TX_SYS_RESRV_3 20 0x0000 //TX_DIST2REF0 -21 0x00A4 //TX_DIST2REF1 +21 0x00A3 //TX_DIST2REF1 22 0x0000 //TX_DIST2REF_02 23 0x0000 //TX_DIST2REF_03 24 0x0000 //TX_DIST2REF_04 @@ -28306,16 +42979,16 @@ 248 0xF800 //TX_THR_SN_EST_6 249 0xF700 //TX_THR_SN_EST_7 250 0x0000 //TX_DELTA_THR_SN_EST_0 -251 0x0100 //TX_DELTA_THR_SN_EST_1 -252 0x01A0 //TX_DELTA_THR_SN_EST_2 +251 0x01A0 //TX_DELTA_THR_SN_EST_1 +252 0x0200 //TX_DELTA_THR_SN_EST_2 253 0x0200 //TX_DELTA_THR_SN_EST_3 -254 0x0200 //TX_DELTA_THR_SN_EST_4 -255 0x0100 //TX_DELTA_THR_SN_EST_5 -256 0x0200 //TX_DELTA_THR_SN_EST_6 +254 0x0100 //TX_DELTA_THR_SN_EST_4 +255 0x0200 //TX_DELTA_THR_SN_EST_5 +256 0x0100 //TX_DELTA_THR_SN_EST_6 257 0x0200 //TX_DELTA_THR_SN_EST_7 258 0x4000 //TX_LAMBDA_NN_EST_0 -259 0x4000 //TX_LAMBDA_NN_EST_1 -260 0x5000 //TX_LAMBDA_NN_EST_2 +259 0x5000 //TX_LAMBDA_NN_EST_1 +260 0x4000 //TX_LAMBDA_NN_EST_2 261 0x4000 //TX_LAMBDA_NN_EST_3 262 0x4000 //TX_LAMBDA_NN_EST_4 263 0x4000 //TX_LAMBDA_NN_EST_5 @@ -28337,18 +43010,18 @@ 279 0x1000 //TX_B_POST_FLT_0 280 0x4000 //TX_B_POST_FLT_1 281 0x0018 //TX_NS_LVL_CTRL_0 -282 0x001C //TX_NS_LVL_CTRL_1 -283 0x0019 //TX_NS_LVL_CTRL_2 -284 0x0018 //TX_NS_LVL_CTRL_3 -285 0x0019 //TX_NS_LVL_CTRL_4 -286 0x001A //TX_NS_LVL_CTRL_5 -287 0x001E //TX_NS_LVL_CTRL_6 +282 0x0019 //TX_NS_LVL_CTRL_1 +283 0x0018 //TX_NS_LVL_CTRL_2 +284 0x0019 //TX_NS_LVL_CTRL_3 +285 0x001A //TX_NS_LVL_CTRL_4 +286 0x001E //TX_NS_LVL_CTRL_5 +287 0x001C //TX_NS_LVL_CTRL_6 288 0x001C //TX_NS_LVL_CTRL_7 289 0x000E //TX_MIN_GAIN_S_0 -290 0x0018 //TX_MIN_GAIN_S_1 +290 0x0012 //TX_MIN_GAIN_S_1 291 0x0012 //TX_MIN_GAIN_S_2 292 0x0012 //TX_MIN_GAIN_S_3 -293 0x0012 //TX_MIN_GAIN_S_4 +293 0x0018 //TX_MIN_GAIN_S_4 294 0x0018 //TX_MIN_GAIN_S_5 295 0x0018 //TX_MIN_GAIN_S_6 296 0x0018 //TX_MIN_GAIN_S_7 @@ -28356,8 +43029,8 @@ 298 0x0000 //TX_NS_MAX_PRI_SNR_TH 299 0x0000 //TX_NMOS_SUP_MENSA 300 0x7FFF //TX_SNRI_SUP_0 -301 0x4000 //TX_SNRI_SUP_1 -302 0x5000 //TX_SNRI_SUP_2 +301 0x5000 //TX_SNRI_SUP_1 +302 0x4000 //TX_SNRI_SUP_2 303 0x4000 //TX_SNRI_SUP_3 304 0x4000 //TX_SNRI_SUP_4 305 0x4000 //TX_SNRI_SUP_5 @@ -28370,28 +43043,28 @@ 312 0x7FFF //TX_A_POST_FILT_0 313 0x2000 //TX_A_POST_FILT_1 314 0x7000 //TX_A_POST_FILT_S_0 -315 0x7000 //TX_A_POST_FILT_S_1 +315 0x3000 //TX_A_POST_FILT_S_1 316 0x3000 //TX_A_POST_FILT_S_2 -317 0x3000 //TX_A_POST_FILT_S_3 -318 0x2000 //TX_A_POST_FILT_S_4 +317 0x2000 //TX_A_POST_FILT_S_3 +318 0x7000 //TX_A_POST_FILT_S_4 319 0x7000 //TX_A_POST_FILT_S_5 320 0x7000 //TX_A_POST_FILT_S_6 321 0x7000 //TX_A_POST_FILT_S_7 322 0x1000 //TX_B_POST_FILT_0 323 0x4000 //TX_B_POST_FILT_1 -324 0x5000 //TX_B_POST_FILT_2 +324 0x4000 //TX_B_POST_FILT_2 325 0x4000 //TX_B_POST_FILT_3 326 0x4000 //TX_B_POST_FILT_4 327 0x4000 //TX_B_POST_FILT_5 -328 0x4000 //TX_B_POST_FILT_6 +328 0x5000 //TX_B_POST_FILT_6 329 0x4000 //TX_B_POST_FILT_7 330 0x4000 //TX_B_LESSCUT_RTO_S_0 331 0x6000 //TX_B_LESSCUT_RTO_S_1 332 0x6000 //TX_B_LESSCUT_RTO_S_2 333 0x6000 //TX_B_LESSCUT_RTO_S_3 -334 0x6000 //TX_B_LESSCUT_RTO_S_4 +334 0x7FFF //TX_B_LESSCUT_RTO_S_4 335 0x6000 //TX_B_LESSCUT_RTO_S_5 -336 0x7FFF //TX_B_LESSCUT_RTO_S_6 +336 0x6000 //TX_B_LESSCUT_RTO_S_6 337 0x7FFF //TX_B_LESSCUT_RTO_S_7 338 0x7C29 //TX_LAMBDA_PFILT 339 0x7C29 //TX_LAMBDA_PFILT_S_0 @@ -28435,10 +43108,10 @@ 377 0x4E20 //TX_NOISE_TH_5_4 378 0x21E8 //TX_NOISE_TH_6 379 0x0014 //TX_MINENOISE_TH -380 0x4000 //TX_MINENOISE_MIC0_TH_MTS -381 0xFFEE //TX_MINENOISE_MIC0_TH_EXP -382 0x6000 //TX_MINENOISE_MIC0_S_TH_MTS -383 0xFFF3 //TX_MINENOISE_MIC0_S_TH_EXP +380 0xD508 //TX_MORENS_TFMASK_TH +381 0x0001 //TX_DRC_QUIET_FLOOR +382 0x6D60 //TX_RATIODTL_CUT_TH +383 0x0DAC //TX_DT_CUT_K1 384 0x00A5 //TX_OUT_ENER_S_TH_CLEAN 385 0x00A5 //TX_OUT_ENER_S_TH_LESSCLEAN 386 0x00A5 //TX_OUT_ENER_S_TH_NOISY @@ -28446,15 +43119,15 @@ 388 0x00CE //TX_OUT_ENER_TH_SPEECH 389 0x2000 //TX_SN_NPB_GAIN 390 0x0000 //TX_NN_NPB_GAIN -391 0x0000 //TX_CSX_ALPHA_0 -392 0x0000 //TX_CSX_ALPHA_1 -393 0x0000 //TX_CSX_ALPHA_2 -394 0x0000 //TX_CSX_ALPHA_3 -395 0x0800 //TX_MU_ARSP_EST -396 0x00C8 //TX_P_OUTBEAM_MIN_TH +391 0x3000 //TX_POST_MASK_SUP_HSNE +392 0x07D0 //TX_TAIL_DET_TH +393 0x4000 //TX_B_LESSCUT_RTO_WTA +394 0x0000 //TX_MEL_G_R +395 0x0080 //TX_SUPHIGH_TH +396 0x4000 //TX_MASK_G_R 397 0x0002 //TX_EXTRA_NS_L -398 0x0800 //TX_EXTRA_NS_A -399 0x0005 //TX_VR_NOISE_FLOOR_TH +398 0x1800 //TX_C_POST_FLT_MASK +399 0x7FFF //TX_A_POST_FLT_WNS 400 0x0148 //TX_MIN_G_LOW300HZ 401 0x0004 //TX_MAXLEVEL_CNG 402 0x00B4 //TX_STN_NOISE_TH @@ -28569,16 +43242,16 @@ 511 0x6666 //TX_MIC_TO_BFGAIN 512 0x0000 //TX_MICTOBFGAIN0 513 0x0000 //TX_FASTMUE_TH -514 0x0000 //TX_DERVB_LEN_0 -515 0x0000 //TX_DERVB_LEN_1 -516 0x0000 //TX_RHO_DERVB -517 0x0000 //TX_MIC_INDX_DERVB -518 0x0000 //TX_MU_DERVB -519 0x0000 //TX_DR_RESRV_0 -520 0x0000 //TX_DR_RESRV_1 -521 0x0000 //TX_DR_RESRV_2 -522 0x0000 //TX_DR_RESRV_3 -523 0x0000 //TX_DR_RESRV_4 +514 0x3000 //TX_DEREVERB_LF_MU +515 0x34CD //TX_DEREVERB_HF_MU +516 0x0007 //TX_DEREVERB_DELAY +517 0x0004 //TX_DEREVERB_COEF_LEN +518 0x0003 //TX_DEREVERB_DNR +519 0x0000 //TX_DEREVERB_ALPHA +520 0x0000 //TX_DEREVERB_BETA +521 0x0000 //TX_GSC_RTOL_TH +522 0x0000 //TX_GSC_RTOH_TH +523 0x7E2C //TX_WIDE2_MEANHTH 524 0x0000 //TX_DR_RESRV_5 525 0x0000 //TX_DR_RESRV_6 526 0x0000 //TX_DR_RESRV_7 @@ -28625,15 +43298,15 @@ 567 0x5C54 //TX_FDEQ_GAIN_0 568 0x5048 //TX_FDEQ_GAIN_1 569 0x4C4C //TX_FDEQ_GAIN_2 -570 0x4A4A //TX_FDEQ_GAIN_3 -571 0x4744 //TX_FDEQ_GAIN_4 -572 0x4241 //TX_FDEQ_GAIN_5 -573 0x3F3E //TX_FDEQ_GAIN_6 -574 0x4145 //TX_FDEQ_GAIN_7 +570 0x474A //TX_FDEQ_GAIN_3 +571 0x473F //TX_FDEQ_GAIN_4 +572 0x4245 //TX_FDEQ_GAIN_5 +573 0x4B53 //TX_FDEQ_GAIN_6 +574 0x564A //TX_FDEQ_GAIN_7 575 0x3D3A //TX_FDEQ_GAIN_8 576 0x3B3C //TX_FDEQ_GAIN_9 -577 0x3A35 //TX_FDEQ_GAIN_10 -578 0x3535 //TX_FDEQ_GAIN_11 +577 0x3C36 //TX_FDEQ_GAIN_10 +578 0x3636 //TX_FDEQ_GAIN_11 579 0x3D3E //TX_FDEQ_GAIN_12 580 0x4548 //TX_FDEQ_GAIN_13 581 0x4848 //TX_FDEQ_GAIN_14 @@ -28727,14 +43400,14 @@ 669 0x4848 //TX_PREEQ_GAIN_MIC1_3 670 0x4848 //TX_PREEQ_GAIN_MIC1_4 671 0x4848 //TX_PREEQ_GAIN_MIC1_5 -672 0x4848 //TX_PREEQ_GAIN_MIC1_6 -673 0x484A //TX_PREEQ_GAIN_MIC1_7 -674 0x4C4E //TX_PREEQ_GAIN_MIC1_8 -675 0x5054 //TX_PREEQ_GAIN_MIC1_9 -676 0x5658 //TX_PREEQ_GAIN_MIC1_10 -677 0x5C5C //TX_PREEQ_GAIN_MIC1_11 -678 0x5E64 //TX_PREEQ_GAIN_MIC1_12 -679 0x6464 //TX_PREEQ_GAIN_MIC1_13 +672 0x494A //TX_PREEQ_GAIN_MIC1_6 +673 0x4B4C //TX_PREEQ_GAIN_MIC1_7 +674 0x4D4E //TX_PREEQ_GAIN_MIC1_8 +675 0x5051 //TX_PREEQ_GAIN_MIC1_9 +676 0x5255 //TX_PREEQ_GAIN_MIC1_10 +677 0x585A //TX_PREEQ_GAIN_MIC1_11 +678 0x5C5F //TX_PREEQ_GAIN_MIC1_12 +679 0x636A //TX_PREEQ_GAIN_MIC1_13 680 0x4848 //TX_PREEQ_GAIN_MIC1_14 681 0x4848 //TX_PREEQ_GAIN_MIC1_15 682 0x4848 //TX_PREEQ_GAIN_MIC1_16 @@ -28758,7 +43431,7 @@ 700 0x0F10 //TX_PREEQ_BIN_MIC1_10 701 0x1011 //TX_PREEQ_BIN_MIC1_11 702 0x1104 //TX_PREEQ_BIN_MIC1_12 -703 0x1010 //TX_PREEQ_BIN_MIC1_13 +703 0x101B //TX_PREEQ_BIN_MIC1_13 704 0x0000 //TX_PREEQ_BIN_MIC1_14 705 0x0000 //TX_PREEQ_BIN_MIC1_15 706 0x0000 //TX_PREEQ_BIN_MIC1_16 @@ -28831,7 +43504,7 @@ 773 0x0000 //TX_GAIN_LIMIT_0 774 0x0000 //TX_GAIN_LIMIT_1 775 0x0006 //TX_GAIN_LIMIT_2 -776 0x0006 //TX_GAIN_LIMIT_3 +776 0x0007 //TX_GAIN_LIMIT_3 777 0x7F5B //TX_BVE_NOVAD0_ALPHADOWN 778 0x7FDE //TX_BVE_VAD0_ALPHAUP 779 0x7F3A //TX_BVE_VAD0_ALPHADOWN @@ -28952,6 +43625,71 @@ 894 0xC000 //TX_FASTNS_SSA_THHFL 895 0xCCCC //TX_FASTNS_SSA_THLFH 896 0xD999 //TX_FASTNS_SSA_THHFH +897 0x2339 //TX_SENDFUNC_REG_MICMUTE +898 0x0021 //TX_SENDFUNC_REG_MICMUTE1 +899 0x02BC //TX_MICMUTE_RATIO_THR +900 0x0140 //TX_MICMUTE_AMP_THR +901 0x0004 //TX_MICMUTE_HPF_IND +902 0x00C0 //TX_MICMUTE_LOG_EYR_TH +903 0x0008 //TX_MICMUTE_CVG_TIME +904 0x0008 //TX_MICMUTE_RELEASE_TIME +905 0x01FE //TX_MIC_VOLUME_MIC0MUTE +906 0x0020 //TX_MICMUTE_EPD_OFFSET_0 +907 0x001E //TX_MICMUTE_FRQ_AEC_L +908 0x7999 //TX_MICMUTE_EAD_THR +909 0x7FFF //TX_MICMUTE_LAMBDA_CB_NLE +910 0x7FFF //TX_MICMUTE_LAMBDA_RE_EST +911 0x4000 //TX_DTD_THR1_MICMUTE_0 +912 0x7000 //TX_DTD_THR1_MICMUTE_1 +913 0x7FFF //TX_DTD_THR1_MICMUTE_2 +914 0x7FFF //TX_DTD_THR1_MICMUTE_3 +915 0x6CCC //TX_DTD_THR2_MICMUTE_0 +916 0x0400 //TX_MICMUTE_MIN_EQ_RE_EST_0 +917 0x0400 //TX_MICMUTE_MIN_EQ_RE_EST_1 +918 0x1000 //TX_MICMUTE_MIN_EQ_RE_EST_2 +919 0x7FFF //TX_MICMUTE_MIN_EQ_RE_EST_3 +920 0x7FFF //TX_MICMUTE_MIN_EQ_RE_EST_4 +921 0x4000 //TX_MICMUTE_C_POST_FLT +922 0x03E8 //TX_MICMUTE_DT_CUT_K +923 0x0001 //TX_MICMUTE_DT_CUT_THR +924 0x03E8 //TX_MICMUTE_DT_CUT_K2 +925 0x0001 //TX_MICMUTE_DT_CUT_THR2 +926 0x0064 //TX_MICMUTE_DT2_HOLD_N +927 0x1000 //TX_MICMUTE_RATIODTH_THCUT +928 0x1000 //TX_MICMUTE_B_POST_FLT_ECHOL +929 0x7FFF //TX_MICMUTE_B_POST_FLT_ECHOH +930 0x0400 //TX_MICMUTE_C_POST_FLT_MASK +931 0x7999 //TX_MICMUTE_RATIODTL_CUT_TH +932 0x0258 //TX_MICMUTE_DT_CUT_K1 +933 0x0800 //TX_MICMUTE_N2_SN_EST +934 0xFC00 //TX_MICMUTE_THR_SN_EST_0 +935 0x001C //TX_MICMUTE_MIN_G_CTRL_0 +936 0x6000 //TX_MICMUTE_A_POST_FILT_S_0 +937 0x7000 //TX_MICMUTE_B_POST_FILT_0 +938 0x2710 //TX_MIC1RUB_AMP_THR +939 0x0010 //TX_MIC1MUTE_RATIO_THR +940 0x0450 //TX_MIC1MUTE_AMP_THR +941 0x0008 //TX_MIC1MUTE_CVG_TIME +942 0x0008 //TX_MIC1MUTE_RELEASE_TIME +943 0x0000 //TX_AMS_RESRV_01 +944 0x0000 //TX_AMS_RESRV_02 +945 0x0000 //TX_AMS_RESRV_03 +946 0x0000 //TX_AMS_RESRV_04 +947 0x0000 //TX_AMS_RESRV_05 +948 0x0000 //TX_AMS_RESRV_06 +949 0x0000 //TX_AMS_RESRV_07 +950 0x0000 //TX_AMS_RESRV_08 +951 0x0000 //TX_AMS_RESRV_09 +952 0x0000 //TX_AMS_RESRV_10 +953 0x0000 //TX_AMS_RESRV_11 +954 0x0000 //TX_AMS_RESRV_12 +955 0x0000 //TX_AMS_RESRV_13 +956 0x0000 //TX_AMS_RESRV_14 +957 0x0000 //TX_AMS_RESRV_15 +958 0x0000 //TX_AMS_RESRV_16 +959 0x0000 //TX_AMS_RESRV_17 +960 0x0000 //TX_AMS_RESRV_18 +961 0x0000 //TX_AMS_RESRV_19 #RX 0 0x000C //RX_RECVFUNC_MODE_0 1 0x0000 //RX_RECVFUNC_MODE_1 @@ -29803,14 +44541,866 @@ 110 0x0000 //RX_FDDRC_RESRV_0 129 0x0100 //RX_SPK_VOL 130 0x0000 //RX_VOL_RESRV_0 +#RX 2 +157 0x000C //RX_RECVFUNC_MODE_0 +158 0x0000 //RX_RECVFUNC_MODE_1 +159 0x0001 //RX_SAMPLINGFREQ_SIG +160 0x0001 //RX_SAMPLINGFREQ_PROC +161 0x000A //RX_FRAME_SZ +162 0x0000 //RX_DELAY_OPT +163 0x1000 //RX_TDDRC_ALPHA_UP_1 +164 0x1000 //RX_TDDRC_ALPHA_UP_2 +165 0x1000 //RX_TDDRC_ALPHA_UP_3 +166 0x1000 //RX_TDDRC_ALPHA_UP_4 +167 0x0800 //RX_PGA +168 0x7FFF //RX_A_HP +169 0x4000 //RX_B_PE +170 0x7800 //RX_THR_PITCH_DET_0 +171 0x7000 //RX_THR_PITCH_DET_1 +172 0x6000 //RX_THR_PITCH_DET_2 +173 0x0008 //RX_PITCH_BFR_LEN +174 0x0003 //RX_SBD_PITCH_DET +175 0x0100 //RX_PP_RESRV_0 +176 0x0020 //RX_PP_RESRV_1 +177 0x0400 //RX_N_SN_EST +178 0x000C //RX_N2_SN_EST +179 0x0014 //RX_NS_LVL_CTRL +180 0xF800 //RX_THR_SN_EST +181 0x7E00 //RX_LAMBDA_PFILT +182 0x000A //RX_FENS_RESRV_0 +183 0x0190 //RX_FENS_RESRV_1 +184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +187 0x0002 //RX_EXTRA_NS_L +188 0x0800 //RX_EXTRA_NS_A +189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +190 0x7000 //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +192 0x199A //RX_A_POST_FLT +193 0x0000 //RX_LMT_THRD +194 0x4000 //RX_LMT_ALPHA +195 0x0030 //RX_FDEQ_SUBNUM +196 0x4848 //RX_FDEQ_GAIN_0 +197 0x4848 //RX_FDEQ_GAIN_1 +198 0x4844 //RX_FDEQ_GAIN_2 +199 0x4A4C //RX_FDEQ_GAIN_3 +200 0x4E50 //RX_FDEQ_GAIN_4 +201 0x5254 //RX_FDEQ_GAIN_5 +202 0x5658 //RX_FDEQ_GAIN_6 +203 0x5A5C //RX_FDEQ_GAIN_7 +204 0x5C5C //RX_FDEQ_GAIN_8 +205 0x5C5C //RX_FDEQ_GAIN_9 +206 0x5C5C //RX_FDEQ_GAIN_10 +207 0x5C5C //RX_FDEQ_GAIN_11 +208 0x5C5C //RX_FDEQ_GAIN_12 +209 0x5C5C //RX_FDEQ_GAIN_13 +210 0x4848 //RX_FDEQ_GAIN_14 +211 0x4848 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0202 //RX_FDEQ_BIN_0 +221 0x0203 //RX_FDEQ_BIN_1 +222 0x0402 //RX_FDEQ_BIN_2 +223 0x0505 //RX_FDEQ_BIN_3 +224 0x0505 //RX_FDEQ_BIN_4 +225 0x0505 //RX_FDEQ_BIN_5 +226 0x0505 //RX_FDEQ_BIN_6 +227 0x0505 //RX_FDEQ_BIN_7 +228 0x160C //RX_FDEQ_BIN_8 +229 0x0D0E //RX_FDEQ_BIN_9 +230 0x0E0F //RX_FDEQ_BIN_10 +231 0x0F10 //RX_FDEQ_BIN_11 +232 0x1011 //RX_FDEQ_BIN_12 +233 0x1104 //RX_FDEQ_BIN_13 +234 0x0000 //RX_FDEQ_BIN_14 +235 0x0000 //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x4000 //RX_FDEQ_RESRV_0 +245 0x0320 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0030 //RX_FDDRC_BAND_MARGIN_1 +248 0x0050 //RX_FDDRC_BAND_MARGIN_2 +249 0x0080 //RX_FDDRC_BAND_MARGIN_3 +250 0x0007 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x5000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x6400 //RX_FDDRC_THRD_3_2 +258 0x6400 //RX_FDDRC_THRD_3_3 +259 0x2000 //RX_FDDRC_SLANT_0_0 +260 0x2000 //RX_FDDRC_SLANT_0_1 +261 0x2000 //RX_FDDRC_SLANT_0_2 +262 0x2000 //RX_FDDRC_SLANT_0_3 +263 0x5333 //RX_FDDRC_SLANT_1_0 +264 0x5333 //RX_FDDRC_SLANT_1_1 +265 0x5333 //RX_FDDRC_SLANT_1_2 +266 0x5333 //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +268 0x0002 //RX_FILTINDX +269 0x0000 //RX_TDDRC_THRD_0 +270 0x0000 //RX_TDDRC_THRD_1 +271 0x1800 //RX_TDDRC_THRD_2 +272 0x1800 //RX_TDDRC_THRD_3 +273 0x3000 //RX_TDDRC_SLANT_0 +274 0x6E00 //RX_TDDRC_SLANT_1 +275 0x1000 //RX_TDDRC_ALPHA_UP_0 +276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x199A //RX_TDDRC_HMNC_GAIN +279 0x0001 //RX_TDDRC_SMT_FLAG +280 0x0CCD //RX_TDDRC_SMT_W +281 0x0400 //RX_TDDRC_DRC_GAIN +282 0x7C00 //RX_LAMBDA_PKA_FP +283 0x2000 //RX_TPKA_FP +284 0x2000 //RX_MIN_G_FP +285 0x0080 //RX_MAX_G_FP +286 0x0100 //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 +288 0x0000 //RX_MAXLEVEL_CNG +289 0x3000 //RX_BWE_UV_TH +290 0x3000 //RX_BWE_UV_TH2 +291 0x1800 //RX_BWE_UV_TH3 +292 0x1000 //RX_BWE_V_TH +293 0x04CD //RX_BWE_GAIN1_V_TH1 +294 0x0F33 //RX_BWE_GAIN1_V_TH2 +295 0x7333 //RX_BWE_UV_EQ +296 0x199A //RX_BWE_V_EQ +297 0x7333 //RX_BWE_TONE_TH +298 0x0004 //RX_BWE_UV_HOLD_T +299 0x6CCD //RX_BWE_GAIN2_ALPHA +300 0x799A //RX_BWE_GAIN3_ALPHA +301 0x001E //RX_BWE_CUTOFF +302 0x3000 //RX_BWE_GAINFILL +303 0x3200 //RX_BWE_MAXTH_TONE +304 0x2000 //RX_BWE_EQ_0 +305 0x2000 //RX_BWE_EQ_1 +306 0x2000 //RX_BWE_EQ_2 +307 0x2000 //RX_BWE_EQ_3 +308 0x2000 //RX_BWE_EQ_4 +309 0x2000 //RX_BWE_EQ_5 +310 0x2000 //RX_BWE_EQ_6 +311 0x0000 //RX_BWE_RESRV_0 +312 0x0000 //RX_BWE_RESRV_1 +313 0x0000 //RX_BWE_RESRV_2 +#VOL 0 +163 0x1000 //RX_TDDRC_ALPHA_UP_1 +164 0x1000 //RX_TDDRC_ALPHA_UP_2 +165 0x1000 //RX_TDDRC_ALPHA_UP_3 +166 0x1000 //RX_TDDRC_ALPHA_UP_4 +184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +190 0x7000 //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +269 0x0000 //RX_TDDRC_THRD_0 +270 0x0000 //RX_TDDRC_THRD_1 +271 0x1800 //RX_TDDRC_THRD_2 +272 0x1800 //RX_TDDRC_THRD_3 +273 0x3000 //RX_TDDRC_SLANT_0 +274 0x6E00 //RX_TDDRC_SLANT_1 +275 0x1000 //RX_TDDRC_ALPHA_UP_0 +276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x199A //RX_TDDRC_HMNC_GAIN +279 0x0001 //RX_TDDRC_SMT_FLAG +280 0x0CCD //RX_TDDRC_SMT_W +281 0x0400 //RX_TDDRC_DRC_GAIN +195 0x0030 //RX_FDEQ_SUBNUM +196 0x4848 //RX_FDEQ_GAIN_0 +197 0x4848 //RX_FDEQ_GAIN_1 +198 0x4844 //RX_FDEQ_GAIN_2 +199 0x4A4C //RX_FDEQ_GAIN_3 +200 0x4E50 //RX_FDEQ_GAIN_4 +201 0x5254 //RX_FDEQ_GAIN_5 +202 0x5658 //RX_FDEQ_GAIN_6 +203 0x5A5C //RX_FDEQ_GAIN_7 +204 0x5C5C //RX_FDEQ_GAIN_8 +205 0x5C5C //RX_FDEQ_GAIN_9 +206 0x5C5C //RX_FDEQ_GAIN_10 +207 0x5C5C //RX_FDEQ_GAIN_11 +208 0x5C5C //RX_FDEQ_GAIN_12 +209 0x5C5C //RX_FDEQ_GAIN_13 +210 0x4848 //RX_FDEQ_GAIN_14 +211 0x4848 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0202 //RX_FDEQ_BIN_0 +221 0x0203 //RX_FDEQ_BIN_1 +222 0x0402 //RX_FDEQ_BIN_2 +223 0x0505 //RX_FDEQ_BIN_3 +224 0x0505 //RX_FDEQ_BIN_4 +225 0x0505 //RX_FDEQ_BIN_5 +226 0x0505 //RX_FDEQ_BIN_6 +227 0x0505 //RX_FDEQ_BIN_7 +228 0x160C //RX_FDEQ_BIN_8 +229 0x0D0E //RX_FDEQ_BIN_9 +230 0x0E0F //RX_FDEQ_BIN_10 +231 0x0F10 //RX_FDEQ_BIN_11 +232 0x1011 //RX_FDEQ_BIN_12 +233 0x1104 //RX_FDEQ_BIN_13 +234 0x0000 //RX_FDEQ_BIN_14 +235 0x0000 //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x4000 //RX_FDEQ_RESRV_0 +245 0x0320 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0030 //RX_FDDRC_BAND_MARGIN_1 +248 0x0050 //RX_FDDRC_BAND_MARGIN_2 +249 0x0080 //RX_FDDRC_BAND_MARGIN_3 +250 0x0007 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x5000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x6400 //RX_FDDRC_THRD_3_2 +258 0x6400 //RX_FDDRC_THRD_3_3 +259 0x2000 //RX_FDDRC_SLANT_0_0 +260 0x2000 //RX_FDDRC_SLANT_0_1 +261 0x2000 //RX_FDDRC_SLANT_0_2 +262 0x2000 //RX_FDDRC_SLANT_0_3 +263 0x5333 //RX_FDDRC_SLANT_1_0 +264 0x5333 //RX_FDDRC_SLANT_1_1 +265 0x5333 //RX_FDDRC_SLANT_1_2 +266 0x5333 //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +286 0x0100 //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 +#VOL 1 +163 0x1000 //RX_TDDRC_ALPHA_UP_1 +164 0x1000 //RX_TDDRC_ALPHA_UP_2 +165 0x1000 //RX_TDDRC_ALPHA_UP_3 +166 0x1000 //RX_TDDRC_ALPHA_UP_4 +184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +190 0x7000 //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +269 0x0000 //RX_TDDRC_THRD_0 +270 0x0000 //RX_TDDRC_THRD_1 +271 0x1800 //RX_TDDRC_THRD_2 +272 0x1800 //RX_TDDRC_THRD_3 +273 0x3000 //RX_TDDRC_SLANT_0 +274 0x6E00 //RX_TDDRC_SLANT_1 +275 0x1000 //RX_TDDRC_ALPHA_UP_0 +276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x199A //RX_TDDRC_HMNC_GAIN +279 0x0001 //RX_TDDRC_SMT_FLAG +280 0x0CCD //RX_TDDRC_SMT_W +281 0x0400 //RX_TDDRC_DRC_GAIN +195 0x0030 //RX_FDEQ_SUBNUM +196 0x4848 //RX_FDEQ_GAIN_0 +197 0x4848 //RX_FDEQ_GAIN_1 +198 0x4844 //RX_FDEQ_GAIN_2 +199 0x4A4C //RX_FDEQ_GAIN_3 +200 0x4E50 //RX_FDEQ_GAIN_4 +201 0x5254 //RX_FDEQ_GAIN_5 +202 0x5658 //RX_FDEQ_GAIN_6 +203 0x5A5C //RX_FDEQ_GAIN_7 +204 0x5C5C //RX_FDEQ_GAIN_8 +205 0x5C5C //RX_FDEQ_GAIN_9 +206 0x5C5C //RX_FDEQ_GAIN_10 +207 0x5C5C //RX_FDEQ_GAIN_11 +208 0x5C5C //RX_FDEQ_GAIN_12 +209 0x5C5C //RX_FDEQ_GAIN_13 +210 0x4848 //RX_FDEQ_GAIN_14 +211 0x4848 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0202 //RX_FDEQ_BIN_0 +221 0x0203 //RX_FDEQ_BIN_1 +222 0x0402 //RX_FDEQ_BIN_2 +223 0x0505 //RX_FDEQ_BIN_3 +224 0x0505 //RX_FDEQ_BIN_4 +225 0x0505 //RX_FDEQ_BIN_5 +226 0x0505 //RX_FDEQ_BIN_6 +227 0x0505 //RX_FDEQ_BIN_7 +228 0x160C //RX_FDEQ_BIN_8 +229 0x0D0E //RX_FDEQ_BIN_9 +230 0x0E0F //RX_FDEQ_BIN_10 +231 0x0F10 //RX_FDEQ_BIN_11 +232 0x1011 //RX_FDEQ_BIN_12 +233 0x1104 //RX_FDEQ_BIN_13 +234 0x0000 //RX_FDEQ_BIN_14 +235 0x0000 //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x4000 //RX_FDEQ_RESRV_0 +245 0x0320 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0030 //RX_FDDRC_BAND_MARGIN_1 +248 0x0050 //RX_FDDRC_BAND_MARGIN_2 +249 0x0080 //RX_FDDRC_BAND_MARGIN_3 +250 0x0007 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x5000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x6400 //RX_FDDRC_THRD_3_2 +258 0x6400 //RX_FDDRC_THRD_3_3 +259 0x2000 //RX_FDDRC_SLANT_0_0 +260 0x2000 //RX_FDDRC_SLANT_0_1 +261 0x2000 //RX_FDDRC_SLANT_0_2 +262 0x2000 //RX_FDDRC_SLANT_0_3 +263 0x5333 //RX_FDDRC_SLANT_1_0 +264 0x5333 //RX_FDDRC_SLANT_1_1 +265 0x5333 //RX_FDDRC_SLANT_1_2 +266 0x5333 //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +286 0x0100 //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 +#VOL 2 +163 0x1000 //RX_TDDRC_ALPHA_UP_1 +164 0x1000 //RX_TDDRC_ALPHA_UP_2 +165 0x1000 //RX_TDDRC_ALPHA_UP_3 +166 0x1000 //RX_TDDRC_ALPHA_UP_4 +184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +190 0x7000 //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +269 0x0000 //RX_TDDRC_THRD_0 +270 0x0000 //RX_TDDRC_THRD_1 +271 0x1800 //RX_TDDRC_THRD_2 +272 0x1800 //RX_TDDRC_THRD_3 +273 0x3000 //RX_TDDRC_SLANT_0 +274 0x6E00 //RX_TDDRC_SLANT_1 +275 0x1000 //RX_TDDRC_ALPHA_UP_0 +276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x199A //RX_TDDRC_HMNC_GAIN +279 0x0001 //RX_TDDRC_SMT_FLAG +280 0x0CCD //RX_TDDRC_SMT_W +281 0x0400 //RX_TDDRC_DRC_GAIN +195 0x0030 //RX_FDEQ_SUBNUM +196 0x4848 //RX_FDEQ_GAIN_0 +197 0x4848 //RX_FDEQ_GAIN_1 +198 0x4844 //RX_FDEQ_GAIN_2 +199 0x4A4C //RX_FDEQ_GAIN_3 +200 0x4E50 //RX_FDEQ_GAIN_4 +201 0x5254 //RX_FDEQ_GAIN_5 +202 0x5658 //RX_FDEQ_GAIN_6 +203 0x5A5C //RX_FDEQ_GAIN_7 +204 0x5C5C //RX_FDEQ_GAIN_8 +205 0x5C5C //RX_FDEQ_GAIN_9 +206 0x5C5C //RX_FDEQ_GAIN_10 +207 0x5C5C //RX_FDEQ_GAIN_11 +208 0x5C5C //RX_FDEQ_GAIN_12 +209 0x5C5C //RX_FDEQ_GAIN_13 +210 0x4848 //RX_FDEQ_GAIN_14 +211 0x4848 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0202 //RX_FDEQ_BIN_0 +221 0x0203 //RX_FDEQ_BIN_1 +222 0x0402 //RX_FDEQ_BIN_2 +223 0x0505 //RX_FDEQ_BIN_3 +224 0x0505 //RX_FDEQ_BIN_4 +225 0x0505 //RX_FDEQ_BIN_5 +226 0x0505 //RX_FDEQ_BIN_6 +227 0x0505 //RX_FDEQ_BIN_7 +228 0x160C //RX_FDEQ_BIN_8 +229 0x0D0E //RX_FDEQ_BIN_9 +230 0x0E0F //RX_FDEQ_BIN_10 +231 0x0F10 //RX_FDEQ_BIN_11 +232 0x1011 //RX_FDEQ_BIN_12 +233 0x1104 //RX_FDEQ_BIN_13 +234 0x0000 //RX_FDEQ_BIN_14 +235 0x0000 //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x4000 //RX_FDEQ_RESRV_0 +245 0x0320 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0030 //RX_FDDRC_BAND_MARGIN_1 +248 0x0050 //RX_FDDRC_BAND_MARGIN_2 +249 0x0080 //RX_FDDRC_BAND_MARGIN_3 +250 0x0007 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x5000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x6400 //RX_FDDRC_THRD_3_2 +258 0x6400 //RX_FDDRC_THRD_3_3 +259 0x2000 //RX_FDDRC_SLANT_0_0 +260 0x2000 //RX_FDDRC_SLANT_0_1 +261 0x2000 //RX_FDDRC_SLANT_0_2 +262 0x2000 //RX_FDDRC_SLANT_0_3 +263 0x5333 //RX_FDDRC_SLANT_1_0 +264 0x5333 //RX_FDDRC_SLANT_1_1 +265 0x5333 //RX_FDDRC_SLANT_1_2 +266 0x5333 //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +286 0x0100 //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 +#VOL 3 +163 0x1000 //RX_TDDRC_ALPHA_UP_1 +164 0x1000 //RX_TDDRC_ALPHA_UP_2 +165 0x1000 //RX_TDDRC_ALPHA_UP_3 +166 0x1000 //RX_TDDRC_ALPHA_UP_4 +184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +190 0x7000 //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +269 0x0000 //RX_TDDRC_THRD_0 +270 0x0000 //RX_TDDRC_THRD_1 +271 0x1800 //RX_TDDRC_THRD_2 +272 0x1800 //RX_TDDRC_THRD_3 +273 0x3000 //RX_TDDRC_SLANT_0 +274 0x6E00 //RX_TDDRC_SLANT_1 +275 0x1000 //RX_TDDRC_ALPHA_UP_0 +276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x199A //RX_TDDRC_HMNC_GAIN +279 0x0001 //RX_TDDRC_SMT_FLAG +280 0x0CCD //RX_TDDRC_SMT_W +281 0x0400 //RX_TDDRC_DRC_GAIN +195 0x0030 //RX_FDEQ_SUBNUM +196 0x4848 //RX_FDEQ_GAIN_0 +197 0x4848 //RX_FDEQ_GAIN_1 +198 0x4844 //RX_FDEQ_GAIN_2 +199 0x4A4C //RX_FDEQ_GAIN_3 +200 0x4E50 //RX_FDEQ_GAIN_4 +201 0x5254 //RX_FDEQ_GAIN_5 +202 0x5658 //RX_FDEQ_GAIN_6 +203 0x5A5C //RX_FDEQ_GAIN_7 +204 0x5C5C //RX_FDEQ_GAIN_8 +205 0x5C5C //RX_FDEQ_GAIN_9 +206 0x5C5C //RX_FDEQ_GAIN_10 +207 0x5C5C //RX_FDEQ_GAIN_11 +208 0x5C5C //RX_FDEQ_GAIN_12 +209 0x5C5C //RX_FDEQ_GAIN_13 +210 0x4848 //RX_FDEQ_GAIN_14 +211 0x4848 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0202 //RX_FDEQ_BIN_0 +221 0x0203 //RX_FDEQ_BIN_1 +222 0x0402 //RX_FDEQ_BIN_2 +223 0x0505 //RX_FDEQ_BIN_3 +224 0x0505 //RX_FDEQ_BIN_4 +225 0x0505 //RX_FDEQ_BIN_5 +226 0x0505 //RX_FDEQ_BIN_6 +227 0x0505 //RX_FDEQ_BIN_7 +228 0x160C //RX_FDEQ_BIN_8 +229 0x0D0E //RX_FDEQ_BIN_9 +230 0x0E0F //RX_FDEQ_BIN_10 +231 0x0F10 //RX_FDEQ_BIN_11 +232 0x1011 //RX_FDEQ_BIN_12 +233 0x1104 //RX_FDEQ_BIN_13 +234 0x0000 //RX_FDEQ_BIN_14 +235 0x0000 //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x4000 //RX_FDEQ_RESRV_0 +245 0x0320 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0030 //RX_FDDRC_BAND_MARGIN_1 +248 0x0050 //RX_FDDRC_BAND_MARGIN_2 +249 0x0080 //RX_FDDRC_BAND_MARGIN_3 +250 0x0007 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x5000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x6400 //RX_FDDRC_THRD_3_2 +258 0x6400 //RX_FDDRC_THRD_3_3 +259 0x2000 //RX_FDDRC_SLANT_0_0 +260 0x2000 //RX_FDDRC_SLANT_0_1 +261 0x2000 //RX_FDDRC_SLANT_0_2 +262 0x2000 //RX_FDDRC_SLANT_0_3 +263 0x5333 //RX_FDDRC_SLANT_1_0 +264 0x5333 //RX_FDDRC_SLANT_1_1 +265 0x5333 //RX_FDDRC_SLANT_1_2 +266 0x5333 //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +286 0x0100 //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 +#VOL 4 +163 0x1000 //RX_TDDRC_ALPHA_UP_1 +164 0x1000 //RX_TDDRC_ALPHA_UP_2 +165 0x1000 //RX_TDDRC_ALPHA_UP_3 +166 0x1000 //RX_TDDRC_ALPHA_UP_4 +184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +190 0x7000 //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +269 0x0000 //RX_TDDRC_THRD_0 +270 0x0000 //RX_TDDRC_THRD_1 +271 0x1800 //RX_TDDRC_THRD_2 +272 0x1800 //RX_TDDRC_THRD_3 +273 0x3000 //RX_TDDRC_SLANT_0 +274 0x6E00 //RX_TDDRC_SLANT_1 +275 0x1000 //RX_TDDRC_ALPHA_UP_0 +276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x199A //RX_TDDRC_HMNC_GAIN +279 0x0001 //RX_TDDRC_SMT_FLAG +280 0x0CCD //RX_TDDRC_SMT_W +281 0x0400 //RX_TDDRC_DRC_GAIN +195 0x0030 //RX_FDEQ_SUBNUM +196 0x4848 //RX_FDEQ_GAIN_0 +197 0x4848 //RX_FDEQ_GAIN_1 +198 0x4844 //RX_FDEQ_GAIN_2 +199 0x4A4C //RX_FDEQ_GAIN_3 +200 0x4E50 //RX_FDEQ_GAIN_4 +201 0x5254 //RX_FDEQ_GAIN_5 +202 0x5658 //RX_FDEQ_GAIN_6 +203 0x5A5C //RX_FDEQ_GAIN_7 +204 0x5C5C //RX_FDEQ_GAIN_8 +205 0x5C5C //RX_FDEQ_GAIN_9 +206 0x5C5C //RX_FDEQ_GAIN_10 +207 0x5C5C //RX_FDEQ_GAIN_11 +208 0x5C5C //RX_FDEQ_GAIN_12 +209 0x5C5C //RX_FDEQ_GAIN_13 +210 0x4848 //RX_FDEQ_GAIN_14 +211 0x4848 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0202 //RX_FDEQ_BIN_0 +221 0x0203 //RX_FDEQ_BIN_1 +222 0x0402 //RX_FDEQ_BIN_2 +223 0x0505 //RX_FDEQ_BIN_3 +224 0x0505 //RX_FDEQ_BIN_4 +225 0x0505 //RX_FDEQ_BIN_5 +226 0x0505 //RX_FDEQ_BIN_6 +227 0x0505 //RX_FDEQ_BIN_7 +228 0x160C //RX_FDEQ_BIN_8 +229 0x0D0E //RX_FDEQ_BIN_9 +230 0x0E0F //RX_FDEQ_BIN_10 +231 0x0F10 //RX_FDEQ_BIN_11 +232 0x1011 //RX_FDEQ_BIN_12 +233 0x1104 //RX_FDEQ_BIN_13 +234 0x0000 //RX_FDEQ_BIN_14 +235 0x0000 //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x4000 //RX_FDEQ_RESRV_0 +245 0x0320 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0030 //RX_FDDRC_BAND_MARGIN_1 +248 0x0050 //RX_FDDRC_BAND_MARGIN_2 +249 0x0080 //RX_FDDRC_BAND_MARGIN_3 +250 0x0007 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x5000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x6400 //RX_FDDRC_THRD_3_2 +258 0x6400 //RX_FDDRC_THRD_3_3 +259 0x2000 //RX_FDDRC_SLANT_0_0 +260 0x2000 //RX_FDDRC_SLANT_0_1 +261 0x2000 //RX_FDDRC_SLANT_0_2 +262 0x2000 //RX_FDDRC_SLANT_0_3 +263 0x5333 //RX_FDDRC_SLANT_1_0 +264 0x5333 //RX_FDDRC_SLANT_1_1 +265 0x5333 //RX_FDDRC_SLANT_1_2 +266 0x5333 //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +286 0x0100 //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 +#VOL 5 +163 0x1000 //RX_TDDRC_ALPHA_UP_1 +164 0x1000 //RX_TDDRC_ALPHA_UP_2 +165 0x1000 //RX_TDDRC_ALPHA_UP_3 +166 0x1000 //RX_TDDRC_ALPHA_UP_4 +184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +190 0x7000 //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +269 0x0000 //RX_TDDRC_THRD_0 +270 0x0000 //RX_TDDRC_THRD_1 +271 0x1800 //RX_TDDRC_THRD_2 +272 0x1800 //RX_TDDRC_THRD_3 +273 0x3000 //RX_TDDRC_SLANT_0 +274 0x6E00 //RX_TDDRC_SLANT_1 +275 0x1000 //RX_TDDRC_ALPHA_UP_0 +276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x199A //RX_TDDRC_HMNC_GAIN +279 0x0001 //RX_TDDRC_SMT_FLAG +280 0x0CCD //RX_TDDRC_SMT_W +281 0x0400 //RX_TDDRC_DRC_GAIN +195 0x0030 //RX_FDEQ_SUBNUM +196 0x4848 //RX_FDEQ_GAIN_0 +197 0x4848 //RX_FDEQ_GAIN_1 +198 0x4844 //RX_FDEQ_GAIN_2 +199 0x4A4C //RX_FDEQ_GAIN_3 +200 0x4E50 //RX_FDEQ_GAIN_4 +201 0x5254 //RX_FDEQ_GAIN_5 +202 0x5658 //RX_FDEQ_GAIN_6 +203 0x5A5C //RX_FDEQ_GAIN_7 +204 0x5C5C //RX_FDEQ_GAIN_8 +205 0x5C5C //RX_FDEQ_GAIN_9 +206 0x5C5C //RX_FDEQ_GAIN_10 +207 0x5C5C //RX_FDEQ_GAIN_11 +208 0x5C5C //RX_FDEQ_GAIN_12 +209 0x5C5C //RX_FDEQ_GAIN_13 +210 0x4848 //RX_FDEQ_GAIN_14 +211 0x4848 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0202 //RX_FDEQ_BIN_0 +221 0x0203 //RX_FDEQ_BIN_1 +222 0x0402 //RX_FDEQ_BIN_2 +223 0x0505 //RX_FDEQ_BIN_3 +224 0x0505 //RX_FDEQ_BIN_4 +225 0x0505 //RX_FDEQ_BIN_5 +226 0x0505 //RX_FDEQ_BIN_6 +227 0x0505 //RX_FDEQ_BIN_7 +228 0x160C //RX_FDEQ_BIN_8 +229 0x0D0E //RX_FDEQ_BIN_9 +230 0x0E0F //RX_FDEQ_BIN_10 +231 0x0F10 //RX_FDEQ_BIN_11 +232 0x1011 //RX_FDEQ_BIN_12 +233 0x1104 //RX_FDEQ_BIN_13 +234 0x0000 //RX_FDEQ_BIN_14 +235 0x0000 //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x4000 //RX_FDEQ_RESRV_0 +245 0x0320 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0030 //RX_FDDRC_BAND_MARGIN_1 +248 0x0050 //RX_FDDRC_BAND_MARGIN_2 +249 0x0080 //RX_FDDRC_BAND_MARGIN_3 +250 0x0007 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x5000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x6400 //RX_FDDRC_THRD_3_2 +258 0x6400 //RX_FDDRC_THRD_3_3 +259 0x2000 //RX_FDDRC_SLANT_0_0 +260 0x2000 //RX_FDDRC_SLANT_0_1 +261 0x2000 //RX_FDDRC_SLANT_0_2 +262 0x2000 //RX_FDDRC_SLANT_0_3 +263 0x5333 //RX_FDDRC_SLANT_1_0 +264 0x5333 //RX_FDDRC_SLANT_1_1 +265 0x5333 //RX_FDDRC_SLANT_1_2 +266 0x5333 //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +286 0x0100 //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 +#VOL 6 +163 0x1000 //RX_TDDRC_ALPHA_UP_1 +164 0x1000 //RX_TDDRC_ALPHA_UP_2 +165 0x1000 //RX_TDDRC_ALPHA_UP_3 +166 0x1000 //RX_TDDRC_ALPHA_UP_4 +184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +190 0x7000 //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +269 0x0000 //RX_TDDRC_THRD_0 +270 0x0000 //RX_TDDRC_THRD_1 +271 0x1800 //RX_TDDRC_THRD_2 +272 0x1800 //RX_TDDRC_THRD_3 +273 0x3000 //RX_TDDRC_SLANT_0 +274 0x6E00 //RX_TDDRC_SLANT_1 +275 0x1000 //RX_TDDRC_ALPHA_UP_0 +276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x199A //RX_TDDRC_HMNC_GAIN +279 0x0001 //RX_TDDRC_SMT_FLAG +280 0x0CCD //RX_TDDRC_SMT_W +281 0x0400 //RX_TDDRC_DRC_GAIN +195 0x0030 //RX_FDEQ_SUBNUM +196 0x4848 //RX_FDEQ_GAIN_0 +197 0x4848 //RX_FDEQ_GAIN_1 +198 0x4844 //RX_FDEQ_GAIN_2 +199 0x4A4C //RX_FDEQ_GAIN_3 +200 0x4E50 //RX_FDEQ_GAIN_4 +201 0x5254 //RX_FDEQ_GAIN_5 +202 0x5658 //RX_FDEQ_GAIN_6 +203 0x5A5C //RX_FDEQ_GAIN_7 +204 0x5C5C //RX_FDEQ_GAIN_8 +205 0x5C5C //RX_FDEQ_GAIN_9 +206 0x5C5C //RX_FDEQ_GAIN_10 +207 0x5C5C //RX_FDEQ_GAIN_11 +208 0x5C5C //RX_FDEQ_GAIN_12 +209 0x5C5C //RX_FDEQ_GAIN_13 +210 0x4848 //RX_FDEQ_GAIN_14 +211 0x4848 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0202 //RX_FDEQ_BIN_0 +221 0x0203 //RX_FDEQ_BIN_1 +222 0x0402 //RX_FDEQ_BIN_2 +223 0x0505 //RX_FDEQ_BIN_3 +224 0x0505 //RX_FDEQ_BIN_4 +225 0x0505 //RX_FDEQ_BIN_5 +226 0x0505 //RX_FDEQ_BIN_6 +227 0x0505 //RX_FDEQ_BIN_7 +228 0x160C //RX_FDEQ_BIN_8 +229 0x0D0E //RX_FDEQ_BIN_9 +230 0x0E0F //RX_FDEQ_BIN_10 +231 0x0F10 //RX_FDEQ_BIN_11 +232 0x1011 //RX_FDEQ_BIN_12 +233 0x1104 //RX_FDEQ_BIN_13 +234 0x0000 //RX_FDEQ_BIN_14 +235 0x0000 //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x4000 //RX_FDEQ_RESRV_0 +245 0x0320 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0030 //RX_FDDRC_BAND_MARGIN_1 +248 0x0050 //RX_FDDRC_BAND_MARGIN_2 +249 0x0080 //RX_FDDRC_BAND_MARGIN_3 +250 0x0007 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x5000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x6400 //RX_FDDRC_THRD_3_2 +258 0x6400 //RX_FDDRC_THRD_3_3 +259 0x2000 //RX_FDDRC_SLANT_0_0 +260 0x2000 //RX_FDDRC_SLANT_0_1 +261 0x2000 //RX_FDDRC_SLANT_0_2 +262 0x2000 //RX_FDDRC_SLANT_0_3 +263 0x5333 //RX_FDDRC_SLANT_1_0 +264 0x5333 //RX_FDDRC_SLANT_1_1 +265 0x5333 //RX_FDDRC_SLANT_1_2 +266 0x5333 //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +286 0x0100 //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 #CASE_NAME HANDSET-HANDSET_HAC-TMOBILE_US-SWB -#PARAM_TYPE TX+RX -#TOTAL_CUSTOM_STEP 7 +#PARAM_MODE Full +#PARAM_TYPE TX+2RX +#TOTAL_CUSTOM_STEP 7+7 #TX 0 0x0000 //TX_OPERATION_MODE_0 1 0x0000 //TX_OPERATION_MODE_1 -2 0x0026 //TX_PATCH_REG +2 0x0076 //TX_PATCH_REG 3 0x6F7E //TX_SENDFUNC_MODE_0 4 0x0001 //TX_SENDFUNC_MODE_1 5 0x0002 //TX_NUM_MIC @@ -29829,7 +45419,7 @@ 18 0x0000 //TX_SYS_RESRV_2 19 0x0000 //TX_SYS_RESRV_3 20 0x0000 //TX_DIST2REF0 -21 0x00A4 //TX_DIST2REF1 +21 0x00A3 //TX_DIST2REF1 22 0x0000 //TX_DIST2REF_02 23 0x0000 //TX_DIST2REF_03 24 0x0000 //TX_DIST2REF_04 @@ -30059,12 +45649,12 @@ 248 0xF800 //TX_THR_SN_EST_6 249 0xF700 //TX_THR_SN_EST_7 250 0x0000 //TX_DELTA_THR_SN_EST_0 -251 0x0100 //TX_DELTA_THR_SN_EST_1 +251 0x0200 //TX_DELTA_THR_SN_EST_1 252 0x0200 //TX_DELTA_THR_SN_EST_2 253 0x0200 //TX_DELTA_THR_SN_EST_3 -254 0x0200 //TX_DELTA_THR_SN_EST_4 -255 0x0100 //TX_DELTA_THR_SN_EST_5 -256 0x0200 //TX_DELTA_THR_SN_EST_6 +254 0x0100 //TX_DELTA_THR_SN_EST_4 +255 0x0200 //TX_DELTA_THR_SN_EST_5 +256 0x0100 //TX_DELTA_THR_SN_EST_6 257 0x0200 //TX_DELTA_THR_SN_EST_7 258 0x4000 //TX_LAMBDA_NN_EST_0 259 0x4000 //TX_LAMBDA_NN_EST_1 @@ -30090,18 +45680,18 @@ 279 0x1000 //TX_B_POST_FLT_0 280 0x1000 //TX_B_POST_FLT_1 281 0x0014 //TX_NS_LVL_CTRL_0 -282 0x0016 //TX_NS_LVL_CTRL_1 -283 0x002C //TX_NS_LVL_CTRL_2 -284 0x0016 //TX_NS_LVL_CTRL_3 -285 0x0018 //TX_NS_LVL_CTRL_4 -286 0x0016 //TX_NS_LVL_CTRL_5 -287 0x0012 //TX_NS_LVL_CTRL_6 +282 0x002C //TX_NS_LVL_CTRL_1 +283 0x0016 //TX_NS_LVL_CTRL_2 +284 0x0018 //TX_NS_LVL_CTRL_3 +285 0x0016 //TX_NS_LVL_CTRL_4 +286 0x0012 //TX_NS_LVL_CTRL_5 +287 0x0016 //TX_NS_LVL_CTRL_6 288 0x0017 //TX_NS_LVL_CTRL_7 289 0x000E //TX_MIN_GAIN_S_0 -290 0x0012 //TX_MIN_GAIN_S_1 -291 0x000D //TX_MIN_GAIN_S_2 -292 0x0012 //TX_MIN_GAIN_S_3 -293 0x0010 //TX_MIN_GAIN_S_4 +290 0x000D //TX_MIN_GAIN_S_1 +291 0x0012 //TX_MIN_GAIN_S_2 +292 0x0010 //TX_MIN_GAIN_S_3 +293 0x0012 //TX_MIN_GAIN_S_4 294 0x0012 //TX_MIN_GAIN_S_5 295 0x0012 //TX_MIN_GAIN_S_6 296 0x0012 //TX_MIN_GAIN_S_7 @@ -30123,29 +45713,29 @@ 312 0x7FFF //TX_A_POST_FILT_0 313 0x2000 //TX_A_POST_FILT_1 314 0x4000 //TX_A_POST_FILT_S_0 -315 0x5000 //TX_A_POST_FILT_S_1 +315 0x4000 //TX_A_POST_FILT_S_1 316 0x4000 //TX_A_POST_FILT_S_2 317 0x4000 //TX_A_POST_FILT_S_3 318 0x4000 //TX_A_POST_FILT_S_4 319 0x4000 //TX_A_POST_FILT_S_5 -320 0x4000 //TX_A_POST_FILT_S_6 +320 0x5000 //TX_A_POST_FILT_S_6 321 0x7000 //TX_A_POST_FILT_S_7 322 0x1000 //TX_B_POST_FILT_0 323 0x1000 //TX_B_POST_FILT_1 -324 0x3000 //TX_B_POST_FILT_2 -325 0x1000 //TX_B_POST_FILT_3 -326 0x5000 //TX_B_POST_FILT_4 -327 0x2000 //TX_B_POST_FILT_5 -328 0x6000 //TX_B_POST_FILT_6 +324 0x2000 //TX_B_POST_FILT_2 +325 0x2000 //TX_B_POST_FILT_3 +326 0x2000 //TX_B_POST_FILT_4 +327 0x1000 //TX_B_POST_FILT_5 +328 0x3000 //TX_B_POST_FILT_6 329 0x3000 //TX_B_POST_FILT_7 330 0x1000 //TX_B_LESSCUT_RTO_S_0 -331 0x6000 //TX_B_LESSCUT_RTO_S_1 -332 0x6000 //TX_B_LESSCUT_RTO_S_2 -333 0x6000 //TX_B_LESSCUT_RTO_S_3 -334 0x6000 //TX_B_LESSCUT_RTO_S_4 -335 0x6000 //TX_B_LESSCUT_RTO_S_5 -336 0x7FFF //TX_B_LESSCUT_RTO_S_6 -337 0x7FFF //TX_B_LESSCUT_RTO_S_7 +331 0x1000 //TX_B_LESSCUT_RTO_S_1 +332 0x1000 //TX_B_LESSCUT_RTO_S_2 +333 0x1000 //TX_B_LESSCUT_RTO_S_3 +334 0x1000 //TX_B_LESSCUT_RTO_S_4 +335 0x1000 //TX_B_LESSCUT_RTO_S_5 +336 0x1000 //TX_B_LESSCUT_RTO_S_6 +337 0x1000 //TX_B_LESSCUT_RTO_S_7 338 0x7E14 //TX_LAMBDA_PFILT 339 0x7C29 //TX_LAMBDA_PFILT_S_0 340 0x7C29 //TX_LAMBDA_PFILT_S_1 @@ -30188,10 +45778,10 @@ 377 0x4E20 //TX_NOISE_TH_5_4 378 0x1194 //TX_NOISE_TH_6 379 0x0014 //TX_MINENOISE_TH -380 0x4000 //TX_MINENOISE_MIC0_TH_MTS -381 0xFFEE //TX_MINENOISE_MIC0_TH_EXP -382 0x6000 //TX_MINENOISE_MIC0_S_TH_MTS -383 0xFFF3 //TX_MINENOISE_MIC0_S_TH_EXP +380 0xD508 //TX_MORENS_TFMASK_TH +381 0x0001 //TX_DRC_QUIET_FLOOR +382 0x6D60 //TX_RATIODTL_CUT_TH +383 0x0DAC //TX_DT_CUT_K1 384 0x00A5 //TX_OUT_ENER_S_TH_CLEAN 385 0x00A5 //TX_OUT_ENER_S_TH_LESSCLEAN 386 0x00A5 //TX_OUT_ENER_S_TH_NOISY @@ -30199,15 +45789,15 @@ 388 0x0200 //TX_OUT_ENER_TH_SPEECH 389 0x2000 //TX_SN_NPB_GAIN 390 0x0000 //TX_NN_NPB_GAIN -391 0x0000 //TX_CSX_ALPHA_0 -392 0x0000 //TX_CSX_ALPHA_1 -393 0x0000 //TX_CSX_ALPHA_2 -394 0x0000 //TX_CSX_ALPHA_3 -395 0x0800 //TX_MU_ARSP_EST -396 0x00C8 //TX_P_OUTBEAM_MIN_TH +391 0x3000 //TX_POST_MASK_SUP_HSNE +392 0x07D0 //TX_TAIL_DET_TH +393 0x4000 //TX_B_LESSCUT_RTO_WTA +394 0x0000 //TX_MEL_G_R +395 0x0080 //TX_SUPHIGH_TH +396 0x0000 //TX_MASK_G_R 397 0x0002 //TX_EXTRA_NS_L -398 0x0800 //TX_EXTRA_NS_A -399 0x0005 //TX_VR_NOISE_FLOOR_TH +398 0x1800 //TX_C_POST_FLT_MASK +399 0x7FFF //TX_A_POST_FLT_WNS 400 0x0148 //TX_MIN_G_LOW300HZ 401 0x0004 //TX_MAXLEVEL_CNG 402 0x00B4 //TX_STN_NOISE_TH @@ -30322,16 +45912,16 @@ 511 0x6666 //TX_MIC_TO_BFGAIN 512 0x0000 //TX_MICTOBFGAIN0 513 0x0000 //TX_FASTMUE_TH -514 0x0000 //TX_DERVB_LEN_0 -515 0x0000 //TX_DERVB_LEN_1 -516 0x0000 //TX_RHO_DERVB -517 0x0000 //TX_MIC_INDX_DERVB -518 0x0000 //TX_MU_DERVB -519 0x0000 //TX_DR_RESRV_0 -520 0x0000 //TX_DR_RESRV_1 -521 0x0000 //TX_DR_RESRV_2 -522 0x0000 //TX_DR_RESRV_3 -523 0x0000 //TX_DR_RESRV_4 +514 0x2CCC //TX_DEREVERB_LF_MU +515 0x3200 //TX_DEREVERB_HF_MU +516 0x0007 //TX_DEREVERB_DELAY +517 0x0004 //TX_DEREVERB_COEF_LEN +518 0x0003 //TX_DEREVERB_DNR +519 0x0000 //TX_DEREVERB_ALPHA +520 0x0000 //TX_DEREVERB_BETA +521 0x3A98 //TX_GSC_RTOL_TH +522 0x3A98 //TX_GSC_RTOH_TH +523 0x7E2C //TX_WIDE2_MEANHTH 524 0x0000 //TX_DR_RESRV_5 525 0x0000 //TX_DR_RESRV_6 526 0x0000 //TX_DR_RESRV_7 @@ -30375,23 +45965,23 @@ 564 0x0000 //TX_PB_RESRV_0 565 0x0000 //TX_PB_RESRV_1 566 0x0030 //TX_FDEQ_SUBNUM -567 0x5C54 //TX_FDEQ_GAIN_0 +567 0x5C58 //TX_FDEQ_GAIN_0 568 0x5048 //TX_FDEQ_GAIN_1 569 0x4C4C //TX_FDEQ_GAIN_2 570 0x494D //TX_FDEQ_GAIN_3 -571 0x4846 //TX_FDEQ_GAIN_4 -572 0x4644 //TX_FDEQ_GAIN_5 -573 0x4642 //TX_FDEQ_GAIN_6 -574 0x4444 //TX_FDEQ_GAIN_7 -575 0x4245 //TX_FDEQ_GAIN_8 -576 0x464C //TX_FDEQ_GAIN_9 -577 0x443E //TX_FDEQ_GAIN_10 -578 0x4040 //TX_FDEQ_GAIN_11 -579 0x4146 //TX_FDEQ_GAIN_12 -580 0x4244 //TX_FDEQ_GAIN_13 -581 0x4759 //TX_FDEQ_GAIN_14 -582 0x6E6E //TX_FDEQ_GAIN_15 -583 0x4848 //TX_FDEQ_GAIN_16 +571 0x4442 //TX_FDEQ_GAIN_4 +572 0x444C //TX_FDEQ_GAIN_5 +573 0x5053 //TX_FDEQ_GAIN_6 +574 0x6248 //TX_FDEQ_GAIN_7 +575 0x434A //TX_FDEQ_GAIN_8 +576 0x4B4D //TX_FDEQ_GAIN_9 +577 0x4C4B //TX_FDEQ_GAIN_10 +578 0x4E4A //TX_FDEQ_GAIN_11 +579 0x4842 //TX_FDEQ_GAIN_12 +580 0x4C44 //TX_FDEQ_GAIN_13 +581 0x3A4A //TX_FDEQ_GAIN_14 +582 0x6478 //TX_FDEQ_GAIN_15 +583 0x5848 //TX_FDEQ_GAIN_16 584 0x4848 //TX_FDEQ_GAIN_17 585 0x4848 //TX_FDEQ_GAIN_18 586 0x4848 //TX_FDEQ_GAIN_19 @@ -30411,9 +46001,9 @@ 600 0x0F0F //TX_FDEQ_BIN_9 601 0x0E0D //TX_FDEQ_BIN_10 602 0x0F28 //TX_FDEQ_BIN_11 -603 0x111B //TX_FDEQ_BIN_12 -604 0x291E //TX_FDEQ_BIN_13 -605 0x1E10 //TX_FDEQ_BIN_14 +603 0x110F //TX_FDEQ_BIN_12 +604 0x350F //TX_FDEQ_BIN_13 +605 0x1924 //TX_FDEQ_BIN_14 606 0x1810 //TX_FDEQ_BIN_15 607 0x1021 //TX_FDEQ_BIN_16 608 0x1000 //TX_FDEQ_BIN_17 @@ -30480,16 +46070,16 @@ 669 0x4848 //TX_PREEQ_GAIN_MIC1_3 670 0x4848 //TX_PREEQ_GAIN_MIC1_4 671 0x4848 //TX_PREEQ_GAIN_MIC1_5 -672 0x4848 //TX_PREEQ_GAIN_MIC1_6 -673 0x484A //TX_PREEQ_GAIN_MIC1_7 -674 0x4C4E //TX_PREEQ_GAIN_MIC1_8 -675 0x5054 //TX_PREEQ_GAIN_MIC1_9 -676 0x5658 //TX_PREEQ_GAIN_MIC1_10 -677 0x5C5C //TX_PREEQ_GAIN_MIC1_11 -678 0x6474 //TX_PREEQ_GAIN_MIC1_12 -679 0x7870 //TX_PREEQ_GAIN_MIC1_13 +672 0x494A //TX_PREEQ_GAIN_MIC1_6 +673 0x4B4C //TX_PREEQ_GAIN_MIC1_7 +674 0x4D4E //TX_PREEQ_GAIN_MIC1_8 +675 0x4F52 //TX_PREEQ_GAIN_MIC1_9 +676 0x5355 //TX_PREEQ_GAIN_MIC1_10 +677 0x585C //TX_PREEQ_GAIN_MIC1_11 +678 0x616A //TX_PREEQ_GAIN_MIC1_12 +679 0x726E //TX_PREEQ_GAIN_MIC1_13 680 0x5C48 //TX_PREEQ_GAIN_MIC1_14 -681 0x383C //TX_PREEQ_GAIN_MIC1_15 +681 0x3B38 //TX_PREEQ_GAIN_MIC1_15 682 0x4848 //TX_PREEQ_GAIN_MIC1_16 683 0x4848 //TX_PREEQ_GAIN_MIC1_17 684 0x4848 //TX_PREEQ_GAIN_MIC1_18 @@ -30513,7 +46103,7 @@ 702 0x1B1E //TX_PREEQ_BIN_MIC1_12 703 0x1E1E //TX_PREEQ_BIN_MIC1_13 704 0x1E28 //TX_PREEQ_BIN_MIC1_14 -705 0x282C //TX_PREEQ_BIN_MIC1_15 +705 0x3042 //TX_PREEQ_BIN_MIC1_15 706 0x0000 //TX_PREEQ_BIN_MIC1_16 707 0x0000 //TX_PREEQ_BIN_MIC1_17 708 0x0000 //TX_PREEQ_BIN_MIC1_18 @@ -30674,7 +46264,7 @@ 863 0x199A //TX_TDDRC_HMNC_GAIN 864 0x0000 //TX_TDDRC_SMT_FLAG 865 0x0CCD //TX_TDDRC_SMT_W -866 0x060B //TX_TDDRC_DRC_GAIN +866 0x06EC //TX_TDDRC_DRC_GAIN 867 0x7FFF //TX_TDDRC_LMT_THRD 868 0x0000 //TX_TDDRC_LMT_ALPHA 869 0x0000 //TX_TFMASKLTH @@ -30705,6 +46295,71 @@ 894 0xC000 //TX_FASTNS_SSA_THHFL 895 0xCCCC //TX_FASTNS_SSA_THLFH 896 0xD999 //TX_FASTNS_SSA_THHFH +897 0x2339 //TX_SENDFUNC_REG_MICMUTE +898 0x0021 //TX_SENDFUNC_REG_MICMUTE1 +899 0x02BC //TX_MICMUTE_RATIO_THR +900 0x0140 //TX_MICMUTE_AMP_THR +901 0x0004 //TX_MICMUTE_HPF_IND +902 0x00C0 //TX_MICMUTE_LOG_EYR_TH +903 0x0008 //TX_MICMUTE_CVG_TIME +904 0x0008 //TX_MICMUTE_RELEASE_TIME +905 0x01FE //TX_MIC_VOLUME_MIC0MUTE +906 0x0020 //TX_MICMUTE_EPD_OFFSET_0 +907 0x001E //TX_MICMUTE_FRQ_AEC_L +908 0x7999 //TX_MICMUTE_EAD_THR +909 0x7FFF //TX_MICMUTE_LAMBDA_CB_NLE +910 0x7FFF //TX_MICMUTE_LAMBDA_RE_EST +911 0x4000 //TX_DTD_THR1_MICMUTE_0 +912 0x7000 //TX_DTD_THR1_MICMUTE_1 +913 0x7FFF //TX_DTD_THR1_MICMUTE_2 +914 0x7FFF //TX_DTD_THR1_MICMUTE_3 +915 0x6CCC //TX_DTD_THR2_MICMUTE_0 +916 0x0400 //TX_MICMUTE_MIN_EQ_RE_EST_0 +917 0x0400 //TX_MICMUTE_MIN_EQ_RE_EST_1 +918 0x1000 //TX_MICMUTE_MIN_EQ_RE_EST_2 +919 0x7FFF //TX_MICMUTE_MIN_EQ_RE_EST_3 +920 0x7FFF //TX_MICMUTE_MIN_EQ_RE_EST_4 +921 0x4000 //TX_MICMUTE_C_POST_FLT +922 0x03E8 //TX_MICMUTE_DT_CUT_K +923 0x0001 //TX_MICMUTE_DT_CUT_THR +924 0x03E8 //TX_MICMUTE_DT_CUT_K2 +925 0x0001 //TX_MICMUTE_DT_CUT_THR2 +926 0x0064 //TX_MICMUTE_DT2_HOLD_N +927 0x1000 //TX_MICMUTE_RATIODTH_THCUT +928 0x1000 //TX_MICMUTE_B_POST_FLT_ECHOL +929 0x7FFF //TX_MICMUTE_B_POST_FLT_ECHOH +930 0x0400 //TX_MICMUTE_C_POST_FLT_MASK +931 0x7999 //TX_MICMUTE_RATIODTL_CUT_TH +932 0x0258 //TX_MICMUTE_DT_CUT_K1 +933 0x0800 //TX_MICMUTE_N2_SN_EST +934 0xFC00 //TX_MICMUTE_THR_SN_EST_0 +935 0x001C //TX_MICMUTE_MIN_G_CTRL_0 +936 0x6000 //TX_MICMUTE_A_POST_FILT_S_0 +937 0x7000 //TX_MICMUTE_B_POST_FILT_0 +938 0x2710 //TX_MIC1RUB_AMP_THR +939 0x0010 //TX_MIC1MUTE_RATIO_THR +940 0x0450 //TX_MIC1MUTE_AMP_THR +941 0x0008 //TX_MIC1MUTE_CVG_TIME +942 0x0008 //TX_MIC1MUTE_RELEASE_TIME +943 0x0000 //TX_AMS_RESRV_01 +944 0x0000 //TX_AMS_RESRV_02 +945 0x0000 //TX_AMS_RESRV_03 +946 0x0000 //TX_AMS_RESRV_04 +947 0x0000 //TX_AMS_RESRV_05 +948 0x0000 //TX_AMS_RESRV_06 +949 0x0000 //TX_AMS_RESRV_07 +950 0x0000 //TX_AMS_RESRV_08 +951 0x0000 //TX_AMS_RESRV_09 +952 0x0000 //TX_AMS_RESRV_10 +953 0x0000 //TX_AMS_RESRV_11 +954 0x0000 //TX_AMS_RESRV_12 +955 0x0000 //TX_AMS_RESRV_13 +956 0x0000 //TX_AMS_RESRV_14 +957 0x0000 //TX_AMS_RESRV_15 +958 0x0000 //TX_AMS_RESRV_16 +959 0x0000 //TX_AMS_RESRV_17 +960 0x0000 //TX_AMS_RESRV_18 +961 0x0000 //TX_AMS_RESRV_19 #RX 0 0x000C //RX_RECVFUNC_MODE_0 1 0x0000 //RX_RECVFUNC_MODE_1 @@ -31556,10 +47211,862 @@ 110 0x0000 //RX_FDDRC_RESRV_0 129 0x0100 //RX_SPK_VOL 130 0x0000 //RX_VOL_RESRV_0 +#RX 2 +157 0x000C //RX_RECVFUNC_MODE_0 +158 0x0000 //RX_RECVFUNC_MODE_1 +159 0x0003 //RX_SAMPLINGFREQ_SIG +160 0x0003 //RX_SAMPLINGFREQ_PROC +161 0x000A //RX_FRAME_SZ +162 0x0000 //RX_DELAY_OPT +163 0x1000 //RX_TDDRC_ALPHA_UP_1 +164 0x1000 //RX_TDDRC_ALPHA_UP_2 +165 0x1000 //RX_TDDRC_ALPHA_UP_3 +166 0x1000 //RX_TDDRC_ALPHA_UP_4 +167 0x0800 //RX_PGA +168 0x7FFF //RX_A_HP +169 0x4000 //RX_B_PE +170 0x5800 //RX_THR_PITCH_DET_0 +171 0x5000 //RX_THR_PITCH_DET_1 +172 0x4000 //RX_THR_PITCH_DET_2 +173 0x0008 //RX_PITCH_BFR_LEN +174 0x0003 //RX_SBD_PITCH_DET +175 0x0100 //RX_PP_RESRV_0 +176 0x0020 //RX_PP_RESRV_1 +177 0x0600 //RX_N_SN_EST +178 0x000C //RX_N2_SN_EST +179 0x000F //RX_NS_LVL_CTRL +180 0xF800 //RX_THR_SN_EST +181 0x7E00 //RX_LAMBDA_PFILT +182 0x000A //RX_FENS_RESRV_0 +183 0x0190 //RX_FENS_RESRV_1 +184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +187 0x0002 //RX_EXTRA_NS_L +188 0x0800 //RX_EXTRA_NS_A +189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +190 0x7000 //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +192 0x199A //RX_A_POST_FLT +193 0x0000 //RX_LMT_THRD +194 0x4000 //RX_LMT_ALPHA +195 0x0030 //RX_FDEQ_SUBNUM +196 0x4848 //RX_FDEQ_GAIN_0 +197 0x4848 //RX_FDEQ_GAIN_1 +198 0x4844 //RX_FDEQ_GAIN_2 +199 0x4B4D //RX_FDEQ_GAIN_3 +200 0x4E50 //RX_FDEQ_GAIN_4 +201 0x5254 //RX_FDEQ_GAIN_5 +202 0x5658 //RX_FDEQ_GAIN_6 +203 0x5C60 //RX_FDEQ_GAIN_7 +204 0x6468 //RX_FDEQ_GAIN_8 +205 0x6C70 //RX_FDEQ_GAIN_9 +206 0x7474 //RX_FDEQ_GAIN_10 +207 0x7474 //RX_FDEQ_GAIN_11 +208 0x7474 //RX_FDEQ_GAIN_12 +209 0x7474 //RX_FDEQ_GAIN_13 +210 0x7474 //RX_FDEQ_GAIN_14 +211 0x7474 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0202 //RX_FDEQ_BIN_0 +221 0x0203 //RX_FDEQ_BIN_1 +222 0x0402 //RX_FDEQ_BIN_2 +223 0x0304 //RX_FDEQ_BIN_3 +224 0x0405 //RX_FDEQ_BIN_4 +225 0x0506 //RX_FDEQ_BIN_5 +226 0x0708 //RX_FDEQ_BIN_6 +227 0x090A //RX_FDEQ_BIN_7 +228 0x0B0C //RX_FDEQ_BIN_8 +229 0x0D0E //RX_FDEQ_BIN_9 +230 0x1214 //RX_FDEQ_BIN_10 +231 0x1E1E //RX_FDEQ_BIN_11 +232 0x1E1E //RX_FDEQ_BIN_12 +233 0x1E1E //RX_FDEQ_BIN_13 +234 0x1E1E //RX_FDEQ_BIN_14 +235 0x202C //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x4000 //RX_FDEQ_RESRV_0 +245 0x0320 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0030 //RX_FDDRC_BAND_MARGIN_1 +248 0x0050 //RX_FDDRC_BAND_MARGIN_2 +249 0x0080 //RX_FDDRC_BAND_MARGIN_3 +250 0x0007 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x5000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x6400 //RX_FDDRC_THRD_3_2 +258 0x6400 //RX_FDDRC_THRD_3_3 +259 0x2000 //RX_FDDRC_SLANT_0_0 +260 0x2000 //RX_FDDRC_SLANT_0_1 +261 0x2000 //RX_FDDRC_SLANT_0_2 +262 0x2000 //RX_FDDRC_SLANT_0_3 +263 0x5333 //RX_FDDRC_SLANT_1_0 +264 0x5333 //RX_FDDRC_SLANT_1_1 +265 0x5333 //RX_FDDRC_SLANT_1_2 +266 0x5333 //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +268 0x0002 //RX_FILTINDX +269 0x0000 //RX_TDDRC_THRD_0 +270 0x0000 //RX_TDDRC_THRD_1 +271 0x1800 //RX_TDDRC_THRD_2 +272 0x1800 //RX_TDDRC_THRD_3 +273 0x3000 //RX_TDDRC_SLANT_0 +274 0x6E00 //RX_TDDRC_SLANT_1 +275 0x1000 //RX_TDDRC_ALPHA_UP_0 +276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x199A //RX_TDDRC_HMNC_GAIN +279 0x0001 //RX_TDDRC_SMT_FLAG +280 0x0CCD //RX_TDDRC_SMT_W +281 0x01E0 //RX_TDDRC_DRC_GAIN +282 0x7C00 //RX_LAMBDA_PKA_FP +283 0x2000 //RX_TPKA_FP +284 0x2000 //RX_MIN_G_FP +285 0x0080 //RX_MAX_G_FP +286 0x0100 //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 +288 0x0000 //RX_MAXLEVEL_CNG +289 0x3000 //RX_BWE_UV_TH +290 0x3000 //RX_BWE_UV_TH2 +291 0x1800 //RX_BWE_UV_TH3 +292 0x1000 //RX_BWE_V_TH +293 0x04CD //RX_BWE_GAIN1_V_TH1 +294 0x0F33 //RX_BWE_GAIN1_V_TH2 +295 0x7333 //RX_BWE_UV_EQ +296 0x199A //RX_BWE_V_EQ +297 0x7333 //RX_BWE_TONE_TH +298 0x0004 //RX_BWE_UV_HOLD_T +299 0x6CCD //RX_BWE_GAIN2_ALPHA +300 0x799A //RX_BWE_GAIN3_ALPHA +301 0x001E //RX_BWE_CUTOFF +302 0x3000 //RX_BWE_GAINFILL +303 0x3200 //RX_BWE_MAXTH_TONE +304 0x2000 //RX_BWE_EQ_0 +305 0x2000 //RX_BWE_EQ_1 +306 0x2000 //RX_BWE_EQ_2 +307 0x2000 //RX_BWE_EQ_3 +308 0x2000 //RX_BWE_EQ_4 +309 0x2000 //RX_BWE_EQ_5 +310 0x2000 //RX_BWE_EQ_6 +311 0x0000 //RX_BWE_RESRV_0 +312 0x0000 //RX_BWE_RESRV_1 +313 0x0000 //RX_BWE_RESRV_2 +#VOL 0 +163 0x1000 //RX_TDDRC_ALPHA_UP_1 +164 0x1000 //RX_TDDRC_ALPHA_UP_2 +165 0x1000 //RX_TDDRC_ALPHA_UP_3 +166 0x1000 //RX_TDDRC_ALPHA_UP_4 +184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +190 0x7000 //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +269 0x0000 //RX_TDDRC_THRD_0 +270 0x0000 //RX_TDDRC_THRD_1 +271 0x1800 //RX_TDDRC_THRD_2 +272 0x1800 //RX_TDDRC_THRD_3 +273 0x3000 //RX_TDDRC_SLANT_0 +274 0x6E00 //RX_TDDRC_SLANT_1 +275 0x1000 //RX_TDDRC_ALPHA_UP_0 +276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x199A //RX_TDDRC_HMNC_GAIN +279 0x0001 //RX_TDDRC_SMT_FLAG +280 0x0CCD //RX_TDDRC_SMT_W +281 0x01E0 //RX_TDDRC_DRC_GAIN +195 0x0030 //RX_FDEQ_SUBNUM +196 0x4848 //RX_FDEQ_GAIN_0 +197 0x4848 //RX_FDEQ_GAIN_1 +198 0x4844 //RX_FDEQ_GAIN_2 +199 0x4B4D //RX_FDEQ_GAIN_3 +200 0x4E50 //RX_FDEQ_GAIN_4 +201 0x5254 //RX_FDEQ_GAIN_5 +202 0x5658 //RX_FDEQ_GAIN_6 +203 0x5C60 //RX_FDEQ_GAIN_7 +204 0x6468 //RX_FDEQ_GAIN_8 +205 0x6C70 //RX_FDEQ_GAIN_9 +206 0x7474 //RX_FDEQ_GAIN_10 +207 0x7474 //RX_FDEQ_GAIN_11 +208 0x7474 //RX_FDEQ_GAIN_12 +209 0x7474 //RX_FDEQ_GAIN_13 +210 0x7474 //RX_FDEQ_GAIN_14 +211 0x7474 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0202 //RX_FDEQ_BIN_0 +221 0x0203 //RX_FDEQ_BIN_1 +222 0x0402 //RX_FDEQ_BIN_2 +223 0x0304 //RX_FDEQ_BIN_3 +224 0x0405 //RX_FDEQ_BIN_4 +225 0x0506 //RX_FDEQ_BIN_5 +226 0x0708 //RX_FDEQ_BIN_6 +227 0x090A //RX_FDEQ_BIN_7 +228 0x0B0C //RX_FDEQ_BIN_8 +229 0x0D0E //RX_FDEQ_BIN_9 +230 0x1214 //RX_FDEQ_BIN_10 +231 0x1E1E //RX_FDEQ_BIN_11 +232 0x1E1E //RX_FDEQ_BIN_12 +233 0x1E1E //RX_FDEQ_BIN_13 +234 0x1E1E //RX_FDEQ_BIN_14 +235 0x202C //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x4000 //RX_FDEQ_RESRV_0 +245 0x0320 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0030 //RX_FDDRC_BAND_MARGIN_1 +248 0x0050 //RX_FDDRC_BAND_MARGIN_2 +249 0x0080 //RX_FDDRC_BAND_MARGIN_3 +250 0x0007 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x5000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x6400 //RX_FDDRC_THRD_3_2 +258 0x6400 //RX_FDDRC_THRD_3_3 +259 0x2000 //RX_FDDRC_SLANT_0_0 +260 0x2000 //RX_FDDRC_SLANT_0_1 +261 0x2000 //RX_FDDRC_SLANT_0_2 +262 0x2000 //RX_FDDRC_SLANT_0_3 +263 0x5333 //RX_FDDRC_SLANT_1_0 +264 0x5333 //RX_FDDRC_SLANT_1_1 +265 0x5333 //RX_FDDRC_SLANT_1_2 +266 0x5333 //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +286 0x0100 //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 +#VOL 1 +163 0x1000 //RX_TDDRC_ALPHA_UP_1 +164 0x1000 //RX_TDDRC_ALPHA_UP_2 +165 0x1000 //RX_TDDRC_ALPHA_UP_3 +166 0x1000 //RX_TDDRC_ALPHA_UP_4 +184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +190 0x7000 //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +269 0x0000 //RX_TDDRC_THRD_0 +270 0x0000 //RX_TDDRC_THRD_1 +271 0x1800 //RX_TDDRC_THRD_2 +272 0x1800 //RX_TDDRC_THRD_3 +273 0x3000 //RX_TDDRC_SLANT_0 +274 0x6E00 //RX_TDDRC_SLANT_1 +275 0x1000 //RX_TDDRC_ALPHA_UP_0 +276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x199A //RX_TDDRC_HMNC_GAIN +279 0x0001 //RX_TDDRC_SMT_FLAG +280 0x0CCD //RX_TDDRC_SMT_W +281 0x01E0 //RX_TDDRC_DRC_GAIN +195 0x0030 //RX_FDEQ_SUBNUM +196 0x4848 //RX_FDEQ_GAIN_0 +197 0x4848 //RX_FDEQ_GAIN_1 +198 0x4844 //RX_FDEQ_GAIN_2 +199 0x4B4D //RX_FDEQ_GAIN_3 +200 0x4E50 //RX_FDEQ_GAIN_4 +201 0x5254 //RX_FDEQ_GAIN_5 +202 0x5658 //RX_FDEQ_GAIN_6 +203 0x5C60 //RX_FDEQ_GAIN_7 +204 0x6468 //RX_FDEQ_GAIN_8 +205 0x6C70 //RX_FDEQ_GAIN_9 +206 0x7474 //RX_FDEQ_GAIN_10 +207 0x7474 //RX_FDEQ_GAIN_11 +208 0x7474 //RX_FDEQ_GAIN_12 +209 0x7474 //RX_FDEQ_GAIN_13 +210 0x7474 //RX_FDEQ_GAIN_14 +211 0x7474 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0202 //RX_FDEQ_BIN_0 +221 0x0203 //RX_FDEQ_BIN_1 +222 0x0402 //RX_FDEQ_BIN_2 +223 0x0304 //RX_FDEQ_BIN_3 +224 0x0405 //RX_FDEQ_BIN_4 +225 0x0506 //RX_FDEQ_BIN_5 +226 0x0708 //RX_FDEQ_BIN_6 +227 0x090A //RX_FDEQ_BIN_7 +228 0x0B0C //RX_FDEQ_BIN_8 +229 0x0D0E //RX_FDEQ_BIN_9 +230 0x1214 //RX_FDEQ_BIN_10 +231 0x1E1E //RX_FDEQ_BIN_11 +232 0x1E1E //RX_FDEQ_BIN_12 +233 0x1E1E //RX_FDEQ_BIN_13 +234 0x1E1E //RX_FDEQ_BIN_14 +235 0x202C //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x4000 //RX_FDEQ_RESRV_0 +245 0x0320 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0030 //RX_FDDRC_BAND_MARGIN_1 +248 0x0050 //RX_FDDRC_BAND_MARGIN_2 +249 0x0080 //RX_FDDRC_BAND_MARGIN_3 +250 0x0007 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x5000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x6400 //RX_FDDRC_THRD_3_2 +258 0x6400 //RX_FDDRC_THRD_3_3 +259 0x2000 //RX_FDDRC_SLANT_0_0 +260 0x2000 //RX_FDDRC_SLANT_0_1 +261 0x2000 //RX_FDDRC_SLANT_0_2 +262 0x2000 //RX_FDDRC_SLANT_0_3 +263 0x5333 //RX_FDDRC_SLANT_1_0 +264 0x5333 //RX_FDDRC_SLANT_1_1 +265 0x5333 //RX_FDDRC_SLANT_1_2 +266 0x5333 //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +286 0x0100 //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 +#VOL 2 +163 0x1000 //RX_TDDRC_ALPHA_UP_1 +164 0x1000 //RX_TDDRC_ALPHA_UP_2 +165 0x1000 //RX_TDDRC_ALPHA_UP_3 +166 0x1000 //RX_TDDRC_ALPHA_UP_4 +184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +190 0x7000 //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +269 0x0000 //RX_TDDRC_THRD_0 +270 0x0000 //RX_TDDRC_THRD_1 +271 0x1800 //RX_TDDRC_THRD_2 +272 0x1800 //RX_TDDRC_THRD_3 +273 0x3000 //RX_TDDRC_SLANT_0 +274 0x6E00 //RX_TDDRC_SLANT_1 +275 0x1000 //RX_TDDRC_ALPHA_UP_0 +276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x199A //RX_TDDRC_HMNC_GAIN +279 0x0001 //RX_TDDRC_SMT_FLAG +280 0x0CCD //RX_TDDRC_SMT_W +281 0x01E0 //RX_TDDRC_DRC_GAIN +195 0x0030 //RX_FDEQ_SUBNUM +196 0x4848 //RX_FDEQ_GAIN_0 +197 0x4848 //RX_FDEQ_GAIN_1 +198 0x4844 //RX_FDEQ_GAIN_2 +199 0x4B4D //RX_FDEQ_GAIN_3 +200 0x4E50 //RX_FDEQ_GAIN_4 +201 0x5254 //RX_FDEQ_GAIN_5 +202 0x5658 //RX_FDEQ_GAIN_6 +203 0x5C60 //RX_FDEQ_GAIN_7 +204 0x6468 //RX_FDEQ_GAIN_8 +205 0x6C70 //RX_FDEQ_GAIN_9 +206 0x7474 //RX_FDEQ_GAIN_10 +207 0x7474 //RX_FDEQ_GAIN_11 +208 0x7474 //RX_FDEQ_GAIN_12 +209 0x7474 //RX_FDEQ_GAIN_13 +210 0x7474 //RX_FDEQ_GAIN_14 +211 0x7474 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0202 //RX_FDEQ_BIN_0 +221 0x0203 //RX_FDEQ_BIN_1 +222 0x0402 //RX_FDEQ_BIN_2 +223 0x0304 //RX_FDEQ_BIN_3 +224 0x0405 //RX_FDEQ_BIN_4 +225 0x0506 //RX_FDEQ_BIN_5 +226 0x0708 //RX_FDEQ_BIN_6 +227 0x090A //RX_FDEQ_BIN_7 +228 0x0B0C //RX_FDEQ_BIN_8 +229 0x0D0E //RX_FDEQ_BIN_9 +230 0x1214 //RX_FDEQ_BIN_10 +231 0x1E1E //RX_FDEQ_BIN_11 +232 0x1E1E //RX_FDEQ_BIN_12 +233 0x1E1E //RX_FDEQ_BIN_13 +234 0x1E1E //RX_FDEQ_BIN_14 +235 0x202C //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x4000 //RX_FDEQ_RESRV_0 +245 0x0320 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0030 //RX_FDDRC_BAND_MARGIN_1 +248 0x0050 //RX_FDDRC_BAND_MARGIN_2 +249 0x0080 //RX_FDDRC_BAND_MARGIN_3 +250 0x0007 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x5000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x6400 //RX_FDDRC_THRD_3_2 +258 0x6400 //RX_FDDRC_THRD_3_3 +259 0x2000 //RX_FDDRC_SLANT_0_0 +260 0x2000 //RX_FDDRC_SLANT_0_1 +261 0x2000 //RX_FDDRC_SLANT_0_2 +262 0x2000 //RX_FDDRC_SLANT_0_3 +263 0x5333 //RX_FDDRC_SLANT_1_0 +264 0x5333 //RX_FDDRC_SLANT_1_1 +265 0x5333 //RX_FDDRC_SLANT_1_2 +266 0x5333 //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +286 0x0100 //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 +#VOL 3 +163 0x1000 //RX_TDDRC_ALPHA_UP_1 +164 0x1000 //RX_TDDRC_ALPHA_UP_2 +165 0x1000 //RX_TDDRC_ALPHA_UP_3 +166 0x1000 //RX_TDDRC_ALPHA_UP_4 +184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +190 0x7000 //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +269 0x0000 //RX_TDDRC_THRD_0 +270 0x0000 //RX_TDDRC_THRD_1 +271 0x1800 //RX_TDDRC_THRD_2 +272 0x1800 //RX_TDDRC_THRD_3 +273 0x3000 //RX_TDDRC_SLANT_0 +274 0x6E00 //RX_TDDRC_SLANT_1 +275 0x1000 //RX_TDDRC_ALPHA_UP_0 +276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x199A //RX_TDDRC_HMNC_GAIN +279 0x0001 //RX_TDDRC_SMT_FLAG +280 0x0CCD //RX_TDDRC_SMT_W +281 0x01E0 //RX_TDDRC_DRC_GAIN +195 0x0030 //RX_FDEQ_SUBNUM +196 0x4848 //RX_FDEQ_GAIN_0 +197 0x4848 //RX_FDEQ_GAIN_1 +198 0x4844 //RX_FDEQ_GAIN_2 +199 0x4B4D //RX_FDEQ_GAIN_3 +200 0x4E50 //RX_FDEQ_GAIN_4 +201 0x5254 //RX_FDEQ_GAIN_5 +202 0x5658 //RX_FDEQ_GAIN_6 +203 0x5C60 //RX_FDEQ_GAIN_7 +204 0x6468 //RX_FDEQ_GAIN_8 +205 0x6C70 //RX_FDEQ_GAIN_9 +206 0x7474 //RX_FDEQ_GAIN_10 +207 0x7474 //RX_FDEQ_GAIN_11 +208 0x7474 //RX_FDEQ_GAIN_12 +209 0x7474 //RX_FDEQ_GAIN_13 +210 0x7474 //RX_FDEQ_GAIN_14 +211 0x7474 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0202 //RX_FDEQ_BIN_0 +221 0x0203 //RX_FDEQ_BIN_1 +222 0x0402 //RX_FDEQ_BIN_2 +223 0x0304 //RX_FDEQ_BIN_3 +224 0x0405 //RX_FDEQ_BIN_4 +225 0x0506 //RX_FDEQ_BIN_5 +226 0x0708 //RX_FDEQ_BIN_6 +227 0x090A //RX_FDEQ_BIN_7 +228 0x0B0C //RX_FDEQ_BIN_8 +229 0x0D0E //RX_FDEQ_BIN_9 +230 0x1214 //RX_FDEQ_BIN_10 +231 0x1E1E //RX_FDEQ_BIN_11 +232 0x1E1E //RX_FDEQ_BIN_12 +233 0x1E1E //RX_FDEQ_BIN_13 +234 0x1E1E //RX_FDEQ_BIN_14 +235 0x202C //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x4000 //RX_FDEQ_RESRV_0 +245 0x0320 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0030 //RX_FDDRC_BAND_MARGIN_1 +248 0x0050 //RX_FDDRC_BAND_MARGIN_2 +249 0x0080 //RX_FDDRC_BAND_MARGIN_3 +250 0x0007 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x5000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x6400 //RX_FDDRC_THRD_3_2 +258 0x6400 //RX_FDDRC_THRD_3_3 +259 0x2000 //RX_FDDRC_SLANT_0_0 +260 0x2000 //RX_FDDRC_SLANT_0_1 +261 0x2000 //RX_FDDRC_SLANT_0_2 +262 0x2000 //RX_FDDRC_SLANT_0_3 +263 0x5333 //RX_FDDRC_SLANT_1_0 +264 0x5333 //RX_FDDRC_SLANT_1_1 +265 0x5333 //RX_FDDRC_SLANT_1_2 +266 0x5333 //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +286 0x0100 //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 +#VOL 4 +163 0x1000 //RX_TDDRC_ALPHA_UP_1 +164 0x1000 //RX_TDDRC_ALPHA_UP_2 +165 0x1000 //RX_TDDRC_ALPHA_UP_3 +166 0x1000 //RX_TDDRC_ALPHA_UP_4 +184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +190 0x7000 //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +269 0x0000 //RX_TDDRC_THRD_0 +270 0x0000 //RX_TDDRC_THRD_1 +271 0x1800 //RX_TDDRC_THRD_2 +272 0x1800 //RX_TDDRC_THRD_3 +273 0x3000 //RX_TDDRC_SLANT_0 +274 0x6E00 //RX_TDDRC_SLANT_1 +275 0x1000 //RX_TDDRC_ALPHA_UP_0 +276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x199A //RX_TDDRC_HMNC_GAIN +279 0x0001 //RX_TDDRC_SMT_FLAG +280 0x0CCD //RX_TDDRC_SMT_W +281 0x01E0 //RX_TDDRC_DRC_GAIN +195 0x0030 //RX_FDEQ_SUBNUM +196 0x4848 //RX_FDEQ_GAIN_0 +197 0x4848 //RX_FDEQ_GAIN_1 +198 0x4844 //RX_FDEQ_GAIN_2 +199 0x4B4D //RX_FDEQ_GAIN_3 +200 0x4E50 //RX_FDEQ_GAIN_4 +201 0x5254 //RX_FDEQ_GAIN_5 +202 0x5658 //RX_FDEQ_GAIN_6 +203 0x5C60 //RX_FDEQ_GAIN_7 +204 0x6468 //RX_FDEQ_GAIN_8 +205 0x6C70 //RX_FDEQ_GAIN_9 +206 0x7474 //RX_FDEQ_GAIN_10 +207 0x7474 //RX_FDEQ_GAIN_11 +208 0x7474 //RX_FDEQ_GAIN_12 +209 0x7474 //RX_FDEQ_GAIN_13 +210 0x7474 //RX_FDEQ_GAIN_14 +211 0x7474 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0202 //RX_FDEQ_BIN_0 +221 0x0203 //RX_FDEQ_BIN_1 +222 0x0402 //RX_FDEQ_BIN_2 +223 0x0304 //RX_FDEQ_BIN_3 +224 0x0405 //RX_FDEQ_BIN_4 +225 0x0506 //RX_FDEQ_BIN_5 +226 0x0708 //RX_FDEQ_BIN_6 +227 0x090A //RX_FDEQ_BIN_7 +228 0x0B0C //RX_FDEQ_BIN_8 +229 0x0D0E //RX_FDEQ_BIN_9 +230 0x1214 //RX_FDEQ_BIN_10 +231 0x1E1E //RX_FDEQ_BIN_11 +232 0x1E1E //RX_FDEQ_BIN_12 +233 0x1E1E //RX_FDEQ_BIN_13 +234 0x1E1E //RX_FDEQ_BIN_14 +235 0x202C //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x4000 //RX_FDEQ_RESRV_0 +245 0x0320 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0030 //RX_FDDRC_BAND_MARGIN_1 +248 0x0050 //RX_FDDRC_BAND_MARGIN_2 +249 0x0080 //RX_FDDRC_BAND_MARGIN_3 +250 0x0007 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x5000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x6400 //RX_FDDRC_THRD_3_2 +258 0x6400 //RX_FDDRC_THRD_3_3 +259 0x2000 //RX_FDDRC_SLANT_0_0 +260 0x2000 //RX_FDDRC_SLANT_0_1 +261 0x2000 //RX_FDDRC_SLANT_0_2 +262 0x2000 //RX_FDDRC_SLANT_0_3 +263 0x5333 //RX_FDDRC_SLANT_1_0 +264 0x5333 //RX_FDDRC_SLANT_1_1 +265 0x5333 //RX_FDDRC_SLANT_1_2 +266 0x5333 //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +286 0x0100 //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 +#VOL 5 +163 0x1000 //RX_TDDRC_ALPHA_UP_1 +164 0x1000 //RX_TDDRC_ALPHA_UP_2 +165 0x1000 //RX_TDDRC_ALPHA_UP_3 +166 0x1000 //RX_TDDRC_ALPHA_UP_4 +184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +190 0x7000 //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +269 0x0000 //RX_TDDRC_THRD_0 +270 0x0000 //RX_TDDRC_THRD_1 +271 0x1800 //RX_TDDRC_THRD_2 +272 0x1800 //RX_TDDRC_THRD_3 +273 0x3000 //RX_TDDRC_SLANT_0 +274 0x6E00 //RX_TDDRC_SLANT_1 +275 0x1000 //RX_TDDRC_ALPHA_UP_0 +276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x199A //RX_TDDRC_HMNC_GAIN +279 0x0001 //RX_TDDRC_SMT_FLAG +280 0x0CCD //RX_TDDRC_SMT_W +281 0x01E0 //RX_TDDRC_DRC_GAIN +195 0x0030 //RX_FDEQ_SUBNUM +196 0x4848 //RX_FDEQ_GAIN_0 +197 0x4848 //RX_FDEQ_GAIN_1 +198 0x4844 //RX_FDEQ_GAIN_2 +199 0x4B4D //RX_FDEQ_GAIN_3 +200 0x4E50 //RX_FDEQ_GAIN_4 +201 0x5254 //RX_FDEQ_GAIN_5 +202 0x5658 //RX_FDEQ_GAIN_6 +203 0x5C60 //RX_FDEQ_GAIN_7 +204 0x6468 //RX_FDEQ_GAIN_8 +205 0x6C70 //RX_FDEQ_GAIN_9 +206 0x7474 //RX_FDEQ_GAIN_10 +207 0x7474 //RX_FDEQ_GAIN_11 +208 0x7474 //RX_FDEQ_GAIN_12 +209 0x7474 //RX_FDEQ_GAIN_13 +210 0x7474 //RX_FDEQ_GAIN_14 +211 0x7474 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0202 //RX_FDEQ_BIN_0 +221 0x0203 //RX_FDEQ_BIN_1 +222 0x0402 //RX_FDEQ_BIN_2 +223 0x0304 //RX_FDEQ_BIN_3 +224 0x0405 //RX_FDEQ_BIN_4 +225 0x0506 //RX_FDEQ_BIN_5 +226 0x0708 //RX_FDEQ_BIN_6 +227 0x090A //RX_FDEQ_BIN_7 +228 0x0B0C //RX_FDEQ_BIN_8 +229 0x0D0E //RX_FDEQ_BIN_9 +230 0x1214 //RX_FDEQ_BIN_10 +231 0x1E1E //RX_FDEQ_BIN_11 +232 0x1E1E //RX_FDEQ_BIN_12 +233 0x1E1E //RX_FDEQ_BIN_13 +234 0x1E1E //RX_FDEQ_BIN_14 +235 0x202C //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x4000 //RX_FDEQ_RESRV_0 +245 0x0320 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0030 //RX_FDDRC_BAND_MARGIN_1 +248 0x0050 //RX_FDDRC_BAND_MARGIN_2 +249 0x0080 //RX_FDDRC_BAND_MARGIN_3 +250 0x0007 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x5000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x6400 //RX_FDDRC_THRD_3_2 +258 0x6400 //RX_FDDRC_THRD_3_3 +259 0x2000 //RX_FDDRC_SLANT_0_0 +260 0x2000 //RX_FDDRC_SLANT_0_1 +261 0x2000 //RX_FDDRC_SLANT_0_2 +262 0x2000 //RX_FDDRC_SLANT_0_3 +263 0x5333 //RX_FDDRC_SLANT_1_0 +264 0x5333 //RX_FDDRC_SLANT_1_1 +265 0x5333 //RX_FDDRC_SLANT_1_2 +266 0x5333 //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +286 0x0100 //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 +#VOL 6 +163 0x1000 //RX_TDDRC_ALPHA_UP_1 +164 0x1000 //RX_TDDRC_ALPHA_UP_2 +165 0x1000 //RX_TDDRC_ALPHA_UP_3 +166 0x1000 //RX_TDDRC_ALPHA_UP_4 +184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +190 0x7000 //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +269 0x0000 //RX_TDDRC_THRD_0 +270 0x0000 //RX_TDDRC_THRD_1 +271 0x1800 //RX_TDDRC_THRD_2 +272 0x1800 //RX_TDDRC_THRD_3 +273 0x3000 //RX_TDDRC_SLANT_0 +274 0x6E00 //RX_TDDRC_SLANT_1 +275 0x1000 //RX_TDDRC_ALPHA_UP_0 +276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x199A //RX_TDDRC_HMNC_GAIN +279 0x0001 //RX_TDDRC_SMT_FLAG +280 0x0CCD //RX_TDDRC_SMT_W +281 0x01E0 //RX_TDDRC_DRC_GAIN +195 0x0030 //RX_FDEQ_SUBNUM +196 0x4848 //RX_FDEQ_GAIN_0 +197 0x4848 //RX_FDEQ_GAIN_1 +198 0x4844 //RX_FDEQ_GAIN_2 +199 0x4B4D //RX_FDEQ_GAIN_3 +200 0x4E50 //RX_FDEQ_GAIN_4 +201 0x5254 //RX_FDEQ_GAIN_5 +202 0x5658 //RX_FDEQ_GAIN_6 +203 0x5C60 //RX_FDEQ_GAIN_7 +204 0x6468 //RX_FDEQ_GAIN_8 +205 0x6C70 //RX_FDEQ_GAIN_9 +206 0x7474 //RX_FDEQ_GAIN_10 +207 0x7474 //RX_FDEQ_GAIN_11 +208 0x7474 //RX_FDEQ_GAIN_12 +209 0x7474 //RX_FDEQ_GAIN_13 +210 0x7474 //RX_FDEQ_GAIN_14 +211 0x7474 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0202 //RX_FDEQ_BIN_0 +221 0x0203 //RX_FDEQ_BIN_1 +222 0x0402 //RX_FDEQ_BIN_2 +223 0x0304 //RX_FDEQ_BIN_3 +224 0x0405 //RX_FDEQ_BIN_4 +225 0x0506 //RX_FDEQ_BIN_5 +226 0x0708 //RX_FDEQ_BIN_6 +227 0x090A //RX_FDEQ_BIN_7 +228 0x0B0C //RX_FDEQ_BIN_8 +229 0x0D0E //RX_FDEQ_BIN_9 +230 0x1214 //RX_FDEQ_BIN_10 +231 0x1E1E //RX_FDEQ_BIN_11 +232 0x1E1E //RX_FDEQ_BIN_12 +233 0x1E1E //RX_FDEQ_BIN_13 +234 0x1E1E //RX_FDEQ_BIN_14 +235 0x202C //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x4000 //RX_FDEQ_RESRV_0 +245 0x0320 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0030 //RX_FDDRC_BAND_MARGIN_1 +248 0x0050 //RX_FDDRC_BAND_MARGIN_2 +249 0x0080 //RX_FDDRC_BAND_MARGIN_3 +250 0x0007 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x5000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x6400 //RX_FDDRC_THRD_3_2 +258 0x6400 //RX_FDDRC_THRD_3_3 +259 0x2000 //RX_FDDRC_SLANT_0_0 +260 0x2000 //RX_FDDRC_SLANT_0_1 +261 0x2000 //RX_FDDRC_SLANT_0_2 +262 0x2000 //RX_FDDRC_SLANT_0_3 +263 0x5333 //RX_FDDRC_SLANT_1_0 +264 0x5333 //RX_FDDRC_SLANT_1_1 +265 0x5333 //RX_FDDRC_SLANT_1_2 +266 0x5333 //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +286 0x0100 //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 #CASE_NAME HANDSET-HANDSET_HAC-TMOBILE_US-FB -#PARAM_TYPE TX+RX -#TOTAL_CUSTOM_STEP 7 +#PARAM_MODE Full +#PARAM_TYPE TX+2RX +#TOTAL_CUSTOM_STEP 7+7 #TX 0 0x0000 //TX_OPERATION_MODE_0 1 0x0000 //TX_OPERATION_MODE_1 @@ -31582,7 +48089,7 @@ 18 0x0000 //TX_SYS_RESRV_2 19 0x0000 //TX_SYS_RESRV_3 20 0x0000 //TX_DIST2REF0 -21 0x00A4 //TX_DIST2REF1 +21 0x00A3 //TX_DIST2REF1 22 0x0000 //TX_DIST2REF_02 23 0x0000 //TX_DIST2REF_03 24 0x0000 //TX_DIST2REF_04 @@ -31812,12 +48319,12 @@ 248 0xF800 //TX_THR_SN_EST_6 249 0xF700 //TX_THR_SN_EST_7 250 0x0000 //TX_DELTA_THR_SN_EST_0 -251 0x0100 //TX_DELTA_THR_SN_EST_1 +251 0x0200 //TX_DELTA_THR_SN_EST_1 252 0x0200 //TX_DELTA_THR_SN_EST_2 253 0x0200 //TX_DELTA_THR_SN_EST_3 -254 0x0200 //TX_DELTA_THR_SN_EST_4 -255 0x0100 //TX_DELTA_THR_SN_EST_5 -256 0x0200 //TX_DELTA_THR_SN_EST_6 +254 0x0100 //TX_DELTA_THR_SN_EST_4 +255 0x0200 //TX_DELTA_THR_SN_EST_5 +256 0x0100 //TX_DELTA_THR_SN_EST_6 257 0x0200 //TX_DELTA_THR_SN_EST_7 258 0x4000 //TX_LAMBDA_NN_EST_0 259 0x4000 //TX_LAMBDA_NN_EST_1 @@ -31845,16 +48352,16 @@ 281 0x0014 //TX_NS_LVL_CTRL_0 282 0x0016 //TX_NS_LVL_CTRL_1 283 0x0016 //TX_NS_LVL_CTRL_2 -284 0x0016 //TX_NS_LVL_CTRL_3 -285 0x0018 //TX_NS_LVL_CTRL_4 -286 0x0016 //TX_NS_LVL_CTRL_5 -287 0x0012 //TX_NS_LVL_CTRL_6 +284 0x0018 //TX_NS_LVL_CTRL_3 +285 0x0016 //TX_NS_LVL_CTRL_4 +286 0x0012 //TX_NS_LVL_CTRL_5 +287 0x0016 //TX_NS_LVL_CTRL_6 288 0x0017 //TX_NS_LVL_CTRL_7 289 0x000E //TX_MIN_GAIN_S_0 -290 0x0012 //TX_MIN_GAIN_S_1 -291 0x0007 //TX_MIN_GAIN_S_2 -292 0x0012 //TX_MIN_GAIN_S_3 -293 0x0010 //TX_MIN_GAIN_S_4 +290 0x0007 //TX_MIN_GAIN_S_1 +291 0x0012 //TX_MIN_GAIN_S_2 +292 0x0010 //TX_MIN_GAIN_S_3 +293 0x0012 //TX_MIN_GAIN_S_4 294 0x0012 //TX_MIN_GAIN_S_5 295 0x0012 //TX_MIN_GAIN_S_6 296 0x0012 //TX_MIN_GAIN_S_7 @@ -31876,29 +48383,29 @@ 312 0x7FFF //TX_A_POST_FILT_0 313 0x2000 //TX_A_POST_FILT_1 314 0x4000 //TX_A_POST_FILT_S_0 -315 0x5000 //TX_A_POST_FILT_S_1 +315 0x4000 //TX_A_POST_FILT_S_1 316 0x4000 //TX_A_POST_FILT_S_2 317 0x4000 //TX_A_POST_FILT_S_3 318 0x4000 //TX_A_POST_FILT_S_4 319 0x4000 //TX_A_POST_FILT_S_5 -320 0x4000 //TX_A_POST_FILT_S_6 +320 0x5000 //TX_A_POST_FILT_S_6 321 0x7000 //TX_A_POST_FILT_S_7 322 0x1000 //TX_B_POST_FILT_0 323 0x2000 //TX_B_POST_FILT_1 -324 0x3000 //TX_B_POST_FILT_2 +324 0x2000 //TX_B_POST_FILT_2 325 0x2000 //TX_B_POST_FILT_3 -326 0x5000 //TX_B_POST_FILT_4 +326 0x2000 //TX_B_POST_FILT_4 327 0x2000 //TX_B_POST_FILT_5 -328 0x6000 //TX_B_POST_FILT_6 +328 0x3000 //TX_B_POST_FILT_6 329 0x3000 //TX_B_POST_FILT_7 330 0x1000 //TX_B_LESSCUT_RTO_S_0 -331 0x6000 //TX_B_LESSCUT_RTO_S_1 -332 0x6000 //TX_B_LESSCUT_RTO_S_2 -333 0x6000 //TX_B_LESSCUT_RTO_S_3 -334 0x6000 //TX_B_LESSCUT_RTO_S_4 -335 0x6000 //TX_B_LESSCUT_RTO_S_5 -336 0x7FFF //TX_B_LESSCUT_RTO_S_6 -337 0x7FFF //TX_B_LESSCUT_RTO_S_7 +331 0x1000 //TX_B_LESSCUT_RTO_S_1 +332 0x1000 //TX_B_LESSCUT_RTO_S_2 +333 0x1000 //TX_B_LESSCUT_RTO_S_3 +334 0x1000 //TX_B_LESSCUT_RTO_S_4 +335 0x1000 //TX_B_LESSCUT_RTO_S_5 +336 0x1000 //TX_B_LESSCUT_RTO_S_6 +337 0x1000 //TX_B_LESSCUT_RTO_S_7 338 0x7E14 //TX_LAMBDA_PFILT 339 0x7C29 //TX_LAMBDA_PFILT_S_0 340 0x7C29 //TX_LAMBDA_PFILT_S_1 @@ -31941,10 +48448,10 @@ 377 0x4E20 //TX_NOISE_TH_5_4 378 0x39DF //TX_NOISE_TH_6 379 0x0014 //TX_MINENOISE_TH -380 0x4000 //TX_MINENOISE_MIC0_TH_MTS -381 0xFFEE //TX_MINENOISE_MIC0_TH_EXP -382 0x6000 //TX_MINENOISE_MIC0_S_TH_MTS -383 0xFFF3 //TX_MINENOISE_MIC0_S_TH_EXP +380 0xD508 //TX_MORENS_TFMASK_TH +381 0x0001 //TX_DRC_QUIET_FLOOR +382 0x6D60 //TX_RATIODTL_CUT_TH +383 0x1482 //TX_DT_CUT_K1 384 0x00A5 //TX_OUT_ENER_S_TH_CLEAN 385 0x00A5 //TX_OUT_ENER_S_TH_LESSCLEAN 386 0x00A5 //TX_OUT_ENER_S_TH_NOISY @@ -31952,15 +48459,15 @@ 388 0x0200 //TX_OUT_ENER_TH_SPEECH 389 0x2000 //TX_SN_NPB_GAIN 390 0x0000 //TX_NN_NPB_GAIN -391 0x0000 //TX_CSX_ALPHA_0 -392 0x0000 //TX_CSX_ALPHA_1 -393 0x0000 //TX_CSX_ALPHA_2 -394 0x0000 //TX_CSX_ALPHA_3 -395 0x0800 //TX_MU_ARSP_EST -396 0x00C8 //TX_P_OUTBEAM_MIN_TH +391 0x3000 //TX_POST_MASK_SUP_HSNE +392 0x07D0 //TX_TAIL_DET_TH +393 0x4000 //TX_B_LESSCUT_RTO_WTA +394 0x0000 //TX_MEL_G_R +395 0x0080 //TX_SUPHIGH_TH +396 0x0000 //TX_MASK_G_R 397 0x0002 //TX_EXTRA_NS_L -398 0x0800 //TX_EXTRA_NS_A -399 0x0005 //TX_VR_NOISE_FLOOR_TH +398 0x1800 //TX_C_POST_FLT_MASK +399 0x7FFF //TX_A_POST_FLT_WNS 400 0x0148 //TX_MIN_G_LOW300HZ 401 0x0004 //TX_MAXLEVEL_CNG 402 0x00B4 //TX_STN_NOISE_TH @@ -32075,16 +48582,16 @@ 511 0x6666 //TX_MIC_TO_BFGAIN 512 0x0000 //TX_MICTOBFGAIN0 513 0x0000 //TX_FASTMUE_TH -514 0x0000 //TX_DERVB_LEN_0 -515 0x0000 //TX_DERVB_LEN_1 -516 0x0000 //TX_RHO_DERVB -517 0x0000 //TX_MIC_INDX_DERVB -518 0x0000 //TX_MU_DERVB -519 0x0000 //TX_DR_RESRV_0 -520 0x0000 //TX_DR_RESRV_1 -521 0x0000 //TX_DR_RESRV_2 -522 0x0000 //TX_DR_RESRV_3 -523 0x0000 //TX_DR_RESRV_4 +514 0x2CCC //TX_DEREVERB_LF_MU +515 0x3200 //TX_DEREVERB_HF_MU +516 0x0007 //TX_DEREVERB_DELAY +517 0x0004 //TX_DEREVERB_COEF_LEN +518 0x0003 //TX_DEREVERB_DNR +519 0x0000 //TX_DEREVERB_ALPHA +520 0x0000 //TX_DEREVERB_BETA +521 0x7FFF //TX_GSC_RTOL_TH +522 0x7FFF //TX_GSC_RTOH_TH +523 0x7E2C //TX_WIDE2_MEANHTH 524 0x0000 //TX_DR_RESRV_5 525 0x0000 //TX_DR_RESRV_6 526 0x0000 //TX_DR_RESRV_7 @@ -32458,6 +48965,71 @@ 894 0xC000 //TX_FASTNS_SSA_THHFL 895 0xCCCC //TX_FASTNS_SSA_THLFH 896 0xD999 //TX_FASTNS_SSA_THHFH +897 0x2339 //TX_SENDFUNC_REG_MICMUTE +898 0x0021 //TX_SENDFUNC_REG_MICMUTE1 +899 0x02BC //TX_MICMUTE_RATIO_THR +900 0x0140 //TX_MICMUTE_AMP_THR +901 0x0004 //TX_MICMUTE_HPF_IND +902 0x00C0 //TX_MICMUTE_LOG_EYR_TH +903 0x0008 //TX_MICMUTE_CVG_TIME +904 0x0008 //TX_MICMUTE_RELEASE_TIME +905 0x01FE //TX_MIC_VOLUME_MIC0MUTE +906 0x0020 //TX_MICMUTE_EPD_OFFSET_0 +907 0x001E //TX_MICMUTE_FRQ_AEC_L +908 0x7999 //TX_MICMUTE_EAD_THR +909 0x7FFF //TX_MICMUTE_LAMBDA_CB_NLE +910 0x7FFF //TX_MICMUTE_LAMBDA_RE_EST +911 0x4000 //TX_DTD_THR1_MICMUTE_0 +912 0x7000 //TX_DTD_THR1_MICMUTE_1 +913 0x7FFF //TX_DTD_THR1_MICMUTE_2 +914 0x7FFF //TX_DTD_THR1_MICMUTE_3 +915 0x6CCC //TX_DTD_THR2_MICMUTE_0 +916 0x0400 //TX_MICMUTE_MIN_EQ_RE_EST_0 +917 0x0400 //TX_MICMUTE_MIN_EQ_RE_EST_1 +918 0x1000 //TX_MICMUTE_MIN_EQ_RE_EST_2 +919 0x7FFF //TX_MICMUTE_MIN_EQ_RE_EST_3 +920 0x7FFF //TX_MICMUTE_MIN_EQ_RE_EST_4 +921 0x4000 //TX_MICMUTE_C_POST_FLT +922 0x03E8 //TX_MICMUTE_DT_CUT_K +923 0x0001 //TX_MICMUTE_DT_CUT_THR +924 0x03E8 //TX_MICMUTE_DT_CUT_K2 +925 0x0001 //TX_MICMUTE_DT_CUT_THR2 +926 0x0064 //TX_MICMUTE_DT2_HOLD_N +927 0x1000 //TX_MICMUTE_RATIODTH_THCUT +928 0x1000 //TX_MICMUTE_B_POST_FLT_ECHOL +929 0x7FFF //TX_MICMUTE_B_POST_FLT_ECHOH +930 0x0400 //TX_MICMUTE_C_POST_FLT_MASK +931 0x7999 //TX_MICMUTE_RATIODTL_CUT_TH +932 0x0258 //TX_MICMUTE_DT_CUT_K1 +933 0x0800 //TX_MICMUTE_N2_SN_EST +934 0xFC00 //TX_MICMUTE_THR_SN_EST_0 +935 0x001C //TX_MICMUTE_MIN_G_CTRL_0 +936 0x6000 //TX_MICMUTE_A_POST_FILT_S_0 +937 0x7000 //TX_MICMUTE_B_POST_FILT_0 +938 0x2710 //TX_MIC1RUB_AMP_THR +939 0x0010 //TX_MIC1MUTE_RATIO_THR +940 0x0450 //TX_MIC1MUTE_AMP_THR +941 0x0008 //TX_MIC1MUTE_CVG_TIME +942 0x0008 //TX_MIC1MUTE_RELEASE_TIME +943 0x0000 //TX_AMS_RESRV_01 +944 0x0000 //TX_AMS_RESRV_02 +945 0x0000 //TX_AMS_RESRV_03 +946 0x0000 //TX_AMS_RESRV_04 +947 0x0000 //TX_AMS_RESRV_05 +948 0x0000 //TX_AMS_RESRV_06 +949 0x0000 //TX_AMS_RESRV_07 +950 0x0000 //TX_AMS_RESRV_08 +951 0x0000 //TX_AMS_RESRV_09 +952 0x0000 //TX_AMS_RESRV_10 +953 0x0000 //TX_AMS_RESRV_11 +954 0x0000 //TX_AMS_RESRV_12 +955 0x0000 //TX_AMS_RESRV_13 +956 0x0000 //TX_AMS_RESRV_14 +957 0x0000 //TX_AMS_RESRV_15 +958 0x0000 //TX_AMS_RESRV_16 +959 0x0000 //TX_AMS_RESRV_17 +960 0x0000 //TX_AMS_RESRV_18 +961 0x0000 //TX_AMS_RESRV_19 #RX 0 0x000C //RX_RECVFUNC_MODE_0 1 0x0000 //RX_RECVFUNC_MODE_1 @@ -33309,4 +49881,14205 @@ 110 0x0000 //RX_FDDRC_RESRV_0 129 0x0100 //RX_SPK_VOL 130 0x0000 //RX_VOL_RESRV_0 +#RX 2 +157 0x000C //RX_RECVFUNC_MODE_0 +158 0x0000 //RX_RECVFUNC_MODE_1 +159 0x0004 //RX_SAMPLINGFREQ_SIG +160 0x0004 //RX_SAMPLINGFREQ_PROC +161 0x000A //RX_FRAME_SZ +162 0x0000 //RX_DELAY_OPT +163 0x1000 //RX_TDDRC_ALPHA_UP_1 +164 0x1000 //RX_TDDRC_ALPHA_UP_2 +165 0x1000 //RX_TDDRC_ALPHA_UP_3 +166 0x1000 //RX_TDDRC_ALPHA_UP_4 +167 0x0800 //RX_PGA +168 0x7FFF //RX_A_HP +169 0x4000 //RX_B_PE +170 0x5800 //RX_THR_PITCH_DET_0 +171 0x5000 //RX_THR_PITCH_DET_1 +172 0x4000 //RX_THR_PITCH_DET_2 +173 0x0008 //RX_PITCH_BFR_LEN +174 0x0003 //RX_SBD_PITCH_DET +175 0x0100 //RX_PP_RESRV_0 +176 0x0020 //RX_PP_RESRV_1 +177 0x0600 //RX_N_SN_EST +178 0x000C //RX_N2_SN_EST +179 0x000F //RX_NS_LVL_CTRL +180 0xF800 //RX_THR_SN_EST +181 0x7E00 //RX_LAMBDA_PFILT +182 0x000A //RX_FENS_RESRV_0 +183 0x0190 //RX_FENS_RESRV_1 +184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +187 0x0002 //RX_EXTRA_NS_L +188 0x0800 //RX_EXTRA_NS_A +189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +190 0x7000 //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +192 0x199A //RX_A_POST_FLT +193 0x0000 //RX_LMT_THRD +194 0x4000 //RX_LMT_ALPHA +195 0x0030 //RX_FDEQ_SUBNUM +196 0x4848 //RX_FDEQ_GAIN_0 +197 0x4848 //RX_FDEQ_GAIN_1 +198 0x4844 //RX_FDEQ_GAIN_2 +199 0x4B4D //RX_FDEQ_GAIN_3 +200 0x4E50 //RX_FDEQ_GAIN_4 +201 0x5254 //RX_FDEQ_GAIN_5 +202 0x5658 //RX_FDEQ_GAIN_6 +203 0x5C60 //RX_FDEQ_GAIN_7 +204 0x6468 //RX_FDEQ_GAIN_8 +205 0x6C70 //RX_FDEQ_GAIN_9 +206 0x7474 //RX_FDEQ_GAIN_10 +207 0x7474 //RX_FDEQ_GAIN_11 +208 0x7474 //RX_FDEQ_GAIN_12 +209 0x7474 //RX_FDEQ_GAIN_13 +210 0x7474 //RX_FDEQ_GAIN_14 +211 0x7474 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0202 //RX_FDEQ_BIN_0 +221 0x0203 //RX_FDEQ_BIN_1 +222 0x0402 //RX_FDEQ_BIN_2 +223 0x0304 //RX_FDEQ_BIN_3 +224 0x0405 //RX_FDEQ_BIN_4 +225 0x0506 //RX_FDEQ_BIN_5 +226 0x0708 //RX_FDEQ_BIN_6 +227 0x090A //RX_FDEQ_BIN_7 +228 0x0B0C //RX_FDEQ_BIN_8 +229 0x0D0E //RX_FDEQ_BIN_9 +230 0x1214 //RX_FDEQ_BIN_10 +231 0x1E1E //RX_FDEQ_BIN_11 +232 0x1E1E //RX_FDEQ_BIN_12 +233 0x1E1E //RX_FDEQ_BIN_13 +234 0x1E1E //RX_FDEQ_BIN_14 +235 0x202C //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x4000 //RX_FDEQ_RESRV_0 +245 0x0320 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0030 //RX_FDDRC_BAND_MARGIN_1 +248 0x0050 //RX_FDDRC_BAND_MARGIN_2 +249 0x0080 //RX_FDDRC_BAND_MARGIN_3 +250 0x0007 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x5000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x6400 //RX_FDDRC_THRD_3_2 +258 0x6400 //RX_FDDRC_THRD_3_3 +259 0x2000 //RX_FDDRC_SLANT_0_0 +260 0x2000 //RX_FDDRC_SLANT_0_1 +261 0x2000 //RX_FDDRC_SLANT_0_2 +262 0x2000 //RX_FDDRC_SLANT_0_3 +263 0x5333 //RX_FDDRC_SLANT_1_0 +264 0x5333 //RX_FDDRC_SLANT_1_1 +265 0x5333 //RX_FDDRC_SLANT_1_2 +266 0x5333 //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +268 0x0002 //RX_FILTINDX +269 0x0000 //RX_TDDRC_THRD_0 +270 0x0000 //RX_TDDRC_THRD_1 +271 0x1800 //RX_TDDRC_THRD_2 +272 0x1800 //RX_TDDRC_THRD_3 +273 0x3000 //RX_TDDRC_SLANT_0 +274 0x6E00 //RX_TDDRC_SLANT_1 +275 0x1000 //RX_TDDRC_ALPHA_UP_0 +276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x199A //RX_TDDRC_HMNC_GAIN +279 0x0001 //RX_TDDRC_SMT_FLAG +280 0x0CCD //RX_TDDRC_SMT_W +281 0x01E0 //RX_TDDRC_DRC_GAIN +282 0x7C00 //RX_LAMBDA_PKA_FP +283 0x2000 //RX_TPKA_FP +284 0x2000 //RX_MIN_G_FP +285 0x0080 //RX_MAX_G_FP +286 0x0100 //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 +288 0x0000 //RX_MAXLEVEL_CNG +289 0x3000 //RX_BWE_UV_TH +290 0x3000 //RX_BWE_UV_TH2 +291 0x1800 //RX_BWE_UV_TH3 +292 0x1000 //RX_BWE_V_TH +293 0x04CD //RX_BWE_GAIN1_V_TH1 +294 0x0F33 //RX_BWE_GAIN1_V_TH2 +295 0x7333 //RX_BWE_UV_EQ +296 0x199A //RX_BWE_V_EQ +297 0x7333 //RX_BWE_TONE_TH +298 0x0004 //RX_BWE_UV_HOLD_T +299 0x6CCD //RX_BWE_GAIN2_ALPHA +300 0x799A //RX_BWE_GAIN3_ALPHA +301 0x001E //RX_BWE_CUTOFF +302 0x3000 //RX_BWE_GAINFILL +303 0x3200 //RX_BWE_MAXTH_TONE +304 0x2000 //RX_BWE_EQ_0 +305 0x2000 //RX_BWE_EQ_1 +306 0x2000 //RX_BWE_EQ_2 +307 0x2000 //RX_BWE_EQ_3 +308 0x2000 //RX_BWE_EQ_4 +309 0x2000 //RX_BWE_EQ_5 +310 0x2000 //RX_BWE_EQ_6 +311 0x0000 //RX_BWE_RESRV_0 +312 0x0000 //RX_BWE_RESRV_1 +313 0x0000 //RX_BWE_RESRV_2 +#VOL 0 +163 0x1000 //RX_TDDRC_ALPHA_UP_1 +164 0x1000 //RX_TDDRC_ALPHA_UP_2 +165 0x1000 //RX_TDDRC_ALPHA_UP_3 +166 0x1000 //RX_TDDRC_ALPHA_UP_4 +184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +190 0x7000 //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +269 0x0000 //RX_TDDRC_THRD_0 +270 0x0000 //RX_TDDRC_THRD_1 +271 0x1800 //RX_TDDRC_THRD_2 +272 0x1800 //RX_TDDRC_THRD_3 +273 0x3000 //RX_TDDRC_SLANT_0 +274 0x6E00 //RX_TDDRC_SLANT_1 +275 0x1000 //RX_TDDRC_ALPHA_UP_0 +276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x199A //RX_TDDRC_HMNC_GAIN +279 0x0001 //RX_TDDRC_SMT_FLAG +280 0x0CCD //RX_TDDRC_SMT_W +281 0x01E0 //RX_TDDRC_DRC_GAIN +195 0x0030 //RX_FDEQ_SUBNUM +196 0x4848 //RX_FDEQ_GAIN_0 +197 0x4848 //RX_FDEQ_GAIN_1 +198 0x4844 //RX_FDEQ_GAIN_2 +199 0x4B4D //RX_FDEQ_GAIN_3 +200 0x4E50 //RX_FDEQ_GAIN_4 +201 0x5254 //RX_FDEQ_GAIN_5 +202 0x5658 //RX_FDEQ_GAIN_6 +203 0x5C60 //RX_FDEQ_GAIN_7 +204 0x6468 //RX_FDEQ_GAIN_8 +205 0x6C70 //RX_FDEQ_GAIN_9 +206 0x7474 //RX_FDEQ_GAIN_10 +207 0x7474 //RX_FDEQ_GAIN_11 +208 0x7474 //RX_FDEQ_GAIN_12 +209 0x7474 //RX_FDEQ_GAIN_13 +210 0x7474 //RX_FDEQ_GAIN_14 +211 0x7474 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0202 //RX_FDEQ_BIN_0 +221 0x0203 //RX_FDEQ_BIN_1 +222 0x0402 //RX_FDEQ_BIN_2 +223 0x0304 //RX_FDEQ_BIN_3 +224 0x0405 //RX_FDEQ_BIN_4 +225 0x0506 //RX_FDEQ_BIN_5 +226 0x0708 //RX_FDEQ_BIN_6 +227 0x090A //RX_FDEQ_BIN_7 +228 0x0B0C //RX_FDEQ_BIN_8 +229 0x0D0E //RX_FDEQ_BIN_9 +230 0x1214 //RX_FDEQ_BIN_10 +231 0x1E1E //RX_FDEQ_BIN_11 +232 0x1E1E //RX_FDEQ_BIN_12 +233 0x1E1E //RX_FDEQ_BIN_13 +234 0x1E1E //RX_FDEQ_BIN_14 +235 0x202C //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x4000 //RX_FDEQ_RESRV_0 +245 0x0320 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0030 //RX_FDDRC_BAND_MARGIN_1 +248 0x0050 //RX_FDDRC_BAND_MARGIN_2 +249 0x0080 //RX_FDDRC_BAND_MARGIN_3 +250 0x0007 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x5000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x6400 //RX_FDDRC_THRD_3_2 +258 0x6400 //RX_FDDRC_THRD_3_3 +259 0x2000 //RX_FDDRC_SLANT_0_0 +260 0x2000 //RX_FDDRC_SLANT_0_1 +261 0x2000 //RX_FDDRC_SLANT_0_2 +262 0x2000 //RX_FDDRC_SLANT_0_3 +263 0x5333 //RX_FDDRC_SLANT_1_0 +264 0x5333 //RX_FDDRC_SLANT_1_1 +265 0x5333 //RX_FDDRC_SLANT_1_2 +266 0x5333 //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +286 0x0100 //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 +#VOL 1 +163 0x1000 //RX_TDDRC_ALPHA_UP_1 +164 0x1000 //RX_TDDRC_ALPHA_UP_2 +165 0x1000 //RX_TDDRC_ALPHA_UP_3 +166 0x1000 //RX_TDDRC_ALPHA_UP_4 +184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +190 0x7000 //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +269 0x0000 //RX_TDDRC_THRD_0 +270 0x0000 //RX_TDDRC_THRD_1 +271 0x1800 //RX_TDDRC_THRD_2 +272 0x1800 //RX_TDDRC_THRD_3 +273 0x3000 //RX_TDDRC_SLANT_0 +274 0x6E00 //RX_TDDRC_SLANT_1 +275 0x1000 //RX_TDDRC_ALPHA_UP_0 +276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x199A //RX_TDDRC_HMNC_GAIN +279 0x0001 //RX_TDDRC_SMT_FLAG +280 0x0CCD //RX_TDDRC_SMT_W +281 0x01E0 //RX_TDDRC_DRC_GAIN +195 0x0030 //RX_FDEQ_SUBNUM +196 0x4848 //RX_FDEQ_GAIN_0 +197 0x4848 //RX_FDEQ_GAIN_1 +198 0x4844 //RX_FDEQ_GAIN_2 +199 0x4B4D //RX_FDEQ_GAIN_3 +200 0x4E50 //RX_FDEQ_GAIN_4 +201 0x5254 //RX_FDEQ_GAIN_5 +202 0x5658 //RX_FDEQ_GAIN_6 +203 0x5C60 //RX_FDEQ_GAIN_7 +204 0x6468 //RX_FDEQ_GAIN_8 +205 0x6C70 //RX_FDEQ_GAIN_9 +206 0x7474 //RX_FDEQ_GAIN_10 +207 0x7474 //RX_FDEQ_GAIN_11 +208 0x7474 //RX_FDEQ_GAIN_12 +209 0x7474 //RX_FDEQ_GAIN_13 +210 0x7474 //RX_FDEQ_GAIN_14 +211 0x7474 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0202 //RX_FDEQ_BIN_0 +221 0x0203 //RX_FDEQ_BIN_1 +222 0x0402 //RX_FDEQ_BIN_2 +223 0x0304 //RX_FDEQ_BIN_3 +224 0x0405 //RX_FDEQ_BIN_4 +225 0x0506 //RX_FDEQ_BIN_5 +226 0x0708 //RX_FDEQ_BIN_6 +227 0x090A //RX_FDEQ_BIN_7 +228 0x0B0C //RX_FDEQ_BIN_8 +229 0x0D0E //RX_FDEQ_BIN_9 +230 0x1214 //RX_FDEQ_BIN_10 +231 0x1E1E //RX_FDEQ_BIN_11 +232 0x1E1E //RX_FDEQ_BIN_12 +233 0x1E1E //RX_FDEQ_BIN_13 +234 0x1E1E //RX_FDEQ_BIN_14 +235 0x202C //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x4000 //RX_FDEQ_RESRV_0 +245 0x0320 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0030 //RX_FDDRC_BAND_MARGIN_1 +248 0x0050 //RX_FDDRC_BAND_MARGIN_2 +249 0x0080 //RX_FDDRC_BAND_MARGIN_3 +250 0x0007 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x5000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x6400 //RX_FDDRC_THRD_3_2 +258 0x6400 //RX_FDDRC_THRD_3_3 +259 0x2000 //RX_FDDRC_SLANT_0_0 +260 0x2000 //RX_FDDRC_SLANT_0_1 +261 0x2000 //RX_FDDRC_SLANT_0_2 +262 0x2000 //RX_FDDRC_SLANT_0_3 +263 0x5333 //RX_FDDRC_SLANT_1_0 +264 0x5333 //RX_FDDRC_SLANT_1_1 +265 0x5333 //RX_FDDRC_SLANT_1_2 +266 0x5333 //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +286 0x0100 //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 +#VOL 2 +163 0x1000 //RX_TDDRC_ALPHA_UP_1 +164 0x1000 //RX_TDDRC_ALPHA_UP_2 +165 0x1000 //RX_TDDRC_ALPHA_UP_3 +166 0x1000 //RX_TDDRC_ALPHA_UP_4 +184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +190 0x7000 //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +269 0x0000 //RX_TDDRC_THRD_0 +270 0x0000 //RX_TDDRC_THRD_1 +271 0x1800 //RX_TDDRC_THRD_2 +272 0x1800 //RX_TDDRC_THRD_3 +273 0x3000 //RX_TDDRC_SLANT_0 +274 0x6E00 //RX_TDDRC_SLANT_1 +275 0x1000 //RX_TDDRC_ALPHA_UP_0 +276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x199A //RX_TDDRC_HMNC_GAIN +279 0x0001 //RX_TDDRC_SMT_FLAG +280 0x0CCD //RX_TDDRC_SMT_W +281 0x01E0 //RX_TDDRC_DRC_GAIN +195 0x0030 //RX_FDEQ_SUBNUM +196 0x4848 //RX_FDEQ_GAIN_0 +197 0x4848 //RX_FDEQ_GAIN_1 +198 0x4844 //RX_FDEQ_GAIN_2 +199 0x4B4D //RX_FDEQ_GAIN_3 +200 0x4E50 //RX_FDEQ_GAIN_4 +201 0x5254 //RX_FDEQ_GAIN_5 +202 0x5658 //RX_FDEQ_GAIN_6 +203 0x5C60 //RX_FDEQ_GAIN_7 +204 0x6468 //RX_FDEQ_GAIN_8 +205 0x6C70 //RX_FDEQ_GAIN_9 +206 0x7474 //RX_FDEQ_GAIN_10 +207 0x7474 //RX_FDEQ_GAIN_11 +208 0x7474 //RX_FDEQ_GAIN_12 +209 0x7474 //RX_FDEQ_GAIN_13 +210 0x7474 //RX_FDEQ_GAIN_14 +211 0x7474 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0202 //RX_FDEQ_BIN_0 +221 0x0203 //RX_FDEQ_BIN_1 +222 0x0402 //RX_FDEQ_BIN_2 +223 0x0304 //RX_FDEQ_BIN_3 +224 0x0405 //RX_FDEQ_BIN_4 +225 0x0506 //RX_FDEQ_BIN_5 +226 0x0708 //RX_FDEQ_BIN_6 +227 0x090A //RX_FDEQ_BIN_7 +228 0x0B0C //RX_FDEQ_BIN_8 +229 0x0D0E //RX_FDEQ_BIN_9 +230 0x1214 //RX_FDEQ_BIN_10 +231 0x1E1E //RX_FDEQ_BIN_11 +232 0x1E1E //RX_FDEQ_BIN_12 +233 0x1E1E //RX_FDEQ_BIN_13 +234 0x1E1E //RX_FDEQ_BIN_14 +235 0x202C //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x4000 //RX_FDEQ_RESRV_0 +245 0x0320 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0030 //RX_FDDRC_BAND_MARGIN_1 +248 0x0050 //RX_FDDRC_BAND_MARGIN_2 +249 0x0080 //RX_FDDRC_BAND_MARGIN_3 +250 0x0007 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x5000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x6400 //RX_FDDRC_THRD_3_2 +258 0x6400 //RX_FDDRC_THRD_3_3 +259 0x2000 //RX_FDDRC_SLANT_0_0 +260 0x2000 //RX_FDDRC_SLANT_0_1 +261 0x2000 //RX_FDDRC_SLANT_0_2 +262 0x2000 //RX_FDDRC_SLANT_0_3 +263 0x5333 //RX_FDDRC_SLANT_1_0 +264 0x5333 //RX_FDDRC_SLANT_1_1 +265 0x5333 //RX_FDDRC_SLANT_1_2 +266 0x5333 //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +286 0x0100 //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 +#VOL 3 +163 0x1000 //RX_TDDRC_ALPHA_UP_1 +164 0x1000 //RX_TDDRC_ALPHA_UP_2 +165 0x1000 //RX_TDDRC_ALPHA_UP_3 +166 0x1000 //RX_TDDRC_ALPHA_UP_4 +184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +190 0x7000 //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +269 0x0000 //RX_TDDRC_THRD_0 +270 0x0000 //RX_TDDRC_THRD_1 +271 0x1800 //RX_TDDRC_THRD_2 +272 0x1800 //RX_TDDRC_THRD_3 +273 0x3000 //RX_TDDRC_SLANT_0 +274 0x6E00 //RX_TDDRC_SLANT_1 +275 0x1000 //RX_TDDRC_ALPHA_UP_0 +276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x199A //RX_TDDRC_HMNC_GAIN +279 0x0001 //RX_TDDRC_SMT_FLAG +280 0x0CCD //RX_TDDRC_SMT_W +281 0x01E0 //RX_TDDRC_DRC_GAIN +195 0x0030 //RX_FDEQ_SUBNUM +196 0x4848 //RX_FDEQ_GAIN_0 +197 0x4848 //RX_FDEQ_GAIN_1 +198 0x4844 //RX_FDEQ_GAIN_2 +199 0x4B4D //RX_FDEQ_GAIN_3 +200 0x4E50 //RX_FDEQ_GAIN_4 +201 0x5254 //RX_FDEQ_GAIN_5 +202 0x5658 //RX_FDEQ_GAIN_6 +203 0x5C60 //RX_FDEQ_GAIN_7 +204 0x6468 //RX_FDEQ_GAIN_8 +205 0x6C70 //RX_FDEQ_GAIN_9 +206 0x7474 //RX_FDEQ_GAIN_10 +207 0x7474 //RX_FDEQ_GAIN_11 +208 0x7474 //RX_FDEQ_GAIN_12 +209 0x7474 //RX_FDEQ_GAIN_13 +210 0x7474 //RX_FDEQ_GAIN_14 +211 0x7474 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0202 //RX_FDEQ_BIN_0 +221 0x0203 //RX_FDEQ_BIN_1 +222 0x0402 //RX_FDEQ_BIN_2 +223 0x0304 //RX_FDEQ_BIN_3 +224 0x0405 //RX_FDEQ_BIN_4 +225 0x0506 //RX_FDEQ_BIN_5 +226 0x0708 //RX_FDEQ_BIN_6 +227 0x090A //RX_FDEQ_BIN_7 +228 0x0B0C //RX_FDEQ_BIN_8 +229 0x0D0E //RX_FDEQ_BIN_9 +230 0x1214 //RX_FDEQ_BIN_10 +231 0x1E1E //RX_FDEQ_BIN_11 +232 0x1E1E //RX_FDEQ_BIN_12 +233 0x1E1E //RX_FDEQ_BIN_13 +234 0x1E1E //RX_FDEQ_BIN_14 +235 0x202C //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x4000 //RX_FDEQ_RESRV_0 +245 0x0320 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0030 //RX_FDDRC_BAND_MARGIN_1 +248 0x0050 //RX_FDDRC_BAND_MARGIN_2 +249 0x0080 //RX_FDDRC_BAND_MARGIN_3 +250 0x0007 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x5000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x6400 //RX_FDDRC_THRD_3_2 +258 0x6400 //RX_FDDRC_THRD_3_3 +259 0x2000 //RX_FDDRC_SLANT_0_0 +260 0x2000 //RX_FDDRC_SLANT_0_1 +261 0x2000 //RX_FDDRC_SLANT_0_2 +262 0x2000 //RX_FDDRC_SLANT_0_3 +263 0x5333 //RX_FDDRC_SLANT_1_0 +264 0x5333 //RX_FDDRC_SLANT_1_1 +265 0x5333 //RX_FDDRC_SLANT_1_2 +266 0x5333 //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +286 0x0100 //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 +#VOL 4 +163 0x1000 //RX_TDDRC_ALPHA_UP_1 +164 0x1000 //RX_TDDRC_ALPHA_UP_2 +165 0x1000 //RX_TDDRC_ALPHA_UP_3 +166 0x1000 //RX_TDDRC_ALPHA_UP_4 +184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +190 0x7000 //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +269 0x0000 //RX_TDDRC_THRD_0 +270 0x0000 //RX_TDDRC_THRD_1 +271 0x1800 //RX_TDDRC_THRD_2 +272 0x1800 //RX_TDDRC_THRD_3 +273 0x3000 //RX_TDDRC_SLANT_0 +274 0x6E00 //RX_TDDRC_SLANT_1 +275 0x1000 //RX_TDDRC_ALPHA_UP_0 +276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x199A //RX_TDDRC_HMNC_GAIN +279 0x0001 //RX_TDDRC_SMT_FLAG +280 0x0CCD //RX_TDDRC_SMT_W +281 0x01E0 //RX_TDDRC_DRC_GAIN +195 0x0030 //RX_FDEQ_SUBNUM +196 0x4848 //RX_FDEQ_GAIN_0 +197 0x4848 //RX_FDEQ_GAIN_1 +198 0x4844 //RX_FDEQ_GAIN_2 +199 0x4B4D //RX_FDEQ_GAIN_3 +200 0x4E50 //RX_FDEQ_GAIN_4 +201 0x5254 //RX_FDEQ_GAIN_5 +202 0x5658 //RX_FDEQ_GAIN_6 +203 0x5C60 //RX_FDEQ_GAIN_7 +204 0x6468 //RX_FDEQ_GAIN_8 +205 0x6C70 //RX_FDEQ_GAIN_9 +206 0x7474 //RX_FDEQ_GAIN_10 +207 0x7474 //RX_FDEQ_GAIN_11 +208 0x7474 //RX_FDEQ_GAIN_12 +209 0x7474 //RX_FDEQ_GAIN_13 +210 0x7474 //RX_FDEQ_GAIN_14 +211 0x7474 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0202 //RX_FDEQ_BIN_0 +221 0x0203 //RX_FDEQ_BIN_1 +222 0x0402 //RX_FDEQ_BIN_2 +223 0x0304 //RX_FDEQ_BIN_3 +224 0x0405 //RX_FDEQ_BIN_4 +225 0x0506 //RX_FDEQ_BIN_5 +226 0x0708 //RX_FDEQ_BIN_6 +227 0x090A //RX_FDEQ_BIN_7 +228 0x0B0C //RX_FDEQ_BIN_8 +229 0x0D0E //RX_FDEQ_BIN_9 +230 0x1214 //RX_FDEQ_BIN_10 +231 0x1E1E //RX_FDEQ_BIN_11 +232 0x1E1E //RX_FDEQ_BIN_12 +233 0x1E1E //RX_FDEQ_BIN_13 +234 0x1E1E //RX_FDEQ_BIN_14 +235 0x202C //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x4000 //RX_FDEQ_RESRV_0 +245 0x0320 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0030 //RX_FDDRC_BAND_MARGIN_1 +248 0x0050 //RX_FDDRC_BAND_MARGIN_2 +249 0x0080 //RX_FDDRC_BAND_MARGIN_3 +250 0x0007 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x5000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x6400 //RX_FDDRC_THRD_3_2 +258 0x6400 //RX_FDDRC_THRD_3_3 +259 0x2000 //RX_FDDRC_SLANT_0_0 +260 0x2000 //RX_FDDRC_SLANT_0_1 +261 0x2000 //RX_FDDRC_SLANT_0_2 +262 0x2000 //RX_FDDRC_SLANT_0_3 +263 0x5333 //RX_FDDRC_SLANT_1_0 +264 0x5333 //RX_FDDRC_SLANT_1_1 +265 0x5333 //RX_FDDRC_SLANT_1_2 +266 0x5333 //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +286 0x0100 //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 +#VOL 5 +163 0x1000 //RX_TDDRC_ALPHA_UP_1 +164 0x1000 //RX_TDDRC_ALPHA_UP_2 +165 0x1000 //RX_TDDRC_ALPHA_UP_3 +166 0x1000 //RX_TDDRC_ALPHA_UP_4 +184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +190 0x7000 //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +269 0x0000 //RX_TDDRC_THRD_0 +270 0x0000 //RX_TDDRC_THRD_1 +271 0x1800 //RX_TDDRC_THRD_2 +272 0x1800 //RX_TDDRC_THRD_3 +273 0x3000 //RX_TDDRC_SLANT_0 +274 0x6E00 //RX_TDDRC_SLANT_1 +275 0x1000 //RX_TDDRC_ALPHA_UP_0 +276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x199A //RX_TDDRC_HMNC_GAIN +279 0x0001 //RX_TDDRC_SMT_FLAG +280 0x0CCD //RX_TDDRC_SMT_W +281 0x01E0 //RX_TDDRC_DRC_GAIN +195 0x0030 //RX_FDEQ_SUBNUM +196 0x4848 //RX_FDEQ_GAIN_0 +197 0x4848 //RX_FDEQ_GAIN_1 +198 0x4844 //RX_FDEQ_GAIN_2 +199 0x4B4D //RX_FDEQ_GAIN_3 +200 0x4E50 //RX_FDEQ_GAIN_4 +201 0x5254 //RX_FDEQ_GAIN_5 +202 0x5658 //RX_FDEQ_GAIN_6 +203 0x5C60 //RX_FDEQ_GAIN_7 +204 0x6468 //RX_FDEQ_GAIN_8 +205 0x6C70 //RX_FDEQ_GAIN_9 +206 0x7474 //RX_FDEQ_GAIN_10 +207 0x7474 //RX_FDEQ_GAIN_11 +208 0x7474 //RX_FDEQ_GAIN_12 +209 0x7474 //RX_FDEQ_GAIN_13 +210 0x7474 //RX_FDEQ_GAIN_14 +211 0x7474 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0202 //RX_FDEQ_BIN_0 +221 0x0203 //RX_FDEQ_BIN_1 +222 0x0402 //RX_FDEQ_BIN_2 +223 0x0304 //RX_FDEQ_BIN_3 +224 0x0405 //RX_FDEQ_BIN_4 +225 0x0506 //RX_FDEQ_BIN_5 +226 0x0708 //RX_FDEQ_BIN_6 +227 0x090A //RX_FDEQ_BIN_7 +228 0x0B0C //RX_FDEQ_BIN_8 +229 0x0D0E //RX_FDEQ_BIN_9 +230 0x1214 //RX_FDEQ_BIN_10 +231 0x1E1E //RX_FDEQ_BIN_11 +232 0x1E1E //RX_FDEQ_BIN_12 +233 0x1E1E //RX_FDEQ_BIN_13 +234 0x1E1E //RX_FDEQ_BIN_14 +235 0x202C //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x4000 //RX_FDEQ_RESRV_0 +245 0x0320 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0030 //RX_FDDRC_BAND_MARGIN_1 +248 0x0050 //RX_FDDRC_BAND_MARGIN_2 +249 0x0080 //RX_FDDRC_BAND_MARGIN_3 +250 0x0007 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x5000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x6400 //RX_FDDRC_THRD_3_2 +258 0x6400 //RX_FDDRC_THRD_3_3 +259 0x2000 //RX_FDDRC_SLANT_0_0 +260 0x2000 //RX_FDDRC_SLANT_0_1 +261 0x2000 //RX_FDDRC_SLANT_0_2 +262 0x2000 //RX_FDDRC_SLANT_0_3 +263 0x5333 //RX_FDDRC_SLANT_1_0 +264 0x5333 //RX_FDDRC_SLANT_1_1 +265 0x5333 //RX_FDDRC_SLANT_1_2 +266 0x5333 //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +286 0x0100 //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 +#VOL 6 +163 0x1000 //RX_TDDRC_ALPHA_UP_1 +164 0x1000 //RX_TDDRC_ALPHA_UP_2 +165 0x1000 //RX_TDDRC_ALPHA_UP_3 +166 0x1000 //RX_TDDRC_ALPHA_UP_4 +184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +190 0x7000 //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +269 0x0000 //RX_TDDRC_THRD_0 +270 0x0000 //RX_TDDRC_THRD_1 +271 0x1800 //RX_TDDRC_THRD_2 +272 0x1800 //RX_TDDRC_THRD_3 +273 0x3000 //RX_TDDRC_SLANT_0 +274 0x6E00 //RX_TDDRC_SLANT_1 +275 0x1000 //RX_TDDRC_ALPHA_UP_0 +276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x199A //RX_TDDRC_HMNC_GAIN +279 0x0001 //RX_TDDRC_SMT_FLAG +280 0x0CCD //RX_TDDRC_SMT_W +281 0x01E0 //RX_TDDRC_DRC_GAIN +195 0x0030 //RX_FDEQ_SUBNUM +196 0x4848 //RX_FDEQ_GAIN_0 +197 0x4848 //RX_FDEQ_GAIN_1 +198 0x4844 //RX_FDEQ_GAIN_2 +199 0x4B4D //RX_FDEQ_GAIN_3 +200 0x4E50 //RX_FDEQ_GAIN_4 +201 0x5254 //RX_FDEQ_GAIN_5 +202 0x5658 //RX_FDEQ_GAIN_6 +203 0x5C60 //RX_FDEQ_GAIN_7 +204 0x6468 //RX_FDEQ_GAIN_8 +205 0x6C70 //RX_FDEQ_GAIN_9 +206 0x7474 //RX_FDEQ_GAIN_10 +207 0x7474 //RX_FDEQ_GAIN_11 +208 0x7474 //RX_FDEQ_GAIN_12 +209 0x7474 //RX_FDEQ_GAIN_13 +210 0x7474 //RX_FDEQ_GAIN_14 +211 0x7474 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0202 //RX_FDEQ_BIN_0 +221 0x0203 //RX_FDEQ_BIN_1 +222 0x0402 //RX_FDEQ_BIN_2 +223 0x0304 //RX_FDEQ_BIN_3 +224 0x0405 //RX_FDEQ_BIN_4 +225 0x0506 //RX_FDEQ_BIN_5 +226 0x0708 //RX_FDEQ_BIN_6 +227 0x090A //RX_FDEQ_BIN_7 +228 0x0B0C //RX_FDEQ_BIN_8 +229 0x0D0E //RX_FDEQ_BIN_9 +230 0x1214 //RX_FDEQ_BIN_10 +231 0x1E1E //RX_FDEQ_BIN_11 +232 0x1E1E //RX_FDEQ_BIN_12 +233 0x1E1E //RX_FDEQ_BIN_13 +234 0x1E1E //RX_FDEQ_BIN_14 +235 0x202C //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x4000 //RX_FDEQ_RESRV_0 +245 0x0320 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0030 //RX_FDDRC_BAND_MARGIN_1 +248 0x0050 //RX_FDDRC_BAND_MARGIN_2 +249 0x0080 //RX_FDDRC_BAND_MARGIN_3 +250 0x0007 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x5000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x6400 //RX_FDDRC_THRD_3_2 +258 0x6400 //RX_FDDRC_THRD_3_3 +259 0x2000 //RX_FDDRC_SLANT_0_0 +260 0x2000 //RX_FDDRC_SLANT_0_1 +261 0x2000 //RX_FDDRC_SLANT_0_2 +262 0x2000 //RX_FDDRC_SLANT_0_3 +263 0x5333 //RX_FDDRC_SLANT_1_0 +264 0x5333 //RX_FDDRC_SLANT_1_1 +265 0x5333 //RX_FDDRC_SLANT_1_2 +266 0x5333 //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +286 0x0100 //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 + +#CASE_NAME HANDSET-HANDSET-RESERVE2-SWB +#PARAM_MODE Full +#PARAM_TYPE TX+2RX +#TOTAL_CUSTOM_STEP 7+7 +#TX +0 0x0000 //TX_OPERATION_MODE_0 +1 0x0000 //TX_OPERATION_MODE_1 +2 0x0076 //TX_PATCH_REG +3 0x6F7E //TX_SENDFUNC_MODE_0 +4 0x0001 //TX_SENDFUNC_MODE_1 +5 0x0002 //TX_NUM_MIC +6 0x0003 //TX_SAMPLINGFREQ_SIG +7 0x0003 //TX_SAMPLINGFREQ_PROC +8 0x000A //TX_FRAME_SZ_SIG +9 0x000A //TX_FRAME_SZ +10 0x0000 //TX_DELAY_OPT +11 0x0028 //TX_MAX_TAIL_LENGTH +12 0x0001 //TX_NUM_LOUTCHN +13 0x0001 //TX_MAXNUM_AECREF +14 0x0000 //TX_DBG_FUNC_REG +15 0x0000 //TX_DBG_FUNC_REG1 +16 0x0000 //TX_SYS_RESRV_0 +17 0x0000 //TX_SYS_RESRV_1 +18 0x0000 //TX_SYS_RESRV_2 +19 0x0000 //TX_SYS_RESRV_3 +20 0x0000 //TX_DIST2REF0 +21 0x00A3 //TX_DIST2REF1 +22 0x0000 //TX_DIST2REF_02 +23 0x0000 //TX_DIST2REF_03 +24 0x0000 //TX_DIST2REF_04 +25 0x0000 //TX_DIST2REF_05 +26 0x0000 //TX_MMIC +27 0x1000 //TX_PGA_0 +28 0x1000 //TX_PGA_1 +29 0x1000 //TX_PGA_2 +30 0x0000 //TX_PGA_3 +31 0x0000 //TX_PGA_4 +32 0x0000 //TX_PGA_5 +33 0x0000 //TX_MIC_PAIRS +34 0x0000 //TX_MIC_PAIRS_HS +35 0x0002 //TX_MICS_FOR_BF +36 0x0000 //TX_MIC_PAIRS_FORL1 +37 0x0002 //TX_MICS_OF_PAIR0 +38 0x0002 //TX_MICS_OF_PAIR1 +39 0x0002 //TX_MICS_OF_PAIR2 +40 0x0002 //TX_MICS_OF_PAIR3 +41 0x0000 //TX_MIC_DATA_SRC0 +42 0x0002 //TX_MIC_DATA_SRC1 +43 0x0001 //TX_MIC_DATA_SRC2 +44 0x0000 //TX_MIC_DATA_SRC3 +45 0x0000 //TX_MIC_PAIR_CH_04 +46 0x0000 //TX_MIC_PAIR_CH_05 +47 0x0000 //TX_MIC_PAIR_CH_10 +48 0x0000 //TX_MIC_PAIR_CH_11 +49 0x0000 //TX_MIC_PAIR_CH_12 +50 0x0000 //TX_MIC_PAIR_CH_13 +51 0x0000 //TX_MIC_PAIR_CH_14 +52 0x05DC //TX_HD_BIN_MASK +53 0x0010 //TX_HD_SUBAND_MASK +54 0x19A1 //TX_HD_FRAME_AVG_MASK +55 0x0320 //TX_HD_MIN_FRQ +56 0x1000 //TX_HD_ALPHA_PSD +57 0x1100 //TX_T_PHPR1 +58 0x0000 //TX_T_PHPR2 +59 0x0000 //TX_T_PTPR +60 0x0000 //TX_T_PNPR +61 0x0000 //TX_T_PAPR1 +62 0xEE6C //TX_T_PSDVAT +63 0x0800 //TX_CNT +64 0x4000 //TX_ANTI_HOWL_GAIN +65 0x0001 //TX_MICFORBFMARK_0 +66 0x0001 //TX_MICFORBFMARK_1 +67 0x0001 //TX_MICFORBFMARK_2 +68 0x0001 //TX_MICFORBFMARK_3 +69 0x0001 //TX_MICFORBFMARK_4 +70 0x0001 //TX_MICFORBFMARK_5 +71 0x0000 //TX_DIST2REF_10 +72 0x3A66 //TX_DIST2REF_11 +73 0x0000 //TX_DIST2REF2 +74 0x0000 //TX_DIST2REF_13 +75 0x0000 //TX_DIST2REF_14 +76 0x0000 //TX_DIST2REF_15 +77 0x0000 //TX_DIST2REF_20 +78 0x0000 //TX_DIST2REF_21 +79 0x0000 //TX_DIST2REF_22 +80 0x0000 //TX_DIST2REF_23 +81 0x0000 //TX_DIST2REF_24 +82 0x0000 //TX_DIST2REF_25 +83 0x0000 //TX_DIST2REF_30 +84 0x0000 //TX_DIST2REF_31 +85 0x0000 //TX_DIST2REF_32 +86 0x0000 //TX_DIST2REF_33 +87 0x0000 //TX_DIST2REF_34 +88 0x0000 //TX_DIST2REF_35 +89 0x0000 //TX_MIC_LOC_00 +90 0x0000 //TX_MIC_LOC_01 +91 0x0000 //TX_MIC_LOC_02 +92 0x0000 //TX_MIC_LOC_03 +93 0x0000 //TX_MIC_LOC_04 +94 0x0000 //TX_MIC_LOC_05 +95 0x0000 //TX_MIC_LOC_10 +96 0x0000 //TX_MIC_LOC_11 +97 0x0000 //TX_MIC_LOC_12 +98 0x0000 //TX_MIC_LOC_13 +99 0x0000 //TX_MIC_LOC_14 +100 0x0000 //TX_MIC_LOC_15 +101 0x0000 //TX_MIC_LOC_20 +102 0x0000 //TX_MIC_LOC_21 +103 0x0000 //TX_MIC_LOC_22 +104 0x0000 //TX_MIC_LOC_23 +105 0x0000 //TX_MIC_LOC_24 +106 0x0000 //TX_MIC_LOC_25 +107 0x0200 //TX_MIC_REFBLK_VOLUME +108 0x0AAC //TX_MIC_BLOCK_VOLUME +109 0x0000 //TX_INVERSE_MASK +110 0x0000 //TX_ADCS_MASK +111 0x04D0 //TX_ADCS_GAIN +112 0x4000 //TX_NFC_GAINFAC +113 0x0000 //TX_MAINMIC_BLKFACTOR +114 0x0000 //TX_REFMIC_BLKFACTOR +115 0x0000 //TX_BLMIC_BLKFACTOR +116 0x0000 //TX_BRMIC_BLKFACTOR +117 0x0031 //TX_MICBLK_START_BIN +118 0x0060 //TX_MICBLK_END_BIN +119 0x0015 //TX_MICBLK_FE_HOLD +120 0xFFF2 //TX_MICBLK_MR_EXP_TH +121 0xFFF2 //TX_MICBLK_LR_EXP_TH +122 0x0000 //TX_FENE_HOLD +123 0x4000 //TX_FE_ENER_TH_MTS +124 0x0004 //TX_FE_ENER_TH_EXP +125 0x6000 //TX_C_POST_FLT_MIC_MAINBLK +126 0x6000 //TX_C_POST_FLT_MIC_REFBLK +127 0x0010 //TX_MIC_BLOCK_N +128 0x7E56 //TX_A_HP +129 0x4000 //TX_B_PE +130 0x1800 //TX_THR_PITCH_DET_0 +131 0x1000 //TX_THR_PITCH_DET_1 +132 0x0800 //TX_THR_PITCH_DET_2 +133 0x0008 //TX_PITCH_BFR_LEN +134 0x0003 //TX_SBD_PITCH_DET +135 0x0050 //TX_TD_AEC_L +136 0x4000 //TX_MU0_UNP_TD_AEC +137 0x1000 //TX_MU0_PTD_TD_AEC +138 0x0000 //TX_PP_RESRV_0 +139 0x2A94 //TX_PP_RESRV_1 +140 0x55F0 //TX_PP_RESRV_2 +141 0x0000 //TX_PP_RESRV_3 +142 0x0000 //TX_PP_RESRV_4 +143 0x0000 //TX_PP_RESRV_5 +144 0x0000 //TX_PP_RESRV_6 +145 0x0000 //TX_PP_RESRV_7 +146 0x0028 //TX_TAIL_LENGTH +147 0x0080 //TX_AEC_REF_GAIN_0 +148 0x0800 //TX_AEC_REF_GAIN_1 +149 0x0800 //TX_AEC_REF_GAIN_2 +150 0x7900 //TX_EAD_THR +151 0x2000 //TX_THR_RE_EST +152 0x0400 //TX_MIN_EQ_RE_EST_0 +153 0x0400 //TX_MIN_EQ_RE_EST_1 +154 0x0800 //TX_MIN_EQ_RE_EST_2 +155 0x0800 //TX_MIN_EQ_RE_EST_3 +156 0x1000 //TX_MIN_EQ_RE_EST_4 +157 0x1000 //TX_MIN_EQ_RE_EST_5 +158 0x1000 //TX_MIN_EQ_RE_EST_6 +159 0x1000 //TX_MIN_EQ_RE_EST_7 +160 0x1000 //TX_MIN_EQ_RE_EST_8 +161 0x1000 //TX_MIN_EQ_RE_EST_9 +162 0x1000 //TX_MIN_EQ_RE_EST_10 +163 0x1000 //TX_MIN_EQ_RE_EST_11 +164 0x1000 //TX_MIN_EQ_RE_EST_12 +165 0x3000 //TX_LAMBDA_RE_EST +166 0x1000 //TX_LAMBDA_CB_NLE +167 0x1800 //TX_C_POST_FLT +168 0x4000 //TX_GAIN_NP +169 0x003C //TX_SE_HOLD_N +170 0x0046 //TX_DT_HOLD_N +171 0x03E8 //TX_DT2_HOLD_N +172 0x6666 //TX_AEC_RESRV_0 +173 0x0000 //TX_AEC_RESRV_1 +174 0x0014 //TX_AEC_RESRV_2 +175 0x0000 //TX_MIC_DELAY_LENGTH +176 0x0000 //TX_REF_DELAY_LENGTH +177 0x0000 //TX_ADD_LINEIN_GAINL +178 0x0000 //TX_ADD_LINEIN_GAINH +179 0x0000 //TX_MIN_EQ_RE_EST_14 +180 0x0000 //TX_DTD_THR1_8 +181 0x7FFF //TX_DTD_THR2_8 +182 0x0000 //TX_DTD_MIC_BLK2 +183 0x0008 //TX_FRQ_LIN_LEN +184 0x7FFF //TX_FRQ_AEC_LEN_RHO +185 0x6000 //TX_MU0_UNP_FRQ_AEC +186 0x4000 //TX_MU0_PTD_FRQ_AEC +187 0x000A //TX_MINENOISETH +188 0x0800 //TX_MU0_RE_EST +189 0x0001 //TX_AEC_NUM_CH +190 0x0000 //TX_BIGECHOATTENUATION_MAX +191 0x2000 //TX_A_POST_FLT_MICBLK +192 0x0000 //TX_BLKENERTH +193 0x0000 //TX_BLKENERHIGHTH +194 0x0000 //TX_NORMENERTH +195 0x0000 //TX_NORMENERHIGHTH +196 0x0000 //TX_NORMENERHIGHTHL +197 0x7000 //TX_DTD_THR1_0 +198 0x7000 //TX_DTD_THR1_1 +199 0x7000 //TX_DTD_THR1_2 +200 0x7F00 //TX_DTD_THR1_3 +201 0x7F00 //TX_DTD_THR1_4 +202 0x7F00 //TX_DTD_THR1_5 +203 0x7F00 //TX_DTD_THR1_6 +204 0x2000 //TX_DTD_THR2_0 +205 0x2000 //TX_DTD_THR2_1 +206 0x2000 //TX_DTD_THR2_2 +207 0x1000 //TX_DTD_THR2_3 +208 0x1000 //TX_DTD_THR2_4 +209 0x1000 //TX_DTD_THR2_5 +210 0x1000 //TX_DTD_THR2_6 +211 0x6000 //TX_DTD_THR3 +212 0x0177 //TX_SPK_CUT_K +213 0x1B58 //TX_DT_CUT_K +214 0x0100 //TX_DT_CUT_THR +215 0x04EB //TX_COMFORT_G +216 0x01F4 //TX_POWER_YOUT_TH +217 0x4000 //TX_FDPFGAINECHO +218 0x0000 //TX_DTD_HD_THR +219 0x0000 //TX_SPK_CUT_K_S +220 0x0000 //TX_DTD_MIC_BLK +221 0x0400 //TX_ADPT_STRICT_L +222 0x0200 //TX_ADPT_STRICT_H +223 0x0C00 //TX_RATIO_DT_L_TH_LOW +224 0x2000 //TX_RATIO_DT_H_TH_LOW +225 0x1800 //TX_RATIO_DT_L_TH_HIGH +226 0x3000 //TX_RATIO_DT_H_TH_HIGH +227 0x0A00 //TX_RATIO_DT_L0_TH +228 0x7000 //TX_B_POST_FILT_ECHO_L +229 0x7FFF //TX_B_POST_FILT_ECHO_H +230 0x0200 //TX_MIN_G_CTRL_ECHO +231 0x7FFF //TX_B_LESSCUT_RTO_ECHO +232 0x0000 //TX_EPD_OFFSET_00 +233 0x0000 //TX_EPD_OFFST_01 +234 0x1388 //TX_RATIO_DT_L0_TH_HIGH +235 0x3A98 //TX_RATIO_DT_H_TH_CUT +236 0x7FFF //TX_MIN_EQ_RE_EST_13 +237 0x0000 //TX_DTD_THR1_7 +238 0x0000 //TX_DTD_THR2_7 +239 0x0800 //TX_DT_RESRV_7 +240 0x0800 //TX_DT_RESRV_8 +241 0x0000 //TX_DT_RESRV_9 +242 0xF600 //TX_THR_SN_EST_0 +243 0xFA00 //TX_THR_SN_EST_1 +244 0xFA00 //TX_THR_SN_EST_2 +245 0xF800 //TX_THR_SN_EST_3 +246 0xF800 //TX_THR_SN_EST_4 +247 0xF800 //TX_THR_SN_EST_5 +248 0xF800 //TX_THR_SN_EST_6 +249 0xF700 //TX_THR_SN_EST_7 +250 0x0000 //TX_DELTA_THR_SN_EST_0 +251 0x0200 //TX_DELTA_THR_SN_EST_1 +252 0x0200 //TX_DELTA_THR_SN_EST_2 +253 0x0200 //TX_DELTA_THR_SN_EST_3 +254 0x0100 //TX_DELTA_THR_SN_EST_4 +255 0x0200 //TX_DELTA_THR_SN_EST_5 +256 0x0100 //TX_DELTA_THR_SN_EST_6 +257 0x0200 //TX_DELTA_THR_SN_EST_7 +258 0x4000 //TX_LAMBDA_NN_EST_0 +259 0x4000 //TX_LAMBDA_NN_EST_1 +260 0x4000 //TX_LAMBDA_NN_EST_2 +261 0x4000 //TX_LAMBDA_NN_EST_3 +262 0x4000 //TX_LAMBDA_NN_EST_4 +263 0x4000 //TX_LAMBDA_NN_EST_5 +264 0x4000 //TX_LAMBDA_NN_EST_6 +265 0x4000 //TX_LAMBDA_NN_EST_7 +266 0x0400 //TX_N_SN_EST +267 0x001E //TX_INBEAM_T +268 0x0041 //TX_INBEAMHOLDT +269 0x2000 //TX_G_STRICT +270 0x2000 //TX_EQ_THR_BF +271 0x799A //TX_LAMBDA_EQ_BF +272 0x1000 //TX_NE_RTO_TH +273 0x1000 //TX_NE_RTO_TH_L +274 0x1000 //TX_MAINREFRTOH_TH_H +275 0x0600 //TX_MAINREFRTOH_TH_L +276 0x2000 //TX_MAINREFRTO_TH_H +277 0x1400 //TX_MAINREFRTO_TH_L +278 0x0000 //TX_MAINREFRTO_TH_EQ +279 0x1000 //TX_B_POST_FLT_0 +280 0x1000 //TX_B_POST_FLT_1 +281 0x0014 //TX_NS_LVL_CTRL_0 +282 0x002C //TX_NS_LVL_CTRL_1 +283 0x0016 //TX_NS_LVL_CTRL_2 +284 0x0018 //TX_NS_LVL_CTRL_3 +285 0x0016 //TX_NS_LVL_CTRL_4 +286 0x0012 //TX_NS_LVL_CTRL_5 +287 0x0016 //TX_NS_LVL_CTRL_6 +288 0x0017 //TX_NS_LVL_CTRL_7 +289 0x000E //TX_MIN_GAIN_S_0 +290 0x000D //TX_MIN_GAIN_S_1 +291 0x0012 //TX_MIN_GAIN_S_2 +292 0x0010 //TX_MIN_GAIN_S_3 +293 0x0012 //TX_MIN_GAIN_S_4 +294 0x0012 //TX_MIN_GAIN_S_5 +295 0x0012 //TX_MIN_GAIN_S_6 +296 0x0012 //TX_MIN_GAIN_S_7 +297 0x6000 //TX_NMOS_SUP +298 0x0000 //TX_NS_MAX_PRI_SNR_TH +299 0x0000 //TX_NMOS_SUP_MENSA +300 0x7FFF //TX_SNRI_SUP_0 +301 0x6000 //TX_SNRI_SUP_1 +302 0x6000 //TX_SNRI_SUP_2 +303 0x6000 //TX_SNRI_SUP_3 +304 0x6000 //TX_SNRI_SUP_4 +305 0x6000 //TX_SNRI_SUP_5 +306 0x6000 //TX_SNRI_SUP_6 +307 0x6000 //TX_SNRI_SUP_7 +308 0x6000 //TX_THR_LFNS +309 0x0017 //TX_G_LFNS +310 0x09C4 //TX_GAIN0_NTH +311 0x000A //TX_MUSIC_MORENS +312 0x7FFF //TX_A_POST_FILT_0 +313 0x2000 //TX_A_POST_FILT_1 +314 0x4000 //TX_A_POST_FILT_S_0 +315 0x4000 //TX_A_POST_FILT_S_1 +316 0x4000 //TX_A_POST_FILT_S_2 +317 0x4000 //TX_A_POST_FILT_S_3 +318 0x4000 //TX_A_POST_FILT_S_4 +319 0x4000 //TX_A_POST_FILT_S_5 +320 0x5000 //TX_A_POST_FILT_S_6 +321 0x7000 //TX_A_POST_FILT_S_7 +322 0x1000 //TX_B_POST_FILT_0 +323 0x1000 //TX_B_POST_FILT_1 +324 0x2000 //TX_B_POST_FILT_2 +325 0x2000 //TX_B_POST_FILT_3 +326 0x2000 //TX_B_POST_FILT_4 +327 0x1000 //TX_B_POST_FILT_5 +328 0x3000 //TX_B_POST_FILT_6 +329 0x3000 //TX_B_POST_FILT_7 +330 0x1000 //TX_B_LESSCUT_RTO_S_0 +331 0x1000 //TX_B_LESSCUT_RTO_S_1 +332 0x1000 //TX_B_LESSCUT_RTO_S_2 +333 0x1000 //TX_B_LESSCUT_RTO_S_3 +334 0x1000 //TX_B_LESSCUT_RTO_S_4 +335 0x1000 //TX_B_LESSCUT_RTO_S_5 +336 0x1000 //TX_B_LESSCUT_RTO_S_6 +337 0x1000 //TX_B_LESSCUT_RTO_S_7 +338 0x7E14 //TX_LAMBDA_PFILT +339 0x7C29 //TX_LAMBDA_PFILT_S_0 +340 0x7C29 //TX_LAMBDA_PFILT_S_1 +341 0x7C29 //TX_LAMBDA_PFILT_S_2 +342 0x7C29 //TX_LAMBDA_PFILT_S_3 +343 0x7C29 //TX_LAMBDA_PFILT_S_4 +344 0x7C29 //TX_LAMBDA_PFILT_S_5 +345 0x7C29 //TX_LAMBDA_PFILT_S_6 +346 0x7C29 //TX_LAMBDA_PFILT_S_7 +347 0x07D0 //TX_K_PEPPER +348 0x0800 //TX_A_PEPPER +349 0x1D4C //TX_K_PEPPER_HF +350 0x0400 //TX_A_PEPPER_HF +351 0x0001 //TX_HMNC_BST_FLG +352 0x4000 //TX_HMNC_BST_THR +353 0x0800 //TX_DT_BINVAD_TH_0 +354 0x0800 //TX_DT_BINVAD_TH_1 +355 0x0800 //TX_DT_BINVAD_TH_2 +356 0x0800 //TX_DT_BINVAD_TH_3 +357 0x0000 //TX_DT_BINVAD_ENDF +358 0x1000 //TX_C_POST_FLT_DT +359 0x7FFF //TX_NS_B_POST_FLT_LESSCUT +360 0x0100 //TX_DT_BOOST +361 0x0000 //TX_BF_SGRAD_FLG +362 0x0005 //TX_BF_DVG_TH +363 0x001E //TX_SN_C_F +364 0x0000 //TX_K_APT +365 0x0001 //TX_NOISEDET +366 0x0190 //TX_NDETCT +367 0x000A //TX_NOISE_TH_0 +368 0x7FFF //TX_NOISE_TH_0_2 +369 0x7FFF //TX_NOISE_TH_0_3 +370 0x00C6 //TX_NOISE_TH_1 +371 0x0DAC //TX_NOISE_TH_2 +372 0x2260 //TX_NOISE_TH_3 +373 0x7080 //TX_NOISE_TH_4 +374 0x57E4 //TX_NOISE_TH_5 +375 0x4BD6 //TX_NOISE_TH_5_2 +376 0x0001 //TX_NOISE_TH_5_3 +377 0x4E20 //TX_NOISE_TH_5_4 +378 0x1194 //TX_NOISE_TH_6 +379 0x0014 //TX_MINENOISE_TH +380 0xD508 //TX_MORENS_TFMASK_TH +381 0x0001 //TX_DRC_QUIET_FLOOR +382 0x6D60 //TX_RATIODTL_CUT_TH +383 0x0DAC //TX_DT_CUT_K1 +384 0x00A5 //TX_OUT_ENER_S_TH_CLEAN +385 0x00A5 //TX_OUT_ENER_S_TH_LESSCLEAN +386 0x00A5 //TX_OUT_ENER_S_TH_NOISY +387 0x0029 //TX_OUT_ENER_TH_NOISE +388 0x0200 //TX_OUT_ENER_TH_SPEECH +389 0x2000 //TX_SN_NPB_GAIN +390 0x0000 //TX_NN_NPB_GAIN +391 0x3000 //TX_POST_MASK_SUP_HSNE +392 0x07D0 //TX_TAIL_DET_TH +393 0x4000 //TX_B_LESSCUT_RTO_WTA +394 0x0000 //TX_MEL_G_R +395 0x0080 //TX_SUPHIGH_TH +396 0x0000 //TX_MASK_G_R +397 0x0002 //TX_EXTRA_NS_L +398 0x1800 //TX_C_POST_FLT_MASK +399 0x7FFF //TX_A_POST_FLT_WNS +400 0x0148 //TX_MIN_G_LOW300HZ +401 0x0004 //TX_MAXLEVEL_CNG +402 0x00B4 //TX_STN_NOISE_TH +403 0x4000 //TX_POST_MASK_SUP +404 0x7FFF //TX_POST_MASK_ADJUST +405 0x00C8 //TX_NS_ENOISE_MIC0_TH +406 0x0014 //TX_MINENOISE_MIC0_TH +407 0x012C //TX_MINENOISE_MIC0_S_TH +408 0x2900 //TX_MIN_G_CTRL_SSNS +409 0x0800 //TX_METAL_RTO_THR +410 0x0FA0 //TX_NS_FP_K_METAL +411 0x3A98 //TX_NOISEDET_BOOST_TH +412 0x0FA0 //TX_NSMOOTH_TH +413 0x0000 //TX_NS_RESRV_8 +414 0x1800 //TX_RHO_UPB +415 0x2328 //TX_N_HOLD_HS +416 0x006E //TX_N_RHO_BFR0 +417 0x7FFF //TX_LAMBDA_ARSP_EST +418 0x0100 //TX_EXTRA_GAIN_MICBLOCK +419 0x0333 //TX_THR_STD_NSR +420 0x019A //TX_THR_STD_PLH +421 0x03E8 //TX_N_HOLD_STD +422 0x0066 //TX_THR_STD_RHO +423 0x2800 //TX_BF_RESET_THR_HS +424 0x0CCD //TX_SB_RTO_MEAN_TH +425 0x0300 //TX_SB_RHO_MEAN_TH_NTALK +426 0x2000 //TX_SB_RTO_MEAN_TH_ABN +427 0x2EE0 //TX_SB_RTO_MEAN_TH_RUB +428 0x0990 //TX_WTA_EN_RTO_TH +429 0x1400 //TX_TOP_ENER_TH_F +430 0x0100 //TX_DESIRED_TALK_HOLDT +431 0x0800 //TX_MIC_BLOCK_FACTOR +432 0x0000 //TX_NSEST_BFRLRNRDC +433 0x0000 //TX_THR_POST_FLT_HS +434 0x0010 //TX_HS_VAD_BIN +435 0x2666 //TX_THR_VAD_HS +436 0x2CCD //TX_MEAN_RTO_MIN_TH2 +437 0x0032 //TX_SILENCE_T +438 0x0000 //TX_A_POST_FLT_WTA +439 0x799A //TX_LAMBDA_PFLT_WTA +440 0x051E //TX_SB_RHO_MEAN2_TH +441 0x02F0 //TX_SB_RHO_MEAN3_TH +442 0x0000 //TX_HS_RESRV_4 +443 0x0000 //TX_HS_RESRV_5 +444 0x0001 //TX_DOA_VAD_THR_1 +445 0x003C //TX_DOA_VAD_THR_2 +446 0x0028 //TX_DOA_VAD_THR1_0 +447 0x0028 //TX_DOA_VAD_THR1_1 +448 0x0000 //TX_SRC_DOA_RNG_LOW_0A +449 0x001E //TX_SRC_DOA_RNG_HIGH_0A +450 0x005A //TX_DFLT_SRC_DOA_0A +451 0x0000 //TX_SRC_DOA_RNG_LOW_0B +452 0x0000 //TX_SRC_DOA_RNG_HIGH_0B +453 0x0000 //TX_DFLT_SRC_DOA_0B +454 0x0000 //TX_SRC_DOA_RNG_LOW_0C +455 0x0000 //TX_SRC_DOA_RNG_HIGH_0C +456 0x0000 //TX_DFLT_SRC_DOA_0C +457 0x0000 //TX_SRC_DOA_RNG_LOW_0D +458 0x0000 //TX_SRC_DOA_RNG_HIGH_0D +459 0x0000 //TX_DFLT_SRC_DOA_0D +460 0x0000 //TX_SRC_DOA_RNG_LOW_1A +461 0x00B4 //TX_SRC_DOA_RNG_HIGH_1A +462 0x005A //TX_DFLT_SRC_DOA_1A +463 0x0000 //TX_SRC_DOA_RNG_LOW_1B +464 0x00B4 //TX_SRC_DOA_RNG_HIGH_1B +465 0x005A //TX_DFLT_SRC_DOA_1B +466 0x0000 //TX_SRC_DOA_RNG_LOW_1C +467 0x00B4 //TX_SRC_DOA_RNG_HIGH_1C +468 0x005A //TX_DFLT_SRC_DOA_1C +469 0x0000 //TX_SRC_DOA_RNG_LOW_1D +470 0x00B4 //TX_SRC_DOA_RNG_HIGH_1D +471 0x005A //TX_DFLT_SRC_DOA_1D +472 0x0100 //TX_BF_HOLDOFF_T +473 0x7FFF //TX_DOA_COST_FACTOR +474 0x0D9A //TX_MAINTOREFR_TH0 +475 0x071C //TX_DOA_TRK_THR +476 0x012C //TX_DOA_TRACK_HT +477 0x0200 //TX_N1_HOLD_HF +478 0x0100 //TX_N2_HOLD_HF +479 0x2A3D //TX_BF_RESET_THR_HF +480 0x7333 //TX_DOA_SMOOTH +481 0x0800 //TX_MU_BF +482 0x0800 //TX_BF_MU_LF_B2 +483 0x0040 //TX_BF_FC_END_BIN_B2 +484 0x0020 //TX_BF_FC_END_BIN +485 0x0000 //TX_HF_RESRV_25 +486 0x0000 //TX_HF_RESRV_26 +487 0x0007 //TX_N_DOA_SEED +488 0x0001 //TX_FINE_DOA_SEARCH_FLG +489 0x0000 //TX_HF_RESRV_27 +490 0x038E //TX_DLT_SRC_DOA_RNG +491 0x0200 //TX_BF_MU_LF +492 0x0000 //TX_DFLT_SRC_LOC_0 +493 0x7FFF //TX_DFLT_SRC_LOC_1 +494 0x0000 //TX_DFLT_SRC_LOC_2 +495 0x038E //TX_DOA_TRACK_VADTH +496 0x0000 //TX_DOA_TRACK_NEW +497 0x0300 //TX_NOR_OFF_THR +498 0x7C00 //TX_MORE_ON_700HZ_THR +499 0x2000 //TX_MU_BF_ADPT_NS +500 0x0000 //TX_ADAPT_LEN +501 0x6666 //TX_MORE_SNS +502 0x0000 //TX_NOR_OFF_TH1 +503 0x0000 //TX_WIDE_MASK_TH +504 0xD333 //TX_SUBSNRATIOHIGH4MEANBCK_THR +505 0x6000 //TX_C_POST_FLT_CUT +506 0x2000 //TX_RADIODTLV +507 0x0320 //TX_POWER_LINEIN_TH +508 0x0014 //TX_FE_VADCOUNT_TH_FC +509 0x0000 //TX_ECHO_SUPP_FC +510 0x0C80 //TX_ECHO_TH +511 0x6666 //TX_MIC_TO_BFGAIN +512 0x0000 //TX_MICTOBFGAIN0 +513 0x0000 //TX_FASTMUE_TH +514 0x2CCC //TX_DEREVERB_LF_MU +515 0x3200 //TX_DEREVERB_HF_MU +516 0x0007 //TX_DEREVERB_DELAY +517 0x0004 //TX_DEREVERB_COEF_LEN +518 0x0003 //TX_DEREVERB_DNR +519 0x0000 //TX_DEREVERB_ALPHA +520 0x0000 //TX_DEREVERB_BETA +521 0x3A98 //TX_GSC_RTOL_TH +522 0x3A98 //TX_GSC_RTOH_TH +523 0x7E2C //TX_WIDE2_MEANHTH +524 0x0000 //TX_DR_RESRV_5 +525 0x0000 //TX_DR_RESRV_6 +526 0x0000 //TX_DR_RESRV_7 +527 0x0000 //TX_DR_RESRV_8 +528 0x1333 //TX_WIND_MARK_TH +529 0x399A //TX_CORR_THR +530 0x0004 //TX_SNR_THR +531 0x0010 //TX_ENGY_THR +532 0x1770 //TX_CORR_HIGH_TH +533 0x6000 //TX_ENGY_THR_2 +534 0x3400 //TX_MEAN_RTO_THR +535 0x0028 //TX_WNS_ENOISE_MIC0_TH +536 0x3000 //TX_RATIOMICL_TH +537 0x7FFF //TX_CALIG_HS +538 0x0000 //TX_LVL_CTRL +539 0x0010 //TX_WIND_SUPRTO +540 0x0014 //TX_WNS_MIN_G +541 0x0600 //TX_WNS_B_POST_FLT +542 0x3000 //TX_RATIOMICH_TH +543 0xD120 //TX_WIND_INBEAM_L_TH +544 0x0FA0 //TX_WIND_INBEAM_H_TH +545 0x2000 //TX_WNS_RESRV_0 +546 0x59D8 //TX_WNS_RESRV_1 +547 0x0200 //TX_WNS_RESRV_2 +548 0x0000 //TX_WNS_RESRV_3 +549 0x0000 //TX_WNS_RESRV_4 +550 0x0000 //TX_WNS_RESRV_5 +551 0x0000 //TX_WNS_RESRV_6 +552 0x0000 //TX_PB_B_POST_FLT_LESSCUT +553 0x0070 //TX_BF_LESSCUT_BBIN +554 0x0070 //TX_BF_LESSCUT_EBIN +555 0x0010 //TX_POSTBFB0 +556 0x0070 //TX_POSTBFB +557 0x00B0 //TX_POSTBFE +558 0x0E66 //TX_SPEECH_SNR_TH +559 0x0050 //TX_PB_MAX_PRI_SNR_TH +560 0x770A //TX_MAX_PRI_SNR_TH_L +561 0x0000 //TX_PFGAIN +562 0x0000 //TX_MAINTOREFR_TH +563 0x0000 //TX_SAM_MARK +564 0x0000 //TX_PB_RESRV_0 +565 0x0000 //TX_PB_RESRV_1 +566 0x0030 //TX_FDEQ_SUBNUM +567 0x5C58 //TX_FDEQ_GAIN_0 +568 0x5048 //TX_FDEQ_GAIN_1 +569 0x4C4C //TX_FDEQ_GAIN_2 +570 0x494D //TX_FDEQ_GAIN_3 +571 0x4442 //TX_FDEQ_GAIN_4 +572 0x444C //TX_FDEQ_GAIN_5 +573 0x5053 //TX_FDEQ_GAIN_6 +574 0x6248 //TX_FDEQ_GAIN_7 +575 0x434A //TX_FDEQ_GAIN_8 +576 0x4B4D //TX_FDEQ_GAIN_9 +577 0x4C4B //TX_FDEQ_GAIN_10 +578 0x4E4A //TX_FDEQ_GAIN_11 +579 0x4842 //TX_FDEQ_GAIN_12 +580 0x4C44 //TX_FDEQ_GAIN_13 +581 0x3A4A //TX_FDEQ_GAIN_14 +582 0x6478 //TX_FDEQ_GAIN_15 +583 0x5848 //TX_FDEQ_GAIN_16 +584 0x4848 //TX_FDEQ_GAIN_17 +585 0x4848 //TX_FDEQ_GAIN_18 +586 0x4848 //TX_FDEQ_GAIN_19 +587 0x4848 //TX_FDEQ_GAIN_20 +588 0x4848 //TX_FDEQ_GAIN_21 +589 0x4848 //TX_FDEQ_GAIN_22 +590 0x4848 //TX_FDEQ_GAIN_23 +591 0x0202 //TX_FDEQ_BIN_0 +592 0x0104 //TX_FDEQ_BIN_1 +593 0x0502 //TX_FDEQ_BIN_2 +594 0x0202 //TX_FDEQ_BIN_3 +595 0x0504 //TX_FDEQ_BIN_4 +596 0x0708 //TX_FDEQ_BIN_5 +597 0x0808 //TX_FDEQ_BIN_6 +598 0x050E //TX_FDEQ_BIN_7 +599 0x0B0C //TX_FDEQ_BIN_8 +600 0x0F0F //TX_FDEQ_BIN_9 +601 0x0E0D //TX_FDEQ_BIN_10 +602 0x0F28 //TX_FDEQ_BIN_11 +603 0x110F //TX_FDEQ_BIN_12 +604 0x350F //TX_FDEQ_BIN_13 +605 0x1924 //TX_FDEQ_BIN_14 +606 0x1810 //TX_FDEQ_BIN_15 +607 0x1021 //TX_FDEQ_BIN_16 +608 0x1000 //TX_FDEQ_BIN_17 +609 0x0000 //TX_FDEQ_BIN_18 +610 0x0000 //TX_FDEQ_BIN_19 +611 0x0000 //TX_FDEQ_BIN_20 +612 0x0000 //TX_FDEQ_BIN_21 +613 0x0000 //TX_FDEQ_BIN_22 +614 0x0000 //TX_FDEQ_BIN_23 +615 0x0000 //TX_FDEQ_PADDING +616 0x0030 //TX_PREEQ_SUBNUM_MIC0 +617 0x4848 //TX_PREEQ_GAIN_MIC0_0 +618 0x4848 //TX_PREEQ_GAIN_MIC0_1 +619 0x4848 //TX_PREEQ_GAIN_MIC0_2 +620 0x4848 //TX_PREEQ_GAIN_MIC0_3 +621 0x4848 //TX_PREEQ_GAIN_MIC0_4 +622 0x4848 //TX_PREEQ_GAIN_MIC0_5 +623 0x4848 //TX_PREEQ_GAIN_MIC0_6 +624 0x4848 //TX_PREEQ_GAIN_MIC0_7 +625 0x4848 //TX_PREEQ_GAIN_MIC0_8 +626 0x4848 //TX_PREEQ_GAIN_MIC0_9 +627 0x4848 //TX_PREEQ_GAIN_MIC0_10 +628 0x4848 //TX_PREEQ_GAIN_MIC0_11 +629 0x4848 //TX_PREEQ_GAIN_MIC0_12 +630 0x4848 //TX_PREEQ_GAIN_MIC0_13 +631 0x4848 //TX_PREEQ_GAIN_MIC0_14 +632 0x4848 //TX_PREEQ_GAIN_MIC0_15 +633 0x4848 //TX_PREEQ_GAIN_MIC0_16 +634 0x4848 //TX_PREEQ_GAIN_MIC0_17 +635 0x4848 //TX_PREEQ_GAIN_MIC0_18 +636 0x4848 //TX_PREEQ_GAIN_MIC0_19 +637 0x4848 //TX_PREEQ_GAIN_MIC0_20 +638 0x4848 //TX_PREEQ_GAIN_MIC0_21 +639 0x4848 //TX_PREEQ_GAIN_MIC0_22 +640 0x4848 //TX_PREEQ_GAIN_MIC0_23 +641 0x251A //TX_PREEQ_BIN_MIC0_0 +642 0x0F0F //TX_PREEQ_BIN_MIC0_1 +643 0x0C0C //TX_PREEQ_BIN_MIC0_2 +644 0x0C0F //TX_PREEQ_BIN_MIC0_3 +645 0x0F0F //TX_PREEQ_BIN_MIC0_4 +646 0x0F09 //TX_PREEQ_BIN_MIC0_5 +647 0x0909 //TX_PREEQ_BIN_MIC0_6 +648 0x0908 //TX_PREEQ_BIN_MIC0_7 +649 0x070F //TX_PREEQ_BIN_MIC0_8 +650 0x1F08 //TX_PREEQ_BIN_MIC0_9 +651 0x0808 //TX_PREEQ_BIN_MIC0_10 +652 0x0920 //TX_PREEQ_BIN_MIC0_11 +653 0x2020 //TX_PREEQ_BIN_MIC0_12 +654 0x2021 //TX_PREEQ_BIN_MIC0_13 +655 0x0000 //TX_PREEQ_BIN_MIC0_14 +656 0x0000 //TX_PREEQ_BIN_MIC0_15 +657 0x0000 //TX_PREEQ_BIN_MIC0_16 +658 0x0000 //TX_PREEQ_BIN_MIC0_17 +659 0x0000 //TX_PREEQ_BIN_MIC0_18 +660 0x0000 //TX_PREEQ_BIN_MIC0_19 +661 0x0000 //TX_PREEQ_BIN_MIC0_20 +662 0x0000 //TX_PREEQ_BIN_MIC0_21 +663 0x0000 //TX_PREEQ_BIN_MIC0_22 +664 0x0000 //TX_PREEQ_BIN_MIC0_23 +665 0x0030 //TX_PREEQ_SUBNUM_MIC1 +666 0x4848 //TX_PREEQ_GAIN_MIC1_0 +667 0x4848 //TX_PREEQ_GAIN_MIC1_1 +668 0x4848 //TX_PREEQ_GAIN_MIC1_2 +669 0x4848 //TX_PREEQ_GAIN_MIC1_3 +670 0x4848 //TX_PREEQ_GAIN_MIC1_4 +671 0x4848 //TX_PREEQ_GAIN_MIC1_5 +672 0x494A //TX_PREEQ_GAIN_MIC1_6 +673 0x4B4C //TX_PREEQ_GAIN_MIC1_7 +674 0x4D4E //TX_PREEQ_GAIN_MIC1_8 +675 0x4F52 //TX_PREEQ_GAIN_MIC1_9 +676 0x5355 //TX_PREEQ_GAIN_MIC1_10 +677 0x585C //TX_PREEQ_GAIN_MIC1_11 +678 0x616A //TX_PREEQ_GAIN_MIC1_12 +679 0x726E //TX_PREEQ_GAIN_MIC1_13 +680 0x5C48 //TX_PREEQ_GAIN_MIC1_14 +681 0x3B38 //TX_PREEQ_GAIN_MIC1_15 +682 0x4848 //TX_PREEQ_GAIN_MIC1_16 +683 0x4848 //TX_PREEQ_GAIN_MIC1_17 +684 0x4848 //TX_PREEQ_GAIN_MIC1_18 +685 0x4848 //TX_PREEQ_GAIN_MIC1_19 +686 0x4848 //TX_PREEQ_GAIN_MIC1_20 +687 0x4848 //TX_PREEQ_GAIN_MIC1_21 +688 0x4848 //TX_PREEQ_GAIN_MIC1_22 +689 0x4848 //TX_PREEQ_GAIN_MIC1_23 +690 0x0202 //TX_PREEQ_BIN_MIC1_0 +691 0x0203 //TX_PREEQ_BIN_MIC1_1 +692 0x0303 //TX_PREEQ_BIN_MIC1_2 +693 0x0304 //TX_PREEQ_BIN_MIC1_3 +694 0x0405 //TX_PREEQ_BIN_MIC1_4 +695 0x0506 //TX_PREEQ_BIN_MIC1_5 +696 0x0708 //TX_PREEQ_BIN_MIC1_6 +697 0x090A //TX_PREEQ_BIN_MIC1_7 +698 0x0B0C //TX_PREEQ_BIN_MIC1_8 +699 0x0D0E //TX_PREEQ_BIN_MIC1_9 +700 0x1013 //TX_PREEQ_BIN_MIC1_10 +701 0x1719 //TX_PREEQ_BIN_MIC1_11 +702 0x1B1E //TX_PREEQ_BIN_MIC1_12 +703 0x1E1E //TX_PREEQ_BIN_MIC1_13 +704 0x1E28 //TX_PREEQ_BIN_MIC1_14 +705 0x3042 //TX_PREEQ_BIN_MIC1_15 +706 0x0000 //TX_PREEQ_BIN_MIC1_16 +707 0x0000 //TX_PREEQ_BIN_MIC1_17 +708 0x0000 //TX_PREEQ_BIN_MIC1_18 +709 0x0000 //TX_PREEQ_BIN_MIC1_19 +710 0x0000 //TX_PREEQ_BIN_MIC1_20 +711 0x0000 //TX_PREEQ_BIN_MIC1_21 +712 0x0000 //TX_PREEQ_BIN_MIC1_22 +713 0x0000 //TX_PREEQ_BIN_MIC1_23 +714 0x0030 //TX_PREEQ_SUBNUM_MIC2 +715 0x4848 //TX_PREEQ_GAIN_MIC2_0 +716 0x4848 //TX_PREEQ_GAIN_MIC2_1 +717 0x4848 //TX_PREEQ_GAIN_MIC2_2 +718 0x4848 //TX_PREEQ_GAIN_MIC2_3 +719 0x4848 //TX_PREEQ_GAIN_MIC2_4 +720 0x4848 //TX_PREEQ_GAIN_MIC2_5 +721 0x4848 //TX_PREEQ_GAIN_MIC2_6 +722 0x4848 //TX_PREEQ_GAIN_MIC2_7 +723 0x4848 //TX_PREEQ_GAIN_MIC2_8 +724 0x4848 //TX_PREEQ_GAIN_MIC2_9 +725 0x4848 //TX_PREEQ_GAIN_MIC2_10 +726 0x4848 //TX_PREEQ_GAIN_MIC2_11 +727 0x4848 //TX_PREEQ_GAIN_MIC2_12 +728 0x4848 //TX_PREEQ_GAIN_MIC2_13 +729 0x4848 //TX_PREEQ_GAIN_MIC2_14 +730 0x4848 //TX_PREEQ_GAIN_MIC2_15 +731 0x4848 //TX_PREEQ_GAIN_MIC2_16 +732 0x4848 //TX_PREEQ_GAIN_MIC2_17 +733 0x4848 //TX_PREEQ_GAIN_MIC2_18 +734 0x4848 //TX_PREEQ_GAIN_MIC2_19 +735 0x4848 //TX_PREEQ_GAIN_MIC2_20 +736 0x4848 //TX_PREEQ_GAIN_MIC2_21 +737 0x4848 //TX_PREEQ_GAIN_MIC2_22 +738 0x4848 //TX_PREEQ_GAIN_MIC2_23 +739 0x0608 //TX_PREEQ_BIN_MIC2_0 +740 0x0808 //TX_PREEQ_BIN_MIC2_1 +741 0x0808 //TX_PREEQ_BIN_MIC2_2 +742 0x0808 //TX_PREEQ_BIN_MIC2_3 +743 0x0808 //TX_PREEQ_BIN_MIC2_4 +744 0x0808 //TX_PREEQ_BIN_MIC2_5 +745 0x0808 //TX_PREEQ_BIN_MIC2_6 +746 0x0808 //TX_PREEQ_BIN_MIC2_7 +747 0x0808 //TX_PREEQ_BIN_MIC2_8 +748 0x0808 //TX_PREEQ_BIN_MIC2_9 +749 0x0808 //TX_PREEQ_BIN_MIC2_10 +750 0x0808 //TX_PREEQ_BIN_MIC2_11 +751 0x0808 //TX_PREEQ_BIN_MIC2_12 +752 0x0808 //TX_PREEQ_BIN_MIC2_13 +753 0x0808 //TX_PREEQ_BIN_MIC2_14 +754 0x0200 //TX_PREEQ_BIN_MIC2_15 +755 0x0000 //TX_PREEQ_BIN_MIC2_16 +756 0x0000 //TX_PREEQ_BIN_MIC2_17 +757 0x0000 //TX_PREEQ_BIN_MIC2_18 +758 0x0000 //TX_PREEQ_BIN_MIC2_19 +759 0x0000 //TX_PREEQ_BIN_MIC2_20 +760 0x0000 //TX_PREEQ_BIN_MIC2_21 +761 0x0000 //TX_PREEQ_BIN_MIC2_22 +762 0x0000 //TX_PREEQ_BIN_MIC2_23 +763 0x0006 //TX_MASKING_ABILITY +764 0x0800 //TX_NND_WEIGHT +765 0x0050 //TX_MIC_CALIBRATION_0 +766 0x0056 //TX_MIC_CALIBRATION_1 +767 0x0050 //TX_MIC_CALIBRATION_2 +768 0x0050 //TX_MIC_CALIBRATION_3 +769 0x0046 //TX_MIC_PWR_BIAS_0 +770 0x0042 //TX_MIC_PWR_BIAS_1 +771 0x0046 //TX_MIC_PWR_BIAS_2 +772 0x0046 //TX_MIC_PWR_BIAS_3 +773 0x0000 //TX_GAIN_LIMIT_0 +774 0x0006 //TX_GAIN_LIMIT_1 +775 0x0000 //TX_GAIN_LIMIT_2 +776 0x0000 //TX_GAIN_LIMIT_3 +777 0x7F5B //TX_BVE_NOVAD0_ALPHADOWN +778 0x7FDE //TX_BVE_VAD0_ALPHAUP +779 0x7F3A //TX_BVE_VAD0_ALPHADOWN +780 0x2000 //TX_BVE_GAINWEIGHT_NOFEVADLI +781 0x7F5B //TX_BVE_FEVADLI_ALPHA +782 0x7F19 //TX_BVE_NOVAD0_ALPHAUP +783 0x1000 //TX_TDDRC_ALPHA_UP_01 +784 0x1000 //TX_TDDRC_ALPHA_UP_02 +785 0x1000 //TX_TDDRC_ALPHA_UP_03 +786 0x1000 //TX_TDDRC_ALPHA_UP_04 +787 0x7EB8 //TX_TDDRC_ALPHA_DWN_01 +788 0x7EB8 //TX_TDDRC_ALPHA_DWN_02 +789 0x7EB8 //TX_TDDRC_ALPHA_DWN_03 +790 0x7EB8 //TX_TDDRC_ALPHA_DWN_04 +791 0x7FFF //TX_TDDRC_TD_DRC_LIMIT +792 0x0800 //TX_TDDRC_POST_LIMIT_GAIN +793 0x0000 //TX_TDDRC_RESRV_0 +794 0x0000 //TX_TDDRC_RESRV_1 +795 0x0018 //TX_FDDRC_BAND_MARGIN_0 +796 0x0030 //TX_FDDRC_BAND_MARGIN_1 +797 0x0050 //TX_FDDRC_BAND_MARGIN_2 +798 0x0080 //TX_FDDRC_BAND_MARGIN_3 +799 0x0007 //TX_FDDRC_BLOCK_EXP +800 0x5000 //TX_FDDRC_THRD_2_0 +801 0x5000 //TX_FDDRC_THRD_2_1 +802 0x5000 //TX_FDDRC_THRD_2_2 +803 0x5000 //TX_FDDRC_THRD_2_3 +804 0x6400 //TX_FDDRC_THRD_3_0 +805 0x6400 //TX_FDDRC_THRD_3_1 +806 0x6400 //TX_FDDRC_THRD_3_2 +807 0x6400 //TX_FDDRC_THRD_3_3 +808 0x2000 //TX_FDDRC_SLANT_0_0 +809 0x2000 //TX_FDDRC_SLANT_0_1 +810 0x2000 //TX_FDDRC_SLANT_0_2 +811 0x2000 //TX_FDDRC_SLANT_0_3 +812 0x5333 //TX_FDDRC_SLANT_1_0 +813 0x5333 //TX_FDDRC_SLANT_1_1 +814 0x5333 //TX_FDDRC_SLANT_1_2 +815 0x5333 //TX_FDDRC_SLANT_1_3 +816 0x0010 //TX_DEADMIC_SILENCE_TH +817 0x0600 //TX_MIC_DEGRADE_TH +818 0x0078 //TX_DEADMIC_CNT +819 0x0078 //TX_MIC_DEGRADE_CNT +820 0x0000 //TX_FDDRC_RESRV_4 +821 0x0000 //TX_FDDRC_RESRV_5 +822 0x0000 //TX_FDDRC_RESRV_6 +823 0x7FFF //TX_KS_NOISEPASTE_FACTOR +824 0x0001 //TX_KS_CONFIG +825 0x7FFF //TX_KS_GAIN_MIN +826 0x0000 //TX_KS_RESRV_0 +827 0x0000 //TX_KS_RESRV_1 +828 0x0000 //TX_KS_RESRV_2 +829 0x7C00 //TX_LAMBDA_PKA_FP +830 0x2000 //TX_TPKA_FP +831 0x0080 //TX_MIN_G_FP +832 0x2000 //TX_MAX_G_FP +833 0x0FA0 //TX_FFP_FP_K_METAL +834 0x4000 //TX_A_POST_FLT_FP +835 0x0F5C //TX_RTO_OUTBEAM_TH +836 0x4CCD //TX_TPKA_FP_THD +837 0x0000 //TX_MAX_G_FP_BLK +838 0x0000 //TX_FFP_FADEIN +839 0x0000 //TX_FFP_FADEOUT +840 0x0000 //TX_WHISPERCTH +841 0x0000 //TX_WHISPERHOLDT +842 0x0000 //TX_WHISP_ENTHH +843 0x0000 //TX_WHISP_ENTHL +844 0x0000 //TX_WHISP_RTOTH +845 0x0000 //TX_WHISP_RTOTH2 +846 0x0096 //TX_MUTE_PERIOD +847 0x0000 //TX_FADE_IN_PERIOD +848 0x0100 //TX_FFP_RESRV_2 +849 0x0020 //TX_FFP_RESRV_3 +850 0x0000 //TX_FFP_RESRV_4 +851 0x0000 //TX_FFP_RESRV_5 +852 0x0000 //TX_FFP_RESRV_6 +853 0x0002 //TX_FILTINDX +854 0x0002 //TX_TDDRC_THRD_0 +855 0x0003 //TX_TDDRC_THRD_1 +856 0x1500 //TX_TDDRC_THRD_2 +857 0x1500 //TX_TDDRC_THRD_3 +858 0x3000 //TX_TDDRC_SLANT_0 +859 0x6E00 //TX_TDDRC_SLANT_1 +860 0x1000 //TX_TDDRC_ALPHA_UP_00 +861 0x7EB8 //TX_TDDRC_ALPHA_DWN_00 +862 0x0000 //TX_TDDRC_HMNC_FLAG +863 0x199A //TX_TDDRC_HMNC_GAIN +864 0x0000 //TX_TDDRC_SMT_FLAG +865 0x0CCD //TX_TDDRC_SMT_W +866 0x06EC //TX_TDDRC_DRC_GAIN +867 0x7FFF //TX_TDDRC_LMT_THRD +868 0x0000 //TX_TDDRC_LMT_ALPHA +869 0x0000 //TX_TFMASKLTH +870 0x0000 //TX_TFMASKLTHL +871 0x0CCD //TX_TFMASKHTH +872 0xECCD //TX_TFMASKLTH_BINVAD +873 0xFCCD //TX_TFMASKLTH_NS_EST +874 0xF800 //TX_TFMASKLTH_DOA +875 0x0CCD //TX_TFMASKTH_BLESSCUT +876 0x1000 //TX_B_LESSCUT_RTO_MASK +877 0x2000 //TX_SB_RHO_MEAN_TH_ABN +878 0x2000 //TX_B_POST_FLT_MASK +879 0x0000 //TX_B_POST_FLT_MASK1 +880 0x6333 //TX_GAIN_WIND_MASK +881 0x0000 //TX_TFMASK_BFSTRICT_MUSIC +882 0x0000 //TX_TFMASK_BFSTRICT_NOMUSIC +883 0x7333 //TX_FASTNS_OUTIN_TH +884 0x0CCD //TX_FASTNS_TFMASK_TH +885 0x0CCD //TX_FASTNS_TFMASKBIN_TH1 +886 0x0CCD //TX_FASTNS_TFMASKBIN_TH2 +887 0x0CCD //TX_FASTNS_TFMASKBIN_TH3 +888 0x0028 //TX_FASTNS_ARSPC_TH +889 0xC000 //TX_FASTNS_MASK5_TH +890 0x0810 //TX_POSTSSA_MIN_G_VR_MASK +891 0x1000 //TX_A_LESSCUT_RTO_MASK +892 0x1770 //TX_FASTNS_NOISETH +893 0xC000 //TX_FASTNS_SSA_THLFL +894 0xC000 //TX_FASTNS_SSA_THHFL +895 0xCCCC //TX_FASTNS_SSA_THLFH +896 0xD999 //TX_FASTNS_SSA_THHFH +897 0x2339 //TX_SENDFUNC_REG_MICMUTE +898 0x0021 //TX_SENDFUNC_REG_MICMUTE1 +899 0x02BC //TX_MICMUTE_RATIO_THR +900 0x0140 //TX_MICMUTE_AMP_THR +901 0x0004 //TX_MICMUTE_HPF_IND +902 0x00C0 //TX_MICMUTE_LOG_EYR_TH +903 0x0008 //TX_MICMUTE_CVG_TIME +904 0x0008 //TX_MICMUTE_RELEASE_TIME +905 0x01FE //TX_MIC_VOLUME_MIC0MUTE +906 0x0020 //TX_MICMUTE_EPD_OFFSET_0 +907 0x001E //TX_MICMUTE_FRQ_AEC_L +908 0x7999 //TX_MICMUTE_EAD_THR +909 0x7FFF //TX_MICMUTE_LAMBDA_CB_NLE +910 0x7FFF //TX_MICMUTE_LAMBDA_RE_EST +911 0x4000 //TX_DTD_THR1_MICMUTE_0 +912 0x7000 //TX_DTD_THR1_MICMUTE_1 +913 0x7FFF //TX_DTD_THR1_MICMUTE_2 +914 0x7FFF //TX_DTD_THR1_MICMUTE_3 +915 0x6CCC //TX_DTD_THR2_MICMUTE_0 +916 0x0400 //TX_MICMUTE_MIN_EQ_RE_EST_0 +917 0x0400 //TX_MICMUTE_MIN_EQ_RE_EST_1 +918 0x1000 //TX_MICMUTE_MIN_EQ_RE_EST_2 +919 0x7FFF //TX_MICMUTE_MIN_EQ_RE_EST_3 +920 0x7FFF //TX_MICMUTE_MIN_EQ_RE_EST_4 +921 0x4000 //TX_MICMUTE_C_POST_FLT +922 0x03E8 //TX_MICMUTE_DT_CUT_K +923 0x0001 //TX_MICMUTE_DT_CUT_THR +924 0x03E8 //TX_MICMUTE_DT_CUT_K2 +925 0x0001 //TX_MICMUTE_DT_CUT_THR2 +926 0x0064 //TX_MICMUTE_DT2_HOLD_N +927 0x1000 //TX_MICMUTE_RATIODTH_THCUT +928 0x1000 //TX_MICMUTE_B_POST_FLT_ECHOL +929 0x7FFF //TX_MICMUTE_B_POST_FLT_ECHOH +930 0x0400 //TX_MICMUTE_C_POST_FLT_MASK +931 0x7999 //TX_MICMUTE_RATIODTL_CUT_TH +932 0x0258 //TX_MICMUTE_DT_CUT_K1 +933 0x0800 //TX_MICMUTE_N2_SN_EST +934 0xFC00 //TX_MICMUTE_THR_SN_EST_0 +935 0x001C //TX_MICMUTE_MIN_G_CTRL_0 +936 0x6000 //TX_MICMUTE_A_POST_FILT_S_0 +937 0x7000 //TX_MICMUTE_B_POST_FILT_0 +938 0x2710 //TX_MIC1RUB_AMP_THR +939 0x0010 //TX_MIC1MUTE_RATIO_THR +940 0x0450 //TX_MIC1MUTE_AMP_THR +941 0x0008 //TX_MIC1MUTE_CVG_TIME +942 0x0008 //TX_MIC1MUTE_RELEASE_TIME +943 0x0000 //TX_AMS_RESRV_01 +944 0x0000 //TX_AMS_RESRV_02 +945 0x0000 //TX_AMS_RESRV_03 +946 0x0000 //TX_AMS_RESRV_04 +947 0x0000 //TX_AMS_RESRV_05 +948 0x0000 //TX_AMS_RESRV_06 +949 0x0000 //TX_AMS_RESRV_07 +950 0x0000 //TX_AMS_RESRV_08 +951 0x0000 //TX_AMS_RESRV_09 +952 0x0000 //TX_AMS_RESRV_10 +953 0x0000 //TX_AMS_RESRV_11 +954 0x0000 //TX_AMS_RESRV_12 +955 0x0000 //TX_AMS_RESRV_13 +956 0x0000 //TX_AMS_RESRV_14 +957 0x0000 //TX_AMS_RESRV_15 +958 0x0000 //TX_AMS_RESRV_16 +959 0x0000 //TX_AMS_RESRV_17 +960 0x0000 //TX_AMS_RESRV_18 +961 0x0000 //TX_AMS_RESRV_19 +#RX +0 0x203C //RX_RECVFUNC_MODE_0 +1 0x0000 //RX_RECVFUNC_MODE_1 +2 0x0003 //RX_SAMPLINGFREQ_SIG +3 0x0003 //RX_SAMPLINGFREQ_PROC +4 0x000A //RX_FRAME_SZ +5 0x0000 //RX_DELAY_OPT +6 0x1000 //RX_TDDRC_ALPHA_UP_1 +7 0x1000 //RX_TDDRC_ALPHA_UP_2 +8 0x1000 //RX_TDDRC_ALPHA_UP_3 +9 0x1000 //RX_TDDRC_ALPHA_UP_4 +10 0x05AA //RX_PGA +11 0x7FFF //RX_A_HP +12 0x4000 //RX_B_PE +13 0x5800 //RX_THR_PITCH_DET_0 +14 0x5000 //RX_THR_PITCH_DET_1 +15 0x4000 //RX_THR_PITCH_DET_2 +16 0x0008 //RX_PITCH_BFR_LEN +17 0x0003 //RX_SBD_PITCH_DET +18 0x0100 //RX_PP_RESRV_0 +19 0x0020 //RX_PP_RESRV_1 +20 0x0600 //RX_N_SN_EST +21 0x000C //RX_N2_SN_EST +22 0x000F //RX_NS_LVL_CTRL +23 0xF800 //RX_THR_SN_EST +24 0x7E00 //RX_LAMBDA_PFILT +25 0x000A //RX_FENS_RESRV_0 +26 0x0190 //RX_FENS_RESRV_1 +27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +30 0x0002 //RX_EXTRA_NS_L +31 0x0800 //RX_EXTRA_NS_A +32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +33 0x7000 //RX_TDDRC_LIMITER_THRD +34 0x0800 //RX_TDDRC_LIMITER_GAIN +35 0x199A //RX_A_POST_FLT +36 0x0000 //RX_LMT_THRD +37 0x4000 //RX_LMT_ALPHA +38 0x0020 //RX_FDEQ_SUBNUM +39 0x483E //RX_FDEQ_GAIN_0 +40 0x3E3E //RX_FDEQ_GAIN_1 +41 0x3E4A //RX_FDEQ_GAIN_2 +42 0x5464 //RX_FDEQ_GAIN_3 +43 0x7072 //RX_FDEQ_GAIN_4 +44 0x8576 //RX_FDEQ_GAIN_5 +45 0x7880 //RX_FDEQ_GAIN_6 +46 0x8888 //RX_FDEQ_GAIN_7 +47 0x949C //RX_FDEQ_GAIN_8 +48 0x96A4 //RX_FDEQ_GAIN_9 +49 0xA994 //RX_FDEQ_GAIN_10 +50 0x9487 //RX_FDEQ_GAIN_11 +51 0x6F64 //RX_FDEQ_GAIN_12 +52 0x625A //RX_FDEQ_GAIN_13 +53 0x5D80 //RX_FDEQ_GAIN_14 +54 0x8890 //RX_FDEQ_GAIN_15 +55 0x4848 //RX_FDEQ_GAIN_16 +56 0x4848 //RX_FDEQ_GAIN_17 +57 0x4848 //RX_FDEQ_GAIN_18 +58 0x4848 //RX_FDEQ_GAIN_19 +59 0x4848 //RX_FDEQ_GAIN_20 +60 0x4848 //RX_FDEQ_GAIN_21 +61 0x4848 //RX_FDEQ_GAIN_22 +62 0x4848 //RX_FDEQ_GAIN_23 +63 0x0202 //RX_FDEQ_BIN_0 +64 0x0202 //RX_FDEQ_BIN_1 +65 0x0301 //RX_FDEQ_BIN_2 +66 0x0503 //RX_FDEQ_BIN_3 +67 0x0406 //RX_FDEQ_BIN_4 +68 0x0109 //RX_FDEQ_BIN_5 +69 0x0708 //RX_FDEQ_BIN_6 +70 0x090A //RX_FDEQ_BIN_7 +71 0x0B0C //RX_FDEQ_BIN_8 +72 0x0D0E //RX_FDEQ_BIN_9 +73 0x1013 //RX_FDEQ_BIN_10 +74 0x1719 //RX_FDEQ_BIN_11 +75 0x1B0F //RX_FDEQ_BIN_12 +76 0x141E //RX_FDEQ_BIN_13 +77 0x3728 //RX_FDEQ_BIN_14 +78 0x282C //RX_FDEQ_BIN_15 +79 0x0000 //RX_FDEQ_BIN_16 +80 0x0000 //RX_FDEQ_BIN_17 +81 0x0000 //RX_FDEQ_BIN_18 +82 0x0000 //RX_FDEQ_BIN_19 +83 0x0000 //RX_FDEQ_BIN_20 +84 0x0000 //RX_FDEQ_BIN_21 +85 0x0000 //RX_FDEQ_BIN_22 +86 0x0000 //RX_FDEQ_BIN_23 +87 0x4000 //RX_FDEQ_RESRV_0 +88 0x0320 //RX_FDEQ_RESRV_1 +89 0x0018 //RX_FDDRC_BAND_MARGIN_0 +90 0x0030 //RX_FDDRC_BAND_MARGIN_1 +91 0x0050 //RX_FDDRC_BAND_MARGIN_2 +92 0x0080 //RX_FDDRC_BAND_MARGIN_3 +93 0x0007 //RX_FDDRC_BLOCK_EXP +94 0x5000 //RX_FDDRC_THRD_2_0 +95 0x5000 //RX_FDDRC_THRD_2_1 +96 0x5000 //RX_FDDRC_THRD_2_2 +97 0x5000 //RX_FDDRC_THRD_2_3 +98 0x6400 //RX_FDDRC_THRD_3_0 +99 0x6400 //RX_FDDRC_THRD_3_1 +100 0x6400 //RX_FDDRC_THRD_3_2 +101 0x6400 //RX_FDDRC_THRD_3_3 +102 0x2000 //RX_FDDRC_SLANT_0_0 +103 0x2000 //RX_FDDRC_SLANT_0_1 +104 0x2000 //RX_FDDRC_SLANT_0_2 +105 0x2000 //RX_FDDRC_SLANT_0_3 +106 0x5333 //RX_FDDRC_SLANT_1_0 +107 0x5333 //RX_FDDRC_SLANT_1_1 +108 0x5333 //RX_FDDRC_SLANT_1_2 +109 0x5333 //RX_FDDRC_SLANT_1_3 +110 0x0000 //RX_FDDRC_RESRV_0 +111 0x0002 //RX_FILTINDX +112 0x0001 //RX_TDDRC_THRD_0 +113 0x0002 //RX_TDDRC_THRD_1 +114 0x1800 //RX_TDDRC_THRD_2 +115 0x1800 //RX_TDDRC_THRD_3 +116 0x7FFF //RX_TDDRC_SLANT_0 +117 0x7FFF //RX_TDDRC_SLANT_1 +118 0x1000 //RX_TDDRC_ALPHA_UP_0 +119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +120 0x0000 //RX_TDDRC_HMNC_FLAG +121 0x199A //RX_TDDRC_HMNC_GAIN +122 0x0001 //RX_TDDRC_SMT_FLAG +123 0x0CCD //RX_TDDRC_SMT_W +124 0x057F //RX_TDDRC_DRC_GAIN +125 0x7C00 //RX_LAMBDA_PKA_FP +126 0x13E0 //RX_TPKA_FP +127 0x0080 //RX_MIN_G_FP +128 0x2000 //RX_MAX_G_FP +129 0x0100 //RX_SPK_VOL +130 0x0000 //RX_VOL_RESRV_0 +131 0x0000 //RX_MAXLEVEL_CNG +132 0x3000 //RX_BWE_UV_TH +133 0x3000 //RX_BWE_UV_TH2 +134 0x1800 //RX_BWE_UV_TH3 +135 0x1000 //RX_BWE_V_TH +136 0x04CD //RX_BWE_GAIN1_V_TH1 +137 0x0F33 //RX_BWE_GAIN1_V_TH2 +138 0x7333 //RX_BWE_UV_EQ +139 0x199A //RX_BWE_V_EQ +140 0x7333 //RX_BWE_TONE_TH +141 0x0004 //RX_BWE_UV_HOLD_T +142 0x6CCD //RX_BWE_GAIN2_ALPHA +143 0x799A //RX_BWE_GAIN3_ALPHA +144 0x001E //RX_BWE_CUTOFF +145 0x3000 //RX_BWE_GAINFILL +146 0x3200 //RX_BWE_MAXTH_TONE +147 0x2000 //RX_BWE_EQ_0 +148 0x2000 //RX_BWE_EQ_1 +149 0x2000 //RX_BWE_EQ_2 +150 0x2000 //RX_BWE_EQ_3 +151 0x2000 //RX_BWE_EQ_4 +152 0x2000 //RX_BWE_EQ_5 +153 0x2000 //RX_BWE_EQ_6 +154 0x0000 //RX_BWE_RESRV_0 +155 0x0000 //RX_BWE_RESRV_1 +156 0x0000 //RX_BWE_RESRV_2 +#VOL 0 +6 0x1000 //RX_TDDRC_ALPHA_UP_1 +7 0x1000 //RX_TDDRC_ALPHA_UP_2 +8 0x1000 //RX_TDDRC_ALPHA_UP_3 +9 0x1000 //RX_TDDRC_ALPHA_UP_4 +27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +33 0x7000 //RX_TDDRC_LIMITER_THRD +34 0x0800 //RX_TDDRC_LIMITER_GAIN +112 0x0001 //RX_TDDRC_THRD_0 +113 0x0002 //RX_TDDRC_THRD_1 +114 0x1800 //RX_TDDRC_THRD_2 +115 0x1800 //RX_TDDRC_THRD_3 +116 0x7FFF //RX_TDDRC_SLANT_0 +117 0x7FFF //RX_TDDRC_SLANT_1 +118 0x1000 //RX_TDDRC_ALPHA_UP_0 +119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +120 0x0000 //RX_TDDRC_HMNC_FLAG +121 0x199A //RX_TDDRC_HMNC_GAIN +122 0x0001 //RX_TDDRC_SMT_FLAG +123 0x0CCD //RX_TDDRC_SMT_W +124 0x057F //RX_TDDRC_DRC_GAIN +38 0x0020 //RX_FDEQ_SUBNUM +39 0x483E //RX_FDEQ_GAIN_0 +40 0x3E3E //RX_FDEQ_GAIN_1 +41 0x3E4A //RX_FDEQ_GAIN_2 +42 0x5464 //RX_FDEQ_GAIN_3 +43 0x7072 //RX_FDEQ_GAIN_4 +44 0x8576 //RX_FDEQ_GAIN_5 +45 0x7880 //RX_FDEQ_GAIN_6 +46 0x8888 //RX_FDEQ_GAIN_7 +47 0x949C //RX_FDEQ_GAIN_8 +48 0x96A4 //RX_FDEQ_GAIN_9 +49 0xA994 //RX_FDEQ_GAIN_10 +50 0x9487 //RX_FDEQ_GAIN_11 +51 0x6F64 //RX_FDEQ_GAIN_12 +52 0x625A //RX_FDEQ_GAIN_13 +53 0x5D80 //RX_FDEQ_GAIN_14 +54 0x8890 //RX_FDEQ_GAIN_15 +55 0x4848 //RX_FDEQ_GAIN_16 +56 0x4848 //RX_FDEQ_GAIN_17 +57 0x4848 //RX_FDEQ_GAIN_18 +58 0x4848 //RX_FDEQ_GAIN_19 +59 0x4848 //RX_FDEQ_GAIN_20 +60 0x4848 //RX_FDEQ_GAIN_21 +61 0x4848 //RX_FDEQ_GAIN_22 +62 0x4848 //RX_FDEQ_GAIN_23 +63 0x0202 //RX_FDEQ_BIN_0 +64 0x0202 //RX_FDEQ_BIN_1 +65 0x0301 //RX_FDEQ_BIN_2 +66 0x0503 //RX_FDEQ_BIN_3 +67 0x0406 //RX_FDEQ_BIN_4 +68 0x0109 //RX_FDEQ_BIN_5 +69 0x0708 //RX_FDEQ_BIN_6 +70 0x090A //RX_FDEQ_BIN_7 +71 0x0B0C //RX_FDEQ_BIN_8 +72 0x0D0E //RX_FDEQ_BIN_9 +73 0x1013 //RX_FDEQ_BIN_10 +74 0x1719 //RX_FDEQ_BIN_11 +75 0x1B0F //RX_FDEQ_BIN_12 +76 0x141E //RX_FDEQ_BIN_13 +77 0x3728 //RX_FDEQ_BIN_14 +78 0x282C //RX_FDEQ_BIN_15 +79 0x0000 //RX_FDEQ_BIN_16 +80 0x0000 //RX_FDEQ_BIN_17 +81 0x0000 //RX_FDEQ_BIN_18 +82 0x0000 //RX_FDEQ_BIN_19 +83 0x0000 //RX_FDEQ_BIN_20 +84 0x0000 //RX_FDEQ_BIN_21 +85 0x0000 //RX_FDEQ_BIN_22 +86 0x0000 //RX_FDEQ_BIN_23 +87 0x4000 //RX_FDEQ_RESRV_0 +88 0x0320 //RX_FDEQ_RESRV_1 +89 0x0018 //RX_FDDRC_BAND_MARGIN_0 +90 0x0030 //RX_FDDRC_BAND_MARGIN_1 +91 0x0050 //RX_FDDRC_BAND_MARGIN_2 +92 0x0080 //RX_FDDRC_BAND_MARGIN_3 +93 0x0007 //RX_FDDRC_BLOCK_EXP +94 0x5000 //RX_FDDRC_THRD_2_0 +95 0x5000 //RX_FDDRC_THRD_2_1 +96 0x5000 //RX_FDDRC_THRD_2_2 +97 0x5000 //RX_FDDRC_THRD_2_3 +98 0x6400 //RX_FDDRC_THRD_3_0 +99 0x6400 //RX_FDDRC_THRD_3_1 +100 0x6400 //RX_FDDRC_THRD_3_2 +101 0x6400 //RX_FDDRC_THRD_3_3 +102 0x2000 //RX_FDDRC_SLANT_0_0 +103 0x2000 //RX_FDDRC_SLANT_0_1 +104 0x2000 //RX_FDDRC_SLANT_0_2 +105 0x2000 //RX_FDDRC_SLANT_0_3 +106 0x5333 //RX_FDDRC_SLANT_1_0 +107 0x5333 //RX_FDDRC_SLANT_1_1 +108 0x5333 //RX_FDDRC_SLANT_1_2 +109 0x5333 //RX_FDDRC_SLANT_1_3 +110 0x0000 //RX_FDDRC_RESRV_0 +129 0x000A //RX_SPK_VOL +130 0x0000 //RX_VOL_RESRV_0 +#VOL 1 +6 0x1000 //RX_TDDRC_ALPHA_UP_1 +7 0x1000 //RX_TDDRC_ALPHA_UP_2 +8 0x1000 //RX_TDDRC_ALPHA_UP_3 +9 0x1000 //RX_TDDRC_ALPHA_UP_4 +27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +33 0x7000 //RX_TDDRC_LIMITER_THRD +34 0x0800 //RX_TDDRC_LIMITER_GAIN +112 0x0001 //RX_TDDRC_THRD_0 +113 0x0002 //RX_TDDRC_THRD_1 +114 0x1800 //RX_TDDRC_THRD_2 +115 0x1800 //RX_TDDRC_THRD_3 +116 0x7FFF //RX_TDDRC_SLANT_0 +117 0x7FFF //RX_TDDRC_SLANT_1 +118 0x1000 //RX_TDDRC_ALPHA_UP_0 +119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +120 0x0000 //RX_TDDRC_HMNC_FLAG +121 0x199A //RX_TDDRC_HMNC_GAIN +122 0x0001 //RX_TDDRC_SMT_FLAG +123 0x0CCD //RX_TDDRC_SMT_W +124 0x057F //RX_TDDRC_DRC_GAIN +38 0x0020 //RX_FDEQ_SUBNUM +39 0x483E //RX_FDEQ_GAIN_0 +40 0x3E3E //RX_FDEQ_GAIN_1 +41 0x3E4A //RX_FDEQ_GAIN_2 +42 0x5464 //RX_FDEQ_GAIN_3 +43 0x7072 //RX_FDEQ_GAIN_4 +44 0x8576 //RX_FDEQ_GAIN_5 +45 0x7880 //RX_FDEQ_GAIN_6 +46 0x8888 //RX_FDEQ_GAIN_7 +47 0x949C //RX_FDEQ_GAIN_8 +48 0x96A4 //RX_FDEQ_GAIN_9 +49 0xA994 //RX_FDEQ_GAIN_10 +50 0x9487 //RX_FDEQ_GAIN_11 +51 0x6F64 //RX_FDEQ_GAIN_12 +52 0x625A //RX_FDEQ_GAIN_13 +53 0x5D80 //RX_FDEQ_GAIN_14 +54 0x8890 //RX_FDEQ_GAIN_15 +55 0x4848 //RX_FDEQ_GAIN_16 +56 0x4848 //RX_FDEQ_GAIN_17 +57 0x4848 //RX_FDEQ_GAIN_18 +58 0x4848 //RX_FDEQ_GAIN_19 +59 0x4848 //RX_FDEQ_GAIN_20 +60 0x4848 //RX_FDEQ_GAIN_21 +61 0x4848 //RX_FDEQ_GAIN_22 +62 0x4848 //RX_FDEQ_GAIN_23 +63 0x0202 //RX_FDEQ_BIN_0 +64 0x0202 //RX_FDEQ_BIN_1 +65 0x0301 //RX_FDEQ_BIN_2 +66 0x0503 //RX_FDEQ_BIN_3 +67 0x0406 //RX_FDEQ_BIN_4 +68 0x0109 //RX_FDEQ_BIN_5 +69 0x0708 //RX_FDEQ_BIN_6 +70 0x090A //RX_FDEQ_BIN_7 +71 0x0B0C //RX_FDEQ_BIN_8 +72 0x0D0E //RX_FDEQ_BIN_9 +73 0x1013 //RX_FDEQ_BIN_10 +74 0x1719 //RX_FDEQ_BIN_11 +75 0x1B0F //RX_FDEQ_BIN_12 +76 0x141E //RX_FDEQ_BIN_13 +77 0x3728 //RX_FDEQ_BIN_14 +78 0x282C //RX_FDEQ_BIN_15 +79 0x0000 //RX_FDEQ_BIN_16 +80 0x0000 //RX_FDEQ_BIN_17 +81 0x0000 //RX_FDEQ_BIN_18 +82 0x0000 //RX_FDEQ_BIN_19 +83 0x0000 //RX_FDEQ_BIN_20 +84 0x0000 //RX_FDEQ_BIN_21 +85 0x0000 //RX_FDEQ_BIN_22 +86 0x0000 //RX_FDEQ_BIN_23 +87 0x4000 //RX_FDEQ_RESRV_0 +88 0x0320 //RX_FDEQ_RESRV_1 +89 0x0018 //RX_FDDRC_BAND_MARGIN_0 +90 0x0030 //RX_FDDRC_BAND_MARGIN_1 +91 0x0050 //RX_FDDRC_BAND_MARGIN_2 +92 0x0080 //RX_FDDRC_BAND_MARGIN_3 +93 0x0007 //RX_FDDRC_BLOCK_EXP +94 0x5000 //RX_FDDRC_THRD_2_0 +95 0x5000 //RX_FDDRC_THRD_2_1 +96 0x5000 //RX_FDDRC_THRD_2_2 +97 0x5000 //RX_FDDRC_THRD_2_3 +98 0x6400 //RX_FDDRC_THRD_3_0 +99 0x6400 //RX_FDDRC_THRD_3_1 +100 0x6400 //RX_FDDRC_THRD_3_2 +101 0x6400 //RX_FDDRC_THRD_3_3 +102 0x2000 //RX_FDDRC_SLANT_0_0 +103 0x2000 //RX_FDDRC_SLANT_0_1 +104 0x2000 //RX_FDDRC_SLANT_0_2 +105 0x2000 //RX_FDDRC_SLANT_0_3 +106 0x5333 //RX_FDDRC_SLANT_1_0 +107 0x5333 //RX_FDDRC_SLANT_1_1 +108 0x5333 //RX_FDDRC_SLANT_1_2 +109 0x5333 //RX_FDDRC_SLANT_1_3 +110 0x0000 //RX_FDDRC_RESRV_0 +129 0x0010 //RX_SPK_VOL +130 0x0000 //RX_VOL_RESRV_0 +#VOL 2 +6 0x1000 //RX_TDDRC_ALPHA_UP_1 +7 0x1000 //RX_TDDRC_ALPHA_UP_2 +8 0x1000 //RX_TDDRC_ALPHA_UP_3 +9 0x1000 //RX_TDDRC_ALPHA_UP_4 +27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +33 0x7000 //RX_TDDRC_LIMITER_THRD +34 0x0800 //RX_TDDRC_LIMITER_GAIN +112 0x0001 //RX_TDDRC_THRD_0 +113 0x0002 //RX_TDDRC_THRD_1 +114 0x1800 //RX_TDDRC_THRD_2 +115 0x1800 //RX_TDDRC_THRD_3 +116 0x7FFF //RX_TDDRC_SLANT_0 +117 0x7FFF //RX_TDDRC_SLANT_1 +118 0x1000 //RX_TDDRC_ALPHA_UP_0 +119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +120 0x0000 //RX_TDDRC_HMNC_FLAG +121 0x199A //RX_TDDRC_HMNC_GAIN +122 0x0001 //RX_TDDRC_SMT_FLAG +123 0x0CCD //RX_TDDRC_SMT_W +124 0x057F //RX_TDDRC_DRC_GAIN +38 0x0020 //RX_FDEQ_SUBNUM +39 0x483E //RX_FDEQ_GAIN_0 +40 0x3E3E //RX_FDEQ_GAIN_1 +41 0x3E4A //RX_FDEQ_GAIN_2 +42 0x5464 //RX_FDEQ_GAIN_3 +43 0x7072 //RX_FDEQ_GAIN_4 +44 0x8576 //RX_FDEQ_GAIN_5 +45 0x7880 //RX_FDEQ_GAIN_6 +46 0x8888 //RX_FDEQ_GAIN_7 +47 0x949C //RX_FDEQ_GAIN_8 +48 0x96A4 //RX_FDEQ_GAIN_9 +49 0xA994 //RX_FDEQ_GAIN_10 +50 0x9487 //RX_FDEQ_GAIN_11 +51 0x6F64 //RX_FDEQ_GAIN_12 +52 0x625A //RX_FDEQ_GAIN_13 +53 0x5D80 //RX_FDEQ_GAIN_14 +54 0x8890 //RX_FDEQ_GAIN_15 +55 0x4848 //RX_FDEQ_GAIN_16 +56 0x4848 //RX_FDEQ_GAIN_17 +57 0x4848 //RX_FDEQ_GAIN_18 +58 0x4848 //RX_FDEQ_GAIN_19 +59 0x4848 //RX_FDEQ_GAIN_20 +60 0x4848 //RX_FDEQ_GAIN_21 +61 0x4848 //RX_FDEQ_GAIN_22 +62 0x4848 //RX_FDEQ_GAIN_23 +63 0x0202 //RX_FDEQ_BIN_0 +64 0x0202 //RX_FDEQ_BIN_1 +65 0x0301 //RX_FDEQ_BIN_2 +66 0x0503 //RX_FDEQ_BIN_3 +67 0x0406 //RX_FDEQ_BIN_4 +68 0x0109 //RX_FDEQ_BIN_5 +69 0x0708 //RX_FDEQ_BIN_6 +70 0x090A //RX_FDEQ_BIN_7 +71 0x0B0C //RX_FDEQ_BIN_8 +72 0x0D0E //RX_FDEQ_BIN_9 +73 0x1013 //RX_FDEQ_BIN_10 +74 0x1719 //RX_FDEQ_BIN_11 +75 0x1B0F //RX_FDEQ_BIN_12 +76 0x141E //RX_FDEQ_BIN_13 +77 0x3728 //RX_FDEQ_BIN_14 +78 0x282C //RX_FDEQ_BIN_15 +79 0x0000 //RX_FDEQ_BIN_16 +80 0x0000 //RX_FDEQ_BIN_17 +81 0x0000 //RX_FDEQ_BIN_18 +82 0x0000 //RX_FDEQ_BIN_19 +83 0x0000 //RX_FDEQ_BIN_20 +84 0x0000 //RX_FDEQ_BIN_21 +85 0x0000 //RX_FDEQ_BIN_22 +86 0x0000 //RX_FDEQ_BIN_23 +87 0x4000 //RX_FDEQ_RESRV_0 +88 0x0320 //RX_FDEQ_RESRV_1 +89 0x0018 //RX_FDDRC_BAND_MARGIN_0 +90 0x0030 //RX_FDDRC_BAND_MARGIN_1 +91 0x0050 //RX_FDDRC_BAND_MARGIN_2 +92 0x0080 //RX_FDDRC_BAND_MARGIN_3 +93 0x0007 //RX_FDDRC_BLOCK_EXP +94 0x5000 //RX_FDDRC_THRD_2_0 +95 0x5000 //RX_FDDRC_THRD_2_1 +96 0x5000 //RX_FDDRC_THRD_2_2 +97 0x5000 //RX_FDDRC_THRD_2_3 +98 0x6400 //RX_FDDRC_THRD_3_0 +99 0x6400 //RX_FDDRC_THRD_3_1 +100 0x6400 //RX_FDDRC_THRD_3_2 +101 0x6400 //RX_FDDRC_THRD_3_3 +102 0x2000 //RX_FDDRC_SLANT_0_0 +103 0x2000 //RX_FDDRC_SLANT_0_1 +104 0x2000 //RX_FDDRC_SLANT_0_2 +105 0x2000 //RX_FDDRC_SLANT_0_3 +106 0x5333 //RX_FDDRC_SLANT_1_0 +107 0x5333 //RX_FDDRC_SLANT_1_1 +108 0x5333 //RX_FDDRC_SLANT_1_2 +109 0x5333 //RX_FDDRC_SLANT_1_3 +110 0x0000 //RX_FDDRC_RESRV_0 +129 0x001B //RX_SPK_VOL +130 0x0000 //RX_VOL_RESRV_0 +#VOL 3 +6 0x1000 //RX_TDDRC_ALPHA_UP_1 +7 0x1000 //RX_TDDRC_ALPHA_UP_2 +8 0x1000 //RX_TDDRC_ALPHA_UP_3 +9 0x1000 //RX_TDDRC_ALPHA_UP_4 +27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +33 0x7000 //RX_TDDRC_LIMITER_THRD +34 0x0800 //RX_TDDRC_LIMITER_GAIN +112 0x0001 //RX_TDDRC_THRD_0 +113 0x0002 //RX_TDDRC_THRD_1 +114 0x1800 //RX_TDDRC_THRD_2 +115 0x1800 //RX_TDDRC_THRD_3 +116 0x7FFF //RX_TDDRC_SLANT_0 +117 0x7FFF //RX_TDDRC_SLANT_1 +118 0x1000 //RX_TDDRC_ALPHA_UP_0 +119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +120 0x0000 //RX_TDDRC_HMNC_FLAG +121 0x199A //RX_TDDRC_HMNC_GAIN +122 0x0001 //RX_TDDRC_SMT_FLAG +123 0x0CCD //RX_TDDRC_SMT_W +124 0x057F //RX_TDDRC_DRC_GAIN +38 0x0020 //RX_FDEQ_SUBNUM +39 0x483E //RX_FDEQ_GAIN_0 +40 0x3E3E //RX_FDEQ_GAIN_1 +41 0x3E4A //RX_FDEQ_GAIN_2 +42 0x5464 //RX_FDEQ_GAIN_3 +43 0x7072 //RX_FDEQ_GAIN_4 +44 0x8576 //RX_FDEQ_GAIN_5 +45 0x7880 //RX_FDEQ_GAIN_6 +46 0x8888 //RX_FDEQ_GAIN_7 +47 0x949C //RX_FDEQ_GAIN_8 +48 0x96A4 //RX_FDEQ_GAIN_9 +49 0xA994 //RX_FDEQ_GAIN_10 +50 0x9487 //RX_FDEQ_GAIN_11 +51 0x6F64 //RX_FDEQ_GAIN_12 +52 0x625A //RX_FDEQ_GAIN_13 +53 0x5D80 //RX_FDEQ_GAIN_14 +54 0x8890 //RX_FDEQ_GAIN_15 +55 0x4848 //RX_FDEQ_GAIN_16 +56 0x4848 //RX_FDEQ_GAIN_17 +57 0x4848 //RX_FDEQ_GAIN_18 +58 0x4848 //RX_FDEQ_GAIN_19 +59 0x4848 //RX_FDEQ_GAIN_20 +60 0x4848 //RX_FDEQ_GAIN_21 +61 0x4848 //RX_FDEQ_GAIN_22 +62 0x4848 //RX_FDEQ_GAIN_23 +63 0x0202 //RX_FDEQ_BIN_0 +64 0x0202 //RX_FDEQ_BIN_1 +65 0x0301 //RX_FDEQ_BIN_2 +66 0x0503 //RX_FDEQ_BIN_3 +67 0x0406 //RX_FDEQ_BIN_4 +68 0x0109 //RX_FDEQ_BIN_5 +69 0x0708 //RX_FDEQ_BIN_6 +70 0x090A //RX_FDEQ_BIN_7 +71 0x0B0C //RX_FDEQ_BIN_8 +72 0x0D0E //RX_FDEQ_BIN_9 +73 0x1013 //RX_FDEQ_BIN_10 +74 0x1719 //RX_FDEQ_BIN_11 +75 0x1B0F //RX_FDEQ_BIN_12 +76 0x141E //RX_FDEQ_BIN_13 +77 0x3728 //RX_FDEQ_BIN_14 +78 0x282C //RX_FDEQ_BIN_15 +79 0x0000 //RX_FDEQ_BIN_16 +80 0x0000 //RX_FDEQ_BIN_17 +81 0x0000 //RX_FDEQ_BIN_18 +82 0x0000 //RX_FDEQ_BIN_19 +83 0x0000 //RX_FDEQ_BIN_20 +84 0x0000 //RX_FDEQ_BIN_21 +85 0x0000 //RX_FDEQ_BIN_22 +86 0x0000 //RX_FDEQ_BIN_23 +87 0x4000 //RX_FDEQ_RESRV_0 +88 0x0320 //RX_FDEQ_RESRV_1 +89 0x0018 //RX_FDDRC_BAND_MARGIN_0 +90 0x0030 //RX_FDDRC_BAND_MARGIN_1 +91 0x0050 //RX_FDDRC_BAND_MARGIN_2 +92 0x0080 //RX_FDDRC_BAND_MARGIN_3 +93 0x0007 //RX_FDDRC_BLOCK_EXP +94 0x5000 //RX_FDDRC_THRD_2_0 +95 0x5000 //RX_FDDRC_THRD_2_1 +96 0x5000 //RX_FDDRC_THRD_2_2 +97 0x5000 //RX_FDDRC_THRD_2_3 +98 0x6400 //RX_FDDRC_THRD_3_0 +99 0x6400 //RX_FDDRC_THRD_3_1 +100 0x6400 //RX_FDDRC_THRD_3_2 +101 0x6400 //RX_FDDRC_THRD_3_3 +102 0x2000 //RX_FDDRC_SLANT_0_0 +103 0x2000 //RX_FDDRC_SLANT_0_1 +104 0x2000 //RX_FDDRC_SLANT_0_2 +105 0x2000 //RX_FDDRC_SLANT_0_3 +106 0x5333 //RX_FDDRC_SLANT_1_0 +107 0x5333 //RX_FDDRC_SLANT_1_1 +108 0x5333 //RX_FDDRC_SLANT_1_2 +109 0x5333 //RX_FDDRC_SLANT_1_3 +110 0x0000 //RX_FDDRC_RESRV_0 +129 0x0032 //RX_SPK_VOL +130 0x0000 //RX_VOL_RESRV_0 +#VOL 4 +6 0x1000 //RX_TDDRC_ALPHA_UP_1 +7 0x1000 //RX_TDDRC_ALPHA_UP_2 +8 0x1000 //RX_TDDRC_ALPHA_UP_3 +9 0x1000 //RX_TDDRC_ALPHA_UP_4 +27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +33 0x7000 //RX_TDDRC_LIMITER_THRD +34 0x0800 //RX_TDDRC_LIMITER_GAIN +112 0x0001 //RX_TDDRC_THRD_0 +113 0x0002 //RX_TDDRC_THRD_1 +114 0x1800 //RX_TDDRC_THRD_2 +115 0x1800 //RX_TDDRC_THRD_3 +116 0x7FFF //RX_TDDRC_SLANT_0 +117 0x7FFF //RX_TDDRC_SLANT_1 +118 0x1000 //RX_TDDRC_ALPHA_UP_0 +119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +120 0x0000 //RX_TDDRC_HMNC_FLAG +121 0x199A //RX_TDDRC_HMNC_GAIN +122 0x0001 //RX_TDDRC_SMT_FLAG +123 0x0CCD //RX_TDDRC_SMT_W +124 0x057F //RX_TDDRC_DRC_GAIN +38 0x0020 //RX_FDEQ_SUBNUM +39 0x483E //RX_FDEQ_GAIN_0 +40 0x3E3E //RX_FDEQ_GAIN_1 +41 0x3E4A //RX_FDEQ_GAIN_2 +42 0x5464 //RX_FDEQ_GAIN_3 +43 0x7072 //RX_FDEQ_GAIN_4 +44 0x8576 //RX_FDEQ_GAIN_5 +45 0x7880 //RX_FDEQ_GAIN_6 +46 0x8888 //RX_FDEQ_GAIN_7 +47 0x949C //RX_FDEQ_GAIN_8 +48 0x96A4 //RX_FDEQ_GAIN_9 +49 0xA994 //RX_FDEQ_GAIN_10 +50 0x9487 //RX_FDEQ_GAIN_11 +51 0x6F64 //RX_FDEQ_GAIN_12 +52 0x625A //RX_FDEQ_GAIN_13 +53 0x5D80 //RX_FDEQ_GAIN_14 +54 0x8890 //RX_FDEQ_GAIN_15 +55 0x4848 //RX_FDEQ_GAIN_16 +56 0x4848 //RX_FDEQ_GAIN_17 +57 0x4848 //RX_FDEQ_GAIN_18 +58 0x4848 //RX_FDEQ_GAIN_19 +59 0x4848 //RX_FDEQ_GAIN_20 +60 0x4848 //RX_FDEQ_GAIN_21 +61 0x4848 //RX_FDEQ_GAIN_22 +62 0x4848 //RX_FDEQ_GAIN_23 +63 0x0202 //RX_FDEQ_BIN_0 +64 0x0202 //RX_FDEQ_BIN_1 +65 0x0301 //RX_FDEQ_BIN_2 +66 0x0503 //RX_FDEQ_BIN_3 +67 0x0406 //RX_FDEQ_BIN_4 +68 0x0109 //RX_FDEQ_BIN_5 +69 0x0708 //RX_FDEQ_BIN_6 +70 0x090A //RX_FDEQ_BIN_7 +71 0x0B0C //RX_FDEQ_BIN_8 +72 0x0D0E //RX_FDEQ_BIN_9 +73 0x1013 //RX_FDEQ_BIN_10 +74 0x1719 //RX_FDEQ_BIN_11 +75 0x1B0F //RX_FDEQ_BIN_12 +76 0x141E //RX_FDEQ_BIN_13 +77 0x3728 //RX_FDEQ_BIN_14 +78 0x282C //RX_FDEQ_BIN_15 +79 0x0000 //RX_FDEQ_BIN_16 +80 0x0000 //RX_FDEQ_BIN_17 +81 0x0000 //RX_FDEQ_BIN_18 +82 0x0000 //RX_FDEQ_BIN_19 +83 0x0000 //RX_FDEQ_BIN_20 +84 0x0000 //RX_FDEQ_BIN_21 +85 0x0000 //RX_FDEQ_BIN_22 +86 0x0000 //RX_FDEQ_BIN_23 +87 0x4000 //RX_FDEQ_RESRV_0 +88 0x0320 //RX_FDEQ_RESRV_1 +89 0x0018 //RX_FDDRC_BAND_MARGIN_0 +90 0x0030 //RX_FDDRC_BAND_MARGIN_1 +91 0x0050 //RX_FDDRC_BAND_MARGIN_2 +92 0x0080 //RX_FDDRC_BAND_MARGIN_3 +93 0x0007 //RX_FDDRC_BLOCK_EXP +94 0x5000 //RX_FDDRC_THRD_2_0 +95 0x5000 //RX_FDDRC_THRD_2_1 +96 0x5000 //RX_FDDRC_THRD_2_2 +97 0x5000 //RX_FDDRC_THRD_2_3 +98 0x6400 //RX_FDDRC_THRD_3_0 +99 0x6400 //RX_FDDRC_THRD_3_1 +100 0x6400 //RX_FDDRC_THRD_3_2 +101 0x6400 //RX_FDDRC_THRD_3_3 +102 0x2000 //RX_FDDRC_SLANT_0_0 +103 0x2000 //RX_FDDRC_SLANT_0_1 +104 0x2000 //RX_FDDRC_SLANT_0_2 +105 0x2000 //RX_FDDRC_SLANT_0_3 +106 0x5333 //RX_FDDRC_SLANT_1_0 +107 0x5333 //RX_FDDRC_SLANT_1_1 +108 0x5333 //RX_FDDRC_SLANT_1_2 +109 0x5333 //RX_FDDRC_SLANT_1_3 +110 0x0000 //RX_FDDRC_RESRV_0 +129 0x0047 //RX_SPK_VOL +130 0x0000 //RX_VOL_RESRV_0 +#VOL 5 +6 0x1000 //RX_TDDRC_ALPHA_UP_1 +7 0x1000 //RX_TDDRC_ALPHA_UP_2 +8 0x1000 //RX_TDDRC_ALPHA_UP_3 +9 0x1000 //RX_TDDRC_ALPHA_UP_4 +27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +33 0x7000 //RX_TDDRC_LIMITER_THRD +34 0x0800 //RX_TDDRC_LIMITER_GAIN +112 0x0001 //RX_TDDRC_THRD_0 +113 0x0002 //RX_TDDRC_THRD_1 +114 0x1800 //RX_TDDRC_THRD_2 +115 0x1800 //RX_TDDRC_THRD_3 +116 0x7FFF //RX_TDDRC_SLANT_0 +117 0x7FFF //RX_TDDRC_SLANT_1 +118 0x1000 //RX_TDDRC_ALPHA_UP_0 +119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +120 0x0000 //RX_TDDRC_HMNC_FLAG +121 0x199A //RX_TDDRC_HMNC_GAIN +122 0x0001 //RX_TDDRC_SMT_FLAG +123 0x0CCD //RX_TDDRC_SMT_W +124 0x057F //RX_TDDRC_DRC_GAIN +38 0x0020 //RX_FDEQ_SUBNUM +39 0x483E //RX_FDEQ_GAIN_0 +40 0x3E3E //RX_FDEQ_GAIN_1 +41 0x3E4A //RX_FDEQ_GAIN_2 +42 0x5464 //RX_FDEQ_GAIN_3 +43 0x7072 //RX_FDEQ_GAIN_4 +44 0x8576 //RX_FDEQ_GAIN_5 +45 0x7880 //RX_FDEQ_GAIN_6 +46 0x8888 //RX_FDEQ_GAIN_7 +47 0x949C //RX_FDEQ_GAIN_8 +48 0x96A4 //RX_FDEQ_GAIN_9 +49 0xA994 //RX_FDEQ_GAIN_10 +50 0x9487 //RX_FDEQ_GAIN_11 +51 0x6F64 //RX_FDEQ_GAIN_12 +52 0x625A //RX_FDEQ_GAIN_13 +53 0x5D80 //RX_FDEQ_GAIN_14 +54 0x8890 //RX_FDEQ_GAIN_15 +55 0x4848 //RX_FDEQ_GAIN_16 +56 0x4848 //RX_FDEQ_GAIN_17 +57 0x4848 //RX_FDEQ_GAIN_18 +58 0x4848 //RX_FDEQ_GAIN_19 +59 0x4848 //RX_FDEQ_GAIN_20 +60 0x4848 //RX_FDEQ_GAIN_21 +61 0x4848 //RX_FDEQ_GAIN_22 +62 0x4848 //RX_FDEQ_GAIN_23 +63 0x0202 //RX_FDEQ_BIN_0 +64 0x0202 //RX_FDEQ_BIN_1 +65 0x0301 //RX_FDEQ_BIN_2 +66 0x0503 //RX_FDEQ_BIN_3 +67 0x0406 //RX_FDEQ_BIN_4 +68 0x0109 //RX_FDEQ_BIN_5 +69 0x0708 //RX_FDEQ_BIN_6 +70 0x090A //RX_FDEQ_BIN_7 +71 0x0B0C //RX_FDEQ_BIN_8 +72 0x0D0E //RX_FDEQ_BIN_9 +73 0x1013 //RX_FDEQ_BIN_10 +74 0x1719 //RX_FDEQ_BIN_11 +75 0x1B0F //RX_FDEQ_BIN_12 +76 0x141E //RX_FDEQ_BIN_13 +77 0x3728 //RX_FDEQ_BIN_14 +78 0x282C //RX_FDEQ_BIN_15 +79 0x0000 //RX_FDEQ_BIN_16 +80 0x0000 //RX_FDEQ_BIN_17 +81 0x0000 //RX_FDEQ_BIN_18 +82 0x0000 //RX_FDEQ_BIN_19 +83 0x0000 //RX_FDEQ_BIN_20 +84 0x0000 //RX_FDEQ_BIN_21 +85 0x0000 //RX_FDEQ_BIN_22 +86 0x0000 //RX_FDEQ_BIN_23 +87 0x4000 //RX_FDEQ_RESRV_0 +88 0x0320 //RX_FDEQ_RESRV_1 +89 0x0018 //RX_FDDRC_BAND_MARGIN_0 +90 0x0030 //RX_FDDRC_BAND_MARGIN_1 +91 0x0050 //RX_FDDRC_BAND_MARGIN_2 +92 0x0080 //RX_FDDRC_BAND_MARGIN_3 +93 0x0007 //RX_FDDRC_BLOCK_EXP +94 0x5000 //RX_FDDRC_THRD_2_0 +95 0x5000 //RX_FDDRC_THRD_2_1 +96 0x5000 //RX_FDDRC_THRD_2_2 +97 0x5000 //RX_FDDRC_THRD_2_3 +98 0x6400 //RX_FDDRC_THRD_3_0 +99 0x6400 //RX_FDDRC_THRD_3_1 +100 0x6400 //RX_FDDRC_THRD_3_2 +101 0x6400 //RX_FDDRC_THRD_3_3 +102 0x2000 //RX_FDDRC_SLANT_0_0 +103 0x2000 //RX_FDDRC_SLANT_0_1 +104 0x2000 //RX_FDDRC_SLANT_0_2 +105 0x2000 //RX_FDDRC_SLANT_0_3 +106 0x5333 //RX_FDDRC_SLANT_1_0 +107 0x5333 //RX_FDDRC_SLANT_1_1 +108 0x5333 //RX_FDDRC_SLANT_1_2 +109 0x5333 //RX_FDDRC_SLANT_1_3 +110 0x0000 //RX_FDDRC_RESRV_0 +129 0x0076 //RX_SPK_VOL +130 0x0000 //RX_VOL_RESRV_0 +#VOL 6 +6 0x1000 //RX_TDDRC_ALPHA_UP_1 +7 0x1000 //RX_TDDRC_ALPHA_UP_2 +8 0x1000 //RX_TDDRC_ALPHA_UP_3 +9 0x1000 //RX_TDDRC_ALPHA_UP_4 +27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +33 0x7000 //RX_TDDRC_LIMITER_THRD +34 0x0800 //RX_TDDRC_LIMITER_GAIN +112 0x0001 //RX_TDDRC_THRD_0 +113 0x0002 //RX_TDDRC_THRD_1 +114 0x1800 //RX_TDDRC_THRD_2 +115 0x1800 //RX_TDDRC_THRD_3 +116 0x7FFF //RX_TDDRC_SLANT_0 +117 0x7FFF //RX_TDDRC_SLANT_1 +118 0x1000 //RX_TDDRC_ALPHA_UP_0 +119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +120 0x0000 //RX_TDDRC_HMNC_FLAG +121 0x199A //RX_TDDRC_HMNC_GAIN +122 0x0001 //RX_TDDRC_SMT_FLAG +123 0x0CCD //RX_TDDRC_SMT_W +124 0x057F //RX_TDDRC_DRC_GAIN +38 0x0020 //RX_FDEQ_SUBNUM +39 0x483E //RX_FDEQ_GAIN_0 +40 0x3E3E //RX_FDEQ_GAIN_1 +41 0x3E4A //RX_FDEQ_GAIN_2 +42 0x5464 //RX_FDEQ_GAIN_3 +43 0x7072 //RX_FDEQ_GAIN_4 +44 0x8576 //RX_FDEQ_GAIN_5 +45 0x7880 //RX_FDEQ_GAIN_6 +46 0x8888 //RX_FDEQ_GAIN_7 +47 0x949C //RX_FDEQ_GAIN_8 +48 0x96A4 //RX_FDEQ_GAIN_9 +49 0xA994 //RX_FDEQ_GAIN_10 +50 0x9487 //RX_FDEQ_GAIN_11 +51 0x6F64 //RX_FDEQ_GAIN_12 +52 0x625A //RX_FDEQ_GAIN_13 +53 0x5D80 //RX_FDEQ_GAIN_14 +54 0x8890 //RX_FDEQ_GAIN_15 +55 0x4848 //RX_FDEQ_GAIN_16 +56 0x4848 //RX_FDEQ_GAIN_17 +57 0x4848 //RX_FDEQ_GAIN_18 +58 0x4848 //RX_FDEQ_GAIN_19 +59 0x4848 //RX_FDEQ_GAIN_20 +60 0x4848 //RX_FDEQ_GAIN_21 +61 0x4848 //RX_FDEQ_GAIN_22 +62 0x4848 //RX_FDEQ_GAIN_23 +63 0x0202 //RX_FDEQ_BIN_0 +64 0x0202 //RX_FDEQ_BIN_1 +65 0x0301 //RX_FDEQ_BIN_2 +66 0x0503 //RX_FDEQ_BIN_3 +67 0x0406 //RX_FDEQ_BIN_4 +68 0x0109 //RX_FDEQ_BIN_5 +69 0x0708 //RX_FDEQ_BIN_6 +70 0x090A //RX_FDEQ_BIN_7 +71 0x0B0C //RX_FDEQ_BIN_8 +72 0x0D0E //RX_FDEQ_BIN_9 +73 0x1013 //RX_FDEQ_BIN_10 +74 0x1719 //RX_FDEQ_BIN_11 +75 0x1B0F //RX_FDEQ_BIN_12 +76 0x141E //RX_FDEQ_BIN_13 +77 0x3728 //RX_FDEQ_BIN_14 +78 0x282C //RX_FDEQ_BIN_15 +79 0x0000 //RX_FDEQ_BIN_16 +80 0x0000 //RX_FDEQ_BIN_17 +81 0x0000 //RX_FDEQ_BIN_18 +82 0x0000 //RX_FDEQ_BIN_19 +83 0x0000 //RX_FDEQ_BIN_20 +84 0x0000 //RX_FDEQ_BIN_21 +85 0x0000 //RX_FDEQ_BIN_22 +86 0x0000 //RX_FDEQ_BIN_23 +87 0x4000 //RX_FDEQ_RESRV_0 +88 0x0320 //RX_FDEQ_RESRV_1 +89 0x0018 //RX_FDDRC_BAND_MARGIN_0 +90 0x0030 //RX_FDDRC_BAND_MARGIN_1 +91 0x0050 //RX_FDDRC_BAND_MARGIN_2 +92 0x0080 //RX_FDDRC_BAND_MARGIN_3 +93 0x0007 //RX_FDDRC_BLOCK_EXP +94 0x5000 //RX_FDDRC_THRD_2_0 +95 0x5000 //RX_FDDRC_THRD_2_1 +96 0x5000 //RX_FDDRC_THRD_2_2 +97 0x5000 //RX_FDDRC_THRD_2_3 +98 0x6400 //RX_FDDRC_THRD_3_0 +99 0x6400 //RX_FDDRC_THRD_3_1 +100 0x6400 //RX_FDDRC_THRD_3_2 +101 0x6400 //RX_FDDRC_THRD_3_3 +102 0x2000 //RX_FDDRC_SLANT_0_0 +103 0x2000 //RX_FDDRC_SLANT_0_1 +104 0x2000 //RX_FDDRC_SLANT_0_2 +105 0x2000 //RX_FDDRC_SLANT_0_3 +106 0x5333 //RX_FDDRC_SLANT_1_0 +107 0x5333 //RX_FDDRC_SLANT_1_1 +108 0x5333 //RX_FDDRC_SLANT_1_2 +109 0x5333 //RX_FDDRC_SLANT_1_3 +110 0x0000 //RX_FDDRC_RESRV_0 +129 0x0100 //RX_SPK_VOL +130 0x0000 //RX_VOL_RESRV_0 +#RX 2 +157 0x003C //RX_RECVFUNC_MODE_0 +158 0x0000 //RX_RECVFUNC_MODE_1 +159 0x0003 //RX_SAMPLINGFREQ_SIG +160 0x0003 //RX_SAMPLINGFREQ_PROC +161 0x000A //RX_FRAME_SZ +162 0x0000 //RX_DELAY_OPT +163 0x1000 //RX_TDDRC_ALPHA_UP_1 +164 0x1000 //RX_TDDRC_ALPHA_UP_2 +165 0x1000 //RX_TDDRC_ALPHA_UP_3 +166 0x1000 //RX_TDDRC_ALPHA_UP_4 +167 0x05AA //RX_PGA +168 0x7FFF //RX_A_HP +169 0x4000 //RX_B_PE +170 0x5800 //RX_THR_PITCH_DET_0 +171 0x5000 //RX_THR_PITCH_DET_1 +172 0x4000 //RX_THR_PITCH_DET_2 +173 0x0008 //RX_PITCH_BFR_LEN +174 0x0003 //RX_SBD_PITCH_DET +175 0x0100 //RX_PP_RESRV_0 +176 0x0020 //RX_PP_RESRV_1 +177 0x0600 //RX_N_SN_EST +178 0x000C //RX_N2_SN_EST +179 0x000F //RX_NS_LVL_CTRL +180 0xF800 //RX_THR_SN_EST +181 0x7E00 //RX_LAMBDA_PFILT +182 0x000A //RX_FENS_RESRV_0 +183 0x0190 //RX_FENS_RESRV_1 +184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +187 0x0002 //RX_EXTRA_NS_L +188 0x0800 //RX_EXTRA_NS_A +189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +190 0x7000 //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +192 0x199A //RX_A_POST_FLT +193 0x0000 //RX_LMT_THRD +194 0x4000 //RX_LMT_ALPHA +195 0x0020 //RX_FDEQ_SUBNUM +196 0x483E //RX_FDEQ_GAIN_0 +197 0x3E3E //RX_FDEQ_GAIN_1 +198 0x3E4C //RX_FDEQ_GAIN_2 +199 0x5064 //RX_FDEQ_GAIN_3 +200 0x7076 //RX_FDEQ_GAIN_4 +201 0x897A //RX_FDEQ_GAIN_5 +202 0x7C80 //RX_FDEQ_GAIN_6 +203 0x8888 //RX_FDEQ_GAIN_7 +204 0x949C //RX_FDEQ_GAIN_8 +205 0x96A4 //RX_FDEQ_GAIN_9 +206 0xA9A0 //RX_FDEQ_GAIN_10 +207 0x9487 //RX_FDEQ_GAIN_11 +208 0x6F64 //RX_FDEQ_GAIN_12 +209 0x625A //RX_FDEQ_GAIN_13 +210 0x5D80 //RX_FDEQ_GAIN_14 +211 0x8890 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0202 //RX_FDEQ_BIN_0 +221 0x0202 //RX_FDEQ_BIN_1 +222 0x0301 //RX_FDEQ_BIN_2 +223 0x0404 //RX_FDEQ_BIN_3 +224 0x0406 //RX_FDEQ_BIN_4 +225 0x0109 //RX_FDEQ_BIN_5 +226 0x0708 //RX_FDEQ_BIN_6 +227 0x090A //RX_FDEQ_BIN_7 +228 0x0B0C //RX_FDEQ_BIN_8 +229 0x0D0E //RX_FDEQ_BIN_9 +230 0x1013 //RX_FDEQ_BIN_10 +231 0x1719 //RX_FDEQ_BIN_11 +232 0x1B0F //RX_FDEQ_BIN_12 +233 0x141E //RX_FDEQ_BIN_13 +234 0x3728 //RX_FDEQ_BIN_14 +235 0x282C //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x4000 //RX_FDEQ_RESRV_0 +245 0x0320 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0030 //RX_FDDRC_BAND_MARGIN_1 +248 0x0050 //RX_FDDRC_BAND_MARGIN_2 +249 0x0080 //RX_FDDRC_BAND_MARGIN_3 +250 0x0007 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x5000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x6400 //RX_FDDRC_THRD_3_2 +258 0x6400 //RX_FDDRC_THRD_3_3 +259 0x2000 //RX_FDDRC_SLANT_0_0 +260 0x2000 //RX_FDDRC_SLANT_0_1 +261 0x2000 //RX_FDDRC_SLANT_0_2 +262 0x2000 //RX_FDDRC_SLANT_0_3 +263 0x5333 //RX_FDDRC_SLANT_1_0 +264 0x5333 //RX_FDDRC_SLANT_1_1 +265 0x5333 //RX_FDDRC_SLANT_1_2 +266 0x5333 //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +268 0x0002 //RX_FILTINDX +269 0x0001 //RX_TDDRC_THRD_0 +270 0x0002 //RX_TDDRC_THRD_1 +271 0x1800 //RX_TDDRC_THRD_2 +272 0x1800 //RX_TDDRC_THRD_3 +273 0x7FFF //RX_TDDRC_SLANT_0 +274 0x7FFF //RX_TDDRC_SLANT_1 +275 0x1000 //RX_TDDRC_ALPHA_UP_0 +276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x199A //RX_TDDRC_HMNC_GAIN +279 0x0001 //RX_TDDRC_SMT_FLAG +280 0x0CCD //RX_TDDRC_SMT_W +281 0x0551 //RX_TDDRC_DRC_GAIN +282 0x7C00 //RX_LAMBDA_PKA_FP +283 0x13E0 //RX_TPKA_FP +284 0x0080 //RX_MIN_G_FP +285 0x2000 //RX_MAX_G_FP +286 0x0100 //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 +288 0x0000 //RX_MAXLEVEL_CNG +289 0x3000 //RX_BWE_UV_TH +290 0x3000 //RX_BWE_UV_TH2 +291 0x1800 //RX_BWE_UV_TH3 +292 0x1000 //RX_BWE_V_TH +293 0x04CD //RX_BWE_GAIN1_V_TH1 +294 0x0F33 //RX_BWE_GAIN1_V_TH2 +295 0x7333 //RX_BWE_UV_EQ +296 0x199A //RX_BWE_V_EQ +297 0x7333 //RX_BWE_TONE_TH +298 0x0004 //RX_BWE_UV_HOLD_T +299 0x6CCD //RX_BWE_GAIN2_ALPHA +300 0x799A //RX_BWE_GAIN3_ALPHA +301 0x001E //RX_BWE_CUTOFF +302 0x3000 //RX_BWE_GAINFILL +303 0x3200 //RX_BWE_MAXTH_TONE +304 0x2000 //RX_BWE_EQ_0 +305 0x2000 //RX_BWE_EQ_1 +306 0x2000 //RX_BWE_EQ_2 +307 0x2000 //RX_BWE_EQ_3 +308 0x2000 //RX_BWE_EQ_4 +309 0x2000 //RX_BWE_EQ_5 +310 0x2000 //RX_BWE_EQ_6 +311 0x0000 //RX_BWE_RESRV_0 +312 0x0000 //RX_BWE_RESRV_1 +313 0x0000 //RX_BWE_RESRV_2 +#VOL 0 +163 0x1000 //RX_TDDRC_ALPHA_UP_1 +164 0x1000 //RX_TDDRC_ALPHA_UP_2 +165 0x1000 //RX_TDDRC_ALPHA_UP_3 +166 0x1000 //RX_TDDRC_ALPHA_UP_4 +184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +190 0x7000 //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +269 0x0001 //RX_TDDRC_THRD_0 +270 0x0002 //RX_TDDRC_THRD_1 +271 0x1800 //RX_TDDRC_THRD_2 +272 0x1800 //RX_TDDRC_THRD_3 +273 0x7FFF //RX_TDDRC_SLANT_0 +274 0x7FFF //RX_TDDRC_SLANT_1 +275 0x1000 //RX_TDDRC_ALPHA_UP_0 +276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x199A //RX_TDDRC_HMNC_GAIN +279 0x0001 //RX_TDDRC_SMT_FLAG +280 0x0CCD //RX_TDDRC_SMT_W +281 0x0551 //RX_TDDRC_DRC_GAIN +195 0x0020 //RX_FDEQ_SUBNUM +196 0x483E //RX_FDEQ_GAIN_0 +197 0x3E3E //RX_FDEQ_GAIN_1 +198 0x3E4C //RX_FDEQ_GAIN_2 +199 0x5064 //RX_FDEQ_GAIN_3 +200 0x7076 //RX_FDEQ_GAIN_4 +201 0x897A //RX_FDEQ_GAIN_5 +202 0x7C80 //RX_FDEQ_GAIN_6 +203 0x8888 //RX_FDEQ_GAIN_7 +204 0x949C //RX_FDEQ_GAIN_8 +205 0x96A4 //RX_FDEQ_GAIN_9 +206 0xA9A0 //RX_FDEQ_GAIN_10 +207 0x9487 //RX_FDEQ_GAIN_11 +208 0x6F64 //RX_FDEQ_GAIN_12 +209 0x625A //RX_FDEQ_GAIN_13 +210 0x5D80 //RX_FDEQ_GAIN_14 +211 0x8890 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0202 //RX_FDEQ_BIN_0 +221 0x0202 //RX_FDEQ_BIN_1 +222 0x0301 //RX_FDEQ_BIN_2 +223 0x0404 //RX_FDEQ_BIN_3 +224 0x0406 //RX_FDEQ_BIN_4 +225 0x0109 //RX_FDEQ_BIN_5 +226 0x0708 //RX_FDEQ_BIN_6 +227 0x090A //RX_FDEQ_BIN_7 +228 0x0B0C //RX_FDEQ_BIN_8 +229 0x0D0E //RX_FDEQ_BIN_9 +230 0x1013 //RX_FDEQ_BIN_10 +231 0x1719 //RX_FDEQ_BIN_11 +232 0x1B0F //RX_FDEQ_BIN_12 +233 0x141E //RX_FDEQ_BIN_13 +234 0x3728 //RX_FDEQ_BIN_14 +235 0x282C //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x4000 //RX_FDEQ_RESRV_0 +245 0x0320 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0030 //RX_FDDRC_BAND_MARGIN_1 +248 0x0050 //RX_FDDRC_BAND_MARGIN_2 +249 0x0080 //RX_FDDRC_BAND_MARGIN_3 +250 0x0007 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x5000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x6400 //RX_FDDRC_THRD_3_2 +258 0x6400 //RX_FDDRC_THRD_3_3 +259 0x2000 //RX_FDDRC_SLANT_0_0 +260 0x2000 //RX_FDDRC_SLANT_0_1 +261 0x2000 //RX_FDDRC_SLANT_0_2 +262 0x2000 //RX_FDDRC_SLANT_0_3 +263 0x5333 //RX_FDDRC_SLANT_1_0 +264 0x5333 //RX_FDDRC_SLANT_1_1 +265 0x5333 //RX_FDDRC_SLANT_1_2 +266 0x5333 //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +286 0x000A //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 +#VOL 1 +163 0x1000 //RX_TDDRC_ALPHA_UP_1 +164 0x1000 //RX_TDDRC_ALPHA_UP_2 +165 0x1000 //RX_TDDRC_ALPHA_UP_3 +166 0x1000 //RX_TDDRC_ALPHA_UP_4 +184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +190 0x7000 //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +269 0x0001 //RX_TDDRC_THRD_0 +270 0x0002 //RX_TDDRC_THRD_1 +271 0x1800 //RX_TDDRC_THRD_2 +272 0x1800 //RX_TDDRC_THRD_3 +273 0x7FFF //RX_TDDRC_SLANT_0 +274 0x7FFF //RX_TDDRC_SLANT_1 +275 0x1000 //RX_TDDRC_ALPHA_UP_0 +276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x199A //RX_TDDRC_HMNC_GAIN +279 0x0001 //RX_TDDRC_SMT_FLAG +280 0x0CCD //RX_TDDRC_SMT_W +281 0x0551 //RX_TDDRC_DRC_GAIN +195 0x0020 //RX_FDEQ_SUBNUM +196 0x483E //RX_FDEQ_GAIN_0 +197 0x3E3E //RX_FDEQ_GAIN_1 +198 0x3E4C //RX_FDEQ_GAIN_2 +199 0x5064 //RX_FDEQ_GAIN_3 +200 0x7076 //RX_FDEQ_GAIN_4 +201 0x897A //RX_FDEQ_GAIN_5 +202 0x7C80 //RX_FDEQ_GAIN_6 +203 0x8888 //RX_FDEQ_GAIN_7 +204 0x949C //RX_FDEQ_GAIN_8 +205 0x96A4 //RX_FDEQ_GAIN_9 +206 0xA9A0 //RX_FDEQ_GAIN_10 +207 0x9487 //RX_FDEQ_GAIN_11 +208 0x6F64 //RX_FDEQ_GAIN_12 +209 0x625A //RX_FDEQ_GAIN_13 +210 0x5D80 //RX_FDEQ_GAIN_14 +211 0x8890 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0202 //RX_FDEQ_BIN_0 +221 0x0202 //RX_FDEQ_BIN_1 +222 0x0301 //RX_FDEQ_BIN_2 +223 0x0404 //RX_FDEQ_BIN_3 +224 0x0406 //RX_FDEQ_BIN_4 +225 0x0109 //RX_FDEQ_BIN_5 +226 0x0708 //RX_FDEQ_BIN_6 +227 0x090A //RX_FDEQ_BIN_7 +228 0x0B0C //RX_FDEQ_BIN_8 +229 0x0D0E //RX_FDEQ_BIN_9 +230 0x1013 //RX_FDEQ_BIN_10 +231 0x1719 //RX_FDEQ_BIN_11 +232 0x1B0F //RX_FDEQ_BIN_12 +233 0x141E //RX_FDEQ_BIN_13 +234 0x3728 //RX_FDEQ_BIN_14 +235 0x282C //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x4000 //RX_FDEQ_RESRV_0 +245 0x0320 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0030 //RX_FDDRC_BAND_MARGIN_1 +248 0x0050 //RX_FDDRC_BAND_MARGIN_2 +249 0x0080 //RX_FDDRC_BAND_MARGIN_3 +250 0x0007 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x5000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x6400 //RX_FDDRC_THRD_3_2 +258 0x6400 //RX_FDDRC_THRD_3_3 +259 0x2000 //RX_FDDRC_SLANT_0_0 +260 0x2000 //RX_FDDRC_SLANT_0_1 +261 0x2000 //RX_FDDRC_SLANT_0_2 +262 0x2000 //RX_FDDRC_SLANT_0_3 +263 0x5333 //RX_FDDRC_SLANT_1_0 +264 0x5333 //RX_FDDRC_SLANT_1_1 +265 0x5333 //RX_FDDRC_SLANT_1_2 +266 0x5333 //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +286 0x0010 //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 +#VOL 2 +163 0x1000 //RX_TDDRC_ALPHA_UP_1 +164 0x1000 //RX_TDDRC_ALPHA_UP_2 +165 0x1000 //RX_TDDRC_ALPHA_UP_3 +166 0x1000 //RX_TDDRC_ALPHA_UP_4 +184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +190 0x7000 //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +269 0x0001 //RX_TDDRC_THRD_0 +270 0x0002 //RX_TDDRC_THRD_1 +271 0x1800 //RX_TDDRC_THRD_2 +272 0x1800 //RX_TDDRC_THRD_3 +273 0x7FFF //RX_TDDRC_SLANT_0 +274 0x7FFF //RX_TDDRC_SLANT_1 +275 0x1000 //RX_TDDRC_ALPHA_UP_0 +276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x199A //RX_TDDRC_HMNC_GAIN +279 0x0001 //RX_TDDRC_SMT_FLAG +280 0x0CCD //RX_TDDRC_SMT_W +281 0x0551 //RX_TDDRC_DRC_GAIN +195 0x0020 //RX_FDEQ_SUBNUM +196 0x483E //RX_FDEQ_GAIN_0 +197 0x3E3E //RX_FDEQ_GAIN_1 +198 0x3E4C //RX_FDEQ_GAIN_2 +199 0x5064 //RX_FDEQ_GAIN_3 +200 0x7076 //RX_FDEQ_GAIN_4 +201 0x897A //RX_FDEQ_GAIN_5 +202 0x7C80 //RX_FDEQ_GAIN_6 +203 0x8888 //RX_FDEQ_GAIN_7 +204 0x949C //RX_FDEQ_GAIN_8 +205 0x96A4 //RX_FDEQ_GAIN_9 +206 0xA9A0 //RX_FDEQ_GAIN_10 +207 0x9487 //RX_FDEQ_GAIN_11 +208 0x6F64 //RX_FDEQ_GAIN_12 +209 0x625A //RX_FDEQ_GAIN_13 +210 0x5D80 //RX_FDEQ_GAIN_14 +211 0x8890 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0202 //RX_FDEQ_BIN_0 +221 0x0202 //RX_FDEQ_BIN_1 +222 0x0301 //RX_FDEQ_BIN_2 +223 0x0404 //RX_FDEQ_BIN_3 +224 0x0406 //RX_FDEQ_BIN_4 +225 0x0109 //RX_FDEQ_BIN_5 +226 0x0708 //RX_FDEQ_BIN_6 +227 0x090A //RX_FDEQ_BIN_7 +228 0x0B0C //RX_FDEQ_BIN_8 +229 0x0D0E //RX_FDEQ_BIN_9 +230 0x1013 //RX_FDEQ_BIN_10 +231 0x1719 //RX_FDEQ_BIN_11 +232 0x1B0F //RX_FDEQ_BIN_12 +233 0x141E //RX_FDEQ_BIN_13 +234 0x3728 //RX_FDEQ_BIN_14 +235 0x282C //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x4000 //RX_FDEQ_RESRV_0 +245 0x0320 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0030 //RX_FDDRC_BAND_MARGIN_1 +248 0x0050 //RX_FDDRC_BAND_MARGIN_2 +249 0x0080 //RX_FDDRC_BAND_MARGIN_3 +250 0x0007 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x5000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x6400 //RX_FDDRC_THRD_3_2 +258 0x6400 //RX_FDDRC_THRD_3_3 +259 0x2000 //RX_FDDRC_SLANT_0_0 +260 0x2000 //RX_FDDRC_SLANT_0_1 +261 0x2000 //RX_FDDRC_SLANT_0_2 +262 0x2000 //RX_FDDRC_SLANT_0_3 +263 0x5333 //RX_FDDRC_SLANT_1_0 +264 0x5333 //RX_FDDRC_SLANT_1_1 +265 0x5333 //RX_FDDRC_SLANT_1_2 +266 0x5333 //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +286 0x001B //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 +#VOL 3 +163 0x1000 //RX_TDDRC_ALPHA_UP_1 +164 0x1000 //RX_TDDRC_ALPHA_UP_2 +165 0x1000 //RX_TDDRC_ALPHA_UP_3 +166 0x1000 //RX_TDDRC_ALPHA_UP_4 +184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +190 0x7000 //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +269 0x0001 //RX_TDDRC_THRD_0 +270 0x0002 //RX_TDDRC_THRD_1 +271 0x1800 //RX_TDDRC_THRD_2 +272 0x1800 //RX_TDDRC_THRD_3 +273 0x7FFF //RX_TDDRC_SLANT_0 +274 0x7FFF //RX_TDDRC_SLANT_1 +275 0x1000 //RX_TDDRC_ALPHA_UP_0 +276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x199A //RX_TDDRC_HMNC_GAIN +279 0x0001 //RX_TDDRC_SMT_FLAG +280 0x0CCD //RX_TDDRC_SMT_W +281 0x0551 //RX_TDDRC_DRC_GAIN +195 0x0020 //RX_FDEQ_SUBNUM +196 0x483E //RX_FDEQ_GAIN_0 +197 0x3E3E //RX_FDEQ_GAIN_1 +198 0x3E4C //RX_FDEQ_GAIN_2 +199 0x5064 //RX_FDEQ_GAIN_3 +200 0x7076 //RX_FDEQ_GAIN_4 +201 0x897A //RX_FDEQ_GAIN_5 +202 0x7C80 //RX_FDEQ_GAIN_6 +203 0x8888 //RX_FDEQ_GAIN_7 +204 0x949C //RX_FDEQ_GAIN_8 +205 0x96A4 //RX_FDEQ_GAIN_9 +206 0xA9A0 //RX_FDEQ_GAIN_10 +207 0x9487 //RX_FDEQ_GAIN_11 +208 0x6F64 //RX_FDEQ_GAIN_12 +209 0x625A //RX_FDEQ_GAIN_13 +210 0x5D80 //RX_FDEQ_GAIN_14 +211 0x8890 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0202 //RX_FDEQ_BIN_0 +221 0x0202 //RX_FDEQ_BIN_1 +222 0x0301 //RX_FDEQ_BIN_2 +223 0x0404 //RX_FDEQ_BIN_3 +224 0x0406 //RX_FDEQ_BIN_4 +225 0x0109 //RX_FDEQ_BIN_5 +226 0x0708 //RX_FDEQ_BIN_6 +227 0x090A //RX_FDEQ_BIN_7 +228 0x0B0C //RX_FDEQ_BIN_8 +229 0x0D0E //RX_FDEQ_BIN_9 +230 0x1013 //RX_FDEQ_BIN_10 +231 0x1719 //RX_FDEQ_BIN_11 +232 0x1B0F //RX_FDEQ_BIN_12 +233 0x141E //RX_FDEQ_BIN_13 +234 0x3728 //RX_FDEQ_BIN_14 +235 0x282C //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x4000 //RX_FDEQ_RESRV_0 +245 0x0320 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0030 //RX_FDDRC_BAND_MARGIN_1 +248 0x0050 //RX_FDDRC_BAND_MARGIN_2 +249 0x0080 //RX_FDDRC_BAND_MARGIN_3 +250 0x0007 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x5000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x6400 //RX_FDDRC_THRD_3_2 +258 0x6400 //RX_FDDRC_THRD_3_3 +259 0x2000 //RX_FDDRC_SLANT_0_0 +260 0x2000 //RX_FDDRC_SLANT_0_1 +261 0x2000 //RX_FDDRC_SLANT_0_2 +262 0x2000 //RX_FDDRC_SLANT_0_3 +263 0x5333 //RX_FDDRC_SLANT_1_0 +264 0x5333 //RX_FDDRC_SLANT_1_1 +265 0x5333 //RX_FDDRC_SLANT_1_2 +266 0x5333 //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +286 0x0032 //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 +#VOL 4 +163 0x1000 //RX_TDDRC_ALPHA_UP_1 +164 0x1000 //RX_TDDRC_ALPHA_UP_2 +165 0x1000 //RX_TDDRC_ALPHA_UP_3 +166 0x1000 //RX_TDDRC_ALPHA_UP_4 +184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +190 0x7000 //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +269 0x0001 //RX_TDDRC_THRD_0 +270 0x0002 //RX_TDDRC_THRD_1 +271 0x1800 //RX_TDDRC_THRD_2 +272 0x1800 //RX_TDDRC_THRD_3 +273 0x7FFF //RX_TDDRC_SLANT_0 +274 0x7FFF //RX_TDDRC_SLANT_1 +275 0x1000 //RX_TDDRC_ALPHA_UP_0 +276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x199A //RX_TDDRC_HMNC_GAIN +279 0x0001 //RX_TDDRC_SMT_FLAG +280 0x0CCD //RX_TDDRC_SMT_W +281 0x0551 //RX_TDDRC_DRC_GAIN +195 0x0020 //RX_FDEQ_SUBNUM +196 0x483E //RX_FDEQ_GAIN_0 +197 0x3E3E //RX_FDEQ_GAIN_1 +198 0x3E4C //RX_FDEQ_GAIN_2 +199 0x5064 //RX_FDEQ_GAIN_3 +200 0x7076 //RX_FDEQ_GAIN_4 +201 0x897A //RX_FDEQ_GAIN_5 +202 0x7C80 //RX_FDEQ_GAIN_6 +203 0x8888 //RX_FDEQ_GAIN_7 +204 0x949C //RX_FDEQ_GAIN_8 +205 0x96A4 //RX_FDEQ_GAIN_9 +206 0xA9A0 //RX_FDEQ_GAIN_10 +207 0x9487 //RX_FDEQ_GAIN_11 +208 0x6F64 //RX_FDEQ_GAIN_12 +209 0x625A //RX_FDEQ_GAIN_13 +210 0x5D80 //RX_FDEQ_GAIN_14 +211 0x8890 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0202 //RX_FDEQ_BIN_0 +221 0x0202 //RX_FDEQ_BIN_1 +222 0x0301 //RX_FDEQ_BIN_2 +223 0x0404 //RX_FDEQ_BIN_3 +224 0x0406 //RX_FDEQ_BIN_4 +225 0x0109 //RX_FDEQ_BIN_5 +226 0x0708 //RX_FDEQ_BIN_6 +227 0x090A //RX_FDEQ_BIN_7 +228 0x0B0C //RX_FDEQ_BIN_8 +229 0x0D0E //RX_FDEQ_BIN_9 +230 0x1013 //RX_FDEQ_BIN_10 +231 0x1719 //RX_FDEQ_BIN_11 +232 0x1B0F //RX_FDEQ_BIN_12 +233 0x141E //RX_FDEQ_BIN_13 +234 0x3728 //RX_FDEQ_BIN_14 +235 0x282C //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x4000 //RX_FDEQ_RESRV_0 +245 0x0320 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0030 //RX_FDDRC_BAND_MARGIN_1 +248 0x0050 //RX_FDDRC_BAND_MARGIN_2 +249 0x0080 //RX_FDDRC_BAND_MARGIN_3 +250 0x0007 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x5000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x6400 //RX_FDDRC_THRD_3_2 +258 0x6400 //RX_FDDRC_THRD_3_3 +259 0x2000 //RX_FDDRC_SLANT_0_0 +260 0x2000 //RX_FDDRC_SLANT_0_1 +261 0x2000 //RX_FDDRC_SLANT_0_2 +262 0x2000 //RX_FDDRC_SLANT_0_3 +263 0x5333 //RX_FDDRC_SLANT_1_0 +264 0x5333 //RX_FDDRC_SLANT_1_1 +265 0x5333 //RX_FDDRC_SLANT_1_2 +266 0x5333 //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +286 0x0047 //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 +#VOL 5 +163 0x1000 //RX_TDDRC_ALPHA_UP_1 +164 0x1000 //RX_TDDRC_ALPHA_UP_2 +165 0x1000 //RX_TDDRC_ALPHA_UP_3 +166 0x1000 //RX_TDDRC_ALPHA_UP_4 +184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +190 0x7000 //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +269 0x0001 //RX_TDDRC_THRD_0 +270 0x0002 //RX_TDDRC_THRD_1 +271 0x1800 //RX_TDDRC_THRD_2 +272 0x1800 //RX_TDDRC_THRD_3 +273 0x7FFF //RX_TDDRC_SLANT_0 +274 0x7FFF //RX_TDDRC_SLANT_1 +275 0x1000 //RX_TDDRC_ALPHA_UP_0 +276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x199A //RX_TDDRC_HMNC_GAIN +279 0x0001 //RX_TDDRC_SMT_FLAG +280 0x0CCD //RX_TDDRC_SMT_W +281 0x0551 //RX_TDDRC_DRC_GAIN +195 0x0020 //RX_FDEQ_SUBNUM +196 0x483E //RX_FDEQ_GAIN_0 +197 0x3E3E //RX_FDEQ_GAIN_1 +198 0x3E4C //RX_FDEQ_GAIN_2 +199 0x5064 //RX_FDEQ_GAIN_3 +200 0x7076 //RX_FDEQ_GAIN_4 +201 0x897A //RX_FDEQ_GAIN_5 +202 0x7C80 //RX_FDEQ_GAIN_6 +203 0x8888 //RX_FDEQ_GAIN_7 +204 0x949C //RX_FDEQ_GAIN_8 +205 0x96A4 //RX_FDEQ_GAIN_9 +206 0xA9A0 //RX_FDEQ_GAIN_10 +207 0x9487 //RX_FDEQ_GAIN_11 +208 0x6F64 //RX_FDEQ_GAIN_12 +209 0x625A //RX_FDEQ_GAIN_13 +210 0x5D80 //RX_FDEQ_GAIN_14 +211 0x8890 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0202 //RX_FDEQ_BIN_0 +221 0x0202 //RX_FDEQ_BIN_1 +222 0x0301 //RX_FDEQ_BIN_2 +223 0x0404 //RX_FDEQ_BIN_3 +224 0x0406 //RX_FDEQ_BIN_4 +225 0x0109 //RX_FDEQ_BIN_5 +226 0x0708 //RX_FDEQ_BIN_6 +227 0x090A //RX_FDEQ_BIN_7 +228 0x0B0C //RX_FDEQ_BIN_8 +229 0x0D0E //RX_FDEQ_BIN_9 +230 0x1013 //RX_FDEQ_BIN_10 +231 0x1719 //RX_FDEQ_BIN_11 +232 0x1B0F //RX_FDEQ_BIN_12 +233 0x141E //RX_FDEQ_BIN_13 +234 0x3728 //RX_FDEQ_BIN_14 +235 0x282C //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x4000 //RX_FDEQ_RESRV_0 +245 0x0320 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0030 //RX_FDDRC_BAND_MARGIN_1 +248 0x0050 //RX_FDDRC_BAND_MARGIN_2 +249 0x0080 //RX_FDDRC_BAND_MARGIN_3 +250 0x0007 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x5000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x6400 //RX_FDDRC_THRD_3_2 +258 0x6400 //RX_FDDRC_THRD_3_3 +259 0x2000 //RX_FDDRC_SLANT_0_0 +260 0x2000 //RX_FDDRC_SLANT_0_1 +261 0x2000 //RX_FDDRC_SLANT_0_2 +262 0x2000 //RX_FDDRC_SLANT_0_3 +263 0x5333 //RX_FDDRC_SLANT_1_0 +264 0x5333 //RX_FDDRC_SLANT_1_1 +265 0x5333 //RX_FDDRC_SLANT_1_2 +266 0x5333 //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +286 0x0076 //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 +#VOL 6 +163 0x1000 //RX_TDDRC_ALPHA_UP_1 +164 0x1000 //RX_TDDRC_ALPHA_UP_2 +165 0x1000 //RX_TDDRC_ALPHA_UP_3 +166 0x1000 //RX_TDDRC_ALPHA_UP_4 +184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +190 0x7000 //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +269 0x0001 //RX_TDDRC_THRD_0 +270 0x0002 //RX_TDDRC_THRD_1 +271 0x1800 //RX_TDDRC_THRD_2 +272 0x1800 //RX_TDDRC_THRD_3 +273 0x7FFF //RX_TDDRC_SLANT_0 +274 0x7FFF //RX_TDDRC_SLANT_1 +275 0x1000 //RX_TDDRC_ALPHA_UP_0 +276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x199A //RX_TDDRC_HMNC_GAIN +279 0x0001 //RX_TDDRC_SMT_FLAG +280 0x0CCD //RX_TDDRC_SMT_W +281 0x0551 //RX_TDDRC_DRC_GAIN +195 0x0020 //RX_FDEQ_SUBNUM +196 0x483E //RX_FDEQ_GAIN_0 +197 0x3E3E //RX_FDEQ_GAIN_1 +198 0x3E4C //RX_FDEQ_GAIN_2 +199 0x5064 //RX_FDEQ_GAIN_3 +200 0x7076 //RX_FDEQ_GAIN_4 +201 0x897A //RX_FDEQ_GAIN_5 +202 0x7C80 //RX_FDEQ_GAIN_6 +203 0x8888 //RX_FDEQ_GAIN_7 +204 0x949C //RX_FDEQ_GAIN_8 +205 0x96A4 //RX_FDEQ_GAIN_9 +206 0xA9A0 //RX_FDEQ_GAIN_10 +207 0x9487 //RX_FDEQ_GAIN_11 +208 0x6F64 //RX_FDEQ_GAIN_12 +209 0x625A //RX_FDEQ_GAIN_13 +210 0x5D80 //RX_FDEQ_GAIN_14 +211 0x8890 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0202 //RX_FDEQ_BIN_0 +221 0x0202 //RX_FDEQ_BIN_1 +222 0x0301 //RX_FDEQ_BIN_2 +223 0x0404 //RX_FDEQ_BIN_3 +224 0x0406 //RX_FDEQ_BIN_4 +225 0x0109 //RX_FDEQ_BIN_5 +226 0x0708 //RX_FDEQ_BIN_6 +227 0x090A //RX_FDEQ_BIN_7 +228 0x0B0C //RX_FDEQ_BIN_8 +229 0x0D0E //RX_FDEQ_BIN_9 +230 0x1013 //RX_FDEQ_BIN_10 +231 0x1719 //RX_FDEQ_BIN_11 +232 0x1B0F //RX_FDEQ_BIN_12 +233 0x141E //RX_FDEQ_BIN_13 +234 0x3728 //RX_FDEQ_BIN_14 +235 0x282C //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x4000 //RX_FDEQ_RESRV_0 +245 0x0320 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0030 //RX_FDDRC_BAND_MARGIN_1 +248 0x0050 //RX_FDDRC_BAND_MARGIN_2 +249 0x0080 //RX_FDDRC_BAND_MARGIN_3 +250 0x0007 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x5000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x6400 //RX_FDDRC_THRD_3_2 +258 0x6400 //RX_FDDRC_THRD_3_3 +259 0x2000 //RX_FDDRC_SLANT_0_0 +260 0x2000 //RX_FDDRC_SLANT_0_1 +261 0x2000 //RX_FDDRC_SLANT_0_2 +262 0x2000 //RX_FDDRC_SLANT_0_3 +263 0x5333 //RX_FDDRC_SLANT_1_0 +264 0x5333 //RX_FDDRC_SLANT_1_1 +265 0x5333 //RX_FDDRC_SLANT_1_2 +266 0x5333 //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +286 0x0100 //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 + +#CASE_NAME HANDSET-HANDSET_HAC-RESERVE2-SWB +#PARAM_MODE Simple +#PARAM_TYPE TX+2RX +#TOTAL_CUSTOM_STEP 7+7 +#TX +0 0x0000 //TX_OPERATION_MODE_0 +1 0x0000 //TX_OPERATION_MODE_1 +2 0x0076 //TX_PATCH_REG +3 0x6F7E //TX_SENDFUNC_MODE_0 +4 0x0001 //TX_SENDFUNC_MODE_1 +5 0x0002 //TX_NUM_MIC +6 0x0003 //TX_SAMPLINGFREQ_SIG +7 0x0003 //TX_SAMPLINGFREQ_PROC +8 0x000A //TX_FRAME_SZ_SIG +9 0x000A //TX_FRAME_SZ +10 0x0000 //TX_DELAY_OPT +11 0x0028 //TX_MAX_TAIL_LENGTH +12 0x0001 //TX_NUM_LOUTCHN +13 0x0001 //TX_MAXNUM_AECREF +14 0x0000 //TX_DBG_FUNC_REG +15 0x0000 //TX_DBG_FUNC_REG1 +16 0x0000 //TX_SYS_RESRV_0 +17 0x0000 //TX_SYS_RESRV_1 +18 0x0000 //TX_SYS_RESRV_2 +19 0x0000 //TX_SYS_RESRV_3 +20 0x0000 //TX_DIST2REF0 +21 0x00A3 //TX_DIST2REF1 +22 0x0000 //TX_DIST2REF_02 +23 0x0000 //TX_DIST2REF_03 +24 0x0000 //TX_DIST2REF_04 +25 0x0000 //TX_DIST2REF_05 +26 0x0000 //TX_MMIC +27 0x1000 //TX_PGA_0 +28 0x1000 //TX_PGA_1 +29 0x1000 //TX_PGA_2 +30 0x0000 //TX_PGA_3 +31 0x0000 //TX_PGA_4 +32 0x0000 //TX_PGA_5 +33 0x0000 //TX_MIC_PAIRS +34 0x0000 //TX_MIC_PAIRS_HS +35 0x0002 //TX_MICS_FOR_BF +36 0x0000 //TX_MIC_PAIRS_FORL1 +37 0x0002 //TX_MICS_OF_PAIR0 +38 0x0002 //TX_MICS_OF_PAIR1 +39 0x0002 //TX_MICS_OF_PAIR2 +40 0x0002 //TX_MICS_OF_PAIR3 +41 0x0000 //TX_MIC_DATA_SRC0 +42 0x0002 //TX_MIC_DATA_SRC1 +43 0x0001 //TX_MIC_DATA_SRC2 +44 0x0000 //TX_MIC_DATA_SRC3 +45 0x0000 //TX_MIC_PAIR_CH_04 +46 0x0000 //TX_MIC_PAIR_CH_05 +47 0x0000 //TX_MIC_PAIR_CH_10 +48 0x0000 //TX_MIC_PAIR_CH_11 +49 0x0000 //TX_MIC_PAIR_CH_12 +50 0x0000 //TX_MIC_PAIR_CH_13 +51 0x0000 //TX_MIC_PAIR_CH_14 +52 0x05DC //TX_HD_BIN_MASK +53 0x0010 //TX_HD_SUBAND_MASK +54 0x19A1 //TX_HD_FRAME_AVG_MASK +55 0x0320 //TX_HD_MIN_FRQ +56 0x1000 //TX_HD_ALPHA_PSD +57 0x1100 //TX_T_PHPR1 +58 0x0000 //TX_T_PHPR2 +59 0x0000 //TX_T_PTPR +60 0x0000 //TX_T_PNPR +61 0x0000 //TX_T_PAPR1 +62 0xEE6C //TX_T_PSDVAT +63 0x0800 //TX_CNT +64 0x4000 //TX_ANTI_HOWL_GAIN +65 0x0001 //TX_MICFORBFMARK_0 +66 0x0001 //TX_MICFORBFMARK_1 +67 0x0001 //TX_MICFORBFMARK_2 +68 0x0001 //TX_MICFORBFMARK_3 +69 0x0001 //TX_MICFORBFMARK_4 +70 0x0001 //TX_MICFORBFMARK_5 +71 0x0000 //TX_DIST2REF_10 +72 0x3A66 //TX_DIST2REF_11 +73 0x0000 //TX_DIST2REF2 +74 0x0000 //TX_DIST2REF_13 +75 0x0000 //TX_DIST2REF_14 +76 0x0000 //TX_DIST2REF_15 +77 0x0000 //TX_DIST2REF_20 +78 0x0000 //TX_DIST2REF_21 +79 0x0000 //TX_DIST2REF_22 +80 0x0000 //TX_DIST2REF_23 +81 0x0000 //TX_DIST2REF_24 +82 0x0000 //TX_DIST2REF_25 +83 0x0000 //TX_DIST2REF_30 +84 0x0000 //TX_DIST2REF_31 +85 0x0000 //TX_DIST2REF_32 +86 0x0000 //TX_DIST2REF_33 +87 0x0000 //TX_DIST2REF_34 +88 0x0000 //TX_DIST2REF_35 +89 0x0000 //TX_MIC_LOC_00 +90 0x0000 //TX_MIC_LOC_01 +91 0x0000 //TX_MIC_LOC_02 +92 0x0000 //TX_MIC_LOC_03 +93 0x0000 //TX_MIC_LOC_04 +94 0x0000 //TX_MIC_LOC_05 +95 0x0000 //TX_MIC_LOC_10 +96 0x0000 //TX_MIC_LOC_11 +97 0x0000 //TX_MIC_LOC_12 +98 0x0000 //TX_MIC_LOC_13 +99 0x0000 //TX_MIC_LOC_14 +100 0x0000 //TX_MIC_LOC_15 +101 0x0000 //TX_MIC_LOC_20 +102 0x0000 //TX_MIC_LOC_21 +103 0x0000 //TX_MIC_LOC_22 +104 0x0000 //TX_MIC_LOC_23 +105 0x0000 //TX_MIC_LOC_24 +106 0x0000 //TX_MIC_LOC_25 +107 0x0200 //TX_MIC_REFBLK_VOLUME +108 0x0AAC //TX_MIC_BLOCK_VOLUME +109 0x0000 //TX_INVERSE_MASK +110 0x0000 //TX_ADCS_MASK +111 0x04D0 //TX_ADCS_GAIN +112 0x4000 //TX_NFC_GAINFAC +113 0x0000 //TX_MAINMIC_BLKFACTOR +114 0x0000 //TX_REFMIC_BLKFACTOR +115 0x0000 //TX_BLMIC_BLKFACTOR +116 0x0000 //TX_BRMIC_BLKFACTOR +117 0x0031 //TX_MICBLK_START_BIN +118 0x0060 //TX_MICBLK_END_BIN +119 0x0015 //TX_MICBLK_FE_HOLD +120 0xFFF2 //TX_MICBLK_MR_EXP_TH +121 0xFFF2 //TX_MICBLK_LR_EXP_TH +122 0x0000 //TX_FENE_HOLD +123 0x4000 //TX_FE_ENER_TH_MTS +124 0x0004 //TX_FE_ENER_TH_EXP +125 0x6000 //TX_C_POST_FLT_MIC_MAINBLK +126 0x6000 //TX_C_POST_FLT_MIC_REFBLK +127 0x0010 //TX_MIC_BLOCK_N +128 0x7E56 //TX_A_HP +129 0x4000 //TX_B_PE +130 0x1800 //TX_THR_PITCH_DET_0 +131 0x1000 //TX_THR_PITCH_DET_1 +132 0x0800 //TX_THR_PITCH_DET_2 +133 0x0008 //TX_PITCH_BFR_LEN +134 0x0003 //TX_SBD_PITCH_DET +135 0x0050 //TX_TD_AEC_L +136 0x4000 //TX_MU0_UNP_TD_AEC +137 0x1000 //TX_MU0_PTD_TD_AEC +138 0x0000 //TX_PP_RESRV_0 +139 0x2A94 //TX_PP_RESRV_1 +140 0x55F0 //TX_PP_RESRV_2 +141 0x0000 //TX_PP_RESRV_3 +142 0x0000 //TX_PP_RESRV_4 +143 0x0000 //TX_PP_RESRV_5 +144 0x0000 //TX_PP_RESRV_6 +145 0x0000 //TX_PP_RESRV_7 +146 0x0028 //TX_TAIL_LENGTH +147 0x0080 //TX_AEC_REF_GAIN_0 +148 0x0800 //TX_AEC_REF_GAIN_1 +149 0x0800 //TX_AEC_REF_GAIN_2 +150 0x7900 //TX_EAD_THR +151 0x2000 //TX_THR_RE_EST +152 0x0400 //TX_MIN_EQ_RE_EST_0 +153 0x0400 //TX_MIN_EQ_RE_EST_1 +154 0x0800 //TX_MIN_EQ_RE_EST_2 +155 0x0800 //TX_MIN_EQ_RE_EST_3 +156 0x1000 //TX_MIN_EQ_RE_EST_4 +157 0x1000 //TX_MIN_EQ_RE_EST_5 +158 0x1000 //TX_MIN_EQ_RE_EST_6 +159 0x1000 //TX_MIN_EQ_RE_EST_7 +160 0x1000 //TX_MIN_EQ_RE_EST_8 +161 0x1000 //TX_MIN_EQ_RE_EST_9 +162 0x1000 //TX_MIN_EQ_RE_EST_10 +163 0x1000 //TX_MIN_EQ_RE_EST_11 +164 0x1000 //TX_MIN_EQ_RE_EST_12 +165 0x3000 //TX_LAMBDA_RE_EST +166 0x1000 //TX_LAMBDA_CB_NLE +167 0x1800 //TX_C_POST_FLT +168 0x4000 //TX_GAIN_NP +169 0x003C //TX_SE_HOLD_N +170 0x0046 //TX_DT_HOLD_N +171 0x03E8 //TX_DT2_HOLD_N +172 0x6666 //TX_AEC_RESRV_0 +173 0x0000 //TX_AEC_RESRV_1 +174 0x0014 //TX_AEC_RESRV_2 +175 0x0000 //TX_MIC_DELAY_LENGTH +176 0x0000 //TX_REF_DELAY_LENGTH +177 0x0000 //TX_ADD_LINEIN_GAINL +178 0x0000 //TX_ADD_LINEIN_GAINH +179 0x0000 //TX_MIN_EQ_RE_EST_14 +180 0x0000 //TX_DTD_THR1_8 +181 0x7FFF //TX_DTD_THR2_8 +182 0x0000 //TX_DTD_MIC_BLK2 +183 0x0008 //TX_FRQ_LIN_LEN +184 0x7FFF //TX_FRQ_AEC_LEN_RHO +185 0x6000 //TX_MU0_UNP_FRQ_AEC +186 0x4000 //TX_MU0_PTD_FRQ_AEC +187 0x000A //TX_MINENOISETH +188 0x0800 //TX_MU0_RE_EST +189 0x0001 //TX_AEC_NUM_CH +190 0x0000 //TX_BIGECHOATTENUATION_MAX +191 0x2000 //TX_A_POST_FLT_MICBLK +192 0x0000 //TX_BLKENERTH +193 0x0000 //TX_BLKENERHIGHTH +194 0x0000 //TX_NORMENERTH +195 0x0000 //TX_NORMENERHIGHTH +196 0x0000 //TX_NORMENERHIGHTHL +197 0x7000 //TX_DTD_THR1_0 +198 0x7000 //TX_DTD_THR1_1 +199 0x7000 //TX_DTD_THR1_2 +200 0x7F00 //TX_DTD_THR1_3 +201 0x7F00 //TX_DTD_THR1_4 +202 0x7F00 //TX_DTD_THR1_5 +203 0x7F00 //TX_DTD_THR1_6 +204 0x2000 //TX_DTD_THR2_0 +205 0x2000 //TX_DTD_THR2_1 +206 0x2000 //TX_DTD_THR2_2 +207 0x1000 //TX_DTD_THR2_3 +208 0x1000 //TX_DTD_THR2_4 +209 0x1000 //TX_DTD_THR2_5 +210 0x1000 //TX_DTD_THR2_6 +211 0x6000 //TX_DTD_THR3 +212 0x0177 //TX_SPK_CUT_K +213 0x1B58 //TX_DT_CUT_K +214 0x0100 //TX_DT_CUT_THR +215 0x04EB //TX_COMFORT_G +216 0x01F4 //TX_POWER_YOUT_TH +217 0x4000 //TX_FDPFGAINECHO +218 0x0000 //TX_DTD_HD_THR +219 0x0000 //TX_SPK_CUT_K_S +220 0x0000 //TX_DTD_MIC_BLK +221 0x0400 //TX_ADPT_STRICT_L +222 0x0200 //TX_ADPT_STRICT_H +223 0x0C00 //TX_RATIO_DT_L_TH_LOW +224 0x2000 //TX_RATIO_DT_H_TH_LOW +225 0x1800 //TX_RATIO_DT_L_TH_HIGH +226 0x3000 //TX_RATIO_DT_H_TH_HIGH +227 0x0A00 //TX_RATIO_DT_L0_TH +228 0x7000 //TX_B_POST_FILT_ECHO_L +229 0x7FFF //TX_B_POST_FILT_ECHO_H +230 0x0200 //TX_MIN_G_CTRL_ECHO +231 0x7FFF //TX_B_LESSCUT_RTO_ECHO +232 0x0000 //TX_EPD_OFFSET_00 +233 0x0000 //TX_EPD_OFFST_01 +234 0x1388 //TX_RATIO_DT_L0_TH_HIGH +235 0x3A98 //TX_RATIO_DT_H_TH_CUT +236 0x7FFF //TX_MIN_EQ_RE_EST_13 +237 0x0000 //TX_DTD_THR1_7 +238 0x0000 //TX_DTD_THR2_7 +239 0x0800 //TX_DT_RESRV_7 +240 0x0800 //TX_DT_RESRV_8 +241 0x0000 //TX_DT_RESRV_9 +242 0xF600 //TX_THR_SN_EST_0 +243 0xFA00 //TX_THR_SN_EST_1 +244 0xFA00 //TX_THR_SN_EST_2 +245 0xF800 //TX_THR_SN_EST_3 +246 0xF800 //TX_THR_SN_EST_4 +247 0xF800 //TX_THR_SN_EST_5 +248 0xF800 //TX_THR_SN_EST_6 +249 0xF700 //TX_THR_SN_EST_7 +250 0x0000 //TX_DELTA_THR_SN_EST_0 +251 0x0200 //TX_DELTA_THR_SN_EST_1 +252 0x0200 //TX_DELTA_THR_SN_EST_2 +253 0x0200 //TX_DELTA_THR_SN_EST_3 +254 0x0100 //TX_DELTA_THR_SN_EST_4 +255 0x0200 //TX_DELTA_THR_SN_EST_5 +256 0x0100 //TX_DELTA_THR_SN_EST_6 +257 0x0200 //TX_DELTA_THR_SN_EST_7 +258 0x4000 //TX_LAMBDA_NN_EST_0 +259 0x4000 //TX_LAMBDA_NN_EST_1 +260 0x4000 //TX_LAMBDA_NN_EST_2 +261 0x4000 //TX_LAMBDA_NN_EST_3 +262 0x4000 //TX_LAMBDA_NN_EST_4 +263 0x4000 //TX_LAMBDA_NN_EST_5 +264 0x4000 //TX_LAMBDA_NN_EST_6 +265 0x4000 //TX_LAMBDA_NN_EST_7 +266 0x0400 //TX_N_SN_EST +267 0x001E //TX_INBEAM_T +268 0x0041 //TX_INBEAMHOLDT +269 0x2000 //TX_G_STRICT +270 0x2000 //TX_EQ_THR_BF +271 0x799A //TX_LAMBDA_EQ_BF +272 0x1000 //TX_NE_RTO_TH +273 0x1000 //TX_NE_RTO_TH_L +274 0x1000 //TX_MAINREFRTOH_TH_H +275 0x0600 //TX_MAINREFRTOH_TH_L +276 0x2000 //TX_MAINREFRTO_TH_H +277 0x1400 //TX_MAINREFRTO_TH_L +278 0x0000 //TX_MAINREFRTO_TH_EQ +279 0x1000 //TX_B_POST_FLT_0 +280 0x1000 //TX_B_POST_FLT_1 +281 0x0014 //TX_NS_LVL_CTRL_0 +282 0x002C //TX_NS_LVL_CTRL_1 +283 0x0016 //TX_NS_LVL_CTRL_2 +284 0x0018 //TX_NS_LVL_CTRL_3 +285 0x0016 //TX_NS_LVL_CTRL_4 +286 0x0012 //TX_NS_LVL_CTRL_5 +287 0x0016 //TX_NS_LVL_CTRL_6 +288 0x0017 //TX_NS_LVL_CTRL_7 +289 0x000E //TX_MIN_GAIN_S_0 +290 0x000D //TX_MIN_GAIN_S_1 +291 0x0012 //TX_MIN_GAIN_S_2 +292 0x0010 //TX_MIN_GAIN_S_3 +293 0x0012 //TX_MIN_GAIN_S_4 +294 0x0012 //TX_MIN_GAIN_S_5 +295 0x0012 //TX_MIN_GAIN_S_6 +296 0x0012 //TX_MIN_GAIN_S_7 +297 0x6000 //TX_NMOS_SUP +298 0x0000 //TX_NS_MAX_PRI_SNR_TH +299 0x0000 //TX_NMOS_SUP_MENSA +300 0x7FFF //TX_SNRI_SUP_0 +301 0x6000 //TX_SNRI_SUP_1 +302 0x6000 //TX_SNRI_SUP_2 +303 0x6000 //TX_SNRI_SUP_3 +304 0x6000 //TX_SNRI_SUP_4 +305 0x6000 //TX_SNRI_SUP_5 +306 0x6000 //TX_SNRI_SUP_6 +307 0x6000 //TX_SNRI_SUP_7 +308 0x6000 //TX_THR_LFNS +309 0x0017 //TX_G_LFNS +310 0x09C4 //TX_GAIN0_NTH +311 0x000A //TX_MUSIC_MORENS +312 0x7FFF //TX_A_POST_FILT_0 +313 0x2000 //TX_A_POST_FILT_1 +314 0x4000 //TX_A_POST_FILT_S_0 +315 0x4000 //TX_A_POST_FILT_S_1 +316 0x4000 //TX_A_POST_FILT_S_2 +317 0x4000 //TX_A_POST_FILT_S_3 +318 0x4000 //TX_A_POST_FILT_S_4 +319 0x4000 //TX_A_POST_FILT_S_5 +320 0x5000 //TX_A_POST_FILT_S_6 +321 0x7000 //TX_A_POST_FILT_S_7 +322 0x1000 //TX_B_POST_FILT_0 +323 0x1000 //TX_B_POST_FILT_1 +324 0x2000 //TX_B_POST_FILT_2 +325 0x2000 //TX_B_POST_FILT_3 +326 0x2000 //TX_B_POST_FILT_4 +327 0x1000 //TX_B_POST_FILT_5 +328 0x3000 //TX_B_POST_FILT_6 +329 0x3000 //TX_B_POST_FILT_7 +330 0x1000 //TX_B_LESSCUT_RTO_S_0 +331 0x1000 //TX_B_LESSCUT_RTO_S_1 +332 0x1000 //TX_B_LESSCUT_RTO_S_2 +333 0x1000 //TX_B_LESSCUT_RTO_S_3 +334 0x1000 //TX_B_LESSCUT_RTO_S_4 +335 0x1000 //TX_B_LESSCUT_RTO_S_5 +336 0x1000 //TX_B_LESSCUT_RTO_S_6 +337 0x1000 //TX_B_LESSCUT_RTO_S_7 +338 0x7E14 //TX_LAMBDA_PFILT +339 0x7C29 //TX_LAMBDA_PFILT_S_0 +340 0x7C29 //TX_LAMBDA_PFILT_S_1 +341 0x7C29 //TX_LAMBDA_PFILT_S_2 +342 0x7C29 //TX_LAMBDA_PFILT_S_3 +343 0x7C29 //TX_LAMBDA_PFILT_S_4 +344 0x7C29 //TX_LAMBDA_PFILT_S_5 +345 0x7C29 //TX_LAMBDA_PFILT_S_6 +346 0x7C29 //TX_LAMBDA_PFILT_S_7 +347 0x07D0 //TX_K_PEPPER +348 0x0800 //TX_A_PEPPER +349 0x1D4C //TX_K_PEPPER_HF +350 0x0400 //TX_A_PEPPER_HF +351 0x0001 //TX_HMNC_BST_FLG +352 0x4000 //TX_HMNC_BST_THR +353 0x0800 //TX_DT_BINVAD_TH_0 +354 0x0800 //TX_DT_BINVAD_TH_1 +355 0x0800 //TX_DT_BINVAD_TH_2 +356 0x0800 //TX_DT_BINVAD_TH_3 +357 0x0000 //TX_DT_BINVAD_ENDF +358 0x1000 //TX_C_POST_FLT_DT +359 0x7FFF //TX_NS_B_POST_FLT_LESSCUT +360 0x0100 //TX_DT_BOOST +361 0x0000 //TX_BF_SGRAD_FLG +362 0x0005 //TX_BF_DVG_TH +363 0x001E //TX_SN_C_F +364 0x0000 //TX_K_APT +365 0x0001 //TX_NOISEDET +366 0x0190 //TX_NDETCT +367 0x000A //TX_NOISE_TH_0 +368 0x7FFF //TX_NOISE_TH_0_2 +369 0x7FFF //TX_NOISE_TH_0_3 +370 0x00C6 //TX_NOISE_TH_1 +371 0x0DAC //TX_NOISE_TH_2 +372 0x2260 //TX_NOISE_TH_3 +373 0x7080 //TX_NOISE_TH_4 +374 0x57E4 //TX_NOISE_TH_5 +375 0x4BD6 //TX_NOISE_TH_5_2 +376 0x0001 //TX_NOISE_TH_5_3 +377 0x4E20 //TX_NOISE_TH_5_4 +378 0x1194 //TX_NOISE_TH_6 +379 0x0014 //TX_MINENOISE_TH +380 0xD508 //TX_MORENS_TFMASK_TH +381 0x0001 //TX_DRC_QUIET_FLOOR +382 0x6D60 //TX_RATIODTL_CUT_TH +383 0x0DAC //TX_DT_CUT_K1 +384 0x00A5 //TX_OUT_ENER_S_TH_CLEAN +385 0x00A5 //TX_OUT_ENER_S_TH_LESSCLEAN +386 0x00A5 //TX_OUT_ENER_S_TH_NOISY +387 0x0029 //TX_OUT_ENER_TH_NOISE +388 0x0200 //TX_OUT_ENER_TH_SPEECH +389 0x2000 //TX_SN_NPB_GAIN +390 0x0000 //TX_NN_NPB_GAIN +391 0x3000 //TX_POST_MASK_SUP_HSNE +392 0x07D0 //TX_TAIL_DET_TH +393 0x4000 //TX_B_LESSCUT_RTO_WTA +394 0x0000 //TX_MEL_G_R +395 0x0080 //TX_SUPHIGH_TH +396 0x0000 //TX_MASK_G_R +397 0x0002 //TX_EXTRA_NS_L +398 0x1800 //TX_C_POST_FLT_MASK +399 0x7FFF //TX_A_POST_FLT_WNS +400 0x0148 //TX_MIN_G_LOW300HZ +401 0x0004 //TX_MAXLEVEL_CNG +402 0x00B4 //TX_STN_NOISE_TH +403 0x4000 //TX_POST_MASK_SUP +404 0x7FFF //TX_POST_MASK_ADJUST +405 0x00C8 //TX_NS_ENOISE_MIC0_TH +406 0x0014 //TX_MINENOISE_MIC0_TH +407 0x012C //TX_MINENOISE_MIC0_S_TH +408 0x2900 //TX_MIN_G_CTRL_SSNS +409 0x0800 //TX_METAL_RTO_THR +410 0x0FA0 //TX_NS_FP_K_METAL +411 0x3A98 //TX_NOISEDET_BOOST_TH +412 0x0FA0 //TX_NSMOOTH_TH +413 0x0000 //TX_NS_RESRV_8 +414 0x1800 //TX_RHO_UPB +415 0x2328 //TX_N_HOLD_HS +416 0x006E //TX_N_RHO_BFR0 +417 0x7FFF //TX_LAMBDA_ARSP_EST +418 0x0100 //TX_EXTRA_GAIN_MICBLOCK +419 0x0333 //TX_THR_STD_NSR +420 0x019A //TX_THR_STD_PLH +421 0x03E8 //TX_N_HOLD_STD +422 0x0066 //TX_THR_STD_RHO +423 0x2800 //TX_BF_RESET_THR_HS +424 0x0CCD //TX_SB_RTO_MEAN_TH +425 0x0300 //TX_SB_RHO_MEAN_TH_NTALK +426 0x2000 //TX_SB_RTO_MEAN_TH_ABN +427 0x2EE0 //TX_SB_RTO_MEAN_TH_RUB +428 0x0990 //TX_WTA_EN_RTO_TH +429 0x1400 //TX_TOP_ENER_TH_F +430 0x0100 //TX_DESIRED_TALK_HOLDT +431 0x0800 //TX_MIC_BLOCK_FACTOR +432 0x0000 //TX_NSEST_BFRLRNRDC +433 0x0000 //TX_THR_POST_FLT_HS +434 0x0010 //TX_HS_VAD_BIN +435 0x2666 //TX_THR_VAD_HS +436 0x2CCD //TX_MEAN_RTO_MIN_TH2 +437 0x0032 //TX_SILENCE_T +438 0x0000 //TX_A_POST_FLT_WTA +439 0x799A //TX_LAMBDA_PFLT_WTA +440 0x051E //TX_SB_RHO_MEAN2_TH +441 0x02F0 //TX_SB_RHO_MEAN3_TH +442 0x0000 //TX_HS_RESRV_4 +443 0x0000 //TX_HS_RESRV_5 +444 0x0001 //TX_DOA_VAD_THR_1 +445 0x003C //TX_DOA_VAD_THR_2 +446 0x0028 //TX_DOA_VAD_THR1_0 +447 0x0028 //TX_DOA_VAD_THR1_1 +448 0x0000 //TX_SRC_DOA_RNG_LOW_0A +449 0x001E //TX_SRC_DOA_RNG_HIGH_0A +450 0x005A //TX_DFLT_SRC_DOA_0A +451 0x0000 //TX_SRC_DOA_RNG_LOW_0B +452 0x0000 //TX_SRC_DOA_RNG_HIGH_0B +453 0x0000 //TX_DFLT_SRC_DOA_0B +454 0x0000 //TX_SRC_DOA_RNG_LOW_0C +455 0x0000 //TX_SRC_DOA_RNG_HIGH_0C +456 0x0000 //TX_DFLT_SRC_DOA_0C +457 0x0000 //TX_SRC_DOA_RNG_LOW_0D +458 0x0000 //TX_SRC_DOA_RNG_HIGH_0D +459 0x0000 //TX_DFLT_SRC_DOA_0D +460 0x0000 //TX_SRC_DOA_RNG_LOW_1A +461 0x00B4 //TX_SRC_DOA_RNG_HIGH_1A +462 0x005A //TX_DFLT_SRC_DOA_1A +463 0x0000 //TX_SRC_DOA_RNG_LOW_1B +464 0x00B4 //TX_SRC_DOA_RNG_HIGH_1B +465 0x005A //TX_DFLT_SRC_DOA_1B +466 0x0000 //TX_SRC_DOA_RNG_LOW_1C +467 0x00B4 //TX_SRC_DOA_RNG_HIGH_1C +468 0x005A //TX_DFLT_SRC_DOA_1C +469 0x0000 //TX_SRC_DOA_RNG_LOW_1D +470 0x00B4 //TX_SRC_DOA_RNG_HIGH_1D +471 0x005A //TX_DFLT_SRC_DOA_1D +472 0x0100 //TX_BF_HOLDOFF_T +473 0x7FFF //TX_DOA_COST_FACTOR +474 0x0D9A //TX_MAINTOREFR_TH0 +475 0x071C //TX_DOA_TRK_THR +476 0x012C //TX_DOA_TRACK_HT +477 0x0200 //TX_N1_HOLD_HF +478 0x0100 //TX_N2_HOLD_HF +479 0x2A3D //TX_BF_RESET_THR_HF +480 0x7333 //TX_DOA_SMOOTH +481 0x0800 //TX_MU_BF +482 0x0800 //TX_BF_MU_LF_B2 +483 0x0040 //TX_BF_FC_END_BIN_B2 +484 0x0020 //TX_BF_FC_END_BIN +485 0x0000 //TX_HF_RESRV_25 +486 0x0000 //TX_HF_RESRV_26 +487 0x0007 //TX_N_DOA_SEED +488 0x0001 //TX_FINE_DOA_SEARCH_FLG +489 0x0000 //TX_HF_RESRV_27 +490 0x038E //TX_DLT_SRC_DOA_RNG +491 0x0200 //TX_BF_MU_LF +492 0x0000 //TX_DFLT_SRC_LOC_0 +493 0x7FFF //TX_DFLT_SRC_LOC_1 +494 0x0000 //TX_DFLT_SRC_LOC_2 +495 0x038E //TX_DOA_TRACK_VADTH +496 0x0000 //TX_DOA_TRACK_NEW +497 0x0300 //TX_NOR_OFF_THR +498 0x7C00 //TX_MORE_ON_700HZ_THR +499 0x2000 //TX_MU_BF_ADPT_NS +500 0x0000 //TX_ADAPT_LEN +501 0x6666 //TX_MORE_SNS +502 0x0000 //TX_NOR_OFF_TH1 +503 0x0000 //TX_WIDE_MASK_TH +504 0xD333 //TX_SUBSNRATIOHIGH4MEANBCK_THR +505 0x6000 //TX_C_POST_FLT_CUT +506 0x2000 //TX_RADIODTLV +507 0x0320 //TX_POWER_LINEIN_TH +508 0x0014 //TX_FE_VADCOUNT_TH_FC +509 0x0000 //TX_ECHO_SUPP_FC +510 0x0C80 //TX_ECHO_TH +511 0x6666 //TX_MIC_TO_BFGAIN +512 0x0000 //TX_MICTOBFGAIN0 +513 0x0000 //TX_FASTMUE_TH +514 0x2CCC //TX_DEREVERB_LF_MU +515 0x3200 //TX_DEREVERB_HF_MU +516 0x0007 //TX_DEREVERB_DELAY +517 0x0004 //TX_DEREVERB_COEF_LEN +518 0x0003 //TX_DEREVERB_DNR +519 0x0000 //TX_DEREVERB_ALPHA +520 0x0000 //TX_DEREVERB_BETA +521 0x3A98 //TX_GSC_RTOL_TH +522 0x3A98 //TX_GSC_RTOH_TH +523 0x7E2C //TX_WIDE2_MEANHTH +524 0x0000 //TX_DR_RESRV_5 +525 0x0000 //TX_DR_RESRV_6 +526 0x0000 //TX_DR_RESRV_7 +527 0x0000 //TX_DR_RESRV_8 +528 0x1333 //TX_WIND_MARK_TH +529 0x399A //TX_CORR_THR +530 0x0004 //TX_SNR_THR +531 0x0010 //TX_ENGY_THR +532 0x1770 //TX_CORR_HIGH_TH +533 0x6000 //TX_ENGY_THR_2 +534 0x3400 //TX_MEAN_RTO_THR +535 0x0028 //TX_WNS_ENOISE_MIC0_TH +536 0x3000 //TX_RATIOMICL_TH +537 0x7FFF //TX_CALIG_HS +538 0x0000 //TX_LVL_CTRL +539 0x0010 //TX_WIND_SUPRTO +540 0x0014 //TX_WNS_MIN_G +541 0x0600 //TX_WNS_B_POST_FLT +542 0x3000 //TX_RATIOMICH_TH +543 0xD120 //TX_WIND_INBEAM_L_TH +544 0x0FA0 //TX_WIND_INBEAM_H_TH +545 0x2000 //TX_WNS_RESRV_0 +546 0x59D8 //TX_WNS_RESRV_1 +547 0x0200 //TX_WNS_RESRV_2 +548 0x0000 //TX_WNS_RESRV_3 +549 0x0000 //TX_WNS_RESRV_4 +550 0x0000 //TX_WNS_RESRV_5 +551 0x0000 //TX_WNS_RESRV_6 +552 0x0000 //TX_PB_B_POST_FLT_LESSCUT +553 0x0070 //TX_BF_LESSCUT_BBIN +554 0x0070 //TX_BF_LESSCUT_EBIN +555 0x0010 //TX_POSTBFB0 +556 0x0070 //TX_POSTBFB +557 0x00B0 //TX_POSTBFE +558 0x0E66 //TX_SPEECH_SNR_TH +559 0x0050 //TX_PB_MAX_PRI_SNR_TH +560 0x770A //TX_MAX_PRI_SNR_TH_L +561 0x0000 //TX_PFGAIN +562 0x0000 //TX_MAINTOREFR_TH +563 0x0000 //TX_SAM_MARK +564 0x0000 //TX_PB_RESRV_0 +565 0x0000 //TX_PB_RESRV_1 +566 0x0030 //TX_FDEQ_SUBNUM +567 0x5C58 //TX_FDEQ_GAIN_0 +568 0x5048 //TX_FDEQ_GAIN_1 +569 0x4C4C //TX_FDEQ_GAIN_2 +570 0x494D //TX_FDEQ_GAIN_3 +571 0x4442 //TX_FDEQ_GAIN_4 +572 0x444C //TX_FDEQ_GAIN_5 +573 0x5053 //TX_FDEQ_GAIN_6 +574 0x6248 //TX_FDEQ_GAIN_7 +575 0x434A //TX_FDEQ_GAIN_8 +576 0x4B4D //TX_FDEQ_GAIN_9 +577 0x4C4B //TX_FDEQ_GAIN_10 +578 0x4E4A //TX_FDEQ_GAIN_11 +579 0x4842 //TX_FDEQ_GAIN_12 +580 0x4C44 //TX_FDEQ_GAIN_13 +581 0x3A4A //TX_FDEQ_GAIN_14 +582 0x6478 //TX_FDEQ_GAIN_15 +583 0x5848 //TX_FDEQ_GAIN_16 +584 0x4848 //TX_FDEQ_GAIN_17 +585 0x4848 //TX_FDEQ_GAIN_18 +586 0x4848 //TX_FDEQ_GAIN_19 +587 0x4848 //TX_FDEQ_GAIN_20 +588 0x4848 //TX_FDEQ_GAIN_21 +589 0x4848 //TX_FDEQ_GAIN_22 +590 0x4848 //TX_FDEQ_GAIN_23 +591 0x0202 //TX_FDEQ_BIN_0 +592 0x0104 //TX_FDEQ_BIN_1 +593 0x0502 //TX_FDEQ_BIN_2 +594 0x0202 //TX_FDEQ_BIN_3 +595 0x0504 //TX_FDEQ_BIN_4 +596 0x0708 //TX_FDEQ_BIN_5 +597 0x0808 //TX_FDEQ_BIN_6 +598 0x050E //TX_FDEQ_BIN_7 +599 0x0B0C //TX_FDEQ_BIN_8 +600 0x0F0F //TX_FDEQ_BIN_9 +601 0x0E0D //TX_FDEQ_BIN_10 +602 0x0F28 //TX_FDEQ_BIN_11 +603 0x110F //TX_FDEQ_BIN_12 +604 0x350F //TX_FDEQ_BIN_13 +605 0x1924 //TX_FDEQ_BIN_14 +606 0x1810 //TX_FDEQ_BIN_15 +607 0x1021 //TX_FDEQ_BIN_16 +608 0x1000 //TX_FDEQ_BIN_17 +609 0x0000 //TX_FDEQ_BIN_18 +610 0x0000 //TX_FDEQ_BIN_19 +611 0x0000 //TX_FDEQ_BIN_20 +612 0x0000 //TX_FDEQ_BIN_21 +613 0x0000 //TX_FDEQ_BIN_22 +614 0x0000 //TX_FDEQ_BIN_23 +615 0x0000 //TX_FDEQ_PADDING +616 0x0030 //TX_PREEQ_SUBNUM_MIC0 +617 0x4848 //TX_PREEQ_GAIN_MIC0_0 +618 0x4848 //TX_PREEQ_GAIN_MIC0_1 +619 0x4848 //TX_PREEQ_GAIN_MIC0_2 +620 0x4848 //TX_PREEQ_GAIN_MIC0_3 +621 0x4848 //TX_PREEQ_GAIN_MIC0_4 +622 0x4848 //TX_PREEQ_GAIN_MIC0_5 +623 0x4848 //TX_PREEQ_GAIN_MIC0_6 +624 0x4848 //TX_PREEQ_GAIN_MIC0_7 +625 0x4848 //TX_PREEQ_GAIN_MIC0_8 +626 0x4848 //TX_PREEQ_GAIN_MIC0_9 +627 0x4848 //TX_PREEQ_GAIN_MIC0_10 +628 0x4848 //TX_PREEQ_GAIN_MIC0_11 +629 0x4848 //TX_PREEQ_GAIN_MIC0_12 +630 0x4848 //TX_PREEQ_GAIN_MIC0_13 +631 0x4848 //TX_PREEQ_GAIN_MIC0_14 +632 0x4848 //TX_PREEQ_GAIN_MIC0_15 +633 0x4848 //TX_PREEQ_GAIN_MIC0_16 +634 0x4848 //TX_PREEQ_GAIN_MIC0_17 +635 0x4848 //TX_PREEQ_GAIN_MIC0_18 +636 0x4848 //TX_PREEQ_GAIN_MIC0_19 +637 0x4848 //TX_PREEQ_GAIN_MIC0_20 +638 0x4848 //TX_PREEQ_GAIN_MIC0_21 +639 0x4848 //TX_PREEQ_GAIN_MIC0_22 +640 0x4848 //TX_PREEQ_GAIN_MIC0_23 +641 0x251A //TX_PREEQ_BIN_MIC0_0 +642 0x0F0F //TX_PREEQ_BIN_MIC0_1 +643 0x0C0C //TX_PREEQ_BIN_MIC0_2 +644 0x0C0F //TX_PREEQ_BIN_MIC0_3 +645 0x0F0F //TX_PREEQ_BIN_MIC0_4 +646 0x0F09 //TX_PREEQ_BIN_MIC0_5 +647 0x0909 //TX_PREEQ_BIN_MIC0_6 +648 0x0908 //TX_PREEQ_BIN_MIC0_7 +649 0x070F //TX_PREEQ_BIN_MIC0_8 +650 0x1F08 //TX_PREEQ_BIN_MIC0_9 +651 0x0808 //TX_PREEQ_BIN_MIC0_10 +652 0x0920 //TX_PREEQ_BIN_MIC0_11 +653 0x2020 //TX_PREEQ_BIN_MIC0_12 +654 0x2021 //TX_PREEQ_BIN_MIC0_13 +655 0x0000 //TX_PREEQ_BIN_MIC0_14 +656 0x0000 //TX_PREEQ_BIN_MIC0_15 +657 0x0000 //TX_PREEQ_BIN_MIC0_16 +658 0x0000 //TX_PREEQ_BIN_MIC0_17 +659 0x0000 //TX_PREEQ_BIN_MIC0_18 +660 0x0000 //TX_PREEQ_BIN_MIC0_19 +661 0x0000 //TX_PREEQ_BIN_MIC0_20 +662 0x0000 //TX_PREEQ_BIN_MIC0_21 +663 0x0000 //TX_PREEQ_BIN_MIC0_22 +664 0x0000 //TX_PREEQ_BIN_MIC0_23 +665 0x0030 //TX_PREEQ_SUBNUM_MIC1 +666 0x4848 //TX_PREEQ_GAIN_MIC1_0 +667 0x4848 //TX_PREEQ_GAIN_MIC1_1 +668 0x4848 //TX_PREEQ_GAIN_MIC1_2 +669 0x4848 //TX_PREEQ_GAIN_MIC1_3 +670 0x4848 //TX_PREEQ_GAIN_MIC1_4 +671 0x4848 //TX_PREEQ_GAIN_MIC1_5 +672 0x494A //TX_PREEQ_GAIN_MIC1_6 +673 0x4B4C //TX_PREEQ_GAIN_MIC1_7 +674 0x4D4E //TX_PREEQ_GAIN_MIC1_8 +675 0x4F52 //TX_PREEQ_GAIN_MIC1_9 +676 0x5355 //TX_PREEQ_GAIN_MIC1_10 +677 0x585C //TX_PREEQ_GAIN_MIC1_11 +678 0x616A //TX_PREEQ_GAIN_MIC1_12 +679 0x726E //TX_PREEQ_GAIN_MIC1_13 +680 0x5C48 //TX_PREEQ_GAIN_MIC1_14 +681 0x3B38 //TX_PREEQ_GAIN_MIC1_15 +682 0x4848 //TX_PREEQ_GAIN_MIC1_16 +683 0x4848 //TX_PREEQ_GAIN_MIC1_17 +684 0x4848 //TX_PREEQ_GAIN_MIC1_18 +685 0x4848 //TX_PREEQ_GAIN_MIC1_19 +686 0x4848 //TX_PREEQ_GAIN_MIC1_20 +687 0x4848 //TX_PREEQ_GAIN_MIC1_21 +688 0x4848 //TX_PREEQ_GAIN_MIC1_22 +689 0x4848 //TX_PREEQ_GAIN_MIC1_23 +690 0x0202 //TX_PREEQ_BIN_MIC1_0 +691 0x0203 //TX_PREEQ_BIN_MIC1_1 +692 0x0303 //TX_PREEQ_BIN_MIC1_2 +693 0x0304 //TX_PREEQ_BIN_MIC1_3 +694 0x0405 //TX_PREEQ_BIN_MIC1_4 +695 0x0506 //TX_PREEQ_BIN_MIC1_5 +696 0x0708 //TX_PREEQ_BIN_MIC1_6 +697 0x090A //TX_PREEQ_BIN_MIC1_7 +698 0x0B0C //TX_PREEQ_BIN_MIC1_8 +699 0x0D0E //TX_PREEQ_BIN_MIC1_9 +700 0x1013 //TX_PREEQ_BIN_MIC1_10 +701 0x1719 //TX_PREEQ_BIN_MIC1_11 +702 0x1B1E //TX_PREEQ_BIN_MIC1_12 +703 0x1E1E //TX_PREEQ_BIN_MIC1_13 +704 0x1E28 //TX_PREEQ_BIN_MIC1_14 +705 0x3042 //TX_PREEQ_BIN_MIC1_15 +706 0x0000 //TX_PREEQ_BIN_MIC1_16 +707 0x0000 //TX_PREEQ_BIN_MIC1_17 +708 0x0000 //TX_PREEQ_BIN_MIC1_18 +709 0x0000 //TX_PREEQ_BIN_MIC1_19 +710 0x0000 //TX_PREEQ_BIN_MIC1_20 +711 0x0000 //TX_PREEQ_BIN_MIC1_21 +712 0x0000 //TX_PREEQ_BIN_MIC1_22 +713 0x0000 //TX_PREEQ_BIN_MIC1_23 +714 0x0030 //TX_PREEQ_SUBNUM_MIC2 +715 0x4848 //TX_PREEQ_GAIN_MIC2_0 +716 0x4848 //TX_PREEQ_GAIN_MIC2_1 +717 0x4848 //TX_PREEQ_GAIN_MIC2_2 +718 0x4848 //TX_PREEQ_GAIN_MIC2_3 +719 0x4848 //TX_PREEQ_GAIN_MIC2_4 +720 0x4848 //TX_PREEQ_GAIN_MIC2_5 +721 0x4848 //TX_PREEQ_GAIN_MIC2_6 +722 0x4848 //TX_PREEQ_GAIN_MIC2_7 +723 0x4848 //TX_PREEQ_GAIN_MIC2_8 +724 0x4848 //TX_PREEQ_GAIN_MIC2_9 +725 0x4848 //TX_PREEQ_GAIN_MIC2_10 +726 0x4848 //TX_PREEQ_GAIN_MIC2_11 +727 0x4848 //TX_PREEQ_GAIN_MIC2_12 +728 0x4848 //TX_PREEQ_GAIN_MIC2_13 +729 0x4848 //TX_PREEQ_GAIN_MIC2_14 +730 0x4848 //TX_PREEQ_GAIN_MIC2_15 +731 0x4848 //TX_PREEQ_GAIN_MIC2_16 +732 0x4848 //TX_PREEQ_GAIN_MIC2_17 +733 0x4848 //TX_PREEQ_GAIN_MIC2_18 +734 0x4848 //TX_PREEQ_GAIN_MIC2_19 +735 0x4848 //TX_PREEQ_GAIN_MIC2_20 +736 0x4848 //TX_PREEQ_GAIN_MIC2_21 +737 0x4848 //TX_PREEQ_GAIN_MIC2_22 +738 0x4848 //TX_PREEQ_GAIN_MIC2_23 +739 0x0608 //TX_PREEQ_BIN_MIC2_0 +740 0x0808 //TX_PREEQ_BIN_MIC2_1 +741 0x0808 //TX_PREEQ_BIN_MIC2_2 +742 0x0808 //TX_PREEQ_BIN_MIC2_3 +743 0x0808 //TX_PREEQ_BIN_MIC2_4 +744 0x0808 //TX_PREEQ_BIN_MIC2_5 +745 0x0808 //TX_PREEQ_BIN_MIC2_6 +746 0x0808 //TX_PREEQ_BIN_MIC2_7 +747 0x0808 //TX_PREEQ_BIN_MIC2_8 +748 0x0808 //TX_PREEQ_BIN_MIC2_9 +749 0x0808 //TX_PREEQ_BIN_MIC2_10 +750 0x0808 //TX_PREEQ_BIN_MIC2_11 +751 0x0808 //TX_PREEQ_BIN_MIC2_12 +752 0x0808 //TX_PREEQ_BIN_MIC2_13 +753 0x0808 //TX_PREEQ_BIN_MIC2_14 +754 0x0200 //TX_PREEQ_BIN_MIC2_15 +755 0x0000 //TX_PREEQ_BIN_MIC2_16 +756 0x0000 //TX_PREEQ_BIN_MIC2_17 +757 0x0000 //TX_PREEQ_BIN_MIC2_18 +758 0x0000 //TX_PREEQ_BIN_MIC2_19 +759 0x0000 //TX_PREEQ_BIN_MIC2_20 +760 0x0000 //TX_PREEQ_BIN_MIC2_21 +761 0x0000 //TX_PREEQ_BIN_MIC2_22 +762 0x0000 //TX_PREEQ_BIN_MIC2_23 +763 0x0006 //TX_MASKING_ABILITY +764 0x0800 //TX_NND_WEIGHT +765 0x0050 //TX_MIC_CALIBRATION_0 +766 0x0056 //TX_MIC_CALIBRATION_1 +767 0x0050 //TX_MIC_CALIBRATION_2 +768 0x0050 //TX_MIC_CALIBRATION_3 +769 0x0046 //TX_MIC_PWR_BIAS_0 +770 0x0042 //TX_MIC_PWR_BIAS_1 +771 0x0046 //TX_MIC_PWR_BIAS_2 +772 0x0046 //TX_MIC_PWR_BIAS_3 +773 0x0000 //TX_GAIN_LIMIT_0 +774 0x0006 //TX_GAIN_LIMIT_1 +775 0x0000 //TX_GAIN_LIMIT_2 +776 0x0000 //TX_GAIN_LIMIT_3 +777 0x7F5B //TX_BVE_NOVAD0_ALPHADOWN +778 0x7FDE //TX_BVE_VAD0_ALPHAUP +779 0x7F3A //TX_BVE_VAD0_ALPHADOWN +780 0x2000 //TX_BVE_GAINWEIGHT_NOFEVADLI +781 0x7F5B //TX_BVE_FEVADLI_ALPHA +782 0x7F19 //TX_BVE_NOVAD0_ALPHAUP +783 0x1000 //TX_TDDRC_ALPHA_UP_01 +784 0x1000 //TX_TDDRC_ALPHA_UP_02 +785 0x1000 //TX_TDDRC_ALPHA_UP_03 +786 0x1000 //TX_TDDRC_ALPHA_UP_04 +787 0x7EB8 //TX_TDDRC_ALPHA_DWN_01 +788 0x7EB8 //TX_TDDRC_ALPHA_DWN_02 +789 0x7EB8 //TX_TDDRC_ALPHA_DWN_03 +790 0x7EB8 //TX_TDDRC_ALPHA_DWN_04 +791 0x7FFF //TX_TDDRC_TD_DRC_LIMIT +792 0x0800 //TX_TDDRC_POST_LIMIT_GAIN +793 0x0000 //TX_TDDRC_RESRV_0 +794 0x0000 //TX_TDDRC_RESRV_1 +795 0x0018 //TX_FDDRC_BAND_MARGIN_0 +796 0x0030 //TX_FDDRC_BAND_MARGIN_1 +797 0x0050 //TX_FDDRC_BAND_MARGIN_2 +798 0x0080 //TX_FDDRC_BAND_MARGIN_3 +799 0x0007 //TX_FDDRC_BLOCK_EXP +800 0x5000 //TX_FDDRC_THRD_2_0 +801 0x5000 //TX_FDDRC_THRD_2_1 +802 0x5000 //TX_FDDRC_THRD_2_2 +803 0x5000 //TX_FDDRC_THRD_2_3 +804 0x6400 //TX_FDDRC_THRD_3_0 +805 0x6400 //TX_FDDRC_THRD_3_1 +806 0x6400 //TX_FDDRC_THRD_3_2 +807 0x6400 //TX_FDDRC_THRD_3_3 +808 0x2000 //TX_FDDRC_SLANT_0_0 +809 0x2000 //TX_FDDRC_SLANT_0_1 +810 0x2000 //TX_FDDRC_SLANT_0_2 +811 0x2000 //TX_FDDRC_SLANT_0_3 +812 0x5333 //TX_FDDRC_SLANT_1_0 +813 0x5333 //TX_FDDRC_SLANT_1_1 +814 0x5333 //TX_FDDRC_SLANT_1_2 +815 0x5333 //TX_FDDRC_SLANT_1_3 +816 0x0010 //TX_DEADMIC_SILENCE_TH +817 0x0600 //TX_MIC_DEGRADE_TH +818 0x0078 //TX_DEADMIC_CNT +819 0x0078 //TX_MIC_DEGRADE_CNT +820 0x0000 //TX_FDDRC_RESRV_4 +821 0x0000 //TX_FDDRC_RESRV_5 +822 0x0000 //TX_FDDRC_RESRV_6 +823 0x7FFF //TX_KS_NOISEPASTE_FACTOR +824 0x0001 //TX_KS_CONFIG +825 0x7FFF //TX_KS_GAIN_MIN +826 0x0000 //TX_KS_RESRV_0 +827 0x0000 //TX_KS_RESRV_1 +828 0x0000 //TX_KS_RESRV_2 +829 0x7C00 //TX_LAMBDA_PKA_FP +830 0x2000 //TX_TPKA_FP +831 0x0080 //TX_MIN_G_FP +832 0x2000 //TX_MAX_G_FP +833 0x0FA0 //TX_FFP_FP_K_METAL +834 0x4000 //TX_A_POST_FLT_FP +835 0x0F5C //TX_RTO_OUTBEAM_TH +836 0x4CCD //TX_TPKA_FP_THD +837 0x0000 //TX_MAX_G_FP_BLK +838 0x0000 //TX_FFP_FADEIN +839 0x0000 //TX_FFP_FADEOUT +840 0x0000 //TX_WHISPERCTH +841 0x0000 //TX_WHISPERHOLDT +842 0x0000 //TX_WHISP_ENTHH +843 0x0000 //TX_WHISP_ENTHL +844 0x0000 //TX_WHISP_RTOTH +845 0x0000 //TX_WHISP_RTOTH2 +846 0x0096 //TX_MUTE_PERIOD +847 0x0000 //TX_FADE_IN_PERIOD +848 0x0100 //TX_FFP_RESRV_2 +849 0x0020 //TX_FFP_RESRV_3 +850 0x0000 //TX_FFP_RESRV_4 +851 0x0000 //TX_FFP_RESRV_5 +852 0x0000 //TX_FFP_RESRV_6 +853 0x0002 //TX_FILTINDX +854 0x0002 //TX_TDDRC_THRD_0 +855 0x0003 //TX_TDDRC_THRD_1 +856 0x1500 //TX_TDDRC_THRD_2 +857 0x1500 //TX_TDDRC_THRD_3 +858 0x3000 //TX_TDDRC_SLANT_0 +859 0x6E00 //TX_TDDRC_SLANT_1 +860 0x1000 //TX_TDDRC_ALPHA_UP_00 +861 0x7EB8 //TX_TDDRC_ALPHA_DWN_00 +862 0x0000 //TX_TDDRC_HMNC_FLAG +863 0x199A //TX_TDDRC_HMNC_GAIN +864 0x0000 //TX_TDDRC_SMT_FLAG +865 0x0CCD //TX_TDDRC_SMT_W +866 0x06EC //TX_TDDRC_DRC_GAIN +867 0x7FFF //TX_TDDRC_LMT_THRD +868 0x0000 //TX_TDDRC_LMT_ALPHA +869 0x0000 //TX_TFMASKLTH +870 0x0000 //TX_TFMASKLTHL +871 0x0CCD //TX_TFMASKHTH +872 0xECCD //TX_TFMASKLTH_BINVAD +873 0xFCCD //TX_TFMASKLTH_NS_EST +874 0xF800 //TX_TFMASKLTH_DOA +875 0x0CCD //TX_TFMASKTH_BLESSCUT +876 0x1000 //TX_B_LESSCUT_RTO_MASK +877 0x2000 //TX_SB_RHO_MEAN_TH_ABN +878 0x2000 //TX_B_POST_FLT_MASK +879 0x0000 //TX_B_POST_FLT_MASK1 +880 0x6333 //TX_GAIN_WIND_MASK +881 0x0000 //TX_TFMASK_BFSTRICT_MUSIC +882 0x0000 //TX_TFMASK_BFSTRICT_NOMUSIC +883 0x7333 //TX_FASTNS_OUTIN_TH +884 0x0CCD //TX_FASTNS_TFMASK_TH +885 0x0CCD //TX_FASTNS_TFMASKBIN_TH1 +886 0x0CCD //TX_FASTNS_TFMASKBIN_TH2 +887 0x0CCD //TX_FASTNS_TFMASKBIN_TH3 +888 0x0028 //TX_FASTNS_ARSPC_TH +889 0xC000 //TX_FASTNS_MASK5_TH +890 0x0810 //TX_POSTSSA_MIN_G_VR_MASK +891 0x1000 //TX_A_LESSCUT_RTO_MASK +892 0x1770 //TX_FASTNS_NOISETH +893 0xC000 //TX_FASTNS_SSA_THLFL +894 0xC000 //TX_FASTNS_SSA_THHFL +895 0xCCCC //TX_FASTNS_SSA_THLFH +896 0xD999 //TX_FASTNS_SSA_THHFH +897 0x2339 //TX_SENDFUNC_REG_MICMUTE +898 0x0021 //TX_SENDFUNC_REG_MICMUTE1 +899 0x02BC //TX_MICMUTE_RATIO_THR +900 0x0140 //TX_MICMUTE_AMP_THR +901 0x0004 //TX_MICMUTE_HPF_IND +902 0x00C0 //TX_MICMUTE_LOG_EYR_TH +903 0x0008 //TX_MICMUTE_CVG_TIME +904 0x0008 //TX_MICMUTE_RELEASE_TIME +905 0x01FE //TX_MIC_VOLUME_MIC0MUTE +906 0x0020 //TX_MICMUTE_EPD_OFFSET_0 +907 0x001E //TX_MICMUTE_FRQ_AEC_L +908 0x7999 //TX_MICMUTE_EAD_THR +909 0x7FFF //TX_MICMUTE_LAMBDA_CB_NLE +910 0x7FFF //TX_MICMUTE_LAMBDA_RE_EST +911 0x4000 //TX_DTD_THR1_MICMUTE_0 +912 0x7000 //TX_DTD_THR1_MICMUTE_1 +913 0x7FFF //TX_DTD_THR1_MICMUTE_2 +914 0x7FFF //TX_DTD_THR1_MICMUTE_3 +915 0x6CCC //TX_DTD_THR2_MICMUTE_0 +916 0x0400 //TX_MICMUTE_MIN_EQ_RE_EST_0 +917 0x0400 //TX_MICMUTE_MIN_EQ_RE_EST_1 +918 0x1000 //TX_MICMUTE_MIN_EQ_RE_EST_2 +919 0x7FFF //TX_MICMUTE_MIN_EQ_RE_EST_3 +920 0x7FFF //TX_MICMUTE_MIN_EQ_RE_EST_4 +921 0x4000 //TX_MICMUTE_C_POST_FLT +922 0x03E8 //TX_MICMUTE_DT_CUT_K +923 0x0001 //TX_MICMUTE_DT_CUT_THR +924 0x03E8 //TX_MICMUTE_DT_CUT_K2 +925 0x0001 //TX_MICMUTE_DT_CUT_THR2 +926 0x0064 //TX_MICMUTE_DT2_HOLD_N +927 0x1000 //TX_MICMUTE_RATIODTH_THCUT +928 0x1000 //TX_MICMUTE_B_POST_FLT_ECHOL +929 0x7FFF //TX_MICMUTE_B_POST_FLT_ECHOH +930 0x0400 //TX_MICMUTE_C_POST_FLT_MASK +931 0x7999 //TX_MICMUTE_RATIODTL_CUT_TH +932 0x0258 //TX_MICMUTE_DT_CUT_K1 +933 0x0800 //TX_MICMUTE_N2_SN_EST +934 0xFC00 //TX_MICMUTE_THR_SN_EST_0 +935 0x001C //TX_MICMUTE_MIN_G_CTRL_0 +936 0x6000 //TX_MICMUTE_A_POST_FILT_S_0 +937 0x7000 //TX_MICMUTE_B_POST_FILT_0 +938 0x2710 //TX_MIC1RUB_AMP_THR +939 0x0010 //TX_MIC1MUTE_RATIO_THR +940 0x0450 //TX_MIC1MUTE_AMP_THR +941 0x0008 //TX_MIC1MUTE_CVG_TIME +942 0x0008 //TX_MIC1MUTE_RELEASE_TIME +943 0x0000 //TX_AMS_RESRV_01 +944 0x0000 //TX_AMS_RESRV_02 +945 0x0000 //TX_AMS_RESRV_03 +946 0x0000 //TX_AMS_RESRV_04 +947 0x0000 //TX_AMS_RESRV_05 +948 0x0000 //TX_AMS_RESRV_06 +949 0x0000 //TX_AMS_RESRV_07 +950 0x0000 //TX_AMS_RESRV_08 +951 0x0000 //TX_AMS_RESRV_09 +952 0x0000 //TX_AMS_RESRV_10 +953 0x0000 //TX_AMS_RESRV_11 +954 0x0000 //TX_AMS_RESRV_12 +955 0x0000 //TX_AMS_RESRV_13 +956 0x0000 //TX_AMS_RESRV_14 +957 0x0000 //TX_AMS_RESRV_15 +958 0x0000 //TX_AMS_RESRV_16 +959 0x0000 //TX_AMS_RESRV_17 +960 0x0000 //TX_AMS_RESRV_18 +961 0x0000 //TX_AMS_RESRV_19 +#RX +0 0x000C //RX_RECVFUNC_MODE_0 +1 0x0000 //RX_RECVFUNC_MODE_1 +2 0x0003 //RX_SAMPLINGFREQ_SIG +3 0x0003 //RX_SAMPLINGFREQ_PROC +4 0x000A //RX_FRAME_SZ +5 0x0000 //RX_DELAY_OPT +6 0x1000 //RX_TDDRC_ALPHA_UP_1 +7 0x1000 //RX_TDDRC_ALPHA_UP_2 +8 0x1000 //RX_TDDRC_ALPHA_UP_3 +9 0x1000 //RX_TDDRC_ALPHA_UP_4 +10 0x0800 //RX_PGA +11 0x7FFF //RX_A_HP +12 0x4000 //RX_B_PE +13 0x5800 //RX_THR_PITCH_DET_0 +14 0x5000 //RX_THR_PITCH_DET_1 +15 0x4000 //RX_THR_PITCH_DET_2 +16 0x0008 //RX_PITCH_BFR_LEN +17 0x0003 //RX_SBD_PITCH_DET +18 0x0100 //RX_PP_RESRV_0 +19 0x0020 //RX_PP_RESRV_1 +20 0x0600 //RX_N_SN_EST +21 0x000C //RX_N2_SN_EST +22 0x000F //RX_NS_LVL_CTRL +23 0xF800 //RX_THR_SN_EST +24 0x7E00 //RX_LAMBDA_PFILT +25 0x000A //RX_FENS_RESRV_0 +26 0x0190 //RX_FENS_RESRV_1 +27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +30 0x0002 //RX_EXTRA_NS_L +31 0x0800 //RX_EXTRA_NS_A +32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +33 0x7000 //RX_TDDRC_LIMITER_THRD +34 0x0800 //RX_TDDRC_LIMITER_GAIN +35 0x199A //RX_A_POST_FLT +36 0x0000 //RX_LMT_THRD +37 0x4000 //RX_LMT_ALPHA +38 0x0030 //RX_FDEQ_SUBNUM +39 0x4848 //RX_FDEQ_GAIN_0 +40 0x4848 //RX_FDEQ_GAIN_1 +41 0x4844 //RX_FDEQ_GAIN_2 +42 0x4B4D //RX_FDEQ_GAIN_3 +43 0x4E50 //RX_FDEQ_GAIN_4 +44 0x5254 //RX_FDEQ_GAIN_5 +45 0x5658 //RX_FDEQ_GAIN_6 +46 0x5C60 //RX_FDEQ_GAIN_7 +47 0x6468 //RX_FDEQ_GAIN_8 +48 0x6C70 //RX_FDEQ_GAIN_9 +49 0x7474 //RX_FDEQ_GAIN_10 +50 0x7474 //RX_FDEQ_GAIN_11 +51 0x7474 //RX_FDEQ_GAIN_12 +52 0x7474 //RX_FDEQ_GAIN_13 +53 0x7474 //RX_FDEQ_GAIN_14 +54 0x7474 //RX_FDEQ_GAIN_15 +55 0x4848 //RX_FDEQ_GAIN_16 +56 0x4848 //RX_FDEQ_GAIN_17 +57 0x4848 //RX_FDEQ_GAIN_18 +58 0x4848 //RX_FDEQ_GAIN_19 +59 0x4848 //RX_FDEQ_GAIN_20 +60 0x4848 //RX_FDEQ_GAIN_21 +61 0x4848 //RX_FDEQ_GAIN_22 +62 0x4848 //RX_FDEQ_GAIN_23 +63 0x0202 //RX_FDEQ_BIN_0 +64 0x0203 //RX_FDEQ_BIN_1 +65 0x0402 //RX_FDEQ_BIN_2 +66 0x0304 //RX_FDEQ_BIN_3 +67 0x0405 //RX_FDEQ_BIN_4 +68 0x0506 //RX_FDEQ_BIN_5 +69 0x0708 //RX_FDEQ_BIN_6 +70 0x090A //RX_FDEQ_BIN_7 +71 0x0B0C //RX_FDEQ_BIN_8 +72 0x0D0E //RX_FDEQ_BIN_9 +73 0x1214 //RX_FDEQ_BIN_10 +74 0x1E1E //RX_FDEQ_BIN_11 +75 0x1E1E //RX_FDEQ_BIN_12 +76 0x1E1E //RX_FDEQ_BIN_13 +77 0x1E1E //RX_FDEQ_BIN_14 +78 0x202C //RX_FDEQ_BIN_15 +79 0x0000 //RX_FDEQ_BIN_16 +80 0x0000 //RX_FDEQ_BIN_17 +81 0x0000 //RX_FDEQ_BIN_18 +82 0x0000 //RX_FDEQ_BIN_19 +83 0x0000 //RX_FDEQ_BIN_20 +84 0x0000 //RX_FDEQ_BIN_21 +85 0x0000 //RX_FDEQ_BIN_22 +86 0x0000 //RX_FDEQ_BIN_23 +87 0x4000 //RX_FDEQ_RESRV_0 +88 0x0320 //RX_FDEQ_RESRV_1 +89 0x0018 //RX_FDDRC_BAND_MARGIN_0 +90 0x0030 //RX_FDDRC_BAND_MARGIN_1 +91 0x0050 //RX_FDDRC_BAND_MARGIN_2 +92 0x0080 //RX_FDDRC_BAND_MARGIN_3 +93 0x0007 //RX_FDDRC_BLOCK_EXP +94 0x5000 //RX_FDDRC_THRD_2_0 +95 0x5000 //RX_FDDRC_THRD_2_1 +96 0x5000 //RX_FDDRC_THRD_2_2 +97 0x5000 //RX_FDDRC_THRD_2_3 +98 0x6400 //RX_FDDRC_THRD_3_0 +99 0x6400 //RX_FDDRC_THRD_3_1 +100 0x6400 //RX_FDDRC_THRD_3_2 +101 0x6400 //RX_FDDRC_THRD_3_3 +102 0x2000 //RX_FDDRC_SLANT_0_0 +103 0x2000 //RX_FDDRC_SLANT_0_1 +104 0x2000 //RX_FDDRC_SLANT_0_2 +105 0x2000 //RX_FDDRC_SLANT_0_3 +106 0x5333 //RX_FDDRC_SLANT_1_0 +107 0x5333 //RX_FDDRC_SLANT_1_1 +108 0x5333 //RX_FDDRC_SLANT_1_2 +109 0x5333 //RX_FDDRC_SLANT_1_3 +110 0x0000 //RX_FDDRC_RESRV_0 +111 0x0002 //RX_FILTINDX +112 0x0000 //RX_TDDRC_THRD_0 +113 0x0000 //RX_TDDRC_THRD_1 +114 0x1800 //RX_TDDRC_THRD_2 +115 0x1800 //RX_TDDRC_THRD_3 +116 0x3000 //RX_TDDRC_SLANT_0 +117 0x6E00 //RX_TDDRC_SLANT_1 +118 0x1000 //RX_TDDRC_ALPHA_UP_0 +119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +120 0x0000 //RX_TDDRC_HMNC_FLAG +121 0x199A //RX_TDDRC_HMNC_GAIN +122 0x0001 //RX_TDDRC_SMT_FLAG +123 0x0CCD //RX_TDDRC_SMT_W +124 0x01E0 //RX_TDDRC_DRC_GAIN +125 0x7C00 //RX_LAMBDA_PKA_FP +126 0x2000 //RX_TPKA_FP +127 0x2000 //RX_MIN_G_FP +128 0x0080 //RX_MAX_G_FP +129 0x0100 //RX_SPK_VOL +130 0x0000 //RX_VOL_RESRV_0 +131 0x0000 //RX_MAXLEVEL_CNG +132 0x3000 //RX_BWE_UV_TH +133 0x3000 //RX_BWE_UV_TH2 +134 0x1800 //RX_BWE_UV_TH3 +135 0x1000 //RX_BWE_V_TH +136 0x04CD //RX_BWE_GAIN1_V_TH1 +137 0x0F33 //RX_BWE_GAIN1_V_TH2 +138 0x7333 //RX_BWE_UV_EQ +139 0x199A //RX_BWE_V_EQ +140 0x7333 //RX_BWE_TONE_TH +141 0x0004 //RX_BWE_UV_HOLD_T +142 0x6CCD //RX_BWE_GAIN2_ALPHA +143 0x799A //RX_BWE_GAIN3_ALPHA +144 0x001E //RX_BWE_CUTOFF +145 0x3000 //RX_BWE_GAINFILL +146 0x3200 //RX_BWE_MAXTH_TONE +147 0x2000 //RX_BWE_EQ_0 +148 0x2000 //RX_BWE_EQ_1 +149 0x2000 //RX_BWE_EQ_2 +150 0x2000 //RX_BWE_EQ_3 +151 0x2000 //RX_BWE_EQ_4 +152 0x2000 //RX_BWE_EQ_5 +153 0x2000 //RX_BWE_EQ_6 +154 0x0000 //RX_BWE_RESRV_0 +155 0x0000 //RX_BWE_RESRV_1 +156 0x0000 //RX_BWE_RESRV_2 +#VOL 0 +6 0x1000 //RX_TDDRC_ALPHA_UP_1 +7 0x1000 //RX_TDDRC_ALPHA_UP_2 +8 0x1000 //RX_TDDRC_ALPHA_UP_3 +9 0x1000 //RX_TDDRC_ALPHA_UP_4 +27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +33 0x7000 //RX_TDDRC_LIMITER_THRD +34 0x0800 //RX_TDDRC_LIMITER_GAIN +112 0x0000 //RX_TDDRC_THRD_0 +113 0x0000 //RX_TDDRC_THRD_1 +114 0x1800 //RX_TDDRC_THRD_2 +115 0x1800 //RX_TDDRC_THRD_3 +116 0x3000 //RX_TDDRC_SLANT_0 +117 0x6E00 //RX_TDDRC_SLANT_1 +118 0x1000 //RX_TDDRC_ALPHA_UP_0 +119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +120 0x0000 //RX_TDDRC_HMNC_FLAG +121 0x199A //RX_TDDRC_HMNC_GAIN +122 0x0001 //RX_TDDRC_SMT_FLAG +123 0x0CCD //RX_TDDRC_SMT_W +124 0x01E0 //RX_TDDRC_DRC_GAIN +38 0x0030 //RX_FDEQ_SUBNUM +39 0x4848 //RX_FDEQ_GAIN_0 +40 0x4848 //RX_FDEQ_GAIN_1 +41 0x4844 //RX_FDEQ_GAIN_2 +42 0x4B4D //RX_FDEQ_GAIN_3 +43 0x4E50 //RX_FDEQ_GAIN_4 +44 0x5254 //RX_FDEQ_GAIN_5 +45 0x5658 //RX_FDEQ_GAIN_6 +46 0x5C60 //RX_FDEQ_GAIN_7 +47 0x6468 //RX_FDEQ_GAIN_8 +48 0x6C70 //RX_FDEQ_GAIN_9 +49 0x7474 //RX_FDEQ_GAIN_10 +50 0x7474 //RX_FDEQ_GAIN_11 +51 0x7474 //RX_FDEQ_GAIN_12 +52 0x7474 //RX_FDEQ_GAIN_13 +53 0x7474 //RX_FDEQ_GAIN_14 +54 0x7474 //RX_FDEQ_GAIN_15 +55 0x4848 //RX_FDEQ_GAIN_16 +56 0x4848 //RX_FDEQ_GAIN_17 +57 0x4848 //RX_FDEQ_GAIN_18 +58 0x4848 //RX_FDEQ_GAIN_19 +59 0x4848 //RX_FDEQ_GAIN_20 +60 0x4848 //RX_FDEQ_GAIN_21 +61 0x4848 //RX_FDEQ_GAIN_22 +62 0x4848 //RX_FDEQ_GAIN_23 +63 0x0202 //RX_FDEQ_BIN_0 +64 0x0203 //RX_FDEQ_BIN_1 +65 0x0402 //RX_FDEQ_BIN_2 +66 0x0304 //RX_FDEQ_BIN_3 +67 0x0405 //RX_FDEQ_BIN_4 +68 0x0506 //RX_FDEQ_BIN_5 +69 0x0708 //RX_FDEQ_BIN_6 +70 0x090A //RX_FDEQ_BIN_7 +71 0x0B0C //RX_FDEQ_BIN_8 +72 0x0D0E //RX_FDEQ_BIN_9 +73 0x1214 //RX_FDEQ_BIN_10 +74 0x1E1E //RX_FDEQ_BIN_11 +75 0x1E1E //RX_FDEQ_BIN_12 +76 0x1E1E //RX_FDEQ_BIN_13 +77 0x1E1E //RX_FDEQ_BIN_14 +78 0x202C //RX_FDEQ_BIN_15 +79 0x0000 //RX_FDEQ_BIN_16 +80 0x0000 //RX_FDEQ_BIN_17 +81 0x0000 //RX_FDEQ_BIN_18 +82 0x0000 //RX_FDEQ_BIN_19 +83 0x0000 //RX_FDEQ_BIN_20 +84 0x0000 //RX_FDEQ_BIN_21 +85 0x0000 //RX_FDEQ_BIN_22 +86 0x0000 //RX_FDEQ_BIN_23 +87 0x4000 //RX_FDEQ_RESRV_0 +88 0x0320 //RX_FDEQ_RESRV_1 +89 0x0018 //RX_FDDRC_BAND_MARGIN_0 +90 0x0030 //RX_FDDRC_BAND_MARGIN_1 +91 0x0050 //RX_FDDRC_BAND_MARGIN_2 +92 0x0080 //RX_FDDRC_BAND_MARGIN_3 +93 0x0007 //RX_FDDRC_BLOCK_EXP +94 0x5000 //RX_FDDRC_THRD_2_0 +95 0x5000 //RX_FDDRC_THRD_2_1 +96 0x5000 //RX_FDDRC_THRD_2_2 +97 0x5000 //RX_FDDRC_THRD_2_3 +98 0x6400 //RX_FDDRC_THRD_3_0 +99 0x6400 //RX_FDDRC_THRD_3_1 +100 0x6400 //RX_FDDRC_THRD_3_2 +101 0x6400 //RX_FDDRC_THRD_3_3 +102 0x2000 //RX_FDDRC_SLANT_0_0 +103 0x2000 //RX_FDDRC_SLANT_0_1 +104 0x2000 //RX_FDDRC_SLANT_0_2 +105 0x2000 //RX_FDDRC_SLANT_0_3 +106 0x5333 //RX_FDDRC_SLANT_1_0 +107 0x5333 //RX_FDDRC_SLANT_1_1 +108 0x5333 //RX_FDDRC_SLANT_1_2 +109 0x5333 //RX_FDDRC_SLANT_1_3 +110 0x0000 //RX_FDDRC_RESRV_0 +129 0x0100 //RX_SPK_VOL +130 0x0000 //RX_VOL_RESRV_0 +#VOL 1 +6 0x1000 //RX_TDDRC_ALPHA_UP_1 +7 0x1000 //RX_TDDRC_ALPHA_UP_2 +8 0x1000 //RX_TDDRC_ALPHA_UP_3 +9 0x1000 //RX_TDDRC_ALPHA_UP_4 +27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +33 0x7000 //RX_TDDRC_LIMITER_THRD +34 0x0800 //RX_TDDRC_LIMITER_GAIN +112 0x0000 //RX_TDDRC_THRD_0 +113 0x0000 //RX_TDDRC_THRD_1 +114 0x1800 //RX_TDDRC_THRD_2 +115 0x1800 //RX_TDDRC_THRD_3 +116 0x3000 //RX_TDDRC_SLANT_0 +117 0x6E00 //RX_TDDRC_SLANT_1 +118 0x1000 //RX_TDDRC_ALPHA_UP_0 +119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +120 0x0000 //RX_TDDRC_HMNC_FLAG +121 0x199A //RX_TDDRC_HMNC_GAIN +122 0x0001 //RX_TDDRC_SMT_FLAG +123 0x0CCD //RX_TDDRC_SMT_W +124 0x01E0 //RX_TDDRC_DRC_GAIN +38 0x0030 //RX_FDEQ_SUBNUM +39 0x4848 //RX_FDEQ_GAIN_0 +40 0x4848 //RX_FDEQ_GAIN_1 +41 0x4844 //RX_FDEQ_GAIN_2 +42 0x4B4D //RX_FDEQ_GAIN_3 +43 0x4E50 //RX_FDEQ_GAIN_4 +44 0x5254 //RX_FDEQ_GAIN_5 +45 0x5658 //RX_FDEQ_GAIN_6 +46 0x5C60 //RX_FDEQ_GAIN_7 +47 0x6468 //RX_FDEQ_GAIN_8 +48 0x6C70 //RX_FDEQ_GAIN_9 +49 0x7474 //RX_FDEQ_GAIN_10 +50 0x7474 //RX_FDEQ_GAIN_11 +51 0x7474 //RX_FDEQ_GAIN_12 +52 0x7474 //RX_FDEQ_GAIN_13 +53 0x7474 //RX_FDEQ_GAIN_14 +54 0x7474 //RX_FDEQ_GAIN_15 +55 0x4848 //RX_FDEQ_GAIN_16 +56 0x4848 //RX_FDEQ_GAIN_17 +57 0x4848 //RX_FDEQ_GAIN_18 +58 0x4848 //RX_FDEQ_GAIN_19 +59 0x4848 //RX_FDEQ_GAIN_20 +60 0x4848 //RX_FDEQ_GAIN_21 +61 0x4848 //RX_FDEQ_GAIN_22 +62 0x4848 //RX_FDEQ_GAIN_23 +63 0x0202 //RX_FDEQ_BIN_0 +64 0x0203 //RX_FDEQ_BIN_1 +65 0x0402 //RX_FDEQ_BIN_2 +66 0x0304 //RX_FDEQ_BIN_3 +67 0x0405 //RX_FDEQ_BIN_4 +68 0x0506 //RX_FDEQ_BIN_5 +69 0x0708 //RX_FDEQ_BIN_6 +70 0x090A //RX_FDEQ_BIN_7 +71 0x0B0C //RX_FDEQ_BIN_8 +72 0x0D0E //RX_FDEQ_BIN_9 +73 0x1214 //RX_FDEQ_BIN_10 +74 0x1E1E //RX_FDEQ_BIN_11 +75 0x1E1E //RX_FDEQ_BIN_12 +76 0x1E1E //RX_FDEQ_BIN_13 +77 0x1E1E //RX_FDEQ_BIN_14 +78 0x202C //RX_FDEQ_BIN_15 +79 0x0000 //RX_FDEQ_BIN_16 +80 0x0000 //RX_FDEQ_BIN_17 +81 0x0000 //RX_FDEQ_BIN_18 +82 0x0000 //RX_FDEQ_BIN_19 +83 0x0000 //RX_FDEQ_BIN_20 +84 0x0000 //RX_FDEQ_BIN_21 +85 0x0000 //RX_FDEQ_BIN_22 +86 0x0000 //RX_FDEQ_BIN_23 +87 0x4000 //RX_FDEQ_RESRV_0 +88 0x0320 //RX_FDEQ_RESRV_1 +89 0x0018 //RX_FDDRC_BAND_MARGIN_0 +90 0x0030 //RX_FDDRC_BAND_MARGIN_1 +91 0x0050 //RX_FDDRC_BAND_MARGIN_2 +92 0x0080 //RX_FDDRC_BAND_MARGIN_3 +93 0x0007 //RX_FDDRC_BLOCK_EXP +94 0x5000 //RX_FDDRC_THRD_2_0 +95 0x5000 //RX_FDDRC_THRD_2_1 +96 0x5000 //RX_FDDRC_THRD_2_2 +97 0x5000 //RX_FDDRC_THRD_2_3 +98 0x6400 //RX_FDDRC_THRD_3_0 +99 0x6400 //RX_FDDRC_THRD_3_1 +100 0x6400 //RX_FDDRC_THRD_3_2 +101 0x6400 //RX_FDDRC_THRD_3_3 +102 0x2000 //RX_FDDRC_SLANT_0_0 +103 0x2000 //RX_FDDRC_SLANT_0_1 +104 0x2000 //RX_FDDRC_SLANT_0_2 +105 0x2000 //RX_FDDRC_SLANT_0_3 +106 0x5333 //RX_FDDRC_SLANT_1_0 +107 0x5333 //RX_FDDRC_SLANT_1_1 +108 0x5333 //RX_FDDRC_SLANT_1_2 +109 0x5333 //RX_FDDRC_SLANT_1_3 +110 0x0000 //RX_FDDRC_RESRV_0 +129 0x0100 //RX_SPK_VOL +130 0x0000 //RX_VOL_RESRV_0 +#VOL 2 +6 0x1000 //RX_TDDRC_ALPHA_UP_1 +7 0x1000 //RX_TDDRC_ALPHA_UP_2 +8 0x1000 //RX_TDDRC_ALPHA_UP_3 +9 0x1000 //RX_TDDRC_ALPHA_UP_4 +27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +33 0x7000 //RX_TDDRC_LIMITER_THRD +34 0x0800 //RX_TDDRC_LIMITER_GAIN +112 0x0000 //RX_TDDRC_THRD_0 +113 0x0000 //RX_TDDRC_THRD_1 +114 0x1800 //RX_TDDRC_THRD_2 +115 0x1800 //RX_TDDRC_THRD_3 +116 0x3000 //RX_TDDRC_SLANT_0 +117 0x6E00 //RX_TDDRC_SLANT_1 +118 0x1000 //RX_TDDRC_ALPHA_UP_0 +119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +120 0x0000 //RX_TDDRC_HMNC_FLAG +121 0x199A //RX_TDDRC_HMNC_GAIN +122 0x0001 //RX_TDDRC_SMT_FLAG +123 0x0CCD //RX_TDDRC_SMT_W +124 0x01E0 //RX_TDDRC_DRC_GAIN +38 0x0030 //RX_FDEQ_SUBNUM +39 0x4848 //RX_FDEQ_GAIN_0 +40 0x4848 //RX_FDEQ_GAIN_1 +41 0x4844 //RX_FDEQ_GAIN_2 +42 0x4B4D //RX_FDEQ_GAIN_3 +43 0x4E50 //RX_FDEQ_GAIN_4 +44 0x5254 //RX_FDEQ_GAIN_5 +45 0x5658 //RX_FDEQ_GAIN_6 +46 0x5C60 //RX_FDEQ_GAIN_7 +47 0x6468 //RX_FDEQ_GAIN_8 +48 0x6C70 //RX_FDEQ_GAIN_9 +49 0x7474 //RX_FDEQ_GAIN_10 +50 0x7474 //RX_FDEQ_GAIN_11 +51 0x7474 //RX_FDEQ_GAIN_12 +52 0x7474 //RX_FDEQ_GAIN_13 +53 0x7474 //RX_FDEQ_GAIN_14 +54 0x7474 //RX_FDEQ_GAIN_15 +55 0x4848 //RX_FDEQ_GAIN_16 +56 0x4848 //RX_FDEQ_GAIN_17 +57 0x4848 //RX_FDEQ_GAIN_18 +58 0x4848 //RX_FDEQ_GAIN_19 +59 0x4848 //RX_FDEQ_GAIN_20 +60 0x4848 //RX_FDEQ_GAIN_21 +61 0x4848 //RX_FDEQ_GAIN_22 +62 0x4848 //RX_FDEQ_GAIN_23 +63 0x0202 //RX_FDEQ_BIN_0 +64 0x0203 //RX_FDEQ_BIN_1 +65 0x0402 //RX_FDEQ_BIN_2 +66 0x0304 //RX_FDEQ_BIN_3 +67 0x0405 //RX_FDEQ_BIN_4 +68 0x0506 //RX_FDEQ_BIN_5 +69 0x0708 //RX_FDEQ_BIN_6 +70 0x090A //RX_FDEQ_BIN_7 +71 0x0B0C //RX_FDEQ_BIN_8 +72 0x0D0E //RX_FDEQ_BIN_9 +73 0x1214 //RX_FDEQ_BIN_10 +74 0x1E1E //RX_FDEQ_BIN_11 +75 0x1E1E //RX_FDEQ_BIN_12 +76 0x1E1E //RX_FDEQ_BIN_13 +77 0x1E1E //RX_FDEQ_BIN_14 +78 0x202C //RX_FDEQ_BIN_15 +79 0x0000 //RX_FDEQ_BIN_16 +80 0x0000 //RX_FDEQ_BIN_17 +81 0x0000 //RX_FDEQ_BIN_18 +82 0x0000 //RX_FDEQ_BIN_19 +83 0x0000 //RX_FDEQ_BIN_20 +84 0x0000 //RX_FDEQ_BIN_21 +85 0x0000 //RX_FDEQ_BIN_22 +86 0x0000 //RX_FDEQ_BIN_23 +87 0x4000 //RX_FDEQ_RESRV_0 +88 0x0320 //RX_FDEQ_RESRV_1 +89 0x0018 //RX_FDDRC_BAND_MARGIN_0 +90 0x0030 //RX_FDDRC_BAND_MARGIN_1 +91 0x0050 //RX_FDDRC_BAND_MARGIN_2 +92 0x0080 //RX_FDDRC_BAND_MARGIN_3 +93 0x0007 //RX_FDDRC_BLOCK_EXP +94 0x5000 //RX_FDDRC_THRD_2_0 +95 0x5000 //RX_FDDRC_THRD_2_1 +96 0x5000 //RX_FDDRC_THRD_2_2 +97 0x5000 //RX_FDDRC_THRD_2_3 +98 0x6400 //RX_FDDRC_THRD_3_0 +99 0x6400 //RX_FDDRC_THRD_3_1 +100 0x6400 //RX_FDDRC_THRD_3_2 +101 0x6400 //RX_FDDRC_THRD_3_3 +102 0x2000 //RX_FDDRC_SLANT_0_0 +103 0x2000 //RX_FDDRC_SLANT_0_1 +104 0x2000 //RX_FDDRC_SLANT_0_2 +105 0x2000 //RX_FDDRC_SLANT_0_3 +106 0x5333 //RX_FDDRC_SLANT_1_0 +107 0x5333 //RX_FDDRC_SLANT_1_1 +108 0x5333 //RX_FDDRC_SLANT_1_2 +109 0x5333 //RX_FDDRC_SLANT_1_3 +110 0x0000 //RX_FDDRC_RESRV_0 +129 0x0100 //RX_SPK_VOL +130 0x0000 //RX_VOL_RESRV_0 +#VOL 3 +6 0x1000 //RX_TDDRC_ALPHA_UP_1 +7 0x1000 //RX_TDDRC_ALPHA_UP_2 +8 0x1000 //RX_TDDRC_ALPHA_UP_3 +9 0x1000 //RX_TDDRC_ALPHA_UP_4 +27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +33 0x7000 //RX_TDDRC_LIMITER_THRD +34 0x0800 //RX_TDDRC_LIMITER_GAIN +112 0x0000 //RX_TDDRC_THRD_0 +113 0x0000 //RX_TDDRC_THRD_1 +114 0x1800 //RX_TDDRC_THRD_2 +115 0x1800 //RX_TDDRC_THRD_3 +116 0x3000 //RX_TDDRC_SLANT_0 +117 0x6E00 //RX_TDDRC_SLANT_1 +118 0x1000 //RX_TDDRC_ALPHA_UP_0 +119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +120 0x0000 //RX_TDDRC_HMNC_FLAG +121 0x199A //RX_TDDRC_HMNC_GAIN +122 0x0001 //RX_TDDRC_SMT_FLAG +123 0x0CCD //RX_TDDRC_SMT_W +124 0x01E0 //RX_TDDRC_DRC_GAIN +38 0x0030 //RX_FDEQ_SUBNUM +39 0x4848 //RX_FDEQ_GAIN_0 +40 0x4848 //RX_FDEQ_GAIN_1 +41 0x4844 //RX_FDEQ_GAIN_2 +42 0x4B4D //RX_FDEQ_GAIN_3 +43 0x4E50 //RX_FDEQ_GAIN_4 +44 0x5254 //RX_FDEQ_GAIN_5 +45 0x5658 //RX_FDEQ_GAIN_6 +46 0x5C60 //RX_FDEQ_GAIN_7 +47 0x6468 //RX_FDEQ_GAIN_8 +48 0x6C70 //RX_FDEQ_GAIN_9 +49 0x7474 //RX_FDEQ_GAIN_10 +50 0x7474 //RX_FDEQ_GAIN_11 +51 0x7474 //RX_FDEQ_GAIN_12 +52 0x7474 //RX_FDEQ_GAIN_13 +53 0x7474 //RX_FDEQ_GAIN_14 +54 0x7474 //RX_FDEQ_GAIN_15 +55 0x4848 //RX_FDEQ_GAIN_16 +56 0x4848 //RX_FDEQ_GAIN_17 +57 0x4848 //RX_FDEQ_GAIN_18 +58 0x4848 //RX_FDEQ_GAIN_19 +59 0x4848 //RX_FDEQ_GAIN_20 +60 0x4848 //RX_FDEQ_GAIN_21 +61 0x4848 //RX_FDEQ_GAIN_22 +62 0x4848 //RX_FDEQ_GAIN_23 +63 0x0202 //RX_FDEQ_BIN_0 +64 0x0203 //RX_FDEQ_BIN_1 +65 0x0402 //RX_FDEQ_BIN_2 +66 0x0304 //RX_FDEQ_BIN_3 +67 0x0405 //RX_FDEQ_BIN_4 +68 0x0506 //RX_FDEQ_BIN_5 +69 0x0708 //RX_FDEQ_BIN_6 +70 0x090A //RX_FDEQ_BIN_7 +71 0x0B0C //RX_FDEQ_BIN_8 +72 0x0D0E //RX_FDEQ_BIN_9 +73 0x1214 //RX_FDEQ_BIN_10 +74 0x1E1E //RX_FDEQ_BIN_11 +75 0x1E1E //RX_FDEQ_BIN_12 +76 0x1E1E //RX_FDEQ_BIN_13 +77 0x1E1E //RX_FDEQ_BIN_14 +78 0x202C //RX_FDEQ_BIN_15 +79 0x0000 //RX_FDEQ_BIN_16 +80 0x0000 //RX_FDEQ_BIN_17 +81 0x0000 //RX_FDEQ_BIN_18 +82 0x0000 //RX_FDEQ_BIN_19 +83 0x0000 //RX_FDEQ_BIN_20 +84 0x0000 //RX_FDEQ_BIN_21 +85 0x0000 //RX_FDEQ_BIN_22 +86 0x0000 //RX_FDEQ_BIN_23 +87 0x4000 //RX_FDEQ_RESRV_0 +88 0x0320 //RX_FDEQ_RESRV_1 +89 0x0018 //RX_FDDRC_BAND_MARGIN_0 +90 0x0030 //RX_FDDRC_BAND_MARGIN_1 +91 0x0050 //RX_FDDRC_BAND_MARGIN_2 +92 0x0080 //RX_FDDRC_BAND_MARGIN_3 +93 0x0007 //RX_FDDRC_BLOCK_EXP +94 0x5000 //RX_FDDRC_THRD_2_0 +95 0x5000 //RX_FDDRC_THRD_2_1 +96 0x5000 //RX_FDDRC_THRD_2_2 +97 0x5000 //RX_FDDRC_THRD_2_3 +98 0x6400 //RX_FDDRC_THRD_3_0 +99 0x6400 //RX_FDDRC_THRD_3_1 +100 0x6400 //RX_FDDRC_THRD_3_2 +101 0x6400 //RX_FDDRC_THRD_3_3 +102 0x2000 //RX_FDDRC_SLANT_0_0 +103 0x2000 //RX_FDDRC_SLANT_0_1 +104 0x2000 //RX_FDDRC_SLANT_0_2 +105 0x2000 //RX_FDDRC_SLANT_0_3 +106 0x5333 //RX_FDDRC_SLANT_1_0 +107 0x5333 //RX_FDDRC_SLANT_1_1 +108 0x5333 //RX_FDDRC_SLANT_1_2 +109 0x5333 //RX_FDDRC_SLANT_1_3 +110 0x0000 //RX_FDDRC_RESRV_0 +129 0x0100 //RX_SPK_VOL +130 0x0000 //RX_VOL_RESRV_0 +#VOL 4 +6 0x1000 //RX_TDDRC_ALPHA_UP_1 +7 0x1000 //RX_TDDRC_ALPHA_UP_2 +8 0x1000 //RX_TDDRC_ALPHA_UP_3 +9 0x1000 //RX_TDDRC_ALPHA_UP_4 +27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +33 0x7000 //RX_TDDRC_LIMITER_THRD +34 0x0800 //RX_TDDRC_LIMITER_GAIN +112 0x0000 //RX_TDDRC_THRD_0 +113 0x0000 //RX_TDDRC_THRD_1 +114 0x1800 //RX_TDDRC_THRD_2 +115 0x1800 //RX_TDDRC_THRD_3 +116 0x3000 //RX_TDDRC_SLANT_0 +117 0x6E00 //RX_TDDRC_SLANT_1 +118 0x1000 //RX_TDDRC_ALPHA_UP_0 +119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +120 0x0000 //RX_TDDRC_HMNC_FLAG +121 0x199A //RX_TDDRC_HMNC_GAIN +122 0x0001 //RX_TDDRC_SMT_FLAG +123 0x0CCD //RX_TDDRC_SMT_W +124 0x01E0 //RX_TDDRC_DRC_GAIN +38 0x0030 //RX_FDEQ_SUBNUM +39 0x4848 //RX_FDEQ_GAIN_0 +40 0x4848 //RX_FDEQ_GAIN_1 +41 0x4844 //RX_FDEQ_GAIN_2 +42 0x4B4D //RX_FDEQ_GAIN_3 +43 0x4E50 //RX_FDEQ_GAIN_4 +44 0x5254 //RX_FDEQ_GAIN_5 +45 0x5658 //RX_FDEQ_GAIN_6 +46 0x5C60 //RX_FDEQ_GAIN_7 +47 0x6468 //RX_FDEQ_GAIN_8 +48 0x6C70 //RX_FDEQ_GAIN_9 +49 0x7474 //RX_FDEQ_GAIN_10 +50 0x7474 //RX_FDEQ_GAIN_11 +51 0x7474 //RX_FDEQ_GAIN_12 +52 0x7474 //RX_FDEQ_GAIN_13 +53 0x7474 //RX_FDEQ_GAIN_14 +54 0x7474 //RX_FDEQ_GAIN_15 +55 0x4848 //RX_FDEQ_GAIN_16 +56 0x4848 //RX_FDEQ_GAIN_17 +57 0x4848 //RX_FDEQ_GAIN_18 +58 0x4848 //RX_FDEQ_GAIN_19 +59 0x4848 //RX_FDEQ_GAIN_20 +60 0x4848 //RX_FDEQ_GAIN_21 +61 0x4848 //RX_FDEQ_GAIN_22 +62 0x4848 //RX_FDEQ_GAIN_23 +63 0x0202 //RX_FDEQ_BIN_0 +64 0x0203 //RX_FDEQ_BIN_1 +65 0x0402 //RX_FDEQ_BIN_2 +66 0x0304 //RX_FDEQ_BIN_3 +67 0x0405 //RX_FDEQ_BIN_4 +68 0x0506 //RX_FDEQ_BIN_5 +69 0x0708 //RX_FDEQ_BIN_6 +70 0x090A //RX_FDEQ_BIN_7 +71 0x0B0C //RX_FDEQ_BIN_8 +72 0x0D0E //RX_FDEQ_BIN_9 +73 0x1214 //RX_FDEQ_BIN_10 +74 0x1E1E //RX_FDEQ_BIN_11 +75 0x1E1E //RX_FDEQ_BIN_12 +76 0x1E1E //RX_FDEQ_BIN_13 +77 0x1E1E //RX_FDEQ_BIN_14 +78 0x202C //RX_FDEQ_BIN_15 +79 0x0000 //RX_FDEQ_BIN_16 +80 0x0000 //RX_FDEQ_BIN_17 +81 0x0000 //RX_FDEQ_BIN_18 +82 0x0000 //RX_FDEQ_BIN_19 +83 0x0000 //RX_FDEQ_BIN_20 +84 0x0000 //RX_FDEQ_BIN_21 +85 0x0000 //RX_FDEQ_BIN_22 +86 0x0000 //RX_FDEQ_BIN_23 +87 0x4000 //RX_FDEQ_RESRV_0 +88 0x0320 //RX_FDEQ_RESRV_1 +89 0x0018 //RX_FDDRC_BAND_MARGIN_0 +90 0x0030 //RX_FDDRC_BAND_MARGIN_1 +91 0x0050 //RX_FDDRC_BAND_MARGIN_2 +92 0x0080 //RX_FDDRC_BAND_MARGIN_3 +93 0x0007 //RX_FDDRC_BLOCK_EXP +94 0x5000 //RX_FDDRC_THRD_2_0 +95 0x5000 //RX_FDDRC_THRD_2_1 +96 0x5000 //RX_FDDRC_THRD_2_2 +97 0x5000 //RX_FDDRC_THRD_2_3 +98 0x6400 //RX_FDDRC_THRD_3_0 +99 0x6400 //RX_FDDRC_THRD_3_1 +100 0x6400 //RX_FDDRC_THRD_3_2 +101 0x6400 //RX_FDDRC_THRD_3_3 +102 0x2000 //RX_FDDRC_SLANT_0_0 +103 0x2000 //RX_FDDRC_SLANT_0_1 +104 0x2000 //RX_FDDRC_SLANT_0_2 +105 0x2000 //RX_FDDRC_SLANT_0_3 +106 0x5333 //RX_FDDRC_SLANT_1_0 +107 0x5333 //RX_FDDRC_SLANT_1_1 +108 0x5333 //RX_FDDRC_SLANT_1_2 +109 0x5333 //RX_FDDRC_SLANT_1_3 +110 0x0000 //RX_FDDRC_RESRV_0 +129 0x0100 //RX_SPK_VOL +130 0x0000 //RX_VOL_RESRV_0 +#VOL 5 +6 0x1000 //RX_TDDRC_ALPHA_UP_1 +7 0x1000 //RX_TDDRC_ALPHA_UP_2 +8 0x1000 //RX_TDDRC_ALPHA_UP_3 +9 0x1000 //RX_TDDRC_ALPHA_UP_4 +27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +33 0x7000 //RX_TDDRC_LIMITER_THRD +34 0x0800 //RX_TDDRC_LIMITER_GAIN +112 0x0000 //RX_TDDRC_THRD_0 +113 0x0000 //RX_TDDRC_THRD_1 +114 0x1800 //RX_TDDRC_THRD_2 +115 0x1800 //RX_TDDRC_THRD_3 +116 0x3000 //RX_TDDRC_SLANT_0 +117 0x6E00 //RX_TDDRC_SLANT_1 +118 0x1000 //RX_TDDRC_ALPHA_UP_0 +119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +120 0x0000 //RX_TDDRC_HMNC_FLAG +121 0x199A //RX_TDDRC_HMNC_GAIN +122 0x0001 //RX_TDDRC_SMT_FLAG +123 0x0CCD //RX_TDDRC_SMT_W +124 0x01E0 //RX_TDDRC_DRC_GAIN +38 0x0030 //RX_FDEQ_SUBNUM +39 0x4848 //RX_FDEQ_GAIN_0 +40 0x4848 //RX_FDEQ_GAIN_1 +41 0x4844 //RX_FDEQ_GAIN_2 +42 0x4B4D //RX_FDEQ_GAIN_3 +43 0x4E50 //RX_FDEQ_GAIN_4 +44 0x5254 //RX_FDEQ_GAIN_5 +45 0x5658 //RX_FDEQ_GAIN_6 +46 0x5C60 //RX_FDEQ_GAIN_7 +47 0x6468 //RX_FDEQ_GAIN_8 +48 0x6C70 //RX_FDEQ_GAIN_9 +49 0x7474 //RX_FDEQ_GAIN_10 +50 0x7474 //RX_FDEQ_GAIN_11 +51 0x7474 //RX_FDEQ_GAIN_12 +52 0x7474 //RX_FDEQ_GAIN_13 +53 0x7474 //RX_FDEQ_GAIN_14 +54 0x7474 //RX_FDEQ_GAIN_15 +55 0x4848 //RX_FDEQ_GAIN_16 +56 0x4848 //RX_FDEQ_GAIN_17 +57 0x4848 //RX_FDEQ_GAIN_18 +58 0x4848 //RX_FDEQ_GAIN_19 +59 0x4848 //RX_FDEQ_GAIN_20 +60 0x4848 //RX_FDEQ_GAIN_21 +61 0x4848 //RX_FDEQ_GAIN_22 +62 0x4848 //RX_FDEQ_GAIN_23 +63 0x0202 //RX_FDEQ_BIN_0 +64 0x0203 //RX_FDEQ_BIN_1 +65 0x0402 //RX_FDEQ_BIN_2 +66 0x0304 //RX_FDEQ_BIN_3 +67 0x0405 //RX_FDEQ_BIN_4 +68 0x0506 //RX_FDEQ_BIN_5 +69 0x0708 //RX_FDEQ_BIN_6 +70 0x090A //RX_FDEQ_BIN_7 +71 0x0B0C //RX_FDEQ_BIN_8 +72 0x0D0E //RX_FDEQ_BIN_9 +73 0x1214 //RX_FDEQ_BIN_10 +74 0x1E1E //RX_FDEQ_BIN_11 +75 0x1E1E //RX_FDEQ_BIN_12 +76 0x1E1E //RX_FDEQ_BIN_13 +77 0x1E1E //RX_FDEQ_BIN_14 +78 0x202C //RX_FDEQ_BIN_15 +79 0x0000 //RX_FDEQ_BIN_16 +80 0x0000 //RX_FDEQ_BIN_17 +81 0x0000 //RX_FDEQ_BIN_18 +82 0x0000 //RX_FDEQ_BIN_19 +83 0x0000 //RX_FDEQ_BIN_20 +84 0x0000 //RX_FDEQ_BIN_21 +85 0x0000 //RX_FDEQ_BIN_22 +86 0x0000 //RX_FDEQ_BIN_23 +87 0x4000 //RX_FDEQ_RESRV_0 +88 0x0320 //RX_FDEQ_RESRV_1 +89 0x0018 //RX_FDDRC_BAND_MARGIN_0 +90 0x0030 //RX_FDDRC_BAND_MARGIN_1 +91 0x0050 //RX_FDDRC_BAND_MARGIN_2 +92 0x0080 //RX_FDDRC_BAND_MARGIN_3 +93 0x0007 //RX_FDDRC_BLOCK_EXP +94 0x5000 //RX_FDDRC_THRD_2_0 +95 0x5000 //RX_FDDRC_THRD_2_1 +96 0x5000 //RX_FDDRC_THRD_2_2 +97 0x5000 //RX_FDDRC_THRD_2_3 +98 0x6400 //RX_FDDRC_THRD_3_0 +99 0x6400 //RX_FDDRC_THRD_3_1 +100 0x6400 //RX_FDDRC_THRD_3_2 +101 0x6400 //RX_FDDRC_THRD_3_3 +102 0x2000 //RX_FDDRC_SLANT_0_0 +103 0x2000 //RX_FDDRC_SLANT_0_1 +104 0x2000 //RX_FDDRC_SLANT_0_2 +105 0x2000 //RX_FDDRC_SLANT_0_3 +106 0x5333 //RX_FDDRC_SLANT_1_0 +107 0x5333 //RX_FDDRC_SLANT_1_1 +108 0x5333 //RX_FDDRC_SLANT_1_2 +109 0x5333 //RX_FDDRC_SLANT_1_3 +110 0x0000 //RX_FDDRC_RESRV_0 +129 0x0100 //RX_SPK_VOL +130 0x0000 //RX_VOL_RESRV_0 +#VOL 6 +6 0x1000 //RX_TDDRC_ALPHA_UP_1 +7 0x1000 //RX_TDDRC_ALPHA_UP_2 +8 0x1000 //RX_TDDRC_ALPHA_UP_3 +9 0x1000 //RX_TDDRC_ALPHA_UP_4 +27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +33 0x7000 //RX_TDDRC_LIMITER_THRD +34 0x0800 //RX_TDDRC_LIMITER_GAIN +112 0x0000 //RX_TDDRC_THRD_0 +113 0x0000 //RX_TDDRC_THRD_1 +114 0x1800 //RX_TDDRC_THRD_2 +115 0x1800 //RX_TDDRC_THRD_3 +116 0x3000 //RX_TDDRC_SLANT_0 +117 0x6E00 //RX_TDDRC_SLANT_1 +118 0x1000 //RX_TDDRC_ALPHA_UP_0 +119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +120 0x0000 //RX_TDDRC_HMNC_FLAG +121 0x199A //RX_TDDRC_HMNC_GAIN +122 0x0001 //RX_TDDRC_SMT_FLAG +123 0x0CCD //RX_TDDRC_SMT_W +124 0x01E0 //RX_TDDRC_DRC_GAIN +38 0x0030 //RX_FDEQ_SUBNUM +39 0x4848 //RX_FDEQ_GAIN_0 +40 0x4848 //RX_FDEQ_GAIN_1 +41 0x4844 //RX_FDEQ_GAIN_2 +42 0x4B4D //RX_FDEQ_GAIN_3 +43 0x4E50 //RX_FDEQ_GAIN_4 +44 0x5254 //RX_FDEQ_GAIN_5 +45 0x5658 //RX_FDEQ_GAIN_6 +46 0x5C60 //RX_FDEQ_GAIN_7 +47 0x6468 //RX_FDEQ_GAIN_8 +48 0x6C70 //RX_FDEQ_GAIN_9 +49 0x7474 //RX_FDEQ_GAIN_10 +50 0x7474 //RX_FDEQ_GAIN_11 +51 0x7474 //RX_FDEQ_GAIN_12 +52 0x7474 //RX_FDEQ_GAIN_13 +53 0x7474 //RX_FDEQ_GAIN_14 +54 0x7474 //RX_FDEQ_GAIN_15 +55 0x4848 //RX_FDEQ_GAIN_16 +56 0x4848 //RX_FDEQ_GAIN_17 +57 0x4848 //RX_FDEQ_GAIN_18 +58 0x4848 //RX_FDEQ_GAIN_19 +59 0x4848 //RX_FDEQ_GAIN_20 +60 0x4848 //RX_FDEQ_GAIN_21 +61 0x4848 //RX_FDEQ_GAIN_22 +62 0x4848 //RX_FDEQ_GAIN_23 +63 0x0202 //RX_FDEQ_BIN_0 +64 0x0203 //RX_FDEQ_BIN_1 +65 0x0402 //RX_FDEQ_BIN_2 +66 0x0304 //RX_FDEQ_BIN_3 +67 0x0405 //RX_FDEQ_BIN_4 +68 0x0506 //RX_FDEQ_BIN_5 +69 0x0708 //RX_FDEQ_BIN_6 +70 0x090A //RX_FDEQ_BIN_7 +71 0x0B0C //RX_FDEQ_BIN_8 +72 0x0D0E //RX_FDEQ_BIN_9 +73 0x1214 //RX_FDEQ_BIN_10 +74 0x1E1E //RX_FDEQ_BIN_11 +75 0x1E1E //RX_FDEQ_BIN_12 +76 0x1E1E //RX_FDEQ_BIN_13 +77 0x1E1E //RX_FDEQ_BIN_14 +78 0x202C //RX_FDEQ_BIN_15 +79 0x0000 //RX_FDEQ_BIN_16 +80 0x0000 //RX_FDEQ_BIN_17 +81 0x0000 //RX_FDEQ_BIN_18 +82 0x0000 //RX_FDEQ_BIN_19 +83 0x0000 //RX_FDEQ_BIN_20 +84 0x0000 //RX_FDEQ_BIN_21 +85 0x0000 //RX_FDEQ_BIN_22 +86 0x0000 //RX_FDEQ_BIN_23 +87 0x4000 //RX_FDEQ_RESRV_0 +88 0x0320 //RX_FDEQ_RESRV_1 +89 0x0018 //RX_FDDRC_BAND_MARGIN_0 +90 0x0030 //RX_FDDRC_BAND_MARGIN_1 +91 0x0050 //RX_FDDRC_BAND_MARGIN_2 +92 0x0080 //RX_FDDRC_BAND_MARGIN_3 +93 0x0007 //RX_FDDRC_BLOCK_EXP +94 0x5000 //RX_FDDRC_THRD_2_0 +95 0x5000 //RX_FDDRC_THRD_2_1 +96 0x5000 //RX_FDDRC_THRD_2_2 +97 0x5000 //RX_FDDRC_THRD_2_3 +98 0x6400 //RX_FDDRC_THRD_3_0 +99 0x6400 //RX_FDDRC_THRD_3_1 +100 0x6400 //RX_FDDRC_THRD_3_2 +101 0x6400 //RX_FDDRC_THRD_3_3 +102 0x2000 //RX_FDDRC_SLANT_0_0 +103 0x2000 //RX_FDDRC_SLANT_0_1 +104 0x2000 //RX_FDDRC_SLANT_0_2 +105 0x2000 //RX_FDDRC_SLANT_0_3 +106 0x5333 //RX_FDDRC_SLANT_1_0 +107 0x5333 //RX_FDDRC_SLANT_1_1 +108 0x5333 //RX_FDDRC_SLANT_1_2 +109 0x5333 //RX_FDDRC_SLANT_1_3 +110 0x0000 //RX_FDDRC_RESRV_0 +129 0x0100 //RX_SPK_VOL +130 0x0000 //RX_VOL_RESRV_0 +#RX 2 +157 0x000C //RX_RECVFUNC_MODE_0 +158 0x0000 //RX_RECVFUNC_MODE_1 +159 0x0003 //RX_SAMPLINGFREQ_SIG +160 0x0003 //RX_SAMPLINGFREQ_PROC +161 0x000A //RX_FRAME_SZ +162 0x0000 //RX_DELAY_OPT +163 0x1000 //RX_TDDRC_ALPHA_UP_1 +164 0x1000 //RX_TDDRC_ALPHA_UP_2 +165 0x1000 //RX_TDDRC_ALPHA_UP_3 +166 0x1000 //RX_TDDRC_ALPHA_UP_4 +167 0x0800 //RX_PGA +168 0x7FFF //RX_A_HP +169 0x4000 //RX_B_PE +170 0x5800 //RX_THR_PITCH_DET_0 +171 0x5000 //RX_THR_PITCH_DET_1 +172 0x4000 //RX_THR_PITCH_DET_2 +173 0x0008 //RX_PITCH_BFR_LEN +174 0x0003 //RX_SBD_PITCH_DET +175 0x0100 //RX_PP_RESRV_0 +176 0x0020 //RX_PP_RESRV_1 +177 0x0600 //RX_N_SN_EST +178 0x000C //RX_N2_SN_EST +179 0x000F //RX_NS_LVL_CTRL +180 0xF800 //RX_THR_SN_EST +181 0x7E00 //RX_LAMBDA_PFILT +182 0x000A //RX_FENS_RESRV_0 +183 0x0190 //RX_FENS_RESRV_1 +184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +187 0x0002 //RX_EXTRA_NS_L +188 0x0800 //RX_EXTRA_NS_A +189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +190 0x7000 //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +192 0x199A //RX_A_POST_FLT +193 0x0000 //RX_LMT_THRD +194 0x4000 //RX_LMT_ALPHA +195 0x0030 //RX_FDEQ_SUBNUM +196 0x4848 //RX_FDEQ_GAIN_0 +197 0x4848 //RX_FDEQ_GAIN_1 +198 0x4844 //RX_FDEQ_GAIN_2 +199 0x4B4D //RX_FDEQ_GAIN_3 +200 0x4E50 //RX_FDEQ_GAIN_4 +201 0x5254 //RX_FDEQ_GAIN_5 +202 0x5658 //RX_FDEQ_GAIN_6 +203 0x5C60 //RX_FDEQ_GAIN_7 +204 0x6468 //RX_FDEQ_GAIN_8 +205 0x6C70 //RX_FDEQ_GAIN_9 +206 0x7474 //RX_FDEQ_GAIN_10 +207 0x7474 //RX_FDEQ_GAIN_11 +208 0x7474 //RX_FDEQ_GAIN_12 +209 0x7474 //RX_FDEQ_GAIN_13 +210 0x7474 //RX_FDEQ_GAIN_14 +211 0x7474 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0202 //RX_FDEQ_BIN_0 +221 0x0203 //RX_FDEQ_BIN_1 +222 0x0402 //RX_FDEQ_BIN_2 +223 0x0304 //RX_FDEQ_BIN_3 +224 0x0405 //RX_FDEQ_BIN_4 +225 0x0506 //RX_FDEQ_BIN_5 +226 0x0708 //RX_FDEQ_BIN_6 +227 0x090A //RX_FDEQ_BIN_7 +228 0x0B0C //RX_FDEQ_BIN_8 +229 0x0D0E //RX_FDEQ_BIN_9 +230 0x1214 //RX_FDEQ_BIN_10 +231 0x1E1E //RX_FDEQ_BIN_11 +232 0x1E1E //RX_FDEQ_BIN_12 +233 0x1E1E //RX_FDEQ_BIN_13 +234 0x1E1E //RX_FDEQ_BIN_14 +235 0x202C //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x4000 //RX_FDEQ_RESRV_0 +245 0x0320 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0030 //RX_FDDRC_BAND_MARGIN_1 +248 0x0050 //RX_FDDRC_BAND_MARGIN_2 +249 0x0080 //RX_FDDRC_BAND_MARGIN_3 +250 0x0007 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x5000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x6400 //RX_FDDRC_THRD_3_2 +258 0x6400 //RX_FDDRC_THRD_3_3 +259 0x2000 //RX_FDDRC_SLANT_0_0 +260 0x2000 //RX_FDDRC_SLANT_0_1 +261 0x2000 //RX_FDDRC_SLANT_0_2 +262 0x2000 //RX_FDDRC_SLANT_0_3 +263 0x5333 //RX_FDDRC_SLANT_1_0 +264 0x5333 //RX_FDDRC_SLANT_1_1 +265 0x5333 //RX_FDDRC_SLANT_1_2 +266 0x5333 //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +268 0x0002 //RX_FILTINDX +269 0x0000 //RX_TDDRC_THRD_0 +270 0x0000 //RX_TDDRC_THRD_1 +271 0x1800 //RX_TDDRC_THRD_2 +272 0x1800 //RX_TDDRC_THRD_3 +273 0x3000 //RX_TDDRC_SLANT_0 +274 0x6E00 //RX_TDDRC_SLANT_1 +275 0x1000 //RX_TDDRC_ALPHA_UP_0 +276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x199A //RX_TDDRC_HMNC_GAIN +279 0x0001 //RX_TDDRC_SMT_FLAG +280 0x0CCD //RX_TDDRC_SMT_W +281 0x01E0 //RX_TDDRC_DRC_GAIN +282 0x7C00 //RX_LAMBDA_PKA_FP +283 0x2000 //RX_TPKA_FP +284 0x2000 //RX_MIN_G_FP +285 0x0080 //RX_MAX_G_FP +286 0x0100 //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 +288 0x0000 //RX_MAXLEVEL_CNG +289 0x3000 //RX_BWE_UV_TH +290 0x3000 //RX_BWE_UV_TH2 +291 0x1800 //RX_BWE_UV_TH3 +292 0x1000 //RX_BWE_V_TH +293 0x04CD //RX_BWE_GAIN1_V_TH1 +294 0x0F33 //RX_BWE_GAIN1_V_TH2 +295 0x7333 //RX_BWE_UV_EQ +296 0x199A //RX_BWE_V_EQ +297 0x7333 //RX_BWE_TONE_TH +298 0x0004 //RX_BWE_UV_HOLD_T +299 0x6CCD //RX_BWE_GAIN2_ALPHA +300 0x799A //RX_BWE_GAIN3_ALPHA +301 0x001E //RX_BWE_CUTOFF +302 0x3000 //RX_BWE_GAINFILL +303 0x3200 //RX_BWE_MAXTH_TONE +304 0x2000 //RX_BWE_EQ_0 +305 0x2000 //RX_BWE_EQ_1 +306 0x2000 //RX_BWE_EQ_2 +307 0x2000 //RX_BWE_EQ_3 +308 0x2000 //RX_BWE_EQ_4 +309 0x2000 //RX_BWE_EQ_5 +310 0x2000 //RX_BWE_EQ_6 +311 0x0000 //RX_BWE_RESRV_0 +312 0x0000 //RX_BWE_RESRV_1 +313 0x0000 //RX_BWE_RESRV_2 +#VOL 0 +163 0x1000 //RX_TDDRC_ALPHA_UP_1 +164 0x1000 //RX_TDDRC_ALPHA_UP_2 +165 0x1000 //RX_TDDRC_ALPHA_UP_3 +166 0x1000 //RX_TDDRC_ALPHA_UP_4 +184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +190 0x7000 //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +269 0x0000 //RX_TDDRC_THRD_0 +270 0x0000 //RX_TDDRC_THRD_1 +271 0x1800 //RX_TDDRC_THRD_2 +272 0x1800 //RX_TDDRC_THRD_3 +273 0x3000 //RX_TDDRC_SLANT_0 +274 0x6E00 //RX_TDDRC_SLANT_1 +275 0x1000 //RX_TDDRC_ALPHA_UP_0 +276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x199A //RX_TDDRC_HMNC_GAIN +279 0x0001 //RX_TDDRC_SMT_FLAG +280 0x0CCD //RX_TDDRC_SMT_W +281 0x01E0 //RX_TDDRC_DRC_GAIN +195 0x0030 //RX_FDEQ_SUBNUM +196 0x4848 //RX_FDEQ_GAIN_0 +197 0x4848 //RX_FDEQ_GAIN_1 +198 0x4844 //RX_FDEQ_GAIN_2 +199 0x4B4D //RX_FDEQ_GAIN_3 +200 0x4E50 //RX_FDEQ_GAIN_4 +201 0x5254 //RX_FDEQ_GAIN_5 +202 0x5658 //RX_FDEQ_GAIN_6 +203 0x5C60 //RX_FDEQ_GAIN_7 +204 0x6468 //RX_FDEQ_GAIN_8 +205 0x6C70 //RX_FDEQ_GAIN_9 +206 0x7474 //RX_FDEQ_GAIN_10 +207 0x7474 //RX_FDEQ_GAIN_11 +208 0x7474 //RX_FDEQ_GAIN_12 +209 0x7474 //RX_FDEQ_GAIN_13 +210 0x7474 //RX_FDEQ_GAIN_14 +211 0x7474 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0202 //RX_FDEQ_BIN_0 +221 0x0203 //RX_FDEQ_BIN_1 +222 0x0402 //RX_FDEQ_BIN_2 +223 0x0304 //RX_FDEQ_BIN_3 +224 0x0405 //RX_FDEQ_BIN_4 +225 0x0506 //RX_FDEQ_BIN_5 +226 0x0708 //RX_FDEQ_BIN_6 +227 0x090A //RX_FDEQ_BIN_7 +228 0x0B0C //RX_FDEQ_BIN_8 +229 0x0D0E //RX_FDEQ_BIN_9 +230 0x1214 //RX_FDEQ_BIN_10 +231 0x1E1E //RX_FDEQ_BIN_11 +232 0x1E1E //RX_FDEQ_BIN_12 +233 0x1E1E //RX_FDEQ_BIN_13 +234 0x1E1E //RX_FDEQ_BIN_14 +235 0x202C //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x4000 //RX_FDEQ_RESRV_0 +245 0x0320 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0030 //RX_FDDRC_BAND_MARGIN_1 +248 0x0050 //RX_FDDRC_BAND_MARGIN_2 +249 0x0080 //RX_FDDRC_BAND_MARGIN_3 +250 0x0007 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x5000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x6400 //RX_FDDRC_THRD_3_2 +258 0x6400 //RX_FDDRC_THRD_3_3 +259 0x2000 //RX_FDDRC_SLANT_0_0 +260 0x2000 //RX_FDDRC_SLANT_0_1 +261 0x2000 //RX_FDDRC_SLANT_0_2 +262 0x2000 //RX_FDDRC_SLANT_0_3 +263 0x5333 //RX_FDDRC_SLANT_1_0 +264 0x5333 //RX_FDDRC_SLANT_1_1 +265 0x5333 //RX_FDDRC_SLANT_1_2 +266 0x5333 //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +286 0x0100 //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 +#VOL 1 +163 0x1000 //RX_TDDRC_ALPHA_UP_1 +164 0x1000 //RX_TDDRC_ALPHA_UP_2 +165 0x1000 //RX_TDDRC_ALPHA_UP_3 +166 0x1000 //RX_TDDRC_ALPHA_UP_4 +184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +190 0x7000 //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +269 0x0000 //RX_TDDRC_THRD_0 +270 0x0000 //RX_TDDRC_THRD_1 +271 0x1800 //RX_TDDRC_THRD_2 +272 0x1800 //RX_TDDRC_THRD_3 +273 0x3000 //RX_TDDRC_SLANT_0 +274 0x6E00 //RX_TDDRC_SLANT_1 +275 0x1000 //RX_TDDRC_ALPHA_UP_0 +276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x199A //RX_TDDRC_HMNC_GAIN +279 0x0001 //RX_TDDRC_SMT_FLAG +280 0x0CCD //RX_TDDRC_SMT_W +281 0x01E0 //RX_TDDRC_DRC_GAIN +195 0x0030 //RX_FDEQ_SUBNUM +196 0x4848 //RX_FDEQ_GAIN_0 +197 0x4848 //RX_FDEQ_GAIN_1 +198 0x4844 //RX_FDEQ_GAIN_2 +199 0x4B4D //RX_FDEQ_GAIN_3 +200 0x4E50 //RX_FDEQ_GAIN_4 +201 0x5254 //RX_FDEQ_GAIN_5 +202 0x5658 //RX_FDEQ_GAIN_6 +203 0x5C60 //RX_FDEQ_GAIN_7 +204 0x6468 //RX_FDEQ_GAIN_8 +205 0x6C70 //RX_FDEQ_GAIN_9 +206 0x7474 //RX_FDEQ_GAIN_10 +207 0x7474 //RX_FDEQ_GAIN_11 +208 0x7474 //RX_FDEQ_GAIN_12 +209 0x7474 //RX_FDEQ_GAIN_13 +210 0x7474 //RX_FDEQ_GAIN_14 +211 0x7474 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0202 //RX_FDEQ_BIN_0 +221 0x0203 //RX_FDEQ_BIN_1 +222 0x0402 //RX_FDEQ_BIN_2 +223 0x0304 //RX_FDEQ_BIN_3 +224 0x0405 //RX_FDEQ_BIN_4 +225 0x0506 //RX_FDEQ_BIN_5 +226 0x0708 //RX_FDEQ_BIN_6 +227 0x090A //RX_FDEQ_BIN_7 +228 0x0B0C //RX_FDEQ_BIN_8 +229 0x0D0E //RX_FDEQ_BIN_9 +230 0x1214 //RX_FDEQ_BIN_10 +231 0x1E1E //RX_FDEQ_BIN_11 +232 0x1E1E //RX_FDEQ_BIN_12 +233 0x1E1E //RX_FDEQ_BIN_13 +234 0x1E1E //RX_FDEQ_BIN_14 +235 0x202C //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x4000 //RX_FDEQ_RESRV_0 +245 0x0320 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0030 //RX_FDDRC_BAND_MARGIN_1 +248 0x0050 //RX_FDDRC_BAND_MARGIN_2 +249 0x0080 //RX_FDDRC_BAND_MARGIN_3 +250 0x0007 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x5000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x6400 //RX_FDDRC_THRD_3_2 +258 0x6400 //RX_FDDRC_THRD_3_3 +259 0x2000 //RX_FDDRC_SLANT_0_0 +260 0x2000 //RX_FDDRC_SLANT_0_1 +261 0x2000 //RX_FDDRC_SLANT_0_2 +262 0x2000 //RX_FDDRC_SLANT_0_3 +263 0x5333 //RX_FDDRC_SLANT_1_0 +264 0x5333 //RX_FDDRC_SLANT_1_1 +265 0x5333 //RX_FDDRC_SLANT_1_2 +266 0x5333 //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +286 0x0100 //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 +#VOL 2 +163 0x1000 //RX_TDDRC_ALPHA_UP_1 +164 0x1000 //RX_TDDRC_ALPHA_UP_2 +165 0x1000 //RX_TDDRC_ALPHA_UP_3 +166 0x1000 //RX_TDDRC_ALPHA_UP_4 +184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +190 0x7000 //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +269 0x0000 //RX_TDDRC_THRD_0 +270 0x0000 //RX_TDDRC_THRD_1 +271 0x1800 //RX_TDDRC_THRD_2 +272 0x1800 //RX_TDDRC_THRD_3 +273 0x3000 //RX_TDDRC_SLANT_0 +274 0x6E00 //RX_TDDRC_SLANT_1 +275 0x1000 //RX_TDDRC_ALPHA_UP_0 +276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x199A //RX_TDDRC_HMNC_GAIN +279 0x0001 //RX_TDDRC_SMT_FLAG +280 0x0CCD //RX_TDDRC_SMT_W +281 0x01E0 //RX_TDDRC_DRC_GAIN +195 0x0030 //RX_FDEQ_SUBNUM +196 0x4848 //RX_FDEQ_GAIN_0 +197 0x4848 //RX_FDEQ_GAIN_1 +198 0x4844 //RX_FDEQ_GAIN_2 +199 0x4B4D //RX_FDEQ_GAIN_3 +200 0x4E50 //RX_FDEQ_GAIN_4 +201 0x5254 //RX_FDEQ_GAIN_5 +202 0x5658 //RX_FDEQ_GAIN_6 +203 0x5C60 //RX_FDEQ_GAIN_7 +204 0x6468 //RX_FDEQ_GAIN_8 +205 0x6C70 //RX_FDEQ_GAIN_9 +206 0x7474 //RX_FDEQ_GAIN_10 +207 0x7474 //RX_FDEQ_GAIN_11 +208 0x7474 //RX_FDEQ_GAIN_12 +209 0x7474 //RX_FDEQ_GAIN_13 +210 0x7474 //RX_FDEQ_GAIN_14 +211 0x7474 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0202 //RX_FDEQ_BIN_0 +221 0x0203 //RX_FDEQ_BIN_1 +222 0x0402 //RX_FDEQ_BIN_2 +223 0x0304 //RX_FDEQ_BIN_3 +224 0x0405 //RX_FDEQ_BIN_4 +225 0x0506 //RX_FDEQ_BIN_5 +226 0x0708 //RX_FDEQ_BIN_6 +227 0x090A //RX_FDEQ_BIN_7 +228 0x0B0C //RX_FDEQ_BIN_8 +229 0x0D0E //RX_FDEQ_BIN_9 +230 0x1214 //RX_FDEQ_BIN_10 +231 0x1E1E //RX_FDEQ_BIN_11 +232 0x1E1E //RX_FDEQ_BIN_12 +233 0x1E1E //RX_FDEQ_BIN_13 +234 0x1E1E //RX_FDEQ_BIN_14 +235 0x202C //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x4000 //RX_FDEQ_RESRV_0 +245 0x0320 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0030 //RX_FDDRC_BAND_MARGIN_1 +248 0x0050 //RX_FDDRC_BAND_MARGIN_2 +249 0x0080 //RX_FDDRC_BAND_MARGIN_3 +250 0x0007 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x5000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x6400 //RX_FDDRC_THRD_3_2 +258 0x6400 //RX_FDDRC_THRD_3_3 +259 0x2000 //RX_FDDRC_SLANT_0_0 +260 0x2000 //RX_FDDRC_SLANT_0_1 +261 0x2000 //RX_FDDRC_SLANT_0_2 +262 0x2000 //RX_FDDRC_SLANT_0_3 +263 0x5333 //RX_FDDRC_SLANT_1_0 +264 0x5333 //RX_FDDRC_SLANT_1_1 +265 0x5333 //RX_FDDRC_SLANT_1_2 +266 0x5333 //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +286 0x0100 //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 +#VOL 3 +163 0x1000 //RX_TDDRC_ALPHA_UP_1 +164 0x1000 //RX_TDDRC_ALPHA_UP_2 +165 0x1000 //RX_TDDRC_ALPHA_UP_3 +166 0x1000 //RX_TDDRC_ALPHA_UP_4 +184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +190 0x7000 //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +269 0x0000 //RX_TDDRC_THRD_0 +270 0x0000 //RX_TDDRC_THRD_1 +271 0x1800 //RX_TDDRC_THRD_2 +272 0x1800 //RX_TDDRC_THRD_3 +273 0x3000 //RX_TDDRC_SLANT_0 +274 0x6E00 //RX_TDDRC_SLANT_1 +275 0x1000 //RX_TDDRC_ALPHA_UP_0 +276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x199A //RX_TDDRC_HMNC_GAIN +279 0x0001 //RX_TDDRC_SMT_FLAG +280 0x0CCD //RX_TDDRC_SMT_W +281 0x01E0 //RX_TDDRC_DRC_GAIN +195 0x0030 //RX_FDEQ_SUBNUM +196 0x4848 //RX_FDEQ_GAIN_0 +197 0x4848 //RX_FDEQ_GAIN_1 +198 0x4844 //RX_FDEQ_GAIN_2 +199 0x4B4D //RX_FDEQ_GAIN_3 +200 0x4E50 //RX_FDEQ_GAIN_4 +201 0x5254 //RX_FDEQ_GAIN_5 +202 0x5658 //RX_FDEQ_GAIN_6 +203 0x5C60 //RX_FDEQ_GAIN_7 +204 0x6468 //RX_FDEQ_GAIN_8 +205 0x6C70 //RX_FDEQ_GAIN_9 +206 0x7474 //RX_FDEQ_GAIN_10 +207 0x7474 //RX_FDEQ_GAIN_11 +208 0x7474 //RX_FDEQ_GAIN_12 +209 0x7474 //RX_FDEQ_GAIN_13 +210 0x7474 //RX_FDEQ_GAIN_14 +211 0x7474 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0202 //RX_FDEQ_BIN_0 +221 0x0203 //RX_FDEQ_BIN_1 +222 0x0402 //RX_FDEQ_BIN_2 +223 0x0304 //RX_FDEQ_BIN_3 +224 0x0405 //RX_FDEQ_BIN_4 +225 0x0506 //RX_FDEQ_BIN_5 +226 0x0708 //RX_FDEQ_BIN_6 +227 0x090A //RX_FDEQ_BIN_7 +228 0x0B0C //RX_FDEQ_BIN_8 +229 0x0D0E //RX_FDEQ_BIN_9 +230 0x1214 //RX_FDEQ_BIN_10 +231 0x1E1E //RX_FDEQ_BIN_11 +232 0x1E1E //RX_FDEQ_BIN_12 +233 0x1E1E //RX_FDEQ_BIN_13 +234 0x1E1E //RX_FDEQ_BIN_14 +235 0x202C //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x4000 //RX_FDEQ_RESRV_0 +245 0x0320 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0030 //RX_FDDRC_BAND_MARGIN_1 +248 0x0050 //RX_FDDRC_BAND_MARGIN_2 +249 0x0080 //RX_FDDRC_BAND_MARGIN_3 +250 0x0007 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x5000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x6400 //RX_FDDRC_THRD_3_2 +258 0x6400 //RX_FDDRC_THRD_3_3 +259 0x2000 //RX_FDDRC_SLANT_0_0 +260 0x2000 //RX_FDDRC_SLANT_0_1 +261 0x2000 //RX_FDDRC_SLANT_0_2 +262 0x2000 //RX_FDDRC_SLANT_0_3 +263 0x5333 //RX_FDDRC_SLANT_1_0 +264 0x5333 //RX_FDDRC_SLANT_1_1 +265 0x5333 //RX_FDDRC_SLANT_1_2 +266 0x5333 //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +286 0x0100 //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 +#VOL 4 +163 0x1000 //RX_TDDRC_ALPHA_UP_1 +164 0x1000 //RX_TDDRC_ALPHA_UP_2 +165 0x1000 //RX_TDDRC_ALPHA_UP_3 +166 0x1000 //RX_TDDRC_ALPHA_UP_4 +184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +190 0x7000 //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +269 0x0000 //RX_TDDRC_THRD_0 +270 0x0000 //RX_TDDRC_THRD_1 +271 0x1800 //RX_TDDRC_THRD_2 +272 0x1800 //RX_TDDRC_THRD_3 +273 0x3000 //RX_TDDRC_SLANT_0 +274 0x6E00 //RX_TDDRC_SLANT_1 +275 0x1000 //RX_TDDRC_ALPHA_UP_0 +276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x199A //RX_TDDRC_HMNC_GAIN +279 0x0001 //RX_TDDRC_SMT_FLAG +280 0x0CCD //RX_TDDRC_SMT_W +281 0x01E0 //RX_TDDRC_DRC_GAIN +195 0x0030 //RX_FDEQ_SUBNUM +196 0x4848 //RX_FDEQ_GAIN_0 +197 0x4848 //RX_FDEQ_GAIN_1 +198 0x4844 //RX_FDEQ_GAIN_2 +199 0x4B4D //RX_FDEQ_GAIN_3 +200 0x4E50 //RX_FDEQ_GAIN_4 +201 0x5254 //RX_FDEQ_GAIN_5 +202 0x5658 //RX_FDEQ_GAIN_6 +203 0x5C60 //RX_FDEQ_GAIN_7 +204 0x6468 //RX_FDEQ_GAIN_8 +205 0x6C70 //RX_FDEQ_GAIN_9 +206 0x7474 //RX_FDEQ_GAIN_10 +207 0x7474 //RX_FDEQ_GAIN_11 +208 0x7474 //RX_FDEQ_GAIN_12 +209 0x7474 //RX_FDEQ_GAIN_13 +210 0x7474 //RX_FDEQ_GAIN_14 +211 0x7474 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0202 //RX_FDEQ_BIN_0 +221 0x0203 //RX_FDEQ_BIN_1 +222 0x0402 //RX_FDEQ_BIN_2 +223 0x0304 //RX_FDEQ_BIN_3 +224 0x0405 //RX_FDEQ_BIN_4 +225 0x0506 //RX_FDEQ_BIN_5 +226 0x0708 //RX_FDEQ_BIN_6 +227 0x090A //RX_FDEQ_BIN_7 +228 0x0B0C //RX_FDEQ_BIN_8 +229 0x0D0E //RX_FDEQ_BIN_9 +230 0x1214 //RX_FDEQ_BIN_10 +231 0x1E1E //RX_FDEQ_BIN_11 +232 0x1E1E //RX_FDEQ_BIN_12 +233 0x1E1E //RX_FDEQ_BIN_13 +234 0x1E1E //RX_FDEQ_BIN_14 +235 0x202C //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x4000 //RX_FDEQ_RESRV_0 +245 0x0320 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0030 //RX_FDDRC_BAND_MARGIN_1 +248 0x0050 //RX_FDDRC_BAND_MARGIN_2 +249 0x0080 //RX_FDDRC_BAND_MARGIN_3 +250 0x0007 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x5000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x6400 //RX_FDDRC_THRD_3_2 +258 0x6400 //RX_FDDRC_THRD_3_3 +259 0x2000 //RX_FDDRC_SLANT_0_0 +260 0x2000 //RX_FDDRC_SLANT_0_1 +261 0x2000 //RX_FDDRC_SLANT_0_2 +262 0x2000 //RX_FDDRC_SLANT_0_3 +263 0x5333 //RX_FDDRC_SLANT_1_0 +264 0x5333 //RX_FDDRC_SLANT_1_1 +265 0x5333 //RX_FDDRC_SLANT_1_2 +266 0x5333 //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +286 0x0100 //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 +#VOL 5 +163 0x1000 //RX_TDDRC_ALPHA_UP_1 +164 0x1000 //RX_TDDRC_ALPHA_UP_2 +165 0x1000 //RX_TDDRC_ALPHA_UP_3 +166 0x1000 //RX_TDDRC_ALPHA_UP_4 +184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +190 0x7000 //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +269 0x0000 //RX_TDDRC_THRD_0 +270 0x0000 //RX_TDDRC_THRD_1 +271 0x1800 //RX_TDDRC_THRD_2 +272 0x1800 //RX_TDDRC_THRD_3 +273 0x3000 //RX_TDDRC_SLANT_0 +274 0x6E00 //RX_TDDRC_SLANT_1 +275 0x1000 //RX_TDDRC_ALPHA_UP_0 +276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x199A //RX_TDDRC_HMNC_GAIN +279 0x0001 //RX_TDDRC_SMT_FLAG +280 0x0CCD //RX_TDDRC_SMT_W +281 0x01E0 //RX_TDDRC_DRC_GAIN +195 0x0030 //RX_FDEQ_SUBNUM +196 0x4848 //RX_FDEQ_GAIN_0 +197 0x4848 //RX_FDEQ_GAIN_1 +198 0x4844 //RX_FDEQ_GAIN_2 +199 0x4B4D //RX_FDEQ_GAIN_3 +200 0x4E50 //RX_FDEQ_GAIN_4 +201 0x5254 //RX_FDEQ_GAIN_5 +202 0x5658 //RX_FDEQ_GAIN_6 +203 0x5C60 //RX_FDEQ_GAIN_7 +204 0x6468 //RX_FDEQ_GAIN_8 +205 0x6C70 //RX_FDEQ_GAIN_9 +206 0x7474 //RX_FDEQ_GAIN_10 +207 0x7474 //RX_FDEQ_GAIN_11 +208 0x7474 //RX_FDEQ_GAIN_12 +209 0x7474 //RX_FDEQ_GAIN_13 +210 0x7474 //RX_FDEQ_GAIN_14 +211 0x7474 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0202 //RX_FDEQ_BIN_0 +221 0x0203 //RX_FDEQ_BIN_1 +222 0x0402 //RX_FDEQ_BIN_2 +223 0x0304 //RX_FDEQ_BIN_3 +224 0x0405 //RX_FDEQ_BIN_4 +225 0x0506 //RX_FDEQ_BIN_5 +226 0x0708 //RX_FDEQ_BIN_6 +227 0x090A //RX_FDEQ_BIN_7 +228 0x0B0C //RX_FDEQ_BIN_8 +229 0x0D0E //RX_FDEQ_BIN_9 +230 0x1214 //RX_FDEQ_BIN_10 +231 0x1E1E //RX_FDEQ_BIN_11 +232 0x1E1E //RX_FDEQ_BIN_12 +233 0x1E1E //RX_FDEQ_BIN_13 +234 0x1E1E //RX_FDEQ_BIN_14 +235 0x202C //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x4000 //RX_FDEQ_RESRV_0 +245 0x0320 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0030 //RX_FDDRC_BAND_MARGIN_1 +248 0x0050 //RX_FDDRC_BAND_MARGIN_2 +249 0x0080 //RX_FDDRC_BAND_MARGIN_3 +250 0x0007 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x5000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x6400 //RX_FDDRC_THRD_3_2 +258 0x6400 //RX_FDDRC_THRD_3_3 +259 0x2000 //RX_FDDRC_SLANT_0_0 +260 0x2000 //RX_FDDRC_SLANT_0_1 +261 0x2000 //RX_FDDRC_SLANT_0_2 +262 0x2000 //RX_FDDRC_SLANT_0_3 +263 0x5333 //RX_FDDRC_SLANT_1_0 +264 0x5333 //RX_FDDRC_SLANT_1_1 +265 0x5333 //RX_FDDRC_SLANT_1_2 +266 0x5333 //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +286 0x0100 //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 +#VOL 6 +163 0x1000 //RX_TDDRC_ALPHA_UP_1 +164 0x1000 //RX_TDDRC_ALPHA_UP_2 +165 0x1000 //RX_TDDRC_ALPHA_UP_3 +166 0x1000 //RX_TDDRC_ALPHA_UP_4 +184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +190 0x7000 //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +269 0x0000 //RX_TDDRC_THRD_0 +270 0x0000 //RX_TDDRC_THRD_1 +271 0x1800 //RX_TDDRC_THRD_2 +272 0x1800 //RX_TDDRC_THRD_3 +273 0x3000 //RX_TDDRC_SLANT_0 +274 0x6E00 //RX_TDDRC_SLANT_1 +275 0x1000 //RX_TDDRC_ALPHA_UP_0 +276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x199A //RX_TDDRC_HMNC_GAIN +279 0x0001 //RX_TDDRC_SMT_FLAG +280 0x0CCD //RX_TDDRC_SMT_W +281 0x01E0 //RX_TDDRC_DRC_GAIN +195 0x0030 //RX_FDEQ_SUBNUM +196 0x4848 //RX_FDEQ_GAIN_0 +197 0x4848 //RX_FDEQ_GAIN_1 +198 0x4844 //RX_FDEQ_GAIN_2 +199 0x4B4D //RX_FDEQ_GAIN_3 +200 0x4E50 //RX_FDEQ_GAIN_4 +201 0x5254 //RX_FDEQ_GAIN_5 +202 0x5658 //RX_FDEQ_GAIN_6 +203 0x5C60 //RX_FDEQ_GAIN_7 +204 0x6468 //RX_FDEQ_GAIN_8 +205 0x6C70 //RX_FDEQ_GAIN_9 +206 0x7474 //RX_FDEQ_GAIN_10 +207 0x7474 //RX_FDEQ_GAIN_11 +208 0x7474 //RX_FDEQ_GAIN_12 +209 0x7474 //RX_FDEQ_GAIN_13 +210 0x7474 //RX_FDEQ_GAIN_14 +211 0x7474 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0202 //RX_FDEQ_BIN_0 +221 0x0203 //RX_FDEQ_BIN_1 +222 0x0402 //RX_FDEQ_BIN_2 +223 0x0304 //RX_FDEQ_BIN_3 +224 0x0405 //RX_FDEQ_BIN_4 +225 0x0506 //RX_FDEQ_BIN_5 +226 0x0708 //RX_FDEQ_BIN_6 +227 0x090A //RX_FDEQ_BIN_7 +228 0x0B0C //RX_FDEQ_BIN_8 +229 0x0D0E //RX_FDEQ_BIN_9 +230 0x1214 //RX_FDEQ_BIN_10 +231 0x1E1E //RX_FDEQ_BIN_11 +232 0x1E1E //RX_FDEQ_BIN_12 +233 0x1E1E //RX_FDEQ_BIN_13 +234 0x1E1E //RX_FDEQ_BIN_14 +235 0x202C //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x4000 //RX_FDEQ_RESRV_0 +245 0x0320 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0030 //RX_FDDRC_BAND_MARGIN_1 +248 0x0050 //RX_FDDRC_BAND_MARGIN_2 +249 0x0080 //RX_FDDRC_BAND_MARGIN_3 +250 0x0007 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x5000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x6400 //RX_FDDRC_THRD_3_2 +258 0x6400 //RX_FDDRC_THRD_3_3 +259 0x2000 //RX_FDDRC_SLANT_0_0 +260 0x2000 //RX_FDDRC_SLANT_0_1 +261 0x2000 //RX_FDDRC_SLANT_0_2 +262 0x2000 //RX_FDDRC_SLANT_0_3 +263 0x5333 //RX_FDDRC_SLANT_1_0 +264 0x5333 //RX_FDDRC_SLANT_1_1 +265 0x5333 //RX_FDDRC_SLANT_1_2 +266 0x5333 //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +286 0x0100 //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 + +#CASE_NAME HANDSET-HANDSET-CUSTOM1-SWB +#PARAM_MODE Simple +#PARAM_TYPE TX+2RX +#TOTAL_CUSTOM_STEP 7+7 +#TX +0 0x0000 //TX_OPERATION_MODE_0 +1 0x0000 //TX_OPERATION_MODE_1 +2 0x0076 //TX_PATCH_REG +3 0x6F76 //TX_SENDFUNC_MODE_0 +4 0x0001 //TX_SENDFUNC_MODE_1 +5 0x0002 //TX_NUM_MIC +6 0x0003 //TX_SAMPLINGFREQ_SIG +7 0x0003 //TX_SAMPLINGFREQ_PROC +8 0x000A //TX_FRAME_SZ_SIG +9 0x000A //TX_FRAME_SZ +10 0x0000 //TX_DELAY_OPT +11 0x0028 //TX_MAX_TAIL_LENGTH +12 0x0001 //TX_NUM_LOUTCHN +13 0x0001 //TX_MAXNUM_AECREF +14 0x0000 //TX_DBG_FUNC_REG +15 0x0000 //TX_DBG_FUNC_REG1 +16 0x0000 //TX_SYS_RESRV_0 +17 0x0000 //TX_SYS_RESRV_1 +18 0x0000 //TX_SYS_RESRV_2 +19 0x0000 //TX_SYS_RESRV_3 +20 0x0000 //TX_DIST2REF0 +21 0x00A3 //TX_DIST2REF1 +22 0x0000 //TX_DIST2REF_02 +23 0x0000 //TX_DIST2REF_03 +24 0x0000 //TX_DIST2REF_04 +25 0x0000 //TX_DIST2REF_05 +26 0x0000 //TX_MMIC +27 0x1000 //TX_PGA_0 +28 0x1000 //TX_PGA_1 +29 0x1000 //TX_PGA_2 +30 0x0000 //TX_PGA_3 +31 0x0000 //TX_PGA_4 +32 0x0000 //TX_PGA_5 +33 0x0000 //TX_MIC_PAIRS +34 0x0000 //TX_MIC_PAIRS_HS +35 0x0002 //TX_MICS_FOR_BF +36 0x0000 //TX_MIC_PAIRS_FORL1 +37 0x0002 //TX_MICS_OF_PAIR0 +38 0x0002 //TX_MICS_OF_PAIR1 +39 0x0002 //TX_MICS_OF_PAIR2 +40 0x0002 //TX_MICS_OF_PAIR3 +41 0x0000 //TX_MIC_DATA_SRC0 +42 0x0002 //TX_MIC_DATA_SRC1 +43 0x0001 //TX_MIC_DATA_SRC2 +44 0x0000 //TX_MIC_DATA_SRC3 +45 0x0000 //TX_MIC_PAIR_CH_04 +46 0x0000 //TX_MIC_PAIR_CH_05 +47 0x0000 //TX_MIC_PAIR_CH_10 +48 0x0000 //TX_MIC_PAIR_CH_11 +49 0x0000 //TX_MIC_PAIR_CH_12 +50 0x0000 //TX_MIC_PAIR_CH_13 +51 0x0000 //TX_MIC_PAIR_CH_14 +52 0x05DC //TX_HD_BIN_MASK +53 0x0010 //TX_HD_SUBAND_MASK +54 0x19A1 //TX_HD_FRAME_AVG_MASK +55 0x0320 //TX_HD_MIN_FRQ +56 0x1000 //TX_HD_ALPHA_PSD +57 0x1100 //TX_T_PHPR1 +58 0x0000 //TX_T_PHPR2 +59 0x0000 //TX_T_PTPR +60 0x0000 //TX_T_PNPR +61 0x0000 //TX_T_PAPR1 +62 0xEE6C //TX_T_PSDVAT +63 0x0800 //TX_CNT +64 0x4000 //TX_ANTI_HOWL_GAIN +65 0x0001 //TX_MICFORBFMARK_0 +66 0x0001 //TX_MICFORBFMARK_1 +67 0x0001 //TX_MICFORBFMARK_2 +68 0x0001 //TX_MICFORBFMARK_3 +69 0x0001 //TX_MICFORBFMARK_4 +70 0x0001 //TX_MICFORBFMARK_5 +71 0x0000 //TX_DIST2REF_10 +72 0x3A66 //TX_DIST2REF_11 +73 0x0000 //TX_DIST2REF2 +74 0x0000 //TX_DIST2REF_13 +75 0x0000 //TX_DIST2REF_14 +76 0x0000 //TX_DIST2REF_15 +77 0x0000 //TX_DIST2REF_20 +78 0x0000 //TX_DIST2REF_21 +79 0x0000 //TX_DIST2REF_22 +80 0x0000 //TX_DIST2REF_23 +81 0x0000 //TX_DIST2REF_24 +82 0x0000 //TX_DIST2REF_25 +83 0x0000 //TX_DIST2REF_30 +84 0x0000 //TX_DIST2REF_31 +85 0x0000 //TX_DIST2REF_32 +86 0x0000 //TX_DIST2REF_33 +87 0x0000 //TX_DIST2REF_34 +88 0x0000 //TX_DIST2REF_35 +89 0x0000 //TX_MIC_LOC_00 +90 0x0000 //TX_MIC_LOC_01 +91 0x0000 //TX_MIC_LOC_02 +92 0x0000 //TX_MIC_LOC_03 +93 0x0000 //TX_MIC_LOC_04 +94 0x0000 //TX_MIC_LOC_05 +95 0x0000 //TX_MIC_LOC_10 +96 0x0000 //TX_MIC_LOC_11 +97 0x0000 //TX_MIC_LOC_12 +98 0x0000 //TX_MIC_LOC_13 +99 0x0000 //TX_MIC_LOC_14 +100 0x0000 //TX_MIC_LOC_15 +101 0x0000 //TX_MIC_LOC_20 +102 0x0000 //TX_MIC_LOC_21 +103 0x0000 //TX_MIC_LOC_22 +104 0x0000 //TX_MIC_LOC_23 +105 0x0000 //TX_MIC_LOC_24 +106 0x0000 //TX_MIC_LOC_25 +107 0x0200 //TX_MIC_REFBLK_VOLUME +108 0x0AAC //TX_MIC_BLOCK_VOLUME +109 0x0000 //TX_INVERSE_MASK +110 0x0000 //TX_ADCS_MASK +111 0x04D0 //TX_ADCS_GAIN +112 0x4000 //TX_NFC_GAINFAC +113 0x0000 //TX_MAINMIC_BLKFACTOR +114 0x0000 //TX_REFMIC_BLKFACTOR +115 0x0000 //TX_BLMIC_BLKFACTOR +116 0x0000 //TX_BRMIC_BLKFACTOR +117 0x0031 //TX_MICBLK_START_BIN +118 0x0060 //TX_MICBLK_END_BIN +119 0x0015 //TX_MICBLK_FE_HOLD +120 0xFFF2 //TX_MICBLK_MR_EXP_TH +121 0xFFF2 //TX_MICBLK_LR_EXP_TH +122 0x0000 //TX_FENE_HOLD +123 0x4000 //TX_FE_ENER_TH_MTS +124 0x0004 //TX_FE_ENER_TH_EXP +125 0x6000 //TX_C_POST_FLT_MIC_MAINBLK +126 0x6000 //TX_C_POST_FLT_MIC_REFBLK +127 0x0010 //TX_MIC_BLOCK_N +128 0x7E56 //TX_A_HP +129 0x4000 //TX_B_PE +130 0x1800 //TX_THR_PITCH_DET_0 +131 0x1000 //TX_THR_PITCH_DET_1 +132 0x0800 //TX_THR_PITCH_DET_2 +133 0x0008 //TX_PITCH_BFR_LEN +134 0x0003 //TX_SBD_PITCH_DET +135 0x0050 //TX_TD_AEC_L +136 0x4000 //TX_MU0_UNP_TD_AEC +137 0x1000 //TX_MU0_PTD_TD_AEC +138 0x0000 //TX_PP_RESRV_0 +139 0x2A94 //TX_PP_RESRV_1 +140 0x55F0 //TX_PP_RESRV_2 +141 0x0000 //TX_PP_RESRV_3 +142 0x0000 //TX_PP_RESRV_4 +143 0x0000 //TX_PP_RESRV_5 +144 0x0000 //TX_PP_RESRV_6 +145 0x0000 //TX_PP_RESRV_7 +146 0x0028 //TX_TAIL_LENGTH +147 0x0080 //TX_AEC_REF_GAIN_0 +148 0x0800 //TX_AEC_REF_GAIN_1 +149 0x0800 //TX_AEC_REF_GAIN_2 +150 0x7900 //TX_EAD_THR +151 0x2000 //TX_THR_RE_EST +152 0x0400 //TX_MIN_EQ_RE_EST_0 +153 0x0400 //TX_MIN_EQ_RE_EST_1 +154 0x0800 //TX_MIN_EQ_RE_EST_2 +155 0x0800 //TX_MIN_EQ_RE_EST_3 +156 0x1000 //TX_MIN_EQ_RE_EST_4 +157 0x1000 //TX_MIN_EQ_RE_EST_5 +158 0x1000 //TX_MIN_EQ_RE_EST_6 +159 0x1000 //TX_MIN_EQ_RE_EST_7 +160 0x1000 //TX_MIN_EQ_RE_EST_8 +161 0x1000 //TX_MIN_EQ_RE_EST_9 +162 0x1000 //TX_MIN_EQ_RE_EST_10 +163 0x1000 //TX_MIN_EQ_RE_EST_11 +164 0x1000 //TX_MIN_EQ_RE_EST_12 +165 0x3000 //TX_LAMBDA_RE_EST +166 0x1000 //TX_LAMBDA_CB_NLE +167 0x1800 //TX_C_POST_FLT +168 0x4000 //TX_GAIN_NP +169 0x003C //TX_SE_HOLD_N +170 0x0046 //TX_DT_HOLD_N +171 0x03E8 //TX_DT2_HOLD_N +172 0x6666 //TX_AEC_RESRV_0 +173 0x0000 //TX_AEC_RESRV_1 +174 0x0014 //TX_AEC_RESRV_2 +175 0x0000 //TX_MIC_DELAY_LENGTH +176 0x0000 //TX_REF_DELAY_LENGTH +177 0x0000 //TX_ADD_LINEIN_GAINL +178 0x0000 //TX_ADD_LINEIN_GAINH +179 0x0000 //TX_MIN_EQ_RE_EST_14 +180 0x0000 //TX_DTD_THR1_8 +181 0x7FFF //TX_DTD_THR2_8 +182 0x0000 //TX_DTD_MIC_BLK2 +183 0x0008 //TX_FRQ_LIN_LEN +184 0x7FFF //TX_FRQ_AEC_LEN_RHO +185 0x6000 //TX_MU0_UNP_FRQ_AEC +186 0x4000 //TX_MU0_PTD_FRQ_AEC +187 0x000A //TX_MINENOISETH +188 0x0800 //TX_MU0_RE_EST +189 0x0001 //TX_AEC_NUM_CH +190 0x0000 //TX_BIGECHOATTENUATION_MAX +191 0x2000 //TX_A_POST_FLT_MICBLK +192 0x0000 //TX_BLKENERTH +193 0x0000 //TX_BLKENERHIGHTH +194 0x0000 //TX_NORMENERTH +195 0x0000 //TX_NORMENERHIGHTH +196 0x0000 //TX_NORMENERHIGHTHL +197 0x7000 //TX_DTD_THR1_0 +198 0x7000 //TX_DTD_THR1_1 +199 0x7000 //TX_DTD_THR1_2 +200 0x7F00 //TX_DTD_THR1_3 +201 0x7F00 //TX_DTD_THR1_4 +202 0x7F00 //TX_DTD_THR1_5 +203 0x7F00 //TX_DTD_THR1_6 +204 0x2000 //TX_DTD_THR2_0 +205 0x2000 //TX_DTD_THR2_1 +206 0x2000 //TX_DTD_THR2_2 +207 0x1000 //TX_DTD_THR2_3 +208 0x1000 //TX_DTD_THR2_4 +209 0x1000 //TX_DTD_THR2_5 +210 0x1000 //TX_DTD_THR2_6 +211 0x6000 //TX_DTD_THR3 +212 0x0177 //TX_SPK_CUT_K +213 0x1B58 //TX_DT_CUT_K +214 0x0100 //TX_DT_CUT_THR +215 0x04EB //TX_COMFORT_G +216 0x01F4 //TX_POWER_YOUT_TH +217 0x4000 //TX_FDPFGAINECHO +218 0x0000 //TX_DTD_HD_THR +219 0x0000 //TX_SPK_CUT_K_S +220 0x0000 //TX_DTD_MIC_BLK +221 0x0400 //TX_ADPT_STRICT_L +222 0x0200 //TX_ADPT_STRICT_H +223 0x0C00 //TX_RATIO_DT_L_TH_LOW +224 0x2000 //TX_RATIO_DT_H_TH_LOW +225 0x1800 //TX_RATIO_DT_L_TH_HIGH +226 0x3000 //TX_RATIO_DT_H_TH_HIGH +227 0x0A00 //TX_RATIO_DT_L0_TH +228 0x7000 //TX_B_POST_FILT_ECHO_L +229 0x7FFF //TX_B_POST_FILT_ECHO_H +230 0x0200 //TX_MIN_G_CTRL_ECHO +231 0x7FFF //TX_B_LESSCUT_RTO_ECHO +232 0x0000 //TX_EPD_OFFSET_00 +233 0x0000 //TX_EPD_OFFST_01 +234 0x1388 //TX_RATIO_DT_L0_TH_HIGH +235 0x3A98 //TX_RATIO_DT_H_TH_CUT +236 0x7FFF //TX_MIN_EQ_RE_EST_13 +237 0x0000 //TX_DTD_THR1_7 +238 0x0000 //TX_DTD_THR2_7 +239 0x0800 //TX_DT_RESRV_7 +240 0x0800 //TX_DT_RESRV_8 +241 0x0000 //TX_DT_RESRV_9 +242 0xF600 //TX_THR_SN_EST_0 +243 0xFA00 //TX_THR_SN_EST_1 +244 0xFA00 //TX_THR_SN_EST_2 +245 0xF800 //TX_THR_SN_EST_3 +246 0xF800 //TX_THR_SN_EST_4 +247 0xF800 //TX_THR_SN_EST_5 +248 0xF800 //TX_THR_SN_EST_6 +249 0xF700 //TX_THR_SN_EST_7 +250 0x0000 //TX_DELTA_THR_SN_EST_0 +251 0x0200 //TX_DELTA_THR_SN_EST_1 +252 0x0200 //TX_DELTA_THR_SN_EST_2 +253 0x0200 //TX_DELTA_THR_SN_EST_3 +254 0x0100 //TX_DELTA_THR_SN_EST_4 +255 0x0200 //TX_DELTA_THR_SN_EST_5 +256 0x0100 //TX_DELTA_THR_SN_EST_6 +257 0x0200 //TX_DELTA_THR_SN_EST_7 +258 0x4000 //TX_LAMBDA_NN_EST_0 +259 0x4000 //TX_LAMBDA_NN_EST_1 +260 0x4000 //TX_LAMBDA_NN_EST_2 +261 0x4000 //TX_LAMBDA_NN_EST_3 +262 0x4000 //TX_LAMBDA_NN_EST_4 +263 0x4000 //TX_LAMBDA_NN_EST_5 +264 0x4000 //TX_LAMBDA_NN_EST_6 +265 0x4000 //TX_LAMBDA_NN_EST_7 +266 0x0400 //TX_N_SN_EST +267 0x001E //TX_INBEAM_T +268 0x0041 //TX_INBEAMHOLDT +269 0x2000 //TX_G_STRICT +270 0x2000 //TX_EQ_THR_BF +271 0x799A //TX_LAMBDA_EQ_BF +272 0x1000 //TX_NE_RTO_TH +273 0x1000 //TX_NE_RTO_TH_L +274 0x1000 //TX_MAINREFRTOH_TH_H +275 0x0600 //TX_MAINREFRTOH_TH_L +276 0x2000 //TX_MAINREFRTO_TH_H +277 0x1400 //TX_MAINREFRTO_TH_L +278 0x0000 //TX_MAINREFRTO_TH_EQ +279 0x1000 //TX_B_POST_FLT_0 +280 0x1000 //TX_B_POST_FLT_1 +281 0x0014 //TX_NS_LVL_CTRL_0 +282 0x002C //TX_NS_LVL_CTRL_1 +283 0x0016 //TX_NS_LVL_CTRL_2 +284 0x0018 //TX_NS_LVL_CTRL_3 +285 0x0016 //TX_NS_LVL_CTRL_4 +286 0x0012 //TX_NS_LVL_CTRL_5 +287 0x0016 //TX_NS_LVL_CTRL_6 +288 0x0017 //TX_NS_LVL_CTRL_7 +289 0x000E //TX_MIN_GAIN_S_0 +290 0x000D //TX_MIN_GAIN_S_1 +291 0x0012 //TX_MIN_GAIN_S_2 +292 0x0010 //TX_MIN_GAIN_S_3 +293 0x0012 //TX_MIN_GAIN_S_4 +294 0x0012 //TX_MIN_GAIN_S_5 +295 0x0012 //TX_MIN_GAIN_S_6 +296 0x0012 //TX_MIN_GAIN_S_7 +297 0x6000 //TX_NMOS_SUP +298 0x0000 //TX_NS_MAX_PRI_SNR_TH +299 0x0000 //TX_NMOS_SUP_MENSA +300 0x7FFF //TX_SNRI_SUP_0 +301 0x6000 //TX_SNRI_SUP_1 +302 0x6000 //TX_SNRI_SUP_2 +303 0x6000 //TX_SNRI_SUP_3 +304 0x6000 //TX_SNRI_SUP_4 +305 0x6000 //TX_SNRI_SUP_5 +306 0x6000 //TX_SNRI_SUP_6 +307 0x6000 //TX_SNRI_SUP_7 +308 0x6000 //TX_THR_LFNS +309 0x0017 //TX_G_LFNS +310 0x09C4 //TX_GAIN0_NTH +311 0x000A //TX_MUSIC_MORENS +312 0x7FFF //TX_A_POST_FILT_0 +313 0x2000 //TX_A_POST_FILT_1 +314 0x4000 //TX_A_POST_FILT_S_0 +315 0x4000 //TX_A_POST_FILT_S_1 +316 0x4000 //TX_A_POST_FILT_S_2 +317 0x4000 //TX_A_POST_FILT_S_3 +318 0x4000 //TX_A_POST_FILT_S_4 +319 0x4000 //TX_A_POST_FILT_S_5 +320 0x5000 //TX_A_POST_FILT_S_6 +321 0x7000 //TX_A_POST_FILT_S_7 +322 0x1000 //TX_B_POST_FILT_0 +323 0x1000 //TX_B_POST_FILT_1 +324 0x2000 //TX_B_POST_FILT_2 +325 0x2000 //TX_B_POST_FILT_3 +326 0x2000 //TX_B_POST_FILT_4 +327 0x1000 //TX_B_POST_FILT_5 +328 0x3000 //TX_B_POST_FILT_6 +329 0x3000 //TX_B_POST_FILT_7 +330 0x1000 //TX_B_LESSCUT_RTO_S_0 +331 0x1000 //TX_B_LESSCUT_RTO_S_1 +332 0x1000 //TX_B_LESSCUT_RTO_S_2 +333 0x1000 //TX_B_LESSCUT_RTO_S_3 +334 0x1000 //TX_B_LESSCUT_RTO_S_4 +335 0x1000 //TX_B_LESSCUT_RTO_S_5 +336 0x1000 //TX_B_LESSCUT_RTO_S_6 +337 0x1000 //TX_B_LESSCUT_RTO_S_7 +338 0x7E14 //TX_LAMBDA_PFILT +339 0x7C29 //TX_LAMBDA_PFILT_S_0 +340 0x7C29 //TX_LAMBDA_PFILT_S_1 +341 0x7C29 //TX_LAMBDA_PFILT_S_2 +342 0x7C29 //TX_LAMBDA_PFILT_S_3 +343 0x7C29 //TX_LAMBDA_PFILT_S_4 +344 0x7C29 //TX_LAMBDA_PFILT_S_5 +345 0x7C29 //TX_LAMBDA_PFILT_S_6 +346 0x7C29 //TX_LAMBDA_PFILT_S_7 +347 0x07D0 //TX_K_PEPPER +348 0x0800 //TX_A_PEPPER +349 0x1D4C //TX_K_PEPPER_HF +350 0x0400 //TX_A_PEPPER_HF +351 0x0001 //TX_HMNC_BST_FLG +352 0x4000 //TX_HMNC_BST_THR +353 0x0800 //TX_DT_BINVAD_TH_0 +354 0x0800 //TX_DT_BINVAD_TH_1 +355 0x0800 //TX_DT_BINVAD_TH_2 +356 0x0800 //TX_DT_BINVAD_TH_3 +357 0x0000 //TX_DT_BINVAD_ENDF +358 0x1000 //TX_C_POST_FLT_DT +359 0x7FFF //TX_NS_B_POST_FLT_LESSCUT +360 0x0100 //TX_DT_BOOST +361 0x0000 //TX_BF_SGRAD_FLG +362 0x0005 //TX_BF_DVG_TH +363 0x001E //TX_SN_C_F +364 0x0000 //TX_K_APT +365 0x0001 //TX_NOISEDET +366 0x0190 //TX_NDETCT +367 0x000A //TX_NOISE_TH_0 +368 0x7FFF //TX_NOISE_TH_0_2 +369 0x7FFF //TX_NOISE_TH_0_3 +370 0x00C6 //TX_NOISE_TH_1 +371 0x0DAC //TX_NOISE_TH_2 +372 0x2260 //TX_NOISE_TH_3 +373 0x7080 //TX_NOISE_TH_4 +374 0x57E4 //TX_NOISE_TH_5 +375 0x4BD6 //TX_NOISE_TH_5_2 +376 0x0001 //TX_NOISE_TH_5_3 +377 0x4E20 //TX_NOISE_TH_5_4 +378 0x1194 //TX_NOISE_TH_6 +379 0x0014 //TX_MINENOISE_TH +380 0xD508 //TX_MORENS_TFMASK_TH +381 0x0001 //TX_DRC_QUIET_FLOOR +382 0x6D60 //TX_RATIODTL_CUT_TH +383 0x0DAC //TX_DT_CUT_K1 +384 0x00A5 //TX_OUT_ENER_S_TH_CLEAN +385 0x00A5 //TX_OUT_ENER_S_TH_LESSCLEAN +386 0x00A5 //TX_OUT_ENER_S_TH_NOISY +387 0x0029 //TX_OUT_ENER_TH_NOISE +388 0x0200 //TX_OUT_ENER_TH_SPEECH +389 0x2000 //TX_SN_NPB_GAIN +390 0x0000 //TX_NN_NPB_GAIN +391 0x3000 //TX_POST_MASK_SUP_HSNE +392 0x07D0 //TX_TAIL_DET_TH +393 0x4000 //TX_B_LESSCUT_RTO_WTA +394 0x0000 //TX_MEL_G_R +395 0x0080 //TX_SUPHIGH_TH +396 0x0000 //TX_MASK_G_R +397 0x0002 //TX_EXTRA_NS_L +398 0x1800 //TX_C_POST_FLT_MASK +399 0x7FFF //TX_A_POST_FLT_WNS +400 0x0148 //TX_MIN_G_LOW300HZ +401 0x0004 //TX_MAXLEVEL_CNG +402 0x00B4 //TX_STN_NOISE_TH +403 0x4000 //TX_POST_MASK_SUP +404 0x7FFF //TX_POST_MASK_ADJUST +405 0x00C8 //TX_NS_ENOISE_MIC0_TH +406 0x0014 //TX_MINENOISE_MIC0_TH +407 0x012C //TX_MINENOISE_MIC0_S_TH +408 0x2900 //TX_MIN_G_CTRL_SSNS +409 0x0800 //TX_METAL_RTO_THR +410 0x0FA0 //TX_NS_FP_K_METAL +411 0x3A98 //TX_NOISEDET_BOOST_TH +412 0x0FA0 //TX_NSMOOTH_TH +413 0x0000 //TX_NS_RESRV_8 +414 0x1800 //TX_RHO_UPB +415 0x2328 //TX_N_HOLD_HS +416 0x006E //TX_N_RHO_BFR0 +417 0x7FFF //TX_LAMBDA_ARSP_EST +418 0x0100 //TX_EXTRA_GAIN_MICBLOCK +419 0x0333 //TX_THR_STD_NSR +420 0x019A //TX_THR_STD_PLH +421 0x03E8 //TX_N_HOLD_STD +422 0x0066 //TX_THR_STD_RHO +423 0x2800 //TX_BF_RESET_THR_HS +424 0x0CCD //TX_SB_RTO_MEAN_TH +425 0x0300 //TX_SB_RHO_MEAN_TH_NTALK +426 0x2000 //TX_SB_RTO_MEAN_TH_ABN +427 0x2EE0 //TX_SB_RTO_MEAN_TH_RUB +428 0x0990 //TX_WTA_EN_RTO_TH +429 0x1400 //TX_TOP_ENER_TH_F +430 0x0100 //TX_DESIRED_TALK_HOLDT +431 0x0800 //TX_MIC_BLOCK_FACTOR +432 0x0000 //TX_NSEST_BFRLRNRDC +433 0x0000 //TX_THR_POST_FLT_HS +434 0x0010 //TX_HS_VAD_BIN +435 0x2666 //TX_THR_VAD_HS +436 0x2CCD //TX_MEAN_RTO_MIN_TH2 +437 0x0032 //TX_SILENCE_T +438 0x0000 //TX_A_POST_FLT_WTA +439 0x799A //TX_LAMBDA_PFLT_WTA +440 0x051E //TX_SB_RHO_MEAN2_TH +441 0x02F0 //TX_SB_RHO_MEAN3_TH +442 0x0000 //TX_HS_RESRV_4 +443 0x0000 //TX_HS_RESRV_5 +444 0x0001 //TX_DOA_VAD_THR_1 +445 0x003C //TX_DOA_VAD_THR_2 +446 0x0028 //TX_DOA_VAD_THR1_0 +447 0x0028 //TX_DOA_VAD_THR1_1 +448 0x0000 //TX_SRC_DOA_RNG_LOW_0A +449 0x001E //TX_SRC_DOA_RNG_HIGH_0A +450 0x005A //TX_DFLT_SRC_DOA_0A +451 0x0000 //TX_SRC_DOA_RNG_LOW_0B +452 0x0000 //TX_SRC_DOA_RNG_HIGH_0B +453 0x0000 //TX_DFLT_SRC_DOA_0B +454 0x0000 //TX_SRC_DOA_RNG_LOW_0C +455 0x0000 //TX_SRC_DOA_RNG_HIGH_0C +456 0x0000 //TX_DFLT_SRC_DOA_0C +457 0x0000 //TX_SRC_DOA_RNG_LOW_0D +458 0x0000 //TX_SRC_DOA_RNG_HIGH_0D +459 0x0000 //TX_DFLT_SRC_DOA_0D +460 0x0000 //TX_SRC_DOA_RNG_LOW_1A +461 0x00B4 //TX_SRC_DOA_RNG_HIGH_1A +462 0x005A //TX_DFLT_SRC_DOA_1A +463 0x0000 //TX_SRC_DOA_RNG_LOW_1B +464 0x00B4 //TX_SRC_DOA_RNG_HIGH_1B +465 0x005A //TX_DFLT_SRC_DOA_1B +466 0x0000 //TX_SRC_DOA_RNG_LOW_1C +467 0x00B4 //TX_SRC_DOA_RNG_HIGH_1C +468 0x005A //TX_DFLT_SRC_DOA_1C +469 0x0000 //TX_SRC_DOA_RNG_LOW_1D +470 0x00B4 //TX_SRC_DOA_RNG_HIGH_1D +471 0x005A //TX_DFLT_SRC_DOA_1D +472 0x0100 //TX_BF_HOLDOFF_T +473 0x7FFF //TX_DOA_COST_FACTOR +474 0x0D9A //TX_MAINTOREFR_TH0 +475 0x071C //TX_DOA_TRK_THR +476 0x012C //TX_DOA_TRACK_HT +477 0x0200 //TX_N1_HOLD_HF +478 0x0100 //TX_N2_HOLD_HF +479 0x2A3D //TX_BF_RESET_THR_HF +480 0x7333 //TX_DOA_SMOOTH +481 0x0800 //TX_MU_BF +482 0x0800 //TX_BF_MU_LF_B2 +483 0x0040 //TX_BF_FC_END_BIN_B2 +484 0x0020 //TX_BF_FC_END_BIN +485 0x0000 //TX_HF_RESRV_25 +486 0x0000 //TX_HF_RESRV_26 +487 0x0007 //TX_N_DOA_SEED +488 0x0001 //TX_FINE_DOA_SEARCH_FLG +489 0x0000 //TX_HF_RESRV_27 +490 0x038E //TX_DLT_SRC_DOA_RNG +491 0x0200 //TX_BF_MU_LF +492 0x0000 //TX_DFLT_SRC_LOC_0 +493 0x7FFF //TX_DFLT_SRC_LOC_1 +494 0x0000 //TX_DFLT_SRC_LOC_2 +495 0x038E //TX_DOA_TRACK_VADTH +496 0x0000 //TX_DOA_TRACK_NEW +497 0x0300 //TX_NOR_OFF_THR +498 0x7C00 //TX_MORE_ON_700HZ_THR +499 0x2000 //TX_MU_BF_ADPT_NS +500 0x0000 //TX_ADAPT_LEN +501 0x6666 //TX_MORE_SNS +502 0x0000 //TX_NOR_OFF_TH1 +503 0x0000 //TX_WIDE_MASK_TH +504 0xD333 //TX_SUBSNRATIOHIGH4MEANBCK_THR +505 0x6000 //TX_C_POST_FLT_CUT +506 0x2000 //TX_RADIODTLV +507 0x0320 //TX_POWER_LINEIN_TH +508 0x0014 //TX_FE_VADCOUNT_TH_FC +509 0x0000 //TX_ECHO_SUPP_FC +510 0x0C80 //TX_ECHO_TH +511 0x6666 //TX_MIC_TO_BFGAIN +512 0x0000 //TX_MICTOBFGAIN0 +513 0x0000 //TX_FASTMUE_TH +514 0x2CCC //TX_DEREVERB_LF_MU +515 0x3200 //TX_DEREVERB_HF_MU +516 0x0007 //TX_DEREVERB_DELAY +517 0x0004 //TX_DEREVERB_COEF_LEN +518 0x0003 //TX_DEREVERB_DNR +519 0x0000 //TX_DEREVERB_ALPHA +520 0x0000 //TX_DEREVERB_BETA +521 0x3A98 //TX_GSC_RTOL_TH +522 0x3A98 //TX_GSC_RTOH_TH +523 0x7E2C //TX_WIDE2_MEANHTH +524 0x0000 //TX_DR_RESRV_5 +525 0x0000 //TX_DR_RESRV_6 +526 0x0000 //TX_DR_RESRV_7 +527 0x0000 //TX_DR_RESRV_8 +528 0x1333 //TX_WIND_MARK_TH +529 0x399A //TX_CORR_THR +530 0x0004 //TX_SNR_THR +531 0x0010 //TX_ENGY_THR +532 0x1770 //TX_CORR_HIGH_TH +533 0x6000 //TX_ENGY_THR_2 +534 0x3400 //TX_MEAN_RTO_THR +535 0x0028 //TX_WNS_ENOISE_MIC0_TH +536 0x3000 //TX_RATIOMICL_TH +537 0x7FFF //TX_CALIG_HS +538 0x0000 //TX_LVL_CTRL +539 0x0010 //TX_WIND_SUPRTO +540 0x0014 //TX_WNS_MIN_G +541 0x0600 //TX_WNS_B_POST_FLT +542 0x3000 //TX_RATIOMICH_TH +543 0xD120 //TX_WIND_INBEAM_L_TH +544 0x0FA0 //TX_WIND_INBEAM_H_TH +545 0x2000 //TX_WNS_RESRV_0 +546 0x59D8 //TX_WNS_RESRV_1 +547 0x0200 //TX_WNS_RESRV_2 +548 0x0000 //TX_WNS_RESRV_3 +549 0x0000 //TX_WNS_RESRV_4 +550 0x0000 //TX_WNS_RESRV_5 +551 0x0000 //TX_WNS_RESRV_6 +552 0x0000 //TX_PB_B_POST_FLT_LESSCUT +553 0x0070 //TX_BF_LESSCUT_BBIN +554 0x0070 //TX_BF_LESSCUT_EBIN +555 0x0010 //TX_POSTBFB0 +556 0x0070 //TX_POSTBFB +557 0x00B0 //TX_POSTBFE +558 0x0E66 //TX_SPEECH_SNR_TH +559 0x0050 //TX_PB_MAX_PRI_SNR_TH +560 0x770A //TX_MAX_PRI_SNR_TH_L +561 0x0000 //TX_PFGAIN +562 0x0000 //TX_MAINTOREFR_TH +563 0x0000 //TX_SAM_MARK +564 0x0000 //TX_PB_RESRV_0 +565 0x0000 //TX_PB_RESRV_1 +566 0x0030 //TX_FDEQ_SUBNUM +567 0x5C58 //TX_FDEQ_GAIN_0 +568 0x5048 //TX_FDEQ_GAIN_1 +569 0x4C4C //TX_FDEQ_GAIN_2 +570 0x494D //TX_FDEQ_GAIN_3 +571 0x4442 //TX_FDEQ_GAIN_4 +572 0x444C //TX_FDEQ_GAIN_5 +573 0x5053 //TX_FDEQ_GAIN_6 +574 0x6248 //TX_FDEQ_GAIN_7 +575 0x434A //TX_FDEQ_GAIN_8 +576 0x4B4D //TX_FDEQ_GAIN_9 +577 0x4C4B //TX_FDEQ_GAIN_10 +578 0x4E4A //TX_FDEQ_GAIN_11 +579 0x4842 //TX_FDEQ_GAIN_12 +580 0x4C44 //TX_FDEQ_GAIN_13 +581 0x3A4A //TX_FDEQ_GAIN_14 +582 0x6478 //TX_FDEQ_GAIN_15 +583 0x5848 //TX_FDEQ_GAIN_16 +584 0x4848 //TX_FDEQ_GAIN_17 +585 0x4848 //TX_FDEQ_GAIN_18 +586 0x4848 //TX_FDEQ_GAIN_19 +587 0x4848 //TX_FDEQ_GAIN_20 +588 0x4848 //TX_FDEQ_GAIN_21 +589 0x4848 //TX_FDEQ_GAIN_22 +590 0x4848 //TX_FDEQ_GAIN_23 +591 0x0202 //TX_FDEQ_BIN_0 +592 0x0104 //TX_FDEQ_BIN_1 +593 0x0502 //TX_FDEQ_BIN_2 +594 0x0202 //TX_FDEQ_BIN_3 +595 0x0504 //TX_FDEQ_BIN_4 +596 0x0708 //TX_FDEQ_BIN_5 +597 0x0808 //TX_FDEQ_BIN_6 +598 0x050E //TX_FDEQ_BIN_7 +599 0x0B0C //TX_FDEQ_BIN_8 +600 0x0F0F //TX_FDEQ_BIN_9 +601 0x0E0D //TX_FDEQ_BIN_10 +602 0x0F28 //TX_FDEQ_BIN_11 +603 0x110F //TX_FDEQ_BIN_12 +604 0x350F //TX_FDEQ_BIN_13 +605 0x1924 //TX_FDEQ_BIN_14 +606 0x1810 //TX_FDEQ_BIN_15 +607 0x1021 //TX_FDEQ_BIN_16 +608 0x1000 //TX_FDEQ_BIN_17 +609 0x0000 //TX_FDEQ_BIN_18 +610 0x0000 //TX_FDEQ_BIN_19 +611 0x0000 //TX_FDEQ_BIN_20 +612 0x0000 //TX_FDEQ_BIN_21 +613 0x0000 //TX_FDEQ_BIN_22 +614 0x0000 //TX_FDEQ_BIN_23 +615 0x0000 //TX_FDEQ_PADDING +616 0x0030 //TX_PREEQ_SUBNUM_MIC0 +617 0x4848 //TX_PREEQ_GAIN_MIC0_0 +618 0x4848 //TX_PREEQ_GAIN_MIC0_1 +619 0x4848 //TX_PREEQ_GAIN_MIC0_2 +620 0x4848 //TX_PREEQ_GAIN_MIC0_3 +621 0x4848 //TX_PREEQ_GAIN_MIC0_4 +622 0x4848 //TX_PREEQ_GAIN_MIC0_5 +623 0x4848 //TX_PREEQ_GAIN_MIC0_6 +624 0x4848 //TX_PREEQ_GAIN_MIC0_7 +625 0x4848 //TX_PREEQ_GAIN_MIC0_8 +626 0x4848 //TX_PREEQ_GAIN_MIC0_9 +627 0x4848 //TX_PREEQ_GAIN_MIC0_10 +628 0x4848 //TX_PREEQ_GAIN_MIC0_11 +629 0x4848 //TX_PREEQ_GAIN_MIC0_12 +630 0x4848 //TX_PREEQ_GAIN_MIC0_13 +631 0x4848 //TX_PREEQ_GAIN_MIC0_14 +632 0x4848 //TX_PREEQ_GAIN_MIC0_15 +633 0x4848 //TX_PREEQ_GAIN_MIC0_16 +634 0x4848 //TX_PREEQ_GAIN_MIC0_17 +635 0x4848 //TX_PREEQ_GAIN_MIC0_18 +636 0x4848 //TX_PREEQ_GAIN_MIC0_19 +637 0x4848 //TX_PREEQ_GAIN_MIC0_20 +638 0x4848 //TX_PREEQ_GAIN_MIC0_21 +639 0x4848 //TX_PREEQ_GAIN_MIC0_22 +640 0x4848 //TX_PREEQ_GAIN_MIC0_23 +641 0x251A //TX_PREEQ_BIN_MIC0_0 +642 0x0F0F //TX_PREEQ_BIN_MIC0_1 +643 0x0C0C //TX_PREEQ_BIN_MIC0_2 +644 0x0C0F //TX_PREEQ_BIN_MIC0_3 +645 0x0F0F //TX_PREEQ_BIN_MIC0_4 +646 0x0F09 //TX_PREEQ_BIN_MIC0_5 +647 0x0909 //TX_PREEQ_BIN_MIC0_6 +648 0x0908 //TX_PREEQ_BIN_MIC0_7 +649 0x070F //TX_PREEQ_BIN_MIC0_8 +650 0x1F08 //TX_PREEQ_BIN_MIC0_9 +651 0x0808 //TX_PREEQ_BIN_MIC0_10 +652 0x0920 //TX_PREEQ_BIN_MIC0_11 +653 0x2020 //TX_PREEQ_BIN_MIC0_12 +654 0x2021 //TX_PREEQ_BIN_MIC0_13 +655 0x0000 //TX_PREEQ_BIN_MIC0_14 +656 0x0000 //TX_PREEQ_BIN_MIC0_15 +657 0x0000 //TX_PREEQ_BIN_MIC0_16 +658 0x0000 //TX_PREEQ_BIN_MIC0_17 +659 0x0000 //TX_PREEQ_BIN_MIC0_18 +660 0x0000 //TX_PREEQ_BIN_MIC0_19 +661 0x0000 //TX_PREEQ_BIN_MIC0_20 +662 0x0000 //TX_PREEQ_BIN_MIC0_21 +663 0x0000 //TX_PREEQ_BIN_MIC0_22 +664 0x0000 //TX_PREEQ_BIN_MIC0_23 +665 0x0030 //TX_PREEQ_SUBNUM_MIC1 +666 0x4848 //TX_PREEQ_GAIN_MIC1_0 +667 0x4848 //TX_PREEQ_GAIN_MIC1_1 +668 0x4848 //TX_PREEQ_GAIN_MIC1_2 +669 0x4848 //TX_PREEQ_GAIN_MIC1_3 +670 0x4848 //TX_PREEQ_GAIN_MIC1_4 +671 0x4848 //TX_PREEQ_GAIN_MIC1_5 +672 0x494A //TX_PREEQ_GAIN_MIC1_6 +673 0x4B4C //TX_PREEQ_GAIN_MIC1_7 +674 0x4D4E //TX_PREEQ_GAIN_MIC1_8 +675 0x4F52 //TX_PREEQ_GAIN_MIC1_9 +676 0x5355 //TX_PREEQ_GAIN_MIC1_10 +677 0x585C //TX_PREEQ_GAIN_MIC1_11 +678 0x616A //TX_PREEQ_GAIN_MIC1_12 +679 0x726E //TX_PREEQ_GAIN_MIC1_13 +680 0x5C48 //TX_PREEQ_GAIN_MIC1_14 +681 0x3B38 //TX_PREEQ_GAIN_MIC1_15 +682 0x4848 //TX_PREEQ_GAIN_MIC1_16 +683 0x4848 //TX_PREEQ_GAIN_MIC1_17 +684 0x4848 //TX_PREEQ_GAIN_MIC1_18 +685 0x4848 //TX_PREEQ_GAIN_MIC1_19 +686 0x4848 //TX_PREEQ_GAIN_MIC1_20 +687 0x4848 //TX_PREEQ_GAIN_MIC1_21 +688 0x4848 //TX_PREEQ_GAIN_MIC1_22 +689 0x4848 //TX_PREEQ_GAIN_MIC1_23 +690 0x0202 //TX_PREEQ_BIN_MIC1_0 +691 0x0203 //TX_PREEQ_BIN_MIC1_1 +692 0x0303 //TX_PREEQ_BIN_MIC1_2 +693 0x0304 //TX_PREEQ_BIN_MIC1_3 +694 0x0405 //TX_PREEQ_BIN_MIC1_4 +695 0x0506 //TX_PREEQ_BIN_MIC1_5 +696 0x0708 //TX_PREEQ_BIN_MIC1_6 +697 0x090A //TX_PREEQ_BIN_MIC1_7 +698 0x0B0C //TX_PREEQ_BIN_MIC1_8 +699 0x0D0E //TX_PREEQ_BIN_MIC1_9 +700 0x1013 //TX_PREEQ_BIN_MIC1_10 +701 0x1719 //TX_PREEQ_BIN_MIC1_11 +702 0x1B1E //TX_PREEQ_BIN_MIC1_12 +703 0x1E1E //TX_PREEQ_BIN_MIC1_13 +704 0x1E28 //TX_PREEQ_BIN_MIC1_14 +705 0x3042 //TX_PREEQ_BIN_MIC1_15 +706 0x0000 //TX_PREEQ_BIN_MIC1_16 +707 0x0000 //TX_PREEQ_BIN_MIC1_17 +708 0x0000 //TX_PREEQ_BIN_MIC1_18 +709 0x0000 //TX_PREEQ_BIN_MIC1_19 +710 0x0000 //TX_PREEQ_BIN_MIC1_20 +711 0x0000 //TX_PREEQ_BIN_MIC1_21 +712 0x0000 //TX_PREEQ_BIN_MIC1_22 +713 0x0000 //TX_PREEQ_BIN_MIC1_23 +714 0x0030 //TX_PREEQ_SUBNUM_MIC2 +715 0x4848 //TX_PREEQ_GAIN_MIC2_0 +716 0x4848 //TX_PREEQ_GAIN_MIC2_1 +717 0x4848 //TX_PREEQ_GAIN_MIC2_2 +718 0x4848 //TX_PREEQ_GAIN_MIC2_3 +719 0x4848 //TX_PREEQ_GAIN_MIC2_4 +720 0x4848 //TX_PREEQ_GAIN_MIC2_5 +721 0x4848 //TX_PREEQ_GAIN_MIC2_6 +722 0x4848 //TX_PREEQ_GAIN_MIC2_7 +723 0x4848 //TX_PREEQ_GAIN_MIC2_8 +724 0x4848 //TX_PREEQ_GAIN_MIC2_9 +725 0x4848 //TX_PREEQ_GAIN_MIC2_10 +726 0x4848 //TX_PREEQ_GAIN_MIC2_11 +727 0x4848 //TX_PREEQ_GAIN_MIC2_12 +728 0x4848 //TX_PREEQ_GAIN_MIC2_13 +729 0x4848 //TX_PREEQ_GAIN_MIC2_14 +730 0x4848 //TX_PREEQ_GAIN_MIC2_15 +731 0x4848 //TX_PREEQ_GAIN_MIC2_16 +732 0x4848 //TX_PREEQ_GAIN_MIC2_17 +733 0x4848 //TX_PREEQ_GAIN_MIC2_18 +734 0x4848 //TX_PREEQ_GAIN_MIC2_19 +735 0x4848 //TX_PREEQ_GAIN_MIC2_20 +736 0x4848 //TX_PREEQ_GAIN_MIC2_21 +737 0x4848 //TX_PREEQ_GAIN_MIC2_22 +738 0x4848 //TX_PREEQ_GAIN_MIC2_23 +739 0x0608 //TX_PREEQ_BIN_MIC2_0 +740 0x0808 //TX_PREEQ_BIN_MIC2_1 +741 0x0808 //TX_PREEQ_BIN_MIC2_2 +742 0x0808 //TX_PREEQ_BIN_MIC2_3 +743 0x0808 //TX_PREEQ_BIN_MIC2_4 +744 0x0808 //TX_PREEQ_BIN_MIC2_5 +745 0x0808 //TX_PREEQ_BIN_MIC2_6 +746 0x0808 //TX_PREEQ_BIN_MIC2_7 +747 0x0808 //TX_PREEQ_BIN_MIC2_8 +748 0x0808 //TX_PREEQ_BIN_MIC2_9 +749 0x0808 //TX_PREEQ_BIN_MIC2_10 +750 0x0808 //TX_PREEQ_BIN_MIC2_11 +751 0x0808 //TX_PREEQ_BIN_MIC2_12 +752 0x0808 //TX_PREEQ_BIN_MIC2_13 +753 0x0808 //TX_PREEQ_BIN_MIC2_14 +754 0x0200 //TX_PREEQ_BIN_MIC2_15 +755 0x0000 //TX_PREEQ_BIN_MIC2_16 +756 0x0000 //TX_PREEQ_BIN_MIC2_17 +757 0x0000 //TX_PREEQ_BIN_MIC2_18 +758 0x0000 //TX_PREEQ_BIN_MIC2_19 +759 0x0000 //TX_PREEQ_BIN_MIC2_20 +760 0x0000 //TX_PREEQ_BIN_MIC2_21 +761 0x0000 //TX_PREEQ_BIN_MIC2_22 +762 0x0000 //TX_PREEQ_BIN_MIC2_23 +763 0x0006 //TX_MASKING_ABILITY +764 0x0800 //TX_NND_WEIGHT +765 0x0050 //TX_MIC_CALIBRATION_0 +766 0x0056 //TX_MIC_CALIBRATION_1 +767 0x0050 //TX_MIC_CALIBRATION_2 +768 0x0050 //TX_MIC_CALIBRATION_3 +769 0x0046 //TX_MIC_PWR_BIAS_0 +770 0x0042 //TX_MIC_PWR_BIAS_1 +771 0x0046 //TX_MIC_PWR_BIAS_2 +772 0x0046 //TX_MIC_PWR_BIAS_3 +773 0x0000 //TX_GAIN_LIMIT_0 +774 0x0006 //TX_GAIN_LIMIT_1 +775 0x0000 //TX_GAIN_LIMIT_2 +776 0x0000 //TX_GAIN_LIMIT_3 +777 0x7F5B //TX_BVE_NOVAD0_ALPHADOWN +778 0x7FDE //TX_BVE_VAD0_ALPHAUP +779 0x7F3A //TX_BVE_VAD0_ALPHADOWN +780 0x2000 //TX_BVE_GAINWEIGHT_NOFEVADLI +781 0x7F5B //TX_BVE_FEVADLI_ALPHA +782 0x7F19 //TX_BVE_NOVAD0_ALPHAUP +783 0x1000 //TX_TDDRC_ALPHA_UP_01 +784 0x1000 //TX_TDDRC_ALPHA_UP_02 +785 0x1000 //TX_TDDRC_ALPHA_UP_03 +786 0x1000 //TX_TDDRC_ALPHA_UP_04 +787 0x7EB8 //TX_TDDRC_ALPHA_DWN_01 +788 0x7EB8 //TX_TDDRC_ALPHA_DWN_02 +789 0x7EB8 //TX_TDDRC_ALPHA_DWN_03 +790 0x7EB8 //TX_TDDRC_ALPHA_DWN_04 +791 0x7FFF //TX_TDDRC_TD_DRC_LIMIT +792 0x0800 //TX_TDDRC_POST_LIMIT_GAIN +793 0x0000 //TX_TDDRC_RESRV_0 +794 0x0000 //TX_TDDRC_RESRV_1 +795 0x0018 //TX_FDDRC_BAND_MARGIN_0 +796 0x0030 //TX_FDDRC_BAND_MARGIN_1 +797 0x0050 //TX_FDDRC_BAND_MARGIN_2 +798 0x0080 //TX_FDDRC_BAND_MARGIN_3 +799 0x0007 //TX_FDDRC_BLOCK_EXP +800 0x5000 //TX_FDDRC_THRD_2_0 +801 0x5000 //TX_FDDRC_THRD_2_1 +802 0x5000 //TX_FDDRC_THRD_2_2 +803 0x5000 //TX_FDDRC_THRD_2_3 +804 0x6400 //TX_FDDRC_THRD_3_0 +805 0x6400 //TX_FDDRC_THRD_3_1 +806 0x6400 //TX_FDDRC_THRD_3_2 +807 0x6400 //TX_FDDRC_THRD_3_3 +808 0x2000 //TX_FDDRC_SLANT_0_0 +809 0x2000 //TX_FDDRC_SLANT_0_1 +810 0x2000 //TX_FDDRC_SLANT_0_2 +811 0x2000 //TX_FDDRC_SLANT_0_3 +812 0x5333 //TX_FDDRC_SLANT_1_0 +813 0x5333 //TX_FDDRC_SLANT_1_1 +814 0x5333 //TX_FDDRC_SLANT_1_2 +815 0x5333 //TX_FDDRC_SLANT_1_3 +816 0x0010 //TX_DEADMIC_SILENCE_TH +817 0x0600 //TX_MIC_DEGRADE_TH +818 0x0078 //TX_DEADMIC_CNT +819 0x0078 //TX_MIC_DEGRADE_CNT +820 0x0000 //TX_FDDRC_RESRV_4 +821 0x0000 //TX_FDDRC_RESRV_5 +822 0x0000 //TX_FDDRC_RESRV_6 +823 0x7FFF //TX_KS_NOISEPASTE_FACTOR +824 0x0001 //TX_KS_CONFIG +825 0x7FFF //TX_KS_GAIN_MIN +826 0x0000 //TX_KS_RESRV_0 +827 0x0000 //TX_KS_RESRV_1 +828 0x0000 //TX_KS_RESRV_2 +829 0x7C00 //TX_LAMBDA_PKA_FP +830 0x2000 //TX_TPKA_FP +831 0x0080 //TX_MIN_G_FP +832 0x2000 //TX_MAX_G_FP +833 0x0FA0 //TX_FFP_FP_K_METAL +834 0x4000 //TX_A_POST_FLT_FP +835 0x0F5C //TX_RTO_OUTBEAM_TH +836 0x4CCD //TX_TPKA_FP_THD +837 0x0000 //TX_MAX_G_FP_BLK +838 0x0000 //TX_FFP_FADEIN +839 0x0000 //TX_FFP_FADEOUT +840 0x0000 //TX_WHISPERCTH +841 0x0000 //TX_WHISPERHOLDT +842 0x0000 //TX_WHISP_ENTHH +843 0x0000 //TX_WHISP_ENTHL +844 0x0000 //TX_WHISP_RTOTH +845 0x0000 //TX_WHISP_RTOTH2 +846 0x0096 //TX_MUTE_PERIOD +847 0x0000 //TX_FADE_IN_PERIOD +848 0x0100 //TX_FFP_RESRV_2 +849 0x0020 //TX_FFP_RESRV_3 +850 0x0000 //TX_FFP_RESRV_4 +851 0x0000 //TX_FFP_RESRV_5 +852 0x0000 //TX_FFP_RESRV_6 +853 0x0002 //TX_FILTINDX +854 0x0002 //TX_TDDRC_THRD_0 +855 0x0003 //TX_TDDRC_THRD_1 +856 0x1500 //TX_TDDRC_THRD_2 +857 0x1500 //TX_TDDRC_THRD_3 +858 0x3000 //TX_TDDRC_SLANT_0 +859 0x6E00 //TX_TDDRC_SLANT_1 +860 0x1000 //TX_TDDRC_ALPHA_UP_00 +861 0x7EB8 //TX_TDDRC_ALPHA_DWN_00 +862 0x0000 //TX_TDDRC_HMNC_FLAG +863 0x199A //TX_TDDRC_HMNC_GAIN +864 0x0000 //TX_TDDRC_SMT_FLAG +865 0x0CCD //TX_TDDRC_SMT_W +866 0x06EC //TX_TDDRC_DRC_GAIN +867 0x7FFF //TX_TDDRC_LMT_THRD +868 0x0000 //TX_TDDRC_LMT_ALPHA +869 0x0000 //TX_TFMASKLTH +870 0x0000 //TX_TFMASKLTHL +871 0x0CCD //TX_TFMASKHTH +872 0xECCD //TX_TFMASKLTH_BINVAD +873 0xFCCD //TX_TFMASKLTH_NS_EST +874 0xF800 //TX_TFMASKLTH_DOA +875 0x0CCD //TX_TFMASKTH_BLESSCUT +876 0x1000 //TX_B_LESSCUT_RTO_MASK +877 0x2000 //TX_SB_RHO_MEAN_TH_ABN +878 0x2000 //TX_B_POST_FLT_MASK +879 0x0000 //TX_B_POST_FLT_MASK1 +880 0x6333 //TX_GAIN_WIND_MASK +881 0x0000 //TX_TFMASK_BFSTRICT_MUSIC +882 0x0000 //TX_TFMASK_BFSTRICT_NOMUSIC +883 0x7333 //TX_FASTNS_OUTIN_TH +884 0x0CCD //TX_FASTNS_TFMASK_TH +885 0x0CCD //TX_FASTNS_TFMASKBIN_TH1 +886 0x0CCD //TX_FASTNS_TFMASKBIN_TH2 +887 0x0CCD //TX_FASTNS_TFMASKBIN_TH3 +888 0x0028 //TX_FASTNS_ARSPC_TH +889 0xC000 //TX_FASTNS_MASK5_TH +890 0x0810 //TX_POSTSSA_MIN_G_VR_MASK +891 0x1000 //TX_A_LESSCUT_RTO_MASK +892 0x1770 //TX_FASTNS_NOISETH +893 0xC000 //TX_FASTNS_SSA_THLFL +894 0xC000 //TX_FASTNS_SSA_THHFL +895 0xCCCC //TX_FASTNS_SSA_THLFH +896 0xD999 //TX_FASTNS_SSA_THHFH +897 0x2339 //TX_SENDFUNC_REG_MICMUTE +898 0x0021 //TX_SENDFUNC_REG_MICMUTE1 +899 0x02BC //TX_MICMUTE_RATIO_THR +900 0x0140 //TX_MICMUTE_AMP_THR +901 0x0004 //TX_MICMUTE_HPF_IND +902 0x00C0 //TX_MICMUTE_LOG_EYR_TH +903 0x0008 //TX_MICMUTE_CVG_TIME +904 0x0008 //TX_MICMUTE_RELEASE_TIME +905 0x01FE //TX_MIC_VOLUME_MIC0MUTE +906 0x0020 //TX_MICMUTE_EPD_OFFSET_0 +907 0x001E //TX_MICMUTE_FRQ_AEC_L +908 0x7999 //TX_MICMUTE_EAD_THR +909 0x7FFF //TX_MICMUTE_LAMBDA_CB_NLE +910 0x7FFF //TX_MICMUTE_LAMBDA_RE_EST +911 0x4000 //TX_DTD_THR1_MICMUTE_0 +912 0x7000 //TX_DTD_THR1_MICMUTE_1 +913 0x7FFF //TX_DTD_THR1_MICMUTE_2 +914 0x7FFF //TX_DTD_THR1_MICMUTE_3 +915 0x6CCC //TX_DTD_THR2_MICMUTE_0 +916 0x0400 //TX_MICMUTE_MIN_EQ_RE_EST_0 +917 0x0400 //TX_MICMUTE_MIN_EQ_RE_EST_1 +918 0x1000 //TX_MICMUTE_MIN_EQ_RE_EST_2 +919 0x7FFF //TX_MICMUTE_MIN_EQ_RE_EST_3 +920 0x7FFF //TX_MICMUTE_MIN_EQ_RE_EST_4 +921 0x4000 //TX_MICMUTE_C_POST_FLT +922 0x03E8 //TX_MICMUTE_DT_CUT_K +923 0x0001 //TX_MICMUTE_DT_CUT_THR +924 0x03E8 //TX_MICMUTE_DT_CUT_K2 +925 0x0001 //TX_MICMUTE_DT_CUT_THR2 +926 0x0064 //TX_MICMUTE_DT2_HOLD_N +927 0x1000 //TX_MICMUTE_RATIODTH_THCUT +928 0x1000 //TX_MICMUTE_B_POST_FLT_ECHOL +929 0x7FFF //TX_MICMUTE_B_POST_FLT_ECHOH +930 0x0400 //TX_MICMUTE_C_POST_FLT_MASK +931 0x7999 //TX_MICMUTE_RATIODTL_CUT_TH +932 0x0258 //TX_MICMUTE_DT_CUT_K1 +933 0x0800 //TX_MICMUTE_N2_SN_EST +934 0xFC00 //TX_MICMUTE_THR_SN_EST_0 +935 0x001C //TX_MICMUTE_MIN_G_CTRL_0 +936 0x6000 //TX_MICMUTE_A_POST_FILT_S_0 +937 0x7000 //TX_MICMUTE_B_POST_FILT_0 +938 0x2710 //TX_MIC1RUB_AMP_THR +939 0x0010 //TX_MIC1MUTE_RATIO_THR +940 0x0450 //TX_MIC1MUTE_AMP_THR +941 0x0008 //TX_MIC1MUTE_CVG_TIME +942 0x0008 //TX_MIC1MUTE_RELEASE_TIME +943 0x0000 //TX_AMS_RESRV_01 +944 0x0000 //TX_AMS_RESRV_02 +945 0x0000 //TX_AMS_RESRV_03 +946 0x0000 //TX_AMS_RESRV_04 +947 0x0000 //TX_AMS_RESRV_05 +948 0x0000 //TX_AMS_RESRV_06 +949 0x0000 //TX_AMS_RESRV_07 +950 0x0000 //TX_AMS_RESRV_08 +951 0x0000 //TX_AMS_RESRV_09 +952 0x0000 //TX_AMS_RESRV_10 +953 0x0000 //TX_AMS_RESRV_11 +954 0x0000 //TX_AMS_RESRV_12 +955 0x0000 //TX_AMS_RESRV_13 +956 0x0000 //TX_AMS_RESRV_14 +957 0x0000 //TX_AMS_RESRV_15 +958 0x0000 //TX_AMS_RESRV_16 +959 0x0000 //TX_AMS_RESRV_17 +960 0x0000 //TX_AMS_RESRV_18 +961 0x0000 //TX_AMS_RESRV_19 +#RX +0 0x203C //RX_RECVFUNC_MODE_0 +1 0x0000 //RX_RECVFUNC_MODE_1 +2 0x0003 //RX_SAMPLINGFREQ_SIG +3 0x0003 //RX_SAMPLINGFREQ_PROC +4 0x000A //RX_FRAME_SZ +5 0x0000 //RX_DELAY_OPT +6 0x1000 //RX_TDDRC_ALPHA_UP_1 +7 0x1000 //RX_TDDRC_ALPHA_UP_2 +8 0x1000 //RX_TDDRC_ALPHA_UP_3 +9 0x1000 //RX_TDDRC_ALPHA_UP_4 +10 0x05AA //RX_PGA +11 0x7FFF //RX_A_HP +12 0x4000 //RX_B_PE +13 0x5800 //RX_THR_PITCH_DET_0 +14 0x5000 //RX_THR_PITCH_DET_1 +15 0x4000 //RX_THR_PITCH_DET_2 +16 0x0008 //RX_PITCH_BFR_LEN +17 0x0003 //RX_SBD_PITCH_DET +18 0x0100 //RX_PP_RESRV_0 +19 0x0020 //RX_PP_RESRV_1 +20 0x0600 //RX_N_SN_EST +21 0x000C //RX_N2_SN_EST +22 0x000F //RX_NS_LVL_CTRL +23 0xF800 //RX_THR_SN_EST +24 0x7E00 //RX_LAMBDA_PFILT +25 0x000A //RX_FENS_RESRV_0 +26 0x0190 //RX_FENS_RESRV_1 +27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +30 0x0002 //RX_EXTRA_NS_L +31 0x0800 //RX_EXTRA_NS_A +32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +33 0x7000 //RX_TDDRC_LIMITER_THRD +34 0x0800 //RX_TDDRC_LIMITER_GAIN +35 0x199A //RX_A_POST_FLT +36 0x0000 //RX_LMT_THRD +37 0x4000 //RX_LMT_ALPHA +38 0x0020 //RX_FDEQ_SUBNUM +39 0x483E //RX_FDEQ_GAIN_0 +40 0x3E3E //RX_FDEQ_GAIN_1 +41 0x3E4A //RX_FDEQ_GAIN_2 +42 0x5464 //RX_FDEQ_GAIN_3 +43 0x7072 //RX_FDEQ_GAIN_4 +44 0x8576 //RX_FDEQ_GAIN_5 +45 0x7880 //RX_FDEQ_GAIN_6 +46 0x8888 //RX_FDEQ_GAIN_7 +47 0x949C //RX_FDEQ_GAIN_8 +48 0x96A4 //RX_FDEQ_GAIN_9 +49 0xA994 //RX_FDEQ_GAIN_10 +50 0x9487 //RX_FDEQ_GAIN_11 +51 0x6F64 //RX_FDEQ_GAIN_12 +52 0x625A //RX_FDEQ_GAIN_13 +53 0x5D80 //RX_FDEQ_GAIN_14 +54 0x8890 //RX_FDEQ_GAIN_15 +55 0x4848 //RX_FDEQ_GAIN_16 +56 0x4848 //RX_FDEQ_GAIN_17 +57 0x4848 //RX_FDEQ_GAIN_18 +58 0x4848 //RX_FDEQ_GAIN_19 +59 0x4848 //RX_FDEQ_GAIN_20 +60 0x4848 //RX_FDEQ_GAIN_21 +61 0x4848 //RX_FDEQ_GAIN_22 +62 0x4848 //RX_FDEQ_GAIN_23 +63 0x0202 //RX_FDEQ_BIN_0 +64 0x0202 //RX_FDEQ_BIN_1 +65 0x0301 //RX_FDEQ_BIN_2 +66 0x0503 //RX_FDEQ_BIN_3 +67 0x0406 //RX_FDEQ_BIN_4 +68 0x0109 //RX_FDEQ_BIN_5 +69 0x0708 //RX_FDEQ_BIN_6 +70 0x090A //RX_FDEQ_BIN_7 +71 0x0B0C //RX_FDEQ_BIN_8 +72 0x0D0E //RX_FDEQ_BIN_9 +73 0x1013 //RX_FDEQ_BIN_10 +74 0x1719 //RX_FDEQ_BIN_11 +75 0x1B0F //RX_FDEQ_BIN_12 +76 0x141E //RX_FDEQ_BIN_13 +77 0x3728 //RX_FDEQ_BIN_14 +78 0x282C //RX_FDEQ_BIN_15 +79 0x0000 //RX_FDEQ_BIN_16 +80 0x0000 //RX_FDEQ_BIN_17 +81 0x0000 //RX_FDEQ_BIN_18 +82 0x0000 //RX_FDEQ_BIN_19 +83 0x0000 //RX_FDEQ_BIN_20 +84 0x0000 //RX_FDEQ_BIN_21 +85 0x0000 //RX_FDEQ_BIN_22 +86 0x0000 //RX_FDEQ_BIN_23 +87 0x4000 //RX_FDEQ_RESRV_0 +88 0x0320 //RX_FDEQ_RESRV_1 +89 0x0018 //RX_FDDRC_BAND_MARGIN_0 +90 0x0030 //RX_FDDRC_BAND_MARGIN_1 +91 0x0050 //RX_FDDRC_BAND_MARGIN_2 +92 0x0080 //RX_FDDRC_BAND_MARGIN_3 +93 0x0007 //RX_FDDRC_BLOCK_EXP +94 0x5000 //RX_FDDRC_THRD_2_0 +95 0x5000 //RX_FDDRC_THRD_2_1 +96 0x5000 //RX_FDDRC_THRD_2_2 +97 0x5000 //RX_FDDRC_THRD_2_3 +98 0x6400 //RX_FDDRC_THRD_3_0 +99 0x6400 //RX_FDDRC_THRD_3_1 +100 0x6400 //RX_FDDRC_THRD_3_2 +101 0x6400 //RX_FDDRC_THRD_3_3 +102 0x2000 //RX_FDDRC_SLANT_0_0 +103 0x2000 //RX_FDDRC_SLANT_0_1 +104 0x2000 //RX_FDDRC_SLANT_0_2 +105 0x2000 //RX_FDDRC_SLANT_0_3 +106 0x5333 //RX_FDDRC_SLANT_1_0 +107 0x5333 //RX_FDDRC_SLANT_1_1 +108 0x5333 //RX_FDDRC_SLANT_1_2 +109 0x5333 //RX_FDDRC_SLANT_1_3 +110 0x0000 //RX_FDDRC_RESRV_0 +111 0x0002 //RX_FILTINDX +112 0x0001 //RX_TDDRC_THRD_0 +113 0x0002 //RX_TDDRC_THRD_1 +114 0x1800 //RX_TDDRC_THRD_2 +115 0x1800 //RX_TDDRC_THRD_3 +116 0x7FFF //RX_TDDRC_SLANT_0 +117 0x7FFF //RX_TDDRC_SLANT_1 +118 0x1000 //RX_TDDRC_ALPHA_UP_0 +119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +120 0x0000 //RX_TDDRC_HMNC_FLAG +121 0x199A //RX_TDDRC_HMNC_GAIN +122 0x0001 //RX_TDDRC_SMT_FLAG +123 0x0CCD //RX_TDDRC_SMT_W +124 0x057F //RX_TDDRC_DRC_GAIN +125 0x7C00 //RX_LAMBDA_PKA_FP +126 0x13E0 //RX_TPKA_FP +127 0x0080 //RX_MIN_G_FP +128 0x2000 //RX_MAX_G_FP +129 0x0100 //RX_SPK_VOL +130 0x0000 //RX_VOL_RESRV_0 +131 0x0000 //RX_MAXLEVEL_CNG +132 0x3000 //RX_BWE_UV_TH +133 0x3000 //RX_BWE_UV_TH2 +134 0x1800 //RX_BWE_UV_TH3 +135 0x1000 //RX_BWE_V_TH +136 0x04CD //RX_BWE_GAIN1_V_TH1 +137 0x0F33 //RX_BWE_GAIN1_V_TH2 +138 0x7333 //RX_BWE_UV_EQ +139 0x199A //RX_BWE_V_EQ +140 0x7333 //RX_BWE_TONE_TH +141 0x0004 //RX_BWE_UV_HOLD_T +142 0x6CCD //RX_BWE_GAIN2_ALPHA +143 0x799A //RX_BWE_GAIN3_ALPHA +144 0x001E //RX_BWE_CUTOFF +145 0x3000 //RX_BWE_GAINFILL +146 0x3200 //RX_BWE_MAXTH_TONE +147 0x2000 //RX_BWE_EQ_0 +148 0x2000 //RX_BWE_EQ_1 +149 0x2000 //RX_BWE_EQ_2 +150 0x2000 //RX_BWE_EQ_3 +151 0x2000 //RX_BWE_EQ_4 +152 0x2000 //RX_BWE_EQ_5 +153 0x2000 //RX_BWE_EQ_6 +154 0x0000 //RX_BWE_RESRV_0 +155 0x0000 //RX_BWE_RESRV_1 +156 0x0000 //RX_BWE_RESRV_2 +#VOL 0 +6 0x1000 //RX_TDDRC_ALPHA_UP_1 +7 0x1000 //RX_TDDRC_ALPHA_UP_2 +8 0x1000 //RX_TDDRC_ALPHA_UP_3 +9 0x1000 //RX_TDDRC_ALPHA_UP_4 +27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +33 0x7000 //RX_TDDRC_LIMITER_THRD +34 0x0800 //RX_TDDRC_LIMITER_GAIN +112 0x0001 //RX_TDDRC_THRD_0 +113 0x0002 //RX_TDDRC_THRD_1 +114 0x1800 //RX_TDDRC_THRD_2 +115 0x1800 //RX_TDDRC_THRD_3 +116 0x7FFF //RX_TDDRC_SLANT_0 +117 0x7FFF //RX_TDDRC_SLANT_1 +118 0x1000 //RX_TDDRC_ALPHA_UP_0 +119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +120 0x0000 //RX_TDDRC_HMNC_FLAG +121 0x199A //RX_TDDRC_HMNC_GAIN +122 0x0001 //RX_TDDRC_SMT_FLAG +123 0x0CCD //RX_TDDRC_SMT_W +124 0x057F //RX_TDDRC_DRC_GAIN +38 0x0020 //RX_FDEQ_SUBNUM +39 0x483E //RX_FDEQ_GAIN_0 +40 0x3E3E //RX_FDEQ_GAIN_1 +41 0x3E4A //RX_FDEQ_GAIN_2 +42 0x5464 //RX_FDEQ_GAIN_3 +43 0x7072 //RX_FDEQ_GAIN_4 +44 0x8576 //RX_FDEQ_GAIN_5 +45 0x7880 //RX_FDEQ_GAIN_6 +46 0x8888 //RX_FDEQ_GAIN_7 +47 0x949C //RX_FDEQ_GAIN_8 +48 0x96A4 //RX_FDEQ_GAIN_9 +49 0xA994 //RX_FDEQ_GAIN_10 +50 0x9487 //RX_FDEQ_GAIN_11 +51 0x6F64 //RX_FDEQ_GAIN_12 +52 0x625A //RX_FDEQ_GAIN_13 +53 0x5D80 //RX_FDEQ_GAIN_14 +54 0x8890 //RX_FDEQ_GAIN_15 +55 0x4848 //RX_FDEQ_GAIN_16 +56 0x4848 //RX_FDEQ_GAIN_17 +57 0x4848 //RX_FDEQ_GAIN_18 +58 0x4848 //RX_FDEQ_GAIN_19 +59 0x4848 //RX_FDEQ_GAIN_20 +60 0x4848 //RX_FDEQ_GAIN_21 +61 0x4848 //RX_FDEQ_GAIN_22 +62 0x4848 //RX_FDEQ_GAIN_23 +63 0x0202 //RX_FDEQ_BIN_0 +64 0x0202 //RX_FDEQ_BIN_1 +65 0x0301 //RX_FDEQ_BIN_2 +66 0x0503 //RX_FDEQ_BIN_3 +67 0x0406 //RX_FDEQ_BIN_4 +68 0x0109 //RX_FDEQ_BIN_5 +69 0x0708 //RX_FDEQ_BIN_6 +70 0x090A //RX_FDEQ_BIN_7 +71 0x0B0C //RX_FDEQ_BIN_8 +72 0x0D0E //RX_FDEQ_BIN_9 +73 0x1013 //RX_FDEQ_BIN_10 +74 0x1719 //RX_FDEQ_BIN_11 +75 0x1B0F //RX_FDEQ_BIN_12 +76 0x141E //RX_FDEQ_BIN_13 +77 0x3728 //RX_FDEQ_BIN_14 +78 0x282C //RX_FDEQ_BIN_15 +79 0x0000 //RX_FDEQ_BIN_16 +80 0x0000 //RX_FDEQ_BIN_17 +81 0x0000 //RX_FDEQ_BIN_18 +82 0x0000 //RX_FDEQ_BIN_19 +83 0x0000 //RX_FDEQ_BIN_20 +84 0x0000 //RX_FDEQ_BIN_21 +85 0x0000 //RX_FDEQ_BIN_22 +86 0x0000 //RX_FDEQ_BIN_23 +87 0x4000 //RX_FDEQ_RESRV_0 +88 0x0320 //RX_FDEQ_RESRV_1 +89 0x0018 //RX_FDDRC_BAND_MARGIN_0 +90 0x0030 //RX_FDDRC_BAND_MARGIN_1 +91 0x0050 //RX_FDDRC_BAND_MARGIN_2 +92 0x0080 //RX_FDDRC_BAND_MARGIN_3 +93 0x0007 //RX_FDDRC_BLOCK_EXP +94 0x5000 //RX_FDDRC_THRD_2_0 +95 0x5000 //RX_FDDRC_THRD_2_1 +96 0x5000 //RX_FDDRC_THRD_2_2 +97 0x5000 //RX_FDDRC_THRD_2_3 +98 0x6400 //RX_FDDRC_THRD_3_0 +99 0x6400 //RX_FDDRC_THRD_3_1 +100 0x6400 //RX_FDDRC_THRD_3_2 +101 0x6400 //RX_FDDRC_THRD_3_3 +102 0x2000 //RX_FDDRC_SLANT_0_0 +103 0x2000 //RX_FDDRC_SLANT_0_1 +104 0x2000 //RX_FDDRC_SLANT_0_2 +105 0x2000 //RX_FDDRC_SLANT_0_3 +106 0x5333 //RX_FDDRC_SLANT_1_0 +107 0x5333 //RX_FDDRC_SLANT_1_1 +108 0x5333 //RX_FDDRC_SLANT_1_2 +109 0x5333 //RX_FDDRC_SLANT_1_3 +110 0x0000 //RX_FDDRC_RESRV_0 +129 0x000A //RX_SPK_VOL +130 0x0000 //RX_VOL_RESRV_0 +#VOL 1 +6 0x1000 //RX_TDDRC_ALPHA_UP_1 +7 0x1000 //RX_TDDRC_ALPHA_UP_2 +8 0x1000 //RX_TDDRC_ALPHA_UP_3 +9 0x1000 //RX_TDDRC_ALPHA_UP_4 +27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +33 0x7000 //RX_TDDRC_LIMITER_THRD +34 0x0800 //RX_TDDRC_LIMITER_GAIN +112 0x0001 //RX_TDDRC_THRD_0 +113 0x0002 //RX_TDDRC_THRD_1 +114 0x1800 //RX_TDDRC_THRD_2 +115 0x1800 //RX_TDDRC_THRD_3 +116 0x7FFF //RX_TDDRC_SLANT_0 +117 0x7FFF //RX_TDDRC_SLANT_1 +118 0x1000 //RX_TDDRC_ALPHA_UP_0 +119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +120 0x0000 //RX_TDDRC_HMNC_FLAG +121 0x199A //RX_TDDRC_HMNC_GAIN +122 0x0001 //RX_TDDRC_SMT_FLAG +123 0x0CCD //RX_TDDRC_SMT_W +124 0x057F //RX_TDDRC_DRC_GAIN +38 0x0020 //RX_FDEQ_SUBNUM +39 0x483E //RX_FDEQ_GAIN_0 +40 0x3E3E //RX_FDEQ_GAIN_1 +41 0x3E4A //RX_FDEQ_GAIN_2 +42 0x5464 //RX_FDEQ_GAIN_3 +43 0x7072 //RX_FDEQ_GAIN_4 +44 0x8576 //RX_FDEQ_GAIN_5 +45 0x7880 //RX_FDEQ_GAIN_6 +46 0x8888 //RX_FDEQ_GAIN_7 +47 0x949C //RX_FDEQ_GAIN_8 +48 0x96A4 //RX_FDEQ_GAIN_9 +49 0xA994 //RX_FDEQ_GAIN_10 +50 0x9487 //RX_FDEQ_GAIN_11 +51 0x6F64 //RX_FDEQ_GAIN_12 +52 0x625A //RX_FDEQ_GAIN_13 +53 0x5D80 //RX_FDEQ_GAIN_14 +54 0x8890 //RX_FDEQ_GAIN_15 +55 0x4848 //RX_FDEQ_GAIN_16 +56 0x4848 //RX_FDEQ_GAIN_17 +57 0x4848 //RX_FDEQ_GAIN_18 +58 0x4848 //RX_FDEQ_GAIN_19 +59 0x4848 //RX_FDEQ_GAIN_20 +60 0x4848 //RX_FDEQ_GAIN_21 +61 0x4848 //RX_FDEQ_GAIN_22 +62 0x4848 //RX_FDEQ_GAIN_23 +63 0x0202 //RX_FDEQ_BIN_0 +64 0x0202 //RX_FDEQ_BIN_1 +65 0x0301 //RX_FDEQ_BIN_2 +66 0x0503 //RX_FDEQ_BIN_3 +67 0x0406 //RX_FDEQ_BIN_4 +68 0x0109 //RX_FDEQ_BIN_5 +69 0x0708 //RX_FDEQ_BIN_6 +70 0x090A //RX_FDEQ_BIN_7 +71 0x0B0C //RX_FDEQ_BIN_8 +72 0x0D0E //RX_FDEQ_BIN_9 +73 0x1013 //RX_FDEQ_BIN_10 +74 0x1719 //RX_FDEQ_BIN_11 +75 0x1B0F //RX_FDEQ_BIN_12 +76 0x141E //RX_FDEQ_BIN_13 +77 0x3728 //RX_FDEQ_BIN_14 +78 0x282C //RX_FDEQ_BIN_15 +79 0x0000 //RX_FDEQ_BIN_16 +80 0x0000 //RX_FDEQ_BIN_17 +81 0x0000 //RX_FDEQ_BIN_18 +82 0x0000 //RX_FDEQ_BIN_19 +83 0x0000 //RX_FDEQ_BIN_20 +84 0x0000 //RX_FDEQ_BIN_21 +85 0x0000 //RX_FDEQ_BIN_22 +86 0x0000 //RX_FDEQ_BIN_23 +87 0x4000 //RX_FDEQ_RESRV_0 +88 0x0320 //RX_FDEQ_RESRV_1 +89 0x0018 //RX_FDDRC_BAND_MARGIN_0 +90 0x0030 //RX_FDDRC_BAND_MARGIN_1 +91 0x0050 //RX_FDDRC_BAND_MARGIN_2 +92 0x0080 //RX_FDDRC_BAND_MARGIN_3 +93 0x0007 //RX_FDDRC_BLOCK_EXP +94 0x5000 //RX_FDDRC_THRD_2_0 +95 0x5000 //RX_FDDRC_THRD_2_1 +96 0x5000 //RX_FDDRC_THRD_2_2 +97 0x5000 //RX_FDDRC_THRD_2_3 +98 0x6400 //RX_FDDRC_THRD_3_0 +99 0x6400 //RX_FDDRC_THRD_3_1 +100 0x6400 //RX_FDDRC_THRD_3_2 +101 0x6400 //RX_FDDRC_THRD_3_3 +102 0x2000 //RX_FDDRC_SLANT_0_0 +103 0x2000 //RX_FDDRC_SLANT_0_1 +104 0x2000 //RX_FDDRC_SLANT_0_2 +105 0x2000 //RX_FDDRC_SLANT_0_3 +106 0x5333 //RX_FDDRC_SLANT_1_0 +107 0x5333 //RX_FDDRC_SLANT_1_1 +108 0x5333 //RX_FDDRC_SLANT_1_2 +109 0x5333 //RX_FDDRC_SLANT_1_3 +110 0x0000 //RX_FDDRC_RESRV_0 +129 0x0010 //RX_SPK_VOL +130 0x0000 //RX_VOL_RESRV_0 +#VOL 2 +6 0x1000 //RX_TDDRC_ALPHA_UP_1 +7 0x1000 //RX_TDDRC_ALPHA_UP_2 +8 0x1000 //RX_TDDRC_ALPHA_UP_3 +9 0x1000 //RX_TDDRC_ALPHA_UP_4 +27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +33 0x7000 //RX_TDDRC_LIMITER_THRD +34 0x0800 //RX_TDDRC_LIMITER_GAIN +112 0x0001 //RX_TDDRC_THRD_0 +113 0x0002 //RX_TDDRC_THRD_1 +114 0x1800 //RX_TDDRC_THRD_2 +115 0x1800 //RX_TDDRC_THRD_3 +116 0x7FFF //RX_TDDRC_SLANT_0 +117 0x7FFF //RX_TDDRC_SLANT_1 +118 0x1000 //RX_TDDRC_ALPHA_UP_0 +119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +120 0x0000 //RX_TDDRC_HMNC_FLAG +121 0x199A //RX_TDDRC_HMNC_GAIN +122 0x0001 //RX_TDDRC_SMT_FLAG +123 0x0CCD //RX_TDDRC_SMT_W +124 0x057F //RX_TDDRC_DRC_GAIN +38 0x0020 //RX_FDEQ_SUBNUM +39 0x483E //RX_FDEQ_GAIN_0 +40 0x3E3E //RX_FDEQ_GAIN_1 +41 0x3E4A //RX_FDEQ_GAIN_2 +42 0x5464 //RX_FDEQ_GAIN_3 +43 0x7072 //RX_FDEQ_GAIN_4 +44 0x8576 //RX_FDEQ_GAIN_5 +45 0x7880 //RX_FDEQ_GAIN_6 +46 0x8888 //RX_FDEQ_GAIN_7 +47 0x949C //RX_FDEQ_GAIN_8 +48 0x96A4 //RX_FDEQ_GAIN_9 +49 0xA994 //RX_FDEQ_GAIN_10 +50 0x9487 //RX_FDEQ_GAIN_11 +51 0x6F64 //RX_FDEQ_GAIN_12 +52 0x625A //RX_FDEQ_GAIN_13 +53 0x5D80 //RX_FDEQ_GAIN_14 +54 0x8890 //RX_FDEQ_GAIN_15 +55 0x4848 //RX_FDEQ_GAIN_16 +56 0x4848 //RX_FDEQ_GAIN_17 +57 0x4848 //RX_FDEQ_GAIN_18 +58 0x4848 //RX_FDEQ_GAIN_19 +59 0x4848 //RX_FDEQ_GAIN_20 +60 0x4848 //RX_FDEQ_GAIN_21 +61 0x4848 //RX_FDEQ_GAIN_22 +62 0x4848 //RX_FDEQ_GAIN_23 +63 0x0202 //RX_FDEQ_BIN_0 +64 0x0202 //RX_FDEQ_BIN_1 +65 0x0301 //RX_FDEQ_BIN_2 +66 0x0503 //RX_FDEQ_BIN_3 +67 0x0406 //RX_FDEQ_BIN_4 +68 0x0109 //RX_FDEQ_BIN_5 +69 0x0708 //RX_FDEQ_BIN_6 +70 0x090A //RX_FDEQ_BIN_7 +71 0x0B0C //RX_FDEQ_BIN_8 +72 0x0D0E //RX_FDEQ_BIN_9 +73 0x1013 //RX_FDEQ_BIN_10 +74 0x1719 //RX_FDEQ_BIN_11 +75 0x1B0F //RX_FDEQ_BIN_12 +76 0x141E //RX_FDEQ_BIN_13 +77 0x3728 //RX_FDEQ_BIN_14 +78 0x282C //RX_FDEQ_BIN_15 +79 0x0000 //RX_FDEQ_BIN_16 +80 0x0000 //RX_FDEQ_BIN_17 +81 0x0000 //RX_FDEQ_BIN_18 +82 0x0000 //RX_FDEQ_BIN_19 +83 0x0000 //RX_FDEQ_BIN_20 +84 0x0000 //RX_FDEQ_BIN_21 +85 0x0000 //RX_FDEQ_BIN_22 +86 0x0000 //RX_FDEQ_BIN_23 +87 0x4000 //RX_FDEQ_RESRV_0 +88 0x0320 //RX_FDEQ_RESRV_1 +89 0x0018 //RX_FDDRC_BAND_MARGIN_0 +90 0x0030 //RX_FDDRC_BAND_MARGIN_1 +91 0x0050 //RX_FDDRC_BAND_MARGIN_2 +92 0x0080 //RX_FDDRC_BAND_MARGIN_3 +93 0x0007 //RX_FDDRC_BLOCK_EXP +94 0x5000 //RX_FDDRC_THRD_2_0 +95 0x5000 //RX_FDDRC_THRD_2_1 +96 0x5000 //RX_FDDRC_THRD_2_2 +97 0x5000 //RX_FDDRC_THRD_2_3 +98 0x6400 //RX_FDDRC_THRD_3_0 +99 0x6400 //RX_FDDRC_THRD_3_1 +100 0x6400 //RX_FDDRC_THRD_3_2 +101 0x6400 //RX_FDDRC_THRD_3_3 +102 0x2000 //RX_FDDRC_SLANT_0_0 +103 0x2000 //RX_FDDRC_SLANT_0_1 +104 0x2000 //RX_FDDRC_SLANT_0_2 +105 0x2000 //RX_FDDRC_SLANT_0_3 +106 0x5333 //RX_FDDRC_SLANT_1_0 +107 0x5333 //RX_FDDRC_SLANT_1_1 +108 0x5333 //RX_FDDRC_SLANT_1_2 +109 0x5333 //RX_FDDRC_SLANT_1_3 +110 0x0000 //RX_FDDRC_RESRV_0 +129 0x001B //RX_SPK_VOL +130 0x0000 //RX_VOL_RESRV_0 +#VOL 3 +6 0x1000 //RX_TDDRC_ALPHA_UP_1 +7 0x1000 //RX_TDDRC_ALPHA_UP_2 +8 0x1000 //RX_TDDRC_ALPHA_UP_3 +9 0x1000 //RX_TDDRC_ALPHA_UP_4 +27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +33 0x7000 //RX_TDDRC_LIMITER_THRD +34 0x0800 //RX_TDDRC_LIMITER_GAIN +112 0x0001 //RX_TDDRC_THRD_0 +113 0x0002 //RX_TDDRC_THRD_1 +114 0x1800 //RX_TDDRC_THRD_2 +115 0x1800 //RX_TDDRC_THRD_3 +116 0x7FFF //RX_TDDRC_SLANT_0 +117 0x7FFF //RX_TDDRC_SLANT_1 +118 0x1000 //RX_TDDRC_ALPHA_UP_0 +119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +120 0x0000 //RX_TDDRC_HMNC_FLAG +121 0x199A //RX_TDDRC_HMNC_GAIN +122 0x0001 //RX_TDDRC_SMT_FLAG +123 0x0CCD //RX_TDDRC_SMT_W +124 0x057F //RX_TDDRC_DRC_GAIN +38 0x0020 //RX_FDEQ_SUBNUM +39 0x483E //RX_FDEQ_GAIN_0 +40 0x3E3E //RX_FDEQ_GAIN_1 +41 0x3E4A //RX_FDEQ_GAIN_2 +42 0x5464 //RX_FDEQ_GAIN_3 +43 0x7072 //RX_FDEQ_GAIN_4 +44 0x8576 //RX_FDEQ_GAIN_5 +45 0x7880 //RX_FDEQ_GAIN_6 +46 0x8888 //RX_FDEQ_GAIN_7 +47 0x949C //RX_FDEQ_GAIN_8 +48 0x96A4 //RX_FDEQ_GAIN_9 +49 0xA994 //RX_FDEQ_GAIN_10 +50 0x9487 //RX_FDEQ_GAIN_11 +51 0x6F64 //RX_FDEQ_GAIN_12 +52 0x625A //RX_FDEQ_GAIN_13 +53 0x5D80 //RX_FDEQ_GAIN_14 +54 0x8890 //RX_FDEQ_GAIN_15 +55 0x4848 //RX_FDEQ_GAIN_16 +56 0x4848 //RX_FDEQ_GAIN_17 +57 0x4848 //RX_FDEQ_GAIN_18 +58 0x4848 //RX_FDEQ_GAIN_19 +59 0x4848 //RX_FDEQ_GAIN_20 +60 0x4848 //RX_FDEQ_GAIN_21 +61 0x4848 //RX_FDEQ_GAIN_22 +62 0x4848 //RX_FDEQ_GAIN_23 +63 0x0202 //RX_FDEQ_BIN_0 +64 0x0202 //RX_FDEQ_BIN_1 +65 0x0301 //RX_FDEQ_BIN_2 +66 0x0503 //RX_FDEQ_BIN_3 +67 0x0406 //RX_FDEQ_BIN_4 +68 0x0109 //RX_FDEQ_BIN_5 +69 0x0708 //RX_FDEQ_BIN_6 +70 0x090A //RX_FDEQ_BIN_7 +71 0x0B0C //RX_FDEQ_BIN_8 +72 0x0D0E //RX_FDEQ_BIN_9 +73 0x1013 //RX_FDEQ_BIN_10 +74 0x1719 //RX_FDEQ_BIN_11 +75 0x1B0F //RX_FDEQ_BIN_12 +76 0x141E //RX_FDEQ_BIN_13 +77 0x3728 //RX_FDEQ_BIN_14 +78 0x282C //RX_FDEQ_BIN_15 +79 0x0000 //RX_FDEQ_BIN_16 +80 0x0000 //RX_FDEQ_BIN_17 +81 0x0000 //RX_FDEQ_BIN_18 +82 0x0000 //RX_FDEQ_BIN_19 +83 0x0000 //RX_FDEQ_BIN_20 +84 0x0000 //RX_FDEQ_BIN_21 +85 0x0000 //RX_FDEQ_BIN_22 +86 0x0000 //RX_FDEQ_BIN_23 +87 0x4000 //RX_FDEQ_RESRV_0 +88 0x0320 //RX_FDEQ_RESRV_1 +89 0x0018 //RX_FDDRC_BAND_MARGIN_0 +90 0x0030 //RX_FDDRC_BAND_MARGIN_1 +91 0x0050 //RX_FDDRC_BAND_MARGIN_2 +92 0x0080 //RX_FDDRC_BAND_MARGIN_3 +93 0x0007 //RX_FDDRC_BLOCK_EXP +94 0x5000 //RX_FDDRC_THRD_2_0 +95 0x5000 //RX_FDDRC_THRD_2_1 +96 0x5000 //RX_FDDRC_THRD_2_2 +97 0x5000 //RX_FDDRC_THRD_2_3 +98 0x6400 //RX_FDDRC_THRD_3_0 +99 0x6400 //RX_FDDRC_THRD_3_1 +100 0x6400 //RX_FDDRC_THRD_3_2 +101 0x6400 //RX_FDDRC_THRD_3_3 +102 0x2000 //RX_FDDRC_SLANT_0_0 +103 0x2000 //RX_FDDRC_SLANT_0_1 +104 0x2000 //RX_FDDRC_SLANT_0_2 +105 0x2000 //RX_FDDRC_SLANT_0_3 +106 0x5333 //RX_FDDRC_SLANT_1_0 +107 0x5333 //RX_FDDRC_SLANT_1_1 +108 0x5333 //RX_FDDRC_SLANT_1_2 +109 0x5333 //RX_FDDRC_SLANT_1_3 +110 0x0000 //RX_FDDRC_RESRV_0 +129 0x0032 //RX_SPK_VOL +130 0x0000 //RX_VOL_RESRV_0 +#VOL 4 +6 0x1000 //RX_TDDRC_ALPHA_UP_1 +7 0x1000 //RX_TDDRC_ALPHA_UP_2 +8 0x1000 //RX_TDDRC_ALPHA_UP_3 +9 0x1000 //RX_TDDRC_ALPHA_UP_4 +27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +33 0x7000 //RX_TDDRC_LIMITER_THRD +34 0x0800 //RX_TDDRC_LIMITER_GAIN +112 0x0001 //RX_TDDRC_THRD_0 +113 0x0002 //RX_TDDRC_THRD_1 +114 0x1800 //RX_TDDRC_THRD_2 +115 0x1800 //RX_TDDRC_THRD_3 +116 0x7FFF //RX_TDDRC_SLANT_0 +117 0x7FFF //RX_TDDRC_SLANT_1 +118 0x1000 //RX_TDDRC_ALPHA_UP_0 +119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +120 0x0000 //RX_TDDRC_HMNC_FLAG +121 0x199A //RX_TDDRC_HMNC_GAIN +122 0x0001 //RX_TDDRC_SMT_FLAG +123 0x0CCD //RX_TDDRC_SMT_W +124 0x057F //RX_TDDRC_DRC_GAIN +38 0x0020 //RX_FDEQ_SUBNUM +39 0x483E //RX_FDEQ_GAIN_0 +40 0x3E3E //RX_FDEQ_GAIN_1 +41 0x3E4A //RX_FDEQ_GAIN_2 +42 0x5464 //RX_FDEQ_GAIN_3 +43 0x7072 //RX_FDEQ_GAIN_4 +44 0x8576 //RX_FDEQ_GAIN_5 +45 0x7880 //RX_FDEQ_GAIN_6 +46 0x8888 //RX_FDEQ_GAIN_7 +47 0x949C //RX_FDEQ_GAIN_8 +48 0x96A4 //RX_FDEQ_GAIN_9 +49 0xA994 //RX_FDEQ_GAIN_10 +50 0x9487 //RX_FDEQ_GAIN_11 +51 0x6F64 //RX_FDEQ_GAIN_12 +52 0x625A //RX_FDEQ_GAIN_13 +53 0x5D80 //RX_FDEQ_GAIN_14 +54 0x8890 //RX_FDEQ_GAIN_15 +55 0x4848 //RX_FDEQ_GAIN_16 +56 0x4848 //RX_FDEQ_GAIN_17 +57 0x4848 //RX_FDEQ_GAIN_18 +58 0x4848 //RX_FDEQ_GAIN_19 +59 0x4848 //RX_FDEQ_GAIN_20 +60 0x4848 //RX_FDEQ_GAIN_21 +61 0x4848 //RX_FDEQ_GAIN_22 +62 0x4848 //RX_FDEQ_GAIN_23 +63 0x0202 //RX_FDEQ_BIN_0 +64 0x0202 //RX_FDEQ_BIN_1 +65 0x0301 //RX_FDEQ_BIN_2 +66 0x0503 //RX_FDEQ_BIN_3 +67 0x0406 //RX_FDEQ_BIN_4 +68 0x0109 //RX_FDEQ_BIN_5 +69 0x0708 //RX_FDEQ_BIN_6 +70 0x090A //RX_FDEQ_BIN_7 +71 0x0B0C //RX_FDEQ_BIN_8 +72 0x0D0E //RX_FDEQ_BIN_9 +73 0x1013 //RX_FDEQ_BIN_10 +74 0x1719 //RX_FDEQ_BIN_11 +75 0x1B0F //RX_FDEQ_BIN_12 +76 0x141E //RX_FDEQ_BIN_13 +77 0x3728 //RX_FDEQ_BIN_14 +78 0x282C //RX_FDEQ_BIN_15 +79 0x0000 //RX_FDEQ_BIN_16 +80 0x0000 //RX_FDEQ_BIN_17 +81 0x0000 //RX_FDEQ_BIN_18 +82 0x0000 //RX_FDEQ_BIN_19 +83 0x0000 //RX_FDEQ_BIN_20 +84 0x0000 //RX_FDEQ_BIN_21 +85 0x0000 //RX_FDEQ_BIN_22 +86 0x0000 //RX_FDEQ_BIN_23 +87 0x4000 //RX_FDEQ_RESRV_0 +88 0x0320 //RX_FDEQ_RESRV_1 +89 0x0018 //RX_FDDRC_BAND_MARGIN_0 +90 0x0030 //RX_FDDRC_BAND_MARGIN_1 +91 0x0050 //RX_FDDRC_BAND_MARGIN_2 +92 0x0080 //RX_FDDRC_BAND_MARGIN_3 +93 0x0007 //RX_FDDRC_BLOCK_EXP +94 0x5000 //RX_FDDRC_THRD_2_0 +95 0x5000 //RX_FDDRC_THRD_2_1 +96 0x5000 //RX_FDDRC_THRD_2_2 +97 0x5000 //RX_FDDRC_THRD_2_3 +98 0x6400 //RX_FDDRC_THRD_3_0 +99 0x6400 //RX_FDDRC_THRD_3_1 +100 0x6400 //RX_FDDRC_THRD_3_2 +101 0x6400 //RX_FDDRC_THRD_3_3 +102 0x2000 //RX_FDDRC_SLANT_0_0 +103 0x2000 //RX_FDDRC_SLANT_0_1 +104 0x2000 //RX_FDDRC_SLANT_0_2 +105 0x2000 //RX_FDDRC_SLANT_0_3 +106 0x5333 //RX_FDDRC_SLANT_1_0 +107 0x5333 //RX_FDDRC_SLANT_1_1 +108 0x5333 //RX_FDDRC_SLANT_1_2 +109 0x5333 //RX_FDDRC_SLANT_1_3 +110 0x0000 //RX_FDDRC_RESRV_0 +129 0x0047 //RX_SPK_VOL +130 0x0000 //RX_VOL_RESRV_0 +#VOL 5 +6 0x1000 //RX_TDDRC_ALPHA_UP_1 +7 0x1000 //RX_TDDRC_ALPHA_UP_2 +8 0x1000 //RX_TDDRC_ALPHA_UP_3 +9 0x1000 //RX_TDDRC_ALPHA_UP_4 +27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +33 0x7000 //RX_TDDRC_LIMITER_THRD +34 0x0800 //RX_TDDRC_LIMITER_GAIN +112 0x0001 //RX_TDDRC_THRD_0 +113 0x0002 //RX_TDDRC_THRD_1 +114 0x1800 //RX_TDDRC_THRD_2 +115 0x1800 //RX_TDDRC_THRD_3 +116 0x7FFF //RX_TDDRC_SLANT_0 +117 0x7FFF //RX_TDDRC_SLANT_1 +118 0x1000 //RX_TDDRC_ALPHA_UP_0 +119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +120 0x0000 //RX_TDDRC_HMNC_FLAG +121 0x199A //RX_TDDRC_HMNC_GAIN +122 0x0001 //RX_TDDRC_SMT_FLAG +123 0x0CCD //RX_TDDRC_SMT_W +124 0x057F //RX_TDDRC_DRC_GAIN +38 0x0020 //RX_FDEQ_SUBNUM +39 0x483E //RX_FDEQ_GAIN_0 +40 0x3E3E //RX_FDEQ_GAIN_1 +41 0x3E4A //RX_FDEQ_GAIN_2 +42 0x5464 //RX_FDEQ_GAIN_3 +43 0x7072 //RX_FDEQ_GAIN_4 +44 0x8576 //RX_FDEQ_GAIN_5 +45 0x7880 //RX_FDEQ_GAIN_6 +46 0x8888 //RX_FDEQ_GAIN_7 +47 0x949C //RX_FDEQ_GAIN_8 +48 0x96A4 //RX_FDEQ_GAIN_9 +49 0xA994 //RX_FDEQ_GAIN_10 +50 0x9487 //RX_FDEQ_GAIN_11 +51 0x6F64 //RX_FDEQ_GAIN_12 +52 0x625A //RX_FDEQ_GAIN_13 +53 0x5D80 //RX_FDEQ_GAIN_14 +54 0x8890 //RX_FDEQ_GAIN_15 +55 0x4848 //RX_FDEQ_GAIN_16 +56 0x4848 //RX_FDEQ_GAIN_17 +57 0x4848 //RX_FDEQ_GAIN_18 +58 0x4848 //RX_FDEQ_GAIN_19 +59 0x4848 //RX_FDEQ_GAIN_20 +60 0x4848 //RX_FDEQ_GAIN_21 +61 0x4848 //RX_FDEQ_GAIN_22 +62 0x4848 //RX_FDEQ_GAIN_23 +63 0x0202 //RX_FDEQ_BIN_0 +64 0x0202 //RX_FDEQ_BIN_1 +65 0x0301 //RX_FDEQ_BIN_2 +66 0x0503 //RX_FDEQ_BIN_3 +67 0x0406 //RX_FDEQ_BIN_4 +68 0x0109 //RX_FDEQ_BIN_5 +69 0x0708 //RX_FDEQ_BIN_6 +70 0x090A //RX_FDEQ_BIN_7 +71 0x0B0C //RX_FDEQ_BIN_8 +72 0x0D0E //RX_FDEQ_BIN_9 +73 0x1013 //RX_FDEQ_BIN_10 +74 0x1719 //RX_FDEQ_BIN_11 +75 0x1B0F //RX_FDEQ_BIN_12 +76 0x141E //RX_FDEQ_BIN_13 +77 0x3728 //RX_FDEQ_BIN_14 +78 0x282C //RX_FDEQ_BIN_15 +79 0x0000 //RX_FDEQ_BIN_16 +80 0x0000 //RX_FDEQ_BIN_17 +81 0x0000 //RX_FDEQ_BIN_18 +82 0x0000 //RX_FDEQ_BIN_19 +83 0x0000 //RX_FDEQ_BIN_20 +84 0x0000 //RX_FDEQ_BIN_21 +85 0x0000 //RX_FDEQ_BIN_22 +86 0x0000 //RX_FDEQ_BIN_23 +87 0x4000 //RX_FDEQ_RESRV_0 +88 0x0320 //RX_FDEQ_RESRV_1 +89 0x0018 //RX_FDDRC_BAND_MARGIN_0 +90 0x0030 //RX_FDDRC_BAND_MARGIN_1 +91 0x0050 //RX_FDDRC_BAND_MARGIN_2 +92 0x0080 //RX_FDDRC_BAND_MARGIN_3 +93 0x0007 //RX_FDDRC_BLOCK_EXP +94 0x5000 //RX_FDDRC_THRD_2_0 +95 0x5000 //RX_FDDRC_THRD_2_1 +96 0x5000 //RX_FDDRC_THRD_2_2 +97 0x5000 //RX_FDDRC_THRD_2_3 +98 0x6400 //RX_FDDRC_THRD_3_0 +99 0x6400 //RX_FDDRC_THRD_3_1 +100 0x6400 //RX_FDDRC_THRD_3_2 +101 0x6400 //RX_FDDRC_THRD_3_3 +102 0x2000 //RX_FDDRC_SLANT_0_0 +103 0x2000 //RX_FDDRC_SLANT_0_1 +104 0x2000 //RX_FDDRC_SLANT_0_2 +105 0x2000 //RX_FDDRC_SLANT_0_3 +106 0x5333 //RX_FDDRC_SLANT_1_0 +107 0x5333 //RX_FDDRC_SLANT_1_1 +108 0x5333 //RX_FDDRC_SLANT_1_2 +109 0x5333 //RX_FDDRC_SLANT_1_3 +110 0x0000 //RX_FDDRC_RESRV_0 +129 0x0076 //RX_SPK_VOL +130 0x0000 //RX_VOL_RESRV_0 +#VOL 6 +6 0x1000 //RX_TDDRC_ALPHA_UP_1 +7 0x1000 //RX_TDDRC_ALPHA_UP_2 +8 0x1000 //RX_TDDRC_ALPHA_UP_3 +9 0x1000 //RX_TDDRC_ALPHA_UP_4 +27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +33 0x7000 //RX_TDDRC_LIMITER_THRD +34 0x0800 //RX_TDDRC_LIMITER_GAIN +112 0x0001 //RX_TDDRC_THRD_0 +113 0x0002 //RX_TDDRC_THRD_1 +114 0x1800 //RX_TDDRC_THRD_2 +115 0x1800 //RX_TDDRC_THRD_3 +116 0x7FFF //RX_TDDRC_SLANT_0 +117 0x7FFF //RX_TDDRC_SLANT_1 +118 0x1000 //RX_TDDRC_ALPHA_UP_0 +119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +120 0x0000 //RX_TDDRC_HMNC_FLAG +121 0x199A //RX_TDDRC_HMNC_GAIN +122 0x0001 //RX_TDDRC_SMT_FLAG +123 0x0CCD //RX_TDDRC_SMT_W +124 0x057F //RX_TDDRC_DRC_GAIN +38 0x0020 //RX_FDEQ_SUBNUM +39 0x483E //RX_FDEQ_GAIN_0 +40 0x3E3E //RX_FDEQ_GAIN_1 +41 0x3E4A //RX_FDEQ_GAIN_2 +42 0x5464 //RX_FDEQ_GAIN_3 +43 0x7072 //RX_FDEQ_GAIN_4 +44 0x8576 //RX_FDEQ_GAIN_5 +45 0x7880 //RX_FDEQ_GAIN_6 +46 0x8888 //RX_FDEQ_GAIN_7 +47 0x949C //RX_FDEQ_GAIN_8 +48 0x96A4 //RX_FDEQ_GAIN_9 +49 0xA994 //RX_FDEQ_GAIN_10 +50 0x9487 //RX_FDEQ_GAIN_11 +51 0x6F64 //RX_FDEQ_GAIN_12 +52 0x625A //RX_FDEQ_GAIN_13 +53 0x5D80 //RX_FDEQ_GAIN_14 +54 0x8890 //RX_FDEQ_GAIN_15 +55 0x4848 //RX_FDEQ_GAIN_16 +56 0x4848 //RX_FDEQ_GAIN_17 +57 0x4848 //RX_FDEQ_GAIN_18 +58 0x4848 //RX_FDEQ_GAIN_19 +59 0x4848 //RX_FDEQ_GAIN_20 +60 0x4848 //RX_FDEQ_GAIN_21 +61 0x4848 //RX_FDEQ_GAIN_22 +62 0x4848 //RX_FDEQ_GAIN_23 +63 0x0202 //RX_FDEQ_BIN_0 +64 0x0202 //RX_FDEQ_BIN_1 +65 0x0301 //RX_FDEQ_BIN_2 +66 0x0503 //RX_FDEQ_BIN_3 +67 0x0406 //RX_FDEQ_BIN_4 +68 0x0109 //RX_FDEQ_BIN_5 +69 0x0708 //RX_FDEQ_BIN_6 +70 0x090A //RX_FDEQ_BIN_7 +71 0x0B0C //RX_FDEQ_BIN_8 +72 0x0D0E //RX_FDEQ_BIN_9 +73 0x1013 //RX_FDEQ_BIN_10 +74 0x1719 //RX_FDEQ_BIN_11 +75 0x1B0F //RX_FDEQ_BIN_12 +76 0x141E //RX_FDEQ_BIN_13 +77 0x3728 //RX_FDEQ_BIN_14 +78 0x282C //RX_FDEQ_BIN_15 +79 0x0000 //RX_FDEQ_BIN_16 +80 0x0000 //RX_FDEQ_BIN_17 +81 0x0000 //RX_FDEQ_BIN_18 +82 0x0000 //RX_FDEQ_BIN_19 +83 0x0000 //RX_FDEQ_BIN_20 +84 0x0000 //RX_FDEQ_BIN_21 +85 0x0000 //RX_FDEQ_BIN_22 +86 0x0000 //RX_FDEQ_BIN_23 +87 0x4000 //RX_FDEQ_RESRV_0 +88 0x0320 //RX_FDEQ_RESRV_1 +89 0x0018 //RX_FDDRC_BAND_MARGIN_0 +90 0x0030 //RX_FDDRC_BAND_MARGIN_1 +91 0x0050 //RX_FDDRC_BAND_MARGIN_2 +92 0x0080 //RX_FDDRC_BAND_MARGIN_3 +93 0x0007 //RX_FDDRC_BLOCK_EXP +94 0x5000 //RX_FDDRC_THRD_2_0 +95 0x5000 //RX_FDDRC_THRD_2_1 +96 0x5000 //RX_FDDRC_THRD_2_2 +97 0x5000 //RX_FDDRC_THRD_2_3 +98 0x6400 //RX_FDDRC_THRD_3_0 +99 0x6400 //RX_FDDRC_THRD_3_1 +100 0x6400 //RX_FDDRC_THRD_3_2 +101 0x6400 //RX_FDDRC_THRD_3_3 +102 0x2000 //RX_FDDRC_SLANT_0_0 +103 0x2000 //RX_FDDRC_SLANT_0_1 +104 0x2000 //RX_FDDRC_SLANT_0_2 +105 0x2000 //RX_FDDRC_SLANT_0_3 +106 0x5333 //RX_FDDRC_SLANT_1_0 +107 0x5333 //RX_FDDRC_SLANT_1_1 +108 0x5333 //RX_FDDRC_SLANT_1_2 +109 0x5333 //RX_FDDRC_SLANT_1_3 +110 0x0000 //RX_FDDRC_RESRV_0 +129 0x0100 //RX_SPK_VOL +130 0x0000 //RX_VOL_RESRV_0 +#RX 2 +157 0x003C //RX_RECVFUNC_MODE_0 +158 0x0000 //RX_RECVFUNC_MODE_1 +159 0x0003 //RX_SAMPLINGFREQ_SIG +160 0x0003 //RX_SAMPLINGFREQ_PROC +161 0x000A //RX_FRAME_SZ +162 0x0000 //RX_DELAY_OPT +163 0x1000 //RX_TDDRC_ALPHA_UP_1 +164 0x1000 //RX_TDDRC_ALPHA_UP_2 +165 0x1000 //RX_TDDRC_ALPHA_UP_3 +166 0x1000 //RX_TDDRC_ALPHA_UP_4 +167 0x05AA //RX_PGA +168 0x7FFF //RX_A_HP +169 0x4000 //RX_B_PE +170 0x5800 //RX_THR_PITCH_DET_0 +171 0x5000 //RX_THR_PITCH_DET_1 +172 0x4000 //RX_THR_PITCH_DET_2 +173 0x0008 //RX_PITCH_BFR_LEN +174 0x0003 //RX_SBD_PITCH_DET +175 0x0100 //RX_PP_RESRV_0 +176 0x0020 //RX_PP_RESRV_1 +177 0x0600 //RX_N_SN_EST +178 0x000C //RX_N2_SN_EST +179 0x000F //RX_NS_LVL_CTRL +180 0xF800 //RX_THR_SN_EST +181 0x7E00 //RX_LAMBDA_PFILT +182 0x000A //RX_FENS_RESRV_0 +183 0x0190 //RX_FENS_RESRV_1 +184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +187 0x0002 //RX_EXTRA_NS_L +188 0x0800 //RX_EXTRA_NS_A +189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +190 0x7000 //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +192 0x199A //RX_A_POST_FLT +193 0x0000 //RX_LMT_THRD +194 0x4000 //RX_LMT_ALPHA +195 0x0020 //RX_FDEQ_SUBNUM +196 0x483E //RX_FDEQ_GAIN_0 +197 0x3E3E //RX_FDEQ_GAIN_1 +198 0x3E4C //RX_FDEQ_GAIN_2 +199 0x5064 //RX_FDEQ_GAIN_3 +200 0x7076 //RX_FDEQ_GAIN_4 +201 0x897A //RX_FDEQ_GAIN_5 +202 0x7C80 //RX_FDEQ_GAIN_6 +203 0x8888 //RX_FDEQ_GAIN_7 +204 0x949C //RX_FDEQ_GAIN_8 +205 0x96A4 //RX_FDEQ_GAIN_9 +206 0xA9A0 //RX_FDEQ_GAIN_10 +207 0x9487 //RX_FDEQ_GAIN_11 +208 0x6F64 //RX_FDEQ_GAIN_12 +209 0x625A //RX_FDEQ_GAIN_13 +210 0x5D80 //RX_FDEQ_GAIN_14 +211 0x8890 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0202 //RX_FDEQ_BIN_0 +221 0x0202 //RX_FDEQ_BIN_1 +222 0x0301 //RX_FDEQ_BIN_2 +223 0x0404 //RX_FDEQ_BIN_3 +224 0x0406 //RX_FDEQ_BIN_4 +225 0x0109 //RX_FDEQ_BIN_5 +226 0x0708 //RX_FDEQ_BIN_6 +227 0x090A //RX_FDEQ_BIN_7 +228 0x0B0C //RX_FDEQ_BIN_8 +229 0x0D0E //RX_FDEQ_BIN_9 +230 0x1013 //RX_FDEQ_BIN_10 +231 0x1719 //RX_FDEQ_BIN_11 +232 0x1B0F //RX_FDEQ_BIN_12 +233 0x141E //RX_FDEQ_BIN_13 +234 0x3728 //RX_FDEQ_BIN_14 +235 0x282C //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x4000 //RX_FDEQ_RESRV_0 +245 0x0320 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0030 //RX_FDDRC_BAND_MARGIN_1 +248 0x0050 //RX_FDDRC_BAND_MARGIN_2 +249 0x0080 //RX_FDDRC_BAND_MARGIN_3 +250 0x0007 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x5000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x6400 //RX_FDDRC_THRD_3_2 +258 0x6400 //RX_FDDRC_THRD_3_3 +259 0x2000 //RX_FDDRC_SLANT_0_0 +260 0x2000 //RX_FDDRC_SLANT_0_1 +261 0x2000 //RX_FDDRC_SLANT_0_2 +262 0x2000 //RX_FDDRC_SLANT_0_3 +263 0x5333 //RX_FDDRC_SLANT_1_0 +264 0x5333 //RX_FDDRC_SLANT_1_1 +265 0x5333 //RX_FDDRC_SLANT_1_2 +266 0x5333 //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +268 0x0002 //RX_FILTINDX +269 0x0001 //RX_TDDRC_THRD_0 +270 0x0002 //RX_TDDRC_THRD_1 +271 0x1800 //RX_TDDRC_THRD_2 +272 0x1800 //RX_TDDRC_THRD_3 +273 0x7FFF //RX_TDDRC_SLANT_0 +274 0x7FFF //RX_TDDRC_SLANT_1 +275 0x1000 //RX_TDDRC_ALPHA_UP_0 +276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x199A //RX_TDDRC_HMNC_GAIN +279 0x0001 //RX_TDDRC_SMT_FLAG +280 0x0CCD //RX_TDDRC_SMT_W +281 0x0551 //RX_TDDRC_DRC_GAIN +282 0x7C00 //RX_LAMBDA_PKA_FP +283 0x13E0 //RX_TPKA_FP +284 0x0080 //RX_MIN_G_FP +285 0x2000 //RX_MAX_G_FP +286 0x0100 //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 +288 0x0000 //RX_MAXLEVEL_CNG +289 0x3000 //RX_BWE_UV_TH +290 0x3000 //RX_BWE_UV_TH2 +291 0x1800 //RX_BWE_UV_TH3 +292 0x1000 //RX_BWE_V_TH +293 0x04CD //RX_BWE_GAIN1_V_TH1 +294 0x0F33 //RX_BWE_GAIN1_V_TH2 +295 0x7333 //RX_BWE_UV_EQ +296 0x199A //RX_BWE_V_EQ +297 0x7333 //RX_BWE_TONE_TH +298 0x0004 //RX_BWE_UV_HOLD_T +299 0x6CCD //RX_BWE_GAIN2_ALPHA +300 0x799A //RX_BWE_GAIN3_ALPHA +301 0x001E //RX_BWE_CUTOFF +302 0x3000 //RX_BWE_GAINFILL +303 0x3200 //RX_BWE_MAXTH_TONE +304 0x2000 //RX_BWE_EQ_0 +305 0x2000 //RX_BWE_EQ_1 +306 0x2000 //RX_BWE_EQ_2 +307 0x2000 //RX_BWE_EQ_3 +308 0x2000 //RX_BWE_EQ_4 +309 0x2000 //RX_BWE_EQ_5 +310 0x2000 //RX_BWE_EQ_6 +311 0x0000 //RX_BWE_RESRV_0 +312 0x0000 //RX_BWE_RESRV_1 +313 0x0000 //RX_BWE_RESRV_2 +#VOL 0 +163 0x1000 //RX_TDDRC_ALPHA_UP_1 +164 0x1000 //RX_TDDRC_ALPHA_UP_2 +165 0x1000 //RX_TDDRC_ALPHA_UP_3 +166 0x1000 //RX_TDDRC_ALPHA_UP_4 +184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +190 0x7000 //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +269 0x0001 //RX_TDDRC_THRD_0 +270 0x0002 //RX_TDDRC_THRD_1 +271 0x1800 //RX_TDDRC_THRD_2 +272 0x1800 //RX_TDDRC_THRD_3 +273 0x7FFF //RX_TDDRC_SLANT_0 +274 0x7FFF //RX_TDDRC_SLANT_1 +275 0x1000 //RX_TDDRC_ALPHA_UP_0 +276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x199A //RX_TDDRC_HMNC_GAIN +279 0x0001 //RX_TDDRC_SMT_FLAG +280 0x0CCD //RX_TDDRC_SMT_W +281 0x0551 //RX_TDDRC_DRC_GAIN +195 0x0020 //RX_FDEQ_SUBNUM +196 0x483E //RX_FDEQ_GAIN_0 +197 0x3E3E //RX_FDEQ_GAIN_1 +198 0x3E4C //RX_FDEQ_GAIN_2 +199 0x5064 //RX_FDEQ_GAIN_3 +200 0x7076 //RX_FDEQ_GAIN_4 +201 0x897A //RX_FDEQ_GAIN_5 +202 0x7C80 //RX_FDEQ_GAIN_6 +203 0x8888 //RX_FDEQ_GAIN_7 +204 0x949C //RX_FDEQ_GAIN_8 +205 0x96A4 //RX_FDEQ_GAIN_9 +206 0xA9A0 //RX_FDEQ_GAIN_10 +207 0x9487 //RX_FDEQ_GAIN_11 +208 0x6F64 //RX_FDEQ_GAIN_12 +209 0x625A //RX_FDEQ_GAIN_13 +210 0x5D80 //RX_FDEQ_GAIN_14 +211 0x8890 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0202 //RX_FDEQ_BIN_0 +221 0x0202 //RX_FDEQ_BIN_1 +222 0x0301 //RX_FDEQ_BIN_2 +223 0x0404 //RX_FDEQ_BIN_3 +224 0x0406 //RX_FDEQ_BIN_4 +225 0x0109 //RX_FDEQ_BIN_5 +226 0x0708 //RX_FDEQ_BIN_6 +227 0x090A //RX_FDEQ_BIN_7 +228 0x0B0C //RX_FDEQ_BIN_8 +229 0x0D0E //RX_FDEQ_BIN_9 +230 0x1013 //RX_FDEQ_BIN_10 +231 0x1719 //RX_FDEQ_BIN_11 +232 0x1B0F //RX_FDEQ_BIN_12 +233 0x141E //RX_FDEQ_BIN_13 +234 0x3728 //RX_FDEQ_BIN_14 +235 0x282C //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x4000 //RX_FDEQ_RESRV_0 +245 0x0320 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0030 //RX_FDDRC_BAND_MARGIN_1 +248 0x0050 //RX_FDDRC_BAND_MARGIN_2 +249 0x0080 //RX_FDDRC_BAND_MARGIN_3 +250 0x0007 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x5000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x6400 //RX_FDDRC_THRD_3_2 +258 0x6400 //RX_FDDRC_THRD_3_3 +259 0x2000 //RX_FDDRC_SLANT_0_0 +260 0x2000 //RX_FDDRC_SLANT_0_1 +261 0x2000 //RX_FDDRC_SLANT_0_2 +262 0x2000 //RX_FDDRC_SLANT_0_3 +263 0x5333 //RX_FDDRC_SLANT_1_0 +264 0x5333 //RX_FDDRC_SLANT_1_1 +265 0x5333 //RX_FDDRC_SLANT_1_2 +266 0x5333 //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +286 0x000A //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 +#VOL 1 +163 0x1000 //RX_TDDRC_ALPHA_UP_1 +164 0x1000 //RX_TDDRC_ALPHA_UP_2 +165 0x1000 //RX_TDDRC_ALPHA_UP_3 +166 0x1000 //RX_TDDRC_ALPHA_UP_4 +184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +190 0x7000 //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +269 0x0001 //RX_TDDRC_THRD_0 +270 0x0002 //RX_TDDRC_THRD_1 +271 0x1800 //RX_TDDRC_THRD_2 +272 0x1800 //RX_TDDRC_THRD_3 +273 0x7FFF //RX_TDDRC_SLANT_0 +274 0x7FFF //RX_TDDRC_SLANT_1 +275 0x1000 //RX_TDDRC_ALPHA_UP_0 +276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x199A //RX_TDDRC_HMNC_GAIN +279 0x0001 //RX_TDDRC_SMT_FLAG +280 0x0CCD //RX_TDDRC_SMT_W +281 0x0551 //RX_TDDRC_DRC_GAIN +195 0x0020 //RX_FDEQ_SUBNUM +196 0x483E //RX_FDEQ_GAIN_0 +197 0x3E3E //RX_FDEQ_GAIN_1 +198 0x3E4C //RX_FDEQ_GAIN_2 +199 0x5064 //RX_FDEQ_GAIN_3 +200 0x7076 //RX_FDEQ_GAIN_4 +201 0x897A //RX_FDEQ_GAIN_5 +202 0x7C80 //RX_FDEQ_GAIN_6 +203 0x8888 //RX_FDEQ_GAIN_7 +204 0x949C //RX_FDEQ_GAIN_8 +205 0x96A4 //RX_FDEQ_GAIN_9 +206 0xA9A0 //RX_FDEQ_GAIN_10 +207 0x9487 //RX_FDEQ_GAIN_11 +208 0x6F64 //RX_FDEQ_GAIN_12 +209 0x625A //RX_FDEQ_GAIN_13 +210 0x5D80 //RX_FDEQ_GAIN_14 +211 0x8890 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0202 //RX_FDEQ_BIN_0 +221 0x0202 //RX_FDEQ_BIN_1 +222 0x0301 //RX_FDEQ_BIN_2 +223 0x0404 //RX_FDEQ_BIN_3 +224 0x0406 //RX_FDEQ_BIN_4 +225 0x0109 //RX_FDEQ_BIN_5 +226 0x0708 //RX_FDEQ_BIN_6 +227 0x090A //RX_FDEQ_BIN_7 +228 0x0B0C //RX_FDEQ_BIN_8 +229 0x0D0E //RX_FDEQ_BIN_9 +230 0x1013 //RX_FDEQ_BIN_10 +231 0x1719 //RX_FDEQ_BIN_11 +232 0x1B0F //RX_FDEQ_BIN_12 +233 0x141E //RX_FDEQ_BIN_13 +234 0x3728 //RX_FDEQ_BIN_14 +235 0x282C //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x4000 //RX_FDEQ_RESRV_0 +245 0x0320 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0030 //RX_FDDRC_BAND_MARGIN_1 +248 0x0050 //RX_FDDRC_BAND_MARGIN_2 +249 0x0080 //RX_FDDRC_BAND_MARGIN_3 +250 0x0007 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x5000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x6400 //RX_FDDRC_THRD_3_2 +258 0x6400 //RX_FDDRC_THRD_3_3 +259 0x2000 //RX_FDDRC_SLANT_0_0 +260 0x2000 //RX_FDDRC_SLANT_0_1 +261 0x2000 //RX_FDDRC_SLANT_0_2 +262 0x2000 //RX_FDDRC_SLANT_0_3 +263 0x5333 //RX_FDDRC_SLANT_1_0 +264 0x5333 //RX_FDDRC_SLANT_1_1 +265 0x5333 //RX_FDDRC_SLANT_1_2 +266 0x5333 //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +286 0x0010 //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 +#VOL 2 +163 0x1000 //RX_TDDRC_ALPHA_UP_1 +164 0x1000 //RX_TDDRC_ALPHA_UP_2 +165 0x1000 //RX_TDDRC_ALPHA_UP_3 +166 0x1000 //RX_TDDRC_ALPHA_UP_4 +184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +190 0x7000 //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +269 0x0001 //RX_TDDRC_THRD_0 +270 0x0002 //RX_TDDRC_THRD_1 +271 0x1800 //RX_TDDRC_THRD_2 +272 0x1800 //RX_TDDRC_THRD_3 +273 0x7FFF //RX_TDDRC_SLANT_0 +274 0x7FFF //RX_TDDRC_SLANT_1 +275 0x1000 //RX_TDDRC_ALPHA_UP_0 +276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x199A //RX_TDDRC_HMNC_GAIN +279 0x0001 //RX_TDDRC_SMT_FLAG +280 0x0CCD //RX_TDDRC_SMT_W +281 0x0551 //RX_TDDRC_DRC_GAIN +195 0x0020 //RX_FDEQ_SUBNUM +196 0x483E //RX_FDEQ_GAIN_0 +197 0x3E3E //RX_FDEQ_GAIN_1 +198 0x3E4C //RX_FDEQ_GAIN_2 +199 0x5064 //RX_FDEQ_GAIN_3 +200 0x7076 //RX_FDEQ_GAIN_4 +201 0x897A //RX_FDEQ_GAIN_5 +202 0x7C80 //RX_FDEQ_GAIN_6 +203 0x8888 //RX_FDEQ_GAIN_7 +204 0x949C //RX_FDEQ_GAIN_8 +205 0x96A4 //RX_FDEQ_GAIN_9 +206 0xA9A0 //RX_FDEQ_GAIN_10 +207 0x9487 //RX_FDEQ_GAIN_11 +208 0x6F64 //RX_FDEQ_GAIN_12 +209 0x625A //RX_FDEQ_GAIN_13 +210 0x5D80 //RX_FDEQ_GAIN_14 +211 0x8890 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0202 //RX_FDEQ_BIN_0 +221 0x0202 //RX_FDEQ_BIN_1 +222 0x0301 //RX_FDEQ_BIN_2 +223 0x0404 //RX_FDEQ_BIN_3 +224 0x0406 //RX_FDEQ_BIN_4 +225 0x0109 //RX_FDEQ_BIN_5 +226 0x0708 //RX_FDEQ_BIN_6 +227 0x090A //RX_FDEQ_BIN_7 +228 0x0B0C //RX_FDEQ_BIN_8 +229 0x0D0E //RX_FDEQ_BIN_9 +230 0x1013 //RX_FDEQ_BIN_10 +231 0x1719 //RX_FDEQ_BIN_11 +232 0x1B0F //RX_FDEQ_BIN_12 +233 0x141E //RX_FDEQ_BIN_13 +234 0x3728 //RX_FDEQ_BIN_14 +235 0x282C //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x4000 //RX_FDEQ_RESRV_0 +245 0x0320 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0030 //RX_FDDRC_BAND_MARGIN_1 +248 0x0050 //RX_FDDRC_BAND_MARGIN_2 +249 0x0080 //RX_FDDRC_BAND_MARGIN_3 +250 0x0007 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x5000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x6400 //RX_FDDRC_THRD_3_2 +258 0x6400 //RX_FDDRC_THRD_3_3 +259 0x2000 //RX_FDDRC_SLANT_0_0 +260 0x2000 //RX_FDDRC_SLANT_0_1 +261 0x2000 //RX_FDDRC_SLANT_0_2 +262 0x2000 //RX_FDDRC_SLANT_0_3 +263 0x5333 //RX_FDDRC_SLANT_1_0 +264 0x5333 //RX_FDDRC_SLANT_1_1 +265 0x5333 //RX_FDDRC_SLANT_1_2 +266 0x5333 //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +286 0x001B //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 +#VOL 3 +163 0x1000 //RX_TDDRC_ALPHA_UP_1 +164 0x1000 //RX_TDDRC_ALPHA_UP_2 +165 0x1000 //RX_TDDRC_ALPHA_UP_3 +166 0x1000 //RX_TDDRC_ALPHA_UP_4 +184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +190 0x7000 //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +269 0x0001 //RX_TDDRC_THRD_0 +270 0x0002 //RX_TDDRC_THRD_1 +271 0x1800 //RX_TDDRC_THRD_2 +272 0x1800 //RX_TDDRC_THRD_3 +273 0x7FFF //RX_TDDRC_SLANT_0 +274 0x7FFF //RX_TDDRC_SLANT_1 +275 0x1000 //RX_TDDRC_ALPHA_UP_0 +276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x199A //RX_TDDRC_HMNC_GAIN +279 0x0001 //RX_TDDRC_SMT_FLAG +280 0x0CCD //RX_TDDRC_SMT_W +281 0x0551 //RX_TDDRC_DRC_GAIN +195 0x0020 //RX_FDEQ_SUBNUM +196 0x483E //RX_FDEQ_GAIN_0 +197 0x3E3E //RX_FDEQ_GAIN_1 +198 0x3E4C //RX_FDEQ_GAIN_2 +199 0x5064 //RX_FDEQ_GAIN_3 +200 0x7076 //RX_FDEQ_GAIN_4 +201 0x897A //RX_FDEQ_GAIN_5 +202 0x7C80 //RX_FDEQ_GAIN_6 +203 0x8888 //RX_FDEQ_GAIN_7 +204 0x949C //RX_FDEQ_GAIN_8 +205 0x96A4 //RX_FDEQ_GAIN_9 +206 0xA9A0 //RX_FDEQ_GAIN_10 +207 0x9487 //RX_FDEQ_GAIN_11 +208 0x6F64 //RX_FDEQ_GAIN_12 +209 0x625A //RX_FDEQ_GAIN_13 +210 0x5D80 //RX_FDEQ_GAIN_14 +211 0x8890 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0202 //RX_FDEQ_BIN_0 +221 0x0202 //RX_FDEQ_BIN_1 +222 0x0301 //RX_FDEQ_BIN_2 +223 0x0404 //RX_FDEQ_BIN_3 +224 0x0406 //RX_FDEQ_BIN_4 +225 0x0109 //RX_FDEQ_BIN_5 +226 0x0708 //RX_FDEQ_BIN_6 +227 0x090A //RX_FDEQ_BIN_7 +228 0x0B0C //RX_FDEQ_BIN_8 +229 0x0D0E //RX_FDEQ_BIN_9 +230 0x1013 //RX_FDEQ_BIN_10 +231 0x1719 //RX_FDEQ_BIN_11 +232 0x1B0F //RX_FDEQ_BIN_12 +233 0x141E //RX_FDEQ_BIN_13 +234 0x3728 //RX_FDEQ_BIN_14 +235 0x282C //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x4000 //RX_FDEQ_RESRV_0 +245 0x0320 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0030 //RX_FDDRC_BAND_MARGIN_1 +248 0x0050 //RX_FDDRC_BAND_MARGIN_2 +249 0x0080 //RX_FDDRC_BAND_MARGIN_3 +250 0x0007 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x5000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x6400 //RX_FDDRC_THRD_3_2 +258 0x6400 //RX_FDDRC_THRD_3_3 +259 0x2000 //RX_FDDRC_SLANT_0_0 +260 0x2000 //RX_FDDRC_SLANT_0_1 +261 0x2000 //RX_FDDRC_SLANT_0_2 +262 0x2000 //RX_FDDRC_SLANT_0_3 +263 0x5333 //RX_FDDRC_SLANT_1_0 +264 0x5333 //RX_FDDRC_SLANT_1_1 +265 0x5333 //RX_FDDRC_SLANT_1_2 +266 0x5333 //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +286 0x0032 //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 +#VOL 4 +163 0x1000 //RX_TDDRC_ALPHA_UP_1 +164 0x1000 //RX_TDDRC_ALPHA_UP_2 +165 0x1000 //RX_TDDRC_ALPHA_UP_3 +166 0x1000 //RX_TDDRC_ALPHA_UP_4 +184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +190 0x7000 //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +269 0x0001 //RX_TDDRC_THRD_0 +270 0x0002 //RX_TDDRC_THRD_1 +271 0x1800 //RX_TDDRC_THRD_2 +272 0x1800 //RX_TDDRC_THRD_3 +273 0x7FFF //RX_TDDRC_SLANT_0 +274 0x7FFF //RX_TDDRC_SLANT_1 +275 0x1000 //RX_TDDRC_ALPHA_UP_0 +276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x199A //RX_TDDRC_HMNC_GAIN +279 0x0001 //RX_TDDRC_SMT_FLAG +280 0x0CCD //RX_TDDRC_SMT_W +281 0x0551 //RX_TDDRC_DRC_GAIN +195 0x0020 //RX_FDEQ_SUBNUM +196 0x483E //RX_FDEQ_GAIN_0 +197 0x3E3E //RX_FDEQ_GAIN_1 +198 0x3E4C //RX_FDEQ_GAIN_2 +199 0x5064 //RX_FDEQ_GAIN_3 +200 0x7076 //RX_FDEQ_GAIN_4 +201 0x897A //RX_FDEQ_GAIN_5 +202 0x7C80 //RX_FDEQ_GAIN_6 +203 0x8888 //RX_FDEQ_GAIN_7 +204 0x949C //RX_FDEQ_GAIN_8 +205 0x96A4 //RX_FDEQ_GAIN_9 +206 0xA9A0 //RX_FDEQ_GAIN_10 +207 0x9487 //RX_FDEQ_GAIN_11 +208 0x6F64 //RX_FDEQ_GAIN_12 +209 0x625A //RX_FDEQ_GAIN_13 +210 0x5D80 //RX_FDEQ_GAIN_14 +211 0x8890 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0202 //RX_FDEQ_BIN_0 +221 0x0202 //RX_FDEQ_BIN_1 +222 0x0301 //RX_FDEQ_BIN_2 +223 0x0404 //RX_FDEQ_BIN_3 +224 0x0406 //RX_FDEQ_BIN_4 +225 0x0109 //RX_FDEQ_BIN_5 +226 0x0708 //RX_FDEQ_BIN_6 +227 0x090A //RX_FDEQ_BIN_7 +228 0x0B0C //RX_FDEQ_BIN_8 +229 0x0D0E //RX_FDEQ_BIN_9 +230 0x1013 //RX_FDEQ_BIN_10 +231 0x1719 //RX_FDEQ_BIN_11 +232 0x1B0F //RX_FDEQ_BIN_12 +233 0x141E //RX_FDEQ_BIN_13 +234 0x3728 //RX_FDEQ_BIN_14 +235 0x282C //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x4000 //RX_FDEQ_RESRV_0 +245 0x0320 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0030 //RX_FDDRC_BAND_MARGIN_1 +248 0x0050 //RX_FDDRC_BAND_MARGIN_2 +249 0x0080 //RX_FDDRC_BAND_MARGIN_3 +250 0x0007 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x5000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x6400 //RX_FDDRC_THRD_3_2 +258 0x6400 //RX_FDDRC_THRD_3_3 +259 0x2000 //RX_FDDRC_SLANT_0_0 +260 0x2000 //RX_FDDRC_SLANT_0_1 +261 0x2000 //RX_FDDRC_SLANT_0_2 +262 0x2000 //RX_FDDRC_SLANT_0_3 +263 0x5333 //RX_FDDRC_SLANT_1_0 +264 0x5333 //RX_FDDRC_SLANT_1_1 +265 0x5333 //RX_FDDRC_SLANT_1_2 +266 0x5333 //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +286 0x0047 //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 +#VOL 5 +163 0x1000 //RX_TDDRC_ALPHA_UP_1 +164 0x1000 //RX_TDDRC_ALPHA_UP_2 +165 0x1000 //RX_TDDRC_ALPHA_UP_3 +166 0x1000 //RX_TDDRC_ALPHA_UP_4 +184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +190 0x7000 //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +269 0x0001 //RX_TDDRC_THRD_0 +270 0x0002 //RX_TDDRC_THRD_1 +271 0x1800 //RX_TDDRC_THRD_2 +272 0x1800 //RX_TDDRC_THRD_3 +273 0x7FFF //RX_TDDRC_SLANT_0 +274 0x7FFF //RX_TDDRC_SLANT_1 +275 0x1000 //RX_TDDRC_ALPHA_UP_0 +276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x199A //RX_TDDRC_HMNC_GAIN +279 0x0001 //RX_TDDRC_SMT_FLAG +280 0x0CCD //RX_TDDRC_SMT_W +281 0x0551 //RX_TDDRC_DRC_GAIN +195 0x0020 //RX_FDEQ_SUBNUM +196 0x483E //RX_FDEQ_GAIN_0 +197 0x3E3E //RX_FDEQ_GAIN_1 +198 0x3E4C //RX_FDEQ_GAIN_2 +199 0x5064 //RX_FDEQ_GAIN_3 +200 0x7076 //RX_FDEQ_GAIN_4 +201 0x897A //RX_FDEQ_GAIN_5 +202 0x7C80 //RX_FDEQ_GAIN_6 +203 0x8888 //RX_FDEQ_GAIN_7 +204 0x949C //RX_FDEQ_GAIN_8 +205 0x96A4 //RX_FDEQ_GAIN_9 +206 0xA9A0 //RX_FDEQ_GAIN_10 +207 0x9487 //RX_FDEQ_GAIN_11 +208 0x6F64 //RX_FDEQ_GAIN_12 +209 0x625A //RX_FDEQ_GAIN_13 +210 0x5D80 //RX_FDEQ_GAIN_14 +211 0x8890 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0202 //RX_FDEQ_BIN_0 +221 0x0202 //RX_FDEQ_BIN_1 +222 0x0301 //RX_FDEQ_BIN_2 +223 0x0404 //RX_FDEQ_BIN_3 +224 0x0406 //RX_FDEQ_BIN_4 +225 0x0109 //RX_FDEQ_BIN_5 +226 0x0708 //RX_FDEQ_BIN_6 +227 0x090A //RX_FDEQ_BIN_7 +228 0x0B0C //RX_FDEQ_BIN_8 +229 0x0D0E //RX_FDEQ_BIN_9 +230 0x1013 //RX_FDEQ_BIN_10 +231 0x1719 //RX_FDEQ_BIN_11 +232 0x1B0F //RX_FDEQ_BIN_12 +233 0x141E //RX_FDEQ_BIN_13 +234 0x3728 //RX_FDEQ_BIN_14 +235 0x282C //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x4000 //RX_FDEQ_RESRV_0 +245 0x0320 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0030 //RX_FDDRC_BAND_MARGIN_1 +248 0x0050 //RX_FDDRC_BAND_MARGIN_2 +249 0x0080 //RX_FDDRC_BAND_MARGIN_3 +250 0x0007 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x5000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x6400 //RX_FDDRC_THRD_3_2 +258 0x6400 //RX_FDDRC_THRD_3_3 +259 0x2000 //RX_FDDRC_SLANT_0_0 +260 0x2000 //RX_FDDRC_SLANT_0_1 +261 0x2000 //RX_FDDRC_SLANT_0_2 +262 0x2000 //RX_FDDRC_SLANT_0_3 +263 0x5333 //RX_FDDRC_SLANT_1_0 +264 0x5333 //RX_FDDRC_SLANT_1_1 +265 0x5333 //RX_FDDRC_SLANT_1_2 +266 0x5333 //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +286 0x0076 //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 +#VOL 6 +163 0x1000 //RX_TDDRC_ALPHA_UP_1 +164 0x1000 //RX_TDDRC_ALPHA_UP_2 +165 0x1000 //RX_TDDRC_ALPHA_UP_3 +166 0x1000 //RX_TDDRC_ALPHA_UP_4 +184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +190 0x7000 //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +269 0x0001 //RX_TDDRC_THRD_0 +270 0x0002 //RX_TDDRC_THRD_1 +271 0x1800 //RX_TDDRC_THRD_2 +272 0x1800 //RX_TDDRC_THRD_3 +273 0x7FFF //RX_TDDRC_SLANT_0 +274 0x7FFF //RX_TDDRC_SLANT_1 +275 0x1000 //RX_TDDRC_ALPHA_UP_0 +276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x199A //RX_TDDRC_HMNC_GAIN +279 0x0001 //RX_TDDRC_SMT_FLAG +280 0x0CCD //RX_TDDRC_SMT_W +281 0x0551 //RX_TDDRC_DRC_GAIN +195 0x0020 //RX_FDEQ_SUBNUM +196 0x483E //RX_FDEQ_GAIN_0 +197 0x3E3E //RX_FDEQ_GAIN_1 +198 0x3E4C //RX_FDEQ_GAIN_2 +199 0x5064 //RX_FDEQ_GAIN_3 +200 0x7076 //RX_FDEQ_GAIN_4 +201 0x897A //RX_FDEQ_GAIN_5 +202 0x7C80 //RX_FDEQ_GAIN_6 +203 0x8888 //RX_FDEQ_GAIN_7 +204 0x949C //RX_FDEQ_GAIN_8 +205 0x96A4 //RX_FDEQ_GAIN_9 +206 0xA9A0 //RX_FDEQ_GAIN_10 +207 0x9487 //RX_FDEQ_GAIN_11 +208 0x6F64 //RX_FDEQ_GAIN_12 +209 0x625A //RX_FDEQ_GAIN_13 +210 0x5D80 //RX_FDEQ_GAIN_14 +211 0x8890 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0202 //RX_FDEQ_BIN_0 +221 0x0202 //RX_FDEQ_BIN_1 +222 0x0301 //RX_FDEQ_BIN_2 +223 0x0404 //RX_FDEQ_BIN_3 +224 0x0406 //RX_FDEQ_BIN_4 +225 0x0109 //RX_FDEQ_BIN_5 +226 0x0708 //RX_FDEQ_BIN_6 +227 0x090A //RX_FDEQ_BIN_7 +228 0x0B0C //RX_FDEQ_BIN_8 +229 0x0D0E //RX_FDEQ_BIN_9 +230 0x1013 //RX_FDEQ_BIN_10 +231 0x1719 //RX_FDEQ_BIN_11 +232 0x1B0F //RX_FDEQ_BIN_12 +233 0x141E //RX_FDEQ_BIN_13 +234 0x3728 //RX_FDEQ_BIN_14 +235 0x282C //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x4000 //RX_FDEQ_RESRV_0 +245 0x0320 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0030 //RX_FDDRC_BAND_MARGIN_1 +248 0x0050 //RX_FDDRC_BAND_MARGIN_2 +249 0x0080 //RX_FDDRC_BAND_MARGIN_3 +250 0x0007 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x5000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x6400 //RX_FDDRC_THRD_3_2 +258 0x6400 //RX_FDDRC_THRD_3_3 +259 0x2000 //RX_FDDRC_SLANT_0_0 +260 0x2000 //RX_FDDRC_SLANT_0_1 +261 0x2000 //RX_FDDRC_SLANT_0_2 +262 0x2000 //RX_FDDRC_SLANT_0_3 +263 0x5333 //RX_FDDRC_SLANT_1_0 +264 0x5333 //RX_FDDRC_SLANT_1_1 +265 0x5333 //RX_FDDRC_SLANT_1_2 +266 0x5333 //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +286 0x0100 //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 + +#CASE_NAME HANDSET-HANDSET-CUSTOM2-SWB +#PARAM_MODE Simple +#PARAM_TYPE TX+2RX +#TOTAL_CUSTOM_STEP 7+7 +#TX +0 0x0000 //TX_OPERATION_MODE_0 +1 0x0000 //TX_OPERATION_MODE_1 +2 0x0076 //TX_PATCH_REG +3 0x6F5E //TX_SENDFUNC_MODE_0 +4 0x0001 //TX_SENDFUNC_MODE_1 +5 0x0002 //TX_NUM_MIC +6 0x0003 //TX_SAMPLINGFREQ_SIG +7 0x0003 //TX_SAMPLINGFREQ_PROC +8 0x000A //TX_FRAME_SZ_SIG +9 0x000A //TX_FRAME_SZ +10 0x0000 //TX_DELAY_OPT +11 0x0028 //TX_MAX_TAIL_LENGTH +12 0x0001 //TX_NUM_LOUTCHN +13 0x0001 //TX_MAXNUM_AECREF +14 0x0000 //TX_DBG_FUNC_REG +15 0x0000 //TX_DBG_FUNC_REG1 +16 0x0000 //TX_SYS_RESRV_0 +17 0x0000 //TX_SYS_RESRV_1 +18 0x0000 //TX_SYS_RESRV_2 +19 0x0000 //TX_SYS_RESRV_3 +20 0x0000 //TX_DIST2REF0 +21 0x00A3 //TX_DIST2REF1 +22 0x0000 //TX_DIST2REF_02 +23 0x0000 //TX_DIST2REF_03 +24 0x0000 //TX_DIST2REF_04 +25 0x0000 //TX_DIST2REF_05 +26 0x0000 //TX_MMIC +27 0x1000 //TX_PGA_0 +28 0x1000 //TX_PGA_1 +29 0x1000 //TX_PGA_2 +30 0x0000 //TX_PGA_3 +31 0x0000 //TX_PGA_4 +32 0x0000 //TX_PGA_5 +33 0x0000 //TX_MIC_PAIRS +34 0x0000 //TX_MIC_PAIRS_HS +35 0x0002 //TX_MICS_FOR_BF +36 0x0000 //TX_MIC_PAIRS_FORL1 +37 0x0002 //TX_MICS_OF_PAIR0 +38 0x0002 //TX_MICS_OF_PAIR1 +39 0x0002 //TX_MICS_OF_PAIR2 +40 0x0002 //TX_MICS_OF_PAIR3 +41 0x0000 //TX_MIC_DATA_SRC0 +42 0x0002 //TX_MIC_DATA_SRC1 +43 0x0001 //TX_MIC_DATA_SRC2 +44 0x0000 //TX_MIC_DATA_SRC3 +45 0x0000 //TX_MIC_PAIR_CH_04 +46 0x0000 //TX_MIC_PAIR_CH_05 +47 0x0000 //TX_MIC_PAIR_CH_10 +48 0x0000 //TX_MIC_PAIR_CH_11 +49 0x0000 //TX_MIC_PAIR_CH_12 +50 0x0000 //TX_MIC_PAIR_CH_13 +51 0x0000 //TX_MIC_PAIR_CH_14 +52 0x05DC //TX_HD_BIN_MASK +53 0x0010 //TX_HD_SUBAND_MASK +54 0x19A1 //TX_HD_FRAME_AVG_MASK +55 0x0320 //TX_HD_MIN_FRQ +56 0x1000 //TX_HD_ALPHA_PSD +57 0x1100 //TX_T_PHPR1 +58 0x0000 //TX_T_PHPR2 +59 0x0000 //TX_T_PTPR +60 0x0000 //TX_T_PNPR +61 0x0000 //TX_T_PAPR1 +62 0xEE6C //TX_T_PSDVAT +63 0x0800 //TX_CNT +64 0x4000 //TX_ANTI_HOWL_GAIN +65 0x0001 //TX_MICFORBFMARK_0 +66 0x0001 //TX_MICFORBFMARK_1 +67 0x0001 //TX_MICFORBFMARK_2 +68 0x0001 //TX_MICFORBFMARK_3 +69 0x0001 //TX_MICFORBFMARK_4 +70 0x0001 //TX_MICFORBFMARK_5 +71 0x0000 //TX_DIST2REF_10 +72 0x3A66 //TX_DIST2REF_11 +73 0x0000 //TX_DIST2REF2 +74 0x0000 //TX_DIST2REF_13 +75 0x0000 //TX_DIST2REF_14 +76 0x0000 //TX_DIST2REF_15 +77 0x0000 //TX_DIST2REF_20 +78 0x0000 //TX_DIST2REF_21 +79 0x0000 //TX_DIST2REF_22 +80 0x0000 //TX_DIST2REF_23 +81 0x0000 //TX_DIST2REF_24 +82 0x0000 //TX_DIST2REF_25 +83 0x0000 //TX_DIST2REF_30 +84 0x0000 //TX_DIST2REF_31 +85 0x0000 //TX_DIST2REF_32 +86 0x0000 //TX_DIST2REF_33 +87 0x0000 //TX_DIST2REF_34 +88 0x0000 //TX_DIST2REF_35 +89 0x0000 //TX_MIC_LOC_00 +90 0x0000 //TX_MIC_LOC_01 +91 0x0000 //TX_MIC_LOC_02 +92 0x0000 //TX_MIC_LOC_03 +93 0x0000 //TX_MIC_LOC_04 +94 0x0000 //TX_MIC_LOC_05 +95 0x0000 //TX_MIC_LOC_10 +96 0x0000 //TX_MIC_LOC_11 +97 0x0000 //TX_MIC_LOC_12 +98 0x0000 //TX_MIC_LOC_13 +99 0x0000 //TX_MIC_LOC_14 +100 0x0000 //TX_MIC_LOC_15 +101 0x0000 //TX_MIC_LOC_20 +102 0x0000 //TX_MIC_LOC_21 +103 0x0000 //TX_MIC_LOC_22 +104 0x0000 //TX_MIC_LOC_23 +105 0x0000 //TX_MIC_LOC_24 +106 0x0000 //TX_MIC_LOC_25 +107 0x0200 //TX_MIC_REFBLK_VOLUME +108 0x0AAC //TX_MIC_BLOCK_VOLUME +109 0x0000 //TX_INVERSE_MASK +110 0x0000 //TX_ADCS_MASK +111 0x04D0 //TX_ADCS_GAIN +112 0x4000 //TX_NFC_GAINFAC +113 0x0000 //TX_MAINMIC_BLKFACTOR +114 0x0000 //TX_REFMIC_BLKFACTOR +115 0x0000 //TX_BLMIC_BLKFACTOR +116 0x0000 //TX_BRMIC_BLKFACTOR +117 0x0031 //TX_MICBLK_START_BIN +118 0x0060 //TX_MICBLK_END_BIN +119 0x0015 //TX_MICBLK_FE_HOLD +120 0xFFF2 //TX_MICBLK_MR_EXP_TH +121 0xFFF2 //TX_MICBLK_LR_EXP_TH +122 0x0000 //TX_FENE_HOLD +123 0x4000 //TX_FE_ENER_TH_MTS +124 0x0004 //TX_FE_ENER_TH_EXP +125 0x6000 //TX_C_POST_FLT_MIC_MAINBLK +126 0x6000 //TX_C_POST_FLT_MIC_REFBLK +127 0x0010 //TX_MIC_BLOCK_N +128 0x7E56 //TX_A_HP +129 0x4000 //TX_B_PE +130 0x1800 //TX_THR_PITCH_DET_0 +131 0x1000 //TX_THR_PITCH_DET_1 +132 0x0800 //TX_THR_PITCH_DET_2 +133 0x0008 //TX_PITCH_BFR_LEN +134 0x0003 //TX_SBD_PITCH_DET +135 0x0050 //TX_TD_AEC_L +136 0x4000 //TX_MU0_UNP_TD_AEC +137 0x1000 //TX_MU0_PTD_TD_AEC +138 0x0000 //TX_PP_RESRV_0 +139 0x2A94 //TX_PP_RESRV_1 +140 0x55F0 //TX_PP_RESRV_2 +141 0x0000 //TX_PP_RESRV_3 +142 0x0000 //TX_PP_RESRV_4 +143 0x0000 //TX_PP_RESRV_5 +144 0x0000 //TX_PP_RESRV_6 +145 0x0000 //TX_PP_RESRV_7 +146 0x0028 //TX_TAIL_LENGTH +147 0x0080 //TX_AEC_REF_GAIN_0 +148 0x0800 //TX_AEC_REF_GAIN_1 +149 0x0800 //TX_AEC_REF_GAIN_2 +150 0x7900 //TX_EAD_THR +151 0x2000 //TX_THR_RE_EST +152 0x0400 //TX_MIN_EQ_RE_EST_0 +153 0x0400 //TX_MIN_EQ_RE_EST_1 +154 0x0800 //TX_MIN_EQ_RE_EST_2 +155 0x0800 //TX_MIN_EQ_RE_EST_3 +156 0x1000 //TX_MIN_EQ_RE_EST_4 +157 0x1000 //TX_MIN_EQ_RE_EST_5 +158 0x1000 //TX_MIN_EQ_RE_EST_6 +159 0x1000 //TX_MIN_EQ_RE_EST_7 +160 0x1000 //TX_MIN_EQ_RE_EST_8 +161 0x1000 //TX_MIN_EQ_RE_EST_9 +162 0x1000 //TX_MIN_EQ_RE_EST_10 +163 0x1000 //TX_MIN_EQ_RE_EST_11 +164 0x1000 //TX_MIN_EQ_RE_EST_12 +165 0x3000 //TX_LAMBDA_RE_EST +166 0x1000 //TX_LAMBDA_CB_NLE +167 0x1800 //TX_C_POST_FLT +168 0x4000 //TX_GAIN_NP +169 0x003C //TX_SE_HOLD_N +170 0x0046 //TX_DT_HOLD_N +171 0x03E8 //TX_DT2_HOLD_N +172 0x6666 //TX_AEC_RESRV_0 +173 0x0000 //TX_AEC_RESRV_1 +174 0x0014 //TX_AEC_RESRV_2 +175 0x0000 //TX_MIC_DELAY_LENGTH +176 0x0000 //TX_REF_DELAY_LENGTH +177 0x0000 //TX_ADD_LINEIN_GAINL +178 0x0000 //TX_ADD_LINEIN_GAINH +179 0x0000 //TX_MIN_EQ_RE_EST_14 +180 0x0000 //TX_DTD_THR1_8 +181 0x7FFF //TX_DTD_THR2_8 +182 0x0000 //TX_DTD_MIC_BLK2 +183 0x0008 //TX_FRQ_LIN_LEN +184 0x7FFF //TX_FRQ_AEC_LEN_RHO +185 0x6000 //TX_MU0_UNP_FRQ_AEC +186 0x4000 //TX_MU0_PTD_FRQ_AEC +187 0x000A //TX_MINENOISETH +188 0x0800 //TX_MU0_RE_EST +189 0x0001 //TX_AEC_NUM_CH +190 0x0000 //TX_BIGECHOATTENUATION_MAX +191 0x2000 //TX_A_POST_FLT_MICBLK +192 0x0000 //TX_BLKENERTH +193 0x0000 //TX_BLKENERHIGHTH +194 0x0000 //TX_NORMENERTH +195 0x0000 //TX_NORMENERHIGHTH +196 0x0000 //TX_NORMENERHIGHTHL +197 0x7000 //TX_DTD_THR1_0 +198 0x7000 //TX_DTD_THR1_1 +199 0x7000 //TX_DTD_THR1_2 +200 0x7F00 //TX_DTD_THR1_3 +201 0x7F00 //TX_DTD_THR1_4 +202 0x7F00 //TX_DTD_THR1_5 +203 0x7F00 //TX_DTD_THR1_6 +204 0x2000 //TX_DTD_THR2_0 +205 0x2000 //TX_DTD_THR2_1 +206 0x2000 //TX_DTD_THR2_2 +207 0x1000 //TX_DTD_THR2_3 +208 0x1000 //TX_DTD_THR2_4 +209 0x1000 //TX_DTD_THR2_5 +210 0x1000 //TX_DTD_THR2_6 +211 0x6000 //TX_DTD_THR3 +212 0x0177 //TX_SPK_CUT_K +213 0x1B58 //TX_DT_CUT_K +214 0x0100 //TX_DT_CUT_THR +215 0x04EB //TX_COMFORT_G +216 0x01F4 //TX_POWER_YOUT_TH +217 0x4000 //TX_FDPFGAINECHO +218 0x0000 //TX_DTD_HD_THR +219 0x0000 //TX_SPK_CUT_K_S +220 0x0000 //TX_DTD_MIC_BLK +221 0x0400 //TX_ADPT_STRICT_L +222 0x0200 //TX_ADPT_STRICT_H +223 0x0C00 //TX_RATIO_DT_L_TH_LOW +224 0x2000 //TX_RATIO_DT_H_TH_LOW +225 0x1800 //TX_RATIO_DT_L_TH_HIGH +226 0x3000 //TX_RATIO_DT_H_TH_HIGH +227 0x0A00 //TX_RATIO_DT_L0_TH +228 0x7000 //TX_B_POST_FILT_ECHO_L +229 0x7FFF //TX_B_POST_FILT_ECHO_H +230 0x0200 //TX_MIN_G_CTRL_ECHO +231 0x7FFF //TX_B_LESSCUT_RTO_ECHO +232 0x0000 //TX_EPD_OFFSET_00 +233 0x0000 //TX_EPD_OFFST_01 +234 0x1388 //TX_RATIO_DT_L0_TH_HIGH +235 0x3A98 //TX_RATIO_DT_H_TH_CUT +236 0x7FFF //TX_MIN_EQ_RE_EST_13 +237 0x0000 //TX_DTD_THR1_7 +238 0x0000 //TX_DTD_THR2_7 +239 0x0800 //TX_DT_RESRV_7 +240 0x0800 //TX_DT_RESRV_8 +241 0x0000 //TX_DT_RESRV_9 +242 0xF600 //TX_THR_SN_EST_0 +243 0xFA00 //TX_THR_SN_EST_1 +244 0xFA00 //TX_THR_SN_EST_2 +245 0xF800 //TX_THR_SN_EST_3 +246 0xF800 //TX_THR_SN_EST_4 +247 0xF800 //TX_THR_SN_EST_5 +248 0xF800 //TX_THR_SN_EST_6 +249 0xF700 //TX_THR_SN_EST_7 +250 0x0000 //TX_DELTA_THR_SN_EST_0 +251 0x0200 //TX_DELTA_THR_SN_EST_1 +252 0x0200 //TX_DELTA_THR_SN_EST_2 +253 0x0200 //TX_DELTA_THR_SN_EST_3 +254 0x0100 //TX_DELTA_THR_SN_EST_4 +255 0x0200 //TX_DELTA_THR_SN_EST_5 +256 0x0100 //TX_DELTA_THR_SN_EST_6 +257 0x0200 //TX_DELTA_THR_SN_EST_7 +258 0x4000 //TX_LAMBDA_NN_EST_0 +259 0x4000 //TX_LAMBDA_NN_EST_1 +260 0x4000 //TX_LAMBDA_NN_EST_2 +261 0x4000 //TX_LAMBDA_NN_EST_3 +262 0x4000 //TX_LAMBDA_NN_EST_4 +263 0x4000 //TX_LAMBDA_NN_EST_5 +264 0x4000 //TX_LAMBDA_NN_EST_6 +265 0x4000 //TX_LAMBDA_NN_EST_7 +266 0x0400 //TX_N_SN_EST +267 0x001E //TX_INBEAM_T +268 0x0041 //TX_INBEAMHOLDT +269 0x2000 //TX_G_STRICT +270 0x2000 //TX_EQ_THR_BF +271 0x799A //TX_LAMBDA_EQ_BF +272 0x1000 //TX_NE_RTO_TH +273 0x1000 //TX_NE_RTO_TH_L +274 0x1000 //TX_MAINREFRTOH_TH_H +275 0x0600 //TX_MAINREFRTOH_TH_L +276 0x2000 //TX_MAINREFRTO_TH_H +277 0x1400 //TX_MAINREFRTO_TH_L +278 0x0000 //TX_MAINREFRTO_TH_EQ +279 0x1000 //TX_B_POST_FLT_0 +280 0x1000 //TX_B_POST_FLT_1 +281 0x0014 //TX_NS_LVL_CTRL_0 +282 0x002C //TX_NS_LVL_CTRL_1 +283 0x0016 //TX_NS_LVL_CTRL_2 +284 0x0018 //TX_NS_LVL_CTRL_3 +285 0x0016 //TX_NS_LVL_CTRL_4 +286 0x0012 //TX_NS_LVL_CTRL_5 +287 0x0016 //TX_NS_LVL_CTRL_6 +288 0x0017 //TX_NS_LVL_CTRL_7 +289 0x000E //TX_MIN_GAIN_S_0 +290 0x000D //TX_MIN_GAIN_S_1 +291 0x0012 //TX_MIN_GAIN_S_2 +292 0x0010 //TX_MIN_GAIN_S_3 +293 0x0012 //TX_MIN_GAIN_S_4 +294 0x0012 //TX_MIN_GAIN_S_5 +295 0x0012 //TX_MIN_GAIN_S_6 +296 0x0012 //TX_MIN_GAIN_S_7 +297 0x6000 //TX_NMOS_SUP +298 0x0000 //TX_NS_MAX_PRI_SNR_TH +299 0x0000 //TX_NMOS_SUP_MENSA +300 0x7FFF //TX_SNRI_SUP_0 +301 0x6000 //TX_SNRI_SUP_1 +302 0x6000 //TX_SNRI_SUP_2 +303 0x6000 //TX_SNRI_SUP_3 +304 0x6000 //TX_SNRI_SUP_4 +305 0x6000 //TX_SNRI_SUP_5 +306 0x6000 //TX_SNRI_SUP_6 +307 0x6000 //TX_SNRI_SUP_7 +308 0x6000 //TX_THR_LFNS +309 0x0017 //TX_G_LFNS +310 0x09C4 //TX_GAIN0_NTH +311 0x000A //TX_MUSIC_MORENS +312 0x7FFF //TX_A_POST_FILT_0 +313 0x2000 //TX_A_POST_FILT_1 +314 0x4000 //TX_A_POST_FILT_S_0 +315 0x4000 //TX_A_POST_FILT_S_1 +316 0x4000 //TX_A_POST_FILT_S_2 +317 0x4000 //TX_A_POST_FILT_S_3 +318 0x4000 //TX_A_POST_FILT_S_4 +319 0x4000 //TX_A_POST_FILT_S_5 +320 0x5000 //TX_A_POST_FILT_S_6 +321 0x7000 //TX_A_POST_FILT_S_7 +322 0x1000 //TX_B_POST_FILT_0 +323 0x1000 //TX_B_POST_FILT_1 +324 0x2000 //TX_B_POST_FILT_2 +325 0x2000 //TX_B_POST_FILT_3 +326 0x2000 //TX_B_POST_FILT_4 +327 0x1000 //TX_B_POST_FILT_5 +328 0x3000 //TX_B_POST_FILT_6 +329 0x3000 //TX_B_POST_FILT_7 +330 0x1000 //TX_B_LESSCUT_RTO_S_0 +331 0x1000 //TX_B_LESSCUT_RTO_S_1 +332 0x1000 //TX_B_LESSCUT_RTO_S_2 +333 0x1000 //TX_B_LESSCUT_RTO_S_3 +334 0x1000 //TX_B_LESSCUT_RTO_S_4 +335 0x1000 //TX_B_LESSCUT_RTO_S_5 +336 0x1000 //TX_B_LESSCUT_RTO_S_6 +337 0x1000 //TX_B_LESSCUT_RTO_S_7 +338 0x7E14 //TX_LAMBDA_PFILT +339 0x7C29 //TX_LAMBDA_PFILT_S_0 +340 0x7C29 //TX_LAMBDA_PFILT_S_1 +341 0x7C29 //TX_LAMBDA_PFILT_S_2 +342 0x7C29 //TX_LAMBDA_PFILT_S_3 +343 0x7C29 //TX_LAMBDA_PFILT_S_4 +344 0x7C29 //TX_LAMBDA_PFILT_S_5 +345 0x7C29 //TX_LAMBDA_PFILT_S_6 +346 0x7C29 //TX_LAMBDA_PFILT_S_7 +347 0x07D0 //TX_K_PEPPER +348 0x0800 //TX_A_PEPPER +349 0x1D4C //TX_K_PEPPER_HF +350 0x0400 //TX_A_PEPPER_HF +351 0x0001 //TX_HMNC_BST_FLG +352 0x4000 //TX_HMNC_BST_THR +353 0x0800 //TX_DT_BINVAD_TH_0 +354 0x0800 //TX_DT_BINVAD_TH_1 +355 0x0800 //TX_DT_BINVAD_TH_2 +356 0x0800 //TX_DT_BINVAD_TH_3 +357 0x0000 //TX_DT_BINVAD_ENDF +358 0x1000 //TX_C_POST_FLT_DT +359 0x7FFF //TX_NS_B_POST_FLT_LESSCUT +360 0x0100 //TX_DT_BOOST +361 0x0000 //TX_BF_SGRAD_FLG +362 0x0005 //TX_BF_DVG_TH +363 0x001E //TX_SN_C_F +364 0x0000 //TX_K_APT +365 0x0001 //TX_NOISEDET +366 0x0190 //TX_NDETCT +367 0x000A //TX_NOISE_TH_0 +368 0x7FFF //TX_NOISE_TH_0_2 +369 0x7FFF //TX_NOISE_TH_0_3 +370 0x00C6 //TX_NOISE_TH_1 +371 0x0DAC //TX_NOISE_TH_2 +372 0x2260 //TX_NOISE_TH_3 +373 0x7080 //TX_NOISE_TH_4 +374 0x57E4 //TX_NOISE_TH_5 +375 0x4BD6 //TX_NOISE_TH_5_2 +376 0x0001 //TX_NOISE_TH_5_3 +377 0x4E20 //TX_NOISE_TH_5_4 +378 0x1194 //TX_NOISE_TH_6 +379 0x0014 //TX_MINENOISE_TH +380 0xD508 //TX_MORENS_TFMASK_TH +381 0x0001 //TX_DRC_QUIET_FLOOR +382 0x6D60 //TX_RATIODTL_CUT_TH +383 0x0DAC //TX_DT_CUT_K1 +384 0x00A5 //TX_OUT_ENER_S_TH_CLEAN +385 0x00A5 //TX_OUT_ENER_S_TH_LESSCLEAN +386 0x00A5 //TX_OUT_ENER_S_TH_NOISY +387 0x0029 //TX_OUT_ENER_TH_NOISE +388 0x0200 //TX_OUT_ENER_TH_SPEECH +389 0x2000 //TX_SN_NPB_GAIN +390 0x0000 //TX_NN_NPB_GAIN +391 0x3000 //TX_POST_MASK_SUP_HSNE +392 0x07D0 //TX_TAIL_DET_TH +393 0x4000 //TX_B_LESSCUT_RTO_WTA +394 0x0000 //TX_MEL_G_R +395 0x0080 //TX_SUPHIGH_TH +396 0x0000 //TX_MASK_G_R +397 0x0002 //TX_EXTRA_NS_L +398 0x1800 //TX_C_POST_FLT_MASK +399 0x7FFF //TX_A_POST_FLT_WNS +400 0x0148 //TX_MIN_G_LOW300HZ +401 0x0004 //TX_MAXLEVEL_CNG +402 0x00B4 //TX_STN_NOISE_TH +403 0x4000 //TX_POST_MASK_SUP +404 0x7FFF //TX_POST_MASK_ADJUST +405 0x00C8 //TX_NS_ENOISE_MIC0_TH +406 0x0014 //TX_MINENOISE_MIC0_TH +407 0x012C //TX_MINENOISE_MIC0_S_TH +408 0x2900 //TX_MIN_G_CTRL_SSNS +409 0x0800 //TX_METAL_RTO_THR +410 0x0FA0 //TX_NS_FP_K_METAL +411 0x3A98 //TX_NOISEDET_BOOST_TH +412 0x0FA0 //TX_NSMOOTH_TH +413 0x0000 //TX_NS_RESRV_8 +414 0x1800 //TX_RHO_UPB +415 0x2328 //TX_N_HOLD_HS +416 0x006E //TX_N_RHO_BFR0 +417 0x7FFF //TX_LAMBDA_ARSP_EST +418 0x0100 //TX_EXTRA_GAIN_MICBLOCK +419 0x0333 //TX_THR_STD_NSR +420 0x019A //TX_THR_STD_PLH +421 0x03E8 //TX_N_HOLD_STD +422 0x0066 //TX_THR_STD_RHO +423 0x2800 //TX_BF_RESET_THR_HS +424 0x0CCD //TX_SB_RTO_MEAN_TH +425 0x0300 //TX_SB_RHO_MEAN_TH_NTALK +426 0x2000 //TX_SB_RTO_MEAN_TH_ABN +427 0x2EE0 //TX_SB_RTO_MEAN_TH_RUB +428 0x0990 //TX_WTA_EN_RTO_TH +429 0x1400 //TX_TOP_ENER_TH_F +430 0x0100 //TX_DESIRED_TALK_HOLDT +431 0x0800 //TX_MIC_BLOCK_FACTOR +432 0x0000 //TX_NSEST_BFRLRNRDC +433 0x0000 //TX_THR_POST_FLT_HS +434 0x0010 //TX_HS_VAD_BIN +435 0x2666 //TX_THR_VAD_HS +436 0x2CCD //TX_MEAN_RTO_MIN_TH2 +437 0x0032 //TX_SILENCE_T +438 0x0000 //TX_A_POST_FLT_WTA +439 0x799A //TX_LAMBDA_PFLT_WTA +440 0x051E //TX_SB_RHO_MEAN2_TH +441 0x02F0 //TX_SB_RHO_MEAN3_TH +442 0x0000 //TX_HS_RESRV_4 +443 0x0000 //TX_HS_RESRV_5 +444 0x0001 //TX_DOA_VAD_THR_1 +445 0x003C //TX_DOA_VAD_THR_2 +446 0x0028 //TX_DOA_VAD_THR1_0 +447 0x0028 //TX_DOA_VAD_THR1_1 +448 0x0000 //TX_SRC_DOA_RNG_LOW_0A +449 0x001E //TX_SRC_DOA_RNG_HIGH_0A +450 0x005A //TX_DFLT_SRC_DOA_0A +451 0x0000 //TX_SRC_DOA_RNG_LOW_0B +452 0x0000 //TX_SRC_DOA_RNG_HIGH_0B +453 0x0000 //TX_DFLT_SRC_DOA_0B +454 0x0000 //TX_SRC_DOA_RNG_LOW_0C +455 0x0000 //TX_SRC_DOA_RNG_HIGH_0C +456 0x0000 //TX_DFLT_SRC_DOA_0C +457 0x0000 //TX_SRC_DOA_RNG_LOW_0D +458 0x0000 //TX_SRC_DOA_RNG_HIGH_0D +459 0x0000 //TX_DFLT_SRC_DOA_0D +460 0x0000 //TX_SRC_DOA_RNG_LOW_1A +461 0x00B4 //TX_SRC_DOA_RNG_HIGH_1A +462 0x005A //TX_DFLT_SRC_DOA_1A +463 0x0000 //TX_SRC_DOA_RNG_LOW_1B +464 0x00B4 //TX_SRC_DOA_RNG_HIGH_1B +465 0x005A //TX_DFLT_SRC_DOA_1B +466 0x0000 //TX_SRC_DOA_RNG_LOW_1C +467 0x00B4 //TX_SRC_DOA_RNG_HIGH_1C +468 0x005A //TX_DFLT_SRC_DOA_1C +469 0x0000 //TX_SRC_DOA_RNG_LOW_1D +470 0x00B4 //TX_SRC_DOA_RNG_HIGH_1D +471 0x005A //TX_DFLT_SRC_DOA_1D +472 0x0100 //TX_BF_HOLDOFF_T +473 0x7FFF //TX_DOA_COST_FACTOR +474 0x0D9A //TX_MAINTOREFR_TH0 +475 0x071C //TX_DOA_TRK_THR +476 0x012C //TX_DOA_TRACK_HT +477 0x0200 //TX_N1_HOLD_HF +478 0x0100 //TX_N2_HOLD_HF +479 0x2A3D //TX_BF_RESET_THR_HF +480 0x7333 //TX_DOA_SMOOTH +481 0x0800 //TX_MU_BF +482 0x0800 //TX_BF_MU_LF_B2 +483 0x0040 //TX_BF_FC_END_BIN_B2 +484 0x0020 //TX_BF_FC_END_BIN +485 0x0000 //TX_HF_RESRV_25 +486 0x0000 //TX_HF_RESRV_26 +487 0x0007 //TX_N_DOA_SEED +488 0x0001 //TX_FINE_DOA_SEARCH_FLG +489 0x0000 //TX_HF_RESRV_27 +490 0x038E //TX_DLT_SRC_DOA_RNG +491 0x0200 //TX_BF_MU_LF +492 0x0000 //TX_DFLT_SRC_LOC_0 +493 0x7FFF //TX_DFLT_SRC_LOC_1 +494 0x0000 //TX_DFLT_SRC_LOC_2 +495 0x038E //TX_DOA_TRACK_VADTH +496 0x0000 //TX_DOA_TRACK_NEW +497 0x0300 //TX_NOR_OFF_THR +498 0x7C00 //TX_MORE_ON_700HZ_THR +499 0x2000 //TX_MU_BF_ADPT_NS +500 0x0000 //TX_ADAPT_LEN +501 0x6666 //TX_MORE_SNS +502 0x0000 //TX_NOR_OFF_TH1 +503 0x0000 //TX_WIDE_MASK_TH +504 0xD333 //TX_SUBSNRATIOHIGH4MEANBCK_THR +505 0x6000 //TX_C_POST_FLT_CUT +506 0x2000 //TX_RADIODTLV +507 0x0320 //TX_POWER_LINEIN_TH +508 0x0014 //TX_FE_VADCOUNT_TH_FC +509 0x0000 //TX_ECHO_SUPP_FC +510 0x0C80 //TX_ECHO_TH +511 0x6666 //TX_MIC_TO_BFGAIN +512 0x0000 //TX_MICTOBFGAIN0 +513 0x0000 //TX_FASTMUE_TH +514 0x2CCC //TX_DEREVERB_LF_MU +515 0x3200 //TX_DEREVERB_HF_MU +516 0x0007 //TX_DEREVERB_DELAY +517 0x0004 //TX_DEREVERB_COEF_LEN +518 0x0003 //TX_DEREVERB_DNR +519 0x0000 //TX_DEREVERB_ALPHA +520 0x0000 //TX_DEREVERB_BETA +521 0x3A98 //TX_GSC_RTOL_TH +522 0x3A98 //TX_GSC_RTOH_TH +523 0x7E2C //TX_WIDE2_MEANHTH +524 0x0000 //TX_DR_RESRV_5 +525 0x0000 //TX_DR_RESRV_6 +526 0x0000 //TX_DR_RESRV_7 +527 0x0000 //TX_DR_RESRV_8 +528 0x1333 //TX_WIND_MARK_TH +529 0x399A //TX_CORR_THR +530 0x0004 //TX_SNR_THR +531 0x0010 //TX_ENGY_THR +532 0x1770 //TX_CORR_HIGH_TH +533 0x6000 //TX_ENGY_THR_2 +534 0x3400 //TX_MEAN_RTO_THR +535 0x0028 //TX_WNS_ENOISE_MIC0_TH +536 0x3000 //TX_RATIOMICL_TH +537 0x7FFF //TX_CALIG_HS +538 0x0000 //TX_LVL_CTRL +539 0x0010 //TX_WIND_SUPRTO +540 0x0014 //TX_WNS_MIN_G +541 0x0600 //TX_WNS_B_POST_FLT +542 0x3000 //TX_RATIOMICH_TH +543 0xD120 //TX_WIND_INBEAM_L_TH +544 0x0FA0 //TX_WIND_INBEAM_H_TH +545 0x2000 //TX_WNS_RESRV_0 +546 0x59D8 //TX_WNS_RESRV_1 +547 0x0200 //TX_WNS_RESRV_2 +548 0x0000 //TX_WNS_RESRV_3 +549 0x0000 //TX_WNS_RESRV_4 +550 0x0000 //TX_WNS_RESRV_5 +551 0x0000 //TX_WNS_RESRV_6 +552 0x0000 //TX_PB_B_POST_FLT_LESSCUT +553 0x0070 //TX_BF_LESSCUT_BBIN +554 0x0070 //TX_BF_LESSCUT_EBIN +555 0x0010 //TX_POSTBFB0 +556 0x0070 //TX_POSTBFB +557 0x00B0 //TX_POSTBFE +558 0x0E66 //TX_SPEECH_SNR_TH +559 0x0050 //TX_PB_MAX_PRI_SNR_TH +560 0x770A //TX_MAX_PRI_SNR_TH_L +561 0x0000 //TX_PFGAIN +562 0x0000 //TX_MAINTOREFR_TH +563 0x0000 //TX_SAM_MARK +564 0x0000 //TX_PB_RESRV_0 +565 0x0000 //TX_PB_RESRV_1 +566 0x0030 //TX_FDEQ_SUBNUM +567 0x5C58 //TX_FDEQ_GAIN_0 +568 0x5048 //TX_FDEQ_GAIN_1 +569 0x4C4C //TX_FDEQ_GAIN_2 +570 0x494D //TX_FDEQ_GAIN_3 +571 0x4442 //TX_FDEQ_GAIN_4 +572 0x444C //TX_FDEQ_GAIN_5 +573 0x5053 //TX_FDEQ_GAIN_6 +574 0x6248 //TX_FDEQ_GAIN_7 +575 0x434A //TX_FDEQ_GAIN_8 +576 0x4B4D //TX_FDEQ_GAIN_9 +577 0x4C4B //TX_FDEQ_GAIN_10 +578 0x4E4A //TX_FDEQ_GAIN_11 +579 0x4842 //TX_FDEQ_GAIN_12 +580 0x4C44 //TX_FDEQ_GAIN_13 +581 0x3A4A //TX_FDEQ_GAIN_14 +582 0x6478 //TX_FDEQ_GAIN_15 +583 0x5848 //TX_FDEQ_GAIN_16 +584 0x4848 //TX_FDEQ_GAIN_17 +585 0x4848 //TX_FDEQ_GAIN_18 +586 0x4848 //TX_FDEQ_GAIN_19 +587 0x4848 //TX_FDEQ_GAIN_20 +588 0x4848 //TX_FDEQ_GAIN_21 +589 0x4848 //TX_FDEQ_GAIN_22 +590 0x4848 //TX_FDEQ_GAIN_23 +591 0x0202 //TX_FDEQ_BIN_0 +592 0x0104 //TX_FDEQ_BIN_1 +593 0x0502 //TX_FDEQ_BIN_2 +594 0x0202 //TX_FDEQ_BIN_3 +595 0x0504 //TX_FDEQ_BIN_4 +596 0x0708 //TX_FDEQ_BIN_5 +597 0x0808 //TX_FDEQ_BIN_6 +598 0x050E //TX_FDEQ_BIN_7 +599 0x0B0C //TX_FDEQ_BIN_8 +600 0x0F0F //TX_FDEQ_BIN_9 +601 0x0E0D //TX_FDEQ_BIN_10 +602 0x0F28 //TX_FDEQ_BIN_11 +603 0x110F //TX_FDEQ_BIN_12 +604 0x350F //TX_FDEQ_BIN_13 +605 0x1924 //TX_FDEQ_BIN_14 +606 0x1810 //TX_FDEQ_BIN_15 +607 0x1021 //TX_FDEQ_BIN_16 +608 0x1000 //TX_FDEQ_BIN_17 +609 0x0000 //TX_FDEQ_BIN_18 +610 0x0000 //TX_FDEQ_BIN_19 +611 0x0000 //TX_FDEQ_BIN_20 +612 0x0000 //TX_FDEQ_BIN_21 +613 0x0000 //TX_FDEQ_BIN_22 +614 0x0000 //TX_FDEQ_BIN_23 +615 0x0000 //TX_FDEQ_PADDING +616 0x0030 //TX_PREEQ_SUBNUM_MIC0 +617 0x4848 //TX_PREEQ_GAIN_MIC0_0 +618 0x4848 //TX_PREEQ_GAIN_MIC0_1 +619 0x4848 //TX_PREEQ_GAIN_MIC0_2 +620 0x4848 //TX_PREEQ_GAIN_MIC0_3 +621 0x4848 //TX_PREEQ_GAIN_MIC0_4 +622 0x4848 //TX_PREEQ_GAIN_MIC0_5 +623 0x4848 //TX_PREEQ_GAIN_MIC0_6 +624 0x4848 //TX_PREEQ_GAIN_MIC0_7 +625 0x4848 //TX_PREEQ_GAIN_MIC0_8 +626 0x4848 //TX_PREEQ_GAIN_MIC0_9 +627 0x4848 //TX_PREEQ_GAIN_MIC0_10 +628 0x4848 //TX_PREEQ_GAIN_MIC0_11 +629 0x4848 //TX_PREEQ_GAIN_MIC0_12 +630 0x4848 //TX_PREEQ_GAIN_MIC0_13 +631 0x4848 //TX_PREEQ_GAIN_MIC0_14 +632 0x4848 //TX_PREEQ_GAIN_MIC0_15 +633 0x4848 //TX_PREEQ_GAIN_MIC0_16 +634 0x4848 //TX_PREEQ_GAIN_MIC0_17 +635 0x4848 //TX_PREEQ_GAIN_MIC0_18 +636 0x4848 //TX_PREEQ_GAIN_MIC0_19 +637 0x4848 //TX_PREEQ_GAIN_MIC0_20 +638 0x4848 //TX_PREEQ_GAIN_MIC0_21 +639 0x4848 //TX_PREEQ_GAIN_MIC0_22 +640 0x4848 //TX_PREEQ_GAIN_MIC0_23 +641 0x251A //TX_PREEQ_BIN_MIC0_0 +642 0x0F0F //TX_PREEQ_BIN_MIC0_1 +643 0x0C0C //TX_PREEQ_BIN_MIC0_2 +644 0x0C0F //TX_PREEQ_BIN_MIC0_3 +645 0x0F0F //TX_PREEQ_BIN_MIC0_4 +646 0x0F09 //TX_PREEQ_BIN_MIC0_5 +647 0x0909 //TX_PREEQ_BIN_MIC0_6 +648 0x0908 //TX_PREEQ_BIN_MIC0_7 +649 0x070F //TX_PREEQ_BIN_MIC0_8 +650 0x1F08 //TX_PREEQ_BIN_MIC0_9 +651 0x0808 //TX_PREEQ_BIN_MIC0_10 +652 0x0920 //TX_PREEQ_BIN_MIC0_11 +653 0x2020 //TX_PREEQ_BIN_MIC0_12 +654 0x2021 //TX_PREEQ_BIN_MIC0_13 +655 0x0000 //TX_PREEQ_BIN_MIC0_14 +656 0x0000 //TX_PREEQ_BIN_MIC0_15 +657 0x0000 //TX_PREEQ_BIN_MIC0_16 +658 0x0000 //TX_PREEQ_BIN_MIC0_17 +659 0x0000 //TX_PREEQ_BIN_MIC0_18 +660 0x0000 //TX_PREEQ_BIN_MIC0_19 +661 0x0000 //TX_PREEQ_BIN_MIC0_20 +662 0x0000 //TX_PREEQ_BIN_MIC0_21 +663 0x0000 //TX_PREEQ_BIN_MIC0_22 +664 0x0000 //TX_PREEQ_BIN_MIC0_23 +665 0x0030 //TX_PREEQ_SUBNUM_MIC1 +666 0x4848 //TX_PREEQ_GAIN_MIC1_0 +667 0x4848 //TX_PREEQ_GAIN_MIC1_1 +668 0x4848 //TX_PREEQ_GAIN_MIC1_2 +669 0x4848 //TX_PREEQ_GAIN_MIC1_3 +670 0x4848 //TX_PREEQ_GAIN_MIC1_4 +671 0x4848 //TX_PREEQ_GAIN_MIC1_5 +672 0x494A //TX_PREEQ_GAIN_MIC1_6 +673 0x4B4C //TX_PREEQ_GAIN_MIC1_7 +674 0x4D4E //TX_PREEQ_GAIN_MIC1_8 +675 0x4F52 //TX_PREEQ_GAIN_MIC1_9 +676 0x5355 //TX_PREEQ_GAIN_MIC1_10 +677 0x585C //TX_PREEQ_GAIN_MIC1_11 +678 0x616A //TX_PREEQ_GAIN_MIC1_12 +679 0x726E //TX_PREEQ_GAIN_MIC1_13 +680 0x5C48 //TX_PREEQ_GAIN_MIC1_14 +681 0x3B38 //TX_PREEQ_GAIN_MIC1_15 +682 0x4848 //TX_PREEQ_GAIN_MIC1_16 +683 0x4848 //TX_PREEQ_GAIN_MIC1_17 +684 0x4848 //TX_PREEQ_GAIN_MIC1_18 +685 0x4848 //TX_PREEQ_GAIN_MIC1_19 +686 0x4848 //TX_PREEQ_GAIN_MIC1_20 +687 0x4848 //TX_PREEQ_GAIN_MIC1_21 +688 0x4848 //TX_PREEQ_GAIN_MIC1_22 +689 0x4848 //TX_PREEQ_GAIN_MIC1_23 +690 0x0202 //TX_PREEQ_BIN_MIC1_0 +691 0x0203 //TX_PREEQ_BIN_MIC1_1 +692 0x0303 //TX_PREEQ_BIN_MIC1_2 +693 0x0304 //TX_PREEQ_BIN_MIC1_3 +694 0x0405 //TX_PREEQ_BIN_MIC1_4 +695 0x0506 //TX_PREEQ_BIN_MIC1_5 +696 0x0708 //TX_PREEQ_BIN_MIC1_6 +697 0x090A //TX_PREEQ_BIN_MIC1_7 +698 0x0B0C //TX_PREEQ_BIN_MIC1_8 +699 0x0D0E //TX_PREEQ_BIN_MIC1_9 +700 0x1013 //TX_PREEQ_BIN_MIC1_10 +701 0x1719 //TX_PREEQ_BIN_MIC1_11 +702 0x1B1E //TX_PREEQ_BIN_MIC1_12 +703 0x1E1E //TX_PREEQ_BIN_MIC1_13 +704 0x1E28 //TX_PREEQ_BIN_MIC1_14 +705 0x3042 //TX_PREEQ_BIN_MIC1_15 +706 0x0000 //TX_PREEQ_BIN_MIC1_16 +707 0x0000 //TX_PREEQ_BIN_MIC1_17 +708 0x0000 //TX_PREEQ_BIN_MIC1_18 +709 0x0000 //TX_PREEQ_BIN_MIC1_19 +710 0x0000 //TX_PREEQ_BIN_MIC1_20 +711 0x0000 //TX_PREEQ_BIN_MIC1_21 +712 0x0000 //TX_PREEQ_BIN_MIC1_22 +713 0x0000 //TX_PREEQ_BIN_MIC1_23 +714 0x0030 //TX_PREEQ_SUBNUM_MIC2 +715 0x4848 //TX_PREEQ_GAIN_MIC2_0 +716 0x4848 //TX_PREEQ_GAIN_MIC2_1 +717 0x4848 //TX_PREEQ_GAIN_MIC2_2 +718 0x4848 //TX_PREEQ_GAIN_MIC2_3 +719 0x4848 //TX_PREEQ_GAIN_MIC2_4 +720 0x4848 //TX_PREEQ_GAIN_MIC2_5 +721 0x4848 //TX_PREEQ_GAIN_MIC2_6 +722 0x4848 //TX_PREEQ_GAIN_MIC2_7 +723 0x4848 //TX_PREEQ_GAIN_MIC2_8 +724 0x4848 //TX_PREEQ_GAIN_MIC2_9 +725 0x4848 //TX_PREEQ_GAIN_MIC2_10 +726 0x4848 //TX_PREEQ_GAIN_MIC2_11 +727 0x4848 //TX_PREEQ_GAIN_MIC2_12 +728 0x4848 //TX_PREEQ_GAIN_MIC2_13 +729 0x4848 //TX_PREEQ_GAIN_MIC2_14 +730 0x4848 //TX_PREEQ_GAIN_MIC2_15 +731 0x4848 //TX_PREEQ_GAIN_MIC2_16 +732 0x4848 //TX_PREEQ_GAIN_MIC2_17 +733 0x4848 //TX_PREEQ_GAIN_MIC2_18 +734 0x4848 //TX_PREEQ_GAIN_MIC2_19 +735 0x4848 //TX_PREEQ_GAIN_MIC2_20 +736 0x4848 //TX_PREEQ_GAIN_MIC2_21 +737 0x4848 //TX_PREEQ_GAIN_MIC2_22 +738 0x4848 //TX_PREEQ_GAIN_MIC2_23 +739 0x0608 //TX_PREEQ_BIN_MIC2_0 +740 0x0808 //TX_PREEQ_BIN_MIC2_1 +741 0x0808 //TX_PREEQ_BIN_MIC2_2 +742 0x0808 //TX_PREEQ_BIN_MIC2_3 +743 0x0808 //TX_PREEQ_BIN_MIC2_4 +744 0x0808 //TX_PREEQ_BIN_MIC2_5 +745 0x0808 //TX_PREEQ_BIN_MIC2_6 +746 0x0808 //TX_PREEQ_BIN_MIC2_7 +747 0x0808 //TX_PREEQ_BIN_MIC2_8 +748 0x0808 //TX_PREEQ_BIN_MIC2_9 +749 0x0808 //TX_PREEQ_BIN_MIC2_10 +750 0x0808 //TX_PREEQ_BIN_MIC2_11 +751 0x0808 //TX_PREEQ_BIN_MIC2_12 +752 0x0808 //TX_PREEQ_BIN_MIC2_13 +753 0x0808 //TX_PREEQ_BIN_MIC2_14 +754 0x0200 //TX_PREEQ_BIN_MIC2_15 +755 0x0000 //TX_PREEQ_BIN_MIC2_16 +756 0x0000 //TX_PREEQ_BIN_MIC2_17 +757 0x0000 //TX_PREEQ_BIN_MIC2_18 +758 0x0000 //TX_PREEQ_BIN_MIC2_19 +759 0x0000 //TX_PREEQ_BIN_MIC2_20 +760 0x0000 //TX_PREEQ_BIN_MIC2_21 +761 0x0000 //TX_PREEQ_BIN_MIC2_22 +762 0x0000 //TX_PREEQ_BIN_MIC2_23 +763 0x0006 //TX_MASKING_ABILITY +764 0x0800 //TX_NND_WEIGHT +765 0x0050 //TX_MIC_CALIBRATION_0 +766 0x0056 //TX_MIC_CALIBRATION_1 +767 0x0050 //TX_MIC_CALIBRATION_2 +768 0x0050 //TX_MIC_CALIBRATION_3 +769 0x0046 //TX_MIC_PWR_BIAS_0 +770 0x0042 //TX_MIC_PWR_BIAS_1 +771 0x0046 //TX_MIC_PWR_BIAS_2 +772 0x0046 //TX_MIC_PWR_BIAS_3 +773 0x0000 //TX_GAIN_LIMIT_0 +774 0x0006 //TX_GAIN_LIMIT_1 +775 0x0000 //TX_GAIN_LIMIT_2 +776 0x0000 //TX_GAIN_LIMIT_3 +777 0x7F5B //TX_BVE_NOVAD0_ALPHADOWN +778 0x7FDE //TX_BVE_VAD0_ALPHAUP +779 0x7F3A //TX_BVE_VAD0_ALPHADOWN +780 0x2000 //TX_BVE_GAINWEIGHT_NOFEVADLI +781 0x7F5B //TX_BVE_FEVADLI_ALPHA +782 0x7F19 //TX_BVE_NOVAD0_ALPHAUP +783 0x1000 //TX_TDDRC_ALPHA_UP_01 +784 0x1000 //TX_TDDRC_ALPHA_UP_02 +785 0x1000 //TX_TDDRC_ALPHA_UP_03 +786 0x1000 //TX_TDDRC_ALPHA_UP_04 +787 0x7EB8 //TX_TDDRC_ALPHA_DWN_01 +788 0x7EB8 //TX_TDDRC_ALPHA_DWN_02 +789 0x7EB8 //TX_TDDRC_ALPHA_DWN_03 +790 0x7EB8 //TX_TDDRC_ALPHA_DWN_04 +791 0x7FFF //TX_TDDRC_TD_DRC_LIMIT +792 0x0800 //TX_TDDRC_POST_LIMIT_GAIN +793 0x0000 //TX_TDDRC_RESRV_0 +794 0x0000 //TX_TDDRC_RESRV_1 +795 0x0018 //TX_FDDRC_BAND_MARGIN_0 +796 0x0030 //TX_FDDRC_BAND_MARGIN_1 +797 0x0050 //TX_FDDRC_BAND_MARGIN_2 +798 0x0080 //TX_FDDRC_BAND_MARGIN_3 +799 0x0007 //TX_FDDRC_BLOCK_EXP +800 0x5000 //TX_FDDRC_THRD_2_0 +801 0x5000 //TX_FDDRC_THRD_2_1 +802 0x5000 //TX_FDDRC_THRD_2_2 +803 0x5000 //TX_FDDRC_THRD_2_3 +804 0x6400 //TX_FDDRC_THRD_3_0 +805 0x6400 //TX_FDDRC_THRD_3_1 +806 0x6400 //TX_FDDRC_THRD_3_2 +807 0x6400 //TX_FDDRC_THRD_3_3 +808 0x2000 //TX_FDDRC_SLANT_0_0 +809 0x2000 //TX_FDDRC_SLANT_0_1 +810 0x2000 //TX_FDDRC_SLANT_0_2 +811 0x2000 //TX_FDDRC_SLANT_0_3 +812 0x5333 //TX_FDDRC_SLANT_1_0 +813 0x5333 //TX_FDDRC_SLANT_1_1 +814 0x5333 //TX_FDDRC_SLANT_1_2 +815 0x5333 //TX_FDDRC_SLANT_1_3 +816 0x0010 //TX_DEADMIC_SILENCE_TH +817 0x0600 //TX_MIC_DEGRADE_TH +818 0x0078 //TX_DEADMIC_CNT +819 0x0078 //TX_MIC_DEGRADE_CNT +820 0x0000 //TX_FDDRC_RESRV_4 +821 0x0000 //TX_FDDRC_RESRV_5 +822 0x0000 //TX_FDDRC_RESRV_6 +823 0x7FFF //TX_KS_NOISEPASTE_FACTOR +824 0x0001 //TX_KS_CONFIG +825 0x7FFF //TX_KS_GAIN_MIN +826 0x0000 //TX_KS_RESRV_0 +827 0x0000 //TX_KS_RESRV_1 +828 0x0000 //TX_KS_RESRV_2 +829 0x7C00 //TX_LAMBDA_PKA_FP +830 0x2000 //TX_TPKA_FP +831 0x0080 //TX_MIN_G_FP +832 0x2000 //TX_MAX_G_FP +833 0x0FA0 //TX_FFP_FP_K_METAL +834 0x4000 //TX_A_POST_FLT_FP +835 0x0F5C //TX_RTO_OUTBEAM_TH +836 0x4CCD //TX_TPKA_FP_THD +837 0x0000 //TX_MAX_G_FP_BLK +838 0x0000 //TX_FFP_FADEIN +839 0x0000 //TX_FFP_FADEOUT +840 0x0000 //TX_WHISPERCTH +841 0x0000 //TX_WHISPERHOLDT +842 0x0000 //TX_WHISP_ENTHH +843 0x0000 //TX_WHISP_ENTHL +844 0x0000 //TX_WHISP_RTOTH +845 0x0000 //TX_WHISP_RTOTH2 +846 0x0096 //TX_MUTE_PERIOD +847 0x0000 //TX_FADE_IN_PERIOD +848 0x0100 //TX_FFP_RESRV_2 +849 0x0020 //TX_FFP_RESRV_3 +850 0x0000 //TX_FFP_RESRV_4 +851 0x0000 //TX_FFP_RESRV_5 +852 0x0000 //TX_FFP_RESRV_6 +853 0x0002 //TX_FILTINDX +854 0x0002 //TX_TDDRC_THRD_0 +855 0x0003 //TX_TDDRC_THRD_1 +856 0x1500 //TX_TDDRC_THRD_2 +857 0x1500 //TX_TDDRC_THRD_3 +858 0x3000 //TX_TDDRC_SLANT_0 +859 0x6E00 //TX_TDDRC_SLANT_1 +860 0x1000 //TX_TDDRC_ALPHA_UP_00 +861 0x7EB8 //TX_TDDRC_ALPHA_DWN_00 +862 0x0000 //TX_TDDRC_HMNC_FLAG +863 0x199A //TX_TDDRC_HMNC_GAIN +864 0x0000 //TX_TDDRC_SMT_FLAG +865 0x0CCD //TX_TDDRC_SMT_W +866 0x06EC //TX_TDDRC_DRC_GAIN +867 0x7FFF //TX_TDDRC_LMT_THRD +868 0x0000 //TX_TDDRC_LMT_ALPHA +869 0x0000 //TX_TFMASKLTH +870 0x0000 //TX_TFMASKLTHL +871 0x0CCD //TX_TFMASKHTH +872 0xECCD //TX_TFMASKLTH_BINVAD +873 0xFCCD //TX_TFMASKLTH_NS_EST +874 0xF800 //TX_TFMASKLTH_DOA +875 0x0CCD //TX_TFMASKTH_BLESSCUT +876 0x1000 //TX_B_LESSCUT_RTO_MASK +877 0x2000 //TX_SB_RHO_MEAN_TH_ABN +878 0x2000 //TX_B_POST_FLT_MASK +879 0x0000 //TX_B_POST_FLT_MASK1 +880 0x6333 //TX_GAIN_WIND_MASK +881 0x0000 //TX_TFMASK_BFSTRICT_MUSIC +882 0x0000 //TX_TFMASK_BFSTRICT_NOMUSIC +883 0x7333 //TX_FASTNS_OUTIN_TH +884 0x0CCD //TX_FASTNS_TFMASK_TH +885 0x0CCD //TX_FASTNS_TFMASKBIN_TH1 +886 0x0CCD //TX_FASTNS_TFMASKBIN_TH2 +887 0x0CCD //TX_FASTNS_TFMASKBIN_TH3 +888 0x0028 //TX_FASTNS_ARSPC_TH +889 0xC000 //TX_FASTNS_MASK5_TH +890 0x0810 //TX_POSTSSA_MIN_G_VR_MASK +891 0x1000 //TX_A_LESSCUT_RTO_MASK +892 0x1770 //TX_FASTNS_NOISETH +893 0xC000 //TX_FASTNS_SSA_THLFL +894 0xC000 //TX_FASTNS_SSA_THHFL +895 0xCCCC //TX_FASTNS_SSA_THLFH +896 0xD999 //TX_FASTNS_SSA_THHFH +897 0x2339 //TX_SENDFUNC_REG_MICMUTE +898 0x0021 //TX_SENDFUNC_REG_MICMUTE1 +899 0x02BC //TX_MICMUTE_RATIO_THR +900 0x0140 //TX_MICMUTE_AMP_THR +901 0x0004 //TX_MICMUTE_HPF_IND +902 0x00C0 //TX_MICMUTE_LOG_EYR_TH +903 0x0008 //TX_MICMUTE_CVG_TIME +904 0x0008 //TX_MICMUTE_RELEASE_TIME +905 0x01FE //TX_MIC_VOLUME_MIC0MUTE +906 0x0020 //TX_MICMUTE_EPD_OFFSET_0 +907 0x001E //TX_MICMUTE_FRQ_AEC_L +908 0x7999 //TX_MICMUTE_EAD_THR +909 0x7FFF //TX_MICMUTE_LAMBDA_CB_NLE +910 0x7FFF //TX_MICMUTE_LAMBDA_RE_EST +911 0x4000 //TX_DTD_THR1_MICMUTE_0 +912 0x7000 //TX_DTD_THR1_MICMUTE_1 +913 0x7FFF //TX_DTD_THR1_MICMUTE_2 +914 0x7FFF //TX_DTD_THR1_MICMUTE_3 +915 0x6CCC //TX_DTD_THR2_MICMUTE_0 +916 0x0400 //TX_MICMUTE_MIN_EQ_RE_EST_0 +917 0x0400 //TX_MICMUTE_MIN_EQ_RE_EST_1 +918 0x1000 //TX_MICMUTE_MIN_EQ_RE_EST_2 +919 0x7FFF //TX_MICMUTE_MIN_EQ_RE_EST_3 +920 0x7FFF //TX_MICMUTE_MIN_EQ_RE_EST_4 +921 0x4000 //TX_MICMUTE_C_POST_FLT +922 0x03E8 //TX_MICMUTE_DT_CUT_K +923 0x0001 //TX_MICMUTE_DT_CUT_THR +924 0x03E8 //TX_MICMUTE_DT_CUT_K2 +925 0x0001 //TX_MICMUTE_DT_CUT_THR2 +926 0x0064 //TX_MICMUTE_DT2_HOLD_N +927 0x1000 //TX_MICMUTE_RATIODTH_THCUT +928 0x1000 //TX_MICMUTE_B_POST_FLT_ECHOL +929 0x7FFF //TX_MICMUTE_B_POST_FLT_ECHOH +930 0x0400 //TX_MICMUTE_C_POST_FLT_MASK +931 0x7999 //TX_MICMUTE_RATIODTL_CUT_TH +932 0x0258 //TX_MICMUTE_DT_CUT_K1 +933 0x0800 //TX_MICMUTE_N2_SN_EST +934 0xFC00 //TX_MICMUTE_THR_SN_EST_0 +935 0x001C //TX_MICMUTE_MIN_G_CTRL_0 +936 0x6000 //TX_MICMUTE_A_POST_FILT_S_0 +937 0x7000 //TX_MICMUTE_B_POST_FILT_0 +938 0x2710 //TX_MIC1RUB_AMP_THR +939 0x0010 //TX_MIC1MUTE_RATIO_THR +940 0x0450 //TX_MIC1MUTE_AMP_THR +941 0x0008 //TX_MIC1MUTE_CVG_TIME +942 0x0008 //TX_MIC1MUTE_RELEASE_TIME +943 0x0000 //TX_AMS_RESRV_01 +944 0x0000 //TX_AMS_RESRV_02 +945 0x0000 //TX_AMS_RESRV_03 +946 0x0000 //TX_AMS_RESRV_04 +947 0x0000 //TX_AMS_RESRV_05 +948 0x0000 //TX_AMS_RESRV_06 +949 0x0000 //TX_AMS_RESRV_07 +950 0x0000 //TX_AMS_RESRV_08 +951 0x0000 //TX_AMS_RESRV_09 +952 0x0000 //TX_AMS_RESRV_10 +953 0x0000 //TX_AMS_RESRV_11 +954 0x0000 //TX_AMS_RESRV_12 +955 0x0000 //TX_AMS_RESRV_13 +956 0x0000 //TX_AMS_RESRV_14 +957 0x0000 //TX_AMS_RESRV_15 +958 0x0000 //TX_AMS_RESRV_16 +959 0x0000 //TX_AMS_RESRV_17 +960 0x0000 //TX_AMS_RESRV_18 +961 0x0000 //TX_AMS_RESRV_19 +#RX +0 0x203C //RX_RECVFUNC_MODE_0 +1 0x0000 //RX_RECVFUNC_MODE_1 +2 0x0003 //RX_SAMPLINGFREQ_SIG +3 0x0003 //RX_SAMPLINGFREQ_PROC +4 0x000A //RX_FRAME_SZ +5 0x0000 //RX_DELAY_OPT +6 0x1000 //RX_TDDRC_ALPHA_UP_1 +7 0x1000 //RX_TDDRC_ALPHA_UP_2 +8 0x1000 //RX_TDDRC_ALPHA_UP_3 +9 0x1000 //RX_TDDRC_ALPHA_UP_4 +10 0x05AA //RX_PGA +11 0x7FFF //RX_A_HP +12 0x4000 //RX_B_PE +13 0x5800 //RX_THR_PITCH_DET_0 +14 0x5000 //RX_THR_PITCH_DET_1 +15 0x4000 //RX_THR_PITCH_DET_2 +16 0x0008 //RX_PITCH_BFR_LEN +17 0x0003 //RX_SBD_PITCH_DET +18 0x0100 //RX_PP_RESRV_0 +19 0x0020 //RX_PP_RESRV_1 +20 0x0600 //RX_N_SN_EST +21 0x000C //RX_N2_SN_EST +22 0x000F //RX_NS_LVL_CTRL +23 0xF800 //RX_THR_SN_EST +24 0x7E00 //RX_LAMBDA_PFILT +25 0x000A //RX_FENS_RESRV_0 +26 0x0190 //RX_FENS_RESRV_1 +27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +30 0x0002 //RX_EXTRA_NS_L +31 0x0800 //RX_EXTRA_NS_A +32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +33 0x7000 //RX_TDDRC_LIMITER_THRD +34 0x0800 //RX_TDDRC_LIMITER_GAIN +35 0x199A //RX_A_POST_FLT +36 0x0000 //RX_LMT_THRD +37 0x4000 //RX_LMT_ALPHA +38 0x0020 //RX_FDEQ_SUBNUM +39 0x483E //RX_FDEQ_GAIN_0 +40 0x3E3E //RX_FDEQ_GAIN_1 +41 0x3E4A //RX_FDEQ_GAIN_2 +42 0x5464 //RX_FDEQ_GAIN_3 +43 0x7072 //RX_FDEQ_GAIN_4 +44 0x8576 //RX_FDEQ_GAIN_5 +45 0x7880 //RX_FDEQ_GAIN_6 +46 0x8888 //RX_FDEQ_GAIN_7 +47 0x949C //RX_FDEQ_GAIN_8 +48 0x96A4 //RX_FDEQ_GAIN_9 +49 0xA994 //RX_FDEQ_GAIN_10 +50 0x9487 //RX_FDEQ_GAIN_11 +51 0x6F64 //RX_FDEQ_GAIN_12 +52 0x625A //RX_FDEQ_GAIN_13 +53 0x5D80 //RX_FDEQ_GAIN_14 +54 0x8890 //RX_FDEQ_GAIN_15 +55 0x4848 //RX_FDEQ_GAIN_16 +56 0x4848 //RX_FDEQ_GAIN_17 +57 0x4848 //RX_FDEQ_GAIN_18 +58 0x4848 //RX_FDEQ_GAIN_19 +59 0x4848 //RX_FDEQ_GAIN_20 +60 0x4848 //RX_FDEQ_GAIN_21 +61 0x4848 //RX_FDEQ_GAIN_22 +62 0x4848 //RX_FDEQ_GAIN_23 +63 0x0202 //RX_FDEQ_BIN_0 +64 0x0202 //RX_FDEQ_BIN_1 +65 0x0301 //RX_FDEQ_BIN_2 +66 0x0503 //RX_FDEQ_BIN_3 +67 0x0406 //RX_FDEQ_BIN_4 +68 0x0109 //RX_FDEQ_BIN_5 +69 0x0708 //RX_FDEQ_BIN_6 +70 0x090A //RX_FDEQ_BIN_7 +71 0x0B0C //RX_FDEQ_BIN_8 +72 0x0D0E //RX_FDEQ_BIN_9 +73 0x1013 //RX_FDEQ_BIN_10 +74 0x1719 //RX_FDEQ_BIN_11 +75 0x1B0F //RX_FDEQ_BIN_12 +76 0x141E //RX_FDEQ_BIN_13 +77 0x3728 //RX_FDEQ_BIN_14 +78 0x282C //RX_FDEQ_BIN_15 +79 0x0000 //RX_FDEQ_BIN_16 +80 0x0000 //RX_FDEQ_BIN_17 +81 0x0000 //RX_FDEQ_BIN_18 +82 0x0000 //RX_FDEQ_BIN_19 +83 0x0000 //RX_FDEQ_BIN_20 +84 0x0000 //RX_FDEQ_BIN_21 +85 0x0000 //RX_FDEQ_BIN_22 +86 0x0000 //RX_FDEQ_BIN_23 +87 0x4000 //RX_FDEQ_RESRV_0 +88 0x0320 //RX_FDEQ_RESRV_1 +89 0x0018 //RX_FDDRC_BAND_MARGIN_0 +90 0x0030 //RX_FDDRC_BAND_MARGIN_1 +91 0x0050 //RX_FDDRC_BAND_MARGIN_2 +92 0x0080 //RX_FDDRC_BAND_MARGIN_3 +93 0x0007 //RX_FDDRC_BLOCK_EXP +94 0x5000 //RX_FDDRC_THRD_2_0 +95 0x5000 //RX_FDDRC_THRD_2_1 +96 0x5000 //RX_FDDRC_THRD_2_2 +97 0x5000 //RX_FDDRC_THRD_2_3 +98 0x6400 //RX_FDDRC_THRD_3_0 +99 0x6400 //RX_FDDRC_THRD_3_1 +100 0x6400 //RX_FDDRC_THRD_3_2 +101 0x6400 //RX_FDDRC_THRD_3_3 +102 0x2000 //RX_FDDRC_SLANT_0_0 +103 0x2000 //RX_FDDRC_SLANT_0_1 +104 0x2000 //RX_FDDRC_SLANT_0_2 +105 0x2000 //RX_FDDRC_SLANT_0_3 +106 0x5333 //RX_FDDRC_SLANT_1_0 +107 0x5333 //RX_FDDRC_SLANT_1_1 +108 0x5333 //RX_FDDRC_SLANT_1_2 +109 0x5333 //RX_FDDRC_SLANT_1_3 +110 0x0000 //RX_FDDRC_RESRV_0 +111 0x0002 //RX_FILTINDX +112 0x0001 //RX_TDDRC_THRD_0 +113 0x0002 //RX_TDDRC_THRD_1 +114 0x1800 //RX_TDDRC_THRD_2 +115 0x1800 //RX_TDDRC_THRD_3 +116 0x7FFF //RX_TDDRC_SLANT_0 +117 0x7FFF //RX_TDDRC_SLANT_1 +118 0x1000 //RX_TDDRC_ALPHA_UP_0 +119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +120 0x0000 //RX_TDDRC_HMNC_FLAG +121 0x199A //RX_TDDRC_HMNC_GAIN +122 0x0001 //RX_TDDRC_SMT_FLAG +123 0x0CCD //RX_TDDRC_SMT_W +124 0x057F //RX_TDDRC_DRC_GAIN +125 0x7C00 //RX_LAMBDA_PKA_FP +126 0x13E0 //RX_TPKA_FP +127 0x0080 //RX_MIN_G_FP +128 0x2000 //RX_MAX_G_FP +129 0x0100 //RX_SPK_VOL +130 0x0000 //RX_VOL_RESRV_0 +131 0x0000 //RX_MAXLEVEL_CNG +132 0x3000 //RX_BWE_UV_TH +133 0x3000 //RX_BWE_UV_TH2 +134 0x1800 //RX_BWE_UV_TH3 +135 0x1000 //RX_BWE_V_TH +136 0x04CD //RX_BWE_GAIN1_V_TH1 +137 0x0F33 //RX_BWE_GAIN1_V_TH2 +138 0x7333 //RX_BWE_UV_EQ +139 0x199A //RX_BWE_V_EQ +140 0x7333 //RX_BWE_TONE_TH +141 0x0004 //RX_BWE_UV_HOLD_T +142 0x6CCD //RX_BWE_GAIN2_ALPHA +143 0x799A //RX_BWE_GAIN3_ALPHA +144 0x001E //RX_BWE_CUTOFF +145 0x3000 //RX_BWE_GAINFILL +146 0x3200 //RX_BWE_MAXTH_TONE +147 0x2000 //RX_BWE_EQ_0 +148 0x2000 //RX_BWE_EQ_1 +149 0x2000 //RX_BWE_EQ_2 +150 0x2000 //RX_BWE_EQ_3 +151 0x2000 //RX_BWE_EQ_4 +152 0x2000 //RX_BWE_EQ_5 +153 0x2000 //RX_BWE_EQ_6 +154 0x0000 //RX_BWE_RESRV_0 +155 0x0000 //RX_BWE_RESRV_1 +156 0x0000 //RX_BWE_RESRV_2 +#VOL 0 +6 0x1000 //RX_TDDRC_ALPHA_UP_1 +7 0x1000 //RX_TDDRC_ALPHA_UP_2 +8 0x1000 //RX_TDDRC_ALPHA_UP_3 +9 0x1000 //RX_TDDRC_ALPHA_UP_4 +27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +33 0x7000 //RX_TDDRC_LIMITER_THRD +34 0x0800 //RX_TDDRC_LIMITER_GAIN +112 0x0001 //RX_TDDRC_THRD_0 +113 0x0002 //RX_TDDRC_THRD_1 +114 0x1800 //RX_TDDRC_THRD_2 +115 0x1800 //RX_TDDRC_THRD_3 +116 0x7FFF //RX_TDDRC_SLANT_0 +117 0x7FFF //RX_TDDRC_SLANT_1 +118 0x1000 //RX_TDDRC_ALPHA_UP_0 +119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +120 0x0000 //RX_TDDRC_HMNC_FLAG +121 0x199A //RX_TDDRC_HMNC_GAIN +122 0x0001 //RX_TDDRC_SMT_FLAG +123 0x0CCD //RX_TDDRC_SMT_W +124 0x057F //RX_TDDRC_DRC_GAIN +38 0x0020 //RX_FDEQ_SUBNUM +39 0x483E //RX_FDEQ_GAIN_0 +40 0x3E3E //RX_FDEQ_GAIN_1 +41 0x3E4A //RX_FDEQ_GAIN_2 +42 0x5464 //RX_FDEQ_GAIN_3 +43 0x7072 //RX_FDEQ_GAIN_4 +44 0x8576 //RX_FDEQ_GAIN_5 +45 0x7880 //RX_FDEQ_GAIN_6 +46 0x8888 //RX_FDEQ_GAIN_7 +47 0x949C //RX_FDEQ_GAIN_8 +48 0x96A4 //RX_FDEQ_GAIN_9 +49 0xA994 //RX_FDEQ_GAIN_10 +50 0x9487 //RX_FDEQ_GAIN_11 +51 0x6F64 //RX_FDEQ_GAIN_12 +52 0x625A //RX_FDEQ_GAIN_13 +53 0x5D80 //RX_FDEQ_GAIN_14 +54 0x8890 //RX_FDEQ_GAIN_15 +55 0x4848 //RX_FDEQ_GAIN_16 +56 0x4848 //RX_FDEQ_GAIN_17 +57 0x4848 //RX_FDEQ_GAIN_18 +58 0x4848 //RX_FDEQ_GAIN_19 +59 0x4848 //RX_FDEQ_GAIN_20 +60 0x4848 //RX_FDEQ_GAIN_21 +61 0x4848 //RX_FDEQ_GAIN_22 +62 0x4848 //RX_FDEQ_GAIN_23 +63 0x0202 //RX_FDEQ_BIN_0 +64 0x0202 //RX_FDEQ_BIN_1 +65 0x0301 //RX_FDEQ_BIN_2 +66 0x0503 //RX_FDEQ_BIN_3 +67 0x0406 //RX_FDEQ_BIN_4 +68 0x0109 //RX_FDEQ_BIN_5 +69 0x0708 //RX_FDEQ_BIN_6 +70 0x090A //RX_FDEQ_BIN_7 +71 0x0B0C //RX_FDEQ_BIN_8 +72 0x0D0E //RX_FDEQ_BIN_9 +73 0x1013 //RX_FDEQ_BIN_10 +74 0x1719 //RX_FDEQ_BIN_11 +75 0x1B0F //RX_FDEQ_BIN_12 +76 0x141E //RX_FDEQ_BIN_13 +77 0x3728 //RX_FDEQ_BIN_14 +78 0x282C //RX_FDEQ_BIN_15 +79 0x0000 //RX_FDEQ_BIN_16 +80 0x0000 //RX_FDEQ_BIN_17 +81 0x0000 //RX_FDEQ_BIN_18 +82 0x0000 //RX_FDEQ_BIN_19 +83 0x0000 //RX_FDEQ_BIN_20 +84 0x0000 //RX_FDEQ_BIN_21 +85 0x0000 //RX_FDEQ_BIN_22 +86 0x0000 //RX_FDEQ_BIN_23 +87 0x4000 //RX_FDEQ_RESRV_0 +88 0x0320 //RX_FDEQ_RESRV_1 +89 0x0018 //RX_FDDRC_BAND_MARGIN_0 +90 0x0030 //RX_FDDRC_BAND_MARGIN_1 +91 0x0050 //RX_FDDRC_BAND_MARGIN_2 +92 0x0080 //RX_FDDRC_BAND_MARGIN_3 +93 0x0007 //RX_FDDRC_BLOCK_EXP +94 0x5000 //RX_FDDRC_THRD_2_0 +95 0x5000 //RX_FDDRC_THRD_2_1 +96 0x5000 //RX_FDDRC_THRD_2_2 +97 0x5000 //RX_FDDRC_THRD_2_3 +98 0x6400 //RX_FDDRC_THRD_3_0 +99 0x6400 //RX_FDDRC_THRD_3_1 +100 0x6400 //RX_FDDRC_THRD_3_2 +101 0x6400 //RX_FDDRC_THRD_3_3 +102 0x2000 //RX_FDDRC_SLANT_0_0 +103 0x2000 //RX_FDDRC_SLANT_0_1 +104 0x2000 //RX_FDDRC_SLANT_0_2 +105 0x2000 //RX_FDDRC_SLANT_0_3 +106 0x5333 //RX_FDDRC_SLANT_1_0 +107 0x5333 //RX_FDDRC_SLANT_1_1 +108 0x5333 //RX_FDDRC_SLANT_1_2 +109 0x5333 //RX_FDDRC_SLANT_1_3 +110 0x0000 //RX_FDDRC_RESRV_0 +129 0x000A //RX_SPK_VOL +130 0x0000 //RX_VOL_RESRV_0 +#VOL 1 +6 0x1000 //RX_TDDRC_ALPHA_UP_1 +7 0x1000 //RX_TDDRC_ALPHA_UP_2 +8 0x1000 //RX_TDDRC_ALPHA_UP_3 +9 0x1000 //RX_TDDRC_ALPHA_UP_4 +27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +33 0x7000 //RX_TDDRC_LIMITER_THRD +34 0x0800 //RX_TDDRC_LIMITER_GAIN +112 0x0001 //RX_TDDRC_THRD_0 +113 0x0002 //RX_TDDRC_THRD_1 +114 0x1800 //RX_TDDRC_THRD_2 +115 0x1800 //RX_TDDRC_THRD_3 +116 0x7FFF //RX_TDDRC_SLANT_0 +117 0x7FFF //RX_TDDRC_SLANT_1 +118 0x1000 //RX_TDDRC_ALPHA_UP_0 +119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +120 0x0000 //RX_TDDRC_HMNC_FLAG +121 0x199A //RX_TDDRC_HMNC_GAIN +122 0x0001 //RX_TDDRC_SMT_FLAG +123 0x0CCD //RX_TDDRC_SMT_W +124 0x057F //RX_TDDRC_DRC_GAIN +38 0x0020 //RX_FDEQ_SUBNUM +39 0x483E //RX_FDEQ_GAIN_0 +40 0x3E3E //RX_FDEQ_GAIN_1 +41 0x3E4A //RX_FDEQ_GAIN_2 +42 0x5464 //RX_FDEQ_GAIN_3 +43 0x7072 //RX_FDEQ_GAIN_4 +44 0x8576 //RX_FDEQ_GAIN_5 +45 0x7880 //RX_FDEQ_GAIN_6 +46 0x8888 //RX_FDEQ_GAIN_7 +47 0x949C //RX_FDEQ_GAIN_8 +48 0x96A4 //RX_FDEQ_GAIN_9 +49 0xA994 //RX_FDEQ_GAIN_10 +50 0x9487 //RX_FDEQ_GAIN_11 +51 0x6F64 //RX_FDEQ_GAIN_12 +52 0x625A //RX_FDEQ_GAIN_13 +53 0x5D80 //RX_FDEQ_GAIN_14 +54 0x8890 //RX_FDEQ_GAIN_15 +55 0x4848 //RX_FDEQ_GAIN_16 +56 0x4848 //RX_FDEQ_GAIN_17 +57 0x4848 //RX_FDEQ_GAIN_18 +58 0x4848 //RX_FDEQ_GAIN_19 +59 0x4848 //RX_FDEQ_GAIN_20 +60 0x4848 //RX_FDEQ_GAIN_21 +61 0x4848 //RX_FDEQ_GAIN_22 +62 0x4848 //RX_FDEQ_GAIN_23 +63 0x0202 //RX_FDEQ_BIN_0 +64 0x0202 //RX_FDEQ_BIN_1 +65 0x0301 //RX_FDEQ_BIN_2 +66 0x0503 //RX_FDEQ_BIN_3 +67 0x0406 //RX_FDEQ_BIN_4 +68 0x0109 //RX_FDEQ_BIN_5 +69 0x0708 //RX_FDEQ_BIN_6 +70 0x090A //RX_FDEQ_BIN_7 +71 0x0B0C //RX_FDEQ_BIN_8 +72 0x0D0E //RX_FDEQ_BIN_9 +73 0x1013 //RX_FDEQ_BIN_10 +74 0x1719 //RX_FDEQ_BIN_11 +75 0x1B0F //RX_FDEQ_BIN_12 +76 0x141E //RX_FDEQ_BIN_13 +77 0x3728 //RX_FDEQ_BIN_14 +78 0x282C //RX_FDEQ_BIN_15 +79 0x0000 //RX_FDEQ_BIN_16 +80 0x0000 //RX_FDEQ_BIN_17 +81 0x0000 //RX_FDEQ_BIN_18 +82 0x0000 //RX_FDEQ_BIN_19 +83 0x0000 //RX_FDEQ_BIN_20 +84 0x0000 //RX_FDEQ_BIN_21 +85 0x0000 //RX_FDEQ_BIN_22 +86 0x0000 //RX_FDEQ_BIN_23 +87 0x4000 //RX_FDEQ_RESRV_0 +88 0x0320 //RX_FDEQ_RESRV_1 +89 0x0018 //RX_FDDRC_BAND_MARGIN_0 +90 0x0030 //RX_FDDRC_BAND_MARGIN_1 +91 0x0050 //RX_FDDRC_BAND_MARGIN_2 +92 0x0080 //RX_FDDRC_BAND_MARGIN_3 +93 0x0007 //RX_FDDRC_BLOCK_EXP +94 0x5000 //RX_FDDRC_THRD_2_0 +95 0x5000 //RX_FDDRC_THRD_2_1 +96 0x5000 //RX_FDDRC_THRD_2_2 +97 0x5000 //RX_FDDRC_THRD_2_3 +98 0x6400 //RX_FDDRC_THRD_3_0 +99 0x6400 //RX_FDDRC_THRD_3_1 +100 0x6400 //RX_FDDRC_THRD_3_2 +101 0x6400 //RX_FDDRC_THRD_3_3 +102 0x2000 //RX_FDDRC_SLANT_0_0 +103 0x2000 //RX_FDDRC_SLANT_0_1 +104 0x2000 //RX_FDDRC_SLANT_0_2 +105 0x2000 //RX_FDDRC_SLANT_0_3 +106 0x5333 //RX_FDDRC_SLANT_1_0 +107 0x5333 //RX_FDDRC_SLANT_1_1 +108 0x5333 //RX_FDDRC_SLANT_1_2 +109 0x5333 //RX_FDDRC_SLANT_1_3 +110 0x0000 //RX_FDDRC_RESRV_0 +129 0x0010 //RX_SPK_VOL +130 0x0000 //RX_VOL_RESRV_0 +#VOL 2 +6 0x1000 //RX_TDDRC_ALPHA_UP_1 +7 0x1000 //RX_TDDRC_ALPHA_UP_2 +8 0x1000 //RX_TDDRC_ALPHA_UP_3 +9 0x1000 //RX_TDDRC_ALPHA_UP_4 +27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +33 0x7000 //RX_TDDRC_LIMITER_THRD +34 0x0800 //RX_TDDRC_LIMITER_GAIN +112 0x0001 //RX_TDDRC_THRD_0 +113 0x0002 //RX_TDDRC_THRD_1 +114 0x1800 //RX_TDDRC_THRD_2 +115 0x1800 //RX_TDDRC_THRD_3 +116 0x7FFF //RX_TDDRC_SLANT_0 +117 0x7FFF //RX_TDDRC_SLANT_1 +118 0x1000 //RX_TDDRC_ALPHA_UP_0 +119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +120 0x0000 //RX_TDDRC_HMNC_FLAG +121 0x199A //RX_TDDRC_HMNC_GAIN +122 0x0001 //RX_TDDRC_SMT_FLAG +123 0x0CCD //RX_TDDRC_SMT_W +124 0x057F //RX_TDDRC_DRC_GAIN +38 0x0020 //RX_FDEQ_SUBNUM +39 0x483E //RX_FDEQ_GAIN_0 +40 0x3E3E //RX_FDEQ_GAIN_1 +41 0x3E4A //RX_FDEQ_GAIN_2 +42 0x5464 //RX_FDEQ_GAIN_3 +43 0x7072 //RX_FDEQ_GAIN_4 +44 0x8576 //RX_FDEQ_GAIN_5 +45 0x7880 //RX_FDEQ_GAIN_6 +46 0x8888 //RX_FDEQ_GAIN_7 +47 0x949C //RX_FDEQ_GAIN_8 +48 0x96A4 //RX_FDEQ_GAIN_9 +49 0xA994 //RX_FDEQ_GAIN_10 +50 0x9487 //RX_FDEQ_GAIN_11 +51 0x6F64 //RX_FDEQ_GAIN_12 +52 0x625A //RX_FDEQ_GAIN_13 +53 0x5D80 //RX_FDEQ_GAIN_14 +54 0x8890 //RX_FDEQ_GAIN_15 +55 0x4848 //RX_FDEQ_GAIN_16 +56 0x4848 //RX_FDEQ_GAIN_17 +57 0x4848 //RX_FDEQ_GAIN_18 +58 0x4848 //RX_FDEQ_GAIN_19 +59 0x4848 //RX_FDEQ_GAIN_20 +60 0x4848 //RX_FDEQ_GAIN_21 +61 0x4848 //RX_FDEQ_GAIN_22 +62 0x4848 //RX_FDEQ_GAIN_23 +63 0x0202 //RX_FDEQ_BIN_0 +64 0x0202 //RX_FDEQ_BIN_1 +65 0x0301 //RX_FDEQ_BIN_2 +66 0x0503 //RX_FDEQ_BIN_3 +67 0x0406 //RX_FDEQ_BIN_4 +68 0x0109 //RX_FDEQ_BIN_5 +69 0x0708 //RX_FDEQ_BIN_6 +70 0x090A //RX_FDEQ_BIN_7 +71 0x0B0C //RX_FDEQ_BIN_8 +72 0x0D0E //RX_FDEQ_BIN_9 +73 0x1013 //RX_FDEQ_BIN_10 +74 0x1719 //RX_FDEQ_BIN_11 +75 0x1B0F //RX_FDEQ_BIN_12 +76 0x141E //RX_FDEQ_BIN_13 +77 0x3728 //RX_FDEQ_BIN_14 +78 0x282C //RX_FDEQ_BIN_15 +79 0x0000 //RX_FDEQ_BIN_16 +80 0x0000 //RX_FDEQ_BIN_17 +81 0x0000 //RX_FDEQ_BIN_18 +82 0x0000 //RX_FDEQ_BIN_19 +83 0x0000 //RX_FDEQ_BIN_20 +84 0x0000 //RX_FDEQ_BIN_21 +85 0x0000 //RX_FDEQ_BIN_22 +86 0x0000 //RX_FDEQ_BIN_23 +87 0x4000 //RX_FDEQ_RESRV_0 +88 0x0320 //RX_FDEQ_RESRV_1 +89 0x0018 //RX_FDDRC_BAND_MARGIN_0 +90 0x0030 //RX_FDDRC_BAND_MARGIN_1 +91 0x0050 //RX_FDDRC_BAND_MARGIN_2 +92 0x0080 //RX_FDDRC_BAND_MARGIN_3 +93 0x0007 //RX_FDDRC_BLOCK_EXP +94 0x5000 //RX_FDDRC_THRD_2_0 +95 0x5000 //RX_FDDRC_THRD_2_1 +96 0x5000 //RX_FDDRC_THRD_2_2 +97 0x5000 //RX_FDDRC_THRD_2_3 +98 0x6400 //RX_FDDRC_THRD_3_0 +99 0x6400 //RX_FDDRC_THRD_3_1 +100 0x6400 //RX_FDDRC_THRD_3_2 +101 0x6400 //RX_FDDRC_THRD_3_3 +102 0x2000 //RX_FDDRC_SLANT_0_0 +103 0x2000 //RX_FDDRC_SLANT_0_1 +104 0x2000 //RX_FDDRC_SLANT_0_2 +105 0x2000 //RX_FDDRC_SLANT_0_3 +106 0x5333 //RX_FDDRC_SLANT_1_0 +107 0x5333 //RX_FDDRC_SLANT_1_1 +108 0x5333 //RX_FDDRC_SLANT_1_2 +109 0x5333 //RX_FDDRC_SLANT_1_3 +110 0x0000 //RX_FDDRC_RESRV_0 +129 0x001B //RX_SPK_VOL +130 0x0000 //RX_VOL_RESRV_0 +#VOL 3 +6 0x1000 //RX_TDDRC_ALPHA_UP_1 +7 0x1000 //RX_TDDRC_ALPHA_UP_2 +8 0x1000 //RX_TDDRC_ALPHA_UP_3 +9 0x1000 //RX_TDDRC_ALPHA_UP_4 +27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +33 0x7000 //RX_TDDRC_LIMITER_THRD +34 0x0800 //RX_TDDRC_LIMITER_GAIN +112 0x0001 //RX_TDDRC_THRD_0 +113 0x0002 //RX_TDDRC_THRD_1 +114 0x1800 //RX_TDDRC_THRD_2 +115 0x1800 //RX_TDDRC_THRD_3 +116 0x7FFF //RX_TDDRC_SLANT_0 +117 0x7FFF //RX_TDDRC_SLANT_1 +118 0x1000 //RX_TDDRC_ALPHA_UP_0 +119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +120 0x0000 //RX_TDDRC_HMNC_FLAG +121 0x199A //RX_TDDRC_HMNC_GAIN +122 0x0001 //RX_TDDRC_SMT_FLAG +123 0x0CCD //RX_TDDRC_SMT_W +124 0x057F //RX_TDDRC_DRC_GAIN +38 0x0020 //RX_FDEQ_SUBNUM +39 0x483E //RX_FDEQ_GAIN_0 +40 0x3E3E //RX_FDEQ_GAIN_1 +41 0x3E4A //RX_FDEQ_GAIN_2 +42 0x5464 //RX_FDEQ_GAIN_3 +43 0x7072 //RX_FDEQ_GAIN_4 +44 0x8576 //RX_FDEQ_GAIN_5 +45 0x7880 //RX_FDEQ_GAIN_6 +46 0x8888 //RX_FDEQ_GAIN_7 +47 0x949C //RX_FDEQ_GAIN_8 +48 0x96A4 //RX_FDEQ_GAIN_9 +49 0xA994 //RX_FDEQ_GAIN_10 +50 0x9487 //RX_FDEQ_GAIN_11 +51 0x6F64 //RX_FDEQ_GAIN_12 +52 0x625A //RX_FDEQ_GAIN_13 +53 0x5D80 //RX_FDEQ_GAIN_14 +54 0x8890 //RX_FDEQ_GAIN_15 +55 0x4848 //RX_FDEQ_GAIN_16 +56 0x4848 //RX_FDEQ_GAIN_17 +57 0x4848 //RX_FDEQ_GAIN_18 +58 0x4848 //RX_FDEQ_GAIN_19 +59 0x4848 //RX_FDEQ_GAIN_20 +60 0x4848 //RX_FDEQ_GAIN_21 +61 0x4848 //RX_FDEQ_GAIN_22 +62 0x4848 //RX_FDEQ_GAIN_23 +63 0x0202 //RX_FDEQ_BIN_0 +64 0x0202 //RX_FDEQ_BIN_1 +65 0x0301 //RX_FDEQ_BIN_2 +66 0x0503 //RX_FDEQ_BIN_3 +67 0x0406 //RX_FDEQ_BIN_4 +68 0x0109 //RX_FDEQ_BIN_5 +69 0x0708 //RX_FDEQ_BIN_6 +70 0x090A //RX_FDEQ_BIN_7 +71 0x0B0C //RX_FDEQ_BIN_8 +72 0x0D0E //RX_FDEQ_BIN_9 +73 0x1013 //RX_FDEQ_BIN_10 +74 0x1719 //RX_FDEQ_BIN_11 +75 0x1B0F //RX_FDEQ_BIN_12 +76 0x141E //RX_FDEQ_BIN_13 +77 0x3728 //RX_FDEQ_BIN_14 +78 0x282C //RX_FDEQ_BIN_15 +79 0x0000 //RX_FDEQ_BIN_16 +80 0x0000 //RX_FDEQ_BIN_17 +81 0x0000 //RX_FDEQ_BIN_18 +82 0x0000 //RX_FDEQ_BIN_19 +83 0x0000 //RX_FDEQ_BIN_20 +84 0x0000 //RX_FDEQ_BIN_21 +85 0x0000 //RX_FDEQ_BIN_22 +86 0x0000 //RX_FDEQ_BIN_23 +87 0x4000 //RX_FDEQ_RESRV_0 +88 0x0320 //RX_FDEQ_RESRV_1 +89 0x0018 //RX_FDDRC_BAND_MARGIN_0 +90 0x0030 //RX_FDDRC_BAND_MARGIN_1 +91 0x0050 //RX_FDDRC_BAND_MARGIN_2 +92 0x0080 //RX_FDDRC_BAND_MARGIN_3 +93 0x0007 //RX_FDDRC_BLOCK_EXP +94 0x5000 //RX_FDDRC_THRD_2_0 +95 0x5000 //RX_FDDRC_THRD_2_1 +96 0x5000 //RX_FDDRC_THRD_2_2 +97 0x5000 //RX_FDDRC_THRD_2_3 +98 0x6400 //RX_FDDRC_THRD_3_0 +99 0x6400 //RX_FDDRC_THRD_3_1 +100 0x6400 //RX_FDDRC_THRD_3_2 +101 0x6400 //RX_FDDRC_THRD_3_3 +102 0x2000 //RX_FDDRC_SLANT_0_0 +103 0x2000 //RX_FDDRC_SLANT_0_1 +104 0x2000 //RX_FDDRC_SLANT_0_2 +105 0x2000 //RX_FDDRC_SLANT_0_3 +106 0x5333 //RX_FDDRC_SLANT_1_0 +107 0x5333 //RX_FDDRC_SLANT_1_1 +108 0x5333 //RX_FDDRC_SLANT_1_2 +109 0x5333 //RX_FDDRC_SLANT_1_3 +110 0x0000 //RX_FDDRC_RESRV_0 +129 0x0032 //RX_SPK_VOL +130 0x0000 //RX_VOL_RESRV_0 +#VOL 4 +6 0x1000 //RX_TDDRC_ALPHA_UP_1 +7 0x1000 //RX_TDDRC_ALPHA_UP_2 +8 0x1000 //RX_TDDRC_ALPHA_UP_3 +9 0x1000 //RX_TDDRC_ALPHA_UP_4 +27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +33 0x7000 //RX_TDDRC_LIMITER_THRD +34 0x0800 //RX_TDDRC_LIMITER_GAIN +112 0x0001 //RX_TDDRC_THRD_0 +113 0x0002 //RX_TDDRC_THRD_1 +114 0x1800 //RX_TDDRC_THRD_2 +115 0x1800 //RX_TDDRC_THRD_3 +116 0x7FFF //RX_TDDRC_SLANT_0 +117 0x7FFF //RX_TDDRC_SLANT_1 +118 0x1000 //RX_TDDRC_ALPHA_UP_0 +119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +120 0x0000 //RX_TDDRC_HMNC_FLAG +121 0x199A //RX_TDDRC_HMNC_GAIN +122 0x0001 //RX_TDDRC_SMT_FLAG +123 0x0CCD //RX_TDDRC_SMT_W +124 0x057F //RX_TDDRC_DRC_GAIN +38 0x0020 //RX_FDEQ_SUBNUM +39 0x483E //RX_FDEQ_GAIN_0 +40 0x3E3E //RX_FDEQ_GAIN_1 +41 0x3E4A //RX_FDEQ_GAIN_2 +42 0x5464 //RX_FDEQ_GAIN_3 +43 0x7072 //RX_FDEQ_GAIN_4 +44 0x8576 //RX_FDEQ_GAIN_5 +45 0x7880 //RX_FDEQ_GAIN_6 +46 0x8888 //RX_FDEQ_GAIN_7 +47 0x949C //RX_FDEQ_GAIN_8 +48 0x96A4 //RX_FDEQ_GAIN_9 +49 0xA994 //RX_FDEQ_GAIN_10 +50 0x9487 //RX_FDEQ_GAIN_11 +51 0x6F64 //RX_FDEQ_GAIN_12 +52 0x625A //RX_FDEQ_GAIN_13 +53 0x5D80 //RX_FDEQ_GAIN_14 +54 0x8890 //RX_FDEQ_GAIN_15 +55 0x4848 //RX_FDEQ_GAIN_16 +56 0x4848 //RX_FDEQ_GAIN_17 +57 0x4848 //RX_FDEQ_GAIN_18 +58 0x4848 //RX_FDEQ_GAIN_19 +59 0x4848 //RX_FDEQ_GAIN_20 +60 0x4848 //RX_FDEQ_GAIN_21 +61 0x4848 //RX_FDEQ_GAIN_22 +62 0x4848 //RX_FDEQ_GAIN_23 +63 0x0202 //RX_FDEQ_BIN_0 +64 0x0202 //RX_FDEQ_BIN_1 +65 0x0301 //RX_FDEQ_BIN_2 +66 0x0503 //RX_FDEQ_BIN_3 +67 0x0406 //RX_FDEQ_BIN_4 +68 0x0109 //RX_FDEQ_BIN_5 +69 0x0708 //RX_FDEQ_BIN_6 +70 0x090A //RX_FDEQ_BIN_7 +71 0x0B0C //RX_FDEQ_BIN_8 +72 0x0D0E //RX_FDEQ_BIN_9 +73 0x1013 //RX_FDEQ_BIN_10 +74 0x1719 //RX_FDEQ_BIN_11 +75 0x1B0F //RX_FDEQ_BIN_12 +76 0x141E //RX_FDEQ_BIN_13 +77 0x3728 //RX_FDEQ_BIN_14 +78 0x282C //RX_FDEQ_BIN_15 +79 0x0000 //RX_FDEQ_BIN_16 +80 0x0000 //RX_FDEQ_BIN_17 +81 0x0000 //RX_FDEQ_BIN_18 +82 0x0000 //RX_FDEQ_BIN_19 +83 0x0000 //RX_FDEQ_BIN_20 +84 0x0000 //RX_FDEQ_BIN_21 +85 0x0000 //RX_FDEQ_BIN_22 +86 0x0000 //RX_FDEQ_BIN_23 +87 0x4000 //RX_FDEQ_RESRV_0 +88 0x0320 //RX_FDEQ_RESRV_1 +89 0x0018 //RX_FDDRC_BAND_MARGIN_0 +90 0x0030 //RX_FDDRC_BAND_MARGIN_1 +91 0x0050 //RX_FDDRC_BAND_MARGIN_2 +92 0x0080 //RX_FDDRC_BAND_MARGIN_3 +93 0x0007 //RX_FDDRC_BLOCK_EXP +94 0x5000 //RX_FDDRC_THRD_2_0 +95 0x5000 //RX_FDDRC_THRD_2_1 +96 0x5000 //RX_FDDRC_THRD_2_2 +97 0x5000 //RX_FDDRC_THRD_2_3 +98 0x6400 //RX_FDDRC_THRD_3_0 +99 0x6400 //RX_FDDRC_THRD_3_1 +100 0x6400 //RX_FDDRC_THRD_3_2 +101 0x6400 //RX_FDDRC_THRD_3_3 +102 0x2000 //RX_FDDRC_SLANT_0_0 +103 0x2000 //RX_FDDRC_SLANT_0_1 +104 0x2000 //RX_FDDRC_SLANT_0_2 +105 0x2000 //RX_FDDRC_SLANT_0_3 +106 0x5333 //RX_FDDRC_SLANT_1_0 +107 0x5333 //RX_FDDRC_SLANT_1_1 +108 0x5333 //RX_FDDRC_SLANT_1_2 +109 0x5333 //RX_FDDRC_SLANT_1_3 +110 0x0000 //RX_FDDRC_RESRV_0 +129 0x0047 //RX_SPK_VOL +130 0x0000 //RX_VOL_RESRV_0 +#VOL 5 +6 0x1000 //RX_TDDRC_ALPHA_UP_1 +7 0x1000 //RX_TDDRC_ALPHA_UP_2 +8 0x1000 //RX_TDDRC_ALPHA_UP_3 +9 0x1000 //RX_TDDRC_ALPHA_UP_4 +27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +33 0x7000 //RX_TDDRC_LIMITER_THRD +34 0x0800 //RX_TDDRC_LIMITER_GAIN +112 0x0001 //RX_TDDRC_THRD_0 +113 0x0002 //RX_TDDRC_THRD_1 +114 0x1800 //RX_TDDRC_THRD_2 +115 0x1800 //RX_TDDRC_THRD_3 +116 0x7FFF //RX_TDDRC_SLANT_0 +117 0x7FFF //RX_TDDRC_SLANT_1 +118 0x1000 //RX_TDDRC_ALPHA_UP_0 +119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +120 0x0000 //RX_TDDRC_HMNC_FLAG +121 0x199A //RX_TDDRC_HMNC_GAIN +122 0x0001 //RX_TDDRC_SMT_FLAG +123 0x0CCD //RX_TDDRC_SMT_W +124 0x057F //RX_TDDRC_DRC_GAIN +38 0x0020 //RX_FDEQ_SUBNUM +39 0x483E //RX_FDEQ_GAIN_0 +40 0x3E3E //RX_FDEQ_GAIN_1 +41 0x3E4A //RX_FDEQ_GAIN_2 +42 0x5464 //RX_FDEQ_GAIN_3 +43 0x7072 //RX_FDEQ_GAIN_4 +44 0x8576 //RX_FDEQ_GAIN_5 +45 0x7880 //RX_FDEQ_GAIN_6 +46 0x8888 //RX_FDEQ_GAIN_7 +47 0x949C //RX_FDEQ_GAIN_8 +48 0x96A4 //RX_FDEQ_GAIN_9 +49 0xA994 //RX_FDEQ_GAIN_10 +50 0x9487 //RX_FDEQ_GAIN_11 +51 0x6F64 //RX_FDEQ_GAIN_12 +52 0x625A //RX_FDEQ_GAIN_13 +53 0x5D80 //RX_FDEQ_GAIN_14 +54 0x8890 //RX_FDEQ_GAIN_15 +55 0x4848 //RX_FDEQ_GAIN_16 +56 0x4848 //RX_FDEQ_GAIN_17 +57 0x4848 //RX_FDEQ_GAIN_18 +58 0x4848 //RX_FDEQ_GAIN_19 +59 0x4848 //RX_FDEQ_GAIN_20 +60 0x4848 //RX_FDEQ_GAIN_21 +61 0x4848 //RX_FDEQ_GAIN_22 +62 0x4848 //RX_FDEQ_GAIN_23 +63 0x0202 //RX_FDEQ_BIN_0 +64 0x0202 //RX_FDEQ_BIN_1 +65 0x0301 //RX_FDEQ_BIN_2 +66 0x0503 //RX_FDEQ_BIN_3 +67 0x0406 //RX_FDEQ_BIN_4 +68 0x0109 //RX_FDEQ_BIN_5 +69 0x0708 //RX_FDEQ_BIN_6 +70 0x090A //RX_FDEQ_BIN_7 +71 0x0B0C //RX_FDEQ_BIN_8 +72 0x0D0E //RX_FDEQ_BIN_9 +73 0x1013 //RX_FDEQ_BIN_10 +74 0x1719 //RX_FDEQ_BIN_11 +75 0x1B0F //RX_FDEQ_BIN_12 +76 0x141E //RX_FDEQ_BIN_13 +77 0x3728 //RX_FDEQ_BIN_14 +78 0x282C //RX_FDEQ_BIN_15 +79 0x0000 //RX_FDEQ_BIN_16 +80 0x0000 //RX_FDEQ_BIN_17 +81 0x0000 //RX_FDEQ_BIN_18 +82 0x0000 //RX_FDEQ_BIN_19 +83 0x0000 //RX_FDEQ_BIN_20 +84 0x0000 //RX_FDEQ_BIN_21 +85 0x0000 //RX_FDEQ_BIN_22 +86 0x0000 //RX_FDEQ_BIN_23 +87 0x4000 //RX_FDEQ_RESRV_0 +88 0x0320 //RX_FDEQ_RESRV_1 +89 0x0018 //RX_FDDRC_BAND_MARGIN_0 +90 0x0030 //RX_FDDRC_BAND_MARGIN_1 +91 0x0050 //RX_FDDRC_BAND_MARGIN_2 +92 0x0080 //RX_FDDRC_BAND_MARGIN_3 +93 0x0007 //RX_FDDRC_BLOCK_EXP +94 0x5000 //RX_FDDRC_THRD_2_0 +95 0x5000 //RX_FDDRC_THRD_2_1 +96 0x5000 //RX_FDDRC_THRD_2_2 +97 0x5000 //RX_FDDRC_THRD_2_3 +98 0x6400 //RX_FDDRC_THRD_3_0 +99 0x6400 //RX_FDDRC_THRD_3_1 +100 0x6400 //RX_FDDRC_THRD_3_2 +101 0x6400 //RX_FDDRC_THRD_3_3 +102 0x2000 //RX_FDDRC_SLANT_0_0 +103 0x2000 //RX_FDDRC_SLANT_0_1 +104 0x2000 //RX_FDDRC_SLANT_0_2 +105 0x2000 //RX_FDDRC_SLANT_0_3 +106 0x5333 //RX_FDDRC_SLANT_1_0 +107 0x5333 //RX_FDDRC_SLANT_1_1 +108 0x5333 //RX_FDDRC_SLANT_1_2 +109 0x5333 //RX_FDDRC_SLANT_1_3 +110 0x0000 //RX_FDDRC_RESRV_0 +129 0x0076 //RX_SPK_VOL +130 0x0000 //RX_VOL_RESRV_0 +#VOL 6 +6 0x1000 //RX_TDDRC_ALPHA_UP_1 +7 0x1000 //RX_TDDRC_ALPHA_UP_2 +8 0x1000 //RX_TDDRC_ALPHA_UP_3 +9 0x1000 //RX_TDDRC_ALPHA_UP_4 +27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +33 0x7000 //RX_TDDRC_LIMITER_THRD +34 0x0800 //RX_TDDRC_LIMITER_GAIN +112 0x0001 //RX_TDDRC_THRD_0 +113 0x0002 //RX_TDDRC_THRD_1 +114 0x1800 //RX_TDDRC_THRD_2 +115 0x1800 //RX_TDDRC_THRD_3 +116 0x7FFF //RX_TDDRC_SLANT_0 +117 0x7FFF //RX_TDDRC_SLANT_1 +118 0x1000 //RX_TDDRC_ALPHA_UP_0 +119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +120 0x0000 //RX_TDDRC_HMNC_FLAG +121 0x199A //RX_TDDRC_HMNC_GAIN +122 0x0001 //RX_TDDRC_SMT_FLAG +123 0x0CCD //RX_TDDRC_SMT_W +124 0x057F //RX_TDDRC_DRC_GAIN +38 0x0020 //RX_FDEQ_SUBNUM +39 0x483E //RX_FDEQ_GAIN_0 +40 0x3E3E //RX_FDEQ_GAIN_1 +41 0x3E4A //RX_FDEQ_GAIN_2 +42 0x5464 //RX_FDEQ_GAIN_3 +43 0x7072 //RX_FDEQ_GAIN_4 +44 0x8576 //RX_FDEQ_GAIN_5 +45 0x7880 //RX_FDEQ_GAIN_6 +46 0x8888 //RX_FDEQ_GAIN_7 +47 0x949C //RX_FDEQ_GAIN_8 +48 0x96A4 //RX_FDEQ_GAIN_9 +49 0xA994 //RX_FDEQ_GAIN_10 +50 0x9487 //RX_FDEQ_GAIN_11 +51 0x6F64 //RX_FDEQ_GAIN_12 +52 0x625A //RX_FDEQ_GAIN_13 +53 0x5D80 //RX_FDEQ_GAIN_14 +54 0x8890 //RX_FDEQ_GAIN_15 +55 0x4848 //RX_FDEQ_GAIN_16 +56 0x4848 //RX_FDEQ_GAIN_17 +57 0x4848 //RX_FDEQ_GAIN_18 +58 0x4848 //RX_FDEQ_GAIN_19 +59 0x4848 //RX_FDEQ_GAIN_20 +60 0x4848 //RX_FDEQ_GAIN_21 +61 0x4848 //RX_FDEQ_GAIN_22 +62 0x4848 //RX_FDEQ_GAIN_23 +63 0x0202 //RX_FDEQ_BIN_0 +64 0x0202 //RX_FDEQ_BIN_1 +65 0x0301 //RX_FDEQ_BIN_2 +66 0x0503 //RX_FDEQ_BIN_3 +67 0x0406 //RX_FDEQ_BIN_4 +68 0x0109 //RX_FDEQ_BIN_5 +69 0x0708 //RX_FDEQ_BIN_6 +70 0x090A //RX_FDEQ_BIN_7 +71 0x0B0C //RX_FDEQ_BIN_8 +72 0x0D0E //RX_FDEQ_BIN_9 +73 0x1013 //RX_FDEQ_BIN_10 +74 0x1719 //RX_FDEQ_BIN_11 +75 0x1B0F //RX_FDEQ_BIN_12 +76 0x141E //RX_FDEQ_BIN_13 +77 0x3728 //RX_FDEQ_BIN_14 +78 0x282C //RX_FDEQ_BIN_15 +79 0x0000 //RX_FDEQ_BIN_16 +80 0x0000 //RX_FDEQ_BIN_17 +81 0x0000 //RX_FDEQ_BIN_18 +82 0x0000 //RX_FDEQ_BIN_19 +83 0x0000 //RX_FDEQ_BIN_20 +84 0x0000 //RX_FDEQ_BIN_21 +85 0x0000 //RX_FDEQ_BIN_22 +86 0x0000 //RX_FDEQ_BIN_23 +87 0x4000 //RX_FDEQ_RESRV_0 +88 0x0320 //RX_FDEQ_RESRV_1 +89 0x0018 //RX_FDDRC_BAND_MARGIN_0 +90 0x0030 //RX_FDDRC_BAND_MARGIN_1 +91 0x0050 //RX_FDDRC_BAND_MARGIN_2 +92 0x0080 //RX_FDDRC_BAND_MARGIN_3 +93 0x0007 //RX_FDDRC_BLOCK_EXP +94 0x5000 //RX_FDDRC_THRD_2_0 +95 0x5000 //RX_FDDRC_THRD_2_1 +96 0x5000 //RX_FDDRC_THRD_2_2 +97 0x5000 //RX_FDDRC_THRD_2_3 +98 0x6400 //RX_FDDRC_THRD_3_0 +99 0x6400 //RX_FDDRC_THRD_3_1 +100 0x6400 //RX_FDDRC_THRD_3_2 +101 0x6400 //RX_FDDRC_THRD_3_3 +102 0x2000 //RX_FDDRC_SLANT_0_0 +103 0x2000 //RX_FDDRC_SLANT_0_1 +104 0x2000 //RX_FDDRC_SLANT_0_2 +105 0x2000 //RX_FDDRC_SLANT_0_3 +106 0x5333 //RX_FDDRC_SLANT_1_0 +107 0x5333 //RX_FDDRC_SLANT_1_1 +108 0x5333 //RX_FDDRC_SLANT_1_2 +109 0x5333 //RX_FDDRC_SLANT_1_3 +110 0x0000 //RX_FDDRC_RESRV_0 +129 0x0100 //RX_SPK_VOL +130 0x0000 //RX_VOL_RESRV_0 +#RX 2 +157 0x003C //RX_RECVFUNC_MODE_0 +158 0x0000 //RX_RECVFUNC_MODE_1 +159 0x0003 //RX_SAMPLINGFREQ_SIG +160 0x0003 //RX_SAMPLINGFREQ_PROC +161 0x000A //RX_FRAME_SZ +162 0x0000 //RX_DELAY_OPT +163 0x1000 //RX_TDDRC_ALPHA_UP_1 +164 0x1000 //RX_TDDRC_ALPHA_UP_2 +165 0x1000 //RX_TDDRC_ALPHA_UP_3 +166 0x1000 //RX_TDDRC_ALPHA_UP_4 +167 0x05AA //RX_PGA +168 0x7FFF //RX_A_HP +169 0x4000 //RX_B_PE +170 0x5800 //RX_THR_PITCH_DET_0 +171 0x5000 //RX_THR_PITCH_DET_1 +172 0x4000 //RX_THR_PITCH_DET_2 +173 0x0008 //RX_PITCH_BFR_LEN +174 0x0003 //RX_SBD_PITCH_DET +175 0x0100 //RX_PP_RESRV_0 +176 0x0020 //RX_PP_RESRV_1 +177 0x0600 //RX_N_SN_EST +178 0x000C //RX_N2_SN_EST +179 0x000F //RX_NS_LVL_CTRL +180 0xF800 //RX_THR_SN_EST +181 0x7E00 //RX_LAMBDA_PFILT +182 0x000A //RX_FENS_RESRV_0 +183 0x0190 //RX_FENS_RESRV_1 +184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +187 0x0002 //RX_EXTRA_NS_L +188 0x0800 //RX_EXTRA_NS_A +189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +190 0x7000 //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +192 0x199A //RX_A_POST_FLT +193 0x0000 //RX_LMT_THRD +194 0x4000 //RX_LMT_ALPHA +195 0x0020 //RX_FDEQ_SUBNUM +196 0x483E //RX_FDEQ_GAIN_0 +197 0x3E3E //RX_FDEQ_GAIN_1 +198 0x3E4C //RX_FDEQ_GAIN_2 +199 0x5064 //RX_FDEQ_GAIN_3 +200 0x7076 //RX_FDEQ_GAIN_4 +201 0x897A //RX_FDEQ_GAIN_5 +202 0x7C80 //RX_FDEQ_GAIN_6 +203 0x8888 //RX_FDEQ_GAIN_7 +204 0x949C //RX_FDEQ_GAIN_8 +205 0x96A4 //RX_FDEQ_GAIN_9 +206 0xA9A0 //RX_FDEQ_GAIN_10 +207 0x9487 //RX_FDEQ_GAIN_11 +208 0x6F64 //RX_FDEQ_GAIN_12 +209 0x625A //RX_FDEQ_GAIN_13 +210 0x5D80 //RX_FDEQ_GAIN_14 +211 0x8890 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0202 //RX_FDEQ_BIN_0 +221 0x0202 //RX_FDEQ_BIN_1 +222 0x0301 //RX_FDEQ_BIN_2 +223 0x0404 //RX_FDEQ_BIN_3 +224 0x0406 //RX_FDEQ_BIN_4 +225 0x0109 //RX_FDEQ_BIN_5 +226 0x0708 //RX_FDEQ_BIN_6 +227 0x090A //RX_FDEQ_BIN_7 +228 0x0B0C //RX_FDEQ_BIN_8 +229 0x0D0E //RX_FDEQ_BIN_9 +230 0x1013 //RX_FDEQ_BIN_10 +231 0x1719 //RX_FDEQ_BIN_11 +232 0x1B0F //RX_FDEQ_BIN_12 +233 0x141E //RX_FDEQ_BIN_13 +234 0x3728 //RX_FDEQ_BIN_14 +235 0x282C //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x4000 //RX_FDEQ_RESRV_0 +245 0x0320 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0030 //RX_FDDRC_BAND_MARGIN_1 +248 0x0050 //RX_FDDRC_BAND_MARGIN_2 +249 0x0080 //RX_FDDRC_BAND_MARGIN_3 +250 0x0007 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x5000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x6400 //RX_FDDRC_THRD_3_2 +258 0x6400 //RX_FDDRC_THRD_3_3 +259 0x2000 //RX_FDDRC_SLANT_0_0 +260 0x2000 //RX_FDDRC_SLANT_0_1 +261 0x2000 //RX_FDDRC_SLANT_0_2 +262 0x2000 //RX_FDDRC_SLANT_0_3 +263 0x5333 //RX_FDDRC_SLANT_1_0 +264 0x5333 //RX_FDDRC_SLANT_1_1 +265 0x5333 //RX_FDDRC_SLANT_1_2 +266 0x5333 //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +268 0x0002 //RX_FILTINDX +269 0x0001 //RX_TDDRC_THRD_0 +270 0x0002 //RX_TDDRC_THRD_1 +271 0x1800 //RX_TDDRC_THRD_2 +272 0x1800 //RX_TDDRC_THRD_3 +273 0x7FFF //RX_TDDRC_SLANT_0 +274 0x7FFF //RX_TDDRC_SLANT_1 +275 0x1000 //RX_TDDRC_ALPHA_UP_0 +276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x199A //RX_TDDRC_HMNC_GAIN +279 0x0001 //RX_TDDRC_SMT_FLAG +280 0x0CCD //RX_TDDRC_SMT_W +281 0x0551 //RX_TDDRC_DRC_GAIN +282 0x7C00 //RX_LAMBDA_PKA_FP +283 0x13E0 //RX_TPKA_FP +284 0x0080 //RX_MIN_G_FP +285 0x2000 //RX_MAX_G_FP +286 0x0100 //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 +288 0x0000 //RX_MAXLEVEL_CNG +289 0x3000 //RX_BWE_UV_TH +290 0x3000 //RX_BWE_UV_TH2 +291 0x1800 //RX_BWE_UV_TH3 +292 0x1000 //RX_BWE_V_TH +293 0x04CD //RX_BWE_GAIN1_V_TH1 +294 0x0F33 //RX_BWE_GAIN1_V_TH2 +295 0x7333 //RX_BWE_UV_EQ +296 0x199A //RX_BWE_V_EQ +297 0x7333 //RX_BWE_TONE_TH +298 0x0004 //RX_BWE_UV_HOLD_T +299 0x6CCD //RX_BWE_GAIN2_ALPHA +300 0x799A //RX_BWE_GAIN3_ALPHA +301 0x001E //RX_BWE_CUTOFF +302 0x3000 //RX_BWE_GAINFILL +303 0x3200 //RX_BWE_MAXTH_TONE +304 0x2000 //RX_BWE_EQ_0 +305 0x2000 //RX_BWE_EQ_1 +306 0x2000 //RX_BWE_EQ_2 +307 0x2000 //RX_BWE_EQ_3 +308 0x2000 //RX_BWE_EQ_4 +309 0x2000 //RX_BWE_EQ_5 +310 0x2000 //RX_BWE_EQ_6 +311 0x0000 //RX_BWE_RESRV_0 +312 0x0000 //RX_BWE_RESRV_1 +313 0x0000 //RX_BWE_RESRV_2 +#VOL 0 +163 0x1000 //RX_TDDRC_ALPHA_UP_1 +164 0x1000 //RX_TDDRC_ALPHA_UP_2 +165 0x1000 //RX_TDDRC_ALPHA_UP_3 +166 0x1000 //RX_TDDRC_ALPHA_UP_4 +184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +190 0x7000 //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +269 0x0001 //RX_TDDRC_THRD_0 +270 0x0002 //RX_TDDRC_THRD_1 +271 0x1800 //RX_TDDRC_THRD_2 +272 0x1800 //RX_TDDRC_THRD_3 +273 0x7FFF //RX_TDDRC_SLANT_0 +274 0x7FFF //RX_TDDRC_SLANT_1 +275 0x1000 //RX_TDDRC_ALPHA_UP_0 +276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x199A //RX_TDDRC_HMNC_GAIN +279 0x0001 //RX_TDDRC_SMT_FLAG +280 0x0CCD //RX_TDDRC_SMT_W +281 0x0551 //RX_TDDRC_DRC_GAIN +195 0x0020 //RX_FDEQ_SUBNUM +196 0x483E //RX_FDEQ_GAIN_0 +197 0x3E3E //RX_FDEQ_GAIN_1 +198 0x3E4C //RX_FDEQ_GAIN_2 +199 0x5064 //RX_FDEQ_GAIN_3 +200 0x7076 //RX_FDEQ_GAIN_4 +201 0x897A //RX_FDEQ_GAIN_5 +202 0x7C80 //RX_FDEQ_GAIN_6 +203 0x8888 //RX_FDEQ_GAIN_7 +204 0x949C //RX_FDEQ_GAIN_8 +205 0x96A4 //RX_FDEQ_GAIN_9 +206 0xA9A0 //RX_FDEQ_GAIN_10 +207 0x9487 //RX_FDEQ_GAIN_11 +208 0x6F64 //RX_FDEQ_GAIN_12 +209 0x625A //RX_FDEQ_GAIN_13 +210 0x5D80 //RX_FDEQ_GAIN_14 +211 0x8890 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0202 //RX_FDEQ_BIN_0 +221 0x0202 //RX_FDEQ_BIN_1 +222 0x0301 //RX_FDEQ_BIN_2 +223 0x0404 //RX_FDEQ_BIN_3 +224 0x0406 //RX_FDEQ_BIN_4 +225 0x0109 //RX_FDEQ_BIN_5 +226 0x0708 //RX_FDEQ_BIN_6 +227 0x090A //RX_FDEQ_BIN_7 +228 0x0B0C //RX_FDEQ_BIN_8 +229 0x0D0E //RX_FDEQ_BIN_9 +230 0x1013 //RX_FDEQ_BIN_10 +231 0x1719 //RX_FDEQ_BIN_11 +232 0x1B0F //RX_FDEQ_BIN_12 +233 0x141E //RX_FDEQ_BIN_13 +234 0x3728 //RX_FDEQ_BIN_14 +235 0x282C //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x4000 //RX_FDEQ_RESRV_0 +245 0x0320 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0030 //RX_FDDRC_BAND_MARGIN_1 +248 0x0050 //RX_FDDRC_BAND_MARGIN_2 +249 0x0080 //RX_FDDRC_BAND_MARGIN_3 +250 0x0007 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x5000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x6400 //RX_FDDRC_THRD_3_2 +258 0x6400 //RX_FDDRC_THRD_3_3 +259 0x2000 //RX_FDDRC_SLANT_0_0 +260 0x2000 //RX_FDDRC_SLANT_0_1 +261 0x2000 //RX_FDDRC_SLANT_0_2 +262 0x2000 //RX_FDDRC_SLANT_0_3 +263 0x5333 //RX_FDDRC_SLANT_1_0 +264 0x5333 //RX_FDDRC_SLANT_1_1 +265 0x5333 //RX_FDDRC_SLANT_1_2 +266 0x5333 //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +286 0x000A //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 +#VOL 1 +163 0x1000 //RX_TDDRC_ALPHA_UP_1 +164 0x1000 //RX_TDDRC_ALPHA_UP_2 +165 0x1000 //RX_TDDRC_ALPHA_UP_3 +166 0x1000 //RX_TDDRC_ALPHA_UP_4 +184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +190 0x7000 //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +269 0x0001 //RX_TDDRC_THRD_0 +270 0x0002 //RX_TDDRC_THRD_1 +271 0x1800 //RX_TDDRC_THRD_2 +272 0x1800 //RX_TDDRC_THRD_3 +273 0x7FFF //RX_TDDRC_SLANT_0 +274 0x7FFF //RX_TDDRC_SLANT_1 +275 0x1000 //RX_TDDRC_ALPHA_UP_0 +276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x199A //RX_TDDRC_HMNC_GAIN +279 0x0001 //RX_TDDRC_SMT_FLAG +280 0x0CCD //RX_TDDRC_SMT_W +281 0x0551 //RX_TDDRC_DRC_GAIN +195 0x0020 //RX_FDEQ_SUBNUM +196 0x483E //RX_FDEQ_GAIN_0 +197 0x3E3E //RX_FDEQ_GAIN_1 +198 0x3E4C //RX_FDEQ_GAIN_2 +199 0x5064 //RX_FDEQ_GAIN_3 +200 0x7076 //RX_FDEQ_GAIN_4 +201 0x897A //RX_FDEQ_GAIN_5 +202 0x7C80 //RX_FDEQ_GAIN_6 +203 0x8888 //RX_FDEQ_GAIN_7 +204 0x949C //RX_FDEQ_GAIN_8 +205 0x96A4 //RX_FDEQ_GAIN_9 +206 0xA9A0 //RX_FDEQ_GAIN_10 +207 0x9487 //RX_FDEQ_GAIN_11 +208 0x6F64 //RX_FDEQ_GAIN_12 +209 0x625A //RX_FDEQ_GAIN_13 +210 0x5D80 //RX_FDEQ_GAIN_14 +211 0x8890 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0202 //RX_FDEQ_BIN_0 +221 0x0202 //RX_FDEQ_BIN_1 +222 0x0301 //RX_FDEQ_BIN_2 +223 0x0404 //RX_FDEQ_BIN_3 +224 0x0406 //RX_FDEQ_BIN_4 +225 0x0109 //RX_FDEQ_BIN_5 +226 0x0708 //RX_FDEQ_BIN_6 +227 0x090A //RX_FDEQ_BIN_7 +228 0x0B0C //RX_FDEQ_BIN_8 +229 0x0D0E //RX_FDEQ_BIN_9 +230 0x1013 //RX_FDEQ_BIN_10 +231 0x1719 //RX_FDEQ_BIN_11 +232 0x1B0F //RX_FDEQ_BIN_12 +233 0x141E //RX_FDEQ_BIN_13 +234 0x3728 //RX_FDEQ_BIN_14 +235 0x282C //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x4000 //RX_FDEQ_RESRV_0 +245 0x0320 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0030 //RX_FDDRC_BAND_MARGIN_1 +248 0x0050 //RX_FDDRC_BAND_MARGIN_2 +249 0x0080 //RX_FDDRC_BAND_MARGIN_3 +250 0x0007 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x5000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x6400 //RX_FDDRC_THRD_3_2 +258 0x6400 //RX_FDDRC_THRD_3_3 +259 0x2000 //RX_FDDRC_SLANT_0_0 +260 0x2000 //RX_FDDRC_SLANT_0_1 +261 0x2000 //RX_FDDRC_SLANT_0_2 +262 0x2000 //RX_FDDRC_SLANT_0_3 +263 0x5333 //RX_FDDRC_SLANT_1_0 +264 0x5333 //RX_FDDRC_SLANT_1_1 +265 0x5333 //RX_FDDRC_SLANT_1_2 +266 0x5333 //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +286 0x0010 //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 +#VOL 2 +163 0x1000 //RX_TDDRC_ALPHA_UP_1 +164 0x1000 //RX_TDDRC_ALPHA_UP_2 +165 0x1000 //RX_TDDRC_ALPHA_UP_3 +166 0x1000 //RX_TDDRC_ALPHA_UP_4 +184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +190 0x7000 //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +269 0x0001 //RX_TDDRC_THRD_0 +270 0x0002 //RX_TDDRC_THRD_1 +271 0x1800 //RX_TDDRC_THRD_2 +272 0x1800 //RX_TDDRC_THRD_3 +273 0x7FFF //RX_TDDRC_SLANT_0 +274 0x7FFF //RX_TDDRC_SLANT_1 +275 0x1000 //RX_TDDRC_ALPHA_UP_0 +276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x199A //RX_TDDRC_HMNC_GAIN +279 0x0001 //RX_TDDRC_SMT_FLAG +280 0x0CCD //RX_TDDRC_SMT_W +281 0x0551 //RX_TDDRC_DRC_GAIN +195 0x0020 //RX_FDEQ_SUBNUM +196 0x483E //RX_FDEQ_GAIN_0 +197 0x3E3E //RX_FDEQ_GAIN_1 +198 0x3E4C //RX_FDEQ_GAIN_2 +199 0x5064 //RX_FDEQ_GAIN_3 +200 0x7076 //RX_FDEQ_GAIN_4 +201 0x897A //RX_FDEQ_GAIN_5 +202 0x7C80 //RX_FDEQ_GAIN_6 +203 0x8888 //RX_FDEQ_GAIN_7 +204 0x949C //RX_FDEQ_GAIN_8 +205 0x96A4 //RX_FDEQ_GAIN_9 +206 0xA9A0 //RX_FDEQ_GAIN_10 +207 0x9487 //RX_FDEQ_GAIN_11 +208 0x6F64 //RX_FDEQ_GAIN_12 +209 0x625A //RX_FDEQ_GAIN_13 +210 0x5D80 //RX_FDEQ_GAIN_14 +211 0x8890 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0202 //RX_FDEQ_BIN_0 +221 0x0202 //RX_FDEQ_BIN_1 +222 0x0301 //RX_FDEQ_BIN_2 +223 0x0404 //RX_FDEQ_BIN_3 +224 0x0406 //RX_FDEQ_BIN_4 +225 0x0109 //RX_FDEQ_BIN_5 +226 0x0708 //RX_FDEQ_BIN_6 +227 0x090A //RX_FDEQ_BIN_7 +228 0x0B0C //RX_FDEQ_BIN_8 +229 0x0D0E //RX_FDEQ_BIN_9 +230 0x1013 //RX_FDEQ_BIN_10 +231 0x1719 //RX_FDEQ_BIN_11 +232 0x1B0F //RX_FDEQ_BIN_12 +233 0x141E //RX_FDEQ_BIN_13 +234 0x3728 //RX_FDEQ_BIN_14 +235 0x282C //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x4000 //RX_FDEQ_RESRV_0 +245 0x0320 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0030 //RX_FDDRC_BAND_MARGIN_1 +248 0x0050 //RX_FDDRC_BAND_MARGIN_2 +249 0x0080 //RX_FDDRC_BAND_MARGIN_3 +250 0x0007 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x5000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x6400 //RX_FDDRC_THRD_3_2 +258 0x6400 //RX_FDDRC_THRD_3_3 +259 0x2000 //RX_FDDRC_SLANT_0_0 +260 0x2000 //RX_FDDRC_SLANT_0_1 +261 0x2000 //RX_FDDRC_SLANT_0_2 +262 0x2000 //RX_FDDRC_SLANT_0_3 +263 0x5333 //RX_FDDRC_SLANT_1_0 +264 0x5333 //RX_FDDRC_SLANT_1_1 +265 0x5333 //RX_FDDRC_SLANT_1_2 +266 0x5333 //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +286 0x001B //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 +#VOL 3 +163 0x1000 //RX_TDDRC_ALPHA_UP_1 +164 0x1000 //RX_TDDRC_ALPHA_UP_2 +165 0x1000 //RX_TDDRC_ALPHA_UP_3 +166 0x1000 //RX_TDDRC_ALPHA_UP_4 +184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +190 0x7000 //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +269 0x0001 //RX_TDDRC_THRD_0 +270 0x0002 //RX_TDDRC_THRD_1 +271 0x1800 //RX_TDDRC_THRD_2 +272 0x1800 //RX_TDDRC_THRD_3 +273 0x7FFF //RX_TDDRC_SLANT_0 +274 0x7FFF //RX_TDDRC_SLANT_1 +275 0x1000 //RX_TDDRC_ALPHA_UP_0 +276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x199A //RX_TDDRC_HMNC_GAIN +279 0x0001 //RX_TDDRC_SMT_FLAG +280 0x0CCD //RX_TDDRC_SMT_W +281 0x0551 //RX_TDDRC_DRC_GAIN +195 0x0020 //RX_FDEQ_SUBNUM +196 0x483E //RX_FDEQ_GAIN_0 +197 0x3E3E //RX_FDEQ_GAIN_1 +198 0x3E4C //RX_FDEQ_GAIN_2 +199 0x5064 //RX_FDEQ_GAIN_3 +200 0x7076 //RX_FDEQ_GAIN_4 +201 0x897A //RX_FDEQ_GAIN_5 +202 0x7C80 //RX_FDEQ_GAIN_6 +203 0x8888 //RX_FDEQ_GAIN_7 +204 0x949C //RX_FDEQ_GAIN_8 +205 0x96A4 //RX_FDEQ_GAIN_9 +206 0xA9A0 //RX_FDEQ_GAIN_10 +207 0x9487 //RX_FDEQ_GAIN_11 +208 0x6F64 //RX_FDEQ_GAIN_12 +209 0x625A //RX_FDEQ_GAIN_13 +210 0x5D80 //RX_FDEQ_GAIN_14 +211 0x8890 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0202 //RX_FDEQ_BIN_0 +221 0x0202 //RX_FDEQ_BIN_1 +222 0x0301 //RX_FDEQ_BIN_2 +223 0x0404 //RX_FDEQ_BIN_3 +224 0x0406 //RX_FDEQ_BIN_4 +225 0x0109 //RX_FDEQ_BIN_5 +226 0x0708 //RX_FDEQ_BIN_6 +227 0x090A //RX_FDEQ_BIN_7 +228 0x0B0C //RX_FDEQ_BIN_8 +229 0x0D0E //RX_FDEQ_BIN_9 +230 0x1013 //RX_FDEQ_BIN_10 +231 0x1719 //RX_FDEQ_BIN_11 +232 0x1B0F //RX_FDEQ_BIN_12 +233 0x141E //RX_FDEQ_BIN_13 +234 0x3728 //RX_FDEQ_BIN_14 +235 0x282C //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x4000 //RX_FDEQ_RESRV_0 +245 0x0320 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0030 //RX_FDDRC_BAND_MARGIN_1 +248 0x0050 //RX_FDDRC_BAND_MARGIN_2 +249 0x0080 //RX_FDDRC_BAND_MARGIN_3 +250 0x0007 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x5000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x6400 //RX_FDDRC_THRD_3_2 +258 0x6400 //RX_FDDRC_THRD_3_3 +259 0x2000 //RX_FDDRC_SLANT_0_0 +260 0x2000 //RX_FDDRC_SLANT_0_1 +261 0x2000 //RX_FDDRC_SLANT_0_2 +262 0x2000 //RX_FDDRC_SLANT_0_3 +263 0x5333 //RX_FDDRC_SLANT_1_0 +264 0x5333 //RX_FDDRC_SLANT_1_1 +265 0x5333 //RX_FDDRC_SLANT_1_2 +266 0x5333 //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +286 0x0032 //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 +#VOL 4 +163 0x1000 //RX_TDDRC_ALPHA_UP_1 +164 0x1000 //RX_TDDRC_ALPHA_UP_2 +165 0x1000 //RX_TDDRC_ALPHA_UP_3 +166 0x1000 //RX_TDDRC_ALPHA_UP_4 +184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +190 0x7000 //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +269 0x0001 //RX_TDDRC_THRD_0 +270 0x0002 //RX_TDDRC_THRD_1 +271 0x1800 //RX_TDDRC_THRD_2 +272 0x1800 //RX_TDDRC_THRD_3 +273 0x7FFF //RX_TDDRC_SLANT_0 +274 0x7FFF //RX_TDDRC_SLANT_1 +275 0x1000 //RX_TDDRC_ALPHA_UP_0 +276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x199A //RX_TDDRC_HMNC_GAIN +279 0x0001 //RX_TDDRC_SMT_FLAG +280 0x0CCD //RX_TDDRC_SMT_W +281 0x0551 //RX_TDDRC_DRC_GAIN +195 0x0020 //RX_FDEQ_SUBNUM +196 0x483E //RX_FDEQ_GAIN_0 +197 0x3E3E //RX_FDEQ_GAIN_1 +198 0x3E4C //RX_FDEQ_GAIN_2 +199 0x5064 //RX_FDEQ_GAIN_3 +200 0x7076 //RX_FDEQ_GAIN_4 +201 0x897A //RX_FDEQ_GAIN_5 +202 0x7C80 //RX_FDEQ_GAIN_6 +203 0x8888 //RX_FDEQ_GAIN_7 +204 0x949C //RX_FDEQ_GAIN_8 +205 0x96A4 //RX_FDEQ_GAIN_9 +206 0xA9A0 //RX_FDEQ_GAIN_10 +207 0x9487 //RX_FDEQ_GAIN_11 +208 0x6F64 //RX_FDEQ_GAIN_12 +209 0x625A //RX_FDEQ_GAIN_13 +210 0x5D80 //RX_FDEQ_GAIN_14 +211 0x8890 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0202 //RX_FDEQ_BIN_0 +221 0x0202 //RX_FDEQ_BIN_1 +222 0x0301 //RX_FDEQ_BIN_2 +223 0x0404 //RX_FDEQ_BIN_3 +224 0x0406 //RX_FDEQ_BIN_4 +225 0x0109 //RX_FDEQ_BIN_5 +226 0x0708 //RX_FDEQ_BIN_6 +227 0x090A //RX_FDEQ_BIN_7 +228 0x0B0C //RX_FDEQ_BIN_8 +229 0x0D0E //RX_FDEQ_BIN_9 +230 0x1013 //RX_FDEQ_BIN_10 +231 0x1719 //RX_FDEQ_BIN_11 +232 0x1B0F //RX_FDEQ_BIN_12 +233 0x141E //RX_FDEQ_BIN_13 +234 0x3728 //RX_FDEQ_BIN_14 +235 0x282C //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x4000 //RX_FDEQ_RESRV_0 +245 0x0320 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0030 //RX_FDDRC_BAND_MARGIN_1 +248 0x0050 //RX_FDDRC_BAND_MARGIN_2 +249 0x0080 //RX_FDDRC_BAND_MARGIN_3 +250 0x0007 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x5000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x6400 //RX_FDDRC_THRD_3_2 +258 0x6400 //RX_FDDRC_THRD_3_3 +259 0x2000 //RX_FDDRC_SLANT_0_0 +260 0x2000 //RX_FDDRC_SLANT_0_1 +261 0x2000 //RX_FDDRC_SLANT_0_2 +262 0x2000 //RX_FDDRC_SLANT_0_3 +263 0x5333 //RX_FDDRC_SLANT_1_0 +264 0x5333 //RX_FDDRC_SLANT_1_1 +265 0x5333 //RX_FDDRC_SLANT_1_2 +266 0x5333 //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +286 0x0047 //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 +#VOL 5 +163 0x1000 //RX_TDDRC_ALPHA_UP_1 +164 0x1000 //RX_TDDRC_ALPHA_UP_2 +165 0x1000 //RX_TDDRC_ALPHA_UP_3 +166 0x1000 //RX_TDDRC_ALPHA_UP_4 +184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +190 0x7000 //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +269 0x0001 //RX_TDDRC_THRD_0 +270 0x0002 //RX_TDDRC_THRD_1 +271 0x1800 //RX_TDDRC_THRD_2 +272 0x1800 //RX_TDDRC_THRD_3 +273 0x7FFF //RX_TDDRC_SLANT_0 +274 0x7FFF //RX_TDDRC_SLANT_1 +275 0x1000 //RX_TDDRC_ALPHA_UP_0 +276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x199A //RX_TDDRC_HMNC_GAIN +279 0x0001 //RX_TDDRC_SMT_FLAG +280 0x0CCD //RX_TDDRC_SMT_W +281 0x0551 //RX_TDDRC_DRC_GAIN +195 0x0020 //RX_FDEQ_SUBNUM +196 0x483E //RX_FDEQ_GAIN_0 +197 0x3E3E //RX_FDEQ_GAIN_1 +198 0x3E4C //RX_FDEQ_GAIN_2 +199 0x5064 //RX_FDEQ_GAIN_3 +200 0x7076 //RX_FDEQ_GAIN_4 +201 0x897A //RX_FDEQ_GAIN_5 +202 0x7C80 //RX_FDEQ_GAIN_6 +203 0x8888 //RX_FDEQ_GAIN_7 +204 0x949C //RX_FDEQ_GAIN_8 +205 0x96A4 //RX_FDEQ_GAIN_9 +206 0xA9A0 //RX_FDEQ_GAIN_10 +207 0x9487 //RX_FDEQ_GAIN_11 +208 0x6F64 //RX_FDEQ_GAIN_12 +209 0x625A //RX_FDEQ_GAIN_13 +210 0x5D80 //RX_FDEQ_GAIN_14 +211 0x8890 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0202 //RX_FDEQ_BIN_0 +221 0x0202 //RX_FDEQ_BIN_1 +222 0x0301 //RX_FDEQ_BIN_2 +223 0x0404 //RX_FDEQ_BIN_3 +224 0x0406 //RX_FDEQ_BIN_4 +225 0x0109 //RX_FDEQ_BIN_5 +226 0x0708 //RX_FDEQ_BIN_6 +227 0x090A //RX_FDEQ_BIN_7 +228 0x0B0C //RX_FDEQ_BIN_8 +229 0x0D0E //RX_FDEQ_BIN_9 +230 0x1013 //RX_FDEQ_BIN_10 +231 0x1719 //RX_FDEQ_BIN_11 +232 0x1B0F //RX_FDEQ_BIN_12 +233 0x141E //RX_FDEQ_BIN_13 +234 0x3728 //RX_FDEQ_BIN_14 +235 0x282C //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x4000 //RX_FDEQ_RESRV_0 +245 0x0320 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0030 //RX_FDDRC_BAND_MARGIN_1 +248 0x0050 //RX_FDDRC_BAND_MARGIN_2 +249 0x0080 //RX_FDDRC_BAND_MARGIN_3 +250 0x0007 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x5000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x6400 //RX_FDDRC_THRD_3_2 +258 0x6400 //RX_FDDRC_THRD_3_3 +259 0x2000 //RX_FDDRC_SLANT_0_0 +260 0x2000 //RX_FDDRC_SLANT_0_1 +261 0x2000 //RX_FDDRC_SLANT_0_2 +262 0x2000 //RX_FDDRC_SLANT_0_3 +263 0x5333 //RX_FDDRC_SLANT_1_0 +264 0x5333 //RX_FDDRC_SLANT_1_1 +265 0x5333 //RX_FDDRC_SLANT_1_2 +266 0x5333 //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +286 0x0076 //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 +#VOL 6 +163 0x1000 //RX_TDDRC_ALPHA_UP_1 +164 0x1000 //RX_TDDRC_ALPHA_UP_2 +165 0x1000 //RX_TDDRC_ALPHA_UP_3 +166 0x1000 //RX_TDDRC_ALPHA_UP_4 +184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +190 0x7000 //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +269 0x0001 //RX_TDDRC_THRD_0 +270 0x0002 //RX_TDDRC_THRD_1 +271 0x1800 //RX_TDDRC_THRD_2 +272 0x1800 //RX_TDDRC_THRD_3 +273 0x7FFF //RX_TDDRC_SLANT_0 +274 0x7FFF //RX_TDDRC_SLANT_1 +275 0x1000 //RX_TDDRC_ALPHA_UP_0 +276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x199A //RX_TDDRC_HMNC_GAIN +279 0x0001 //RX_TDDRC_SMT_FLAG +280 0x0CCD //RX_TDDRC_SMT_W +281 0x0551 //RX_TDDRC_DRC_GAIN +195 0x0020 //RX_FDEQ_SUBNUM +196 0x483E //RX_FDEQ_GAIN_0 +197 0x3E3E //RX_FDEQ_GAIN_1 +198 0x3E4C //RX_FDEQ_GAIN_2 +199 0x5064 //RX_FDEQ_GAIN_3 +200 0x7076 //RX_FDEQ_GAIN_4 +201 0x897A //RX_FDEQ_GAIN_5 +202 0x7C80 //RX_FDEQ_GAIN_6 +203 0x8888 //RX_FDEQ_GAIN_7 +204 0x949C //RX_FDEQ_GAIN_8 +205 0x96A4 //RX_FDEQ_GAIN_9 +206 0xA9A0 //RX_FDEQ_GAIN_10 +207 0x9487 //RX_FDEQ_GAIN_11 +208 0x6F64 //RX_FDEQ_GAIN_12 +209 0x625A //RX_FDEQ_GAIN_13 +210 0x5D80 //RX_FDEQ_GAIN_14 +211 0x8890 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0202 //RX_FDEQ_BIN_0 +221 0x0202 //RX_FDEQ_BIN_1 +222 0x0301 //RX_FDEQ_BIN_2 +223 0x0404 //RX_FDEQ_BIN_3 +224 0x0406 //RX_FDEQ_BIN_4 +225 0x0109 //RX_FDEQ_BIN_5 +226 0x0708 //RX_FDEQ_BIN_6 +227 0x090A //RX_FDEQ_BIN_7 +228 0x0B0C //RX_FDEQ_BIN_8 +229 0x0D0E //RX_FDEQ_BIN_9 +230 0x1013 //RX_FDEQ_BIN_10 +231 0x1719 //RX_FDEQ_BIN_11 +232 0x1B0F //RX_FDEQ_BIN_12 +233 0x141E //RX_FDEQ_BIN_13 +234 0x3728 //RX_FDEQ_BIN_14 +235 0x282C //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x4000 //RX_FDEQ_RESRV_0 +245 0x0320 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0030 //RX_FDDRC_BAND_MARGIN_1 +248 0x0050 //RX_FDDRC_BAND_MARGIN_2 +249 0x0080 //RX_FDDRC_BAND_MARGIN_3 +250 0x0007 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x5000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x6400 //RX_FDDRC_THRD_3_2 +258 0x6400 //RX_FDDRC_THRD_3_3 +259 0x2000 //RX_FDDRC_SLANT_0_0 +260 0x2000 //RX_FDDRC_SLANT_0_1 +261 0x2000 //RX_FDDRC_SLANT_0_2 +262 0x2000 //RX_FDDRC_SLANT_0_3 +263 0x5333 //RX_FDDRC_SLANT_1_0 +264 0x5333 //RX_FDDRC_SLANT_1_1 +265 0x5333 //RX_FDDRC_SLANT_1_2 +266 0x5333 //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +286 0x0100 //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 + +#CASE_NAME HANDSET-HANDSET-RESERVE1-SWB +#PARAM_MODE Simple +#PARAM_TYPE TX+2RX +#TOTAL_CUSTOM_STEP 7+7 +#TX +0 0x0000 //TX_OPERATION_MODE_0 +1 0x0000 //TX_OPERATION_MODE_1 +2 0x0076 //TX_PATCH_REG +3 0x6F56 //TX_SENDFUNC_MODE_0 +4 0x0001 //TX_SENDFUNC_MODE_1 +5 0x0002 //TX_NUM_MIC +6 0x0003 //TX_SAMPLINGFREQ_SIG +7 0x0003 //TX_SAMPLINGFREQ_PROC +8 0x000A //TX_FRAME_SZ_SIG +9 0x000A //TX_FRAME_SZ +10 0x0000 //TX_DELAY_OPT +11 0x0028 //TX_MAX_TAIL_LENGTH +12 0x0001 //TX_NUM_LOUTCHN +13 0x0001 //TX_MAXNUM_AECREF +14 0x0000 //TX_DBG_FUNC_REG +15 0x0000 //TX_DBG_FUNC_REG1 +16 0x0000 //TX_SYS_RESRV_0 +17 0x0000 //TX_SYS_RESRV_1 +18 0x0000 //TX_SYS_RESRV_2 +19 0x0000 //TX_SYS_RESRV_3 +20 0x0000 //TX_DIST2REF0 +21 0x00A3 //TX_DIST2REF1 +22 0x0000 //TX_DIST2REF_02 +23 0x0000 //TX_DIST2REF_03 +24 0x0000 //TX_DIST2REF_04 +25 0x0000 //TX_DIST2REF_05 +26 0x0000 //TX_MMIC +27 0x1000 //TX_PGA_0 +28 0x1000 //TX_PGA_1 +29 0x1000 //TX_PGA_2 +30 0x0000 //TX_PGA_3 +31 0x0000 //TX_PGA_4 +32 0x0000 //TX_PGA_5 +33 0x0000 //TX_MIC_PAIRS +34 0x0000 //TX_MIC_PAIRS_HS +35 0x0002 //TX_MICS_FOR_BF +36 0x0000 //TX_MIC_PAIRS_FORL1 +37 0x0002 //TX_MICS_OF_PAIR0 +38 0x0002 //TX_MICS_OF_PAIR1 +39 0x0002 //TX_MICS_OF_PAIR2 +40 0x0002 //TX_MICS_OF_PAIR3 +41 0x0000 //TX_MIC_DATA_SRC0 +42 0x0002 //TX_MIC_DATA_SRC1 +43 0x0001 //TX_MIC_DATA_SRC2 +44 0x0000 //TX_MIC_DATA_SRC3 +45 0x0000 //TX_MIC_PAIR_CH_04 +46 0x0000 //TX_MIC_PAIR_CH_05 +47 0x0000 //TX_MIC_PAIR_CH_10 +48 0x0000 //TX_MIC_PAIR_CH_11 +49 0x0000 //TX_MIC_PAIR_CH_12 +50 0x0000 //TX_MIC_PAIR_CH_13 +51 0x0000 //TX_MIC_PAIR_CH_14 +52 0x05DC //TX_HD_BIN_MASK +53 0x0010 //TX_HD_SUBAND_MASK +54 0x19A1 //TX_HD_FRAME_AVG_MASK +55 0x0320 //TX_HD_MIN_FRQ +56 0x1000 //TX_HD_ALPHA_PSD +57 0x1100 //TX_T_PHPR1 +58 0x0000 //TX_T_PHPR2 +59 0x0000 //TX_T_PTPR +60 0x0000 //TX_T_PNPR +61 0x0000 //TX_T_PAPR1 +62 0xEE6C //TX_T_PSDVAT +63 0x0800 //TX_CNT +64 0x4000 //TX_ANTI_HOWL_GAIN +65 0x0001 //TX_MICFORBFMARK_0 +66 0x0001 //TX_MICFORBFMARK_1 +67 0x0001 //TX_MICFORBFMARK_2 +68 0x0001 //TX_MICFORBFMARK_3 +69 0x0001 //TX_MICFORBFMARK_4 +70 0x0001 //TX_MICFORBFMARK_5 +71 0x0000 //TX_DIST2REF_10 +72 0x3A66 //TX_DIST2REF_11 +73 0x0000 //TX_DIST2REF2 +74 0x0000 //TX_DIST2REF_13 +75 0x0000 //TX_DIST2REF_14 +76 0x0000 //TX_DIST2REF_15 +77 0x0000 //TX_DIST2REF_20 +78 0x0000 //TX_DIST2REF_21 +79 0x0000 //TX_DIST2REF_22 +80 0x0000 //TX_DIST2REF_23 +81 0x0000 //TX_DIST2REF_24 +82 0x0000 //TX_DIST2REF_25 +83 0x0000 //TX_DIST2REF_30 +84 0x0000 //TX_DIST2REF_31 +85 0x0000 //TX_DIST2REF_32 +86 0x0000 //TX_DIST2REF_33 +87 0x0000 //TX_DIST2REF_34 +88 0x0000 //TX_DIST2REF_35 +89 0x0000 //TX_MIC_LOC_00 +90 0x0000 //TX_MIC_LOC_01 +91 0x0000 //TX_MIC_LOC_02 +92 0x0000 //TX_MIC_LOC_03 +93 0x0000 //TX_MIC_LOC_04 +94 0x0000 //TX_MIC_LOC_05 +95 0x0000 //TX_MIC_LOC_10 +96 0x0000 //TX_MIC_LOC_11 +97 0x0000 //TX_MIC_LOC_12 +98 0x0000 //TX_MIC_LOC_13 +99 0x0000 //TX_MIC_LOC_14 +100 0x0000 //TX_MIC_LOC_15 +101 0x0000 //TX_MIC_LOC_20 +102 0x0000 //TX_MIC_LOC_21 +103 0x0000 //TX_MIC_LOC_22 +104 0x0000 //TX_MIC_LOC_23 +105 0x0000 //TX_MIC_LOC_24 +106 0x0000 //TX_MIC_LOC_25 +107 0x0200 //TX_MIC_REFBLK_VOLUME +108 0x0AAC //TX_MIC_BLOCK_VOLUME +109 0x0000 //TX_INVERSE_MASK +110 0x0000 //TX_ADCS_MASK +111 0x04D0 //TX_ADCS_GAIN +112 0x4000 //TX_NFC_GAINFAC +113 0x0000 //TX_MAINMIC_BLKFACTOR +114 0x0000 //TX_REFMIC_BLKFACTOR +115 0x0000 //TX_BLMIC_BLKFACTOR +116 0x0000 //TX_BRMIC_BLKFACTOR +117 0x0031 //TX_MICBLK_START_BIN +118 0x0060 //TX_MICBLK_END_BIN +119 0x0015 //TX_MICBLK_FE_HOLD +120 0xFFF2 //TX_MICBLK_MR_EXP_TH +121 0xFFF2 //TX_MICBLK_LR_EXP_TH +122 0x0000 //TX_FENE_HOLD +123 0x4000 //TX_FE_ENER_TH_MTS +124 0x0004 //TX_FE_ENER_TH_EXP +125 0x6000 //TX_C_POST_FLT_MIC_MAINBLK +126 0x6000 //TX_C_POST_FLT_MIC_REFBLK +127 0x0010 //TX_MIC_BLOCK_N +128 0x7E56 //TX_A_HP +129 0x4000 //TX_B_PE +130 0x1800 //TX_THR_PITCH_DET_0 +131 0x1000 //TX_THR_PITCH_DET_1 +132 0x0800 //TX_THR_PITCH_DET_2 +133 0x0008 //TX_PITCH_BFR_LEN +134 0x0003 //TX_SBD_PITCH_DET +135 0x0050 //TX_TD_AEC_L +136 0x4000 //TX_MU0_UNP_TD_AEC +137 0x1000 //TX_MU0_PTD_TD_AEC +138 0x0000 //TX_PP_RESRV_0 +139 0x2A94 //TX_PP_RESRV_1 +140 0x55F0 //TX_PP_RESRV_2 +141 0x0000 //TX_PP_RESRV_3 +142 0x0000 //TX_PP_RESRV_4 +143 0x0000 //TX_PP_RESRV_5 +144 0x0000 //TX_PP_RESRV_6 +145 0x0000 //TX_PP_RESRV_7 +146 0x0028 //TX_TAIL_LENGTH +147 0x0080 //TX_AEC_REF_GAIN_0 +148 0x0800 //TX_AEC_REF_GAIN_1 +149 0x0800 //TX_AEC_REF_GAIN_2 +150 0x7900 //TX_EAD_THR +151 0x2000 //TX_THR_RE_EST +152 0x0400 //TX_MIN_EQ_RE_EST_0 +153 0x0400 //TX_MIN_EQ_RE_EST_1 +154 0x0800 //TX_MIN_EQ_RE_EST_2 +155 0x0800 //TX_MIN_EQ_RE_EST_3 +156 0x1000 //TX_MIN_EQ_RE_EST_4 +157 0x1000 //TX_MIN_EQ_RE_EST_5 +158 0x1000 //TX_MIN_EQ_RE_EST_6 +159 0x1000 //TX_MIN_EQ_RE_EST_7 +160 0x1000 //TX_MIN_EQ_RE_EST_8 +161 0x1000 //TX_MIN_EQ_RE_EST_9 +162 0x1000 //TX_MIN_EQ_RE_EST_10 +163 0x1000 //TX_MIN_EQ_RE_EST_11 +164 0x1000 //TX_MIN_EQ_RE_EST_12 +165 0x3000 //TX_LAMBDA_RE_EST +166 0x1000 //TX_LAMBDA_CB_NLE +167 0x1800 //TX_C_POST_FLT +168 0x4000 //TX_GAIN_NP +169 0x003C //TX_SE_HOLD_N +170 0x0046 //TX_DT_HOLD_N +171 0x03E8 //TX_DT2_HOLD_N +172 0x6666 //TX_AEC_RESRV_0 +173 0x0000 //TX_AEC_RESRV_1 +174 0x0014 //TX_AEC_RESRV_2 +175 0x0000 //TX_MIC_DELAY_LENGTH +176 0x0000 //TX_REF_DELAY_LENGTH +177 0x0000 //TX_ADD_LINEIN_GAINL +178 0x0000 //TX_ADD_LINEIN_GAINH +179 0x0000 //TX_MIN_EQ_RE_EST_14 +180 0x0000 //TX_DTD_THR1_8 +181 0x7FFF //TX_DTD_THR2_8 +182 0x0000 //TX_DTD_MIC_BLK2 +183 0x0008 //TX_FRQ_LIN_LEN +184 0x7FFF //TX_FRQ_AEC_LEN_RHO +185 0x6000 //TX_MU0_UNP_FRQ_AEC +186 0x4000 //TX_MU0_PTD_FRQ_AEC +187 0x000A //TX_MINENOISETH +188 0x0800 //TX_MU0_RE_EST +189 0x0001 //TX_AEC_NUM_CH +190 0x0000 //TX_BIGECHOATTENUATION_MAX +191 0x2000 //TX_A_POST_FLT_MICBLK +192 0x0000 //TX_BLKENERTH +193 0x0000 //TX_BLKENERHIGHTH +194 0x0000 //TX_NORMENERTH +195 0x0000 //TX_NORMENERHIGHTH +196 0x0000 //TX_NORMENERHIGHTHL +197 0x7000 //TX_DTD_THR1_0 +198 0x7000 //TX_DTD_THR1_1 +199 0x7000 //TX_DTD_THR1_2 +200 0x7F00 //TX_DTD_THR1_3 +201 0x7F00 //TX_DTD_THR1_4 +202 0x7F00 //TX_DTD_THR1_5 +203 0x7F00 //TX_DTD_THR1_6 +204 0x2000 //TX_DTD_THR2_0 +205 0x2000 //TX_DTD_THR2_1 +206 0x2000 //TX_DTD_THR2_2 +207 0x1000 //TX_DTD_THR2_3 +208 0x1000 //TX_DTD_THR2_4 +209 0x1000 //TX_DTD_THR2_5 +210 0x1000 //TX_DTD_THR2_6 +211 0x6000 //TX_DTD_THR3 +212 0x0177 //TX_SPK_CUT_K +213 0x1B58 //TX_DT_CUT_K +214 0x0100 //TX_DT_CUT_THR +215 0x04EB //TX_COMFORT_G +216 0x01F4 //TX_POWER_YOUT_TH +217 0x4000 //TX_FDPFGAINECHO +218 0x0000 //TX_DTD_HD_THR +219 0x0000 //TX_SPK_CUT_K_S +220 0x0000 //TX_DTD_MIC_BLK +221 0x0400 //TX_ADPT_STRICT_L +222 0x0200 //TX_ADPT_STRICT_H +223 0x0C00 //TX_RATIO_DT_L_TH_LOW +224 0x2000 //TX_RATIO_DT_H_TH_LOW +225 0x1800 //TX_RATIO_DT_L_TH_HIGH +226 0x3000 //TX_RATIO_DT_H_TH_HIGH +227 0x0A00 //TX_RATIO_DT_L0_TH +228 0x7000 //TX_B_POST_FILT_ECHO_L +229 0x7FFF //TX_B_POST_FILT_ECHO_H +230 0x0200 //TX_MIN_G_CTRL_ECHO +231 0x7FFF //TX_B_LESSCUT_RTO_ECHO +232 0x0000 //TX_EPD_OFFSET_00 +233 0x0000 //TX_EPD_OFFST_01 +234 0x1388 //TX_RATIO_DT_L0_TH_HIGH +235 0x3A98 //TX_RATIO_DT_H_TH_CUT +236 0x7FFF //TX_MIN_EQ_RE_EST_13 +237 0x0000 //TX_DTD_THR1_7 +238 0x0000 //TX_DTD_THR2_7 +239 0x0800 //TX_DT_RESRV_7 +240 0x0800 //TX_DT_RESRV_8 +241 0x0000 //TX_DT_RESRV_9 +242 0xF600 //TX_THR_SN_EST_0 +243 0xFA00 //TX_THR_SN_EST_1 +244 0xFA00 //TX_THR_SN_EST_2 +245 0xF800 //TX_THR_SN_EST_3 +246 0xF800 //TX_THR_SN_EST_4 +247 0xF800 //TX_THR_SN_EST_5 +248 0xF800 //TX_THR_SN_EST_6 +249 0xF700 //TX_THR_SN_EST_7 +250 0x0000 //TX_DELTA_THR_SN_EST_0 +251 0x0200 //TX_DELTA_THR_SN_EST_1 +252 0x0200 //TX_DELTA_THR_SN_EST_2 +253 0x0200 //TX_DELTA_THR_SN_EST_3 +254 0x0100 //TX_DELTA_THR_SN_EST_4 +255 0x0200 //TX_DELTA_THR_SN_EST_5 +256 0x0100 //TX_DELTA_THR_SN_EST_6 +257 0x0200 //TX_DELTA_THR_SN_EST_7 +258 0x4000 //TX_LAMBDA_NN_EST_0 +259 0x4000 //TX_LAMBDA_NN_EST_1 +260 0x4000 //TX_LAMBDA_NN_EST_2 +261 0x4000 //TX_LAMBDA_NN_EST_3 +262 0x4000 //TX_LAMBDA_NN_EST_4 +263 0x4000 //TX_LAMBDA_NN_EST_5 +264 0x4000 //TX_LAMBDA_NN_EST_6 +265 0x4000 //TX_LAMBDA_NN_EST_7 +266 0x0400 //TX_N_SN_EST +267 0x001E //TX_INBEAM_T +268 0x0041 //TX_INBEAMHOLDT +269 0x2000 //TX_G_STRICT +270 0x2000 //TX_EQ_THR_BF +271 0x799A //TX_LAMBDA_EQ_BF +272 0x1000 //TX_NE_RTO_TH +273 0x1000 //TX_NE_RTO_TH_L +274 0x1000 //TX_MAINREFRTOH_TH_H +275 0x0600 //TX_MAINREFRTOH_TH_L +276 0x2000 //TX_MAINREFRTO_TH_H +277 0x1400 //TX_MAINREFRTO_TH_L +278 0x0000 //TX_MAINREFRTO_TH_EQ +279 0x1000 //TX_B_POST_FLT_0 +280 0x1000 //TX_B_POST_FLT_1 +281 0x0014 //TX_NS_LVL_CTRL_0 +282 0x002C //TX_NS_LVL_CTRL_1 +283 0x0016 //TX_NS_LVL_CTRL_2 +284 0x0018 //TX_NS_LVL_CTRL_3 +285 0x0016 //TX_NS_LVL_CTRL_4 +286 0x0012 //TX_NS_LVL_CTRL_5 +287 0x0016 //TX_NS_LVL_CTRL_6 +288 0x0017 //TX_NS_LVL_CTRL_7 +289 0x000E //TX_MIN_GAIN_S_0 +290 0x000D //TX_MIN_GAIN_S_1 +291 0x0012 //TX_MIN_GAIN_S_2 +292 0x0010 //TX_MIN_GAIN_S_3 +293 0x0012 //TX_MIN_GAIN_S_4 +294 0x0012 //TX_MIN_GAIN_S_5 +295 0x0012 //TX_MIN_GAIN_S_6 +296 0x0012 //TX_MIN_GAIN_S_7 +297 0x6000 //TX_NMOS_SUP +298 0x0000 //TX_NS_MAX_PRI_SNR_TH +299 0x0000 //TX_NMOS_SUP_MENSA +300 0x7FFF //TX_SNRI_SUP_0 +301 0x6000 //TX_SNRI_SUP_1 +302 0x6000 //TX_SNRI_SUP_2 +303 0x6000 //TX_SNRI_SUP_3 +304 0x6000 //TX_SNRI_SUP_4 +305 0x6000 //TX_SNRI_SUP_5 +306 0x6000 //TX_SNRI_SUP_6 +307 0x6000 //TX_SNRI_SUP_7 +308 0x6000 //TX_THR_LFNS +309 0x0017 //TX_G_LFNS +310 0x09C4 //TX_GAIN0_NTH +311 0x000A //TX_MUSIC_MORENS +312 0x7FFF //TX_A_POST_FILT_0 +313 0x2000 //TX_A_POST_FILT_1 +314 0x4000 //TX_A_POST_FILT_S_0 +315 0x4000 //TX_A_POST_FILT_S_1 +316 0x4000 //TX_A_POST_FILT_S_2 +317 0x4000 //TX_A_POST_FILT_S_3 +318 0x4000 //TX_A_POST_FILT_S_4 +319 0x4000 //TX_A_POST_FILT_S_5 +320 0x5000 //TX_A_POST_FILT_S_6 +321 0x7000 //TX_A_POST_FILT_S_7 +322 0x1000 //TX_B_POST_FILT_0 +323 0x1000 //TX_B_POST_FILT_1 +324 0x2000 //TX_B_POST_FILT_2 +325 0x2000 //TX_B_POST_FILT_3 +326 0x2000 //TX_B_POST_FILT_4 +327 0x1000 //TX_B_POST_FILT_5 +328 0x3000 //TX_B_POST_FILT_6 +329 0x3000 //TX_B_POST_FILT_7 +330 0x1000 //TX_B_LESSCUT_RTO_S_0 +331 0x1000 //TX_B_LESSCUT_RTO_S_1 +332 0x1000 //TX_B_LESSCUT_RTO_S_2 +333 0x1000 //TX_B_LESSCUT_RTO_S_3 +334 0x1000 //TX_B_LESSCUT_RTO_S_4 +335 0x1000 //TX_B_LESSCUT_RTO_S_5 +336 0x1000 //TX_B_LESSCUT_RTO_S_6 +337 0x1000 //TX_B_LESSCUT_RTO_S_7 +338 0x7E14 //TX_LAMBDA_PFILT +339 0x7C29 //TX_LAMBDA_PFILT_S_0 +340 0x7C29 //TX_LAMBDA_PFILT_S_1 +341 0x7C29 //TX_LAMBDA_PFILT_S_2 +342 0x7C29 //TX_LAMBDA_PFILT_S_3 +343 0x7C29 //TX_LAMBDA_PFILT_S_4 +344 0x7C29 //TX_LAMBDA_PFILT_S_5 +345 0x7C29 //TX_LAMBDA_PFILT_S_6 +346 0x7C29 //TX_LAMBDA_PFILT_S_7 +347 0x07D0 //TX_K_PEPPER +348 0x0800 //TX_A_PEPPER +349 0x1D4C //TX_K_PEPPER_HF +350 0x0400 //TX_A_PEPPER_HF +351 0x0001 //TX_HMNC_BST_FLG +352 0x4000 //TX_HMNC_BST_THR +353 0x0800 //TX_DT_BINVAD_TH_0 +354 0x0800 //TX_DT_BINVAD_TH_1 +355 0x0800 //TX_DT_BINVAD_TH_2 +356 0x0800 //TX_DT_BINVAD_TH_3 +357 0x0000 //TX_DT_BINVAD_ENDF +358 0x1000 //TX_C_POST_FLT_DT +359 0x7FFF //TX_NS_B_POST_FLT_LESSCUT +360 0x0100 //TX_DT_BOOST +361 0x0000 //TX_BF_SGRAD_FLG +362 0x0005 //TX_BF_DVG_TH +363 0x001E //TX_SN_C_F +364 0x0000 //TX_K_APT +365 0x0001 //TX_NOISEDET +366 0x0190 //TX_NDETCT +367 0x000A //TX_NOISE_TH_0 +368 0x7FFF //TX_NOISE_TH_0_2 +369 0x7FFF //TX_NOISE_TH_0_3 +370 0x00C6 //TX_NOISE_TH_1 +371 0x0DAC //TX_NOISE_TH_2 +372 0x2260 //TX_NOISE_TH_3 +373 0x7080 //TX_NOISE_TH_4 +374 0x57E4 //TX_NOISE_TH_5 +375 0x4BD6 //TX_NOISE_TH_5_2 +376 0x0001 //TX_NOISE_TH_5_3 +377 0x4E20 //TX_NOISE_TH_5_4 +378 0x1194 //TX_NOISE_TH_6 +379 0x0014 //TX_MINENOISE_TH +380 0xD508 //TX_MORENS_TFMASK_TH +381 0x0001 //TX_DRC_QUIET_FLOOR +382 0x6D60 //TX_RATIODTL_CUT_TH +383 0x0DAC //TX_DT_CUT_K1 +384 0x00A5 //TX_OUT_ENER_S_TH_CLEAN +385 0x00A5 //TX_OUT_ENER_S_TH_LESSCLEAN +386 0x00A5 //TX_OUT_ENER_S_TH_NOISY +387 0x0029 //TX_OUT_ENER_TH_NOISE +388 0x0200 //TX_OUT_ENER_TH_SPEECH +389 0x2000 //TX_SN_NPB_GAIN +390 0x0000 //TX_NN_NPB_GAIN +391 0x3000 //TX_POST_MASK_SUP_HSNE +392 0x07D0 //TX_TAIL_DET_TH +393 0x4000 //TX_B_LESSCUT_RTO_WTA +394 0x0000 //TX_MEL_G_R +395 0x0080 //TX_SUPHIGH_TH +396 0x0000 //TX_MASK_G_R +397 0x0002 //TX_EXTRA_NS_L +398 0x1800 //TX_C_POST_FLT_MASK +399 0x7FFF //TX_A_POST_FLT_WNS +400 0x0148 //TX_MIN_G_LOW300HZ +401 0x0004 //TX_MAXLEVEL_CNG +402 0x00B4 //TX_STN_NOISE_TH +403 0x4000 //TX_POST_MASK_SUP +404 0x7FFF //TX_POST_MASK_ADJUST +405 0x00C8 //TX_NS_ENOISE_MIC0_TH +406 0x0014 //TX_MINENOISE_MIC0_TH +407 0x012C //TX_MINENOISE_MIC0_S_TH +408 0x2900 //TX_MIN_G_CTRL_SSNS +409 0x0800 //TX_METAL_RTO_THR +410 0x0FA0 //TX_NS_FP_K_METAL +411 0x3A98 //TX_NOISEDET_BOOST_TH +412 0x0FA0 //TX_NSMOOTH_TH +413 0x0000 //TX_NS_RESRV_8 +414 0x1800 //TX_RHO_UPB +415 0x2328 //TX_N_HOLD_HS +416 0x006E //TX_N_RHO_BFR0 +417 0x7FFF //TX_LAMBDA_ARSP_EST +418 0x0100 //TX_EXTRA_GAIN_MICBLOCK +419 0x0333 //TX_THR_STD_NSR +420 0x019A //TX_THR_STD_PLH +421 0x03E8 //TX_N_HOLD_STD +422 0x0066 //TX_THR_STD_RHO +423 0x2800 //TX_BF_RESET_THR_HS +424 0x0CCD //TX_SB_RTO_MEAN_TH +425 0x0300 //TX_SB_RHO_MEAN_TH_NTALK +426 0x2000 //TX_SB_RTO_MEAN_TH_ABN +427 0x2EE0 //TX_SB_RTO_MEAN_TH_RUB +428 0x0990 //TX_WTA_EN_RTO_TH +429 0x1400 //TX_TOP_ENER_TH_F +430 0x0100 //TX_DESIRED_TALK_HOLDT +431 0x0800 //TX_MIC_BLOCK_FACTOR +432 0x0000 //TX_NSEST_BFRLRNRDC +433 0x0000 //TX_THR_POST_FLT_HS +434 0x0010 //TX_HS_VAD_BIN +435 0x2666 //TX_THR_VAD_HS +436 0x2CCD //TX_MEAN_RTO_MIN_TH2 +437 0x0032 //TX_SILENCE_T +438 0x0000 //TX_A_POST_FLT_WTA +439 0x799A //TX_LAMBDA_PFLT_WTA +440 0x051E //TX_SB_RHO_MEAN2_TH +441 0x02F0 //TX_SB_RHO_MEAN3_TH +442 0x0000 //TX_HS_RESRV_4 +443 0x0000 //TX_HS_RESRV_5 +444 0x0001 //TX_DOA_VAD_THR_1 +445 0x003C //TX_DOA_VAD_THR_2 +446 0x0028 //TX_DOA_VAD_THR1_0 +447 0x0028 //TX_DOA_VAD_THR1_1 +448 0x0000 //TX_SRC_DOA_RNG_LOW_0A +449 0x001E //TX_SRC_DOA_RNG_HIGH_0A +450 0x005A //TX_DFLT_SRC_DOA_0A +451 0x0000 //TX_SRC_DOA_RNG_LOW_0B +452 0x0000 //TX_SRC_DOA_RNG_HIGH_0B +453 0x0000 //TX_DFLT_SRC_DOA_0B +454 0x0000 //TX_SRC_DOA_RNG_LOW_0C +455 0x0000 //TX_SRC_DOA_RNG_HIGH_0C +456 0x0000 //TX_DFLT_SRC_DOA_0C +457 0x0000 //TX_SRC_DOA_RNG_LOW_0D +458 0x0000 //TX_SRC_DOA_RNG_HIGH_0D +459 0x0000 //TX_DFLT_SRC_DOA_0D +460 0x0000 //TX_SRC_DOA_RNG_LOW_1A +461 0x00B4 //TX_SRC_DOA_RNG_HIGH_1A +462 0x005A //TX_DFLT_SRC_DOA_1A +463 0x0000 //TX_SRC_DOA_RNG_LOW_1B +464 0x00B4 //TX_SRC_DOA_RNG_HIGH_1B +465 0x005A //TX_DFLT_SRC_DOA_1B +466 0x0000 //TX_SRC_DOA_RNG_LOW_1C +467 0x00B4 //TX_SRC_DOA_RNG_HIGH_1C +468 0x005A //TX_DFLT_SRC_DOA_1C +469 0x0000 //TX_SRC_DOA_RNG_LOW_1D +470 0x00B4 //TX_SRC_DOA_RNG_HIGH_1D +471 0x005A //TX_DFLT_SRC_DOA_1D +472 0x0100 //TX_BF_HOLDOFF_T +473 0x7FFF //TX_DOA_COST_FACTOR +474 0x0D9A //TX_MAINTOREFR_TH0 +475 0x071C //TX_DOA_TRK_THR +476 0x012C //TX_DOA_TRACK_HT +477 0x0200 //TX_N1_HOLD_HF +478 0x0100 //TX_N2_HOLD_HF +479 0x2A3D //TX_BF_RESET_THR_HF +480 0x7333 //TX_DOA_SMOOTH +481 0x0800 //TX_MU_BF +482 0x0800 //TX_BF_MU_LF_B2 +483 0x0040 //TX_BF_FC_END_BIN_B2 +484 0x0020 //TX_BF_FC_END_BIN +485 0x0000 //TX_HF_RESRV_25 +486 0x0000 //TX_HF_RESRV_26 +487 0x0007 //TX_N_DOA_SEED +488 0x0001 //TX_FINE_DOA_SEARCH_FLG +489 0x0000 //TX_HF_RESRV_27 +490 0x038E //TX_DLT_SRC_DOA_RNG +491 0x0200 //TX_BF_MU_LF +492 0x0000 //TX_DFLT_SRC_LOC_0 +493 0x7FFF //TX_DFLT_SRC_LOC_1 +494 0x0000 //TX_DFLT_SRC_LOC_2 +495 0x038E //TX_DOA_TRACK_VADTH +496 0x0000 //TX_DOA_TRACK_NEW +497 0x0300 //TX_NOR_OFF_THR +498 0x7C00 //TX_MORE_ON_700HZ_THR +499 0x2000 //TX_MU_BF_ADPT_NS +500 0x0000 //TX_ADAPT_LEN +501 0x6666 //TX_MORE_SNS +502 0x0000 //TX_NOR_OFF_TH1 +503 0x0000 //TX_WIDE_MASK_TH +504 0xD333 //TX_SUBSNRATIOHIGH4MEANBCK_THR +505 0x6000 //TX_C_POST_FLT_CUT +506 0x2000 //TX_RADIODTLV +507 0x0320 //TX_POWER_LINEIN_TH +508 0x0014 //TX_FE_VADCOUNT_TH_FC +509 0x0000 //TX_ECHO_SUPP_FC +510 0x0C80 //TX_ECHO_TH +511 0x6666 //TX_MIC_TO_BFGAIN +512 0x0000 //TX_MICTOBFGAIN0 +513 0x0000 //TX_FASTMUE_TH +514 0x2CCC //TX_DEREVERB_LF_MU +515 0x3200 //TX_DEREVERB_HF_MU +516 0x0007 //TX_DEREVERB_DELAY +517 0x0004 //TX_DEREVERB_COEF_LEN +518 0x0003 //TX_DEREVERB_DNR +519 0x0000 //TX_DEREVERB_ALPHA +520 0x0000 //TX_DEREVERB_BETA +521 0x3A98 //TX_GSC_RTOL_TH +522 0x3A98 //TX_GSC_RTOH_TH +523 0x7E2C //TX_WIDE2_MEANHTH +524 0x0000 //TX_DR_RESRV_5 +525 0x0000 //TX_DR_RESRV_6 +526 0x0000 //TX_DR_RESRV_7 +527 0x0000 //TX_DR_RESRV_8 +528 0x1333 //TX_WIND_MARK_TH +529 0x399A //TX_CORR_THR +530 0x0004 //TX_SNR_THR +531 0x0010 //TX_ENGY_THR +532 0x1770 //TX_CORR_HIGH_TH +533 0x6000 //TX_ENGY_THR_2 +534 0x3400 //TX_MEAN_RTO_THR +535 0x0028 //TX_WNS_ENOISE_MIC0_TH +536 0x3000 //TX_RATIOMICL_TH +537 0x7FFF //TX_CALIG_HS +538 0x0000 //TX_LVL_CTRL +539 0x0010 //TX_WIND_SUPRTO +540 0x0014 //TX_WNS_MIN_G +541 0x0600 //TX_WNS_B_POST_FLT +542 0x3000 //TX_RATIOMICH_TH +543 0xD120 //TX_WIND_INBEAM_L_TH +544 0x0FA0 //TX_WIND_INBEAM_H_TH +545 0x2000 //TX_WNS_RESRV_0 +546 0x59D8 //TX_WNS_RESRV_1 +547 0x0200 //TX_WNS_RESRV_2 +548 0x0000 //TX_WNS_RESRV_3 +549 0x0000 //TX_WNS_RESRV_4 +550 0x0000 //TX_WNS_RESRV_5 +551 0x0000 //TX_WNS_RESRV_6 +552 0x0000 //TX_PB_B_POST_FLT_LESSCUT +553 0x0070 //TX_BF_LESSCUT_BBIN +554 0x0070 //TX_BF_LESSCUT_EBIN +555 0x0010 //TX_POSTBFB0 +556 0x0070 //TX_POSTBFB +557 0x00B0 //TX_POSTBFE +558 0x0E66 //TX_SPEECH_SNR_TH +559 0x0050 //TX_PB_MAX_PRI_SNR_TH +560 0x770A //TX_MAX_PRI_SNR_TH_L +561 0x0000 //TX_PFGAIN +562 0x0000 //TX_MAINTOREFR_TH +563 0x0000 //TX_SAM_MARK +564 0x0000 //TX_PB_RESRV_0 +565 0x0000 //TX_PB_RESRV_1 +566 0x0030 //TX_FDEQ_SUBNUM +567 0x5C58 //TX_FDEQ_GAIN_0 +568 0x5048 //TX_FDEQ_GAIN_1 +569 0x4C4C //TX_FDEQ_GAIN_2 +570 0x494D //TX_FDEQ_GAIN_3 +571 0x4442 //TX_FDEQ_GAIN_4 +572 0x444C //TX_FDEQ_GAIN_5 +573 0x5053 //TX_FDEQ_GAIN_6 +574 0x6248 //TX_FDEQ_GAIN_7 +575 0x434A //TX_FDEQ_GAIN_8 +576 0x4B4D //TX_FDEQ_GAIN_9 +577 0x4C4B //TX_FDEQ_GAIN_10 +578 0x4E4A //TX_FDEQ_GAIN_11 +579 0x4842 //TX_FDEQ_GAIN_12 +580 0x4C44 //TX_FDEQ_GAIN_13 +581 0x3A4A //TX_FDEQ_GAIN_14 +582 0x6478 //TX_FDEQ_GAIN_15 +583 0x5848 //TX_FDEQ_GAIN_16 +584 0x4848 //TX_FDEQ_GAIN_17 +585 0x4848 //TX_FDEQ_GAIN_18 +586 0x4848 //TX_FDEQ_GAIN_19 +587 0x4848 //TX_FDEQ_GAIN_20 +588 0x4848 //TX_FDEQ_GAIN_21 +589 0x4848 //TX_FDEQ_GAIN_22 +590 0x4848 //TX_FDEQ_GAIN_23 +591 0x0202 //TX_FDEQ_BIN_0 +592 0x0104 //TX_FDEQ_BIN_1 +593 0x0502 //TX_FDEQ_BIN_2 +594 0x0202 //TX_FDEQ_BIN_3 +595 0x0504 //TX_FDEQ_BIN_4 +596 0x0708 //TX_FDEQ_BIN_5 +597 0x0808 //TX_FDEQ_BIN_6 +598 0x050E //TX_FDEQ_BIN_7 +599 0x0B0C //TX_FDEQ_BIN_8 +600 0x0F0F //TX_FDEQ_BIN_9 +601 0x0E0D //TX_FDEQ_BIN_10 +602 0x0F28 //TX_FDEQ_BIN_11 +603 0x110F //TX_FDEQ_BIN_12 +604 0x350F //TX_FDEQ_BIN_13 +605 0x1924 //TX_FDEQ_BIN_14 +606 0x1810 //TX_FDEQ_BIN_15 +607 0x1021 //TX_FDEQ_BIN_16 +608 0x1000 //TX_FDEQ_BIN_17 +609 0x0000 //TX_FDEQ_BIN_18 +610 0x0000 //TX_FDEQ_BIN_19 +611 0x0000 //TX_FDEQ_BIN_20 +612 0x0000 //TX_FDEQ_BIN_21 +613 0x0000 //TX_FDEQ_BIN_22 +614 0x0000 //TX_FDEQ_BIN_23 +615 0x0000 //TX_FDEQ_PADDING +616 0x0030 //TX_PREEQ_SUBNUM_MIC0 +617 0x4848 //TX_PREEQ_GAIN_MIC0_0 +618 0x4848 //TX_PREEQ_GAIN_MIC0_1 +619 0x4848 //TX_PREEQ_GAIN_MIC0_2 +620 0x4848 //TX_PREEQ_GAIN_MIC0_3 +621 0x4848 //TX_PREEQ_GAIN_MIC0_4 +622 0x4848 //TX_PREEQ_GAIN_MIC0_5 +623 0x4848 //TX_PREEQ_GAIN_MIC0_6 +624 0x4848 //TX_PREEQ_GAIN_MIC0_7 +625 0x4848 //TX_PREEQ_GAIN_MIC0_8 +626 0x4848 //TX_PREEQ_GAIN_MIC0_9 +627 0x4848 //TX_PREEQ_GAIN_MIC0_10 +628 0x4848 //TX_PREEQ_GAIN_MIC0_11 +629 0x4848 //TX_PREEQ_GAIN_MIC0_12 +630 0x4848 //TX_PREEQ_GAIN_MIC0_13 +631 0x4848 //TX_PREEQ_GAIN_MIC0_14 +632 0x4848 //TX_PREEQ_GAIN_MIC0_15 +633 0x4848 //TX_PREEQ_GAIN_MIC0_16 +634 0x4848 //TX_PREEQ_GAIN_MIC0_17 +635 0x4848 //TX_PREEQ_GAIN_MIC0_18 +636 0x4848 //TX_PREEQ_GAIN_MIC0_19 +637 0x4848 //TX_PREEQ_GAIN_MIC0_20 +638 0x4848 //TX_PREEQ_GAIN_MIC0_21 +639 0x4848 //TX_PREEQ_GAIN_MIC0_22 +640 0x4848 //TX_PREEQ_GAIN_MIC0_23 +641 0x251A //TX_PREEQ_BIN_MIC0_0 +642 0x0F0F //TX_PREEQ_BIN_MIC0_1 +643 0x0C0C //TX_PREEQ_BIN_MIC0_2 +644 0x0C0F //TX_PREEQ_BIN_MIC0_3 +645 0x0F0F //TX_PREEQ_BIN_MIC0_4 +646 0x0F09 //TX_PREEQ_BIN_MIC0_5 +647 0x0909 //TX_PREEQ_BIN_MIC0_6 +648 0x0908 //TX_PREEQ_BIN_MIC0_7 +649 0x070F //TX_PREEQ_BIN_MIC0_8 +650 0x1F08 //TX_PREEQ_BIN_MIC0_9 +651 0x0808 //TX_PREEQ_BIN_MIC0_10 +652 0x0920 //TX_PREEQ_BIN_MIC0_11 +653 0x2020 //TX_PREEQ_BIN_MIC0_12 +654 0x2021 //TX_PREEQ_BIN_MIC0_13 +655 0x0000 //TX_PREEQ_BIN_MIC0_14 +656 0x0000 //TX_PREEQ_BIN_MIC0_15 +657 0x0000 //TX_PREEQ_BIN_MIC0_16 +658 0x0000 //TX_PREEQ_BIN_MIC0_17 +659 0x0000 //TX_PREEQ_BIN_MIC0_18 +660 0x0000 //TX_PREEQ_BIN_MIC0_19 +661 0x0000 //TX_PREEQ_BIN_MIC0_20 +662 0x0000 //TX_PREEQ_BIN_MIC0_21 +663 0x0000 //TX_PREEQ_BIN_MIC0_22 +664 0x0000 //TX_PREEQ_BIN_MIC0_23 +665 0x0030 //TX_PREEQ_SUBNUM_MIC1 +666 0x4848 //TX_PREEQ_GAIN_MIC1_0 +667 0x4848 //TX_PREEQ_GAIN_MIC1_1 +668 0x4848 //TX_PREEQ_GAIN_MIC1_2 +669 0x4848 //TX_PREEQ_GAIN_MIC1_3 +670 0x4848 //TX_PREEQ_GAIN_MIC1_4 +671 0x4848 //TX_PREEQ_GAIN_MIC1_5 +672 0x494A //TX_PREEQ_GAIN_MIC1_6 +673 0x4B4C //TX_PREEQ_GAIN_MIC1_7 +674 0x4D4E //TX_PREEQ_GAIN_MIC1_8 +675 0x4F52 //TX_PREEQ_GAIN_MIC1_9 +676 0x5355 //TX_PREEQ_GAIN_MIC1_10 +677 0x585C //TX_PREEQ_GAIN_MIC1_11 +678 0x616A //TX_PREEQ_GAIN_MIC1_12 +679 0x726E //TX_PREEQ_GAIN_MIC1_13 +680 0x5C48 //TX_PREEQ_GAIN_MIC1_14 +681 0x3B38 //TX_PREEQ_GAIN_MIC1_15 +682 0x4848 //TX_PREEQ_GAIN_MIC1_16 +683 0x4848 //TX_PREEQ_GAIN_MIC1_17 +684 0x4848 //TX_PREEQ_GAIN_MIC1_18 +685 0x4848 //TX_PREEQ_GAIN_MIC1_19 +686 0x4848 //TX_PREEQ_GAIN_MIC1_20 +687 0x4848 //TX_PREEQ_GAIN_MIC1_21 +688 0x4848 //TX_PREEQ_GAIN_MIC1_22 +689 0x4848 //TX_PREEQ_GAIN_MIC1_23 +690 0x0202 //TX_PREEQ_BIN_MIC1_0 +691 0x0203 //TX_PREEQ_BIN_MIC1_1 +692 0x0303 //TX_PREEQ_BIN_MIC1_2 +693 0x0304 //TX_PREEQ_BIN_MIC1_3 +694 0x0405 //TX_PREEQ_BIN_MIC1_4 +695 0x0506 //TX_PREEQ_BIN_MIC1_5 +696 0x0708 //TX_PREEQ_BIN_MIC1_6 +697 0x090A //TX_PREEQ_BIN_MIC1_7 +698 0x0B0C //TX_PREEQ_BIN_MIC1_8 +699 0x0D0E //TX_PREEQ_BIN_MIC1_9 +700 0x1013 //TX_PREEQ_BIN_MIC1_10 +701 0x1719 //TX_PREEQ_BIN_MIC1_11 +702 0x1B1E //TX_PREEQ_BIN_MIC1_12 +703 0x1E1E //TX_PREEQ_BIN_MIC1_13 +704 0x1E28 //TX_PREEQ_BIN_MIC1_14 +705 0x3042 //TX_PREEQ_BIN_MIC1_15 +706 0x0000 //TX_PREEQ_BIN_MIC1_16 +707 0x0000 //TX_PREEQ_BIN_MIC1_17 +708 0x0000 //TX_PREEQ_BIN_MIC1_18 +709 0x0000 //TX_PREEQ_BIN_MIC1_19 +710 0x0000 //TX_PREEQ_BIN_MIC1_20 +711 0x0000 //TX_PREEQ_BIN_MIC1_21 +712 0x0000 //TX_PREEQ_BIN_MIC1_22 +713 0x0000 //TX_PREEQ_BIN_MIC1_23 +714 0x0030 //TX_PREEQ_SUBNUM_MIC2 +715 0x4848 //TX_PREEQ_GAIN_MIC2_0 +716 0x4848 //TX_PREEQ_GAIN_MIC2_1 +717 0x4848 //TX_PREEQ_GAIN_MIC2_2 +718 0x4848 //TX_PREEQ_GAIN_MIC2_3 +719 0x4848 //TX_PREEQ_GAIN_MIC2_4 +720 0x4848 //TX_PREEQ_GAIN_MIC2_5 +721 0x4848 //TX_PREEQ_GAIN_MIC2_6 +722 0x4848 //TX_PREEQ_GAIN_MIC2_7 +723 0x4848 //TX_PREEQ_GAIN_MIC2_8 +724 0x4848 //TX_PREEQ_GAIN_MIC2_9 +725 0x4848 //TX_PREEQ_GAIN_MIC2_10 +726 0x4848 //TX_PREEQ_GAIN_MIC2_11 +727 0x4848 //TX_PREEQ_GAIN_MIC2_12 +728 0x4848 //TX_PREEQ_GAIN_MIC2_13 +729 0x4848 //TX_PREEQ_GAIN_MIC2_14 +730 0x4848 //TX_PREEQ_GAIN_MIC2_15 +731 0x4848 //TX_PREEQ_GAIN_MIC2_16 +732 0x4848 //TX_PREEQ_GAIN_MIC2_17 +733 0x4848 //TX_PREEQ_GAIN_MIC2_18 +734 0x4848 //TX_PREEQ_GAIN_MIC2_19 +735 0x4848 //TX_PREEQ_GAIN_MIC2_20 +736 0x4848 //TX_PREEQ_GAIN_MIC2_21 +737 0x4848 //TX_PREEQ_GAIN_MIC2_22 +738 0x4848 //TX_PREEQ_GAIN_MIC2_23 +739 0x0608 //TX_PREEQ_BIN_MIC2_0 +740 0x0808 //TX_PREEQ_BIN_MIC2_1 +741 0x0808 //TX_PREEQ_BIN_MIC2_2 +742 0x0808 //TX_PREEQ_BIN_MIC2_3 +743 0x0808 //TX_PREEQ_BIN_MIC2_4 +744 0x0808 //TX_PREEQ_BIN_MIC2_5 +745 0x0808 //TX_PREEQ_BIN_MIC2_6 +746 0x0808 //TX_PREEQ_BIN_MIC2_7 +747 0x0808 //TX_PREEQ_BIN_MIC2_8 +748 0x0808 //TX_PREEQ_BIN_MIC2_9 +749 0x0808 //TX_PREEQ_BIN_MIC2_10 +750 0x0808 //TX_PREEQ_BIN_MIC2_11 +751 0x0808 //TX_PREEQ_BIN_MIC2_12 +752 0x0808 //TX_PREEQ_BIN_MIC2_13 +753 0x0808 //TX_PREEQ_BIN_MIC2_14 +754 0x0200 //TX_PREEQ_BIN_MIC2_15 +755 0x0000 //TX_PREEQ_BIN_MIC2_16 +756 0x0000 //TX_PREEQ_BIN_MIC2_17 +757 0x0000 //TX_PREEQ_BIN_MIC2_18 +758 0x0000 //TX_PREEQ_BIN_MIC2_19 +759 0x0000 //TX_PREEQ_BIN_MIC2_20 +760 0x0000 //TX_PREEQ_BIN_MIC2_21 +761 0x0000 //TX_PREEQ_BIN_MIC2_22 +762 0x0000 //TX_PREEQ_BIN_MIC2_23 +763 0x0006 //TX_MASKING_ABILITY +764 0x0800 //TX_NND_WEIGHT +765 0x0050 //TX_MIC_CALIBRATION_0 +766 0x0056 //TX_MIC_CALIBRATION_1 +767 0x0050 //TX_MIC_CALIBRATION_2 +768 0x0050 //TX_MIC_CALIBRATION_3 +769 0x0046 //TX_MIC_PWR_BIAS_0 +770 0x0042 //TX_MIC_PWR_BIAS_1 +771 0x0046 //TX_MIC_PWR_BIAS_2 +772 0x0046 //TX_MIC_PWR_BIAS_3 +773 0x0000 //TX_GAIN_LIMIT_0 +774 0x0006 //TX_GAIN_LIMIT_1 +775 0x0000 //TX_GAIN_LIMIT_2 +776 0x0000 //TX_GAIN_LIMIT_3 +777 0x7F5B //TX_BVE_NOVAD0_ALPHADOWN +778 0x7FDE //TX_BVE_VAD0_ALPHAUP +779 0x7F3A //TX_BVE_VAD0_ALPHADOWN +780 0x2000 //TX_BVE_GAINWEIGHT_NOFEVADLI +781 0x7F5B //TX_BVE_FEVADLI_ALPHA +782 0x7F19 //TX_BVE_NOVAD0_ALPHAUP +783 0x1000 //TX_TDDRC_ALPHA_UP_01 +784 0x1000 //TX_TDDRC_ALPHA_UP_02 +785 0x1000 //TX_TDDRC_ALPHA_UP_03 +786 0x1000 //TX_TDDRC_ALPHA_UP_04 +787 0x7EB8 //TX_TDDRC_ALPHA_DWN_01 +788 0x7EB8 //TX_TDDRC_ALPHA_DWN_02 +789 0x7EB8 //TX_TDDRC_ALPHA_DWN_03 +790 0x7EB8 //TX_TDDRC_ALPHA_DWN_04 +791 0x7FFF //TX_TDDRC_TD_DRC_LIMIT +792 0x0800 //TX_TDDRC_POST_LIMIT_GAIN +793 0x0000 //TX_TDDRC_RESRV_0 +794 0x0000 //TX_TDDRC_RESRV_1 +795 0x0018 //TX_FDDRC_BAND_MARGIN_0 +796 0x0030 //TX_FDDRC_BAND_MARGIN_1 +797 0x0050 //TX_FDDRC_BAND_MARGIN_2 +798 0x0080 //TX_FDDRC_BAND_MARGIN_3 +799 0x0007 //TX_FDDRC_BLOCK_EXP +800 0x5000 //TX_FDDRC_THRD_2_0 +801 0x5000 //TX_FDDRC_THRD_2_1 +802 0x5000 //TX_FDDRC_THRD_2_2 +803 0x5000 //TX_FDDRC_THRD_2_3 +804 0x6400 //TX_FDDRC_THRD_3_0 +805 0x6400 //TX_FDDRC_THRD_3_1 +806 0x6400 //TX_FDDRC_THRD_3_2 +807 0x6400 //TX_FDDRC_THRD_3_3 +808 0x2000 //TX_FDDRC_SLANT_0_0 +809 0x2000 //TX_FDDRC_SLANT_0_1 +810 0x2000 //TX_FDDRC_SLANT_0_2 +811 0x2000 //TX_FDDRC_SLANT_0_3 +812 0x5333 //TX_FDDRC_SLANT_1_0 +813 0x5333 //TX_FDDRC_SLANT_1_1 +814 0x5333 //TX_FDDRC_SLANT_1_2 +815 0x5333 //TX_FDDRC_SLANT_1_3 +816 0x0010 //TX_DEADMIC_SILENCE_TH +817 0x0600 //TX_MIC_DEGRADE_TH +818 0x0078 //TX_DEADMIC_CNT +819 0x0078 //TX_MIC_DEGRADE_CNT +820 0x0000 //TX_FDDRC_RESRV_4 +821 0x0000 //TX_FDDRC_RESRV_5 +822 0x0000 //TX_FDDRC_RESRV_6 +823 0x7FFF //TX_KS_NOISEPASTE_FACTOR +824 0x0001 //TX_KS_CONFIG +825 0x7FFF //TX_KS_GAIN_MIN +826 0x0000 //TX_KS_RESRV_0 +827 0x0000 //TX_KS_RESRV_1 +828 0x0000 //TX_KS_RESRV_2 +829 0x7C00 //TX_LAMBDA_PKA_FP +830 0x2000 //TX_TPKA_FP +831 0x0080 //TX_MIN_G_FP +832 0x2000 //TX_MAX_G_FP +833 0x0FA0 //TX_FFP_FP_K_METAL +834 0x4000 //TX_A_POST_FLT_FP +835 0x0F5C //TX_RTO_OUTBEAM_TH +836 0x4CCD //TX_TPKA_FP_THD +837 0x0000 //TX_MAX_G_FP_BLK +838 0x0000 //TX_FFP_FADEIN +839 0x0000 //TX_FFP_FADEOUT +840 0x0000 //TX_WHISPERCTH +841 0x0000 //TX_WHISPERHOLDT +842 0x0000 //TX_WHISP_ENTHH +843 0x0000 //TX_WHISP_ENTHL +844 0x0000 //TX_WHISP_RTOTH +845 0x0000 //TX_WHISP_RTOTH2 +846 0x0096 //TX_MUTE_PERIOD +847 0x0000 //TX_FADE_IN_PERIOD +848 0x0100 //TX_FFP_RESRV_2 +849 0x0020 //TX_FFP_RESRV_3 +850 0x0000 //TX_FFP_RESRV_4 +851 0x0000 //TX_FFP_RESRV_5 +852 0x0000 //TX_FFP_RESRV_6 +853 0x0002 //TX_FILTINDX +854 0x0002 //TX_TDDRC_THRD_0 +855 0x0003 //TX_TDDRC_THRD_1 +856 0x1500 //TX_TDDRC_THRD_2 +857 0x1500 //TX_TDDRC_THRD_3 +858 0x3000 //TX_TDDRC_SLANT_0 +859 0x6E00 //TX_TDDRC_SLANT_1 +860 0x1000 //TX_TDDRC_ALPHA_UP_00 +861 0x7EB8 //TX_TDDRC_ALPHA_DWN_00 +862 0x0000 //TX_TDDRC_HMNC_FLAG +863 0x199A //TX_TDDRC_HMNC_GAIN +864 0x0000 //TX_TDDRC_SMT_FLAG +865 0x0CCD //TX_TDDRC_SMT_W +866 0x06EC //TX_TDDRC_DRC_GAIN +867 0x7FFF //TX_TDDRC_LMT_THRD +868 0x0000 //TX_TDDRC_LMT_ALPHA +869 0x0000 //TX_TFMASKLTH +870 0x0000 //TX_TFMASKLTHL +871 0x0CCD //TX_TFMASKHTH +872 0xECCD //TX_TFMASKLTH_BINVAD +873 0xFCCD //TX_TFMASKLTH_NS_EST +874 0xF800 //TX_TFMASKLTH_DOA +875 0x0CCD //TX_TFMASKTH_BLESSCUT +876 0x1000 //TX_B_LESSCUT_RTO_MASK +877 0x2000 //TX_SB_RHO_MEAN_TH_ABN +878 0x2000 //TX_B_POST_FLT_MASK +879 0x0000 //TX_B_POST_FLT_MASK1 +880 0x6333 //TX_GAIN_WIND_MASK +881 0x0000 //TX_TFMASK_BFSTRICT_MUSIC +882 0x0000 //TX_TFMASK_BFSTRICT_NOMUSIC +883 0x7333 //TX_FASTNS_OUTIN_TH +884 0x0CCD //TX_FASTNS_TFMASK_TH +885 0x0CCD //TX_FASTNS_TFMASKBIN_TH1 +886 0x0CCD //TX_FASTNS_TFMASKBIN_TH2 +887 0x0CCD //TX_FASTNS_TFMASKBIN_TH3 +888 0x0028 //TX_FASTNS_ARSPC_TH +889 0xC000 //TX_FASTNS_MASK5_TH +890 0x0810 //TX_POSTSSA_MIN_G_VR_MASK +891 0x1000 //TX_A_LESSCUT_RTO_MASK +892 0x1770 //TX_FASTNS_NOISETH +893 0xC000 //TX_FASTNS_SSA_THLFL +894 0xC000 //TX_FASTNS_SSA_THHFL +895 0xCCCC //TX_FASTNS_SSA_THLFH +896 0xD999 //TX_FASTNS_SSA_THHFH +897 0x2339 //TX_SENDFUNC_REG_MICMUTE +898 0x0021 //TX_SENDFUNC_REG_MICMUTE1 +899 0x02BC //TX_MICMUTE_RATIO_THR +900 0x0140 //TX_MICMUTE_AMP_THR +901 0x0004 //TX_MICMUTE_HPF_IND +902 0x00C0 //TX_MICMUTE_LOG_EYR_TH +903 0x0008 //TX_MICMUTE_CVG_TIME +904 0x0008 //TX_MICMUTE_RELEASE_TIME +905 0x01FE //TX_MIC_VOLUME_MIC0MUTE +906 0x0020 //TX_MICMUTE_EPD_OFFSET_0 +907 0x001E //TX_MICMUTE_FRQ_AEC_L +908 0x7999 //TX_MICMUTE_EAD_THR +909 0x7FFF //TX_MICMUTE_LAMBDA_CB_NLE +910 0x7FFF //TX_MICMUTE_LAMBDA_RE_EST +911 0x4000 //TX_DTD_THR1_MICMUTE_0 +912 0x7000 //TX_DTD_THR1_MICMUTE_1 +913 0x7FFF //TX_DTD_THR1_MICMUTE_2 +914 0x7FFF //TX_DTD_THR1_MICMUTE_3 +915 0x6CCC //TX_DTD_THR2_MICMUTE_0 +916 0x0400 //TX_MICMUTE_MIN_EQ_RE_EST_0 +917 0x0400 //TX_MICMUTE_MIN_EQ_RE_EST_1 +918 0x1000 //TX_MICMUTE_MIN_EQ_RE_EST_2 +919 0x7FFF //TX_MICMUTE_MIN_EQ_RE_EST_3 +920 0x7FFF //TX_MICMUTE_MIN_EQ_RE_EST_4 +921 0x4000 //TX_MICMUTE_C_POST_FLT +922 0x03E8 //TX_MICMUTE_DT_CUT_K +923 0x0001 //TX_MICMUTE_DT_CUT_THR +924 0x03E8 //TX_MICMUTE_DT_CUT_K2 +925 0x0001 //TX_MICMUTE_DT_CUT_THR2 +926 0x0064 //TX_MICMUTE_DT2_HOLD_N +927 0x1000 //TX_MICMUTE_RATIODTH_THCUT +928 0x1000 //TX_MICMUTE_B_POST_FLT_ECHOL +929 0x7FFF //TX_MICMUTE_B_POST_FLT_ECHOH +930 0x0400 //TX_MICMUTE_C_POST_FLT_MASK +931 0x7999 //TX_MICMUTE_RATIODTL_CUT_TH +932 0x0258 //TX_MICMUTE_DT_CUT_K1 +933 0x0800 //TX_MICMUTE_N2_SN_EST +934 0xFC00 //TX_MICMUTE_THR_SN_EST_0 +935 0x001C //TX_MICMUTE_MIN_G_CTRL_0 +936 0x6000 //TX_MICMUTE_A_POST_FILT_S_0 +937 0x7000 //TX_MICMUTE_B_POST_FILT_0 +938 0x2710 //TX_MIC1RUB_AMP_THR +939 0x0010 //TX_MIC1MUTE_RATIO_THR +940 0x0450 //TX_MIC1MUTE_AMP_THR +941 0x0008 //TX_MIC1MUTE_CVG_TIME +942 0x0008 //TX_MIC1MUTE_RELEASE_TIME +943 0x0000 //TX_AMS_RESRV_01 +944 0x0000 //TX_AMS_RESRV_02 +945 0x0000 //TX_AMS_RESRV_03 +946 0x0000 //TX_AMS_RESRV_04 +947 0x0000 //TX_AMS_RESRV_05 +948 0x0000 //TX_AMS_RESRV_06 +949 0x0000 //TX_AMS_RESRV_07 +950 0x0000 //TX_AMS_RESRV_08 +951 0x0000 //TX_AMS_RESRV_09 +952 0x0000 //TX_AMS_RESRV_10 +953 0x0000 //TX_AMS_RESRV_11 +954 0x0000 //TX_AMS_RESRV_12 +955 0x0000 //TX_AMS_RESRV_13 +956 0x0000 //TX_AMS_RESRV_14 +957 0x0000 //TX_AMS_RESRV_15 +958 0x0000 //TX_AMS_RESRV_16 +959 0x0000 //TX_AMS_RESRV_17 +960 0x0000 //TX_AMS_RESRV_18 +961 0x0000 //TX_AMS_RESRV_19 +#RX +0 0x203C //RX_RECVFUNC_MODE_0 +1 0x0000 //RX_RECVFUNC_MODE_1 +2 0x0003 //RX_SAMPLINGFREQ_SIG +3 0x0003 //RX_SAMPLINGFREQ_PROC +4 0x000A //RX_FRAME_SZ +5 0x0000 //RX_DELAY_OPT +6 0x1000 //RX_TDDRC_ALPHA_UP_1 +7 0x1000 //RX_TDDRC_ALPHA_UP_2 +8 0x1000 //RX_TDDRC_ALPHA_UP_3 +9 0x1000 //RX_TDDRC_ALPHA_UP_4 +10 0x05AA //RX_PGA +11 0x7FFF //RX_A_HP +12 0x4000 //RX_B_PE +13 0x5800 //RX_THR_PITCH_DET_0 +14 0x5000 //RX_THR_PITCH_DET_1 +15 0x4000 //RX_THR_PITCH_DET_2 +16 0x0008 //RX_PITCH_BFR_LEN +17 0x0003 //RX_SBD_PITCH_DET +18 0x0100 //RX_PP_RESRV_0 +19 0x0020 //RX_PP_RESRV_1 +20 0x0600 //RX_N_SN_EST +21 0x000C //RX_N2_SN_EST +22 0x000F //RX_NS_LVL_CTRL +23 0xF800 //RX_THR_SN_EST +24 0x7E00 //RX_LAMBDA_PFILT +25 0x000A //RX_FENS_RESRV_0 +26 0x0190 //RX_FENS_RESRV_1 +27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +30 0x0002 //RX_EXTRA_NS_L +31 0x0800 //RX_EXTRA_NS_A +32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +33 0x7000 //RX_TDDRC_LIMITER_THRD +34 0x0800 //RX_TDDRC_LIMITER_GAIN +35 0x199A //RX_A_POST_FLT +36 0x0000 //RX_LMT_THRD +37 0x4000 //RX_LMT_ALPHA +38 0x0020 //RX_FDEQ_SUBNUM +39 0x483E //RX_FDEQ_GAIN_0 +40 0x3E3E //RX_FDEQ_GAIN_1 +41 0x3E4A //RX_FDEQ_GAIN_2 +42 0x5464 //RX_FDEQ_GAIN_3 +43 0x7072 //RX_FDEQ_GAIN_4 +44 0x8576 //RX_FDEQ_GAIN_5 +45 0x7880 //RX_FDEQ_GAIN_6 +46 0x8888 //RX_FDEQ_GAIN_7 +47 0x949C //RX_FDEQ_GAIN_8 +48 0x96A4 //RX_FDEQ_GAIN_9 +49 0xA994 //RX_FDEQ_GAIN_10 +50 0x9487 //RX_FDEQ_GAIN_11 +51 0x6F64 //RX_FDEQ_GAIN_12 +52 0x625A //RX_FDEQ_GAIN_13 +53 0x5D80 //RX_FDEQ_GAIN_14 +54 0x8890 //RX_FDEQ_GAIN_15 +55 0x4848 //RX_FDEQ_GAIN_16 +56 0x4848 //RX_FDEQ_GAIN_17 +57 0x4848 //RX_FDEQ_GAIN_18 +58 0x4848 //RX_FDEQ_GAIN_19 +59 0x4848 //RX_FDEQ_GAIN_20 +60 0x4848 //RX_FDEQ_GAIN_21 +61 0x4848 //RX_FDEQ_GAIN_22 +62 0x4848 //RX_FDEQ_GAIN_23 +63 0x0202 //RX_FDEQ_BIN_0 +64 0x0202 //RX_FDEQ_BIN_1 +65 0x0301 //RX_FDEQ_BIN_2 +66 0x0503 //RX_FDEQ_BIN_3 +67 0x0406 //RX_FDEQ_BIN_4 +68 0x0109 //RX_FDEQ_BIN_5 +69 0x0708 //RX_FDEQ_BIN_6 +70 0x090A //RX_FDEQ_BIN_7 +71 0x0B0C //RX_FDEQ_BIN_8 +72 0x0D0E //RX_FDEQ_BIN_9 +73 0x1013 //RX_FDEQ_BIN_10 +74 0x1719 //RX_FDEQ_BIN_11 +75 0x1B0F //RX_FDEQ_BIN_12 +76 0x141E //RX_FDEQ_BIN_13 +77 0x3728 //RX_FDEQ_BIN_14 +78 0x282C //RX_FDEQ_BIN_15 +79 0x0000 //RX_FDEQ_BIN_16 +80 0x0000 //RX_FDEQ_BIN_17 +81 0x0000 //RX_FDEQ_BIN_18 +82 0x0000 //RX_FDEQ_BIN_19 +83 0x0000 //RX_FDEQ_BIN_20 +84 0x0000 //RX_FDEQ_BIN_21 +85 0x0000 //RX_FDEQ_BIN_22 +86 0x0000 //RX_FDEQ_BIN_23 +87 0x4000 //RX_FDEQ_RESRV_0 +88 0x0320 //RX_FDEQ_RESRV_1 +89 0x0018 //RX_FDDRC_BAND_MARGIN_0 +90 0x0030 //RX_FDDRC_BAND_MARGIN_1 +91 0x0050 //RX_FDDRC_BAND_MARGIN_2 +92 0x0080 //RX_FDDRC_BAND_MARGIN_3 +93 0x0007 //RX_FDDRC_BLOCK_EXP +94 0x5000 //RX_FDDRC_THRD_2_0 +95 0x5000 //RX_FDDRC_THRD_2_1 +96 0x5000 //RX_FDDRC_THRD_2_2 +97 0x5000 //RX_FDDRC_THRD_2_3 +98 0x6400 //RX_FDDRC_THRD_3_0 +99 0x6400 //RX_FDDRC_THRD_3_1 +100 0x6400 //RX_FDDRC_THRD_3_2 +101 0x6400 //RX_FDDRC_THRD_3_3 +102 0x2000 //RX_FDDRC_SLANT_0_0 +103 0x2000 //RX_FDDRC_SLANT_0_1 +104 0x2000 //RX_FDDRC_SLANT_0_2 +105 0x2000 //RX_FDDRC_SLANT_0_3 +106 0x5333 //RX_FDDRC_SLANT_1_0 +107 0x5333 //RX_FDDRC_SLANT_1_1 +108 0x5333 //RX_FDDRC_SLANT_1_2 +109 0x5333 //RX_FDDRC_SLANT_1_3 +110 0x0000 //RX_FDDRC_RESRV_0 +111 0x0002 //RX_FILTINDX +112 0x0001 //RX_TDDRC_THRD_0 +113 0x0002 //RX_TDDRC_THRD_1 +114 0x1800 //RX_TDDRC_THRD_2 +115 0x1800 //RX_TDDRC_THRD_3 +116 0x7FFF //RX_TDDRC_SLANT_0 +117 0x7FFF //RX_TDDRC_SLANT_1 +118 0x1000 //RX_TDDRC_ALPHA_UP_0 +119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +120 0x0000 //RX_TDDRC_HMNC_FLAG +121 0x199A //RX_TDDRC_HMNC_GAIN +122 0x0001 //RX_TDDRC_SMT_FLAG +123 0x0CCD //RX_TDDRC_SMT_W +124 0x057F //RX_TDDRC_DRC_GAIN +125 0x7C00 //RX_LAMBDA_PKA_FP +126 0x13E0 //RX_TPKA_FP +127 0x0080 //RX_MIN_G_FP +128 0x2000 //RX_MAX_G_FP +129 0x0100 //RX_SPK_VOL +130 0x0000 //RX_VOL_RESRV_0 +131 0x0000 //RX_MAXLEVEL_CNG +132 0x3000 //RX_BWE_UV_TH +133 0x3000 //RX_BWE_UV_TH2 +134 0x1800 //RX_BWE_UV_TH3 +135 0x1000 //RX_BWE_V_TH +136 0x04CD //RX_BWE_GAIN1_V_TH1 +137 0x0F33 //RX_BWE_GAIN1_V_TH2 +138 0x7333 //RX_BWE_UV_EQ +139 0x199A //RX_BWE_V_EQ +140 0x7333 //RX_BWE_TONE_TH +141 0x0004 //RX_BWE_UV_HOLD_T +142 0x6CCD //RX_BWE_GAIN2_ALPHA +143 0x799A //RX_BWE_GAIN3_ALPHA +144 0x001E //RX_BWE_CUTOFF +145 0x3000 //RX_BWE_GAINFILL +146 0x3200 //RX_BWE_MAXTH_TONE +147 0x2000 //RX_BWE_EQ_0 +148 0x2000 //RX_BWE_EQ_1 +149 0x2000 //RX_BWE_EQ_2 +150 0x2000 //RX_BWE_EQ_3 +151 0x2000 //RX_BWE_EQ_4 +152 0x2000 //RX_BWE_EQ_5 +153 0x2000 //RX_BWE_EQ_6 +154 0x0000 //RX_BWE_RESRV_0 +155 0x0000 //RX_BWE_RESRV_1 +156 0x0000 //RX_BWE_RESRV_2 +#VOL 0 +6 0x1000 //RX_TDDRC_ALPHA_UP_1 +7 0x1000 //RX_TDDRC_ALPHA_UP_2 +8 0x1000 //RX_TDDRC_ALPHA_UP_3 +9 0x1000 //RX_TDDRC_ALPHA_UP_4 +27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +33 0x7000 //RX_TDDRC_LIMITER_THRD +34 0x0800 //RX_TDDRC_LIMITER_GAIN +112 0x0001 //RX_TDDRC_THRD_0 +113 0x0002 //RX_TDDRC_THRD_1 +114 0x1800 //RX_TDDRC_THRD_2 +115 0x1800 //RX_TDDRC_THRD_3 +116 0x7FFF //RX_TDDRC_SLANT_0 +117 0x7FFF //RX_TDDRC_SLANT_1 +118 0x1000 //RX_TDDRC_ALPHA_UP_0 +119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +120 0x0000 //RX_TDDRC_HMNC_FLAG +121 0x199A //RX_TDDRC_HMNC_GAIN +122 0x0001 //RX_TDDRC_SMT_FLAG +123 0x0CCD //RX_TDDRC_SMT_W +124 0x057F //RX_TDDRC_DRC_GAIN +38 0x0020 //RX_FDEQ_SUBNUM +39 0x483E //RX_FDEQ_GAIN_0 +40 0x3E3E //RX_FDEQ_GAIN_1 +41 0x3E4A //RX_FDEQ_GAIN_2 +42 0x5464 //RX_FDEQ_GAIN_3 +43 0x7072 //RX_FDEQ_GAIN_4 +44 0x8576 //RX_FDEQ_GAIN_5 +45 0x7880 //RX_FDEQ_GAIN_6 +46 0x8888 //RX_FDEQ_GAIN_7 +47 0x949C //RX_FDEQ_GAIN_8 +48 0x96A4 //RX_FDEQ_GAIN_9 +49 0xA994 //RX_FDEQ_GAIN_10 +50 0x9487 //RX_FDEQ_GAIN_11 +51 0x6F64 //RX_FDEQ_GAIN_12 +52 0x625A //RX_FDEQ_GAIN_13 +53 0x5D80 //RX_FDEQ_GAIN_14 +54 0x8890 //RX_FDEQ_GAIN_15 +55 0x4848 //RX_FDEQ_GAIN_16 +56 0x4848 //RX_FDEQ_GAIN_17 +57 0x4848 //RX_FDEQ_GAIN_18 +58 0x4848 //RX_FDEQ_GAIN_19 +59 0x4848 //RX_FDEQ_GAIN_20 +60 0x4848 //RX_FDEQ_GAIN_21 +61 0x4848 //RX_FDEQ_GAIN_22 +62 0x4848 //RX_FDEQ_GAIN_23 +63 0x0202 //RX_FDEQ_BIN_0 +64 0x0202 //RX_FDEQ_BIN_1 +65 0x0301 //RX_FDEQ_BIN_2 +66 0x0503 //RX_FDEQ_BIN_3 +67 0x0406 //RX_FDEQ_BIN_4 +68 0x0109 //RX_FDEQ_BIN_5 +69 0x0708 //RX_FDEQ_BIN_6 +70 0x090A //RX_FDEQ_BIN_7 +71 0x0B0C //RX_FDEQ_BIN_8 +72 0x0D0E //RX_FDEQ_BIN_9 +73 0x1013 //RX_FDEQ_BIN_10 +74 0x1719 //RX_FDEQ_BIN_11 +75 0x1B0F //RX_FDEQ_BIN_12 +76 0x141E //RX_FDEQ_BIN_13 +77 0x3728 //RX_FDEQ_BIN_14 +78 0x282C //RX_FDEQ_BIN_15 +79 0x0000 //RX_FDEQ_BIN_16 +80 0x0000 //RX_FDEQ_BIN_17 +81 0x0000 //RX_FDEQ_BIN_18 +82 0x0000 //RX_FDEQ_BIN_19 +83 0x0000 //RX_FDEQ_BIN_20 +84 0x0000 //RX_FDEQ_BIN_21 +85 0x0000 //RX_FDEQ_BIN_22 +86 0x0000 //RX_FDEQ_BIN_23 +87 0x4000 //RX_FDEQ_RESRV_0 +88 0x0320 //RX_FDEQ_RESRV_1 +89 0x0018 //RX_FDDRC_BAND_MARGIN_0 +90 0x0030 //RX_FDDRC_BAND_MARGIN_1 +91 0x0050 //RX_FDDRC_BAND_MARGIN_2 +92 0x0080 //RX_FDDRC_BAND_MARGIN_3 +93 0x0007 //RX_FDDRC_BLOCK_EXP +94 0x5000 //RX_FDDRC_THRD_2_0 +95 0x5000 //RX_FDDRC_THRD_2_1 +96 0x5000 //RX_FDDRC_THRD_2_2 +97 0x5000 //RX_FDDRC_THRD_2_3 +98 0x6400 //RX_FDDRC_THRD_3_0 +99 0x6400 //RX_FDDRC_THRD_3_1 +100 0x6400 //RX_FDDRC_THRD_3_2 +101 0x6400 //RX_FDDRC_THRD_3_3 +102 0x2000 //RX_FDDRC_SLANT_0_0 +103 0x2000 //RX_FDDRC_SLANT_0_1 +104 0x2000 //RX_FDDRC_SLANT_0_2 +105 0x2000 //RX_FDDRC_SLANT_0_3 +106 0x5333 //RX_FDDRC_SLANT_1_0 +107 0x5333 //RX_FDDRC_SLANT_1_1 +108 0x5333 //RX_FDDRC_SLANT_1_2 +109 0x5333 //RX_FDDRC_SLANT_1_3 +110 0x0000 //RX_FDDRC_RESRV_0 +129 0x000A //RX_SPK_VOL +130 0x0000 //RX_VOL_RESRV_0 +#VOL 1 +6 0x1000 //RX_TDDRC_ALPHA_UP_1 +7 0x1000 //RX_TDDRC_ALPHA_UP_2 +8 0x1000 //RX_TDDRC_ALPHA_UP_3 +9 0x1000 //RX_TDDRC_ALPHA_UP_4 +27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +33 0x7000 //RX_TDDRC_LIMITER_THRD +34 0x0800 //RX_TDDRC_LIMITER_GAIN +112 0x0001 //RX_TDDRC_THRD_0 +113 0x0002 //RX_TDDRC_THRD_1 +114 0x1800 //RX_TDDRC_THRD_2 +115 0x1800 //RX_TDDRC_THRD_3 +116 0x7FFF //RX_TDDRC_SLANT_0 +117 0x7FFF //RX_TDDRC_SLANT_1 +118 0x1000 //RX_TDDRC_ALPHA_UP_0 +119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +120 0x0000 //RX_TDDRC_HMNC_FLAG +121 0x199A //RX_TDDRC_HMNC_GAIN +122 0x0001 //RX_TDDRC_SMT_FLAG +123 0x0CCD //RX_TDDRC_SMT_W +124 0x057F //RX_TDDRC_DRC_GAIN +38 0x0020 //RX_FDEQ_SUBNUM +39 0x483E //RX_FDEQ_GAIN_0 +40 0x3E3E //RX_FDEQ_GAIN_1 +41 0x3E4A //RX_FDEQ_GAIN_2 +42 0x5464 //RX_FDEQ_GAIN_3 +43 0x7072 //RX_FDEQ_GAIN_4 +44 0x8576 //RX_FDEQ_GAIN_5 +45 0x7880 //RX_FDEQ_GAIN_6 +46 0x8888 //RX_FDEQ_GAIN_7 +47 0x949C //RX_FDEQ_GAIN_8 +48 0x96A4 //RX_FDEQ_GAIN_9 +49 0xA994 //RX_FDEQ_GAIN_10 +50 0x9487 //RX_FDEQ_GAIN_11 +51 0x6F64 //RX_FDEQ_GAIN_12 +52 0x625A //RX_FDEQ_GAIN_13 +53 0x5D80 //RX_FDEQ_GAIN_14 +54 0x8890 //RX_FDEQ_GAIN_15 +55 0x4848 //RX_FDEQ_GAIN_16 +56 0x4848 //RX_FDEQ_GAIN_17 +57 0x4848 //RX_FDEQ_GAIN_18 +58 0x4848 //RX_FDEQ_GAIN_19 +59 0x4848 //RX_FDEQ_GAIN_20 +60 0x4848 //RX_FDEQ_GAIN_21 +61 0x4848 //RX_FDEQ_GAIN_22 +62 0x4848 //RX_FDEQ_GAIN_23 +63 0x0202 //RX_FDEQ_BIN_0 +64 0x0202 //RX_FDEQ_BIN_1 +65 0x0301 //RX_FDEQ_BIN_2 +66 0x0503 //RX_FDEQ_BIN_3 +67 0x0406 //RX_FDEQ_BIN_4 +68 0x0109 //RX_FDEQ_BIN_5 +69 0x0708 //RX_FDEQ_BIN_6 +70 0x090A //RX_FDEQ_BIN_7 +71 0x0B0C //RX_FDEQ_BIN_8 +72 0x0D0E //RX_FDEQ_BIN_9 +73 0x1013 //RX_FDEQ_BIN_10 +74 0x1719 //RX_FDEQ_BIN_11 +75 0x1B0F //RX_FDEQ_BIN_12 +76 0x141E //RX_FDEQ_BIN_13 +77 0x3728 //RX_FDEQ_BIN_14 +78 0x282C //RX_FDEQ_BIN_15 +79 0x0000 //RX_FDEQ_BIN_16 +80 0x0000 //RX_FDEQ_BIN_17 +81 0x0000 //RX_FDEQ_BIN_18 +82 0x0000 //RX_FDEQ_BIN_19 +83 0x0000 //RX_FDEQ_BIN_20 +84 0x0000 //RX_FDEQ_BIN_21 +85 0x0000 //RX_FDEQ_BIN_22 +86 0x0000 //RX_FDEQ_BIN_23 +87 0x4000 //RX_FDEQ_RESRV_0 +88 0x0320 //RX_FDEQ_RESRV_1 +89 0x0018 //RX_FDDRC_BAND_MARGIN_0 +90 0x0030 //RX_FDDRC_BAND_MARGIN_1 +91 0x0050 //RX_FDDRC_BAND_MARGIN_2 +92 0x0080 //RX_FDDRC_BAND_MARGIN_3 +93 0x0007 //RX_FDDRC_BLOCK_EXP +94 0x5000 //RX_FDDRC_THRD_2_0 +95 0x5000 //RX_FDDRC_THRD_2_1 +96 0x5000 //RX_FDDRC_THRD_2_2 +97 0x5000 //RX_FDDRC_THRD_2_3 +98 0x6400 //RX_FDDRC_THRD_3_0 +99 0x6400 //RX_FDDRC_THRD_3_1 +100 0x6400 //RX_FDDRC_THRD_3_2 +101 0x6400 //RX_FDDRC_THRD_3_3 +102 0x2000 //RX_FDDRC_SLANT_0_0 +103 0x2000 //RX_FDDRC_SLANT_0_1 +104 0x2000 //RX_FDDRC_SLANT_0_2 +105 0x2000 //RX_FDDRC_SLANT_0_3 +106 0x5333 //RX_FDDRC_SLANT_1_0 +107 0x5333 //RX_FDDRC_SLANT_1_1 +108 0x5333 //RX_FDDRC_SLANT_1_2 +109 0x5333 //RX_FDDRC_SLANT_1_3 +110 0x0000 //RX_FDDRC_RESRV_0 +129 0x0010 //RX_SPK_VOL +130 0x0000 //RX_VOL_RESRV_0 +#VOL 2 +6 0x1000 //RX_TDDRC_ALPHA_UP_1 +7 0x1000 //RX_TDDRC_ALPHA_UP_2 +8 0x1000 //RX_TDDRC_ALPHA_UP_3 +9 0x1000 //RX_TDDRC_ALPHA_UP_4 +27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +33 0x7000 //RX_TDDRC_LIMITER_THRD +34 0x0800 //RX_TDDRC_LIMITER_GAIN +112 0x0001 //RX_TDDRC_THRD_0 +113 0x0002 //RX_TDDRC_THRD_1 +114 0x1800 //RX_TDDRC_THRD_2 +115 0x1800 //RX_TDDRC_THRD_3 +116 0x7FFF //RX_TDDRC_SLANT_0 +117 0x7FFF //RX_TDDRC_SLANT_1 +118 0x1000 //RX_TDDRC_ALPHA_UP_0 +119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +120 0x0000 //RX_TDDRC_HMNC_FLAG +121 0x199A //RX_TDDRC_HMNC_GAIN +122 0x0001 //RX_TDDRC_SMT_FLAG +123 0x0CCD //RX_TDDRC_SMT_W +124 0x057F //RX_TDDRC_DRC_GAIN +38 0x0020 //RX_FDEQ_SUBNUM +39 0x483E //RX_FDEQ_GAIN_0 +40 0x3E3E //RX_FDEQ_GAIN_1 +41 0x3E4A //RX_FDEQ_GAIN_2 +42 0x5464 //RX_FDEQ_GAIN_3 +43 0x7072 //RX_FDEQ_GAIN_4 +44 0x8576 //RX_FDEQ_GAIN_5 +45 0x7880 //RX_FDEQ_GAIN_6 +46 0x8888 //RX_FDEQ_GAIN_7 +47 0x949C //RX_FDEQ_GAIN_8 +48 0x96A4 //RX_FDEQ_GAIN_9 +49 0xA994 //RX_FDEQ_GAIN_10 +50 0x9487 //RX_FDEQ_GAIN_11 +51 0x6F64 //RX_FDEQ_GAIN_12 +52 0x625A //RX_FDEQ_GAIN_13 +53 0x5D80 //RX_FDEQ_GAIN_14 +54 0x8890 //RX_FDEQ_GAIN_15 +55 0x4848 //RX_FDEQ_GAIN_16 +56 0x4848 //RX_FDEQ_GAIN_17 +57 0x4848 //RX_FDEQ_GAIN_18 +58 0x4848 //RX_FDEQ_GAIN_19 +59 0x4848 //RX_FDEQ_GAIN_20 +60 0x4848 //RX_FDEQ_GAIN_21 +61 0x4848 //RX_FDEQ_GAIN_22 +62 0x4848 //RX_FDEQ_GAIN_23 +63 0x0202 //RX_FDEQ_BIN_0 +64 0x0202 //RX_FDEQ_BIN_1 +65 0x0301 //RX_FDEQ_BIN_2 +66 0x0503 //RX_FDEQ_BIN_3 +67 0x0406 //RX_FDEQ_BIN_4 +68 0x0109 //RX_FDEQ_BIN_5 +69 0x0708 //RX_FDEQ_BIN_6 +70 0x090A //RX_FDEQ_BIN_7 +71 0x0B0C //RX_FDEQ_BIN_8 +72 0x0D0E //RX_FDEQ_BIN_9 +73 0x1013 //RX_FDEQ_BIN_10 +74 0x1719 //RX_FDEQ_BIN_11 +75 0x1B0F //RX_FDEQ_BIN_12 +76 0x141E //RX_FDEQ_BIN_13 +77 0x3728 //RX_FDEQ_BIN_14 +78 0x282C //RX_FDEQ_BIN_15 +79 0x0000 //RX_FDEQ_BIN_16 +80 0x0000 //RX_FDEQ_BIN_17 +81 0x0000 //RX_FDEQ_BIN_18 +82 0x0000 //RX_FDEQ_BIN_19 +83 0x0000 //RX_FDEQ_BIN_20 +84 0x0000 //RX_FDEQ_BIN_21 +85 0x0000 //RX_FDEQ_BIN_22 +86 0x0000 //RX_FDEQ_BIN_23 +87 0x4000 //RX_FDEQ_RESRV_0 +88 0x0320 //RX_FDEQ_RESRV_1 +89 0x0018 //RX_FDDRC_BAND_MARGIN_0 +90 0x0030 //RX_FDDRC_BAND_MARGIN_1 +91 0x0050 //RX_FDDRC_BAND_MARGIN_2 +92 0x0080 //RX_FDDRC_BAND_MARGIN_3 +93 0x0007 //RX_FDDRC_BLOCK_EXP +94 0x5000 //RX_FDDRC_THRD_2_0 +95 0x5000 //RX_FDDRC_THRD_2_1 +96 0x5000 //RX_FDDRC_THRD_2_2 +97 0x5000 //RX_FDDRC_THRD_2_3 +98 0x6400 //RX_FDDRC_THRD_3_0 +99 0x6400 //RX_FDDRC_THRD_3_1 +100 0x6400 //RX_FDDRC_THRD_3_2 +101 0x6400 //RX_FDDRC_THRD_3_3 +102 0x2000 //RX_FDDRC_SLANT_0_0 +103 0x2000 //RX_FDDRC_SLANT_0_1 +104 0x2000 //RX_FDDRC_SLANT_0_2 +105 0x2000 //RX_FDDRC_SLANT_0_3 +106 0x5333 //RX_FDDRC_SLANT_1_0 +107 0x5333 //RX_FDDRC_SLANT_1_1 +108 0x5333 //RX_FDDRC_SLANT_1_2 +109 0x5333 //RX_FDDRC_SLANT_1_3 +110 0x0000 //RX_FDDRC_RESRV_0 +129 0x001B //RX_SPK_VOL +130 0x0000 //RX_VOL_RESRV_0 +#VOL 3 +6 0x1000 //RX_TDDRC_ALPHA_UP_1 +7 0x1000 //RX_TDDRC_ALPHA_UP_2 +8 0x1000 //RX_TDDRC_ALPHA_UP_3 +9 0x1000 //RX_TDDRC_ALPHA_UP_4 +27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +33 0x7000 //RX_TDDRC_LIMITER_THRD +34 0x0800 //RX_TDDRC_LIMITER_GAIN +112 0x0001 //RX_TDDRC_THRD_0 +113 0x0002 //RX_TDDRC_THRD_1 +114 0x1800 //RX_TDDRC_THRD_2 +115 0x1800 //RX_TDDRC_THRD_3 +116 0x7FFF //RX_TDDRC_SLANT_0 +117 0x7FFF //RX_TDDRC_SLANT_1 +118 0x1000 //RX_TDDRC_ALPHA_UP_0 +119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +120 0x0000 //RX_TDDRC_HMNC_FLAG +121 0x199A //RX_TDDRC_HMNC_GAIN +122 0x0001 //RX_TDDRC_SMT_FLAG +123 0x0CCD //RX_TDDRC_SMT_W +124 0x057F //RX_TDDRC_DRC_GAIN +38 0x0020 //RX_FDEQ_SUBNUM +39 0x483E //RX_FDEQ_GAIN_0 +40 0x3E3E //RX_FDEQ_GAIN_1 +41 0x3E4A //RX_FDEQ_GAIN_2 +42 0x5464 //RX_FDEQ_GAIN_3 +43 0x7072 //RX_FDEQ_GAIN_4 +44 0x8576 //RX_FDEQ_GAIN_5 +45 0x7880 //RX_FDEQ_GAIN_6 +46 0x8888 //RX_FDEQ_GAIN_7 +47 0x949C //RX_FDEQ_GAIN_8 +48 0x96A4 //RX_FDEQ_GAIN_9 +49 0xA994 //RX_FDEQ_GAIN_10 +50 0x9487 //RX_FDEQ_GAIN_11 +51 0x6F64 //RX_FDEQ_GAIN_12 +52 0x625A //RX_FDEQ_GAIN_13 +53 0x5D80 //RX_FDEQ_GAIN_14 +54 0x8890 //RX_FDEQ_GAIN_15 +55 0x4848 //RX_FDEQ_GAIN_16 +56 0x4848 //RX_FDEQ_GAIN_17 +57 0x4848 //RX_FDEQ_GAIN_18 +58 0x4848 //RX_FDEQ_GAIN_19 +59 0x4848 //RX_FDEQ_GAIN_20 +60 0x4848 //RX_FDEQ_GAIN_21 +61 0x4848 //RX_FDEQ_GAIN_22 +62 0x4848 //RX_FDEQ_GAIN_23 +63 0x0202 //RX_FDEQ_BIN_0 +64 0x0202 //RX_FDEQ_BIN_1 +65 0x0301 //RX_FDEQ_BIN_2 +66 0x0503 //RX_FDEQ_BIN_3 +67 0x0406 //RX_FDEQ_BIN_4 +68 0x0109 //RX_FDEQ_BIN_5 +69 0x0708 //RX_FDEQ_BIN_6 +70 0x090A //RX_FDEQ_BIN_7 +71 0x0B0C //RX_FDEQ_BIN_8 +72 0x0D0E //RX_FDEQ_BIN_9 +73 0x1013 //RX_FDEQ_BIN_10 +74 0x1719 //RX_FDEQ_BIN_11 +75 0x1B0F //RX_FDEQ_BIN_12 +76 0x141E //RX_FDEQ_BIN_13 +77 0x3728 //RX_FDEQ_BIN_14 +78 0x282C //RX_FDEQ_BIN_15 +79 0x0000 //RX_FDEQ_BIN_16 +80 0x0000 //RX_FDEQ_BIN_17 +81 0x0000 //RX_FDEQ_BIN_18 +82 0x0000 //RX_FDEQ_BIN_19 +83 0x0000 //RX_FDEQ_BIN_20 +84 0x0000 //RX_FDEQ_BIN_21 +85 0x0000 //RX_FDEQ_BIN_22 +86 0x0000 //RX_FDEQ_BIN_23 +87 0x4000 //RX_FDEQ_RESRV_0 +88 0x0320 //RX_FDEQ_RESRV_1 +89 0x0018 //RX_FDDRC_BAND_MARGIN_0 +90 0x0030 //RX_FDDRC_BAND_MARGIN_1 +91 0x0050 //RX_FDDRC_BAND_MARGIN_2 +92 0x0080 //RX_FDDRC_BAND_MARGIN_3 +93 0x0007 //RX_FDDRC_BLOCK_EXP +94 0x5000 //RX_FDDRC_THRD_2_0 +95 0x5000 //RX_FDDRC_THRD_2_1 +96 0x5000 //RX_FDDRC_THRD_2_2 +97 0x5000 //RX_FDDRC_THRD_2_3 +98 0x6400 //RX_FDDRC_THRD_3_0 +99 0x6400 //RX_FDDRC_THRD_3_1 +100 0x6400 //RX_FDDRC_THRD_3_2 +101 0x6400 //RX_FDDRC_THRD_3_3 +102 0x2000 //RX_FDDRC_SLANT_0_0 +103 0x2000 //RX_FDDRC_SLANT_0_1 +104 0x2000 //RX_FDDRC_SLANT_0_2 +105 0x2000 //RX_FDDRC_SLANT_0_3 +106 0x5333 //RX_FDDRC_SLANT_1_0 +107 0x5333 //RX_FDDRC_SLANT_1_1 +108 0x5333 //RX_FDDRC_SLANT_1_2 +109 0x5333 //RX_FDDRC_SLANT_1_3 +110 0x0000 //RX_FDDRC_RESRV_0 +129 0x0032 //RX_SPK_VOL +130 0x0000 //RX_VOL_RESRV_0 +#VOL 4 +6 0x1000 //RX_TDDRC_ALPHA_UP_1 +7 0x1000 //RX_TDDRC_ALPHA_UP_2 +8 0x1000 //RX_TDDRC_ALPHA_UP_3 +9 0x1000 //RX_TDDRC_ALPHA_UP_4 +27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +33 0x7000 //RX_TDDRC_LIMITER_THRD +34 0x0800 //RX_TDDRC_LIMITER_GAIN +112 0x0001 //RX_TDDRC_THRD_0 +113 0x0002 //RX_TDDRC_THRD_1 +114 0x1800 //RX_TDDRC_THRD_2 +115 0x1800 //RX_TDDRC_THRD_3 +116 0x7FFF //RX_TDDRC_SLANT_0 +117 0x7FFF //RX_TDDRC_SLANT_1 +118 0x1000 //RX_TDDRC_ALPHA_UP_0 +119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +120 0x0000 //RX_TDDRC_HMNC_FLAG +121 0x199A //RX_TDDRC_HMNC_GAIN +122 0x0001 //RX_TDDRC_SMT_FLAG +123 0x0CCD //RX_TDDRC_SMT_W +124 0x057F //RX_TDDRC_DRC_GAIN +38 0x0020 //RX_FDEQ_SUBNUM +39 0x483E //RX_FDEQ_GAIN_0 +40 0x3E3E //RX_FDEQ_GAIN_1 +41 0x3E4A //RX_FDEQ_GAIN_2 +42 0x5464 //RX_FDEQ_GAIN_3 +43 0x7072 //RX_FDEQ_GAIN_4 +44 0x8576 //RX_FDEQ_GAIN_5 +45 0x7880 //RX_FDEQ_GAIN_6 +46 0x8888 //RX_FDEQ_GAIN_7 +47 0x949C //RX_FDEQ_GAIN_8 +48 0x96A4 //RX_FDEQ_GAIN_9 +49 0xA994 //RX_FDEQ_GAIN_10 +50 0x9487 //RX_FDEQ_GAIN_11 +51 0x6F64 //RX_FDEQ_GAIN_12 +52 0x625A //RX_FDEQ_GAIN_13 +53 0x5D80 //RX_FDEQ_GAIN_14 +54 0x8890 //RX_FDEQ_GAIN_15 +55 0x4848 //RX_FDEQ_GAIN_16 +56 0x4848 //RX_FDEQ_GAIN_17 +57 0x4848 //RX_FDEQ_GAIN_18 +58 0x4848 //RX_FDEQ_GAIN_19 +59 0x4848 //RX_FDEQ_GAIN_20 +60 0x4848 //RX_FDEQ_GAIN_21 +61 0x4848 //RX_FDEQ_GAIN_22 +62 0x4848 //RX_FDEQ_GAIN_23 +63 0x0202 //RX_FDEQ_BIN_0 +64 0x0202 //RX_FDEQ_BIN_1 +65 0x0301 //RX_FDEQ_BIN_2 +66 0x0503 //RX_FDEQ_BIN_3 +67 0x0406 //RX_FDEQ_BIN_4 +68 0x0109 //RX_FDEQ_BIN_5 +69 0x0708 //RX_FDEQ_BIN_6 +70 0x090A //RX_FDEQ_BIN_7 +71 0x0B0C //RX_FDEQ_BIN_8 +72 0x0D0E //RX_FDEQ_BIN_9 +73 0x1013 //RX_FDEQ_BIN_10 +74 0x1719 //RX_FDEQ_BIN_11 +75 0x1B0F //RX_FDEQ_BIN_12 +76 0x141E //RX_FDEQ_BIN_13 +77 0x3728 //RX_FDEQ_BIN_14 +78 0x282C //RX_FDEQ_BIN_15 +79 0x0000 //RX_FDEQ_BIN_16 +80 0x0000 //RX_FDEQ_BIN_17 +81 0x0000 //RX_FDEQ_BIN_18 +82 0x0000 //RX_FDEQ_BIN_19 +83 0x0000 //RX_FDEQ_BIN_20 +84 0x0000 //RX_FDEQ_BIN_21 +85 0x0000 //RX_FDEQ_BIN_22 +86 0x0000 //RX_FDEQ_BIN_23 +87 0x4000 //RX_FDEQ_RESRV_0 +88 0x0320 //RX_FDEQ_RESRV_1 +89 0x0018 //RX_FDDRC_BAND_MARGIN_0 +90 0x0030 //RX_FDDRC_BAND_MARGIN_1 +91 0x0050 //RX_FDDRC_BAND_MARGIN_2 +92 0x0080 //RX_FDDRC_BAND_MARGIN_3 +93 0x0007 //RX_FDDRC_BLOCK_EXP +94 0x5000 //RX_FDDRC_THRD_2_0 +95 0x5000 //RX_FDDRC_THRD_2_1 +96 0x5000 //RX_FDDRC_THRD_2_2 +97 0x5000 //RX_FDDRC_THRD_2_3 +98 0x6400 //RX_FDDRC_THRD_3_0 +99 0x6400 //RX_FDDRC_THRD_3_1 +100 0x6400 //RX_FDDRC_THRD_3_2 +101 0x6400 //RX_FDDRC_THRD_3_3 +102 0x2000 //RX_FDDRC_SLANT_0_0 +103 0x2000 //RX_FDDRC_SLANT_0_1 +104 0x2000 //RX_FDDRC_SLANT_0_2 +105 0x2000 //RX_FDDRC_SLANT_0_3 +106 0x5333 //RX_FDDRC_SLANT_1_0 +107 0x5333 //RX_FDDRC_SLANT_1_1 +108 0x5333 //RX_FDDRC_SLANT_1_2 +109 0x5333 //RX_FDDRC_SLANT_1_3 +110 0x0000 //RX_FDDRC_RESRV_0 +129 0x0047 //RX_SPK_VOL +130 0x0000 //RX_VOL_RESRV_0 +#VOL 5 +6 0x1000 //RX_TDDRC_ALPHA_UP_1 +7 0x1000 //RX_TDDRC_ALPHA_UP_2 +8 0x1000 //RX_TDDRC_ALPHA_UP_3 +9 0x1000 //RX_TDDRC_ALPHA_UP_4 +27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +33 0x7000 //RX_TDDRC_LIMITER_THRD +34 0x0800 //RX_TDDRC_LIMITER_GAIN +112 0x0001 //RX_TDDRC_THRD_0 +113 0x0002 //RX_TDDRC_THRD_1 +114 0x1800 //RX_TDDRC_THRD_2 +115 0x1800 //RX_TDDRC_THRD_3 +116 0x7FFF //RX_TDDRC_SLANT_0 +117 0x7FFF //RX_TDDRC_SLANT_1 +118 0x1000 //RX_TDDRC_ALPHA_UP_0 +119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +120 0x0000 //RX_TDDRC_HMNC_FLAG +121 0x199A //RX_TDDRC_HMNC_GAIN +122 0x0001 //RX_TDDRC_SMT_FLAG +123 0x0CCD //RX_TDDRC_SMT_W +124 0x057F //RX_TDDRC_DRC_GAIN +38 0x0020 //RX_FDEQ_SUBNUM +39 0x483E //RX_FDEQ_GAIN_0 +40 0x3E3E //RX_FDEQ_GAIN_1 +41 0x3E4A //RX_FDEQ_GAIN_2 +42 0x5464 //RX_FDEQ_GAIN_3 +43 0x7072 //RX_FDEQ_GAIN_4 +44 0x8576 //RX_FDEQ_GAIN_5 +45 0x7880 //RX_FDEQ_GAIN_6 +46 0x8888 //RX_FDEQ_GAIN_7 +47 0x949C //RX_FDEQ_GAIN_8 +48 0x96A4 //RX_FDEQ_GAIN_9 +49 0xA994 //RX_FDEQ_GAIN_10 +50 0x9487 //RX_FDEQ_GAIN_11 +51 0x6F64 //RX_FDEQ_GAIN_12 +52 0x625A //RX_FDEQ_GAIN_13 +53 0x5D80 //RX_FDEQ_GAIN_14 +54 0x8890 //RX_FDEQ_GAIN_15 +55 0x4848 //RX_FDEQ_GAIN_16 +56 0x4848 //RX_FDEQ_GAIN_17 +57 0x4848 //RX_FDEQ_GAIN_18 +58 0x4848 //RX_FDEQ_GAIN_19 +59 0x4848 //RX_FDEQ_GAIN_20 +60 0x4848 //RX_FDEQ_GAIN_21 +61 0x4848 //RX_FDEQ_GAIN_22 +62 0x4848 //RX_FDEQ_GAIN_23 +63 0x0202 //RX_FDEQ_BIN_0 +64 0x0202 //RX_FDEQ_BIN_1 +65 0x0301 //RX_FDEQ_BIN_2 +66 0x0503 //RX_FDEQ_BIN_3 +67 0x0406 //RX_FDEQ_BIN_4 +68 0x0109 //RX_FDEQ_BIN_5 +69 0x0708 //RX_FDEQ_BIN_6 +70 0x090A //RX_FDEQ_BIN_7 +71 0x0B0C //RX_FDEQ_BIN_8 +72 0x0D0E //RX_FDEQ_BIN_9 +73 0x1013 //RX_FDEQ_BIN_10 +74 0x1719 //RX_FDEQ_BIN_11 +75 0x1B0F //RX_FDEQ_BIN_12 +76 0x141E //RX_FDEQ_BIN_13 +77 0x3728 //RX_FDEQ_BIN_14 +78 0x282C //RX_FDEQ_BIN_15 +79 0x0000 //RX_FDEQ_BIN_16 +80 0x0000 //RX_FDEQ_BIN_17 +81 0x0000 //RX_FDEQ_BIN_18 +82 0x0000 //RX_FDEQ_BIN_19 +83 0x0000 //RX_FDEQ_BIN_20 +84 0x0000 //RX_FDEQ_BIN_21 +85 0x0000 //RX_FDEQ_BIN_22 +86 0x0000 //RX_FDEQ_BIN_23 +87 0x4000 //RX_FDEQ_RESRV_0 +88 0x0320 //RX_FDEQ_RESRV_1 +89 0x0018 //RX_FDDRC_BAND_MARGIN_0 +90 0x0030 //RX_FDDRC_BAND_MARGIN_1 +91 0x0050 //RX_FDDRC_BAND_MARGIN_2 +92 0x0080 //RX_FDDRC_BAND_MARGIN_3 +93 0x0007 //RX_FDDRC_BLOCK_EXP +94 0x5000 //RX_FDDRC_THRD_2_0 +95 0x5000 //RX_FDDRC_THRD_2_1 +96 0x5000 //RX_FDDRC_THRD_2_2 +97 0x5000 //RX_FDDRC_THRD_2_3 +98 0x6400 //RX_FDDRC_THRD_3_0 +99 0x6400 //RX_FDDRC_THRD_3_1 +100 0x6400 //RX_FDDRC_THRD_3_2 +101 0x6400 //RX_FDDRC_THRD_3_3 +102 0x2000 //RX_FDDRC_SLANT_0_0 +103 0x2000 //RX_FDDRC_SLANT_0_1 +104 0x2000 //RX_FDDRC_SLANT_0_2 +105 0x2000 //RX_FDDRC_SLANT_0_3 +106 0x5333 //RX_FDDRC_SLANT_1_0 +107 0x5333 //RX_FDDRC_SLANT_1_1 +108 0x5333 //RX_FDDRC_SLANT_1_2 +109 0x5333 //RX_FDDRC_SLANT_1_3 +110 0x0000 //RX_FDDRC_RESRV_0 +129 0x0076 //RX_SPK_VOL +130 0x0000 //RX_VOL_RESRV_0 +#VOL 6 +6 0x1000 //RX_TDDRC_ALPHA_UP_1 +7 0x1000 //RX_TDDRC_ALPHA_UP_2 +8 0x1000 //RX_TDDRC_ALPHA_UP_3 +9 0x1000 //RX_TDDRC_ALPHA_UP_4 +27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +33 0x7000 //RX_TDDRC_LIMITER_THRD +34 0x0800 //RX_TDDRC_LIMITER_GAIN +112 0x0001 //RX_TDDRC_THRD_0 +113 0x0002 //RX_TDDRC_THRD_1 +114 0x1800 //RX_TDDRC_THRD_2 +115 0x1800 //RX_TDDRC_THRD_3 +116 0x7FFF //RX_TDDRC_SLANT_0 +117 0x7FFF //RX_TDDRC_SLANT_1 +118 0x1000 //RX_TDDRC_ALPHA_UP_0 +119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +120 0x0000 //RX_TDDRC_HMNC_FLAG +121 0x199A //RX_TDDRC_HMNC_GAIN +122 0x0001 //RX_TDDRC_SMT_FLAG +123 0x0CCD //RX_TDDRC_SMT_W +124 0x057F //RX_TDDRC_DRC_GAIN +38 0x0020 //RX_FDEQ_SUBNUM +39 0x483E //RX_FDEQ_GAIN_0 +40 0x3E3E //RX_FDEQ_GAIN_1 +41 0x3E4A //RX_FDEQ_GAIN_2 +42 0x5464 //RX_FDEQ_GAIN_3 +43 0x7072 //RX_FDEQ_GAIN_4 +44 0x8576 //RX_FDEQ_GAIN_5 +45 0x7880 //RX_FDEQ_GAIN_6 +46 0x8888 //RX_FDEQ_GAIN_7 +47 0x949C //RX_FDEQ_GAIN_8 +48 0x96A4 //RX_FDEQ_GAIN_9 +49 0xA994 //RX_FDEQ_GAIN_10 +50 0x9487 //RX_FDEQ_GAIN_11 +51 0x6F64 //RX_FDEQ_GAIN_12 +52 0x625A //RX_FDEQ_GAIN_13 +53 0x5D80 //RX_FDEQ_GAIN_14 +54 0x8890 //RX_FDEQ_GAIN_15 +55 0x4848 //RX_FDEQ_GAIN_16 +56 0x4848 //RX_FDEQ_GAIN_17 +57 0x4848 //RX_FDEQ_GAIN_18 +58 0x4848 //RX_FDEQ_GAIN_19 +59 0x4848 //RX_FDEQ_GAIN_20 +60 0x4848 //RX_FDEQ_GAIN_21 +61 0x4848 //RX_FDEQ_GAIN_22 +62 0x4848 //RX_FDEQ_GAIN_23 +63 0x0202 //RX_FDEQ_BIN_0 +64 0x0202 //RX_FDEQ_BIN_1 +65 0x0301 //RX_FDEQ_BIN_2 +66 0x0503 //RX_FDEQ_BIN_3 +67 0x0406 //RX_FDEQ_BIN_4 +68 0x0109 //RX_FDEQ_BIN_5 +69 0x0708 //RX_FDEQ_BIN_6 +70 0x090A //RX_FDEQ_BIN_7 +71 0x0B0C //RX_FDEQ_BIN_8 +72 0x0D0E //RX_FDEQ_BIN_9 +73 0x1013 //RX_FDEQ_BIN_10 +74 0x1719 //RX_FDEQ_BIN_11 +75 0x1B0F //RX_FDEQ_BIN_12 +76 0x141E //RX_FDEQ_BIN_13 +77 0x3728 //RX_FDEQ_BIN_14 +78 0x282C //RX_FDEQ_BIN_15 +79 0x0000 //RX_FDEQ_BIN_16 +80 0x0000 //RX_FDEQ_BIN_17 +81 0x0000 //RX_FDEQ_BIN_18 +82 0x0000 //RX_FDEQ_BIN_19 +83 0x0000 //RX_FDEQ_BIN_20 +84 0x0000 //RX_FDEQ_BIN_21 +85 0x0000 //RX_FDEQ_BIN_22 +86 0x0000 //RX_FDEQ_BIN_23 +87 0x4000 //RX_FDEQ_RESRV_0 +88 0x0320 //RX_FDEQ_RESRV_1 +89 0x0018 //RX_FDDRC_BAND_MARGIN_0 +90 0x0030 //RX_FDDRC_BAND_MARGIN_1 +91 0x0050 //RX_FDDRC_BAND_MARGIN_2 +92 0x0080 //RX_FDDRC_BAND_MARGIN_3 +93 0x0007 //RX_FDDRC_BLOCK_EXP +94 0x5000 //RX_FDDRC_THRD_2_0 +95 0x5000 //RX_FDDRC_THRD_2_1 +96 0x5000 //RX_FDDRC_THRD_2_2 +97 0x5000 //RX_FDDRC_THRD_2_3 +98 0x6400 //RX_FDDRC_THRD_3_0 +99 0x6400 //RX_FDDRC_THRD_3_1 +100 0x6400 //RX_FDDRC_THRD_3_2 +101 0x6400 //RX_FDDRC_THRD_3_3 +102 0x2000 //RX_FDDRC_SLANT_0_0 +103 0x2000 //RX_FDDRC_SLANT_0_1 +104 0x2000 //RX_FDDRC_SLANT_0_2 +105 0x2000 //RX_FDDRC_SLANT_0_3 +106 0x5333 //RX_FDDRC_SLANT_1_0 +107 0x5333 //RX_FDDRC_SLANT_1_1 +108 0x5333 //RX_FDDRC_SLANT_1_2 +109 0x5333 //RX_FDDRC_SLANT_1_3 +110 0x0000 //RX_FDDRC_RESRV_0 +129 0x0100 //RX_SPK_VOL +130 0x0000 //RX_VOL_RESRV_0 +#RX 2 +157 0x003C //RX_RECVFUNC_MODE_0 +158 0x0000 //RX_RECVFUNC_MODE_1 +159 0x0003 //RX_SAMPLINGFREQ_SIG +160 0x0003 //RX_SAMPLINGFREQ_PROC +161 0x000A //RX_FRAME_SZ +162 0x0000 //RX_DELAY_OPT +163 0x1000 //RX_TDDRC_ALPHA_UP_1 +164 0x1000 //RX_TDDRC_ALPHA_UP_2 +165 0x1000 //RX_TDDRC_ALPHA_UP_3 +166 0x1000 //RX_TDDRC_ALPHA_UP_4 +167 0x05AA //RX_PGA +168 0x7FFF //RX_A_HP +169 0x4000 //RX_B_PE +170 0x5800 //RX_THR_PITCH_DET_0 +171 0x5000 //RX_THR_PITCH_DET_1 +172 0x4000 //RX_THR_PITCH_DET_2 +173 0x0008 //RX_PITCH_BFR_LEN +174 0x0003 //RX_SBD_PITCH_DET +175 0x0100 //RX_PP_RESRV_0 +176 0x0020 //RX_PP_RESRV_1 +177 0x0600 //RX_N_SN_EST +178 0x000C //RX_N2_SN_EST +179 0x000F //RX_NS_LVL_CTRL +180 0xF800 //RX_THR_SN_EST +181 0x7E00 //RX_LAMBDA_PFILT +182 0x000A //RX_FENS_RESRV_0 +183 0x0190 //RX_FENS_RESRV_1 +184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +187 0x0002 //RX_EXTRA_NS_L +188 0x0800 //RX_EXTRA_NS_A +189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +190 0x7000 //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +192 0x199A //RX_A_POST_FLT +193 0x0000 //RX_LMT_THRD +194 0x4000 //RX_LMT_ALPHA +195 0x0020 //RX_FDEQ_SUBNUM +196 0x483E //RX_FDEQ_GAIN_0 +197 0x3E3E //RX_FDEQ_GAIN_1 +198 0x3E4C //RX_FDEQ_GAIN_2 +199 0x5064 //RX_FDEQ_GAIN_3 +200 0x7076 //RX_FDEQ_GAIN_4 +201 0x897A //RX_FDEQ_GAIN_5 +202 0x7C80 //RX_FDEQ_GAIN_6 +203 0x8888 //RX_FDEQ_GAIN_7 +204 0x949C //RX_FDEQ_GAIN_8 +205 0x96A4 //RX_FDEQ_GAIN_9 +206 0xA9A0 //RX_FDEQ_GAIN_10 +207 0x9487 //RX_FDEQ_GAIN_11 +208 0x6F64 //RX_FDEQ_GAIN_12 +209 0x625A //RX_FDEQ_GAIN_13 +210 0x5D80 //RX_FDEQ_GAIN_14 +211 0x8890 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0202 //RX_FDEQ_BIN_0 +221 0x0202 //RX_FDEQ_BIN_1 +222 0x0301 //RX_FDEQ_BIN_2 +223 0x0404 //RX_FDEQ_BIN_3 +224 0x0406 //RX_FDEQ_BIN_4 +225 0x0109 //RX_FDEQ_BIN_5 +226 0x0708 //RX_FDEQ_BIN_6 +227 0x090A //RX_FDEQ_BIN_7 +228 0x0B0C //RX_FDEQ_BIN_8 +229 0x0D0E //RX_FDEQ_BIN_9 +230 0x1013 //RX_FDEQ_BIN_10 +231 0x1719 //RX_FDEQ_BIN_11 +232 0x1B0F //RX_FDEQ_BIN_12 +233 0x141E //RX_FDEQ_BIN_13 +234 0x3728 //RX_FDEQ_BIN_14 +235 0x282C //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x4000 //RX_FDEQ_RESRV_0 +245 0x0320 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0030 //RX_FDDRC_BAND_MARGIN_1 +248 0x0050 //RX_FDDRC_BAND_MARGIN_2 +249 0x0080 //RX_FDDRC_BAND_MARGIN_3 +250 0x0007 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x5000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x6400 //RX_FDDRC_THRD_3_2 +258 0x6400 //RX_FDDRC_THRD_3_3 +259 0x2000 //RX_FDDRC_SLANT_0_0 +260 0x2000 //RX_FDDRC_SLANT_0_1 +261 0x2000 //RX_FDDRC_SLANT_0_2 +262 0x2000 //RX_FDDRC_SLANT_0_3 +263 0x5333 //RX_FDDRC_SLANT_1_0 +264 0x5333 //RX_FDDRC_SLANT_1_1 +265 0x5333 //RX_FDDRC_SLANT_1_2 +266 0x5333 //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +268 0x0002 //RX_FILTINDX +269 0x0001 //RX_TDDRC_THRD_0 +270 0x0002 //RX_TDDRC_THRD_1 +271 0x1800 //RX_TDDRC_THRD_2 +272 0x1800 //RX_TDDRC_THRD_3 +273 0x7FFF //RX_TDDRC_SLANT_0 +274 0x7FFF //RX_TDDRC_SLANT_1 +275 0x1000 //RX_TDDRC_ALPHA_UP_0 +276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x199A //RX_TDDRC_HMNC_GAIN +279 0x0001 //RX_TDDRC_SMT_FLAG +280 0x0CCD //RX_TDDRC_SMT_W +281 0x0551 //RX_TDDRC_DRC_GAIN +282 0x7C00 //RX_LAMBDA_PKA_FP +283 0x13E0 //RX_TPKA_FP +284 0x0080 //RX_MIN_G_FP +285 0x2000 //RX_MAX_G_FP +286 0x0100 //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 +288 0x0000 //RX_MAXLEVEL_CNG +289 0x3000 //RX_BWE_UV_TH +290 0x3000 //RX_BWE_UV_TH2 +291 0x1800 //RX_BWE_UV_TH3 +292 0x1000 //RX_BWE_V_TH +293 0x04CD //RX_BWE_GAIN1_V_TH1 +294 0x0F33 //RX_BWE_GAIN1_V_TH2 +295 0x7333 //RX_BWE_UV_EQ +296 0x199A //RX_BWE_V_EQ +297 0x7333 //RX_BWE_TONE_TH +298 0x0004 //RX_BWE_UV_HOLD_T +299 0x6CCD //RX_BWE_GAIN2_ALPHA +300 0x799A //RX_BWE_GAIN3_ALPHA +301 0x001E //RX_BWE_CUTOFF +302 0x3000 //RX_BWE_GAINFILL +303 0x3200 //RX_BWE_MAXTH_TONE +304 0x2000 //RX_BWE_EQ_0 +305 0x2000 //RX_BWE_EQ_1 +306 0x2000 //RX_BWE_EQ_2 +307 0x2000 //RX_BWE_EQ_3 +308 0x2000 //RX_BWE_EQ_4 +309 0x2000 //RX_BWE_EQ_5 +310 0x2000 //RX_BWE_EQ_6 +311 0x0000 //RX_BWE_RESRV_0 +312 0x0000 //RX_BWE_RESRV_1 +313 0x0000 //RX_BWE_RESRV_2 +#VOL 0 +163 0x1000 //RX_TDDRC_ALPHA_UP_1 +164 0x1000 //RX_TDDRC_ALPHA_UP_2 +165 0x1000 //RX_TDDRC_ALPHA_UP_3 +166 0x1000 //RX_TDDRC_ALPHA_UP_4 +184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +190 0x7000 //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +269 0x0001 //RX_TDDRC_THRD_0 +270 0x0002 //RX_TDDRC_THRD_1 +271 0x1800 //RX_TDDRC_THRD_2 +272 0x1800 //RX_TDDRC_THRD_3 +273 0x7FFF //RX_TDDRC_SLANT_0 +274 0x7FFF //RX_TDDRC_SLANT_1 +275 0x1000 //RX_TDDRC_ALPHA_UP_0 +276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x199A //RX_TDDRC_HMNC_GAIN +279 0x0001 //RX_TDDRC_SMT_FLAG +280 0x0CCD //RX_TDDRC_SMT_W +281 0x0551 //RX_TDDRC_DRC_GAIN +195 0x0020 //RX_FDEQ_SUBNUM +196 0x483E //RX_FDEQ_GAIN_0 +197 0x3E3E //RX_FDEQ_GAIN_1 +198 0x3E4C //RX_FDEQ_GAIN_2 +199 0x5064 //RX_FDEQ_GAIN_3 +200 0x7076 //RX_FDEQ_GAIN_4 +201 0x897A //RX_FDEQ_GAIN_5 +202 0x7C80 //RX_FDEQ_GAIN_6 +203 0x8888 //RX_FDEQ_GAIN_7 +204 0x949C //RX_FDEQ_GAIN_8 +205 0x96A4 //RX_FDEQ_GAIN_9 +206 0xA9A0 //RX_FDEQ_GAIN_10 +207 0x9487 //RX_FDEQ_GAIN_11 +208 0x6F64 //RX_FDEQ_GAIN_12 +209 0x625A //RX_FDEQ_GAIN_13 +210 0x5D80 //RX_FDEQ_GAIN_14 +211 0x8890 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0202 //RX_FDEQ_BIN_0 +221 0x0202 //RX_FDEQ_BIN_1 +222 0x0301 //RX_FDEQ_BIN_2 +223 0x0404 //RX_FDEQ_BIN_3 +224 0x0406 //RX_FDEQ_BIN_4 +225 0x0109 //RX_FDEQ_BIN_5 +226 0x0708 //RX_FDEQ_BIN_6 +227 0x090A //RX_FDEQ_BIN_7 +228 0x0B0C //RX_FDEQ_BIN_8 +229 0x0D0E //RX_FDEQ_BIN_9 +230 0x1013 //RX_FDEQ_BIN_10 +231 0x1719 //RX_FDEQ_BIN_11 +232 0x1B0F //RX_FDEQ_BIN_12 +233 0x141E //RX_FDEQ_BIN_13 +234 0x3728 //RX_FDEQ_BIN_14 +235 0x282C //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x4000 //RX_FDEQ_RESRV_0 +245 0x0320 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0030 //RX_FDDRC_BAND_MARGIN_1 +248 0x0050 //RX_FDDRC_BAND_MARGIN_2 +249 0x0080 //RX_FDDRC_BAND_MARGIN_3 +250 0x0007 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x5000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x6400 //RX_FDDRC_THRD_3_2 +258 0x6400 //RX_FDDRC_THRD_3_3 +259 0x2000 //RX_FDDRC_SLANT_0_0 +260 0x2000 //RX_FDDRC_SLANT_0_1 +261 0x2000 //RX_FDDRC_SLANT_0_2 +262 0x2000 //RX_FDDRC_SLANT_0_3 +263 0x5333 //RX_FDDRC_SLANT_1_0 +264 0x5333 //RX_FDDRC_SLANT_1_1 +265 0x5333 //RX_FDDRC_SLANT_1_2 +266 0x5333 //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +286 0x000A //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 +#VOL 1 +163 0x1000 //RX_TDDRC_ALPHA_UP_1 +164 0x1000 //RX_TDDRC_ALPHA_UP_2 +165 0x1000 //RX_TDDRC_ALPHA_UP_3 +166 0x1000 //RX_TDDRC_ALPHA_UP_4 +184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +190 0x7000 //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +269 0x0001 //RX_TDDRC_THRD_0 +270 0x0002 //RX_TDDRC_THRD_1 +271 0x1800 //RX_TDDRC_THRD_2 +272 0x1800 //RX_TDDRC_THRD_3 +273 0x7FFF //RX_TDDRC_SLANT_0 +274 0x7FFF //RX_TDDRC_SLANT_1 +275 0x1000 //RX_TDDRC_ALPHA_UP_0 +276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x199A //RX_TDDRC_HMNC_GAIN +279 0x0001 //RX_TDDRC_SMT_FLAG +280 0x0CCD //RX_TDDRC_SMT_W +281 0x0551 //RX_TDDRC_DRC_GAIN +195 0x0020 //RX_FDEQ_SUBNUM +196 0x483E //RX_FDEQ_GAIN_0 +197 0x3E3E //RX_FDEQ_GAIN_1 +198 0x3E4C //RX_FDEQ_GAIN_2 +199 0x5064 //RX_FDEQ_GAIN_3 +200 0x7076 //RX_FDEQ_GAIN_4 +201 0x897A //RX_FDEQ_GAIN_5 +202 0x7C80 //RX_FDEQ_GAIN_6 +203 0x8888 //RX_FDEQ_GAIN_7 +204 0x949C //RX_FDEQ_GAIN_8 +205 0x96A4 //RX_FDEQ_GAIN_9 +206 0xA9A0 //RX_FDEQ_GAIN_10 +207 0x9487 //RX_FDEQ_GAIN_11 +208 0x6F64 //RX_FDEQ_GAIN_12 +209 0x625A //RX_FDEQ_GAIN_13 +210 0x5D80 //RX_FDEQ_GAIN_14 +211 0x8890 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0202 //RX_FDEQ_BIN_0 +221 0x0202 //RX_FDEQ_BIN_1 +222 0x0301 //RX_FDEQ_BIN_2 +223 0x0404 //RX_FDEQ_BIN_3 +224 0x0406 //RX_FDEQ_BIN_4 +225 0x0109 //RX_FDEQ_BIN_5 +226 0x0708 //RX_FDEQ_BIN_6 +227 0x090A //RX_FDEQ_BIN_7 +228 0x0B0C //RX_FDEQ_BIN_8 +229 0x0D0E //RX_FDEQ_BIN_9 +230 0x1013 //RX_FDEQ_BIN_10 +231 0x1719 //RX_FDEQ_BIN_11 +232 0x1B0F //RX_FDEQ_BIN_12 +233 0x141E //RX_FDEQ_BIN_13 +234 0x3728 //RX_FDEQ_BIN_14 +235 0x282C //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x4000 //RX_FDEQ_RESRV_0 +245 0x0320 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0030 //RX_FDDRC_BAND_MARGIN_1 +248 0x0050 //RX_FDDRC_BAND_MARGIN_2 +249 0x0080 //RX_FDDRC_BAND_MARGIN_3 +250 0x0007 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x5000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x6400 //RX_FDDRC_THRD_3_2 +258 0x6400 //RX_FDDRC_THRD_3_3 +259 0x2000 //RX_FDDRC_SLANT_0_0 +260 0x2000 //RX_FDDRC_SLANT_0_1 +261 0x2000 //RX_FDDRC_SLANT_0_2 +262 0x2000 //RX_FDDRC_SLANT_0_3 +263 0x5333 //RX_FDDRC_SLANT_1_0 +264 0x5333 //RX_FDDRC_SLANT_1_1 +265 0x5333 //RX_FDDRC_SLANT_1_2 +266 0x5333 //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +286 0x0010 //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 +#VOL 2 +163 0x1000 //RX_TDDRC_ALPHA_UP_1 +164 0x1000 //RX_TDDRC_ALPHA_UP_2 +165 0x1000 //RX_TDDRC_ALPHA_UP_3 +166 0x1000 //RX_TDDRC_ALPHA_UP_4 +184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +190 0x7000 //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +269 0x0001 //RX_TDDRC_THRD_0 +270 0x0002 //RX_TDDRC_THRD_1 +271 0x1800 //RX_TDDRC_THRD_2 +272 0x1800 //RX_TDDRC_THRD_3 +273 0x7FFF //RX_TDDRC_SLANT_0 +274 0x7FFF //RX_TDDRC_SLANT_1 +275 0x1000 //RX_TDDRC_ALPHA_UP_0 +276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x199A //RX_TDDRC_HMNC_GAIN +279 0x0001 //RX_TDDRC_SMT_FLAG +280 0x0CCD //RX_TDDRC_SMT_W +281 0x0551 //RX_TDDRC_DRC_GAIN +195 0x0020 //RX_FDEQ_SUBNUM +196 0x483E //RX_FDEQ_GAIN_0 +197 0x3E3E //RX_FDEQ_GAIN_1 +198 0x3E4C //RX_FDEQ_GAIN_2 +199 0x5064 //RX_FDEQ_GAIN_3 +200 0x7076 //RX_FDEQ_GAIN_4 +201 0x897A //RX_FDEQ_GAIN_5 +202 0x7C80 //RX_FDEQ_GAIN_6 +203 0x8888 //RX_FDEQ_GAIN_7 +204 0x949C //RX_FDEQ_GAIN_8 +205 0x96A4 //RX_FDEQ_GAIN_9 +206 0xA9A0 //RX_FDEQ_GAIN_10 +207 0x9487 //RX_FDEQ_GAIN_11 +208 0x6F64 //RX_FDEQ_GAIN_12 +209 0x625A //RX_FDEQ_GAIN_13 +210 0x5D80 //RX_FDEQ_GAIN_14 +211 0x8890 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0202 //RX_FDEQ_BIN_0 +221 0x0202 //RX_FDEQ_BIN_1 +222 0x0301 //RX_FDEQ_BIN_2 +223 0x0404 //RX_FDEQ_BIN_3 +224 0x0406 //RX_FDEQ_BIN_4 +225 0x0109 //RX_FDEQ_BIN_5 +226 0x0708 //RX_FDEQ_BIN_6 +227 0x090A //RX_FDEQ_BIN_7 +228 0x0B0C //RX_FDEQ_BIN_8 +229 0x0D0E //RX_FDEQ_BIN_9 +230 0x1013 //RX_FDEQ_BIN_10 +231 0x1719 //RX_FDEQ_BIN_11 +232 0x1B0F //RX_FDEQ_BIN_12 +233 0x141E //RX_FDEQ_BIN_13 +234 0x3728 //RX_FDEQ_BIN_14 +235 0x282C //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x4000 //RX_FDEQ_RESRV_0 +245 0x0320 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0030 //RX_FDDRC_BAND_MARGIN_1 +248 0x0050 //RX_FDDRC_BAND_MARGIN_2 +249 0x0080 //RX_FDDRC_BAND_MARGIN_3 +250 0x0007 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x5000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x6400 //RX_FDDRC_THRD_3_2 +258 0x6400 //RX_FDDRC_THRD_3_3 +259 0x2000 //RX_FDDRC_SLANT_0_0 +260 0x2000 //RX_FDDRC_SLANT_0_1 +261 0x2000 //RX_FDDRC_SLANT_0_2 +262 0x2000 //RX_FDDRC_SLANT_0_3 +263 0x5333 //RX_FDDRC_SLANT_1_0 +264 0x5333 //RX_FDDRC_SLANT_1_1 +265 0x5333 //RX_FDDRC_SLANT_1_2 +266 0x5333 //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +286 0x001B //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 +#VOL 3 +163 0x1000 //RX_TDDRC_ALPHA_UP_1 +164 0x1000 //RX_TDDRC_ALPHA_UP_2 +165 0x1000 //RX_TDDRC_ALPHA_UP_3 +166 0x1000 //RX_TDDRC_ALPHA_UP_4 +184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +190 0x7000 //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +269 0x0001 //RX_TDDRC_THRD_0 +270 0x0002 //RX_TDDRC_THRD_1 +271 0x1800 //RX_TDDRC_THRD_2 +272 0x1800 //RX_TDDRC_THRD_3 +273 0x7FFF //RX_TDDRC_SLANT_0 +274 0x7FFF //RX_TDDRC_SLANT_1 +275 0x1000 //RX_TDDRC_ALPHA_UP_0 +276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x199A //RX_TDDRC_HMNC_GAIN +279 0x0001 //RX_TDDRC_SMT_FLAG +280 0x0CCD //RX_TDDRC_SMT_W +281 0x0551 //RX_TDDRC_DRC_GAIN +195 0x0020 //RX_FDEQ_SUBNUM +196 0x483E //RX_FDEQ_GAIN_0 +197 0x3E3E //RX_FDEQ_GAIN_1 +198 0x3E4C //RX_FDEQ_GAIN_2 +199 0x5064 //RX_FDEQ_GAIN_3 +200 0x7076 //RX_FDEQ_GAIN_4 +201 0x897A //RX_FDEQ_GAIN_5 +202 0x7C80 //RX_FDEQ_GAIN_6 +203 0x8888 //RX_FDEQ_GAIN_7 +204 0x949C //RX_FDEQ_GAIN_8 +205 0x96A4 //RX_FDEQ_GAIN_9 +206 0xA9A0 //RX_FDEQ_GAIN_10 +207 0x9487 //RX_FDEQ_GAIN_11 +208 0x6F64 //RX_FDEQ_GAIN_12 +209 0x625A //RX_FDEQ_GAIN_13 +210 0x5D80 //RX_FDEQ_GAIN_14 +211 0x8890 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0202 //RX_FDEQ_BIN_0 +221 0x0202 //RX_FDEQ_BIN_1 +222 0x0301 //RX_FDEQ_BIN_2 +223 0x0404 //RX_FDEQ_BIN_3 +224 0x0406 //RX_FDEQ_BIN_4 +225 0x0109 //RX_FDEQ_BIN_5 +226 0x0708 //RX_FDEQ_BIN_6 +227 0x090A //RX_FDEQ_BIN_7 +228 0x0B0C //RX_FDEQ_BIN_8 +229 0x0D0E //RX_FDEQ_BIN_9 +230 0x1013 //RX_FDEQ_BIN_10 +231 0x1719 //RX_FDEQ_BIN_11 +232 0x1B0F //RX_FDEQ_BIN_12 +233 0x141E //RX_FDEQ_BIN_13 +234 0x3728 //RX_FDEQ_BIN_14 +235 0x282C //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x4000 //RX_FDEQ_RESRV_0 +245 0x0320 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0030 //RX_FDDRC_BAND_MARGIN_1 +248 0x0050 //RX_FDDRC_BAND_MARGIN_2 +249 0x0080 //RX_FDDRC_BAND_MARGIN_3 +250 0x0007 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x5000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x6400 //RX_FDDRC_THRD_3_2 +258 0x6400 //RX_FDDRC_THRD_3_3 +259 0x2000 //RX_FDDRC_SLANT_0_0 +260 0x2000 //RX_FDDRC_SLANT_0_1 +261 0x2000 //RX_FDDRC_SLANT_0_2 +262 0x2000 //RX_FDDRC_SLANT_0_3 +263 0x5333 //RX_FDDRC_SLANT_1_0 +264 0x5333 //RX_FDDRC_SLANT_1_1 +265 0x5333 //RX_FDDRC_SLANT_1_2 +266 0x5333 //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +286 0x0032 //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 +#VOL 4 +163 0x1000 //RX_TDDRC_ALPHA_UP_1 +164 0x1000 //RX_TDDRC_ALPHA_UP_2 +165 0x1000 //RX_TDDRC_ALPHA_UP_3 +166 0x1000 //RX_TDDRC_ALPHA_UP_4 +184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +190 0x7000 //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +269 0x0001 //RX_TDDRC_THRD_0 +270 0x0002 //RX_TDDRC_THRD_1 +271 0x1800 //RX_TDDRC_THRD_2 +272 0x1800 //RX_TDDRC_THRD_3 +273 0x7FFF //RX_TDDRC_SLANT_0 +274 0x7FFF //RX_TDDRC_SLANT_1 +275 0x1000 //RX_TDDRC_ALPHA_UP_0 +276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x199A //RX_TDDRC_HMNC_GAIN +279 0x0001 //RX_TDDRC_SMT_FLAG +280 0x0CCD //RX_TDDRC_SMT_W +281 0x0551 //RX_TDDRC_DRC_GAIN +195 0x0020 //RX_FDEQ_SUBNUM +196 0x483E //RX_FDEQ_GAIN_0 +197 0x3E3E //RX_FDEQ_GAIN_1 +198 0x3E4C //RX_FDEQ_GAIN_2 +199 0x5064 //RX_FDEQ_GAIN_3 +200 0x7076 //RX_FDEQ_GAIN_4 +201 0x897A //RX_FDEQ_GAIN_5 +202 0x7C80 //RX_FDEQ_GAIN_6 +203 0x8888 //RX_FDEQ_GAIN_7 +204 0x949C //RX_FDEQ_GAIN_8 +205 0x96A4 //RX_FDEQ_GAIN_9 +206 0xA9A0 //RX_FDEQ_GAIN_10 +207 0x9487 //RX_FDEQ_GAIN_11 +208 0x6F64 //RX_FDEQ_GAIN_12 +209 0x625A //RX_FDEQ_GAIN_13 +210 0x5D80 //RX_FDEQ_GAIN_14 +211 0x8890 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0202 //RX_FDEQ_BIN_0 +221 0x0202 //RX_FDEQ_BIN_1 +222 0x0301 //RX_FDEQ_BIN_2 +223 0x0404 //RX_FDEQ_BIN_3 +224 0x0406 //RX_FDEQ_BIN_4 +225 0x0109 //RX_FDEQ_BIN_5 +226 0x0708 //RX_FDEQ_BIN_6 +227 0x090A //RX_FDEQ_BIN_7 +228 0x0B0C //RX_FDEQ_BIN_8 +229 0x0D0E //RX_FDEQ_BIN_9 +230 0x1013 //RX_FDEQ_BIN_10 +231 0x1719 //RX_FDEQ_BIN_11 +232 0x1B0F //RX_FDEQ_BIN_12 +233 0x141E //RX_FDEQ_BIN_13 +234 0x3728 //RX_FDEQ_BIN_14 +235 0x282C //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x4000 //RX_FDEQ_RESRV_0 +245 0x0320 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0030 //RX_FDDRC_BAND_MARGIN_1 +248 0x0050 //RX_FDDRC_BAND_MARGIN_2 +249 0x0080 //RX_FDDRC_BAND_MARGIN_3 +250 0x0007 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x5000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x6400 //RX_FDDRC_THRD_3_2 +258 0x6400 //RX_FDDRC_THRD_3_3 +259 0x2000 //RX_FDDRC_SLANT_0_0 +260 0x2000 //RX_FDDRC_SLANT_0_1 +261 0x2000 //RX_FDDRC_SLANT_0_2 +262 0x2000 //RX_FDDRC_SLANT_0_3 +263 0x5333 //RX_FDDRC_SLANT_1_0 +264 0x5333 //RX_FDDRC_SLANT_1_1 +265 0x5333 //RX_FDDRC_SLANT_1_2 +266 0x5333 //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +286 0x0047 //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 +#VOL 5 +163 0x1000 //RX_TDDRC_ALPHA_UP_1 +164 0x1000 //RX_TDDRC_ALPHA_UP_2 +165 0x1000 //RX_TDDRC_ALPHA_UP_3 +166 0x1000 //RX_TDDRC_ALPHA_UP_4 +184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +190 0x7000 //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +269 0x0001 //RX_TDDRC_THRD_0 +270 0x0002 //RX_TDDRC_THRD_1 +271 0x1800 //RX_TDDRC_THRD_2 +272 0x1800 //RX_TDDRC_THRD_3 +273 0x7FFF //RX_TDDRC_SLANT_0 +274 0x7FFF //RX_TDDRC_SLANT_1 +275 0x1000 //RX_TDDRC_ALPHA_UP_0 +276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x199A //RX_TDDRC_HMNC_GAIN +279 0x0001 //RX_TDDRC_SMT_FLAG +280 0x0CCD //RX_TDDRC_SMT_W +281 0x0551 //RX_TDDRC_DRC_GAIN +195 0x0020 //RX_FDEQ_SUBNUM +196 0x483E //RX_FDEQ_GAIN_0 +197 0x3E3E //RX_FDEQ_GAIN_1 +198 0x3E4C //RX_FDEQ_GAIN_2 +199 0x5064 //RX_FDEQ_GAIN_3 +200 0x7076 //RX_FDEQ_GAIN_4 +201 0x897A //RX_FDEQ_GAIN_5 +202 0x7C80 //RX_FDEQ_GAIN_6 +203 0x8888 //RX_FDEQ_GAIN_7 +204 0x949C //RX_FDEQ_GAIN_8 +205 0x96A4 //RX_FDEQ_GAIN_9 +206 0xA9A0 //RX_FDEQ_GAIN_10 +207 0x9487 //RX_FDEQ_GAIN_11 +208 0x6F64 //RX_FDEQ_GAIN_12 +209 0x625A //RX_FDEQ_GAIN_13 +210 0x5D80 //RX_FDEQ_GAIN_14 +211 0x8890 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0202 //RX_FDEQ_BIN_0 +221 0x0202 //RX_FDEQ_BIN_1 +222 0x0301 //RX_FDEQ_BIN_2 +223 0x0404 //RX_FDEQ_BIN_3 +224 0x0406 //RX_FDEQ_BIN_4 +225 0x0109 //RX_FDEQ_BIN_5 +226 0x0708 //RX_FDEQ_BIN_6 +227 0x090A //RX_FDEQ_BIN_7 +228 0x0B0C //RX_FDEQ_BIN_8 +229 0x0D0E //RX_FDEQ_BIN_9 +230 0x1013 //RX_FDEQ_BIN_10 +231 0x1719 //RX_FDEQ_BIN_11 +232 0x1B0F //RX_FDEQ_BIN_12 +233 0x141E //RX_FDEQ_BIN_13 +234 0x3728 //RX_FDEQ_BIN_14 +235 0x282C //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x4000 //RX_FDEQ_RESRV_0 +245 0x0320 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0030 //RX_FDDRC_BAND_MARGIN_1 +248 0x0050 //RX_FDDRC_BAND_MARGIN_2 +249 0x0080 //RX_FDDRC_BAND_MARGIN_3 +250 0x0007 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x5000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x6400 //RX_FDDRC_THRD_3_2 +258 0x6400 //RX_FDDRC_THRD_3_3 +259 0x2000 //RX_FDDRC_SLANT_0_0 +260 0x2000 //RX_FDDRC_SLANT_0_1 +261 0x2000 //RX_FDDRC_SLANT_0_2 +262 0x2000 //RX_FDDRC_SLANT_0_3 +263 0x5333 //RX_FDDRC_SLANT_1_0 +264 0x5333 //RX_FDDRC_SLANT_1_1 +265 0x5333 //RX_FDDRC_SLANT_1_2 +266 0x5333 //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +286 0x0076 //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 +#VOL 6 +163 0x1000 //RX_TDDRC_ALPHA_UP_1 +164 0x1000 //RX_TDDRC_ALPHA_UP_2 +165 0x1000 //RX_TDDRC_ALPHA_UP_3 +166 0x1000 //RX_TDDRC_ALPHA_UP_4 +184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +190 0x7000 //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +269 0x0001 //RX_TDDRC_THRD_0 +270 0x0002 //RX_TDDRC_THRD_1 +271 0x1800 //RX_TDDRC_THRD_2 +272 0x1800 //RX_TDDRC_THRD_3 +273 0x7FFF //RX_TDDRC_SLANT_0 +274 0x7FFF //RX_TDDRC_SLANT_1 +275 0x1000 //RX_TDDRC_ALPHA_UP_0 +276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x199A //RX_TDDRC_HMNC_GAIN +279 0x0001 //RX_TDDRC_SMT_FLAG +280 0x0CCD //RX_TDDRC_SMT_W +281 0x0551 //RX_TDDRC_DRC_GAIN +195 0x0020 //RX_FDEQ_SUBNUM +196 0x483E //RX_FDEQ_GAIN_0 +197 0x3E3E //RX_FDEQ_GAIN_1 +198 0x3E4C //RX_FDEQ_GAIN_2 +199 0x5064 //RX_FDEQ_GAIN_3 +200 0x7076 //RX_FDEQ_GAIN_4 +201 0x897A //RX_FDEQ_GAIN_5 +202 0x7C80 //RX_FDEQ_GAIN_6 +203 0x8888 //RX_FDEQ_GAIN_7 +204 0x949C //RX_FDEQ_GAIN_8 +205 0x96A4 //RX_FDEQ_GAIN_9 +206 0xA9A0 //RX_FDEQ_GAIN_10 +207 0x9487 //RX_FDEQ_GAIN_11 +208 0x6F64 //RX_FDEQ_GAIN_12 +209 0x625A //RX_FDEQ_GAIN_13 +210 0x5D80 //RX_FDEQ_GAIN_14 +211 0x8890 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0202 //RX_FDEQ_BIN_0 +221 0x0202 //RX_FDEQ_BIN_1 +222 0x0301 //RX_FDEQ_BIN_2 +223 0x0404 //RX_FDEQ_BIN_3 +224 0x0406 //RX_FDEQ_BIN_4 +225 0x0109 //RX_FDEQ_BIN_5 +226 0x0708 //RX_FDEQ_BIN_6 +227 0x090A //RX_FDEQ_BIN_7 +228 0x0B0C //RX_FDEQ_BIN_8 +229 0x0D0E //RX_FDEQ_BIN_9 +230 0x1013 //RX_FDEQ_BIN_10 +231 0x1719 //RX_FDEQ_BIN_11 +232 0x1B0F //RX_FDEQ_BIN_12 +233 0x141E //RX_FDEQ_BIN_13 +234 0x3728 //RX_FDEQ_BIN_14 +235 0x282C //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x4000 //RX_FDEQ_RESRV_0 +245 0x0320 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0030 //RX_FDDRC_BAND_MARGIN_1 +248 0x0050 //RX_FDDRC_BAND_MARGIN_2 +249 0x0080 //RX_FDDRC_BAND_MARGIN_3 +250 0x0007 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x5000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x6400 //RX_FDDRC_THRD_3_2 +258 0x6400 //RX_FDDRC_THRD_3_3 +259 0x2000 //RX_FDDRC_SLANT_0_0 +260 0x2000 //RX_FDDRC_SLANT_0_1 +261 0x2000 //RX_FDDRC_SLANT_0_2 +262 0x2000 //RX_FDDRC_SLANT_0_3 +263 0x5333 //RX_FDDRC_SLANT_1_0 +264 0x5333 //RX_FDDRC_SLANT_1_1 +265 0x5333 //RX_FDDRC_SLANT_1_2 +266 0x5333 //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +286 0x0100 //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 diff --git a/audio/cheetah/tuning/fortemedia/HANDSFREE.dat b/audio/cheetah/tuning/fortemedia/HANDSFREE.dat index b3de412..850e7a1 100644 Binary files a/audio/cheetah/tuning/fortemedia/HANDSFREE.dat and b/audio/cheetah/tuning/fortemedia/HANDSFREE.dat differ diff --git a/audio/cheetah/tuning/fortemedia/HANDSFREE.mods b/audio/cheetah/tuning/fortemedia/HANDSFREE.mods index 31fc392..0ecdece 100644 --- a/audio/cheetah/tuning/fortemedia/HANDSFREE.mods +++ b/audio/cheetah/tuning/fortemedia/HANDSFREE.mods @@ -1,10529 +1,12 @@ #PLATFORM_NAME gChip #EXPORT_FLAG HANDSFREE -#SINGLE_API_VER 1.1.6 -#SAVE_TIME 2021-12-14 12:54:51 - -#CASE_NAME HANDSFREE-HANDSFREE-RESERVE1-FB -#PARAM_TYPE TX+RX -#TOTAL_CUSTOM_STEP 7 -#TX -0 0x0001 //TX_OPERATION_MODE_0 -1 0x0001 //TX_OPERATION_MODE_1 -2 0x0033 //TX_PATCH_REG -3 0x6B54 //TX_SENDFUNC_MODE_0 -4 0x0001 //TX_SENDFUNC_MODE_1 -5 0x0003 //TX_NUM_MIC -6 0x0004 //TX_SAMPLINGFREQ_SIG -7 0x0004 //TX_SAMPLINGFREQ_PROC -8 0x000A //TX_FRAME_SZ_SIG -9 0x000A //TX_FRAME_SZ -10 0x0000 //TX_DELAY_OPT -11 0x0028 //TX_MAX_TAIL_LENGTH -12 0x0001 //TX_NUM_LOUTCHN -13 0x0001 //TX_MAXNUM_AECREF -14 0x0000 //TX_DBG_FUNC_REG -15 0x0000 //TX_DBG_FUNC_REG1 -16 0x0000 //TX_SYS_RESRV_0 -17 0x0000 //TX_SYS_RESRV_1 -18 0x0000 //TX_SYS_RESRV_2 -19 0x0000 //TX_SYS_RESRV_3 -20 0x0000 //TX_DIST2REF0 -21 0x00A4 //TX_DIST2REF1 -22 0x0017 //TX_DIST2REF_02 -23 0x0000 //TX_DIST2REF_03 -24 0x0000 //TX_DIST2REF_04 -25 0x0000 //TX_DIST2REF_05 -26 0x0000 //TX_MMIC -27 0x0FF7 //TX_PGA_0 -28 0x0FF7 //TX_PGA_1 -29 0x0FF7 //TX_PGA_2 -30 0x0000 //TX_PGA_3 -31 0x0000 //TX_PGA_4 -32 0x0000 //TX_PGA_5 -33 0x0001 //TX_MIC_PAIRS -34 0x0000 //TX_MIC_PAIRS_HS -35 0x0002 //TX_MICS_FOR_BF -36 0x0000 //TX_MIC_PAIRS_FORL1 -37 0x0002 //TX_MICS_OF_PAIR0 -38 0x0002 //TX_MICS_OF_PAIR1 -39 0x0002 //TX_MICS_OF_PAIR2 -40 0x0002 //TX_MICS_OF_PAIR3 -41 0x0002 //TX_MIC_DATA_SRC0 -42 0x0000 //TX_MIC_DATA_SRC1 -43 0x0001 //TX_MIC_DATA_SRC2 -44 0x0000 //TX_MIC_DATA_SRC3 -45 0x0000 //TX_MIC_PAIR_CH_04 -46 0x0000 //TX_MIC_PAIR_CH_05 -47 0x0000 //TX_MIC_PAIR_CH_10 -48 0x0000 //TX_MIC_PAIR_CH_11 -49 0x0000 //TX_MIC_PAIR_CH_12 -50 0x0000 //TX_MIC_PAIR_CH_13 -51 0x0000 //TX_MIC_PAIR_CH_14 -52 0x05DC //TX_HD_BIN_MASK -53 0x0010 //TX_HD_SUBAND_MASK -54 0x19A1 //TX_HD_FRAME_AVG_MASK -55 0x0320 //TX_HD_MIN_FRQ -56 0x1000 //TX_HD_ALPHA_PSD -57 0x1100 //TX_T_PHPR1 -58 0x0000 //TX_T_PHPR2 -59 0x0000 //TX_T_PTPR -60 0x0000 //TX_T_PNPR -61 0x0000 //TX_T_PAPR1 -62 0xEE6C //TX_T_PSDVAT -63 0x0800 //TX_CNT -64 0x4000 //TX_ANTI_HOWL_GAIN -65 0x0001 //TX_MICFORBFMARK_0 -66 0x0001 //TX_MICFORBFMARK_1 -67 0x0001 //TX_MICFORBFMARK_2 -68 0x0001 //TX_MICFORBFMARK_3 -69 0x0001 //TX_MICFORBFMARK_4 -70 0x0001 //TX_MICFORBFMARK_5 -71 0x0000 //TX_DIST2REF_10 -72 0x3B33 //TX_DIST2REF_11 -73 0x0A70 //TX_DIST2REF2 -74 0x0000 //TX_DIST2REF_13 -75 0x0000 //TX_DIST2REF_14 -76 0x0000 //TX_DIST2REF_15 -77 0x0000 //TX_DIST2REF_20 -78 0x0000 //TX_DIST2REF_21 -79 0x0000 //TX_DIST2REF_22 -80 0x0000 //TX_DIST2REF_23 -81 0x0000 //TX_DIST2REF_24 -82 0x0000 //TX_DIST2REF_25 -83 0x0000 //TX_DIST2REF_30 -84 0x0000 //TX_DIST2REF_31 -85 0x0000 //TX_DIST2REF_32 -86 0x0000 //TX_DIST2REF_33 -87 0x0000 //TX_DIST2REF_34 -88 0x0000 //TX_DIST2REF_35 -89 0x0000 //TX_MIC_LOC_00 -90 0x0000 //TX_MIC_LOC_01 -91 0x0000 //TX_MIC_LOC_02 -92 0x0000 //TX_MIC_LOC_03 -93 0x0000 //TX_MIC_LOC_04 -94 0x0000 //TX_MIC_LOC_05 -95 0x0000 //TX_MIC_LOC_10 -96 0x0000 //TX_MIC_LOC_11 -97 0x0000 //TX_MIC_LOC_12 -98 0x0000 //TX_MIC_LOC_13 -99 0x0000 //TX_MIC_LOC_14 -100 0x0000 //TX_MIC_LOC_15 -101 0x0000 //TX_MIC_LOC_20 -102 0x0000 //TX_MIC_LOC_21 -103 0x0000 //TX_MIC_LOC_22 -104 0x0000 //TX_MIC_LOC_23 -105 0x0000 //TX_MIC_LOC_24 -106 0x0000 //TX_MIC_LOC_25 -107 0x0800 //TX_MIC_REFBLK_VOLUME -108 0x0CAE //TX_MIC_BLOCK_VOLUME -109 0x0000 //TX_INVERSE_MASK -110 0x0000 //TX_ADCS_MASK -111 0x04D0 //TX_ADCS_GAIN -112 0x4000 //TX_NFC_GAINFAC -113 0x0000 //TX_MAINMIC_BLKFACTOR -114 0x0000 //TX_REFMIC_BLKFACTOR -115 0x0000 //TX_BLMIC_BLKFACTOR -116 0x0000 //TX_BRMIC_BLKFACTOR -117 0x0031 //TX_MICBLK_START_BIN -118 0x0060 //TX_MICBLK_END_BIN -119 0x0015 //TX_MICBLK_FE_HOLD -120 0xFFF2 //TX_MICBLK_MR_EXP_TH -121 0xFFF2 //TX_MICBLK_LR_EXP_TH -122 0x0015 //TX_FENE_HOLD -123 0x4000 //TX_FE_ENER_TH_MTS -124 0x0004 //TX_FE_ENER_TH_EXP -125 0x6000 //TX_C_POST_FLT_MIC_MAINBLK -126 0x6000 //TX_C_POST_FLT_MIC_REFBLK -127 0x0010 //TX_MIC_BLOCK_N -128 0x7E56 //TX_A_HP -129 0x4000 //TX_B_PE -130 0x1800 //TX_THR_PITCH_DET_0 -131 0x1000 //TX_THR_PITCH_DET_1 -132 0x0800 //TX_THR_PITCH_DET_2 -133 0x0008 //TX_PITCH_BFR_LEN -134 0x0003 //TX_SBD_PITCH_DET -135 0x0050 //TX_TD_AEC_L -136 0x4000 //TX_MU0_UNP_TD_AEC -137 0x1000 //TX_MU0_PTD_TD_AEC -138 0x0000 //TX_PP_RESRV_0 -139 0x2A94 //TX_PP_RESRV_1 -140 0x55F0 //TX_PP_RESRV_2 -141 0x0000 //TX_PP_RESRV_3 -142 0x0000 //TX_PP_RESRV_4 -143 0x0000 //TX_PP_RESRV_5 -144 0x0000 //TX_PP_RESRV_6 -145 0x0000 //TX_PP_RESRV_7 -146 0x0028 //TX_TAIL_LENGTH -147 0x0300 //TX_AEC_REF_GAIN_0 -148 0x0800 //TX_AEC_REF_GAIN_1 -149 0x0800 //TX_AEC_REF_GAIN_2 -150 0x7A00 //TX_EAD_THR -151 0x1000 //TX_THR_RE_EST -152 0x0800 //TX_MIN_EQ_RE_EST_0 -153 0x2000 //TX_MIN_EQ_RE_EST_1 -154 0x2000 //TX_MIN_EQ_RE_EST_2 -155 0x4000 //TX_MIN_EQ_RE_EST_3 -156 0x4000 //TX_MIN_EQ_RE_EST_4 -157 0x7FFF //TX_MIN_EQ_RE_EST_5 -158 0x7FFF //TX_MIN_EQ_RE_EST_6 -159 0x7FFF //TX_MIN_EQ_RE_EST_7 -160 0x7FFF //TX_MIN_EQ_RE_EST_8 -161 0x7FFF //TX_MIN_EQ_RE_EST_9 -162 0x7FFF //TX_MIN_EQ_RE_EST_10 -163 0x7FFF //TX_MIN_EQ_RE_EST_11 -164 0x7FFF //TX_MIN_EQ_RE_EST_12 -165 0x4000 //TX_LAMBDA_RE_EST -166 0x0CCD //TX_LAMBDA_CB_NLE -167 0x2000 //TX_C_POST_FLT -168 0x7FFF //TX_GAIN_NP -169 0x0180 //TX_SE_HOLD_N -170 0x00C8 //TX_DT_HOLD_N -171 0x09C4 //TX_DT2_HOLD_N -172 0x6666 //TX_AEC_RESRV_0 -173 0x0000 //TX_AEC_RESRV_1 -174 0x0014 //TX_AEC_RESRV_2 -175 0x0000 //TX_MIC_DELAY_LENGTH -176 0x0000 //TX_REF_DELAY_LENGTH -177 0x0000 //TX_ADD_LINEIN_GAINL -178 0x0000 //TX_ADD_LINEIN_GAINH -179 0x0000 //TX_MIN_EQ_RE_EST_14 -180 0x0000 //TX_DTD_THR1_8 -181 0x7FFF //TX_DTD_THR2_8 -182 0x0000 //TX_DTD_MIC_BLK2 -183 0x0008 //TX_FRQ_LIN_LEN -184 0x7FFF //TX_FRQ_AEC_LEN_RHO -185 0x6000 //TX_MU0_UNP_FRQ_AEC -186 0x4000 //TX_MU0_PTD_FRQ_AEC -187 0x000A //TX_MINENOISETH -188 0x0800 //TX_MU0_RE_EST -189 0x0001 //TX_AEC_NUM_CH -190 0x0000 //TX_BIGECHOATTENUATION_MAX -191 0x2000 //TX_A_POST_FLT_MICBLK -192 0x0000 //TX_BLKENERTH -193 0x0000 //TX_BLKENERHIGHTH -194 0x0000 //TX_NORMENERTH -195 0x0000 //TX_NORMENERHIGHTH -196 0x0000 //TX_NORMENERHIGHTHL -197 0x7D00 //TX_DTD_THR1_0 -198 0x7FF0 //TX_DTD_THR1_1 -199 0x7FF0 //TX_DTD_THR1_2 -200 0x7FF0 //TX_DTD_THR1_3 -201 0x7FF0 //TX_DTD_THR1_4 -202 0x7FF0 //TX_DTD_THR1_5 -203 0x7FF0 //TX_DTD_THR1_6 -204 0x0CCD //TX_DTD_THR2_0 -205 0x0CCD //TX_DTD_THR2_1 -206 0x0CCD //TX_DTD_THR2_2 -207 0x0CCD //TX_DTD_THR2_3 -208 0x0CCD //TX_DTD_THR2_4 -209 0x0CCD //TX_DTD_THR2_5 -210 0x0CCD //TX_DTD_THR2_6 -211 0x7FFF //TX_DTD_THR3 -212 0x0000 //TX_SPK_CUT_K -213 0x0DAC //TX_DT_CUT_K -214 0x0020 //TX_DT_CUT_THR -215 0x04EB //TX_COMFORT_G -216 0x01F4 //TX_POWER_YOUT_TH -217 0x4000 //TX_FDPFGAINECHO -218 0x0000 //TX_DTD_HD_THR -219 0x0000 //TX_SPK_CUT_K_S -220 0x7FFF //TX_DTD_MIC_BLK -221 0x023E //TX_ADPT_STRICT_L -222 0x023E //TX_ADPT_STRICT_H -223 0x0BB8 //TX_RATIO_DT_L_TH_LOW -224 0x3A98 //TX_RATIO_DT_H_TH_LOW -225 0x1770 //TX_RATIO_DT_L_TH_HIGH -226 0x4E20 //TX_RATIO_DT_H_TH_HIGH -227 0x09C4 //TX_RATIO_DT_L0_TH -228 0x2000 //TX_B_POST_FILT_ECHO_L -229 0x2000 //TX_B_POST_FILT_ECHO_H -230 0x0200 //TX_MIN_G_CTRL_ECHO -231 0x1000 //TX_B_LESSCUT_RTO_ECHO -232 0x0063 //TX_EPD_OFFSET_00 -233 0x0000 //TX_EPD_OFFST_01 -234 0x1388 //TX_RATIO_DT_L0_TH_HIGH -235 0x3A98 //TX_RATIO_DT_H_TH_CUT -236 0x7FFF //TX_MIN_EQ_RE_EST_13 -237 0x0000 //TX_DTD_THR1_7 -238 0x0000 //TX_DTD_THR2_7 -239 0x0800 //TX_DT_RESRV_7 -240 0x0800 //TX_DT_RESRV_8 -241 0x0000 //TX_DT_RESRV_9 -242 0xF800 //TX_THR_SN_EST_0 -243 0xFA00 //TX_THR_SN_EST_1 -244 0xFA00 //TX_THR_SN_EST_2 -245 0xFB00 //TX_THR_SN_EST_3 -246 0xFA00 //TX_THR_SN_EST_4 -247 0xFA00 //TX_THR_SN_EST_5 -248 0xF800 //TX_THR_SN_EST_6 -249 0xF800 //TX_THR_SN_EST_7 -250 0x0100 //TX_DELTA_THR_SN_EST_0 -251 0x0200 //TX_DELTA_THR_SN_EST_1 -252 0x0100 //TX_DELTA_THR_SN_EST_2 -253 0x0200 //TX_DELTA_THR_SN_EST_3 -254 0x0100 //TX_DELTA_THR_SN_EST_4 -255 0x0100 //TX_DELTA_THR_SN_EST_5 -256 0x0200 //TX_DELTA_THR_SN_EST_6 -257 0x0200 //TX_DELTA_THR_SN_EST_7 -258 0x4000 //TX_LAMBDA_NN_EST_0 -259 0x4000 //TX_LAMBDA_NN_EST_1 -260 0x4000 //TX_LAMBDA_NN_EST_2 -261 0x4000 //TX_LAMBDA_NN_EST_3 -262 0x4000 //TX_LAMBDA_NN_EST_4 -263 0x4000 //TX_LAMBDA_NN_EST_5 -264 0x4000 //TX_LAMBDA_NN_EST_6 -265 0x4000 //TX_LAMBDA_NN_EST_7 -266 0x0400 //TX_N_SN_EST -267 0x001E //TX_INBEAM_T -268 0x0041 //TX_INBEAMHOLDT -269 0x2000 //TX_G_STRICT -270 0x2000 //TX_EQ_THR_BF -271 0x799A //TX_LAMBDA_EQ_BF -272 0x1000 //TX_NE_RTO_TH -273 0x0400 //TX_NE_RTO_TH_L -274 0x0800 //TX_MAINREFRTOH_TH_H -275 0x0800 //TX_MAINREFRTOH_TH_L -276 0x0800 //TX_MAINREFRTO_TH_H -277 0x0800 //TX_MAINREFRTO_TH_L -278 0x0200 //TX_MAINREFRTO_TH_EQ -279 0x2000 //TX_B_POST_FLT_0 -280 0x1000 //TX_B_POST_FLT_1 -281 0x0010 //TX_NS_LVL_CTRL_0 -282 0x0014 //TX_NS_LVL_CTRL_1 -283 0x0014 //TX_NS_LVL_CTRL_2 -284 0x0018 //TX_NS_LVL_CTRL_3 -285 0x0016 //TX_NS_LVL_CTRL_4 -286 0x0014 //TX_NS_LVL_CTRL_5 -287 0x0011 //TX_NS_LVL_CTRL_6 -288 0x0011 //TX_NS_LVL_CTRL_7 -289 0x000F //TX_MIN_GAIN_S_0 -290 0x0010 //TX_MIN_GAIN_S_1 -291 0x0010 //TX_MIN_GAIN_S_2 -292 0x0010 //TX_MIN_GAIN_S_3 -293 0x0010 //TX_MIN_GAIN_S_4 -294 0x0010 //TX_MIN_GAIN_S_5 -295 0x0010 //TX_MIN_GAIN_S_6 -296 0x000F //TX_MIN_GAIN_S_7 -297 0x6000 //TX_NMOS_SUP -298 0x0000 //TX_NS_MAX_PRI_SNR_TH -299 0x0000 //TX_NMOS_SUP_MENSA -300 0x7FFF //TX_SNRI_SUP_0 -301 0x4000 //TX_SNRI_SUP_1 -302 0x4000 //TX_SNRI_SUP_2 -303 0x4000 //TX_SNRI_SUP_3 -304 0x4000 //TX_SNRI_SUP_4 -305 0x4000 //TX_SNRI_SUP_5 -306 0x50C0 //TX_SNRI_SUP_6 -307 0x7FFF //TX_SNRI_SUP_7 -308 0x7FFF //TX_THR_LFNS -309 0x0018 //TX_G_LFNS -310 0x09C4 //TX_GAIN0_NTH -311 0x000A //TX_MUSIC_MORENS -312 0x7FFF //TX_A_POST_FILT_0 -313 0x2000 //TX_A_POST_FILT_1 -314 0x5000 //TX_A_POST_FILT_S_0 -315 0x6000 //TX_A_POST_FILT_S_1 -316 0x4C00 //TX_A_POST_FILT_S_2 -317 0x4000 //TX_A_POST_FILT_S_3 -318 0x6000 //TX_A_POST_FILT_S_4 -319 0x4000 //TX_A_POST_FILT_S_5 -320 0x5000 //TX_A_POST_FILT_S_6 -321 0x7000 //TX_A_POST_FILT_S_7 -322 0x2000 //TX_B_POST_FILT_0 -323 0x1000 //TX_B_POST_FILT_1 -324 0x2000 //TX_B_POST_FILT_2 -325 0x2000 //TX_B_POST_FILT_3 -326 0x4000 //TX_B_POST_FILT_4 -327 0x4000 //TX_B_POST_FILT_5 -328 0x1000 //TX_B_POST_FILT_6 -329 0x2000 //TX_B_POST_FILT_7 -330 0x4000 //TX_B_LESSCUT_RTO_S_0 -331 0x7FFF //TX_B_LESSCUT_RTO_S_1 -332 0x7FFF //TX_B_LESSCUT_RTO_S_2 -333 0x7FFF //TX_B_LESSCUT_RTO_S_3 -334 0x7FFF //TX_B_LESSCUT_RTO_S_4 -335 0x7FFF //TX_B_LESSCUT_RTO_S_5 -336 0x6000 //TX_B_LESSCUT_RTO_S_6 -337 0x7FFF //TX_B_LESSCUT_RTO_S_7 -338 0x7C00 //TX_LAMBDA_PFILT -339 0x7C00 //TX_LAMBDA_PFILT_S_0 -340 0x7C00 //TX_LAMBDA_PFILT_S_1 -341 0x7C00 //TX_LAMBDA_PFILT_S_2 -342 0x7A00 //TX_LAMBDA_PFILT_S_3 -343 0x7C00 //TX_LAMBDA_PFILT_S_4 -344 0x7C00 //TX_LAMBDA_PFILT_S_5 -345 0x7C00 //TX_LAMBDA_PFILT_S_6 -346 0x7C00 //TX_LAMBDA_PFILT_S_7 -347 0x0000 //TX_K_PEPPER -348 0x0800 //TX_A_PEPPER -349 0x1EAA //TX_K_PEPPER_HF -350 0x0600 //TX_A_PEPPER_HF -351 0x0001 //TX_HMNC_BST_FLG -352 0x0200 //TX_HMNC_BST_THR -353 0x0200 //TX_DT_BINVAD_TH_0 -354 0x0200 //TX_DT_BINVAD_TH_1 -355 0x0200 //TX_DT_BINVAD_TH_2 -356 0x0200 //TX_DT_BINVAD_TH_3 -357 0x1F40 //TX_DT_BINVAD_ENDF -358 0x0100 //TX_C_POST_FLT_DT -359 0x0CCD //TX_NS_B_POST_FLT_LESSCUT -360 0x0100 //TX_DT_BOOST -361 0x0000 //TX_BF_SGRAD_FLG -362 0x0005 //TX_BF_DVG_TH -363 0x001E //TX_SN_C_F -364 0x0000 //TX_K_APT -365 0x0001 //TX_NOISEDET -366 0x0064 //TX_NDETCT -367 0x0050 //TX_NOISE_TH_0 -368 0x7FFF //TX_NOISE_TH_0_2 -369 0x7FFF //TX_NOISE_TH_0_3 -370 0x07D0 //TX_NOISE_TH_1 -371 0x0DAC //TX_NOISE_TH_2 -372 0x4E20 //TX_NOISE_TH_3 -373 0x4E20 //TX_NOISE_TH_4 -374 0x59D8 //TX_NOISE_TH_5 -375 0x7FFF //TX_NOISE_TH_5_2 -376 0x0000 //TX_NOISE_TH_5_3 -377 0x7FFF //TX_NOISE_TH_5_4 -378 0x2710 //TX_NOISE_TH_6 -379 0x0033 //TX_MINENOISE_TH -380 0x4000 //TX_MINENOISE_MIC0_TH_MTS -381 0xFFEE //TX_MINENOISE_MIC0_TH_EXP -382 0x6000 //TX_MINENOISE_MIC0_S_TH_MTS -383 0xFFF3 //TX_MINENOISE_MIC0_S_TH_EXP -384 0x0666 //TX_OUT_ENER_S_TH_CLEAN -385 0x0666 //TX_OUT_ENER_S_TH_LESSCLEAN -386 0x0333 //TX_OUT_ENER_S_TH_NOISY -387 0x019A //TX_OUT_ENER_TH_NOISE -388 0x0333 //TX_OUT_ENER_TH_SPEECH -389 0x2000 //TX_SN_NPB_GAIN -390 0x0000 //TX_NN_NPB_GAIN -391 0x0000 //TX_CSX_ALPHA_0 -392 0x0000 //TX_CSX_ALPHA_1 -393 0x0000 //TX_CSX_ALPHA_2 -394 0x0000 //TX_CSX_ALPHA_3 -395 0x0800 //TX_MU_ARSP_EST -396 0x00C8 //TX_P_OUTBEAM_MIN_TH -397 0x0002 //TX_EXTRA_NS_L -398 0x0800 //TX_EXTRA_NS_A -399 0x0005 //TX_VR_NOISE_FLOOR_TH -400 0x0148 //TX_MIN_G_LOW300HZ -401 0x0002 //TX_MAXLEVEL_CNG -402 0x00B4 //TX_STN_NOISE_TH -403 0x4000 //TX_POST_MASK_SUP -404 0x7FFF //TX_POST_MASK_ADJUST -405 0x00C8 //TX_NS_ENOISE_MIC0_TH -406 0x0033 //TX_MINENOISE_MIC0_TH -407 0x012C //TX_MINENOISE_MIC0_S_TH -408 0x7FFF //TX_MIN_G_CTRL_SSNS -409 0x0000 //TX_METAL_RTO_THR -410 0x4848 //TX_NS_FP_K_METAL -411 0x3A98 //TX_NOISEDET_BOOST_TH -412 0x0FA0 //TX_NSMOOTH_TH -413 0x0000 //TX_NS_RESRV_8 -414 0x1800 //TX_RHO_UPB -415 0x0BB8 //TX_N_HOLD_HS -416 0x0050 //TX_N_RHO_BFR0 -417 0x7FFF //TX_LAMBDA_ARSP_EST -418 0x0100 //TX_EXTRA_GAIN_MICBLOCK -419 0x0CCD //TX_THR_STD_NSR -420 0x019A //TX_THR_STD_PLH -421 0x2AF8 //TX_N_HOLD_STD -422 0x0066 //TX_THR_STD_RHO -423 0x2000 //TX_BF_RESET_THR_HS -424 0x09C4 //TX_SB_RTO_MEAN_TH -425 0x0000 //TX_SB_RHO_MEAN_TH_NTALK -426 0x3800 //TX_SB_RTO_MEAN_TH_ABN -427 0x2EE0 //TX_SB_RTO_MEAN_TH_RUB -428 0x0000 //TX_WTA_EN_RTO_TH -429 0x0000 //TX_TOP_ENER_TH_F -430 0x0000 //TX_DESIRED_TALK_HOLDT -431 0x0800 //TX_MIC_BLOCK_FACTOR -432 0x0000 //TX_NSEST_BFRLRNRDC -433 0x0000 //TX_THR_POST_FLT_HS -434 0x0010 //TX_HS_VAD_BIN -435 0x2666 //TX_THR_VAD_HS -436 0x2CCD //TX_MEAN_RTO_MIN_TH2 -437 0x0032 //TX_SILENCE_T -438 0x0000 //TX_A_POST_FLT_WTA -439 0x799A //TX_LAMBDA_PFLT_WTA -440 0x0000 //TX_SB_RHO_MEAN2_TH -441 0x0190 //TX_SB_RHO_MEAN3_TH -442 0x0000 //TX_HS_RESRV_4 -443 0x0000 //TX_HS_RESRV_5 -444 0x003C //TX_DOA_VAD_THR_1 -445 0x0000 //TX_DOA_VAD_THR_2 -446 0x0028 //TX_DOA_VAD_THR1_0 -447 0x0028 //TX_DOA_VAD_THR1_1 -448 0x0000 //TX_SRC_DOA_RNG_LOW_0A -449 0x00B4 //TX_SRC_DOA_RNG_HIGH_0A -450 0x005A //TX_DFLT_SRC_DOA_0A -451 0x0000 //TX_SRC_DOA_RNG_LOW_0B -452 0x0000 //TX_SRC_DOA_RNG_HIGH_0B -453 0x0000 //TX_DFLT_SRC_DOA_0B -454 0x0000 //TX_SRC_DOA_RNG_LOW_0C -455 0x0000 //TX_SRC_DOA_RNG_HIGH_0C -456 0x0000 //TX_DFLT_SRC_DOA_0C -457 0x0000 //TX_SRC_DOA_RNG_LOW_0D -458 0x0000 //TX_SRC_DOA_RNG_HIGH_0D -459 0x0000 //TX_DFLT_SRC_DOA_0D -460 0x0000 //TX_SRC_DOA_RNG_LOW_1A -461 0x00B4 //TX_SRC_DOA_RNG_HIGH_1A -462 0x005A //TX_DFLT_SRC_DOA_1A -463 0x0000 //TX_SRC_DOA_RNG_LOW_1B -464 0x00B4 //TX_SRC_DOA_RNG_HIGH_1B -465 0x005A //TX_DFLT_SRC_DOA_1B -466 0x0000 //TX_SRC_DOA_RNG_LOW_1C -467 0x00B4 //TX_SRC_DOA_RNG_HIGH_1C -468 0x005A //TX_DFLT_SRC_DOA_1C -469 0x0000 //TX_SRC_DOA_RNG_LOW_1D -470 0x00B4 //TX_SRC_DOA_RNG_HIGH_1D -471 0x005A //TX_DFLT_SRC_DOA_1D -472 0x0100 //TX_BF_HOLDOFF_T -473 0x7FFF //TX_DOA_COST_FACTOR -474 0x4000 //TX_MAINTOREFR_TH0 -475 0x071C //TX_DOA_TRK_THR -476 0x012C //TX_DOA_TRACK_HT -477 0x0200 //TX_N1_HOLD_HF -478 0x0100 //TX_N2_HOLD_HF -479 0x3000 //TX_BF_RESET_THR_HF -480 0x7333 //TX_DOA_SMOOTH -481 0x0800 //TX_MU_BF -482 0x0800 //TX_BF_MU_LF_B2 -483 0x0040 //TX_BF_FC_END_BIN_B2 -484 0x0020 //TX_BF_FC_END_BIN -485 0x0000 //TX_HF_RESRV_25 -486 0x0000 //TX_HF_RESRV_26 -487 0x0007 //TX_N_DOA_SEED -488 0x0001 //TX_FINE_DOA_SEARCH_FLG -489 0x0000 //TX_HF_RESRV_27 -490 0x038E //TX_DLT_SRC_DOA_RNG -491 0x0200 //TX_BF_MU_LF -492 0x0000 //TX_DFLT_SRC_LOC_0 -493 0x7FFF //TX_DFLT_SRC_LOC_1 -494 0x0000 //TX_DFLT_SRC_LOC_2 -495 0x038E //TX_DOA_TRACK_VADTH -496 0x0000 //TX_DOA_TRACK_NEW -497 0x0230 //TX_NOR_OFF_THR -498 0x0CCD //TX_MORE_ON_700HZ_THR -499 0x2000 //TX_MU_BF_ADPT_NS -500 0x0000 //TX_ADAPT_LEN -501 0x2000 //TX_MORE_SNS -502 0x0000 //TX_NOR_OFF_TH1 -503 0x0000 //TX_WIDE_MASK_TH -504 0x4650 //TX_SUBSNRATIOHIGH4MEANBCK_THR -505 0x7FFF //TX_C_POST_FLT_CUT -506 0x2000 //TX_RADIODTLV -507 0x0320 //TX_POWER_LINEIN_TH -508 0x0014 //TX_FE_VADCOUNT_TH_FC -509 0x0000 //TX_ECHO_SUPP_FC -510 0x0C80 //TX_ECHO_TH -511 0x6666 //TX_MIC_TO_BFGAIN -512 0x0000 //TX_MICTOBFGAIN0 -513 0x0000 //TX_FASTMUE_TH -514 0x0000 //TX_DERVB_LEN_0 -515 0x0000 //TX_DERVB_LEN_1 -516 0x0000 //TX_RHO_DERVB -517 0x0000 //TX_MIC_INDX_DERVB -518 0x0000 //TX_MU_DERVB -519 0x0000 //TX_DR_RESRV_0 -520 0x0000 //TX_DR_RESRV_1 -521 0x0000 //TX_DR_RESRV_2 -522 0x0000 //TX_DR_RESRV_3 -523 0x0000 //TX_DR_RESRV_4 -524 0x0000 //TX_DR_RESRV_5 -525 0x0000 //TX_DR_RESRV_6 -526 0x0000 //TX_DR_RESRV_7 -527 0x0000 //TX_DR_RESRV_8 -528 0x1333 //TX_WIND_MARK_TH -529 0x399A //TX_CORR_THR -530 0x0004 //TX_SNR_THR -531 0x0010 //TX_ENGY_THR -532 0x1770 //TX_CORR_HIGH_TH -533 0x6000 //TX_ENGY_THR_2 -534 0x3400 //TX_MEAN_RTO_THR -535 0x0028 //TX_WNS_ENOISE_MIC0_TH -536 0x3000 //TX_RATIOMICL_TH -537 0x64CD //TX_CALIG_HS -538 0x0000 //TX_LVL_CTRL -539 0x0014 //TX_WIND_SUPRTO -540 0x000A //TX_WNS_MIN_G -541 0x0000 //TX_WNS_B_POST_FLT -542 0x2800 //TX_RATIOMICH_TH -543 0xD120 //TX_WIND_INBEAM_L_TH -544 0x0FA0 //TX_WIND_INBEAM_H_TH -545 0x2000 //TX_WNS_RESRV_0 -546 0x59D8 //TX_WNS_RESRV_1 -547 0x0000 //TX_WNS_RESRV_2 -548 0x0000 //TX_WNS_RESRV_3 -549 0x0000 //TX_WNS_RESRV_4 -550 0x0000 //TX_WNS_RESRV_5 -551 0x0000 //TX_WNS_RESRV_6 -552 0x0000 //TX_PB_B_POST_FLT_LESSCUT -553 0x0070 //TX_BF_LESSCUT_BBIN -554 0x0070 //TX_BF_LESSCUT_EBIN -555 0x0010 //TX_POSTBFB0 -556 0x0070 //TX_POSTBFB -557 0x00B0 //TX_POSTBFE -558 0x0E66 //TX_SPEECH_SNR_TH -559 0x0050 //TX_PB_MAX_PRI_SNR_TH -560 0x770A //TX_MAX_PRI_SNR_TH_L -561 0x0000 //TX_PFGAIN -562 0x0000 //TX_MAINTOREFR_TH -563 0x0000 //TX_SAM_MARK -564 0x0000 //TX_PB_RESRV_0 -565 0x0000 //TX_PB_RESRV_1 -566 0x0020 //TX_FDEQ_SUBNUM -567 0x4848 //TX_FDEQ_GAIN_0 -568 0x4848 //TX_FDEQ_GAIN_1 -569 0x4848 //TX_FDEQ_GAIN_2 -570 0x4848 //TX_FDEQ_GAIN_3 -571 0x4848 //TX_FDEQ_GAIN_4 -572 0x4848 //TX_FDEQ_GAIN_5 -573 0x4848 //TX_FDEQ_GAIN_6 -574 0x4848 //TX_FDEQ_GAIN_7 -575 0x4848 //TX_FDEQ_GAIN_8 -576 0x4853 //TX_FDEQ_GAIN_9 -577 0x5450 //TX_FDEQ_GAIN_10 -578 0x7465 //TX_FDEQ_GAIN_11 -579 0x807F //TX_FDEQ_GAIN_12 -580 0x82C4 //TX_FDEQ_GAIN_13 -581 0xC4C4 //TX_FDEQ_GAIN_14 -582 0xC4C4 //TX_FDEQ_GAIN_15 -583 0x4848 //TX_FDEQ_GAIN_16 -584 0x4848 //TX_FDEQ_GAIN_17 -585 0x4848 //TX_FDEQ_GAIN_18 -586 0x4848 //TX_FDEQ_GAIN_19 -587 0x4848 //TX_FDEQ_GAIN_20 -588 0x4848 //TX_FDEQ_GAIN_21 -589 0x4848 //TX_FDEQ_GAIN_22 -590 0x4848 //TX_FDEQ_GAIN_23 -591 0x0202 //TX_FDEQ_BIN_0 -592 0x0203 //TX_FDEQ_BIN_1 -593 0x0304 //TX_FDEQ_BIN_2 -594 0x0405 //TX_FDEQ_BIN_3 -595 0x0607 //TX_FDEQ_BIN_4 -596 0x0809 //TX_FDEQ_BIN_5 -597 0x0A0B //TX_FDEQ_BIN_6 -598 0x0C0D //TX_FDEQ_BIN_7 -599 0x0E0F //TX_FDEQ_BIN_8 -600 0x1011 //TX_FDEQ_BIN_9 -601 0x1214 //TX_FDEQ_BIN_10 -602 0x1618 //TX_FDEQ_BIN_11 -603 0x1C1C //TX_FDEQ_BIN_12 -604 0x2020 //TX_FDEQ_BIN_13 -605 0x2020 //TX_FDEQ_BIN_14 -606 0x2011 //TX_FDEQ_BIN_15 -607 0x0000 //TX_FDEQ_BIN_16 -608 0x0000 //TX_FDEQ_BIN_17 -609 0x0000 //TX_FDEQ_BIN_18 -610 0x0000 //TX_FDEQ_BIN_19 -611 0x0000 //TX_FDEQ_BIN_20 -612 0x0000 //TX_FDEQ_BIN_21 -613 0x0000 //TX_FDEQ_BIN_22 -614 0x0000 //TX_FDEQ_BIN_23 -615 0x0000 //TX_FDEQ_PADDING -616 0x0020 //TX_PREEQ_SUBNUM_MIC0 -617 0x4848 //TX_PREEQ_GAIN_MIC0_0 -618 0x4848 //TX_PREEQ_GAIN_MIC0_1 -619 0x4848 //TX_PREEQ_GAIN_MIC0_2 -620 0x4848 //TX_PREEQ_GAIN_MIC0_3 -621 0x4848 //TX_PREEQ_GAIN_MIC0_4 -622 0x4848 //TX_PREEQ_GAIN_MIC0_5 -623 0x4A4C //TX_PREEQ_GAIN_MIC0_6 -624 0x4E50 //TX_PREEQ_GAIN_MIC0_7 -625 0x5456 //TX_PREEQ_GAIN_MIC0_8 -626 0x585C //TX_PREEQ_GAIN_MIC0_9 -627 0x5C64 //TX_PREEQ_GAIN_MIC0_10 -628 0x7478 //TX_PREEQ_GAIN_MIC0_11 -629 0x705C //TX_PREEQ_GAIN_MIC0_12 -630 0x4838 //TX_PREEQ_GAIN_MIC0_13 -631 0x3C70 //TX_PREEQ_GAIN_MIC0_14 -632 0x4848 //TX_PREEQ_GAIN_MIC0_15 -633 0x4848 //TX_PREEQ_GAIN_MIC0_16 -634 0x4848 //TX_PREEQ_GAIN_MIC0_17 -635 0x4848 //TX_PREEQ_GAIN_MIC0_18 -636 0x4848 //TX_PREEQ_GAIN_MIC0_19 -637 0x4848 //TX_PREEQ_GAIN_MIC0_20 -638 0x4848 //TX_PREEQ_GAIN_MIC0_21 -639 0x4848 //TX_PREEQ_GAIN_MIC0_22 -640 0x4848 //TX_PREEQ_GAIN_MIC0_23 -641 0x0202 //TX_PREEQ_BIN_MIC0_0 -642 0x0203 //TX_PREEQ_BIN_MIC0_1 -643 0x0303 //TX_PREEQ_BIN_MIC0_2 -644 0x0304 //TX_PREEQ_BIN_MIC0_3 -645 0x0405 //TX_PREEQ_BIN_MIC0_4 -646 0x0506 //TX_PREEQ_BIN_MIC0_5 -647 0x0708 //TX_PREEQ_BIN_MIC0_6 -648 0x0909 //TX_PREEQ_BIN_MIC0_7 -649 0x090B //TX_PREEQ_BIN_MIC0_8 -650 0x0C10 //TX_PREEQ_BIN_MIC0_9 -651 0x1013 //TX_PREEQ_BIN_MIC0_10 -652 0x1414 //TX_PREEQ_BIN_MIC0_11 -653 0x1414 //TX_PREEQ_BIN_MIC0_12 -654 0x1C1E //TX_PREEQ_BIN_MIC0_13 -655 0x1E28 //TX_PREEQ_BIN_MIC0_14 -656 0x462C //TX_PREEQ_BIN_MIC0_15 -657 0x0000 //TX_PREEQ_BIN_MIC0_16 -658 0x0000 //TX_PREEQ_BIN_MIC0_17 -659 0x0000 //TX_PREEQ_BIN_MIC0_18 -660 0x0000 //TX_PREEQ_BIN_MIC0_19 -661 0x0000 //TX_PREEQ_BIN_MIC0_20 -662 0x0000 //TX_PREEQ_BIN_MIC0_21 -663 0x0000 //TX_PREEQ_BIN_MIC0_22 -664 0x0000 //TX_PREEQ_BIN_MIC0_23 -665 0x0030 //TX_PREEQ_SUBNUM_MIC1 -666 0x4848 //TX_PREEQ_GAIN_MIC1_0 -667 0x4848 //TX_PREEQ_GAIN_MIC1_1 -668 0x4848 //TX_PREEQ_GAIN_MIC1_2 -669 0x4848 //TX_PREEQ_GAIN_MIC1_3 -670 0x4848 //TX_PREEQ_GAIN_MIC1_4 -671 0x4848 //TX_PREEQ_GAIN_MIC1_5 -672 0x4848 //TX_PREEQ_GAIN_MIC1_6 -673 0x4848 //TX_PREEQ_GAIN_MIC1_7 -674 0x4848 //TX_PREEQ_GAIN_MIC1_8 -675 0x4848 //TX_PREEQ_GAIN_MIC1_9 -676 0x4848 //TX_PREEQ_GAIN_MIC1_10 -677 0x4848 //TX_PREEQ_GAIN_MIC1_11 -678 0x4848 //TX_PREEQ_GAIN_MIC1_12 -679 0x4848 //TX_PREEQ_GAIN_MIC1_13 -680 0x4848 //TX_PREEQ_GAIN_MIC1_14 -681 0x4848 //TX_PREEQ_GAIN_MIC1_15 -682 0x4848 //TX_PREEQ_GAIN_MIC1_16 -683 0x4848 //TX_PREEQ_GAIN_MIC1_17 -684 0x4848 //TX_PREEQ_GAIN_MIC1_18 -685 0x4848 //TX_PREEQ_GAIN_MIC1_19 -686 0x4848 //TX_PREEQ_GAIN_MIC1_20 -687 0x4848 //TX_PREEQ_GAIN_MIC1_21 -688 0x4848 //TX_PREEQ_GAIN_MIC1_22 -689 0x4848 //TX_PREEQ_GAIN_MIC1_23 -690 0x1812 //TX_PREEQ_BIN_MIC1_0 -691 0x0A0A //TX_PREEQ_BIN_MIC1_1 -692 0x0808 //TX_PREEQ_BIN_MIC1_2 -693 0x080A //TX_PREEQ_BIN_MIC1_3 -694 0x0B09 //TX_PREEQ_BIN_MIC1_4 -695 0x0A06 //TX_PREEQ_BIN_MIC1_5 -696 0x0606 //TX_PREEQ_BIN_MIC1_6 -697 0x0605 //TX_PREEQ_BIN_MIC1_7 -698 0x050A //TX_PREEQ_BIN_MIC1_8 -699 0x1505 //TX_PREEQ_BIN_MIC1_9 -700 0x0506 //TX_PREEQ_BIN_MIC1_10 -701 0x0615 //TX_PREEQ_BIN_MIC1_11 -702 0x1516 //TX_PREEQ_BIN_MIC1_12 -703 0x2021 //TX_PREEQ_BIN_MIC1_13 -704 0x2021 //TX_PREEQ_BIN_MIC1_14 -705 0x2021 //TX_PREEQ_BIN_MIC1_15 -706 0x0800 //TX_PREEQ_BIN_MIC1_16 -707 0x0000 //TX_PREEQ_BIN_MIC1_17 -708 0x0000 //TX_PREEQ_BIN_MIC1_18 -709 0x0000 //TX_PREEQ_BIN_MIC1_19 -710 0x0000 //TX_PREEQ_BIN_MIC1_20 -711 0x0000 //TX_PREEQ_BIN_MIC1_21 -712 0x0000 //TX_PREEQ_BIN_MIC1_22 -713 0x0000 //TX_PREEQ_BIN_MIC1_23 -714 0x0020 //TX_PREEQ_SUBNUM_MIC2 -715 0x4848 //TX_PREEQ_GAIN_MIC2_0 -716 0x4848 //TX_PREEQ_GAIN_MIC2_1 -717 0x4848 //TX_PREEQ_GAIN_MIC2_2 -718 0x4848 //TX_PREEQ_GAIN_MIC2_3 -719 0x4848 //TX_PREEQ_GAIN_MIC2_4 -720 0x4848 //TX_PREEQ_GAIN_MIC2_5 -721 0x4848 //TX_PREEQ_GAIN_MIC2_6 -722 0x4848 //TX_PREEQ_GAIN_MIC2_7 -723 0x4848 //TX_PREEQ_GAIN_MIC2_8 -724 0x4848 //TX_PREEQ_GAIN_MIC2_9 -725 0x4848 //TX_PREEQ_GAIN_MIC2_10 -726 0x4848 //TX_PREEQ_GAIN_MIC2_11 -727 0x4848 //TX_PREEQ_GAIN_MIC2_12 -728 0x4848 //TX_PREEQ_GAIN_MIC2_13 -729 0x4848 //TX_PREEQ_GAIN_MIC2_14 -730 0x4848 //TX_PREEQ_GAIN_MIC2_15 -731 0x4848 //TX_PREEQ_GAIN_MIC2_16 -732 0x4848 //TX_PREEQ_GAIN_MIC2_17 -733 0x4848 //TX_PREEQ_GAIN_MIC2_18 -734 0x4848 //TX_PREEQ_GAIN_MIC2_19 -735 0x4848 //TX_PREEQ_GAIN_MIC2_20 -736 0x4848 //TX_PREEQ_GAIN_MIC2_21 -737 0x4848 //TX_PREEQ_GAIN_MIC2_22 -738 0x4848 //TX_PREEQ_GAIN_MIC2_23 -739 0x0E10 //TX_PREEQ_BIN_MIC2_0 -740 0x1010 //TX_PREEQ_BIN_MIC2_1 -741 0x1010 //TX_PREEQ_BIN_MIC2_2 -742 0x1010 //TX_PREEQ_BIN_MIC2_3 -743 0x1010 //TX_PREEQ_BIN_MIC2_4 -744 0x1010 //TX_PREEQ_BIN_MIC2_5 -745 0x1010 //TX_PREEQ_BIN_MIC2_6 -746 0x1010 //TX_PREEQ_BIN_MIC2_7 -747 0x1010 //TX_PREEQ_BIN_MIC2_8 -748 0x1010 //TX_PREEQ_BIN_MIC2_9 -749 0x1010 //TX_PREEQ_BIN_MIC2_10 -750 0x1010 //TX_PREEQ_BIN_MIC2_11 -751 0x1010 //TX_PREEQ_BIN_MIC2_12 -752 0x1010 //TX_PREEQ_BIN_MIC2_13 -753 0x1010 //TX_PREEQ_BIN_MIC2_14 -754 0x0200 //TX_PREEQ_BIN_MIC2_15 -755 0x0000 //TX_PREEQ_BIN_MIC2_16 -756 0x0000 //TX_PREEQ_BIN_MIC2_17 -757 0x0000 //TX_PREEQ_BIN_MIC2_18 -758 0x0000 //TX_PREEQ_BIN_MIC2_19 -759 0x0000 //TX_PREEQ_BIN_MIC2_20 -760 0x0000 //TX_PREEQ_BIN_MIC2_21 -761 0x0000 //TX_PREEQ_BIN_MIC2_22 -762 0x0000 //TX_PREEQ_BIN_MIC2_23 -763 0x0006 //TX_MASKING_ABILITY -764 0x2000 //TX_NND_WEIGHT -765 0x0060 //TX_MIC_CALIBRATION_0 -766 0x0060 //TX_MIC_CALIBRATION_1 -767 0x0070 //TX_MIC_CALIBRATION_2 -768 0x0070 //TX_MIC_CALIBRATION_3 -769 0x0050 //TX_MIC_PWR_BIAS_0 -770 0x0040 //TX_MIC_PWR_BIAS_1 -771 0x0040 //TX_MIC_PWR_BIAS_2 -772 0x0040 //TX_MIC_PWR_BIAS_3 -773 0x0009 //TX_GAIN_LIMIT_0 -774 0x000F //TX_GAIN_LIMIT_1 -775 0x000F //TX_GAIN_LIMIT_2 -776 0x000F //TX_GAIN_LIMIT_3 -777 0x7F5B //TX_BVE_NOVAD0_ALPHADOWN -778 0x7FDE //TX_BVE_VAD0_ALPHAUP -779 0x7F3A //TX_BVE_VAD0_ALPHADOWN -780 0x2000 //TX_BVE_GAINWEIGHT_NOFEVADLI -781 0x7F5B //TX_BVE_FEVADLI_ALPHA -782 0x7F19 //TX_BVE_NOVAD0_ALPHAUP -783 0x0C00 //TX_TDDRC_ALPHA_UP_01 -784 0x0C00 //TX_TDDRC_ALPHA_UP_02 -785 0x0C00 //TX_TDDRC_ALPHA_UP_03 -786 0x0C00 //TX_TDDRC_ALPHA_UP_04 -787 0x7EB8 //TX_TDDRC_ALPHA_DWN_01 -788 0x7EB8 //TX_TDDRC_ALPHA_DWN_02 -789 0x7EB8 //TX_TDDRC_ALPHA_DWN_03 -790 0x7EB8 //TX_TDDRC_ALPHA_DWN_04 -791 0x7FFF //TX_TDDRC_TD_DRC_LIMIT -792 0x0800 //TX_TDDRC_POST_LIMIT_GAIN -793 0x0000 //TX_TDDRC_RESRV_0 -794 0x0000 //TX_TDDRC_RESRV_1 -795 0x0018 //TX_FDDRC_BAND_MARGIN_0 -796 0x0030 //TX_FDDRC_BAND_MARGIN_1 -797 0x0050 //TX_FDDRC_BAND_MARGIN_2 -798 0x0080 //TX_FDDRC_BAND_MARGIN_3 -799 0x0007 //TX_FDDRC_BLOCK_EXP -800 0x5000 //TX_FDDRC_THRD_2_0 -801 0x5000 //TX_FDDRC_THRD_2_1 -802 0x5000 //TX_FDDRC_THRD_2_2 -803 0x5000 //TX_FDDRC_THRD_2_3 -804 0x6400 //TX_FDDRC_THRD_3_0 -805 0x6400 //TX_FDDRC_THRD_3_1 -806 0x6400 //TX_FDDRC_THRD_3_2 -807 0x6400 //TX_FDDRC_THRD_3_3 -808 0x2000 //TX_FDDRC_SLANT_0_0 -809 0x2000 //TX_FDDRC_SLANT_0_1 -810 0x2000 //TX_FDDRC_SLANT_0_2 -811 0x2000 //TX_FDDRC_SLANT_0_3 -812 0x5333 //TX_FDDRC_SLANT_1_0 -813 0x5333 //TX_FDDRC_SLANT_1_1 -814 0x5333 //TX_FDDRC_SLANT_1_2 -815 0x5333 //TX_FDDRC_SLANT_1_3 -816 0x0010 //TX_DEADMIC_SILENCE_TH -817 0x0600 //TX_MIC_DEGRADE_TH -818 0x0078 //TX_DEADMIC_CNT -819 0x0078 //TX_MIC_DEGRADE_CNT -820 0x0000 //TX_FDDRC_RESRV_4 -821 0x0000 //TX_FDDRC_RESRV_5 -822 0x0000 //TX_FDDRC_RESRV_6 -823 0x7FFF //TX_KS_NOISEPASTE_FACTOR -824 0x0001 //TX_KS_CONFIG -825 0x7FFF //TX_KS_GAIN_MIN -826 0x0000 //TX_KS_RESRV_0 -827 0x0000 //TX_KS_RESRV_1 -828 0x0000 //TX_KS_RESRV_2 -829 0x7C00 //TX_LAMBDA_PKA_FP -830 0x2000 //TX_TPKA_FP -831 0x0080 //TX_MIN_G_FP -832 0x2000 //TX_MAX_G_FP -833 0x4848 //TX_FFP_FP_K_METAL -834 0x4000 //TX_A_POST_FLT_FP -835 0x0F5C //TX_RTO_OUTBEAM_TH -836 0x4CCD //TX_TPKA_FP_THD -837 0x0000 //TX_MAX_G_FP_BLK -838 0x0000 //TX_FFP_FADEIN -839 0x0000 //TX_FFP_FADEOUT -840 0x0000 //TX_WHISPERCTH -841 0x0000 //TX_WHISPERHOLDT -842 0x0000 //TX_WHISP_ENTHH -843 0x0000 //TX_WHISP_ENTHL -844 0x0000 //TX_WHISP_RTOTH -845 0x0000 //TX_WHISP_RTOTH2 -846 0x0096 //TX_MUTE_PERIOD -847 0x0000 //TX_FADE_IN_PERIOD -848 0x0100 //TX_FFP_RESRV_2 -849 0x0020 //TX_FFP_RESRV_3 -850 0x0000 //TX_FFP_RESRV_4 -851 0x0000 //TX_FFP_RESRV_5 -852 0x0000 //TX_FFP_RESRV_6 -853 0x0004 //TX_FILTINDX -854 0x0004 //TX_TDDRC_THRD_0 -855 0x0016 //TX_TDDRC_THRD_1 -856 0x1900 //TX_TDDRC_THRD_2 -857 0x1900 //TX_TDDRC_THRD_3 -858 0x3000 //TX_TDDRC_SLANT_0 -859 0x7B00 //TX_TDDRC_SLANT_1 -860 0x0C00 //TX_TDDRC_ALPHA_UP_00 -861 0x7EB8 //TX_TDDRC_ALPHA_DWN_00 -862 0x0000 //TX_TDDRC_HMNC_FLAG -863 0x199A //TX_TDDRC_HMNC_GAIN -864 0x0000 //TX_TDDRC_SMT_FLAG -865 0x0CCD //TX_TDDRC_SMT_W -866 0x0A98 //TX_TDDRC_DRC_GAIN -867 0x7FFF //TX_TDDRC_LMT_THRD -868 0x0000 //TX_TDDRC_LMT_ALPHA -869 0x0000 //TX_TFMASKLTH -870 0x0000 //TX_TFMASKLTHL -871 0x0CCD //TX_TFMASKHTH -872 0x0CCD //TX_TFMASKLTH_BINVAD -873 0xF333 //TX_TFMASKLTH_NS_EST -874 0x2CCD //TX_TFMASKLTH_DOA -875 0xECCD //TX_TFMASKTH_BLESSCUT -876 0x1000 //TX_B_LESSCUT_RTO_MASK -877 0x3800 //TX_SB_RHO_MEAN_TH_ABN -878 0x2000 //TX_B_POST_FLT_MASK -879 0x0000 //TX_B_POST_FLT_MASK1 -880 0x5333 //TX_GAIN_WIND_MASK -881 0x7FFF //TX_TFMASK_BFSTRICT_MUSIC -882 0x0000 //TX_TFMASK_BFSTRICT_NOMUSIC -883 0x7333 //TX_FASTNS_OUTIN_TH -884 0x0CCD //TX_FASTNS_TFMASK_TH -885 0x0CCD //TX_FASTNS_TFMASKBIN_TH1 -886 0x0CCD //TX_FASTNS_TFMASKBIN_TH2 -887 0x0CCD //TX_FASTNS_TFMASKBIN_TH3 -888 0x0028 //TX_FASTNS_ARSPC_TH -889 0xC000 //TX_FASTNS_MASK5_TH -890 0x4848 //TX_POSTSSA_MIN_G_VR_MASK -891 0x1000 //TX_A_LESSCUT_RTO_MASK -892 0x1770 //TX_FASTNS_NOISETH -893 0xC000 //TX_FASTNS_SSA_THLFL -894 0xC000 //TX_FASTNS_SSA_THHFL -895 0xCCCC //TX_FASTNS_SSA_THLFH -896 0xD999 //TX_FASTNS_SSA_THHFH -#RX -0 0x006C //RX_RECVFUNC_MODE_0 -1 0x0000 //RX_RECVFUNC_MODE_1 -2 0x0004 //RX_SAMPLINGFREQ_SIG -3 0x0004 //RX_SAMPLINGFREQ_PROC -4 0x000A //RX_FRAME_SZ -5 0x0000 //RX_DELAY_OPT -6 0x4000 //RX_TDDRC_ALPHA_UP_1 -7 0x4000 //RX_TDDRC_ALPHA_UP_2 -8 0x4000 //RX_TDDRC_ALPHA_UP_3 -9 0x4000 //RX_TDDRC_ALPHA_UP_4 -10 0x0800 //RX_PGA -11 0x7E56 //RX_A_HP -12 0x4000 //RX_B_PE -13 0x7800 //RX_THR_PITCH_DET_0 -14 0x7000 //RX_THR_PITCH_DET_1 -15 0x6000 //RX_THR_PITCH_DET_2 -16 0x0008 //RX_PITCH_BFR_LEN -17 0x0003 //RX_SBD_PITCH_DET -18 0x0100 //RX_PP_RESRV_0 -19 0x0020 //RX_PP_RESRV_1 -20 0x0400 //RX_N_SN_EST -21 0x000C //RX_N2_SN_EST -22 0x0014 //RX_NS_LVL_CTRL -23 0xF400 //RX_THR_SN_EST -24 0x7E00 //RX_LAMBDA_PFILT -25 0x00C8 //RX_FENS_RESRV_0 -26 0x0190 //RX_FENS_RESRV_1 -27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 -28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 -29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 -30 0x0002 //RX_EXTRA_NS_L -31 0x0800 //RX_EXTRA_NS_A -32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 -33 0x7FFF //RX_TDDRC_LIMITER_THRD -34 0x0800 //RX_TDDRC_LIMITER_GAIN -35 0x199A //RX_A_POST_FLT -36 0x0000 //RX_LMT_THRD -37 0x4000 //RX_LMT_ALPHA -38 0x0020 //RX_FDEQ_SUBNUM -39 0x4848 //RX_FDEQ_GAIN_0 -40 0x4848 //RX_FDEQ_GAIN_1 -41 0x4848 //RX_FDEQ_GAIN_2 -42 0x4850 //RX_FDEQ_GAIN_3 -43 0x4848 //RX_FDEQ_GAIN_4 -44 0x4848 //RX_FDEQ_GAIN_5 -45 0x4568 //RX_FDEQ_GAIN_6 -46 0x485C //RX_FDEQ_GAIN_7 -47 0x5C60 //RX_FDEQ_GAIN_8 -48 0x685C //RX_FDEQ_GAIN_9 -49 0x5648 //RX_FDEQ_GAIN_10 -50 0x484C //RX_FDEQ_GAIN_11 -51 0x706C //RX_FDEQ_GAIN_12 -52 0x7070 //RX_FDEQ_GAIN_13 -53 0x6868 //RX_FDEQ_GAIN_14 -54 0x6060 //RX_FDEQ_GAIN_15 -55 0x4848 //RX_FDEQ_GAIN_16 -56 0x4848 //RX_FDEQ_GAIN_17 -57 0x4848 //RX_FDEQ_GAIN_18 -58 0x4848 //RX_FDEQ_GAIN_19 -59 0x4848 //RX_FDEQ_GAIN_20 -60 0x4848 //RX_FDEQ_GAIN_21 -61 0x4848 //RX_FDEQ_GAIN_22 -62 0x4848 //RX_FDEQ_GAIN_23 -63 0x0202 //RX_FDEQ_BIN_0 -64 0x0203 //RX_FDEQ_BIN_1 -65 0x0303 //RX_FDEQ_BIN_2 -66 0x0402 //RX_FDEQ_BIN_3 -67 0x0504 //RX_FDEQ_BIN_4 -68 0x0209 //RX_FDEQ_BIN_5 -69 0x0808 //RX_FDEQ_BIN_6 -70 0x090A //RX_FDEQ_BIN_7 -71 0x0B0C //RX_FDEQ_BIN_8 -72 0x0D0E //RX_FDEQ_BIN_9 -73 0x1013 //RX_FDEQ_BIN_10 -74 0x1719 //RX_FDEQ_BIN_11 -75 0x1B1E //RX_FDEQ_BIN_12 -76 0x1E1E //RX_FDEQ_BIN_13 -77 0x1E28 //RX_FDEQ_BIN_14 -78 0x282C //RX_FDEQ_BIN_15 -79 0x0000 //RX_FDEQ_BIN_16 -80 0x0000 //RX_FDEQ_BIN_17 -81 0x0000 //RX_FDEQ_BIN_18 -82 0x0000 //RX_FDEQ_BIN_19 -83 0x0000 //RX_FDEQ_BIN_20 -84 0x0000 //RX_FDEQ_BIN_21 -85 0x0000 //RX_FDEQ_BIN_22 -86 0x0000 //RX_FDEQ_BIN_23 -87 0x4000 //RX_FDEQ_RESRV_0 -88 0x0320 //RX_FDEQ_RESRV_1 -89 0x0018 //RX_FDDRC_BAND_MARGIN_0 -90 0x0030 //RX_FDDRC_BAND_MARGIN_1 -91 0x0050 //RX_FDDRC_BAND_MARGIN_2 -92 0x0080 //RX_FDDRC_BAND_MARGIN_3 -93 0x0004 //RX_FDDRC_BLOCK_EXP -94 0x5000 //RX_FDDRC_THRD_2_0 -95 0x5000 //RX_FDDRC_THRD_2_1 -96 0x2000 //RX_FDDRC_THRD_2_2 -97 0x5000 //RX_FDDRC_THRD_2_3 -98 0x6400 //RX_FDDRC_THRD_3_0 -99 0x6400 //RX_FDDRC_THRD_3_1 -100 0x2000 //RX_FDDRC_THRD_3_2 -101 0x5000 //RX_FDDRC_THRD_3_3 -102 0x4000 //RX_FDDRC_SLANT_0_0 -103 0x4000 //RX_FDDRC_SLANT_0_1 -104 0x4000 //RX_FDDRC_SLANT_0_2 -105 0x4000 //RX_FDDRC_SLANT_0_3 -106 0x7FFF //RX_FDDRC_SLANT_1_0 -107 0x7FFF //RX_FDDRC_SLANT_1_1 -108 0x7FFF //RX_FDDRC_SLANT_1_2 -109 0x7FFF //RX_FDDRC_SLANT_1_3 -110 0x0000 //RX_FDDRC_RESRV_0 -111 0x0002 //RX_FILTINDX -112 0x0001 //RX_TDDRC_THRD_0 -113 0x0002 //RX_TDDRC_THRD_1 -114 0x1800 //RX_TDDRC_THRD_2 -115 0x1800 //RX_TDDRC_THRD_3 -116 0x6000 //RX_TDDRC_SLANT_0 -117 0x6E00 //RX_TDDRC_SLANT_1 -118 0x4000 //RX_TDDRC_ALPHA_UP_0 -119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 -120 0x0000 //RX_TDDRC_HMNC_FLAG -121 0x199A //RX_TDDRC_HMNC_GAIN -122 0x0001 //RX_TDDRC_SMT_FLAG -123 0x0CCD //RX_TDDRC_SMT_W -124 0x02D2 //RX_TDDRC_DRC_GAIN -125 0x7C00 //RX_LAMBDA_PKA_FP -126 0x2000 //RX_TPKA_FP -127 0x2000 //RX_MIN_G_FP -128 0x0080 //RX_MAX_G_FP -129 0x0013 //RX_SPK_VOL -130 0x0000 //RX_VOL_RESRV_0 -131 0x0000 //RX_MAXLEVEL_CNG -132 0x3000 //RX_BWE_UV_TH -133 0x3000 //RX_BWE_UV_TH2 -134 0x1800 //RX_BWE_UV_TH3 -135 0x1000 //RX_BWE_V_TH -136 0x04CD //RX_BWE_GAIN1_V_TH1 -137 0x0F33 //RX_BWE_GAIN1_V_TH2 -138 0x7333 //RX_BWE_UV_EQ -139 0x199A //RX_BWE_V_EQ -140 0x7333 //RX_BWE_TONE_TH -141 0x0004 //RX_BWE_UV_HOLD_T -142 0x6CCD //RX_BWE_GAIN2_ALPHA -143 0x799A //RX_BWE_GAIN3_ALPHA -144 0x001E //RX_BWE_CUTOFF -145 0x3000 //RX_BWE_GAINFILL -146 0x3200 //RX_BWE_MAXTH_TONE -147 0x2000 //RX_BWE_EQ_0 -148 0x2000 //RX_BWE_EQ_1 -149 0x2000 //RX_BWE_EQ_2 -150 0x2000 //RX_BWE_EQ_3 -151 0x2000 //RX_BWE_EQ_4 -152 0x2000 //RX_BWE_EQ_5 -153 0x2000 //RX_BWE_EQ_6 -154 0x0000 //RX_BWE_RESRV_0 -155 0x0000 //RX_BWE_RESRV_1 -156 0x0000 //RX_BWE_RESRV_2 -#VOL 0 -6 0x4000 //RX_TDDRC_ALPHA_UP_1 -7 0x4000 //RX_TDDRC_ALPHA_UP_2 -8 0x4000 //RX_TDDRC_ALPHA_UP_3 -9 0x4000 //RX_TDDRC_ALPHA_UP_4 -27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 -28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 -29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 -32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 -33 0x7FFF //RX_TDDRC_LIMITER_THRD -34 0x0800 //RX_TDDRC_LIMITER_GAIN -112 0x0001 //RX_TDDRC_THRD_0 -113 0x0002 //RX_TDDRC_THRD_1 -114 0x1800 //RX_TDDRC_THRD_2 -115 0x1800 //RX_TDDRC_THRD_3 -116 0x6000 //RX_TDDRC_SLANT_0 -117 0x6E00 //RX_TDDRC_SLANT_1 -118 0x4000 //RX_TDDRC_ALPHA_UP_0 -119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 -120 0x0000 //RX_TDDRC_HMNC_FLAG -121 0x199A //RX_TDDRC_HMNC_GAIN -122 0x0001 //RX_TDDRC_SMT_FLAG -123 0x0CCD //RX_TDDRC_SMT_W -124 0x02D2 //RX_TDDRC_DRC_GAIN -38 0x0020 //RX_FDEQ_SUBNUM -39 0x4848 //RX_FDEQ_GAIN_0 -40 0x4848 //RX_FDEQ_GAIN_1 -41 0x4848 //RX_FDEQ_GAIN_2 -42 0x4850 //RX_FDEQ_GAIN_3 -43 0x4848 //RX_FDEQ_GAIN_4 -44 0x4848 //RX_FDEQ_GAIN_5 -45 0x4568 //RX_FDEQ_GAIN_6 -46 0x485C //RX_FDEQ_GAIN_7 -47 0x5C60 //RX_FDEQ_GAIN_8 -48 0x685C //RX_FDEQ_GAIN_9 -49 0x5648 //RX_FDEQ_GAIN_10 -50 0x484C //RX_FDEQ_GAIN_11 -51 0x706C //RX_FDEQ_GAIN_12 -52 0x7070 //RX_FDEQ_GAIN_13 -53 0x6868 //RX_FDEQ_GAIN_14 -54 0x6060 //RX_FDEQ_GAIN_15 -55 0x4848 //RX_FDEQ_GAIN_16 -56 0x4848 //RX_FDEQ_GAIN_17 -57 0x4848 //RX_FDEQ_GAIN_18 -58 0x4848 //RX_FDEQ_GAIN_19 -59 0x4848 //RX_FDEQ_GAIN_20 -60 0x4848 //RX_FDEQ_GAIN_21 -61 0x4848 //RX_FDEQ_GAIN_22 -62 0x4848 //RX_FDEQ_GAIN_23 -63 0x0202 //RX_FDEQ_BIN_0 -64 0x0203 //RX_FDEQ_BIN_1 -65 0x0303 //RX_FDEQ_BIN_2 -66 0x0402 //RX_FDEQ_BIN_3 -67 0x0504 //RX_FDEQ_BIN_4 -68 0x0209 //RX_FDEQ_BIN_5 -69 0x0808 //RX_FDEQ_BIN_6 -70 0x090A //RX_FDEQ_BIN_7 -71 0x0B0C //RX_FDEQ_BIN_8 -72 0x0D0E //RX_FDEQ_BIN_9 -73 0x1013 //RX_FDEQ_BIN_10 -74 0x1719 //RX_FDEQ_BIN_11 -75 0x1B1E //RX_FDEQ_BIN_12 -76 0x1E1E //RX_FDEQ_BIN_13 -77 0x1E28 //RX_FDEQ_BIN_14 -78 0x282C //RX_FDEQ_BIN_15 -79 0x0000 //RX_FDEQ_BIN_16 -80 0x0000 //RX_FDEQ_BIN_17 -81 0x0000 //RX_FDEQ_BIN_18 -82 0x0000 //RX_FDEQ_BIN_19 -83 0x0000 //RX_FDEQ_BIN_20 -84 0x0000 //RX_FDEQ_BIN_21 -85 0x0000 //RX_FDEQ_BIN_22 -86 0x0000 //RX_FDEQ_BIN_23 -87 0x4000 //RX_FDEQ_RESRV_0 -88 0x0320 //RX_FDEQ_RESRV_1 -89 0x0018 //RX_FDDRC_BAND_MARGIN_0 -90 0x0030 //RX_FDDRC_BAND_MARGIN_1 -91 0x0050 //RX_FDDRC_BAND_MARGIN_2 -92 0x0080 //RX_FDDRC_BAND_MARGIN_3 -93 0x0004 //RX_FDDRC_BLOCK_EXP -94 0x5000 //RX_FDDRC_THRD_2_0 -95 0x5000 //RX_FDDRC_THRD_2_1 -96 0x2000 //RX_FDDRC_THRD_2_2 -97 0x5000 //RX_FDDRC_THRD_2_3 -98 0x6400 //RX_FDDRC_THRD_3_0 -99 0x6400 //RX_FDDRC_THRD_3_1 -100 0x2000 //RX_FDDRC_THRD_3_2 -101 0x5000 //RX_FDDRC_THRD_3_3 -102 0x4000 //RX_FDDRC_SLANT_0_0 -103 0x4000 //RX_FDDRC_SLANT_0_1 -104 0x4000 //RX_FDDRC_SLANT_0_2 -105 0x4000 //RX_FDDRC_SLANT_0_3 -106 0x7FFF //RX_FDDRC_SLANT_1_0 -107 0x7FFF //RX_FDDRC_SLANT_1_1 -108 0x7FFF //RX_FDDRC_SLANT_1_2 -109 0x7FFF //RX_FDDRC_SLANT_1_3 -110 0x0000 //RX_FDDRC_RESRV_0 -129 0x0013 //RX_SPK_VOL -130 0x0000 //RX_VOL_RESRV_0 -#VOL 1 -6 0x4000 //RX_TDDRC_ALPHA_UP_1 -7 0x4000 //RX_TDDRC_ALPHA_UP_2 -8 0x4000 //RX_TDDRC_ALPHA_UP_3 -9 0x4000 //RX_TDDRC_ALPHA_UP_4 -27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 -28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 -29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 -32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 -33 0x7FFF //RX_TDDRC_LIMITER_THRD -34 0x0800 //RX_TDDRC_LIMITER_GAIN -112 0x0001 //RX_TDDRC_THRD_0 -113 0x0002 //RX_TDDRC_THRD_1 -114 0x1800 //RX_TDDRC_THRD_2 -115 0x1800 //RX_TDDRC_THRD_3 -116 0x6000 //RX_TDDRC_SLANT_0 -117 0x6E00 //RX_TDDRC_SLANT_1 -118 0x4000 //RX_TDDRC_ALPHA_UP_0 -119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 -120 0x0000 //RX_TDDRC_HMNC_FLAG -121 0x199A //RX_TDDRC_HMNC_GAIN -122 0x0001 //RX_TDDRC_SMT_FLAG -123 0x0CCD //RX_TDDRC_SMT_W -124 0x02D2 //RX_TDDRC_DRC_GAIN -38 0x0020 //RX_FDEQ_SUBNUM -39 0x4848 //RX_FDEQ_GAIN_0 -40 0x4848 //RX_FDEQ_GAIN_1 -41 0x4848 //RX_FDEQ_GAIN_2 -42 0x4850 //RX_FDEQ_GAIN_3 -43 0x4848 //RX_FDEQ_GAIN_4 -44 0x4848 //RX_FDEQ_GAIN_5 -45 0x4568 //RX_FDEQ_GAIN_6 -46 0x485C //RX_FDEQ_GAIN_7 -47 0x5C60 //RX_FDEQ_GAIN_8 -48 0x685C //RX_FDEQ_GAIN_9 -49 0x5648 //RX_FDEQ_GAIN_10 -50 0x484C //RX_FDEQ_GAIN_11 -51 0x706C //RX_FDEQ_GAIN_12 -52 0x7070 //RX_FDEQ_GAIN_13 -53 0x6868 //RX_FDEQ_GAIN_14 -54 0x6060 //RX_FDEQ_GAIN_15 -55 0x4848 //RX_FDEQ_GAIN_16 -56 0x4848 //RX_FDEQ_GAIN_17 -57 0x4848 //RX_FDEQ_GAIN_18 -58 0x4848 //RX_FDEQ_GAIN_19 -59 0x4848 //RX_FDEQ_GAIN_20 -60 0x4848 //RX_FDEQ_GAIN_21 -61 0x4848 //RX_FDEQ_GAIN_22 -62 0x4848 //RX_FDEQ_GAIN_23 -63 0x0202 //RX_FDEQ_BIN_0 -64 0x0203 //RX_FDEQ_BIN_1 -65 0x0303 //RX_FDEQ_BIN_2 -66 0x0402 //RX_FDEQ_BIN_3 -67 0x0504 //RX_FDEQ_BIN_4 -68 0x0209 //RX_FDEQ_BIN_5 -69 0x0808 //RX_FDEQ_BIN_6 -70 0x090A //RX_FDEQ_BIN_7 -71 0x0B0C //RX_FDEQ_BIN_8 -72 0x0D0E //RX_FDEQ_BIN_9 -73 0x1013 //RX_FDEQ_BIN_10 -74 0x1719 //RX_FDEQ_BIN_11 -75 0x1B1E //RX_FDEQ_BIN_12 -76 0x1E1E //RX_FDEQ_BIN_13 -77 0x1E28 //RX_FDEQ_BIN_14 -78 0x282C //RX_FDEQ_BIN_15 -79 0x0000 //RX_FDEQ_BIN_16 -80 0x0000 //RX_FDEQ_BIN_17 -81 0x0000 //RX_FDEQ_BIN_18 -82 0x0000 //RX_FDEQ_BIN_19 -83 0x0000 //RX_FDEQ_BIN_20 -84 0x0000 //RX_FDEQ_BIN_21 -85 0x0000 //RX_FDEQ_BIN_22 -86 0x0000 //RX_FDEQ_BIN_23 -87 0x4000 //RX_FDEQ_RESRV_0 -88 0x0320 //RX_FDEQ_RESRV_1 -89 0x0018 //RX_FDDRC_BAND_MARGIN_0 -90 0x0030 //RX_FDDRC_BAND_MARGIN_1 -91 0x0050 //RX_FDDRC_BAND_MARGIN_2 -92 0x0080 //RX_FDDRC_BAND_MARGIN_3 -93 0x0004 //RX_FDDRC_BLOCK_EXP -94 0x5000 //RX_FDDRC_THRD_2_0 -95 0x5000 //RX_FDDRC_THRD_2_1 -96 0x2000 //RX_FDDRC_THRD_2_2 -97 0x5000 //RX_FDDRC_THRD_2_3 -98 0x6400 //RX_FDDRC_THRD_3_0 -99 0x6400 //RX_FDDRC_THRD_3_1 -100 0x2000 //RX_FDDRC_THRD_3_2 -101 0x5000 //RX_FDDRC_THRD_3_3 -102 0x4000 //RX_FDDRC_SLANT_0_0 -103 0x4000 //RX_FDDRC_SLANT_0_1 -104 0x4000 //RX_FDDRC_SLANT_0_2 -105 0x4000 //RX_FDDRC_SLANT_0_3 -106 0x7FFF //RX_FDDRC_SLANT_1_0 -107 0x7FFF //RX_FDDRC_SLANT_1_1 -108 0x7FFF //RX_FDDRC_SLANT_1_2 -109 0x7FFF //RX_FDDRC_SLANT_1_3 -110 0x0000 //RX_FDDRC_RESRV_0 -129 0x001C //RX_SPK_VOL -130 0x0000 //RX_VOL_RESRV_0 -#VOL 2 -6 0x4000 //RX_TDDRC_ALPHA_UP_1 -7 0x4000 //RX_TDDRC_ALPHA_UP_2 -8 0x4000 //RX_TDDRC_ALPHA_UP_3 -9 0x4000 //RX_TDDRC_ALPHA_UP_4 -27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 -28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 -29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 -32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 -33 0x7FFF //RX_TDDRC_LIMITER_THRD -34 0x0800 //RX_TDDRC_LIMITER_GAIN -112 0x0001 //RX_TDDRC_THRD_0 -113 0x0002 //RX_TDDRC_THRD_1 -114 0x1800 //RX_TDDRC_THRD_2 -115 0x1800 //RX_TDDRC_THRD_3 -116 0x6000 //RX_TDDRC_SLANT_0 -117 0x6E00 //RX_TDDRC_SLANT_1 -118 0x4000 //RX_TDDRC_ALPHA_UP_0 -119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 -120 0x0000 //RX_TDDRC_HMNC_FLAG -121 0x199A //RX_TDDRC_HMNC_GAIN -122 0x0001 //RX_TDDRC_SMT_FLAG -123 0x0CCD //RX_TDDRC_SMT_W -124 0x02D2 //RX_TDDRC_DRC_GAIN -38 0x0020 //RX_FDEQ_SUBNUM -39 0x4848 //RX_FDEQ_GAIN_0 -40 0x4848 //RX_FDEQ_GAIN_1 -41 0x4848 //RX_FDEQ_GAIN_2 -42 0x4850 //RX_FDEQ_GAIN_3 -43 0x4848 //RX_FDEQ_GAIN_4 -44 0x4848 //RX_FDEQ_GAIN_5 -45 0x4568 //RX_FDEQ_GAIN_6 -46 0x485C //RX_FDEQ_GAIN_7 -47 0x5C60 //RX_FDEQ_GAIN_8 -48 0x685C //RX_FDEQ_GAIN_9 -49 0x5648 //RX_FDEQ_GAIN_10 -50 0x484C //RX_FDEQ_GAIN_11 -51 0x706C //RX_FDEQ_GAIN_12 -52 0x7070 //RX_FDEQ_GAIN_13 -53 0x6868 //RX_FDEQ_GAIN_14 -54 0x6060 //RX_FDEQ_GAIN_15 -55 0x4848 //RX_FDEQ_GAIN_16 -56 0x4848 //RX_FDEQ_GAIN_17 -57 0x4848 //RX_FDEQ_GAIN_18 -58 0x4848 //RX_FDEQ_GAIN_19 -59 0x4848 //RX_FDEQ_GAIN_20 -60 0x4848 //RX_FDEQ_GAIN_21 -61 0x4848 //RX_FDEQ_GAIN_22 -62 0x4848 //RX_FDEQ_GAIN_23 -63 0x0202 //RX_FDEQ_BIN_0 -64 0x0203 //RX_FDEQ_BIN_1 -65 0x0303 //RX_FDEQ_BIN_2 -66 0x0402 //RX_FDEQ_BIN_3 -67 0x0504 //RX_FDEQ_BIN_4 -68 0x0209 //RX_FDEQ_BIN_5 -69 0x0808 //RX_FDEQ_BIN_6 -70 0x090A //RX_FDEQ_BIN_7 -71 0x0B0C //RX_FDEQ_BIN_8 -72 0x0D0E //RX_FDEQ_BIN_9 -73 0x1013 //RX_FDEQ_BIN_10 -74 0x1719 //RX_FDEQ_BIN_11 -75 0x1B1E //RX_FDEQ_BIN_12 -76 0x1E1E //RX_FDEQ_BIN_13 -77 0x1E28 //RX_FDEQ_BIN_14 -78 0x282C //RX_FDEQ_BIN_15 -79 0x0000 //RX_FDEQ_BIN_16 -80 0x0000 //RX_FDEQ_BIN_17 -81 0x0000 //RX_FDEQ_BIN_18 -82 0x0000 //RX_FDEQ_BIN_19 -83 0x0000 //RX_FDEQ_BIN_20 -84 0x0000 //RX_FDEQ_BIN_21 -85 0x0000 //RX_FDEQ_BIN_22 -86 0x0000 //RX_FDEQ_BIN_23 -87 0x4000 //RX_FDEQ_RESRV_0 -88 0x0320 //RX_FDEQ_RESRV_1 -89 0x0018 //RX_FDDRC_BAND_MARGIN_0 -90 0x0030 //RX_FDDRC_BAND_MARGIN_1 -91 0x0050 //RX_FDDRC_BAND_MARGIN_2 -92 0x0080 //RX_FDDRC_BAND_MARGIN_3 -93 0x0004 //RX_FDDRC_BLOCK_EXP -94 0x5000 //RX_FDDRC_THRD_2_0 -95 0x5000 //RX_FDDRC_THRD_2_1 -96 0x2000 //RX_FDDRC_THRD_2_2 -97 0x5000 //RX_FDDRC_THRD_2_3 -98 0x6400 //RX_FDDRC_THRD_3_0 -99 0x6400 //RX_FDDRC_THRD_3_1 -100 0x2000 //RX_FDDRC_THRD_3_2 -101 0x5000 //RX_FDDRC_THRD_3_3 -102 0x4000 //RX_FDDRC_SLANT_0_0 -103 0x4000 //RX_FDDRC_SLANT_0_1 -104 0x4000 //RX_FDDRC_SLANT_0_2 -105 0x4000 //RX_FDDRC_SLANT_0_3 -106 0x7FFF //RX_FDDRC_SLANT_1_0 -107 0x7FFF //RX_FDDRC_SLANT_1_1 -108 0x7FFF //RX_FDDRC_SLANT_1_2 -109 0x7FFF //RX_FDDRC_SLANT_1_3 -110 0x0000 //RX_FDDRC_RESRV_0 -129 0x0028 //RX_SPK_VOL -130 0x0000 //RX_VOL_RESRV_0 -#VOL 3 -6 0x4000 //RX_TDDRC_ALPHA_UP_1 -7 0x4000 //RX_TDDRC_ALPHA_UP_2 -8 0x4000 //RX_TDDRC_ALPHA_UP_3 -9 0x4000 //RX_TDDRC_ALPHA_UP_4 -27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 -28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 -29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 -32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 -33 0x7FFF //RX_TDDRC_LIMITER_THRD -34 0x0800 //RX_TDDRC_LIMITER_GAIN -112 0x0001 //RX_TDDRC_THRD_0 -113 0x0002 //RX_TDDRC_THRD_1 -114 0x1800 //RX_TDDRC_THRD_2 -115 0x1800 //RX_TDDRC_THRD_3 -116 0x6000 //RX_TDDRC_SLANT_0 -117 0x6E00 //RX_TDDRC_SLANT_1 -118 0x4000 //RX_TDDRC_ALPHA_UP_0 -119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 -120 0x0000 //RX_TDDRC_HMNC_FLAG -121 0x199A //RX_TDDRC_HMNC_GAIN -122 0x0001 //RX_TDDRC_SMT_FLAG -123 0x0CCD //RX_TDDRC_SMT_W -124 0x02D2 //RX_TDDRC_DRC_GAIN -38 0x0020 //RX_FDEQ_SUBNUM -39 0x4848 //RX_FDEQ_GAIN_0 -40 0x4848 //RX_FDEQ_GAIN_1 -41 0x4848 //RX_FDEQ_GAIN_2 -42 0x4850 //RX_FDEQ_GAIN_3 -43 0x4848 //RX_FDEQ_GAIN_4 -44 0x4848 //RX_FDEQ_GAIN_5 -45 0x4568 //RX_FDEQ_GAIN_6 -46 0x485C //RX_FDEQ_GAIN_7 -47 0x5C60 //RX_FDEQ_GAIN_8 -48 0x685C //RX_FDEQ_GAIN_9 -49 0x5648 //RX_FDEQ_GAIN_10 -50 0x484C //RX_FDEQ_GAIN_11 -51 0x706C //RX_FDEQ_GAIN_12 -52 0x7070 //RX_FDEQ_GAIN_13 -53 0x6868 //RX_FDEQ_GAIN_14 -54 0x6060 //RX_FDEQ_GAIN_15 -55 0x4848 //RX_FDEQ_GAIN_16 -56 0x4848 //RX_FDEQ_GAIN_17 -57 0x4848 //RX_FDEQ_GAIN_18 -58 0x4848 //RX_FDEQ_GAIN_19 -59 0x4848 //RX_FDEQ_GAIN_20 -60 0x4848 //RX_FDEQ_GAIN_21 -61 0x4848 //RX_FDEQ_GAIN_22 -62 0x4848 //RX_FDEQ_GAIN_23 -63 0x0202 //RX_FDEQ_BIN_0 -64 0x0203 //RX_FDEQ_BIN_1 -65 0x0303 //RX_FDEQ_BIN_2 -66 0x0402 //RX_FDEQ_BIN_3 -67 0x0504 //RX_FDEQ_BIN_4 -68 0x0209 //RX_FDEQ_BIN_5 -69 0x0808 //RX_FDEQ_BIN_6 -70 0x090A //RX_FDEQ_BIN_7 -71 0x0B0C //RX_FDEQ_BIN_8 -72 0x0D0E //RX_FDEQ_BIN_9 -73 0x1013 //RX_FDEQ_BIN_10 -74 0x1719 //RX_FDEQ_BIN_11 -75 0x1B1E //RX_FDEQ_BIN_12 -76 0x1E1E //RX_FDEQ_BIN_13 -77 0x1E28 //RX_FDEQ_BIN_14 -78 0x282C //RX_FDEQ_BIN_15 -79 0x0000 //RX_FDEQ_BIN_16 -80 0x0000 //RX_FDEQ_BIN_17 -81 0x0000 //RX_FDEQ_BIN_18 -82 0x0000 //RX_FDEQ_BIN_19 -83 0x0000 //RX_FDEQ_BIN_20 -84 0x0000 //RX_FDEQ_BIN_21 -85 0x0000 //RX_FDEQ_BIN_22 -86 0x0000 //RX_FDEQ_BIN_23 -87 0x4000 //RX_FDEQ_RESRV_0 -88 0x0320 //RX_FDEQ_RESRV_1 -89 0x0018 //RX_FDDRC_BAND_MARGIN_0 -90 0x0030 //RX_FDDRC_BAND_MARGIN_1 -91 0x0050 //RX_FDDRC_BAND_MARGIN_2 -92 0x0080 //RX_FDDRC_BAND_MARGIN_3 -93 0x0004 //RX_FDDRC_BLOCK_EXP -94 0x5000 //RX_FDDRC_THRD_2_0 -95 0x5000 //RX_FDDRC_THRD_2_1 -96 0x2000 //RX_FDDRC_THRD_2_2 -97 0x5000 //RX_FDDRC_THRD_2_3 -98 0x6400 //RX_FDDRC_THRD_3_0 -99 0x6400 //RX_FDDRC_THRD_3_1 -100 0x2000 //RX_FDDRC_THRD_3_2 -101 0x5000 //RX_FDDRC_THRD_3_3 -102 0x4000 //RX_FDDRC_SLANT_0_0 -103 0x4000 //RX_FDDRC_SLANT_0_1 -104 0x4000 //RX_FDDRC_SLANT_0_2 -105 0x4000 //RX_FDDRC_SLANT_0_3 -106 0x7FFF //RX_FDDRC_SLANT_1_0 -107 0x7FFF //RX_FDDRC_SLANT_1_1 -108 0x7FFF //RX_FDDRC_SLANT_1_2 -109 0x7FFF //RX_FDDRC_SLANT_1_3 -110 0x0000 //RX_FDDRC_RESRV_0 -129 0x0035 //RX_SPK_VOL -130 0x0000 //RX_VOL_RESRV_0 -#VOL 4 -6 0x4000 //RX_TDDRC_ALPHA_UP_1 -7 0x4000 //RX_TDDRC_ALPHA_UP_2 -8 0x4000 //RX_TDDRC_ALPHA_UP_3 -9 0x4000 //RX_TDDRC_ALPHA_UP_4 -27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 -28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 -29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 -32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 -33 0x7FFF //RX_TDDRC_LIMITER_THRD -34 0x0800 //RX_TDDRC_LIMITER_GAIN -112 0x0001 //RX_TDDRC_THRD_0 -113 0x0002 //RX_TDDRC_THRD_1 -114 0x1800 //RX_TDDRC_THRD_2 -115 0x1800 //RX_TDDRC_THRD_3 -116 0x6000 //RX_TDDRC_SLANT_0 -117 0x6E00 //RX_TDDRC_SLANT_1 -118 0x4000 //RX_TDDRC_ALPHA_UP_0 -119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 -120 0x0000 //RX_TDDRC_HMNC_FLAG -121 0x199A //RX_TDDRC_HMNC_GAIN -122 0x0001 //RX_TDDRC_SMT_FLAG -123 0x0CCD //RX_TDDRC_SMT_W -124 0x02D2 //RX_TDDRC_DRC_GAIN -38 0x0020 //RX_FDEQ_SUBNUM -39 0x4C4C //RX_FDEQ_GAIN_0 -40 0x4C4C //RX_FDEQ_GAIN_1 -41 0x4C48 //RX_FDEQ_GAIN_2 -42 0x4870 //RX_FDEQ_GAIN_3 -43 0x4848 //RX_FDEQ_GAIN_4 -44 0x4848 //RX_FDEQ_GAIN_5 -45 0x4568 //RX_FDEQ_GAIN_6 -46 0x485C //RX_FDEQ_GAIN_7 -47 0x5C60 //RX_FDEQ_GAIN_8 -48 0x685C //RX_FDEQ_GAIN_9 -49 0x5648 //RX_FDEQ_GAIN_10 -50 0x484C //RX_FDEQ_GAIN_11 -51 0x706C //RX_FDEQ_GAIN_12 -52 0x7070 //RX_FDEQ_GAIN_13 -53 0x6868 //RX_FDEQ_GAIN_14 -54 0x6060 //RX_FDEQ_GAIN_15 -55 0x4848 //RX_FDEQ_GAIN_16 -56 0x4848 //RX_FDEQ_GAIN_17 -57 0x4848 //RX_FDEQ_GAIN_18 -58 0x4848 //RX_FDEQ_GAIN_19 -59 0x4848 //RX_FDEQ_GAIN_20 -60 0x4848 //RX_FDEQ_GAIN_21 -61 0x4848 //RX_FDEQ_GAIN_22 -62 0x4848 //RX_FDEQ_GAIN_23 -63 0x0202 //RX_FDEQ_BIN_0 -64 0x0203 //RX_FDEQ_BIN_1 -65 0x0303 //RX_FDEQ_BIN_2 -66 0x0402 //RX_FDEQ_BIN_3 -67 0x0504 //RX_FDEQ_BIN_4 -68 0x0209 //RX_FDEQ_BIN_5 -69 0x0808 //RX_FDEQ_BIN_6 -70 0x090A //RX_FDEQ_BIN_7 -71 0x0B0C //RX_FDEQ_BIN_8 -72 0x0D0E //RX_FDEQ_BIN_9 -73 0x1013 //RX_FDEQ_BIN_10 -74 0x1719 //RX_FDEQ_BIN_11 -75 0x1B1E //RX_FDEQ_BIN_12 -76 0x1E1E //RX_FDEQ_BIN_13 -77 0x1E28 //RX_FDEQ_BIN_14 -78 0x282C //RX_FDEQ_BIN_15 -79 0x0000 //RX_FDEQ_BIN_16 -80 0x0000 //RX_FDEQ_BIN_17 -81 0x0000 //RX_FDEQ_BIN_18 -82 0x0000 //RX_FDEQ_BIN_19 -83 0x0000 //RX_FDEQ_BIN_20 -84 0x0000 //RX_FDEQ_BIN_21 -85 0x0000 //RX_FDEQ_BIN_22 -86 0x0000 //RX_FDEQ_BIN_23 -87 0x4000 //RX_FDEQ_RESRV_0 -88 0x0320 //RX_FDEQ_RESRV_1 -89 0x0018 //RX_FDDRC_BAND_MARGIN_0 -90 0x0030 //RX_FDDRC_BAND_MARGIN_1 -91 0x0050 //RX_FDDRC_BAND_MARGIN_2 -92 0x0080 //RX_FDDRC_BAND_MARGIN_3 -93 0x0004 //RX_FDDRC_BLOCK_EXP -94 0x5000 //RX_FDDRC_THRD_2_0 -95 0x5000 //RX_FDDRC_THRD_2_1 -96 0x2000 //RX_FDDRC_THRD_2_2 -97 0x5000 //RX_FDDRC_THRD_2_3 -98 0x6400 //RX_FDDRC_THRD_3_0 -99 0x6400 //RX_FDDRC_THRD_3_1 -100 0x2000 //RX_FDDRC_THRD_3_2 -101 0x5000 //RX_FDDRC_THRD_3_3 -102 0x4000 //RX_FDDRC_SLANT_0_0 -103 0x4000 //RX_FDDRC_SLANT_0_1 -104 0x4000 //RX_FDDRC_SLANT_0_2 -105 0x4000 //RX_FDDRC_SLANT_0_3 -106 0x7FFF //RX_FDDRC_SLANT_1_0 -107 0x7FFF //RX_FDDRC_SLANT_1_1 -108 0x7FFF //RX_FDDRC_SLANT_1_2 -109 0x7FFF //RX_FDDRC_SLANT_1_3 -110 0x0000 //RX_FDDRC_RESRV_0 -129 0x0052 //RX_SPK_VOL -130 0x0000 //RX_VOL_RESRV_0 -#VOL 5 -6 0x4000 //RX_TDDRC_ALPHA_UP_1 -7 0x4000 //RX_TDDRC_ALPHA_UP_2 -8 0x4000 //RX_TDDRC_ALPHA_UP_3 -9 0x4000 //RX_TDDRC_ALPHA_UP_4 -27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 -28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 -29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 -32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 -33 0x7FFF //RX_TDDRC_LIMITER_THRD -34 0x0800 //RX_TDDRC_LIMITER_GAIN -112 0x0001 //RX_TDDRC_THRD_0 -113 0x0002 //RX_TDDRC_THRD_1 -114 0x1800 //RX_TDDRC_THRD_2 -115 0x1800 //RX_TDDRC_THRD_3 -116 0x6000 //RX_TDDRC_SLANT_0 -117 0x6E00 //RX_TDDRC_SLANT_1 -118 0x4000 //RX_TDDRC_ALPHA_UP_0 -119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 -120 0x0000 //RX_TDDRC_HMNC_FLAG -121 0x199A //RX_TDDRC_HMNC_GAIN -122 0x0001 //RX_TDDRC_SMT_FLAG -123 0x0CCD //RX_TDDRC_SMT_W -124 0x02D2 //RX_TDDRC_DRC_GAIN -38 0x0020 //RX_FDEQ_SUBNUM -39 0x4C4C //RX_FDEQ_GAIN_0 -40 0x4C4C //RX_FDEQ_GAIN_1 -41 0x4C48 //RX_FDEQ_GAIN_2 -42 0x4870 //RX_FDEQ_GAIN_3 -43 0x4848 //RX_FDEQ_GAIN_4 -44 0x4848 //RX_FDEQ_GAIN_5 -45 0x4568 //RX_FDEQ_GAIN_6 -46 0x485C //RX_FDEQ_GAIN_7 -47 0x5C60 //RX_FDEQ_GAIN_8 -48 0x685C //RX_FDEQ_GAIN_9 -49 0x5648 //RX_FDEQ_GAIN_10 -50 0x484C //RX_FDEQ_GAIN_11 -51 0x706C //RX_FDEQ_GAIN_12 -52 0x7070 //RX_FDEQ_GAIN_13 -53 0x6868 //RX_FDEQ_GAIN_14 -54 0x6060 //RX_FDEQ_GAIN_15 -55 0x4848 //RX_FDEQ_GAIN_16 -56 0x4848 //RX_FDEQ_GAIN_17 -57 0x4848 //RX_FDEQ_GAIN_18 -58 0x4848 //RX_FDEQ_GAIN_19 -59 0x4848 //RX_FDEQ_GAIN_20 -60 0x4848 //RX_FDEQ_GAIN_21 -61 0x4848 //RX_FDEQ_GAIN_22 -62 0x4848 //RX_FDEQ_GAIN_23 -63 0x0202 //RX_FDEQ_BIN_0 -64 0x0203 //RX_FDEQ_BIN_1 -65 0x0303 //RX_FDEQ_BIN_2 -66 0x0402 //RX_FDEQ_BIN_3 -67 0x0504 //RX_FDEQ_BIN_4 -68 0x0209 //RX_FDEQ_BIN_5 -69 0x0808 //RX_FDEQ_BIN_6 -70 0x090A //RX_FDEQ_BIN_7 -71 0x0B0C //RX_FDEQ_BIN_8 -72 0x0D0E //RX_FDEQ_BIN_9 -73 0x1013 //RX_FDEQ_BIN_10 -74 0x1719 //RX_FDEQ_BIN_11 -75 0x1B1E //RX_FDEQ_BIN_12 -76 0x1E1E //RX_FDEQ_BIN_13 -77 0x1E28 //RX_FDEQ_BIN_14 -78 0x282C //RX_FDEQ_BIN_15 -79 0x0000 //RX_FDEQ_BIN_16 -80 0x0000 //RX_FDEQ_BIN_17 -81 0x0000 //RX_FDEQ_BIN_18 -82 0x0000 //RX_FDEQ_BIN_19 -83 0x0000 //RX_FDEQ_BIN_20 -84 0x0000 //RX_FDEQ_BIN_21 -85 0x0000 //RX_FDEQ_BIN_22 -86 0x0000 //RX_FDEQ_BIN_23 -87 0x4000 //RX_FDEQ_RESRV_0 -88 0x0320 //RX_FDEQ_RESRV_1 -89 0x0018 //RX_FDDRC_BAND_MARGIN_0 -90 0x0030 //RX_FDDRC_BAND_MARGIN_1 -91 0x0050 //RX_FDDRC_BAND_MARGIN_2 -92 0x0080 //RX_FDDRC_BAND_MARGIN_3 -93 0x0004 //RX_FDDRC_BLOCK_EXP -94 0x5000 //RX_FDDRC_THRD_2_0 -95 0x5000 //RX_FDDRC_THRD_2_1 -96 0x2000 //RX_FDDRC_THRD_2_2 -97 0x5000 //RX_FDDRC_THRD_2_3 -98 0x6400 //RX_FDDRC_THRD_3_0 -99 0x6400 //RX_FDDRC_THRD_3_1 -100 0x2000 //RX_FDDRC_THRD_3_2 -101 0x5000 //RX_FDDRC_THRD_3_3 -102 0x4000 //RX_FDDRC_SLANT_0_0 -103 0x4000 //RX_FDDRC_SLANT_0_1 -104 0x4000 //RX_FDDRC_SLANT_0_2 -105 0x4000 //RX_FDDRC_SLANT_0_3 -106 0x7FFF //RX_FDDRC_SLANT_1_0 -107 0x7FFF //RX_FDDRC_SLANT_1_1 -108 0x7FFF //RX_FDDRC_SLANT_1_2 -109 0x7FFF //RX_FDDRC_SLANT_1_3 -110 0x0000 //RX_FDDRC_RESRV_0 -129 0x0078 //RX_SPK_VOL -130 0x0000 //RX_VOL_RESRV_0 -#VOL 6 -6 0x4000 //RX_TDDRC_ALPHA_UP_1 -7 0x4000 //RX_TDDRC_ALPHA_UP_2 -8 0x4000 //RX_TDDRC_ALPHA_UP_3 -9 0x4000 //RX_TDDRC_ALPHA_UP_4 -27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 -28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 -29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 -32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 -33 0x7FFF //RX_TDDRC_LIMITER_THRD -34 0x0800 //RX_TDDRC_LIMITER_GAIN -112 0x0001 //RX_TDDRC_THRD_0 -113 0x0002 //RX_TDDRC_THRD_1 -114 0x1800 //RX_TDDRC_THRD_2 -115 0x1800 //RX_TDDRC_THRD_3 -116 0x6000 //RX_TDDRC_SLANT_0 -117 0x6E00 //RX_TDDRC_SLANT_1 -118 0x4000 //RX_TDDRC_ALPHA_UP_0 -119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 -120 0x0000 //RX_TDDRC_HMNC_FLAG -121 0x199A //RX_TDDRC_HMNC_GAIN -122 0x0001 //RX_TDDRC_SMT_FLAG -123 0x0CCD //RX_TDDRC_SMT_W -124 0x02D2 //RX_TDDRC_DRC_GAIN -38 0x0020 //RX_FDEQ_SUBNUM -39 0x4C4C //RX_FDEQ_GAIN_0 -40 0x4C4C //RX_FDEQ_GAIN_1 -41 0x4C48 //RX_FDEQ_GAIN_2 -42 0x4870 //RX_FDEQ_GAIN_3 -43 0x4848 //RX_FDEQ_GAIN_4 -44 0x4848 //RX_FDEQ_GAIN_5 -45 0x4568 //RX_FDEQ_GAIN_6 -46 0x485C //RX_FDEQ_GAIN_7 -47 0x5C60 //RX_FDEQ_GAIN_8 -48 0x685C //RX_FDEQ_GAIN_9 -49 0x5648 //RX_FDEQ_GAIN_10 -50 0x484C //RX_FDEQ_GAIN_11 -51 0x706C //RX_FDEQ_GAIN_12 -52 0x7070 //RX_FDEQ_GAIN_13 -53 0x6868 //RX_FDEQ_GAIN_14 -54 0x6060 //RX_FDEQ_GAIN_15 -55 0x4848 //RX_FDEQ_GAIN_16 -56 0x4848 //RX_FDEQ_GAIN_17 -57 0x4848 //RX_FDEQ_GAIN_18 -58 0x4848 //RX_FDEQ_GAIN_19 -59 0x4848 //RX_FDEQ_GAIN_20 -60 0x4848 //RX_FDEQ_GAIN_21 -61 0x4848 //RX_FDEQ_GAIN_22 -62 0x4848 //RX_FDEQ_GAIN_23 -63 0x0202 //RX_FDEQ_BIN_0 -64 0x0203 //RX_FDEQ_BIN_1 -65 0x0303 //RX_FDEQ_BIN_2 -66 0x0402 //RX_FDEQ_BIN_3 -67 0x0504 //RX_FDEQ_BIN_4 -68 0x0209 //RX_FDEQ_BIN_5 -69 0x0808 //RX_FDEQ_BIN_6 -70 0x090A //RX_FDEQ_BIN_7 -71 0x0B0C //RX_FDEQ_BIN_8 -72 0x0D0E //RX_FDEQ_BIN_9 -73 0x1013 //RX_FDEQ_BIN_10 -74 0x1719 //RX_FDEQ_BIN_11 -75 0x1B1E //RX_FDEQ_BIN_12 -76 0x1E1E //RX_FDEQ_BIN_13 -77 0x1E28 //RX_FDEQ_BIN_14 -78 0x282C //RX_FDEQ_BIN_15 -79 0x0000 //RX_FDEQ_BIN_16 -80 0x0000 //RX_FDEQ_BIN_17 -81 0x0000 //RX_FDEQ_BIN_18 -82 0x0000 //RX_FDEQ_BIN_19 -83 0x0000 //RX_FDEQ_BIN_20 -84 0x0000 //RX_FDEQ_BIN_21 -85 0x0000 //RX_FDEQ_BIN_22 -86 0x0000 //RX_FDEQ_BIN_23 -87 0x4000 //RX_FDEQ_RESRV_0 -88 0x0320 //RX_FDEQ_RESRV_1 -89 0x0018 //RX_FDDRC_BAND_MARGIN_0 -90 0x0030 //RX_FDDRC_BAND_MARGIN_1 -91 0x0050 //RX_FDDRC_BAND_MARGIN_2 -92 0x0080 //RX_FDDRC_BAND_MARGIN_3 -93 0x0004 //RX_FDDRC_BLOCK_EXP -94 0x5000 //RX_FDDRC_THRD_2_0 -95 0x5000 //RX_FDDRC_THRD_2_1 -96 0x2000 //RX_FDDRC_THRD_2_2 -97 0x5000 //RX_FDDRC_THRD_2_3 -98 0x6400 //RX_FDDRC_THRD_3_0 -99 0x6400 //RX_FDDRC_THRD_3_1 -100 0x2000 //RX_FDDRC_THRD_3_2 -101 0x5000 //RX_FDDRC_THRD_3_3 -102 0x4000 //RX_FDDRC_SLANT_0_0 -103 0x4000 //RX_FDDRC_SLANT_0_1 -104 0x4000 //RX_FDDRC_SLANT_0_2 -105 0x4000 //RX_FDDRC_SLANT_0_3 -106 0x7FFF //RX_FDDRC_SLANT_1_0 -107 0x7FFF //RX_FDDRC_SLANT_1_1 -108 0x7FFF //RX_FDDRC_SLANT_1_2 -109 0x7FFF //RX_FDDRC_SLANT_1_3 -110 0x0000 //RX_FDDRC_RESRV_0 -129 0x0100 //RX_SPK_VOL -130 0x0000 //RX_VOL_RESRV_0 - -#CASE_NAME HANDSFREE-HANDSFREE-CUSTOM2-FB -#PARAM_TYPE TX+RX -#TOTAL_CUSTOM_STEP 7 -#TX -0 0x0001 //TX_OPERATION_MODE_0 -1 0x0001 //TX_OPERATION_MODE_1 -2 0x0033 //TX_PATCH_REG -3 0x6B5C //TX_SENDFUNC_MODE_0 -4 0x0001 //TX_SENDFUNC_MODE_1 -5 0x0003 //TX_NUM_MIC -6 0x0004 //TX_SAMPLINGFREQ_SIG -7 0x0004 //TX_SAMPLINGFREQ_PROC -8 0x000A //TX_FRAME_SZ_SIG -9 0x000A //TX_FRAME_SZ -10 0x0000 //TX_DELAY_OPT -11 0x0028 //TX_MAX_TAIL_LENGTH -12 0x0001 //TX_NUM_LOUTCHN -13 0x0001 //TX_MAXNUM_AECREF -14 0x0000 //TX_DBG_FUNC_REG -15 0x0000 //TX_DBG_FUNC_REG1 -16 0x0000 //TX_SYS_RESRV_0 -17 0x0000 //TX_SYS_RESRV_1 -18 0x0000 //TX_SYS_RESRV_2 -19 0x0000 //TX_SYS_RESRV_3 -20 0x0000 //TX_DIST2REF0 -21 0x00A4 //TX_DIST2REF1 -22 0x0017 //TX_DIST2REF_02 -23 0x0000 //TX_DIST2REF_03 -24 0x0000 //TX_DIST2REF_04 -25 0x0000 //TX_DIST2REF_05 -26 0x0000 //TX_MMIC -27 0x0FF7 //TX_PGA_0 -28 0x0FF7 //TX_PGA_1 -29 0x0FF7 //TX_PGA_2 -30 0x0000 //TX_PGA_3 -31 0x0000 //TX_PGA_4 -32 0x0000 //TX_PGA_5 -33 0x0001 //TX_MIC_PAIRS -34 0x0000 //TX_MIC_PAIRS_HS -35 0x0002 //TX_MICS_FOR_BF -36 0x0000 //TX_MIC_PAIRS_FORL1 -37 0x0002 //TX_MICS_OF_PAIR0 -38 0x0002 //TX_MICS_OF_PAIR1 -39 0x0002 //TX_MICS_OF_PAIR2 -40 0x0002 //TX_MICS_OF_PAIR3 -41 0x0002 //TX_MIC_DATA_SRC0 -42 0x0000 //TX_MIC_DATA_SRC1 -43 0x0001 //TX_MIC_DATA_SRC2 -44 0x0000 //TX_MIC_DATA_SRC3 -45 0x0000 //TX_MIC_PAIR_CH_04 -46 0x0000 //TX_MIC_PAIR_CH_05 -47 0x0000 //TX_MIC_PAIR_CH_10 -48 0x0000 //TX_MIC_PAIR_CH_11 -49 0x0000 //TX_MIC_PAIR_CH_12 -50 0x0000 //TX_MIC_PAIR_CH_13 -51 0x0000 //TX_MIC_PAIR_CH_14 -52 0x05DC //TX_HD_BIN_MASK -53 0x0010 //TX_HD_SUBAND_MASK -54 0x19A1 //TX_HD_FRAME_AVG_MASK -55 0x0320 //TX_HD_MIN_FRQ -56 0x1000 //TX_HD_ALPHA_PSD -57 0x1100 //TX_T_PHPR1 -58 0x0000 //TX_T_PHPR2 -59 0x0000 //TX_T_PTPR -60 0x0000 //TX_T_PNPR -61 0x0000 //TX_T_PAPR1 -62 0xEE6C //TX_T_PSDVAT -63 0x0800 //TX_CNT -64 0x4000 //TX_ANTI_HOWL_GAIN -65 0x0001 //TX_MICFORBFMARK_0 -66 0x0001 //TX_MICFORBFMARK_1 -67 0x0001 //TX_MICFORBFMARK_2 -68 0x0001 //TX_MICFORBFMARK_3 -69 0x0001 //TX_MICFORBFMARK_4 -70 0x0001 //TX_MICFORBFMARK_5 -71 0x0000 //TX_DIST2REF_10 -72 0x3B33 //TX_DIST2REF_11 -73 0x0A70 //TX_DIST2REF2 -74 0x0000 //TX_DIST2REF_13 -75 0x0000 //TX_DIST2REF_14 -76 0x0000 //TX_DIST2REF_15 -77 0x0000 //TX_DIST2REF_20 -78 0x0000 //TX_DIST2REF_21 -79 0x0000 //TX_DIST2REF_22 -80 0x0000 //TX_DIST2REF_23 -81 0x0000 //TX_DIST2REF_24 -82 0x0000 //TX_DIST2REF_25 -83 0x0000 //TX_DIST2REF_30 -84 0x0000 //TX_DIST2REF_31 -85 0x0000 //TX_DIST2REF_32 -86 0x0000 //TX_DIST2REF_33 -87 0x0000 //TX_DIST2REF_34 -88 0x0000 //TX_DIST2REF_35 -89 0x0000 //TX_MIC_LOC_00 -90 0x0000 //TX_MIC_LOC_01 -91 0x0000 //TX_MIC_LOC_02 -92 0x0000 //TX_MIC_LOC_03 -93 0x0000 //TX_MIC_LOC_04 -94 0x0000 //TX_MIC_LOC_05 -95 0x0000 //TX_MIC_LOC_10 -96 0x0000 //TX_MIC_LOC_11 -97 0x0000 //TX_MIC_LOC_12 -98 0x0000 //TX_MIC_LOC_13 -99 0x0000 //TX_MIC_LOC_14 -100 0x0000 //TX_MIC_LOC_15 -101 0x0000 //TX_MIC_LOC_20 -102 0x0000 //TX_MIC_LOC_21 -103 0x0000 //TX_MIC_LOC_22 -104 0x0000 //TX_MIC_LOC_23 -105 0x0000 //TX_MIC_LOC_24 -106 0x0000 //TX_MIC_LOC_25 -107 0x0800 //TX_MIC_REFBLK_VOLUME -108 0x0CAE //TX_MIC_BLOCK_VOLUME -109 0x0000 //TX_INVERSE_MASK -110 0x0000 //TX_ADCS_MASK -111 0x04D0 //TX_ADCS_GAIN -112 0x4000 //TX_NFC_GAINFAC -113 0x0000 //TX_MAINMIC_BLKFACTOR -114 0x0000 //TX_REFMIC_BLKFACTOR -115 0x0000 //TX_BLMIC_BLKFACTOR -116 0x0000 //TX_BRMIC_BLKFACTOR -117 0x0031 //TX_MICBLK_START_BIN -118 0x0060 //TX_MICBLK_END_BIN -119 0x0015 //TX_MICBLK_FE_HOLD -120 0xFFF2 //TX_MICBLK_MR_EXP_TH -121 0xFFF2 //TX_MICBLK_LR_EXP_TH -122 0x0015 //TX_FENE_HOLD -123 0x4000 //TX_FE_ENER_TH_MTS -124 0x0004 //TX_FE_ENER_TH_EXP -125 0x6000 //TX_C_POST_FLT_MIC_MAINBLK -126 0x6000 //TX_C_POST_FLT_MIC_REFBLK -127 0x0010 //TX_MIC_BLOCK_N -128 0x7E56 //TX_A_HP -129 0x4000 //TX_B_PE -130 0x1800 //TX_THR_PITCH_DET_0 -131 0x1000 //TX_THR_PITCH_DET_1 -132 0x0800 //TX_THR_PITCH_DET_2 -133 0x0008 //TX_PITCH_BFR_LEN -134 0x0003 //TX_SBD_PITCH_DET -135 0x0050 //TX_TD_AEC_L -136 0x4000 //TX_MU0_UNP_TD_AEC -137 0x1000 //TX_MU0_PTD_TD_AEC -138 0x0000 //TX_PP_RESRV_0 -139 0x2A94 //TX_PP_RESRV_1 -140 0x55F0 //TX_PP_RESRV_2 -141 0x0000 //TX_PP_RESRV_3 -142 0x0000 //TX_PP_RESRV_4 -143 0x0000 //TX_PP_RESRV_5 -144 0x0000 //TX_PP_RESRV_6 -145 0x0000 //TX_PP_RESRV_7 -146 0x0028 //TX_TAIL_LENGTH -147 0x0300 //TX_AEC_REF_GAIN_0 -148 0x0800 //TX_AEC_REF_GAIN_1 -149 0x0800 //TX_AEC_REF_GAIN_2 -150 0x7A00 //TX_EAD_THR -151 0x1000 //TX_THR_RE_EST -152 0x0800 //TX_MIN_EQ_RE_EST_0 -153 0x2000 //TX_MIN_EQ_RE_EST_1 -154 0x2000 //TX_MIN_EQ_RE_EST_2 -155 0x4000 //TX_MIN_EQ_RE_EST_3 -156 0x4000 //TX_MIN_EQ_RE_EST_4 -157 0x7FFF //TX_MIN_EQ_RE_EST_5 -158 0x7FFF //TX_MIN_EQ_RE_EST_6 -159 0x7FFF //TX_MIN_EQ_RE_EST_7 -160 0x7FFF //TX_MIN_EQ_RE_EST_8 -161 0x7FFF //TX_MIN_EQ_RE_EST_9 -162 0x7FFF //TX_MIN_EQ_RE_EST_10 -163 0x7FFF //TX_MIN_EQ_RE_EST_11 -164 0x7FFF //TX_MIN_EQ_RE_EST_12 -165 0x4000 //TX_LAMBDA_RE_EST -166 0x0CCD //TX_LAMBDA_CB_NLE -167 0x2000 //TX_C_POST_FLT -168 0x7FFF //TX_GAIN_NP -169 0x0180 //TX_SE_HOLD_N -170 0x00C8 //TX_DT_HOLD_N -171 0x09C4 //TX_DT2_HOLD_N -172 0x6666 //TX_AEC_RESRV_0 -173 0x0000 //TX_AEC_RESRV_1 -174 0x0014 //TX_AEC_RESRV_2 -175 0x0000 //TX_MIC_DELAY_LENGTH -176 0x0000 //TX_REF_DELAY_LENGTH -177 0x0000 //TX_ADD_LINEIN_GAINL -178 0x0000 //TX_ADD_LINEIN_GAINH -179 0x0000 //TX_MIN_EQ_RE_EST_14 -180 0x0000 //TX_DTD_THR1_8 -181 0x7FFF //TX_DTD_THR2_8 -182 0x0000 //TX_DTD_MIC_BLK2 -183 0x0008 //TX_FRQ_LIN_LEN -184 0x7FFF //TX_FRQ_AEC_LEN_RHO -185 0x6000 //TX_MU0_UNP_FRQ_AEC -186 0x4000 //TX_MU0_PTD_FRQ_AEC -187 0x000A //TX_MINENOISETH -188 0x0800 //TX_MU0_RE_EST -189 0x0001 //TX_AEC_NUM_CH -190 0x0000 //TX_BIGECHOATTENUATION_MAX -191 0x2000 //TX_A_POST_FLT_MICBLK -192 0x0000 //TX_BLKENERTH -193 0x0000 //TX_BLKENERHIGHTH -194 0x0000 //TX_NORMENERTH -195 0x0000 //TX_NORMENERHIGHTH -196 0x0000 //TX_NORMENERHIGHTHL -197 0x7D00 //TX_DTD_THR1_0 -198 0x7FF0 //TX_DTD_THR1_1 -199 0x7FF0 //TX_DTD_THR1_2 -200 0x7FF0 //TX_DTD_THR1_3 -201 0x7FF0 //TX_DTD_THR1_4 -202 0x7FF0 //TX_DTD_THR1_5 -203 0x7FF0 //TX_DTD_THR1_6 -204 0x0CCD //TX_DTD_THR2_0 -205 0x0CCD //TX_DTD_THR2_1 -206 0x0CCD //TX_DTD_THR2_2 -207 0x0CCD //TX_DTD_THR2_3 -208 0x0CCD //TX_DTD_THR2_4 -209 0x0CCD //TX_DTD_THR2_5 -210 0x0CCD //TX_DTD_THR2_6 -211 0x7FFF //TX_DTD_THR3 -212 0x0000 //TX_SPK_CUT_K -213 0x0DAC //TX_DT_CUT_K -214 0x0020 //TX_DT_CUT_THR -215 0x04EB //TX_COMFORT_G -216 0x01F4 //TX_POWER_YOUT_TH -217 0x4000 //TX_FDPFGAINECHO -218 0x0000 //TX_DTD_HD_THR -219 0x0000 //TX_SPK_CUT_K_S -220 0x7FFF //TX_DTD_MIC_BLK -221 0x023E //TX_ADPT_STRICT_L -222 0x023E //TX_ADPT_STRICT_H -223 0x0BB8 //TX_RATIO_DT_L_TH_LOW -224 0x3A98 //TX_RATIO_DT_H_TH_LOW -225 0x1770 //TX_RATIO_DT_L_TH_HIGH -226 0x4E20 //TX_RATIO_DT_H_TH_HIGH -227 0x09C4 //TX_RATIO_DT_L0_TH -228 0x2000 //TX_B_POST_FILT_ECHO_L -229 0x2000 //TX_B_POST_FILT_ECHO_H -230 0x0200 //TX_MIN_G_CTRL_ECHO -231 0x1000 //TX_B_LESSCUT_RTO_ECHO -232 0x0063 //TX_EPD_OFFSET_00 -233 0x0000 //TX_EPD_OFFST_01 -234 0x1388 //TX_RATIO_DT_L0_TH_HIGH -235 0x3A98 //TX_RATIO_DT_H_TH_CUT -236 0x7FFF //TX_MIN_EQ_RE_EST_13 -237 0x0000 //TX_DTD_THR1_7 -238 0x0000 //TX_DTD_THR2_7 -239 0x0800 //TX_DT_RESRV_7 -240 0x0800 //TX_DT_RESRV_8 -241 0x0000 //TX_DT_RESRV_9 -242 0xF800 //TX_THR_SN_EST_0 -243 0xFA00 //TX_THR_SN_EST_1 -244 0xFA00 //TX_THR_SN_EST_2 -245 0xFB00 //TX_THR_SN_EST_3 -246 0xFA00 //TX_THR_SN_EST_4 -247 0xFA00 //TX_THR_SN_EST_5 -248 0xF800 //TX_THR_SN_EST_6 -249 0xF800 //TX_THR_SN_EST_7 -250 0x0100 //TX_DELTA_THR_SN_EST_0 -251 0x0200 //TX_DELTA_THR_SN_EST_1 -252 0x0100 //TX_DELTA_THR_SN_EST_2 -253 0x0200 //TX_DELTA_THR_SN_EST_3 -254 0x0100 //TX_DELTA_THR_SN_EST_4 -255 0x0100 //TX_DELTA_THR_SN_EST_5 -256 0x0200 //TX_DELTA_THR_SN_EST_6 -257 0x0200 //TX_DELTA_THR_SN_EST_7 -258 0x4000 //TX_LAMBDA_NN_EST_0 -259 0x4000 //TX_LAMBDA_NN_EST_1 -260 0x4000 //TX_LAMBDA_NN_EST_2 -261 0x4000 //TX_LAMBDA_NN_EST_3 -262 0x4000 //TX_LAMBDA_NN_EST_4 -263 0x4000 //TX_LAMBDA_NN_EST_5 -264 0x4000 //TX_LAMBDA_NN_EST_6 -265 0x4000 //TX_LAMBDA_NN_EST_7 -266 0x0400 //TX_N_SN_EST -267 0x001E //TX_INBEAM_T -268 0x0041 //TX_INBEAMHOLDT -269 0x2000 //TX_G_STRICT -270 0x2000 //TX_EQ_THR_BF -271 0x799A //TX_LAMBDA_EQ_BF -272 0x1000 //TX_NE_RTO_TH -273 0x0400 //TX_NE_RTO_TH_L -274 0x0800 //TX_MAINREFRTOH_TH_H -275 0x0800 //TX_MAINREFRTOH_TH_L -276 0x0800 //TX_MAINREFRTO_TH_H -277 0x0800 //TX_MAINREFRTO_TH_L -278 0x0200 //TX_MAINREFRTO_TH_EQ -279 0x2000 //TX_B_POST_FLT_0 -280 0x1000 //TX_B_POST_FLT_1 -281 0x0010 //TX_NS_LVL_CTRL_0 -282 0x0014 //TX_NS_LVL_CTRL_1 -283 0x0014 //TX_NS_LVL_CTRL_2 -284 0x0018 //TX_NS_LVL_CTRL_3 -285 0x0016 //TX_NS_LVL_CTRL_4 -286 0x0014 //TX_NS_LVL_CTRL_5 -287 0x0011 //TX_NS_LVL_CTRL_6 -288 0x0011 //TX_NS_LVL_CTRL_7 -289 0x000F //TX_MIN_GAIN_S_0 -290 0x0010 //TX_MIN_GAIN_S_1 -291 0x0010 //TX_MIN_GAIN_S_2 -292 0x0010 //TX_MIN_GAIN_S_3 -293 0x0010 //TX_MIN_GAIN_S_4 -294 0x0010 //TX_MIN_GAIN_S_5 -295 0x0010 //TX_MIN_GAIN_S_6 -296 0x000F //TX_MIN_GAIN_S_7 -297 0x6000 //TX_NMOS_SUP -298 0x0000 //TX_NS_MAX_PRI_SNR_TH -299 0x0000 //TX_NMOS_SUP_MENSA -300 0x7FFF //TX_SNRI_SUP_0 -301 0x4000 //TX_SNRI_SUP_1 -302 0x4000 //TX_SNRI_SUP_2 -303 0x4000 //TX_SNRI_SUP_3 -304 0x4000 //TX_SNRI_SUP_4 -305 0x4000 //TX_SNRI_SUP_5 -306 0x50C0 //TX_SNRI_SUP_6 -307 0x7FFF //TX_SNRI_SUP_7 -308 0x7FFF //TX_THR_LFNS -309 0x0018 //TX_G_LFNS -310 0x09C4 //TX_GAIN0_NTH -311 0x000A //TX_MUSIC_MORENS -312 0x7FFF //TX_A_POST_FILT_0 -313 0x2000 //TX_A_POST_FILT_1 -314 0x5000 //TX_A_POST_FILT_S_0 -315 0x6000 //TX_A_POST_FILT_S_1 -316 0x4C00 //TX_A_POST_FILT_S_2 -317 0x4000 //TX_A_POST_FILT_S_3 -318 0x6000 //TX_A_POST_FILT_S_4 -319 0x4000 //TX_A_POST_FILT_S_5 -320 0x5000 //TX_A_POST_FILT_S_6 -321 0x7000 //TX_A_POST_FILT_S_7 -322 0x2000 //TX_B_POST_FILT_0 -323 0x1000 //TX_B_POST_FILT_1 -324 0x2000 //TX_B_POST_FILT_2 -325 0x2000 //TX_B_POST_FILT_3 -326 0x4000 //TX_B_POST_FILT_4 -327 0x4000 //TX_B_POST_FILT_5 -328 0x1000 //TX_B_POST_FILT_6 -329 0x2000 //TX_B_POST_FILT_7 -330 0x4000 //TX_B_LESSCUT_RTO_S_0 -331 0x7FFF //TX_B_LESSCUT_RTO_S_1 -332 0x7FFF //TX_B_LESSCUT_RTO_S_2 -333 0x7FFF //TX_B_LESSCUT_RTO_S_3 -334 0x7FFF //TX_B_LESSCUT_RTO_S_4 -335 0x7FFF //TX_B_LESSCUT_RTO_S_5 -336 0x6000 //TX_B_LESSCUT_RTO_S_6 -337 0x7FFF //TX_B_LESSCUT_RTO_S_7 -338 0x7C00 //TX_LAMBDA_PFILT -339 0x7C00 //TX_LAMBDA_PFILT_S_0 -340 0x7C00 //TX_LAMBDA_PFILT_S_1 -341 0x7C00 //TX_LAMBDA_PFILT_S_2 -342 0x7A00 //TX_LAMBDA_PFILT_S_3 -343 0x7C00 //TX_LAMBDA_PFILT_S_4 -344 0x7C00 //TX_LAMBDA_PFILT_S_5 -345 0x7C00 //TX_LAMBDA_PFILT_S_6 -346 0x7C00 //TX_LAMBDA_PFILT_S_7 -347 0x0000 //TX_K_PEPPER -348 0x0800 //TX_A_PEPPER -349 0x1EAA //TX_K_PEPPER_HF -350 0x0600 //TX_A_PEPPER_HF -351 0x0001 //TX_HMNC_BST_FLG -352 0x0200 //TX_HMNC_BST_THR -353 0x0200 //TX_DT_BINVAD_TH_0 -354 0x0200 //TX_DT_BINVAD_TH_1 -355 0x0200 //TX_DT_BINVAD_TH_2 -356 0x0200 //TX_DT_BINVAD_TH_3 -357 0x1F40 //TX_DT_BINVAD_ENDF -358 0x0100 //TX_C_POST_FLT_DT -359 0x0CCD //TX_NS_B_POST_FLT_LESSCUT -360 0x0100 //TX_DT_BOOST -361 0x0000 //TX_BF_SGRAD_FLG -362 0x0005 //TX_BF_DVG_TH -363 0x001E //TX_SN_C_F -364 0x0000 //TX_K_APT -365 0x0001 //TX_NOISEDET -366 0x0064 //TX_NDETCT -367 0x0050 //TX_NOISE_TH_0 -368 0x7FFF //TX_NOISE_TH_0_2 -369 0x7FFF //TX_NOISE_TH_0_3 -370 0x07D0 //TX_NOISE_TH_1 -371 0x0DAC //TX_NOISE_TH_2 -372 0x4E20 //TX_NOISE_TH_3 -373 0x4E20 //TX_NOISE_TH_4 -374 0x59D8 //TX_NOISE_TH_5 -375 0x7FFF //TX_NOISE_TH_5_2 -376 0x0000 //TX_NOISE_TH_5_3 -377 0x7FFF //TX_NOISE_TH_5_4 -378 0x2710 //TX_NOISE_TH_6 -379 0x0033 //TX_MINENOISE_TH -380 0x4000 //TX_MINENOISE_MIC0_TH_MTS -381 0xFFEE //TX_MINENOISE_MIC0_TH_EXP -382 0x6000 //TX_MINENOISE_MIC0_S_TH_MTS -383 0xFFF3 //TX_MINENOISE_MIC0_S_TH_EXP -384 0x0666 //TX_OUT_ENER_S_TH_CLEAN -385 0x0666 //TX_OUT_ENER_S_TH_LESSCLEAN -386 0x0333 //TX_OUT_ENER_S_TH_NOISY -387 0x019A //TX_OUT_ENER_TH_NOISE -388 0x0333 //TX_OUT_ENER_TH_SPEECH -389 0x2000 //TX_SN_NPB_GAIN -390 0x0000 //TX_NN_NPB_GAIN -391 0x0000 //TX_CSX_ALPHA_0 -392 0x0000 //TX_CSX_ALPHA_1 -393 0x0000 //TX_CSX_ALPHA_2 -394 0x0000 //TX_CSX_ALPHA_3 -395 0x0800 //TX_MU_ARSP_EST -396 0x00C8 //TX_P_OUTBEAM_MIN_TH -397 0x0002 //TX_EXTRA_NS_L -398 0x0800 //TX_EXTRA_NS_A -399 0x0005 //TX_VR_NOISE_FLOOR_TH -400 0x0148 //TX_MIN_G_LOW300HZ -401 0x0002 //TX_MAXLEVEL_CNG -402 0x00B4 //TX_STN_NOISE_TH -403 0x4000 //TX_POST_MASK_SUP -404 0x7FFF //TX_POST_MASK_ADJUST -405 0x00C8 //TX_NS_ENOISE_MIC0_TH -406 0x0033 //TX_MINENOISE_MIC0_TH -407 0x012C //TX_MINENOISE_MIC0_S_TH -408 0x7FFF //TX_MIN_G_CTRL_SSNS -409 0x0000 //TX_METAL_RTO_THR -410 0x4848 //TX_NS_FP_K_METAL -411 0x3A98 //TX_NOISEDET_BOOST_TH -412 0x0FA0 //TX_NSMOOTH_TH -413 0x0000 //TX_NS_RESRV_8 -414 0x1800 //TX_RHO_UPB -415 0x0BB8 //TX_N_HOLD_HS -416 0x0050 //TX_N_RHO_BFR0 -417 0x7FFF //TX_LAMBDA_ARSP_EST -418 0x0100 //TX_EXTRA_GAIN_MICBLOCK -419 0x0CCD //TX_THR_STD_NSR -420 0x019A //TX_THR_STD_PLH -421 0x2AF8 //TX_N_HOLD_STD -422 0x0066 //TX_THR_STD_RHO -423 0x2000 //TX_BF_RESET_THR_HS -424 0x09C4 //TX_SB_RTO_MEAN_TH -425 0x0000 //TX_SB_RHO_MEAN_TH_NTALK -426 0x3800 //TX_SB_RTO_MEAN_TH_ABN -427 0x2EE0 //TX_SB_RTO_MEAN_TH_RUB -428 0x0000 //TX_WTA_EN_RTO_TH -429 0x0000 //TX_TOP_ENER_TH_F -430 0x0000 //TX_DESIRED_TALK_HOLDT -431 0x0800 //TX_MIC_BLOCK_FACTOR -432 0x0000 //TX_NSEST_BFRLRNRDC -433 0x0000 //TX_THR_POST_FLT_HS -434 0x0010 //TX_HS_VAD_BIN -435 0x2666 //TX_THR_VAD_HS -436 0x2CCD //TX_MEAN_RTO_MIN_TH2 -437 0x0032 //TX_SILENCE_T -438 0x0000 //TX_A_POST_FLT_WTA -439 0x799A //TX_LAMBDA_PFLT_WTA -440 0x0000 //TX_SB_RHO_MEAN2_TH -441 0x0190 //TX_SB_RHO_MEAN3_TH -442 0x0000 //TX_HS_RESRV_4 -443 0x0000 //TX_HS_RESRV_5 -444 0x003C //TX_DOA_VAD_THR_1 -445 0x0000 //TX_DOA_VAD_THR_2 -446 0x0028 //TX_DOA_VAD_THR1_0 -447 0x0028 //TX_DOA_VAD_THR1_1 -448 0x0000 //TX_SRC_DOA_RNG_LOW_0A -449 0x00B4 //TX_SRC_DOA_RNG_HIGH_0A -450 0x005A //TX_DFLT_SRC_DOA_0A -451 0x0000 //TX_SRC_DOA_RNG_LOW_0B -452 0x0000 //TX_SRC_DOA_RNG_HIGH_0B -453 0x0000 //TX_DFLT_SRC_DOA_0B -454 0x0000 //TX_SRC_DOA_RNG_LOW_0C -455 0x0000 //TX_SRC_DOA_RNG_HIGH_0C -456 0x0000 //TX_DFLT_SRC_DOA_0C -457 0x0000 //TX_SRC_DOA_RNG_LOW_0D -458 0x0000 //TX_SRC_DOA_RNG_HIGH_0D -459 0x0000 //TX_DFLT_SRC_DOA_0D -460 0x0000 //TX_SRC_DOA_RNG_LOW_1A -461 0x00B4 //TX_SRC_DOA_RNG_HIGH_1A -462 0x005A //TX_DFLT_SRC_DOA_1A -463 0x0000 //TX_SRC_DOA_RNG_LOW_1B -464 0x00B4 //TX_SRC_DOA_RNG_HIGH_1B -465 0x005A //TX_DFLT_SRC_DOA_1B -466 0x0000 //TX_SRC_DOA_RNG_LOW_1C -467 0x00B4 //TX_SRC_DOA_RNG_HIGH_1C -468 0x005A //TX_DFLT_SRC_DOA_1C -469 0x0000 //TX_SRC_DOA_RNG_LOW_1D -470 0x00B4 //TX_SRC_DOA_RNG_HIGH_1D -471 0x005A //TX_DFLT_SRC_DOA_1D -472 0x0100 //TX_BF_HOLDOFF_T -473 0x7FFF //TX_DOA_COST_FACTOR -474 0x4000 //TX_MAINTOREFR_TH0 -475 0x071C //TX_DOA_TRK_THR -476 0x012C //TX_DOA_TRACK_HT -477 0x0200 //TX_N1_HOLD_HF -478 0x0100 //TX_N2_HOLD_HF -479 0x3000 //TX_BF_RESET_THR_HF -480 0x7333 //TX_DOA_SMOOTH -481 0x0800 //TX_MU_BF -482 0x0800 //TX_BF_MU_LF_B2 -483 0x0040 //TX_BF_FC_END_BIN_B2 -484 0x0020 //TX_BF_FC_END_BIN -485 0x0000 //TX_HF_RESRV_25 -486 0x0000 //TX_HF_RESRV_26 -487 0x0007 //TX_N_DOA_SEED -488 0x0001 //TX_FINE_DOA_SEARCH_FLG -489 0x0000 //TX_HF_RESRV_27 -490 0x038E //TX_DLT_SRC_DOA_RNG -491 0x0200 //TX_BF_MU_LF -492 0x0000 //TX_DFLT_SRC_LOC_0 -493 0x7FFF //TX_DFLT_SRC_LOC_1 -494 0x0000 //TX_DFLT_SRC_LOC_2 -495 0x038E //TX_DOA_TRACK_VADTH -496 0x0000 //TX_DOA_TRACK_NEW -497 0x0230 //TX_NOR_OFF_THR -498 0x0CCD //TX_MORE_ON_700HZ_THR -499 0x2000 //TX_MU_BF_ADPT_NS -500 0x0000 //TX_ADAPT_LEN -501 0x2000 //TX_MORE_SNS -502 0x0000 //TX_NOR_OFF_TH1 -503 0x0000 //TX_WIDE_MASK_TH -504 0x4650 //TX_SUBSNRATIOHIGH4MEANBCK_THR -505 0x7FFF //TX_C_POST_FLT_CUT -506 0x2000 //TX_RADIODTLV -507 0x0320 //TX_POWER_LINEIN_TH -508 0x0014 //TX_FE_VADCOUNT_TH_FC -509 0x0000 //TX_ECHO_SUPP_FC -510 0x0C80 //TX_ECHO_TH -511 0x6666 //TX_MIC_TO_BFGAIN -512 0x0000 //TX_MICTOBFGAIN0 -513 0x0000 //TX_FASTMUE_TH -514 0x0000 //TX_DERVB_LEN_0 -515 0x0000 //TX_DERVB_LEN_1 -516 0x0000 //TX_RHO_DERVB -517 0x0000 //TX_MIC_INDX_DERVB -518 0x0000 //TX_MU_DERVB -519 0x0000 //TX_DR_RESRV_0 -520 0x0000 //TX_DR_RESRV_1 -521 0x0000 //TX_DR_RESRV_2 -522 0x0000 //TX_DR_RESRV_3 -523 0x0000 //TX_DR_RESRV_4 -524 0x0000 //TX_DR_RESRV_5 -525 0x0000 //TX_DR_RESRV_6 -526 0x0000 //TX_DR_RESRV_7 -527 0x0000 //TX_DR_RESRV_8 -528 0x1333 //TX_WIND_MARK_TH -529 0x399A //TX_CORR_THR -530 0x0004 //TX_SNR_THR -531 0x0010 //TX_ENGY_THR -532 0x1770 //TX_CORR_HIGH_TH -533 0x6000 //TX_ENGY_THR_2 -534 0x3400 //TX_MEAN_RTO_THR -535 0x0028 //TX_WNS_ENOISE_MIC0_TH -536 0x3000 //TX_RATIOMICL_TH -537 0x64CD //TX_CALIG_HS -538 0x0000 //TX_LVL_CTRL -539 0x0014 //TX_WIND_SUPRTO -540 0x000A //TX_WNS_MIN_G -541 0x0000 //TX_WNS_B_POST_FLT -542 0x2800 //TX_RATIOMICH_TH -543 0xD120 //TX_WIND_INBEAM_L_TH -544 0x0FA0 //TX_WIND_INBEAM_H_TH -545 0x2000 //TX_WNS_RESRV_0 -546 0x59D8 //TX_WNS_RESRV_1 -547 0x0000 //TX_WNS_RESRV_2 -548 0x0000 //TX_WNS_RESRV_3 -549 0x0000 //TX_WNS_RESRV_4 -550 0x0000 //TX_WNS_RESRV_5 -551 0x0000 //TX_WNS_RESRV_6 -552 0x0000 //TX_PB_B_POST_FLT_LESSCUT -553 0x0070 //TX_BF_LESSCUT_BBIN -554 0x0070 //TX_BF_LESSCUT_EBIN -555 0x0010 //TX_POSTBFB0 -556 0x0070 //TX_POSTBFB -557 0x00B0 //TX_POSTBFE -558 0x0E66 //TX_SPEECH_SNR_TH -559 0x0050 //TX_PB_MAX_PRI_SNR_TH -560 0x770A //TX_MAX_PRI_SNR_TH_L -561 0x0000 //TX_PFGAIN -562 0x0000 //TX_MAINTOREFR_TH -563 0x0000 //TX_SAM_MARK -564 0x0000 //TX_PB_RESRV_0 -565 0x0000 //TX_PB_RESRV_1 -566 0x0020 //TX_FDEQ_SUBNUM -567 0x4848 //TX_FDEQ_GAIN_0 -568 0x4848 //TX_FDEQ_GAIN_1 -569 0x4848 //TX_FDEQ_GAIN_2 -570 0x4848 //TX_FDEQ_GAIN_3 -571 0x4848 //TX_FDEQ_GAIN_4 -572 0x4848 //TX_FDEQ_GAIN_5 -573 0x4848 //TX_FDEQ_GAIN_6 -574 0x4848 //TX_FDEQ_GAIN_7 -575 0x4848 //TX_FDEQ_GAIN_8 -576 0x4853 //TX_FDEQ_GAIN_9 -577 0x5450 //TX_FDEQ_GAIN_10 -578 0x7465 //TX_FDEQ_GAIN_11 -579 0x807F //TX_FDEQ_GAIN_12 -580 0x82C4 //TX_FDEQ_GAIN_13 -581 0xC4C4 //TX_FDEQ_GAIN_14 -582 0xC4C4 //TX_FDEQ_GAIN_15 -583 0x4848 //TX_FDEQ_GAIN_16 -584 0x4848 //TX_FDEQ_GAIN_17 -585 0x4848 //TX_FDEQ_GAIN_18 -586 0x4848 //TX_FDEQ_GAIN_19 -587 0x4848 //TX_FDEQ_GAIN_20 -588 0x4848 //TX_FDEQ_GAIN_21 -589 0x4848 //TX_FDEQ_GAIN_22 -590 0x4848 //TX_FDEQ_GAIN_23 -591 0x0202 //TX_FDEQ_BIN_0 -592 0x0203 //TX_FDEQ_BIN_1 -593 0x0304 //TX_FDEQ_BIN_2 -594 0x0405 //TX_FDEQ_BIN_3 -595 0x0607 //TX_FDEQ_BIN_4 -596 0x0809 //TX_FDEQ_BIN_5 -597 0x0A0B //TX_FDEQ_BIN_6 -598 0x0C0D //TX_FDEQ_BIN_7 -599 0x0E0F //TX_FDEQ_BIN_8 -600 0x1011 //TX_FDEQ_BIN_9 -601 0x1214 //TX_FDEQ_BIN_10 -602 0x1618 //TX_FDEQ_BIN_11 -603 0x1C1C //TX_FDEQ_BIN_12 -604 0x2020 //TX_FDEQ_BIN_13 -605 0x2020 //TX_FDEQ_BIN_14 -606 0x2011 //TX_FDEQ_BIN_15 -607 0x0000 //TX_FDEQ_BIN_16 -608 0x0000 //TX_FDEQ_BIN_17 -609 0x0000 //TX_FDEQ_BIN_18 -610 0x0000 //TX_FDEQ_BIN_19 -611 0x0000 //TX_FDEQ_BIN_20 -612 0x0000 //TX_FDEQ_BIN_21 -613 0x0000 //TX_FDEQ_BIN_22 -614 0x0000 //TX_FDEQ_BIN_23 -615 0x0000 //TX_FDEQ_PADDING -616 0x0020 //TX_PREEQ_SUBNUM_MIC0 -617 0x4848 //TX_PREEQ_GAIN_MIC0_0 -618 0x4848 //TX_PREEQ_GAIN_MIC0_1 -619 0x4848 //TX_PREEQ_GAIN_MIC0_2 -620 0x4848 //TX_PREEQ_GAIN_MIC0_3 -621 0x4848 //TX_PREEQ_GAIN_MIC0_4 -622 0x4848 //TX_PREEQ_GAIN_MIC0_5 -623 0x4A4C //TX_PREEQ_GAIN_MIC0_6 -624 0x4E50 //TX_PREEQ_GAIN_MIC0_7 -625 0x5456 //TX_PREEQ_GAIN_MIC0_8 -626 0x585C //TX_PREEQ_GAIN_MIC0_9 -627 0x5C64 //TX_PREEQ_GAIN_MIC0_10 -628 0x7478 //TX_PREEQ_GAIN_MIC0_11 -629 0x705C //TX_PREEQ_GAIN_MIC0_12 -630 0x4838 //TX_PREEQ_GAIN_MIC0_13 -631 0x3C70 //TX_PREEQ_GAIN_MIC0_14 -632 0x4848 //TX_PREEQ_GAIN_MIC0_15 -633 0x4848 //TX_PREEQ_GAIN_MIC0_16 -634 0x4848 //TX_PREEQ_GAIN_MIC0_17 -635 0x4848 //TX_PREEQ_GAIN_MIC0_18 -636 0x4848 //TX_PREEQ_GAIN_MIC0_19 -637 0x4848 //TX_PREEQ_GAIN_MIC0_20 -638 0x4848 //TX_PREEQ_GAIN_MIC0_21 -639 0x4848 //TX_PREEQ_GAIN_MIC0_22 -640 0x4848 //TX_PREEQ_GAIN_MIC0_23 -641 0x0202 //TX_PREEQ_BIN_MIC0_0 -642 0x0203 //TX_PREEQ_BIN_MIC0_1 -643 0x0303 //TX_PREEQ_BIN_MIC0_2 -644 0x0304 //TX_PREEQ_BIN_MIC0_3 -645 0x0405 //TX_PREEQ_BIN_MIC0_4 -646 0x0506 //TX_PREEQ_BIN_MIC0_5 -647 0x0708 //TX_PREEQ_BIN_MIC0_6 -648 0x0909 //TX_PREEQ_BIN_MIC0_7 -649 0x090B //TX_PREEQ_BIN_MIC0_8 -650 0x0C10 //TX_PREEQ_BIN_MIC0_9 -651 0x1013 //TX_PREEQ_BIN_MIC0_10 -652 0x1414 //TX_PREEQ_BIN_MIC0_11 -653 0x1414 //TX_PREEQ_BIN_MIC0_12 -654 0x1C1E //TX_PREEQ_BIN_MIC0_13 -655 0x1E28 //TX_PREEQ_BIN_MIC0_14 -656 0x462C //TX_PREEQ_BIN_MIC0_15 -657 0x0000 //TX_PREEQ_BIN_MIC0_16 -658 0x0000 //TX_PREEQ_BIN_MIC0_17 -659 0x0000 //TX_PREEQ_BIN_MIC0_18 -660 0x0000 //TX_PREEQ_BIN_MIC0_19 -661 0x0000 //TX_PREEQ_BIN_MIC0_20 -662 0x0000 //TX_PREEQ_BIN_MIC0_21 -663 0x0000 //TX_PREEQ_BIN_MIC0_22 -664 0x0000 //TX_PREEQ_BIN_MIC0_23 -665 0x0030 //TX_PREEQ_SUBNUM_MIC1 -666 0x4848 //TX_PREEQ_GAIN_MIC1_0 -667 0x4848 //TX_PREEQ_GAIN_MIC1_1 -668 0x4848 //TX_PREEQ_GAIN_MIC1_2 -669 0x4848 //TX_PREEQ_GAIN_MIC1_3 -670 0x4848 //TX_PREEQ_GAIN_MIC1_4 -671 0x4848 //TX_PREEQ_GAIN_MIC1_5 -672 0x4848 //TX_PREEQ_GAIN_MIC1_6 -673 0x4848 //TX_PREEQ_GAIN_MIC1_7 -674 0x4848 //TX_PREEQ_GAIN_MIC1_8 -675 0x4848 //TX_PREEQ_GAIN_MIC1_9 -676 0x4848 //TX_PREEQ_GAIN_MIC1_10 -677 0x4848 //TX_PREEQ_GAIN_MIC1_11 -678 0x4848 //TX_PREEQ_GAIN_MIC1_12 -679 0x4848 //TX_PREEQ_GAIN_MIC1_13 -680 0x4848 //TX_PREEQ_GAIN_MIC1_14 -681 0x4848 //TX_PREEQ_GAIN_MIC1_15 -682 0x4848 //TX_PREEQ_GAIN_MIC1_16 -683 0x4848 //TX_PREEQ_GAIN_MIC1_17 -684 0x4848 //TX_PREEQ_GAIN_MIC1_18 -685 0x4848 //TX_PREEQ_GAIN_MIC1_19 -686 0x4848 //TX_PREEQ_GAIN_MIC1_20 -687 0x4848 //TX_PREEQ_GAIN_MIC1_21 -688 0x4848 //TX_PREEQ_GAIN_MIC1_22 -689 0x4848 //TX_PREEQ_GAIN_MIC1_23 -690 0x1812 //TX_PREEQ_BIN_MIC1_0 -691 0x0A0A //TX_PREEQ_BIN_MIC1_1 -692 0x0808 //TX_PREEQ_BIN_MIC1_2 -693 0x080A //TX_PREEQ_BIN_MIC1_3 -694 0x0B09 //TX_PREEQ_BIN_MIC1_4 -695 0x0A06 //TX_PREEQ_BIN_MIC1_5 -696 0x0606 //TX_PREEQ_BIN_MIC1_6 -697 0x0605 //TX_PREEQ_BIN_MIC1_7 -698 0x050A //TX_PREEQ_BIN_MIC1_8 -699 0x1505 //TX_PREEQ_BIN_MIC1_9 -700 0x0506 //TX_PREEQ_BIN_MIC1_10 -701 0x0615 //TX_PREEQ_BIN_MIC1_11 -702 0x1516 //TX_PREEQ_BIN_MIC1_12 -703 0x2021 //TX_PREEQ_BIN_MIC1_13 -704 0x2021 //TX_PREEQ_BIN_MIC1_14 -705 0x2021 //TX_PREEQ_BIN_MIC1_15 -706 0x0800 //TX_PREEQ_BIN_MIC1_16 -707 0x0000 //TX_PREEQ_BIN_MIC1_17 -708 0x0000 //TX_PREEQ_BIN_MIC1_18 -709 0x0000 //TX_PREEQ_BIN_MIC1_19 -710 0x0000 //TX_PREEQ_BIN_MIC1_20 -711 0x0000 //TX_PREEQ_BIN_MIC1_21 -712 0x0000 //TX_PREEQ_BIN_MIC1_22 -713 0x0000 //TX_PREEQ_BIN_MIC1_23 -714 0x0020 //TX_PREEQ_SUBNUM_MIC2 -715 0x4848 //TX_PREEQ_GAIN_MIC2_0 -716 0x4848 //TX_PREEQ_GAIN_MIC2_1 -717 0x4848 //TX_PREEQ_GAIN_MIC2_2 -718 0x4848 //TX_PREEQ_GAIN_MIC2_3 -719 0x4848 //TX_PREEQ_GAIN_MIC2_4 -720 0x4848 //TX_PREEQ_GAIN_MIC2_5 -721 0x4848 //TX_PREEQ_GAIN_MIC2_6 -722 0x4848 //TX_PREEQ_GAIN_MIC2_7 -723 0x4848 //TX_PREEQ_GAIN_MIC2_8 -724 0x4848 //TX_PREEQ_GAIN_MIC2_9 -725 0x4848 //TX_PREEQ_GAIN_MIC2_10 -726 0x4848 //TX_PREEQ_GAIN_MIC2_11 -727 0x4848 //TX_PREEQ_GAIN_MIC2_12 -728 0x4848 //TX_PREEQ_GAIN_MIC2_13 -729 0x4848 //TX_PREEQ_GAIN_MIC2_14 -730 0x4848 //TX_PREEQ_GAIN_MIC2_15 -731 0x4848 //TX_PREEQ_GAIN_MIC2_16 -732 0x4848 //TX_PREEQ_GAIN_MIC2_17 -733 0x4848 //TX_PREEQ_GAIN_MIC2_18 -734 0x4848 //TX_PREEQ_GAIN_MIC2_19 -735 0x4848 //TX_PREEQ_GAIN_MIC2_20 -736 0x4848 //TX_PREEQ_GAIN_MIC2_21 -737 0x4848 //TX_PREEQ_GAIN_MIC2_22 -738 0x4848 //TX_PREEQ_GAIN_MIC2_23 -739 0x0E10 //TX_PREEQ_BIN_MIC2_0 -740 0x1010 //TX_PREEQ_BIN_MIC2_1 -741 0x1010 //TX_PREEQ_BIN_MIC2_2 -742 0x1010 //TX_PREEQ_BIN_MIC2_3 -743 0x1010 //TX_PREEQ_BIN_MIC2_4 -744 0x1010 //TX_PREEQ_BIN_MIC2_5 -745 0x1010 //TX_PREEQ_BIN_MIC2_6 -746 0x1010 //TX_PREEQ_BIN_MIC2_7 -747 0x1010 //TX_PREEQ_BIN_MIC2_8 -748 0x1010 //TX_PREEQ_BIN_MIC2_9 -749 0x1010 //TX_PREEQ_BIN_MIC2_10 -750 0x1010 //TX_PREEQ_BIN_MIC2_11 -751 0x1010 //TX_PREEQ_BIN_MIC2_12 -752 0x1010 //TX_PREEQ_BIN_MIC2_13 -753 0x1010 //TX_PREEQ_BIN_MIC2_14 -754 0x0200 //TX_PREEQ_BIN_MIC2_15 -755 0x0000 //TX_PREEQ_BIN_MIC2_16 -756 0x0000 //TX_PREEQ_BIN_MIC2_17 -757 0x0000 //TX_PREEQ_BIN_MIC2_18 -758 0x0000 //TX_PREEQ_BIN_MIC2_19 -759 0x0000 //TX_PREEQ_BIN_MIC2_20 -760 0x0000 //TX_PREEQ_BIN_MIC2_21 -761 0x0000 //TX_PREEQ_BIN_MIC2_22 -762 0x0000 //TX_PREEQ_BIN_MIC2_23 -763 0x0006 //TX_MASKING_ABILITY -764 0x2000 //TX_NND_WEIGHT -765 0x0060 //TX_MIC_CALIBRATION_0 -766 0x0060 //TX_MIC_CALIBRATION_1 -767 0x0070 //TX_MIC_CALIBRATION_2 -768 0x0070 //TX_MIC_CALIBRATION_3 -769 0x0050 //TX_MIC_PWR_BIAS_0 -770 0x0040 //TX_MIC_PWR_BIAS_1 -771 0x0040 //TX_MIC_PWR_BIAS_2 -772 0x0040 //TX_MIC_PWR_BIAS_3 -773 0x0009 //TX_GAIN_LIMIT_0 -774 0x000F //TX_GAIN_LIMIT_1 -775 0x000F //TX_GAIN_LIMIT_2 -776 0x000F //TX_GAIN_LIMIT_3 -777 0x7F5B //TX_BVE_NOVAD0_ALPHADOWN -778 0x7FDE //TX_BVE_VAD0_ALPHAUP -779 0x7F3A //TX_BVE_VAD0_ALPHADOWN -780 0x2000 //TX_BVE_GAINWEIGHT_NOFEVADLI -781 0x7F5B //TX_BVE_FEVADLI_ALPHA -782 0x7F19 //TX_BVE_NOVAD0_ALPHAUP -783 0x0C00 //TX_TDDRC_ALPHA_UP_01 -784 0x0C00 //TX_TDDRC_ALPHA_UP_02 -785 0x0C00 //TX_TDDRC_ALPHA_UP_03 -786 0x0C00 //TX_TDDRC_ALPHA_UP_04 -787 0x7EB8 //TX_TDDRC_ALPHA_DWN_01 -788 0x7EB8 //TX_TDDRC_ALPHA_DWN_02 -789 0x7EB8 //TX_TDDRC_ALPHA_DWN_03 -790 0x7EB8 //TX_TDDRC_ALPHA_DWN_04 -791 0x7FFF //TX_TDDRC_TD_DRC_LIMIT -792 0x0800 //TX_TDDRC_POST_LIMIT_GAIN -793 0x0000 //TX_TDDRC_RESRV_0 -794 0x0000 //TX_TDDRC_RESRV_1 -795 0x0018 //TX_FDDRC_BAND_MARGIN_0 -796 0x0030 //TX_FDDRC_BAND_MARGIN_1 -797 0x0050 //TX_FDDRC_BAND_MARGIN_2 -798 0x0080 //TX_FDDRC_BAND_MARGIN_3 -799 0x0007 //TX_FDDRC_BLOCK_EXP -800 0x5000 //TX_FDDRC_THRD_2_0 -801 0x5000 //TX_FDDRC_THRD_2_1 -802 0x5000 //TX_FDDRC_THRD_2_2 -803 0x5000 //TX_FDDRC_THRD_2_3 -804 0x6400 //TX_FDDRC_THRD_3_0 -805 0x6400 //TX_FDDRC_THRD_3_1 -806 0x6400 //TX_FDDRC_THRD_3_2 -807 0x6400 //TX_FDDRC_THRD_3_3 -808 0x2000 //TX_FDDRC_SLANT_0_0 -809 0x2000 //TX_FDDRC_SLANT_0_1 -810 0x2000 //TX_FDDRC_SLANT_0_2 -811 0x2000 //TX_FDDRC_SLANT_0_3 -812 0x5333 //TX_FDDRC_SLANT_1_0 -813 0x5333 //TX_FDDRC_SLANT_1_1 -814 0x5333 //TX_FDDRC_SLANT_1_2 -815 0x5333 //TX_FDDRC_SLANT_1_3 -816 0x0010 //TX_DEADMIC_SILENCE_TH -817 0x0600 //TX_MIC_DEGRADE_TH -818 0x0078 //TX_DEADMIC_CNT -819 0x0078 //TX_MIC_DEGRADE_CNT -820 0x0000 //TX_FDDRC_RESRV_4 -821 0x0000 //TX_FDDRC_RESRV_5 -822 0x0000 //TX_FDDRC_RESRV_6 -823 0x7FFF //TX_KS_NOISEPASTE_FACTOR -824 0x0001 //TX_KS_CONFIG -825 0x7FFF //TX_KS_GAIN_MIN -826 0x0000 //TX_KS_RESRV_0 -827 0x0000 //TX_KS_RESRV_1 -828 0x0000 //TX_KS_RESRV_2 -829 0x7C00 //TX_LAMBDA_PKA_FP -830 0x2000 //TX_TPKA_FP -831 0x0080 //TX_MIN_G_FP -832 0x2000 //TX_MAX_G_FP -833 0x4848 //TX_FFP_FP_K_METAL -834 0x4000 //TX_A_POST_FLT_FP -835 0x0F5C //TX_RTO_OUTBEAM_TH -836 0x4CCD //TX_TPKA_FP_THD -837 0x0000 //TX_MAX_G_FP_BLK -838 0x0000 //TX_FFP_FADEIN -839 0x0000 //TX_FFP_FADEOUT -840 0x0000 //TX_WHISPERCTH -841 0x0000 //TX_WHISPERHOLDT -842 0x0000 //TX_WHISP_ENTHH -843 0x0000 //TX_WHISP_ENTHL -844 0x0000 //TX_WHISP_RTOTH -845 0x0000 //TX_WHISP_RTOTH2 -846 0x0096 //TX_MUTE_PERIOD -847 0x0000 //TX_FADE_IN_PERIOD -848 0x0100 //TX_FFP_RESRV_2 -849 0x0020 //TX_FFP_RESRV_3 -850 0x0000 //TX_FFP_RESRV_4 -851 0x0000 //TX_FFP_RESRV_5 -852 0x0000 //TX_FFP_RESRV_6 -853 0x0004 //TX_FILTINDX -854 0x0004 //TX_TDDRC_THRD_0 -855 0x0016 //TX_TDDRC_THRD_1 -856 0x1900 //TX_TDDRC_THRD_2 -857 0x1900 //TX_TDDRC_THRD_3 -858 0x3000 //TX_TDDRC_SLANT_0 -859 0x7B00 //TX_TDDRC_SLANT_1 -860 0x0C00 //TX_TDDRC_ALPHA_UP_00 -861 0x7EB8 //TX_TDDRC_ALPHA_DWN_00 -862 0x0000 //TX_TDDRC_HMNC_FLAG -863 0x199A //TX_TDDRC_HMNC_GAIN -864 0x0000 //TX_TDDRC_SMT_FLAG -865 0x0CCD //TX_TDDRC_SMT_W -866 0x0A98 //TX_TDDRC_DRC_GAIN -867 0x7FFF //TX_TDDRC_LMT_THRD -868 0x0000 //TX_TDDRC_LMT_ALPHA -869 0x0000 //TX_TFMASKLTH -870 0x0000 //TX_TFMASKLTHL -871 0x0CCD //TX_TFMASKHTH -872 0x0CCD //TX_TFMASKLTH_BINVAD -873 0xF333 //TX_TFMASKLTH_NS_EST -874 0x2CCD //TX_TFMASKLTH_DOA -875 0xECCD //TX_TFMASKTH_BLESSCUT -876 0x1000 //TX_B_LESSCUT_RTO_MASK -877 0x3800 //TX_SB_RHO_MEAN_TH_ABN -878 0x2000 //TX_B_POST_FLT_MASK -879 0x0000 //TX_B_POST_FLT_MASK1 -880 0x5333 //TX_GAIN_WIND_MASK -881 0x7FFF //TX_TFMASK_BFSTRICT_MUSIC -882 0x0000 //TX_TFMASK_BFSTRICT_NOMUSIC -883 0x7333 //TX_FASTNS_OUTIN_TH -884 0x0CCD //TX_FASTNS_TFMASK_TH -885 0x0CCD //TX_FASTNS_TFMASKBIN_TH1 -886 0x0CCD //TX_FASTNS_TFMASKBIN_TH2 -887 0x0CCD //TX_FASTNS_TFMASKBIN_TH3 -888 0x0028 //TX_FASTNS_ARSPC_TH -889 0xC000 //TX_FASTNS_MASK5_TH -890 0x4848 //TX_POSTSSA_MIN_G_VR_MASK -891 0x1000 //TX_A_LESSCUT_RTO_MASK -892 0x1770 //TX_FASTNS_NOISETH -893 0xC000 //TX_FASTNS_SSA_THLFL -894 0xC000 //TX_FASTNS_SSA_THHFL -895 0xCCCC //TX_FASTNS_SSA_THLFH -896 0xD999 //TX_FASTNS_SSA_THHFH -#RX -0 0x006C //RX_RECVFUNC_MODE_0 -1 0x0000 //RX_RECVFUNC_MODE_1 -2 0x0004 //RX_SAMPLINGFREQ_SIG -3 0x0004 //RX_SAMPLINGFREQ_PROC -4 0x000A //RX_FRAME_SZ -5 0x0000 //RX_DELAY_OPT -6 0x4000 //RX_TDDRC_ALPHA_UP_1 -7 0x4000 //RX_TDDRC_ALPHA_UP_2 -8 0x4000 //RX_TDDRC_ALPHA_UP_3 -9 0x4000 //RX_TDDRC_ALPHA_UP_4 -10 0x0800 //RX_PGA -11 0x7E56 //RX_A_HP -12 0x4000 //RX_B_PE -13 0x7800 //RX_THR_PITCH_DET_0 -14 0x7000 //RX_THR_PITCH_DET_1 -15 0x6000 //RX_THR_PITCH_DET_2 -16 0x0008 //RX_PITCH_BFR_LEN -17 0x0003 //RX_SBD_PITCH_DET -18 0x0100 //RX_PP_RESRV_0 -19 0x0020 //RX_PP_RESRV_1 -20 0x0400 //RX_N_SN_EST -21 0x000C //RX_N2_SN_EST -22 0x0014 //RX_NS_LVL_CTRL -23 0xF400 //RX_THR_SN_EST -24 0x7E00 //RX_LAMBDA_PFILT -25 0x00C8 //RX_FENS_RESRV_0 -26 0x0190 //RX_FENS_RESRV_1 -27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 -28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 -29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 -30 0x0002 //RX_EXTRA_NS_L -31 0x0800 //RX_EXTRA_NS_A -32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 -33 0x7FFF //RX_TDDRC_LIMITER_THRD -34 0x0800 //RX_TDDRC_LIMITER_GAIN -35 0x199A //RX_A_POST_FLT -36 0x0000 //RX_LMT_THRD -37 0x4000 //RX_LMT_ALPHA -38 0x0020 //RX_FDEQ_SUBNUM -39 0x4848 //RX_FDEQ_GAIN_0 -40 0x4848 //RX_FDEQ_GAIN_1 -41 0x4848 //RX_FDEQ_GAIN_2 -42 0x4850 //RX_FDEQ_GAIN_3 -43 0x4848 //RX_FDEQ_GAIN_4 -44 0x4848 //RX_FDEQ_GAIN_5 -45 0x4568 //RX_FDEQ_GAIN_6 -46 0x485C //RX_FDEQ_GAIN_7 -47 0x5C60 //RX_FDEQ_GAIN_8 -48 0x685C //RX_FDEQ_GAIN_9 -49 0x5648 //RX_FDEQ_GAIN_10 -50 0x484C //RX_FDEQ_GAIN_11 -51 0x706C //RX_FDEQ_GAIN_12 -52 0x7070 //RX_FDEQ_GAIN_13 -53 0x6868 //RX_FDEQ_GAIN_14 -54 0x6060 //RX_FDEQ_GAIN_15 -55 0x4848 //RX_FDEQ_GAIN_16 -56 0x4848 //RX_FDEQ_GAIN_17 -57 0x4848 //RX_FDEQ_GAIN_18 -58 0x4848 //RX_FDEQ_GAIN_19 -59 0x4848 //RX_FDEQ_GAIN_20 -60 0x4848 //RX_FDEQ_GAIN_21 -61 0x4848 //RX_FDEQ_GAIN_22 -62 0x4848 //RX_FDEQ_GAIN_23 -63 0x0202 //RX_FDEQ_BIN_0 -64 0x0203 //RX_FDEQ_BIN_1 -65 0x0303 //RX_FDEQ_BIN_2 -66 0x0402 //RX_FDEQ_BIN_3 -67 0x0504 //RX_FDEQ_BIN_4 -68 0x0209 //RX_FDEQ_BIN_5 -69 0x0808 //RX_FDEQ_BIN_6 -70 0x090A //RX_FDEQ_BIN_7 -71 0x0B0C //RX_FDEQ_BIN_8 -72 0x0D0E //RX_FDEQ_BIN_9 -73 0x1013 //RX_FDEQ_BIN_10 -74 0x1719 //RX_FDEQ_BIN_11 -75 0x1B1E //RX_FDEQ_BIN_12 -76 0x1E1E //RX_FDEQ_BIN_13 -77 0x1E28 //RX_FDEQ_BIN_14 -78 0x282C //RX_FDEQ_BIN_15 -79 0x0000 //RX_FDEQ_BIN_16 -80 0x0000 //RX_FDEQ_BIN_17 -81 0x0000 //RX_FDEQ_BIN_18 -82 0x0000 //RX_FDEQ_BIN_19 -83 0x0000 //RX_FDEQ_BIN_20 -84 0x0000 //RX_FDEQ_BIN_21 -85 0x0000 //RX_FDEQ_BIN_22 -86 0x0000 //RX_FDEQ_BIN_23 -87 0x4000 //RX_FDEQ_RESRV_0 -88 0x0320 //RX_FDEQ_RESRV_1 -89 0x0018 //RX_FDDRC_BAND_MARGIN_0 -90 0x0030 //RX_FDDRC_BAND_MARGIN_1 -91 0x0050 //RX_FDDRC_BAND_MARGIN_2 -92 0x0080 //RX_FDDRC_BAND_MARGIN_3 -93 0x0004 //RX_FDDRC_BLOCK_EXP -94 0x5000 //RX_FDDRC_THRD_2_0 -95 0x5000 //RX_FDDRC_THRD_2_1 -96 0x2000 //RX_FDDRC_THRD_2_2 -97 0x5000 //RX_FDDRC_THRD_2_3 -98 0x6400 //RX_FDDRC_THRD_3_0 -99 0x6400 //RX_FDDRC_THRD_3_1 -100 0x2000 //RX_FDDRC_THRD_3_2 -101 0x5000 //RX_FDDRC_THRD_3_3 -102 0x4000 //RX_FDDRC_SLANT_0_0 -103 0x4000 //RX_FDDRC_SLANT_0_1 -104 0x4000 //RX_FDDRC_SLANT_0_2 -105 0x4000 //RX_FDDRC_SLANT_0_3 -106 0x7FFF //RX_FDDRC_SLANT_1_0 -107 0x7FFF //RX_FDDRC_SLANT_1_1 -108 0x7FFF //RX_FDDRC_SLANT_1_2 -109 0x7FFF //RX_FDDRC_SLANT_1_3 -110 0x0000 //RX_FDDRC_RESRV_0 -111 0x0002 //RX_FILTINDX -112 0x0001 //RX_TDDRC_THRD_0 -113 0x0002 //RX_TDDRC_THRD_1 -114 0x1800 //RX_TDDRC_THRD_2 -115 0x1800 //RX_TDDRC_THRD_3 -116 0x6000 //RX_TDDRC_SLANT_0 -117 0x6E00 //RX_TDDRC_SLANT_1 -118 0x4000 //RX_TDDRC_ALPHA_UP_0 -119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 -120 0x0000 //RX_TDDRC_HMNC_FLAG -121 0x199A //RX_TDDRC_HMNC_GAIN -122 0x0001 //RX_TDDRC_SMT_FLAG -123 0x0CCD //RX_TDDRC_SMT_W -124 0x02D2 //RX_TDDRC_DRC_GAIN -125 0x7C00 //RX_LAMBDA_PKA_FP -126 0x2000 //RX_TPKA_FP -127 0x2000 //RX_MIN_G_FP -128 0x0080 //RX_MAX_G_FP -129 0x0013 //RX_SPK_VOL -130 0x0000 //RX_VOL_RESRV_0 -131 0x0000 //RX_MAXLEVEL_CNG -132 0x3000 //RX_BWE_UV_TH -133 0x3000 //RX_BWE_UV_TH2 -134 0x1800 //RX_BWE_UV_TH3 -135 0x1000 //RX_BWE_V_TH -136 0x04CD //RX_BWE_GAIN1_V_TH1 -137 0x0F33 //RX_BWE_GAIN1_V_TH2 -138 0x7333 //RX_BWE_UV_EQ -139 0x199A //RX_BWE_V_EQ -140 0x7333 //RX_BWE_TONE_TH -141 0x0004 //RX_BWE_UV_HOLD_T -142 0x6CCD //RX_BWE_GAIN2_ALPHA -143 0x799A //RX_BWE_GAIN3_ALPHA -144 0x001E //RX_BWE_CUTOFF -145 0x3000 //RX_BWE_GAINFILL -146 0x3200 //RX_BWE_MAXTH_TONE -147 0x2000 //RX_BWE_EQ_0 -148 0x2000 //RX_BWE_EQ_1 -149 0x2000 //RX_BWE_EQ_2 -150 0x2000 //RX_BWE_EQ_3 -151 0x2000 //RX_BWE_EQ_4 -152 0x2000 //RX_BWE_EQ_5 -153 0x2000 //RX_BWE_EQ_6 -154 0x0000 //RX_BWE_RESRV_0 -155 0x0000 //RX_BWE_RESRV_1 -156 0x0000 //RX_BWE_RESRV_2 -#VOL 0 -6 0x4000 //RX_TDDRC_ALPHA_UP_1 -7 0x4000 //RX_TDDRC_ALPHA_UP_2 -8 0x4000 //RX_TDDRC_ALPHA_UP_3 -9 0x4000 //RX_TDDRC_ALPHA_UP_4 -27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 -28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 -29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 -32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 -33 0x7FFF //RX_TDDRC_LIMITER_THRD -34 0x0800 //RX_TDDRC_LIMITER_GAIN -112 0x0001 //RX_TDDRC_THRD_0 -113 0x0002 //RX_TDDRC_THRD_1 -114 0x1800 //RX_TDDRC_THRD_2 -115 0x1800 //RX_TDDRC_THRD_3 -116 0x6000 //RX_TDDRC_SLANT_0 -117 0x6E00 //RX_TDDRC_SLANT_1 -118 0x4000 //RX_TDDRC_ALPHA_UP_0 -119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 -120 0x0000 //RX_TDDRC_HMNC_FLAG -121 0x199A //RX_TDDRC_HMNC_GAIN -122 0x0001 //RX_TDDRC_SMT_FLAG -123 0x0CCD //RX_TDDRC_SMT_W -124 0x02D2 //RX_TDDRC_DRC_GAIN -38 0x0020 //RX_FDEQ_SUBNUM -39 0x4848 //RX_FDEQ_GAIN_0 -40 0x4848 //RX_FDEQ_GAIN_1 -41 0x4848 //RX_FDEQ_GAIN_2 -42 0x4850 //RX_FDEQ_GAIN_3 -43 0x4848 //RX_FDEQ_GAIN_4 -44 0x4848 //RX_FDEQ_GAIN_5 -45 0x4568 //RX_FDEQ_GAIN_6 -46 0x485C //RX_FDEQ_GAIN_7 -47 0x5C60 //RX_FDEQ_GAIN_8 -48 0x685C //RX_FDEQ_GAIN_9 -49 0x5648 //RX_FDEQ_GAIN_10 -50 0x484C //RX_FDEQ_GAIN_11 -51 0x706C //RX_FDEQ_GAIN_12 -52 0x7070 //RX_FDEQ_GAIN_13 -53 0x6868 //RX_FDEQ_GAIN_14 -54 0x6060 //RX_FDEQ_GAIN_15 -55 0x4848 //RX_FDEQ_GAIN_16 -56 0x4848 //RX_FDEQ_GAIN_17 -57 0x4848 //RX_FDEQ_GAIN_18 -58 0x4848 //RX_FDEQ_GAIN_19 -59 0x4848 //RX_FDEQ_GAIN_20 -60 0x4848 //RX_FDEQ_GAIN_21 -61 0x4848 //RX_FDEQ_GAIN_22 -62 0x4848 //RX_FDEQ_GAIN_23 -63 0x0202 //RX_FDEQ_BIN_0 -64 0x0203 //RX_FDEQ_BIN_1 -65 0x0303 //RX_FDEQ_BIN_2 -66 0x0402 //RX_FDEQ_BIN_3 -67 0x0504 //RX_FDEQ_BIN_4 -68 0x0209 //RX_FDEQ_BIN_5 -69 0x0808 //RX_FDEQ_BIN_6 -70 0x090A //RX_FDEQ_BIN_7 -71 0x0B0C //RX_FDEQ_BIN_8 -72 0x0D0E //RX_FDEQ_BIN_9 -73 0x1013 //RX_FDEQ_BIN_10 -74 0x1719 //RX_FDEQ_BIN_11 -75 0x1B1E //RX_FDEQ_BIN_12 -76 0x1E1E //RX_FDEQ_BIN_13 -77 0x1E28 //RX_FDEQ_BIN_14 -78 0x282C //RX_FDEQ_BIN_15 -79 0x0000 //RX_FDEQ_BIN_16 -80 0x0000 //RX_FDEQ_BIN_17 -81 0x0000 //RX_FDEQ_BIN_18 -82 0x0000 //RX_FDEQ_BIN_19 -83 0x0000 //RX_FDEQ_BIN_20 -84 0x0000 //RX_FDEQ_BIN_21 -85 0x0000 //RX_FDEQ_BIN_22 -86 0x0000 //RX_FDEQ_BIN_23 -87 0x4000 //RX_FDEQ_RESRV_0 -88 0x0320 //RX_FDEQ_RESRV_1 -89 0x0018 //RX_FDDRC_BAND_MARGIN_0 -90 0x0030 //RX_FDDRC_BAND_MARGIN_1 -91 0x0050 //RX_FDDRC_BAND_MARGIN_2 -92 0x0080 //RX_FDDRC_BAND_MARGIN_3 -93 0x0004 //RX_FDDRC_BLOCK_EXP -94 0x5000 //RX_FDDRC_THRD_2_0 -95 0x5000 //RX_FDDRC_THRD_2_1 -96 0x2000 //RX_FDDRC_THRD_2_2 -97 0x5000 //RX_FDDRC_THRD_2_3 -98 0x6400 //RX_FDDRC_THRD_3_0 -99 0x6400 //RX_FDDRC_THRD_3_1 -100 0x2000 //RX_FDDRC_THRD_3_2 -101 0x5000 //RX_FDDRC_THRD_3_3 -102 0x4000 //RX_FDDRC_SLANT_0_0 -103 0x4000 //RX_FDDRC_SLANT_0_1 -104 0x4000 //RX_FDDRC_SLANT_0_2 -105 0x4000 //RX_FDDRC_SLANT_0_3 -106 0x7FFF //RX_FDDRC_SLANT_1_0 -107 0x7FFF //RX_FDDRC_SLANT_1_1 -108 0x7FFF //RX_FDDRC_SLANT_1_2 -109 0x7FFF //RX_FDDRC_SLANT_1_3 -110 0x0000 //RX_FDDRC_RESRV_0 -129 0x0013 //RX_SPK_VOL -130 0x0000 //RX_VOL_RESRV_0 -#VOL 1 -6 0x4000 //RX_TDDRC_ALPHA_UP_1 -7 0x4000 //RX_TDDRC_ALPHA_UP_2 -8 0x4000 //RX_TDDRC_ALPHA_UP_3 -9 0x4000 //RX_TDDRC_ALPHA_UP_4 -27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 -28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 -29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 -32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 -33 0x7FFF //RX_TDDRC_LIMITER_THRD -34 0x0800 //RX_TDDRC_LIMITER_GAIN -112 0x0001 //RX_TDDRC_THRD_0 -113 0x0002 //RX_TDDRC_THRD_1 -114 0x1800 //RX_TDDRC_THRD_2 -115 0x1800 //RX_TDDRC_THRD_3 -116 0x6000 //RX_TDDRC_SLANT_0 -117 0x6E00 //RX_TDDRC_SLANT_1 -118 0x4000 //RX_TDDRC_ALPHA_UP_0 -119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 -120 0x0000 //RX_TDDRC_HMNC_FLAG -121 0x199A //RX_TDDRC_HMNC_GAIN -122 0x0001 //RX_TDDRC_SMT_FLAG -123 0x0CCD //RX_TDDRC_SMT_W -124 0x02D2 //RX_TDDRC_DRC_GAIN -38 0x0020 //RX_FDEQ_SUBNUM -39 0x4848 //RX_FDEQ_GAIN_0 -40 0x4848 //RX_FDEQ_GAIN_1 -41 0x4848 //RX_FDEQ_GAIN_2 -42 0x4850 //RX_FDEQ_GAIN_3 -43 0x4848 //RX_FDEQ_GAIN_4 -44 0x4848 //RX_FDEQ_GAIN_5 -45 0x4568 //RX_FDEQ_GAIN_6 -46 0x485C //RX_FDEQ_GAIN_7 -47 0x5C60 //RX_FDEQ_GAIN_8 -48 0x685C //RX_FDEQ_GAIN_9 -49 0x5648 //RX_FDEQ_GAIN_10 -50 0x484C //RX_FDEQ_GAIN_11 -51 0x706C //RX_FDEQ_GAIN_12 -52 0x7070 //RX_FDEQ_GAIN_13 -53 0x6868 //RX_FDEQ_GAIN_14 -54 0x6060 //RX_FDEQ_GAIN_15 -55 0x4848 //RX_FDEQ_GAIN_16 -56 0x4848 //RX_FDEQ_GAIN_17 -57 0x4848 //RX_FDEQ_GAIN_18 -58 0x4848 //RX_FDEQ_GAIN_19 -59 0x4848 //RX_FDEQ_GAIN_20 -60 0x4848 //RX_FDEQ_GAIN_21 -61 0x4848 //RX_FDEQ_GAIN_22 -62 0x4848 //RX_FDEQ_GAIN_23 -63 0x0202 //RX_FDEQ_BIN_0 -64 0x0203 //RX_FDEQ_BIN_1 -65 0x0303 //RX_FDEQ_BIN_2 -66 0x0402 //RX_FDEQ_BIN_3 -67 0x0504 //RX_FDEQ_BIN_4 -68 0x0209 //RX_FDEQ_BIN_5 -69 0x0808 //RX_FDEQ_BIN_6 -70 0x090A //RX_FDEQ_BIN_7 -71 0x0B0C //RX_FDEQ_BIN_8 -72 0x0D0E //RX_FDEQ_BIN_9 -73 0x1013 //RX_FDEQ_BIN_10 -74 0x1719 //RX_FDEQ_BIN_11 -75 0x1B1E //RX_FDEQ_BIN_12 -76 0x1E1E //RX_FDEQ_BIN_13 -77 0x1E28 //RX_FDEQ_BIN_14 -78 0x282C //RX_FDEQ_BIN_15 -79 0x0000 //RX_FDEQ_BIN_16 -80 0x0000 //RX_FDEQ_BIN_17 -81 0x0000 //RX_FDEQ_BIN_18 -82 0x0000 //RX_FDEQ_BIN_19 -83 0x0000 //RX_FDEQ_BIN_20 -84 0x0000 //RX_FDEQ_BIN_21 -85 0x0000 //RX_FDEQ_BIN_22 -86 0x0000 //RX_FDEQ_BIN_23 -87 0x4000 //RX_FDEQ_RESRV_0 -88 0x0320 //RX_FDEQ_RESRV_1 -89 0x0018 //RX_FDDRC_BAND_MARGIN_0 -90 0x0030 //RX_FDDRC_BAND_MARGIN_1 -91 0x0050 //RX_FDDRC_BAND_MARGIN_2 -92 0x0080 //RX_FDDRC_BAND_MARGIN_3 -93 0x0004 //RX_FDDRC_BLOCK_EXP -94 0x5000 //RX_FDDRC_THRD_2_0 -95 0x5000 //RX_FDDRC_THRD_2_1 -96 0x2000 //RX_FDDRC_THRD_2_2 -97 0x5000 //RX_FDDRC_THRD_2_3 -98 0x6400 //RX_FDDRC_THRD_3_0 -99 0x6400 //RX_FDDRC_THRD_3_1 -100 0x2000 //RX_FDDRC_THRD_3_2 -101 0x5000 //RX_FDDRC_THRD_3_3 -102 0x4000 //RX_FDDRC_SLANT_0_0 -103 0x4000 //RX_FDDRC_SLANT_0_1 -104 0x4000 //RX_FDDRC_SLANT_0_2 -105 0x4000 //RX_FDDRC_SLANT_0_3 -106 0x7FFF //RX_FDDRC_SLANT_1_0 -107 0x7FFF //RX_FDDRC_SLANT_1_1 -108 0x7FFF //RX_FDDRC_SLANT_1_2 -109 0x7FFF //RX_FDDRC_SLANT_1_3 -110 0x0000 //RX_FDDRC_RESRV_0 -129 0x001C //RX_SPK_VOL -130 0x0000 //RX_VOL_RESRV_0 -#VOL 2 -6 0x4000 //RX_TDDRC_ALPHA_UP_1 -7 0x4000 //RX_TDDRC_ALPHA_UP_2 -8 0x4000 //RX_TDDRC_ALPHA_UP_3 -9 0x4000 //RX_TDDRC_ALPHA_UP_4 -27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 -28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 -29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 -32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 -33 0x7FFF //RX_TDDRC_LIMITER_THRD -34 0x0800 //RX_TDDRC_LIMITER_GAIN -112 0x0001 //RX_TDDRC_THRD_0 -113 0x0002 //RX_TDDRC_THRD_1 -114 0x1800 //RX_TDDRC_THRD_2 -115 0x1800 //RX_TDDRC_THRD_3 -116 0x6000 //RX_TDDRC_SLANT_0 -117 0x6E00 //RX_TDDRC_SLANT_1 -118 0x4000 //RX_TDDRC_ALPHA_UP_0 -119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 -120 0x0000 //RX_TDDRC_HMNC_FLAG -121 0x199A //RX_TDDRC_HMNC_GAIN -122 0x0001 //RX_TDDRC_SMT_FLAG -123 0x0CCD //RX_TDDRC_SMT_W -124 0x02D2 //RX_TDDRC_DRC_GAIN -38 0x0020 //RX_FDEQ_SUBNUM -39 0x4848 //RX_FDEQ_GAIN_0 -40 0x4848 //RX_FDEQ_GAIN_1 -41 0x4848 //RX_FDEQ_GAIN_2 -42 0x4850 //RX_FDEQ_GAIN_3 -43 0x4848 //RX_FDEQ_GAIN_4 -44 0x4848 //RX_FDEQ_GAIN_5 -45 0x4568 //RX_FDEQ_GAIN_6 -46 0x485C //RX_FDEQ_GAIN_7 -47 0x5C60 //RX_FDEQ_GAIN_8 -48 0x685C //RX_FDEQ_GAIN_9 -49 0x5648 //RX_FDEQ_GAIN_10 -50 0x484C //RX_FDEQ_GAIN_11 -51 0x706C //RX_FDEQ_GAIN_12 -52 0x7070 //RX_FDEQ_GAIN_13 -53 0x6868 //RX_FDEQ_GAIN_14 -54 0x6060 //RX_FDEQ_GAIN_15 -55 0x4848 //RX_FDEQ_GAIN_16 -56 0x4848 //RX_FDEQ_GAIN_17 -57 0x4848 //RX_FDEQ_GAIN_18 -58 0x4848 //RX_FDEQ_GAIN_19 -59 0x4848 //RX_FDEQ_GAIN_20 -60 0x4848 //RX_FDEQ_GAIN_21 -61 0x4848 //RX_FDEQ_GAIN_22 -62 0x4848 //RX_FDEQ_GAIN_23 -63 0x0202 //RX_FDEQ_BIN_0 -64 0x0203 //RX_FDEQ_BIN_1 -65 0x0303 //RX_FDEQ_BIN_2 -66 0x0402 //RX_FDEQ_BIN_3 -67 0x0504 //RX_FDEQ_BIN_4 -68 0x0209 //RX_FDEQ_BIN_5 -69 0x0808 //RX_FDEQ_BIN_6 -70 0x090A //RX_FDEQ_BIN_7 -71 0x0B0C //RX_FDEQ_BIN_8 -72 0x0D0E //RX_FDEQ_BIN_9 -73 0x1013 //RX_FDEQ_BIN_10 -74 0x1719 //RX_FDEQ_BIN_11 -75 0x1B1E //RX_FDEQ_BIN_12 -76 0x1E1E //RX_FDEQ_BIN_13 -77 0x1E28 //RX_FDEQ_BIN_14 -78 0x282C //RX_FDEQ_BIN_15 -79 0x0000 //RX_FDEQ_BIN_16 -80 0x0000 //RX_FDEQ_BIN_17 -81 0x0000 //RX_FDEQ_BIN_18 -82 0x0000 //RX_FDEQ_BIN_19 -83 0x0000 //RX_FDEQ_BIN_20 -84 0x0000 //RX_FDEQ_BIN_21 -85 0x0000 //RX_FDEQ_BIN_22 -86 0x0000 //RX_FDEQ_BIN_23 -87 0x4000 //RX_FDEQ_RESRV_0 -88 0x0320 //RX_FDEQ_RESRV_1 -89 0x0018 //RX_FDDRC_BAND_MARGIN_0 -90 0x0030 //RX_FDDRC_BAND_MARGIN_1 -91 0x0050 //RX_FDDRC_BAND_MARGIN_2 -92 0x0080 //RX_FDDRC_BAND_MARGIN_3 -93 0x0004 //RX_FDDRC_BLOCK_EXP -94 0x5000 //RX_FDDRC_THRD_2_0 -95 0x5000 //RX_FDDRC_THRD_2_1 -96 0x2000 //RX_FDDRC_THRD_2_2 -97 0x5000 //RX_FDDRC_THRD_2_3 -98 0x6400 //RX_FDDRC_THRD_3_0 -99 0x6400 //RX_FDDRC_THRD_3_1 -100 0x2000 //RX_FDDRC_THRD_3_2 -101 0x5000 //RX_FDDRC_THRD_3_3 -102 0x4000 //RX_FDDRC_SLANT_0_0 -103 0x4000 //RX_FDDRC_SLANT_0_1 -104 0x4000 //RX_FDDRC_SLANT_0_2 -105 0x4000 //RX_FDDRC_SLANT_0_3 -106 0x7FFF //RX_FDDRC_SLANT_1_0 -107 0x7FFF //RX_FDDRC_SLANT_1_1 -108 0x7FFF //RX_FDDRC_SLANT_1_2 -109 0x7FFF //RX_FDDRC_SLANT_1_3 -110 0x0000 //RX_FDDRC_RESRV_0 -129 0x0028 //RX_SPK_VOL -130 0x0000 //RX_VOL_RESRV_0 -#VOL 3 -6 0x4000 //RX_TDDRC_ALPHA_UP_1 -7 0x4000 //RX_TDDRC_ALPHA_UP_2 -8 0x4000 //RX_TDDRC_ALPHA_UP_3 -9 0x4000 //RX_TDDRC_ALPHA_UP_4 -27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 -28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 -29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 -32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 -33 0x7FFF //RX_TDDRC_LIMITER_THRD -34 0x0800 //RX_TDDRC_LIMITER_GAIN -112 0x0001 //RX_TDDRC_THRD_0 -113 0x0002 //RX_TDDRC_THRD_1 -114 0x1800 //RX_TDDRC_THRD_2 -115 0x1800 //RX_TDDRC_THRD_3 -116 0x6000 //RX_TDDRC_SLANT_0 -117 0x6E00 //RX_TDDRC_SLANT_1 -118 0x4000 //RX_TDDRC_ALPHA_UP_0 -119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 -120 0x0000 //RX_TDDRC_HMNC_FLAG -121 0x199A //RX_TDDRC_HMNC_GAIN -122 0x0001 //RX_TDDRC_SMT_FLAG -123 0x0CCD //RX_TDDRC_SMT_W -124 0x02D2 //RX_TDDRC_DRC_GAIN -38 0x0020 //RX_FDEQ_SUBNUM -39 0x4848 //RX_FDEQ_GAIN_0 -40 0x4848 //RX_FDEQ_GAIN_1 -41 0x4848 //RX_FDEQ_GAIN_2 -42 0x4850 //RX_FDEQ_GAIN_3 -43 0x4848 //RX_FDEQ_GAIN_4 -44 0x4848 //RX_FDEQ_GAIN_5 -45 0x4568 //RX_FDEQ_GAIN_6 -46 0x485C //RX_FDEQ_GAIN_7 -47 0x5C60 //RX_FDEQ_GAIN_8 -48 0x685C //RX_FDEQ_GAIN_9 -49 0x5648 //RX_FDEQ_GAIN_10 -50 0x484C //RX_FDEQ_GAIN_11 -51 0x706C //RX_FDEQ_GAIN_12 -52 0x7070 //RX_FDEQ_GAIN_13 -53 0x6868 //RX_FDEQ_GAIN_14 -54 0x6060 //RX_FDEQ_GAIN_15 -55 0x4848 //RX_FDEQ_GAIN_16 -56 0x4848 //RX_FDEQ_GAIN_17 -57 0x4848 //RX_FDEQ_GAIN_18 -58 0x4848 //RX_FDEQ_GAIN_19 -59 0x4848 //RX_FDEQ_GAIN_20 -60 0x4848 //RX_FDEQ_GAIN_21 -61 0x4848 //RX_FDEQ_GAIN_22 -62 0x4848 //RX_FDEQ_GAIN_23 -63 0x0202 //RX_FDEQ_BIN_0 -64 0x0203 //RX_FDEQ_BIN_1 -65 0x0303 //RX_FDEQ_BIN_2 -66 0x0402 //RX_FDEQ_BIN_3 -67 0x0504 //RX_FDEQ_BIN_4 -68 0x0209 //RX_FDEQ_BIN_5 -69 0x0808 //RX_FDEQ_BIN_6 -70 0x090A //RX_FDEQ_BIN_7 -71 0x0B0C //RX_FDEQ_BIN_8 -72 0x0D0E //RX_FDEQ_BIN_9 -73 0x1013 //RX_FDEQ_BIN_10 -74 0x1719 //RX_FDEQ_BIN_11 -75 0x1B1E //RX_FDEQ_BIN_12 -76 0x1E1E //RX_FDEQ_BIN_13 -77 0x1E28 //RX_FDEQ_BIN_14 -78 0x282C //RX_FDEQ_BIN_15 -79 0x0000 //RX_FDEQ_BIN_16 -80 0x0000 //RX_FDEQ_BIN_17 -81 0x0000 //RX_FDEQ_BIN_18 -82 0x0000 //RX_FDEQ_BIN_19 -83 0x0000 //RX_FDEQ_BIN_20 -84 0x0000 //RX_FDEQ_BIN_21 -85 0x0000 //RX_FDEQ_BIN_22 -86 0x0000 //RX_FDEQ_BIN_23 -87 0x4000 //RX_FDEQ_RESRV_0 -88 0x0320 //RX_FDEQ_RESRV_1 -89 0x0018 //RX_FDDRC_BAND_MARGIN_0 -90 0x0030 //RX_FDDRC_BAND_MARGIN_1 -91 0x0050 //RX_FDDRC_BAND_MARGIN_2 -92 0x0080 //RX_FDDRC_BAND_MARGIN_3 -93 0x0004 //RX_FDDRC_BLOCK_EXP -94 0x5000 //RX_FDDRC_THRD_2_0 -95 0x5000 //RX_FDDRC_THRD_2_1 -96 0x2000 //RX_FDDRC_THRD_2_2 -97 0x5000 //RX_FDDRC_THRD_2_3 -98 0x6400 //RX_FDDRC_THRD_3_0 -99 0x6400 //RX_FDDRC_THRD_3_1 -100 0x2000 //RX_FDDRC_THRD_3_2 -101 0x5000 //RX_FDDRC_THRD_3_3 -102 0x4000 //RX_FDDRC_SLANT_0_0 -103 0x4000 //RX_FDDRC_SLANT_0_1 -104 0x4000 //RX_FDDRC_SLANT_0_2 -105 0x4000 //RX_FDDRC_SLANT_0_3 -106 0x7FFF //RX_FDDRC_SLANT_1_0 -107 0x7FFF //RX_FDDRC_SLANT_1_1 -108 0x7FFF //RX_FDDRC_SLANT_1_2 -109 0x7FFF //RX_FDDRC_SLANT_1_3 -110 0x0000 //RX_FDDRC_RESRV_0 -129 0x0035 //RX_SPK_VOL -130 0x0000 //RX_VOL_RESRV_0 -#VOL 4 -6 0x4000 //RX_TDDRC_ALPHA_UP_1 -7 0x4000 //RX_TDDRC_ALPHA_UP_2 -8 0x4000 //RX_TDDRC_ALPHA_UP_3 -9 0x4000 //RX_TDDRC_ALPHA_UP_4 -27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 -28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 -29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 -32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 -33 0x7FFF //RX_TDDRC_LIMITER_THRD -34 0x0800 //RX_TDDRC_LIMITER_GAIN -112 0x0001 //RX_TDDRC_THRD_0 -113 0x0002 //RX_TDDRC_THRD_1 -114 0x1800 //RX_TDDRC_THRD_2 -115 0x1800 //RX_TDDRC_THRD_3 -116 0x6000 //RX_TDDRC_SLANT_0 -117 0x6E00 //RX_TDDRC_SLANT_1 -118 0x4000 //RX_TDDRC_ALPHA_UP_0 -119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 -120 0x0000 //RX_TDDRC_HMNC_FLAG -121 0x199A //RX_TDDRC_HMNC_GAIN -122 0x0001 //RX_TDDRC_SMT_FLAG -123 0x0CCD //RX_TDDRC_SMT_W -124 0x02D2 //RX_TDDRC_DRC_GAIN -38 0x0020 //RX_FDEQ_SUBNUM -39 0x4C4C //RX_FDEQ_GAIN_0 -40 0x4C4C //RX_FDEQ_GAIN_1 -41 0x4C48 //RX_FDEQ_GAIN_2 -42 0x4870 //RX_FDEQ_GAIN_3 -43 0x4848 //RX_FDEQ_GAIN_4 -44 0x4848 //RX_FDEQ_GAIN_5 -45 0x4568 //RX_FDEQ_GAIN_6 -46 0x485C //RX_FDEQ_GAIN_7 -47 0x5C60 //RX_FDEQ_GAIN_8 -48 0x685C //RX_FDEQ_GAIN_9 -49 0x5648 //RX_FDEQ_GAIN_10 -50 0x484C //RX_FDEQ_GAIN_11 -51 0x706C //RX_FDEQ_GAIN_12 -52 0x7070 //RX_FDEQ_GAIN_13 -53 0x6868 //RX_FDEQ_GAIN_14 -54 0x6060 //RX_FDEQ_GAIN_15 -55 0x4848 //RX_FDEQ_GAIN_16 -56 0x4848 //RX_FDEQ_GAIN_17 -57 0x4848 //RX_FDEQ_GAIN_18 -58 0x4848 //RX_FDEQ_GAIN_19 -59 0x4848 //RX_FDEQ_GAIN_20 -60 0x4848 //RX_FDEQ_GAIN_21 -61 0x4848 //RX_FDEQ_GAIN_22 -62 0x4848 //RX_FDEQ_GAIN_23 -63 0x0202 //RX_FDEQ_BIN_0 -64 0x0203 //RX_FDEQ_BIN_1 -65 0x0303 //RX_FDEQ_BIN_2 -66 0x0402 //RX_FDEQ_BIN_3 -67 0x0504 //RX_FDEQ_BIN_4 -68 0x0209 //RX_FDEQ_BIN_5 -69 0x0808 //RX_FDEQ_BIN_6 -70 0x090A //RX_FDEQ_BIN_7 -71 0x0B0C //RX_FDEQ_BIN_8 -72 0x0D0E //RX_FDEQ_BIN_9 -73 0x1013 //RX_FDEQ_BIN_10 -74 0x1719 //RX_FDEQ_BIN_11 -75 0x1B1E //RX_FDEQ_BIN_12 -76 0x1E1E //RX_FDEQ_BIN_13 -77 0x1E28 //RX_FDEQ_BIN_14 -78 0x282C //RX_FDEQ_BIN_15 -79 0x0000 //RX_FDEQ_BIN_16 -80 0x0000 //RX_FDEQ_BIN_17 -81 0x0000 //RX_FDEQ_BIN_18 -82 0x0000 //RX_FDEQ_BIN_19 -83 0x0000 //RX_FDEQ_BIN_20 -84 0x0000 //RX_FDEQ_BIN_21 -85 0x0000 //RX_FDEQ_BIN_22 -86 0x0000 //RX_FDEQ_BIN_23 -87 0x4000 //RX_FDEQ_RESRV_0 -88 0x0320 //RX_FDEQ_RESRV_1 -89 0x0018 //RX_FDDRC_BAND_MARGIN_0 -90 0x0030 //RX_FDDRC_BAND_MARGIN_1 -91 0x0050 //RX_FDDRC_BAND_MARGIN_2 -92 0x0080 //RX_FDDRC_BAND_MARGIN_3 -93 0x0004 //RX_FDDRC_BLOCK_EXP -94 0x5000 //RX_FDDRC_THRD_2_0 -95 0x5000 //RX_FDDRC_THRD_2_1 -96 0x2000 //RX_FDDRC_THRD_2_2 -97 0x5000 //RX_FDDRC_THRD_2_3 -98 0x6400 //RX_FDDRC_THRD_3_0 -99 0x6400 //RX_FDDRC_THRD_3_1 -100 0x2000 //RX_FDDRC_THRD_3_2 -101 0x5000 //RX_FDDRC_THRD_3_3 -102 0x4000 //RX_FDDRC_SLANT_0_0 -103 0x4000 //RX_FDDRC_SLANT_0_1 -104 0x4000 //RX_FDDRC_SLANT_0_2 -105 0x4000 //RX_FDDRC_SLANT_0_3 -106 0x7FFF //RX_FDDRC_SLANT_1_0 -107 0x7FFF //RX_FDDRC_SLANT_1_1 -108 0x7FFF //RX_FDDRC_SLANT_1_2 -109 0x7FFF //RX_FDDRC_SLANT_1_3 -110 0x0000 //RX_FDDRC_RESRV_0 -129 0x0052 //RX_SPK_VOL -130 0x0000 //RX_VOL_RESRV_0 -#VOL 5 -6 0x4000 //RX_TDDRC_ALPHA_UP_1 -7 0x4000 //RX_TDDRC_ALPHA_UP_2 -8 0x4000 //RX_TDDRC_ALPHA_UP_3 -9 0x4000 //RX_TDDRC_ALPHA_UP_4 -27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 -28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 -29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 -32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 -33 0x7FFF //RX_TDDRC_LIMITER_THRD -34 0x0800 //RX_TDDRC_LIMITER_GAIN -112 0x0001 //RX_TDDRC_THRD_0 -113 0x0002 //RX_TDDRC_THRD_1 -114 0x1800 //RX_TDDRC_THRD_2 -115 0x1800 //RX_TDDRC_THRD_3 -116 0x6000 //RX_TDDRC_SLANT_0 -117 0x6E00 //RX_TDDRC_SLANT_1 -118 0x4000 //RX_TDDRC_ALPHA_UP_0 -119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 -120 0x0000 //RX_TDDRC_HMNC_FLAG -121 0x199A //RX_TDDRC_HMNC_GAIN -122 0x0001 //RX_TDDRC_SMT_FLAG -123 0x0CCD //RX_TDDRC_SMT_W -124 0x02D2 //RX_TDDRC_DRC_GAIN -38 0x0020 //RX_FDEQ_SUBNUM -39 0x4C4C //RX_FDEQ_GAIN_0 -40 0x4C4C //RX_FDEQ_GAIN_1 -41 0x4C48 //RX_FDEQ_GAIN_2 -42 0x4870 //RX_FDEQ_GAIN_3 -43 0x4848 //RX_FDEQ_GAIN_4 -44 0x4848 //RX_FDEQ_GAIN_5 -45 0x4568 //RX_FDEQ_GAIN_6 -46 0x485C //RX_FDEQ_GAIN_7 -47 0x5C60 //RX_FDEQ_GAIN_8 -48 0x685C //RX_FDEQ_GAIN_9 -49 0x5648 //RX_FDEQ_GAIN_10 -50 0x484C //RX_FDEQ_GAIN_11 -51 0x706C //RX_FDEQ_GAIN_12 -52 0x7070 //RX_FDEQ_GAIN_13 -53 0x6868 //RX_FDEQ_GAIN_14 -54 0x6060 //RX_FDEQ_GAIN_15 -55 0x4848 //RX_FDEQ_GAIN_16 -56 0x4848 //RX_FDEQ_GAIN_17 -57 0x4848 //RX_FDEQ_GAIN_18 -58 0x4848 //RX_FDEQ_GAIN_19 -59 0x4848 //RX_FDEQ_GAIN_20 -60 0x4848 //RX_FDEQ_GAIN_21 -61 0x4848 //RX_FDEQ_GAIN_22 -62 0x4848 //RX_FDEQ_GAIN_23 -63 0x0202 //RX_FDEQ_BIN_0 -64 0x0203 //RX_FDEQ_BIN_1 -65 0x0303 //RX_FDEQ_BIN_2 -66 0x0402 //RX_FDEQ_BIN_3 -67 0x0504 //RX_FDEQ_BIN_4 -68 0x0209 //RX_FDEQ_BIN_5 -69 0x0808 //RX_FDEQ_BIN_6 -70 0x090A //RX_FDEQ_BIN_7 -71 0x0B0C //RX_FDEQ_BIN_8 -72 0x0D0E //RX_FDEQ_BIN_9 -73 0x1013 //RX_FDEQ_BIN_10 -74 0x1719 //RX_FDEQ_BIN_11 -75 0x1B1E //RX_FDEQ_BIN_12 -76 0x1E1E //RX_FDEQ_BIN_13 -77 0x1E28 //RX_FDEQ_BIN_14 -78 0x282C //RX_FDEQ_BIN_15 -79 0x0000 //RX_FDEQ_BIN_16 -80 0x0000 //RX_FDEQ_BIN_17 -81 0x0000 //RX_FDEQ_BIN_18 -82 0x0000 //RX_FDEQ_BIN_19 -83 0x0000 //RX_FDEQ_BIN_20 -84 0x0000 //RX_FDEQ_BIN_21 -85 0x0000 //RX_FDEQ_BIN_22 -86 0x0000 //RX_FDEQ_BIN_23 -87 0x4000 //RX_FDEQ_RESRV_0 -88 0x0320 //RX_FDEQ_RESRV_1 -89 0x0018 //RX_FDDRC_BAND_MARGIN_0 -90 0x0030 //RX_FDDRC_BAND_MARGIN_1 -91 0x0050 //RX_FDDRC_BAND_MARGIN_2 -92 0x0080 //RX_FDDRC_BAND_MARGIN_3 -93 0x0004 //RX_FDDRC_BLOCK_EXP -94 0x5000 //RX_FDDRC_THRD_2_0 -95 0x5000 //RX_FDDRC_THRD_2_1 -96 0x2000 //RX_FDDRC_THRD_2_2 -97 0x5000 //RX_FDDRC_THRD_2_3 -98 0x6400 //RX_FDDRC_THRD_3_0 -99 0x6400 //RX_FDDRC_THRD_3_1 -100 0x2000 //RX_FDDRC_THRD_3_2 -101 0x5000 //RX_FDDRC_THRD_3_3 -102 0x4000 //RX_FDDRC_SLANT_0_0 -103 0x4000 //RX_FDDRC_SLANT_0_1 -104 0x4000 //RX_FDDRC_SLANT_0_2 -105 0x4000 //RX_FDDRC_SLANT_0_3 -106 0x7FFF //RX_FDDRC_SLANT_1_0 -107 0x7FFF //RX_FDDRC_SLANT_1_1 -108 0x7FFF //RX_FDDRC_SLANT_1_2 -109 0x7FFF //RX_FDDRC_SLANT_1_3 -110 0x0000 //RX_FDDRC_RESRV_0 -129 0x0078 //RX_SPK_VOL -130 0x0000 //RX_VOL_RESRV_0 -#VOL 6 -6 0x4000 //RX_TDDRC_ALPHA_UP_1 -7 0x4000 //RX_TDDRC_ALPHA_UP_2 -8 0x4000 //RX_TDDRC_ALPHA_UP_3 -9 0x4000 //RX_TDDRC_ALPHA_UP_4 -27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 -28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 -29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 -32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 -33 0x7FFF //RX_TDDRC_LIMITER_THRD -34 0x0800 //RX_TDDRC_LIMITER_GAIN -112 0x0001 //RX_TDDRC_THRD_0 -113 0x0002 //RX_TDDRC_THRD_1 -114 0x1800 //RX_TDDRC_THRD_2 -115 0x1800 //RX_TDDRC_THRD_3 -116 0x6000 //RX_TDDRC_SLANT_0 -117 0x6E00 //RX_TDDRC_SLANT_1 -118 0x4000 //RX_TDDRC_ALPHA_UP_0 -119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 -120 0x0000 //RX_TDDRC_HMNC_FLAG -121 0x199A //RX_TDDRC_HMNC_GAIN -122 0x0001 //RX_TDDRC_SMT_FLAG -123 0x0CCD //RX_TDDRC_SMT_W -124 0x02D2 //RX_TDDRC_DRC_GAIN -38 0x0020 //RX_FDEQ_SUBNUM -39 0x4C4C //RX_FDEQ_GAIN_0 -40 0x4C4C //RX_FDEQ_GAIN_1 -41 0x4C48 //RX_FDEQ_GAIN_2 -42 0x4870 //RX_FDEQ_GAIN_3 -43 0x4848 //RX_FDEQ_GAIN_4 -44 0x4848 //RX_FDEQ_GAIN_5 -45 0x4568 //RX_FDEQ_GAIN_6 -46 0x485C //RX_FDEQ_GAIN_7 -47 0x5C60 //RX_FDEQ_GAIN_8 -48 0x685C //RX_FDEQ_GAIN_9 -49 0x5648 //RX_FDEQ_GAIN_10 -50 0x484C //RX_FDEQ_GAIN_11 -51 0x706C //RX_FDEQ_GAIN_12 -52 0x7070 //RX_FDEQ_GAIN_13 -53 0x6868 //RX_FDEQ_GAIN_14 -54 0x6060 //RX_FDEQ_GAIN_15 -55 0x4848 //RX_FDEQ_GAIN_16 -56 0x4848 //RX_FDEQ_GAIN_17 -57 0x4848 //RX_FDEQ_GAIN_18 -58 0x4848 //RX_FDEQ_GAIN_19 -59 0x4848 //RX_FDEQ_GAIN_20 -60 0x4848 //RX_FDEQ_GAIN_21 -61 0x4848 //RX_FDEQ_GAIN_22 -62 0x4848 //RX_FDEQ_GAIN_23 -63 0x0202 //RX_FDEQ_BIN_0 -64 0x0203 //RX_FDEQ_BIN_1 -65 0x0303 //RX_FDEQ_BIN_2 -66 0x0402 //RX_FDEQ_BIN_3 -67 0x0504 //RX_FDEQ_BIN_4 -68 0x0209 //RX_FDEQ_BIN_5 -69 0x0808 //RX_FDEQ_BIN_6 -70 0x090A //RX_FDEQ_BIN_7 -71 0x0B0C //RX_FDEQ_BIN_8 -72 0x0D0E //RX_FDEQ_BIN_9 -73 0x1013 //RX_FDEQ_BIN_10 -74 0x1719 //RX_FDEQ_BIN_11 -75 0x1B1E //RX_FDEQ_BIN_12 -76 0x1E1E //RX_FDEQ_BIN_13 -77 0x1E28 //RX_FDEQ_BIN_14 -78 0x282C //RX_FDEQ_BIN_15 -79 0x0000 //RX_FDEQ_BIN_16 -80 0x0000 //RX_FDEQ_BIN_17 -81 0x0000 //RX_FDEQ_BIN_18 -82 0x0000 //RX_FDEQ_BIN_19 -83 0x0000 //RX_FDEQ_BIN_20 -84 0x0000 //RX_FDEQ_BIN_21 -85 0x0000 //RX_FDEQ_BIN_22 -86 0x0000 //RX_FDEQ_BIN_23 -87 0x4000 //RX_FDEQ_RESRV_0 -88 0x0320 //RX_FDEQ_RESRV_1 -89 0x0018 //RX_FDDRC_BAND_MARGIN_0 -90 0x0030 //RX_FDDRC_BAND_MARGIN_1 -91 0x0050 //RX_FDDRC_BAND_MARGIN_2 -92 0x0080 //RX_FDDRC_BAND_MARGIN_3 -93 0x0004 //RX_FDDRC_BLOCK_EXP -94 0x5000 //RX_FDDRC_THRD_2_0 -95 0x5000 //RX_FDDRC_THRD_2_1 -96 0x2000 //RX_FDDRC_THRD_2_2 -97 0x5000 //RX_FDDRC_THRD_2_3 -98 0x6400 //RX_FDDRC_THRD_3_0 -99 0x6400 //RX_FDDRC_THRD_3_1 -100 0x2000 //RX_FDDRC_THRD_3_2 -101 0x5000 //RX_FDDRC_THRD_3_3 -102 0x4000 //RX_FDDRC_SLANT_0_0 -103 0x4000 //RX_FDDRC_SLANT_0_1 -104 0x4000 //RX_FDDRC_SLANT_0_2 -105 0x4000 //RX_FDDRC_SLANT_0_3 -106 0x7FFF //RX_FDDRC_SLANT_1_0 -107 0x7FFF //RX_FDDRC_SLANT_1_1 -108 0x7FFF //RX_FDDRC_SLANT_1_2 -109 0x7FFF //RX_FDDRC_SLANT_1_3 -110 0x0000 //RX_FDDRC_RESRV_0 -129 0x0100 //RX_SPK_VOL -130 0x0000 //RX_VOL_RESRV_0 - -#CASE_NAME HANDSFREE-HANDSFREE-CUSTOM1-FB -#PARAM_TYPE TX+RX -#TOTAL_CUSTOM_STEP 7 -#TX -0 0x0001 //TX_OPERATION_MODE_0 -1 0x0001 //TX_OPERATION_MODE_1 -2 0x0033 //TX_PATCH_REG -3 0x6B74 //TX_SENDFUNC_MODE_0 -4 0x0001 //TX_SENDFUNC_MODE_1 -5 0x0003 //TX_NUM_MIC -6 0x0004 //TX_SAMPLINGFREQ_SIG -7 0x0004 //TX_SAMPLINGFREQ_PROC -8 0x000A //TX_FRAME_SZ_SIG -9 0x000A //TX_FRAME_SZ -10 0x0000 //TX_DELAY_OPT -11 0x0028 //TX_MAX_TAIL_LENGTH -12 0x0001 //TX_NUM_LOUTCHN -13 0x0001 //TX_MAXNUM_AECREF -14 0x0000 //TX_DBG_FUNC_REG -15 0x0000 //TX_DBG_FUNC_REG1 -16 0x0000 //TX_SYS_RESRV_0 -17 0x0000 //TX_SYS_RESRV_1 -18 0x0000 //TX_SYS_RESRV_2 -19 0x0000 //TX_SYS_RESRV_3 -20 0x0000 //TX_DIST2REF0 -21 0x00A4 //TX_DIST2REF1 -22 0x0017 //TX_DIST2REF_02 -23 0x0000 //TX_DIST2REF_03 -24 0x0000 //TX_DIST2REF_04 -25 0x0000 //TX_DIST2REF_05 -26 0x0000 //TX_MMIC -27 0x0FF7 //TX_PGA_0 -28 0x0FF7 //TX_PGA_1 -29 0x0FF7 //TX_PGA_2 -30 0x0000 //TX_PGA_3 -31 0x0000 //TX_PGA_4 -32 0x0000 //TX_PGA_5 -33 0x0001 //TX_MIC_PAIRS -34 0x0000 //TX_MIC_PAIRS_HS -35 0x0002 //TX_MICS_FOR_BF -36 0x0000 //TX_MIC_PAIRS_FORL1 -37 0x0002 //TX_MICS_OF_PAIR0 -38 0x0002 //TX_MICS_OF_PAIR1 -39 0x0002 //TX_MICS_OF_PAIR2 -40 0x0002 //TX_MICS_OF_PAIR3 -41 0x0002 //TX_MIC_DATA_SRC0 -42 0x0000 //TX_MIC_DATA_SRC1 -43 0x0001 //TX_MIC_DATA_SRC2 -44 0x0000 //TX_MIC_DATA_SRC3 -45 0x0000 //TX_MIC_PAIR_CH_04 -46 0x0000 //TX_MIC_PAIR_CH_05 -47 0x0000 //TX_MIC_PAIR_CH_10 -48 0x0000 //TX_MIC_PAIR_CH_11 -49 0x0000 //TX_MIC_PAIR_CH_12 -50 0x0000 //TX_MIC_PAIR_CH_13 -51 0x0000 //TX_MIC_PAIR_CH_14 -52 0x05DC //TX_HD_BIN_MASK -53 0x0010 //TX_HD_SUBAND_MASK -54 0x19A1 //TX_HD_FRAME_AVG_MASK -55 0x0320 //TX_HD_MIN_FRQ -56 0x1000 //TX_HD_ALPHA_PSD -57 0x1100 //TX_T_PHPR1 -58 0x0000 //TX_T_PHPR2 -59 0x0000 //TX_T_PTPR -60 0x0000 //TX_T_PNPR -61 0x0000 //TX_T_PAPR1 -62 0xEE6C //TX_T_PSDVAT -63 0x0800 //TX_CNT -64 0x4000 //TX_ANTI_HOWL_GAIN -65 0x0001 //TX_MICFORBFMARK_0 -66 0x0001 //TX_MICFORBFMARK_1 -67 0x0001 //TX_MICFORBFMARK_2 -68 0x0001 //TX_MICFORBFMARK_3 -69 0x0001 //TX_MICFORBFMARK_4 -70 0x0001 //TX_MICFORBFMARK_5 -71 0x0000 //TX_DIST2REF_10 -72 0x3B33 //TX_DIST2REF_11 -73 0x0A70 //TX_DIST2REF2 -74 0x0000 //TX_DIST2REF_13 -75 0x0000 //TX_DIST2REF_14 -76 0x0000 //TX_DIST2REF_15 -77 0x0000 //TX_DIST2REF_20 -78 0x0000 //TX_DIST2REF_21 -79 0x0000 //TX_DIST2REF_22 -80 0x0000 //TX_DIST2REF_23 -81 0x0000 //TX_DIST2REF_24 -82 0x0000 //TX_DIST2REF_25 -83 0x0000 //TX_DIST2REF_30 -84 0x0000 //TX_DIST2REF_31 -85 0x0000 //TX_DIST2REF_32 -86 0x0000 //TX_DIST2REF_33 -87 0x0000 //TX_DIST2REF_34 -88 0x0000 //TX_DIST2REF_35 -89 0x0000 //TX_MIC_LOC_00 -90 0x0000 //TX_MIC_LOC_01 -91 0x0000 //TX_MIC_LOC_02 -92 0x0000 //TX_MIC_LOC_03 -93 0x0000 //TX_MIC_LOC_04 -94 0x0000 //TX_MIC_LOC_05 -95 0x0000 //TX_MIC_LOC_10 -96 0x0000 //TX_MIC_LOC_11 -97 0x0000 //TX_MIC_LOC_12 -98 0x0000 //TX_MIC_LOC_13 -99 0x0000 //TX_MIC_LOC_14 -100 0x0000 //TX_MIC_LOC_15 -101 0x0000 //TX_MIC_LOC_20 -102 0x0000 //TX_MIC_LOC_21 -103 0x0000 //TX_MIC_LOC_22 -104 0x0000 //TX_MIC_LOC_23 -105 0x0000 //TX_MIC_LOC_24 -106 0x0000 //TX_MIC_LOC_25 -107 0x0800 //TX_MIC_REFBLK_VOLUME -108 0x0CAE //TX_MIC_BLOCK_VOLUME -109 0x0000 //TX_INVERSE_MASK -110 0x0000 //TX_ADCS_MASK -111 0x04D0 //TX_ADCS_GAIN -112 0x4000 //TX_NFC_GAINFAC -113 0x0000 //TX_MAINMIC_BLKFACTOR -114 0x0000 //TX_REFMIC_BLKFACTOR -115 0x0000 //TX_BLMIC_BLKFACTOR -116 0x0000 //TX_BRMIC_BLKFACTOR -117 0x0031 //TX_MICBLK_START_BIN -118 0x0060 //TX_MICBLK_END_BIN -119 0x0015 //TX_MICBLK_FE_HOLD -120 0xFFF2 //TX_MICBLK_MR_EXP_TH -121 0xFFF2 //TX_MICBLK_LR_EXP_TH -122 0x0015 //TX_FENE_HOLD -123 0x4000 //TX_FE_ENER_TH_MTS -124 0x0004 //TX_FE_ENER_TH_EXP -125 0x6000 //TX_C_POST_FLT_MIC_MAINBLK -126 0x6000 //TX_C_POST_FLT_MIC_REFBLK -127 0x0010 //TX_MIC_BLOCK_N -128 0x7E56 //TX_A_HP -129 0x4000 //TX_B_PE -130 0x1800 //TX_THR_PITCH_DET_0 -131 0x1000 //TX_THR_PITCH_DET_1 -132 0x0800 //TX_THR_PITCH_DET_2 -133 0x0008 //TX_PITCH_BFR_LEN -134 0x0003 //TX_SBD_PITCH_DET -135 0x0050 //TX_TD_AEC_L -136 0x4000 //TX_MU0_UNP_TD_AEC -137 0x1000 //TX_MU0_PTD_TD_AEC -138 0x0000 //TX_PP_RESRV_0 -139 0x2A94 //TX_PP_RESRV_1 -140 0x55F0 //TX_PP_RESRV_2 -141 0x0000 //TX_PP_RESRV_3 -142 0x0000 //TX_PP_RESRV_4 -143 0x0000 //TX_PP_RESRV_5 -144 0x0000 //TX_PP_RESRV_6 -145 0x0000 //TX_PP_RESRV_7 -146 0x0028 //TX_TAIL_LENGTH -147 0x0300 //TX_AEC_REF_GAIN_0 -148 0x0800 //TX_AEC_REF_GAIN_1 -149 0x0800 //TX_AEC_REF_GAIN_2 -150 0x7A00 //TX_EAD_THR -151 0x1000 //TX_THR_RE_EST -152 0x0800 //TX_MIN_EQ_RE_EST_0 -153 0x2000 //TX_MIN_EQ_RE_EST_1 -154 0x2000 //TX_MIN_EQ_RE_EST_2 -155 0x4000 //TX_MIN_EQ_RE_EST_3 -156 0x4000 //TX_MIN_EQ_RE_EST_4 -157 0x7FFF //TX_MIN_EQ_RE_EST_5 -158 0x7FFF //TX_MIN_EQ_RE_EST_6 -159 0x7FFF //TX_MIN_EQ_RE_EST_7 -160 0x7FFF //TX_MIN_EQ_RE_EST_8 -161 0x7FFF //TX_MIN_EQ_RE_EST_9 -162 0x7FFF //TX_MIN_EQ_RE_EST_10 -163 0x7FFF //TX_MIN_EQ_RE_EST_11 -164 0x7FFF //TX_MIN_EQ_RE_EST_12 -165 0x4000 //TX_LAMBDA_RE_EST -166 0x0CCD //TX_LAMBDA_CB_NLE -167 0x2000 //TX_C_POST_FLT -168 0x7FFF //TX_GAIN_NP -169 0x0180 //TX_SE_HOLD_N -170 0x00C8 //TX_DT_HOLD_N -171 0x09C4 //TX_DT2_HOLD_N -172 0x6666 //TX_AEC_RESRV_0 -173 0x0000 //TX_AEC_RESRV_1 -174 0x0014 //TX_AEC_RESRV_2 -175 0x0000 //TX_MIC_DELAY_LENGTH -176 0x0000 //TX_REF_DELAY_LENGTH -177 0x0000 //TX_ADD_LINEIN_GAINL -178 0x0000 //TX_ADD_LINEIN_GAINH -179 0x0000 //TX_MIN_EQ_RE_EST_14 -180 0x0000 //TX_DTD_THR1_8 -181 0x7FFF //TX_DTD_THR2_8 -182 0x0000 //TX_DTD_MIC_BLK2 -183 0x0008 //TX_FRQ_LIN_LEN -184 0x7FFF //TX_FRQ_AEC_LEN_RHO -185 0x6000 //TX_MU0_UNP_FRQ_AEC -186 0x4000 //TX_MU0_PTD_FRQ_AEC -187 0x000A //TX_MINENOISETH -188 0x0800 //TX_MU0_RE_EST -189 0x0001 //TX_AEC_NUM_CH -190 0x0000 //TX_BIGECHOATTENUATION_MAX -191 0x2000 //TX_A_POST_FLT_MICBLK -192 0x0000 //TX_BLKENERTH -193 0x0000 //TX_BLKENERHIGHTH -194 0x0000 //TX_NORMENERTH -195 0x0000 //TX_NORMENERHIGHTH -196 0x0000 //TX_NORMENERHIGHTHL -197 0x7D00 //TX_DTD_THR1_0 -198 0x7FF0 //TX_DTD_THR1_1 -199 0x7FF0 //TX_DTD_THR1_2 -200 0x7FF0 //TX_DTD_THR1_3 -201 0x7FF0 //TX_DTD_THR1_4 -202 0x7FF0 //TX_DTD_THR1_5 -203 0x7FF0 //TX_DTD_THR1_6 -204 0x0CCD //TX_DTD_THR2_0 -205 0x0CCD //TX_DTD_THR2_1 -206 0x0CCD //TX_DTD_THR2_2 -207 0x0CCD //TX_DTD_THR2_3 -208 0x0CCD //TX_DTD_THR2_4 -209 0x0CCD //TX_DTD_THR2_5 -210 0x0CCD //TX_DTD_THR2_6 -211 0x7FFF //TX_DTD_THR3 -212 0x0000 //TX_SPK_CUT_K -213 0x0DAC //TX_DT_CUT_K -214 0x0020 //TX_DT_CUT_THR -215 0x04EB //TX_COMFORT_G -216 0x01F4 //TX_POWER_YOUT_TH -217 0x4000 //TX_FDPFGAINECHO -218 0x0000 //TX_DTD_HD_THR -219 0x0000 //TX_SPK_CUT_K_S -220 0x7FFF //TX_DTD_MIC_BLK -221 0x023E //TX_ADPT_STRICT_L -222 0x023E //TX_ADPT_STRICT_H -223 0x0BB8 //TX_RATIO_DT_L_TH_LOW -224 0x3A98 //TX_RATIO_DT_H_TH_LOW -225 0x1770 //TX_RATIO_DT_L_TH_HIGH -226 0x4E20 //TX_RATIO_DT_H_TH_HIGH -227 0x09C4 //TX_RATIO_DT_L0_TH -228 0x2000 //TX_B_POST_FILT_ECHO_L -229 0x2000 //TX_B_POST_FILT_ECHO_H -230 0x0200 //TX_MIN_G_CTRL_ECHO -231 0x1000 //TX_B_LESSCUT_RTO_ECHO -232 0x0063 //TX_EPD_OFFSET_00 -233 0x0000 //TX_EPD_OFFST_01 -234 0x1388 //TX_RATIO_DT_L0_TH_HIGH -235 0x3A98 //TX_RATIO_DT_H_TH_CUT -236 0x7FFF //TX_MIN_EQ_RE_EST_13 -237 0x0000 //TX_DTD_THR1_7 -238 0x0000 //TX_DTD_THR2_7 -239 0x0800 //TX_DT_RESRV_7 -240 0x0800 //TX_DT_RESRV_8 -241 0x0000 //TX_DT_RESRV_9 -242 0xF800 //TX_THR_SN_EST_0 -243 0xFA00 //TX_THR_SN_EST_1 -244 0xFA00 //TX_THR_SN_EST_2 -245 0xFB00 //TX_THR_SN_EST_3 -246 0xFA00 //TX_THR_SN_EST_4 -247 0xFA00 //TX_THR_SN_EST_5 -248 0xF800 //TX_THR_SN_EST_6 -249 0xF800 //TX_THR_SN_EST_7 -250 0x0100 //TX_DELTA_THR_SN_EST_0 -251 0x0200 //TX_DELTA_THR_SN_EST_1 -252 0x0100 //TX_DELTA_THR_SN_EST_2 -253 0x0200 //TX_DELTA_THR_SN_EST_3 -254 0x0100 //TX_DELTA_THR_SN_EST_4 -255 0x0100 //TX_DELTA_THR_SN_EST_5 -256 0x0200 //TX_DELTA_THR_SN_EST_6 -257 0x0200 //TX_DELTA_THR_SN_EST_7 -258 0x4000 //TX_LAMBDA_NN_EST_0 -259 0x4000 //TX_LAMBDA_NN_EST_1 -260 0x4000 //TX_LAMBDA_NN_EST_2 -261 0x4000 //TX_LAMBDA_NN_EST_3 -262 0x4000 //TX_LAMBDA_NN_EST_4 -263 0x4000 //TX_LAMBDA_NN_EST_5 -264 0x4000 //TX_LAMBDA_NN_EST_6 -265 0x4000 //TX_LAMBDA_NN_EST_7 -266 0x0400 //TX_N_SN_EST -267 0x001E //TX_INBEAM_T -268 0x0041 //TX_INBEAMHOLDT -269 0x2000 //TX_G_STRICT -270 0x2000 //TX_EQ_THR_BF -271 0x799A //TX_LAMBDA_EQ_BF -272 0x1000 //TX_NE_RTO_TH -273 0x0400 //TX_NE_RTO_TH_L -274 0x0800 //TX_MAINREFRTOH_TH_H -275 0x0800 //TX_MAINREFRTOH_TH_L -276 0x0800 //TX_MAINREFRTO_TH_H -277 0x0800 //TX_MAINREFRTO_TH_L -278 0x0200 //TX_MAINREFRTO_TH_EQ -279 0x2000 //TX_B_POST_FLT_0 -280 0x1000 //TX_B_POST_FLT_1 -281 0x0010 //TX_NS_LVL_CTRL_0 -282 0x0014 //TX_NS_LVL_CTRL_1 -283 0x0014 //TX_NS_LVL_CTRL_2 -284 0x0018 //TX_NS_LVL_CTRL_3 -285 0x0016 //TX_NS_LVL_CTRL_4 -286 0x0014 //TX_NS_LVL_CTRL_5 -287 0x0011 //TX_NS_LVL_CTRL_6 -288 0x0011 //TX_NS_LVL_CTRL_7 -289 0x000F //TX_MIN_GAIN_S_0 -290 0x0010 //TX_MIN_GAIN_S_1 -291 0x0010 //TX_MIN_GAIN_S_2 -292 0x0010 //TX_MIN_GAIN_S_3 -293 0x0010 //TX_MIN_GAIN_S_4 -294 0x0010 //TX_MIN_GAIN_S_5 -295 0x0010 //TX_MIN_GAIN_S_6 -296 0x000F //TX_MIN_GAIN_S_7 -297 0x6000 //TX_NMOS_SUP -298 0x0000 //TX_NS_MAX_PRI_SNR_TH -299 0x0000 //TX_NMOS_SUP_MENSA -300 0x7FFF //TX_SNRI_SUP_0 -301 0x4000 //TX_SNRI_SUP_1 -302 0x4000 //TX_SNRI_SUP_2 -303 0x4000 //TX_SNRI_SUP_3 -304 0x4000 //TX_SNRI_SUP_4 -305 0x4000 //TX_SNRI_SUP_5 -306 0x50C0 //TX_SNRI_SUP_6 -307 0x7FFF //TX_SNRI_SUP_7 -308 0x7FFF //TX_THR_LFNS -309 0x0018 //TX_G_LFNS -310 0x09C4 //TX_GAIN0_NTH -311 0x000A //TX_MUSIC_MORENS -312 0x7FFF //TX_A_POST_FILT_0 -313 0x2000 //TX_A_POST_FILT_1 -314 0x5000 //TX_A_POST_FILT_S_0 -315 0x6000 //TX_A_POST_FILT_S_1 -316 0x4C00 //TX_A_POST_FILT_S_2 -317 0x4000 //TX_A_POST_FILT_S_3 -318 0x6000 //TX_A_POST_FILT_S_4 -319 0x4000 //TX_A_POST_FILT_S_5 -320 0x5000 //TX_A_POST_FILT_S_6 -321 0x7000 //TX_A_POST_FILT_S_7 -322 0x2000 //TX_B_POST_FILT_0 -323 0x1000 //TX_B_POST_FILT_1 -324 0x2000 //TX_B_POST_FILT_2 -325 0x2000 //TX_B_POST_FILT_3 -326 0x4000 //TX_B_POST_FILT_4 -327 0x4000 //TX_B_POST_FILT_5 -328 0x1000 //TX_B_POST_FILT_6 -329 0x2000 //TX_B_POST_FILT_7 -330 0x4000 //TX_B_LESSCUT_RTO_S_0 -331 0x7FFF //TX_B_LESSCUT_RTO_S_1 -332 0x7FFF //TX_B_LESSCUT_RTO_S_2 -333 0x7FFF //TX_B_LESSCUT_RTO_S_3 -334 0x7FFF //TX_B_LESSCUT_RTO_S_4 -335 0x7FFF //TX_B_LESSCUT_RTO_S_5 -336 0x6000 //TX_B_LESSCUT_RTO_S_6 -337 0x7FFF //TX_B_LESSCUT_RTO_S_7 -338 0x7C00 //TX_LAMBDA_PFILT -339 0x7C00 //TX_LAMBDA_PFILT_S_0 -340 0x7C00 //TX_LAMBDA_PFILT_S_1 -341 0x7C00 //TX_LAMBDA_PFILT_S_2 -342 0x7A00 //TX_LAMBDA_PFILT_S_3 -343 0x7C00 //TX_LAMBDA_PFILT_S_4 -344 0x7C00 //TX_LAMBDA_PFILT_S_5 -345 0x7C00 //TX_LAMBDA_PFILT_S_6 -346 0x7C00 //TX_LAMBDA_PFILT_S_7 -347 0x0000 //TX_K_PEPPER -348 0x0800 //TX_A_PEPPER -349 0x1EAA //TX_K_PEPPER_HF -350 0x0600 //TX_A_PEPPER_HF -351 0x0001 //TX_HMNC_BST_FLG -352 0x0200 //TX_HMNC_BST_THR -353 0x0200 //TX_DT_BINVAD_TH_0 -354 0x0200 //TX_DT_BINVAD_TH_1 -355 0x0200 //TX_DT_BINVAD_TH_2 -356 0x0200 //TX_DT_BINVAD_TH_3 -357 0x1F40 //TX_DT_BINVAD_ENDF -358 0x0100 //TX_C_POST_FLT_DT -359 0x0CCD //TX_NS_B_POST_FLT_LESSCUT -360 0x0100 //TX_DT_BOOST -361 0x0000 //TX_BF_SGRAD_FLG -362 0x0005 //TX_BF_DVG_TH -363 0x001E //TX_SN_C_F -364 0x0000 //TX_K_APT -365 0x0001 //TX_NOISEDET -366 0x0064 //TX_NDETCT -367 0x0050 //TX_NOISE_TH_0 -368 0x7FFF //TX_NOISE_TH_0_2 -369 0x7FFF //TX_NOISE_TH_0_3 -370 0x07D0 //TX_NOISE_TH_1 -371 0x0DAC //TX_NOISE_TH_2 -372 0x4E20 //TX_NOISE_TH_3 -373 0x4E20 //TX_NOISE_TH_4 -374 0x59D8 //TX_NOISE_TH_5 -375 0x7FFF //TX_NOISE_TH_5_2 -376 0x0000 //TX_NOISE_TH_5_3 -377 0x7FFF //TX_NOISE_TH_5_4 -378 0x2710 //TX_NOISE_TH_6 -379 0x0033 //TX_MINENOISE_TH -380 0x4000 //TX_MINENOISE_MIC0_TH_MTS -381 0xFFEE //TX_MINENOISE_MIC0_TH_EXP -382 0x6000 //TX_MINENOISE_MIC0_S_TH_MTS -383 0xFFF3 //TX_MINENOISE_MIC0_S_TH_EXP -384 0x0666 //TX_OUT_ENER_S_TH_CLEAN -385 0x0666 //TX_OUT_ENER_S_TH_LESSCLEAN -386 0x0333 //TX_OUT_ENER_S_TH_NOISY -387 0x019A //TX_OUT_ENER_TH_NOISE -388 0x0333 //TX_OUT_ENER_TH_SPEECH -389 0x2000 //TX_SN_NPB_GAIN -390 0x0000 //TX_NN_NPB_GAIN -391 0x0000 //TX_CSX_ALPHA_0 -392 0x0000 //TX_CSX_ALPHA_1 -393 0x0000 //TX_CSX_ALPHA_2 -394 0x0000 //TX_CSX_ALPHA_3 -395 0x0800 //TX_MU_ARSP_EST -396 0x00C8 //TX_P_OUTBEAM_MIN_TH -397 0x0002 //TX_EXTRA_NS_L -398 0x0800 //TX_EXTRA_NS_A -399 0x0005 //TX_VR_NOISE_FLOOR_TH -400 0x0148 //TX_MIN_G_LOW300HZ -401 0x0002 //TX_MAXLEVEL_CNG -402 0x00B4 //TX_STN_NOISE_TH -403 0x4000 //TX_POST_MASK_SUP -404 0x7FFF //TX_POST_MASK_ADJUST -405 0x00C8 //TX_NS_ENOISE_MIC0_TH -406 0x0033 //TX_MINENOISE_MIC0_TH -407 0x012C //TX_MINENOISE_MIC0_S_TH -408 0x7FFF //TX_MIN_G_CTRL_SSNS -409 0x0000 //TX_METAL_RTO_THR -410 0x4848 //TX_NS_FP_K_METAL -411 0x3A98 //TX_NOISEDET_BOOST_TH -412 0x0FA0 //TX_NSMOOTH_TH -413 0x0000 //TX_NS_RESRV_8 -414 0x1800 //TX_RHO_UPB -415 0x0BB8 //TX_N_HOLD_HS -416 0x0050 //TX_N_RHO_BFR0 -417 0x7FFF //TX_LAMBDA_ARSP_EST -418 0x0100 //TX_EXTRA_GAIN_MICBLOCK -419 0x0CCD //TX_THR_STD_NSR -420 0x019A //TX_THR_STD_PLH -421 0x2AF8 //TX_N_HOLD_STD -422 0x0066 //TX_THR_STD_RHO -423 0x2000 //TX_BF_RESET_THR_HS -424 0x09C4 //TX_SB_RTO_MEAN_TH -425 0x0000 //TX_SB_RHO_MEAN_TH_NTALK -426 0x3800 //TX_SB_RTO_MEAN_TH_ABN -427 0x2EE0 //TX_SB_RTO_MEAN_TH_RUB -428 0x0000 //TX_WTA_EN_RTO_TH -429 0x0000 //TX_TOP_ENER_TH_F -430 0x0000 //TX_DESIRED_TALK_HOLDT -431 0x0800 //TX_MIC_BLOCK_FACTOR -432 0x0000 //TX_NSEST_BFRLRNRDC -433 0x0000 //TX_THR_POST_FLT_HS -434 0x0010 //TX_HS_VAD_BIN -435 0x2666 //TX_THR_VAD_HS -436 0x2CCD //TX_MEAN_RTO_MIN_TH2 -437 0x0032 //TX_SILENCE_T -438 0x0000 //TX_A_POST_FLT_WTA -439 0x799A //TX_LAMBDA_PFLT_WTA -440 0x0000 //TX_SB_RHO_MEAN2_TH -441 0x0190 //TX_SB_RHO_MEAN3_TH -442 0x0000 //TX_HS_RESRV_4 -443 0x0000 //TX_HS_RESRV_5 -444 0x003C //TX_DOA_VAD_THR_1 -445 0x0000 //TX_DOA_VAD_THR_2 -446 0x0028 //TX_DOA_VAD_THR1_0 -447 0x0028 //TX_DOA_VAD_THR1_1 -448 0x0000 //TX_SRC_DOA_RNG_LOW_0A -449 0x00B4 //TX_SRC_DOA_RNG_HIGH_0A -450 0x005A //TX_DFLT_SRC_DOA_0A -451 0x0000 //TX_SRC_DOA_RNG_LOW_0B -452 0x0000 //TX_SRC_DOA_RNG_HIGH_0B -453 0x0000 //TX_DFLT_SRC_DOA_0B -454 0x0000 //TX_SRC_DOA_RNG_LOW_0C -455 0x0000 //TX_SRC_DOA_RNG_HIGH_0C -456 0x0000 //TX_DFLT_SRC_DOA_0C -457 0x0000 //TX_SRC_DOA_RNG_LOW_0D -458 0x0000 //TX_SRC_DOA_RNG_HIGH_0D -459 0x0000 //TX_DFLT_SRC_DOA_0D -460 0x0000 //TX_SRC_DOA_RNG_LOW_1A -461 0x00B4 //TX_SRC_DOA_RNG_HIGH_1A -462 0x005A //TX_DFLT_SRC_DOA_1A -463 0x0000 //TX_SRC_DOA_RNG_LOW_1B -464 0x00B4 //TX_SRC_DOA_RNG_HIGH_1B -465 0x005A //TX_DFLT_SRC_DOA_1B -466 0x0000 //TX_SRC_DOA_RNG_LOW_1C -467 0x00B4 //TX_SRC_DOA_RNG_HIGH_1C -468 0x005A //TX_DFLT_SRC_DOA_1C -469 0x0000 //TX_SRC_DOA_RNG_LOW_1D -470 0x00B4 //TX_SRC_DOA_RNG_HIGH_1D -471 0x005A //TX_DFLT_SRC_DOA_1D -472 0x0100 //TX_BF_HOLDOFF_T -473 0x7FFF //TX_DOA_COST_FACTOR -474 0x4000 //TX_MAINTOREFR_TH0 -475 0x071C //TX_DOA_TRK_THR -476 0x012C //TX_DOA_TRACK_HT -477 0x0200 //TX_N1_HOLD_HF -478 0x0100 //TX_N2_HOLD_HF -479 0x3000 //TX_BF_RESET_THR_HF -480 0x7333 //TX_DOA_SMOOTH -481 0x0800 //TX_MU_BF -482 0x0800 //TX_BF_MU_LF_B2 -483 0x0040 //TX_BF_FC_END_BIN_B2 -484 0x0020 //TX_BF_FC_END_BIN -485 0x0000 //TX_HF_RESRV_25 -486 0x0000 //TX_HF_RESRV_26 -487 0x0007 //TX_N_DOA_SEED -488 0x0001 //TX_FINE_DOA_SEARCH_FLG -489 0x0000 //TX_HF_RESRV_27 -490 0x038E //TX_DLT_SRC_DOA_RNG -491 0x0200 //TX_BF_MU_LF -492 0x0000 //TX_DFLT_SRC_LOC_0 -493 0x7FFF //TX_DFLT_SRC_LOC_1 -494 0x0000 //TX_DFLT_SRC_LOC_2 -495 0x038E //TX_DOA_TRACK_VADTH -496 0x0000 //TX_DOA_TRACK_NEW -497 0x0230 //TX_NOR_OFF_THR -498 0x0CCD //TX_MORE_ON_700HZ_THR -499 0x2000 //TX_MU_BF_ADPT_NS -500 0x0000 //TX_ADAPT_LEN -501 0x2000 //TX_MORE_SNS -502 0x0000 //TX_NOR_OFF_TH1 -503 0x0000 //TX_WIDE_MASK_TH -504 0x4650 //TX_SUBSNRATIOHIGH4MEANBCK_THR -505 0x7FFF //TX_C_POST_FLT_CUT -506 0x2000 //TX_RADIODTLV -507 0x0320 //TX_POWER_LINEIN_TH -508 0x0014 //TX_FE_VADCOUNT_TH_FC -509 0x0000 //TX_ECHO_SUPP_FC -510 0x0C80 //TX_ECHO_TH -511 0x6666 //TX_MIC_TO_BFGAIN -512 0x0000 //TX_MICTOBFGAIN0 -513 0x0000 //TX_FASTMUE_TH -514 0x0000 //TX_DERVB_LEN_0 -515 0x0000 //TX_DERVB_LEN_1 -516 0x0000 //TX_RHO_DERVB -517 0x0000 //TX_MIC_INDX_DERVB -518 0x0000 //TX_MU_DERVB -519 0x0000 //TX_DR_RESRV_0 -520 0x0000 //TX_DR_RESRV_1 -521 0x0000 //TX_DR_RESRV_2 -522 0x0000 //TX_DR_RESRV_3 -523 0x0000 //TX_DR_RESRV_4 -524 0x0000 //TX_DR_RESRV_5 -525 0x0000 //TX_DR_RESRV_6 -526 0x0000 //TX_DR_RESRV_7 -527 0x0000 //TX_DR_RESRV_8 -528 0x1333 //TX_WIND_MARK_TH -529 0x399A //TX_CORR_THR -530 0x0004 //TX_SNR_THR -531 0x0010 //TX_ENGY_THR -532 0x1770 //TX_CORR_HIGH_TH -533 0x6000 //TX_ENGY_THR_2 -534 0x3400 //TX_MEAN_RTO_THR -535 0x0028 //TX_WNS_ENOISE_MIC0_TH -536 0x3000 //TX_RATIOMICL_TH -537 0x64CD //TX_CALIG_HS -538 0x0000 //TX_LVL_CTRL -539 0x0014 //TX_WIND_SUPRTO -540 0x000A //TX_WNS_MIN_G -541 0x0000 //TX_WNS_B_POST_FLT -542 0x2800 //TX_RATIOMICH_TH -543 0xD120 //TX_WIND_INBEAM_L_TH -544 0x0FA0 //TX_WIND_INBEAM_H_TH -545 0x2000 //TX_WNS_RESRV_0 -546 0x59D8 //TX_WNS_RESRV_1 -547 0x0000 //TX_WNS_RESRV_2 -548 0x0000 //TX_WNS_RESRV_3 -549 0x0000 //TX_WNS_RESRV_4 -550 0x0000 //TX_WNS_RESRV_5 -551 0x0000 //TX_WNS_RESRV_6 -552 0x0000 //TX_PB_B_POST_FLT_LESSCUT -553 0x0070 //TX_BF_LESSCUT_BBIN -554 0x0070 //TX_BF_LESSCUT_EBIN -555 0x0010 //TX_POSTBFB0 -556 0x0070 //TX_POSTBFB -557 0x00B0 //TX_POSTBFE -558 0x0E66 //TX_SPEECH_SNR_TH -559 0x0050 //TX_PB_MAX_PRI_SNR_TH -560 0x770A //TX_MAX_PRI_SNR_TH_L -561 0x0000 //TX_PFGAIN -562 0x0000 //TX_MAINTOREFR_TH -563 0x0000 //TX_SAM_MARK -564 0x0000 //TX_PB_RESRV_0 -565 0x0000 //TX_PB_RESRV_1 -566 0x0020 //TX_FDEQ_SUBNUM -567 0x4848 //TX_FDEQ_GAIN_0 -568 0x4848 //TX_FDEQ_GAIN_1 -569 0x4848 //TX_FDEQ_GAIN_2 -570 0x4848 //TX_FDEQ_GAIN_3 -571 0x4848 //TX_FDEQ_GAIN_4 -572 0x4848 //TX_FDEQ_GAIN_5 -573 0x4848 //TX_FDEQ_GAIN_6 -574 0x4848 //TX_FDEQ_GAIN_7 -575 0x4848 //TX_FDEQ_GAIN_8 -576 0x4853 //TX_FDEQ_GAIN_9 -577 0x5450 //TX_FDEQ_GAIN_10 -578 0x7465 //TX_FDEQ_GAIN_11 -579 0x807F //TX_FDEQ_GAIN_12 -580 0x82C4 //TX_FDEQ_GAIN_13 -581 0xC4C4 //TX_FDEQ_GAIN_14 -582 0xC4C4 //TX_FDEQ_GAIN_15 -583 0x4848 //TX_FDEQ_GAIN_16 -584 0x4848 //TX_FDEQ_GAIN_17 -585 0x4848 //TX_FDEQ_GAIN_18 -586 0x4848 //TX_FDEQ_GAIN_19 -587 0x4848 //TX_FDEQ_GAIN_20 -588 0x4848 //TX_FDEQ_GAIN_21 -589 0x4848 //TX_FDEQ_GAIN_22 -590 0x4848 //TX_FDEQ_GAIN_23 -591 0x0202 //TX_FDEQ_BIN_0 -592 0x0203 //TX_FDEQ_BIN_1 -593 0x0304 //TX_FDEQ_BIN_2 -594 0x0405 //TX_FDEQ_BIN_3 -595 0x0607 //TX_FDEQ_BIN_4 -596 0x0809 //TX_FDEQ_BIN_5 -597 0x0A0B //TX_FDEQ_BIN_6 -598 0x0C0D //TX_FDEQ_BIN_7 -599 0x0E0F //TX_FDEQ_BIN_8 -600 0x1011 //TX_FDEQ_BIN_9 -601 0x1214 //TX_FDEQ_BIN_10 -602 0x1618 //TX_FDEQ_BIN_11 -603 0x1C1C //TX_FDEQ_BIN_12 -604 0x2020 //TX_FDEQ_BIN_13 -605 0x2020 //TX_FDEQ_BIN_14 -606 0x2011 //TX_FDEQ_BIN_15 -607 0x0000 //TX_FDEQ_BIN_16 -608 0x0000 //TX_FDEQ_BIN_17 -609 0x0000 //TX_FDEQ_BIN_18 -610 0x0000 //TX_FDEQ_BIN_19 -611 0x0000 //TX_FDEQ_BIN_20 -612 0x0000 //TX_FDEQ_BIN_21 -613 0x0000 //TX_FDEQ_BIN_22 -614 0x0000 //TX_FDEQ_BIN_23 -615 0x0000 //TX_FDEQ_PADDING -616 0x0020 //TX_PREEQ_SUBNUM_MIC0 -617 0x4848 //TX_PREEQ_GAIN_MIC0_0 -618 0x4848 //TX_PREEQ_GAIN_MIC0_1 -619 0x4848 //TX_PREEQ_GAIN_MIC0_2 -620 0x4848 //TX_PREEQ_GAIN_MIC0_3 -621 0x4848 //TX_PREEQ_GAIN_MIC0_4 -622 0x4848 //TX_PREEQ_GAIN_MIC0_5 -623 0x4A4C //TX_PREEQ_GAIN_MIC0_6 -624 0x4E50 //TX_PREEQ_GAIN_MIC0_7 -625 0x5456 //TX_PREEQ_GAIN_MIC0_8 -626 0x585C //TX_PREEQ_GAIN_MIC0_9 -627 0x5C64 //TX_PREEQ_GAIN_MIC0_10 -628 0x7478 //TX_PREEQ_GAIN_MIC0_11 -629 0x705C //TX_PREEQ_GAIN_MIC0_12 -630 0x4838 //TX_PREEQ_GAIN_MIC0_13 -631 0x3C70 //TX_PREEQ_GAIN_MIC0_14 -632 0x4848 //TX_PREEQ_GAIN_MIC0_15 -633 0x4848 //TX_PREEQ_GAIN_MIC0_16 -634 0x4848 //TX_PREEQ_GAIN_MIC0_17 -635 0x4848 //TX_PREEQ_GAIN_MIC0_18 -636 0x4848 //TX_PREEQ_GAIN_MIC0_19 -637 0x4848 //TX_PREEQ_GAIN_MIC0_20 -638 0x4848 //TX_PREEQ_GAIN_MIC0_21 -639 0x4848 //TX_PREEQ_GAIN_MIC0_22 -640 0x4848 //TX_PREEQ_GAIN_MIC0_23 -641 0x0202 //TX_PREEQ_BIN_MIC0_0 -642 0x0203 //TX_PREEQ_BIN_MIC0_1 -643 0x0303 //TX_PREEQ_BIN_MIC0_2 -644 0x0304 //TX_PREEQ_BIN_MIC0_3 -645 0x0405 //TX_PREEQ_BIN_MIC0_4 -646 0x0506 //TX_PREEQ_BIN_MIC0_5 -647 0x0708 //TX_PREEQ_BIN_MIC0_6 -648 0x0909 //TX_PREEQ_BIN_MIC0_7 -649 0x090B //TX_PREEQ_BIN_MIC0_8 -650 0x0C10 //TX_PREEQ_BIN_MIC0_9 -651 0x1013 //TX_PREEQ_BIN_MIC0_10 -652 0x1414 //TX_PREEQ_BIN_MIC0_11 -653 0x1414 //TX_PREEQ_BIN_MIC0_12 -654 0x1C1E //TX_PREEQ_BIN_MIC0_13 -655 0x1E28 //TX_PREEQ_BIN_MIC0_14 -656 0x462C //TX_PREEQ_BIN_MIC0_15 -657 0x0000 //TX_PREEQ_BIN_MIC0_16 -658 0x0000 //TX_PREEQ_BIN_MIC0_17 -659 0x0000 //TX_PREEQ_BIN_MIC0_18 -660 0x0000 //TX_PREEQ_BIN_MIC0_19 -661 0x0000 //TX_PREEQ_BIN_MIC0_20 -662 0x0000 //TX_PREEQ_BIN_MIC0_21 -663 0x0000 //TX_PREEQ_BIN_MIC0_22 -664 0x0000 //TX_PREEQ_BIN_MIC0_23 -665 0x0030 //TX_PREEQ_SUBNUM_MIC1 -666 0x4848 //TX_PREEQ_GAIN_MIC1_0 -667 0x4848 //TX_PREEQ_GAIN_MIC1_1 -668 0x4848 //TX_PREEQ_GAIN_MIC1_2 -669 0x4848 //TX_PREEQ_GAIN_MIC1_3 -670 0x4848 //TX_PREEQ_GAIN_MIC1_4 -671 0x4848 //TX_PREEQ_GAIN_MIC1_5 -672 0x4848 //TX_PREEQ_GAIN_MIC1_6 -673 0x4848 //TX_PREEQ_GAIN_MIC1_7 -674 0x4848 //TX_PREEQ_GAIN_MIC1_8 -675 0x4848 //TX_PREEQ_GAIN_MIC1_9 -676 0x4848 //TX_PREEQ_GAIN_MIC1_10 -677 0x4848 //TX_PREEQ_GAIN_MIC1_11 -678 0x4848 //TX_PREEQ_GAIN_MIC1_12 -679 0x4848 //TX_PREEQ_GAIN_MIC1_13 -680 0x4848 //TX_PREEQ_GAIN_MIC1_14 -681 0x4848 //TX_PREEQ_GAIN_MIC1_15 -682 0x4848 //TX_PREEQ_GAIN_MIC1_16 -683 0x4848 //TX_PREEQ_GAIN_MIC1_17 -684 0x4848 //TX_PREEQ_GAIN_MIC1_18 -685 0x4848 //TX_PREEQ_GAIN_MIC1_19 -686 0x4848 //TX_PREEQ_GAIN_MIC1_20 -687 0x4848 //TX_PREEQ_GAIN_MIC1_21 -688 0x4848 //TX_PREEQ_GAIN_MIC1_22 -689 0x4848 //TX_PREEQ_GAIN_MIC1_23 -690 0x1812 //TX_PREEQ_BIN_MIC1_0 -691 0x0A0A //TX_PREEQ_BIN_MIC1_1 -692 0x0808 //TX_PREEQ_BIN_MIC1_2 -693 0x080A //TX_PREEQ_BIN_MIC1_3 -694 0x0B09 //TX_PREEQ_BIN_MIC1_4 -695 0x0A06 //TX_PREEQ_BIN_MIC1_5 -696 0x0606 //TX_PREEQ_BIN_MIC1_6 -697 0x0605 //TX_PREEQ_BIN_MIC1_7 -698 0x050A //TX_PREEQ_BIN_MIC1_8 -699 0x1505 //TX_PREEQ_BIN_MIC1_9 -700 0x0506 //TX_PREEQ_BIN_MIC1_10 -701 0x0615 //TX_PREEQ_BIN_MIC1_11 -702 0x1516 //TX_PREEQ_BIN_MIC1_12 -703 0x2021 //TX_PREEQ_BIN_MIC1_13 -704 0x2021 //TX_PREEQ_BIN_MIC1_14 -705 0x2021 //TX_PREEQ_BIN_MIC1_15 -706 0x0800 //TX_PREEQ_BIN_MIC1_16 -707 0x0000 //TX_PREEQ_BIN_MIC1_17 -708 0x0000 //TX_PREEQ_BIN_MIC1_18 -709 0x0000 //TX_PREEQ_BIN_MIC1_19 -710 0x0000 //TX_PREEQ_BIN_MIC1_20 -711 0x0000 //TX_PREEQ_BIN_MIC1_21 -712 0x0000 //TX_PREEQ_BIN_MIC1_22 -713 0x0000 //TX_PREEQ_BIN_MIC1_23 -714 0x0020 //TX_PREEQ_SUBNUM_MIC2 -715 0x4848 //TX_PREEQ_GAIN_MIC2_0 -716 0x4848 //TX_PREEQ_GAIN_MIC2_1 -717 0x4848 //TX_PREEQ_GAIN_MIC2_2 -718 0x4848 //TX_PREEQ_GAIN_MIC2_3 -719 0x4848 //TX_PREEQ_GAIN_MIC2_4 -720 0x4848 //TX_PREEQ_GAIN_MIC2_5 -721 0x4848 //TX_PREEQ_GAIN_MIC2_6 -722 0x4848 //TX_PREEQ_GAIN_MIC2_7 -723 0x4848 //TX_PREEQ_GAIN_MIC2_8 -724 0x4848 //TX_PREEQ_GAIN_MIC2_9 -725 0x4848 //TX_PREEQ_GAIN_MIC2_10 -726 0x4848 //TX_PREEQ_GAIN_MIC2_11 -727 0x4848 //TX_PREEQ_GAIN_MIC2_12 -728 0x4848 //TX_PREEQ_GAIN_MIC2_13 -729 0x4848 //TX_PREEQ_GAIN_MIC2_14 -730 0x4848 //TX_PREEQ_GAIN_MIC2_15 -731 0x4848 //TX_PREEQ_GAIN_MIC2_16 -732 0x4848 //TX_PREEQ_GAIN_MIC2_17 -733 0x4848 //TX_PREEQ_GAIN_MIC2_18 -734 0x4848 //TX_PREEQ_GAIN_MIC2_19 -735 0x4848 //TX_PREEQ_GAIN_MIC2_20 -736 0x4848 //TX_PREEQ_GAIN_MIC2_21 -737 0x4848 //TX_PREEQ_GAIN_MIC2_22 -738 0x4848 //TX_PREEQ_GAIN_MIC2_23 -739 0x0E10 //TX_PREEQ_BIN_MIC2_0 -740 0x1010 //TX_PREEQ_BIN_MIC2_1 -741 0x1010 //TX_PREEQ_BIN_MIC2_2 -742 0x1010 //TX_PREEQ_BIN_MIC2_3 -743 0x1010 //TX_PREEQ_BIN_MIC2_4 -744 0x1010 //TX_PREEQ_BIN_MIC2_5 -745 0x1010 //TX_PREEQ_BIN_MIC2_6 -746 0x1010 //TX_PREEQ_BIN_MIC2_7 -747 0x1010 //TX_PREEQ_BIN_MIC2_8 -748 0x1010 //TX_PREEQ_BIN_MIC2_9 -749 0x1010 //TX_PREEQ_BIN_MIC2_10 -750 0x1010 //TX_PREEQ_BIN_MIC2_11 -751 0x1010 //TX_PREEQ_BIN_MIC2_12 -752 0x1010 //TX_PREEQ_BIN_MIC2_13 -753 0x1010 //TX_PREEQ_BIN_MIC2_14 -754 0x0200 //TX_PREEQ_BIN_MIC2_15 -755 0x0000 //TX_PREEQ_BIN_MIC2_16 -756 0x0000 //TX_PREEQ_BIN_MIC2_17 -757 0x0000 //TX_PREEQ_BIN_MIC2_18 -758 0x0000 //TX_PREEQ_BIN_MIC2_19 -759 0x0000 //TX_PREEQ_BIN_MIC2_20 -760 0x0000 //TX_PREEQ_BIN_MIC2_21 -761 0x0000 //TX_PREEQ_BIN_MIC2_22 -762 0x0000 //TX_PREEQ_BIN_MIC2_23 -763 0x0006 //TX_MASKING_ABILITY -764 0x2000 //TX_NND_WEIGHT -765 0x0060 //TX_MIC_CALIBRATION_0 -766 0x0060 //TX_MIC_CALIBRATION_1 -767 0x0070 //TX_MIC_CALIBRATION_2 -768 0x0070 //TX_MIC_CALIBRATION_3 -769 0x0050 //TX_MIC_PWR_BIAS_0 -770 0x0040 //TX_MIC_PWR_BIAS_1 -771 0x0040 //TX_MIC_PWR_BIAS_2 -772 0x0040 //TX_MIC_PWR_BIAS_3 -773 0x0009 //TX_GAIN_LIMIT_0 -774 0x000F //TX_GAIN_LIMIT_1 -775 0x000F //TX_GAIN_LIMIT_2 -776 0x000F //TX_GAIN_LIMIT_3 -777 0x7F5B //TX_BVE_NOVAD0_ALPHADOWN -778 0x7FDE //TX_BVE_VAD0_ALPHAUP -779 0x7F3A //TX_BVE_VAD0_ALPHADOWN -780 0x2000 //TX_BVE_GAINWEIGHT_NOFEVADLI -781 0x7F5B //TX_BVE_FEVADLI_ALPHA -782 0x7F19 //TX_BVE_NOVAD0_ALPHAUP -783 0x0C00 //TX_TDDRC_ALPHA_UP_01 -784 0x0C00 //TX_TDDRC_ALPHA_UP_02 -785 0x0C00 //TX_TDDRC_ALPHA_UP_03 -786 0x0C00 //TX_TDDRC_ALPHA_UP_04 -787 0x7EB8 //TX_TDDRC_ALPHA_DWN_01 -788 0x7EB8 //TX_TDDRC_ALPHA_DWN_02 -789 0x7EB8 //TX_TDDRC_ALPHA_DWN_03 -790 0x7EB8 //TX_TDDRC_ALPHA_DWN_04 -791 0x7FFF //TX_TDDRC_TD_DRC_LIMIT -792 0x0800 //TX_TDDRC_POST_LIMIT_GAIN -793 0x0000 //TX_TDDRC_RESRV_0 -794 0x0000 //TX_TDDRC_RESRV_1 -795 0x0018 //TX_FDDRC_BAND_MARGIN_0 -796 0x0030 //TX_FDDRC_BAND_MARGIN_1 -797 0x0050 //TX_FDDRC_BAND_MARGIN_2 -798 0x0080 //TX_FDDRC_BAND_MARGIN_3 -799 0x0007 //TX_FDDRC_BLOCK_EXP -800 0x5000 //TX_FDDRC_THRD_2_0 -801 0x5000 //TX_FDDRC_THRD_2_1 -802 0x5000 //TX_FDDRC_THRD_2_2 -803 0x5000 //TX_FDDRC_THRD_2_3 -804 0x6400 //TX_FDDRC_THRD_3_0 -805 0x6400 //TX_FDDRC_THRD_3_1 -806 0x6400 //TX_FDDRC_THRD_3_2 -807 0x6400 //TX_FDDRC_THRD_3_3 -808 0x2000 //TX_FDDRC_SLANT_0_0 -809 0x2000 //TX_FDDRC_SLANT_0_1 -810 0x2000 //TX_FDDRC_SLANT_0_2 -811 0x2000 //TX_FDDRC_SLANT_0_3 -812 0x5333 //TX_FDDRC_SLANT_1_0 -813 0x5333 //TX_FDDRC_SLANT_1_1 -814 0x5333 //TX_FDDRC_SLANT_1_2 -815 0x5333 //TX_FDDRC_SLANT_1_3 -816 0x0010 //TX_DEADMIC_SILENCE_TH -817 0x0600 //TX_MIC_DEGRADE_TH -818 0x0078 //TX_DEADMIC_CNT -819 0x0078 //TX_MIC_DEGRADE_CNT -820 0x0000 //TX_FDDRC_RESRV_4 -821 0x0000 //TX_FDDRC_RESRV_5 -822 0x0000 //TX_FDDRC_RESRV_6 -823 0x7FFF //TX_KS_NOISEPASTE_FACTOR -824 0x0001 //TX_KS_CONFIG -825 0x7FFF //TX_KS_GAIN_MIN -826 0x0000 //TX_KS_RESRV_0 -827 0x0000 //TX_KS_RESRV_1 -828 0x0000 //TX_KS_RESRV_2 -829 0x7C00 //TX_LAMBDA_PKA_FP -830 0x2000 //TX_TPKA_FP -831 0x0080 //TX_MIN_G_FP -832 0x2000 //TX_MAX_G_FP -833 0x4848 //TX_FFP_FP_K_METAL -834 0x4000 //TX_A_POST_FLT_FP -835 0x0F5C //TX_RTO_OUTBEAM_TH -836 0x4CCD //TX_TPKA_FP_THD -837 0x0000 //TX_MAX_G_FP_BLK -838 0x0000 //TX_FFP_FADEIN -839 0x0000 //TX_FFP_FADEOUT -840 0x0000 //TX_WHISPERCTH -841 0x0000 //TX_WHISPERHOLDT -842 0x0000 //TX_WHISP_ENTHH -843 0x0000 //TX_WHISP_ENTHL -844 0x0000 //TX_WHISP_RTOTH -845 0x0000 //TX_WHISP_RTOTH2 -846 0x0096 //TX_MUTE_PERIOD -847 0x0000 //TX_FADE_IN_PERIOD -848 0x0100 //TX_FFP_RESRV_2 -849 0x0020 //TX_FFP_RESRV_3 -850 0x0000 //TX_FFP_RESRV_4 -851 0x0000 //TX_FFP_RESRV_5 -852 0x0000 //TX_FFP_RESRV_6 -853 0x0004 //TX_FILTINDX -854 0x0004 //TX_TDDRC_THRD_0 -855 0x0016 //TX_TDDRC_THRD_1 -856 0x1900 //TX_TDDRC_THRD_2 -857 0x1900 //TX_TDDRC_THRD_3 -858 0x3000 //TX_TDDRC_SLANT_0 -859 0x7B00 //TX_TDDRC_SLANT_1 -860 0x0C00 //TX_TDDRC_ALPHA_UP_00 -861 0x7EB8 //TX_TDDRC_ALPHA_DWN_00 -862 0x0000 //TX_TDDRC_HMNC_FLAG -863 0x199A //TX_TDDRC_HMNC_GAIN -864 0x0000 //TX_TDDRC_SMT_FLAG -865 0x0CCD //TX_TDDRC_SMT_W -866 0x0A98 //TX_TDDRC_DRC_GAIN -867 0x7FFF //TX_TDDRC_LMT_THRD -868 0x0000 //TX_TDDRC_LMT_ALPHA -869 0x0000 //TX_TFMASKLTH -870 0x0000 //TX_TFMASKLTHL -871 0x0CCD //TX_TFMASKHTH -872 0x0CCD //TX_TFMASKLTH_BINVAD -873 0xF333 //TX_TFMASKLTH_NS_EST -874 0x2CCD //TX_TFMASKLTH_DOA -875 0xECCD //TX_TFMASKTH_BLESSCUT -876 0x1000 //TX_B_LESSCUT_RTO_MASK -877 0x3800 //TX_SB_RHO_MEAN_TH_ABN -878 0x2000 //TX_B_POST_FLT_MASK -879 0x0000 //TX_B_POST_FLT_MASK1 -880 0x5333 //TX_GAIN_WIND_MASK -881 0x7FFF //TX_TFMASK_BFSTRICT_MUSIC -882 0x0000 //TX_TFMASK_BFSTRICT_NOMUSIC -883 0x7333 //TX_FASTNS_OUTIN_TH -884 0x0CCD //TX_FASTNS_TFMASK_TH -885 0x0CCD //TX_FASTNS_TFMASKBIN_TH1 -886 0x0CCD //TX_FASTNS_TFMASKBIN_TH2 -887 0x0CCD //TX_FASTNS_TFMASKBIN_TH3 -888 0x0028 //TX_FASTNS_ARSPC_TH -889 0xC000 //TX_FASTNS_MASK5_TH -890 0x4848 //TX_POSTSSA_MIN_G_VR_MASK -891 0x1000 //TX_A_LESSCUT_RTO_MASK -892 0x1770 //TX_FASTNS_NOISETH -893 0xC000 //TX_FASTNS_SSA_THLFL -894 0xC000 //TX_FASTNS_SSA_THHFL -895 0xCCCC //TX_FASTNS_SSA_THLFH -896 0xD999 //TX_FASTNS_SSA_THHFH -#RX -0 0x006C //RX_RECVFUNC_MODE_0 -1 0x0000 //RX_RECVFUNC_MODE_1 -2 0x0004 //RX_SAMPLINGFREQ_SIG -3 0x0004 //RX_SAMPLINGFREQ_PROC -4 0x000A //RX_FRAME_SZ -5 0x0000 //RX_DELAY_OPT -6 0x4000 //RX_TDDRC_ALPHA_UP_1 -7 0x4000 //RX_TDDRC_ALPHA_UP_2 -8 0x4000 //RX_TDDRC_ALPHA_UP_3 -9 0x4000 //RX_TDDRC_ALPHA_UP_4 -10 0x0800 //RX_PGA -11 0x7E56 //RX_A_HP -12 0x4000 //RX_B_PE -13 0x7800 //RX_THR_PITCH_DET_0 -14 0x7000 //RX_THR_PITCH_DET_1 -15 0x6000 //RX_THR_PITCH_DET_2 -16 0x0008 //RX_PITCH_BFR_LEN -17 0x0003 //RX_SBD_PITCH_DET -18 0x0100 //RX_PP_RESRV_0 -19 0x0020 //RX_PP_RESRV_1 -20 0x0400 //RX_N_SN_EST -21 0x000C //RX_N2_SN_EST -22 0x0014 //RX_NS_LVL_CTRL -23 0xF400 //RX_THR_SN_EST -24 0x7E00 //RX_LAMBDA_PFILT -25 0x00C8 //RX_FENS_RESRV_0 -26 0x0190 //RX_FENS_RESRV_1 -27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 -28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 -29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 -30 0x0002 //RX_EXTRA_NS_L -31 0x0800 //RX_EXTRA_NS_A -32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 -33 0x7FFF //RX_TDDRC_LIMITER_THRD -34 0x0800 //RX_TDDRC_LIMITER_GAIN -35 0x199A //RX_A_POST_FLT -36 0x0000 //RX_LMT_THRD -37 0x4000 //RX_LMT_ALPHA -38 0x0020 //RX_FDEQ_SUBNUM -39 0x4848 //RX_FDEQ_GAIN_0 -40 0x4848 //RX_FDEQ_GAIN_1 -41 0x4848 //RX_FDEQ_GAIN_2 -42 0x4850 //RX_FDEQ_GAIN_3 -43 0x4848 //RX_FDEQ_GAIN_4 -44 0x4848 //RX_FDEQ_GAIN_5 -45 0x4568 //RX_FDEQ_GAIN_6 -46 0x485C //RX_FDEQ_GAIN_7 -47 0x5C60 //RX_FDEQ_GAIN_8 -48 0x685C //RX_FDEQ_GAIN_9 -49 0x5648 //RX_FDEQ_GAIN_10 -50 0x484C //RX_FDEQ_GAIN_11 -51 0x706C //RX_FDEQ_GAIN_12 -52 0x7070 //RX_FDEQ_GAIN_13 -53 0x6868 //RX_FDEQ_GAIN_14 -54 0x6060 //RX_FDEQ_GAIN_15 -55 0x4848 //RX_FDEQ_GAIN_16 -56 0x4848 //RX_FDEQ_GAIN_17 -57 0x4848 //RX_FDEQ_GAIN_18 -58 0x4848 //RX_FDEQ_GAIN_19 -59 0x4848 //RX_FDEQ_GAIN_20 -60 0x4848 //RX_FDEQ_GAIN_21 -61 0x4848 //RX_FDEQ_GAIN_22 -62 0x4848 //RX_FDEQ_GAIN_23 -63 0x0202 //RX_FDEQ_BIN_0 -64 0x0203 //RX_FDEQ_BIN_1 -65 0x0303 //RX_FDEQ_BIN_2 -66 0x0402 //RX_FDEQ_BIN_3 -67 0x0504 //RX_FDEQ_BIN_4 -68 0x0209 //RX_FDEQ_BIN_5 -69 0x0808 //RX_FDEQ_BIN_6 -70 0x090A //RX_FDEQ_BIN_7 -71 0x0B0C //RX_FDEQ_BIN_8 -72 0x0D0E //RX_FDEQ_BIN_9 -73 0x1013 //RX_FDEQ_BIN_10 -74 0x1719 //RX_FDEQ_BIN_11 -75 0x1B1E //RX_FDEQ_BIN_12 -76 0x1E1E //RX_FDEQ_BIN_13 -77 0x1E28 //RX_FDEQ_BIN_14 -78 0x282C //RX_FDEQ_BIN_15 -79 0x0000 //RX_FDEQ_BIN_16 -80 0x0000 //RX_FDEQ_BIN_17 -81 0x0000 //RX_FDEQ_BIN_18 -82 0x0000 //RX_FDEQ_BIN_19 -83 0x0000 //RX_FDEQ_BIN_20 -84 0x0000 //RX_FDEQ_BIN_21 -85 0x0000 //RX_FDEQ_BIN_22 -86 0x0000 //RX_FDEQ_BIN_23 -87 0x4000 //RX_FDEQ_RESRV_0 -88 0x0320 //RX_FDEQ_RESRV_1 -89 0x0018 //RX_FDDRC_BAND_MARGIN_0 -90 0x0030 //RX_FDDRC_BAND_MARGIN_1 -91 0x0050 //RX_FDDRC_BAND_MARGIN_2 -92 0x0080 //RX_FDDRC_BAND_MARGIN_3 -93 0x0004 //RX_FDDRC_BLOCK_EXP -94 0x5000 //RX_FDDRC_THRD_2_0 -95 0x5000 //RX_FDDRC_THRD_2_1 -96 0x2000 //RX_FDDRC_THRD_2_2 -97 0x5000 //RX_FDDRC_THRD_2_3 -98 0x6400 //RX_FDDRC_THRD_3_0 -99 0x6400 //RX_FDDRC_THRD_3_1 -100 0x2000 //RX_FDDRC_THRD_3_2 -101 0x5000 //RX_FDDRC_THRD_3_3 -102 0x4000 //RX_FDDRC_SLANT_0_0 -103 0x4000 //RX_FDDRC_SLANT_0_1 -104 0x4000 //RX_FDDRC_SLANT_0_2 -105 0x4000 //RX_FDDRC_SLANT_0_3 -106 0x7FFF //RX_FDDRC_SLANT_1_0 -107 0x7FFF //RX_FDDRC_SLANT_1_1 -108 0x7FFF //RX_FDDRC_SLANT_1_2 -109 0x7FFF //RX_FDDRC_SLANT_1_3 -110 0x0000 //RX_FDDRC_RESRV_0 -111 0x0002 //RX_FILTINDX -112 0x0001 //RX_TDDRC_THRD_0 -113 0x0002 //RX_TDDRC_THRD_1 -114 0x1800 //RX_TDDRC_THRD_2 -115 0x1800 //RX_TDDRC_THRD_3 -116 0x6000 //RX_TDDRC_SLANT_0 -117 0x6E00 //RX_TDDRC_SLANT_1 -118 0x4000 //RX_TDDRC_ALPHA_UP_0 -119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 -120 0x0000 //RX_TDDRC_HMNC_FLAG -121 0x199A //RX_TDDRC_HMNC_GAIN -122 0x0001 //RX_TDDRC_SMT_FLAG -123 0x0CCD //RX_TDDRC_SMT_W -124 0x02D2 //RX_TDDRC_DRC_GAIN -125 0x7C00 //RX_LAMBDA_PKA_FP -126 0x2000 //RX_TPKA_FP -127 0x2000 //RX_MIN_G_FP -128 0x0080 //RX_MAX_G_FP -129 0x0013 //RX_SPK_VOL -130 0x0000 //RX_VOL_RESRV_0 -131 0x0000 //RX_MAXLEVEL_CNG -132 0x3000 //RX_BWE_UV_TH -133 0x3000 //RX_BWE_UV_TH2 -134 0x1800 //RX_BWE_UV_TH3 -135 0x1000 //RX_BWE_V_TH -136 0x04CD //RX_BWE_GAIN1_V_TH1 -137 0x0F33 //RX_BWE_GAIN1_V_TH2 -138 0x7333 //RX_BWE_UV_EQ -139 0x199A //RX_BWE_V_EQ -140 0x7333 //RX_BWE_TONE_TH -141 0x0004 //RX_BWE_UV_HOLD_T -142 0x6CCD //RX_BWE_GAIN2_ALPHA -143 0x799A //RX_BWE_GAIN3_ALPHA -144 0x001E //RX_BWE_CUTOFF -145 0x3000 //RX_BWE_GAINFILL -146 0x3200 //RX_BWE_MAXTH_TONE -147 0x2000 //RX_BWE_EQ_0 -148 0x2000 //RX_BWE_EQ_1 -149 0x2000 //RX_BWE_EQ_2 -150 0x2000 //RX_BWE_EQ_3 -151 0x2000 //RX_BWE_EQ_4 -152 0x2000 //RX_BWE_EQ_5 -153 0x2000 //RX_BWE_EQ_6 -154 0x0000 //RX_BWE_RESRV_0 -155 0x0000 //RX_BWE_RESRV_1 -156 0x0000 //RX_BWE_RESRV_2 -#VOL 0 -6 0x4000 //RX_TDDRC_ALPHA_UP_1 -7 0x4000 //RX_TDDRC_ALPHA_UP_2 -8 0x4000 //RX_TDDRC_ALPHA_UP_3 -9 0x4000 //RX_TDDRC_ALPHA_UP_4 -27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 -28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 -29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 -32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 -33 0x7FFF //RX_TDDRC_LIMITER_THRD -34 0x0800 //RX_TDDRC_LIMITER_GAIN -112 0x0001 //RX_TDDRC_THRD_0 -113 0x0002 //RX_TDDRC_THRD_1 -114 0x1800 //RX_TDDRC_THRD_2 -115 0x1800 //RX_TDDRC_THRD_3 -116 0x6000 //RX_TDDRC_SLANT_0 -117 0x6E00 //RX_TDDRC_SLANT_1 -118 0x4000 //RX_TDDRC_ALPHA_UP_0 -119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 -120 0x0000 //RX_TDDRC_HMNC_FLAG -121 0x199A //RX_TDDRC_HMNC_GAIN -122 0x0001 //RX_TDDRC_SMT_FLAG -123 0x0CCD //RX_TDDRC_SMT_W -124 0x02D2 //RX_TDDRC_DRC_GAIN -38 0x0020 //RX_FDEQ_SUBNUM -39 0x4848 //RX_FDEQ_GAIN_0 -40 0x4848 //RX_FDEQ_GAIN_1 -41 0x4848 //RX_FDEQ_GAIN_2 -42 0x4850 //RX_FDEQ_GAIN_3 -43 0x4848 //RX_FDEQ_GAIN_4 -44 0x4848 //RX_FDEQ_GAIN_5 -45 0x4568 //RX_FDEQ_GAIN_6 -46 0x485C //RX_FDEQ_GAIN_7 -47 0x5C60 //RX_FDEQ_GAIN_8 -48 0x685C //RX_FDEQ_GAIN_9 -49 0x5648 //RX_FDEQ_GAIN_10 -50 0x484C //RX_FDEQ_GAIN_11 -51 0x706C //RX_FDEQ_GAIN_12 -52 0x7070 //RX_FDEQ_GAIN_13 -53 0x6868 //RX_FDEQ_GAIN_14 -54 0x6060 //RX_FDEQ_GAIN_15 -55 0x4848 //RX_FDEQ_GAIN_16 -56 0x4848 //RX_FDEQ_GAIN_17 -57 0x4848 //RX_FDEQ_GAIN_18 -58 0x4848 //RX_FDEQ_GAIN_19 -59 0x4848 //RX_FDEQ_GAIN_20 -60 0x4848 //RX_FDEQ_GAIN_21 -61 0x4848 //RX_FDEQ_GAIN_22 -62 0x4848 //RX_FDEQ_GAIN_23 -63 0x0202 //RX_FDEQ_BIN_0 -64 0x0203 //RX_FDEQ_BIN_1 -65 0x0303 //RX_FDEQ_BIN_2 -66 0x0402 //RX_FDEQ_BIN_3 -67 0x0504 //RX_FDEQ_BIN_4 -68 0x0209 //RX_FDEQ_BIN_5 -69 0x0808 //RX_FDEQ_BIN_6 -70 0x090A //RX_FDEQ_BIN_7 -71 0x0B0C //RX_FDEQ_BIN_8 -72 0x0D0E //RX_FDEQ_BIN_9 -73 0x1013 //RX_FDEQ_BIN_10 -74 0x1719 //RX_FDEQ_BIN_11 -75 0x1B1E //RX_FDEQ_BIN_12 -76 0x1E1E //RX_FDEQ_BIN_13 -77 0x1E28 //RX_FDEQ_BIN_14 -78 0x282C //RX_FDEQ_BIN_15 -79 0x0000 //RX_FDEQ_BIN_16 -80 0x0000 //RX_FDEQ_BIN_17 -81 0x0000 //RX_FDEQ_BIN_18 -82 0x0000 //RX_FDEQ_BIN_19 -83 0x0000 //RX_FDEQ_BIN_20 -84 0x0000 //RX_FDEQ_BIN_21 -85 0x0000 //RX_FDEQ_BIN_22 -86 0x0000 //RX_FDEQ_BIN_23 -87 0x4000 //RX_FDEQ_RESRV_0 -88 0x0320 //RX_FDEQ_RESRV_1 -89 0x0018 //RX_FDDRC_BAND_MARGIN_0 -90 0x0030 //RX_FDDRC_BAND_MARGIN_1 -91 0x0050 //RX_FDDRC_BAND_MARGIN_2 -92 0x0080 //RX_FDDRC_BAND_MARGIN_3 -93 0x0004 //RX_FDDRC_BLOCK_EXP -94 0x5000 //RX_FDDRC_THRD_2_0 -95 0x5000 //RX_FDDRC_THRD_2_1 -96 0x2000 //RX_FDDRC_THRD_2_2 -97 0x5000 //RX_FDDRC_THRD_2_3 -98 0x6400 //RX_FDDRC_THRD_3_0 -99 0x6400 //RX_FDDRC_THRD_3_1 -100 0x2000 //RX_FDDRC_THRD_3_2 -101 0x5000 //RX_FDDRC_THRD_3_3 -102 0x4000 //RX_FDDRC_SLANT_0_0 -103 0x4000 //RX_FDDRC_SLANT_0_1 -104 0x4000 //RX_FDDRC_SLANT_0_2 -105 0x4000 //RX_FDDRC_SLANT_0_3 -106 0x7FFF //RX_FDDRC_SLANT_1_0 -107 0x7FFF //RX_FDDRC_SLANT_1_1 -108 0x7FFF //RX_FDDRC_SLANT_1_2 -109 0x7FFF //RX_FDDRC_SLANT_1_3 -110 0x0000 //RX_FDDRC_RESRV_0 -129 0x0013 //RX_SPK_VOL -130 0x0000 //RX_VOL_RESRV_0 -#VOL 1 -6 0x4000 //RX_TDDRC_ALPHA_UP_1 -7 0x4000 //RX_TDDRC_ALPHA_UP_2 -8 0x4000 //RX_TDDRC_ALPHA_UP_3 -9 0x4000 //RX_TDDRC_ALPHA_UP_4 -27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 -28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 -29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 -32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 -33 0x7FFF //RX_TDDRC_LIMITER_THRD -34 0x0800 //RX_TDDRC_LIMITER_GAIN -112 0x0001 //RX_TDDRC_THRD_0 -113 0x0002 //RX_TDDRC_THRD_1 -114 0x1800 //RX_TDDRC_THRD_2 -115 0x1800 //RX_TDDRC_THRD_3 -116 0x6000 //RX_TDDRC_SLANT_0 -117 0x6E00 //RX_TDDRC_SLANT_1 -118 0x4000 //RX_TDDRC_ALPHA_UP_0 -119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 -120 0x0000 //RX_TDDRC_HMNC_FLAG -121 0x199A //RX_TDDRC_HMNC_GAIN -122 0x0001 //RX_TDDRC_SMT_FLAG -123 0x0CCD //RX_TDDRC_SMT_W -124 0x02D2 //RX_TDDRC_DRC_GAIN -38 0x0020 //RX_FDEQ_SUBNUM -39 0x4848 //RX_FDEQ_GAIN_0 -40 0x4848 //RX_FDEQ_GAIN_1 -41 0x4848 //RX_FDEQ_GAIN_2 -42 0x4850 //RX_FDEQ_GAIN_3 -43 0x4848 //RX_FDEQ_GAIN_4 -44 0x4848 //RX_FDEQ_GAIN_5 -45 0x4568 //RX_FDEQ_GAIN_6 -46 0x485C //RX_FDEQ_GAIN_7 -47 0x5C60 //RX_FDEQ_GAIN_8 -48 0x685C //RX_FDEQ_GAIN_9 -49 0x5648 //RX_FDEQ_GAIN_10 -50 0x484C //RX_FDEQ_GAIN_11 -51 0x706C //RX_FDEQ_GAIN_12 -52 0x7070 //RX_FDEQ_GAIN_13 -53 0x6868 //RX_FDEQ_GAIN_14 -54 0x6060 //RX_FDEQ_GAIN_15 -55 0x4848 //RX_FDEQ_GAIN_16 -56 0x4848 //RX_FDEQ_GAIN_17 -57 0x4848 //RX_FDEQ_GAIN_18 -58 0x4848 //RX_FDEQ_GAIN_19 -59 0x4848 //RX_FDEQ_GAIN_20 -60 0x4848 //RX_FDEQ_GAIN_21 -61 0x4848 //RX_FDEQ_GAIN_22 -62 0x4848 //RX_FDEQ_GAIN_23 -63 0x0202 //RX_FDEQ_BIN_0 -64 0x0203 //RX_FDEQ_BIN_1 -65 0x0303 //RX_FDEQ_BIN_2 -66 0x0402 //RX_FDEQ_BIN_3 -67 0x0504 //RX_FDEQ_BIN_4 -68 0x0209 //RX_FDEQ_BIN_5 -69 0x0808 //RX_FDEQ_BIN_6 -70 0x090A //RX_FDEQ_BIN_7 -71 0x0B0C //RX_FDEQ_BIN_8 -72 0x0D0E //RX_FDEQ_BIN_9 -73 0x1013 //RX_FDEQ_BIN_10 -74 0x1719 //RX_FDEQ_BIN_11 -75 0x1B1E //RX_FDEQ_BIN_12 -76 0x1E1E //RX_FDEQ_BIN_13 -77 0x1E28 //RX_FDEQ_BIN_14 -78 0x282C //RX_FDEQ_BIN_15 -79 0x0000 //RX_FDEQ_BIN_16 -80 0x0000 //RX_FDEQ_BIN_17 -81 0x0000 //RX_FDEQ_BIN_18 -82 0x0000 //RX_FDEQ_BIN_19 -83 0x0000 //RX_FDEQ_BIN_20 -84 0x0000 //RX_FDEQ_BIN_21 -85 0x0000 //RX_FDEQ_BIN_22 -86 0x0000 //RX_FDEQ_BIN_23 -87 0x4000 //RX_FDEQ_RESRV_0 -88 0x0320 //RX_FDEQ_RESRV_1 -89 0x0018 //RX_FDDRC_BAND_MARGIN_0 -90 0x0030 //RX_FDDRC_BAND_MARGIN_1 -91 0x0050 //RX_FDDRC_BAND_MARGIN_2 -92 0x0080 //RX_FDDRC_BAND_MARGIN_3 -93 0x0004 //RX_FDDRC_BLOCK_EXP -94 0x5000 //RX_FDDRC_THRD_2_0 -95 0x5000 //RX_FDDRC_THRD_2_1 -96 0x2000 //RX_FDDRC_THRD_2_2 -97 0x5000 //RX_FDDRC_THRD_2_3 -98 0x6400 //RX_FDDRC_THRD_3_0 -99 0x6400 //RX_FDDRC_THRD_3_1 -100 0x2000 //RX_FDDRC_THRD_3_2 -101 0x5000 //RX_FDDRC_THRD_3_3 -102 0x4000 //RX_FDDRC_SLANT_0_0 -103 0x4000 //RX_FDDRC_SLANT_0_1 -104 0x4000 //RX_FDDRC_SLANT_0_2 -105 0x4000 //RX_FDDRC_SLANT_0_3 -106 0x7FFF //RX_FDDRC_SLANT_1_0 -107 0x7FFF //RX_FDDRC_SLANT_1_1 -108 0x7FFF //RX_FDDRC_SLANT_1_2 -109 0x7FFF //RX_FDDRC_SLANT_1_3 -110 0x0000 //RX_FDDRC_RESRV_0 -129 0x001C //RX_SPK_VOL -130 0x0000 //RX_VOL_RESRV_0 -#VOL 2 -6 0x4000 //RX_TDDRC_ALPHA_UP_1 -7 0x4000 //RX_TDDRC_ALPHA_UP_2 -8 0x4000 //RX_TDDRC_ALPHA_UP_3 -9 0x4000 //RX_TDDRC_ALPHA_UP_4 -27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 -28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 -29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 -32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 -33 0x7FFF //RX_TDDRC_LIMITER_THRD -34 0x0800 //RX_TDDRC_LIMITER_GAIN -112 0x0001 //RX_TDDRC_THRD_0 -113 0x0002 //RX_TDDRC_THRD_1 -114 0x1800 //RX_TDDRC_THRD_2 -115 0x1800 //RX_TDDRC_THRD_3 -116 0x6000 //RX_TDDRC_SLANT_0 -117 0x6E00 //RX_TDDRC_SLANT_1 -118 0x4000 //RX_TDDRC_ALPHA_UP_0 -119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 -120 0x0000 //RX_TDDRC_HMNC_FLAG -121 0x199A //RX_TDDRC_HMNC_GAIN -122 0x0001 //RX_TDDRC_SMT_FLAG -123 0x0CCD //RX_TDDRC_SMT_W -124 0x02D2 //RX_TDDRC_DRC_GAIN -38 0x0020 //RX_FDEQ_SUBNUM -39 0x4848 //RX_FDEQ_GAIN_0 -40 0x4848 //RX_FDEQ_GAIN_1 -41 0x4848 //RX_FDEQ_GAIN_2 -42 0x4850 //RX_FDEQ_GAIN_3 -43 0x4848 //RX_FDEQ_GAIN_4 -44 0x4848 //RX_FDEQ_GAIN_5 -45 0x4568 //RX_FDEQ_GAIN_6 -46 0x485C //RX_FDEQ_GAIN_7 -47 0x5C60 //RX_FDEQ_GAIN_8 -48 0x685C //RX_FDEQ_GAIN_9 -49 0x5648 //RX_FDEQ_GAIN_10 -50 0x484C //RX_FDEQ_GAIN_11 -51 0x706C //RX_FDEQ_GAIN_12 -52 0x7070 //RX_FDEQ_GAIN_13 -53 0x6868 //RX_FDEQ_GAIN_14 -54 0x6060 //RX_FDEQ_GAIN_15 -55 0x4848 //RX_FDEQ_GAIN_16 -56 0x4848 //RX_FDEQ_GAIN_17 -57 0x4848 //RX_FDEQ_GAIN_18 -58 0x4848 //RX_FDEQ_GAIN_19 -59 0x4848 //RX_FDEQ_GAIN_20 -60 0x4848 //RX_FDEQ_GAIN_21 -61 0x4848 //RX_FDEQ_GAIN_22 -62 0x4848 //RX_FDEQ_GAIN_23 -63 0x0202 //RX_FDEQ_BIN_0 -64 0x0203 //RX_FDEQ_BIN_1 -65 0x0303 //RX_FDEQ_BIN_2 -66 0x0402 //RX_FDEQ_BIN_3 -67 0x0504 //RX_FDEQ_BIN_4 -68 0x0209 //RX_FDEQ_BIN_5 -69 0x0808 //RX_FDEQ_BIN_6 -70 0x090A //RX_FDEQ_BIN_7 -71 0x0B0C //RX_FDEQ_BIN_8 -72 0x0D0E //RX_FDEQ_BIN_9 -73 0x1013 //RX_FDEQ_BIN_10 -74 0x1719 //RX_FDEQ_BIN_11 -75 0x1B1E //RX_FDEQ_BIN_12 -76 0x1E1E //RX_FDEQ_BIN_13 -77 0x1E28 //RX_FDEQ_BIN_14 -78 0x282C //RX_FDEQ_BIN_15 -79 0x0000 //RX_FDEQ_BIN_16 -80 0x0000 //RX_FDEQ_BIN_17 -81 0x0000 //RX_FDEQ_BIN_18 -82 0x0000 //RX_FDEQ_BIN_19 -83 0x0000 //RX_FDEQ_BIN_20 -84 0x0000 //RX_FDEQ_BIN_21 -85 0x0000 //RX_FDEQ_BIN_22 -86 0x0000 //RX_FDEQ_BIN_23 -87 0x4000 //RX_FDEQ_RESRV_0 -88 0x0320 //RX_FDEQ_RESRV_1 -89 0x0018 //RX_FDDRC_BAND_MARGIN_0 -90 0x0030 //RX_FDDRC_BAND_MARGIN_1 -91 0x0050 //RX_FDDRC_BAND_MARGIN_2 -92 0x0080 //RX_FDDRC_BAND_MARGIN_3 -93 0x0004 //RX_FDDRC_BLOCK_EXP -94 0x5000 //RX_FDDRC_THRD_2_0 -95 0x5000 //RX_FDDRC_THRD_2_1 -96 0x2000 //RX_FDDRC_THRD_2_2 -97 0x5000 //RX_FDDRC_THRD_2_3 -98 0x6400 //RX_FDDRC_THRD_3_0 -99 0x6400 //RX_FDDRC_THRD_3_1 -100 0x2000 //RX_FDDRC_THRD_3_2 -101 0x5000 //RX_FDDRC_THRD_3_3 -102 0x4000 //RX_FDDRC_SLANT_0_0 -103 0x4000 //RX_FDDRC_SLANT_0_1 -104 0x4000 //RX_FDDRC_SLANT_0_2 -105 0x4000 //RX_FDDRC_SLANT_0_3 -106 0x7FFF //RX_FDDRC_SLANT_1_0 -107 0x7FFF //RX_FDDRC_SLANT_1_1 -108 0x7FFF //RX_FDDRC_SLANT_1_2 -109 0x7FFF //RX_FDDRC_SLANT_1_3 -110 0x0000 //RX_FDDRC_RESRV_0 -129 0x0028 //RX_SPK_VOL -130 0x0000 //RX_VOL_RESRV_0 -#VOL 3 -6 0x4000 //RX_TDDRC_ALPHA_UP_1 -7 0x4000 //RX_TDDRC_ALPHA_UP_2 -8 0x4000 //RX_TDDRC_ALPHA_UP_3 -9 0x4000 //RX_TDDRC_ALPHA_UP_4 -27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 -28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 -29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 -32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 -33 0x7FFF //RX_TDDRC_LIMITER_THRD -34 0x0800 //RX_TDDRC_LIMITER_GAIN -112 0x0001 //RX_TDDRC_THRD_0 -113 0x0002 //RX_TDDRC_THRD_1 -114 0x1800 //RX_TDDRC_THRD_2 -115 0x1800 //RX_TDDRC_THRD_3 -116 0x6000 //RX_TDDRC_SLANT_0 -117 0x6E00 //RX_TDDRC_SLANT_1 -118 0x4000 //RX_TDDRC_ALPHA_UP_0 -119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 -120 0x0000 //RX_TDDRC_HMNC_FLAG -121 0x199A //RX_TDDRC_HMNC_GAIN -122 0x0001 //RX_TDDRC_SMT_FLAG -123 0x0CCD //RX_TDDRC_SMT_W -124 0x02D2 //RX_TDDRC_DRC_GAIN -38 0x0020 //RX_FDEQ_SUBNUM -39 0x4848 //RX_FDEQ_GAIN_0 -40 0x4848 //RX_FDEQ_GAIN_1 -41 0x4848 //RX_FDEQ_GAIN_2 -42 0x4850 //RX_FDEQ_GAIN_3 -43 0x4848 //RX_FDEQ_GAIN_4 -44 0x4848 //RX_FDEQ_GAIN_5 -45 0x4568 //RX_FDEQ_GAIN_6 -46 0x485C //RX_FDEQ_GAIN_7 -47 0x5C60 //RX_FDEQ_GAIN_8 -48 0x685C //RX_FDEQ_GAIN_9 -49 0x5648 //RX_FDEQ_GAIN_10 -50 0x484C //RX_FDEQ_GAIN_11 -51 0x706C //RX_FDEQ_GAIN_12 -52 0x7070 //RX_FDEQ_GAIN_13 -53 0x6868 //RX_FDEQ_GAIN_14 -54 0x6060 //RX_FDEQ_GAIN_15 -55 0x4848 //RX_FDEQ_GAIN_16 -56 0x4848 //RX_FDEQ_GAIN_17 -57 0x4848 //RX_FDEQ_GAIN_18 -58 0x4848 //RX_FDEQ_GAIN_19 -59 0x4848 //RX_FDEQ_GAIN_20 -60 0x4848 //RX_FDEQ_GAIN_21 -61 0x4848 //RX_FDEQ_GAIN_22 -62 0x4848 //RX_FDEQ_GAIN_23 -63 0x0202 //RX_FDEQ_BIN_0 -64 0x0203 //RX_FDEQ_BIN_1 -65 0x0303 //RX_FDEQ_BIN_2 -66 0x0402 //RX_FDEQ_BIN_3 -67 0x0504 //RX_FDEQ_BIN_4 -68 0x0209 //RX_FDEQ_BIN_5 -69 0x0808 //RX_FDEQ_BIN_6 -70 0x090A //RX_FDEQ_BIN_7 -71 0x0B0C //RX_FDEQ_BIN_8 -72 0x0D0E //RX_FDEQ_BIN_9 -73 0x1013 //RX_FDEQ_BIN_10 -74 0x1719 //RX_FDEQ_BIN_11 -75 0x1B1E //RX_FDEQ_BIN_12 -76 0x1E1E //RX_FDEQ_BIN_13 -77 0x1E28 //RX_FDEQ_BIN_14 -78 0x282C //RX_FDEQ_BIN_15 -79 0x0000 //RX_FDEQ_BIN_16 -80 0x0000 //RX_FDEQ_BIN_17 -81 0x0000 //RX_FDEQ_BIN_18 -82 0x0000 //RX_FDEQ_BIN_19 -83 0x0000 //RX_FDEQ_BIN_20 -84 0x0000 //RX_FDEQ_BIN_21 -85 0x0000 //RX_FDEQ_BIN_22 -86 0x0000 //RX_FDEQ_BIN_23 -87 0x4000 //RX_FDEQ_RESRV_0 -88 0x0320 //RX_FDEQ_RESRV_1 -89 0x0018 //RX_FDDRC_BAND_MARGIN_0 -90 0x0030 //RX_FDDRC_BAND_MARGIN_1 -91 0x0050 //RX_FDDRC_BAND_MARGIN_2 -92 0x0080 //RX_FDDRC_BAND_MARGIN_3 -93 0x0004 //RX_FDDRC_BLOCK_EXP -94 0x5000 //RX_FDDRC_THRD_2_0 -95 0x5000 //RX_FDDRC_THRD_2_1 -96 0x2000 //RX_FDDRC_THRD_2_2 -97 0x5000 //RX_FDDRC_THRD_2_3 -98 0x6400 //RX_FDDRC_THRD_3_0 -99 0x6400 //RX_FDDRC_THRD_3_1 -100 0x2000 //RX_FDDRC_THRD_3_2 -101 0x5000 //RX_FDDRC_THRD_3_3 -102 0x4000 //RX_FDDRC_SLANT_0_0 -103 0x4000 //RX_FDDRC_SLANT_0_1 -104 0x4000 //RX_FDDRC_SLANT_0_2 -105 0x4000 //RX_FDDRC_SLANT_0_3 -106 0x7FFF //RX_FDDRC_SLANT_1_0 -107 0x7FFF //RX_FDDRC_SLANT_1_1 -108 0x7FFF //RX_FDDRC_SLANT_1_2 -109 0x7FFF //RX_FDDRC_SLANT_1_3 -110 0x0000 //RX_FDDRC_RESRV_0 -129 0x0035 //RX_SPK_VOL -130 0x0000 //RX_VOL_RESRV_0 -#VOL 4 -6 0x4000 //RX_TDDRC_ALPHA_UP_1 -7 0x4000 //RX_TDDRC_ALPHA_UP_2 -8 0x4000 //RX_TDDRC_ALPHA_UP_3 -9 0x4000 //RX_TDDRC_ALPHA_UP_4 -27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 -28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 -29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 -32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 -33 0x7FFF //RX_TDDRC_LIMITER_THRD -34 0x0800 //RX_TDDRC_LIMITER_GAIN -112 0x0001 //RX_TDDRC_THRD_0 -113 0x0002 //RX_TDDRC_THRD_1 -114 0x1800 //RX_TDDRC_THRD_2 -115 0x1800 //RX_TDDRC_THRD_3 -116 0x6000 //RX_TDDRC_SLANT_0 -117 0x6E00 //RX_TDDRC_SLANT_1 -118 0x4000 //RX_TDDRC_ALPHA_UP_0 -119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 -120 0x0000 //RX_TDDRC_HMNC_FLAG -121 0x199A //RX_TDDRC_HMNC_GAIN -122 0x0001 //RX_TDDRC_SMT_FLAG -123 0x0CCD //RX_TDDRC_SMT_W -124 0x02D2 //RX_TDDRC_DRC_GAIN -38 0x0020 //RX_FDEQ_SUBNUM -39 0x4C4C //RX_FDEQ_GAIN_0 -40 0x4C4C //RX_FDEQ_GAIN_1 -41 0x4C48 //RX_FDEQ_GAIN_2 -42 0x4870 //RX_FDEQ_GAIN_3 -43 0x4848 //RX_FDEQ_GAIN_4 -44 0x4848 //RX_FDEQ_GAIN_5 -45 0x4568 //RX_FDEQ_GAIN_6 -46 0x485C //RX_FDEQ_GAIN_7 -47 0x5C60 //RX_FDEQ_GAIN_8 -48 0x685C //RX_FDEQ_GAIN_9 -49 0x5648 //RX_FDEQ_GAIN_10 -50 0x484C //RX_FDEQ_GAIN_11 -51 0x706C //RX_FDEQ_GAIN_12 -52 0x7070 //RX_FDEQ_GAIN_13 -53 0x6868 //RX_FDEQ_GAIN_14 -54 0x6060 //RX_FDEQ_GAIN_15 -55 0x4848 //RX_FDEQ_GAIN_16 -56 0x4848 //RX_FDEQ_GAIN_17 -57 0x4848 //RX_FDEQ_GAIN_18 -58 0x4848 //RX_FDEQ_GAIN_19 -59 0x4848 //RX_FDEQ_GAIN_20 -60 0x4848 //RX_FDEQ_GAIN_21 -61 0x4848 //RX_FDEQ_GAIN_22 -62 0x4848 //RX_FDEQ_GAIN_23 -63 0x0202 //RX_FDEQ_BIN_0 -64 0x0203 //RX_FDEQ_BIN_1 -65 0x0303 //RX_FDEQ_BIN_2 -66 0x0402 //RX_FDEQ_BIN_3 -67 0x0504 //RX_FDEQ_BIN_4 -68 0x0209 //RX_FDEQ_BIN_5 -69 0x0808 //RX_FDEQ_BIN_6 -70 0x090A //RX_FDEQ_BIN_7 -71 0x0B0C //RX_FDEQ_BIN_8 -72 0x0D0E //RX_FDEQ_BIN_9 -73 0x1013 //RX_FDEQ_BIN_10 -74 0x1719 //RX_FDEQ_BIN_11 -75 0x1B1E //RX_FDEQ_BIN_12 -76 0x1E1E //RX_FDEQ_BIN_13 -77 0x1E28 //RX_FDEQ_BIN_14 -78 0x282C //RX_FDEQ_BIN_15 -79 0x0000 //RX_FDEQ_BIN_16 -80 0x0000 //RX_FDEQ_BIN_17 -81 0x0000 //RX_FDEQ_BIN_18 -82 0x0000 //RX_FDEQ_BIN_19 -83 0x0000 //RX_FDEQ_BIN_20 -84 0x0000 //RX_FDEQ_BIN_21 -85 0x0000 //RX_FDEQ_BIN_22 -86 0x0000 //RX_FDEQ_BIN_23 -87 0x4000 //RX_FDEQ_RESRV_0 -88 0x0320 //RX_FDEQ_RESRV_1 -89 0x0018 //RX_FDDRC_BAND_MARGIN_0 -90 0x0030 //RX_FDDRC_BAND_MARGIN_1 -91 0x0050 //RX_FDDRC_BAND_MARGIN_2 -92 0x0080 //RX_FDDRC_BAND_MARGIN_3 -93 0x0004 //RX_FDDRC_BLOCK_EXP -94 0x5000 //RX_FDDRC_THRD_2_0 -95 0x5000 //RX_FDDRC_THRD_2_1 -96 0x2000 //RX_FDDRC_THRD_2_2 -97 0x5000 //RX_FDDRC_THRD_2_3 -98 0x6400 //RX_FDDRC_THRD_3_0 -99 0x6400 //RX_FDDRC_THRD_3_1 -100 0x2000 //RX_FDDRC_THRD_3_2 -101 0x5000 //RX_FDDRC_THRD_3_3 -102 0x4000 //RX_FDDRC_SLANT_0_0 -103 0x4000 //RX_FDDRC_SLANT_0_1 -104 0x4000 //RX_FDDRC_SLANT_0_2 -105 0x4000 //RX_FDDRC_SLANT_0_3 -106 0x7FFF //RX_FDDRC_SLANT_1_0 -107 0x7FFF //RX_FDDRC_SLANT_1_1 -108 0x7FFF //RX_FDDRC_SLANT_1_2 -109 0x7FFF //RX_FDDRC_SLANT_1_3 -110 0x0000 //RX_FDDRC_RESRV_0 -129 0x0052 //RX_SPK_VOL -130 0x0000 //RX_VOL_RESRV_0 -#VOL 5 -6 0x4000 //RX_TDDRC_ALPHA_UP_1 -7 0x4000 //RX_TDDRC_ALPHA_UP_2 -8 0x4000 //RX_TDDRC_ALPHA_UP_3 -9 0x4000 //RX_TDDRC_ALPHA_UP_4 -27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 -28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 -29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 -32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 -33 0x7FFF //RX_TDDRC_LIMITER_THRD -34 0x0800 //RX_TDDRC_LIMITER_GAIN -112 0x0001 //RX_TDDRC_THRD_0 -113 0x0002 //RX_TDDRC_THRD_1 -114 0x1800 //RX_TDDRC_THRD_2 -115 0x1800 //RX_TDDRC_THRD_3 -116 0x6000 //RX_TDDRC_SLANT_0 -117 0x6E00 //RX_TDDRC_SLANT_1 -118 0x4000 //RX_TDDRC_ALPHA_UP_0 -119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 -120 0x0000 //RX_TDDRC_HMNC_FLAG -121 0x199A //RX_TDDRC_HMNC_GAIN -122 0x0001 //RX_TDDRC_SMT_FLAG -123 0x0CCD //RX_TDDRC_SMT_W -124 0x02D2 //RX_TDDRC_DRC_GAIN -38 0x0020 //RX_FDEQ_SUBNUM -39 0x4C4C //RX_FDEQ_GAIN_0 -40 0x4C4C //RX_FDEQ_GAIN_1 -41 0x4C48 //RX_FDEQ_GAIN_2 -42 0x4870 //RX_FDEQ_GAIN_3 -43 0x4848 //RX_FDEQ_GAIN_4 -44 0x4848 //RX_FDEQ_GAIN_5 -45 0x4568 //RX_FDEQ_GAIN_6 -46 0x485C //RX_FDEQ_GAIN_7 -47 0x5C60 //RX_FDEQ_GAIN_8 -48 0x685C //RX_FDEQ_GAIN_9 -49 0x5648 //RX_FDEQ_GAIN_10 -50 0x484C //RX_FDEQ_GAIN_11 -51 0x706C //RX_FDEQ_GAIN_12 -52 0x7070 //RX_FDEQ_GAIN_13 -53 0x6868 //RX_FDEQ_GAIN_14 -54 0x6060 //RX_FDEQ_GAIN_15 -55 0x4848 //RX_FDEQ_GAIN_16 -56 0x4848 //RX_FDEQ_GAIN_17 -57 0x4848 //RX_FDEQ_GAIN_18 -58 0x4848 //RX_FDEQ_GAIN_19 -59 0x4848 //RX_FDEQ_GAIN_20 -60 0x4848 //RX_FDEQ_GAIN_21 -61 0x4848 //RX_FDEQ_GAIN_22 -62 0x4848 //RX_FDEQ_GAIN_23 -63 0x0202 //RX_FDEQ_BIN_0 -64 0x0203 //RX_FDEQ_BIN_1 -65 0x0303 //RX_FDEQ_BIN_2 -66 0x0402 //RX_FDEQ_BIN_3 -67 0x0504 //RX_FDEQ_BIN_4 -68 0x0209 //RX_FDEQ_BIN_5 -69 0x0808 //RX_FDEQ_BIN_6 -70 0x090A //RX_FDEQ_BIN_7 -71 0x0B0C //RX_FDEQ_BIN_8 -72 0x0D0E //RX_FDEQ_BIN_9 -73 0x1013 //RX_FDEQ_BIN_10 -74 0x1719 //RX_FDEQ_BIN_11 -75 0x1B1E //RX_FDEQ_BIN_12 -76 0x1E1E //RX_FDEQ_BIN_13 -77 0x1E28 //RX_FDEQ_BIN_14 -78 0x282C //RX_FDEQ_BIN_15 -79 0x0000 //RX_FDEQ_BIN_16 -80 0x0000 //RX_FDEQ_BIN_17 -81 0x0000 //RX_FDEQ_BIN_18 -82 0x0000 //RX_FDEQ_BIN_19 -83 0x0000 //RX_FDEQ_BIN_20 -84 0x0000 //RX_FDEQ_BIN_21 -85 0x0000 //RX_FDEQ_BIN_22 -86 0x0000 //RX_FDEQ_BIN_23 -87 0x4000 //RX_FDEQ_RESRV_0 -88 0x0320 //RX_FDEQ_RESRV_1 -89 0x0018 //RX_FDDRC_BAND_MARGIN_0 -90 0x0030 //RX_FDDRC_BAND_MARGIN_1 -91 0x0050 //RX_FDDRC_BAND_MARGIN_2 -92 0x0080 //RX_FDDRC_BAND_MARGIN_3 -93 0x0004 //RX_FDDRC_BLOCK_EXP -94 0x5000 //RX_FDDRC_THRD_2_0 -95 0x5000 //RX_FDDRC_THRD_2_1 -96 0x2000 //RX_FDDRC_THRD_2_2 -97 0x5000 //RX_FDDRC_THRD_2_3 -98 0x6400 //RX_FDDRC_THRD_3_0 -99 0x6400 //RX_FDDRC_THRD_3_1 -100 0x2000 //RX_FDDRC_THRD_3_2 -101 0x5000 //RX_FDDRC_THRD_3_3 -102 0x4000 //RX_FDDRC_SLANT_0_0 -103 0x4000 //RX_FDDRC_SLANT_0_1 -104 0x4000 //RX_FDDRC_SLANT_0_2 -105 0x4000 //RX_FDDRC_SLANT_0_3 -106 0x7FFF //RX_FDDRC_SLANT_1_0 -107 0x7FFF //RX_FDDRC_SLANT_1_1 -108 0x7FFF //RX_FDDRC_SLANT_1_2 -109 0x7FFF //RX_FDDRC_SLANT_1_3 -110 0x0000 //RX_FDDRC_RESRV_0 -129 0x0078 //RX_SPK_VOL -130 0x0000 //RX_VOL_RESRV_0 -#VOL 6 -6 0x4000 //RX_TDDRC_ALPHA_UP_1 -7 0x4000 //RX_TDDRC_ALPHA_UP_2 -8 0x4000 //RX_TDDRC_ALPHA_UP_3 -9 0x4000 //RX_TDDRC_ALPHA_UP_4 -27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 -28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 -29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 -32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 -33 0x7FFF //RX_TDDRC_LIMITER_THRD -34 0x0800 //RX_TDDRC_LIMITER_GAIN -112 0x0001 //RX_TDDRC_THRD_0 -113 0x0002 //RX_TDDRC_THRD_1 -114 0x1800 //RX_TDDRC_THRD_2 -115 0x1800 //RX_TDDRC_THRD_3 -116 0x6000 //RX_TDDRC_SLANT_0 -117 0x6E00 //RX_TDDRC_SLANT_1 -118 0x4000 //RX_TDDRC_ALPHA_UP_0 -119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 -120 0x0000 //RX_TDDRC_HMNC_FLAG -121 0x199A //RX_TDDRC_HMNC_GAIN -122 0x0001 //RX_TDDRC_SMT_FLAG -123 0x0CCD //RX_TDDRC_SMT_W -124 0x02D2 //RX_TDDRC_DRC_GAIN -38 0x0020 //RX_FDEQ_SUBNUM -39 0x4C4C //RX_FDEQ_GAIN_0 -40 0x4C4C //RX_FDEQ_GAIN_1 -41 0x4C48 //RX_FDEQ_GAIN_2 -42 0x4870 //RX_FDEQ_GAIN_3 -43 0x4848 //RX_FDEQ_GAIN_4 -44 0x4848 //RX_FDEQ_GAIN_5 -45 0x4568 //RX_FDEQ_GAIN_6 -46 0x485C //RX_FDEQ_GAIN_7 -47 0x5C60 //RX_FDEQ_GAIN_8 -48 0x685C //RX_FDEQ_GAIN_9 -49 0x5648 //RX_FDEQ_GAIN_10 -50 0x484C //RX_FDEQ_GAIN_11 -51 0x706C //RX_FDEQ_GAIN_12 -52 0x7070 //RX_FDEQ_GAIN_13 -53 0x6868 //RX_FDEQ_GAIN_14 -54 0x6060 //RX_FDEQ_GAIN_15 -55 0x4848 //RX_FDEQ_GAIN_16 -56 0x4848 //RX_FDEQ_GAIN_17 -57 0x4848 //RX_FDEQ_GAIN_18 -58 0x4848 //RX_FDEQ_GAIN_19 -59 0x4848 //RX_FDEQ_GAIN_20 -60 0x4848 //RX_FDEQ_GAIN_21 -61 0x4848 //RX_FDEQ_GAIN_22 -62 0x4848 //RX_FDEQ_GAIN_23 -63 0x0202 //RX_FDEQ_BIN_0 -64 0x0203 //RX_FDEQ_BIN_1 -65 0x0303 //RX_FDEQ_BIN_2 -66 0x0402 //RX_FDEQ_BIN_3 -67 0x0504 //RX_FDEQ_BIN_4 -68 0x0209 //RX_FDEQ_BIN_5 -69 0x0808 //RX_FDEQ_BIN_6 -70 0x090A //RX_FDEQ_BIN_7 -71 0x0B0C //RX_FDEQ_BIN_8 -72 0x0D0E //RX_FDEQ_BIN_9 -73 0x1013 //RX_FDEQ_BIN_10 -74 0x1719 //RX_FDEQ_BIN_11 -75 0x1B1E //RX_FDEQ_BIN_12 -76 0x1E1E //RX_FDEQ_BIN_13 -77 0x1E28 //RX_FDEQ_BIN_14 -78 0x282C //RX_FDEQ_BIN_15 -79 0x0000 //RX_FDEQ_BIN_16 -80 0x0000 //RX_FDEQ_BIN_17 -81 0x0000 //RX_FDEQ_BIN_18 -82 0x0000 //RX_FDEQ_BIN_19 -83 0x0000 //RX_FDEQ_BIN_20 -84 0x0000 //RX_FDEQ_BIN_21 -85 0x0000 //RX_FDEQ_BIN_22 -86 0x0000 //RX_FDEQ_BIN_23 -87 0x4000 //RX_FDEQ_RESRV_0 -88 0x0320 //RX_FDEQ_RESRV_1 -89 0x0018 //RX_FDDRC_BAND_MARGIN_0 -90 0x0030 //RX_FDDRC_BAND_MARGIN_1 -91 0x0050 //RX_FDDRC_BAND_MARGIN_2 -92 0x0080 //RX_FDDRC_BAND_MARGIN_3 -93 0x0004 //RX_FDDRC_BLOCK_EXP -94 0x5000 //RX_FDDRC_THRD_2_0 -95 0x5000 //RX_FDDRC_THRD_2_1 -96 0x2000 //RX_FDDRC_THRD_2_2 -97 0x5000 //RX_FDDRC_THRD_2_3 -98 0x6400 //RX_FDDRC_THRD_3_0 -99 0x6400 //RX_FDDRC_THRD_3_1 -100 0x2000 //RX_FDDRC_THRD_3_2 -101 0x5000 //RX_FDDRC_THRD_3_3 -102 0x4000 //RX_FDDRC_SLANT_0_0 -103 0x4000 //RX_FDDRC_SLANT_0_1 -104 0x4000 //RX_FDDRC_SLANT_0_2 -105 0x4000 //RX_FDDRC_SLANT_0_3 -106 0x7FFF //RX_FDDRC_SLANT_1_0 -107 0x7FFF //RX_FDDRC_SLANT_1_1 -108 0x7FFF //RX_FDDRC_SLANT_1_2 -109 0x7FFF //RX_FDDRC_SLANT_1_3 -110 0x0000 //RX_FDDRC_RESRV_0 -129 0x0100 //RX_SPK_VOL -130 0x0000 //RX_VOL_RESRV_0 - -#CASE_NAME HANDSFREE-HANDSFREE-VOICE_GENERIC-NB -#PARAM_TYPE TX+RX -#TOTAL_CUSTOM_STEP 7 -#TX -0 0x0001 //TX_OPERATION_MODE_0 -1 0x0001 //TX_OPERATION_MODE_1 -2 0x0033 //TX_PATCH_REG -3 0x2F7C //TX_SENDFUNC_MODE_0 -4 0x0001 //TX_SENDFUNC_MODE_1 -5 0x0003 //TX_NUM_MIC -6 0x0000 //TX_SAMPLINGFREQ_SIG -7 0x0000 //TX_SAMPLINGFREQ_PROC -8 0x000A //TX_FRAME_SZ_SIG -9 0x000A //TX_FRAME_SZ -10 0x0000 //TX_DELAY_OPT -11 0x0028 //TX_MAX_TAIL_LENGTH -12 0x0001 //TX_NUM_LOUTCHN -13 0x0001 //TX_MAXNUM_AECREF -14 0x0000 //TX_DBG_FUNC_REG -15 0x0000 //TX_DBG_FUNC_REG1 -16 0x0000 //TX_SYS_RESRV_0 -17 0x0000 //TX_SYS_RESRV_1 -18 0x0000 //TX_SYS_RESRV_2 -19 0x0000 //TX_SYS_RESRV_3 -20 0x0000 //TX_DIST2REF0 -21 0x00A3 //TX_DIST2REF1 -22 0x001B //TX_DIST2REF_02 -23 0x0000 //TX_DIST2REF_03 -24 0x0000 //TX_DIST2REF_04 -25 0x0000 //TX_DIST2REF_05 -26 0x0000 //TX_MMIC -27 0x1000 //TX_PGA_0 -28 0x1000 //TX_PGA_1 -29 0x1000 //TX_PGA_2 -30 0x0000 //TX_PGA_3 -31 0x0000 //TX_PGA_4 -32 0x0000 //TX_PGA_5 -33 0x0001 //TX_MIC_PAIRS -34 0x0000 //TX_MIC_PAIRS_HS -35 0x0002 //TX_MICS_FOR_BF -36 0x0000 //TX_MIC_PAIRS_FORL1 -37 0x0002 //TX_MICS_OF_PAIR0 -38 0x0002 //TX_MICS_OF_PAIR1 -39 0x0002 //TX_MICS_OF_PAIR2 -40 0x0002 //TX_MICS_OF_PAIR3 -41 0x0000 //TX_MIC_DATA_SRC0 -42 0x0002 //TX_MIC_DATA_SRC1 -43 0x0001 //TX_MIC_DATA_SRC2 -44 0x0000 //TX_MIC_DATA_SRC3 -45 0x0000 //TX_MIC_PAIR_CH_04 -46 0x0000 //TX_MIC_PAIR_CH_05 -47 0x0000 //TX_MIC_PAIR_CH_10 -48 0x0000 //TX_MIC_PAIR_CH_11 -49 0x0000 //TX_MIC_PAIR_CH_12 -50 0x0000 //TX_MIC_PAIR_CH_13 -51 0x0000 //TX_MIC_PAIR_CH_14 -52 0x05DC //TX_HD_BIN_MASK -53 0x0010 //TX_HD_SUBAND_MASK -54 0x19A1 //TX_HD_FRAME_AVG_MASK -55 0x0320 //TX_HD_MIN_FRQ -56 0x1000 //TX_HD_ALPHA_PSD -57 0x1100 //TX_T_PHPR1 -58 0x0000 //TX_T_PHPR2 -59 0x0000 //TX_T_PTPR -60 0x0000 //TX_T_PNPR -61 0x0000 //TX_T_PAPR1 -62 0xEE6C //TX_T_PSDVAT -63 0x0800 //TX_CNT -64 0x4000 //TX_ANTI_HOWL_GAIN -65 0x0001 //TX_MICFORBFMARK_0 -66 0x0001 //TX_MICFORBFMARK_1 -67 0x0001 //TX_MICFORBFMARK_2 -68 0x0001 //TX_MICFORBFMARK_3 -69 0x0001 //TX_MICFORBFMARK_4 -70 0x0001 //TX_MICFORBFMARK_5 -71 0x0000 //TX_DIST2REF_10 -72 0x3A66 //TX_DIST2REF_11 -73 0x053D //TX_DIST2REF2 -74 0x0000 //TX_DIST2REF_13 -75 0x0000 //TX_DIST2REF_14 -76 0x0000 //TX_DIST2REF_15 -77 0x0000 //TX_DIST2REF_20 -78 0x0000 //TX_DIST2REF_21 -79 0x0000 //TX_DIST2REF_22 -80 0x0000 //TX_DIST2REF_23 -81 0x0000 //TX_DIST2REF_24 -82 0x0000 //TX_DIST2REF_25 -83 0x0000 //TX_DIST2REF_30 -84 0x0000 //TX_DIST2REF_31 -85 0x0000 //TX_DIST2REF_32 -86 0x0000 //TX_DIST2REF_33 -87 0x0000 //TX_DIST2REF_34 -88 0x0000 //TX_DIST2REF_35 -89 0x0000 //TX_MIC_LOC_00 -90 0x0000 //TX_MIC_LOC_01 -91 0x0000 //TX_MIC_LOC_02 -92 0x0000 //TX_MIC_LOC_03 -93 0x0000 //TX_MIC_LOC_04 -94 0x0000 //TX_MIC_LOC_05 -95 0x0000 //TX_MIC_LOC_10 -96 0x0000 //TX_MIC_LOC_11 -97 0x0000 //TX_MIC_LOC_12 -98 0x0000 //TX_MIC_LOC_13 -99 0x0000 //TX_MIC_LOC_14 -100 0x0000 //TX_MIC_LOC_15 -101 0x0000 //TX_MIC_LOC_20 -102 0x0000 //TX_MIC_LOC_21 -103 0x0000 //TX_MIC_LOC_22 -104 0x0000 //TX_MIC_LOC_23 -105 0x0000 //TX_MIC_LOC_24 -106 0x0000 //TX_MIC_LOC_25 -107 0x0200 //TX_MIC_REFBLK_VOLUME -108 0x0CAE //TX_MIC_BLOCK_VOLUME -109 0x0000 //TX_INVERSE_MASK -110 0x0000 //TX_ADCS_MASK -111 0x04D0 //TX_ADCS_GAIN -112 0x4000 //TX_NFC_GAINFAC -113 0x0000 //TX_MAINMIC_BLKFACTOR -114 0x0000 //TX_REFMIC_BLKFACTOR -115 0x0000 //TX_BLMIC_BLKFACTOR -116 0x0000 //TX_BRMIC_BLKFACTOR -117 0x0031 //TX_MICBLK_START_BIN -118 0x0060 //TX_MICBLK_END_BIN -119 0x0015 //TX_MICBLK_FE_HOLD -120 0xFFF2 //TX_MICBLK_MR_EXP_TH -121 0xFFF2 //TX_MICBLK_LR_EXP_TH -122 0x0000 //TX_FENE_HOLD -123 0x4000 //TX_FE_ENER_TH_MTS -124 0x0004 //TX_FE_ENER_TH_EXP -125 0x6000 //TX_C_POST_FLT_MIC_MAINBLK -126 0x6000 //TX_C_POST_FLT_MIC_REFBLK -127 0x0010 //TX_MIC_BLOCK_N -128 0x7652 //TX_A_HP -129 0x4000 //TX_B_PE -130 0x5000 //TX_THR_PITCH_DET_0 -131 0x4800 //TX_THR_PITCH_DET_1 -132 0x4000 //TX_THR_PITCH_DET_2 -133 0x0008 //TX_PITCH_BFR_LEN -134 0x0003 //TX_SBD_PITCH_DET -135 0x0050 //TX_TD_AEC_L -136 0x4000 //TX_MU0_UNP_TD_AEC -137 0x1000 //TX_MU0_PTD_TD_AEC -138 0x0000 //TX_PP_RESRV_0 -139 0x2A94 //TX_PP_RESRV_1 -140 0x55F0 //TX_PP_RESRV_2 -141 0x0000 //TX_PP_RESRV_3 -142 0x0000 //TX_PP_RESRV_4 -143 0x0000 //TX_PP_RESRV_5 -144 0x0000 //TX_PP_RESRV_6 -145 0x0000 //TX_PP_RESRV_7 -146 0x0028 //TX_TAIL_LENGTH -147 0x0100 //TX_AEC_REF_GAIN_0 -148 0x0800 //TX_AEC_REF_GAIN_1 -149 0x0800 //TX_AEC_REF_GAIN_2 -150 0x7500 //TX_EAD_THR -151 0x1000 //TX_THR_RE_EST -152 0x0200 //TX_MIN_EQ_RE_EST_0 -153 0x0200 //TX_MIN_EQ_RE_EST_1 -154 0x0200 //TX_MIN_EQ_RE_EST_2 -155 0x0200 //TX_MIN_EQ_RE_EST_3 -156 0x0200 //TX_MIN_EQ_RE_EST_4 -157 0x0200 //TX_MIN_EQ_RE_EST_5 -158 0x0200 //TX_MIN_EQ_RE_EST_6 -159 0x1800 //TX_MIN_EQ_RE_EST_7 -160 0x1800 //TX_MIN_EQ_RE_EST_8 -161 0x3000 //TX_MIN_EQ_RE_EST_9 -162 0x4000 //TX_MIN_EQ_RE_EST_10 -163 0x6000 //TX_MIN_EQ_RE_EST_11 -164 0x7FFF //TX_MIN_EQ_RE_EST_12 -165 0x2000 //TX_LAMBDA_RE_EST -166 0x0000 //TX_LAMBDA_CB_NLE -167 0x7FFF //TX_C_POST_FLT -168 0x2000 //TX_GAIN_NP -169 0x0180 //TX_SE_HOLD_N -170 0x00C8 //TX_DT_HOLD_N -171 0x05DC //TX_DT2_HOLD_N -172 0x6666 //TX_AEC_RESRV_0 -173 0x0000 //TX_AEC_RESRV_1 -174 0x0014 //TX_AEC_RESRV_2 -175 0x0000 //TX_MIC_DELAY_LENGTH -176 0x0000 //TX_REF_DELAY_LENGTH -177 0x0000 //TX_ADD_LINEIN_GAINL -178 0x0000 //TX_ADD_LINEIN_GAINH -179 0x0000 //TX_MIN_EQ_RE_EST_14 -180 0x0000 //TX_DTD_THR1_8 -181 0x7FFF //TX_DTD_THR2_8 -182 0x0000 //TX_DTD_MIC_BLK2 -183 0x0008 //TX_FRQ_LIN_LEN -184 0x7FFF //TX_FRQ_AEC_LEN_RHO -185 0x6000 //TX_MU0_UNP_FRQ_AEC -186 0x4000 //TX_MU0_PTD_FRQ_AEC -187 0x000A //TX_MINENOISETH -188 0x0800 //TX_MU0_RE_EST -189 0x0001 //TX_AEC_NUM_CH -190 0x0000 //TX_BIGECHOATTENUATION_MAX -191 0x2000 //TX_A_POST_FLT_MICBLK -192 0x0000 //TX_BLKENERTH -193 0x0000 //TX_BLKENERHIGHTH -194 0x0000 //TX_NORMENERTH -195 0x0000 //TX_NORMENERHIGHTH -196 0x0000 //TX_NORMENERHIGHTHL -197 0x6590 //TX_DTD_THR1_0 -198 0x6590 //TX_DTD_THR1_1 -199 0x6590 //TX_DTD_THR1_2 -200 0x7FF0 //TX_DTD_THR1_3 -201 0x7FF0 //TX_DTD_THR1_4 -202 0x7FF0 //TX_DTD_THR1_5 -203 0x7FF0 //TX_DTD_THR1_6 -204 0x0CCD //TX_DTD_THR2_0 -205 0x0CCD //TX_DTD_THR2_1 -206 0x0CCD //TX_DTD_THR2_2 -207 0x0CCD //TX_DTD_THR2_3 -208 0x0CCD //TX_DTD_THR2_4 -209 0x0CCD //TX_DTD_THR2_5 -210 0x0CCD //TX_DTD_THR2_6 -211 0x7FFF //TX_DTD_THR3 -212 0x0000 //TX_SPK_CUT_K -213 0x157C //TX_DT_CUT_K -214 0x0100 //TX_DT_CUT_THR -215 0x04EB //TX_COMFORT_G -216 0x01F4 //TX_POWER_YOUT_TH -217 0x4000 //TX_FDPFGAINECHO -218 0x0000 //TX_DTD_HD_THR -219 0x0000 //TX_SPK_CUT_K_S -220 0x0000 //TX_DTD_MIC_BLK -221 0x1000 //TX_ADPT_STRICT_L -222 0x1000 //TX_ADPT_STRICT_H -223 0x0BB8 //TX_RATIO_DT_L_TH_LOW -224 0x3A98 //TX_RATIO_DT_H_TH_LOW -225 0x1770 //TX_RATIO_DT_L_TH_HIGH -226 0x4E20 //TX_RATIO_DT_H_TH_HIGH -227 0x09C4 //TX_RATIO_DT_L0_TH -228 0x0800 //TX_B_POST_FILT_ECHO_L -229 0x2000 //TX_B_POST_FILT_ECHO_H -230 0x0200 //TX_MIN_G_CTRL_ECHO -231 0x1000 //TX_B_LESSCUT_RTO_ECHO -232 0x0000 //TX_EPD_OFFSET_00 -233 0x0000 //TX_EPD_OFFST_01 -234 0x1388 //TX_RATIO_DT_L0_TH_HIGH -235 0x3A98 //TX_RATIO_DT_H_TH_CUT -236 0x7FFF //TX_MIN_EQ_RE_EST_13 -237 0x0000 //TX_DTD_THR1_7 -238 0x0000 //TX_DTD_THR2_7 -239 0x0800 //TX_DT_RESRV_7 -240 0x0800 //TX_DT_RESRV_8 -241 0x0000 //TX_DT_RESRV_9 -242 0xF800 //TX_THR_SN_EST_0 -243 0xFA00 //TX_THR_SN_EST_1 -244 0xFA00 //TX_THR_SN_EST_2 -245 0xF900 //TX_THR_SN_EST_3 -246 0xFA00 //TX_THR_SN_EST_4 -247 0xFA00 //TX_THR_SN_EST_5 -248 0xF800 //TX_THR_SN_EST_6 -249 0xF800 //TX_THR_SN_EST_7 -250 0x0050 //TX_DELTA_THR_SN_EST_0 -251 0x01A0 //TX_DELTA_THR_SN_EST_1 -252 0x0200 //TX_DELTA_THR_SN_EST_2 -253 0x0200 //TX_DELTA_THR_SN_EST_3 -254 0x0100 //TX_DELTA_THR_SN_EST_4 -255 0x0200 //TX_DELTA_THR_SN_EST_5 -256 0x0200 //TX_DELTA_THR_SN_EST_6 -257 0x0200 //TX_DELTA_THR_SN_EST_7 -258 0x4000 //TX_LAMBDA_NN_EST_0 -259 0x4000 //TX_LAMBDA_NN_EST_1 -260 0x4000 //TX_LAMBDA_NN_EST_2 -261 0x4000 //TX_LAMBDA_NN_EST_3 -262 0x4000 //TX_LAMBDA_NN_EST_4 -263 0x4000 //TX_LAMBDA_NN_EST_5 -264 0x4000 //TX_LAMBDA_NN_EST_6 -265 0x4000 //TX_LAMBDA_NN_EST_7 -266 0x0400 //TX_N_SN_EST -267 0x001E //TX_INBEAM_T -268 0x0041 //TX_INBEAMHOLDT -269 0x2000 //TX_G_STRICT -270 0x2000 //TX_EQ_THR_BF -271 0x7F00 //TX_LAMBDA_EQ_BF -272 0x1000 //TX_NE_RTO_TH -273 0x0400 //TX_NE_RTO_TH_L -274 0x0800 //TX_MAINREFRTOH_TH_H -275 0x0800 //TX_MAINREFRTOH_TH_L -276 0x0800 //TX_MAINREFRTO_TH_H -277 0x0800 //TX_MAINREFRTO_TH_L -278 0x0800 //TX_MAINREFRTO_TH_EQ -279 0x1000 //TX_B_POST_FLT_0 -280 0x1000 //TX_B_POST_FLT_1 -281 0x0010 //TX_NS_LVL_CTRL_0 -282 0x0012 //TX_NS_LVL_CTRL_1 -283 0x0017 //TX_NS_LVL_CTRL_2 -284 0x0015 //TX_NS_LVL_CTRL_3 -285 0x0012 //TX_NS_LVL_CTRL_4 -286 0x0012 //TX_NS_LVL_CTRL_5 -287 0x0011 //TX_NS_LVL_CTRL_6 -288 0x0011 //TX_NS_LVL_CTRL_7 -289 0x000F //TX_MIN_GAIN_S_0 -290 0x000F //TX_MIN_GAIN_S_1 -291 0x000D //TX_MIN_GAIN_S_2 -292 0x000F //TX_MIN_GAIN_S_3 -293 0x000F //TX_MIN_GAIN_S_4 -294 0x000F //TX_MIN_GAIN_S_5 -295 0x0010 //TX_MIN_GAIN_S_6 -296 0x000F //TX_MIN_GAIN_S_7 -297 0x4000 //TX_NMOS_SUP -298 0x0000 //TX_NS_MAX_PRI_SNR_TH -299 0x0000 //TX_NMOS_SUP_MENSA -300 0x7FFF //TX_SNRI_SUP_0 -301 0x4000 //TX_SNRI_SUP_1 -302 0x1000 //TX_SNRI_SUP_2 -303 0x4000 //TX_SNRI_SUP_3 -304 0x2400 //TX_SNRI_SUP_4 -305 0x4000 //TX_SNRI_SUP_5 -306 0x4000 //TX_SNRI_SUP_6 -307 0x7FFF //TX_SNRI_SUP_7 -308 0x7FFF //TX_THR_LFNS -309 0x0018 //TX_G_LFNS -310 0x09C4 //TX_GAIN0_NTH -311 0x000A //TX_MUSIC_MORENS -312 0x7FFF //TX_A_POST_FILT_0 -313 0x2000 //TX_A_POST_FILT_1 -314 0x4000 //TX_A_POST_FILT_S_0 -315 0x5000 //TX_A_POST_FILT_S_1 -316 0x2000 //TX_A_POST_FILT_S_2 -317 0x4000 //TX_A_POST_FILT_S_3 -318 0x1000 //TX_A_POST_FILT_S_4 -319 0x3000 //TX_A_POST_FILT_S_5 -320 0x5000 //TX_A_POST_FILT_S_6 -321 0x7000 //TX_A_POST_FILT_S_7 -322 0x1000 //TX_B_POST_FILT_0 -323 0x1000 //TX_B_POST_FILT_1 -324 0x1000 //TX_B_POST_FILT_2 -325 0x1000 //TX_B_POST_FILT_3 -326 0x5000 //TX_B_POST_FILT_4 -327 0x3000 //TX_B_POST_FILT_5 -328 0x1000 //TX_B_POST_FILT_6 -329 0x2000 //TX_B_POST_FILT_7 -330 0x4000 //TX_B_LESSCUT_RTO_S_0 -331 0x6000 //TX_B_LESSCUT_RTO_S_1 -332 0x6000 //TX_B_LESSCUT_RTO_S_2 -333 0x6000 //TX_B_LESSCUT_RTO_S_3 -334 0x6000 //TX_B_LESSCUT_RTO_S_4 -335 0x6000 //TX_B_LESSCUT_RTO_S_5 -336 0x6000 //TX_B_LESSCUT_RTO_S_6 -337 0x7FFF //TX_B_LESSCUT_RTO_S_7 -338 0x7E00 //TX_LAMBDA_PFILT -339 0x7D00 //TX_LAMBDA_PFILT_S_0 -340 0x7900 //TX_LAMBDA_PFILT_S_1 -341 0x7400 //TX_LAMBDA_PFILT_S_2 -342 0x7900 //TX_LAMBDA_PFILT_S_3 -343 0x7000 //TX_LAMBDA_PFILT_S_4 -344 0x7D00 //TX_LAMBDA_PFILT_S_5 -345 0x7D00 //TX_LAMBDA_PFILT_S_6 -346 0x7D00 //TX_LAMBDA_PFILT_S_7 -347 0x0200 //TX_K_PEPPER -348 0x0800 //TX_A_PEPPER -349 0x1EAA //TX_K_PEPPER_HF -350 0x0600 //TX_A_PEPPER_HF -351 0x0001 //TX_HMNC_BST_FLG -352 0x0200 //TX_HMNC_BST_THR -353 0x0800 //TX_DT_BINVAD_TH_0 -354 0x0800 //TX_DT_BINVAD_TH_1 -355 0x0800 //TX_DT_BINVAD_TH_2 -356 0x0800 //TX_DT_BINVAD_TH_3 -357 0x0FA0 //TX_DT_BINVAD_ENDF -358 0x0400 //TX_C_POST_FLT_DT -359 0x4000 //TX_NS_B_POST_FLT_LESSCUT -360 0x0100 //TX_DT_BOOST -361 0x0000 //TX_BF_SGRAD_FLG -362 0x0005 //TX_BF_DVG_TH -363 0x001E //TX_SN_C_F -364 0x0000 //TX_K_APT -365 0x0001 //TX_NOISEDET -366 0x0064 //TX_NDETCT -367 0x0050 //TX_NOISE_TH_0 -368 0x7FFF //TX_NOISE_TH_0_2 -369 0x7FFF //TX_NOISE_TH_0_3 -370 0x07D0 //TX_NOISE_TH_1 -371 0x03ED //TX_NOISE_TH_2 -372 0x2EE0 //TX_NOISE_TH_3 -373 0x5528 //TX_NOISE_TH_4 -374 0x7FFF //TX_NOISE_TH_5 -375 0x7FFF //TX_NOISE_TH_5_2 -376 0x0000 //TX_NOISE_TH_5_3 -377 0x7FFF //TX_NOISE_TH_5_4 -378 0x0FA0 //TX_NOISE_TH_6 -379 0x000A //TX_MINENOISE_TH -380 0x4000 //TX_MINENOISE_MIC0_TH_MTS -381 0xFFEE //TX_MINENOISE_MIC0_TH_EXP -382 0x6000 //TX_MINENOISE_MIC0_S_TH_MTS -383 0xFFF3 //TX_MINENOISE_MIC0_S_TH_EXP -384 0x0666 //TX_OUT_ENER_S_TH_CLEAN -385 0x0666 //TX_OUT_ENER_S_TH_LESSCLEAN -386 0x0333 //TX_OUT_ENER_S_TH_NOISY -387 0x019A //TX_OUT_ENER_TH_NOISE -388 0x1000 //TX_OUT_ENER_TH_SPEECH -389 0x2000 //TX_SN_NPB_GAIN -390 0x0000 //TX_NN_NPB_GAIN -391 0x0000 //TX_CSX_ALPHA_0 -392 0x0000 //TX_CSX_ALPHA_1 -393 0x0000 //TX_CSX_ALPHA_2 -394 0x0000 //TX_CSX_ALPHA_3 -395 0x0800 //TX_MU_ARSP_EST -396 0x00C8 //TX_P_OUTBEAM_MIN_TH -397 0x0002 //TX_EXTRA_NS_L -398 0x0800 //TX_EXTRA_NS_A -399 0x0005 //TX_VR_NOISE_FLOOR_TH -400 0x0148 //TX_MIN_G_LOW300HZ -401 0x0001 //TX_MAXLEVEL_CNG -402 0x00B4 //TX_STN_NOISE_TH -403 0x4000 //TX_POST_MASK_SUP -404 0x7FFF //TX_POST_MASK_ADJUST -405 0x00C8 //TX_NS_ENOISE_MIC0_TH -406 0x000A //TX_MINENOISE_MIC0_TH -407 0x012C //TX_MINENOISE_MIC0_S_TH -408 0x7FFF //TX_MIN_G_CTRL_SSNS -409 0x0000 //TX_METAL_RTO_THR -410 0x4848 //TX_NS_FP_K_METAL -411 0x3A98 //TX_NOISEDET_BOOST_TH -412 0x0FA0 //TX_NSMOOTH_TH -413 0x0000 //TX_NS_RESRV_8 -414 0x1800 //TX_RHO_UPB -415 0x0BB8 //TX_N_HOLD_HS -416 0x0050 //TX_N_RHO_BFR0 -417 0x7FFF //TX_LAMBDA_ARSP_EST -418 0x0100 //TX_EXTRA_GAIN_MICBLOCK -419 0x0CCD //TX_THR_STD_NSR -420 0x007A //TX_THR_STD_PLH -421 0x2AF8 //TX_N_HOLD_STD -422 0x0066 //TX_THR_STD_RHO -423 0x2000 //TX_BF_RESET_THR_HS -424 0x09C4 //TX_SB_RTO_MEAN_TH -425 0x0000 //TX_SB_RHO_MEAN_TH_NTALK -426 0x3800 //TX_SB_RTO_MEAN_TH_ABN -427 0x2EE0 //TX_SB_RTO_MEAN_TH_RUB -428 0x0000 //TX_WTA_EN_RTO_TH -429 0x0000 //TX_TOP_ENER_TH_F -430 0x0000 //TX_DESIRED_TALK_HOLDT -431 0x0800 //TX_MIC_BLOCK_FACTOR -432 0x0000 //TX_NSEST_BFRLRNRDC -433 0x0000 //TX_THR_POST_FLT_HS -434 0x0010 //TX_HS_VAD_BIN -435 0x2666 //TX_THR_VAD_HS -436 0x2CCD //TX_MEAN_RTO_MIN_TH2 -437 0x0032 //TX_SILENCE_T -438 0x0000 //TX_A_POST_FLT_WTA -439 0x799A //TX_LAMBDA_PFLT_WTA -440 0x0000 //TX_SB_RHO_MEAN2_TH -441 0x0190 //TX_SB_RHO_MEAN3_TH -442 0x0000 //TX_HS_RESRV_4 -443 0x0000 //TX_HS_RESRV_5 -444 0x003C //TX_DOA_VAD_THR_1 -445 0x0000 //TX_DOA_VAD_THR_2 -446 0x0028 //TX_DOA_VAD_THR1_0 -447 0x0028 //TX_DOA_VAD_THR1_1 -448 0x0000 //TX_SRC_DOA_RNG_LOW_0A -449 0x00B4 //TX_SRC_DOA_RNG_HIGH_0A -450 0x005A //TX_DFLT_SRC_DOA_0A -451 0x0000 //TX_SRC_DOA_RNG_LOW_0B -452 0x0000 //TX_SRC_DOA_RNG_HIGH_0B -453 0x0000 //TX_DFLT_SRC_DOA_0B -454 0x0000 //TX_SRC_DOA_RNG_LOW_0C -455 0x0000 //TX_SRC_DOA_RNG_HIGH_0C -456 0x0000 //TX_DFLT_SRC_DOA_0C -457 0x0000 //TX_SRC_DOA_RNG_LOW_0D -458 0x0000 //TX_SRC_DOA_RNG_HIGH_0D -459 0x0000 //TX_DFLT_SRC_DOA_0D -460 0x0000 //TX_SRC_DOA_RNG_LOW_1A -461 0x00B4 //TX_SRC_DOA_RNG_HIGH_1A -462 0x005A //TX_DFLT_SRC_DOA_1A -463 0x0000 //TX_SRC_DOA_RNG_LOW_1B -464 0x00B4 //TX_SRC_DOA_RNG_HIGH_1B -465 0x005A //TX_DFLT_SRC_DOA_1B -466 0x0000 //TX_SRC_DOA_RNG_LOW_1C -467 0x00B4 //TX_SRC_DOA_RNG_HIGH_1C -468 0x005A //TX_DFLT_SRC_DOA_1C -469 0x0000 //TX_SRC_DOA_RNG_LOW_1D -470 0x00B4 //TX_SRC_DOA_RNG_HIGH_1D -471 0x005A //TX_DFLT_SRC_DOA_1D -472 0x0100 //TX_BF_HOLDOFF_T -473 0x7FFF //TX_DOA_COST_FACTOR -474 0x5000 //TX_MAINTOREFR_TH0 -475 0x071C //TX_DOA_TRK_THR -476 0x012C //TX_DOA_TRACK_HT -477 0x0200 //TX_N1_HOLD_HF -478 0x0100 //TX_N2_HOLD_HF -479 0x3000 //TX_BF_RESET_THR_HF -480 0x7333 //TX_DOA_SMOOTH -481 0x0800 //TX_MU_BF -482 0x0800 //TX_BF_MU_LF_B2 -483 0x0040 //TX_BF_FC_END_BIN_B2 -484 0x0020 //TX_BF_FC_END_BIN -485 0x0000 //TX_HF_RESRV_25 -486 0x0000 //TX_HF_RESRV_26 -487 0x0007 //TX_N_DOA_SEED -488 0x0001 //TX_FINE_DOA_SEARCH_FLG -489 0x0000 //TX_HF_RESRV_27 -490 0x038E //TX_DLT_SRC_DOA_RNG -491 0x0200 //TX_BF_MU_LF -492 0x0000 //TX_DFLT_SRC_LOC_0 -493 0x7FFF //TX_DFLT_SRC_LOC_1 -494 0x0000 //TX_DFLT_SRC_LOC_2 -495 0x038E //TX_DOA_TRACK_VADTH -496 0x0000 //TX_DOA_TRACK_NEW -497 0x01E0 //TX_NOR_OFF_THR -498 0x7C00 //TX_MORE_ON_700HZ_THR -499 0x0000 //TX_MU_BF_ADPT_NS -500 0x0000 //TX_ADAPT_LEN -501 0x6666 //TX_MORE_SNS -502 0x0000 //TX_NOR_OFF_TH1 -503 0x0000 //TX_WIDE_MASK_TH -504 0xD333 //TX_SUBSNRATIOHIGH4MEANBCK_THR -505 0x7FFF //TX_C_POST_FLT_CUT -506 0x2000 //TX_RADIODTLV -507 0x0320 //TX_POWER_LINEIN_TH -508 0x0014 //TX_FE_VADCOUNT_TH_FC -509 0x0000 //TX_ECHO_SUPP_FC -510 0x0C80 //TX_ECHO_TH -511 0x6666 //TX_MIC_TO_BFGAIN -512 0x0000 //TX_MICTOBFGAIN0 -513 0x0000 //TX_FASTMUE_TH -514 0x0000 //TX_DERVB_LEN_0 -515 0x0000 //TX_DERVB_LEN_1 -516 0x0000 //TX_RHO_DERVB -517 0x0000 //TX_MIC_INDX_DERVB -518 0x0000 //TX_MU_DERVB -519 0x0000 //TX_DR_RESRV_0 -520 0x0000 //TX_DR_RESRV_1 -521 0x0000 //TX_DR_RESRV_2 -522 0x0000 //TX_DR_RESRV_3 -523 0x0000 //TX_DR_RESRV_4 -524 0x0000 //TX_DR_RESRV_5 -525 0x0000 //TX_DR_RESRV_6 -526 0x0000 //TX_DR_RESRV_7 -527 0x0000 //TX_DR_RESRV_8 -528 0x1333 //TX_WIND_MARK_TH -529 0x399A //TX_CORR_THR -530 0x0004 //TX_SNR_THR -531 0x0010 //TX_ENGY_THR -532 0x1770 //TX_CORR_HIGH_TH -533 0x6000 //TX_ENGY_THR_2 -534 0x3400 //TX_MEAN_RTO_THR -535 0x0028 //TX_WNS_ENOISE_MIC0_TH -536 0x3000 //TX_RATIOMICL_TH -537 0x64CD //TX_CALIG_HS -538 0x0000 //TX_LVL_CTRL -539 0x0014 //TX_WIND_SUPRTO -540 0x000A //TX_WNS_MIN_G -541 0x0000 //TX_WNS_B_POST_FLT -542 0x2800 //TX_RATIOMICH_TH -543 0xD120 //TX_WIND_INBEAM_L_TH -544 0x0FA0 //TX_WIND_INBEAM_H_TH -545 0x2000 //TX_WNS_RESRV_0 -546 0x59D8 //TX_WNS_RESRV_1 -547 0x0000 //TX_WNS_RESRV_2 -548 0x0000 //TX_WNS_RESRV_3 -549 0x0000 //TX_WNS_RESRV_4 -550 0x0000 //TX_WNS_RESRV_5 -551 0x0000 //TX_WNS_RESRV_6 -552 0x0000 //TX_PB_B_POST_FLT_LESSCUT -553 0x0070 //TX_BF_LESSCUT_BBIN -554 0x0070 //TX_BF_LESSCUT_EBIN -555 0x0010 //TX_POSTBFB0 -556 0x0070 //TX_POSTBFB -557 0x00B0 //TX_POSTBFE -558 0x0E66 //TX_SPEECH_SNR_TH -559 0x0050 //TX_PB_MAX_PRI_SNR_TH -560 0x770A //TX_MAX_PRI_SNR_TH_L -561 0x0000 //TX_PFGAIN -562 0x0000 //TX_MAINTOREFR_TH -563 0x0000 //TX_SAM_MARK -564 0x0000 //TX_PB_RESRV_0 -565 0x0000 //TX_PB_RESRV_1 -566 0x0014 //TX_FDEQ_SUBNUM -567 0x5858 //TX_FDEQ_GAIN_0 -568 0x514D //TX_FDEQ_GAIN_1 -569 0x4D4E //TX_FDEQ_GAIN_2 -570 0x4F48 //TX_FDEQ_GAIN_3 -571 0x3C48 //TX_FDEQ_GAIN_4 -572 0x3C48 //TX_FDEQ_GAIN_5 -573 0x4848 //TX_FDEQ_GAIN_6 -574 0x483E //TX_FDEQ_GAIN_7 -575 0x2D2C //TX_FDEQ_GAIN_8 -576 0x2E30 //TX_FDEQ_GAIN_9 -577 0x4848 //TX_FDEQ_GAIN_10 -578 0x4848 //TX_FDEQ_GAIN_11 -579 0x4848 //TX_FDEQ_GAIN_12 -580 0x4848 //TX_FDEQ_GAIN_13 -581 0x4848 //TX_FDEQ_GAIN_14 -582 0x4848 //TX_FDEQ_GAIN_15 -583 0x4848 //TX_FDEQ_GAIN_16 -584 0x4848 //TX_FDEQ_GAIN_17 -585 0x4848 //TX_FDEQ_GAIN_18 -586 0x4848 //TX_FDEQ_GAIN_19 -587 0x4848 //TX_FDEQ_GAIN_20 -588 0x4848 //TX_FDEQ_GAIN_21 -589 0x4848 //TX_FDEQ_GAIN_22 -590 0x4848 //TX_FDEQ_GAIN_23 -591 0x0202 //TX_FDEQ_BIN_0 -592 0x0203 //TX_FDEQ_BIN_1 -593 0x0303 //TX_FDEQ_BIN_2 -594 0x0304 //TX_FDEQ_BIN_3 -595 0x0405 //TX_FDEQ_BIN_4 -596 0x0506 //TX_FDEQ_BIN_5 -597 0x0708 //TX_FDEQ_BIN_6 -598 0x090A //TX_FDEQ_BIN_7 -599 0x0B0C //TX_FDEQ_BIN_8 -600 0x0D08 //TX_FDEQ_BIN_9 -601 0x0000 //TX_FDEQ_BIN_10 -602 0x0000 //TX_FDEQ_BIN_11 -603 0x0000 //TX_FDEQ_BIN_12 -604 0x0000 //TX_FDEQ_BIN_13 -605 0x0000 //TX_FDEQ_BIN_14 -606 0x0000 //TX_FDEQ_BIN_15 -607 0x0000 //TX_FDEQ_BIN_16 -608 0x0000 //TX_FDEQ_BIN_17 -609 0x0000 //TX_FDEQ_BIN_18 -610 0x0000 //TX_FDEQ_BIN_19 -611 0x0000 //TX_FDEQ_BIN_20 -612 0x0000 //TX_FDEQ_BIN_21 -613 0x0000 //TX_FDEQ_BIN_22 -614 0x0000 //TX_FDEQ_BIN_23 -615 0x0000 //TX_FDEQ_PADDING -616 0x0014 //TX_PREEQ_SUBNUM_MIC0 -617 0x4848 //TX_PREEQ_GAIN_MIC0_0 -618 0x4848 //TX_PREEQ_GAIN_MIC0_1 -619 0x4848 //TX_PREEQ_GAIN_MIC0_2 -620 0x4848 //TX_PREEQ_GAIN_MIC0_3 -621 0x4848 //TX_PREEQ_GAIN_MIC0_4 -622 0x4848 //TX_PREEQ_GAIN_MIC0_5 -623 0x4848 //TX_PREEQ_GAIN_MIC0_6 -624 0x4848 //TX_PREEQ_GAIN_MIC0_7 -625 0x4848 //TX_PREEQ_GAIN_MIC0_8 -626 0x4848 //TX_PREEQ_GAIN_MIC0_9 -627 0x4848 //TX_PREEQ_GAIN_MIC0_10 -628 0x4848 //TX_PREEQ_GAIN_MIC0_11 -629 0x4848 //TX_PREEQ_GAIN_MIC0_12 -630 0x4848 //TX_PREEQ_GAIN_MIC0_13 -631 0x4848 //TX_PREEQ_GAIN_MIC0_14 -632 0x4848 //TX_PREEQ_GAIN_MIC0_15 -633 0x4848 //TX_PREEQ_GAIN_MIC0_16 -634 0x4848 //TX_PREEQ_GAIN_MIC0_17 -635 0x4848 //TX_PREEQ_GAIN_MIC0_18 -636 0x4848 //TX_PREEQ_GAIN_MIC0_19 -637 0x4848 //TX_PREEQ_GAIN_MIC0_20 -638 0x4848 //TX_PREEQ_GAIN_MIC0_21 -639 0x4848 //TX_PREEQ_GAIN_MIC0_22 -640 0x4848 //TX_PREEQ_GAIN_MIC0_23 -641 0x0202 //TX_PREEQ_BIN_MIC0_0 -642 0x0203 //TX_PREEQ_BIN_MIC0_1 -643 0x0303 //TX_PREEQ_BIN_MIC0_2 -644 0x0304 //TX_PREEQ_BIN_MIC0_3 -645 0x0405 //TX_PREEQ_BIN_MIC0_4 -646 0x0506 //TX_PREEQ_BIN_MIC0_5 -647 0x0708 //TX_PREEQ_BIN_MIC0_6 -648 0x090A //TX_PREEQ_BIN_MIC0_7 -649 0x0B0C //TX_PREEQ_BIN_MIC0_8 -650 0x0D0E //TX_PREEQ_BIN_MIC0_9 -651 0x0000 //TX_PREEQ_BIN_MIC0_10 -652 0x0000 //TX_PREEQ_BIN_MIC0_11 -653 0x0000 //TX_PREEQ_BIN_MIC0_12 -654 0x0000 //TX_PREEQ_BIN_MIC0_13 -655 0x0000 //TX_PREEQ_BIN_MIC0_14 -656 0x0000 //TX_PREEQ_BIN_MIC0_15 -657 0x0000 //TX_PREEQ_BIN_MIC0_16 -658 0x0000 //TX_PREEQ_BIN_MIC0_17 -659 0x0000 //TX_PREEQ_BIN_MIC0_18 -660 0x0000 //TX_PREEQ_BIN_MIC0_19 -661 0x0000 //TX_PREEQ_BIN_MIC0_20 -662 0x0000 //TX_PREEQ_BIN_MIC0_21 -663 0x0000 //TX_PREEQ_BIN_MIC0_22 -664 0x0000 //TX_PREEQ_BIN_MIC0_23 -665 0x0020 //TX_PREEQ_SUBNUM_MIC1 -666 0x4848 //TX_PREEQ_GAIN_MIC1_0 -667 0x4848 //TX_PREEQ_GAIN_MIC1_1 -668 0x4848 //TX_PREEQ_GAIN_MIC1_2 -669 0x4848 //TX_PREEQ_GAIN_MIC1_3 -670 0x4848 //TX_PREEQ_GAIN_MIC1_4 -671 0x4848 //TX_PREEQ_GAIN_MIC1_5 -672 0x4848 //TX_PREEQ_GAIN_MIC1_6 -673 0x484A //TX_PREEQ_GAIN_MIC1_7 -674 0x4C4D //TX_PREEQ_GAIN_MIC1_8 -675 0x4F52 //TX_PREEQ_GAIN_MIC1_9 -676 0x4848 //TX_PREEQ_GAIN_MIC1_10 -677 0x4848 //TX_PREEQ_GAIN_MIC1_11 -678 0x4848 //TX_PREEQ_GAIN_MIC1_12 -679 0x4848 //TX_PREEQ_GAIN_MIC1_13 -680 0x4848 //TX_PREEQ_GAIN_MIC1_14 -681 0x4848 //TX_PREEQ_GAIN_MIC1_15 -682 0x4848 //TX_PREEQ_GAIN_MIC1_16 -683 0x4848 //TX_PREEQ_GAIN_MIC1_17 -684 0x4848 //TX_PREEQ_GAIN_MIC1_18 -685 0x4848 //TX_PREEQ_GAIN_MIC1_19 -686 0x4848 //TX_PREEQ_GAIN_MIC1_20 -687 0x4848 //TX_PREEQ_GAIN_MIC1_21 -688 0x4848 //TX_PREEQ_GAIN_MIC1_22 -689 0x4848 //TX_PREEQ_GAIN_MIC1_23 -690 0x0202 //TX_PREEQ_BIN_MIC1_0 -691 0x0203 //TX_PREEQ_BIN_MIC1_1 -692 0x0303 //TX_PREEQ_BIN_MIC1_2 -693 0x0304 //TX_PREEQ_BIN_MIC1_3 -694 0x0405 //TX_PREEQ_BIN_MIC1_4 -695 0x0506 //TX_PREEQ_BIN_MIC1_5 -696 0x0708 //TX_PREEQ_BIN_MIC1_6 -697 0x090A //TX_PREEQ_BIN_MIC1_7 -698 0x0B0C //TX_PREEQ_BIN_MIC1_8 -699 0x0D0E //TX_PREEQ_BIN_MIC1_9 -700 0x0000 //TX_PREEQ_BIN_MIC1_10 -701 0x0000 //TX_PREEQ_BIN_MIC1_11 -702 0x0000 //TX_PREEQ_BIN_MIC1_12 -703 0x0000 //TX_PREEQ_BIN_MIC1_13 -704 0x0000 //TX_PREEQ_BIN_MIC1_14 -705 0x0000 //TX_PREEQ_BIN_MIC1_15 -706 0x0000 //TX_PREEQ_BIN_MIC1_16 -707 0x0000 //TX_PREEQ_BIN_MIC1_17 -708 0x0000 //TX_PREEQ_BIN_MIC1_18 -709 0x0000 //TX_PREEQ_BIN_MIC1_19 -710 0x0000 //TX_PREEQ_BIN_MIC1_20 -711 0x0000 //TX_PREEQ_BIN_MIC1_21 -712 0x0000 //TX_PREEQ_BIN_MIC1_22 -713 0x0000 //TX_PREEQ_BIN_MIC1_23 -714 0x0020 //TX_PREEQ_SUBNUM_MIC2 -715 0x4848 //TX_PREEQ_GAIN_MIC2_0 -716 0x4848 //TX_PREEQ_GAIN_MIC2_1 -717 0x4848 //TX_PREEQ_GAIN_MIC2_2 -718 0x4848 //TX_PREEQ_GAIN_MIC2_3 -719 0x4848 //TX_PREEQ_GAIN_MIC2_4 -720 0x4848 //TX_PREEQ_GAIN_MIC2_5 -721 0x4848 //TX_PREEQ_GAIN_MIC2_6 -722 0x494B //TX_PREEQ_GAIN_MIC2_7 -723 0x4C4D //TX_PREEQ_GAIN_MIC2_8 -724 0x4D4D //TX_PREEQ_GAIN_MIC2_9 -725 0x4848 //TX_PREEQ_GAIN_MIC2_10 -726 0x4848 //TX_PREEQ_GAIN_MIC2_11 -727 0x4848 //TX_PREEQ_GAIN_MIC2_12 -728 0x4848 //TX_PREEQ_GAIN_MIC2_13 -729 0x4848 //TX_PREEQ_GAIN_MIC2_14 -730 0x4848 //TX_PREEQ_GAIN_MIC2_15 -731 0x4848 //TX_PREEQ_GAIN_MIC2_16 -732 0x4848 //TX_PREEQ_GAIN_MIC2_17 -733 0x4848 //TX_PREEQ_GAIN_MIC2_18 -734 0x4848 //TX_PREEQ_GAIN_MIC2_19 -735 0x4848 //TX_PREEQ_GAIN_MIC2_20 -736 0x4848 //TX_PREEQ_GAIN_MIC2_21 -737 0x4848 //TX_PREEQ_GAIN_MIC2_22 -738 0x4848 //TX_PREEQ_GAIN_MIC2_23 -739 0x0202 //TX_PREEQ_BIN_MIC2_0 -740 0x0203 //TX_PREEQ_BIN_MIC2_1 -741 0x0303 //TX_PREEQ_BIN_MIC2_2 -742 0x0304 //TX_PREEQ_BIN_MIC2_3 -743 0x0405 //TX_PREEQ_BIN_MIC2_4 -744 0x0506 //TX_PREEQ_BIN_MIC2_5 -745 0x0708 //TX_PREEQ_BIN_MIC2_6 -746 0x090A //TX_PREEQ_BIN_MIC2_7 -747 0x0B0C //TX_PREEQ_BIN_MIC2_8 -748 0x0D0E //TX_PREEQ_BIN_MIC2_9 -749 0x0000 //TX_PREEQ_BIN_MIC2_10 -750 0x0000 //TX_PREEQ_BIN_MIC2_11 -751 0x0000 //TX_PREEQ_BIN_MIC2_12 -752 0x0000 //TX_PREEQ_BIN_MIC2_13 -753 0x0000 //TX_PREEQ_BIN_MIC2_14 -754 0x0000 //TX_PREEQ_BIN_MIC2_15 -755 0x0000 //TX_PREEQ_BIN_MIC2_16 -756 0x0000 //TX_PREEQ_BIN_MIC2_17 -757 0x0000 //TX_PREEQ_BIN_MIC2_18 -758 0x0000 //TX_PREEQ_BIN_MIC2_19 -759 0x0000 //TX_PREEQ_BIN_MIC2_20 -760 0x0000 //TX_PREEQ_BIN_MIC2_21 -761 0x0000 //TX_PREEQ_BIN_MIC2_22 -762 0x0000 //TX_PREEQ_BIN_MIC2_23 -763 0x0006 //TX_MASKING_ABILITY -764 0x0800 //TX_NND_WEIGHT -765 0x0065 //TX_MIC_CALIBRATION_0 -766 0x0065 //TX_MIC_CALIBRATION_1 -767 0x0065 //TX_MIC_CALIBRATION_2 -768 0x0065 //TX_MIC_CALIBRATION_3 -769 0x0044 //TX_MIC_PWR_BIAS_0 -770 0x0044 //TX_MIC_PWR_BIAS_1 -771 0x0044 //TX_MIC_PWR_BIAS_2 -772 0x0044 //TX_MIC_PWR_BIAS_3 -773 0x0009 //TX_GAIN_LIMIT_0 -774 0x000F //TX_GAIN_LIMIT_1 -775 0x000F //TX_GAIN_LIMIT_2 -776 0x000F //TX_GAIN_LIMIT_3 -777 0x7F5B //TX_BVE_NOVAD0_ALPHADOWN -778 0x7FDE //TX_BVE_VAD0_ALPHAUP -779 0x7F3A //TX_BVE_VAD0_ALPHADOWN -780 0x2000 //TX_BVE_GAINWEIGHT_NOFEVADLI -781 0x7F5B //TX_BVE_FEVADLI_ALPHA -782 0x7F19 //TX_BVE_NOVAD0_ALPHAUP -783 0x4000 //TX_TDDRC_ALPHA_UP_01 -784 0x4000 //TX_TDDRC_ALPHA_UP_02 -785 0x4000 //TX_TDDRC_ALPHA_UP_03 -786 0x4000 //TX_TDDRC_ALPHA_UP_04 -787 0x6000 //TX_TDDRC_ALPHA_DWN_01 -788 0x7EB8 //TX_TDDRC_ALPHA_DWN_02 -789 0x7EB8 //TX_TDDRC_ALPHA_DWN_03 -790 0x7EB8 //TX_TDDRC_ALPHA_DWN_04 -791 0x7FFF //TX_TDDRC_TD_DRC_LIMIT -792 0x0800 //TX_TDDRC_POST_LIMIT_GAIN -793 0x0000 //TX_TDDRC_RESRV_0 -794 0x0000 //TX_TDDRC_RESRV_1 -795 0x0018 //TX_FDDRC_BAND_MARGIN_0 -796 0x0030 //TX_FDDRC_BAND_MARGIN_1 -797 0x0050 //TX_FDDRC_BAND_MARGIN_2 -798 0x0080 //TX_FDDRC_BAND_MARGIN_3 -799 0x0007 //TX_FDDRC_BLOCK_EXP -800 0x5000 //TX_FDDRC_THRD_2_0 -801 0x5000 //TX_FDDRC_THRD_2_1 -802 0x5000 //TX_FDDRC_THRD_2_2 -803 0x5000 //TX_FDDRC_THRD_2_3 -804 0x6400 //TX_FDDRC_THRD_3_0 -805 0x6400 //TX_FDDRC_THRD_3_1 -806 0x6400 //TX_FDDRC_THRD_3_2 -807 0x6400 //TX_FDDRC_THRD_3_3 -808 0x2000 //TX_FDDRC_SLANT_0_0 -809 0x2000 //TX_FDDRC_SLANT_0_1 -810 0x2000 //TX_FDDRC_SLANT_0_2 -811 0x2000 //TX_FDDRC_SLANT_0_3 -812 0x5333 //TX_FDDRC_SLANT_1_0 -813 0x5333 //TX_FDDRC_SLANT_1_1 -814 0x5333 //TX_FDDRC_SLANT_1_2 -815 0x5333 //TX_FDDRC_SLANT_1_3 -816 0x0010 //TX_DEADMIC_SILENCE_TH -817 0x0600 //TX_MIC_DEGRADE_TH -818 0x0078 //TX_DEADMIC_CNT -819 0x0078 //TX_MIC_DEGRADE_CNT -820 0x0000 //TX_FDDRC_RESRV_4 -821 0x0000 //TX_FDDRC_RESRV_5 -822 0x0000 //TX_FDDRC_RESRV_6 -823 0x7FFF //TX_KS_NOISEPASTE_FACTOR -824 0x0001 //TX_KS_CONFIG -825 0x7FFF //TX_KS_GAIN_MIN -826 0x0000 //TX_KS_RESRV_0 -827 0x0000 //TX_KS_RESRV_1 -828 0x0000 //TX_KS_RESRV_2 -829 0x7C00 //TX_LAMBDA_PKA_FP -830 0x2000 //TX_TPKA_FP -831 0x0080 //TX_MIN_G_FP -832 0x2000 //TX_MAX_G_FP -833 0x4848 //TX_FFP_FP_K_METAL -834 0x4000 //TX_A_POST_FLT_FP -835 0x0F5C //TX_RTO_OUTBEAM_TH -836 0x4CCD //TX_TPKA_FP_THD -837 0x0000 //TX_MAX_G_FP_BLK -838 0x0000 //TX_FFP_FADEIN -839 0x0000 //TX_FFP_FADEOUT -840 0x0000 //TX_WHISPERCTH -841 0x0000 //TX_WHISPERHOLDT -842 0x0000 //TX_WHISP_ENTHH -843 0x0000 //TX_WHISP_ENTHL -844 0x0000 //TX_WHISP_RTOTH -845 0x0000 //TX_WHISP_RTOTH2 -846 0x0096 //TX_MUTE_PERIOD -847 0x0000 //TX_FADE_IN_PERIOD -848 0x0100 //TX_FFP_RESRV_2 -849 0x0020 //TX_FFP_RESRV_3 -850 0x0000 //TX_FFP_RESRV_4 -851 0x0000 //TX_FFP_RESRV_5 -852 0x0000 //TX_FFP_RESRV_6 -853 0x0002 //TX_FILTINDX -854 0x0004 //TX_TDDRC_THRD_0 -855 0x0010 //TX_TDDRC_THRD_1 -856 0x1800 //TX_TDDRC_THRD_2 -857 0x1800 //TX_TDDRC_THRD_3 -858 0x6000 //TX_TDDRC_SLANT_0 -859 0x6000 //TX_TDDRC_SLANT_1 -860 0x4000 //TX_TDDRC_ALPHA_UP_00 -861 0x6000 //TX_TDDRC_ALPHA_DWN_00 -862 0x0000 //TX_TDDRC_HMNC_FLAG -863 0x199A //TX_TDDRC_HMNC_GAIN -864 0x0000 //TX_TDDRC_SMT_FLAG -865 0x0CCD //TX_TDDRC_SMT_W -866 0x0BE3 //TX_TDDRC_DRC_GAIN -867 0x7FFF //TX_TDDRC_LMT_THRD -868 0x0000 //TX_TDDRC_LMT_ALPHA -869 0x0000 //TX_TFMASKLTH -870 0x0000 //TX_TFMASKLTHL -871 0x0CCD //TX_TFMASKHTH -872 0x0CCD //TX_TFMASKLTH_BINVAD -873 0xF333 //TX_TFMASKLTH_NS_EST -874 0x2CCD //TX_TFMASKLTH_DOA -875 0xECCD //TX_TFMASKTH_BLESSCUT -876 0x1000 //TX_B_LESSCUT_RTO_MASK -877 0x3800 //TX_SB_RHO_MEAN_TH_ABN -878 0x2000 //TX_B_POST_FLT_MASK -879 0x0000 //TX_B_POST_FLT_MASK1 -880 0x5333 //TX_GAIN_WIND_MASK -881 0x7FFF //TX_TFMASK_BFSTRICT_MUSIC -882 0x0000 //TX_TFMASK_BFSTRICT_NOMUSIC -883 0x7333 //TX_FASTNS_OUTIN_TH -884 0x0CCD //TX_FASTNS_TFMASK_TH -885 0x0CCD //TX_FASTNS_TFMASKBIN_TH1 -886 0x0CCD //TX_FASTNS_TFMASKBIN_TH2 -887 0x0CCD //TX_FASTNS_TFMASKBIN_TH3 -888 0x0028 //TX_FASTNS_ARSPC_TH -889 0xC000 //TX_FASTNS_MASK5_TH -890 0x4848 //TX_POSTSSA_MIN_G_VR_MASK -891 0x7FFF //TX_A_LESSCUT_RTO_MASK -892 0x1770 //TX_FASTNS_NOISETH -893 0xC000 //TX_FASTNS_SSA_THLFL -894 0xC000 //TX_FASTNS_SSA_THHFL -895 0xCCCC //TX_FASTNS_SSA_THLFH -896 0xD999 //TX_FASTNS_SSA_THHFH -#RX -0 0x027C //RX_RECVFUNC_MODE_0 -1 0x0000 //RX_RECVFUNC_MODE_1 -2 0x0000 //RX_SAMPLINGFREQ_SIG -3 0x0000 //RX_SAMPLINGFREQ_PROC -4 0x000A //RX_FRAME_SZ -5 0x0000 //RX_DELAY_OPT -6 0x1000 //RX_TDDRC_ALPHA_UP_1 -7 0x1000 //RX_TDDRC_ALPHA_UP_2 -8 0x1000 //RX_TDDRC_ALPHA_UP_3 -9 0x1000 //RX_TDDRC_ALPHA_UP_4 -10 0x0800 //RX_PGA -11 0x7652 //RX_A_HP -12 0x4000 //RX_B_PE -13 0x7800 //RX_THR_PITCH_DET_0 -14 0x7000 //RX_THR_PITCH_DET_1 -15 0x6000 //RX_THR_PITCH_DET_2 -16 0x0008 //RX_PITCH_BFR_LEN -17 0x0003 //RX_SBD_PITCH_DET -18 0x0100 //RX_PP_RESRV_0 -19 0x0020 //RX_PP_RESRV_1 -20 0x0400 //RX_N_SN_EST -21 0x000C //RX_N2_SN_EST -22 0x0010 //RX_NS_LVL_CTRL -23 0xF800 //RX_THR_SN_EST -24 0x7E00 //RX_LAMBDA_PFILT -25 0x000A //RX_FENS_RESRV_0 -26 0x0190 //RX_FENS_RESRV_1 -27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 -28 0x4000 //RX_TDDRC_ALPHA_DWN_2 -29 0x4000 //RX_TDDRC_ALPHA_DWN_3 -30 0x0002 //RX_EXTRA_NS_L -31 0x0800 //RX_EXTRA_NS_A -32 0x4000 //RX_TDDRC_ALPHA_DWN_4 -33 0x7214 //RX_TDDRC_LIMITER_THRD -34 0x0800 //RX_TDDRC_LIMITER_GAIN -35 0x199A //RX_A_POST_FLT -36 0x0000 //RX_LMT_THRD -37 0x4000 //RX_LMT_ALPHA -38 0x0014 //RX_FDEQ_SUBNUM -39 0x8080 //RX_FDEQ_GAIN_0 -40 0x8058 //RX_FDEQ_GAIN_1 -41 0x5454 //RX_FDEQ_GAIN_2 -42 0x545C //RX_FDEQ_GAIN_3 -43 0x6448 //RX_FDEQ_GAIN_4 -44 0x4848 //RX_FDEQ_GAIN_5 -45 0x5848 //RX_FDEQ_GAIN_6 -46 0x4848 //RX_FDEQ_GAIN_7 -47 0x485A //RX_FDEQ_GAIN_8 -48 0x5A58 //RX_FDEQ_GAIN_9 -49 0x4848 //RX_FDEQ_GAIN_10 -50 0x4848 //RX_FDEQ_GAIN_11 -51 0x4848 //RX_FDEQ_GAIN_12 -52 0x4848 //RX_FDEQ_GAIN_13 -53 0x4848 //RX_FDEQ_GAIN_14 -54 0x4848 //RX_FDEQ_GAIN_15 -55 0x4848 //RX_FDEQ_GAIN_16 -56 0x4848 //RX_FDEQ_GAIN_17 -57 0x4848 //RX_FDEQ_GAIN_18 -58 0x4848 //RX_FDEQ_GAIN_19 -59 0x4848 //RX_FDEQ_GAIN_20 -60 0x4848 //RX_FDEQ_GAIN_21 -61 0x4848 //RX_FDEQ_GAIN_22 -62 0x4848 //RX_FDEQ_GAIN_23 -63 0x0202 //RX_FDEQ_BIN_0 -64 0x0203 //RX_FDEQ_BIN_1 -65 0x0303 //RX_FDEQ_BIN_2 -66 0x0304 //RX_FDEQ_BIN_3 -67 0x0405 //RX_FDEQ_BIN_4 -68 0x0506 //RX_FDEQ_BIN_5 -69 0x0708 //RX_FDEQ_BIN_6 -70 0x090A //RX_FDEQ_BIN_7 -71 0x0B0C //RX_FDEQ_BIN_8 -72 0x0D08 //RX_FDEQ_BIN_9 -73 0x0000 //RX_FDEQ_BIN_10 -74 0x0000 //RX_FDEQ_BIN_11 -75 0x0000 //RX_FDEQ_BIN_12 -76 0x0000 //RX_FDEQ_BIN_13 -77 0x0000 //RX_FDEQ_BIN_14 -78 0x0000 //RX_FDEQ_BIN_15 -79 0x0000 //RX_FDEQ_BIN_16 -80 0x0000 //RX_FDEQ_BIN_17 -81 0x0000 //RX_FDEQ_BIN_18 -82 0x0000 //RX_FDEQ_BIN_19 -83 0x0000 //RX_FDEQ_BIN_20 -84 0x0000 //RX_FDEQ_BIN_21 -85 0x0000 //RX_FDEQ_BIN_22 -86 0x0000 //RX_FDEQ_BIN_23 -87 0x4000 //RX_FDEQ_RESRV_0 -88 0x0320 //RX_FDEQ_RESRV_1 -89 0x0018 //RX_FDDRC_BAND_MARGIN_0 -90 0x0035 //RX_FDDRC_BAND_MARGIN_1 -91 0x0060 //RX_FDDRC_BAND_MARGIN_2 -92 0x0080 //RX_FDDRC_BAND_MARGIN_3 -93 0x0004 //RX_FDDRC_BLOCK_EXP -94 0x0600 //RX_FDDRC_THRD_2_0 -95 0x0600 //RX_FDDRC_THRD_2_1 -96 0x0600 //RX_FDDRC_THRD_2_2 -97 0x0600 //RX_FDDRC_THRD_2_3 -98 0x0800 //RX_FDDRC_THRD_3_0 -99 0x0800 //RX_FDDRC_THRD_3_1 -100 0x0800 //RX_FDDRC_THRD_3_2 -101 0x0800 //RX_FDDRC_THRD_3_3 -102 0x0000 //RX_FDDRC_SLANT_0_0 -103 0x0000 //RX_FDDRC_SLANT_0_1 -104 0x0000 //RX_FDDRC_SLANT_0_2 -105 0x0000 //RX_FDDRC_SLANT_0_3 -106 0x7FFF //RX_FDDRC_SLANT_1_0 -107 0x7FFF //RX_FDDRC_SLANT_1_1 -108 0x7FFF //RX_FDDRC_SLANT_1_2 -109 0x7FFF //RX_FDDRC_SLANT_1_3 -110 0x0000 //RX_FDDRC_RESRV_0 -111 0x0005 //RX_FILTINDX -112 0x0002 //RX_TDDRC_THRD_0 -113 0x0004 //RX_TDDRC_THRD_1 -114 0x1A00 //RX_TDDRC_THRD_2 -115 0x1A00 //RX_TDDRC_THRD_3 -116 0x7FFF //RX_TDDRC_SLANT_0 -117 0x7FFF //RX_TDDRC_SLANT_1 -118 0x1000 //RX_TDDRC_ALPHA_UP_0 -119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 -120 0x0000 //RX_TDDRC_HMNC_FLAG -121 0x199A //RX_TDDRC_HMNC_GAIN -122 0x0001 //RX_TDDRC_SMT_FLAG -123 0x0CCD //RX_TDDRC_SMT_W -124 0x0700 //RX_TDDRC_DRC_GAIN -125 0x7C00 //RX_LAMBDA_PKA_FP -126 0x2000 //RX_TPKA_FP -127 0x2000 //RX_MIN_G_FP -128 0x0080 //RX_MAX_G_FP -129 0x0016 //RX_SPK_VOL -130 0x0000 //RX_VOL_RESRV_0 -131 0x0000 //RX_MAXLEVEL_CNG -132 0x3000 //RX_BWE_UV_TH -133 0x3000 //RX_BWE_UV_TH2 -134 0x1800 //RX_BWE_UV_TH3 -135 0x1000 //RX_BWE_V_TH -136 0x04CD //RX_BWE_GAIN1_V_TH1 -137 0x0F33 //RX_BWE_GAIN1_V_TH2 -138 0x7333 //RX_BWE_UV_EQ -139 0x199A //RX_BWE_V_EQ -140 0x7333 //RX_BWE_TONE_TH -141 0x0004 //RX_BWE_UV_HOLD_T -142 0x6CCD //RX_BWE_GAIN2_ALPHA -143 0x799A //RX_BWE_GAIN3_ALPHA -144 0x001E //RX_BWE_CUTOFF -145 0x3000 //RX_BWE_GAINFILL -146 0x3200 //RX_BWE_MAXTH_TONE -147 0x2000 //RX_BWE_EQ_0 -148 0x2000 //RX_BWE_EQ_1 -149 0x2000 //RX_BWE_EQ_2 -150 0x2000 //RX_BWE_EQ_3 -151 0x2000 //RX_BWE_EQ_4 -152 0x2000 //RX_BWE_EQ_5 -153 0x2000 //RX_BWE_EQ_6 -154 0x0000 //RX_BWE_RESRV_0 -155 0x0000 //RX_BWE_RESRV_1 -156 0x0000 //RX_BWE_RESRV_2 -#VOL 0 -6 0x1000 //RX_TDDRC_ALPHA_UP_1 -7 0x1000 //RX_TDDRC_ALPHA_UP_2 -8 0x1000 //RX_TDDRC_ALPHA_UP_3 -9 0x1000 //RX_TDDRC_ALPHA_UP_4 -27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 -28 0x4000 //RX_TDDRC_ALPHA_DWN_2 -29 0x4000 //RX_TDDRC_ALPHA_DWN_3 -32 0x4000 //RX_TDDRC_ALPHA_DWN_4 -33 0x7214 //RX_TDDRC_LIMITER_THRD -34 0x0800 //RX_TDDRC_LIMITER_GAIN -112 0x0002 //RX_TDDRC_THRD_0 -113 0x0004 //RX_TDDRC_THRD_1 -114 0x1A00 //RX_TDDRC_THRD_2 -115 0x1A00 //RX_TDDRC_THRD_3 -116 0x7FFF //RX_TDDRC_SLANT_0 -117 0x7FFF //RX_TDDRC_SLANT_1 -118 0x1000 //RX_TDDRC_ALPHA_UP_0 -119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 -120 0x0000 //RX_TDDRC_HMNC_FLAG -121 0x199A //RX_TDDRC_HMNC_GAIN -122 0x0001 //RX_TDDRC_SMT_FLAG -123 0x0CCD //RX_TDDRC_SMT_W -124 0x0700 //RX_TDDRC_DRC_GAIN -38 0x0014 //RX_FDEQ_SUBNUM -39 0x8080 //RX_FDEQ_GAIN_0 -40 0x8058 //RX_FDEQ_GAIN_1 -41 0x5454 //RX_FDEQ_GAIN_2 -42 0x545C //RX_FDEQ_GAIN_3 -43 0x6448 //RX_FDEQ_GAIN_4 -44 0x4848 //RX_FDEQ_GAIN_5 -45 0x5848 //RX_FDEQ_GAIN_6 -46 0x4848 //RX_FDEQ_GAIN_7 -47 0x485A //RX_FDEQ_GAIN_8 -48 0x5A58 //RX_FDEQ_GAIN_9 -49 0x4848 //RX_FDEQ_GAIN_10 -50 0x4848 //RX_FDEQ_GAIN_11 -51 0x4848 //RX_FDEQ_GAIN_12 -52 0x4848 //RX_FDEQ_GAIN_13 -53 0x4848 //RX_FDEQ_GAIN_14 -54 0x4848 //RX_FDEQ_GAIN_15 -55 0x4848 //RX_FDEQ_GAIN_16 -56 0x4848 //RX_FDEQ_GAIN_17 -57 0x4848 //RX_FDEQ_GAIN_18 -58 0x4848 //RX_FDEQ_GAIN_19 -59 0x4848 //RX_FDEQ_GAIN_20 -60 0x4848 //RX_FDEQ_GAIN_21 -61 0x4848 //RX_FDEQ_GAIN_22 -62 0x4848 //RX_FDEQ_GAIN_23 -63 0x0202 //RX_FDEQ_BIN_0 -64 0x0203 //RX_FDEQ_BIN_1 -65 0x0303 //RX_FDEQ_BIN_2 -66 0x0304 //RX_FDEQ_BIN_3 -67 0x0405 //RX_FDEQ_BIN_4 -68 0x0506 //RX_FDEQ_BIN_5 -69 0x0708 //RX_FDEQ_BIN_6 -70 0x090A //RX_FDEQ_BIN_7 -71 0x0B0C //RX_FDEQ_BIN_8 -72 0x0D08 //RX_FDEQ_BIN_9 -73 0x0000 //RX_FDEQ_BIN_10 -74 0x0000 //RX_FDEQ_BIN_11 -75 0x0000 //RX_FDEQ_BIN_12 -76 0x0000 //RX_FDEQ_BIN_13 -77 0x0000 //RX_FDEQ_BIN_14 -78 0x0000 //RX_FDEQ_BIN_15 -79 0x0000 //RX_FDEQ_BIN_16 -80 0x0000 //RX_FDEQ_BIN_17 -81 0x0000 //RX_FDEQ_BIN_18 -82 0x0000 //RX_FDEQ_BIN_19 -83 0x0000 //RX_FDEQ_BIN_20 -84 0x0000 //RX_FDEQ_BIN_21 -85 0x0000 //RX_FDEQ_BIN_22 -86 0x0000 //RX_FDEQ_BIN_23 -87 0x4000 //RX_FDEQ_RESRV_0 -88 0x0320 //RX_FDEQ_RESRV_1 -89 0x0018 //RX_FDDRC_BAND_MARGIN_0 -90 0x0035 //RX_FDDRC_BAND_MARGIN_1 -91 0x0060 //RX_FDDRC_BAND_MARGIN_2 -92 0x0080 //RX_FDDRC_BAND_MARGIN_3 -93 0x0004 //RX_FDDRC_BLOCK_EXP -94 0x0600 //RX_FDDRC_THRD_2_0 -95 0x0600 //RX_FDDRC_THRD_2_1 -96 0x0600 //RX_FDDRC_THRD_2_2 -97 0x0600 //RX_FDDRC_THRD_2_3 -98 0x0800 //RX_FDDRC_THRD_3_0 -99 0x0800 //RX_FDDRC_THRD_3_1 -100 0x0800 //RX_FDDRC_THRD_3_2 -101 0x0800 //RX_FDDRC_THRD_3_3 -102 0x0000 //RX_FDDRC_SLANT_0_0 -103 0x0000 //RX_FDDRC_SLANT_0_1 -104 0x0000 //RX_FDDRC_SLANT_0_2 -105 0x0000 //RX_FDDRC_SLANT_0_3 -106 0x7FFF //RX_FDDRC_SLANT_1_0 -107 0x7FFF //RX_FDDRC_SLANT_1_1 -108 0x7FFF //RX_FDDRC_SLANT_1_2 -109 0x7FFF //RX_FDDRC_SLANT_1_3 -110 0x0000 //RX_FDDRC_RESRV_0 -129 0x0016 //RX_SPK_VOL -130 0x0000 //RX_VOL_RESRV_0 -#VOL 1 -6 0x1000 //RX_TDDRC_ALPHA_UP_1 -7 0x1000 //RX_TDDRC_ALPHA_UP_2 -8 0x1000 //RX_TDDRC_ALPHA_UP_3 -9 0x1000 //RX_TDDRC_ALPHA_UP_4 -27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 -28 0x4000 //RX_TDDRC_ALPHA_DWN_2 -29 0x4000 //RX_TDDRC_ALPHA_DWN_3 -32 0x4000 //RX_TDDRC_ALPHA_DWN_4 -33 0x7214 //RX_TDDRC_LIMITER_THRD -34 0x0800 //RX_TDDRC_LIMITER_GAIN -112 0x0002 //RX_TDDRC_THRD_0 -113 0x0004 //RX_TDDRC_THRD_1 -114 0x1A00 //RX_TDDRC_THRD_2 -115 0x1A00 //RX_TDDRC_THRD_3 -116 0x7FFF //RX_TDDRC_SLANT_0 -117 0x7FFF //RX_TDDRC_SLANT_1 -118 0x1000 //RX_TDDRC_ALPHA_UP_0 -119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 -120 0x0000 //RX_TDDRC_HMNC_FLAG -121 0x199A //RX_TDDRC_HMNC_GAIN -122 0x0001 //RX_TDDRC_SMT_FLAG -123 0x0CCD //RX_TDDRC_SMT_W -124 0x0700 //RX_TDDRC_DRC_GAIN -38 0x0014 //RX_FDEQ_SUBNUM -39 0x8080 //RX_FDEQ_GAIN_0 -40 0x8058 //RX_FDEQ_GAIN_1 -41 0x5454 //RX_FDEQ_GAIN_2 -42 0x545C //RX_FDEQ_GAIN_3 -43 0x6448 //RX_FDEQ_GAIN_4 -44 0x4848 //RX_FDEQ_GAIN_5 -45 0x5848 //RX_FDEQ_GAIN_6 -46 0x4848 //RX_FDEQ_GAIN_7 -47 0x485A //RX_FDEQ_GAIN_8 -48 0x5A58 //RX_FDEQ_GAIN_9 -49 0x4848 //RX_FDEQ_GAIN_10 -50 0x4848 //RX_FDEQ_GAIN_11 -51 0x4848 //RX_FDEQ_GAIN_12 -52 0x4848 //RX_FDEQ_GAIN_13 -53 0x4848 //RX_FDEQ_GAIN_14 -54 0x4848 //RX_FDEQ_GAIN_15 -55 0x4848 //RX_FDEQ_GAIN_16 -56 0x4848 //RX_FDEQ_GAIN_17 -57 0x4848 //RX_FDEQ_GAIN_18 -58 0x4848 //RX_FDEQ_GAIN_19 -59 0x4848 //RX_FDEQ_GAIN_20 -60 0x4848 //RX_FDEQ_GAIN_21 -61 0x4848 //RX_FDEQ_GAIN_22 -62 0x4848 //RX_FDEQ_GAIN_23 -63 0x0202 //RX_FDEQ_BIN_0 -64 0x0203 //RX_FDEQ_BIN_1 -65 0x0303 //RX_FDEQ_BIN_2 -66 0x0304 //RX_FDEQ_BIN_3 -67 0x0405 //RX_FDEQ_BIN_4 -68 0x0506 //RX_FDEQ_BIN_5 -69 0x0708 //RX_FDEQ_BIN_6 -70 0x090A //RX_FDEQ_BIN_7 -71 0x0B0C //RX_FDEQ_BIN_8 -72 0x0D08 //RX_FDEQ_BIN_9 -73 0x0000 //RX_FDEQ_BIN_10 -74 0x0000 //RX_FDEQ_BIN_11 -75 0x0000 //RX_FDEQ_BIN_12 -76 0x0000 //RX_FDEQ_BIN_13 -77 0x0000 //RX_FDEQ_BIN_14 -78 0x0000 //RX_FDEQ_BIN_15 -79 0x0000 //RX_FDEQ_BIN_16 -80 0x0000 //RX_FDEQ_BIN_17 -81 0x0000 //RX_FDEQ_BIN_18 -82 0x0000 //RX_FDEQ_BIN_19 -83 0x0000 //RX_FDEQ_BIN_20 -84 0x0000 //RX_FDEQ_BIN_21 -85 0x0000 //RX_FDEQ_BIN_22 -86 0x0000 //RX_FDEQ_BIN_23 -87 0x4000 //RX_FDEQ_RESRV_0 -88 0x0320 //RX_FDEQ_RESRV_1 -89 0x0018 //RX_FDDRC_BAND_MARGIN_0 -90 0x0035 //RX_FDDRC_BAND_MARGIN_1 -91 0x0060 //RX_FDDRC_BAND_MARGIN_2 -92 0x0080 //RX_FDDRC_BAND_MARGIN_3 -93 0x0004 //RX_FDDRC_BLOCK_EXP -94 0x0600 //RX_FDDRC_THRD_2_0 -95 0x0600 //RX_FDDRC_THRD_2_1 -96 0x0600 //RX_FDDRC_THRD_2_2 -97 0x0600 //RX_FDDRC_THRD_2_3 -98 0x0800 //RX_FDDRC_THRD_3_0 -99 0x0800 //RX_FDDRC_THRD_3_1 -100 0x0800 //RX_FDDRC_THRD_3_2 -101 0x0800 //RX_FDDRC_THRD_3_3 -102 0x0000 //RX_FDDRC_SLANT_0_0 -103 0x0000 //RX_FDDRC_SLANT_0_1 -104 0x0000 //RX_FDDRC_SLANT_0_2 -105 0x0000 //RX_FDDRC_SLANT_0_3 -106 0x7FFF //RX_FDDRC_SLANT_1_0 -107 0x7FFF //RX_FDDRC_SLANT_1_1 -108 0x7FFF //RX_FDDRC_SLANT_1_2 -109 0x7FFF //RX_FDDRC_SLANT_1_3 -110 0x0000 //RX_FDDRC_RESRV_0 -129 0x0020 //RX_SPK_VOL -130 0x0000 //RX_VOL_RESRV_0 -#VOL 2 -6 0x1000 //RX_TDDRC_ALPHA_UP_1 -7 0x1000 //RX_TDDRC_ALPHA_UP_2 -8 0x1000 //RX_TDDRC_ALPHA_UP_3 -9 0x1000 //RX_TDDRC_ALPHA_UP_4 -27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 -28 0x4000 //RX_TDDRC_ALPHA_DWN_2 -29 0x4000 //RX_TDDRC_ALPHA_DWN_3 -32 0x4000 //RX_TDDRC_ALPHA_DWN_4 -33 0x7214 //RX_TDDRC_LIMITER_THRD -34 0x0800 //RX_TDDRC_LIMITER_GAIN -112 0x0002 //RX_TDDRC_THRD_0 -113 0x0004 //RX_TDDRC_THRD_1 -114 0x1A00 //RX_TDDRC_THRD_2 -115 0x1A00 //RX_TDDRC_THRD_3 -116 0x7FFF //RX_TDDRC_SLANT_0 -117 0x7FFF //RX_TDDRC_SLANT_1 -118 0x1000 //RX_TDDRC_ALPHA_UP_0 -119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 -120 0x0000 //RX_TDDRC_HMNC_FLAG -121 0x199A //RX_TDDRC_HMNC_GAIN -122 0x0001 //RX_TDDRC_SMT_FLAG -123 0x0CCD //RX_TDDRC_SMT_W -124 0x0700 //RX_TDDRC_DRC_GAIN -38 0x0014 //RX_FDEQ_SUBNUM -39 0x8080 //RX_FDEQ_GAIN_0 -40 0x8058 //RX_FDEQ_GAIN_1 -41 0x5454 //RX_FDEQ_GAIN_2 -42 0x545C //RX_FDEQ_GAIN_3 -43 0x6448 //RX_FDEQ_GAIN_4 -44 0x4848 //RX_FDEQ_GAIN_5 -45 0x5848 //RX_FDEQ_GAIN_6 -46 0x4848 //RX_FDEQ_GAIN_7 -47 0x485A //RX_FDEQ_GAIN_8 -48 0x5A58 //RX_FDEQ_GAIN_9 -49 0x4848 //RX_FDEQ_GAIN_10 -50 0x4848 //RX_FDEQ_GAIN_11 -51 0x4848 //RX_FDEQ_GAIN_12 -52 0x4848 //RX_FDEQ_GAIN_13 -53 0x4848 //RX_FDEQ_GAIN_14 -54 0x4848 //RX_FDEQ_GAIN_15 -55 0x4848 //RX_FDEQ_GAIN_16 -56 0x4848 //RX_FDEQ_GAIN_17 -57 0x4848 //RX_FDEQ_GAIN_18 -58 0x4848 //RX_FDEQ_GAIN_19 -59 0x4848 //RX_FDEQ_GAIN_20 -60 0x4848 //RX_FDEQ_GAIN_21 -61 0x4848 //RX_FDEQ_GAIN_22 -62 0x4848 //RX_FDEQ_GAIN_23 -63 0x0202 //RX_FDEQ_BIN_0 -64 0x0203 //RX_FDEQ_BIN_1 -65 0x0303 //RX_FDEQ_BIN_2 -66 0x0304 //RX_FDEQ_BIN_3 -67 0x0405 //RX_FDEQ_BIN_4 -68 0x0506 //RX_FDEQ_BIN_5 -69 0x0708 //RX_FDEQ_BIN_6 -70 0x090A //RX_FDEQ_BIN_7 -71 0x0B0C //RX_FDEQ_BIN_8 -72 0x0D08 //RX_FDEQ_BIN_9 -73 0x0000 //RX_FDEQ_BIN_10 -74 0x0000 //RX_FDEQ_BIN_11 -75 0x0000 //RX_FDEQ_BIN_12 -76 0x0000 //RX_FDEQ_BIN_13 -77 0x0000 //RX_FDEQ_BIN_14 -78 0x0000 //RX_FDEQ_BIN_15 -79 0x0000 //RX_FDEQ_BIN_16 -80 0x0000 //RX_FDEQ_BIN_17 -81 0x0000 //RX_FDEQ_BIN_18 -82 0x0000 //RX_FDEQ_BIN_19 -83 0x0000 //RX_FDEQ_BIN_20 -84 0x0000 //RX_FDEQ_BIN_21 -85 0x0000 //RX_FDEQ_BIN_22 -86 0x0000 //RX_FDEQ_BIN_23 -87 0x4000 //RX_FDEQ_RESRV_0 -88 0x0320 //RX_FDEQ_RESRV_1 -89 0x0018 //RX_FDDRC_BAND_MARGIN_0 -90 0x0035 //RX_FDDRC_BAND_MARGIN_1 -91 0x0060 //RX_FDDRC_BAND_MARGIN_2 -92 0x0080 //RX_FDDRC_BAND_MARGIN_3 -93 0x0004 //RX_FDDRC_BLOCK_EXP -94 0x0600 //RX_FDDRC_THRD_2_0 -95 0x0600 //RX_FDDRC_THRD_2_1 -96 0x0600 //RX_FDDRC_THRD_2_2 -97 0x0600 //RX_FDDRC_THRD_2_3 -98 0x0800 //RX_FDDRC_THRD_3_0 -99 0x0800 //RX_FDDRC_THRD_3_1 -100 0x0800 //RX_FDDRC_THRD_3_2 -101 0x0800 //RX_FDDRC_THRD_3_3 -102 0x0000 //RX_FDDRC_SLANT_0_0 -103 0x0000 //RX_FDDRC_SLANT_0_1 -104 0x0000 //RX_FDDRC_SLANT_0_2 -105 0x0000 //RX_FDDRC_SLANT_0_3 -106 0x7FFF //RX_FDDRC_SLANT_1_0 -107 0x7FFF //RX_FDDRC_SLANT_1_1 -108 0x7FFF //RX_FDDRC_SLANT_1_2 -109 0x7FFF //RX_FDDRC_SLANT_1_3 -110 0x0000 //RX_FDDRC_RESRV_0 -129 0x002E //RX_SPK_VOL -130 0x0000 //RX_VOL_RESRV_0 -#VOL 3 -6 0x1000 //RX_TDDRC_ALPHA_UP_1 -7 0x1000 //RX_TDDRC_ALPHA_UP_2 -8 0x1000 //RX_TDDRC_ALPHA_UP_3 -9 0x1000 //RX_TDDRC_ALPHA_UP_4 -27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 -28 0x4000 //RX_TDDRC_ALPHA_DWN_2 -29 0x4000 //RX_TDDRC_ALPHA_DWN_3 -32 0x4000 //RX_TDDRC_ALPHA_DWN_4 -33 0x7214 //RX_TDDRC_LIMITER_THRD -34 0x0800 //RX_TDDRC_LIMITER_GAIN -112 0x0002 //RX_TDDRC_THRD_0 -113 0x0004 //RX_TDDRC_THRD_1 -114 0x1A00 //RX_TDDRC_THRD_2 -115 0x1A00 //RX_TDDRC_THRD_3 -116 0x7FFF //RX_TDDRC_SLANT_0 -117 0x7FFF //RX_TDDRC_SLANT_1 -118 0x1000 //RX_TDDRC_ALPHA_UP_0 -119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 -120 0x0000 //RX_TDDRC_HMNC_FLAG -121 0x199A //RX_TDDRC_HMNC_GAIN -122 0x0001 //RX_TDDRC_SMT_FLAG -123 0x0CCD //RX_TDDRC_SMT_W -124 0x0700 //RX_TDDRC_DRC_GAIN -38 0x0014 //RX_FDEQ_SUBNUM -39 0x8080 //RX_FDEQ_GAIN_0 -40 0x8058 //RX_FDEQ_GAIN_1 -41 0x5454 //RX_FDEQ_GAIN_2 -42 0x545C //RX_FDEQ_GAIN_3 -43 0x6448 //RX_FDEQ_GAIN_4 -44 0x4848 //RX_FDEQ_GAIN_5 -45 0x5848 //RX_FDEQ_GAIN_6 -46 0x4848 //RX_FDEQ_GAIN_7 -47 0x485A //RX_FDEQ_GAIN_8 -48 0x5A58 //RX_FDEQ_GAIN_9 -49 0x4848 //RX_FDEQ_GAIN_10 -50 0x4848 //RX_FDEQ_GAIN_11 -51 0x4848 //RX_FDEQ_GAIN_12 -52 0x4848 //RX_FDEQ_GAIN_13 -53 0x4848 //RX_FDEQ_GAIN_14 -54 0x4848 //RX_FDEQ_GAIN_15 -55 0x4848 //RX_FDEQ_GAIN_16 -56 0x4848 //RX_FDEQ_GAIN_17 -57 0x4848 //RX_FDEQ_GAIN_18 -58 0x4848 //RX_FDEQ_GAIN_19 -59 0x4848 //RX_FDEQ_GAIN_20 -60 0x4848 //RX_FDEQ_GAIN_21 -61 0x4848 //RX_FDEQ_GAIN_22 -62 0x4848 //RX_FDEQ_GAIN_23 -63 0x0202 //RX_FDEQ_BIN_0 -64 0x0203 //RX_FDEQ_BIN_1 -65 0x0303 //RX_FDEQ_BIN_2 -66 0x0304 //RX_FDEQ_BIN_3 -67 0x0405 //RX_FDEQ_BIN_4 -68 0x0506 //RX_FDEQ_BIN_5 -69 0x0708 //RX_FDEQ_BIN_6 -70 0x090A //RX_FDEQ_BIN_7 -71 0x0B0C //RX_FDEQ_BIN_8 -72 0x0D08 //RX_FDEQ_BIN_9 -73 0x0000 //RX_FDEQ_BIN_10 -74 0x0000 //RX_FDEQ_BIN_11 -75 0x0000 //RX_FDEQ_BIN_12 -76 0x0000 //RX_FDEQ_BIN_13 -77 0x0000 //RX_FDEQ_BIN_14 -78 0x0000 //RX_FDEQ_BIN_15 -79 0x0000 //RX_FDEQ_BIN_16 -80 0x0000 //RX_FDEQ_BIN_17 -81 0x0000 //RX_FDEQ_BIN_18 -82 0x0000 //RX_FDEQ_BIN_19 -83 0x0000 //RX_FDEQ_BIN_20 -84 0x0000 //RX_FDEQ_BIN_21 -85 0x0000 //RX_FDEQ_BIN_22 -86 0x0000 //RX_FDEQ_BIN_23 -87 0x4000 //RX_FDEQ_RESRV_0 -88 0x0320 //RX_FDEQ_RESRV_1 -89 0x0018 //RX_FDDRC_BAND_MARGIN_0 -90 0x0035 //RX_FDDRC_BAND_MARGIN_1 -91 0x0060 //RX_FDDRC_BAND_MARGIN_2 -92 0x0080 //RX_FDDRC_BAND_MARGIN_3 -93 0x0004 //RX_FDDRC_BLOCK_EXP -94 0x0600 //RX_FDDRC_THRD_2_0 -95 0x0600 //RX_FDDRC_THRD_2_1 -96 0x0600 //RX_FDDRC_THRD_2_2 -97 0x0600 //RX_FDDRC_THRD_2_3 -98 0x0800 //RX_FDDRC_THRD_3_0 -99 0x0800 //RX_FDDRC_THRD_3_1 -100 0x0800 //RX_FDDRC_THRD_3_2 -101 0x0800 //RX_FDDRC_THRD_3_3 -102 0x0000 //RX_FDDRC_SLANT_0_0 -103 0x0000 //RX_FDDRC_SLANT_0_1 -104 0x0000 //RX_FDDRC_SLANT_0_2 -105 0x0000 //RX_FDDRC_SLANT_0_3 -106 0x7FFF //RX_FDDRC_SLANT_1_0 -107 0x7FFF //RX_FDDRC_SLANT_1_1 -108 0x7FFF //RX_FDDRC_SLANT_1_2 -109 0x7FFF //RX_FDDRC_SLANT_1_3 -110 0x0000 //RX_FDDRC_RESRV_0 -129 0x0041 //RX_SPK_VOL -130 0x0000 //RX_VOL_RESRV_0 -#VOL 4 -6 0x1000 //RX_TDDRC_ALPHA_UP_1 -7 0x1000 //RX_TDDRC_ALPHA_UP_2 -8 0x1000 //RX_TDDRC_ALPHA_UP_3 -9 0x1000 //RX_TDDRC_ALPHA_UP_4 -27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 -28 0x4000 //RX_TDDRC_ALPHA_DWN_2 -29 0x4000 //RX_TDDRC_ALPHA_DWN_3 -32 0x4000 //RX_TDDRC_ALPHA_DWN_4 -33 0x7214 //RX_TDDRC_LIMITER_THRD -34 0x0800 //RX_TDDRC_LIMITER_GAIN -112 0x0002 //RX_TDDRC_THRD_0 -113 0x0004 //RX_TDDRC_THRD_1 -114 0x1A00 //RX_TDDRC_THRD_2 -115 0x1A00 //RX_TDDRC_THRD_3 -116 0x7FFF //RX_TDDRC_SLANT_0 -117 0x7FFF //RX_TDDRC_SLANT_1 -118 0x1000 //RX_TDDRC_ALPHA_UP_0 -119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 -120 0x0000 //RX_TDDRC_HMNC_FLAG -121 0x199A //RX_TDDRC_HMNC_GAIN -122 0x0001 //RX_TDDRC_SMT_FLAG -123 0x0CCD //RX_TDDRC_SMT_W -124 0x0700 //RX_TDDRC_DRC_GAIN -38 0x0014 //RX_FDEQ_SUBNUM -39 0x8080 //RX_FDEQ_GAIN_0 -40 0x8058 //RX_FDEQ_GAIN_1 -41 0x5454 //RX_FDEQ_GAIN_2 -42 0x545C //RX_FDEQ_GAIN_3 -43 0x6448 //RX_FDEQ_GAIN_4 -44 0x4848 //RX_FDEQ_GAIN_5 -45 0x5848 //RX_FDEQ_GAIN_6 -46 0x4848 //RX_FDEQ_GAIN_7 -47 0x485A //RX_FDEQ_GAIN_8 -48 0x5A58 //RX_FDEQ_GAIN_9 -49 0x4848 //RX_FDEQ_GAIN_10 -50 0x4848 //RX_FDEQ_GAIN_11 -51 0x4848 //RX_FDEQ_GAIN_12 -52 0x4848 //RX_FDEQ_GAIN_13 -53 0x4848 //RX_FDEQ_GAIN_14 -54 0x4848 //RX_FDEQ_GAIN_15 -55 0x4848 //RX_FDEQ_GAIN_16 -56 0x4848 //RX_FDEQ_GAIN_17 -57 0x4848 //RX_FDEQ_GAIN_18 -58 0x4848 //RX_FDEQ_GAIN_19 -59 0x4848 //RX_FDEQ_GAIN_20 -60 0x4848 //RX_FDEQ_GAIN_21 -61 0x4848 //RX_FDEQ_GAIN_22 -62 0x4848 //RX_FDEQ_GAIN_23 -63 0x0202 //RX_FDEQ_BIN_0 -64 0x0203 //RX_FDEQ_BIN_1 -65 0x0303 //RX_FDEQ_BIN_2 -66 0x0304 //RX_FDEQ_BIN_3 -67 0x0405 //RX_FDEQ_BIN_4 -68 0x0506 //RX_FDEQ_BIN_5 -69 0x0708 //RX_FDEQ_BIN_6 -70 0x090A //RX_FDEQ_BIN_7 -71 0x0B0C //RX_FDEQ_BIN_8 -72 0x0D08 //RX_FDEQ_BIN_9 -73 0x0000 //RX_FDEQ_BIN_10 -74 0x0000 //RX_FDEQ_BIN_11 -75 0x0000 //RX_FDEQ_BIN_12 -76 0x0000 //RX_FDEQ_BIN_13 -77 0x0000 //RX_FDEQ_BIN_14 -78 0x0000 //RX_FDEQ_BIN_15 -79 0x0000 //RX_FDEQ_BIN_16 -80 0x0000 //RX_FDEQ_BIN_17 -81 0x0000 //RX_FDEQ_BIN_18 -82 0x0000 //RX_FDEQ_BIN_19 -83 0x0000 //RX_FDEQ_BIN_20 -84 0x0000 //RX_FDEQ_BIN_21 -85 0x0000 //RX_FDEQ_BIN_22 -86 0x0000 //RX_FDEQ_BIN_23 -87 0x4000 //RX_FDEQ_RESRV_0 -88 0x0320 //RX_FDEQ_RESRV_1 -89 0x0018 //RX_FDDRC_BAND_MARGIN_0 -90 0x0035 //RX_FDDRC_BAND_MARGIN_1 -91 0x0060 //RX_FDDRC_BAND_MARGIN_2 -92 0x0080 //RX_FDDRC_BAND_MARGIN_3 -93 0x0004 //RX_FDDRC_BLOCK_EXP -94 0x0600 //RX_FDDRC_THRD_2_0 -95 0x0600 //RX_FDDRC_THRD_2_1 -96 0x0600 //RX_FDDRC_THRD_2_2 -97 0x0600 //RX_FDDRC_THRD_2_3 -98 0x0800 //RX_FDDRC_THRD_3_0 -99 0x0800 //RX_FDDRC_THRD_3_1 -100 0x0800 //RX_FDDRC_THRD_3_2 -101 0x0800 //RX_FDDRC_THRD_3_3 -102 0x0000 //RX_FDDRC_SLANT_0_0 -103 0x0000 //RX_FDDRC_SLANT_0_1 -104 0x0000 //RX_FDDRC_SLANT_0_2 -105 0x0000 //RX_FDDRC_SLANT_0_3 -106 0x7FFF //RX_FDDRC_SLANT_1_0 -107 0x7FFF //RX_FDDRC_SLANT_1_1 -108 0x7FFF //RX_FDDRC_SLANT_1_2 -109 0x7FFF //RX_FDDRC_SLANT_1_3 -110 0x0000 //RX_FDDRC_RESRV_0 -129 0x005C //RX_SPK_VOL -130 0x0000 //RX_VOL_RESRV_0 -#VOL 5 -6 0x1000 //RX_TDDRC_ALPHA_UP_1 -7 0x1000 //RX_TDDRC_ALPHA_UP_2 -8 0x1000 //RX_TDDRC_ALPHA_UP_3 -9 0x1000 //RX_TDDRC_ALPHA_UP_4 -27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 -28 0x4000 //RX_TDDRC_ALPHA_DWN_2 -29 0x4000 //RX_TDDRC_ALPHA_DWN_3 -32 0x4000 //RX_TDDRC_ALPHA_DWN_4 -33 0x7214 //RX_TDDRC_LIMITER_THRD -34 0x0800 //RX_TDDRC_LIMITER_GAIN -112 0x0002 //RX_TDDRC_THRD_0 -113 0x0004 //RX_TDDRC_THRD_1 -114 0x1A00 //RX_TDDRC_THRD_2 -115 0x1A00 //RX_TDDRC_THRD_3 -116 0x7FFF //RX_TDDRC_SLANT_0 -117 0x7FFF //RX_TDDRC_SLANT_1 -118 0x1000 //RX_TDDRC_ALPHA_UP_0 -119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 -120 0x0000 //RX_TDDRC_HMNC_FLAG -121 0x199A //RX_TDDRC_HMNC_GAIN -122 0x0001 //RX_TDDRC_SMT_FLAG -123 0x0CCD //RX_TDDRC_SMT_W -124 0x0700 //RX_TDDRC_DRC_GAIN -38 0x0014 //RX_FDEQ_SUBNUM -39 0x8080 //RX_FDEQ_GAIN_0 -40 0x8058 //RX_FDEQ_GAIN_1 -41 0x5454 //RX_FDEQ_GAIN_2 -42 0x545C //RX_FDEQ_GAIN_3 -43 0x6448 //RX_FDEQ_GAIN_4 -44 0x4848 //RX_FDEQ_GAIN_5 -45 0x5848 //RX_FDEQ_GAIN_6 -46 0x4848 //RX_FDEQ_GAIN_7 -47 0x485A //RX_FDEQ_GAIN_8 -48 0x5A58 //RX_FDEQ_GAIN_9 -49 0x4848 //RX_FDEQ_GAIN_10 -50 0x4848 //RX_FDEQ_GAIN_11 -51 0x4848 //RX_FDEQ_GAIN_12 -52 0x4848 //RX_FDEQ_GAIN_13 -53 0x4848 //RX_FDEQ_GAIN_14 -54 0x4848 //RX_FDEQ_GAIN_15 -55 0x4848 //RX_FDEQ_GAIN_16 -56 0x4848 //RX_FDEQ_GAIN_17 -57 0x4848 //RX_FDEQ_GAIN_18 -58 0x4848 //RX_FDEQ_GAIN_19 -59 0x4848 //RX_FDEQ_GAIN_20 -60 0x4848 //RX_FDEQ_GAIN_21 -61 0x4848 //RX_FDEQ_GAIN_22 -62 0x4848 //RX_FDEQ_GAIN_23 -63 0x0202 //RX_FDEQ_BIN_0 -64 0x0203 //RX_FDEQ_BIN_1 -65 0x0303 //RX_FDEQ_BIN_2 -66 0x0304 //RX_FDEQ_BIN_3 -67 0x0405 //RX_FDEQ_BIN_4 -68 0x0506 //RX_FDEQ_BIN_5 -69 0x0708 //RX_FDEQ_BIN_6 -70 0x090A //RX_FDEQ_BIN_7 -71 0x0B0C //RX_FDEQ_BIN_8 -72 0x0D08 //RX_FDEQ_BIN_9 -73 0x0000 //RX_FDEQ_BIN_10 -74 0x0000 //RX_FDEQ_BIN_11 -75 0x0000 //RX_FDEQ_BIN_12 -76 0x0000 //RX_FDEQ_BIN_13 -77 0x0000 //RX_FDEQ_BIN_14 -78 0x0000 //RX_FDEQ_BIN_15 -79 0x0000 //RX_FDEQ_BIN_16 -80 0x0000 //RX_FDEQ_BIN_17 -81 0x0000 //RX_FDEQ_BIN_18 -82 0x0000 //RX_FDEQ_BIN_19 -83 0x0000 //RX_FDEQ_BIN_20 -84 0x0000 //RX_FDEQ_BIN_21 -85 0x0000 //RX_FDEQ_BIN_22 -86 0x0000 //RX_FDEQ_BIN_23 -87 0x4000 //RX_FDEQ_RESRV_0 -88 0x0320 //RX_FDEQ_RESRV_1 -89 0x0018 //RX_FDDRC_BAND_MARGIN_0 -90 0x0035 //RX_FDDRC_BAND_MARGIN_1 -91 0x0060 //RX_FDDRC_BAND_MARGIN_2 -92 0x0080 //RX_FDDRC_BAND_MARGIN_3 -93 0x0004 //RX_FDDRC_BLOCK_EXP -94 0x0600 //RX_FDDRC_THRD_2_0 -95 0x0600 //RX_FDDRC_THRD_2_1 -96 0x0600 //RX_FDDRC_THRD_2_2 -97 0x0600 //RX_FDDRC_THRD_2_3 -98 0x0800 //RX_FDDRC_THRD_3_0 -99 0x0800 //RX_FDDRC_THRD_3_1 -100 0x0800 //RX_FDDRC_THRD_3_2 -101 0x0800 //RX_FDDRC_THRD_3_3 -102 0x0000 //RX_FDDRC_SLANT_0_0 -103 0x0000 //RX_FDDRC_SLANT_0_1 -104 0x0000 //RX_FDDRC_SLANT_0_2 -105 0x0000 //RX_FDDRC_SLANT_0_3 -106 0x7FFF //RX_FDDRC_SLANT_1_0 -107 0x7FFF //RX_FDDRC_SLANT_1_1 -108 0x7FFF //RX_FDDRC_SLANT_1_2 -109 0x7FFF //RX_FDDRC_SLANT_1_3 -110 0x0000 //RX_FDDRC_RESRV_0 -129 0x008A //RX_SPK_VOL -130 0x0000 //RX_VOL_RESRV_0 -#VOL 6 -6 0x1000 //RX_TDDRC_ALPHA_UP_1 -7 0x1000 //RX_TDDRC_ALPHA_UP_2 -8 0x1000 //RX_TDDRC_ALPHA_UP_3 -9 0x1000 //RX_TDDRC_ALPHA_UP_4 -27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 -28 0x4000 //RX_TDDRC_ALPHA_DWN_2 -29 0x4000 //RX_TDDRC_ALPHA_DWN_3 -32 0x4000 //RX_TDDRC_ALPHA_DWN_4 -33 0x7214 //RX_TDDRC_LIMITER_THRD -34 0x0800 //RX_TDDRC_LIMITER_GAIN -112 0x0002 //RX_TDDRC_THRD_0 -113 0x0004 //RX_TDDRC_THRD_1 -114 0x1A00 //RX_TDDRC_THRD_2 -115 0x1A00 //RX_TDDRC_THRD_3 -116 0x7FFF //RX_TDDRC_SLANT_0 -117 0x7FFF //RX_TDDRC_SLANT_1 -118 0x1000 //RX_TDDRC_ALPHA_UP_0 -119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 -120 0x0000 //RX_TDDRC_HMNC_FLAG -121 0x199A //RX_TDDRC_HMNC_GAIN -122 0x0001 //RX_TDDRC_SMT_FLAG -123 0x0CCD //RX_TDDRC_SMT_W -124 0x0700 //RX_TDDRC_DRC_GAIN -38 0x0014 //RX_FDEQ_SUBNUM -39 0x8080 //RX_FDEQ_GAIN_0 -40 0x8058 //RX_FDEQ_GAIN_1 -41 0x5454 //RX_FDEQ_GAIN_2 -42 0x545C //RX_FDEQ_GAIN_3 -43 0x6448 //RX_FDEQ_GAIN_4 -44 0x4848 //RX_FDEQ_GAIN_5 -45 0x5848 //RX_FDEQ_GAIN_6 -46 0x4848 //RX_FDEQ_GAIN_7 -47 0x485A //RX_FDEQ_GAIN_8 -48 0x5A58 //RX_FDEQ_GAIN_9 -49 0x4848 //RX_FDEQ_GAIN_10 -50 0x4848 //RX_FDEQ_GAIN_11 -51 0x4848 //RX_FDEQ_GAIN_12 -52 0x4848 //RX_FDEQ_GAIN_13 -53 0x4848 //RX_FDEQ_GAIN_14 -54 0x4848 //RX_FDEQ_GAIN_15 -55 0x4848 //RX_FDEQ_GAIN_16 -56 0x4848 //RX_FDEQ_GAIN_17 -57 0x4848 //RX_FDEQ_GAIN_18 -58 0x4848 //RX_FDEQ_GAIN_19 -59 0x4848 //RX_FDEQ_GAIN_20 -60 0x4848 //RX_FDEQ_GAIN_21 -61 0x4848 //RX_FDEQ_GAIN_22 -62 0x4848 //RX_FDEQ_GAIN_23 -63 0x0202 //RX_FDEQ_BIN_0 -64 0x0203 //RX_FDEQ_BIN_1 -65 0x0303 //RX_FDEQ_BIN_2 -66 0x0304 //RX_FDEQ_BIN_3 -67 0x0405 //RX_FDEQ_BIN_4 -68 0x0506 //RX_FDEQ_BIN_5 -69 0x0708 //RX_FDEQ_BIN_6 -70 0x090A //RX_FDEQ_BIN_7 -71 0x0B0C //RX_FDEQ_BIN_8 -72 0x0D08 //RX_FDEQ_BIN_9 -73 0x0000 //RX_FDEQ_BIN_10 -74 0x0000 //RX_FDEQ_BIN_11 -75 0x0000 //RX_FDEQ_BIN_12 -76 0x0000 //RX_FDEQ_BIN_13 -77 0x0000 //RX_FDEQ_BIN_14 -78 0x0000 //RX_FDEQ_BIN_15 -79 0x0000 //RX_FDEQ_BIN_16 -80 0x0000 //RX_FDEQ_BIN_17 -81 0x0000 //RX_FDEQ_BIN_18 -82 0x0000 //RX_FDEQ_BIN_19 -83 0x0000 //RX_FDEQ_BIN_20 -84 0x0000 //RX_FDEQ_BIN_21 -85 0x0000 //RX_FDEQ_BIN_22 -86 0x0000 //RX_FDEQ_BIN_23 -87 0x4000 //RX_FDEQ_RESRV_0 -88 0x0320 //RX_FDEQ_RESRV_1 -89 0x0018 //RX_FDDRC_BAND_MARGIN_0 -90 0x0035 //RX_FDDRC_BAND_MARGIN_1 -91 0x0060 //RX_FDDRC_BAND_MARGIN_2 -92 0x0080 //RX_FDDRC_BAND_MARGIN_3 -93 0x0004 //RX_FDDRC_BLOCK_EXP -94 0x0600 //RX_FDDRC_THRD_2_0 -95 0x0600 //RX_FDDRC_THRD_2_1 -96 0x0600 //RX_FDDRC_THRD_2_2 -97 0x0600 //RX_FDDRC_THRD_2_3 -98 0x0800 //RX_FDDRC_THRD_3_0 -99 0x0800 //RX_FDDRC_THRD_3_1 -100 0x0800 //RX_FDDRC_THRD_3_2 -101 0x0800 //RX_FDDRC_THRD_3_3 -102 0x0000 //RX_FDDRC_SLANT_0_0 -103 0x0000 //RX_FDDRC_SLANT_0_1 -104 0x0000 //RX_FDDRC_SLANT_0_2 -105 0x0000 //RX_FDDRC_SLANT_0_3 -106 0x7FFF //RX_FDDRC_SLANT_1_0 -107 0x7FFF //RX_FDDRC_SLANT_1_1 -108 0x7FFF //RX_FDDRC_SLANT_1_2 -109 0x7FFF //RX_FDDRC_SLANT_1_3 -110 0x0000 //RX_FDDRC_RESRV_0 -129 0x0100 //RX_SPK_VOL -130 0x0000 //RX_VOL_RESRV_0 - -#CASE_NAME HANDSFREE-HANDSFREE-VOICE_GENERIC-WB -#PARAM_TYPE TX+RX -#TOTAL_CUSTOM_STEP 7 -#TX -0 0x0001 //TX_OPERATION_MODE_0 -1 0x0001 //TX_OPERATION_MODE_1 -2 0x0033 //TX_PATCH_REG -3 0x2F7C //TX_SENDFUNC_MODE_0 -4 0x0001 //TX_SENDFUNC_MODE_1 -5 0x0003 //TX_NUM_MIC -6 0x0001 //TX_SAMPLINGFREQ_SIG -7 0x0001 //TX_SAMPLINGFREQ_PROC -8 0x000A //TX_FRAME_SZ_SIG -9 0x000A //TX_FRAME_SZ -10 0x0000 //TX_DELAY_OPT -11 0x0028 //TX_MAX_TAIL_LENGTH -12 0x0001 //TX_NUM_LOUTCHN -13 0x0001 //TX_MAXNUM_AECREF -14 0x0000 //TX_DBG_FUNC_REG -15 0x0000 //TX_DBG_FUNC_REG1 -16 0x0000 //TX_SYS_RESRV_0 -17 0x0000 //TX_SYS_RESRV_1 -18 0x0000 //TX_SYS_RESRV_2 -19 0x0000 //TX_SYS_RESRV_3 -20 0x0000 //TX_DIST2REF0 -21 0x00A3 //TX_DIST2REF1 -22 0x001B //TX_DIST2REF_02 -23 0x0000 //TX_DIST2REF_03 -24 0x0000 //TX_DIST2REF_04 -25 0x0000 //TX_DIST2REF_05 -26 0x0000 //TX_MMIC -27 0x1000 //TX_PGA_0 -28 0x1000 //TX_PGA_1 -29 0x1000 //TX_PGA_2 -30 0x0000 //TX_PGA_3 -31 0x0000 //TX_PGA_4 -32 0x0000 //TX_PGA_5 -33 0x0001 //TX_MIC_PAIRS -34 0x0000 //TX_MIC_PAIRS_HS -35 0x0002 //TX_MICS_FOR_BF -36 0x0000 //TX_MIC_PAIRS_FORL1 -37 0x0002 //TX_MICS_OF_PAIR0 -38 0x0002 //TX_MICS_OF_PAIR1 -39 0x0002 //TX_MICS_OF_PAIR2 -40 0x0002 //TX_MICS_OF_PAIR3 -41 0x0000 //TX_MIC_DATA_SRC0 -42 0x0002 //TX_MIC_DATA_SRC1 -43 0x0001 //TX_MIC_DATA_SRC2 -44 0x0000 //TX_MIC_DATA_SRC3 -45 0x0000 //TX_MIC_PAIR_CH_04 -46 0x0000 //TX_MIC_PAIR_CH_05 -47 0x0000 //TX_MIC_PAIR_CH_10 -48 0x0000 //TX_MIC_PAIR_CH_11 -49 0x0000 //TX_MIC_PAIR_CH_12 -50 0x0000 //TX_MIC_PAIR_CH_13 -51 0x0000 //TX_MIC_PAIR_CH_14 -52 0x05DC //TX_HD_BIN_MASK -53 0x0010 //TX_HD_SUBAND_MASK -54 0x19A1 //TX_HD_FRAME_AVG_MASK -55 0x0320 //TX_HD_MIN_FRQ -56 0x1000 //TX_HD_ALPHA_PSD -57 0x1100 //TX_T_PHPR1 -58 0x0000 //TX_T_PHPR2 -59 0x0000 //TX_T_PTPR -60 0x0000 //TX_T_PNPR -61 0x0000 //TX_T_PAPR1 -62 0xEE6C //TX_T_PSDVAT -63 0x0800 //TX_CNT -64 0x4000 //TX_ANTI_HOWL_GAIN -65 0x0001 //TX_MICFORBFMARK_0 -66 0x0001 //TX_MICFORBFMARK_1 -67 0x0001 //TX_MICFORBFMARK_2 -68 0x0001 //TX_MICFORBFMARK_3 -69 0x0001 //TX_MICFORBFMARK_4 -70 0x0001 //TX_MICFORBFMARK_5 -71 0x0000 //TX_DIST2REF_10 -72 0x3A66 //TX_DIST2REF_11 -73 0x053D //TX_DIST2REF2 -74 0x0000 //TX_DIST2REF_13 -75 0x0000 //TX_DIST2REF_14 -76 0x0000 //TX_DIST2REF_15 -77 0x0000 //TX_DIST2REF_20 -78 0x0000 //TX_DIST2REF_21 -79 0x0000 //TX_DIST2REF_22 -80 0x0000 //TX_DIST2REF_23 -81 0x0000 //TX_DIST2REF_24 -82 0x0000 //TX_DIST2REF_25 -83 0x0000 //TX_DIST2REF_30 -84 0x0000 //TX_DIST2REF_31 -85 0x0000 //TX_DIST2REF_32 -86 0x0000 //TX_DIST2REF_33 -87 0x0000 //TX_DIST2REF_34 -88 0x0000 //TX_DIST2REF_35 -89 0x0000 //TX_MIC_LOC_00 -90 0x0000 //TX_MIC_LOC_01 -91 0x0000 //TX_MIC_LOC_02 -92 0x0000 //TX_MIC_LOC_03 -93 0x0000 //TX_MIC_LOC_04 -94 0x0000 //TX_MIC_LOC_05 -95 0x0000 //TX_MIC_LOC_10 -96 0x0000 //TX_MIC_LOC_11 -97 0x0000 //TX_MIC_LOC_12 -98 0x0000 //TX_MIC_LOC_13 -99 0x0000 //TX_MIC_LOC_14 -100 0x0000 //TX_MIC_LOC_15 -101 0x0000 //TX_MIC_LOC_20 -102 0x0000 //TX_MIC_LOC_21 -103 0x0000 //TX_MIC_LOC_22 -104 0x0000 //TX_MIC_LOC_23 -105 0x0000 //TX_MIC_LOC_24 -106 0x0000 //TX_MIC_LOC_25 -107 0x0800 //TX_MIC_REFBLK_VOLUME -108 0x0C00 //TX_MIC_BLOCK_VOLUME -109 0x0000 //TX_INVERSE_MASK -110 0x0000 //TX_ADCS_MASK -111 0x04D0 //TX_ADCS_GAIN -112 0x4000 //TX_NFC_GAINFAC -113 0x0000 //TX_MAINMIC_BLKFACTOR -114 0x0000 //TX_REFMIC_BLKFACTOR -115 0x0000 //TX_BLMIC_BLKFACTOR -116 0x0000 //TX_BRMIC_BLKFACTOR -117 0x0031 //TX_MICBLK_START_BIN -118 0x0060 //TX_MICBLK_END_BIN -119 0x0015 //TX_MICBLK_FE_HOLD -120 0xFFF2 //TX_MICBLK_MR_EXP_TH -121 0xFFF2 //TX_MICBLK_LR_EXP_TH -122 0x0000 //TX_FENE_HOLD -123 0x4000 //TX_FE_ENER_TH_MTS -124 0x0004 //TX_FE_ENER_TH_EXP -125 0x6000 //TX_C_POST_FLT_MIC_MAINBLK -126 0x6000 //TX_C_POST_FLT_MIC_REFBLK -127 0x0010 //TX_MIC_BLOCK_N -128 0x7B02 //TX_A_HP -129 0x4000 //TX_B_PE -130 0x5000 //TX_THR_PITCH_DET_0 -131 0x4800 //TX_THR_PITCH_DET_1 -132 0x4000 //TX_THR_PITCH_DET_2 -133 0x0008 //TX_PITCH_BFR_LEN -134 0x0003 //TX_SBD_PITCH_DET -135 0x0050 //TX_TD_AEC_L -136 0x4000 //TX_MU0_UNP_TD_AEC -137 0x1000 //TX_MU0_PTD_TD_AEC -138 0x0000 //TX_PP_RESRV_0 -139 0x2A94 //TX_PP_RESRV_1 -140 0x55F0 //TX_PP_RESRV_2 -141 0x0000 //TX_PP_RESRV_3 -142 0x0000 //TX_PP_RESRV_4 -143 0x0000 //TX_PP_RESRV_5 -144 0x0000 //TX_PP_RESRV_6 -145 0x0000 //TX_PP_RESRV_7 -146 0x0028 //TX_TAIL_LENGTH -147 0x0300 //TX_AEC_REF_GAIN_0 -148 0x0800 //TX_AEC_REF_GAIN_1 -149 0x0800 //TX_AEC_REF_GAIN_2 -150 0x6800 //TX_EAD_THR -151 0x1000 //TX_THR_RE_EST -152 0x0200 //TX_MIN_EQ_RE_EST_0 -153 0x0100 //TX_MIN_EQ_RE_EST_1 -154 0x0200 //TX_MIN_EQ_RE_EST_2 -155 0x0200 //TX_MIN_EQ_RE_EST_3 -156 0x0200 //TX_MIN_EQ_RE_EST_4 -157 0x0200 //TX_MIN_EQ_RE_EST_5 -158 0x0200 //TX_MIN_EQ_RE_EST_6 -159 0x1000 //TX_MIN_EQ_RE_EST_7 -160 0x1000 //TX_MIN_EQ_RE_EST_8 -161 0x1000 //TX_MIN_EQ_RE_EST_9 -162 0x1000 //TX_MIN_EQ_RE_EST_10 -163 0x1000 //TX_MIN_EQ_RE_EST_11 -164 0x1000 //TX_MIN_EQ_RE_EST_12 -165 0x4000 //TX_LAMBDA_RE_EST -166 0x4000 //TX_LAMBDA_CB_NLE -167 0x7FFF //TX_C_POST_FLT -168 0x5000 //TX_GAIN_NP -169 0x0180 //TX_SE_HOLD_N -170 0x00C8 //TX_DT_HOLD_N -171 0x05DC //TX_DT2_HOLD_N -172 0x6666 //TX_AEC_RESRV_0 -173 0x0000 //TX_AEC_RESRV_1 -174 0x0014 //TX_AEC_RESRV_2 -175 0x0000 //TX_MIC_DELAY_LENGTH -176 0x0000 //TX_REF_DELAY_LENGTH -177 0x0000 //TX_ADD_LINEIN_GAINL -178 0x0000 //TX_ADD_LINEIN_GAINH -179 0x0000 //TX_MIN_EQ_RE_EST_14 -180 0x0000 //TX_DTD_THR1_8 -181 0x7FFF //TX_DTD_THR2_8 -182 0x0000 //TX_DTD_MIC_BLK2 -183 0x0008 //TX_FRQ_LIN_LEN -184 0x7FFF //TX_FRQ_AEC_LEN_RHO -185 0x6000 //TX_MU0_UNP_FRQ_AEC -186 0x4000 //TX_MU0_PTD_FRQ_AEC -187 0x000A //TX_MINENOISETH -188 0x0800 //TX_MU0_RE_EST -189 0x0001 //TX_AEC_NUM_CH -190 0x0000 //TX_BIGECHOATTENUATION_MAX -191 0x2000 //TX_A_POST_FLT_MICBLK -192 0x0000 //TX_BLKENERTH -193 0x0000 //TX_BLKENERHIGHTH -194 0x0000 //TX_NORMENERTH -195 0x0000 //TX_NORMENERHIGHTH -196 0x0000 //TX_NORMENERHIGHTHL -197 0x6590 //TX_DTD_THR1_0 -198 0x6590 //TX_DTD_THR1_1 -199 0x6590 //TX_DTD_THR1_2 -200 0x7FF0 //TX_DTD_THR1_3 -201 0x7FF0 //TX_DTD_THR1_4 -202 0x7FF0 //TX_DTD_THR1_5 -203 0x7FF0 //TX_DTD_THR1_6 -204 0x5000 //TX_DTD_THR2_0 -205 0x5000 //TX_DTD_THR2_1 -206 0x5000 //TX_DTD_THR2_2 -207 0x5000 //TX_DTD_THR2_3 -208 0x5000 //TX_DTD_THR2_4 -209 0x5000 //TX_DTD_THR2_5 -210 0x5000 //TX_DTD_THR2_6 -211 0x7FFF //TX_DTD_THR3 -212 0x0000 //TX_SPK_CUT_K -213 0x07D0 //TX_DT_CUT_K -214 0x0100 //TX_DT_CUT_THR -215 0x04EB //TX_COMFORT_G -216 0x01F4 //TX_POWER_YOUT_TH -217 0x4000 //TX_FDPFGAINECHO -218 0x0000 //TX_DTD_HD_THR -219 0x0000 //TX_SPK_CUT_K_S -220 0x0000 //TX_DTD_MIC_BLK -221 0x023E //TX_ADPT_STRICT_L -222 0x023E //TX_ADPT_STRICT_H -223 0x0BB8 //TX_RATIO_DT_L_TH_LOW -224 0x3A98 //TX_RATIO_DT_H_TH_LOW -225 0x1770 //TX_RATIO_DT_L_TH_HIGH -226 0x4E20 //TX_RATIO_DT_H_TH_HIGH -227 0x09C4 //TX_RATIO_DT_L0_TH -228 0x2000 //TX_B_POST_FILT_ECHO_L -229 0x7FFF //TX_B_POST_FILT_ECHO_H -230 0x0200 //TX_MIN_G_CTRL_ECHO -231 0x1000 //TX_B_LESSCUT_RTO_ECHO -232 0x0000 //TX_EPD_OFFSET_00 -233 0x0000 //TX_EPD_OFFST_01 -234 0x1388 //TX_RATIO_DT_L0_TH_HIGH -235 0x7FFF //TX_RATIO_DT_H_TH_CUT -236 0x7FFF //TX_MIN_EQ_RE_EST_13 -237 0x0000 //TX_DTD_THR1_7 -238 0x0000 //TX_DTD_THR2_7 -239 0x0800 //TX_DT_RESRV_7 -240 0x0800 //TX_DT_RESRV_8 -241 0x0000 //TX_DT_RESRV_9 -242 0xF800 //TX_THR_SN_EST_0 -243 0xFA00 //TX_THR_SN_EST_1 -244 0xFA00 //TX_THR_SN_EST_2 -245 0xFB00 //TX_THR_SN_EST_3 -246 0xFA00 //TX_THR_SN_EST_4 -247 0xFA00 //TX_THR_SN_EST_5 -248 0xF800 //TX_THR_SN_EST_6 -249 0xF800 //TX_THR_SN_EST_7 -250 0x0100 //TX_DELTA_THR_SN_EST_0 -251 0x0200 //TX_DELTA_THR_SN_EST_1 -252 0x0100 //TX_DELTA_THR_SN_EST_2 -253 0x0200 //TX_DELTA_THR_SN_EST_3 -254 0x0100 //TX_DELTA_THR_SN_EST_4 -255 0x0100 //TX_DELTA_THR_SN_EST_5 -256 0x0200 //TX_DELTA_THR_SN_EST_6 -257 0x0200 //TX_DELTA_THR_SN_EST_7 -258 0x4000 //TX_LAMBDA_NN_EST_0 -259 0x4000 //TX_LAMBDA_NN_EST_1 -260 0x4000 //TX_LAMBDA_NN_EST_2 -261 0x4000 //TX_LAMBDA_NN_EST_3 -262 0x4000 //TX_LAMBDA_NN_EST_4 -263 0x4000 //TX_LAMBDA_NN_EST_5 -264 0x4000 //TX_LAMBDA_NN_EST_6 -265 0x4000 //TX_LAMBDA_NN_EST_7 -266 0x0400 //TX_N_SN_EST -267 0x001E //TX_INBEAM_T -268 0x0041 //TX_INBEAMHOLDT -269 0x2000 //TX_G_STRICT -270 0x2000 //TX_EQ_THR_BF -271 0x799A //TX_LAMBDA_EQ_BF -272 0x1000 //TX_NE_RTO_TH -273 0x0400 //TX_NE_RTO_TH_L -274 0x0800 //TX_MAINREFRTOH_TH_H -275 0x0800 //TX_MAINREFRTOH_TH_L -276 0x0800 //TX_MAINREFRTO_TH_H -277 0x0800 //TX_MAINREFRTO_TH_L -278 0x0200 //TX_MAINREFRTO_TH_EQ -279 0x2000 //TX_B_POST_FLT_0 -280 0x1000 //TX_B_POST_FLT_1 -281 0x0010 //TX_NS_LVL_CTRL_0 -282 0x0014 //TX_NS_LVL_CTRL_1 -283 0x0014 //TX_NS_LVL_CTRL_2 -284 0x0018 //TX_NS_LVL_CTRL_3 -285 0x0016 //TX_NS_LVL_CTRL_4 -286 0x0014 //TX_NS_LVL_CTRL_5 -287 0x0011 //TX_NS_LVL_CTRL_6 -288 0x0011 //TX_NS_LVL_CTRL_7 -289 0x000F //TX_MIN_GAIN_S_0 -290 0x0010 //TX_MIN_GAIN_S_1 -291 0x0010 //TX_MIN_GAIN_S_2 -292 0x0010 //TX_MIN_GAIN_S_3 -293 0x0010 //TX_MIN_GAIN_S_4 -294 0x0010 //TX_MIN_GAIN_S_5 -295 0x0010 //TX_MIN_GAIN_S_6 -296 0x000F //TX_MIN_GAIN_S_7 -297 0x6000 //TX_NMOS_SUP -298 0x0000 //TX_NS_MAX_PRI_SNR_TH -299 0x0000 //TX_NMOS_SUP_MENSA -300 0x7FFF //TX_SNRI_SUP_0 -301 0x4000 //TX_SNRI_SUP_1 -302 0x4000 //TX_SNRI_SUP_2 -303 0x4000 //TX_SNRI_SUP_3 -304 0x4000 //TX_SNRI_SUP_4 -305 0x4000 //TX_SNRI_SUP_5 -306 0x50C0 //TX_SNRI_SUP_6 -307 0x7FFF //TX_SNRI_SUP_7 -308 0x7FFF //TX_THR_LFNS -309 0x0018 //TX_G_LFNS -310 0x09C4 //TX_GAIN0_NTH -311 0x000A //TX_MUSIC_MORENS -312 0x7FFF //TX_A_POST_FILT_0 -313 0x2000 //TX_A_POST_FILT_1 -314 0x5000 //TX_A_POST_FILT_S_0 -315 0x6000 //TX_A_POST_FILT_S_1 -316 0x4C00 //TX_A_POST_FILT_S_2 -317 0x4000 //TX_A_POST_FILT_S_3 -318 0x6000 //TX_A_POST_FILT_S_4 -319 0x4000 //TX_A_POST_FILT_S_5 -320 0x5000 //TX_A_POST_FILT_S_6 -321 0x7000 //TX_A_POST_FILT_S_7 -322 0x2000 //TX_B_POST_FILT_0 -323 0x1000 //TX_B_POST_FILT_1 -324 0x2000 //TX_B_POST_FILT_2 -325 0x2000 //TX_B_POST_FILT_3 -326 0x4000 //TX_B_POST_FILT_4 -327 0x4000 //TX_B_POST_FILT_5 -328 0x1000 //TX_B_POST_FILT_6 -329 0x2000 //TX_B_POST_FILT_7 -330 0x4000 //TX_B_LESSCUT_RTO_S_0 -331 0x7FFF //TX_B_LESSCUT_RTO_S_1 -332 0x7FFF //TX_B_LESSCUT_RTO_S_2 -333 0x7FFF //TX_B_LESSCUT_RTO_S_3 -334 0x7FFF //TX_B_LESSCUT_RTO_S_4 -335 0x7FFF //TX_B_LESSCUT_RTO_S_5 -336 0x6000 //TX_B_LESSCUT_RTO_S_6 -337 0x7FFF //TX_B_LESSCUT_RTO_S_7 -338 0x7C00 //TX_LAMBDA_PFILT -339 0x7C00 //TX_LAMBDA_PFILT_S_0 -340 0x7C00 //TX_LAMBDA_PFILT_S_1 -341 0x7C00 //TX_LAMBDA_PFILT_S_2 -342 0x7A00 //TX_LAMBDA_PFILT_S_3 -343 0x7C00 //TX_LAMBDA_PFILT_S_4 -344 0x7C00 //TX_LAMBDA_PFILT_S_5 -345 0x7C00 //TX_LAMBDA_PFILT_S_6 -346 0x7C00 //TX_LAMBDA_PFILT_S_7 -347 0x0200 //TX_K_PEPPER -348 0x0800 //TX_A_PEPPER -349 0x1EAA //TX_K_PEPPER_HF -350 0x0600 //TX_A_PEPPER_HF -351 0x0001 //TX_HMNC_BST_FLG -352 0x0200 //TX_HMNC_BST_THR -353 0x0200 //TX_DT_BINVAD_TH_0 -354 0x0200 //TX_DT_BINVAD_TH_1 -355 0x0200 //TX_DT_BINVAD_TH_2 -356 0x0200 //TX_DT_BINVAD_TH_3 -357 0x1D4C //TX_DT_BINVAD_ENDF -358 0x0800 //TX_C_POST_FLT_DT -359 0x0CCD //TX_NS_B_POST_FLT_LESSCUT -360 0x0140 //TX_DT_BOOST -361 0x0000 //TX_BF_SGRAD_FLG -362 0x0005 //TX_BF_DVG_TH -363 0x001E //TX_SN_C_F -364 0x0000 //TX_K_APT -365 0x0001 //TX_NOISEDET -366 0x0064 //TX_NDETCT -367 0x0032 //TX_NOISE_TH_0 -368 0x7FFF //TX_NOISE_TH_0_2 -369 0x7FFF //TX_NOISE_TH_0_3 -370 0x017E //TX_NOISE_TH_1 -371 0x0230 //TX_NOISE_TH_2 -372 0x3492 //TX_NOISE_TH_3 -373 0x4E20 //TX_NOISE_TH_4 -374 0x55B8 //TX_NOISE_TH_5 -375 0x49E6 //TX_NOISE_TH_5_2 -376 0x0001 //TX_NOISE_TH_5_3 -377 0x7FFF //TX_NOISE_TH_5_4 -378 0x0F0A //TX_NOISE_TH_6 -379 0x0033 //TX_MINENOISE_TH -380 0x4000 //TX_MINENOISE_MIC0_TH_MTS -381 0xFFEE //TX_MINENOISE_MIC0_TH_EXP -382 0x6000 //TX_MINENOISE_MIC0_S_TH_MTS -383 0xFFF3 //TX_MINENOISE_MIC0_S_TH_EXP -384 0x0666 //TX_OUT_ENER_S_TH_CLEAN -385 0x0666 //TX_OUT_ENER_S_TH_LESSCLEAN -386 0x0333 //TX_OUT_ENER_S_TH_NOISY -387 0x019A //TX_OUT_ENER_TH_NOISE -388 0x0333 //TX_OUT_ENER_TH_SPEECH -389 0x2000 //TX_SN_NPB_GAIN -390 0x0000 //TX_NN_NPB_GAIN -391 0x0000 //TX_CSX_ALPHA_0 -392 0x0000 //TX_CSX_ALPHA_1 -393 0x0000 //TX_CSX_ALPHA_2 -394 0x0000 //TX_CSX_ALPHA_3 -395 0x0800 //TX_MU_ARSP_EST -396 0x00C8 //TX_P_OUTBEAM_MIN_TH -397 0x0002 //TX_EXTRA_NS_L -398 0x0800 //TX_EXTRA_NS_A -399 0x0005 //TX_VR_NOISE_FLOOR_TH -400 0x0148 //TX_MIN_G_LOW300HZ -401 0x0001 //TX_MAXLEVEL_CNG -402 0x00B4 //TX_STN_NOISE_TH -403 0x4000 //TX_POST_MASK_SUP -404 0x7FFF //TX_POST_MASK_ADJUST -405 0x00C8 //TX_NS_ENOISE_MIC0_TH -406 0x0033 //TX_MINENOISE_MIC0_TH -407 0x012C //TX_MINENOISE_MIC0_S_TH -408 0x7FFF //TX_MIN_G_CTRL_SSNS -409 0x0000 //TX_METAL_RTO_THR -410 0x4848 //TX_NS_FP_K_METAL -411 0x3A98 //TX_NOISEDET_BOOST_TH -412 0x0FA0 //TX_NSMOOTH_TH -413 0x0000 //TX_NS_RESRV_8 -414 0x1800 //TX_RHO_UPB -415 0x0BB8 //TX_N_HOLD_HS -416 0x0050 //TX_N_RHO_BFR0 -417 0x7FFF //TX_LAMBDA_ARSP_EST -418 0x0100 //TX_EXTRA_GAIN_MICBLOCK -419 0x0CCD //TX_THR_STD_NSR -420 0x019A //TX_THR_STD_PLH -421 0x2AF8 //TX_N_HOLD_STD -422 0x0066 //TX_THR_STD_RHO -423 0x2000 //TX_BF_RESET_THR_HS -424 0x09C4 //TX_SB_RTO_MEAN_TH -425 0x0000 //TX_SB_RHO_MEAN_TH_NTALK -426 0x3800 //TX_SB_RTO_MEAN_TH_ABN -427 0x2EE0 //TX_SB_RTO_MEAN_TH_RUB -428 0x0000 //TX_WTA_EN_RTO_TH -429 0x0000 //TX_TOP_ENER_TH_F -430 0x0000 //TX_DESIRED_TALK_HOLDT -431 0x0800 //TX_MIC_BLOCK_FACTOR -432 0x0000 //TX_NSEST_BFRLRNRDC -433 0x0000 //TX_THR_POST_FLT_HS -434 0x0010 //TX_HS_VAD_BIN -435 0x2666 //TX_THR_VAD_HS -436 0x2CCD //TX_MEAN_RTO_MIN_TH2 -437 0x0032 //TX_SILENCE_T -438 0x0000 //TX_A_POST_FLT_WTA -439 0x799A //TX_LAMBDA_PFLT_WTA -440 0x0000 //TX_SB_RHO_MEAN2_TH -441 0x0190 //TX_SB_RHO_MEAN3_TH -442 0x0000 //TX_HS_RESRV_4 -443 0x0000 //TX_HS_RESRV_5 -444 0x003C //TX_DOA_VAD_THR_1 -445 0x0000 //TX_DOA_VAD_THR_2 -446 0x0028 //TX_DOA_VAD_THR1_0 -447 0x0028 //TX_DOA_VAD_THR1_1 -448 0x0000 //TX_SRC_DOA_RNG_LOW_0A -449 0x00B4 //TX_SRC_DOA_RNG_HIGH_0A -450 0x005A //TX_DFLT_SRC_DOA_0A -451 0x0000 //TX_SRC_DOA_RNG_LOW_0B -452 0x0000 //TX_SRC_DOA_RNG_HIGH_0B -453 0x0000 //TX_DFLT_SRC_DOA_0B -454 0x0000 //TX_SRC_DOA_RNG_LOW_0C -455 0x0000 //TX_SRC_DOA_RNG_HIGH_0C -456 0x0000 //TX_DFLT_SRC_DOA_0C -457 0x0000 //TX_SRC_DOA_RNG_LOW_0D -458 0x0000 //TX_SRC_DOA_RNG_HIGH_0D -459 0x0000 //TX_DFLT_SRC_DOA_0D -460 0x0000 //TX_SRC_DOA_RNG_LOW_1A -461 0x00B4 //TX_SRC_DOA_RNG_HIGH_1A -462 0x005A //TX_DFLT_SRC_DOA_1A -463 0x0000 //TX_SRC_DOA_RNG_LOW_1B -464 0x00B4 //TX_SRC_DOA_RNG_HIGH_1B -465 0x005A //TX_DFLT_SRC_DOA_1B -466 0x0000 //TX_SRC_DOA_RNG_LOW_1C -467 0x00B4 //TX_SRC_DOA_RNG_HIGH_1C -468 0x005A //TX_DFLT_SRC_DOA_1C -469 0x0000 //TX_SRC_DOA_RNG_LOW_1D -470 0x00B4 //TX_SRC_DOA_RNG_HIGH_1D -471 0x005A //TX_DFLT_SRC_DOA_1D -472 0x0100 //TX_BF_HOLDOFF_T -473 0x7FFF //TX_DOA_COST_FACTOR -474 0x4000 //TX_MAINTOREFR_TH0 -475 0x071C //TX_DOA_TRK_THR -476 0x012C //TX_DOA_TRACK_HT -477 0x0200 //TX_N1_HOLD_HF -478 0x0100 //TX_N2_HOLD_HF -479 0x3000 //TX_BF_RESET_THR_HF -480 0x7333 //TX_DOA_SMOOTH -481 0x0800 //TX_MU_BF -482 0x0800 //TX_BF_MU_LF_B2 -483 0x0040 //TX_BF_FC_END_BIN_B2 -484 0x0020 //TX_BF_FC_END_BIN -485 0x0000 //TX_HF_RESRV_25 -486 0x0000 //TX_HF_RESRV_26 -487 0x0007 //TX_N_DOA_SEED -488 0x0001 //TX_FINE_DOA_SEARCH_FLG -489 0x0000 //TX_HF_RESRV_27 -490 0x038E //TX_DLT_SRC_DOA_RNG -491 0x0200 //TX_BF_MU_LF -492 0x0000 //TX_DFLT_SRC_LOC_0 -493 0x7FFF //TX_DFLT_SRC_LOC_1 -494 0x0000 //TX_DFLT_SRC_LOC_2 -495 0x038E //TX_DOA_TRACK_VADTH -496 0x0000 //TX_DOA_TRACK_NEW -497 0x01E0 //TX_NOR_OFF_THR -498 0x7C00 //TX_MORE_ON_700HZ_THR -499 0x0000 //TX_MU_BF_ADPT_NS -500 0x0000 //TX_ADAPT_LEN -501 0x6666 //TX_MORE_SNS -502 0x0000 //TX_NOR_OFF_TH1 -503 0x0000 //TX_WIDE_MASK_TH -504 0xD333 //TX_SUBSNRATIOHIGH4MEANBCK_THR -505 0x4000 //TX_C_POST_FLT_CUT -506 0x2000 //TX_RADIODTLV -507 0x0320 //TX_POWER_LINEIN_TH -508 0x0014 //TX_FE_VADCOUNT_TH_FC -509 0x0000 //TX_ECHO_SUPP_FC -510 0x0C80 //TX_ECHO_TH -511 0x6666 //TX_MIC_TO_BFGAIN -512 0x0000 //TX_MICTOBFGAIN0 -513 0x0000 //TX_FASTMUE_TH -514 0x0000 //TX_DERVB_LEN_0 -515 0x0000 //TX_DERVB_LEN_1 -516 0x0000 //TX_RHO_DERVB -517 0x0000 //TX_MIC_INDX_DERVB -518 0x0000 //TX_MU_DERVB -519 0x0000 //TX_DR_RESRV_0 -520 0x0000 //TX_DR_RESRV_1 -521 0x0000 //TX_DR_RESRV_2 -522 0x0000 //TX_DR_RESRV_3 -523 0x0000 //TX_DR_RESRV_4 -524 0x0000 //TX_DR_RESRV_5 -525 0x0000 //TX_DR_RESRV_6 -526 0x0000 //TX_DR_RESRV_7 -527 0x0000 //TX_DR_RESRV_8 -528 0x1333 //TX_WIND_MARK_TH -529 0x399A //TX_CORR_THR -530 0x0004 //TX_SNR_THR -531 0x0010 //TX_ENGY_THR -532 0x1770 //TX_CORR_HIGH_TH -533 0x6000 //TX_ENGY_THR_2 -534 0x3400 //TX_MEAN_RTO_THR -535 0x0028 //TX_WNS_ENOISE_MIC0_TH -536 0x3000 //TX_RATIOMICL_TH -537 0x64CD //TX_CALIG_HS -538 0x0000 //TX_LVL_CTRL -539 0x0014 //TX_WIND_SUPRTO -540 0x000A //TX_WNS_MIN_G -541 0x0000 //TX_WNS_B_POST_FLT -542 0x2800 //TX_RATIOMICH_TH -543 0xD120 //TX_WIND_INBEAM_L_TH -544 0x0FA0 //TX_WIND_INBEAM_H_TH -545 0x2000 //TX_WNS_RESRV_0 -546 0x59D8 //TX_WNS_RESRV_1 -547 0x0000 //TX_WNS_RESRV_2 -548 0x0000 //TX_WNS_RESRV_3 -549 0x0000 //TX_WNS_RESRV_4 -550 0x0000 //TX_WNS_RESRV_5 -551 0x0000 //TX_WNS_RESRV_6 -552 0x0000 //TX_PB_B_POST_FLT_LESSCUT -553 0x0070 //TX_BF_LESSCUT_BBIN -554 0x0070 //TX_BF_LESSCUT_EBIN -555 0x0010 //TX_POSTBFB0 -556 0x0070 //TX_POSTBFB -557 0x00B0 //TX_POSTBFE -558 0x0E66 //TX_SPEECH_SNR_TH -559 0x0050 //TX_PB_MAX_PRI_SNR_TH -560 0x770A //TX_MAX_PRI_SNR_TH_L -561 0x0000 //TX_PFGAIN -562 0x0000 //TX_MAINTOREFR_TH -563 0x0000 //TX_SAM_MARK -564 0x0000 //TX_PB_RESRV_0 -565 0x0000 //TX_PB_RESRV_1 -566 0x001C //TX_FDEQ_SUBNUM -567 0x4E4E //TX_FDEQ_GAIN_0 -568 0x4E48 //TX_FDEQ_GAIN_1 -569 0x4848 //TX_FDEQ_GAIN_2 -570 0x4848 //TX_FDEQ_GAIN_3 -571 0x4440 //TX_FDEQ_GAIN_4 -572 0x4850 //TX_FDEQ_GAIN_5 -573 0x5455 //TX_FDEQ_GAIN_6 -574 0x554C //TX_FDEQ_GAIN_7 -575 0x4543 //TX_FDEQ_GAIN_8 -576 0x4544 //TX_FDEQ_GAIN_9 -577 0x3C3C //TX_FDEQ_GAIN_10 -578 0x3C3C //TX_FDEQ_GAIN_11 -579 0x4848 //TX_FDEQ_GAIN_12 -580 0x4848 //TX_FDEQ_GAIN_13 -581 0x4848 //TX_FDEQ_GAIN_14 -582 0x4848 //TX_FDEQ_GAIN_15 -583 0x4848 //TX_FDEQ_GAIN_16 -584 0x4848 //TX_FDEQ_GAIN_17 -585 0x4848 //TX_FDEQ_GAIN_18 -586 0x4848 //TX_FDEQ_GAIN_19 -587 0x4848 //TX_FDEQ_GAIN_20 -588 0x4848 //TX_FDEQ_GAIN_21 -589 0x4848 //TX_FDEQ_GAIN_22 -590 0x4848 //TX_FDEQ_GAIN_23 -591 0x0202 //TX_FDEQ_BIN_0 -592 0x0203 //TX_FDEQ_BIN_1 -593 0x0303 //TX_FDEQ_BIN_2 -594 0x0304 //TX_FDEQ_BIN_3 -595 0x0405 //TX_FDEQ_BIN_4 -596 0x0506 //TX_FDEQ_BIN_5 -597 0x0708 //TX_FDEQ_BIN_6 -598 0x090A //TX_FDEQ_BIN_7 -599 0x0B0C //TX_FDEQ_BIN_8 -600 0x0D0E //TX_FDEQ_BIN_9 -601 0x0E0F //TX_FDEQ_BIN_10 -602 0x0F10 //TX_FDEQ_BIN_11 -603 0x1011 //TX_FDEQ_BIN_12 -604 0x1104 //TX_FDEQ_BIN_13 -605 0x0000 //TX_FDEQ_BIN_14 -606 0x0000 //TX_FDEQ_BIN_15 -607 0x0000 //TX_FDEQ_BIN_16 -608 0x0000 //TX_FDEQ_BIN_17 -609 0x0000 //TX_FDEQ_BIN_18 -610 0x0000 //TX_FDEQ_BIN_19 -611 0x0000 //TX_FDEQ_BIN_20 -612 0x0000 //TX_FDEQ_BIN_21 -613 0x0000 //TX_FDEQ_BIN_22 -614 0x0000 //TX_FDEQ_BIN_23 -615 0x0000 //TX_FDEQ_PADDING -616 0x0020 //TX_PREEQ_SUBNUM_MIC0 -617 0x4848 //TX_PREEQ_GAIN_MIC0_0 -618 0x4848 //TX_PREEQ_GAIN_MIC0_1 -619 0x4848 //TX_PREEQ_GAIN_MIC0_2 -620 0x4848 //TX_PREEQ_GAIN_MIC0_3 -621 0x4848 //TX_PREEQ_GAIN_MIC0_4 -622 0x4848 //TX_PREEQ_GAIN_MIC0_5 -623 0x4848 //TX_PREEQ_GAIN_MIC0_6 -624 0x4848 //TX_PREEQ_GAIN_MIC0_7 -625 0x4848 //TX_PREEQ_GAIN_MIC0_8 -626 0x4848 //TX_PREEQ_GAIN_MIC0_9 -627 0x4848 //TX_PREEQ_GAIN_MIC0_10 -628 0x4848 //TX_PREEQ_GAIN_MIC0_11 -629 0x4848 //TX_PREEQ_GAIN_MIC0_12 -630 0x4848 //TX_PREEQ_GAIN_MIC0_13 -631 0x4848 //TX_PREEQ_GAIN_MIC0_14 -632 0x4848 //TX_PREEQ_GAIN_MIC0_15 -633 0x4848 //TX_PREEQ_GAIN_MIC0_16 -634 0x4848 //TX_PREEQ_GAIN_MIC0_17 -635 0x4848 //TX_PREEQ_GAIN_MIC0_18 -636 0x4848 //TX_PREEQ_GAIN_MIC0_19 -637 0x4848 //TX_PREEQ_GAIN_MIC0_20 -638 0x4848 //TX_PREEQ_GAIN_MIC0_21 -639 0x4848 //TX_PREEQ_GAIN_MIC0_22 -640 0x4848 //TX_PREEQ_GAIN_MIC0_23 -641 0x0202 //TX_PREEQ_BIN_MIC0_0 -642 0x0203 //TX_PREEQ_BIN_MIC0_1 -643 0x0303 //TX_PREEQ_BIN_MIC0_2 -644 0x0304 //TX_PREEQ_BIN_MIC0_3 -645 0x0405 //TX_PREEQ_BIN_MIC0_4 -646 0x0506 //TX_PREEQ_BIN_MIC0_5 -647 0x0708 //TX_PREEQ_BIN_MIC0_6 -648 0x090A //TX_PREEQ_BIN_MIC0_7 -649 0x0B0C //TX_PREEQ_BIN_MIC0_8 -650 0x0D0E //TX_PREEQ_BIN_MIC0_9 -651 0x0F10 //TX_PREEQ_BIN_MIC0_10 -652 0x1011 //TX_PREEQ_BIN_MIC0_11 -653 0x1104 //TX_PREEQ_BIN_MIC0_12 -654 0x101B //TX_PREEQ_BIN_MIC0_13 -655 0x0000 //TX_PREEQ_BIN_MIC0_14 -656 0x0000 //TX_PREEQ_BIN_MIC0_15 -657 0x0000 //TX_PREEQ_BIN_MIC0_16 -658 0x0000 //TX_PREEQ_BIN_MIC0_17 -659 0x0000 //TX_PREEQ_BIN_MIC0_18 -660 0x0000 //TX_PREEQ_BIN_MIC0_19 -661 0x0000 //TX_PREEQ_BIN_MIC0_20 -662 0x0000 //TX_PREEQ_BIN_MIC0_21 -663 0x0000 //TX_PREEQ_BIN_MIC0_22 -664 0x0000 //TX_PREEQ_BIN_MIC0_23 -665 0x0020 //TX_PREEQ_SUBNUM_MIC1 -666 0x4848 //TX_PREEQ_GAIN_MIC1_0 -667 0x4848 //TX_PREEQ_GAIN_MIC1_1 -668 0x4848 //TX_PREEQ_GAIN_MIC1_2 -669 0x4848 //TX_PREEQ_GAIN_MIC1_3 -670 0x4848 //TX_PREEQ_GAIN_MIC1_4 -671 0x4848 //TX_PREEQ_GAIN_MIC1_5 -672 0x4848 //TX_PREEQ_GAIN_MIC1_6 -673 0x4849 //TX_PREEQ_GAIN_MIC1_7 -674 0x4B4E //TX_PREEQ_GAIN_MIC1_8 -675 0x5051 //TX_PREEQ_GAIN_MIC1_9 -676 0x5255 //TX_PREEQ_GAIN_MIC1_10 -677 0x5759 //TX_PREEQ_GAIN_MIC1_11 -678 0x5A60 //TX_PREEQ_GAIN_MIC1_12 -679 0x6670 //TX_PREEQ_GAIN_MIC1_13 -680 0x4848 //TX_PREEQ_GAIN_MIC1_14 -681 0x4848 //TX_PREEQ_GAIN_MIC1_15 -682 0x4848 //TX_PREEQ_GAIN_MIC1_16 -683 0x4848 //TX_PREEQ_GAIN_MIC1_17 -684 0x4848 //TX_PREEQ_GAIN_MIC1_18 -685 0x4848 //TX_PREEQ_GAIN_MIC1_19 -686 0x4848 //TX_PREEQ_GAIN_MIC1_20 -687 0x4848 //TX_PREEQ_GAIN_MIC1_21 -688 0x4848 //TX_PREEQ_GAIN_MIC1_22 -689 0x4848 //TX_PREEQ_GAIN_MIC1_23 -690 0x0202 //TX_PREEQ_BIN_MIC1_0 -691 0x0203 //TX_PREEQ_BIN_MIC1_1 -692 0x0303 //TX_PREEQ_BIN_MIC1_2 -693 0x0304 //TX_PREEQ_BIN_MIC1_3 -694 0x0405 //TX_PREEQ_BIN_MIC1_4 -695 0x0506 //TX_PREEQ_BIN_MIC1_5 -696 0x0708 //TX_PREEQ_BIN_MIC1_6 -697 0x090A //TX_PREEQ_BIN_MIC1_7 -698 0x0B0C //TX_PREEQ_BIN_MIC1_8 -699 0x0D0E //TX_PREEQ_BIN_MIC1_9 -700 0x0F10 //TX_PREEQ_BIN_MIC1_10 -701 0x1011 //TX_PREEQ_BIN_MIC1_11 -702 0x1104 //TX_PREEQ_BIN_MIC1_12 -703 0x101B //TX_PREEQ_BIN_MIC1_13 -704 0x0000 //TX_PREEQ_BIN_MIC1_14 -705 0x0000 //TX_PREEQ_BIN_MIC1_15 -706 0x0000 //TX_PREEQ_BIN_MIC1_16 -707 0x0000 //TX_PREEQ_BIN_MIC1_17 -708 0x0000 //TX_PREEQ_BIN_MIC1_18 -709 0x0000 //TX_PREEQ_BIN_MIC1_19 -710 0x0000 //TX_PREEQ_BIN_MIC1_20 -711 0x0000 //TX_PREEQ_BIN_MIC1_21 -712 0x0000 //TX_PREEQ_BIN_MIC1_22 -713 0x0000 //TX_PREEQ_BIN_MIC1_23 -714 0x0020 //TX_PREEQ_SUBNUM_MIC2 -715 0x4848 //TX_PREEQ_GAIN_MIC2_0 -716 0x4848 //TX_PREEQ_GAIN_MIC2_1 -717 0x4848 //TX_PREEQ_GAIN_MIC2_2 -718 0x4848 //TX_PREEQ_GAIN_MIC2_3 -719 0x4A4A //TX_PREEQ_GAIN_MIC2_4 -720 0x4B4B //TX_PREEQ_GAIN_MIC2_5 -721 0x4C4D //TX_PREEQ_GAIN_MIC2_6 -722 0x4D4D //TX_PREEQ_GAIN_MIC2_7 -723 0x4D4E //TX_PREEQ_GAIN_MIC2_8 -724 0x4E4E //TX_PREEQ_GAIN_MIC2_9 -725 0x4E4F //TX_PREEQ_GAIN_MIC2_10 -726 0x4F4F //TX_PREEQ_GAIN_MIC2_11 -727 0x5050 //TX_PREEQ_GAIN_MIC2_12 -728 0x5050 //TX_PREEQ_GAIN_MIC2_13 -729 0x5050 //TX_PREEQ_GAIN_MIC2_14 -730 0x5050 //TX_PREEQ_GAIN_MIC2_15 -731 0x4848 //TX_PREEQ_GAIN_MIC2_16 -732 0x4848 //TX_PREEQ_GAIN_MIC2_17 -733 0x4848 //TX_PREEQ_GAIN_MIC2_18 -734 0x4848 //TX_PREEQ_GAIN_MIC2_19 -735 0x4848 //TX_PREEQ_GAIN_MIC2_20 -736 0x4848 //TX_PREEQ_GAIN_MIC2_21 -737 0x4848 //TX_PREEQ_GAIN_MIC2_22 -738 0x4848 //TX_PREEQ_GAIN_MIC2_23 -739 0x0608 //TX_PREEQ_BIN_MIC2_0 -740 0x0808 //TX_PREEQ_BIN_MIC2_1 -741 0x0808 //TX_PREEQ_BIN_MIC2_2 -742 0x0808 //TX_PREEQ_BIN_MIC2_3 -743 0x0808 //TX_PREEQ_BIN_MIC2_4 -744 0x0808 //TX_PREEQ_BIN_MIC2_5 -745 0x0808 //TX_PREEQ_BIN_MIC2_6 -746 0x0808 //TX_PREEQ_BIN_MIC2_7 -747 0x0808 //TX_PREEQ_BIN_MIC2_8 -748 0x0808 //TX_PREEQ_BIN_MIC2_9 -749 0x0808 //TX_PREEQ_BIN_MIC2_10 -750 0x0808 //TX_PREEQ_BIN_MIC2_11 -751 0x0808 //TX_PREEQ_BIN_MIC2_12 -752 0x0808 //TX_PREEQ_BIN_MIC2_13 -753 0x0808 //TX_PREEQ_BIN_MIC2_14 -754 0x020E //TX_PREEQ_BIN_MIC2_15 -755 0x0000 //TX_PREEQ_BIN_MIC2_16 -756 0x0000 //TX_PREEQ_BIN_MIC2_17 -757 0x0000 //TX_PREEQ_BIN_MIC2_18 -758 0x0000 //TX_PREEQ_BIN_MIC2_19 -759 0x0000 //TX_PREEQ_BIN_MIC2_20 -760 0x0000 //TX_PREEQ_BIN_MIC2_21 -761 0x0000 //TX_PREEQ_BIN_MIC2_22 -762 0x0000 //TX_PREEQ_BIN_MIC2_23 -763 0x0006 //TX_MASKING_ABILITY -764 0x0800 //TX_NND_WEIGHT -765 0x0062 //TX_MIC_CALIBRATION_0 -766 0x0062 //TX_MIC_CALIBRATION_1 -767 0x0062 //TX_MIC_CALIBRATION_2 -768 0x0062 //TX_MIC_CALIBRATION_3 -769 0x0046 //TX_MIC_PWR_BIAS_0 -770 0x0046 //TX_MIC_PWR_BIAS_1 -771 0x0046 //TX_MIC_PWR_BIAS_2 -772 0x0046 //TX_MIC_PWR_BIAS_3 -773 0x0009 //TX_GAIN_LIMIT_0 -774 0x000F //TX_GAIN_LIMIT_1 -775 0x000F //TX_GAIN_LIMIT_2 -776 0x000F //TX_GAIN_LIMIT_3 -777 0x7F5B //TX_BVE_NOVAD0_ALPHADOWN -778 0x7FDE //TX_BVE_VAD0_ALPHAUP -779 0x7F3A //TX_BVE_VAD0_ALPHADOWN -780 0x2000 //TX_BVE_GAINWEIGHT_NOFEVADLI -781 0x7F5B //TX_BVE_FEVADLI_ALPHA -782 0x7F19 //TX_BVE_NOVAD0_ALPHAUP -783 0x0800 //TX_TDDRC_ALPHA_UP_01 -784 0x0800 //TX_TDDRC_ALPHA_UP_02 -785 0x0800 //TX_TDDRC_ALPHA_UP_03 -786 0x0800 //TX_TDDRC_ALPHA_UP_04 -787 0x7EB8 //TX_TDDRC_ALPHA_DWN_01 -788 0x7EB8 //TX_TDDRC_ALPHA_DWN_02 -789 0x7EB8 //TX_TDDRC_ALPHA_DWN_03 -790 0x7EB8 //TX_TDDRC_ALPHA_DWN_04 -791 0x7FFF //TX_TDDRC_TD_DRC_LIMIT -792 0x0800 //TX_TDDRC_POST_LIMIT_GAIN -793 0x0000 //TX_TDDRC_RESRV_0 -794 0x0000 //TX_TDDRC_RESRV_1 -795 0x0018 //TX_FDDRC_BAND_MARGIN_0 -796 0x0030 //TX_FDDRC_BAND_MARGIN_1 -797 0x0050 //TX_FDDRC_BAND_MARGIN_2 -798 0x0080 //TX_FDDRC_BAND_MARGIN_3 -799 0x0007 //TX_FDDRC_BLOCK_EXP -800 0x5000 //TX_FDDRC_THRD_2_0 -801 0x5000 //TX_FDDRC_THRD_2_1 -802 0x5000 //TX_FDDRC_THRD_2_2 -803 0x5000 //TX_FDDRC_THRD_2_3 -804 0x6400 //TX_FDDRC_THRD_3_0 -805 0x6400 //TX_FDDRC_THRD_3_1 -806 0x6400 //TX_FDDRC_THRD_3_2 -807 0x6400 //TX_FDDRC_THRD_3_3 -808 0x2000 //TX_FDDRC_SLANT_0_0 -809 0x2000 //TX_FDDRC_SLANT_0_1 -810 0x2000 //TX_FDDRC_SLANT_0_2 -811 0x2000 //TX_FDDRC_SLANT_0_3 -812 0x5333 //TX_FDDRC_SLANT_1_0 -813 0x5333 //TX_FDDRC_SLANT_1_1 -814 0x5333 //TX_FDDRC_SLANT_1_2 -815 0x5333 //TX_FDDRC_SLANT_1_3 -816 0x0010 //TX_DEADMIC_SILENCE_TH -817 0x0600 //TX_MIC_DEGRADE_TH -818 0x0078 //TX_DEADMIC_CNT -819 0x0078 //TX_MIC_DEGRADE_CNT -820 0x0000 //TX_FDDRC_RESRV_4 -821 0x0000 //TX_FDDRC_RESRV_5 -822 0x0000 //TX_FDDRC_RESRV_6 -823 0x7FFF //TX_KS_NOISEPASTE_FACTOR -824 0x0001 //TX_KS_CONFIG -825 0x7FFF //TX_KS_GAIN_MIN -826 0x0000 //TX_KS_RESRV_0 -827 0x0000 //TX_KS_RESRV_1 -828 0x0000 //TX_KS_RESRV_2 -829 0x7C00 //TX_LAMBDA_PKA_FP -830 0x2000 //TX_TPKA_FP -831 0x0080 //TX_MIN_G_FP -832 0x2000 //TX_MAX_G_FP -833 0x4848 //TX_FFP_FP_K_METAL -834 0x4000 //TX_A_POST_FLT_FP -835 0x0F5C //TX_RTO_OUTBEAM_TH -836 0x4CCD //TX_TPKA_FP_THD -837 0x0000 //TX_MAX_G_FP_BLK -838 0x0000 //TX_FFP_FADEIN -839 0x0000 //TX_FFP_FADEOUT -840 0x0000 //TX_WHISPERCTH -841 0x0000 //TX_WHISPERHOLDT -842 0x0000 //TX_WHISP_ENTHH -843 0x0000 //TX_WHISP_ENTHL -844 0x0000 //TX_WHISP_RTOTH -845 0x0000 //TX_WHISP_RTOTH2 -846 0x0096 //TX_MUTE_PERIOD -847 0x0000 //TX_FADE_IN_PERIOD -848 0x0100 //TX_FFP_RESRV_2 -849 0x0020 //TX_FFP_RESRV_3 -850 0x0000 //TX_FFP_RESRV_4 -851 0x0000 //TX_FFP_RESRV_5 -852 0x0000 //TX_FFP_RESRV_6 -853 0x0002 //TX_FILTINDX -854 0x0001 //TX_TDDRC_THRD_0 -855 0x0002 //TX_TDDRC_THRD_1 -856 0x1800 //TX_TDDRC_THRD_2 -857 0x1800 //TX_TDDRC_THRD_3 -858 0x6000 //TX_TDDRC_SLANT_0 -859 0x6000 //TX_TDDRC_SLANT_1 -860 0x0800 //TX_TDDRC_ALPHA_UP_00 -861 0x7EB8 //TX_TDDRC_ALPHA_DWN_00 -862 0x0000 //TX_TDDRC_HMNC_FLAG -863 0x199A //TX_TDDRC_HMNC_GAIN -864 0x0000 //TX_TDDRC_SMT_FLAG -865 0x0CCD //TX_TDDRC_SMT_W -866 0x0BE3 //TX_TDDRC_DRC_GAIN -867 0x7FFF //TX_TDDRC_LMT_THRD -868 0x0000 //TX_TDDRC_LMT_ALPHA -869 0x0000 //TX_TFMASKLTH -870 0x0000 //TX_TFMASKLTHL -871 0x0CCD //TX_TFMASKHTH -872 0x0CCD //TX_TFMASKLTH_BINVAD -873 0xF333 //TX_TFMASKLTH_NS_EST -874 0x2CCD //TX_TFMASKLTH_DOA -875 0xECCD //TX_TFMASKTH_BLESSCUT -876 0x1000 //TX_B_LESSCUT_RTO_MASK -877 0x3800 //TX_SB_RHO_MEAN_TH_ABN -878 0x2000 //TX_B_POST_FLT_MASK -879 0x0000 //TX_B_POST_FLT_MASK1 -880 0x5333 //TX_GAIN_WIND_MASK -881 0x7FFF //TX_TFMASK_BFSTRICT_MUSIC -882 0x0000 //TX_TFMASK_BFSTRICT_NOMUSIC -883 0x7333 //TX_FASTNS_OUTIN_TH -884 0x0CCD //TX_FASTNS_TFMASK_TH -885 0x0CCD //TX_FASTNS_TFMASKBIN_TH1 -886 0x0CCD //TX_FASTNS_TFMASKBIN_TH2 -887 0x0CCD //TX_FASTNS_TFMASKBIN_TH3 -888 0x0028 //TX_FASTNS_ARSPC_TH -889 0xC000 //TX_FASTNS_MASK5_TH -890 0x4848 //TX_POSTSSA_MIN_G_VR_MASK -891 0x1000 //TX_A_LESSCUT_RTO_MASK -892 0x1770 //TX_FASTNS_NOISETH -893 0xC000 //TX_FASTNS_SSA_THLFL -894 0xC000 //TX_FASTNS_SSA_THHFL -895 0xCCCC //TX_FASTNS_SSA_THLFH -896 0xD999 //TX_FASTNS_SSA_THHFH -#RX -0 0x027C //RX_RECVFUNC_MODE_0 -1 0x0000 //RX_RECVFUNC_MODE_1 -2 0x0001 //RX_SAMPLINGFREQ_SIG -3 0x0001 //RX_SAMPLINGFREQ_PROC -4 0x000A //RX_FRAME_SZ -5 0x0000 //RX_DELAY_OPT -6 0x6000 //RX_TDDRC_ALPHA_UP_1 -7 0x6000 //RX_TDDRC_ALPHA_UP_2 -8 0x6000 //RX_TDDRC_ALPHA_UP_3 -9 0x1000 //RX_TDDRC_ALPHA_UP_4 -10 0x0800 //RX_PGA -11 0x7B02 //RX_A_HP -12 0x4000 //RX_B_PE -13 0x7800 //RX_THR_PITCH_DET_0 -14 0x7000 //RX_THR_PITCH_DET_1 -15 0x6000 //RX_THR_PITCH_DET_2 -16 0x0008 //RX_PITCH_BFR_LEN -17 0x0003 //RX_SBD_PITCH_DET -18 0x0100 //RX_PP_RESRV_0 -19 0x0020 //RX_PP_RESRV_1 -20 0x0400 //RX_N_SN_EST -21 0x000C //RX_N2_SN_EST -22 0x0010 //RX_NS_LVL_CTRL -23 0xF800 //RX_THR_SN_EST -24 0x7E00 //RX_LAMBDA_PFILT -25 0x000A //RX_FENS_RESRV_0 -26 0x0190 //RX_FENS_RESRV_1 -27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 -28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 -29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 -30 0x0002 //RX_EXTRA_NS_L -31 0x0800 //RX_EXTRA_NS_A -32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 -33 0x7214 //RX_TDDRC_LIMITER_THRD -34 0x0800 //RX_TDDRC_LIMITER_GAIN -35 0x199A //RX_A_POST_FLT -36 0x0000 //RX_LMT_THRD -37 0x4000 //RX_LMT_ALPHA -38 0x001C //RX_FDEQ_SUBNUM -39 0x6868 //RX_FDEQ_GAIN_0 -40 0x6858 //RX_FDEQ_GAIN_1 -41 0x5858 //RX_FDEQ_GAIN_2 -42 0x5858 //RX_FDEQ_GAIN_3 -43 0x5C5C //RX_FDEQ_GAIN_4 -44 0x5854 //RX_FDEQ_GAIN_5 -45 0x544C //RX_FDEQ_GAIN_6 -46 0x4C4C //RX_FDEQ_GAIN_7 -47 0x4C60 //RX_FDEQ_GAIN_8 -48 0x6068 //RX_FDEQ_GAIN_9 -49 0x7070 //RX_FDEQ_GAIN_10 -50 0x8070 //RX_FDEQ_GAIN_11 -51 0x6060 //RX_FDEQ_GAIN_12 -52 0x7070 //RX_FDEQ_GAIN_13 -53 0x4848 //RX_FDEQ_GAIN_14 -54 0x4848 //RX_FDEQ_GAIN_15 -55 0x4848 //RX_FDEQ_GAIN_16 -56 0x4848 //RX_FDEQ_GAIN_17 -57 0x4848 //RX_FDEQ_GAIN_18 -58 0x4848 //RX_FDEQ_GAIN_19 -59 0x4848 //RX_FDEQ_GAIN_20 -60 0x4848 //RX_FDEQ_GAIN_21 -61 0x4848 //RX_FDEQ_GAIN_22 -62 0x4848 //RX_FDEQ_GAIN_23 -63 0x0202 //RX_FDEQ_BIN_0 -64 0x0203 //RX_FDEQ_BIN_1 -65 0x0303 //RX_FDEQ_BIN_2 -66 0x0304 //RX_FDEQ_BIN_3 -67 0x0404 //RX_FDEQ_BIN_4 -68 0x0204 //RX_FDEQ_BIN_5 -69 0x0A0A //RX_FDEQ_BIN_6 -70 0x0A0A //RX_FDEQ_BIN_7 -71 0x0B0C //RX_FDEQ_BIN_8 -72 0x0D0E //RX_FDEQ_BIN_9 -73 0x0E0F //RX_FDEQ_BIN_10 -74 0x0F10 //RX_FDEQ_BIN_11 -75 0x1011 //RX_FDEQ_BIN_12 -76 0x1104 //RX_FDEQ_BIN_13 -77 0x0000 //RX_FDEQ_BIN_14 -78 0x0000 //RX_FDEQ_BIN_15 -79 0x0000 //RX_FDEQ_BIN_16 -80 0x0000 //RX_FDEQ_BIN_17 -81 0x0000 //RX_FDEQ_BIN_18 -82 0x0000 //RX_FDEQ_BIN_19 -83 0x0000 //RX_FDEQ_BIN_20 -84 0x0000 //RX_FDEQ_BIN_21 -85 0x0000 //RX_FDEQ_BIN_22 -86 0x0000 //RX_FDEQ_BIN_23 -87 0x4000 //RX_FDEQ_RESRV_0 -88 0x0320 //RX_FDEQ_RESRV_1 -89 0x0018 //RX_FDDRC_BAND_MARGIN_0 -90 0x0035 //RX_FDDRC_BAND_MARGIN_1 -91 0x00D5 //RX_FDDRC_BAND_MARGIN_2 -92 0x0120 //RX_FDDRC_BAND_MARGIN_3 -93 0x0004 //RX_FDDRC_BLOCK_EXP -94 0x5000 //RX_FDDRC_THRD_2_0 -95 0x5000 //RX_FDDRC_THRD_2_1 -96 0x2000 //RX_FDDRC_THRD_2_2 -97 0x5000 //RX_FDDRC_THRD_2_3 -98 0x6400 //RX_FDDRC_THRD_3_0 -99 0x6400 //RX_FDDRC_THRD_3_1 -100 0x2000 //RX_FDDRC_THRD_3_2 -101 0x5000 //RX_FDDRC_THRD_3_3 -102 0x4000 //RX_FDDRC_SLANT_0_0 -103 0x4000 //RX_FDDRC_SLANT_0_1 -104 0x4000 //RX_FDDRC_SLANT_0_2 -105 0x4000 //RX_FDDRC_SLANT_0_3 -106 0x7FFF //RX_FDDRC_SLANT_1_0 -107 0x7FFF //RX_FDDRC_SLANT_1_1 -108 0x7FFF //RX_FDDRC_SLANT_1_2 -109 0x7FFF //RX_FDDRC_SLANT_1_3 -110 0x0000 //RX_FDDRC_RESRV_0 -111 0x0002 //RX_FILTINDX -112 0x0002 //RX_TDDRC_THRD_0 -113 0x0004 //RX_TDDRC_THRD_1 -114 0x1C00 //RX_TDDRC_THRD_2 -115 0x1C00 //RX_TDDRC_THRD_3 -116 0x7FFF //RX_TDDRC_SLANT_0 -117 0x7FFF //RX_TDDRC_SLANT_1 -118 0x6000 //RX_TDDRC_ALPHA_UP_0 -119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 -120 0x0000 //RX_TDDRC_HMNC_FLAG -121 0x199A //RX_TDDRC_HMNC_GAIN -122 0x0001 //RX_TDDRC_SMT_FLAG -123 0x0CCD //RX_TDDRC_SMT_W -124 0x06AF //RX_TDDRC_DRC_GAIN -125 0x7C00 //RX_LAMBDA_PKA_FP -126 0x2000 //RX_TPKA_FP -127 0x2000 //RX_MIN_G_FP -128 0x0080 //RX_MAX_G_FP -129 0x0014 //RX_SPK_VOL -130 0x0000 //RX_VOL_RESRV_0 -131 0x0000 //RX_MAXLEVEL_CNG -132 0x3000 //RX_BWE_UV_TH -133 0x3000 //RX_BWE_UV_TH2 -134 0x1800 //RX_BWE_UV_TH3 -135 0x1000 //RX_BWE_V_TH -136 0x04CD //RX_BWE_GAIN1_V_TH1 -137 0x0F33 //RX_BWE_GAIN1_V_TH2 -138 0x7333 //RX_BWE_UV_EQ -139 0x199A //RX_BWE_V_EQ -140 0x7333 //RX_BWE_TONE_TH -141 0x0004 //RX_BWE_UV_HOLD_T -142 0x6CCD //RX_BWE_GAIN2_ALPHA -143 0x799A //RX_BWE_GAIN3_ALPHA -144 0x001E //RX_BWE_CUTOFF -145 0x3000 //RX_BWE_GAINFILL -146 0x3200 //RX_BWE_MAXTH_TONE -147 0x2000 //RX_BWE_EQ_0 -148 0x2000 //RX_BWE_EQ_1 -149 0x2000 //RX_BWE_EQ_2 -150 0x2000 //RX_BWE_EQ_3 -151 0x2000 //RX_BWE_EQ_4 -152 0x2000 //RX_BWE_EQ_5 -153 0x2000 //RX_BWE_EQ_6 -154 0x0000 //RX_BWE_RESRV_0 -155 0x0000 //RX_BWE_RESRV_1 -156 0x0000 //RX_BWE_RESRV_2 -#VOL 0 -6 0x6000 //RX_TDDRC_ALPHA_UP_1 -7 0x6000 //RX_TDDRC_ALPHA_UP_2 -8 0x6000 //RX_TDDRC_ALPHA_UP_3 -9 0x1000 //RX_TDDRC_ALPHA_UP_4 -27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 -28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 -29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 -32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 -33 0x7214 //RX_TDDRC_LIMITER_THRD -34 0x0800 //RX_TDDRC_LIMITER_GAIN -112 0x0002 //RX_TDDRC_THRD_0 -113 0x0004 //RX_TDDRC_THRD_1 -114 0x1C00 //RX_TDDRC_THRD_2 -115 0x1C00 //RX_TDDRC_THRD_3 -116 0x7FFF //RX_TDDRC_SLANT_0 -117 0x7FFF //RX_TDDRC_SLANT_1 -118 0x6000 //RX_TDDRC_ALPHA_UP_0 -119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 -120 0x0000 //RX_TDDRC_HMNC_FLAG -121 0x199A //RX_TDDRC_HMNC_GAIN -122 0x0001 //RX_TDDRC_SMT_FLAG -123 0x0CCD //RX_TDDRC_SMT_W -124 0x06AF //RX_TDDRC_DRC_GAIN -38 0x001C //RX_FDEQ_SUBNUM -39 0x6868 //RX_FDEQ_GAIN_0 -40 0x6858 //RX_FDEQ_GAIN_1 -41 0x5858 //RX_FDEQ_GAIN_2 -42 0x5858 //RX_FDEQ_GAIN_3 -43 0x5C5C //RX_FDEQ_GAIN_4 -44 0x5854 //RX_FDEQ_GAIN_5 -45 0x544C //RX_FDEQ_GAIN_6 -46 0x4C4C //RX_FDEQ_GAIN_7 -47 0x4C60 //RX_FDEQ_GAIN_8 -48 0x6068 //RX_FDEQ_GAIN_9 -49 0x7070 //RX_FDEQ_GAIN_10 -50 0x8070 //RX_FDEQ_GAIN_11 -51 0x6060 //RX_FDEQ_GAIN_12 -52 0x7070 //RX_FDEQ_GAIN_13 -53 0x4848 //RX_FDEQ_GAIN_14 -54 0x4848 //RX_FDEQ_GAIN_15 -55 0x4848 //RX_FDEQ_GAIN_16 -56 0x4848 //RX_FDEQ_GAIN_17 -57 0x4848 //RX_FDEQ_GAIN_18 -58 0x4848 //RX_FDEQ_GAIN_19 -59 0x4848 //RX_FDEQ_GAIN_20 -60 0x4848 //RX_FDEQ_GAIN_21 -61 0x4848 //RX_FDEQ_GAIN_22 -62 0x4848 //RX_FDEQ_GAIN_23 -63 0x0202 //RX_FDEQ_BIN_0 -64 0x0203 //RX_FDEQ_BIN_1 -65 0x0303 //RX_FDEQ_BIN_2 -66 0x0304 //RX_FDEQ_BIN_3 -67 0x0404 //RX_FDEQ_BIN_4 -68 0x0204 //RX_FDEQ_BIN_5 -69 0x0A0A //RX_FDEQ_BIN_6 -70 0x0A0A //RX_FDEQ_BIN_7 -71 0x0B0C //RX_FDEQ_BIN_8 -72 0x0D0E //RX_FDEQ_BIN_9 -73 0x0E0F //RX_FDEQ_BIN_10 -74 0x0F10 //RX_FDEQ_BIN_11 -75 0x1011 //RX_FDEQ_BIN_12 -76 0x1104 //RX_FDEQ_BIN_13 -77 0x0000 //RX_FDEQ_BIN_14 -78 0x0000 //RX_FDEQ_BIN_15 -79 0x0000 //RX_FDEQ_BIN_16 -80 0x0000 //RX_FDEQ_BIN_17 -81 0x0000 //RX_FDEQ_BIN_18 -82 0x0000 //RX_FDEQ_BIN_19 -83 0x0000 //RX_FDEQ_BIN_20 -84 0x0000 //RX_FDEQ_BIN_21 -85 0x0000 //RX_FDEQ_BIN_22 -86 0x0000 //RX_FDEQ_BIN_23 -87 0x4000 //RX_FDEQ_RESRV_0 -88 0x0320 //RX_FDEQ_RESRV_1 -89 0x0018 //RX_FDDRC_BAND_MARGIN_0 -90 0x0035 //RX_FDDRC_BAND_MARGIN_1 -91 0x00D5 //RX_FDDRC_BAND_MARGIN_2 -92 0x0120 //RX_FDDRC_BAND_MARGIN_3 -93 0x0004 //RX_FDDRC_BLOCK_EXP -94 0x5000 //RX_FDDRC_THRD_2_0 -95 0x5000 //RX_FDDRC_THRD_2_1 -96 0x2000 //RX_FDDRC_THRD_2_2 -97 0x5000 //RX_FDDRC_THRD_2_3 -98 0x6400 //RX_FDDRC_THRD_3_0 -99 0x6400 //RX_FDDRC_THRD_3_1 -100 0x2000 //RX_FDDRC_THRD_3_2 -101 0x5000 //RX_FDDRC_THRD_3_3 -102 0x4000 //RX_FDDRC_SLANT_0_0 -103 0x4000 //RX_FDDRC_SLANT_0_1 -104 0x4000 //RX_FDDRC_SLANT_0_2 -105 0x4000 //RX_FDDRC_SLANT_0_3 -106 0x7FFF //RX_FDDRC_SLANT_1_0 -107 0x7FFF //RX_FDDRC_SLANT_1_1 -108 0x7FFF //RX_FDDRC_SLANT_1_2 -109 0x7FFF //RX_FDDRC_SLANT_1_3 -110 0x0000 //RX_FDDRC_RESRV_0 -129 0x0014 //RX_SPK_VOL -130 0x0000 //RX_VOL_RESRV_0 -#VOL 1 -6 0x6000 //RX_TDDRC_ALPHA_UP_1 -7 0x6000 //RX_TDDRC_ALPHA_UP_2 -8 0x6000 //RX_TDDRC_ALPHA_UP_3 -9 0x1000 //RX_TDDRC_ALPHA_UP_4 -27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 -28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 -29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 -32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 -33 0x7214 //RX_TDDRC_LIMITER_THRD -34 0x0800 //RX_TDDRC_LIMITER_GAIN -112 0x0002 //RX_TDDRC_THRD_0 -113 0x0004 //RX_TDDRC_THRD_1 -114 0x1C00 //RX_TDDRC_THRD_2 -115 0x1C00 //RX_TDDRC_THRD_3 -116 0x7FFF //RX_TDDRC_SLANT_0 -117 0x7FFF //RX_TDDRC_SLANT_1 -118 0x6000 //RX_TDDRC_ALPHA_UP_0 -119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 -120 0x0000 //RX_TDDRC_HMNC_FLAG -121 0x199A //RX_TDDRC_HMNC_GAIN -122 0x0001 //RX_TDDRC_SMT_FLAG -123 0x0CCD //RX_TDDRC_SMT_W -124 0x06AF //RX_TDDRC_DRC_GAIN -38 0x001C //RX_FDEQ_SUBNUM -39 0x6868 //RX_FDEQ_GAIN_0 -40 0x6858 //RX_FDEQ_GAIN_1 -41 0x5858 //RX_FDEQ_GAIN_2 -42 0x5858 //RX_FDEQ_GAIN_3 -43 0x5C5C //RX_FDEQ_GAIN_4 -44 0x5854 //RX_FDEQ_GAIN_5 -45 0x544C //RX_FDEQ_GAIN_6 -46 0x4C4C //RX_FDEQ_GAIN_7 -47 0x4C60 //RX_FDEQ_GAIN_8 -48 0x6068 //RX_FDEQ_GAIN_9 -49 0x7070 //RX_FDEQ_GAIN_10 -50 0x8070 //RX_FDEQ_GAIN_11 -51 0x6060 //RX_FDEQ_GAIN_12 -52 0x7070 //RX_FDEQ_GAIN_13 -53 0x4848 //RX_FDEQ_GAIN_14 -54 0x4848 //RX_FDEQ_GAIN_15 -55 0x4848 //RX_FDEQ_GAIN_16 -56 0x4848 //RX_FDEQ_GAIN_17 -57 0x4848 //RX_FDEQ_GAIN_18 -58 0x4848 //RX_FDEQ_GAIN_19 -59 0x4848 //RX_FDEQ_GAIN_20 -60 0x4848 //RX_FDEQ_GAIN_21 -61 0x4848 //RX_FDEQ_GAIN_22 -62 0x4848 //RX_FDEQ_GAIN_23 -63 0x0202 //RX_FDEQ_BIN_0 -64 0x0203 //RX_FDEQ_BIN_1 -65 0x0303 //RX_FDEQ_BIN_2 -66 0x0304 //RX_FDEQ_BIN_3 -67 0x0404 //RX_FDEQ_BIN_4 -68 0x0204 //RX_FDEQ_BIN_5 -69 0x0A0A //RX_FDEQ_BIN_6 -70 0x0A0A //RX_FDEQ_BIN_7 -71 0x0B0C //RX_FDEQ_BIN_8 -72 0x0D0E //RX_FDEQ_BIN_9 -73 0x0E0F //RX_FDEQ_BIN_10 -74 0x0F10 //RX_FDEQ_BIN_11 -75 0x1011 //RX_FDEQ_BIN_12 -76 0x1104 //RX_FDEQ_BIN_13 -77 0x0000 //RX_FDEQ_BIN_14 -78 0x0000 //RX_FDEQ_BIN_15 -79 0x0000 //RX_FDEQ_BIN_16 -80 0x0000 //RX_FDEQ_BIN_17 -81 0x0000 //RX_FDEQ_BIN_18 -82 0x0000 //RX_FDEQ_BIN_19 -83 0x0000 //RX_FDEQ_BIN_20 -84 0x0000 //RX_FDEQ_BIN_21 -85 0x0000 //RX_FDEQ_BIN_22 -86 0x0000 //RX_FDEQ_BIN_23 -87 0x4000 //RX_FDEQ_RESRV_0 -88 0x0320 //RX_FDEQ_RESRV_1 -89 0x0018 //RX_FDDRC_BAND_MARGIN_0 -90 0x0035 //RX_FDDRC_BAND_MARGIN_1 -91 0x00D5 //RX_FDDRC_BAND_MARGIN_2 -92 0x0120 //RX_FDDRC_BAND_MARGIN_3 -93 0x0004 //RX_FDDRC_BLOCK_EXP -94 0x5000 //RX_FDDRC_THRD_2_0 -95 0x5000 //RX_FDDRC_THRD_2_1 -96 0x2000 //RX_FDDRC_THRD_2_2 -97 0x5000 //RX_FDDRC_THRD_2_3 -98 0x6400 //RX_FDDRC_THRD_3_0 -99 0x6400 //RX_FDDRC_THRD_3_1 -100 0x2000 //RX_FDDRC_THRD_3_2 -101 0x5000 //RX_FDDRC_THRD_3_3 -102 0x4000 //RX_FDDRC_SLANT_0_0 -103 0x4000 //RX_FDDRC_SLANT_0_1 -104 0x4000 //RX_FDDRC_SLANT_0_2 -105 0x4000 //RX_FDDRC_SLANT_0_3 -106 0x7FFF //RX_FDDRC_SLANT_1_0 -107 0x7FFF //RX_FDDRC_SLANT_1_1 -108 0x7FFF //RX_FDDRC_SLANT_1_2 -109 0x7FFF //RX_FDDRC_SLANT_1_3 -110 0x0000 //RX_FDDRC_RESRV_0 -129 0x001A //RX_SPK_VOL -130 0x0000 //RX_VOL_RESRV_0 -#VOL 2 -6 0x6000 //RX_TDDRC_ALPHA_UP_1 -7 0x6000 //RX_TDDRC_ALPHA_UP_2 -8 0x6000 //RX_TDDRC_ALPHA_UP_3 -9 0x1000 //RX_TDDRC_ALPHA_UP_4 -27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 -28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 -29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 -32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 -33 0x7214 //RX_TDDRC_LIMITER_THRD -34 0x0800 //RX_TDDRC_LIMITER_GAIN -112 0x0002 //RX_TDDRC_THRD_0 -113 0x0004 //RX_TDDRC_THRD_1 -114 0x1C00 //RX_TDDRC_THRD_2 -115 0x1C00 //RX_TDDRC_THRD_3 -116 0x7FFF //RX_TDDRC_SLANT_0 -117 0x7FFF //RX_TDDRC_SLANT_1 -118 0x6000 //RX_TDDRC_ALPHA_UP_0 -119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 -120 0x0000 //RX_TDDRC_HMNC_FLAG -121 0x199A //RX_TDDRC_HMNC_GAIN -122 0x0001 //RX_TDDRC_SMT_FLAG -123 0x0CCD //RX_TDDRC_SMT_W -124 0x06AF //RX_TDDRC_DRC_GAIN -38 0x001C //RX_FDEQ_SUBNUM -39 0x6868 //RX_FDEQ_GAIN_0 -40 0x6858 //RX_FDEQ_GAIN_1 -41 0x5858 //RX_FDEQ_GAIN_2 -42 0x5858 //RX_FDEQ_GAIN_3 -43 0x5C5C //RX_FDEQ_GAIN_4 -44 0x5854 //RX_FDEQ_GAIN_5 -45 0x544C //RX_FDEQ_GAIN_6 -46 0x4C4C //RX_FDEQ_GAIN_7 -47 0x4C60 //RX_FDEQ_GAIN_8 -48 0x6068 //RX_FDEQ_GAIN_9 -49 0x7070 //RX_FDEQ_GAIN_10 -50 0x8070 //RX_FDEQ_GAIN_11 -51 0x6060 //RX_FDEQ_GAIN_12 -52 0x7070 //RX_FDEQ_GAIN_13 -53 0x4848 //RX_FDEQ_GAIN_14 -54 0x4848 //RX_FDEQ_GAIN_15 -55 0x4848 //RX_FDEQ_GAIN_16 -56 0x4848 //RX_FDEQ_GAIN_17 -57 0x4848 //RX_FDEQ_GAIN_18 -58 0x4848 //RX_FDEQ_GAIN_19 -59 0x4848 //RX_FDEQ_GAIN_20 -60 0x4848 //RX_FDEQ_GAIN_21 -61 0x4848 //RX_FDEQ_GAIN_22 -62 0x4848 //RX_FDEQ_GAIN_23 -63 0x0202 //RX_FDEQ_BIN_0 -64 0x0203 //RX_FDEQ_BIN_1 -65 0x0303 //RX_FDEQ_BIN_2 -66 0x0304 //RX_FDEQ_BIN_3 -67 0x0404 //RX_FDEQ_BIN_4 -68 0x0204 //RX_FDEQ_BIN_5 -69 0x0A0A //RX_FDEQ_BIN_6 -70 0x0A0A //RX_FDEQ_BIN_7 -71 0x0B0C //RX_FDEQ_BIN_8 -72 0x0D0E //RX_FDEQ_BIN_9 -73 0x0E0F //RX_FDEQ_BIN_10 -74 0x0F10 //RX_FDEQ_BIN_11 -75 0x1011 //RX_FDEQ_BIN_12 -76 0x1104 //RX_FDEQ_BIN_13 -77 0x0000 //RX_FDEQ_BIN_14 -78 0x0000 //RX_FDEQ_BIN_15 -79 0x0000 //RX_FDEQ_BIN_16 -80 0x0000 //RX_FDEQ_BIN_17 -81 0x0000 //RX_FDEQ_BIN_18 -82 0x0000 //RX_FDEQ_BIN_19 -83 0x0000 //RX_FDEQ_BIN_20 -84 0x0000 //RX_FDEQ_BIN_21 -85 0x0000 //RX_FDEQ_BIN_22 -86 0x0000 //RX_FDEQ_BIN_23 -87 0x4000 //RX_FDEQ_RESRV_0 -88 0x0320 //RX_FDEQ_RESRV_1 -89 0x0018 //RX_FDDRC_BAND_MARGIN_0 -90 0x0035 //RX_FDDRC_BAND_MARGIN_1 -91 0x00D5 //RX_FDDRC_BAND_MARGIN_2 -92 0x0120 //RX_FDDRC_BAND_MARGIN_3 -93 0x0004 //RX_FDDRC_BLOCK_EXP -94 0x5000 //RX_FDDRC_THRD_2_0 -95 0x5000 //RX_FDDRC_THRD_2_1 -96 0x2000 //RX_FDDRC_THRD_2_2 -97 0x5000 //RX_FDDRC_THRD_2_3 -98 0x6400 //RX_FDDRC_THRD_3_0 -99 0x6400 //RX_FDDRC_THRD_3_1 -100 0x2000 //RX_FDDRC_THRD_3_2 -101 0x5000 //RX_FDDRC_THRD_3_3 -102 0x4000 //RX_FDDRC_SLANT_0_0 -103 0x4000 //RX_FDDRC_SLANT_0_1 -104 0x4000 //RX_FDDRC_SLANT_0_2 -105 0x4000 //RX_FDDRC_SLANT_0_3 -106 0x7FFF //RX_FDDRC_SLANT_1_0 -107 0x7FFF //RX_FDDRC_SLANT_1_1 -108 0x7FFF //RX_FDDRC_SLANT_1_2 -109 0x7FFF //RX_FDDRC_SLANT_1_3 -110 0x0000 //RX_FDDRC_RESRV_0 -129 0x0026 //RX_SPK_VOL -130 0x0000 //RX_VOL_RESRV_0 -#VOL 3 -6 0x6000 //RX_TDDRC_ALPHA_UP_1 -7 0x6000 //RX_TDDRC_ALPHA_UP_2 -8 0x6000 //RX_TDDRC_ALPHA_UP_3 -9 0x1000 //RX_TDDRC_ALPHA_UP_4 -27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 -28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 -29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 -32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 -33 0x7214 //RX_TDDRC_LIMITER_THRD -34 0x0800 //RX_TDDRC_LIMITER_GAIN -112 0x0002 //RX_TDDRC_THRD_0 -113 0x0004 //RX_TDDRC_THRD_1 -114 0x1C00 //RX_TDDRC_THRD_2 -115 0x1C00 //RX_TDDRC_THRD_3 -116 0x7FFF //RX_TDDRC_SLANT_0 -117 0x7FFF //RX_TDDRC_SLANT_1 -118 0x6000 //RX_TDDRC_ALPHA_UP_0 -119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 -120 0x0000 //RX_TDDRC_HMNC_FLAG -121 0x199A //RX_TDDRC_HMNC_GAIN -122 0x0001 //RX_TDDRC_SMT_FLAG -123 0x0CCD //RX_TDDRC_SMT_W -124 0x06AF //RX_TDDRC_DRC_GAIN -38 0x001C //RX_FDEQ_SUBNUM -39 0x6868 //RX_FDEQ_GAIN_0 -40 0x6858 //RX_FDEQ_GAIN_1 -41 0x5858 //RX_FDEQ_GAIN_2 -42 0x5858 //RX_FDEQ_GAIN_3 -43 0x5C5C //RX_FDEQ_GAIN_4 -44 0x5854 //RX_FDEQ_GAIN_5 -45 0x544C //RX_FDEQ_GAIN_6 -46 0x4C4C //RX_FDEQ_GAIN_7 -47 0x4C60 //RX_FDEQ_GAIN_8 -48 0x6068 //RX_FDEQ_GAIN_9 -49 0x7070 //RX_FDEQ_GAIN_10 -50 0x8070 //RX_FDEQ_GAIN_11 -51 0x6060 //RX_FDEQ_GAIN_12 -52 0x7070 //RX_FDEQ_GAIN_13 -53 0x4848 //RX_FDEQ_GAIN_14 -54 0x4848 //RX_FDEQ_GAIN_15 -55 0x4848 //RX_FDEQ_GAIN_16 -56 0x4848 //RX_FDEQ_GAIN_17 -57 0x4848 //RX_FDEQ_GAIN_18 -58 0x4848 //RX_FDEQ_GAIN_19 -59 0x4848 //RX_FDEQ_GAIN_20 -60 0x4848 //RX_FDEQ_GAIN_21 -61 0x4848 //RX_FDEQ_GAIN_22 -62 0x4848 //RX_FDEQ_GAIN_23 -63 0x0202 //RX_FDEQ_BIN_0 -64 0x0203 //RX_FDEQ_BIN_1 -65 0x0303 //RX_FDEQ_BIN_2 -66 0x0304 //RX_FDEQ_BIN_3 -67 0x0404 //RX_FDEQ_BIN_4 -68 0x0204 //RX_FDEQ_BIN_5 -69 0x0A0A //RX_FDEQ_BIN_6 -70 0x0A0A //RX_FDEQ_BIN_7 -71 0x0B0C //RX_FDEQ_BIN_8 -72 0x0D0E //RX_FDEQ_BIN_9 -73 0x0E0F //RX_FDEQ_BIN_10 -74 0x0F10 //RX_FDEQ_BIN_11 -75 0x1011 //RX_FDEQ_BIN_12 -76 0x1104 //RX_FDEQ_BIN_13 -77 0x0000 //RX_FDEQ_BIN_14 -78 0x0000 //RX_FDEQ_BIN_15 -79 0x0000 //RX_FDEQ_BIN_16 -80 0x0000 //RX_FDEQ_BIN_17 -81 0x0000 //RX_FDEQ_BIN_18 -82 0x0000 //RX_FDEQ_BIN_19 -83 0x0000 //RX_FDEQ_BIN_20 -84 0x0000 //RX_FDEQ_BIN_21 -85 0x0000 //RX_FDEQ_BIN_22 -86 0x0000 //RX_FDEQ_BIN_23 -87 0x4000 //RX_FDEQ_RESRV_0 -88 0x0320 //RX_FDEQ_RESRV_1 -89 0x0018 //RX_FDDRC_BAND_MARGIN_0 -90 0x0035 //RX_FDDRC_BAND_MARGIN_1 -91 0x00D5 //RX_FDDRC_BAND_MARGIN_2 -92 0x0120 //RX_FDDRC_BAND_MARGIN_3 -93 0x0004 //RX_FDDRC_BLOCK_EXP -94 0x5000 //RX_FDDRC_THRD_2_0 -95 0x5000 //RX_FDDRC_THRD_2_1 -96 0x2000 //RX_FDDRC_THRD_2_2 -97 0x5000 //RX_FDDRC_THRD_2_3 -98 0x6400 //RX_FDDRC_THRD_3_0 -99 0x6400 //RX_FDDRC_THRD_3_1 -100 0x2000 //RX_FDDRC_THRD_3_2 -101 0x5000 //RX_FDDRC_THRD_3_3 -102 0x4000 //RX_FDDRC_SLANT_0_0 -103 0x4000 //RX_FDDRC_SLANT_0_1 -104 0x4000 //RX_FDDRC_SLANT_0_2 -105 0x4000 //RX_FDDRC_SLANT_0_3 -106 0x7FFF //RX_FDDRC_SLANT_1_0 -107 0x7FFF //RX_FDDRC_SLANT_1_1 -108 0x7FFF //RX_FDDRC_SLANT_1_2 -109 0x7FFF //RX_FDDRC_SLANT_1_3 -110 0x0000 //RX_FDDRC_RESRV_0 -129 0x0035 //RX_SPK_VOL -130 0x0000 //RX_VOL_RESRV_0 -#VOL 4 -6 0x6000 //RX_TDDRC_ALPHA_UP_1 -7 0x6000 //RX_TDDRC_ALPHA_UP_2 -8 0x6000 //RX_TDDRC_ALPHA_UP_3 -9 0x1000 //RX_TDDRC_ALPHA_UP_4 -27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 -28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 -29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 -32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 -33 0x7214 //RX_TDDRC_LIMITER_THRD -34 0x0800 //RX_TDDRC_LIMITER_GAIN -112 0x0002 //RX_TDDRC_THRD_0 -113 0x0004 //RX_TDDRC_THRD_1 -114 0x1C00 //RX_TDDRC_THRD_2 -115 0x1C00 //RX_TDDRC_THRD_3 -116 0x7FFF //RX_TDDRC_SLANT_0 -117 0x7FFF //RX_TDDRC_SLANT_1 -118 0x6000 //RX_TDDRC_ALPHA_UP_0 -119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 -120 0x0000 //RX_TDDRC_HMNC_FLAG -121 0x199A //RX_TDDRC_HMNC_GAIN -122 0x0001 //RX_TDDRC_SMT_FLAG -123 0x0CCD //RX_TDDRC_SMT_W -124 0x06AF //RX_TDDRC_DRC_GAIN -38 0x001C //RX_FDEQ_SUBNUM -39 0x7878 //RX_FDEQ_GAIN_0 -40 0x786C //RX_FDEQ_GAIN_1 -41 0x6C6C //RX_FDEQ_GAIN_2 -42 0x6262 //RX_FDEQ_GAIN_3 -43 0x5A60 //RX_FDEQ_GAIN_4 -44 0x7A54 //RX_FDEQ_GAIN_5 -45 0x5448 //RX_FDEQ_GAIN_6 -46 0x4848 //RX_FDEQ_GAIN_7 -47 0x4860 //RX_FDEQ_GAIN_8 -48 0x6068 //RX_FDEQ_GAIN_9 -49 0x7070 //RX_FDEQ_GAIN_10 -50 0x8070 //RX_FDEQ_GAIN_11 -51 0x6060 //RX_FDEQ_GAIN_12 -52 0x7070 //RX_FDEQ_GAIN_13 -53 0x4848 //RX_FDEQ_GAIN_14 -54 0x4848 //RX_FDEQ_GAIN_15 -55 0x4848 //RX_FDEQ_GAIN_16 -56 0x4848 //RX_FDEQ_GAIN_17 -57 0x4848 //RX_FDEQ_GAIN_18 -58 0x4848 //RX_FDEQ_GAIN_19 -59 0x4848 //RX_FDEQ_GAIN_20 -60 0x4848 //RX_FDEQ_GAIN_21 -61 0x4848 //RX_FDEQ_GAIN_22 -62 0x4848 //RX_FDEQ_GAIN_23 -63 0x0202 //RX_FDEQ_BIN_0 -64 0x0203 //RX_FDEQ_BIN_1 -65 0x0303 //RX_FDEQ_BIN_2 -66 0x0304 //RX_FDEQ_BIN_3 -67 0x0404 //RX_FDEQ_BIN_4 -68 0x0204 //RX_FDEQ_BIN_5 -69 0x0A0A //RX_FDEQ_BIN_6 -70 0x0A0A //RX_FDEQ_BIN_7 -71 0x0B0C //RX_FDEQ_BIN_8 -72 0x0D0E //RX_FDEQ_BIN_9 -73 0x0E0F //RX_FDEQ_BIN_10 -74 0x0F10 //RX_FDEQ_BIN_11 -75 0x1011 //RX_FDEQ_BIN_12 -76 0x1104 //RX_FDEQ_BIN_13 -77 0x0000 //RX_FDEQ_BIN_14 -78 0x0000 //RX_FDEQ_BIN_15 -79 0x0000 //RX_FDEQ_BIN_16 -80 0x0000 //RX_FDEQ_BIN_17 -81 0x0000 //RX_FDEQ_BIN_18 -82 0x0000 //RX_FDEQ_BIN_19 -83 0x0000 //RX_FDEQ_BIN_20 -84 0x0000 //RX_FDEQ_BIN_21 -85 0x0000 //RX_FDEQ_BIN_22 -86 0x0000 //RX_FDEQ_BIN_23 -87 0x4000 //RX_FDEQ_RESRV_0 -88 0x0320 //RX_FDEQ_RESRV_1 -89 0x0018 //RX_FDDRC_BAND_MARGIN_0 -90 0x0035 //RX_FDDRC_BAND_MARGIN_1 -91 0x00D5 //RX_FDDRC_BAND_MARGIN_2 -92 0x0120 //RX_FDDRC_BAND_MARGIN_3 -93 0x0004 //RX_FDDRC_BLOCK_EXP -94 0x5000 //RX_FDDRC_THRD_2_0 -95 0x5000 //RX_FDDRC_THRD_2_1 -96 0x2000 //RX_FDDRC_THRD_2_2 -97 0x5000 //RX_FDDRC_THRD_2_3 -98 0x6400 //RX_FDDRC_THRD_3_0 -99 0x6400 //RX_FDDRC_THRD_3_1 -100 0x2000 //RX_FDDRC_THRD_3_2 -101 0x5000 //RX_FDDRC_THRD_3_3 -102 0x4000 //RX_FDDRC_SLANT_0_0 -103 0x4000 //RX_FDDRC_SLANT_0_1 -104 0x4000 //RX_FDDRC_SLANT_0_2 -105 0x4000 //RX_FDDRC_SLANT_0_3 -106 0x7FFF //RX_FDDRC_SLANT_1_0 -107 0x7FFF //RX_FDDRC_SLANT_1_1 -108 0x7FFF //RX_FDDRC_SLANT_1_2 -109 0x7FFF //RX_FDDRC_SLANT_1_3 -110 0x0000 //RX_FDDRC_RESRV_0 -129 0x0058 //RX_SPK_VOL -130 0x0000 //RX_VOL_RESRV_0 -#VOL 5 -6 0x6000 //RX_TDDRC_ALPHA_UP_1 -7 0x6000 //RX_TDDRC_ALPHA_UP_2 -8 0x6000 //RX_TDDRC_ALPHA_UP_3 -9 0x1000 //RX_TDDRC_ALPHA_UP_4 -27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 -28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 -29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 -32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 -33 0x7214 //RX_TDDRC_LIMITER_THRD -34 0x0800 //RX_TDDRC_LIMITER_GAIN -112 0x0002 //RX_TDDRC_THRD_0 -113 0x0004 //RX_TDDRC_THRD_1 -114 0x1C00 //RX_TDDRC_THRD_2 -115 0x1C00 //RX_TDDRC_THRD_3 -116 0x7FFF //RX_TDDRC_SLANT_0 -117 0x7FFF //RX_TDDRC_SLANT_1 -118 0x6000 //RX_TDDRC_ALPHA_UP_0 -119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 -120 0x0000 //RX_TDDRC_HMNC_FLAG -121 0x199A //RX_TDDRC_HMNC_GAIN -122 0x0001 //RX_TDDRC_SMT_FLAG -123 0x0CCD //RX_TDDRC_SMT_W -124 0x06AF //RX_TDDRC_DRC_GAIN -38 0x001C //RX_FDEQ_SUBNUM -39 0x7878 //RX_FDEQ_GAIN_0 -40 0x786C //RX_FDEQ_GAIN_1 -41 0x6C6C //RX_FDEQ_GAIN_2 -42 0x6262 //RX_FDEQ_GAIN_3 -43 0x5A60 //RX_FDEQ_GAIN_4 -44 0x7A54 //RX_FDEQ_GAIN_5 -45 0x5448 //RX_FDEQ_GAIN_6 -46 0x4848 //RX_FDEQ_GAIN_7 -47 0x4860 //RX_FDEQ_GAIN_8 -48 0x6068 //RX_FDEQ_GAIN_9 -49 0x7070 //RX_FDEQ_GAIN_10 -50 0x8070 //RX_FDEQ_GAIN_11 -51 0x6060 //RX_FDEQ_GAIN_12 -52 0x7070 //RX_FDEQ_GAIN_13 -53 0x4848 //RX_FDEQ_GAIN_14 -54 0x4848 //RX_FDEQ_GAIN_15 -55 0x4848 //RX_FDEQ_GAIN_16 -56 0x4848 //RX_FDEQ_GAIN_17 -57 0x4848 //RX_FDEQ_GAIN_18 -58 0x4848 //RX_FDEQ_GAIN_19 -59 0x4848 //RX_FDEQ_GAIN_20 -60 0x4848 //RX_FDEQ_GAIN_21 -61 0x4848 //RX_FDEQ_GAIN_22 -62 0x4848 //RX_FDEQ_GAIN_23 -63 0x0202 //RX_FDEQ_BIN_0 -64 0x0203 //RX_FDEQ_BIN_1 -65 0x0303 //RX_FDEQ_BIN_2 -66 0x0304 //RX_FDEQ_BIN_3 -67 0x0404 //RX_FDEQ_BIN_4 -68 0x0204 //RX_FDEQ_BIN_5 -69 0x0A0A //RX_FDEQ_BIN_6 -70 0x0A0A //RX_FDEQ_BIN_7 -71 0x0B0C //RX_FDEQ_BIN_8 -72 0x0D0E //RX_FDEQ_BIN_9 -73 0x0E0F //RX_FDEQ_BIN_10 -74 0x0F10 //RX_FDEQ_BIN_11 -75 0x1011 //RX_FDEQ_BIN_12 -76 0x1104 //RX_FDEQ_BIN_13 -77 0x0000 //RX_FDEQ_BIN_14 -78 0x0000 //RX_FDEQ_BIN_15 -79 0x0000 //RX_FDEQ_BIN_16 -80 0x0000 //RX_FDEQ_BIN_17 -81 0x0000 //RX_FDEQ_BIN_18 -82 0x0000 //RX_FDEQ_BIN_19 -83 0x0000 //RX_FDEQ_BIN_20 -84 0x0000 //RX_FDEQ_BIN_21 -85 0x0000 //RX_FDEQ_BIN_22 -86 0x0000 //RX_FDEQ_BIN_23 -87 0x4000 //RX_FDEQ_RESRV_0 -88 0x0320 //RX_FDEQ_RESRV_1 -89 0x0018 //RX_FDDRC_BAND_MARGIN_0 -90 0x0035 //RX_FDDRC_BAND_MARGIN_1 -91 0x00D5 //RX_FDDRC_BAND_MARGIN_2 -92 0x0120 //RX_FDDRC_BAND_MARGIN_3 -93 0x0004 //RX_FDDRC_BLOCK_EXP -94 0x5000 //RX_FDDRC_THRD_2_0 -95 0x5000 //RX_FDDRC_THRD_2_1 -96 0x2000 //RX_FDDRC_THRD_2_2 -97 0x5000 //RX_FDDRC_THRD_2_3 -98 0x6400 //RX_FDDRC_THRD_3_0 -99 0x6400 //RX_FDDRC_THRD_3_1 -100 0x2000 //RX_FDDRC_THRD_3_2 -101 0x5000 //RX_FDDRC_THRD_3_3 -102 0x4000 //RX_FDDRC_SLANT_0_0 -103 0x4000 //RX_FDDRC_SLANT_0_1 -104 0x4000 //RX_FDDRC_SLANT_0_2 -105 0x4000 //RX_FDDRC_SLANT_0_3 -106 0x7FFF //RX_FDDRC_SLANT_1_0 -107 0x7FFF //RX_FDDRC_SLANT_1_1 -108 0x7FFF //RX_FDDRC_SLANT_1_2 -109 0x7FFF //RX_FDDRC_SLANT_1_3 -110 0x0000 //RX_FDDRC_RESRV_0 -129 0x0085 //RX_SPK_VOL -130 0x0000 //RX_VOL_RESRV_0 -#VOL 6 -6 0x6000 //RX_TDDRC_ALPHA_UP_1 -7 0x6000 //RX_TDDRC_ALPHA_UP_2 -8 0x6000 //RX_TDDRC_ALPHA_UP_3 -9 0x1000 //RX_TDDRC_ALPHA_UP_4 -27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 -28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 -29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 -32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 -33 0x7214 //RX_TDDRC_LIMITER_THRD -34 0x0800 //RX_TDDRC_LIMITER_GAIN -112 0x0002 //RX_TDDRC_THRD_0 -113 0x0004 //RX_TDDRC_THRD_1 -114 0x1C00 //RX_TDDRC_THRD_2 -115 0x1C00 //RX_TDDRC_THRD_3 -116 0x7FFF //RX_TDDRC_SLANT_0 -117 0x7FFF //RX_TDDRC_SLANT_1 -118 0x6000 //RX_TDDRC_ALPHA_UP_0 -119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 -120 0x0000 //RX_TDDRC_HMNC_FLAG -121 0x199A //RX_TDDRC_HMNC_GAIN -122 0x0001 //RX_TDDRC_SMT_FLAG -123 0x0CCD //RX_TDDRC_SMT_W -124 0x06AF //RX_TDDRC_DRC_GAIN -38 0x001C //RX_FDEQ_SUBNUM -39 0x7878 //RX_FDEQ_GAIN_0 -40 0x786C //RX_FDEQ_GAIN_1 -41 0x6C6C //RX_FDEQ_GAIN_2 -42 0x6262 //RX_FDEQ_GAIN_3 -43 0x5A60 //RX_FDEQ_GAIN_4 -44 0x7A54 //RX_FDEQ_GAIN_5 -45 0x5448 //RX_FDEQ_GAIN_6 -46 0x4848 //RX_FDEQ_GAIN_7 -47 0x4860 //RX_FDEQ_GAIN_8 -48 0x6068 //RX_FDEQ_GAIN_9 -49 0x7070 //RX_FDEQ_GAIN_10 -50 0x8070 //RX_FDEQ_GAIN_11 -51 0x6060 //RX_FDEQ_GAIN_12 -52 0x7070 //RX_FDEQ_GAIN_13 -53 0x4848 //RX_FDEQ_GAIN_14 -54 0x4848 //RX_FDEQ_GAIN_15 -55 0x4848 //RX_FDEQ_GAIN_16 -56 0x4848 //RX_FDEQ_GAIN_17 -57 0x4848 //RX_FDEQ_GAIN_18 -58 0x4848 //RX_FDEQ_GAIN_19 -59 0x4848 //RX_FDEQ_GAIN_20 -60 0x4848 //RX_FDEQ_GAIN_21 -61 0x4848 //RX_FDEQ_GAIN_22 -62 0x4848 //RX_FDEQ_GAIN_23 -63 0x0202 //RX_FDEQ_BIN_0 -64 0x0203 //RX_FDEQ_BIN_1 -65 0x0303 //RX_FDEQ_BIN_2 -66 0x0304 //RX_FDEQ_BIN_3 -67 0x0404 //RX_FDEQ_BIN_4 -68 0x0204 //RX_FDEQ_BIN_5 -69 0x0A0A //RX_FDEQ_BIN_6 -70 0x0A0A //RX_FDEQ_BIN_7 -71 0x0B0C //RX_FDEQ_BIN_8 -72 0x0D0E //RX_FDEQ_BIN_9 -73 0x0E0F //RX_FDEQ_BIN_10 -74 0x0F10 //RX_FDEQ_BIN_11 -75 0x1011 //RX_FDEQ_BIN_12 -76 0x1104 //RX_FDEQ_BIN_13 -77 0x0000 //RX_FDEQ_BIN_14 -78 0x0000 //RX_FDEQ_BIN_15 -79 0x0000 //RX_FDEQ_BIN_16 -80 0x0000 //RX_FDEQ_BIN_17 -81 0x0000 //RX_FDEQ_BIN_18 -82 0x0000 //RX_FDEQ_BIN_19 -83 0x0000 //RX_FDEQ_BIN_20 -84 0x0000 //RX_FDEQ_BIN_21 -85 0x0000 //RX_FDEQ_BIN_22 -86 0x0000 //RX_FDEQ_BIN_23 -87 0x4000 //RX_FDEQ_RESRV_0 -88 0x0320 //RX_FDEQ_RESRV_1 -89 0x0018 //RX_FDDRC_BAND_MARGIN_0 -90 0x0035 //RX_FDDRC_BAND_MARGIN_1 -91 0x00D5 //RX_FDDRC_BAND_MARGIN_2 -92 0x0120 //RX_FDDRC_BAND_MARGIN_3 -93 0x0004 //RX_FDDRC_BLOCK_EXP -94 0x5000 //RX_FDDRC_THRD_2_0 -95 0x5000 //RX_FDDRC_THRD_2_1 -96 0x2000 //RX_FDDRC_THRD_2_2 -97 0x5000 //RX_FDDRC_THRD_2_3 -98 0x6400 //RX_FDDRC_THRD_3_0 -99 0x6400 //RX_FDDRC_THRD_3_1 -100 0x2000 //RX_FDDRC_THRD_3_2 -101 0x5000 //RX_FDDRC_THRD_3_3 -102 0x4000 //RX_FDDRC_SLANT_0_0 -103 0x4000 //RX_FDDRC_SLANT_0_1 -104 0x4000 //RX_FDDRC_SLANT_0_2 -105 0x4000 //RX_FDDRC_SLANT_0_3 -106 0x7FFF //RX_FDDRC_SLANT_1_0 -107 0x7FFF //RX_FDDRC_SLANT_1_1 -108 0x7FFF //RX_FDDRC_SLANT_1_2 -109 0x7FFF //RX_FDDRC_SLANT_1_3 -110 0x0000 //RX_FDDRC_RESRV_0 -129 0x0100 //RX_SPK_VOL -130 0x0000 //RX_VOL_RESRV_0 - -#CASE_NAME HANDSFREE-HANDSFREE-VOICE_GENERIC-SWB -#PARAM_TYPE TX+RX -#TOTAL_CUSTOM_STEP 7 -#TX -0 0x0001 //TX_OPERATION_MODE_0 -1 0x0001 //TX_OPERATION_MODE_1 -2 0x0033 //TX_PATCH_REG -3 0x2F7C //TX_SENDFUNC_MODE_0 -4 0x0001 //TX_SENDFUNC_MODE_1 -5 0x0003 //TX_NUM_MIC -6 0x0003 //TX_SAMPLINGFREQ_SIG -7 0x0003 //TX_SAMPLINGFREQ_PROC -8 0x000A //TX_FRAME_SZ_SIG -9 0x000A //TX_FRAME_SZ -10 0x0000 //TX_DELAY_OPT -11 0x0028 //TX_MAX_TAIL_LENGTH -12 0x0001 //TX_NUM_LOUTCHN -13 0x0001 //TX_MAXNUM_AECREF -14 0x0000 //TX_DBG_FUNC_REG -15 0x0000 //TX_DBG_FUNC_REG1 -16 0x0000 //TX_SYS_RESRV_0 -17 0x0000 //TX_SYS_RESRV_1 -18 0x0000 //TX_SYS_RESRV_2 -19 0x0000 //TX_SYS_RESRV_3 -20 0x0000 //TX_DIST2REF0 -21 0x00A3 //TX_DIST2REF1 -22 0x001B //TX_DIST2REF_02 -23 0x0000 //TX_DIST2REF_03 -24 0x0000 //TX_DIST2REF_04 -25 0x0000 //TX_DIST2REF_05 -26 0x0000 //TX_MMIC -27 0x1000 //TX_PGA_0 -28 0x1000 //TX_PGA_1 -29 0x1000 //TX_PGA_2 -30 0x0000 //TX_PGA_3 -31 0x0000 //TX_PGA_4 -32 0x0000 //TX_PGA_5 -33 0x0001 //TX_MIC_PAIRS -34 0x0000 //TX_MIC_PAIRS_HS -35 0x0002 //TX_MICS_FOR_BF -36 0x0000 //TX_MIC_PAIRS_FORL1 -37 0x0002 //TX_MICS_OF_PAIR0 -38 0x0002 //TX_MICS_OF_PAIR1 -39 0x0002 //TX_MICS_OF_PAIR2 -40 0x0002 //TX_MICS_OF_PAIR3 -41 0x0000 //TX_MIC_DATA_SRC0 -42 0x0002 //TX_MIC_DATA_SRC1 -43 0x0001 //TX_MIC_DATA_SRC2 -44 0x0000 //TX_MIC_DATA_SRC3 -45 0x0000 //TX_MIC_PAIR_CH_04 -46 0x0000 //TX_MIC_PAIR_CH_05 -47 0x0000 //TX_MIC_PAIR_CH_10 -48 0x0000 //TX_MIC_PAIR_CH_11 -49 0x0000 //TX_MIC_PAIR_CH_12 -50 0x0000 //TX_MIC_PAIR_CH_13 -51 0x0000 //TX_MIC_PAIR_CH_14 -52 0x05DC //TX_HD_BIN_MASK -53 0x0010 //TX_HD_SUBAND_MASK -54 0x19A1 //TX_HD_FRAME_AVG_MASK -55 0x0320 //TX_HD_MIN_FRQ -56 0x1000 //TX_HD_ALPHA_PSD -57 0x1100 //TX_T_PHPR1 -58 0x0000 //TX_T_PHPR2 -59 0x0000 //TX_T_PTPR -60 0x0000 //TX_T_PNPR -61 0x0000 //TX_T_PAPR1 -62 0xEE6C //TX_T_PSDVAT -63 0x0800 //TX_CNT -64 0x4000 //TX_ANTI_HOWL_GAIN -65 0x0001 //TX_MICFORBFMARK_0 -66 0x0001 //TX_MICFORBFMARK_1 -67 0x0001 //TX_MICFORBFMARK_2 -68 0x0001 //TX_MICFORBFMARK_3 -69 0x0001 //TX_MICFORBFMARK_4 -70 0x0001 //TX_MICFORBFMARK_5 -71 0x0000 //TX_DIST2REF_10 -72 0x3B33 //TX_DIST2REF_11 -73 0x0A70 //TX_DIST2REF2 -74 0x0000 //TX_DIST2REF_13 -75 0x0000 //TX_DIST2REF_14 -76 0x0000 //TX_DIST2REF_15 -77 0x0000 //TX_DIST2REF_20 -78 0x0000 //TX_DIST2REF_21 -79 0x0000 //TX_DIST2REF_22 -80 0x0000 //TX_DIST2REF_23 -81 0x0000 //TX_DIST2REF_24 -82 0x0000 //TX_DIST2REF_25 -83 0x0000 //TX_DIST2REF_30 -84 0x0000 //TX_DIST2REF_31 -85 0x0000 //TX_DIST2REF_32 -86 0x0000 //TX_DIST2REF_33 -87 0x0000 //TX_DIST2REF_34 -88 0x0000 //TX_DIST2REF_35 -89 0x0000 //TX_MIC_LOC_00 -90 0x0000 //TX_MIC_LOC_01 -91 0x0000 //TX_MIC_LOC_02 -92 0x0000 //TX_MIC_LOC_03 -93 0x0000 //TX_MIC_LOC_04 -94 0x0000 //TX_MIC_LOC_05 -95 0x0000 //TX_MIC_LOC_10 -96 0x0000 //TX_MIC_LOC_11 -97 0x0000 //TX_MIC_LOC_12 -98 0x0000 //TX_MIC_LOC_13 -99 0x0000 //TX_MIC_LOC_14 -100 0x0000 //TX_MIC_LOC_15 -101 0x0000 //TX_MIC_LOC_20 -102 0x0000 //TX_MIC_LOC_21 -103 0x0000 //TX_MIC_LOC_22 -104 0x0000 //TX_MIC_LOC_23 -105 0x0000 //TX_MIC_LOC_24 -106 0x0000 //TX_MIC_LOC_25 -107 0x0800 //TX_MIC_REFBLK_VOLUME -108 0x0CAE //TX_MIC_BLOCK_VOLUME -109 0x0000 //TX_INVERSE_MASK -110 0x0000 //TX_ADCS_MASK -111 0x04D0 //TX_ADCS_GAIN -112 0x4000 //TX_NFC_GAINFAC -113 0x0000 //TX_MAINMIC_BLKFACTOR -114 0x0000 //TX_REFMIC_BLKFACTOR -115 0x0000 //TX_BLMIC_BLKFACTOR -116 0x0000 //TX_BRMIC_BLKFACTOR -117 0x0031 //TX_MICBLK_START_BIN -118 0x0060 //TX_MICBLK_END_BIN -119 0x0015 //TX_MICBLK_FE_HOLD -120 0xFFF2 //TX_MICBLK_MR_EXP_TH -121 0xFFF2 //TX_MICBLK_LR_EXP_TH -122 0x0015 //TX_FENE_HOLD -123 0x4000 //TX_FE_ENER_TH_MTS -124 0x0004 //TX_FE_ENER_TH_EXP -125 0x6000 //TX_C_POST_FLT_MIC_MAINBLK -126 0x6000 //TX_C_POST_FLT_MIC_REFBLK -127 0x0010 //TX_MIC_BLOCK_N -128 0x7B02 //TX_A_HP -129 0x4000 //TX_B_PE -130 0x5000 //TX_THR_PITCH_DET_0 -131 0x4800 //TX_THR_PITCH_DET_1 -132 0x4000 //TX_THR_PITCH_DET_2 -133 0x0008 //TX_PITCH_BFR_LEN -134 0x0003 //TX_SBD_PITCH_DET -135 0x0050 //TX_TD_AEC_L -136 0x4000 //TX_MU0_UNP_TD_AEC -137 0x1000 //TX_MU0_PTD_TD_AEC -138 0x0000 //TX_PP_RESRV_0 -139 0x2A94 //TX_PP_RESRV_1 -140 0x55F0 //TX_PP_RESRV_2 -141 0x0000 //TX_PP_RESRV_3 -142 0x0000 //TX_PP_RESRV_4 -143 0x0000 //TX_PP_RESRV_5 -144 0x0000 //TX_PP_RESRV_6 -145 0x0000 //TX_PP_RESRV_7 -146 0x0028 //TX_TAIL_LENGTH -147 0x0400 //TX_AEC_REF_GAIN_0 -148 0x0800 //TX_AEC_REF_GAIN_1 -149 0x0800 //TX_AEC_REF_GAIN_2 -150 0x7600 //TX_EAD_THR -151 0x1000 //TX_THR_RE_EST -152 0x2000 //TX_MIN_EQ_RE_EST_0 -153 0x0600 //TX_MIN_EQ_RE_EST_1 -154 0x3000 //TX_MIN_EQ_RE_EST_2 -155 0x3000 //TX_MIN_EQ_RE_EST_3 -156 0x3000 //TX_MIN_EQ_RE_EST_4 -157 0x3000 //TX_MIN_EQ_RE_EST_5 -158 0x3000 //TX_MIN_EQ_RE_EST_6 -159 0x1000 //TX_MIN_EQ_RE_EST_7 -160 0x7800 //TX_MIN_EQ_RE_EST_8 -161 0x7800 //TX_MIN_EQ_RE_EST_9 -162 0x7800 //TX_MIN_EQ_RE_EST_10 -163 0x7800 //TX_MIN_EQ_RE_EST_11 -164 0x7800 //TX_MIN_EQ_RE_EST_12 -165 0x4000 //TX_LAMBDA_RE_EST -166 0x3000 //TX_LAMBDA_CB_NLE -167 0x7FFF //TX_C_POST_FLT -168 0x4000 //TX_GAIN_NP -169 0x0180 //TX_SE_HOLD_N -170 0x00C8 //TX_DT_HOLD_N -171 0x05DC //TX_DT2_HOLD_N -172 0x6666 //TX_AEC_RESRV_0 -173 0x0000 //TX_AEC_RESRV_1 -174 0x0014 //TX_AEC_RESRV_2 -175 0x0000 //TX_MIC_DELAY_LENGTH -176 0x0000 //TX_REF_DELAY_LENGTH -177 0x0000 //TX_ADD_LINEIN_GAINL -178 0x0000 //TX_ADD_LINEIN_GAINH -179 0x0000 //TX_MIN_EQ_RE_EST_14 -180 0x0000 //TX_DTD_THR1_8 -181 0x7FFF //TX_DTD_THR2_8 -182 0x0000 //TX_DTD_MIC_BLK2 -183 0x0008 //TX_FRQ_LIN_LEN -184 0x7FFF //TX_FRQ_AEC_LEN_RHO -185 0x6000 //TX_MU0_UNP_FRQ_AEC -186 0x4000 //TX_MU0_PTD_FRQ_AEC -187 0x000A //TX_MINENOISETH -188 0x0800 //TX_MU0_RE_EST -189 0x0001 //TX_AEC_NUM_CH -190 0x0000 //TX_BIGECHOATTENUATION_MAX -191 0x2000 //TX_A_POST_FLT_MICBLK -192 0x0000 //TX_BLKENERTH -193 0x0000 //TX_BLKENERHIGHTH -194 0x0000 //TX_NORMENERTH -195 0x0000 //TX_NORMENERHIGHTH -196 0x0000 //TX_NORMENERHIGHTHL -197 0x7FF0 //TX_DTD_THR1_0 -198 0x7FF0 //TX_DTD_THR1_1 -199 0x7FF0 //TX_DTD_THR1_2 -200 0x7FF0 //TX_DTD_THR1_3 -201 0x7FF0 //TX_DTD_THR1_4 -202 0x7FF0 //TX_DTD_THR1_5 -203 0x7FF0 //TX_DTD_THR1_6 -204 0x7E00 //TX_DTD_THR2_0 -205 0x7E00 //TX_DTD_THR2_1 -206 0x5000 //TX_DTD_THR2_2 -207 0x5000 //TX_DTD_THR2_3 -208 0x5000 //TX_DTD_THR2_4 -209 0x5000 //TX_DTD_THR2_5 -210 0x5000 //TX_DTD_THR2_6 -211 0x7FFF //TX_DTD_THR3 -212 0x0000 //TX_SPK_CUT_K -213 0x36B0 //TX_DT_CUT_K -214 0x0100 //TX_DT_CUT_THR -215 0x04EB //TX_COMFORT_G -216 0x01F4 //TX_POWER_YOUT_TH -217 0x4000 //TX_FDPFGAINECHO -218 0x0000 //TX_DTD_HD_THR -219 0x0000 //TX_SPK_CUT_K_S -220 0x7FFF //TX_DTD_MIC_BLK -221 0x023E //TX_ADPT_STRICT_L -222 0x023E //TX_ADPT_STRICT_H -223 0x0BB8 //TX_RATIO_DT_L_TH_LOW -224 0x3A98 //TX_RATIO_DT_H_TH_LOW -225 0x1F40 //TX_RATIO_DT_L_TH_HIGH -226 0x6590 //TX_RATIO_DT_H_TH_HIGH -227 0x09C4 //TX_RATIO_DT_L0_TH -228 0x2000 //TX_B_POST_FILT_ECHO_L -229 0x1000 //TX_B_POST_FILT_ECHO_H -230 0x0200 //TX_MIN_G_CTRL_ECHO -231 0x1000 //TX_B_LESSCUT_RTO_ECHO -232 0x0000 //TX_EPD_OFFSET_00 -233 0x0000 //TX_EPD_OFFST_01 -234 0x2328 //TX_RATIO_DT_L0_TH_HIGH -235 0x7FFF //TX_RATIO_DT_H_TH_CUT -236 0x7FFF //TX_MIN_EQ_RE_EST_13 -237 0x0000 //TX_DTD_THR1_7 -238 0x0000 //TX_DTD_THR2_7 -239 0x0800 //TX_DT_RESRV_7 -240 0x0800 //TX_DT_RESRV_8 -241 0x0000 //TX_DT_RESRV_9 -242 0xF800 //TX_THR_SN_EST_0 -243 0xFA00 //TX_THR_SN_EST_1 -244 0xFA00 //TX_THR_SN_EST_2 -245 0xFA00 //TX_THR_SN_EST_3 -246 0xF800 //TX_THR_SN_EST_4 -247 0xFA00 //TX_THR_SN_EST_5 -248 0xF800 //TX_THR_SN_EST_6 -249 0xF800 //TX_THR_SN_EST_7 -250 0x0100 //TX_DELTA_THR_SN_EST_0 -251 0x0100 //TX_DELTA_THR_SN_EST_1 -252 0x0100 //TX_DELTA_THR_SN_EST_2 -253 0x0100 //TX_DELTA_THR_SN_EST_3 -254 0x0000 //TX_DELTA_THR_SN_EST_4 -255 0x0100 //TX_DELTA_THR_SN_EST_5 -256 0x0200 //TX_DELTA_THR_SN_EST_6 -257 0x0200 //TX_DELTA_THR_SN_EST_7 -258 0x4000 //TX_LAMBDA_NN_EST_0 -259 0x4000 //TX_LAMBDA_NN_EST_1 -260 0x4000 //TX_LAMBDA_NN_EST_2 -261 0x4000 //TX_LAMBDA_NN_EST_3 -262 0x4000 //TX_LAMBDA_NN_EST_4 -263 0x4000 //TX_LAMBDA_NN_EST_5 -264 0x4000 //TX_LAMBDA_NN_EST_6 -265 0x4000 //TX_LAMBDA_NN_EST_7 -266 0x0400 //TX_N_SN_EST -267 0x001E //TX_INBEAM_T -268 0x0041 //TX_INBEAMHOLDT -269 0x2000 //TX_G_STRICT -270 0x2000 //TX_EQ_THR_BF -271 0x799A //TX_LAMBDA_EQ_BF -272 0x1000 //TX_NE_RTO_TH -273 0x0400 //TX_NE_RTO_TH_L -274 0x0800 //TX_MAINREFRTOH_TH_H -275 0x0800 //TX_MAINREFRTOH_TH_L -276 0x0800 //TX_MAINREFRTO_TH_H -277 0x0800 //TX_MAINREFRTO_TH_L -278 0x0200 //TX_MAINREFRTO_TH_EQ -279 0x2000 //TX_B_POST_FLT_0 -280 0x1000 //TX_B_POST_FLT_1 -281 0x0010 //TX_NS_LVL_CTRL_0 -282 0x003C //TX_NS_LVL_CTRL_1 -283 0x003C //TX_NS_LVL_CTRL_2 -284 0x0024 //TX_NS_LVL_CTRL_3 -285 0x003C //TX_NS_LVL_CTRL_4 -286 0x0014 //TX_NS_LVL_CTRL_5 -287 0x0011 //TX_NS_LVL_CTRL_6 -288 0x0011 //TX_NS_LVL_CTRL_7 -289 0x000F //TX_MIN_GAIN_S_0 -290 0x0010 //TX_MIN_GAIN_S_1 -291 0x0010 //TX_MIN_GAIN_S_2 -292 0x0010 //TX_MIN_GAIN_S_3 -293 0x0010 //TX_MIN_GAIN_S_4 -294 0x0010 //TX_MIN_GAIN_S_5 -295 0x0010 //TX_MIN_GAIN_S_6 -296 0x000F //TX_MIN_GAIN_S_7 -297 0x6000 //TX_NMOS_SUP -298 0x0000 //TX_NS_MAX_PRI_SNR_TH -299 0x0000 //TX_NMOS_SUP_MENSA -300 0x7FFF //TX_SNRI_SUP_0 -301 0x1400 //TX_SNRI_SUP_1 -302 0x1400 //TX_SNRI_SUP_2 -303 0x1400 //TX_SNRI_SUP_3 -304 0x4000 //TX_SNRI_SUP_4 -305 0x4000 //TX_SNRI_SUP_5 -306 0x50C0 //TX_SNRI_SUP_6 -307 0x7FFF //TX_SNRI_SUP_7 -308 0x7FFF //TX_THR_LFNS -309 0x0018 //TX_G_LFNS -310 0x09C4 //TX_GAIN0_NTH -311 0x000A //TX_MUSIC_MORENS -312 0x7FFF //TX_A_POST_FILT_0 -313 0x2000 //TX_A_POST_FILT_1 -314 0x5000 //TX_A_POST_FILT_S_0 -315 0x7C00 //TX_A_POST_FILT_S_1 -316 0x4C00 //TX_A_POST_FILT_S_2 -317 0x4000 //TX_A_POST_FILT_S_3 -318 0x6000 //TX_A_POST_FILT_S_4 -319 0x4000 //TX_A_POST_FILT_S_5 -320 0x5000 //TX_A_POST_FILT_S_6 -321 0x7000 //TX_A_POST_FILT_S_7 -322 0x2000 //TX_B_POST_FILT_0 -323 0x1000 //TX_B_POST_FILT_1 -324 0x6000 //TX_B_POST_FILT_2 -325 0x6000 //TX_B_POST_FILT_3 -326 0x6000 //TX_B_POST_FILT_4 -327 0x4000 //TX_B_POST_FILT_5 -328 0x1000 //TX_B_POST_FILT_6 -329 0x2000 //TX_B_POST_FILT_7 -330 0x4000 //TX_B_LESSCUT_RTO_S_0 -331 0x7FFF //TX_B_LESSCUT_RTO_S_1 -332 0x7FFF //TX_B_LESSCUT_RTO_S_2 -333 0x7FFF //TX_B_LESSCUT_RTO_S_3 -334 0x7FFF //TX_B_LESSCUT_RTO_S_4 -335 0x7FFF //TX_B_LESSCUT_RTO_S_5 -336 0x6000 //TX_B_LESSCUT_RTO_S_6 -337 0x7FFF //TX_B_LESSCUT_RTO_S_7 -338 0x7C00 //TX_LAMBDA_PFILT -339 0x7D00 //TX_LAMBDA_PFILT_S_0 -340 0x7D00 //TX_LAMBDA_PFILT_S_1 -341 0x7D00 //TX_LAMBDA_PFILT_S_2 -342 0x7D00 //TX_LAMBDA_PFILT_S_3 -343 0x7D00 //TX_LAMBDA_PFILT_S_4 -344 0x7D00 //TX_LAMBDA_PFILT_S_5 -345 0x7D00 //TX_LAMBDA_PFILT_S_6 -346 0x7D00 //TX_LAMBDA_PFILT_S_7 -347 0x0200 //TX_K_PEPPER -348 0x0400 //TX_A_PEPPER -349 0x1EAA //TX_K_PEPPER_HF -350 0x0600 //TX_A_PEPPER_HF -351 0x0001 //TX_HMNC_BST_FLG -352 0x0200 //TX_HMNC_BST_THR -353 0x0040 //TX_DT_BINVAD_TH_0 -354 0x0040 //TX_DT_BINVAD_TH_1 -355 0x0100 //TX_DT_BINVAD_TH_2 -356 0x0100 //TX_DT_BINVAD_TH_3 -357 0x36B0 //TX_DT_BINVAD_ENDF -358 0x0200 //TX_C_POST_FLT_DT -359 0x0CCD //TX_NS_B_POST_FLT_LESSCUT -360 0x0140 //TX_DT_BOOST -361 0x0000 //TX_BF_SGRAD_FLG -362 0x0005 //TX_BF_DVG_TH -363 0x001E //TX_SN_C_F -364 0x0000 //TX_K_APT -365 0x0001 //TX_NOISEDET -366 0x0064 //TX_NDETCT -367 0x0050 //TX_NOISE_TH_0 -368 0x7FFF //TX_NOISE_TH_0_2 -369 0x7FFF //TX_NOISE_TH_0_3 -370 0x07D0 //TX_NOISE_TH_1 -371 0x01F4 //TX_NOISE_TH_2 -372 0x36B0 //TX_NOISE_TH_3 -373 0x2710 //TX_NOISE_TH_4 -374 0x2CEC //TX_NOISE_TH_5 -375 0x7FFF //TX_NOISE_TH_5_2 -376 0x0000 //TX_NOISE_TH_5_3 -377 0x7FFF //TX_NOISE_TH_5_4 -378 0x0DAC //TX_NOISE_TH_6 -379 0x0050 //TX_MINENOISE_TH -380 0x4000 //TX_MINENOISE_MIC0_TH_MTS -381 0xFFEE //TX_MINENOISE_MIC0_TH_EXP -382 0x6000 //TX_MINENOISE_MIC0_S_TH_MTS -383 0xFFF3 //TX_MINENOISE_MIC0_S_TH_EXP -384 0x0666 //TX_OUT_ENER_S_TH_CLEAN -385 0x0666 //TX_OUT_ENER_S_TH_LESSCLEAN -386 0x0333 //TX_OUT_ENER_S_TH_NOISY -387 0x019A //TX_OUT_ENER_TH_NOISE -388 0x0333 //TX_OUT_ENER_TH_SPEECH -389 0x2000 //TX_SN_NPB_GAIN -390 0x0000 //TX_NN_NPB_GAIN -391 0x0000 //TX_CSX_ALPHA_0 -392 0x0000 //TX_CSX_ALPHA_1 -393 0x0000 //TX_CSX_ALPHA_2 -394 0x0000 //TX_CSX_ALPHA_3 -395 0x0800 //TX_MU_ARSP_EST -396 0x00C8 //TX_P_OUTBEAM_MIN_TH -397 0x0002 //TX_EXTRA_NS_L -398 0x0800 //TX_EXTRA_NS_A -399 0x0005 //TX_VR_NOISE_FLOOR_TH -400 0x0148 //TX_MIN_G_LOW300HZ -401 0x0001 //TX_MAXLEVEL_CNG -402 0x00B4 //TX_STN_NOISE_TH -403 0x4000 //TX_POST_MASK_SUP -404 0x7FFF //TX_POST_MASK_ADJUST -405 0x00C8 //TX_NS_ENOISE_MIC0_TH -406 0x0050 //TX_MINENOISE_MIC0_TH -407 0x012C //TX_MINENOISE_MIC0_S_TH -408 0x4000 //TX_MIN_G_CTRL_SSNS -409 0x0000 //TX_METAL_RTO_THR -410 0x4848 //TX_NS_FP_K_METAL -411 0x3A98 //TX_NOISEDET_BOOST_TH -412 0x0FA0 //TX_NSMOOTH_TH -413 0x0000 //TX_NS_RESRV_8 -414 0x1800 //TX_RHO_UPB -415 0x0BB8 //TX_N_HOLD_HS -416 0x0050 //TX_N_RHO_BFR0 -417 0x7FFF //TX_LAMBDA_ARSP_EST -418 0x0100 //TX_EXTRA_GAIN_MICBLOCK -419 0x0CCD //TX_THR_STD_NSR -420 0x019A //TX_THR_STD_PLH -421 0x2AF8 //TX_N_HOLD_STD -422 0x0066 //TX_THR_STD_RHO -423 0x2000 //TX_BF_RESET_THR_HS -424 0x09C4 //TX_SB_RTO_MEAN_TH -425 0x0000 //TX_SB_RHO_MEAN_TH_NTALK -426 0x3800 //TX_SB_RTO_MEAN_TH_ABN -427 0x2EE0 //TX_SB_RTO_MEAN_TH_RUB -428 0x0000 //TX_WTA_EN_RTO_TH -429 0x0000 //TX_TOP_ENER_TH_F -430 0x0000 //TX_DESIRED_TALK_HOLDT -431 0x0800 //TX_MIC_BLOCK_FACTOR -432 0x0000 //TX_NSEST_BFRLRNRDC -433 0x0000 //TX_THR_POST_FLT_HS -434 0x0010 //TX_HS_VAD_BIN -435 0x2666 //TX_THR_VAD_HS -436 0x2CCD //TX_MEAN_RTO_MIN_TH2 -437 0x0032 //TX_SILENCE_T -438 0x0000 //TX_A_POST_FLT_WTA -439 0x799A //TX_LAMBDA_PFLT_WTA -440 0x0000 //TX_SB_RHO_MEAN2_TH -441 0x0190 //TX_SB_RHO_MEAN3_TH -442 0x0000 //TX_HS_RESRV_4 -443 0x0000 //TX_HS_RESRV_5 -444 0x003C //TX_DOA_VAD_THR_1 -445 0x0000 //TX_DOA_VAD_THR_2 -446 0x0028 //TX_DOA_VAD_THR1_0 -447 0x0028 //TX_DOA_VAD_THR1_1 -448 0x0000 //TX_SRC_DOA_RNG_LOW_0A -449 0x00B4 //TX_SRC_DOA_RNG_HIGH_0A -450 0x005A //TX_DFLT_SRC_DOA_0A -451 0x0000 //TX_SRC_DOA_RNG_LOW_0B -452 0x0000 //TX_SRC_DOA_RNG_HIGH_0B -453 0x0000 //TX_DFLT_SRC_DOA_0B -454 0x0000 //TX_SRC_DOA_RNG_LOW_0C -455 0x0000 //TX_SRC_DOA_RNG_HIGH_0C -456 0x0000 //TX_DFLT_SRC_DOA_0C -457 0x0000 //TX_SRC_DOA_RNG_LOW_0D -458 0x0000 //TX_SRC_DOA_RNG_HIGH_0D -459 0x0000 //TX_DFLT_SRC_DOA_0D -460 0x0000 //TX_SRC_DOA_RNG_LOW_1A -461 0x00B4 //TX_SRC_DOA_RNG_HIGH_1A -462 0x005A //TX_DFLT_SRC_DOA_1A -463 0x0000 //TX_SRC_DOA_RNG_LOW_1B -464 0x00B4 //TX_SRC_DOA_RNG_HIGH_1B -465 0x005A //TX_DFLT_SRC_DOA_1B -466 0x0000 //TX_SRC_DOA_RNG_LOW_1C -467 0x00B4 //TX_SRC_DOA_RNG_HIGH_1C -468 0x005A //TX_DFLT_SRC_DOA_1C -469 0x0000 //TX_SRC_DOA_RNG_LOW_1D -470 0x00B4 //TX_SRC_DOA_RNG_HIGH_1D -471 0x005A //TX_DFLT_SRC_DOA_1D -472 0x0100 //TX_BF_HOLDOFF_T -473 0x7FFF //TX_DOA_COST_FACTOR -474 0x4000 //TX_MAINTOREFR_TH0 -475 0x071C //TX_DOA_TRK_THR -476 0x012C //TX_DOA_TRACK_HT -477 0x0200 //TX_N1_HOLD_HF -478 0x0100 //TX_N2_HOLD_HF -479 0x3000 //TX_BF_RESET_THR_HF -480 0x7333 //TX_DOA_SMOOTH -481 0x0800 //TX_MU_BF -482 0x0800 //TX_BF_MU_LF_B2 -483 0x0040 //TX_BF_FC_END_BIN_B2 -484 0x0020 //TX_BF_FC_END_BIN -485 0x0000 //TX_HF_RESRV_25 -486 0x0000 //TX_HF_RESRV_26 -487 0x0007 //TX_N_DOA_SEED -488 0x0001 //TX_FINE_DOA_SEARCH_FLG -489 0x0000 //TX_HF_RESRV_27 -490 0x038E //TX_DLT_SRC_DOA_RNG -491 0x0200 //TX_BF_MU_LF -492 0x0000 //TX_DFLT_SRC_LOC_0 -493 0x7FFF //TX_DFLT_SRC_LOC_1 -494 0x0000 //TX_DFLT_SRC_LOC_2 -495 0x038E //TX_DOA_TRACK_VADTH -496 0x0000 //TX_DOA_TRACK_NEW -497 0x0230 //TX_NOR_OFF_THR -498 0x0CCD //TX_MORE_ON_700HZ_THR -499 0x0000 //TX_MU_BF_ADPT_NS -500 0x0000 //TX_ADAPT_LEN -501 0x2000 //TX_MORE_SNS -502 0x0000 //TX_NOR_OFF_TH1 -503 0x0000 //TX_WIDE_MASK_TH -504 0x4650 //TX_SUBSNRATIOHIGH4MEANBCK_THR -505 0x4000 //TX_C_POST_FLT_CUT -506 0x2000 //TX_RADIODTLV -507 0x0320 //TX_POWER_LINEIN_TH -508 0x0014 //TX_FE_VADCOUNT_TH_FC -509 0x0000 //TX_ECHO_SUPP_FC -510 0x0C80 //TX_ECHO_TH -511 0x6666 //TX_MIC_TO_BFGAIN -512 0x0000 //TX_MICTOBFGAIN0 -513 0x0000 //TX_FASTMUE_TH -514 0x0000 //TX_DERVB_LEN_0 -515 0x0000 //TX_DERVB_LEN_1 -516 0x0000 //TX_RHO_DERVB -517 0x0000 //TX_MIC_INDX_DERVB -518 0x0000 //TX_MU_DERVB -519 0x0000 //TX_DR_RESRV_0 -520 0x0000 //TX_DR_RESRV_1 -521 0x0000 //TX_DR_RESRV_2 -522 0x0000 //TX_DR_RESRV_3 -523 0x0000 //TX_DR_RESRV_4 -524 0x0000 //TX_DR_RESRV_5 -525 0x0000 //TX_DR_RESRV_6 -526 0x0000 //TX_DR_RESRV_7 -527 0x0000 //TX_DR_RESRV_8 -528 0x1333 //TX_WIND_MARK_TH -529 0x399A //TX_CORR_THR -530 0x0004 //TX_SNR_THR -531 0x0010 //TX_ENGY_THR -532 0x1770 //TX_CORR_HIGH_TH -533 0x6000 //TX_ENGY_THR_2 -534 0x3400 //TX_MEAN_RTO_THR -535 0x0028 //TX_WNS_ENOISE_MIC0_TH -536 0x3000 //TX_RATIOMICL_TH -537 0x64CD //TX_CALIG_HS -538 0x0000 //TX_LVL_CTRL -539 0x0014 //TX_WIND_SUPRTO -540 0x000A //TX_WNS_MIN_G -541 0x0000 //TX_WNS_B_POST_FLT -542 0x2800 //TX_RATIOMICH_TH -543 0xD120 //TX_WIND_INBEAM_L_TH -544 0x0FA0 //TX_WIND_INBEAM_H_TH -545 0x2000 //TX_WNS_RESRV_0 -546 0x59D8 //TX_WNS_RESRV_1 -547 0x0000 //TX_WNS_RESRV_2 -548 0x0000 //TX_WNS_RESRV_3 -549 0x0000 //TX_WNS_RESRV_4 -550 0x0000 //TX_WNS_RESRV_5 -551 0x0000 //TX_WNS_RESRV_6 -552 0x0000 //TX_PB_B_POST_FLT_LESSCUT -553 0x0070 //TX_BF_LESSCUT_BBIN -554 0x0070 //TX_BF_LESSCUT_EBIN -555 0x0010 //TX_POSTBFB0 -556 0x0070 //TX_POSTBFB -557 0x00B0 //TX_POSTBFE -558 0x0E66 //TX_SPEECH_SNR_TH -559 0x0050 //TX_PB_MAX_PRI_SNR_TH -560 0x770A //TX_MAX_PRI_SNR_TH_L -561 0x0000 //TX_PFGAIN -562 0x0000 //TX_MAINTOREFR_TH -563 0x0000 //TX_SAM_MARK -564 0x0000 //TX_PB_RESRV_0 -565 0x0000 //TX_PB_RESRV_1 -566 0x0020 //TX_FDEQ_SUBNUM -567 0x4848 //TX_FDEQ_GAIN_0 -568 0x4848 //TX_FDEQ_GAIN_1 -569 0x4850 //TX_FDEQ_GAIN_2 -570 0x5050 //TX_FDEQ_GAIN_3 -571 0x4848 //TX_FDEQ_GAIN_4 -572 0x4850 //TX_FDEQ_GAIN_5 -573 0x5261 //TX_FDEQ_GAIN_6 -574 0x5C4C //TX_FDEQ_GAIN_7 -575 0x4C4E //TX_FDEQ_GAIN_8 -576 0x4848 //TX_FDEQ_GAIN_9 -577 0x4C4F //TX_FDEQ_GAIN_10 -578 0x5153 //TX_FDEQ_GAIN_11 -579 0x6265 //TX_FDEQ_GAIN_12 -580 0x638B //TX_FDEQ_GAIN_13 -581 0x8480 //TX_FDEQ_GAIN_14 -582 0x7A7C //TX_FDEQ_GAIN_15 -583 0x4848 //TX_FDEQ_GAIN_16 -584 0x4848 //TX_FDEQ_GAIN_17 -585 0x4848 //TX_FDEQ_GAIN_18 -586 0x4848 //TX_FDEQ_GAIN_19 -587 0x4848 //TX_FDEQ_GAIN_20 -588 0x4848 //TX_FDEQ_GAIN_21 -589 0x4848 //TX_FDEQ_GAIN_22 -590 0x4848 //TX_FDEQ_GAIN_23 -591 0x0202 //TX_FDEQ_BIN_0 -592 0x0203 //TX_FDEQ_BIN_1 -593 0x0303 //TX_FDEQ_BIN_2 -594 0x0304 //TX_FDEQ_BIN_3 -595 0x0405 //TX_FDEQ_BIN_4 -596 0x0506 //TX_FDEQ_BIN_5 -597 0x0708 //TX_FDEQ_BIN_6 -598 0x090A //TX_FDEQ_BIN_7 -599 0x0B0C //TX_FDEQ_BIN_8 -600 0x0D0E //TX_FDEQ_BIN_9 -601 0x1013 //TX_FDEQ_BIN_10 -602 0x1719 //TX_FDEQ_BIN_11 -603 0x1B1E //TX_FDEQ_BIN_12 -604 0x1E1E //TX_FDEQ_BIN_13 -605 0x1E28 //TX_FDEQ_BIN_14 -606 0x284A //TX_FDEQ_BIN_15 -607 0x0000 //TX_FDEQ_BIN_16 -608 0x0000 //TX_FDEQ_BIN_17 -609 0x0000 //TX_FDEQ_BIN_18 -610 0x0000 //TX_FDEQ_BIN_19 -611 0x0000 //TX_FDEQ_BIN_20 -612 0x0000 //TX_FDEQ_BIN_21 -613 0x0000 //TX_FDEQ_BIN_22 -614 0x0000 //TX_FDEQ_BIN_23 -615 0x0000 //TX_FDEQ_PADDING -616 0x0020 //TX_PREEQ_SUBNUM_MIC0 -617 0x4848 //TX_PREEQ_GAIN_MIC0_0 -618 0x4848 //TX_PREEQ_GAIN_MIC0_1 -619 0x4848 //TX_PREEQ_GAIN_MIC0_2 -620 0x4848 //TX_PREEQ_GAIN_MIC0_3 -621 0x4848 //TX_PREEQ_GAIN_MIC0_4 -622 0x4848 //TX_PREEQ_GAIN_MIC0_5 -623 0x4848 //TX_PREEQ_GAIN_MIC0_6 -624 0x4848 //TX_PREEQ_GAIN_MIC0_7 -625 0x4848 //TX_PREEQ_GAIN_MIC0_8 -626 0x4848 //TX_PREEQ_GAIN_MIC0_9 -627 0x4848 //TX_PREEQ_GAIN_MIC0_10 -628 0x4848 //TX_PREEQ_GAIN_MIC0_11 -629 0x4848 //TX_PREEQ_GAIN_MIC0_12 -630 0x4848 //TX_PREEQ_GAIN_MIC0_13 -631 0x4848 //TX_PREEQ_GAIN_MIC0_14 -632 0x4848 //TX_PREEQ_GAIN_MIC0_15 -633 0x4848 //TX_PREEQ_GAIN_MIC0_16 -634 0x4848 //TX_PREEQ_GAIN_MIC0_17 -635 0x4848 //TX_PREEQ_GAIN_MIC0_18 -636 0x4848 //TX_PREEQ_GAIN_MIC0_19 -637 0x4848 //TX_PREEQ_GAIN_MIC0_20 -638 0x4848 //TX_PREEQ_GAIN_MIC0_21 -639 0x4848 //TX_PREEQ_GAIN_MIC0_22 -640 0x4848 //TX_PREEQ_GAIN_MIC0_23 -641 0x0202 //TX_PREEQ_BIN_MIC0_0 -642 0x0203 //TX_PREEQ_BIN_MIC0_1 -643 0x0303 //TX_PREEQ_BIN_MIC0_2 -644 0x0304 //TX_PREEQ_BIN_MIC0_3 -645 0x0405 //TX_PREEQ_BIN_MIC0_4 -646 0x0506 //TX_PREEQ_BIN_MIC0_5 -647 0x0708 //TX_PREEQ_BIN_MIC0_6 -648 0x090A //TX_PREEQ_BIN_MIC0_7 -649 0x0B0C //TX_PREEQ_BIN_MIC0_8 -650 0x0D0E //TX_PREEQ_BIN_MIC0_9 -651 0x1013 //TX_PREEQ_BIN_MIC0_10 -652 0x1719 //TX_PREEQ_BIN_MIC0_11 -653 0x1B1E //TX_PREEQ_BIN_MIC0_12 -654 0x1E1E //TX_PREEQ_BIN_MIC0_13 -655 0x1E28 //TX_PREEQ_BIN_MIC0_14 -656 0x3042 //TX_PREEQ_BIN_MIC0_15 -657 0x0000 //TX_PREEQ_BIN_MIC0_16 -658 0x0000 //TX_PREEQ_BIN_MIC0_17 -659 0x0000 //TX_PREEQ_BIN_MIC0_18 -660 0x0000 //TX_PREEQ_BIN_MIC0_19 -661 0x0000 //TX_PREEQ_BIN_MIC0_20 -662 0x0000 //TX_PREEQ_BIN_MIC0_21 -663 0x0000 //TX_PREEQ_BIN_MIC0_22 -664 0x0000 //TX_PREEQ_BIN_MIC0_23 -665 0x0020 //TX_PREEQ_SUBNUM_MIC1 -666 0x4848 //TX_PREEQ_GAIN_MIC1_0 -667 0x4848 //TX_PREEQ_GAIN_MIC1_1 -668 0x4848 //TX_PREEQ_GAIN_MIC1_2 -669 0x4848 //TX_PREEQ_GAIN_MIC1_3 -670 0x4848 //TX_PREEQ_GAIN_MIC1_4 -671 0x4848 //TX_PREEQ_GAIN_MIC1_5 -672 0x4848 //TX_PREEQ_GAIN_MIC1_6 -673 0x484A //TX_PREEQ_GAIN_MIC1_7 -674 0x4C4E //TX_PREEQ_GAIN_MIC1_8 -675 0x4F50 //TX_PREEQ_GAIN_MIC1_9 -676 0x5356 //TX_PREEQ_GAIN_MIC1_10 -677 0x575B //TX_PREEQ_GAIN_MIC1_11 -678 0x6470 //TX_PREEQ_GAIN_MIC1_12 -679 0x725D //TX_PREEQ_GAIN_MIC1_13 -680 0x5148 //TX_PREEQ_GAIN_MIC1_14 -681 0x3B36 //TX_PREEQ_GAIN_MIC1_15 -682 0x4848 //TX_PREEQ_GAIN_MIC1_16 -683 0x4848 //TX_PREEQ_GAIN_MIC1_17 -684 0x4848 //TX_PREEQ_GAIN_MIC1_18 -685 0x4848 //TX_PREEQ_GAIN_MIC1_19 -686 0x4848 //TX_PREEQ_GAIN_MIC1_20 -687 0x4848 //TX_PREEQ_GAIN_MIC1_21 -688 0x4848 //TX_PREEQ_GAIN_MIC1_22 -689 0x4848 //TX_PREEQ_GAIN_MIC1_23 -690 0x0202 //TX_PREEQ_BIN_MIC1_0 -691 0x0203 //TX_PREEQ_BIN_MIC1_1 -692 0x0303 //TX_PREEQ_BIN_MIC1_2 -693 0x0304 //TX_PREEQ_BIN_MIC1_3 -694 0x0405 //TX_PREEQ_BIN_MIC1_4 -695 0x0506 //TX_PREEQ_BIN_MIC1_5 -696 0x0708 //TX_PREEQ_BIN_MIC1_6 -697 0x090A //TX_PREEQ_BIN_MIC1_7 -698 0x0B0C //TX_PREEQ_BIN_MIC1_8 -699 0x0D0E //TX_PREEQ_BIN_MIC1_9 -700 0x1013 //TX_PREEQ_BIN_MIC1_10 -701 0x1719 //TX_PREEQ_BIN_MIC1_11 -702 0x1B1E //TX_PREEQ_BIN_MIC1_12 -703 0x1E1E //TX_PREEQ_BIN_MIC1_13 -704 0x1E28 //TX_PREEQ_BIN_MIC1_14 -705 0x3042 //TX_PREEQ_BIN_MIC1_15 -706 0x0000 //TX_PREEQ_BIN_MIC1_16 -707 0x0000 //TX_PREEQ_BIN_MIC1_17 -708 0x0000 //TX_PREEQ_BIN_MIC1_18 -709 0x0000 //TX_PREEQ_BIN_MIC1_19 -710 0x0000 //TX_PREEQ_BIN_MIC1_20 -711 0x0000 //TX_PREEQ_BIN_MIC1_21 -712 0x0000 //TX_PREEQ_BIN_MIC1_22 -713 0x0000 //TX_PREEQ_BIN_MIC1_23 -714 0x0020 //TX_PREEQ_SUBNUM_MIC2 -715 0x4848 //TX_PREEQ_GAIN_MIC2_0 -716 0x4848 //TX_PREEQ_GAIN_MIC2_1 -717 0x4848 //TX_PREEQ_GAIN_MIC2_2 -718 0x4848 //TX_PREEQ_GAIN_MIC2_3 -719 0x4848 //TX_PREEQ_GAIN_MIC2_4 -720 0x4848 //TX_PREEQ_GAIN_MIC2_5 -721 0x4848 //TX_PREEQ_GAIN_MIC2_6 -722 0x494B //TX_PREEQ_GAIN_MIC2_7 -723 0x4B4C //TX_PREEQ_GAIN_MIC2_8 -724 0x4C4D //TX_PREEQ_GAIN_MIC2_9 -725 0x4D4E //TX_PREEQ_GAIN_MIC2_10 -726 0x4E4E //TX_PREEQ_GAIN_MIC2_11 -727 0x5050 //TX_PREEQ_GAIN_MIC2_12 -728 0x4A47 //TX_PREEQ_GAIN_MIC2_13 -729 0x4448 //TX_PREEQ_GAIN_MIC2_14 -730 0x5455 //TX_PREEQ_GAIN_MIC2_15 -731 0x4848 //TX_PREEQ_GAIN_MIC2_16 -732 0x4848 //TX_PREEQ_GAIN_MIC2_17 -733 0x4848 //TX_PREEQ_GAIN_MIC2_18 -734 0x4848 //TX_PREEQ_GAIN_MIC2_19 -735 0x4848 //TX_PREEQ_GAIN_MIC2_20 -736 0x4848 //TX_PREEQ_GAIN_MIC2_21 -737 0x4848 //TX_PREEQ_GAIN_MIC2_22 -738 0x4848 //TX_PREEQ_GAIN_MIC2_23 -739 0x0202 //TX_PREEQ_BIN_MIC2_0 -740 0x0203 //TX_PREEQ_BIN_MIC2_1 -741 0x0303 //TX_PREEQ_BIN_MIC2_2 -742 0x0304 //TX_PREEQ_BIN_MIC2_3 -743 0x0405 //TX_PREEQ_BIN_MIC2_4 -744 0x0506 //TX_PREEQ_BIN_MIC2_5 -745 0x0708 //TX_PREEQ_BIN_MIC2_6 -746 0x090A //TX_PREEQ_BIN_MIC2_7 -747 0x0B0C //TX_PREEQ_BIN_MIC2_8 -748 0x0D0E //TX_PREEQ_BIN_MIC2_9 -749 0x1013 //TX_PREEQ_BIN_MIC2_10 -750 0x1719 //TX_PREEQ_BIN_MIC2_11 -751 0x1B1E //TX_PREEQ_BIN_MIC2_12 -752 0x1E1E //TX_PREEQ_BIN_MIC2_13 -753 0x1E28 //TX_PREEQ_BIN_MIC2_14 -754 0x363C //TX_PREEQ_BIN_MIC2_15 -755 0x0000 //TX_PREEQ_BIN_MIC2_16 -756 0x0000 //TX_PREEQ_BIN_MIC2_17 -757 0x0000 //TX_PREEQ_BIN_MIC2_18 -758 0x0000 //TX_PREEQ_BIN_MIC2_19 -759 0x0000 //TX_PREEQ_BIN_MIC2_20 -760 0x0000 //TX_PREEQ_BIN_MIC2_21 -761 0x0000 //TX_PREEQ_BIN_MIC2_22 -762 0x0000 //TX_PREEQ_BIN_MIC2_23 -763 0x0006 //TX_MASKING_ABILITY -764 0x0800 //TX_NND_WEIGHT -765 0x0050 //TX_MIC_CALIBRATION_0 -766 0x0065 //TX_MIC_CALIBRATION_1 -767 0x0050 //TX_MIC_CALIBRATION_2 -768 0x0050 //TX_MIC_CALIBRATION_3 -769 0x0046 //TX_MIC_PWR_BIAS_0 -770 0x0040 //TX_MIC_PWR_BIAS_1 -771 0x0046 //TX_MIC_PWR_BIAS_2 -772 0x0046 //TX_MIC_PWR_BIAS_3 -773 0x0000 //TX_GAIN_LIMIT_0 -774 0x000F //TX_GAIN_LIMIT_1 -775 0x0000 //TX_GAIN_LIMIT_2 -776 0x0000 //TX_GAIN_LIMIT_3 -777 0x7F5B //TX_BVE_NOVAD0_ALPHADOWN -778 0x7FDE //TX_BVE_VAD0_ALPHAUP -779 0x7F3A //TX_BVE_VAD0_ALPHADOWN -780 0x2000 //TX_BVE_GAINWEIGHT_NOFEVADLI -781 0x7F5B //TX_BVE_FEVADLI_ALPHA -782 0x7F19 //TX_BVE_NOVAD0_ALPHAUP -783 0x0800 //TX_TDDRC_ALPHA_UP_01 -784 0x0800 //TX_TDDRC_ALPHA_UP_02 -785 0x0800 //TX_TDDRC_ALPHA_UP_03 -786 0x0800 //TX_TDDRC_ALPHA_UP_04 -787 0x7EB8 //TX_TDDRC_ALPHA_DWN_01 -788 0x7EB8 //TX_TDDRC_ALPHA_DWN_02 -789 0x7EB8 //TX_TDDRC_ALPHA_DWN_03 -790 0x7EB8 //TX_TDDRC_ALPHA_DWN_04 -791 0x7FFF //TX_TDDRC_TD_DRC_LIMIT -792 0x0800 //TX_TDDRC_POST_LIMIT_GAIN -793 0x0000 //TX_TDDRC_RESRV_0 -794 0x0000 //TX_TDDRC_RESRV_1 -795 0x0018 //TX_FDDRC_BAND_MARGIN_0 -796 0x0030 //TX_FDDRC_BAND_MARGIN_1 -797 0x0050 //TX_FDDRC_BAND_MARGIN_2 -798 0x0080 //TX_FDDRC_BAND_MARGIN_3 -799 0x0007 //TX_FDDRC_BLOCK_EXP -800 0x5000 //TX_FDDRC_THRD_2_0 -801 0x5000 //TX_FDDRC_THRD_2_1 -802 0x5000 //TX_FDDRC_THRD_2_2 -803 0x5000 //TX_FDDRC_THRD_2_3 -804 0x6400 //TX_FDDRC_THRD_3_0 -805 0x6400 //TX_FDDRC_THRD_3_1 -806 0x6400 //TX_FDDRC_THRD_3_2 -807 0x6400 //TX_FDDRC_THRD_3_3 -808 0x2000 //TX_FDDRC_SLANT_0_0 -809 0x2000 //TX_FDDRC_SLANT_0_1 -810 0x2000 //TX_FDDRC_SLANT_0_2 -811 0x2000 //TX_FDDRC_SLANT_0_3 -812 0x5333 //TX_FDDRC_SLANT_1_0 -813 0x5333 //TX_FDDRC_SLANT_1_1 -814 0x5333 //TX_FDDRC_SLANT_1_2 -815 0x5333 //TX_FDDRC_SLANT_1_3 -816 0x0010 //TX_DEADMIC_SILENCE_TH -817 0x0600 //TX_MIC_DEGRADE_TH -818 0x0078 //TX_DEADMIC_CNT -819 0x0078 //TX_MIC_DEGRADE_CNT -820 0x0000 //TX_FDDRC_RESRV_4 -821 0x0000 //TX_FDDRC_RESRV_5 -822 0x0000 //TX_FDDRC_RESRV_6 -823 0x7FFF //TX_KS_NOISEPASTE_FACTOR -824 0x0001 //TX_KS_CONFIG -825 0x7FFF //TX_KS_GAIN_MIN -826 0x0000 //TX_KS_RESRV_0 -827 0x0000 //TX_KS_RESRV_1 -828 0x0000 //TX_KS_RESRV_2 -829 0x7C00 //TX_LAMBDA_PKA_FP -830 0x2000 //TX_TPKA_FP -831 0x0080 //TX_MIN_G_FP -832 0x2000 //TX_MAX_G_FP -833 0x4848 //TX_FFP_FP_K_METAL -834 0x4000 //TX_A_POST_FLT_FP -835 0x0F5C //TX_RTO_OUTBEAM_TH -836 0x4CCD //TX_TPKA_FP_THD -837 0x0000 //TX_MAX_G_FP_BLK -838 0x0000 //TX_FFP_FADEIN -839 0x0000 //TX_FFP_FADEOUT -840 0x0000 //TX_WHISPERCTH -841 0x0000 //TX_WHISPERHOLDT -842 0x0000 //TX_WHISP_ENTHH -843 0x0000 //TX_WHISP_ENTHL -844 0x0000 //TX_WHISP_RTOTH -845 0x0000 //TX_WHISP_RTOTH2 -846 0x0096 //TX_MUTE_PERIOD -847 0x0000 //TX_FADE_IN_PERIOD -848 0x0100 //TX_FFP_RESRV_2 -849 0x0020 //TX_FFP_RESRV_3 -850 0x0000 //TX_FFP_RESRV_4 -851 0x0000 //TX_FFP_RESRV_5 -852 0x0000 //TX_FFP_RESRV_6 -853 0x0002 //TX_FILTINDX -854 0x0001 //TX_TDDRC_THRD_0 -855 0x0002 //TX_TDDRC_THRD_1 -856 0x1000 //TX_TDDRC_THRD_2 -857 0x1000 //TX_TDDRC_THRD_3 -858 0x6000 //TX_TDDRC_SLANT_0 -859 0x6000 //TX_TDDRC_SLANT_1 -860 0x0800 //TX_TDDRC_ALPHA_UP_00 -861 0x7EB8 //TX_TDDRC_ALPHA_DWN_00 -862 0x0000 //TX_TDDRC_HMNC_FLAG -863 0x199A //TX_TDDRC_HMNC_GAIN -864 0x0000 //TX_TDDRC_SMT_FLAG -865 0x0CCD //TX_TDDRC_SMT_W -866 0x0E21 //TX_TDDRC_DRC_GAIN -867 0x7FFF //TX_TDDRC_LMT_THRD -868 0x0000 //TX_TDDRC_LMT_ALPHA -869 0x0000 //TX_TFMASKLTH -870 0x0000 //TX_TFMASKLTHL -871 0x0CCD //TX_TFMASKHTH -872 0x0CCD //TX_TFMASKLTH_BINVAD -873 0xF333 //TX_TFMASKLTH_NS_EST -874 0x2CCD //TX_TFMASKLTH_DOA -875 0xECCD //TX_TFMASKTH_BLESSCUT -876 0x1000 //TX_B_LESSCUT_RTO_MASK -877 0x3800 //TX_SB_RHO_MEAN_TH_ABN -878 0x2000 //TX_B_POST_FLT_MASK -879 0x0000 //TX_B_POST_FLT_MASK1 -880 0x5333 //TX_GAIN_WIND_MASK -881 0x7FFF //TX_TFMASK_BFSTRICT_MUSIC -882 0x0000 //TX_TFMASK_BFSTRICT_NOMUSIC -883 0x7333 //TX_FASTNS_OUTIN_TH -884 0x0CCD //TX_FASTNS_TFMASK_TH -885 0x0CCD //TX_FASTNS_TFMASKBIN_TH1 -886 0x0CCD //TX_FASTNS_TFMASKBIN_TH2 -887 0x0CCD //TX_FASTNS_TFMASKBIN_TH3 -888 0x00C8 //TX_FASTNS_ARSPC_TH -889 0xC000 //TX_FASTNS_MASK5_TH -890 0x4848 //TX_POSTSSA_MIN_G_VR_MASK -891 0x4000 //TX_A_LESSCUT_RTO_MASK -892 0x1770 //TX_FASTNS_NOISETH -893 0xC000 //TX_FASTNS_SSA_THLFL -894 0xC000 //TX_FASTNS_SSA_THHFL -895 0xCCCC //TX_FASTNS_SSA_THLFH -896 0xD999 //TX_FASTNS_SSA_THHFH -#RX -0 0x027C //RX_RECVFUNC_MODE_0 -1 0x0000 //RX_RECVFUNC_MODE_1 -2 0x0003 //RX_SAMPLINGFREQ_SIG -3 0x0003 //RX_SAMPLINGFREQ_PROC -4 0x000A //RX_FRAME_SZ -5 0x0000 //RX_DELAY_OPT -6 0x6000 //RX_TDDRC_ALPHA_UP_1 -7 0x6000 //RX_TDDRC_ALPHA_UP_2 -8 0x6000 //RX_TDDRC_ALPHA_UP_3 -9 0x1000 //RX_TDDRC_ALPHA_UP_4 -10 0x0800 //RX_PGA -11 0x7652 //RX_A_HP -12 0x4000 //RX_B_PE -13 0x7800 //RX_THR_PITCH_DET_0 -14 0x7000 //RX_THR_PITCH_DET_1 -15 0x6000 //RX_THR_PITCH_DET_2 -16 0x0008 //RX_PITCH_BFR_LEN -17 0x0003 //RX_SBD_PITCH_DET -18 0x0100 //RX_PP_RESRV_0 -19 0x0020 //RX_PP_RESRV_1 -20 0x0400 //RX_N_SN_EST -21 0x000C //RX_N2_SN_EST -22 0x0010 //RX_NS_LVL_CTRL -23 0xF800 //RX_THR_SN_EST -24 0x7E00 //RX_LAMBDA_PFILT -25 0x000A //RX_FENS_RESRV_0 -26 0x0190 //RX_FENS_RESRV_1 -27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 -28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 -29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 -30 0x0002 //RX_EXTRA_NS_L -31 0x0800 //RX_EXTRA_NS_A -32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 -33 0x7214 //RX_TDDRC_LIMITER_THRD -34 0x0800 //RX_TDDRC_LIMITER_GAIN -35 0x199A //RX_A_POST_FLT -36 0x0000 //RX_LMT_THRD -37 0x4000 //RX_LMT_ALPHA -38 0x0020 //RX_FDEQ_SUBNUM -39 0x484E //RX_FDEQ_GAIN_0 -40 0x4E4E //RX_FDEQ_GAIN_1 -41 0x4E4E //RX_FDEQ_GAIN_2 -42 0x4848 //RX_FDEQ_GAIN_3 -43 0x484E //RX_FDEQ_GAIN_4 -44 0x6E4E //RX_FDEQ_GAIN_5 -45 0x4850 //RX_FDEQ_GAIN_6 -46 0x4848 //RX_FDEQ_GAIN_7 -47 0x4860 //RX_FDEQ_GAIN_8 -48 0x7468 //RX_FDEQ_GAIN_9 -49 0x6060 //RX_FDEQ_GAIN_10 -50 0x6666 //RX_FDEQ_GAIN_11 -51 0x6666 //RX_FDEQ_GAIN_12 -52 0x6666 //RX_FDEQ_GAIN_13 -53 0x6060 //RX_FDEQ_GAIN_14 -54 0x6060 //RX_FDEQ_GAIN_15 -55 0x4848 //RX_FDEQ_GAIN_16 -56 0x4848 //RX_FDEQ_GAIN_17 -57 0x4848 //RX_FDEQ_GAIN_18 -58 0x4848 //RX_FDEQ_GAIN_19 -59 0x4848 //RX_FDEQ_GAIN_20 -60 0x4848 //RX_FDEQ_GAIN_21 -61 0x4848 //RX_FDEQ_GAIN_22 -62 0x4848 //RX_FDEQ_GAIN_23 -63 0x0202 //RX_FDEQ_BIN_0 -64 0x0203 //RX_FDEQ_BIN_1 -65 0x0303 //RX_FDEQ_BIN_2 -66 0x0304 //RX_FDEQ_BIN_3 -67 0x0404 //RX_FDEQ_BIN_4 -68 0x0209 //RX_FDEQ_BIN_5 -69 0x0808 //RX_FDEQ_BIN_6 -70 0x090A //RX_FDEQ_BIN_7 -71 0x0B0C //RX_FDEQ_BIN_8 -72 0x0D0E //RX_FDEQ_BIN_9 -73 0x1013 //RX_FDEQ_BIN_10 -74 0x1719 //RX_FDEQ_BIN_11 -75 0x1B1E //RX_FDEQ_BIN_12 -76 0x1E1E //RX_FDEQ_BIN_13 -77 0x1E28 //RX_FDEQ_BIN_14 -78 0x282C //RX_FDEQ_BIN_15 -79 0x0000 //RX_FDEQ_BIN_16 -80 0x0000 //RX_FDEQ_BIN_17 -81 0x0000 //RX_FDEQ_BIN_18 -82 0x0000 //RX_FDEQ_BIN_19 -83 0x0000 //RX_FDEQ_BIN_20 -84 0x0000 //RX_FDEQ_BIN_21 -85 0x0000 //RX_FDEQ_BIN_22 -86 0x0000 //RX_FDEQ_BIN_23 -87 0x4000 //RX_FDEQ_RESRV_0 -88 0x0320 //RX_FDEQ_RESRV_1 -89 0x0018 //RX_FDDRC_BAND_MARGIN_0 -90 0x0035 //RX_FDDRC_BAND_MARGIN_1 -91 0x00D5 //RX_FDDRC_BAND_MARGIN_2 -92 0x0120 //RX_FDDRC_BAND_MARGIN_3 -93 0x0004 //RX_FDDRC_BLOCK_EXP -94 0x5000 //RX_FDDRC_THRD_2_0 -95 0x5000 //RX_FDDRC_THRD_2_1 -96 0x2000 //RX_FDDRC_THRD_2_2 -97 0x5000 //RX_FDDRC_THRD_2_3 -98 0x6400 //RX_FDDRC_THRD_3_0 -99 0x6400 //RX_FDDRC_THRD_3_1 -100 0x2000 //RX_FDDRC_THRD_3_2 -101 0x5000 //RX_FDDRC_THRD_3_3 -102 0x4000 //RX_FDDRC_SLANT_0_0 -103 0x4000 //RX_FDDRC_SLANT_0_1 -104 0x4000 //RX_FDDRC_SLANT_0_2 -105 0x4000 //RX_FDDRC_SLANT_0_3 -106 0x7FFF //RX_FDDRC_SLANT_1_0 -107 0x7FFF //RX_FDDRC_SLANT_1_1 -108 0x7FFF //RX_FDDRC_SLANT_1_2 -109 0x7FFF //RX_FDDRC_SLANT_1_3 -110 0x0000 //RX_FDDRC_RESRV_0 -111 0x0002 //RX_FILTINDX -112 0x0002 //RX_TDDRC_THRD_0 -113 0x0004 //RX_TDDRC_THRD_1 -114 0x1A00 //RX_TDDRC_THRD_2 -115 0x1A00 //RX_TDDRC_THRD_3 -116 0x7EB8 //RX_TDDRC_SLANT_0 -117 0x2500 //RX_TDDRC_SLANT_1 -118 0x6000 //RX_TDDRC_ALPHA_UP_0 -119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 -120 0x0000 //RX_TDDRC_HMNC_FLAG -121 0x199A //RX_TDDRC_HMNC_GAIN -122 0x0001 //RX_TDDRC_SMT_FLAG -123 0x0CCD //RX_TDDRC_SMT_W -124 0x04BC //RX_TDDRC_DRC_GAIN -125 0x7C00 //RX_LAMBDA_PKA_FP -126 0x2000 //RX_TPKA_FP -127 0x2000 //RX_MIN_G_FP -128 0x0080 //RX_MAX_G_FP -129 0x0019 //RX_SPK_VOL -130 0x0000 //RX_VOL_RESRV_0 -131 0x0000 //RX_MAXLEVEL_CNG -132 0x3000 //RX_BWE_UV_TH -133 0x3000 //RX_BWE_UV_TH2 -134 0x1800 //RX_BWE_UV_TH3 -135 0x1000 //RX_BWE_V_TH -136 0x04CD //RX_BWE_GAIN1_V_TH1 -137 0x0F33 //RX_BWE_GAIN1_V_TH2 -138 0x7333 //RX_BWE_UV_EQ -139 0x199A //RX_BWE_V_EQ -140 0x7333 //RX_BWE_TONE_TH -141 0x0004 //RX_BWE_UV_HOLD_T -142 0x6CCD //RX_BWE_GAIN2_ALPHA -143 0x799A //RX_BWE_GAIN3_ALPHA -144 0x001E //RX_BWE_CUTOFF -145 0x3000 //RX_BWE_GAINFILL -146 0x3200 //RX_BWE_MAXTH_TONE -147 0x2000 //RX_BWE_EQ_0 -148 0x2000 //RX_BWE_EQ_1 -149 0x2000 //RX_BWE_EQ_2 -150 0x2000 //RX_BWE_EQ_3 -151 0x2000 //RX_BWE_EQ_4 -152 0x2000 //RX_BWE_EQ_5 -153 0x2000 //RX_BWE_EQ_6 -154 0x0000 //RX_BWE_RESRV_0 -155 0x0000 //RX_BWE_RESRV_1 -156 0x0000 //RX_BWE_RESRV_2 -#VOL 0 -6 0x6000 //RX_TDDRC_ALPHA_UP_1 -7 0x6000 //RX_TDDRC_ALPHA_UP_2 -8 0x6000 //RX_TDDRC_ALPHA_UP_3 -9 0x1000 //RX_TDDRC_ALPHA_UP_4 -27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 -28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 -29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 -32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 -33 0x7214 //RX_TDDRC_LIMITER_THRD -34 0x0800 //RX_TDDRC_LIMITER_GAIN -112 0x0002 //RX_TDDRC_THRD_0 -113 0x0004 //RX_TDDRC_THRD_1 -114 0x1A00 //RX_TDDRC_THRD_2 -115 0x1A00 //RX_TDDRC_THRD_3 -116 0x7EB8 //RX_TDDRC_SLANT_0 -117 0x2500 //RX_TDDRC_SLANT_1 -118 0x6000 //RX_TDDRC_ALPHA_UP_0 -119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 -120 0x0000 //RX_TDDRC_HMNC_FLAG -121 0x199A //RX_TDDRC_HMNC_GAIN -122 0x0001 //RX_TDDRC_SMT_FLAG -123 0x0CCD //RX_TDDRC_SMT_W -124 0x04BC //RX_TDDRC_DRC_GAIN -38 0x0020 //RX_FDEQ_SUBNUM -39 0x484E //RX_FDEQ_GAIN_0 -40 0x4E4E //RX_FDEQ_GAIN_1 -41 0x4E4E //RX_FDEQ_GAIN_2 -42 0x4848 //RX_FDEQ_GAIN_3 -43 0x484E //RX_FDEQ_GAIN_4 -44 0x6E4E //RX_FDEQ_GAIN_5 -45 0x4850 //RX_FDEQ_GAIN_6 -46 0x4848 //RX_FDEQ_GAIN_7 -47 0x4860 //RX_FDEQ_GAIN_8 -48 0x7468 //RX_FDEQ_GAIN_9 -49 0x6060 //RX_FDEQ_GAIN_10 -50 0x6666 //RX_FDEQ_GAIN_11 -51 0x6666 //RX_FDEQ_GAIN_12 -52 0x6666 //RX_FDEQ_GAIN_13 -53 0x6060 //RX_FDEQ_GAIN_14 -54 0x6060 //RX_FDEQ_GAIN_15 -55 0x4848 //RX_FDEQ_GAIN_16 -56 0x4848 //RX_FDEQ_GAIN_17 -57 0x4848 //RX_FDEQ_GAIN_18 -58 0x4848 //RX_FDEQ_GAIN_19 -59 0x4848 //RX_FDEQ_GAIN_20 -60 0x4848 //RX_FDEQ_GAIN_21 -61 0x4848 //RX_FDEQ_GAIN_22 -62 0x4848 //RX_FDEQ_GAIN_23 -63 0x0202 //RX_FDEQ_BIN_0 -64 0x0203 //RX_FDEQ_BIN_1 -65 0x0303 //RX_FDEQ_BIN_2 -66 0x0304 //RX_FDEQ_BIN_3 -67 0x0404 //RX_FDEQ_BIN_4 -68 0x0209 //RX_FDEQ_BIN_5 -69 0x0808 //RX_FDEQ_BIN_6 -70 0x090A //RX_FDEQ_BIN_7 -71 0x0B0C //RX_FDEQ_BIN_8 -72 0x0D0E //RX_FDEQ_BIN_9 -73 0x1013 //RX_FDEQ_BIN_10 -74 0x1719 //RX_FDEQ_BIN_11 -75 0x1B1E //RX_FDEQ_BIN_12 -76 0x1E1E //RX_FDEQ_BIN_13 -77 0x1E28 //RX_FDEQ_BIN_14 -78 0x282C //RX_FDEQ_BIN_15 -79 0x0000 //RX_FDEQ_BIN_16 -80 0x0000 //RX_FDEQ_BIN_17 -81 0x0000 //RX_FDEQ_BIN_18 -82 0x0000 //RX_FDEQ_BIN_19 -83 0x0000 //RX_FDEQ_BIN_20 -84 0x0000 //RX_FDEQ_BIN_21 -85 0x0000 //RX_FDEQ_BIN_22 -86 0x0000 //RX_FDEQ_BIN_23 -87 0x4000 //RX_FDEQ_RESRV_0 -88 0x0320 //RX_FDEQ_RESRV_1 -89 0x0018 //RX_FDDRC_BAND_MARGIN_0 -90 0x0035 //RX_FDDRC_BAND_MARGIN_1 -91 0x00D5 //RX_FDDRC_BAND_MARGIN_2 -92 0x0120 //RX_FDDRC_BAND_MARGIN_3 -93 0x0004 //RX_FDDRC_BLOCK_EXP -94 0x5000 //RX_FDDRC_THRD_2_0 -95 0x5000 //RX_FDDRC_THRD_2_1 -96 0x2000 //RX_FDDRC_THRD_2_2 -97 0x5000 //RX_FDDRC_THRD_2_3 -98 0x6400 //RX_FDDRC_THRD_3_0 -99 0x6400 //RX_FDDRC_THRD_3_1 -100 0x2000 //RX_FDDRC_THRD_3_2 -101 0x5000 //RX_FDDRC_THRD_3_3 -102 0x4000 //RX_FDDRC_SLANT_0_0 -103 0x4000 //RX_FDDRC_SLANT_0_1 -104 0x4000 //RX_FDDRC_SLANT_0_2 -105 0x4000 //RX_FDDRC_SLANT_0_3 -106 0x7FFF //RX_FDDRC_SLANT_1_0 -107 0x7FFF //RX_FDDRC_SLANT_1_1 -108 0x7FFF //RX_FDDRC_SLANT_1_2 -109 0x7FFF //RX_FDDRC_SLANT_1_3 -110 0x0000 //RX_FDDRC_RESRV_0 -129 0x0019 //RX_SPK_VOL -130 0x0000 //RX_VOL_RESRV_0 -#VOL 1 -6 0x6000 //RX_TDDRC_ALPHA_UP_1 -7 0x6000 //RX_TDDRC_ALPHA_UP_2 -8 0x6000 //RX_TDDRC_ALPHA_UP_3 -9 0x1000 //RX_TDDRC_ALPHA_UP_4 -27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 -28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 -29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 -32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 -33 0x7214 //RX_TDDRC_LIMITER_THRD -34 0x0800 //RX_TDDRC_LIMITER_GAIN -112 0x0002 //RX_TDDRC_THRD_0 -113 0x0004 //RX_TDDRC_THRD_1 -114 0x1A00 //RX_TDDRC_THRD_2 -115 0x1A00 //RX_TDDRC_THRD_3 -116 0x7EB8 //RX_TDDRC_SLANT_0 -117 0x2500 //RX_TDDRC_SLANT_1 -118 0x6000 //RX_TDDRC_ALPHA_UP_0 -119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 -120 0x0000 //RX_TDDRC_HMNC_FLAG -121 0x199A //RX_TDDRC_HMNC_GAIN -122 0x0001 //RX_TDDRC_SMT_FLAG -123 0x0CCD //RX_TDDRC_SMT_W -124 0x04BC //RX_TDDRC_DRC_GAIN -38 0x0020 //RX_FDEQ_SUBNUM -39 0x484E //RX_FDEQ_GAIN_0 -40 0x4E4E //RX_FDEQ_GAIN_1 -41 0x4E4E //RX_FDEQ_GAIN_2 -42 0x4848 //RX_FDEQ_GAIN_3 -43 0x484E //RX_FDEQ_GAIN_4 -44 0x6E4E //RX_FDEQ_GAIN_5 -45 0x4850 //RX_FDEQ_GAIN_6 -46 0x4848 //RX_FDEQ_GAIN_7 -47 0x4860 //RX_FDEQ_GAIN_8 -48 0x7468 //RX_FDEQ_GAIN_9 -49 0x6060 //RX_FDEQ_GAIN_10 -50 0x6666 //RX_FDEQ_GAIN_11 -51 0x6666 //RX_FDEQ_GAIN_12 -52 0x6666 //RX_FDEQ_GAIN_13 -53 0x6060 //RX_FDEQ_GAIN_14 -54 0x6060 //RX_FDEQ_GAIN_15 -55 0x4848 //RX_FDEQ_GAIN_16 -56 0x4848 //RX_FDEQ_GAIN_17 -57 0x4848 //RX_FDEQ_GAIN_18 -58 0x4848 //RX_FDEQ_GAIN_19 -59 0x4848 //RX_FDEQ_GAIN_20 -60 0x4848 //RX_FDEQ_GAIN_21 -61 0x4848 //RX_FDEQ_GAIN_22 -62 0x4848 //RX_FDEQ_GAIN_23 -63 0x0202 //RX_FDEQ_BIN_0 -64 0x0203 //RX_FDEQ_BIN_1 -65 0x0303 //RX_FDEQ_BIN_2 -66 0x0304 //RX_FDEQ_BIN_3 -67 0x0404 //RX_FDEQ_BIN_4 -68 0x0209 //RX_FDEQ_BIN_5 -69 0x0808 //RX_FDEQ_BIN_6 -70 0x090A //RX_FDEQ_BIN_7 -71 0x0B0C //RX_FDEQ_BIN_8 -72 0x0D0E //RX_FDEQ_BIN_9 -73 0x1013 //RX_FDEQ_BIN_10 -74 0x1719 //RX_FDEQ_BIN_11 -75 0x1B1E //RX_FDEQ_BIN_12 -76 0x1E1E //RX_FDEQ_BIN_13 -77 0x1E28 //RX_FDEQ_BIN_14 -78 0x282C //RX_FDEQ_BIN_15 -79 0x0000 //RX_FDEQ_BIN_16 -80 0x0000 //RX_FDEQ_BIN_17 -81 0x0000 //RX_FDEQ_BIN_18 -82 0x0000 //RX_FDEQ_BIN_19 -83 0x0000 //RX_FDEQ_BIN_20 -84 0x0000 //RX_FDEQ_BIN_21 -85 0x0000 //RX_FDEQ_BIN_22 -86 0x0000 //RX_FDEQ_BIN_23 -87 0x4000 //RX_FDEQ_RESRV_0 -88 0x0320 //RX_FDEQ_RESRV_1 -89 0x0018 //RX_FDDRC_BAND_MARGIN_0 -90 0x0035 //RX_FDDRC_BAND_MARGIN_1 -91 0x00D5 //RX_FDDRC_BAND_MARGIN_2 -92 0x0120 //RX_FDDRC_BAND_MARGIN_3 -93 0x0004 //RX_FDDRC_BLOCK_EXP -94 0x5000 //RX_FDDRC_THRD_2_0 -95 0x5000 //RX_FDDRC_THRD_2_1 -96 0x2000 //RX_FDDRC_THRD_2_2 -97 0x5000 //RX_FDDRC_THRD_2_3 -98 0x6400 //RX_FDDRC_THRD_3_0 -99 0x6400 //RX_FDDRC_THRD_3_1 -100 0x2000 //RX_FDDRC_THRD_3_2 -101 0x5000 //RX_FDDRC_THRD_3_3 -102 0x4000 //RX_FDDRC_SLANT_0_0 -103 0x4000 //RX_FDDRC_SLANT_0_1 -104 0x4000 //RX_FDDRC_SLANT_0_2 -105 0x4000 //RX_FDDRC_SLANT_0_3 -106 0x7FFF //RX_FDDRC_SLANT_1_0 -107 0x7FFF //RX_FDDRC_SLANT_1_1 -108 0x7FFF //RX_FDDRC_SLANT_1_2 -109 0x7FFF //RX_FDDRC_SLANT_1_3 -110 0x0000 //RX_FDDRC_RESRV_0 -129 0x0023 //RX_SPK_VOL -130 0x0000 //RX_VOL_RESRV_0 -#VOL 2 -6 0x6000 //RX_TDDRC_ALPHA_UP_1 -7 0x6000 //RX_TDDRC_ALPHA_UP_2 -8 0x6000 //RX_TDDRC_ALPHA_UP_3 -9 0x1000 //RX_TDDRC_ALPHA_UP_4 -27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 -28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 -29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 -32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 -33 0x7214 //RX_TDDRC_LIMITER_THRD -34 0x0800 //RX_TDDRC_LIMITER_GAIN -112 0x0002 //RX_TDDRC_THRD_0 -113 0x0004 //RX_TDDRC_THRD_1 -114 0x1A00 //RX_TDDRC_THRD_2 -115 0x1A00 //RX_TDDRC_THRD_3 -116 0x7EB8 //RX_TDDRC_SLANT_0 -117 0x2500 //RX_TDDRC_SLANT_1 -118 0x6000 //RX_TDDRC_ALPHA_UP_0 -119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 -120 0x0000 //RX_TDDRC_HMNC_FLAG -121 0x199A //RX_TDDRC_HMNC_GAIN -122 0x0001 //RX_TDDRC_SMT_FLAG -123 0x0CCD //RX_TDDRC_SMT_W -124 0x04BC //RX_TDDRC_DRC_GAIN -38 0x0020 //RX_FDEQ_SUBNUM -39 0x484E //RX_FDEQ_GAIN_0 -40 0x4E4E //RX_FDEQ_GAIN_1 -41 0x4E4E //RX_FDEQ_GAIN_2 -42 0x4848 //RX_FDEQ_GAIN_3 -43 0x484E //RX_FDEQ_GAIN_4 -44 0x6E4E //RX_FDEQ_GAIN_5 -45 0x4850 //RX_FDEQ_GAIN_6 -46 0x4848 //RX_FDEQ_GAIN_7 -47 0x4860 //RX_FDEQ_GAIN_8 -48 0x7468 //RX_FDEQ_GAIN_9 -49 0x6060 //RX_FDEQ_GAIN_10 -50 0x6666 //RX_FDEQ_GAIN_11 -51 0x6666 //RX_FDEQ_GAIN_12 -52 0x6666 //RX_FDEQ_GAIN_13 -53 0x6060 //RX_FDEQ_GAIN_14 -54 0x6060 //RX_FDEQ_GAIN_15 -55 0x4848 //RX_FDEQ_GAIN_16 -56 0x4848 //RX_FDEQ_GAIN_17 -57 0x4848 //RX_FDEQ_GAIN_18 -58 0x4848 //RX_FDEQ_GAIN_19 -59 0x4848 //RX_FDEQ_GAIN_20 -60 0x4848 //RX_FDEQ_GAIN_21 -61 0x4848 //RX_FDEQ_GAIN_22 -62 0x4848 //RX_FDEQ_GAIN_23 -63 0x0202 //RX_FDEQ_BIN_0 -64 0x0203 //RX_FDEQ_BIN_1 -65 0x0303 //RX_FDEQ_BIN_2 -66 0x0304 //RX_FDEQ_BIN_3 -67 0x0404 //RX_FDEQ_BIN_4 -68 0x0209 //RX_FDEQ_BIN_5 -69 0x0808 //RX_FDEQ_BIN_6 -70 0x090A //RX_FDEQ_BIN_7 -71 0x0B0C //RX_FDEQ_BIN_8 -72 0x0D0E //RX_FDEQ_BIN_9 -73 0x1013 //RX_FDEQ_BIN_10 -74 0x1719 //RX_FDEQ_BIN_11 -75 0x1B1E //RX_FDEQ_BIN_12 -76 0x1E1E //RX_FDEQ_BIN_13 -77 0x1E28 //RX_FDEQ_BIN_14 -78 0x282C //RX_FDEQ_BIN_15 -79 0x0000 //RX_FDEQ_BIN_16 -80 0x0000 //RX_FDEQ_BIN_17 -81 0x0000 //RX_FDEQ_BIN_18 -82 0x0000 //RX_FDEQ_BIN_19 -83 0x0000 //RX_FDEQ_BIN_20 -84 0x0000 //RX_FDEQ_BIN_21 -85 0x0000 //RX_FDEQ_BIN_22 -86 0x0000 //RX_FDEQ_BIN_23 -87 0x4000 //RX_FDEQ_RESRV_0 -88 0x0320 //RX_FDEQ_RESRV_1 -89 0x0018 //RX_FDDRC_BAND_MARGIN_0 -90 0x0035 //RX_FDDRC_BAND_MARGIN_1 -91 0x00D5 //RX_FDDRC_BAND_MARGIN_2 -92 0x0120 //RX_FDDRC_BAND_MARGIN_3 -93 0x0004 //RX_FDDRC_BLOCK_EXP -94 0x5000 //RX_FDDRC_THRD_2_0 -95 0x5000 //RX_FDDRC_THRD_2_1 -96 0x2000 //RX_FDDRC_THRD_2_2 -97 0x5000 //RX_FDDRC_THRD_2_3 -98 0x6400 //RX_FDDRC_THRD_3_0 -99 0x6400 //RX_FDDRC_THRD_3_1 -100 0x2000 //RX_FDDRC_THRD_3_2 -101 0x5000 //RX_FDDRC_THRD_3_3 -102 0x4000 //RX_FDDRC_SLANT_0_0 -103 0x4000 //RX_FDDRC_SLANT_0_1 -104 0x4000 //RX_FDDRC_SLANT_0_2 -105 0x4000 //RX_FDDRC_SLANT_0_3 -106 0x7FFF //RX_FDDRC_SLANT_1_0 -107 0x7FFF //RX_FDDRC_SLANT_1_1 -108 0x7FFF //RX_FDDRC_SLANT_1_2 -109 0x7FFF //RX_FDDRC_SLANT_1_3 -110 0x0000 //RX_FDDRC_RESRV_0 -129 0x0032 //RX_SPK_VOL -130 0x0000 //RX_VOL_RESRV_0 -#VOL 3 -6 0x6000 //RX_TDDRC_ALPHA_UP_1 -7 0x6000 //RX_TDDRC_ALPHA_UP_2 -8 0x6000 //RX_TDDRC_ALPHA_UP_3 -9 0x1000 //RX_TDDRC_ALPHA_UP_4 -27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 -28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 -29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 -32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 -33 0x7214 //RX_TDDRC_LIMITER_THRD -34 0x0800 //RX_TDDRC_LIMITER_GAIN -112 0x0002 //RX_TDDRC_THRD_0 -113 0x0004 //RX_TDDRC_THRD_1 -114 0x1A00 //RX_TDDRC_THRD_2 -115 0x1A00 //RX_TDDRC_THRD_3 -116 0x7EB8 //RX_TDDRC_SLANT_0 -117 0x2500 //RX_TDDRC_SLANT_1 -118 0x6000 //RX_TDDRC_ALPHA_UP_0 -119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 -120 0x0000 //RX_TDDRC_HMNC_FLAG -121 0x199A //RX_TDDRC_HMNC_GAIN -122 0x0001 //RX_TDDRC_SMT_FLAG -123 0x0CCD //RX_TDDRC_SMT_W -124 0x04BC //RX_TDDRC_DRC_GAIN -38 0x0020 //RX_FDEQ_SUBNUM -39 0x484E //RX_FDEQ_GAIN_0 -40 0x4E4E //RX_FDEQ_GAIN_1 -41 0x4E4E //RX_FDEQ_GAIN_2 -42 0x4848 //RX_FDEQ_GAIN_3 -43 0x484E //RX_FDEQ_GAIN_4 -44 0x6E4E //RX_FDEQ_GAIN_5 -45 0x4850 //RX_FDEQ_GAIN_6 -46 0x4848 //RX_FDEQ_GAIN_7 -47 0x4860 //RX_FDEQ_GAIN_8 -48 0x7468 //RX_FDEQ_GAIN_9 -49 0x6060 //RX_FDEQ_GAIN_10 -50 0x6666 //RX_FDEQ_GAIN_11 -51 0x6666 //RX_FDEQ_GAIN_12 -52 0x6666 //RX_FDEQ_GAIN_13 -53 0x6060 //RX_FDEQ_GAIN_14 -54 0x6060 //RX_FDEQ_GAIN_15 -55 0x4848 //RX_FDEQ_GAIN_16 -56 0x4848 //RX_FDEQ_GAIN_17 -57 0x4848 //RX_FDEQ_GAIN_18 -58 0x4848 //RX_FDEQ_GAIN_19 -59 0x4848 //RX_FDEQ_GAIN_20 -60 0x4848 //RX_FDEQ_GAIN_21 -61 0x4848 //RX_FDEQ_GAIN_22 -62 0x4848 //RX_FDEQ_GAIN_23 -63 0x0202 //RX_FDEQ_BIN_0 -64 0x0203 //RX_FDEQ_BIN_1 -65 0x0303 //RX_FDEQ_BIN_2 -66 0x0304 //RX_FDEQ_BIN_3 -67 0x0404 //RX_FDEQ_BIN_4 -68 0x0209 //RX_FDEQ_BIN_5 -69 0x0808 //RX_FDEQ_BIN_6 -70 0x090A //RX_FDEQ_BIN_7 -71 0x0B0C //RX_FDEQ_BIN_8 -72 0x0D0E //RX_FDEQ_BIN_9 -73 0x1013 //RX_FDEQ_BIN_10 -74 0x1719 //RX_FDEQ_BIN_11 -75 0x1B1E //RX_FDEQ_BIN_12 -76 0x1E1E //RX_FDEQ_BIN_13 -77 0x1E28 //RX_FDEQ_BIN_14 -78 0x282C //RX_FDEQ_BIN_15 -79 0x0000 //RX_FDEQ_BIN_16 -80 0x0000 //RX_FDEQ_BIN_17 -81 0x0000 //RX_FDEQ_BIN_18 -82 0x0000 //RX_FDEQ_BIN_19 -83 0x0000 //RX_FDEQ_BIN_20 -84 0x0000 //RX_FDEQ_BIN_21 -85 0x0000 //RX_FDEQ_BIN_22 -86 0x0000 //RX_FDEQ_BIN_23 -87 0x4000 //RX_FDEQ_RESRV_0 -88 0x0320 //RX_FDEQ_RESRV_1 -89 0x0018 //RX_FDDRC_BAND_MARGIN_0 -90 0x0035 //RX_FDDRC_BAND_MARGIN_1 -91 0x00D5 //RX_FDDRC_BAND_MARGIN_2 -92 0x0120 //RX_FDDRC_BAND_MARGIN_3 -93 0x0004 //RX_FDDRC_BLOCK_EXP -94 0x5000 //RX_FDDRC_THRD_2_0 -95 0x5000 //RX_FDDRC_THRD_2_1 -96 0x2000 //RX_FDDRC_THRD_2_2 -97 0x5000 //RX_FDDRC_THRD_2_3 -98 0x6400 //RX_FDDRC_THRD_3_0 -99 0x6400 //RX_FDDRC_THRD_3_1 -100 0x2000 //RX_FDDRC_THRD_3_2 -101 0x5000 //RX_FDDRC_THRD_3_3 -102 0x4000 //RX_FDDRC_SLANT_0_0 -103 0x4000 //RX_FDDRC_SLANT_0_1 -104 0x4000 //RX_FDDRC_SLANT_0_2 -105 0x4000 //RX_FDDRC_SLANT_0_3 -106 0x7FFF //RX_FDDRC_SLANT_1_0 -107 0x7FFF //RX_FDDRC_SLANT_1_1 -108 0x7FFF //RX_FDDRC_SLANT_1_2 -109 0x7FFF //RX_FDDRC_SLANT_1_3 -110 0x0000 //RX_FDDRC_RESRV_0 -129 0x0048 //RX_SPK_VOL -130 0x0000 //RX_VOL_RESRV_0 -#VOL 4 -6 0x6000 //RX_TDDRC_ALPHA_UP_1 -7 0x6000 //RX_TDDRC_ALPHA_UP_2 -8 0x6000 //RX_TDDRC_ALPHA_UP_3 -9 0x1000 //RX_TDDRC_ALPHA_UP_4 -27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 -28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 -29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 -32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 -33 0x7214 //RX_TDDRC_LIMITER_THRD -34 0x0800 //RX_TDDRC_LIMITER_GAIN -112 0x0002 //RX_TDDRC_THRD_0 -113 0x0004 //RX_TDDRC_THRD_1 -114 0x1A00 //RX_TDDRC_THRD_2 -115 0x1A00 //RX_TDDRC_THRD_3 -116 0x7EB8 //RX_TDDRC_SLANT_0 -117 0x2500 //RX_TDDRC_SLANT_1 -118 0x6000 //RX_TDDRC_ALPHA_UP_0 -119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 -120 0x0000 //RX_TDDRC_HMNC_FLAG -121 0x199A //RX_TDDRC_HMNC_GAIN -122 0x0001 //RX_TDDRC_SMT_FLAG -123 0x0CCD //RX_TDDRC_SMT_W -124 0x04BC //RX_TDDRC_DRC_GAIN -38 0x0020 //RX_FDEQ_SUBNUM -39 0x484E //RX_FDEQ_GAIN_0 -40 0x4E4E //RX_FDEQ_GAIN_1 -41 0x4E4E //RX_FDEQ_GAIN_2 -42 0x4848 //RX_FDEQ_GAIN_3 -43 0x484E //RX_FDEQ_GAIN_4 -44 0x6E4E //RX_FDEQ_GAIN_5 -45 0x4850 //RX_FDEQ_GAIN_6 -46 0x4848 //RX_FDEQ_GAIN_7 -47 0x4860 //RX_FDEQ_GAIN_8 -48 0x7468 //RX_FDEQ_GAIN_9 -49 0x6060 //RX_FDEQ_GAIN_10 -50 0x6666 //RX_FDEQ_GAIN_11 -51 0x6666 //RX_FDEQ_GAIN_12 -52 0x6666 //RX_FDEQ_GAIN_13 -53 0x6060 //RX_FDEQ_GAIN_14 -54 0x6060 //RX_FDEQ_GAIN_15 -55 0x4848 //RX_FDEQ_GAIN_16 -56 0x4848 //RX_FDEQ_GAIN_17 -57 0x4848 //RX_FDEQ_GAIN_18 -58 0x4848 //RX_FDEQ_GAIN_19 -59 0x4848 //RX_FDEQ_GAIN_20 -60 0x4848 //RX_FDEQ_GAIN_21 -61 0x4848 //RX_FDEQ_GAIN_22 -62 0x4848 //RX_FDEQ_GAIN_23 -63 0x0202 //RX_FDEQ_BIN_0 -64 0x0203 //RX_FDEQ_BIN_1 -65 0x0303 //RX_FDEQ_BIN_2 -66 0x0304 //RX_FDEQ_BIN_3 -67 0x0404 //RX_FDEQ_BIN_4 -68 0x0209 //RX_FDEQ_BIN_5 -69 0x0808 //RX_FDEQ_BIN_6 -70 0x090A //RX_FDEQ_BIN_7 -71 0x0B0C //RX_FDEQ_BIN_8 -72 0x0D0E //RX_FDEQ_BIN_9 -73 0x1013 //RX_FDEQ_BIN_10 -74 0x1719 //RX_FDEQ_BIN_11 -75 0x1B1E //RX_FDEQ_BIN_12 -76 0x1E1E //RX_FDEQ_BIN_13 -77 0x1E28 //RX_FDEQ_BIN_14 -78 0x282C //RX_FDEQ_BIN_15 -79 0x0000 //RX_FDEQ_BIN_16 -80 0x0000 //RX_FDEQ_BIN_17 -81 0x0000 //RX_FDEQ_BIN_18 -82 0x0000 //RX_FDEQ_BIN_19 -83 0x0000 //RX_FDEQ_BIN_20 -84 0x0000 //RX_FDEQ_BIN_21 -85 0x0000 //RX_FDEQ_BIN_22 -86 0x0000 //RX_FDEQ_BIN_23 -87 0x4000 //RX_FDEQ_RESRV_0 -88 0x0320 //RX_FDEQ_RESRV_1 -89 0x0018 //RX_FDDRC_BAND_MARGIN_0 -90 0x0035 //RX_FDDRC_BAND_MARGIN_1 -91 0x00D5 //RX_FDDRC_BAND_MARGIN_2 -92 0x0120 //RX_FDDRC_BAND_MARGIN_3 -93 0x0004 //RX_FDDRC_BLOCK_EXP -94 0x5000 //RX_FDDRC_THRD_2_0 -95 0x5000 //RX_FDDRC_THRD_2_1 -96 0x2000 //RX_FDDRC_THRD_2_2 -97 0x5000 //RX_FDDRC_THRD_2_3 -98 0x6400 //RX_FDDRC_THRD_3_0 -99 0x6400 //RX_FDDRC_THRD_3_1 -100 0x2000 //RX_FDDRC_THRD_3_2 -101 0x5000 //RX_FDDRC_THRD_3_3 -102 0x4000 //RX_FDDRC_SLANT_0_0 -103 0x4000 //RX_FDDRC_SLANT_0_1 -104 0x4000 //RX_FDDRC_SLANT_0_2 -105 0x4000 //RX_FDDRC_SLANT_0_3 -106 0x7FFF //RX_FDDRC_SLANT_1_0 -107 0x7FFF //RX_FDDRC_SLANT_1_1 -108 0x7FFF //RX_FDDRC_SLANT_1_2 -109 0x7FFF //RX_FDDRC_SLANT_1_3 -110 0x0000 //RX_FDDRC_RESRV_0 -129 0x0068 //RX_SPK_VOL -130 0x0000 //RX_VOL_RESRV_0 -#VOL 5 -6 0x6000 //RX_TDDRC_ALPHA_UP_1 -7 0x6000 //RX_TDDRC_ALPHA_UP_2 -8 0x6000 //RX_TDDRC_ALPHA_UP_3 -9 0x1000 //RX_TDDRC_ALPHA_UP_4 -27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 -28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 -29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 -32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 -33 0x7214 //RX_TDDRC_LIMITER_THRD -34 0x0800 //RX_TDDRC_LIMITER_GAIN -112 0x0002 //RX_TDDRC_THRD_0 -113 0x0004 //RX_TDDRC_THRD_1 -114 0x1A00 //RX_TDDRC_THRD_2 -115 0x1A00 //RX_TDDRC_THRD_3 -116 0x7EB8 //RX_TDDRC_SLANT_0 -117 0x2500 //RX_TDDRC_SLANT_1 -118 0x6000 //RX_TDDRC_ALPHA_UP_0 -119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 -120 0x0000 //RX_TDDRC_HMNC_FLAG -121 0x199A //RX_TDDRC_HMNC_GAIN -122 0x0001 //RX_TDDRC_SMT_FLAG -123 0x0CCD //RX_TDDRC_SMT_W -124 0x04BC //RX_TDDRC_DRC_GAIN -38 0x0020 //RX_FDEQ_SUBNUM -39 0x484E //RX_FDEQ_GAIN_0 -40 0x4E4E //RX_FDEQ_GAIN_1 -41 0x4E4E //RX_FDEQ_GAIN_2 -42 0x4848 //RX_FDEQ_GAIN_3 -43 0x484E //RX_FDEQ_GAIN_4 -44 0x6E4E //RX_FDEQ_GAIN_5 -45 0x4850 //RX_FDEQ_GAIN_6 -46 0x4848 //RX_FDEQ_GAIN_7 -47 0x4860 //RX_FDEQ_GAIN_8 -48 0x7468 //RX_FDEQ_GAIN_9 -49 0x6060 //RX_FDEQ_GAIN_10 -50 0x6666 //RX_FDEQ_GAIN_11 -51 0x6666 //RX_FDEQ_GAIN_12 -52 0x6666 //RX_FDEQ_GAIN_13 -53 0x6060 //RX_FDEQ_GAIN_14 -54 0x6060 //RX_FDEQ_GAIN_15 -55 0x4848 //RX_FDEQ_GAIN_16 -56 0x4848 //RX_FDEQ_GAIN_17 -57 0x4848 //RX_FDEQ_GAIN_18 -58 0x4848 //RX_FDEQ_GAIN_19 -59 0x4848 //RX_FDEQ_GAIN_20 -60 0x4848 //RX_FDEQ_GAIN_21 -61 0x4848 //RX_FDEQ_GAIN_22 -62 0x4848 //RX_FDEQ_GAIN_23 -63 0x0202 //RX_FDEQ_BIN_0 -64 0x0203 //RX_FDEQ_BIN_1 -65 0x0303 //RX_FDEQ_BIN_2 -66 0x0304 //RX_FDEQ_BIN_3 -67 0x0404 //RX_FDEQ_BIN_4 -68 0x0209 //RX_FDEQ_BIN_5 -69 0x0808 //RX_FDEQ_BIN_6 -70 0x090A //RX_FDEQ_BIN_7 -71 0x0B0C //RX_FDEQ_BIN_8 -72 0x0D0E //RX_FDEQ_BIN_9 -73 0x1013 //RX_FDEQ_BIN_10 -74 0x1719 //RX_FDEQ_BIN_11 -75 0x1B1E //RX_FDEQ_BIN_12 -76 0x1E1E //RX_FDEQ_BIN_13 -77 0x1E28 //RX_FDEQ_BIN_14 -78 0x282C //RX_FDEQ_BIN_15 -79 0x0000 //RX_FDEQ_BIN_16 -80 0x0000 //RX_FDEQ_BIN_17 -81 0x0000 //RX_FDEQ_BIN_18 -82 0x0000 //RX_FDEQ_BIN_19 -83 0x0000 //RX_FDEQ_BIN_20 -84 0x0000 //RX_FDEQ_BIN_21 -85 0x0000 //RX_FDEQ_BIN_22 -86 0x0000 //RX_FDEQ_BIN_23 -87 0x4000 //RX_FDEQ_RESRV_0 -88 0x0320 //RX_FDEQ_RESRV_1 -89 0x0018 //RX_FDDRC_BAND_MARGIN_0 -90 0x0035 //RX_FDDRC_BAND_MARGIN_1 -91 0x00D5 //RX_FDDRC_BAND_MARGIN_2 -92 0x0120 //RX_FDDRC_BAND_MARGIN_3 -93 0x0004 //RX_FDDRC_BLOCK_EXP -94 0x5000 //RX_FDDRC_THRD_2_0 -95 0x5000 //RX_FDDRC_THRD_2_1 -96 0x2000 //RX_FDDRC_THRD_2_2 -97 0x5000 //RX_FDDRC_THRD_2_3 -98 0x6400 //RX_FDDRC_THRD_3_0 -99 0x6400 //RX_FDDRC_THRD_3_1 -100 0x2000 //RX_FDDRC_THRD_3_2 -101 0x5000 //RX_FDDRC_THRD_3_3 -102 0x4000 //RX_FDDRC_SLANT_0_0 -103 0x4000 //RX_FDDRC_SLANT_0_1 -104 0x4000 //RX_FDDRC_SLANT_0_2 -105 0x4000 //RX_FDDRC_SLANT_0_3 -106 0x7FFF //RX_FDDRC_SLANT_1_0 -107 0x7FFF //RX_FDDRC_SLANT_1_1 -108 0x7FFF //RX_FDDRC_SLANT_1_2 -109 0x7FFF //RX_FDDRC_SLANT_1_3 -110 0x0000 //RX_FDDRC_RESRV_0 -129 0x0097 //RX_SPK_VOL -130 0x0000 //RX_VOL_RESRV_0 -#VOL 6 -6 0x6000 //RX_TDDRC_ALPHA_UP_1 -7 0x6000 //RX_TDDRC_ALPHA_UP_2 -8 0x6000 //RX_TDDRC_ALPHA_UP_3 -9 0x1000 //RX_TDDRC_ALPHA_UP_4 -27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 -28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 -29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 -32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 -33 0x7214 //RX_TDDRC_LIMITER_THRD -34 0x0800 //RX_TDDRC_LIMITER_GAIN -112 0x0002 //RX_TDDRC_THRD_0 -113 0x0004 //RX_TDDRC_THRD_1 -114 0x1A00 //RX_TDDRC_THRD_2 -115 0x1A00 //RX_TDDRC_THRD_3 -116 0x7EB8 //RX_TDDRC_SLANT_0 -117 0x2500 //RX_TDDRC_SLANT_1 -118 0x6000 //RX_TDDRC_ALPHA_UP_0 -119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 -120 0x0000 //RX_TDDRC_HMNC_FLAG -121 0x199A //RX_TDDRC_HMNC_GAIN -122 0x0001 //RX_TDDRC_SMT_FLAG -123 0x0CCD //RX_TDDRC_SMT_W -124 0x04BC //RX_TDDRC_DRC_GAIN -38 0x0020 //RX_FDEQ_SUBNUM -39 0x484E //RX_FDEQ_GAIN_0 -40 0x4E4E //RX_FDEQ_GAIN_1 -41 0x4E4E //RX_FDEQ_GAIN_2 -42 0x4848 //RX_FDEQ_GAIN_3 -43 0x484E //RX_FDEQ_GAIN_4 -44 0x6E4E //RX_FDEQ_GAIN_5 -45 0x4850 //RX_FDEQ_GAIN_6 -46 0x4848 //RX_FDEQ_GAIN_7 -47 0x4860 //RX_FDEQ_GAIN_8 -48 0x7468 //RX_FDEQ_GAIN_9 -49 0x6060 //RX_FDEQ_GAIN_10 -50 0x6666 //RX_FDEQ_GAIN_11 -51 0x6666 //RX_FDEQ_GAIN_12 -52 0x6666 //RX_FDEQ_GAIN_13 -53 0x6060 //RX_FDEQ_GAIN_14 -54 0x6060 //RX_FDEQ_GAIN_15 -55 0x4848 //RX_FDEQ_GAIN_16 -56 0x4848 //RX_FDEQ_GAIN_17 -57 0x4848 //RX_FDEQ_GAIN_18 -58 0x4848 //RX_FDEQ_GAIN_19 -59 0x4848 //RX_FDEQ_GAIN_20 -60 0x4848 //RX_FDEQ_GAIN_21 -61 0x4848 //RX_FDEQ_GAIN_22 -62 0x4848 //RX_FDEQ_GAIN_23 -63 0x0202 //RX_FDEQ_BIN_0 -64 0x0203 //RX_FDEQ_BIN_1 -65 0x0303 //RX_FDEQ_BIN_2 -66 0x0304 //RX_FDEQ_BIN_3 -67 0x0404 //RX_FDEQ_BIN_4 -68 0x0209 //RX_FDEQ_BIN_5 -69 0x0808 //RX_FDEQ_BIN_6 -70 0x090A //RX_FDEQ_BIN_7 -71 0x0B0C //RX_FDEQ_BIN_8 -72 0x0D0E //RX_FDEQ_BIN_9 -73 0x1013 //RX_FDEQ_BIN_10 -74 0x1719 //RX_FDEQ_BIN_11 -75 0x1B1E //RX_FDEQ_BIN_12 -76 0x1E1E //RX_FDEQ_BIN_13 -77 0x1E28 //RX_FDEQ_BIN_14 -78 0x282C //RX_FDEQ_BIN_15 -79 0x0000 //RX_FDEQ_BIN_16 -80 0x0000 //RX_FDEQ_BIN_17 -81 0x0000 //RX_FDEQ_BIN_18 -82 0x0000 //RX_FDEQ_BIN_19 -83 0x0000 //RX_FDEQ_BIN_20 -84 0x0000 //RX_FDEQ_BIN_21 -85 0x0000 //RX_FDEQ_BIN_22 -86 0x0000 //RX_FDEQ_BIN_23 -87 0x4000 //RX_FDEQ_RESRV_0 -88 0x0320 //RX_FDEQ_RESRV_1 -89 0x0018 //RX_FDDRC_BAND_MARGIN_0 -90 0x0035 //RX_FDDRC_BAND_MARGIN_1 -91 0x00D5 //RX_FDDRC_BAND_MARGIN_2 -92 0x0120 //RX_FDDRC_BAND_MARGIN_3 -93 0x0004 //RX_FDDRC_BLOCK_EXP -94 0x5000 //RX_FDDRC_THRD_2_0 -95 0x5000 //RX_FDDRC_THRD_2_1 -96 0x2000 //RX_FDDRC_THRD_2_2 -97 0x5000 //RX_FDDRC_THRD_2_3 -98 0x6400 //RX_FDDRC_THRD_3_0 -99 0x6400 //RX_FDDRC_THRD_3_1 -100 0x2000 //RX_FDDRC_THRD_3_2 -101 0x5000 //RX_FDDRC_THRD_3_3 -102 0x4000 //RX_FDDRC_SLANT_0_0 -103 0x4000 //RX_FDDRC_SLANT_0_1 -104 0x4000 //RX_FDDRC_SLANT_0_2 -105 0x4000 //RX_FDDRC_SLANT_0_3 -106 0x7FFF //RX_FDDRC_SLANT_1_0 -107 0x7FFF //RX_FDDRC_SLANT_1_1 -108 0x7FFF //RX_FDDRC_SLANT_1_2 -109 0x7FFF //RX_FDDRC_SLANT_1_3 -110 0x0000 //RX_FDDRC_RESRV_0 -129 0x0100 //RX_SPK_VOL -130 0x0000 //RX_VOL_RESRV_0 +#SINGLE_API_VER 1.2.0 +#SAVE_TIME 2022-02-24 08:39:37 #CASE_NAME HANDSFREE-HANDSFREE-VOICE_GENERIC-FB -#PARAM_TYPE TX+RX -#TOTAL_CUSTOM_STEP 7 +#PARAM_MODE FULL +#PARAM_TYPE TX+2RX +#TOTAL_CUSTOM_STEP 7+7 #TX 0 0x0001 //TX_OPERATION_MODE_0 1 0x0001 //TX_OPERATION_MODE_1 @@ -10776,11 +259,11 @@ 248 0xF800 //TX_THR_SN_EST_6 249 0xF800 //TX_THR_SN_EST_7 250 0x0100 //TX_DELTA_THR_SN_EST_0 -251 0x0200 //TX_DELTA_THR_SN_EST_1 -252 0x0100 //TX_DELTA_THR_SN_EST_2 -253 0x0200 //TX_DELTA_THR_SN_EST_3 +251 0x0100 //TX_DELTA_THR_SN_EST_1 +252 0x0200 //TX_DELTA_THR_SN_EST_2 +253 0x0100 //TX_DELTA_THR_SN_EST_3 254 0x0100 //TX_DELTA_THR_SN_EST_4 -255 0x0100 //TX_DELTA_THR_SN_EST_5 +255 0x0200 //TX_DELTA_THR_SN_EST_5 256 0x0200 //TX_DELTA_THR_SN_EST_6 257 0x0200 //TX_DELTA_THR_SN_EST_7 258 0x4000 //TX_LAMBDA_NN_EST_0 @@ -10808,11 +291,11 @@ 280 0x1000 //TX_B_POST_FLT_1 281 0x0010 //TX_NS_LVL_CTRL_0 282 0x0014 //TX_NS_LVL_CTRL_1 -283 0x0014 //TX_NS_LVL_CTRL_2 -284 0x0018 //TX_NS_LVL_CTRL_3 -285 0x0016 //TX_NS_LVL_CTRL_4 -286 0x0014 //TX_NS_LVL_CTRL_5 -287 0x0011 //TX_NS_LVL_CTRL_6 +283 0x0018 //TX_NS_LVL_CTRL_2 +284 0x0016 //TX_NS_LVL_CTRL_3 +285 0x0014 //TX_NS_LVL_CTRL_4 +286 0x0011 //TX_NS_LVL_CTRL_5 +287 0x0014 //TX_NS_LVL_CTRL_6 288 0x0011 //TX_NS_LVL_CTRL_7 289 0x000F //TX_MIN_GAIN_S_0 290 0x0010 //TX_MIN_GAIN_S_1 @@ -10830,8 +313,8 @@ 302 0x4000 //TX_SNRI_SUP_2 303 0x4000 //TX_SNRI_SUP_3 304 0x4000 //TX_SNRI_SUP_4 -305 0x4000 //TX_SNRI_SUP_5 -306 0x50C0 //TX_SNRI_SUP_6 +305 0x50C0 //TX_SNRI_SUP_5 +306 0x4000 //TX_SNRI_SUP_6 307 0x7FFF //TX_SNRI_SUP_7 308 0x7FFF //TX_THR_LFNS 309 0x0018 //TX_G_LFNS @@ -10840,19 +323,19 @@ 312 0x7FFF //TX_A_POST_FILT_0 313 0x2000 //TX_A_POST_FILT_1 314 0x5000 //TX_A_POST_FILT_S_0 -315 0x6000 //TX_A_POST_FILT_S_1 -316 0x4C00 //TX_A_POST_FILT_S_2 -317 0x4000 //TX_A_POST_FILT_S_3 -318 0x6000 //TX_A_POST_FILT_S_4 -319 0x4000 //TX_A_POST_FILT_S_5 -320 0x5000 //TX_A_POST_FILT_S_6 +315 0x4C00 //TX_A_POST_FILT_S_1 +316 0x4000 //TX_A_POST_FILT_S_2 +317 0x6000 //TX_A_POST_FILT_S_3 +318 0x4000 //TX_A_POST_FILT_S_4 +319 0x5000 //TX_A_POST_FILT_S_5 +320 0x6000 //TX_A_POST_FILT_S_6 321 0x7000 //TX_A_POST_FILT_S_7 322 0x2000 //TX_B_POST_FILT_0 -323 0x1000 //TX_B_POST_FILT_1 +323 0x2000 //TX_B_POST_FILT_1 324 0x2000 //TX_B_POST_FILT_2 -325 0x2000 //TX_B_POST_FILT_3 +325 0x4000 //TX_B_POST_FILT_3 326 0x4000 //TX_B_POST_FILT_4 -327 0x4000 //TX_B_POST_FILT_5 +327 0x1000 //TX_B_POST_FILT_5 328 0x1000 //TX_B_POST_FILT_6 329 0x2000 //TX_B_POST_FILT_7 330 0x4000 //TX_B_LESSCUT_RTO_S_0 @@ -10860,14 +343,14 @@ 332 0x7FFF //TX_B_LESSCUT_RTO_S_2 333 0x7FFF //TX_B_LESSCUT_RTO_S_3 334 0x7FFF //TX_B_LESSCUT_RTO_S_4 -335 0x7FFF //TX_B_LESSCUT_RTO_S_5 -336 0x6000 //TX_B_LESSCUT_RTO_S_6 +335 0x6000 //TX_B_LESSCUT_RTO_S_5 +336 0x7FFF //TX_B_LESSCUT_RTO_S_6 337 0x7FFF //TX_B_LESSCUT_RTO_S_7 338 0x7C00 //TX_LAMBDA_PFILT 339 0x7C00 //TX_LAMBDA_PFILT_S_0 340 0x7C00 //TX_LAMBDA_PFILT_S_1 -341 0x7C00 //TX_LAMBDA_PFILT_S_2 -342 0x7A00 //TX_LAMBDA_PFILT_S_3 +341 0x7A00 //TX_LAMBDA_PFILT_S_2 +342 0x7C00 //TX_LAMBDA_PFILT_S_3 343 0x7C00 //TX_LAMBDA_PFILT_S_4 344 0x7C00 //TX_LAMBDA_PFILT_S_5 345 0x7C00 //TX_LAMBDA_PFILT_S_6 @@ -10905,10 +388,10 @@ 377 0x7FFF //TX_NOISE_TH_5_4 378 0x2710 //TX_NOISE_TH_6 379 0x0033 //TX_MINENOISE_TH -380 0x4000 //TX_MINENOISE_MIC0_TH_MTS -381 0xFFEE //TX_MINENOISE_MIC0_TH_EXP -382 0x6000 //TX_MINENOISE_MIC0_S_TH_MTS -383 0xFFF3 //TX_MINENOISE_MIC0_S_TH_EXP +380 0xD508 //TX_MORENS_TFMASK_TH +381 0x0001 //TX_DRC_QUIET_FLOOR +382 0x7999 //TX_RATIODTL_CUT_TH +383 0x0119 //TX_DT_CUT_K1 384 0x0666 //TX_OUT_ENER_S_TH_CLEAN 385 0x0666 //TX_OUT_ENER_S_TH_LESSCLEAN 386 0x0333 //TX_OUT_ENER_S_TH_NOISY @@ -10916,15 +399,15 @@ 388 0x0333 //TX_OUT_ENER_TH_SPEECH 389 0x2000 //TX_SN_NPB_GAIN 390 0x0000 //TX_NN_NPB_GAIN -391 0x0000 //TX_CSX_ALPHA_0 -392 0x0000 //TX_CSX_ALPHA_1 -393 0x0000 //TX_CSX_ALPHA_2 -394 0x0000 //TX_CSX_ALPHA_3 -395 0x0800 //TX_MU_ARSP_EST -396 0x00C8 //TX_P_OUTBEAM_MIN_TH +391 0x7FFF //TX_POST_MASK_SUP_HSNE +392 0x1388 //TX_TAIL_DET_TH +393 0x4000 //TX_B_LESSCUT_RTO_WTA +394 0x0000 //TX_MEL_G_R +395 0x0080 //TX_SUPHIGH_TH +396 0x0000 //TX_MASK_G_R 397 0x0002 //TX_EXTRA_NS_L -398 0x0800 //TX_EXTRA_NS_A -399 0x0005 //TX_VR_NOISE_FLOOR_TH +398 0x1800 //TX_C_POST_FLT_MASK +399 0x4000 //TX_A_POST_FLT_WNS 400 0x0148 //TX_MIN_G_LOW300HZ 401 0x0002 //TX_MAXLEVEL_CNG 402 0x00B4 //TX_STN_NOISE_TH @@ -11039,16 +522,16 @@ 511 0x6666 //TX_MIC_TO_BFGAIN 512 0x0000 //TX_MICTOBFGAIN0 513 0x0000 //TX_FASTMUE_TH -514 0x0000 //TX_DERVB_LEN_0 -515 0x0000 //TX_DERVB_LEN_1 -516 0x0000 //TX_RHO_DERVB -517 0x0000 //TX_MIC_INDX_DERVB -518 0x0000 //TX_MU_DERVB -519 0x0000 //TX_DR_RESRV_0 -520 0x0000 //TX_DR_RESRV_1 -521 0x0000 //TX_DR_RESRV_2 -522 0x0000 //TX_DR_RESRV_3 -523 0x0000 //TX_DR_RESRV_4 +514 0x3000 //TX_DEREVERB_LF_MU +515 0x34CD //TX_DEREVERB_HF_MU +516 0x0007 //TX_DEREVERB_DELAY +517 0x0004 //TX_DEREVERB_COEF_LEN +518 0x0003 //TX_DEREVERB_DNR +519 0x0000 //TX_DEREVERB_ALPHA +520 0x0000 //TX_DEREVERB_BETA +521 0x3A98 //TX_GSC_RTOL_TH +522 0x3A98 //TX_GSC_RTOH_TH +523 0x7E2C //TX_WIDE2_MEANHTH 524 0x0000 //TX_DR_RESRV_5 525 0x0000 //TX_DR_RESRV_6 526 0x0000 //TX_DR_RESRV_7 @@ -11422,6 +905,71 @@ 894 0xC000 //TX_FASTNS_SSA_THHFL 895 0xCCCC //TX_FASTNS_SSA_THLFH 896 0xD999 //TX_FASTNS_SSA_THHFH +897 0x2339 //TX_SENDFUNC_REG_MICMUTE +898 0x0021 //TX_SENDFUNC_REG_MICMUTE1 +899 0x02BC //TX_MICMUTE_RATIO_THR +900 0x0140 //TX_MICMUTE_AMP_THR +901 0x0004 //TX_MICMUTE_HPF_IND +902 0x00C0 //TX_MICMUTE_LOG_EYR_TH +903 0x0008 //TX_MICMUTE_CVG_TIME +904 0x0008 //TX_MICMUTE_RELEASE_TIME +905 0x01FE //TX_MIC_VOLUME_MIC0MUTE +906 0x0020 //TX_MICMUTE_EPD_OFFSET_0 +907 0x001E //TX_MICMUTE_FRQ_AEC_L +908 0x7999 //TX_MICMUTE_EAD_THR +909 0x7FFF //TX_MICMUTE_LAMBDA_CB_NLE +910 0x7FFF //TX_MICMUTE_LAMBDA_RE_EST +911 0x4000 //TX_DTD_THR1_MICMUTE_0 +912 0x7000 //TX_DTD_THR1_MICMUTE_1 +913 0x7FFF //TX_DTD_THR1_MICMUTE_2 +914 0x7FFF //TX_DTD_THR1_MICMUTE_3 +915 0x6CCC //TX_DTD_THR2_MICMUTE_0 +916 0x0400 //TX_MICMUTE_MIN_EQ_RE_EST_0 +917 0x0400 //TX_MICMUTE_MIN_EQ_RE_EST_1 +918 0x1000 //TX_MICMUTE_MIN_EQ_RE_EST_2 +919 0x7FFF //TX_MICMUTE_MIN_EQ_RE_EST_3 +920 0x7FFF //TX_MICMUTE_MIN_EQ_RE_EST_4 +921 0x4000 //TX_MICMUTE_C_POST_FLT +922 0x03E8 //TX_MICMUTE_DT_CUT_K +923 0x0001 //TX_MICMUTE_DT_CUT_THR +924 0x03E8 //TX_MICMUTE_DT_CUT_K2 +925 0x0001 //TX_MICMUTE_DT_CUT_THR2 +926 0x0064 //TX_MICMUTE_DT2_HOLD_N +927 0x1000 //TX_MICMUTE_RATIODTH_THCUT +928 0x1000 //TX_MICMUTE_B_POST_FLT_ECHOL +929 0x7FFF //TX_MICMUTE_B_POST_FLT_ECHOH +930 0x0400 //TX_MICMUTE_C_POST_FLT_MASK +931 0x7999 //TX_MICMUTE_RATIODTL_CUT_TH +932 0x0258 //TX_MICMUTE_DT_CUT_K1 +933 0x0800 //TX_MICMUTE_N2_SN_EST +934 0xFC00 //TX_MICMUTE_THR_SN_EST_0 +935 0x001C //TX_MICMUTE_MIN_G_CTRL_0 +936 0x6000 //TX_MICMUTE_A_POST_FILT_S_0 +937 0x7000 //TX_MICMUTE_B_POST_FILT_0 +938 0x2710 //TX_MIC1RUB_AMP_THR +939 0x0010 //TX_MIC1MUTE_RATIO_THR +940 0x0450 //TX_MIC1MUTE_AMP_THR +941 0x0008 //TX_MIC1MUTE_CVG_TIME +942 0x0008 //TX_MIC1MUTE_RELEASE_TIME +943 0x0000 //TX_AMS_RESRV_01 +944 0x0000 //TX_AMS_RESRV_02 +945 0x0000 //TX_AMS_RESRV_03 +946 0x0000 //TX_AMS_RESRV_04 +947 0x0000 //TX_AMS_RESRV_05 +948 0x0000 //TX_AMS_RESRV_06 +949 0x0000 //TX_AMS_RESRV_07 +950 0x0000 //TX_AMS_RESRV_08 +951 0x0000 //TX_AMS_RESRV_09 +952 0x0000 //TX_AMS_RESRV_10 +953 0x0000 //TX_AMS_RESRV_11 +954 0x0000 //TX_AMS_RESRV_12 +955 0x0000 //TX_AMS_RESRV_13 +956 0x0000 //TX_AMS_RESRV_14 +957 0x0000 //TX_AMS_RESRV_15 +958 0x0000 //TX_AMS_RESRV_16 +959 0x0000 //TX_AMS_RESRV_17 +960 0x0000 //TX_AMS_RESRV_18 +961 0x0000 //TX_AMS_RESRV_19 #RX 0 0x006C //RX_RECVFUNC_MODE_0 1 0x0000 //RX_RECVFUNC_MODE_1 @@ -12273,4 +1821,27555 @@ 110 0x0000 //RX_FDDRC_RESRV_0 129 0x0100 //RX_SPK_VOL 130 0x0000 //RX_VOL_RESRV_0 +#RX 2 +157 0x006C //RX_RECVFUNC_MODE_0 +158 0x0000 //RX_RECVFUNC_MODE_1 +159 0x0004 //RX_SAMPLINGFREQ_SIG +160 0x0004 //RX_SAMPLINGFREQ_PROC +161 0x000A //RX_FRAME_SZ +162 0x0000 //RX_DELAY_OPT +163 0x4000 //RX_TDDRC_ALPHA_UP_1 +164 0x4000 //RX_TDDRC_ALPHA_UP_2 +165 0x4000 //RX_TDDRC_ALPHA_UP_3 +166 0x4000 //RX_TDDRC_ALPHA_UP_4 +167 0x0800 //RX_PGA +168 0x7E56 //RX_A_HP +169 0x4000 //RX_B_PE +170 0x7800 //RX_THR_PITCH_DET_0 +171 0x7000 //RX_THR_PITCH_DET_1 +172 0x6000 //RX_THR_PITCH_DET_2 +173 0x0008 //RX_PITCH_BFR_LEN +174 0x0003 //RX_SBD_PITCH_DET +175 0x0100 //RX_PP_RESRV_0 +176 0x0020 //RX_PP_RESRV_1 +177 0x0400 //RX_N_SN_EST +178 0x000C //RX_N2_SN_EST +179 0x0014 //RX_NS_LVL_CTRL +180 0xF400 //RX_THR_SN_EST +181 0x7E00 //RX_LAMBDA_PFILT +182 0x000A //RX_FENS_RESRV_0 +183 0x0190 //RX_FENS_RESRV_1 +184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +187 0x0002 //RX_EXTRA_NS_L +188 0x0800 //RX_EXTRA_NS_A +189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +190 0x7FFF //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +192 0x199A //RX_A_POST_FLT +193 0x0000 //RX_LMT_THRD +194 0x4000 //RX_LMT_ALPHA +195 0x0020 //RX_FDEQ_SUBNUM +196 0x4848 //RX_FDEQ_GAIN_0 +197 0x4848 //RX_FDEQ_GAIN_1 +198 0x4848 //RX_FDEQ_GAIN_2 +199 0x4850 //RX_FDEQ_GAIN_3 +200 0x4848 //RX_FDEQ_GAIN_4 +201 0x4848 //RX_FDEQ_GAIN_5 +202 0x4568 //RX_FDEQ_GAIN_6 +203 0x485C //RX_FDEQ_GAIN_7 +204 0x5C60 //RX_FDEQ_GAIN_8 +205 0x685C //RX_FDEQ_GAIN_9 +206 0x5648 //RX_FDEQ_GAIN_10 +207 0x484C //RX_FDEQ_GAIN_11 +208 0x706C //RX_FDEQ_GAIN_12 +209 0x7070 //RX_FDEQ_GAIN_13 +210 0x6868 //RX_FDEQ_GAIN_14 +211 0x6060 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0202 //RX_FDEQ_BIN_0 +221 0x0203 //RX_FDEQ_BIN_1 +222 0x0303 //RX_FDEQ_BIN_2 +223 0x0402 //RX_FDEQ_BIN_3 +224 0x0504 //RX_FDEQ_BIN_4 +225 0x0209 //RX_FDEQ_BIN_5 +226 0x0808 //RX_FDEQ_BIN_6 +227 0x090A //RX_FDEQ_BIN_7 +228 0x0B0C //RX_FDEQ_BIN_8 +229 0x0D0E //RX_FDEQ_BIN_9 +230 0x1013 //RX_FDEQ_BIN_10 +231 0x1719 //RX_FDEQ_BIN_11 +232 0x1B1E //RX_FDEQ_BIN_12 +233 0x1E1E //RX_FDEQ_BIN_13 +234 0x1E28 //RX_FDEQ_BIN_14 +235 0x282C //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x4000 //RX_FDEQ_RESRV_0 +245 0x0320 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0030 //RX_FDDRC_BAND_MARGIN_1 +248 0x0050 //RX_FDDRC_BAND_MARGIN_2 +249 0x0080 //RX_FDDRC_BAND_MARGIN_3 +250 0x0004 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x2000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x2000 //RX_FDDRC_THRD_3_2 +258 0x5000 //RX_FDDRC_THRD_3_3 +259 0x4000 //RX_FDDRC_SLANT_0_0 +260 0x4000 //RX_FDDRC_SLANT_0_1 +261 0x4000 //RX_FDDRC_SLANT_0_2 +262 0x4000 //RX_FDDRC_SLANT_0_3 +263 0x7FFF //RX_FDDRC_SLANT_1_0 +264 0x7FFF //RX_FDDRC_SLANT_1_1 +265 0x7FFF //RX_FDDRC_SLANT_1_2 +266 0x7FFF //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +268 0x0002 //RX_FILTINDX +269 0x0001 //RX_TDDRC_THRD_0 +270 0x0002 //RX_TDDRC_THRD_1 +271 0x1800 //RX_TDDRC_THRD_2 +272 0x1800 //RX_TDDRC_THRD_3 +273 0x6000 //RX_TDDRC_SLANT_0 +274 0x6E00 //RX_TDDRC_SLANT_1 +275 0x4000 //RX_TDDRC_ALPHA_UP_0 +276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x199A //RX_TDDRC_HMNC_GAIN +279 0x0001 //RX_TDDRC_SMT_FLAG +280 0x0CCD //RX_TDDRC_SMT_W +281 0x02D2 //RX_TDDRC_DRC_GAIN +282 0x7C00 //RX_LAMBDA_PKA_FP +283 0x2000 //RX_TPKA_FP +284 0x2000 //RX_MIN_G_FP +285 0x0080 //RX_MAX_G_FP +286 0x0013 //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 +288 0x0000 //RX_MAXLEVEL_CNG +289 0x3000 //RX_BWE_UV_TH +290 0x3000 //RX_BWE_UV_TH2 +291 0x1800 //RX_BWE_UV_TH3 +292 0x1000 //RX_BWE_V_TH +293 0x04CD //RX_BWE_GAIN1_V_TH1 +294 0x0F33 //RX_BWE_GAIN1_V_TH2 +295 0x7333 //RX_BWE_UV_EQ +296 0x199A //RX_BWE_V_EQ +297 0x7333 //RX_BWE_TONE_TH +298 0x0004 //RX_BWE_UV_HOLD_T +299 0x6CCD //RX_BWE_GAIN2_ALPHA +300 0x799A //RX_BWE_GAIN3_ALPHA +301 0x001E //RX_BWE_CUTOFF +302 0x3000 //RX_BWE_GAINFILL +303 0x3200 //RX_BWE_MAXTH_TONE +304 0x2000 //RX_BWE_EQ_0 +305 0x2000 //RX_BWE_EQ_1 +306 0x2000 //RX_BWE_EQ_2 +307 0x2000 //RX_BWE_EQ_3 +308 0x2000 //RX_BWE_EQ_4 +309 0x2000 //RX_BWE_EQ_5 +310 0x2000 //RX_BWE_EQ_6 +311 0x0000 //RX_BWE_RESRV_0 +312 0x0000 //RX_BWE_RESRV_1 +313 0x0000 //RX_BWE_RESRV_2 +#VOL 0 +163 0x4000 //RX_TDDRC_ALPHA_UP_1 +164 0x4000 //RX_TDDRC_ALPHA_UP_2 +165 0x4000 //RX_TDDRC_ALPHA_UP_3 +166 0x4000 //RX_TDDRC_ALPHA_UP_4 +184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +190 0x7FFF //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +269 0x0001 //RX_TDDRC_THRD_0 +270 0x0002 //RX_TDDRC_THRD_1 +271 0x1800 //RX_TDDRC_THRD_2 +272 0x1800 //RX_TDDRC_THRD_3 +273 0x6000 //RX_TDDRC_SLANT_0 +274 0x6E00 //RX_TDDRC_SLANT_1 +275 0x4000 //RX_TDDRC_ALPHA_UP_0 +276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x199A //RX_TDDRC_HMNC_GAIN +279 0x0001 //RX_TDDRC_SMT_FLAG +280 0x0CCD //RX_TDDRC_SMT_W +281 0x02D2 //RX_TDDRC_DRC_GAIN +195 0x0020 //RX_FDEQ_SUBNUM +196 0x4848 //RX_FDEQ_GAIN_0 +197 0x4848 //RX_FDEQ_GAIN_1 +198 0x4848 //RX_FDEQ_GAIN_2 +199 0x4850 //RX_FDEQ_GAIN_3 +200 0x4848 //RX_FDEQ_GAIN_4 +201 0x4848 //RX_FDEQ_GAIN_5 +202 0x4568 //RX_FDEQ_GAIN_6 +203 0x485C //RX_FDEQ_GAIN_7 +204 0x5C60 //RX_FDEQ_GAIN_8 +205 0x685C //RX_FDEQ_GAIN_9 +206 0x5648 //RX_FDEQ_GAIN_10 +207 0x484C //RX_FDEQ_GAIN_11 +208 0x706C //RX_FDEQ_GAIN_12 +209 0x7070 //RX_FDEQ_GAIN_13 +210 0x6868 //RX_FDEQ_GAIN_14 +211 0x6060 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0202 //RX_FDEQ_BIN_0 +221 0x0203 //RX_FDEQ_BIN_1 +222 0x0303 //RX_FDEQ_BIN_2 +223 0x0402 //RX_FDEQ_BIN_3 +224 0x0504 //RX_FDEQ_BIN_4 +225 0x0209 //RX_FDEQ_BIN_5 +226 0x0808 //RX_FDEQ_BIN_6 +227 0x090A //RX_FDEQ_BIN_7 +228 0x0B0C //RX_FDEQ_BIN_8 +229 0x0D0E //RX_FDEQ_BIN_9 +230 0x1013 //RX_FDEQ_BIN_10 +231 0x1719 //RX_FDEQ_BIN_11 +232 0x1B1E //RX_FDEQ_BIN_12 +233 0x1E1E //RX_FDEQ_BIN_13 +234 0x1E28 //RX_FDEQ_BIN_14 +235 0x282C //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x4000 //RX_FDEQ_RESRV_0 +245 0x0320 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0030 //RX_FDDRC_BAND_MARGIN_1 +248 0x0050 //RX_FDDRC_BAND_MARGIN_2 +249 0x0080 //RX_FDDRC_BAND_MARGIN_3 +250 0x0004 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x2000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x2000 //RX_FDDRC_THRD_3_2 +258 0x5000 //RX_FDDRC_THRD_3_3 +259 0x4000 //RX_FDDRC_SLANT_0_0 +260 0x4000 //RX_FDDRC_SLANT_0_1 +261 0x4000 //RX_FDDRC_SLANT_0_2 +262 0x4000 //RX_FDDRC_SLANT_0_3 +263 0x7FFF //RX_FDDRC_SLANT_1_0 +264 0x7FFF //RX_FDDRC_SLANT_1_1 +265 0x7FFF //RX_FDDRC_SLANT_1_2 +266 0x7FFF //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +286 0x0013 //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 +#VOL 1 +163 0x4000 //RX_TDDRC_ALPHA_UP_1 +164 0x4000 //RX_TDDRC_ALPHA_UP_2 +165 0x4000 //RX_TDDRC_ALPHA_UP_3 +166 0x4000 //RX_TDDRC_ALPHA_UP_4 +184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +190 0x7FFF //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +269 0x0001 //RX_TDDRC_THRD_0 +270 0x0002 //RX_TDDRC_THRD_1 +271 0x1800 //RX_TDDRC_THRD_2 +272 0x1800 //RX_TDDRC_THRD_3 +273 0x6000 //RX_TDDRC_SLANT_0 +274 0x6E00 //RX_TDDRC_SLANT_1 +275 0x4000 //RX_TDDRC_ALPHA_UP_0 +276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x199A //RX_TDDRC_HMNC_GAIN +279 0x0001 //RX_TDDRC_SMT_FLAG +280 0x0CCD //RX_TDDRC_SMT_W +281 0x02D2 //RX_TDDRC_DRC_GAIN +195 0x0020 //RX_FDEQ_SUBNUM +196 0x4848 //RX_FDEQ_GAIN_0 +197 0x4848 //RX_FDEQ_GAIN_1 +198 0x4848 //RX_FDEQ_GAIN_2 +199 0x4850 //RX_FDEQ_GAIN_3 +200 0x4848 //RX_FDEQ_GAIN_4 +201 0x4848 //RX_FDEQ_GAIN_5 +202 0x4568 //RX_FDEQ_GAIN_6 +203 0x485C //RX_FDEQ_GAIN_7 +204 0x5C60 //RX_FDEQ_GAIN_8 +205 0x685C //RX_FDEQ_GAIN_9 +206 0x5648 //RX_FDEQ_GAIN_10 +207 0x484C //RX_FDEQ_GAIN_11 +208 0x706C //RX_FDEQ_GAIN_12 +209 0x7070 //RX_FDEQ_GAIN_13 +210 0x6868 //RX_FDEQ_GAIN_14 +211 0x6060 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0202 //RX_FDEQ_BIN_0 +221 0x0203 //RX_FDEQ_BIN_1 +222 0x0303 //RX_FDEQ_BIN_2 +223 0x0402 //RX_FDEQ_BIN_3 +224 0x0504 //RX_FDEQ_BIN_4 +225 0x0209 //RX_FDEQ_BIN_5 +226 0x0808 //RX_FDEQ_BIN_6 +227 0x090A //RX_FDEQ_BIN_7 +228 0x0B0C //RX_FDEQ_BIN_8 +229 0x0D0E //RX_FDEQ_BIN_9 +230 0x1013 //RX_FDEQ_BIN_10 +231 0x1719 //RX_FDEQ_BIN_11 +232 0x1B1E //RX_FDEQ_BIN_12 +233 0x1E1E //RX_FDEQ_BIN_13 +234 0x1E28 //RX_FDEQ_BIN_14 +235 0x282C //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x4000 //RX_FDEQ_RESRV_0 +245 0x0320 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0030 //RX_FDDRC_BAND_MARGIN_1 +248 0x0050 //RX_FDDRC_BAND_MARGIN_2 +249 0x0080 //RX_FDDRC_BAND_MARGIN_3 +250 0x0004 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x2000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x2000 //RX_FDDRC_THRD_3_2 +258 0x5000 //RX_FDDRC_THRD_3_3 +259 0x4000 //RX_FDDRC_SLANT_0_0 +260 0x4000 //RX_FDDRC_SLANT_0_1 +261 0x4000 //RX_FDDRC_SLANT_0_2 +262 0x4000 //RX_FDDRC_SLANT_0_3 +263 0x7FFF //RX_FDDRC_SLANT_1_0 +264 0x7FFF //RX_FDDRC_SLANT_1_1 +265 0x7FFF //RX_FDDRC_SLANT_1_2 +266 0x7FFF //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +286 0x001C //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 +#VOL 2 +163 0x4000 //RX_TDDRC_ALPHA_UP_1 +164 0x4000 //RX_TDDRC_ALPHA_UP_2 +165 0x4000 //RX_TDDRC_ALPHA_UP_3 +166 0x4000 //RX_TDDRC_ALPHA_UP_4 +184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +190 0x7FFF //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +269 0x0001 //RX_TDDRC_THRD_0 +270 0x0002 //RX_TDDRC_THRD_1 +271 0x1800 //RX_TDDRC_THRD_2 +272 0x1800 //RX_TDDRC_THRD_3 +273 0x6000 //RX_TDDRC_SLANT_0 +274 0x6E00 //RX_TDDRC_SLANT_1 +275 0x4000 //RX_TDDRC_ALPHA_UP_0 +276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x199A //RX_TDDRC_HMNC_GAIN +279 0x0001 //RX_TDDRC_SMT_FLAG +280 0x0CCD //RX_TDDRC_SMT_W +281 0x02D2 //RX_TDDRC_DRC_GAIN +195 0x0020 //RX_FDEQ_SUBNUM +196 0x4848 //RX_FDEQ_GAIN_0 +197 0x4848 //RX_FDEQ_GAIN_1 +198 0x4848 //RX_FDEQ_GAIN_2 +199 0x4850 //RX_FDEQ_GAIN_3 +200 0x4848 //RX_FDEQ_GAIN_4 +201 0x4848 //RX_FDEQ_GAIN_5 +202 0x4568 //RX_FDEQ_GAIN_6 +203 0x485C //RX_FDEQ_GAIN_7 +204 0x5C60 //RX_FDEQ_GAIN_8 +205 0x685C //RX_FDEQ_GAIN_9 +206 0x5648 //RX_FDEQ_GAIN_10 +207 0x484C //RX_FDEQ_GAIN_11 +208 0x706C //RX_FDEQ_GAIN_12 +209 0x7070 //RX_FDEQ_GAIN_13 +210 0x6868 //RX_FDEQ_GAIN_14 +211 0x6060 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0202 //RX_FDEQ_BIN_0 +221 0x0203 //RX_FDEQ_BIN_1 +222 0x0303 //RX_FDEQ_BIN_2 +223 0x0402 //RX_FDEQ_BIN_3 +224 0x0504 //RX_FDEQ_BIN_4 +225 0x0209 //RX_FDEQ_BIN_5 +226 0x0808 //RX_FDEQ_BIN_6 +227 0x090A //RX_FDEQ_BIN_7 +228 0x0B0C //RX_FDEQ_BIN_8 +229 0x0D0E //RX_FDEQ_BIN_9 +230 0x1013 //RX_FDEQ_BIN_10 +231 0x1719 //RX_FDEQ_BIN_11 +232 0x1B1E //RX_FDEQ_BIN_12 +233 0x1E1E //RX_FDEQ_BIN_13 +234 0x1E28 //RX_FDEQ_BIN_14 +235 0x282C //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x4000 //RX_FDEQ_RESRV_0 +245 0x0320 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0030 //RX_FDDRC_BAND_MARGIN_1 +248 0x0050 //RX_FDDRC_BAND_MARGIN_2 +249 0x0080 //RX_FDDRC_BAND_MARGIN_3 +250 0x0004 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x2000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x2000 //RX_FDDRC_THRD_3_2 +258 0x5000 //RX_FDDRC_THRD_3_3 +259 0x4000 //RX_FDDRC_SLANT_0_0 +260 0x4000 //RX_FDDRC_SLANT_0_1 +261 0x4000 //RX_FDDRC_SLANT_0_2 +262 0x4000 //RX_FDDRC_SLANT_0_3 +263 0x7FFF //RX_FDDRC_SLANT_1_0 +264 0x7FFF //RX_FDDRC_SLANT_1_1 +265 0x7FFF //RX_FDDRC_SLANT_1_2 +266 0x7FFF //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +286 0x0028 //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 +#VOL 3 +163 0x4000 //RX_TDDRC_ALPHA_UP_1 +164 0x4000 //RX_TDDRC_ALPHA_UP_2 +165 0x4000 //RX_TDDRC_ALPHA_UP_3 +166 0x4000 //RX_TDDRC_ALPHA_UP_4 +184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +190 0x7FFF //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +269 0x0001 //RX_TDDRC_THRD_0 +270 0x0002 //RX_TDDRC_THRD_1 +271 0x1800 //RX_TDDRC_THRD_2 +272 0x1800 //RX_TDDRC_THRD_3 +273 0x6000 //RX_TDDRC_SLANT_0 +274 0x6E00 //RX_TDDRC_SLANT_1 +275 0x4000 //RX_TDDRC_ALPHA_UP_0 +276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x199A //RX_TDDRC_HMNC_GAIN +279 0x0001 //RX_TDDRC_SMT_FLAG +280 0x0CCD //RX_TDDRC_SMT_W +281 0x02D2 //RX_TDDRC_DRC_GAIN +195 0x0020 //RX_FDEQ_SUBNUM +196 0x4848 //RX_FDEQ_GAIN_0 +197 0x4848 //RX_FDEQ_GAIN_1 +198 0x4848 //RX_FDEQ_GAIN_2 +199 0x4850 //RX_FDEQ_GAIN_3 +200 0x4848 //RX_FDEQ_GAIN_4 +201 0x4848 //RX_FDEQ_GAIN_5 +202 0x4568 //RX_FDEQ_GAIN_6 +203 0x485C //RX_FDEQ_GAIN_7 +204 0x5C60 //RX_FDEQ_GAIN_8 +205 0x685C //RX_FDEQ_GAIN_9 +206 0x5648 //RX_FDEQ_GAIN_10 +207 0x484C //RX_FDEQ_GAIN_11 +208 0x706C //RX_FDEQ_GAIN_12 +209 0x7070 //RX_FDEQ_GAIN_13 +210 0x6868 //RX_FDEQ_GAIN_14 +211 0x6060 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0202 //RX_FDEQ_BIN_0 +221 0x0203 //RX_FDEQ_BIN_1 +222 0x0303 //RX_FDEQ_BIN_2 +223 0x0402 //RX_FDEQ_BIN_3 +224 0x0504 //RX_FDEQ_BIN_4 +225 0x0209 //RX_FDEQ_BIN_5 +226 0x0808 //RX_FDEQ_BIN_6 +227 0x090A //RX_FDEQ_BIN_7 +228 0x0B0C //RX_FDEQ_BIN_8 +229 0x0D0E //RX_FDEQ_BIN_9 +230 0x1013 //RX_FDEQ_BIN_10 +231 0x1719 //RX_FDEQ_BIN_11 +232 0x1B1E //RX_FDEQ_BIN_12 +233 0x1E1E //RX_FDEQ_BIN_13 +234 0x1E28 //RX_FDEQ_BIN_14 +235 0x282C //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x4000 //RX_FDEQ_RESRV_0 +245 0x0320 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0030 //RX_FDDRC_BAND_MARGIN_1 +248 0x0050 //RX_FDDRC_BAND_MARGIN_2 +249 0x0080 //RX_FDDRC_BAND_MARGIN_3 +250 0x0004 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x2000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x2000 //RX_FDDRC_THRD_3_2 +258 0x5000 //RX_FDDRC_THRD_3_3 +259 0x4000 //RX_FDDRC_SLANT_0_0 +260 0x4000 //RX_FDDRC_SLANT_0_1 +261 0x4000 //RX_FDDRC_SLANT_0_2 +262 0x4000 //RX_FDDRC_SLANT_0_3 +263 0x7FFF //RX_FDDRC_SLANT_1_0 +264 0x7FFF //RX_FDDRC_SLANT_1_1 +265 0x7FFF //RX_FDDRC_SLANT_1_2 +266 0x7FFF //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +286 0x0035 //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 +#VOL 4 +163 0x4000 //RX_TDDRC_ALPHA_UP_1 +164 0x4000 //RX_TDDRC_ALPHA_UP_2 +165 0x4000 //RX_TDDRC_ALPHA_UP_3 +166 0x4000 //RX_TDDRC_ALPHA_UP_4 +184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +190 0x7FFF //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +269 0x0001 //RX_TDDRC_THRD_0 +270 0x0002 //RX_TDDRC_THRD_1 +271 0x1800 //RX_TDDRC_THRD_2 +272 0x1800 //RX_TDDRC_THRD_3 +273 0x6000 //RX_TDDRC_SLANT_0 +274 0x6E00 //RX_TDDRC_SLANT_1 +275 0x4000 //RX_TDDRC_ALPHA_UP_0 +276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x199A //RX_TDDRC_HMNC_GAIN +279 0x0001 //RX_TDDRC_SMT_FLAG +280 0x0CCD //RX_TDDRC_SMT_W +281 0x02D2 //RX_TDDRC_DRC_GAIN +195 0x0020 //RX_FDEQ_SUBNUM +196 0x4C4C //RX_FDEQ_GAIN_0 +197 0x4C4C //RX_FDEQ_GAIN_1 +198 0x4C48 //RX_FDEQ_GAIN_2 +199 0x4870 //RX_FDEQ_GAIN_3 +200 0x4848 //RX_FDEQ_GAIN_4 +201 0x4848 //RX_FDEQ_GAIN_5 +202 0x4568 //RX_FDEQ_GAIN_6 +203 0x485C //RX_FDEQ_GAIN_7 +204 0x5C60 //RX_FDEQ_GAIN_8 +205 0x685C //RX_FDEQ_GAIN_9 +206 0x5648 //RX_FDEQ_GAIN_10 +207 0x484C //RX_FDEQ_GAIN_11 +208 0x706C //RX_FDEQ_GAIN_12 +209 0x7070 //RX_FDEQ_GAIN_13 +210 0x6868 //RX_FDEQ_GAIN_14 +211 0x6060 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0202 //RX_FDEQ_BIN_0 +221 0x0203 //RX_FDEQ_BIN_1 +222 0x0303 //RX_FDEQ_BIN_2 +223 0x0402 //RX_FDEQ_BIN_3 +224 0x0504 //RX_FDEQ_BIN_4 +225 0x0209 //RX_FDEQ_BIN_5 +226 0x0808 //RX_FDEQ_BIN_6 +227 0x090A //RX_FDEQ_BIN_7 +228 0x0B0C //RX_FDEQ_BIN_8 +229 0x0D0E //RX_FDEQ_BIN_9 +230 0x1013 //RX_FDEQ_BIN_10 +231 0x1719 //RX_FDEQ_BIN_11 +232 0x1B1E //RX_FDEQ_BIN_12 +233 0x1E1E //RX_FDEQ_BIN_13 +234 0x1E28 //RX_FDEQ_BIN_14 +235 0x282C //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x4000 //RX_FDEQ_RESRV_0 +245 0x0320 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0030 //RX_FDDRC_BAND_MARGIN_1 +248 0x0050 //RX_FDDRC_BAND_MARGIN_2 +249 0x0080 //RX_FDDRC_BAND_MARGIN_3 +250 0x0004 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x2000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x2000 //RX_FDDRC_THRD_3_2 +258 0x5000 //RX_FDDRC_THRD_3_3 +259 0x4000 //RX_FDDRC_SLANT_0_0 +260 0x4000 //RX_FDDRC_SLANT_0_1 +261 0x4000 //RX_FDDRC_SLANT_0_2 +262 0x4000 //RX_FDDRC_SLANT_0_3 +263 0x7FFF //RX_FDDRC_SLANT_1_0 +264 0x7FFF //RX_FDDRC_SLANT_1_1 +265 0x7FFF //RX_FDDRC_SLANT_1_2 +266 0x7FFF //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +286 0x0052 //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 +#VOL 5 +163 0x4000 //RX_TDDRC_ALPHA_UP_1 +164 0x4000 //RX_TDDRC_ALPHA_UP_2 +165 0x4000 //RX_TDDRC_ALPHA_UP_3 +166 0x4000 //RX_TDDRC_ALPHA_UP_4 +184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +190 0x7FFF //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +269 0x0001 //RX_TDDRC_THRD_0 +270 0x0002 //RX_TDDRC_THRD_1 +271 0x1800 //RX_TDDRC_THRD_2 +272 0x1800 //RX_TDDRC_THRD_3 +273 0x6000 //RX_TDDRC_SLANT_0 +274 0x6E00 //RX_TDDRC_SLANT_1 +275 0x4000 //RX_TDDRC_ALPHA_UP_0 +276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x199A //RX_TDDRC_HMNC_GAIN +279 0x0001 //RX_TDDRC_SMT_FLAG +280 0x0CCD //RX_TDDRC_SMT_W +281 0x02D2 //RX_TDDRC_DRC_GAIN +195 0x0020 //RX_FDEQ_SUBNUM +196 0x4C4C //RX_FDEQ_GAIN_0 +197 0x4C4C //RX_FDEQ_GAIN_1 +198 0x4C48 //RX_FDEQ_GAIN_2 +199 0x4870 //RX_FDEQ_GAIN_3 +200 0x4848 //RX_FDEQ_GAIN_4 +201 0x4848 //RX_FDEQ_GAIN_5 +202 0x4568 //RX_FDEQ_GAIN_6 +203 0x485C //RX_FDEQ_GAIN_7 +204 0x5C60 //RX_FDEQ_GAIN_8 +205 0x685C //RX_FDEQ_GAIN_9 +206 0x5648 //RX_FDEQ_GAIN_10 +207 0x484C //RX_FDEQ_GAIN_11 +208 0x706C //RX_FDEQ_GAIN_12 +209 0x7070 //RX_FDEQ_GAIN_13 +210 0x6868 //RX_FDEQ_GAIN_14 +211 0x6060 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0202 //RX_FDEQ_BIN_0 +221 0x0203 //RX_FDEQ_BIN_1 +222 0x0303 //RX_FDEQ_BIN_2 +223 0x0402 //RX_FDEQ_BIN_3 +224 0x0504 //RX_FDEQ_BIN_4 +225 0x0209 //RX_FDEQ_BIN_5 +226 0x0808 //RX_FDEQ_BIN_6 +227 0x090A //RX_FDEQ_BIN_7 +228 0x0B0C //RX_FDEQ_BIN_8 +229 0x0D0E //RX_FDEQ_BIN_9 +230 0x1013 //RX_FDEQ_BIN_10 +231 0x1719 //RX_FDEQ_BIN_11 +232 0x1B1E //RX_FDEQ_BIN_12 +233 0x1E1E //RX_FDEQ_BIN_13 +234 0x1E28 //RX_FDEQ_BIN_14 +235 0x282C //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x4000 //RX_FDEQ_RESRV_0 +245 0x0320 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0030 //RX_FDDRC_BAND_MARGIN_1 +248 0x0050 //RX_FDDRC_BAND_MARGIN_2 +249 0x0080 //RX_FDDRC_BAND_MARGIN_3 +250 0x0004 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x2000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x2000 //RX_FDDRC_THRD_3_2 +258 0x5000 //RX_FDDRC_THRD_3_3 +259 0x4000 //RX_FDDRC_SLANT_0_0 +260 0x4000 //RX_FDDRC_SLANT_0_1 +261 0x4000 //RX_FDDRC_SLANT_0_2 +262 0x4000 //RX_FDDRC_SLANT_0_3 +263 0x7FFF //RX_FDDRC_SLANT_1_0 +264 0x7FFF //RX_FDDRC_SLANT_1_1 +265 0x7FFF //RX_FDDRC_SLANT_1_2 +266 0x7FFF //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +286 0x0078 //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 +#VOL 6 +163 0x4000 //RX_TDDRC_ALPHA_UP_1 +164 0x4000 //RX_TDDRC_ALPHA_UP_2 +165 0x4000 //RX_TDDRC_ALPHA_UP_3 +166 0x4000 //RX_TDDRC_ALPHA_UP_4 +184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +190 0x7FFF //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +269 0x0001 //RX_TDDRC_THRD_0 +270 0x0002 //RX_TDDRC_THRD_1 +271 0x1800 //RX_TDDRC_THRD_2 +272 0x1800 //RX_TDDRC_THRD_3 +273 0x6000 //RX_TDDRC_SLANT_0 +274 0x6E00 //RX_TDDRC_SLANT_1 +275 0x4000 //RX_TDDRC_ALPHA_UP_0 +276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x199A //RX_TDDRC_HMNC_GAIN +279 0x0001 //RX_TDDRC_SMT_FLAG +280 0x0CCD //RX_TDDRC_SMT_W +281 0x02D2 //RX_TDDRC_DRC_GAIN +195 0x0020 //RX_FDEQ_SUBNUM +196 0x4C4C //RX_FDEQ_GAIN_0 +197 0x4C4C //RX_FDEQ_GAIN_1 +198 0x4C48 //RX_FDEQ_GAIN_2 +199 0x4870 //RX_FDEQ_GAIN_3 +200 0x4848 //RX_FDEQ_GAIN_4 +201 0x4848 //RX_FDEQ_GAIN_5 +202 0x4568 //RX_FDEQ_GAIN_6 +203 0x485C //RX_FDEQ_GAIN_7 +204 0x5C60 //RX_FDEQ_GAIN_8 +205 0x685C //RX_FDEQ_GAIN_9 +206 0x5648 //RX_FDEQ_GAIN_10 +207 0x484C //RX_FDEQ_GAIN_11 +208 0x706C //RX_FDEQ_GAIN_12 +209 0x7070 //RX_FDEQ_GAIN_13 +210 0x6868 //RX_FDEQ_GAIN_14 +211 0x6060 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0202 //RX_FDEQ_BIN_0 +221 0x0203 //RX_FDEQ_BIN_1 +222 0x0303 //RX_FDEQ_BIN_2 +223 0x0402 //RX_FDEQ_BIN_3 +224 0x0504 //RX_FDEQ_BIN_4 +225 0x0209 //RX_FDEQ_BIN_5 +226 0x0808 //RX_FDEQ_BIN_6 +227 0x090A //RX_FDEQ_BIN_7 +228 0x0B0C //RX_FDEQ_BIN_8 +229 0x0D0E //RX_FDEQ_BIN_9 +230 0x1013 //RX_FDEQ_BIN_10 +231 0x1719 //RX_FDEQ_BIN_11 +232 0x1B1E //RX_FDEQ_BIN_12 +233 0x1E1E //RX_FDEQ_BIN_13 +234 0x1E28 //RX_FDEQ_BIN_14 +235 0x282C //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x4000 //RX_FDEQ_RESRV_0 +245 0x0320 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0030 //RX_FDDRC_BAND_MARGIN_1 +248 0x0050 //RX_FDDRC_BAND_MARGIN_2 +249 0x0080 //RX_FDDRC_BAND_MARGIN_3 +250 0x0004 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x2000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x2000 //RX_FDDRC_THRD_3_2 +258 0x5000 //RX_FDDRC_THRD_3_3 +259 0x4000 //RX_FDDRC_SLANT_0_0 +260 0x4000 //RX_FDDRC_SLANT_0_1 +261 0x4000 //RX_FDDRC_SLANT_0_2 +262 0x4000 //RX_FDDRC_SLANT_0_3 +263 0x7FFF //RX_FDDRC_SLANT_1_0 +264 0x7FFF //RX_FDDRC_SLANT_1_1 +265 0x7FFF //RX_FDDRC_SLANT_1_2 +266 0x7FFF //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +286 0x0100 //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 + +#CASE_NAME HANDSFREE-HANDSFREE-VOICE_GENERIC-SWB +#PARAM_MODE FULL +#PARAM_TYPE TX+2RX +#TOTAL_CUSTOM_STEP 7+7 +#TX +0 0x0001 //TX_OPERATION_MODE_0 +1 0x0001 //TX_OPERATION_MODE_1 +2 0x0073 //TX_PATCH_REG +3 0x2F7C //TX_SENDFUNC_MODE_0 +4 0x0001 //TX_SENDFUNC_MODE_1 +5 0x0003 //TX_NUM_MIC +6 0x0003 //TX_SAMPLINGFREQ_SIG +7 0x0003 //TX_SAMPLINGFREQ_PROC +8 0x000A //TX_FRAME_SZ_SIG +9 0x000A //TX_FRAME_SZ +10 0x0000 //TX_DELAY_OPT +11 0x0028 //TX_MAX_TAIL_LENGTH +12 0x0001 //TX_NUM_LOUTCHN +13 0x0001 //TX_MAXNUM_AECREF +14 0x0000 //TX_DBG_FUNC_REG +15 0x0000 //TX_DBG_FUNC_REG1 +16 0x0000 //TX_SYS_RESRV_0 +17 0x0000 //TX_SYS_RESRV_1 +18 0x0000 //TX_SYS_RESRV_2 +19 0x0000 //TX_SYS_RESRV_3 +20 0x0000 //TX_DIST2REF0 +21 0x00A3 //TX_DIST2REF1 +22 0x001B //TX_DIST2REF_02 +23 0x0000 //TX_DIST2REF_03 +24 0x0000 //TX_DIST2REF_04 +25 0x0000 //TX_DIST2REF_05 +26 0x0000 //TX_MMIC +27 0x1000 //TX_PGA_0 +28 0x1000 //TX_PGA_1 +29 0x1000 //TX_PGA_2 +30 0x0000 //TX_PGA_3 +31 0x0000 //TX_PGA_4 +32 0x0000 //TX_PGA_5 +33 0x0001 //TX_MIC_PAIRS +34 0x0000 //TX_MIC_PAIRS_HS +35 0x0002 //TX_MICS_FOR_BF +36 0x0000 //TX_MIC_PAIRS_FORL1 +37 0x0002 //TX_MICS_OF_PAIR0 +38 0x0002 //TX_MICS_OF_PAIR1 +39 0x0002 //TX_MICS_OF_PAIR2 +40 0x0002 //TX_MICS_OF_PAIR3 +41 0x0000 //TX_MIC_DATA_SRC0 +42 0x0002 //TX_MIC_DATA_SRC1 +43 0x0001 //TX_MIC_DATA_SRC2 +44 0x0000 //TX_MIC_DATA_SRC3 +45 0x0000 //TX_MIC_PAIR_CH_04 +46 0x0000 //TX_MIC_PAIR_CH_05 +47 0x0000 //TX_MIC_PAIR_CH_10 +48 0x0000 //TX_MIC_PAIR_CH_11 +49 0x0000 //TX_MIC_PAIR_CH_12 +50 0x0000 //TX_MIC_PAIR_CH_13 +51 0x0000 //TX_MIC_PAIR_CH_14 +52 0x05DC //TX_HD_BIN_MASK +53 0x0010 //TX_HD_SUBAND_MASK +54 0x19A1 //TX_HD_FRAME_AVG_MASK +55 0x0320 //TX_HD_MIN_FRQ +56 0x1000 //TX_HD_ALPHA_PSD +57 0x1100 //TX_T_PHPR1 +58 0x0000 //TX_T_PHPR2 +59 0x0000 //TX_T_PTPR +60 0x0000 //TX_T_PNPR +61 0x0000 //TX_T_PAPR1 +62 0xEE6C //TX_T_PSDVAT +63 0x0800 //TX_CNT +64 0x4000 //TX_ANTI_HOWL_GAIN +65 0x0001 //TX_MICFORBFMARK_0 +66 0x0001 //TX_MICFORBFMARK_1 +67 0x0001 //TX_MICFORBFMARK_2 +68 0x0001 //TX_MICFORBFMARK_3 +69 0x0001 //TX_MICFORBFMARK_4 +70 0x0001 //TX_MICFORBFMARK_5 +71 0x0000 //TX_DIST2REF_10 +72 0x3B33 //TX_DIST2REF_11 +73 0x0A70 //TX_DIST2REF2 +74 0x0000 //TX_DIST2REF_13 +75 0x0000 //TX_DIST2REF_14 +76 0x0000 //TX_DIST2REF_15 +77 0x0000 //TX_DIST2REF_20 +78 0x0000 //TX_DIST2REF_21 +79 0x0000 //TX_DIST2REF_22 +80 0x0000 //TX_DIST2REF_23 +81 0x0000 //TX_DIST2REF_24 +82 0x0000 //TX_DIST2REF_25 +83 0x0000 //TX_DIST2REF_30 +84 0x0000 //TX_DIST2REF_31 +85 0x0000 //TX_DIST2REF_32 +86 0x0000 //TX_DIST2REF_33 +87 0x0000 //TX_DIST2REF_34 +88 0x0000 //TX_DIST2REF_35 +89 0x0000 //TX_MIC_LOC_00 +90 0x0000 //TX_MIC_LOC_01 +91 0x0000 //TX_MIC_LOC_02 +92 0x0000 //TX_MIC_LOC_03 +93 0x0000 //TX_MIC_LOC_04 +94 0x0000 //TX_MIC_LOC_05 +95 0x0000 //TX_MIC_LOC_10 +96 0x0000 //TX_MIC_LOC_11 +97 0x0000 //TX_MIC_LOC_12 +98 0x0000 //TX_MIC_LOC_13 +99 0x0000 //TX_MIC_LOC_14 +100 0x0000 //TX_MIC_LOC_15 +101 0x0000 //TX_MIC_LOC_20 +102 0x0000 //TX_MIC_LOC_21 +103 0x0000 //TX_MIC_LOC_22 +104 0x0000 //TX_MIC_LOC_23 +105 0x0000 //TX_MIC_LOC_24 +106 0x0000 //TX_MIC_LOC_25 +107 0x0800 //TX_MIC_REFBLK_VOLUME +108 0x0CAE //TX_MIC_BLOCK_VOLUME +109 0x0000 //TX_INVERSE_MASK +110 0x0000 //TX_ADCS_MASK +111 0x04D0 //TX_ADCS_GAIN +112 0x4000 //TX_NFC_GAINFAC +113 0x0000 //TX_MAINMIC_BLKFACTOR +114 0x0000 //TX_REFMIC_BLKFACTOR +115 0x0000 //TX_BLMIC_BLKFACTOR +116 0x0000 //TX_BRMIC_BLKFACTOR +117 0x0031 //TX_MICBLK_START_BIN +118 0x0060 //TX_MICBLK_END_BIN +119 0x0015 //TX_MICBLK_FE_HOLD +120 0xFFF2 //TX_MICBLK_MR_EXP_TH +121 0xFFF2 //TX_MICBLK_LR_EXP_TH +122 0x0015 //TX_FENE_HOLD +123 0x4000 //TX_FE_ENER_TH_MTS +124 0x0004 //TX_FE_ENER_TH_EXP +125 0x6000 //TX_C_POST_FLT_MIC_MAINBLK +126 0x6000 //TX_C_POST_FLT_MIC_REFBLK +127 0x0010 //TX_MIC_BLOCK_N +128 0x7B02 //TX_A_HP +129 0x4000 //TX_B_PE +130 0x5000 //TX_THR_PITCH_DET_0 +131 0x4800 //TX_THR_PITCH_DET_1 +132 0x4000 //TX_THR_PITCH_DET_2 +133 0x0008 //TX_PITCH_BFR_LEN +134 0x0003 //TX_SBD_PITCH_DET +135 0x0050 //TX_TD_AEC_L +136 0x4000 //TX_MU0_UNP_TD_AEC +137 0x1000 //TX_MU0_PTD_TD_AEC +138 0x0000 //TX_PP_RESRV_0 +139 0x2A94 //TX_PP_RESRV_1 +140 0x55F0 //TX_PP_RESRV_2 +141 0x0000 //TX_PP_RESRV_3 +142 0x0000 //TX_PP_RESRV_4 +143 0x0000 //TX_PP_RESRV_5 +144 0x0000 //TX_PP_RESRV_6 +145 0x0000 //TX_PP_RESRV_7 +146 0x0028 //TX_TAIL_LENGTH +147 0x0400 //TX_AEC_REF_GAIN_0 +148 0x0800 //TX_AEC_REF_GAIN_1 +149 0x0800 //TX_AEC_REF_GAIN_2 +150 0x7600 //TX_EAD_THR +151 0x1000 //TX_THR_RE_EST +152 0x2000 //TX_MIN_EQ_RE_EST_0 +153 0x0600 //TX_MIN_EQ_RE_EST_1 +154 0x3000 //TX_MIN_EQ_RE_EST_2 +155 0x3000 //TX_MIN_EQ_RE_EST_3 +156 0x3000 //TX_MIN_EQ_RE_EST_4 +157 0x3000 //TX_MIN_EQ_RE_EST_5 +158 0x3000 //TX_MIN_EQ_RE_EST_6 +159 0x1000 //TX_MIN_EQ_RE_EST_7 +160 0x7800 //TX_MIN_EQ_RE_EST_8 +161 0x7800 //TX_MIN_EQ_RE_EST_9 +162 0x7800 //TX_MIN_EQ_RE_EST_10 +163 0x7800 //TX_MIN_EQ_RE_EST_11 +164 0x7800 //TX_MIN_EQ_RE_EST_12 +165 0x3000 //TX_LAMBDA_RE_EST +166 0x3000 //TX_LAMBDA_CB_NLE +167 0x7FFF //TX_C_POST_FLT +168 0x4000 //TX_GAIN_NP +169 0x0180 //TX_SE_HOLD_N +170 0x00C8 //TX_DT_HOLD_N +171 0x0880 //TX_DT2_HOLD_N +172 0x6666 //TX_AEC_RESRV_0 +173 0x0000 //TX_AEC_RESRV_1 +174 0x0014 //TX_AEC_RESRV_2 +175 0x0000 //TX_MIC_DELAY_LENGTH +176 0x0000 //TX_REF_DELAY_LENGTH +177 0x0000 //TX_ADD_LINEIN_GAINL +178 0x0000 //TX_ADD_LINEIN_GAINH +179 0x0000 //TX_MIN_EQ_RE_EST_14 +180 0x0000 //TX_DTD_THR1_8 +181 0x7FFF //TX_DTD_THR2_8 +182 0x0000 //TX_DTD_MIC_BLK2 +183 0x0008 //TX_FRQ_LIN_LEN +184 0x7FFF //TX_FRQ_AEC_LEN_RHO +185 0x6000 //TX_MU0_UNP_FRQ_AEC +186 0x4000 //TX_MU0_PTD_FRQ_AEC +187 0x000A //TX_MINENOISETH +188 0x0800 //TX_MU0_RE_EST +189 0x0001 //TX_AEC_NUM_CH +190 0x0000 //TX_BIGECHOATTENUATION_MAX +191 0x2000 //TX_A_POST_FLT_MICBLK +192 0x0000 //TX_BLKENERTH +193 0x0000 //TX_BLKENERHIGHTH +194 0x0000 //TX_NORMENERTH +195 0x0000 //TX_NORMENERHIGHTH +196 0x0000 //TX_NORMENERHIGHTHL +197 0x7148 //TX_DTD_THR1_0 +198 0x7148 //TX_DTD_THR1_1 +199 0x7148 //TX_DTD_THR1_2 +200 0x7148 //TX_DTD_THR1_3 +201 0x7148 //TX_DTD_THR1_4 +202 0x7700 //TX_DTD_THR1_5 +203 0x7148 //TX_DTD_THR1_6 +204 0x7E00 //TX_DTD_THR2_0 +205 0x7E00 //TX_DTD_THR2_1 +206 0x5000 //TX_DTD_THR2_2 +207 0x5000 //TX_DTD_THR2_3 +208 0x5000 //TX_DTD_THR2_4 +209 0x5000 //TX_DTD_THR2_5 +210 0x5000 //TX_DTD_THR2_6 +211 0x7FFF //TX_DTD_THR3 +212 0x0000 //TX_SPK_CUT_K +213 0x36B0 //TX_DT_CUT_K +214 0x0100 //TX_DT_CUT_THR +215 0x04EB //TX_COMFORT_G +216 0x01F4 //TX_POWER_YOUT_TH +217 0x4000 //TX_FDPFGAINECHO +218 0x0000 //TX_DTD_HD_THR +219 0x0000 //TX_SPK_CUT_K_S +220 0x7FFF //TX_DTD_MIC_BLK +221 0x023E //TX_ADPT_STRICT_L +222 0x023E //TX_ADPT_STRICT_H +223 0x0001 //TX_RATIO_DT_L_TH_LOW +224 0x3A98 //TX_RATIO_DT_H_TH_LOW +225 0x07D0 //TX_RATIO_DT_L_TH_HIGH +226 0x59D8 //TX_RATIO_DT_H_TH_HIGH +227 0x0001 //TX_RATIO_DT_L0_TH +228 0x7FFF //TX_B_POST_FILT_ECHO_L +229 0x7FFF //TX_B_POST_FILT_ECHO_H +230 0x0200 //TX_MIN_G_CTRL_ECHO +231 0x1000 //TX_B_LESSCUT_RTO_ECHO +232 0x0000 //TX_EPD_OFFSET_00 +233 0x0000 //TX_EPD_OFFST_01 +234 0x02BC //TX_RATIO_DT_L0_TH_HIGH +235 0x7FFF //TX_RATIO_DT_H_TH_CUT +236 0x7FFF //TX_MIN_EQ_RE_EST_13 +237 0x0000 //TX_DTD_THR1_7 +238 0x0000 //TX_DTD_THR2_7 +239 0x0800 //TX_DT_RESRV_7 +240 0x0800 //TX_DT_RESRV_8 +241 0x0000 //TX_DT_RESRV_9 +242 0xF800 //TX_THR_SN_EST_0 +243 0xFA00 //TX_THR_SN_EST_1 +244 0xFA00 //TX_THR_SN_EST_2 +245 0xFA00 //TX_THR_SN_EST_3 +246 0xF800 //TX_THR_SN_EST_4 +247 0xFA00 //TX_THR_SN_EST_5 +248 0xF800 //TX_THR_SN_EST_6 +249 0xF800 //TX_THR_SN_EST_7 +250 0x0100 //TX_DELTA_THR_SN_EST_0 +251 0x0100 //TX_DELTA_THR_SN_EST_1 +252 0x0100 //TX_DELTA_THR_SN_EST_2 +253 0x0000 //TX_DELTA_THR_SN_EST_3 +254 0x0100 //TX_DELTA_THR_SN_EST_4 +255 0x0200 //TX_DELTA_THR_SN_EST_5 +256 0x0100 //TX_DELTA_THR_SN_EST_6 +257 0x0200 //TX_DELTA_THR_SN_EST_7 +258 0x4000 //TX_LAMBDA_NN_EST_0 +259 0x4000 //TX_LAMBDA_NN_EST_1 +260 0x4000 //TX_LAMBDA_NN_EST_2 +261 0x4000 //TX_LAMBDA_NN_EST_3 +262 0x4000 //TX_LAMBDA_NN_EST_4 +263 0x4000 //TX_LAMBDA_NN_EST_5 +264 0x4000 //TX_LAMBDA_NN_EST_6 +265 0x4000 //TX_LAMBDA_NN_EST_7 +266 0x0400 //TX_N_SN_EST +267 0x001E //TX_INBEAM_T +268 0x0041 //TX_INBEAMHOLDT +269 0x2000 //TX_G_STRICT +270 0x2000 //TX_EQ_THR_BF +271 0x799A //TX_LAMBDA_EQ_BF +272 0x1000 //TX_NE_RTO_TH +273 0x0400 //TX_NE_RTO_TH_L +274 0x0800 //TX_MAINREFRTOH_TH_H +275 0x0800 //TX_MAINREFRTOH_TH_L +276 0x0800 //TX_MAINREFRTO_TH_H +277 0x0800 //TX_MAINREFRTO_TH_L +278 0x0200 //TX_MAINREFRTO_TH_EQ +279 0x2000 //TX_B_POST_FLT_0 +280 0x1000 //TX_B_POST_FLT_1 +281 0x0010 //TX_NS_LVL_CTRL_0 +282 0x003C //TX_NS_LVL_CTRL_1 +283 0x0024 //TX_NS_LVL_CTRL_2 +284 0x003C //TX_NS_LVL_CTRL_3 +285 0x0014 //TX_NS_LVL_CTRL_4 +286 0x0011 //TX_NS_LVL_CTRL_5 +287 0x003C //TX_NS_LVL_CTRL_6 +288 0x0011 //TX_NS_LVL_CTRL_7 +289 0x0020 //TX_MIN_GAIN_S_0 +290 0x0020 //TX_MIN_GAIN_S_1 +291 0x0020 //TX_MIN_GAIN_S_2 +292 0x0020 //TX_MIN_GAIN_S_3 +293 0x0020 //TX_MIN_GAIN_S_4 +294 0x0020 //TX_MIN_GAIN_S_5 +295 0x0020 //TX_MIN_GAIN_S_6 +296 0x0020 //TX_MIN_GAIN_S_7 +297 0x6000 //TX_NMOS_SUP +298 0x0000 //TX_NS_MAX_PRI_SNR_TH +299 0x0000 //TX_NMOS_SUP_MENSA +300 0x7FFF //TX_SNRI_SUP_0 +301 0x4000 //TX_SNRI_SUP_1 +302 0x4000 //TX_SNRI_SUP_2 +303 0x4000 //TX_SNRI_SUP_3 +304 0x4000 //TX_SNRI_SUP_4 +305 0x4000 //TX_SNRI_SUP_5 +306 0x4000 //TX_SNRI_SUP_6 +307 0x4000 //TX_SNRI_SUP_7 +308 0x7FFF //TX_THR_LFNS +309 0x0018 //TX_G_LFNS +310 0x09C4 //TX_GAIN0_NTH +311 0x000A //TX_MUSIC_MORENS +312 0x7FFF //TX_A_POST_FILT_0 +313 0x2000 //TX_A_POST_FILT_1 +314 0x7FFF //TX_A_POST_FILT_S_0 +315 0x7FFF //TX_A_POST_FILT_S_1 +316 0x7FFF //TX_A_POST_FILT_S_2 +317 0x7FFF //TX_A_POST_FILT_S_3 +318 0x7FFF //TX_A_POST_FILT_S_4 +319 0x7FFF //TX_A_POST_FILT_S_5 +320 0x7FFF //TX_A_POST_FILT_S_6 +321 0x7FFF //TX_A_POST_FILT_S_7 +322 0x2000 //TX_B_POST_FILT_0 +323 0x6000 //TX_B_POST_FILT_1 +324 0x6000 //TX_B_POST_FILT_2 +325 0x6000 //TX_B_POST_FILT_3 +326 0x4000 //TX_B_POST_FILT_4 +327 0x1000 //TX_B_POST_FILT_5 +328 0x1000 //TX_B_POST_FILT_6 +329 0x2000 //TX_B_POST_FILT_7 +330 0x4000 //TX_B_LESSCUT_RTO_S_0 +331 0x7FFF //TX_B_LESSCUT_RTO_S_1 +332 0x7FFF //TX_B_LESSCUT_RTO_S_2 +333 0x7FFF //TX_B_LESSCUT_RTO_S_3 +334 0x7FFF //TX_B_LESSCUT_RTO_S_4 +335 0x6000 //TX_B_LESSCUT_RTO_S_5 +336 0x7FFF //TX_B_LESSCUT_RTO_S_6 +337 0x7FFF //TX_B_LESSCUT_RTO_S_7 +338 0x7F00 //TX_LAMBDA_PFILT +339 0x7F00 //TX_LAMBDA_PFILT_S_0 +340 0x7F00 //TX_LAMBDA_PFILT_S_1 +341 0x7F00 //TX_LAMBDA_PFILT_S_2 +342 0x7F00 //TX_LAMBDA_PFILT_S_3 +343 0x7F00 //TX_LAMBDA_PFILT_S_4 +344 0x7F00 //TX_LAMBDA_PFILT_S_5 +345 0x7F00 //TX_LAMBDA_PFILT_S_6 +346 0x7F00 //TX_LAMBDA_PFILT_S_7 +347 0x0200 //TX_K_PEPPER +348 0x0400 //TX_A_PEPPER +349 0x1EAA //TX_K_PEPPER_HF +350 0x0600 //TX_A_PEPPER_HF +351 0x0001 //TX_HMNC_BST_FLG +352 0x0200 //TX_HMNC_BST_THR +353 0x0040 //TX_DT_BINVAD_TH_0 +354 0x0040 //TX_DT_BINVAD_TH_1 +355 0x0100 //TX_DT_BINVAD_TH_2 +356 0x0100 //TX_DT_BINVAD_TH_3 +357 0x36B0 //TX_DT_BINVAD_ENDF +358 0x0200 //TX_C_POST_FLT_DT +359 0x0CCD //TX_NS_B_POST_FLT_LESSCUT +360 0x0140 //TX_DT_BOOST +361 0x0000 //TX_BF_SGRAD_FLG +362 0x0005 //TX_BF_DVG_TH +363 0x001E //TX_SN_C_F +364 0x0000 //TX_K_APT +365 0x0001 //TX_NOISEDET +366 0x0064 //TX_NDETCT +367 0x0050 //TX_NOISE_TH_0 +368 0x7FFF //TX_NOISE_TH_0_2 +369 0x7FFF //TX_NOISE_TH_0_3 +370 0x07D0 //TX_NOISE_TH_1 +371 0x01F4 //TX_NOISE_TH_2 +372 0x36B0 //TX_NOISE_TH_3 +373 0x2710 //TX_NOISE_TH_4 +374 0x2CEC //TX_NOISE_TH_5 +375 0x7FFF //TX_NOISE_TH_5_2 +376 0x0000 //TX_NOISE_TH_5_3 +377 0x7FFF //TX_NOISE_TH_5_4 +378 0x0DAC //TX_NOISE_TH_6 +379 0x0050 //TX_MINENOISE_TH +380 0xD508 //TX_MORENS_TFMASK_TH +381 0x0001 //TX_DRC_QUIET_FLOOR +382 0x3A98 //TX_RATIODTL_CUT_TH +383 0x07D0 //TX_DT_CUT_K1 +384 0x0666 //TX_OUT_ENER_S_TH_CLEAN +385 0x0666 //TX_OUT_ENER_S_TH_LESSCLEAN +386 0x0333 //TX_OUT_ENER_S_TH_NOISY +387 0x019A //TX_OUT_ENER_TH_NOISE +388 0x0333 //TX_OUT_ENER_TH_SPEECH +389 0x2000 //TX_SN_NPB_GAIN +390 0x0000 //TX_NN_NPB_GAIN +391 0x7FFF //TX_POST_MASK_SUP_HSNE +392 0x1388 //TX_TAIL_DET_TH +393 0x4000 //TX_B_LESSCUT_RTO_WTA +394 0x0000 //TX_MEL_G_R +395 0x0080 //TX_SUPHIGH_TH +396 0x0000 //TX_MASK_G_R +397 0x0002 //TX_EXTRA_NS_L +398 0x1800 //TX_C_POST_FLT_MASK +399 0x7FFF //TX_A_POST_FLT_WNS +400 0x0148 //TX_MIN_G_LOW300HZ +401 0x0001 //TX_MAXLEVEL_CNG +402 0x00B4 //TX_STN_NOISE_TH +403 0x4000 //TX_POST_MASK_SUP +404 0x7FFF //TX_POST_MASK_ADJUST +405 0x00C8 //TX_NS_ENOISE_MIC0_TH +406 0x0050 //TX_MINENOISE_MIC0_TH +407 0x012C //TX_MINENOISE_MIC0_S_TH +408 0x4000 //TX_MIN_G_CTRL_SSNS +409 0x0000 //TX_METAL_RTO_THR +410 0x4848 //TX_NS_FP_K_METAL +411 0x3A98 //TX_NOISEDET_BOOST_TH +412 0x0FA0 //TX_NSMOOTH_TH +413 0x0000 //TX_NS_RESRV_8 +414 0x1800 //TX_RHO_UPB +415 0x0BB8 //TX_N_HOLD_HS +416 0x0050 //TX_N_RHO_BFR0 +417 0x7FFF //TX_LAMBDA_ARSP_EST +418 0x0100 //TX_EXTRA_GAIN_MICBLOCK +419 0x0CCD //TX_THR_STD_NSR +420 0x019A //TX_THR_STD_PLH +421 0x2AF8 //TX_N_HOLD_STD +422 0x0066 //TX_THR_STD_RHO +423 0x2000 //TX_BF_RESET_THR_HS +424 0x09C4 //TX_SB_RTO_MEAN_TH +425 0x0000 //TX_SB_RHO_MEAN_TH_NTALK +426 0x3800 //TX_SB_RTO_MEAN_TH_ABN +427 0x2EE0 //TX_SB_RTO_MEAN_TH_RUB +428 0x0000 //TX_WTA_EN_RTO_TH +429 0x0000 //TX_TOP_ENER_TH_F +430 0x0000 //TX_DESIRED_TALK_HOLDT +431 0x0800 //TX_MIC_BLOCK_FACTOR +432 0x0000 //TX_NSEST_BFRLRNRDC +433 0x0000 //TX_THR_POST_FLT_HS +434 0x0010 //TX_HS_VAD_BIN +435 0x2666 //TX_THR_VAD_HS +436 0x2CCD //TX_MEAN_RTO_MIN_TH2 +437 0x0032 //TX_SILENCE_T +438 0x0000 //TX_A_POST_FLT_WTA +439 0x799A //TX_LAMBDA_PFLT_WTA +440 0x0000 //TX_SB_RHO_MEAN2_TH +441 0x0190 //TX_SB_RHO_MEAN3_TH +442 0x0000 //TX_HS_RESRV_4 +443 0x0000 //TX_HS_RESRV_5 +444 0x003C //TX_DOA_VAD_THR_1 +445 0x0000 //TX_DOA_VAD_THR_2 +446 0x0028 //TX_DOA_VAD_THR1_0 +447 0x0028 //TX_DOA_VAD_THR1_1 +448 0x0000 //TX_SRC_DOA_RNG_LOW_0A +449 0x00B4 //TX_SRC_DOA_RNG_HIGH_0A +450 0x005A //TX_DFLT_SRC_DOA_0A +451 0x0000 //TX_SRC_DOA_RNG_LOW_0B +452 0x0000 //TX_SRC_DOA_RNG_HIGH_0B +453 0x0000 //TX_DFLT_SRC_DOA_0B +454 0x0000 //TX_SRC_DOA_RNG_LOW_0C +455 0x0000 //TX_SRC_DOA_RNG_HIGH_0C +456 0x0000 //TX_DFLT_SRC_DOA_0C +457 0x0000 //TX_SRC_DOA_RNG_LOW_0D +458 0x0000 //TX_SRC_DOA_RNG_HIGH_0D +459 0x0000 //TX_DFLT_SRC_DOA_0D +460 0x0000 //TX_SRC_DOA_RNG_LOW_1A +461 0x00B4 //TX_SRC_DOA_RNG_HIGH_1A +462 0x005A //TX_DFLT_SRC_DOA_1A +463 0x0000 //TX_SRC_DOA_RNG_LOW_1B +464 0x00B4 //TX_SRC_DOA_RNG_HIGH_1B +465 0x005A //TX_DFLT_SRC_DOA_1B +466 0x0000 //TX_SRC_DOA_RNG_LOW_1C +467 0x00B4 //TX_SRC_DOA_RNG_HIGH_1C +468 0x005A //TX_DFLT_SRC_DOA_1C +469 0x0000 //TX_SRC_DOA_RNG_LOW_1D +470 0x00B4 //TX_SRC_DOA_RNG_HIGH_1D +471 0x005A //TX_DFLT_SRC_DOA_1D +472 0x0100 //TX_BF_HOLDOFF_T +473 0x7FFF //TX_DOA_COST_FACTOR +474 0x4000 //TX_MAINTOREFR_TH0 +475 0x071C //TX_DOA_TRK_THR +476 0x012C //TX_DOA_TRACK_HT +477 0x0200 //TX_N1_HOLD_HF +478 0x0100 //TX_N2_HOLD_HF +479 0x3000 //TX_BF_RESET_THR_HF +480 0x7333 //TX_DOA_SMOOTH +481 0x0800 //TX_MU_BF +482 0x0800 //TX_BF_MU_LF_B2 +483 0x0040 //TX_BF_FC_END_BIN_B2 +484 0x0020 //TX_BF_FC_END_BIN +485 0x0000 //TX_HF_RESRV_25 +486 0x0000 //TX_HF_RESRV_26 +487 0x0007 //TX_N_DOA_SEED +488 0x0001 //TX_FINE_DOA_SEARCH_FLG +489 0x0000 //TX_HF_RESRV_27 +490 0x038E //TX_DLT_SRC_DOA_RNG +491 0x0200 //TX_BF_MU_LF +492 0x0000 //TX_DFLT_SRC_LOC_0 +493 0x7FFF //TX_DFLT_SRC_LOC_1 +494 0x0000 //TX_DFLT_SRC_LOC_2 +495 0x038E //TX_DOA_TRACK_VADTH +496 0x0000 //TX_DOA_TRACK_NEW +497 0x0230 //TX_NOR_OFF_THR +498 0x0CCD //TX_MORE_ON_700HZ_THR +499 0x0000 //TX_MU_BF_ADPT_NS +500 0x0000 //TX_ADAPT_LEN +501 0x2000 //TX_MORE_SNS +502 0x0000 //TX_NOR_OFF_TH1 +503 0x0000 //TX_WIDE_MASK_TH +504 0x4650 //TX_SUBSNRATIOHIGH4MEANBCK_THR +505 0x4000 //TX_C_POST_FLT_CUT +506 0x2000 //TX_RADIODTLV +507 0x0320 //TX_POWER_LINEIN_TH +508 0x0014 //TX_FE_VADCOUNT_TH_FC +509 0x000A //TX_ECHO_SUPP_FC +510 0x0C80 //TX_ECHO_TH +511 0x6666 //TX_MIC_TO_BFGAIN +512 0x0000 //TX_MICTOBFGAIN0 +513 0x0000 //TX_FASTMUE_TH +514 0x3000 //TX_DEREVERB_LF_MU +515 0x34CD //TX_DEREVERB_HF_MU +516 0x0007 //TX_DEREVERB_DELAY +517 0x0004 //TX_DEREVERB_COEF_LEN +518 0x0003 //TX_DEREVERB_DNR +519 0x0000 //TX_DEREVERB_ALPHA +520 0x0000 //TX_DEREVERB_BETA +521 0x3A98 //TX_GSC_RTOL_TH +522 0x3A98 //TX_GSC_RTOH_TH +523 0x7E2C //TX_WIDE2_MEANHTH +524 0x0000 //TX_DR_RESRV_5 +525 0x0000 //TX_DR_RESRV_6 +526 0x0000 //TX_DR_RESRV_7 +527 0x0000 //TX_DR_RESRV_8 +528 0x1333 //TX_WIND_MARK_TH +529 0x399A //TX_CORR_THR +530 0x0004 //TX_SNR_THR +531 0x0010 //TX_ENGY_THR +532 0x1770 //TX_CORR_HIGH_TH +533 0x6000 //TX_ENGY_THR_2 +534 0x3400 //TX_MEAN_RTO_THR +535 0x0028 //TX_WNS_ENOISE_MIC0_TH +536 0x3000 //TX_RATIOMICL_TH +537 0x64CD //TX_CALIG_HS +538 0x0000 //TX_LVL_CTRL +539 0x0014 //TX_WIND_SUPRTO +540 0x000A //TX_WNS_MIN_G +541 0x0000 //TX_WNS_B_POST_FLT +542 0x2800 //TX_RATIOMICH_TH +543 0xD120 //TX_WIND_INBEAM_L_TH +544 0x0FA0 //TX_WIND_INBEAM_H_TH +545 0x2000 //TX_WNS_RESRV_0 +546 0x59D8 //TX_WNS_RESRV_1 +547 0x0000 //TX_WNS_RESRV_2 +548 0x0000 //TX_WNS_RESRV_3 +549 0x0000 //TX_WNS_RESRV_4 +550 0x0000 //TX_WNS_RESRV_5 +551 0x0000 //TX_WNS_RESRV_6 +552 0x0000 //TX_PB_B_POST_FLT_LESSCUT +553 0x0070 //TX_BF_LESSCUT_BBIN +554 0x0070 //TX_BF_LESSCUT_EBIN +555 0x0010 //TX_POSTBFB0 +556 0x0070 //TX_POSTBFB +557 0x00B0 //TX_POSTBFE +558 0x0E66 //TX_SPEECH_SNR_TH +559 0x0050 //TX_PB_MAX_PRI_SNR_TH +560 0x770A //TX_MAX_PRI_SNR_TH_L +561 0x0000 //TX_PFGAIN +562 0x0000 //TX_MAINTOREFR_TH +563 0x0000 //TX_SAM_MARK +564 0x0000 //TX_PB_RESRV_0 +565 0x0000 //TX_PB_RESRV_1 +566 0x0020 //TX_FDEQ_SUBNUM +567 0x4848 //TX_FDEQ_GAIN_0 +568 0x4848 //TX_FDEQ_GAIN_1 +569 0x4850 //TX_FDEQ_GAIN_2 +570 0x5050 //TX_FDEQ_GAIN_3 +571 0x4848 //TX_FDEQ_GAIN_4 +572 0x4850 //TX_FDEQ_GAIN_5 +573 0x5261 //TX_FDEQ_GAIN_6 +574 0x5C4C //TX_FDEQ_GAIN_7 +575 0x4C4E //TX_FDEQ_GAIN_8 +576 0x4848 //TX_FDEQ_GAIN_9 +577 0x4C4F //TX_FDEQ_GAIN_10 +578 0x5153 //TX_FDEQ_GAIN_11 +579 0x5A5B //TX_FDEQ_GAIN_12 +580 0x5A7F //TX_FDEQ_GAIN_13 +581 0x7C77 //TX_FDEQ_GAIN_14 +582 0x6D75 //TX_FDEQ_GAIN_15 +583 0x4848 //TX_FDEQ_GAIN_16 +584 0x4848 //TX_FDEQ_GAIN_17 +585 0x4848 //TX_FDEQ_GAIN_18 +586 0x4848 //TX_FDEQ_GAIN_19 +587 0x4848 //TX_FDEQ_GAIN_20 +588 0x4848 //TX_FDEQ_GAIN_21 +589 0x4848 //TX_FDEQ_GAIN_22 +590 0x4848 //TX_FDEQ_GAIN_23 +591 0x0202 //TX_FDEQ_BIN_0 +592 0x0203 //TX_FDEQ_BIN_1 +593 0x0303 //TX_FDEQ_BIN_2 +594 0x0304 //TX_FDEQ_BIN_3 +595 0x0405 //TX_FDEQ_BIN_4 +596 0x0506 //TX_FDEQ_BIN_5 +597 0x0708 //TX_FDEQ_BIN_6 +598 0x090A //TX_FDEQ_BIN_7 +599 0x0B0C //TX_FDEQ_BIN_8 +600 0x0D0E //TX_FDEQ_BIN_9 +601 0x1013 //TX_FDEQ_BIN_10 +602 0x1719 //TX_FDEQ_BIN_11 +603 0x1B1E //TX_FDEQ_BIN_12 +604 0x1E1E //TX_FDEQ_BIN_13 +605 0x1E28 //TX_FDEQ_BIN_14 +606 0x284A //TX_FDEQ_BIN_15 +607 0x0000 //TX_FDEQ_BIN_16 +608 0x0000 //TX_FDEQ_BIN_17 +609 0x0000 //TX_FDEQ_BIN_18 +610 0x0000 //TX_FDEQ_BIN_19 +611 0x0000 //TX_FDEQ_BIN_20 +612 0x0000 //TX_FDEQ_BIN_21 +613 0x0000 //TX_FDEQ_BIN_22 +614 0x0000 //TX_FDEQ_BIN_23 +615 0x0000 //TX_FDEQ_PADDING +616 0x0020 //TX_PREEQ_SUBNUM_MIC0 +617 0x4848 //TX_PREEQ_GAIN_MIC0_0 +618 0x4848 //TX_PREEQ_GAIN_MIC0_1 +619 0x4848 //TX_PREEQ_GAIN_MIC0_2 +620 0x4848 //TX_PREEQ_GAIN_MIC0_3 +621 0x4848 //TX_PREEQ_GAIN_MIC0_4 +622 0x4848 //TX_PREEQ_GAIN_MIC0_5 +623 0x4848 //TX_PREEQ_GAIN_MIC0_6 +624 0x4848 //TX_PREEQ_GAIN_MIC0_7 +625 0x4848 //TX_PREEQ_GAIN_MIC0_8 +626 0x4848 //TX_PREEQ_GAIN_MIC0_9 +627 0x4848 //TX_PREEQ_GAIN_MIC0_10 +628 0x4848 //TX_PREEQ_GAIN_MIC0_11 +629 0x4848 //TX_PREEQ_GAIN_MIC0_12 +630 0x4848 //TX_PREEQ_GAIN_MIC0_13 +631 0x4848 //TX_PREEQ_GAIN_MIC0_14 +632 0x4848 //TX_PREEQ_GAIN_MIC0_15 +633 0x4848 //TX_PREEQ_GAIN_MIC0_16 +634 0x4848 //TX_PREEQ_GAIN_MIC0_17 +635 0x4848 //TX_PREEQ_GAIN_MIC0_18 +636 0x4848 //TX_PREEQ_GAIN_MIC0_19 +637 0x4848 //TX_PREEQ_GAIN_MIC0_20 +638 0x4848 //TX_PREEQ_GAIN_MIC0_21 +639 0x4848 //TX_PREEQ_GAIN_MIC0_22 +640 0x4848 //TX_PREEQ_GAIN_MIC0_23 +641 0x0202 //TX_PREEQ_BIN_MIC0_0 +642 0x0203 //TX_PREEQ_BIN_MIC0_1 +643 0x0303 //TX_PREEQ_BIN_MIC0_2 +644 0x0304 //TX_PREEQ_BIN_MIC0_3 +645 0x0405 //TX_PREEQ_BIN_MIC0_4 +646 0x0506 //TX_PREEQ_BIN_MIC0_5 +647 0x0708 //TX_PREEQ_BIN_MIC0_6 +648 0x090A //TX_PREEQ_BIN_MIC0_7 +649 0x0B0C //TX_PREEQ_BIN_MIC0_8 +650 0x0D0E //TX_PREEQ_BIN_MIC0_9 +651 0x1013 //TX_PREEQ_BIN_MIC0_10 +652 0x1719 //TX_PREEQ_BIN_MIC0_11 +653 0x1B1E //TX_PREEQ_BIN_MIC0_12 +654 0x1E1E //TX_PREEQ_BIN_MIC0_13 +655 0x1E28 //TX_PREEQ_BIN_MIC0_14 +656 0x3042 //TX_PREEQ_BIN_MIC0_15 +657 0x0000 //TX_PREEQ_BIN_MIC0_16 +658 0x0000 //TX_PREEQ_BIN_MIC0_17 +659 0x0000 //TX_PREEQ_BIN_MIC0_18 +660 0x0000 //TX_PREEQ_BIN_MIC0_19 +661 0x0000 //TX_PREEQ_BIN_MIC0_20 +662 0x0000 //TX_PREEQ_BIN_MIC0_21 +663 0x0000 //TX_PREEQ_BIN_MIC0_22 +664 0x0000 //TX_PREEQ_BIN_MIC0_23 +665 0x0020 //TX_PREEQ_SUBNUM_MIC1 +666 0x4848 //TX_PREEQ_GAIN_MIC1_0 +667 0x4848 //TX_PREEQ_GAIN_MIC1_1 +668 0x4848 //TX_PREEQ_GAIN_MIC1_2 +669 0x4848 //TX_PREEQ_GAIN_MIC1_3 +670 0x4848 //TX_PREEQ_GAIN_MIC1_4 +671 0x4848 //TX_PREEQ_GAIN_MIC1_5 +672 0x494A //TX_PREEQ_GAIN_MIC1_6 +673 0x4B4C //TX_PREEQ_GAIN_MIC1_7 +674 0x4D4E //TX_PREEQ_GAIN_MIC1_8 +675 0x4F52 //TX_PREEQ_GAIN_MIC1_9 +676 0x5355 //TX_PREEQ_GAIN_MIC1_10 +677 0x585C //TX_PREEQ_GAIN_MIC1_11 +678 0x616A //TX_PREEQ_GAIN_MIC1_12 +679 0x726E //TX_PREEQ_GAIN_MIC1_13 +680 0x5C48 //TX_PREEQ_GAIN_MIC1_14 +681 0x3B38 //TX_PREEQ_GAIN_MIC1_15 +682 0x4848 //TX_PREEQ_GAIN_MIC1_16 +683 0x4848 //TX_PREEQ_GAIN_MIC1_17 +684 0x4848 //TX_PREEQ_GAIN_MIC1_18 +685 0x4848 //TX_PREEQ_GAIN_MIC1_19 +686 0x4848 //TX_PREEQ_GAIN_MIC1_20 +687 0x4848 //TX_PREEQ_GAIN_MIC1_21 +688 0x4848 //TX_PREEQ_GAIN_MIC1_22 +689 0x4848 //TX_PREEQ_GAIN_MIC1_23 +690 0x0202 //TX_PREEQ_BIN_MIC1_0 +691 0x0203 //TX_PREEQ_BIN_MIC1_1 +692 0x0303 //TX_PREEQ_BIN_MIC1_2 +693 0x0304 //TX_PREEQ_BIN_MIC1_3 +694 0x0405 //TX_PREEQ_BIN_MIC1_4 +695 0x0506 //TX_PREEQ_BIN_MIC1_5 +696 0x0708 //TX_PREEQ_BIN_MIC1_6 +697 0x090A //TX_PREEQ_BIN_MIC1_7 +698 0x0B0C //TX_PREEQ_BIN_MIC1_8 +699 0x0D0E //TX_PREEQ_BIN_MIC1_9 +700 0x1013 //TX_PREEQ_BIN_MIC1_10 +701 0x1719 //TX_PREEQ_BIN_MIC1_11 +702 0x1B1E //TX_PREEQ_BIN_MIC1_12 +703 0x1E1E //TX_PREEQ_BIN_MIC1_13 +704 0x1E28 //TX_PREEQ_BIN_MIC1_14 +705 0x3042 //TX_PREEQ_BIN_MIC1_15 +706 0x0000 //TX_PREEQ_BIN_MIC1_16 +707 0x0000 //TX_PREEQ_BIN_MIC1_17 +708 0x0000 //TX_PREEQ_BIN_MIC1_18 +709 0x0000 //TX_PREEQ_BIN_MIC1_19 +710 0x0000 //TX_PREEQ_BIN_MIC1_20 +711 0x0000 //TX_PREEQ_BIN_MIC1_21 +712 0x0000 //TX_PREEQ_BIN_MIC1_22 +713 0x0000 //TX_PREEQ_BIN_MIC1_23 +714 0x0020 //TX_PREEQ_SUBNUM_MIC2 +715 0x4848 //TX_PREEQ_GAIN_MIC2_0 +716 0x4848 //TX_PREEQ_GAIN_MIC2_1 +717 0x4848 //TX_PREEQ_GAIN_MIC2_2 +718 0x4848 //TX_PREEQ_GAIN_MIC2_3 +719 0x4848 //TX_PREEQ_GAIN_MIC2_4 +720 0x4848 //TX_PREEQ_GAIN_MIC2_5 +721 0x4849 //TX_PREEQ_GAIN_MIC2_6 +722 0x4A4A //TX_PREEQ_GAIN_MIC2_7 +723 0x4B4B //TX_PREEQ_GAIN_MIC2_8 +724 0x4C4D //TX_PREEQ_GAIN_MIC2_9 +725 0x4D4E //TX_PREEQ_GAIN_MIC2_10 +726 0x4F4F //TX_PREEQ_GAIN_MIC2_11 +727 0x504F //TX_PREEQ_GAIN_MIC2_12 +728 0x4C49 //TX_PREEQ_GAIN_MIC2_13 +729 0x4A4C //TX_PREEQ_GAIN_MIC2_14 +730 0x4F5E //TX_PREEQ_GAIN_MIC2_15 +731 0x4848 //TX_PREEQ_GAIN_MIC2_16 +732 0x4848 //TX_PREEQ_GAIN_MIC2_17 +733 0x4848 //TX_PREEQ_GAIN_MIC2_18 +734 0x4848 //TX_PREEQ_GAIN_MIC2_19 +735 0x4848 //TX_PREEQ_GAIN_MIC2_20 +736 0x4848 //TX_PREEQ_GAIN_MIC2_21 +737 0x4848 //TX_PREEQ_GAIN_MIC2_22 +738 0x4848 //TX_PREEQ_GAIN_MIC2_23 +739 0x0202 //TX_PREEQ_BIN_MIC2_0 +740 0x0203 //TX_PREEQ_BIN_MIC2_1 +741 0x0303 //TX_PREEQ_BIN_MIC2_2 +742 0x0304 //TX_PREEQ_BIN_MIC2_3 +743 0x0405 //TX_PREEQ_BIN_MIC2_4 +744 0x0506 //TX_PREEQ_BIN_MIC2_5 +745 0x0708 //TX_PREEQ_BIN_MIC2_6 +746 0x090A //TX_PREEQ_BIN_MIC2_7 +747 0x0B0C //TX_PREEQ_BIN_MIC2_8 +748 0x0D0E //TX_PREEQ_BIN_MIC2_9 +749 0x1013 //TX_PREEQ_BIN_MIC2_10 +750 0x1719 //TX_PREEQ_BIN_MIC2_11 +751 0x1B1E //TX_PREEQ_BIN_MIC2_12 +752 0x1E1E //TX_PREEQ_BIN_MIC2_13 +753 0x1E28 //TX_PREEQ_BIN_MIC2_14 +754 0x363C //TX_PREEQ_BIN_MIC2_15 +755 0x0000 //TX_PREEQ_BIN_MIC2_16 +756 0x0000 //TX_PREEQ_BIN_MIC2_17 +757 0x0000 //TX_PREEQ_BIN_MIC2_18 +758 0x0000 //TX_PREEQ_BIN_MIC2_19 +759 0x0000 //TX_PREEQ_BIN_MIC2_20 +760 0x0000 //TX_PREEQ_BIN_MIC2_21 +761 0x0000 //TX_PREEQ_BIN_MIC2_22 +762 0x0000 //TX_PREEQ_BIN_MIC2_23 +763 0x0006 //TX_MASKING_ABILITY +764 0x0800 //TX_NND_WEIGHT +765 0x0050 //TX_MIC_CALIBRATION_0 +766 0x0065 //TX_MIC_CALIBRATION_1 +767 0x0050 //TX_MIC_CALIBRATION_2 +768 0x0050 //TX_MIC_CALIBRATION_3 +769 0x0046 //TX_MIC_PWR_BIAS_0 +770 0x0040 //TX_MIC_PWR_BIAS_1 +771 0x0046 //TX_MIC_PWR_BIAS_2 +772 0x0046 //TX_MIC_PWR_BIAS_3 +773 0x0000 //TX_GAIN_LIMIT_0 +774 0x000F //TX_GAIN_LIMIT_1 +775 0x0000 //TX_GAIN_LIMIT_2 +776 0x0000 //TX_GAIN_LIMIT_3 +777 0x7F5B //TX_BVE_NOVAD0_ALPHADOWN +778 0x7FDE //TX_BVE_VAD0_ALPHAUP +779 0x7F3A //TX_BVE_VAD0_ALPHADOWN +780 0x2000 //TX_BVE_GAINWEIGHT_NOFEVADLI +781 0x7F5B //TX_BVE_FEVADLI_ALPHA +782 0x7F19 //TX_BVE_NOVAD0_ALPHAUP +783 0x0800 //TX_TDDRC_ALPHA_UP_01 +784 0x0800 //TX_TDDRC_ALPHA_UP_02 +785 0x0800 //TX_TDDRC_ALPHA_UP_03 +786 0x0800 //TX_TDDRC_ALPHA_UP_04 +787 0x7EB8 //TX_TDDRC_ALPHA_DWN_01 +788 0x7EB8 //TX_TDDRC_ALPHA_DWN_02 +789 0x7EB8 //TX_TDDRC_ALPHA_DWN_03 +790 0x7EB8 //TX_TDDRC_ALPHA_DWN_04 +791 0x7FFF //TX_TDDRC_TD_DRC_LIMIT +792 0x0800 //TX_TDDRC_POST_LIMIT_GAIN +793 0x0000 //TX_TDDRC_RESRV_0 +794 0x0000 //TX_TDDRC_RESRV_1 +795 0x0018 //TX_FDDRC_BAND_MARGIN_0 +796 0x0030 //TX_FDDRC_BAND_MARGIN_1 +797 0x0050 //TX_FDDRC_BAND_MARGIN_2 +798 0x0080 //TX_FDDRC_BAND_MARGIN_3 +799 0x0007 //TX_FDDRC_BLOCK_EXP +800 0x5000 //TX_FDDRC_THRD_2_0 +801 0x5000 //TX_FDDRC_THRD_2_1 +802 0x5000 //TX_FDDRC_THRD_2_2 +803 0x5000 //TX_FDDRC_THRD_2_3 +804 0x6400 //TX_FDDRC_THRD_3_0 +805 0x6400 //TX_FDDRC_THRD_3_1 +806 0x6400 //TX_FDDRC_THRD_3_2 +807 0x6400 //TX_FDDRC_THRD_3_3 +808 0x2000 //TX_FDDRC_SLANT_0_0 +809 0x2000 //TX_FDDRC_SLANT_0_1 +810 0x2000 //TX_FDDRC_SLANT_0_2 +811 0x2000 //TX_FDDRC_SLANT_0_3 +812 0x5333 //TX_FDDRC_SLANT_1_0 +813 0x5333 //TX_FDDRC_SLANT_1_1 +814 0x5333 //TX_FDDRC_SLANT_1_2 +815 0x5333 //TX_FDDRC_SLANT_1_3 +816 0x0010 //TX_DEADMIC_SILENCE_TH +817 0x0600 //TX_MIC_DEGRADE_TH +818 0x0078 //TX_DEADMIC_CNT +819 0x0078 //TX_MIC_DEGRADE_CNT +820 0x0000 //TX_FDDRC_RESRV_4 +821 0x0000 //TX_FDDRC_RESRV_5 +822 0x0000 //TX_FDDRC_RESRV_6 +823 0x7FFF //TX_KS_NOISEPASTE_FACTOR +824 0x0001 //TX_KS_CONFIG +825 0x7FFF //TX_KS_GAIN_MIN +826 0x0000 //TX_KS_RESRV_0 +827 0x0000 //TX_KS_RESRV_1 +828 0x0000 //TX_KS_RESRV_2 +829 0x7C00 //TX_LAMBDA_PKA_FP +830 0x2000 //TX_TPKA_FP +831 0x0080 //TX_MIN_G_FP +832 0x2000 //TX_MAX_G_FP +833 0x4848 //TX_FFP_FP_K_METAL +834 0x4000 //TX_A_POST_FLT_FP +835 0x0F5C //TX_RTO_OUTBEAM_TH +836 0x4CCD //TX_TPKA_FP_THD +837 0x0000 //TX_MAX_G_FP_BLK +838 0x0000 //TX_FFP_FADEIN +839 0x0000 //TX_FFP_FADEOUT +840 0x0000 //TX_WHISPERCTH +841 0x0000 //TX_WHISPERHOLDT +842 0x0000 //TX_WHISP_ENTHH +843 0x0000 //TX_WHISP_ENTHL +844 0x0000 //TX_WHISP_RTOTH +845 0x0000 //TX_WHISP_RTOTH2 +846 0x0096 //TX_MUTE_PERIOD +847 0x0000 //TX_FADE_IN_PERIOD +848 0x0100 //TX_FFP_RESRV_2 +849 0x0020 //TX_FFP_RESRV_3 +850 0x0000 //TX_FFP_RESRV_4 +851 0x0000 //TX_FFP_RESRV_5 +852 0x0000 //TX_FFP_RESRV_6 +853 0x0002 //TX_FILTINDX +854 0x0001 //TX_TDDRC_THRD_0 +855 0x0002 //TX_TDDRC_THRD_1 +856 0x1000 //TX_TDDRC_THRD_2 +857 0x1000 //TX_TDDRC_THRD_3 +858 0x6000 //TX_TDDRC_SLANT_0 +859 0x6000 //TX_TDDRC_SLANT_1 +860 0x0800 //TX_TDDRC_ALPHA_UP_00 +861 0x7EB8 //TX_TDDRC_ALPHA_DWN_00 +862 0x0000 //TX_TDDRC_HMNC_FLAG +863 0x199A //TX_TDDRC_HMNC_GAIN +864 0x0000 //TX_TDDRC_SMT_FLAG +865 0x0CCD //TX_TDDRC_SMT_W +866 0x0E21 //TX_TDDRC_DRC_GAIN +867 0x7FFF //TX_TDDRC_LMT_THRD +868 0x0000 //TX_TDDRC_LMT_ALPHA +869 0x0000 //TX_TFMASKLTH +870 0x0000 //TX_TFMASKLTHL +871 0x0CCD //TX_TFMASKHTH +872 0x0CCD //TX_TFMASKLTH_BINVAD +873 0xF333 //TX_TFMASKLTH_NS_EST +874 0x2CCD //TX_TFMASKLTH_DOA +875 0xECCD //TX_TFMASKTH_BLESSCUT +876 0x1000 //TX_B_LESSCUT_RTO_MASK +877 0x3800 //TX_SB_RHO_MEAN_TH_ABN +878 0x2000 //TX_B_POST_FLT_MASK +879 0x0000 //TX_B_POST_FLT_MASK1 +880 0x5333 //TX_GAIN_WIND_MASK +881 0x7FFF //TX_TFMASK_BFSTRICT_MUSIC +882 0x0000 //TX_TFMASK_BFSTRICT_NOMUSIC +883 0x7333 //TX_FASTNS_OUTIN_TH +884 0x0CCD //TX_FASTNS_TFMASK_TH +885 0x0CCD //TX_FASTNS_TFMASKBIN_TH1 +886 0x0CCD //TX_FASTNS_TFMASKBIN_TH2 +887 0x0CCD //TX_FASTNS_TFMASKBIN_TH3 +888 0x00C8 //TX_FASTNS_ARSPC_TH +889 0xC000 //TX_FASTNS_MASK5_TH +890 0x4848 //TX_POSTSSA_MIN_G_VR_MASK +891 0x4000 //TX_A_LESSCUT_RTO_MASK +892 0x1770 //TX_FASTNS_NOISETH +893 0xC000 //TX_FASTNS_SSA_THLFL +894 0xC000 //TX_FASTNS_SSA_THHFL +895 0xCCCC //TX_FASTNS_SSA_THLFH +896 0xD999 //TX_FASTNS_SSA_THHFH +897 0x2339 //TX_SENDFUNC_REG_MICMUTE +898 0x0021 //TX_SENDFUNC_REG_MICMUTE1 +899 0x02BC //TX_MICMUTE_RATIO_THR +900 0x0140 //TX_MICMUTE_AMP_THR +901 0x0004 //TX_MICMUTE_HPF_IND +902 0x00C0 //TX_MICMUTE_LOG_EYR_TH +903 0x0008 //TX_MICMUTE_CVG_TIME +904 0x0008 //TX_MICMUTE_RELEASE_TIME +905 0x01FE //TX_MIC_VOLUME_MIC0MUTE +906 0x0020 //TX_MICMUTE_EPD_OFFSET_0 +907 0x001E //TX_MICMUTE_FRQ_AEC_L +908 0x7999 //TX_MICMUTE_EAD_THR +909 0x7FFF //TX_MICMUTE_LAMBDA_CB_NLE +910 0x7FFF //TX_MICMUTE_LAMBDA_RE_EST +911 0x4000 //TX_DTD_THR1_MICMUTE_0 +912 0x7000 //TX_DTD_THR1_MICMUTE_1 +913 0x7FFF //TX_DTD_THR1_MICMUTE_2 +914 0x7FFF //TX_DTD_THR1_MICMUTE_3 +915 0x6CCC //TX_DTD_THR2_MICMUTE_0 +916 0x0400 //TX_MICMUTE_MIN_EQ_RE_EST_0 +917 0x0400 //TX_MICMUTE_MIN_EQ_RE_EST_1 +918 0x1000 //TX_MICMUTE_MIN_EQ_RE_EST_2 +919 0x7FFF //TX_MICMUTE_MIN_EQ_RE_EST_3 +920 0x7FFF //TX_MICMUTE_MIN_EQ_RE_EST_4 +921 0x4000 //TX_MICMUTE_C_POST_FLT +922 0x03E8 //TX_MICMUTE_DT_CUT_K +923 0x0001 //TX_MICMUTE_DT_CUT_THR +924 0x03E8 //TX_MICMUTE_DT_CUT_K2 +925 0x0001 //TX_MICMUTE_DT_CUT_THR2 +926 0x0064 //TX_MICMUTE_DT2_HOLD_N +927 0x1000 //TX_MICMUTE_RATIODTH_THCUT +928 0x1000 //TX_MICMUTE_B_POST_FLT_ECHOL +929 0x7FFF //TX_MICMUTE_B_POST_FLT_ECHOH +930 0x0400 //TX_MICMUTE_C_POST_FLT_MASK +931 0x7999 //TX_MICMUTE_RATIODTL_CUT_TH +932 0x0258 //TX_MICMUTE_DT_CUT_K1 +933 0x0800 //TX_MICMUTE_N2_SN_EST +934 0xFC00 //TX_MICMUTE_THR_SN_EST_0 +935 0x001C //TX_MICMUTE_MIN_G_CTRL_0 +936 0x6000 //TX_MICMUTE_A_POST_FILT_S_0 +937 0x7000 //TX_MICMUTE_B_POST_FILT_0 +938 0x2710 //TX_MIC1RUB_AMP_THR +939 0x0010 //TX_MIC1MUTE_RATIO_THR +940 0x0450 //TX_MIC1MUTE_AMP_THR +941 0x0008 //TX_MIC1MUTE_CVG_TIME +942 0x0008 //TX_MIC1MUTE_RELEASE_TIME +943 0x0000 //TX_AMS_RESRV_01 +944 0x0000 //TX_AMS_RESRV_02 +945 0x0000 //TX_AMS_RESRV_03 +946 0x0000 //TX_AMS_RESRV_04 +947 0x0000 //TX_AMS_RESRV_05 +948 0x0000 //TX_AMS_RESRV_06 +949 0x0000 //TX_AMS_RESRV_07 +950 0x0000 //TX_AMS_RESRV_08 +951 0x0000 //TX_AMS_RESRV_09 +952 0x0000 //TX_AMS_RESRV_10 +953 0x0000 //TX_AMS_RESRV_11 +954 0x0000 //TX_AMS_RESRV_12 +955 0x0000 //TX_AMS_RESRV_13 +956 0x0000 //TX_AMS_RESRV_14 +957 0x0000 //TX_AMS_RESRV_15 +958 0x0000 //TX_AMS_RESRV_16 +959 0x0000 //TX_AMS_RESRV_17 +960 0x0000 //TX_AMS_RESRV_18 +961 0x0000 //TX_AMS_RESRV_19 +#RX +0 0x206C //RX_RECVFUNC_MODE_0 +1 0x0000 //RX_RECVFUNC_MODE_1 +2 0x0003 //RX_SAMPLINGFREQ_SIG +3 0x0003 //RX_SAMPLINGFREQ_PROC +4 0x000A //RX_FRAME_SZ +5 0x0000 //RX_DELAY_OPT +6 0x6000 //RX_TDDRC_ALPHA_UP_1 +7 0x6000 //RX_TDDRC_ALPHA_UP_2 +8 0x6000 //RX_TDDRC_ALPHA_UP_3 +9 0x1000 //RX_TDDRC_ALPHA_UP_4 +10 0x0800 //RX_PGA +11 0x7652 //RX_A_HP +12 0x4000 //RX_B_PE +13 0x7800 //RX_THR_PITCH_DET_0 +14 0x7000 //RX_THR_PITCH_DET_1 +15 0x6000 //RX_THR_PITCH_DET_2 +16 0x0008 //RX_PITCH_BFR_LEN +17 0x0003 //RX_SBD_PITCH_DET +18 0x0100 //RX_PP_RESRV_0 +19 0x0020 //RX_PP_RESRV_1 +20 0x0400 //RX_N_SN_EST +21 0x000C //RX_N2_SN_EST +22 0x0010 //RX_NS_LVL_CTRL +23 0xF800 //RX_THR_SN_EST +24 0x7E00 //RX_LAMBDA_PFILT +25 0x000A //RX_FENS_RESRV_0 +26 0x0190 //RX_FENS_RESRV_1 +27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +30 0x0002 //RX_EXTRA_NS_L +31 0x0800 //RX_EXTRA_NS_A +32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +33 0x7214 //RX_TDDRC_LIMITER_THRD +34 0x0800 //RX_TDDRC_LIMITER_GAIN +35 0x199A //RX_A_POST_FLT +36 0x0000 //RX_LMT_THRD +37 0x4000 //RX_LMT_ALPHA +38 0x0020 //RX_FDEQ_SUBNUM +39 0x4848 //RX_FDEQ_GAIN_0 +40 0x4848 //RX_FDEQ_GAIN_1 +41 0x4340 //RX_FDEQ_GAIN_2 +42 0x3F3D //RX_FDEQ_GAIN_3 +43 0x3935 //RX_FDEQ_GAIN_4 +44 0x3635 //RX_FDEQ_GAIN_5 +45 0x3E46 //RX_FDEQ_GAIN_6 +46 0x494C //RX_FDEQ_GAIN_7 +47 0x4E56 //RX_FDEQ_GAIN_8 +48 0x5F5B //RX_FDEQ_GAIN_9 +49 0x5B48 //RX_FDEQ_GAIN_10 +50 0x4856 //RX_FDEQ_GAIN_11 +51 0x5B60 //RX_FDEQ_GAIN_12 +52 0x7476 //RX_FDEQ_GAIN_13 +53 0x7F7C //RX_FDEQ_GAIN_14 +54 0x7068 //RX_FDEQ_GAIN_15 +55 0x4848 //RX_FDEQ_GAIN_16 +56 0x4848 //RX_FDEQ_GAIN_17 +57 0x4848 //RX_FDEQ_GAIN_18 +58 0x4848 //RX_FDEQ_GAIN_19 +59 0x4848 //RX_FDEQ_GAIN_20 +60 0x4848 //RX_FDEQ_GAIN_21 +61 0x4848 //RX_FDEQ_GAIN_22 +62 0x4848 //RX_FDEQ_GAIN_23 +63 0x0202 //RX_FDEQ_BIN_0 +64 0x0203 //RX_FDEQ_BIN_1 +65 0x0303 //RX_FDEQ_BIN_2 +66 0x0304 //RX_FDEQ_BIN_3 +67 0x0404 //RX_FDEQ_BIN_4 +68 0x0209 //RX_FDEQ_BIN_5 +69 0x0808 //RX_FDEQ_BIN_6 +70 0x090A //RX_FDEQ_BIN_7 +71 0x0B0C //RX_FDEQ_BIN_8 +72 0x0D0E //RX_FDEQ_BIN_9 +73 0x1013 //RX_FDEQ_BIN_10 +74 0x1719 //RX_FDEQ_BIN_11 +75 0x1B1E //RX_FDEQ_BIN_12 +76 0x1E1E //RX_FDEQ_BIN_13 +77 0x1E28 //RX_FDEQ_BIN_14 +78 0x282C //RX_FDEQ_BIN_15 +79 0x0000 //RX_FDEQ_BIN_16 +80 0x0000 //RX_FDEQ_BIN_17 +81 0x0000 //RX_FDEQ_BIN_18 +82 0x0000 //RX_FDEQ_BIN_19 +83 0x0000 //RX_FDEQ_BIN_20 +84 0x0000 //RX_FDEQ_BIN_21 +85 0x0000 //RX_FDEQ_BIN_22 +86 0x0000 //RX_FDEQ_BIN_23 +87 0x4000 //RX_FDEQ_RESRV_0 +88 0x0320 //RX_FDEQ_RESRV_1 +89 0x0018 //RX_FDDRC_BAND_MARGIN_0 +90 0x0035 //RX_FDDRC_BAND_MARGIN_1 +91 0x00D5 //RX_FDDRC_BAND_MARGIN_2 +92 0x0120 //RX_FDDRC_BAND_MARGIN_3 +93 0x0004 //RX_FDDRC_BLOCK_EXP +94 0x5000 //RX_FDDRC_THRD_2_0 +95 0x5000 //RX_FDDRC_THRD_2_1 +96 0x2000 //RX_FDDRC_THRD_2_2 +97 0x5000 //RX_FDDRC_THRD_2_3 +98 0x6400 //RX_FDDRC_THRD_3_0 +99 0x6400 //RX_FDDRC_THRD_3_1 +100 0x2000 //RX_FDDRC_THRD_3_2 +101 0x5000 //RX_FDDRC_THRD_3_3 +102 0x4000 //RX_FDDRC_SLANT_0_0 +103 0x4000 //RX_FDDRC_SLANT_0_1 +104 0x4000 //RX_FDDRC_SLANT_0_2 +105 0x4000 //RX_FDDRC_SLANT_0_3 +106 0x7FFF //RX_FDDRC_SLANT_1_0 +107 0x7FFF //RX_FDDRC_SLANT_1_1 +108 0x7FFF //RX_FDDRC_SLANT_1_2 +109 0x7FFF //RX_FDDRC_SLANT_1_3 +110 0x0000 //RX_FDDRC_RESRV_0 +111 0x0002 //RX_FILTINDX +112 0x0002 //RX_TDDRC_THRD_0 +113 0x0004 //RX_TDDRC_THRD_1 +114 0x1500 //RX_TDDRC_THRD_2 +115 0x1500 //RX_TDDRC_THRD_3 +116 0x3000 //RX_TDDRC_SLANT_0 +117 0x6E00 //RX_TDDRC_SLANT_1 +118 0x6000 //RX_TDDRC_ALPHA_UP_0 +119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +120 0x0000 //RX_TDDRC_HMNC_FLAG +121 0x199A //RX_TDDRC_HMNC_GAIN +122 0x0001 //RX_TDDRC_SMT_FLAG +123 0x0CCD //RX_TDDRC_SMT_W +124 0x02FD //RX_TDDRC_DRC_GAIN +125 0x7C00 //RX_LAMBDA_PKA_FP +126 0x2000 //RX_TPKA_FP +127 0x2000 //RX_MIN_G_FP +128 0x0080 //RX_MAX_G_FP +129 0x0100 //RX_SPK_VOL +130 0x0000 //RX_VOL_RESRV_0 +131 0x0000 //RX_MAXLEVEL_CNG +132 0x3000 //RX_BWE_UV_TH +133 0x3000 //RX_BWE_UV_TH2 +134 0x1800 //RX_BWE_UV_TH3 +135 0x1000 //RX_BWE_V_TH +136 0x04CD //RX_BWE_GAIN1_V_TH1 +137 0x0F33 //RX_BWE_GAIN1_V_TH2 +138 0x7333 //RX_BWE_UV_EQ +139 0x199A //RX_BWE_V_EQ +140 0x7333 //RX_BWE_TONE_TH +141 0x0004 //RX_BWE_UV_HOLD_T +142 0x6CCD //RX_BWE_GAIN2_ALPHA +143 0x799A //RX_BWE_GAIN3_ALPHA +144 0x001E //RX_BWE_CUTOFF +145 0x3000 //RX_BWE_GAINFILL +146 0x3200 //RX_BWE_MAXTH_TONE +147 0x2000 //RX_BWE_EQ_0 +148 0x2000 //RX_BWE_EQ_1 +149 0x2000 //RX_BWE_EQ_2 +150 0x2000 //RX_BWE_EQ_3 +151 0x2000 //RX_BWE_EQ_4 +152 0x2000 //RX_BWE_EQ_5 +153 0x2000 //RX_BWE_EQ_6 +154 0x0000 //RX_BWE_RESRV_0 +155 0x0000 //RX_BWE_RESRV_1 +156 0x0000 //RX_BWE_RESRV_2 +#VOL 0 +6 0x6000 //RX_TDDRC_ALPHA_UP_1 +7 0x6000 //RX_TDDRC_ALPHA_UP_2 +8 0x6000 //RX_TDDRC_ALPHA_UP_3 +9 0x1000 //RX_TDDRC_ALPHA_UP_4 +27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +33 0x7214 //RX_TDDRC_LIMITER_THRD +34 0x0800 //RX_TDDRC_LIMITER_GAIN +112 0x0002 //RX_TDDRC_THRD_0 +113 0x0004 //RX_TDDRC_THRD_1 +114 0x1500 //RX_TDDRC_THRD_2 +115 0x1500 //RX_TDDRC_THRD_3 +116 0x3000 //RX_TDDRC_SLANT_0 +117 0x6E00 //RX_TDDRC_SLANT_1 +118 0x6000 //RX_TDDRC_ALPHA_UP_0 +119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +120 0x0000 //RX_TDDRC_HMNC_FLAG +121 0x199A //RX_TDDRC_HMNC_GAIN +122 0x0001 //RX_TDDRC_SMT_FLAG +123 0x0CCD //RX_TDDRC_SMT_W +124 0x02FD //RX_TDDRC_DRC_GAIN +38 0x0020 //RX_FDEQ_SUBNUM +39 0x5D48 //RX_FDEQ_GAIN_0 +40 0x584E //RX_FDEQ_GAIN_1 +41 0x4140 //RX_FDEQ_GAIN_2 +42 0x3F46 //RX_FDEQ_GAIN_3 +43 0x4F45 //RX_FDEQ_GAIN_4 +44 0x453F //RX_FDEQ_GAIN_5 +45 0x3E46 //RX_FDEQ_GAIN_6 +46 0x4947 //RX_FDEQ_GAIN_7 +47 0x464A //RX_FDEQ_GAIN_8 +48 0x5264 //RX_FDEQ_GAIN_9 +49 0x6662 //RX_FDEQ_GAIN_10 +50 0x574D //RX_FDEQ_GAIN_11 +51 0x4E56 //RX_FDEQ_GAIN_12 +52 0x7476 //RX_FDEQ_GAIN_13 +53 0x7F7C //RX_FDEQ_GAIN_14 +54 0x7068 //RX_FDEQ_GAIN_15 +55 0x4848 //RX_FDEQ_GAIN_16 +56 0x4848 //RX_FDEQ_GAIN_17 +57 0x4848 //RX_FDEQ_GAIN_18 +58 0x4848 //RX_FDEQ_GAIN_19 +59 0x4848 //RX_FDEQ_GAIN_20 +60 0x4848 //RX_FDEQ_GAIN_21 +61 0x4848 //RX_FDEQ_GAIN_22 +62 0x4848 //RX_FDEQ_GAIN_23 +63 0x0202 //RX_FDEQ_BIN_0 +64 0x0203 //RX_FDEQ_BIN_1 +65 0x0303 //RX_FDEQ_BIN_2 +66 0x0304 //RX_FDEQ_BIN_3 +67 0x0404 //RX_FDEQ_BIN_4 +68 0x010A //RX_FDEQ_BIN_5 +69 0x0808 //RX_FDEQ_BIN_6 +70 0x090A //RX_FDEQ_BIN_7 +71 0x0B0C //RX_FDEQ_BIN_8 +72 0x0D0E //RX_FDEQ_BIN_9 +73 0x1013 //RX_FDEQ_BIN_10 +74 0x1719 //RX_FDEQ_BIN_11 +75 0x1B1E //RX_FDEQ_BIN_12 +76 0x1E1E //RX_FDEQ_BIN_13 +77 0x1E28 //RX_FDEQ_BIN_14 +78 0x282C //RX_FDEQ_BIN_15 +79 0x0000 //RX_FDEQ_BIN_16 +80 0x0000 //RX_FDEQ_BIN_17 +81 0x0000 //RX_FDEQ_BIN_18 +82 0x0000 //RX_FDEQ_BIN_19 +83 0x0000 //RX_FDEQ_BIN_20 +84 0x0000 //RX_FDEQ_BIN_21 +85 0x0000 //RX_FDEQ_BIN_22 +86 0x0000 //RX_FDEQ_BIN_23 +87 0x4000 //RX_FDEQ_RESRV_0 +88 0x0320 //RX_FDEQ_RESRV_1 +89 0x0018 //RX_FDDRC_BAND_MARGIN_0 +90 0x0035 //RX_FDDRC_BAND_MARGIN_1 +91 0x00D5 //RX_FDDRC_BAND_MARGIN_2 +92 0x0120 //RX_FDDRC_BAND_MARGIN_3 +93 0x0004 //RX_FDDRC_BLOCK_EXP +94 0x5000 //RX_FDDRC_THRD_2_0 +95 0x5000 //RX_FDDRC_THRD_2_1 +96 0x2000 //RX_FDDRC_THRD_2_2 +97 0x5000 //RX_FDDRC_THRD_2_3 +98 0x6400 //RX_FDDRC_THRD_3_0 +99 0x6400 //RX_FDDRC_THRD_3_1 +100 0x2000 //RX_FDDRC_THRD_3_2 +101 0x5000 //RX_FDDRC_THRD_3_3 +102 0x4000 //RX_FDDRC_SLANT_0_0 +103 0x4000 //RX_FDDRC_SLANT_0_1 +104 0x4000 //RX_FDDRC_SLANT_0_2 +105 0x4000 //RX_FDDRC_SLANT_0_3 +106 0x7FFF //RX_FDDRC_SLANT_1_0 +107 0x7FFF //RX_FDDRC_SLANT_1_1 +108 0x7FFF //RX_FDDRC_SLANT_1_2 +109 0x7FFF //RX_FDDRC_SLANT_1_3 +110 0x0000 //RX_FDDRC_RESRV_0 +129 0x0019 //RX_SPK_VOL +130 0x0000 //RX_VOL_RESRV_0 +#VOL 1 +6 0x6000 //RX_TDDRC_ALPHA_UP_1 +7 0x6000 //RX_TDDRC_ALPHA_UP_2 +8 0x6000 //RX_TDDRC_ALPHA_UP_3 +9 0x1000 //RX_TDDRC_ALPHA_UP_4 +27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +33 0x7214 //RX_TDDRC_LIMITER_THRD +34 0x0800 //RX_TDDRC_LIMITER_GAIN +112 0x0002 //RX_TDDRC_THRD_0 +113 0x0004 //RX_TDDRC_THRD_1 +114 0x1500 //RX_TDDRC_THRD_2 +115 0x1500 //RX_TDDRC_THRD_3 +116 0x3000 //RX_TDDRC_SLANT_0 +117 0x6E00 //RX_TDDRC_SLANT_1 +118 0x6000 //RX_TDDRC_ALPHA_UP_0 +119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +120 0x0000 //RX_TDDRC_HMNC_FLAG +121 0x199A //RX_TDDRC_HMNC_GAIN +122 0x0001 //RX_TDDRC_SMT_FLAG +123 0x0CCD //RX_TDDRC_SMT_W +124 0x02FD //RX_TDDRC_DRC_GAIN +38 0x0020 //RX_FDEQ_SUBNUM +39 0x5D48 //RX_FDEQ_GAIN_0 +40 0x584E //RX_FDEQ_GAIN_1 +41 0x4140 //RX_FDEQ_GAIN_2 +42 0x3F46 //RX_FDEQ_GAIN_3 +43 0x4F45 //RX_FDEQ_GAIN_4 +44 0x453F //RX_FDEQ_GAIN_5 +45 0x3E46 //RX_FDEQ_GAIN_6 +46 0x4947 //RX_FDEQ_GAIN_7 +47 0x464A //RX_FDEQ_GAIN_8 +48 0x5264 //RX_FDEQ_GAIN_9 +49 0x6662 //RX_FDEQ_GAIN_10 +50 0x574D //RX_FDEQ_GAIN_11 +51 0x4E56 //RX_FDEQ_GAIN_12 +52 0x7476 //RX_FDEQ_GAIN_13 +53 0x7F7C //RX_FDEQ_GAIN_14 +54 0x7068 //RX_FDEQ_GAIN_15 +55 0x4848 //RX_FDEQ_GAIN_16 +56 0x4848 //RX_FDEQ_GAIN_17 +57 0x4848 //RX_FDEQ_GAIN_18 +58 0x4848 //RX_FDEQ_GAIN_19 +59 0x4848 //RX_FDEQ_GAIN_20 +60 0x4848 //RX_FDEQ_GAIN_21 +61 0x4848 //RX_FDEQ_GAIN_22 +62 0x4848 //RX_FDEQ_GAIN_23 +63 0x0202 //RX_FDEQ_BIN_0 +64 0x0203 //RX_FDEQ_BIN_1 +65 0x0303 //RX_FDEQ_BIN_2 +66 0x0304 //RX_FDEQ_BIN_3 +67 0x0404 //RX_FDEQ_BIN_4 +68 0x010A //RX_FDEQ_BIN_5 +69 0x0808 //RX_FDEQ_BIN_6 +70 0x090A //RX_FDEQ_BIN_7 +71 0x0B0C //RX_FDEQ_BIN_8 +72 0x0D0E //RX_FDEQ_BIN_9 +73 0x1013 //RX_FDEQ_BIN_10 +74 0x1719 //RX_FDEQ_BIN_11 +75 0x1B1E //RX_FDEQ_BIN_12 +76 0x1E1E //RX_FDEQ_BIN_13 +77 0x1E28 //RX_FDEQ_BIN_14 +78 0x282C //RX_FDEQ_BIN_15 +79 0x0000 //RX_FDEQ_BIN_16 +80 0x0000 //RX_FDEQ_BIN_17 +81 0x0000 //RX_FDEQ_BIN_18 +82 0x0000 //RX_FDEQ_BIN_19 +83 0x0000 //RX_FDEQ_BIN_20 +84 0x0000 //RX_FDEQ_BIN_21 +85 0x0000 //RX_FDEQ_BIN_22 +86 0x0000 //RX_FDEQ_BIN_23 +87 0x4000 //RX_FDEQ_RESRV_0 +88 0x0320 //RX_FDEQ_RESRV_1 +89 0x0018 //RX_FDDRC_BAND_MARGIN_0 +90 0x0035 //RX_FDDRC_BAND_MARGIN_1 +91 0x00D5 //RX_FDDRC_BAND_MARGIN_2 +92 0x0120 //RX_FDDRC_BAND_MARGIN_3 +93 0x0004 //RX_FDDRC_BLOCK_EXP +94 0x5000 //RX_FDDRC_THRD_2_0 +95 0x5000 //RX_FDDRC_THRD_2_1 +96 0x2000 //RX_FDDRC_THRD_2_2 +97 0x5000 //RX_FDDRC_THRD_2_3 +98 0x6400 //RX_FDDRC_THRD_3_0 +99 0x6400 //RX_FDDRC_THRD_3_1 +100 0x2000 //RX_FDDRC_THRD_3_2 +101 0x5000 //RX_FDDRC_THRD_3_3 +102 0x4000 //RX_FDDRC_SLANT_0_0 +103 0x4000 //RX_FDDRC_SLANT_0_1 +104 0x4000 //RX_FDDRC_SLANT_0_2 +105 0x4000 //RX_FDDRC_SLANT_0_3 +106 0x7FFF //RX_FDDRC_SLANT_1_0 +107 0x7FFF //RX_FDDRC_SLANT_1_1 +108 0x7FFF //RX_FDDRC_SLANT_1_2 +109 0x7FFF //RX_FDDRC_SLANT_1_3 +110 0x0000 //RX_FDDRC_RESRV_0 +129 0x0023 //RX_SPK_VOL +130 0x0000 //RX_VOL_RESRV_0 +#VOL 2 +6 0x6000 //RX_TDDRC_ALPHA_UP_1 +7 0x6000 //RX_TDDRC_ALPHA_UP_2 +8 0x6000 //RX_TDDRC_ALPHA_UP_3 +9 0x1000 //RX_TDDRC_ALPHA_UP_4 +27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +33 0x7214 //RX_TDDRC_LIMITER_THRD +34 0x0800 //RX_TDDRC_LIMITER_GAIN +112 0x0002 //RX_TDDRC_THRD_0 +113 0x0004 //RX_TDDRC_THRD_1 +114 0x1500 //RX_TDDRC_THRD_2 +115 0x1500 //RX_TDDRC_THRD_3 +116 0x3000 //RX_TDDRC_SLANT_0 +117 0x6E00 //RX_TDDRC_SLANT_1 +118 0x6000 //RX_TDDRC_ALPHA_UP_0 +119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +120 0x0000 //RX_TDDRC_HMNC_FLAG +121 0x199A //RX_TDDRC_HMNC_GAIN +122 0x0001 //RX_TDDRC_SMT_FLAG +123 0x0CCD //RX_TDDRC_SMT_W +124 0x02FD //RX_TDDRC_DRC_GAIN +38 0x0020 //RX_FDEQ_SUBNUM +39 0x5D48 //RX_FDEQ_GAIN_0 +40 0x584E //RX_FDEQ_GAIN_1 +41 0x4140 //RX_FDEQ_GAIN_2 +42 0x3F46 //RX_FDEQ_GAIN_3 +43 0x4F45 //RX_FDEQ_GAIN_4 +44 0x453F //RX_FDEQ_GAIN_5 +45 0x3E46 //RX_FDEQ_GAIN_6 +46 0x4947 //RX_FDEQ_GAIN_7 +47 0x464A //RX_FDEQ_GAIN_8 +48 0x5264 //RX_FDEQ_GAIN_9 +49 0x6662 //RX_FDEQ_GAIN_10 +50 0x574D //RX_FDEQ_GAIN_11 +51 0x4E56 //RX_FDEQ_GAIN_12 +52 0x7476 //RX_FDEQ_GAIN_13 +53 0x7F7C //RX_FDEQ_GAIN_14 +54 0x7068 //RX_FDEQ_GAIN_15 +55 0x4848 //RX_FDEQ_GAIN_16 +56 0x4848 //RX_FDEQ_GAIN_17 +57 0x4848 //RX_FDEQ_GAIN_18 +58 0x4848 //RX_FDEQ_GAIN_19 +59 0x4848 //RX_FDEQ_GAIN_20 +60 0x4848 //RX_FDEQ_GAIN_21 +61 0x4848 //RX_FDEQ_GAIN_22 +62 0x4848 //RX_FDEQ_GAIN_23 +63 0x0202 //RX_FDEQ_BIN_0 +64 0x0203 //RX_FDEQ_BIN_1 +65 0x0303 //RX_FDEQ_BIN_2 +66 0x0304 //RX_FDEQ_BIN_3 +67 0x0404 //RX_FDEQ_BIN_4 +68 0x010A //RX_FDEQ_BIN_5 +69 0x0808 //RX_FDEQ_BIN_6 +70 0x090A //RX_FDEQ_BIN_7 +71 0x0B0C //RX_FDEQ_BIN_8 +72 0x0D0E //RX_FDEQ_BIN_9 +73 0x1013 //RX_FDEQ_BIN_10 +74 0x1719 //RX_FDEQ_BIN_11 +75 0x1B1E //RX_FDEQ_BIN_12 +76 0x1E1E //RX_FDEQ_BIN_13 +77 0x1E28 //RX_FDEQ_BIN_14 +78 0x282C //RX_FDEQ_BIN_15 +79 0x0000 //RX_FDEQ_BIN_16 +80 0x0000 //RX_FDEQ_BIN_17 +81 0x0000 //RX_FDEQ_BIN_18 +82 0x0000 //RX_FDEQ_BIN_19 +83 0x0000 //RX_FDEQ_BIN_20 +84 0x0000 //RX_FDEQ_BIN_21 +85 0x0000 //RX_FDEQ_BIN_22 +86 0x0000 //RX_FDEQ_BIN_23 +87 0x4000 //RX_FDEQ_RESRV_0 +88 0x0320 //RX_FDEQ_RESRV_1 +89 0x0018 //RX_FDDRC_BAND_MARGIN_0 +90 0x0035 //RX_FDDRC_BAND_MARGIN_1 +91 0x00D5 //RX_FDDRC_BAND_MARGIN_2 +92 0x0120 //RX_FDDRC_BAND_MARGIN_3 +93 0x0004 //RX_FDDRC_BLOCK_EXP +94 0x5000 //RX_FDDRC_THRD_2_0 +95 0x5000 //RX_FDDRC_THRD_2_1 +96 0x2000 //RX_FDDRC_THRD_2_2 +97 0x5000 //RX_FDDRC_THRD_2_3 +98 0x6400 //RX_FDDRC_THRD_3_0 +99 0x6400 //RX_FDDRC_THRD_3_1 +100 0x2000 //RX_FDDRC_THRD_3_2 +101 0x5000 //RX_FDDRC_THRD_3_3 +102 0x4000 //RX_FDDRC_SLANT_0_0 +103 0x4000 //RX_FDDRC_SLANT_0_1 +104 0x4000 //RX_FDDRC_SLANT_0_2 +105 0x4000 //RX_FDDRC_SLANT_0_3 +106 0x7FFF //RX_FDDRC_SLANT_1_0 +107 0x7FFF //RX_FDDRC_SLANT_1_1 +108 0x7FFF //RX_FDDRC_SLANT_1_2 +109 0x7FFF //RX_FDDRC_SLANT_1_3 +110 0x0000 //RX_FDDRC_RESRV_0 +129 0x0032 //RX_SPK_VOL +130 0x0000 //RX_VOL_RESRV_0 +#VOL 3 +6 0x6000 //RX_TDDRC_ALPHA_UP_1 +7 0x6000 //RX_TDDRC_ALPHA_UP_2 +8 0x6000 //RX_TDDRC_ALPHA_UP_3 +9 0x1000 //RX_TDDRC_ALPHA_UP_4 +27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +33 0x7214 //RX_TDDRC_LIMITER_THRD +34 0x0800 //RX_TDDRC_LIMITER_GAIN +112 0x0002 //RX_TDDRC_THRD_0 +113 0x0004 //RX_TDDRC_THRD_1 +114 0x1500 //RX_TDDRC_THRD_2 +115 0x1500 //RX_TDDRC_THRD_3 +116 0x3000 //RX_TDDRC_SLANT_0 +117 0x6E00 //RX_TDDRC_SLANT_1 +118 0x6000 //RX_TDDRC_ALPHA_UP_0 +119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +120 0x0000 //RX_TDDRC_HMNC_FLAG +121 0x199A //RX_TDDRC_HMNC_GAIN +122 0x0001 //RX_TDDRC_SMT_FLAG +123 0x0CCD //RX_TDDRC_SMT_W +124 0x02FD //RX_TDDRC_DRC_GAIN +38 0x0020 //RX_FDEQ_SUBNUM +39 0x5D48 //RX_FDEQ_GAIN_0 +40 0x584E //RX_FDEQ_GAIN_1 +41 0x4140 //RX_FDEQ_GAIN_2 +42 0x3F46 //RX_FDEQ_GAIN_3 +43 0x4F45 //RX_FDEQ_GAIN_4 +44 0x453F //RX_FDEQ_GAIN_5 +45 0x3E46 //RX_FDEQ_GAIN_6 +46 0x4947 //RX_FDEQ_GAIN_7 +47 0x464A //RX_FDEQ_GAIN_8 +48 0x5264 //RX_FDEQ_GAIN_9 +49 0x6662 //RX_FDEQ_GAIN_10 +50 0x574D //RX_FDEQ_GAIN_11 +51 0x4E56 //RX_FDEQ_GAIN_12 +52 0x7476 //RX_FDEQ_GAIN_13 +53 0x7F7C //RX_FDEQ_GAIN_14 +54 0x7068 //RX_FDEQ_GAIN_15 +55 0x4848 //RX_FDEQ_GAIN_16 +56 0x4848 //RX_FDEQ_GAIN_17 +57 0x4848 //RX_FDEQ_GAIN_18 +58 0x4848 //RX_FDEQ_GAIN_19 +59 0x4848 //RX_FDEQ_GAIN_20 +60 0x4848 //RX_FDEQ_GAIN_21 +61 0x4848 //RX_FDEQ_GAIN_22 +62 0x4848 //RX_FDEQ_GAIN_23 +63 0x0202 //RX_FDEQ_BIN_0 +64 0x0203 //RX_FDEQ_BIN_1 +65 0x0303 //RX_FDEQ_BIN_2 +66 0x0304 //RX_FDEQ_BIN_3 +67 0x0404 //RX_FDEQ_BIN_4 +68 0x010A //RX_FDEQ_BIN_5 +69 0x0808 //RX_FDEQ_BIN_6 +70 0x090A //RX_FDEQ_BIN_7 +71 0x0B0C //RX_FDEQ_BIN_8 +72 0x0D0E //RX_FDEQ_BIN_9 +73 0x1013 //RX_FDEQ_BIN_10 +74 0x1719 //RX_FDEQ_BIN_11 +75 0x1B1E //RX_FDEQ_BIN_12 +76 0x1E1E //RX_FDEQ_BIN_13 +77 0x1E28 //RX_FDEQ_BIN_14 +78 0x282C //RX_FDEQ_BIN_15 +79 0x0000 //RX_FDEQ_BIN_16 +80 0x0000 //RX_FDEQ_BIN_17 +81 0x0000 //RX_FDEQ_BIN_18 +82 0x0000 //RX_FDEQ_BIN_19 +83 0x0000 //RX_FDEQ_BIN_20 +84 0x0000 //RX_FDEQ_BIN_21 +85 0x0000 //RX_FDEQ_BIN_22 +86 0x0000 //RX_FDEQ_BIN_23 +87 0x4000 //RX_FDEQ_RESRV_0 +88 0x0320 //RX_FDEQ_RESRV_1 +89 0x0018 //RX_FDDRC_BAND_MARGIN_0 +90 0x0035 //RX_FDDRC_BAND_MARGIN_1 +91 0x00D5 //RX_FDDRC_BAND_MARGIN_2 +92 0x0120 //RX_FDDRC_BAND_MARGIN_3 +93 0x0004 //RX_FDDRC_BLOCK_EXP +94 0x5000 //RX_FDDRC_THRD_2_0 +95 0x5000 //RX_FDDRC_THRD_2_1 +96 0x2000 //RX_FDDRC_THRD_2_2 +97 0x5000 //RX_FDDRC_THRD_2_3 +98 0x6400 //RX_FDDRC_THRD_3_0 +99 0x6400 //RX_FDDRC_THRD_3_1 +100 0x2000 //RX_FDDRC_THRD_3_2 +101 0x5000 //RX_FDDRC_THRD_3_3 +102 0x4000 //RX_FDDRC_SLANT_0_0 +103 0x4000 //RX_FDDRC_SLANT_0_1 +104 0x4000 //RX_FDDRC_SLANT_0_2 +105 0x4000 //RX_FDDRC_SLANT_0_3 +106 0x7FFF //RX_FDDRC_SLANT_1_0 +107 0x7FFF //RX_FDDRC_SLANT_1_1 +108 0x7FFF //RX_FDDRC_SLANT_1_2 +109 0x7FFF //RX_FDDRC_SLANT_1_3 +110 0x0000 //RX_FDDRC_RESRV_0 +129 0x0048 //RX_SPK_VOL +130 0x0000 //RX_VOL_RESRV_0 +#VOL 4 +6 0x6000 //RX_TDDRC_ALPHA_UP_1 +7 0x6000 //RX_TDDRC_ALPHA_UP_2 +8 0x6000 //RX_TDDRC_ALPHA_UP_3 +9 0x1000 //RX_TDDRC_ALPHA_UP_4 +27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +33 0x7214 //RX_TDDRC_LIMITER_THRD +34 0x0800 //RX_TDDRC_LIMITER_GAIN +112 0x0002 //RX_TDDRC_THRD_0 +113 0x0004 //RX_TDDRC_THRD_1 +114 0x1500 //RX_TDDRC_THRD_2 +115 0x1500 //RX_TDDRC_THRD_3 +116 0x3000 //RX_TDDRC_SLANT_0 +117 0x6E00 //RX_TDDRC_SLANT_1 +118 0x6000 //RX_TDDRC_ALPHA_UP_0 +119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +120 0x0000 //RX_TDDRC_HMNC_FLAG +121 0x199A //RX_TDDRC_HMNC_GAIN +122 0x0001 //RX_TDDRC_SMT_FLAG +123 0x0CCD //RX_TDDRC_SMT_W +124 0x02FD //RX_TDDRC_DRC_GAIN +38 0x0020 //RX_FDEQ_SUBNUM +39 0x5D48 //RX_FDEQ_GAIN_0 +40 0x584E //RX_FDEQ_GAIN_1 +41 0x4140 //RX_FDEQ_GAIN_2 +42 0x3F46 //RX_FDEQ_GAIN_3 +43 0x4F45 //RX_FDEQ_GAIN_4 +44 0x453F //RX_FDEQ_GAIN_5 +45 0x3E46 //RX_FDEQ_GAIN_6 +46 0x4947 //RX_FDEQ_GAIN_7 +47 0x464A //RX_FDEQ_GAIN_8 +48 0x5264 //RX_FDEQ_GAIN_9 +49 0x6662 //RX_FDEQ_GAIN_10 +50 0x574D //RX_FDEQ_GAIN_11 +51 0x4E56 //RX_FDEQ_GAIN_12 +52 0x7476 //RX_FDEQ_GAIN_13 +53 0x7F7C //RX_FDEQ_GAIN_14 +54 0x7068 //RX_FDEQ_GAIN_15 +55 0x4848 //RX_FDEQ_GAIN_16 +56 0x4848 //RX_FDEQ_GAIN_17 +57 0x4848 //RX_FDEQ_GAIN_18 +58 0x4848 //RX_FDEQ_GAIN_19 +59 0x4848 //RX_FDEQ_GAIN_20 +60 0x4848 //RX_FDEQ_GAIN_21 +61 0x4848 //RX_FDEQ_GAIN_22 +62 0x4848 //RX_FDEQ_GAIN_23 +63 0x0202 //RX_FDEQ_BIN_0 +64 0x0203 //RX_FDEQ_BIN_1 +65 0x0303 //RX_FDEQ_BIN_2 +66 0x0304 //RX_FDEQ_BIN_3 +67 0x0404 //RX_FDEQ_BIN_4 +68 0x010A //RX_FDEQ_BIN_5 +69 0x0808 //RX_FDEQ_BIN_6 +70 0x090A //RX_FDEQ_BIN_7 +71 0x0B0C //RX_FDEQ_BIN_8 +72 0x0D0E //RX_FDEQ_BIN_9 +73 0x1013 //RX_FDEQ_BIN_10 +74 0x1719 //RX_FDEQ_BIN_11 +75 0x1B1E //RX_FDEQ_BIN_12 +76 0x1E1E //RX_FDEQ_BIN_13 +77 0x1E28 //RX_FDEQ_BIN_14 +78 0x282C //RX_FDEQ_BIN_15 +79 0x0000 //RX_FDEQ_BIN_16 +80 0x0000 //RX_FDEQ_BIN_17 +81 0x0000 //RX_FDEQ_BIN_18 +82 0x0000 //RX_FDEQ_BIN_19 +83 0x0000 //RX_FDEQ_BIN_20 +84 0x0000 //RX_FDEQ_BIN_21 +85 0x0000 //RX_FDEQ_BIN_22 +86 0x0000 //RX_FDEQ_BIN_23 +87 0x4000 //RX_FDEQ_RESRV_0 +88 0x0320 //RX_FDEQ_RESRV_1 +89 0x0018 //RX_FDDRC_BAND_MARGIN_0 +90 0x0035 //RX_FDDRC_BAND_MARGIN_1 +91 0x00D5 //RX_FDDRC_BAND_MARGIN_2 +92 0x0120 //RX_FDDRC_BAND_MARGIN_3 +93 0x0004 //RX_FDDRC_BLOCK_EXP +94 0x5000 //RX_FDDRC_THRD_2_0 +95 0x5000 //RX_FDDRC_THRD_2_1 +96 0x2000 //RX_FDDRC_THRD_2_2 +97 0x5000 //RX_FDDRC_THRD_2_3 +98 0x6400 //RX_FDDRC_THRD_3_0 +99 0x6400 //RX_FDDRC_THRD_3_1 +100 0x2000 //RX_FDDRC_THRD_3_2 +101 0x5000 //RX_FDDRC_THRD_3_3 +102 0x4000 //RX_FDDRC_SLANT_0_0 +103 0x4000 //RX_FDDRC_SLANT_0_1 +104 0x4000 //RX_FDDRC_SLANT_0_2 +105 0x4000 //RX_FDDRC_SLANT_0_3 +106 0x7FFF //RX_FDDRC_SLANT_1_0 +107 0x7FFF //RX_FDDRC_SLANT_1_1 +108 0x7FFF //RX_FDDRC_SLANT_1_2 +109 0x7FFF //RX_FDDRC_SLANT_1_3 +110 0x0000 //RX_FDDRC_RESRV_0 +129 0x0068 //RX_SPK_VOL +130 0x0000 //RX_VOL_RESRV_0 +#VOL 5 +6 0x6000 //RX_TDDRC_ALPHA_UP_1 +7 0x6000 //RX_TDDRC_ALPHA_UP_2 +8 0x6000 //RX_TDDRC_ALPHA_UP_3 +9 0x1000 //RX_TDDRC_ALPHA_UP_4 +27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +33 0x7214 //RX_TDDRC_LIMITER_THRD +34 0x0800 //RX_TDDRC_LIMITER_GAIN +112 0x0002 //RX_TDDRC_THRD_0 +113 0x0004 //RX_TDDRC_THRD_1 +114 0x1500 //RX_TDDRC_THRD_2 +115 0x1500 //RX_TDDRC_THRD_3 +116 0x3000 //RX_TDDRC_SLANT_0 +117 0x6E00 //RX_TDDRC_SLANT_1 +118 0x6000 //RX_TDDRC_ALPHA_UP_0 +119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +120 0x0000 //RX_TDDRC_HMNC_FLAG +121 0x199A //RX_TDDRC_HMNC_GAIN +122 0x0001 //RX_TDDRC_SMT_FLAG +123 0x0CCD //RX_TDDRC_SMT_W +124 0x02FD //RX_TDDRC_DRC_GAIN +38 0x0020 //RX_FDEQ_SUBNUM +39 0x5D48 //RX_FDEQ_GAIN_0 +40 0x584E //RX_FDEQ_GAIN_1 +41 0x4140 //RX_FDEQ_GAIN_2 +42 0x3F46 //RX_FDEQ_GAIN_3 +43 0x4F45 //RX_FDEQ_GAIN_4 +44 0x453F //RX_FDEQ_GAIN_5 +45 0x3E46 //RX_FDEQ_GAIN_6 +46 0x4947 //RX_FDEQ_GAIN_7 +47 0x464A //RX_FDEQ_GAIN_8 +48 0x5264 //RX_FDEQ_GAIN_9 +49 0x6662 //RX_FDEQ_GAIN_10 +50 0x574D //RX_FDEQ_GAIN_11 +51 0x4E56 //RX_FDEQ_GAIN_12 +52 0x7476 //RX_FDEQ_GAIN_13 +53 0x7F7C //RX_FDEQ_GAIN_14 +54 0x7068 //RX_FDEQ_GAIN_15 +55 0x4848 //RX_FDEQ_GAIN_16 +56 0x4848 //RX_FDEQ_GAIN_17 +57 0x4848 //RX_FDEQ_GAIN_18 +58 0x4848 //RX_FDEQ_GAIN_19 +59 0x4848 //RX_FDEQ_GAIN_20 +60 0x4848 //RX_FDEQ_GAIN_21 +61 0x4848 //RX_FDEQ_GAIN_22 +62 0x4848 //RX_FDEQ_GAIN_23 +63 0x0202 //RX_FDEQ_BIN_0 +64 0x0203 //RX_FDEQ_BIN_1 +65 0x0303 //RX_FDEQ_BIN_2 +66 0x0304 //RX_FDEQ_BIN_3 +67 0x0404 //RX_FDEQ_BIN_4 +68 0x010A //RX_FDEQ_BIN_5 +69 0x0808 //RX_FDEQ_BIN_6 +70 0x090A //RX_FDEQ_BIN_7 +71 0x0B0C //RX_FDEQ_BIN_8 +72 0x0D0E //RX_FDEQ_BIN_9 +73 0x1013 //RX_FDEQ_BIN_10 +74 0x1719 //RX_FDEQ_BIN_11 +75 0x1B1E //RX_FDEQ_BIN_12 +76 0x1E1E //RX_FDEQ_BIN_13 +77 0x1E28 //RX_FDEQ_BIN_14 +78 0x282C //RX_FDEQ_BIN_15 +79 0x0000 //RX_FDEQ_BIN_16 +80 0x0000 //RX_FDEQ_BIN_17 +81 0x0000 //RX_FDEQ_BIN_18 +82 0x0000 //RX_FDEQ_BIN_19 +83 0x0000 //RX_FDEQ_BIN_20 +84 0x0000 //RX_FDEQ_BIN_21 +85 0x0000 //RX_FDEQ_BIN_22 +86 0x0000 //RX_FDEQ_BIN_23 +87 0x4000 //RX_FDEQ_RESRV_0 +88 0x0320 //RX_FDEQ_RESRV_1 +89 0x0018 //RX_FDDRC_BAND_MARGIN_0 +90 0x0035 //RX_FDDRC_BAND_MARGIN_1 +91 0x00D5 //RX_FDDRC_BAND_MARGIN_2 +92 0x0120 //RX_FDDRC_BAND_MARGIN_3 +93 0x0004 //RX_FDDRC_BLOCK_EXP +94 0x5000 //RX_FDDRC_THRD_2_0 +95 0x5000 //RX_FDDRC_THRD_2_1 +96 0x2000 //RX_FDDRC_THRD_2_2 +97 0x5000 //RX_FDDRC_THRD_2_3 +98 0x6400 //RX_FDDRC_THRD_3_0 +99 0x6400 //RX_FDDRC_THRD_3_1 +100 0x2000 //RX_FDDRC_THRD_3_2 +101 0x5000 //RX_FDDRC_THRD_3_3 +102 0x4000 //RX_FDDRC_SLANT_0_0 +103 0x4000 //RX_FDDRC_SLANT_0_1 +104 0x4000 //RX_FDDRC_SLANT_0_2 +105 0x4000 //RX_FDDRC_SLANT_0_3 +106 0x7FFF //RX_FDDRC_SLANT_1_0 +107 0x7FFF //RX_FDDRC_SLANT_1_1 +108 0x7FFF //RX_FDDRC_SLANT_1_2 +109 0x7FFF //RX_FDDRC_SLANT_1_3 +110 0x0000 //RX_FDDRC_RESRV_0 +129 0x0097 //RX_SPK_VOL +130 0x0000 //RX_VOL_RESRV_0 +#VOL 6 +6 0x6000 //RX_TDDRC_ALPHA_UP_1 +7 0x6000 //RX_TDDRC_ALPHA_UP_2 +8 0x6000 //RX_TDDRC_ALPHA_UP_3 +9 0x1000 //RX_TDDRC_ALPHA_UP_4 +27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +33 0x7214 //RX_TDDRC_LIMITER_THRD +34 0x0800 //RX_TDDRC_LIMITER_GAIN +112 0x0002 //RX_TDDRC_THRD_0 +113 0x0004 //RX_TDDRC_THRD_1 +114 0x1500 //RX_TDDRC_THRD_2 +115 0x1500 //RX_TDDRC_THRD_3 +116 0x3000 //RX_TDDRC_SLANT_0 +117 0x6E00 //RX_TDDRC_SLANT_1 +118 0x6000 //RX_TDDRC_ALPHA_UP_0 +119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +120 0x0000 //RX_TDDRC_HMNC_FLAG +121 0x199A //RX_TDDRC_HMNC_GAIN +122 0x0001 //RX_TDDRC_SMT_FLAG +123 0x0CCD //RX_TDDRC_SMT_W +124 0x02FD //RX_TDDRC_DRC_GAIN +38 0x0020 //RX_FDEQ_SUBNUM +39 0x5D48 //RX_FDEQ_GAIN_0 +40 0x584E //RX_FDEQ_GAIN_1 +41 0x4140 //RX_FDEQ_GAIN_2 +42 0x3F46 //RX_FDEQ_GAIN_3 +43 0x4F45 //RX_FDEQ_GAIN_4 +44 0x453F //RX_FDEQ_GAIN_5 +45 0x3E46 //RX_FDEQ_GAIN_6 +46 0x4947 //RX_FDEQ_GAIN_7 +47 0x464A //RX_FDEQ_GAIN_8 +48 0x5264 //RX_FDEQ_GAIN_9 +49 0x6662 //RX_FDEQ_GAIN_10 +50 0x574D //RX_FDEQ_GAIN_11 +51 0x4E56 //RX_FDEQ_GAIN_12 +52 0x7476 //RX_FDEQ_GAIN_13 +53 0x7F7C //RX_FDEQ_GAIN_14 +54 0x7068 //RX_FDEQ_GAIN_15 +55 0x4848 //RX_FDEQ_GAIN_16 +56 0x4848 //RX_FDEQ_GAIN_17 +57 0x4848 //RX_FDEQ_GAIN_18 +58 0x4848 //RX_FDEQ_GAIN_19 +59 0x4848 //RX_FDEQ_GAIN_20 +60 0x4848 //RX_FDEQ_GAIN_21 +61 0x4848 //RX_FDEQ_GAIN_22 +62 0x4848 //RX_FDEQ_GAIN_23 +63 0x0202 //RX_FDEQ_BIN_0 +64 0x0203 //RX_FDEQ_BIN_1 +65 0x0303 //RX_FDEQ_BIN_2 +66 0x0304 //RX_FDEQ_BIN_3 +67 0x0404 //RX_FDEQ_BIN_4 +68 0x010A //RX_FDEQ_BIN_5 +69 0x0808 //RX_FDEQ_BIN_6 +70 0x090A //RX_FDEQ_BIN_7 +71 0x0B0C //RX_FDEQ_BIN_8 +72 0x0D0E //RX_FDEQ_BIN_9 +73 0x1013 //RX_FDEQ_BIN_10 +74 0x1719 //RX_FDEQ_BIN_11 +75 0x1B1E //RX_FDEQ_BIN_12 +76 0x1E1E //RX_FDEQ_BIN_13 +77 0x1E28 //RX_FDEQ_BIN_14 +78 0x282C //RX_FDEQ_BIN_15 +79 0x0000 //RX_FDEQ_BIN_16 +80 0x0000 //RX_FDEQ_BIN_17 +81 0x0000 //RX_FDEQ_BIN_18 +82 0x0000 //RX_FDEQ_BIN_19 +83 0x0000 //RX_FDEQ_BIN_20 +84 0x0000 //RX_FDEQ_BIN_21 +85 0x0000 //RX_FDEQ_BIN_22 +86 0x0000 //RX_FDEQ_BIN_23 +87 0x4000 //RX_FDEQ_RESRV_0 +88 0x0320 //RX_FDEQ_RESRV_1 +89 0x0018 //RX_FDDRC_BAND_MARGIN_0 +90 0x0035 //RX_FDDRC_BAND_MARGIN_1 +91 0x00D5 //RX_FDDRC_BAND_MARGIN_2 +92 0x0120 //RX_FDDRC_BAND_MARGIN_3 +93 0x0004 //RX_FDDRC_BLOCK_EXP +94 0x5000 //RX_FDDRC_THRD_2_0 +95 0x5000 //RX_FDDRC_THRD_2_1 +96 0x2000 //RX_FDDRC_THRD_2_2 +97 0x5000 //RX_FDDRC_THRD_2_3 +98 0x6400 //RX_FDDRC_THRD_3_0 +99 0x6400 //RX_FDDRC_THRD_3_1 +100 0x2000 //RX_FDDRC_THRD_3_2 +101 0x5000 //RX_FDDRC_THRD_3_3 +102 0x4000 //RX_FDDRC_SLANT_0_0 +103 0x4000 //RX_FDDRC_SLANT_0_1 +104 0x4000 //RX_FDDRC_SLANT_0_2 +105 0x4000 //RX_FDDRC_SLANT_0_3 +106 0x7FFF //RX_FDDRC_SLANT_1_0 +107 0x7FFF //RX_FDDRC_SLANT_1_1 +108 0x7FFF //RX_FDDRC_SLANT_1_2 +109 0x7FFF //RX_FDDRC_SLANT_1_3 +110 0x0000 //RX_FDDRC_RESRV_0 +129 0x0100 //RX_SPK_VOL +130 0x0000 //RX_VOL_RESRV_0 +#RX 2 +157 0x027C //RX_RECVFUNC_MODE_0 +158 0x0000 //RX_RECVFUNC_MODE_1 +159 0x0003 //RX_SAMPLINGFREQ_SIG +160 0x0003 //RX_SAMPLINGFREQ_PROC +161 0x000A //RX_FRAME_SZ +162 0x0000 //RX_DELAY_OPT +163 0x6000 //RX_TDDRC_ALPHA_UP_1 +164 0x6000 //RX_TDDRC_ALPHA_UP_2 +165 0x6000 //RX_TDDRC_ALPHA_UP_3 +166 0x1000 //RX_TDDRC_ALPHA_UP_4 +167 0x0800 //RX_PGA +168 0x7652 //RX_A_HP +169 0x4000 //RX_B_PE +170 0x7800 //RX_THR_PITCH_DET_0 +171 0x7000 //RX_THR_PITCH_DET_1 +172 0x6000 //RX_THR_PITCH_DET_2 +173 0x0008 //RX_PITCH_BFR_LEN +174 0x0003 //RX_SBD_PITCH_DET +175 0x0100 //RX_PP_RESRV_0 +176 0x0020 //RX_PP_RESRV_1 +177 0x0400 //RX_N_SN_EST +178 0x000C //RX_N2_SN_EST +179 0x0010 //RX_NS_LVL_CTRL +180 0xF800 //RX_THR_SN_EST +181 0x7E00 //RX_LAMBDA_PFILT +182 0x000A //RX_FENS_RESRV_0 +183 0x0190 //RX_FENS_RESRV_1 +184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +187 0x0002 //RX_EXTRA_NS_L +188 0x0800 //RX_EXTRA_NS_A +189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +190 0x7214 //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +192 0x199A //RX_A_POST_FLT +193 0x0000 //RX_LMT_THRD +194 0x4000 //RX_LMT_ALPHA +195 0x0020 //RX_FDEQ_SUBNUM +196 0x484E //RX_FDEQ_GAIN_0 +197 0x4E4E //RX_FDEQ_GAIN_1 +198 0x4E4E //RX_FDEQ_GAIN_2 +199 0x4848 //RX_FDEQ_GAIN_3 +200 0x484E //RX_FDEQ_GAIN_4 +201 0x6E4E //RX_FDEQ_GAIN_5 +202 0x4850 //RX_FDEQ_GAIN_6 +203 0x4848 //RX_FDEQ_GAIN_7 +204 0x4860 //RX_FDEQ_GAIN_8 +205 0x7468 //RX_FDEQ_GAIN_9 +206 0x6060 //RX_FDEQ_GAIN_10 +207 0x6666 //RX_FDEQ_GAIN_11 +208 0x6666 //RX_FDEQ_GAIN_12 +209 0x6666 //RX_FDEQ_GAIN_13 +210 0x6060 //RX_FDEQ_GAIN_14 +211 0x6060 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0202 //RX_FDEQ_BIN_0 +221 0x0203 //RX_FDEQ_BIN_1 +222 0x0303 //RX_FDEQ_BIN_2 +223 0x0304 //RX_FDEQ_BIN_3 +224 0x0404 //RX_FDEQ_BIN_4 +225 0x0209 //RX_FDEQ_BIN_5 +226 0x0808 //RX_FDEQ_BIN_6 +227 0x090A //RX_FDEQ_BIN_7 +228 0x0B0C //RX_FDEQ_BIN_8 +229 0x0D0E //RX_FDEQ_BIN_9 +230 0x1013 //RX_FDEQ_BIN_10 +231 0x1719 //RX_FDEQ_BIN_11 +232 0x1B1E //RX_FDEQ_BIN_12 +233 0x1E1E //RX_FDEQ_BIN_13 +234 0x1E28 //RX_FDEQ_BIN_14 +235 0x282C //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x4000 //RX_FDEQ_RESRV_0 +245 0x0320 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0035 //RX_FDDRC_BAND_MARGIN_1 +248 0x00D5 //RX_FDDRC_BAND_MARGIN_2 +249 0x0120 //RX_FDDRC_BAND_MARGIN_3 +250 0x0004 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x2000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x2000 //RX_FDDRC_THRD_3_2 +258 0x5000 //RX_FDDRC_THRD_3_3 +259 0x4000 //RX_FDDRC_SLANT_0_0 +260 0x4000 //RX_FDDRC_SLANT_0_1 +261 0x4000 //RX_FDDRC_SLANT_0_2 +262 0x4000 //RX_FDDRC_SLANT_0_3 +263 0x7FFF //RX_FDDRC_SLANT_1_0 +264 0x7FFF //RX_FDDRC_SLANT_1_1 +265 0x7FFF //RX_FDDRC_SLANT_1_2 +266 0x7FFF //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +268 0x0002 //RX_FILTINDX +269 0x0002 //RX_TDDRC_THRD_0 +270 0x0004 //RX_TDDRC_THRD_1 +271 0x1A00 //RX_TDDRC_THRD_2 +272 0x1A00 //RX_TDDRC_THRD_3 +273 0x7EB8 //RX_TDDRC_SLANT_0 +274 0x2500 //RX_TDDRC_SLANT_1 +275 0x6000 //RX_TDDRC_ALPHA_UP_0 +276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x199A //RX_TDDRC_HMNC_GAIN +279 0x0001 //RX_TDDRC_SMT_FLAG +280 0x0CCD //RX_TDDRC_SMT_W +281 0x04BC //RX_TDDRC_DRC_GAIN +282 0x7C00 //RX_LAMBDA_PKA_FP +283 0x2000 //RX_TPKA_FP +284 0x2000 //RX_MIN_G_FP +285 0x0080 //RX_MAX_G_FP +286 0x0019 //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 +288 0x0000 //RX_MAXLEVEL_CNG +289 0x3000 //RX_BWE_UV_TH +290 0x3000 //RX_BWE_UV_TH2 +291 0x1800 //RX_BWE_UV_TH3 +292 0x1000 //RX_BWE_V_TH +293 0x04CD //RX_BWE_GAIN1_V_TH1 +294 0x0F33 //RX_BWE_GAIN1_V_TH2 +295 0x7333 //RX_BWE_UV_EQ +296 0x199A //RX_BWE_V_EQ +297 0x7333 //RX_BWE_TONE_TH +298 0x0004 //RX_BWE_UV_HOLD_T +299 0x6CCD //RX_BWE_GAIN2_ALPHA +300 0x799A //RX_BWE_GAIN3_ALPHA +301 0x001E //RX_BWE_CUTOFF +302 0x3000 //RX_BWE_GAINFILL +303 0x3200 //RX_BWE_MAXTH_TONE +304 0x2000 //RX_BWE_EQ_0 +305 0x2000 //RX_BWE_EQ_1 +306 0x2000 //RX_BWE_EQ_2 +307 0x2000 //RX_BWE_EQ_3 +308 0x2000 //RX_BWE_EQ_4 +309 0x2000 //RX_BWE_EQ_5 +310 0x2000 //RX_BWE_EQ_6 +311 0x0000 //RX_BWE_RESRV_0 +312 0x0000 //RX_BWE_RESRV_1 +313 0x0000 //RX_BWE_RESRV_2 +#VOL 0 +163 0x6000 //RX_TDDRC_ALPHA_UP_1 +164 0x6000 //RX_TDDRC_ALPHA_UP_2 +165 0x6000 //RX_TDDRC_ALPHA_UP_3 +166 0x1000 //RX_TDDRC_ALPHA_UP_4 +184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +190 0x7214 //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +269 0x0002 //RX_TDDRC_THRD_0 +270 0x0004 //RX_TDDRC_THRD_1 +271 0x1A00 //RX_TDDRC_THRD_2 +272 0x1A00 //RX_TDDRC_THRD_3 +273 0x7EB8 //RX_TDDRC_SLANT_0 +274 0x2500 //RX_TDDRC_SLANT_1 +275 0x6000 //RX_TDDRC_ALPHA_UP_0 +276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x199A //RX_TDDRC_HMNC_GAIN +279 0x0001 //RX_TDDRC_SMT_FLAG +280 0x0CCD //RX_TDDRC_SMT_W +281 0x04BC //RX_TDDRC_DRC_GAIN +195 0x0020 //RX_FDEQ_SUBNUM +196 0x484E //RX_FDEQ_GAIN_0 +197 0x4E4E //RX_FDEQ_GAIN_1 +198 0x4E4E //RX_FDEQ_GAIN_2 +199 0x4848 //RX_FDEQ_GAIN_3 +200 0x484E //RX_FDEQ_GAIN_4 +201 0x6E4E //RX_FDEQ_GAIN_5 +202 0x4850 //RX_FDEQ_GAIN_6 +203 0x4848 //RX_FDEQ_GAIN_7 +204 0x4860 //RX_FDEQ_GAIN_8 +205 0x7468 //RX_FDEQ_GAIN_9 +206 0x6060 //RX_FDEQ_GAIN_10 +207 0x6666 //RX_FDEQ_GAIN_11 +208 0x6666 //RX_FDEQ_GAIN_12 +209 0x6666 //RX_FDEQ_GAIN_13 +210 0x6060 //RX_FDEQ_GAIN_14 +211 0x6060 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0202 //RX_FDEQ_BIN_0 +221 0x0203 //RX_FDEQ_BIN_1 +222 0x0303 //RX_FDEQ_BIN_2 +223 0x0304 //RX_FDEQ_BIN_3 +224 0x0404 //RX_FDEQ_BIN_4 +225 0x0209 //RX_FDEQ_BIN_5 +226 0x0808 //RX_FDEQ_BIN_6 +227 0x090A //RX_FDEQ_BIN_7 +228 0x0B0C //RX_FDEQ_BIN_8 +229 0x0D0E //RX_FDEQ_BIN_9 +230 0x1013 //RX_FDEQ_BIN_10 +231 0x1719 //RX_FDEQ_BIN_11 +232 0x1B1E //RX_FDEQ_BIN_12 +233 0x1E1E //RX_FDEQ_BIN_13 +234 0x1E28 //RX_FDEQ_BIN_14 +235 0x282C //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x4000 //RX_FDEQ_RESRV_0 +245 0x0320 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0035 //RX_FDDRC_BAND_MARGIN_1 +248 0x00D5 //RX_FDDRC_BAND_MARGIN_2 +249 0x0120 //RX_FDDRC_BAND_MARGIN_3 +250 0x0004 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x2000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x2000 //RX_FDDRC_THRD_3_2 +258 0x5000 //RX_FDDRC_THRD_3_3 +259 0x4000 //RX_FDDRC_SLANT_0_0 +260 0x4000 //RX_FDDRC_SLANT_0_1 +261 0x4000 //RX_FDDRC_SLANT_0_2 +262 0x4000 //RX_FDDRC_SLANT_0_3 +263 0x7FFF //RX_FDDRC_SLANT_1_0 +264 0x7FFF //RX_FDDRC_SLANT_1_1 +265 0x7FFF //RX_FDDRC_SLANT_1_2 +266 0x7FFF //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +286 0x0019 //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 +#VOL 1 +163 0x6000 //RX_TDDRC_ALPHA_UP_1 +164 0x6000 //RX_TDDRC_ALPHA_UP_2 +165 0x6000 //RX_TDDRC_ALPHA_UP_3 +166 0x1000 //RX_TDDRC_ALPHA_UP_4 +184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +190 0x7214 //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +269 0x0002 //RX_TDDRC_THRD_0 +270 0x0004 //RX_TDDRC_THRD_1 +271 0x1A00 //RX_TDDRC_THRD_2 +272 0x1A00 //RX_TDDRC_THRD_3 +273 0x7EB8 //RX_TDDRC_SLANT_0 +274 0x2500 //RX_TDDRC_SLANT_1 +275 0x6000 //RX_TDDRC_ALPHA_UP_0 +276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x199A //RX_TDDRC_HMNC_GAIN +279 0x0001 //RX_TDDRC_SMT_FLAG +280 0x0CCD //RX_TDDRC_SMT_W +281 0x04BC //RX_TDDRC_DRC_GAIN +195 0x0020 //RX_FDEQ_SUBNUM +196 0x484E //RX_FDEQ_GAIN_0 +197 0x4E4E //RX_FDEQ_GAIN_1 +198 0x4E4E //RX_FDEQ_GAIN_2 +199 0x4848 //RX_FDEQ_GAIN_3 +200 0x484E //RX_FDEQ_GAIN_4 +201 0x6E4E //RX_FDEQ_GAIN_5 +202 0x4850 //RX_FDEQ_GAIN_6 +203 0x4848 //RX_FDEQ_GAIN_7 +204 0x4860 //RX_FDEQ_GAIN_8 +205 0x7468 //RX_FDEQ_GAIN_9 +206 0x6060 //RX_FDEQ_GAIN_10 +207 0x6666 //RX_FDEQ_GAIN_11 +208 0x6666 //RX_FDEQ_GAIN_12 +209 0x6666 //RX_FDEQ_GAIN_13 +210 0x6060 //RX_FDEQ_GAIN_14 +211 0x6060 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0202 //RX_FDEQ_BIN_0 +221 0x0203 //RX_FDEQ_BIN_1 +222 0x0303 //RX_FDEQ_BIN_2 +223 0x0304 //RX_FDEQ_BIN_3 +224 0x0404 //RX_FDEQ_BIN_4 +225 0x0209 //RX_FDEQ_BIN_5 +226 0x0808 //RX_FDEQ_BIN_6 +227 0x090A //RX_FDEQ_BIN_7 +228 0x0B0C //RX_FDEQ_BIN_8 +229 0x0D0E //RX_FDEQ_BIN_9 +230 0x1013 //RX_FDEQ_BIN_10 +231 0x1719 //RX_FDEQ_BIN_11 +232 0x1B1E //RX_FDEQ_BIN_12 +233 0x1E1E //RX_FDEQ_BIN_13 +234 0x1E28 //RX_FDEQ_BIN_14 +235 0x282C //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x4000 //RX_FDEQ_RESRV_0 +245 0x0320 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0035 //RX_FDDRC_BAND_MARGIN_1 +248 0x00D5 //RX_FDDRC_BAND_MARGIN_2 +249 0x0120 //RX_FDDRC_BAND_MARGIN_3 +250 0x0004 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x2000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x2000 //RX_FDDRC_THRD_3_2 +258 0x5000 //RX_FDDRC_THRD_3_3 +259 0x4000 //RX_FDDRC_SLANT_0_0 +260 0x4000 //RX_FDDRC_SLANT_0_1 +261 0x4000 //RX_FDDRC_SLANT_0_2 +262 0x4000 //RX_FDDRC_SLANT_0_3 +263 0x7FFF //RX_FDDRC_SLANT_1_0 +264 0x7FFF //RX_FDDRC_SLANT_1_1 +265 0x7FFF //RX_FDDRC_SLANT_1_2 +266 0x7FFF //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +286 0x0023 //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 +#VOL 2 +163 0x6000 //RX_TDDRC_ALPHA_UP_1 +164 0x6000 //RX_TDDRC_ALPHA_UP_2 +165 0x6000 //RX_TDDRC_ALPHA_UP_3 +166 0x1000 //RX_TDDRC_ALPHA_UP_4 +184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +190 0x7214 //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +269 0x0002 //RX_TDDRC_THRD_0 +270 0x0004 //RX_TDDRC_THRD_1 +271 0x1A00 //RX_TDDRC_THRD_2 +272 0x1A00 //RX_TDDRC_THRD_3 +273 0x7EB8 //RX_TDDRC_SLANT_0 +274 0x2500 //RX_TDDRC_SLANT_1 +275 0x6000 //RX_TDDRC_ALPHA_UP_0 +276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x199A //RX_TDDRC_HMNC_GAIN +279 0x0001 //RX_TDDRC_SMT_FLAG +280 0x0CCD //RX_TDDRC_SMT_W +281 0x04BC //RX_TDDRC_DRC_GAIN +195 0x0020 //RX_FDEQ_SUBNUM +196 0x484E //RX_FDEQ_GAIN_0 +197 0x4E4E //RX_FDEQ_GAIN_1 +198 0x4E4E //RX_FDEQ_GAIN_2 +199 0x4848 //RX_FDEQ_GAIN_3 +200 0x484E //RX_FDEQ_GAIN_4 +201 0x6E4E //RX_FDEQ_GAIN_5 +202 0x4850 //RX_FDEQ_GAIN_6 +203 0x4848 //RX_FDEQ_GAIN_7 +204 0x4860 //RX_FDEQ_GAIN_8 +205 0x7468 //RX_FDEQ_GAIN_9 +206 0x6060 //RX_FDEQ_GAIN_10 +207 0x6666 //RX_FDEQ_GAIN_11 +208 0x6666 //RX_FDEQ_GAIN_12 +209 0x6666 //RX_FDEQ_GAIN_13 +210 0x6060 //RX_FDEQ_GAIN_14 +211 0x6060 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0202 //RX_FDEQ_BIN_0 +221 0x0203 //RX_FDEQ_BIN_1 +222 0x0303 //RX_FDEQ_BIN_2 +223 0x0304 //RX_FDEQ_BIN_3 +224 0x0404 //RX_FDEQ_BIN_4 +225 0x0209 //RX_FDEQ_BIN_5 +226 0x0808 //RX_FDEQ_BIN_6 +227 0x090A //RX_FDEQ_BIN_7 +228 0x0B0C //RX_FDEQ_BIN_8 +229 0x0D0E //RX_FDEQ_BIN_9 +230 0x1013 //RX_FDEQ_BIN_10 +231 0x1719 //RX_FDEQ_BIN_11 +232 0x1B1E //RX_FDEQ_BIN_12 +233 0x1E1E //RX_FDEQ_BIN_13 +234 0x1E28 //RX_FDEQ_BIN_14 +235 0x282C //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x4000 //RX_FDEQ_RESRV_0 +245 0x0320 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0035 //RX_FDDRC_BAND_MARGIN_1 +248 0x00D5 //RX_FDDRC_BAND_MARGIN_2 +249 0x0120 //RX_FDDRC_BAND_MARGIN_3 +250 0x0004 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x2000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x2000 //RX_FDDRC_THRD_3_2 +258 0x5000 //RX_FDDRC_THRD_3_3 +259 0x4000 //RX_FDDRC_SLANT_0_0 +260 0x4000 //RX_FDDRC_SLANT_0_1 +261 0x4000 //RX_FDDRC_SLANT_0_2 +262 0x4000 //RX_FDDRC_SLANT_0_3 +263 0x7FFF //RX_FDDRC_SLANT_1_0 +264 0x7FFF //RX_FDDRC_SLANT_1_1 +265 0x7FFF //RX_FDDRC_SLANT_1_2 +266 0x7FFF //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +286 0x0032 //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 +#VOL 3 +163 0x6000 //RX_TDDRC_ALPHA_UP_1 +164 0x6000 //RX_TDDRC_ALPHA_UP_2 +165 0x6000 //RX_TDDRC_ALPHA_UP_3 +166 0x1000 //RX_TDDRC_ALPHA_UP_4 +184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +190 0x7214 //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +269 0x0002 //RX_TDDRC_THRD_0 +270 0x0004 //RX_TDDRC_THRD_1 +271 0x1A00 //RX_TDDRC_THRD_2 +272 0x1A00 //RX_TDDRC_THRD_3 +273 0x7EB8 //RX_TDDRC_SLANT_0 +274 0x2500 //RX_TDDRC_SLANT_1 +275 0x6000 //RX_TDDRC_ALPHA_UP_0 +276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x199A //RX_TDDRC_HMNC_GAIN +279 0x0001 //RX_TDDRC_SMT_FLAG +280 0x0CCD //RX_TDDRC_SMT_W +281 0x04BC //RX_TDDRC_DRC_GAIN +195 0x0020 //RX_FDEQ_SUBNUM +196 0x484E //RX_FDEQ_GAIN_0 +197 0x4E4E //RX_FDEQ_GAIN_1 +198 0x4E4E //RX_FDEQ_GAIN_2 +199 0x4848 //RX_FDEQ_GAIN_3 +200 0x484E //RX_FDEQ_GAIN_4 +201 0x6E4E //RX_FDEQ_GAIN_5 +202 0x4850 //RX_FDEQ_GAIN_6 +203 0x4848 //RX_FDEQ_GAIN_7 +204 0x4860 //RX_FDEQ_GAIN_8 +205 0x7468 //RX_FDEQ_GAIN_9 +206 0x6060 //RX_FDEQ_GAIN_10 +207 0x6666 //RX_FDEQ_GAIN_11 +208 0x6666 //RX_FDEQ_GAIN_12 +209 0x6666 //RX_FDEQ_GAIN_13 +210 0x6060 //RX_FDEQ_GAIN_14 +211 0x6060 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0202 //RX_FDEQ_BIN_0 +221 0x0203 //RX_FDEQ_BIN_1 +222 0x0303 //RX_FDEQ_BIN_2 +223 0x0304 //RX_FDEQ_BIN_3 +224 0x0404 //RX_FDEQ_BIN_4 +225 0x0209 //RX_FDEQ_BIN_5 +226 0x0808 //RX_FDEQ_BIN_6 +227 0x090A //RX_FDEQ_BIN_7 +228 0x0B0C //RX_FDEQ_BIN_8 +229 0x0D0E //RX_FDEQ_BIN_9 +230 0x1013 //RX_FDEQ_BIN_10 +231 0x1719 //RX_FDEQ_BIN_11 +232 0x1B1E //RX_FDEQ_BIN_12 +233 0x1E1E //RX_FDEQ_BIN_13 +234 0x1E28 //RX_FDEQ_BIN_14 +235 0x282C //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x4000 //RX_FDEQ_RESRV_0 +245 0x0320 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0035 //RX_FDDRC_BAND_MARGIN_1 +248 0x00D5 //RX_FDDRC_BAND_MARGIN_2 +249 0x0120 //RX_FDDRC_BAND_MARGIN_3 +250 0x0004 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x2000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x2000 //RX_FDDRC_THRD_3_2 +258 0x5000 //RX_FDDRC_THRD_3_3 +259 0x4000 //RX_FDDRC_SLANT_0_0 +260 0x4000 //RX_FDDRC_SLANT_0_1 +261 0x4000 //RX_FDDRC_SLANT_0_2 +262 0x4000 //RX_FDDRC_SLANT_0_3 +263 0x7FFF //RX_FDDRC_SLANT_1_0 +264 0x7FFF //RX_FDDRC_SLANT_1_1 +265 0x7FFF //RX_FDDRC_SLANT_1_2 +266 0x7FFF //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +286 0x0048 //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 +#VOL 4 +163 0x6000 //RX_TDDRC_ALPHA_UP_1 +164 0x6000 //RX_TDDRC_ALPHA_UP_2 +165 0x6000 //RX_TDDRC_ALPHA_UP_3 +166 0x1000 //RX_TDDRC_ALPHA_UP_4 +184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +190 0x7214 //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +269 0x0002 //RX_TDDRC_THRD_0 +270 0x0004 //RX_TDDRC_THRD_1 +271 0x1A00 //RX_TDDRC_THRD_2 +272 0x1A00 //RX_TDDRC_THRD_3 +273 0x7EB8 //RX_TDDRC_SLANT_0 +274 0x2500 //RX_TDDRC_SLANT_1 +275 0x6000 //RX_TDDRC_ALPHA_UP_0 +276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x199A //RX_TDDRC_HMNC_GAIN +279 0x0001 //RX_TDDRC_SMT_FLAG +280 0x0CCD //RX_TDDRC_SMT_W +281 0x04BC //RX_TDDRC_DRC_GAIN +195 0x0020 //RX_FDEQ_SUBNUM +196 0x484E //RX_FDEQ_GAIN_0 +197 0x4E4E //RX_FDEQ_GAIN_1 +198 0x4E4E //RX_FDEQ_GAIN_2 +199 0x4848 //RX_FDEQ_GAIN_3 +200 0x484E //RX_FDEQ_GAIN_4 +201 0x6E4E //RX_FDEQ_GAIN_5 +202 0x4850 //RX_FDEQ_GAIN_6 +203 0x4848 //RX_FDEQ_GAIN_7 +204 0x4860 //RX_FDEQ_GAIN_8 +205 0x7468 //RX_FDEQ_GAIN_9 +206 0x6060 //RX_FDEQ_GAIN_10 +207 0x6666 //RX_FDEQ_GAIN_11 +208 0x6666 //RX_FDEQ_GAIN_12 +209 0x6666 //RX_FDEQ_GAIN_13 +210 0x6060 //RX_FDEQ_GAIN_14 +211 0x6060 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0202 //RX_FDEQ_BIN_0 +221 0x0203 //RX_FDEQ_BIN_1 +222 0x0303 //RX_FDEQ_BIN_2 +223 0x0304 //RX_FDEQ_BIN_3 +224 0x0404 //RX_FDEQ_BIN_4 +225 0x0209 //RX_FDEQ_BIN_5 +226 0x0808 //RX_FDEQ_BIN_6 +227 0x090A //RX_FDEQ_BIN_7 +228 0x0B0C //RX_FDEQ_BIN_8 +229 0x0D0E //RX_FDEQ_BIN_9 +230 0x1013 //RX_FDEQ_BIN_10 +231 0x1719 //RX_FDEQ_BIN_11 +232 0x1B1E //RX_FDEQ_BIN_12 +233 0x1E1E //RX_FDEQ_BIN_13 +234 0x1E28 //RX_FDEQ_BIN_14 +235 0x282C //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x4000 //RX_FDEQ_RESRV_0 +245 0x0320 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0035 //RX_FDDRC_BAND_MARGIN_1 +248 0x00D5 //RX_FDDRC_BAND_MARGIN_2 +249 0x0120 //RX_FDDRC_BAND_MARGIN_3 +250 0x0004 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x2000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x2000 //RX_FDDRC_THRD_3_2 +258 0x5000 //RX_FDDRC_THRD_3_3 +259 0x4000 //RX_FDDRC_SLANT_0_0 +260 0x4000 //RX_FDDRC_SLANT_0_1 +261 0x4000 //RX_FDDRC_SLANT_0_2 +262 0x4000 //RX_FDDRC_SLANT_0_3 +263 0x7FFF //RX_FDDRC_SLANT_1_0 +264 0x7FFF //RX_FDDRC_SLANT_1_1 +265 0x7FFF //RX_FDDRC_SLANT_1_2 +266 0x7FFF //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +286 0x0068 //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 +#VOL 5 +163 0x6000 //RX_TDDRC_ALPHA_UP_1 +164 0x6000 //RX_TDDRC_ALPHA_UP_2 +165 0x6000 //RX_TDDRC_ALPHA_UP_3 +166 0x1000 //RX_TDDRC_ALPHA_UP_4 +184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +190 0x7214 //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +269 0x0002 //RX_TDDRC_THRD_0 +270 0x0004 //RX_TDDRC_THRD_1 +271 0x1A00 //RX_TDDRC_THRD_2 +272 0x1A00 //RX_TDDRC_THRD_3 +273 0x7EB8 //RX_TDDRC_SLANT_0 +274 0x2500 //RX_TDDRC_SLANT_1 +275 0x6000 //RX_TDDRC_ALPHA_UP_0 +276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x199A //RX_TDDRC_HMNC_GAIN +279 0x0001 //RX_TDDRC_SMT_FLAG +280 0x0CCD //RX_TDDRC_SMT_W +281 0x04BC //RX_TDDRC_DRC_GAIN +195 0x0020 //RX_FDEQ_SUBNUM +196 0x484E //RX_FDEQ_GAIN_0 +197 0x4E4E //RX_FDEQ_GAIN_1 +198 0x4E4E //RX_FDEQ_GAIN_2 +199 0x4848 //RX_FDEQ_GAIN_3 +200 0x484E //RX_FDEQ_GAIN_4 +201 0x6E4E //RX_FDEQ_GAIN_5 +202 0x4850 //RX_FDEQ_GAIN_6 +203 0x4848 //RX_FDEQ_GAIN_7 +204 0x4860 //RX_FDEQ_GAIN_8 +205 0x7468 //RX_FDEQ_GAIN_9 +206 0x6060 //RX_FDEQ_GAIN_10 +207 0x6666 //RX_FDEQ_GAIN_11 +208 0x6666 //RX_FDEQ_GAIN_12 +209 0x6666 //RX_FDEQ_GAIN_13 +210 0x6060 //RX_FDEQ_GAIN_14 +211 0x6060 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0202 //RX_FDEQ_BIN_0 +221 0x0203 //RX_FDEQ_BIN_1 +222 0x0303 //RX_FDEQ_BIN_2 +223 0x0304 //RX_FDEQ_BIN_3 +224 0x0404 //RX_FDEQ_BIN_4 +225 0x0209 //RX_FDEQ_BIN_5 +226 0x0808 //RX_FDEQ_BIN_6 +227 0x090A //RX_FDEQ_BIN_7 +228 0x0B0C //RX_FDEQ_BIN_8 +229 0x0D0E //RX_FDEQ_BIN_9 +230 0x1013 //RX_FDEQ_BIN_10 +231 0x1719 //RX_FDEQ_BIN_11 +232 0x1B1E //RX_FDEQ_BIN_12 +233 0x1E1E //RX_FDEQ_BIN_13 +234 0x1E28 //RX_FDEQ_BIN_14 +235 0x282C //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x4000 //RX_FDEQ_RESRV_0 +245 0x0320 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0035 //RX_FDDRC_BAND_MARGIN_1 +248 0x00D5 //RX_FDDRC_BAND_MARGIN_2 +249 0x0120 //RX_FDDRC_BAND_MARGIN_3 +250 0x0004 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x2000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x2000 //RX_FDDRC_THRD_3_2 +258 0x5000 //RX_FDDRC_THRD_3_3 +259 0x4000 //RX_FDDRC_SLANT_0_0 +260 0x4000 //RX_FDDRC_SLANT_0_1 +261 0x4000 //RX_FDDRC_SLANT_0_2 +262 0x4000 //RX_FDDRC_SLANT_0_3 +263 0x7FFF //RX_FDDRC_SLANT_1_0 +264 0x7FFF //RX_FDDRC_SLANT_1_1 +265 0x7FFF //RX_FDDRC_SLANT_1_2 +266 0x7FFF //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +286 0x0097 //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 +#VOL 6 +163 0x6000 //RX_TDDRC_ALPHA_UP_1 +164 0x6000 //RX_TDDRC_ALPHA_UP_2 +165 0x6000 //RX_TDDRC_ALPHA_UP_3 +166 0x1000 //RX_TDDRC_ALPHA_UP_4 +184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +190 0x7214 //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +269 0x0002 //RX_TDDRC_THRD_0 +270 0x0004 //RX_TDDRC_THRD_1 +271 0x1A00 //RX_TDDRC_THRD_2 +272 0x1A00 //RX_TDDRC_THRD_3 +273 0x7EB8 //RX_TDDRC_SLANT_0 +274 0x2500 //RX_TDDRC_SLANT_1 +275 0x6000 //RX_TDDRC_ALPHA_UP_0 +276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x199A //RX_TDDRC_HMNC_GAIN +279 0x0001 //RX_TDDRC_SMT_FLAG +280 0x0CCD //RX_TDDRC_SMT_W +281 0x04BC //RX_TDDRC_DRC_GAIN +195 0x0020 //RX_FDEQ_SUBNUM +196 0x484E //RX_FDEQ_GAIN_0 +197 0x4E4E //RX_FDEQ_GAIN_1 +198 0x4E4E //RX_FDEQ_GAIN_2 +199 0x4848 //RX_FDEQ_GAIN_3 +200 0x484E //RX_FDEQ_GAIN_4 +201 0x6E4E //RX_FDEQ_GAIN_5 +202 0x4850 //RX_FDEQ_GAIN_6 +203 0x4848 //RX_FDEQ_GAIN_7 +204 0x4860 //RX_FDEQ_GAIN_8 +205 0x7468 //RX_FDEQ_GAIN_9 +206 0x6060 //RX_FDEQ_GAIN_10 +207 0x6666 //RX_FDEQ_GAIN_11 +208 0x6666 //RX_FDEQ_GAIN_12 +209 0x6666 //RX_FDEQ_GAIN_13 +210 0x6060 //RX_FDEQ_GAIN_14 +211 0x6060 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0202 //RX_FDEQ_BIN_0 +221 0x0203 //RX_FDEQ_BIN_1 +222 0x0303 //RX_FDEQ_BIN_2 +223 0x0304 //RX_FDEQ_BIN_3 +224 0x0404 //RX_FDEQ_BIN_4 +225 0x0209 //RX_FDEQ_BIN_5 +226 0x0808 //RX_FDEQ_BIN_6 +227 0x090A //RX_FDEQ_BIN_7 +228 0x0B0C //RX_FDEQ_BIN_8 +229 0x0D0E //RX_FDEQ_BIN_9 +230 0x1013 //RX_FDEQ_BIN_10 +231 0x1719 //RX_FDEQ_BIN_11 +232 0x1B1E //RX_FDEQ_BIN_12 +233 0x1E1E //RX_FDEQ_BIN_13 +234 0x1E28 //RX_FDEQ_BIN_14 +235 0x282C //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x4000 //RX_FDEQ_RESRV_0 +245 0x0320 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0035 //RX_FDDRC_BAND_MARGIN_1 +248 0x00D5 //RX_FDDRC_BAND_MARGIN_2 +249 0x0120 //RX_FDDRC_BAND_MARGIN_3 +250 0x0004 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x2000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x2000 //RX_FDDRC_THRD_3_2 +258 0x5000 //RX_FDDRC_THRD_3_3 +259 0x4000 //RX_FDDRC_SLANT_0_0 +260 0x4000 //RX_FDDRC_SLANT_0_1 +261 0x4000 //RX_FDDRC_SLANT_0_2 +262 0x4000 //RX_FDDRC_SLANT_0_3 +263 0x7FFF //RX_FDDRC_SLANT_1_0 +264 0x7FFF //RX_FDDRC_SLANT_1_1 +265 0x7FFF //RX_FDDRC_SLANT_1_2 +266 0x7FFF //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +286 0x0100 //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 + +#CASE_NAME HANDSFREE-HANDSFREE-VOICE_GENERIC-WB +#PARAM_MODE FULL +#PARAM_TYPE TX+2RX +#TOTAL_CUSTOM_STEP 7+7 +#TX +0 0x0001 //TX_OPERATION_MODE_0 +1 0x0001 //TX_OPERATION_MODE_1 +2 0x0033 //TX_PATCH_REG +3 0x2F7C //TX_SENDFUNC_MODE_0 +4 0x0001 //TX_SENDFUNC_MODE_1 +5 0x0003 //TX_NUM_MIC +6 0x0001 //TX_SAMPLINGFREQ_SIG +7 0x0001 //TX_SAMPLINGFREQ_PROC +8 0x000A //TX_FRAME_SZ_SIG +9 0x000A //TX_FRAME_SZ +10 0x0000 //TX_DELAY_OPT +11 0x0028 //TX_MAX_TAIL_LENGTH +12 0x0001 //TX_NUM_LOUTCHN +13 0x0001 //TX_MAXNUM_AECREF +14 0x0000 //TX_DBG_FUNC_REG +15 0x0000 //TX_DBG_FUNC_REG1 +16 0x0000 //TX_SYS_RESRV_0 +17 0x0000 //TX_SYS_RESRV_1 +18 0x0000 //TX_SYS_RESRV_2 +19 0x0000 //TX_SYS_RESRV_3 +20 0x0000 //TX_DIST2REF0 +21 0x00A3 //TX_DIST2REF1 +22 0x001B //TX_DIST2REF_02 +23 0x0000 //TX_DIST2REF_03 +24 0x0000 //TX_DIST2REF_04 +25 0x0000 //TX_DIST2REF_05 +26 0x0000 //TX_MMIC +27 0x1000 //TX_PGA_0 +28 0x1000 //TX_PGA_1 +29 0x1000 //TX_PGA_2 +30 0x0000 //TX_PGA_3 +31 0x0000 //TX_PGA_4 +32 0x0000 //TX_PGA_5 +33 0x0001 //TX_MIC_PAIRS +34 0x0000 //TX_MIC_PAIRS_HS +35 0x0002 //TX_MICS_FOR_BF +36 0x0000 //TX_MIC_PAIRS_FORL1 +37 0x0002 //TX_MICS_OF_PAIR0 +38 0x0002 //TX_MICS_OF_PAIR1 +39 0x0002 //TX_MICS_OF_PAIR2 +40 0x0002 //TX_MICS_OF_PAIR3 +41 0x0000 //TX_MIC_DATA_SRC0 +42 0x0002 //TX_MIC_DATA_SRC1 +43 0x0001 //TX_MIC_DATA_SRC2 +44 0x0000 //TX_MIC_DATA_SRC3 +45 0x0000 //TX_MIC_PAIR_CH_04 +46 0x0000 //TX_MIC_PAIR_CH_05 +47 0x0000 //TX_MIC_PAIR_CH_10 +48 0x0000 //TX_MIC_PAIR_CH_11 +49 0x0000 //TX_MIC_PAIR_CH_12 +50 0x0000 //TX_MIC_PAIR_CH_13 +51 0x0000 //TX_MIC_PAIR_CH_14 +52 0x05DC //TX_HD_BIN_MASK +53 0x0010 //TX_HD_SUBAND_MASK +54 0x19A1 //TX_HD_FRAME_AVG_MASK +55 0x0320 //TX_HD_MIN_FRQ +56 0x1000 //TX_HD_ALPHA_PSD +57 0x1100 //TX_T_PHPR1 +58 0x0000 //TX_T_PHPR2 +59 0x0000 //TX_T_PTPR +60 0x0000 //TX_T_PNPR +61 0x0000 //TX_T_PAPR1 +62 0xEE6C //TX_T_PSDVAT +63 0x0800 //TX_CNT +64 0x4000 //TX_ANTI_HOWL_GAIN +65 0x0001 //TX_MICFORBFMARK_0 +66 0x0001 //TX_MICFORBFMARK_1 +67 0x0001 //TX_MICFORBFMARK_2 +68 0x0001 //TX_MICFORBFMARK_3 +69 0x0001 //TX_MICFORBFMARK_4 +70 0x0001 //TX_MICFORBFMARK_5 +71 0x0000 //TX_DIST2REF_10 +72 0x3A66 //TX_DIST2REF_11 +73 0x053D //TX_DIST2REF2 +74 0x0000 //TX_DIST2REF_13 +75 0x0000 //TX_DIST2REF_14 +76 0x0000 //TX_DIST2REF_15 +77 0x0000 //TX_DIST2REF_20 +78 0x0000 //TX_DIST2REF_21 +79 0x0000 //TX_DIST2REF_22 +80 0x0000 //TX_DIST2REF_23 +81 0x0000 //TX_DIST2REF_24 +82 0x0000 //TX_DIST2REF_25 +83 0x0000 //TX_DIST2REF_30 +84 0x0000 //TX_DIST2REF_31 +85 0x0000 //TX_DIST2REF_32 +86 0x0000 //TX_DIST2REF_33 +87 0x0000 //TX_DIST2REF_34 +88 0x0000 //TX_DIST2REF_35 +89 0x0000 //TX_MIC_LOC_00 +90 0x0000 //TX_MIC_LOC_01 +91 0x0000 //TX_MIC_LOC_02 +92 0x0000 //TX_MIC_LOC_03 +93 0x0000 //TX_MIC_LOC_04 +94 0x0000 //TX_MIC_LOC_05 +95 0x0000 //TX_MIC_LOC_10 +96 0x0000 //TX_MIC_LOC_11 +97 0x0000 //TX_MIC_LOC_12 +98 0x0000 //TX_MIC_LOC_13 +99 0x0000 //TX_MIC_LOC_14 +100 0x0000 //TX_MIC_LOC_15 +101 0x0000 //TX_MIC_LOC_20 +102 0x0000 //TX_MIC_LOC_21 +103 0x0000 //TX_MIC_LOC_22 +104 0x0000 //TX_MIC_LOC_23 +105 0x0000 //TX_MIC_LOC_24 +106 0x0000 //TX_MIC_LOC_25 +107 0x0800 //TX_MIC_REFBLK_VOLUME +108 0x0C00 //TX_MIC_BLOCK_VOLUME +109 0x0000 //TX_INVERSE_MASK +110 0x0000 //TX_ADCS_MASK +111 0x04D0 //TX_ADCS_GAIN +112 0x4000 //TX_NFC_GAINFAC +113 0x0000 //TX_MAINMIC_BLKFACTOR +114 0x0000 //TX_REFMIC_BLKFACTOR +115 0x0000 //TX_BLMIC_BLKFACTOR +116 0x0000 //TX_BRMIC_BLKFACTOR +117 0x0031 //TX_MICBLK_START_BIN +118 0x0060 //TX_MICBLK_END_BIN +119 0x0015 //TX_MICBLK_FE_HOLD +120 0xFFF2 //TX_MICBLK_MR_EXP_TH +121 0xFFF2 //TX_MICBLK_LR_EXP_TH +122 0x0000 //TX_FENE_HOLD +123 0x4000 //TX_FE_ENER_TH_MTS +124 0x0004 //TX_FE_ENER_TH_EXP +125 0x6000 //TX_C_POST_FLT_MIC_MAINBLK +126 0x6000 //TX_C_POST_FLT_MIC_REFBLK +127 0x0010 //TX_MIC_BLOCK_N +128 0x7B02 //TX_A_HP +129 0x4000 //TX_B_PE +130 0x5000 //TX_THR_PITCH_DET_0 +131 0x4800 //TX_THR_PITCH_DET_1 +132 0x4000 //TX_THR_PITCH_DET_2 +133 0x0008 //TX_PITCH_BFR_LEN +134 0x0003 //TX_SBD_PITCH_DET +135 0x0050 //TX_TD_AEC_L +136 0x4000 //TX_MU0_UNP_TD_AEC +137 0x1000 //TX_MU0_PTD_TD_AEC +138 0x0000 //TX_PP_RESRV_0 +139 0x2A94 //TX_PP_RESRV_1 +140 0x55F0 //TX_PP_RESRV_2 +141 0x0000 //TX_PP_RESRV_3 +142 0x0000 //TX_PP_RESRV_4 +143 0x0000 //TX_PP_RESRV_5 +144 0x0000 //TX_PP_RESRV_6 +145 0x0000 //TX_PP_RESRV_7 +146 0x0028 //TX_TAIL_LENGTH +147 0x0300 //TX_AEC_REF_GAIN_0 +148 0x0800 //TX_AEC_REF_GAIN_1 +149 0x0800 //TX_AEC_REF_GAIN_2 +150 0x6800 //TX_EAD_THR +151 0x1000 //TX_THR_RE_EST +152 0x0200 //TX_MIN_EQ_RE_EST_0 +153 0x0100 //TX_MIN_EQ_RE_EST_1 +154 0x0200 //TX_MIN_EQ_RE_EST_2 +155 0x0200 //TX_MIN_EQ_RE_EST_3 +156 0x0200 //TX_MIN_EQ_RE_EST_4 +157 0x0200 //TX_MIN_EQ_RE_EST_5 +158 0x0200 //TX_MIN_EQ_RE_EST_6 +159 0x1000 //TX_MIN_EQ_RE_EST_7 +160 0x1000 //TX_MIN_EQ_RE_EST_8 +161 0x1000 //TX_MIN_EQ_RE_EST_9 +162 0x1000 //TX_MIN_EQ_RE_EST_10 +163 0x1000 //TX_MIN_EQ_RE_EST_11 +164 0x1000 //TX_MIN_EQ_RE_EST_12 +165 0x4000 //TX_LAMBDA_RE_EST +166 0x4000 //TX_LAMBDA_CB_NLE +167 0x7FFF //TX_C_POST_FLT +168 0x5000 //TX_GAIN_NP +169 0x0180 //TX_SE_HOLD_N +170 0x00C8 //TX_DT_HOLD_N +171 0x06B0 //TX_DT2_HOLD_N +172 0x6666 //TX_AEC_RESRV_0 +173 0x0000 //TX_AEC_RESRV_1 +174 0x0014 //TX_AEC_RESRV_2 +175 0x0000 //TX_MIC_DELAY_LENGTH +176 0x0000 //TX_REF_DELAY_LENGTH +177 0x0000 //TX_ADD_LINEIN_GAINL +178 0x0000 //TX_ADD_LINEIN_GAINH +179 0x0000 //TX_MIN_EQ_RE_EST_14 +180 0x0000 //TX_DTD_THR1_8 +181 0x7FFF //TX_DTD_THR2_8 +182 0x0000 //TX_DTD_MIC_BLK2 +183 0x0008 //TX_FRQ_LIN_LEN +184 0x7FFF //TX_FRQ_AEC_LEN_RHO +185 0x6000 //TX_MU0_UNP_FRQ_AEC +186 0x4000 //TX_MU0_PTD_FRQ_AEC +187 0x000A //TX_MINENOISETH +188 0x0800 //TX_MU0_RE_EST +189 0x0001 //TX_AEC_NUM_CH +190 0x0000 //TX_BIGECHOATTENUATION_MAX +191 0x2000 //TX_A_POST_FLT_MICBLK +192 0x0000 //TX_BLKENERTH +193 0x0000 //TX_BLKENERHIGHTH +194 0x0000 //TX_NORMENERTH +195 0x0000 //TX_NORMENERHIGHTH +196 0x0000 //TX_NORMENERHIGHTHL +197 0x765C //TX_DTD_THR1_0 +198 0x765C //TX_DTD_THR1_1 +199 0x765C //TX_DTD_THR1_2 +200 0x7FF0 //TX_DTD_THR1_3 +201 0x7FF0 //TX_DTD_THR1_4 +202 0x7FF0 //TX_DTD_THR1_5 +203 0x7FF0 //TX_DTD_THR1_6 +204 0x5000 //TX_DTD_THR2_0 +205 0x5000 //TX_DTD_THR2_1 +206 0x5000 //TX_DTD_THR2_2 +207 0x5000 //TX_DTD_THR2_3 +208 0x5000 //TX_DTD_THR2_4 +209 0x5000 //TX_DTD_THR2_5 +210 0x5000 //TX_DTD_THR2_6 +211 0x7FFF //TX_DTD_THR3 +212 0x0000 //TX_SPK_CUT_K +213 0x07D0 //TX_DT_CUT_K +214 0x0100 //TX_DT_CUT_THR +215 0x04EB //TX_COMFORT_G +216 0x01F4 //TX_POWER_YOUT_TH +217 0x4000 //TX_FDPFGAINECHO +218 0x0000 //TX_DTD_HD_THR +219 0x0000 //TX_SPK_CUT_K_S +220 0x0000 //TX_DTD_MIC_BLK +221 0x023E //TX_ADPT_STRICT_L +222 0x023E //TX_ADPT_STRICT_H +223 0x03E8 //TX_RATIO_DT_L_TH_LOW +224 0x3A98 //TX_RATIO_DT_H_TH_LOW +225 0x0578 //TX_RATIO_DT_L_TH_HIGH +226 0x43FB //TX_RATIO_DT_H_TH_HIGH +227 0x0001 //TX_RATIO_DT_L0_TH +228 0x7FFF //TX_B_POST_FILT_ECHO_L +229 0x7FFF //TX_B_POST_FILT_ECHO_H +230 0x0200 //TX_MIN_G_CTRL_ECHO +231 0x1000 //TX_B_LESSCUT_RTO_ECHO +232 0x0000 //TX_EPD_OFFSET_00 +233 0x0000 //TX_EPD_OFFST_01 +234 0x03E8 //TX_RATIO_DT_L0_TH_HIGH +235 0x7FFF //TX_RATIO_DT_H_TH_CUT +236 0x7FFF //TX_MIN_EQ_RE_EST_13 +237 0x0000 //TX_DTD_THR1_7 +238 0x0000 //TX_DTD_THR2_7 +239 0x0800 //TX_DT_RESRV_7 +240 0x0800 //TX_DT_RESRV_8 +241 0x0000 //TX_DT_RESRV_9 +242 0xF800 //TX_THR_SN_EST_0 +243 0xFA00 //TX_THR_SN_EST_1 +244 0xFA00 //TX_THR_SN_EST_2 +245 0xFB00 //TX_THR_SN_EST_3 +246 0xFA00 //TX_THR_SN_EST_4 +247 0xFA00 //TX_THR_SN_EST_5 +248 0xF800 //TX_THR_SN_EST_6 +249 0xF800 //TX_THR_SN_EST_7 +250 0x0100 //TX_DELTA_THR_SN_EST_0 +251 0x0100 //TX_DELTA_THR_SN_EST_1 +252 0x0200 //TX_DELTA_THR_SN_EST_2 +253 0x0100 //TX_DELTA_THR_SN_EST_3 +254 0x0100 //TX_DELTA_THR_SN_EST_4 +255 0x0200 //TX_DELTA_THR_SN_EST_5 +256 0x0200 //TX_DELTA_THR_SN_EST_6 +257 0x0200 //TX_DELTA_THR_SN_EST_7 +258 0x4000 //TX_LAMBDA_NN_EST_0 +259 0x4000 //TX_LAMBDA_NN_EST_1 +260 0x4000 //TX_LAMBDA_NN_EST_2 +261 0x4000 //TX_LAMBDA_NN_EST_3 +262 0x4000 //TX_LAMBDA_NN_EST_4 +263 0x4000 //TX_LAMBDA_NN_EST_5 +264 0x4000 //TX_LAMBDA_NN_EST_6 +265 0x4000 //TX_LAMBDA_NN_EST_7 +266 0x0400 //TX_N_SN_EST +267 0x001E //TX_INBEAM_T +268 0x0041 //TX_INBEAMHOLDT +269 0x2000 //TX_G_STRICT +270 0x2000 //TX_EQ_THR_BF +271 0x799A //TX_LAMBDA_EQ_BF +272 0x1000 //TX_NE_RTO_TH +273 0x0400 //TX_NE_RTO_TH_L +274 0x0800 //TX_MAINREFRTOH_TH_H +275 0x0800 //TX_MAINREFRTOH_TH_L +276 0x0800 //TX_MAINREFRTO_TH_H +277 0x0800 //TX_MAINREFRTO_TH_L +278 0x0200 //TX_MAINREFRTO_TH_EQ +279 0x2000 //TX_B_POST_FLT_0 +280 0x1000 //TX_B_POST_FLT_1 +281 0x0010 //TX_NS_LVL_CTRL_0 +282 0x0014 //TX_NS_LVL_CTRL_1 +283 0x0018 //TX_NS_LVL_CTRL_2 +284 0x0016 //TX_NS_LVL_CTRL_3 +285 0x0014 //TX_NS_LVL_CTRL_4 +286 0x0011 //TX_NS_LVL_CTRL_5 +287 0x0014 //TX_NS_LVL_CTRL_6 +288 0x0011 //TX_NS_LVL_CTRL_7 +289 0x000F //TX_MIN_GAIN_S_0 +290 0x0010 //TX_MIN_GAIN_S_1 +291 0x0010 //TX_MIN_GAIN_S_2 +292 0x0010 //TX_MIN_GAIN_S_3 +293 0x0010 //TX_MIN_GAIN_S_4 +294 0x0010 //TX_MIN_GAIN_S_5 +295 0x0010 //TX_MIN_GAIN_S_6 +296 0x000F //TX_MIN_GAIN_S_7 +297 0x6000 //TX_NMOS_SUP +298 0x0000 //TX_NS_MAX_PRI_SNR_TH +299 0x0000 //TX_NMOS_SUP_MENSA +300 0x7FFF //TX_SNRI_SUP_0 +301 0x4000 //TX_SNRI_SUP_1 +302 0x4000 //TX_SNRI_SUP_2 +303 0x4000 //TX_SNRI_SUP_3 +304 0x4000 //TX_SNRI_SUP_4 +305 0x50C0 //TX_SNRI_SUP_5 +306 0x4000 //TX_SNRI_SUP_6 +307 0x7FFF //TX_SNRI_SUP_7 +308 0x7FFF //TX_THR_LFNS +309 0x0018 //TX_G_LFNS +310 0x09C4 //TX_GAIN0_NTH +311 0x000A //TX_MUSIC_MORENS +312 0x7FFF //TX_A_POST_FILT_0 +313 0x2000 //TX_A_POST_FILT_1 +314 0x5000 //TX_A_POST_FILT_S_0 +315 0x4C00 //TX_A_POST_FILT_S_1 +316 0x4000 //TX_A_POST_FILT_S_2 +317 0x6000 //TX_A_POST_FILT_S_3 +318 0x4000 //TX_A_POST_FILT_S_4 +319 0x5000 //TX_A_POST_FILT_S_5 +320 0x6000 //TX_A_POST_FILT_S_6 +321 0x7000 //TX_A_POST_FILT_S_7 +322 0x2000 //TX_B_POST_FILT_0 +323 0x2000 //TX_B_POST_FILT_1 +324 0x2000 //TX_B_POST_FILT_2 +325 0x4000 //TX_B_POST_FILT_3 +326 0x4000 //TX_B_POST_FILT_4 +327 0x1000 //TX_B_POST_FILT_5 +328 0x1000 //TX_B_POST_FILT_6 +329 0x2000 //TX_B_POST_FILT_7 +330 0x4000 //TX_B_LESSCUT_RTO_S_0 +331 0x7FFF //TX_B_LESSCUT_RTO_S_1 +332 0x7FFF //TX_B_LESSCUT_RTO_S_2 +333 0x7FFF //TX_B_LESSCUT_RTO_S_3 +334 0x7FFF //TX_B_LESSCUT_RTO_S_4 +335 0x6000 //TX_B_LESSCUT_RTO_S_5 +336 0x7FFF //TX_B_LESSCUT_RTO_S_6 +337 0x7FFF //TX_B_LESSCUT_RTO_S_7 +338 0x7C00 //TX_LAMBDA_PFILT +339 0x7C00 //TX_LAMBDA_PFILT_S_0 +340 0x7C00 //TX_LAMBDA_PFILT_S_1 +341 0x7A00 //TX_LAMBDA_PFILT_S_2 +342 0x7C00 //TX_LAMBDA_PFILT_S_3 +343 0x7C00 //TX_LAMBDA_PFILT_S_4 +344 0x7C00 //TX_LAMBDA_PFILT_S_5 +345 0x7C00 //TX_LAMBDA_PFILT_S_6 +346 0x7C00 //TX_LAMBDA_PFILT_S_7 +347 0x0200 //TX_K_PEPPER +348 0x0800 //TX_A_PEPPER +349 0x1EAA //TX_K_PEPPER_HF +350 0x0600 //TX_A_PEPPER_HF +351 0x0001 //TX_HMNC_BST_FLG +352 0x0200 //TX_HMNC_BST_THR +353 0x0800 //TX_DT_BINVAD_TH_0 +354 0x0800 //TX_DT_BINVAD_TH_1 +355 0x0200 //TX_DT_BINVAD_TH_2 +356 0x0800 //TX_DT_BINVAD_TH_3 +357 0x1D4C //TX_DT_BINVAD_ENDF +358 0x0800 //TX_C_POST_FLT_DT +359 0x0CCD //TX_NS_B_POST_FLT_LESSCUT +360 0x0140 //TX_DT_BOOST +361 0x0000 //TX_BF_SGRAD_FLG +362 0x0005 //TX_BF_DVG_TH +363 0x001E //TX_SN_C_F +364 0x0000 //TX_K_APT +365 0x0001 //TX_NOISEDET +366 0x0064 //TX_NDETCT +367 0x0032 //TX_NOISE_TH_0 +368 0x7FFF //TX_NOISE_TH_0_2 +369 0x7FFF //TX_NOISE_TH_0_3 +370 0x017E //TX_NOISE_TH_1 +371 0x0230 //TX_NOISE_TH_2 +372 0x3492 //TX_NOISE_TH_3 +373 0x4E20 //TX_NOISE_TH_4 +374 0x55B8 //TX_NOISE_TH_5 +375 0x49E6 //TX_NOISE_TH_5_2 +376 0x0001 //TX_NOISE_TH_5_3 +377 0x7FFF //TX_NOISE_TH_5_4 +378 0x0F0A //TX_NOISE_TH_6 +379 0x0033 //TX_MINENOISE_TH +380 0xD508 //TX_MORENS_TFMASK_TH +381 0x0001 //TX_DRC_QUIET_FLOOR +382 0x7999 //TX_RATIODTL_CUT_TH +383 0x0119 //TX_DT_CUT_K1 +384 0x0666 //TX_OUT_ENER_S_TH_CLEAN +385 0x0666 //TX_OUT_ENER_S_TH_LESSCLEAN +386 0x0333 //TX_OUT_ENER_S_TH_NOISY +387 0x019A //TX_OUT_ENER_TH_NOISE +388 0x0333 //TX_OUT_ENER_TH_SPEECH +389 0x2000 //TX_SN_NPB_GAIN +390 0x0000 //TX_NN_NPB_GAIN +391 0x7FFF //TX_POST_MASK_SUP_HSNE +392 0x7FFF //TX_TAIL_DET_TH +393 0x4000 //TX_B_LESSCUT_RTO_WTA +394 0x0000 //TX_MEL_G_R +395 0x0080 //TX_SUPHIGH_TH +396 0x0000 //TX_MASK_G_R +397 0x0002 //TX_EXTRA_NS_L +398 0x1800 //TX_C_POST_FLT_MASK +399 0x4000 //TX_A_POST_FLT_WNS +400 0x0148 //TX_MIN_G_LOW300HZ +401 0x0001 //TX_MAXLEVEL_CNG +402 0x00B4 //TX_STN_NOISE_TH +403 0x4000 //TX_POST_MASK_SUP +404 0x7FFF //TX_POST_MASK_ADJUST +405 0x00C8 //TX_NS_ENOISE_MIC0_TH +406 0x0033 //TX_MINENOISE_MIC0_TH +407 0x012C //TX_MINENOISE_MIC0_S_TH +408 0x7FFF //TX_MIN_G_CTRL_SSNS +409 0x0000 //TX_METAL_RTO_THR +410 0x4848 //TX_NS_FP_K_METAL +411 0x3A98 //TX_NOISEDET_BOOST_TH +412 0x0FA0 //TX_NSMOOTH_TH +413 0x0000 //TX_NS_RESRV_8 +414 0x1800 //TX_RHO_UPB +415 0x0BB8 //TX_N_HOLD_HS +416 0x0050 //TX_N_RHO_BFR0 +417 0x7FFF //TX_LAMBDA_ARSP_EST +418 0x0100 //TX_EXTRA_GAIN_MICBLOCK +419 0x0CCD //TX_THR_STD_NSR +420 0x019A //TX_THR_STD_PLH +421 0x2AF8 //TX_N_HOLD_STD +422 0x0066 //TX_THR_STD_RHO +423 0x2000 //TX_BF_RESET_THR_HS +424 0x09C4 //TX_SB_RTO_MEAN_TH +425 0x0000 //TX_SB_RHO_MEAN_TH_NTALK +426 0x3800 //TX_SB_RTO_MEAN_TH_ABN +427 0x2EE0 //TX_SB_RTO_MEAN_TH_RUB +428 0x0000 //TX_WTA_EN_RTO_TH +429 0x0000 //TX_TOP_ENER_TH_F +430 0x0000 //TX_DESIRED_TALK_HOLDT +431 0x0800 //TX_MIC_BLOCK_FACTOR +432 0x0000 //TX_NSEST_BFRLRNRDC +433 0x0000 //TX_THR_POST_FLT_HS +434 0x0010 //TX_HS_VAD_BIN +435 0x2666 //TX_THR_VAD_HS +436 0x2CCD //TX_MEAN_RTO_MIN_TH2 +437 0x0032 //TX_SILENCE_T +438 0x0000 //TX_A_POST_FLT_WTA +439 0x799A //TX_LAMBDA_PFLT_WTA +440 0x0000 //TX_SB_RHO_MEAN2_TH +441 0x0190 //TX_SB_RHO_MEAN3_TH +442 0x0000 //TX_HS_RESRV_4 +443 0x0000 //TX_HS_RESRV_5 +444 0x003C //TX_DOA_VAD_THR_1 +445 0x0000 //TX_DOA_VAD_THR_2 +446 0x0028 //TX_DOA_VAD_THR1_0 +447 0x0028 //TX_DOA_VAD_THR1_1 +448 0x0000 //TX_SRC_DOA_RNG_LOW_0A +449 0x00B4 //TX_SRC_DOA_RNG_HIGH_0A +450 0x005A //TX_DFLT_SRC_DOA_0A +451 0x0000 //TX_SRC_DOA_RNG_LOW_0B +452 0x0000 //TX_SRC_DOA_RNG_HIGH_0B +453 0x0000 //TX_DFLT_SRC_DOA_0B +454 0x0000 //TX_SRC_DOA_RNG_LOW_0C +455 0x0000 //TX_SRC_DOA_RNG_HIGH_0C +456 0x0000 //TX_DFLT_SRC_DOA_0C +457 0x0000 //TX_SRC_DOA_RNG_LOW_0D +458 0x0000 //TX_SRC_DOA_RNG_HIGH_0D +459 0x0000 //TX_DFLT_SRC_DOA_0D +460 0x0000 //TX_SRC_DOA_RNG_LOW_1A +461 0x00B4 //TX_SRC_DOA_RNG_HIGH_1A +462 0x005A //TX_DFLT_SRC_DOA_1A +463 0x0000 //TX_SRC_DOA_RNG_LOW_1B +464 0x00B4 //TX_SRC_DOA_RNG_HIGH_1B +465 0x005A //TX_DFLT_SRC_DOA_1B +466 0x0000 //TX_SRC_DOA_RNG_LOW_1C +467 0x00B4 //TX_SRC_DOA_RNG_HIGH_1C +468 0x005A //TX_DFLT_SRC_DOA_1C +469 0x0000 //TX_SRC_DOA_RNG_LOW_1D +470 0x00B4 //TX_SRC_DOA_RNG_HIGH_1D +471 0x005A //TX_DFLT_SRC_DOA_1D +472 0x0100 //TX_BF_HOLDOFF_T +473 0x7FFF //TX_DOA_COST_FACTOR +474 0x4000 //TX_MAINTOREFR_TH0 +475 0x071C //TX_DOA_TRK_THR +476 0x012C //TX_DOA_TRACK_HT +477 0x0200 //TX_N1_HOLD_HF +478 0x0100 //TX_N2_HOLD_HF +479 0x3000 //TX_BF_RESET_THR_HF +480 0x7333 //TX_DOA_SMOOTH +481 0x0800 //TX_MU_BF +482 0x0800 //TX_BF_MU_LF_B2 +483 0x0040 //TX_BF_FC_END_BIN_B2 +484 0x0020 //TX_BF_FC_END_BIN +485 0x0000 //TX_HF_RESRV_25 +486 0x0000 //TX_HF_RESRV_26 +487 0x0007 //TX_N_DOA_SEED +488 0x0001 //TX_FINE_DOA_SEARCH_FLG +489 0x0000 //TX_HF_RESRV_27 +490 0x038E //TX_DLT_SRC_DOA_RNG +491 0x0200 //TX_BF_MU_LF +492 0x0000 //TX_DFLT_SRC_LOC_0 +493 0x7FFF //TX_DFLT_SRC_LOC_1 +494 0x0000 //TX_DFLT_SRC_LOC_2 +495 0x038E //TX_DOA_TRACK_VADTH +496 0x0000 //TX_DOA_TRACK_NEW +497 0x01E0 //TX_NOR_OFF_THR +498 0x7C00 //TX_MORE_ON_700HZ_THR +499 0x0000 //TX_MU_BF_ADPT_NS +500 0x0000 //TX_ADAPT_LEN +501 0x6666 //TX_MORE_SNS +502 0x0000 //TX_NOR_OFF_TH1 +503 0x0000 //TX_WIDE_MASK_TH +504 0xD333 //TX_SUBSNRATIOHIGH4MEANBCK_THR +505 0x4000 //TX_C_POST_FLT_CUT +506 0x2000 //TX_RADIODTLV +507 0x0320 //TX_POWER_LINEIN_TH +508 0x0014 //TX_FE_VADCOUNT_TH_FC +509 0x000A //TX_ECHO_SUPP_FC +510 0x0C80 //TX_ECHO_TH +511 0x6666 //TX_MIC_TO_BFGAIN +512 0x0000 //TX_MICTOBFGAIN0 +513 0x0000 //TX_FASTMUE_TH +514 0x3000 //TX_DEREVERB_LF_MU +515 0x34CD //TX_DEREVERB_HF_MU +516 0x0007 //TX_DEREVERB_DELAY +517 0x0004 //TX_DEREVERB_COEF_LEN +518 0x0003 //TX_DEREVERB_DNR +519 0x0000 //TX_DEREVERB_ALPHA +520 0x0000 //TX_DEREVERB_BETA +521 0x3A98 //TX_GSC_RTOL_TH +522 0x3A98 //TX_GSC_RTOH_TH +523 0x7E2C //TX_WIDE2_MEANHTH +524 0x0000 //TX_DR_RESRV_5 +525 0x0000 //TX_DR_RESRV_6 +526 0x0000 //TX_DR_RESRV_7 +527 0x0000 //TX_DR_RESRV_8 +528 0x1333 //TX_WIND_MARK_TH +529 0x399A //TX_CORR_THR +530 0x0004 //TX_SNR_THR +531 0x0010 //TX_ENGY_THR +532 0x1770 //TX_CORR_HIGH_TH +533 0x6000 //TX_ENGY_THR_2 +534 0x3400 //TX_MEAN_RTO_THR +535 0x0028 //TX_WNS_ENOISE_MIC0_TH +536 0x3000 //TX_RATIOMICL_TH +537 0x64CD //TX_CALIG_HS +538 0x0000 //TX_LVL_CTRL +539 0x0014 //TX_WIND_SUPRTO +540 0x000A //TX_WNS_MIN_G +541 0x0000 //TX_WNS_B_POST_FLT +542 0x2800 //TX_RATIOMICH_TH +543 0xD120 //TX_WIND_INBEAM_L_TH +544 0x0FA0 //TX_WIND_INBEAM_H_TH +545 0x2000 //TX_WNS_RESRV_0 +546 0x59D8 //TX_WNS_RESRV_1 +547 0x0000 //TX_WNS_RESRV_2 +548 0x0000 //TX_WNS_RESRV_3 +549 0x0000 //TX_WNS_RESRV_4 +550 0x0000 //TX_WNS_RESRV_5 +551 0x0000 //TX_WNS_RESRV_6 +552 0x0000 //TX_PB_B_POST_FLT_LESSCUT +553 0x0070 //TX_BF_LESSCUT_BBIN +554 0x0070 //TX_BF_LESSCUT_EBIN +555 0x0010 //TX_POSTBFB0 +556 0x0070 //TX_POSTBFB +557 0x00B0 //TX_POSTBFE +558 0x0E66 //TX_SPEECH_SNR_TH +559 0x0050 //TX_PB_MAX_PRI_SNR_TH +560 0x770A //TX_MAX_PRI_SNR_TH_L +561 0x0000 //TX_PFGAIN +562 0x0000 //TX_MAINTOREFR_TH +563 0x0000 //TX_SAM_MARK +564 0x0000 //TX_PB_RESRV_0 +565 0x0000 //TX_PB_RESRV_1 +566 0x001C //TX_FDEQ_SUBNUM +567 0x5448 //TX_FDEQ_GAIN_0 +568 0x4847 //TX_FDEQ_GAIN_1 +569 0x4C4E //TX_FDEQ_GAIN_2 +570 0x4E49 //TX_FDEQ_GAIN_3 +571 0x4440 //TX_FDEQ_GAIN_4 +572 0x484E //TX_FDEQ_GAIN_5 +573 0x4F53 //TX_FDEQ_GAIN_6 +574 0x544C //TX_FDEQ_GAIN_7 +575 0x4547 //TX_FDEQ_GAIN_8 +576 0x4542 //TX_FDEQ_GAIN_9 +577 0x3838 //TX_FDEQ_GAIN_10 +578 0x383A //TX_FDEQ_GAIN_11 +579 0x4448 //TX_FDEQ_GAIN_12 +580 0x4848 //TX_FDEQ_GAIN_13 +581 0x4848 //TX_FDEQ_GAIN_14 +582 0x4848 //TX_FDEQ_GAIN_15 +583 0x4848 //TX_FDEQ_GAIN_16 +584 0x4848 //TX_FDEQ_GAIN_17 +585 0x4848 //TX_FDEQ_GAIN_18 +586 0x4848 //TX_FDEQ_GAIN_19 +587 0x4848 //TX_FDEQ_GAIN_20 +588 0x4848 //TX_FDEQ_GAIN_21 +589 0x4848 //TX_FDEQ_GAIN_22 +590 0x4848 //TX_FDEQ_GAIN_23 +591 0x0202 //TX_FDEQ_BIN_0 +592 0x0203 //TX_FDEQ_BIN_1 +593 0x0303 //TX_FDEQ_BIN_2 +594 0x0304 //TX_FDEQ_BIN_3 +595 0x0405 //TX_FDEQ_BIN_4 +596 0x0506 //TX_FDEQ_BIN_5 +597 0x0708 //TX_FDEQ_BIN_6 +598 0x090A //TX_FDEQ_BIN_7 +599 0x0B0C //TX_FDEQ_BIN_8 +600 0x0D0E //TX_FDEQ_BIN_9 +601 0x0E0F //TX_FDEQ_BIN_10 +602 0x0F10 //TX_FDEQ_BIN_11 +603 0x1011 //TX_FDEQ_BIN_12 +604 0x1104 //TX_FDEQ_BIN_13 +605 0x0000 //TX_FDEQ_BIN_14 +606 0x0000 //TX_FDEQ_BIN_15 +607 0x0000 //TX_FDEQ_BIN_16 +608 0x0000 //TX_FDEQ_BIN_17 +609 0x0000 //TX_FDEQ_BIN_18 +610 0x0000 //TX_FDEQ_BIN_19 +611 0x0000 //TX_FDEQ_BIN_20 +612 0x0000 //TX_FDEQ_BIN_21 +613 0x0000 //TX_FDEQ_BIN_22 +614 0x0000 //TX_FDEQ_BIN_23 +615 0x0000 //TX_FDEQ_PADDING +616 0x0020 //TX_PREEQ_SUBNUM_MIC0 +617 0x4848 //TX_PREEQ_GAIN_MIC0_0 +618 0x4848 //TX_PREEQ_GAIN_MIC0_1 +619 0x4848 //TX_PREEQ_GAIN_MIC0_2 +620 0x4848 //TX_PREEQ_GAIN_MIC0_3 +621 0x4848 //TX_PREEQ_GAIN_MIC0_4 +622 0x4848 //TX_PREEQ_GAIN_MIC0_5 +623 0x4848 //TX_PREEQ_GAIN_MIC0_6 +624 0x4848 //TX_PREEQ_GAIN_MIC0_7 +625 0x4848 //TX_PREEQ_GAIN_MIC0_8 +626 0x4848 //TX_PREEQ_GAIN_MIC0_9 +627 0x4848 //TX_PREEQ_GAIN_MIC0_10 +628 0x4848 //TX_PREEQ_GAIN_MIC0_11 +629 0x4848 //TX_PREEQ_GAIN_MIC0_12 +630 0x4848 //TX_PREEQ_GAIN_MIC0_13 +631 0x4848 //TX_PREEQ_GAIN_MIC0_14 +632 0x4848 //TX_PREEQ_GAIN_MIC0_15 +633 0x4848 //TX_PREEQ_GAIN_MIC0_16 +634 0x4848 //TX_PREEQ_GAIN_MIC0_17 +635 0x4848 //TX_PREEQ_GAIN_MIC0_18 +636 0x4848 //TX_PREEQ_GAIN_MIC0_19 +637 0x4848 //TX_PREEQ_GAIN_MIC0_20 +638 0x4848 //TX_PREEQ_GAIN_MIC0_21 +639 0x4848 //TX_PREEQ_GAIN_MIC0_22 +640 0x4848 //TX_PREEQ_GAIN_MIC0_23 +641 0x0202 //TX_PREEQ_BIN_MIC0_0 +642 0x0203 //TX_PREEQ_BIN_MIC0_1 +643 0x0303 //TX_PREEQ_BIN_MIC0_2 +644 0x0304 //TX_PREEQ_BIN_MIC0_3 +645 0x0405 //TX_PREEQ_BIN_MIC0_4 +646 0x0506 //TX_PREEQ_BIN_MIC0_5 +647 0x0708 //TX_PREEQ_BIN_MIC0_6 +648 0x090A //TX_PREEQ_BIN_MIC0_7 +649 0x0B0C //TX_PREEQ_BIN_MIC0_8 +650 0x0D0E //TX_PREEQ_BIN_MIC0_9 +651 0x0F10 //TX_PREEQ_BIN_MIC0_10 +652 0x1011 //TX_PREEQ_BIN_MIC0_11 +653 0x1104 //TX_PREEQ_BIN_MIC0_12 +654 0x101B //TX_PREEQ_BIN_MIC0_13 +655 0x0000 //TX_PREEQ_BIN_MIC0_14 +656 0x0000 //TX_PREEQ_BIN_MIC0_15 +657 0x0000 //TX_PREEQ_BIN_MIC0_16 +658 0x0000 //TX_PREEQ_BIN_MIC0_17 +659 0x0000 //TX_PREEQ_BIN_MIC0_18 +660 0x0000 //TX_PREEQ_BIN_MIC0_19 +661 0x0000 //TX_PREEQ_BIN_MIC0_20 +662 0x0000 //TX_PREEQ_BIN_MIC0_21 +663 0x0000 //TX_PREEQ_BIN_MIC0_22 +664 0x0000 //TX_PREEQ_BIN_MIC0_23 +665 0x0020 //TX_PREEQ_SUBNUM_MIC1 +666 0x4848 //TX_PREEQ_GAIN_MIC1_0 +667 0x4848 //TX_PREEQ_GAIN_MIC1_1 +668 0x4848 //TX_PREEQ_GAIN_MIC1_2 +669 0x4848 //TX_PREEQ_GAIN_MIC1_3 +670 0x4848 //TX_PREEQ_GAIN_MIC1_4 +671 0x4848 //TX_PREEQ_GAIN_MIC1_5 +672 0x494A //TX_PREEQ_GAIN_MIC1_6 +673 0x4B4C //TX_PREEQ_GAIN_MIC1_7 +674 0x4D4E //TX_PREEQ_GAIN_MIC1_8 +675 0x5051 //TX_PREEQ_GAIN_MIC1_9 +676 0x5255 //TX_PREEQ_GAIN_MIC1_10 +677 0x585A //TX_PREEQ_GAIN_MIC1_11 +678 0x5C5F //TX_PREEQ_GAIN_MIC1_12 +679 0x636A //TX_PREEQ_GAIN_MIC1_13 +680 0x4848 //TX_PREEQ_GAIN_MIC1_14 +681 0x4848 //TX_PREEQ_GAIN_MIC1_15 +682 0x4848 //TX_PREEQ_GAIN_MIC1_16 +683 0x4848 //TX_PREEQ_GAIN_MIC1_17 +684 0x4848 //TX_PREEQ_GAIN_MIC1_18 +685 0x4848 //TX_PREEQ_GAIN_MIC1_19 +686 0x4848 //TX_PREEQ_GAIN_MIC1_20 +687 0x4848 //TX_PREEQ_GAIN_MIC1_21 +688 0x4848 //TX_PREEQ_GAIN_MIC1_22 +689 0x4848 //TX_PREEQ_GAIN_MIC1_23 +690 0x0202 //TX_PREEQ_BIN_MIC1_0 +691 0x0203 //TX_PREEQ_BIN_MIC1_1 +692 0x0303 //TX_PREEQ_BIN_MIC1_2 +693 0x0304 //TX_PREEQ_BIN_MIC1_3 +694 0x0405 //TX_PREEQ_BIN_MIC1_4 +695 0x0506 //TX_PREEQ_BIN_MIC1_5 +696 0x0708 //TX_PREEQ_BIN_MIC1_6 +697 0x090A //TX_PREEQ_BIN_MIC1_7 +698 0x0B0C //TX_PREEQ_BIN_MIC1_8 +699 0x0D0E //TX_PREEQ_BIN_MIC1_9 +700 0x0F10 //TX_PREEQ_BIN_MIC1_10 +701 0x1011 //TX_PREEQ_BIN_MIC1_11 +702 0x1104 //TX_PREEQ_BIN_MIC1_12 +703 0x101B //TX_PREEQ_BIN_MIC1_13 +704 0x0000 //TX_PREEQ_BIN_MIC1_14 +705 0x0000 //TX_PREEQ_BIN_MIC1_15 +706 0x0000 //TX_PREEQ_BIN_MIC1_16 +707 0x0000 //TX_PREEQ_BIN_MIC1_17 +708 0x0000 //TX_PREEQ_BIN_MIC1_18 +709 0x0000 //TX_PREEQ_BIN_MIC1_19 +710 0x0000 //TX_PREEQ_BIN_MIC1_20 +711 0x0000 //TX_PREEQ_BIN_MIC1_21 +712 0x0000 //TX_PREEQ_BIN_MIC1_22 +713 0x0000 //TX_PREEQ_BIN_MIC1_23 +714 0x0020 //TX_PREEQ_SUBNUM_MIC2 +715 0x4848 //TX_PREEQ_GAIN_MIC2_0 +716 0x4848 //TX_PREEQ_GAIN_MIC2_1 +717 0x4848 //TX_PREEQ_GAIN_MIC2_2 +718 0x4848 //TX_PREEQ_GAIN_MIC2_3 +719 0x494A //TX_PREEQ_GAIN_MIC2_4 +720 0x4B4B //TX_PREEQ_GAIN_MIC2_5 +721 0x4B4C //TX_PREEQ_GAIN_MIC2_6 +722 0x4D4D //TX_PREEQ_GAIN_MIC2_7 +723 0x4D4E //TX_PREEQ_GAIN_MIC2_8 +724 0x4E4E //TX_PREEQ_GAIN_MIC2_9 +725 0x4F4F //TX_PREEQ_GAIN_MIC2_10 +726 0x4F4F //TX_PREEQ_GAIN_MIC2_11 +727 0x4F4F //TX_PREEQ_GAIN_MIC2_12 +728 0x5050 //TX_PREEQ_GAIN_MIC2_13 +729 0x5050 //TX_PREEQ_GAIN_MIC2_14 +730 0x4F4F //TX_PREEQ_GAIN_MIC2_15 +731 0x4848 //TX_PREEQ_GAIN_MIC2_16 +732 0x4848 //TX_PREEQ_GAIN_MIC2_17 +733 0x4848 //TX_PREEQ_GAIN_MIC2_18 +734 0x4848 //TX_PREEQ_GAIN_MIC2_19 +735 0x4848 //TX_PREEQ_GAIN_MIC2_20 +736 0x4848 //TX_PREEQ_GAIN_MIC2_21 +737 0x4848 //TX_PREEQ_GAIN_MIC2_22 +738 0x4848 //TX_PREEQ_GAIN_MIC2_23 +739 0x0608 //TX_PREEQ_BIN_MIC2_0 +740 0x0808 //TX_PREEQ_BIN_MIC2_1 +741 0x0808 //TX_PREEQ_BIN_MIC2_2 +742 0x0808 //TX_PREEQ_BIN_MIC2_3 +743 0x0808 //TX_PREEQ_BIN_MIC2_4 +744 0x0808 //TX_PREEQ_BIN_MIC2_5 +745 0x0808 //TX_PREEQ_BIN_MIC2_6 +746 0x0808 //TX_PREEQ_BIN_MIC2_7 +747 0x0808 //TX_PREEQ_BIN_MIC2_8 +748 0x0808 //TX_PREEQ_BIN_MIC2_9 +749 0x0808 //TX_PREEQ_BIN_MIC2_10 +750 0x0808 //TX_PREEQ_BIN_MIC2_11 +751 0x0808 //TX_PREEQ_BIN_MIC2_12 +752 0x0808 //TX_PREEQ_BIN_MIC2_13 +753 0x0808 //TX_PREEQ_BIN_MIC2_14 +754 0x020E //TX_PREEQ_BIN_MIC2_15 +755 0x0000 //TX_PREEQ_BIN_MIC2_16 +756 0x0000 //TX_PREEQ_BIN_MIC2_17 +757 0x0000 //TX_PREEQ_BIN_MIC2_18 +758 0x0000 //TX_PREEQ_BIN_MIC2_19 +759 0x0000 //TX_PREEQ_BIN_MIC2_20 +760 0x0000 //TX_PREEQ_BIN_MIC2_21 +761 0x0000 //TX_PREEQ_BIN_MIC2_22 +762 0x0000 //TX_PREEQ_BIN_MIC2_23 +763 0x0006 //TX_MASKING_ABILITY +764 0x0800 //TX_NND_WEIGHT +765 0x0062 //TX_MIC_CALIBRATION_0 +766 0x0062 //TX_MIC_CALIBRATION_1 +767 0x0062 //TX_MIC_CALIBRATION_2 +768 0x0062 //TX_MIC_CALIBRATION_3 +769 0x0046 //TX_MIC_PWR_BIAS_0 +770 0x0046 //TX_MIC_PWR_BIAS_1 +771 0x0046 //TX_MIC_PWR_BIAS_2 +772 0x0046 //TX_MIC_PWR_BIAS_3 +773 0x0009 //TX_GAIN_LIMIT_0 +774 0x000F //TX_GAIN_LIMIT_1 +775 0x000F //TX_GAIN_LIMIT_2 +776 0x000F //TX_GAIN_LIMIT_3 +777 0x7F5B //TX_BVE_NOVAD0_ALPHADOWN +778 0x7FDE //TX_BVE_VAD0_ALPHAUP +779 0x7F3A //TX_BVE_VAD0_ALPHADOWN +780 0x2000 //TX_BVE_GAINWEIGHT_NOFEVADLI +781 0x7F5B //TX_BVE_FEVADLI_ALPHA +782 0x7F19 //TX_BVE_NOVAD0_ALPHAUP +783 0x0800 //TX_TDDRC_ALPHA_UP_01 +784 0x0800 //TX_TDDRC_ALPHA_UP_02 +785 0x0800 //TX_TDDRC_ALPHA_UP_03 +786 0x0800 //TX_TDDRC_ALPHA_UP_04 +787 0x7EB8 //TX_TDDRC_ALPHA_DWN_01 +788 0x7EB8 //TX_TDDRC_ALPHA_DWN_02 +789 0x7EB8 //TX_TDDRC_ALPHA_DWN_03 +790 0x7EB8 //TX_TDDRC_ALPHA_DWN_04 +791 0x7FFF //TX_TDDRC_TD_DRC_LIMIT +792 0x0800 //TX_TDDRC_POST_LIMIT_GAIN +793 0x0000 //TX_TDDRC_RESRV_0 +794 0x0000 //TX_TDDRC_RESRV_1 +795 0x0018 //TX_FDDRC_BAND_MARGIN_0 +796 0x0030 //TX_FDDRC_BAND_MARGIN_1 +797 0x0050 //TX_FDDRC_BAND_MARGIN_2 +798 0x0080 //TX_FDDRC_BAND_MARGIN_3 +799 0x0007 //TX_FDDRC_BLOCK_EXP +800 0x5000 //TX_FDDRC_THRD_2_0 +801 0x5000 //TX_FDDRC_THRD_2_1 +802 0x5000 //TX_FDDRC_THRD_2_2 +803 0x5000 //TX_FDDRC_THRD_2_3 +804 0x6400 //TX_FDDRC_THRD_3_0 +805 0x6400 //TX_FDDRC_THRD_3_1 +806 0x6400 //TX_FDDRC_THRD_3_2 +807 0x6400 //TX_FDDRC_THRD_3_3 +808 0x2000 //TX_FDDRC_SLANT_0_0 +809 0x2000 //TX_FDDRC_SLANT_0_1 +810 0x2000 //TX_FDDRC_SLANT_0_2 +811 0x2000 //TX_FDDRC_SLANT_0_3 +812 0x5333 //TX_FDDRC_SLANT_1_0 +813 0x5333 //TX_FDDRC_SLANT_1_1 +814 0x5333 //TX_FDDRC_SLANT_1_2 +815 0x5333 //TX_FDDRC_SLANT_1_3 +816 0x0010 //TX_DEADMIC_SILENCE_TH +817 0x0600 //TX_MIC_DEGRADE_TH +818 0x0078 //TX_DEADMIC_CNT +819 0x0078 //TX_MIC_DEGRADE_CNT +820 0x0000 //TX_FDDRC_RESRV_4 +821 0x0000 //TX_FDDRC_RESRV_5 +822 0x0000 //TX_FDDRC_RESRV_6 +823 0x7FFF //TX_KS_NOISEPASTE_FACTOR +824 0x0001 //TX_KS_CONFIG +825 0x7FFF //TX_KS_GAIN_MIN +826 0x0000 //TX_KS_RESRV_0 +827 0x0000 //TX_KS_RESRV_1 +828 0x0000 //TX_KS_RESRV_2 +829 0x7C00 //TX_LAMBDA_PKA_FP +830 0x2000 //TX_TPKA_FP +831 0x0080 //TX_MIN_G_FP +832 0x2000 //TX_MAX_G_FP +833 0x4848 //TX_FFP_FP_K_METAL +834 0x4000 //TX_A_POST_FLT_FP +835 0x0F5C //TX_RTO_OUTBEAM_TH +836 0x4CCD //TX_TPKA_FP_THD +837 0x0000 //TX_MAX_G_FP_BLK +838 0x0000 //TX_FFP_FADEIN +839 0x0000 //TX_FFP_FADEOUT +840 0x0000 //TX_WHISPERCTH +841 0x0000 //TX_WHISPERHOLDT +842 0x0000 //TX_WHISP_ENTHH +843 0x0000 //TX_WHISP_ENTHL +844 0x0000 //TX_WHISP_RTOTH +845 0x0000 //TX_WHISP_RTOTH2 +846 0x0096 //TX_MUTE_PERIOD +847 0x0000 //TX_FADE_IN_PERIOD +848 0x0100 //TX_FFP_RESRV_2 +849 0x0020 //TX_FFP_RESRV_3 +850 0x0000 //TX_FFP_RESRV_4 +851 0x0000 //TX_FFP_RESRV_5 +852 0x0000 //TX_FFP_RESRV_6 +853 0x0002 //TX_FILTINDX +854 0x0001 //TX_TDDRC_THRD_0 +855 0x0002 //TX_TDDRC_THRD_1 +856 0x1800 //TX_TDDRC_THRD_2 +857 0x1800 //TX_TDDRC_THRD_3 +858 0x6000 //TX_TDDRC_SLANT_0 +859 0x6000 //TX_TDDRC_SLANT_1 +860 0x0800 //TX_TDDRC_ALPHA_UP_00 +861 0x7EB8 //TX_TDDRC_ALPHA_DWN_00 +862 0x0000 //TX_TDDRC_HMNC_FLAG +863 0x199A //TX_TDDRC_HMNC_GAIN +864 0x0000 //TX_TDDRC_SMT_FLAG +865 0x0CCD //TX_TDDRC_SMT_W +866 0x0C97 //TX_TDDRC_DRC_GAIN +867 0x7FFF //TX_TDDRC_LMT_THRD +868 0x0000 //TX_TDDRC_LMT_ALPHA +869 0x0000 //TX_TFMASKLTH +870 0x0000 //TX_TFMASKLTHL +871 0x0CCD //TX_TFMASKHTH +872 0x0CCD //TX_TFMASKLTH_BINVAD +873 0xF333 //TX_TFMASKLTH_NS_EST +874 0x2CCD //TX_TFMASKLTH_DOA +875 0xECCD //TX_TFMASKTH_BLESSCUT +876 0x1000 //TX_B_LESSCUT_RTO_MASK +877 0x3800 //TX_SB_RHO_MEAN_TH_ABN +878 0x2000 //TX_B_POST_FLT_MASK +879 0x0000 //TX_B_POST_FLT_MASK1 +880 0x5333 //TX_GAIN_WIND_MASK +881 0x7FFF //TX_TFMASK_BFSTRICT_MUSIC +882 0x0000 //TX_TFMASK_BFSTRICT_NOMUSIC +883 0x7333 //TX_FASTNS_OUTIN_TH +884 0x0CCD //TX_FASTNS_TFMASK_TH +885 0x0CCD //TX_FASTNS_TFMASKBIN_TH1 +886 0x0CCD //TX_FASTNS_TFMASKBIN_TH2 +887 0x0CCD //TX_FASTNS_TFMASKBIN_TH3 +888 0x0028 //TX_FASTNS_ARSPC_TH +889 0xC000 //TX_FASTNS_MASK5_TH +890 0x4848 //TX_POSTSSA_MIN_G_VR_MASK +891 0x4000 //TX_A_LESSCUT_RTO_MASK +892 0x1770 //TX_FASTNS_NOISETH +893 0xC000 //TX_FASTNS_SSA_THLFL +894 0xC000 //TX_FASTNS_SSA_THHFL +895 0xCCCC //TX_FASTNS_SSA_THLFH +896 0xD999 //TX_FASTNS_SSA_THHFH +897 0x2339 //TX_SENDFUNC_REG_MICMUTE +898 0x0021 //TX_SENDFUNC_REG_MICMUTE1 +899 0x02BC //TX_MICMUTE_RATIO_THR +900 0x0140 //TX_MICMUTE_AMP_THR +901 0x0004 //TX_MICMUTE_HPF_IND +902 0x00C0 //TX_MICMUTE_LOG_EYR_TH +903 0x0008 //TX_MICMUTE_CVG_TIME +904 0x0008 //TX_MICMUTE_RELEASE_TIME +905 0x01FE //TX_MIC_VOLUME_MIC0MUTE +906 0x0020 //TX_MICMUTE_EPD_OFFSET_0 +907 0x001E //TX_MICMUTE_FRQ_AEC_L +908 0x7999 //TX_MICMUTE_EAD_THR +909 0x7FFF //TX_MICMUTE_LAMBDA_CB_NLE +910 0x7FFF //TX_MICMUTE_LAMBDA_RE_EST +911 0x4000 //TX_DTD_THR1_MICMUTE_0 +912 0x7000 //TX_DTD_THR1_MICMUTE_1 +913 0x7FFF //TX_DTD_THR1_MICMUTE_2 +914 0x7FFF //TX_DTD_THR1_MICMUTE_3 +915 0x6CCC //TX_DTD_THR2_MICMUTE_0 +916 0x0400 //TX_MICMUTE_MIN_EQ_RE_EST_0 +917 0x0400 //TX_MICMUTE_MIN_EQ_RE_EST_1 +918 0x1000 //TX_MICMUTE_MIN_EQ_RE_EST_2 +919 0x7FFF //TX_MICMUTE_MIN_EQ_RE_EST_3 +920 0x7FFF //TX_MICMUTE_MIN_EQ_RE_EST_4 +921 0x4000 //TX_MICMUTE_C_POST_FLT +922 0x03E8 //TX_MICMUTE_DT_CUT_K +923 0x0001 //TX_MICMUTE_DT_CUT_THR +924 0x03E8 //TX_MICMUTE_DT_CUT_K2 +925 0x0001 //TX_MICMUTE_DT_CUT_THR2 +926 0x0064 //TX_MICMUTE_DT2_HOLD_N +927 0x1000 //TX_MICMUTE_RATIODTH_THCUT +928 0x1000 //TX_MICMUTE_B_POST_FLT_ECHOL +929 0x7FFF //TX_MICMUTE_B_POST_FLT_ECHOH +930 0x0400 //TX_MICMUTE_C_POST_FLT_MASK +931 0x7999 //TX_MICMUTE_RATIODTL_CUT_TH +932 0x0258 //TX_MICMUTE_DT_CUT_K1 +933 0x0800 //TX_MICMUTE_N2_SN_EST +934 0xFC00 //TX_MICMUTE_THR_SN_EST_0 +935 0x001C //TX_MICMUTE_MIN_G_CTRL_0 +936 0x6000 //TX_MICMUTE_A_POST_FILT_S_0 +937 0x7000 //TX_MICMUTE_B_POST_FILT_0 +938 0x2710 //TX_MIC1RUB_AMP_THR +939 0x0010 //TX_MIC1MUTE_RATIO_THR +940 0x0450 //TX_MIC1MUTE_AMP_THR +941 0x0008 //TX_MIC1MUTE_CVG_TIME +942 0x0008 //TX_MIC1MUTE_RELEASE_TIME +943 0x0000 //TX_AMS_RESRV_01 +944 0x0000 //TX_AMS_RESRV_02 +945 0x0000 //TX_AMS_RESRV_03 +946 0x0000 //TX_AMS_RESRV_04 +947 0x0000 //TX_AMS_RESRV_05 +948 0x0000 //TX_AMS_RESRV_06 +949 0x0000 //TX_AMS_RESRV_07 +950 0x0000 //TX_AMS_RESRV_08 +951 0x0000 //TX_AMS_RESRV_09 +952 0x0000 //TX_AMS_RESRV_10 +953 0x0000 //TX_AMS_RESRV_11 +954 0x0000 //TX_AMS_RESRV_12 +955 0x0000 //TX_AMS_RESRV_13 +956 0x0000 //TX_AMS_RESRV_14 +957 0x0000 //TX_AMS_RESRV_15 +958 0x0000 //TX_AMS_RESRV_16 +959 0x0000 //TX_AMS_RESRV_17 +960 0x0000 //TX_AMS_RESRV_18 +961 0x0000 //TX_AMS_RESRV_19 +#RX +0 0x206C //RX_RECVFUNC_MODE_0 +1 0x0000 //RX_RECVFUNC_MODE_1 +2 0x0001 //RX_SAMPLINGFREQ_SIG +3 0x0001 //RX_SAMPLINGFREQ_PROC +4 0x000A //RX_FRAME_SZ +5 0x0000 //RX_DELAY_OPT +6 0x6000 //RX_TDDRC_ALPHA_UP_1 +7 0x6000 //RX_TDDRC_ALPHA_UP_2 +8 0x6000 //RX_TDDRC_ALPHA_UP_3 +9 0x1000 //RX_TDDRC_ALPHA_UP_4 +10 0x0800 //RX_PGA +11 0x7B02 //RX_A_HP +12 0x4000 //RX_B_PE +13 0x7800 //RX_THR_PITCH_DET_0 +14 0x7000 //RX_THR_PITCH_DET_1 +15 0x6000 //RX_THR_PITCH_DET_2 +16 0x0008 //RX_PITCH_BFR_LEN +17 0x0003 //RX_SBD_PITCH_DET +18 0x0100 //RX_PP_RESRV_0 +19 0x0020 //RX_PP_RESRV_1 +20 0x0400 //RX_N_SN_EST +21 0x000C //RX_N2_SN_EST +22 0x0010 //RX_NS_LVL_CTRL +23 0xF800 //RX_THR_SN_EST +24 0x7E00 //RX_LAMBDA_PFILT +25 0x000A //RX_FENS_RESRV_0 +26 0x0190 //RX_FENS_RESRV_1 +27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +30 0x0002 //RX_EXTRA_NS_L +31 0x0800 //RX_EXTRA_NS_A +32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +33 0x7214 //RX_TDDRC_LIMITER_THRD +34 0x0800 //RX_TDDRC_LIMITER_GAIN +35 0x199A //RX_A_POST_FLT +36 0x0000 //RX_LMT_THRD +37 0x4000 //RX_LMT_ALPHA +38 0x001C //RX_FDEQ_SUBNUM +39 0x4848 //RX_FDEQ_GAIN_0 +40 0x4443 //RX_FDEQ_GAIN_1 +41 0x4343 //RX_FDEQ_GAIN_2 +42 0x4848 //RX_FDEQ_GAIN_3 +43 0x4848 //RX_FDEQ_GAIN_4 +44 0x4845 //RX_FDEQ_GAIN_5 +45 0x3E3A //RX_FDEQ_GAIN_6 +46 0x3030 //RX_FDEQ_GAIN_7 +47 0x3647 //RX_FDEQ_GAIN_8 +48 0x535C //RX_FDEQ_GAIN_9 +49 0x6159 //RX_FDEQ_GAIN_10 +50 0x535A //RX_FDEQ_GAIN_11 +51 0x636A //RX_FDEQ_GAIN_12 +52 0x6C6B //RX_FDEQ_GAIN_13 +53 0x4848 //RX_FDEQ_GAIN_14 +54 0x4848 //RX_FDEQ_GAIN_15 +55 0x4848 //RX_FDEQ_GAIN_16 +56 0x4848 //RX_FDEQ_GAIN_17 +57 0x4848 //RX_FDEQ_GAIN_18 +58 0x4848 //RX_FDEQ_GAIN_19 +59 0x4848 //RX_FDEQ_GAIN_20 +60 0x4848 //RX_FDEQ_GAIN_21 +61 0x4848 //RX_FDEQ_GAIN_22 +62 0x4848 //RX_FDEQ_GAIN_23 +63 0x0202 //RX_FDEQ_BIN_0 +64 0x0203 //RX_FDEQ_BIN_1 +65 0x0303 //RX_FDEQ_BIN_2 +66 0x0304 //RX_FDEQ_BIN_3 +67 0x0404 //RX_FDEQ_BIN_4 +68 0x0204 //RX_FDEQ_BIN_5 +69 0x0A0A //RX_FDEQ_BIN_6 +70 0x0A0A //RX_FDEQ_BIN_7 +71 0x0B0C //RX_FDEQ_BIN_8 +72 0x0D0E //RX_FDEQ_BIN_9 +73 0x0E0F //RX_FDEQ_BIN_10 +74 0x0F10 //RX_FDEQ_BIN_11 +75 0x1011 //RX_FDEQ_BIN_12 +76 0x1104 //RX_FDEQ_BIN_13 +77 0x0000 //RX_FDEQ_BIN_14 +78 0x0000 //RX_FDEQ_BIN_15 +79 0x0000 //RX_FDEQ_BIN_16 +80 0x0000 //RX_FDEQ_BIN_17 +81 0x0000 //RX_FDEQ_BIN_18 +82 0x0000 //RX_FDEQ_BIN_19 +83 0x0000 //RX_FDEQ_BIN_20 +84 0x0000 //RX_FDEQ_BIN_21 +85 0x0000 //RX_FDEQ_BIN_22 +86 0x0000 //RX_FDEQ_BIN_23 +87 0x4000 //RX_FDEQ_RESRV_0 +88 0x0320 //RX_FDEQ_RESRV_1 +89 0x0018 //RX_FDDRC_BAND_MARGIN_0 +90 0x0035 //RX_FDDRC_BAND_MARGIN_1 +91 0x00D5 //RX_FDDRC_BAND_MARGIN_2 +92 0x0120 //RX_FDDRC_BAND_MARGIN_3 +93 0x0004 //RX_FDDRC_BLOCK_EXP +94 0x5000 //RX_FDDRC_THRD_2_0 +95 0x5000 //RX_FDDRC_THRD_2_1 +96 0x2000 //RX_FDDRC_THRD_2_2 +97 0x5000 //RX_FDDRC_THRD_2_3 +98 0x6400 //RX_FDDRC_THRD_3_0 +99 0x6400 //RX_FDDRC_THRD_3_1 +100 0x2000 //RX_FDDRC_THRD_3_2 +101 0x5000 //RX_FDDRC_THRD_3_3 +102 0x4000 //RX_FDDRC_SLANT_0_0 +103 0x4000 //RX_FDDRC_SLANT_0_1 +104 0x4000 //RX_FDDRC_SLANT_0_2 +105 0x4000 //RX_FDDRC_SLANT_0_3 +106 0x7FFF //RX_FDDRC_SLANT_1_0 +107 0x7FFF //RX_FDDRC_SLANT_1_1 +108 0x7FFF //RX_FDDRC_SLANT_1_2 +109 0x7FFF //RX_FDDRC_SLANT_1_3 +110 0x0000 //RX_FDDRC_RESRV_0 +111 0x0002 //RX_FILTINDX +112 0x0002 //RX_TDDRC_THRD_0 +113 0x0004 //RX_TDDRC_THRD_1 +114 0x1C00 //RX_TDDRC_THRD_2 +115 0x1C00 //RX_TDDRC_THRD_3 +116 0x7FFF //RX_TDDRC_SLANT_0 +117 0x7FFF //RX_TDDRC_SLANT_1 +118 0x6000 //RX_TDDRC_ALPHA_UP_0 +119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +120 0x0000 //RX_TDDRC_HMNC_FLAG +121 0x199A //RX_TDDRC_HMNC_GAIN +122 0x0001 //RX_TDDRC_SMT_FLAG +123 0x0CCD //RX_TDDRC_SMT_W +124 0x035A //RX_TDDRC_DRC_GAIN +125 0x7C00 //RX_LAMBDA_PKA_FP +126 0x2000 //RX_TPKA_FP +127 0x2000 //RX_MIN_G_FP +128 0x0080 //RX_MAX_G_FP +129 0x0100 //RX_SPK_VOL +130 0x0000 //RX_VOL_RESRV_0 +131 0x0000 //RX_MAXLEVEL_CNG +132 0x3000 //RX_BWE_UV_TH +133 0x3000 //RX_BWE_UV_TH2 +134 0x1800 //RX_BWE_UV_TH3 +135 0x1000 //RX_BWE_V_TH +136 0x04CD //RX_BWE_GAIN1_V_TH1 +137 0x0F33 //RX_BWE_GAIN1_V_TH2 +138 0x7333 //RX_BWE_UV_EQ +139 0x199A //RX_BWE_V_EQ +140 0x7333 //RX_BWE_TONE_TH +141 0x0004 //RX_BWE_UV_HOLD_T +142 0x6CCD //RX_BWE_GAIN2_ALPHA +143 0x799A //RX_BWE_GAIN3_ALPHA +144 0x001E //RX_BWE_CUTOFF +145 0x3000 //RX_BWE_GAINFILL +146 0x3200 //RX_BWE_MAXTH_TONE +147 0x2000 //RX_BWE_EQ_0 +148 0x2000 //RX_BWE_EQ_1 +149 0x2000 //RX_BWE_EQ_2 +150 0x2000 //RX_BWE_EQ_3 +151 0x2000 //RX_BWE_EQ_4 +152 0x2000 //RX_BWE_EQ_5 +153 0x2000 //RX_BWE_EQ_6 +154 0x0000 //RX_BWE_RESRV_0 +155 0x0000 //RX_BWE_RESRV_1 +156 0x0000 //RX_BWE_RESRV_2 +#VOL 0 +6 0x6000 //RX_TDDRC_ALPHA_UP_1 +7 0x6000 //RX_TDDRC_ALPHA_UP_2 +8 0x6000 //RX_TDDRC_ALPHA_UP_3 +9 0x1000 //RX_TDDRC_ALPHA_UP_4 +27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +33 0x7214 //RX_TDDRC_LIMITER_THRD +34 0x0800 //RX_TDDRC_LIMITER_GAIN +112 0x0002 //RX_TDDRC_THRD_0 +113 0x0004 //RX_TDDRC_THRD_1 +114 0x1C00 //RX_TDDRC_THRD_2 +115 0x1C00 //RX_TDDRC_THRD_3 +116 0x7FFF //RX_TDDRC_SLANT_0 +117 0x7FFF //RX_TDDRC_SLANT_1 +118 0x6000 //RX_TDDRC_ALPHA_UP_0 +119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +120 0x0000 //RX_TDDRC_HMNC_FLAG +121 0x199A //RX_TDDRC_HMNC_GAIN +122 0x0001 //RX_TDDRC_SMT_FLAG +123 0x0CCD //RX_TDDRC_SMT_W +124 0x035A //RX_TDDRC_DRC_GAIN +38 0x001C //RX_FDEQ_SUBNUM +39 0x5B48 //RX_FDEQ_GAIN_0 +40 0x5459 //RX_FDEQ_GAIN_1 +41 0x4A43 //RX_FDEQ_GAIN_2 +42 0x4857 //RX_FDEQ_GAIN_3 +43 0x6052 //RX_FDEQ_GAIN_4 +44 0x4845 //RX_FDEQ_GAIN_5 +45 0x4B58 //RX_FDEQ_GAIN_6 +46 0x5856 //RX_FDEQ_GAIN_7 +47 0x5452 //RX_FDEQ_GAIN_8 +48 0x5362 //RX_FDEQ_GAIN_9 +49 0x615F //RX_FDEQ_GAIN_10 +50 0x626A //RX_FDEQ_GAIN_11 +51 0x5B52 //RX_FDEQ_GAIN_12 +52 0x5960 //RX_FDEQ_GAIN_13 +53 0x4848 //RX_FDEQ_GAIN_14 +54 0x4848 //RX_FDEQ_GAIN_15 +55 0x4848 //RX_FDEQ_GAIN_16 +56 0x4848 //RX_FDEQ_GAIN_17 +57 0x4848 //RX_FDEQ_GAIN_18 +58 0x4848 //RX_FDEQ_GAIN_19 +59 0x4848 //RX_FDEQ_GAIN_20 +60 0x4848 //RX_FDEQ_GAIN_21 +61 0x4848 //RX_FDEQ_GAIN_22 +62 0x4848 //RX_FDEQ_GAIN_23 +63 0x0202 //RX_FDEQ_BIN_0 +64 0x0203 //RX_FDEQ_BIN_1 +65 0x0303 //RX_FDEQ_BIN_2 +66 0x0304 //RX_FDEQ_BIN_3 +67 0x0404 //RX_FDEQ_BIN_4 +68 0x0204 //RX_FDEQ_BIN_5 +69 0x0A0A //RX_FDEQ_BIN_6 +70 0x0A0A //RX_FDEQ_BIN_7 +71 0x0B0C //RX_FDEQ_BIN_8 +72 0x0D0E //RX_FDEQ_BIN_9 +73 0x0E0F //RX_FDEQ_BIN_10 +74 0x0F10 //RX_FDEQ_BIN_11 +75 0x1011 //RX_FDEQ_BIN_12 +76 0x1104 //RX_FDEQ_BIN_13 +77 0x0000 //RX_FDEQ_BIN_14 +78 0x0000 //RX_FDEQ_BIN_15 +79 0x0000 //RX_FDEQ_BIN_16 +80 0x0000 //RX_FDEQ_BIN_17 +81 0x0000 //RX_FDEQ_BIN_18 +82 0x0000 //RX_FDEQ_BIN_19 +83 0x0000 //RX_FDEQ_BIN_20 +84 0x0000 //RX_FDEQ_BIN_21 +85 0x0000 //RX_FDEQ_BIN_22 +86 0x0000 //RX_FDEQ_BIN_23 +87 0x4000 //RX_FDEQ_RESRV_0 +88 0x0320 //RX_FDEQ_RESRV_1 +89 0x0018 //RX_FDDRC_BAND_MARGIN_0 +90 0x0035 //RX_FDDRC_BAND_MARGIN_1 +91 0x00D5 //RX_FDDRC_BAND_MARGIN_2 +92 0x0120 //RX_FDDRC_BAND_MARGIN_3 +93 0x0004 //RX_FDDRC_BLOCK_EXP +94 0x5000 //RX_FDDRC_THRD_2_0 +95 0x5000 //RX_FDDRC_THRD_2_1 +96 0x2000 //RX_FDDRC_THRD_2_2 +97 0x5000 //RX_FDDRC_THRD_2_3 +98 0x6400 //RX_FDDRC_THRD_3_0 +99 0x6400 //RX_FDDRC_THRD_3_1 +100 0x2000 //RX_FDDRC_THRD_3_2 +101 0x5000 //RX_FDDRC_THRD_3_3 +102 0x4000 //RX_FDDRC_SLANT_0_0 +103 0x4000 //RX_FDDRC_SLANT_0_1 +104 0x4000 //RX_FDDRC_SLANT_0_2 +105 0x4000 //RX_FDDRC_SLANT_0_3 +106 0x7FFF //RX_FDDRC_SLANT_1_0 +107 0x7FFF //RX_FDDRC_SLANT_1_1 +108 0x7FFF //RX_FDDRC_SLANT_1_2 +109 0x7FFF //RX_FDDRC_SLANT_1_3 +110 0x0000 //RX_FDDRC_RESRV_0 +129 0x0014 //RX_SPK_VOL +130 0x0000 //RX_VOL_RESRV_0 +#VOL 1 +6 0x6000 //RX_TDDRC_ALPHA_UP_1 +7 0x6000 //RX_TDDRC_ALPHA_UP_2 +8 0x6000 //RX_TDDRC_ALPHA_UP_3 +9 0x1000 //RX_TDDRC_ALPHA_UP_4 +27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +33 0x7214 //RX_TDDRC_LIMITER_THRD +34 0x0800 //RX_TDDRC_LIMITER_GAIN +112 0x0002 //RX_TDDRC_THRD_0 +113 0x0004 //RX_TDDRC_THRD_1 +114 0x1C00 //RX_TDDRC_THRD_2 +115 0x1C00 //RX_TDDRC_THRD_3 +116 0x7FFF //RX_TDDRC_SLANT_0 +117 0x7FFF //RX_TDDRC_SLANT_1 +118 0x6000 //RX_TDDRC_ALPHA_UP_0 +119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +120 0x0000 //RX_TDDRC_HMNC_FLAG +121 0x199A //RX_TDDRC_HMNC_GAIN +122 0x0001 //RX_TDDRC_SMT_FLAG +123 0x0CCD //RX_TDDRC_SMT_W +124 0x035A //RX_TDDRC_DRC_GAIN +38 0x001C //RX_FDEQ_SUBNUM +39 0x5B48 //RX_FDEQ_GAIN_0 +40 0x5459 //RX_FDEQ_GAIN_1 +41 0x4A43 //RX_FDEQ_GAIN_2 +42 0x4857 //RX_FDEQ_GAIN_3 +43 0x6052 //RX_FDEQ_GAIN_4 +44 0x4845 //RX_FDEQ_GAIN_5 +45 0x4B58 //RX_FDEQ_GAIN_6 +46 0x5856 //RX_FDEQ_GAIN_7 +47 0x5452 //RX_FDEQ_GAIN_8 +48 0x5362 //RX_FDEQ_GAIN_9 +49 0x615F //RX_FDEQ_GAIN_10 +50 0x626A //RX_FDEQ_GAIN_11 +51 0x5B52 //RX_FDEQ_GAIN_12 +52 0x5960 //RX_FDEQ_GAIN_13 +53 0x4848 //RX_FDEQ_GAIN_14 +54 0x4848 //RX_FDEQ_GAIN_15 +55 0x4848 //RX_FDEQ_GAIN_16 +56 0x4848 //RX_FDEQ_GAIN_17 +57 0x4848 //RX_FDEQ_GAIN_18 +58 0x4848 //RX_FDEQ_GAIN_19 +59 0x4848 //RX_FDEQ_GAIN_20 +60 0x4848 //RX_FDEQ_GAIN_21 +61 0x4848 //RX_FDEQ_GAIN_22 +62 0x4848 //RX_FDEQ_GAIN_23 +63 0x0202 //RX_FDEQ_BIN_0 +64 0x0203 //RX_FDEQ_BIN_1 +65 0x0303 //RX_FDEQ_BIN_2 +66 0x0304 //RX_FDEQ_BIN_3 +67 0x0404 //RX_FDEQ_BIN_4 +68 0x0204 //RX_FDEQ_BIN_5 +69 0x0A0A //RX_FDEQ_BIN_6 +70 0x0A0A //RX_FDEQ_BIN_7 +71 0x0B0C //RX_FDEQ_BIN_8 +72 0x0D0E //RX_FDEQ_BIN_9 +73 0x0E0F //RX_FDEQ_BIN_10 +74 0x0F10 //RX_FDEQ_BIN_11 +75 0x1011 //RX_FDEQ_BIN_12 +76 0x1104 //RX_FDEQ_BIN_13 +77 0x0000 //RX_FDEQ_BIN_14 +78 0x0000 //RX_FDEQ_BIN_15 +79 0x0000 //RX_FDEQ_BIN_16 +80 0x0000 //RX_FDEQ_BIN_17 +81 0x0000 //RX_FDEQ_BIN_18 +82 0x0000 //RX_FDEQ_BIN_19 +83 0x0000 //RX_FDEQ_BIN_20 +84 0x0000 //RX_FDEQ_BIN_21 +85 0x0000 //RX_FDEQ_BIN_22 +86 0x0000 //RX_FDEQ_BIN_23 +87 0x4000 //RX_FDEQ_RESRV_0 +88 0x0320 //RX_FDEQ_RESRV_1 +89 0x0018 //RX_FDDRC_BAND_MARGIN_0 +90 0x0035 //RX_FDDRC_BAND_MARGIN_1 +91 0x00D5 //RX_FDDRC_BAND_MARGIN_2 +92 0x0120 //RX_FDDRC_BAND_MARGIN_3 +93 0x0004 //RX_FDDRC_BLOCK_EXP +94 0x5000 //RX_FDDRC_THRD_2_0 +95 0x5000 //RX_FDDRC_THRD_2_1 +96 0x2000 //RX_FDDRC_THRD_2_2 +97 0x5000 //RX_FDDRC_THRD_2_3 +98 0x6400 //RX_FDDRC_THRD_3_0 +99 0x6400 //RX_FDDRC_THRD_3_1 +100 0x2000 //RX_FDDRC_THRD_3_2 +101 0x5000 //RX_FDDRC_THRD_3_3 +102 0x4000 //RX_FDDRC_SLANT_0_0 +103 0x4000 //RX_FDDRC_SLANT_0_1 +104 0x4000 //RX_FDDRC_SLANT_0_2 +105 0x4000 //RX_FDDRC_SLANT_0_3 +106 0x7FFF //RX_FDDRC_SLANT_1_0 +107 0x7FFF //RX_FDDRC_SLANT_1_1 +108 0x7FFF //RX_FDDRC_SLANT_1_2 +109 0x7FFF //RX_FDDRC_SLANT_1_3 +110 0x0000 //RX_FDDRC_RESRV_0 +129 0x001A //RX_SPK_VOL +130 0x0000 //RX_VOL_RESRV_0 +#VOL 2 +6 0x6000 //RX_TDDRC_ALPHA_UP_1 +7 0x6000 //RX_TDDRC_ALPHA_UP_2 +8 0x6000 //RX_TDDRC_ALPHA_UP_3 +9 0x1000 //RX_TDDRC_ALPHA_UP_4 +27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +33 0x7214 //RX_TDDRC_LIMITER_THRD +34 0x0800 //RX_TDDRC_LIMITER_GAIN +112 0x0002 //RX_TDDRC_THRD_0 +113 0x0004 //RX_TDDRC_THRD_1 +114 0x1C00 //RX_TDDRC_THRD_2 +115 0x1C00 //RX_TDDRC_THRD_3 +116 0x7FFF //RX_TDDRC_SLANT_0 +117 0x7FFF //RX_TDDRC_SLANT_1 +118 0x6000 //RX_TDDRC_ALPHA_UP_0 +119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +120 0x0000 //RX_TDDRC_HMNC_FLAG +121 0x199A //RX_TDDRC_HMNC_GAIN +122 0x0001 //RX_TDDRC_SMT_FLAG +123 0x0CCD //RX_TDDRC_SMT_W +124 0x035A //RX_TDDRC_DRC_GAIN +38 0x001C //RX_FDEQ_SUBNUM +39 0x5B48 //RX_FDEQ_GAIN_0 +40 0x5459 //RX_FDEQ_GAIN_1 +41 0x4A43 //RX_FDEQ_GAIN_2 +42 0x4857 //RX_FDEQ_GAIN_3 +43 0x6052 //RX_FDEQ_GAIN_4 +44 0x4845 //RX_FDEQ_GAIN_5 +45 0x4B58 //RX_FDEQ_GAIN_6 +46 0x5856 //RX_FDEQ_GAIN_7 +47 0x5452 //RX_FDEQ_GAIN_8 +48 0x5362 //RX_FDEQ_GAIN_9 +49 0x615F //RX_FDEQ_GAIN_10 +50 0x626A //RX_FDEQ_GAIN_11 +51 0x5B52 //RX_FDEQ_GAIN_12 +52 0x5960 //RX_FDEQ_GAIN_13 +53 0x4848 //RX_FDEQ_GAIN_14 +54 0x4848 //RX_FDEQ_GAIN_15 +55 0x4848 //RX_FDEQ_GAIN_16 +56 0x4848 //RX_FDEQ_GAIN_17 +57 0x4848 //RX_FDEQ_GAIN_18 +58 0x4848 //RX_FDEQ_GAIN_19 +59 0x4848 //RX_FDEQ_GAIN_20 +60 0x4848 //RX_FDEQ_GAIN_21 +61 0x4848 //RX_FDEQ_GAIN_22 +62 0x4848 //RX_FDEQ_GAIN_23 +63 0x0202 //RX_FDEQ_BIN_0 +64 0x0203 //RX_FDEQ_BIN_1 +65 0x0303 //RX_FDEQ_BIN_2 +66 0x0304 //RX_FDEQ_BIN_3 +67 0x0404 //RX_FDEQ_BIN_4 +68 0x0204 //RX_FDEQ_BIN_5 +69 0x0A0A //RX_FDEQ_BIN_6 +70 0x0A0A //RX_FDEQ_BIN_7 +71 0x0B0C //RX_FDEQ_BIN_8 +72 0x0D0E //RX_FDEQ_BIN_9 +73 0x0E0F //RX_FDEQ_BIN_10 +74 0x0F10 //RX_FDEQ_BIN_11 +75 0x1011 //RX_FDEQ_BIN_12 +76 0x1104 //RX_FDEQ_BIN_13 +77 0x0000 //RX_FDEQ_BIN_14 +78 0x0000 //RX_FDEQ_BIN_15 +79 0x0000 //RX_FDEQ_BIN_16 +80 0x0000 //RX_FDEQ_BIN_17 +81 0x0000 //RX_FDEQ_BIN_18 +82 0x0000 //RX_FDEQ_BIN_19 +83 0x0000 //RX_FDEQ_BIN_20 +84 0x0000 //RX_FDEQ_BIN_21 +85 0x0000 //RX_FDEQ_BIN_22 +86 0x0000 //RX_FDEQ_BIN_23 +87 0x4000 //RX_FDEQ_RESRV_0 +88 0x0320 //RX_FDEQ_RESRV_1 +89 0x0018 //RX_FDDRC_BAND_MARGIN_0 +90 0x0035 //RX_FDDRC_BAND_MARGIN_1 +91 0x00D5 //RX_FDDRC_BAND_MARGIN_2 +92 0x0120 //RX_FDDRC_BAND_MARGIN_3 +93 0x0004 //RX_FDDRC_BLOCK_EXP +94 0x5000 //RX_FDDRC_THRD_2_0 +95 0x5000 //RX_FDDRC_THRD_2_1 +96 0x2000 //RX_FDDRC_THRD_2_2 +97 0x5000 //RX_FDDRC_THRD_2_3 +98 0x6400 //RX_FDDRC_THRD_3_0 +99 0x6400 //RX_FDDRC_THRD_3_1 +100 0x2000 //RX_FDDRC_THRD_3_2 +101 0x5000 //RX_FDDRC_THRD_3_3 +102 0x4000 //RX_FDDRC_SLANT_0_0 +103 0x4000 //RX_FDDRC_SLANT_0_1 +104 0x4000 //RX_FDDRC_SLANT_0_2 +105 0x4000 //RX_FDDRC_SLANT_0_3 +106 0x7FFF //RX_FDDRC_SLANT_1_0 +107 0x7FFF //RX_FDDRC_SLANT_1_1 +108 0x7FFF //RX_FDDRC_SLANT_1_2 +109 0x7FFF //RX_FDDRC_SLANT_1_3 +110 0x0000 //RX_FDDRC_RESRV_0 +129 0x0026 //RX_SPK_VOL +130 0x0000 //RX_VOL_RESRV_0 +#VOL 3 +6 0x6000 //RX_TDDRC_ALPHA_UP_1 +7 0x6000 //RX_TDDRC_ALPHA_UP_2 +8 0x6000 //RX_TDDRC_ALPHA_UP_3 +9 0x1000 //RX_TDDRC_ALPHA_UP_4 +27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +33 0x7214 //RX_TDDRC_LIMITER_THRD +34 0x0800 //RX_TDDRC_LIMITER_GAIN +112 0x0002 //RX_TDDRC_THRD_0 +113 0x0004 //RX_TDDRC_THRD_1 +114 0x1C00 //RX_TDDRC_THRD_2 +115 0x1C00 //RX_TDDRC_THRD_3 +116 0x7FFF //RX_TDDRC_SLANT_0 +117 0x7FFF //RX_TDDRC_SLANT_1 +118 0x6000 //RX_TDDRC_ALPHA_UP_0 +119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +120 0x0000 //RX_TDDRC_HMNC_FLAG +121 0x199A //RX_TDDRC_HMNC_GAIN +122 0x0001 //RX_TDDRC_SMT_FLAG +123 0x0CCD //RX_TDDRC_SMT_W +124 0x035A //RX_TDDRC_DRC_GAIN +38 0x001C //RX_FDEQ_SUBNUM +39 0x5B48 //RX_FDEQ_GAIN_0 +40 0x5459 //RX_FDEQ_GAIN_1 +41 0x4A43 //RX_FDEQ_GAIN_2 +42 0x4857 //RX_FDEQ_GAIN_3 +43 0x6052 //RX_FDEQ_GAIN_4 +44 0x4845 //RX_FDEQ_GAIN_5 +45 0x4B58 //RX_FDEQ_GAIN_6 +46 0x5856 //RX_FDEQ_GAIN_7 +47 0x5452 //RX_FDEQ_GAIN_8 +48 0x5362 //RX_FDEQ_GAIN_9 +49 0x615F //RX_FDEQ_GAIN_10 +50 0x626A //RX_FDEQ_GAIN_11 +51 0x5B52 //RX_FDEQ_GAIN_12 +52 0x5960 //RX_FDEQ_GAIN_13 +53 0x4848 //RX_FDEQ_GAIN_14 +54 0x4848 //RX_FDEQ_GAIN_15 +55 0x4848 //RX_FDEQ_GAIN_16 +56 0x4848 //RX_FDEQ_GAIN_17 +57 0x4848 //RX_FDEQ_GAIN_18 +58 0x4848 //RX_FDEQ_GAIN_19 +59 0x4848 //RX_FDEQ_GAIN_20 +60 0x4848 //RX_FDEQ_GAIN_21 +61 0x4848 //RX_FDEQ_GAIN_22 +62 0x4848 //RX_FDEQ_GAIN_23 +63 0x0202 //RX_FDEQ_BIN_0 +64 0x0203 //RX_FDEQ_BIN_1 +65 0x0303 //RX_FDEQ_BIN_2 +66 0x0304 //RX_FDEQ_BIN_3 +67 0x0404 //RX_FDEQ_BIN_4 +68 0x0204 //RX_FDEQ_BIN_5 +69 0x0A0A //RX_FDEQ_BIN_6 +70 0x0A0A //RX_FDEQ_BIN_7 +71 0x0B0C //RX_FDEQ_BIN_8 +72 0x0D0E //RX_FDEQ_BIN_9 +73 0x0E0F //RX_FDEQ_BIN_10 +74 0x0F10 //RX_FDEQ_BIN_11 +75 0x1011 //RX_FDEQ_BIN_12 +76 0x1104 //RX_FDEQ_BIN_13 +77 0x0000 //RX_FDEQ_BIN_14 +78 0x0000 //RX_FDEQ_BIN_15 +79 0x0000 //RX_FDEQ_BIN_16 +80 0x0000 //RX_FDEQ_BIN_17 +81 0x0000 //RX_FDEQ_BIN_18 +82 0x0000 //RX_FDEQ_BIN_19 +83 0x0000 //RX_FDEQ_BIN_20 +84 0x0000 //RX_FDEQ_BIN_21 +85 0x0000 //RX_FDEQ_BIN_22 +86 0x0000 //RX_FDEQ_BIN_23 +87 0x4000 //RX_FDEQ_RESRV_0 +88 0x0320 //RX_FDEQ_RESRV_1 +89 0x0018 //RX_FDDRC_BAND_MARGIN_0 +90 0x0035 //RX_FDDRC_BAND_MARGIN_1 +91 0x00D5 //RX_FDDRC_BAND_MARGIN_2 +92 0x0120 //RX_FDDRC_BAND_MARGIN_3 +93 0x0004 //RX_FDDRC_BLOCK_EXP +94 0x5000 //RX_FDDRC_THRD_2_0 +95 0x5000 //RX_FDDRC_THRD_2_1 +96 0x2000 //RX_FDDRC_THRD_2_2 +97 0x5000 //RX_FDDRC_THRD_2_3 +98 0x6400 //RX_FDDRC_THRD_3_0 +99 0x6400 //RX_FDDRC_THRD_3_1 +100 0x2000 //RX_FDDRC_THRD_3_2 +101 0x5000 //RX_FDDRC_THRD_3_3 +102 0x4000 //RX_FDDRC_SLANT_0_0 +103 0x4000 //RX_FDDRC_SLANT_0_1 +104 0x4000 //RX_FDDRC_SLANT_0_2 +105 0x4000 //RX_FDDRC_SLANT_0_3 +106 0x7FFF //RX_FDDRC_SLANT_1_0 +107 0x7FFF //RX_FDDRC_SLANT_1_1 +108 0x7FFF //RX_FDDRC_SLANT_1_2 +109 0x7FFF //RX_FDDRC_SLANT_1_3 +110 0x0000 //RX_FDDRC_RESRV_0 +129 0x0035 //RX_SPK_VOL +130 0x0000 //RX_VOL_RESRV_0 +#VOL 4 +6 0x6000 //RX_TDDRC_ALPHA_UP_1 +7 0x6000 //RX_TDDRC_ALPHA_UP_2 +8 0x6000 //RX_TDDRC_ALPHA_UP_3 +9 0x1000 //RX_TDDRC_ALPHA_UP_4 +27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +33 0x7214 //RX_TDDRC_LIMITER_THRD +34 0x0800 //RX_TDDRC_LIMITER_GAIN +112 0x0002 //RX_TDDRC_THRD_0 +113 0x0004 //RX_TDDRC_THRD_1 +114 0x1C00 //RX_TDDRC_THRD_2 +115 0x1C00 //RX_TDDRC_THRD_3 +116 0x7FFF //RX_TDDRC_SLANT_0 +117 0x7FFF //RX_TDDRC_SLANT_1 +118 0x6000 //RX_TDDRC_ALPHA_UP_0 +119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +120 0x0000 //RX_TDDRC_HMNC_FLAG +121 0x199A //RX_TDDRC_HMNC_GAIN +122 0x0001 //RX_TDDRC_SMT_FLAG +123 0x0CCD //RX_TDDRC_SMT_W +124 0x035A //RX_TDDRC_DRC_GAIN +38 0x001C //RX_FDEQ_SUBNUM +39 0x5B48 //RX_FDEQ_GAIN_0 +40 0x5459 //RX_FDEQ_GAIN_1 +41 0x4A43 //RX_FDEQ_GAIN_2 +42 0x4857 //RX_FDEQ_GAIN_3 +43 0x6052 //RX_FDEQ_GAIN_4 +44 0x4845 //RX_FDEQ_GAIN_5 +45 0x4B58 //RX_FDEQ_GAIN_6 +46 0x5856 //RX_FDEQ_GAIN_7 +47 0x5452 //RX_FDEQ_GAIN_8 +48 0x5362 //RX_FDEQ_GAIN_9 +49 0x615F //RX_FDEQ_GAIN_10 +50 0x626A //RX_FDEQ_GAIN_11 +51 0x5B52 //RX_FDEQ_GAIN_12 +52 0x5960 //RX_FDEQ_GAIN_13 +53 0x4848 //RX_FDEQ_GAIN_14 +54 0x4848 //RX_FDEQ_GAIN_15 +55 0x4848 //RX_FDEQ_GAIN_16 +56 0x4848 //RX_FDEQ_GAIN_17 +57 0x4848 //RX_FDEQ_GAIN_18 +58 0x4848 //RX_FDEQ_GAIN_19 +59 0x4848 //RX_FDEQ_GAIN_20 +60 0x4848 //RX_FDEQ_GAIN_21 +61 0x4848 //RX_FDEQ_GAIN_22 +62 0x4848 //RX_FDEQ_GAIN_23 +63 0x0202 //RX_FDEQ_BIN_0 +64 0x0203 //RX_FDEQ_BIN_1 +65 0x0303 //RX_FDEQ_BIN_2 +66 0x0304 //RX_FDEQ_BIN_3 +67 0x0404 //RX_FDEQ_BIN_4 +68 0x0204 //RX_FDEQ_BIN_5 +69 0x0A0A //RX_FDEQ_BIN_6 +70 0x0A0A //RX_FDEQ_BIN_7 +71 0x0B0C //RX_FDEQ_BIN_8 +72 0x0D0E //RX_FDEQ_BIN_9 +73 0x0E0F //RX_FDEQ_BIN_10 +74 0x0F10 //RX_FDEQ_BIN_11 +75 0x1011 //RX_FDEQ_BIN_12 +76 0x1104 //RX_FDEQ_BIN_13 +77 0x0000 //RX_FDEQ_BIN_14 +78 0x0000 //RX_FDEQ_BIN_15 +79 0x0000 //RX_FDEQ_BIN_16 +80 0x0000 //RX_FDEQ_BIN_17 +81 0x0000 //RX_FDEQ_BIN_18 +82 0x0000 //RX_FDEQ_BIN_19 +83 0x0000 //RX_FDEQ_BIN_20 +84 0x0000 //RX_FDEQ_BIN_21 +85 0x0000 //RX_FDEQ_BIN_22 +86 0x0000 //RX_FDEQ_BIN_23 +87 0x4000 //RX_FDEQ_RESRV_0 +88 0x0320 //RX_FDEQ_RESRV_1 +89 0x0018 //RX_FDDRC_BAND_MARGIN_0 +90 0x0035 //RX_FDDRC_BAND_MARGIN_1 +91 0x00D5 //RX_FDDRC_BAND_MARGIN_2 +92 0x0120 //RX_FDDRC_BAND_MARGIN_3 +93 0x0004 //RX_FDDRC_BLOCK_EXP +94 0x5000 //RX_FDDRC_THRD_2_0 +95 0x5000 //RX_FDDRC_THRD_2_1 +96 0x2000 //RX_FDDRC_THRD_2_2 +97 0x5000 //RX_FDDRC_THRD_2_3 +98 0x6400 //RX_FDDRC_THRD_3_0 +99 0x6400 //RX_FDDRC_THRD_3_1 +100 0x2000 //RX_FDDRC_THRD_3_2 +101 0x5000 //RX_FDDRC_THRD_3_3 +102 0x4000 //RX_FDDRC_SLANT_0_0 +103 0x4000 //RX_FDDRC_SLANT_0_1 +104 0x4000 //RX_FDDRC_SLANT_0_2 +105 0x4000 //RX_FDDRC_SLANT_0_3 +106 0x7FFF //RX_FDDRC_SLANT_1_0 +107 0x7FFF //RX_FDDRC_SLANT_1_1 +108 0x7FFF //RX_FDDRC_SLANT_1_2 +109 0x7FFF //RX_FDDRC_SLANT_1_3 +110 0x0000 //RX_FDDRC_RESRV_0 +129 0x0058 //RX_SPK_VOL +130 0x0000 //RX_VOL_RESRV_0 +#VOL 5 +6 0x6000 //RX_TDDRC_ALPHA_UP_1 +7 0x6000 //RX_TDDRC_ALPHA_UP_2 +8 0x6000 //RX_TDDRC_ALPHA_UP_3 +9 0x1000 //RX_TDDRC_ALPHA_UP_4 +27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +33 0x7214 //RX_TDDRC_LIMITER_THRD +34 0x0800 //RX_TDDRC_LIMITER_GAIN +112 0x0002 //RX_TDDRC_THRD_0 +113 0x0004 //RX_TDDRC_THRD_1 +114 0x1C00 //RX_TDDRC_THRD_2 +115 0x1C00 //RX_TDDRC_THRD_3 +116 0x7FFF //RX_TDDRC_SLANT_0 +117 0x7FFF //RX_TDDRC_SLANT_1 +118 0x6000 //RX_TDDRC_ALPHA_UP_0 +119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +120 0x0000 //RX_TDDRC_HMNC_FLAG +121 0x199A //RX_TDDRC_HMNC_GAIN +122 0x0001 //RX_TDDRC_SMT_FLAG +123 0x0CCD //RX_TDDRC_SMT_W +124 0x035A //RX_TDDRC_DRC_GAIN +38 0x001C //RX_FDEQ_SUBNUM +39 0x5B48 //RX_FDEQ_GAIN_0 +40 0x5459 //RX_FDEQ_GAIN_1 +41 0x4A43 //RX_FDEQ_GAIN_2 +42 0x4857 //RX_FDEQ_GAIN_3 +43 0x6052 //RX_FDEQ_GAIN_4 +44 0x4845 //RX_FDEQ_GAIN_5 +45 0x4B58 //RX_FDEQ_GAIN_6 +46 0x5856 //RX_FDEQ_GAIN_7 +47 0x5452 //RX_FDEQ_GAIN_8 +48 0x5362 //RX_FDEQ_GAIN_9 +49 0x615F //RX_FDEQ_GAIN_10 +50 0x626A //RX_FDEQ_GAIN_11 +51 0x5B52 //RX_FDEQ_GAIN_12 +52 0x5960 //RX_FDEQ_GAIN_13 +53 0x4848 //RX_FDEQ_GAIN_14 +54 0x4848 //RX_FDEQ_GAIN_15 +55 0x4848 //RX_FDEQ_GAIN_16 +56 0x4848 //RX_FDEQ_GAIN_17 +57 0x4848 //RX_FDEQ_GAIN_18 +58 0x4848 //RX_FDEQ_GAIN_19 +59 0x4848 //RX_FDEQ_GAIN_20 +60 0x4848 //RX_FDEQ_GAIN_21 +61 0x4848 //RX_FDEQ_GAIN_22 +62 0x4848 //RX_FDEQ_GAIN_23 +63 0x0202 //RX_FDEQ_BIN_0 +64 0x0203 //RX_FDEQ_BIN_1 +65 0x0303 //RX_FDEQ_BIN_2 +66 0x0304 //RX_FDEQ_BIN_3 +67 0x0404 //RX_FDEQ_BIN_4 +68 0x0204 //RX_FDEQ_BIN_5 +69 0x0A0A //RX_FDEQ_BIN_6 +70 0x0A0A //RX_FDEQ_BIN_7 +71 0x0B0C //RX_FDEQ_BIN_8 +72 0x0D0E //RX_FDEQ_BIN_9 +73 0x0E0F //RX_FDEQ_BIN_10 +74 0x0F10 //RX_FDEQ_BIN_11 +75 0x1011 //RX_FDEQ_BIN_12 +76 0x1104 //RX_FDEQ_BIN_13 +77 0x0000 //RX_FDEQ_BIN_14 +78 0x0000 //RX_FDEQ_BIN_15 +79 0x0000 //RX_FDEQ_BIN_16 +80 0x0000 //RX_FDEQ_BIN_17 +81 0x0000 //RX_FDEQ_BIN_18 +82 0x0000 //RX_FDEQ_BIN_19 +83 0x0000 //RX_FDEQ_BIN_20 +84 0x0000 //RX_FDEQ_BIN_21 +85 0x0000 //RX_FDEQ_BIN_22 +86 0x0000 //RX_FDEQ_BIN_23 +87 0x4000 //RX_FDEQ_RESRV_0 +88 0x0320 //RX_FDEQ_RESRV_1 +89 0x0018 //RX_FDDRC_BAND_MARGIN_0 +90 0x0035 //RX_FDDRC_BAND_MARGIN_1 +91 0x00D5 //RX_FDDRC_BAND_MARGIN_2 +92 0x0120 //RX_FDDRC_BAND_MARGIN_3 +93 0x0004 //RX_FDDRC_BLOCK_EXP +94 0x5000 //RX_FDDRC_THRD_2_0 +95 0x5000 //RX_FDDRC_THRD_2_1 +96 0x2000 //RX_FDDRC_THRD_2_2 +97 0x5000 //RX_FDDRC_THRD_2_3 +98 0x6400 //RX_FDDRC_THRD_3_0 +99 0x6400 //RX_FDDRC_THRD_3_1 +100 0x2000 //RX_FDDRC_THRD_3_2 +101 0x5000 //RX_FDDRC_THRD_3_3 +102 0x4000 //RX_FDDRC_SLANT_0_0 +103 0x4000 //RX_FDDRC_SLANT_0_1 +104 0x4000 //RX_FDDRC_SLANT_0_2 +105 0x4000 //RX_FDDRC_SLANT_0_3 +106 0x7FFF //RX_FDDRC_SLANT_1_0 +107 0x7FFF //RX_FDDRC_SLANT_1_1 +108 0x7FFF //RX_FDDRC_SLANT_1_2 +109 0x7FFF //RX_FDDRC_SLANT_1_3 +110 0x0000 //RX_FDDRC_RESRV_0 +129 0x0085 //RX_SPK_VOL +130 0x0000 //RX_VOL_RESRV_0 +#VOL 6 +6 0x6000 //RX_TDDRC_ALPHA_UP_1 +7 0x6000 //RX_TDDRC_ALPHA_UP_2 +8 0x6000 //RX_TDDRC_ALPHA_UP_3 +9 0x1000 //RX_TDDRC_ALPHA_UP_4 +27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +33 0x7214 //RX_TDDRC_LIMITER_THRD +34 0x0800 //RX_TDDRC_LIMITER_GAIN +112 0x0002 //RX_TDDRC_THRD_0 +113 0x0004 //RX_TDDRC_THRD_1 +114 0x1C00 //RX_TDDRC_THRD_2 +115 0x1C00 //RX_TDDRC_THRD_3 +116 0x7FFF //RX_TDDRC_SLANT_0 +117 0x7FFF //RX_TDDRC_SLANT_1 +118 0x6000 //RX_TDDRC_ALPHA_UP_0 +119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +120 0x0000 //RX_TDDRC_HMNC_FLAG +121 0x199A //RX_TDDRC_HMNC_GAIN +122 0x0001 //RX_TDDRC_SMT_FLAG +123 0x0CCD //RX_TDDRC_SMT_W +124 0x035A //RX_TDDRC_DRC_GAIN +38 0x001C //RX_FDEQ_SUBNUM +39 0x5B48 //RX_FDEQ_GAIN_0 +40 0x5459 //RX_FDEQ_GAIN_1 +41 0x4A43 //RX_FDEQ_GAIN_2 +42 0x4857 //RX_FDEQ_GAIN_3 +43 0x6052 //RX_FDEQ_GAIN_4 +44 0x4845 //RX_FDEQ_GAIN_5 +45 0x4B58 //RX_FDEQ_GAIN_6 +46 0x5856 //RX_FDEQ_GAIN_7 +47 0x5452 //RX_FDEQ_GAIN_8 +48 0x5362 //RX_FDEQ_GAIN_9 +49 0x615F //RX_FDEQ_GAIN_10 +50 0x626A //RX_FDEQ_GAIN_11 +51 0x5B52 //RX_FDEQ_GAIN_12 +52 0x5960 //RX_FDEQ_GAIN_13 +53 0x4848 //RX_FDEQ_GAIN_14 +54 0x4848 //RX_FDEQ_GAIN_15 +55 0x4848 //RX_FDEQ_GAIN_16 +56 0x4848 //RX_FDEQ_GAIN_17 +57 0x4848 //RX_FDEQ_GAIN_18 +58 0x4848 //RX_FDEQ_GAIN_19 +59 0x4848 //RX_FDEQ_GAIN_20 +60 0x4848 //RX_FDEQ_GAIN_21 +61 0x4848 //RX_FDEQ_GAIN_22 +62 0x4848 //RX_FDEQ_GAIN_23 +63 0x0202 //RX_FDEQ_BIN_0 +64 0x0203 //RX_FDEQ_BIN_1 +65 0x0303 //RX_FDEQ_BIN_2 +66 0x0304 //RX_FDEQ_BIN_3 +67 0x0404 //RX_FDEQ_BIN_4 +68 0x0204 //RX_FDEQ_BIN_5 +69 0x0A0A //RX_FDEQ_BIN_6 +70 0x0A0A //RX_FDEQ_BIN_7 +71 0x0B0C //RX_FDEQ_BIN_8 +72 0x0D0E //RX_FDEQ_BIN_9 +73 0x0E0F //RX_FDEQ_BIN_10 +74 0x0F10 //RX_FDEQ_BIN_11 +75 0x1011 //RX_FDEQ_BIN_12 +76 0x1104 //RX_FDEQ_BIN_13 +77 0x0000 //RX_FDEQ_BIN_14 +78 0x0000 //RX_FDEQ_BIN_15 +79 0x0000 //RX_FDEQ_BIN_16 +80 0x0000 //RX_FDEQ_BIN_17 +81 0x0000 //RX_FDEQ_BIN_18 +82 0x0000 //RX_FDEQ_BIN_19 +83 0x0000 //RX_FDEQ_BIN_20 +84 0x0000 //RX_FDEQ_BIN_21 +85 0x0000 //RX_FDEQ_BIN_22 +86 0x0000 //RX_FDEQ_BIN_23 +87 0x4000 //RX_FDEQ_RESRV_0 +88 0x0320 //RX_FDEQ_RESRV_1 +89 0x0018 //RX_FDDRC_BAND_MARGIN_0 +90 0x0035 //RX_FDDRC_BAND_MARGIN_1 +91 0x00D5 //RX_FDDRC_BAND_MARGIN_2 +92 0x0120 //RX_FDDRC_BAND_MARGIN_3 +93 0x0004 //RX_FDDRC_BLOCK_EXP +94 0x5000 //RX_FDDRC_THRD_2_0 +95 0x5000 //RX_FDDRC_THRD_2_1 +96 0x2000 //RX_FDDRC_THRD_2_2 +97 0x5000 //RX_FDDRC_THRD_2_3 +98 0x6400 //RX_FDDRC_THRD_3_0 +99 0x6400 //RX_FDDRC_THRD_3_1 +100 0x2000 //RX_FDDRC_THRD_3_2 +101 0x5000 //RX_FDDRC_THRD_3_3 +102 0x4000 //RX_FDDRC_SLANT_0_0 +103 0x4000 //RX_FDDRC_SLANT_0_1 +104 0x4000 //RX_FDDRC_SLANT_0_2 +105 0x4000 //RX_FDDRC_SLANT_0_3 +106 0x7FFF //RX_FDDRC_SLANT_1_0 +107 0x7FFF //RX_FDDRC_SLANT_1_1 +108 0x7FFF //RX_FDDRC_SLANT_1_2 +109 0x7FFF //RX_FDDRC_SLANT_1_3 +110 0x0000 //RX_FDDRC_RESRV_0 +129 0x0100 //RX_SPK_VOL +130 0x0000 //RX_VOL_RESRV_0 +#RX 2 +157 0x027C //RX_RECVFUNC_MODE_0 +158 0x0000 //RX_RECVFUNC_MODE_1 +159 0x0001 //RX_SAMPLINGFREQ_SIG +160 0x0001 //RX_SAMPLINGFREQ_PROC +161 0x000A //RX_FRAME_SZ +162 0x0000 //RX_DELAY_OPT +163 0x6000 //RX_TDDRC_ALPHA_UP_1 +164 0x6000 //RX_TDDRC_ALPHA_UP_2 +165 0x6000 //RX_TDDRC_ALPHA_UP_3 +166 0x1000 //RX_TDDRC_ALPHA_UP_4 +167 0x0800 //RX_PGA +168 0x7B02 //RX_A_HP +169 0x4000 //RX_B_PE +170 0x7800 //RX_THR_PITCH_DET_0 +171 0x7000 //RX_THR_PITCH_DET_1 +172 0x6000 //RX_THR_PITCH_DET_2 +173 0x0008 //RX_PITCH_BFR_LEN +174 0x0003 //RX_SBD_PITCH_DET +175 0x0100 //RX_PP_RESRV_0 +176 0x0020 //RX_PP_RESRV_1 +177 0x0400 //RX_N_SN_EST +178 0x000C //RX_N2_SN_EST +179 0x0010 //RX_NS_LVL_CTRL +180 0xF800 //RX_THR_SN_EST +181 0x7E00 //RX_LAMBDA_PFILT +182 0x000A //RX_FENS_RESRV_0 +183 0x0190 //RX_FENS_RESRV_1 +184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +187 0x0002 //RX_EXTRA_NS_L +188 0x0800 //RX_EXTRA_NS_A +189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +190 0x7214 //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +192 0x199A //RX_A_POST_FLT +193 0x0000 //RX_LMT_THRD +194 0x4000 //RX_LMT_ALPHA +195 0x001C //RX_FDEQ_SUBNUM +196 0x6868 //RX_FDEQ_GAIN_0 +197 0x6858 //RX_FDEQ_GAIN_1 +198 0x5858 //RX_FDEQ_GAIN_2 +199 0x5858 //RX_FDEQ_GAIN_3 +200 0x5C5C //RX_FDEQ_GAIN_4 +201 0x5854 //RX_FDEQ_GAIN_5 +202 0x544C //RX_FDEQ_GAIN_6 +203 0x4C4C //RX_FDEQ_GAIN_7 +204 0x4C60 //RX_FDEQ_GAIN_8 +205 0x6068 //RX_FDEQ_GAIN_9 +206 0x7070 //RX_FDEQ_GAIN_10 +207 0x8070 //RX_FDEQ_GAIN_11 +208 0x6060 //RX_FDEQ_GAIN_12 +209 0x7070 //RX_FDEQ_GAIN_13 +210 0x4848 //RX_FDEQ_GAIN_14 +211 0x4848 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0202 //RX_FDEQ_BIN_0 +221 0x0203 //RX_FDEQ_BIN_1 +222 0x0303 //RX_FDEQ_BIN_2 +223 0x0304 //RX_FDEQ_BIN_3 +224 0x0404 //RX_FDEQ_BIN_4 +225 0x0204 //RX_FDEQ_BIN_5 +226 0x0A0A //RX_FDEQ_BIN_6 +227 0x0A0A //RX_FDEQ_BIN_7 +228 0x0B0C //RX_FDEQ_BIN_8 +229 0x0D0E //RX_FDEQ_BIN_9 +230 0x0E0F //RX_FDEQ_BIN_10 +231 0x0F10 //RX_FDEQ_BIN_11 +232 0x1011 //RX_FDEQ_BIN_12 +233 0x1104 //RX_FDEQ_BIN_13 +234 0x0000 //RX_FDEQ_BIN_14 +235 0x0000 //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x4000 //RX_FDEQ_RESRV_0 +245 0x0320 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0035 //RX_FDDRC_BAND_MARGIN_1 +248 0x00D5 //RX_FDDRC_BAND_MARGIN_2 +249 0x0120 //RX_FDDRC_BAND_MARGIN_3 +250 0x0004 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x2000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x2000 //RX_FDDRC_THRD_3_2 +258 0x5000 //RX_FDDRC_THRD_3_3 +259 0x4000 //RX_FDDRC_SLANT_0_0 +260 0x4000 //RX_FDDRC_SLANT_0_1 +261 0x4000 //RX_FDDRC_SLANT_0_2 +262 0x4000 //RX_FDDRC_SLANT_0_3 +263 0x7FFF //RX_FDDRC_SLANT_1_0 +264 0x7FFF //RX_FDDRC_SLANT_1_1 +265 0x7FFF //RX_FDDRC_SLANT_1_2 +266 0x7FFF //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +268 0x0002 //RX_FILTINDX +269 0x0002 //RX_TDDRC_THRD_0 +270 0x0004 //RX_TDDRC_THRD_1 +271 0x1C00 //RX_TDDRC_THRD_2 +272 0x1C00 //RX_TDDRC_THRD_3 +273 0x7FFF //RX_TDDRC_SLANT_0 +274 0x7FFF //RX_TDDRC_SLANT_1 +275 0x6000 //RX_TDDRC_ALPHA_UP_0 +276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x199A //RX_TDDRC_HMNC_GAIN +279 0x0001 //RX_TDDRC_SMT_FLAG +280 0x0CCD //RX_TDDRC_SMT_W +281 0x06AF //RX_TDDRC_DRC_GAIN +282 0x7C00 //RX_LAMBDA_PKA_FP +283 0x2000 //RX_TPKA_FP +284 0x2000 //RX_MIN_G_FP +285 0x0080 //RX_MAX_G_FP +286 0x0014 //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 +288 0x0000 //RX_MAXLEVEL_CNG +289 0x3000 //RX_BWE_UV_TH +290 0x3000 //RX_BWE_UV_TH2 +291 0x1800 //RX_BWE_UV_TH3 +292 0x1000 //RX_BWE_V_TH +293 0x04CD //RX_BWE_GAIN1_V_TH1 +294 0x0F33 //RX_BWE_GAIN1_V_TH2 +295 0x7333 //RX_BWE_UV_EQ +296 0x199A //RX_BWE_V_EQ +297 0x7333 //RX_BWE_TONE_TH +298 0x0004 //RX_BWE_UV_HOLD_T +299 0x6CCD //RX_BWE_GAIN2_ALPHA +300 0x799A //RX_BWE_GAIN3_ALPHA +301 0x001E //RX_BWE_CUTOFF +302 0x3000 //RX_BWE_GAINFILL +303 0x3200 //RX_BWE_MAXTH_TONE +304 0x2000 //RX_BWE_EQ_0 +305 0x2000 //RX_BWE_EQ_1 +306 0x2000 //RX_BWE_EQ_2 +307 0x2000 //RX_BWE_EQ_3 +308 0x2000 //RX_BWE_EQ_4 +309 0x2000 //RX_BWE_EQ_5 +310 0x2000 //RX_BWE_EQ_6 +311 0x0000 //RX_BWE_RESRV_0 +312 0x0000 //RX_BWE_RESRV_1 +313 0x0000 //RX_BWE_RESRV_2 +#VOL 0 +163 0x6000 //RX_TDDRC_ALPHA_UP_1 +164 0x6000 //RX_TDDRC_ALPHA_UP_2 +165 0x6000 //RX_TDDRC_ALPHA_UP_3 +166 0x1000 //RX_TDDRC_ALPHA_UP_4 +184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +190 0x7214 //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +269 0x0002 //RX_TDDRC_THRD_0 +270 0x0004 //RX_TDDRC_THRD_1 +271 0x1C00 //RX_TDDRC_THRD_2 +272 0x1C00 //RX_TDDRC_THRD_3 +273 0x7FFF //RX_TDDRC_SLANT_0 +274 0x7FFF //RX_TDDRC_SLANT_1 +275 0x6000 //RX_TDDRC_ALPHA_UP_0 +276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x199A //RX_TDDRC_HMNC_GAIN +279 0x0001 //RX_TDDRC_SMT_FLAG +280 0x0CCD //RX_TDDRC_SMT_W +281 0x06AF //RX_TDDRC_DRC_GAIN +195 0x001C //RX_FDEQ_SUBNUM +196 0x6868 //RX_FDEQ_GAIN_0 +197 0x6858 //RX_FDEQ_GAIN_1 +198 0x5858 //RX_FDEQ_GAIN_2 +199 0x5858 //RX_FDEQ_GAIN_3 +200 0x5C5C //RX_FDEQ_GAIN_4 +201 0x5854 //RX_FDEQ_GAIN_5 +202 0x544C //RX_FDEQ_GAIN_6 +203 0x4C4C //RX_FDEQ_GAIN_7 +204 0x4C60 //RX_FDEQ_GAIN_8 +205 0x6068 //RX_FDEQ_GAIN_9 +206 0x7070 //RX_FDEQ_GAIN_10 +207 0x8070 //RX_FDEQ_GAIN_11 +208 0x6060 //RX_FDEQ_GAIN_12 +209 0x7070 //RX_FDEQ_GAIN_13 +210 0x4848 //RX_FDEQ_GAIN_14 +211 0x4848 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0202 //RX_FDEQ_BIN_0 +221 0x0203 //RX_FDEQ_BIN_1 +222 0x0303 //RX_FDEQ_BIN_2 +223 0x0304 //RX_FDEQ_BIN_3 +224 0x0404 //RX_FDEQ_BIN_4 +225 0x0204 //RX_FDEQ_BIN_5 +226 0x0A0A //RX_FDEQ_BIN_6 +227 0x0A0A //RX_FDEQ_BIN_7 +228 0x0B0C //RX_FDEQ_BIN_8 +229 0x0D0E //RX_FDEQ_BIN_9 +230 0x0E0F //RX_FDEQ_BIN_10 +231 0x0F10 //RX_FDEQ_BIN_11 +232 0x1011 //RX_FDEQ_BIN_12 +233 0x1104 //RX_FDEQ_BIN_13 +234 0x0000 //RX_FDEQ_BIN_14 +235 0x0000 //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x4000 //RX_FDEQ_RESRV_0 +245 0x0320 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0035 //RX_FDDRC_BAND_MARGIN_1 +248 0x00D5 //RX_FDDRC_BAND_MARGIN_2 +249 0x0120 //RX_FDDRC_BAND_MARGIN_3 +250 0x0004 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x2000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x2000 //RX_FDDRC_THRD_3_2 +258 0x5000 //RX_FDDRC_THRD_3_3 +259 0x4000 //RX_FDDRC_SLANT_0_0 +260 0x4000 //RX_FDDRC_SLANT_0_1 +261 0x4000 //RX_FDDRC_SLANT_0_2 +262 0x4000 //RX_FDDRC_SLANT_0_3 +263 0x7FFF //RX_FDDRC_SLANT_1_0 +264 0x7FFF //RX_FDDRC_SLANT_1_1 +265 0x7FFF //RX_FDDRC_SLANT_1_2 +266 0x7FFF //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +286 0x0014 //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 +#VOL 1 +163 0x6000 //RX_TDDRC_ALPHA_UP_1 +164 0x6000 //RX_TDDRC_ALPHA_UP_2 +165 0x6000 //RX_TDDRC_ALPHA_UP_3 +166 0x1000 //RX_TDDRC_ALPHA_UP_4 +184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +190 0x7214 //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +269 0x0002 //RX_TDDRC_THRD_0 +270 0x0004 //RX_TDDRC_THRD_1 +271 0x1C00 //RX_TDDRC_THRD_2 +272 0x1C00 //RX_TDDRC_THRD_3 +273 0x7FFF //RX_TDDRC_SLANT_0 +274 0x7FFF //RX_TDDRC_SLANT_1 +275 0x6000 //RX_TDDRC_ALPHA_UP_0 +276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x199A //RX_TDDRC_HMNC_GAIN +279 0x0001 //RX_TDDRC_SMT_FLAG +280 0x0CCD //RX_TDDRC_SMT_W +281 0x06AF //RX_TDDRC_DRC_GAIN +195 0x001C //RX_FDEQ_SUBNUM +196 0x6868 //RX_FDEQ_GAIN_0 +197 0x6858 //RX_FDEQ_GAIN_1 +198 0x5858 //RX_FDEQ_GAIN_2 +199 0x5858 //RX_FDEQ_GAIN_3 +200 0x5C5C //RX_FDEQ_GAIN_4 +201 0x5854 //RX_FDEQ_GAIN_5 +202 0x544C //RX_FDEQ_GAIN_6 +203 0x4C4C //RX_FDEQ_GAIN_7 +204 0x4C60 //RX_FDEQ_GAIN_8 +205 0x6068 //RX_FDEQ_GAIN_9 +206 0x7070 //RX_FDEQ_GAIN_10 +207 0x8070 //RX_FDEQ_GAIN_11 +208 0x6060 //RX_FDEQ_GAIN_12 +209 0x7070 //RX_FDEQ_GAIN_13 +210 0x4848 //RX_FDEQ_GAIN_14 +211 0x4848 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0202 //RX_FDEQ_BIN_0 +221 0x0203 //RX_FDEQ_BIN_1 +222 0x0303 //RX_FDEQ_BIN_2 +223 0x0304 //RX_FDEQ_BIN_3 +224 0x0404 //RX_FDEQ_BIN_4 +225 0x0204 //RX_FDEQ_BIN_5 +226 0x0A0A //RX_FDEQ_BIN_6 +227 0x0A0A //RX_FDEQ_BIN_7 +228 0x0B0C //RX_FDEQ_BIN_8 +229 0x0D0E //RX_FDEQ_BIN_9 +230 0x0E0F //RX_FDEQ_BIN_10 +231 0x0F10 //RX_FDEQ_BIN_11 +232 0x1011 //RX_FDEQ_BIN_12 +233 0x1104 //RX_FDEQ_BIN_13 +234 0x0000 //RX_FDEQ_BIN_14 +235 0x0000 //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x4000 //RX_FDEQ_RESRV_0 +245 0x0320 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0035 //RX_FDDRC_BAND_MARGIN_1 +248 0x00D5 //RX_FDDRC_BAND_MARGIN_2 +249 0x0120 //RX_FDDRC_BAND_MARGIN_3 +250 0x0004 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x2000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x2000 //RX_FDDRC_THRD_3_2 +258 0x5000 //RX_FDDRC_THRD_3_3 +259 0x4000 //RX_FDDRC_SLANT_0_0 +260 0x4000 //RX_FDDRC_SLANT_0_1 +261 0x4000 //RX_FDDRC_SLANT_0_2 +262 0x4000 //RX_FDDRC_SLANT_0_3 +263 0x7FFF //RX_FDDRC_SLANT_1_0 +264 0x7FFF //RX_FDDRC_SLANT_1_1 +265 0x7FFF //RX_FDDRC_SLANT_1_2 +266 0x7FFF //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +286 0x001A //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 +#VOL 2 +163 0x6000 //RX_TDDRC_ALPHA_UP_1 +164 0x6000 //RX_TDDRC_ALPHA_UP_2 +165 0x6000 //RX_TDDRC_ALPHA_UP_3 +166 0x1000 //RX_TDDRC_ALPHA_UP_4 +184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +190 0x7214 //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +269 0x0002 //RX_TDDRC_THRD_0 +270 0x0004 //RX_TDDRC_THRD_1 +271 0x1C00 //RX_TDDRC_THRD_2 +272 0x1C00 //RX_TDDRC_THRD_3 +273 0x7FFF //RX_TDDRC_SLANT_0 +274 0x7FFF //RX_TDDRC_SLANT_1 +275 0x6000 //RX_TDDRC_ALPHA_UP_0 +276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x199A //RX_TDDRC_HMNC_GAIN +279 0x0001 //RX_TDDRC_SMT_FLAG +280 0x0CCD //RX_TDDRC_SMT_W +281 0x06AF //RX_TDDRC_DRC_GAIN +195 0x001C //RX_FDEQ_SUBNUM +196 0x6868 //RX_FDEQ_GAIN_0 +197 0x6858 //RX_FDEQ_GAIN_1 +198 0x5858 //RX_FDEQ_GAIN_2 +199 0x5858 //RX_FDEQ_GAIN_3 +200 0x5C5C //RX_FDEQ_GAIN_4 +201 0x5854 //RX_FDEQ_GAIN_5 +202 0x544C //RX_FDEQ_GAIN_6 +203 0x4C4C //RX_FDEQ_GAIN_7 +204 0x4C60 //RX_FDEQ_GAIN_8 +205 0x6068 //RX_FDEQ_GAIN_9 +206 0x7070 //RX_FDEQ_GAIN_10 +207 0x8070 //RX_FDEQ_GAIN_11 +208 0x6060 //RX_FDEQ_GAIN_12 +209 0x7070 //RX_FDEQ_GAIN_13 +210 0x4848 //RX_FDEQ_GAIN_14 +211 0x4848 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0202 //RX_FDEQ_BIN_0 +221 0x0203 //RX_FDEQ_BIN_1 +222 0x0303 //RX_FDEQ_BIN_2 +223 0x0304 //RX_FDEQ_BIN_3 +224 0x0404 //RX_FDEQ_BIN_4 +225 0x0204 //RX_FDEQ_BIN_5 +226 0x0A0A //RX_FDEQ_BIN_6 +227 0x0A0A //RX_FDEQ_BIN_7 +228 0x0B0C //RX_FDEQ_BIN_8 +229 0x0D0E //RX_FDEQ_BIN_9 +230 0x0E0F //RX_FDEQ_BIN_10 +231 0x0F10 //RX_FDEQ_BIN_11 +232 0x1011 //RX_FDEQ_BIN_12 +233 0x1104 //RX_FDEQ_BIN_13 +234 0x0000 //RX_FDEQ_BIN_14 +235 0x0000 //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x4000 //RX_FDEQ_RESRV_0 +245 0x0320 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0035 //RX_FDDRC_BAND_MARGIN_1 +248 0x00D5 //RX_FDDRC_BAND_MARGIN_2 +249 0x0120 //RX_FDDRC_BAND_MARGIN_3 +250 0x0004 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x2000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x2000 //RX_FDDRC_THRD_3_2 +258 0x5000 //RX_FDDRC_THRD_3_3 +259 0x4000 //RX_FDDRC_SLANT_0_0 +260 0x4000 //RX_FDDRC_SLANT_0_1 +261 0x4000 //RX_FDDRC_SLANT_0_2 +262 0x4000 //RX_FDDRC_SLANT_0_3 +263 0x7FFF //RX_FDDRC_SLANT_1_0 +264 0x7FFF //RX_FDDRC_SLANT_1_1 +265 0x7FFF //RX_FDDRC_SLANT_1_2 +266 0x7FFF //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +286 0x0026 //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 +#VOL 3 +163 0x6000 //RX_TDDRC_ALPHA_UP_1 +164 0x6000 //RX_TDDRC_ALPHA_UP_2 +165 0x6000 //RX_TDDRC_ALPHA_UP_3 +166 0x1000 //RX_TDDRC_ALPHA_UP_4 +184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +190 0x7214 //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +269 0x0002 //RX_TDDRC_THRD_0 +270 0x0004 //RX_TDDRC_THRD_1 +271 0x1C00 //RX_TDDRC_THRD_2 +272 0x1C00 //RX_TDDRC_THRD_3 +273 0x7FFF //RX_TDDRC_SLANT_0 +274 0x7FFF //RX_TDDRC_SLANT_1 +275 0x6000 //RX_TDDRC_ALPHA_UP_0 +276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x199A //RX_TDDRC_HMNC_GAIN +279 0x0001 //RX_TDDRC_SMT_FLAG +280 0x0CCD //RX_TDDRC_SMT_W +281 0x06AF //RX_TDDRC_DRC_GAIN +195 0x001C //RX_FDEQ_SUBNUM +196 0x6868 //RX_FDEQ_GAIN_0 +197 0x6858 //RX_FDEQ_GAIN_1 +198 0x5858 //RX_FDEQ_GAIN_2 +199 0x5858 //RX_FDEQ_GAIN_3 +200 0x5C5C //RX_FDEQ_GAIN_4 +201 0x5854 //RX_FDEQ_GAIN_5 +202 0x544C //RX_FDEQ_GAIN_6 +203 0x4C4C //RX_FDEQ_GAIN_7 +204 0x4C60 //RX_FDEQ_GAIN_8 +205 0x6068 //RX_FDEQ_GAIN_9 +206 0x7070 //RX_FDEQ_GAIN_10 +207 0x8070 //RX_FDEQ_GAIN_11 +208 0x6060 //RX_FDEQ_GAIN_12 +209 0x7070 //RX_FDEQ_GAIN_13 +210 0x4848 //RX_FDEQ_GAIN_14 +211 0x4848 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0202 //RX_FDEQ_BIN_0 +221 0x0203 //RX_FDEQ_BIN_1 +222 0x0303 //RX_FDEQ_BIN_2 +223 0x0304 //RX_FDEQ_BIN_3 +224 0x0404 //RX_FDEQ_BIN_4 +225 0x0204 //RX_FDEQ_BIN_5 +226 0x0A0A //RX_FDEQ_BIN_6 +227 0x0A0A //RX_FDEQ_BIN_7 +228 0x0B0C //RX_FDEQ_BIN_8 +229 0x0D0E //RX_FDEQ_BIN_9 +230 0x0E0F //RX_FDEQ_BIN_10 +231 0x0F10 //RX_FDEQ_BIN_11 +232 0x1011 //RX_FDEQ_BIN_12 +233 0x1104 //RX_FDEQ_BIN_13 +234 0x0000 //RX_FDEQ_BIN_14 +235 0x0000 //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x4000 //RX_FDEQ_RESRV_0 +245 0x0320 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0035 //RX_FDDRC_BAND_MARGIN_1 +248 0x00D5 //RX_FDDRC_BAND_MARGIN_2 +249 0x0120 //RX_FDDRC_BAND_MARGIN_3 +250 0x0004 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x2000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x2000 //RX_FDDRC_THRD_3_2 +258 0x5000 //RX_FDDRC_THRD_3_3 +259 0x4000 //RX_FDDRC_SLANT_0_0 +260 0x4000 //RX_FDDRC_SLANT_0_1 +261 0x4000 //RX_FDDRC_SLANT_0_2 +262 0x4000 //RX_FDDRC_SLANT_0_3 +263 0x7FFF //RX_FDDRC_SLANT_1_0 +264 0x7FFF //RX_FDDRC_SLANT_1_1 +265 0x7FFF //RX_FDDRC_SLANT_1_2 +266 0x7FFF //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +286 0x0035 //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 +#VOL 4 +163 0x6000 //RX_TDDRC_ALPHA_UP_1 +164 0x6000 //RX_TDDRC_ALPHA_UP_2 +165 0x6000 //RX_TDDRC_ALPHA_UP_3 +166 0x1000 //RX_TDDRC_ALPHA_UP_4 +184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +190 0x7214 //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +269 0x0002 //RX_TDDRC_THRD_0 +270 0x0004 //RX_TDDRC_THRD_1 +271 0x1C00 //RX_TDDRC_THRD_2 +272 0x1C00 //RX_TDDRC_THRD_3 +273 0x7FFF //RX_TDDRC_SLANT_0 +274 0x7FFF //RX_TDDRC_SLANT_1 +275 0x6000 //RX_TDDRC_ALPHA_UP_0 +276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x199A //RX_TDDRC_HMNC_GAIN +279 0x0001 //RX_TDDRC_SMT_FLAG +280 0x0CCD //RX_TDDRC_SMT_W +281 0x06AF //RX_TDDRC_DRC_GAIN +195 0x001C //RX_FDEQ_SUBNUM +196 0x7878 //RX_FDEQ_GAIN_0 +197 0x786C //RX_FDEQ_GAIN_1 +198 0x6C6C //RX_FDEQ_GAIN_2 +199 0x6262 //RX_FDEQ_GAIN_3 +200 0x5A60 //RX_FDEQ_GAIN_4 +201 0x7A54 //RX_FDEQ_GAIN_5 +202 0x5448 //RX_FDEQ_GAIN_6 +203 0x4848 //RX_FDEQ_GAIN_7 +204 0x4860 //RX_FDEQ_GAIN_8 +205 0x6068 //RX_FDEQ_GAIN_9 +206 0x7070 //RX_FDEQ_GAIN_10 +207 0x8070 //RX_FDEQ_GAIN_11 +208 0x6060 //RX_FDEQ_GAIN_12 +209 0x7070 //RX_FDEQ_GAIN_13 +210 0x4848 //RX_FDEQ_GAIN_14 +211 0x4848 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0202 //RX_FDEQ_BIN_0 +221 0x0203 //RX_FDEQ_BIN_1 +222 0x0303 //RX_FDEQ_BIN_2 +223 0x0304 //RX_FDEQ_BIN_3 +224 0x0404 //RX_FDEQ_BIN_4 +225 0x0204 //RX_FDEQ_BIN_5 +226 0x0A0A //RX_FDEQ_BIN_6 +227 0x0A0A //RX_FDEQ_BIN_7 +228 0x0B0C //RX_FDEQ_BIN_8 +229 0x0D0E //RX_FDEQ_BIN_9 +230 0x0E0F //RX_FDEQ_BIN_10 +231 0x0F10 //RX_FDEQ_BIN_11 +232 0x1011 //RX_FDEQ_BIN_12 +233 0x1104 //RX_FDEQ_BIN_13 +234 0x0000 //RX_FDEQ_BIN_14 +235 0x0000 //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x4000 //RX_FDEQ_RESRV_0 +245 0x0320 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0035 //RX_FDDRC_BAND_MARGIN_1 +248 0x00D5 //RX_FDDRC_BAND_MARGIN_2 +249 0x0120 //RX_FDDRC_BAND_MARGIN_3 +250 0x0004 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x2000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x2000 //RX_FDDRC_THRD_3_2 +258 0x5000 //RX_FDDRC_THRD_3_3 +259 0x4000 //RX_FDDRC_SLANT_0_0 +260 0x4000 //RX_FDDRC_SLANT_0_1 +261 0x4000 //RX_FDDRC_SLANT_0_2 +262 0x4000 //RX_FDDRC_SLANT_0_3 +263 0x7FFF //RX_FDDRC_SLANT_1_0 +264 0x7FFF //RX_FDDRC_SLANT_1_1 +265 0x7FFF //RX_FDDRC_SLANT_1_2 +266 0x7FFF //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +286 0x0058 //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 +#VOL 5 +163 0x6000 //RX_TDDRC_ALPHA_UP_1 +164 0x6000 //RX_TDDRC_ALPHA_UP_2 +165 0x6000 //RX_TDDRC_ALPHA_UP_3 +166 0x1000 //RX_TDDRC_ALPHA_UP_4 +184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +190 0x7214 //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +269 0x0002 //RX_TDDRC_THRD_0 +270 0x0004 //RX_TDDRC_THRD_1 +271 0x1C00 //RX_TDDRC_THRD_2 +272 0x1C00 //RX_TDDRC_THRD_3 +273 0x7FFF //RX_TDDRC_SLANT_0 +274 0x7FFF //RX_TDDRC_SLANT_1 +275 0x6000 //RX_TDDRC_ALPHA_UP_0 +276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x199A //RX_TDDRC_HMNC_GAIN +279 0x0001 //RX_TDDRC_SMT_FLAG +280 0x0CCD //RX_TDDRC_SMT_W +281 0x06AF //RX_TDDRC_DRC_GAIN +195 0x001C //RX_FDEQ_SUBNUM +196 0x7878 //RX_FDEQ_GAIN_0 +197 0x786C //RX_FDEQ_GAIN_1 +198 0x6C6C //RX_FDEQ_GAIN_2 +199 0x6262 //RX_FDEQ_GAIN_3 +200 0x5A60 //RX_FDEQ_GAIN_4 +201 0x7A54 //RX_FDEQ_GAIN_5 +202 0x5448 //RX_FDEQ_GAIN_6 +203 0x4848 //RX_FDEQ_GAIN_7 +204 0x4860 //RX_FDEQ_GAIN_8 +205 0x6068 //RX_FDEQ_GAIN_9 +206 0x7070 //RX_FDEQ_GAIN_10 +207 0x8070 //RX_FDEQ_GAIN_11 +208 0x6060 //RX_FDEQ_GAIN_12 +209 0x7070 //RX_FDEQ_GAIN_13 +210 0x4848 //RX_FDEQ_GAIN_14 +211 0x4848 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0202 //RX_FDEQ_BIN_0 +221 0x0203 //RX_FDEQ_BIN_1 +222 0x0303 //RX_FDEQ_BIN_2 +223 0x0304 //RX_FDEQ_BIN_3 +224 0x0404 //RX_FDEQ_BIN_4 +225 0x0204 //RX_FDEQ_BIN_5 +226 0x0A0A //RX_FDEQ_BIN_6 +227 0x0A0A //RX_FDEQ_BIN_7 +228 0x0B0C //RX_FDEQ_BIN_8 +229 0x0D0E //RX_FDEQ_BIN_9 +230 0x0E0F //RX_FDEQ_BIN_10 +231 0x0F10 //RX_FDEQ_BIN_11 +232 0x1011 //RX_FDEQ_BIN_12 +233 0x1104 //RX_FDEQ_BIN_13 +234 0x0000 //RX_FDEQ_BIN_14 +235 0x0000 //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x4000 //RX_FDEQ_RESRV_0 +245 0x0320 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0035 //RX_FDDRC_BAND_MARGIN_1 +248 0x00D5 //RX_FDDRC_BAND_MARGIN_2 +249 0x0120 //RX_FDDRC_BAND_MARGIN_3 +250 0x0004 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x2000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x2000 //RX_FDDRC_THRD_3_2 +258 0x5000 //RX_FDDRC_THRD_3_3 +259 0x4000 //RX_FDDRC_SLANT_0_0 +260 0x4000 //RX_FDDRC_SLANT_0_1 +261 0x4000 //RX_FDDRC_SLANT_0_2 +262 0x4000 //RX_FDDRC_SLANT_0_3 +263 0x7FFF //RX_FDDRC_SLANT_1_0 +264 0x7FFF //RX_FDDRC_SLANT_1_1 +265 0x7FFF //RX_FDDRC_SLANT_1_2 +266 0x7FFF //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +286 0x0085 //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 +#VOL 6 +163 0x6000 //RX_TDDRC_ALPHA_UP_1 +164 0x6000 //RX_TDDRC_ALPHA_UP_2 +165 0x6000 //RX_TDDRC_ALPHA_UP_3 +166 0x1000 //RX_TDDRC_ALPHA_UP_4 +184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +190 0x7214 //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +269 0x0002 //RX_TDDRC_THRD_0 +270 0x0004 //RX_TDDRC_THRD_1 +271 0x1C00 //RX_TDDRC_THRD_2 +272 0x1C00 //RX_TDDRC_THRD_3 +273 0x7FFF //RX_TDDRC_SLANT_0 +274 0x7FFF //RX_TDDRC_SLANT_1 +275 0x6000 //RX_TDDRC_ALPHA_UP_0 +276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x199A //RX_TDDRC_HMNC_GAIN +279 0x0001 //RX_TDDRC_SMT_FLAG +280 0x0CCD //RX_TDDRC_SMT_W +281 0x06AF //RX_TDDRC_DRC_GAIN +195 0x001C //RX_FDEQ_SUBNUM +196 0x7878 //RX_FDEQ_GAIN_0 +197 0x786C //RX_FDEQ_GAIN_1 +198 0x6C6C //RX_FDEQ_GAIN_2 +199 0x6262 //RX_FDEQ_GAIN_3 +200 0x5A60 //RX_FDEQ_GAIN_4 +201 0x7A54 //RX_FDEQ_GAIN_5 +202 0x5448 //RX_FDEQ_GAIN_6 +203 0x4848 //RX_FDEQ_GAIN_7 +204 0x4860 //RX_FDEQ_GAIN_8 +205 0x6068 //RX_FDEQ_GAIN_9 +206 0x7070 //RX_FDEQ_GAIN_10 +207 0x8070 //RX_FDEQ_GAIN_11 +208 0x6060 //RX_FDEQ_GAIN_12 +209 0x7070 //RX_FDEQ_GAIN_13 +210 0x4848 //RX_FDEQ_GAIN_14 +211 0x4848 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0202 //RX_FDEQ_BIN_0 +221 0x0203 //RX_FDEQ_BIN_1 +222 0x0303 //RX_FDEQ_BIN_2 +223 0x0304 //RX_FDEQ_BIN_3 +224 0x0404 //RX_FDEQ_BIN_4 +225 0x0204 //RX_FDEQ_BIN_5 +226 0x0A0A //RX_FDEQ_BIN_6 +227 0x0A0A //RX_FDEQ_BIN_7 +228 0x0B0C //RX_FDEQ_BIN_8 +229 0x0D0E //RX_FDEQ_BIN_9 +230 0x0E0F //RX_FDEQ_BIN_10 +231 0x0F10 //RX_FDEQ_BIN_11 +232 0x1011 //RX_FDEQ_BIN_12 +233 0x1104 //RX_FDEQ_BIN_13 +234 0x0000 //RX_FDEQ_BIN_14 +235 0x0000 //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x4000 //RX_FDEQ_RESRV_0 +245 0x0320 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0035 //RX_FDDRC_BAND_MARGIN_1 +248 0x00D5 //RX_FDDRC_BAND_MARGIN_2 +249 0x0120 //RX_FDDRC_BAND_MARGIN_3 +250 0x0004 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x2000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x2000 //RX_FDDRC_THRD_3_2 +258 0x5000 //RX_FDDRC_THRD_3_3 +259 0x4000 //RX_FDDRC_SLANT_0_0 +260 0x4000 //RX_FDDRC_SLANT_0_1 +261 0x4000 //RX_FDDRC_SLANT_0_2 +262 0x4000 //RX_FDDRC_SLANT_0_3 +263 0x7FFF //RX_FDDRC_SLANT_1_0 +264 0x7FFF //RX_FDDRC_SLANT_1_1 +265 0x7FFF //RX_FDDRC_SLANT_1_2 +266 0x7FFF //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +286 0x0100 //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 + +#CASE_NAME HANDSFREE-HANDSFREE-VOICE_GENERIC-NB +#PARAM_MODE FULL +#PARAM_TYPE TX+2RX +#TOTAL_CUSTOM_STEP 7+7 +#TX +0 0x0001 //TX_OPERATION_MODE_0 +1 0x0001 //TX_OPERATION_MODE_1 +2 0x0073 //TX_PATCH_REG +3 0x2F7C //TX_SENDFUNC_MODE_0 +4 0x0001 //TX_SENDFUNC_MODE_1 +5 0x0003 //TX_NUM_MIC +6 0x0000 //TX_SAMPLINGFREQ_SIG +7 0x0000 //TX_SAMPLINGFREQ_PROC +8 0x000A //TX_FRAME_SZ_SIG +9 0x000A //TX_FRAME_SZ +10 0x0000 //TX_DELAY_OPT +11 0x0028 //TX_MAX_TAIL_LENGTH +12 0x0001 //TX_NUM_LOUTCHN +13 0x0001 //TX_MAXNUM_AECREF +14 0x0000 //TX_DBG_FUNC_REG +15 0x0000 //TX_DBG_FUNC_REG1 +16 0x0000 //TX_SYS_RESRV_0 +17 0x0000 //TX_SYS_RESRV_1 +18 0x0000 //TX_SYS_RESRV_2 +19 0x0000 //TX_SYS_RESRV_3 +20 0x0000 //TX_DIST2REF0 +21 0x00A3 //TX_DIST2REF1 +22 0x001B //TX_DIST2REF_02 +23 0x0000 //TX_DIST2REF_03 +24 0x0000 //TX_DIST2REF_04 +25 0x0000 //TX_DIST2REF_05 +26 0x0000 //TX_MMIC +27 0x1000 //TX_PGA_0 +28 0x1000 //TX_PGA_1 +29 0x1000 //TX_PGA_2 +30 0x0000 //TX_PGA_3 +31 0x0000 //TX_PGA_4 +32 0x0000 //TX_PGA_5 +33 0x0001 //TX_MIC_PAIRS +34 0x0000 //TX_MIC_PAIRS_HS +35 0x0002 //TX_MICS_FOR_BF +36 0x0000 //TX_MIC_PAIRS_FORL1 +37 0x0002 //TX_MICS_OF_PAIR0 +38 0x0002 //TX_MICS_OF_PAIR1 +39 0x0002 //TX_MICS_OF_PAIR2 +40 0x0002 //TX_MICS_OF_PAIR3 +41 0x0000 //TX_MIC_DATA_SRC0 +42 0x0002 //TX_MIC_DATA_SRC1 +43 0x0001 //TX_MIC_DATA_SRC2 +44 0x0000 //TX_MIC_DATA_SRC3 +45 0x0000 //TX_MIC_PAIR_CH_04 +46 0x0000 //TX_MIC_PAIR_CH_05 +47 0x0000 //TX_MIC_PAIR_CH_10 +48 0x0000 //TX_MIC_PAIR_CH_11 +49 0x0000 //TX_MIC_PAIR_CH_12 +50 0x0000 //TX_MIC_PAIR_CH_13 +51 0x0000 //TX_MIC_PAIR_CH_14 +52 0x05DC //TX_HD_BIN_MASK +53 0x0010 //TX_HD_SUBAND_MASK +54 0x19A1 //TX_HD_FRAME_AVG_MASK +55 0x0320 //TX_HD_MIN_FRQ +56 0x1000 //TX_HD_ALPHA_PSD +57 0x1100 //TX_T_PHPR1 +58 0x0000 //TX_T_PHPR2 +59 0x0000 //TX_T_PTPR +60 0x0000 //TX_T_PNPR +61 0x0000 //TX_T_PAPR1 +62 0xEE6C //TX_T_PSDVAT +63 0x0800 //TX_CNT +64 0x4000 //TX_ANTI_HOWL_GAIN +65 0x0001 //TX_MICFORBFMARK_0 +66 0x0001 //TX_MICFORBFMARK_1 +67 0x0001 //TX_MICFORBFMARK_2 +68 0x0001 //TX_MICFORBFMARK_3 +69 0x0001 //TX_MICFORBFMARK_4 +70 0x0001 //TX_MICFORBFMARK_5 +71 0x0000 //TX_DIST2REF_10 +72 0x3A66 //TX_DIST2REF_11 +73 0x053D //TX_DIST2REF2 +74 0x0000 //TX_DIST2REF_13 +75 0x0000 //TX_DIST2REF_14 +76 0x0000 //TX_DIST2REF_15 +77 0x0000 //TX_DIST2REF_20 +78 0x0000 //TX_DIST2REF_21 +79 0x0000 //TX_DIST2REF_22 +80 0x0000 //TX_DIST2REF_23 +81 0x0000 //TX_DIST2REF_24 +82 0x0000 //TX_DIST2REF_25 +83 0x0000 //TX_DIST2REF_30 +84 0x0000 //TX_DIST2REF_31 +85 0x0000 //TX_DIST2REF_32 +86 0x0000 //TX_DIST2REF_33 +87 0x0000 //TX_DIST2REF_34 +88 0x0000 //TX_DIST2REF_35 +89 0x0000 //TX_MIC_LOC_00 +90 0x0000 //TX_MIC_LOC_01 +91 0x0000 //TX_MIC_LOC_02 +92 0x0000 //TX_MIC_LOC_03 +93 0x0000 //TX_MIC_LOC_04 +94 0x0000 //TX_MIC_LOC_05 +95 0x0000 //TX_MIC_LOC_10 +96 0x0000 //TX_MIC_LOC_11 +97 0x0000 //TX_MIC_LOC_12 +98 0x0000 //TX_MIC_LOC_13 +99 0x0000 //TX_MIC_LOC_14 +100 0x0000 //TX_MIC_LOC_15 +101 0x0000 //TX_MIC_LOC_20 +102 0x0000 //TX_MIC_LOC_21 +103 0x0000 //TX_MIC_LOC_22 +104 0x0000 //TX_MIC_LOC_23 +105 0x0000 //TX_MIC_LOC_24 +106 0x0000 //TX_MIC_LOC_25 +107 0x0200 //TX_MIC_REFBLK_VOLUME +108 0x0CAE //TX_MIC_BLOCK_VOLUME +109 0x0000 //TX_INVERSE_MASK +110 0x0000 //TX_ADCS_MASK +111 0x04D0 //TX_ADCS_GAIN +112 0x4000 //TX_NFC_GAINFAC +113 0x0000 //TX_MAINMIC_BLKFACTOR +114 0x0000 //TX_REFMIC_BLKFACTOR +115 0x0000 //TX_BLMIC_BLKFACTOR +116 0x0000 //TX_BRMIC_BLKFACTOR +117 0x0031 //TX_MICBLK_START_BIN +118 0x0060 //TX_MICBLK_END_BIN +119 0x0015 //TX_MICBLK_FE_HOLD +120 0xFFF2 //TX_MICBLK_MR_EXP_TH +121 0xFFF2 //TX_MICBLK_LR_EXP_TH +122 0x0000 //TX_FENE_HOLD +123 0x4000 //TX_FE_ENER_TH_MTS +124 0x0004 //TX_FE_ENER_TH_EXP +125 0x6000 //TX_C_POST_FLT_MIC_MAINBLK +126 0x6000 //TX_C_POST_FLT_MIC_REFBLK +127 0x0010 //TX_MIC_BLOCK_N +128 0x7652 //TX_A_HP +129 0x4000 //TX_B_PE +130 0x5000 //TX_THR_PITCH_DET_0 +131 0x4800 //TX_THR_PITCH_DET_1 +132 0x4000 //TX_THR_PITCH_DET_2 +133 0x0008 //TX_PITCH_BFR_LEN +134 0x0003 //TX_SBD_PITCH_DET +135 0x0050 //TX_TD_AEC_L +136 0x4000 //TX_MU0_UNP_TD_AEC +137 0x1000 //TX_MU0_PTD_TD_AEC +138 0x0000 //TX_PP_RESRV_0 +139 0x2A94 //TX_PP_RESRV_1 +140 0x55F0 //TX_PP_RESRV_2 +141 0x0000 //TX_PP_RESRV_3 +142 0x0000 //TX_PP_RESRV_4 +143 0x0000 //TX_PP_RESRV_5 +144 0x0000 //TX_PP_RESRV_6 +145 0x0000 //TX_PP_RESRV_7 +146 0x0028 //TX_TAIL_LENGTH +147 0x0100 //TX_AEC_REF_GAIN_0 +148 0x0800 //TX_AEC_REF_GAIN_1 +149 0x0800 //TX_AEC_REF_GAIN_2 +150 0x7A00 //TX_EAD_THR +151 0x1000 //TX_THR_RE_EST +152 0x0200 //TX_MIN_EQ_RE_EST_0 +153 0x0200 //TX_MIN_EQ_RE_EST_1 +154 0x0200 //TX_MIN_EQ_RE_EST_2 +155 0x0200 //TX_MIN_EQ_RE_EST_3 +156 0x0200 //TX_MIN_EQ_RE_EST_4 +157 0x0200 //TX_MIN_EQ_RE_EST_5 +158 0x0200 //TX_MIN_EQ_RE_EST_6 +159 0x1800 //TX_MIN_EQ_RE_EST_7 +160 0x1800 //TX_MIN_EQ_RE_EST_8 +161 0x3000 //TX_MIN_EQ_RE_EST_9 +162 0x4000 //TX_MIN_EQ_RE_EST_10 +163 0x6000 //TX_MIN_EQ_RE_EST_11 +164 0x7FFF //TX_MIN_EQ_RE_EST_12 +165 0x2000 //TX_LAMBDA_RE_EST +166 0x0000 //TX_LAMBDA_CB_NLE +167 0x7FFF //TX_C_POST_FLT +168 0x2000 //TX_GAIN_NP +169 0x0180 //TX_SE_HOLD_N +170 0x00C8 //TX_DT_HOLD_N +171 0x05DC //TX_DT2_HOLD_N +172 0x6666 //TX_AEC_RESRV_0 +173 0x0000 //TX_AEC_RESRV_1 +174 0x0014 //TX_AEC_RESRV_2 +175 0x0000 //TX_MIC_DELAY_LENGTH +176 0x0000 //TX_REF_DELAY_LENGTH +177 0x0000 //TX_ADD_LINEIN_GAINL +178 0x0000 //TX_ADD_LINEIN_GAINH +179 0x0000 //TX_MIN_EQ_RE_EST_14 +180 0x0000 //TX_DTD_THR1_8 +181 0x7FFF //TX_DTD_THR2_8 +182 0x0000 //TX_DTD_MIC_BLK2 +183 0x0008 //TX_FRQ_LIN_LEN +184 0x7FFF //TX_FRQ_AEC_LEN_RHO +185 0x6000 //TX_MU0_UNP_FRQ_AEC +186 0x4000 //TX_MU0_PTD_FRQ_AEC +187 0x000A //TX_MINENOISETH +188 0x0800 //TX_MU0_RE_EST +189 0x0001 //TX_AEC_NUM_CH +190 0x0000 //TX_BIGECHOATTENUATION_MAX +191 0x2000 //TX_A_POST_FLT_MICBLK +192 0x0000 //TX_BLKENERTH +193 0x0000 //TX_BLKENERHIGHTH +194 0x0000 //TX_NORMENERTH +195 0x0000 //TX_NORMENERHIGHTH +196 0x0000 //TX_NORMENERHIGHTHL +197 0x6D60 //TX_DTD_THR1_0 +198 0x6D60 //TX_DTD_THR1_1 +199 0x6D60 //TX_DTD_THR1_2 +200 0x7FF0 //TX_DTD_THR1_3 +201 0x7FF0 //TX_DTD_THR1_4 +202 0x7FF0 //TX_DTD_THR1_5 +203 0x7FF0 //TX_DTD_THR1_6 +204 0x0CCD //TX_DTD_THR2_0 +205 0x0CCD //TX_DTD_THR2_1 +206 0x0CCD //TX_DTD_THR2_2 +207 0x0CCD //TX_DTD_THR2_3 +208 0x0CCD //TX_DTD_THR2_4 +209 0x0CCD //TX_DTD_THR2_5 +210 0x0CCD //TX_DTD_THR2_6 +211 0x7FFF //TX_DTD_THR3 +212 0x0000 //TX_SPK_CUT_K +213 0x157C //TX_DT_CUT_K +214 0x0100 //TX_DT_CUT_THR +215 0x04EB //TX_COMFORT_G +216 0x01F4 //TX_POWER_YOUT_TH +217 0x4000 //TX_FDPFGAINECHO +218 0x0000 //TX_DTD_HD_THR +219 0x0000 //TX_SPK_CUT_K_S +220 0x0000 //TX_DTD_MIC_BLK +221 0x1000 //TX_ADPT_STRICT_L +222 0x1000 //TX_ADPT_STRICT_H +223 0x0BB8 //TX_RATIO_DT_L_TH_LOW +224 0x3A98 //TX_RATIO_DT_H_TH_LOW +225 0x1770 //TX_RATIO_DT_L_TH_HIGH +226 0x4E20 //TX_RATIO_DT_H_TH_HIGH +227 0x09C4 //TX_RATIO_DT_L0_TH +228 0x1800 //TX_B_POST_FILT_ECHO_L +229 0x2000 //TX_B_POST_FILT_ECHO_H +230 0x0200 //TX_MIN_G_CTRL_ECHO +231 0x1000 //TX_B_LESSCUT_RTO_ECHO +232 0x0000 //TX_EPD_OFFSET_00 +233 0x0000 //TX_EPD_OFFST_01 +234 0x1388 //TX_RATIO_DT_L0_TH_HIGH +235 0x3A98 //TX_RATIO_DT_H_TH_CUT +236 0x7FFF //TX_MIN_EQ_RE_EST_13 +237 0x0000 //TX_DTD_THR1_7 +238 0x0000 //TX_DTD_THR2_7 +239 0x0800 //TX_DT_RESRV_7 +240 0x0800 //TX_DT_RESRV_8 +241 0x0000 //TX_DT_RESRV_9 +242 0xF800 //TX_THR_SN_EST_0 +243 0xFA00 //TX_THR_SN_EST_1 +244 0xFA00 //TX_THR_SN_EST_2 +245 0xF900 //TX_THR_SN_EST_3 +246 0xFA00 //TX_THR_SN_EST_4 +247 0xFA00 //TX_THR_SN_EST_5 +248 0xF800 //TX_THR_SN_EST_6 +249 0xF800 //TX_THR_SN_EST_7 +250 0x0050 //TX_DELTA_THR_SN_EST_0 +251 0x0200 //TX_DELTA_THR_SN_EST_1 +252 0x0200 //TX_DELTA_THR_SN_EST_2 +253 0x0100 //TX_DELTA_THR_SN_EST_3 +254 0x0200 //TX_DELTA_THR_SN_EST_4 +255 0x0200 //TX_DELTA_THR_SN_EST_5 +256 0x01A0 //TX_DELTA_THR_SN_EST_6 +257 0x0200 //TX_DELTA_THR_SN_EST_7 +258 0x4000 //TX_LAMBDA_NN_EST_0 +259 0x4000 //TX_LAMBDA_NN_EST_1 +260 0x4000 //TX_LAMBDA_NN_EST_2 +261 0x4000 //TX_LAMBDA_NN_EST_3 +262 0x4000 //TX_LAMBDA_NN_EST_4 +263 0x4000 //TX_LAMBDA_NN_EST_5 +264 0x4000 //TX_LAMBDA_NN_EST_6 +265 0x4000 //TX_LAMBDA_NN_EST_7 +266 0x0400 //TX_N_SN_EST +267 0x001E //TX_INBEAM_T +268 0x0041 //TX_INBEAMHOLDT +269 0x2000 //TX_G_STRICT +270 0x2000 //TX_EQ_THR_BF +271 0x7F00 //TX_LAMBDA_EQ_BF +272 0x1000 //TX_NE_RTO_TH +273 0x0400 //TX_NE_RTO_TH_L +274 0x0800 //TX_MAINREFRTOH_TH_H +275 0x0800 //TX_MAINREFRTOH_TH_L +276 0x0800 //TX_MAINREFRTO_TH_H +277 0x0800 //TX_MAINREFRTO_TH_L +278 0x0800 //TX_MAINREFRTO_TH_EQ +279 0x1000 //TX_B_POST_FLT_0 +280 0x1000 //TX_B_POST_FLT_1 +281 0x0010 //TX_NS_LVL_CTRL_0 +282 0x0017 //TX_NS_LVL_CTRL_1 +283 0x0015 //TX_NS_LVL_CTRL_2 +284 0x0012 //TX_NS_LVL_CTRL_3 +285 0x0012 //TX_NS_LVL_CTRL_4 +286 0x0011 //TX_NS_LVL_CTRL_5 +287 0x0012 //TX_NS_LVL_CTRL_6 +288 0x0011 //TX_NS_LVL_CTRL_7 +289 0x0018 //TX_MIN_GAIN_S_0 +290 0x0018 //TX_MIN_GAIN_S_1 +291 0x0018 //TX_MIN_GAIN_S_2 +292 0x0018 //TX_MIN_GAIN_S_3 +293 0x0018 //TX_MIN_GAIN_S_4 +294 0x0018 //TX_MIN_GAIN_S_5 +295 0x0018 //TX_MIN_GAIN_S_6 +296 0x0018 //TX_MIN_GAIN_S_7 +297 0x4000 //TX_NMOS_SUP +298 0x0000 //TX_NS_MAX_PRI_SNR_TH +299 0x0000 //TX_NMOS_SUP_MENSA +300 0x7FFF //TX_SNRI_SUP_0 +301 0x1000 //TX_SNRI_SUP_1 +302 0x4000 //TX_SNRI_SUP_2 +303 0x2400 //TX_SNRI_SUP_3 +304 0x4000 //TX_SNRI_SUP_4 +305 0x4000 //TX_SNRI_SUP_5 +306 0x4000 //TX_SNRI_SUP_6 +307 0x7FFF //TX_SNRI_SUP_7 +308 0x7FFF //TX_THR_LFNS +309 0x0018 //TX_G_LFNS +310 0x09C4 //TX_GAIN0_NTH +311 0x000A //TX_MUSIC_MORENS +312 0x7FFF //TX_A_POST_FILT_0 +313 0x2000 //TX_A_POST_FILT_1 +314 0x7FFF //TX_A_POST_FILT_S_0 +315 0x7FFF //TX_A_POST_FILT_S_1 +316 0x7FFF //TX_A_POST_FILT_S_2 +317 0x7FFF //TX_A_POST_FILT_S_3 +318 0x7FFF //TX_A_POST_FILT_S_4 +319 0x7FFF //TX_A_POST_FILT_S_5 +320 0x7FFF //TX_A_POST_FILT_S_6 +321 0x7FFF //TX_A_POST_FILT_S_7 +322 0x1000 //TX_B_POST_FILT_0 +323 0x1000 //TX_B_POST_FILT_1 +324 0x1000 //TX_B_POST_FILT_2 +325 0x5000 //TX_B_POST_FILT_3 +326 0x3000 //TX_B_POST_FILT_4 +327 0x1000 //TX_B_POST_FILT_5 +328 0x1000 //TX_B_POST_FILT_6 +329 0x2000 //TX_B_POST_FILT_7 +330 0x4000 //TX_B_LESSCUT_RTO_S_0 +331 0x6000 //TX_B_LESSCUT_RTO_S_1 +332 0x6000 //TX_B_LESSCUT_RTO_S_2 +333 0x6000 //TX_B_LESSCUT_RTO_S_3 +334 0x6000 //TX_B_LESSCUT_RTO_S_4 +335 0x6000 //TX_B_LESSCUT_RTO_S_5 +336 0x6000 //TX_B_LESSCUT_RTO_S_6 +337 0x7FFF //TX_B_LESSCUT_RTO_S_7 +338 0x7E00 //TX_LAMBDA_PFILT +339 0x7E00 //TX_LAMBDA_PFILT_S_0 +340 0x7E00 //TX_LAMBDA_PFILT_S_1 +341 0x7E00 //TX_LAMBDA_PFILT_S_2 +342 0x7E00 //TX_LAMBDA_PFILT_S_3 +343 0x7E00 //TX_LAMBDA_PFILT_S_4 +344 0x7E00 //TX_LAMBDA_PFILT_S_5 +345 0x7E00 //TX_LAMBDA_PFILT_S_6 +346 0x7E00 //TX_LAMBDA_PFILT_S_7 +347 0x0200 //TX_K_PEPPER +348 0x0800 //TX_A_PEPPER +349 0x1EAA //TX_K_PEPPER_HF +350 0x0600 //TX_A_PEPPER_HF +351 0x0001 //TX_HMNC_BST_FLG +352 0x0200 //TX_HMNC_BST_THR +353 0x0800 //TX_DT_BINVAD_TH_0 +354 0x0800 //TX_DT_BINVAD_TH_1 +355 0x0800 //TX_DT_BINVAD_TH_2 +356 0x0800 //TX_DT_BINVAD_TH_3 +357 0x0FA0 //TX_DT_BINVAD_ENDF +358 0x0400 //TX_C_POST_FLT_DT +359 0x4000 //TX_NS_B_POST_FLT_LESSCUT +360 0x0100 //TX_DT_BOOST +361 0x0000 //TX_BF_SGRAD_FLG +362 0x0005 //TX_BF_DVG_TH +363 0x001E //TX_SN_C_F +364 0x0000 //TX_K_APT +365 0x0001 //TX_NOISEDET +366 0x0064 //TX_NDETCT +367 0x0050 //TX_NOISE_TH_0 +368 0x7FFF //TX_NOISE_TH_0_2 +369 0x7FFF //TX_NOISE_TH_0_3 +370 0x07D0 //TX_NOISE_TH_1 +371 0x03ED //TX_NOISE_TH_2 +372 0x2EE0 //TX_NOISE_TH_3 +373 0x5528 //TX_NOISE_TH_4 +374 0x7FFF //TX_NOISE_TH_5 +375 0x7FFF //TX_NOISE_TH_5_2 +376 0x0000 //TX_NOISE_TH_5_3 +377 0x7FFF //TX_NOISE_TH_5_4 +378 0x0FA0 //TX_NOISE_TH_6 +379 0x000A //TX_MINENOISE_TH +380 0xD508 //TX_MORENS_TFMASK_TH +381 0x0001 //TX_DRC_QUIET_FLOOR +382 0x3A98 //TX_RATIODTL_CUT_TH +383 0x0DAC //TX_DT_CUT_K1 +384 0x0666 //TX_OUT_ENER_S_TH_CLEAN +385 0x0666 //TX_OUT_ENER_S_TH_LESSCLEAN +386 0x0333 //TX_OUT_ENER_S_TH_NOISY +387 0x019A //TX_OUT_ENER_TH_NOISE +388 0x1000 //TX_OUT_ENER_TH_SPEECH +389 0x2000 //TX_SN_NPB_GAIN +390 0x0000 //TX_NN_NPB_GAIN +391 0x7FFF //TX_POST_MASK_SUP_HSNE +392 0x7000 //TX_TAIL_DET_TH +393 0x4000 //TX_B_LESSCUT_RTO_WTA +394 0x0000 //TX_MEL_G_R +395 0x0080 //TX_SUPHIGH_TH +396 0x0000 //TX_MASK_G_R +397 0x0002 //TX_EXTRA_NS_L +398 0x1800 //TX_C_POST_FLT_MASK +399 0x7FFF //TX_A_POST_FLT_WNS +400 0x0148 //TX_MIN_G_LOW300HZ +401 0x0001 //TX_MAXLEVEL_CNG +402 0x00B4 //TX_STN_NOISE_TH +403 0x4000 //TX_POST_MASK_SUP +404 0x7FFF //TX_POST_MASK_ADJUST +405 0x00C8 //TX_NS_ENOISE_MIC0_TH +406 0x000A //TX_MINENOISE_MIC0_TH +407 0x012C //TX_MINENOISE_MIC0_S_TH +408 0x7FFF //TX_MIN_G_CTRL_SSNS +409 0x0000 //TX_METAL_RTO_THR +410 0x4848 //TX_NS_FP_K_METAL +411 0x3A98 //TX_NOISEDET_BOOST_TH +412 0x0FA0 //TX_NSMOOTH_TH +413 0x0000 //TX_NS_RESRV_8 +414 0x1800 //TX_RHO_UPB +415 0x0BB8 //TX_N_HOLD_HS +416 0x0050 //TX_N_RHO_BFR0 +417 0x7FFF //TX_LAMBDA_ARSP_EST +418 0x0100 //TX_EXTRA_GAIN_MICBLOCK +419 0x0CCD //TX_THR_STD_NSR +420 0x007A //TX_THR_STD_PLH +421 0x2AF8 //TX_N_HOLD_STD +422 0x0066 //TX_THR_STD_RHO +423 0x2000 //TX_BF_RESET_THR_HS +424 0x09C4 //TX_SB_RTO_MEAN_TH +425 0x0000 //TX_SB_RHO_MEAN_TH_NTALK +426 0x3800 //TX_SB_RTO_MEAN_TH_ABN +427 0x2EE0 //TX_SB_RTO_MEAN_TH_RUB +428 0x0000 //TX_WTA_EN_RTO_TH +429 0x0000 //TX_TOP_ENER_TH_F +430 0x0000 //TX_DESIRED_TALK_HOLDT +431 0x0800 //TX_MIC_BLOCK_FACTOR +432 0x0000 //TX_NSEST_BFRLRNRDC +433 0x0000 //TX_THR_POST_FLT_HS +434 0x0010 //TX_HS_VAD_BIN +435 0x2666 //TX_THR_VAD_HS +436 0x2CCD //TX_MEAN_RTO_MIN_TH2 +437 0x0032 //TX_SILENCE_T +438 0x0000 //TX_A_POST_FLT_WTA +439 0x799A //TX_LAMBDA_PFLT_WTA +440 0x0000 //TX_SB_RHO_MEAN2_TH +441 0x0190 //TX_SB_RHO_MEAN3_TH +442 0x0000 //TX_HS_RESRV_4 +443 0x0000 //TX_HS_RESRV_5 +444 0x003C //TX_DOA_VAD_THR_1 +445 0x0000 //TX_DOA_VAD_THR_2 +446 0x0028 //TX_DOA_VAD_THR1_0 +447 0x0028 //TX_DOA_VAD_THR1_1 +448 0x0000 //TX_SRC_DOA_RNG_LOW_0A +449 0x00B4 //TX_SRC_DOA_RNG_HIGH_0A +450 0x005A //TX_DFLT_SRC_DOA_0A +451 0x0000 //TX_SRC_DOA_RNG_LOW_0B +452 0x0000 //TX_SRC_DOA_RNG_HIGH_0B +453 0x0000 //TX_DFLT_SRC_DOA_0B +454 0x0000 //TX_SRC_DOA_RNG_LOW_0C +455 0x0000 //TX_SRC_DOA_RNG_HIGH_0C +456 0x0000 //TX_DFLT_SRC_DOA_0C +457 0x0000 //TX_SRC_DOA_RNG_LOW_0D +458 0x0000 //TX_SRC_DOA_RNG_HIGH_0D +459 0x0000 //TX_DFLT_SRC_DOA_0D +460 0x0000 //TX_SRC_DOA_RNG_LOW_1A +461 0x00B4 //TX_SRC_DOA_RNG_HIGH_1A +462 0x005A //TX_DFLT_SRC_DOA_1A +463 0x0000 //TX_SRC_DOA_RNG_LOW_1B +464 0x00B4 //TX_SRC_DOA_RNG_HIGH_1B +465 0x005A //TX_DFLT_SRC_DOA_1B +466 0x0000 //TX_SRC_DOA_RNG_LOW_1C +467 0x00B4 //TX_SRC_DOA_RNG_HIGH_1C +468 0x005A //TX_DFLT_SRC_DOA_1C +469 0x0000 //TX_SRC_DOA_RNG_LOW_1D +470 0x00B4 //TX_SRC_DOA_RNG_HIGH_1D +471 0x005A //TX_DFLT_SRC_DOA_1D +472 0x0100 //TX_BF_HOLDOFF_T +473 0x7FFF //TX_DOA_COST_FACTOR +474 0x5000 //TX_MAINTOREFR_TH0 +475 0x071C //TX_DOA_TRK_THR +476 0x012C //TX_DOA_TRACK_HT +477 0x0200 //TX_N1_HOLD_HF +478 0x0100 //TX_N2_HOLD_HF +479 0x3000 //TX_BF_RESET_THR_HF +480 0x7333 //TX_DOA_SMOOTH +481 0x0800 //TX_MU_BF +482 0x0800 //TX_BF_MU_LF_B2 +483 0x0040 //TX_BF_FC_END_BIN_B2 +484 0x0020 //TX_BF_FC_END_BIN +485 0x0000 //TX_HF_RESRV_25 +486 0x0000 //TX_HF_RESRV_26 +487 0x0007 //TX_N_DOA_SEED +488 0x0001 //TX_FINE_DOA_SEARCH_FLG +489 0x0000 //TX_HF_RESRV_27 +490 0x038E //TX_DLT_SRC_DOA_RNG +491 0x0200 //TX_BF_MU_LF +492 0x0000 //TX_DFLT_SRC_LOC_0 +493 0x7FFF //TX_DFLT_SRC_LOC_1 +494 0x0000 //TX_DFLT_SRC_LOC_2 +495 0x038E //TX_DOA_TRACK_VADTH +496 0x0000 //TX_DOA_TRACK_NEW +497 0x01E0 //TX_NOR_OFF_THR +498 0x7C00 //TX_MORE_ON_700HZ_THR +499 0x0000 //TX_MU_BF_ADPT_NS +500 0x0000 //TX_ADAPT_LEN +501 0x6666 //TX_MORE_SNS +502 0x0000 //TX_NOR_OFF_TH1 +503 0x0000 //TX_WIDE_MASK_TH +504 0xD333 //TX_SUBSNRATIOHIGH4MEANBCK_THR +505 0x7FFF //TX_C_POST_FLT_CUT +506 0x2000 //TX_RADIODTLV +507 0x0320 //TX_POWER_LINEIN_TH +508 0x0014 //TX_FE_VADCOUNT_TH_FC +509 0x000A //TX_ECHO_SUPP_FC +510 0x0C80 //TX_ECHO_TH +511 0x6666 //TX_MIC_TO_BFGAIN +512 0x0000 //TX_MICTOBFGAIN0 +513 0x0000 //TX_FASTMUE_TH +514 0x3000 //TX_DEREVERB_LF_MU +515 0x34CD //TX_DEREVERB_HF_MU +516 0x0007 //TX_DEREVERB_DELAY +517 0x0004 //TX_DEREVERB_COEF_LEN +518 0x0003 //TX_DEREVERB_DNR +519 0x0000 //TX_DEREVERB_ALPHA +520 0x0000 //TX_DEREVERB_BETA +521 0x3A98 //TX_GSC_RTOL_TH +522 0x3A98 //TX_GSC_RTOH_TH +523 0x7E2C //TX_WIDE2_MEANHTH +524 0x0000 //TX_DR_RESRV_5 +525 0x0000 //TX_DR_RESRV_6 +526 0x0000 //TX_DR_RESRV_7 +527 0x0000 //TX_DR_RESRV_8 +528 0x1333 //TX_WIND_MARK_TH +529 0x399A //TX_CORR_THR +530 0x0004 //TX_SNR_THR +531 0x0010 //TX_ENGY_THR +532 0x1770 //TX_CORR_HIGH_TH +533 0x6000 //TX_ENGY_THR_2 +534 0x3400 //TX_MEAN_RTO_THR +535 0x0028 //TX_WNS_ENOISE_MIC0_TH +536 0x3000 //TX_RATIOMICL_TH +537 0x64CD //TX_CALIG_HS +538 0x0000 //TX_LVL_CTRL +539 0x0014 //TX_WIND_SUPRTO +540 0x000A //TX_WNS_MIN_G +541 0x0000 //TX_WNS_B_POST_FLT +542 0x2800 //TX_RATIOMICH_TH +543 0xD120 //TX_WIND_INBEAM_L_TH +544 0x0FA0 //TX_WIND_INBEAM_H_TH +545 0x2000 //TX_WNS_RESRV_0 +546 0x59D8 //TX_WNS_RESRV_1 +547 0x0000 //TX_WNS_RESRV_2 +548 0x0000 //TX_WNS_RESRV_3 +549 0x0000 //TX_WNS_RESRV_4 +550 0x0000 //TX_WNS_RESRV_5 +551 0x0000 //TX_WNS_RESRV_6 +552 0x0000 //TX_PB_B_POST_FLT_LESSCUT +553 0x0070 //TX_BF_LESSCUT_BBIN +554 0x0070 //TX_BF_LESSCUT_EBIN +555 0x0010 //TX_POSTBFB0 +556 0x0070 //TX_POSTBFB +557 0x00B0 //TX_POSTBFE +558 0x0E66 //TX_SPEECH_SNR_TH +559 0x0050 //TX_PB_MAX_PRI_SNR_TH +560 0x770A //TX_MAX_PRI_SNR_TH_L +561 0x0000 //TX_PFGAIN +562 0x0000 //TX_MAINTOREFR_TH +563 0x0000 //TX_SAM_MARK +564 0x0000 //TX_PB_RESRV_0 +565 0x0000 //TX_PB_RESRV_1 +566 0x0014 //TX_FDEQ_SUBNUM +567 0x5654 //TX_FDEQ_GAIN_0 +568 0x4E4B //TX_FDEQ_GAIN_1 +569 0x4D4E //TX_FDEQ_GAIN_2 +570 0x4D4B //TX_FDEQ_GAIN_3 +571 0x3C47 //TX_FDEQ_GAIN_4 +572 0x3C48 //TX_FDEQ_GAIN_5 +573 0x4843 //TX_FDEQ_GAIN_6 +574 0x3E3B //TX_FDEQ_GAIN_7 +575 0x302F //TX_FDEQ_GAIN_8 +576 0x3333 //TX_FDEQ_GAIN_9 +577 0x4848 //TX_FDEQ_GAIN_10 +578 0x4848 //TX_FDEQ_GAIN_11 +579 0x4848 //TX_FDEQ_GAIN_12 +580 0x4848 //TX_FDEQ_GAIN_13 +581 0x4848 //TX_FDEQ_GAIN_14 +582 0x4848 //TX_FDEQ_GAIN_15 +583 0x4848 //TX_FDEQ_GAIN_16 +584 0x4848 //TX_FDEQ_GAIN_17 +585 0x4848 //TX_FDEQ_GAIN_18 +586 0x4848 //TX_FDEQ_GAIN_19 +587 0x4848 //TX_FDEQ_GAIN_20 +588 0x4848 //TX_FDEQ_GAIN_21 +589 0x4848 //TX_FDEQ_GAIN_22 +590 0x4848 //TX_FDEQ_GAIN_23 +591 0x0202 //TX_FDEQ_BIN_0 +592 0x0203 //TX_FDEQ_BIN_1 +593 0x0303 //TX_FDEQ_BIN_2 +594 0x0304 //TX_FDEQ_BIN_3 +595 0x0405 //TX_FDEQ_BIN_4 +596 0x0506 //TX_FDEQ_BIN_5 +597 0x0708 //TX_FDEQ_BIN_6 +598 0x090A //TX_FDEQ_BIN_7 +599 0x0B0C //TX_FDEQ_BIN_8 +600 0x0D08 //TX_FDEQ_BIN_9 +601 0x0000 //TX_FDEQ_BIN_10 +602 0x0000 //TX_FDEQ_BIN_11 +603 0x0000 //TX_FDEQ_BIN_12 +604 0x0000 //TX_FDEQ_BIN_13 +605 0x0000 //TX_FDEQ_BIN_14 +606 0x0000 //TX_FDEQ_BIN_15 +607 0x0000 //TX_FDEQ_BIN_16 +608 0x0000 //TX_FDEQ_BIN_17 +609 0x0000 //TX_FDEQ_BIN_18 +610 0x0000 //TX_FDEQ_BIN_19 +611 0x0000 //TX_FDEQ_BIN_20 +612 0x0000 //TX_FDEQ_BIN_21 +613 0x0000 //TX_FDEQ_BIN_22 +614 0x0000 //TX_FDEQ_BIN_23 +615 0x0000 //TX_FDEQ_PADDING +616 0x0014 //TX_PREEQ_SUBNUM_MIC0 +617 0x4848 //TX_PREEQ_GAIN_MIC0_0 +618 0x4848 //TX_PREEQ_GAIN_MIC0_1 +619 0x4848 //TX_PREEQ_GAIN_MIC0_2 +620 0x4848 //TX_PREEQ_GAIN_MIC0_3 +621 0x4848 //TX_PREEQ_GAIN_MIC0_4 +622 0x4848 //TX_PREEQ_GAIN_MIC0_5 +623 0x4848 //TX_PREEQ_GAIN_MIC0_6 +624 0x4848 //TX_PREEQ_GAIN_MIC0_7 +625 0x4848 //TX_PREEQ_GAIN_MIC0_8 +626 0x4848 //TX_PREEQ_GAIN_MIC0_9 +627 0x4848 //TX_PREEQ_GAIN_MIC0_10 +628 0x4848 //TX_PREEQ_GAIN_MIC0_11 +629 0x4848 //TX_PREEQ_GAIN_MIC0_12 +630 0x4848 //TX_PREEQ_GAIN_MIC0_13 +631 0x4848 //TX_PREEQ_GAIN_MIC0_14 +632 0x4848 //TX_PREEQ_GAIN_MIC0_15 +633 0x4848 //TX_PREEQ_GAIN_MIC0_16 +634 0x4848 //TX_PREEQ_GAIN_MIC0_17 +635 0x4848 //TX_PREEQ_GAIN_MIC0_18 +636 0x4848 //TX_PREEQ_GAIN_MIC0_19 +637 0x4848 //TX_PREEQ_GAIN_MIC0_20 +638 0x4848 //TX_PREEQ_GAIN_MIC0_21 +639 0x4848 //TX_PREEQ_GAIN_MIC0_22 +640 0x4848 //TX_PREEQ_GAIN_MIC0_23 +641 0x0202 //TX_PREEQ_BIN_MIC0_0 +642 0x0203 //TX_PREEQ_BIN_MIC0_1 +643 0x0303 //TX_PREEQ_BIN_MIC0_2 +644 0x0304 //TX_PREEQ_BIN_MIC0_3 +645 0x0405 //TX_PREEQ_BIN_MIC0_4 +646 0x0506 //TX_PREEQ_BIN_MIC0_5 +647 0x0708 //TX_PREEQ_BIN_MIC0_6 +648 0x090A //TX_PREEQ_BIN_MIC0_7 +649 0x0B0C //TX_PREEQ_BIN_MIC0_8 +650 0x0D0E //TX_PREEQ_BIN_MIC0_9 +651 0x0000 //TX_PREEQ_BIN_MIC0_10 +652 0x0000 //TX_PREEQ_BIN_MIC0_11 +653 0x0000 //TX_PREEQ_BIN_MIC0_12 +654 0x0000 //TX_PREEQ_BIN_MIC0_13 +655 0x0000 //TX_PREEQ_BIN_MIC0_14 +656 0x0000 //TX_PREEQ_BIN_MIC0_15 +657 0x0000 //TX_PREEQ_BIN_MIC0_16 +658 0x0000 //TX_PREEQ_BIN_MIC0_17 +659 0x0000 //TX_PREEQ_BIN_MIC0_18 +660 0x0000 //TX_PREEQ_BIN_MIC0_19 +661 0x0000 //TX_PREEQ_BIN_MIC0_20 +662 0x0000 //TX_PREEQ_BIN_MIC0_21 +663 0x0000 //TX_PREEQ_BIN_MIC0_22 +664 0x0000 //TX_PREEQ_BIN_MIC0_23 +665 0x0020 //TX_PREEQ_SUBNUM_MIC1 +666 0x4848 //TX_PREEQ_GAIN_MIC1_0 +667 0x4848 //TX_PREEQ_GAIN_MIC1_1 +668 0x4848 //TX_PREEQ_GAIN_MIC1_2 +669 0x4848 //TX_PREEQ_GAIN_MIC1_3 +670 0x4848 //TX_PREEQ_GAIN_MIC1_4 +671 0x4848 //TX_PREEQ_GAIN_MIC1_5 +672 0x494A //TX_PREEQ_GAIN_MIC1_6 +673 0x4B4C //TX_PREEQ_GAIN_MIC1_7 +674 0x4D4E //TX_PREEQ_GAIN_MIC1_8 +675 0x4F51 //TX_PREEQ_GAIN_MIC1_9 +676 0x4848 //TX_PREEQ_GAIN_MIC1_10 +677 0x4848 //TX_PREEQ_GAIN_MIC1_11 +678 0x4848 //TX_PREEQ_GAIN_MIC1_12 +679 0x4848 //TX_PREEQ_GAIN_MIC1_13 +680 0x4848 //TX_PREEQ_GAIN_MIC1_14 +681 0x4848 //TX_PREEQ_GAIN_MIC1_15 +682 0x4848 //TX_PREEQ_GAIN_MIC1_16 +683 0x4848 //TX_PREEQ_GAIN_MIC1_17 +684 0x4848 //TX_PREEQ_GAIN_MIC1_18 +685 0x4848 //TX_PREEQ_GAIN_MIC1_19 +686 0x4848 //TX_PREEQ_GAIN_MIC1_20 +687 0x4848 //TX_PREEQ_GAIN_MIC1_21 +688 0x4848 //TX_PREEQ_GAIN_MIC1_22 +689 0x4848 //TX_PREEQ_GAIN_MIC1_23 +690 0x0202 //TX_PREEQ_BIN_MIC1_0 +691 0x0203 //TX_PREEQ_BIN_MIC1_1 +692 0x0303 //TX_PREEQ_BIN_MIC1_2 +693 0x0304 //TX_PREEQ_BIN_MIC1_3 +694 0x0405 //TX_PREEQ_BIN_MIC1_4 +695 0x0506 //TX_PREEQ_BIN_MIC1_5 +696 0x0708 //TX_PREEQ_BIN_MIC1_6 +697 0x090A //TX_PREEQ_BIN_MIC1_7 +698 0x0B0C //TX_PREEQ_BIN_MIC1_8 +699 0x0D0E //TX_PREEQ_BIN_MIC1_9 +700 0x0000 //TX_PREEQ_BIN_MIC1_10 +701 0x0000 //TX_PREEQ_BIN_MIC1_11 +702 0x0000 //TX_PREEQ_BIN_MIC1_12 +703 0x0000 //TX_PREEQ_BIN_MIC1_13 +704 0x0000 //TX_PREEQ_BIN_MIC1_14 +705 0x0000 //TX_PREEQ_BIN_MIC1_15 +706 0x0000 //TX_PREEQ_BIN_MIC1_16 +707 0x0000 //TX_PREEQ_BIN_MIC1_17 +708 0x0000 //TX_PREEQ_BIN_MIC1_18 +709 0x0000 //TX_PREEQ_BIN_MIC1_19 +710 0x0000 //TX_PREEQ_BIN_MIC1_20 +711 0x0000 //TX_PREEQ_BIN_MIC1_21 +712 0x0000 //TX_PREEQ_BIN_MIC1_22 +713 0x0000 //TX_PREEQ_BIN_MIC1_23 +714 0x0020 //TX_PREEQ_SUBNUM_MIC2 +715 0x4848 //TX_PREEQ_GAIN_MIC2_0 +716 0x4848 //TX_PREEQ_GAIN_MIC2_1 +717 0x4848 //TX_PREEQ_GAIN_MIC2_2 +718 0x4848 //TX_PREEQ_GAIN_MIC2_3 +719 0x4848 //TX_PREEQ_GAIN_MIC2_4 +720 0x4848 //TX_PREEQ_GAIN_MIC2_5 +721 0x4848 //TX_PREEQ_GAIN_MIC2_6 +722 0x494A //TX_PREEQ_GAIN_MIC2_7 +723 0x4A4B //TX_PREEQ_GAIN_MIC2_8 +724 0x4C4D //TX_PREEQ_GAIN_MIC2_9 +725 0x4848 //TX_PREEQ_GAIN_MIC2_10 +726 0x4848 //TX_PREEQ_GAIN_MIC2_11 +727 0x4848 //TX_PREEQ_GAIN_MIC2_12 +728 0x4848 //TX_PREEQ_GAIN_MIC2_13 +729 0x4848 //TX_PREEQ_GAIN_MIC2_14 +730 0x4848 //TX_PREEQ_GAIN_MIC2_15 +731 0x4848 //TX_PREEQ_GAIN_MIC2_16 +732 0x4848 //TX_PREEQ_GAIN_MIC2_17 +733 0x4848 //TX_PREEQ_GAIN_MIC2_18 +734 0x4848 //TX_PREEQ_GAIN_MIC2_19 +735 0x4848 //TX_PREEQ_GAIN_MIC2_20 +736 0x4848 //TX_PREEQ_GAIN_MIC2_21 +737 0x4848 //TX_PREEQ_GAIN_MIC2_22 +738 0x4848 //TX_PREEQ_GAIN_MIC2_23 +739 0x0202 //TX_PREEQ_BIN_MIC2_0 +740 0x0203 //TX_PREEQ_BIN_MIC2_1 +741 0x0303 //TX_PREEQ_BIN_MIC2_2 +742 0x0304 //TX_PREEQ_BIN_MIC2_3 +743 0x0405 //TX_PREEQ_BIN_MIC2_4 +744 0x0506 //TX_PREEQ_BIN_MIC2_5 +745 0x0708 //TX_PREEQ_BIN_MIC2_6 +746 0x090A //TX_PREEQ_BIN_MIC2_7 +747 0x0B0C //TX_PREEQ_BIN_MIC2_8 +748 0x0D0E //TX_PREEQ_BIN_MIC2_9 +749 0x0000 //TX_PREEQ_BIN_MIC2_10 +750 0x0000 //TX_PREEQ_BIN_MIC2_11 +751 0x0000 //TX_PREEQ_BIN_MIC2_12 +752 0x0000 //TX_PREEQ_BIN_MIC2_13 +753 0x0000 //TX_PREEQ_BIN_MIC2_14 +754 0x0000 //TX_PREEQ_BIN_MIC2_15 +755 0x0000 //TX_PREEQ_BIN_MIC2_16 +756 0x0000 //TX_PREEQ_BIN_MIC2_17 +757 0x0000 //TX_PREEQ_BIN_MIC2_18 +758 0x0000 //TX_PREEQ_BIN_MIC2_19 +759 0x0000 //TX_PREEQ_BIN_MIC2_20 +760 0x0000 //TX_PREEQ_BIN_MIC2_21 +761 0x0000 //TX_PREEQ_BIN_MIC2_22 +762 0x0000 //TX_PREEQ_BIN_MIC2_23 +763 0x0006 //TX_MASKING_ABILITY +764 0x0800 //TX_NND_WEIGHT +765 0x0065 //TX_MIC_CALIBRATION_0 +766 0x0065 //TX_MIC_CALIBRATION_1 +767 0x0065 //TX_MIC_CALIBRATION_2 +768 0x0065 //TX_MIC_CALIBRATION_3 +769 0x0044 //TX_MIC_PWR_BIAS_0 +770 0x0044 //TX_MIC_PWR_BIAS_1 +771 0x0044 //TX_MIC_PWR_BIAS_2 +772 0x0044 //TX_MIC_PWR_BIAS_3 +773 0x0009 //TX_GAIN_LIMIT_0 +774 0x000F //TX_GAIN_LIMIT_1 +775 0x000F //TX_GAIN_LIMIT_2 +776 0x000F //TX_GAIN_LIMIT_3 +777 0x7F5B //TX_BVE_NOVAD0_ALPHADOWN +778 0x7FDE //TX_BVE_VAD0_ALPHAUP +779 0x7F3A //TX_BVE_VAD0_ALPHADOWN +780 0x2000 //TX_BVE_GAINWEIGHT_NOFEVADLI +781 0x7F5B //TX_BVE_FEVADLI_ALPHA +782 0x7F19 //TX_BVE_NOVAD0_ALPHAUP +783 0x4000 //TX_TDDRC_ALPHA_UP_01 +784 0x4000 //TX_TDDRC_ALPHA_UP_02 +785 0x4000 //TX_TDDRC_ALPHA_UP_03 +786 0x4000 //TX_TDDRC_ALPHA_UP_04 +787 0x6000 //TX_TDDRC_ALPHA_DWN_01 +788 0x7EB8 //TX_TDDRC_ALPHA_DWN_02 +789 0x7EB8 //TX_TDDRC_ALPHA_DWN_03 +790 0x7EB8 //TX_TDDRC_ALPHA_DWN_04 +791 0x7FFF //TX_TDDRC_TD_DRC_LIMIT +792 0x0800 //TX_TDDRC_POST_LIMIT_GAIN +793 0x0000 //TX_TDDRC_RESRV_0 +794 0x0000 //TX_TDDRC_RESRV_1 +795 0x0018 //TX_FDDRC_BAND_MARGIN_0 +796 0x0030 //TX_FDDRC_BAND_MARGIN_1 +797 0x0050 //TX_FDDRC_BAND_MARGIN_2 +798 0x0080 //TX_FDDRC_BAND_MARGIN_3 +799 0x0007 //TX_FDDRC_BLOCK_EXP +800 0x5000 //TX_FDDRC_THRD_2_0 +801 0x5000 //TX_FDDRC_THRD_2_1 +802 0x5000 //TX_FDDRC_THRD_2_2 +803 0x5000 //TX_FDDRC_THRD_2_3 +804 0x6400 //TX_FDDRC_THRD_3_0 +805 0x6400 //TX_FDDRC_THRD_3_1 +806 0x6400 //TX_FDDRC_THRD_3_2 +807 0x6400 //TX_FDDRC_THRD_3_3 +808 0x2000 //TX_FDDRC_SLANT_0_0 +809 0x2000 //TX_FDDRC_SLANT_0_1 +810 0x2000 //TX_FDDRC_SLANT_0_2 +811 0x2000 //TX_FDDRC_SLANT_0_3 +812 0x5333 //TX_FDDRC_SLANT_1_0 +813 0x5333 //TX_FDDRC_SLANT_1_1 +814 0x5333 //TX_FDDRC_SLANT_1_2 +815 0x5333 //TX_FDDRC_SLANT_1_3 +816 0x0010 //TX_DEADMIC_SILENCE_TH +817 0x0600 //TX_MIC_DEGRADE_TH +818 0x0078 //TX_DEADMIC_CNT +819 0x0078 //TX_MIC_DEGRADE_CNT +820 0x0000 //TX_FDDRC_RESRV_4 +821 0x0000 //TX_FDDRC_RESRV_5 +822 0x0000 //TX_FDDRC_RESRV_6 +823 0x7FFF //TX_KS_NOISEPASTE_FACTOR +824 0x0001 //TX_KS_CONFIG +825 0x7FFF //TX_KS_GAIN_MIN +826 0x0000 //TX_KS_RESRV_0 +827 0x0000 //TX_KS_RESRV_1 +828 0x0000 //TX_KS_RESRV_2 +829 0x7C00 //TX_LAMBDA_PKA_FP +830 0x2000 //TX_TPKA_FP +831 0x0080 //TX_MIN_G_FP +832 0x2000 //TX_MAX_G_FP +833 0x4848 //TX_FFP_FP_K_METAL +834 0x4000 //TX_A_POST_FLT_FP +835 0x0F5C //TX_RTO_OUTBEAM_TH +836 0x4CCD //TX_TPKA_FP_THD +837 0x0000 //TX_MAX_G_FP_BLK +838 0x0000 //TX_FFP_FADEIN +839 0x0000 //TX_FFP_FADEOUT +840 0x0000 //TX_WHISPERCTH +841 0x0000 //TX_WHISPERHOLDT +842 0x0000 //TX_WHISP_ENTHH +843 0x0000 //TX_WHISP_ENTHL +844 0x0000 //TX_WHISP_RTOTH +845 0x0000 //TX_WHISP_RTOTH2 +846 0x0096 //TX_MUTE_PERIOD +847 0x0000 //TX_FADE_IN_PERIOD +848 0x0100 //TX_FFP_RESRV_2 +849 0x0020 //TX_FFP_RESRV_3 +850 0x0000 //TX_FFP_RESRV_4 +851 0x0000 //TX_FFP_RESRV_5 +852 0x0000 //TX_FFP_RESRV_6 +853 0x0002 //TX_FILTINDX +854 0x0004 //TX_TDDRC_THRD_0 +855 0x0010 //TX_TDDRC_THRD_1 +856 0x1800 //TX_TDDRC_THRD_2 +857 0x1800 //TX_TDDRC_THRD_3 +858 0x6000 //TX_TDDRC_SLANT_0 +859 0x6000 //TX_TDDRC_SLANT_1 +860 0x4000 //TX_TDDRC_ALPHA_UP_00 +861 0x6000 //TX_TDDRC_ALPHA_DWN_00 +862 0x0000 //TX_TDDRC_HMNC_FLAG +863 0x199A //TX_TDDRC_HMNC_GAIN +864 0x0000 //TX_TDDRC_SMT_FLAG +865 0x0CCD //TX_TDDRC_SMT_W +866 0x0BE3 //TX_TDDRC_DRC_GAIN +867 0x7FFF //TX_TDDRC_LMT_THRD +868 0x0000 //TX_TDDRC_LMT_ALPHA +869 0x0000 //TX_TFMASKLTH +870 0x0000 //TX_TFMASKLTHL +871 0x0CCD //TX_TFMASKHTH +872 0x0CCD //TX_TFMASKLTH_BINVAD +873 0xF333 //TX_TFMASKLTH_NS_EST +874 0x2CCD //TX_TFMASKLTH_DOA +875 0xECCD //TX_TFMASKTH_BLESSCUT +876 0x1000 //TX_B_LESSCUT_RTO_MASK +877 0x3800 //TX_SB_RHO_MEAN_TH_ABN +878 0x2000 //TX_B_POST_FLT_MASK +879 0x0000 //TX_B_POST_FLT_MASK1 +880 0x5333 //TX_GAIN_WIND_MASK +881 0x7FFF //TX_TFMASK_BFSTRICT_MUSIC +882 0x0000 //TX_TFMASK_BFSTRICT_NOMUSIC +883 0x7333 //TX_FASTNS_OUTIN_TH +884 0x0CCD //TX_FASTNS_TFMASK_TH +885 0x0CCD //TX_FASTNS_TFMASKBIN_TH1 +886 0x0CCD //TX_FASTNS_TFMASKBIN_TH2 +887 0x0CCD //TX_FASTNS_TFMASKBIN_TH3 +888 0x0028 //TX_FASTNS_ARSPC_TH +889 0xC000 //TX_FASTNS_MASK5_TH +890 0x4848 //TX_POSTSSA_MIN_G_VR_MASK +891 0x1000 //TX_A_LESSCUT_RTO_MASK +892 0x1770 //TX_FASTNS_NOISETH +893 0xC000 //TX_FASTNS_SSA_THLFL +894 0xC000 //TX_FASTNS_SSA_THHFL +895 0xCCCC //TX_FASTNS_SSA_THLFH +896 0xD999 //TX_FASTNS_SSA_THHFH +897 0x2339 //TX_SENDFUNC_REG_MICMUTE +898 0x0021 //TX_SENDFUNC_REG_MICMUTE1 +899 0x02BC //TX_MICMUTE_RATIO_THR +900 0x0140 //TX_MICMUTE_AMP_THR +901 0x0004 //TX_MICMUTE_HPF_IND +902 0x00C0 //TX_MICMUTE_LOG_EYR_TH +903 0x0008 //TX_MICMUTE_CVG_TIME +904 0x0008 //TX_MICMUTE_RELEASE_TIME +905 0x01FE //TX_MIC_VOLUME_MIC0MUTE +906 0x0020 //TX_MICMUTE_EPD_OFFSET_0 +907 0x001E //TX_MICMUTE_FRQ_AEC_L +908 0x7999 //TX_MICMUTE_EAD_THR +909 0x7FFF //TX_MICMUTE_LAMBDA_CB_NLE +910 0x7FFF //TX_MICMUTE_LAMBDA_RE_EST +911 0x4000 //TX_DTD_THR1_MICMUTE_0 +912 0x7000 //TX_DTD_THR1_MICMUTE_1 +913 0x7FFF //TX_DTD_THR1_MICMUTE_2 +914 0x7FFF //TX_DTD_THR1_MICMUTE_3 +915 0x6CCC //TX_DTD_THR2_MICMUTE_0 +916 0x0400 //TX_MICMUTE_MIN_EQ_RE_EST_0 +917 0x0400 //TX_MICMUTE_MIN_EQ_RE_EST_1 +918 0x1000 //TX_MICMUTE_MIN_EQ_RE_EST_2 +919 0x7FFF //TX_MICMUTE_MIN_EQ_RE_EST_3 +920 0x7FFF //TX_MICMUTE_MIN_EQ_RE_EST_4 +921 0x4000 //TX_MICMUTE_C_POST_FLT +922 0x03E8 //TX_MICMUTE_DT_CUT_K +923 0x0001 //TX_MICMUTE_DT_CUT_THR +924 0x03E8 //TX_MICMUTE_DT_CUT_K2 +925 0x0001 //TX_MICMUTE_DT_CUT_THR2 +926 0x0064 //TX_MICMUTE_DT2_HOLD_N +927 0x1000 //TX_MICMUTE_RATIODTH_THCUT +928 0x1000 //TX_MICMUTE_B_POST_FLT_ECHOL +929 0x7FFF //TX_MICMUTE_B_POST_FLT_ECHOH +930 0x0400 //TX_MICMUTE_C_POST_FLT_MASK +931 0x7999 //TX_MICMUTE_RATIODTL_CUT_TH +932 0x0258 //TX_MICMUTE_DT_CUT_K1 +933 0x0800 //TX_MICMUTE_N2_SN_EST +934 0xFC00 //TX_MICMUTE_THR_SN_EST_0 +935 0x001C //TX_MICMUTE_MIN_G_CTRL_0 +936 0x6000 //TX_MICMUTE_A_POST_FILT_S_0 +937 0x7000 //TX_MICMUTE_B_POST_FILT_0 +938 0x2710 //TX_MIC1RUB_AMP_THR +939 0x0010 //TX_MIC1MUTE_RATIO_THR +940 0x0450 //TX_MIC1MUTE_AMP_THR +941 0x0008 //TX_MIC1MUTE_CVG_TIME +942 0x0008 //TX_MIC1MUTE_RELEASE_TIME +943 0x0000 //TX_AMS_RESRV_01 +944 0x0000 //TX_AMS_RESRV_02 +945 0x0000 //TX_AMS_RESRV_03 +946 0x0000 //TX_AMS_RESRV_04 +947 0x0000 //TX_AMS_RESRV_05 +948 0x0000 //TX_AMS_RESRV_06 +949 0x0000 //TX_AMS_RESRV_07 +950 0x0000 //TX_AMS_RESRV_08 +951 0x0000 //TX_AMS_RESRV_09 +952 0x0000 //TX_AMS_RESRV_10 +953 0x0000 //TX_AMS_RESRV_11 +954 0x0000 //TX_AMS_RESRV_12 +955 0x0000 //TX_AMS_RESRV_13 +956 0x0000 //TX_AMS_RESRV_14 +957 0x0000 //TX_AMS_RESRV_15 +958 0x0000 //TX_AMS_RESRV_16 +959 0x0000 //TX_AMS_RESRV_17 +960 0x0000 //TX_AMS_RESRV_18 +961 0x0000 //TX_AMS_RESRV_19 +#RX +0 0x206C //RX_RECVFUNC_MODE_0 +1 0x0000 //RX_RECVFUNC_MODE_1 +2 0x0000 //RX_SAMPLINGFREQ_SIG +3 0x0000 //RX_SAMPLINGFREQ_PROC +4 0x000A //RX_FRAME_SZ +5 0x0000 //RX_DELAY_OPT +6 0x1000 //RX_TDDRC_ALPHA_UP_1 +7 0x1000 //RX_TDDRC_ALPHA_UP_2 +8 0x1000 //RX_TDDRC_ALPHA_UP_3 +9 0x1000 //RX_TDDRC_ALPHA_UP_4 +10 0x0800 //RX_PGA +11 0x7652 //RX_A_HP +12 0x4000 //RX_B_PE +13 0x7800 //RX_THR_PITCH_DET_0 +14 0x7000 //RX_THR_PITCH_DET_1 +15 0x6000 //RX_THR_PITCH_DET_2 +16 0x0008 //RX_PITCH_BFR_LEN +17 0x0003 //RX_SBD_PITCH_DET +18 0x0100 //RX_PP_RESRV_0 +19 0x0020 //RX_PP_RESRV_1 +20 0x0400 //RX_N_SN_EST +21 0x000C //RX_N2_SN_EST +22 0x0010 //RX_NS_LVL_CTRL +23 0xF800 //RX_THR_SN_EST +24 0x7E00 //RX_LAMBDA_PFILT +25 0x000A //RX_FENS_RESRV_0 +26 0x0190 //RX_FENS_RESRV_1 +27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +28 0x4000 //RX_TDDRC_ALPHA_DWN_2 +29 0x4000 //RX_TDDRC_ALPHA_DWN_3 +30 0x0002 //RX_EXTRA_NS_L +31 0x0800 //RX_EXTRA_NS_A +32 0x4000 //RX_TDDRC_ALPHA_DWN_4 +33 0x7214 //RX_TDDRC_LIMITER_THRD +34 0x0800 //RX_TDDRC_LIMITER_GAIN +35 0x199A //RX_A_POST_FLT +36 0x0000 //RX_LMT_THRD +37 0x4000 //RX_LMT_ALPHA +38 0x0014 //RX_FDEQ_SUBNUM +39 0x4E4C //RX_FDEQ_GAIN_0 +40 0x4848 //RX_FDEQ_GAIN_1 +41 0x4B4C //RX_FDEQ_GAIN_2 +42 0x4C50 //RX_FDEQ_GAIN_3 +43 0x504F //RX_FDEQ_GAIN_4 +44 0x4841 //RX_FDEQ_GAIN_5 +45 0x3331 //RX_FDEQ_GAIN_6 +46 0x3133 //RX_FDEQ_GAIN_7 +47 0x3043 //RX_FDEQ_GAIN_8 +48 0x4E4E //RX_FDEQ_GAIN_9 +49 0x4848 //RX_FDEQ_GAIN_10 +50 0x4848 //RX_FDEQ_GAIN_11 +51 0x4848 //RX_FDEQ_GAIN_12 +52 0x4848 //RX_FDEQ_GAIN_13 +53 0x4848 //RX_FDEQ_GAIN_14 +54 0x4848 //RX_FDEQ_GAIN_15 +55 0x4848 //RX_FDEQ_GAIN_16 +56 0x4848 //RX_FDEQ_GAIN_17 +57 0x4848 //RX_FDEQ_GAIN_18 +58 0x4848 //RX_FDEQ_GAIN_19 +59 0x4848 //RX_FDEQ_GAIN_20 +60 0x4848 //RX_FDEQ_GAIN_21 +61 0x4848 //RX_FDEQ_GAIN_22 +62 0x4848 //RX_FDEQ_GAIN_23 +63 0x0202 //RX_FDEQ_BIN_0 +64 0x0203 //RX_FDEQ_BIN_1 +65 0x0303 //RX_FDEQ_BIN_2 +66 0x0304 //RX_FDEQ_BIN_3 +67 0x0405 //RX_FDEQ_BIN_4 +68 0x0506 //RX_FDEQ_BIN_5 +69 0x0708 //RX_FDEQ_BIN_6 +70 0x090A //RX_FDEQ_BIN_7 +71 0x0B0C //RX_FDEQ_BIN_8 +72 0x0D08 //RX_FDEQ_BIN_9 +73 0x0000 //RX_FDEQ_BIN_10 +74 0x0000 //RX_FDEQ_BIN_11 +75 0x0000 //RX_FDEQ_BIN_12 +76 0x0000 //RX_FDEQ_BIN_13 +77 0x0000 //RX_FDEQ_BIN_14 +78 0x0000 //RX_FDEQ_BIN_15 +79 0x0000 //RX_FDEQ_BIN_16 +80 0x0000 //RX_FDEQ_BIN_17 +81 0x0000 //RX_FDEQ_BIN_18 +82 0x0000 //RX_FDEQ_BIN_19 +83 0x0000 //RX_FDEQ_BIN_20 +84 0x0000 //RX_FDEQ_BIN_21 +85 0x0000 //RX_FDEQ_BIN_22 +86 0x0000 //RX_FDEQ_BIN_23 +87 0x4000 //RX_FDEQ_RESRV_0 +88 0x0320 //RX_FDEQ_RESRV_1 +89 0x0018 //RX_FDDRC_BAND_MARGIN_0 +90 0x0035 //RX_FDDRC_BAND_MARGIN_1 +91 0x0060 //RX_FDDRC_BAND_MARGIN_2 +92 0x0080 //RX_FDDRC_BAND_MARGIN_3 +93 0x0004 //RX_FDDRC_BLOCK_EXP +94 0x0600 //RX_FDDRC_THRD_2_0 +95 0x0600 //RX_FDDRC_THRD_2_1 +96 0x0600 //RX_FDDRC_THRD_2_2 +97 0x0600 //RX_FDDRC_THRD_2_3 +98 0x0800 //RX_FDDRC_THRD_3_0 +99 0x0800 //RX_FDDRC_THRD_3_1 +100 0x0800 //RX_FDDRC_THRD_3_2 +101 0x0800 //RX_FDDRC_THRD_3_3 +102 0x0000 //RX_FDDRC_SLANT_0_0 +103 0x0000 //RX_FDDRC_SLANT_0_1 +104 0x0000 //RX_FDDRC_SLANT_0_2 +105 0x0000 //RX_FDDRC_SLANT_0_3 +106 0x7FFF //RX_FDDRC_SLANT_1_0 +107 0x7FFF //RX_FDDRC_SLANT_1_1 +108 0x7FFF //RX_FDDRC_SLANT_1_2 +109 0x7FFF //RX_FDDRC_SLANT_1_3 +110 0x0000 //RX_FDDRC_RESRV_0 +111 0x0005 //RX_FILTINDX +112 0x0002 //RX_TDDRC_THRD_0 +113 0x0004 //RX_TDDRC_THRD_1 +114 0x1A00 //RX_TDDRC_THRD_2 +115 0x1A00 //RX_TDDRC_THRD_3 +116 0x7FFF //RX_TDDRC_SLANT_0 +117 0x7FFF //RX_TDDRC_SLANT_1 +118 0x1000 //RX_TDDRC_ALPHA_UP_0 +119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +120 0x0000 //RX_TDDRC_HMNC_FLAG +121 0x199A //RX_TDDRC_HMNC_GAIN +122 0x0001 //RX_TDDRC_SMT_FLAG +123 0x0CCD //RX_TDDRC_SMT_W +124 0x038D //RX_TDDRC_DRC_GAIN +125 0x7C00 //RX_LAMBDA_PKA_FP +126 0x2000 //RX_TPKA_FP +127 0x2000 //RX_MIN_G_FP +128 0x0080 //RX_MAX_G_FP +129 0x0100 //RX_SPK_VOL +130 0x0000 //RX_VOL_RESRV_0 +131 0x0000 //RX_MAXLEVEL_CNG +132 0x3000 //RX_BWE_UV_TH +133 0x3000 //RX_BWE_UV_TH2 +134 0x1800 //RX_BWE_UV_TH3 +135 0x1000 //RX_BWE_V_TH +136 0x04CD //RX_BWE_GAIN1_V_TH1 +137 0x0F33 //RX_BWE_GAIN1_V_TH2 +138 0x7333 //RX_BWE_UV_EQ +139 0x199A //RX_BWE_V_EQ +140 0x7333 //RX_BWE_TONE_TH +141 0x0004 //RX_BWE_UV_HOLD_T +142 0x6CCD //RX_BWE_GAIN2_ALPHA +143 0x799A //RX_BWE_GAIN3_ALPHA +144 0x001E //RX_BWE_CUTOFF +145 0x3000 //RX_BWE_GAINFILL +146 0x3200 //RX_BWE_MAXTH_TONE +147 0x2000 //RX_BWE_EQ_0 +148 0x2000 //RX_BWE_EQ_1 +149 0x2000 //RX_BWE_EQ_2 +150 0x2000 //RX_BWE_EQ_3 +151 0x2000 //RX_BWE_EQ_4 +152 0x2000 //RX_BWE_EQ_5 +153 0x2000 //RX_BWE_EQ_6 +154 0x0000 //RX_BWE_RESRV_0 +155 0x0000 //RX_BWE_RESRV_1 +156 0x0000 //RX_BWE_RESRV_2 +#VOL 0 +6 0x1000 //RX_TDDRC_ALPHA_UP_1 +7 0x1000 //RX_TDDRC_ALPHA_UP_2 +8 0x1000 //RX_TDDRC_ALPHA_UP_3 +9 0x1000 //RX_TDDRC_ALPHA_UP_4 +27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +28 0x4000 //RX_TDDRC_ALPHA_DWN_2 +29 0x4000 //RX_TDDRC_ALPHA_DWN_3 +32 0x4000 //RX_TDDRC_ALPHA_DWN_4 +33 0x7214 //RX_TDDRC_LIMITER_THRD +34 0x0800 //RX_TDDRC_LIMITER_GAIN +112 0x0002 //RX_TDDRC_THRD_0 +113 0x0004 //RX_TDDRC_THRD_1 +114 0x1A00 //RX_TDDRC_THRD_2 +115 0x1A00 //RX_TDDRC_THRD_3 +116 0x7FFF //RX_TDDRC_SLANT_0 +117 0x7FFF //RX_TDDRC_SLANT_1 +118 0x1000 //RX_TDDRC_ALPHA_UP_0 +119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +120 0x0000 //RX_TDDRC_HMNC_FLAG +121 0x199A //RX_TDDRC_HMNC_GAIN +122 0x0001 //RX_TDDRC_SMT_FLAG +123 0x0CCD //RX_TDDRC_SMT_W +124 0x038D //RX_TDDRC_DRC_GAIN +38 0x0014 //RX_FDEQ_SUBNUM +39 0x5646 //RX_FDEQ_GAIN_0 +40 0x3F3F //RX_FDEQ_GAIN_1 +41 0x454F //RX_FDEQ_GAIN_2 +42 0x515C //RX_FDEQ_GAIN_3 +43 0x635A //RX_FDEQ_GAIN_4 +44 0x4E4B //RX_FDEQ_GAIN_5 +45 0x4B4B //RX_FDEQ_GAIN_6 +46 0x4744 //RX_FDEQ_GAIN_7 +47 0x3F3D //RX_FDEQ_GAIN_8 +48 0x4E57 //RX_FDEQ_GAIN_9 +49 0x4848 //RX_FDEQ_GAIN_10 +50 0x4848 //RX_FDEQ_GAIN_11 +51 0x4848 //RX_FDEQ_GAIN_12 +52 0x4848 //RX_FDEQ_GAIN_13 +53 0x4848 //RX_FDEQ_GAIN_14 +54 0x4848 //RX_FDEQ_GAIN_15 +55 0x4848 //RX_FDEQ_GAIN_16 +56 0x4848 //RX_FDEQ_GAIN_17 +57 0x4848 //RX_FDEQ_GAIN_18 +58 0x4848 //RX_FDEQ_GAIN_19 +59 0x4848 //RX_FDEQ_GAIN_20 +60 0x4848 //RX_FDEQ_GAIN_21 +61 0x4848 //RX_FDEQ_GAIN_22 +62 0x4848 //RX_FDEQ_GAIN_23 +63 0x0202 //RX_FDEQ_BIN_0 +64 0x0203 //RX_FDEQ_BIN_1 +65 0x0303 //RX_FDEQ_BIN_2 +66 0x0304 //RX_FDEQ_BIN_3 +67 0x0405 //RX_FDEQ_BIN_4 +68 0x0506 //RX_FDEQ_BIN_5 +69 0x0708 //RX_FDEQ_BIN_6 +70 0x090A //RX_FDEQ_BIN_7 +71 0x0B0C //RX_FDEQ_BIN_8 +72 0x0D08 //RX_FDEQ_BIN_9 +73 0x0000 //RX_FDEQ_BIN_10 +74 0x0000 //RX_FDEQ_BIN_11 +75 0x0000 //RX_FDEQ_BIN_12 +76 0x0000 //RX_FDEQ_BIN_13 +77 0x0000 //RX_FDEQ_BIN_14 +78 0x0000 //RX_FDEQ_BIN_15 +79 0x0000 //RX_FDEQ_BIN_16 +80 0x0000 //RX_FDEQ_BIN_17 +81 0x0000 //RX_FDEQ_BIN_18 +82 0x0000 //RX_FDEQ_BIN_19 +83 0x0000 //RX_FDEQ_BIN_20 +84 0x0000 //RX_FDEQ_BIN_21 +85 0x0000 //RX_FDEQ_BIN_22 +86 0x0000 //RX_FDEQ_BIN_23 +87 0x4000 //RX_FDEQ_RESRV_0 +88 0x0320 //RX_FDEQ_RESRV_1 +89 0x0018 //RX_FDDRC_BAND_MARGIN_0 +90 0x0035 //RX_FDDRC_BAND_MARGIN_1 +91 0x0060 //RX_FDDRC_BAND_MARGIN_2 +92 0x0080 //RX_FDDRC_BAND_MARGIN_3 +93 0x0004 //RX_FDDRC_BLOCK_EXP +94 0x0600 //RX_FDDRC_THRD_2_0 +95 0x0600 //RX_FDDRC_THRD_2_1 +96 0x0600 //RX_FDDRC_THRD_2_2 +97 0x0600 //RX_FDDRC_THRD_2_3 +98 0x0800 //RX_FDDRC_THRD_3_0 +99 0x0800 //RX_FDDRC_THRD_3_1 +100 0x0800 //RX_FDDRC_THRD_3_2 +101 0x0800 //RX_FDDRC_THRD_3_3 +102 0x0000 //RX_FDDRC_SLANT_0_0 +103 0x0000 //RX_FDDRC_SLANT_0_1 +104 0x0000 //RX_FDDRC_SLANT_0_2 +105 0x0000 //RX_FDDRC_SLANT_0_3 +106 0x7FFF //RX_FDDRC_SLANT_1_0 +107 0x7FFF //RX_FDDRC_SLANT_1_1 +108 0x7FFF //RX_FDDRC_SLANT_1_2 +109 0x7FFF //RX_FDDRC_SLANT_1_3 +110 0x0000 //RX_FDDRC_RESRV_0 +129 0x0016 //RX_SPK_VOL +130 0x0000 //RX_VOL_RESRV_0 +#VOL 1 +6 0x1000 //RX_TDDRC_ALPHA_UP_1 +7 0x1000 //RX_TDDRC_ALPHA_UP_2 +8 0x1000 //RX_TDDRC_ALPHA_UP_3 +9 0x1000 //RX_TDDRC_ALPHA_UP_4 +27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +28 0x4000 //RX_TDDRC_ALPHA_DWN_2 +29 0x4000 //RX_TDDRC_ALPHA_DWN_3 +32 0x4000 //RX_TDDRC_ALPHA_DWN_4 +33 0x7214 //RX_TDDRC_LIMITER_THRD +34 0x0800 //RX_TDDRC_LIMITER_GAIN +112 0x0002 //RX_TDDRC_THRD_0 +113 0x0004 //RX_TDDRC_THRD_1 +114 0x1A00 //RX_TDDRC_THRD_2 +115 0x1A00 //RX_TDDRC_THRD_3 +116 0x7FFF //RX_TDDRC_SLANT_0 +117 0x7FFF //RX_TDDRC_SLANT_1 +118 0x1000 //RX_TDDRC_ALPHA_UP_0 +119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +120 0x0000 //RX_TDDRC_HMNC_FLAG +121 0x199A //RX_TDDRC_HMNC_GAIN +122 0x0001 //RX_TDDRC_SMT_FLAG +123 0x0CCD //RX_TDDRC_SMT_W +124 0x038D //RX_TDDRC_DRC_GAIN +38 0x0014 //RX_FDEQ_SUBNUM +39 0x5646 //RX_FDEQ_GAIN_0 +40 0x3F3F //RX_FDEQ_GAIN_1 +41 0x454F //RX_FDEQ_GAIN_2 +42 0x515C //RX_FDEQ_GAIN_3 +43 0x635A //RX_FDEQ_GAIN_4 +44 0x4E4B //RX_FDEQ_GAIN_5 +45 0x4B4B //RX_FDEQ_GAIN_6 +46 0x4744 //RX_FDEQ_GAIN_7 +47 0x3F3D //RX_FDEQ_GAIN_8 +48 0x4E57 //RX_FDEQ_GAIN_9 +49 0x4848 //RX_FDEQ_GAIN_10 +50 0x4848 //RX_FDEQ_GAIN_11 +51 0x4848 //RX_FDEQ_GAIN_12 +52 0x4848 //RX_FDEQ_GAIN_13 +53 0x4848 //RX_FDEQ_GAIN_14 +54 0x4848 //RX_FDEQ_GAIN_15 +55 0x4848 //RX_FDEQ_GAIN_16 +56 0x4848 //RX_FDEQ_GAIN_17 +57 0x4848 //RX_FDEQ_GAIN_18 +58 0x4848 //RX_FDEQ_GAIN_19 +59 0x4848 //RX_FDEQ_GAIN_20 +60 0x4848 //RX_FDEQ_GAIN_21 +61 0x4848 //RX_FDEQ_GAIN_22 +62 0x4848 //RX_FDEQ_GAIN_23 +63 0x0202 //RX_FDEQ_BIN_0 +64 0x0203 //RX_FDEQ_BIN_1 +65 0x0303 //RX_FDEQ_BIN_2 +66 0x0304 //RX_FDEQ_BIN_3 +67 0x0405 //RX_FDEQ_BIN_4 +68 0x0506 //RX_FDEQ_BIN_5 +69 0x0708 //RX_FDEQ_BIN_6 +70 0x090A //RX_FDEQ_BIN_7 +71 0x0B0C //RX_FDEQ_BIN_8 +72 0x0D08 //RX_FDEQ_BIN_9 +73 0x0000 //RX_FDEQ_BIN_10 +74 0x0000 //RX_FDEQ_BIN_11 +75 0x0000 //RX_FDEQ_BIN_12 +76 0x0000 //RX_FDEQ_BIN_13 +77 0x0000 //RX_FDEQ_BIN_14 +78 0x0000 //RX_FDEQ_BIN_15 +79 0x0000 //RX_FDEQ_BIN_16 +80 0x0000 //RX_FDEQ_BIN_17 +81 0x0000 //RX_FDEQ_BIN_18 +82 0x0000 //RX_FDEQ_BIN_19 +83 0x0000 //RX_FDEQ_BIN_20 +84 0x0000 //RX_FDEQ_BIN_21 +85 0x0000 //RX_FDEQ_BIN_22 +86 0x0000 //RX_FDEQ_BIN_23 +87 0x4000 //RX_FDEQ_RESRV_0 +88 0x0320 //RX_FDEQ_RESRV_1 +89 0x0018 //RX_FDDRC_BAND_MARGIN_0 +90 0x0035 //RX_FDDRC_BAND_MARGIN_1 +91 0x0060 //RX_FDDRC_BAND_MARGIN_2 +92 0x0080 //RX_FDDRC_BAND_MARGIN_3 +93 0x0004 //RX_FDDRC_BLOCK_EXP +94 0x0600 //RX_FDDRC_THRD_2_0 +95 0x0600 //RX_FDDRC_THRD_2_1 +96 0x0600 //RX_FDDRC_THRD_2_2 +97 0x0600 //RX_FDDRC_THRD_2_3 +98 0x0800 //RX_FDDRC_THRD_3_0 +99 0x0800 //RX_FDDRC_THRD_3_1 +100 0x0800 //RX_FDDRC_THRD_3_2 +101 0x0800 //RX_FDDRC_THRD_3_3 +102 0x0000 //RX_FDDRC_SLANT_0_0 +103 0x0000 //RX_FDDRC_SLANT_0_1 +104 0x0000 //RX_FDDRC_SLANT_0_2 +105 0x0000 //RX_FDDRC_SLANT_0_3 +106 0x7FFF //RX_FDDRC_SLANT_1_0 +107 0x7FFF //RX_FDDRC_SLANT_1_1 +108 0x7FFF //RX_FDDRC_SLANT_1_2 +109 0x7FFF //RX_FDDRC_SLANT_1_3 +110 0x0000 //RX_FDDRC_RESRV_0 +129 0x0020 //RX_SPK_VOL +130 0x0000 //RX_VOL_RESRV_0 +#VOL 2 +6 0x1000 //RX_TDDRC_ALPHA_UP_1 +7 0x1000 //RX_TDDRC_ALPHA_UP_2 +8 0x1000 //RX_TDDRC_ALPHA_UP_3 +9 0x1000 //RX_TDDRC_ALPHA_UP_4 +27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +28 0x4000 //RX_TDDRC_ALPHA_DWN_2 +29 0x4000 //RX_TDDRC_ALPHA_DWN_3 +32 0x4000 //RX_TDDRC_ALPHA_DWN_4 +33 0x7214 //RX_TDDRC_LIMITER_THRD +34 0x0800 //RX_TDDRC_LIMITER_GAIN +112 0x0002 //RX_TDDRC_THRD_0 +113 0x0004 //RX_TDDRC_THRD_1 +114 0x1A00 //RX_TDDRC_THRD_2 +115 0x1A00 //RX_TDDRC_THRD_3 +116 0x7FFF //RX_TDDRC_SLANT_0 +117 0x7FFF //RX_TDDRC_SLANT_1 +118 0x1000 //RX_TDDRC_ALPHA_UP_0 +119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +120 0x0000 //RX_TDDRC_HMNC_FLAG +121 0x199A //RX_TDDRC_HMNC_GAIN +122 0x0001 //RX_TDDRC_SMT_FLAG +123 0x0CCD //RX_TDDRC_SMT_W +124 0x038D //RX_TDDRC_DRC_GAIN +38 0x0014 //RX_FDEQ_SUBNUM +39 0x5646 //RX_FDEQ_GAIN_0 +40 0x3F3F //RX_FDEQ_GAIN_1 +41 0x454F //RX_FDEQ_GAIN_2 +42 0x515C //RX_FDEQ_GAIN_3 +43 0x635A //RX_FDEQ_GAIN_4 +44 0x4E4B //RX_FDEQ_GAIN_5 +45 0x4B4B //RX_FDEQ_GAIN_6 +46 0x4744 //RX_FDEQ_GAIN_7 +47 0x3F3D //RX_FDEQ_GAIN_8 +48 0x4E57 //RX_FDEQ_GAIN_9 +49 0x4848 //RX_FDEQ_GAIN_10 +50 0x4848 //RX_FDEQ_GAIN_11 +51 0x4848 //RX_FDEQ_GAIN_12 +52 0x4848 //RX_FDEQ_GAIN_13 +53 0x4848 //RX_FDEQ_GAIN_14 +54 0x4848 //RX_FDEQ_GAIN_15 +55 0x4848 //RX_FDEQ_GAIN_16 +56 0x4848 //RX_FDEQ_GAIN_17 +57 0x4848 //RX_FDEQ_GAIN_18 +58 0x4848 //RX_FDEQ_GAIN_19 +59 0x4848 //RX_FDEQ_GAIN_20 +60 0x4848 //RX_FDEQ_GAIN_21 +61 0x4848 //RX_FDEQ_GAIN_22 +62 0x4848 //RX_FDEQ_GAIN_23 +63 0x0202 //RX_FDEQ_BIN_0 +64 0x0203 //RX_FDEQ_BIN_1 +65 0x0303 //RX_FDEQ_BIN_2 +66 0x0304 //RX_FDEQ_BIN_3 +67 0x0405 //RX_FDEQ_BIN_4 +68 0x0506 //RX_FDEQ_BIN_5 +69 0x0708 //RX_FDEQ_BIN_6 +70 0x090A //RX_FDEQ_BIN_7 +71 0x0B0C //RX_FDEQ_BIN_8 +72 0x0D08 //RX_FDEQ_BIN_9 +73 0x0000 //RX_FDEQ_BIN_10 +74 0x0000 //RX_FDEQ_BIN_11 +75 0x0000 //RX_FDEQ_BIN_12 +76 0x0000 //RX_FDEQ_BIN_13 +77 0x0000 //RX_FDEQ_BIN_14 +78 0x0000 //RX_FDEQ_BIN_15 +79 0x0000 //RX_FDEQ_BIN_16 +80 0x0000 //RX_FDEQ_BIN_17 +81 0x0000 //RX_FDEQ_BIN_18 +82 0x0000 //RX_FDEQ_BIN_19 +83 0x0000 //RX_FDEQ_BIN_20 +84 0x0000 //RX_FDEQ_BIN_21 +85 0x0000 //RX_FDEQ_BIN_22 +86 0x0000 //RX_FDEQ_BIN_23 +87 0x4000 //RX_FDEQ_RESRV_0 +88 0x0320 //RX_FDEQ_RESRV_1 +89 0x0018 //RX_FDDRC_BAND_MARGIN_0 +90 0x0035 //RX_FDDRC_BAND_MARGIN_1 +91 0x0060 //RX_FDDRC_BAND_MARGIN_2 +92 0x0080 //RX_FDDRC_BAND_MARGIN_3 +93 0x0004 //RX_FDDRC_BLOCK_EXP +94 0x0600 //RX_FDDRC_THRD_2_0 +95 0x0600 //RX_FDDRC_THRD_2_1 +96 0x0600 //RX_FDDRC_THRD_2_2 +97 0x0600 //RX_FDDRC_THRD_2_3 +98 0x0800 //RX_FDDRC_THRD_3_0 +99 0x0800 //RX_FDDRC_THRD_3_1 +100 0x0800 //RX_FDDRC_THRD_3_2 +101 0x0800 //RX_FDDRC_THRD_3_3 +102 0x0000 //RX_FDDRC_SLANT_0_0 +103 0x0000 //RX_FDDRC_SLANT_0_1 +104 0x0000 //RX_FDDRC_SLANT_0_2 +105 0x0000 //RX_FDDRC_SLANT_0_3 +106 0x7FFF //RX_FDDRC_SLANT_1_0 +107 0x7FFF //RX_FDDRC_SLANT_1_1 +108 0x7FFF //RX_FDDRC_SLANT_1_2 +109 0x7FFF //RX_FDDRC_SLANT_1_3 +110 0x0000 //RX_FDDRC_RESRV_0 +129 0x002E //RX_SPK_VOL +130 0x0000 //RX_VOL_RESRV_0 +#VOL 3 +6 0x1000 //RX_TDDRC_ALPHA_UP_1 +7 0x1000 //RX_TDDRC_ALPHA_UP_2 +8 0x1000 //RX_TDDRC_ALPHA_UP_3 +9 0x1000 //RX_TDDRC_ALPHA_UP_4 +27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +28 0x4000 //RX_TDDRC_ALPHA_DWN_2 +29 0x4000 //RX_TDDRC_ALPHA_DWN_3 +32 0x4000 //RX_TDDRC_ALPHA_DWN_4 +33 0x7214 //RX_TDDRC_LIMITER_THRD +34 0x0800 //RX_TDDRC_LIMITER_GAIN +112 0x0002 //RX_TDDRC_THRD_0 +113 0x0004 //RX_TDDRC_THRD_1 +114 0x1A00 //RX_TDDRC_THRD_2 +115 0x1A00 //RX_TDDRC_THRD_3 +116 0x7FFF //RX_TDDRC_SLANT_0 +117 0x7FFF //RX_TDDRC_SLANT_1 +118 0x1000 //RX_TDDRC_ALPHA_UP_0 +119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +120 0x0000 //RX_TDDRC_HMNC_FLAG +121 0x199A //RX_TDDRC_HMNC_GAIN +122 0x0001 //RX_TDDRC_SMT_FLAG +123 0x0CCD //RX_TDDRC_SMT_W +124 0x038D //RX_TDDRC_DRC_GAIN +38 0x0014 //RX_FDEQ_SUBNUM +39 0x5646 //RX_FDEQ_GAIN_0 +40 0x3F3F //RX_FDEQ_GAIN_1 +41 0x454F //RX_FDEQ_GAIN_2 +42 0x515C //RX_FDEQ_GAIN_3 +43 0x635A //RX_FDEQ_GAIN_4 +44 0x4E4B //RX_FDEQ_GAIN_5 +45 0x4B4B //RX_FDEQ_GAIN_6 +46 0x4744 //RX_FDEQ_GAIN_7 +47 0x3F3D //RX_FDEQ_GAIN_8 +48 0x4E57 //RX_FDEQ_GAIN_9 +49 0x4848 //RX_FDEQ_GAIN_10 +50 0x4848 //RX_FDEQ_GAIN_11 +51 0x4848 //RX_FDEQ_GAIN_12 +52 0x4848 //RX_FDEQ_GAIN_13 +53 0x4848 //RX_FDEQ_GAIN_14 +54 0x4848 //RX_FDEQ_GAIN_15 +55 0x4848 //RX_FDEQ_GAIN_16 +56 0x4848 //RX_FDEQ_GAIN_17 +57 0x4848 //RX_FDEQ_GAIN_18 +58 0x4848 //RX_FDEQ_GAIN_19 +59 0x4848 //RX_FDEQ_GAIN_20 +60 0x4848 //RX_FDEQ_GAIN_21 +61 0x4848 //RX_FDEQ_GAIN_22 +62 0x4848 //RX_FDEQ_GAIN_23 +63 0x0202 //RX_FDEQ_BIN_0 +64 0x0203 //RX_FDEQ_BIN_1 +65 0x0303 //RX_FDEQ_BIN_2 +66 0x0304 //RX_FDEQ_BIN_3 +67 0x0405 //RX_FDEQ_BIN_4 +68 0x0506 //RX_FDEQ_BIN_5 +69 0x0708 //RX_FDEQ_BIN_6 +70 0x090A //RX_FDEQ_BIN_7 +71 0x0B0C //RX_FDEQ_BIN_8 +72 0x0D08 //RX_FDEQ_BIN_9 +73 0x0000 //RX_FDEQ_BIN_10 +74 0x0000 //RX_FDEQ_BIN_11 +75 0x0000 //RX_FDEQ_BIN_12 +76 0x0000 //RX_FDEQ_BIN_13 +77 0x0000 //RX_FDEQ_BIN_14 +78 0x0000 //RX_FDEQ_BIN_15 +79 0x0000 //RX_FDEQ_BIN_16 +80 0x0000 //RX_FDEQ_BIN_17 +81 0x0000 //RX_FDEQ_BIN_18 +82 0x0000 //RX_FDEQ_BIN_19 +83 0x0000 //RX_FDEQ_BIN_20 +84 0x0000 //RX_FDEQ_BIN_21 +85 0x0000 //RX_FDEQ_BIN_22 +86 0x0000 //RX_FDEQ_BIN_23 +87 0x4000 //RX_FDEQ_RESRV_0 +88 0x0320 //RX_FDEQ_RESRV_1 +89 0x0018 //RX_FDDRC_BAND_MARGIN_0 +90 0x0035 //RX_FDDRC_BAND_MARGIN_1 +91 0x0060 //RX_FDDRC_BAND_MARGIN_2 +92 0x0080 //RX_FDDRC_BAND_MARGIN_3 +93 0x0004 //RX_FDDRC_BLOCK_EXP +94 0x0600 //RX_FDDRC_THRD_2_0 +95 0x0600 //RX_FDDRC_THRD_2_1 +96 0x0600 //RX_FDDRC_THRD_2_2 +97 0x0600 //RX_FDDRC_THRD_2_3 +98 0x0800 //RX_FDDRC_THRD_3_0 +99 0x0800 //RX_FDDRC_THRD_3_1 +100 0x0800 //RX_FDDRC_THRD_3_2 +101 0x0800 //RX_FDDRC_THRD_3_3 +102 0x0000 //RX_FDDRC_SLANT_0_0 +103 0x0000 //RX_FDDRC_SLANT_0_1 +104 0x0000 //RX_FDDRC_SLANT_0_2 +105 0x0000 //RX_FDDRC_SLANT_0_3 +106 0x7FFF //RX_FDDRC_SLANT_1_0 +107 0x7FFF //RX_FDDRC_SLANT_1_1 +108 0x7FFF //RX_FDDRC_SLANT_1_2 +109 0x7FFF //RX_FDDRC_SLANT_1_3 +110 0x0000 //RX_FDDRC_RESRV_0 +129 0x0041 //RX_SPK_VOL +130 0x0000 //RX_VOL_RESRV_0 +#VOL 4 +6 0x1000 //RX_TDDRC_ALPHA_UP_1 +7 0x1000 //RX_TDDRC_ALPHA_UP_2 +8 0x1000 //RX_TDDRC_ALPHA_UP_3 +9 0x1000 //RX_TDDRC_ALPHA_UP_4 +27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +28 0x4000 //RX_TDDRC_ALPHA_DWN_2 +29 0x4000 //RX_TDDRC_ALPHA_DWN_3 +32 0x4000 //RX_TDDRC_ALPHA_DWN_4 +33 0x7214 //RX_TDDRC_LIMITER_THRD +34 0x0800 //RX_TDDRC_LIMITER_GAIN +112 0x0002 //RX_TDDRC_THRD_0 +113 0x0004 //RX_TDDRC_THRD_1 +114 0x1A00 //RX_TDDRC_THRD_2 +115 0x1A00 //RX_TDDRC_THRD_3 +116 0x7FFF //RX_TDDRC_SLANT_0 +117 0x7FFF //RX_TDDRC_SLANT_1 +118 0x1000 //RX_TDDRC_ALPHA_UP_0 +119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +120 0x0000 //RX_TDDRC_HMNC_FLAG +121 0x199A //RX_TDDRC_HMNC_GAIN +122 0x0001 //RX_TDDRC_SMT_FLAG +123 0x0CCD //RX_TDDRC_SMT_W +124 0x038D //RX_TDDRC_DRC_GAIN +38 0x0014 //RX_FDEQ_SUBNUM +39 0x5646 //RX_FDEQ_GAIN_0 +40 0x3F3F //RX_FDEQ_GAIN_1 +41 0x454F //RX_FDEQ_GAIN_2 +42 0x515C //RX_FDEQ_GAIN_3 +43 0x635A //RX_FDEQ_GAIN_4 +44 0x4E4B //RX_FDEQ_GAIN_5 +45 0x4B4B //RX_FDEQ_GAIN_6 +46 0x4744 //RX_FDEQ_GAIN_7 +47 0x3F3D //RX_FDEQ_GAIN_8 +48 0x4E57 //RX_FDEQ_GAIN_9 +49 0x4848 //RX_FDEQ_GAIN_10 +50 0x4848 //RX_FDEQ_GAIN_11 +51 0x4848 //RX_FDEQ_GAIN_12 +52 0x4848 //RX_FDEQ_GAIN_13 +53 0x4848 //RX_FDEQ_GAIN_14 +54 0x4848 //RX_FDEQ_GAIN_15 +55 0x4848 //RX_FDEQ_GAIN_16 +56 0x4848 //RX_FDEQ_GAIN_17 +57 0x4848 //RX_FDEQ_GAIN_18 +58 0x4848 //RX_FDEQ_GAIN_19 +59 0x4848 //RX_FDEQ_GAIN_20 +60 0x4848 //RX_FDEQ_GAIN_21 +61 0x4848 //RX_FDEQ_GAIN_22 +62 0x4848 //RX_FDEQ_GAIN_23 +63 0x0202 //RX_FDEQ_BIN_0 +64 0x0203 //RX_FDEQ_BIN_1 +65 0x0303 //RX_FDEQ_BIN_2 +66 0x0304 //RX_FDEQ_BIN_3 +67 0x0405 //RX_FDEQ_BIN_4 +68 0x0506 //RX_FDEQ_BIN_5 +69 0x0708 //RX_FDEQ_BIN_6 +70 0x090A //RX_FDEQ_BIN_7 +71 0x0B0C //RX_FDEQ_BIN_8 +72 0x0D08 //RX_FDEQ_BIN_9 +73 0x0000 //RX_FDEQ_BIN_10 +74 0x0000 //RX_FDEQ_BIN_11 +75 0x0000 //RX_FDEQ_BIN_12 +76 0x0000 //RX_FDEQ_BIN_13 +77 0x0000 //RX_FDEQ_BIN_14 +78 0x0000 //RX_FDEQ_BIN_15 +79 0x0000 //RX_FDEQ_BIN_16 +80 0x0000 //RX_FDEQ_BIN_17 +81 0x0000 //RX_FDEQ_BIN_18 +82 0x0000 //RX_FDEQ_BIN_19 +83 0x0000 //RX_FDEQ_BIN_20 +84 0x0000 //RX_FDEQ_BIN_21 +85 0x0000 //RX_FDEQ_BIN_22 +86 0x0000 //RX_FDEQ_BIN_23 +87 0x4000 //RX_FDEQ_RESRV_0 +88 0x0320 //RX_FDEQ_RESRV_1 +89 0x0018 //RX_FDDRC_BAND_MARGIN_0 +90 0x0035 //RX_FDDRC_BAND_MARGIN_1 +91 0x0060 //RX_FDDRC_BAND_MARGIN_2 +92 0x0080 //RX_FDDRC_BAND_MARGIN_3 +93 0x0004 //RX_FDDRC_BLOCK_EXP +94 0x0600 //RX_FDDRC_THRD_2_0 +95 0x0600 //RX_FDDRC_THRD_2_1 +96 0x0600 //RX_FDDRC_THRD_2_2 +97 0x0600 //RX_FDDRC_THRD_2_3 +98 0x0800 //RX_FDDRC_THRD_3_0 +99 0x0800 //RX_FDDRC_THRD_3_1 +100 0x0800 //RX_FDDRC_THRD_3_2 +101 0x0800 //RX_FDDRC_THRD_3_3 +102 0x0000 //RX_FDDRC_SLANT_0_0 +103 0x0000 //RX_FDDRC_SLANT_0_1 +104 0x0000 //RX_FDDRC_SLANT_0_2 +105 0x0000 //RX_FDDRC_SLANT_0_3 +106 0x7FFF //RX_FDDRC_SLANT_1_0 +107 0x7FFF //RX_FDDRC_SLANT_1_1 +108 0x7FFF //RX_FDDRC_SLANT_1_2 +109 0x7FFF //RX_FDDRC_SLANT_1_3 +110 0x0000 //RX_FDDRC_RESRV_0 +129 0x005C //RX_SPK_VOL +130 0x0000 //RX_VOL_RESRV_0 +#VOL 5 +6 0x1000 //RX_TDDRC_ALPHA_UP_1 +7 0x1000 //RX_TDDRC_ALPHA_UP_2 +8 0x1000 //RX_TDDRC_ALPHA_UP_3 +9 0x1000 //RX_TDDRC_ALPHA_UP_4 +27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +28 0x4000 //RX_TDDRC_ALPHA_DWN_2 +29 0x4000 //RX_TDDRC_ALPHA_DWN_3 +32 0x4000 //RX_TDDRC_ALPHA_DWN_4 +33 0x7214 //RX_TDDRC_LIMITER_THRD +34 0x0800 //RX_TDDRC_LIMITER_GAIN +112 0x0002 //RX_TDDRC_THRD_0 +113 0x0004 //RX_TDDRC_THRD_1 +114 0x1A00 //RX_TDDRC_THRD_2 +115 0x1A00 //RX_TDDRC_THRD_3 +116 0x7FFF //RX_TDDRC_SLANT_0 +117 0x7FFF //RX_TDDRC_SLANT_1 +118 0x1000 //RX_TDDRC_ALPHA_UP_0 +119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +120 0x0000 //RX_TDDRC_HMNC_FLAG +121 0x199A //RX_TDDRC_HMNC_GAIN +122 0x0001 //RX_TDDRC_SMT_FLAG +123 0x0CCD //RX_TDDRC_SMT_W +124 0x038D //RX_TDDRC_DRC_GAIN +38 0x0014 //RX_FDEQ_SUBNUM +39 0x5646 //RX_FDEQ_GAIN_0 +40 0x3F3F //RX_FDEQ_GAIN_1 +41 0x454F //RX_FDEQ_GAIN_2 +42 0x515C //RX_FDEQ_GAIN_3 +43 0x635A //RX_FDEQ_GAIN_4 +44 0x4E4B //RX_FDEQ_GAIN_5 +45 0x4B4B //RX_FDEQ_GAIN_6 +46 0x4744 //RX_FDEQ_GAIN_7 +47 0x3F3D //RX_FDEQ_GAIN_8 +48 0x4E57 //RX_FDEQ_GAIN_9 +49 0x4848 //RX_FDEQ_GAIN_10 +50 0x4848 //RX_FDEQ_GAIN_11 +51 0x4848 //RX_FDEQ_GAIN_12 +52 0x4848 //RX_FDEQ_GAIN_13 +53 0x4848 //RX_FDEQ_GAIN_14 +54 0x4848 //RX_FDEQ_GAIN_15 +55 0x4848 //RX_FDEQ_GAIN_16 +56 0x4848 //RX_FDEQ_GAIN_17 +57 0x4848 //RX_FDEQ_GAIN_18 +58 0x4848 //RX_FDEQ_GAIN_19 +59 0x4848 //RX_FDEQ_GAIN_20 +60 0x4848 //RX_FDEQ_GAIN_21 +61 0x4848 //RX_FDEQ_GAIN_22 +62 0x4848 //RX_FDEQ_GAIN_23 +63 0x0202 //RX_FDEQ_BIN_0 +64 0x0203 //RX_FDEQ_BIN_1 +65 0x0303 //RX_FDEQ_BIN_2 +66 0x0304 //RX_FDEQ_BIN_3 +67 0x0405 //RX_FDEQ_BIN_4 +68 0x0506 //RX_FDEQ_BIN_5 +69 0x0708 //RX_FDEQ_BIN_6 +70 0x090A //RX_FDEQ_BIN_7 +71 0x0B0C //RX_FDEQ_BIN_8 +72 0x0D08 //RX_FDEQ_BIN_9 +73 0x0000 //RX_FDEQ_BIN_10 +74 0x0000 //RX_FDEQ_BIN_11 +75 0x0000 //RX_FDEQ_BIN_12 +76 0x0000 //RX_FDEQ_BIN_13 +77 0x0000 //RX_FDEQ_BIN_14 +78 0x0000 //RX_FDEQ_BIN_15 +79 0x0000 //RX_FDEQ_BIN_16 +80 0x0000 //RX_FDEQ_BIN_17 +81 0x0000 //RX_FDEQ_BIN_18 +82 0x0000 //RX_FDEQ_BIN_19 +83 0x0000 //RX_FDEQ_BIN_20 +84 0x0000 //RX_FDEQ_BIN_21 +85 0x0000 //RX_FDEQ_BIN_22 +86 0x0000 //RX_FDEQ_BIN_23 +87 0x4000 //RX_FDEQ_RESRV_0 +88 0x0320 //RX_FDEQ_RESRV_1 +89 0x0018 //RX_FDDRC_BAND_MARGIN_0 +90 0x0035 //RX_FDDRC_BAND_MARGIN_1 +91 0x0060 //RX_FDDRC_BAND_MARGIN_2 +92 0x0080 //RX_FDDRC_BAND_MARGIN_3 +93 0x0004 //RX_FDDRC_BLOCK_EXP +94 0x0600 //RX_FDDRC_THRD_2_0 +95 0x0600 //RX_FDDRC_THRD_2_1 +96 0x0600 //RX_FDDRC_THRD_2_2 +97 0x0600 //RX_FDDRC_THRD_2_3 +98 0x0800 //RX_FDDRC_THRD_3_0 +99 0x0800 //RX_FDDRC_THRD_3_1 +100 0x0800 //RX_FDDRC_THRD_3_2 +101 0x0800 //RX_FDDRC_THRD_3_3 +102 0x0000 //RX_FDDRC_SLANT_0_0 +103 0x0000 //RX_FDDRC_SLANT_0_1 +104 0x0000 //RX_FDDRC_SLANT_0_2 +105 0x0000 //RX_FDDRC_SLANT_0_3 +106 0x7FFF //RX_FDDRC_SLANT_1_0 +107 0x7FFF //RX_FDDRC_SLANT_1_1 +108 0x7FFF //RX_FDDRC_SLANT_1_2 +109 0x7FFF //RX_FDDRC_SLANT_1_3 +110 0x0000 //RX_FDDRC_RESRV_0 +129 0x008A //RX_SPK_VOL +130 0x0000 //RX_VOL_RESRV_0 +#VOL 6 +6 0x1000 //RX_TDDRC_ALPHA_UP_1 +7 0x1000 //RX_TDDRC_ALPHA_UP_2 +8 0x1000 //RX_TDDRC_ALPHA_UP_3 +9 0x1000 //RX_TDDRC_ALPHA_UP_4 +27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +28 0x4000 //RX_TDDRC_ALPHA_DWN_2 +29 0x4000 //RX_TDDRC_ALPHA_DWN_3 +32 0x4000 //RX_TDDRC_ALPHA_DWN_4 +33 0x7214 //RX_TDDRC_LIMITER_THRD +34 0x0800 //RX_TDDRC_LIMITER_GAIN +112 0x0002 //RX_TDDRC_THRD_0 +113 0x0004 //RX_TDDRC_THRD_1 +114 0x1A00 //RX_TDDRC_THRD_2 +115 0x1A00 //RX_TDDRC_THRD_3 +116 0x7FFF //RX_TDDRC_SLANT_0 +117 0x7FFF //RX_TDDRC_SLANT_1 +118 0x1000 //RX_TDDRC_ALPHA_UP_0 +119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +120 0x0000 //RX_TDDRC_HMNC_FLAG +121 0x199A //RX_TDDRC_HMNC_GAIN +122 0x0001 //RX_TDDRC_SMT_FLAG +123 0x0CCD //RX_TDDRC_SMT_W +124 0x038D //RX_TDDRC_DRC_GAIN +38 0x0014 //RX_FDEQ_SUBNUM +39 0x5646 //RX_FDEQ_GAIN_0 +40 0x3F3F //RX_FDEQ_GAIN_1 +41 0x454F //RX_FDEQ_GAIN_2 +42 0x515C //RX_FDEQ_GAIN_3 +43 0x635A //RX_FDEQ_GAIN_4 +44 0x4E4B //RX_FDEQ_GAIN_5 +45 0x4B4B //RX_FDEQ_GAIN_6 +46 0x4744 //RX_FDEQ_GAIN_7 +47 0x3F3D //RX_FDEQ_GAIN_8 +48 0x4E57 //RX_FDEQ_GAIN_9 +49 0x4848 //RX_FDEQ_GAIN_10 +50 0x4848 //RX_FDEQ_GAIN_11 +51 0x4848 //RX_FDEQ_GAIN_12 +52 0x4848 //RX_FDEQ_GAIN_13 +53 0x4848 //RX_FDEQ_GAIN_14 +54 0x4848 //RX_FDEQ_GAIN_15 +55 0x4848 //RX_FDEQ_GAIN_16 +56 0x4848 //RX_FDEQ_GAIN_17 +57 0x4848 //RX_FDEQ_GAIN_18 +58 0x4848 //RX_FDEQ_GAIN_19 +59 0x4848 //RX_FDEQ_GAIN_20 +60 0x4848 //RX_FDEQ_GAIN_21 +61 0x4848 //RX_FDEQ_GAIN_22 +62 0x4848 //RX_FDEQ_GAIN_23 +63 0x0202 //RX_FDEQ_BIN_0 +64 0x0203 //RX_FDEQ_BIN_1 +65 0x0303 //RX_FDEQ_BIN_2 +66 0x0304 //RX_FDEQ_BIN_3 +67 0x0405 //RX_FDEQ_BIN_4 +68 0x0506 //RX_FDEQ_BIN_5 +69 0x0708 //RX_FDEQ_BIN_6 +70 0x090A //RX_FDEQ_BIN_7 +71 0x0B0C //RX_FDEQ_BIN_8 +72 0x0D08 //RX_FDEQ_BIN_9 +73 0x0000 //RX_FDEQ_BIN_10 +74 0x0000 //RX_FDEQ_BIN_11 +75 0x0000 //RX_FDEQ_BIN_12 +76 0x0000 //RX_FDEQ_BIN_13 +77 0x0000 //RX_FDEQ_BIN_14 +78 0x0000 //RX_FDEQ_BIN_15 +79 0x0000 //RX_FDEQ_BIN_16 +80 0x0000 //RX_FDEQ_BIN_17 +81 0x0000 //RX_FDEQ_BIN_18 +82 0x0000 //RX_FDEQ_BIN_19 +83 0x0000 //RX_FDEQ_BIN_20 +84 0x0000 //RX_FDEQ_BIN_21 +85 0x0000 //RX_FDEQ_BIN_22 +86 0x0000 //RX_FDEQ_BIN_23 +87 0x4000 //RX_FDEQ_RESRV_0 +88 0x0320 //RX_FDEQ_RESRV_1 +89 0x0018 //RX_FDDRC_BAND_MARGIN_0 +90 0x0035 //RX_FDDRC_BAND_MARGIN_1 +91 0x0060 //RX_FDDRC_BAND_MARGIN_2 +92 0x0080 //RX_FDDRC_BAND_MARGIN_3 +93 0x0004 //RX_FDDRC_BLOCK_EXP +94 0x0600 //RX_FDDRC_THRD_2_0 +95 0x0600 //RX_FDDRC_THRD_2_1 +96 0x0600 //RX_FDDRC_THRD_2_2 +97 0x0600 //RX_FDDRC_THRD_2_3 +98 0x0800 //RX_FDDRC_THRD_3_0 +99 0x0800 //RX_FDDRC_THRD_3_1 +100 0x0800 //RX_FDDRC_THRD_3_2 +101 0x0800 //RX_FDDRC_THRD_3_3 +102 0x0000 //RX_FDDRC_SLANT_0_0 +103 0x0000 //RX_FDDRC_SLANT_0_1 +104 0x0000 //RX_FDDRC_SLANT_0_2 +105 0x0000 //RX_FDDRC_SLANT_0_3 +106 0x7FFF //RX_FDDRC_SLANT_1_0 +107 0x7FFF //RX_FDDRC_SLANT_1_1 +108 0x7FFF //RX_FDDRC_SLANT_1_2 +109 0x7FFF //RX_FDDRC_SLANT_1_3 +110 0x0000 //RX_FDDRC_RESRV_0 +129 0x0100 //RX_SPK_VOL +130 0x0000 //RX_VOL_RESRV_0 +#RX 2 +157 0x027C //RX_RECVFUNC_MODE_0 +158 0x0000 //RX_RECVFUNC_MODE_1 +159 0x0000 //RX_SAMPLINGFREQ_SIG +160 0x0000 //RX_SAMPLINGFREQ_PROC +161 0x000A //RX_FRAME_SZ +162 0x0000 //RX_DELAY_OPT +163 0x1000 //RX_TDDRC_ALPHA_UP_1 +164 0x1000 //RX_TDDRC_ALPHA_UP_2 +165 0x1000 //RX_TDDRC_ALPHA_UP_3 +166 0x1000 //RX_TDDRC_ALPHA_UP_4 +167 0x0800 //RX_PGA +168 0x7652 //RX_A_HP +169 0x4000 //RX_B_PE +170 0x7800 //RX_THR_PITCH_DET_0 +171 0x7000 //RX_THR_PITCH_DET_1 +172 0x6000 //RX_THR_PITCH_DET_2 +173 0x0008 //RX_PITCH_BFR_LEN +174 0x0003 //RX_SBD_PITCH_DET +175 0x0100 //RX_PP_RESRV_0 +176 0x0020 //RX_PP_RESRV_1 +177 0x0400 //RX_N_SN_EST +178 0x000C //RX_N2_SN_EST +179 0x0010 //RX_NS_LVL_CTRL +180 0xF800 //RX_THR_SN_EST +181 0x7E00 //RX_LAMBDA_PFILT +182 0x000A //RX_FENS_RESRV_0 +183 0x0190 //RX_FENS_RESRV_1 +184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +185 0x4000 //RX_TDDRC_ALPHA_DWN_2 +186 0x4000 //RX_TDDRC_ALPHA_DWN_3 +187 0x0002 //RX_EXTRA_NS_L +188 0x0800 //RX_EXTRA_NS_A +189 0x4000 //RX_TDDRC_ALPHA_DWN_4 +190 0x7214 //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +192 0x199A //RX_A_POST_FLT +193 0x0000 //RX_LMT_THRD +194 0x4000 //RX_LMT_ALPHA +195 0x0014 //RX_FDEQ_SUBNUM +196 0x8080 //RX_FDEQ_GAIN_0 +197 0x8058 //RX_FDEQ_GAIN_1 +198 0x5454 //RX_FDEQ_GAIN_2 +199 0x545C //RX_FDEQ_GAIN_3 +200 0x6448 //RX_FDEQ_GAIN_4 +201 0x4848 //RX_FDEQ_GAIN_5 +202 0x5848 //RX_FDEQ_GAIN_6 +203 0x4848 //RX_FDEQ_GAIN_7 +204 0x485A //RX_FDEQ_GAIN_8 +205 0x5A58 //RX_FDEQ_GAIN_9 +206 0x4848 //RX_FDEQ_GAIN_10 +207 0x4848 //RX_FDEQ_GAIN_11 +208 0x4848 //RX_FDEQ_GAIN_12 +209 0x4848 //RX_FDEQ_GAIN_13 +210 0x4848 //RX_FDEQ_GAIN_14 +211 0x4848 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0202 //RX_FDEQ_BIN_0 +221 0x0203 //RX_FDEQ_BIN_1 +222 0x0303 //RX_FDEQ_BIN_2 +223 0x0304 //RX_FDEQ_BIN_3 +224 0x0405 //RX_FDEQ_BIN_4 +225 0x0506 //RX_FDEQ_BIN_5 +226 0x0708 //RX_FDEQ_BIN_6 +227 0x090A //RX_FDEQ_BIN_7 +228 0x0B0C //RX_FDEQ_BIN_8 +229 0x0D08 //RX_FDEQ_BIN_9 +230 0x0000 //RX_FDEQ_BIN_10 +231 0x0000 //RX_FDEQ_BIN_11 +232 0x0000 //RX_FDEQ_BIN_12 +233 0x0000 //RX_FDEQ_BIN_13 +234 0x0000 //RX_FDEQ_BIN_14 +235 0x0000 //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x4000 //RX_FDEQ_RESRV_0 +245 0x0320 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0035 //RX_FDDRC_BAND_MARGIN_1 +248 0x0060 //RX_FDDRC_BAND_MARGIN_2 +249 0x0080 //RX_FDDRC_BAND_MARGIN_3 +250 0x0004 //RX_FDDRC_BLOCK_EXP +251 0x0600 //RX_FDDRC_THRD_2_0 +252 0x0600 //RX_FDDRC_THRD_2_1 +253 0x0600 //RX_FDDRC_THRD_2_2 +254 0x0600 //RX_FDDRC_THRD_2_3 +255 0x0800 //RX_FDDRC_THRD_3_0 +256 0x0800 //RX_FDDRC_THRD_3_1 +257 0x0800 //RX_FDDRC_THRD_3_2 +258 0x0800 //RX_FDDRC_THRD_3_3 +259 0x0000 //RX_FDDRC_SLANT_0_0 +260 0x0000 //RX_FDDRC_SLANT_0_1 +261 0x0000 //RX_FDDRC_SLANT_0_2 +262 0x0000 //RX_FDDRC_SLANT_0_3 +263 0x7FFF //RX_FDDRC_SLANT_1_0 +264 0x7FFF //RX_FDDRC_SLANT_1_1 +265 0x7FFF //RX_FDDRC_SLANT_1_2 +266 0x7FFF //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +268 0x0005 //RX_FILTINDX +269 0x0002 //RX_TDDRC_THRD_0 +270 0x0004 //RX_TDDRC_THRD_1 +271 0x1A00 //RX_TDDRC_THRD_2 +272 0x1A00 //RX_TDDRC_THRD_3 +273 0x7FFF //RX_TDDRC_SLANT_0 +274 0x7FFF //RX_TDDRC_SLANT_1 +275 0x1000 //RX_TDDRC_ALPHA_UP_0 +276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x199A //RX_TDDRC_HMNC_GAIN +279 0x0001 //RX_TDDRC_SMT_FLAG +280 0x0CCD //RX_TDDRC_SMT_W +281 0x0700 //RX_TDDRC_DRC_GAIN +282 0x7C00 //RX_LAMBDA_PKA_FP +283 0x2000 //RX_TPKA_FP +284 0x2000 //RX_MIN_G_FP +285 0x0080 //RX_MAX_G_FP +286 0x0016 //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 +288 0x0000 //RX_MAXLEVEL_CNG +289 0x3000 //RX_BWE_UV_TH +290 0x3000 //RX_BWE_UV_TH2 +291 0x1800 //RX_BWE_UV_TH3 +292 0x1000 //RX_BWE_V_TH +293 0x04CD //RX_BWE_GAIN1_V_TH1 +294 0x0F33 //RX_BWE_GAIN1_V_TH2 +295 0x7333 //RX_BWE_UV_EQ +296 0x199A //RX_BWE_V_EQ +297 0x7333 //RX_BWE_TONE_TH +298 0x0004 //RX_BWE_UV_HOLD_T +299 0x6CCD //RX_BWE_GAIN2_ALPHA +300 0x799A //RX_BWE_GAIN3_ALPHA +301 0x001E //RX_BWE_CUTOFF +302 0x3000 //RX_BWE_GAINFILL +303 0x3200 //RX_BWE_MAXTH_TONE +304 0x2000 //RX_BWE_EQ_0 +305 0x2000 //RX_BWE_EQ_1 +306 0x2000 //RX_BWE_EQ_2 +307 0x2000 //RX_BWE_EQ_3 +308 0x2000 //RX_BWE_EQ_4 +309 0x2000 //RX_BWE_EQ_5 +310 0x2000 //RX_BWE_EQ_6 +311 0x0000 //RX_BWE_RESRV_0 +312 0x0000 //RX_BWE_RESRV_1 +313 0x0000 //RX_BWE_RESRV_2 +#VOL 0 +163 0x1000 //RX_TDDRC_ALPHA_UP_1 +164 0x1000 //RX_TDDRC_ALPHA_UP_2 +165 0x1000 //RX_TDDRC_ALPHA_UP_3 +166 0x1000 //RX_TDDRC_ALPHA_UP_4 +184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +185 0x4000 //RX_TDDRC_ALPHA_DWN_2 +186 0x4000 //RX_TDDRC_ALPHA_DWN_3 +189 0x4000 //RX_TDDRC_ALPHA_DWN_4 +190 0x7214 //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +269 0x0002 //RX_TDDRC_THRD_0 +270 0x0004 //RX_TDDRC_THRD_1 +271 0x1A00 //RX_TDDRC_THRD_2 +272 0x1A00 //RX_TDDRC_THRD_3 +273 0x7FFF //RX_TDDRC_SLANT_0 +274 0x7FFF //RX_TDDRC_SLANT_1 +275 0x1000 //RX_TDDRC_ALPHA_UP_0 +276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x199A //RX_TDDRC_HMNC_GAIN +279 0x0001 //RX_TDDRC_SMT_FLAG +280 0x0CCD //RX_TDDRC_SMT_W +281 0x0700 //RX_TDDRC_DRC_GAIN +195 0x0014 //RX_FDEQ_SUBNUM +196 0x8080 //RX_FDEQ_GAIN_0 +197 0x8058 //RX_FDEQ_GAIN_1 +198 0x5454 //RX_FDEQ_GAIN_2 +199 0x545C //RX_FDEQ_GAIN_3 +200 0x6448 //RX_FDEQ_GAIN_4 +201 0x4848 //RX_FDEQ_GAIN_5 +202 0x5848 //RX_FDEQ_GAIN_6 +203 0x4848 //RX_FDEQ_GAIN_7 +204 0x485A //RX_FDEQ_GAIN_8 +205 0x5A58 //RX_FDEQ_GAIN_9 +206 0x4848 //RX_FDEQ_GAIN_10 +207 0x4848 //RX_FDEQ_GAIN_11 +208 0x4848 //RX_FDEQ_GAIN_12 +209 0x4848 //RX_FDEQ_GAIN_13 +210 0x4848 //RX_FDEQ_GAIN_14 +211 0x4848 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0202 //RX_FDEQ_BIN_0 +221 0x0203 //RX_FDEQ_BIN_1 +222 0x0303 //RX_FDEQ_BIN_2 +223 0x0304 //RX_FDEQ_BIN_3 +224 0x0405 //RX_FDEQ_BIN_4 +225 0x0506 //RX_FDEQ_BIN_5 +226 0x0708 //RX_FDEQ_BIN_6 +227 0x090A //RX_FDEQ_BIN_7 +228 0x0B0C //RX_FDEQ_BIN_8 +229 0x0D08 //RX_FDEQ_BIN_9 +230 0x0000 //RX_FDEQ_BIN_10 +231 0x0000 //RX_FDEQ_BIN_11 +232 0x0000 //RX_FDEQ_BIN_12 +233 0x0000 //RX_FDEQ_BIN_13 +234 0x0000 //RX_FDEQ_BIN_14 +235 0x0000 //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x4000 //RX_FDEQ_RESRV_0 +245 0x0320 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0035 //RX_FDDRC_BAND_MARGIN_1 +248 0x0060 //RX_FDDRC_BAND_MARGIN_2 +249 0x0080 //RX_FDDRC_BAND_MARGIN_3 +250 0x0004 //RX_FDDRC_BLOCK_EXP +251 0x0600 //RX_FDDRC_THRD_2_0 +252 0x0600 //RX_FDDRC_THRD_2_1 +253 0x0600 //RX_FDDRC_THRD_2_2 +254 0x0600 //RX_FDDRC_THRD_2_3 +255 0x0800 //RX_FDDRC_THRD_3_0 +256 0x0800 //RX_FDDRC_THRD_3_1 +257 0x0800 //RX_FDDRC_THRD_3_2 +258 0x0800 //RX_FDDRC_THRD_3_3 +259 0x0000 //RX_FDDRC_SLANT_0_0 +260 0x0000 //RX_FDDRC_SLANT_0_1 +261 0x0000 //RX_FDDRC_SLANT_0_2 +262 0x0000 //RX_FDDRC_SLANT_0_3 +263 0x7FFF //RX_FDDRC_SLANT_1_0 +264 0x7FFF //RX_FDDRC_SLANT_1_1 +265 0x7FFF //RX_FDDRC_SLANT_1_2 +266 0x7FFF //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +286 0x0016 //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 +#VOL 1 +163 0x1000 //RX_TDDRC_ALPHA_UP_1 +164 0x1000 //RX_TDDRC_ALPHA_UP_2 +165 0x1000 //RX_TDDRC_ALPHA_UP_3 +166 0x1000 //RX_TDDRC_ALPHA_UP_4 +184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +185 0x4000 //RX_TDDRC_ALPHA_DWN_2 +186 0x4000 //RX_TDDRC_ALPHA_DWN_3 +189 0x4000 //RX_TDDRC_ALPHA_DWN_4 +190 0x7214 //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +269 0x0002 //RX_TDDRC_THRD_0 +270 0x0004 //RX_TDDRC_THRD_1 +271 0x1A00 //RX_TDDRC_THRD_2 +272 0x1A00 //RX_TDDRC_THRD_3 +273 0x7FFF //RX_TDDRC_SLANT_0 +274 0x7FFF //RX_TDDRC_SLANT_1 +275 0x1000 //RX_TDDRC_ALPHA_UP_0 +276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x199A //RX_TDDRC_HMNC_GAIN +279 0x0001 //RX_TDDRC_SMT_FLAG +280 0x0CCD //RX_TDDRC_SMT_W +281 0x0700 //RX_TDDRC_DRC_GAIN +195 0x0014 //RX_FDEQ_SUBNUM +196 0x8080 //RX_FDEQ_GAIN_0 +197 0x8058 //RX_FDEQ_GAIN_1 +198 0x5454 //RX_FDEQ_GAIN_2 +199 0x545C //RX_FDEQ_GAIN_3 +200 0x6448 //RX_FDEQ_GAIN_4 +201 0x4848 //RX_FDEQ_GAIN_5 +202 0x5848 //RX_FDEQ_GAIN_6 +203 0x4848 //RX_FDEQ_GAIN_7 +204 0x485A //RX_FDEQ_GAIN_8 +205 0x5A58 //RX_FDEQ_GAIN_9 +206 0x4848 //RX_FDEQ_GAIN_10 +207 0x4848 //RX_FDEQ_GAIN_11 +208 0x4848 //RX_FDEQ_GAIN_12 +209 0x4848 //RX_FDEQ_GAIN_13 +210 0x4848 //RX_FDEQ_GAIN_14 +211 0x4848 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0202 //RX_FDEQ_BIN_0 +221 0x0203 //RX_FDEQ_BIN_1 +222 0x0303 //RX_FDEQ_BIN_2 +223 0x0304 //RX_FDEQ_BIN_3 +224 0x0405 //RX_FDEQ_BIN_4 +225 0x0506 //RX_FDEQ_BIN_5 +226 0x0708 //RX_FDEQ_BIN_6 +227 0x090A //RX_FDEQ_BIN_7 +228 0x0B0C //RX_FDEQ_BIN_8 +229 0x0D08 //RX_FDEQ_BIN_9 +230 0x0000 //RX_FDEQ_BIN_10 +231 0x0000 //RX_FDEQ_BIN_11 +232 0x0000 //RX_FDEQ_BIN_12 +233 0x0000 //RX_FDEQ_BIN_13 +234 0x0000 //RX_FDEQ_BIN_14 +235 0x0000 //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x4000 //RX_FDEQ_RESRV_0 +245 0x0320 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0035 //RX_FDDRC_BAND_MARGIN_1 +248 0x0060 //RX_FDDRC_BAND_MARGIN_2 +249 0x0080 //RX_FDDRC_BAND_MARGIN_3 +250 0x0004 //RX_FDDRC_BLOCK_EXP +251 0x0600 //RX_FDDRC_THRD_2_0 +252 0x0600 //RX_FDDRC_THRD_2_1 +253 0x0600 //RX_FDDRC_THRD_2_2 +254 0x0600 //RX_FDDRC_THRD_2_3 +255 0x0800 //RX_FDDRC_THRD_3_0 +256 0x0800 //RX_FDDRC_THRD_3_1 +257 0x0800 //RX_FDDRC_THRD_3_2 +258 0x0800 //RX_FDDRC_THRD_3_3 +259 0x0000 //RX_FDDRC_SLANT_0_0 +260 0x0000 //RX_FDDRC_SLANT_0_1 +261 0x0000 //RX_FDDRC_SLANT_0_2 +262 0x0000 //RX_FDDRC_SLANT_0_3 +263 0x7FFF //RX_FDDRC_SLANT_1_0 +264 0x7FFF //RX_FDDRC_SLANT_1_1 +265 0x7FFF //RX_FDDRC_SLANT_1_2 +266 0x7FFF //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +286 0x0020 //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 +#VOL 2 +163 0x1000 //RX_TDDRC_ALPHA_UP_1 +164 0x1000 //RX_TDDRC_ALPHA_UP_2 +165 0x1000 //RX_TDDRC_ALPHA_UP_3 +166 0x1000 //RX_TDDRC_ALPHA_UP_4 +184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +185 0x4000 //RX_TDDRC_ALPHA_DWN_2 +186 0x4000 //RX_TDDRC_ALPHA_DWN_3 +189 0x4000 //RX_TDDRC_ALPHA_DWN_4 +190 0x7214 //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +269 0x0002 //RX_TDDRC_THRD_0 +270 0x0004 //RX_TDDRC_THRD_1 +271 0x1A00 //RX_TDDRC_THRD_2 +272 0x1A00 //RX_TDDRC_THRD_3 +273 0x7FFF //RX_TDDRC_SLANT_0 +274 0x7FFF //RX_TDDRC_SLANT_1 +275 0x1000 //RX_TDDRC_ALPHA_UP_0 +276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x199A //RX_TDDRC_HMNC_GAIN +279 0x0001 //RX_TDDRC_SMT_FLAG +280 0x0CCD //RX_TDDRC_SMT_W +281 0x0700 //RX_TDDRC_DRC_GAIN +195 0x0014 //RX_FDEQ_SUBNUM +196 0x8080 //RX_FDEQ_GAIN_0 +197 0x8058 //RX_FDEQ_GAIN_1 +198 0x5454 //RX_FDEQ_GAIN_2 +199 0x545C //RX_FDEQ_GAIN_3 +200 0x6448 //RX_FDEQ_GAIN_4 +201 0x4848 //RX_FDEQ_GAIN_5 +202 0x5848 //RX_FDEQ_GAIN_6 +203 0x4848 //RX_FDEQ_GAIN_7 +204 0x485A //RX_FDEQ_GAIN_8 +205 0x5A58 //RX_FDEQ_GAIN_9 +206 0x4848 //RX_FDEQ_GAIN_10 +207 0x4848 //RX_FDEQ_GAIN_11 +208 0x4848 //RX_FDEQ_GAIN_12 +209 0x4848 //RX_FDEQ_GAIN_13 +210 0x4848 //RX_FDEQ_GAIN_14 +211 0x4848 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0202 //RX_FDEQ_BIN_0 +221 0x0203 //RX_FDEQ_BIN_1 +222 0x0303 //RX_FDEQ_BIN_2 +223 0x0304 //RX_FDEQ_BIN_3 +224 0x0405 //RX_FDEQ_BIN_4 +225 0x0506 //RX_FDEQ_BIN_5 +226 0x0708 //RX_FDEQ_BIN_6 +227 0x090A //RX_FDEQ_BIN_7 +228 0x0B0C //RX_FDEQ_BIN_8 +229 0x0D08 //RX_FDEQ_BIN_9 +230 0x0000 //RX_FDEQ_BIN_10 +231 0x0000 //RX_FDEQ_BIN_11 +232 0x0000 //RX_FDEQ_BIN_12 +233 0x0000 //RX_FDEQ_BIN_13 +234 0x0000 //RX_FDEQ_BIN_14 +235 0x0000 //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x4000 //RX_FDEQ_RESRV_0 +245 0x0320 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0035 //RX_FDDRC_BAND_MARGIN_1 +248 0x0060 //RX_FDDRC_BAND_MARGIN_2 +249 0x0080 //RX_FDDRC_BAND_MARGIN_3 +250 0x0004 //RX_FDDRC_BLOCK_EXP +251 0x0600 //RX_FDDRC_THRD_2_0 +252 0x0600 //RX_FDDRC_THRD_2_1 +253 0x0600 //RX_FDDRC_THRD_2_2 +254 0x0600 //RX_FDDRC_THRD_2_3 +255 0x0800 //RX_FDDRC_THRD_3_0 +256 0x0800 //RX_FDDRC_THRD_3_1 +257 0x0800 //RX_FDDRC_THRD_3_2 +258 0x0800 //RX_FDDRC_THRD_3_3 +259 0x0000 //RX_FDDRC_SLANT_0_0 +260 0x0000 //RX_FDDRC_SLANT_0_1 +261 0x0000 //RX_FDDRC_SLANT_0_2 +262 0x0000 //RX_FDDRC_SLANT_0_3 +263 0x7FFF //RX_FDDRC_SLANT_1_0 +264 0x7FFF //RX_FDDRC_SLANT_1_1 +265 0x7FFF //RX_FDDRC_SLANT_1_2 +266 0x7FFF //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +286 0x002E //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 +#VOL 3 +163 0x1000 //RX_TDDRC_ALPHA_UP_1 +164 0x1000 //RX_TDDRC_ALPHA_UP_2 +165 0x1000 //RX_TDDRC_ALPHA_UP_3 +166 0x1000 //RX_TDDRC_ALPHA_UP_4 +184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +185 0x4000 //RX_TDDRC_ALPHA_DWN_2 +186 0x4000 //RX_TDDRC_ALPHA_DWN_3 +189 0x4000 //RX_TDDRC_ALPHA_DWN_4 +190 0x7214 //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +269 0x0002 //RX_TDDRC_THRD_0 +270 0x0004 //RX_TDDRC_THRD_1 +271 0x1A00 //RX_TDDRC_THRD_2 +272 0x1A00 //RX_TDDRC_THRD_3 +273 0x7FFF //RX_TDDRC_SLANT_0 +274 0x7FFF //RX_TDDRC_SLANT_1 +275 0x1000 //RX_TDDRC_ALPHA_UP_0 +276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x199A //RX_TDDRC_HMNC_GAIN +279 0x0001 //RX_TDDRC_SMT_FLAG +280 0x0CCD //RX_TDDRC_SMT_W +281 0x0700 //RX_TDDRC_DRC_GAIN +195 0x0014 //RX_FDEQ_SUBNUM +196 0x8080 //RX_FDEQ_GAIN_0 +197 0x8058 //RX_FDEQ_GAIN_1 +198 0x5454 //RX_FDEQ_GAIN_2 +199 0x545C //RX_FDEQ_GAIN_3 +200 0x6448 //RX_FDEQ_GAIN_4 +201 0x4848 //RX_FDEQ_GAIN_5 +202 0x5848 //RX_FDEQ_GAIN_6 +203 0x4848 //RX_FDEQ_GAIN_7 +204 0x485A //RX_FDEQ_GAIN_8 +205 0x5A58 //RX_FDEQ_GAIN_9 +206 0x4848 //RX_FDEQ_GAIN_10 +207 0x4848 //RX_FDEQ_GAIN_11 +208 0x4848 //RX_FDEQ_GAIN_12 +209 0x4848 //RX_FDEQ_GAIN_13 +210 0x4848 //RX_FDEQ_GAIN_14 +211 0x4848 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0202 //RX_FDEQ_BIN_0 +221 0x0203 //RX_FDEQ_BIN_1 +222 0x0303 //RX_FDEQ_BIN_2 +223 0x0304 //RX_FDEQ_BIN_3 +224 0x0405 //RX_FDEQ_BIN_4 +225 0x0506 //RX_FDEQ_BIN_5 +226 0x0708 //RX_FDEQ_BIN_6 +227 0x090A //RX_FDEQ_BIN_7 +228 0x0B0C //RX_FDEQ_BIN_8 +229 0x0D08 //RX_FDEQ_BIN_9 +230 0x0000 //RX_FDEQ_BIN_10 +231 0x0000 //RX_FDEQ_BIN_11 +232 0x0000 //RX_FDEQ_BIN_12 +233 0x0000 //RX_FDEQ_BIN_13 +234 0x0000 //RX_FDEQ_BIN_14 +235 0x0000 //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x4000 //RX_FDEQ_RESRV_0 +245 0x0320 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0035 //RX_FDDRC_BAND_MARGIN_1 +248 0x0060 //RX_FDDRC_BAND_MARGIN_2 +249 0x0080 //RX_FDDRC_BAND_MARGIN_3 +250 0x0004 //RX_FDDRC_BLOCK_EXP +251 0x0600 //RX_FDDRC_THRD_2_0 +252 0x0600 //RX_FDDRC_THRD_2_1 +253 0x0600 //RX_FDDRC_THRD_2_2 +254 0x0600 //RX_FDDRC_THRD_2_3 +255 0x0800 //RX_FDDRC_THRD_3_0 +256 0x0800 //RX_FDDRC_THRD_3_1 +257 0x0800 //RX_FDDRC_THRD_3_2 +258 0x0800 //RX_FDDRC_THRD_3_3 +259 0x0000 //RX_FDDRC_SLANT_0_0 +260 0x0000 //RX_FDDRC_SLANT_0_1 +261 0x0000 //RX_FDDRC_SLANT_0_2 +262 0x0000 //RX_FDDRC_SLANT_0_3 +263 0x7FFF //RX_FDDRC_SLANT_1_0 +264 0x7FFF //RX_FDDRC_SLANT_1_1 +265 0x7FFF //RX_FDDRC_SLANT_1_2 +266 0x7FFF //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +286 0x0041 //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 +#VOL 4 +163 0x1000 //RX_TDDRC_ALPHA_UP_1 +164 0x1000 //RX_TDDRC_ALPHA_UP_2 +165 0x1000 //RX_TDDRC_ALPHA_UP_3 +166 0x1000 //RX_TDDRC_ALPHA_UP_4 +184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +185 0x4000 //RX_TDDRC_ALPHA_DWN_2 +186 0x4000 //RX_TDDRC_ALPHA_DWN_3 +189 0x4000 //RX_TDDRC_ALPHA_DWN_4 +190 0x7214 //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +269 0x0002 //RX_TDDRC_THRD_0 +270 0x0004 //RX_TDDRC_THRD_1 +271 0x1A00 //RX_TDDRC_THRD_2 +272 0x1A00 //RX_TDDRC_THRD_3 +273 0x7FFF //RX_TDDRC_SLANT_0 +274 0x7FFF //RX_TDDRC_SLANT_1 +275 0x1000 //RX_TDDRC_ALPHA_UP_0 +276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x199A //RX_TDDRC_HMNC_GAIN +279 0x0001 //RX_TDDRC_SMT_FLAG +280 0x0CCD //RX_TDDRC_SMT_W +281 0x0700 //RX_TDDRC_DRC_GAIN +195 0x0014 //RX_FDEQ_SUBNUM +196 0x8080 //RX_FDEQ_GAIN_0 +197 0x8058 //RX_FDEQ_GAIN_1 +198 0x5454 //RX_FDEQ_GAIN_2 +199 0x545C //RX_FDEQ_GAIN_3 +200 0x6448 //RX_FDEQ_GAIN_4 +201 0x4848 //RX_FDEQ_GAIN_5 +202 0x5848 //RX_FDEQ_GAIN_6 +203 0x4848 //RX_FDEQ_GAIN_7 +204 0x485A //RX_FDEQ_GAIN_8 +205 0x5A58 //RX_FDEQ_GAIN_9 +206 0x4848 //RX_FDEQ_GAIN_10 +207 0x4848 //RX_FDEQ_GAIN_11 +208 0x4848 //RX_FDEQ_GAIN_12 +209 0x4848 //RX_FDEQ_GAIN_13 +210 0x4848 //RX_FDEQ_GAIN_14 +211 0x4848 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0202 //RX_FDEQ_BIN_0 +221 0x0203 //RX_FDEQ_BIN_1 +222 0x0303 //RX_FDEQ_BIN_2 +223 0x0304 //RX_FDEQ_BIN_3 +224 0x0405 //RX_FDEQ_BIN_4 +225 0x0506 //RX_FDEQ_BIN_5 +226 0x0708 //RX_FDEQ_BIN_6 +227 0x090A //RX_FDEQ_BIN_7 +228 0x0B0C //RX_FDEQ_BIN_8 +229 0x0D08 //RX_FDEQ_BIN_9 +230 0x0000 //RX_FDEQ_BIN_10 +231 0x0000 //RX_FDEQ_BIN_11 +232 0x0000 //RX_FDEQ_BIN_12 +233 0x0000 //RX_FDEQ_BIN_13 +234 0x0000 //RX_FDEQ_BIN_14 +235 0x0000 //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x4000 //RX_FDEQ_RESRV_0 +245 0x0320 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0035 //RX_FDDRC_BAND_MARGIN_1 +248 0x0060 //RX_FDDRC_BAND_MARGIN_2 +249 0x0080 //RX_FDDRC_BAND_MARGIN_3 +250 0x0004 //RX_FDDRC_BLOCK_EXP +251 0x0600 //RX_FDDRC_THRD_2_0 +252 0x0600 //RX_FDDRC_THRD_2_1 +253 0x0600 //RX_FDDRC_THRD_2_2 +254 0x0600 //RX_FDDRC_THRD_2_3 +255 0x0800 //RX_FDDRC_THRD_3_0 +256 0x0800 //RX_FDDRC_THRD_3_1 +257 0x0800 //RX_FDDRC_THRD_3_2 +258 0x0800 //RX_FDDRC_THRD_3_3 +259 0x0000 //RX_FDDRC_SLANT_0_0 +260 0x0000 //RX_FDDRC_SLANT_0_1 +261 0x0000 //RX_FDDRC_SLANT_0_2 +262 0x0000 //RX_FDDRC_SLANT_0_3 +263 0x7FFF //RX_FDDRC_SLANT_1_0 +264 0x7FFF //RX_FDDRC_SLANT_1_1 +265 0x7FFF //RX_FDDRC_SLANT_1_2 +266 0x7FFF //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +286 0x005C //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 +#VOL 5 +163 0x1000 //RX_TDDRC_ALPHA_UP_1 +164 0x1000 //RX_TDDRC_ALPHA_UP_2 +165 0x1000 //RX_TDDRC_ALPHA_UP_3 +166 0x1000 //RX_TDDRC_ALPHA_UP_4 +184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +185 0x4000 //RX_TDDRC_ALPHA_DWN_2 +186 0x4000 //RX_TDDRC_ALPHA_DWN_3 +189 0x4000 //RX_TDDRC_ALPHA_DWN_4 +190 0x7214 //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +269 0x0002 //RX_TDDRC_THRD_0 +270 0x0004 //RX_TDDRC_THRD_1 +271 0x1A00 //RX_TDDRC_THRD_2 +272 0x1A00 //RX_TDDRC_THRD_3 +273 0x7FFF //RX_TDDRC_SLANT_0 +274 0x7FFF //RX_TDDRC_SLANT_1 +275 0x1000 //RX_TDDRC_ALPHA_UP_0 +276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x199A //RX_TDDRC_HMNC_GAIN +279 0x0001 //RX_TDDRC_SMT_FLAG +280 0x0CCD //RX_TDDRC_SMT_W +281 0x0700 //RX_TDDRC_DRC_GAIN +195 0x0014 //RX_FDEQ_SUBNUM +196 0x8080 //RX_FDEQ_GAIN_0 +197 0x8058 //RX_FDEQ_GAIN_1 +198 0x5454 //RX_FDEQ_GAIN_2 +199 0x545C //RX_FDEQ_GAIN_3 +200 0x6448 //RX_FDEQ_GAIN_4 +201 0x4848 //RX_FDEQ_GAIN_5 +202 0x5848 //RX_FDEQ_GAIN_6 +203 0x4848 //RX_FDEQ_GAIN_7 +204 0x485A //RX_FDEQ_GAIN_8 +205 0x5A58 //RX_FDEQ_GAIN_9 +206 0x4848 //RX_FDEQ_GAIN_10 +207 0x4848 //RX_FDEQ_GAIN_11 +208 0x4848 //RX_FDEQ_GAIN_12 +209 0x4848 //RX_FDEQ_GAIN_13 +210 0x4848 //RX_FDEQ_GAIN_14 +211 0x4848 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0202 //RX_FDEQ_BIN_0 +221 0x0203 //RX_FDEQ_BIN_1 +222 0x0303 //RX_FDEQ_BIN_2 +223 0x0304 //RX_FDEQ_BIN_3 +224 0x0405 //RX_FDEQ_BIN_4 +225 0x0506 //RX_FDEQ_BIN_5 +226 0x0708 //RX_FDEQ_BIN_6 +227 0x090A //RX_FDEQ_BIN_7 +228 0x0B0C //RX_FDEQ_BIN_8 +229 0x0D08 //RX_FDEQ_BIN_9 +230 0x0000 //RX_FDEQ_BIN_10 +231 0x0000 //RX_FDEQ_BIN_11 +232 0x0000 //RX_FDEQ_BIN_12 +233 0x0000 //RX_FDEQ_BIN_13 +234 0x0000 //RX_FDEQ_BIN_14 +235 0x0000 //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x4000 //RX_FDEQ_RESRV_0 +245 0x0320 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0035 //RX_FDDRC_BAND_MARGIN_1 +248 0x0060 //RX_FDDRC_BAND_MARGIN_2 +249 0x0080 //RX_FDDRC_BAND_MARGIN_3 +250 0x0004 //RX_FDDRC_BLOCK_EXP +251 0x0600 //RX_FDDRC_THRD_2_0 +252 0x0600 //RX_FDDRC_THRD_2_1 +253 0x0600 //RX_FDDRC_THRD_2_2 +254 0x0600 //RX_FDDRC_THRD_2_3 +255 0x0800 //RX_FDDRC_THRD_3_0 +256 0x0800 //RX_FDDRC_THRD_3_1 +257 0x0800 //RX_FDDRC_THRD_3_2 +258 0x0800 //RX_FDDRC_THRD_3_3 +259 0x0000 //RX_FDDRC_SLANT_0_0 +260 0x0000 //RX_FDDRC_SLANT_0_1 +261 0x0000 //RX_FDDRC_SLANT_0_2 +262 0x0000 //RX_FDDRC_SLANT_0_3 +263 0x7FFF //RX_FDDRC_SLANT_1_0 +264 0x7FFF //RX_FDDRC_SLANT_1_1 +265 0x7FFF //RX_FDDRC_SLANT_1_2 +266 0x7FFF //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +286 0x008A //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 +#VOL 6 +163 0x1000 //RX_TDDRC_ALPHA_UP_1 +164 0x1000 //RX_TDDRC_ALPHA_UP_2 +165 0x1000 //RX_TDDRC_ALPHA_UP_3 +166 0x1000 //RX_TDDRC_ALPHA_UP_4 +184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +185 0x4000 //RX_TDDRC_ALPHA_DWN_2 +186 0x4000 //RX_TDDRC_ALPHA_DWN_3 +189 0x4000 //RX_TDDRC_ALPHA_DWN_4 +190 0x7214 //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +269 0x0002 //RX_TDDRC_THRD_0 +270 0x0004 //RX_TDDRC_THRD_1 +271 0x1A00 //RX_TDDRC_THRD_2 +272 0x1A00 //RX_TDDRC_THRD_3 +273 0x7FFF //RX_TDDRC_SLANT_0 +274 0x7FFF //RX_TDDRC_SLANT_1 +275 0x1000 //RX_TDDRC_ALPHA_UP_0 +276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x199A //RX_TDDRC_HMNC_GAIN +279 0x0001 //RX_TDDRC_SMT_FLAG +280 0x0CCD //RX_TDDRC_SMT_W +281 0x0700 //RX_TDDRC_DRC_GAIN +195 0x0014 //RX_FDEQ_SUBNUM +196 0x8080 //RX_FDEQ_GAIN_0 +197 0x8058 //RX_FDEQ_GAIN_1 +198 0x5454 //RX_FDEQ_GAIN_2 +199 0x545C //RX_FDEQ_GAIN_3 +200 0x6448 //RX_FDEQ_GAIN_4 +201 0x4848 //RX_FDEQ_GAIN_5 +202 0x5848 //RX_FDEQ_GAIN_6 +203 0x4848 //RX_FDEQ_GAIN_7 +204 0x485A //RX_FDEQ_GAIN_8 +205 0x5A58 //RX_FDEQ_GAIN_9 +206 0x4848 //RX_FDEQ_GAIN_10 +207 0x4848 //RX_FDEQ_GAIN_11 +208 0x4848 //RX_FDEQ_GAIN_12 +209 0x4848 //RX_FDEQ_GAIN_13 +210 0x4848 //RX_FDEQ_GAIN_14 +211 0x4848 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0202 //RX_FDEQ_BIN_0 +221 0x0203 //RX_FDEQ_BIN_1 +222 0x0303 //RX_FDEQ_BIN_2 +223 0x0304 //RX_FDEQ_BIN_3 +224 0x0405 //RX_FDEQ_BIN_4 +225 0x0506 //RX_FDEQ_BIN_5 +226 0x0708 //RX_FDEQ_BIN_6 +227 0x090A //RX_FDEQ_BIN_7 +228 0x0B0C //RX_FDEQ_BIN_8 +229 0x0D08 //RX_FDEQ_BIN_9 +230 0x0000 //RX_FDEQ_BIN_10 +231 0x0000 //RX_FDEQ_BIN_11 +232 0x0000 //RX_FDEQ_BIN_12 +233 0x0000 //RX_FDEQ_BIN_13 +234 0x0000 //RX_FDEQ_BIN_14 +235 0x0000 //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x4000 //RX_FDEQ_RESRV_0 +245 0x0320 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0035 //RX_FDDRC_BAND_MARGIN_1 +248 0x0060 //RX_FDDRC_BAND_MARGIN_2 +249 0x0080 //RX_FDDRC_BAND_MARGIN_3 +250 0x0004 //RX_FDDRC_BLOCK_EXP +251 0x0600 //RX_FDDRC_THRD_2_0 +252 0x0600 //RX_FDDRC_THRD_2_1 +253 0x0600 //RX_FDDRC_THRD_2_2 +254 0x0600 //RX_FDDRC_THRD_2_3 +255 0x0800 //RX_FDDRC_THRD_3_0 +256 0x0800 //RX_FDDRC_THRD_3_1 +257 0x0800 //RX_FDDRC_THRD_3_2 +258 0x0800 //RX_FDDRC_THRD_3_3 +259 0x0000 //RX_FDDRC_SLANT_0_0 +260 0x0000 //RX_FDDRC_SLANT_0_1 +261 0x0000 //RX_FDDRC_SLANT_0_2 +262 0x0000 //RX_FDDRC_SLANT_0_3 +263 0x7FFF //RX_FDDRC_SLANT_1_0 +264 0x7FFF //RX_FDDRC_SLANT_1_1 +265 0x7FFF //RX_FDDRC_SLANT_1_2 +266 0x7FFF //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +286 0x0100 //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 + +#CASE_NAME HANDSFREE-HANDSFREE-CUSTOM1-FB +#PARAM_MODE FULL +#PARAM_TYPE TX+2RX +#TOTAL_CUSTOM_STEP 7+7 +#TX +0 0x0001 //TX_OPERATION_MODE_0 +1 0x0001 //TX_OPERATION_MODE_1 +2 0x0033 //TX_PATCH_REG +3 0x6B74 //TX_SENDFUNC_MODE_0 +4 0x0001 //TX_SENDFUNC_MODE_1 +5 0x0003 //TX_NUM_MIC +6 0x0004 //TX_SAMPLINGFREQ_SIG +7 0x0004 //TX_SAMPLINGFREQ_PROC +8 0x000A //TX_FRAME_SZ_SIG +9 0x000A //TX_FRAME_SZ +10 0x0000 //TX_DELAY_OPT +11 0x0028 //TX_MAX_TAIL_LENGTH +12 0x0001 //TX_NUM_LOUTCHN +13 0x0001 //TX_MAXNUM_AECREF +14 0x0000 //TX_DBG_FUNC_REG +15 0x0000 //TX_DBG_FUNC_REG1 +16 0x0000 //TX_SYS_RESRV_0 +17 0x0000 //TX_SYS_RESRV_1 +18 0x0000 //TX_SYS_RESRV_2 +19 0x0000 //TX_SYS_RESRV_3 +20 0x0000 //TX_DIST2REF0 +21 0x00A4 //TX_DIST2REF1 +22 0x0017 //TX_DIST2REF_02 +23 0x0000 //TX_DIST2REF_03 +24 0x0000 //TX_DIST2REF_04 +25 0x0000 //TX_DIST2REF_05 +26 0x0000 //TX_MMIC +27 0x0FF7 //TX_PGA_0 +28 0x0FF7 //TX_PGA_1 +29 0x0FF7 //TX_PGA_2 +30 0x0000 //TX_PGA_3 +31 0x0000 //TX_PGA_4 +32 0x0000 //TX_PGA_5 +33 0x0001 //TX_MIC_PAIRS +34 0x0000 //TX_MIC_PAIRS_HS +35 0x0002 //TX_MICS_FOR_BF +36 0x0000 //TX_MIC_PAIRS_FORL1 +37 0x0002 //TX_MICS_OF_PAIR0 +38 0x0002 //TX_MICS_OF_PAIR1 +39 0x0002 //TX_MICS_OF_PAIR2 +40 0x0002 //TX_MICS_OF_PAIR3 +41 0x0002 //TX_MIC_DATA_SRC0 +42 0x0000 //TX_MIC_DATA_SRC1 +43 0x0001 //TX_MIC_DATA_SRC2 +44 0x0000 //TX_MIC_DATA_SRC3 +45 0x0000 //TX_MIC_PAIR_CH_04 +46 0x0000 //TX_MIC_PAIR_CH_05 +47 0x0000 //TX_MIC_PAIR_CH_10 +48 0x0000 //TX_MIC_PAIR_CH_11 +49 0x0000 //TX_MIC_PAIR_CH_12 +50 0x0000 //TX_MIC_PAIR_CH_13 +51 0x0000 //TX_MIC_PAIR_CH_14 +52 0x05DC //TX_HD_BIN_MASK +53 0x0010 //TX_HD_SUBAND_MASK +54 0x19A1 //TX_HD_FRAME_AVG_MASK +55 0x0320 //TX_HD_MIN_FRQ +56 0x1000 //TX_HD_ALPHA_PSD +57 0x1100 //TX_T_PHPR1 +58 0x0000 //TX_T_PHPR2 +59 0x0000 //TX_T_PTPR +60 0x0000 //TX_T_PNPR +61 0x0000 //TX_T_PAPR1 +62 0xEE6C //TX_T_PSDVAT +63 0x0800 //TX_CNT +64 0x4000 //TX_ANTI_HOWL_GAIN +65 0x0001 //TX_MICFORBFMARK_0 +66 0x0001 //TX_MICFORBFMARK_1 +67 0x0001 //TX_MICFORBFMARK_2 +68 0x0001 //TX_MICFORBFMARK_3 +69 0x0001 //TX_MICFORBFMARK_4 +70 0x0001 //TX_MICFORBFMARK_5 +71 0x0000 //TX_DIST2REF_10 +72 0x3B33 //TX_DIST2REF_11 +73 0x0A70 //TX_DIST2REF2 +74 0x0000 //TX_DIST2REF_13 +75 0x0000 //TX_DIST2REF_14 +76 0x0000 //TX_DIST2REF_15 +77 0x0000 //TX_DIST2REF_20 +78 0x0000 //TX_DIST2REF_21 +79 0x0000 //TX_DIST2REF_22 +80 0x0000 //TX_DIST2REF_23 +81 0x0000 //TX_DIST2REF_24 +82 0x0000 //TX_DIST2REF_25 +83 0x0000 //TX_DIST2REF_30 +84 0x0000 //TX_DIST2REF_31 +85 0x0000 //TX_DIST2REF_32 +86 0x0000 //TX_DIST2REF_33 +87 0x0000 //TX_DIST2REF_34 +88 0x0000 //TX_DIST2REF_35 +89 0x0000 //TX_MIC_LOC_00 +90 0x0000 //TX_MIC_LOC_01 +91 0x0000 //TX_MIC_LOC_02 +92 0x0000 //TX_MIC_LOC_03 +93 0x0000 //TX_MIC_LOC_04 +94 0x0000 //TX_MIC_LOC_05 +95 0x0000 //TX_MIC_LOC_10 +96 0x0000 //TX_MIC_LOC_11 +97 0x0000 //TX_MIC_LOC_12 +98 0x0000 //TX_MIC_LOC_13 +99 0x0000 //TX_MIC_LOC_14 +100 0x0000 //TX_MIC_LOC_15 +101 0x0000 //TX_MIC_LOC_20 +102 0x0000 //TX_MIC_LOC_21 +103 0x0000 //TX_MIC_LOC_22 +104 0x0000 //TX_MIC_LOC_23 +105 0x0000 //TX_MIC_LOC_24 +106 0x0000 //TX_MIC_LOC_25 +107 0x0800 //TX_MIC_REFBLK_VOLUME +108 0x0CAE //TX_MIC_BLOCK_VOLUME +109 0x0000 //TX_INVERSE_MASK +110 0x0000 //TX_ADCS_MASK +111 0x04D0 //TX_ADCS_GAIN +112 0x4000 //TX_NFC_GAINFAC +113 0x0000 //TX_MAINMIC_BLKFACTOR +114 0x0000 //TX_REFMIC_BLKFACTOR +115 0x0000 //TX_BLMIC_BLKFACTOR +116 0x0000 //TX_BRMIC_BLKFACTOR +117 0x0031 //TX_MICBLK_START_BIN +118 0x0060 //TX_MICBLK_END_BIN +119 0x0015 //TX_MICBLK_FE_HOLD +120 0xFFF2 //TX_MICBLK_MR_EXP_TH +121 0xFFF2 //TX_MICBLK_LR_EXP_TH +122 0x0015 //TX_FENE_HOLD +123 0x4000 //TX_FE_ENER_TH_MTS +124 0x0004 //TX_FE_ENER_TH_EXP +125 0x6000 //TX_C_POST_FLT_MIC_MAINBLK +126 0x6000 //TX_C_POST_FLT_MIC_REFBLK +127 0x0010 //TX_MIC_BLOCK_N +128 0x7E56 //TX_A_HP +129 0x4000 //TX_B_PE +130 0x1800 //TX_THR_PITCH_DET_0 +131 0x1000 //TX_THR_PITCH_DET_1 +132 0x0800 //TX_THR_PITCH_DET_2 +133 0x0008 //TX_PITCH_BFR_LEN +134 0x0003 //TX_SBD_PITCH_DET +135 0x0050 //TX_TD_AEC_L +136 0x4000 //TX_MU0_UNP_TD_AEC +137 0x1000 //TX_MU0_PTD_TD_AEC +138 0x0000 //TX_PP_RESRV_0 +139 0x2A94 //TX_PP_RESRV_1 +140 0x55F0 //TX_PP_RESRV_2 +141 0x0000 //TX_PP_RESRV_3 +142 0x0000 //TX_PP_RESRV_4 +143 0x0000 //TX_PP_RESRV_5 +144 0x0000 //TX_PP_RESRV_6 +145 0x0000 //TX_PP_RESRV_7 +146 0x0028 //TX_TAIL_LENGTH +147 0x0300 //TX_AEC_REF_GAIN_0 +148 0x0800 //TX_AEC_REF_GAIN_1 +149 0x0800 //TX_AEC_REF_GAIN_2 +150 0x7A00 //TX_EAD_THR +151 0x1000 //TX_THR_RE_EST +152 0x0800 //TX_MIN_EQ_RE_EST_0 +153 0x2000 //TX_MIN_EQ_RE_EST_1 +154 0x2000 //TX_MIN_EQ_RE_EST_2 +155 0x4000 //TX_MIN_EQ_RE_EST_3 +156 0x4000 //TX_MIN_EQ_RE_EST_4 +157 0x7FFF //TX_MIN_EQ_RE_EST_5 +158 0x7FFF //TX_MIN_EQ_RE_EST_6 +159 0x7FFF //TX_MIN_EQ_RE_EST_7 +160 0x7FFF //TX_MIN_EQ_RE_EST_8 +161 0x7FFF //TX_MIN_EQ_RE_EST_9 +162 0x7FFF //TX_MIN_EQ_RE_EST_10 +163 0x7FFF //TX_MIN_EQ_RE_EST_11 +164 0x7FFF //TX_MIN_EQ_RE_EST_12 +165 0x4000 //TX_LAMBDA_RE_EST +166 0x0CCD //TX_LAMBDA_CB_NLE +167 0x2000 //TX_C_POST_FLT +168 0x7FFF //TX_GAIN_NP +169 0x0180 //TX_SE_HOLD_N +170 0x00C8 //TX_DT_HOLD_N +171 0x09C4 //TX_DT2_HOLD_N +172 0x6666 //TX_AEC_RESRV_0 +173 0x0000 //TX_AEC_RESRV_1 +174 0x0014 //TX_AEC_RESRV_2 +175 0x0000 //TX_MIC_DELAY_LENGTH +176 0x0000 //TX_REF_DELAY_LENGTH +177 0x0000 //TX_ADD_LINEIN_GAINL +178 0x0000 //TX_ADD_LINEIN_GAINH +179 0x0000 //TX_MIN_EQ_RE_EST_14 +180 0x0000 //TX_DTD_THR1_8 +181 0x7FFF //TX_DTD_THR2_8 +182 0x0000 //TX_DTD_MIC_BLK2 +183 0x0008 //TX_FRQ_LIN_LEN +184 0x7FFF //TX_FRQ_AEC_LEN_RHO +185 0x6000 //TX_MU0_UNP_FRQ_AEC +186 0x4000 //TX_MU0_PTD_FRQ_AEC +187 0x000A //TX_MINENOISETH +188 0x0800 //TX_MU0_RE_EST +189 0x0001 //TX_AEC_NUM_CH +190 0x0000 //TX_BIGECHOATTENUATION_MAX +191 0x2000 //TX_A_POST_FLT_MICBLK +192 0x0000 //TX_BLKENERTH +193 0x0000 //TX_BLKENERHIGHTH +194 0x0000 //TX_NORMENERTH +195 0x0000 //TX_NORMENERHIGHTH +196 0x0000 //TX_NORMENERHIGHTHL +197 0x7D00 //TX_DTD_THR1_0 +198 0x7FF0 //TX_DTD_THR1_1 +199 0x7FF0 //TX_DTD_THR1_2 +200 0x7FF0 //TX_DTD_THR1_3 +201 0x7FF0 //TX_DTD_THR1_4 +202 0x7FF0 //TX_DTD_THR1_5 +203 0x7FF0 //TX_DTD_THR1_6 +204 0x0CCD //TX_DTD_THR2_0 +205 0x0CCD //TX_DTD_THR2_1 +206 0x0CCD //TX_DTD_THR2_2 +207 0x0CCD //TX_DTD_THR2_3 +208 0x0CCD //TX_DTD_THR2_4 +209 0x0CCD //TX_DTD_THR2_5 +210 0x0CCD //TX_DTD_THR2_6 +211 0x7FFF //TX_DTD_THR3 +212 0x0000 //TX_SPK_CUT_K +213 0x0DAC //TX_DT_CUT_K +214 0x0020 //TX_DT_CUT_THR +215 0x04EB //TX_COMFORT_G +216 0x01F4 //TX_POWER_YOUT_TH +217 0x4000 //TX_FDPFGAINECHO +218 0x0000 //TX_DTD_HD_THR +219 0x0000 //TX_SPK_CUT_K_S +220 0x7FFF //TX_DTD_MIC_BLK +221 0x023E //TX_ADPT_STRICT_L +222 0x023E //TX_ADPT_STRICT_H +223 0x0BB8 //TX_RATIO_DT_L_TH_LOW +224 0x3A98 //TX_RATIO_DT_H_TH_LOW +225 0x1770 //TX_RATIO_DT_L_TH_HIGH +226 0x4E20 //TX_RATIO_DT_H_TH_HIGH +227 0x09C4 //TX_RATIO_DT_L0_TH +228 0x2000 //TX_B_POST_FILT_ECHO_L +229 0x2000 //TX_B_POST_FILT_ECHO_H +230 0x0200 //TX_MIN_G_CTRL_ECHO +231 0x1000 //TX_B_LESSCUT_RTO_ECHO +232 0x0063 //TX_EPD_OFFSET_00 +233 0x0000 //TX_EPD_OFFST_01 +234 0x1388 //TX_RATIO_DT_L0_TH_HIGH +235 0x3A98 //TX_RATIO_DT_H_TH_CUT +236 0x7FFF //TX_MIN_EQ_RE_EST_13 +237 0x0000 //TX_DTD_THR1_7 +238 0x0000 //TX_DTD_THR2_7 +239 0x0800 //TX_DT_RESRV_7 +240 0x0800 //TX_DT_RESRV_8 +241 0x0000 //TX_DT_RESRV_9 +242 0xF800 //TX_THR_SN_EST_0 +243 0xFA00 //TX_THR_SN_EST_1 +244 0xFA00 //TX_THR_SN_EST_2 +245 0xFB00 //TX_THR_SN_EST_3 +246 0xFA00 //TX_THR_SN_EST_4 +247 0xFA00 //TX_THR_SN_EST_5 +248 0xF800 //TX_THR_SN_EST_6 +249 0xF800 //TX_THR_SN_EST_7 +250 0x0100 //TX_DELTA_THR_SN_EST_0 +251 0x0100 //TX_DELTA_THR_SN_EST_1 +252 0x0200 //TX_DELTA_THR_SN_EST_2 +253 0x0100 //TX_DELTA_THR_SN_EST_3 +254 0x0100 //TX_DELTA_THR_SN_EST_4 +255 0x0200 //TX_DELTA_THR_SN_EST_5 +256 0x0200 //TX_DELTA_THR_SN_EST_6 +257 0x0200 //TX_DELTA_THR_SN_EST_7 +258 0x4000 //TX_LAMBDA_NN_EST_0 +259 0x4000 //TX_LAMBDA_NN_EST_1 +260 0x4000 //TX_LAMBDA_NN_EST_2 +261 0x4000 //TX_LAMBDA_NN_EST_3 +262 0x4000 //TX_LAMBDA_NN_EST_4 +263 0x4000 //TX_LAMBDA_NN_EST_5 +264 0x4000 //TX_LAMBDA_NN_EST_6 +265 0x4000 //TX_LAMBDA_NN_EST_7 +266 0x0400 //TX_N_SN_EST +267 0x001E //TX_INBEAM_T +268 0x0041 //TX_INBEAMHOLDT +269 0x2000 //TX_G_STRICT +270 0x2000 //TX_EQ_THR_BF +271 0x799A //TX_LAMBDA_EQ_BF +272 0x1000 //TX_NE_RTO_TH +273 0x0400 //TX_NE_RTO_TH_L +274 0x0800 //TX_MAINREFRTOH_TH_H +275 0x0800 //TX_MAINREFRTOH_TH_L +276 0x0800 //TX_MAINREFRTO_TH_H +277 0x0800 //TX_MAINREFRTO_TH_L +278 0x0200 //TX_MAINREFRTO_TH_EQ +279 0x2000 //TX_B_POST_FLT_0 +280 0x1000 //TX_B_POST_FLT_1 +281 0x0010 //TX_NS_LVL_CTRL_0 +282 0x0014 //TX_NS_LVL_CTRL_1 +283 0x0018 //TX_NS_LVL_CTRL_2 +284 0x0016 //TX_NS_LVL_CTRL_3 +285 0x0014 //TX_NS_LVL_CTRL_4 +286 0x0011 //TX_NS_LVL_CTRL_5 +287 0x0014 //TX_NS_LVL_CTRL_6 +288 0x0011 //TX_NS_LVL_CTRL_7 +289 0x000F //TX_MIN_GAIN_S_0 +290 0x0010 //TX_MIN_GAIN_S_1 +291 0x0010 //TX_MIN_GAIN_S_2 +292 0x0010 //TX_MIN_GAIN_S_3 +293 0x0010 //TX_MIN_GAIN_S_4 +294 0x0010 //TX_MIN_GAIN_S_5 +295 0x0010 //TX_MIN_GAIN_S_6 +296 0x000F //TX_MIN_GAIN_S_7 +297 0x6000 //TX_NMOS_SUP +298 0x0000 //TX_NS_MAX_PRI_SNR_TH +299 0x0000 //TX_NMOS_SUP_MENSA +300 0x7FFF //TX_SNRI_SUP_0 +301 0x4000 //TX_SNRI_SUP_1 +302 0x4000 //TX_SNRI_SUP_2 +303 0x4000 //TX_SNRI_SUP_3 +304 0x4000 //TX_SNRI_SUP_4 +305 0x50C0 //TX_SNRI_SUP_5 +306 0x4000 //TX_SNRI_SUP_6 +307 0x7FFF //TX_SNRI_SUP_7 +308 0x7FFF //TX_THR_LFNS +309 0x0018 //TX_G_LFNS +310 0x09C4 //TX_GAIN0_NTH +311 0x000A //TX_MUSIC_MORENS +312 0x7FFF //TX_A_POST_FILT_0 +313 0x2000 //TX_A_POST_FILT_1 +314 0x5000 //TX_A_POST_FILT_S_0 +315 0x4C00 //TX_A_POST_FILT_S_1 +316 0x4000 //TX_A_POST_FILT_S_2 +317 0x6000 //TX_A_POST_FILT_S_3 +318 0x4000 //TX_A_POST_FILT_S_4 +319 0x5000 //TX_A_POST_FILT_S_5 +320 0x6000 //TX_A_POST_FILT_S_6 +321 0x7000 //TX_A_POST_FILT_S_7 +322 0x2000 //TX_B_POST_FILT_0 +323 0x2000 //TX_B_POST_FILT_1 +324 0x2000 //TX_B_POST_FILT_2 +325 0x4000 //TX_B_POST_FILT_3 +326 0x4000 //TX_B_POST_FILT_4 +327 0x1000 //TX_B_POST_FILT_5 +328 0x1000 //TX_B_POST_FILT_6 +329 0x2000 //TX_B_POST_FILT_7 +330 0x4000 //TX_B_LESSCUT_RTO_S_0 +331 0x7FFF //TX_B_LESSCUT_RTO_S_1 +332 0x7FFF //TX_B_LESSCUT_RTO_S_2 +333 0x7FFF //TX_B_LESSCUT_RTO_S_3 +334 0x7FFF //TX_B_LESSCUT_RTO_S_4 +335 0x6000 //TX_B_LESSCUT_RTO_S_5 +336 0x7FFF //TX_B_LESSCUT_RTO_S_6 +337 0x7FFF //TX_B_LESSCUT_RTO_S_7 +338 0x7C00 //TX_LAMBDA_PFILT +339 0x7C00 //TX_LAMBDA_PFILT_S_0 +340 0x7C00 //TX_LAMBDA_PFILT_S_1 +341 0x7A00 //TX_LAMBDA_PFILT_S_2 +342 0x7C00 //TX_LAMBDA_PFILT_S_3 +343 0x7C00 //TX_LAMBDA_PFILT_S_4 +344 0x7C00 //TX_LAMBDA_PFILT_S_5 +345 0x7C00 //TX_LAMBDA_PFILT_S_6 +346 0x7C00 //TX_LAMBDA_PFILT_S_7 +347 0x0000 //TX_K_PEPPER +348 0x0800 //TX_A_PEPPER +349 0x1EAA //TX_K_PEPPER_HF +350 0x0600 //TX_A_PEPPER_HF +351 0x0001 //TX_HMNC_BST_FLG +352 0x0200 //TX_HMNC_BST_THR +353 0x0200 //TX_DT_BINVAD_TH_0 +354 0x0200 //TX_DT_BINVAD_TH_1 +355 0x0200 //TX_DT_BINVAD_TH_2 +356 0x0200 //TX_DT_BINVAD_TH_3 +357 0x1F40 //TX_DT_BINVAD_ENDF +358 0x0100 //TX_C_POST_FLT_DT +359 0x0CCD //TX_NS_B_POST_FLT_LESSCUT +360 0x0100 //TX_DT_BOOST +361 0x0000 //TX_BF_SGRAD_FLG +362 0x0005 //TX_BF_DVG_TH +363 0x001E //TX_SN_C_F +364 0x0000 //TX_K_APT +365 0x0001 //TX_NOISEDET +366 0x0064 //TX_NDETCT +367 0x0050 //TX_NOISE_TH_0 +368 0x7FFF //TX_NOISE_TH_0_2 +369 0x7FFF //TX_NOISE_TH_0_3 +370 0x07D0 //TX_NOISE_TH_1 +371 0x0DAC //TX_NOISE_TH_2 +372 0x4E20 //TX_NOISE_TH_3 +373 0x4E20 //TX_NOISE_TH_4 +374 0x59D8 //TX_NOISE_TH_5 +375 0x7FFF //TX_NOISE_TH_5_2 +376 0x0000 //TX_NOISE_TH_5_3 +377 0x7FFF //TX_NOISE_TH_5_4 +378 0x2710 //TX_NOISE_TH_6 +379 0x0033 //TX_MINENOISE_TH +380 0xD508 //TX_MORENS_TFMASK_TH +381 0x0001 //TX_DRC_QUIET_FLOOR +382 0x7999 //TX_RATIODTL_CUT_TH +383 0x0119 //TX_DT_CUT_K1 +384 0x0666 //TX_OUT_ENER_S_TH_CLEAN +385 0x0666 //TX_OUT_ENER_S_TH_LESSCLEAN +386 0x0333 //TX_OUT_ENER_S_TH_NOISY +387 0x019A //TX_OUT_ENER_TH_NOISE +388 0x0333 //TX_OUT_ENER_TH_SPEECH +389 0x2000 //TX_SN_NPB_GAIN +390 0x0000 //TX_NN_NPB_GAIN +391 0x7FFF //TX_POST_MASK_SUP_HSNE +392 0x1388 //TX_TAIL_DET_TH +393 0x4000 //TX_B_LESSCUT_RTO_WTA +394 0x0000 //TX_MEL_G_R +395 0x0080 //TX_SUPHIGH_TH +396 0x0000 //TX_MASK_G_R +397 0x0002 //TX_EXTRA_NS_L +398 0x1800 //TX_C_POST_FLT_MASK +399 0x4000 //TX_A_POST_FLT_WNS +400 0x0148 //TX_MIN_G_LOW300HZ +401 0x0002 //TX_MAXLEVEL_CNG +402 0x00B4 //TX_STN_NOISE_TH +403 0x4000 //TX_POST_MASK_SUP +404 0x7FFF //TX_POST_MASK_ADJUST +405 0x00C8 //TX_NS_ENOISE_MIC0_TH +406 0x0033 //TX_MINENOISE_MIC0_TH +407 0x012C //TX_MINENOISE_MIC0_S_TH +408 0x7FFF //TX_MIN_G_CTRL_SSNS +409 0x0000 //TX_METAL_RTO_THR +410 0x4848 //TX_NS_FP_K_METAL +411 0x3A98 //TX_NOISEDET_BOOST_TH +412 0x0FA0 //TX_NSMOOTH_TH +413 0x0000 //TX_NS_RESRV_8 +414 0x1800 //TX_RHO_UPB +415 0x0BB8 //TX_N_HOLD_HS +416 0x0050 //TX_N_RHO_BFR0 +417 0x7FFF //TX_LAMBDA_ARSP_EST +418 0x0100 //TX_EXTRA_GAIN_MICBLOCK +419 0x0CCD //TX_THR_STD_NSR +420 0x019A //TX_THR_STD_PLH +421 0x2AF8 //TX_N_HOLD_STD +422 0x0066 //TX_THR_STD_RHO +423 0x2000 //TX_BF_RESET_THR_HS +424 0x09C4 //TX_SB_RTO_MEAN_TH +425 0x0000 //TX_SB_RHO_MEAN_TH_NTALK +426 0x3800 //TX_SB_RTO_MEAN_TH_ABN +427 0x2EE0 //TX_SB_RTO_MEAN_TH_RUB +428 0x0000 //TX_WTA_EN_RTO_TH +429 0x0000 //TX_TOP_ENER_TH_F +430 0x0000 //TX_DESIRED_TALK_HOLDT +431 0x0800 //TX_MIC_BLOCK_FACTOR +432 0x0000 //TX_NSEST_BFRLRNRDC +433 0x0000 //TX_THR_POST_FLT_HS +434 0x0010 //TX_HS_VAD_BIN +435 0x2666 //TX_THR_VAD_HS +436 0x2CCD //TX_MEAN_RTO_MIN_TH2 +437 0x0032 //TX_SILENCE_T +438 0x0000 //TX_A_POST_FLT_WTA +439 0x799A //TX_LAMBDA_PFLT_WTA +440 0x0000 //TX_SB_RHO_MEAN2_TH +441 0x0190 //TX_SB_RHO_MEAN3_TH +442 0x0000 //TX_HS_RESRV_4 +443 0x0000 //TX_HS_RESRV_5 +444 0x003C //TX_DOA_VAD_THR_1 +445 0x0000 //TX_DOA_VAD_THR_2 +446 0x0028 //TX_DOA_VAD_THR1_0 +447 0x0028 //TX_DOA_VAD_THR1_1 +448 0x0000 //TX_SRC_DOA_RNG_LOW_0A +449 0x00B4 //TX_SRC_DOA_RNG_HIGH_0A +450 0x005A //TX_DFLT_SRC_DOA_0A +451 0x0000 //TX_SRC_DOA_RNG_LOW_0B +452 0x0000 //TX_SRC_DOA_RNG_HIGH_0B +453 0x0000 //TX_DFLT_SRC_DOA_0B +454 0x0000 //TX_SRC_DOA_RNG_LOW_0C +455 0x0000 //TX_SRC_DOA_RNG_HIGH_0C +456 0x0000 //TX_DFLT_SRC_DOA_0C +457 0x0000 //TX_SRC_DOA_RNG_LOW_0D +458 0x0000 //TX_SRC_DOA_RNG_HIGH_0D +459 0x0000 //TX_DFLT_SRC_DOA_0D +460 0x0000 //TX_SRC_DOA_RNG_LOW_1A +461 0x00B4 //TX_SRC_DOA_RNG_HIGH_1A +462 0x005A //TX_DFLT_SRC_DOA_1A +463 0x0000 //TX_SRC_DOA_RNG_LOW_1B +464 0x00B4 //TX_SRC_DOA_RNG_HIGH_1B +465 0x005A //TX_DFLT_SRC_DOA_1B +466 0x0000 //TX_SRC_DOA_RNG_LOW_1C +467 0x00B4 //TX_SRC_DOA_RNG_HIGH_1C +468 0x005A //TX_DFLT_SRC_DOA_1C +469 0x0000 //TX_SRC_DOA_RNG_LOW_1D +470 0x00B4 //TX_SRC_DOA_RNG_HIGH_1D +471 0x005A //TX_DFLT_SRC_DOA_1D +472 0x0100 //TX_BF_HOLDOFF_T +473 0x7FFF //TX_DOA_COST_FACTOR +474 0x4000 //TX_MAINTOREFR_TH0 +475 0x071C //TX_DOA_TRK_THR +476 0x012C //TX_DOA_TRACK_HT +477 0x0200 //TX_N1_HOLD_HF +478 0x0100 //TX_N2_HOLD_HF +479 0x3000 //TX_BF_RESET_THR_HF +480 0x7333 //TX_DOA_SMOOTH +481 0x0800 //TX_MU_BF +482 0x0800 //TX_BF_MU_LF_B2 +483 0x0040 //TX_BF_FC_END_BIN_B2 +484 0x0020 //TX_BF_FC_END_BIN +485 0x0000 //TX_HF_RESRV_25 +486 0x0000 //TX_HF_RESRV_26 +487 0x0007 //TX_N_DOA_SEED +488 0x0001 //TX_FINE_DOA_SEARCH_FLG +489 0x0000 //TX_HF_RESRV_27 +490 0x038E //TX_DLT_SRC_DOA_RNG +491 0x0200 //TX_BF_MU_LF +492 0x0000 //TX_DFLT_SRC_LOC_0 +493 0x7FFF //TX_DFLT_SRC_LOC_1 +494 0x0000 //TX_DFLT_SRC_LOC_2 +495 0x038E //TX_DOA_TRACK_VADTH +496 0x0000 //TX_DOA_TRACK_NEW +497 0x0230 //TX_NOR_OFF_THR +498 0x0CCD //TX_MORE_ON_700HZ_THR +499 0x2000 //TX_MU_BF_ADPT_NS +500 0x0000 //TX_ADAPT_LEN +501 0x2000 //TX_MORE_SNS +502 0x0000 //TX_NOR_OFF_TH1 +503 0x0000 //TX_WIDE_MASK_TH +504 0x4650 //TX_SUBSNRATIOHIGH4MEANBCK_THR +505 0x7FFF //TX_C_POST_FLT_CUT +506 0x2000 //TX_RADIODTLV +507 0x0320 //TX_POWER_LINEIN_TH +508 0x0014 //TX_FE_VADCOUNT_TH_FC +509 0x0000 //TX_ECHO_SUPP_FC +510 0x0C80 //TX_ECHO_TH +511 0x6666 //TX_MIC_TO_BFGAIN +512 0x0000 //TX_MICTOBFGAIN0 +513 0x0000 //TX_FASTMUE_TH +514 0x3000 //TX_DEREVERB_LF_MU +515 0x34CD //TX_DEREVERB_HF_MU +516 0x0007 //TX_DEREVERB_DELAY +517 0x0004 //TX_DEREVERB_COEF_LEN +518 0x0003 //TX_DEREVERB_DNR +519 0x0000 //TX_DEREVERB_ALPHA +520 0x0000 //TX_DEREVERB_BETA +521 0x3A98 //TX_GSC_RTOL_TH +522 0x3A98 //TX_GSC_RTOH_TH +523 0x7E2C //TX_WIDE2_MEANHTH +524 0x0000 //TX_DR_RESRV_5 +525 0x0000 //TX_DR_RESRV_6 +526 0x0000 //TX_DR_RESRV_7 +527 0x0000 //TX_DR_RESRV_8 +528 0x1333 //TX_WIND_MARK_TH +529 0x399A //TX_CORR_THR +530 0x0004 //TX_SNR_THR +531 0x0010 //TX_ENGY_THR +532 0x1770 //TX_CORR_HIGH_TH +533 0x6000 //TX_ENGY_THR_2 +534 0x3400 //TX_MEAN_RTO_THR +535 0x0028 //TX_WNS_ENOISE_MIC0_TH +536 0x3000 //TX_RATIOMICL_TH +537 0x64CD //TX_CALIG_HS +538 0x0000 //TX_LVL_CTRL +539 0x0014 //TX_WIND_SUPRTO +540 0x000A //TX_WNS_MIN_G +541 0x0000 //TX_WNS_B_POST_FLT +542 0x2800 //TX_RATIOMICH_TH +543 0xD120 //TX_WIND_INBEAM_L_TH +544 0x0FA0 //TX_WIND_INBEAM_H_TH +545 0x2000 //TX_WNS_RESRV_0 +546 0x59D8 //TX_WNS_RESRV_1 +547 0x0000 //TX_WNS_RESRV_2 +548 0x0000 //TX_WNS_RESRV_3 +549 0x0000 //TX_WNS_RESRV_4 +550 0x0000 //TX_WNS_RESRV_5 +551 0x0000 //TX_WNS_RESRV_6 +552 0x0000 //TX_PB_B_POST_FLT_LESSCUT +553 0x0070 //TX_BF_LESSCUT_BBIN +554 0x0070 //TX_BF_LESSCUT_EBIN +555 0x0010 //TX_POSTBFB0 +556 0x0070 //TX_POSTBFB +557 0x00B0 //TX_POSTBFE +558 0x0E66 //TX_SPEECH_SNR_TH +559 0x0050 //TX_PB_MAX_PRI_SNR_TH +560 0x770A //TX_MAX_PRI_SNR_TH_L +561 0x0000 //TX_PFGAIN +562 0x0000 //TX_MAINTOREFR_TH +563 0x0000 //TX_SAM_MARK +564 0x0000 //TX_PB_RESRV_0 +565 0x0000 //TX_PB_RESRV_1 +566 0x0020 //TX_FDEQ_SUBNUM +567 0x4848 //TX_FDEQ_GAIN_0 +568 0x4848 //TX_FDEQ_GAIN_1 +569 0x4848 //TX_FDEQ_GAIN_2 +570 0x4848 //TX_FDEQ_GAIN_3 +571 0x4848 //TX_FDEQ_GAIN_4 +572 0x4848 //TX_FDEQ_GAIN_5 +573 0x4848 //TX_FDEQ_GAIN_6 +574 0x4848 //TX_FDEQ_GAIN_7 +575 0x4848 //TX_FDEQ_GAIN_8 +576 0x4853 //TX_FDEQ_GAIN_9 +577 0x5450 //TX_FDEQ_GAIN_10 +578 0x7465 //TX_FDEQ_GAIN_11 +579 0x807F //TX_FDEQ_GAIN_12 +580 0x82C4 //TX_FDEQ_GAIN_13 +581 0xC4C4 //TX_FDEQ_GAIN_14 +582 0xC4C4 //TX_FDEQ_GAIN_15 +583 0x4848 //TX_FDEQ_GAIN_16 +584 0x4848 //TX_FDEQ_GAIN_17 +585 0x4848 //TX_FDEQ_GAIN_18 +586 0x4848 //TX_FDEQ_GAIN_19 +587 0x4848 //TX_FDEQ_GAIN_20 +588 0x4848 //TX_FDEQ_GAIN_21 +589 0x4848 //TX_FDEQ_GAIN_22 +590 0x4848 //TX_FDEQ_GAIN_23 +591 0x0202 //TX_FDEQ_BIN_0 +592 0x0203 //TX_FDEQ_BIN_1 +593 0x0304 //TX_FDEQ_BIN_2 +594 0x0405 //TX_FDEQ_BIN_3 +595 0x0607 //TX_FDEQ_BIN_4 +596 0x0809 //TX_FDEQ_BIN_5 +597 0x0A0B //TX_FDEQ_BIN_6 +598 0x0C0D //TX_FDEQ_BIN_7 +599 0x0E0F //TX_FDEQ_BIN_8 +600 0x1011 //TX_FDEQ_BIN_9 +601 0x1214 //TX_FDEQ_BIN_10 +602 0x1618 //TX_FDEQ_BIN_11 +603 0x1C1C //TX_FDEQ_BIN_12 +604 0x2020 //TX_FDEQ_BIN_13 +605 0x2020 //TX_FDEQ_BIN_14 +606 0x2011 //TX_FDEQ_BIN_15 +607 0x0000 //TX_FDEQ_BIN_16 +608 0x0000 //TX_FDEQ_BIN_17 +609 0x0000 //TX_FDEQ_BIN_18 +610 0x0000 //TX_FDEQ_BIN_19 +611 0x0000 //TX_FDEQ_BIN_20 +612 0x0000 //TX_FDEQ_BIN_21 +613 0x0000 //TX_FDEQ_BIN_22 +614 0x0000 //TX_FDEQ_BIN_23 +615 0x0000 //TX_FDEQ_PADDING +616 0x0020 //TX_PREEQ_SUBNUM_MIC0 +617 0x4848 //TX_PREEQ_GAIN_MIC0_0 +618 0x4848 //TX_PREEQ_GAIN_MIC0_1 +619 0x4848 //TX_PREEQ_GAIN_MIC0_2 +620 0x4848 //TX_PREEQ_GAIN_MIC0_3 +621 0x4848 //TX_PREEQ_GAIN_MIC0_4 +622 0x4848 //TX_PREEQ_GAIN_MIC0_5 +623 0x4A4C //TX_PREEQ_GAIN_MIC0_6 +624 0x4E50 //TX_PREEQ_GAIN_MIC0_7 +625 0x5456 //TX_PREEQ_GAIN_MIC0_8 +626 0x585C //TX_PREEQ_GAIN_MIC0_9 +627 0x5C64 //TX_PREEQ_GAIN_MIC0_10 +628 0x7478 //TX_PREEQ_GAIN_MIC0_11 +629 0x705C //TX_PREEQ_GAIN_MIC0_12 +630 0x4838 //TX_PREEQ_GAIN_MIC0_13 +631 0x3C70 //TX_PREEQ_GAIN_MIC0_14 +632 0x4848 //TX_PREEQ_GAIN_MIC0_15 +633 0x4848 //TX_PREEQ_GAIN_MIC0_16 +634 0x4848 //TX_PREEQ_GAIN_MIC0_17 +635 0x4848 //TX_PREEQ_GAIN_MIC0_18 +636 0x4848 //TX_PREEQ_GAIN_MIC0_19 +637 0x4848 //TX_PREEQ_GAIN_MIC0_20 +638 0x4848 //TX_PREEQ_GAIN_MIC0_21 +639 0x4848 //TX_PREEQ_GAIN_MIC0_22 +640 0x4848 //TX_PREEQ_GAIN_MIC0_23 +641 0x0202 //TX_PREEQ_BIN_MIC0_0 +642 0x0203 //TX_PREEQ_BIN_MIC0_1 +643 0x0303 //TX_PREEQ_BIN_MIC0_2 +644 0x0304 //TX_PREEQ_BIN_MIC0_3 +645 0x0405 //TX_PREEQ_BIN_MIC0_4 +646 0x0506 //TX_PREEQ_BIN_MIC0_5 +647 0x0708 //TX_PREEQ_BIN_MIC0_6 +648 0x0909 //TX_PREEQ_BIN_MIC0_7 +649 0x090B //TX_PREEQ_BIN_MIC0_8 +650 0x0C10 //TX_PREEQ_BIN_MIC0_9 +651 0x1013 //TX_PREEQ_BIN_MIC0_10 +652 0x1414 //TX_PREEQ_BIN_MIC0_11 +653 0x1414 //TX_PREEQ_BIN_MIC0_12 +654 0x1C1E //TX_PREEQ_BIN_MIC0_13 +655 0x1E28 //TX_PREEQ_BIN_MIC0_14 +656 0x462C //TX_PREEQ_BIN_MIC0_15 +657 0x0000 //TX_PREEQ_BIN_MIC0_16 +658 0x0000 //TX_PREEQ_BIN_MIC0_17 +659 0x0000 //TX_PREEQ_BIN_MIC0_18 +660 0x0000 //TX_PREEQ_BIN_MIC0_19 +661 0x0000 //TX_PREEQ_BIN_MIC0_20 +662 0x0000 //TX_PREEQ_BIN_MIC0_21 +663 0x0000 //TX_PREEQ_BIN_MIC0_22 +664 0x0000 //TX_PREEQ_BIN_MIC0_23 +665 0x0030 //TX_PREEQ_SUBNUM_MIC1 +666 0x4848 //TX_PREEQ_GAIN_MIC1_0 +667 0x4848 //TX_PREEQ_GAIN_MIC1_1 +668 0x4848 //TX_PREEQ_GAIN_MIC1_2 +669 0x4848 //TX_PREEQ_GAIN_MIC1_3 +670 0x4848 //TX_PREEQ_GAIN_MIC1_4 +671 0x4848 //TX_PREEQ_GAIN_MIC1_5 +672 0x4848 //TX_PREEQ_GAIN_MIC1_6 +673 0x4848 //TX_PREEQ_GAIN_MIC1_7 +674 0x4848 //TX_PREEQ_GAIN_MIC1_8 +675 0x4848 //TX_PREEQ_GAIN_MIC1_9 +676 0x4848 //TX_PREEQ_GAIN_MIC1_10 +677 0x4848 //TX_PREEQ_GAIN_MIC1_11 +678 0x4848 //TX_PREEQ_GAIN_MIC1_12 +679 0x4848 //TX_PREEQ_GAIN_MIC1_13 +680 0x4848 //TX_PREEQ_GAIN_MIC1_14 +681 0x4848 //TX_PREEQ_GAIN_MIC1_15 +682 0x4848 //TX_PREEQ_GAIN_MIC1_16 +683 0x4848 //TX_PREEQ_GAIN_MIC1_17 +684 0x4848 //TX_PREEQ_GAIN_MIC1_18 +685 0x4848 //TX_PREEQ_GAIN_MIC1_19 +686 0x4848 //TX_PREEQ_GAIN_MIC1_20 +687 0x4848 //TX_PREEQ_GAIN_MIC1_21 +688 0x4848 //TX_PREEQ_GAIN_MIC1_22 +689 0x4848 //TX_PREEQ_GAIN_MIC1_23 +690 0x1812 //TX_PREEQ_BIN_MIC1_0 +691 0x0A0A //TX_PREEQ_BIN_MIC1_1 +692 0x0808 //TX_PREEQ_BIN_MIC1_2 +693 0x080A //TX_PREEQ_BIN_MIC1_3 +694 0x0B09 //TX_PREEQ_BIN_MIC1_4 +695 0x0A06 //TX_PREEQ_BIN_MIC1_5 +696 0x0606 //TX_PREEQ_BIN_MIC1_6 +697 0x0605 //TX_PREEQ_BIN_MIC1_7 +698 0x050A //TX_PREEQ_BIN_MIC1_8 +699 0x1505 //TX_PREEQ_BIN_MIC1_9 +700 0x0506 //TX_PREEQ_BIN_MIC1_10 +701 0x0615 //TX_PREEQ_BIN_MIC1_11 +702 0x1516 //TX_PREEQ_BIN_MIC1_12 +703 0x2021 //TX_PREEQ_BIN_MIC1_13 +704 0x2021 //TX_PREEQ_BIN_MIC1_14 +705 0x2021 //TX_PREEQ_BIN_MIC1_15 +706 0x0800 //TX_PREEQ_BIN_MIC1_16 +707 0x0000 //TX_PREEQ_BIN_MIC1_17 +708 0x0000 //TX_PREEQ_BIN_MIC1_18 +709 0x0000 //TX_PREEQ_BIN_MIC1_19 +710 0x0000 //TX_PREEQ_BIN_MIC1_20 +711 0x0000 //TX_PREEQ_BIN_MIC1_21 +712 0x0000 //TX_PREEQ_BIN_MIC1_22 +713 0x0000 //TX_PREEQ_BIN_MIC1_23 +714 0x0020 //TX_PREEQ_SUBNUM_MIC2 +715 0x4848 //TX_PREEQ_GAIN_MIC2_0 +716 0x4848 //TX_PREEQ_GAIN_MIC2_1 +717 0x4848 //TX_PREEQ_GAIN_MIC2_2 +718 0x4848 //TX_PREEQ_GAIN_MIC2_3 +719 0x4848 //TX_PREEQ_GAIN_MIC2_4 +720 0x4848 //TX_PREEQ_GAIN_MIC2_5 +721 0x4848 //TX_PREEQ_GAIN_MIC2_6 +722 0x4848 //TX_PREEQ_GAIN_MIC2_7 +723 0x4848 //TX_PREEQ_GAIN_MIC2_8 +724 0x4848 //TX_PREEQ_GAIN_MIC2_9 +725 0x4848 //TX_PREEQ_GAIN_MIC2_10 +726 0x4848 //TX_PREEQ_GAIN_MIC2_11 +727 0x4848 //TX_PREEQ_GAIN_MIC2_12 +728 0x4848 //TX_PREEQ_GAIN_MIC2_13 +729 0x4848 //TX_PREEQ_GAIN_MIC2_14 +730 0x4848 //TX_PREEQ_GAIN_MIC2_15 +731 0x4848 //TX_PREEQ_GAIN_MIC2_16 +732 0x4848 //TX_PREEQ_GAIN_MIC2_17 +733 0x4848 //TX_PREEQ_GAIN_MIC2_18 +734 0x4848 //TX_PREEQ_GAIN_MIC2_19 +735 0x4848 //TX_PREEQ_GAIN_MIC2_20 +736 0x4848 //TX_PREEQ_GAIN_MIC2_21 +737 0x4848 //TX_PREEQ_GAIN_MIC2_22 +738 0x4848 //TX_PREEQ_GAIN_MIC2_23 +739 0x0E10 //TX_PREEQ_BIN_MIC2_0 +740 0x1010 //TX_PREEQ_BIN_MIC2_1 +741 0x1010 //TX_PREEQ_BIN_MIC2_2 +742 0x1010 //TX_PREEQ_BIN_MIC2_3 +743 0x1010 //TX_PREEQ_BIN_MIC2_4 +744 0x1010 //TX_PREEQ_BIN_MIC2_5 +745 0x1010 //TX_PREEQ_BIN_MIC2_6 +746 0x1010 //TX_PREEQ_BIN_MIC2_7 +747 0x1010 //TX_PREEQ_BIN_MIC2_8 +748 0x1010 //TX_PREEQ_BIN_MIC2_9 +749 0x1010 //TX_PREEQ_BIN_MIC2_10 +750 0x1010 //TX_PREEQ_BIN_MIC2_11 +751 0x1010 //TX_PREEQ_BIN_MIC2_12 +752 0x1010 //TX_PREEQ_BIN_MIC2_13 +753 0x1010 //TX_PREEQ_BIN_MIC2_14 +754 0x0200 //TX_PREEQ_BIN_MIC2_15 +755 0x0000 //TX_PREEQ_BIN_MIC2_16 +756 0x0000 //TX_PREEQ_BIN_MIC2_17 +757 0x0000 //TX_PREEQ_BIN_MIC2_18 +758 0x0000 //TX_PREEQ_BIN_MIC2_19 +759 0x0000 //TX_PREEQ_BIN_MIC2_20 +760 0x0000 //TX_PREEQ_BIN_MIC2_21 +761 0x0000 //TX_PREEQ_BIN_MIC2_22 +762 0x0000 //TX_PREEQ_BIN_MIC2_23 +763 0x0006 //TX_MASKING_ABILITY +764 0x2000 //TX_NND_WEIGHT +765 0x0060 //TX_MIC_CALIBRATION_0 +766 0x0060 //TX_MIC_CALIBRATION_1 +767 0x0070 //TX_MIC_CALIBRATION_2 +768 0x0070 //TX_MIC_CALIBRATION_3 +769 0x0050 //TX_MIC_PWR_BIAS_0 +770 0x0040 //TX_MIC_PWR_BIAS_1 +771 0x0040 //TX_MIC_PWR_BIAS_2 +772 0x0040 //TX_MIC_PWR_BIAS_3 +773 0x0009 //TX_GAIN_LIMIT_0 +774 0x000F //TX_GAIN_LIMIT_1 +775 0x000F //TX_GAIN_LIMIT_2 +776 0x000F //TX_GAIN_LIMIT_3 +777 0x7F5B //TX_BVE_NOVAD0_ALPHADOWN +778 0x7FDE //TX_BVE_VAD0_ALPHAUP +779 0x7F3A //TX_BVE_VAD0_ALPHADOWN +780 0x2000 //TX_BVE_GAINWEIGHT_NOFEVADLI +781 0x7F5B //TX_BVE_FEVADLI_ALPHA +782 0x7F19 //TX_BVE_NOVAD0_ALPHAUP +783 0x0C00 //TX_TDDRC_ALPHA_UP_01 +784 0x0C00 //TX_TDDRC_ALPHA_UP_02 +785 0x0C00 //TX_TDDRC_ALPHA_UP_03 +786 0x0C00 //TX_TDDRC_ALPHA_UP_04 +787 0x7EB8 //TX_TDDRC_ALPHA_DWN_01 +788 0x7EB8 //TX_TDDRC_ALPHA_DWN_02 +789 0x7EB8 //TX_TDDRC_ALPHA_DWN_03 +790 0x7EB8 //TX_TDDRC_ALPHA_DWN_04 +791 0x7FFF //TX_TDDRC_TD_DRC_LIMIT +792 0x0800 //TX_TDDRC_POST_LIMIT_GAIN +793 0x0000 //TX_TDDRC_RESRV_0 +794 0x0000 //TX_TDDRC_RESRV_1 +795 0x0018 //TX_FDDRC_BAND_MARGIN_0 +796 0x0030 //TX_FDDRC_BAND_MARGIN_1 +797 0x0050 //TX_FDDRC_BAND_MARGIN_2 +798 0x0080 //TX_FDDRC_BAND_MARGIN_3 +799 0x0007 //TX_FDDRC_BLOCK_EXP +800 0x5000 //TX_FDDRC_THRD_2_0 +801 0x5000 //TX_FDDRC_THRD_2_1 +802 0x5000 //TX_FDDRC_THRD_2_2 +803 0x5000 //TX_FDDRC_THRD_2_3 +804 0x6400 //TX_FDDRC_THRD_3_0 +805 0x6400 //TX_FDDRC_THRD_3_1 +806 0x6400 //TX_FDDRC_THRD_3_2 +807 0x6400 //TX_FDDRC_THRD_3_3 +808 0x2000 //TX_FDDRC_SLANT_0_0 +809 0x2000 //TX_FDDRC_SLANT_0_1 +810 0x2000 //TX_FDDRC_SLANT_0_2 +811 0x2000 //TX_FDDRC_SLANT_0_3 +812 0x5333 //TX_FDDRC_SLANT_1_0 +813 0x5333 //TX_FDDRC_SLANT_1_1 +814 0x5333 //TX_FDDRC_SLANT_1_2 +815 0x5333 //TX_FDDRC_SLANT_1_3 +816 0x0010 //TX_DEADMIC_SILENCE_TH +817 0x0600 //TX_MIC_DEGRADE_TH +818 0x0078 //TX_DEADMIC_CNT +819 0x0078 //TX_MIC_DEGRADE_CNT +820 0x0000 //TX_FDDRC_RESRV_4 +821 0x0000 //TX_FDDRC_RESRV_5 +822 0x0000 //TX_FDDRC_RESRV_6 +823 0x7FFF //TX_KS_NOISEPASTE_FACTOR +824 0x0001 //TX_KS_CONFIG +825 0x7FFF //TX_KS_GAIN_MIN +826 0x0000 //TX_KS_RESRV_0 +827 0x0000 //TX_KS_RESRV_1 +828 0x0000 //TX_KS_RESRV_2 +829 0x7C00 //TX_LAMBDA_PKA_FP +830 0x2000 //TX_TPKA_FP +831 0x0080 //TX_MIN_G_FP +832 0x2000 //TX_MAX_G_FP +833 0x4848 //TX_FFP_FP_K_METAL +834 0x4000 //TX_A_POST_FLT_FP +835 0x0F5C //TX_RTO_OUTBEAM_TH +836 0x4CCD //TX_TPKA_FP_THD +837 0x0000 //TX_MAX_G_FP_BLK +838 0x0000 //TX_FFP_FADEIN +839 0x0000 //TX_FFP_FADEOUT +840 0x0000 //TX_WHISPERCTH +841 0x0000 //TX_WHISPERHOLDT +842 0x0000 //TX_WHISP_ENTHH +843 0x0000 //TX_WHISP_ENTHL +844 0x0000 //TX_WHISP_RTOTH +845 0x0000 //TX_WHISP_RTOTH2 +846 0x0096 //TX_MUTE_PERIOD +847 0x0000 //TX_FADE_IN_PERIOD +848 0x0100 //TX_FFP_RESRV_2 +849 0x0020 //TX_FFP_RESRV_3 +850 0x0000 //TX_FFP_RESRV_4 +851 0x0000 //TX_FFP_RESRV_5 +852 0x0000 //TX_FFP_RESRV_6 +853 0x0004 //TX_FILTINDX +854 0x0004 //TX_TDDRC_THRD_0 +855 0x0016 //TX_TDDRC_THRD_1 +856 0x1900 //TX_TDDRC_THRD_2 +857 0x1900 //TX_TDDRC_THRD_3 +858 0x3000 //TX_TDDRC_SLANT_0 +859 0x7B00 //TX_TDDRC_SLANT_1 +860 0x0C00 //TX_TDDRC_ALPHA_UP_00 +861 0x7EB8 //TX_TDDRC_ALPHA_DWN_00 +862 0x0000 //TX_TDDRC_HMNC_FLAG +863 0x199A //TX_TDDRC_HMNC_GAIN +864 0x0000 //TX_TDDRC_SMT_FLAG +865 0x0CCD //TX_TDDRC_SMT_W +866 0x0A98 //TX_TDDRC_DRC_GAIN +867 0x7FFF //TX_TDDRC_LMT_THRD +868 0x0000 //TX_TDDRC_LMT_ALPHA +869 0x0000 //TX_TFMASKLTH +870 0x0000 //TX_TFMASKLTHL +871 0x0CCD //TX_TFMASKHTH +872 0x0CCD //TX_TFMASKLTH_BINVAD +873 0xF333 //TX_TFMASKLTH_NS_EST +874 0x2CCD //TX_TFMASKLTH_DOA +875 0xECCD //TX_TFMASKTH_BLESSCUT +876 0x1000 //TX_B_LESSCUT_RTO_MASK +877 0x3800 //TX_SB_RHO_MEAN_TH_ABN +878 0x2000 //TX_B_POST_FLT_MASK +879 0x0000 //TX_B_POST_FLT_MASK1 +880 0x5333 //TX_GAIN_WIND_MASK +881 0x7FFF //TX_TFMASK_BFSTRICT_MUSIC +882 0x0000 //TX_TFMASK_BFSTRICT_NOMUSIC +883 0x7333 //TX_FASTNS_OUTIN_TH +884 0x0CCD //TX_FASTNS_TFMASK_TH +885 0x0CCD //TX_FASTNS_TFMASKBIN_TH1 +886 0x0CCD //TX_FASTNS_TFMASKBIN_TH2 +887 0x0CCD //TX_FASTNS_TFMASKBIN_TH3 +888 0x0028 //TX_FASTNS_ARSPC_TH +889 0xC000 //TX_FASTNS_MASK5_TH +890 0x4848 //TX_POSTSSA_MIN_G_VR_MASK +891 0x1000 //TX_A_LESSCUT_RTO_MASK +892 0x1770 //TX_FASTNS_NOISETH +893 0xC000 //TX_FASTNS_SSA_THLFL +894 0xC000 //TX_FASTNS_SSA_THHFL +895 0xCCCC //TX_FASTNS_SSA_THLFH +896 0xD999 //TX_FASTNS_SSA_THHFH +897 0x2339 //TX_SENDFUNC_REG_MICMUTE +898 0x0021 //TX_SENDFUNC_REG_MICMUTE1 +899 0x02BC //TX_MICMUTE_RATIO_THR +900 0x0140 //TX_MICMUTE_AMP_THR +901 0x0004 //TX_MICMUTE_HPF_IND +902 0x00C0 //TX_MICMUTE_LOG_EYR_TH +903 0x0008 //TX_MICMUTE_CVG_TIME +904 0x0008 //TX_MICMUTE_RELEASE_TIME +905 0x01FE //TX_MIC_VOLUME_MIC0MUTE +906 0x0020 //TX_MICMUTE_EPD_OFFSET_0 +907 0x001E //TX_MICMUTE_FRQ_AEC_L +908 0x7999 //TX_MICMUTE_EAD_THR +909 0x7FFF //TX_MICMUTE_LAMBDA_CB_NLE +910 0x7FFF //TX_MICMUTE_LAMBDA_RE_EST +911 0x4000 //TX_DTD_THR1_MICMUTE_0 +912 0x7000 //TX_DTD_THR1_MICMUTE_1 +913 0x7FFF //TX_DTD_THR1_MICMUTE_2 +914 0x7FFF //TX_DTD_THR1_MICMUTE_3 +915 0x6CCC //TX_DTD_THR2_MICMUTE_0 +916 0x0400 //TX_MICMUTE_MIN_EQ_RE_EST_0 +917 0x0400 //TX_MICMUTE_MIN_EQ_RE_EST_1 +918 0x1000 //TX_MICMUTE_MIN_EQ_RE_EST_2 +919 0x7FFF //TX_MICMUTE_MIN_EQ_RE_EST_3 +920 0x7FFF //TX_MICMUTE_MIN_EQ_RE_EST_4 +921 0x4000 //TX_MICMUTE_C_POST_FLT +922 0x03E8 //TX_MICMUTE_DT_CUT_K +923 0x0001 //TX_MICMUTE_DT_CUT_THR +924 0x03E8 //TX_MICMUTE_DT_CUT_K2 +925 0x0001 //TX_MICMUTE_DT_CUT_THR2 +926 0x0064 //TX_MICMUTE_DT2_HOLD_N +927 0x1000 //TX_MICMUTE_RATIODTH_THCUT +928 0x1000 //TX_MICMUTE_B_POST_FLT_ECHOL +929 0x7FFF //TX_MICMUTE_B_POST_FLT_ECHOH +930 0x0400 //TX_MICMUTE_C_POST_FLT_MASK +931 0x7999 //TX_MICMUTE_RATIODTL_CUT_TH +932 0x0258 //TX_MICMUTE_DT_CUT_K1 +933 0x0800 //TX_MICMUTE_N2_SN_EST +934 0xFC00 //TX_MICMUTE_THR_SN_EST_0 +935 0x001C //TX_MICMUTE_MIN_G_CTRL_0 +936 0x6000 //TX_MICMUTE_A_POST_FILT_S_0 +937 0x7000 //TX_MICMUTE_B_POST_FILT_0 +938 0x2710 //TX_MIC1RUB_AMP_THR +939 0x0010 //TX_MIC1MUTE_RATIO_THR +940 0x0450 //TX_MIC1MUTE_AMP_THR +941 0x0008 //TX_MIC1MUTE_CVG_TIME +942 0x0008 //TX_MIC1MUTE_RELEASE_TIME +943 0x0000 //TX_AMS_RESRV_01 +944 0x0000 //TX_AMS_RESRV_02 +945 0x0000 //TX_AMS_RESRV_03 +946 0x0000 //TX_AMS_RESRV_04 +947 0x0000 //TX_AMS_RESRV_05 +948 0x0000 //TX_AMS_RESRV_06 +949 0x0000 //TX_AMS_RESRV_07 +950 0x0000 //TX_AMS_RESRV_08 +951 0x0000 //TX_AMS_RESRV_09 +952 0x0000 //TX_AMS_RESRV_10 +953 0x0000 //TX_AMS_RESRV_11 +954 0x0000 //TX_AMS_RESRV_12 +955 0x0000 //TX_AMS_RESRV_13 +956 0x0000 //TX_AMS_RESRV_14 +957 0x0000 //TX_AMS_RESRV_15 +958 0x0000 //TX_AMS_RESRV_16 +959 0x0000 //TX_AMS_RESRV_17 +960 0x0000 //TX_AMS_RESRV_18 +961 0x0000 //TX_AMS_RESRV_19 +#RX +0 0x006C //RX_RECVFUNC_MODE_0 +1 0x0000 //RX_RECVFUNC_MODE_1 +2 0x0004 //RX_SAMPLINGFREQ_SIG +3 0x0004 //RX_SAMPLINGFREQ_PROC +4 0x000A //RX_FRAME_SZ +5 0x0000 //RX_DELAY_OPT +6 0x4000 //RX_TDDRC_ALPHA_UP_1 +7 0x4000 //RX_TDDRC_ALPHA_UP_2 +8 0x4000 //RX_TDDRC_ALPHA_UP_3 +9 0x4000 //RX_TDDRC_ALPHA_UP_4 +10 0x0800 //RX_PGA +11 0x7E56 //RX_A_HP +12 0x4000 //RX_B_PE +13 0x7800 //RX_THR_PITCH_DET_0 +14 0x7000 //RX_THR_PITCH_DET_1 +15 0x6000 //RX_THR_PITCH_DET_2 +16 0x0008 //RX_PITCH_BFR_LEN +17 0x0003 //RX_SBD_PITCH_DET +18 0x0100 //RX_PP_RESRV_0 +19 0x0020 //RX_PP_RESRV_1 +20 0x0400 //RX_N_SN_EST +21 0x000C //RX_N2_SN_EST +22 0x0014 //RX_NS_LVL_CTRL +23 0xF400 //RX_THR_SN_EST +24 0x7E00 //RX_LAMBDA_PFILT +25 0x00C8 //RX_FENS_RESRV_0 +26 0x0190 //RX_FENS_RESRV_1 +27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +30 0x0002 //RX_EXTRA_NS_L +31 0x0800 //RX_EXTRA_NS_A +32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +33 0x7FFF //RX_TDDRC_LIMITER_THRD +34 0x0800 //RX_TDDRC_LIMITER_GAIN +35 0x199A //RX_A_POST_FLT +36 0x0000 //RX_LMT_THRD +37 0x4000 //RX_LMT_ALPHA +38 0x0020 //RX_FDEQ_SUBNUM +39 0x4848 //RX_FDEQ_GAIN_0 +40 0x4848 //RX_FDEQ_GAIN_1 +41 0x4848 //RX_FDEQ_GAIN_2 +42 0x4850 //RX_FDEQ_GAIN_3 +43 0x4848 //RX_FDEQ_GAIN_4 +44 0x4848 //RX_FDEQ_GAIN_5 +45 0x4568 //RX_FDEQ_GAIN_6 +46 0x485C //RX_FDEQ_GAIN_7 +47 0x5C60 //RX_FDEQ_GAIN_8 +48 0x685C //RX_FDEQ_GAIN_9 +49 0x5648 //RX_FDEQ_GAIN_10 +50 0x484C //RX_FDEQ_GAIN_11 +51 0x706C //RX_FDEQ_GAIN_12 +52 0x7070 //RX_FDEQ_GAIN_13 +53 0x6868 //RX_FDEQ_GAIN_14 +54 0x6060 //RX_FDEQ_GAIN_15 +55 0x4848 //RX_FDEQ_GAIN_16 +56 0x4848 //RX_FDEQ_GAIN_17 +57 0x4848 //RX_FDEQ_GAIN_18 +58 0x4848 //RX_FDEQ_GAIN_19 +59 0x4848 //RX_FDEQ_GAIN_20 +60 0x4848 //RX_FDEQ_GAIN_21 +61 0x4848 //RX_FDEQ_GAIN_22 +62 0x4848 //RX_FDEQ_GAIN_23 +63 0x0202 //RX_FDEQ_BIN_0 +64 0x0203 //RX_FDEQ_BIN_1 +65 0x0303 //RX_FDEQ_BIN_2 +66 0x0402 //RX_FDEQ_BIN_3 +67 0x0504 //RX_FDEQ_BIN_4 +68 0x0209 //RX_FDEQ_BIN_5 +69 0x0808 //RX_FDEQ_BIN_6 +70 0x090A //RX_FDEQ_BIN_7 +71 0x0B0C //RX_FDEQ_BIN_8 +72 0x0D0E //RX_FDEQ_BIN_9 +73 0x1013 //RX_FDEQ_BIN_10 +74 0x1719 //RX_FDEQ_BIN_11 +75 0x1B1E //RX_FDEQ_BIN_12 +76 0x1E1E //RX_FDEQ_BIN_13 +77 0x1E28 //RX_FDEQ_BIN_14 +78 0x282C //RX_FDEQ_BIN_15 +79 0x0000 //RX_FDEQ_BIN_16 +80 0x0000 //RX_FDEQ_BIN_17 +81 0x0000 //RX_FDEQ_BIN_18 +82 0x0000 //RX_FDEQ_BIN_19 +83 0x0000 //RX_FDEQ_BIN_20 +84 0x0000 //RX_FDEQ_BIN_21 +85 0x0000 //RX_FDEQ_BIN_22 +86 0x0000 //RX_FDEQ_BIN_23 +87 0x4000 //RX_FDEQ_RESRV_0 +88 0x0320 //RX_FDEQ_RESRV_1 +89 0x0018 //RX_FDDRC_BAND_MARGIN_0 +90 0x0030 //RX_FDDRC_BAND_MARGIN_1 +91 0x0050 //RX_FDDRC_BAND_MARGIN_2 +92 0x0080 //RX_FDDRC_BAND_MARGIN_3 +93 0x0004 //RX_FDDRC_BLOCK_EXP +94 0x5000 //RX_FDDRC_THRD_2_0 +95 0x5000 //RX_FDDRC_THRD_2_1 +96 0x2000 //RX_FDDRC_THRD_2_2 +97 0x5000 //RX_FDDRC_THRD_2_3 +98 0x6400 //RX_FDDRC_THRD_3_0 +99 0x6400 //RX_FDDRC_THRD_3_1 +100 0x2000 //RX_FDDRC_THRD_3_2 +101 0x5000 //RX_FDDRC_THRD_3_3 +102 0x4000 //RX_FDDRC_SLANT_0_0 +103 0x4000 //RX_FDDRC_SLANT_0_1 +104 0x4000 //RX_FDDRC_SLANT_0_2 +105 0x4000 //RX_FDDRC_SLANT_0_3 +106 0x7FFF //RX_FDDRC_SLANT_1_0 +107 0x7FFF //RX_FDDRC_SLANT_1_1 +108 0x7FFF //RX_FDDRC_SLANT_1_2 +109 0x7FFF //RX_FDDRC_SLANT_1_3 +110 0x0000 //RX_FDDRC_RESRV_0 +111 0x0002 //RX_FILTINDX +112 0x0001 //RX_TDDRC_THRD_0 +113 0x0002 //RX_TDDRC_THRD_1 +114 0x1800 //RX_TDDRC_THRD_2 +115 0x1800 //RX_TDDRC_THRD_3 +116 0x6000 //RX_TDDRC_SLANT_0 +117 0x6E00 //RX_TDDRC_SLANT_1 +118 0x4000 //RX_TDDRC_ALPHA_UP_0 +119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +120 0x0000 //RX_TDDRC_HMNC_FLAG +121 0x199A //RX_TDDRC_HMNC_GAIN +122 0x0001 //RX_TDDRC_SMT_FLAG +123 0x0CCD //RX_TDDRC_SMT_W +124 0x02D2 //RX_TDDRC_DRC_GAIN +125 0x7C00 //RX_LAMBDA_PKA_FP +126 0x2000 //RX_TPKA_FP +127 0x2000 //RX_MIN_G_FP +128 0x0080 //RX_MAX_G_FP +129 0x0013 //RX_SPK_VOL +130 0x0000 //RX_VOL_RESRV_0 +131 0x0000 //RX_MAXLEVEL_CNG +132 0x3000 //RX_BWE_UV_TH +133 0x3000 //RX_BWE_UV_TH2 +134 0x1800 //RX_BWE_UV_TH3 +135 0x1000 //RX_BWE_V_TH +136 0x04CD //RX_BWE_GAIN1_V_TH1 +137 0x0F33 //RX_BWE_GAIN1_V_TH2 +138 0x7333 //RX_BWE_UV_EQ +139 0x199A //RX_BWE_V_EQ +140 0x7333 //RX_BWE_TONE_TH +141 0x0004 //RX_BWE_UV_HOLD_T +142 0x6CCD //RX_BWE_GAIN2_ALPHA +143 0x799A //RX_BWE_GAIN3_ALPHA +144 0x001E //RX_BWE_CUTOFF +145 0x3000 //RX_BWE_GAINFILL +146 0x3200 //RX_BWE_MAXTH_TONE +147 0x2000 //RX_BWE_EQ_0 +148 0x2000 //RX_BWE_EQ_1 +149 0x2000 //RX_BWE_EQ_2 +150 0x2000 //RX_BWE_EQ_3 +151 0x2000 //RX_BWE_EQ_4 +152 0x2000 //RX_BWE_EQ_5 +153 0x2000 //RX_BWE_EQ_6 +154 0x0000 //RX_BWE_RESRV_0 +155 0x0000 //RX_BWE_RESRV_1 +156 0x0000 //RX_BWE_RESRV_2 +#VOL 0 +6 0x4000 //RX_TDDRC_ALPHA_UP_1 +7 0x4000 //RX_TDDRC_ALPHA_UP_2 +8 0x4000 //RX_TDDRC_ALPHA_UP_3 +9 0x4000 //RX_TDDRC_ALPHA_UP_4 +27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +33 0x7FFF //RX_TDDRC_LIMITER_THRD +34 0x0800 //RX_TDDRC_LIMITER_GAIN +112 0x0001 //RX_TDDRC_THRD_0 +113 0x0002 //RX_TDDRC_THRD_1 +114 0x1800 //RX_TDDRC_THRD_2 +115 0x1800 //RX_TDDRC_THRD_3 +116 0x6000 //RX_TDDRC_SLANT_0 +117 0x6E00 //RX_TDDRC_SLANT_1 +118 0x4000 //RX_TDDRC_ALPHA_UP_0 +119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +120 0x0000 //RX_TDDRC_HMNC_FLAG +121 0x199A //RX_TDDRC_HMNC_GAIN +122 0x0001 //RX_TDDRC_SMT_FLAG +123 0x0CCD //RX_TDDRC_SMT_W +124 0x02D2 //RX_TDDRC_DRC_GAIN +38 0x0020 //RX_FDEQ_SUBNUM +39 0x4848 //RX_FDEQ_GAIN_0 +40 0x4848 //RX_FDEQ_GAIN_1 +41 0x4848 //RX_FDEQ_GAIN_2 +42 0x4850 //RX_FDEQ_GAIN_3 +43 0x4848 //RX_FDEQ_GAIN_4 +44 0x4848 //RX_FDEQ_GAIN_5 +45 0x4568 //RX_FDEQ_GAIN_6 +46 0x485C //RX_FDEQ_GAIN_7 +47 0x5C60 //RX_FDEQ_GAIN_8 +48 0x685C //RX_FDEQ_GAIN_9 +49 0x5648 //RX_FDEQ_GAIN_10 +50 0x484C //RX_FDEQ_GAIN_11 +51 0x706C //RX_FDEQ_GAIN_12 +52 0x7070 //RX_FDEQ_GAIN_13 +53 0x6868 //RX_FDEQ_GAIN_14 +54 0x6060 //RX_FDEQ_GAIN_15 +55 0x4848 //RX_FDEQ_GAIN_16 +56 0x4848 //RX_FDEQ_GAIN_17 +57 0x4848 //RX_FDEQ_GAIN_18 +58 0x4848 //RX_FDEQ_GAIN_19 +59 0x4848 //RX_FDEQ_GAIN_20 +60 0x4848 //RX_FDEQ_GAIN_21 +61 0x4848 //RX_FDEQ_GAIN_22 +62 0x4848 //RX_FDEQ_GAIN_23 +63 0x0202 //RX_FDEQ_BIN_0 +64 0x0203 //RX_FDEQ_BIN_1 +65 0x0303 //RX_FDEQ_BIN_2 +66 0x0402 //RX_FDEQ_BIN_3 +67 0x0504 //RX_FDEQ_BIN_4 +68 0x0209 //RX_FDEQ_BIN_5 +69 0x0808 //RX_FDEQ_BIN_6 +70 0x090A //RX_FDEQ_BIN_7 +71 0x0B0C //RX_FDEQ_BIN_8 +72 0x0D0E //RX_FDEQ_BIN_9 +73 0x1013 //RX_FDEQ_BIN_10 +74 0x1719 //RX_FDEQ_BIN_11 +75 0x1B1E //RX_FDEQ_BIN_12 +76 0x1E1E //RX_FDEQ_BIN_13 +77 0x1E28 //RX_FDEQ_BIN_14 +78 0x282C //RX_FDEQ_BIN_15 +79 0x0000 //RX_FDEQ_BIN_16 +80 0x0000 //RX_FDEQ_BIN_17 +81 0x0000 //RX_FDEQ_BIN_18 +82 0x0000 //RX_FDEQ_BIN_19 +83 0x0000 //RX_FDEQ_BIN_20 +84 0x0000 //RX_FDEQ_BIN_21 +85 0x0000 //RX_FDEQ_BIN_22 +86 0x0000 //RX_FDEQ_BIN_23 +87 0x4000 //RX_FDEQ_RESRV_0 +88 0x0320 //RX_FDEQ_RESRV_1 +89 0x0018 //RX_FDDRC_BAND_MARGIN_0 +90 0x0030 //RX_FDDRC_BAND_MARGIN_1 +91 0x0050 //RX_FDDRC_BAND_MARGIN_2 +92 0x0080 //RX_FDDRC_BAND_MARGIN_3 +93 0x0004 //RX_FDDRC_BLOCK_EXP +94 0x5000 //RX_FDDRC_THRD_2_0 +95 0x5000 //RX_FDDRC_THRD_2_1 +96 0x2000 //RX_FDDRC_THRD_2_2 +97 0x5000 //RX_FDDRC_THRD_2_3 +98 0x6400 //RX_FDDRC_THRD_3_0 +99 0x6400 //RX_FDDRC_THRD_3_1 +100 0x2000 //RX_FDDRC_THRD_3_2 +101 0x5000 //RX_FDDRC_THRD_3_3 +102 0x4000 //RX_FDDRC_SLANT_0_0 +103 0x4000 //RX_FDDRC_SLANT_0_1 +104 0x4000 //RX_FDDRC_SLANT_0_2 +105 0x4000 //RX_FDDRC_SLANT_0_3 +106 0x7FFF //RX_FDDRC_SLANT_1_0 +107 0x7FFF //RX_FDDRC_SLANT_1_1 +108 0x7FFF //RX_FDDRC_SLANT_1_2 +109 0x7FFF //RX_FDDRC_SLANT_1_3 +110 0x0000 //RX_FDDRC_RESRV_0 +129 0x0013 //RX_SPK_VOL +130 0x0000 //RX_VOL_RESRV_0 +#VOL 1 +6 0x4000 //RX_TDDRC_ALPHA_UP_1 +7 0x4000 //RX_TDDRC_ALPHA_UP_2 +8 0x4000 //RX_TDDRC_ALPHA_UP_3 +9 0x4000 //RX_TDDRC_ALPHA_UP_4 +27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +33 0x7FFF //RX_TDDRC_LIMITER_THRD +34 0x0800 //RX_TDDRC_LIMITER_GAIN +112 0x0001 //RX_TDDRC_THRD_0 +113 0x0002 //RX_TDDRC_THRD_1 +114 0x1800 //RX_TDDRC_THRD_2 +115 0x1800 //RX_TDDRC_THRD_3 +116 0x6000 //RX_TDDRC_SLANT_0 +117 0x6E00 //RX_TDDRC_SLANT_1 +118 0x4000 //RX_TDDRC_ALPHA_UP_0 +119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +120 0x0000 //RX_TDDRC_HMNC_FLAG +121 0x199A //RX_TDDRC_HMNC_GAIN +122 0x0001 //RX_TDDRC_SMT_FLAG +123 0x0CCD //RX_TDDRC_SMT_W +124 0x02D2 //RX_TDDRC_DRC_GAIN +38 0x0020 //RX_FDEQ_SUBNUM +39 0x4848 //RX_FDEQ_GAIN_0 +40 0x4848 //RX_FDEQ_GAIN_1 +41 0x4848 //RX_FDEQ_GAIN_2 +42 0x4850 //RX_FDEQ_GAIN_3 +43 0x4848 //RX_FDEQ_GAIN_4 +44 0x4848 //RX_FDEQ_GAIN_5 +45 0x4568 //RX_FDEQ_GAIN_6 +46 0x485C //RX_FDEQ_GAIN_7 +47 0x5C60 //RX_FDEQ_GAIN_8 +48 0x685C //RX_FDEQ_GAIN_9 +49 0x5648 //RX_FDEQ_GAIN_10 +50 0x484C //RX_FDEQ_GAIN_11 +51 0x706C //RX_FDEQ_GAIN_12 +52 0x7070 //RX_FDEQ_GAIN_13 +53 0x6868 //RX_FDEQ_GAIN_14 +54 0x6060 //RX_FDEQ_GAIN_15 +55 0x4848 //RX_FDEQ_GAIN_16 +56 0x4848 //RX_FDEQ_GAIN_17 +57 0x4848 //RX_FDEQ_GAIN_18 +58 0x4848 //RX_FDEQ_GAIN_19 +59 0x4848 //RX_FDEQ_GAIN_20 +60 0x4848 //RX_FDEQ_GAIN_21 +61 0x4848 //RX_FDEQ_GAIN_22 +62 0x4848 //RX_FDEQ_GAIN_23 +63 0x0202 //RX_FDEQ_BIN_0 +64 0x0203 //RX_FDEQ_BIN_1 +65 0x0303 //RX_FDEQ_BIN_2 +66 0x0402 //RX_FDEQ_BIN_3 +67 0x0504 //RX_FDEQ_BIN_4 +68 0x0209 //RX_FDEQ_BIN_5 +69 0x0808 //RX_FDEQ_BIN_6 +70 0x090A //RX_FDEQ_BIN_7 +71 0x0B0C //RX_FDEQ_BIN_8 +72 0x0D0E //RX_FDEQ_BIN_9 +73 0x1013 //RX_FDEQ_BIN_10 +74 0x1719 //RX_FDEQ_BIN_11 +75 0x1B1E //RX_FDEQ_BIN_12 +76 0x1E1E //RX_FDEQ_BIN_13 +77 0x1E28 //RX_FDEQ_BIN_14 +78 0x282C //RX_FDEQ_BIN_15 +79 0x0000 //RX_FDEQ_BIN_16 +80 0x0000 //RX_FDEQ_BIN_17 +81 0x0000 //RX_FDEQ_BIN_18 +82 0x0000 //RX_FDEQ_BIN_19 +83 0x0000 //RX_FDEQ_BIN_20 +84 0x0000 //RX_FDEQ_BIN_21 +85 0x0000 //RX_FDEQ_BIN_22 +86 0x0000 //RX_FDEQ_BIN_23 +87 0x4000 //RX_FDEQ_RESRV_0 +88 0x0320 //RX_FDEQ_RESRV_1 +89 0x0018 //RX_FDDRC_BAND_MARGIN_0 +90 0x0030 //RX_FDDRC_BAND_MARGIN_1 +91 0x0050 //RX_FDDRC_BAND_MARGIN_2 +92 0x0080 //RX_FDDRC_BAND_MARGIN_3 +93 0x0004 //RX_FDDRC_BLOCK_EXP +94 0x5000 //RX_FDDRC_THRD_2_0 +95 0x5000 //RX_FDDRC_THRD_2_1 +96 0x2000 //RX_FDDRC_THRD_2_2 +97 0x5000 //RX_FDDRC_THRD_2_3 +98 0x6400 //RX_FDDRC_THRD_3_0 +99 0x6400 //RX_FDDRC_THRD_3_1 +100 0x2000 //RX_FDDRC_THRD_3_2 +101 0x5000 //RX_FDDRC_THRD_3_3 +102 0x4000 //RX_FDDRC_SLANT_0_0 +103 0x4000 //RX_FDDRC_SLANT_0_1 +104 0x4000 //RX_FDDRC_SLANT_0_2 +105 0x4000 //RX_FDDRC_SLANT_0_3 +106 0x7FFF //RX_FDDRC_SLANT_1_0 +107 0x7FFF //RX_FDDRC_SLANT_1_1 +108 0x7FFF //RX_FDDRC_SLANT_1_2 +109 0x7FFF //RX_FDDRC_SLANT_1_3 +110 0x0000 //RX_FDDRC_RESRV_0 +129 0x001C //RX_SPK_VOL +130 0x0000 //RX_VOL_RESRV_0 +#VOL 2 +6 0x4000 //RX_TDDRC_ALPHA_UP_1 +7 0x4000 //RX_TDDRC_ALPHA_UP_2 +8 0x4000 //RX_TDDRC_ALPHA_UP_3 +9 0x4000 //RX_TDDRC_ALPHA_UP_4 +27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +33 0x7FFF //RX_TDDRC_LIMITER_THRD +34 0x0800 //RX_TDDRC_LIMITER_GAIN +112 0x0001 //RX_TDDRC_THRD_0 +113 0x0002 //RX_TDDRC_THRD_1 +114 0x1800 //RX_TDDRC_THRD_2 +115 0x1800 //RX_TDDRC_THRD_3 +116 0x6000 //RX_TDDRC_SLANT_0 +117 0x6E00 //RX_TDDRC_SLANT_1 +118 0x4000 //RX_TDDRC_ALPHA_UP_0 +119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +120 0x0000 //RX_TDDRC_HMNC_FLAG +121 0x199A //RX_TDDRC_HMNC_GAIN +122 0x0001 //RX_TDDRC_SMT_FLAG +123 0x0CCD //RX_TDDRC_SMT_W +124 0x02D2 //RX_TDDRC_DRC_GAIN +38 0x0020 //RX_FDEQ_SUBNUM +39 0x4848 //RX_FDEQ_GAIN_0 +40 0x4848 //RX_FDEQ_GAIN_1 +41 0x4848 //RX_FDEQ_GAIN_2 +42 0x4850 //RX_FDEQ_GAIN_3 +43 0x4848 //RX_FDEQ_GAIN_4 +44 0x4848 //RX_FDEQ_GAIN_5 +45 0x4568 //RX_FDEQ_GAIN_6 +46 0x485C //RX_FDEQ_GAIN_7 +47 0x5C60 //RX_FDEQ_GAIN_8 +48 0x685C //RX_FDEQ_GAIN_9 +49 0x5648 //RX_FDEQ_GAIN_10 +50 0x484C //RX_FDEQ_GAIN_11 +51 0x706C //RX_FDEQ_GAIN_12 +52 0x7070 //RX_FDEQ_GAIN_13 +53 0x6868 //RX_FDEQ_GAIN_14 +54 0x6060 //RX_FDEQ_GAIN_15 +55 0x4848 //RX_FDEQ_GAIN_16 +56 0x4848 //RX_FDEQ_GAIN_17 +57 0x4848 //RX_FDEQ_GAIN_18 +58 0x4848 //RX_FDEQ_GAIN_19 +59 0x4848 //RX_FDEQ_GAIN_20 +60 0x4848 //RX_FDEQ_GAIN_21 +61 0x4848 //RX_FDEQ_GAIN_22 +62 0x4848 //RX_FDEQ_GAIN_23 +63 0x0202 //RX_FDEQ_BIN_0 +64 0x0203 //RX_FDEQ_BIN_1 +65 0x0303 //RX_FDEQ_BIN_2 +66 0x0402 //RX_FDEQ_BIN_3 +67 0x0504 //RX_FDEQ_BIN_4 +68 0x0209 //RX_FDEQ_BIN_5 +69 0x0808 //RX_FDEQ_BIN_6 +70 0x090A //RX_FDEQ_BIN_7 +71 0x0B0C //RX_FDEQ_BIN_8 +72 0x0D0E //RX_FDEQ_BIN_9 +73 0x1013 //RX_FDEQ_BIN_10 +74 0x1719 //RX_FDEQ_BIN_11 +75 0x1B1E //RX_FDEQ_BIN_12 +76 0x1E1E //RX_FDEQ_BIN_13 +77 0x1E28 //RX_FDEQ_BIN_14 +78 0x282C //RX_FDEQ_BIN_15 +79 0x0000 //RX_FDEQ_BIN_16 +80 0x0000 //RX_FDEQ_BIN_17 +81 0x0000 //RX_FDEQ_BIN_18 +82 0x0000 //RX_FDEQ_BIN_19 +83 0x0000 //RX_FDEQ_BIN_20 +84 0x0000 //RX_FDEQ_BIN_21 +85 0x0000 //RX_FDEQ_BIN_22 +86 0x0000 //RX_FDEQ_BIN_23 +87 0x4000 //RX_FDEQ_RESRV_0 +88 0x0320 //RX_FDEQ_RESRV_1 +89 0x0018 //RX_FDDRC_BAND_MARGIN_0 +90 0x0030 //RX_FDDRC_BAND_MARGIN_1 +91 0x0050 //RX_FDDRC_BAND_MARGIN_2 +92 0x0080 //RX_FDDRC_BAND_MARGIN_3 +93 0x0004 //RX_FDDRC_BLOCK_EXP +94 0x5000 //RX_FDDRC_THRD_2_0 +95 0x5000 //RX_FDDRC_THRD_2_1 +96 0x2000 //RX_FDDRC_THRD_2_2 +97 0x5000 //RX_FDDRC_THRD_2_3 +98 0x6400 //RX_FDDRC_THRD_3_0 +99 0x6400 //RX_FDDRC_THRD_3_1 +100 0x2000 //RX_FDDRC_THRD_3_2 +101 0x5000 //RX_FDDRC_THRD_3_3 +102 0x4000 //RX_FDDRC_SLANT_0_0 +103 0x4000 //RX_FDDRC_SLANT_0_1 +104 0x4000 //RX_FDDRC_SLANT_0_2 +105 0x4000 //RX_FDDRC_SLANT_0_3 +106 0x7FFF //RX_FDDRC_SLANT_1_0 +107 0x7FFF //RX_FDDRC_SLANT_1_1 +108 0x7FFF //RX_FDDRC_SLANT_1_2 +109 0x7FFF //RX_FDDRC_SLANT_1_3 +110 0x0000 //RX_FDDRC_RESRV_0 +129 0x0028 //RX_SPK_VOL +130 0x0000 //RX_VOL_RESRV_0 +#VOL 3 +6 0x4000 //RX_TDDRC_ALPHA_UP_1 +7 0x4000 //RX_TDDRC_ALPHA_UP_2 +8 0x4000 //RX_TDDRC_ALPHA_UP_3 +9 0x4000 //RX_TDDRC_ALPHA_UP_4 +27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +33 0x7FFF //RX_TDDRC_LIMITER_THRD +34 0x0800 //RX_TDDRC_LIMITER_GAIN +112 0x0001 //RX_TDDRC_THRD_0 +113 0x0002 //RX_TDDRC_THRD_1 +114 0x1800 //RX_TDDRC_THRD_2 +115 0x1800 //RX_TDDRC_THRD_3 +116 0x6000 //RX_TDDRC_SLANT_0 +117 0x6E00 //RX_TDDRC_SLANT_1 +118 0x4000 //RX_TDDRC_ALPHA_UP_0 +119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +120 0x0000 //RX_TDDRC_HMNC_FLAG +121 0x199A //RX_TDDRC_HMNC_GAIN +122 0x0001 //RX_TDDRC_SMT_FLAG +123 0x0CCD //RX_TDDRC_SMT_W +124 0x02D2 //RX_TDDRC_DRC_GAIN +38 0x0020 //RX_FDEQ_SUBNUM +39 0x4848 //RX_FDEQ_GAIN_0 +40 0x4848 //RX_FDEQ_GAIN_1 +41 0x4848 //RX_FDEQ_GAIN_2 +42 0x4850 //RX_FDEQ_GAIN_3 +43 0x4848 //RX_FDEQ_GAIN_4 +44 0x4848 //RX_FDEQ_GAIN_5 +45 0x4568 //RX_FDEQ_GAIN_6 +46 0x485C //RX_FDEQ_GAIN_7 +47 0x5C60 //RX_FDEQ_GAIN_8 +48 0x685C //RX_FDEQ_GAIN_9 +49 0x5648 //RX_FDEQ_GAIN_10 +50 0x484C //RX_FDEQ_GAIN_11 +51 0x706C //RX_FDEQ_GAIN_12 +52 0x7070 //RX_FDEQ_GAIN_13 +53 0x6868 //RX_FDEQ_GAIN_14 +54 0x6060 //RX_FDEQ_GAIN_15 +55 0x4848 //RX_FDEQ_GAIN_16 +56 0x4848 //RX_FDEQ_GAIN_17 +57 0x4848 //RX_FDEQ_GAIN_18 +58 0x4848 //RX_FDEQ_GAIN_19 +59 0x4848 //RX_FDEQ_GAIN_20 +60 0x4848 //RX_FDEQ_GAIN_21 +61 0x4848 //RX_FDEQ_GAIN_22 +62 0x4848 //RX_FDEQ_GAIN_23 +63 0x0202 //RX_FDEQ_BIN_0 +64 0x0203 //RX_FDEQ_BIN_1 +65 0x0303 //RX_FDEQ_BIN_2 +66 0x0402 //RX_FDEQ_BIN_3 +67 0x0504 //RX_FDEQ_BIN_4 +68 0x0209 //RX_FDEQ_BIN_5 +69 0x0808 //RX_FDEQ_BIN_6 +70 0x090A //RX_FDEQ_BIN_7 +71 0x0B0C //RX_FDEQ_BIN_8 +72 0x0D0E //RX_FDEQ_BIN_9 +73 0x1013 //RX_FDEQ_BIN_10 +74 0x1719 //RX_FDEQ_BIN_11 +75 0x1B1E //RX_FDEQ_BIN_12 +76 0x1E1E //RX_FDEQ_BIN_13 +77 0x1E28 //RX_FDEQ_BIN_14 +78 0x282C //RX_FDEQ_BIN_15 +79 0x0000 //RX_FDEQ_BIN_16 +80 0x0000 //RX_FDEQ_BIN_17 +81 0x0000 //RX_FDEQ_BIN_18 +82 0x0000 //RX_FDEQ_BIN_19 +83 0x0000 //RX_FDEQ_BIN_20 +84 0x0000 //RX_FDEQ_BIN_21 +85 0x0000 //RX_FDEQ_BIN_22 +86 0x0000 //RX_FDEQ_BIN_23 +87 0x4000 //RX_FDEQ_RESRV_0 +88 0x0320 //RX_FDEQ_RESRV_1 +89 0x0018 //RX_FDDRC_BAND_MARGIN_0 +90 0x0030 //RX_FDDRC_BAND_MARGIN_1 +91 0x0050 //RX_FDDRC_BAND_MARGIN_2 +92 0x0080 //RX_FDDRC_BAND_MARGIN_3 +93 0x0004 //RX_FDDRC_BLOCK_EXP +94 0x5000 //RX_FDDRC_THRD_2_0 +95 0x5000 //RX_FDDRC_THRD_2_1 +96 0x2000 //RX_FDDRC_THRD_2_2 +97 0x5000 //RX_FDDRC_THRD_2_3 +98 0x6400 //RX_FDDRC_THRD_3_0 +99 0x6400 //RX_FDDRC_THRD_3_1 +100 0x2000 //RX_FDDRC_THRD_3_2 +101 0x5000 //RX_FDDRC_THRD_3_3 +102 0x4000 //RX_FDDRC_SLANT_0_0 +103 0x4000 //RX_FDDRC_SLANT_0_1 +104 0x4000 //RX_FDDRC_SLANT_0_2 +105 0x4000 //RX_FDDRC_SLANT_0_3 +106 0x7FFF //RX_FDDRC_SLANT_1_0 +107 0x7FFF //RX_FDDRC_SLANT_1_1 +108 0x7FFF //RX_FDDRC_SLANT_1_2 +109 0x7FFF //RX_FDDRC_SLANT_1_3 +110 0x0000 //RX_FDDRC_RESRV_0 +129 0x0035 //RX_SPK_VOL +130 0x0000 //RX_VOL_RESRV_0 +#VOL 4 +6 0x4000 //RX_TDDRC_ALPHA_UP_1 +7 0x4000 //RX_TDDRC_ALPHA_UP_2 +8 0x4000 //RX_TDDRC_ALPHA_UP_3 +9 0x4000 //RX_TDDRC_ALPHA_UP_4 +27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +33 0x7FFF //RX_TDDRC_LIMITER_THRD +34 0x0800 //RX_TDDRC_LIMITER_GAIN +112 0x0001 //RX_TDDRC_THRD_0 +113 0x0002 //RX_TDDRC_THRD_1 +114 0x1800 //RX_TDDRC_THRD_2 +115 0x1800 //RX_TDDRC_THRD_3 +116 0x6000 //RX_TDDRC_SLANT_0 +117 0x6E00 //RX_TDDRC_SLANT_1 +118 0x4000 //RX_TDDRC_ALPHA_UP_0 +119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +120 0x0000 //RX_TDDRC_HMNC_FLAG +121 0x199A //RX_TDDRC_HMNC_GAIN +122 0x0001 //RX_TDDRC_SMT_FLAG +123 0x0CCD //RX_TDDRC_SMT_W +124 0x02D2 //RX_TDDRC_DRC_GAIN +38 0x0020 //RX_FDEQ_SUBNUM +39 0x4C4C //RX_FDEQ_GAIN_0 +40 0x4C4C //RX_FDEQ_GAIN_1 +41 0x4C48 //RX_FDEQ_GAIN_2 +42 0x4870 //RX_FDEQ_GAIN_3 +43 0x4848 //RX_FDEQ_GAIN_4 +44 0x4848 //RX_FDEQ_GAIN_5 +45 0x4568 //RX_FDEQ_GAIN_6 +46 0x485C //RX_FDEQ_GAIN_7 +47 0x5C60 //RX_FDEQ_GAIN_8 +48 0x685C //RX_FDEQ_GAIN_9 +49 0x5648 //RX_FDEQ_GAIN_10 +50 0x484C //RX_FDEQ_GAIN_11 +51 0x706C //RX_FDEQ_GAIN_12 +52 0x7070 //RX_FDEQ_GAIN_13 +53 0x6868 //RX_FDEQ_GAIN_14 +54 0x6060 //RX_FDEQ_GAIN_15 +55 0x4848 //RX_FDEQ_GAIN_16 +56 0x4848 //RX_FDEQ_GAIN_17 +57 0x4848 //RX_FDEQ_GAIN_18 +58 0x4848 //RX_FDEQ_GAIN_19 +59 0x4848 //RX_FDEQ_GAIN_20 +60 0x4848 //RX_FDEQ_GAIN_21 +61 0x4848 //RX_FDEQ_GAIN_22 +62 0x4848 //RX_FDEQ_GAIN_23 +63 0x0202 //RX_FDEQ_BIN_0 +64 0x0203 //RX_FDEQ_BIN_1 +65 0x0303 //RX_FDEQ_BIN_2 +66 0x0402 //RX_FDEQ_BIN_3 +67 0x0504 //RX_FDEQ_BIN_4 +68 0x0209 //RX_FDEQ_BIN_5 +69 0x0808 //RX_FDEQ_BIN_6 +70 0x090A //RX_FDEQ_BIN_7 +71 0x0B0C //RX_FDEQ_BIN_8 +72 0x0D0E //RX_FDEQ_BIN_9 +73 0x1013 //RX_FDEQ_BIN_10 +74 0x1719 //RX_FDEQ_BIN_11 +75 0x1B1E //RX_FDEQ_BIN_12 +76 0x1E1E //RX_FDEQ_BIN_13 +77 0x1E28 //RX_FDEQ_BIN_14 +78 0x282C //RX_FDEQ_BIN_15 +79 0x0000 //RX_FDEQ_BIN_16 +80 0x0000 //RX_FDEQ_BIN_17 +81 0x0000 //RX_FDEQ_BIN_18 +82 0x0000 //RX_FDEQ_BIN_19 +83 0x0000 //RX_FDEQ_BIN_20 +84 0x0000 //RX_FDEQ_BIN_21 +85 0x0000 //RX_FDEQ_BIN_22 +86 0x0000 //RX_FDEQ_BIN_23 +87 0x4000 //RX_FDEQ_RESRV_0 +88 0x0320 //RX_FDEQ_RESRV_1 +89 0x0018 //RX_FDDRC_BAND_MARGIN_0 +90 0x0030 //RX_FDDRC_BAND_MARGIN_1 +91 0x0050 //RX_FDDRC_BAND_MARGIN_2 +92 0x0080 //RX_FDDRC_BAND_MARGIN_3 +93 0x0004 //RX_FDDRC_BLOCK_EXP +94 0x5000 //RX_FDDRC_THRD_2_0 +95 0x5000 //RX_FDDRC_THRD_2_1 +96 0x2000 //RX_FDDRC_THRD_2_2 +97 0x5000 //RX_FDDRC_THRD_2_3 +98 0x6400 //RX_FDDRC_THRD_3_0 +99 0x6400 //RX_FDDRC_THRD_3_1 +100 0x2000 //RX_FDDRC_THRD_3_2 +101 0x5000 //RX_FDDRC_THRD_3_3 +102 0x4000 //RX_FDDRC_SLANT_0_0 +103 0x4000 //RX_FDDRC_SLANT_0_1 +104 0x4000 //RX_FDDRC_SLANT_0_2 +105 0x4000 //RX_FDDRC_SLANT_0_3 +106 0x7FFF //RX_FDDRC_SLANT_1_0 +107 0x7FFF //RX_FDDRC_SLANT_1_1 +108 0x7FFF //RX_FDDRC_SLANT_1_2 +109 0x7FFF //RX_FDDRC_SLANT_1_3 +110 0x0000 //RX_FDDRC_RESRV_0 +129 0x0052 //RX_SPK_VOL +130 0x0000 //RX_VOL_RESRV_0 +#VOL 5 +6 0x4000 //RX_TDDRC_ALPHA_UP_1 +7 0x4000 //RX_TDDRC_ALPHA_UP_2 +8 0x4000 //RX_TDDRC_ALPHA_UP_3 +9 0x4000 //RX_TDDRC_ALPHA_UP_4 +27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +33 0x7FFF //RX_TDDRC_LIMITER_THRD +34 0x0800 //RX_TDDRC_LIMITER_GAIN +112 0x0001 //RX_TDDRC_THRD_0 +113 0x0002 //RX_TDDRC_THRD_1 +114 0x1800 //RX_TDDRC_THRD_2 +115 0x1800 //RX_TDDRC_THRD_3 +116 0x6000 //RX_TDDRC_SLANT_0 +117 0x6E00 //RX_TDDRC_SLANT_1 +118 0x4000 //RX_TDDRC_ALPHA_UP_0 +119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +120 0x0000 //RX_TDDRC_HMNC_FLAG +121 0x199A //RX_TDDRC_HMNC_GAIN +122 0x0001 //RX_TDDRC_SMT_FLAG +123 0x0CCD //RX_TDDRC_SMT_W +124 0x02D2 //RX_TDDRC_DRC_GAIN +38 0x0020 //RX_FDEQ_SUBNUM +39 0x4C4C //RX_FDEQ_GAIN_0 +40 0x4C4C //RX_FDEQ_GAIN_1 +41 0x4C48 //RX_FDEQ_GAIN_2 +42 0x4870 //RX_FDEQ_GAIN_3 +43 0x4848 //RX_FDEQ_GAIN_4 +44 0x4848 //RX_FDEQ_GAIN_5 +45 0x4568 //RX_FDEQ_GAIN_6 +46 0x485C //RX_FDEQ_GAIN_7 +47 0x5C60 //RX_FDEQ_GAIN_8 +48 0x685C //RX_FDEQ_GAIN_9 +49 0x5648 //RX_FDEQ_GAIN_10 +50 0x484C //RX_FDEQ_GAIN_11 +51 0x706C //RX_FDEQ_GAIN_12 +52 0x7070 //RX_FDEQ_GAIN_13 +53 0x6868 //RX_FDEQ_GAIN_14 +54 0x6060 //RX_FDEQ_GAIN_15 +55 0x4848 //RX_FDEQ_GAIN_16 +56 0x4848 //RX_FDEQ_GAIN_17 +57 0x4848 //RX_FDEQ_GAIN_18 +58 0x4848 //RX_FDEQ_GAIN_19 +59 0x4848 //RX_FDEQ_GAIN_20 +60 0x4848 //RX_FDEQ_GAIN_21 +61 0x4848 //RX_FDEQ_GAIN_22 +62 0x4848 //RX_FDEQ_GAIN_23 +63 0x0202 //RX_FDEQ_BIN_0 +64 0x0203 //RX_FDEQ_BIN_1 +65 0x0303 //RX_FDEQ_BIN_2 +66 0x0402 //RX_FDEQ_BIN_3 +67 0x0504 //RX_FDEQ_BIN_4 +68 0x0209 //RX_FDEQ_BIN_5 +69 0x0808 //RX_FDEQ_BIN_6 +70 0x090A //RX_FDEQ_BIN_7 +71 0x0B0C //RX_FDEQ_BIN_8 +72 0x0D0E //RX_FDEQ_BIN_9 +73 0x1013 //RX_FDEQ_BIN_10 +74 0x1719 //RX_FDEQ_BIN_11 +75 0x1B1E //RX_FDEQ_BIN_12 +76 0x1E1E //RX_FDEQ_BIN_13 +77 0x1E28 //RX_FDEQ_BIN_14 +78 0x282C //RX_FDEQ_BIN_15 +79 0x0000 //RX_FDEQ_BIN_16 +80 0x0000 //RX_FDEQ_BIN_17 +81 0x0000 //RX_FDEQ_BIN_18 +82 0x0000 //RX_FDEQ_BIN_19 +83 0x0000 //RX_FDEQ_BIN_20 +84 0x0000 //RX_FDEQ_BIN_21 +85 0x0000 //RX_FDEQ_BIN_22 +86 0x0000 //RX_FDEQ_BIN_23 +87 0x4000 //RX_FDEQ_RESRV_0 +88 0x0320 //RX_FDEQ_RESRV_1 +89 0x0018 //RX_FDDRC_BAND_MARGIN_0 +90 0x0030 //RX_FDDRC_BAND_MARGIN_1 +91 0x0050 //RX_FDDRC_BAND_MARGIN_2 +92 0x0080 //RX_FDDRC_BAND_MARGIN_3 +93 0x0004 //RX_FDDRC_BLOCK_EXP +94 0x5000 //RX_FDDRC_THRD_2_0 +95 0x5000 //RX_FDDRC_THRD_2_1 +96 0x2000 //RX_FDDRC_THRD_2_2 +97 0x5000 //RX_FDDRC_THRD_2_3 +98 0x6400 //RX_FDDRC_THRD_3_0 +99 0x6400 //RX_FDDRC_THRD_3_1 +100 0x2000 //RX_FDDRC_THRD_3_2 +101 0x5000 //RX_FDDRC_THRD_3_3 +102 0x4000 //RX_FDDRC_SLANT_0_0 +103 0x4000 //RX_FDDRC_SLANT_0_1 +104 0x4000 //RX_FDDRC_SLANT_0_2 +105 0x4000 //RX_FDDRC_SLANT_0_3 +106 0x7FFF //RX_FDDRC_SLANT_1_0 +107 0x7FFF //RX_FDDRC_SLANT_1_1 +108 0x7FFF //RX_FDDRC_SLANT_1_2 +109 0x7FFF //RX_FDDRC_SLANT_1_3 +110 0x0000 //RX_FDDRC_RESRV_0 +129 0x0078 //RX_SPK_VOL +130 0x0000 //RX_VOL_RESRV_0 +#VOL 6 +6 0x4000 //RX_TDDRC_ALPHA_UP_1 +7 0x4000 //RX_TDDRC_ALPHA_UP_2 +8 0x4000 //RX_TDDRC_ALPHA_UP_3 +9 0x4000 //RX_TDDRC_ALPHA_UP_4 +27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +33 0x7FFF //RX_TDDRC_LIMITER_THRD +34 0x0800 //RX_TDDRC_LIMITER_GAIN +112 0x0001 //RX_TDDRC_THRD_0 +113 0x0002 //RX_TDDRC_THRD_1 +114 0x1800 //RX_TDDRC_THRD_2 +115 0x1800 //RX_TDDRC_THRD_3 +116 0x6000 //RX_TDDRC_SLANT_0 +117 0x6E00 //RX_TDDRC_SLANT_1 +118 0x4000 //RX_TDDRC_ALPHA_UP_0 +119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +120 0x0000 //RX_TDDRC_HMNC_FLAG +121 0x199A //RX_TDDRC_HMNC_GAIN +122 0x0001 //RX_TDDRC_SMT_FLAG +123 0x0CCD //RX_TDDRC_SMT_W +124 0x02D2 //RX_TDDRC_DRC_GAIN +38 0x0020 //RX_FDEQ_SUBNUM +39 0x4C4C //RX_FDEQ_GAIN_0 +40 0x4C4C //RX_FDEQ_GAIN_1 +41 0x4C48 //RX_FDEQ_GAIN_2 +42 0x4870 //RX_FDEQ_GAIN_3 +43 0x4848 //RX_FDEQ_GAIN_4 +44 0x4848 //RX_FDEQ_GAIN_5 +45 0x4568 //RX_FDEQ_GAIN_6 +46 0x485C //RX_FDEQ_GAIN_7 +47 0x5C60 //RX_FDEQ_GAIN_8 +48 0x685C //RX_FDEQ_GAIN_9 +49 0x5648 //RX_FDEQ_GAIN_10 +50 0x484C //RX_FDEQ_GAIN_11 +51 0x706C //RX_FDEQ_GAIN_12 +52 0x7070 //RX_FDEQ_GAIN_13 +53 0x6868 //RX_FDEQ_GAIN_14 +54 0x6060 //RX_FDEQ_GAIN_15 +55 0x4848 //RX_FDEQ_GAIN_16 +56 0x4848 //RX_FDEQ_GAIN_17 +57 0x4848 //RX_FDEQ_GAIN_18 +58 0x4848 //RX_FDEQ_GAIN_19 +59 0x4848 //RX_FDEQ_GAIN_20 +60 0x4848 //RX_FDEQ_GAIN_21 +61 0x4848 //RX_FDEQ_GAIN_22 +62 0x4848 //RX_FDEQ_GAIN_23 +63 0x0202 //RX_FDEQ_BIN_0 +64 0x0203 //RX_FDEQ_BIN_1 +65 0x0303 //RX_FDEQ_BIN_2 +66 0x0402 //RX_FDEQ_BIN_3 +67 0x0504 //RX_FDEQ_BIN_4 +68 0x0209 //RX_FDEQ_BIN_5 +69 0x0808 //RX_FDEQ_BIN_6 +70 0x090A //RX_FDEQ_BIN_7 +71 0x0B0C //RX_FDEQ_BIN_8 +72 0x0D0E //RX_FDEQ_BIN_9 +73 0x1013 //RX_FDEQ_BIN_10 +74 0x1719 //RX_FDEQ_BIN_11 +75 0x1B1E //RX_FDEQ_BIN_12 +76 0x1E1E //RX_FDEQ_BIN_13 +77 0x1E28 //RX_FDEQ_BIN_14 +78 0x282C //RX_FDEQ_BIN_15 +79 0x0000 //RX_FDEQ_BIN_16 +80 0x0000 //RX_FDEQ_BIN_17 +81 0x0000 //RX_FDEQ_BIN_18 +82 0x0000 //RX_FDEQ_BIN_19 +83 0x0000 //RX_FDEQ_BIN_20 +84 0x0000 //RX_FDEQ_BIN_21 +85 0x0000 //RX_FDEQ_BIN_22 +86 0x0000 //RX_FDEQ_BIN_23 +87 0x4000 //RX_FDEQ_RESRV_0 +88 0x0320 //RX_FDEQ_RESRV_1 +89 0x0018 //RX_FDDRC_BAND_MARGIN_0 +90 0x0030 //RX_FDDRC_BAND_MARGIN_1 +91 0x0050 //RX_FDDRC_BAND_MARGIN_2 +92 0x0080 //RX_FDDRC_BAND_MARGIN_3 +93 0x0004 //RX_FDDRC_BLOCK_EXP +94 0x5000 //RX_FDDRC_THRD_2_0 +95 0x5000 //RX_FDDRC_THRD_2_1 +96 0x2000 //RX_FDDRC_THRD_2_2 +97 0x5000 //RX_FDDRC_THRD_2_3 +98 0x6400 //RX_FDDRC_THRD_3_0 +99 0x6400 //RX_FDDRC_THRD_3_1 +100 0x2000 //RX_FDDRC_THRD_3_2 +101 0x5000 //RX_FDDRC_THRD_3_3 +102 0x4000 //RX_FDDRC_SLANT_0_0 +103 0x4000 //RX_FDDRC_SLANT_0_1 +104 0x4000 //RX_FDDRC_SLANT_0_2 +105 0x4000 //RX_FDDRC_SLANT_0_3 +106 0x7FFF //RX_FDDRC_SLANT_1_0 +107 0x7FFF //RX_FDDRC_SLANT_1_1 +108 0x7FFF //RX_FDDRC_SLANT_1_2 +109 0x7FFF //RX_FDDRC_SLANT_1_3 +110 0x0000 //RX_FDDRC_RESRV_0 +129 0x0100 //RX_SPK_VOL +130 0x0000 //RX_VOL_RESRV_0 +#RX 2 +157 0x006C //RX_RECVFUNC_MODE_0 +158 0x0000 //RX_RECVFUNC_MODE_1 +159 0x0004 //RX_SAMPLINGFREQ_SIG +160 0x0004 //RX_SAMPLINGFREQ_PROC +161 0x000A //RX_FRAME_SZ +162 0x0000 //RX_DELAY_OPT +163 0x4000 //RX_TDDRC_ALPHA_UP_1 +164 0x4000 //RX_TDDRC_ALPHA_UP_2 +165 0x4000 //RX_TDDRC_ALPHA_UP_3 +166 0x4000 //RX_TDDRC_ALPHA_UP_4 +167 0x0800 //RX_PGA +168 0x7E56 //RX_A_HP +169 0x4000 //RX_B_PE +170 0x7800 //RX_THR_PITCH_DET_0 +171 0x7000 //RX_THR_PITCH_DET_1 +172 0x6000 //RX_THR_PITCH_DET_2 +173 0x0008 //RX_PITCH_BFR_LEN +174 0x0003 //RX_SBD_PITCH_DET +175 0x0100 //RX_PP_RESRV_0 +176 0x0020 //RX_PP_RESRV_1 +177 0x0400 //RX_N_SN_EST +178 0x000C //RX_N2_SN_EST +179 0x0014 //RX_NS_LVL_CTRL +180 0xF400 //RX_THR_SN_EST +181 0x7E00 //RX_LAMBDA_PFILT +182 0x00C8 //RX_FENS_RESRV_0 +183 0x0190 //RX_FENS_RESRV_1 +184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +187 0x0002 //RX_EXTRA_NS_L +188 0x0800 //RX_EXTRA_NS_A +189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +190 0x7FFF //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +192 0x199A //RX_A_POST_FLT +193 0x0000 //RX_LMT_THRD +194 0x4000 //RX_LMT_ALPHA +195 0x0020 //RX_FDEQ_SUBNUM +196 0x4848 //RX_FDEQ_GAIN_0 +197 0x4848 //RX_FDEQ_GAIN_1 +198 0x4848 //RX_FDEQ_GAIN_2 +199 0x4850 //RX_FDEQ_GAIN_3 +200 0x4848 //RX_FDEQ_GAIN_4 +201 0x4848 //RX_FDEQ_GAIN_5 +202 0x4568 //RX_FDEQ_GAIN_6 +203 0x485C //RX_FDEQ_GAIN_7 +204 0x5C60 //RX_FDEQ_GAIN_8 +205 0x685C //RX_FDEQ_GAIN_9 +206 0x5648 //RX_FDEQ_GAIN_10 +207 0x484C //RX_FDEQ_GAIN_11 +208 0x706C //RX_FDEQ_GAIN_12 +209 0x7070 //RX_FDEQ_GAIN_13 +210 0x6868 //RX_FDEQ_GAIN_14 +211 0x6060 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0202 //RX_FDEQ_BIN_0 +221 0x0203 //RX_FDEQ_BIN_1 +222 0x0303 //RX_FDEQ_BIN_2 +223 0x0402 //RX_FDEQ_BIN_3 +224 0x0504 //RX_FDEQ_BIN_4 +225 0x0209 //RX_FDEQ_BIN_5 +226 0x0808 //RX_FDEQ_BIN_6 +227 0x090A //RX_FDEQ_BIN_7 +228 0x0B0C //RX_FDEQ_BIN_8 +229 0x0D0E //RX_FDEQ_BIN_9 +230 0x1013 //RX_FDEQ_BIN_10 +231 0x1719 //RX_FDEQ_BIN_11 +232 0x1B1E //RX_FDEQ_BIN_12 +233 0x1E1E //RX_FDEQ_BIN_13 +234 0x1E28 //RX_FDEQ_BIN_14 +235 0x282C //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x4000 //RX_FDEQ_RESRV_0 +245 0x0320 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0030 //RX_FDDRC_BAND_MARGIN_1 +248 0x0050 //RX_FDDRC_BAND_MARGIN_2 +249 0x0080 //RX_FDDRC_BAND_MARGIN_3 +250 0x0004 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x2000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x2000 //RX_FDDRC_THRD_3_2 +258 0x5000 //RX_FDDRC_THRD_3_3 +259 0x4000 //RX_FDDRC_SLANT_0_0 +260 0x4000 //RX_FDDRC_SLANT_0_1 +261 0x4000 //RX_FDDRC_SLANT_0_2 +262 0x4000 //RX_FDDRC_SLANT_0_3 +263 0x7FFF //RX_FDDRC_SLANT_1_0 +264 0x7FFF //RX_FDDRC_SLANT_1_1 +265 0x7FFF //RX_FDDRC_SLANT_1_2 +266 0x7FFF //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +268 0x0002 //RX_FILTINDX +269 0x0001 //RX_TDDRC_THRD_0 +270 0x0002 //RX_TDDRC_THRD_1 +271 0x1800 //RX_TDDRC_THRD_2 +272 0x1800 //RX_TDDRC_THRD_3 +273 0x6000 //RX_TDDRC_SLANT_0 +274 0x6E00 //RX_TDDRC_SLANT_1 +275 0x4000 //RX_TDDRC_ALPHA_UP_0 +276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x199A //RX_TDDRC_HMNC_GAIN +279 0x0001 //RX_TDDRC_SMT_FLAG +280 0x0CCD //RX_TDDRC_SMT_W +281 0x02D2 //RX_TDDRC_DRC_GAIN +282 0x7C00 //RX_LAMBDA_PKA_FP +283 0x2000 //RX_TPKA_FP +284 0x2000 //RX_MIN_G_FP +285 0x0080 //RX_MAX_G_FP +286 0x0013 //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 +288 0x0000 //RX_MAXLEVEL_CNG +289 0x3000 //RX_BWE_UV_TH +290 0x3000 //RX_BWE_UV_TH2 +291 0x1800 //RX_BWE_UV_TH3 +292 0x1000 //RX_BWE_V_TH +293 0x04CD //RX_BWE_GAIN1_V_TH1 +294 0x0F33 //RX_BWE_GAIN1_V_TH2 +295 0x7333 //RX_BWE_UV_EQ +296 0x199A //RX_BWE_V_EQ +297 0x7333 //RX_BWE_TONE_TH +298 0x0004 //RX_BWE_UV_HOLD_T +299 0x6CCD //RX_BWE_GAIN2_ALPHA +300 0x799A //RX_BWE_GAIN3_ALPHA +301 0x001E //RX_BWE_CUTOFF +302 0x3000 //RX_BWE_GAINFILL +303 0x3200 //RX_BWE_MAXTH_TONE +304 0x2000 //RX_BWE_EQ_0 +305 0x2000 //RX_BWE_EQ_1 +306 0x2000 //RX_BWE_EQ_2 +307 0x2000 //RX_BWE_EQ_3 +308 0x2000 //RX_BWE_EQ_4 +309 0x2000 //RX_BWE_EQ_5 +310 0x2000 //RX_BWE_EQ_6 +311 0x0000 //RX_BWE_RESRV_0 +312 0x0000 //RX_BWE_RESRV_1 +313 0x0000 //RX_BWE_RESRV_2 +#VOL 0 +163 0x4000 //RX_TDDRC_ALPHA_UP_1 +164 0x4000 //RX_TDDRC_ALPHA_UP_2 +165 0x4000 //RX_TDDRC_ALPHA_UP_3 +166 0x4000 //RX_TDDRC_ALPHA_UP_4 +184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +190 0x7FFF //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +269 0x0001 //RX_TDDRC_THRD_0 +270 0x0002 //RX_TDDRC_THRD_1 +271 0x1800 //RX_TDDRC_THRD_2 +272 0x1800 //RX_TDDRC_THRD_3 +273 0x6000 //RX_TDDRC_SLANT_0 +274 0x6E00 //RX_TDDRC_SLANT_1 +275 0x4000 //RX_TDDRC_ALPHA_UP_0 +276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x199A //RX_TDDRC_HMNC_GAIN +279 0x0001 //RX_TDDRC_SMT_FLAG +280 0x0CCD //RX_TDDRC_SMT_W +281 0x02D2 //RX_TDDRC_DRC_GAIN +195 0x0020 //RX_FDEQ_SUBNUM +196 0x4848 //RX_FDEQ_GAIN_0 +197 0x4848 //RX_FDEQ_GAIN_1 +198 0x4848 //RX_FDEQ_GAIN_2 +199 0x4850 //RX_FDEQ_GAIN_3 +200 0x4848 //RX_FDEQ_GAIN_4 +201 0x4848 //RX_FDEQ_GAIN_5 +202 0x4568 //RX_FDEQ_GAIN_6 +203 0x485C //RX_FDEQ_GAIN_7 +204 0x5C60 //RX_FDEQ_GAIN_8 +205 0x685C //RX_FDEQ_GAIN_9 +206 0x5648 //RX_FDEQ_GAIN_10 +207 0x484C //RX_FDEQ_GAIN_11 +208 0x706C //RX_FDEQ_GAIN_12 +209 0x7070 //RX_FDEQ_GAIN_13 +210 0x6868 //RX_FDEQ_GAIN_14 +211 0x6060 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0202 //RX_FDEQ_BIN_0 +221 0x0203 //RX_FDEQ_BIN_1 +222 0x0303 //RX_FDEQ_BIN_2 +223 0x0402 //RX_FDEQ_BIN_3 +224 0x0504 //RX_FDEQ_BIN_4 +225 0x0209 //RX_FDEQ_BIN_5 +226 0x0808 //RX_FDEQ_BIN_6 +227 0x090A //RX_FDEQ_BIN_7 +228 0x0B0C //RX_FDEQ_BIN_8 +229 0x0D0E //RX_FDEQ_BIN_9 +230 0x1013 //RX_FDEQ_BIN_10 +231 0x1719 //RX_FDEQ_BIN_11 +232 0x1B1E //RX_FDEQ_BIN_12 +233 0x1E1E //RX_FDEQ_BIN_13 +234 0x1E28 //RX_FDEQ_BIN_14 +235 0x282C //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x4000 //RX_FDEQ_RESRV_0 +245 0x0320 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0030 //RX_FDDRC_BAND_MARGIN_1 +248 0x0050 //RX_FDDRC_BAND_MARGIN_2 +249 0x0080 //RX_FDDRC_BAND_MARGIN_3 +250 0x0004 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x2000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x2000 //RX_FDDRC_THRD_3_2 +258 0x5000 //RX_FDDRC_THRD_3_3 +259 0x4000 //RX_FDDRC_SLANT_0_0 +260 0x4000 //RX_FDDRC_SLANT_0_1 +261 0x4000 //RX_FDDRC_SLANT_0_2 +262 0x4000 //RX_FDDRC_SLANT_0_3 +263 0x7FFF //RX_FDDRC_SLANT_1_0 +264 0x7FFF //RX_FDDRC_SLANT_1_1 +265 0x7FFF //RX_FDDRC_SLANT_1_2 +266 0x7FFF //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +286 0x0013 //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 +#VOL 1 +163 0x4000 //RX_TDDRC_ALPHA_UP_1 +164 0x4000 //RX_TDDRC_ALPHA_UP_2 +165 0x4000 //RX_TDDRC_ALPHA_UP_3 +166 0x4000 //RX_TDDRC_ALPHA_UP_4 +184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +190 0x7FFF //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +269 0x0001 //RX_TDDRC_THRD_0 +270 0x0002 //RX_TDDRC_THRD_1 +271 0x1800 //RX_TDDRC_THRD_2 +272 0x1800 //RX_TDDRC_THRD_3 +273 0x6000 //RX_TDDRC_SLANT_0 +274 0x6E00 //RX_TDDRC_SLANT_1 +275 0x4000 //RX_TDDRC_ALPHA_UP_0 +276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x199A //RX_TDDRC_HMNC_GAIN +279 0x0001 //RX_TDDRC_SMT_FLAG +280 0x0CCD //RX_TDDRC_SMT_W +281 0x02D2 //RX_TDDRC_DRC_GAIN +195 0x0020 //RX_FDEQ_SUBNUM +196 0x4848 //RX_FDEQ_GAIN_0 +197 0x4848 //RX_FDEQ_GAIN_1 +198 0x4848 //RX_FDEQ_GAIN_2 +199 0x4850 //RX_FDEQ_GAIN_3 +200 0x4848 //RX_FDEQ_GAIN_4 +201 0x4848 //RX_FDEQ_GAIN_5 +202 0x4568 //RX_FDEQ_GAIN_6 +203 0x485C //RX_FDEQ_GAIN_7 +204 0x5C60 //RX_FDEQ_GAIN_8 +205 0x685C //RX_FDEQ_GAIN_9 +206 0x5648 //RX_FDEQ_GAIN_10 +207 0x484C //RX_FDEQ_GAIN_11 +208 0x706C //RX_FDEQ_GAIN_12 +209 0x7070 //RX_FDEQ_GAIN_13 +210 0x6868 //RX_FDEQ_GAIN_14 +211 0x6060 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0202 //RX_FDEQ_BIN_0 +221 0x0203 //RX_FDEQ_BIN_1 +222 0x0303 //RX_FDEQ_BIN_2 +223 0x0402 //RX_FDEQ_BIN_3 +224 0x0504 //RX_FDEQ_BIN_4 +225 0x0209 //RX_FDEQ_BIN_5 +226 0x0808 //RX_FDEQ_BIN_6 +227 0x090A //RX_FDEQ_BIN_7 +228 0x0B0C //RX_FDEQ_BIN_8 +229 0x0D0E //RX_FDEQ_BIN_9 +230 0x1013 //RX_FDEQ_BIN_10 +231 0x1719 //RX_FDEQ_BIN_11 +232 0x1B1E //RX_FDEQ_BIN_12 +233 0x1E1E //RX_FDEQ_BIN_13 +234 0x1E28 //RX_FDEQ_BIN_14 +235 0x282C //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x4000 //RX_FDEQ_RESRV_0 +245 0x0320 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0030 //RX_FDDRC_BAND_MARGIN_1 +248 0x0050 //RX_FDDRC_BAND_MARGIN_2 +249 0x0080 //RX_FDDRC_BAND_MARGIN_3 +250 0x0004 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x2000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x2000 //RX_FDDRC_THRD_3_2 +258 0x5000 //RX_FDDRC_THRD_3_3 +259 0x4000 //RX_FDDRC_SLANT_0_0 +260 0x4000 //RX_FDDRC_SLANT_0_1 +261 0x4000 //RX_FDDRC_SLANT_0_2 +262 0x4000 //RX_FDDRC_SLANT_0_3 +263 0x7FFF //RX_FDDRC_SLANT_1_0 +264 0x7FFF //RX_FDDRC_SLANT_1_1 +265 0x7FFF //RX_FDDRC_SLANT_1_2 +266 0x7FFF //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +286 0x001C //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 +#VOL 2 +163 0x4000 //RX_TDDRC_ALPHA_UP_1 +164 0x4000 //RX_TDDRC_ALPHA_UP_2 +165 0x4000 //RX_TDDRC_ALPHA_UP_3 +166 0x4000 //RX_TDDRC_ALPHA_UP_4 +184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +190 0x7FFF //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +269 0x0001 //RX_TDDRC_THRD_0 +270 0x0002 //RX_TDDRC_THRD_1 +271 0x1800 //RX_TDDRC_THRD_2 +272 0x1800 //RX_TDDRC_THRD_3 +273 0x6000 //RX_TDDRC_SLANT_0 +274 0x6E00 //RX_TDDRC_SLANT_1 +275 0x4000 //RX_TDDRC_ALPHA_UP_0 +276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x199A //RX_TDDRC_HMNC_GAIN +279 0x0001 //RX_TDDRC_SMT_FLAG +280 0x0CCD //RX_TDDRC_SMT_W +281 0x02D2 //RX_TDDRC_DRC_GAIN +195 0x0020 //RX_FDEQ_SUBNUM +196 0x4848 //RX_FDEQ_GAIN_0 +197 0x4848 //RX_FDEQ_GAIN_1 +198 0x4848 //RX_FDEQ_GAIN_2 +199 0x4850 //RX_FDEQ_GAIN_3 +200 0x4848 //RX_FDEQ_GAIN_4 +201 0x4848 //RX_FDEQ_GAIN_5 +202 0x4568 //RX_FDEQ_GAIN_6 +203 0x485C //RX_FDEQ_GAIN_7 +204 0x5C60 //RX_FDEQ_GAIN_8 +205 0x685C //RX_FDEQ_GAIN_9 +206 0x5648 //RX_FDEQ_GAIN_10 +207 0x484C //RX_FDEQ_GAIN_11 +208 0x706C //RX_FDEQ_GAIN_12 +209 0x7070 //RX_FDEQ_GAIN_13 +210 0x6868 //RX_FDEQ_GAIN_14 +211 0x6060 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0202 //RX_FDEQ_BIN_0 +221 0x0203 //RX_FDEQ_BIN_1 +222 0x0303 //RX_FDEQ_BIN_2 +223 0x0402 //RX_FDEQ_BIN_3 +224 0x0504 //RX_FDEQ_BIN_4 +225 0x0209 //RX_FDEQ_BIN_5 +226 0x0808 //RX_FDEQ_BIN_6 +227 0x090A //RX_FDEQ_BIN_7 +228 0x0B0C //RX_FDEQ_BIN_8 +229 0x0D0E //RX_FDEQ_BIN_9 +230 0x1013 //RX_FDEQ_BIN_10 +231 0x1719 //RX_FDEQ_BIN_11 +232 0x1B1E //RX_FDEQ_BIN_12 +233 0x1E1E //RX_FDEQ_BIN_13 +234 0x1E28 //RX_FDEQ_BIN_14 +235 0x282C //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x4000 //RX_FDEQ_RESRV_0 +245 0x0320 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0030 //RX_FDDRC_BAND_MARGIN_1 +248 0x0050 //RX_FDDRC_BAND_MARGIN_2 +249 0x0080 //RX_FDDRC_BAND_MARGIN_3 +250 0x0004 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x2000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x2000 //RX_FDDRC_THRD_3_2 +258 0x5000 //RX_FDDRC_THRD_3_3 +259 0x4000 //RX_FDDRC_SLANT_0_0 +260 0x4000 //RX_FDDRC_SLANT_0_1 +261 0x4000 //RX_FDDRC_SLANT_0_2 +262 0x4000 //RX_FDDRC_SLANT_0_3 +263 0x7FFF //RX_FDDRC_SLANT_1_0 +264 0x7FFF //RX_FDDRC_SLANT_1_1 +265 0x7FFF //RX_FDDRC_SLANT_1_2 +266 0x7FFF //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +286 0x0028 //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 +#VOL 3 +163 0x4000 //RX_TDDRC_ALPHA_UP_1 +164 0x4000 //RX_TDDRC_ALPHA_UP_2 +165 0x4000 //RX_TDDRC_ALPHA_UP_3 +166 0x4000 //RX_TDDRC_ALPHA_UP_4 +184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +190 0x7FFF //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +269 0x0001 //RX_TDDRC_THRD_0 +270 0x0002 //RX_TDDRC_THRD_1 +271 0x1800 //RX_TDDRC_THRD_2 +272 0x1800 //RX_TDDRC_THRD_3 +273 0x6000 //RX_TDDRC_SLANT_0 +274 0x6E00 //RX_TDDRC_SLANT_1 +275 0x4000 //RX_TDDRC_ALPHA_UP_0 +276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x199A //RX_TDDRC_HMNC_GAIN +279 0x0001 //RX_TDDRC_SMT_FLAG +280 0x0CCD //RX_TDDRC_SMT_W +281 0x02D2 //RX_TDDRC_DRC_GAIN +195 0x0020 //RX_FDEQ_SUBNUM +196 0x4848 //RX_FDEQ_GAIN_0 +197 0x4848 //RX_FDEQ_GAIN_1 +198 0x4848 //RX_FDEQ_GAIN_2 +199 0x4850 //RX_FDEQ_GAIN_3 +200 0x4848 //RX_FDEQ_GAIN_4 +201 0x4848 //RX_FDEQ_GAIN_5 +202 0x4568 //RX_FDEQ_GAIN_6 +203 0x485C //RX_FDEQ_GAIN_7 +204 0x5C60 //RX_FDEQ_GAIN_8 +205 0x685C //RX_FDEQ_GAIN_9 +206 0x5648 //RX_FDEQ_GAIN_10 +207 0x484C //RX_FDEQ_GAIN_11 +208 0x706C //RX_FDEQ_GAIN_12 +209 0x7070 //RX_FDEQ_GAIN_13 +210 0x6868 //RX_FDEQ_GAIN_14 +211 0x6060 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0202 //RX_FDEQ_BIN_0 +221 0x0203 //RX_FDEQ_BIN_1 +222 0x0303 //RX_FDEQ_BIN_2 +223 0x0402 //RX_FDEQ_BIN_3 +224 0x0504 //RX_FDEQ_BIN_4 +225 0x0209 //RX_FDEQ_BIN_5 +226 0x0808 //RX_FDEQ_BIN_6 +227 0x090A //RX_FDEQ_BIN_7 +228 0x0B0C //RX_FDEQ_BIN_8 +229 0x0D0E //RX_FDEQ_BIN_9 +230 0x1013 //RX_FDEQ_BIN_10 +231 0x1719 //RX_FDEQ_BIN_11 +232 0x1B1E //RX_FDEQ_BIN_12 +233 0x1E1E //RX_FDEQ_BIN_13 +234 0x1E28 //RX_FDEQ_BIN_14 +235 0x282C //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x4000 //RX_FDEQ_RESRV_0 +245 0x0320 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0030 //RX_FDDRC_BAND_MARGIN_1 +248 0x0050 //RX_FDDRC_BAND_MARGIN_2 +249 0x0080 //RX_FDDRC_BAND_MARGIN_3 +250 0x0004 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x2000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x2000 //RX_FDDRC_THRD_3_2 +258 0x5000 //RX_FDDRC_THRD_3_3 +259 0x4000 //RX_FDDRC_SLANT_0_0 +260 0x4000 //RX_FDDRC_SLANT_0_1 +261 0x4000 //RX_FDDRC_SLANT_0_2 +262 0x4000 //RX_FDDRC_SLANT_0_3 +263 0x7FFF //RX_FDDRC_SLANT_1_0 +264 0x7FFF //RX_FDDRC_SLANT_1_1 +265 0x7FFF //RX_FDDRC_SLANT_1_2 +266 0x7FFF //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +286 0x0035 //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 +#VOL 4 +163 0x4000 //RX_TDDRC_ALPHA_UP_1 +164 0x4000 //RX_TDDRC_ALPHA_UP_2 +165 0x4000 //RX_TDDRC_ALPHA_UP_3 +166 0x4000 //RX_TDDRC_ALPHA_UP_4 +184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +190 0x7FFF //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +269 0x0001 //RX_TDDRC_THRD_0 +270 0x0002 //RX_TDDRC_THRD_1 +271 0x1800 //RX_TDDRC_THRD_2 +272 0x1800 //RX_TDDRC_THRD_3 +273 0x6000 //RX_TDDRC_SLANT_0 +274 0x6E00 //RX_TDDRC_SLANT_1 +275 0x4000 //RX_TDDRC_ALPHA_UP_0 +276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x199A //RX_TDDRC_HMNC_GAIN +279 0x0001 //RX_TDDRC_SMT_FLAG +280 0x0CCD //RX_TDDRC_SMT_W +281 0x02D2 //RX_TDDRC_DRC_GAIN +195 0x0020 //RX_FDEQ_SUBNUM +196 0x4C4C //RX_FDEQ_GAIN_0 +197 0x4C4C //RX_FDEQ_GAIN_1 +198 0x4C48 //RX_FDEQ_GAIN_2 +199 0x4870 //RX_FDEQ_GAIN_3 +200 0x4848 //RX_FDEQ_GAIN_4 +201 0x4848 //RX_FDEQ_GAIN_5 +202 0x4568 //RX_FDEQ_GAIN_6 +203 0x485C //RX_FDEQ_GAIN_7 +204 0x5C60 //RX_FDEQ_GAIN_8 +205 0x685C //RX_FDEQ_GAIN_9 +206 0x5648 //RX_FDEQ_GAIN_10 +207 0x484C //RX_FDEQ_GAIN_11 +208 0x706C //RX_FDEQ_GAIN_12 +209 0x7070 //RX_FDEQ_GAIN_13 +210 0x6868 //RX_FDEQ_GAIN_14 +211 0x6060 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0202 //RX_FDEQ_BIN_0 +221 0x0203 //RX_FDEQ_BIN_1 +222 0x0303 //RX_FDEQ_BIN_2 +223 0x0402 //RX_FDEQ_BIN_3 +224 0x0504 //RX_FDEQ_BIN_4 +225 0x0209 //RX_FDEQ_BIN_5 +226 0x0808 //RX_FDEQ_BIN_6 +227 0x090A //RX_FDEQ_BIN_7 +228 0x0B0C //RX_FDEQ_BIN_8 +229 0x0D0E //RX_FDEQ_BIN_9 +230 0x1013 //RX_FDEQ_BIN_10 +231 0x1719 //RX_FDEQ_BIN_11 +232 0x1B1E //RX_FDEQ_BIN_12 +233 0x1E1E //RX_FDEQ_BIN_13 +234 0x1E28 //RX_FDEQ_BIN_14 +235 0x282C //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x4000 //RX_FDEQ_RESRV_0 +245 0x0320 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0030 //RX_FDDRC_BAND_MARGIN_1 +248 0x0050 //RX_FDDRC_BAND_MARGIN_2 +249 0x0080 //RX_FDDRC_BAND_MARGIN_3 +250 0x0004 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x2000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x2000 //RX_FDDRC_THRD_3_2 +258 0x5000 //RX_FDDRC_THRD_3_3 +259 0x4000 //RX_FDDRC_SLANT_0_0 +260 0x4000 //RX_FDDRC_SLANT_0_1 +261 0x4000 //RX_FDDRC_SLANT_0_2 +262 0x4000 //RX_FDDRC_SLANT_0_3 +263 0x7FFF //RX_FDDRC_SLANT_1_0 +264 0x7FFF //RX_FDDRC_SLANT_1_1 +265 0x7FFF //RX_FDDRC_SLANT_1_2 +266 0x7FFF //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +286 0x0052 //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 +#VOL 5 +163 0x4000 //RX_TDDRC_ALPHA_UP_1 +164 0x4000 //RX_TDDRC_ALPHA_UP_2 +165 0x4000 //RX_TDDRC_ALPHA_UP_3 +166 0x4000 //RX_TDDRC_ALPHA_UP_4 +184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +190 0x7FFF //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +269 0x0001 //RX_TDDRC_THRD_0 +270 0x0002 //RX_TDDRC_THRD_1 +271 0x1800 //RX_TDDRC_THRD_2 +272 0x1800 //RX_TDDRC_THRD_3 +273 0x6000 //RX_TDDRC_SLANT_0 +274 0x6E00 //RX_TDDRC_SLANT_1 +275 0x4000 //RX_TDDRC_ALPHA_UP_0 +276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x199A //RX_TDDRC_HMNC_GAIN +279 0x0001 //RX_TDDRC_SMT_FLAG +280 0x0CCD //RX_TDDRC_SMT_W +281 0x02D2 //RX_TDDRC_DRC_GAIN +195 0x0020 //RX_FDEQ_SUBNUM +196 0x4C4C //RX_FDEQ_GAIN_0 +197 0x4C4C //RX_FDEQ_GAIN_1 +198 0x4C48 //RX_FDEQ_GAIN_2 +199 0x4870 //RX_FDEQ_GAIN_3 +200 0x4848 //RX_FDEQ_GAIN_4 +201 0x4848 //RX_FDEQ_GAIN_5 +202 0x4568 //RX_FDEQ_GAIN_6 +203 0x485C //RX_FDEQ_GAIN_7 +204 0x5C60 //RX_FDEQ_GAIN_8 +205 0x685C //RX_FDEQ_GAIN_9 +206 0x5648 //RX_FDEQ_GAIN_10 +207 0x484C //RX_FDEQ_GAIN_11 +208 0x706C //RX_FDEQ_GAIN_12 +209 0x7070 //RX_FDEQ_GAIN_13 +210 0x6868 //RX_FDEQ_GAIN_14 +211 0x6060 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0202 //RX_FDEQ_BIN_0 +221 0x0203 //RX_FDEQ_BIN_1 +222 0x0303 //RX_FDEQ_BIN_2 +223 0x0402 //RX_FDEQ_BIN_3 +224 0x0504 //RX_FDEQ_BIN_4 +225 0x0209 //RX_FDEQ_BIN_5 +226 0x0808 //RX_FDEQ_BIN_6 +227 0x090A //RX_FDEQ_BIN_7 +228 0x0B0C //RX_FDEQ_BIN_8 +229 0x0D0E //RX_FDEQ_BIN_9 +230 0x1013 //RX_FDEQ_BIN_10 +231 0x1719 //RX_FDEQ_BIN_11 +232 0x1B1E //RX_FDEQ_BIN_12 +233 0x1E1E //RX_FDEQ_BIN_13 +234 0x1E28 //RX_FDEQ_BIN_14 +235 0x282C //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x4000 //RX_FDEQ_RESRV_0 +245 0x0320 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0030 //RX_FDDRC_BAND_MARGIN_1 +248 0x0050 //RX_FDDRC_BAND_MARGIN_2 +249 0x0080 //RX_FDDRC_BAND_MARGIN_3 +250 0x0004 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x2000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x2000 //RX_FDDRC_THRD_3_2 +258 0x5000 //RX_FDDRC_THRD_3_3 +259 0x4000 //RX_FDDRC_SLANT_0_0 +260 0x4000 //RX_FDDRC_SLANT_0_1 +261 0x4000 //RX_FDDRC_SLANT_0_2 +262 0x4000 //RX_FDDRC_SLANT_0_3 +263 0x7FFF //RX_FDDRC_SLANT_1_0 +264 0x7FFF //RX_FDDRC_SLANT_1_1 +265 0x7FFF //RX_FDDRC_SLANT_1_2 +266 0x7FFF //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +286 0x0078 //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 +#VOL 6 +163 0x4000 //RX_TDDRC_ALPHA_UP_1 +164 0x4000 //RX_TDDRC_ALPHA_UP_2 +165 0x4000 //RX_TDDRC_ALPHA_UP_3 +166 0x4000 //RX_TDDRC_ALPHA_UP_4 +184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +190 0x7FFF //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +269 0x0001 //RX_TDDRC_THRD_0 +270 0x0002 //RX_TDDRC_THRD_1 +271 0x1800 //RX_TDDRC_THRD_2 +272 0x1800 //RX_TDDRC_THRD_3 +273 0x6000 //RX_TDDRC_SLANT_0 +274 0x6E00 //RX_TDDRC_SLANT_1 +275 0x4000 //RX_TDDRC_ALPHA_UP_0 +276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x199A //RX_TDDRC_HMNC_GAIN +279 0x0001 //RX_TDDRC_SMT_FLAG +280 0x0CCD //RX_TDDRC_SMT_W +281 0x02D2 //RX_TDDRC_DRC_GAIN +195 0x0020 //RX_FDEQ_SUBNUM +196 0x4C4C //RX_FDEQ_GAIN_0 +197 0x4C4C //RX_FDEQ_GAIN_1 +198 0x4C48 //RX_FDEQ_GAIN_2 +199 0x4870 //RX_FDEQ_GAIN_3 +200 0x4848 //RX_FDEQ_GAIN_4 +201 0x4848 //RX_FDEQ_GAIN_5 +202 0x4568 //RX_FDEQ_GAIN_6 +203 0x485C //RX_FDEQ_GAIN_7 +204 0x5C60 //RX_FDEQ_GAIN_8 +205 0x685C //RX_FDEQ_GAIN_9 +206 0x5648 //RX_FDEQ_GAIN_10 +207 0x484C //RX_FDEQ_GAIN_11 +208 0x706C //RX_FDEQ_GAIN_12 +209 0x7070 //RX_FDEQ_GAIN_13 +210 0x6868 //RX_FDEQ_GAIN_14 +211 0x6060 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0202 //RX_FDEQ_BIN_0 +221 0x0203 //RX_FDEQ_BIN_1 +222 0x0303 //RX_FDEQ_BIN_2 +223 0x0402 //RX_FDEQ_BIN_3 +224 0x0504 //RX_FDEQ_BIN_4 +225 0x0209 //RX_FDEQ_BIN_5 +226 0x0808 //RX_FDEQ_BIN_6 +227 0x090A //RX_FDEQ_BIN_7 +228 0x0B0C //RX_FDEQ_BIN_8 +229 0x0D0E //RX_FDEQ_BIN_9 +230 0x1013 //RX_FDEQ_BIN_10 +231 0x1719 //RX_FDEQ_BIN_11 +232 0x1B1E //RX_FDEQ_BIN_12 +233 0x1E1E //RX_FDEQ_BIN_13 +234 0x1E28 //RX_FDEQ_BIN_14 +235 0x282C //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x4000 //RX_FDEQ_RESRV_0 +245 0x0320 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0030 //RX_FDDRC_BAND_MARGIN_1 +248 0x0050 //RX_FDDRC_BAND_MARGIN_2 +249 0x0080 //RX_FDDRC_BAND_MARGIN_3 +250 0x0004 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x2000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x2000 //RX_FDDRC_THRD_3_2 +258 0x5000 //RX_FDDRC_THRD_3_3 +259 0x4000 //RX_FDDRC_SLANT_0_0 +260 0x4000 //RX_FDDRC_SLANT_0_1 +261 0x4000 //RX_FDDRC_SLANT_0_2 +262 0x4000 //RX_FDDRC_SLANT_0_3 +263 0x7FFF //RX_FDDRC_SLANT_1_0 +264 0x7FFF //RX_FDDRC_SLANT_1_1 +265 0x7FFF //RX_FDDRC_SLANT_1_2 +266 0x7FFF //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +286 0x0100 //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 + +#CASE_NAME HANDSFREE-HANDSFREE-CUSTOM2-FB +#PARAM_MODE FULL +#PARAM_TYPE TX+2RX +#TOTAL_CUSTOM_STEP 7+7 +#TX +0 0x0001 //TX_OPERATION_MODE_0 +1 0x0001 //TX_OPERATION_MODE_1 +2 0x0033 //TX_PATCH_REG +3 0x6B5C //TX_SENDFUNC_MODE_0 +4 0x0001 //TX_SENDFUNC_MODE_1 +5 0x0003 //TX_NUM_MIC +6 0x0004 //TX_SAMPLINGFREQ_SIG +7 0x0004 //TX_SAMPLINGFREQ_PROC +8 0x000A //TX_FRAME_SZ_SIG +9 0x000A //TX_FRAME_SZ +10 0x0000 //TX_DELAY_OPT +11 0x0028 //TX_MAX_TAIL_LENGTH +12 0x0001 //TX_NUM_LOUTCHN +13 0x0001 //TX_MAXNUM_AECREF +14 0x0000 //TX_DBG_FUNC_REG +15 0x0000 //TX_DBG_FUNC_REG1 +16 0x0000 //TX_SYS_RESRV_0 +17 0x0000 //TX_SYS_RESRV_1 +18 0x0000 //TX_SYS_RESRV_2 +19 0x0000 //TX_SYS_RESRV_3 +20 0x0000 //TX_DIST2REF0 +21 0x00A4 //TX_DIST2REF1 +22 0x0017 //TX_DIST2REF_02 +23 0x0000 //TX_DIST2REF_03 +24 0x0000 //TX_DIST2REF_04 +25 0x0000 //TX_DIST2REF_05 +26 0x0000 //TX_MMIC +27 0x0FF7 //TX_PGA_0 +28 0x0FF7 //TX_PGA_1 +29 0x0FF7 //TX_PGA_2 +30 0x0000 //TX_PGA_3 +31 0x0000 //TX_PGA_4 +32 0x0000 //TX_PGA_5 +33 0x0001 //TX_MIC_PAIRS +34 0x0000 //TX_MIC_PAIRS_HS +35 0x0002 //TX_MICS_FOR_BF +36 0x0000 //TX_MIC_PAIRS_FORL1 +37 0x0002 //TX_MICS_OF_PAIR0 +38 0x0002 //TX_MICS_OF_PAIR1 +39 0x0002 //TX_MICS_OF_PAIR2 +40 0x0002 //TX_MICS_OF_PAIR3 +41 0x0002 //TX_MIC_DATA_SRC0 +42 0x0000 //TX_MIC_DATA_SRC1 +43 0x0001 //TX_MIC_DATA_SRC2 +44 0x0000 //TX_MIC_DATA_SRC3 +45 0x0000 //TX_MIC_PAIR_CH_04 +46 0x0000 //TX_MIC_PAIR_CH_05 +47 0x0000 //TX_MIC_PAIR_CH_10 +48 0x0000 //TX_MIC_PAIR_CH_11 +49 0x0000 //TX_MIC_PAIR_CH_12 +50 0x0000 //TX_MIC_PAIR_CH_13 +51 0x0000 //TX_MIC_PAIR_CH_14 +52 0x05DC //TX_HD_BIN_MASK +53 0x0010 //TX_HD_SUBAND_MASK +54 0x19A1 //TX_HD_FRAME_AVG_MASK +55 0x0320 //TX_HD_MIN_FRQ +56 0x1000 //TX_HD_ALPHA_PSD +57 0x1100 //TX_T_PHPR1 +58 0x0000 //TX_T_PHPR2 +59 0x0000 //TX_T_PTPR +60 0x0000 //TX_T_PNPR +61 0x0000 //TX_T_PAPR1 +62 0xEE6C //TX_T_PSDVAT +63 0x0800 //TX_CNT +64 0x4000 //TX_ANTI_HOWL_GAIN +65 0x0001 //TX_MICFORBFMARK_0 +66 0x0001 //TX_MICFORBFMARK_1 +67 0x0001 //TX_MICFORBFMARK_2 +68 0x0001 //TX_MICFORBFMARK_3 +69 0x0001 //TX_MICFORBFMARK_4 +70 0x0001 //TX_MICFORBFMARK_5 +71 0x0000 //TX_DIST2REF_10 +72 0x3B33 //TX_DIST2REF_11 +73 0x0A70 //TX_DIST2REF2 +74 0x0000 //TX_DIST2REF_13 +75 0x0000 //TX_DIST2REF_14 +76 0x0000 //TX_DIST2REF_15 +77 0x0000 //TX_DIST2REF_20 +78 0x0000 //TX_DIST2REF_21 +79 0x0000 //TX_DIST2REF_22 +80 0x0000 //TX_DIST2REF_23 +81 0x0000 //TX_DIST2REF_24 +82 0x0000 //TX_DIST2REF_25 +83 0x0000 //TX_DIST2REF_30 +84 0x0000 //TX_DIST2REF_31 +85 0x0000 //TX_DIST2REF_32 +86 0x0000 //TX_DIST2REF_33 +87 0x0000 //TX_DIST2REF_34 +88 0x0000 //TX_DIST2REF_35 +89 0x0000 //TX_MIC_LOC_00 +90 0x0000 //TX_MIC_LOC_01 +91 0x0000 //TX_MIC_LOC_02 +92 0x0000 //TX_MIC_LOC_03 +93 0x0000 //TX_MIC_LOC_04 +94 0x0000 //TX_MIC_LOC_05 +95 0x0000 //TX_MIC_LOC_10 +96 0x0000 //TX_MIC_LOC_11 +97 0x0000 //TX_MIC_LOC_12 +98 0x0000 //TX_MIC_LOC_13 +99 0x0000 //TX_MIC_LOC_14 +100 0x0000 //TX_MIC_LOC_15 +101 0x0000 //TX_MIC_LOC_20 +102 0x0000 //TX_MIC_LOC_21 +103 0x0000 //TX_MIC_LOC_22 +104 0x0000 //TX_MIC_LOC_23 +105 0x0000 //TX_MIC_LOC_24 +106 0x0000 //TX_MIC_LOC_25 +107 0x0800 //TX_MIC_REFBLK_VOLUME +108 0x0CAE //TX_MIC_BLOCK_VOLUME +109 0x0000 //TX_INVERSE_MASK +110 0x0000 //TX_ADCS_MASK +111 0x04D0 //TX_ADCS_GAIN +112 0x4000 //TX_NFC_GAINFAC +113 0x0000 //TX_MAINMIC_BLKFACTOR +114 0x0000 //TX_REFMIC_BLKFACTOR +115 0x0000 //TX_BLMIC_BLKFACTOR +116 0x0000 //TX_BRMIC_BLKFACTOR +117 0x0031 //TX_MICBLK_START_BIN +118 0x0060 //TX_MICBLK_END_BIN +119 0x0015 //TX_MICBLK_FE_HOLD +120 0xFFF2 //TX_MICBLK_MR_EXP_TH +121 0xFFF2 //TX_MICBLK_LR_EXP_TH +122 0x0015 //TX_FENE_HOLD +123 0x4000 //TX_FE_ENER_TH_MTS +124 0x0004 //TX_FE_ENER_TH_EXP +125 0x6000 //TX_C_POST_FLT_MIC_MAINBLK +126 0x6000 //TX_C_POST_FLT_MIC_REFBLK +127 0x0010 //TX_MIC_BLOCK_N +128 0x7E56 //TX_A_HP +129 0x4000 //TX_B_PE +130 0x1800 //TX_THR_PITCH_DET_0 +131 0x1000 //TX_THR_PITCH_DET_1 +132 0x0800 //TX_THR_PITCH_DET_2 +133 0x0008 //TX_PITCH_BFR_LEN +134 0x0003 //TX_SBD_PITCH_DET +135 0x0050 //TX_TD_AEC_L +136 0x4000 //TX_MU0_UNP_TD_AEC +137 0x1000 //TX_MU0_PTD_TD_AEC +138 0x0000 //TX_PP_RESRV_0 +139 0x2A94 //TX_PP_RESRV_1 +140 0x55F0 //TX_PP_RESRV_2 +141 0x0000 //TX_PP_RESRV_3 +142 0x0000 //TX_PP_RESRV_4 +143 0x0000 //TX_PP_RESRV_5 +144 0x0000 //TX_PP_RESRV_6 +145 0x0000 //TX_PP_RESRV_7 +146 0x0028 //TX_TAIL_LENGTH +147 0x0300 //TX_AEC_REF_GAIN_0 +148 0x0800 //TX_AEC_REF_GAIN_1 +149 0x0800 //TX_AEC_REF_GAIN_2 +150 0x7A00 //TX_EAD_THR +151 0x1000 //TX_THR_RE_EST +152 0x0800 //TX_MIN_EQ_RE_EST_0 +153 0x2000 //TX_MIN_EQ_RE_EST_1 +154 0x2000 //TX_MIN_EQ_RE_EST_2 +155 0x4000 //TX_MIN_EQ_RE_EST_3 +156 0x4000 //TX_MIN_EQ_RE_EST_4 +157 0x7FFF //TX_MIN_EQ_RE_EST_5 +158 0x7FFF //TX_MIN_EQ_RE_EST_6 +159 0x7FFF //TX_MIN_EQ_RE_EST_7 +160 0x7FFF //TX_MIN_EQ_RE_EST_8 +161 0x7FFF //TX_MIN_EQ_RE_EST_9 +162 0x7FFF //TX_MIN_EQ_RE_EST_10 +163 0x7FFF //TX_MIN_EQ_RE_EST_11 +164 0x7FFF //TX_MIN_EQ_RE_EST_12 +165 0x4000 //TX_LAMBDA_RE_EST +166 0x0CCD //TX_LAMBDA_CB_NLE +167 0x2000 //TX_C_POST_FLT +168 0x7FFF //TX_GAIN_NP +169 0x0180 //TX_SE_HOLD_N +170 0x00C8 //TX_DT_HOLD_N +171 0x09C4 //TX_DT2_HOLD_N +172 0x6666 //TX_AEC_RESRV_0 +173 0x0000 //TX_AEC_RESRV_1 +174 0x0014 //TX_AEC_RESRV_2 +175 0x0000 //TX_MIC_DELAY_LENGTH +176 0x0000 //TX_REF_DELAY_LENGTH +177 0x0000 //TX_ADD_LINEIN_GAINL +178 0x0000 //TX_ADD_LINEIN_GAINH +179 0x0000 //TX_MIN_EQ_RE_EST_14 +180 0x0000 //TX_DTD_THR1_8 +181 0x7FFF //TX_DTD_THR2_8 +182 0x0000 //TX_DTD_MIC_BLK2 +183 0x0008 //TX_FRQ_LIN_LEN +184 0x7FFF //TX_FRQ_AEC_LEN_RHO +185 0x6000 //TX_MU0_UNP_FRQ_AEC +186 0x4000 //TX_MU0_PTD_FRQ_AEC +187 0x000A //TX_MINENOISETH +188 0x0800 //TX_MU0_RE_EST +189 0x0001 //TX_AEC_NUM_CH +190 0x0000 //TX_BIGECHOATTENUATION_MAX +191 0x2000 //TX_A_POST_FLT_MICBLK +192 0x0000 //TX_BLKENERTH +193 0x0000 //TX_BLKENERHIGHTH +194 0x0000 //TX_NORMENERTH +195 0x0000 //TX_NORMENERHIGHTH +196 0x0000 //TX_NORMENERHIGHTHL +197 0x7D00 //TX_DTD_THR1_0 +198 0x7FF0 //TX_DTD_THR1_1 +199 0x7FF0 //TX_DTD_THR1_2 +200 0x7FF0 //TX_DTD_THR1_3 +201 0x7FF0 //TX_DTD_THR1_4 +202 0x7FF0 //TX_DTD_THR1_5 +203 0x7FF0 //TX_DTD_THR1_6 +204 0x0CCD //TX_DTD_THR2_0 +205 0x0CCD //TX_DTD_THR2_1 +206 0x0CCD //TX_DTD_THR2_2 +207 0x0CCD //TX_DTD_THR2_3 +208 0x0CCD //TX_DTD_THR2_4 +209 0x0CCD //TX_DTD_THR2_5 +210 0x0CCD //TX_DTD_THR2_6 +211 0x7FFF //TX_DTD_THR3 +212 0x0000 //TX_SPK_CUT_K +213 0x0DAC //TX_DT_CUT_K +214 0x0020 //TX_DT_CUT_THR +215 0x04EB //TX_COMFORT_G +216 0x01F4 //TX_POWER_YOUT_TH +217 0x4000 //TX_FDPFGAINECHO +218 0x0000 //TX_DTD_HD_THR +219 0x0000 //TX_SPK_CUT_K_S +220 0x7FFF //TX_DTD_MIC_BLK +221 0x023E //TX_ADPT_STRICT_L +222 0x023E //TX_ADPT_STRICT_H +223 0x0BB8 //TX_RATIO_DT_L_TH_LOW +224 0x3A98 //TX_RATIO_DT_H_TH_LOW +225 0x1770 //TX_RATIO_DT_L_TH_HIGH +226 0x4E20 //TX_RATIO_DT_H_TH_HIGH +227 0x09C4 //TX_RATIO_DT_L0_TH +228 0x2000 //TX_B_POST_FILT_ECHO_L +229 0x2000 //TX_B_POST_FILT_ECHO_H +230 0x0200 //TX_MIN_G_CTRL_ECHO +231 0x1000 //TX_B_LESSCUT_RTO_ECHO +232 0x0063 //TX_EPD_OFFSET_00 +233 0x0000 //TX_EPD_OFFST_01 +234 0x1388 //TX_RATIO_DT_L0_TH_HIGH +235 0x3A98 //TX_RATIO_DT_H_TH_CUT +236 0x7FFF //TX_MIN_EQ_RE_EST_13 +237 0x0000 //TX_DTD_THR1_7 +238 0x0000 //TX_DTD_THR2_7 +239 0x0800 //TX_DT_RESRV_7 +240 0x0800 //TX_DT_RESRV_8 +241 0x0000 //TX_DT_RESRV_9 +242 0xF800 //TX_THR_SN_EST_0 +243 0xFA00 //TX_THR_SN_EST_1 +244 0xFA00 //TX_THR_SN_EST_2 +245 0xFB00 //TX_THR_SN_EST_3 +246 0xFA00 //TX_THR_SN_EST_4 +247 0xFA00 //TX_THR_SN_EST_5 +248 0xF800 //TX_THR_SN_EST_6 +249 0xF800 //TX_THR_SN_EST_7 +250 0x0100 //TX_DELTA_THR_SN_EST_0 +251 0x0100 //TX_DELTA_THR_SN_EST_1 +252 0x0200 //TX_DELTA_THR_SN_EST_2 +253 0x0100 //TX_DELTA_THR_SN_EST_3 +254 0x0100 //TX_DELTA_THR_SN_EST_4 +255 0x0200 //TX_DELTA_THR_SN_EST_5 +256 0x0200 //TX_DELTA_THR_SN_EST_6 +257 0x0200 //TX_DELTA_THR_SN_EST_7 +258 0x4000 //TX_LAMBDA_NN_EST_0 +259 0x4000 //TX_LAMBDA_NN_EST_1 +260 0x4000 //TX_LAMBDA_NN_EST_2 +261 0x4000 //TX_LAMBDA_NN_EST_3 +262 0x4000 //TX_LAMBDA_NN_EST_4 +263 0x4000 //TX_LAMBDA_NN_EST_5 +264 0x4000 //TX_LAMBDA_NN_EST_6 +265 0x4000 //TX_LAMBDA_NN_EST_7 +266 0x0400 //TX_N_SN_EST +267 0x001E //TX_INBEAM_T +268 0x0041 //TX_INBEAMHOLDT +269 0x2000 //TX_G_STRICT +270 0x2000 //TX_EQ_THR_BF +271 0x799A //TX_LAMBDA_EQ_BF +272 0x1000 //TX_NE_RTO_TH +273 0x0400 //TX_NE_RTO_TH_L +274 0x0800 //TX_MAINREFRTOH_TH_H +275 0x0800 //TX_MAINREFRTOH_TH_L +276 0x0800 //TX_MAINREFRTO_TH_H +277 0x0800 //TX_MAINREFRTO_TH_L +278 0x0200 //TX_MAINREFRTO_TH_EQ +279 0x2000 //TX_B_POST_FLT_0 +280 0x1000 //TX_B_POST_FLT_1 +281 0x0010 //TX_NS_LVL_CTRL_0 +282 0x0014 //TX_NS_LVL_CTRL_1 +283 0x0018 //TX_NS_LVL_CTRL_2 +284 0x0016 //TX_NS_LVL_CTRL_3 +285 0x0014 //TX_NS_LVL_CTRL_4 +286 0x0011 //TX_NS_LVL_CTRL_5 +287 0x0014 //TX_NS_LVL_CTRL_6 +288 0x0011 //TX_NS_LVL_CTRL_7 +289 0x000F //TX_MIN_GAIN_S_0 +290 0x0010 //TX_MIN_GAIN_S_1 +291 0x0010 //TX_MIN_GAIN_S_2 +292 0x0010 //TX_MIN_GAIN_S_3 +293 0x0010 //TX_MIN_GAIN_S_4 +294 0x0010 //TX_MIN_GAIN_S_5 +295 0x0010 //TX_MIN_GAIN_S_6 +296 0x000F //TX_MIN_GAIN_S_7 +297 0x6000 //TX_NMOS_SUP +298 0x0000 //TX_NS_MAX_PRI_SNR_TH +299 0x0000 //TX_NMOS_SUP_MENSA +300 0x7FFF //TX_SNRI_SUP_0 +301 0x4000 //TX_SNRI_SUP_1 +302 0x4000 //TX_SNRI_SUP_2 +303 0x4000 //TX_SNRI_SUP_3 +304 0x4000 //TX_SNRI_SUP_4 +305 0x50C0 //TX_SNRI_SUP_5 +306 0x4000 //TX_SNRI_SUP_6 +307 0x7FFF //TX_SNRI_SUP_7 +308 0x7FFF //TX_THR_LFNS +309 0x0018 //TX_G_LFNS +310 0x09C4 //TX_GAIN0_NTH +311 0x000A //TX_MUSIC_MORENS +312 0x7FFF //TX_A_POST_FILT_0 +313 0x2000 //TX_A_POST_FILT_1 +314 0x5000 //TX_A_POST_FILT_S_0 +315 0x4C00 //TX_A_POST_FILT_S_1 +316 0x4000 //TX_A_POST_FILT_S_2 +317 0x6000 //TX_A_POST_FILT_S_3 +318 0x4000 //TX_A_POST_FILT_S_4 +319 0x5000 //TX_A_POST_FILT_S_5 +320 0x6000 //TX_A_POST_FILT_S_6 +321 0x7000 //TX_A_POST_FILT_S_7 +322 0x2000 //TX_B_POST_FILT_0 +323 0x2000 //TX_B_POST_FILT_1 +324 0x2000 //TX_B_POST_FILT_2 +325 0x4000 //TX_B_POST_FILT_3 +326 0x4000 //TX_B_POST_FILT_4 +327 0x1000 //TX_B_POST_FILT_5 +328 0x1000 //TX_B_POST_FILT_6 +329 0x2000 //TX_B_POST_FILT_7 +330 0x4000 //TX_B_LESSCUT_RTO_S_0 +331 0x7FFF //TX_B_LESSCUT_RTO_S_1 +332 0x7FFF //TX_B_LESSCUT_RTO_S_2 +333 0x7FFF //TX_B_LESSCUT_RTO_S_3 +334 0x7FFF //TX_B_LESSCUT_RTO_S_4 +335 0x6000 //TX_B_LESSCUT_RTO_S_5 +336 0x7FFF //TX_B_LESSCUT_RTO_S_6 +337 0x7FFF //TX_B_LESSCUT_RTO_S_7 +338 0x7C00 //TX_LAMBDA_PFILT +339 0x7C00 //TX_LAMBDA_PFILT_S_0 +340 0x7C00 //TX_LAMBDA_PFILT_S_1 +341 0x7A00 //TX_LAMBDA_PFILT_S_2 +342 0x7C00 //TX_LAMBDA_PFILT_S_3 +343 0x7C00 //TX_LAMBDA_PFILT_S_4 +344 0x7C00 //TX_LAMBDA_PFILT_S_5 +345 0x7C00 //TX_LAMBDA_PFILT_S_6 +346 0x7C00 //TX_LAMBDA_PFILT_S_7 +347 0x0000 //TX_K_PEPPER +348 0x0800 //TX_A_PEPPER +349 0x1EAA //TX_K_PEPPER_HF +350 0x0600 //TX_A_PEPPER_HF +351 0x0001 //TX_HMNC_BST_FLG +352 0x0200 //TX_HMNC_BST_THR +353 0x0200 //TX_DT_BINVAD_TH_0 +354 0x0200 //TX_DT_BINVAD_TH_1 +355 0x0200 //TX_DT_BINVAD_TH_2 +356 0x0200 //TX_DT_BINVAD_TH_3 +357 0x1F40 //TX_DT_BINVAD_ENDF +358 0x0100 //TX_C_POST_FLT_DT +359 0x0CCD //TX_NS_B_POST_FLT_LESSCUT +360 0x0100 //TX_DT_BOOST +361 0x0000 //TX_BF_SGRAD_FLG +362 0x0005 //TX_BF_DVG_TH +363 0x001E //TX_SN_C_F +364 0x0000 //TX_K_APT +365 0x0001 //TX_NOISEDET +366 0x0064 //TX_NDETCT +367 0x0050 //TX_NOISE_TH_0 +368 0x7FFF //TX_NOISE_TH_0_2 +369 0x7FFF //TX_NOISE_TH_0_3 +370 0x07D0 //TX_NOISE_TH_1 +371 0x0DAC //TX_NOISE_TH_2 +372 0x4E20 //TX_NOISE_TH_3 +373 0x4E20 //TX_NOISE_TH_4 +374 0x59D8 //TX_NOISE_TH_5 +375 0x7FFF //TX_NOISE_TH_5_2 +376 0x0000 //TX_NOISE_TH_5_3 +377 0x7FFF //TX_NOISE_TH_5_4 +378 0x2710 //TX_NOISE_TH_6 +379 0x0033 //TX_MINENOISE_TH +380 0xD508 //TX_MORENS_TFMASK_TH +381 0x0001 //TX_DRC_QUIET_FLOOR +382 0x7999 //TX_RATIODTL_CUT_TH +383 0x0119 //TX_DT_CUT_K1 +384 0x0666 //TX_OUT_ENER_S_TH_CLEAN +385 0x0666 //TX_OUT_ENER_S_TH_LESSCLEAN +386 0x0333 //TX_OUT_ENER_S_TH_NOISY +387 0x019A //TX_OUT_ENER_TH_NOISE +388 0x0333 //TX_OUT_ENER_TH_SPEECH +389 0x2000 //TX_SN_NPB_GAIN +390 0x0000 //TX_NN_NPB_GAIN +391 0x7FFF //TX_POST_MASK_SUP_HSNE +392 0x1388 //TX_TAIL_DET_TH +393 0x4000 //TX_B_LESSCUT_RTO_WTA +394 0x0000 //TX_MEL_G_R +395 0x0080 //TX_SUPHIGH_TH +396 0x0000 //TX_MASK_G_R +397 0x0002 //TX_EXTRA_NS_L +398 0x1800 //TX_C_POST_FLT_MASK +399 0x4000 //TX_A_POST_FLT_WNS +400 0x0148 //TX_MIN_G_LOW300HZ +401 0x0002 //TX_MAXLEVEL_CNG +402 0x00B4 //TX_STN_NOISE_TH +403 0x4000 //TX_POST_MASK_SUP +404 0x7FFF //TX_POST_MASK_ADJUST +405 0x00C8 //TX_NS_ENOISE_MIC0_TH +406 0x0033 //TX_MINENOISE_MIC0_TH +407 0x012C //TX_MINENOISE_MIC0_S_TH +408 0x7FFF //TX_MIN_G_CTRL_SSNS +409 0x0000 //TX_METAL_RTO_THR +410 0x4848 //TX_NS_FP_K_METAL +411 0x3A98 //TX_NOISEDET_BOOST_TH +412 0x0FA0 //TX_NSMOOTH_TH +413 0x0000 //TX_NS_RESRV_8 +414 0x1800 //TX_RHO_UPB +415 0x0BB8 //TX_N_HOLD_HS +416 0x0050 //TX_N_RHO_BFR0 +417 0x7FFF //TX_LAMBDA_ARSP_EST +418 0x0100 //TX_EXTRA_GAIN_MICBLOCK +419 0x0CCD //TX_THR_STD_NSR +420 0x019A //TX_THR_STD_PLH +421 0x2AF8 //TX_N_HOLD_STD +422 0x0066 //TX_THR_STD_RHO +423 0x2000 //TX_BF_RESET_THR_HS +424 0x09C4 //TX_SB_RTO_MEAN_TH +425 0x0000 //TX_SB_RHO_MEAN_TH_NTALK +426 0x3800 //TX_SB_RTO_MEAN_TH_ABN +427 0x2EE0 //TX_SB_RTO_MEAN_TH_RUB +428 0x0000 //TX_WTA_EN_RTO_TH +429 0x0000 //TX_TOP_ENER_TH_F +430 0x0000 //TX_DESIRED_TALK_HOLDT +431 0x0800 //TX_MIC_BLOCK_FACTOR +432 0x0000 //TX_NSEST_BFRLRNRDC +433 0x0000 //TX_THR_POST_FLT_HS +434 0x0010 //TX_HS_VAD_BIN +435 0x2666 //TX_THR_VAD_HS +436 0x2CCD //TX_MEAN_RTO_MIN_TH2 +437 0x0032 //TX_SILENCE_T +438 0x0000 //TX_A_POST_FLT_WTA +439 0x799A //TX_LAMBDA_PFLT_WTA +440 0x0000 //TX_SB_RHO_MEAN2_TH +441 0x0190 //TX_SB_RHO_MEAN3_TH +442 0x0000 //TX_HS_RESRV_4 +443 0x0000 //TX_HS_RESRV_5 +444 0x003C //TX_DOA_VAD_THR_1 +445 0x0000 //TX_DOA_VAD_THR_2 +446 0x0028 //TX_DOA_VAD_THR1_0 +447 0x0028 //TX_DOA_VAD_THR1_1 +448 0x0000 //TX_SRC_DOA_RNG_LOW_0A +449 0x00B4 //TX_SRC_DOA_RNG_HIGH_0A +450 0x005A //TX_DFLT_SRC_DOA_0A +451 0x0000 //TX_SRC_DOA_RNG_LOW_0B +452 0x0000 //TX_SRC_DOA_RNG_HIGH_0B +453 0x0000 //TX_DFLT_SRC_DOA_0B +454 0x0000 //TX_SRC_DOA_RNG_LOW_0C +455 0x0000 //TX_SRC_DOA_RNG_HIGH_0C +456 0x0000 //TX_DFLT_SRC_DOA_0C +457 0x0000 //TX_SRC_DOA_RNG_LOW_0D +458 0x0000 //TX_SRC_DOA_RNG_HIGH_0D +459 0x0000 //TX_DFLT_SRC_DOA_0D +460 0x0000 //TX_SRC_DOA_RNG_LOW_1A +461 0x00B4 //TX_SRC_DOA_RNG_HIGH_1A +462 0x005A //TX_DFLT_SRC_DOA_1A +463 0x0000 //TX_SRC_DOA_RNG_LOW_1B +464 0x00B4 //TX_SRC_DOA_RNG_HIGH_1B +465 0x005A //TX_DFLT_SRC_DOA_1B +466 0x0000 //TX_SRC_DOA_RNG_LOW_1C +467 0x00B4 //TX_SRC_DOA_RNG_HIGH_1C +468 0x005A //TX_DFLT_SRC_DOA_1C +469 0x0000 //TX_SRC_DOA_RNG_LOW_1D +470 0x00B4 //TX_SRC_DOA_RNG_HIGH_1D +471 0x005A //TX_DFLT_SRC_DOA_1D +472 0x0100 //TX_BF_HOLDOFF_T +473 0x7FFF //TX_DOA_COST_FACTOR +474 0x4000 //TX_MAINTOREFR_TH0 +475 0x071C //TX_DOA_TRK_THR +476 0x012C //TX_DOA_TRACK_HT +477 0x0200 //TX_N1_HOLD_HF +478 0x0100 //TX_N2_HOLD_HF +479 0x3000 //TX_BF_RESET_THR_HF +480 0x7333 //TX_DOA_SMOOTH +481 0x0800 //TX_MU_BF +482 0x0800 //TX_BF_MU_LF_B2 +483 0x0040 //TX_BF_FC_END_BIN_B2 +484 0x0020 //TX_BF_FC_END_BIN +485 0x0000 //TX_HF_RESRV_25 +486 0x0000 //TX_HF_RESRV_26 +487 0x0007 //TX_N_DOA_SEED +488 0x0001 //TX_FINE_DOA_SEARCH_FLG +489 0x0000 //TX_HF_RESRV_27 +490 0x038E //TX_DLT_SRC_DOA_RNG +491 0x0200 //TX_BF_MU_LF +492 0x0000 //TX_DFLT_SRC_LOC_0 +493 0x7FFF //TX_DFLT_SRC_LOC_1 +494 0x0000 //TX_DFLT_SRC_LOC_2 +495 0x038E //TX_DOA_TRACK_VADTH +496 0x0000 //TX_DOA_TRACK_NEW +497 0x0230 //TX_NOR_OFF_THR +498 0x0CCD //TX_MORE_ON_700HZ_THR +499 0x2000 //TX_MU_BF_ADPT_NS +500 0x0000 //TX_ADAPT_LEN +501 0x2000 //TX_MORE_SNS +502 0x0000 //TX_NOR_OFF_TH1 +503 0x0000 //TX_WIDE_MASK_TH +504 0x4650 //TX_SUBSNRATIOHIGH4MEANBCK_THR +505 0x7FFF //TX_C_POST_FLT_CUT +506 0x2000 //TX_RADIODTLV +507 0x0320 //TX_POWER_LINEIN_TH +508 0x0014 //TX_FE_VADCOUNT_TH_FC +509 0x0000 //TX_ECHO_SUPP_FC +510 0x0C80 //TX_ECHO_TH +511 0x6666 //TX_MIC_TO_BFGAIN +512 0x0000 //TX_MICTOBFGAIN0 +513 0x0000 //TX_FASTMUE_TH +514 0x3000 //TX_DEREVERB_LF_MU +515 0x34CD //TX_DEREVERB_HF_MU +516 0x0007 //TX_DEREVERB_DELAY +517 0x0004 //TX_DEREVERB_COEF_LEN +518 0x0003 //TX_DEREVERB_DNR +519 0x0000 //TX_DEREVERB_ALPHA +520 0x0000 //TX_DEREVERB_BETA +521 0x3A98 //TX_GSC_RTOL_TH +522 0x3A98 //TX_GSC_RTOH_TH +523 0x7E2C //TX_WIDE2_MEANHTH +524 0x0000 //TX_DR_RESRV_5 +525 0x0000 //TX_DR_RESRV_6 +526 0x0000 //TX_DR_RESRV_7 +527 0x0000 //TX_DR_RESRV_8 +528 0x1333 //TX_WIND_MARK_TH +529 0x399A //TX_CORR_THR +530 0x0004 //TX_SNR_THR +531 0x0010 //TX_ENGY_THR +532 0x1770 //TX_CORR_HIGH_TH +533 0x6000 //TX_ENGY_THR_2 +534 0x3400 //TX_MEAN_RTO_THR +535 0x0028 //TX_WNS_ENOISE_MIC0_TH +536 0x3000 //TX_RATIOMICL_TH +537 0x64CD //TX_CALIG_HS +538 0x0000 //TX_LVL_CTRL +539 0x0014 //TX_WIND_SUPRTO +540 0x000A //TX_WNS_MIN_G +541 0x0000 //TX_WNS_B_POST_FLT +542 0x2800 //TX_RATIOMICH_TH +543 0xD120 //TX_WIND_INBEAM_L_TH +544 0x0FA0 //TX_WIND_INBEAM_H_TH +545 0x2000 //TX_WNS_RESRV_0 +546 0x59D8 //TX_WNS_RESRV_1 +547 0x0000 //TX_WNS_RESRV_2 +548 0x0000 //TX_WNS_RESRV_3 +549 0x0000 //TX_WNS_RESRV_4 +550 0x0000 //TX_WNS_RESRV_5 +551 0x0000 //TX_WNS_RESRV_6 +552 0x0000 //TX_PB_B_POST_FLT_LESSCUT +553 0x0070 //TX_BF_LESSCUT_BBIN +554 0x0070 //TX_BF_LESSCUT_EBIN +555 0x0010 //TX_POSTBFB0 +556 0x0070 //TX_POSTBFB +557 0x00B0 //TX_POSTBFE +558 0x0E66 //TX_SPEECH_SNR_TH +559 0x0050 //TX_PB_MAX_PRI_SNR_TH +560 0x770A //TX_MAX_PRI_SNR_TH_L +561 0x0000 //TX_PFGAIN +562 0x0000 //TX_MAINTOREFR_TH +563 0x0000 //TX_SAM_MARK +564 0x0000 //TX_PB_RESRV_0 +565 0x0000 //TX_PB_RESRV_1 +566 0x0020 //TX_FDEQ_SUBNUM +567 0x4848 //TX_FDEQ_GAIN_0 +568 0x4848 //TX_FDEQ_GAIN_1 +569 0x4848 //TX_FDEQ_GAIN_2 +570 0x4848 //TX_FDEQ_GAIN_3 +571 0x4848 //TX_FDEQ_GAIN_4 +572 0x4848 //TX_FDEQ_GAIN_5 +573 0x4848 //TX_FDEQ_GAIN_6 +574 0x4848 //TX_FDEQ_GAIN_7 +575 0x4848 //TX_FDEQ_GAIN_8 +576 0x4853 //TX_FDEQ_GAIN_9 +577 0x5450 //TX_FDEQ_GAIN_10 +578 0x7465 //TX_FDEQ_GAIN_11 +579 0x807F //TX_FDEQ_GAIN_12 +580 0x82C4 //TX_FDEQ_GAIN_13 +581 0xC4C4 //TX_FDEQ_GAIN_14 +582 0xC4C4 //TX_FDEQ_GAIN_15 +583 0x4848 //TX_FDEQ_GAIN_16 +584 0x4848 //TX_FDEQ_GAIN_17 +585 0x4848 //TX_FDEQ_GAIN_18 +586 0x4848 //TX_FDEQ_GAIN_19 +587 0x4848 //TX_FDEQ_GAIN_20 +588 0x4848 //TX_FDEQ_GAIN_21 +589 0x4848 //TX_FDEQ_GAIN_22 +590 0x4848 //TX_FDEQ_GAIN_23 +591 0x0202 //TX_FDEQ_BIN_0 +592 0x0203 //TX_FDEQ_BIN_1 +593 0x0304 //TX_FDEQ_BIN_2 +594 0x0405 //TX_FDEQ_BIN_3 +595 0x0607 //TX_FDEQ_BIN_4 +596 0x0809 //TX_FDEQ_BIN_5 +597 0x0A0B //TX_FDEQ_BIN_6 +598 0x0C0D //TX_FDEQ_BIN_7 +599 0x0E0F //TX_FDEQ_BIN_8 +600 0x1011 //TX_FDEQ_BIN_9 +601 0x1214 //TX_FDEQ_BIN_10 +602 0x1618 //TX_FDEQ_BIN_11 +603 0x1C1C //TX_FDEQ_BIN_12 +604 0x2020 //TX_FDEQ_BIN_13 +605 0x2020 //TX_FDEQ_BIN_14 +606 0x2011 //TX_FDEQ_BIN_15 +607 0x0000 //TX_FDEQ_BIN_16 +608 0x0000 //TX_FDEQ_BIN_17 +609 0x0000 //TX_FDEQ_BIN_18 +610 0x0000 //TX_FDEQ_BIN_19 +611 0x0000 //TX_FDEQ_BIN_20 +612 0x0000 //TX_FDEQ_BIN_21 +613 0x0000 //TX_FDEQ_BIN_22 +614 0x0000 //TX_FDEQ_BIN_23 +615 0x0000 //TX_FDEQ_PADDING +616 0x0020 //TX_PREEQ_SUBNUM_MIC0 +617 0x4848 //TX_PREEQ_GAIN_MIC0_0 +618 0x4848 //TX_PREEQ_GAIN_MIC0_1 +619 0x4848 //TX_PREEQ_GAIN_MIC0_2 +620 0x4848 //TX_PREEQ_GAIN_MIC0_3 +621 0x4848 //TX_PREEQ_GAIN_MIC0_4 +622 0x4848 //TX_PREEQ_GAIN_MIC0_5 +623 0x4A4C //TX_PREEQ_GAIN_MIC0_6 +624 0x4E50 //TX_PREEQ_GAIN_MIC0_7 +625 0x5456 //TX_PREEQ_GAIN_MIC0_8 +626 0x585C //TX_PREEQ_GAIN_MIC0_9 +627 0x5C64 //TX_PREEQ_GAIN_MIC0_10 +628 0x7478 //TX_PREEQ_GAIN_MIC0_11 +629 0x705C //TX_PREEQ_GAIN_MIC0_12 +630 0x4838 //TX_PREEQ_GAIN_MIC0_13 +631 0x3C70 //TX_PREEQ_GAIN_MIC0_14 +632 0x4848 //TX_PREEQ_GAIN_MIC0_15 +633 0x4848 //TX_PREEQ_GAIN_MIC0_16 +634 0x4848 //TX_PREEQ_GAIN_MIC0_17 +635 0x4848 //TX_PREEQ_GAIN_MIC0_18 +636 0x4848 //TX_PREEQ_GAIN_MIC0_19 +637 0x4848 //TX_PREEQ_GAIN_MIC0_20 +638 0x4848 //TX_PREEQ_GAIN_MIC0_21 +639 0x4848 //TX_PREEQ_GAIN_MIC0_22 +640 0x4848 //TX_PREEQ_GAIN_MIC0_23 +641 0x0202 //TX_PREEQ_BIN_MIC0_0 +642 0x0203 //TX_PREEQ_BIN_MIC0_1 +643 0x0303 //TX_PREEQ_BIN_MIC0_2 +644 0x0304 //TX_PREEQ_BIN_MIC0_3 +645 0x0405 //TX_PREEQ_BIN_MIC0_4 +646 0x0506 //TX_PREEQ_BIN_MIC0_5 +647 0x0708 //TX_PREEQ_BIN_MIC0_6 +648 0x0909 //TX_PREEQ_BIN_MIC0_7 +649 0x090B //TX_PREEQ_BIN_MIC0_8 +650 0x0C10 //TX_PREEQ_BIN_MIC0_9 +651 0x1013 //TX_PREEQ_BIN_MIC0_10 +652 0x1414 //TX_PREEQ_BIN_MIC0_11 +653 0x1414 //TX_PREEQ_BIN_MIC0_12 +654 0x1C1E //TX_PREEQ_BIN_MIC0_13 +655 0x1E28 //TX_PREEQ_BIN_MIC0_14 +656 0x462C //TX_PREEQ_BIN_MIC0_15 +657 0x0000 //TX_PREEQ_BIN_MIC0_16 +658 0x0000 //TX_PREEQ_BIN_MIC0_17 +659 0x0000 //TX_PREEQ_BIN_MIC0_18 +660 0x0000 //TX_PREEQ_BIN_MIC0_19 +661 0x0000 //TX_PREEQ_BIN_MIC0_20 +662 0x0000 //TX_PREEQ_BIN_MIC0_21 +663 0x0000 //TX_PREEQ_BIN_MIC0_22 +664 0x0000 //TX_PREEQ_BIN_MIC0_23 +665 0x0030 //TX_PREEQ_SUBNUM_MIC1 +666 0x4848 //TX_PREEQ_GAIN_MIC1_0 +667 0x4848 //TX_PREEQ_GAIN_MIC1_1 +668 0x4848 //TX_PREEQ_GAIN_MIC1_2 +669 0x4848 //TX_PREEQ_GAIN_MIC1_3 +670 0x4848 //TX_PREEQ_GAIN_MIC1_4 +671 0x4848 //TX_PREEQ_GAIN_MIC1_5 +672 0x4848 //TX_PREEQ_GAIN_MIC1_6 +673 0x4848 //TX_PREEQ_GAIN_MIC1_7 +674 0x4848 //TX_PREEQ_GAIN_MIC1_8 +675 0x4848 //TX_PREEQ_GAIN_MIC1_9 +676 0x4848 //TX_PREEQ_GAIN_MIC1_10 +677 0x4848 //TX_PREEQ_GAIN_MIC1_11 +678 0x4848 //TX_PREEQ_GAIN_MIC1_12 +679 0x4848 //TX_PREEQ_GAIN_MIC1_13 +680 0x4848 //TX_PREEQ_GAIN_MIC1_14 +681 0x4848 //TX_PREEQ_GAIN_MIC1_15 +682 0x4848 //TX_PREEQ_GAIN_MIC1_16 +683 0x4848 //TX_PREEQ_GAIN_MIC1_17 +684 0x4848 //TX_PREEQ_GAIN_MIC1_18 +685 0x4848 //TX_PREEQ_GAIN_MIC1_19 +686 0x4848 //TX_PREEQ_GAIN_MIC1_20 +687 0x4848 //TX_PREEQ_GAIN_MIC1_21 +688 0x4848 //TX_PREEQ_GAIN_MIC1_22 +689 0x4848 //TX_PREEQ_GAIN_MIC1_23 +690 0x1812 //TX_PREEQ_BIN_MIC1_0 +691 0x0A0A //TX_PREEQ_BIN_MIC1_1 +692 0x0808 //TX_PREEQ_BIN_MIC1_2 +693 0x080A //TX_PREEQ_BIN_MIC1_3 +694 0x0B09 //TX_PREEQ_BIN_MIC1_4 +695 0x0A06 //TX_PREEQ_BIN_MIC1_5 +696 0x0606 //TX_PREEQ_BIN_MIC1_6 +697 0x0605 //TX_PREEQ_BIN_MIC1_7 +698 0x050A //TX_PREEQ_BIN_MIC1_8 +699 0x1505 //TX_PREEQ_BIN_MIC1_9 +700 0x0506 //TX_PREEQ_BIN_MIC1_10 +701 0x0615 //TX_PREEQ_BIN_MIC1_11 +702 0x1516 //TX_PREEQ_BIN_MIC1_12 +703 0x2021 //TX_PREEQ_BIN_MIC1_13 +704 0x2021 //TX_PREEQ_BIN_MIC1_14 +705 0x2021 //TX_PREEQ_BIN_MIC1_15 +706 0x0800 //TX_PREEQ_BIN_MIC1_16 +707 0x0000 //TX_PREEQ_BIN_MIC1_17 +708 0x0000 //TX_PREEQ_BIN_MIC1_18 +709 0x0000 //TX_PREEQ_BIN_MIC1_19 +710 0x0000 //TX_PREEQ_BIN_MIC1_20 +711 0x0000 //TX_PREEQ_BIN_MIC1_21 +712 0x0000 //TX_PREEQ_BIN_MIC1_22 +713 0x0000 //TX_PREEQ_BIN_MIC1_23 +714 0x0020 //TX_PREEQ_SUBNUM_MIC2 +715 0x4848 //TX_PREEQ_GAIN_MIC2_0 +716 0x4848 //TX_PREEQ_GAIN_MIC2_1 +717 0x4848 //TX_PREEQ_GAIN_MIC2_2 +718 0x4848 //TX_PREEQ_GAIN_MIC2_3 +719 0x4848 //TX_PREEQ_GAIN_MIC2_4 +720 0x4848 //TX_PREEQ_GAIN_MIC2_5 +721 0x4848 //TX_PREEQ_GAIN_MIC2_6 +722 0x4848 //TX_PREEQ_GAIN_MIC2_7 +723 0x4848 //TX_PREEQ_GAIN_MIC2_8 +724 0x4848 //TX_PREEQ_GAIN_MIC2_9 +725 0x4848 //TX_PREEQ_GAIN_MIC2_10 +726 0x4848 //TX_PREEQ_GAIN_MIC2_11 +727 0x4848 //TX_PREEQ_GAIN_MIC2_12 +728 0x4848 //TX_PREEQ_GAIN_MIC2_13 +729 0x4848 //TX_PREEQ_GAIN_MIC2_14 +730 0x4848 //TX_PREEQ_GAIN_MIC2_15 +731 0x4848 //TX_PREEQ_GAIN_MIC2_16 +732 0x4848 //TX_PREEQ_GAIN_MIC2_17 +733 0x4848 //TX_PREEQ_GAIN_MIC2_18 +734 0x4848 //TX_PREEQ_GAIN_MIC2_19 +735 0x4848 //TX_PREEQ_GAIN_MIC2_20 +736 0x4848 //TX_PREEQ_GAIN_MIC2_21 +737 0x4848 //TX_PREEQ_GAIN_MIC2_22 +738 0x4848 //TX_PREEQ_GAIN_MIC2_23 +739 0x0E10 //TX_PREEQ_BIN_MIC2_0 +740 0x1010 //TX_PREEQ_BIN_MIC2_1 +741 0x1010 //TX_PREEQ_BIN_MIC2_2 +742 0x1010 //TX_PREEQ_BIN_MIC2_3 +743 0x1010 //TX_PREEQ_BIN_MIC2_4 +744 0x1010 //TX_PREEQ_BIN_MIC2_5 +745 0x1010 //TX_PREEQ_BIN_MIC2_6 +746 0x1010 //TX_PREEQ_BIN_MIC2_7 +747 0x1010 //TX_PREEQ_BIN_MIC2_8 +748 0x1010 //TX_PREEQ_BIN_MIC2_9 +749 0x1010 //TX_PREEQ_BIN_MIC2_10 +750 0x1010 //TX_PREEQ_BIN_MIC2_11 +751 0x1010 //TX_PREEQ_BIN_MIC2_12 +752 0x1010 //TX_PREEQ_BIN_MIC2_13 +753 0x1010 //TX_PREEQ_BIN_MIC2_14 +754 0x0200 //TX_PREEQ_BIN_MIC2_15 +755 0x0000 //TX_PREEQ_BIN_MIC2_16 +756 0x0000 //TX_PREEQ_BIN_MIC2_17 +757 0x0000 //TX_PREEQ_BIN_MIC2_18 +758 0x0000 //TX_PREEQ_BIN_MIC2_19 +759 0x0000 //TX_PREEQ_BIN_MIC2_20 +760 0x0000 //TX_PREEQ_BIN_MIC2_21 +761 0x0000 //TX_PREEQ_BIN_MIC2_22 +762 0x0000 //TX_PREEQ_BIN_MIC2_23 +763 0x0006 //TX_MASKING_ABILITY +764 0x2000 //TX_NND_WEIGHT +765 0x0060 //TX_MIC_CALIBRATION_0 +766 0x0060 //TX_MIC_CALIBRATION_1 +767 0x0070 //TX_MIC_CALIBRATION_2 +768 0x0070 //TX_MIC_CALIBRATION_3 +769 0x0050 //TX_MIC_PWR_BIAS_0 +770 0x0040 //TX_MIC_PWR_BIAS_1 +771 0x0040 //TX_MIC_PWR_BIAS_2 +772 0x0040 //TX_MIC_PWR_BIAS_3 +773 0x0009 //TX_GAIN_LIMIT_0 +774 0x000F //TX_GAIN_LIMIT_1 +775 0x000F //TX_GAIN_LIMIT_2 +776 0x000F //TX_GAIN_LIMIT_3 +777 0x7F5B //TX_BVE_NOVAD0_ALPHADOWN +778 0x7FDE //TX_BVE_VAD0_ALPHAUP +779 0x7F3A //TX_BVE_VAD0_ALPHADOWN +780 0x2000 //TX_BVE_GAINWEIGHT_NOFEVADLI +781 0x7F5B //TX_BVE_FEVADLI_ALPHA +782 0x7F19 //TX_BVE_NOVAD0_ALPHAUP +783 0x0C00 //TX_TDDRC_ALPHA_UP_01 +784 0x0C00 //TX_TDDRC_ALPHA_UP_02 +785 0x0C00 //TX_TDDRC_ALPHA_UP_03 +786 0x0C00 //TX_TDDRC_ALPHA_UP_04 +787 0x7EB8 //TX_TDDRC_ALPHA_DWN_01 +788 0x7EB8 //TX_TDDRC_ALPHA_DWN_02 +789 0x7EB8 //TX_TDDRC_ALPHA_DWN_03 +790 0x7EB8 //TX_TDDRC_ALPHA_DWN_04 +791 0x7FFF //TX_TDDRC_TD_DRC_LIMIT +792 0x0800 //TX_TDDRC_POST_LIMIT_GAIN +793 0x0000 //TX_TDDRC_RESRV_0 +794 0x0000 //TX_TDDRC_RESRV_1 +795 0x0018 //TX_FDDRC_BAND_MARGIN_0 +796 0x0030 //TX_FDDRC_BAND_MARGIN_1 +797 0x0050 //TX_FDDRC_BAND_MARGIN_2 +798 0x0080 //TX_FDDRC_BAND_MARGIN_3 +799 0x0007 //TX_FDDRC_BLOCK_EXP +800 0x5000 //TX_FDDRC_THRD_2_0 +801 0x5000 //TX_FDDRC_THRD_2_1 +802 0x5000 //TX_FDDRC_THRD_2_2 +803 0x5000 //TX_FDDRC_THRD_2_3 +804 0x6400 //TX_FDDRC_THRD_3_0 +805 0x6400 //TX_FDDRC_THRD_3_1 +806 0x6400 //TX_FDDRC_THRD_3_2 +807 0x6400 //TX_FDDRC_THRD_3_3 +808 0x2000 //TX_FDDRC_SLANT_0_0 +809 0x2000 //TX_FDDRC_SLANT_0_1 +810 0x2000 //TX_FDDRC_SLANT_0_2 +811 0x2000 //TX_FDDRC_SLANT_0_3 +812 0x5333 //TX_FDDRC_SLANT_1_0 +813 0x5333 //TX_FDDRC_SLANT_1_1 +814 0x5333 //TX_FDDRC_SLANT_1_2 +815 0x5333 //TX_FDDRC_SLANT_1_3 +816 0x0010 //TX_DEADMIC_SILENCE_TH +817 0x0600 //TX_MIC_DEGRADE_TH +818 0x0078 //TX_DEADMIC_CNT +819 0x0078 //TX_MIC_DEGRADE_CNT +820 0x0000 //TX_FDDRC_RESRV_4 +821 0x0000 //TX_FDDRC_RESRV_5 +822 0x0000 //TX_FDDRC_RESRV_6 +823 0x7FFF //TX_KS_NOISEPASTE_FACTOR +824 0x0001 //TX_KS_CONFIG +825 0x7FFF //TX_KS_GAIN_MIN +826 0x0000 //TX_KS_RESRV_0 +827 0x0000 //TX_KS_RESRV_1 +828 0x0000 //TX_KS_RESRV_2 +829 0x7C00 //TX_LAMBDA_PKA_FP +830 0x2000 //TX_TPKA_FP +831 0x0080 //TX_MIN_G_FP +832 0x2000 //TX_MAX_G_FP +833 0x4848 //TX_FFP_FP_K_METAL +834 0x4000 //TX_A_POST_FLT_FP +835 0x0F5C //TX_RTO_OUTBEAM_TH +836 0x4CCD //TX_TPKA_FP_THD +837 0x0000 //TX_MAX_G_FP_BLK +838 0x0000 //TX_FFP_FADEIN +839 0x0000 //TX_FFP_FADEOUT +840 0x0000 //TX_WHISPERCTH +841 0x0000 //TX_WHISPERHOLDT +842 0x0000 //TX_WHISP_ENTHH +843 0x0000 //TX_WHISP_ENTHL +844 0x0000 //TX_WHISP_RTOTH +845 0x0000 //TX_WHISP_RTOTH2 +846 0x0096 //TX_MUTE_PERIOD +847 0x0000 //TX_FADE_IN_PERIOD +848 0x0100 //TX_FFP_RESRV_2 +849 0x0020 //TX_FFP_RESRV_3 +850 0x0000 //TX_FFP_RESRV_4 +851 0x0000 //TX_FFP_RESRV_5 +852 0x0000 //TX_FFP_RESRV_6 +853 0x0004 //TX_FILTINDX +854 0x0004 //TX_TDDRC_THRD_0 +855 0x0016 //TX_TDDRC_THRD_1 +856 0x1900 //TX_TDDRC_THRD_2 +857 0x1900 //TX_TDDRC_THRD_3 +858 0x3000 //TX_TDDRC_SLANT_0 +859 0x7B00 //TX_TDDRC_SLANT_1 +860 0x0C00 //TX_TDDRC_ALPHA_UP_00 +861 0x7EB8 //TX_TDDRC_ALPHA_DWN_00 +862 0x0000 //TX_TDDRC_HMNC_FLAG +863 0x199A //TX_TDDRC_HMNC_GAIN +864 0x0000 //TX_TDDRC_SMT_FLAG +865 0x0CCD //TX_TDDRC_SMT_W +866 0x0A98 //TX_TDDRC_DRC_GAIN +867 0x7FFF //TX_TDDRC_LMT_THRD +868 0x0000 //TX_TDDRC_LMT_ALPHA +869 0x0000 //TX_TFMASKLTH +870 0x0000 //TX_TFMASKLTHL +871 0x0CCD //TX_TFMASKHTH +872 0x0CCD //TX_TFMASKLTH_BINVAD +873 0xF333 //TX_TFMASKLTH_NS_EST +874 0x2CCD //TX_TFMASKLTH_DOA +875 0xECCD //TX_TFMASKTH_BLESSCUT +876 0x1000 //TX_B_LESSCUT_RTO_MASK +877 0x3800 //TX_SB_RHO_MEAN_TH_ABN +878 0x2000 //TX_B_POST_FLT_MASK +879 0x0000 //TX_B_POST_FLT_MASK1 +880 0x5333 //TX_GAIN_WIND_MASK +881 0x7FFF //TX_TFMASK_BFSTRICT_MUSIC +882 0x0000 //TX_TFMASK_BFSTRICT_NOMUSIC +883 0x7333 //TX_FASTNS_OUTIN_TH +884 0x0CCD //TX_FASTNS_TFMASK_TH +885 0x0CCD //TX_FASTNS_TFMASKBIN_TH1 +886 0x0CCD //TX_FASTNS_TFMASKBIN_TH2 +887 0x0CCD //TX_FASTNS_TFMASKBIN_TH3 +888 0x0028 //TX_FASTNS_ARSPC_TH +889 0xC000 //TX_FASTNS_MASK5_TH +890 0x4848 //TX_POSTSSA_MIN_G_VR_MASK +891 0x1000 //TX_A_LESSCUT_RTO_MASK +892 0x1770 //TX_FASTNS_NOISETH +893 0xC000 //TX_FASTNS_SSA_THLFL +894 0xC000 //TX_FASTNS_SSA_THHFL +895 0xCCCC //TX_FASTNS_SSA_THLFH +896 0xD999 //TX_FASTNS_SSA_THHFH +897 0x2339 //TX_SENDFUNC_REG_MICMUTE +898 0x0021 //TX_SENDFUNC_REG_MICMUTE1 +899 0x02BC //TX_MICMUTE_RATIO_THR +900 0x0140 //TX_MICMUTE_AMP_THR +901 0x0004 //TX_MICMUTE_HPF_IND +902 0x00C0 //TX_MICMUTE_LOG_EYR_TH +903 0x0008 //TX_MICMUTE_CVG_TIME +904 0x0008 //TX_MICMUTE_RELEASE_TIME +905 0x01FE //TX_MIC_VOLUME_MIC0MUTE +906 0x0020 //TX_MICMUTE_EPD_OFFSET_0 +907 0x001E //TX_MICMUTE_FRQ_AEC_L +908 0x7999 //TX_MICMUTE_EAD_THR +909 0x7FFF //TX_MICMUTE_LAMBDA_CB_NLE +910 0x7FFF //TX_MICMUTE_LAMBDA_RE_EST +911 0x4000 //TX_DTD_THR1_MICMUTE_0 +912 0x7000 //TX_DTD_THR1_MICMUTE_1 +913 0x7FFF //TX_DTD_THR1_MICMUTE_2 +914 0x7FFF //TX_DTD_THR1_MICMUTE_3 +915 0x6CCC //TX_DTD_THR2_MICMUTE_0 +916 0x0400 //TX_MICMUTE_MIN_EQ_RE_EST_0 +917 0x0400 //TX_MICMUTE_MIN_EQ_RE_EST_1 +918 0x1000 //TX_MICMUTE_MIN_EQ_RE_EST_2 +919 0x7FFF //TX_MICMUTE_MIN_EQ_RE_EST_3 +920 0x7FFF //TX_MICMUTE_MIN_EQ_RE_EST_4 +921 0x4000 //TX_MICMUTE_C_POST_FLT +922 0x03E8 //TX_MICMUTE_DT_CUT_K +923 0x0001 //TX_MICMUTE_DT_CUT_THR +924 0x03E8 //TX_MICMUTE_DT_CUT_K2 +925 0x0001 //TX_MICMUTE_DT_CUT_THR2 +926 0x0064 //TX_MICMUTE_DT2_HOLD_N +927 0x1000 //TX_MICMUTE_RATIODTH_THCUT +928 0x1000 //TX_MICMUTE_B_POST_FLT_ECHOL +929 0x7FFF //TX_MICMUTE_B_POST_FLT_ECHOH +930 0x0400 //TX_MICMUTE_C_POST_FLT_MASK +931 0x7999 //TX_MICMUTE_RATIODTL_CUT_TH +932 0x0258 //TX_MICMUTE_DT_CUT_K1 +933 0x0800 //TX_MICMUTE_N2_SN_EST +934 0xFC00 //TX_MICMUTE_THR_SN_EST_0 +935 0x001C //TX_MICMUTE_MIN_G_CTRL_0 +936 0x6000 //TX_MICMUTE_A_POST_FILT_S_0 +937 0x7000 //TX_MICMUTE_B_POST_FILT_0 +938 0x2710 //TX_MIC1RUB_AMP_THR +939 0x0010 //TX_MIC1MUTE_RATIO_THR +940 0x0450 //TX_MIC1MUTE_AMP_THR +941 0x0008 //TX_MIC1MUTE_CVG_TIME +942 0x0008 //TX_MIC1MUTE_RELEASE_TIME +943 0x0000 //TX_AMS_RESRV_01 +944 0x0000 //TX_AMS_RESRV_02 +945 0x0000 //TX_AMS_RESRV_03 +946 0x0000 //TX_AMS_RESRV_04 +947 0x0000 //TX_AMS_RESRV_05 +948 0x0000 //TX_AMS_RESRV_06 +949 0x0000 //TX_AMS_RESRV_07 +950 0x0000 //TX_AMS_RESRV_08 +951 0x0000 //TX_AMS_RESRV_09 +952 0x0000 //TX_AMS_RESRV_10 +953 0x0000 //TX_AMS_RESRV_11 +954 0x0000 //TX_AMS_RESRV_12 +955 0x0000 //TX_AMS_RESRV_13 +956 0x0000 //TX_AMS_RESRV_14 +957 0x0000 //TX_AMS_RESRV_15 +958 0x0000 //TX_AMS_RESRV_16 +959 0x0000 //TX_AMS_RESRV_17 +960 0x0000 //TX_AMS_RESRV_18 +961 0x0000 //TX_AMS_RESRV_19 +#RX +0 0x006C //RX_RECVFUNC_MODE_0 +1 0x0000 //RX_RECVFUNC_MODE_1 +2 0x0004 //RX_SAMPLINGFREQ_SIG +3 0x0004 //RX_SAMPLINGFREQ_PROC +4 0x000A //RX_FRAME_SZ +5 0x0000 //RX_DELAY_OPT +6 0x4000 //RX_TDDRC_ALPHA_UP_1 +7 0x4000 //RX_TDDRC_ALPHA_UP_2 +8 0x4000 //RX_TDDRC_ALPHA_UP_3 +9 0x4000 //RX_TDDRC_ALPHA_UP_4 +10 0x0800 //RX_PGA +11 0x7E56 //RX_A_HP +12 0x4000 //RX_B_PE +13 0x7800 //RX_THR_PITCH_DET_0 +14 0x7000 //RX_THR_PITCH_DET_1 +15 0x6000 //RX_THR_PITCH_DET_2 +16 0x0008 //RX_PITCH_BFR_LEN +17 0x0003 //RX_SBD_PITCH_DET +18 0x0100 //RX_PP_RESRV_0 +19 0x0020 //RX_PP_RESRV_1 +20 0x0400 //RX_N_SN_EST +21 0x000C //RX_N2_SN_EST +22 0x0014 //RX_NS_LVL_CTRL +23 0xF400 //RX_THR_SN_EST +24 0x7E00 //RX_LAMBDA_PFILT +25 0x00C8 //RX_FENS_RESRV_0 +26 0x0190 //RX_FENS_RESRV_1 +27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +30 0x0002 //RX_EXTRA_NS_L +31 0x0800 //RX_EXTRA_NS_A +32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +33 0x7FFF //RX_TDDRC_LIMITER_THRD +34 0x0800 //RX_TDDRC_LIMITER_GAIN +35 0x199A //RX_A_POST_FLT +36 0x0000 //RX_LMT_THRD +37 0x4000 //RX_LMT_ALPHA +38 0x0020 //RX_FDEQ_SUBNUM +39 0x4848 //RX_FDEQ_GAIN_0 +40 0x4848 //RX_FDEQ_GAIN_1 +41 0x4848 //RX_FDEQ_GAIN_2 +42 0x4850 //RX_FDEQ_GAIN_3 +43 0x4848 //RX_FDEQ_GAIN_4 +44 0x4848 //RX_FDEQ_GAIN_5 +45 0x4568 //RX_FDEQ_GAIN_6 +46 0x485C //RX_FDEQ_GAIN_7 +47 0x5C60 //RX_FDEQ_GAIN_8 +48 0x685C //RX_FDEQ_GAIN_9 +49 0x5648 //RX_FDEQ_GAIN_10 +50 0x484C //RX_FDEQ_GAIN_11 +51 0x706C //RX_FDEQ_GAIN_12 +52 0x7070 //RX_FDEQ_GAIN_13 +53 0x6868 //RX_FDEQ_GAIN_14 +54 0x6060 //RX_FDEQ_GAIN_15 +55 0x4848 //RX_FDEQ_GAIN_16 +56 0x4848 //RX_FDEQ_GAIN_17 +57 0x4848 //RX_FDEQ_GAIN_18 +58 0x4848 //RX_FDEQ_GAIN_19 +59 0x4848 //RX_FDEQ_GAIN_20 +60 0x4848 //RX_FDEQ_GAIN_21 +61 0x4848 //RX_FDEQ_GAIN_22 +62 0x4848 //RX_FDEQ_GAIN_23 +63 0x0202 //RX_FDEQ_BIN_0 +64 0x0203 //RX_FDEQ_BIN_1 +65 0x0303 //RX_FDEQ_BIN_2 +66 0x0402 //RX_FDEQ_BIN_3 +67 0x0504 //RX_FDEQ_BIN_4 +68 0x0209 //RX_FDEQ_BIN_5 +69 0x0808 //RX_FDEQ_BIN_6 +70 0x090A //RX_FDEQ_BIN_7 +71 0x0B0C //RX_FDEQ_BIN_8 +72 0x0D0E //RX_FDEQ_BIN_9 +73 0x1013 //RX_FDEQ_BIN_10 +74 0x1719 //RX_FDEQ_BIN_11 +75 0x1B1E //RX_FDEQ_BIN_12 +76 0x1E1E //RX_FDEQ_BIN_13 +77 0x1E28 //RX_FDEQ_BIN_14 +78 0x282C //RX_FDEQ_BIN_15 +79 0x0000 //RX_FDEQ_BIN_16 +80 0x0000 //RX_FDEQ_BIN_17 +81 0x0000 //RX_FDEQ_BIN_18 +82 0x0000 //RX_FDEQ_BIN_19 +83 0x0000 //RX_FDEQ_BIN_20 +84 0x0000 //RX_FDEQ_BIN_21 +85 0x0000 //RX_FDEQ_BIN_22 +86 0x0000 //RX_FDEQ_BIN_23 +87 0x4000 //RX_FDEQ_RESRV_0 +88 0x0320 //RX_FDEQ_RESRV_1 +89 0x0018 //RX_FDDRC_BAND_MARGIN_0 +90 0x0030 //RX_FDDRC_BAND_MARGIN_1 +91 0x0050 //RX_FDDRC_BAND_MARGIN_2 +92 0x0080 //RX_FDDRC_BAND_MARGIN_3 +93 0x0004 //RX_FDDRC_BLOCK_EXP +94 0x5000 //RX_FDDRC_THRD_2_0 +95 0x5000 //RX_FDDRC_THRD_2_1 +96 0x2000 //RX_FDDRC_THRD_2_2 +97 0x5000 //RX_FDDRC_THRD_2_3 +98 0x6400 //RX_FDDRC_THRD_3_0 +99 0x6400 //RX_FDDRC_THRD_3_1 +100 0x2000 //RX_FDDRC_THRD_3_2 +101 0x5000 //RX_FDDRC_THRD_3_3 +102 0x4000 //RX_FDDRC_SLANT_0_0 +103 0x4000 //RX_FDDRC_SLANT_0_1 +104 0x4000 //RX_FDDRC_SLANT_0_2 +105 0x4000 //RX_FDDRC_SLANT_0_3 +106 0x7FFF //RX_FDDRC_SLANT_1_0 +107 0x7FFF //RX_FDDRC_SLANT_1_1 +108 0x7FFF //RX_FDDRC_SLANT_1_2 +109 0x7FFF //RX_FDDRC_SLANT_1_3 +110 0x0000 //RX_FDDRC_RESRV_0 +111 0x0002 //RX_FILTINDX +112 0x0001 //RX_TDDRC_THRD_0 +113 0x0002 //RX_TDDRC_THRD_1 +114 0x1800 //RX_TDDRC_THRD_2 +115 0x1800 //RX_TDDRC_THRD_3 +116 0x6000 //RX_TDDRC_SLANT_0 +117 0x6E00 //RX_TDDRC_SLANT_1 +118 0x4000 //RX_TDDRC_ALPHA_UP_0 +119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +120 0x0000 //RX_TDDRC_HMNC_FLAG +121 0x199A //RX_TDDRC_HMNC_GAIN +122 0x0001 //RX_TDDRC_SMT_FLAG +123 0x0CCD //RX_TDDRC_SMT_W +124 0x02D2 //RX_TDDRC_DRC_GAIN +125 0x7C00 //RX_LAMBDA_PKA_FP +126 0x2000 //RX_TPKA_FP +127 0x2000 //RX_MIN_G_FP +128 0x0080 //RX_MAX_G_FP +129 0x0013 //RX_SPK_VOL +130 0x0000 //RX_VOL_RESRV_0 +131 0x0000 //RX_MAXLEVEL_CNG +132 0x3000 //RX_BWE_UV_TH +133 0x3000 //RX_BWE_UV_TH2 +134 0x1800 //RX_BWE_UV_TH3 +135 0x1000 //RX_BWE_V_TH +136 0x04CD //RX_BWE_GAIN1_V_TH1 +137 0x0F33 //RX_BWE_GAIN1_V_TH2 +138 0x7333 //RX_BWE_UV_EQ +139 0x199A //RX_BWE_V_EQ +140 0x7333 //RX_BWE_TONE_TH +141 0x0004 //RX_BWE_UV_HOLD_T +142 0x6CCD //RX_BWE_GAIN2_ALPHA +143 0x799A //RX_BWE_GAIN3_ALPHA +144 0x001E //RX_BWE_CUTOFF +145 0x3000 //RX_BWE_GAINFILL +146 0x3200 //RX_BWE_MAXTH_TONE +147 0x2000 //RX_BWE_EQ_0 +148 0x2000 //RX_BWE_EQ_1 +149 0x2000 //RX_BWE_EQ_2 +150 0x2000 //RX_BWE_EQ_3 +151 0x2000 //RX_BWE_EQ_4 +152 0x2000 //RX_BWE_EQ_5 +153 0x2000 //RX_BWE_EQ_6 +154 0x0000 //RX_BWE_RESRV_0 +155 0x0000 //RX_BWE_RESRV_1 +156 0x0000 //RX_BWE_RESRV_2 +#VOL 0 +6 0x4000 //RX_TDDRC_ALPHA_UP_1 +7 0x4000 //RX_TDDRC_ALPHA_UP_2 +8 0x4000 //RX_TDDRC_ALPHA_UP_3 +9 0x4000 //RX_TDDRC_ALPHA_UP_4 +27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +33 0x7FFF //RX_TDDRC_LIMITER_THRD +34 0x0800 //RX_TDDRC_LIMITER_GAIN +112 0x0001 //RX_TDDRC_THRD_0 +113 0x0002 //RX_TDDRC_THRD_1 +114 0x1800 //RX_TDDRC_THRD_2 +115 0x1800 //RX_TDDRC_THRD_3 +116 0x6000 //RX_TDDRC_SLANT_0 +117 0x6E00 //RX_TDDRC_SLANT_1 +118 0x4000 //RX_TDDRC_ALPHA_UP_0 +119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +120 0x0000 //RX_TDDRC_HMNC_FLAG +121 0x199A //RX_TDDRC_HMNC_GAIN +122 0x0001 //RX_TDDRC_SMT_FLAG +123 0x0CCD //RX_TDDRC_SMT_W +124 0x02D2 //RX_TDDRC_DRC_GAIN +38 0x0020 //RX_FDEQ_SUBNUM +39 0x4848 //RX_FDEQ_GAIN_0 +40 0x4848 //RX_FDEQ_GAIN_1 +41 0x4848 //RX_FDEQ_GAIN_2 +42 0x4850 //RX_FDEQ_GAIN_3 +43 0x4848 //RX_FDEQ_GAIN_4 +44 0x4848 //RX_FDEQ_GAIN_5 +45 0x4568 //RX_FDEQ_GAIN_6 +46 0x485C //RX_FDEQ_GAIN_7 +47 0x5C60 //RX_FDEQ_GAIN_8 +48 0x685C //RX_FDEQ_GAIN_9 +49 0x5648 //RX_FDEQ_GAIN_10 +50 0x484C //RX_FDEQ_GAIN_11 +51 0x706C //RX_FDEQ_GAIN_12 +52 0x7070 //RX_FDEQ_GAIN_13 +53 0x6868 //RX_FDEQ_GAIN_14 +54 0x6060 //RX_FDEQ_GAIN_15 +55 0x4848 //RX_FDEQ_GAIN_16 +56 0x4848 //RX_FDEQ_GAIN_17 +57 0x4848 //RX_FDEQ_GAIN_18 +58 0x4848 //RX_FDEQ_GAIN_19 +59 0x4848 //RX_FDEQ_GAIN_20 +60 0x4848 //RX_FDEQ_GAIN_21 +61 0x4848 //RX_FDEQ_GAIN_22 +62 0x4848 //RX_FDEQ_GAIN_23 +63 0x0202 //RX_FDEQ_BIN_0 +64 0x0203 //RX_FDEQ_BIN_1 +65 0x0303 //RX_FDEQ_BIN_2 +66 0x0402 //RX_FDEQ_BIN_3 +67 0x0504 //RX_FDEQ_BIN_4 +68 0x0209 //RX_FDEQ_BIN_5 +69 0x0808 //RX_FDEQ_BIN_6 +70 0x090A //RX_FDEQ_BIN_7 +71 0x0B0C //RX_FDEQ_BIN_8 +72 0x0D0E //RX_FDEQ_BIN_9 +73 0x1013 //RX_FDEQ_BIN_10 +74 0x1719 //RX_FDEQ_BIN_11 +75 0x1B1E //RX_FDEQ_BIN_12 +76 0x1E1E //RX_FDEQ_BIN_13 +77 0x1E28 //RX_FDEQ_BIN_14 +78 0x282C //RX_FDEQ_BIN_15 +79 0x0000 //RX_FDEQ_BIN_16 +80 0x0000 //RX_FDEQ_BIN_17 +81 0x0000 //RX_FDEQ_BIN_18 +82 0x0000 //RX_FDEQ_BIN_19 +83 0x0000 //RX_FDEQ_BIN_20 +84 0x0000 //RX_FDEQ_BIN_21 +85 0x0000 //RX_FDEQ_BIN_22 +86 0x0000 //RX_FDEQ_BIN_23 +87 0x4000 //RX_FDEQ_RESRV_0 +88 0x0320 //RX_FDEQ_RESRV_1 +89 0x0018 //RX_FDDRC_BAND_MARGIN_0 +90 0x0030 //RX_FDDRC_BAND_MARGIN_1 +91 0x0050 //RX_FDDRC_BAND_MARGIN_2 +92 0x0080 //RX_FDDRC_BAND_MARGIN_3 +93 0x0004 //RX_FDDRC_BLOCK_EXP +94 0x5000 //RX_FDDRC_THRD_2_0 +95 0x5000 //RX_FDDRC_THRD_2_1 +96 0x2000 //RX_FDDRC_THRD_2_2 +97 0x5000 //RX_FDDRC_THRD_2_3 +98 0x6400 //RX_FDDRC_THRD_3_0 +99 0x6400 //RX_FDDRC_THRD_3_1 +100 0x2000 //RX_FDDRC_THRD_3_2 +101 0x5000 //RX_FDDRC_THRD_3_3 +102 0x4000 //RX_FDDRC_SLANT_0_0 +103 0x4000 //RX_FDDRC_SLANT_0_1 +104 0x4000 //RX_FDDRC_SLANT_0_2 +105 0x4000 //RX_FDDRC_SLANT_0_3 +106 0x7FFF //RX_FDDRC_SLANT_1_0 +107 0x7FFF //RX_FDDRC_SLANT_1_1 +108 0x7FFF //RX_FDDRC_SLANT_1_2 +109 0x7FFF //RX_FDDRC_SLANT_1_3 +110 0x0000 //RX_FDDRC_RESRV_0 +129 0x0013 //RX_SPK_VOL +130 0x0000 //RX_VOL_RESRV_0 +#VOL 1 +6 0x4000 //RX_TDDRC_ALPHA_UP_1 +7 0x4000 //RX_TDDRC_ALPHA_UP_2 +8 0x4000 //RX_TDDRC_ALPHA_UP_3 +9 0x4000 //RX_TDDRC_ALPHA_UP_4 +27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +33 0x7FFF //RX_TDDRC_LIMITER_THRD +34 0x0800 //RX_TDDRC_LIMITER_GAIN +112 0x0001 //RX_TDDRC_THRD_0 +113 0x0002 //RX_TDDRC_THRD_1 +114 0x1800 //RX_TDDRC_THRD_2 +115 0x1800 //RX_TDDRC_THRD_3 +116 0x6000 //RX_TDDRC_SLANT_0 +117 0x6E00 //RX_TDDRC_SLANT_1 +118 0x4000 //RX_TDDRC_ALPHA_UP_0 +119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +120 0x0000 //RX_TDDRC_HMNC_FLAG +121 0x199A //RX_TDDRC_HMNC_GAIN +122 0x0001 //RX_TDDRC_SMT_FLAG +123 0x0CCD //RX_TDDRC_SMT_W +124 0x02D2 //RX_TDDRC_DRC_GAIN +38 0x0020 //RX_FDEQ_SUBNUM +39 0x4848 //RX_FDEQ_GAIN_0 +40 0x4848 //RX_FDEQ_GAIN_1 +41 0x4848 //RX_FDEQ_GAIN_2 +42 0x4850 //RX_FDEQ_GAIN_3 +43 0x4848 //RX_FDEQ_GAIN_4 +44 0x4848 //RX_FDEQ_GAIN_5 +45 0x4568 //RX_FDEQ_GAIN_6 +46 0x485C //RX_FDEQ_GAIN_7 +47 0x5C60 //RX_FDEQ_GAIN_8 +48 0x685C //RX_FDEQ_GAIN_9 +49 0x5648 //RX_FDEQ_GAIN_10 +50 0x484C //RX_FDEQ_GAIN_11 +51 0x706C //RX_FDEQ_GAIN_12 +52 0x7070 //RX_FDEQ_GAIN_13 +53 0x6868 //RX_FDEQ_GAIN_14 +54 0x6060 //RX_FDEQ_GAIN_15 +55 0x4848 //RX_FDEQ_GAIN_16 +56 0x4848 //RX_FDEQ_GAIN_17 +57 0x4848 //RX_FDEQ_GAIN_18 +58 0x4848 //RX_FDEQ_GAIN_19 +59 0x4848 //RX_FDEQ_GAIN_20 +60 0x4848 //RX_FDEQ_GAIN_21 +61 0x4848 //RX_FDEQ_GAIN_22 +62 0x4848 //RX_FDEQ_GAIN_23 +63 0x0202 //RX_FDEQ_BIN_0 +64 0x0203 //RX_FDEQ_BIN_1 +65 0x0303 //RX_FDEQ_BIN_2 +66 0x0402 //RX_FDEQ_BIN_3 +67 0x0504 //RX_FDEQ_BIN_4 +68 0x0209 //RX_FDEQ_BIN_5 +69 0x0808 //RX_FDEQ_BIN_6 +70 0x090A //RX_FDEQ_BIN_7 +71 0x0B0C //RX_FDEQ_BIN_8 +72 0x0D0E //RX_FDEQ_BIN_9 +73 0x1013 //RX_FDEQ_BIN_10 +74 0x1719 //RX_FDEQ_BIN_11 +75 0x1B1E //RX_FDEQ_BIN_12 +76 0x1E1E //RX_FDEQ_BIN_13 +77 0x1E28 //RX_FDEQ_BIN_14 +78 0x282C //RX_FDEQ_BIN_15 +79 0x0000 //RX_FDEQ_BIN_16 +80 0x0000 //RX_FDEQ_BIN_17 +81 0x0000 //RX_FDEQ_BIN_18 +82 0x0000 //RX_FDEQ_BIN_19 +83 0x0000 //RX_FDEQ_BIN_20 +84 0x0000 //RX_FDEQ_BIN_21 +85 0x0000 //RX_FDEQ_BIN_22 +86 0x0000 //RX_FDEQ_BIN_23 +87 0x4000 //RX_FDEQ_RESRV_0 +88 0x0320 //RX_FDEQ_RESRV_1 +89 0x0018 //RX_FDDRC_BAND_MARGIN_0 +90 0x0030 //RX_FDDRC_BAND_MARGIN_1 +91 0x0050 //RX_FDDRC_BAND_MARGIN_2 +92 0x0080 //RX_FDDRC_BAND_MARGIN_3 +93 0x0004 //RX_FDDRC_BLOCK_EXP +94 0x5000 //RX_FDDRC_THRD_2_0 +95 0x5000 //RX_FDDRC_THRD_2_1 +96 0x2000 //RX_FDDRC_THRD_2_2 +97 0x5000 //RX_FDDRC_THRD_2_3 +98 0x6400 //RX_FDDRC_THRD_3_0 +99 0x6400 //RX_FDDRC_THRD_3_1 +100 0x2000 //RX_FDDRC_THRD_3_2 +101 0x5000 //RX_FDDRC_THRD_3_3 +102 0x4000 //RX_FDDRC_SLANT_0_0 +103 0x4000 //RX_FDDRC_SLANT_0_1 +104 0x4000 //RX_FDDRC_SLANT_0_2 +105 0x4000 //RX_FDDRC_SLANT_0_3 +106 0x7FFF //RX_FDDRC_SLANT_1_0 +107 0x7FFF //RX_FDDRC_SLANT_1_1 +108 0x7FFF //RX_FDDRC_SLANT_1_2 +109 0x7FFF //RX_FDDRC_SLANT_1_3 +110 0x0000 //RX_FDDRC_RESRV_0 +129 0x001C //RX_SPK_VOL +130 0x0000 //RX_VOL_RESRV_0 +#VOL 2 +6 0x4000 //RX_TDDRC_ALPHA_UP_1 +7 0x4000 //RX_TDDRC_ALPHA_UP_2 +8 0x4000 //RX_TDDRC_ALPHA_UP_3 +9 0x4000 //RX_TDDRC_ALPHA_UP_4 +27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +33 0x7FFF //RX_TDDRC_LIMITER_THRD +34 0x0800 //RX_TDDRC_LIMITER_GAIN +112 0x0001 //RX_TDDRC_THRD_0 +113 0x0002 //RX_TDDRC_THRD_1 +114 0x1800 //RX_TDDRC_THRD_2 +115 0x1800 //RX_TDDRC_THRD_3 +116 0x6000 //RX_TDDRC_SLANT_0 +117 0x6E00 //RX_TDDRC_SLANT_1 +118 0x4000 //RX_TDDRC_ALPHA_UP_0 +119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +120 0x0000 //RX_TDDRC_HMNC_FLAG +121 0x199A //RX_TDDRC_HMNC_GAIN +122 0x0001 //RX_TDDRC_SMT_FLAG +123 0x0CCD //RX_TDDRC_SMT_W +124 0x02D2 //RX_TDDRC_DRC_GAIN +38 0x0020 //RX_FDEQ_SUBNUM +39 0x4848 //RX_FDEQ_GAIN_0 +40 0x4848 //RX_FDEQ_GAIN_1 +41 0x4848 //RX_FDEQ_GAIN_2 +42 0x4850 //RX_FDEQ_GAIN_3 +43 0x4848 //RX_FDEQ_GAIN_4 +44 0x4848 //RX_FDEQ_GAIN_5 +45 0x4568 //RX_FDEQ_GAIN_6 +46 0x485C //RX_FDEQ_GAIN_7 +47 0x5C60 //RX_FDEQ_GAIN_8 +48 0x685C //RX_FDEQ_GAIN_9 +49 0x5648 //RX_FDEQ_GAIN_10 +50 0x484C //RX_FDEQ_GAIN_11 +51 0x706C //RX_FDEQ_GAIN_12 +52 0x7070 //RX_FDEQ_GAIN_13 +53 0x6868 //RX_FDEQ_GAIN_14 +54 0x6060 //RX_FDEQ_GAIN_15 +55 0x4848 //RX_FDEQ_GAIN_16 +56 0x4848 //RX_FDEQ_GAIN_17 +57 0x4848 //RX_FDEQ_GAIN_18 +58 0x4848 //RX_FDEQ_GAIN_19 +59 0x4848 //RX_FDEQ_GAIN_20 +60 0x4848 //RX_FDEQ_GAIN_21 +61 0x4848 //RX_FDEQ_GAIN_22 +62 0x4848 //RX_FDEQ_GAIN_23 +63 0x0202 //RX_FDEQ_BIN_0 +64 0x0203 //RX_FDEQ_BIN_1 +65 0x0303 //RX_FDEQ_BIN_2 +66 0x0402 //RX_FDEQ_BIN_3 +67 0x0504 //RX_FDEQ_BIN_4 +68 0x0209 //RX_FDEQ_BIN_5 +69 0x0808 //RX_FDEQ_BIN_6 +70 0x090A //RX_FDEQ_BIN_7 +71 0x0B0C //RX_FDEQ_BIN_8 +72 0x0D0E //RX_FDEQ_BIN_9 +73 0x1013 //RX_FDEQ_BIN_10 +74 0x1719 //RX_FDEQ_BIN_11 +75 0x1B1E //RX_FDEQ_BIN_12 +76 0x1E1E //RX_FDEQ_BIN_13 +77 0x1E28 //RX_FDEQ_BIN_14 +78 0x282C //RX_FDEQ_BIN_15 +79 0x0000 //RX_FDEQ_BIN_16 +80 0x0000 //RX_FDEQ_BIN_17 +81 0x0000 //RX_FDEQ_BIN_18 +82 0x0000 //RX_FDEQ_BIN_19 +83 0x0000 //RX_FDEQ_BIN_20 +84 0x0000 //RX_FDEQ_BIN_21 +85 0x0000 //RX_FDEQ_BIN_22 +86 0x0000 //RX_FDEQ_BIN_23 +87 0x4000 //RX_FDEQ_RESRV_0 +88 0x0320 //RX_FDEQ_RESRV_1 +89 0x0018 //RX_FDDRC_BAND_MARGIN_0 +90 0x0030 //RX_FDDRC_BAND_MARGIN_1 +91 0x0050 //RX_FDDRC_BAND_MARGIN_2 +92 0x0080 //RX_FDDRC_BAND_MARGIN_3 +93 0x0004 //RX_FDDRC_BLOCK_EXP +94 0x5000 //RX_FDDRC_THRD_2_0 +95 0x5000 //RX_FDDRC_THRD_2_1 +96 0x2000 //RX_FDDRC_THRD_2_2 +97 0x5000 //RX_FDDRC_THRD_2_3 +98 0x6400 //RX_FDDRC_THRD_3_0 +99 0x6400 //RX_FDDRC_THRD_3_1 +100 0x2000 //RX_FDDRC_THRD_3_2 +101 0x5000 //RX_FDDRC_THRD_3_3 +102 0x4000 //RX_FDDRC_SLANT_0_0 +103 0x4000 //RX_FDDRC_SLANT_0_1 +104 0x4000 //RX_FDDRC_SLANT_0_2 +105 0x4000 //RX_FDDRC_SLANT_0_3 +106 0x7FFF //RX_FDDRC_SLANT_1_0 +107 0x7FFF //RX_FDDRC_SLANT_1_1 +108 0x7FFF //RX_FDDRC_SLANT_1_2 +109 0x7FFF //RX_FDDRC_SLANT_1_3 +110 0x0000 //RX_FDDRC_RESRV_0 +129 0x0028 //RX_SPK_VOL +130 0x0000 //RX_VOL_RESRV_0 +#VOL 3 +6 0x4000 //RX_TDDRC_ALPHA_UP_1 +7 0x4000 //RX_TDDRC_ALPHA_UP_2 +8 0x4000 //RX_TDDRC_ALPHA_UP_3 +9 0x4000 //RX_TDDRC_ALPHA_UP_4 +27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +33 0x7FFF //RX_TDDRC_LIMITER_THRD +34 0x0800 //RX_TDDRC_LIMITER_GAIN +112 0x0001 //RX_TDDRC_THRD_0 +113 0x0002 //RX_TDDRC_THRD_1 +114 0x1800 //RX_TDDRC_THRD_2 +115 0x1800 //RX_TDDRC_THRD_3 +116 0x6000 //RX_TDDRC_SLANT_0 +117 0x6E00 //RX_TDDRC_SLANT_1 +118 0x4000 //RX_TDDRC_ALPHA_UP_0 +119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +120 0x0000 //RX_TDDRC_HMNC_FLAG +121 0x199A //RX_TDDRC_HMNC_GAIN +122 0x0001 //RX_TDDRC_SMT_FLAG +123 0x0CCD //RX_TDDRC_SMT_W +124 0x02D2 //RX_TDDRC_DRC_GAIN +38 0x0020 //RX_FDEQ_SUBNUM +39 0x4848 //RX_FDEQ_GAIN_0 +40 0x4848 //RX_FDEQ_GAIN_1 +41 0x4848 //RX_FDEQ_GAIN_2 +42 0x4850 //RX_FDEQ_GAIN_3 +43 0x4848 //RX_FDEQ_GAIN_4 +44 0x4848 //RX_FDEQ_GAIN_5 +45 0x4568 //RX_FDEQ_GAIN_6 +46 0x485C //RX_FDEQ_GAIN_7 +47 0x5C60 //RX_FDEQ_GAIN_8 +48 0x685C //RX_FDEQ_GAIN_9 +49 0x5648 //RX_FDEQ_GAIN_10 +50 0x484C //RX_FDEQ_GAIN_11 +51 0x706C //RX_FDEQ_GAIN_12 +52 0x7070 //RX_FDEQ_GAIN_13 +53 0x6868 //RX_FDEQ_GAIN_14 +54 0x6060 //RX_FDEQ_GAIN_15 +55 0x4848 //RX_FDEQ_GAIN_16 +56 0x4848 //RX_FDEQ_GAIN_17 +57 0x4848 //RX_FDEQ_GAIN_18 +58 0x4848 //RX_FDEQ_GAIN_19 +59 0x4848 //RX_FDEQ_GAIN_20 +60 0x4848 //RX_FDEQ_GAIN_21 +61 0x4848 //RX_FDEQ_GAIN_22 +62 0x4848 //RX_FDEQ_GAIN_23 +63 0x0202 //RX_FDEQ_BIN_0 +64 0x0203 //RX_FDEQ_BIN_1 +65 0x0303 //RX_FDEQ_BIN_2 +66 0x0402 //RX_FDEQ_BIN_3 +67 0x0504 //RX_FDEQ_BIN_4 +68 0x0209 //RX_FDEQ_BIN_5 +69 0x0808 //RX_FDEQ_BIN_6 +70 0x090A //RX_FDEQ_BIN_7 +71 0x0B0C //RX_FDEQ_BIN_8 +72 0x0D0E //RX_FDEQ_BIN_9 +73 0x1013 //RX_FDEQ_BIN_10 +74 0x1719 //RX_FDEQ_BIN_11 +75 0x1B1E //RX_FDEQ_BIN_12 +76 0x1E1E //RX_FDEQ_BIN_13 +77 0x1E28 //RX_FDEQ_BIN_14 +78 0x282C //RX_FDEQ_BIN_15 +79 0x0000 //RX_FDEQ_BIN_16 +80 0x0000 //RX_FDEQ_BIN_17 +81 0x0000 //RX_FDEQ_BIN_18 +82 0x0000 //RX_FDEQ_BIN_19 +83 0x0000 //RX_FDEQ_BIN_20 +84 0x0000 //RX_FDEQ_BIN_21 +85 0x0000 //RX_FDEQ_BIN_22 +86 0x0000 //RX_FDEQ_BIN_23 +87 0x4000 //RX_FDEQ_RESRV_0 +88 0x0320 //RX_FDEQ_RESRV_1 +89 0x0018 //RX_FDDRC_BAND_MARGIN_0 +90 0x0030 //RX_FDDRC_BAND_MARGIN_1 +91 0x0050 //RX_FDDRC_BAND_MARGIN_2 +92 0x0080 //RX_FDDRC_BAND_MARGIN_3 +93 0x0004 //RX_FDDRC_BLOCK_EXP +94 0x5000 //RX_FDDRC_THRD_2_0 +95 0x5000 //RX_FDDRC_THRD_2_1 +96 0x2000 //RX_FDDRC_THRD_2_2 +97 0x5000 //RX_FDDRC_THRD_2_3 +98 0x6400 //RX_FDDRC_THRD_3_0 +99 0x6400 //RX_FDDRC_THRD_3_1 +100 0x2000 //RX_FDDRC_THRD_3_2 +101 0x5000 //RX_FDDRC_THRD_3_3 +102 0x4000 //RX_FDDRC_SLANT_0_0 +103 0x4000 //RX_FDDRC_SLANT_0_1 +104 0x4000 //RX_FDDRC_SLANT_0_2 +105 0x4000 //RX_FDDRC_SLANT_0_3 +106 0x7FFF //RX_FDDRC_SLANT_1_0 +107 0x7FFF //RX_FDDRC_SLANT_1_1 +108 0x7FFF //RX_FDDRC_SLANT_1_2 +109 0x7FFF //RX_FDDRC_SLANT_1_3 +110 0x0000 //RX_FDDRC_RESRV_0 +129 0x0035 //RX_SPK_VOL +130 0x0000 //RX_VOL_RESRV_0 +#VOL 4 +6 0x4000 //RX_TDDRC_ALPHA_UP_1 +7 0x4000 //RX_TDDRC_ALPHA_UP_2 +8 0x4000 //RX_TDDRC_ALPHA_UP_3 +9 0x4000 //RX_TDDRC_ALPHA_UP_4 +27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +33 0x7FFF //RX_TDDRC_LIMITER_THRD +34 0x0800 //RX_TDDRC_LIMITER_GAIN +112 0x0001 //RX_TDDRC_THRD_0 +113 0x0002 //RX_TDDRC_THRD_1 +114 0x1800 //RX_TDDRC_THRD_2 +115 0x1800 //RX_TDDRC_THRD_3 +116 0x6000 //RX_TDDRC_SLANT_0 +117 0x6E00 //RX_TDDRC_SLANT_1 +118 0x4000 //RX_TDDRC_ALPHA_UP_0 +119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +120 0x0000 //RX_TDDRC_HMNC_FLAG +121 0x199A //RX_TDDRC_HMNC_GAIN +122 0x0001 //RX_TDDRC_SMT_FLAG +123 0x0CCD //RX_TDDRC_SMT_W +124 0x02D2 //RX_TDDRC_DRC_GAIN +38 0x0020 //RX_FDEQ_SUBNUM +39 0x4C4C //RX_FDEQ_GAIN_0 +40 0x4C4C //RX_FDEQ_GAIN_1 +41 0x4C48 //RX_FDEQ_GAIN_2 +42 0x4870 //RX_FDEQ_GAIN_3 +43 0x4848 //RX_FDEQ_GAIN_4 +44 0x4848 //RX_FDEQ_GAIN_5 +45 0x4568 //RX_FDEQ_GAIN_6 +46 0x485C //RX_FDEQ_GAIN_7 +47 0x5C60 //RX_FDEQ_GAIN_8 +48 0x685C //RX_FDEQ_GAIN_9 +49 0x5648 //RX_FDEQ_GAIN_10 +50 0x484C //RX_FDEQ_GAIN_11 +51 0x706C //RX_FDEQ_GAIN_12 +52 0x7070 //RX_FDEQ_GAIN_13 +53 0x6868 //RX_FDEQ_GAIN_14 +54 0x6060 //RX_FDEQ_GAIN_15 +55 0x4848 //RX_FDEQ_GAIN_16 +56 0x4848 //RX_FDEQ_GAIN_17 +57 0x4848 //RX_FDEQ_GAIN_18 +58 0x4848 //RX_FDEQ_GAIN_19 +59 0x4848 //RX_FDEQ_GAIN_20 +60 0x4848 //RX_FDEQ_GAIN_21 +61 0x4848 //RX_FDEQ_GAIN_22 +62 0x4848 //RX_FDEQ_GAIN_23 +63 0x0202 //RX_FDEQ_BIN_0 +64 0x0203 //RX_FDEQ_BIN_1 +65 0x0303 //RX_FDEQ_BIN_2 +66 0x0402 //RX_FDEQ_BIN_3 +67 0x0504 //RX_FDEQ_BIN_4 +68 0x0209 //RX_FDEQ_BIN_5 +69 0x0808 //RX_FDEQ_BIN_6 +70 0x090A //RX_FDEQ_BIN_7 +71 0x0B0C //RX_FDEQ_BIN_8 +72 0x0D0E //RX_FDEQ_BIN_9 +73 0x1013 //RX_FDEQ_BIN_10 +74 0x1719 //RX_FDEQ_BIN_11 +75 0x1B1E //RX_FDEQ_BIN_12 +76 0x1E1E //RX_FDEQ_BIN_13 +77 0x1E28 //RX_FDEQ_BIN_14 +78 0x282C //RX_FDEQ_BIN_15 +79 0x0000 //RX_FDEQ_BIN_16 +80 0x0000 //RX_FDEQ_BIN_17 +81 0x0000 //RX_FDEQ_BIN_18 +82 0x0000 //RX_FDEQ_BIN_19 +83 0x0000 //RX_FDEQ_BIN_20 +84 0x0000 //RX_FDEQ_BIN_21 +85 0x0000 //RX_FDEQ_BIN_22 +86 0x0000 //RX_FDEQ_BIN_23 +87 0x4000 //RX_FDEQ_RESRV_0 +88 0x0320 //RX_FDEQ_RESRV_1 +89 0x0018 //RX_FDDRC_BAND_MARGIN_0 +90 0x0030 //RX_FDDRC_BAND_MARGIN_1 +91 0x0050 //RX_FDDRC_BAND_MARGIN_2 +92 0x0080 //RX_FDDRC_BAND_MARGIN_3 +93 0x0004 //RX_FDDRC_BLOCK_EXP +94 0x5000 //RX_FDDRC_THRD_2_0 +95 0x5000 //RX_FDDRC_THRD_2_1 +96 0x2000 //RX_FDDRC_THRD_2_2 +97 0x5000 //RX_FDDRC_THRD_2_3 +98 0x6400 //RX_FDDRC_THRD_3_0 +99 0x6400 //RX_FDDRC_THRD_3_1 +100 0x2000 //RX_FDDRC_THRD_3_2 +101 0x5000 //RX_FDDRC_THRD_3_3 +102 0x4000 //RX_FDDRC_SLANT_0_0 +103 0x4000 //RX_FDDRC_SLANT_0_1 +104 0x4000 //RX_FDDRC_SLANT_0_2 +105 0x4000 //RX_FDDRC_SLANT_0_3 +106 0x7FFF //RX_FDDRC_SLANT_1_0 +107 0x7FFF //RX_FDDRC_SLANT_1_1 +108 0x7FFF //RX_FDDRC_SLANT_1_2 +109 0x7FFF //RX_FDDRC_SLANT_1_3 +110 0x0000 //RX_FDDRC_RESRV_0 +129 0x0052 //RX_SPK_VOL +130 0x0000 //RX_VOL_RESRV_0 +#VOL 5 +6 0x4000 //RX_TDDRC_ALPHA_UP_1 +7 0x4000 //RX_TDDRC_ALPHA_UP_2 +8 0x4000 //RX_TDDRC_ALPHA_UP_3 +9 0x4000 //RX_TDDRC_ALPHA_UP_4 +27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +33 0x7FFF //RX_TDDRC_LIMITER_THRD +34 0x0800 //RX_TDDRC_LIMITER_GAIN +112 0x0001 //RX_TDDRC_THRD_0 +113 0x0002 //RX_TDDRC_THRD_1 +114 0x1800 //RX_TDDRC_THRD_2 +115 0x1800 //RX_TDDRC_THRD_3 +116 0x6000 //RX_TDDRC_SLANT_0 +117 0x6E00 //RX_TDDRC_SLANT_1 +118 0x4000 //RX_TDDRC_ALPHA_UP_0 +119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +120 0x0000 //RX_TDDRC_HMNC_FLAG +121 0x199A //RX_TDDRC_HMNC_GAIN +122 0x0001 //RX_TDDRC_SMT_FLAG +123 0x0CCD //RX_TDDRC_SMT_W +124 0x02D2 //RX_TDDRC_DRC_GAIN +38 0x0020 //RX_FDEQ_SUBNUM +39 0x4C4C //RX_FDEQ_GAIN_0 +40 0x4C4C //RX_FDEQ_GAIN_1 +41 0x4C48 //RX_FDEQ_GAIN_2 +42 0x4870 //RX_FDEQ_GAIN_3 +43 0x4848 //RX_FDEQ_GAIN_4 +44 0x4848 //RX_FDEQ_GAIN_5 +45 0x4568 //RX_FDEQ_GAIN_6 +46 0x485C //RX_FDEQ_GAIN_7 +47 0x5C60 //RX_FDEQ_GAIN_8 +48 0x685C //RX_FDEQ_GAIN_9 +49 0x5648 //RX_FDEQ_GAIN_10 +50 0x484C //RX_FDEQ_GAIN_11 +51 0x706C //RX_FDEQ_GAIN_12 +52 0x7070 //RX_FDEQ_GAIN_13 +53 0x6868 //RX_FDEQ_GAIN_14 +54 0x6060 //RX_FDEQ_GAIN_15 +55 0x4848 //RX_FDEQ_GAIN_16 +56 0x4848 //RX_FDEQ_GAIN_17 +57 0x4848 //RX_FDEQ_GAIN_18 +58 0x4848 //RX_FDEQ_GAIN_19 +59 0x4848 //RX_FDEQ_GAIN_20 +60 0x4848 //RX_FDEQ_GAIN_21 +61 0x4848 //RX_FDEQ_GAIN_22 +62 0x4848 //RX_FDEQ_GAIN_23 +63 0x0202 //RX_FDEQ_BIN_0 +64 0x0203 //RX_FDEQ_BIN_1 +65 0x0303 //RX_FDEQ_BIN_2 +66 0x0402 //RX_FDEQ_BIN_3 +67 0x0504 //RX_FDEQ_BIN_4 +68 0x0209 //RX_FDEQ_BIN_5 +69 0x0808 //RX_FDEQ_BIN_6 +70 0x090A //RX_FDEQ_BIN_7 +71 0x0B0C //RX_FDEQ_BIN_8 +72 0x0D0E //RX_FDEQ_BIN_9 +73 0x1013 //RX_FDEQ_BIN_10 +74 0x1719 //RX_FDEQ_BIN_11 +75 0x1B1E //RX_FDEQ_BIN_12 +76 0x1E1E //RX_FDEQ_BIN_13 +77 0x1E28 //RX_FDEQ_BIN_14 +78 0x282C //RX_FDEQ_BIN_15 +79 0x0000 //RX_FDEQ_BIN_16 +80 0x0000 //RX_FDEQ_BIN_17 +81 0x0000 //RX_FDEQ_BIN_18 +82 0x0000 //RX_FDEQ_BIN_19 +83 0x0000 //RX_FDEQ_BIN_20 +84 0x0000 //RX_FDEQ_BIN_21 +85 0x0000 //RX_FDEQ_BIN_22 +86 0x0000 //RX_FDEQ_BIN_23 +87 0x4000 //RX_FDEQ_RESRV_0 +88 0x0320 //RX_FDEQ_RESRV_1 +89 0x0018 //RX_FDDRC_BAND_MARGIN_0 +90 0x0030 //RX_FDDRC_BAND_MARGIN_1 +91 0x0050 //RX_FDDRC_BAND_MARGIN_2 +92 0x0080 //RX_FDDRC_BAND_MARGIN_3 +93 0x0004 //RX_FDDRC_BLOCK_EXP +94 0x5000 //RX_FDDRC_THRD_2_0 +95 0x5000 //RX_FDDRC_THRD_2_1 +96 0x2000 //RX_FDDRC_THRD_2_2 +97 0x5000 //RX_FDDRC_THRD_2_3 +98 0x6400 //RX_FDDRC_THRD_3_0 +99 0x6400 //RX_FDDRC_THRD_3_1 +100 0x2000 //RX_FDDRC_THRD_3_2 +101 0x5000 //RX_FDDRC_THRD_3_3 +102 0x4000 //RX_FDDRC_SLANT_0_0 +103 0x4000 //RX_FDDRC_SLANT_0_1 +104 0x4000 //RX_FDDRC_SLANT_0_2 +105 0x4000 //RX_FDDRC_SLANT_0_3 +106 0x7FFF //RX_FDDRC_SLANT_1_0 +107 0x7FFF //RX_FDDRC_SLANT_1_1 +108 0x7FFF //RX_FDDRC_SLANT_1_2 +109 0x7FFF //RX_FDDRC_SLANT_1_3 +110 0x0000 //RX_FDDRC_RESRV_0 +129 0x0078 //RX_SPK_VOL +130 0x0000 //RX_VOL_RESRV_0 +#VOL 6 +6 0x4000 //RX_TDDRC_ALPHA_UP_1 +7 0x4000 //RX_TDDRC_ALPHA_UP_2 +8 0x4000 //RX_TDDRC_ALPHA_UP_3 +9 0x4000 //RX_TDDRC_ALPHA_UP_4 +27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +33 0x7FFF //RX_TDDRC_LIMITER_THRD +34 0x0800 //RX_TDDRC_LIMITER_GAIN +112 0x0001 //RX_TDDRC_THRD_0 +113 0x0002 //RX_TDDRC_THRD_1 +114 0x1800 //RX_TDDRC_THRD_2 +115 0x1800 //RX_TDDRC_THRD_3 +116 0x6000 //RX_TDDRC_SLANT_0 +117 0x6E00 //RX_TDDRC_SLANT_1 +118 0x4000 //RX_TDDRC_ALPHA_UP_0 +119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +120 0x0000 //RX_TDDRC_HMNC_FLAG +121 0x199A //RX_TDDRC_HMNC_GAIN +122 0x0001 //RX_TDDRC_SMT_FLAG +123 0x0CCD //RX_TDDRC_SMT_W +124 0x02D2 //RX_TDDRC_DRC_GAIN +38 0x0020 //RX_FDEQ_SUBNUM +39 0x4C4C //RX_FDEQ_GAIN_0 +40 0x4C4C //RX_FDEQ_GAIN_1 +41 0x4C48 //RX_FDEQ_GAIN_2 +42 0x4870 //RX_FDEQ_GAIN_3 +43 0x4848 //RX_FDEQ_GAIN_4 +44 0x4848 //RX_FDEQ_GAIN_5 +45 0x4568 //RX_FDEQ_GAIN_6 +46 0x485C //RX_FDEQ_GAIN_7 +47 0x5C60 //RX_FDEQ_GAIN_8 +48 0x685C //RX_FDEQ_GAIN_9 +49 0x5648 //RX_FDEQ_GAIN_10 +50 0x484C //RX_FDEQ_GAIN_11 +51 0x706C //RX_FDEQ_GAIN_12 +52 0x7070 //RX_FDEQ_GAIN_13 +53 0x6868 //RX_FDEQ_GAIN_14 +54 0x6060 //RX_FDEQ_GAIN_15 +55 0x4848 //RX_FDEQ_GAIN_16 +56 0x4848 //RX_FDEQ_GAIN_17 +57 0x4848 //RX_FDEQ_GAIN_18 +58 0x4848 //RX_FDEQ_GAIN_19 +59 0x4848 //RX_FDEQ_GAIN_20 +60 0x4848 //RX_FDEQ_GAIN_21 +61 0x4848 //RX_FDEQ_GAIN_22 +62 0x4848 //RX_FDEQ_GAIN_23 +63 0x0202 //RX_FDEQ_BIN_0 +64 0x0203 //RX_FDEQ_BIN_1 +65 0x0303 //RX_FDEQ_BIN_2 +66 0x0402 //RX_FDEQ_BIN_3 +67 0x0504 //RX_FDEQ_BIN_4 +68 0x0209 //RX_FDEQ_BIN_5 +69 0x0808 //RX_FDEQ_BIN_6 +70 0x090A //RX_FDEQ_BIN_7 +71 0x0B0C //RX_FDEQ_BIN_8 +72 0x0D0E //RX_FDEQ_BIN_9 +73 0x1013 //RX_FDEQ_BIN_10 +74 0x1719 //RX_FDEQ_BIN_11 +75 0x1B1E //RX_FDEQ_BIN_12 +76 0x1E1E //RX_FDEQ_BIN_13 +77 0x1E28 //RX_FDEQ_BIN_14 +78 0x282C //RX_FDEQ_BIN_15 +79 0x0000 //RX_FDEQ_BIN_16 +80 0x0000 //RX_FDEQ_BIN_17 +81 0x0000 //RX_FDEQ_BIN_18 +82 0x0000 //RX_FDEQ_BIN_19 +83 0x0000 //RX_FDEQ_BIN_20 +84 0x0000 //RX_FDEQ_BIN_21 +85 0x0000 //RX_FDEQ_BIN_22 +86 0x0000 //RX_FDEQ_BIN_23 +87 0x4000 //RX_FDEQ_RESRV_0 +88 0x0320 //RX_FDEQ_RESRV_1 +89 0x0018 //RX_FDDRC_BAND_MARGIN_0 +90 0x0030 //RX_FDDRC_BAND_MARGIN_1 +91 0x0050 //RX_FDDRC_BAND_MARGIN_2 +92 0x0080 //RX_FDDRC_BAND_MARGIN_3 +93 0x0004 //RX_FDDRC_BLOCK_EXP +94 0x5000 //RX_FDDRC_THRD_2_0 +95 0x5000 //RX_FDDRC_THRD_2_1 +96 0x2000 //RX_FDDRC_THRD_2_2 +97 0x5000 //RX_FDDRC_THRD_2_3 +98 0x6400 //RX_FDDRC_THRD_3_0 +99 0x6400 //RX_FDDRC_THRD_3_1 +100 0x2000 //RX_FDDRC_THRD_3_2 +101 0x5000 //RX_FDDRC_THRD_3_3 +102 0x4000 //RX_FDDRC_SLANT_0_0 +103 0x4000 //RX_FDDRC_SLANT_0_1 +104 0x4000 //RX_FDDRC_SLANT_0_2 +105 0x4000 //RX_FDDRC_SLANT_0_3 +106 0x7FFF //RX_FDDRC_SLANT_1_0 +107 0x7FFF //RX_FDDRC_SLANT_1_1 +108 0x7FFF //RX_FDDRC_SLANT_1_2 +109 0x7FFF //RX_FDDRC_SLANT_1_3 +110 0x0000 //RX_FDDRC_RESRV_0 +129 0x0100 //RX_SPK_VOL +130 0x0000 //RX_VOL_RESRV_0 +#RX 2 +157 0x006C //RX_RECVFUNC_MODE_0 +158 0x0000 //RX_RECVFUNC_MODE_1 +159 0x0004 //RX_SAMPLINGFREQ_SIG +160 0x0004 //RX_SAMPLINGFREQ_PROC +161 0x000A //RX_FRAME_SZ +162 0x0000 //RX_DELAY_OPT +163 0x4000 //RX_TDDRC_ALPHA_UP_1 +164 0x4000 //RX_TDDRC_ALPHA_UP_2 +165 0x4000 //RX_TDDRC_ALPHA_UP_3 +166 0x4000 //RX_TDDRC_ALPHA_UP_4 +167 0x0800 //RX_PGA +168 0x7E56 //RX_A_HP +169 0x4000 //RX_B_PE +170 0x7800 //RX_THR_PITCH_DET_0 +171 0x7000 //RX_THR_PITCH_DET_1 +172 0x6000 //RX_THR_PITCH_DET_2 +173 0x0008 //RX_PITCH_BFR_LEN +174 0x0003 //RX_SBD_PITCH_DET +175 0x0100 //RX_PP_RESRV_0 +176 0x0020 //RX_PP_RESRV_1 +177 0x0400 //RX_N_SN_EST +178 0x000C //RX_N2_SN_EST +179 0x0014 //RX_NS_LVL_CTRL +180 0xF400 //RX_THR_SN_EST +181 0x7E00 //RX_LAMBDA_PFILT +182 0x00C8 //RX_FENS_RESRV_0 +183 0x0190 //RX_FENS_RESRV_1 +184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +187 0x0002 //RX_EXTRA_NS_L +188 0x0800 //RX_EXTRA_NS_A +189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +190 0x7FFF //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +192 0x199A //RX_A_POST_FLT +193 0x0000 //RX_LMT_THRD +194 0x4000 //RX_LMT_ALPHA +195 0x0020 //RX_FDEQ_SUBNUM +196 0x4848 //RX_FDEQ_GAIN_0 +197 0x4848 //RX_FDEQ_GAIN_1 +198 0x4848 //RX_FDEQ_GAIN_2 +199 0x4850 //RX_FDEQ_GAIN_3 +200 0x4848 //RX_FDEQ_GAIN_4 +201 0x4848 //RX_FDEQ_GAIN_5 +202 0x4568 //RX_FDEQ_GAIN_6 +203 0x485C //RX_FDEQ_GAIN_7 +204 0x5C60 //RX_FDEQ_GAIN_8 +205 0x685C //RX_FDEQ_GAIN_9 +206 0x5648 //RX_FDEQ_GAIN_10 +207 0x484C //RX_FDEQ_GAIN_11 +208 0x706C //RX_FDEQ_GAIN_12 +209 0x7070 //RX_FDEQ_GAIN_13 +210 0x6868 //RX_FDEQ_GAIN_14 +211 0x6060 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0202 //RX_FDEQ_BIN_0 +221 0x0203 //RX_FDEQ_BIN_1 +222 0x0303 //RX_FDEQ_BIN_2 +223 0x0402 //RX_FDEQ_BIN_3 +224 0x0504 //RX_FDEQ_BIN_4 +225 0x0209 //RX_FDEQ_BIN_5 +226 0x0808 //RX_FDEQ_BIN_6 +227 0x090A //RX_FDEQ_BIN_7 +228 0x0B0C //RX_FDEQ_BIN_8 +229 0x0D0E //RX_FDEQ_BIN_9 +230 0x1013 //RX_FDEQ_BIN_10 +231 0x1719 //RX_FDEQ_BIN_11 +232 0x1B1E //RX_FDEQ_BIN_12 +233 0x1E1E //RX_FDEQ_BIN_13 +234 0x1E28 //RX_FDEQ_BIN_14 +235 0x282C //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x4000 //RX_FDEQ_RESRV_0 +245 0x0320 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0030 //RX_FDDRC_BAND_MARGIN_1 +248 0x0050 //RX_FDDRC_BAND_MARGIN_2 +249 0x0080 //RX_FDDRC_BAND_MARGIN_3 +250 0x0004 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x2000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x2000 //RX_FDDRC_THRD_3_2 +258 0x5000 //RX_FDDRC_THRD_3_3 +259 0x4000 //RX_FDDRC_SLANT_0_0 +260 0x4000 //RX_FDDRC_SLANT_0_1 +261 0x4000 //RX_FDDRC_SLANT_0_2 +262 0x4000 //RX_FDDRC_SLANT_0_3 +263 0x7FFF //RX_FDDRC_SLANT_1_0 +264 0x7FFF //RX_FDDRC_SLANT_1_1 +265 0x7FFF //RX_FDDRC_SLANT_1_2 +266 0x7FFF //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +268 0x0002 //RX_FILTINDX +269 0x0001 //RX_TDDRC_THRD_0 +270 0x0002 //RX_TDDRC_THRD_1 +271 0x1800 //RX_TDDRC_THRD_2 +272 0x1800 //RX_TDDRC_THRD_3 +273 0x6000 //RX_TDDRC_SLANT_0 +274 0x6E00 //RX_TDDRC_SLANT_1 +275 0x4000 //RX_TDDRC_ALPHA_UP_0 +276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x199A //RX_TDDRC_HMNC_GAIN +279 0x0001 //RX_TDDRC_SMT_FLAG +280 0x0CCD //RX_TDDRC_SMT_W +281 0x02D2 //RX_TDDRC_DRC_GAIN +282 0x7C00 //RX_LAMBDA_PKA_FP +283 0x2000 //RX_TPKA_FP +284 0x2000 //RX_MIN_G_FP +285 0x0080 //RX_MAX_G_FP +286 0x0013 //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 +288 0x0000 //RX_MAXLEVEL_CNG +289 0x3000 //RX_BWE_UV_TH +290 0x3000 //RX_BWE_UV_TH2 +291 0x1800 //RX_BWE_UV_TH3 +292 0x1000 //RX_BWE_V_TH +293 0x04CD //RX_BWE_GAIN1_V_TH1 +294 0x0F33 //RX_BWE_GAIN1_V_TH2 +295 0x7333 //RX_BWE_UV_EQ +296 0x199A //RX_BWE_V_EQ +297 0x7333 //RX_BWE_TONE_TH +298 0x0004 //RX_BWE_UV_HOLD_T +299 0x6CCD //RX_BWE_GAIN2_ALPHA +300 0x799A //RX_BWE_GAIN3_ALPHA +301 0x001E //RX_BWE_CUTOFF +302 0x3000 //RX_BWE_GAINFILL +303 0x3200 //RX_BWE_MAXTH_TONE +304 0x2000 //RX_BWE_EQ_0 +305 0x2000 //RX_BWE_EQ_1 +306 0x2000 //RX_BWE_EQ_2 +307 0x2000 //RX_BWE_EQ_3 +308 0x2000 //RX_BWE_EQ_4 +309 0x2000 //RX_BWE_EQ_5 +310 0x2000 //RX_BWE_EQ_6 +311 0x0000 //RX_BWE_RESRV_0 +312 0x0000 //RX_BWE_RESRV_1 +313 0x0000 //RX_BWE_RESRV_2 +#VOL 0 +163 0x4000 //RX_TDDRC_ALPHA_UP_1 +164 0x4000 //RX_TDDRC_ALPHA_UP_2 +165 0x4000 //RX_TDDRC_ALPHA_UP_3 +166 0x4000 //RX_TDDRC_ALPHA_UP_4 +184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +190 0x7FFF //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +269 0x0001 //RX_TDDRC_THRD_0 +270 0x0002 //RX_TDDRC_THRD_1 +271 0x1800 //RX_TDDRC_THRD_2 +272 0x1800 //RX_TDDRC_THRD_3 +273 0x6000 //RX_TDDRC_SLANT_0 +274 0x6E00 //RX_TDDRC_SLANT_1 +275 0x4000 //RX_TDDRC_ALPHA_UP_0 +276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x199A //RX_TDDRC_HMNC_GAIN +279 0x0001 //RX_TDDRC_SMT_FLAG +280 0x0CCD //RX_TDDRC_SMT_W +281 0x02D2 //RX_TDDRC_DRC_GAIN +195 0x0020 //RX_FDEQ_SUBNUM +196 0x4848 //RX_FDEQ_GAIN_0 +197 0x4848 //RX_FDEQ_GAIN_1 +198 0x4848 //RX_FDEQ_GAIN_2 +199 0x4850 //RX_FDEQ_GAIN_3 +200 0x4848 //RX_FDEQ_GAIN_4 +201 0x4848 //RX_FDEQ_GAIN_5 +202 0x4568 //RX_FDEQ_GAIN_6 +203 0x485C //RX_FDEQ_GAIN_7 +204 0x5C60 //RX_FDEQ_GAIN_8 +205 0x685C //RX_FDEQ_GAIN_9 +206 0x5648 //RX_FDEQ_GAIN_10 +207 0x484C //RX_FDEQ_GAIN_11 +208 0x706C //RX_FDEQ_GAIN_12 +209 0x7070 //RX_FDEQ_GAIN_13 +210 0x6868 //RX_FDEQ_GAIN_14 +211 0x6060 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0202 //RX_FDEQ_BIN_0 +221 0x0203 //RX_FDEQ_BIN_1 +222 0x0303 //RX_FDEQ_BIN_2 +223 0x0402 //RX_FDEQ_BIN_3 +224 0x0504 //RX_FDEQ_BIN_4 +225 0x0209 //RX_FDEQ_BIN_5 +226 0x0808 //RX_FDEQ_BIN_6 +227 0x090A //RX_FDEQ_BIN_7 +228 0x0B0C //RX_FDEQ_BIN_8 +229 0x0D0E //RX_FDEQ_BIN_9 +230 0x1013 //RX_FDEQ_BIN_10 +231 0x1719 //RX_FDEQ_BIN_11 +232 0x1B1E //RX_FDEQ_BIN_12 +233 0x1E1E //RX_FDEQ_BIN_13 +234 0x1E28 //RX_FDEQ_BIN_14 +235 0x282C //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x4000 //RX_FDEQ_RESRV_0 +245 0x0320 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0030 //RX_FDDRC_BAND_MARGIN_1 +248 0x0050 //RX_FDDRC_BAND_MARGIN_2 +249 0x0080 //RX_FDDRC_BAND_MARGIN_3 +250 0x0004 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x2000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x2000 //RX_FDDRC_THRD_3_2 +258 0x5000 //RX_FDDRC_THRD_3_3 +259 0x4000 //RX_FDDRC_SLANT_0_0 +260 0x4000 //RX_FDDRC_SLANT_0_1 +261 0x4000 //RX_FDDRC_SLANT_0_2 +262 0x4000 //RX_FDDRC_SLANT_0_3 +263 0x7FFF //RX_FDDRC_SLANT_1_0 +264 0x7FFF //RX_FDDRC_SLANT_1_1 +265 0x7FFF //RX_FDDRC_SLANT_1_2 +266 0x7FFF //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +286 0x0013 //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 +#VOL 1 +163 0x4000 //RX_TDDRC_ALPHA_UP_1 +164 0x4000 //RX_TDDRC_ALPHA_UP_2 +165 0x4000 //RX_TDDRC_ALPHA_UP_3 +166 0x4000 //RX_TDDRC_ALPHA_UP_4 +184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +190 0x7FFF //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +269 0x0001 //RX_TDDRC_THRD_0 +270 0x0002 //RX_TDDRC_THRD_1 +271 0x1800 //RX_TDDRC_THRD_2 +272 0x1800 //RX_TDDRC_THRD_3 +273 0x6000 //RX_TDDRC_SLANT_0 +274 0x6E00 //RX_TDDRC_SLANT_1 +275 0x4000 //RX_TDDRC_ALPHA_UP_0 +276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x199A //RX_TDDRC_HMNC_GAIN +279 0x0001 //RX_TDDRC_SMT_FLAG +280 0x0CCD //RX_TDDRC_SMT_W +281 0x02D2 //RX_TDDRC_DRC_GAIN +195 0x0020 //RX_FDEQ_SUBNUM +196 0x4848 //RX_FDEQ_GAIN_0 +197 0x4848 //RX_FDEQ_GAIN_1 +198 0x4848 //RX_FDEQ_GAIN_2 +199 0x4850 //RX_FDEQ_GAIN_3 +200 0x4848 //RX_FDEQ_GAIN_4 +201 0x4848 //RX_FDEQ_GAIN_5 +202 0x4568 //RX_FDEQ_GAIN_6 +203 0x485C //RX_FDEQ_GAIN_7 +204 0x5C60 //RX_FDEQ_GAIN_8 +205 0x685C //RX_FDEQ_GAIN_9 +206 0x5648 //RX_FDEQ_GAIN_10 +207 0x484C //RX_FDEQ_GAIN_11 +208 0x706C //RX_FDEQ_GAIN_12 +209 0x7070 //RX_FDEQ_GAIN_13 +210 0x6868 //RX_FDEQ_GAIN_14 +211 0x6060 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0202 //RX_FDEQ_BIN_0 +221 0x0203 //RX_FDEQ_BIN_1 +222 0x0303 //RX_FDEQ_BIN_2 +223 0x0402 //RX_FDEQ_BIN_3 +224 0x0504 //RX_FDEQ_BIN_4 +225 0x0209 //RX_FDEQ_BIN_5 +226 0x0808 //RX_FDEQ_BIN_6 +227 0x090A //RX_FDEQ_BIN_7 +228 0x0B0C //RX_FDEQ_BIN_8 +229 0x0D0E //RX_FDEQ_BIN_9 +230 0x1013 //RX_FDEQ_BIN_10 +231 0x1719 //RX_FDEQ_BIN_11 +232 0x1B1E //RX_FDEQ_BIN_12 +233 0x1E1E //RX_FDEQ_BIN_13 +234 0x1E28 //RX_FDEQ_BIN_14 +235 0x282C //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x4000 //RX_FDEQ_RESRV_0 +245 0x0320 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0030 //RX_FDDRC_BAND_MARGIN_1 +248 0x0050 //RX_FDDRC_BAND_MARGIN_2 +249 0x0080 //RX_FDDRC_BAND_MARGIN_3 +250 0x0004 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x2000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x2000 //RX_FDDRC_THRD_3_2 +258 0x5000 //RX_FDDRC_THRD_3_3 +259 0x4000 //RX_FDDRC_SLANT_0_0 +260 0x4000 //RX_FDDRC_SLANT_0_1 +261 0x4000 //RX_FDDRC_SLANT_0_2 +262 0x4000 //RX_FDDRC_SLANT_0_3 +263 0x7FFF //RX_FDDRC_SLANT_1_0 +264 0x7FFF //RX_FDDRC_SLANT_1_1 +265 0x7FFF //RX_FDDRC_SLANT_1_2 +266 0x7FFF //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +286 0x001C //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 +#VOL 2 +163 0x4000 //RX_TDDRC_ALPHA_UP_1 +164 0x4000 //RX_TDDRC_ALPHA_UP_2 +165 0x4000 //RX_TDDRC_ALPHA_UP_3 +166 0x4000 //RX_TDDRC_ALPHA_UP_4 +184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +190 0x7FFF //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +269 0x0001 //RX_TDDRC_THRD_0 +270 0x0002 //RX_TDDRC_THRD_1 +271 0x1800 //RX_TDDRC_THRD_2 +272 0x1800 //RX_TDDRC_THRD_3 +273 0x6000 //RX_TDDRC_SLANT_0 +274 0x6E00 //RX_TDDRC_SLANT_1 +275 0x4000 //RX_TDDRC_ALPHA_UP_0 +276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x199A //RX_TDDRC_HMNC_GAIN +279 0x0001 //RX_TDDRC_SMT_FLAG +280 0x0CCD //RX_TDDRC_SMT_W +281 0x02D2 //RX_TDDRC_DRC_GAIN +195 0x0020 //RX_FDEQ_SUBNUM +196 0x4848 //RX_FDEQ_GAIN_0 +197 0x4848 //RX_FDEQ_GAIN_1 +198 0x4848 //RX_FDEQ_GAIN_2 +199 0x4850 //RX_FDEQ_GAIN_3 +200 0x4848 //RX_FDEQ_GAIN_4 +201 0x4848 //RX_FDEQ_GAIN_5 +202 0x4568 //RX_FDEQ_GAIN_6 +203 0x485C //RX_FDEQ_GAIN_7 +204 0x5C60 //RX_FDEQ_GAIN_8 +205 0x685C //RX_FDEQ_GAIN_9 +206 0x5648 //RX_FDEQ_GAIN_10 +207 0x484C //RX_FDEQ_GAIN_11 +208 0x706C //RX_FDEQ_GAIN_12 +209 0x7070 //RX_FDEQ_GAIN_13 +210 0x6868 //RX_FDEQ_GAIN_14 +211 0x6060 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0202 //RX_FDEQ_BIN_0 +221 0x0203 //RX_FDEQ_BIN_1 +222 0x0303 //RX_FDEQ_BIN_2 +223 0x0402 //RX_FDEQ_BIN_3 +224 0x0504 //RX_FDEQ_BIN_4 +225 0x0209 //RX_FDEQ_BIN_5 +226 0x0808 //RX_FDEQ_BIN_6 +227 0x090A //RX_FDEQ_BIN_7 +228 0x0B0C //RX_FDEQ_BIN_8 +229 0x0D0E //RX_FDEQ_BIN_9 +230 0x1013 //RX_FDEQ_BIN_10 +231 0x1719 //RX_FDEQ_BIN_11 +232 0x1B1E //RX_FDEQ_BIN_12 +233 0x1E1E //RX_FDEQ_BIN_13 +234 0x1E28 //RX_FDEQ_BIN_14 +235 0x282C //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x4000 //RX_FDEQ_RESRV_0 +245 0x0320 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0030 //RX_FDDRC_BAND_MARGIN_1 +248 0x0050 //RX_FDDRC_BAND_MARGIN_2 +249 0x0080 //RX_FDDRC_BAND_MARGIN_3 +250 0x0004 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x2000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x2000 //RX_FDDRC_THRD_3_2 +258 0x5000 //RX_FDDRC_THRD_3_3 +259 0x4000 //RX_FDDRC_SLANT_0_0 +260 0x4000 //RX_FDDRC_SLANT_0_1 +261 0x4000 //RX_FDDRC_SLANT_0_2 +262 0x4000 //RX_FDDRC_SLANT_0_3 +263 0x7FFF //RX_FDDRC_SLANT_1_0 +264 0x7FFF //RX_FDDRC_SLANT_1_1 +265 0x7FFF //RX_FDDRC_SLANT_1_2 +266 0x7FFF //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +286 0x0028 //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 +#VOL 3 +163 0x4000 //RX_TDDRC_ALPHA_UP_1 +164 0x4000 //RX_TDDRC_ALPHA_UP_2 +165 0x4000 //RX_TDDRC_ALPHA_UP_3 +166 0x4000 //RX_TDDRC_ALPHA_UP_4 +184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +190 0x7FFF //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +269 0x0001 //RX_TDDRC_THRD_0 +270 0x0002 //RX_TDDRC_THRD_1 +271 0x1800 //RX_TDDRC_THRD_2 +272 0x1800 //RX_TDDRC_THRD_3 +273 0x6000 //RX_TDDRC_SLANT_0 +274 0x6E00 //RX_TDDRC_SLANT_1 +275 0x4000 //RX_TDDRC_ALPHA_UP_0 +276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x199A //RX_TDDRC_HMNC_GAIN +279 0x0001 //RX_TDDRC_SMT_FLAG +280 0x0CCD //RX_TDDRC_SMT_W +281 0x02D2 //RX_TDDRC_DRC_GAIN +195 0x0020 //RX_FDEQ_SUBNUM +196 0x4848 //RX_FDEQ_GAIN_0 +197 0x4848 //RX_FDEQ_GAIN_1 +198 0x4848 //RX_FDEQ_GAIN_2 +199 0x4850 //RX_FDEQ_GAIN_3 +200 0x4848 //RX_FDEQ_GAIN_4 +201 0x4848 //RX_FDEQ_GAIN_5 +202 0x4568 //RX_FDEQ_GAIN_6 +203 0x485C //RX_FDEQ_GAIN_7 +204 0x5C60 //RX_FDEQ_GAIN_8 +205 0x685C //RX_FDEQ_GAIN_9 +206 0x5648 //RX_FDEQ_GAIN_10 +207 0x484C //RX_FDEQ_GAIN_11 +208 0x706C //RX_FDEQ_GAIN_12 +209 0x7070 //RX_FDEQ_GAIN_13 +210 0x6868 //RX_FDEQ_GAIN_14 +211 0x6060 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0202 //RX_FDEQ_BIN_0 +221 0x0203 //RX_FDEQ_BIN_1 +222 0x0303 //RX_FDEQ_BIN_2 +223 0x0402 //RX_FDEQ_BIN_3 +224 0x0504 //RX_FDEQ_BIN_4 +225 0x0209 //RX_FDEQ_BIN_5 +226 0x0808 //RX_FDEQ_BIN_6 +227 0x090A //RX_FDEQ_BIN_7 +228 0x0B0C //RX_FDEQ_BIN_8 +229 0x0D0E //RX_FDEQ_BIN_9 +230 0x1013 //RX_FDEQ_BIN_10 +231 0x1719 //RX_FDEQ_BIN_11 +232 0x1B1E //RX_FDEQ_BIN_12 +233 0x1E1E //RX_FDEQ_BIN_13 +234 0x1E28 //RX_FDEQ_BIN_14 +235 0x282C //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x4000 //RX_FDEQ_RESRV_0 +245 0x0320 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0030 //RX_FDDRC_BAND_MARGIN_1 +248 0x0050 //RX_FDDRC_BAND_MARGIN_2 +249 0x0080 //RX_FDDRC_BAND_MARGIN_3 +250 0x0004 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x2000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x2000 //RX_FDDRC_THRD_3_2 +258 0x5000 //RX_FDDRC_THRD_3_3 +259 0x4000 //RX_FDDRC_SLANT_0_0 +260 0x4000 //RX_FDDRC_SLANT_0_1 +261 0x4000 //RX_FDDRC_SLANT_0_2 +262 0x4000 //RX_FDDRC_SLANT_0_3 +263 0x7FFF //RX_FDDRC_SLANT_1_0 +264 0x7FFF //RX_FDDRC_SLANT_1_1 +265 0x7FFF //RX_FDDRC_SLANT_1_2 +266 0x7FFF //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +286 0x0035 //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 +#VOL 4 +163 0x4000 //RX_TDDRC_ALPHA_UP_1 +164 0x4000 //RX_TDDRC_ALPHA_UP_2 +165 0x4000 //RX_TDDRC_ALPHA_UP_3 +166 0x4000 //RX_TDDRC_ALPHA_UP_4 +184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +190 0x7FFF //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +269 0x0001 //RX_TDDRC_THRD_0 +270 0x0002 //RX_TDDRC_THRD_1 +271 0x1800 //RX_TDDRC_THRD_2 +272 0x1800 //RX_TDDRC_THRD_3 +273 0x6000 //RX_TDDRC_SLANT_0 +274 0x6E00 //RX_TDDRC_SLANT_1 +275 0x4000 //RX_TDDRC_ALPHA_UP_0 +276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x199A //RX_TDDRC_HMNC_GAIN +279 0x0001 //RX_TDDRC_SMT_FLAG +280 0x0CCD //RX_TDDRC_SMT_W +281 0x02D2 //RX_TDDRC_DRC_GAIN +195 0x0020 //RX_FDEQ_SUBNUM +196 0x4C4C //RX_FDEQ_GAIN_0 +197 0x4C4C //RX_FDEQ_GAIN_1 +198 0x4C48 //RX_FDEQ_GAIN_2 +199 0x4870 //RX_FDEQ_GAIN_3 +200 0x4848 //RX_FDEQ_GAIN_4 +201 0x4848 //RX_FDEQ_GAIN_5 +202 0x4568 //RX_FDEQ_GAIN_6 +203 0x485C //RX_FDEQ_GAIN_7 +204 0x5C60 //RX_FDEQ_GAIN_8 +205 0x685C //RX_FDEQ_GAIN_9 +206 0x5648 //RX_FDEQ_GAIN_10 +207 0x484C //RX_FDEQ_GAIN_11 +208 0x706C //RX_FDEQ_GAIN_12 +209 0x7070 //RX_FDEQ_GAIN_13 +210 0x6868 //RX_FDEQ_GAIN_14 +211 0x6060 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0202 //RX_FDEQ_BIN_0 +221 0x0203 //RX_FDEQ_BIN_1 +222 0x0303 //RX_FDEQ_BIN_2 +223 0x0402 //RX_FDEQ_BIN_3 +224 0x0504 //RX_FDEQ_BIN_4 +225 0x0209 //RX_FDEQ_BIN_5 +226 0x0808 //RX_FDEQ_BIN_6 +227 0x090A //RX_FDEQ_BIN_7 +228 0x0B0C //RX_FDEQ_BIN_8 +229 0x0D0E //RX_FDEQ_BIN_9 +230 0x1013 //RX_FDEQ_BIN_10 +231 0x1719 //RX_FDEQ_BIN_11 +232 0x1B1E //RX_FDEQ_BIN_12 +233 0x1E1E //RX_FDEQ_BIN_13 +234 0x1E28 //RX_FDEQ_BIN_14 +235 0x282C //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x4000 //RX_FDEQ_RESRV_0 +245 0x0320 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0030 //RX_FDDRC_BAND_MARGIN_1 +248 0x0050 //RX_FDDRC_BAND_MARGIN_2 +249 0x0080 //RX_FDDRC_BAND_MARGIN_3 +250 0x0004 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x2000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x2000 //RX_FDDRC_THRD_3_2 +258 0x5000 //RX_FDDRC_THRD_3_3 +259 0x4000 //RX_FDDRC_SLANT_0_0 +260 0x4000 //RX_FDDRC_SLANT_0_1 +261 0x4000 //RX_FDDRC_SLANT_0_2 +262 0x4000 //RX_FDDRC_SLANT_0_3 +263 0x7FFF //RX_FDDRC_SLANT_1_0 +264 0x7FFF //RX_FDDRC_SLANT_1_1 +265 0x7FFF //RX_FDDRC_SLANT_1_2 +266 0x7FFF //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +286 0x0052 //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 +#VOL 5 +163 0x4000 //RX_TDDRC_ALPHA_UP_1 +164 0x4000 //RX_TDDRC_ALPHA_UP_2 +165 0x4000 //RX_TDDRC_ALPHA_UP_3 +166 0x4000 //RX_TDDRC_ALPHA_UP_4 +184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +190 0x7FFF //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +269 0x0001 //RX_TDDRC_THRD_0 +270 0x0002 //RX_TDDRC_THRD_1 +271 0x1800 //RX_TDDRC_THRD_2 +272 0x1800 //RX_TDDRC_THRD_3 +273 0x6000 //RX_TDDRC_SLANT_0 +274 0x6E00 //RX_TDDRC_SLANT_1 +275 0x4000 //RX_TDDRC_ALPHA_UP_0 +276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x199A //RX_TDDRC_HMNC_GAIN +279 0x0001 //RX_TDDRC_SMT_FLAG +280 0x0CCD //RX_TDDRC_SMT_W +281 0x02D2 //RX_TDDRC_DRC_GAIN +195 0x0020 //RX_FDEQ_SUBNUM +196 0x4C4C //RX_FDEQ_GAIN_0 +197 0x4C4C //RX_FDEQ_GAIN_1 +198 0x4C48 //RX_FDEQ_GAIN_2 +199 0x4870 //RX_FDEQ_GAIN_3 +200 0x4848 //RX_FDEQ_GAIN_4 +201 0x4848 //RX_FDEQ_GAIN_5 +202 0x4568 //RX_FDEQ_GAIN_6 +203 0x485C //RX_FDEQ_GAIN_7 +204 0x5C60 //RX_FDEQ_GAIN_8 +205 0x685C //RX_FDEQ_GAIN_9 +206 0x5648 //RX_FDEQ_GAIN_10 +207 0x484C //RX_FDEQ_GAIN_11 +208 0x706C //RX_FDEQ_GAIN_12 +209 0x7070 //RX_FDEQ_GAIN_13 +210 0x6868 //RX_FDEQ_GAIN_14 +211 0x6060 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0202 //RX_FDEQ_BIN_0 +221 0x0203 //RX_FDEQ_BIN_1 +222 0x0303 //RX_FDEQ_BIN_2 +223 0x0402 //RX_FDEQ_BIN_3 +224 0x0504 //RX_FDEQ_BIN_4 +225 0x0209 //RX_FDEQ_BIN_5 +226 0x0808 //RX_FDEQ_BIN_6 +227 0x090A //RX_FDEQ_BIN_7 +228 0x0B0C //RX_FDEQ_BIN_8 +229 0x0D0E //RX_FDEQ_BIN_9 +230 0x1013 //RX_FDEQ_BIN_10 +231 0x1719 //RX_FDEQ_BIN_11 +232 0x1B1E //RX_FDEQ_BIN_12 +233 0x1E1E //RX_FDEQ_BIN_13 +234 0x1E28 //RX_FDEQ_BIN_14 +235 0x282C //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x4000 //RX_FDEQ_RESRV_0 +245 0x0320 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0030 //RX_FDDRC_BAND_MARGIN_1 +248 0x0050 //RX_FDDRC_BAND_MARGIN_2 +249 0x0080 //RX_FDDRC_BAND_MARGIN_3 +250 0x0004 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x2000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x2000 //RX_FDDRC_THRD_3_2 +258 0x5000 //RX_FDDRC_THRD_3_3 +259 0x4000 //RX_FDDRC_SLANT_0_0 +260 0x4000 //RX_FDDRC_SLANT_0_1 +261 0x4000 //RX_FDDRC_SLANT_0_2 +262 0x4000 //RX_FDDRC_SLANT_0_3 +263 0x7FFF //RX_FDDRC_SLANT_1_0 +264 0x7FFF //RX_FDDRC_SLANT_1_1 +265 0x7FFF //RX_FDDRC_SLANT_1_2 +266 0x7FFF //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +286 0x0078 //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 +#VOL 6 +163 0x4000 //RX_TDDRC_ALPHA_UP_1 +164 0x4000 //RX_TDDRC_ALPHA_UP_2 +165 0x4000 //RX_TDDRC_ALPHA_UP_3 +166 0x4000 //RX_TDDRC_ALPHA_UP_4 +184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +190 0x7FFF //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +269 0x0001 //RX_TDDRC_THRD_0 +270 0x0002 //RX_TDDRC_THRD_1 +271 0x1800 //RX_TDDRC_THRD_2 +272 0x1800 //RX_TDDRC_THRD_3 +273 0x6000 //RX_TDDRC_SLANT_0 +274 0x6E00 //RX_TDDRC_SLANT_1 +275 0x4000 //RX_TDDRC_ALPHA_UP_0 +276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x199A //RX_TDDRC_HMNC_GAIN +279 0x0001 //RX_TDDRC_SMT_FLAG +280 0x0CCD //RX_TDDRC_SMT_W +281 0x02D2 //RX_TDDRC_DRC_GAIN +195 0x0020 //RX_FDEQ_SUBNUM +196 0x4C4C //RX_FDEQ_GAIN_0 +197 0x4C4C //RX_FDEQ_GAIN_1 +198 0x4C48 //RX_FDEQ_GAIN_2 +199 0x4870 //RX_FDEQ_GAIN_3 +200 0x4848 //RX_FDEQ_GAIN_4 +201 0x4848 //RX_FDEQ_GAIN_5 +202 0x4568 //RX_FDEQ_GAIN_6 +203 0x485C //RX_FDEQ_GAIN_7 +204 0x5C60 //RX_FDEQ_GAIN_8 +205 0x685C //RX_FDEQ_GAIN_9 +206 0x5648 //RX_FDEQ_GAIN_10 +207 0x484C //RX_FDEQ_GAIN_11 +208 0x706C //RX_FDEQ_GAIN_12 +209 0x7070 //RX_FDEQ_GAIN_13 +210 0x6868 //RX_FDEQ_GAIN_14 +211 0x6060 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0202 //RX_FDEQ_BIN_0 +221 0x0203 //RX_FDEQ_BIN_1 +222 0x0303 //RX_FDEQ_BIN_2 +223 0x0402 //RX_FDEQ_BIN_3 +224 0x0504 //RX_FDEQ_BIN_4 +225 0x0209 //RX_FDEQ_BIN_5 +226 0x0808 //RX_FDEQ_BIN_6 +227 0x090A //RX_FDEQ_BIN_7 +228 0x0B0C //RX_FDEQ_BIN_8 +229 0x0D0E //RX_FDEQ_BIN_9 +230 0x1013 //RX_FDEQ_BIN_10 +231 0x1719 //RX_FDEQ_BIN_11 +232 0x1B1E //RX_FDEQ_BIN_12 +233 0x1E1E //RX_FDEQ_BIN_13 +234 0x1E28 //RX_FDEQ_BIN_14 +235 0x282C //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x4000 //RX_FDEQ_RESRV_0 +245 0x0320 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0030 //RX_FDDRC_BAND_MARGIN_1 +248 0x0050 //RX_FDDRC_BAND_MARGIN_2 +249 0x0080 //RX_FDDRC_BAND_MARGIN_3 +250 0x0004 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x2000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x2000 //RX_FDDRC_THRD_3_2 +258 0x5000 //RX_FDDRC_THRD_3_3 +259 0x4000 //RX_FDDRC_SLANT_0_0 +260 0x4000 //RX_FDDRC_SLANT_0_1 +261 0x4000 //RX_FDDRC_SLANT_0_2 +262 0x4000 //RX_FDDRC_SLANT_0_3 +263 0x7FFF //RX_FDDRC_SLANT_1_0 +264 0x7FFF //RX_FDDRC_SLANT_1_1 +265 0x7FFF //RX_FDDRC_SLANT_1_2 +266 0x7FFF //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +286 0x0100 //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 + +#CASE_NAME HANDSFREE-HANDSFREE-RESERVE1-FB +#PARAM_MODE FULL +#PARAM_TYPE TX+2RX +#TOTAL_CUSTOM_STEP 7+7 +#TX +0 0x0001 //TX_OPERATION_MODE_0 +1 0x0001 //TX_OPERATION_MODE_1 +2 0x0033 //TX_PATCH_REG +3 0x6B54 //TX_SENDFUNC_MODE_0 +4 0x0001 //TX_SENDFUNC_MODE_1 +5 0x0003 //TX_NUM_MIC +6 0x0004 //TX_SAMPLINGFREQ_SIG +7 0x0004 //TX_SAMPLINGFREQ_PROC +8 0x000A //TX_FRAME_SZ_SIG +9 0x000A //TX_FRAME_SZ +10 0x0000 //TX_DELAY_OPT +11 0x0028 //TX_MAX_TAIL_LENGTH +12 0x0001 //TX_NUM_LOUTCHN +13 0x0001 //TX_MAXNUM_AECREF +14 0x0000 //TX_DBG_FUNC_REG +15 0x0000 //TX_DBG_FUNC_REG1 +16 0x0000 //TX_SYS_RESRV_0 +17 0x0000 //TX_SYS_RESRV_1 +18 0x0000 //TX_SYS_RESRV_2 +19 0x0000 //TX_SYS_RESRV_3 +20 0x0000 //TX_DIST2REF0 +21 0x00A4 //TX_DIST2REF1 +22 0x0017 //TX_DIST2REF_02 +23 0x0000 //TX_DIST2REF_03 +24 0x0000 //TX_DIST2REF_04 +25 0x0000 //TX_DIST2REF_05 +26 0x0000 //TX_MMIC +27 0x0FF7 //TX_PGA_0 +28 0x0FF7 //TX_PGA_1 +29 0x0FF7 //TX_PGA_2 +30 0x0000 //TX_PGA_3 +31 0x0000 //TX_PGA_4 +32 0x0000 //TX_PGA_5 +33 0x0001 //TX_MIC_PAIRS +34 0x0000 //TX_MIC_PAIRS_HS +35 0x0002 //TX_MICS_FOR_BF +36 0x0000 //TX_MIC_PAIRS_FORL1 +37 0x0002 //TX_MICS_OF_PAIR0 +38 0x0002 //TX_MICS_OF_PAIR1 +39 0x0002 //TX_MICS_OF_PAIR2 +40 0x0002 //TX_MICS_OF_PAIR3 +41 0x0002 //TX_MIC_DATA_SRC0 +42 0x0000 //TX_MIC_DATA_SRC1 +43 0x0001 //TX_MIC_DATA_SRC2 +44 0x0000 //TX_MIC_DATA_SRC3 +45 0x0000 //TX_MIC_PAIR_CH_04 +46 0x0000 //TX_MIC_PAIR_CH_05 +47 0x0000 //TX_MIC_PAIR_CH_10 +48 0x0000 //TX_MIC_PAIR_CH_11 +49 0x0000 //TX_MIC_PAIR_CH_12 +50 0x0000 //TX_MIC_PAIR_CH_13 +51 0x0000 //TX_MIC_PAIR_CH_14 +52 0x05DC //TX_HD_BIN_MASK +53 0x0010 //TX_HD_SUBAND_MASK +54 0x19A1 //TX_HD_FRAME_AVG_MASK +55 0x0320 //TX_HD_MIN_FRQ +56 0x1000 //TX_HD_ALPHA_PSD +57 0x1100 //TX_T_PHPR1 +58 0x0000 //TX_T_PHPR2 +59 0x0000 //TX_T_PTPR +60 0x0000 //TX_T_PNPR +61 0x0000 //TX_T_PAPR1 +62 0xEE6C //TX_T_PSDVAT +63 0x0800 //TX_CNT +64 0x4000 //TX_ANTI_HOWL_GAIN +65 0x0001 //TX_MICFORBFMARK_0 +66 0x0001 //TX_MICFORBFMARK_1 +67 0x0001 //TX_MICFORBFMARK_2 +68 0x0001 //TX_MICFORBFMARK_3 +69 0x0001 //TX_MICFORBFMARK_4 +70 0x0001 //TX_MICFORBFMARK_5 +71 0x0000 //TX_DIST2REF_10 +72 0x3B33 //TX_DIST2REF_11 +73 0x0A70 //TX_DIST2REF2 +74 0x0000 //TX_DIST2REF_13 +75 0x0000 //TX_DIST2REF_14 +76 0x0000 //TX_DIST2REF_15 +77 0x0000 //TX_DIST2REF_20 +78 0x0000 //TX_DIST2REF_21 +79 0x0000 //TX_DIST2REF_22 +80 0x0000 //TX_DIST2REF_23 +81 0x0000 //TX_DIST2REF_24 +82 0x0000 //TX_DIST2REF_25 +83 0x0000 //TX_DIST2REF_30 +84 0x0000 //TX_DIST2REF_31 +85 0x0000 //TX_DIST2REF_32 +86 0x0000 //TX_DIST2REF_33 +87 0x0000 //TX_DIST2REF_34 +88 0x0000 //TX_DIST2REF_35 +89 0x0000 //TX_MIC_LOC_00 +90 0x0000 //TX_MIC_LOC_01 +91 0x0000 //TX_MIC_LOC_02 +92 0x0000 //TX_MIC_LOC_03 +93 0x0000 //TX_MIC_LOC_04 +94 0x0000 //TX_MIC_LOC_05 +95 0x0000 //TX_MIC_LOC_10 +96 0x0000 //TX_MIC_LOC_11 +97 0x0000 //TX_MIC_LOC_12 +98 0x0000 //TX_MIC_LOC_13 +99 0x0000 //TX_MIC_LOC_14 +100 0x0000 //TX_MIC_LOC_15 +101 0x0000 //TX_MIC_LOC_20 +102 0x0000 //TX_MIC_LOC_21 +103 0x0000 //TX_MIC_LOC_22 +104 0x0000 //TX_MIC_LOC_23 +105 0x0000 //TX_MIC_LOC_24 +106 0x0000 //TX_MIC_LOC_25 +107 0x0800 //TX_MIC_REFBLK_VOLUME +108 0x0CAE //TX_MIC_BLOCK_VOLUME +109 0x0000 //TX_INVERSE_MASK +110 0x0000 //TX_ADCS_MASK +111 0x04D0 //TX_ADCS_GAIN +112 0x4000 //TX_NFC_GAINFAC +113 0x0000 //TX_MAINMIC_BLKFACTOR +114 0x0000 //TX_REFMIC_BLKFACTOR +115 0x0000 //TX_BLMIC_BLKFACTOR +116 0x0000 //TX_BRMIC_BLKFACTOR +117 0x0031 //TX_MICBLK_START_BIN +118 0x0060 //TX_MICBLK_END_BIN +119 0x0015 //TX_MICBLK_FE_HOLD +120 0xFFF2 //TX_MICBLK_MR_EXP_TH +121 0xFFF2 //TX_MICBLK_LR_EXP_TH +122 0x0015 //TX_FENE_HOLD +123 0x4000 //TX_FE_ENER_TH_MTS +124 0x0004 //TX_FE_ENER_TH_EXP +125 0x6000 //TX_C_POST_FLT_MIC_MAINBLK +126 0x6000 //TX_C_POST_FLT_MIC_REFBLK +127 0x0010 //TX_MIC_BLOCK_N +128 0x7E56 //TX_A_HP +129 0x4000 //TX_B_PE +130 0x1800 //TX_THR_PITCH_DET_0 +131 0x1000 //TX_THR_PITCH_DET_1 +132 0x0800 //TX_THR_PITCH_DET_2 +133 0x0008 //TX_PITCH_BFR_LEN +134 0x0003 //TX_SBD_PITCH_DET +135 0x0050 //TX_TD_AEC_L +136 0x4000 //TX_MU0_UNP_TD_AEC +137 0x1000 //TX_MU0_PTD_TD_AEC +138 0x0000 //TX_PP_RESRV_0 +139 0x2A94 //TX_PP_RESRV_1 +140 0x55F0 //TX_PP_RESRV_2 +141 0x0000 //TX_PP_RESRV_3 +142 0x0000 //TX_PP_RESRV_4 +143 0x0000 //TX_PP_RESRV_5 +144 0x0000 //TX_PP_RESRV_6 +145 0x0000 //TX_PP_RESRV_7 +146 0x0028 //TX_TAIL_LENGTH +147 0x0300 //TX_AEC_REF_GAIN_0 +148 0x0800 //TX_AEC_REF_GAIN_1 +149 0x0800 //TX_AEC_REF_GAIN_2 +150 0x7A00 //TX_EAD_THR +151 0x1000 //TX_THR_RE_EST +152 0x0800 //TX_MIN_EQ_RE_EST_0 +153 0x2000 //TX_MIN_EQ_RE_EST_1 +154 0x2000 //TX_MIN_EQ_RE_EST_2 +155 0x4000 //TX_MIN_EQ_RE_EST_3 +156 0x4000 //TX_MIN_EQ_RE_EST_4 +157 0x7FFF //TX_MIN_EQ_RE_EST_5 +158 0x7FFF //TX_MIN_EQ_RE_EST_6 +159 0x7FFF //TX_MIN_EQ_RE_EST_7 +160 0x7FFF //TX_MIN_EQ_RE_EST_8 +161 0x7FFF //TX_MIN_EQ_RE_EST_9 +162 0x7FFF //TX_MIN_EQ_RE_EST_10 +163 0x7FFF //TX_MIN_EQ_RE_EST_11 +164 0x7FFF //TX_MIN_EQ_RE_EST_12 +165 0x4000 //TX_LAMBDA_RE_EST +166 0x0CCD //TX_LAMBDA_CB_NLE +167 0x2000 //TX_C_POST_FLT +168 0x7FFF //TX_GAIN_NP +169 0x0180 //TX_SE_HOLD_N +170 0x00C8 //TX_DT_HOLD_N +171 0x09C4 //TX_DT2_HOLD_N +172 0x6666 //TX_AEC_RESRV_0 +173 0x0000 //TX_AEC_RESRV_1 +174 0x0014 //TX_AEC_RESRV_2 +175 0x0000 //TX_MIC_DELAY_LENGTH +176 0x0000 //TX_REF_DELAY_LENGTH +177 0x0000 //TX_ADD_LINEIN_GAINL +178 0x0000 //TX_ADD_LINEIN_GAINH +179 0x0000 //TX_MIN_EQ_RE_EST_14 +180 0x0000 //TX_DTD_THR1_8 +181 0x7FFF //TX_DTD_THR2_8 +182 0x0000 //TX_DTD_MIC_BLK2 +183 0x0008 //TX_FRQ_LIN_LEN +184 0x7FFF //TX_FRQ_AEC_LEN_RHO +185 0x6000 //TX_MU0_UNP_FRQ_AEC +186 0x4000 //TX_MU0_PTD_FRQ_AEC +187 0x000A //TX_MINENOISETH +188 0x0800 //TX_MU0_RE_EST +189 0x0001 //TX_AEC_NUM_CH +190 0x0000 //TX_BIGECHOATTENUATION_MAX +191 0x2000 //TX_A_POST_FLT_MICBLK +192 0x0000 //TX_BLKENERTH +193 0x0000 //TX_BLKENERHIGHTH +194 0x0000 //TX_NORMENERTH +195 0x0000 //TX_NORMENERHIGHTH +196 0x0000 //TX_NORMENERHIGHTHL +197 0x7D00 //TX_DTD_THR1_0 +198 0x7FF0 //TX_DTD_THR1_1 +199 0x7FF0 //TX_DTD_THR1_2 +200 0x7FF0 //TX_DTD_THR1_3 +201 0x7FF0 //TX_DTD_THR1_4 +202 0x7FF0 //TX_DTD_THR1_5 +203 0x7FF0 //TX_DTD_THR1_6 +204 0x0CCD //TX_DTD_THR2_0 +205 0x0CCD //TX_DTD_THR2_1 +206 0x0CCD //TX_DTD_THR2_2 +207 0x0CCD //TX_DTD_THR2_3 +208 0x0CCD //TX_DTD_THR2_4 +209 0x0CCD //TX_DTD_THR2_5 +210 0x0CCD //TX_DTD_THR2_6 +211 0x7FFF //TX_DTD_THR3 +212 0x0000 //TX_SPK_CUT_K +213 0x0DAC //TX_DT_CUT_K +214 0x0020 //TX_DT_CUT_THR +215 0x04EB //TX_COMFORT_G +216 0x01F4 //TX_POWER_YOUT_TH +217 0x4000 //TX_FDPFGAINECHO +218 0x0000 //TX_DTD_HD_THR +219 0x0000 //TX_SPK_CUT_K_S +220 0x7FFF //TX_DTD_MIC_BLK +221 0x023E //TX_ADPT_STRICT_L +222 0x023E //TX_ADPT_STRICT_H +223 0x0BB8 //TX_RATIO_DT_L_TH_LOW +224 0x3A98 //TX_RATIO_DT_H_TH_LOW +225 0x1770 //TX_RATIO_DT_L_TH_HIGH +226 0x4E20 //TX_RATIO_DT_H_TH_HIGH +227 0x09C4 //TX_RATIO_DT_L0_TH +228 0x2000 //TX_B_POST_FILT_ECHO_L +229 0x2000 //TX_B_POST_FILT_ECHO_H +230 0x0200 //TX_MIN_G_CTRL_ECHO +231 0x1000 //TX_B_LESSCUT_RTO_ECHO +232 0x0063 //TX_EPD_OFFSET_00 +233 0x0000 //TX_EPD_OFFST_01 +234 0x1388 //TX_RATIO_DT_L0_TH_HIGH +235 0x3A98 //TX_RATIO_DT_H_TH_CUT +236 0x7FFF //TX_MIN_EQ_RE_EST_13 +237 0x0000 //TX_DTD_THR1_7 +238 0x0000 //TX_DTD_THR2_7 +239 0x0800 //TX_DT_RESRV_7 +240 0x0800 //TX_DT_RESRV_8 +241 0x0000 //TX_DT_RESRV_9 +242 0xF800 //TX_THR_SN_EST_0 +243 0xFA00 //TX_THR_SN_EST_1 +244 0xFA00 //TX_THR_SN_EST_2 +245 0xFB00 //TX_THR_SN_EST_3 +246 0xFA00 //TX_THR_SN_EST_4 +247 0xFA00 //TX_THR_SN_EST_5 +248 0xF800 //TX_THR_SN_EST_6 +249 0xF800 //TX_THR_SN_EST_7 +250 0x0100 //TX_DELTA_THR_SN_EST_0 +251 0x0100 //TX_DELTA_THR_SN_EST_1 +252 0x0200 //TX_DELTA_THR_SN_EST_2 +253 0x0100 //TX_DELTA_THR_SN_EST_3 +254 0x0100 //TX_DELTA_THR_SN_EST_4 +255 0x0200 //TX_DELTA_THR_SN_EST_5 +256 0x0200 //TX_DELTA_THR_SN_EST_6 +257 0x0200 //TX_DELTA_THR_SN_EST_7 +258 0x4000 //TX_LAMBDA_NN_EST_0 +259 0x4000 //TX_LAMBDA_NN_EST_1 +260 0x4000 //TX_LAMBDA_NN_EST_2 +261 0x4000 //TX_LAMBDA_NN_EST_3 +262 0x4000 //TX_LAMBDA_NN_EST_4 +263 0x4000 //TX_LAMBDA_NN_EST_5 +264 0x4000 //TX_LAMBDA_NN_EST_6 +265 0x4000 //TX_LAMBDA_NN_EST_7 +266 0x0400 //TX_N_SN_EST +267 0x001E //TX_INBEAM_T +268 0x0041 //TX_INBEAMHOLDT +269 0x2000 //TX_G_STRICT +270 0x2000 //TX_EQ_THR_BF +271 0x799A //TX_LAMBDA_EQ_BF +272 0x1000 //TX_NE_RTO_TH +273 0x0400 //TX_NE_RTO_TH_L +274 0x0800 //TX_MAINREFRTOH_TH_H +275 0x0800 //TX_MAINREFRTOH_TH_L +276 0x0800 //TX_MAINREFRTO_TH_H +277 0x0800 //TX_MAINREFRTO_TH_L +278 0x0200 //TX_MAINREFRTO_TH_EQ +279 0x2000 //TX_B_POST_FLT_0 +280 0x1000 //TX_B_POST_FLT_1 +281 0x0010 //TX_NS_LVL_CTRL_0 +282 0x0014 //TX_NS_LVL_CTRL_1 +283 0x0018 //TX_NS_LVL_CTRL_2 +284 0x0016 //TX_NS_LVL_CTRL_3 +285 0x0014 //TX_NS_LVL_CTRL_4 +286 0x0011 //TX_NS_LVL_CTRL_5 +287 0x0014 //TX_NS_LVL_CTRL_6 +288 0x0011 //TX_NS_LVL_CTRL_7 +289 0x000F //TX_MIN_GAIN_S_0 +290 0x0010 //TX_MIN_GAIN_S_1 +291 0x0010 //TX_MIN_GAIN_S_2 +292 0x0010 //TX_MIN_GAIN_S_3 +293 0x0010 //TX_MIN_GAIN_S_4 +294 0x0010 //TX_MIN_GAIN_S_5 +295 0x0010 //TX_MIN_GAIN_S_6 +296 0x000F //TX_MIN_GAIN_S_7 +297 0x6000 //TX_NMOS_SUP +298 0x0000 //TX_NS_MAX_PRI_SNR_TH +299 0x0000 //TX_NMOS_SUP_MENSA +300 0x7FFF //TX_SNRI_SUP_0 +301 0x4000 //TX_SNRI_SUP_1 +302 0x4000 //TX_SNRI_SUP_2 +303 0x4000 //TX_SNRI_SUP_3 +304 0x4000 //TX_SNRI_SUP_4 +305 0x50C0 //TX_SNRI_SUP_5 +306 0x4000 //TX_SNRI_SUP_6 +307 0x7FFF //TX_SNRI_SUP_7 +308 0x7FFF //TX_THR_LFNS +309 0x0018 //TX_G_LFNS +310 0x09C4 //TX_GAIN0_NTH +311 0x000A //TX_MUSIC_MORENS +312 0x7FFF //TX_A_POST_FILT_0 +313 0x2000 //TX_A_POST_FILT_1 +314 0x5000 //TX_A_POST_FILT_S_0 +315 0x4C00 //TX_A_POST_FILT_S_1 +316 0x4000 //TX_A_POST_FILT_S_2 +317 0x6000 //TX_A_POST_FILT_S_3 +318 0x4000 //TX_A_POST_FILT_S_4 +319 0x5000 //TX_A_POST_FILT_S_5 +320 0x6000 //TX_A_POST_FILT_S_6 +321 0x7000 //TX_A_POST_FILT_S_7 +322 0x2000 //TX_B_POST_FILT_0 +323 0x2000 //TX_B_POST_FILT_1 +324 0x2000 //TX_B_POST_FILT_2 +325 0x4000 //TX_B_POST_FILT_3 +326 0x4000 //TX_B_POST_FILT_4 +327 0x1000 //TX_B_POST_FILT_5 +328 0x1000 //TX_B_POST_FILT_6 +329 0x2000 //TX_B_POST_FILT_7 +330 0x4000 //TX_B_LESSCUT_RTO_S_0 +331 0x7FFF //TX_B_LESSCUT_RTO_S_1 +332 0x7FFF //TX_B_LESSCUT_RTO_S_2 +333 0x7FFF //TX_B_LESSCUT_RTO_S_3 +334 0x7FFF //TX_B_LESSCUT_RTO_S_4 +335 0x6000 //TX_B_LESSCUT_RTO_S_5 +336 0x7FFF //TX_B_LESSCUT_RTO_S_6 +337 0x7FFF //TX_B_LESSCUT_RTO_S_7 +338 0x7C00 //TX_LAMBDA_PFILT +339 0x7C00 //TX_LAMBDA_PFILT_S_0 +340 0x7C00 //TX_LAMBDA_PFILT_S_1 +341 0x7A00 //TX_LAMBDA_PFILT_S_2 +342 0x7C00 //TX_LAMBDA_PFILT_S_3 +343 0x7C00 //TX_LAMBDA_PFILT_S_4 +344 0x7C00 //TX_LAMBDA_PFILT_S_5 +345 0x7C00 //TX_LAMBDA_PFILT_S_6 +346 0x7C00 //TX_LAMBDA_PFILT_S_7 +347 0x0000 //TX_K_PEPPER +348 0x0800 //TX_A_PEPPER +349 0x1EAA //TX_K_PEPPER_HF +350 0x0600 //TX_A_PEPPER_HF +351 0x0001 //TX_HMNC_BST_FLG +352 0x0200 //TX_HMNC_BST_THR +353 0x0200 //TX_DT_BINVAD_TH_0 +354 0x0200 //TX_DT_BINVAD_TH_1 +355 0x0200 //TX_DT_BINVAD_TH_2 +356 0x0200 //TX_DT_BINVAD_TH_3 +357 0x1F40 //TX_DT_BINVAD_ENDF +358 0x0100 //TX_C_POST_FLT_DT +359 0x0CCD //TX_NS_B_POST_FLT_LESSCUT +360 0x0100 //TX_DT_BOOST +361 0x0000 //TX_BF_SGRAD_FLG +362 0x0005 //TX_BF_DVG_TH +363 0x001E //TX_SN_C_F +364 0x0000 //TX_K_APT +365 0x0001 //TX_NOISEDET +366 0x0064 //TX_NDETCT +367 0x0050 //TX_NOISE_TH_0 +368 0x7FFF //TX_NOISE_TH_0_2 +369 0x7FFF //TX_NOISE_TH_0_3 +370 0x07D0 //TX_NOISE_TH_1 +371 0x0DAC //TX_NOISE_TH_2 +372 0x4E20 //TX_NOISE_TH_3 +373 0x4E20 //TX_NOISE_TH_4 +374 0x59D8 //TX_NOISE_TH_5 +375 0x7FFF //TX_NOISE_TH_5_2 +376 0x0000 //TX_NOISE_TH_5_3 +377 0x7FFF //TX_NOISE_TH_5_4 +378 0x2710 //TX_NOISE_TH_6 +379 0x0033 //TX_MINENOISE_TH +380 0xD508 //TX_MORENS_TFMASK_TH +381 0x0001 //TX_DRC_QUIET_FLOOR +382 0x7999 //TX_RATIODTL_CUT_TH +383 0x0119 //TX_DT_CUT_K1 +384 0x0666 //TX_OUT_ENER_S_TH_CLEAN +385 0x0666 //TX_OUT_ENER_S_TH_LESSCLEAN +386 0x0333 //TX_OUT_ENER_S_TH_NOISY +387 0x019A //TX_OUT_ENER_TH_NOISE +388 0x0333 //TX_OUT_ENER_TH_SPEECH +389 0x2000 //TX_SN_NPB_GAIN +390 0x0000 //TX_NN_NPB_GAIN +391 0x7FFF //TX_POST_MASK_SUP_HSNE +392 0x1388 //TX_TAIL_DET_TH +393 0x4000 //TX_B_LESSCUT_RTO_WTA +394 0x0000 //TX_MEL_G_R +395 0x0080 //TX_SUPHIGH_TH +396 0x0000 //TX_MASK_G_R +397 0x0002 //TX_EXTRA_NS_L +398 0x1800 //TX_C_POST_FLT_MASK +399 0x4000 //TX_A_POST_FLT_WNS +400 0x0148 //TX_MIN_G_LOW300HZ +401 0x0002 //TX_MAXLEVEL_CNG +402 0x00B4 //TX_STN_NOISE_TH +403 0x4000 //TX_POST_MASK_SUP +404 0x7FFF //TX_POST_MASK_ADJUST +405 0x00C8 //TX_NS_ENOISE_MIC0_TH +406 0x0033 //TX_MINENOISE_MIC0_TH +407 0x012C //TX_MINENOISE_MIC0_S_TH +408 0x7FFF //TX_MIN_G_CTRL_SSNS +409 0x0000 //TX_METAL_RTO_THR +410 0x4848 //TX_NS_FP_K_METAL +411 0x3A98 //TX_NOISEDET_BOOST_TH +412 0x0FA0 //TX_NSMOOTH_TH +413 0x0000 //TX_NS_RESRV_8 +414 0x1800 //TX_RHO_UPB +415 0x0BB8 //TX_N_HOLD_HS +416 0x0050 //TX_N_RHO_BFR0 +417 0x7FFF //TX_LAMBDA_ARSP_EST +418 0x0100 //TX_EXTRA_GAIN_MICBLOCK +419 0x0CCD //TX_THR_STD_NSR +420 0x019A //TX_THR_STD_PLH +421 0x2AF8 //TX_N_HOLD_STD +422 0x0066 //TX_THR_STD_RHO +423 0x2000 //TX_BF_RESET_THR_HS +424 0x09C4 //TX_SB_RTO_MEAN_TH +425 0x0000 //TX_SB_RHO_MEAN_TH_NTALK +426 0x3800 //TX_SB_RTO_MEAN_TH_ABN +427 0x2EE0 //TX_SB_RTO_MEAN_TH_RUB +428 0x0000 //TX_WTA_EN_RTO_TH +429 0x0000 //TX_TOP_ENER_TH_F +430 0x0000 //TX_DESIRED_TALK_HOLDT +431 0x0800 //TX_MIC_BLOCK_FACTOR +432 0x0000 //TX_NSEST_BFRLRNRDC +433 0x0000 //TX_THR_POST_FLT_HS +434 0x0010 //TX_HS_VAD_BIN +435 0x2666 //TX_THR_VAD_HS +436 0x2CCD //TX_MEAN_RTO_MIN_TH2 +437 0x0032 //TX_SILENCE_T +438 0x0000 //TX_A_POST_FLT_WTA +439 0x799A //TX_LAMBDA_PFLT_WTA +440 0x0000 //TX_SB_RHO_MEAN2_TH +441 0x0190 //TX_SB_RHO_MEAN3_TH +442 0x0000 //TX_HS_RESRV_4 +443 0x0000 //TX_HS_RESRV_5 +444 0x003C //TX_DOA_VAD_THR_1 +445 0x0000 //TX_DOA_VAD_THR_2 +446 0x0028 //TX_DOA_VAD_THR1_0 +447 0x0028 //TX_DOA_VAD_THR1_1 +448 0x0000 //TX_SRC_DOA_RNG_LOW_0A +449 0x00B4 //TX_SRC_DOA_RNG_HIGH_0A +450 0x005A //TX_DFLT_SRC_DOA_0A +451 0x0000 //TX_SRC_DOA_RNG_LOW_0B +452 0x0000 //TX_SRC_DOA_RNG_HIGH_0B +453 0x0000 //TX_DFLT_SRC_DOA_0B +454 0x0000 //TX_SRC_DOA_RNG_LOW_0C +455 0x0000 //TX_SRC_DOA_RNG_HIGH_0C +456 0x0000 //TX_DFLT_SRC_DOA_0C +457 0x0000 //TX_SRC_DOA_RNG_LOW_0D +458 0x0000 //TX_SRC_DOA_RNG_HIGH_0D +459 0x0000 //TX_DFLT_SRC_DOA_0D +460 0x0000 //TX_SRC_DOA_RNG_LOW_1A +461 0x00B4 //TX_SRC_DOA_RNG_HIGH_1A +462 0x005A //TX_DFLT_SRC_DOA_1A +463 0x0000 //TX_SRC_DOA_RNG_LOW_1B +464 0x00B4 //TX_SRC_DOA_RNG_HIGH_1B +465 0x005A //TX_DFLT_SRC_DOA_1B +466 0x0000 //TX_SRC_DOA_RNG_LOW_1C +467 0x00B4 //TX_SRC_DOA_RNG_HIGH_1C +468 0x005A //TX_DFLT_SRC_DOA_1C +469 0x0000 //TX_SRC_DOA_RNG_LOW_1D +470 0x00B4 //TX_SRC_DOA_RNG_HIGH_1D +471 0x005A //TX_DFLT_SRC_DOA_1D +472 0x0100 //TX_BF_HOLDOFF_T +473 0x7FFF //TX_DOA_COST_FACTOR +474 0x4000 //TX_MAINTOREFR_TH0 +475 0x071C //TX_DOA_TRK_THR +476 0x012C //TX_DOA_TRACK_HT +477 0x0200 //TX_N1_HOLD_HF +478 0x0100 //TX_N2_HOLD_HF +479 0x3000 //TX_BF_RESET_THR_HF +480 0x7333 //TX_DOA_SMOOTH +481 0x0800 //TX_MU_BF +482 0x0800 //TX_BF_MU_LF_B2 +483 0x0040 //TX_BF_FC_END_BIN_B2 +484 0x0020 //TX_BF_FC_END_BIN +485 0x0000 //TX_HF_RESRV_25 +486 0x0000 //TX_HF_RESRV_26 +487 0x0007 //TX_N_DOA_SEED +488 0x0001 //TX_FINE_DOA_SEARCH_FLG +489 0x0000 //TX_HF_RESRV_27 +490 0x038E //TX_DLT_SRC_DOA_RNG +491 0x0200 //TX_BF_MU_LF +492 0x0000 //TX_DFLT_SRC_LOC_0 +493 0x7FFF //TX_DFLT_SRC_LOC_1 +494 0x0000 //TX_DFLT_SRC_LOC_2 +495 0x038E //TX_DOA_TRACK_VADTH +496 0x0000 //TX_DOA_TRACK_NEW +497 0x0230 //TX_NOR_OFF_THR +498 0x0CCD //TX_MORE_ON_700HZ_THR +499 0x2000 //TX_MU_BF_ADPT_NS +500 0x0000 //TX_ADAPT_LEN +501 0x2000 //TX_MORE_SNS +502 0x0000 //TX_NOR_OFF_TH1 +503 0x0000 //TX_WIDE_MASK_TH +504 0x4650 //TX_SUBSNRATIOHIGH4MEANBCK_THR +505 0x7FFF //TX_C_POST_FLT_CUT +506 0x2000 //TX_RADIODTLV +507 0x0320 //TX_POWER_LINEIN_TH +508 0x0014 //TX_FE_VADCOUNT_TH_FC +509 0x0000 //TX_ECHO_SUPP_FC +510 0x0C80 //TX_ECHO_TH +511 0x6666 //TX_MIC_TO_BFGAIN +512 0x0000 //TX_MICTOBFGAIN0 +513 0x0000 //TX_FASTMUE_TH +514 0x3000 //TX_DEREVERB_LF_MU +515 0x34CD //TX_DEREVERB_HF_MU +516 0x0007 //TX_DEREVERB_DELAY +517 0x0004 //TX_DEREVERB_COEF_LEN +518 0x0003 //TX_DEREVERB_DNR +519 0x0000 //TX_DEREVERB_ALPHA +520 0x0000 //TX_DEREVERB_BETA +521 0x3A98 //TX_GSC_RTOL_TH +522 0x3A98 //TX_GSC_RTOH_TH +523 0x7E2C //TX_WIDE2_MEANHTH +524 0x0000 //TX_DR_RESRV_5 +525 0x0000 //TX_DR_RESRV_6 +526 0x0000 //TX_DR_RESRV_7 +527 0x0000 //TX_DR_RESRV_8 +528 0x1333 //TX_WIND_MARK_TH +529 0x399A //TX_CORR_THR +530 0x0004 //TX_SNR_THR +531 0x0010 //TX_ENGY_THR +532 0x1770 //TX_CORR_HIGH_TH +533 0x6000 //TX_ENGY_THR_2 +534 0x3400 //TX_MEAN_RTO_THR +535 0x0028 //TX_WNS_ENOISE_MIC0_TH +536 0x3000 //TX_RATIOMICL_TH +537 0x64CD //TX_CALIG_HS +538 0x0000 //TX_LVL_CTRL +539 0x0014 //TX_WIND_SUPRTO +540 0x000A //TX_WNS_MIN_G +541 0x0000 //TX_WNS_B_POST_FLT +542 0x2800 //TX_RATIOMICH_TH +543 0xD120 //TX_WIND_INBEAM_L_TH +544 0x0FA0 //TX_WIND_INBEAM_H_TH +545 0x2000 //TX_WNS_RESRV_0 +546 0x59D8 //TX_WNS_RESRV_1 +547 0x0000 //TX_WNS_RESRV_2 +548 0x0000 //TX_WNS_RESRV_3 +549 0x0000 //TX_WNS_RESRV_4 +550 0x0000 //TX_WNS_RESRV_5 +551 0x0000 //TX_WNS_RESRV_6 +552 0x0000 //TX_PB_B_POST_FLT_LESSCUT +553 0x0070 //TX_BF_LESSCUT_BBIN +554 0x0070 //TX_BF_LESSCUT_EBIN +555 0x0010 //TX_POSTBFB0 +556 0x0070 //TX_POSTBFB +557 0x00B0 //TX_POSTBFE +558 0x0E66 //TX_SPEECH_SNR_TH +559 0x0050 //TX_PB_MAX_PRI_SNR_TH +560 0x770A //TX_MAX_PRI_SNR_TH_L +561 0x0000 //TX_PFGAIN +562 0x0000 //TX_MAINTOREFR_TH +563 0x0000 //TX_SAM_MARK +564 0x0000 //TX_PB_RESRV_0 +565 0x0000 //TX_PB_RESRV_1 +566 0x0020 //TX_FDEQ_SUBNUM +567 0x4848 //TX_FDEQ_GAIN_0 +568 0x4848 //TX_FDEQ_GAIN_1 +569 0x4848 //TX_FDEQ_GAIN_2 +570 0x4848 //TX_FDEQ_GAIN_3 +571 0x4848 //TX_FDEQ_GAIN_4 +572 0x4848 //TX_FDEQ_GAIN_5 +573 0x4848 //TX_FDEQ_GAIN_6 +574 0x4848 //TX_FDEQ_GAIN_7 +575 0x4848 //TX_FDEQ_GAIN_8 +576 0x4853 //TX_FDEQ_GAIN_9 +577 0x5450 //TX_FDEQ_GAIN_10 +578 0x7465 //TX_FDEQ_GAIN_11 +579 0x807F //TX_FDEQ_GAIN_12 +580 0x82C4 //TX_FDEQ_GAIN_13 +581 0xC4C4 //TX_FDEQ_GAIN_14 +582 0xC4C4 //TX_FDEQ_GAIN_15 +583 0x4848 //TX_FDEQ_GAIN_16 +584 0x4848 //TX_FDEQ_GAIN_17 +585 0x4848 //TX_FDEQ_GAIN_18 +586 0x4848 //TX_FDEQ_GAIN_19 +587 0x4848 //TX_FDEQ_GAIN_20 +588 0x4848 //TX_FDEQ_GAIN_21 +589 0x4848 //TX_FDEQ_GAIN_22 +590 0x4848 //TX_FDEQ_GAIN_23 +591 0x0202 //TX_FDEQ_BIN_0 +592 0x0203 //TX_FDEQ_BIN_1 +593 0x0304 //TX_FDEQ_BIN_2 +594 0x0405 //TX_FDEQ_BIN_3 +595 0x0607 //TX_FDEQ_BIN_4 +596 0x0809 //TX_FDEQ_BIN_5 +597 0x0A0B //TX_FDEQ_BIN_6 +598 0x0C0D //TX_FDEQ_BIN_7 +599 0x0E0F //TX_FDEQ_BIN_8 +600 0x1011 //TX_FDEQ_BIN_9 +601 0x1214 //TX_FDEQ_BIN_10 +602 0x1618 //TX_FDEQ_BIN_11 +603 0x1C1C //TX_FDEQ_BIN_12 +604 0x2020 //TX_FDEQ_BIN_13 +605 0x2020 //TX_FDEQ_BIN_14 +606 0x2011 //TX_FDEQ_BIN_15 +607 0x0000 //TX_FDEQ_BIN_16 +608 0x0000 //TX_FDEQ_BIN_17 +609 0x0000 //TX_FDEQ_BIN_18 +610 0x0000 //TX_FDEQ_BIN_19 +611 0x0000 //TX_FDEQ_BIN_20 +612 0x0000 //TX_FDEQ_BIN_21 +613 0x0000 //TX_FDEQ_BIN_22 +614 0x0000 //TX_FDEQ_BIN_23 +615 0x0000 //TX_FDEQ_PADDING +616 0x0020 //TX_PREEQ_SUBNUM_MIC0 +617 0x4848 //TX_PREEQ_GAIN_MIC0_0 +618 0x4848 //TX_PREEQ_GAIN_MIC0_1 +619 0x4848 //TX_PREEQ_GAIN_MIC0_2 +620 0x4848 //TX_PREEQ_GAIN_MIC0_3 +621 0x4848 //TX_PREEQ_GAIN_MIC0_4 +622 0x4848 //TX_PREEQ_GAIN_MIC0_5 +623 0x4A4C //TX_PREEQ_GAIN_MIC0_6 +624 0x4E50 //TX_PREEQ_GAIN_MIC0_7 +625 0x5456 //TX_PREEQ_GAIN_MIC0_8 +626 0x585C //TX_PREEQ_GAIN_MIC0_9 +627 0x5C64 //TX_PREEQ_GAIN_MIC0_10 +628 0x7478 //TX_PREEQ_GAIN_MIC0_11 +629 0x705C //TX_PREEQ_GAIN_MIC0_12 +630 0x4838 //TX_PREEQ_GAIN_MIC0_13 +631 0x3C70 //TX_PREEQ_GAIN_MIC0_14 +632 0x4848 //TX_PREEQ_GAIN_MIC0_15 +633 0x4848 //TX_PREEQ_GAIN_MIC0_16 +634 0x4848 //TX_PREEQ_GAIN_MIC0_17 +635 0x4848 //TX_PREEQ_GAIN_MIC0_18 +636 0x4848 //TX_PREEQ_GAIN_MIC0_19 +637 0x4848 //TX_PREEQ_GAIN_MIC0_20 +638 0x4848 //TX_PREEQ_GAIN_MIC0_21 +639 0x4848 //TX_PREEQ_GAIN_MIC0_22 +640 0x4848 //TX_PREEQ_GAIN_MIC0_23 +641 0x0202 //TX_PREEQ_BIN_MIC0_0 +642 0x0203 //TX_PREEQ_BIN_MIC0_1 +643 0x0303 //TX_PREEQ_BIN_MIC0_2 +644 0x0304 //TX_PREEQ_BIN_MIC0_3 +645 0x0405 //TX_PREEQ_BIN_MIC0_4 +646 0x0506 //TX_PREEQ_BIN_MIC0_5 +647 0x0708 //TX_PREEQ_BIN_MIC0_6 +648 0x0909 //TX_PREEQ_BIN_MIC0_7 +649 0x090B //TX_PREEQ_BIN_MIC0_8 +650 0x0C10 //TX_PREEQ_BIN_MIC0_9 +651 0x1013 //TX_PREEQ_BIN_MIC0_10 +652 0x1414 //TX_PREEQ_BIN_MIC0_11 +653 0x1414 //TX_PREEQ_BIN_MIC0_12 +654 0x1C1E //TX_PREEQ_BIN_MIC0_13 +655 0x1E28 //TX_PREEQ_BIN_MIC0_14 +656 0x462C //TX_PREEQ_BIN_MIC0_15 +657 0x0000 //TX_PREEQ_BIN_MIC0_16 +658 0x0000 //TX_PREEQ_BIN_MIC0_17 +659 0x0000 //TX_PREEQ_BIN_MIC0_18 +660 0x0000 //TX_PREEQ_BIN_MIC0_19 +661 0x0000 //TX_PREEQ_BIN_MIC0_20 +662 0x0000 //TX_PREEQ_BIN_MIC0_21 +663 0x0000 //TX_PREEQ_BIN_MIC0_22 +664 0x0000 //TX_PREEQ_BIN_MIC0_23 +665 0x0030 //TX_PREEQ_SUBNUM_MIC1 +666 0x4848 //TX_PREEQ_GAIN_MIC1_0 +667 0x4848 //TX_PREEQ_GAIN_MIC1_1 +668 0x4848 //TX_PREEQ_GAIN_MIC1_2 +669 0x4848 //TX_PREEQ_GAIN_MIC1_3 +670 0x4848 //TX_PREEQ_GAIN_MIC1_4 +671 0x4848 //TX_PREEQ_GAIN_MIC1_5 +672 0x4848 //TX_PREEQ_GAIN_MIC1_6 +673 0x4848 //TX_PREEQ_GAIN_MIC1_7 +674 0x4848 //TX_PREEQ_GAIN_MIC1_8 +675 0x4848 //TX_PREEQ_GAIN_MIC1_9 +676 0x4848 //TX_PREEQ_GAIN_MIC1_10 +677 0x4848 //TX_PREEQ_GAIN_MIC1_11 +678 0x4848 //TX_PREEQ_GAIN_MIC1_12 +679 0x4848 //TX_PREEQ_GAIN_MIC1_13 +680 0x4848 //TX_PREEQ_GAIN_MIC1_14 +681 0x4848 //TX_PREEQ_GAIN_MIC1_15 +682 0x4848 //TX_PREEQ_GAIN_MIC1_16 +683 0x4848 //TX_PREEQ_GAIN_MIC1_17 +684 0x4848 //TX_PREEQ_GAIN_MIC1_18 +685 0x4848 //TX_PREEQ_GAIN_MIC1_19 +686 0x4848 //TX_PREEQ_GAIN_MIC1_20 +687 0x4848 //TX_PREEQ_GAIN_MIC1_21 +688 0x4848 //TX_PREEQ_GAIN_MIC1_22 +689 0x4848 //TX_PREEQ_GAIN_MIC1_23 +690 0x1812 //TX_PREEQ_BIN_MIC1_0 +691 0x0A0A //TX_PREEQ_BIN_MIC1_1 +692 0x0808 //TX_PREEQ_BIN_MIC1_2 +693 0x080A //TX_PREEQ_BIN_MIC1_3 +694 0x0B09 //TX_PREEQ_BIN_MIC1_4 +695 0x0A06 //TX_PREEQ_BIN_MIC1_5 +696 0x0606 //TX_PREEQ_BIN_MIC1_6 +697 0x0605 //TX_PREEQ_BIN_MIC1_7 +698 0x050A //TX_PREEQ_BIN_MIC1_8 +699 0x1505 //TX_PREEQ_BIN_MIC1_9 +700 0x0506 //TX_PREEQ_BIN_MIC1_10 +701 0x0615 //TX_PREEQ_BIN_MIC1_11 +702 0x1516 //TX_PREEQ_BIN_MIC1_12 +703 0x2021 //TX_PREEQ_BIN_MIC1_13 +704 0x2021 //TX_PREEQ_BIN_MIC1_14 +705 0x2021 //TX_PREEQ_BIN_MIC1_15 +706 0x0800 //TX_PREEQ_BIN_MIC1_16 +707 0x0000 //TX_PREEQ_BIN_MIC1_17 +708 0x0000 //TX_PREEQ_BIN_MIC1_18 +709 0x0000 //TX_PREEQ_BIN_MIC1_19 +710 0x0000 //TX_PREEQ_BIN_MIC1_20 +711 0x0000 //TX_PREEQ_BIN_MIC1_21 +712 0x0000 //TX_PREEQ_BIN_MIC1_22 +713 0x0000 //TX_PREEQ_BIN_MIC1_23 +714 0x0020 //TX_PREEQ_SUBNUM_MIC2 +715 0x4848 //TX_PREEQ_GAIN_MIC2_0 +716 0x4848 //TX_PREEQ_GAIN_MIC2_1 +717 0x4848 //TX_PREEQ_GAIN_MIC2_2 +718 0x4848 //TX_PREEQ_GAIN_MIC2_3 +719 0x4848 //TX_PREEQ_GAIN_MIC2_4 +720 0x4848 //TX_PREEQ_GAIN_MIC2_5 +721 0x4848 //TX_PREEQ_GAIN_MIC2_6 +722 0x4848 //TX_PREEQ_GAIN_MIC2_7 +723 0x4848 //TX_PREEQ_GAIN_MIC2_8 +724 0x4848 //TX_PREEQ_GAIN_MIC2_9 +725 0x4848 //TX_PREEQ_GAIN_MIC2_10 +726 0x4848 //TX_PREEQ_GAIN_MIC2_11 +727 0x4848 //TX_PREEQ_GAIN_MIC2_12 +728 0x4848 //TX_PREEQ_GAIN_MIC2_13 +729 0x4848 //TX_PREEQ_GAIN_MIC2_14 +730 0x4848 //TX_PREEQ_GAIN_MIC2_15 +731 0x4848 //TX_PREEQ_GAIN_MIC2_16 +732 0x4848 //TX_PREEQ_GAIN_MIC2_17 +733 0x4848 //TX_PREEQ_GAIN_MIC2_18 +734 0x4848 //TX_PREEQ_GAIN_MIC2_19 +735 0x4848 //TX_PREEQ_GAIN_MIC2_20 +736 0x4848 //TX_PREEQ_GAIN_MIC2_21 +737 0x4848 //TX_PREEQ_GAIN_MIC2_22 +738 0x4848 //TX_PREEQ_GAIN_MIC2_23 +739 0x0E10 //TX_PREEQ_BIN_MIC2_0 +740 0x1010 //TX_PREEQ_BIN_MIC2_1 +741 0x1010 //TX_PREEQ_BIN_MIC2_2 +742 0x1010 //TX_PREEQ_BIN_MIC2_3 +743 0x1010 //TX_PREEQ_BIN_MIC2_4 +744 0x1010 //TX_PREEQ_BIN_MIC2_5 +745 0x1010 //TX_PREEQ_BIN_MIC2_6 +746 0x1010 //TX_PREEQ_BIN_MIC2_7 +747 0x1010 //TX_PREEQ_BIN_MIC2_8 +748 0x1010 //TX_PREEQ_BIN_MIC2_9 +749 0x1010 //TX_PREEQ_BIN_MIC2_10 +750 0x1010 //TX_PREEQ_BIN_MIC2_11 +751 0x1010 //TX_PREEQ_BIN_MIC2_12 +752 0x1010 //TX_PREEQ_BIN_MIC2_13 +753 0x1010 //TX_PREEQ_BIN_MIC2_14 +754 0x0200 //TX_PREEQ_BIN_MIC2_15 +755 0x0000 //TX_PREEQ_BIN_MIC2_16 +756 0x0000 //TX_PREEQ_BIN_MIC2_17 +757 0x0000 //TX_PREEQ_BIN_MIC2_18 +758 0x0000 //TX_PREEQ_BIN_MIC2_19 +759 0x0000 //TX_PREEQ_BIN_MIC2_20 +760 0x0000 //TX_PREEQ_BIN_MIC2_21 +761 0x0000 //TX_PREEQ_BIN_MIC2_22 +762 0x0000 //TX_PREEQ_BIN_MIC2_23 +763 0x0006 //TX_MASKING_ABILITY +764 0x2000 //TX_NND_WEIGHT +765 0x0060 //TX_MIC_CALIBRATION_0 +766 0x0060 //TX_MIC_CALIBRATION_1 +767 0x0070 //TX_MIC_CALIBRATION_2 +768 0x0070 //TX_MIC_CALIBRATION_3 +769 0x0050 //TX_MIC_PWR_BIAS_0 +770 0x0040 //TX_MIC_PWR_BIAS_1 +771 0x0040 //TX_MIC_PWR_BIAS_2 +772 0x0040 //TX_MIC_PWR_BIAS_3 +773 0x0009 //TX_GAIN_LIMIT_0 +774 0x000F //TX_GAIN_LIMIT_1 +775 0x000F //TX_GAIN_LIMIT_2 +776 0x000F //TX_GAIN_LIMIT_3 +777 0x7F5B //TX_BVE_NOVAD0_ALPHADOWN +778 0x7FDE //TX_BVE_VAD0_ALPHAUP +779 0x7F3A //TX_BVE_VAD0_ALPHADOWN +780 0x2000 //TX_BVE_GAINWEIGHT_NOFEVADLI +781 0x7F5B //TX_BVE_FEVADLI_ALPHA +782 0x7F19 //TX_BVE_NOVAD0_ALPHAUP +783 0x0C00 //TX_TDDRC_ALPHA_UP_01 +784 0x0C00 //TX_TDDRC_ALPHA_UP_02 +785 0x0C00 //TX_TDDRC_ALPHA_UP_03 +786 0x0C00 //TX_TDDRC_ALPHA_UP_04 +787 0x7EB8 //TX_TDDRC_ALPHA_DWN_01 +788 0x7EB8 //TX_TDDRC_ALPHA_DWN_02 +789 0x7EB8 //TX_TDDRC_ALPHA_DWN_03 +790 0x7EB8 //TX_TDDRC_ALPHA_DWN_04 +791 0x7FFF //TX_TDDRC_TD_DRC_LIMIT +792 0x0800 //TX_TDDRC_POST_LIMIT_GAIN +793 0x0000 //TX_TDDRC_RESRV_0 +794 0x0000 //TX_TDDRC_RESRV_1 +795 0x0018 //TX_FDDRC_BAND_MARGIN_0 +796 0x0030 //TX_FDDRC_BAND_MARGIN_1 +797 0x0050 //TX_FDDRC_BAND_MARGIN_2 +798 0x0080 //TX_FDDRC_BAND_MARGIN_3 +799 0x0007 //TX_FDDRC_BLOCK_EXP +800 0x5000 //TX_FDDRC_THRD_2_0 +801 0x5000 //TX_FDDRC_THRD_2_1 +802 0x5000 //TX_FDDRC_THRD_2_2 +803 0x5000 //TX_FDDRC_THRD_2_3 +804 0x6400 //TX_FDDRC_THRD_3_0 +805 0x6400 //TX_FDDRC_THRD_3_1 +806 0x6400 //TX_FDDRC_THRD_3_2 +807 0x6400 //TX_FDDRC_THRD_3_3 +808 0x2000 //TX_FDDRC_SLANT_0_0 +809 0x2000 //TX_FDDRC_SLANT_0_1 +810 0x2000 //TX_FDDRC_SLANT_0_2 +811 0x2000 //TX_FDDRC_SLANT_0_3 +812 0x5333 //TX_FDDRC_SLANT_1_0 +813 0x5333 //TX_FDDRC_SLANT_1_1 +814 0x5333 //TX_FDDRC_SLANT_1_2 +815 0x5333 //TX_FDDRC_SLANT_1_3 +816 0x0010 //TX_DEADMIC_SILENCE_TH +817 0x0600 //TX_MIC_DEGRADE_TH +818 0x0078 //TX_DEADMIC_CNT +819 0x0078 //TX_MIC_DEGRADE_CNT +820 0x0000 //TX_FDDRC_RESRV_4 +821 0x0000 //TX_FDDRC_RESRV_5 +822 0x0000 //TX_FDDRC_RESRV_6 +823 0x7FFF //TX_KS_NOISEPASTE_FACTOR +824 0x0001 //TX_KS_CONFIG +825 0x7FFF //TX_KS_GAIN_MIN +826 0x0000 //TX_KS_RESRV_0 +827 0x0000 //TX_KS_RESRV_1 +828 0x0000 //TX_KS_RESRV_2 +829 0x7C00 //TX_LAMBDA_PKA_FP +830 0x2000 //TX_TPKA_FP +831 0x0080 //TX_MIN_G_FP +832 0x2000 //TX_MAX_G_FP +833 0x4848 //TX_FFP_FP_K_METAL +834 0x4000 //TX_A_POST_FLT_FP +835 0x0F5C //TX_RTO_OUTBEAM_TH +836 0x4CCD //TX_TPKA_FP_THD +837 0x0000 //TX_MAX_G_FP_BLK +838 0x0000 //TX_FFP_FADEIN +839 0x0000 //TX_FFP_FADEOUT +840 0x0000 //TX_WHISPERCTH +841 0x0000 //TX_WHISPERHOLDT +842 0x0000 //TX_WHISP_ENTHH +843 0x0000 //TX_WHISP_ENTHL +844 0x0000 //TX_WHISP_RTOTH +845 0x0000 //TX_WHISP_RTOTH2 +846 0x0096 //TX_MUTE_PERIOD +847 0x0000 //TX_FADE_IN_PERIOD +848 0x0100 //TX_FFP_RESRV_2 +849 0x0020 //TX_FFP_RESRV_3 +850 0x0000 //TX_FFP_RESRV_4 +851 0x0000 //TX_FFP_RESRV_5 +852 0x0000 //TX_FFP_RESRV_6 +853 0x0004 //TX_FILTINDX +854 0x0004 //TX_TDDRC_THRD_0 +855 0x0016 //TX_TDDRC_THRD_1 +856 0x1900 //TX_TDDRC_THRD_2 +857 0x1900 //TX_TDDRC_THRD_3 +858 0x3000 //TX_TDDRC_SLANT_0 +859 0x7B00 //TX_TDDRC_SLANT_1 +860 0x0C00 //TX_TDDRC_ALPHA_UP_00 +861 0x7EB8 //TX_TDDRC_ALPHA_DWN_00 +862 0x0000 //TX_TDDRC_HMNC_FLAG +863 0x199A //TX_TDDRC_HMNC_GAIN +864 0x0000 //TX_TDDRC_SMT_FLAG +865 0x0CCD //TX_TDDRC_SMT_W +866 0x0A98 //TX_TDDRC_DRC_GAIN +867 0x7FFF //TX_TDDRC_LMT_THRD +868 0x0000 //TX_TDDRC_LMT_ALPHA +869 0x0000 //TX_TFMASKLTH +870 0x0000 //TX_TFMASKLTHL +871 0x0CCD //TX_TFMASKHTH +872 0x0CCD //TX_TFMASKLTH_BINVAD +873 0xF333 //TX_TFMASKLTH_NS_EST +874 0x2CCD //TX_TFMASKLTH_DOA +875 0xECCD //TX_TFMASKTH_BLESSCUT +876 0x1000 //TX_B_LESSCUT_RTO_MASK +877 0x3800 //TX_SB_RHO_MEAN_TH_ABN +878 0x2000 //TX_B_POST_FLT_MASK +879 0x0000 //TX_B_POST_FLT_MASK1 +880 0x5333 //TX_GAIN_WIND_MASK +881 0x7FFF //TX_TFMASK_BFSTRICT_MUSIC +882 0x0000 //TX_TFMASK_BFSTRICT_NOMUSIC +883 0x7333 //TX_FASTNS_OUTIN_TH +884 0x0CCD //TX_FASTNS_TFMASK_TH +885 0x0CCD //TX_FASTNS_TFMASKBIN_TH1 +886 0x0CCD //TX_FASTNS_TFMASKBIN_TH2 +887 0x0CCD //TX_FASTNS_TFMASKBIN_TH3 +888 0x0028 //TX_FASTNS_ARSPC_TH +889 0xC000 //TX_FASTNS_MASK5_TH +890 0x4848 //TX_POSTSSA_MIN_G_VR_MASK +891 0x1000 //TX_A_LESSCUT_RTO_MASK +892 0x1770 //TX_FASTNS_NOISETH +893 0xC000 //TX_FASTNS_SSA_THLFL +894 0xC000 //TX_FASTNS_SSA_THHFL +895 0xCCCC //TX_FASTNS_SSA_THLFH +896 0xD999 //TX_FASTNS_SSA_THHFH +897 0x2339 //TX_SENDFUNC_REG_MICMUTE +898 0x0021 //TX_SENDFUNC_REG_MICMUTE1 +899 0x02BC //TX_MICMUTE_RATIO_THR +900 0x0140 //TX_MICMUTE_AMP_THR +901 0x0004 //TX_MICMUTE_HPF_IND +902 0x00C0 //TX_MICMUTE_LOG_EYR_TH +903 0x0008 //TX_MICMUTE_CVG_TIME +904 0x0008 //TX_MICMUTE_RELEASE_TIME +905 0x01FE //TX_MIC_VOLUME_MIC0MUTE +906 0x0020 //TX_MICMUTE_EPD_OFFSET_0 +907 0x001E //TX_MICMUTE_FRQ_AEC_L +908 0x7999 //TX_MICMUTE_EAD_THR +909 0x7FFF //TX_MICMUTE_LAMBDA_CB_NLE +910 0x7FFF //TX_MICMUTE_LAMBDA_RE_EST +911 0x4000 //TX_DTD_THR1_MICMUTE_0 +912 0x7000 //TX_DTD_THR1_MICMUTE_1 +913 0x7FFF //TX_DTD_THR1_MICMUTE_2 +914 0x7FFF //TX_DTD_THR1_MICMUTE_3 +915 0x6CCC //TX_DTD_THR2_MICMUTE_0 +916 0x0400 //TX_MICMUTE_MIN_EQ_RE_EST_0 +917 0x0400 //TX_MICMUTE_MIN_EQ_RE_EST_1 +918 0x1000 //TX_MICMUTE_MIN_EQ_RE_EST_2 +919 0x7FFF //TX_MICMUTE_MIN_EQ_RE_EST_3 +920 0x7FFF //TX_MICMUTE_MIN_EQ_RE_EST_4 +921 0x4000 //TX_MICMUTE_C_POST_FLT +922 0x03E8 //TX_MICMUTE_DT_CUT_K +923 0x0001 //TX_MICMUTE_DT_CUT_THR +924 0x03E8 //TX_MICMUTE_DT_CUT_K2 +925 0x0001 //TX_MICMUTE_DT_CUT_THR2 +926 0x0064 //TX_MICMUTE_DT2_HOLD_N +927 0x1000 //TX_MICMUTE_RATIODTH_THCUT +928 0x1000 //TX_MICMUTE_B_POST_FLT_ECHOL +929 0x7FFF //TX_MICMUTE_B_POST_FLT_ECHOH +930 0x0400 //TX_MICMUTE_C_POST_FLT_MASK +931 0x7999 //TX_MICMUTE_RATIODTL_CUT_TH +932 0x0258 //TX_MICMUTE_DT_CUT_K1 +933 0x0800 //TX_MICMUTE_N2_SN_EST +934 0xFC00 //TX_MICMUTE_THR_SN_EST_0 +935 0x001C //TX_MICMUTE_MIN_G_CTRL_0 +936 0x6000 //TX_MICMUTE_A_POST_FILT_S_0 +937 0x7000 //TX_MICMUTE_B_POST_FILT_0 +938 0x2710 //TX_MIC1RUB_AMP_THR +939 0x0010 //TX_MIC1MUTE_RATIO_THR +940 0x0450 //TX_MIC1MUTE_AMP_THR +941 0x0008 //TX_MIC1MUTE_CVG_TIME +942 0x0008 //TX_MIC1MUTE_RELEASE_TIME +943 0x0000 //TX_AMS_RESRV_01 +944 0x0000 //TX_AMS_RESRV_02 +945 0x0000 //TX_AMS_RESRV_03 +946 0x0000 //TX_AMS_RESRV_04 +947 0x0000 //TX_AMS_RESRV_05 +948 0x0000 //TX_AMS_RESRV_06 +949 0x0000 //TX_AMS_RESRV_07 +950 0x0000 //TX_AMS_RESRV_08 +951 0x0000 //TX_AMS_RESRV_09 +952 0x0000 //TX_AMS_RESRV_10 +953 0x0000 //TX_AMS_RESRV_11 +954 0x0000 //TX_AMS_RESRV_12 +955 0x0000 //TX_AMS_RESRV_13 +956 0x0000 //TX_AMS_RESRV_14 +957 0x0000 //TX_AMS_RESRV_15 +958 0x0000 //TX_AMS_RESRV_16 +959 0x0000 //TX_AMS_RESRV_17 +960 0x0000 //TX_AMS_RESRV_18 +961 0x0000 //TX_AMS_RESRV_19 +#RX +0 0x006C //RX_RECVFUNC_MODE_0 +1 0x0000 //RX_RECVFUNC_MODE_1 +2 0x0004 //RX_SAMPLINGFREQ_SIG +3 0x0004 //RX_SAMPLINGFREQ_PROC +4 0x000A //RX_FRAME_SZ +5 0x0000 //RX_DELAY_OPT +6 0x4000 //RX_TDDRC_ALPHA_UP_1 +7 0x4000 //RX_TDDRC_ALPHA_UP_2 +8 0x4000 //RX_TDDRC_ALPHA_UP_3 +9 0x4000 //RX_TDDRC_ALPHA_UP_4 +10 0x0800 //RX_PGA +11 0x7E56 //RX_A_HP +12 0x4000 //RX_B_PE +13 0x7800 //RX_THR_PITCH_DET_0 +14 0x7000 //RX_THR_PITCH_DET_1 +15 0x6000 //RX_THR_PITCH_DET_2 +16 0x0008 //RX_PITCH_BFR_LEN +17 0x0003 //RX_SBD_PITCH_DET +18 0x0100 //RX_PP_RESRV_0 +19 0x0020 //RX_PP_RESRV_1 +20 0x0400 //RX_N_SN_EST +21 0x000C //RX_N2_SN_EST +22 0x0014 //RX_NS_LVL_CTRL +23 0xF400 //RX_THR_SN_EST +24 0x7E00 //RX_LAMBDA_PFILT +25 0x00C8 //RX_FENS_RESRV_0 +26 0x0190 //RX_FENS_RESRV_1 +27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +30 0x0002 //RX_EXTRA_NS_L +31 0x0800 //RX_EXTRA_NS_A +32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +33 0x7FFF //RX_TDDRC_LIMITER_THRD +34 0x0800 //RX_TDDRC_LIMITER_GAIN +35 0x199A //RX_A_POST_FLT +36 0x0000 //RX_LMT_THRD +37 0x4000 //RX_LMT_ALPHA +38 0x0020 //RX_FDEQ_SUBNUM +39 0x4848 //RX_FDEQ_GAIN_0 +40 0x4848 //RX_FDEQ_GAIN_1 +41 0x4848 //RX_FDEQ_GAIN_2 +42 0x4850 //RX_FDEQ_GAIN_3 +43 0x4848 //RX_FDEQ_GAIN_4 +44 0x4848 //RX_FDEQ_GAIN_5 +45 0x4568 //RX_FDEQ_GAIN_6 +46 0x485C //RX_FDEQ_GAIN_7 +47 0x5C60 //RX_FDEQ_GAIN_8 +48 0x685C //RX_FDEQ_GAIN_9 +49 0x5648 //RX_FDEQ_GAIN_10 +50 0x484C //RX_FDEQ_GAIN_11 +51 0x706C //RX_FDEQ_GAIN_12 +52 0x7070 //RX_FDEQ_GAIN_13 +53 0x6868 //RX_FDEQ_GAIN_14 +54 0x6060 //RX_FDEQ_GAIN_15 +55 0x4848 //RX_FDEQ_GAIN_16 +56 0x4848 //RX_FDEQ_GAIN_17 +57 0x4848 //RX_FDEQ_GAIN_18 +58 0x4848 //RX_FDEQ_GAIN_19 +59 0x4848 //RX_FDEQ_GAIN_20 +60 0x4848 //RX_FDEQ_GAIN_21 +61 0x4848 //RX_FDEQ_GAIN_22 +62 0x4848 //RX_FDEQ_GAIN_23 +63 0x0202 //RX_FDEQ_BIN_0 +64 0x0203 //RX_FDEQ_BIN_1 +65 0x0303 //RX_FDEQ_BIN_2 +66 0x0402 //RX_FDEQ_BIN_3 +67 0x0504 //RX_FDEQ_BIN_4 +68 0x0209 //RX_FDEQ_BIN_5 +69 0x0808 //RX_FDEQ_BIN_6 +70 0x090A //RX_FDEQ_BIN_7 +71 0x0B0C //RX_FDEQ_BIN_8 +72 0x0D0E //RX_FDEQ_BIN_9 +73 0x1013 //RX_FDEQ_BIN_10 +74 0x1719 //RX_FDEQ_BIN_11 +75 0x1B1E //RX_FDEQ_BIN_12 +76 0x1E1E //RX_FDEQ_BIN_13 +77 0x1E28 //RX_FDEQ_BIN_14 +78 0x282C //RX_FDEQ_BIN_15 +79 0x0000 //RX_FDEQ_BIN_16 +80 0x0000 //RX_FDEQ_BIN_17 +81 0x0000 //RX_FDEQ_BIN_18 +82 0x0000 //RX_FDEQ_BIN_19 +83 0x0000 //RX_FDEQ_BIN_20 +84 0x0000 //RX_FDEQ_BIN_21 +85 0x0000 //RX_FDEQ_BIN_22 +86 0x0000 //RX_FDEQ_BIN_23 +87 0x4000 //RX_FDEQ_RESRV_0 +88 0x0320 //RX_FDEQ_RESRV_1 +89 0x0018 //RX_FDDRC_BAND_MARGIN_0 +90 0x0030 //RX_FDDRC_BAND_MARGIN_1 +91 0x0050 //RX_FDDRC_BAND_MARGIN_2 +92 0x0080 //RX_FDDRC_BAND_MARGIN_3 +93 0x0004 //RX_FDDRC_BLOCK_EXP +94 0x5000 //RX_FDDRC_THRD_2_0 +95 0x5000 //RX_FDDRC_THRD_2_1 +96 0x2000 //RX_FDDRC_THRD_2_2 +97 0x5000 //RX_FDDRC_THRD_2_3 +98 0x6400 //RX_FDDRC_THRD_3_0 +99 0x6400 //RX_FDDRC_THRD_3_1 +100 0x2000 //RX_FDDRC_THRD_3_2 +101 0x5000 //RX_FDDRC_THRD_3_3 +102 0x4000 //RX_FDDRC_SLANT_0_0 +103 0x4000 //RX_FDDRC_SLANT_0_1 +104 0x4000 //RX_FDDRC_SLANT_0_2 +105 0x4000 //RX_FDDRC_SLANT_0_3 +106 0x7FFF //RX_FDDRC_SLANT_1_0 +107 0x7FFF //RX_FDDRC_SLANT_1_1 +108 0x7FFF //RX_FDDRC_SLANT_1_2 +109 0x7FFF //RX_FDDRC_SLANT_1_3 +110 0x0000 //RX_FDDRC_RESRV_0 +111 0x0002 //RX_FILTINDX +112 0x0001 //RX_TDDRC_THRD_0 +113 0x0002 //RX_TDDRC_THRD_1 +114 0x1800 //RX_TDDRC_THRD_2 +115 0x1800 //RX_TDDRC_THRD_3 +116 0x6000 //RX_TDDRC_SLANT_0 +117 0x6E00 //RX_TDDRC_SLANT_1 +118 0x4000 //RX_TDDRC_ALPHA_UP_0 +119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +120 0x0000 //RX_TDDRC_HMNC_FLAG +121 0x199A //RX_TDDRC_HMNC_GAIN +122 0x0001 //RX_TDDRC_SMT_FLAG +123 0x0CCD //RX_TDDRC_SMT_W +124 0x02D2 //RX_TDDRC_DRC_GAIN +125 0x7C00 //RX_LAMBDA_PKA_FP +126 0x2000 //RX_TPKA_FP +127 0x2000 //RX_MIN_G_FP +128 0x0080 //RX_MAX_G_FP +129 0x0013 //RX_SPK_VOL +130 0x0000 //RX_VOL_RESRV_0 +131 0x0000 //RX_MAXLEVEL_CNG +132 0x3000 //RX_BWE_UV_TH +133 0x3000 //RX_BWE_UV_TH2 +134 0x1800 //RX_BWE_UV_TH3 +135 0x1000 //RX_BWE_V_TH +136 0x04CD //RX_BWE_GAIN1_V_TH1 +137 0x0F33 //RX_BWE_GAIN1_V_TH2 +138 0x7333 //RX_BWE_UV_EQ +139 0x199A //RX_BWE_V_EQ +140 0x7333 //RX_BWE_TONE_TH +141 0x0004 //RX_BWE_UV_HOLD_T +142 0x6CCD //RX_BWE_GAIN2_ALPHA +143 0x799A //RX_BWE_GAIN3_ALPHA +144 0x001E //RX_BWE_CUTOFF +145 0x3000 //RX_BWE_GAINFILL +146 0x3200 //RX_BWE_MAXTH_TONE +147 0x2000 //RX_BWE_EQ_0 +148 0x2000 //RX_BWE_EQ_1 +149 0x2000 //RX_BWE_EQ_2 +150 0x2000 //RX_BWE_EQ_3 +151 0x2000 //RX_BWE_EQ_4 +152 0x2000 //RX_BWE_EQ_5 +153 0x2000 //RX_BWE_EQ_6 +154 0x0000 //RX_BWE_RESRV_0 +155 0x0000 //RX_BWE_RESRV_1 +156 0x0000 //RX_BWE_RESRV_2 +#VOL 0 +6 0x4000 //RX_TDDRC_ALPHA_UP_1 +7 0x4000 //RX_TDDRC_ALPHA_UP_2 +8 0x4000 //RX_TDDRC_ALPHA_UP_3 +9 0x4000 //RX_TDDRC_ALPHA_UP_4 +27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +33 0x7FFF //RX_TDDRC_LIMITER_THRD +34 0x0800 //RX_TDDRC_LIMITER_GAIN +112 0x0001 //RX_TDDRC_THRD_0 +113 0x0002 //RX_TDDRC_THRD_1 +114 0x1800 //RX_TDDRC_THRD_2 +115 0x1800 //RX_TDDRC_THRD_3 +116 0x6000 //RX_TDDRC_SLANT_0 +117 0x6E00 //RX_TDDRC_SLANT_1 +118 0x4000 //RX_TDDRC_ALPHA_UP_0 +119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +120 0x0000 //RX_TDDRC_HMNC_FLAG +121 0x199A //RX_TDDRC_HMNC_GAIN +122 0x0001 //RX_TDDRC_SMT_FLAG +123 0x0CCD //RX_TDDRC_SMT_W +124 0x02D2 //RX_TDDRC_DRC_GAIN +38 0x0020 //RX_FDEQ_SUBNUM +39 0x4848 //RX_FDEQ_GAIN_0 +40 0x4848 //RX_FDEQ_GAIN_1 +41 0x4848 //RX_FDEQ_GAIN_2 +42 0x4850 //RX_FDEQ_GAIN_3 +43 0x4848 //RX_FDEQ_GAIN_4 +44 0x4848 //RX_FDEQ_GAIN_5 +45 0x4568 //RX_FDEQ_GAIN_6 +46 0x485C //RX_FDEQ_GAIN_7 +47 0x5C60 //RX_FDEQ_GAIN_8 +48 0x685C //RX_FDEQ_GAIN_9 +49 0x5648 //RX_FDEQ_GAIN_10 +50 0x484C //RX_FDEQ_GAIN_11 +51 0x706C //RX_FDEQ_GAIN_12 +52 0x7070 //RX_FDEQ_GAIN_13 +53 0x6868 //RX_FDEQ_GAIN_14 +54 0x6060 //RX_FDEQ_GAIN_15 +55 0x4848 //RX_FDEQ_GAIN_16 +56 0x4848 //RX_FDEQ_GAIN_17 +57 0x4848 //RX_FDEQ_GAIN_18 +58 0x4848 //RX_FDEQ_GAIN_19 +59 0x4848 //RX_FDEQ_GAIN_20 +60 0x4848 //RX_FDEQ_GAIN_21 +61 0x4848 //RX_FDEQ_GAIN_22 +62 0x4848 //RX_FDEQ_GAIN_23 +63 0x0202 //RX_FDEQ_BIN_0 +64 0x0203 //RX_FDEQ_BIN_1 +65 0x0303 //RX_FDEQ_BIN_2 +66 0x0402 //RX_FDEQ_BIN_3 +67 0x0504 //RX_FDEQ_BIN_4 +68 0x0209 //RX_FDEQ_BIN_5 +69 0x0808 //RX_FDEQ_BIN_6 +70 0x090A //RX_FDEQ_BIN_7 +71 0x0B0C //RX_FDEQ_BIN_8 +72 0x0D0E //RX_FDEQ_BIN_9 +73 0x1013 //RX_FDEQ_BIN_10 +74 0x1719 //RX_FDEQ_BIN_11 +75 0x1B1E //RX_FDEQ_BIN_12 +76 0x1E1E //RX_FDEQ_BIN_13 +77 0x1E28 //RX_FDEQ_BIN_14 +78 0x282C //RX_FDEQ_BIN_15 +79 0x0000 //RX_FDEQ_BIN_16 +80 0x0000 //RX_FDEQ_BIN_17 +81 0x0000 //RX_FDEQ_BIN_18 +82 0x0000 //RX_FDEQ_BIN_19 +83 0x0000 //RX_FDEQ_BIN_20 +84 0x0000 //RX_FDEQ_BIN_21 +85 0x0000 //RX_FDEQ_BIN_22 +86 0x0000 //RX_FDEQ_BIN_23 +87 0x4000 //RX_FDEQ_RESRV_0 +88 0x0320 //RX_FDEQ_RESRV_1 +89 0x0018 //RX_FDDRC_BAND_MARGIN_0 +90 0x0030 //RX_FDDRC_BAND_MARGIN_1 +91 0x0050 //RX_FDDRC_BAND_MARGIN_2 +92 0x0080 //RX_FDDRC_BAND_MARGIN_3 +93 0x0004 //RX_FDDRC_BLOCK_EXP +94 0x5000 //RX_FDDRC_THRD_2_0 +95 0x5000 //RX_FDDRC_THRD_2_1 +96 0x2000 //RX_FDDRC_THRD_2_2 +97 0x5000 //RX_FDDRC_THRD_2_3 +98 0x6400 //RX_FDDRC_THRD_3_0 +99 0x6400 //RX_FDDRC_THRD_3_1 +100 0x2000 //RX_FDDRC_THRD_3_2 +101 0x5000 //RX_FDDRC_THRD_3_3 +102 0x4000 //RX_FDDRC_SLANT_0_0 +103 0x4000 //RX_FDDRC_SLANT_0_1 +104 0x4000 //RX_FDDRC_SLANT_0_2 +105 0x4000 //RX_FDDRC_SLANT_0_3 +106 0x7FFF //RX_FDDRC_SLANT_1_0 +107 0x7FFF //RX_FDDRC_SLANT_1_1 +108 0x7FFF //RX_FDDRC_SLANT_1_2 +109 0x7FFF //RX_FDDRC_SLANT_1_3 +110 0x0000 //RX_FDDRC_RESRV_0 +129 0x0013 //RX_SPK_VOL +130 0x0000 //RX_VOL_RESRV_0 +#VOL 1 +6 0x4000 //RX_TDDRC_ALPHA_UP_1 +7 0x4000 //RX_TDDRC_ALPHA_UP_2 +8 0x4000 //RX_TDDRC_ALPHA_UP_3 +9 0x4000 //RX_TDDRC_ALPHA_UP_4 +27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +33 0x7FFF //RX_TDDRC_LIMITER_THRD +34 0x0800 //RX_TDDRC_LIMITER_GAIN +112 0x0001 //RX_TDDRC_THRD_0 +113 0x0002 //RX_TDDRC_THRD_1 +114 0x1800 //RX_TDDRC_THRD_2 +115 0x1800 //RX_TDDRC_THRD_3 +116 0x6000 //RX_TDDRC_SLANT_0 +117 0x6E00 //RX_TDDRC_SLANT_1 +118 0x4000 //RX_TDDRC_ALPHA_UP_0 +119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +120 0x0000 //RX_TDDRC_HMNC_FLAG +121 0x199A //RX_TDDRC_HMNC_GAIN +122 0x0001 //RX_TDDRC_SMT_FLAG +123 0x0CCD //RX_TDDRC_SMT_W +124 0x02D2 //RX_TDDRC_DRC_GAIN +38 0x0020 //RX_FDEQ_SUBNUM +39 0x4848 //RX_FDEQ_GAIN_0 +40 0x4848 //RX_FDEQ_GAIN_1 +41 0x4848 //RX_FDEQ_GAIN_2 +42 0x4850 //RX_FDEQ_GAIN_3 +43 0x4848 //RX_FDEQ_GAIN_4 +44 0x4848 //RX_FDEQ_GAIN_5 +45 0x4568 //RX_FDEQ_GAIN_6 +46 0x485C //RX_FDEQ_GAIN_7 +47 0x5C60 //RX_FDEQ_GAIN_8 +48 0x685C //RX_FDEQ_GAIN_9 +49 0x5648 //RX_FDEQ_GAIN_10 +50 0x484C //RX_FDEQ_GAIN_11 +51 0x706C //RX_FDEQ_GAIN_12 +52 0x7070 //RX_FDEQ_GAIN_13 +53 0x6868 //RX_FDEQ_GAIN_14 +54 0x6060 //RX_FDEQ_GAIN_15 +55 0x4848 //RX_FDEQ_GAIN_16 +56 0x4848 //RX_FDEQ_GAIN_17 +57 0x4848 //RX_FDEQ_GAIN_18 +58 0x4848 //RX_FDEQ_GAIN_19 +59 0x4848 //RX_FDEQ_GAIN_20 +60 0x4848 //RX_FDEQ_GAIN_21 +61 0x4848 //RX_FDEQ_GAIN_22 +62 0x4848 //RX_FDEQ_GAIN_23 +63 0x0202 //RX_FDEQ_BIN_0 +64 0x0203 //RX_FDEQ_BIN_1 +65 0x0303 //RX_FDEQ_BIN_2 +66 0x0402 //RX_FDEQ_BIN_3 +67 0x0504 //RX_FDEQ_BIN_4 +68 0x0209 //RX_FDEQ_BIN_5 +69 0x0808 //RX_FDEQ_BIN_6 +70 0x090A //RX_FDEQ_BIN_7 +71 0x0B0C //RX_FDEQ_BIN_8 +72 0x0D0E //RX_FDEQ_BIN_9 +73 0x1013 //RX_FDEQ_BIN_10 +74 0x1719 //RX_FDEQ_BIN_11 +75 0x1B1E //RX_FDEQ_BIN_12 +76 0x1E1E //RX_FDEQ_BIN_13 +77 0x1E28 //RX_FDEQ_BIN_14 +78 0x282C //RX_FDEQ_BIN_15 +79 0x0000 //RX_FDEQ_BIN_16 +80 0x0000 //RX_FDEQ_BIN_17 +81 0x0000 //RX_FDEQ_BIN_18 +82 0x0000 //RX_FDEQ_BIN_19 +83 0x0000 //RX_FDEQ_BIN_20 +84 0x0000 //RX_FDEQ_BIN_21 +85 0x0000 //RX_FDEQ_BIN_22 +86 0x0000 //RX_FDEQ_BIN_23 +87 0x4000 //RX_FDEQ_RESRV_0 +88 0x0320 //RX_FDEQ_RESRV_1 +89 0x0018 //RX_FDDRC_BAND_MARGIN_0 +90 0x0030 //RX_FDDRC_BAND_MARGIN_1 +91 0x0050 //RX_FDDRC_BAND_MARGIN_2 +92 0x0080 //RX_FDDRC_BAND_MARGIN_3 +93 0x0004 //RX_FDDRC_BLOCK_EXP +94 0x5000 //RX_FDDRC_THRD_2_0 +95 0x5000 //RX_FDDRC_THRD_2_1 +96 0x2000 //RX_FDDRC_THRD_2_2 +97 0x5000 //RX_FDDRC_THRD_2_3 +98 0x6400 //RX_FDDRC_THRD_3_0 +99 0x6400 //RX_FDDRC_THRD_3_1 +100 0x2000 //RX_FDDRC_THRD_3_2 +101 0x5000 //RX_FDDRC_THRD_3_3 +102 0x4000 //RX_FDDRC_SLANT_0_0 +103 0x4000 //RX_FDDRC_SLANT_0_1 +104 0x4000 //RX_FDDRC_SLANT_0_2 +105 0x4000 //RX_FDDRC_SLANT_0_3 +106 0x7FFF //RX_FDDRC_SLANT_1_0 +107 0x7FFF //RX_FDDRC_SLANT_1_1 +108 0x7FFF //RX_FDDRC_SLANT_1_2 +109 0x7FFF //RX_FDDRC_SLANT_1_3 +110 0x0000 //RX_FDDRC_RESRV_0 +129 0x001C //RX_SPK_VOL +130 0x0000 //RX_VOL_RESRV_0 +#VOL 2 +6 0x4000 //RX_TDDRC_ALPHA_UP_1 +7 0x4000 //RX_TDDRC_ALPHA_UP_2 +8 0x4000 //RX_TDDRC_ALPHA_UP_3 +9 0x4000 //RX_TDDRC_ALPHA_UP_4 +27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +33 0x7FFF //RX_TDDRC_LIMITER_THRD +34 0x0800 //RX_TDDRC_LIMITER_GAIN +112 0x0001 //RX_TDDRC_THRD_0 +113 0x0002 //RX_TDDRC_THRD_1 +114 0x1800 //RX_TDDRC_THRD_2 +115 0x1800 //RX_TDDRC_THRD_3 +116 0x6000 //RX_TDDRC_SLANT_0 +117 0x6E00 //RX_TDDRC_SLANT_1 +118 0x4000 //RX_TDDRC_ALPHA_UP_0 +119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +120 0x0000 //RX_TDDRC_HMNC_FLAG +121 0x199A //RX_TDDRC_HMNC_GAIN +122 0x0001 //RX_TDDRC_SMT_FLAG +123 0x0CCD //RX_TDDRC_SMT_W +124 0x02D2 //RX_TDDRC_DRC_GAIN +38 0x0020 //RX_FDEQ_SUBNUM +39 0x4848 //RX_FDEQ_GAIN_0 +40 0x4848 //RX_FDEQ_GAIN_1 +41 0x4848 //RX_FDEQ_GAIN_2 +42 0x4850 //RX_FDEQ_GAIN_3 +43 0x4848 //RX_FDEQ_GAIN_4 +44 0x4848 //RX_FDEQ_GAIN_5 +45 0x4568 //RX_FDEQ_GAIN_6 +46 0x485C //RX_FDEQ_GAIN_7 +47 0x5C60 //RX_FDEQ_GAIN_8 +48 0x685C //RX_FDEQ_GAIN_9 +49 0x5648 //RX_FDEQ_GAIN_10 +50 0x484C //RX_FDEQ_GAIN_11 +51 0x706C //RX_FDEQ_GAIN_12 +52 0x7070 //RX_FDEQ_GAIN_13 +53 0x6868 //RX_FDEQ_GAIN_14 +54 0x6060 //RX_FDEQ_GAIN_15 +55 0x4848 //RX_FDEQ_GAIN_16 +56 0x4848 //RX_FDEQ_GAIN_17 +57 0x4848 //RX_FDEQ_GAIN_18 +58 0x4848 //RX_FDEQ_GAIN_19 +59 0x4848 //RX_FDEQ_GAIN_20 +60 0x4848 //RX_FDEQ_GAIN_21 +61 0x4848 //RX_FDEQ_GAIN_22 +62 0x4848 //RX_FDEQ_GAIN_23 +63 0x0202 //RX_FDEQ_BIN_0 +64 0x0203 //RX_FDEQ_BIN_1 +65 0x0303 //RX_FDEQ_BIN_2 +66 0x0402 //RX_FDEQ_BIN_3 +67 0x0504 //RX_FDEQ_BIN_4 +68 0x0209 //RX_FDEQ_BIN_5 +69 0x0808 //RX_FDEQ_BIN_6 +70 0x090A //RX_FDEQ_BIN_7 +71 0x0B0C //RX_FDEQ_BIN_8 +72 0x0D0E //RX_FDEQ_BIN_9 +73 0x1013 //RX_FDEQ_BIN_10 +74 0x1719 //RX_FDEQ_BIN_11 +75 0x1B1E //RX_FDEQ_BIN_12 +76 0x1E1E //RX_FDEQ_BIN_13 +77 0x1E28 //RX_FDEQ_BIN_14 +78 0x282C //RX_FDEQ_BIN_15 +79 0x0000 //RX_FDEQ_BIN_16 +80 0x0000 //RX_FDEQ_BIN_17 +81 0x0000 //RX_FDEQ_BIN_18 +82 0x0000 //RX_FDEQ_BIN_19 +83 0x0000 //RX_FDEQ_BIN_20 +84 0x0000 //RX_FDEQ_BIN_21 +85 0x0000 //RX_FDEQ_BIN_22 +86 0x0000 //RX_FDEQ_BIN_23 +87 0x4000 //RX_FDEQ_RESRV_0 +88 0x0320 //RX_FDEQ_RESRV_1 +89 0x0018 //RX_FDDRC_BAND_MARGIN_0 +90 0x0030 //RX_FDDRC_BAND_MARGIN_1 +91 0x0050 //RX_FDDRC_BAND_MARGIN_2 +92 0x0080 //RX_FDDRC_BAND_MARGIN_3 +93 0x0004 //RX_FDDRC_BLOCK_EXP +94 0x5000 //RX_FDDRC_THRD_2_0 +95 0x5000 //RX_FDDRC_THRD_2_1 +96 0x2000 //RX_FDDRC_THRD_2_2 +97 0x5000 //RX_FDDRC_THRD_2_3 +98 0x6400 //RX_FDDRC_THRD_3_0 +99 0x6400 //RX_FDDRC_THRD_3_1 +100 0x2000 //RX_FDDRC_THRD_3_2 +101 0x5000 //RX_FDDRC_THRD_3_3 +102 0x4000 //RX_FDDRC_SLANT_0_0 +103 0x4000 //RX_FDDRC_SLANT_0_1 +104 0x4000 //RX_FDDRC_SLANT_0_2 +105 0x4000 //RX_FDDRC_SLANT_0_3 +106 0x7FFF //RX_FDDRC_SLANT_1_0 +107 0x7FFF //RX_FDDRC_SLANT_1_1 +108 0x7FFF //RX_FDDRC_SLANT_1_2 +109 0x7FFF //RX_FDDRC_SLANT_1_3 +110 0x0000 //RX_FDDRC_RESRV_0 +129 0x0028 //RX_SPK_VOL +130 0x0000 //RX_VOL_RESRV_0 +#VOL 3 +6 0x4000 //RX_TDDRC_ALPHA_UP_1 +7 0x4000 //RX_TDDRC_ALPHA_UP_2 +8 0x4000 //RX_TDDRC_ALPHA_UP_3 +9 0x4000 //RX_TDDRC_ALPHA_UP_4 +27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +33 0x7FFF //RX_TDDRC_LIMITER_THRD +34 0x0800 //RX_TDDRC_LIMITER_GAIN +112 0x0001 //RX_TDDRC_THRD_0 +113 0x0002 //RX_TDDRC_THRD_1 +114 0x1800 //RX_TDDRC_THRD_2 +115 0x1800 //RX_TDDRC_THRD_3 +116 0x6000 //RX_TDDRC_SLANT_0 +117 0x6E00 //RX_TDDRC_SLANT_1 +118 0x4000 //RX_TDDRC_ALPHA_UP_0 +119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +120 0x0000 //RX_TDDRC_HMNC_FLAG +121 0x199A //RX_TDDRC_HMNC_GAIN +122 0x0001 //RX_TDDRC_SMT_FLAG +123 0x0CCD //RX_TDDRC_SMT_W +124 0x02D2 //RX_TDDRC_DRC_GAIN +38 0x0020 //RX_FDEQ_SUBNUM +39 0x4848 //RX_FDEQ_GAIN_0 +40 0x4848 //RX_FDEQ_GAIN_1 +41 0x4848 //RX_FDEQ_GAIN_2 +42 0x4850 //RX_FDEQ_GAIN_3 +43 0x4848 //RX_FDEQ_GAIN_4 +44 0x4848 //RX_FDEQ_GAIN_5 +45 0x4568 //RX_FDEQ_GAIN_6 +46 0x485C //RX_FDEQ_GAIN_7 +47 0x5C60 //RX_FDEQ_GAIN_8 +48 0x685C //RX_FDEQ_GAIN_9 +49 0x5648 //RX_FDEQ_GAIN_10 +50 0x484C //RX_FDEQ_GAIN_11 +51 0x706C //RX_FDEQ_GAIN_12 +52 0x7070 //RX_FDEQ_GAIN_13 +53 0x6868 //RX_FDEQ_GAIN_14 +54 0x6060 //RX_FDEQ_GAIN_15 +55 0x4848 //RX_FDEQ_GAIN_16 +56 0x4848 //RX_FDEQ_GAIN_17 +57 0x4848 //RX_FDEQ_GAIN_18 +58 0x4848 //RX_FDEQ_GAIN_19 +59 0x4848 //RX_FDEQ_GAIN_20 +60 0x4848 //RX_FDEQ_GAIN_21 +61 0x4848 //RX_FDEQ_GAIN_22 +62 0x4848 //RX_FDEQ_GAIN_23 +63 0x0202 //RX_FDEQ_BIN_0 +64 0x0203 //RX_FDEQ_BIN_1 +65 0x0303 //RX_FDEQ_BIN_2 +66 0x0402 //RX_FDEQ_BIN_3 +67 0x0504 //RX_FDEQ_BIN_4 +68 0x0209 //RX_FDEQ_BIN_5 +69 0x0808 //RX_FDEQ_BIN_6 +70 0x090A //RX_FDEQ_BIN_7 +71 0x0B0C //RX_FDEQ_BIN_8 +72 0x0D0E //RX_FDEQ_BIN_9 +73 0x1013 //RX_FDEQ_BIN_10 +74 0x1719 //RX_FDEQ_BIN_11 +75 0x1B1E //RX_FDEQ_BIN_12 +76 0x1E1E //RX_FDEQ_BIN_13 +77 0x1E28 //RX_FDEQ_BIN_14 +78 0x282C //RX_FDEQ_BIN_15 +79 0x0000 //RX_FDEQ_BIN_16 +80 0x0000 //RX_FDEQ_BIN_17 +81 0x0000 //RX_FDEQ_BIN_18 +82 0x0000 //RX_FDEQ_BIN_19 +83 0x0000 //RX_FDEQ_BIN_20 +84 0x0000 //RX_FDEQ_BIN_21 +85 0x0000 //RX_FDEQ_BIN_22 +86 0x0000 //RX_FDEQ_BIN_23 +87 0x4000 //RX_FDEQ_RESRV_0 +88 0x0320 //RX_FDEQ_RESRV_1 +89 0x0018 //RX_FDDRC_BAND_MARGIN_0 +90 0x0030 //RX_FDDRC_BAND_MARGIN_1 +91 0x0050 //RX_FDDRC_BAND_MARGIN_2 +92 0x0080 //RX_FDDRC_BAND_MARGIN_3 +93 0x0004 //RX_FDDRC_BLOCK_EXP +94 0x5000 //RX_FDDRC_THRD_2_0 +95 0x5000 //RX_FDDRC_THRD_2_1 +96 0x2000 //RX_FDDRC_THRD_2_2 +97 0x5000 //RX_FDDRC_THRD_2_3 +98 0x6400 //RX_FDDRC_THRD_3_0 +99 0x6400 //RX_FDDRC_THRD_3_1 +100 0x2000 //RX_FDDRC_THRD_3_2 +101 0x5000 //RX_FDDRC_THRD_3_3 +102 0x4000 //RX_FDDRC_SLANT_0_0 +103 0x4000 //RX_FDDRC_SLANT_0_1 +104 0x4000 //RX_FDDRC_SLANT_0_2 +105 0x4000 //RX_FDDRC_SLANT_0_3 +106 0x7FFF //RX_FDDRC_SLANT_1_0 +107 0x7FFF //RX_FDDRC_SLANT_1_1 +108 0x7FFF //RX_FDDRC_SLANT_1_2 +109 0x7FFF //RX_FDDRC_SLANT_1_3 +110 0x0000 //RX_FDDRC_RESRV_0 +129 0x0035 //RX_SPK_VOL +130 0x0000 //RX_VOL_RESRV_0 +#VOL 4 +6 0x4000 //RX_TDDRC_ALPHA_UP_1 +7 0x4000 //RX_TDDRC_ALPHA_UP_2 +8 0x4000 //RX_TDDRC_ALPHA_UP_3 +9 0x4000 //RX_TDDRC_ALPHA_UP_4 +27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +33 0x7FFF //RX_TDDRC_LIMITER_THRD +34 0x0800 //RX_TDDRC_LIMITER_GAIN +112 0x0001 //RX_TDDRC_THRD_0 +113 0x0002 //RX_TDDRC_THRD_1 +114 0x1800 //RX_TDDRC_THRD_2 +115 0x1800 //RX_TDDRC_THRD_3 +116 0x6000 //RX_TDDRC_SLANT_0 +117 0x6E00 //RX_TDDRC_SLANT_1 +118 0x4000 //RX_TDDRC_ALPHA_UP_0 +119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +120 0x0000 //RX_TDDRC_HMNC_FLAG +121 0x199A //RX_TDDRC_HMNC_GAIN +122 0x0001 //RX_TDDRC_SMT_FLAG +123 0x0CCD //RX_TDDRC_SMT_W +124 0x02D2 //RX_TDDRC_DRC_GAIN +38 0x0020 //RX_FDEQ_SUBNUM +39 0x4C4C //RX_FDEQ_GAIN_0 +40 0x4C4C //RX_FDEQ_GAIN_1 +41 0x4C48 //RX_FDEQ_GAIN_2 +42 0x4870 //RX_FDEQ_GAIN_3 +43 0x4848 //RX_FDEQ_GAIN_4 +44 0x4848 //RX_FDEQ_GAIN_5 +45 0x4568 //RX_FDEQ_GAIN_6 +46 0x485C //RX_FDEQ_GAIN_7 +47 0x5C60 //RX_FDEQ_GAIN_8 +48 0x685C //RX_FDEQ_GAIN_9 +49 0x5648 //RX_FDEQ_GAIN_10 +50 0x484C //RX_FDEQ_GAIN_11 +51 0x706C //RX_FDEQ_GAIN_12 +52 0x7070 //RX_FDEQ_GAIN_13 +53 0x6868 //RX_FDEQ_GAIN_14 +54 0x6060 //RX_FDEQ_GAIN_15 +55 0x4848 //RX_FDEQ_GAIN_16 +56 0x4848 //RX_FDEQ_GAIN_17 +57 0x4848 //RX_FDEQ_GAIN_18 +58 0x4848 //RX_FDEQ_GAIN_19 +59 0x4848 //RX_FDEQ_GAIN_20 +60 0x4848 //RX_FDEQ_GAIN_21 +61 0x4848 //RX_FDEQ_GAIN_22 +62 0x4848 //RX_FDEQ_GAIN_23 +63 0x0202 //RX_FDEQ_BIN_0 +64 0x0203 //RX_FDEQ_BIN_1 +65 0x0303 //RX_FDEQ_BIN_2 +66 0x0402 //RX_FDEQ_BIN_3 +67 0x0504 //RX_FDEQ_BIN_4 +68 0x0209 //RX_FDEQ_BIN_5 +69 0x0808 //RX_FDEQ_BIN_6 +70 0x090A //RX_FDEQ_BIN_7 +71 0x0B0C //RX_FDEQ_BIN_8 +72 0x0D0E //RX_FDEQ_BIN_9 +73 0x1013 //RX_FDEQ_BIN_10 +74 0x1719 //RX_FDEQ_BIN_11 +75 0x1B1E //RX_FDEQ_BIN_12 +76 0x1E1E //RX_FDEQ_BIN_13 +77 0x1E28 //RX_FDEQ_BIN_14 +78 0x282C //RX_FDEQ_BIN_15 +79 0x0000 //RX_FDEQ_BIN_16 +80 0x0000 //RX_FDEQ_BIN_17 +81 0x0000 //RX_FDEQ_BIN_18 +82 0x0000 //RX_FDEQ_BIN_19 +83 0x0000 //RX_FDEQ_BIN_20 +84 0x0000 //RX_FDEQ_BIN_21 +85 0x0000 //RX_FDEQ_BIN_22 +86 0x0000 //RX_FDEQ_BIN_23 +87 0x4000 //RX_FDEQ_RESRV_0 +88 0x0320 //RX_FDEQ_RESRV_1 +89 0x0018 //RX_FDDRC_BAND_MARGIN_0 +90 0x0030 //RX_FDDRC_BAND_MARGIN_1 +91 0x0050 //RX_FDDRC_BAND_MARGIN_2 +92 0x0080 //RX_FDDRC_BAND_MARGIN_3 +93 0x0004 //RX_FDDRC_BLOCK_EXP +94 0x5000 //RX_FDDRC_THRD_2_0 +95 0x5000 //RX_FDDRC_THRD_2_1 +96 0x2000 //RX_FDDRC_THRD_2_2 +97 0x5000 //RX_FDDRC_THRD_2_3 +98 0x6400 //RX_FDDRC_THRD_3_0 +99 0x6400 //RX_FDDRC_THRD_3_1 +100 0x2000 //RX_FDDRC_THRD_3_2 +101 0x5000 //RX_FDDRC_THRD_3_3 +102 0x4000 //RX_FDDRC_SLANT_0_0 +103 0x4000 //RX_FDDRC_SLANT_0_1 +104 0x4000 //RX_FDDRC_SLANT_0_2 +105 0x4000 //RX_FDDRC_SLANT_0_3 +106 0x7FFF //RX_FDDRC_SLANT_1_0 +107 0x7FFF //RX_FDDRC_SLANT_1_1 +108 0x7FFF //RX_FDDRC_SLANT_1_2 +109 0x7FFF //RX_FDDRC_SLANT_1_3 +110 0x0000 //RX_FDDRC_RESRV_0 +129 0x0052 //RX_SPK_VOL +130 0x0000 //RX_VOL_RESRV_0 +#VOL 5 +6 0x4000 //RX_TDDRC_ALPHA_UP_1 +7 0x4000 //RX_TDDRC_ALPHA_UP_2 +8 0x4000 //RX_TDDRC_ALPHA_UP_3 +9 0x4000 //RX_TDDRC_ALPHA_UP_4 +27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +33 0x7FFF //RX_TDDRC_LIMITER_THRD +34 0x0800 //RX_TDDRC_LIMITER_GAIN +112 0x0001 //RX_TDDRC_THRD_0 +113 0x0002 //RX_TDDRC_THRD_1 +114 0x1800 //RX_TDDRC_THRD_2 +115 0x1800 //RX_TDDRC_THRD_3 +116 0x6000 //RX_TDDRC_SLANT_0 +117 0x6E00 //RX_TDDRC_SLANT_1 +118 0x4000 //RX_TDDRC_ALPHA_UP_0 +119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +120 0x0000 //RX_TDDRC_HMNC_FLAG +121 0x199A //RX_TDDRC_HMNC_GAIN +122 0x0001 //RX_TDDRC_SMT_FLAG +123 0x0CCD //RX_TDDRC_SMT_W +124 0x02D2 //RX_TDDRC_DRC_GAIN +38 0x0020 //RX_FDEQ_SUBNUM +39 0x4C4C //RX_FDEQ_GAIN_0 +40 0x4C4C //RX_FDEQ_GAIN_1 +41 0x4C48 //RX_FDEQ_GAIN_2 +42 0x4870 //RX_FDEQ_GAIN_3 +43 0x4848 //RX_FDEQ_GAIN_4 +44 0x4848 //RX_FDEQ_GAIN_5 +45 0x4568 //RX_FDEQ_GAIN_6 +46 0x485C //RX_FDEQ_GAIN_7 +47 0x5C60 //RX_FDEQ_GAIN_8 +48 0x685C //RX_FDEQ_GAIN_9 +49 0x5648 //RX_FDEQ_GAIN_10 +50 0x484C //RX_FDEQ_GAIN_11 +51 0x706C //RX_FDEQ_GAIN_12 +52 0x7070 //RX_FDEQ_GAIN_13 +53 0x6868 //RX_FDEQ_GAIN_14 +54 0x6060 //RX_FDEQ_GAIN_15 +55 0x4848 //RX_FDEQ_GAIN_16 +56 0x4848 //RX_FDEQ_GAIN_17 +57 0x4848 //RX_FDEQ_GAIN_18 +58 0x4848 //RX_FDEQ_GAIN_19 +59 0x4848 //RX_FDEQ_GAIN_20 +60 0x4848 //RX_FDEQ_GAIN_21 +61 0x4848 //RX_FDEQ_GAIN_22 +62 0x4848 //RX_FDEQ_GAIN_23 +63 0x0202 //RX_FDEQ_BIN_0 +64 0x0203 //RX_FDEQ_BIN_1 +65 0x0303 //RX_FDEQ_BIN_2 +66 0x0402 //RX_FDEQ_BIN_3 +67 0x0504 //RX_FDEQ_BIN_4 +68 0x0209 //RX_FDEQ_BIN_5 +69 0x0808 //RX_FDEQ_BIN_6 +70 0x090A //RX_FDEQ_BIN_7 +71 0x0B0C //RX_FDEQ_BIN_8 +72 0x0D0E //RX_FDEQ_BIN_9 +73 0x1013 //RX_FDEQ_BIN_10 +74 0x1719 //RX_FDEQ_BIN_11 +75 0x1B1E //RX_FDEQ_BIN_12 +76 0x1E1E //RX_FDEQ_BIN_13 +77 0x1E28 //RX_FDEQ_BIN_14 +78 0x282C //RX_FDEQ_BIN_15 +79 0x0000 //RX_FDEQ_BIN_16 +80 0x0000 //RX_FDEQ_BIN_17 +81 0x0000 //RX_FDEQ_BIN_18 +82 0x0000 //RX_FDEQ_BIN_19 +83 0x0000 //RX_FDEQ_BIN_20 +84 0x0000 //RX_FDEQ_BIN_21 +85 0x0000 //RX_FDEQ_BIN_22 +86 0x0000 //RX_FDEQ_BIN_23 +87 0x4000 //RX_FDEQ_RESRV_0 +88 0x0320 //RX_FDEQ_RESRV_1 +89 0x0018 //RX_FDDRC_BAND_MARGIN_0 +90 0x0030 //RX_FDDRC_BAND_MARGIN_1 +91 0x0050 //RX_FDDRC_BAND_MARGIN_2 +92 0x0080 //RX_FDDRC_BAND_MARGIN_3 +93 0x0004 //RX_FDDRC_BLOCK_EXP +94 0x5000 //RX_FDDRC_THRD_2_0 +95 0x5000 //RX_FDDRC_THRD_2_1 +96 0x2000 //RX_FDDRC_THRD_2_2 +97 0x5000 //RX_FDDRC_THRD_2_3 +98 0x6400 //RX_FDDRC_THRD_3_0 +99 0x6400 //RX_FDDRC_THRD_3_1 +100 0x2000 //RX_FDDRC_THRD_3_2 +101 0x5000 //RX_FDDRC_THRD_3_3 +102 0x4000 //RX_FDDRC_SLANT_0_0 +103 0x4000 //RX_FDDRC_SLANT_0_1 +104 0x4000 //RX_FDDRC_SLANT_0_2 +105 0x4000 //RX_FDDRC_SLANT_0_3 +106 0x7FFF //RX_FDDRC_SLANT_1_0 +107 0x7FFF //RX_FDDRC_SLANT_1_1 +108 0x7FFF //RX_FDDRC_SLANT_1_2 +109 0x7FFF //RX_FDDRC_SLANT_1_3 +110 0x0000 //RX_FDDRC_RESRV_0 +129 0x0078 //RX_SPK_VOL +130 0x0000 //RX_VOL_RESRV_0 +#VOL 6 +6 0x4000 //RX_TDDRC_ALPHA_UP_1 +7 0x4000 //RX_TDDRC_ALPHA_UP_2 +8 0x4000 //RX_TDDRC_ALPHA_UP_3 +9 0x4000 //RX_TDDRC_ALPHA_UP_4 +27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +33 0x7FFF //RX_TDDRC_LIMITER_THRD +34 0x0800 //RX_TDDRC_LIMITER_GAIN +112 0x0001 //RX_TDDRC_THRD_0 +113 0x0002 //RX_TDDRC_THRD_1 +114 0x1800 //RX_TDDRC_THRD_2 +115 0x1800 //RX_TDDRC_THRD_3 +116 0x6000 //RX_TDDRC_SLANT_0 +117 0x6E00 //RX_TDDRC_SLANT_1 +118 0x4000 //RX_TDDRC_ALPHA_UP_0 +119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +120 0x0000 //RX_TDDRC_HMNC_FLAG +121 0x199A //RX_TDDRC_HMNC_GAIN +122 0x0001 //RX_TDDRC_SMT_FLAG +123 0x0CCD //RX_TDDRC_SMT_W +124 0x02D2 //RX_TDDRC_DRC_GAIN +38 0x0020 //RX_FDEQ_SUBNUM +39 0x4C4C //RX_FDEQ_GAIN_0 +40 0x4C4C //RX_FDEQ_GAIN_1 +41 0x4C48 //RX_FDEQ_GAIN_2 +42 0x4870 //RX_FDEQ_GAIN_3 +43 0x4848 //RX_FDEQ_GAIN_4 +44 0x4848 //RX_FDEQ_GAIN_5 +45 0x4568 //RX_FDEQ_GAIN_6 +46 0x485C //RX_FDEQ_GAIN_7 +47 0x5C60 //RX_FDEQ_GAIN_8 +48 0x685C //RX_FDEQ_GAIN_9 +49 0x5648 //RX_FDEQ_GAIN_10 +50 0x484C //RX_FDEQ_GAIN_11 +51 0x706C //RX_FDEQ_GAIN_12 +52 0x7070 //RX_FDEQ_GAIN_13 +53 0x6868 //RX_FDEQ_GAIN_14 +54 0x6060 //RX_FDEQ_GAIN_15 +55 0x4848 //RX_FDEQ_GAIN_16 +56 0x4848 //RX_FDEQ_GAIN_17 +57 0x4848 //RX_FDEQ_GAIN_18 +58 0x4848 //RX_FDEQ_GAIN_19 +59 0x4848 //RX_FDEQ_GAIN_20 +60 0x4848 //RX_FDEQ_GAIN_21 +61 0x4848 //RX_FDEQ_GAIN_22 +62 0x4848 //RX_FDEQ_GAIN_23 +63 0x0202 //RX_FDEQ_BIN_0 +64 0x0203 //RX_FDEQ_BIN_1 +65 0x0303 //RX_FDEQ_BIN_2 +66 0x0402 //RX_FDEQ_BIN_3 +67 0x0504 //RX_FDEQ_BIN_4 +68 0x0209 //RX_FDEQ_BIN_5 +69 0x0808 //RX_FDEQ_BIN_6 +70 0x090A //RX_FDEQ_BIN_7 +71 0x0B0C //RX_FDEQ_BIN_8 +72 0x0D0E //RX_FDEQ_BIN_9 +73 0x1013 //RX_FDEQ_BIN_10 +74 0x1719 //RX_FDEQ_BIN_11 +75 0x1B1E //RX_FDEQ_BIN_12 +76 0x1E1E //RX_FDEQ_BIN_13 +77 0x1E28 //RX_FDEQ_BIN_14 +78 0x282C //RX_FDEQ_BIN_15 +79 0x0000 //RX_FDEQ_BIN_16 +80 0x0000 //RX_FDEQ_BIN_17 +81 0x0000 //RX_FDEQ_BIN_18 +82 0x0000 //RX_FDEQ_BIN_19 +83 0x0000 //RX_FDEQ_BIN_20 +84 0x0000 //RX_FDEQ_BIN_21 +85 0x0000 //RX_FDEQ_BIN_22 +86 0x0000 //RX_FDEQ_BIN_23 +87 0x4000 //RX_FDEQ_RESRV_0 +88 0x0320 //RX_FDEQ_RESRV_1 +89 0x0018 //RX_FDDRC_BAND_MARGIN_0 +90 0x0030 //RX_FDDRC_BAND_MARGIN_1 +91 0x0050 //RX_FDDRC_BAND_MARGIN_2 +92 0x0080 //RX_FDDRC_BAND_MARGIN_3 +93 0x0004 //RX_FDDRC_BLOCK_EXP +94 0x5000 //RX_FDDRC_THRD_2_0 +95 0x5000 //RX_FDDRC_THRD_2_1 +96 0x2000 //RX_FDDRC_THRD_2_2 +97 0x5000 //RX_FDDRC_THRD_2_3 +98 0x6400 //RX_FDDRC_THRD_3_0 +99 0x6400 //RX_FDDRC_THRD_3_1 +100 0x2000 //RX_FDDRC_THRD_3_2 +101 0x5000 //RX_FDDRC_THRD_3_3 +102 0x4000 //RX_FDDRC_SLANT_0_0 +103 0x4000 //RX_FDDRC_SLANT_0_1 +104 0x4000 //RX_FDDRC_SLANT_0_2 +105 0x4000 //RX_FDDRC_SLANT_0_3 +106 0x7FFF //RX_FDDRC_SLANT_1_0 +107 0x7FFF //RX_FDDRC_SLANT_1_1 +108 0x7FFF //RX_FDDRC_SLANT_1_2 +109 0x7FFF //RX_FDDRC_SLANT_1_3 +110 0x0000 //RX_FDDRC_RESRV_0 +129 0x0100 //RX_SPK_VOL +130 0x0000 //RX_VOL_RESRV_0 +#RX 2 +157 0x006C //RX_RECVFUNC_MODE_0 +158 0x0000 //RX_RECVFUNC_MODE_1 +159 0x0004 //RX_SAMPLINGFREQ_SIG +160 0x0004 //RX_SAMPLINGFREQ_PROC +161 0x000A //RX_FRAME_SZ +162 0x0000 //RX_DELAY_OPT +163 0x4000 //RX_TDDRC_ALPHA_UP_1 +164 0x4000 //RX_TDDRC_ALPHA_UP_2 +165 0x4000 //RX_TDDRC_ALPHA_UP_3 +166 0x4000 //RX_TDDRC_ALPHA_UP_4 +167 0x0800 //RX_PGA +168 0x7E56 //RX_A_HP +169 0x4000 //RX_B_PE +170 0x7800 //RX_THR_PITCH_DET_0 +171 0x7000 //RX_THR_PITCH_DET_1 +172 0x6000 //RX_THR_PITCH_DET_2 +173 0x0008 //RX_PITCH_BFR_LEN +174 0x0003 //RX_SBD_PITCH_DET +175 0x0100 //RX_PP_RESRV_0 +176 0x0020 //RX_PP_RESRV_1 +177 0x0400 //RX_N_SN_EST +178 0x000C //RX_N2_SN_EST +179 0x0014 //RX_NS_LVL_CTRL +180 0xF400 //RX_THR_SN_EST +181 0x7E00 //RX_LAMBDA_PFILT +182 0x00C8 //RX_FENS_RESRV_0 +183 0x0190 //RX_FENS_RESRV_1 +184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +187 0x0002 //RX_EXTRA_NS_L +188 0x0800 //RX_EXTRA_NS_A +189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +190 0x7FFF //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +192 0x199A //RX_A_POST_FLT +193 0x0000 //RX_LMT_THRD +194 0x4000 //RX_LMT_ALPHA +195 0x0020 //RX_FDEQ_SUBNUM +196 0x4848 //RX_FDEQ_GAIN_0 +197 0x4848 //RX_FDEQ_GAIN_1 +198 0x4848 //RX_FDEQ_GAIN_2 +199 0x4850 //RX_FDEQ_GAIN_3 +200 0x4848 //RX_FDEQ_GAIN_4 +201 0x4848 //RX_FDEQ_GAIN_5 +202 0x4568 //RX_FDEQ_GAIN_6 +203 0x485C //RX_FDEQ_GAIN_7 +204 0x5C60 //RX_FDEQ_GAIN_8 +205 0x685C //RX_FDEQ_GAIN_9 +206 0x5648 //RX_FDEQ_GAIN_10 +207 0x484C //RX_FDEQ_GAIN_11 +208 0x706C //RX_FDEQ_GAIN_12 +209 0x7070 //RX_FDEQ_GAIN_13 +210 0x6868 //RX_FDEQ_GAIN_14 +211 0x6060 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0202 //RX_FDEQ_BIN_0 +221 0x0203 //RX_FDEQ_BIN_1 +222 0x0303 //RX_FDEQ_BIN_2 +223 0x0402 //RX_FDEQ_BIN_3 +224 0x0504 //RX_FDEQ_BIN_4 +225 0x0209 //RX_FDEQ_BIN_5 +226 0x0808 //RX_FDEQ_BIN_6 +227 0x090A //RX_FDEQ_BIN_7 +228 0x0B0C //RX_FDEQ_BIN_8 +229 0x0D0E //RX_FDEQ_BIN_9 +230 0x1013 //RX_FDEQ_BIN_10 +231 0x1719 //RX_FDEQ_BIN_11 +232 0x1B1E //RX_FDEQ_BIN_12 +233 0x1E1E //RX_FDEQ_BIN_13 +234 0x1E28 //RX_FDEQ_BIN_14 +235 0x282C //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x4000 //RX_FDEQ_RESRV_0 +245 0x0320 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0030 //RX_FDDRC_BAND_MARGIN_1 +248 0x0050 //RX_FDDRC_BAND_MARGIN_2 +249 0x0080 //RX_FDDRC_BAND_MARGIN_3 +250 0x0004 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x2000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x2000 //RX_FDDRC_THRD_3_2 +258 0x5000 //RX_FDDRC_THRD_3_3 +259 0x4000 //RX_FDDRC_SLANT_0_0 +260 0x4000 //RX_FDDRC_SLANT_0_1 +261 0x4000 //RX_FDDRC_SLANT_0_2 +262 0x4000 //RX_FDDRC_SLANT_0_3 +263 0x7FFF //RX_FDDRC_SLANT_1_0 +264 0x7FFF //RX_FDDRC_SLANT_1_1 +265 0x7FFF //RX_FDDRC_SLANT_1_2 +266 0x7FFF //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +268 0x0002 //RX_FILTINDX +269 0x0001 //RX_TDDRC_THRD_0 +270 0x0002 //RX_TDDRC_THRD_1 +271 0x1800 //RX_TDDRC_THRD_2 +272 0x1800 //RX_TDDRC_THRD_3 +273 0x6000 //RX_TDDRC_SLANT_0 +274 0x6E00 //RX_TDDRC_SLANT_1 +275 0x4000 //RX_TDDRC_ALPHA_UP_0 +276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x199A //RX_TDDRC_HMNC_GAIN +279 0x0001 //RX_TDDRC_SMT_FLAG +280 0x0CCD //RX_TDDRC_SMT_W +281 0x02D2 //RX_TDDRC_DRC_GAIN +282 0x7C00 //RX_LAMBDA_PKA_FP +283 0x2000 //RX_TPKA_FP +284 0x2000 //RX_MIN_G_FP +285 0x0080 //RX_MAX_G_FP +286 0x0013 //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 +288 0x0000 //RX_MAXLEVEL_CNG +289 0x3000 //RX_BWE_UV_TH +290 0x3000 //RX_BWE_UV_TH2 +291 0x1800 //RX_BWE_UV_TH3 +292 0x1000 //RX_BWE_V_TH +293 0x04CD //RX_BWE_GAIN1_V_TH1 +294 0x0F33 //RX_BWE_GAIN1_V_TH2 +295 0x7333 //RX_BWE_UV_EQ +296 0x199A //RX_BWE_V_EQ +297 0x7333 //RX_BWE_TONE_TH +298 0x0004 //RX_BWE_UV_HOLD_T +299 0x6CCD //RX_BWE_GAIN2_ALPHA +300 0x799A //RX_BWE_GAIN3_ALPHA +301 0x001E //RX_BWE_CUTOFF +302 0x3000 //RX_BWE_GAINFILL +303 0x3200 //RX_BWE_MAXTH_TONE +304 0x2000 //RX_BWE_EQ_0 +305 0x2000 //RX_BWE_EQ_1 +306 0x2000 //RX_BWE_EQ_2 +307 0x2000 //RX_BWE_EQ_3 +308 0x2000 //RX_BWE_EQ_4 +309 0x2000 //RX_BWE_EQ_5 +310 0x2000 //RX_BWE_EQ_6 +311 0x0000 //RX_BWE_RESRV_0 +312 0x0000 //RX_BWE_RESRV_1 +313 0x0000 //RX_BWE_RESRV_2 +#VOL 0 +163 0x4000 //RX_TDDRC_ALPHA_UP_1 +164 0x4000 //RX_TDDRC_ALPHA_UP_2 +165 0x4000 //RX_TDDRC_ALPHA_UP_3 +166 0x4000 //RX_TDDRC_ALPHA_UP_4 +184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +190 0x7FFF //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +269 0x0001 //RX_TDDRC_THRD_0 +270 0x0002 //RX_TDDRC_THRD_1 +271 0x1800 //RX_TDDRC_THRD_2 +272 0x1800 //RX_TDDRC_THRD_3 +273 0x6000 //RX_TDDRC_SLANT_0 +274 0x6E00 //RX_TDDRC_SLANT_1 +275 0x4000 //RX_TDDRC_ALPHA_UP_0 +276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x199A //RX_TDDRC_HMNC_GAIN +279 0x0001 //RX_TDDRC_SMT_FLAG +280 0x0CCD //RX_TDDRC_SMT_W +281 0x02D2 //RX_TDDRC_DRC_GAIN +195 0x0020 //RX_FDEQ_SUBNUM +196 0x4848 //RX_FDEQ_GAIN_0 +197 0x4848 //RX_FDEQ_GAIN_1 +198 0x4848 //RX_FDEQ_GAIN_2 +199 0x4850 //RX_FDEQ_GAIN_3 +200 0x4848 //RX_FDEQ_GAIN_4 +201 0x4848 //RX_FDEQ_GAIN_5 +202 0x4568 //RX_FDEQ_GAIN_6 +203 0x485C //RX_FDEQ_GAIN_7 +204 0x5C60 //RX_FDEQ_GAIN_8 +205 0x685C //RX_FDEQ_GAIN_9 +206 0x5648 //RX_FDEQ_GAIN_10 +207 0x484C //RX_FDEQ_GAIN_11 +208 0x706C //RX_FDEQ_GAIN_12 +209 0x7070 //RX_FDEQ_GAIN_13 +210 0x6868 //RX_FDEQ_GAIN_14 +211 0x6060 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0202 //RX_FDEQ_BIN_0 +221 0x0203 //RX_FDEQ_BIN_1 +222 0x0303 //RX_FDEQ_BIN_2 +223 0x0402 //RX_FDEQ_BIN_3 +224 0x0504 //RX_FDEQ_BIN_4 +225 0x0209 //RX_FDEQ_BIN_5 +226 0x0808 //RX_FDEQ_BIN_6 +227 0x090A //RX_FDEQ_BIN_7 +228 0x0B0C //RX_FDEQ_BIN_8 +229 0x0D0E //RX_FDEQ_BIN_9 +230 0x1013 //RX_FDEQ_BIN_10 +231 0x1719 //RX_FDEQ_BIN_11 +232 0x1B1E //RX_FDEQ_BIN_12 +233 0x1E1E //RX_FDEQ_BIN_13 +234 0x1E28 //RX_FDEQ_BIN_14 +235 0x282C //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x4000 //RX_FDEQ_RESRV_0 +245 0x0320 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0030 //RX_FDDRC_BAND_MARGIN_1 +248 0x0050 //RX_FDDRC_BAND_MARGIN_2 +249 0x0080 //RX_FDDRC_BAND_MARGIN_3 +250 0x0004 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x2000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x2000 //RX_FDDRC_THRD_3_2 +258 0x5000 //RX_FDDRC_THRD_3_3 +259 0x4000 //RX_FDDRC_SLANT_0_0 +260 0x4000 //RX_FDDRC_SLANT_0_1 +261 0x4000 //RX_FDDRC_SLANT_0_2 +262 0x4000 //RX_FDDRC_SLANT_0_3 +263 0x7FFF //RX_FDDRC_SLANT_1_0 +264 0x7FFF //RX_FDDRC_SLANT_1_1 +265 0x7FFF //RX_FDDRC_SLANT_1_2 +266 0x7FFF //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +286 0x0013 //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 +#VOL 1 +163 0x4000 //RX_TDDRC_ALPHA_UP_1 +164 0x4000 //RX_TDDRC_ALPHA_UP_2 +165 0x4000 //RX_TDDRC_ALPHA_UP_3 +166 0x4000 //RX_TDDRC_ALPHA_UP_4 +184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +190 0x7FFF //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +269 0x0001 //RX_TDDRC_THRD_0 +270 0x0002 //RX_TDDRC_THRD_1 +271 0x1800 //RX_TDDRC_THRD_2 +272 0x1800 //RX_TDDRC_THRD_3 +273 0x6000 //RX_TDDRC_SLANT_0 +274 0x6E00 //RX_TDDRC_SLANT_1 +275 0x4000 //RX_TDDRC_ALPHA_UP_0 +276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x199A //RX_TDDRC_HMNC_GAIN +279 0x0001 //RX_TDDRC_SMT_FLAG +280 0x0CCD //RX_TDDRC_SMT_W +281 0x02D2 //RX_TDDRC_DRC_GAIN +195 0x0020 //RX_FDEQ_SUBNUM +196 0x4848 //RX_FDEQ_GAIN_0 +197 0x4848 //RX_FDEQ_GAIN_1 +198 0x4848 //RX_FDEQ_GAIN_2 +199 0x4850 //RX_FDEQ_GAIN_3 +200 0x4848 //RX_FDEQ_GAIN_4 +201 0x4848 //RX_FDEQ_GAIN_5 +202 0x4568 //RX_FDEQ_GAIN_6 +203 0x485C //RX_FDEQ_GAIN_7 +204 0x5C60 //RX_FDEQ_GAIN_8 +205 0x685C //RX_FDEQ_GAIN_9 +206 0x5648 //RX_FDEQ_GAIN_10 +207 0x484C //RX_FDEQ_GAIN_11 +208 0x706C //RX_FDEQ_GAIN_12 +209 0x7070 //RX_FDEQ_GAIN_13 +210 0x6868 //RX_FDEQ_GAIN_14 +211 0x6060 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0202 //RX_FDEQ_BIN_0 +221 0x0203 //RX_FDEQ_BIN_1 +222 0x0303 //RX_FDEQ_BIN_2 +223 0x0402 //RX_FDEQ_BIN_3 +224 0x0504 //RX_FDEQ_BIN_4 +225 0x0209 //RX_FDEQ_BIN_5 +226 0x0808 //RX_FDEQ_BIN_6 +227 0x090A //RX_FDEQ_BIN_7 +228 0x0B0C //RX_FDEQ_BIN_8 +229 0x0D0E //RX_FDEQ_BIN_9 +230 0x1013 //RX_FDEQ_BIN_10 +231 0x1719 //RX_FDEQ_BIN_11 +232 0x1B1E //RX_FDEQ_BIN_12 +233 0x1E1E //RX_FDEQ_BIN_13 +234 0x1E28 //RX_FDEQ_BIN_14 +235 0x282C //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x4000 //RX_FDEQ_RESRV_0 +245 0x0320 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0030 //RX_FDDRC_BAND_MARGIN_1 +248 0x0050 //RX_FDDRC_BAND_MARGIN_2 +249 0x0080 //RX_FDDRC_BAND_MARGIN_3 +250 0x0004 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x2000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x2000 //RX_FDDRC_THRD_3_2 +258 0x5000 //RX_FDDRC_THRD_3_3 +259 0x4000 //RX_FDDRC_SLANT_0_0 +260 0x4000 //RX_FDDRC_SLANT_0_1 +261 0x4000 //RX_FDDRC_SLANT_0_2 +262 0x4000 //RX_FDDRC_SLANT_0_3 +263 0x7FFF //RX_FDDRC_SLANT_1_0 +264 0x7FFF //RX_FDDRC_SLANT_1_1 +265 0x7FFF //RX_FDDRC_SLANT_1_2 +266 0x7FFF //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +286 0x001C //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 +#VOL 2 +163 0x4000 //RX_TDDRC_ALPHA_UP_1 +164 0x4000 //RX_TDDRC_ALPHA_UP_2 +165 0x4000 //RX_TDDRC_ALPHA_UP_3 +166 0x4000 //RX_TDDRC_ALPHA_UP_4 +184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +190 0x7FFF //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +269 0x0001 //RX_TDDRC_THRD_0 +270 0x0002 //RX_TDDRC_THRD_1 +271 0x1800 //RX_TDDRC_THRD_2 +272 0x1800 //RX_TDDRC_THRD_3 +273 0x6000 //RX_TDDRC_SLANT_0 +274 0x6E00 //RX_TDDRC_SLANT_1 +275 0x4000 //RX_TDDRC_ALPHA_UP_0 +276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x199A //RX_TDDRC_HMNC_GAIN +279 0x0001 //RX_TDDRC_SMT_FLAG +280 0x0CCD //RX_TDDRC_SMT_W +281 0x02D2 //RX_TDDRC_DRC_GAIN +195 0x0020 //RX_FDEQ_SUBNUM +196 0x4848 //RX_FDEQ_GAIN_0 +197 0x4848 //RX_FDEQ_GAIN_1 +198 0x4848 //RX_FDEQ_GAIN_2 +199 0x4850 //RX_FDEQ_GAIN_3 +200 0x4848 //RX_FDEQ_GAIN_4 +201 0x4848 //RX_FDEQ_GAIN_5 +202 0x4568 //RX_FDEQ_GAIN_6 +203 0x485C //RX_FDEQ_GAIN_7 +204 0x5C60 //RX_FDEQ_GAIN_8 +205 0x685C //RX_FDEQ_GAIN_9 +206 0x5648 //RX_FDEQ_GAIN_10 +207 0x484C //RX_FDEQ_GAIN_11 +208 0x706C //RX_FDEQ_GAIN_12 +209 0x7070 //RX_FDEQ_GAIN_13 +210 0x6868 //RX_FDEQ_GAIN_14 +211 0x6060 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0202 //RX_FDEQ_BIN_0 +221 0x0203 //RX_FDEQ_BIN_1 +222 0x0303 //RX_FDEQ_BIN_2 +223 0x0402 //RX_FDEQ_BIN_3 +224 0x0504 //RX_FDEQ_BIN_4 +225 0x0209 //RX_FDEQ_BIN_5 +226 0x0808 //RX_FDEQ_BIN_6 +227 0x090A //RX_FDEQ_BIN_7 +228 0x0B0C //RX_FDEQ_BIN_8 +229 0x0D0E //RX_FDEQ_BIN_9 +230 0x1013 //RX_FDEQ_BIN_10 +231 0x1719 //RX_FDEQ_BIN_11 +232 0x1B1E //RX_FDEQ_BIN_12 +233 0x1E1E //RX_FDEQ_BIN_13 +234 0x1E28 //RX_FDEQ_BIN_14 +235 0x282C //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x4000 //RX_FDEQ_RESRV_0 +245 0x0320 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0030 //RX_FDDRC_BAND_MARGIN_1 +248 0x0050 //RX_FDDRC_BAND_MARGIN_2 +249 0x0080 //RX_FDDRC_BAND_MARGIN_3 +250 0x0004 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x2000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x2000 //RX_FDDRC_THRD_3_2 +258 0x5000 //RX_FDDRC_THRD_3_3 +259 0x4000 //RX_FDDRC_SLANT_0_0 +260 0x4000 //RX_FDDRC_SLANT_0_1 +261 0x4000 //RX_FDDRC_SLANT_0_2 +262 0x4000 //RX_FDDRC_SLANT_0_3 +263 0x7FFF //RX_FDDRC_SLANT_1_0 +264 0x7FFF //RX_FDDRC_SLANT_1_1 +265 0x7FFF //RX_FDDRC_SLANT_1_2 +266 0x7FFF //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +286 0x0028 //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 +#VOL 3 +163 0x4000 //RX_TDDRC_ALPHA_UP_1 +164 0x4000 //RX_TDDRC_ALPHA_UP_2 +165 0x4000 //RX_TDDRC_ALPHA_UP_3 +166 0x4000 //RX_TDDRC_ALPHA_UP_4 +184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +190 0x7FFF //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +269 0x0001 //RX_TDDRC_THRD_0 +270 0x0002 //RX_TDDRC_THRD_1 +271 0x1800 //RX_TDDRC_THRD_2 +272 0x1800 //RX_TDDRC_THRD_3 +273 0x6000 //RX_TDDRC_SLANT_0 +274 0x6E00 //RX_TDDRC_SLANT_1 +275 0x4000 //RX_TDDRC_ALPHA_UP_0 +276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x199A //RX_TDDRC_HMNC_GAIN +279 0x0001 //RX_TDDRC_SMT_FLAG +280 0x0CCD //RX_TDDRC_SMT_W +281 0x02D2 //RX_TDDRC_DRC_GAIN +195 0x0020 //RX_FDEQ_SUBNUM +196 0x4848 //RX_FDEQ_GAIN_0 +197 0x4848 //RX_FDEQ_GAIN_1 +198 0x4848 //RX_FDEQ_GAIN_2 +199 0x4850 //RX_FDEQ_GAIN_3 +200 0x4848 //RX_FDEQ_GAIN_4 +201 0x4848 //RX_FDEQ_GAIN_5 +202 0x4568 //RX_FDEQ_GAIN_6 +203 0x485C //RX_FDEQ_GAIN_7 +204 0x5C60 //RX_FDEQ_GAIN_8 +205 0x685C //RX_FDEQ_GAIN_9 +206 0x5648 //RX_FDEQ_GAIN_10 +207 0x484C //RX_FDEQ_GAIN_11 +208 0x706C //RX_FDEQ_GAIN_12 +209 0x7070 //RX_FDEQ_GAIN_13 +210 0x6868 //RX_FDEQ_GAIN_14 +211 0x6060 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0202 //RX_FDEQ_BIN_0 +221 0x0203 //RX_FDEQ_BIN_1 +222 0x0303 //RX_FDEQ_BIN_2 +223 0x0402 //RX_FDEQ_BIN_3 +224 0x0504 //RX_FDEQ_BIN_4 +225 0x0209 //RX_FDEQ_BIN_5 +226 0x0808 //RX_FDEQ_BIN_6 +227 0x090A //RX_FDEQ_BIN_7 +228 0x0B0C //RX_FDEQ_BIN_8 +229 0x0D0E //RX_FDEQ_BIN_9 +230 0x1013 //RX_FDEQ_BIN_10 +231 0x1719 //RX_FDEQ_BIN_11 +232 0x1B1E //RX_FDEQ_BIN_12 +233 0x1E1E //RX_FDEQ_BIN_13 +234 0x1E28 //RX_FDEQ_BIN_14 +235 0x282C //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x4000 //RX_FDEQ_RESRV_0 +245 0x0320 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0030 //RX_FDDRC_BAND_MARGIN_1 +248 0x0050 //RX_FDDRC_BAND_MARGIN_2 +249 0x0080 //RX_FDDRC_BAND_MARGIN_3 +250 0x0004 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x2000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x2000 //RX_FDDRC_THRD_3_2 +258 0x5000 //RX_FDDRC_THRD_3_3 +259 0x4000 //RX_FDDRC_SLANT_0_0 +260 0x4000 //RX_FDDRC_SLANT_0_1 +261 0x4000 //RX_FDDRC_SLANT_0_2 +262 0x4000 //RX_FDDRC_SLANT_0_3 +263 0x7FFF //RX_FDDRC_SLANT_1_0 +264 0x7FFF //RX_FDDRC_SLANT_1_1 +265 0x7FFF //RX_FDDRC_SLANT_1_2 +266 0x7FFF //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +286 0x0035 //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 +#VOL 4 +163 0x4000 //RX_TDDRC_ALPHA_UP_1 +164 0x4000 //RX_TDDRC_ALPHA_UP_2 +165 0x4000 //RX_TDDRC_ALPHA_UP_3 +166 0x4000 //RX_TDDRC_ALPHA_UP_4 +184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +190 0x7FFF //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +269 0x0001 //RX_TDDRC_THRD_0 +270 0x0002 //RX_TDDRC_THRD_1 +271 0x1800 //RX_TDDRC_THRD_2 +272 0x1800 //RX_TDDRC_THRD_3 +273 0x6000 //RX_TDDRC_SLANT_0 +274 0x6E00 //RX_TDDRC_SLANT_1 +275 0x4000 //RX_TDDRC_ALPHA_UP_0 +276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x199A //RX_TDDRC_HMNC_GAIN +279 0x0001 //RX_TDDRC_SMT_FLAG +280 0x0CCD //RX_TDDRC_SMT_W +281 0x02D2 //RX_TDDRC_DRC_GAIN +195 0x0020 //RX_FDEQ_SUBNUM +196 0x4C4C //RX_FDEQ_GAIN_0 +197 0x4C4C //RX_FDEQ_GAIN_1 +198 0x4C48 //RX_FDEQ_GAIN_2 +199 0x4870 //RX_FDEQ_GAIN_3 +200 0x4848 //RX_FDEQ_GAIN_4 +201 0x4848 //RX_FDEQ_GAIN_5 +202 0x4568 //RX_FDEQ_GAIN_6 +203 0x485C //RX_FDEQ_GAIN_7 +204 0x5C60 //RX_FDEQ_GAIN_8 +205 0x685C //RX_FDEQ_GAIN_9 +206 0x5648 //RX_FDEQ_GAIN_10 +207 0x484C //RX_FDEQ_GAIN_11 +208 0x706C //RX_FDEQ_GAIN_12 +209 0x7070 //RX_FDEQ_GAIN_13 +210 0x6868 //RX_FDEQ_GAIN_14 +211 0x6060 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0202 //RX_FDEQ_BIN_0 +221 0x0203 //RX_FDEQ_BIN_1 +222 0x0303 //RX_FDEQ_BIN_2 +223 0x0402 //RX_FDEQ_BIN_3 +224 0x0504 //RX_FDEQ_BIN_4 +225 0x0209 //RX_FDEQ_BIN_5 +226 0x0808 //RX_FDEQ_BIN_6 +227 0x090A //RX_FDEQ_BIN_7 +228 0x0B0C //RX_FDEQ_BIN_8 +229 0x0D0E //RX_FDEQ_BIN_9 +230 0x1013 //RX_FDEQ_BIN_10 +231 0x1719 //RX_FDEQ_BIN_11 +232 0x1B1E //RX_FDEQ_BIN_12 +233 0x1E1E //RX_FDEQ_BIN_13 +234 0x1E28 //RX_FDEQ_BIN_14 +235 0x282C //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x4000 //RX_FDEQ_RESRV_0 +245 0x0320 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0030 //RX_FDDRC_BAND_MARGIN_1 +248 0x0050 //RX_FDDRC_BAND_MARGIN_2 +249 0x0080 //RX_FDDRC_BAND_MARGIN_3 +250 0x0004 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x2000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x2000 //RX_FDDRC_THRD_3_2 +258 0x5000 //RX_FDDRC_THRD_3_3 +259 0x4000 //RX_FDDRC_SLANT_0_0 +260 0x4000 //RX_FDDRC_SLANT_0_1 +261 0x4000 //RX_FDDRC_SLANT_0_2 +262 0x4000 //RX_FDDRC_SLANT_0_3 +263 0x7FFF //RX_FDDRC_SLANT_1_0 +264 0x7FFF //RX_FDDRC_SLANT_1_1 +265 0x7FFF //RX_FDDRC_SLANT_1_2 +266 0x7FFF //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +286 0x0052 //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 +#VOL 5 +163 0x4000 //RX_TDDRC_ALPHA_UP_1 +164 0x4000 //RX_TDDRC_ALPHA_UP_2 +165 0x4000 //RX_TDDRC_ALPHA_UP_3 +166 0x4000 //RX_TDDRC_ALPHA_UP_4 +184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +190 0x7FFF //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +269 0x0001 //RX_TDDRC_THRD_0 +270 0x0002 //RX_TDDRC_THRD_1 +271 0x1800 //RX_TDDRC_THRD_2 +272 0x1800 //RX_TDDRC_THRD_3 +273 0x6000 //RX_TDDRC_SLANT_0 +274 0x6E00 //RX_TDDRC_SLANT_1 +275 0x4000 //RX_TDDRC_ALPHA_UP_0 +276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x199A //RX_TDDRC_HMNC_GAIN +279 0x0001 //RX_TDDRC_SMT_FLAG +280 0x0CCD //RX_TDDRC_SMT_W +281 0x02D2 //RX_TDDRC_DRC_GAIN +195 0x0020 //RX_FDEQ_SUBNUM +196 0x4C4C //RX_FDEQ_GAIN_0 +197 0x4C4C //RX_FDEQ_GAIN_1 +198 0x4C48 //RX_FDEQ_GAIN_2 +199 0x4870 //RX_FDEQ_GAIN_3 +200 0x4848 //RX_FDEQ_GAIN_4 +201 0x4848 //RX_FDEQ_GAIN_5 +202 0x4568 //RX_FDEQ_GAIN_6 +203 0x485C //RX_FDEQ_GAIN_7 +204 0x5C60 //RX_FDEQ_GAIN_8 +205 0x685C //RX_FDEQ_GAIN_9 +206 0x5648 //RX_FDEQ_GAIN_10 +207 0x484C //RX_FDEQ_GAIN_11 +208 0x706C //RX_FDEQ_GAIN_12 +209 0x7070 //RX_FDEQ_GAIN_13 +210 0x6868 //RX_FDEQ_GAIN_14 +211 0x6060 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0202 //RX_FDEQ_BIN_0 +221 0x0203 //RX_FDEQ_BIN_1 +222 0x0303 //RX_FDEQ_BIN_2 +223 0x0402 //RX_FDEQ_BIN_3 +224 0x0504 //RX_FDEQ_BIN_4 +225 0x0209 //RX_FDEQ_BIN_5 +226 0x0808 //RX_FDEQ_BIN_6 +227 0x090A //RX_FDEQ_BIN_7 +228 0x0B0C //RX_FDEQ_BIN_8 +229 0x0D0E //RX_FDEQ_BIN_9 +230 0x1013 //RX_FDEQ_BIN_10 +231 0x1719 //RX_FDEQ_BIN_11 +232 0x1B1E //RX_FDEQ_BIN_12 +233 0x1E1E //RX_FDEQ_BIN_13 +234 0x1E28 //RX_FDEQ_BIN_14 +235 0x282C //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x4000 //RX_FDEQ_RESRV_0 +245 0x0320 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0030 //RX_FDDRC_BAND_MARGIN_1 +248 0x0050 //RX_FDDRC_BAND_MARGIN_2 +249 0x0080 //RX_FDDRC_BAND_MARGIN_3 +250 0x0004 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x2000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x2000 //RX_FDDRC_THRD_3_2 +258 0x5000 //RX_FDDRC_THRD_3_3 +259 0x4000 //RX_FDDRC_SLANT_0_0 +260 0x4000 //RX_FDDRC_SLANT_0_1 +261 0x4000 //RX_FDDRC_SLANT_0_2 +262 0x4000 //RX_FDDRC_SLANT_0_3 +263 0x7FFF //RX_FDDRC_SLANT_1_0 +264 0x7FFF //RX_FDDRC_SLANT_1_1 +265 0x7FFF //RX_FDDRC_SLANT_1_2 +266 0x7FFF //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +286 0x0078 //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 +#VOL 6 +163 0x4000 //RX_TDDRC_ALPHA_UP_1 +164 0x4000 //RX_TDDRC_ALPHA_UP_2 +165 0x4000 //RX_TDDRC_ALPHA_UP_3 +166 0x4000 //RX_TDDRC_ALPHA_UP_4 +184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +190 0x7FFF //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +269 0x0001 //RX_TDDRC_THRD_0 +270 0x0002 //RX_TDDRC_THRD_1 +271 0x1800 //RX_TDDRC_THRD_2 +272 0x1800 //RX_TDDRC_THRD_3 +273 0x6000 //RX_TDDRC_SLANT_0 +274 0x6E00 //RX_TDDRC_SLANT_1 +275 0x4000 //RX_TDDRC_ALPHA_UP_0 +276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x199A //RX_TDDRC_HMNC_GAIN +279 0x0001 //RX_TDDRC_SMT_FLAG +280 0x0CCD //RX_TDDRC_SMT_W +281 0x02D2 //RX_TDDRC_DRC_GAIN +195 0x0020 //RX_FDEQ_SUBNUM +196 0x4C4C //RX_FDEQ_GAIN_0 +197 0x4C4C //RX_FDEQ_GAIN_1 +198 0x4C48 //RX_FDEQ_GAIN_2 +199 0x4870 //RX_FDEQ_GAIN_3 +200 0x4848 //RX_FDEQ_GAIN_4 +201 0x4848 //RX_FDEQ_GAIN_5 +202 0x4568 //RX_FDEQ_GAIN_6 +203 0x485C //RX_FDEQ_GAIN_7 +204 0x5C60 //RX_FDEQ_GAIN_8 +205 0x685C //RX_FDEQ_GAIN_9 +206 0x5648 //RX_FDEQ_GAIN_10 +207 0x484C //RX_FDEQ_GAIN_11 +208 0x706C //RX_FDEQ_GAIN_12 +209 0x7070 //RX_FDEQ_GAIN_13 +210 0x6868 //RX_FDEQ_GAIN_14 +211 0x6060 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0202 //RX_FDEQ_BIN_0 +221 0x0203 //RX_FDEQ_BIN_1 +222 0x0303 //RX_FDEQ_BIN_2 +223 0x0402 //RX_FDEQ_BIN_3 +224 0x0504 //RX_FDEQ_BIN_4 +225 0x0209 //RX_FDEQ_BIN_5 +226 0x0808 //RX_FDEQ_BIN_6 +227 0x090A //RX_FDEQ_BIN_7 +228 0x0B0C //RX_FDEQ_BIN_8 +229 0x0D0E //RX_FDEQ_BIN_9 +230 0x1013 //RX_FDEQ_BIN_10 +231 0x1719 //RX_FDEQ_BIN_11 +232 0x1B1E //RX_FDEQ_BIN_12 +233 0x1E1E //RX_FDEQ_BIN_13 +234 0x1E28 //RX_FDEQ_BIN_14 +235 0x282C //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x4000 //RX_FDEQ_RESRV_0 +245 0x0320 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0030 //RX_FDDRC_BAND_MARGIN_1 +248 0x0050 //RX_FDDRC_BAND_MARGIN_2 +249 0x0080 //RX_FDDRC_BAND_MARGIN_3 +250 0x0004 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x2000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x2000 //RX_FDDRC_THRD_3_2 +258 0x5000 //RX_FDDRC_THRD_3_3 +259 0x4000 //RX_FDDRC_SLANT_0_0 +260 0x4000 //RX_FDDRC_SLANT_0_1 +261 0x4000 //RX_FDDRC_SLANT_0_2 +262 0x4000 //RX_FDDRC_SLANT_0_3 +263 0x7FFF //RX_FDDRC_SLANT_1_0 +264 0x7FFF //RX_FDDRC_SLANT_1_1 +265 0x7FFF //RX_FDDRC_SLANT_1_2 +266 0x7FFF //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +286 0x0100 //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 + +#CASE_NAME HANDSFREE-HANDSFREE-RESERVE2-SWB +#PARAM_MODE FULL +#PARAM_TYPE TX+2RX +#TOTAL_CUSTOM_STEP 7+7 +#TX +0 0x0001 //TX_OPERATION_MODE_0 +1 0x0001 //TX_OPERATION_MODE_1 +2 0x0073 //TX_PATCH_REG +3 0x2F7C //TX_SENDFUNC_MODE_0 +4 0x0001 //TX_SENDFUNC_MODE_1 +5 0x0003 //TX_NUM_MIC +6 0x0003 //TX_SAMPLINGFREQ_SIG +7 0x0003 //TX_SAMPLINGFREQ_PROC +8 0x000A //TX_FRAME_SZ_SIG +9 0x000A //TX_FRAME_SZ +10 0x0000 //TX_DELAY_OPT +11 0x0028 //TX_MAX_TAIL_LENGTH +12 0x0001 //TX_NUM_LOUTCHN +13 0x0001 //TX_MAXNUM_AECREF +14 0x0000 //TX_DBG_FUNC_REG +15 0x0000 //TX_DBG_FUNC_REG1 +16 0x0000 //TX_SYS_RESRV_0 +17 0x0000 //TX_SYS_RESRV_1 +18 0x0000 //TX_SYS_RESRV_2 +19 0x0000 //TX_SYS_RESRV_3 +20 0x0000 //TX_DIST2REF0 +21 0x00A3 //TX_DIST2REF1 +22 0x001B //TX_DIST2REF_02 +23 0x0000 //TX_DIST2REF_03 +24 0x0000 //TX_DIST2REF_04 +25 0x0000 //TX_DIST2REF_05 +26 0x0000 //TX_MMIC +27 0x1000 //TX_PGA_0 +28 0x1000 //TX_PGA_1 +29 0x1000 //TX_PGA_2 +30 0x0000 //TX_PGA_3 +31 0x0000 //TX_PGA_4 +32 0x0000 //TX_PGA_5 +33 0x0001 //TX_MIC_PAIRS +34 0x0000 //TX_MIC_PAIRS_HS +35 0x0002 //TX_MICS_FOR_BF +36 0x0000 //TX_MIC_PAIRS_FORL1 +37 0x0002 //TX_MICS_OF_PAIR0 +38 0x0002 //TX_MICS_OF_PAIR1 +39 0x0002 //TX_MICS_OF_PAIR2 +40 0x0002 //TX_MICS_OF_PAIR3 +41 0x0000 //TX_MIC_DATA_SRC0 +42 0x0002 //TX_MIC_DATA_SRC1 +43 0x0001 //TX_MIC_DATA_SRC2 +44 0x0000 //TX_MIC_DATA_SRC3 +45 0x0000 //TX_MIC_PAIR_CH_04 +46 0x0000 //TX_MIC_PAIR_CH_05 +47 0x0000 //TX_MIC_PAIR_CH_10 +48 0x0000 //TX_MIC_PAIR_CH_11 +49 0x0000 //TX_MIC_PAIR_CH_12 +50 0x0000 //TX_MIC_PAIR_CH_13 +51 0x0000 //TX_MIC_PAIR_CH_14 +52 0x05DC //TX_HD_BIN_MASK +53 0x0010 //TX_HD_SUBAND_MASK +54 0x19A1 //TX_HD_FRAME_AVG_MASK +55 0x0320 //TX_HD_MIN_FRQ +56 0x1000 //TX_HD_ALPHA_PSD +57 0x1100 //TX_T_PHPR1 +58 0x0000 //TX_T_PHPR2 +59 0x0000 //TX_T_PTPR +60 0x0000 //TX_T_PNPR +61 0x0000 //TX_T_PAPR1 +62 0xEE6C //TX_T_PSDVAT +63 0x0800 //TX_CNT +64 0x4000 //TX_ANTI_HOWL_GAIN +65 0x0001 //TX_MICFORBFMARK_0 +66 0x0001 //TX_MICFORBFMARK_1 +67 0x0001 //TX_MICFORBFMARK_2 +68 0x0001 //TX_MICFORBFMARK_3 +69 0x0001 //TX_MICFORBFMARK_4 +70 0x0001 //TX_MICFORBFMARK_5 +71 0x0000 //TX_DIST2REF_10 +72 0x3B33 //TX_DIST2REF_11 +73 0x0A70 //TX_DIST2REF2 +74 0x0000 //TX_DIST2REF_13 +75 0x0000 //TX_DIST2REF_14 +76 0x0000 //TX_DIST2REF_15 +77 0x0000 //TX_DIST2REF_20 +78 0x0000 //TX_DIST2REF_21 +79 0x0000 //TX_DIST2REF_22 +80 0x0000 //TX_DIST2REF_23 +81 0x0000 //TX_DIST2REF_24 +82 0x0000 //TX_DIST2REF_25 +83 0x0000 //TX_DIST2REF_30 +84 0x0000 //TX_DIST2REF_31 +85 0x0000 //TX_DIST2REF_32 +86 0x0000 //TX_DIST2REF_33 +87 0x0000 //TX_DIST2REF_34 +88 0x0000 //TX_DIST2REF_35 +89 0x0000 //TX_MIC_LOC_00 +90 0x0000 //TX_MIC_LOC_01 +91 0x0000 //TX_MIC_LOC_02 +92 0x0000 //TX_MIC_LOC_03 +93 0x0000 //TX_MIC_LOC_04 +94 0x0000 //TX_MIC_LOC_05 +95 0x0000 //TX_MIC_LOC_10 +96 0x0000 //TX_MIC_LOC_11 +97 0x0000 //TX_MIC_LOC_12 +98 0x0000 //TX_MIC_LOC_13 +99 0x0000 //TX_MIC_LOC_14 +100 0x0000 //TX_MIC_LOC_15 +101 0x0000 //TX_MIC_LOC_20 +102 0x0000 //TX_MIC_LOC_21 +103 0x0000 //TX_MIC_LOC_22 +104 0x0000 //TX_MIC_LOC_23 +105 0x0000 //TX_MIC_LOC_24 +106 0x0000 //TX_MIC_LOC_25 +107 0x0800 //TX_MIC_REFBLK_VOLUME +108 0x0CAE //TX_MIC_BLOCK_VOLUME +109 0x0000 //TX_INVERSE_MASK +110 0x0000 //TX_ADCS_MASK +111 0x04D0 //TX_ADCS_GAIN +112 0x4000 //TX_NFC_GAINFAC +113 0x0000 //TX_MAINMIC_BLKFACTOR +114 0x0000 //TX_REFMIC_BLKFACTOR +115 0x0000 //TX_BLMIC_BLKFACTOR +116 0x0000 //TX_BRMIC_BLKFACTOR +117 0x0031 //TX_MICBLK_START_BIN +118 0x0060 //TX_MICBLK_END_BIN +119 0x0015 //TX_MICBLK_FE_HOLD +120 0xFFF2 //TX_MICBLK_MR_EXP_TH +121 0xFFF2 //TX_MICBLK_LR_EXP_TH +122 0x0015 //TX_FENE_HOLD +123 0x4000 //TX_FE_ENER_TH_MTS +124 0x0004 //TX_FE_ENER_TH_EXP +125 0x6000 //TX_C_POST_FLT_MIC_MAINBLK +126 0x6000 //TX_C_POST_FLT_MIC_REFBLK +127 0x0010 //TX_MIC_BLOCK_N +128 0x7B02 //TX_A_HP +129 0x4000 //TX_B_PE +130 0x5000 //TX_THR_PITCH_DET_0 +131 0x4800 //TX_THR_PITCH_DET_1 +132 0x4000 //TX_THR_PITCH_DET_2 +133 0x0008 //TX_PITCH_BFR_LEN +134 0x0003 //TX_SBD_PITCH_DET +135 0x0050 //TX_TD_AEC_L +136 0x4000 //TX_MU0_UNP_TD_AEC +137 0x1000 //TX_MU0_PTD_TD_AEC +138 0x0000 //TX_PP_RESRV_0 +139 0x2A94 //TX_PP_RESRV_1 +140 0x55F0 //TX_PP_RESRV_2 +141 0x0000 //TX_PP_RESRV_3 +142 0x0000 //TX_PP_RESRV_4 +143 0x0000 //TX_PP_RESRV_5 +144 0x0000 //TX_PP_RESRV_6 +145 0x0000 //TX_PP_RESRV_7 +146 0x0028 //TX_TAIL_LENGTH +147 0x0400 //TX_AEC_REF_GAIN_0 +148 0x0800 //TX_AEC_REF_GAIN_1 +149 0x0800 //TX_AEC_REF_GAIN_2 +150 0x7600 //TX_EAD_THR +151 0x1000 //TX_THR_RE_EST +152 0x2000 //TX_MIN_EQ_RE_EST_0 +153 0x0600 //TX_MIN_EQ_RE_EST_1 +154 0x3000 //TX_MIN_EQ_RE_EST_2 +155 0x3000 //TX_MIN_EQ_RE_EST_3 +156 0x3000 //TX_MIN_EQ_RE_EST_4 +157 0x3000 //TX_MIN_EQ_RE_EST_5 +158 0x3000 //TX_MIN_EQ_RE_EST_6 +159 0x1000 //TX_MIN_EQ_RE_EST_7 +160 0x7800 //TX_MIN_EQ_RE_EST_8 +161 0x7800 //TX_MIN_EQ_RE_EST_9 +162 0x7800 //TX_MIN_EQ_RE_EST_10 +163 0x7800 //TX_MIN_EQ_RE_EST_11 +164 0x7800 //TX_MIN_EQ_RE_EST_12 +165 0x3000 //TX_LAMBDA_RE_EST +166 0x3000 //TX_LAMBDA_CB_NLE +167 0x7FFF //TX_C_POST_FLT +168 0x4000 //TX_GAIN_NP +169 0x0180 //TX_SE_HOLD_N +170 0x00C8 //TX_DT_HOLD_N +171 0x0880 //TX_DT2_HOLD_N +172 0x6666 //TX_AEC_RESRV_0 +173 0x0000 //TX_AEC_RESRV_1 +174 0x0014 //TX_AEC_RESRV_2 +175 0x0000 //TX_MIC_DELAY_LENGTH +176 0x0000 //TX_REF_DELAY_LENGTH +177 0x0000 //TX_ADD_LINEIN_GAINL +178 0x0000 //TX_ADD_LINEIN_GAINH +179 0x0000 //TX_MIN_EQ_RE_EST_14 +180 0x0000 //TX_DTD_THR1_8 +181 0x7FFF //TX_DTD_THR2_8 +182 0x0000 //TX_DTD_MIC_BLK2 +183 0x0008 //TX_FRQ_LIN_LEN +184 0x7FFF //TX_FRQ_AEC_LEN_RHO +185 0x6000 //TX_MU0_UNP_FRQ_AEC +186 0x4000 //TX_MU0_PTD_FRQ_AEC +187 0x000A //TX_MINENOISETH +188 0x0800 //TX_MU0_RE_EST +189 0x0001 //TX_AEC_NUM_CH +190 0x0000 //TX_BIGECHOATTENUATION_MAX +191 0x2000 //TX_A_POST_FLT_MICBLK +192 0x0000 //TX_BLKENERTH +193 0x0000 //TX_BLKENERHIGHTH +194 0x0000 //TX_NORMENERTH +195 0x0000 //TX_NORMENERHIGHTH +196 0x0000 //TX_NORMENERHIGHTHL +197 0x7148 //TX_DTD_THR1_0 +198 0x7148 //TX_DTD_THR1_1 +199 0x7148 //TX_DTD_THR1_2 +200 0x7148 //TX_DTD_THR1_3 +201 0x7148 //TX_DTD_THR1_4 +202 0x7700 //TX_DTD_THR1_5 +203 0x7148 //TX_DTD_THR1_6 +204 0x7E00 //TX_DTD_THR2_0 +205 0x7E00 //TX_DTD_THR2_1 +206 0x5000 //TX_DTD_THR2_2 +207 0x5000 //TX_DTD_THR2_3 +208 0x5000 //TX_DTD_THR2_4 +209 0x5000 //TX_DTD_THR2_5 +210 0x5000 //TX_DTD_THR2_6 +211 0x7FFF //TX_DTD_THR3 +212 0x0000 //TX_SPK_CUT_K +213 0x36B0 //TX_DT_CUT_K +214 0x0100 //TX_DT_CUT_THR +215 0x04EB //TX_COMFORT_G +216 0x01F4 //TX_POWER_YOUT_TH +217 0x4000 //TX_FDPFGAINECHO +218 0x0000 //TX_DTD_HD_THR +219 0x0000 //TX_SPK_CUT_K_S +220 0x7FFF //TX_DTD_MIC_BLK +221 0x023E //TX_ADPT_STRICT_L +222 0x023E //TX_ADPT_STRICT_H +223 0x0001 //TX_RATIO_DT_L_TH_LOW +224 0x3A98 //TX_RATIO_DT_H_TH_LOW +225 0x07D0 //TX_RATIO_DT_L_TH_HIGH +226 0x59D8 //TX_RATIO_DT_H_TH_HIGH +227 0x0001 //TX_RATIO_DT_L0_TH +228 0x7FFF //TX_B_POST_FILT_ECHO_L +229 0x7FFF //TX_B_POST_FILT_ECHO_H +230 0x0200 //TX_MIN_G_CTRL_ECHO +231 0x1000 //TX_B_LESSCUT_RTO_ECHO +232 0x0000 //TX_EPD_OFFSET_00 +233 0x0000 //TX_EPD_OFFST_01 +234 0x02BC //TX_RATIO_DT_L0_TH_HIGH +235 0x7FFF //TX_RATIO_DT_H_TH_CUT +236 0x7FFF //TX_MIN_EQ_RE_EST_13 +237 0x0000 //TX_DTD_THR1_7 +238 0x0000 //TX_DTD_THR2_7 +239 0x0800 //TX_DT_RESRV_7 +240 0x0800 //TX_DT_RESRV_8 +241 0x0000 //TX_DT_RESRV_9 +242 0xF800 //TX_THR_SN_EST_0 +243 0xFA00 //TX_THR_SN_EST_1 +244 0xFA00 //TX_THR_SN_EST_2 +245 0xFA00 //TX_THR_SN_EST_3 +246 0xF800 //TX_THR_SN_EST_4 +247 0xFA00 //TX_THR_SN_EST_5 +248 0xF800 //TX_THR_SN_EST_6 +249 0xF800 //TX_THR_SN_EST_7 +250 0x0100 //TX_DELTA_THR_SN_EST_0 +251 0x0100 //TX_DELTA_THR_SN_EST_1 +252 0x0100 //TX_DELTA_THR_SN_EST_2 +253 0x0000 //TX_DELTA_THR_SN_EST_3 +254 0x0100 //TX_DELTA_THR_SN_EST_4 +255 0x0200 //TX_DELTA_THR_SN_EST_5 +256 0x0100 //TX_DELTA_THR_SN_EST_6 +257 0x0200 //TX_DELTA_THR_SN_EST_7 +258 0x4000 //TX_LAMBDA_NN_EST_0 +259 0x4000 //TX_LAMBDA_NN_EST_1 +260 0x4000 //TX_LAMBDA_NN_EST_2 +261 0x4000 //TX_LAMBDA_NN_EST_3 +262 0x4000 //TX_LAMBDA_NN_EST_4 +263 0x4000 //TX_LAMBDA_NN_EST_5 +264 0x4000 //TX_LAMBDA_NN_EST_6 +265 0x4000 //TX_LAMBDA_NN_EST_7 +266 0x0400 //TX_N_SN_EST +267 0x001E //TX_INBEAM_T +268 0x0041 //TX_INBEAMHOLDT +269 0x2000 //TX_G_STRICT +270 0x2000 //TX_EQ_THR_BF +271 0x799A //TX_LAMBDA_EQ_BF +272 0x1000 //TX_NE_RTO_TH +273 0x0400 //TX_NE_RTO_TH_L +274 0x0800 //TX_MAINREFRTOH_TH_H +275 0x0800 //TX_MAINREFRTOH_TH_L +276 0x0800 //TX_MAINREFRTO_TH_H +277 0x0800 //TX_MAINREFRTO_TH_L +278 0x0200 //TX_MAINREFRTO_TH_EQ +279 0x2000 //TX_B_POST_FLT_0 +280 0x1000 //TX_B_POST_FLT_1 +281 0x0010 //TX_NS_LVL_CTRL_0 +282 0x003C //TX_NS_LVL_CTRL_1 +283 0x0024 //TX_NS_LVL_CTRL_2 +284 0x003C //TX_NS_LVL_CTRL_3 +285 0x0014 //TX_NS_LVL_CTRL_4 +286 0x0011 //TX_NS_LVL_CTRL_5 +287 0x003C //TX_NS_LVL_CTRL_6 +288 0x0011 //TX_NS_LVL_CTRL_7 +289 0x0020 //TX_MIN_GAIN_S_0 +290 0x0020 //TX_MIN_GAIN_S_1 +291 0x0020 //TX_MIN_GAIN_S_2 +292 0x0020 //TX_MIN_GAIN_S_3 +293 0x0020 //TX_MIN_GAIN_S_4 +294 0x0020 //TX_MIN_GAIN_S_5 +295 0x0020 //TX_MIN_GAIN_S_6 +296 0x0020 //TX_MIN_GAIN_S_7 +297 0x6000 //TX_NMOS_SUP +298 0x0000 //TX_NS_MAX_PRI_SNR_TH +299 0x0000 //TX_NMOS_SUP_MENSA +300 0x7FFF //TX_SNRI_SUP_0 +301 0x4000 //TX_SNRI_SUP_1 +302 0x4000 //TX_SNRI_SUP_2 +303 0x4000 //TX_SNRI_SUP_3 +304 0x4000 //TX_SNRI_SUP_4 +305 0x4000 //TX_SNRI_SUP_5 +306 0x4000 //TX_SNRI_SUP_6 +307 0x4000 //TX_SNRI_SUP_7 +308 0x7FFF //TX_THR_LFNS +309 0x0018 //TX_G_LFNS +310 0x09C4 //TX_GAIN0_NTH +311 0x000A //TX_MUSIC_MORENS +312 0x7FFF //TX_A_POST_FILT_0 +313 0x2000 //TX_A_POST_FILT_1 +314 0x7FFF //TX_A_POST_FILT_S_0 +315 0x7FFF //TX_A_POST_FILT_S_1 +316 0x7FFF //TX_A_POST_FILT_S_2 +317 0x7FFF //TX_A_POST_FILT_S_3 +318 0x7FFF //TX_A_POST_FILT_S_4 +319 0x7FFF //TX_A_POST_FILT_S_5 +320 0x7FFF //TX_A_POST_FILT_S_6 +321 0x7FFF //TX_A_POST_FILT_S_7 +322 0x2000 //TX_B_POST_FILT_0 +323 0x6000 //TX_B_POST_FILT_1 +324 0x6000 //TX_B_POST_FILT_2 +325 0x6000 //TX_B_POST_FILT_3 +326 0x4000 //TX_B_POST_FILT_4 +327 0x1000 //TX_B_POST_FILT_5 +328 0x1000 //TX_B_POST_FILT_6 +329 0x2000 //TX_B_POST_FILT_7 +330 0x4000 //TX_B_LESSCUT_RTO_S_0 +331 0x7FFF //TX_B_LESSCUT_RTO_S_1 +332 0x7FFF //TX_B_LESSCUT_RTO_S_2 +333 0x7FFF //TX_B_LESSCUT_RTO_S_3 +334 0x7FFF //TX_B_LESSCUT_RTO_S_4 +335 0x6000 //TX_B_LESSCUT_RTO_S_5 +336 0x7FFF //TX_B_LESSCUT_RTO_S_6 +337 0x7FFF //TX_B_LESSCUT_RTO_S_7 +338 0x7F00 //TX_LAMBDA_PFILT +339 0x7F00 //TX_LAMBDA_PFILT_S_0 +340 0x7F00 //TX_LAMBDA_PFILT_S_1 +341 0x7F00 //TX_LAMBDA_PFILT_S_2 +342 0x7F00 //TX_LAMBDA_PFILT_S_3 +343 0x7F00 //TX_LAMBDA_PFILT_S_4 +344 0x7F00 //TX_LAMBDA_PFILT_S_5 +345 0x7F00 //TX_LAMBDA_PFILT_S_6 +346 0x7F00 //TX_LAMBDA_PFILT_S_7 +347 0x0200 //TX_K_PEPPER +348 0x0400 //TX_A_PEPPER +349 0x1EAA //TX_K_PEPPER_HF +350 0x0600 //TX_A_PEPPER_HF +351 0x0001 //TX_HMNC_BST_FLG +352 0x0200 //TX_HMNC_BST_THR +353 0x0040 //TX_DT_BINVAD_TH_0 +354 0x0040 //TX_DT_BINVAD_TH_1 +355 0x0100 //TX_DT_BINVAD_TH_2 +356 0x0100 //TX_DT_BINVAD_TH_3 +357 0x36B0 //TX_DT_BINVAD_ENDF +358 0x0200 //TX_C_POST_FLT_DT +359 0x0CCD //TX_NS_B_POST_FLT_LESSCUT +360 0x0140 //TX_DT_BOOST +361 0x0000 //TX_BF_SGRAD_FLG +362 0x0005 //TX_BF_DVG_TH +363 0x001E //TX_SN_C_F +364 0x0000 //TX_K_APT +365 0x0001 //TX_NOISEDET +366 0x0064 //TX_NDETCT +367 0x0050 //TX_NOISE_TH_0 +368 0x7FFF //TX_NOISE_TH_0_2 +369 0x7FFF //TX_NOISE_TH_0_3 +370 0x07D0 //TX_NOISE_TH_1 +371 0x01F4 //TX_NOISE_TH_2 +372 0x36B0 //TX_NOISE_TH_3 +373 0x2710 //TX_NOISE_TH_4 +374 0x2CEC //TX_NOISE_TH_5 +375 0x7FFF //TX_NOISE_TH_5_2 +376 0x0000 //TX_NOISE_TH_5_3 +377 0x7FFF //TX_NOISE_TH_5_4 +378 0x0DAC //TX_NOISE_TH_6 +379 0x0050 //TX_MINENOISE_TH +380 0xD508 //TX_MORENS_TFMASK_TH +381 0x0001 //TX_DRC_QUIET_FLOOR +382 0x3A98 //TX_RATIODTL_CUT_TH +383 0x07D0 //TX_DT_CUT_K1 +384 0x0666 //TX_OUT_ENER_S_TH_CLEAN +385 0x0666 //TX_OUT_ENER_S_TH_LESSCLEAN +386 0x0333 //TX_OUT_ENER_S_TH_NOISY +387 0x019A //TX_OUT_ENER_TH_NOISE +388 0x0333 //TX_OUT_ENER_TH_SPEECH +389 0x2000 //TX_SN_NPB_GAIN +390 0x0000 //TX_NN_NPB_GAIN +391 0x7FFF //TX_POST_MASK_SUP_HSNE +392 0x1388 //TX_TAIL_DET_TH +393 0x4000 //TX_B_LESSCUT_RTO_WTA +394 0x0000 //TX_MEL_G_R +395 0x0080 //TX_SUPHIGH_TH +396 0x0000 //TX_MASK_G_R +397 0x0002 //TX_EXTRA_NS_L +398 0x1800 //TX_C_POST_FLT_MASK +399 0x7FFF //TX_A_POST_FLT_WNS +400 0x0148 //TX_MIN_G_LOW300HZ +401 0x0001 //TX_MAXLEVEL_CNG +402 0x00B4 //TX_STN_NOISE_TH +403 0x4000 //TX_POST_MASK_SUP +404 0x7FFF //TX_POST_MASK_ADJUST +405 0x00C8 //TX_NS_ENOISE_MIC0_TH +406 0x0050 //TX_MINENOISE_MIC0_TH +407 0x012C //TX_MINENOISE_MIC0_S_TH +408 0x4000 //TX_MIN_G_CTRL_SSNS +409 0x0000 //TX_METAL_RTO_THR +410 0x4848 //TX_NS_FP_K_METAL +411 0x3A98 //TX_NOISEDET_BOOST_TH +412 0x0FA0 //TX_NSMOOTH_TH +413 0x0000 //TX_NS_RESRV_8 +414 0x1800 //TX_RHO_UPB +415 0x0BB8 //TX_N_HOLD_HS +416 0x0050 //TX_N_RHO_BFR0 +417 0x7FFF //TX_LAMBDA_ARSP_EST +418 0x0100 //TX_EXTRA_GAIN_MICBLOCK +419 0x0CCD //TX_THR_STD_NSR +420 0x019A //TX_THR_STD_PLH +421 0x2AF8 //TX_N_HOLD_STD +422 0x0066 //TX_THR_STD_RHO +423 0x2000 //TX_BF_RESET_THR_HS +424 0x09C4 //TX_SB_RTO_MEAN_TH +425 0x0000 //TX_SB_RHO_MEAN_TH_NTALK +426 0x3800 //TX_SB_RTO_MEAN_TH_ABN +427 0x2EE0 //TX_SB_RTO_MEAN_TH_RUB +428 0x0000 //TX_WTA_EN_RTO_TH +429 0x0000 //TX_TOP_ENER_TH_F +430 0x0000 //TX_DESIRED_TALK_HOLDT +431 0x0800 //TX_MIC_BLOCK_FACTOR +432 0x0000 //TX_NSEST_BFRLRNRDC +433 0x0000 //TX_THR_POST_FLT_HS +434 0x0010 //TX_HS_VAD_BIN +435 0x2666 //TX_THR_VAD_HS +436 0x2CCD //TX_MEAN_RTO_MIN_TH2 +437 0x0032 //TX_SILENCE_T +438 0x0000 //TX_A_POST_FLT_WTA +439 0x799A //TX_LAMBDA_PFLT_WTA +440 0x0000 //TX_SB_RHO_MEAN2_TH +441 0x0190 //TX_SB_RHO_MEAN3_TH +442 0x0000 //TX_HS_RESRV_4 +443 0x0000 //TX_HS_RESRV_5 +444 0x003C //TX_DOA_VAD_THR_1 +445 0x0000 //TX_DOA_VAD_THR_2 +446 0x0028 //TX_DOA_VAD_THR1_0 +447 0x0028 //TX_DOA_VAD_THR1_1 +448 0x0000 //TX_SRC_DOA_RNG_LOW_0A +449 0x00B4 //TX_SRC_DOA_RNG_HIGH_0A +450 0x005A //TX_DFLT_SRC_DOA_0A +451 0x0000 //TX_SRC_DOA_RNG_LOW_0B +452 0x0000 //TX_SRC_DOA_RNG_HIGH_0B +453 0x0000 //TX_DFLT_SRC_DOA_0B +454 0x0000 //TX_SRC_DOA_RNG_LOW_0C +455 0x0000 //TX_SRC_DOA_RNG_HIGH_0C +456 0x0000 //TX_DFLT_SRC_DOA_0C +457 0x0000 //TX_SRC_DOA_RNG_LOW_0D +458 0x0000 //TX_SRC_DOA_RNG_HIGH_0D +459 0x0000 //TX_DFLT_SRC_DOA_0D +460 0x0000 //TX_SRC_DOA_RNG_LOW_1A +461 0x00B4 //TX_SRC_DOA_RNG_HIGH_1A +462 0x005A //TX_DFLT_SRC_DOA_1A +463 0x0000 //TX_SRC_DOA_RNG_LOW_1B +464 0x00B4 //TX_SRC_DOA_RNG_HIGH_1B +465 0x005A //TX_DFLT_SRC_DOA_1B +466 0x0000 //TX_SRC_DOA_RNG_LOW_1C +467 0x00B4 //TX_SRC_DOA_RNG_HIGH_1C +468 0x005A //TX_DFLT_SRC_DOA_1C +469 0x0000 //TX_SRC_DOA_RNG_LOW_1D +470 0x00B4 //TX_SRC_DOA_RNG_HIGH_1D +471 0x005A //TX_DFLT_SRC_DOA_1D +472 0x0100 //TX_BF_HOLDOFF_T +473 0x7FFF //TX_DOA_COST_FACTOR +474 0x4000 //TX_MAINTOREFR_TH0 +475 0x071C //TX_DOA_TRK_THR +476 0x012C //TX_DOA_TRACK_HT +477 0x0200 //TX_N1_HOLD_HF +478 0x0100 //TX_N2_HOLD_HF +479 0x3000 //TX_BF_RESET_THR_HF +480 0x7333 //TX_DOA_SMOOTH +481 0x0800 //TX_MU_BF +482 0x0800 //TX_BF_MU_LF_B2 +483 0x0040 //TX_BF_FC_END_BIN_B2 +484 0x0020 //TX_BF_FC_END_BIN +485 0x0000 //TX_HF_RESRV_25 +486 0x0000 //TX_HF_RESRV_26 +487 0x0007 //TX_N_DOA_SEED +488 0x0001 //TX_FINE_DOA_SEARCH_FLG +489 0x0000 //TX_HF_RESRV_27 +490 0x038E //TX_DLT_SRC_DOA_RNG +491 0x0200 //TX_BF_MU_LF +492 0x0000 //TX_DFLT_SRC_LOC_0 +493 0x7FFF //TX_DFLT_SRC_LOC_1 +494 0x0000 //TX_DFLT_SRC_LOC_2 +495 0x038E //TX_DOA_TRACK_VADTH +496 0x0000 //TX_DOA_TRACK_NEW +497 0x0230 //TX_NOR_OFF_THR +498 0x0CCD //TX_MORE_ON_700HZ_THR +499 0x0000 //TX_MU_BF_ADPT_NS +500 0x0000 //TX_ADAPT_LEN +501 0x2000 //TX_MORE_SNS +502 0x0000 //TX_NOR_OFF_TH1 +503 0x0000 //TX_WIDE_MASK_TH +504 0x4650 //TX_SUBSNRATIOHIGH4MEANBCK_THR +505 0x4000 //TX_C_POST_FLT_CUT +506 0x2000 //TX_RADIODTLV +507 0x0320 //TX_POWER_LINEIN_TH +508 0x0014 //TX_FE_VADCOUNT_TH_FC +509 0x000A //TX_ECHO_SUPP_FC +510 0x0C80 //TX_ECHO_TH +511 0x6666 //TX_MIC_TO_BFGAIN +512 0x0000 //TX_MICTOBFGAIN0 +513 0x0000 //TX_FASTMUE_TH +514 0x3000 //TX_DEREVERB_LF_MU +515 0x34CD //TX_DEREVERB_HF_MU +516 0x0007 //TX_DEREVERB_DELAY +517 0x0004 //TX_DEREVERB_COEF_LEN +518 0x0003 //TX_DEREVERB_DNR +519 0x0000 //TX_DEREVERB_ALPHA +520 0x0000 //TX_DEREVERB_BETA +521 0x3A98 //TX_GSC_RTOL_TH +522 0x3A98 //TX_GSC_RTOH_TH +523 0x7E2C //TX_WIDE2_MEANHTH +524 0x0000 //TX_DR_RESRV_5 +525 0x0000 //TX_DR_RESRV_6 +526 0x0000 //TX_DR_RESRV_7 +527 0x0000 //TX_DR_RESRV_8 +528 0x1333 //TX_WIND_MARK_TH +529 0x399A //TX_CORR_THR +530 0x0004 //TX_SNR_THR +531 0x0010 //TX_ENGY_THR +532 0x1770 //TX_CORR_HIGH_TH +533 0x6000 //TX_ENGY_THR_2 +534 0x3400 //TX_MEAN_RTO_THR +535 0x0028 //TX_WNS_ENOISE_MIC0_TH +536 0x3000 //TX_RATIOMICL_TH +537 0x64CD //TX_CALIG_HS +538 0x0000 //TX_LVL_CTRL +539 0x0014 //TX_WIND_SUPRTO +540 0x000A //TX_WNS_MIN_G +541 0x0000 //TX_WNS_B_POST_FLT +542 0x2800 //TX_RATIOMICH_TH +543 0xD120 //TX_WIND_INBEAM_L_TH +544 0x0FA0 //TX_WIND_INBEAM_H_TH +545 0x2000 //TX_WNS_RESRV_0 +546 0x59D8 //TX_WNS_RESRV_1 +547 0x0000 //TX_WNS_RESRV_2 +548 0x0000 //TX_WNS_RESRV_3 +549 0x0000 //TX_WNS_RESRV_4 +550 0x0000 //TX_WNS_RESRV_5 +551 0x0000 //TX_WNS_RESRV_6 +552 0x0000 //TX_PB_B_POST_FLT_LESSCUT +553 0x0070 //TX_BF_LESSCUT_BBIN +554 0x0070 //TX_BF_LESSCUT_EBIN +555 0x0010 //TX_POSTBFB0 +556 0x0070 //TX_POSTBFB +557 0x00B0 //TX_POSTBFE +558 0x0E66 //TX_SPEECH_SNR_TH +559 0x0050 //TX_PB_MAX_PRI_SNR_TH +560 0x770A //TX_MAX_PRI_SNR_TH_L +561 0x0000 //TX_PFGAIN +562 0x0000 //TX_MAINTOREFR_TH +563 0x0000 //TX_SAM_MARK +564 0x0000 //TX_PB_RESRV_0 +565 0x0000 //TX_PB_RESRV_1 +566 0x0020 //TX_FDEQ_SUBNUM +567 0x4848 //TX_FDEQ_GAIN_0 +568 0x4848 //TX_FDEQ_GAIN_1 +569 0x4850 //TX_FDEQ_GAIN_2 +570 0x5050 //TX_FDEQ_GAIN_3 +571 0x4848 //TX_FDEQ_GAIN_4 +572 0x4850 //TX_FDEQ_GAIN_5 +573 0x5261 //TX_FDEQ_GAIN_6 +574 0x5C4C //TX_FDEQ_GAIN_7 +575 0x4C4E //TX_FDEQ_GAIN_8 +576 0x4848 //TX_FDEQ_GAIN_9 +577 0x4C4F //TX_FDEQ_GAIN_10 +578 0x5153 //TX_FDEQ_GAIN_11 +579 0x6265 //TX_FDEQ_GAIN_12 +580 0x638B //TX_FDEQ_GAIN_13 +581 0x8480 //TX_FDEQ_GAIN_14 +582 0x7A7C //TX_FDEQ_GAIN_15 +583 0x4848 //TX_FDEQ_GAIN_16 +584 0x4848 //TX_FDEQ_GAIN_17 +585 0x4848 //TX_FDEQ_GAIN_18 +586 0x4848 //TX_FDEQ_GAIN_19 +587 0x4848 //TX_FDEQ_GAIN_20 +588 0x4848 //TX_FDEQ_GAIN_21 +589 0x4848 //TX_FDEQ_GAIN_22 +590 0x4848 //TX_FDEQ_GAIN_23 +591 0x0202 //TX_FDEQ_BIN_0 +592 0x0203 //TX_FDEQ_BIN_1 +593 0x0303 //TX_FDEQ_BIN_2 +594 0x0304 //TX_FDEQ_BIN_3 +595 0x0405 //TX_FDEQ_BIN_4 +596 0x0506 //TX_FDEQ_BIN_5 +597 0x0708 //TX_FDEQ_BIN_6 +598 0x090A //TX_FDEQ_BIN_7 +599 0x0B0C //TX_FDEQ_BIN_8 +600 0x0D0E //TX_FDEQ_BIN_9 +601 0x1013 //TX_FDEQ_BIN_10 +602 0x1719 //TX_FDEQ_BIN_11 +603 0x1B1E //TX_FDEQ_BIN_12 +604 0x1E1E //TX_FDEQ_BIN_13 +605 0x1E28 //TX_FDEQ_BIN_14 +606 0x284A //TX_FDEQ_BIN_15 +607 0x0000 //TX_FDEQ_BIN_16 +608 0x0000 //TX_FDEQ_BIN_17 +609 0x0000 //TX_FDEQ_BIN_18 +610 0x0000 //TX_FDEQ_BIN_19 +611 0x0000 //TX_FDEQ_BIN_20 +612 0x0000 //TX_FDEQ_BIN_21 +613 0x0000 //TX_FDEQ_BIN_22 +614 0x0000 //TX_FDEQ_BIN_23 +615 0x0000 //TX_FDEQ_PADDING +616 0x0020 //TX_PREEQ_SUBNUM_MIC0 +617 0x4848 //TX_PREEQ_GAIN_MIC0_0 +618 0x4848 //TX_PREEQ_GAIN_MIC0_1 +619 0x4848 //TX_PREEQ_GAIN_MIC0_2 +620 0x4848 //TX_PREEQ_GAIN_MIC0_3 +621 0x4848 //TX_PREEQ_GAIN_MIC0_4 +622 0x4848 //TX_PREEQ_GAIN_MIC0_5 +623 0x4848 //TX_PREEQ_GAIN_MIC0_6 +624 0x4848 //TX_PREEQ_GAIN_MIC0_7 +625 0x4848 //TX_PREEQ_GAIN_MIC0_8 +626 0x4848 //TX_PREEQ_GAIN_MIC0_9 +627 0x4848 //TX_PREEQ_GAIN_MIC0_10 +628 0x4848 //TX_PREEQ_GAIN_MIC0_11 +629 0x4848 //TX_PREEQ_GAIN_MIC0_12 +630 0x4848 //TX_PREEQ_GAIN_MIC0_13 +631 0x4848 //TX_PREEQ_GAIN_MIC0_14 +632 0x4848 //TX_PREEQ_GAIN_MIC0_15 +633 0x4848 //TX_PREEQ_GAIN_MIC0_16 +634 0x4848 //TX_PREEQ_GAIN_MIC0_17 +635 0x4848 //TX_PREEQ_GAIN_MIC0_18 +636 0x4848 //TX_PREEQ_GAIN_MIC0_19 +637 0x4848 //TX_PREEQ_GAIN_MIC0_20 +638 0x4848 //TX_PREEQ_GAIN_MIC0_21 +639 0x4848 //TX_PREEQ_GAIN_MIC0_22 +640 0x4848 //TX_PREEQ_GAIN_MIC0_23 +641 0x0202 //TX_PREEQ_BIN_MIC0_0 +642 0x0203 //TX_PREEQ_BIN_MIC0_1 +643 0x0303 //TX_PREEQ_BIN_MIC0_2 +644 0x0304 //TX_PREEQ_BIN_MIC0_3 +645 0x0405 //TX_PREEQ_BIN_MIC0_4 +646 0x0506 //TX_PREEQ_BIN_MIC0_5 +647 0x0708 //TX_PREEQ_BIN_MIC0_6 +648 0x090A //TX_PREEQ_BIN_MIC0_7 +649 0x0B0C //TX_PREEQ_BIN_MIC0_8 +650 0x0D0E //TX_PREEQ_BIN_MIC0_9 +651 0x1013 //TX_PREEQ_BIN_MIC0_10 +652 0x1719 //TX_PREEQ_BIN_MIC0_11 +653 0x1B1E //TX_PREEQ_BIN_MIC0_12 +654 0x1E1E //TX_PREEQ_BIN_MIC0_13 +655 0x1E28 //TX_PREEQ_BIN_MIC0_14 +656 0x3042 //TX_PREEQ_BIN_MIC0_15 +657 0x0000 //TX_PREEQ_BIN_MIC0_16 +658 0x0000 //TX_PREEQ_BIN_MIC0_17 +659 0x0000 //TX_PREEQ_BIN_MIC0_18 +660 0x0000 //TX_PREEQ_BIN_MIC0_19 +661 0x0000 //TX_PREEQ_BIN_MIC0_20 +662 0x0000 //TX_PREEQ_BIN_MIC0_21 +663 0x0000 //TX_PREEQ_BIN_MIC0_22 +664 0x0000 //TX_PREEQ_BIN_MIC0_23 +665 0x0020 //TX_PREEQ_SUBNUM_MIC1 +666 0x4848 //TX_PREEQ_GAIN_MIC1_0 +667 0x4848 //TX_PREEQ_GAIN_MIC1_1 +668 0x4848 //TX_PREEQ_GAIN_MIC1_2 +669 0x4848 //TX_PREEQ_GAIN_MIC1_3 +670 0x4848 //TX_PREEQ_GAIN_MIC1_4 +671 0x4848 //TX_PREEQ_GAIN_MIC1_5 +672 0x494A //TX_PREEQ_GAIN_MIC1_6 +673 0x4B4C //TX_PREEQ_GAIN_MIC1_7 +674 0x4D4E //TX_PREEQ_GAIN_MIC1_8 +675 0x4F52 //TX_PREEQ_GAIN_MIC1_9 +676 0x5355 //TX_PREEQ_GAIN_MIC1_10 +677 0x585C //TX_PREEQ_GAIN_MIC1_11 +678 0x616A //TX_PREEQ_GAIN_MIC1_12 +679 0x726E //TX_PREEQ_GAIN_MIC1_13 +680 0x5C48 //TX_PREEQ_GAIN_MIC1_14 +681 0x3B38 //TX_PREEQ_GAIN_MIC1_15 +682 0x4848 //TX_PREEQ_GAIN_MIC1_16 +683 0x4848 //TX_PREEQ_GAIN_MIC1_17 +684 0x4848 //TX_PREEQ_GAIN_MIC1_18 +685 0x4848 //TX_PREEQ_GAIN_MIC1_19 +686 0x4848 //TX_PREEQ_GAIN_MIC1_20 +687 0x4848 //TX_PREEQ_GAIN_MIC1_21 +688 0x4848 //TX_PREEQ_GAIN_MIC1_22 +689 0x4848 //TX_PREEQ_GAIN_MIC1_23 +690 0x0202 //TX_PREEQ_BIN_MIC1_0 +691 0x0203 //TX_PREEQ_BIN_MIC1_1 +692 0x0303 //TX_PREEQ_BIN_MIC1_2 +693 0x0304 //TX_PREEQ_BIN_MIC1_3 +694 0x0405 //TX_PREEQ_BIN_MIC1_4 +695 0x0506 //TX_PREEQ_BIN_MIC1_5 +696 0x0708 //TX_PREEQ_BIN_MIC1_6 +697 0x090A //TX_PREEQ_BIN_MIC1_7 +698 0x0B0C //TX_PREEQ_BIN_MIC1_8 +699 0x0D0E //TX_PREEQ_BIN_MIC1_9 +700 0x1013 //TX_PREEQ_BIN_MIC1_10 +701 0x1719 //TX_PREEQ_BIN_MIC1_11 +702 0x1B1E //TX_PREEQ_BIN_MIC1_12 +703 0x1E1E //TX_PREEQ_BIN_MIC1_13 +704 0x1E28 //TX_PREEQ_BIN_MIC1_14 +705 0x3042 //TX_PREEQ_BIN_MIC1_15 +706 0x0000 //TX_PREEQ_BIN_MIC1_16 +707 0x0000 //TX_PREEQ_BIN_MIC1_17 +708 0x0000 //TX_PREEQ_BIN_MIC1_18 +709 0x0000 //TX_PREEQ_BIN_MIC1_19 +710 0x0000 //TX_PREEQ_BIN_MIC1_20 +711 0x0000 //TX_PREEQ_BIN_MIC1_21 +712 0x0000 //TX_PREEQ_BIN_MIC1_22 +713 0x0000 //TX_PREEQ_BIN_MIC1_23 +714 0x0020 //TX_PREEQ_SUBNUM_MIC2 +715 0x4848 //TX_PREEQ_GAIN_MIC2_0 +716 0x4848 //TX_PREEQ_GAIN_MIC2_1 +717 0x4848 //TX_PREEQ_GAIN_MIC2_2 +718 0x4848 //TX_PREEQ_GAIN_MIC2_3 +719 0x4848 //TX_PREEQ_GAIN_MIC2_4 +720 0x4848 //TX_PREEQ_GAIN_MIC2_5 +721 0x4849 //TX_PREEQ_GAIN_MIC2_6 +722 0x4A4A //TX_PREEQ_GAIN_MIC2_7 +723 0x4B4B //TX_PREEQ_GAIN_MIC2_8 +724 0x4C4D //TX_PREEQ_GAIN_MIC2_9 +725 0x4D4E //TX_PREEQ_GAIN_MIC2_10 +726 0x4F4F //TX_PREEQ_GAIN_MIC2_11 +727 0x504F //TX_PREEQ_GAIN_MIC2_12 +728 0x4C49 //TX_PREEQ_GAIN_MIC2_13 +729 0x4A4C //TX_PREEQ_GAIN_MIC2_14 +730 0x4F5E //TX_PREEQ_GAIN_MIC2_15 +731 0x4848 //TX_PREEQ_GAIN_MIC2_16 +732 0x4848 //TX_PREEQ_GAIN_MIC2_17 +733 0x4848 //TX_PREEQ_GAIN_MIC2_18 +734 0x4848 //TX_PREEQ_GAIN_MIC2_19 +735 0x4848 //TX_PREEQ_GAIN_MIC2_20 +736 0x4848 //TX_PREEQ_GAIN_MIC2_21 +737 0x4848 //TX_PREEQ_GAIN_MIC2_22 +738 0x4848 //TX_PREEQ_GAIN_MIC2_23 +739 0x0202 //TX_PREEQ_BIN_MIC2_0 +740 0x0203 //TX_PREEQ_BIN_MIC2_1 +741 0x0303 //TX_PREEQ_BIN_MIC2_2 +742 0x0304 //TX_PREEQ_BIN_MIC2_3 +743 0x0405 //TX_PREEQ_BIN_MIC2_4 +744 0x0506 //TX_PREEQ_BIN_MIC2_5 +745 0x0708 //TX_PREEQ_BIN_MIC2_6 +746 0x090A //TX_PREEQ_BIN_MIC2_7 +747 0x0B0C //TX_PREEQ_BIN_MIC2_8 +748 0x0D0E //TX_PREEQ_BIN_MIC2_9 +749 0x1013 //TX_PREEQ_BIN_MIC2_10 +750 0x1719 //TX_PREEQ_BIN_MIC2_11 +751 0x1B1E //TX_PREEQ_BIN_MIC2_12 +752 0x1E1E //TX_PREEQ_BIN_MIC2_13 +753 0x1E28 //TX_PREEQ_BIN_MIC2_14 +754 0x363C //TX_PREEQ_BIN_MIC2_15 +755 0x0000 //TX_PREEQ_BIN_MIC2_16 +756 0x0000 //TX_PREEQ_BIN_MIC2_17 +757 0x0000 //TX_PREEQ_BIN_MIC2_18 +758 0x0000 //TX_PREEQ_BIN_MIC2_19 +759 0x0000 //TX_PREEQ_BIN_MIC2_20 +760 0x0000 //TX_PREEQ_BIN_MIC2_21 +761 0x0000 //TX_PREEQ_BIN_MIC2_22 +762 0x0000 //TX_PREEQ_BIN_MIC2_23 +763 0x0006 //TX_MASKING_ABILITY +764 0x0800 //TX_NND_WEIGHT +765 0x0050 //TX_MIC_CALIBRATION_0 +766 0x0065 //TX_MIC_CALIBRATION_1 +767 0x0050 //TX_MIC_CALIBRATION_2 +768 0x0050 //TX_MIC_CALIBRATION_3 +769 0x0046 //TX_MIC_PWR_BIAS_0 +770 0x0040 //TX_MIC_PWR_BIAS_1 +771 0x0046 //TX_MIC_PWR_BIAS_2 +772 0x0046 //TX_MIC_PWR_BIAS_3 +773 0x0000 //TX_GAIN_LIMIT_0 +774 0x000F //TX_GAIN_LIMIT_1 +775 0x0000 //TX_GAIN_LIMIT_2 +776 0x0000 //TX_GAIN_LIMIT_3 +777 0x7F5B //TX_BVE_NOVAD0_ALPHADOWN +778 0x7FDE //TX_BVE_VAD0_ALPHAUP +779 0x7F3A //TX_BVE_VAD0_ALPHADOWN +780 0x2000 //TX_BVE_GAINWEIGHT_NOFEVADLI +781 0x7F5B //TX_BVE_FEVADLI_ALPHA +782 0x7F19 //TX_BVE_NOVAD0_ALPHAUP +783 0x0800 //TX_TDDRC_ALPHA_UP_01 +784 0x0800 //TX_TDDRC_ALPHA_UP_02 +785 0x0800 //TX_TDDRC_ALPHA_UP_03 +786 0x0800 //TX_TDDRC_ALPHA_UP_04 +787 0x7EB8 //TX_TDDRC_ALPHA_DWN_01 +788 0x7EB8 //TX_TDDRC_ALPHA_DWN_02 +789 0x7EB8 //TX_TDDRC_ALPHA_DWN_03 +790 0x7EB8 //TX_TDDRC_ALPHA_DWN_04 +791 0x7FFF //TX_TDDRC_TD_DRC_LIMIT +792 0x0800 //TX_TDDRC_POST_LIMIT_GAIN +793 0x0000 //TX_TDDRC_RESRV_0 +794 0x0000 //TX_TDDRC_RESRV_1 +795 0x0018 //TX_FDDRC_BAND_MARGIN_0 +796 0x0030 //TX_FDDRC_BAND_MARGIN_1 +797 0x0050 //TX_FDDRC_BAND_MARGIN_2 +798 0x0080 //TX_FDDRC_BAND_MARGIN_3 +799 0x0007 //TX_FDDRC_BLOCK_EXP +800 0x5000 //TX_FDDRC_THRD_2_0 +801 0x5000 //TX_FDDRC_THRD_2_1 +802 0x5000 //TX_FDDRC_THRD_2_2 +803 0x5000 //TX_FDDRC_THRD_2_3 +804 0x6400 //TX_FDDRC_THRD_3_0 +805 0x6400 //TX_FDDRC_THRD_3_1 +806 0x6400 //TX_FDDRC_THRD_3_2 +807 0x6400 //TX_FDDRC_THRD_3_3 +808 0x2000 //TX_FDDRC_SLANT_0_0 +809 0x2000 //TX_FDDRC_SLANT_0_1 +810 0x2000 //TX_FDDRC_SLANT_0_2 +811 0x2000 //TX_FDDRC_SLANT_0_3 +812 0x5333 //TX_FDDRC_SLANT_1_0 +813 0x5333 //TX_FDDRC_SLANT_1_1 +814 0x5333 //TX_FDDRC_SLANT_1_2 +815 0x5333 //TX_FDDRC_SLANT_1_3 +816 0x0010 //TX_DEADMIC_SILENCE_TH +817 0x0600 //TX_MIC_DEGRADE_TH +818 0x0078 //TX_DEADMIC_CNT +819 0x0078 //TX_MIC_DEGRADE_CNT +820 0x0000 //TX_FDDRC_RESRV_4 +821 0x0000 //TX_FDDRC_RESRV_5 +822 0x0000 //TX_FDDRC_RESRV_6 +823 0x7FFF //TX_KS_NOISEPASTE_FACTOR +824 0x0001 //TX_KS_CONFIG +825 0x7FFF //TX_KS_GAIN_MIN +826 0x0000 //TX_KS_RESRV_0 +827 0x0000 //TX_KS_RESRV_1 +828 0x0000 //TX_KS_RESRV_2 +829 0x7C00 //TX_LAMBDA_PKA_FP +830 0x2000 //TX_TPKA_FP +831 0x0080 //TX_MIN_G_FP +832 0x2000 //TX_MAX_G_FP +833 0x4848 //TX_FFP_FP_K_METAL +834 0x4000 //TX_A_POST_FLT_FP +835 0x0F5C //TX_RTO_OUTBEAM_TH +836 0x4CCD //TX_TPKA_FP_THD +837 0x0000 //TX_MAX_G_FP_BLK +838 0x0000 //TX_FFP_FADEIN +839 0x0000 //TX_FFP_FADEOUT +840 0x0000 //TX_WHISPERCTH +841 0x0000 //TX_WHISPERHOLDT +842 0x0000 //TX_WHISP_ENTHH +843 0x0000 //TX_WHISP_ENTHL +844 0x0000 //TX_WHISP_RTOTH +845 0x0000 //TX_WHISP_RTOTH2 +846 0x0096 //TX_MUTE_PERIOD +847 0x0000 //TX_FADE_IN_PERIOD +848 0x0100 //TX_FFP_RESRV_2 +849 0x0020 //TX_FFP_RESRV_3 +850 0x0000 //TX_FFP_RESRV_4 +851 0x0000 //TX_FFP_RESRV_5 +852 0x0000 //TX_FFP_RESRV_6 +853 0x0002 //TX_FILTINDX +854 0x0001 //TX_TDDRC_THRD_0 +855 0x0002 //TX_TDDRC_THRD_1 +856 0x1000 //TX_TDDRC_THRD_2 +857 0x1000 //TX_TDDRC_THRD_3 +858 0x6000 //TX_TDDRC_SLANT_0 +859 0x6000 //TX_TDDRC_SLANT_1 +860 0x0800 //TX_TDDRC_ALPHA_UP_00 +861 0x7EB8 //TX_TDDRC_ALPHA_DWN_00 +862 0x0000 //TX_TDDRC_HMNC_FLAG +863 0x199A //TX_TDDRC_HMNC_GAIN +864 0x0000 //TX_TDDRC_SMT_FLAG +865 0x0CCD //TX_TDDRC_SMT_W +866 0x0E21 //TX_TDDRC_DRC_GAIN +867 0x7FFF //TX_TDDRC_LMT_THRD +868 0x0000 //TX_TDDRC_LMT_ALPHA +869 0x0000 //TX_TFMASKLTH +870 0x0000 //TX_TFMASKLTHL +871 0x0CCD //TX_TFMASKHTH +872 0x0CCD //TX_TFMASKLTH_BINVAD +873 0xF333 //TX_TFMASKLTH_NS_EST +874 0x2CCD //TX_TFMASKLTH_DOA +875 0xECCD //TX_TFMASKTH_BLESSCUT +876 0x1000 //TX_B_LESSCUT_RTO_MASK +877 0x3800 //TX_SB_RHO_MEAN_TH_ABN +878 0x2000 //TX_B_POST_FLT_MASK +879 0x0000 //TX_B_POST_FLT_MASK1 +880 0x5333 //TX_GAIN_WIND_MASK +881 0x7FFF //TX_TFMASK_BFSTRICT_MUSIC +882 0x0000 //TX_TFMASK_BFSTRICT_NOMUSIC +883 0x7333 //TX_FASTNS_OUTIN_TH +884 0x0CCD //TX_FASTNS_TFMASK_TH +885 0x0CCD //TX_FASTNS_TFMASKBIN_TH1 +886 0x0CCD //TX_FASTNS_TFMASKBIN_TH2 +887 0x0CCD //TX_FASTNS_TFMASKBIN_TH3 +888 0x00C8 //TX_FASTNS_ARSPC_TH +889 0xC000 //TX_FASTNS_MASK5_TH +890 0x4848 //TX_POSTSSA_MIN_G_VR_MASK +891 0x4000 //TX_A_LESSCUT_RTO_MASK +892 0x1770 //TX_FASTNS_NOISETH +893 0xC000 //TX_FASTNS_SSA_THLFL +894 0xC000 //TX_FASTNS_SSA_THHFL +895 0xCCCC //TX_FASTNS_SSA_THLFH +896 0xD999 //TX_FASTNS_SSA_THHFH +897 0x2339 //TX_SENDFUNC_REG_MICMUTE +898 0x0021 //TX_SENDFUNC_REG_MICMUTE1 +899 0x02BC //TX_MICMUTE_RATIO_THR +900 0x0140 //TX_MICMUTE_AMP_THR +901 0x0004 //TX_MICMUTE_HPF_IND +902 0x00C0 //TX_MICMUTE_LOG_EYR_TH +903 0x0008 //TX_MICMUTE_CVG_TIME +904 0x0008 //TX_MICMUTE_RELEASE_TIME +905 0x01FE //TX_MIC_VOLUME_MIC0MUTE +906 0x0020 //TX_MICMUTE_EPD_OFFSET_0 +907 0x001E //TX_MICMUTE_FRQ_AEC_L +908 0x7999 //TX_MICMUTE_EAD_THR +909 0x7FFF //TX_MICMUTE_LAMBDA_CB_NLE +910 0x7FFF //TX_MICMUTE_LAMBDA_RE_EST +911 0x4000 //TX_DTD_THR1_MICMUTE_0 +912 0x7000 //TX_DTD_THR1_MICMUTE_1 +913 0x7FFF //TX_DTD_THR1_MICMUTE_2 +914 0x7FFF //TX_DTD_THR1_MICMUTE_3 +915 0x6CCC //TX_DTD_THR2_MICMUTE_0 +916 0x0400 //TX_MICMUTE_MIN_EQ_RE_EST_0 +917 0x0400 //TX_MICMUTE_MIN_EQ_RE_EST_1 +918 0x1000 //TX_MICMUTE_MIN_EQ_RE_EST_2 +919 0x7FFF //TX_MICMUTE_MIN_EQ_RE_EST_3 +920 0x7FFF //TX_MICMUTE_MIN_EQ_RE_EST_4 +921 0x4000 //TX_MICMUTE_C_POST_FLT +922 0x03E8 //TX_MICMUTE_DT_CUT_K +923 0x0001 //TX_MICMUTE_DT_CUT_THR +924 0x03E8 //TX_MICMUTE_DT_CUT_K2 +925 0x0001 //TX_MICMUTE_DT_CUT_THR2 +926 0x0064 //TX_MICMUTE_DT2_HOLD_N +927 0x1000 //TX_MICMUTE_RATIODTH_THCUT +928 0x1000 //TX_MICMUTE_B_POST_FLT_ECHOL +929 0x7FFF //TX_MICMUTE_B_POST_FLT_ECHOH +930 0x0400 //TX_MICMUTE_C_POST_FLT_MASK +931 0x7999 //TX_MICMUTE_RATIODTL_CUT_TH +932 0x0258 //TX_MICMUTE_DT_CUT_K1 +933 0x0800 //TX_MICMUTE_N2_SN_EST +934 0xFC00 //TX_MICMUTE_THR_SN_EST_0 +935 0x001C //TX_MICMUTE_MIN_G_CTRL_0 +936 0x6000 //TX_MICMUTE_A_POST_FILT_S_0 +937 0x7000 //TX_MICMUTE_B_POST_FILT_0 +938 0x2710 //TX_MIC1RUB_AMP_THR +939 0x0010 //TX_MIC1MUTE_RATIO_THR +940 0x0450 //TX_MIC1MUTE_AMP_THR +941 0x0008 //TX_MIC1MUTE_CVG_TIME +942 0x0008 //TX_MIC1MUTE_RELEASE_TIME +943 0x0000 //TX_AMS_RESRV_01 +944 0x0000 //TX_AMS_RESRV_02 +945 0x0000 //TX_AMS_RESRV_03 +946 0x0000 //TX_AMS_RESRV_04 +947 0x0000 //TX_AMS_RESRV_05 +948 0x0000 //TX_AMS_RESRV_06 +949 0x0000 //TX_AMS_RESRV_07 +950 0x0000 //TX_AMS_RESRV_08 +951 0x0000 //TX_AMS_RESRV_09 +952 0x0000 //TX_AMS_RESRV_10 +953 0x0000 //TX_AMS_RESRV_11 +954 0x0000 //TX_AMS_RESRV_12 +955 0x0000 //TX_AMS_RESRV_13 +956 0x0000 //TX_AMS_RESRV_14 +957 0x0000 //TX_AMS_RESRV_15 +958 0x0000 //TX_AMS_RESRV_16 +959 0x0000 //TX_AMS_RESRV_17 +960 0x0000 //TX_AMS_RESRV_18 +961 0x0000 //TX_AMS_RESRV_19 +#RX +0 0x206C //RX_RECVFUNC_MODE_0 +1 0x0000 //RX_RECVFUNC_MODE_1 +2 0x0003 //RX_SAMPLINGFREQ_SIG +3 0x0003 //RX_SAMPLINGFREQ_PROC +4 0x000A //RX_FRAME_SZ +5 0x0000 //RX_DELAY_OPT +6 0x6000 //RX_TDDRC_ALPHA_UP_1 +7 0x6000 //RX_TDDRC_ALPHA_UP_2 +8 0x6000 //RX_TDDRC_ALPHA_UP_3 +9 0x1000 //RX_TDDRC_ALPHA_UP_4 +10 0x0800 //RX_PGA +11 0x7652 //RX_A_HP +12 0x4000 //RX_B_PE +13 0x7800 //RX_THR_PITCH_DET_0 +14 0x7000 //RX_THR_PITCH_DET_1 +15 0x6000 //RX_THR_PITCH_DET_2 +16 0x0008 //RX_PITCH_BFR_LEN +17 0x0003 //RX_SBD_PITCH_DET +18 0x0100 //RX_PP_RESRV_0 +19 0x0020 //RX_PP_RESRV_1 +20 0x0400 //RX_N_SN_EST +21 0x000C //RX_N2_SN_EST +22 0x0010 //RX_NS_LVL_CTRL +23 0xF800 //RX_THR_SN_EST +24 0x7E00 //RX_LAMBDA_PFILT +25 0x000A //RX_FENS_RESRV_0 +26 0x0190 //RX_FENS_RESRV_1 +27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +30 0x0002 //RX_EXTRA_NS_L +31 0x0800 //RX_EXTRA_NS_A +32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +33 0x7214 //RX_TDDRC_LIMITER_THRD +34 0x0800 //RX_TDDRC_LIMITER_GAIN +35 0x199A //RX_A_POST_FLT +36 0x0000 //RX_LMT_THRD +37 0x4000 //RX_LMT_ALPHA +38 0x0020 //RX_FDEQ_SUBNUM +39 0x4848 //RX_FDEQ_GAIN_0 +40 0x4848 //RX_FDEQ_GAIN_1 +41 0x4340 //RX_FDEQ_GAIN_2 +42 0x3F3D //RX_FDEQ_GAIN_3 +43 0x3935 //RX_FDEQ_GAIN_4 +44 0x3635 //RX_FDEQ_GAIN_5 +45 0x3E46 //RX_FDEQ_GAIN_6 +46 0x494C //RX_FDEQ_GAIN_7 +47 0x4E56 //RX_FDEQ_GAIN_8 +48 0x5F5B //RX_FDEQ_GAIN_9 +49 0x5B48 //RX_FDEQ_GAIN_10 +50 0x4856 //RX_FDEQ_GAIN_11 +51 0x5B60 //RX_FDEQ_GAIN_12 +52 0x7476 //RX_FDEQ_GAIN_13 +53 0x7F7C //RX_FDEQ_GAIN_14 +54 0x7068 //RX_FDEQ_GAIN_15 +55 0x4848 //RX_FDEQ_GAIN_16 +56 0x4848 //RX_FDEQ_GAIN_17 +57 0x4848 //RX_FDEQ_GAIN_18 +58 0x4848 //RX_FDEQ_GAIN_19 +59 0x4848 //RX_FDEQ_GAIN_20 +60 0x4848 //RX_FDEQ_GAIN_21 +61 0x4848 //RX_FDEQ_GAIN_22 +62 0x4848 //RX_FDEQ_GAIN_23 +63 0x0202 //RX_FDEQ_BIN_0 +64 0x0203 //RX_FDEQ_BIN_1 +65 0x0303 //RX_FDEQ_BIN_2 +66 0x0304 //RX_FDEQ_BIN_3 +67 0x0404 //RX_FDEQ_BIN_4 +68 0x0209 //RX_FDEQ_BIN_5 +69 0x0808 //RX_FDEQ_BIN_6 +70 0x090A //RX_FDEQ_BIN_7 +71 0x0B0C //RX_FDEQ_BIN_8 +72 0x0D0E //RX_FDEQ_BIN_9 +73 0x1013 //RX_FDEQ_BIN_10 +74 0x1719 //RX_FDEQ_BIN_11 +75 0x1B1E //RX_FDEQ_BIN_12 +76 0x1E1E //RX_FDEQ_BIN_13 +77 0x1E28 //RX_FDEQ_BIN_14 +78 0x282C //RX_FDEQ_BIN_15 +79 0x0000 //RX_FDEQ_BIN_16 +80 0x0000 //RX_FDEQ_BIN_17 +81 0x0000 //RX_FDEQ_BIN_18 +82 0x0000 //RX_FDEQ_BIN_19 +83 0x0000 //RX_FDEQ_BIN_20 +84 0x0000 //RX_FDEQ_BIN_21 +85 0x0000 //RX_FDEQ_BIN_22 +86 0x0000 //RX_FDEQ_BIN_23 +87 0x4000 //RX_FDEQ_RESRV_0 +88 0x0320 //RX_FDEQ_RESRV_1 +89 0x0018 //RX_FDDRC_BAND_MARGIN_0 +90 0x0035 //RX_FDDRC_BAND_MARGIN_1 +91 0x00D5 //RX_FDDRC_BAND_MARGIN_2 +92 0x0120 //RX_FDDRC_BAND_MARGIN_3 +93 0x0004 //RX_FDDRC_BLOCK_EXP +94 0x5000 //RX_FDDRC_THRD_2_0 +95 0x5000 //RX_FDDRC_THRD_2_1 +96 0x2000 //RX_FDDRC_THRD_2_2 +97 0x5000 //RX_FDDRC_THRD_2_3 +98 0x6400 //RX_FDDRC_THRD_3_0 +99 0x6400 //RX_FDDRC_THRD_3_1 +100 0x2000 //RX_FDDRC_THRD_3_2 +101 0x5000 //RX_FDDRC_THRD_3_3 +102 0x4000 //RX_FDDRC_SLANT_0_0 +103 0x4000 //RX_FDDRC_SLANT_0_1 +104 0x4000 //RX_FDDRC_SLANT_0_2 +105 0x4000 //RX_FDDRC_SLANT_0_3 +106 0x7FFF //RX_FDDRC_SLANT_1_0 +107 0x7FFF //RX_FDDRC_SLANT_1_1 +108 0x7FFF //RX_FDDRC_SLANT_1_2 +109 0x7FFF //RX_FDDRC_SLANT_1_3 +110 0x0000 //RX_FDDRC_RESRV_0 +111 0x0002 //RX_FILTINDX +112 0x0002 //RX_TDDRC_THRD_0 +113 0x0004 //RX_TDDRC_THRD_1 +114 0x1500 //RX_TDDRC_THRD_2 +115 0x1500 //RX_TDDRC_THRD_3 +116 0x3000 //RX_TDDRC_SLANT_0 +117 0x6E00 //RX_TDDRC_SLANT_1 +118 0x6000 //RX_TDDRC_ALPHA_UP_0 +119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +120 0x0000 //RX_TDDRC_HMNC_FLAG +121 0x199A //RX_TDDRC_HMNC_GAIN +122 0x0001 //RX_TDDRC_SMT_FLAG +123 0x0CCD //RX_TDDRC_SMT_W +124 0x02FD //RX_TDDRC_DRC_GAIN +125 0x7C00 //RX_LAMBDA_PKA_FP +126 0x2000 //RX_TPKA_FP +127 0x2000 //RX_MIN_G_FP +128 0x0080 //RX_MAX_G_FP +129 0x0100 //RX_SPK_VOL +130 0x0000 //RX_VOL_RESRV_0 +131 0x0000 //RX_MAXLEVEL_CNG +132 0x3000 //RX_BWE_UV_TH +133 0x3000 //RX_BWE_UV_TH2 +134 0x1800 //RX_BWE_UV_TH3 +135 0x1000 //RX_BWE_V_TH +136 0x04CD //RX_BWE_GAIN1_V_TH1 +137 0x0F33 //RX_BWE_GAIN1_V_TH2 +138 0x7333 //RX_BWE_UV_EQ +139 0x199A //RX_BWE_V_EQ +140 0x7333 //RX_BWE_TONE_TH +141 0x0004 //RX_BWE_UV_HOLD_T +142 0x6CCD //RX_BWE_GAIN2_ALPHA +143 0x799A //RX_BWE_GAIN3_ALPHA +144 0x001E //RX_BWE_CUTOFF +145 0x3000 //RX_BWE_GAINFILL +146 0x3200 //RX_BWE_MAXTH_TONE +147 0x2000 //RX_BWE_EQ_0 +148 0x2000 //RX_BWE_EQ_1 +149 0x2000 //RX_BWE_EQ_2 +150 0x2000 //RX_BWE_EQ_3 +151 0x2000 //RX_BWE_EQ_4 +152 0x2000 //RX_BWE_EQ_5 +153 0x2000 //RX_BWE_EQ_6 +154 0x0000 //RX_BWE_RESRV_0 +155 0x0000 //RX_BWE_RESRV_1 +156 0x0000 //RX_BWE_RESRV_2 +#VOL 0 +6 0x6000 //RX_TDDRC_ALPHA_UP_1 +7 0x6000 //RX_TDDRC_ALPHA_UP_2 +8 0x6000 //RX_TDDRC_ALPHA_UP_3 +9 0x1000 //RX_TDDRC_ALPHA_UP_4 +27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +33 0x7214 //RX_TDDRC_LIMITER_THRD +34 0x0800 //RX_TDDRC_LIMITER_GAIN +112 0x0002 //RX_TDDRC_THRD_0 +113 0x0004 //RX_TDDRC_THRD_1 +114 0x1500 //RX_TDDRC_THRD_2 +115 0x1500 //RX_TDDRC_THRD_3 +116 0x3000 //RX_TDDRC_SLANT_0 +117 0x6E00 //RX_TDDRC_SLANT_1 +118 0x6000 //RX_TDDRC_ALPHA_UP_0 +119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +120 0x0000 //RX_TDDRC_HMNC_FLAG +121 0x199A //RX_TDDRC_HMNC_GAIN +122 0x0001 //RX_TDDRC_SMT_FLAG +123 0x0CCD //RX_TDDRC_SMT_W +124 0x02FD //RX_TDDRC_DRC_GAIN +38 0x0020 //RX_FDEQ_SUBNUM +39 0x4848 //RX_FDEQ_GAIN_0 +40 0x4848 //RX_FDEQ_GAIN_1 +41 0x4340 //RX_FDEQ_GAIN_2 +42 0x3F3D //RX_FDEQ_GAIN_3 +43 0x3935 //RX_FDEQ_GAIN_4 +44 0x3635 //RX_FDEQ_GAIN_5 +45 0x3E46 //RX_FDEQ_GAIN_6 +46 0x494C //RX_FDEQ_GAIN_7 +47 0x4E56 //RX_FDEQ_GAIN_8 +48 0x5F5B //RX_FDEQ_GAIN_9 +49 0x5B48 //RX_FDEQ_GAIN_10 +50 0x4856 //RX_FDEQ_GAIN_11 +51 0x5B60 //RX_FDEQ_GAIN_12 +52 0x7476 //RX_FDEQ_GAIN_13 +53 0x7F7C //RX_FDEQ_GAIN_14 +54 0x7068 //RX_FDEQ_GAIN_15 +55 0x4848 //RX_FDEQ_GAIN_16 +56 0x4848 //RX_FDEQ_GAIN_17 +57 0x4848 //RX_FDEQ_GAIN_18 +58 0x4848 //RX_FDEQ_GAIN_19 +59 0x4848 //RX_FDEQ_GAIN_20 +60 0x4848 //RX_FDEQ_GAIN_21 +61 0x4848 //RX_FDEQ_GAIN_22 +62 0x4848 //RX_FDEQ_GAIN_23 +63 0x0202 //RX_FDEQ_BIN_0 +64 0x0203 //RX_FDEQ_BIN_1 +65 0x0303 //RX_FDEQ_BIN_2 +66 0x0304 //RX_FDEQ_BIN_3 +67 0x0404 //RX_FDEQ_BIN_4 +68 0x0209 //RX_FDEQ_BIN_5 +69 0x0808 //RX_FDEQ_BIN_6 +70 0x090A //RX_FDEQ_BIN_7 +71 0x0B0C //RX_FDEQ_BIN_8 +72 0x0D0E //RX_FDEQ_BIN_9 +73 0x1013 //RX_FDEQ_BIN_10 +74 0x1719 //RX_FDEQ_BIN_11 +75 0x1B1E //RX_FDEQ_BIN_12 +76 0x1E1E //RX_FDEQ_BIN_13 +77 0x1E28 //RX_FDEQ_BIN_14 +78 0x282C //RX_FDEQ_BIN_15 +79 0x0000 //RX_FDEQ_BIN_16 +80 0x0000 //RX_FDEQ_BIN_17 +81 0x0000 //RX_FDEQ_BIN_18 +82 0x0000 //RX_FDEQ_BIN_19 +83 0x0000 //RX_FDEQ_BIN_20 +84 0x0000 //RX_FDEQ_BIN_21 +85 0x0000 //RX_FDEQ_BIN_22 +86 0x0000 //RX_FDEQ_BIN_23 +87 0x4000 //RX_FDEQ_RESRV_0 +88 0x0320 //RX_FDEQ_RESRV_1 +89 0x0018 //RX_FDDRC_BAND_MARGIN_0 +90 0x0035 //RX_FDDRC_BAND_MARGIN_1 +91 0x00D5 //RX_FDDRC_BAND_MARGIN_2 +92 0x0120 //RX_FDDRC_BAND_MARGIN_3 +93 0x0004 //RX_FDDRC_BLOCK_EXP +94 0x5000 //RX_FDDRC_THRD_2_0 +95 0x5000 //RX_FDDRC_THRD_2_1 +96 0x2000 //RX_FDDRC_THRD_2_2 +97 0x5000 //RX_FDDRC_THRD_2_3 +98 0x6400 //RX_FDDRC_THRD_3_0 +99 0x6400 //RX_FDDRC_THRD_3_1 +100 0x2000 //RX_FDDRC_THRD_3_2 +101 0x5000 //RX_FDDRC_THRD_3_3 +102 0x4000 //RX_FDDRC_SLANT_0_0 +103 0x4000 //RX_FDDRC_SLANT_0_1 +104 0x4000 //RX_FDDRC_SLANT_0_2 +105 0x4000 //RX_FDDRC_SLANT_0_3 +106 0x7FFF //RX_FDDRC_SLANT_1_0 +107 0x7FFF //RX_FDDRC_SLANT_1_1 +108 0x7FFF //RX_FDDRC_SLANT_1_2 +109 0x7FFF //RX_FDDRC_SLANT_1_3 +110 0x0000 //RX_FDDRC_RESRV_0 +129 0x0019 //RX_SPK_VOL +130 0x0000 //RX_VOL_RESRV_0 +#VOL 1 +6 0x6000 //RX_TDDRC_ALPHA_UP_1 +7 0x6000 //RX_TDDRC_ALPHA_UP_2 +8 0x6000 //RX_TDDRC_ALPHA_UP_3 +9 0x1000 //RX_TDDRC_ALPHA_UP_4 +27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +33 0x7214 //RX_TDDRC_LIMITER_THRD +34 0x0800 //RX_TDDRC_LIMITER_GAIN +112 0x0002 //RX_TDDRC_THRD_0 +113 0x0004 //RX_TDDRC_THRD_1 +114 0x1500 //RX_TDDRC_THRD_2 +115 0x1500 //RX_TDDRC_THRD_3 +116 0x3000 //RX_TDDRC_SLANT_0 +117 0x6E00 //RX_TDDRC_SLANT_1 +118 0x6000 //RX_TDDRC_ALPHA_UP_0 +119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +120 0x0000 //RX_TDDRC_HMNC_FLAG +121 0x199A //RX_TDDRC_HMNC_GAIN +122 0x0001 //RX_TDDRC_SMT_FLAG +123 0x0CCD //RX_TDDRC_SMT_W +124 0x02FD //RX_TDDRC_DRC_GAIN +38 0x0020 //RX_FDEQ_SUBNUM +39 0x4848 //RX_FDEQ_GAIN_0 +40 0x4848 //RX_FDEQ_GAIN_1 +41 0x4340 //RX_FDEQ_GAIN_2 +42 0x3F3D //RX_FDEQ_GAIN_3 +43 0x3935 //RX_FDEQ_GAIN_4 +44 0x3635 //RX_FDEQ_GAIN_5 +45 0x3E46 //RX_FDEQ_GAIN_6 +46 0x494C //RX_FDEQ_GAIN_7 +47 0x4E56 //RX_FDEQ_GAIN_8 +48 0x5F5B //RX_FDEQ_GAIN_9 +49 0x5B48 //RX_FDEQ_GAIN_10 +50 0x4856 //RX_FDEQ_GAIN_11 +51 0x5B60 //RX_FDEQ_GAIN_12 +52 0x7476 //RX_FDEQ_GAIN_13 +53 0x7F7C //RX_FDEQ_GAIN_14 +54 0x7068 //RX_FDEQ_GAIN_15 +55 0x4848 //RX_FDEQ_GAIN_16 +56 0x4848 //RX_FDEQ_GAIN_17 +57 0x4848 //RX_FDEQ_GAIN_18 +58 0x4848 //RX_FDEQ_GAIN_19 +59 0x4848 //RX_FDEQ_GAIN_20 +60 0x4848 //RX_FDEQ_GAIN_21 +61 0x4848 //RX_FDEQ_GAIN_22 +62 0x4848 //RX_FDEQ_GAIN_23 +63 0x0202 //RX_FDEQ_BIN_0 +64 0x0203 //RX_FDEQ_BIN_1 +65 0x0303 //RX_FDEQ_BIN_2 +66 0x0304 //RX_FDEQ_BIN_3 +67 0x0404 //RX_FDEQ_BIN_4 +68 0x0209 //RX_FDEQ_BIN_5 +69 0x0808 //RX_FDEQ_BIN_6 +70 0x090A //RX_FDEQ_BIN_7 +71 0x0B0C //RX_FDEQ_BIN_8 +72 0x0D0E //RX_FDEQ_BIN_9 +73 0x1013 //RX_FDEQ_BIN_10 +74 0x1719 //RX_FDEQ_BIN_11 +75 0x1B1E //RX_FDEQ_BIN_12 +76 0x1E1E //RX_FDEQ_BIN_13 +77 0x1E28 //RX_FDEQ_BIN_14 +78 0x282C //RX_FDEQ_BIN_15 +79 0x0000 //RX_FDEQ_BIN_16 +80 0x0000 //RX_FDEQ_BIN_17 +81 0x0000 //RX_FDEQ_BIN_18 +82 0x0000 //RX_FDEQ_BIN_19 +83 0x0000 //RX_FDEQ_BIN_20 +84 0x0000 //RX_FDEQ_BIN_21 +85 0x0000 //RX_FDEQ_BIN_22 +86 0x0000 //RX_FDEQ_BIN_23 +87 0x4000 //RX_FDEQ_RESRV_0 +88 0x0320 //RX_FDEQ_RESRV_1 +89 0x0018 //RX_FDDRC_BAND_MARGIN_0 +90 0x0035 //RX_FDDRC_BAND_MARGIN_1 +91 0x00D5 //RX_FDDRC_BAND_MARGIN_2 +92 0x0120 //RX_FDDRC_BAND_MARGIN_3 +93 0x0004 //RX_FDDRC_BLOCK_EXP +94 0x5000 //RX_FDDRC_THRD_2_0 +95 0x5000 //RX_FDDRC_THRD_2_1 +96 0x2000 //RX_FDDRC_THRD_2_2 +97 0x5000 //RX_FDDRC_THRD_2_3 +98 0x6400 //RX_FDDRC_THRD_3_0 +99 0x6400 //RX_FDDRC_THRD_3_1 +100 0x2000 //RX_FDDRC_THRD_3_2 +101 0x5000 //RX_FDDRC_THRD_3_3 +102 0x4000 //RX_FDDRC_SLANT_0_0 +103 0x4000 //RX_FDDRC_SLANT_0_1 +104 0x4000 //RX_FDDRC_SLANT_0_2 +105 0x4000 //RX_FDDRC_SLANT_0_3 +106 0x7FFF //RX_FDDRC_SLANT_1_0 +107 0x7FFF //RX_FDDRC_SLANT_1_1 +108 0x7FFF //RX_FDDRC_SLANT_1_2 +109 0x7FFF //RX_FDDRC_SLANT_1_3 +110 0x0000 //RX_FDDRC_RESRV_0 +129 0x0023 //RX_SPK_VOL +130 0x0000 //RX_VOL_RESRV_0 +#VOL 2 +6 0x6000 //RX_TDDRC_ALPHA_UP_1 +7 0x6000 //RX_TDDRC_ALPHA_UP_2 +8 0x6000 //RX_TDDRC_ALPHA_UP_3 +9 0x1000 //RX_TDDRC_ALPHA_UP_4 +27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +33 0x7214 //RX_TDDRC_LIMITER_THRD +34 0x0800 //RX_TDDRC_LIMITER_GAIN +112 0x0002 //RX_TDDRC_THRD_0 +113 0x0004 //RX_TDDRC_THRD_1 +114 0x1500 //RX_TDDRC_THRD_2 +115 0x1500 //RX_TDDRC_THRD_3 +116 0x3000 //RX_TDDRC_SLANT_0 +117 0x6E00 //RX_TDDRC_SLANT_1 +118 0x6000 //RX_TDDRC_ALPHA_UP_0 +119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +120 0x0000 //RX_TDDRC_HMNC_FLAG +121 0x199A //RX_TDDRC_HMNC_GAIN +122 0x0001 //RX_TDDRC_SMT_FLAG +123 0x0CCD //RX_TDDRC_SMT_W +124 0x02FD //RX_TDDRC_DRC_GAIN +38 0x0020 //RX_FDEQ_SUBNUM +39 0x4848 //RX_FDEQ_GAIN_0 +40 0x4848 //RX_FDEQ_GAIN_1 +41 0x4340 //RX_FDEQ_GAIN_2 +42 0x3F3D //RX_FDEQ_GAIN_3 +43 0x3935 //RX_FDEQ_GAIN_4 +44 0x3635 //RX_FDEQ_GAIN_5 +45 0x3E46 //RX_FDEQ_GAIN_6 +46 0x494C //RX_FDEQ_GAIN_7 +47 0x4E56 //RX_FDEQ_GAIN_8 +48 0x5F5B //RX_FDEQ_GAIN_9 +49 0x5B48 //RX_FDEQ_GAIN_10 +50 0x4856 //RX_FDEQ_GAIN_11 +51 0x5B60 //RX_FDEQ_GAIN_12 +52 0x7476 //RX_FDEQ_GAIN_13 +53 0x7F7C //RX_FDEQ_GAIN_14 +54 0x7068 //RX_FDEQ_GAIN_15 +55 0x4848 //RX_FDEQ_GAIN_16 +56 0x4848 //RX_FDEQ_GAIN_17 +57 0x4848 //RX_FDEQ_GAIN_18 +58 0x4848 //RX_FDEQ_GAIN_19 +59 0x4848 //RX_FDEQ_GAIN_20 +60 0x4848 //RX_FDEQ_GAIN_21 +61 0x4848 //RX_FDEQ_GAIN_22 +62 0x4848 //RX_FDEQ_GAIN_23 +63 0x0202 //RX_FDEQ_BIN_0 +64 0x0203 //RX_FDEQ_BIN_1 +65 0x0303 //RX_FDEQ_BIN_2 +66 0x0304 //RX_FDEQ_BIN_3 +67 0x0404 //RX_FDEQ_BIN_4 +68 0x0209 //RX_FDEQ_BIN_5 +69 0x0808 //RX_FDEQ_BIN_6 +70 0x090A //RX_FDEQ_BIN_7 +71 0x0B0C //RX_FDEQ_BIN_8 +72 0x0D0E //RX_FDEQ_BIN_9 +73 0x1013 //RX_FDEQ_BIN_10 +74 0x1719 //RX_FDEQ_BIN_11 +75 0x1B1E //RX_FDEQ_BIN_12 +76 0x1E1E //RX_FDEQ_BIN_13 +77 0x1E28 //RX_FDEQ_BIN_14 +78 0x282C //RX_FDEQ_BIN_15 +79 0x0000 //RX_FDEQ_BIN_16 +80 0x0000 //RX_FDEQ_BIN_17 +81 0x0000 //RX_FDEQ_BIN_18 +82 0x0000 //RX_FDEQ_BIN_19 +83 0x0000 //RX_FDEQ_BIN_20 +84 0x0000 //RX_FDEQ_BIN_21 +85 0x0000 //RX_FDEQ_BIN_22 +86 0x0000 //RX_FDEQ_BIN_23 +87 0x4000 //RX_FDEQ_RESRV_0 +88 0x0320 //RX_FDEQ_RESRV_1 +89 0x0018 //RX_FDDRC_BAND_MARGIN_0 +90 0x0035 //RX_FDDRC_BAND_MARGIN_1 +91 0x00D5 //RX_FDDRC_BAND_MARGIN_2 +92 0x0120 //RX_FDDRC_BAND_MARGIN_3 +93 0x0004 //RX_FDDRC_BLOCK_EXP +94 0x5000 //RX_FDDRC_THRD_2_0 +95 0x5000 //RX_FDDRC_THRD_2_1 +96 0x2000 //RX_FDDRC_THRD_2_2 +97 0x5000 //RX_FDDRC_THRD_2_3 +98 0x6400 //RX_FDDRC_THRD_3_0 +99 0x6400 //RX_FDDRC_THRD_3_1 +100 0x2000 //RX_FDDRC_THRD_3_2 +101 0x5000 //RX_FDDRC_THRD_3_3 +102 0x4000 //RX_FDDRC_SLANT_0_0 +103 0x4000 //RX_FDDRC_SLANT_0_1 +104 0x4000 //RX_FDDRC_SLANT_0_2 +105 0x4000 //RX_FDDRC_SLANT_0_3 +106 0x7FFF //RX_FDDRC_SLANT_1_0 +107 0x7FFF //RX_FDDRC_SLANT_1_1 +108 0x7FFF //RX_FDDRC_SLANT_1_2 +109 0x7FFF //RX_FDDRC_SLANT_1_3 +110 0x0000 //RX_FDDRC_RESRV_0 +129 0x0032 //RX_SPK_VOL +130 0x0000 //RX_VOL_RESRV_0 +#VOL 3 +6 0x6000 //RX_TDDRC_ALPHA_UP_1 +7 0x6000 //RX_TDDRC_ALPHA_UP_2 +8 0x6000 //RX_TDDRC_ALPHA_UP_3 +9 0x1000 //RX_TDDRC_ALPHA_UP_4 +27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +33 0x7214 //RX_TDDRC_LIMITER_THRD +34 0x0800 //RX_TDDRC_LIMITER_GAIN +112 0x0002 //RX_TDDRC_THRD_0 +113 0x0004 //RX_TDDRC_THRD_1 +114 0x1500 //RX_TDDRC_THRD_2 +115 0x1500 //RX_TDDRC_THRD_3 +116 0x3000 //RX_TDDRC_SLANT_0 +117 0x6E00 //RX_TDDRC_SLANT_1 +118 0x6000 //RX_TDDRC_ALPHA_UP_0 +119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +120 0x0000 //RX_TDDRC_HMNC_FLAG +121 0x199A //RX_TDDRC_HMNC_GAIN +122 0x0001 //RX_TDDRC_SMT_FLAG +123 0x0CCD //RX_TDDRC_SMT_W +124 0x02FD //RX_TDDRC_DRC_GAIN +38 0x0020 //RX_FDEQ_SUBNUM +39 0x4848 //RX_FDEQ_GAIN_0 +40 0x4848 //RX_FDEQ_GAIN_1 +41 0x4340 //RX_FDEQ_GAIN_2 +42 0x3F3D //RX_FDEQ_GAIN_3 +43 0x3935 //RX_FDEQ_GAIN_4 +44 0x3635 //RX_FDEQ_GAIN_5 +45 0x3E46 //RX_FDEQ_GAIN_6 +46 0x494C //RX_FDEQ_GAIN_7 +47 0x4E56 //RX_FDEQ_GAIN_8 +48 0x5F5B //RX_FDEQ_GAIN_9 +49 0x5B48 //RX_FDEQ_GAIN_10 +50 0x4856 //RX_FDEQ_GAIN_11 +51 0x5B60 //RX_FDEQ_GAIN_12 +52 0x7476 //RX_FDEQ_GAIN_13 +53 0x7F7C //RX_FDEQ_GAIN_14 +54 0x7068 //RX_FDEQ_GAIN_15 +55 0x4848 //RX_FDEQ_GAIN_16 +56 0x4848 //RX_FDEQ_GAIN_17 +57 0x4848 //RX_FDEQ_GAIN_18 +58 0x4848 //RX_FDEQ_GAIN_19 +59 0x4848 //RX_FDEQ_GAIN_20 +60 0x4848 //RX_FDEQ_GAIN_21 +61 0x4848 //RX_FDEQ_GAIN_22 +62 0x4848 //RX_FDEQ_GAIN_23 +63 0x0202 //RX_FDEQ_BIN_0 +64 0x0203 //RX_FDEQ_BIN_1 +65 0x0303 //RX_FDEQ_BIN_2 +66 0x0304 //RX_FDEQ_BIN_3 +67 0x0404 //RX_FDEQ_BIN_4 +68 0x0209 //RX_FDEQ_BIN_5 +69 0x0808 //RX_FDEQ_BIN_6 +70 0x090A //RX_FDEQ_BIN_7 +71 0x0B0C //RX_FDEQ_BIN_8 +72 0x0D0E //RX_FDEQ_BIN_9 +73 0x1013 //RX_FDEQ_BIN_10 +74 0x1719 //RX_FDEQ_BIN_11 +75 0x1B1E //RX_FDEQ_BIN_12 +76 0x1E1E //RX_FDEQ_BIN_13 +77 0x1E28 //RX_FDEQ_BIN_14 +78 0x282C //RX_FDEQ_BIN_15 +79 0x0000 //RX_FDEQ_BIN_16 +80 0x0000 //RX_FDEQ_BIN_17 +81 0x0000 //RX_FDEQ_BIN_18 +82 0x0000 //RX_FDEQ_BIN_19 +83 0x0000 //RX_FDEQ_BIN_20 +84 0x0000 //RX_FDEQ_BIN_21 +85 0x0000 //RX_FDEQ_BIN_22 +86 0x0000 //RX_FDEQ_BIN_23 +87 0x4000 //RX_FDEQ_RESRV_0 +88 0x0320 //RX_FDEQ_RESRV_1 +89 0x0018 //RX_FDDRC_BAND_MARGIN_0 +90 0x0035 //RX_FDDRC_BAND_MARGIN_1 +91 0x00D5 //RX_FDDRC_BAND_MARGIN_2 +92 0x0120 //RX_FDDRC_BAND_MARGIN_3 +93 0x0004 //RX_FDDRC_BLOCK_EXP +94 0x5000 //RX_FDDRC_THRD_2_0 +95 0x5000 //RX_FDDRC_THRD_2_1 +96 0x2000 //RX_FDDRC_THRD_2_2 +97 0x5000 //RX_FDDRC_THRD_2_3 +98 0x6400 //RX_FDDRC_THRD_3_0 +99 0x6400 //RX_FDDRC_THRD_3_1 +100 0x2000 //RX_FDDRC_THRD_3_2 +101 0x5000 //RX_FDDRC_THRD_3_3 +102 0x4000 //RX_FDDRC_SLANT_0_0 +103 0x4000 //RX_FDDRC_SLANT_0_1 +104 0x4000 //RX_FDDRC_SLANT_0_2 +105 0x4000 //RX_FDDRC_SLANT_0_3 +106 0x7FFF //RX_FDDRC_SLANT_1_0 +107 0x7FFF //RX_FDDRC_SLANT_1_1 +108 0x7FFF //RX_FDDRC_SLANT_1_2 +109 0x7FFF //RX_FDDRC_SLANT_1_3 +110 0x0000 //RX_FDDRC_RESRV_0 +129 0x0048 //RX_SPK_VOL +130 0x0000 //RX_VOL_RESRV_0 +#VOL 4 +6 0x6000 //RX_TDDRC_ALPHA_UP_1 +7 0x6000 //RX_TDDRC_ALPHA_UP_2 +8 0x6000 //RX_TDDRC_ALPHA_UP_3 +9 0x1000 //RX_TDDRC_ALPHA_UP_4 +27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +33 0x7214 //RX_TDDRC_LIMITER_THRD +34 0x0800 //RX_TDDRC_LIMITER_GAIN +112 0x0002 //RX_TDDRC_THRD_0 +113 0x0004 //RX_TDDRC_THRD_1 +114 0x1500 //RX_TDDRC_THRD_2 +115 0x1500 //RX_TDDRC_THRD_3 +116 0x3000 //RX_TDDRC_SLANT_0 +117 0x6E00 //RX_TDDRC_SLANT_1 +118 0x6000 //RX_TDDRC_ALPHA_UP_0 +119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +120 0x0000 //RX_TDDRC_HMNC_FLAG +121 0x199A //RX_TDDRC_HMNC_GAIN +122 0x0001 //RX_TDDRC_SMT_FLAG +123 0x0CCD //RX_TDDRC_SMT_W +124 0x02FD //RX_TDDRC_DRC_GAIN +38 0x0020 //RX_FDEQ_SUBNUM +39 0x4848 //RX_FDEQ_GAIN_0 +40 0x4848 //RX_FDEQ_GAIN_1 +41 0x4340 //RX_FDEQ_GAIN_2 +42 0x3F3D //RX_FDEQ_GAIN_3 +43 0x3935 //RX_FDEQ_GAIN_4 +44 0x3635 //RX_FDEQ_GAIN_5 +45 0x3E46 //RX_FDEQ_GAIN_6 +46 0x494C //RX_FDEQ_GAIN_7 +47 0x4E56 //RX_FDEQ_GAIN_8 +48 0x5F5B //RX_FDEQ_GAIN_9 +49 0x5B48 //RX_FDEQ_GAIN_10 +50 0x4856 //RX_FDEQ_GAIN_11 +51 0x5B60 //RX_FDEQ_GAIN_12 +52 0x7476 //RX_FDEQ_GAIN_13 +53 0x7F7C //RX_FDEQ_GAIN_14 +54 0x7068 //RX_FDEQ_GAIN_15 +55 0x4848 //RX_FDEQ_GAIN_16 +56 0x4848 //RX_FDEQ_GAIN_17 +57 0x4848 //RX_FDEQ_GAIN_18 +58 0x4848 //RX_FDEQ_GAIN_19 +59 0x4848 //RX_FDEQ_GAIN_20 +60 0x4848 //RX_FDEQ_GAIN_21 +61 0x4848 //RX_FDEQ_GAIN_22 +62 0x4848 //RX_FDEQ_GAIN_23 +63 0x0202 //RX_FDEQ_BIN_0 +64 0x0203 //RX_FDEQ_BIN_1 +65 0x0303 //RX_FDEQ_BIN_2 +66 0x0304 //RX_FDEQ_BIN_3 +67 0x0404 //RX_FDEQ_BIN_4 +68 0x0209 //RX_FDEQ_BIN_5 +69 0x0808 //RX_FDEQ_BIN_6 +70 0x090A //RX_FDEQ_BIN_7 +71 0x0B0C //RX_FDEQ_BIN_8 +72 0x0D0E //RX_FDEQ_BIN_9 +73 0x1013 //RX_FDEQ_BIN_10 +74 0x1719 //RX_FDEQ_BIN_11 +75 0x1B1E //RX_FDEQ_BIN_12 +76 0x1E1E //RX_FDEQ_BIN_13 +77 0x1E28 //RX_FDEQ_BIN_14 +78 0x282C //RX_FDEQ_BIN_15 +79 0x0000 //RX_FDEQ_BIN_16 +80 0x0000 //RX_FDEQ_BIN_17 +81 0x0000 //RX_FDEQ_BIN_18 +82 0x0000 //RX_FDEQ_BIN_19 +83 0x0000 //RX_FDEQ_BIN_20 +84 0x0000 //RX_FDEQ_BIN_21 +85 0x0000 //RX_FDEQ_BIN_22 +86 0x0000 //RX_FDEQ_BIN_23 +87 0x4000 //RX_FDEQ_RESRV_0 +88 0x0320 //RX_FDEQ_RESRV_1 +89 0x0018 //RX_FDDRC_BAND_MARGIN_0 +90 0x0035 //RX_FDDRC_BAND_MARGIN_1 +91 0x00D5 //RX_FDDRC_BAND_MARGIN_2 +92 0x0120 //RX_FDDRC_BAND_MARGIN_3 +93 0x0004 //RX_FDDRC_BLOCK_EXP +94 0x5000 //RX_FDDRC_THRD_2_0 +95 0x5000 //RX_FDDRC_THRD_2_1 +96 0x2000 //RX_FDDRC_THRD_2_2 +97 0x5000 //RX_FDDRC_THRD_2_3 +98 0x6400 //RX_FDDRC_THRD_3_0 +99 0x6400 //RX_FDDRC_THRD_3_1 +100 0x2000 //RX_FDDRC_THRD_3_2 +101 0x5000 //RX_FDDRC_THRD_3_3 +102 0x4000 //RX_FDDRC_SLANT_0_0 +103 0x4000 //RX_FDDRC_SLANT_0_1 +104 0x4000 //RX_FDDRC_SLANT_0_2 +105 0x4000 //RX_FDDRC_SLANT_0_3 +106 0x7FFF //RX_FDDRC_SLANT_1_0 +107 0x7FFF //RX_FDDRC_SLANT_1_1 +108 0x7FFF //RX_FDDRC_SLANT_1_2 +109 0x7FFF //RX_FDDRC_SLANT_1_3 +110 0x0000 //RX_FDDRC_RESRV_0 +129 0x0068 //RX_SPK_VOL +130 0x0000 //RX_VOL_RESRV_0 +#VOL 5 +6 0x6000 //RX_TDDRC_ALPHA_UP_1 +7 0x6000 //RX_TDDRC_ALPHA_UP_2 +8 0x6000 //RX_TDDRC_ALPHA_UP_3 +9 0x1000 //RX_TDDRC_ALPHA_UP_4 +27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +33 0x7214 //RX_TDDRC_LIMITER_THRD +34 0x0800 //RX_TDDRC_LIMITER_GAIN +112 0x0002 //RX_TDDRC_THRD_0 +113 0x0004 //RX_TDDRC_THRD_1 +114 0x1500 //RX_TDDRC_THRD_2 +115 0x1500 //RX_TDDRC_THRD_3 +116 0x3000 //RX_TDDRC_SLANT_0 +117 0x6E00 //RX_TDDRC_SLANT_1 +118 0x6000 //RX_TDDRC_ALPHA_UP_0 +119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +120 0x0000 //RX_TDDRC_HMNC_FLAG +121 0x199A //RX_TDDRC_HMNC_GAIN +122 0x0001 //RX_TDDRC_SMT_FLAG +123 0x0CCD //RX_TDDRC_SMT_W +124 0x02FD //RX_TDDRC_DRC_GAIN +38 0x0020 //RX_FDEQ_SUBNUM +39 0x4848 //RX_FDEQ_GAIN_0 +40 0x4848 //RX_FDEQ_GAIN_1 +41 0x4340 //RX_FDEQ_GAIN_2 +42 0x3F3D //RX_FDEQ_GAIN_3 +43 0x3935 //RX_FDEQ_GAIN_4 +44 0x3635 //RX_FDEQ_GAIN_5 +45 0x3E46 //RX_FDEQ_GAIN_6 +46 0x494C //RX_FDEQ_GAIN_7 +47 0x4E56 //RX_FDEQ_GAIN_8 +48 0x5F5B //RX_FDEQ_GAIN_9 +49 0x5B48 //RX_FDEQ_GAIN_10 +50 0x4856 //RX_FDEQ_GAIN_11 +51 0x5B60 //RX_FDEQ_GAIN_12 +52 0x7476 //RX_FDEQ_GAIN_13 +53 0x7F7C //RX_FDEQ_GAIN_14 +54 0x7068 //RX_FDEQ_GAIN_15 +55 0x4848 //RX_FDEQ_GAIN_16 +56 0x4848 //RX_FDEQ_GAIN_17 +57 0x4848 //RX_FDEQ_GAIN_18 +58 0x4848 //RX_FDEQ_GAIN_19 +59 0x4848 //RX_FDEQ_GAIN_20 +60 0x4848 //RX_FDEQ_GAIN_21 +61 0x4848 //RX_FDEQ_GAIN_22 +62 0x4848 //RX_FDEQ_GAIN_23 +63 0x0202 //RX_FDEQ_BIN_0 +64 0x0203 //RX_FDEQ_BIN_1 +65 0x0303 //RX_FDEQ_BIN_2 +66 0x0304 //RX_FDEQ_BIN_3 +67 0x0404 //RX_FDEQ_BIN_4 +68 0x0209 //RX_FDEQ_BIN_5 +69 0x0808 //RX_FDEQ_BIN_6 +70 0x090A //RX_FDEQ_BIN_7 +71 0x0B0C //RX_FDEQ_BIN_8 +72 0x0D0E //RX_FDEQ_BIN_9 +73 0x1013 //RX_FDEQ_BIN_10 +74 0x1719 //RX_FDEQ_BIN_11 +75 0x1B1E //RX_FDEQ_BIN_12 +76 0x1E1E //RX_FDEQ_BIN_13 +77 0x1E28 //RX_FDEQ_BIN_14 +78 0x282C //RX_FDEQ_BIN_15 +79 0x0000 //RX_FDEQ_BIN_16 +80 0x0000 //RX_FDEQ_BIN_17 +81 0x0000 //RX_FDEQ_BIN_18 +82 0x0000 //RX_FDEQ_BIN_19 +83 0x0000 //RX_FDEQ_BIN_20 +84 0x0000 //RX_FDEQ_BIN_21 +85 0x0000 //RX_FDEQ_BIN_22 +86 0x0000 //RX_FDEQ_BIN_23 +87 0x4000 //RX_FDEQ_RESRV_0 +88 0x0320 //RX_FDEQ_RESRV_1 +89 0x0018 //RX_FDDRC_BAND_MARGIN_0 +90 0x0035 //RX_FDDRC_BAND_MARGIN_1 +91 0x00D5 //RX_FDDRC_BAND_MARGIN_2 +92 0x0120 //RX_FDDRC_BAND_MARGIN_3 +93 0x0004 //RX_FDDRC_BLOCK_EXP +94 0x5000 //RX_FDDRC_THRD_2_0 +95 0x5000 //RX_FDDRC_THRD_2_1 +96 0x2000 //RX_FDDRC_THRD_2_2 +97 0x5000 //RX_FDDRC_THRD_2_3 +98 0x6400 //RX_FDDRC_THRD_3_0 +99 0x6400 //RX_FDDRC_THRD_3_1 +100 0x2000 //RX_FDDRC_THRD_3_2 +101 0x5000 //RX_FDDRC_THRD_3_3 +102 0x4000 //RX_FDDRC_SLANT_0_0 +103 0x4000 //RX_FDDRC_SLANT_0_1 +104 0x4000 //RX_FDDRC_SLANT_0_2 +105 0x4000 //RX_FDDRC_SLANT_0_3 +106 0x7FFF //RX_FDDRC_SLANT_1_0 +107 0x7FFF //RX_FDDRC_SLANT_1_1 +108 0x7FFF //RX_FDDRC_SLANT_1_2 +109 0x7FFF //RX_FDDRC_SLANT_1_3 +110 0x0000 //RX_FDDRC_RESRV_0 +129 0x0097 //RX_SPK_VOL +130 0x0000 //RX_VOL_RESRV_0 +#VOL 6 +6 0x6000 //RX_TDDRC_ALPHA_UP_1 +7 0x6000 //RX_TDDRC_ALPHA_UP_2 +8 0x6000 //RX_TDDRC_ALPHA_UP_3 +9 0x1000 //RX_TDDRC_ALPHA_UP_4 +27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +33 0x7214 //RX_TDDRC_LIMITER_THRD +34 0x0800 //RX_TDDRC_LIMITER_GAIN +112 0x0002 //RX_TDDRC_THRD_0 +113 0x0004 //RX_TDDRC_THRD_1 +114 0x1500 //RX_TDDRC_THRD_2 +115 0x1500 //RX_TDDRC_THRD_3 +116 0x3000 //RX_TDDRC_SLANT_0 +117 0x6E00 //RX_TDDRC_SLANT_1 +118 0x6000 //RX_TDDRC_ALPHA_UP_0 +119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +120 0x0000 //RX_TDDRC_HMNC_FLAG +121 0x199A //RX_TDDRC_HMNC_GAIN +122 0x0001 //RX_TDDRC_SMT_FLAG +123 0x0CCD //RX_TDDRC_SMT_W +124 0x02FD //RX_TDDRC_DRC_GAIN +38 0x0020 //RX_FDEQ_SUBNUM +39 0x4848 //RX_FDEQ_GAIN_0 +40 0x4848 //RX_FDEQ_GAIN_1 +41 0x4340 //RX_FDEQ_GAIN_2 +42 0x3F3D //RX_FDEQ_GAIN_3 +43 0x3935 //RX_FDEQ_GAIN_4 +44 0x3635 //RX_FDEQ_GAIN_5 +45 0x3E46 //RX_FDEQ_GAIN_6 +46 0x494C //RX_FDEQ_GAIN_7 +47 0x4E56 //RX_FDEQ_GAIN_8 +48 0x5F5B //RX_FDEQ_GAIN_9 +49 0x5B48 //RX_FDEQ_GAIN_10 +50 0x4856 //RX_FDEQ_GAIN_11 +51 0x5B60 //RX_FDEQ_GAIN_12 +52 0x7476 //RX_FDEQ_GAIN_13 +53 0x7F7C //RX_FDEQ_GAIN_14 +54 0x7068 //RX_FDEQ_GAIN_15 +55 0x4848 //RX_FDEQ_GAIN_16 +56 0x4848 //RX_FDEQ_GAIN_17 +57 0x4848 //RX_FDEQ_GAIN_18 +58 0x4848 //RX_FDEQ_GAIN_19 +59 0x4848 //RX_FDEQ_GAIN_20 +60 0x4848 //RX_FDEQ_GAIN_21 +61 0x4848 //RX_FDEQ_GAIN_22 +62 0x4848 //RX_FDEQ_GAIN_23 +63 0x0202 //RX_FDEQ_BIN_0 +64 0x0203 //RX_FDEQ_BIN_1 +65 0x0303 //RX_FDEQ_BIN_2 +66 0x0304 //RX_FDEQ_BIN_3 +67 0x0404 //RX_FDEQ_BIN_4 +68 0x0209 //RX_FDEQ_BIN_5 +69 0x0808 //RX_FDEQ_BIN_6 +70 0x090A //RX_FDEQ_BIN_7 +71 0x0B0C //RX_FDEQ_BIN_8 +72 0x0D0E //RX_FDEQ_BIN_9 +73 0x1013 //RX_FDEQ_BIN_10 +74 0x1719 //RX_FDEQ_BIN_11 +75 0x1B1E //RX_FDEQ_BIN_12 +76 0x1E1E //RX_FDEQ_BIN_13 +77 0x1E28 //RX_FDEQ_BIN_14 +78 0x282C //RX_FDEQ_BIN_15 +79 0x0000 //RX_FDEQ_BIN_16 +80 0x0000 //RX_FDEQ_BIN_17 +81 0x0000 //RX_FDEQ_BIN_18 +82 0x0000 //RX_FDEQ_BIN_19 +83 0x0000 //RX_FDEQ_BIN_20 +84 0x0000 //RX_FDEQ_BIN_21 +85 0x0000 //RX_FDEQ_BIN_22 +86 0x0000 //RX_FDEQ_BIN_23 +87 0x4000 //RX_FDEQ_RESRV_0 +88 0x0320 //RX_FDEQ_RESRV_1 +89 0x0018 //RX_FDDRC_BAND_MARGIN_0 +90 0x0035 //RX_FDDRC_BAND_MARGIN_1 +91 0x00D5 //RX_FDDRC_BAND_MARGIN_2 +92 0x0120 //RX_FDDRC_BAND_MARGIN_3 +93 0x0004 //RX_FDDRC_BLOCK_EXP +94 0x5000 //RX_FDDRC_THRD_2_0 +95 0x5000 //RX_FDDRC_THRD_2_1 +96 0x2000 //RX_FDDRC_THRD_2_2 +97 0x5000 //RX_FDDRC_THRD_2_3 +98 0x6400 //RX_FDDRC_THRD_3_0 +99 0x6400 //RX_FDDRC_THRD_3_1 +100 0x2000 //RX_FDDRC_THRD_3_2 +101 0x5000 //RX_FDDRC_THRD_3_3 +102 0x4000 //RX_FDDRC_SLANT_0_0 +103 0x4000 //RX_FDDRC_SLANT_0_1 +104 0x4000 //RX_FDDRC_SLANT_0_2 +105 0x4000 //RX_FDDRC_SLANT_0_3 +106 0x7FFF //RX_FDDRC_SLANT_1_0 +107 0x7FFF //RX_FDDRC_SLANT_1_1 +108 0x7FFF //RX_FDDRC_SLANT_1_2 +109 0x7FFF //RX_FDDRC_SLANT_1_3 +110 0x0000 //RX_FDDRC_RESRV_0 +129 0x0100 //RX_SPK_VOL +130 0x0000 //RX_VOL_RESRV_0 +#RX 2 +157 0x027C //RX_RECVFUNC_MODE_0 +158 0x0000 //RX_RECVFUNC_MODE_1 +159 0x0003 //RX_SAMPLINGFREQ_SIG +160 0x0003 //RX_SAMPLINGFREQ_PROC +161 0x000A //RX_FRAME_SZ +162 0x0000 //RX_DELAY_OPT +163 0x6000 //RX_TDDRC_ALPHA_UP_1 +164 0x6000 //RX_TDDRC_ALPHA_UP_2 +165 0x6000 //RX_TDDRC_ALPHA_UP_3 +166 0x1000 //RX_TDDRC_ALPHA_UP_4 +167 0x0800 //RX_PGA +168 0x7652 //RX_A_HP +169 0x4000 //RX_B_PE +170 0x7800 //RX_THR_PITCH_DET_0 +171 0x7000 //RX_THR_PITCH_DET_1 +172 0x6000 //RX_THR_PITCH_DET_2 +173 0x0008 //RX_PITCH_BFR_LEN +174 0x0003 //RX_SBD_PITCH_DET +175 0x0100 //RX_PP_RESRV_0 +176 0x0020 //RX_PP_RESRV_1 +177 0x0400 //RX_N_SN_EST +178 0x000C //RX_N2_SN_EST +179 0x0010 //RX_NS_LVL_CTRL +180 0xF800 //RX_THR_SN_EST +181 0x7E00 //RX_LAMBDA_PFILT +182 0x000A //RX_FENS_RESRV_0 +183 0x0190 //RX_FENS_RESRV_1 +184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +187 0x0002 //RX_EXTRA_NS_L +188 0x0800 //RX_EXTRA_NS_A +189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +190 0x7214 //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +192 0x199A //RX_A_POST_FLT +193 0x0000 //RX_LMT_THRD +194 0x4000 //RX_LMT_ALPHA +195 0x0020 //RX_FDEQ_SUBNUM +196 0x484E //RX_FDEQ_GAIN_0 +197 0x4E4E //RX_FDEQ_GAIN_1 +198 0x4E4E //RX_FDEQ_GAIN_2 +199 0x4848 //RX_FDEQ_GAIN_3 +200 0x484E //RX_FDEQ_GAIN_4 +201 0x6E4E //RX_FDEQ_GAIN_5 +202 0x4850 //RX_FDEQ_GAIN_6 +203 0x4848 //RX_FDEQ_GAIN_7 +204 0x4860 //RX_FDEQ_GAIN_8 +205 0x7468 //RX_FDEQ_GAIN_9 +206 0x6060 //RX_FDEQ_GAIN_10 +207 0x6666 //RX_FDEQ_GAIN_11 +208 0x6666 //RX_FDEQ_GAIN_12 +209 0x6666 //RX_FDEQ_GAIN_13 +210 0x6060 //RX_FDEQ_GAIN_14 +211 0x6060 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0202 //RX_FDEQ_BIN_0 +221 0x0203 //RX_FDEQ_BIN_1 +222 0x0303 //RX_FDEQ_BIN_2 +223 0x0304 //RX_FDEQ_BIN_3 +224 0x0404 //RX_FDEQ_BIN_4 +225 0x0209 //RX_FDEQ_BIN_5 +226 0x0808 //RX_FDEQ_BIN_6 +227 0x090A //RX_FDEQ_BIN_7 +228 0x0B0C //RX_FDEQ_BIN_8 +229 0x0D0E //RX_FDEQ_BIN_9 +230 0x1013 //RX_FDEQ_BIN_10 +231 0x1719 //RX_FDEQ_BIN_11 +232 0x1B1E //RX_FDEQ_BIN_12 +233 0x1E1E //RX_FDEQ_BIN_13 +234 0x1E28 //RX_FDEQ_BIN_14 +235 0x282C //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x4000 //RX_FDEQ_RESRV_0 +245 0x0320 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0035 //RX_FDDRC_BAND_MARGIN_1 +248 0x00D5 //RX_FDDRC_BAND_MARGIN_2 +249 0x0120 //RX_FDDRC_BAND_MARGIN_3 +250 0x0004 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x2000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x2000 //RX_FDDRC_THRD_3_2 +258 0x5000 //RX_FDDRC_THRD_3_3 +259 0x4000 //RX_FDDRC_SLANT_0_0 +260 0x4000 //RX_FDDRC_SLANT_0_1 +261 0x4000 //RX_FDDRC_SLANT_0_2 +262 0x4000 //RX_FDDRC_SLANT_0_3 +263 0x7FFF //RX_FDDRC_SLANT_1_0 +264 0x7FFF //RX_FDDRC_SLANT_1_1 +265 0x7FFF //RX_FDDRC_SLANT_1_2 +266 0x7FFF //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +268 0x0002 //RX_FILTINDX +269 0x0002 //RX_TDDRC_THRD_0 +270 0x0004 //RX_TDDRC_THRD_1 +271 0x1A00 //RX_TDDRC_THRD_2 +272 0x1A00 //RX_TDDRC_THRD_3 +273 0x7EB8 //RX_TDDRC_SLANT_0 +274 0x2500 //RX_TDDRC_SLANT_1 +275 0x6000 //RX_TDDRC_ALPHA_UP_0 +276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x199A //RX_TDDRC_HMNC_GAIN +279 0x0001 //RX_TDDRC_SMT_FLAG +280 0x0CCD //RX_TDDRC_SMT_W +281 0x04BC //RX_TDDRC_DRC_GAIN +282 0x7C00 //RX_LAMBDA_PKA_FP +283 0x2000 //RX_TPKA_FP +284 0x2000 //RX_MIN_G_FP +285 0x0080 //RX_MAX_G_FP +286 0x0019 //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 +288 0x0000 //RX_MAXLEVEL_CNG +289 0x3000 //RX_BWE_UV_TH +290 0x3000 //RX_BWE_UV_TH2 +291 0x1800 //RX_BWE_UV_TH3 +292 0x1000 //RX_BWE_V_TH +293 0x04CD //RX_BWE_GAIN1_V_TH1 +294 0x0F33 //RX_BWE_GAIN1_V_TH2 +295 0x7333 //RX_BWE_UV_EQ +296 0x199A //RX_BWE_V_EQ +297 0x7333 //RX_BWE_TONE_TH +298 0x0004 //RX_BWE_UV_HOLD_T +299 0x6CCD //RX_BWE_GAIN2_ALPHA +300 0x799A //RX_BWE_GAIN3_ALPHA +301 0x001E //RX_BWE_CUTOFF +302 0x3000 //RX_BWE_GAINFILL +303 0x3200 //RX_BWE_MAXTH_TONE +304 0x2000 //RX_BWE_EQ_0 +305 0x2000 //RX_BWE_EQ_1 +306 0x2000 //RX_BWE_EQ_2 +307 0x2000 //RX_BWE_EQ_3 +308 0x2000 //RX_BWE_EQ_4 +309 0x2000 //RX_BWE_EQ_5 +310 0x2000 //RX_BWE_EQ_6 +311 0x0000 //RX_BWE_RESRV_0 +312 0x0000 //RX_BWE_RESRV_1 +313 0x0000 //RX_BWE_RESRV_2 +#VOL 0 +163 0x6000 //RX_TDDRC_ALPHA_UP_1 +164 0x6000 //RX_TDDRC_ALPHA_UP_2 +165 0x6000 //RX_TDDRC_ALPHA_UP_3 +166 0x1000 //RX_TDDRC_ALPHA_UP_4 +184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +190 0x7214 //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +269 0x0002 //RX_TDDRC_THRD_0 +270 0x0004 //RX_TDDRC_THRD_1 +271 0x1A00 //RX_TDDRC_THRD_2 +272 0x1A00 //RX_TDDRC_THRD_3 +273 0x7EB8 //RX_TDDRC_SLANT_0 +274 0x2500 //RX_TDDRC_SLANT_1 +275 0x6000 //RX_TDDRC_ALPHA_UP_0 +276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x199A //RX_TDDRC_HMNC_GAIN +279 0x0001 //RX_TDDRC_SMT_FLAG +280 0x0CCD //RX_TDDRC_SMT_W +281 0x04BC //RX_TDDRC_DRC_GAIN +195 0x0020 //RX_FDEQ_SUBNUM +196 0x484E //RX_FDEQ_GAIN_0 +197 0x4E4E //RX_FDEQ_GAIN_1 +198 0x4E4E //RX_FDEQ_GAIN_2 +199 0x4848 //RX_FDEQ_GAIN_3 +200 0x484E //RX_FDEQ_GAIN_4 +201 0x6E4E //RX_FDEQ_GAIN_5 +202 0x4850 //RX_FDEQ_GAIN_6 +203 0x4848 //RX_FDEQ_GAIN_7 +204 0x4860 //RX_FDEQ_GAIN_8 +205 0x7468 //RX_FDEQ_GAIN_9 +206 0x6060 //RX_FDEQ_GAIN_10 +207 0x6666 //RX_FDEQ_GAIN_11 +208 0x6666 //RX_FDEQ_GAIN_12 +209 0x6666 //RX_FDEQ_GAIN_13 +210 0x6060 //RX_FDEQ_GAIN_14 +211 0x6060 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0202 //RX_FDEQ_BIN_0 +221 0x0203 //RX_FDEQ_BIN_1 +222 0x0303 //RX_FDEQ_BIN_2 +223 0x0304 //RX_FDEQ_BIN_3 +224 0x0404 //RX_FDEQ_BIN_4 +225 0x0209 //RX_FDEQ_BIN_5 +226 0x0808 //RX_FDEQ_BIN_6 +227 0x090A //RX_FDEQ_BIN_7 +228 0x0B0C //RX_FDEQ_BIN_8 +229 0x0D0E //RX_FDEQ_BIN_9 +230 0x1013 //RX_FDEQ_BIN_10 +231 0x1719 //RX_FDEQ_BIN_11 +232 0x1B1E //RX_FDEQ_BIN_12 +233 0x1E1E //RX_FDEQ_BIN_13 +234 0x1E28 //RX_FDEQ_BIN_14 +235 0x282C //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x4000 //RX_FDEQ_RESRV_0 +245 0x0320 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0035 //RX_FDDRC_BAND_MARGIN_1 +248 0x00D5 //RX_FDDRC_BAND_MARGIN_2 +249 0x0120 //RX_FDDRC_BAND_MARGIN_3 +250 0x0004 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x2000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x2000 //RX_FDDRC_THRD_3_2 +258 0x5000 //RX_FDDRC_THRD_3_3 +259 0x4000 //RX_FDDRC_SLANT_0_0 +260 0x4000 //RX_FDDRC_SLANT_0_1 +261 0x4000 //RX_FDDRC_SLANT_0_2 +262 0x4000 //RX_FDDRC_SLANT_0_3 +263 0x7FFF //RX_FDDRC_SLANT_1_0 +264 0x7FFF //RX_FDDRC_SLANT_1_1 +265 0x7FFF //RX_FDDRC_SLANT_1_2 +266 0x7FFF //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +286 0x0019 //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 +#VOL 1 +163 0x6000 //RX_TDDRC_ALPHA_UP_1 +164 0x6000 //RX_TDDRC_ALPHA_UP_2 +165 0x6000 //RX_TDDRC_ALPHA_UP_3 +166 0x1000 //RX_TDDRC_ALPHA_UP_4 +184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +190 0x7214 //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +269 0x0002 //RX_TDDRC_THRD_0 +270 0x0004 //RX_TDDRC_THRD_1 +271 0x1A00 //RX_TDDRC_THRD_2 +272 0x1A00 //RX_TDDRC_THRD_3 +273 0x7EB8 //RX_TDDRC_SLANT_0 +274 0x2500 //RX_TDDRC_SLANT_1 +275 0x6000 //RX_TDDRC_ALPHA_UP_0 +276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x199A //RX_TDDRC_HMNC_GAIN +279 0x0001 //RX_TDDRC_SMT_FLAG +280 0x0CCD //RX_TDDRC_SMT_W +281 0x04BC //RX_TDDRC_DRC_GAIN +195 0x0020 //RX_FDEQ_SUBNUM +196 0x484E //RX_FDEQ_GAIN_0 +197 0x4E4E //RX_FDEQ_GAIN_1 +198 0x4E4E //RX_FDEQ_GAIN_2 +199 0x4848 //RX_FDEQ_GAIN_3 +200 0x484E //RX_FDEQ_GAIN_4 +201 0x6E4E //RX_FDEQ_GAIN_5 +202 0x4850 //RX_FDEQ_GAIN_6 +203 0x4848 //RX_FDEQ_GAIN_7 +204 0x4860 //RX_FDEQ_GAIN_8 +205 0x7468 //RX_FDEQ_GAIN_9 +206 0x6060 //RX_FDEQ_GAIN_10 +207 0x6666 //RX_FDEQ_GAIN_11 +208 0x6666 //RX_FDEQ_GAIN_12 +209 0x6666 //RX_FDEQ_GAIN_13 +210 0x6060 //RX_FDEQ_GAIN_14 +211 0x6060 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0202 //RX_FDEQ_BIN_0 +221 0x0203 //RX_FDEQ_BIN_1 +222 0x0303 //RX_FDEQ_BIN_2 +223 0x0304 //RX_FDEQ_BIN_3 +224 0x0404 //RX_FDEQ_BIN_4 +225 0x0209 //RX_FDEQ_BIN_5 +226 0x0808 //RX_FDEQ_BIN_6 +227 0x090A //RX_FDEQ_BIN_7 +228 0x0B0C //RX_FDEQ_BIN_8 +229 0x0D0E //RX_FDEQ_BIN_9 +230 0x1013 //RX_FDEQ_BIN_10 +231 0x1719 //RX_FDEQ_BIN_11 +232 0x1B1E //RX_FDEQ_BIN_12 +233 0x1E1E //RX_FDEQ_BIN_13 +234 0x1E28 //RX_FDEQ_BIN_14 +235 0x282C //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x4000 //RX_FDEQ_RESRV_0 +245 0x0320 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0035 //RX_FDDRC_BAND_MARGIN_1 +248 0x00D5 //RX_FDDRC_BAND_MARGIN_2 +249 0x0120 //RX_FDDRC_BAND_MARGIN_3 +250 0x0004 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x2000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x2000 //RX_FDDRC_THRD_3_2 +258 0x5000 //RX_FDDRC_THRD_3_3 +259 0x4000 //RX_FDDRC_SLANT_0_0 +260 0x4000 //RX_FDDRC_SLANT_0_1 +261 0x4000 //RX_FDDRC_SLANT_0_2 +262 0x4000 //RX_FDDRC_SLANT_0_3 +263 0x7FFF //RX_FDDRC_SLANT_1_0 +264 0x7FFF //RX_FDDRC_SLANT_1_1 +265 0x7FFF //RX_FDDRC_SLANT_1_2 +266 0x7FFF //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +286 0x0023 //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 +#VOL 2 +163 0x6000 //RX_TDDRC_ALPHA_UP_1 +164 0x6000 //RX_TDDRC_ALPHA_UP_2 +165 0x6000 //RX_TDDRC_ALPHA_UP_3 +166 0x1000 //RX_TDDRC_ALPHA_UP_4 +184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +190 0x7214 //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +269 0x0002 //RX_TDDRC_THRD_0 +270 0x0004 //RX_TDDRC_THRD_1 +271 0x1A00 //RX_TDDRC_THRD_2 +272 0x1A00 //RX_TDDRC_THRD_3 +273 0x7EB8 //RX_TDDRC_SLANT_0 +274 0x2500 //RX_TDDRC_SLANT_1 +275 0x6000 //RX_TDDRC_ALPHA_UP_0 +276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x199A //RX_TDDRC_HMNC_GAIN +279 0x0001 //RX_TDDRC_SMT_FLAG +280 0x0CCD //RX_TDDRC_SMT_W +281 0x04BC //RX_TDDRC_DRC_GAIN +195 0x0020 //RX_FDEQ_SUBNUM +196 0x484E //RX_FDEQ_GAIN_0 +197 0x4E4E //RX_FDEQ_GAIN_1 +198 0x4E4E //RX_FDEQ_GAIN_2 +199 0x4848 //RX_FDEQ_GAIN_3 +200 0x484E //RX_FDEQ_GAIN_4 +201 0x6E4E //RX_FDEQ_GAIN_5 +202 0x4850 //RX_FDEQ_GAIN_6 +203 0x4848 //RX_FDEQ_GAIN_7 +204 0x4860 //RX_FDEQ_GAIN_8 +205 0x7468 //RX_FDEQ_GAIN_9 +206 0x6060 //RX_FDEQ_GAIN_10 +207 0x6666 //RX_FDEQ_GAIN_11 +208 0x6666 //RX_FDEQ_GAIN_12 +209 0x6666 //RX_FDEQ_GAIN_13 +210 0x6060 //RX_FDEQ_GAIN_14 +211 0x6060 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0202 //RX_FDEQ_BIN_0 +221 0x0203 //RX_FDEQ_BIN_1 +222 0x0303 //RX_FDEQ_BIN_2 +223 0x0304 //RX_FDEQ_BIN_3 +224 0x0404 //RX_FDEQ_BIN_4 +225 0x0209 //RX_FDEQ_BIN_5 +226 0x0808 //RX_FDEQ_BIN_6 +227 0x090A //RX_FDEQ_BIN_7 +228 0x0B0C //RX_FDEQ_BIN_8 +229 0x0D0E //RX_FDEQ_BIN_9 +230 0x1013 //RX_FDEQ_BIN_10 +231 0x1719 //RX_FDEQ_BIN_11 +232 0x1B1E //RX_FDEQ_BIN_12 +233 0x1E1E //RX_FDEQ_BIN_13 +234 0x1E28 //RX_FDEQ_BIN_14 +235 0x282C //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x4000 //RX_FDEQ_RESRV_0 +245 0x0320 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0035 //RX_FDDRC_BAND_MARGIN_1 +248 0x00D5 //RX_FDDRC_BAND_MARGIN_2 +249 0x0120 //RX_FDDRC_BAND_MARGIN_3 +250 0x0004 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x2000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x2000 //RX_FDDRC_THRD_3_2 +258 0x5000 //RX_FDDRC_THRD_3_3 +259 0x4000 //RX_FDDRC_SLANT_0_0 +260 0x4000 //RX_FDDRC_SLANT_0_1 +261 0x4000 //RX_FDDRC_SLANT_0_2 +262 0x4000 //RX_FDDRC_SLANT_0_3 +263 0x7FFF //RX_FDDRC_SLANT_1_0 +264 0x7FFF //RX_FDDRC_SLANT_1_1 +265 0x7FFF //RX_FDDRC_SLANT_1_2 +266 0x7FFF //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +286 0x0032 //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 +#VOL 3 +163 0x6000 //RX_TDDRC_ALPHA_UP_1 +164 0x6000 //RX_TDDRC_ALPHA_UP_2 +165 0x6000 //RX_TDDRC_ALPHA_UP_3 +166 0x1000 //RX_TDDRC_ALPHA_UP_4 +184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +190 0x7214 //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +269 0x0002 //RX_TDDRC_THRD_0 +270 0x0004 //RX_TDDRC_THRD_1 +271 0x1A00 //RX_TDDRC_THRD_2 +272 0x1A00 //RX_TDDRC_THRD_3 +273 0x7EB8 //RX_TDDRC_SLANT_0 +274 0x2500 //RX_TDDRC_SLANT_1 +275 0x6000 //RX_TDDRC_ALPHA_UP_0 +276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x199A //RX_TDDRC_HMNC_GAIN +279 0x0001 //RX_TDDRC_SMT_FLAG +280 0x0CCD //RX_TDDRC_SMT_W +281 0x04BC //RX_TDDRC_DRC_GAIN +195 0x0020 //RX_FDEQ_SUBNUM +196 0x484E //RX_FDEQ_GAIN_0 +197 0x4E4E //RX_FDEQ_GAIN_1 +198 0x4E4E //RX_FDEQ_GAIN_2 +199 0x4848 //RX_FDEQ_GAIN_3 +200 0x484E //RX_FDEQ_GAIN_4 +201 0x6E4E //RX_FDEQ_GAIN_5 +202 0x4850 //RX_FDEQ_GAIN_6 +203 0x4848 //RX_FDEQ_GAIN_7 +204 0x4860 //RX_FDEQ_GAIN_8 +205 0x7468 //RX_FDEQ_GAIN_9 +206 0x6060 //RX_FDEQ_GAIN_10 +207 0x6666 //RX_FDEQ_GAIN_11 +208 0x6666 //RX_FDEQ_GAIN_12 +209 0x6666 //RX_FDEQ_GAIN_13 +210 0x6060 //RX_FDEQ_GAIN_14 +211 0x6060 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0202 //RX_FDEQ_BIN_0 +221 0x0203 //RX_FDEQ_BIN_1 +222 0x0303 //RX_FDEQ_BIN_2 +223 0x0304 //RX_FDEQ_BIN_3 +224 0x0404 //RX_FDEQ_BIN_4 +225 0x0209 //RX_FDEQ_BIN_5 +226 0x0808 //RX_FDEQ_BIN_6 +227 0x090A //RX_FDEQ_BIN_7 +228 0x0B0C //RX_FDEQ_BIN_8 +229 0x0D0E //RX_FDEQ_BIN_9 +230 0x1013 //RX_FDEQ_BIN_10 +231 0x1719 //RX_FDEQ_BIN_11 +232 0x1B1E //RX_FDEQ_BIN_12 +233 0x1E1E //RX_FDEQ_BIN_13 +234 0x1E28 //RX_FDEQ_BIN_14 +235 0x282C //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x4000 //RX_FDEQ_RESRV_0 +245 0x0320 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0035 //RX_FDDRC_BAND_MARGIN_1 +248 0x00D5 //RX_FDDRC_BAND_MARGIN_2 +249 0x0120 //RX_FDDRC_BAND_MARGIN_3 +250 0x0004 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x2000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x2000 //RX_FDDRC_THRD_3_2 +258 0x5000 //RX_FDDRC_THRD_3_3 +259 0x4000 //RX_FDDRC_SLANT_0_0 +260 0x4000 //RX_FDDRC_SLANT_0_1 +261 0x4000 //RX_FDDRC_SLANT_0_2 +262 0x4000 //RX_FDDRC_SLANT_0_3 +263 0x7FFF //RX_FDDRC_SLANT_1_0 +264 0x7FFF //RX_FDDRC_SLANT_1_1 +265 0x7FFF //RX_FDDRC_SLANT_1_2 +266 0x7FFF //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +286 0x0048 //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 +#VOL 4 +163 0x6000 //RX_TDDRC_ALPHA_UP_1 +164 0x6000 //RX_TDDRC_ALPHA_UP_2 +165 0x6000 //RX_TDDRC_ALPHA_UP_3 +166 0x1000 //RX_TDDRC_ALPHA_UP_4 +184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +190 0x7214 //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +269 0x0002 //RX_TDDRC_THRD_0 +270 0x0004 //RX_TDDRC_THRD_1 +271 0x1A00 //RX_TDDRC_THRD_2 +272 0x1A00 //RX_TDDRC_THRD_3 +273 0x7EB8 //RX_TDDRC_SLANT_0 +274 0x2500 //RX_TDDRC_SLANT_1 +275 0x6000 //RX_TDDRC_ALPHA_UP_0 +276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x199A //RX_TDDRC_HMNC_GAIN +279 0x0001 //RX_TDDRC_SMT_FLAG +280 0x0CCD //RX_TDDRC_SMT_W +281 0x04BC //RX_TDDRC_DRC_GAIN +195 0x0020 //RX_FDEQ_SUBNUM +196 0x484E //RX_FDEQ_GAIN_0 +197 0x4E4E //RX_FDEQ_GAIN_1 +198 0x4E4E //RX_FDEQ_GAIN_2 +199 0x4848 //RX_FDEQ_GAIN_3 +200 0x484E //RX_FDEQ_GAIN_4 +201 0x6E4E //RX_FDEQ_GAIN_5 +202 0x4850 //RX_FDEQ_GAIN_6 +203 0x4848 //RX_FDEQ_GAIN_7 +204 0x4860 //RX_FDEQ_GAIN_8 +205 0x7468 //RX_FDEQ_GAIN_9 +206 0x6060 //RX_FDEQ_GAIN_10 +207 0x6666 //RX_FDEQ_GAIN_11 +208 0x6666 //RX_FDEQ_GAIN_12 +209 0x6666 //RX_FDEQ_GAIN_13 +210 0x6060 //RX_FDEQ_GAIN_14 +211 0x6060 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0202 //RX_FDEQ_BIN_0 +221 0x0203 //RX_FDEQ_BIN_1 +222 0x0303 //RX_FDEQ_BIN_2 +223 0x0304 //RX_FDEQ_BIN_3 +224 0x0404 //RX_FDEQ_BIN_4 +225 0x0209 //RX_FDEQ_BIN_5 +226 0x0808 //RX_FDEQ_BIN_6 +227 0x090A //RX_FDEQ_BIN_7 +228 0x0B0C //RX_FDEQ_BIN_8 +229 0x0D0E //RX_FDEQ_BIN_9 +230 0x1013 //RX_FDEQ_BIN_10 +231 0x1719 //RX_FDEQ_BIN_11 +232 0x1B1E //RX_FDEQ_BIN_12 +233 0x1E1E //RX_FDEQ_BIN_13 +234 0x1E28 //RX_FDEQ_BIN_14 +235 0x282C //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x4000 //RX_FDEQ_RESRV_0 +245 0x0320 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0035 //RX_FDDRC_BAND_MARGIN_1 +248 0x00D5 //RX_FDDRC_BAND_MARGIN_2 +249 0x0120 //RX_FDDRC_BAND_MARGIN_3 +250 0x0004 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x2000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x2000 //RX_FDDRC_THRD_3_2 +258 0x5000 //RX_FDDRC_THRD_3_3 +259 0x4000 //RX_FDDRC_SLANT_0_0 +260 0x4000 //RX_FDDRC_SLANT_0_1 +261 0x4000 //RX_FDDRC_SLANT_0_2 +262 0x4000 //RX_FDDRC_SLANT_0_3 +263 0x7FFF //RX_FDDRC_SLANT_1_0 +264 0x7FFF //RX_FDDRC_SLANT_1_1 +265 0x7FFF //RX_FDDRC_SLANT_1_2 +266 0x7FFF //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +286 0x0068 //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 +#VOL 5 +163 0x6000 //RX_TDDRC_ALPHA_UP_1 +164 0x6000 //RX_TDDRC_ALPHA_UP_2 +165 0x6000 //RX_TDDRC_ALPHA_UP_3 +166 0x1000 //RX_TDDRC_ALPHA_UP_4 +184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +190 0x7214 //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +269 0x0002 //RX_TDDRC_THRD_0 +270 0x0004 //RX_TDDRC_THRD_1 +271 0x1A00 //RX_TDDRC_THRD_2 +272 0x1A00 //RX_TDDRC_THRD_3 +273 0x7EB8 //RX_TDDRC_SLANT_0 +274 0x2500 //RX_TDDRC_SLANT_1 +275 0x6000 //RX_TDDRC_ALPHA_UP_0 +276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x199A //RX_TDDRC_HMNC_GAIN +279 0x0001 //RX_TDDRC_SMT_FLAG +280 0x0CCD //RX_TDDRC_SMT_W +281 0x04BC //RX_TDDRC_DRC_GAIN +195 0x0020 //RX_FDEQ_SUBNUM +196 0x484E //RX_FDEQ_GAIN_0 +197 0x4E4E //RX_FDEQ_GAIN_1 +198 0x4E4E //RX_FDEQ_GAIN_2 +199 0x4848 //RX_FDEQ_GAIN_3 +200 0x484E //RX_FDEQ_GAIN_4 +201 0x6E4E //RX_FDEQ_GAIN_5 +202 0x4850 //RX_FDEQ_GAIN_6 +203 0x4848 //RX_FDEQ_GAIN_7 +204 0x4860 //RX_FDEQ_GAIN_8 +205 0x7468 //RX_FDEQ_GAIN_9 +206 0x6060 //RX_FDEQ_GAIN_10 +207 0x6666 //RX_FDEQ_GAIN_11 +208 0x6666 //RX_FDEQ_GAIN_12 +209 0x6666 //RX_FDEQ_GAIN_13 +210 0x6060 //RX_FDEQ_GAIN_14 +211 0x6060 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0202 //RX_FDEQ_BIN_0 +221 0x0203 //RX_FDEQ_BIN_1 +222 0x0303 //RX_FDEQ_BIN_2 +223 0x0304 //RX_FDEQ_BIN_3 +224 0x0404 //RX_FDEQ_BIN_4 +225 0x0209 //RX_FDEQ_BIN_5 +226 0x0808 //RX_FDEQ_BIN_6 +227 0x090A //RX_FDEQ_BIN_7 +228 0x0B0C //RX_FDEQ_BIN_8 +229 0x0D0E //RX_FDEQ_BIN_9 +230 0x1013 //RX_FDEQ_BIN_10 +231 0x1719 //RX_FDEQ_BIN_11 +232 0x1B1E //RX_FDEQ_BIN_12 +233 0x1E1E //RX_FDEQ_BIN_13 +234 0x1E28 //RX_FDEQ_BIN_14 +235 0x282C //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x4000 //RX_FDEQ_RESRV_0 +245 0x0320 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0035 //RX_FDDRC_BAND_MARGIN_1 +248 0x00D5 //RX_FDDRC_BAND_MARGIN_2 +249 0x0120 //RX_FDDRC_BAND_MARGIN_3 +250 0x0004 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x2000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x2000 //RX_FDDRC_THRD_3_2 +258 0x5000 //RX_FDDRC_THRD_3_3 +259 0x4000 //RX_FDDRC_SLANT_0_0 +260 0x4000 //RX_FDDRC_SLANT_0_1 +261 0x4000 //RX_FDDRC_SLANT_0_2 +262 0x4000 //RX_FDDRC_SLANT_0_3 +263 0x7FFF //RX_FDDRC_SLANT_1_0 +264 0x7FFF //RX_FDDRC_SLANT_1_1 +265 0x7FFF //RX_FDDRC_SLANT_1_2 +266 0x7FFF //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +286 0x0097 //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 +#VOL 6 +163 0x6000 //RX_TDDRC_ALPHA_UP_1 +164 0x6000 //RX_TDDRC_ALPHA_UP_2 +165 0x6000 //RX_TDDRC_ALPHA_UP_3 +166 0x1000 //RX_TDDRC_ALPHA_UP_4 +184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +190 0x7214 //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +269 0x0002 //RX_TDDRC_THRD_0 +270 0x0004 //RX_TDDRC_THRD_1 +271 0x1A00 //RX_TDDRC_THRD_2 +272 0x1A00 //RX_TDDRC_THRD_3 +273 0x7EB8 //RX_TDDRC_SLANT_0 +274 0x2500 //RX_TDDRC_SLANT_1 +275 0x6000 //RX_TDDRC_ALPHA_UP_0 +276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x199A //RX_TDDRC_HMNC_GAIN +279 0x0001 //RX_TDDRC_SMT_FLAG +280 0x0CCD //RX_TDDRC_SMT_W +281 0x04BC //RX_TDDRC_DRC_GAIN +195 0x0020 //RX_FDEQ_SUBNUM +196 0x484E //RX_FDEQ_GAIN_0 +197 0x4E4E //RX_FDEQ_GAIN_1 +198 0x4E4E //RX_FDEQ_GAIN_2 +199 0x4848 //RX_FDEQ_GAIN_3 +200 0x484E //RX_FDEQ_GAIN_4 +201 0x6E4E //RX_FDEQ_GAIN_5 +202 0x4850 //RX_FDEQ_GAIN_6 +203 0x4848 //RX_FDEQ_GAIN_7 +204 0x4860 //RX_FDEQ_GAIN_8 +205 0x7468 //RX_FDEQ_GAIN_9 +206 0x6060 //RX_FDEQ_GAIN_10 +207 0x6666 //RX_FDEQ_GAIN_11 +208 0x6666 //RX_FDEQ_GAIN_12 +209 0x6666 //RX_FDEQ_GAIN_13 +210 0x6060 //RX_FDEQ_GAIN_14 +211 0x6060 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0202 //RX_FDEQ_BIN_0 +221 0x0203 //RX_FDEQ_BIN_1 +222 0x0303 //RX_FDEQ_BIN_2 +223 0x0304 //RX_FDEQ_BIN_3 +224 0x0404 //RX_FDEQ_BIN_4 +225 0x0209 //RX_FDEQ_BIN_5 +226 0x0808 //RX_FDEQ_BIN_6 +227 0x090A //RX_FDEQ_BIN_7 +228 0x0B0C //RX_FDEQ_BIN_8 +229 0x0D0E //RX_FDEQ_BIN_9 +230 0x1013 //RX_FDEQ_BIN_10 +231 0x1719 //RX_FDEQ_BIN_11 +232 0x1B1E //RX_FDEQ_BIN_12 +233 0x1E1E //RX_FDEQ_BIN_13 +234 0x1E28 //RX_FDEQ_BIN_14 +235 0x282C //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x4000 //RX_FDEQ_RESRV_0 +245 0x0320 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0035 //RX_FDDRC_BAND_MARGIN_1 +248 0x00D5 //RX_FDDRC_BAND_MARGIN_2 +249 0x0120 //RX_FDDRC_BAND_MARGIN_3 +250 0x0004 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x2000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x2000 //RX_FDDRC_THRD_3_2 +258 0x5000 //RX_FDDRC_THRD_3_3 +259 0x4000 //RX_FDDRC_SLANT_0_0 +260 0x4000 //RX_FDDRC_SLANT_0_1 +261 0x4000 //RX_FDDRC_SLANT_0_2 +262 0x4000 //RX_FDDRC_SLANT_0_3 +263 0x7FFF //RX_FDDRC_SLANT_1_0 +264 0x7FFF //RX_FDDRC_SLANT_1_1 +265 0x7FFF //RX_FDDRC_SLANT_1_2 +266 0x7FFF //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +286 0x0100 //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 + +#CASE_NAME HANDSFREE-HANDSFREE-CUSTOM1-SWB +#PARAM_MODE Full +#PARAM_TYPE TX+2RX +#TOTAL_CUSTOM_STEP 7+7 +#TX +0 0x0001 //TX_OPERATION_MODE_0 +1 0x0001 //TX_OPERATION_MODE_1 +2 0x0073 //TX_PATCH_REG +3 0x6B74 //TX_SENDFUNC_MODE_0 +4 0x0001 //TX_SENDFUNC_MODE_1 +5 0x0003 //TX_NUM_MIC +6 0x0003 //TX_SAMPLINGFREQ_SIG +7 0x0003 //TX_SAMPLINGFREQ_PROC +8 0x000A //TX_FRAME_SZ_SIG +9 0x000A //TX_FRAME_SZ +10 0x0000 //TX_DELAY_OPT +11 0x0028 //TX_MAX_TAIL_LENGTH +12 0x0001 //TX_NUM_LOUTCHN +13 0x0001 //TX_MAXNUM_AECREF +14 0x0000 //TX_DBG_FUNC_REG +15 0x0000 //TX_DBG_FUNC_REG1 +16 0x0000 //TX_SYS_RESRV_0 +17 0x0000 //TX_SYS_RESRV_1 +18 0x0000 //TX_SYS_RESRV_2 +19 0x0000 //TX_SYS_RESRV_3 +20 0x0000 //TX_DIST2REF0 +21 0x00A3 //TX_DIST2REF1 +22 0x001B //TX_DIST2REF_02 +23 0x0000 //TX_DIST2REF_03 +24 0x0000 //TX_DIST2REF_04 +25 0x0000 //TX_DIST2REF_05 +26 0x0000 //TX_MMIC +27 0x1000 //TX_PGA_0 +28 0x1000 //TX_PGA_1 +29 0x1000 //TX_PGA_2 +30 0x0000 //TX_PGA_3 +31 0x0000 //TX_PGA_4 +32 0x0000 //TX_PGA_5 +33 0x0001 //TX_MIC_PAIRS +34 0x0000 //TX_MIC_PAIRS_HS +35 0x0002 //TX_MICS_FOR_BF +36 0x0000 //TX_MIC_PAIRS_FORL1 +37 0x0002 //TX_MICS_OF_PAIR0 +38 0x0002 //TX_MICS_OF_PAIR1 +39 0x0002 //TX_MICS_OF_PAIR2 +40 0x0002 //TX_MICS_OF_PAIR3 +41 0x0000 //TX_MIC_DATA_SRC0 +42 0x0002 //TX_MIC_DATA_SRC1 +43 0x0001 //TX_MIC_DATA_SRC2 +44 0x0000 //TX_MIC_DATA_SRC3 +45 0x0000 //TX_MIC_PAIR_CH_04 +46 0x0000 //TX_MIC_PAIR_CH_05 +47 0x0000 //TX_MIC_PAIR_CH_10 +48 0x0000 //TX_MIC_PAIR_CH_11 +49 0x0000 //TX_MIC_PAIR_CH_12 +50 0x0000 //TX_MIC_PAIR_CH_13 +51 0x0000 //TX_MIC_PAIR_CH_14 +52 0x05DC //TX_HD_BIN_MASK +53 0x0010 //TX_HD_SUBAND_MASK +54 0x19A1 //TX_HD_FRAME_AVG_MASK +55 0x0320 //TX_HD_MIN_FRQ +56 0x1000 //TX_HD_ALPHA_PSD +57 0x1100 //TX_T_PHPR1 +58 0x0000 //TX_T_PHPR2 +59 0x0000 //TX_T_PTPR +60 0x0000 //TX_T_PNPR +61 0x0000 //TX_T_PAPR1 +62 0xEE6C //TX_T_PSDVAT +63 0x0800 //TX_CNT +64 0x4000 //TX_ANTI_HOWL_GAIN +65 0x0001 //TX_MICFORBFMARK_0 +66 0x0001 //TX_MICFORBFMARK_1 +67 0x0001 //TX_MICFORBFMARK_2 +68 0x0001 //TX_MICFORBFMARK_3 +69 0x0001 //TX_MICFORBFMARK_4 +70 0x0001 //TX_MICFORBFMARK_5 +71 0x0000 //TX_DIST2REF_10 +72 0x3B33 //TX_DIST2REF_11 +73 0x0A70 //TX_DIST2REF2 +74 0x0000 //TX_DIST2REF_13 +75 0x0000 //TX_DIST2REF_14 +76 0x0000 //TX_DIST2REF_15 +77 0x0000 //TX_DIST2REF_20 +78 0x0000 //TX_DIST2REF_21 +79 0x0000 //TX_DIST2REF_22 +80 0x0000 //TX_DIST2REF_23 +81 0x0000 //TX_DIST2REF_24 +82 0x0000 //TX_DIST2REF_25 +83 0x0000 //TX_DIST2REF_30 +84 0x0000 //TX_DIST2REF_31 +85 0x0000 //TX_DIST2REF_32 +86 0x0000 //TX_DIST2REF_33 +87 0x0000 //TX_DIST2REF_34 +88 0x0000 //TX_DIST2REF_35 +89 0x0000 //TX_MIC_LOC_00 +90 0x0000 //TX_MIC_LOC_01 +91 0x0000 //TX_MIC_LOC_02 +92 0x0000 //TX_MIC_LOC_03 +93 0x0000 //TX_MIC_LOC_04 +94 0x0000 //TX_MIC_LOC_05 +95 0x0000 //TX_MIC_LOC_10 +96 0x0000 //TX_MIC_LOC_11 +97 0x0000 //TX_MIC_LOC_12 +98 0x0000 //TX_MIC_LOC_13 +99 0x0000 //TX_MIC_LOC_14 +100 0x0000 //TX_MIC_LOC_15 +101 0x0000 //TX_MIC_LOC_20 +102 0x0000 //TX_MIC_LOC_21 +103 0x0000 //TX_MIC_LOC_22 +104 0x0000 //TX_MIC_LOC_23 +105 0x0000 //TX_MIC_LOC_24 +106 0x0000 //TX_MIC_LOC_25 +107 0x0800 //TX_MIC_REFBLK_VOLUME +108 0x0CAE //TX_MIC_BLOCK_VOLUME +109 0x0000 //TX_INVERSE_MASK +110 0x0000 //TX_ADCS_MASK +111 0x04D0 //TX_ADCS_GAIN +112 0x4000 //TX_NFC_GAINFAC +113 0x0000 //TX_MAINMIC_BLKFACTOR +114 0x0000 //TX_REFMIC_BLKFACTOR +115 0x0000 //TX_BLMIC_BLKFACTOR +116 0x0000 //TX_BRMIC_BLKFACTOR +117 0x0031 //TX_MICBLK_START_BIN +118 0x0060 //TX_MICBLK_END_BIN +119 0x0015 //TX_MICBLK_FE_HOLD +120 0xFFF2 //TX_MICBLK_MR_EXP_TH +121 0xFFF2 //TX_MICBLK_LR_EXP_TH +122 0x0015 //TX_FENE_HOLD +123 0x4000 //TX_FE_ENER_TH_MTS +124 0x0004 //TX_FE_ENER_TH_EXP +125 0x6000 //TX_C_POST_FLT_MIC_MAINBLK +126 0x6000 //TX_C_POST_FLT_MIC_REFBLK +127 0x0010 //TX_MIC_BLOCK_N +128 0x7B02 //TX_A_HP +129 0x4000 //TX_B_PE +130 0x5000 //TX_THR_PITCH_DET_0 +131 0x4800 //TX_THR_PITCH_DET_1 +132 0x4000 //TX_THR_PITCH_DET_2 +133 0x0008 //TX_PITCH_BFR_LEN +134 0x0003 //TX_SBD_PITCH_DET +135 0x0050 //TX_TD_AEC_L +136 0x4000 //TX_MU0_UNP_TD_AEC +137 0x1000 //TX_MU0_PTD_TD_AEC +138 0x0000 //TX_PP_RESRV_0 +139 0x2A94 //TX_PP_RESRV_1 +140 0x55F0 //TX_PP_RESRV_2 +141 0x0000 //TX_PP_RESRV_3 +142 0x0000 //TX_PP_RESRV_4 +143 0x0000 //TX_PP_RESRV_5 +144 0x0000 //TX_PP_RESRV_6 +145 0x0000 //TX_PP_RESRV_7 +146 0x0028 //TX_TAIL_LENGTH +147 0x0400 //TX_AEC_REF_GAIN_0 +148 0x0800 //TX_AEC_REF_GAIN_1 +149 0x0800 //TX_AEC_REF_GAIN_2 +150 0x7600 //TX_EAD_THR +151 0x1000 //TX_THR_RE_EST +152 0x2000 //TX_MIN_EQ_RE_EST_0 +153 0x0600 //TX_MIN_EQ_RE_EST_1 +154 0x3000 //TX_MIN_EQ_RE_EST_2 +155 0x3000 //TX_MIN_EQ_RE_EST_3 +156 0x3000 //TX_MIN_EQ_RE_EST_4 +157 0x3000 //TX_MIN_EQ_RE_EST_5 +158 0x3000 //TX_MIN_EQ_RE_EST_6 +159 0x1000 //TX_MIN_EQ_RE_EST_7 +160 0x7800 //TX_MIN_EQ_RE_EST_8 +161 0x7800 //TX_MIN_EQ_RE_EST_9 +162 0x7800 //TX_MIN_EQ_RE_EST_10 +163 0x7800 //TX_MIN_EQ_RE_EST_11 +164 0x7800 //TX_MIN_EQ_RE_EST_12 +165 0x3000 //TX_LAMBDA_RE_EST +166 0x3000 //TX_LAMBDA_CB_NLE +167 0x7FFF //TX_C_POST_FLT +168 0x4000 //TX_GAIN_NP +169 0x0180 //TX_SE_HOLD_N +170 0x00C8 //TX_DT_HOLD_N +171 0x0880 //TX_DT2_HOLD_N +172 0x6666 //TX_AEC_RESRV_0 +173 0x0000 //TX_AEC_RESRV_1 +174 0x0014 //TX_AEC_RESRV_2 +175 0x0000 //TX_MIC_DELAY_LENGTH +176 0x0000 //TX_REF_DELAY_LENGTH +177 0x0000 //TX_ADD_LINEIN_GAINL +178 0x0000 //TX_ADD_LINEIN_GAINH +179 0x0000 //TX_MIN_EQ_RE_EST_14 +180 0x0000 //TX_DTD_THR1_8 +181 0x7FFF //TX_DTD_THR2_8 +182 0x0000 //TX_DTD_MIC_BLK2 +183 0x0008 //TX_FRQ_LIN_LEN +184 0x7FFF //TX_FRQ_AEC_LEN_RHO +185 0x6000 //TX_MU0_UNP_FRQ_AEC +186 0x4000 //TX_MU0_PTD_FRQ_AEC +187 0x000A //TX_MINENOISETH +188 0x0800 //TX_MU0_RE_EST +189 0x0001 //TX_AEC_NUM_CH +190 0x0000 //TX_BIGECHOATTENUATION_MAX +191 0x2000 //TX_A_POST_FLT_MICBLK +192 0x0000 //TX_BLKENERTH +193 0x0000 //TX_BLKENERHIGHTH +194 0x0000 //TX_NORMENERTH +195 0x0000 //TX_NORMENERHIGHTH +196 0x0000 //TX_NORMENERHIGHTHL +197 0x7148 //TX_DTD_THR1_0 +198 0x7148 //TX_DTD_THR1_1 +199 0x7148 //TX_DTD_THR1_2 +200 0x7148 //TX_DTD_THR1_3 +201 0x7148 //TX_DTD_THR1_4 +202 0x7700 //TX_DTD_THR1_5 +203 0x7148 //TX_DTD_THR1_6 +204 0x7E00 //TX_DTD_THR2_0 +205 0x7E00 //TX_DTD_THR2_1 +206 0x5000 //TX_DTD_THR2_2 +207 0x5000 //TX_DTD_THR2_3 +208 0x5000 //TX_DTD_THR2_4 +209 0x5000 //TX_DTD_THR2_5 +210 0x5000 //TX_DTD_THR2_6 +211 0x7FFF //TX_DTD_THR3 +212 0x0000 //TX_SPK_CUT_K +213 0x36B0 //TX_DT_CUT_K +214 0x0100 //TX_DT_CUT_THR +215 0x04EB //TX_COMFORT_G +216 0x01F4 //TX_POWER_YOUT_TH +217 0x4000 //TX_FDPFGAINECHO +218 0x0000 //TX_DTD_HD_THR +219 0x0000 //TX_SPK_CUT_K_S +220 0x7FFF //TX_DTD_MIC_BLK +221 0x023E //TX_ADPT_STRICT_L +222 0x023E //TX_ADPT_STRICT_H +223 0x0001 //TX_RATIO_DT_L_TH_LOW +224 0x3A98 //TX_RATIO_DT_H_TH_LOW +225 0x07D0 //TX_RATIO_DT_L_TH_HIGH +226 0x59D8 //TX_RATIO_DT_H_TH_HIGH +227 0x0001 //TX_RATIO_DT_L0_TH +228 0x7FFF //TX_B_POST_FILT_ECHO_L +229 0x7FFF //TX_B_POST_FILT_ECHO_H +230 0x0200 //TX_MIN_G_CTRL_ECHO +231 0x1000 //TX_B_LESSCUT_RTO_ECHO +232 0x0000 //TX_EPD_OFFSET_00 +233 0x0000 //TX_EPD_OFFST_01 +234 0x02BC //TX_RATIO_DT_L0_TH_HIGH +235 0x7FFF //TX_RATIO_DT_H_TH_CUT +236 0x7FFF //TX_MIN_EQ_RE_EST_13 +237 0x0000 //TX_DTD_THR1_7 +238 0x0000 //TX_DTD_THR2_7 +239 0x0800 //TX_DT_RESRV_7 +240 0x0800 //TX_DT_RESRV_8 +241 0x0000 //TX_DT_RESRV_9 +242 0xF800 //TX_THR_SN_EST_0 +243 0xFA00 //TX_THR_SN_EST_1 +244 0xFA00 //TX_THR_SN_EST_2 +245 0xFA00 //TX_THR_SN_EST_3 +246 0xF800 //TX_THR_SN_EST_4 +247 0xFA00 //TX_THR_SN_EST_5 +248 0xF800 //TX_THR_SN_EST_6 +249 0xF800 //TX_THR_SN_EST_7 +250 0x0100 //TX_DELTA_THR_SN_EST_0 +251 0x0100 //TX_DELTA_THR_SN_EST_1 +252 0x0100 //TX_DELTA_THR_SN_EST_2 +253 0x0000 //TX_DELTA_THR_SN_EST_3 +254 0x0100 //TX_DELTA_THR_SN_EST_4 +255 0x0200 //TX_DELTA_THR_SN_EST_5 +256 0x0100 //TX_DELTA_THR_SN_EST_6 +257 0x0200 //TX_DELTA_THR_SN_EST_7 +258 0x4000 //TX_LAMBDA_NN_EST_0 +259 0x4000 //TX_LAMBDA_NN_EST_1 +260 0x4000 //TX_LAMBDA_NN_EST_2 +261 0x4000 //TX_LAMBDA_NN_EST_3 +262 0x4000 //TX_LAMBDA_NN_EST_4 +263 0x4000 //TX_LAMBDA_NN_EST_5 +264 0x4000 //TX_LAMBDA_NN_EST_6 +265 0x4000 //TX_LAMBDA_NN_EST_7 +266 0x0400 //TX_N_SN_EST +267 0x001E //TX_INBEAM_T +268 0x0041 //TX_INBEAMHOLDT +269 0x2000 //TX_G_STRICT +270 0x2000 //TX_EQ_THR_BF +271 0x799A //TX_LAMBDA_EQ_BF +272 0x1000 //TX_NE_RTO_TH +273 0x0400 //TX_NE_RTO_TH_L +274 0x0800 //TX_MAINREFRTOH_TH_H +275 0x0800 //TX_MAINREFRTOH_TH_L +276 0x0800 //TX_MAINREFRTO_TH_H +277 0x0800 //TX_MAINREFRTO_TH_L +278 0x0200 //TX_MAINREFRTO_TH_EQ +279 0x2000 //TX_B_POST_FLT_0 +280 0x1000 //TX_B_POST_FLT_1 +281 0x0010 //TX_NS_LVL_CTRL_0 +282 0x003C //TX_NS_LVL_CTRL_1 +283 0x0024 //TX_NS_LVL_CTRL_2 +284 0x003C //TX_NS_LVL_CTRL_3 +285 0x0014 //TX_NS_LVL_CTRL_4 +286 0x0011 //TX_NS_LVL_CTRL_5 +287 0x003C //TX_NS_LVL_CTRL_6 +288 0x0011 //TX_NS_LVL_CTRL_7 +289 0x0020 //TX_MIN_GAIN_S_0 +290 0x0020 //TX_MIN_GAIN_S_1 +291 0x0020 //TX_MIN_GAIN_S_2 +292 0x0020 //TX_MIN_GAIN_S_3 +293 0x0020 //TX_MIN_GAIN_S_4 +294 0x0020 //TX_MIN_GAIN_S_5 +295 0x0020 //TX_MIN_GAIN_S_6 +296 0x0020 //TX_MIN_GAIN_S_7 +297 0x6000 //TX_NMOS_SUP +298 0x0000 //TX_NS_MAX_PRI_SNR_TH +299 0x0000 //TX_NMOS_SUP_MENSA +300 0x7FFF //TX_SNRI_SUP_0 +301 0x4000 //TX_SNRI_SUP_1 +302 0x4000 //TX_SNRI_SUP_2 +303 0x4000 //TX_SNRI_SUP_3 +304 0x4000 //TX_SNRI_SUP_4 +305 0x4000 //TX_SNRI_SUP_5 +306 0x4000 //TX_SNRI_SUP_6 +307 0x4000 //TX_SNRI_SUP_7 +308 0x7FFF //TX_THR_LFNS +309 0x0018 //TX_G_LFNS +310 0x09C4 //TX_GAIN0_NTH +311 0x000A //TX_MUSIC_MORENS +312 0x7FFF //TX_A_POST_FILT_0 +313 0x2000 //TX_A_POST_FILT_1 +314 0x7FFF //TX_A_POST_FILT_S_0 +315 0x7FFF //TX_A_POST_FILT_S_1 +316 0x7FFF //TX_A_POST_FILT_S_2 +317 0x7FFF //TX_A_POST_FILT_S_3 +318 0x7FFF //TX_A_POST_FILT_S_4 +319 0x7FFF //TX_A_POST_FILT_S_5 +320 0x7FFF //TX_A_POST_FILT_S_6 +321 0x7FFF //TX_A_POST_FILT_S_7 +322 0x2000 //TX_B_POST_FILT_0 +323 0x6000 //TX_B_POST_FILT_1 +324 0x6000 //TX_B_POST_FILT_2 +325 0x6000 //TX_B_POST_FILT_3 +326 0x4000 //TX_B_POST_FILT_4 +327 0x1000 //TX_B_POST_FILT_5 +328 0x1000 //TX_B_POST_FILT_6 +329 0x2000 //TX_B_POST_FILT_7 +330 0x4000 //TX_B_LESSCUT_RTO_S_0 +331 0x7FFF //TX_B_LESSCUT_RTO_S_1 +332 0x7FFF //TX_B_LESSCUT_RTO_S_2 +333 0x7FFF //TX_B_LESSCUT_RTO_S_3 +334 0x7FFF //TX_B_LESSCUT_RTO_S_4 +335 0x6000 //TX_B_LESSCUT_RTO_S_5 +336 0x7FFF //TX_B_LESSCUT_RTO_S_6 +337 0x7FFF //TX_B_LESSCUT_RTO_S_7 +338 0x7F00 //TX_LAMBDA_PFILT +339 0x7F00 //TX_LAMBDA_PFILT_S_0 +340 0x7F00 //TX_LAMBDA_PFILT_S_1 +341 0x7F00 //TX_LAMBDA_PFILT_S_2 +342 0x7F00 //TX_LAMBDA_PFILT_S_3 +343 0x7F00 //TX_LAMBDA_PFILT_S_4 +344 0x7F00 //TX_LAMBDA_PFILT_S_5 +345 0x7F00 //TX_LAMBDA_PFILT_S_6 +346 0x7F00 //TX_LAMBDA_PFILT_S_7 +347 0x0200 //TX_K_PEPPER +348 0x0400 //TX_A_PEPPER +349 0x1EAA //TX_K_PEPPER_HF +350 0x0600 //TX_A_PEPPER_HF +351 0x0001 //TX_HMNC_BST_FLG +352 0x0200 //TX_HMNC_BST_THR +353 0x0040 //TX_DT_BINVAD_TH_0 +354 0x0040 //TX_DT_BINVAD_TH_1 +355 0x0100 //TX_DT_BINVAD_TH_2 +356 0x0100 //TX_DT_BINVAD_TH_3 +357 0x36B0 //TX_DT_BINVAD_ENDF +358 0x0200 //TX_C_POST_FLT_DT +359 0x0CCD //TX_NS_B_POST_FLT_LESSCUT +360 0x0140 //TX_DT_BOOST +361 0x0000 //TX_BF_SGRAD_FLG +362 0x0005 //TX_BF_DVG_TH +363 0x001E //TX_SN_C_F +364 0x0000 //TX_K_APT +365 0x0001 //TX_NOISEDET +366 0x0064 //TX_NDETCT +367 0x0050 //TX_NOISE_TH_0 +368 0x7FFF //TX_NOISE_TH_0_2 +369 0x7FFF //TX_NOISE_TH_0_3 +370 0x07D0 //TX_NOISE_TH_1 +371 0x01F4 //TX_NOISE_TH_2 +372 0x36B0 //TX_NOISE_TH_3 +373 0x2710 //TX_NOISE_TH_4 +374 0x2CEC //TX_NOISE_TH_5 +375 0x7FFF //TX_NOISE_TH_5_2 +376 0x0000 //TX_NOISE_TH_5_3 +377 0x7FFF //TX_NOISE_TH_5_4 +378 0x0DAC //TX_NOISE_TH_6 +379 0x0050 //TX_MINENOISE_TH +380 0xD508 //TX_MORENS_TFMASK_TH +381 0x0001 //TX_DRC_QUIET_FLOOR +382 0x3A98 //TX_RATIODTL_CUT_TH +383 0x07D0 //TX_DT_CUT_K1 +384 0x0666 //TX_OUT_ENER_S_TH_CLEAN +385 0x0666 //TX_OUT_ENER_S_TH_LESSCLEAN +386 0x0333 //TX_OUT_ENER_S_TH_NOISY +387 0x019A //TX_OUT_ENER_TH_NOISE +388 0x0333 //TX_OUT_ENER_TH_SPEECH +389 0x2000 //TX_SN_NPB_GAIN +390 0x0000 //TX_NN_NPB_GAIN +391 0x7FFF //TX_POST_MASK_SUP_HSNE +392 0x1388 //TX_TAIL_DET_TH +393 0x4000 //TX_B_LESSCUT_RTO_WTA +394 0x0000 //TX_MEL_G_R +395 0x0080 //TX_SUPHIGH_TH +396 0x0000 //TX_MASK_G_R +397 0x0002 //TX_EXTRA_NS_L +398 0x1800 //TX_C_POST_FLT_MASK +399 0x7FFF //TX_A_POST_FLT_WNS +400 0x0148 //TX_MIN_G_LOW300HZ +401 0x0001 //TX_MAXLEVEL_CNG +402 0x00B4 //TX_STN_NOISE_TH +403 0x4000 //TX_POST_MASK_SUP +404 0x7FFF //TX_POST_MASK_ADJUST +405 0x00C8 //TX_NS_ENOISE_MIC0_TH +406 0x0050 //TX_MINENOISE_MIC0_TH +407 0x012C //TX_MINENOISE_MIC0_S_TH +408 0x4000 //TX_MIN_G_CTRL_SSNS +409 0x0000 //TX_METAL_RTO_THR +410 0x4848 //TX_NS_FP_K_METAL +411 0x3A98 //TX_NOISEDET_BOOST_TH +412 0x0FA0 //TX_NSMOOTH_TH +413 0x0000 //TX_NS_RESRV_8 +414 0x1800 //TX_RHO_UPB +415 0x0BB8 //TX_N_HOLD_HS +416 0x0050 //TX_N_RHO_BFR0 +417 0x7FFF //TX_LAMBDA_ARSP_EST +418 0x0100 //TX_EXTRA_GAIN_MICBLOCK +419 0x0CCD //TX_THR_STD_NSR +420 0x019A //TX_THR_STD_PLH +421 0x2AF8 //TX_N_HOLD_STD +422 0x0066 //TX_THR_STD_RHO +423 0x2000 //TX_BF_RESET_THR_HS +424 0x09C4 //TX_SB_RTO_MEAN_TH +425 0x0000 //TX_SB_RHO_MEAN_TH_NTALK +426 0x3800 //TX_SB_RTO_MEAN_TH_ABN +427 0x2EE0 //TX_SB_RTO_MEAN_TH_RUB +428 0x0000 //TX_WTA_EN_RTO_TH +429 0x0000 //TX_TOP_ENER_TH_F +430 0x0000 //TX_DESIRED_TALK_HOLDT +431 0x0800 //TX_MIC_BLOCK_FACTOR +432 0x0000 //TX_NSEST_BFRLRNRDC +433 0x0000 //TX_THR_POST_FLT_HS +434 0x0010 //TX_HS_VAD_BIN +435 0x2666 //TX_THR_VAD_HS +436 0x2CCD //TX_MEAN_RTO_MIN_TH2 +437 0x0032 //TX_SILENCE_T +438 0x0000 //TX_A_POST_FLT_WTA +439 0x799A //TX_LAMBDA_PFLT_WTA +440 0x0000 //TX_SB_RHO_MEAN2_TH +441 0x0190 //TX_SB_RHO_MEAN3_TH +442 0x0000 //TX_HS_RESRV_4 +443 0x0000 //TX_HS_RESRV_5 +444 0x003C //TX_DOA_VAD_THR_1 +445 0x0000 //TX_DOA_VAD_THR_2 +446 0x0028 //TX_DOA_VAD_THR1_0 +447 0x0028 //TX_DOA_VAD_THR1_1 +448 0x0000 //TX_SRC_DOA_RNG_LOW_0A +449 0x00B4 //TX_SRC_DOA_RNG_HIGH_0A +450 0x005A //TX_DFLT_SRC_DOA_0A +451 0x0000 //TX_SRC_DOA_RNG_LOW_0B +452 0x0000 //TX_SRC_DOA_RNG_HIGH_0B +453 0x0000 //TX_DFLT_SRC_DOA_0B +454 0x0000 //TX_SRC_DOA_RNG_LOW_0C +455 0x0000 //TX_SRC_DOA_RNG_HIGH_0C +456 0x0000 //TX_DFLT_SRC_DOA_0C +457 0x0000 //TX_SRC_DOA_RNG_LOW_0D +458 0x0000 //TX_SRC_DOA_RNG_HIGH_0D +459 0x0000 //TX_DFLT_SRC_DOA_0D +460 0x0000 //TX_SRC_DOA_RNG_LOW_1A +461 0x00B4 //TX_SRC_DOA_RNG_HIGH_1A +462 0x005A //TX_DFLT_SRC_DOA_1A +463 0x0000 //TX_SRC_DOA_RNG_LOW_1B +464 0x00B4 //TX_SRC_DOA_RNG_HIGH_1B +465 0x005A //TX_DFLT_SRC_DOA_1B +466 0x0000 //TX_SRC_DOA_RNG_LOW_1C +467 0x00B4 //TX_SRC_DOA_RNG_HIGH_1C +468 0x005A //TX_DFLT_SRC_DOA_1C +469 0x0000 //TX_SRC_DOA_RNG_LOW_1D +470 0x00B4 //TX_SRC_DOA_RNG_HIGH_1D +471 0x005A //TX_DFLT_SRC_DOA_1D +472 0x0100 //TX_BF_HOLDOFF_T +473 0x7FFF //TX_DOA_COST_FACTOR +474 0x4000 //TX_MAINTOREFR_TH0 +475 0x071C //TX_DOA_TRK_THR +476 0x012C //TX_DOA_TRACK_HT +477 0x0200 //TX_N1_HOLD_HF +478 0x0100 //TX_N2_HOLD_HF +479 0x3000 //TX_BF_RESET_THR_HF +480 0x7333 //TX_DOA_SMOOTH +481 0x0800 //TX_MU_BF +482 0x0800 //TX_BF_MU_LF_B2 +483 0x0040 //TX_BF_FC_END_BIN_B2 +484 0x0020 //TX_BF_FC_END_BIN +485 0x0000 //TX_HF_RESRV_25 +486 0x0000 //TX_HF_RESRV_26 +487 0x0007 //TX_N_DOA_SEED +488 0x0001 //TX_FINE_DOA_SEARCH_FLG +489 0x0000 //TX_HF_RESRV_27 +490 0x038E //TX_DLT_SRC_DOA_RNG +491 0x0200 //TX_BF_MU_LF +492 0x0000 //TX_DFLT_SRC_LOC_0 +493 0x7FFF //TX_DFLT_SRC_LOC_1 +494 0x0000 //TX_DFLT_SRC_LOC_2 +495 0x038E //TX_DOA_TRACK_VADTH +496 0x0000 //TX_DOA_TRACK_NEW +497 0x0230 //TX_NOR_OFF_THR +498 0x0CCD //TX_MORE_ON_700HZ_THR +499 0x0000 //TX_MU_BF_ADPT_NS +500 0x0000 //TX_ADAPT_LEN +501 0x2000 //TX_MORE_SNS +502 0x0000 //TX_NOR_OFF_TH1 +503 0x0000 //TX_WIDE_MASK_TH +504 0x4650 //TX_SUBSNRATIOHIGH4MEANBCK_THR +505 0x4000 //TX_C_POST_FLT_CUT +506 0x2000 //TX_RADIODTLV +507 0x0320 //TX_POWER_LINEIN_TH +508 0x0014 //TX_FE_VADCOUNT_TH_FC +509 0x000A //TX_ECHO_SUPP_FC +510 0x0C80 //TX_ECHO_TH +511 0x6666 //TX_MIC_TO_BFGAIN +512 0x0000 //TX_MICTOBFGAIN0 +513 0x0000 //TX_FASTMUE_TH +514 0x3000 //TX_DEREVERB_LF_MU +515 0x34CD //TX_DEREVERB_HF_MU +516 0x0007 //TX_DEREVERB_DELAY +517 0x0004 //TX_DEREVERB_COEF_LEN +518 0x0003 //TX_DEREVERB_DNR +519 0x0000 //TX_DEREVERB_ALPHA +520 0x0000 //TX_DEREVERB_BETA +521 0x3A98 //TX_GSC_RTOL_TH +522 0x3A98 //TX_GSC_RTOH_TH +523 0x7E2C //TX_WIDE2_MEANHTH +524 0x0000 //TX_DR_RESRV_5 +525 0x0000 //TX_DR_RESRV_6 +526 0x0000 //TX_DR_RESRV_7 +527 0x0000 //TX_DR_RESRV_8 +528 0x1333 //TX_WIND_MARK_TH +529 0x399A //TX_CORR_THR +530 0x0004 //TX_SNR_THR +531 0x0010 //TX_ENGY_THR +532 0x1770 //TX_CORR_HIGH_TH +533 0x6000 //TX_ENGY_THR_2 +534 0x3400 //TX_MEAN_RTO_THR +535 0x0028 //TX_WNS_ENOISE_MIC0_TH +536 0x3000 //TX_RATIOMICL_TH +537 0x64CD //TX_CALIG_HS +538 0x0000 //TX_LVL_CTRL +539 0x0014 //TX_WIND_SUPRTO +540 0x000A //TX_WNS_MIN_G +541 0x0000 //TX_WNS_B_POST_FLT +542 0x2800 //TX_RATIOMICH_TH +543 0xD120 //TX_WIND_INBEAM_L_TH +544 0x0FA0 //TX_WIND_INBEAM_H_TH +545 0x2000 //TX_WNS_RESRV_0 +546 0x59D8 //TX_WNS_RESRV_1 +547 0x0000 //TX_WNS_RESRV_2 +548 0x0000 //TX_WNS_RESRV_3 +549 0x0000 //TX_WNS_RESRV_4 +550 0x0000 //TX_WNS_RESRV_5 +551 0x0000 //TX_WNS_RESRV_6 +552 0x0000 //TX_PB_B_POST_FLT_LESSCUT +553 0x0070 //TX_BF_LESSCUT_BBIN +554 0x0070 //TX_BF_LESSCUT_EBIN +555 0x0010 //TX_POSTBFB0 +556 0x0070 //TX_POSTBFB +557 0x00B0 //TX_POSTBFE +558 0x0E66 //TX_SPEECH_SNR_TH +559 0x0050 //TX_PB_MAX_PRI_SNR_TH +560 0x770A //TX_MAX_PRI_SNR_TH_L +561 0x0000 //TX_PFGAIN +562 0x0000 //TX_MAINTOREFR_TH +563 0x0000 //TX_SAM_MARK +564 0x0000 //TX_PB_RESRV_0 +565 0x0000 //TX_PB_RESRV_1 +566 0x0020 //TX_FDEQ_SUBNUM +567 0x4848 //TX_FDEQ_GAIN_0 +568 0x4848 //TX_FDEQ_GAIN_1 +569 0x4850 //TX_FDEQ_GAIN_2 +570 0x5050 //TX_FDEQ_GAIN_3 +571 0x4848 //TX_FDEQ_GAIN_4 +572 0x4850 //TX_FDEQ_GAIN_5 +573 0x5261 //TX_FDEQ_GAIN_6 +574 0x5C4C //TX_FDEQ_GAIN_7 +575 0x4C4E //TX_FDEQ_GAIN_8 +576 0x4848 //TX_FDEQ_GAIN_9 +577 0x4C4F //TX_FDEQ_GAIN_10 +578 0x5153 //TX_FDEQ_GAIN_11 +579 0x6265 //TX_FDEQ_GAIN_12 +580 0x638B //TX_FDEQ_GAIN_13 +581 0x8480 //TX_FDEQ_GAIN_14 +582 0x7A7C //TX_FDEQ_GAIN_15 +583 0x4848 //TX_FDEQ_GAIN_16 +584 0x4848 //TX_FDEQ_GAIN_17 +585 0x4848 //TX_FDEQ_GAIN_18 +586 0x4848 //TX_FDEQ_GAIN_19 +587 0x4848 //TX_FDEQ_GAIN_20 +588 0x4848 //TX_FDEQ_GAIN_21 +589 0x4848 //TX_FDEQ_GAIN_22 +590 0x4848 //TX_FDEQ_GAIN_23 +591 0x0202 //TX_FDEQ_BIN_0 +592 0x0203 //TX_FDEQ_BIN_1 +593 0x0303 //TX_FDEQ_BIN_2 +594 0x0304 //TX_FDEQ_BIN_3 +595 0x0405 //TX_FDEQ_BIN_4 +596 0x0506 //TX_FDEQ_BIN_5 +597 0x0708 //TX_FDEQ_BIN_6 +598 0x090A //TX_FDEQ_BIN_7 +599 0x0B0C //TX_FDEQ_BIN_8 +600 0x0D0E //TX_FDEQ_BIN_9 +601 0x1013 //TX_FDEQ_BIN_10 +602 0x1719 //TX_FDEQ_BIN_11 +603 0x1B1E //TX_FDEQ_BIN_12 +604 0x1E1E //TX_FDEQ_BIN_13 +605 0x1E28 //TX_FDEQ_BIN_14 +606 0x284A //TX_FDEQ_BIN_15 +607 0x0000 //TX_FDEQ_BIN_16 +608 0x0000 //TX_FDEQ_BIN_17 +609 0x0000 //TX_FDEQ_BIN_18 +610 0x0000 //TX_FDEQ_BIN_19 +611 0x0000 //TX_FDEQ_BIN_20 +612 0x0000 //TX_FDEQ_BIN_21 +613 0x0000 //TX_FDEQ_BIN_22 +614 0x0000 //TX_FDEQ_BIN_23 +615 0x0000 //TX_FDEQ_PADDING +616 0x0020 //TX_PREEQ_SUBNUM_MIC0 +617 0x4848 //TX_PREEQ_GAIN_MIC0_0 +618 0x4848 //TX_PREEQ_GAIN_MIC0_1 +619 0x4848 //TX_PREEQ_GAIN_MIC0_2 +620 0x4848 //TX_PREEQ_GAIN_MIC0_3 +621 0x4848 //TX_PREEQ_GAIN_MIC0_4 +622 0x4848 //TX_PREEQ_GAIN_MIC0_5 +623 0x4848 //TX_PREEQ_GAIN_MIC0_6 +624 0x4848 //TX_PREEQ_GAIN_MIC0_7 +625 0x4848 //TX_PREEQ_GAIN_MIC0_8 +626 0x4848 //TX_PREEQ_GAIN_MIC0_9 +627 0x4848 //TX_PREEQ_GAIN_MIC0_10 +628 0x4848 //TX_PREEQ_GAIN_MIC0_11 +629 0x4848 //TX_PREEQ_GAIN_MIC0_12 +630 0x4848 //TX_PREEQ_GAIN_MIC0_13 +631 0x4848 //TX_PREEQ_GAIN_MIC0_14 +632 0x4848 //TX_PREEQ_GAIN_MIC0_15 +633 0x4848 //TX_PREEQ_GAIN_MIC0_16 +634 0x4848 //TX_PREEQ_GAIN_MIC0_17 +635 0x4848 //TX_PREEQ_GAIN_MIC0_18 +636 0x4848 //TX_PREEQ_GAIN_MIC0_19 +637 0x4848 //TX_PREEQ_GAIN_MIC0_20 +638 0x4848 //TX_PREEQ_GAIN_MIC0_21 +639 0x4848 //TX_PREEQ_GAIN_MIC0_22 +640 0x4848 //TX_PREEQ_GAIN_MIC0_23 +641 0x0202 //TX_PREEQ_BIN_MIC0_0 +642 0x0203 //TX_PREEQ_BIN_MIC0_1 +643 0x0303 //TX_PREEQ_BIN_MIC0_2 +644 0x0304 //TX_PREEQ_BIN_MIC0_3 +645 0x0405 //TX_PREEQ_BIN_MIC0_4 +646 0x0506 //TX_PREEQ_BIN_MIC0_5 +647 0x0708 //TX_PREEQ_BIN_MIC0_6 +648 0x090A //TX_PREEQ_BIN_MIC0_7 +649 0x0B0C //TX_PREEQ_BIN_MIC0_8 +650 0x0D0E //TX_PREEQ_BIN_MIC0_9 +651 0x1013 //TX_PREEQ_BIN_MIC0_10 +652 0x1719 //TX_PREEQ_BIN_MIC0_11 +653 0x1B1E //TX_PREEQ_BIN_MIC0_12 +654 0x1E1E //TX_PREEQ_BIN_MIC0_13 +655 0x1E28 //TX_PREEQ_BIN_MIC0_14 +656 0x3042 //TX_PREEQ_BIN_MIC0_15 +657 0x0000 //TX_PREEQ_BIN_MIC0_16 +658 0x0000 //TX_PREEQ_BIN_MIC0_17 +659 0x0000 //TX_PREEQ_BIN_MIC0_18 +660 0x0000 //TX_PREEQ_BIN_MIC0_19 +661 0x0000 //TX_PREEQ_BIN_MIC0_20 +662 0x0000 //TX_PREEQ_BIN_MIC0_21 +663 0x0000 //TX_PREEQ_BIN_MIC0_22 +664 0x0000 //TX_PREEQ_BIN_MIC0_23 +665 0x0020 //TX_PREEQ_SUBNUM_MIC1 +666 0x4848 //TX_PREEQ_GAIN_MIC1_0 +667 0x4848 //TX_PREEQ_GAIN_MIC1_1 +668 0x4848 //TX_PREEQ_GAIN_MIC1_2 +669 0x4848 //TX_PREEQ_GAIN_MIC1_3 +670 0x4848 //TX_PREEQ_GAIN_MIC1_4 +671 0x4848 //TX_PREEQ_GAIN_MIC1_5 +672 0x494A //TX_PREEQ_GAIN_MIC1_6 +673 0x4B4C //TX_PREEQ_GAIN_MIC1_7 +674 0x4D4E //TX_PREEQ_GAIN_MIC1_8 +675 0x4F52 //TX_PREEQ_GAIN_MIC1_9 +676 0x5355 //TX_PREEQ_GAIN_MIC1_10 +677 0x585C //TX_PREEQ_GAIN_MIC1_11 +678 0x616A //TX_PREEQ_GAIN_MIC1_12 +679 0x726E //TX_PREEQ_GAIN_MIC1_13 +680 0x5C48 //TX_PREEQ_GAIN_MIC1_14 +681 0x3B38 //TX_PREEQ_GAIN_MIC1_15 +682 0x4848 //TX_PREEQ_GAIN_MIC1_16 +683 0x4848 //TX_PREEQ_GAIN_MIC1_17 +684 0x4848 //TX_PREEQ_GAIN_MIC1_18 +685 0x4848 //TX_PREEQ_GAIN_MIC1_19 +686 0x4848 //TX_PREEQ_GAIN_MIC1_20 +687 0x4848 //TX_PREEQ_GAIN_MIC1_21 +688 0x4848 //TX_PREEQ_GAIN_MIC1_22 +689 0x4848 //TX_PREEQ_GAIN_MIC1_23 +690 0x0202 //TX_PREEQ_BIN_MIC1_0 +691 0x0203 //TX_PREEQ_BIN_MIC1_1 +692 0x0303 //TX_PREEQ_BIN_MIC1_2 +693 0x0304 //TX_PREEQ_BIN_MIC1_3 +694 0x0405 //TX_PREEQ_BIN_MIC1_4 +695 0x0506 //TX_PREEQ_BIN_MIC1_5 +696 0x0708 //TX_PREEQ_BIN_MIC1_6 +697 0x090A //TX_PREEQ_BIN_MIC1_7 +698 0x0B0C //TX_PREEQ_BIN_MIC1_8 +699 0x0D0E //TX_PREEQ_BIN_MIC1_9 +700 0x1013 //TX_PREEQ_BIN_MIC1_10 +701 0x1719 //TX_PREEQ_BIN_MIC1_11 +702 0x1B1E //TX_PREEQ_BIN_MIC1_12 +703 0x1E1E //TX_PREEQ_BIN_MIC1_13 +704 0x1E28 //TX_PREEQ_BIN_MIC1_14 +705 0x3042 //TX_PREEQ_BIN_MIC1_15 +706 0x0000 //TX_PREEQ_BIN_MIC1_16 +707 0x0000 //TX_PREEQ_BIN_MIC1_17 +708 0x0000 //TX_PREEQ_BIN_MIC1_18 +709 0x0000 //TX_PREEQ_BIN_MIC1_19 +710 0x0000 //TX_PREEQ_BIN_MIC1_20 +711 0x0000 //TX_PREEQ_BIN_MIC1_21 +712 0x0000 //TX_PREEQ_BIN_MIC1_22 +713 0x0000 //TX_PREEQ_BIN_MIC1_23 +714 0x0020 //TX_PREEQ_SUBNUM_MIC2 +715 0x4848 //TX_PREEQ_GAIN_MIC2_0 +716 0x4848 //TX_PREEQ_GAIN_MIC2_1 +717 0x4848 //TX_PREEQ_GAIN_MIC2_2 +718 0x4848 //TX_PREEQ_GAIN_MIC2_3 +719 0x4848 //TX_PREEQ_GAIN_MIC2_4 +720 0x4848 //TX_PREEQ_GAIN_MIC2_5 +721 0x4849 //TX_PREEQ_GAIN_MIC2_6 +722 0x4A4A //TX_PREEQ_GAIN_MIC2_7 +723 0x4B4B //TX_PREEQ_GAIN_MIC2_8 +724 0x4C4D //TX_PREEQ_GAIN_MIC2_9 +725 0x4D4E //TX_PREEQ_GAIN_MIC2_10 +726 0x4F4F //TX_PREEQ_GAIN_MIC2_11 +727 0x504F //TX_PREEQ_GAIN_MIC2_12 +728 0x4C49 //TX_PREEQ_GAIN_MIC2_13 +729 0x4A4C //TX_PREEQ_GAIN_MIC2_14 +730 0x4F5E //TX_PREEQ_GAIN_MIC2_15 +731 0x4848 //TX_PREEQ_GAIN_MIC2_16 +732 0x4848 //TX_PREEQ_GAIN_MIC2_17 +733 0x4848 //TX_PREEQ_GAIN_MIC2_18 +734 0x4848 //TX_PREEQ_GAIN_MIC2_19 +735 0x4848 //TX_PREEQ_GAIN_MIC2_20 +736 0x4848 //TX_PREEQ_GAIN_MIC2_21 +737 0x4848 //TX_PREEQ_GAIN_MIC2_22 +738 0x4848 //TX_PREEQ_GAIN_MIC2_23 +739 0x0202 //TX_PREEQ_BIN_MIC2_0 +740 0x0203 //TX_PREEQ_BIN_MIC2_1 +741 0x0303 //TX_PREEQ_BIN_MIC2_2 +742 0x0304 //TX_PREEQ_BIN_MIC2_3 +743 0x0405 //TX_PREEQ_BIN_MIC2_4 +744 0x0506 //TX_PREEQ_BIN_MIC2_5 +745 0x0708 //TX_PREEQ_BIN_MIC2_6 +746 0x090A //TX_PREEQ_BIN_MIC2_7 +747 0x0B0C //TX_PREEQ_BIN_MIC2_8 +748 0x0D0E //TX_PREEQ_BIN_MIC2_9 +749 0x1013 //TX_PREEQ_BIN_MIC2_10 +750 0x1719 //TX_PREEQ_BIN_MIC2_11 +751 0x1B1E //TX_PREEQ_BIN_MIC2_12 +752 0x1E1E //TX_PREEQ_BIN_MIC2_13 +753 0x1E28 //TX_PREEQ_BIN_MIC2_14 +754 0x363C //TX_PREEQ_BIN_MIC2_15 +755 0x0000 //TX_PREEQ_BIN_MIC2_16 +756 0x0000 //TX_PREEQ_BIN_MIC2_17 +757 0x0000 //TX_PREEQ_BIN_MIC2_18 +758 0x0000 //TX_PREEQ_BIN_MIC2_19 +759 0x0000 //TX_PREEQ_BIN_MIC2_20 +760 0x0000 //TX_PREEQ_BIN_MIC2_21 +761 0x0000 //TX_PREEQ_BIN_MIC2_22 +762 0x0000 //TX_PREEQ_BIN_MIC2_23 +763 0x0006 //TX_MASKING_ABILITY +764 0x0800 //TX_NND_WEIGHT +765 0x0050 //TX_MIC_CALIBRATION_0 +766 0x0065 //TX_MIC_CALIBRATION_1 +767 0x0050 //TX_MIC_CALIBRATION_2 +768 0x0050 //TX_MIC_CALIBRATION_3 +769 0x0046 //TX_MIC_PWR_BIAS_0 +770 0x0040 //TX_MIC_PWR_BIAS_1 +771 0x0046 //TX_MIC_PWR_BIAS_2 +772 0x0046 //TX_MIC_PWR_BIAS_3 +773 0x0000 //TX_GAIN_LIMIT_0 +774 0x000F //TX_GAIN_LIMIT_1 +775 0x0000 //TX_GAIN_LIMIT_2 +776 0x0000 //TX_GAIN_LIMIT_3 +777 0x7F5B //TX_BVE_NOVAD0_ALPHADOWN +778 0x7FDE //TX_BVE_VAD0_ALPHAUP +779 0x7F3A //TX_BVE_VAD0_ALPHADOWN +780 0x2000 //TX_BVE_GAINWEIGHT_NOFEVADLI +781 0x7F5B //TX_BVE_FEVADLI_ALPHA +782 0x7F19 //TX_BVE_NOVAD0_ALPHAUP +783 0x0800 //TX_TDDRC_ALPHA_UP_01 +784 0x0800 //TX_TDDRC_ALPHA_UP_02 +785 0x0800 //TX_TDDRC_ALPHA_UP_03 +786 0x0800 //TX_TDDRC_ALPHA_UP_04 +787 0x7EB8 //TX_TDDRC_ALPHA_DWN_01 +788 0x7EB8 //TX_TDDRC_ALPHA_DWN_02 +789 0x7EB8 //TX_TDDRC_ALPHA_DWN_03 +790 0x7EB8 //TX_TDDRC_ALPHA_DWN_04 +791 0x7FFF //TX_TDDRC_TD_DRC_LIMIT +792 0x0800 //TX_TDDRC_POST_LIMIT_GAIN +793 0x0000 //TX_TDDRC_RESRV_0 +794 0x0000 //TX_TDDRC_RESRV_1 +795 0x0018 //TX_FDDRC_BAND_MARGIN_0 +796 0x0030 //TX_FDDRC_BAND_MARGIN_1 +797 0x0050 //TX_FDDRC_BAND_MARGIN_2 +798 0x0080 //TX_FDDRC_BAND_MARGIN_3 +799 0x0007 //TX_FDDRC_BLOCK_EXP +800 0x5000 //TX_FDDRC_THRD_2_0 +801 0x5000 //TX_FDDRC_THRD_2_1 +802 0x5000 //TX_FDDRC_THRD_2_2 +803 0x5000 //TX_FDDRC_THRD_2_3 +804 0x6400 //TX_FDDRC_THRD_3_0 +805 0x6400 //TX_FDDRC_THRD_3_1 +806 0x6400 //TX_FDDRC_THRD_3_2 +807 0x6400 //TX_FDDRC_THRD_3_3 +808 0x2000 //TX_FDDRC_SLANT_0_0 +809 0x2000 //TX_FDDRC_SLANT_0_1 +810 0x2000 //TX_FDDRC_SLANT_0_2 +811 0x2000 //TX_FDDRC_SLANT_0_3 +812 0x5333 //TX_FDDRC_SLANT_1_0 +813 0x5333 //TX_FDDRC_SLANT_1_1 +814 0x5333 //TX_FDDRC_SLANT_1_2 +815 0x5333 //TX_FDDRC_SLANT_1_3 +816 0x0010 //TX_DEADMIC_SILENCE_TH +817 0x0600 //TX_MIC_DEGRADE_TH +818 0x0078 //TX_DEADMIC_CNT +819 0x0078 //TX_MIC_DEGRADE_CNT +820 0x0000 //TX_FDDRC_RESRV_4 +821 0x0000 //TX_FDDRC_RESRV_5 +822 0x0000 //TX_FDDRC_RESRV_6 +823 0x7FFF //TX_KS_NOISEPASTE_FACTOR +824 0x0001 //TX_KS_CONFIG +825 0x7FFF //TX_KS_GAIN_MIN +826 0x0000 //TX_KS_RESRV_0 +827 0x0000 //TX_KS_RESRV_1 +828 0x0000 //TX_KS_RESRV_2 +829 0x7C00 //TX_LAMBDA_PKA_FP +830 0x2000 //TX_TPKA_FP +831 0x0080 //TX_MIN_G_FP +832 0x2000 //TX_MAX_G_FP +833 0x4848 //TX_FFP_FP_K_METAL +834 0x4000 //TX_A_POST_FLT_FP +835 0x0F5C //TX_RTO_OUTBEAM_TH +836 0x4CCD //TX_TPKA_FP_THD +837 0x0000 //TX_MAX_G_FP_BLK +838 0x0000 //TX_FFP_FADEIN +839 0x0000 //TX_FFP_FADEOUT +840 0x0000 //TX_WHISPERCTH +841 0x0000 //TX_WHISPERHOLDT +842 0x0000 //TX_WHISP_ENTHH +843 0x0000 //TX_WHISP_ENTHL +844 0x0000 //TX_WHISP_RTOTH +845 0x0000 //TX_WHISP_RTOTH2 +846 0x0096 //TX_MUTE_PERIOD +847 0x0000 //TX_FADE_IN_PERIOD +848 0x0100 //TX_FFP_RESRV_2 +849 0x0020 //TX_FFP_RESRV_3 +850 0x0000 //TX_FFP_RESRV_4 +851 0x0000 //TX_FFP_RESRV_5 +852 0x0000 //TX_FFP_RESRV_6 +853 0x0002 //TX_FILTINDX +854 0x0001 //TX_TDDRC_THRD_0 +855 0x0002 //TX_TDDRC_THRD_1 +856 0x1000 //TX_TDDRC_THRD_2 +857 0x1000 //TX_TDDRC_THRD_3 +858 0x6000 //TX_TDDRC_SLANT_0 +859 0x6000 //TX_TDDRC_SLANT_1 +860 0x0800 //TX_TDDRC_ALPHA_UP_00 +861 0x7EB8 //TX_TDDRC_ALPHA_DWN_00 +862 0x0000 //TX_TDDRC_HMNC_FLAG +863 0x199A //TX_TDDRC_HMNC_GAIN +864 0x0000 //TX_TDDRC_SMT_FLAG +865 0x0CCD //TX_TDDRC_SMT_W +866 0x0E21 //TX_TDDRC_DRC_GAIN +867 0x7FFF //TX_TDDRC_LMT_THRD +868 0x0000 //TX_TDDRC_LMT_ALPHA +869 0x0000 //TX_TFMASKLTH +870 0x0000 //TX_TFMASKLTHL +871 0x0CCD //TX_TFMASKHTH +872 0x0CCD //TX_TFMASKLTH_BINVAD +873 0xF333 //TX_TFMASKLTH_NS_EST +874 0x2CCD //TX_TFMASKLTH_DOA +875 0xECCD //TX_TFMASKTH_BLESSCUT +876 0x1000 //TX_B_LESSCUT_RTO_MASK +877 0x3800 //TX_SB_RHO_MEAN_TH_ABN +878 0x2000 //TX_B_POST_FLT_MASK +879 0x0000 //TX_B_POST_FLT_MASK1 +880 0x5333 //TX_GAIN_WIND_MASK +881 0x7FFF //TX_TFMASK_BFSTRICT_MUSIC +882 0x0000 //TX_TFMASK_BFSTRICT_NOMUSIC +883 0x7333 //TX_FASTNS_OUTIN_TH +884 0x0CCD //TX_FASTNS_TFMASK_TH +885 0x0CCD //TX_FASTNS_TFMASKBIN_TH1 +886 0x0CCD //TX_FASTNS_TFMASKBIN_TH2 +887 0x0CCD //TX_FASTNS_TFMASKBIN_TH3 +888 0x00C8 //TX_FASTNS_ARSPC_TH +889 0xC000 //TX_FASTNS_MASK5_TH +890 0x4848 //TX_POSTSSA_MIN_G_VR_MASK +891 0x4000 //TX_A_LESSCUT_RTO_MASK +892 0x1770 //TX_FASTNS_NOISETH +893 0xC000 //TX_FASTNS_SSA_THLFL +894 0xC000 //TX_FASTNS_SSA_THHFL +895 0xCCCC //TX_FASTNS_SSA_THLFH +896 0xD999 //TX_FASTNS_SSA_THHFH +897 0x2339 //TX_SENDFUNC_REG_MICMUTE +898 0x0021 //TX_SENDFUNC_REG_MICMUTE1 +899 0x02BC //TX_MICMUTE_RATIO_THR +900 0x0140 //TX_MICMUTE_AMP_THR +901 0x0004 //TX_MICMUTE_HPF_IND +902 0x00C0 //TX_MICMUTE_LOG_EYR_TH +903 0x0008 //TX_MICMUTE_CVG_TIME +904 0x0008 //TX_MICMUTE_RELEASE_TIME +905 0x01FE //TX_MIC_VOLUME_MIC0MUTE +906 0x0020 //TX_MICMUTE_EPD_OFFSET_0 +907 0x001E //TX_MICMUTE_FRQ_AEC_L +908 0x7999 //TX_MICMUTE_EAD_THR +909 0x7FFF //TX_MICMUTE_LAMBDA_CB_NLE +910 0x7FFF //TX_MICMUTE_LAMBDA_RE_EST +911 0x4000 //TX_DTD_THR1_MICMUTE_0 +912 0x7000 //TX_DTD_THR1_MICMUTE_1 +913 0x7FFF //TX_DTD_THR1_MICMUTE_2 +914 0x7FFF //TX_DTD_THR1_MICMUTE_3 +915 0x6CCC //TX_DTD_THR2_MICMUTE_0 +916 0x0400 //TX_MICMUTE_MIN_EQ_RE_EST_0 +917 0x0400 //TX_MICMUTE_MIN_EQ_RE_EST_1 +918 0x1000 //TX_MICMUTE_MIN_EQ_RE_EST_2 +919 0x7FFF //TX_MICMUTE_MIN_EQ_RE_EST_3 +920 0x7FFF //TX_MICMUTE_MIN_EQ_RE_EST_4 +921 0x4000 //TX_MICMUTE_C_POST_FLT +922 0x03E8 //TX_MICMUTE_DT_CUT_K +923 0x0001 //TX_MICMUTE_DT_CUT_THR +924 0x03E8 //TX_MICMUTE_DT_CUT_K2 +925 0x0001 //TX_MICMUTE_DT_CUT_THR2 +926 0x0064 //TX_MICMUTE_DT2_HOLD_N +927 0x1000 //TX_MICMUTE_RATIODTH_THCUT +928 0x1000 //TX_MICMUTE_B_POST_FLT_ECHOL +929 0x7FFF //TX_MICMUTE_B_POST_FLT_ECHOH +930 0x0400 //TX_MICMUTE_C_POST_FLT_MASK +931 0x7999 //TX_MICMUTE_RATIODTL_CUT_TH +932 0x0258 //TX_MICMUTE_DT_CUT_K1 +933 0x0800 //TX_MICMUTE_N2_SN_EST +934 0xFC00 //TX_MICMUTE_THR_SN_EST_0 +935 0x001C //TX_MICMUTE_MIN_G_CTRL_0 +936 0x6000 //TX_MICMUTE_A_POST_FILT_S_0 +937 0x7000 //TX_MICMUTE_B_POST_FILT_0 +938 0x2710 //TX_MIC1RUB_AMP_THR +939 0x0010 //TX_MIC1MUTE_RATIO_THR +940 0x0450 //TX_MIC1MUTE_AMP_THR +941 0x0008 //TX_MIC1MUTE_CVG_TIME +942 0x0008 //TX_MIC1MUTE_RELEASE_TIME +943 0x0000 //TX_AMS_RESRV_01 +944 0x0000 //TX_AMS_RESRV_02 +945 0x0000 //TX_AMS_RESRV_03 +946 0x0000 //TX_AMS_RESRV_04 +947 0x0000 //TX_AMS_RESRV_05 +948 0x0000 //TX_AMS_RESRV_06 +949 0x0000 //TX_AMS_RESRV_07 +950 0x0000 //TX_AMS_RESRV_08 +951 0x0000 //TX_AMS_RESRV_09 +952 0x0000 //TX_AMS_RESRV_10 +953 0x0000 //TX_AMS_RESRV_11 +954 0x0000 //TX_AMS_RESRV_12 +955 0x0000 //TX_AMS_RESRV_13 +956 0x0000 //TX_AMS_RESRV_14 +957 0x0000 //TX_AMS_RESRV_15 +958 0x0000 //TX_AMS_RESRV_16 +959 0x0000 //TX_AMS_RESRV_17 +960 0x0000 //TX_AMS_RESRV_18 +961 0x0000 //TX_AMS_RESRV_19 +#RX +0 0x206C //RX_RECVFUNC_MODE_0 +1 0x0000 //RX_RECVFUNC_MODE_1 +2 0x0003 //RX_SAMPLINGFREQ_SIG +3 0x0003 //RX_SAMPLINGFREQ_PROC +4 0x000A //RX_FRAME_SZ +5 0x0000 //RX_DELAY_OPT +6 0x6000 //RX_TDDRC_ALPHA_UP_1 +7 0x6000 //RX_TDDRC_ALPHA_UP_2 +8 0x6000 //RX_TDDRC_ALPHA_UP_3 +9 0x1000 //RX_TDDRC_ALPHA_UP_4 +10 0x0800 //RX_PGA +11 0x7652 //RX_A_HP +12 0x4000 //RX_B_PE +13 0x7800 //RX_THR_PITCH_DET_0 +14 0x7000 //RX_THR_PITCH_DET_1 +15 0x6000 //RX_THR_PITCH_DET_2 +16 0x0008 //RX_PITCH_BFR_LEN +17 0x0003 //RX_SBD_PITCH_DET +18 0x0100 //RX_PP_RESRV_0 +19 0x0020 //RX_PP_RESRV_1 +20 0x0400 //RX_N_SN_EST +21 0x000C //RX_N2_SN_EST +22 0x0010 //RX_NS_LVL_CTRL +23 0xF800 //RX_THR_SN_EST +24 0x7E00 //RX_LAMBDA_PFILT +25 0x000A //RX_FENS_RESRV_0 +26 0x0190 //RX_FENS_RESRV_1 +27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +30 0x0002 //RX_EXTRA_NS_L +31 0x0800 //RX_EXTRA_NS_A +32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +33 0x7214 //RX_TDDRC_LIMITER_THRD +34 0x0800 //RX_TDDRC_LIMITER_GAIN +35 0x199A //RX_A_POST_FLT +36 0x0000 //RX_LMT_THRD +37 0x4000 //RX_LMT_ALPHA +38 0x0020 //RX_FDEQ_SUBNUM +39 0x4848 //RX_FDEQ_GAIN_0 +40 0x4848 //RX_FDEQ_GAIN_1 +41 0x4340 //RX_FDEQ_GAIN_2 +42 0x3F3D //RX_FDEQ_GAIN_3 +43 0x3935 //RX_FDEQ_GAIN_4 +44 0x3635 //RX_FDEQ_GAIN_5 +45 0x3E46 //RX_FDEQ_GAIN_6 +46 0x494C //RX_FDEQ_GAIN_7 +47 0x4E56 //RX_FDEQ_GAIN_8 +48 0x5F5B //RX_FDEQ_GAIN_9 +49 0x5B48 //RX_FDEQ_GAIN_10 +50 0x4856 //RX_FDEQ_GAIN_11 +51 0x5B60 //RX_FDEQ_GAIN_12 +52 0x7476 //RX_FDEQ_GAIN_13 +53 0x7F7C //RX_FDEQ_GAIN_14 +54 0x7068 //RX_FDEQ_GAIN_15 +55 0x4848 //RX_FDEQ_GAIN_16 +56 0x4848 //RX_FDEQ_GAIN_17 +57 0x4848 //RX_FDEQ_GAIN_18 +58 0x4848 //RX_FDEQ_GAIN_19 +59 0x4848 //RX_FDEQ_GAIN_20 +60 0x4848 //RX_FDEQ_GAIN_21 +61 0x4848 //RX_FDEQ_GAIN_22 +62 0x4848 //RX_FDEQ_GAIN_23 +63 0x0202 //RX_FDEQ_BIN_0 +64 0x0203 //RX_FDEQ_BIN_1 +65 0x0303 //RX_FDEQ_BIN_2 +66 0x0304 //RX_FDEQ_BIN_3 +67 0x0404 //RX_FDEQ_BIN_4 +68 0x0209 //RX_FDEQ_BIN_5 +69 0x0808 //RX_FDEQ_BIN_6 +70 0x090A //RX_FDEQ_BIN_7 +71 0x0B0C //RX_FDEQ_BIN_8 +72 0x0D0E //RX_FDEQ_BIN_9 +73 0x1013 //RX_FDEQ_BIN_10 +74 0x1719 //RX_FDEQ_BIN_11 +75 0x1B1E //RX_FDEQ_BIN_12 +76 0x1E1E //RX_FDEQ_BIN_13 +77 0x1E28 //RX_FDEQ_BIN_14 +78 0x282C //RX_FDEQ_BIN_15 +79 0x0000 //RX_FDEQ_BIN_16 +80 0x0000 //RX_FDEQ_BIN_17 +81 0x0000 //RX_FDEQ_BIN_18 +82 0x0000 //RX_FDEQ_BIN_19 +83 0x0000 //RX_FDEQ_BIN_20 +84 0x0000 //RX_FDEQ_BIN_21 +85 0x0000 //RX_FDEQ_BIN_22 +86 0x0000 //RX_FDEQ_BIN_23 +87 0x4000 //RX_FDEQ_RESRV_0 +88 0x0320 //RX_FDEQ_RESRV_1 +89 0x0018 //RX_FDDRC_BAND_MARGIN_0 +90 0x0035 //RX_FDDRC_BAND_MARGIN_1 +91 0x00D5 //RX_FDDRC_BAND_MARGIN_2 +92 0x0120 //RX_FDDRC_BAND_MARGIN_3 +93 0x0004 //RX_FDDRC_BLOCK_EXP +94 0x5000 //RX_FDDRC_THRD_2_0 +95 0x5000 //RX_FDDRC_THRD_2_1 +96 0x2000 //RX_FDDRC_THRD_2_2 +97 0x5000 //RX_FDDRC_THRD_2_3 +98 0x6400 //RX_FDDRC_THRD_3_0 +99 0x6400 //RX_FDDRC_THRD_3_1 +100 0x2000 //RX_FDDRC_THRD_3_2 +101 0x5000 //RX_FDDRC_THRD_3_3 +102 0x4000 //RX_FDDRC_SLANT_0_0 +103 0x4000 //RX_FDDRC_SLANT_0_1 +104 0x4000 //RX_FDDRC_SLANT_0_2 +105 0x4000 //RX_FDDRC_SLANT_0_3 +106 0x7FFF //RX_FDDRC_SLANT_1_0 +107 0x7FFF //RX_FDDRC_SLANT_1_1 +108 0x7FFF //RX_FDDRC_SLANT_1_2 +109 0x7FFF //RX_FDDRC_SLANT_1_3 +110 0x0000 //RX_FDDRC_RESRV_0 +111 0x0002 //RX_FILTINDX +112 0x0002 //RX_TDDRC_THRD_0 +113 0x0004 //RX_TDDRC_THRD_1 +114 0x1500 //RX_TDDRC_THRD_2 +115 0x1500 //RX_TDDRC_THRD_3 +116 0x3000 //RX_TDDRC_SLANT_0 +117 0x6E00 //RX_TDDRC_SLANT_1 +118 0x6000 //RX_TDDRC_ALPHA_UP_0 +119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +120 0x0000 //RX_TDDRC_HMNC_FLAG +121 0x199A //RX_TDDRC_HMNC_GAIN +122 0x0001 //RX_TDDRC_SMT_FLAG +123 0x0CCD //RX_TDDRC_SMT_W +124 0x02FD //RX_TDDRC_DRC_GAIN +125 0x7C00 //RX_LAMBDA_PKA_FP +126 0x2000 //RX_TPKA_FP +127 0x2000 //RX_MIN_G_FP +128 0x0080 //RX_MAX_G_FP +129 0x0100 //RX_SPK_VOL +130 0x0000 //RX_VOL_RESRV_0 +131 0x0000 //RX_MAXLEVEL_CNG +132 0x3000 //RX_BWE_UV_TH +133 0x3000 //RX_BWE_UV_TH2 +134 0x1800 //RX_BWE_UV_TH3 +135 0x1000 //RX_BWE_V_TH +136 0x04CD //RX_BWE_GAIN1_V_TH1 +137 0x0F33 //RX_BWE_GAIN1_V_TH2 +138 0x7333 //RX_BWE_UV_EQ +139 0x199A //RX_BWE_V_EQ +140 0x7333 //RX_BWE_TONE_TH +141 0x0004 //RX_BWE_UV_HOLD_T +142 0x6CCD //RX_BWE_GAIN2_ALPHA +143 0x799A //RX_BWE_GAIN3_ALPHA +144 0x001E //RX_BWE_CUTOFF +145 0x3000 //RX_BWE_GAINFILL +146 0x3200 //RX_BWE_MAXTH_TONE +147 0x2000 //RX_BWE_EQ_0 +148 0x2000 //RX_BWE_EQ_1 +149 0x2000 //RX_BWE_EQ_2 +150 0x2000 //RX_BWE_EQ_3 +151 0x2000 //RX_BWE_EQ_4 +152 0x2000 //RX_BWE_EQ_5 +153 0x2000 //RX_BWE_EQ_6 +154 0x0000 //RX_BWE_RESRV_0 +155 0x0000 //RX_BWE_RESRV_1 +156 0x0000 //RX_BWE_RESRV_2 +#VOL 0 +6 0x6000 //RX_TDDRC_ALPHA_UP_1 +7 0x6000 //RX_TDDRC_ALPHA_UP_2 +8 0x6000 //RX_TDDRC_ALPHA_UP_3 +9 0x1000 //RX_TDDRC_ALPHA_UP_4 +27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +33 0x7214 //RX_TDDRC_LIMITER_THRD +34 0x0800 //RX_TDDRC_LIMITER_GAIN +112 0x0002 //RX_TDDRC_THRD_0 +113 0x0004 //RX_TDDRC_THRD_1 +114 0x1500 //RX_TDDRC_THRD_2 +115 0x1500 //RX_TDDRC_THRD_3 +116 0x3000 //RX_TDDRC_SLANT_0 +117 0x6E00 //RX_TDDRC_SLANT_1 +118 0x6000 //RX_TDDRC_ALPHA_UP_0 +119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +120 0x0000 //RX_TDDRC_HMNC_FLAG +121 0x199A //RX_TDDRC_HMNC_GAIN +122 0x0001 //RX_TDDRC_SMT_FLAG +123 0x0CCD //RX_TDDRC_SMT_W +124 0x02FD //RX_TDDRC_DRC_GAIN +38 0x0020 //RX_FDEQ_SUBNUM +39 0x4848 //RX_FDEQ_GAIN_0 +40 0x4848 //RX_FDEQ_GAIN_1 +41 0x4340 //RX_FDEQ_GAIN_2 +42 0x3F3D //RX_FDEQ_GAIN_3 +43 0x3935 //RX_FDEQ_GAIN_4 +44 0x3635 //RX_FDEQ_GAIN_5 +45 0x3E46 //RX_FDEQ_GAIN_6 +46 0x494C //RX_FDEQ_GAIN_7 +47 0x4E56 //RX_FDEQ_GAIN_8 +48 0x5F5B //RX_FDEQ_GAIN_9 +49 0x5B48 //RX_FDEQ_GAIN_10 +50 0x4856 //RX_FDEQ_GAIN_11 +51 0x5B60 //RX_FDEQ_GAIN_12 +52 0x7476 //RX_FDEQ_GAIN_13 +53 0x7F7C //RX_FDEQ_GAIN_14 +54 0x7068 //RX_FDEQ_GAIN_15 +55 0x4848 //RX_FDEQ_GAIN_16 +56 0x4848 //RX_FDEQ_GAIN_17 +57 0x4848 //RX_FDEQ_GAIN_18 +58 0x4848 //RX_FDEQ_GAIN_19 +59 0x4848 //RX_FDEQ_GAIN_20 +60 0x4848 //RX_FDEQ_GAIN_21 +61 0x4848 //RX_FDEQ_GAIN_22 +62 0x4848 //RX_FDEQ_GAIN_23 +63 0x0202 //RX_FDEQ_BIN_0 +64 0x0203 //RX_FDEQ_BIN_1 +65 0x0303 //RX_FDEQ_BIN_2 +66 0x0304 //RX_FDEQ_BIN_3 +67 0x0404 //RX_FDEQ_BIN_4 +68 0x0209 //RX_FDEQ_BIN_5 +69 0x0808 //RX_FDEQ_BIN_6 +70 0x090A //RX_FDEQ_BIN_7 +71 0x0B0C //RX_FDEQ_BIN_8 +72 0x0D0E //RX_FDEQ_BIN_9 +73 0x1013 //RX_FDEQ_BIN_10 +74 0x1719 //RX_FDEQ_BIN_11 +75 0x1B1E //RX_FDEQ_BIN_12 +76 0x1E1E //RX_FDEQ_BIN_13 +77 0x1E28 //RX_FDEQ_BIN_14 +78 0x282C //RX_FDEQ_BIN_15 +79 0x0000 //RX_FDEQ_BIN_16 +80 0x0000 //RX_FDEQ_BIN_17 +81 0x0000 //RX_FDEQ_BIN_18 +82 0x0000 //RX_FDEQ_BIN_19 +83 0x0000 //RX_FDEQ_BIN_20 +84 0x0000 //RX_FDEQ_BIN_21 +85 0x0000 //RX_FDEQ_BIN_22 +86 0x0000 //RX_FDEQ_BIN_23 +87 0x4000 //RX_FDEQ_RESRV_0 +88 0x0320 //RX_FDEQ_RESRV_1 +89 0x0018 //RX_FDDRC_BAND_MARGIN_0 +90 0x0035 //RX_FDDRC_BAND_MARGIN_1 +91 0x00D5 //RX_FDDRC_BAND_MARGIN_2 +92 0x0120 //RX_FDDRC_BAND_MARGIN_3 +93 0x0004 //RX_FDDRC_BLOCK_EXP +94 0x5000 //RX_FDDRC_THRD_2_0 +95 0x5000 //RX_FDDRC_THRD_2_1 +96 0x2000 //RX_FDDRC_THRD_2_2 +97 0x5000 //RX_FDDRC_THRD_2_3 +98 0x6400 //RX_FDDRC_THRD_3_0 +99 0x6400 //RX_FDDRC_THRD_3_1 +100 0x2000 //RX_FDDRC_THRD_3_2 +101 0x5000 //RX_FDDRC_THRD_3_3 +102 0x4000 //RX_FDDRC_SLANT_0_0 +103 0x4000 //RX_FDDRC_SLANT_0_1 +104 0x4000 //RX_FDDRC_SLANT_0_2 +105 0x4000 //RX_FDDRC_SLANT_0_3 +106 0x7FFF //RX_FDDRC_SLANT_1_0 +107 0x7FFF //RX_FDDRC_SLANT_1_1 +108 0x7FFF //RX_FDDRC_SLANT_1_2 +109 0x7FFF //RX_FDDRC_SLANT_1_3 +110 0x0000 //RX_FDDRC_RESRV_0 +129 0x0019 //RX_SPK_VOL +130 0x0000 //RX_VOL_RESRV_0 +#VOL 1 +6 0x6000 //RX_TDDRC_ALPHA_UP_1 +7 0x6000 //RX_TDDRC_ALPHA_UP_2 +8 0x6000 //RX_TDDRC_ALPHA_UP_3 +9 0x1000 //RX_TDDRC_ALPHA_UP_4 +27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +33 0x7214 //RX_TDDRC_LIMITER_THRD +34 0x0800 //RX_TDDRC_LIMITER_GAIN +112 0x0002 //RX_TDDRC_THRD_0 +113 0x0004 //RX_TDDRC_THRD_1 +114 0x1500 //RX_TDDRC_THRD_2 +115 0x1500 //RX_TDDRC_THRD_3 +116 0x3000 //RX_TDDRC_SLANT_0 +117 0x6E00 //RX_TDDRC_SLANT_1 +118 0x6000 //RX_TDDRC_ALPHA_UP_0 +119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +120 0x0000 //RX_TDDRC_HMNC_FLAG +121 0x199A //RX_TDDRC_HMNC_GAIN +122 0x0001 //RX_TDDRC_SMT_FLAG +123 0x0CCD //RX_TDDRC_SMT_W +124 0x02FD //RX_TDDRC_DRC_GAIN +38 0x0020 //RX_FDEQ_SUBNUM +39 0x4848 //RX_FDEQ_GAIN_0 +40 0x4848 //RX_FDEQ_GAIN_1 +41 0x4340 //RX_FDEQ_GAIN_2 +42 0x3F3D //RX_FDEQ_GAIN_3 +43 0x3935 //RX_FDEQ_GAIN_4 +44 0x3635 //RX_FDEQ_GAIN_5 +45 0x3E46 //RX_FDEQ_GAIN_6 +46 0x494C //RX_FDEQ_GAIN_7 +47 0x4E56 //RX_FDEQ_GAIN_8 +48 0x5F5B //RX_FDEQ_GAIN_9 +49 0x5B48 //RX_FDEQ_GAIN_10 +50 0x4856 //RX_FDEQ_GAIN_11 +51 0x5B60 //RX_FDEQ_GAIN_12 +52 0x7476 //RX_FDEQ_GAIN_13 +53 0x7F7C //RX_FDEQ_GAIN_14 +54 0x7068 //RX_FDEQ_GAIN_15 +55 0x4848 //RX_FDEQ_GAIN_16 +56 0x4848 //RX_FDEQ_GAIN_17 +57 0x4848 //RX_FDEQ_GAIN_18 +58 0x4848 //RX_FDEQ_GAIN_19 +59 0x4848 //RX_FDEQ_GAIN_20 +60 0x4848 //RX_FDEQ_GAIN_21 +61 0x4848 //RX_FDEQ_GAIN_22 +62 0x4848 //RX_FDEQ_GAIN_23 +63 0x0202 //RX_FDEQ_BIN_0 +64 0x0203 //RX_FDEQ_BIN_1 +65 0x0303 //RX_FDEQ_BIN_2 +66 0x0304 //RX_FDEQ_BIN_3 +67 0x0404 //RX_FDEQ_BIN_4 +68 0x0209 //RX_FDEQ_BIN_5 +69 0x0808 //RX_FDEQ_BIN_6 +70 0x090A //RX_FDEQ_BIN_7 +71 0x0B0C //RX_FDEQ_BIN_8 +72 0x0D0E //RX_FDEQ_BIN_9 +73 0x1013 //RX_FDEQ_BIN_10 +74 0x1719 //RX_FDEQ_BIN_11 +75 0x1B1E //RX_FDEQ_BIN_12 +76 0x1E1E //RX_FDEQ_BIN_13 +77 0x1E28 //RX_FDEQ_BIN_14 +78 0x282C //RX_FDEQ_BIN_15 +79 0x0000 //RX_FDEQ_BIN_16 +80 0x0000 //RX_FDEQ_BIN_17 +81 0x0000 //RX_FDEQ_BIN_18 +82 0x0000 //RX_FDEQ_BIN_19 +83 0x0000 //RX_FDEQ_BIN_20 +84 0x0000 //RX_FDEQ_BIN_21 +85 0x0000 //RX_FDEQ_BIN_22 +86 0x0000 //RX_FDEQ_BIN_23 +87 0x4000 //RX_FDEQ_RESRV_0 +88 0x0320 //RX_FDEQ_RESRV_1 +89 0x0018 //RX_FDDRC_BAND_MARGIN_0 +90 0x0035 //RX_FDDRC_BAND_MARGIN_1 +91 0x00D5 //RX_FDDRC_BAND_MARGIN_2 +92 0x0120 //RX_FDDRC_BAND_MARGIN_3 +93 0x0004 //RX_FDDRC_BLOCK_EXP +94 0x5000 //RX_FDDRC_THRD_2_0 +95 0x5000 //RX_FDDRC_THRD_2_1 +96 0x2000 //RX_FDDRC_THRD_2_2 +97 0x5000 //RX_FDDRC_THRD_2_3 +98 0x6400 //RX_FDDRC_THRD_3_0 +99 0x6400 //RX_FDDRC_THRD_3_1 +100 0x2000 //RX_FDDRC_THRD_3_2 +101 0x5000 //RX_FDDRC_THRD_3_3 +102 0x4000 //RX_FDDRC_SLANT_0_0 +103 0x4000 //RX_FDDRC_SLANT_0_1 +104 0x4000 //RX_FDDRC_SLANT_0_2 +105 0x4000 //RX_FDDRC_SLANT_0_3 +106 0x7FFF //RX_FDDRC_SLANT_1_0 +107 0x7FFF //RX_FDDRC_SLANT_1_1 +108 0x7FFF //RX_FDDRC_SLANT_1_2 +109 0x7FFF //RX_FDDRC_SLANT_1_3 +110 0x0000 //RX_FDDRC_RESRV_0 +129 0x0023 //RX_SPK_VOL +130 0x0000 //RX_VOL_RESRV_0 +#VOL 2 +6 0x6000 //RX_TDDRC_ALPHA_UP_1 +7 0x6000 //RX_TDDRC_ALPHA_UP_2 +8 0x6000 //RX_TDDRC_ALPHA_UP_3 +9 0x1000 //RX_TDDRC_ALPHA_UP_4 +27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +33 0x7214 //RX_TDDRC_LIMITER_THRD +34 0x0800 //RX_TDDRC_LIMITER_GAIN +112 0x0002 //RX_TDDRC_THRD_0 +113 0x0004 //RX_TDDRC_THRD_1 +114 0x1500 //RX_TDDRC_THRD_2 +115 0x1500 //RX_TDDRC_THRD_3 +116 0x3000 //RX_TDDRC_SLANT_0 +117 0x6E00 //RX_TDDRC_SLANT_1 +118 0x6000 //RX_TDDRC_ALPHA_UP_0 +119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +120 0x0000 //RX_TDDRC_HMNC_FLAG +121 0x199A //RX_TDDRC_HMNC_GAIN +122 0x0001 //RX_TDDRC_SMT_FLAG +123 0x0CCD //RX_TDDRC_SMT_W +124 0x02FD //RX_TDDRC_DRC_GAIN +38 0x0020 //RX_FDEQ_SUBNUM +39 0x4848 //RX_FDEQ_GAIN_0 +40 0x4848 //RX_FDEQ_GAIN_1 +41 0x4340 //RX_FDEQ_GAIN_2 +42 0x3F3D //RX_FDEQ_GAIN_3 +43 0x3935 //RX_FDEQ_GAIN_4 +44 0x3635 //RX_FDEQ_GAIN_5 +45 0x3E46 //RX_FDEQ_GAIN_6 +46 0x494C //RX_FDEQ_GAIN_7 +47 0x4E56 //RX_FDEQ_GAIN_8 +48 0x5F5B //RX_FDEQ_GAIN_9 +49 0x5B48 //RX_FDEQ_GAIN_10 +50 0x4856 //RX_FDEQ_GAIN_11 +51 0x5B60 //RX_FDEQ_GAIN_12 +52 0x7476 //RX_FDEQ_GAIN_13 +53 0x7F7C //RX_FDEQ_GAIN_14 +54 0x7068 //RX_FDEQ_GAIN_15 +55 0x4848 //RX_FDEQ_GAIN_16 +56 0x4848 //RX_FDEQ_GAIN_17 +57 0x4848 //RX_FDEQ_GAIN_18 +58 0x4848 //RX_FDEQ_GAIN_19 +59 0x4848 //RX_FDEQ_GAIN_20 +60 0x4848 //RX_FDEQ_GAIN_21 +61 0x4848 //RX_FDEQ_GAIN_22 +62 0x4848 //RX_FDEQ_GAIN_23 +63 0x0202 //RX_FDEQ_BIN_0 +64 0x0203 //RX_FDEQ_BIN_1 +65 0x0303 //RX_FDEQ_BIN_2 +66 0x0304 //RX_FDEQ_BIN_3 +67 0x0404 //RX_FDEQ_BIN_4 +68 0x0209 //RX_FDEQ_BIN_5 +69 0x0808 //RX_FDEQ_BIN_6 +70 0x090A //RX_FDEQ_BIN_7 +71 0x0B0C //RX_FDEQ_BIN_8 +72 0x0D0E //RX_FDEQ_BIN_9 +73 0x1013 //RX_FDEQ_BIN_10 +74 0x1719 //RX_FDEQ_BIN_11 +75 0x1B1E //RX_FDEQ_BIN_12 +76 0x1E1E //RX_FDEQ_BIN_13 +77 0x1E28 //RX_FDEQ_BIN_14 +78 0x282C //RX_FDEQ_BIN_15 +79 0x0000 //RX_FDEQ_BIN_16 +80 0x0000 //RX_FDEQ_BIN_17 +81 0x0000 //RX_FDEQ_BIN_18 +82 0x0000 //RX_FDEQ_BIN_19 +83 0x0000 //RX_FDEQ_BIN_20 +84 0x0000 //RX_FDEQ_BIN_21 +85 0x0000 //RX_FDEQ_BIN_22 +86 0x0000 //RX_FDEQ_BIN_23 +87 0x4000 //RX_FDEQ_RESRV_0 +88 0x0320 //RX_FDEQ_RESRV_1 +89 0x0018 //RX_FDDRC_BAND_MARGIN_0 +90 0x0035 //RX_FDDRC_BAND_MARGIN_1 +91 0x00D5 //RX_FDDRC_BAND_MARGIN_2 +92 0x0120 //RX_FDDRC_BAND_MARGIN_3 +93 0x0004 //RX_FDDRC_BLOCK_EXP +94 0x5000 //RX_FDDRC_THRD_2_0 +95 0x5000 //RX_FDDRC_THRD_2_1 +96 0x2000 //RX_FDDRC_THRD_2_2 +97 0x5000 //RX_FDDRC_THRD_2_3 +98 0x6400 //RX_FDDRC_THRD_3_0 +99 0x6400 //RX_FDDRC_THRD_3_1 +100 0x2000 //RX_FDDRC_THRD_3_2 +101 0x5000 //RX_FDDRC_THRD_3_3 +102 0x4000 //RX_FDDRC_SLANT_0_0 +103 0x4000 //RX_FDDRC_SLANT_0_1 +104 0x4000 //RX_FDDRC_SLANT_0_2 +105 0x4000 //RX_FDDRC_SLANT_0_3 +106 0x7FFF //RX_FDDRC_SLANT_1_0 +107 0x7FFF //RX_FDDRC_SLANT_1_1 +108 0x7FFF //RX_FDDRC_SLANT_1_2 +109 0x7FFF //RX_FDDRC_SLANT_1_3 +110 0x0000 //RX_FDDRC_RESRV_0 +129 0x0032 //RX_SPK_VOL +130 0x0000 //RX_VOL_RESRV_0 +#VOL 3 +6 0x6000 //RX_TDDRC_ALPHA_UP_1 +7 0x6000 //RX_TDDRC_ALPHA_UP_2 +8 0x6000 //RX_TDDRC_ALPHA_UP_3 +9 0x1000 //RX_TDDRC_ALPHA_UP_4 +27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +33 0x7214 //RX_TDDRC_LIMITER_THRD +34 0x0800 //RX_TDDRC_LIMITER_GAIN +112 0x0002 //RX_TDDRC_THRD_0 +113 0x0004 //RX_TDDRC_THRD_1 +114 0x1500 //RX_TDDRC_THRD_2 +115 0x1500 //RX_TDDRC_THRD_3 +116 0x3000 //RX_TDDRC_SLANT_0 +117 0x6E00 //RX_TDDRC_SLANT_1 +118 0x6000 //RX_TDDRC_ALPHA_UP_0 +119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +120 0x0000 //RX_TDDRC_HMNC_FLAG +121 0x199A //RX_TDDRC_HMNC_GAIN +122 0x0001 //RX_TDDRC_SMT_FLAG +123 0x0CCD //RX_TDDRC_SMT_W +124 0x02FD //RX_TDDRC_DRC_GAIN +38 0x0020 //RX_FDEQ_SUBNUM +39 0x4848 //RX_FDEQ_GAIN_0 +40 0x4848 //RX_FDEQ_GAIN_1 +41 0x4340 //RX_FDEQ_GAIN_2 +42 0x3F3D //RX_FDEQ_GAIN_3 +43 0x3935 //RX_FDEQ_GAIN_4 +44 0x3635 //RX_FDEQ_GAIN_5 +45 0x3E46 //RX_FDEQ_GAIN_6 +46 0x494C //RX_FDEQ_GAIN_7 +47 0x4E56 //RX_FDEQ_GAIN_8 +48 0x5F5B //RX_FDEQ_GAIN_9 +49 0x5B48 //RX_FDEQ_GAIN_10 +50 0x4856 //RX_FDEQ_GAIN_11 +51 0x5B60 //RX_FDEQ_GAIN_12 +52 0x7476 //RX_FDEQ_GAIN_13 +53 0x7F7C //RX_FDEQ_GAIN_14 +54 0x7068 //RX_FDEQ_GAIN_15 +55 0x4848 //RX_FDEQ_GAIN_16 +56 0x4848 //RX_FDEQ_GAIN_17 +57 0x4848 //RX_FDEQ_GAIN_18 +58 0x4848 //RX_FDEQ_GAIN_19 +59 0x4848 //RX_FDEQ_GAIN_20 +60 0x4848 //RX_FDEQ_GAIN_21 +61 0x4848 //RX_FDEQ_GAIN_22 +62 0x4848 //RX_FDEQ_GAIN_23 +63 0x0202 //RX_FDEQ_BIN_0 +64 0x0203 //RX_FDEQ_BIN_1 +65 0x0303 //RX_FDEQ_BIN_2 +66 0x0304 //RX_FDEQ_BIN_3 +67 0x0404 //RX_FDEQ_BIN_4 +68 0x0209 //RX_FDEQ_BIN_5 +69 0x0808 //RX_FDEQ_BIN_6 +70 0x090A //RX_FDEQ_BIN_7 +71 0x0B0C //RX_FDEQ_BIN_8 +72 0x0D0E //RX_FDEQ_BIN_9 +73 0x1013 //RX_FDEQ_BIN_10 +74 0x1719 //RX_FDEQ_BIN_11 +75 0x1B1E //RX_FDEQ_BIN_12 +76 0x1E1E //RX_FDEQ_BIN_13 +77 0x1E28 //RX_FDEQ_BIN_14 +78 0x282C //RX_FDEQ_BIN_15 +79 0x0000 //RX_FDEQ_BIN_16 +80 0x0000 //RX_FDEQ_BIN_17 +81 0x0000 //RX_FDEQ_BIN_18 +82 0x0000 //RX_FDEQ_BIN_19 +83 0x0000 //RX_FDEQ_BIN_20 +84 0x0000 //RX_FDEQ_BIN_21 +85 0x0000 //RX_FDEQ_BIN_22 +86 0x0000 //RX_FDEQ_BIN_23 +87 0x4000 //RX_FDEQ_RESRV_0 +88 0x0320 //RX_FDEQ_RESRV_1 +89 0x0018 //RX_FDDRC_BAND_MARGIN_0 +90 0x0035 //RX_FDDRC_BAND_MARGIN_1 +91 0x00D5 //RX_FDDRC_BAND_MARGIN_2 +92 0x0120 //RX_FDDRC_BAND_MARGIN_3 +93 0x0004 //RX_FDDRC_BLOCK_EXP +94 0x5000 //RX_FDDRC_THRD_2_0 +95 0x5000 //RX_FDDRC_THRD_2_1 +96 0x2000 //RX_FDDRC_THRD_2_2 +97 0x5000 //RX_FDDRC_THRD_2_3 +98 0x6400 //RX_FDDRC_THRD_3_0 +99 0x6400 //RX_FDDRC_THRD_3_1 +100 0x2000 //RX_FDDRC_THRD_3_2 +101 0x5000 //RX_FDDRC_THRD_3_3 +102 0x4000 //RX_FDDRC_SLANT_0_0 +103 0x4000 //RX_FDDRC_SLANT_0_1 +104 0x4000 //RX_FDDRC_SLANT_0_2 +105 0x4000 //RX_FDDRC_SLANT_0_3 +106 0x7FFF //RX_FDDRC_SLANT_1_0 +107 0x7FFF //RX_FDDRC_SLANT_1_1 +108 0x7FFF //RX_FDDRC_SLANT_1_2 +109 0x7FFF //RX_FDDRC_SLANT_1_3 +110 0x0000 //RX_FDDRC_RESRV_0 +129 0x0048 //RX_SPK_VOL +130 0x0000 //RX_VOL_RESRV_0 +#VOL 4 +6 0x6000 //RX_TDDRC_ALPHA_UP_1 +7 0x6000 //RX_TDDRC_ALPHA_UP_2 +8 0x6000 //RX_TDDRC_ALPHA_UP_3 +9 0x1000 //RX_TDDRC_ALPHA_UP_4 +27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +33 0x7214 //RX_TDDRC_LIMITER_THRD +34 0x0800 //RX_TDDRC_LIMITER_GAIN +112 0x0002 //RX_TDDRC_THRD_0 +113 0x0004 //RX_TDDRC_THRD_1 +114 0x1500 //RX_TDDRC_THRD_2 +115 0x1500 //RX_TDDRC_THRD_3 +116 0x3000 //RX_TDDRC_SLANT_0 +117 0x6E00 //RX_TDDRC_SLANT_1 +118 0x6000 //RX_TDDRC_ALPHA_UP_0 +119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +120 0x0000 //RX_TDDRC_HMNC_FLAG +121 0x199A //RX_TDDRC_HMNC_GAIN +122 0x0001 //RX_TDDRC_SMT_FLAG +123 0x0CCD //RX_TDDRC_SMT_W +124 0x02FD //RX_TDDRC_DRC_GAIN +38 0x0020 //RX_FDEQ_SUBNUM +39 0x4848 //RX_FDEQ_GAIN_0 +40 0x4848 //RX_FDEQ_GAIN_1 +41 0x4340 //RX_FDEQ_GAIN_2 +42 0x3F3D //RX_FDEQ_GAIN_3 +43 0x3935 //RX_FDEQ_GAIN_4 +44 0x3635 //RX_FDEQ_GAIN_5 +45 0x3E46 //RX_FDEQ_GAIN_6 +46 0x494C //RX_FDEQ_GAIN_7 +47 0x4E56 //RX_FDEQ_GAIN_8 +48 0x5F5B //RX_FDEQ_GAIN_9 +49 0x5B48 //RX_FDEQ_GAIN_10 +50 0x4856 //RX_FDEQ_GAIN_11 +51 0x5B60 //RX_FDEQ_GAIN_12 +52 0x7476 //RX_FDEQ_GAIN_13 +53 0x7F7C //RX_FDEQ_GAIN_14 +54 0x7068 //RX_FDEQ_GAIN_15 +55 0x4848 //RX_FDEQ_GAIN_16 +56 0x4848 //RX_FDEQ_GAIN_17 +57 0x4848 //RX_FDEQ_GAIN_18 +58 0x4848 //RX_FDEQ_GAIN_19 +59 0x4848 //RX_FDEQ_GAIN_20 +60 0x4848 //RX_FDEQ_GAIN_21 +61 0x4848 //RX_FDEQ_GAIN_22 +62 0x4848 //RX_FDEQ_GAIN_23 +63 0x0202 //RX_FDEQ_BIN_0 +64 0x0203 //RX_FDEQ_BIN_1 +65 0x0303 //RX_FDEQ_BIN_2 +66 0x0304 //RX_FDEQ_BIN_3 +67 0x0404 //RX_FDEQ_BIN_4 +68 0x0209 //RX_FDEQ_BIN_5 +69 0x0808 //RX_FDEQ_BIN_6 +70 0x090A //RX_FDEQ_BIN_7 +71 0x0B0C //RX_FDEQ_BIN_8 +72 0x0D0E //RX_FDEQ_BIN_9 +73 0x1013 //RX_FDEQ_BIN_10 +74 0x1719 //RX_FDEQ_BIN_11 +75 0x1B1E //RX_FDEQ_BIN_12 +76 0x1E1E //RX_FDEQ_BIN_13 +77 0x1E28 //RX_FDEQ_BIN_14 +78 0x282C //RX_FDEQ_BIN_15 +79 0x0000 //RX_FDEQ_BIN_16 +80 0x0000 //RX_FDEQ_BIN_17 +81 0x0000 //RX_FDEQ_BIN_18 +82 0x0000 //RX_FDEQ_BIN_19 +83 0x0000 //RX_FDEQ_BIN_20 +84 0x0000 //RX_FDEQ_BIN_21 +85 0x0000 //RX_FDEQ_BIN_22 +86 0x0000 //RX_FDEQ_BIN_23 +87 0x4000 //RX_FDEQ_RESRV_0 +88 0x0320 //RX_FDEQ_RESRV_1 +89 0x0018 //RX_FDDRC_BAND_MARGIN_0 +90 0x0035 //RX_FDDRC_BAND_MARGIN_1 +91 0x00D5 //RX_FDDRC_BAND_MARGIN_2 +92 0x0120 //RX_FDDRC_BAND_MARGIN_3 +93 0x0004 //RX_FDDRC_BLOCK_EXP +94 0x5000 //RX_FDDRC_THRD_2_0 +95 0x5000 //RX_FDDRC_THRD_2_1 +96 0x2000 //RX_FDDRC_THRD_2_2 +97 0x5000 //RX_FDDRC_THRD_2_3 +98 0x6400 //RX_FDDRC_THRD_3_0 +99 0x6400 //RX_FDDRC_THRD_3_1 +100 0x2000 //RX_FDDRC_THRD_3_2 +101 0x5000 //RX_FDDRC_THRD_3_3 +102 0x4000 //RX_FDDRC_SLANT_0_0 +103 0x4000 //RX_FDDRC_SLANT_0_1 +104 0x4000 //RX_FDDRC_SLANT_0_2 +105 0x4000 //RX_FDDRC_SLANT_0_3 +106 0x7FFF //RX_FDDRC_SLANT_1_0 +107 0x7FFF //RX_FDDRC_SLANT_1_1 +108 0x7FFF //RX_FDDRC_SLANT_1_2 +109 0x7FFF //RX_FDDRC_SLANT_1_3 +110 0x0000 //RX_FDDRC_RESRV_0 +129 0x0068 //RX_SPK_VOL +130 0x0000 //RX_VOL_RESRV_0 +#VOL 5 +6 0x6000 //RX_TDDRC_ALPHA_UP_1 +7 0x6000 //RX_TDDRC_ALPHA_UP_2 +8 0x6000 //RX_TDDRC_ALPHA_UP_3 +9 0x1000 //RX_TDDRC_ALPHA_UP_4 +27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +33 0x7214 //RX_TDDRC_LIMITER_THRD +34 0x0800 //RX_TDDRC_LIMITER_GAIN +112 0x0002 //RX_TDDRC_THRD_0 +113 0x0004 //RX_TDDRC_THRD_1 +114 0x1500 //RX_TDDRC_THRD_2 +115 0x1500 //RX_TDDRC_THRD_3 +116 0x3000 //RX_TDDRC_SLANT_0 +117 0x6E00 //RX_TDDRC_SLANT_1 +118 0x6000 //RX_TDDRC_ALPHA_UP_0 +119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +120 0x0000 //RX_TDDRC_HMNC_FLAG +121 0x199A //RX_TDDRC_HMNC_GAIN +122 0x0001 //RX_TDDRC_SMT_FLAG +123 0x0CCD //RX_TDDRC_SMT_W +124 0x02FD //RX_TDDRC_DRC_GAIN +38 0x0020 //RX_FDEQ_SUBNUM +39 0x4848 //RX_FDEQ_GAIN_0 +40 0x4848 //RX_FDEQ_GAIN_1 +41 0x4340 //RX_FDEQ_GAIN_2 +42 0x3F3D //RX_FDEQ_GAIN_3 +43 0x3935 //RX_FDEQ_GAIN_4 +44 0x3635 //RX_FDEQ_GAIN_5 +45 0x3E46 //RX_FDEQ_GAIN_6 +46 0x494C //RX_FDEQ_GAIN_7 +47 0x4E56 //RX_FDEQ_GAIN_8 +48 0x5F5B //RX_FDEQ_GAIN_9 +49 0x5B48 //RX_FDEQ_GAIN_10 +50 0x4856 //RX_FDEQ_GAIN_11 +51 0x5B60 //RX_FDEQ_GAIN_12 +52 0x7476 //RX_FDEQ_GAIN_13 +53 0x7F7C //RX_FDEQ_GAIN_14 +54 0x7068 //RX_FDEQ_GAIN_15 +55 0x4848 //RX_FDEQ_GAIN_16 +56 0x4848 //RX_FDEQ_GAIN_17 +57 0x4848 //RX_FDEQ_GAIN_18 +58 0x4848 //RX_FDEQ_GAIN_19 +59 0x4848 //RX_FDEQ_GAIN_20 +60 0x4848 //RX_FDEQ_GAIN_21 +61 0x4848 //RX_FDEQ_GAIN_22 +62 0x4848 //RX_FDEQ_GAIN_23 +63 0x0202 //RX_FDEQ_BIN_0 +64 0x0203 //RX_FDEQ_BIN_1 +65 0x0303 //RX_FDEQ_BIN_2 +66 0x0304 //RX_FDEQ_BIN_3 +67 0x0404 //RX_FDEQ_BIN_4 +68 0x0209 //RX_FDEQ_BIN_5 +69 0x0808 //RX_FDEQ_BIN_6 +70 0x090A //RX_FDEQ_BIN_7 +71 0x0B0C //RX_FDEQ_BIN_8 +72 0x0D0E //RX_FDEQ_BIN_9 +73 0x1013 //RX_FDEQ_BIN_10 +74 0x1719 //RX_FDEQ_BIN_11 +75 0x1B1E //RX_FDEQ_BIN_12 +76 0x1E1E //RX_FDEQ_BIN_13 +77 0x1E28 //RX_FDEQ_BIN_14 +78 0x282C //RX_FDEQ_BIN_15 +79 0x0000 //RX_FDEQ_BIN_16 +80 0x0000 //RX_FDEQ_BIN_17 +81 0x0000 //RX_FDEQ_BIN_18 +82 0x0000 //RX_FDEQ_BIN_19 +83 0x0000 //RX_FDEQ_BIN_20 +84 0x0000 //RX_FDEQ_BIN_21 +85 0x0000 //RX_FDEQ_BIN_22 +86 0x0000 //RX_FDEQ_BIN_23 +87 0x4000 //RX_FDEQ_RESRV_0 +88 0x0320 //RX_FDEQ_RESRV_1 +89 0x0018 //RX_FDDRC_BAND_MARGIN_0 +90 0x0035 //RX_FDDRC_BAND_MARGIN_1 +91 0x00D5 //RX_FDDRC_BAND_MARGIN_2 +92 0x0120 //RX_FDDRC_BAND_MARGIN_3 +93 0x0004 //RX_FDDRC_BLOCK_EXP +94 0x5000 //RX_FDDRC_THRD_2_0 +95 0x5000 //RX_FDDRC_THRD_2_1 +96 0x2000 //RX_FDDRC_THRD_2_2 +97 0x5000 //RX_FDDRC_THRD_2_3 +98 0x6400 //RX_FDDRC_THRD_3_0 +99 0x6400 //RX_FDDRC_THRD_3_1 +100 0x2000 //RX_FDDRC_THRD_3_2 +101 0x5000 //RX_FDDRC_THRD_3_3 +102 0x4000 //RX_FDDRC_SLANT_0_0 +103 0x4000 //RX_FDDRC_SLANT_0_1 +104 0x4000 //RX_FDDRC_SLANT_0_2 +105 0x4000 //RX_FDDRC_SLANT_0_3 +106 0x7FFF //RX_FDDRC_SLANT_1_0 +107 0x7FFF //RX_FDDRC_SLANT_1_1 +108 0x7FFF //RX_FDDRC_SLANT_1_2 +109 0x7FFF //RX_FDDRC_SLANT_1_3 +110 0x0000 //RX_FDDRC_RESRV_0 +129 0x0097 //RX_SPK_VOL +130 0x0000 //RX_VOL_RESRV_0 +#VOL 6 +6 0x6000 //RX_TDDRC_ALPHA_UP_1 +7 0x6000 //RX_TDDRC_ALPHA_UP_2 +8 0x6000 //RX_TDDRC_ALPHA_UP_3 +9 0x1000 //RX_TDDRC_ALPHA_UP_4 +27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +33 0x7214 //RX_TDDRC_LIMITER_THRD +34 0x0800 //RX_TDDRC_LIMITER_GAIN +112 0x0002 //RX_TDDRC_THRD_0 +113 0x0004 //RX_TDDRC_THRD_1 +114 0x1500 //RX_TDDRC_THRD_2 +115 0x1500 //RX_TDDRC_THRD_3 +116 0x3000 //RX_TDDRC_SLANT_0 +117 0x6E00 //RX_TDDRC_SLANT_1 +118 0x6000 //RX_TDDRC_ALPHA_UP_0 +119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +120 0x0000 //RX_TDDRC_HMNC_FLAG +121 0x199A //RX_TDDRC_HMNC_GAIN +122 0x0001 //RX_TDDRC_SMT_FLAG +123 0x0CCD //RX_TDDRC_SMT_W +124 0x02FD //RX_TDDRC_DRC_GAIN +38 0x0020 //RX_FDEQ_SUBNUM +39 0x4848 //RX_FDEQ_GAIN_0 +40 0x4848 //RX_FDEQ_GAIN_1 +41 0x4340 //RX_FDEQ_GAIN_2 +42 0x3F3D //RX_FDEQ_GAIN_3 +43 0x3935 //RX_FDEQ_GAIN_4 +44 0x3635 //RX_FDEQ_GAIN_5 +45 0x3E46 //RX_FDEQ_GAIN_6 +46 0x494C //RX_FDEQ_GAIN_7 +47 0x4E56 //RX_FDEQ_GAIN_8 +48 0x5F5B //RX_FDEQ_GAIN_9 +49 0x5B48 //RX_FDEQ_GAIN_10 +50 0x4856 //RX_FDEQ_GAIN_11 +51 0x5B60 //RX_FDEQ_GAIN_12 +52 0x7476 //RX_FDEQ_GAIN_13 +53 0x7F7C //RX_FDEQ_GAIN_14 +54 0x7068 //RX_FDEQ_GAIN_15 +55 0x4848 //RX_FDEQ_GAIN_16 +56 0x4848 //RX_FDEQ_GAIN_17 +57 0x4848 //RX_FDEQ_GAIN_18 +58 0x4848 //RX_FDEQ_GAIN_19 +59 0x4848 //RX_FDEQ_GAIN_20 +60 0x4848 //RX_FDEQ_GAIN_21 +61 0x4848 //RX_FDEQ_GAIN_22 +62 0x4848 //RX_FDEQ_GAIN_23 +63 0x0202 //RX_FDEQ_BIN_0 +64 0x0203 //RX_FDEQ_BIN_1 +65 0x0303 //RX_FDEQ_BIN_2 +66 0x0304 //RX_FDEQ_BIN_3 +67 0x0404 //RX_FDEQ_BIN_4 +68 0x0209 //RX_FDEQ_BIN_5 +69 0x0808 //RX_FDEQ_BIN_6 +70 0x090A //RX_FDEQ_BIN_7 +71 0x0B0C //RX_FDEQ_BIN_8 +72 0x0D0E //RX_FDEQ_BIN_9 +73 0x1013 //RX_FDEQ_BIN_10 +74 0x1719 //RX_FDEQ_BIN_11 +75 0x1B1E //RX_FDEQ_BIN_12 +76 0x1E1E //RX_FDEQ_BIN_13 +77 0x1E28 //RX_FDEQ_BIN_14 +78 0x282C //RX_FDEQ_BIN_15 +79 0x0000 //RX_FDEQ_BIN_16 +80 0x0000 //RX_FDEQ_BIN_17 +81 0x0000 //RX_FDEQ_BIN_18 +82 0x0000 //RX_FDEQ_BIN_19 +83 0x0000 //RX_FDEQ_BIN_20 +84 0x0000 //RX_FDEQ_BIN_21 +85 0x0000 //RX_FDEQ_BIN_22 +86 0x0000 //RX_FDEQ_BIN_23 +87 0x4000 //RX_FDEQ_RESRV_0 +88 0x0320 //RX_FDEQ_RESRV_1 +89 0x0018 //RX_FDDRC_BAND_MARGIN_0 +90 0x0035 //RX_FDDRC_BAND_MARGIN_1 +91 0x00D5 //RX_FDDRC_BAND_MARGIN_2 +92 0x0120 //RX_FDDRC_BAND_MARGIN_3 +93 0x0004 //RX_FDDRC_BLOCK_EXP +94 0x5000 //RX_FDDRC_THRD_2_0 +95 0x5000 //RX_FDDRC_THRD_2_1 +96 0x2000 //RX_FDDRC_THRD_2_2 +97 0x5000 //RX_FDDRC_THRD_2_3 +98 0x6400 //RX_FDDRC_THRD_3_0 +99 0x6400 //RX_FDDRC_THRD_3_1 +100 0x2000 //RX_FDDRC_THRD_3_2 +101 0x5000 //RX_FDDRC_THRD_3_3 +102 0x4000 //RX_FDDRC_SLANT_0_0 +103 0x4000 //RX_FDDRC_SLANT_0_1 +104 0x4000 //RX_FDDRC_SLANT_0_2 +105 0x4000 //RX_FDDRC_SLANT_0_3 +106 0x7FFF //RX_FDDRC_SLANT_1_0 +107 0x7FFF //RX_FDDRC_SLANT_1_1 +108 0x7FFF //RX_FDDRC_SLANT_1_2 +109 0x7FFF //RX_FDDRC_SLANT_1_3 +110 0x0000 //RX_FDDRC_RESRV_0 +129 0x0100 //RX_SPK_VOL +130 0x0000 //RX_VOL_RESRV_0 +#RX 2 +157 0x027C //RX_RECVFUNC_MODE_0 +158 0x0000 //RX_RECVFUNC_MODE_1 +159 0x0003 //RX_SAMPLINGFREQ_SIG +160 0x0003 //RX_SAMPLINGFREQ_PROC +161 0x000A //RX_FRAME_SZ +162 0x0000 //RX_DELAY_OPT +163 0x6000 //RX_TDDRC_ALPHA_UP_1 +164 0x6000 //RX_TDDRC_ALPHA_UP_2 +165 0x6000 //RX_TDDRC_ALPHA_UP_3 +166 0x1000 //RX_TDDRC_ALPHA_UP_4 +167 0x0800 //RX_PGA +168 0x7652 //RX_A_HP +169 0x4000 //RX_B_PE +170 0x7800 //RX_THR_PITCH_DET_0 +171 0x7000 //RX_THR_PITCH_DET_1 +172 0x6000 //RX_THR_PITCH_DET_2 +173 0x0008 //RX_PITCH_BFR_LEN +174 0x0003 //RX_SBD_PITCH_DET +175 0x0100 //RX_PP_RESRV_0 +176 0x0020 //RX_PP_RESRV_1 +177 0x0400 //RX_N_SN_EST +178 0x000C //RX_N2_SN_EST +179 0x0010 //RX_NS_LVL_CTRL +180 0xF800 //RX_THR_SN_EST +181 0x7E00 //RX_LAMBDA_PFILT +182 0x000A //RX_FENS_RESRV_0 +183 0x0190 //RX_FENS_RESRV_1 +184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +187 0x0002 //RX_EXTRA_NS_L +188 0x0800 //RX_EXTRA_NS_A +189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +190 0x7214 //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +192 0x199A //RX_A_POST_FLT +193 0x0000 //RX_LMT_THRD +194 0x4000 //RX_LMT_ALPHA +195 0x0020 //RX_FDEQ_SUBNUM +196 0x484E //RX_FDEQ_GAIN_0 +197 0x4E4E //RX_FDEQ_GAIN_1 +198 0x4E4E //RX_FDEQ_GAIN_2 +199 0x4848 //RX_FDEQ_GAIN_3 +200 0x484E //RX_FDEQ_GAIN_4 +201 0x6E4E //RX_FDEQ_GAIN_5 +202 0x4850 //RX_FDEQ_GAIN_6 +203 0x4848 //RX_FDEQ_GAIN_7 +204 0x4860 //RX_FDEQ_GAIN_8 +205 0x7468 //RX_FDEQ_GAIN_9 +206 0x6060 //RX_FDEQ_GAIN_10 +207 0x6666 //RX_FDEQ_GAIN_11 +208 0x6666 //RX_FDEQ_GAIN_12 +209 0x6666 //RX_FDEQ_GAIN_13 +210 0x6060 //RX_FDEQ_GAIN_14 +211 0x6060 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0202 //RX_FDEQ_BIN_0 +221 0x0203 //RX_FDEQ_BIN_1 +222 0x0303 //RX_FDEQ_BIN_2 +223 0x0304 //RX_FDEQ_BIN_3 +224 0x0404 //RX_FDEQ_BIN_4 +225 0x0209 //RX_FDEQ_BIN_5 +226 0x0808 //RX_FDEQ_BIN_6 +227 0x090A //RX_FDEQ_BIN_7 +228 0x0B0C //RX_FDEQ_BIN_8 +229 0x0D0E //RX_FDEQ_BIN_9 +230 0x1013 //RX_FDEQ_BIN_10 +231 0x1719 //RX_FDEQ_BIN_11 +232 0x1B1E //RX_FDEQ_BIN_12 +233 0x1E1E //RX_FDEQ_BIN_13 +234 0x1E28 //RX_FDEQ_BIN_14 +235 0x282C //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x4000 //RX_FDEQ_RESRV_0 +245 0x0320 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0035 //RX_FDDRC_BAND_MARGIN_1 +248 0x00D5 //RX_FDDRC_BAND_MARGIN_2 +249 0x0120 //RX_FDDRC_BAND_MARGIN_3 +250 0x0004 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x2000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x2000 //RX_FDDRC_THRD_3_2 +258 0x5000 //RX_FDDRC_THRD_3_3 +259 0x4000 //RX_FDDRC_SLANT_0_0 +260 0x4000 //RX_FDDRC_SLANT_0_1 +261 0x4000 //RX_FDDRC_SLANT_0_2 +262 0x4000 //RX_FDDRC_SLANT_0_3 +263 0x7FFF //RX_FDDRC_SLANT_1_0 +264 0x7FFF //RX_FDDRC_SLANT_1_1 +265 0x7FFF //RX_FDDRC_SLANT_1_2 +266 0x7FFF //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +268 0x0002 //RX_FILTINDX +269 0x0002 //RX_TDDRC_THRD_0 +270 0x0004 //RX_TDDRC_THRD_1 +271 0x1A00 //RX_TDDRC_THRD_2 +272 0x1A00 //RX_TDDRC_THRD_3 +273 0x7EB8 //RX_TDDRC_SLANT_0 +274 0x2500 //RX_TDDRC_SLANT_1 +275 0x6000 //RX_TDDRC_ALPHA_UP_0 +276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x199A //RX_TDDRC_HMNC_GAIN +279 0x0001 //RX_TDDRC_SMT_FLAG +280 0x0CCD //RX_TDDRC_SMT_W +281 0x04BC //RX_TDDRC_DRC_GAIN +282 0x7C00 //RX_LAMBDA_PKA_FP +283 0x2000 //RX_TPKA_FP +284 0x2000 //RX_MIN_G_FP +285 0x0080 //RX_MAX_G_FP +286 0x0019 //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 +288 0x0000 //RX_MAXLEVEL_CNG +289 0x3000 //RX_BWE_UV_TH +290 0x3000 //RX_BWE_UV_TH2 +291 0x1800 //RX_BWE_UV_TH3 +292 0x1000 //RX_BWE_V_TH +293 0x04CD //RX_BWE_GAIN1_V_TH1 +294 0x0F33 //RX_BWE_GAIN1_V_TH2 +295 0x7333 //RX_BWE_UV_EQ +296 0x199A //RX_BWE_V_EQ +297 0x7333 //RX_BWE_TONE_TH +298 0x0004 //RX_BWE_UV_HOLD_T +299 0x6CCD //RX_BWE_GAIN2_ALPHA +300 0x799A //RX_BWE_GAIN3_ALPHA +301 0x001E //RX_BWE_CUTOFF +302 0x3000 //RX_BWE_GAINFILL +303 0x3200 //RX_BWE_MAXTH_TONE +304 0x2000 //RX_BWE_EQ_0 +305 0x2000 //RX_BWE_EQ_1 +306 0x2000 //RX_BWE_EQ_2 +307 0x2000 //RX_BWE_EQ_3 +308 0x2000 //RX_BWE_EQ_4 +309 0x2000 //RX_BWE_EQ_5 +310 0x2000 //RX_BWE_EQ_6 +311 0x0000 //RX_BWE_RESRV_0 +312 0x0000 //RX_BWE_RESRV_1 +313 0x0000 //RX_BWE_RESRV_2 +#VOL 0 +163 0x6000 //RX_TDDRC_ALPHA_UP_1 +164 0x6000 //RX_TDDRC_ALPHA_UP_2 +165 0x6000 //RX_TDDRC_ALPHA_UP_3 +166 0x1000 //RX_TDDRC_ALPHA_UP_4 +184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +190 0x7214 //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +269 0x0002 //RX_TDDRC_THRD_0 +270 0x0004 //RX_TDDRC_THRD_1 +271 0x1A00 //RX_TDDRC_THRD_2 +272 0x1A00 //RX_TDDRC_THRD_3 +273 0x7EB8 //RX_TDDRC_SLANT_0 +274 0x2500 //RX_TDDRC_SLANT_1 +275 0x6000 //RX_TDDRC_ALPHA_UP_0 +276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x199A //RX_TDDRC_HMNC_GAIN +279 0x0001 //RX_TDDRC_SMT_FLAG +280 0x0CCD //RX_TDDRC_SMT_W +281 0x04BC //RX_TDDRC_DRC_GAIN +195 0x0020 //RX_FDEQ_SUBNUM +196 0x484E //RX_FDEQ_GAIN_0 +197 0x4E4E //RX_FDEQ_GAIN_1 +198 0x4E4E //RX_FDEQ_GAIN_2 +199 0x4848 //RX_FDEQ_GAIN_3 +200 0x484E //RX_FDEQ_GAIN_4 +201 0x6E4E //RX_FDEQ_GAIN_5 +202 0x4850 //RX_FDEQ_GAIN_6 +203 0x4848 //RX_FDEQ_GAIN_7 +204 0x4860 //RX_FDEQ_GAIN_8 +205 0x7468 //RX_FDEQ_GAIN_9 +206 0x6060 //RX_FDEQ_GAIN_10 +207 0x6666 //RX_FDEQ_GAIN_11 +208 0x6666 //RX_FDEQ_GAIN_12 +209 0x6666 //RX_FDEQ_GAIN_13 +210 0x6060 //RX_FDEQ_GAIN_14 +211 0x6060 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0202 //RX_FDEQ_BIN_0 +221 0x0203 //RX_FDEQ_BIN_1 +222 0x0303 //RX_FDEQ_BIN_2 +223 0x0304 //RX_FDEQ_BIN_3 +224 0x0404 //RX_FDEQ_BIN_4 +225 0x0209 //RX_FDEQ_BIN_5 +226 0x0808 //RX_FDEQ_BIN_6 +227 0x090A //RX_FDEQ_BIN_7 +228 0x0B0C //RX_FDEQ_BIN_8 +229 0x0D0E //RX_FDEQ_BIN_9 +230 0x1013 //RX_FDEQ_BIN_10 +231 0x1719 //RX_FDEQ_BIN_11 +232 0x1B1E //RX_FDEQ_BIN_12 +233 0x1E1E //RX_FDEQ_BIN_13 +234 0x1E28 //RX_FDEQ_BIN_14 +235 0x282C //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x4000 //RX_FDEQ_RESRV_0 +245 0x0320 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0035 //RX_FDDRC_BAND_MARGIN_1 +248 0x00D5 //RX_FDDRC_BAND_MARGIN_2 +249 0x0120 //RX_FDDRC_BAND_MARGIN_3 +250 0x0004 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x2000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x2000 //RX_FDDRC_THRD_3_2 +258 0x5000 //RX_FDDRC_THRD_3_3 +259 0x4000 //RX_FDDRC_SLANT_0_0 +260 0x4000 //RX_FDDRC_SLANT_0_1 +261 0x4000 //RX_FDDRC_SLANT_0_2 +262 0x4000 //RX_FDDRC_SLANT_0_3 +263 0x7FFF //RX_FDDRC_SLANT_1_0 +264 0x7FFF //RX_FDDRC_SLANT_1_1 +265 0x7FFF //RX_FDDRC_SLANT_1_2 +266 0x7FFF //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +286 0x0019 //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 +#VOL 1 +163 0x6000 //RX_TDDRC_ALPHA_UP_1 +164 0x6000 //RX_TDDRC_ALPHA_UP_2 +165 0x6000 //RX_TDDRC_ALPHA_UP_3 +166 0x1000 //RX_TDDRC_ALPHA_UP_4 +184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +190 0x7214 //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +269 0x0002 //RX_TDDRC_THRD_0 +270 0x0004 //RX_TDDRC_THRD_1 +271 0x1A00 //RX_TDDRC_THRD_2 +272 0x1A00 //RX_TDDRC_THRD_3 +273 0x7EB8 //RX_TDDRC_SLANT_0 +274 0x2500 //RX_TDDRC_SLANT_1 +275 0x6000 //RX_TDDRC_ALPHA_UP_0 +276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x199A //RX_TDDRC_HMNC_GAIN +279 0x0001 //RX_TDDRC_SMT_FLAG +280 0x0CCD //RX_TDDRC_SMT_W +281 0x04BC //RX_TDDRC_DRC_GAIN +195 0x0020 //RX_FDEQ_SUBNUM +196 0x484E //RX_FDEQ_GAIN_0 +197 0x4E4E //RX_FDEQ_GAIN_1 +198 0x4E4E //RX_FDEQ_GAIN_2 +199 0x4848 //RX_FDEQ_GAIN_3 +200 0x484E //RX_FDEQ_GAIN_4 +201 0x6E4E //RX_FDEQ_GAIN_5 +202 0x4850 //RX_FDEQ_GAIN_6 +203 0x4848 //RX_FDEQ_GAIN_7 +204 0x4860 //RX_FDEQ_GAIN_8 +205 0x7468 //RX_FDEQ_GAIN_9 +206 0x6060 //RX_FDEQ_GAIN_10 +207 0x6666 //RX_FDEQ_GAIN_11 +208 0x6666 //RX_FDEQ_GAIN_12 +209 0x6666 //RX_FDEQ_GAIN_13 +210 0x6060 //RX_FDEQ_GAIN_14 +211 0x6060 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0202 //RX_FDEQ_BIN_0 +221 0x0203 //RX_FDEQ_BIN_1 +222 0x0303 //RX_FDEQ_BIN_2 +223 0x0304 //RX_FDEQ_BIN_3 +224 0x0404 //RX_FDEQ_BIN_4 +225 0x0209 //RX_FDEQ_BIN_5 +226 0x0808 //RX_FDEQ_BIN_6 +227 0x090A //RX_FDEQ_BIN_7 +228 0x0B0C //RX_FDEQ_BIN_8 +229 0x0D0E //RX_FDEQ_BIN_9 +230 0x1013 //RX_FDEQ_BIN_10 +231 0x1719 //RX_FDEQ_BIN_11 +232 0x1B1E //RX_FDEQ_BIN_12 +233 0x1E1E //RX_FDEQ_BIN_13 +234 0x1E28 //RX_FDEQ_BIN_14 +235 0x282C //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x4000 //RX_FDEQ_RESRV_0 +245 0x0320 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0035 //RX_FDDRC_BAND_MARGIN_1 +248 0x00D5 //RX_FDDRC_BAND_MARGIN_2 +249 0x0120 //RX_FDDRC_BAND_MARGIN_3 +250 0x0004 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x2000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x2000 //RX_FDDRC_THRD_3_2 +258 0x5000 //RX_FDDRC_THRD_3_3 +259 0x4000 //RX_FDDRC_SLANT_0_0 +260 0x4000 //RX_FDDRC_SLANT_0_1 +261 0x4000 //RX_FDDRC_SLANT_0_2 +262 0x4000 //RX_FDDRC_SLANT_0_3 +263 0x7FFF //RX_FDDRC_SLANT_1_0 +264 0x7FFF //RX_FDDRC_SLANT_1_1 +265 0x7FFF //RX_FDDRC_SLANT_1_2 +266 0x7FFF //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +286 0x0023 //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 +#VOL 2 +163 0x6000 //RX_TDDRC_ALPHA_UP_1 +164 0x6000 //RX_TDDRC_ALPHA_UP_2 +165 0x6000 //RX_TDDRC_ALPHA_UP_3 +166 0x1000 //RX_TDDRC_ALPHA_UP_4 +184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +190 0x7214 //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +269 0x0002 //RX_TDDRC_THRD_0 +270 0x0004 //RX_TDDRC_THRD_1 +271 0x1A00 //RX_TDDRC_THRD_2 +272 0x1A00 //RX_TDDRC_THRD_3 +273 0x7EB8 //RX_TDDRC_SLANT_0 +274 0x2500 //RX_TDDRC_SLANT_1 +275 0x6000 //RX_TDDRC_ALPHA_UP_0 +276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x199A //RX_TDDRC_HMNC_GAIN +279 0x0001 //RX_TDDRC_SMT_FLAG +280 0x0CCD //RX_TDDRC_SMT_W +281 0x04BC //RX_TDDRC_DRC_GAIN +195 0x0020 //RX_FDEQ_SUBNUM +196 0x484E //RX_FDEQ_GAIN_0 +197 0x4E4E //RX_FDEQ_GAIN_1 +198 0x4E4E //RX_FDEQ_GAIN_2 +199 0x4848 //RX_FDEQ_GAIN_3 +200 0x484E //RX_FDEQ_GAIN_4 +201 0x6E4E //RX_FDEQ_GAIN_5 +202 0x4850 //RX_FDEQ_GAIN_6 +203 0x4848 //RX_FDEQ_GAIN_7 +204 0x4860 //RX_FDEQ_GAIN_8 +205 0x7468 //RX_FDEQ_GAIN_9 +206 0x6060 //RX_FDEQ_GAIN_10 +207 0x6666 //RX_FDEQ_GAIN_11 +208 0x6666 //RX_FDEQ_GAIN_12 +209 0x6666 //RX_FDEQ_GAIN_13 +210 0x6060 //RX_FDEQ_GAIN_14 +211 0x6060 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0202 //RX_FDEQ_BIN_0 +221 0x0203 //RX_FDEQ_BIN_1 +222 0x0303 //RX_FDEQ_BIN_2 +223 0x0304 //RX_FDEQ_BIN_3 +224 0x0404 //RX_FDEQ_BIN_4 +225 0x0209 //RX_FDEQ_BIN_5 +226 0x0808 //RX_FDEQ_BIN_6 +227 0x090A //RX_FDEQ_BIN_7 +228 0x0B0C //RX_FDEQ_BIN_8 +229 0x0D0E //RX_FDEQ_BIN_9 +230 0x1013 //RX_FDEQ_BIN_10 +231 0x1719 //RX_FDEQ_BIN_11 +232 0x1B1E //RX_FDEQ_BIN_12 +233 0x1E1E //RX_FDEQ_BIN_13 +234 0x1E28 //RX_FDEQ_BIN_14 +235 0x282C //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x4000 //RX_FDEQ_RESRV_0 +245 0x0320 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0035 //RX_FDDRC_BAND_MARGIN_1 +248 0x00D5 //RX_FDDRC_BAND_MARGIN_2 +249 0x0120 //RX_FDDRC_BAND_MARGIN_3 +250 0x0004 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x2000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x2000 //RX_FDDRC_THRD_3_2 +258 0x5000 //RX_FDDRC_THRD_3_3 +259 0x4000 //RX_FDDRC_SLANT_0_0 +260 0x4000 //RX_FDDRC_SLANT_0_1 +261 0x4000 //RX_FDDRC_SLANT_0_2 +262 0x4000 //RX_FDDRC_SLANT_0_3 +263 0x7FFF //RX_FDDRC_SLANT_1_0 +264 0x7FFF //RX_FDDRC_SLANT_1_1 +265 0x7FFF //RX_FDDRC_SLANT_1_2 +266 0x7FFF //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +286 0x0032 //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 +#VOL 3 +163 0x6000 //RX_TDDRC_ALPHA_UP_1 +164 0x6000 //RX_TDDRC_ALPHA_UP_2 +165 0x6000 //RX_TDDRC_ALPHA_UP_3 +166 0x1000 //RX_TDDRC_ALPHA_UP_4 +184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +190 0x7214 //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +269 0x0002 //RX_TDDRC_THRD_0 +270 0x0004 //RX_TDDRC_THRD_1 +271 0x1A00 //RX_TDDRC_THRD_2 +272 0x1A00 //RX_TDDRC_THRD_3 +273 0x7EB8 //RX_TDDRC_SLANT_0 +274 0x2500 //RX_TDDRC_SLANT_1 +275 0x6000 //RX_TDDRC_ALPHA_UP_0 +276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x199A //RX_TDDRC_HMNC_GAIN +279 0x0001 //RX_TDDRC_SMT_FLAG +280 0x0CCD //RX_TDDRC_SMT_W +281 0x04BC //RX_TDDRC_DRC_GAIN +195 0x0020 //RX_FDEQ_SUBNUM +196 0x484E //RX_FDEQ_GAIN_0 +197 0x4E4E //RX_FDEQ_GAIN_1 +198 0x4E4E //RX_FDEQ_GAIN_2 +199 0x4848 //RX_FDEQ_GAIN_3 +200 0x484E //RX_FDEQ_GAIN_4 +201 0x6E4E //RX_FDEQ_GAIN_5 +202 0x4850 //RX_FDEQ_GAIN_6 +203 0x4848 //RX_FDEQ_GAIN_7 +204 0x4860 //RX_FDEQ_GAIN_8 +205 0x7468 //RX_FDEQ_GAIN_9 +206 0x6060 //RX_FDEQ_GAIN_10 +207 0x6666 //RX_FDEQ_GAIN_11 +208 0x6666 //RX_FDEQ_GAIN_12 +209 0x6666 //RX_FDEQ_GAIN_13 +210 0x6060 //RX_FDEQ_GAIN_14 +211 0x6060 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0202 //RX_FDEQ_BIN_0 +221 0x0203 //RX_FDEQ_BIN_1 +222 0x0303 //RX_FDEQ_BIN_2 +223 0x0304 //RX_FDEQ_BIN_3 +224 0x0404 //RX_FDEQ_BIN_4 +225 0x0209 //RX_FDEQ_BIN_5 +226 0x0808 //RX_FDEQ_BIN_6 +227 0x090A //RX_FDEQ_BIN_7 +228 0x0B0C //RX_FDEQ_BIN_8 +229 0x0D0E //RX_FDEQ_BIN_9 +230 0x1013 //RX_FDEQ_BIN_10 +231 0x1719 //RX_FDEQ_BIN_11 +232 0x1B1E //RX_FDEQ_BIN_12 +233 0x1E1E //RX_FDEQ_BIN_13 +234 0x1E28 //RX_FDEQ_BIN_14 +235 0x282C //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x4000 //RX_FDEQ_RESRV_0 +245 0x0320 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0035 //RX_FDDRC_BAND_MARGIN_1 +248 0x00D5 //RX_FDDRC_BAND_MARGIN_2 +249 0x0120 //RX_FDDRC_BAND_MARGIN_3 +250 0x0004 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x2000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x2000 //RX_FDDRC_THRD_3_2 +258 0x5000 //RX_FDDRC_THRD_3_3 +259 0x4000 //RX_FDDRC_SLANT_0_0 +260 0x4000 //RX_FDDRC_SLANT_0_1 +261 0x4000 //RX_FDDRC_SLANT_0_2 +262 0x4000 //RX_FDDRC_SLANT_0_3 +263 0x7FFF //RX_FDDRC_SLANT_1_0 +264 0x7FFF //RX_FDDRC_SLANT_1_1 +265 0x7FFF //RX_FDDRC_SLANT_1_2 +266 0x7FFF //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +286 0x0048 //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 +#VOL 4 +163 0x6000 //RX_TDDRC_ALPHA_UP_1 +164 0x6000 //RX_TDDRC_ALPHA_UP_2 +165 0x6000 //RX_TDDRC_ALPHA_UP_3 +166 0x1000 //RX_TDDRC_ALPHA_UP_4 +184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +190 0x7214 //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +269 0x0002 //RX_TDDRC_THRD_0 +270 0x0004 //RX_TDDRC_THRD_1 +271 0x1A00 //RX_TDDRC_THRD_2 +272 0x1A00 //RX_TDDRC_THRD_3 +273 0x7EB8 //RX_TDDRC_SLANT_0 +274 0x2500 //RX_TDDRC_SLANT_1 +275 0x6000 //RX_TDDRC_ALPHA_UP_0 +276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x199A //RX_TDDRC_HMNC_GAIN +279 0x0001 //RX_TDDRC_SMT_FLAG +280 0x0CCD //RX_TDDRC_SMT_W +281 0x04BC //RX_TDDRC_DRC_GAIN +195 0x0020 //RX_FDEQ_SUBNUM +196 0x484E //RX_FDEQ_GAIN_0 +197 0x4E4E //RX_FDEQ_GAIN_1 +198 0x4E4E //RX_FDEQ_GAIN_2 +199 0x4848 //RX_FDEQ_GAIN_3 +200 0x484E //RX_FDEQ_GAIN_4 +201 0x6E4E //RX_FDEQ_GAIN_5 +202 0x4850 //RX_FDEQ_GAIN_6 +203 0x4848 //RX_FDEQ_GAIN_7 +204 0x4860 //RX_FDEQ_GAIN_8 +205 0x7468 //RX_FDEQ_GAIN_9 +206 0x6060 //RX_FDEQ_GAIN_10 +207 0x6666 //RX_FDEQ_GAIN_11 +208 0x6666 //RX_FDEQ_GAIN_12 +209 0x6666 //RX_FDEQ_GAIN_13 +210 0x6060 //RX_FDEQ_GAIN_14 +211 0x6060 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0202 //RX_FDEQ_BIN_0 +221 0x0203 //RX_FDEQ_BIN_1 +222 0x0303 //RX_FDEQ_BIN_2 +223 0x0304 //RX_FDEQ_BIN_3 +224 0x0404 //RX_FDEQ_BIN_4 +225 0x0209 //RX_FDEQ_BIN_5 +226 0x0808 //RX_FDEQ_BIN_6 +227 0x090A //RX_FDEQ_BIN_7 +228 0x0B0C //RX_FDEQ_BIN_8 +229 0x0D0E //RX_FDEQ_BIN_9 +230 0x1013 //RX_FDEQ_BIN_10 +231 0x1719 //RX_FDEQ_BIN_11 +232 0x1B1E //RX_FDEQ_BIN_12 +233 0x1E1E //RX_FDEQ_BIN_13 +234 0x1E28 //RX_FDEQ_BIN_14 +235 0x282C //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x4000 //RX_FDEQ_RESRV_0 +245 0x0320 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0035 //RX_FDDRC_BAND_MARGIN_1 +248 0x00D5 //RX_FDDRC_BAND_MARGIN_2 +249 0x0120 //RX_FDDRC_BAND_MARGIN_3 +250 0x0004 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x2000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x2000 //RX_FDDRC_THRD_3_2 +258 0x5000 //RX_FDDRC_THRD_3_3 +259 0x4000 //RX_FDDRC_SLANT_0_0 +260 0x4000 //RX_FDDRC_SLANT_0_1 +261 0x4000 //RX_FDDRC_SLANT_0_2 +262 0x4000 //RX_FDDRC_SLANT_0_3 +263 0x7FFF //RX_FDDRC_SLANT_1_0 +264 0x7FFF //RX_FDDRC_SLANT_1_1 +265 0x7FFF //RX_FDDRC_SLANT_1_2 +266 0x7FFF //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +286 0x0068 //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 +#VOL 5 +163 0x6000 //RX_TDDRC_ALPHA_UP_1 +164 0x6000 //RX_TDDRC_ALPHA_UP_2 +165 0x6000 //RX_TDDRC_ALPHA_UP_3 +166 0x1000 //RX_TDDRC_ALPHA_UP_4 +184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +190 0x7214 //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +269 0x0002 //RX_TDDRC_THRD_0 +270 0x0004 //RX_TDDRC_THRD_1 +271 0x1A00 //RX_TDDRC_THRD_2 +272 0x1A00 //RX_TDDRC_THRD_3 +273 0x7EB8 //RX_TDDRC_SLANT_0 +274 0x2500 //RX_TDDRC_SLANT_1 +275 0x6000 //RX_TDDRC_ALPHA_UP_0 +276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x199A //RX_TDDRC_HMNC_GAIN +279 0x0001 //RX_TDDRC_SMT_FLAG +280 0x0CCD //RX_TDDRC_SMT_W +281 0x04BC //RX_TDDRC_DRC_GAIN +195 0x0020 //RX_FDEQ_SUBNUM +196 0x484E //RX_FDEQ_GAIN_0 +197 0x4E4E //RX_FDEQ_GAIN_1 +198 0x4E4E //RX_FDEQ_GAIN_2 +199 0x4848 //RX_FDEQ_GAIN_3 +200 0x484E //RX_FDEQ_GAIN_4 +201 0x6E4E //RX_FDEQ_GAIN_5 +202 0x4850 //RX_FDEQ_GAIN_6 +203 0x4848 //RX_FDEQ_GAIN_7 +204 0x4860 //RX_FDEQ_GAIN_8 +205 0x7468 //RX_FDEQ_GAIN_9 +206 0x6060 //RX_FDEQ_GAIN_10 +207 0x6666 //RX_FDEQ_GAIN_11 +208 0x6666 //RX_FDEQ_GAIN_12 +209 0x6666 //RX_FDEQ_GAIN_13 +210 0x6060 //RX_FDEQ_GAIN_14 +211 0x6060 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0202 //RX_FDEQ_BIN_0 +221 0x0203 //RX_FDEQ_BIN_1 +222 0x0303 //RX_FDEQ_BIN_2 +223 0x0304 //RX_FDEQ_BIN_3 +224 0x0404 //RX_FDEQ_BIN_4 +225 0x0209 //RX_FDEQ_BIN_5 +226 0x0808 //RX_FDEQ_BIN_6 +227 0x090A //RX_FDEQ_BIN_7 +228 0x0B0C //RX_FDEQ_BIN_8 +229 0x0D0E //RX_FDEQ_BIN_9 +230 0x1013 //RX_FDEQ_BIN_10 +231 0x1719 //RX_FDEQ_BIN_11 +232 0x1B1E //RX_FDEQ_BIN_12 +233 0x1E1E //RX_FDEQ_BIN_13 +234 0x1E28 //RX_FDEQ_BIN_14 +235 0x282C //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x4000 //RX_FDEQ_RESRV_0 +245 0x0320 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0035 //RX_FDDRC_BAND_MARGIN_1 +248 0x00D5 //RX_FDDRC_BAND_MARGIN_2 +249 0x0120 //RX_FDDRC_BAND_MARGIN_3 +250 0x0004 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x2000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x2000 //RX_FDDRC_THRD_3_2 +258 0x5000 //RX_FDDRC_THRD_3_3 +259 0x4000 //RX_FDDRC_SLANT_0_0 +260 0x4000 //RX_FDDRC_SLANT_0_1 +261 0x4000 //RX_FDDRC_SLANT_0_2 +262 0x4000 //RX_FDDRC_SLANT_0_3 +263 0x7FFF //RX_FDDRC_SLANT_1_0 +264 0x7FFF //RX_FDDRC_SLANT_1_1 +265 0x7FFF //RX_FDDRC_SLANT_1_2 +266 0x7FFF //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +286 0x0097 //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 +#VOL 6 +163 0x6000 //RX_TDDRC_ALPHA_UP_1 +164 0x6000 //RX_TDDRC_ALPHA_UP_2 +165 0x6000 //RX_TDDRC_ALPHA_UP_3 +166 0x1000 //RX_TDDRC_ALPHA_UP_4 +184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +190 0x7214 //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +269 0x0002 //RX_TDDRC_THRD_0 +270 0x0004 //RX_TDDRC_THRD_1 +271 0x1A00 //RX_TDDRC_THRD_2 +272 0x1A00 //RX_TDDRC_THRD_3 +273 0x7EB8 //RX_TDDRC_SLANT_0 +274 0x2500 //RX_TDDRC_SLANT_1 +275 0x6000 //RX_TDDRC_ALPHA_UP_0 +276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x199A //RX_TDDRC_HMNC_GAIN +279 0x0001 //RX_TDDRC_SMT_FLAG +280 0x0CCD //RX_TDDRC_SMT_W +281 0x04BC //RX_TDDRC_DRC_GAIN +195 0x0020 //RX_FDEQ_SUBNUM +196 0x484E //RX_FDEQ_GAIN_0 +197 0x4E4E //RX_FDEQ_GAIN_1 +198 0x4E4E //RX_FDEQ_GAIN_2 +199 0x4848 //RX_FDEQ_GAIN_3 +200 0x484E //RX_FDEQ_GAIN_4 +201 0x6E4E //RX_FDEQ_GAIN_5 +202 0x4850 //RX_FDEQ_GAIN_6 +203 0x4848 //RX_FDEQ_GAIN_7 +204 0x4860 //RX_FDEQ_GAIN_8 +205 0x7468 //RX_FDEQ_GAIN_9 +206 0x6060 //RX_FDEQ_GAIN_10 +207 0x6666 //RX_FDEQ_GAIN_11 +208 0x6666 //RX_FDEQ_GAIN_12 +209 0x6666 //RX_FDEQ_GAIN_13 +210 0x6060 //RX_FDEQ_GAIN_14 +211 0x6060 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0202 //RX_FDEQ_BIN_0 +221 0x0203 //RX_FDEQ_BIN_1 +222 0x0303 //RX_FDEQ_BIN_2 +223 0x0304 //RX_FDEQ_BIN_3 +224 0x0404 //RX_FDEQ_BIN_4 +225 0x0209 //RX_FDEQ_BIN_5 +226 0x0808 //RX_FDEQ_BIN_6 +227 0x090A //RX_FDEQ_BIN_7 +228 0x0B0C //RX_FDEQ_BIN_8 +229 0x0D0E //RX_FDEQ_BIN_9 +230 0x1013 //RX_FDEQ_BIN_10 +231 0x1719 //RX_FDEQ_BIN_11 +232 0x1B1E //RX_FDEQ_BIN_12 +233 0x1E1E //RX_FDEQ_BIN_13 +234 0x1E28 //RX_FDEQ_BIN_14 +235 0x282C //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x4000 //RX_FDEQ_RESRV_0 +245 0x0320 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0035 //RX_FDDRC_BAND_MARGIN_1 +248 0x00D5 //RX_FDDRC_BAND_MARGIN_2 +249 0x0120 //RX_FDDRC_BAND_MARGIN_3 +250 0x0004 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x2000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x2000 //RX_FDDRC_THRD_3_2 +258 0x5000 //RX_FDDRC_THRD_3_3 +259 0x4000 //RX_FDDRC_SLANT_0_0 +260 0x4000 //RX_FDDRC_SLANT_0_1 +261 0x4000 //RX_FDDRC_SLANT_0_2 +262 0x4000 //RX_FDDRC_SLANT_0_3 +263 0x7FFF //RX_FDDRC_SLANT_1_0 +264 0x7FFF //RX_FDDRC_SLANT_1_1 +265 0x7FFF //RX_FDDRC_SLANT_1_2 +266 0x7FFF //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +286 0x0100 //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 + +#CASE_NAME HANDSFREE-HANDSFREE-CUSTOM2-SWB +#PARAM_MODE Full +#PARAM_TYPE TX+2RX +#TOTAL_CUSTOM_STEP 7+7 +#TX +0 0x0001 //TX_OPERATION_MODE_0 +1 0x0001 //TX_OPERATION_MODE_1 +2 0x0073 //TX_PATCH_REG +3 0x6B5C //TX_SENDFUNC_MODE_0 +4 0x0001 //TX_SENDFUNC_MODE_1 +5 0x0003 //TX_NUM_MIC +6 0x0003 //TX_SAMPLINGFREQ_SIG +7 0x0003 //TX_SAMPLINGFREQ_PROC +8 0x000A //TX_FRAME_SZ_SIG +9 0x000A //TX_FRAME_SZ +10 0x0000 //TX_DELAY_OPT +11 0x0028 //TX_MAX_TAIL_LENGTH +12 0x0001 //TX_NUM_LOUTCHN +13 0x0001 //TX_MAXNUM_AECREF +14 0x0000 //TX_DBG_FUNC_REG +15 0x0000 //TX_DBG_FUNC_REG1 +16 0x0000 //TX_SYS_RESRV_0 +17 0x0000 //TX_SYS_RESRV_1 +18 0x0000 //TX_SYS_RESRV_2 +19 0x0000 //TX_SYS_RESRV_3 +20 0x0000 //TX_DIST2REF0 +21 0x00A3 //TX_DIST2REF1 +22 0x001B //TX_DIST2REF_02 +23 0x0000 //TX_DIST2REF_03 +24 0x0000 //TX_DIST2REF_04 +25 0x0000 //TX_DIST2REF_05 +26 0x0000 //TX_MMIC +27 0x1000 //TX_PGA_0 +28 0x1000 //TX_PGA_1 +29 0x1000 //TX_PGA_2 +30 0x0000 //TX_PGA_3 +31 0x0000 //TX_PGA_4 +32 0x0000 //TX_PGA_5 +33 0x0001 //TX_MIC_PAIRS +34 0x0000 //TX_MIC_PAIRS_HS +35 0x0002 //TX_MICS_FOR_BF +36 0x0000 //TX_MIC_PAIRS_FORL1 +37 0x0002 //TX_MICS_OF_PAIR0 +38 0x0002 //TX_MICS_OF_PAIR1 +39 0x0002 //TX_MICS_OF_PAIR2 +40 0x0002 //TX_MICS_OF_PAIR3 +41 0x0000 //TX_MIC_DATA_SRC0 +42 0x0002 //TX_MIC_DATA_SRC1 +43 0x0001 //TX_MIC_DATA_SRC2 +44 0x0000 //TX_MIC_DATA_SRC3 +45 0x0000 //TX_MIC_PAIR_CH_04 +46 0x0000 //TX_MIC_PAIR_CH_05 +47 0x0000 //TX_MIC_PAIR_CH_10 +48 0x0000 //TX_MIC_PAIR_CH_11 +49 0x0000 //TX_MIC_PAIR_CH_12 +50 0x0000 //TX_MIC_PAIR_CH_13 +51 0x0000 //TX_MIC_PAIR_CH_14 +52 0x05DC //TX_HD_BIN_MASK +53 0x0010 //TX_HD_SUBAND_MASK +54 0x19A1 //TX_HD_FRAME_AVG_MASK +55 0x0320 //TX_HD_MIN_FRQ +56 0x1000 //TX_HD_ALPHA_PSD +57 0x1100 //TX_T_PHPR1 +58 0x0000 //TX_T_PHPR2 +59 0x0000 //TX_T_PTPR +60 0x0000 //TX_T_PNPR +61 0x0000 //TX_T_PAPR1 +62 0xEE6C //TX_T_PSDVAT +63 0x0800 //TX_CNT +64 0x4000 //TX_ANTI_HOWL_GAIN +65 0x0001 //TX_MICFORBFMARK_0 +66 0x0001 //TX_MICFORBFMARK_1 +67 0x0001 //TX_MICFORBFMARK_2 +68 0x0001 //TX_MICFORBFMARK_3 +69 0x0001 //TX_MICFORBFMARK_4 +70 0x0001 //TX_MICFORBFMARK_5 +71 0x0000 //TX_DIST2REF_10 +72 0x3B33 //TX_DIST2REF_11 +73 0x0A70 //TX_DIST2REF2 +74 0x0000 //TX_DIST2REF_13 +75 0x0000 //TX_DIST2REF_14 +76 0x0000 //TX_DIST2REF_15 +77 0x0000 //TX_DIST2REF_20 +78 0x0000 //TX_DIST2REF_21 +79 0x0000 //TX_DIST2REF_22 +80 0x0000 //TX_DIST2REF_23 +81 0x0000 //TX_DIST2REF_24 +82 0x0000 //TX_DIST2REF_25 +83 0x0000 //TX_DIST2REF_30 +84 0x0000 //TX_DIST2REF_31 +85 0x0000 //TX_DIST2REF_32 +86 0x0000 //TX_DIST2REF_33 +87 0x0000 //TX_DIST2REF_34 +88 0x0000 //TX_DIST2REF_35 +89 0x0000 //TX_MIC_LOC_00 +90 0x0000 //TX_MIC_LOC_01 +91 0x0000 //TX_MIC_LOC_02 +92 0x0000 //TX_MIC_LOC_03 +93 0x0000 //TX_MIC_LOC_04 +94 0x0000 //TX_MIC_LOC_05 +95 0x0000 //TX_MIC_LOC_10 +96 0x0000 //TX_MIC_LOC_11 +97 0x0000 //TX_MIC_LOC_12 +98 0x0000 //TX_MIC_LOC_13 +99 0x0000 //TX_MIC_LOC_14 +100 0x0000 //TX_MIC_LOC_15 +101 0x0000 //TX_MIC_LOC_20 +102 0x0000 //TX_MIC_LOC_21 +103 0x0000 //TX_MIC_LOC_22 +104 0x0000 //TX_MIC_LOC_23 +105 0x0000 //TX_MIC_LOC_24 +106 0x0000 //TX_MIC_LOC_25 +107 0x0800 //TX_MIC_REFBLK_VOLUME +108 0x0CAE //TX_MIC_BLOCK_VOLUME +109 0x0000 //TX_INVERSE_MASK +110 0x0000 //TX_ADCS_MASK +111 0x04D0 //TX_ADCS_GAIN +112 0x4000 //TX_NFC_GAINFAC +113 0x0000 //TX_MAINMIC_BLKFACTOR +114 0x0000 //TX_REFMIC_BLKFACTOR +115 0x0000 //TX_BLMIC_BLKFACTOR +116 0x0000 //TX_BRMIC_BLKFACTOR +117 0x0031 //TX_MICBLK_START_BIN +118 0x0060 //TX_MICBLK_END_BIN +119 0x0015 //TX_MICBLK_FE_HOLD +120 0xFFF2 //TX_MICBLK_MR_EXP_TH +121 0xFFF2 //TX_MICBLK_LR_EXP_TH +122 0x0015 //TX_FENE_HOLD +123 0x4000 //TX_FE_ENER_TH_MTS +124 0x0004 //TX_FE_ENER_TH_EXP +125 0x6000 //TX_C_POST_FLT_MIC_MAINBLK +126 0x6000 //TX_C_POST_FLT_MIC_REFBLK +127 0x0010 //TX_MIC_BLOCK_N +128 0x7B02 //TX_A_HP +129 0x4000 //TX_B_PE +130 0x5000 //TX_THR_PITCH_DET_0 +131 0x4800 //TX_THR_PITCH_DET_1 +132 0x4000 //TX_THR_PITCH_DET_2 +133 0x0008 //TX_PITCH_BFR_LEN +134 0x0003 //TX_SBD_PITCH_DET +135 0x0050 //TX_TD_AEC_L +136 0x4000 //TX_MU0_UNP_TD_AEC +137 0x1000 //TX_MU0_PTD_TD_AEC +138 0x0000 //TX_PP_RESRV_0 +139 0x2A94 //TX_PP_RESRV_1 +140 0x55F0 //TX_PP_RESRV_2 +141 0x0000 //TX_PP_RESRV_3 +142 0x0000 //TX_PP_RESRV_4 +143 0x0000 //TX_PP_RESRV_5 +144 0x0000 //TX_PP_RESRV_6 +145 0x0000 //TX_PP_RESRV_7 +146 0x0028 //TX_TAIL_LENGTH +147 0x0400 //TX_AEC_REF_GAIN_0 +148 0x0800 //TX_AEC_REF_GAIN_1 +149 0x0800 //TX_AEC_REF_GAIN_2 +150 0x7600 //TX_EAD_THR +151 0x1000 //TX_THR_RE_EST +152 0x2000 //TX_MIN_EQ_RE_EST_0 +153 0x0600 //TX_MIN_EQ_RE_EST_1 +154 0x3000 //TX_MIN_EQ_RE_EST_2 +155 0x3000 //TX_MIN_EQ_RE_EST_3 +156 0x3000 //TX_MIN_EQ_RE_EST_4 +157 0x3000 //TX_MIN_EQ_RE_EST_5 +158 0x3000 //TX_MIN_EQ_RE_EST_6 +159 0x1000 //TX_MIN_EQ_RE_EST_7 +160 0x7800 //TX_MIN_EQ_RE_EST_8 +161 0x7800 //TX_MIN_EQ_RE_EST_9 +162 0x7800 //TX_MIN_EQ_RE_EST_10 +163 0x7800 //TX_MIN_EQ_RE_EST_11 +164 0x7800 //TX_MIN_EQ_RE_EST_12 +165 0x3000 //TX_LAMBDA_RE_EST +166 0x3000 //TX_LAMBDA_CB_NLE +167 0x7FFF //TX_C_POST_FLT +168 0x4000 //TX_GAIN_NP +169 0x0180 //TX_SE_HOLD_N +170 0x00C8 //TX_DT_HOLD_N +171 0x0880 //TX_DT2_HOLD_N +172 0x6666 //TX_AEC_RESRV_0 +173 0x0000 //TX_AEC_RESRV_1 +174 0x0014 //TX_AEC_RESRV_2 +175 0x0000 //TX_MIC_DELAY_LENGTH +176 0x0000 //TX_REF_DELAY_LENGTH +177 0x0000 //TX_ADD_LINEIN_GAINL +178 0x0000 //TX_ADD_LINEIN_GAINH +179 0x0000 //TX_MIN_EQ_RE_EST_14 +180 0x0000 //TX_DTD_THR1_8 +181 0x7FFF //TX_DTD_THR2_8 +182 0x0000 //TX_DTD_MIC_BLK2 +183 0x0008 //TX_FRQ_LIN_LEN +184 0x7FFF //TX_FRQ_AEC_LEN_RHO +185 0x6000 //TX_MU0_UNP_FRQ_AEC +186 0x4000 //TX_MU0_PTD_FRQ_AEC +187 0x000A //TX_MINENOISETH +188 0x0800 //TX_MU0_RE_EST +189 0x0001 //TX_AEC_NUM_CH +190 0x0000 //TX_BIGECHOATTENUATION_MAX +191 0x2000 //TX_A_POST_FLT_MICBLK +192 0x0000 //TX_BLKENERTH +193 0x0000 //TX_BLKENERHIGHTH +194 0x0000 //TX_NORMENERTH +195 0x0000 //TX_NORMENERHIGHTH +196 0x0000 //TX_NORMENERHIGHTHL +197 0x7148 //TX_DTD_THR1_0 +198 0x7148 //TX_DTD_THR1_1 +199 0x7148 //TX_DTD_THR1_2 +200 0x7148 //TX_DTD_THR1_3 +201 0x7148 //TX_DTD_THR1_4 +202 0x7700 //TX_DTD_THR1_5 +203 0x7148 //TX_DTD_THR1_6 +204 0x7E00 //TX_DTD_THR2_0 +205 0x7E00 //TX_DTD_THR2_1 +206 0x5000 //TX_DTD_THR2_2 +207 0x5000 //TX_DTD_THR2_3 +208 0x5000 //TX_DTD_THR2_4 +209 0x5000 //TX_DTD_THR2_5 +210 0x5000 //TX_DTD_THR2_6 +211 0x7FFF //TX_DTD_THR3 +212 0x0000 //TX_SPK_CUT_K +213 0x36B0 //TX_DT_CUT_K +214 0x0100 //TX_DT_CUT_THR +215 0x04EB //TX_COMFORT_G +216 0x01F4 //TX_POWER_YOUT_TH +217 0x4000 //TX_FDPFGAINECHO +218 0x0000 //TX_DTD_HD_THR +219 0x0000 //TX_SPK_CUT_K_S +220 0x7FFF //TX_DTD_MIC_BLK +221 0x023E //TX_ADPT_STRICT_L +222 0x023E //TX_ADPT_STRICT_H +223 0x0001 //TX_RATIO_DT_L_TH_LOW +224 0x3A98 //TX_RATIO_DT_H_TH_LOW +225 0x07D0 //TX_RATIO_DT_L_TH_HIGH +226 0x59D8 //TX_RATIO_DT_H_TH_HIGH +227 0x0001 //TX_RATIO_DT_L0_TH +228 0x7FFF //TX_B_POST_FILT_ECHO_L +229 0x7FFF //TX_B_POST_FILT_ECHO_H +230 0x0200 //TX_MIN_G_CTRL_ECHO +231 0x1000 //TX_B_LESSCUT_RTO_ECHO +232 0x0000 //TX_EPD_OFFSET_00 +233 0x0000 //TX_EPD_OFFST_01 +234 0x02BC //TX_RATIO_DT_L0_TH_HIGH +235 0x7FFF //TX_RATIO_DT_H_TH_CUT +236 0x7FFF //TX_MIN_EQ_RE_EST_13 +237 0x0000 //TX_DTD_THR1_7 +238 0x0000 //TX_DTD_THR2_7 +239 0x0800 //TX_DT_RESRV_7 +240 0x0800 //TX_DT_RESRV_8 +241 0x0000 //TX_DT_RESRV_9 +242 0xF800 //TX_THR_SN_EST_0 +243 0xFA00 //TX_THR_SN_EST_1 +244 0xFA00 //TX_THR_SN_EST_2 +245 0xFA00 //TX_THR_SN_EST_3 +246 0xF800 //TX_THR_SN_EST_4 +247 0xFA00 //TX_THR_SN_EST_5 +248 0xF800 //TX_THR_SN_EST_6 +249 0xF800 //TX_THR_SN_EST_7 +250 0x0100 //TX_DELTA_THR_SN_EST_0 +251 0x0100 //TX_DELTA_THR_SN_EST_1 +252 0x0100 //TX_DELTA_THR_SN_EST_2 +253 0x0000 //TX_DELTA_THR_SN_EST_3 +254 0x0100 //TX_DELTA_THR_SN_EST_4 +255 0x0200 //TX_DELTA_THR_SN_EST_5 +256 0x0100 //TX_DELTA_THR_SN_EST_6 +257 0x0200 //TX_DELTA_THR_SN_EST_7 +258 0x4000 //TX_LAMBDA_NN_EST_0 +259 0x4000 //TX_LAMBDA_NN_EST_1 +260 0x4000 //TX_LAMBDA_NN_EST_2 +261 0x4000 //TX_LAMBDA_NN_EST_3 +262 0x4000 //TX_LAMBDA_NN_EST_4 +263 0x4000 //TX_LAMBDA_NN_EST_5 +264 0x4000 //TX_LAMBDA_NN_EST_6 +265 0x4000 //TX_LAMBDA_NN_EST_7 +266 0x0400 //TX_N_SN_EST +267 0x001E //TX_INBEAM_T +268 0x0041 //TX_INBEAMHOLDT +269 0x2000 //TX_G_STRICT +270 0x2000 //TX_EQ_THR_BF +271 0x799A //TX_LAMBDA_EQ_BF +272 0x1000 //TX_NE_RTO_TH +273 0x0400 //TX_NE_RTO_TH_L +274 0x0800 //TX_MAINREFRTOH_TH_H +275 0x0800 //TX_MAINREFRTOH_TH_L +276 0x0800 //TX_MAINREFRTO_TH_H +277 0x0800 //TX_MAINREFRTO_TH_L +278 0x0200 //TX_MAINREFRTO_TH_EQ +279 0x2000 //TX_B_POST_FLT_0 +280 0x1000 //TX_B_POST_FLT_1 +281 0x0010 //TX_NS_LVL_CTRL_0 +282 0x003C //TX_NS_LVL_CTRL_1 +283 0x0024 //TX_NS_LVL_CTRL_2 +284 0x003C //TX_NS_LVL_CTRL_3 +285 0x0014 //TX_NS_LVL_CTRL_4 +286 0x0011 //TX_NS_LVL_CTRL_5 +287 0x003C //TX_NS_LVL_CTRL_6 +288 0x0011 //TX_NS_LVL_CTRL_7 +289 0x0020 //TX_MIN_GAIN_S_0 +290 0x0020 //TX_MIN_GAIN_S_1 +291 0x0020 //TX_MIN_GAIN_S_2 +292 0x0020 //TX_MIN_GAIN_S_3 +293 0x0020 //TX_MIN_GAIN_S_4 +294 0x0020 //TX_MIN_GAIN_S_5 +295 0x0020 //TX_MIN_GAIN_S_6 +296 0x0020 //TX_MIN_GAIN_S_7 +297 0x6000 //TX_NMOS_SUP +298 0x0000 //TX_NS_MAX_PRI_SNR_TH +299 0x0000 //TX_NMOS_SUP_MENSA +300 0x7FFF //TX_SNRI_SUP_0 +301 0x4000 //TX_SNRI_SUP_1 +302 0x4000 //TX_SNRI_SUP_2 +303 0x4000 //TX_SNRI_SUP_3 +304 0x4000 //TX_SNRI_SUP_4 +305 0x4000 //TX_SNRI_SUP_5 +306 0x4000 //TX_SNRI_SUP_6 +307 0x4000 //TX_SNRI_SUP_7 +308 0x7FFF //TX_THR_LFNS +309 0x0018 //TX_G_LFNS +310 0x09C4 //TX_GAIN0_NTH +311 0x000A //TX_MUSIC_MORENS +312 0x7FFF //TX_A_POST_FILT_0 +313 0x2000 //TX_A_POST_FILT_1 +314 0x7FFF //TX_A_POST_FILT_S_0 +315 0x7FFF //TX_A_POST_FILT_S_1 +316 0x7FFF //TX_A_POST_FILT_S_2 +317 0x7FFF //TX_A_POST_FILT_S_3 +318 0x7FFF //TX_A_POST_FILT_S_4 +319 0x7FFF //TX_A_POST_FILT_S_5 +320 0x7FFF //TX_A_POST_FILT_S_6 +321 0x7FFF //TX_A_POST_FILT_S_7 +322 0x2000 //TX_B_POST_FILT_0 +323 0x6000 //TX_B_POST_FILT_1 +324 0x6000 //TX_B_POST_FILT_2 +325 0x6000 //TX_B_POST_FILT_3 +326 0x4000 //TX_B_POST_FILT_4 +327 0x1000 //TX_B_POST_FILT_5 +328 0x1000 //TX_B_POST_FILT_6 +329 0x2000 //TX_B_POST_FILT_7 +330 0x4000 //TX_B_LESSCUT_RTO_S_0 +331 0x7FFF //TX_B_LESSCUT_RTO_S_1 +332 0x7FFF //TX_B_LESSCUT_RTO_S_2 +333 0x7FFF //TX_B_LESSCUT_RTO_S_3 +334 0x7FFF //TX_B_LESSCUT_RTO_S_4 +335 0x6000 //TX_B_LESSCUT_RTO_S_5 +336 0x7FFF //TX_B_LESSCUT_RTO_S_6 +337 0x7FFF //TX_B_LESSCUT_RTO_S_7 +338 0x7F00 //TX_LAMBDA_PFILT +339 0x7F00 //TX_LAMBDA_PFILT_S_0 +340 0x7F00 //TX_LAMBDA_PFILT_S_1 +341 0x7F00 //TX_LAMBDA_PFILT_S_2 +342 0x7F00 //TX_LAMBDA_PFILT_S_3 +343 0x7F00 //TX_LAMBDA_PFILT_S_4 +344 0x7F00 //TX_LAMBDA_PFILT_S_5 +345 0x7F00 //TX_LAMBDA_PFILT_S_6 +346 0x7F00 //TX_LAMBDA_PFILT_S_7 +347 0x0200 //TX_K_PEPPER +348 0x0400 //TX_A_PEPPER +349 0x1EAA //TX_K_PEPPER_HF +350 0x0600 //TX_A_PEPPER_HF +351 0x0001 //TX_HMNC_BST_FLG +352 0x0200 //TX_HMNC_BST_THR +353 0x0040 //TX_DT_BINVAD_TH_0 +354 0x0040 //TX_DT_BINVAD_TH_1 +355 0x0100 //TX_DT_BINVAD_TH_2 +356 0x0100 //TX_DT_BINVAD_TH_3 +357 0x36B0 //TX_DT_BINVAD_ENDF +358 0x0200 //TX_C_POST_FLT_DT +359 0x0CCD //TX_NS_B_POST_FLT_LESSCUT +360 0x0140 //TX_DT_BOOST +361 0x0000 //TX_BF_SGRAD_FLG +362 0x0005 //TX_BF_DVG_TH +363 0x001E //TX_SN_C_F +364 0x0000 //TX_K_APT +365 0x0001 //TX_NOISEDET +366 0x0064 //TX_NDETCT +367 0x0050 //TX_NOISE_TH_0 +368 0x7FFF //TX_NOISE_TH_0_2 +369 0x7FFF //TX_NOISE_TH_0_3 +370 0x07D0 //TX_NOISE_TH_1 +371 0x01F4 //TX_NOISE_TH_2 +372 0x36B0 //TX_NOISE_TH_3 +373 0x2710 //TX_NOISE_TH_4 +374 0x2CEC //TX_NOISE_TH_5 +375 0x7FFF //TX_NOISE_TH_5_2 +376 0x0000 //TX_NOISE_TH_5_3 +377 0x7FFF //TX_NOISE_TH_5_4 +378 0x0DAC //TX_NOISE_TH_6 +379 0x0050 //TX_MINENOISE_TH +380 0xD508 //TX_MORENS_TFMASK_TH +381 0x0001 //TX_DRC_QUIET_FLOOR +382 0x3A98 //TX_RATIODTL_CUT_TH +383 0x07D0 //TX_DT_CUT_K1 +384 0x0666 //TX_OUT_ENER_S_TH_CLEAN +385 0x0666 //TX_OUT_ENER_S_TH_LESSCLEAN +386 0x0333 //TX_OUT_ENER_S_TH_NOISY +387 0x019A //TX_OUT_ENER_TH_NOISE +388 0x0333 //TX_OUT_ENER_TH_SPEECH +389 0x2000 //TX_SN_NPB_GAIN +390 0x0000 //TX_NN_NPB_GAIN +391 0x7FFF //TX_POST_MASK_SUP_HSNE +392 0x1388 //TX_TAIL_DET_TH +393 0x4000 //TX_B_LESSCUT_RTO_WTA +394 0x0000 //TX_MEL_G_R +395 0x0080 //TX_SUPHIGH_TH +396 0x0000 //TX_MASK_G_R +397 0x0002 //TX_EXTRA_NS_L +398 0x1800 //TX_C_POST_FLT_MASK +399 0x7FFF //TX_A_POST_FLT_WNS +400 0x0148 //TX_MIN_G_LOW300HZ +401 0x0001 //TX_MAXLEVEL_CNG +402 0x00B4 //TX_STN_NOISE_TH +403 0x4000 //TX_POST_MASK_SUP +404 0x7FFF //TX_POST_MASK_ADJUST +405 0x00C8 //TX_NS_ENOISE_MIC0_TH +406 0x0050 //TX_MINENOISE_MIC0_TH +407 0x012C //TX_MINENOISE_MIC0_S_TH +408 0x4000 //TX_MIN_G_CTRL_SSNS +409 0x0000 //TX_METAL_RTO_THR +410 0x4848 //TX_NS_FP_K_METAL +411 0x3A98 //TX_NOISEDET_BOOST_TH +412 0x0FA0 //TX_NSMOOTH_TH +413 0x0000 //TX_NS_RESRV_8 +414 0x1800 //TX_RHO_UPB +415 0x0BB8 //TX_N_HOLD_HS +416 0x0050 //TX_N_RHO_BFR0 +417 0x7FFF //TX_LAMBDA_ARSP_EST +418 0x0100 //TX_EXTRA_GAIN_MICBLOCK +419 0x0CCD //TX_THR_STD_NSR +420 0x019A //TX_THR_STD_PLH +421 0x2AF8 //TX_N_HOLD_STD +422 0x0066 //TX_THR_STD_RHO +423 0x2000 //TX_BF_RESET_THR_HS +424 0x09C4 //TX_SB_RTO_MEAN_TH +425 0x0000 //TX_SB_RHO_MEAN_TH_NTALK +426 0x3800 //TX_SB_RTO_MEAN_TH_ABN +427 0x2EE0 //TX_SB_RTO_MEAN_TH_RUB +428 0x0000 //TX_WTA_EN_RTO_TH +429 0x0000 //TX_TOP_ENER_TH_F +430 0x0000 //TX_DESIRED_TALK_HOLDT +431 0x0800 //TX_MIC_BLOCK_FACTOR +432 0x0000 //TX_NSEST_BFRLRNRDC +433 0x0000 //TX_THR_POST_FLT_HS +434 0x0010 //TX_HS_VAD_BIN +435 0x2666 //TX_THR_VAD_HS +436 0x2CCD //TX_MEAN_RTO_MIN_TH2 +437 0x0032 //TX_SILENCE_T +438 0x0000 //TX_A_POST_FLT_WTA +439 0x799A //TX_LAMBDA_PFLT_WTA +440 0x0000 //TX_SB_RHO_MEAN2_TH +441 0x0190 //TX_SB_RHO_MEAN3_TH +442 0x0000 //TX_HS_RESRV_4 +443 0x0000 //TX_HS_RESRV_5 +444 0x003C //TX_DOA_VAD_THR_1 +445 0x0000 //TX_DOA_VAD_THR_2 +446 0x0028 //TX_DOA_VAD_THR1_0 +447 0x0028 //TX_DOA_VAD_THR1_1 +448 0x0000 //TX_SRC_DOA_RNG_LOW_0A +449 0x00B4 //TX_SRC_DOA_RNG_HIGH_0A +450 0x005A //TX_DFLT_SRC_DOA_0A +451 0x0000 //TX_SRC_DOA_RNG_LOW_0B +452 0x0000 //TX_SRC_DOA_RNG_HIGH_0B +453 0x0000 //TX_DFLT_SRC_DOA_0B +454 0x0000 //TX_SRC_DOA_RNG_LOW_0C +455 0x0000 //TX_SRC_DOA_RNG_HIGH_0C +456 0x0000 //TX_DFLT_SRC_DOA_0C +457 0x0000 //TX_SRC_DOA_RNG_LOW_0D +458 0x0000 //TX_SRC_DOA_RNG_HIGH_0D +459 0x0000 //TX_DFLT_SRC_DOA_0D +460 0x0000 //TX_SRC_DOA_RNG_LOW_1A +461 0x00B4 //TX_SRC_DOA_RNG_HIGH_1A +462 0x005A //TX_DFLT_SRC_DOA_1A +463 0x0000 //TX_SRC_DOA_RNG_LOW_1B +464 0x00B4 //TX_SRC_DOA_RNG_HIGH_1B +465 0x005A //TX_DFLT_SRC_DOA_1B +466 0x0000 //TX_SRC_DOA_RNG_LOW_1C +467 0x00B4 //TX_SRC_DOA_RNG_HIGH_1C +468 0x005A //TX_DFLT_SRC_DOA_1C +469 0x0000 //TX_SRC_DOA_RNG_LOW_1D +470 0x00B4 //TX_SRC_DOA_RNG_HIGH_1D +471 0x005A //TX_DFLT_SRC_DOA_1D +472 0x0100 //TX_BF_HOLDOFF_T +473 0x7FFF //TX_DOA_COST_FACTOR +474 0x4000 //TX_MAINTOREFR_TH0 +475 0x071C //TX_DOA_TRK_THR +476 0x012C //TX_DOA_TRACK_HT +477 0x0200 //TX_N1_HOLD_HF +478 0x0100 //TX_N2_HOLD_HF +479 0x3000 //TX_BF_RESET_THR_HF +480 0x7333 //TX_DOA_SMOOTH +481 0x0800 //TX_MU_BF +482 0x0800 //TX_BF_MU_LF_B2 +483 0x0040 //TX_BF_FC_END_BIN_B2 +484 0x0020 //TX_BF_FC_END_BIN +485 0x0000 //TX_HF_RESRV_25 +486 0x0000 //TX_HF_RESRV_26 +487 0x0007 //TX_N_DOA_SEED +488 0x0001 //TX_FINE_DOA_SEARCH_FLG +489 0x0000 //TX_HF_RESRV_27 +490 0x038E //TX_DLT_SRC_DOA_RNG +491 0x0200 //TX_BF_MU_LF +492 0x0000 //TX_DFLT_SRC_LOC_0 +493 0x7FFF //TX_DFLT_SRC_LOC_1 +494 0x0000 //TX_DFLT_SRC_LOC_2 +495 0x038E //TX_DOA_TRACK_VADTH +496 0x0000 //TX_DOA_TRACK_NEW +497 0x0230 //TX_NOR_OFF_THR +498 0x0CCD //TX_MORE_ON_700HZ_THR +499 0x0000 //TX_MU_BF_ADPT_NS +500 0x0000 //TX_ADAPT_LEN +501 0x2000 //TX_MORE_SNS +502 0x0000 //TX_NOR_OFF_TH1 +503 0x0000 //TX_WIDE_MASK_TH +504 0x4650 //TX_SUBSNRATIOHIGH4MEANBCK_THR +505 0x4000 //TX_C_POST_FLT_CUT +506 0x2000 //TX_RADIODTLV +507 0x0320 //TX_POWER_LINEIN_TH +508 0x0014 //TX_FE_VADCOUNT_TH_FC +509 0x000A //TX_ECHO_SUPP_FC +510 0x0C80 //TX_ECHO_TH +511 0x6666 //TX_MIC_TO_BFGAIN +512 0x0000 //TX_MICTOBFGAIN0 +513 0x0000 //TX_FASTMUE_TH +514 0x3000 //TX_DEREVERB_LF_MU +515 0x34CD //TX_DEREVERB_HF_MU +516 0x0007 //TX_DEREVERB_DELAY +517 0x0004 //TX_DEREVERB_COEF_LEN +518 0x0003 //TX_DEREVERB_DNR +519 0x0000 //TX_DEREVERB_ALPHA +520 0x0000 //TX_DEREVERB_BETA +521 0x3A98 //TX_GSC_RTOL_TH +522 0x3A98 //TX_GSC_RTOH_TH +523 0x7E2C //TX_WIDE2_MEANHTH +524 0x0000 //TX_DR_RESRV_5 +525 0x0000 //TX_DR_RESRV_6 +526 0x0000 //TX_DR_RESRV_7 +527 0x0000 //TX_DR_RESRV_8 +528 0x1333 //TX_WIND_MARK_TH +529 0x399A //TX_CORR_THR +530 0x0004 //TX_SNR_THR +531 0x0010 //TX_ENGY_THR +532 0x1770 //TX_CORR_HIGH_TH +533 0x6000 //TX_ENGY_THR_2 +534 0x3400 //TX_MEAN_RTO_THR +535 0x0028 //TX_WNS_ENOISE_MIC0_TH +536 0x3000 //TX_RATIOMICL_TH +537 0x64CD //TX_CALIG_HS +538 0x0000 //TX_LVL_CTRL +539 0x0014 //TX_WIND_SUPRTO +540 0x000A //TX_WNS_MIN_G +541 0x0000 //TX_WNS_B_POST_FLT +542 0x2800 //TX_RATIOMICH_TH +543 0xD120 //TX_WIND_INBEAM_L_TH +544 0x0FA0 //TX_WIND_INBEAM_H_TH +545 0x2000 //TX_WNS_RESRV_0 +546 0x59D8 //TX_WNS_RESRV_1 +547 0x0000 //TX_WNS_RESRV_2 +548 0x0000 //TX_WNS_RESRV_3 +549 0x0000 //TX_WNS_RESRV_4 +550 0x0000 //TX_WNS_RESRV_5 +551 0x0000 //TX_WNS_RESRV_6 +552 0x0000 //TX_PB_B_POST_FLT_LESSCUT +553 0x0070 //TX_BF_LESSCUT_BBIN +554 0x0070 //TX_BF_LESSCUT_EBIN +555 0x0010 //TX_POSTBFB0 +556 0x0070 //TX_POSTBFB +557 0x00B0 //TX_POSTBFE +558 0x0E66 //TX_SPEECH_SNR_TH +559 0x0050 //TX_PB_MAX_PRI_SNR_TH +560 0x770A //TX_MAX_PRI_SNR_TH_L +561 0x0000 //TX_PFGAIN +562 0x0000 //TX_MAINTOREFR_TH +563 0x0000 //TX_SAM_MARK +564 0x0000 //TX_PB_RESRV_0 +565 0x0000 //TX_PB_RESRV_1 +566 0x0020 //TX_FDEQ_SUBNUM +567 0x4848 //TX_FDEQ_GAIN_0 +568 0x4848 //TX_FDEQ_GAIN_1 +569 0x4850 //TX_FDEQ_GAIN_2 +570 0x5050 //TX_FDEQ_GAIN_3 +571 0x4848 //TX_FDEQ_GAIN_4 +572 0x4850 //TX_FDEQ_GAIN_5 +573 0x5261 //TX_FDEQ_GAIN_6 +574 0x5C4C //TX_FDEQ_GAIN_7 +575 0x4C4E //TX_FDEQ_GAIN_8 +576 0x4848 //TX_FDEQ_GAIN_9 +577 0x4C4F //TX_FDEQ_GAIN_10 +578 0x5153 //TX_FDEQ_GAIN_11 +579 0x6265 //TX_FDEQ_GAIN_12 +580 0x638B //TX_FDEQ_GAIN_13 +581 0x8480 //TX_FDEQ_GAIN_14 +582 0x7A7C //TX_FDEQ_GAIN_15 +583 0x4848 //TX_FDEQ_GAIN_16 +584 0x4848 //TX_FDEQ_GAIN_17 +585 0x4848 //TX_FDEQ_GAIN_18 +586 0x4848 //TX_FDEQ_GAIN_19 +587 0x4848 //TX_FDEQ_GAIN_20 +588 0x4848 //TX_FDEQ_GAIN_21 +589 0x4848 //TX_FDEQ_GAIN_22 +590 0x4848 //TX_FDEQ_GAIN_23 +591 0x0202 //TX_FDEQ_BIN_0 +592 0x0203 //TX_FDEQ_BIN_1 +593 0x0303 //TX_FDEQ_BIN_2 +594 0x0304 //TX_FDEQ_BIN_3 +595 0x0405 //TX_FDEQ_BIN_4 +596 0x0506 //TX_FDEQ_BIN_5 +597 0x0708 //TX_FDEQ_BIN_6 +598 0x090A //TX_FDEQ_BIN_7 +599 0x0B0C //TX_FDEQ_BIN_8 +600 0x0D0E //TX_FDEQ_BIN_9 +601 0x1013 //TX_FDEQ_BIN_10 +602 0x1719 //TX_FDEQ_BIN_11 +603 0x1B1E //TX_FDEQ_BIN_12 +604 0x1E1E //TX_FDEQ_BIN_13 +605 0x1E28 //TX_FDEQ_BIN_14 +606 0x284A //TX_FDEQ_BIN_15 +607 0x0000 //TX_FDEQ_BIN_16 +608 0x0000 //TX_FDEQ_BIN_17 +609 0x0000 //TX_FDEQ_BIN_18 +610 0x0000 //TX_FDEQ_BIN_19 +611 0x0000 //TX_FDEQ_BIN_20 +612 0x0000 //TX_FDEQ_BIN_21 +613 0x0000 //TX_FDEQ_BIN_22 +614 0x0000 //TX_FDEQ_BIN_23 +615 0x0000 //TX_FDEQ_PADDING +616 0x0020 //TX_PREEQ_SUBNUM_MIC0 +617 0x4848 //TX_PREEQ_GAIN_MIC0_0 +618 0x4848 //TX_PREEQ_GAIN_MIC0_1 +619 0x4848 //TX_PREEQ_GAIN_MIC0_2 +620 0x4848 //TX_PREEQ_GAIN_MIC0_3 +621 0x4848 //TX_PREEQ_GAIN_MIC0_4 +622 0x4848 //TX_PREEQ_GAIN_MIC0_5 +623 0x4848 //TX_PREEQ_GAIN_MIC0_6 +624 0x4848 //TX_PREEQ_GAIN_MIC0_7 +625 0x4848 //TX_PREEQ_GAIN_MIC0_8 +626 0x4848 //TX_PREEQ_GAIN_MIC0_9 +627 0x4848 //TX_PREEQ_GAIN_MIC0_10 +628 0x4848 //TX_PREEQ_GAIN_MIC0_11 +629 0x4848 //TX_PREEQ_GAIN_MIC0_12 +630 0x4848 //TX_PREEQ_GAIN_MIC0_13 +631 0x4848 //TX_PREEQ_GAIN_MIC0_14 +632 0x4848 //TX_PREEQ_GAIN_MIC0_15 +633 0x4848 //TX_PREEQ_GAIN_MIC0_16 +634 0x4848 //TX_PREEQ_GAIN_MIC0_17 +635 0x4848 //TX_PREEQ_GAIN_MIC0_18 +636 0x4848 //TX_PREEQ_GAIN_MIC0_19 +637 0x4848 //TX_PREEQ_GAIN_MIC0_20 +638 0x4848 //TX_PREEQ_GAIN_MIC0_21 +639 0x4848 //TX_PREEQ_GAIN_MIC0_22 +640 0x4848 //TX_PREEQ_GAIN_MIC0_23 +641 0x0202 //TX_PREEQ_BIN_MIC0_0 +642 0x0203 //TX_PREEQ_BIN_MIC0_1 +643 0x0303 //TX_PREEQ_BIN_MIC0_2 +644 0x0304 //TX_PREEQ_BIN_MIC0_3 +645 0x0405 //TX_PREEQ_BIN_MIC0_4 +646 0x0506 //TX_PREEQ_BIN_MIC0_5 +647 0x0708 //TX_PREEQ_BIN_MIC0_6 +648 0x090A //TX_PREEQ_BIN_MIC0_7 +649 0x0B0C //TX_PREEQ_BIN_MIC0_8 +650 0x0D0E //TX_PREEQ_BIN_MIC0_9 +651 0x1013 //TX_PREEQ_BIN_MIC0_10 +652 0x1719 //TX_PREEQ_BIN_MIC0_11 +653 0x1B1E //TX_PREEQ_BIN_MIC0_12 +654 0x1E1E //TX_PREEQ_BIN_MIC0_13 +655 0x1E28 //TX_PREEQ_BIN_MIC0_14 +656 0x3042 //TX_PREEQ_BIN_MIC0_15 +657 0x0000 //TX_PREEQ_BIN_MIC0_16 +658 0x0000 //TX_PREEQ_BIN_MIC0_17 +659 0x0000 //TX_PREEQ_BIN_MIC0_18 +660 0x0000 //TX_PREEQ_BIN_MIC0_19 +661 0x0000 //TX_PREEQ_BIN_MIC0_20 +662 0x0000 //TX_PREEQ_BIN_MIC0_21 +663 0x0000 //TX_PREEQ_BIN_MIC0_22 +664 0x0000 //TX_PREEQ_BIN_MIC0_23 +665 0x0020 //TX_PREEQ_SUBNUM_MIC1 +666 0x4848 //TX_PREEQ_GAIN_MIC1_0 +667 0x4848 //TX_PREEQ_GAIN_MIC1_1 +668 0x4848 //TX_PREEQ_GAIN_MIC1_2 +669 0x4848 //TX_PREEQ_GAIN_MIC1_3 +670 0x4848 //TX_PREEQ_GAIN_MIC1_4 +671 0x4848 //TX_PREEQ_GAIN_MIC1_5 +672 0x494A //TX_PREEQ_GAIN_MIC1_6 +673 0x4B4C //TX_PREEQ_GAIN_MIC1_7 +674 0x4D4E //TX_PREEQ_GAIN_MIC1_8 +675 0x4F52 //TX_PREEQ_GAIN_MIC1_9 +676 0x5355 //TX_PREEQ_GAIN_MIC1_10 +677 0x585C //TX_PREEQ_GAIN_MIC1_11 +678 0x616A //TX_PREEQ_GAIN_MIC1_12 +679 0x726E //TX_PREEQ_GAIN_MIC1_13 +680 0x5C48 //TX_PREEQ_GAIN_MIC1_14 +681 0x3B38 //TX_PREEQ_GAIN_MIC1_15 +682 0x4848 //TX_PREEQ_GAIN_MIC1_16 +683 0x4848 //TX_PREEQ_GAIN_MIC1_17 +684 0x4848 //TX_PREEQ_GAIN_MIC1_18 +685 0x4848 //TX_PREEQ_GAIN_MIC1_19 +686 0x4848 //TX_PREEQ_GAIN_MIC1_20 +687 0x4848 //TX_PREEQ_GAIN_MIC1_21 +688 0x4848 //TX_PREEQ_GAIN_MIC1_22 +689 0x4848 //TX_PREEQ_GAIN_MIC1_23 +690 0x0202 //TX_PREEQ_BIN_MIC1_0 +691 0x0203 //TX_PREEQ_BIN_MIC1_1 +692 0x0303 //TX_PREEQ_BIN_MIC1_2 +693 0x0304 //TX_PREEQ_BIN_MIC1_3 +694 0x0405 //TX_PREEQ_BIN_MIC1_4 +695 0x0506 //TX_PREEQ_BIN_MIC1_5 +696 0x0708 //TX_PREEQ_BIN_MIC1_6 +697 0x090A //TX_PREEQ_BIN_MIC1_7 +698 0x0B0C //TX_PREEQ_BIN_MIC1_8 +699 0x0D0E //TX_PREEQ_BIN_MIC1_9 +700 0x1013 //TX_PREEQ_BIN_MIC1_10 +701 0x1719 //TX_PREEQ_BIN_MIC1_11 +702 0x1B1E //TX_PREEQ_BIN_MIC1_12 +703 0x1E1E //TX_PREEQ_BIN_MIC1_13 +704 0x1E28 //TX_PREEQ_BIN_MIC1_14 +705 0x3042 //TX_PREEQ_BIN_MIC1_15 +706 0x0000 //TX_PREEQ_BIN_MIC1_16 +707 0x0000 //TX_PREEQ_BIN_MIC1_17 +708 0x0000 //TX_PREEQ_BIN_MIC1_18 +709 0x0000 //TX_PREEQ_BIN_MIC1_19 +710 0x0000 //TX_PREEQ_BIN_MIC1_20 +711 0x0000 //TX_PREEQ_BIN_MIC1_21 +712 0x0000 //TX_PREEQ_BIN_MIC1_22 +713 0x0000 //TX_PREEQ_BIN_MIC1_23 +714 0x0020 //TX_PREEQ_SUBNUM_MIC2 +715 0x4848 //TX_PREEQ_GAIN_MIC2_0 +716 0x4848 //TX_PREEQ_GAIN_MIC2_1 +717 0x4848 //TX_PREEQ_GAIN_MIC2_2 +718 0x4848 //TX_PREEQ_GAIN_MIC2_3 +719 0x4848 //TX_PREEQ_GAIN_MIC2_4 +720 0x4848 //TX_PREEQ_GAIN_MIC2_5 +721 0x4849 //TX_PREEQ_GAIN_MIC2_6 +722 0x4A4A //TX_PREEQ_GAIN_MIC2_7 +723 0x4B4B //TX_PREEQ_GAIN_MIC2_8 +724 0x4C4D //TX_PREEQ_GAIN_MIC2_9 +725 0x4D4E //TX_PREEQ_GAIN_MIC2_10 +726 0x4F4F //TX_PREEQ_GAIN_MIC2_11 +727 0x504F //TX_PREEQ_GAIN_MIC2_12 +728 0x4C49 //TX_PREEQ_GAIN_MIC2_13 +729 0x4A4C //TX_PREEQ_GAIN_MIC2_14 +730 0x4F5E //TX_PREEQ_GAIN_MIC2_15 +731 0x4848 //TX_PREEQ_GAIN_MIC2_16 +732 0x4848 //TX_PREEQ_GAIN_MIC2_17 +733 0x4848 //TX_PREEQ_GAIN_MIC2_18 +734 0x4848 //TX_PREEQ_GAIN_MIC2_19 +735 0x4848 //TX_PREEQ_GAIN_MIC2_20 +736 0x4848 //TX_PREEQ_GAIN_MIC2_21 +737 0x4848 //TX_PREEQ_GAIN_MIC2_22 +738 0x4848 //TX_PREEQ_GAIN_MIC2_23 +739 0x0202 //TX_PREEQ_BIN_MIC2_0 +740 0x0203 //TX_PREEQ_BIN_MIC2_1 +741 0x0303 //TX_PREEQ_BIN_MIC2_2 +742 0x0304 //TX_PREEQ_BIN_MIC2_3 +743 0x0405 //TX_PREEQ_BIN_MIC2_4 +744 0x0506 //TX_PREEQ_BIN_MIC2_5 +745 0x0708 //TX_PREEQ_BIN_MIC2_6 +746 0x090A //TX_PREEQ_BIN_MIC2_7 +747 0x0B0C //TX_PREEQ_BIN_MIC2_8 +748 0x0D0E //TX_PREEQ_BIN_MIC2_9 +749 0x1013 //TX_PREEQ_BIN_MIC2_10 +750 0x1719 //TX_PREEQ_BIN_MIC2_11 +751 0x1B1E //TX_PREEQ_BIN_MIC2_12 +752 0x1E1E //TX_PREEQ_BIN_MIC2_13 +753 0x1E28 //TX_PREEQ_BIN_MIC2_14 +754 0x363C //TX_PREEQ_BIN_MIC2_15 +755 0x0000 //TX_PREEQ_BIN_MIC2_16 +756 0x0000 //TX_PREEQ_BIN_MIC2_17 +757 0x0000 //TX_PREEQ_BIN_MIC2_18 +758 0x0000 //TX_PREEQ_BIN_MIC2_19 +759 0x0000 //TX_PREEQ_BIN_MIC2_20 +760 0x0000 //TX_PREEQ_BIN_MIC2_21 +761 0x0000 //TX_PREEQ_BIN_MIC2_22 +762 0x0000 //TX_PREEQ_BIN_MIC2_23 +763 0x0006 //TX_MASKING_ABILITY +764 0x0800 //TX_NND_WEIGHT +765 0x0050 //TX_MIC_CALIBRATION_0 +766 0x0065 //TX_MIC_CALIBRATION_1 +767 0x0050 //TX_MIC_CALIBRATION_2 +768 0x0050 //TX_MIC_CALIBRATION_3 +769 0x0046 //TX_MIC_PWR_BIAS_0 +770 0x0040 //TX_MIC_PWR_BIAS_1 +771 0x0046 //TX_MIC_PWR_BIAS_2 +772 0x0046 //TX_MIC_PWR_BIAS_3 +773 0x0000 //TX_GAIN_LIMIT_0 +774 0x000F //TX_GAIN_LIMIT_1 +775 0x0000 //TX_GAIN_LIMIT_2 +776 0x0000 //TX_GAIN_LIMIT_3 +777 0x7F5B //TX_BVE_NOVAD0_ALPHADOWN +778 0x7FDE //TX_BVE_VAD0_ALPHAUP +779 0x7F3A //TX_BVE_VAD0_ALPHADOWN +780 0x2000 //TX_BVE_GAINWEIGHT_NOFEVADLI +781 0x7F5B //TX_BVE_FEVADLI_ALPHA +782 0x7F19 //TX_BVE_NOVAD0_ALPHAUP +783 0x0800 //TX_TDDRC_ALPHA_UP_01 +784 0x0800 //TX_TDDRC_ALPHA_UP_02 +785 0x0800 //TX_TDDRC_ALPHA_UP_03 +786 0x0800 //TX_TDDRC_ALPHA_UP_04 +787 0x7EB8 //TX_TDDRC_ALPHA_DWN_01 +788 0x7EB8 //TX_TDDRC_ALPHA_DWN_02 +789 0x7EB8 //TX_TDDRC_ALPHA_DWN_03 +790 0x7EB8 //TX_TDDRC_ALPHA_DWN_04 +791 0x7FFF //TX_TDDRC_TD_DRC_LIMIT +792 0x0800 //TX_TDDRC_POST_LIMIT_GAIN +793 0x0000 //TX_TDDRC_RESRV_0 +794 0x0000 //TX_TDDRC_RESRV_1 +795 0x0018 //TX_FDDRC_BAND_MARGIN_0 +796 0x0030 //TX_FDDRC_BAND_MARGIN_1 +797 0x0050 //TX_FDDRC_BAND_MARGIN_2 +798 0x0080 //TX_FDDRC_BAND_MARGIN_3 +799 0x0007 //TX_FDDRC_BLOCK_EXP +800 0x5000 //TX_FDDRC_THRD_2_0 +801 0x5000 //TX_FDDRC_THRD_2_1 +802 0x5000 //TX_FDDRC_THRD_2_2 +803 0x5000 //TX_FDDRC_THRD_2_3 +804 0x6400 //TX_FDDRC_THRD_3_0 +805 0x6400 //TX_FDDRC_THRD_3_1 +806 0x6400 //TX_FDDRC_THRD_3_2 +807 0x6400 //TX_FDDRC_THRD_3_3 +808 0x2000 //TX_FDDRC_SLANT_0_0 +809 0x2000 //TX_FDDRC_SLANT_0_1 +810 0x2000 //TX_FDDRC_SLANT_0_2 +811 0x2000 //TX_FDDRC_SLANT_0_3 +812 0x5333 //TX_FDDRC_SLANT_1_0 +813 0x5333 //TX_FDDRC_SLANT_1_1 +814 0x5333 //TX_FDDRC_SLANT_1_2 +815 0x5333 //TX_FDDRC_SLANT_1_3 +816 0x0010 //TX_DEADMIC_SILENCE_TH +817 0x0600 //TX_MIC_DEGRADE_TH +818 0x0078 //TX_DEADMIC_CNT +819 0x0078 //TX_MIC_DEGRADE_CNT +820 0x0000 //TX_FDDRC_RESRV_4 +821 0x0000 //TX_FDDRC_RESRV_5 +822 0x0000 //TX_FDDRC_RESRV_6 +823 0x7FFF //TX_KS_NOISEPASTE_FACTOR +824 0x0001 //TX_KS_CONFIG +825 0x7FFF //TX_KS_GAIN_MIN +826 0x0000 //TX_KS_RESRV_0 +827 0x0000 //TX_KS_RESRV_1 +828 0x0000 //TX_KS_RESRV_2 +829 0x7C00 //TX_LAMBDA_PKA_FP +830 0x2000 //TX_TPKA_FP +831 0x0080 //TX_MIN_G_FP +832 0x2000 //TX_MAX_G_FP +833 0x4848 //TX_FFP_FP_K_METAL +834 0x4000 //TX_A_POST_FLT_FP +835 0x0F5C //TX_RTO_OUTBEAM_TH +836 0x4CCD //TX_TPKA_FP_THD +837 0x0000 //TX_MAX_G_FP_BLK +838 0x0000 //TX_FFP_FADEIN +839 0x0000 //TX_FFP_FADEOUT +840 0x0000 //TX_WHISPERCTH +841 0x0000 //TX_WHISPERHOLDT +842 0x0000 //TX_WHISP_ENTHH +843 0x0000 //TX_WHISP_ENTHL +844 0x0000 //TX_WHISP_RTOTH +845 0x0000 //TX_WHISP_RTOTH2 +846 0x0096 //TX_MUTE_PERIOD +847 0x0000 //TX_FADE_IN_PERIOD +848 0x0100 //TX_FFP_RESRV_2 +849 0x0020 //TX_FFP_RESRV_3 +850 0x0000 //TX_FFP_RESRV_4 +851 0x0000 //TX_FFP_RESRV_5 +852 0x0000 //TX_FFP_RESRV_6 +853 0x0002 //TX_FILTINDX +854 0x0001 //TX_TDDRC_THRD_0 +855 0x0002 //TX_TDDRC_THRD_1 +856 0x1000 //TX_TDDRC_THRD_2 +857 0x1000 //TX_TDDRC_THRD_3 +858 0x6000 //TX_TDDRC_SLANT_0 +859 0x6000 //TX_TDDRC_SLANT_1 +860 0x0800 //TX_TDDRC_ALPHA_UP_00 +861 0x7EB8 //TX_TDDRC_ALPHA_DWN_00 +862 0x0000 //TX_TDDRC_HMNC_FLAG +863 0x199A //TX_TDDRC_HMNC_GAIN +864 0x0000 //TX_TDDRC_SMT_FLAG +865 0x0CCD //TX_TDDRC_SMT_W +866 0x0E21 //TX_TDDRC_DRC_GAIN +867 0x7FFF //TX_TDDRC_LMT_THRD +868 0x0000 //TX_TDDRC_LMT_ALPHA +869 0x0000 //TX_TFMASKLTH +870 0x0000 //TX_TFMASKLTHL +871 0x0CCD //TX_TFMASKHTH +872 0x0CCD //TX_TFMASKLTH_BINVAD +873 0xF333 //TX_TFMASKLTH_NS_EST +874 0x2CCD //TX_TFMASKLTH_DOA +875 0xECCD //TX_TFMASKTH_BLESSCUT +876 0x1000 //TX_B_LESSCUT_RTO_MASK +877 0x3800 //TX_SB_RHO_MEAN_TH_ABN +878 0x2000 //TX_B_POST_FLT_MASK +879 0x0000 //TX_B_POST_FLT_MASK1 +880 0x5333 //TX_GAIN_WIND_MASK +881 0x7FFF //TX_TFMASK_BFSTRICT_MUSIC +882 0x0000 //TX_TFMASK_BFSTRICT_NOMUSIC +883 0x7333 //TX_FASTNS_OUTIN_TH +884 0x0CCD //TX_FASTNS_TFMASK_TH +885 0x0CCD //TX_FASTNS_TFMASKBIN_TH1 +886 0x0CCD //TX_FASTNS_TFMASKBIN_TH2 +887 0x0CCD //TX_FASTNS_TFMASKBIN_TH3 +888 0x00C8 //TX_FASTNS_ARSPC_TH +889 0xC000 //TX_FASTNS_MASK5_TH +890 0x4848 //TX_POSTSSA_MIN_G_VR_MASK +891 0x4000 //TX_A_LESSCUT_RTO_MASK +892 0x1770 //TX_FASTNS_NOISETH +893 0xC000 //TX_FASTNS_SSA_THLFL +894 0xC000 //TX_FASTNS_SSA_THHFL +895 0xCCCC //TX_FASTNS_SSA_THLFH +896 0xD999 //TX_FASTNS_SSA_THHFH +897 0x2339 //TX_SENDFUNC_REG_MICMUTE +898 0x0021 //TX_SENDFUNC_REG_MICMUTE1 +899 0x02BC //TX_MICMUTE_RATIO_THR +900 0x0140 //TX_MICMUTE_AMP_THR +901 0x0004 //TX_MICMUTE_HPF_IND +902 0x00C0 //TX_MICMUTE_LOG_EYR_TH +903 0x0008 //TX_MICMUTE_CVG_TIME +904 0x0008 //TX_MICMUTE_RELEASE_TIME +905 0x01FE //TX_MIC_VOLUME_MIC0MUTE +906 0x0020 //TX_MICMUTE_EPD_OFFSET_0 +907 0x001E //TX_MICMUTE_FRQ_AEC_L +908 0x7999 //TX_MICMUTE_EAD_THR +909 0x7FFF //TX_MICMUTE_LAMBDA_CB_NLE +910 0x7FFF //TX_MICMUTE_LAMBDA_RE_EST +911 0x4000 //TX_DTD_THR1_MICMUTE_0 +912 0x7000 //TX_DTD_THR1_MICMUTE_1 +913 0x7FFF //TX_DTD_THR1_MICMUTE_2 +914 0x7FFF //TX_DTD_THR1_MICMUTE_3 +915 0x6CCC //TX_DTD_THR2_MICMUTE_0 +916 0x0400 //TX_MICMUTE_MIN_EQ_RE_EST_0 +917 0x0400 //TX_MICMUTE_MIN_EQ_RE_EST_1 +918 0x1000 //TX_MICMUTE_MIN_EQ_RE_EST_2 +919 0x7FFF //TX_MICMUTE_MIN_EQ_RE_EST_3 +920 0x7FFF //TX_MICMUTE_MIN_EQ_RE_EST_4 +921 0x4000 //TX_MICMUTE_C_POST_FLT +922 0x03E8 //TX_MICMUTE_DT_CUT_K +923 0x0001 //TX_MICMUTE_DT_CUT_THR +924 0x03E8 //TX_MICMUTE_DT_CUT_K2 +925 0x0001 //TX_MICMUTE_DT_CUT_THR2 +926 0x0064 //TX_MICMUTE_DT2_HOLD_N +927 0x1000 //TX_MICMUTE_RATIODTH_THCUT +928 0x1000 //TX_MICMUTE_B_POST_FLT_ECHOL +929 0x7FFF //TX_MICMUTE_B_POST_FLT_ECHOH +930 0x0400 //TX_MICMUTE_C_POST_FLT_MASK +931 0x7999 //TX_MICMUTE_RATIODTL_CUT_TH +932 0x0258 //TX_MICMUTE_DT_CUT_K1 +933 0x0800 //TX_MICMUTE_N2_SN_EST +934 0xFC00 //TX_MICMUTE_THR_SN_EST_0 +935 0x001C //TX_MICMUTE_MIN_G_CTRL_0 +936 0x6000 //TX_MICMUTE_A_POST_FILT_S_0 +937 0x7000 //TX_MICMUTE_B_POST_FILT_0 +938 0x2710 //TX_MIC1RUB_AMP_THR +939 0x0010 //TX_MIC1MUTE_RATIO_THR +940 0x0450 //TX_MIC1MUTE_AMP_THR +941 0x0008 //TX_MIC1MUTE_CVG_TIME +942 0x0008 //TX_MIC1MUTE_RELEASE_TIME +943 0x0000 //TX_AMS_RESRV_01 +944 0x0000 //TX_AMS_RESRV_02 +945 0x0000 //TX_AMS_RESRV_03 +946 0x0000 //TX_AMS_RESRV_04 +947 0x0000 //TX_AMS_RESRV_05 +948 0x0000 //TX_AMS_RESRV_06 +949 0x0000 //TX_AMS_RESRV_07 +950 0x0000 //TX_AMS_RESRV_08 +951 0x0000 //TX_AMS_RESRV_09 +952 0x0000 //TX_AMS_RESRV_10 +953 0x0000 //TX_AMS_RESRV_11 +954 0x0000 //TX_AMS_RESRV_12 +955 0x0000 //TX_AMS_RESRV_13 +956 0x0000 //TX_AMS_RESRV_14 +957 0x0000 //TX_AMS_RESRV_15 +958 0x0000 //TX_AMS_RESRV_16 +959 0x0000 //TX_AMS_RESRV_17 +960 0x0000 //TX_AMS_RESRV_18 +961 0x0000 //TX_AMS_RESRV_19 +#RX +0 0x206C //RX_RECVFUNC_MODE_0 +1 0x0000 //RX_RECVFUNC_MODE_1 +2 0x0003 //RX_SAMPLINGFREQ_SIG +3 0x0003 //RX_SAMPLINGFREQ_PROC +4 0x000A //RX_FRAME_SZ +5 0x0000 //RX_DELAY_OPT +6 0x6000 //RX_TDDRC_ALPHA_UP_1 +7 0x6000 //RX_TDDRC_ALPHA_UP_2 +8 0x6000 //RX_TDDRC_ALPHA_UP_3 +9 0x1000 //RX_TDDRC_ALPHA_UP_4 +10 0x0800 //RX_PGA +11 0x7652 //RX_A_HP +12 0x4000 //RX_B_PE +13 0x7800 //RX_THR_PITCH_DET_0 +14 0x7000 //RX_THR_PITCH_DET_1 +15 0x6000 //RX_THR_PITCH_DET_2 +16 0x0008 //RX_PITCH_BFR_LEN +17 0x0003 //RX_SBD_PITCH_DET +18 0x0100 //RX_PP_RESRV_0 +19 0x0020 //RX_PP_RESRV_1 +20 0x0400 //RX_N_SN_EST +21 0x000C //RX_N2_SN_EST +22 0x0010 //RX_NS_LVL_CTRL +23 0xF800 //RX_THR_SN_EST +24 0x7E00 //RX_LAMBDA_PFILT +25 0x000A //RX_FENS_RESRV_0 +26 0x0190 //RX_FENS_RESRV_1 +27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +30 0x0002 //RX_EXTRA_NS_L +31 0x0800 //RX_EXTRA_NS_A +32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +33 0x7214 //RX_TDDRC_LIMITER_THRD +34 0x0800 //RX_TDDRC_LIMITER_GAIN +35 0x199A //RX_A_POST_FLT +36 0x0000 //RX_LMT_THRD +37 0x4000 //RX_LMT_ALPHA +38 0x0020 //RX_FDEQ_SUBNUM +39 0x4848 //RX_FDEQ_GAIN_0 +40 0x4848 //RX_FDEQ_GAIN_1 +41 0x4340 //RX_FDEQ_GAIN_2 +42 0x3F3D //RX_FDEQ_GAIN_3 +43 0x3935 //RX_FDEQ_GAIN_4 +44 0x3635 //RX_FDEQ_GAIN_5 +45 0x3E46 //RX_FDEQ_GAIN_6 +46 0x494C //RX_FDEQ_GAIN_7 +47 0x4E56 //RX_FDEQ_GAIN_8 +48 0x5F5B //RX_FDEQ_GAIN_9 +49 0x5B48 //RX_FDEQ_GAIN_10 +50 0x4856 //RX_FDEQ_GAIN_11 +51 0x5B60 //RX_FDEQ_GAIN_12 +52 0x7476 //RX_FDEQ_GAIN_13 +53 0x7F7C //RX_FDEQ_GAIN_14 +54 0x7068 //RX_FDEQ_GAIN_15 +55 0x4848 //RX_FDEQ_GAIN_16 +56 0x4848 //RX_FDEQ_GAIN_17 +57 0x4848 //RX_FDEQ_GAIN_18 +58 0x4848 //RX_FDEQ_GAIN_19 +59 0x4848 //RX_FDEQ_GAIN_20 +60 0x4848 //RX_FDEQ_GAIN_21 +61 0x4848 //RX_FDEQ_GAIN_22 +62 0x4848 //RX_FDEQ_GAIN_23 +63 0x0202 //RX_FDEQ_BIN_0 +64 0x0203 //RX_FDEQ_BIN_1 +65 0x0303 //RX_FDEQ_BIN_2 +66 0x0304 //RX_FDEQ_BIN_3 +67 0x0404 //RX_FDEQ_BIN_4 +68 0x0209 //RX_FDEQ_BIN_5 +69 0x0808 //RX_FDEQ_BIN_6 +70 0x090A //RX_FDEQ_BIN_7 +71 0x0B0C //RX_FDEQ_BIN_8 +72 0x0D0E //RX_FDEQ_BIN_9 +73 0x1013 //RX_FDEQ_BIN_10 +74 0x1719 //RX_FDEQ_BIN_11 +75 0x1B1E //RX_FDEQ_BIN_12 +76 0x1E1E //RX_FDEQ_BIN_13 +77 0x1E28 //RX_FDEQ_BIN_14 +78 0x282C //RX_FDEQ_BIN_15 +79 0x0000 //RX_FDEQ_BIN_16 +80 0x0000 //RX_FDEQ_BIN_17 +81 0x0000 //RX_FDEQ_BIN_18 +82 0x0000 //RX_FDEQ_BIN_19 +83 0x0000 //RX_FDEQ_BIN_20 +84 0x0000 //RX_FDEQ_BIN_21 +85 0x0000 //RX_FDEQ_BIN_22 +86 0x0000 //RX_FDEQ_BIN_23 +87 0x4000 //RX_FDEQ_RESRV_0 +88 0x0320 //RX_FDEQ_RESRV_1 +89 0x0018 //RX_FDDRC_BAND_MARGIN_0 +90 0x0035 //RX_FDDRC_BAND_MARGIN_1 +91 0x00D5 //RX_FDDRC_BAND_MARGIN_2 +92 0x0120 //RX_FDDRC_BAND_MARGIN_3 +93 0x0004 //RX_FDDRC_BLOCK_EXP +94 0x5000 //RX_FDDRC_THRD_2_0 +95 0x5000 //RX_FDDRC_THRD_2_1 +96 0x2000 //RX_FDDRC_THRD_2_2 +97 0x5000 //RX_FDDRC_THRD_2_3 +98 0x6400 //RX_FDDRC_THRD_3_0 +99 0x6400 //RX_FDDRC_THRD_3_1 +100 0x2000 //RX_FDDRC_THRD_3_2 +101 0x5000 //RX_FDDRC_THRD_3_3 +102 0x4000 //RX_FDDRC_SLANT_0_0 +103 0x4000 //RX_FDDRC_SLANT_0_1 +104 0x4000 //RX_FDDRC_SLANT_0_2 +105 0x4000 //RX_FDDRC_SLANT_0_3 +106 0x7FFF //RX_FDDRC_SLANT_1_0 +107 0x7FFF //RX_FDDRC_SLANT_1_1 +108 0x7FFF //RX_FDDRC_SLANT_1_2 +109 0x7FFF //RX_FDDRC_SLANT_1_3 +110 0x0000 //RX_FDDRC_RESRV_0 +111 0x0002 //RX_FILTINDX +112 0x0002 //RX_TDDRC_THRD_0 +113 0x0004 //RX_TDDRC_THRD_1 +114 0x1500 //RX_TDDRC_THRD_2 +115 0x1500 //RX_TDDRC_THRD_3 +116 0x3000 //RX_TDDRC_SLANT_0 +117 0x6E00 //RX_TDDRC_SLANT_1 +118 0x6000 //RX_TDDRC_ALPHA_UP_0 +119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +120 0x0000 //RX_TDDRC_HMNC_FLAG +121 0x199A //RX_TDDRC_HMNC_GAIN +122 0x0001 //RX_TDDRC_SMT_FLAG +123 0x0CCD //RX_TDDRC_SMT_W +124 0x02FD //RX_TDDRC_DRC_GAIN +125 0x7C00 //RX_LAMBDA_PKA_FP +126 0x2000 //RX_TPKA_FP +127 0x2000 //RX_MIN_G_FP +128 0x0080 //RX_MAX_G_FP +129 0x0100 //RX_SPK_VOL +130 0x0000 //RX_VOL_RESRV_0 +131 0x0000 //RX_MAXLEVEL_CNG +132 0x3000 //RX_BWE_UV_TH +133 0x3000 //RX_BWE_UV_TH2 +134 0x1800 //RX_BWE_UV_TH3 +135 0x1000 //RX_BWE_V_TH +136 0x04CD //RX_BWE_GAIN1_V_TH1 +137 0x0F33 //RX_BWE_GAIN1_V_TH2 +138 0x7333 //RX_BWE_UV_EQ +139 0x199A //RX_BWE_V_EQ +140 0x7333 //RX_BWE_TONE_TH +141 0x0004 //RX_BWE_UV_HOLD_T +142 0x6CCD //RX_BWE_GAIN2_ALPHA +143 0x799A //RX_BWE_GAIN3_ALPHA +144 0x001E //RX_BWE_CUTOFF +145 0x3000 //RX_BWE_GAINFILL +146 0x3200 //RX_BWE_MAXTH_TONE +147 0x2000 //RX_BWE_EQ_0 +148 0x2000 //RX_BWE_EQ_1 +149 0x2000 //RX_BWE_EQ_2 +150 0x2000 //RX_BWE_EQ_3 +151 0x2000 //RX_BWE_EQ_4 +152 0x2000 //RX_BWE_EQ_5 +153 0x2000 //RX_BWE_EQ_6 +154 0x0000 //RX_BWE_RESRV_0 +155 0x0000 //RX_BWE_RESRV_1 +156 0x0000 //RX_BWE_RESRV_2 +#VOL 0 +6 0x6000 //RX_TDDRC_ALPHA_UP_1 +7 0x6000 //RX_TDDRC_ALPHA_UP_2 +8 0x6000 //RX_TDDRC_ALPHA_UP_3 +9 0x1000 //RX_TDDRC_ALPHA_UP_4 +27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +33 0x7214 //RX_TDDRC_LIMITER_THRD +34 0x0800 //RX_TDDRC_LIMITER_GAIN +112 0x0002 //RX_TDDRC_THRD_0 +113 0x0004 //RX_TDDRC_THRD_1 +114 0x1500 //RX_TDDRC_THRD_2 +115 0x1500 //RX_TDDRC_THRD_3 +116 0x3000 //RX_TDDRC_SLANT_0 +117 0x6E00 //RX_TDDRC_SLANT_1 +118 0x6000 //RX_TDDRC_ALPHA_UP_0 +119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +120 0x0000 //RX_TDDRC_HMNC_FLAG +121 0x199A //RX_TDDRC_HMNC_GAIN +122 0x0001 //RX_TDDRC_SMT_FLAG +123 0x0CCD //RX_TDDRC_SMT_W +124 0x02FD //RX_TDDRC_DRC_GAIN +38 0x0020 //RX_FDEQ_SUBNUM +39 0x4848 //RX_FDEQ_GAIN_0 +40 0x4848 //RX_FDEQ_GAIN_1 +41 0x4340 //RX_FDEQ_GAIN_2 +42 0x3F3D //RX_FDEQ_GAIN_3 +43 0x3935 //RX_FDEQ_GAIN_4 +44 0x3635 //RX_FDEQ_GAIN_5 +45 0x3E46 //RX_FDEQ_GAIN_6 +46 0x494C //RX_FDEQ_GAIN_7 +47 0x4E56 //RX_FDEQ_GAIN_8 +48 0x5F5B //RX_FDEQ_GAIN_9 +49 0x5B48 //RX_FDEQ_GAIN_10 +50 0x4856 //RX_FDEQ_GAIN_11 +51 0x5B60 //RX_FDEQ_GAIN_12 +52 0x7476 //RX_FDEQ_GAIN_13 +53 0x7F7C //RX_FDEQ_GAIN_14 +54 0x7068 //RX_FDEQ_GAIN_15 +55 0x4848 //RX_FDEQ_GAIN_16 +56 0x4848 //RX_FDEQ_GAIN_17 +57 0x4848 //RX_FDEQ_GAIN_18 +58 0x4848 //RX_FDEQ_GAIN_19 +59 0x4848 //RX_FDEQ_GAIN_20 +60 0x4848 //RX_FDEQ_GAIN_21 +61 0x4848 //RX_FDEQ_GAIN_22 +62 0x4848 //RX_FDEQ_GAIN_23 +63 0x0202 //RX_FDEQ_BIN_0 +64 0x0203 //RX_FDEQ_BIN_1 +65 0x0303 //RX_FDEQ_BIN_2 +66 0x0304 //RX_FDEQ_BIN_3 +67 0x0404 //RX_FDEQ_BIN_4 +68 0x0209 //RX_FDEQ_BIN_5 +69 0x0808 //RX_FDEQ_BIN_6 +70 0x090A //RX_FDEQ_BIN_7 +71 0x0B0C //RX_FDEQ_BIN_8 +72 0x0D0E //RX_FDEQ_BIN_9 +73 0x1013 //RX_FDEQ_BIN_10 +74 0x1719 //RX_FDEQ_BIN_11 +75 0x1B1E //RX_FDEQ_BIN_12 +76 0x1E1E //RX_FDEQ_BIN_13 +77 0x1E28 //RX_FDEQ_BIN_14 +78 0x282C //RX_FDEQ_BIN_15 +79 0x0000 //RX_FDEQ_BIN_16 +80 0x0000 //RX_FDEQ_BIN_17 +81 0x0000 //RX_FDEQ_BIN_18 +82 0x0000 //RX_FDEQ_BIN_19 +83 0x0000 //RX_FDEQ_BIN_20 +84 0x0000 //RX_FDEQ_BIN_21 +85 0x0000 //RX_FDEQ_BIN_22 +86 0x0000 //RX_FDEQ_BIN_23 +87 0x4000 //RX_FDEQ_RESRV_0 +88 0x0320 //RX_FDEQ_RESRV_1 +89 0x0018 //RX_FDDRC_BAND_MARGIN_0 +90 0x0035 //RX_FDDRC_BAND_MARGIN_1 +91 0x00D5 //RX_FDDRC_BAND_MARGIN_2 +92 0x0120 //RX_FDDRC_BAND_MARGIN_3 +93 0x0004 //RX_FDDRC_BLOCK_EXP +94 0x5000 //RX_FDDRC_THRD_2_0 +95 0x5000 //RX_FDDRC_THRD_2_1 +96 0x2000 //RX_FDDRC_THRD_2_2 +97 0x5000 //RX_FDDRC_THRD_2_3 +98 0x6400 //RX_FDDRC_THRD_3_0 +99 0x6400 //RX_FDDRC_THRD_3_1 +100 0x2000 //RX_FDDRC_THRD_3_2 +101 0x5000 //RX_FDDRC_THRD_3_3 +102 0x4000 //RX_FDDRC_SLANT_0_0 +103 0x4000 //RX_FDDRC_SLANT_0_1 +104 0x4000 //RX_FDDRC_SLANT_0_2 +105 0x4000 //RX_FDDRC_SLANT_0_3 +106 0x7FFF //RX_FDDRC_SLANT_1_0 +107 0x7FFF //RX_FDDRC_SLANT_1_1 +108 0x7FFF //RX_FDDRC_SLANT_1_2 +109 0x7FFF //RX_FDDRC_SLANT_1_3 +110 0x0000 //RX_FDDRC_RESRV_0 +129 0x0019 //RX_SPK_VOL +130 0x0000 //RX_VOL_RESRV_0 +#VOL 1 +6 0x6000 //RX_TDDRC_ALPHA_UP_1 +7 0x6000 //RX_TDDRC_ALPHA_UP_2 +8 0x6000 //RX_TDDRC_ALPHA_UP_3 +9 0x1000 //RX_TDDRC_ALPHA_UP_4 +27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +33 0x7214 //RX_TDDRC_LIMITER_THRD +34 0x0800 //RX_TDDRC_LIMITER_GAIN +112 0x0002 //RX_TDDRC_THRD_0 +113 0x0004 //RX_TDDRC_THRD_1 +114 0x1500 //RX_TDDRC_THRD_2 +115 0x1500 //RX_TDDRC_THRD_3 +116 0x3000 //RX_TDDRC_SLANT_0 +117 0x6E00 //RX_TDDRC_SLANT_1 +118 0x6000 //RX_TDDRC_ALPHA_UP_0 +119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +120 0x0000 //RX_TDDRC_HMNC_FLAG +121 0x199A //RX_TDDRC_HMNC_GAIN +122 0x0001 //RX_TDDRC_SMT_FLAG +123 0x0CCD //RX_TDDRC_SMT_W +124 0x02FD //RX_TDDRC_DRC_GAIN +38 0x0020 //RX_FDEQ_SUBNUM +39 0x4848 //RX_FDEQ_GAIN_0 +40 0x4848 //RX_FDEQ_GAIN_1 +41 0x4340 //RX_FDEQ_GAIN_2 +42 0x3F3D //RX_FDEQ_GAIN_3 +43 0x3935 //RX_FDEQ_GAIN_4 +44 0x3635 //RX_FDEQ_GAIN_5 +45 0x3E46 //RX_FDEQ_GAIN_6 +46 0x494C //RX_FDEQ_GAIN_7 +47 0x4E56 //RX_FDEQ_GAIN_8 +48 0x5F5B //RX_FDEQ_GAIN_9 +49 0x5B48 //RX_FDEQ_GAIN_10 +50 0x4856 //RX_FDEQ_GAIN_11 +51 0x5B60 //RX_FDEQ_GAIN_12 +52 0x7476 //RX_FDEQ_GAIN_13 +53 0x7F7C //RX_FDEQ_GAIN_14 +54 0x7068 //RX_FDEQ_GAIN_15 +55 0x4848 //RX_FDEQ_GAIN_16 +56 0x4848 //RX_FDEQ_GAIN_17 +57 0x4848 //RX_FDEQ_GAIN_18 +58 0x4848 //RX_FDEQ_GAIN_19 +59 0x4848 //RX_FDEQ_GAIN_20 +60 0x4848 //RX_FDEQ_GAIN_21 +61 0x4848 //RX_FDEQ_GAIN_22 +62 0x4848 //RX_FDEQ_GAIN_23 +63 0x0202 //RX_FDEQ_BIN_0 +64 0x0203 //RX_FDEQ_BIN_1 +65 0x0303 //RX_FDEQ_BIN_2 +66 0x0304 //RX_FDEQ_BIN_3 +67 0x0404 //RX_FDEQ_BIN_4 +68 0x0209 //RX_FDEQ_BIN_5 +69 0x0808 //RX_FDEQ_BIN_6 +70 0x090A //RX_FDEQ_BIN_7 +71 0x0B0C //RX_FDEQ_BIN_8 +72 0x0D0E //RX_FDEQ_BIN_9 +73 0x1013 //RX_FDEQ_BIN_10 +74 0x1719 //RX_FDEQ_BIN_11 +75 0x1B1E //RX_FDEQ_BIN_12 +76 0x1E1E //RX_FDEQ_BIN_13 +77 0x1E28 //RX_FDEQ_BIN_14 +78 0x282C //RX_FDEQ_BIN_15 +79 0x0000 //RX_FDEQ_BIN_16 +80 0x0000 //RX_FDEQ_BIN_17 +81 0x0000 //RX_FDEQ_BIN_18 +82 0x0000 //RX_FDEQ_BIN_19 +83 0x0000 //RX_FDEQ_BIN_20 +84 0x0000 //RX_FDEQ_BIN_21 +85 0x0000 //RX_FDEQ_BIN_22 +86 0x0000 //RX_FDEQ_BIN_23 +87 0x4000 //RX_FDEQ_RESRV_0 +88 0x0320 //RX_FDEQ_RESRV_1 +89 0x0018 //RX_FDDRC_BAND_MARGIN_0 +90 0x0035 //RX_FDDRC_BAND_MARGIN_1 +91 0x00D5 //RX_FDDRC_BAND_MARGIN_2 +92 0x0120 //RX_FDDRC_BAND_MARGIN_3 +93 0x0004 //RX_FDDRC_BLOCK_EXP +94 0x5000 //RX_FDDRC_THRD_2_0 +95 0x5000 //RX_FDDRC_THRD_2_1 +96 0x2000 //RX_FDDRC_THRD_2_2 +97 0x5000 //RX_FDDRC_THRD_2_3 +98 0x6400 //RX_FDDRC_THRD_3_0 +99 0x6400 //RX_FDDRC_THRD_3_1 +100 0x2000 //RX_FDDRC_THRD_3_2 +101 0x5000 //RX_FDDRC_THRD_3_3 +102 0x4000 //RX_FDDRC_SLANT_0_0 +103 0x4000 //RX_FDDRC_SLANT_0_1 +104 0x4000 //RX_FDDRC_SLANT_0_2 +105 0x4000 //RX_FDDRC_SLANT_0_3 +106 0x7FFF //RX_FDDRC_SLANT_1_0 +107 0x7FFF //RX_FDDRC_SLANT_1_1 +108 0x7FFF //RX_FDDRC_SLANT_1_2 +109 0x7FFF //RX_FDDRC_SLANT_1_3 +110 0x0000 //RX_FDDRC_RESRV_0 +129 0x0023 //RX_SPK_VOL +130 0x0000 //RX_VOL_RESRV_0 +#VOL 2 +6 0x6000 //RX_TDDRC_ALPHA_UP_1 +7 0x6000 //RX_TDDRC_ALPHA_UP_2 +8 0x6000 //RX_TDDRC_ALPHA_UP_3 +9 0x1000 //RX_TDDRC_ALPHA_UP_4 +27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +33 0x7214 //RX_TDDRC_LIMITER_THRD +34 0x0800 //RX_TDDRC_LIMITER_GAIN +112 0x0002 //RX_TDDRC_THRD_0 +113 0x0004 //RX_TDDRC_THRD_1 +114 0x1500 //RX_TDDRC_THRD_2 +115 0x1500 //RX_TDDRC_THRD_3 +116 0x3000 //RX_TDDRC_SLANT_0 +117 0x6E00 //RX_TDDRC_SLANT_1 +118 0x6000 //RX_TDDRC_ALPHA_UP_0 +119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +120 0x0000 //RX_TDDRC_HMNC_FLAG +121 0x199A //RX_TDDRC_HMNC_GAIN +122 0x0001 //RX_TDDRC_SMT_FLAG +123 0x0CCD //RX_TDDRC_SMT_W +124 0x02FD //RX_TDDRC_DRC_GAIN +38 0x0020 //RX_FDEQ_SUBNUM +39 0x4848 //RX_FDEQ_GAIN_0 +40 0x4848 //RX_FDEQ_GAIN_1 +41 0x4340 //RX_FDEQ_GAIN_2 +42 0x3F3D //RX_FDEQ_GAIN_3 +43 0x3935 //RX_FDEQ_GAIN_4 +44 0x3635 //RX_FDEQ_GAIN_5 +45 0x3E46 //RX_FDEQ_GAIN_6 +46 0x494C //RX_FDEQ_GAIN_7 +47 0x4E56 //RX_FDEQ_GAIN_8 +48 0x5F5B //RX_FDEQ_GAIN_9 +49 0x5B48 //RX_FDEQ_GAIN_10 +50 0x4856 //RX_FDEQ_GAIN_11 +51 0x5B60 //RX_FDEQ_GAIN_12 +52 0x7476 //RX_FDEQ_GAIN_13 +53 0x7F7C //RX_FDEQ_GAIN_14 +54 0x7068 //RX_FDEQ_GAIN_15 +55 0x4848 //RX_FDEQ_GAIN_16 +56 0x4848 //RX_FDEQ_GAIN_17 +57 0x4848 //RX_FDEQ_GAIN_18 +58 0x4848 //RX_FDEQ_GAIN_19 +59 0x4848 //RX_FDEQ_GAIN_20 +60 0x4848 //RX_FDEQ_GAIN_21 +61 0x4848 //RX_FDEQ_GAIN_22 +62 0x4848 //RX_FDEQ_GAIN_23 +63 0x0202 //RX_FDEQ_BIN_0 +64 0x0203 //RX_FDEQ_BIN_1 +65 0x0303 //RX_FDEQ_BIN_2 +66 0x0304 //RX_FDEQ_BIN_3 +67 0x0404 //RX_FDEQ_BIN_4 +68 0x0209 //RX_FDEQ_BIN_5 +69 0x0808 //RX_FDEQ_BIN_6 +70 0x090A //RX_FDEQ_BIN_7 +71 0x0B0C //RX_FDEQ_BIN_8 +72 0x0D0E //RX_FDEQ_BIN_9 +73 0x1013 //RX_FDEQ_BIN_10 +74 0x1719 //RX_FDEQ_BIN_11 +75 0x1B1E //RX_FDEQ_BIN_12 +76 0x1E1E //RX_FDEQ_BIN_13 +77 0x1E28 //RX_FDEQ_BIN_14 +78 0x282C //RX_FDEQ_BIN_15 +79 0x0000 //RX_FDEQ_BIN_16 +80 0x0000 //RX_FDEQ_BIN_17 +81 0x0000 //RX_FDEQ_BIN_18 +82 0x0000 //RX_FDEQ_BIN_19 +83 0x0000 //RX_FDEQ_BIN_20 +84 0x0000 //RX_FDEQ_BIN_21 +85 0x0000 //RX_FDEQ_BIN_22 +86 0x0000 //RX_FDEQ_BIN_23 +87 0x4000 //RX_FDEQ_RESRV_0 +88 0x0320 //RX_FDEQ_RESRV_1 +89 0x0018 //RX_FDDRC_BAND_MARGIN_0 +90 0x0035 //RX_FDDRC_BAND_MARGIN_1 +91 0x00D5 //RX_FDDRC_BAND_MARGIN_2 +92 0x0120 //RX_FDDRC_BAND_MARGIN_3 +93 0x0004 //RX_FDDRC_BLOCK_EXP +94 0x5000 //RX_FDDRC_THRD_2_0 +95 0x5000 //RX_FDDRC_THRD_2_1 +96 0x2000 //RX_FDDRC_THRD_2_2 +97 0x5000 //RX_FDDRC_THRD_2_3 +98 0x6400 //RX_FDDRC_THRD_3_0 +99 0x6400 //RX_FDDRC_THRD_3_1 +100 0x2000 //RX_FDDRC_THRD_3_2 +101 0x5000 //RX_FDDRC_THRD_3_3 +102 0x4000 //RX_FDDRC_SLANT_0_0 +103 0x4000 //RX_FDDRC_SLANT_0_1 +104 0x4000 //RX_FDDRC_SLANT_0_2 +105 0x4000 //RX_FDDRC_SLANT_0_3 +106 0x7FFF //RX_FDDRC_SLANT_1_0 +107 0x7FFF //RX_FDDRC_SLANT_1_1 +108 0x7FFF //RX_FDDRC_SLANT_1_2 +109 0x7FFF //RX_FDDRC_SLANT_1_3 +110 0x0000 //RX_FDDRC_RESRV_0 +129 0x0032 //RX_SPK_VOL +130 0x0000 //RX_VOL_RESRV_0 +#VOL 3 +6 0x6000 //RX_TDDRC_ALPHA_UP_1 +7 0x6000 //RX_TDDRC_ALPHA_UP_2 +8 0x6000 //RX_TDDRC_ALPHA_UP_3 +9 0x1000 //RX_TDDRC_ALPHA_UP_4 +27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +33 0x7214 //RX_TDDRC_LIMITER_THRD +34 0x0800 //RX_TDDRC_LIMITER_GAIN +112 0x0002 //RX_TDDRC_THRD_0 +113 0x0004 //RX_TDDRC_THRD_1 +114 0x1500 //RX_TDDRC_THRD_2 +115 0x1500 //RX_TDDRC_THRD_3 +116 0x3000 //RX_TDDRC_SLANT_0 +117 0x6E00 //RX_TDDRC_SLANT_1 +118 0x6000 //RX_TDDRC_ALPHA_UP_0 +119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +120 0x0000 //RX_TDDRC_HMNC_FLAG +121 0x199A //RX_TDDRC_HMNC_GAIN +122 0x0001 //RX_TDDRC_SMT_FLAG +123 0x0CCD //RX_TDDRC_SMT_W +124 0x02FD //RX_TDDRC_DRC_GAIN +38 0x0020 //RX_FDEQ_SUBNUM +39 0x4848 //RX_FDEQ_GAIN_0 +40 0x4848 //RX_FDEQ_GAIN_1 +41 0x4340 //RX_FDEQ_GAIN_2 +42 0x3F3D //RX_FDEQ_GAIN_3 +43 0x3935 //RX_FDEQ_GAIN_4 +44 0x3635 //RX_FDEQ_GAIN_5 +45 0x3E46 //RX_FDEQ_GAIN_6 +46 0x494C //RX_FDEQ_GAIN_7 +47 0x4E56 //RX_FDEQ_GAIN_8 +48 0x5F5B //RX_FDEQ_GAIN_9 +49 0x5B48 //RX_FDEQ_GAIN_10 +50 0x4856 //RX_FDEQ_GAIN_11 +51 0x5B60 //RX_FDEQ_GAIN_12 +52 0x7476 //RX_FDEQ_GAIN_13 +53 0x7F7C //RX_FDEQ_GAIN_14 +54 0x7068 //RX_FDEQ_GAIN_15 +55 0x4848 //RX_FDEQ_GAIN_16 +56 0x4848 //RX_FDEQ_GAIN_17 +57 0x4848 //RX_FDEQ_GAIN_18 +58 0x4848 //RX_FDEQ_GAIN_19 +59 0x4848 //RX_FDEQ_GAIN_20 +60 0x4848 //RX_FDEQ_GAIN_21 +61 0x4848 //RX_FDEQ_GAIN_22 +62 0x4848 //RX_FDEQ_GAIN_23 +63 0x0202 //RX_FDEQ_BIN_0 +64 0x0203 //RX_FDEQ_BIN_1 +65 0x0303 //RX_FDEQ_BIN_2 +66 0x0304 //RX_FDEQ_BIN_3 +67 0x0404 //RX_FDEQ_BIN_4 +68 0x0209 //RX_FDEQ_BIN_5 +69 0x0808 //RX_FDEQ_BIN_6 +70 0x090A //RX_FDEQ_BIN_7 +71 0x0B0C //RX_FDEQ_BIN_8 +72 0x0D0E //RX_FDEQ_BIN_9 +73 0x1013 //RX_FDEQ_BIN_10 +74 0x1719 //RX_FDEQ_BIN_11 +75 0x1B1E //RX_FDEQ_BIN_12 +76 0x1E1E //RX_FDEQ_BIN_13 +77 0x1E28 //RX_FDEQ_BIN_14 +78 0x282C //RX_FDEQ_BIN_15 +79 0x0000 //RX_FDEQ_BIN_16 +80 0x0000 //RX_FDEQ_BIN_17 +81 0x0000 //RX_FDEQ_BIN_18 +82 0x0000 //RX_FDEQ_BIN_19 +83 0x0000 //RX_FDEQ_BIN_20 +84 0x0000 //RX_FDEQ_BIN_21 +85 0x0000 //RX_FDEQ_BIN_22 +86 0x0000 //RX_FDEQ_BIN_23 +87 0x4000 //RX_FDEQ_RESRV_0 +88 0x0320 //RX_FDEQ_RESRV_1 +89 0x0018 //RX_FDDRC_BAND_MARGIN_0 +90 0x0035 //RX_FDDRC_BAND_MARGIN_1 +91 0x00D5 //RX_FDDRC_BAND_MARGIN_2 +92 0x0120 //RX_FDDRC_BAND_MARGIN_3 +93 0x0004 //RX_FDDRC_BLOCK_EXP +94 0x5000 //RX_FDDRC_THRD_2_0 +95 0x5000 //RX_FDDRC_THRD_2_1 +96 0x2000 //RX_FDDRC_THRD_2_2 +97 0x5000 //RX_FDDRC_THRD_2_3 +98 0x6400 //RX_FDDRC_THRD_3_0 +99 0x6400 //RX_FDDRC_THRD_3_1 +100 0x2000 //RX_FDDRC_THRD_3_2 +101 0x5000 //RX_FDDRC_THRD_3_3 +102 0x4000 //RX_FDDRC_SLANT_0_0 +103 0x4000 //RX_FDDRC_SLANT_0_1 +104 0x4000 //RX_FDDRC_SLANT_0_2 +105 0x4000 //RX_FDDRC_SLANT_0_3 +106 0x7FFF //RX_FDDRC_SLANT_1_0 +107 0x7FFF //RX_FDDRC_SLANT_1_1 +108 0x7FFF //RX_FDDRC_SLANT_1_2 +109 0x7FFF //RX_FDDRC_SLANT_1_3 +110 0x0000 //RX_FDDRC_RESRV_0 +129 0x0048 //RX_SPK_VOL +130 0x0000 //RX_VOL_RESRV_0 +#VOL 4 +6 0x6000 //RX_TDDRC_ALPHA_UP_1 +7 0x6000 //RX_TDDRC_ALPHA_UP_2 +8 0x6000 //RX_TDDRC_ALPHA_UP_3 +9 0x1000 //RX_TDDRC_ALPHA_UP_4 +27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +33 0x7214 //RX_TDDRC_LIMITER_THRD +34 0x0800 //RX_TDDRC_LIMITER_GAIN +112 0x0002 //RX_TDDRC_THRD_0 +113 0x0004 //RX_TDDRC_THRD_1 +114 0x1500 //RX_TDDRC_THRD_2 +115 0x1500 //RX_TDDRC_THRD_3 +116 0x3000 //RX_TDDRC_SLANT_0 +117 0x6E00 //RX_TDDRC_SLANT_1 +118 0x6000 //RX_TDDRC_ALPHA_UP_0 +119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +120 0x0000 //RX_TDDRC_HMNC_FLAG +121 0x199A //RX_TDDRC_HMNC_GAIN +122 0x0001 //RX_TDDRC_SMT_FLAG +123 0x0CCD //RX_TDDRC_SMT_W +124 0x02FD //RX_TDDRC_DRC_GAIN +38 0x0020 //RX_FDEQ_SUBNUM +39 0x4848 //RX_FDEQ_GAIN_0 +40 0x4848 //RX_FDEQ_GAIN_1 +41 0x4340 //RX_FDEQ_GAIN_2 +42 0x3F3D //RX_FDEQ_GAIN_3 +43 0x3935 //RX_FDEQ_GAIN_4 +44 0x3635 //RX_FDEQ_GAIN_5 +45 0x3E46 //RX_FDEQ_GAIN_6 +46 0x494C //RX_FDEQ_GAIN_7 +47 0x4E56 //RX_FDEQ_GAIN_8 +48 0x5F5B //RX_FDEQ_GAIN_9 +49 0x5B48 //RX_FDEQ_GAIN_10 +50 0x4856 //RX_FDEQ_GAIN_11 +51 0x5B60 //RX_FDEQ_GAIN_12 +52 0x7476 //RX_FDEQ_GAIN_13 +53 0x7F7C //RX_FDEQ_GAIN_14 +54 0x7068 //RX_FDEQ_GAIN_15 +55 0x4848 //RX_FDEQ_GAIN_16 +56 0x4848 //RX_FDEQ_GAIN_17 +57 0x4848 //RX_FDEQ_GAIN_18 +58 0x4848 //RX_FDEQ_GAIN_19 +59 0x4848 //RX_FDEQ_GAIN_20 +60 0x4848 //RX_FDEQ_GAIN_21 +61 0x4848 //RX_FDEQ_GAIN_22 +62 0x4848 //RX_FDEQ_GAIN_23 +63 0x0202 //RX_FDEQ_BIN_0 +64 0x0203 //RX_FDEQ_BIN_1 +65 0x0303 //RX_FDEQ_BIN_2 +66 0x0304 //RX_FDEQ_BIN_3 +67 0x0404 //RX_FDEQ_BIN_4 +68 0x0209 //RX_FDEQ_BIN_5 +69 0x0808 //RX_FDEQ_BIN_6 +70 0x090A //RX_FDEQ_BIN_7 +71 0x0B0C //RX_FDEQ_BIN_8 +72 0x0D0E //RX_FDEQ_BIN_9 +73 0x1013 //RX_FDEQ_BIN_10 +74 0x1719 //RX_FDEQ_BIN_11 +75 0x1B1E //RX_FDEQ_BIN_12 +76 0x1E1E //RX_FDEQ_BIN_13 +77 0x1E28 //RX_FDEQ_BIN_14 +78 0x282C //RX_FDEQ_BIN_15 +79 0x0000 //RX_FDEQ_BIN_16 +80 0x0000 //RX_FDEQ_BIN_17 +81 0x0000 //RX_FDEQ_BIN_18 +82 0x0000 //RX_FDEQ_BIN_19 +83 0x0000 //RX_FDEQ_BIN_20 +84 0x0000 //RX_FDEQ_BIN_21 +85 0x0000 //RX_FDEQ_BIN_22 +86 0x0000 //RX_FDEQ_BIN_23 +87 0x4000 //RX_FDEQ_RESRV_0 +88 0x0320 //RX_FDEQ_RESRV_1 +89 0x0018 //RX_FDDRC_BAND_MARGIN_0 +90 0x0035 //RX_FDDRC_BAND_MARGIN_1 +91 0x00D5 //RX_FDDRC_BAND_MARGIN_2 +92 0x0120 //RX_FDDRC_BAND_MARGIN_3 +93 0x0004 //RX_FDDRC_BLOCK_EXP +94 0x5000 //RX_FDDRC_THRD_2_0 +95 0x5000 //RX_FDDRC_THRD_2_1 +96 0x2000 //RX_FDDRC_THRD_2_2 +97 0x5000 //RX_FDDRC_THRD_2_3 +98 0x6400 //RX_FDDRC_THRD_3_0 +99 0x6400 //RX_FDDRC_THRD_3_1 +100 0x2000 //RX_FDDRC_THRD_3_2 +101 0x5000 //RX_FDDRC_THRD_3_3 +102 0x4000 //RX_FDDRC_SLANT_0_0 +103 0x4000 //RX_FDDRC_SLANT_0_1 +104 0x4000 //RX_FDDRC_SLANT_0_2 +105 0x4000 //RX_FDDRC_SLANT_0_3 +106 0x7FFF //RX_FDDRC_SLANT_1_0 +107 0x7FFF //RX_FDDRC_SLANT_1_1 +108 0x7FFF //RX_FDDRC_SLANT_1_2 +109 0x7FFF //RX_FDDRC_SLANT_1_3 +110 0x0000 //RX_FDDRC_RESRV_0 +129 0x0068 //RX_SPK_VOL +130 0x0000 //RX_VOL_RESRV_0 +#VOL 5 +6 0x6000 //RX_TDDRC_ALPHA_UP_1 +7 0x6000 //RX_TDDRC_ALPHA_UP_2 +8 0x6000 //RX_TDDRC_ALPHA_UP_3 +9 0x1000 //RX_TDDRC_ALPHA_UP_4 +27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +33 0x7214 //RX_TDDRC_LIMITER_THRD +34 0x0800 //RX_TDDRC_LIMITER_GAIN +112 0x0002 //RX_TDDRC_THRD_0 +113 0x0004 //RX_TDDRC_THRD_1 +114 0x1500 //RX_TDDRC_THRD_2 +115 0x1500 //RX_TDDRC_THRD_3 +116 0x3000 //RX_TDDRC_SLANT_0 +117 0x6E00 //RX_TDDRC_SLANT_1 +118 0x6000 //RX_TDDRC_ALPHA_UP_0 +119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +120 0x0000 //RX_TDDRC_HMNC_FLAG +121 0x199A //RX_TDDRC_HMNC_GAIN +122 0x0001 //RX_TDDRC_SMT_FLAG +123 0x0CCD //RX_TDDRC_SMT_W +124 0x02FD //RX_TDDRC_DRC_GAIN +38 0x0020 //RX_FDEQ_SUBNUM +39 0x4848 //RX_FDEQ_GAIN_0 +40 0x4848 //RX_FDEQ_GAIN_1 +41 0x4340 //RX_FDEQ_GAIN_2 +42 0x3F3D //RX_FDEQ_GAIN_3 +43 0x3935 //RX_FDEQ_GAIN_4 +44 0x3635 //RX_FDEQ_GAIN_5 +45 0x3E46 //RX_FDEQ_GAIN_6 +46 0x494C //RX_FDEQ_GAIN_7 +47 0x4E56 //RX_FDEQ_GAIN_8 +48 0x5F5B //RX_FDEQ_GAIN_9 +49 0x5B48 //RX_FDEQ_GAIN_10 +50 0x4856 //RX_FDEQ_GAIN_11 +51 0x5B60 //RX_FDEQ_GAIN_12 +52 0x7476 //RX_FDEQ_GAIN_13 +53 0x7F7C //RX_FDEQ_GAIN_14 +54 0x7068 //RX_FDEQ_GAIN_15 +55 0x4848 //RX_FDEQ_GAIN_16 +56 0x4848 //RX_FDEQ_GAIN_17 +57 0x4848 //RX_FDEQ_GAIN_18 +58 0x4848 //RX_FDEQ_GAIN_19 +59 0x4848 //RX_FDEQ_GAIN_20 +60 0x4848 //RX_FDEQ_GAIN_21 +61 0x4848 //RX_FDEQ_GAIN_22 +62 0x4848 //RX_FDEQ_GAIN_23 +63 0x0202 //RX_FDEQ_BIN_0 +64 0x0203 //RX_FDEQ_BIN_1 +65 0x0303 //RX_FDEQ_BIN_2 +66 0x0304 //RX_FDEQ_BIN_3 +67 0x0404 //RX_FDEQ_BIN_4 +68 0x0209 //RX_FDEQ_BIN_5 +69 0x0808 //RX_FDEQ_BIN_6 +70 0x090A //RX_FDEQ_BIN_7 +71 0x0B0C //RX_FDEQ_BIN_8 +72 0x0D0E //RX_FDEQ_BIN_9 +73 0x1013 //RX_FDEQ_BIN_10 +74 0x1719 //RX_FDEQ_BIN_11 +75 0x1B1E //RX_FDEQ_BIN_12 +76 0x1E1E //RX_FDEQ_BIN_13 +77 0x1E28 //RX_FDEQ_BIN_14 +78 0x282C //RX_FDEQ_BIN_15 +79 0x0000 //RX_FDEQ_BIN_16 +80 0x0000 //RX_FDEQ_BIN_17 +81 0x0000 //RX_FDEQ_BIN_18 +82 0x0000 //RX_FDEQ_BIN_19 +83 0x0000 //RX_FDEQ_BIN_20 +84 0x0000 //RX_FDEQ_BIN_21 +85 0x0000 //RX_FDEQ_BIN_22 +86 0x0000 //RX_FDEQ_BIN_23 +87 0x4000 //RX_FDEQ_RESRV_0 +88 0x0320 //RX_FDEQ_RESRV_1 +89 0x0018 //RX_FDDRC_BAND_MARGIN_0 +90 0x0035 //RX_FDDRC_BAND_MARGIN_1 +91 0x00D5 //RX_FDDRC_BAND_MARGIN_2 +92 0x0120 //RX_FDDRC_BAND_MARGIN_3 +93 0x0004 //RX_FDDRC_BLOCK_EXP +94 0x5000 //RX_FDDRC_THRD_2_0 +95 0x5000 //RX_FDDRC_THRD_2_1 +96 0x2000 //RX_FDDRC_THRD_2_2 +97 0x5000 //RX_FDDRC_THRD_2_3 +98 0x6400 //RX_FDDRC_THRD_3_0 +99 0x6400 //RX_FDDRC_THRD_3_1 +100 0x2000 //RX_FDDRC_THRD_3_2 +101 0x5000 //RX_FDDRC_THRD_3_3 +102 0x4000 //RX_FDDRC_SLANT_0_0 +103 0x4000 //RX_FDDRC_SLANT_0_1 +104 0x4000 //RX_FDDRC_SLANT_0_2 +105 0x4000 //RX_FDDRC_SLANT_0_3 +106 0x7FFF //RX_FDDRC_SLANT_1_0 +107 0x7FFF //RX_FDDRC_SLANT_1_1 +108 0x7FFF //RX_FDDRC_SLANT_1_2 +109 0x7FFF //RX_FDDRC_SLANT_1_3 +110 0x0000 //RX_FDDRC_RESRV_0 +129 0x0097 //RX_SPK_VOL +130 0x0000 //RX_VOL_RESRV_0 +#VOL 6 +6 0x6000 //RX_TDDRC_ALPHA_UP_1 +7 0x6000 //RX_TDDRC_ALPHA_UP_2 +8 0x6000 //RX_TDDRC_ALPHA_UP_3 +9 0x1000 //RX_TDDRC_ALPHA_UP_4 +27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +33 0x7214 //RX_TDDRC_LIMITER_THRD +34 0x0800 //RX_TDDRC_LIMITER_GAIN +112 0x0002 //RX_TDDRC_THRD_0 +113 0x0004 //RX_TDDRC_THRD_1 +114 0x1500 //RX_TDDRC_THRD_2 +115 0x1500 //RX_TDDRC_THRD_3 +116 0x3000 //RX_TDDRC_SLANT_0 +117 0x6E00 //RX_TDDRC_SLANT_1 +118 0x6000 //RX_TDDRC_ALPHA_UP_0 +119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +120 0x0000 //RX_TDDRC_HMNC_FLAG +121 0x199A //RX_TDDRC_HMNC_GAIN +122 0x0001 //RX_TDDRC_SMT_FLAG +123 0x0CCD //RX_TDDRC_SMT_W +124 0x02FD //RX_TDDRC_DRC_GAIN +38 0x0020 //RX_FDEQ_SUBNUM +39 0x4848 //RX_FDEQ_GAIN_0 +40 0x4848 //RX_FDEQ_GAIN_1 +41 0x4340 //RX_FDEQ_GAIN_2 +42 0x3F3D //RX_FDEQ_GAIN_3 +43 0x3935 //RX_FDEQ_GAIN_4 +44 0x3635 //RX_FDEQ_GAIN_5 +45 0x3E46 //RX_FDEQ_GAIN_6 +46 0x494C //RX_FDEQ_GAIN_7 +47 0x4E56 //RX_FDEQ_GAIN_8 +48 0x5F5B //RX_FDEQ_GAIN_9 +49 0x5B48 //RX_FDEQ_GAIN_10 +50 0x4856 //RX_FDEQ_GAIN_11 +51 0x5B60 //RX_FDEQ_GAIN_12 +52 0x7476 //RX_FDEQ_GAIN_13 +53 0x7F7C //RX_FDEQ_GAIN_14 +54 0x7068 //RX_FDEQ_GAIN_15 +55 0x4848 //RX_FDEQ_GAIN_16 +56 0x4848 //RX_FDEQ_GAIN_17 +57 0x4848 //RX_FDEQ_GAIN_18 +58 0x4848 //RX_FDEQ_GAIN_19 +59 0x4848 //RX_FDEQ_GAIN_20 +60 0x4848 //RX_FDEQ_GAIN_21 +61 0x4848 //RX_FDEQ_GAIN_22 +62 0x4848 //RX_FDEQ_GAIN_23 +63 0x0202 //RX_FDEQ_BIN_0 +64 0x0203 //RX_FDEQ_BIN_1 +65 0x0303 //RX_FDEQ_BIN_2 +66 0x0304 //RX_FDEQ_BIN_3 +67 0x0404 //RX_FDEQ_BIN_4 +68 0x0209 //RX_FDEQ_BIN_5 +69 0x0808 //RX_FDEQ_BIN_6 +70 0x090A //RX_FDEQ_BIN_7 +71 0x0B0C //RX_FDEQ_BIN_8 +72 0x0D0E //RX_FDEQ_BIN_9 +73 0x1013 //RX_FDEQ_BIN_10 +74 0x1719 //RX_FDEQ_BIN_11 +75 0x1B1E //RX_FDEQ_BIN_12 +76 0x1E1E //RX_FDEQ_BIN_13 +77 0x1E28 //RX_FDEQ_BIN_14 +78 0x282C //RX_FDEQ_BIN_15 +79 0x0000 //RX_FDEQ_BIN_16 +80 0x0000 //RX_FDEQ_BIN_17 +81 0x0000 //RX_FDEQ_BIN_18 +82 0x0000 //RX_FDEQ_BIN_19 +83 0x0000 //RX_FDEQ_BIN_20 +84 0x0000 //RX_FDEQ_BIN_21 +85 0x0000 //RX_FDEQ_BIN_22 +86 0x0000 //RX_FDEQ_BIN_23 +87 0x4000 //RX_FDEQ_RESRV_0 +88 0x0320 //RX_FDEQ_RESRV_1 +89 0x0018 //RX_FDDRC_BAND_MARGIN_0 +90 0x0035 //RX_FDDRC_BAND_MARGIN_1 +91 0x00D5 //RX_FDDRC_BAND_MARGIN_2 +92 0x0120 //RX_FDDRC_BAND_MARGIN_3 +93 0x0004 //RX_FDDRC_BLOCK_EXP +94 0x5000 //RX_FDDRC_THRD_2_0 +95 0x5000 //RX_FDDRC_THRD_2_1 +96 0x2000 //RX_FDDRC_THRD_2_2 +97 0x5000 //RX_FDDRC_THRD_2_3 +98 0x6400 //RX_FDDRC_THRD_3_0 +99 0x6400 //RX_FDDRC_THRD_3_1 +100 0x2000 //RX_FDDRC_THRD_3_2 +101 0x5000 //RX_FDDRC_THRD_3_3 +102 0x4000 //RX_FDDRC_SLANT_0_0 +103 0x4000 //RX_FDDRC_SLANT_0_1 +104 0x4000 //RX_FDDRC_SLANT_0_2 +105 0x4000 //RX_FDDRC_SLANT_0_3 +106 0x7FFF //RX_FDDRC_SLANT_1_0 +107 0x7FFF //RX_FDDRC_SLANT_1_1 +108 0x7FFF //RX_FDDRC_SLANT_1_2 +109 0x7FFF //RX_FDDRC_SLANT_1_3 +110 0x0000 //RX_FDDRC_RESRV_0 +129 0x0100 //RX_SPK_VOL +130 0x0000 //RX_VOL_RESRV_0 +#RX 2 +157 0x027C //RX_RECVFUNC_MODE_0 +158 0x0000 //RX_RECVFUNC_MODE_1 +159 0x0003 //RX_SAMPLINGFREQ_SIG +160 0x0003 //RX_SAMPLINGFREQ_PROC +161 0x000A //RX_FRAME_SZ +162 0x0000 //RX_DELAY_OPT +163 0x6000 //RX_TDDRC_ALPHA_UP_1 +164 0x6000 //RX_TDDRC_ALPHA_UP_2 +165 0x6000 //RX_TDDRC_ALPHA_UP_3 +166 0x1000 //RX_TDDRC_ALPHA_UP_4 +167 0x0800 //RX_PGA +168 0x7652 //RX_A_HP +169 0x4000 //RX_B_PE +170 0x7800 //RX_THR_PITCH_DET_0 +171 0x7000 //RX_THR_PITCH_DET_1 +172 0x6000 //RX_THR_PITCH_DET_2 +173 0x0008 //RX_PITCH_BFR_LEN +174 0x0003 //RX_SBD_PITCH_DET +175 0x0100 //RX_PP_RESRV_0 +176 0x0020 //RX_PP_RESRV_1 +177 0x0400 //RX_N_SN_EST +178 0x000C //RX_N2_SN_EST +179 0x0010 //RX_NS_LVL_CTRL +180 0xF800 //RX_THR_SN_EST +181 0x7E00 //RX_LAMBDA_PFILT +182 0x000A //RX_FENS_RESRV_0 +183 0x0190 //RX_FENS_RESRV_1 +184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +187 0x0002 //RX_EXTRA_NS_L +188 0x0800 //RX_EXTRA_NS_A +189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +190 0x7214 //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +192 0x199A //RX_A_POST_FLT +193 0x0000 //RX_LMT_THRD +194 0x4000 //RX_LMT_ALPHA +195 0x0020 //RX_FDEQ_SUBNUM +196 0x484E //RX_FDEQ_GAIN_0 +197 0x4E4E //RX_FDEQ_GAIN_1 +198 0x4E4E //RX_FDEQ_GAIN_2 +199 0x4848 //RX_FDEQ_GAIN_3 +200 0x484E //RX_FDEQ_GAIN_4 +201 0x6E4E //RX_FDEQ_GAIN_5 +202 0x4850 //RX_FDEQ_GAIN_6 +203 0x4848 //RX_FDEQ_GAIN_7 +204 0x4860 //RX_FDEQ_GAIN_8 +205 0x7468 //RX_FDEQ_GAIN_9 +206 0x6060 //RX_FDEQ_GAIN_10 +207 0x6666 //RX_FDEQ_GAIN_11 +208 0x6666 //RX_FDEQ_GAIN_12 +209 0x6666 //RX_FDEQ_GAIN_13 +210 0x6060 //RX_FDEQ_GAIN_14 +211 0x6060 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0202 //RX_FDEQ_BIN_0 +221 0x0203 //RX_FDEQ_BIN_1 +222 0x0303 //RX_FDEQ_BIN_2 +223 0x0304 //RX_FDEQ_BIN_3 +224 0x0404 //RX_FDEQ_BIN_4 +225 0x0209 //RX_FDEQ_BIN_5 +226 0x0808 //RX_FDEQ_BIN_6 +227 0x090A //RX_FDEQ_BIN_7 +228 0x0B0C //RX_FDEQ_BIN_8 +229 0x0D0E //RX_FDEQ_BIN_9 +230 0x1013 //RX_FDEQ_BIN_10 +231 0x1719 //RX_FDEQ_BIN_11 +232 0x1B1E //RX_FDEQ_BIN_12 +233 0x1E1E //RX_FDEQ_BIN_13 +234 0x1E28 //RX_FDEQ_BIN_14 +235 0x282C //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x4000 //RX_FDEQ_RESRV_0 +245 0x0320 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0035 //RX_FDDRC_BAND_MARGIN_1 +248 0x00D5 //RX_FDDRC_BAND_MARGIN_2 +249 0x0120 //RX_FDDRC_BAND_MARGIN_3 +250 0x0004 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x2000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x2000 //RX_FDDRC_THRD_3_2 +258 0x5000 //RX_FDDRC_THRD_3_3 +259 0x4000 //RX_FDDRC_SLANT_0_0 +260 0x4000 //RX_FDDRC_SLANT_0_1 +261 0x4000 //RX_FDDRC_SLANT_0_2 +262 0x4000 //RX_FDDRC_SLANT_0_3 +263 0x7FFF //RX_FDDRC_SLANT_1_0 +264 0x7FFF //RX_FDDRC_SLANT_1_1 +265 0x7FFF //RX_FDDRC_SLANT_1_2 +266 0x7FFF //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +268 0x0002 //RX_FILTINDX +269 0x0002 //RX_TDDRC_THRD_0 +270 0x0004 //RX_TDDRC_THRD_1 +271 0x1A00 //RX_TDDRC_THRD_2 +272 0x1A00 //RX_TDDRC_THRD_3 +273 0x7EB8 //RX_TDDRC_SLANT_0 +274 0x2500 //RX_TDDRC_SLANT_1 +275 0x6000 //RX_TDDRC_ALPHA_UP_0 +276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x199A //RX_TDDRC_HMNC_GAIN +279 0x0001 //RX_TDDRC_SMT_FLAG +280 0x0CCD //RX_TDDRC_SMT_W +281 0x04BC //RX_TDDRC_DRC_GAIN +282 0x7C00 //RX_LAMBDA_PKA_FP +283 0x2000 //RX_TPKA_FP +284 0x2000 //RX_MIN_G_FP +285 0x0080 //RX_MAX_G_FP +286 0x0019 //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 +288 0x0000 //RX_MAXLEVEL_CNG +289 0x3000 //RX_BWE_UV_TH +290 0x3000 //RX_BWE_UV_TH2 +291 0x1800 //RX_BWE_UV_TH3 +292 0x1000 //RX_BWE_V_TH +293 0x04CD //RX_BWE_GAIN1_V_TH1 +294 0x0F33 //RX_BWE_GAIN1_V_TH2 +295 0x7333 //RX_BWE_UV_EQ +296 0x199A //RX_BWE_V_EQ +297 0x7333 //RX_BWE_TONE_TH +298 0x0004 //RX_BWE_UV_HOLD_T +299 0x6CCD //RX_BWE_GAIN2_ALPHA +300 0x799A //RX_BWE_GAIN3_ALPHA +301 0x001E //RX_BWE_CUTOFF +302 0x3000 //RX_BWE_GAINFILL +303 0x3200 //RX_BWE_MAXTH_TONE +304 0x2000 //RX_BWE_EQ_0 +305 0x2000 //RX_BWE_EQ_1 +306 0x2000 //RX_BWE_EQ_2 +307 0x2000 //RX_BWE_EQ_3 +308 0x2000 //RX_BWE_EQ_4 +309 0x2000 //RX_BWE_EQ_5 +310 0x2000 //RX_BWE_EQ_6 +311 0x0000 //RX_BWE_RESRV_0 +312 0x0000 //RX_BWE_RESRV_1 +313 0x0000 //RX_BWE_RESRV_2 +#VOL 0 +163 0x6000 //RX_TDDRC_ALPHA_UP_1 +164 0x6000 //RX_TDDRC_ALPHA_UP_2 +165 0x6000 //RX_TDDRC_ALPHA_UP_3 +166 0x1000 //RX_TDDRC_ALPHA_UP_4 +184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +190 0x7214 //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +269 0x0002 //RX_TDDRC_THRD_0 +270 0x0004 //RX_TDDRC_THRD_1 +271 0x1A00 //RX_TDDRC_THRD_2 +272 0x1A00 //RX_TDDRC_THRD_3 +273 0x7EB8 //RX_TDDRC_SLANT_0 +274 0x2500 //RX_TDDRC_SLANT_1 +275 0x6000 //RX_TDDRC_ALPHA_UP_0 +276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x199A //RX_TDDRC_HMNC_GAIN +279 0x0001 //RX_TDDRC_SMT_FLAG +280 0x0CCD //RX_TDDRC_SMT_W +281 0x04BC //RX_TDDRC_DRC_GAIN +195 0x0020 //RX_FDEQ_SUBNUM +196 0x484E //RX_FDEQ_GAIN_0 +197 0x4E4E //RX_FDEQ_GAIN_1 +198 0x4E4E //RX_FDEQ_GAIN_2 +199 0x4848 //RX_FDEQ_GAIN_3 +200 0x484E //RX_FDEQ_GAIN_4 +201 0x6E4E //RX_FDEQ_GAIN_5 +202 0x4850 //RX_FDEQ_GAIN_6 +203 0x4848 //RX_FDEQ_GAIN_7 +204 0x4860 //RX_FDEQ_GAIN_8 +205 0x7468 //RX_FDEQ_GAIN_9 +206 0x6060 //RX_FDEQ_GAIN_10 +207 0x6666 //RX_FDEQ_GAIN_11 +208 0x6666 //RX_FDEQ_GAIN_12 +209 0x6666 //RX_FDEQ_GAIN_13 +210 0x6060 //RX_FDEQ_GAIN_14 +211 0x6060 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0202 //RX_FDEQ_BIN_0 +221 0x0203 //RX_FDEQ_BIN_1 +222 0x0303 //RX_FDEQ_BIN_2 +223 0x0304 //RX_FDEQ_BIN_3 +224 0x0404 //RX_FDEQ_BIN_4 +225 0x0209 //RX_FDEQ_BIN_5 +226 0x0808 //RX_FDEQ_BIN_6 +227 0x090A //RX_FDEQ_BIN_7 +228 0x0B0C //RX_FDEQ_BIN_8 +229 0x0D0E //RX_FDEQ_BIN_9 +230 0x1013 //RX_FDEQ_BIN_10 +231 0x1719 //RX_FDEQ_BIN_11 +232 0x1B1E //RX_FDEQ_BIN_12 +233 0x1E1E //RX_FDEQ_BIN_13 +234 0x1E28 //RX_FDEQ_BIN_14 +235 0x282C //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x4000 //RX_FDEQ_RESRV_0 +245 0x0320 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0035 //RX_FDDRC_BAND_MARGIN_1 +248 0x00D5 //RX_FDDRC_BAND_MARGIN_2 +249 0x0120 //RX_FDDRC_BAND_MARGIN_3 +250 0x0004 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x2000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x2000 //RX_FDDRC_THRD_3_2 +258 0x5000 //RX_FDDRC_THRD_3_3 +259 0x4000 //RX_FDDRC_SLANT_0_0 +260 0x4000 //RX_FDDRC_SLANT_0_1 +261 0x4000 //RX_FDDRC_SLANT_0_2 +262 0x4000 //RX_FDDRC_SLANT_0_3 +263 0x7FFF //RX_FDDRC_SLANT_1_0 +264 0x7FFF //RX_FDDRC_SLANT_1_1 +265 0x7FFF //RX_FDDRC_SLANT_1_2 +266 0x7FFF //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +286 0x0019 //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 +#VOL 1 +163 0x6000 //RX_TDDRC_ALPHA_UP_1 +164 0x6000 //RX_TDDRC_ALPHA_UP_2 +165 0x6000 //RX_TDDRC_ALPHA_UP_3 +166 0x1000 //RX_TDDRC_ALPHA_UP_4 +184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +190 0x7214 //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +269 0x0002 //RX_TDDRC_THRD_0 +270 0x0004 //RX_TDDRC_THRD_1 +271 0x1A00 //RX_TDDRC_THRD_2 +272 0x1A00 //RX_TDDRC_THRD_3 +273 0x7EB8 //RX_TDDRC_SLANT_0 +274 0x2500 //RX_TDDRC_SLANT_1 +275 0x6000 //RX_TDDRC_ALPHA_UP_0 +276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x199A //RX_TDDRC_HMNC_GAIN +279 0x0001 //RX_TDDRC_SMT_FLAG +280 0x0CCD //RX_TDDRC_SMT_W +281 0x04BC //RX_TDDRC_DRC_GAIN +195 0x0020 //RX_FDEQ_SUBNUM +196 0x484E //RX_FDEQ_GAIN_0 +197 0x4E4E //RX_FDEQ_GAIN_1 +198 0x4E4E //RX_FDEQ_GAIN_2 +199 0x4848 //RX_FDEQ_GAIN_3 +200 0x484E //RX_FDEQ_GAIN_4 +201 0x6E4E //RX_FDEQ_GAIN_5 +202 0x4850 //RX_FDEQ_GAIN_6 +203 0x4848 //RX_FDEQ_GAIN_7 +204 0x4860 //RX_FDEQ_GAIN_8 +205 0x7468 //RX_FDEQ_GAIN_9 +206 0x6060 //RX_FDEQ_GAIN_10 +207 0x6666 //RX_FDEQ_GAIN_11 +208 0x6666 //RX_FDEQ_GAIN_12 +209 0x6666 //RX_FDEQ_GAIN_13 +210 0x6060 //RX_FDEQ_GAIN_14 +211 0x6060 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0202 //RX_FDEQ_BIN_0 +221 0x0203 //RX_FDEQ_BIN_1 +222 0x0303 //RX_FDEQ_BIN_2 +223 0x0304 //RX_FDEQ_BIN_3 +224 0x0404 //RX_FDEQ_BIN_4 +225 0x0209 //RX_FDEQ_BIN_5 +226 0x0808 //RX_FDEQ_BIN_6 +227 0x090A //RX_FDEQ_BIN_7 +228 0x0B0C //RX_FDEQ_BIN_8 +229 0x0D0E //RX_FDEQ_BIN_9 +230 0x1013 //RX_FDEQ_BIN_10 +231 0x1719 //RX_FDEQ_BIN_11 +232 0x1B1E //RX_FDEQ_BIN_12 +233 0x1E1E //RX_FDEQ_BIN_13 +234 0x1E28 //RX_FDEQ_BIN_14 +235 0x282C //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x4000 //RX_FDEQ_RESRV_0 +245 0x0320 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0035 //RX_FDDRC_BAND_MARGIN_1 +248 0x00D5 //RX_FDDRC_BAND_MARGIN_2 +249 0x0120 //RX_FDDRC_BAND_MARGIN_3 +250 0x0004 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x2000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x2000 //RX_FDDRC_THRD_3_2 +258 0x5000 //RX_FDDRC_THRD_3_3 +259 0x4000 //RX_FDDRC_SLANT_0_0 +260 0x4000 //RX_FDDRC_SLANT_0_1 +261 0x4000 //RX_FDDRC_SLANT_0_2 +262 0x4000 //RX_FDDRC_SLANT_0_3 +263 0x7FFF //RX_FDDRC_SLANT_1_0 +264 0x7FFF //RX_FDDRC_SLANT_1_1 +265 0x7FFF //RX_FDDRC_SLANT_1_2 +266 0x7FFF //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +286 0x0023 //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 +#VOL 2 +163 0x6000 //RX_TDDRC_ALPHA_UP_1 +164 0x6000 //RX_TDDRC_ALPHA_UP_2 +165 0x6000 //RX_TDDRC_ALPHA_UP_3 +166 0x1000 //RX_TDDRC_ALPHA_UP_4 +184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +190 0x7214 //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +269 0x0002 //RX_TDDRC_THRD_0 +270 0x0004 //RX_TDDRC_THRD_1 +271 0x1A00 //RX_TDDRC_THRD_2 +272 0x1A00 //RX_TDDRC_THRD_3 +273 0x7EB8 //RX_TDDRC_SLANT_0 +274 0x2500 //RX_TDDRC_SLANT_1 +275 0x6000 //RX_TDDRC_ALPHA_UP_0 +276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x199A //RX_TDDRC_HMNC_GAIN +279 0x0001 //RX_TDDRC_SMT_FLAG +280 0x0CCD //RX_TDDRC_SMT_W +281 0x04BC //RX_TDDRC_DRC_GAIN +195 0x0020 //RX_FDEQ_SUBNUM +196 0x484E //RX_FDEQ_GAIN_0 +197 0x4E4E //RX_FDEQ_GAIN_1 +198 0x4E4E //RX_FDEQ_GAIN_2 +199 0x4848 //RX_FDEQ_GAIN_3 +200 0x484E //RX_FDEQ_GAIN_4 +201 0x6E4E //RX_FDEQ_GAIN_5 +202 0x4850 //RX_FDEQ_GAIN_6 +203 0x4848 //RX_FDEQ_GAIN_7 +204 0x4860 //RX_FDEQ_GAIN_8 +205 0x7468 //RX_FDEQ_GAIN_9 +206 0x6060 //RX_FDEQ_GAIN_10 +207 0x6666 //RX_FDEQ_GAIN_11 +208 0x6666 //RX_FDEQ_GAIN_12 +209 0x6666 //RX_FDEQ_GAIN_13 +210 0x6060 //RX_FDEQ_GAIN_14 +211 0x6060 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0202 //RX_FDEQ_BIN_0 +221 0x0203 //RX_FDEQ_BIN_1 +222 0x0303 //RX_FDEQ_BIN_2 +223 0x0304 //RX_FDEQ_BIN_3 +224 0x0404 //RX_FDEQ_BIN_4 +225 0x0209 //RX_FDEQ_BIN_5 +226 0x0808 //RX_FDEQ_BIN_6 +227 0x090A //RX_FDEQ_BIN_7 +228 0x0B0C //RX_FDEQ_BIN_8 +229 0x0D0E //RX_FDEQ_BIN_9 +230 0x1013 //RX_FDEQ_BIN_10 +231 0x1719 //RX_FDEQ_BIN_11 +232 0x1B1E //RX_FDEQ_BIN_12 +233 0x1E1E //RX_FDEQ_BIN_13 +234 0x1E28 //RX_FDEQ_BIN_14 +235 0x282C //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x4000 //RX_FDEQ_RESRV_0 +245 0x0320 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0035 //RX_FDDRC_BAND_MARGIN_1 +248 0x00D5 //RX_FDDRC_BAND_MARGIN_2 +249 0x0120 //RX_FDDRC_BAND_MARGIN_3 +250 0x0004 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x2000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x2000 //RX_FDDRC_THRD_3_2 +258 0x5000 //RX_FDDRC_THRD_3_3 +259 0x4000 //RX_FDDRC_SLANT_0_0 +260 0x4000 //RX_FDDRC_SLANT_0_1 +261 0x4000 //RX_FDDRC_SLANT_0_2 +262 0x4000 //RX_FDDRC_SLANT_0_3 +263 0x7FFF //RX_FDDRC_SLANT_1_0 +264 0x7FFF //RX_FDDRC_SLANT_1_1 +265 0x7FFF //RX_FDDRC_SLANT_1_2 +266 0x7FFF //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +286 0x0032 //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 +#VOL 3 +163 0x6000 //RX_TDDRC_ALPHA_UP_1 +164 0x6000 //RX_TDDRC_ALPHA_UP_2 +165 0x6000 //RX_TDDRC_ALPHA_UP_3 +166 0x1000 //RX_TDDRC_ALPHA_UP_4 +184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +190 0x7214 //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +269 0x0002 //RX_TDDRC_THRD_0 +270 0x0004 //RX_TDDRC_THRD_1 +271 0x1A00 //RX_TDDRC_THRD_2 +272 0x1A00 //RX_TDDRC_THRD_3 +273 0x7EB8 //RX_TDDRC_SLANT_0 +274 0x2500 //RX_TDDRC_SLANT_1 +275 0x6000 //RX_TDDRC_ALPHA_UP_0 +276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x199A //RX_TDDRC_HMNC_GAIN +279 0x0001 //RX_TDDRC_SMT_FLAG +280 0x0CCD //RX_TDDRC_SMT_W +281 0x04BC //RX_TDDRC_DRC_GAIN +195 0x0020 //RX_FDEQ_SUBNUM +196 0x484E //RX_FDEQ_GAIN_0 +197 0x4E4E //RX_FDEQ_GAIN_1 +198 0x4E4E //RX_FDEQ_GAIN_2 +199 0x4848 //RX_FDEQ_GAIN_3 +200 0x484E //RX_FDEQ_GAIN_4 +201 0x6E4E //RX_FDEQ_GAIN_5 +202 0x4850 //RX_FDEQ_GAIN_6 +203 0x4848 //RX_FDEQ_GAIN_7 +204 0x4860 //RX_FDEQ_GAIN_8 +205 0x7468 //RX_FDEQ_GAIN_9 +206 0x6060 //RX_FDEQ_GAIN_10 +207 0x6666 //RX_FDEQ_GAIN_11 +208 0x6666 //RX_FDEQ_GAIN_12 +209 0x6666 //RX_FDEQ_GAIN_13 +210 0x6060 //RX_FDEQ_GAIN_14 +211 0x6060 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0202 //RX_FDEQ_BIN_0 +221 0x0203 //RX_FDEQ_BIN_1 +222 0x0303 //RX_FDEQ_BIN_2 +223 0x0304 //RX_FDEQ_BIN_3 +224 0x0404 //RX_FDEQ_BIN_4 +225 0x0209 //RX_FDEQ_BIN_5 +226 0x0808 //RX_FDEQ_BIN_6 +227 0x090A //RX_FDEQ_BIN_7 +228 0x0B0C //RX_FDEQ_BIN_8 +229 0x0D0E //RX_FDEQ_BIN_9 +230 0x1013 //RX_FDEQ_BIN_10 +231 0x1719 //RX_FDEQ_BIN_11 +232 0x1B1E //RX_FDEQ_BIN_12 +233 0x1E1E //RX_FDEQ_BIN_13 +234 0x1E28 //RX_FDEQ_BIN_14 +235 0x282C //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x4000 //RX_FDEQ_RESRV_0 +245 0x0320 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0035 //RX_FDDRC_BAND_MARGIN_1 +248 0x00D5 //RX_FDDRC_BAND_MARGIN_2 +249 0x0120 //RX_FDDRC_BAND_MARGIN_3 +250 0x0004 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x2000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x2000 //RX_FDDRC_THRD_3_2 +258 0x5000 //RX_FDDRC_THRD_3_3 +259 0x4000 //RX_FDDRC_SLANT_0_0 +260 0x4000 //RX_FDDRC_SLANT_0_1 +261 0x4000 //RX_FDDRC_SLANT_0_2 +262 0x4000 //RX_FDDRC_SLANT_0_3 +263 0x7FFF //RX_FDDRC_SLANT_1_0 +264 0x7FFF //RX_FDDRC_SLANT_1_1 +265 0x7FFF //RX_FDDRC_SLANT_1_2 +266 0x7FFF //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +286 0x0048 //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 +#VOL 4 +163 0x6000 //RX_TDDRC_ALPHA_UP_1 +164 0x6000 //RX_TDDRC_ALPHA_UP_2 +165 0x6000 //RX_TDDRC_ALPHA_UP_3 +166 0x1000 //RX_TDDRC_ALPHA_UP_4 +184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +190 0x7214 //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +269 0x0002 //RX_TDDRC_THRD_0 +270 0x0004 //RX_TDDRC_THRD_1 +271 0x1A00 //RX_TDDRC_THRD_2 +272 0x1A00 //RX_TDDRC_THRD_3 +273 0x7EB8 //RX_TDDRC_SLANT_0 +274 0x2500 //RX_TDDRC_SLANT_1 +275 0x6000 //RX_TDDRC_ALPHA_UP_0 +276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x199A //RX_TDDRC_HMNC_GAIN +279 0x0001 //RX_TDDRC_SMT_FLAG +280 0x0CCD //RX_TDDRC_SMT_W +281 0x04BC //RX_TDDRC_DRC_GAIN +195 0x0020 //RX_FDEQ_SUBNUM +196 0x484E //RX_FDEQ_GAIN_0 +197 0x4E4E //RX_FDEQ_GAIN_1 +198 0x4E4E //RX_FDEQ_GAIN_2 +199 0x4848 //RX_FDEQ_GAIN_3 +200 0x484E //RX_FDEQ_GAIN_4 +201 0x6E4E //RX_FDEQ_GAIN_5 +202 0x4850 //RX_FDEQ_GAIN_6 +203 0x4848 //RX_FDEQ_GAIN_7 +204 0x4860 //RX_FDEQ_GAIN_8 +205 0x7468 //RX_FDEQ_GAIN_9 +206 0x6060 //RX_FDEQ_GAIN_10 +207 0x6666 //RX_FDEQ_GAIN_11 +208 0x6666 //RX_FDEQ_GAIN_12 +209 0x6666 //RX_FDEQ_GAIN_13 +210 0x6060 //RX_FDEQ_GAIN_14 +211 0x6060 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0202 //RX_FDEQ_BIN_0 +221 0x0203 //RX_FDEQ_BIN_1 +222 0x0303 //RX_FDEQ_BIN_2 +223 0x0304 //RX_FDEQ_BIN_3 +224 0x0404 //RX_FDEQ_BIN_4 +225 0x0209 //RX_FDEQ_BIN_5 +226 0x0808 //RX_FDEQ_BIN_6 +227 0x090A //RX_FDEQ_BIN_7 +228 0x0B0C //RX_FDEQ_BIN_8 +229 0x0D0E //RX_FDEQ_BIN_9 +230 0x1013 //RX_FDEQ_BIN_10 +231 0x1719 //RX_FDEQ_BIN_11 +232 0x1B1E //RX_FDEQ_BIN_12 +233 0x1E1E //RX_FDEQ_BIN_13 +234 0x1E28 //RX_FDEQ_BIN_14 +235 0x282C //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x4000 //RX_FDEQ_RESRV_0 +245 0x0320 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0035 //RX_FDDRC_BAND_MARGIN_1 +248 0x00D5 //RX_FDDRC_BAND_MARGIN_2 +249 0x0120 //RX_FDDRC_BAND_MARGIN_3 +250 0x0004 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x2000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x2000 //RX_FDDRC_THRD_3_2 +258 0x5000 //RX_FDDRC_THRD_3_3 +259 0x4000 //RX_FDDRC_SLANT_0_0 +260 0x4000 //RX_FDDRC_SLANT_0_1 +261 0x4000 //RX_FDDRC_SLANT_0_2 +262 0x4000 //RX_FDDRC_SLANT_0_3 +263 0x7FFF //RX_FDDRC_SLANT_1_0 +264 0x7FFF //RX_FDDRC_SLANT_1_1 +265 0x7FFF //RX_FDDRC_SLANT_1_2 +266 0x7FFF //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +286 0x0068 //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 +#VOL 5 +163 0x6000 //RX_TDDRC_ALPHA_UP_1 +164 0x6000 //RX_TDDRC_ALPHA_UP_2 +165 0x6000 //RX_TDDRC_ALPHA_UP_3 +166 0x1000 //RX_TDDRC_ALPHA_UP_4 +184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +190 0x7214 //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +269 0x0002 //RX_TDDRC_THRD_0 +270 0x0004 //RX_TDDRC_THRD_1 +271 0x1A00 //RX_TDDRC_THRD_2 +272 0x1A00 //RX_TDDRC_THRD_3 +273 0x7EB8 //RX_TDDRC_SLANT_0 +274 0x2500 //RX_TDDRC_SLANT_1 +275 0x6000 //RX_TDDRC_ALPHA_UP_0 +276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x199A //RX_TDDRC_HMNC_GAIN +279 0x0001 //RX_TDDRC_SMT_FLAG +280 0x0CCD //RX_TDDRC_SMT_W +281 0x04BC //RX_TDDRC_DRC_GAIN +195 0x0020 //RX_FDEQ_SUBNUM +196 0x484E //RX_FDEQ_GAIN_0 +197 0x4E4E //RX_FDEQ_GAIN_1 +198 0x4E4E //RX_FDEQ_GAIN_2 +199 0x4848 //RX_FDEQ_GAIN_3 +200 0x484E //RX_FDEQ_GAIN_4 +201 0x6E4E //RX_FDEQ_GAIN_5 +202 0x4850 //RX_FDEQ_GAIN_6 +203 0x4848 //RX_FDEQ_GAIN_7 +204 0x4860 //RX_FDEQ_GAIN_8 +205 0x7468 //RX_FDEQ_GAIN_9 +206 0x6060 //RX_FDEQ_GAIN_10 +207 0x6666 //RX_FDEQ_GAIN_11 +208 0x6666 //RX_FDEQ_GAIN_12 +209 0x6666 //RX_FDEQ_GAIN_13 +210 0x6060 //RX_FDEQ_GAIN_14 +211 0x6060 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0202 //RX_FDEQ_BIN_0 +221 0x0203 //RX_FDEQ_BIN_1 +222 0x0303 //RX_FDEQ_BIN_2 +223 0x0304 //RX_FDEQ_BIN_3 +224 0x0404 //RX_FDEQ_BIN_4 +225 0x0209 //RX_FDEQ_BIN_5 +226 0x0808 //RX_FDEQ_BIN_6 +227 0x090A //RX_FDEQ_BIN_7 +228 0x0B0C //RX_FDEQ_BIN_8 +229 0x0D0E //RX_FDEQ_BIN_9 +230 0x1013 //RX_FDEQ_BIN_10 +231 0x1719 //RX_FDEQ_BIN_11 +232 0x1B1E //RX_FDEQ_BIN_12 +233 0x1E1E //RX_FDEQ_BIN_13 +234 0x1E28 //RX_FDEQ_BIN_14 +235 0x282C //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x4000 //RX_FDEQ_RESRV_0 +245 0x0320 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0035 //RX_FDDRC_BAND_MARGIN_1 +248 0x00D5 //RX_FDDRC_BAND_MARGIN_2 +249 0x0120 //RX_FDDRC_BAND_MARGIN_3 +250 0x0004 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x2000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x2000 //RX_FDDRC_THRD_3_2 +258 0x5000 //RX_FDDRC_THRD_3_3 +259 0x4000 //RX_FDDRC_SLANT_0_0 +260 0x4000 //RX_FDDRC_SLANT_0_1 +261 0x4000 //RX_FDDRC_SLANT_0_2 +262 0x4000 //RX_FDDRC_SLANT_0_3 +263 0x7FFF //RX_FDDRC_SLANT_1_0 +264 0x7FFF //RX_FDDRC_SLANT_1_1 +265 0x7FFF //RX_FDDRC_SLANT_1_2 +266 0x7FFF //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +286 0x0097 //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 +#VOL 6 +163 0x6000 //RX_TDDRC_ALPHA_UP_1 +164 0x6000 //RX_TDDRC_ALPHA_UP_2 +165 0x6000 //RX_TDDRC_ALPHA_UP_3 +166 0x1000 //RX_TDDRC_ALPHA_UP_4 +184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +190 0x7214 //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +269 0x0002 //RX_TDDRC_THRD_0 +270 0x0004 //RX_TDDRC_THRD_1 +271 0x1A00 //RX_TDDRC_THRD_2 +272 0x1A00 //RX_TDDRC_THRD_3 +273 0x7EB8 //RX_TDDRC_SLANT_0 +274 0x2500 //RX_TDDRC_SLANT_1 +275 0x6000 //RX_TDDRC_ALPHA_UP_0 +276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x199A //RX_TDDRC_HMNC_GAIN +279 0x0001 //RX_TDDRC_SMT_FLAG +280 0x0CCD //RX_TDDRC_SMT_W +281 0x04BC //RX_TDDRC_DRC_GAIN +195 0x0020 //RX_FDEQ_SUBNUM +196 0x484E //RX_FDEQ_GAIN_0 +197 0x4E4E //RX_FDEQ_GAIN_1 +198 0x4E4E //RX_FDEQ_GAIN_2 +199 0x4848 //RX_FDEQ_GAIN_3 +200 0x484E //RX_FDEQ_GAIN_4 +201 0x6E4E //RX_FDEQ_GAIN_5 +202 0x4850 //RX_FDEQ_GAIN_6 +203 0x4848 //RX_FDEQ_GAIN_7 +204 0x4860 //RX_FDEQ_GAIN_8 +205 0x7468 //RX_FDEQ_GAIN_9 +206 0x6060 //RX_FDEQ_GAIN_10 +207 0x6666 //RX_FDEQ_GAIN_11 +208 0x6666 //RX_FDEQ_GAIN_12 +209 0x6666 //RX_FDEQ_GAIN_13 +210 0x6060 //RX_FDEQ_GAIN_14 +211 0x6060 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0202 //RX_FDEQ_BIN_0 +221 0x0203 //RX_FDEQ_BIN_1 +222 0x0303 //RX_FDEQ_BIN_2 +223 0x0304 //RX_FDEQ_BIN_3 +224 0x0404 //RX_FDEQ_BIN_4 +225 0x0209 //RX_FDEQ_BIN_5 +226 0x0808 //RX_FDEQ_BIN_6 +227 0x090A //RX_FDEQ_BIN_7 +228 0x0B0C //RX_FDEQ_BIN_8 +229 0x0D0E //RX_FDEQ_BIN_9 +230 0x1013 //RX_FDEQ_BIN_10 +231 0x1719 //RX_FDEQ_BIN_11 +232 0x1B1E //RX_FDEQ_BIN_12 +233 0x1E1E //RX_FDEQ_BIN_13 +234 0x1E28 //RX_FDEQ_BIN_14 +235 0x282C //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x4000 //RX_FDEQ_RESRV_0 +245 0x0320 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0035 //RX_FDDRC_BAND_MARGIN_1 +248 0x00D5 //RX_FDDRC_BAND_MARGIN_2 +249 0x0120 //RX_FDDRC_BAND_MARGIN_3 +250 0x0004 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x2000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x2000 //RX_FDDRC_THRD_3_2 +258 0x5000 //RX_FDDRC_THRD_3_3 +259 0x4000 //RX_FDDRC_SLANT_0_0 +260 0x4000 //RX_FDDRC_SLANT_0_1 +261 0x4000 //RX_FDDRC_SLANT_0_2 +262 0x4000 //RX_FDDRC_SLANT_0_3 +263 0x7FFF //RX_FDDRC_SLANT_1_0 +264 0x7FFF //RX_FDDRC_SLANT_1_1 +265 0x7FFF //RX_FDDRC_SLANT_1_2 +266 0x7FFF //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +286 0x0100 //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 + +#CASE_NAME HANDSFREE-HANDSFREE-RESERVE1-SWB +#PARAM_MODE Full +#PARAM_TYPE TX+2RX +#TOTAL_CUSTOM_STEP 7+7 +#TX +0 0x0001 //TX_OPERATION_MODE_0 +1 0x0001 //TX_OPERATION_MODE_1 +2 0x0073 //TX_PATCH_REG +3 0x6B54 //TX_SENDFUNC_MODE_0 +4 0x0001 //TX_SENDFUNC_MODE_1 +5 0x0003 //TX_NUM_MIC +6 0x0003 //TX_SAMPLINGFREQ_SIG +7 0x0003 //TX_SAMPLINGFREQ_PROC +8 0x000A //TX_FRAME_SZ_SIG +9 0x000A //TX_FRAME_SZ +10 0x0000 //TX_DELAY_OPT +11 0x0028 //TX_MAX_TAIL_LENGTH +12 0x0001 //TX_NUM_LOUTCHN +13 0x0001 //TX_MAXNUM_AECREF +14 0x0000 //TX_DBG_FUNC_REG +15 0x0000 //TX_DBG_FUNC_REG1 +16 0x0000 //TX_SYS_RESRV_0 +17 0x0000 //TX_SYS_RESRV_1 +18 0x0000 //TX_SYS_RESRV_2 +19 0x0000 //TX_SYS_RESRV_3 +20 0x0000 //TX_DIST2REF0 +21 0x00A3 //TX_DIST2REF1 +22 0x001B //TX_DIST2REF_02 +23 0x0000 //TX_DIST2REF_03 +24 0x0000 //TX_DIST2REF_04 +25 0x0000 //TX_DIST2REF_05 +26 0x0000 //TX_MMIC +27 0x1000 //TX_PGA_0 +28 0x1000 //TX_PGA_1 +29 0x1000 //TX_PGA_2 +30 0x0000 //TX_PGA_3 +31 0x0000 //TX_PGA_4 +32 0x0000 //TX_PGA_5 +33 0x0001 //TX_MIC_PAIRS +34 0x0000 //TX_MIC_PAIRS_HS +35 0x0002 //TX_MICS_FOR_BF +36 0x0000 //TX_MIC_PAIRS_FORL1 +37 0x0002 //TX_MICS_OF_PAIR0 +38 0x0002 //TX_MICS_OF_PAIR1 +39 0x0002 //TX_MICS_OF_PAIR2 +40 0x0002 //TX_MICS_OF_PAIR3 +41 0x0000 //TX_MIC_DATA_SRC0 +42 0x0002 //TX_MIC_DATA_SRC1 +43 0x0001 //TX_MIC_DATA_SRC2 +44 0x0000 //TX_MIC_DATA_SRC3 +45 0x0000 //TX_MIC_PAIR_CH_04 +46 0x0000 //TX_MIC_PAIR_CH_05 +47 0x0000 //TX_MIC_PAIR_CH_10 +48 0x0000 //TX_MIC_PAIR_CH_11 +49 0x0000 //TX_MIC_PAIR_CH_12 +50 0x0000 //TX_MIC_PAIR_CH_13 +51 0x0000 //TX_MIC_PAIR_CH_14 +52 0x05DC //TX_HD_BIN_MASK +53 0x0010 //TX_HD_SUBAND_MASK +54 0x19A1 //TX_HD_FRAME_AVG_MASK +55 0x0320 //TX_HD_MIN_FRQ +56 0x1000 //TX_HD_ALPHA_PSD +57 0x1100 //TX_T_PHPR1 +58 0x0000 //TX_T_PHPR2 +59 0x0000 //TX_T_PTPR +60 0x0000 //TX_T_PNPR +61 0x0000 //TX_T_PAPR1 +62 0xEE6C //TX_T_PSDVAT +63 0x0800 //TX_CNT +64 0x4000 //TX_ANTI_HOWL_GAIN +65 0x0001 //TX_MICFORBFMARK_0 +66 0x0001 //TX_MICFORBFMARK_1 +67 0x0001 //TX_MICFORBFMARK_2 +68 0x0001 //TX_MICFORBFMARK_3 +69 0x0001 //TX_MICFORBFMARK_4 +70 0x0001 //TX_MICFORBFMARK_5 +71 0x0000 //TX_DIST2REF_10 +72 0x3B33 //TX_DIST2REF_11 +73 0x0A70 //TX_DIST2REF2 +74 0x0000 //TX_DIST2REF_13 +75 0x0000 //TX_DIST2REF_14 +76 0x0000 //TX_DIST2REF_15 +77 0x0000 //TX_DIST2REF_20 +78 0x0000 //TX_DIST2REF_21 +79 0x0000 //TX_DIST2REF_22 +80 0x0000 //TX_DIST2REF_23 +81 0x0000 //TX_DIST2REF_24 +82 0x0000 //TX_DIST2REF_25 +83 0x0000 //TX_DIST2REF_30 +84 0x0000 //TX_DIST2REF_31 +85 0x0000 //TX_DIST2REF_32 +86 0x0000 //TX_DIST2REF_33 +87 0x0000 //TX_DIST2REF_34 +88 0x0000 //TX_DIST2REF_35 +89 0x0000 //TX_MIC_LOC_00 +90 0x0000 //TX_MIC_LOC_01 +91 0x0000 //TX_MIC_LOC_02 +92 0x0000 //TX_MIC_LOC_03 +93 0x0000 //TX_MIC_LOC_04 +94 0x0000 //TX_MIC_LOC_05 +95 0x0000 //TX_MIC_LOC_10 +96 0x0000 //TX_MIC_LOC_11 +97 0x0000 //TX_MIC_LOC_12 +98 0x0000 //TX_MIC_LOC_13 +99 0x0000 //TX_MIC_LOC_14 +100 0x0000 //TX_MIC_LOC_15 +101 0x0000 //TX_MIC_LOC_20 +102 0x0000 //TX_MIC_LOC_21 +103 0x0000 //TX_MIC_LOC_22 +104 0x0000 //TX_MIC_LOC_23 +105 0x0000 //TX_MIC_LOC_24 +106 0x0000 //TX_MIC_LOC_25 +107 0x0800 //TX_MIC_REFBLK_VOLUME +108 0x0CAE //TX_MIC_BLOCK_VOLUME +109 0x0000 //TX_INVERSE_MASK +110 0x0000 //TX_ADCS_MASK +111 0x04D0 //TX_ADCS_GAIN +112 0x4000 //TX_NFC_GAINFAC +113 0x0000 //TX_MAINMIC_BLKFACTOR +114 0x0000 //TX_REFMIC_BLKFACTOR +115 0x0000 //TX_BLMIC_BLKFACTOR +116 0x0000 //TX_BRMIC_BLKFACTOR +117 0x0031 //TX_MICBLK_START_BIN +118 0x0060 //TX_MICBLK_END_BIN +119 0x0015 //TX_MICBLK_FE_HOLD +120 0xFFF2 //TX_MICBLK_MR_EXP_TH +121 0xFFF2 //TX_MICBLK_LR_EXP_TH +122 0x0015 //TX_FENE_HOLD +123 0x4000 //TX_FE_ENER_TH_MTS +124 0x0004 //TX_FE_ENER_TH_EXP +125 0x6000 //TX_C_POST_FLT_MIC_MAINBLK +126 0x6000 //TX_C_POST_FLT_MIC_REFBLK +127 0x0010 //TX_MIC_BLOCK_N +128 0x7B02 //TX_A_HP +129 0x4000 //TX_B_PE +130 0x5000 //TX_THR_PITCH_DET_0 +131 0x4800 //TX_THR_PITCH_DET_1 +132 0x4000 //TX_THR_PITCH_DET_2 +133 0x0008 //TX_PITCH_BFR_LEN +134 0x0003 //TX_SBD_PITCH_DET +135 0x0050 //TX_TD_AEC_L +136 0x4000 //TX_MU0_UNP_TD_AEC +137 0x1000 //TX_MU0_PTD_TD_AEC +138 0x0000 //TX_PP_RESRV_0 +139 0x2A94 //TX_PP_RESRV_1 +140 0x55F0 //TX_PP_RESRV_2 +141 0x0000 //TX_PP_RESRV_3 +142 0x0000 //TX_PP_RESRV_4 +143 0x0000 //TX_PP_RESRV_5 +144 0x0000 //TX_PP_RESRV_6 +145 0x0000 //TX_PP_RESRV_7 +146 0x0028 //TX_TAIL_LENGTH +147 0x0400 //TX_AEC_REF_GAIN_0 +148 0x0800 //TX_AEC_REF_GAIN_1 +149 0x0800 //TX_AEC_REF_GAIN_2 +150 0x7600 //TX_EAD_THR +151 0x1000 //TX_THR_RE_EST +152 0x2000 //TX_MIN_EQ_RE_EST_0 +153 0x0600 //TX_MIN_EQ_RE_EST_1 +154 0x3000 //TX_MIN_EQ_RE_EST_2 +155 0x3000 //TX_MIN_EQ_RE_EST_3 +156 0x3000 //TX_MIN_EQ_RE_EST_4 +157 0x3000 //TX_MIN_EQ_RE_EST_5 +158 0x3000 //TX_MIN_EQ_RE_EST_6 +159 0x1000 //TX_MIN_EQ_RE_EST_7 +160 0x7800 //TX_MIN_EQ_RE_EST_8 +161 0x7800 //TX_MIN_EQ_RE_EST_9 +162 0x7800 //TX_MIN_EQ_RE_EST_10 +163 0x7800 //TX_MIN_EQ_RE_EST_11 +164 0x7800 //TX_MIN_EQ_RE_EST_12 +165 0x3000 //TX_LAMBDA_RE_EST +166 0x3000 //TX_LAMBDA_CB_NLE +167 0x7FFF //TX_C_POST_FLT +168 0x4000 //TX_GAIN_NP +169 0x0180 //TX_SE_HOLD_N +170 0x00C8 //TX_DT_HOLD_N +171 0x0880 //TX_DT2_HOLD_N +172 0x6666 //TX_AEC_RESRV_0 +173 0x0000 //TX_AEC_RESRV_1 +174 0x0014 //TX_AEC_RESRV_2 +175 0x0000 //TX_MIC_DELAY_LENGTH +176 0x0000 //TX_REF_DELAY_LENGTH +177 0x0000 //TX_ADD_LINEIN_GAINL +178 0x0000 //TX_ADD_LINEIN_GAINH +179 0x0000 //TX_MIN_EQ_RE_EST_14 +180 0x0000 //TX_DTD_THR1_8 +181 0x7FFF //TX_DTD_THR2_8 +182 0x0000 //TX_DTD_MIC_BLK2 +183 0x0008 //TX_FRQ_LIN_LEN +184 0x7FFF //TX_FRQ_AEC_LEN_RHO +185 0x6000 //TX_MU0_UNP_FRQ_AEC +186 0x4000 //TX_MU0_PTD_FRQ_AEC +187 0x000A //TX_MINENOISETH +188 0x0800 //TX_MU0_RE_EST +189 0x0001 //TX_AEC_NUM_CH +190 0x0000 //TX_BIGECHOATTENUATION_MAX +191 0x2000 //TX_A_POST_FLT_MICBLK +192 0x0000 //TX_BLKENERTH +193 0x0000 //TX_BLKENERHIGHTH +194 0x0000 //TX_NORMENERTH +195 0x0000 //TX_NORMENERHIGHTH +196 0x0000 //TX_NORMENERHIGHTHL +197 0x7148 //TX_DTD_THR1_0 +198 0x7148 //TX_DTD_THR1_1 +199 0x7148 //TX_DTD_THR1_2 +200 0x7148 //TX_DTD_THR1_3 +201 0x7148 //TX_DTD_THR1_4 +202 0x7700 //TX_DTD_THR1_5 +203 0x7148 //TX_DTD_THR1_6 +204 0x7E00 //TX_DTD_THR2_0 +205 0x7E00 //TX_DTD_THR2_1 +206 0x5000 //TX_DTD_THR2_2 +207 0x5000 //TX_DTD_THR2_3 +208 0x5000 //TX_DTD_THR2_4 +209 0x5000 //TX_DTD_THR2_5 +210 0x5000 //TX_DTD_THR2_6 +211 0x7FFF //TX_DTD_THR3 +212 0x0000 //TX_SPK_CUT_K +213 0x36B0 //TX_DT_CUT_K +214 0x0100 //TX_DT_CUT_THR +215 0x04EB //TX_COMFORT_G +216 0x01F4 //TX_POWER_YOUT_TH +217 0x4000 //TX_FDPFGAINECHO +218 0x0000 //TX_DTD_HD_THR +219 0x0000 //TX_SPK_CUT_K_S +220 0x7FFF //TX_DTD_MIC_BLK +221 0x023E //TX_ADPT_STRICT_L +222 0x023E //TX_ADPT_STRICT_H +223 0x0001 //TX_RATIO_DT_L_TH_LOW +224 0x3A98 //TX_RATIO_DT_H_TH_LOW +225 0x07D0 //TX_RATIO_DT_L_TH_HIGH +226 0x59D8 //TX_RATIO_DT_H_TH_HIGH +227 0x0001 //TX_RATIO_DT_L0_TH +228 0x7FFF //TX_B_POST_FILT_ECHO_L +229 0x7FFF //TX_B_POST_FILT_ECHO_H +230 0x0200 //TX_MIN_G_CTRL_ECHO +231 0x1000 //TX_B_LESSCUT_RTO_ECHO +232 0x0000 //TX_EPD_OFFSET_00 +233 0x0000 //TX_EPD_OFFST_01 +234 0x02BC //TX_RATIO_DT_L0_TH_HIGH +235 0x7FFF //TX_RATIO_DT_H_TH_CUT +236 0x7FFF //TX_MIN_EQ_RE_EST_13 +237 0x0000 //TX_DTD_THR1_7 +238 0x0000 //TX_DTD_THR2_7 +239 0x0800 //TX_DT_RESRV_7 +240 0x0800 //TX_DT_RESRV_8 +241 0x0000 //TX_DT_RESRV_9 +242 0xF800 //TX_THR_SN_EST_0 +243 0xFA00 //TX_THR_SN_EST_1 +244 0xFA00 //TX_THR_SN_EST_2 +245 0xFA00 //TX_THR_SN_EST_3 +246 0xF800 //TX_THR_SN_EST_4 +247 0xFA00 //TX_THR_SN_EST_5 +248 0xF800 //TX_THR_SN_EST_6 +249 0xF800 //TX_THR_SN_EST_7 +250 0x0100 //TX_DELTA_THR_SN_EST_0 +251 0x0100 //TX_DELTA_THR_SN_EST_1 +252 0x0100 //TX_DELTA_THR_SN_EST_2 +253 0x0000 //TX_DELTA_THR_SN_EST_3 +254 0x0100 //TX_DELTA_THR_SN_EST_4 +255 0x0200 //TX_DELTA_THR_SN_EST_5 +256 0x0100 //TX_DELTA_THR_SN_EST_6 +257 0x0200 //TX_DELTA_THR_SN_EST_7 +258 0x4000 //TX_LAMBDA_NN_EST_0 +259 0x4000 //TX_LAMBDA_NN_EST_1 +260 0x4000 //TX_LAMBDA_NN_EST_2 +261 0x4000 //TX_LAMBDA_NN_EST_3 +262 0x4000 //TX_LAMBDA_NN_EST_4 +263 0x4000 //TX_LAMBDA_NN_EST_5 +264 0x4000 //TX_LAMBDA_NN_EST_6 +265 0x4000 //TX_LAMBDA_NN_EST_7 +266 0x0400 //TX_N_SN_EST +267 0x001E //TX_INBEAM_T +268 0x0041 //TX_INBEAMHOLDT +269 0x2000 //TX_G_STRICT +270 0x2000 //TX_EQ_THR_BF +271 0x799A //TX_LAMBDA_EQ_BF +272 0x1000 //TX_NE_RTO_TH +273 0x0400 //TX_NE_RTO_TH_L +274 0x0800 //TX_MAINREFRTOH_TH_H +275 0x0800 //TX_MAINREFRTOH_TH_L +276 0x0800 //TX_MAINREFRTO_TH_H +277 0x0800 //TX_MAINREFRTO_TH_L +278 0x0200 //TX_MAINREFRTO_TH_EQ +279 0x2000 //TX_B_POST_FLT_0 +280 0x1000 //TX_B_POST_FLT_1 +281 0x0010 //TX_NS_LVL_CTRL_0 +282 0x003C //TX_NS_LVL_CTRL_1 +283 0x0024 //TX_NS_LVL_CTRL_2 +284 0x003C //TX_NS_LVL_CTRL_3 +285 0x0014 //TX_NS_LVL_CTRL_4 +286 0x0011 //TX_NS_LVL_CTRL_5 +287 0x003C //TX_NS_LVL_CTRL_6 +288 0x0011 //TX_NS_LVL_CTRL_7 +289 0x0020 //TX_MIN_GAIN_S_0 +290 0x0020 //TX_MIN_GAIN_S_1 +291 0x0020 //TX_MIN_GAIN_S_2 +292 0x0020 //TX_MIN_GAIN_S_3 +293 0x0020 //TX_MIN_GAIN_S_4 +294 0x0020 //TX_MIN_GAIN_S_5 +295 0x0020 //TX_MIN_GAIN_S_6 +296 0x0020 //TX_MIN_GAIN_S_7 +297 0x6000 //TX_NMOS_SUP +298 0x0000 //TX_NS_MAX_PRI_SNR_TH +299 0x0000 //TX_NMOS_SUP_MENSA +300 0x7FFF //TX_SNRI_SUP_0 +301 0x4000 //TX_SNRI_SUP_1 +302 0x4000 //TX_SNRI_SUP_2 +303 0x4000 //TX_SNRI_SUP_3 +304 0x4000 //TX_SNRI_SUP_4 +305 0x4000 //TX_SNRI_SUP_5 +306 0x4000 //TX_SNRI_SUP_6 +307 0x4000 //TX_SNRI_SUP_7 +308 0x7FFF //TX_THR_LFNS +309 0x0018 //TX_G_LFNS +310 0x09C4 //TX_GAIN0_NTH +311 0x000A //TX_MUSIC_MORENS +312 0x7FFF //TX_A_POST_FILT_0 +313 0x2000 //TX_A_POST_FILT_1 +314 0x7FFF //TX_A_POST_FILT_S_0 +315 0x7FFF //TX_A_POST_FILT_S_1 +316 0x7FFF //TX_A_POST_FILT_S_2 +317 0x7FFF //TX_A_POST_FILT_S_3 +318 0x7FFF //TX_A_POST_FILT_S_4 +319 0x7FFF //TX_A_POST_FILT_S_5 +320 0x7FFF //TX_A_POST_FILT_S_6 +321 0x7FFF //TX_A_POST_FILT_S_7 +322 0x2000 //TX_B_POST_FILT_0 +323 0x6000 //TX_B_POST_FILT_1 +324 0x6000 //TX_B_POST_FILT_2 +325 0x6000 //TX_B_POST_FILT_3 +326 0x4000 //TX_B_POST_FILT_4 +327 0x1000 //TX_B_POST_FILT_5 +328 0x1000 //TX_B_POST_FILT_6 +329 0x2000 //TX_B_POST_FILT_7 +330 0x4000 //TX_B_LESSCUT_RTO_S_0 +331 0x7FFF //TX_B_LESSCUT_RTO_S_1 +332 0x7FFF //TX_B_LESSCUT_RTO_S_2 +333 0x7FFF //TX_B_LESSCUT_RTO_S_3 +334 0x7FFF //TX_B_LESSCUT_RTO_S_4 +335 0x6000 //TX_B_LESSCUT_RTO_S_5 +336 0x7FFF //TX_B_LESSCUT_RTO_S_6 +337 0x7FFF //TX_B_LESSCUT_RTO_S_7 +338 0x7F00 //TX_LAMBDA_PFILT +339 0x7F00 //TX_LAMBDA_PFILT_S_0 +340 0x7F00 //TX_LAMBDA_PFILT_S_1 +341 0x7F00 //TX_LAMBDA_PFILT_S_2 +342 0x7F00 //TX_LAMBDA_PFILT_S_3 +343 0x7F00 //TX_LAMBDA_PFILT_S_4 +344 0x7F00 //TX_LAMBDA_PFILT_S_5 +345 0x7F00 //TX_LAMBDA_PFILT_S_6 +346 0x7F00 //TX_LAMBDA_PFILT_S_7 +347 0x0200 //TX_K_PEPPER +348 0x0400 //TX_A_PEPPER +349 0x1EAA //TX_K_PEPPER_HF +350 0x0600 //TX_A_PEPPER_HF +351 0x0001 //TX_HMNC_BST_FLG +352 0x0200 //TX_HMNC_BST_THR +353 0x0040 //TX_DT_BINVAD_TH_0 +354 0x0040 //TX_DT_BINVAD_TH_1 +355 0x0100 //TX_DT_BINVAD_TH_2 +356 0x0100 //TX_DT_BINVAD_TH_3 +357 0x36B0 //TX_DT_BINVAD_ENDF +358 0x0200 //TX_C_POST_FLT_DT +359 0x0CCD //TX_NS_B_POST_FLT_LESSCUT +360 0x0140 //TX_DT_BOOST +361 0x0000 //TX_BF_SGRAD_FLG +362 0x0005 //TX_BF_DVG_TH +363 0x001E //TX_SN_C_F +364 0x0000 //TX_K_APT +365 0x0001 //TX_NOISEDET +366 0x0064 //TX_NDETCT +367 0x0050 //TX_NOISE_TH_0 +368 0x7FFF //TX_NOISE_TH_0_2 +369 0x7FFF //TX_NOISE_TH_0_3 +370 0x07D0 //TX_NOISE_TH_1 +371 0x01F4 //TX_NOISE_TH_2 +372 0x36B0 //TX_NOISE_TH_3 +373 0x2710 //TX_NOISE_TH_4 +374 0x2CEC //TX_NOISE_TH_5 +375 0x7FFF //TX_NOISE_TH_5_2 +376 0x0000 //TX_NOISE_TH_5_3 +377 0x7FFF //TX_NOISE_TH_5_4 +378 0x0DAC //TX_NOISE_TH_6 +379 0x0050 //TX_MINENOISE_TH +380 0xD508 //TX_MORENS_TFMASK_TH +381 0x0001 //TX_DRC_QUIET_FLOOR +382 0x3A98 //TX_RATIODTL_CUT_TH +383 0x07D0 //TX_DT_CUT_K1 +384 0x0666 //TX_OUT_ENER_S_TH_CLEAN +385 0x0666 //TX_OUT_ENER_S_TH_LESSCLEAN +386 0x0333 //TX_OUT_ENER_S_TH_NOISY +387 0x019A //TX_OUT_ENER_TH_NOISE +388 0x0333 //TX_OUT_ENER_TH_SPEECH +389 0x2000 //TX_SN_NPB_GAIN +390 0x0000 //TX_NN_NPB_GAIN +391 0x7FFF //TX_POST_MASK_SUP_HSNE +392 0x1388 //TX_TAIL_DET_TH +393 0x4000 //TX_B_LESSCUT_RTO_WTA +394 0x0000 //TX_MEL_G_R +395 0x0080 //TX_SUPHIGH_TH +396 0x0000 //TX_MASK_G_R +397 0x0002 //TX_EXTRA_NS_L +398 0x1800 //TX_C_POST_FLT_MASK +399 0x7FFF //TX_A_POST_FLT_WNS +400 0x0148 //TX_MIN_G_LOW300HZ +401 0x0001 //TX_MAXLEVEL_CNG +402 0x00B4 //TX_STN_NOISE_TH +403 0x4000 //TX_POST_MASK_SUP +404 0x7FFF //TX_POST_MASK_ADJUST +405 0x00C8 //TX_NS_ENOISE_MIC0_TH +406 0x0050 //TX_MINENOISE_MIC0_TH +407 0x012C //TX_MINENOISE_MIC0_S_TH +408 0x4000 //TX_MIN_G_CTRL_SSNS +409 0x0000 //TX_METAL_RTO_THR +410 0x4848 //TX_NS_FP_K_METAL +411 0x3A98 //TX_NOISEDET_BOOST_TH +412 0x0FA0 //TX_NSMOOTH_TH +413 0x0000 //TX_NS_RESRV_8 +414 0x1800 //TX_RHO_UPB +415 0x0BB8 //TX_N_HOLD_HS +416 0x0050 //TX_N_RHO_BFR0 +417 0x7FFF //TX_LAMBDA_ARSP_EST +418 0x0100 //TX_EXTRA_GAIN_MICBLOCK +419 0x0CCD //TX_THR_STD_NSR +420 0x019A //TX_THR_STD_PLH +421 0x2AF8 //TX_N_HOLD_STD +422 0x0066 //TX_THR_STD_RHO +423 0x2000 //TX_BF_RESET_THR_HS +424 0x09C4 //TX_SB_RTO_MEAN_TH +425 0x0000 //TX_SB_RHO_MEAN_TH_NTALK +426 0x3800 //TX_SB_RTO_MEAN_TH_ABN +427 0x2EE0 //TX_SB_RTO_MEAN_TH_RUB +428 0x0000 //TX_WTA_EN_RTO_TH +429 0x0000 //TX_TOP_ENER_TH_F +430 0x0000 //TX_DESIRED_TALK_HOLDT +431 0x0800 //TX_MIC_BLOCK_FACTOR +432 0x0000 //TX_NSEST_BFRLRNRDC +433 0x0000 //TX_THR_POST_FLT_HS +434 0x0010 //TX_HS_VAD_BIN +435 0x2666 //TX_THR_VAD_HS +436 0x2CCD //TX_MEAN_RTO_MIN_TH2 +437 0x0032 //TX_SILENCE_T +438 0x0000 //TX_A_POST_FLT_WTA +439 0x799A //TX_LAMBDA_PFLT_WTA +440 0x0000 //TX_SB_RHO_MEAN2_TH +441 0x0190 //TX_SB_RHO_MEAN3_TH +442 0x0000 //TX_HS_RESRV_4 +443 0x0000 //TX_HS_RESRV_5 +444 0x003C //TX_DOA_VAD_THR_1 +445 0x0000 //TX_DOA_VAD_THR_2 +446 0x0028 //TX_DOA_VAD_THR1_0 +447 0x0028 //TX_DOA_VAD_THR1_1 +448 0x0000 //TX_SRC_DOA_RNG_LOW_0A +449 0x00B4 //TX_SRC_DOA_RNG_HIGH_0A +450 0x005A //TX_DFLT_SRC_DOA_0A +451 0x0000 //TX_SRC_DOA_RNG_LOW_0B +452 0x0000 //TX_SRC_DOA_RNG_HIGH_0B +453 0x0000 //TX_DFLT_SRC_DOA_0B +454 0x0000 //TX_SRC_DOA_RNG_LOW_0C +455 0x0000 //TX_SRC_DOA_RNG_HIGH_0C +456 0x0000 //TX_DFLT_SRC_DOA_0C +457 0x0000 //TX_SRC_DOA_RNG_LOW_0D +458 0x0000 //TX_SRC_DOA_RNG_HIGH_0D +459 0x0000 //TX_DFLT_SRC_DOA_0D +460 0x0000 //TX_SRC_DOA_RNG_LOW_1A +461 0x00B4 //TX_SRC_DOA_RNG_HIGH_1A +462 0x005A //TX_DFLT_SRC_DOA_1A +463 0x0000 //TX_SRC_DOA_RNG_LOW_1B +464 0x00B4 //TX_SRC_DOA_RNG_HIGH_1B +465 0x005A //TX_DFLT_SRC_DOA_1B +466 0x0000 //TX_SRC_DOA_RNG_LOW_1C +467 0x00B4 //TX_SRC_DOA_RNG_HIGH_1C +468 0x005A //TX_DFLT_SRC_DOA_1C +469 0x0000 //TX_SRC_DOA_RNG_LOW_1D +470 0x00B4 //TX_SRC_DOA_RNG_HIGH_1D +471 0x005A //TX_DFLT_SRC_DOA_1D +472 0x0100 //TX_BF_HOLDOFF_T +473 0x7FFF //TX_DOA_COST_FACTOR +474 0x4000 //TX_MAINTOREFR_TH0 +475 0x071C //TX_DOA_TRK_THR +476 0x012C //TX_DOA_TRACK_HT +477 0x0200 //TX_N1_HOLD_HF +478 0x0100 //TX_N2_HOLD_HF +479 0x3000 //TX_BF_RESET_THR_HF +480 0x7333 //TX_DOA_SMOOTH +481 0x0800 //TX_MU_BF +482 0x0800 //TX_BF_MU_LF_B2 +483 0x0040 //TX_BF_FC_END_BIN_B2 +484 0x0020 //TX_BF_FC_END_BIN +485 0x0000 //TX_HF_RESRV_25 +486 0x0000 //TX_HF_RESRV_26 +487 0x0007 //TX_N_DOA_SEED +488 0x0001 //TX_FINE_DOA_SEARCH_FLG +489 0x0000 //TX_HF_RESRV_27 +490 0x038E //TX_DLT_SRC_DOA_RNG +491 0x0200 //TX_BF_MU_LF +492 0x0000 //TX_DFLT_SRC_LOC_0 +493 0x7FFF //TX_DFLT_SRC_LOC_1 +494 0x0000 //TX_DFLT_SRC_LOC_2 +495 0x038E //TX_DOA_TRACK_VADTH +496 0x0000 //TX_DOA_TRACK_NEW +497 0x0230 //TX_NOR_OFF_THR +498 0x0CCD //TX_MORE_ON_700HZ_THR +499 0x0000 //TX_MU_BF_ADPT_NS +500 0x0000 //TX_ADAPT_LEN +501 0x2000 //TX_MORE_SNS +502 0x0000 //TX_NOR_OFF_TH1 +503 0x0000 //TX_WIDE_MASK_TH +504 0x4650 //TX_SUBSNRATIOHIGH4MEANBCK_THR +505 0x4000 //TX_C_POST_FLT_CUT +506 0x2000 //TX_RADIODTLV +507 0x0320 //TX_POWER_LINEIN_TH +508 0x0014 //TX_FE_VADCOUNT_TH_FC +509 0x000A //TX_ECHO_SUPP_FC +510 0x0C80 //TX_ECHO_TH +511 0x6666 //TX_MIC_TO_BFGAIN +512 0x0000 //TX_MICTOBFGAIN0 +513 0x0000 //TX_FASTMUE_TH +514 0x3000 //TX_DEREVERB_LF_MU +515 0x34CD //TX_DEREVERB_HF_MU +516 0x0007 //TX_DEREVERB_DELAY +517 0x0004 //TX_DEREVERB_COEF_LEN +518 0x0003 //TX_DEREVERB_DNR +519 0x0000 //TX_DEREVERB_ALPHA +520 0x0000 //TX_DEREVERB_BETA +521 0x3A98 //TX_GSC_RTOL_TH +522 0x3A98 //TX_GSC_RTOH_TH +523 0x7E2C //TX_WIDE2_MEANHTH +524 0x0000 //TX_DR_RESRV_5 +525 0x0000 //TX_DR_RESRV_6 +526 0x0000 //TX_DR_RESRV_7 +527 0x0000 //TX_DR_RESRV_8 +528 0x1333 //TX_WIND_MARK_TH +529 0x399A //TX_CORR_THR +530 0x0004 //TX_SNR_THR +531 0x0010 //TX_ENGY_THR +532 0x1770 //TX_CORR_HIGH_TH +533 0x6000 //TX_ENGY_THR_2 +534 0x3400 //TX_MEAN_RTO_THR +535 0x0028 //TX_WNS_ENOISE_MIC0_TH +536 0x3000 //TX_RATIOMICL_TH +537 0x64CD //TX_CALIG_HS +538 0x0000 //TX_LVL_CTRL +539 0x0014 //TX_WIND_SUPRTO +540 0x000A //TX_WNS_MIN_G +541 0x0000 //TX_WNS_B_POST_FLT +542 0x2800 //TX_RATIOMICH_TH +543 0xD120 //TX_WIND_INBEAM_L_TH +544 0x0FA0 //TX_WIND_INBEAM_H_TH +545 0x2000 //TX_WNS_RESRV_0 +546 0x59D8 //TX_WNS_RESRV_1 +547 0x0000 //TX_WNS_RESRV_2 +548 0x0000 //TX_WNS_RESRV_3 +549 0x0000 //TX_WNS_RESRV_4 +550 0x0000 //TX_WNS_RESRV_5 +551 0x0000 //TX_WNS_RESRV_6 +552 0x0000 //TX_PB_B_POST_FLT_LESSCUT +553 0x0070 //TX_BF_LESSCUT_BBIN +554 0x0070 //TX_BF_LESSCUT_EBIN +555 0x0010 //TX_POSTBFB0 +556 0x0070 //TX_POSTBFB +557 0x00B0 //TX_POSTBFE +558 0x0E66 //TX_SPEECH_SNR_TH +559 0x0050 //TX_PB_MAX_PRI_SNR_TH +560 0x770A //TX_MAX_PRI_SNR_TH_L +561 0x0000 //TX_PFGAIN +562 0x0000 //TX_MAINTOREFR_TH +563 0x0000 //TX_SAM_MARK +564 0x0000 //TX_PB_RESRV_0 +565 0x0000 //TX_PB_RESRV_1 +566 0x0020 //TX_FDEQ_SUBNUM +567 0x4848 //TX_FDEQ_GAIN_0 +568 0x4848 //TX_FDEQ_GAIN_1 +569 0x4850 //TX_FDEQ_GAIN_2 +570 0x5050 //TX_FDEQ_GAIN_3 +571 0x4848 //TX_FDEQ_GAIN_4 +572 0x4850 //TX_FDEQ_GAIN_5 +573 0x5261 //TX_FDEQ_GAIN_6 +574 0x5C4C //TX_FDEQ_GAIN_7 +575 0x4C4E //TX_FDEQ_GAIN_8 +576 0x4848 //TX_FDEQ_GAIN_9 +577 0x4C4F //TX_FDEQ_GAIN_10 +578 0x5153 //TX_FDEQ_GAIN_11 +579 0x6265 //TX_FDEQ_GAIN_12 +580 0x638B //TX_FDEQ_GAIN_13 +581 0x8480 //TX_FDEQ_GAIN_14 +582 0x7A7C //TX_FDEQ_GAIN_15 +583 0x4848 //TX_FDEQ_GAIN_16 +584 0x4848 //TX_FDEQ_GAIN_17 +585 0x4848 //TX_FDEQ_GAIN_18 +586 0x4848 //TX_FDEQ_GAIN_19 +587 0x4848 //TX_FDEQ_GAIN_20 +588 0x4848 //TX_FDEQ_GAIN_21 +589 0x4848 //TX_FDEQ_GAIN_22 +590 0x4848 //TX_FDEQ_GAIN_23 +591 0x0202 //TX_FDEQ_BIN_0 +592 0x0203 //TX_FDEQ_BIN_1 +593 0x0303 //TX_FDEQ_BIN_2 +594 0x0304 //TX_FDEQ_BIN_3 +595 0x0405 //TX_FDEQ_BIN_4 +596 0x0506 //TX_FDEQ_BIN_5 +597 0x0708 //TX_FDEQ_BIN_6 +598 0x090A //TX_FDEQ_BIN_7 +599 0x0B0C //TX_FDEQ_BIN_8 +600 0x0D0E //TX_FDEQ_BIN_9 +601 0x1013 //TX_FDEQ_BIN_10 +602 0x1719 //TX_FDEQ_BIN_11 +603 0x1B1E //TX_FDEQ_BIN_12 +604 0x1E1E //TX_FDEQ_BIN_13 +605 0x1E28 //TX_FDEQ_BIN_14 +606 0x284A //TX_FDEQ_BIN_15 +607 0x0000 //TX_FDEQ_BIN_16 +608 0x0000 //TX_FDEQ_BIN_17 +609 0x0000 //TX_FDEQ_BIN_18 +610 0x0000 //TX_FDEQ_BIN_19 +611 0x0000 //TX_FDEQ_BIN_20 +612 0x0000 //TX_FDEQ_BIN_21 +613 0x0000 //TX_FDEQ_BIN_22 +614 0x0000 //TX_FDEQ_BIN_23 +615 0x0000 //TX_FDEQ_PADDING +616 0x0020 //TX_PREEQ_SUBNUM_MIC0 +617 0x4848 //TX_PREEQ_GAIN_MIC0_0 +618 0x4848 //TX_PREEQ_GAIN_MIC0_1 +619 0x4848 //TX_PREEQ_GAIN_MIC0_2 +620 0x4848 //TX_PREEQ_GAIN_MIC0_3 +621 0x4848 //TX_PREEQ_GAIN_MIC0_4 +622 0x4848 //TX_PREEQ_GAIN_MIC0_5 +623 0x4848 //TX_PREEQ_GAIN_MIC0_6 +624 0x4848 //TX_PREEQ_GAIN_MIC0_7 +625 0x4848 //TX_PREEQ_GAIN_MIC0_8 +626 0x4848 //TX_PREEQ_GAIN_MIC0_9 +627 0x4848 //TX_PREEQ_GAIN_MIC0_10 +628 0x4848 //TX_PREEQ_GAIN_MIC0_11 +629 0x4848 //TX_PREEQ_GAIN_MIC0_12 +630 0x4848 //TX_PREEQ_GAIN_MIC0_13 +631 0x4848 //TX_PREEQ_GAIN_MIC0_14 +632 0x4848 //TX_PREEQ_GAIN_MIC0_15 +633 0x4848 //TX_PREEQ_GAIN_MIC0_16 +634 0x4848 //TX_PREEQ_GAIN_MIC0_17 +635 0x4848 //TX_PREEQ_GAIN_MIC0_18 +636 0x4848 //TX_PREEQ_GAIN_MIC0_19 +637 0x4848 //TX_PREEQ_GAIN_MIC0_20 +638 0x4848 //TX_PREEQ_GAIN_MIC0_21 +639 0x4848 //TX_PREEQ_GAIN_MIC0_22 +640 0x4848 //TX_PREEQ_GAIN_MIC0_23 +641 0x0202 //TX_PREEQ_BIN_MIC0_0 +642 0x0203 //TX_PREEQ_BIN_MIC0_1 +643 0x0303 //TX_PREEQ_BIN_MIC0_2 +644 0x0304 //TX_PREEQ_BIN_MIC0_3 +645 0x0405 //TX_PREEQ_BIN_MIC0_4 +646 0x0506 //TX_PREEQ_BIN_MIC0_5 +647 0x0708 //TX_PREEQ_BIN_MIC0_6 +648 0x090A //TX_PREEQ_BIN_MIC0_7 +649 0x0B0C //TX_PREEQ_BIN_MIC0_8 +650 0x0D0E //TX_PREEQ_BIN_MIC0_9 +651 0x1013 //TX_PREEQ_BIN_MIC0_10 +652 0x1719 //TX_PREEQ_BIN_MIC0_11 +653 0x1B1E //TX_PREEQ_BIN_MIC0_12 +654 0x1E1E //TX_PREEQ_BIN_MIC0_13 +655 0x1E28 //TX_PREEQ_BIN_MIC0_14 +656 0x3042 //TX_PREEQ_BIN_MIC0_15 +657 0x0000 //TX_PREEQ_BIN_MIC0_16 +658 0x0000 //TX_PREEQ_BIN_MIC0_17 +659 0x0000 //TX_PREEQ_BIN_MIC0_18 +660 0x0000 //TX_PREEQ_BIN_MIC0_19 +661 0x0000 //TX_PREEQ_BIN_MIC0_20 +662 0x0000 //TX_PREEQ_BIN_MIC0_21 +663 0x0000 //TX_PREEQ_BIN_MIC0_22 +664 0x0000 //TX_PREEQ_BIN_MIC0_23 +665 0x0020 //TX_PREEQ_SUBNUM_MIC1 +666 0x4848 //TX_PREEQ_GAIN_MIC1_0 +667 0x4848 //TX_PREEQ_GAIN_MIC1_1 +668 0x4848 //TX_PREEQ_GAIN_MIC1_2 +669 0x4848 //TX_PREEQ_GAIN_MIC1_3 +670 0x4848 //TX_PREEQ_GAIN_MIC1_4 +671 0x4848 //TX_PREEQ_GAIN_MIC1_5 +672 0x494A //TX_PREEQ_GAIN_MIC1_6 +673 0x4B4C //TX_PREEQ_GAIN_MIC1_7 +674 0x4D4E //TX_PREEQ_GAIN_MIC1_8 +675 0x4F52 //TX_PREEQ_GAIN_MIC1_9 +676 0x5355 //TX_PREEQ_GAIN_MIC1_10 +677 0x585C //TX_PREEQ_GAIN_MIC1_11 +678 0x616A //TX_PREEQ_GAIN_MIC1_12 +679 0x726E //TX_PREEQ_GAIN_MIC1_13 +680 0x5C48 //TX_PREEQ_GAIN_MIC1_14 +681 0x3B38 //TX_PREEQ_GAIN_MIC1_15 +682 0x4848 //TX_PREEQ_GAIN_MIC1_16 +683 0x4848 //TX_PREEQ_GAIN_MIC1_17 +684 0x4848 //TX_PREEQ_GAIN_MIC1_18 +685 0x4848 //TX_PREEQ_GAIN_MIC1_19 +686 0x4848 //TX_PREEQ_GAIN_MIC1_20 +687 0x4848 //TX_PREEQ_GAIN_MIC1_21 +688 0x4848 //TX_PREEQ_GAIN_MIC1_22 +689 0x4848 //TX_PREEQ_GAIN_MIC1_23 +690 0x0202 //TX_PREEQ_BIN_MIC1_0 +691 0x0203 //TX_PREEQ_BIN_MIC1_1 +692 0x0303 //TX_PREEQ_BIN_MIC1_2 +693 0x0304 //TX_PREEQ_BIN_MIC1_3 +694 0x0405 //TX_PREEQ_BIN_MIC1_4 +695 0x0506 //TX_PREEQ_BIN_MIC1_5 +696 0x0708 //TX_PREEQ_BIN_MIC1_6 +697 0x090A //TX_PREEQ_BIN_MIC1_7 +698 0x0B0C //TX_PREEQ_BIN_MIC1_8 +699 0x0D0E //TX_PREEQ_BIN_MIC1_9 +700 0x1013 //TX_PREEQ_BIN_MIC1_10 +701 0x1719 //TX_PREEQ_BIN_MIC1_11 +702 0x1B1E //TX_PREEQ_BIN_MIC1_12 +703 0x1E1E //TX_PREEQ_BIN_MIC1_13 +704 0x1E28 //TX_PREEQ_BIN_MIC1_14 +705 0x3042 //TX_PREEQ_BIN_MIC1_15 +706 0x0000 //TX_PREEQ_BIN_MIC1_16 +707 0x0000 //TX_PREEQ_BIN_MIC1_17 +708 0x0000 //TX_PREEQ_BIN_MIC1_18 +709 0x0000 //TX_PREEQ_BIN_MIC1_19 +710 0x0000 //TX_PREEQ_BIN_MIC1_20 +711 0x0000 //TX_PREEQ_BIN_MIC1_21 +712 0x0000 //TX_PREEQ_BIN_MIC1_22 +713 0x0000 //TX_PREEQ_BIN_MIC1_23 +714 0x0020 //TX_PREEQ_SUBNUM_MIC2 +715 0x4848 //TX_PREEQ_GAIN_MIC2_0 +716 0x4848 //TX_PREEQ_GAIN_MIC2_1 +717 0x4848 //TX_PREEQ_GAIN_MIC2_2 +718 0x4848 //TX_PREEQ_GAIN_MIC2_3 +719 0x4848 //TX_PREEQ_GAIN_MIC2_4 +720 0x4848 //TX_PREEQ_GAIN_MIC2_5 +721 0x4849 //TX_PREEQ_GAIN_MIC2_6 +722 0x4A4A //TX_PREEQ_GAIN_MIC2_7 +723 0x4B4B //TX_PREEQ_GAIN_MIC2_8 +724 0x4C4D //TX_PREEQ_GAIN_MIC2_9 +725 0x4D4E //TX_PREEQ_GAIN_MIC2_10 +726 0x4F4F //TX_PREEQ_GAIN_MIC2_11 +727 0x504F //TX_PREEQ_GAIN_MIC2_12 +728 0x4C49 //TX_PREEQ_GAIN_MIC2_13 +729 0x4A4C //TX_PREEQ_GAIN_MIC2_14 +730 0x4F5E //TX_PREEQ_GAIN_MIC2_15 +731 0x4848 //TX_PREEQ_GAIN_MIC2_16 +732 0x4848 //TX_PREEQ_GAIN_MIC2_17 +733 0x4848 //TX_PREEQ_GAIN_MIC2_18 +734 0x4848 //TX_PREEQ_GAIN_MIC2_19 +735 0x4848 //TX_PREEQ_GAIN_MIC2_20 +736 0x4848 //TX_PREEQ_GAIN_MIC2_21 +737 0x4848 //TX_PREEQ_GAIN_MIC2_22 +738 0x4848 //TX_PREEQ_GAIN_MIC2_23 +739 0x0202 //TX_PREEQ_BIN_MIC2_0 +740 0x0203 //TX_PREEQ_BIN_MIC2_1 +741 0x0303 //TX_PREEQ_BIN_MIC2_2 +742 0x0304 //TX_PREEQ_BIN_MIC2_3 +743 0x0405 //TX_PREEQ_BIN_MIC2_4 +744 0x0506 //TX_PREEQ_BIN_MIC2_5 +745 0x0708 //TX_PREEQ_BIN_MIC2_6 +746 0x090A //TX_PREEQ_BIN_MIC2_7 +747 0x0B0C //TX_PREEQ_BIN_MIC2_8 +748 0x0D0E //TX_PREEQ_BIN_MIC2_9 +749 0x1013 //TX_PREEQ_BIN_MIC2_10 +750 0x1719 //TX_PREEQ_BIN_MIC2_11 +751 0x1B1E //TX_PREEQ_BIN_MIC2_12 +752 0x1E1E //TX_PREEQ_BIN_MIC2_13 +753 0x1E28 //TX_PREEQ_BIN_MIC2_14 +754 0x363C //TX_PREEQ_BIN_MIC2_15 +755 0x0000 //TX_PREEQ_BIN_MIC2_16 +756 0x0000 //TX_PREEQ_BIN_MIC2_17 +757 0x0000 //TX_PREEQ_BIN_MIC2_18 +758 0x0000 //TX_PREEQ_BIN_MIC2_19 +759 0x0000 //TX_PREEQ_BIN_MIC2_20 +760 0x0000 //TX_PREEQ_BIN_MIC2_21 +761 0x0000 //TX_PREEQ_BIN_MIC2_22 +762 0x0000 //TX_PREEQ_BIN_MIC2_23 +763 0x0006 //TX_MASKING_ABILITY +764 0x0800 //TX_NND_WEIGHT +765 0x0050 //TX_MIC_CALIBRATION_0 +766 0x0065 //TX_MIC_CALIBRATION_1 +767 0x0050 //TX_MIC_CALIBRATION_2 +768 0x0050 //TX_MIC_CALIBRATION_3 +769 0x0046 //TX_MIC_PWR_BIAS_0 +770 0x0040 //TX_MIC_PWR_BIAS_1 +771 0x0046 //TX_MIC_PWR_BIAS_2 +772 0x0046 //TX_MIC_PWR_BIAS_3 +773 0x0000 //TX_GAIN_LIMIT_0 +774 0x000F //TX_GAIN_LIMIT_1 +775 0x0000 //TX_GAIN_LIMIT_2 +776 0x0000 //TX_GAIN_LIMIT_3 +777 0x7F5B //TX_BVE_NOVAD0_ALPHADOWN +778 0x7FDE //TX_BVE_VAD0_ALPHAUP +779 0x7F3A //TX_BVE_VAD0_ALPHADOWN +780 0x2000 //TX_BVE_GAINWEIGHT_NOFEVADLI +781 0x7F5B //TX_BVE_FEVADLI_ALPHA +782 0x7F19 //TX_BVE_NOVAD0_ALPHAUP +783 0x0800 //TX_TDDRC_ALPHA_UP_01 +784 0x0800 //TX_TDDRC_ALPHA_UP_02 +785 0x0800 //TX_TDDRC_ALPHA_UP_03 +786 0x0800 //TX_TDDRC_ALPHA_UP_04 +787 0x7EB8 //TX_TDDRC_ALPHA_DWN_01 +788 0x7EB8 //TX_TDDRC_ALPHA_DWN_02 +789 0x7EB8 //TX_TDDRC_ALPHA_DWN_03 +790 0x7EB8 //TX_TDDRC_ALPHA_DWN_04 +791 0x7FFF //TX_TDDRC_TD_DRC_LIMIT +792 0x0800 //TX_TDDRC_POST_LIMIT_GAIN +793 0x0000 //TX_TDDRC_RESRV_0 +794 0x0000 //TX_TDDRC_RESRV_1 +795 0x0018 //TX_FDDRC_BAND_MARGIN_0 +796 0x0030 //TX_FDDRC_BAND_MARGIN_1 +797 0x0050 //TX_FDDRC_BAND_MARGIN_2 +798 0x0080 //TX_FDDRC_BAND_MARGIN_3 +799 0x0007 //TX_FDDRC_BLOCK_EXP +800 0x5000 //TX_FDDRC_THRD_2_0 +801 0x5000 //TX_FDDRC_THRD_2_1 +802 0x5000 //TX_FDDRC_THRD_2_2 +803 0x5000 //TX_FDDRC_THRD_2_3 +804 0x6400 //TX_FDDRC_THRD_3_0 +805 0x6400 //TX_FDDRC_THRD_3_1 +806 0x6400 //TX_FDDRC_THRD_3_2 +807 0x6400 //TX_FDDRC_THRD_3_3 +808 0x2000 //TX_FDDRC_SLANT_0_0 +809 0x2000 //TX_FDDRC_SLANT_0_1 +810 0x2000 //TX_FDDRC_SLANT_0_2 +811 0x2000 //TX_FDDRC_SLANT_0_3 +812 0x5333 //TX_FDDRC_SLANT_1_0 +813 0x5333 //TX_FDDRC_SLANT_1_1 +814 0x5333 //TX_FDDRC_SLANT_1_2 +815 0x5333 //TX_FDDRC_SLANT_1_3 +816 0x0010 //TX_DEADMIC_SILENCE_TH +817 0x0600 //TX_MIC_DEGRADE_TH +818 0x0078 //TX_DEADMIC_CNT +819 0x0078 //TX_MIC_DEGRADE_CNT +820 0x0000 //TX_FDDRC_RESRV_4 +821 0x0000 //TX_FDDRC_RESRV_5 +822 0x0000 //TX_FDDRC_RESRV_6 +823 0x7FFF //TX_KS_NOISEPASTE_FACTOR +824 0x0001 //TX_KS_CONFIG +825 0x7FFF //TX_KS_GAIN_MIN +826 0x0000 //TX_KS_RESRV_0 +827 0x0000 //TX_KS_RESRV_1 +828 0x0000 //TX_KS_RESRV_2 +829 0x7C00 //TX_LAMBDA_PKA_FP +830 0x2000 //TX_TPKA_FP +831 0x0080 //TX_MIN_G_FP +832 0x2000 //TX_MAX_G_FP +833 0x4848 //TX_FFP_FP_K_METAL +834 0x4000 //TX_A_POST_FLT_FP +835 0x0F5C //TX_RTO_OUTBEAM_TH +836 0x4CCD //TX_TPKA_FP_THD +837 0x0000 //TX_MAX_G_FP_BLK +838 0x0000 //TX_FFP_FADEIN +839 0x0000 //TX_FFP_FADEOUT +840 0x0000 //TX_WHISPERCTH +841 0x0000 //TX_WHISPERHOLDT +842 0x0000 //TX_WHISP_ENTHH +843 0x0000 //TX_WHISP_ENTHL +844 0x0000 //TX_WHISP_RTOTH +845 0x0000 //TX_WHISP_RTOTH2 +846 0x0096 //TX_MUTE_PERIOD +847 0x0000 //TX_FADE_IN_PERIOD +848 0x0100 //TX_FFP_RESRV_2 +849 0x0020 //TX_FFP_RESRV_3 +850 0x0000 //TX_FFP_RESRV_4 +851 0x0000 //TX_FFP_RESRV_5 +852 0x0000 //TX_FFP_RESRV_6 +853 0x0002 //TX_FILTINDX +854 0x0001 //TX_TDDRC_THRD_0 +855 0x0002 //TX_TDDRC_THRD_1 +856 0x1000 //TX_TDDRC_THRD_2 +857 0x1000 //TX_TDDRC_THRD_3 +858 0x6000 //TX_TDDRC_SLANT_0 +859 0x6000 //TX_TDDRC_SLANT_1 +860 0x0800 //TX_TDDRC_ALPHA_UP_00 +861 0x7EB8 //TX_TDDRC_ALPHA_DWN_00 +862 0x0000 //TX_TDDRC_HMNC_FLAG +863 0x199A //TX_TDDRC_HMNC_GAIN +864 0x0000 //TX_TDDRC_SMT_FLAG +865 0x0CCD //TX_TDDRC_SMT_W +866 0x0E21 //TX_TDDRC_DRC_GAIN +867 0x7FFF //TX_TDDRC_LMT_THRD +868 0x0000 //TX_TDDRC_LMT_ALPHA +869 0x0000 //TX_TFMASKLTH +870 0x0000 //TX_TFMASKLTHL +871 0x0CCD //TX_TFMASKHTH +872 0x0CCD //TX_TFMASKLTH_BINVAD +873 0xF333 //TX_TFMASKLTH_NS_EST +874 0x2CCD //TX_TFMASKLTH_DOA +875 0xECCD //TX_TFMASKTH_BLESSCUT +876 0x1000 //TX_B_LESSCUT_RTO_MASK +877 0x3800 //TX_SB_RHO_MEAN_TH_ABN +878 0x2000 //TX_B_POST_FLT_MASK +879 0x0000 //TX_B_POST_FLT_MASK1 +880 0x5333 //TX_GAIN_WIND_MASK +881 0x7FFF //TX_TFMASK_BFSTRICT_MUSIC +882 0x0000 //TX_TFMASK_BFSTRICT_NOMUSIC +883 0x7333 //TX_FASTNS_OUTIN_TH +884 0x0CCD //TX_FASTNS_TFMASK_TH +885 0x0CCD //TX_FASTNS_TFMASKBIN_TH1 +886 0x0CCD //TX_FASTNS_TFMASKBIN_TH2 +887 0x0CCD //TX_FASTNS_TFMASKBIN_TH3 +888 0x00C8 //TX_FASTNS_ARSPC_TH +889 0xC000 //TX_FASTNS_MASK5_TH +890 0x4848 //TX_POSTSSA_MIN_G_VR_MASK +891 0x4000 //TX_A_LESSCUT_RTO_MASK +892 0x1770 //TX_FASTNS_NOISETH +893 0xC000 //TX_FASTNS_SSA_THLFL +894 0xC000 //TX_FASTNS_SSA_THHFL +895 0xCCCC //TX_FASTNS_SSA_THLFH +896 0xD999 //TX_FASTNS_SSA_THHFH +897 0x2339 //TX_SENDFUNC_REG_MICMUTE +898 0x0021 //TX_SENDFUNC_REG_MICMUTE1 +899 0x02BC //TX_MICMUTE_RATIO_THR +900 0x0140 //TX_MICMUTE_AMP_THR +901 0x0004 //TX_MICMUTE_HPF_IND +902 0x00C0 //TX_MICMUTE_LOG_EYR_TH +903 0x0008 //TX_MICMUTE_CVG_TIME +904 0x0008 //TX_MICMUTE_RELEASE_TIME +905 0x01FE //TX_MIC_VOLUME_MIC0MUTE +906 0x0020 //TX_MICMUTE_EPD_OFFSET_0 +907 0x001E //TX_MICMUTE_FRQ_AEC_L +908 0x7999 //TX_MICMUTE_EAD_THR +909 0x7FFF //TX_MICMUTE_LAMBDA_CB_NLE +910 0x7FFF //TX_MICMUTE_LAMBDA_RE_EST +911 0x4000 //TX_DTD_THR1_MICMUTE_0 +912 0x7000 //TX_DTD_THR1_MICMUTE_1 +913 0x7FFF //TX_DTD_THR1_MICMUTE_2 +914 0x7FFF //TX_DTD_THR1_MICMUTE_3 +915 0x6CCC //TX_DTD_THR2_MICMUTE_0 +916 0x0400 //TX_MICMUTE_MIN_EQ_RE_EST_0 +917 0x0400 //TX_MICMUTE_MIN_EQ_RE_EST_1 +918 0x1000 //TX_MICMUTE_MIN_EQ_RE_EST_2 +919 0x7FFF //TX_MICMUTE_MIN_EQ_RE_EST_3 +920 0x7FFF //TX_MICMUTE_MIN_EQ_RE_EST_4 +921 0x4000 //TX_MICMUTE_C_POST_FLT +922 0x03E8 //TX_MICMUTE_DT_CUT_K +923 0x0001 //TX_MICMUTE_DT_CUT_THR +924 0x03E8 //TX_MICMUTE_DT_CUT_K2 +925 0x0001 //TX_MICMUTE_DT_CUT_THR2 +926 0x0064 //TX_MICMUTE_DT2_HOLD_N +927 0x1000 //TX_MICMUTE_RATIODTH_THCUT +928 0x1000 //TX_MICMUTE_B_POST_FLT_ECHOL +929 0x7FFF //TX_MICMUTE_B_POST_FLT_ECHOH +930 0x0400 //TX_MICMUTE_C_POST_FLT_MASK +931 0x7999 //TX_MICMUTE_RATIODTL_CUT_TH +932 0x0258 //TX_MICMUTE_DT_CUT_K1 +933 0x0800 //TX_MICMUTE_N2_SN_EST +934 0xFC00 //TX_MICMUTE_THR_SN_EST_0 +935 0x001C //TX_MICMUTE_MIN_G_CTRL_0 +936 0x6000 //TX_MICMUTE_A_POST_FILT_S_0 +937 0x7000 //TX_MICMUTE_B_POST_FILT_0 +938 0x2710 //TX_MIC1RUB_AMP_THR +939 0x0010 //TX_MIC1MUTE_RATIO_THR +940 0x0450 //TX_MIC1MUTE_AMP_THR +941 0x0008 //TX_MIC1MUTE_CVG_TIME +942 0x0008 //TX_MIC1MUTE_RELEASE_TIME +943 0x0000 //TX_AMS_RESRV_01 +944 0x0000 //TX_AMS_RESRV_02 +945 0x0000 //TX_AMS_RESRV_03 +946 0x0000 //TX_AMS_RESRV_04 +947 0x0000 //TX_AMS_RESRV_05 +948 0x0000 //TX_AMS_RESRV_06 +949 0x0000 //TX_AMS_RESRV_07 +950 0x0000 //TX_AMS_RESRV_08 +951 0x0000 //TX_AMS_RESRV_09 +952 0x0000 //TX_AMS_RESRV_10 +953 0x0000 //TX_AMS_RESRV_11 +954 0x0000 //TX_AMS_RESRV_12 +955 0x0000 //TX_AMS_RESRV_13 +956 0x0000 //TX_AMS_RESRV_14 +957 0x0000 //TX_AMS_RESRV_15 +958 0x0000 //TX_AMS_RESRV_16 +959 0x0000 //TX_AMS_RESRV_17 +960 0x0000 //TX_AMS_RESRV_18 +961 0x0000 //TX_AMS_RESRV_19 +#RX +0 0x206C //RX_RECVFUNC_MODE_0 +1 0x0000 //RX_RECVFUNC_MODE_1 +2 0x0003 //RX_SAMPLINGFREQ_SIG +3 0x0003 //RX_SAMPLINGFREQ_PROC +4 0x000A //RX_FRAME_SZ +5 0x0000 //RX_DELAY_OPT +6 0x6000 //RX_TDDRC_ALPHA_UP_1 +7 0x6000 //RX_TDDRC_ALPHA_UP_2 +8 0x6000 //RX_TDDRC_ALPHA_UP_3 +9 0x1000 //RX_TDDRC_ALPHA_UP_4 +10 0x0800 //RX_PGA +11 0x7652 //RX_A_HP +12 0x4000 //RX_B_PE +13 0x7800 //RX_THR_PITCH_DET_0 +14 0x7000 //RX_THR_PITCH_DET_1 +15 0x6000 //RX_THR_PITCH_DET_2 +16 0x0008 //RX_PITCH_BFR_LEN +17 0x0003 //RX_SBD_PITCH_DET +18 0x0100 //RX_PP_RESRV_0 +19 0x0020 //RX_PP_RESRV_1 +20 0x0400 //RX_N_SN_EST +21 0x000C //RX_N2_SN_EST +22 0x0010 //RX_NS_LVL_CTRL +23 0xF800 //RX_THR_SN_EST +24 0x7E00 //RX_LAMBDA_PFILT +25 0x000A //RX_FENS_RESRV_0 +26 0x0190 //RX_FENS_RESRV_1 +27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +30 0x0002 //RX_EXTRA_NS_L +31 0x0800 //RX_EXTRA_NS_A +32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +33 0x7214 //RX_TDDRC_LIMITER_THRD +34 0x0800 //RX_TDDRC_LIMITER_GAIN +35 0x199A //RX_A_POST_FLT +36 0x0000 //RX_LMT_THRD +37 0x4000 //RX_LMT_ALPHA +38 0x0020 //RX_FDEQ_SUBNUM +39 0x4848 //RX_FDEQ_GAIN_0 +40 0x4848 //RX_FDEQ_GAIN_1 +41 0x4340 //RX_FDEQ_GAIN_2 +42 0x3F3D //RX_FDEQ_GAIN_3 +43 0x3935 //RX_FDEQ_GAIN_4 +44 0x3635 //RX_FDEQ_GAIN_5 +45 0x3E46 //RX_FDEQ_GAIN_6 +46 0x494C //RX_FDEQ_GAIN_7 +47 0x4E56 //RX_FDEQ_GAIN_8 +48 0x5F5B //RX_FDEQ_GAIN_9 +49 0x5B48 //RX_FDEQ_GAIN_10 +50 0x4856 //RX_FDEQ_GAIN_11 +51 0x5B60 //RX_FDEQ_GAIN_12 +52 0x7476 //RX_FDEQ_GAIN_13 +53 0x7F7C //RX_FDEQ_GAIN_14 +54 0x7068 //RX_FDEQ_GAIN_15 +55 0x4848 //RX_FDEQ_GAIN_16 +56 0x4848 //RX_FDEQ_GAIN_17 +57 0x4848 //RX_FDEQ_GAIN_18 +58 0x4848 //RX_FDEQ_GAIN_19 +59 0x4848 //RX_FDEQ_GAIN_20 +60 0x4848 //RX_FDEQ_GAIN_21 +61 0x4848 //RX_FDEQ_GAIN_22 +62 0x4848 //RX_FDEQ_GAIN_23 +63 0x0202 //RX_FDEQ_BIN_0 +64 0x0203 //RX_FDEQ_BIN_1 +65 0x0303 //RX_FDEQ_BIN_2 +66 0x0304 //RX_FDEQ_BIN_3 +67 0x0404 //RX_FDEQ_BIN_4 +68 0x0209 //RX_FDEQ_BIN_5 +69 0x0808 //RX_FDEQ_BIN_6 +70 0x090A //RX_FDEQ_BIN_7 +71 0x0B0C //RX_FDEQ_BIN_8 +72 0x0D0E //RX_FDEQ_BIN_9 +73 0x1013 //RX_FDEQ_BIN_10 +74 0x1719 //RX_FDEQ_BIN_11 +75 0x1B1E //RX_FDEQ_BIN_12 +76 0x1E1E //RX_FDEQ_BIN_13 +77 0x1E28 //RX_FDEQ_BIN_14 +78 0x282C //RX_FDEQ_BIN_15 +79 0x0000 //RX_FDEQ_BIN_16 +80 0x0000 //RX_FDEQ_BIN_17 +81 0x0000 //RX_FDEQ_BIN_18 +82 0x0000 //RX_FDEQ_BIN_19 +83 0x0000 //RX_FDEQ_BIN_20 +84 0x0000 //RX_FDEQ_BIN_21 +85 0x0000 //RX_FDEQ_BIN_22 +86 0x0000 //RX_FDEQ_BIN_23 +87 0x4000 //RX_FDEQ_RESRV_0 +88 0x0320 //RX_FDEQ_RESRV_1 +89 0x0018 //RX_FDDRC_BAND_MARGIN_0 +90 0x0035 //RX_FDDRC_BAND_MARGIN_1 +91 0x00D5 //RX_FDDRC_BAND_MARGIN_2 +92 0x0120 //RX_FDDRC_BAND_MARGIN_3 +93 0x0004 //RX_FDDRC_BLOCK_EXP +94 0x5000 //RX_FDDRC_THRD_2_0 +95 0x5000 //RX_FDDRC_THRD_2_1 +96 0x2000 //RX_FDDRC_THRD_2_2 +97 0x5000 //RX_FDDRC_THRD_2_3 +98 0x6400 //RX_FDDRC_THRD_3_0 +99 0x6400 //RX_FDDRC_THRD_3_1 +100 0x2000 //RX_FDDRC_THRD_3_2 +101 0x5000 //RX_FDDRC_THRD_3_3 +102 0x4000 //RX_FDDRC_SLANT_0_0 +103 0x4000 //RX_FDDRC_SLANT_0_1 +104 0x4000 //RX_FDDRC_SLANT_0_2 +105 0x4000 //RX_FDDRC_SLANT_0_3 +106 0x7FFF //RX_FDDRC_SLANT_1_0 +107 0x7FFF //RX_FDDRC_SLANT_1_1 +108 0x7FFF //RX_FDDRC_SLANT_1_2 +109 0x7FFF //RX_FDDRC_SLANT_1_3 +110 0x0000 //RX_FDDRC_RESRV_0 +111 0x0002 //RX_FILTINDX +112 0x0002 //RX_TDDRC_THRD_0 +113 0x0004 //RX_TDDRC_THRD_1 +114 0x1500 //RX_TDDRC_THRD_2 +115 0x1500 //RX_TDDRC_THRD_3 +116 0x3000 //RX_TDDRC_SLANT_0 +117 0x6E00 //RX_TDDRC_SLANT_1 +118 0x6000 //RX_TDDRC_ALPHA_UP_0 +119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +120 0x0000 //RX_TDDRC_HMNC_FLAG +121 0x199A //RX_TDDRC_HMNC_GAIN +122 0x0001 //RX_TDDRC_SMT_FLAG +123 0x0CCD //RX_TDDRC_SMT_W +124 0x02FD //RX_TDDRC_DRC_GAIN +125 0x7C00 //RX_LAMBDA_PKA_FP +126 0x2000 //RX_TPKA_FP +127 0x2000 //RX_MIN_G_FP +128 0x0080 //RX_MAX_G_FP +129 0x0100 //RX_SPK_VOL +130 0x0000 //RX_VOL_RESRV_0 +131 0x0000 //RX_MAXLEVEL_CNG +132 0x3000 //RX_BWE_UV_TH +133 0x3000 //RX_BWE_UV_TH2 +134 0x1800 //RX_BWE_UV_TH3 +135 0x1000 //RX_BWE_V_TH +136 0x04CD //RX_BWE_GAIN1_V_TH1 +137 0x0F33 //RX_BWE_GAIN1_V_TH2 +138 0x7333 //RX_BWE_UV_EQ +139 0x199A //RX_BWE_V_EQ +140 0x7333 //RX_BWE_TONE_TH +141 0x0004 //RX_BWE_UV_HOLD_T +142 0x6CCD //RX_BWE_GAIN2_ALPHA +143 0x799A //RX_BWE_GAIN3_ALPHA +144 0x001E //RX_BWE_CUTOFF +145 0x3000 //RX_BWE_GAINFILL +146 0x3200 //RX_BWE_MAXTH_TONE +147 0x2000 //RX_BWE_EQ_0 +148 0x2000 //RX_BWE_EQ_1 +149 0x2000 //RX_BWE_EQ_2 +150 0x2000 //RX_BWE_EQ_3 +151 0x2000 //RX_BWE_EQ_4 +152 0x2000 //RX_BWE_EQ_5 +153 0x2000 //RX_BWE_EQ_6 +154 0x0000 //RX_BWE_RESRV_0 +155 0x0000 //RX_BWE_RESRV_1 +156 0x0000 //RX_BWE_RESRV_2 +#VOL 0 +6 0x6000 //RX_TDDRC_ALPHA_UP_1 +7 0x6000 //RX_TDDRC_ALPHA_UP_2 +8 0x6000 //RX_TDDRC_ALPHA_UP_3 +9 0x1000 //RX_TDDRC_ALPHA_UP_4 +27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +33 0x7214 //RX_TDDRC_LIMITER_THRD +34 0x0800 //RX_TDDRC_LIMITER_GAIN +112 0x0002 //RX_TDDRC_THRD_0 +113 0x0004 //RX_TDDRC_THRD_1 +114 0x1500 //RX_TDDRC_THRD_2 +115 0x1500 //RX_TDDRC_THRD_3 +116 0x3000 //RX_TDDRC_SLANT_0 +117 0x6E00 //RX_TDDRC_SLANT_1 +118 0x6000 //RX_TDDRC_ALPHA_UP_0 +119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +120 0x0000 //RX_TDDRC_HMNC_FLAG +121 0x199A //RX_TDDRC_HMNC_GAIN +122 0x0001 //RX_TDDRC_SMT_FLAG +123 0x0CCD //RX_TDDRC_SMT_W +124 0x02FD //RX_TDDRC_DRC_GAIN +38 0x0020 //RX_FDEQ_SUBNUM +39 0x4848 //RX_FDEQ_GAIN_0 +40 0x4848 //RX_FDEQ_GAIN_1 +41 0x4340 //RX_FDEQ_GAIN_2 +42 0x3F3D //RX_FDEQ_GAIN_3 +43 0x3935 //RX_FDEQ_GAIN_4 +44 0x3635 //RX_FDEQ_GAIN_5 +45 0x3E46 //RX_FDEQ_GAIN_6 +46 0x494C //RX_FDEQ_GAIN_7 +47 0x4E56 //RX_FDEQ_GAIN_8 +48 0x5F5B //RX_FDEQ_GAIN_9 +49 0x5B48 //RX_FDEQ_GAIN_10 +50 0x4856 //RX_FDEQ_GAIN_11 +51 0x5B60 //RX_FDEQ_GAIN_12 +52 0x7476 //RX_FDEQ_GAIN_13 +53 0x7F7C //RX_FDEQ_GAIN_14 +54 0x7068 //RX_FDEQ_GAIN_15 +55 0x4848 //RX_FDEQ_GAIN_16 +56 0x4848 //RX_FDEQ_GAIN_17 +57 0x4848 //RX_FDEQ_GAIN_18 +58 0x4848 //RX_FDEQ_GAIN_19 +59 0x4848 //RX_FDEQ_GAIN_20 +60 0x4848 //RX_FDEQ_GAIN_21 +61 0x4848 //RX_FDEQ_GAIN_22 +62 0x4848 //RX_FDEQ_GAIN_23 +63 0x0202 //RX_FDEQ_BIN_0 +64 0x0203 //RX_FDEQ_BIN_1 +65 0x0303 //RX_FDEQ_BIN_2 +66 0x0304 //RX_FDEQ_BIN_3 +67 0x0404 //RX_FDEQ_BIN_4 +68 0x0209 //RX_FDEQ_BIN_5 +69 0x0808 //RX_FDEQ_BIN_6 +70 0x090A //RX_FDEQ_BIN_7 +71 0x0B0C //RX_FDEQ_BIN_8 +72 0x0D0E //RX_FDEQ_BIN_9 +73 0x1013 //RX_FDEQ_BIN_10 +74 0x1719 //RX_FDEQ_BIN_11 +75 0x1B1E //RX_FDEQ_BIN_12 +76 0x1E1E //RX_FDEQ_BIN_13 +77 0x1E28 //RX_FDEQ_BIN_14 +78 0x282C //RX_FDEQ_BIN_15 +79 0x0000 //RX_FDEQ_BIN_16 +80 0x0000 //RX_FDEQ_BIN_17 +81 0x0000 //RX_FDEQ_BIN_18 +82 0x0000 //RX_FDEQ_BIN_19 +83 0x0000 //RX_FDEQ_BIN_20 +84 0x0000 //RX_FDEQ_BIN_21 +85 0x0000 //RX_FDEQ_BIN_22 +86 0x0000 //RX_FDEQ_BIN_23 +87 0x4000 //RX_FDEQ_RESRV_0 +88 0x0320 //RX_FDEQ_RESRV_1 +89 0x0018 //RX_FDDRC_BAND_MARGIN_0 +90 0x0035 //RX_FDDRC_BAND_MARGIN_1 +91 0x00D5 //RX_FDDRC_BAND_MARGIN_2 +92 0x0120 //RX_FDDRC_BAND_MARGIN_3 +93 0x0004 //RX_FDDRC_BLOCK_EXP +94 0x5000 //RX_FDDRC_THRD_2_0 +95 0x5000 //RX_FDDRC_THRD_2_1 +96 0x2000 //RX_FDDRC_THRD_2_2 +97 0x5000 //RX_FDDRC_THRD_2_3 +98 0x6400 //RX_FDDRC_THRD_3_0 +99 0x6400 //RX_FDDRC_THRD_3_1 +100 0x2000 //RX_FDDRC_THRD_3_2 +101 0x5000 //RX_FDDRC_THRD_3_3 +102 0x4000 //RX_FDDRC_SLANT_0_0 +103 0x4000 //RX_FDDRC_SLANT_0_1 +104 0x4000 //RX_FDDRC_SLANT_0_2 +105 0x4000 //RX_FDDRC_SLANT_0_3 +106 0x7FFF //RX_FDDRC_SLANT_1_0 +107 0x7FFF //RX_FDDRC_SLANT_1_1 +108 0x7FFF //RX_FDDRC_SLANT_1_2 +109 0x7FFF //RX_FDDRC_SLANT_1_3 +110 0x0000 //RX_FDDRC_RESRV_0 +129 0x0019 //RX_SPK_VOL +130 0x0000 //RX_VOL_RESRV_0 +#VOL 1 +6 0x6000 //RX_TDDRC_ALPHA_UP_1 +7 0x6000 //RX_TDDRC_ALPHA_UP_2 +8 0x6000 //RX_TDDRC_ALPHA_UP_3 +9 0x1000 //RX_TDDRC_ALPHA_UP_4 +27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +33 0x7214 //RX_TDDRC_LIMITER_THRD +34 0x0800 //RX_TDDRC_LIMITER_GAIN +112 0x0002 //RX_TDDRC_THRD_0 +113 0x0004 //RX_TDDRC_THRD_1 +114 0x1500 //RX_TDDRC_THRD_2 +115 0x1500 //RX_TDDRC_THRD_3 +116 0x3000 //RX_TDDRC_SLANT_0 +117 0x6E00 //RX_TDDRC_SLANT_1 +118 0x6000 //RX_TDDRC_ALPHA_UP_0 +119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +120 0x0000 //RX_TDDRC_HMNC_FLAG +121 0x199A //RX_TDDRC_HMNC_GAIN +122 0x0001 //RX_TDDRC_SMT_FLAG +123 0x0CCD //RX_TDDRC_SMT_W +124 0x02FD //RX_TDDRC_DRC_GAIN +38 0x0020 //RX_FDEQ_SUBNUM +39 0x4848 //RX_FDEQ_GAIN_0 +40 0x4848 //RX_FDEQ_GAIN_1 +41 0x4340 //RX_FDEQ_GAIN_2 +42 0x3F3D //RX_FDEQ_GAIN_3 +43 0x3935 //RX_FDEQ_GAIN_4 +44 0x3635 //RX_FDEQ_GAIN_5 +45 0x3E46 //RX_FDEQ_GAIN_6 +46 0x494C //RX_FDEQ_GAIN_7 +47 0x4E56 //RX_FDEQ_GAIN_8 +48 0x5F5B //RX_FDEQ_GAIN_9 +49 0x5B48 //RX_FDEQ_GAIN_10 +50 0x4856 //RX_FDEQ_GAIN_11 +51 0x5B60 //RX_FDEQ_GAIN_12 +52 0x7476 //RX_FDEQ_GAIN_13 +53 0x7F7C //RX_FDEQ_GAIN_14 +54 0x7068 //RX_FDEQ_GAIN_15 +55 0x4848 //RX_FDEQ_GAIN_16 +56 0x4848 //RX_FDEQ_GAIN_17 +57 0x4848 //RX_FDEQ_GAIN_18 +58 0x4848 //RX_FDEQ_GAIN_19 +59 0x4848 //RX_FDEQ_GAIN_20 +60 0x4848 //RX_FDEQ_GAIN_21 +61 0x4848 //RX_FDEQ_GAIN_22 +62 0x4848 //RX_FDEQ_GAIN_23 +63 0x0202 //RX_FDEQ_BIN_0 +64 0x0203 //RX_FDEQ_BIN_1 +65 0x0303 //RX_FDEQ_BIN_2 +66 0x0304 //RX_FDEQ_BIN_3 +67 0x0404 //RX_FDEQ_BIN_4 +68 0x0209 //RX_FDEQ_BIN_5 +69 0x0808 //RX_FDEQ_BIN_6 +70 0x090A //RX_FDEQ_BIN_7 +71 0x0B0C //RX_FDEQ_BIN_8 +72 0x0D0E //RX_FDEQ_BIN_9 +73 0x1013 //RX_FDEQ_BIN_10 +74 0x1719 //RX_FDEQ_BIN_11 +75 0x1B1E //RX_FDEQ_BIN_12 +76 0x1E1E //RX_FDEQ_BIN_13 +77 0x1E28 //RX_FDEQ_BIN_14 +78 0x282C //RX_FDEQ_BIN_15 +79 0x0000 //RX_FDEQ_BIN_16 +80 0x0000 //RX_FDEQ_BIN_17 +81 0x0000 //RX_FDEQ_BIN_18 +82 0x0000 //RX_FDEQ_BIN_19 +83 0x0000 //RX_FDEQ_BIN_20 +84 0x0000 //RX_FDEQ_BIN_21 +85 0x0000 //RX_FDEQ_BIN_22 +86 0x0000 //RX_FDEQ_BIN_23 +87 0x4000 //RX_FDEQ_RESRV_0 +88 0x0320 //RX_FDEQ_RESRV_1 +89 0x0018 //RX_FDDRC_BAND_MARGIN_0 +90 0x0035 //RX_FDDRC_BAND_MARGIN_1 +91 0x00D5 //RX_FDDRC_BAND_MARGIN_2 +92 0x0120 //RX_FDDRC_BAND_MARGIN_3 +93 0x0004 //RX_FDDRC_BLOCK_EXP +94 0x5000 //RX_FDDRC_THRD_2_0 +95 0x5000 //RX_FDDRC_THRD_2_1 +96 0x2000 //RX_FDDRC_THRD_2_2 +97 0x5000 //RX_FDDRC_THRD_2_3 +98 0x6400 //RX_FDDRC_THRD_3_0 +99 0x6400 //RX_FDDRC_THRD_3_1 +100 0x2000 //RX_FDDRC_THRD_3_2 +101 0x5000 //RX_FDDRC_THRD_3_3 +102 0x4000 //RX_FDDRC_SLANT_0_0 +103 0x4000 //RX_FDDRC_SLANT_0_1 +104 0x4000 //RX_FDDRC_SLANT_0_2 +105 0x4000 //RX_FDDRC_SLANT_0_3 +106 0x7FFF //RX_FDDRC_SLANT_1_0 +107 0x7FFF //RX_FDDRC_SLANT_1_1 +108 0x7FFF //RX_FDDRC_SLANT_1_2 +109 0x7FFF //RX_FDDRC_SLANT_1_3 +110 0x0000 //RX_FDDRC_RESRV_0 +129 0x0023 //RX_SPK_VOL +130 0x0000 //RX_VOL_RESRV_0 +#VOL 2 +6 0x6000 //RX_TDDRC_ALPHA_UP_1 +7 0x6000 //RX_TDDRC_ALPHA_UP_2 +8 0x6000 //RX_TDDRC_ALPHA_UP_3 +9 0x1000 //RX_TDDRC_ALPHA_UP_4 +27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +33 0x7214 //RX_TDDRC_LIMITER_THRD +34 0x0800 //RX_TDDRC_LIMITER_GAIN +112 0x0002 //RX_TDDRC_THRD_0 +113 0x0004 //RX_TDDRC_THRD_1 +114 0x1500 //RX_TDDRC_THRD_2 +115 0x1500 //RX_TDDRC_THRD_3 +116 0x3000 //RX_TDDRC_SLANT_0 +117 0x6E00 //RX_TDDRC_SLANT_1 +118 0x6000 //RX_TDDRC_ALPHA_UP_0 +119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +120 0x0000 //RX_TDDRC_HMNC_FLAG +121 0x199A //RX_TDDRC_HMNC_GAIN +122 0x0001 //RX_TDDRC_SMT_FLAG +123 0x0CCD //RX_TDDRC_SMT_W +124 0x02FD //RX_TDDRC_DRC_GAIN +38 0x0020 //RX_FDEQ_SUBNUM +39 0x4848 //RX_FDEQ_GAIN_0 +40 0x4848 //RX_FDEQ_GAIN_1 +41 0x4340 //RX_FDEQ_GAIN_2 +42 0x3F3D //RX_FDEQ_GAIN_3 +43 0x3935 //RX_FDEQ_GAIN_4 +44 0x3635 //RX_FDEQ_GAIN_5 +45 0x3E46 //RX_FDEQ_GAIN_6 +46 0x494C //RX_FDEQ_GAIN_7 +47 0x4E56 //RX_FDEQ_GAIN_8 +48 0x5F5B //RX_FDEQ_GAIN_9 +49 0x5B48 //RX_FDEQ_GAIN_10 +50 0x4856 //RX_FDEQ_GAIN_11 +51 0x5B60 //RX_FDEQ_GAIN_12 +52 0x7476 //RX_FDEQ_GAIN_13 +53 0x7F7C //RX_FDEQ_GAIN_14 +54 0x7068 //RX_FDEQ_GAIN_15 +55 0x4848 //RX_FDEQ_GAIN_16 +56 0x4848 //RX_FDEQ_GAIN_17 +57 0x4848 //RX_FDEQ_GAIN_18 +58 0x4848 //RX_FDEQ_GAIN_19 +59 0x4848 //RX_FDEQ_GAIN_20 +60 0x4848 //RX_FDEQ_GAIN_21 +61 0x4848 //RX_FDEQ_GAIN_22 +62 0x4848 //RX_FDEQ_GAIN_23 +63 0x0202 //RX_FDEQ_BIN_0 +64 0x0203 //RX_FDEQ_BIN_1 +65 0x0303 //RX_FDEQ_BIN_2 +66 0x0304 //RX_FDEQ_BIN_3 +67 0x0404 //RX_FDEQ_BIN_4 +68 0x0209 //RX_FDEQ_BIN_5 +69 0x0808 //RX_FDEQ_BIN_6 +70 0x090A //RX_FDEQ_BIN_7 +71 0x0B0C //RX_FDEQ_BIN_8 +72 0x0D0E //RX_FDEQ_BIN_9 +73 0x1013 //RX_FDEQ_BIN_10 +74 0x1719 //RX_FDEQ_BIN_11 +75 0x1B1E //RX_FDEQ_BIN_12 +76 0x1E1E //RX_FDEQ_BIN_13 +77 0x1E28 //RX_FDEQ_BIN_14 +78 0x282C //RX_FDEQ_BIN_15 +79 0x0000 //RX_FDEQ_BIN_16 +80 0x0000 //RX_FDEQ_BIN_17 +81 0x0000 //RX_FDEQ_BIN_18 +82 0x0000 //RX_FDEQ_BIN_19 +83 0x0000 //RX_FDEQ_BIN_20 +84 0x0000 //RX_FDEQ_BIN_21 +85 0x0000 //RX_FDEQ_BIN_22 +86 0x0000 //RX_FDEQ_BIN_23 +87 0x4000 //RX_FDEQ_RESRV_0 +88 0x0320 //RX_FDEQ_RESRV_1 +89 0x0018 //RX_FDDRC_BAND_MARGIN_0 +90 0x0035 //RX_FDDRC_BAND_MARGIN_1 +91 0x00D5 //RX_FDDRC_BAND_MARGIN_2 +92 0x0120 //RX_FDDRC_BAND_MARGIN_3 +93 0x0004 //RX_FDDRC_BLOCK_EXP +94 0x5000 //RX_FDDRC_THRD_2_0 +95 0x5000 //RX_FDDRC_THRD_2_1 +96 0x2000 //RX_FDDRC_THRD_2_2 +97 0x5000 //RX_FDDRC_THRD_2_3 +98 0x6400 //RX_FDDRC_THRD_3_0 +99 0x6400 //RX_FDDRC_THRD_3_1 +100 0x2000 //RX_FDDRC_THRD_3_2 +101 0x5000 //RX_FDDRC_THRD_3_3 +102 0x4000 //RX_FDDRC_SLANT_0_0 +103 0x4000 //RX_FDDRC_SLANT_0_1 +104 0x4000 //RX_FDDRC_SLANT_0_2 +105 0x4000 //RX_FDDRC_SLANT_0_3 +106 0x7FFF //RX_FDDRC_SLANT_1_0 +107 0x7FFF //RX_FDDRC_SLANT_1_1 +108 0x7FFF //RX_FDDRC_SLANT_1_2 +109 0x7FFF //RX_FDDRC_SLANT_1_3 +110 0x0000 //RX_FDDRC_RESRV_0 +129 0x0032 //RX_SPK_VOL +130 0x0000 //RX_VOL_RESRV_0 +#VOL 3 +6 0x6000 //RX_TDDRC_ALPHA_UP_1 +7 0x6000 //RX_TDDRC_ALPHA_UP_2 +8 0x6000 //RX_TDDRC_ALPHA_UP_3 +9 0x1000 //RX_TDDRC_ALPHA_UP_4 +27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +33 0x7214 //RX_TDDRC_LIMITER_THRD +34 0x0800 //RX_TDDRC_LIMITER_GAIN +112 0x0002 //RX_TDDRC_THRD_0 +113 0x0004 //RX_TDDRC_THRD_1 +114 0x1500 //RX_TDDRC_THRD_2 +115 0x1500 //RX_TDDRC_THRD_3 +116 0x3000 //RX_TDDRC_SLANT_0 +117 0x6E00 //RX_TDDRC_SLANT_1 +118 0x6000 //RX_TDDRC_ALPHA_UP_0 +119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +120 0x0000 //RX_TDDRC_HMNC_FLAG +121 0x199A //RX_TDDRC_HMNC_GAIN +122 0x0001 //RX_TDDRC_SMT_FLAG +123 0x0CCD //RX_TDDRC_SMT_W +124 0x02FD //RX_TDDRC_DRC_GAIN +38 0x0020 //RX_FDEQ_SUBNUM +39 0x4848 //RX_FDEQ_GAIN_0 +40 0x4848 //RX_FDEQ_GAIN_1 +41 0x4340 //RX_FDEQ_GAIN_2 +42 0x3F3D //RX_FDEQ_GAIN_3 +43 0x3935 //RX_FDEQ_GAIN_4 +44 0x3635 //RX_FDEQ_GAIN_5 +45 0x3E46 //RX_FDEQ_GAIN_6 +46 0x494C //RX_FDEQ_GAIN_7 +47 0x4E56 //RX_FDEQ_GAIN_8 +48 0x5F5B //RX_FDEQ_GAIN_9 +49 0x5B48 //RX_FDEQ_GAIN_10 +50 0x4856 //RX_FDEQ_GAIN_11 +51 0x5B60 //RX_FDEQ_GAIN_12 +52 0x7476 //RX_FDEQ_GAIN_13 +53 0x7F7C //RX_FDEQ_GAIN_14 +54 0x7068 //RX_FDEQ_GAIN_15 +55 0x4848 //RX_FDEQ_GAIN_16 +56 0x4848 //RX_FDEQ_GAIN_17 +57 0x4848 //RX_FDEQ_GAIN_18 +58 0x4848 //RX_FDEQ_GAIN_19 +59 0x4848 //RX_FDEQ_GAIN_20 +60 0x4848 //RX_FDEQ_GAIN_21 +61 0x4848 //RX_FDEQ_GAIN_22 +62 0x4848 //RX_FDEQ_GAIN_23 +63 0x0202 //RX_FDEQ_BIN_0 +64 0x0203 //RX_FDEQ_BIN_1 +65 0x0303 //RX_FDEQ_BIN_2 +66 0x0304 //RX_FDEQ_BIN_3 +67 0x0404 //RX_FDEQ_BIN_4 +68 0x0209 //RX_FDEQ_BIN_5 +69 0x0808 //RX_FDEQ_BIN_6 +70 0x090A //RX_FDEQ_BIN_7 +71 0x0B0C //RX_FDEQ_BIN_8 +72 0x0D0E //RX_FDEQ_BIN_9 +73 0x1013 //RX_FDEQ_BIN_10 +74 0x1719 //RX_FDEQ_BIN_11 +75 0x1B1E //RX_FDEQ_BIN_12 +76 0x1E1E //RX_FDEQ_BIN_13 +77 0x1E28 //RX_FDEQ_BIN_14 +78 0x282C //RX_FDEQ_BIN_15 +79 0x0000 //RX_FDEQ_BIN_16 +80 0x0000 //RX_FDEQ_BIN_17 +81 0x0000 //RX_FDEQ_BIN_18 +82 0x0000 //RX_FDEQ_BIN_19 +83 0x0000 //RX_FDEQ_BIN_20 +84 0x0000 //RX_FDEQ_BIN_21 +85 0x0000 //RX_FDEQ_BIN_22 +86 0x0000 //RX_FDEQ_BIN_23 +87 0x4000 //RX_FDEQ_RESRV_0 +88 0x0320 //RX_FDEQ_RESRV_1 +89 0x0018 //RX_FDDRC_BAND_MARGIN_0 +90 0x0035 //RX_FDDRC_BAND_MARGIN_1 +91 0x00D5 //RX_FDDRC_BAND_MARGIN_2 +92 0x0120 //RX_FDDRC_BAND_MARGIN_3 +93 0x0004 //RX_FDDRC_BLOCK_EXP +94 0x5000 //RX_FDDRC_THRD_2_0 +95 0x5000 //RX_FDDRC_THRD_2_1 +96 0x2000 //RX_FDDRC_THRD_2_2 +97 0x5000 //RX_FDDRC_THRD_2_3 +98 0x6400 //RX_FDDRC_THRD_3_0 +99 0x6400 //RX_FDDRC_THRD_3_1 +100 0x2000 //RX_FDDRC_THRD_3_2 +101 0x5000 //RX_FDDRC_THRD_3_3 +102 0x4000 //RX_FDDRC_SLANT_0_0 +103 0x4000 //RX_FDDRC_SLANT_0_1 +104 0x4000 //RX_FDDRC_SLANT_0_2 +105 0x4000 //RX_FDDRC_SLANT_0_3 +106 0x7FFF //RX_FDDRC_SLANT_1_0 +107 0x7FFF //RX_FDDRC_SLANT_1_1 +108 0x7FFF //RX_FDDRC_SLANT_1_2 +109 0x7FFF //RX_FDDRC_SLANT_1_3 +110 0x0000 //RX_FDDRC_RESRV_0 +129 0x0048 //RX_SPK_VOL +130 0x0000 //RX_VOL_RESRV_0 +#VOL 4 +6 0x6000 //RX_TDDRC_ALPHA_UP_1 +7 0x6000 //RX_TDDRC_ALPHA_UP_2 +8 0x6000 //RX_TDDRC_ALPHA_UP_3 +9 0x1000 //RX_TDDRC_ALPHA_UP_4 +27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +33 0x7214 //RX_TDDRC_LIMITER_THRD +34 0x0800 //RX_TDDRC_LIMITER_GAIN +112 0x0002 //RX_TDDRC_THRD_0 +113 0x0004 //RX_TDDRC_THRD_1 +114 0x1500 //RX_TDDRC_THRD_2 +115 0x1500 //RX_TDDRC_THRD_3 +116 0x3000 //RX_TDDRC_SLANT_0 +117 0x6E00 //RX_TDDRC_SLANT_1 +118 0x6000 //RX_TDDRC_ALPHA_UP_0 +119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +120 0x0000 //RX_TDDRC_HMNC_FLAG +121 0x199A //RX_TDDRC_HMNC_GAIN +122 0x0001 //RX_TDDRC_SMT_FLAG +123 0x0CCD //RX_TDDRC_SMT_W +124 0x02FD //RX_TDDRC_DRC_GAIN +38 0x0020 //RX_FDEQ_SUBNUM +39 0x4848 //RX_FDEQ_GAIN_0 +40 0x4848 //RX_FDEQ_GAIN_1 +41 0x4340 //RX_FDEQ_GAIN_2 +42 0x3F3D //RX_FDEQ_GAIN_3 +43 0x3935 //RX_FDEQ_GAIN_4 +44 0x3635 //RX_FDEQ_GAIN_5 +45 0x3E46 //RX_FDEQ_GAIN_6 +46 0x494C //RX_FDEQ_GAIN_7 +47 0x4E56 //RX_FDEQ_GAIN_8 +48 0x5F5B //RX_FDEQ_GAIN_9 +49 0x5B48 //RX_FDEQ_GAIN_10 +50 0x4856 //RX_FDEQ_GAIN_11 +51 0x5B60 //RX_FDEQ_GAIN_12 +52 0x7476 //RX_FDEQ_GAIN_13 +53 0x7F7C //RX_FDEQ_GAIN_14 +54 0x7068 //RX_FDEQ_GAIN_15 +55 0x4848 //RX_FDEQ_GAIN_16 +56 0x4848 //RX_FDEQ_GAIN_17 +57 0x4848 //RX_FDEQ_GAIN_18 +58 0x4848 //RX_FDEQ_GAIN_19 +59 0x4848 //RX_FDEQ_GAIN_20 +60 0x4848 //RX_FDEQ_GAIN_21 +61 0x4848 //RX_FDEQ_GAIN_22 +62 0x4848 //RX_FDEQ_GAIN_23 +63 0x0202 //RX_FDEQ_BIN_0 +64 0x0203 //RX_FDEQ_BIN_1 +65 0x0303 //RX_FDEQ_BIN_2 +66 0x0304 //RX_FDEQ_BIN_3 +67 0x0404 //RX_FDEQ_BIN_4 +68 0x0209 //RX_FDEQ_BIN_5 +69 0x0808 //RX_FDEQ_BIN_6 +70 0x090A //RX_FDEQ_BIN_7 +71 0x0B0C //RX_FDEQ_BIN_8 +72 0x0D0E //RX_FDEQ_BIN_9 +73 0x1013 //RX_FDEQ_BIN_10 +74 0x1719 //RX_FDEQ_BIN_11 +75 0x1B1E //RX_FDEQ_BIN_12 +76 0x1E1E //RX_FDEQ_BIN_13 +77 0x1E28 //RX_FDEQ_BIN_14 +78 0x282C //RX_FDEQ_BIN_15 +79 0x0000 //RX_FDEQ_BIN_16 +80 0x0000 //RX_FDEQ_BIN_17 +81 0x0000 //RX_FDEQ_BIN_18 +82 0x0000 //RX_FDEQ_BIN_19 +83 0x0000 //RX_FDEQ_BIN_20 +84 0x0000 //RX_FDEQ_BIN_21 +85 0x0000 //RX_FDEQ_BIN_22 +86 0x0000 //RX_FDEQ_BIN_23 +87 0x4000 //RX_FDEQ_RESRV_0 +88 0x0320 //RX_FDEQ_RESRV_1 +89 0x0018 //RX_FDDRC_BAND_MARGIN_0 +90 0x0035 //RX_FDDRC_BAND_MARGIN_1 +91 0x00D5 //RX_FDDRC_BAND_MARGIN_2 +92 0x0120 //RX_FDDRC_BAND_MARGIN_3 +93 0x0004 //RX_FDDRC_BLOCK_EXP +94 0x5000 //RX_FDDRC_THRD_2_0 +95 0x5000 //RX_FDDRC_THRD_2_1 +96 0x2000 //RX_FDDRC_THRD_2_2 +97 0x5000 //RX_FDDRC_THRD_2_3 +98 0x6400 //RX_FDDRC_THRD_3_0 +99 0x6400 //RX_FDDRC_THRD_3_1 +100 0x2000 //RX_FDDRC_THRD_3_2 +101 0x5000 //RX_FDDRC_THRD_3_3 +102 0x4000 //RX_FDDRC_SLANT_0_0 +103 0x4000 //RX_FDDRC_SLANT_0_1 +104 0x4000 //RX_FDDRC_SLANT_0_2 +105 0x4000 //RX_FDDRC_SLANT_0_3 +106 0x7FFF //RX_FDDRC_SLANT_1_0 +107 0x7FFF //RX_FDDRC_SLANT_1_1 +108 0x7FFF //RX_FDDRC_SLANT_1_2 +109 0x7FFF //RX_FDDRC_SLANT_1_3 +110 0x0000 //RX_FDDRC_RESRV_0 +129 0x0068 //RX_SPK_VOL +130 0x0000 //RX_VOL_RESRV_0 +#VOL 5 +6 0x6000 //RX_TDDRC_ALPHA_UP_1 +7 0x6000 //RX_TDDRC_ALPHA_UP_2 +8 0x6000 //RX_TDDRC_ALPHA_UP_3 +9 0x1000 //RX_TDDRC_ALPHA_UP_4 +27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +33 0x7214 //RX_TDDRC_LIMITER_THRD +34 0x0800 //RX_TDDRC_LIMITER_GAIN +112 0x0002 //RX_TDDRC_THRD_0 +113 0x0004 //RX_TDDRC_THRD_1 +114 0x1500 //RX_TDDRC_THRD_2 +115 0x1500 //RX_TDDRC_THRD_3 +116 0x3000 //RX_TDDRC_SLANT_0 +117 0x6E00 //RX_TDDRC_SLANT_1 +118 0x6000 //RX_TDDRC_ALPHA_UP_0 +119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +120 0x0000 //RX_TDDRC_HMNC_FLAG +121 0x199A //RX_TDDRC_HMNC_GAIN +122 0x0001 //RX_TDDRC_SMT_FLAG +123 0x0CCD //RX_TDDRC_SMT_W +124 0x02FD //RX_TDDRC_DRC_GAIN +38 0x0020 //RX_FDEQ_SUBNUM +39 0x4848 //RX_FDEQ_GAIN_0 +40 0x4848 //RX_FDEQ_GAIN_1 +41 0x4340 //RX_FDEQ_GAIN_2 +42 0x3F3D //RX_FDEQ_GAIN_3 +43 0x3935 //RX_FDEQ_GAIN_4 +44 0x3635 //RX_FDEQ_GAIN_5 +45 0x3E46 //RX_FDEQ_GAIN_6 +46 0x494C //RX_FDEQ_GAIN_7 +47 0x4E56 //RX_FDEQ_GAIN_8 +48 0x5F5B //RX_FDEQ_GAIN_9 +49 0x5B48 //RX_FDEQ_GAIN_10 +50 0x4856 //RX_FDEQ_GAIN_11 +51 0x5B60 //RX_FDEQ_GAIN_12 +52 0x7476 //RX_FDEQ_GAIN_13 +53 0x7F7C //RX_FDEQ_GAIN_14 +54 0x7068 //RX_FDEQ_GAIN_15 +55 0x4848 //RX_FDEQ_GAIN_16 +56 0x4848 //RX_FDEQ_GAIN_17 +57 0x4848 //RX_FDEQ_GAIN_18 +58 0x4848 //RX_FDEQ_GAIN_19 +59 0x4848 //RX_FDEQ_GAIN_20 +60 0x4848 //RX_FDEQ_GAIN_21 +61 0x4848 //RX_FDEQ_GAIN_22 +62 0x4848 //RX_FDEQ_GAIN_23 +63 0x0202 //RX_FDEQ_BIN_0 +64 0x0203 //RX_FDEQ_BIN_1 +65 0x0303 //RX_FDEQ_BIN_2 +66 0x0304 //RX_FDEQ_BIN_3 +67 0x0404 //RX_FDEQ_BIN_4 +68 0x0209 //RX_FDEQ_BIN_5 +69 0x0808 //RX_FDEQ_BIN_6 +70 0x090A //RX_FDEQ_BIN_7 +71 0x0B0C //RX_FDEQ_BIN_8 +72 0x0D0E //RX_FDEQ_BIN_9 +73 0x1013 //RX_FDEQ_BIN_10 +74 0x1719 //RX_FDEQ_BIN_11 +75 0x1B1E //RX_FDEQ_BIN_12 +76 0x1E1E //RX_FDEQ_BIN_13 +77 0x1E28 //RX_FDEQ_BIN_14 +78 0x282C //RX_FDEQ_BIN_15 +79 0x0000 //RX_FDEQ_BIN_16 +80 0x0000 //RX_FDEQ_BIN_17 +81 0x0000 //RX_FDEQ_BIN_18 +82 0x0000 //RX_FDEQ_BIN_19 +83 0x0000 //RX_FDEQ_BIN_20 +84 0x0000 //RX_FDEQ_BIN_21 +85 0x0000 //RX_FDEQ_BIN_22 +86 0x0000 //RX_FDEQ_BIN_23 +87 0x4000 //RX_FDEQ_RESRV_0 +88 0x0320 //RX_FDEQ_RESRV_1 +89 0x0018 //RX_FDDRC_BAND_MARGIN_0 +90 0x0035 //RX_FDDRC_BAND_MARGIN_1 +91 0x00D5 //RX_FDDRC_BAND_MARGIN_2 +92 0x0120 //RX_FDDRC_BAND_MARGIN_3 +93 0x0004 //RX_FDDRC_BLOCK_EXP +94 0x5000 //RX_FDDRC_THRD_2_0 +95 0x5000 //RX_FDDRC_THRD_2_1 +96 0x2000 //RX_FDDRC_THRD_2_2 +97 0x5000 //RX_FDDRC_THRD_2_3 +98 0x6400 //RX_FDDRC_THRD_3_0 +99 0x6400 //RX_FDDRC_THRD_3_1 +100 0x2000 //RX_FDDRC_THRD_3_2 +101 0x5000 //RX_FDDRC_THRD_3_3 +102 0x4000 //RX_FDDRC_SLANT_0_0 +103 0x4000 //RX_FDDRC_SLANT_0_1 +104 0x4000 //RX_FDDRC_SLANT_0_2 +105 0x4000 //RX_FDDRC_SLANT_0_3 +106 0x7FFF //RX_FDDRC_SLANT_1_0 +107 0x7FFF //RX_FDDRC_SLANT_1_1 +108 0x7FFF //RX_FDDRC_SLANT_1_2 +109 0x7FFF //RX_FDDRC_SLANT_1_3 +110 0x0000 //RX_FDDRC_RESRV_0 +129 0x0097 //RX_SPK_VOL +130 0x0000 //RX_VOL_RESRV_0 +#VOL 6 +6 0x6000 //RX_TDDRC_ALPHA_UP_1 +7 0x6000 //RX_TDDRC_ALPHA_UP_2 +8 0x6000 //RX_TDDRC_ALPHA_UP_3 +9 0x1000 //RX_TDDRC_ALPHA_UP_4 +27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +33 0x7214 //RX_TDDRC_LIMITER_THRD +34 0x0800 //RX_TDDRC_LIMITER_GAIN +112 0x0002 //RX_TDDRC_THRD_0 +113 0x0004 //RX_TDDRC_THRD_1 +114 0x1500 //RX_TDDRC_THRD_2 +115 0x1500 //RX_TDDRC_THRD_3 +116 0x3000 //RX_TDDRC_SLANT_0 +117 0x6E00 //RX_TDDRC_SLANT_1 +118 0x6000 //RX_TDDRC_ALPHA_UP_0 +119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +120 0x0000 //RX_TDDRC_HMNC_FLAG +121 0x199A //RX_TDDRC_HMNC_GAIN +122 0x0001 //RX_TDDRC_SMT_FLAG +123 0x0CCD //RX_TDDRC_SMT_W +124 0x02FD //RX_TDDRC_DRC_GAIN +38 0x0020 //RX_FDEQ_SUBNUM +39 0x4848 //RX_FDEQ_GAIN_0 +40 0x4848 //RX_FDEQ_GAIN_1 +41 0x4340 //RX_FDEQ_GAIN_2 +42 0x3F3D //RX_FDEQ_GAIN_3 +43 0x3935 //RX_FDEQ_GAIN_4 +44 0x3635 //RX_FDEQ_GAIN_5 +45 0x3E46 //RX_FDEQ_GAIN_6 +46 0x494C //RX_FDEQ_GAIN_7 +47 0x4E56 //RX_FDEQ_GAIN_8 +48 0x5F5B //RX_FDEQ_GAIN_9 +49 0x5B48 //RX_FDEQ_GAIN_10 +50 0x4856 //RX_FDEQ_GAIN_11 +51 0x5B60 //RX_FDEQ_GAIN_12 +52 0x7476 //RX_FDEQ_GAIN_13 +53 0x7F7C //RX_FDEQ_GAIN_14 +54 0x7068 //RX_FDEQ_GAIN_15 +55 0x4848 //RX_FDEQ_GAIN_16 +56 0x4848 //RX_FDEQ_GAIN_17 +57 0x4848 //RX_FDEQ_GAIN_18 +58 0x4848 //RX_FDEQ_GAIN_19 +59 0x4848 //RX_FDEQ_GAIN_20 +60 0x4848 //RX_FDEQ_GAIN_21 +61 0x4848 //RX_FDEQ_GAIN_22 +62 0x4848 //RX_FDEQ_GAIN_23 +63 0x0202 //RX_FDEQ_BIN_0 +64 0x0203 //RX_FDEQ_BIN_1 +65 0x0303 //RX_FDEQ_BIN_2 +66 0x0304 //RX_FDEQ_BIN_3 +67 0x0404 //RX_FDEQ_BIN_4 +68 0x0209 //RX_FDEQ_BIN_5 +69 0x0808 //RX_FDEQ_BIN_6 +70 0x090A //RX_FDEQ_BIN_7 +71 0x0B0C //RX_FDEQ_BIN_8 +72 0x0D0E //RX_FDEQ_BIN_9 +73 0x1013 //RX_FDEQ_BIN_10 +74 0x1719 //RX_FDEQ_BIN_11 +75 0x1B1E //RX_FDEQ_BIN_12 +76 0x1E1E //RX_FDEQ_BIN_13 +77 0x1E28 //RX_FDEQ_BIN_14 +78 0x282C //RX_FDEQ_BIN_15 +79 0x0000 //RX_FDEQ_BIN_16 +80 0x0000 //RX_FDEQ_BIN_17 +81 0x0000 //RX_FDEQ_BIN_18 +82 0x0000 //RX_FDEQ_BIN_19 +83 0x0000 //RX_FDEQ_BIN_20 +84 0x0000 //RX_FDEQ_BIN_21 +85 0x0000 //RX_FDEQ_BIN_22 +86 0x0000 //RX_FDEQ_BIN_23 +87 0x4000 //RX_FDEQ_RESRV_0 +88 0x0320 //RX_FDEQ_RESRV_1 +89 0x0018 //RX_FDDRC_BAND_MARGIN_0 +90 0x0035 //RX_FDDRC_BAND_MARGIN_1 +91 0x00D5 //RX_FDDRC_BAND_MARGIN_2 +92 0x0120 //RX_FDDRC_BAND_MARGIN_3 +93 0x0004 //RX_FDDRC_BLOCK_EXP +94 0x5000 //RX_FDDRC_THRD_2_0 +95 0x5000 //RX_FDDRC_THRD_2_1 +96 0x2000 //RX_FDDRC_THRD_2_2 +97 0x5000 //RX_FDDRC_THRD_2_3 +98 0x6400 //RX_FDDRC_THRD_3_0 +99 0x6400 //RX_FDDRC_THRD_3_1 +100 0x2000 //RX_FDDRC_THRD_3_2 +101 0x5000 //RX_FDDRC_THRD_3_3 +102 0x4000 //RX_FDDRC_SLANT_0_0 +103 0x4000 //RX_FDDRC_SLANT_0_1 +104 0x4000 //RX_FDDRC_SLANT_0_2 +105 0x4000 //RX_FDDRC_SLANT_0_3 +106 0x7FFF //RX_FDDRC_SLANT_1_0 +107 0x7FFF //RX_FDDRC_SLANT_1_1 +108 0x7FFF //RX_FDDRC_SLANT_1_2 +109 0x7FFF //RX_FDDRC_SLANT_1_3 +110 0x0000 //RX_FDDRC_RESRV_0 +129 0x0100 //RX_SPK_VOL +130 0x0000 //RX_VOL_RESRV_0 +#RX 2 +157 0x027C //RX_RECVFUNC_MODE_0 +158 0x0000 //RX_RECVFUNC_MODE_1 +159 0x0003 //RX_SAMPLINGFREQ_SIG +160 0x0003 //RX_SAMPLINGFREQ_PROC +161 0x000A //RX_FRAME_SZ +162 0x0000 //RX_DELAY_OPT +163 0x6000 //RX_TDDRC_ALPHA_UP_1 +164 0x6000 //RX_TDDRC_ALPHA_UP_2 +165 0x6000 //RX_TDDRC_ALPHA_UP_3 +166 0x1000 //RX_TDDRC_ALPHA_UP_4 +167 0x0800 //RX_PGA +168 0x7652 //RX_A_HP +169 0x4000 //RX_B_PE +170 0x7800 //RX_THR_PITCH_DET_0 +171 0x7000 //RX_THR_PITCH_DET_1 +172 0x6000 //RX_THR_PITCH_DET_2 +173 0x0008 //RX_PITCH_BFR_LEN +174 0x0003 //RX_SBD_PITCH_DET +175 0x0100 //RX_PP_RESRV_0 +176 0x0020 //RX_PP_RESRV_1 +177 0x0400 //RX_N_SN_EST +178 0x000C //RX_N2_SN_EST +179 0x0010 //RX_NS_LVL_CTRL +180 0xF800 //RX_THR_SN_EST +181 0x7E00 //RX_LAMBDA_PFILT +182 0x000A //RX_FENS_RESRV_0 +183 0x0190 //RX_FENS_RESRV_1 +184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +187 0x0002 //RX_EXTRA_NS_L +188 0x0800 //RX_EXTRA_NS_A +189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +190 0x7214 //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +192 0x199A //RX_A_POST_FLT +193 0x0000 //RX_LMT_THRD +194 0x4000 //RX_LMT_ALPHA +195 0x0020 //RX_FDEQ_SUBNUM +196 0x484E //RX_FDEQ_GAIN_0 +197 0x4E4E //RX_FDEQ_GAIN_1 +198 0x4E4E //RX_FDEQ_GAIN_2 +199 0x4848 //RX_FDEQ_GAIN_3 +200 0x484E //RX_FDEQ_GAIN_4 +201 0x6E4E //RX_FDEQ_GAIN_5 +202 0x4850 //RX_FDEQ_GAIN_6 +203 0x4848 //RX_FDEQ_GAIN_7 +204 0x4860 //RX_FDEQ_GAIN_8 +205 0x7468 //RX_FDEQ_GAIN_9 +206 0x6060 //RX_FDEQ_GAIN_10 +207 0x6666 //RX_FDEQ_GAIN_11 +208 0x6666 //RX_FDEQ_GAIN_12 +209 0x6666 //RX_FDEQ_GAIN_13 +210 0x6060 //RX_FDEQ_GAIN_14 +211 0x6060 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0202 //RX_FDEQ_BIN_0 +221 0x0203 //RX_FDEQ_BIN_1 +222 0x0303 //RX_FDEQ_BIN_2 +223 0x0304 //RX_FDEQ_BIN_3 +224 0x0404 //RX_FDEQ_BIN_4 +225 0x0209 //RX_FDEQ_BIN_5 +226 0x0808 //RX_FDEQ_BIN_6 +227 0x090A //RX_FDEQ_BIN_7 +228 0x0B0C //RX_FDEQ_BIN_8 +229 0x0D0E //RX_FDEQ_BIN_9 +230 0x1013 //RX_FDEQ_BIN_10 +231 0x1719 //RX_FDEQ_BIN_11 +232 0x1B1E //RX_FDEQ_BIN_12 +233 0x1E1E //RX_FDEQ_BIN_13 +234 0x1E28 //RX_FDEQ_BIN_14 +235 0x282C //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x4000 //RX_FDEQ_RESRV_0 +245 0x0320 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0035 //RX_FDDRC_BAND_MARGIN_1 +248 0x00D5 //RX_FDDRC_BAND_MARGIN_2 +249 0x0120 //RX_FDDRC_BAND_MARGIN_3 +250 0x0004 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x2000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x2000 //RX_FDDRC_THRD_3_2 +258 0x5000 //RX_FDDRC_THRD_3_3 +259 0x4000 //RX_FDDRC_SLANT_0_0 +260 0x4000 //RX_FDDRC_SLANT_0_1 +261 0x4000 //RX_FDDRC_SLANT_0_2 +262 0x4000 //RX_FDDRC_SLANT_0_3 +263 0x7FFF //RX_FDDRC_SLANT_1_0 +264 0x7FFF //RX_FDDRC_SLANT_1_1 +265 0x7FFF //RX_FDDRC_SLANT_1_2 +266 0x7FFF //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +268 0x0002 //RX_FILTINDX +269 0x0002 //RX_TDDRC_THRD_0 +270 0x0004 //RX_TDDRC_THRD_1 +271 0x1A00 //RX_TDDRC_THRD_2 +272 0x1A00 //RX_TDDRC_THRD_3 +273 0x7EB8 //RX_TDDRC_SLANT_0 +274 0x2500 //RX_TDDRC_SLANT_1 +275 0x6000 //RX_TDDRC_ALPHA_UP_0 +276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x199A //RX_TDDRC_HMNC_GAIN +279 0x0001 //RX_TDDRC_SMT_FLAG +280 0x0CCD //RX_TDDRC_SMT_W +281 0x04BC //RX_TDDRC_DRC_GAIN +282 0x7C00 //RX_LAMBDA_PKA_FP +283 0x2000 //RX_TPKA_FP +284 0x2000 //RX_MIN_G_FP +285 0x0080 //RX_MAX_G_FP +286 0x0019 //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 +288 0x0000 //RX_MAXLEVEL_CNG +289 0x3000 //RX_BWE_UV_TH +290 0x3000 //RX_BWE_UV_TH2 +291 0x1800 //RX_BWE_UV_TH3 +292 0x1000 //RX_BWE_V_TH +293 0x04CD //RX_BWE_GAIN1_V_TH1 +294 0x0F33 //RX_BWE_GAIN1_V_TH2 +295 0x7333 //RX_BWE_UV_EQ +296 0x199A //RX_BWE_V_EQ +297 0x7333 //RX_BWE_TONE_TH +298 0x0004 //RX_BWE_UV_HOLD_T +299 0x6CCD //RX_BWE_GAIN2_ALPHA +300 0x799A //RX_BWE_GAIN3_ALPHA +301 0x001E //RX_BWE_CUTOFF +302 0x3000 //RX_BWE_GAINFILL +303 0x3200 //RX_BWE_MAXTH_TONE +304 0x2000 //RX_BWE_EQ_0 +305 0x2000 //RX_BWE_EQ_1 +306 0x2000 //RX_BWE_EQ_2 +307 0x2000 //RX_BWE_EQ_3 +308 0x2000 //RX_BWE_EQ_4 +309 0x2000 //RX_BWE_EQ_5 +310 0x2000 //RX_BWE_EQ_6 +311 0x0000 //RX_BWE_RESRV_0 +312 0x0000 //RX_BWE_RESRV_1 +313 0x0000 //RX_BWE_RESRV_2 +#VOL 0 +163 0x6000 //RX_TDDRC_ALPHA_UP_1 +164 0x6000 //RX_TDDRC_ALPHA_UP_2 +165 0x6000 //RX_TDDRC_ALPHA_UP_3 +166 0x1000 //RX_TDDRC_ALPHA_UP_4 +184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +190 0x7214 //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +269 0x0002 //RX_TDDRC_THRD_0 +270 0x0004 //RX_TDDRC_THRD_1 +271 0x1A00 //RX_TDDRC_THRD_2 +272 0x1A00 //RX_TDDRC_THRD_3 +273 0x7EB8 //RX_TDDRC_SLANT_0 +274 0x2500 //RX_TDDRC_SLANT_1 +275 0x6000 //RX_TDDRC_ALPHA_UP_0 +276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x199A //RX_TDDRC_HMNC_GAIN +279 0x0001 //RX_TDDRC_SMT_FLAG +280 0x0CCD //RX_TDDRC_SMT_W +281 0x04BC //RX_TDDRC_DRC_GAIN +195 0x0020 //RX_FDEQ_SUBNUM +196 0x484E //RX_FDEQ_GAIN_0 +197 0x4E4E //RX_FDEQ_GAIN_1 +198 0x4E4E //RX_FDEQ_GAIN_2 +199 0x4848 //RX_FDEQ_GAIN_3 +200 0x484E //RX_FDEQ_GAIN_4 +201 0x6E4E //RX_FDEQ_GAIN_5 +202 0x4850 //RX_FDEQ_GAIN_6 +203 0x4848 //RX_FDEQ_GAIN_7 +204 0x4860 //RX_FDEQ_GAIN_8 +205 0x7468 //RX_FDEQ_GAIN_9 +206 0x6060 //RX_FDEQ_GAIN_10 +207 0x6666 //RX_FDEQ_GAIN_11 +208 0x6666 //RX_FDEQ_GAIN_12 +209 0x6666 //RX_FDEQ_GAIN_13 +210 0x6060 //RX_FDEQ_GAIN_14 +211 0x6060 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0202 //RX_FDEQ_BIN_0 +221 0x0203 //RX_FDEQ_BIN_1 +222 0x0303 //RX_FDEQ_BIN_2 +223 0x0304 //RX_FDEQ_BIN_3 +224 0x0404 //RX_FDEQ_BIN_4 +225 0x0209 //RX_FDEQ_BIN_5 +226 0x0808 //RX_FDEQ_BIN_6 +227 0x090A //RX_FDEQ_BIN_7 +228 0x0B0C //RX_FDEQ_BIN_8 +229 0x0D0E //RX_FDEQ_BIN_9 +230 0x1013 //RX_FDEQ_BIN_10 +231 0x1719 //RX_FDEQ_BIN_11 +232 0x1B1E //RX_FDEQ_BIN_12 +233 0x1E1E //RX_FDEQ_BIN_13 +234 0x1E28 //RX_FDEQ_BIN_14 +235 0x282C //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x4000 //RX_FDEQ_RESRV_0 +245 0x0320 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0035 //RX_FDDRC_BAND_MARGIN_1 +248 0x00D5 //RX_FDDRC_BAND_MARGIN_2 +249 0x0120 //RX_FDDRC_BAND_MARGIN_3 +250 0x0004 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x2000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x2000 //RX_FDDRC_THRD_3_2 +258 0x5000 //RX_FDDRC_THRD_3_3 +259 0x4000 //RX_FDDRC_SLANT_0_0 +260 0x4000 //RX_FDDRC_SLANT_0_1 +261 0x4000 //RX_FDDRC_SLANT_0_2 +262 0x4000 //RX_FDDRC_SLANT_0_3 +263 0x7FFF //RX_FDDRC_SLANT_1_0 +264 0x7FFF //RX_FDDRC_SLANT_1_1 +265 0x7FFF //RX_FDDRC_SLANT_1_2 +266 0x7FFF //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +286 0x0019 //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 +#VOL 1 +163 0x6000 //RX_TDDRC_ALPHA_UP_1 +164 0x6000 //RX_TDDRC_ALPHA_UP_2 +165 0x6000 //RX_TDDRC_ALPHA_UP_3 +166 0x1000 //RX_TDDRC_ALPHA_UP_4 +184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +190 0x7214 //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +269 0x0002 //RX_TDDRC_THRD_0 +270 0x0004 //RX_TDDRC_THRD_1 +271 0x1A00 //RX_TDDRC_THRD_2 +272 0x1A00 //RX_TDDRC_THRD_3 +273 0x7EB8 //RX_TDDRC_SLANT_0 +274 0x2500 //RX_TDDRC_SLANT_1 +275 0x6000 //RX_TDDRC_ALPHA_UP_0 +276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x199A //RX_TDDRC_HMNC_GAIN +279 0x0001 //RX_TDDRC_SMT_FLAG +280 0x0CCD //RX_TDDRC_SMT_W +281 0x04BC //RX_TDDRC_DRC_GAIN +195 0x0020 //RX_FDEQ_SUBNUM +196 0x484E //RX_FDEQ_GAIN_0 +197 0x4E4E //RX_FDEQ_GAIN_1 +198 0x4E4E //RX_FDEQ_GAIN_2 +199 0x4848 //RX_FDEQ_GAIN_3 +200 0x484E //RX_FDEQ_GAIN_4 +201 0x6E4E //RX_FDEQ_GAIN_5 +202 0x4850 //RX_FDEQ_GAIN_6 +203 0x4848 //RX_FDEQ_GAIN_7 +204 0x4860 //RX_FDEQ_GAIN_8 +205 0x7468 //RX_FDEQ_GAIN_9 +206 0x6060 //RX_FDEQ_GAIN_10 +207 0x6666 //RX_FDEQ_GAIN_11 +208 0x6666 //RX_FDEQ_GAIN_12 +209 0x6666 //RX_FDEQ_GAIN_13 +210 0x6060 //RX_FDEQ_GAIN_14 +211 0x6060 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0202 //RX_FDEQ_BIN_0 +221 0x0203 //RX_FDEQ_BIN_1 +222 0x0303 //RX_FDEQ_BIN_2 +223 0x0304 //RX_FDEQ_BIN_3 +224 0x0404 //RX_FDEQ_BIN_4 +225 0x0209 //RX_FDEQ_BIN_5 +226 0x0808 //RX_FDEQ_BIN_6 +227 0x090A //RX_FDEQ_BIN_7 +228 0x0B0C //RX_FDEQ_BIN_8 +229 0x0D0E //RX_FDEQ_BIN_9 +230 0x1013 //RX_FDEQ_BIN_10 +231 0x1719 //RX_FDEQ_BIN_11 +232 0x1B1E //RX_FDEQ_BIN_12 +233 0x1E1E //RX_FDEQ_BIN_13 +234 0x1E28 //RX_FDEQ_BIN_14 +235 0x282C //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x4000 //RX_FDEQ_RESRV_0 +245 0x0320 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0035 //RX_FDDRC_BAND_MARGIN_1 +248 0x00D5 //RX_FDDRC_BAND_MARGIN_2 +249 0x0120 //RX_FDDRC_BAND_MARGIN_3 +250 0x0004 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x2000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x2000 //RX_FDDRC_THRD_3_2 +258 0x5000 //RX_FDDRC_THRD_3_3 +259 0x4000 //RX_FDDRC_SLANT_0_0 +260 0x4000 //RX_FDDRC_SLANT_0_1 +261 0x4000 //RX_FDDRC_SLANT_0_2 +262 0x4000 //RX_FDDRC_SLANT_0_3 +263 0x7FFF //RX_FDDRC_SLANT_1_0 +264 0x7FFF //RX_FDDRC_SLANT_1_1 +265 0x7FFF //RX_FDDRC_SLANT_1_2 +266 0x7FFF //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +286 0x0023 //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 +#VOL 2 +163 0x6000 //RX_TDDRC_ALPHA_UP_1 +164 0x6000 //RX_TDDRC_ALPHA_UP_2 +165 0x6000 //RX_TDDRC_ALPHA_UP_3 +166 0x1000 //RX_TDDRC_ALPHA_UP_4 +184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +190 0x7214 //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +269 0x0002 //RX_TDDRC_THRD_0 +270 0x0004 //RX_TDDRC_THRD_1 +271 0x1A00 //RX_TDDRC_THRD_2 +272 0x1A00 //RX_TDDRC_THRD_3 +273 0x7EB8 //RX_TDDRC_SLANT_0 +274 0x2500 //RX_TDDRC_SLANT_1 +275 0x6000 //RX_TDDRC_ALPHA_UP_0 +276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x199A //RX_TDDRC_HMNC_GAIN +279 0x0001 //RX_TDDRC_SMT_FLAG +280 0x0CCD //RX_TDDRC_SMT_W +281 0x04BC //RX_TDDRC_DRC_GAIN +195 0x0020 //RX_FDEQ_SUBNUM +196 0x484E //RX_FDEQ_GAIN_0 +197 0x4E4E //RX_FDEQ_GAIN_1 +198 0x4E4E //RX_FDEQ_GAIN_2 +199 0x4848 //RX_FDEQ_GAIN_3 +200 0x484E //RX_FDEQ_GAIN_4 +201 0x6E4E //RX_FDEQ_GAIN_5 +202 0x4850 //RX_FDEQ_GAIN_6 +203 0x4848 //RX_FDEQ_GAIN_7 +204 0x4860 //RX_FDEQ_GAIN_8 +205 0x7468 //RX_FDEQ_GAIN_9 +206 0x6060 //RX_FDEQ_GAIN_10 +207 0x6666 //RX_FDEQ_GAIN_11 +208 0x6666 //RX_FDEQ_GAIN_12 +209 0x6666 //RX_FDEQ_GAIN_13 +210 0x6060 //RX_FDEQ_GAIN_14 +211 0x6060 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0202 //RX_FDEQ_BIN_0 +221 0x0203 //RX_FDEQ_BIN_1 +222 0x0303 //RX_FDEQ_BIN_2 +223 0x0304 //RX_FDEQ_BIN_3 +224 0x0404 //RX_FDEQ_BIN_4 +225 0x0209 //RX_FDEQ_BIN_5 +226 0x0808 //RX_FDEQ_BIN_6 +227 0x090A //RX_FDEQ_BIN_7 +228 0x0B0C //RX_FDEQ_BIN_8 +229 0x0D0E //RX_FDEQ_BIN_9 +230 0x1013 //RX_FDEQ_BIN_10 +231 0x1719 //RX_FDEQ_BIN_11 +232 0x1B1E //RX_FDEQ_BIN_12 +233 0x1E1E //RX_FDEQ_BIN_13 +234 0x1E28 //RX_FDEQ_BIN_14 +235 0x282C //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x4000 //RX_FDEQ_RESRV_0 +245 0x0320 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0035 //RX_FDDRC_BAND_MARGIN_1 +248 0x00D5 //RX_FDDRC_BAND_MARGIN_2 +249 0x0120 //RX_FDDRC_BAND_MARGIN_3 +250 0x0004 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x2000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x2000 //RX_FDDRC_THRD_3_2 +258 0x5000 //RX_FDDRC_THRD_3_3 +259 0x4000 //RX_FDDRC_SLANT_0_0 +260 0x4000 //RX_FDDRC_SLANT_0_1 +261 0x4000 //RX_FDDRC_SLANT_0_2 +262 0x4000 //RX_FDDRC_SLANT_0_3 +263 0x7FFF //RX_FDDRC_SLANT_1_0 +264 0x7FFF //RX_FDDRC_SLANT_1_1 +265 0x7FFF //RX_FDDRC_SLANT_1_2 +266 0x7FFF //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +286 0x0032 //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 +#VOL 3 +163 0x6000 //RX_TDDRC_ALPHA_UP_1 +164 0x6000 //RX_TDDRC_ALPHA_UP_2 +165 0x6000 //RX_TDDRC_ALPHA_UP_3 +166 0x1000 //RX_TDDRC_ALPHA_UP_4 +184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +190 0x7214 //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +269 0x0002 //RX_TDDRC_THRD_0 +270 0x0004 //RX_TDDRC_THRD_1 +271 0x1A00 //RX_TDDRC_THRD_2 +272 0x1A00 //RX_TDDRC_THRD_3 +273 0x7EB8 //RX_TDDRC_SLANT_0 +274 0x2500 //RX_TDDRC_SLANT_1 +275 0x6000 //RX_TDDRC_ALPHA_UP_0 +276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x199A //RX_TDDRC_HMNC_GAIN +279 0x0001 //RX_TDDRC_SMT_FLAG +280 0x0CCD //RX_TDDRC_SMT_W +281 0x04BC //RX_TDDRC_DRC_GAIN +195 0x0020 //RX_FDEQ_SUBNUM +196 0x484E //RX_FDEQ_GAIN_0 +197 0x4E4E //RX_FDEQ_GAIN_1 +198 0x4E4E //RX_FDEQ_GAIN_2 +199 0x4848 //RX_FDEQ_GAIN_3 +200 0x484E //RX_FDEQ_GAIN_4 +201 0x6E4E //RX_FDEQ_GAIN_5 +202 0x4850 //RX_FDEQ_GAIN_6 +203 0x4848 //RX_FDEQ_GAIN_7 +204 0x4860 //RX_FDEQ_GAIN_8 +205 0x7468 //RX_FDEQ_GAIN_9 +206 0x6060 //RX_FDEQ_GAIN_10 +207 0x6666 //RX_FDEQ_GAIN_11 +208 0x6666 //RX_FDEQ_GAIN_12 +209 0x6666 //RX_FDEQ_GAIN_13 +210 0x6060 //RX_FDEQ_GAIN_14 +211 0x6060 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0202 //RX_FDEQ_BIN_0 +221 0x0203 //RX_FDEQ_BIN_1 +222 0x0303 //RX_FDEQ_BIN_2 +223 0x0304 //RX_FDEQ_BIN_3 +224 0x0404 //RX_FDEQ_BIN_4 +225 0x0209 //RX_FDEQ_BIN_5 +226 0x0808 //RX_FDEQ_BIN_6 +227 0x090A //RX_FDEQ_BIN_7 +228 0x0B0C //RX_FDEQ_BIN_8 +229 0x0D0E //RX_FDEQ_BIN_9 +230 0x1013 //RX_FDEQ_BIN_10 +231 0x1719 //RX_FDEQ_BIN_11 +232 0x1B1E //RX_FDEQ_BIN_12 +233 0x1E1E //RX_FDEQ_BIN_13 +234 0x1E28 //RX_FDEQ_BIN_14 +235 0x282C //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x4000 //RX_FDEQ_RESRV_0 +245 0x0320 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0035 //RX_FDDRC_BAND_MARGIN_1 +248 0x00D5 //RX_FDDRC_BAND_MARGIN_2 +249 0x0120 //RX_FDDRC_BAND_MARGIN_3 +250 0x0004 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x2000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x2000 //RX_FDDRC_THRD_3_2 +258 0x5000 //RX_FDDRC_THRD_3_3 +259 0x4000 //RX_FDDRC_SLANT_0_0 +260 0x4000 //RX_FDDRC_SLANT_0_1 +261 0x4000 //RX_FDDRC_SLANT_0_2 +262 0x4000 //RX_FDDRC_SLANT_0_3 +263 0x7FFF //RX_FDDRC_SLANT_1_0 +264 0x7FFF //RX_FDDRC_SLANT_1_1 +265 0x7FFF //RX_FDDRC_SLANT_1_2 +266 0x7FFF //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +286 0x0048 //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 +#VOL 4 +163 0x6000 //RX_TDDRC_ALPHA_UP_1 +164 0x6000 //RX_TDDRC_ALPHA_UP_2 +165 0x6000 //RX_TDDRC_ALPHA_UP_3 +166 0x1000 //RX_TDDRC_ALPHA_UP_4 +184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +190 0x7214 //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +269 0x0002 //RX_TDDRC_THRD_0 +270 0x0004 //RX_TDDRC_THRD_1 +271 0x1A00 //RX_TDDRC_THRD_2 +272 0x1A00 //RX_TDDRC_THRD_3 +273 0x7EB8 //RX_TDDRC_SLANT_0 +274 0x2500 //RX_TDDRC_SLANT_1 +275 0x6000 //RX_TDDRC_ALPHA_UP_0 +276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x199A //RX_TDDRC_HMNC_GAIN +279 0x0001 //RX_TDDRC_SMT_FLAG +280 0x0CCD //RX_TDDRC_SMT_W +281 0x04BC //RX_TDDRC_DRC_GAIN +195 0x0020 //RX_FDEQ_SUBNUM +196 0x484E //RX_FDEQ_GAIN_0 +197 0x4E4E //RX_FDEQ_GAIN_1 +198 0x4E4E //RX_FDEQ_GAIN_2 +199 0x4848 //RX_FDEQ_GAIN_3 +200 0x484E //RX_FDEQ_GAIN_4 +201 0x6E4E //RX_FDEQ_GAIN_5 +202 0x4850 //RX_FDEQ_GAIN_6 +203 0x4848 //RX_FDEQ_GAIN_7 +204 0x4860 //RX_FDEQ_GAIN_8 +205 0x7468 //RX_FDEQ_GAIN_9 +206 0x6060 //RX_FDEQ_GAIN_10 +207 0x6666 //RX_FDEQ_GAIN_11 +208 0x6666 //RX_FDEQ_GAIN_12 +209 0x6666 //RX_FDEQ_GAIN_13 +210 0x6060 //RX_FDEQ_GAIN_14 +211 0x6060 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0202 //RX_FDEQ_BIN_0 +221 0x0203 //RX_FDEQ_BIN_1 +222 0x0303 //RX_FDEQ_BIN_2 +223 0x0304 //RX_FDEQ_BIN_3 +224 0x0404 //RX_FDEQ_BIN_4 +225 0x0209 //RX_FDEQ_BIN_5 +226 0x0808 //RX_FDEQ_BIN_6 +227 0x090A //RX_FDEQ_BIN_7 +228 0x0B0C //RX_FDEQ_BIN_8 +229 0x0D0E //RX_FDEQ_BIN_9 +230 0x1013 //RX_FDEQ_BIN_10 +231 0x1719 //RX_FDEQ_BIN_11 +232 0x1B1E //RX_FDEQ_BIN_12 +233 0x1E1E //RX_FDEQ_BIN_13 +234 0x1E28 //RX_FDEQ_BIN_14 +235 0x282C //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x4000 //RX_FDEQ_RESRV_0 +245 0x0320 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0035 //RX_FDDRC_BAND_MARGIN_1 +248 0x00D5 //RX_FDDRC_BAND_MARGIN_2 +249 0x0120 //RX_FDDRC_BAND_MARGIN_3 +250 0x0004 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x2000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x2000 //RX_FDDRC_THRD_3_2 +258 0x5000 //RX_FDDRC_THRD_3_3 +259 0x4000 //RX_FDDRC_SLANT_0_0 +260 0x4000 //RX_FDDRC_SLANT_0_1 +261 0x4000 //RX_FDDRC_SLANT_0_2 +262 0x4000 //RX_FDDRC_SLANT_0_3 +263 0x7FFF //RX_FDDRC_SLANT_1_0 +264 0x7FFF //RX_FDDRC_SLANT_1_1 +265 0x7FFF //RX_FDDRC_SLANT_1_2 +266 0x7FFF //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +286 0x0068 //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 +#VOL 5 +163 0x6000 //RX_TDDRC_ALPHA_UP_1 +164 0x6000 //RX_TDDRC_ALPHA_UP_2 +165 0x6000 //RX_TDDRC_ALPHA_UP_3 +166 0x1000 //RX_TDDRC_ALPHA_UP_4 +184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +190 0x7214 //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +269 0x0002 //RX_TDDRC_THRD_0 +270 0x0004 //RX_TDDRC_THRD_1 +271 0x1A00 //RX_TDDRC_THRD_2 +272 0x1A00 //RX_TDDRC_THRD_3 +273 0x7EB8 //RX_TDDRC_SLANT_0 +274 0x2500 //RX_TDDRC_SLANT_1 +275 0x6000 //RX_TDDRC_ALPHA_UP_0 +276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x199A //RX_TDDRC_HMNC_GAIN +279 0x0001 //RX_TDDRC_SMT_FLAG +280 0x0CCD //RX_TDDRC_SMT_W +281 0x04BC //RX_TDDRC_DRC_GAIN +195 0x0020 //RX_FDEQ_SUBNUM +196 0x484E //RX_FDEQ_GAIN_0 +197 0x4E4E //RX_FDEQ_GAIN_1 +198 0x4E4E //RX_FDEQ_GAIN_2 +199 0x4848 //RX_FDEQ_GAIN_3 +200 0x484E //RX_FDEQ_GAIN_4 +201 0x6E4E //RX_FDEQ_GAIN_5 +202 0x4850 //RX_FDEQ_GAIN_6 +203 0x4848 //RX_FDEQ_GAIN_7 +204 0x4860 //RX_FDEQ_GAIN_8 +205 0x7468 //RX_FDEQ_GAIN_9 +206 0x6060 //RX_FDEQ_GAIN_10 +207 0x6666 //RX_FDEQ_GAIN_11 +208 0x6666 //RX_FDEQ_GAIN_12 +209 0x6666 //RX_FDEQ_GAIN_13 +210 0x6060 //RX_FDEQ_GAIN_14 +211 0x6060 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0202 //RX_FDEQ_BIN_0 +221 0x0203 //RX_FDEQ_BIN_1 +222 0x0303 //RX_FDEQ_BIN_2 +223 0x0304 //RX_FDEQ_BIN_3 +224 0x0404 //RX_FDEQ_BIN_4 +225 0x0209 //RX_FDEQ_BIN_5 +226 0x0808 //RX_FDEQ_BIN_6 +227 0x090A //RX_FDEQ_BIN_7 +228 0x0B0C //RX_FDEQ_BIN_8 +229 0x0D0E //RX_FDEQ_BIN_9 +230 0x1013 //RX_FDEQ_BIN_10 +231 0x1719 //RX_FDEQ_BIN_11 +232 0x1B1E //RX_FDEQ_BIN_12 +233 0x1E1E //RX_FDEQ_BIN_13 +234 0x1E28 //RX_FDEQ_BIN_14 +235 0x282C //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x4000 //RX_FDEQ_RESRV_0 +245 0x0320 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0035 //RX_FDDRC_BAND_MARGIN_1 +248 0x00D5 //RX_FDDRC_BAND_MARGIN_2 +249 0x0120 //RX_FDDRC_BAND_MARGIN_3 +250 0x0004 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x2000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x2000 //RX_FDDRC_THRD_3_2 +258 0x5000 //RX_FDDRC_THRD_3_3 +259 0x4000 //RX_FDDRC_SLANT_0_0 +260 0x4000 //RX_FDDRC_SLANT_0_1 +261 0x4000 //RX_FDDRC_SLANT_0_2 +262 0x4000 //RX_FDDRC_SLANT_0_3 +263 0x7FFF //RX_FDDRC_SLANT_1_0 +264 0x7FFF //RX_FDDRC_SLANT_1_1 +265 0x7FFF //RX_FDDRC_SLANT_1_2 +266 0x7FFF //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +286 0x0097 //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 +#VOL 6 +163 0x6000 //RX_TDDRC_ALPHA_UP_1 +164 0x6000 //RX_TDDRC_ALPHA_UP_2 +165 0x6000 //RX_TDDRC_ALPHA_UP_3 +166 0x1000 //RX_TDDRC_ALPHA_UP_4 +184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +190 0x7214 //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +269 0x0002 //RX_TDDRC_THRD_0 +270 0x0004 //RX_TDDRC_THRD_1 +271 0x1A00 //RX_TDDRC_THRD_2 +272 0x1A00 //RX_TDDRC_THRD_3 +273 0x7EB8 //RX_TDDRC_SLANT_0 +274 0x2500 //RX_TDDRC_SLANT_1 +275 0x6000 //RX_TDDRC_ALPHA_UP_0 +276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x199A //RX_TDDRC_HMNC_GAIN +279 0x0001 //RX_TDDRC_SMT_FLAG +280 0x0CCD //RX_TDDRC_SMT_W +281 0x04BC //RX_TDDRC_DRC_GAIN +195 0x0020 //RX_FDEQ_SUBNUM +196 0x484E //RX_FDEQ_GAIN_0 +197 0x4E4E //RX_FDEQ_GAIN_1 +198 0x4E4E //RX_FDEQ_GAIN_2 +199 0x4848 //RX_FDEQ_GAIN_3 +200 0x484E //RX_FDEQ_GAIN_4 +201 0x6E4E //RX_FDEQ_GAIN_5 +202 0x4850 //RX_FDEQ_GAIN_6 +203 0x4848 //RX_FDEQ_GAIN_7 +204 0x4860 //RX_FDEQ_GAIN_8 +205 0x7468 //RX_FDEQ_GAIN_9 +206 0x6060 //RX_FDEQ_GAIN_10 +207 0x6666 //RX_FDEQ_GAIN_11 +208 0x6666 //RX_FDEQ_GAIN_12 +209 0x6666 //RX_FDEQ_GAIN_13 +210 0x6060 //RX_FDEQ_GAIN_14 +211 0x6060 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0202 //RX_FDEQ_BIN_0 +221 0x0203 //RX_FDEQ_BIN_1 +222 0x0303 //RX_FDEQ_BIN_2 +223 0x0304 //RX_FDEQ_BIN_3 +224 0x0404 //RX_FDEQ_BIN_4 +225 0x0209 //RX_FDEQ_BIN_5 +226 0x0808 //RX_FDEQ_BIN_6 +227 0x090A //RX_FDEQ_BIN_7 +228 0x0B0C //RX_FDEQ_BIN_8 +229 0x0D0E //RX_FDEQ_BIN_9 +230 0x1013 //RX_FDEQ_BIN_10 +231 0x1719 //RX_FDEQ_BIN_11 +232 0x1B1E //RX_FDEQ_BIN_12 +233 0x1E1E //RX_FDEQ_BIN_13 +234 0x1E28 //RX_FDEQ_BIN_14 +235 0x282C //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x4000 //RX_FDEQ_RESRV_0 +245 0x0320 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0035 //RX_FDDRC_BAND_MARGIN_1 +248 0x00D5 //RX_FDDRC_BAND_MARGIN_2 +249 0x0120 //RX_FDDRC_BAND_MARGIN_3 +250 0x0004 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x2000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x2000 //RX_FDDRC_THRD_3_2 +258 0x5000 //RX_FDDRC_THRD_3_3 +259 0x4000 //RX_FDDRC_SLANT_0_0 +260 0x4000 //RX_FDDRC_SLANT_0_1 +261 0x4000 //RX_FDDRC_SLANT_0_2 +262 0x4000 //RX_FDDRC_SLANT_0_3 +263 0x7FFF //RX_FDDRC_SLANT_1_0 +264 0x7FFF //RX_FDDRC_SLANT_1_1 +265 0x7FFF //RX_FDDRC_SLANT_1_2 +266 0x7FFF //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +286 0x0100 //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 diff --git a/audio/cheetah/tuning/fortemedia/HEADSET.dat b/audio/cheetah/tuning/fortemedia/HEADSET.dat index 99a8c1c..22e3e30 100644 Binary files a/audio/cheetah/tuning/fortemedia/HEADSET.dat and b/audio/cheetah/tuning/fortemedia/HEADSET.dat differ diff --git a/audio/cheetah/tuning/fortemedia/HEADSET.mods b/audio/cheetah/tuning/fortemedia/HEADSET.mods index 59f0067..ac10ce5 100644 --- a/audio/cheetah/tuning/fortemedia/HEADSET.mods +++ b/audio/cheetah/tuning/fortemedia/HEADSET.mods @@ -1,12 +1,12 @@ #PLATFORM_NAME gChip #EXPORT_FLAG HEADSET -#SINGLE_API_VER 1.1.6 -#SAVE_TIME 2022-01-04 15:20:23 +#SINGLE_API_VER 1.2.0 +#SAVE_TIME 2022-02-11 16:30:04 #CASE_NAME HEADSET-USB_BLACKBIRD-VOICE_GENERIC-NB #PARAM_MODE FULL -#PARAM_TYPE TX+RX -#TOTAL_CUSTOM_STEP 7 +#PARAM_TYPE TX+2RX +#TOTAL_CUSTOM_STEP 7+7 #TX 0 0x0009 //TX_OPERATION_MODE_0 1 0x0009 //TX_OPERATION_MODE_1 @@ -259,12 +259,12 @@ 248 0xFA00 //TX_THR_SN_EST_6 249 0xFA00 //TX_THR_SN_EST_7 250 0x0000 //TX_DELTA_THR_SN_EST_0 -251 0x0100 //TX_DELTA_THR_SN_EST_1 -252 0x0000 //TX_DELTA_THR_SN_EST_2 -253 0x0400 //TX_DELTA_THR_SN_EST_3 +251 0x0000 //TX_DELTA_THR_SN_EST_1 +252 0x0400 //TX_DELTA_THR_SN_EST_2 +253 0x0000 //TX_DELTA_THR_SN_EST_3 254 0x0000 //TX_DELTA_THR_SN_EST_4 255 0x0000 //TX_DELTA_THR_SN_EST_5 -256 0x0000 //TX_DELTA_THR_SN_EST_6 +256 0x0100 //TX_DELTA_THR_SN_EST_6 257 0x0000 //TX_DELTA_THR_SN_EST_7 258 0x4000 //TX_LAMBDA_NN_EST_0 259 0x4000 //TX_LAMBDA_NN_EST_1 @@ -291,28 +291,28 @@ 280 0x0400 //TX_B_POST_FLT_1 281 0x0010 //TX_NS_LVL_CTRL_0 282 0x0014 //TX_NS_LVL_CTRL_1 -283 0x0014 //TX_NS_LVL_CTRL_2 -284 0x0016 //TX_NS_LVL_CTRL_3 -285 0x0014 //TX_NS_LVL_CTRL_4 +283 0x0016 //TX_NS_LVL_CTRL_2 +284 0x0014 //TX_NS_LVL_CTRL_3 +285 0x0010 //TX_NS_LVL_CTRL_4 286 0x0010 //TX_NS_LVL_CTRL_5 -287 0x0010 //TX_NS_LVL_CTRL_6 +287 0x0014 //TX_NS_LVL_CTRL_6 288 0x0010 //TX_NS_LVL_CTRL_7 289 0x000D //TX_MIN_GAIN_S_0 290 0x0012 //TX_MIN_GAIN_S_1 291 0x0012 //TX_MIN_GAIN_S_2 292 0x0012 //TX_MIN_GAIN_S_3 -293 0x0012 //TX_MIN_GAIN_S_4 +293 0x000D //TX_MIN_GAIN_S_4 294 0x000D //TX_MIN_GAIN_S_5 -295 0x000D //TX_MIN_GAIN_S_6 +295 0x0012 //TX_MIN_GAIN_S_6 296 0x000D //TX_MIN_GAIN_S_7 297 0x7FFF //TX_NMOS_SUP 298 0x0000 //TX_NS_MAX_PRI_SNR_TH 299 0x0000 //TX_NMOS_SUP_MENSA 300 0x7FFF //TX_SNRI_SUP_0 -301 0x7FFF //TX_SNRI_SUP_1 +301 0x5000 //TX_SNRI_SUP_1 302 0x5000 //TX_SNRI_SUP_2 -303 0x5000 //TX_SNRI_SUP_3 -304 0x6000 //TX_SNRI_SUP_4 +303 0x6000 //TX_SNRI_SUP_3 +304 0x7FFF //TX_SNRI_SUP_4 305 0x7FFF //TX_SNRI_SUP_5 306 0x7FFF //TX_SNRI_SUP_6 307 0x7FFF //TX_SNRI_SUP_7 @@ -323,20 +323,20 @@ 312 0x7FFF //TX_A_POST_FILT_0 313 0x2000 //TX_A_POST_FILT_1 314 0x4000 //TX_A_POST_FILT_S_0 -315 0x7FFF //TX_A_POST_FILT_S_1 -316 0x1000 //TX_A_POST_FILT_S_2 -317 0x7000 //TX_A_POST_FILT_S_3 +315 0x1000 //TX_A_POST_FILT_S_1 +316 0x7000 //TX_A_POST_FILT_S_2 +317 0x4000 //TX_A_POST_FILT_S_3 318 0x4000 //TX_A_POST_FILT_S_4 319 0x4000 //TX_A_POST_FILT_S_5 -320 0x4000 //TX_A_POST_FILT_S_6 +320 0x7FFF //TX_A_POST_FILT_S_6 321 0x4000 //TX_A_POST_FILT_S_7 322 0x0400 //TX_B_POST_FILT_0 -323 0x0400 //TX_B_POST_FILT_1 +323 0x2000 //TX_B_POST_FILT_1 324 0x2000 //TX_B_POST_FILT_2 -325 0x2000 //TX_B_POST_FILT_3 -326 0x4000 //TX_B_POST_FILT_4 +325 0x4000 //TX_B_POST_FILT_3 +326 0x2000 //TX_B_POST_FILT_4 327 0x2000 //TX_B_POST_FILT_5 -328 0x2000 //TX_B_POST_FILT_6 +328 0x0400 //TX_B_POST_FILT_6 329 0x2000 //TX_B_POST_FILT_7 330 0x7FFF //TX_B_LESSCUT_RTO_S_0 331 0x7FFF //TX_B_LESSCUT_RTO_S_1 @@ -348,12 +348,12 @@ 337 0x7FFF //TX_B_LESSCUT_RTO_S_7 338 0x7E14 //TX_LAMBDA_PFILT 339 0x7C29 //TX_LAMBDA_PFILT_S_0 -340 0x7F00 //TX_LAMBDA_PFILT_S_1 -341 0x7C29 //TX_LAMBDA_PFILT_S_2 -342 0x6000 //TX_LAMBDA_PFILT_S_3 +340 0x7C29 //TX_LAMBDA_PFILT_S_1 +341 0x6000 //TX_LAMBDA_PFILT_S_2 +342 0x7C29 //TX_LAMBDA_PFILT_S_3 343 0x7C29 //TX_LAMBDA_PFILT_S_4 344 0x7C29 //TX_LAMBDA_PFILT_S_5 -345 0x7C29 //TX_LAMBDA_PFILT_S_6 +345 0x7F00 //TX_LAMBDA_PFILT_S_6 346 0x7C29 //TX_LAMBDA_PFILT_S_7 347 0x0200 //TX_K_PEPPER 348 0x0400 //TX_A_PEPPER @@ -375,7 +375,7 @@ 364 0x0000 //TX_K_APT 365 0x0001 //TX_NOISEDET 366 0x0190 //TX_NDETCT -367 0x0029 //TX_NOISE_TH_0 +367 0x003B //TX_NOISE_TH_0 368 0x7FFF //TX_NOISE_TH_0_2 369 0x7FFF //TX_NOISE_TH_0_3 370 0x0900 //TX_NOISE_TH_1 @@ -387,11 +387,11 @@ 376 0x0000 //TX_NOISE_TH_5_3 377 0x0000 //TX_NOISE_TH_5_4 378 0x00C8 //TX_NOISE_TH_6 -379 0x0014 //TX_MINENOISE_TH -380 0x4000 //TX_MINENOISE_MIC0_TH_MTS -381 0xFFEE //TX_MINENOISE_MIC0_TH_EXP -382 0x6000 //TX_MINENOISE_MIC0_S_TH_MTS -383 0xFFF3 //TX_MINENOISE_MIC0_S_TH_EXP +379 0x00C8 //TX_MINENOISE_TH +380 0xD508 //TX_MORENS_TFMASK_TH +381 0x0001 //TX_DRC_QUIET_FLOOR +382 0x3A98 //TX_RATIODTL_CUT_TH +383 0x0DAC //TX_DT_CUT_K1 384 0x00A5 //TX_OUT_ENER_S_TH_CLEAN 385 0x00A5 //TX_OUT_ENER_S_TH_LESSCLEAN 386 0x00A5 //TX_OUT_ENER_S_TH_NOISY @@ -399,22 +399,22 @@ 388 0x00CE //TX_OUT_ENER_TH_SPEECH 389 0x2000 //TX_SN_NPB_GAIN 390 0x0000 //TX_NN_NPB_GAIN -391 0x0000 //TX_CSX_ALPHA_0 -392 0x0000 //TX_CSX_ALPHA_1 -393 0x0000 //TX_CSX_ALPHA_2 -394 0x0000 //TX_CSX_ALPHA_3 -395 0x0800 //TX_MU_ARSP_EST -396 0x00C8 //TX_P_OUTBEAM_MIN_TH +391 0x7FFF //TX_POST_MASK_SUP_HSNE +392 0x1388 //TX_TAIL_DET_TH +393 0x4000 //TX_B_LESSCUT_RTO_WTA +394 0x0000 //TX_MEL_G_R +395 0x0080 //TX_SUPHIGH_TH +396 0x0000 //TX_MASK_G_R 397 0x0002 //TX_EXTRA_NS_L -398 0x0800 //TX_EXTRA_NS_A -399 0x0005 //TX_VR_NOISE_FLOOR_TH +398 0x1800 //TX_C_POST_FLT_MASK +399 0x7FFF //TX_A_POST_FLT_WNS 400 0x0148 //TX_MIN_G_LOW300HZ 401 0x0002 //TX_MAXLEVEL_CNG 402 0x00B4 //TX_STN_NOISE_TH 403 0x4000 //TX_POST_MASK_SUP 404 0x7FFF //TX_POST_MASK_ADJUST 405 0x00C8 //TX_NS_ENOISE_MIC0_TH -406 0x0014 //TX_MINENOISE_MIC0_TH +406 0x0032 //TX_MINENOISE_MIC0_TH 407 0x012C //TX_MINENOISE_MIC0_S_TH 408 0x7FFF //TX_MIN_G_CTRL_SSNS 409 0x0000 //TX_METAL_RTO_THR @@ -522,16 +522,16 @@ 511 0x6666 //TX_MIC_TO_BFGAIN 512 0x0000 //TX_MICTOBFGAIN0 513 0x0000 //TX_FASTMUE_TH -514 0x0000 //TX_DERVB_LEN_0 -515 0x0000 //TX_DERVB_LEN_1 -516 0x0000 //TX_RHO_DERVB -517 0x0000 //TX_MIC_INDX_DERVB -518 0x0000 //TX_MU_DERVB -519 0x0000 //TX_DR_RESRV_0 -520 0x0000 //TX_DR_RESRV_1 -521 0x0000 //TX_DR_RESRV_2 -522 0x0000 //TX_DR_RESRV_3 -523 0x0000 //TX_DR_RESRV_4 +514 0xC000 //TX_DEREVERB_LF_MU +515 0xC000 //TX_DEREVERB_HF_MU +516 0xCCCC //TX_DEREVERB_DELAY +517 0xD999 //TX_DEREVERB_COEF_LEN +518 0x1F40 //TX_DEREVERB_DNR +519 0x0000 //TX_DEREVERB_ALPHA +520 0x0000 //TX_DEREVERB_BETA +521 0x0000 //TX_GSC_RTOL_TH +522 0x7000 //TX_GSC_RTOH_TH +523 0x0064 //TX_WIDE2_MEANHTH 524 0x0000 //TX_DR_RESRV_5 525 0x0000 //TX_DR_RESRV_6 526 0x0000 //TX_DR_RESRV_7 @@ -897,16 +897,81 @@ 886 0x0CCD //TX_FASTNS_TFMASKBIN_TH2 887 0x0CCD //TX_FASTNS_TFMASKBIN_TH3 888 0x0028 //TX_FASTNS_ARSPC_TH -889 0x2000 //TX_FASTNS_MASK5_TH +889 0xC000 //TX_FASTNS_MASK5_TH 890 0x4848 //TX_POSTSSA_MIN_G_VR_MASK -891 0x1000 //TX_A_LESSCUT_RTO_MASK +891 0x4000 //TX_A_LESSCUT_RTO_MASK 892 0x1770 //TX_FASTNS_NOISETH 893 0xC000 //TX_FASTNS_SSA_THLFL 894 0xC000 //TX_FASTNS_SSA_THHFL 895 0xCCCC //TX_FASTNS_SSA_THLFH 896 0xD999 //TX_FASTNS_SSA_THHFH +897 0x2339 //TX_SENDFUNC_REG_MICMUTE +898 0x0021 //TX_SENDFUNC_REG_MICMUTE1 +899 0x02BC //TX_MICMUTE_RATIO_THR +900 0x0140 //TX_MICMUTE_AMP_THR +901 0x0004 //TX_MICMUTE_HPF_IND +902 0x00C0 //TX_MICMUTE_LOG_EYR_TH +903 0x0008 //TX_MICMUTE_CVG_TIME +904 0x0008 //TX_MICMUTE_RELEASE_TIME +905 0x01FE //TX_MIC_VOLUME_MIC0MUTE +906 0x0020 //TX_MICMUTE_EPD_OFFSET_0 +907 0x001E //TX_MICMUTE_FRQ_AEC_L +908 0x7999 //TX_MICMUTE_EAD_THR +909 0x7FFF //TX_MICMUTE_LAMBDA_CB_NLE +910 0x7FFF //TX_MICMUTE_LAMBDA_RE_EST +911 0x4000 //TX_DTD_THR1_MICMUTE_0 +912 0x7000 //TX_DTD_THR1_MICMUTE_1 +913 0x7FFF //TX_DTD_THR1_MICMUTE_2 +914 0x7FFF //TX_DTD_THR1_MICMUTE_3 +915 0x6CCC //TX_DTD_THR2_MICMUTE_0 +916 0x0400 //TX_MICMUTE_MIN_EQ_RE_EST_0 +917 0x0400 //TX_MICMUTE_MIN_EQ_RE_EST_1 +918 0x1000 //TX_MICMUTE_MIN_EQ_RE_EST_2 +919 0x7FFF //TX_MICMUTE_MIN_EQ_RE_EST_3 +920 0x7FFF //TX_MICMUTE_MIN_EQ_RE_EST_4 +921 0x4000 //TX_MICMUTE_C_POST_FLT +922 0x03E8 //TX_MICMUTE_DT_CUT_K +923 0x0001 //TX_MICMUTE_DT_CUT_THR +924 0x03E8 //TX_MICMUTE_DT_CUT_K2 +925 0x0001 //TX_MICMUTE_DT_CUT_THR2 +926 0x0064 //TX_MICMUTE_DT2_HOLD_N +927 0x1000 //TX_MICMUTE_RATIODTH_THCUT +928 0x1000 //TX_MICMUTE_B_POST_FLT_ECHOL +929 0x7FFF //TX_MICMUTE_B_POST_FLT_ECHOH +930 0x0400 //TX_MICMUTE_C_POST_FLT_MASK +931 0x7999 //TX_MICMUTE_RATIODTL_CUT_TH +932 0x0258 //TX_MICMUTE_DT_CUT_K1 +933 0x0800 //TX_MICMUTE_N2_SN_EST +934 0xFC00 //TX_MICMUTE_THR_SN_EST_0 +935 0x001C //TX_MICMUTE_MIN_G_CTRL_0 +936 0x6000 //TX_MICMUTE_A_POST_FILT_S_0 +937 0x7000 //TX_MICMUTE_B_POST_FILT_0 +938 0x2710 //TX_MIC1RUB_AMP_THR +939 0x0010 //TX_MIC1MUTE_RATIO_THR +940 0x0450 //TX_MIC1MUTE_AMP_THR +941 0x0008 //TX_MIC1MUTE_CVG_TIME +942 0x0008 //TX_MIC1MUTE_RELEASE_TIME +943 0x0000 //TX_AMS_RESRV_01 +944 0x0000 //TX_AMS_RESRV_02 +945 0x0000 //TX_AMS_RESRV_03 +946 0x0000 //TX_AMS_RESRV_04 +947 0x0000 //TX_AMS_RESRV_05 +948 0x0000 //TX_AMS_RESRV_06 +949 0x0000 //TX_AMS_RESRV_07 +950 0x0000 //TX_AMS_RESRV_08 +951 0x0000 //TX_AMS_RESRV_09 +952 0x0000 //TX_AMS_RESRV_10 +953 0x0000 //TX_AMS_RESRV_11 +954 0x0000 //TX_AMS_RESRV_12 +955 0x0000 //TX_AMS_RESRV_13 +956 0x0000 //TX_AMS_RESRV_14 +957 0x0000 //TX_AMS_RESRV_15 +958 0x0000 //TX_AMS_RESRV_16 +959 0x0000 //TX_AMS_RESRV_17 +960 0x0000 //TX_AMS_RESRV_18 +961 0x0000 //TX_AMS_RESRV_19 #RX -0 0x042C //RX_RECVFUNC_MODE_0 +0 0x242C //RX_RECVFUNC_MODE_0 1 0x0000 //RX_RECVFUNC_MODE_1 2 0x0000 //RX_SAMPLINGFREQ_SIG 3 0x0000 //RX_SAMPLINGFREQ_PROC @@ -939,7 +1004,7 @@ 30 0x0002 //RX_EXTRA_NS_L 31 0x0800 //RX_EXTRA_NS_A 32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 -33 0x5FFC //RX_TDDRC_LIMITER_THRD +33 0x7220 //RX_TDDRC_LIMITER_THRD 34 0x0800 //RX_TDDRC_LIMITER_GAIN 35 0x199A //RX_A_POST_FLT 36 0x0000 //RX_LMT_THRD @@ -1020,22 +1085,22 @@ 111 0x0002 //RX_FILTINDX 112 0x0000 //RX_TDDRC_THRD_0 113 0x0000 //RX_TDDRC_THRD_1 -114 0x1C00 //RX_TDDRC_THRD_2 -115 0x1D00 //RX_TDDRC_THRD_3 -116 0x3000 //RX_TDDRC_SLANT_0 -117 0x7EB8 //RX_TDDRC_SLANT_1 +114 0x1800 //RX_TDDRC_THRD_2 +115 0x1800 //RX_TDDRC_THRD_3 +116 0x7FFF //RX_TDDRC_SLANT_0 +117 0x7FFF //RX_TDDRC_SLANT_1 118 0x3000 //RX_TDDRC_ALPHA_UP_0 119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 120 0x0000 //RX_TDDRC_HMNC_FLAG 121 0x199A //RX_TDDRC_HMNC_GAIN 122 0x0001 //RX_TDDRC_SMT_FLAG 123 0x0CCD //RX_TDDRC_SMT_W -124 0x01F4 //RX_TDDRC_DRC_GAIN +124 0x0211 //RX_TDDRC_DRC_GAIN 125 0x7C00 //RX_LAMBDA_PKA_FP 126 0x280A //RX_TPKA_FP 127 0x032D //RX_MIN_G_FP 128 0x0A00 //RX_MAX_G_FP -129 0x000A //RX_SPK_VOL +129 0x0009 //RX_SPK_VOL 130 0x0000 //RX_VOL_RESRV_0 131 0x0000 //RX_MAXLEVEL_CNG 132 0x3000 //RX_BWE_UV_TH @@ -1756,11 +1821,862 @@ 110 0x0000 //RX_FDDRC_RESRV_0 129 0x0100 //RX_SPK_VOL 130 0x0000 //RX_VOL_RESRV_0 +#RX 2 +157 0x242C //RX_RECVFUNC_MODE_0 +158 0x0000 //RX_RECVFUNC_MODE_1 +159 0x0000 //RX_SAMPLINGFREQ_SIG +160 0x0000 //RX_SAMPLINGFREQ_PROC +161 0x000A //RX_FRAME_SZ +162 0x0000 //RX_DELAY_OPT +163 0x3000 //RX_TDDRC_ALPHA_UP_1 +164 0x3000 //RX_TDDRC_ALPHA_UP_2 +165 0x3000 //RX_TDDRC_ALPHA_UP_3 +166 0x3000 //RX_TDDRC_ALPHA_UP_4 +167 0x0800 //RX_PGA +168 0x7FFF //RX_A_HP +169 0x0000 //RX_B_PE +170 0x3800 //RX_THR_PITCH_DET_0 +171 0x3000 //RX_THR_PITCH_DET_1 +172 0x2800 //RX_THR_PITCH_DET_2 +173 0x0008 //RX_PITCH_BFR_LEN +174 0x0003 //RX_SBD_PITCH_DET +175 0x0100 //RX_PP_RESRV_0 +176 0x0020 //RX_PP_RESRV_1 +177 0x0600 //RX_N_SN_EST +178 0x000C //RX_N2_SN_EST +179 0x0010 //RX_NS_LVL_CTRL +180 0xF800 //RX_THR_SN_EST +181 0x7CCD //RX_LAMBDA_PFILT +182 0x000A //RX_FENS_RESRV_0 +183 0x0190 //RX_FENS_RESRV_1 +184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +187 0x0002 //RX_EXTRA_NS_L +188 0x0800 //RX_EXTRA_NS_A +189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +190 0x7220 //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +192 0x199A //RX_A_POST_FLT +193 0x0000 //RX_LMT_THRD +194 0x4000 //RX_LMT_ALPHA +195 0x0014 //RX_FDEQ_SUBNUM +196 0x4848 //RX_FDEQ_GAIN_0 +197 0x4848 //RX_FDEQ_GAIN_1 +198 0x4848 //RX_FDEQ_GAIN_2 +199 0x4848 //RX_FDEQ_GAIN_3 +200 0x4848 //RX_FDEQ_GAIN_4 +201 0x4848 //RX_FDEQ_GAIN_5 +202 0x4848 //RX_FDEQ_GAIN_6 +203 0x4848 //RX_FDEQ_GAIN_7 +204 0x4848 //RX_FDEQ_GAIN_8 +205 0x4848 //RX_FDEQ_GAIN_9 +206 0x4848 //RX_FDEQ_GAIN_10 +207 0x4848 //RX_FDEQ_GAIN_11 +208 0x4848 //RX_FDEQ_GAIN_12 +209 0x4848 //RX_FDEQ_GAIN_13 +210 0x4848 //RX_FDEQ_GAIN_14 +211 0x4848 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0202 //RX_FDEQ_BIN_0 +221 0x0203 //RX_FDEQ_BIN_1 +222 0x0303 //RX_FDEQ_BIN_2 +223 0x0304 //RX_FDEQ_BIN_3 +224 0x0405 //RX_FDEQ_BIN_4 +225 0x0506 //RX_FDEQ_BIN_5 +226 0x0708 //RX_FDEQ_BIN_6 +227 0x090A //RX_FDEQ_BIN_7 +228 0x0B0C //RX_FDEQ_BIN_8 +229 0x0D08 //RX_FDEQ_BIN_9 +230 0x0000 //RX_FDEQ_BIN_10 +231 0x0000 //RX_FDEQ_BIN_11 +232 0x0000 //RX_FDEQ_BIN_12 +233 0x0000 //RX_FDEQ_BIN_13 +234 0x0000 //RX_FDEQ_BIN_14 +235 0x0000 //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x4000 //RX_FDEQ_RESRV_0 +245 0x0320 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0030 //RX_FDDRC_BAND_MARGIN_1 +248 0x0050 //RX_FDDRC_BAND_MARGIN_2 +249 0x0080 //RX_FDDRC_BAND_MARGIN_3 +250 0x0007 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x5000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x6400 //RX_FDDRC_THRD_3_2 +258 0x6400 //RX_FDDRC_THRD_3_3 +259 0x2000 //RX_FDDRC_SLANT_0_0 +260 0x2000 //RX_FDDRC_SLANT_0_1 +261 0x2000 //RX_FDDRC_SLANT_0_2 +262 0x2000 //RX_FDDRC_SLANT_0_3 +263 0x5333 //RX_FDDRC_SLANT_1_0 +264 0x5333 //RX_FDDRC_SLANT_1_1 +265 0x5333 //RX_FDDRC_SLANT_1_2 +266 0x5333 //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +268 0x0002 //RX_FILTINDX +269 0x0000 //RX_TDDRC_THRD_0 +270 0x0000 //RX_TDDRC_THRD_1 +271 0x1800 //RX_TDDRC_THRD_2 +272 0x1800 //RX_TDDRC_THRD_3 +273 0x7FFF //RX_TDDRC_SLANT_0 +274 0x7FFF //RX_TDDRC_SLANT_1 +275 0x3000 //RX_TDDRC_ALPHA_UP_0 +276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x199A //RX_TDDRC_HMNC_GAIN +279 0x0001 //RX_TDDRC_SMT_FLAG +280 0x0CCD //RX_TDDRC_SMT_W +281 0x0211 //RX_TDDRC_DRC_GAIN +282 0x7C00 //RX_LAMBDA_PKA_FP +283 0x280A //RX_TPKA_FP +284 0x032D //RX_MIN_G_FP +285 0x0A00 //RX_MAX_G_FP +286 0x0009 //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 +288 0x0000 //RX_MAXLEVEL_CNG +289 0x3000 //RX_BWE_UV_TH +290 0x3000 //RX_BWE_UV_TH2 +291 0x1800 //RX_BWE_UV_TH3 +292 0x1000 //RX_BWE_V_TH +293 0x04CD //RX_BWE_GAIN1_V_TH1 +294 0x0F33 //RX_BWE_GAIN1_V_TH2 +295 0x7333 //RX_BWE_UV_EQ +296 0x199A //RX_BWE_V_EQ +297 0x7333 //RX_BWE_TONE_TH +298 0x0004 //RX_BWE_UV_HOLD_T +299 0x6CCD //RX_BWE_GAIN2_ALPHA +300 0x799A //RX_BWE_GAIN3_ALPHA +301 0x001E //RX_BWE_CUTOFF +302 0x3000 //RX_BWE_GAINFILL +303 0x3200 //RX_BWE_MAXTH_TONE +304 0x2000 //RX_BWE_EQ_0 +305 0x2000 //RX_BWE_EQ_1 +306 0x2000 //RX_BWE_EQ_2 +307 0x2000 //RX_BWE_EQ_3 +308 0x2000 //RX_BWE_EQ_4 +309 0x2000 //RX_BWE_EQ_5 +310 0x2000 //RX_BWE_EQ_6 +311 0x0000 //RX_BWE_RESRV_0 +312 0x0000 //RX_BWE_RESRV_1 +313 0x0000 //RX_BWE_RESRV_2 +#VOL 0 +163 0x3000 //RX_TDDRC_ALPHA_UP_1 +164 0x3000 //RX_TDDRC_ALPHA_UP_2 +165 0x3000 //RX_TDDRC_ALPHA_UP_3 +166 0x3000 //RX_TDDRC_ALPHA_UP_4 +184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +190 0x7220 //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +269 0x0000 //RX_TDDRC_THRD_0 +270 0x0000 //RX_TDDRC_THRD_1 +271 0x1800 //RX_TDDRC_THRD_2 +272 0x1800 //RX_TDDRC_THRD_3 +273 0x7FFF //RX_TDDRC_SLANT_0 +274 0x7FFF //RX_TDDRC_SLANT_1 +275 0x3000 //RX_TDDRC_ALPHA_UP_0 +276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x199A //RX_TDDRC_HMNC_GAIN +279 0x0001 //RX_TDDRC_SMT_FLAG +280 0x0CCD //RX_TDDRC_SMT_W +281 0x0211 //RX_TDDRC_DRC_GAIN +195 0x0014 //RX_FDEQ_SUBNUM +196 0x4848 //RX_FDEQ_GAIN_0 +197 0x4848 //RX_FDEQ_GAIN_1 +198 0x4848 //RX_FDEQ_GAIN_2 +199 0x4848 //RX_FDEQ_GAIN_3 +200 0x4848 //RX_FDEQ_GAIN_4 +201 0x4848 //RX_FDEQ_GAIN_5 +202 0x4848 //RX_FDEQ_GAIN_6 +203 0x4848 //RX_FDEQ_GAIN_7 +204 0x4848 //RX_FDEQ_GAIN_8 +205 0x4848 //RX_FDEQ_GAIN_9 +206 0x4848 //RX_FDEQ_GAIN_10 +207 0x4848 //RX_FDEQ_GAIN_11 +208 0x4848 //RX_FDEQ_GAIN_12 +209 0x4848 //RX_FDEQ_GAIN_13 +210 0x4848 //RX_FDEQ_GAIN_14 +211 0x4848 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0202 //RX_FDEQ_BIN_0 +221 0x0203 //RX_FDEQ_BIN_1 +222 0x0303 //RX_FDEQ_BIN_2 +223 0x0304 //RX_FDEQ_BIN_3 +224 0x0405 //RX_FDEQ_BIN_4 +225 0x0506 //RX_FDEQ_BIN_5 +226 0x0708 //RX_FDEQ_BIN_6 +227 0x090A //RX_FDEQ_BIN_7 +228 0x0B0C //RX_FDEQ_BIN_8 +229 0x0D08 //RX_FDEQ_BIN_9 +230 0x0000 //RX_FDEQ_BIN_10 +231 0x0000 //RX_FDEQ_BIN_11 +232 0x0000 //RX_FDEQ_BIN_12 +233 0x0000 //RX_FDEQ_BIN_13 +234 0x0000 //RX_FDEQ_BIN_14 +235 0x0000 //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x4000 //RX_FDEQ_RESRV_0 +245 0x0320 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0030 //RX_FDDRC_BAND_MARGIN_1 +248 0x0050 //RX_FDDRC_BAND_MARGIN_2 +249 0x0080 //RX_FDDRC_BAND_MARGIN_3 +250 0x0007 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x5000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x6400 //RX_FDDRC_THRD_3_2 +258 0x6400 //RX_FDDRC_THRD_3_3 +259 0x2000 //RX_FDDRC_SLANT_0_0 +260 0x2000 //RX_FDDRC_SLANT_0_1 +261 0x2000 //RX_FDDRC_SLANT_0_2 +262 0x2000 //RX_FDDRC_SLANT_0_3 +263 0x5333 //RX_FDDRC_SLANT_1_0 +264 0x5333 //RX_FDDRC_SLANT_1_1 +265 0x5333 //RX_FDDRC_SLANT_1_2 +266 0x5333 //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +286 0x0009 //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 +#VOL 1 +163 0x3000 //RX_TDDRC_ALPHA_UP_1 +164 0x3000 //RX_TDDRC_ALPHA_UP_2 +165 0x3000 //RX_TDDRC_ALPHA_UP_3 +166 0x3000 //RX_TDDRC_ALPHA_UP_4 +184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +190 0x7220 //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +269 0x0000 //RX_TDDRC_THRD_0 +270 0x0000 //RX_TDDRC_THRD_1 +271 0x1800 //RX_TDDRC_THRD_2 +272 0x1800 //RX_TDDRC_THRD_3 +273 0x7FFF //RX_TDDRC_SLANT_0 +274 0x7FFF //RX_TDDRC_SLANT_1 +275 0x3000 //RX_TDDRC_ALPHA_UP_0 +276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x199A //RX_TDDRC_HMNC_GAIN +279 0x0001 //RX_TDDRC_SMT_FLAG +280 0x0CCD //RX_TDDRC_SMT_W +281 0x0211 //RX_TDDRC_DRC_GAIN +195 0x0014 //RX_FDEQ_SUBNUM +196 0x4848 //RX_FDEQ_GAIN_0 +197 0x4848 //RX_FDEQ_GAIN_1 +198 0x4848 //RX_FDEQ_GAIN_2 +199 0x4848 //RX_FDEQ_GAIN_3 +200 0x4848 //RX_FDEQ_GAIN_4 +201 0x4848 //RX_FDEQ_GAIN_5 +202 0x4848 //RX_FDEQ_GAIN_6 +203 0x4848 //RX_FDEQ_GAIN_7 +204 0x4848 //RX_FDEQ_GAIN_8 +205 0x4848 //RX_FDEQ_GAIN_9 +206 0x4848 //RX_FDEQ_GAIN_10 +207 0x4848 //RX_FDEQ_GAIN_11 +208 0x4848 //RX_FDEQ_GAIN_12 +209 0x4848 //RX_FDEQ_GAIN_13 +210 0x4848 //RX_FDEQ_GAIN_14 +211 0x4848 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0202 //RX_FDEQ_BIN_0 +221 0x0203 //RX_FDEQ_BIN_1 +222 0x0303 //RX_FDEQ_BIN_2 +223 0x0304 //RX_FDEQ_BIN_3 +224 0x0405 //RX_FDEQ_BIN_4 +225 0x0506 //RX_FDEQ_BIN_5 +226 0x0708 //RX_FDEQ_BIN_6 +227 0x090A //RX_FDEQ_BIN_7 +228 0x0B0C //RX_FDEQ_BIN_8 +229 0x0D08 //RX_FDEQ_BIN_9 +230 0x0000 //RX_FDEQ_BIN_10 +231 0x0000 //RX_FDEQ_BIN_11 +232 0x0000 //RX_FDEQ_BIN_12 +233 0x0000 //RX_FDEQ_BIN_13 +234 0x0000 //RX_FDEQ_BIN_14 +235 0x0000 //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x4000 //RX_FDEQ_RESRV_0 +245 0x0320 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0030 //RX_FDDRC_BAND_MARGIN_1 +248 0x0050 //RX_FDDRC_BAND_MARGIN_2 +249 0x0080 //RX_FDDRC_BAND_MARGIN_3 +250 0x0007 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x5000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x6400 //RX_FDDRC_THRD_3_2 +258 0x6400 //RX_FDDRC_THRD_3_3 +259 0x2000 //RX_FDDRC_SLANT_0_0 +260 0x2000 //RX_FDDRC_SLANT_0_1 +261 0x2000 //RX_FDDRC_SLANT_0_2 +262 0x2000 //RX_FDDRC_SLANT_0_3 +263 0x5333 //RX_FDDRC_SLANT_1_0 +264 0x5333 //RX_FDDRC_SLANT_1_1 +265 0x5333 //RX_FDDRC_SLANT_1_2 +266 0x5333 //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +286 0x000F //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 +#VOL 2 +163 0x3000 //RX_TDDRC_ALPHA_UP_1 +164 0x3000 //RX_TDDRC_ALPHA_UP_2 +165 0x3000 //RX_TDDRC_ALPHA_UP_3 +166 0x3000 //RX_TDDRC_ALPHA_UP_4 +184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +190 0x7220 //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +269 0x0000 //RX_TDDRC_THRD_0 +270 0x0000 //RX_TDDRC_THRD_1 +271 0x1800 //RX_TDDRC_THRD_2 +272 0x1800 //RX_TDDRC_THRD_3 +273 0x7FFF //RX_TDDRC_SLANT_0 +274 0x7FFF //RX_TDDRC_SLANT_1 +275 0x3000 //RX_TDDRC_ALPHA_UP_0 +276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x199A //RX_TDDRC_HMNC_GAIN +279 0x0001 //RX_TDDRC_SMT_FLAG +280 0x0CCD //RX_TDDRC_SMT_W +281 0x0211 //RX_TDDRC_DRC_GAIN +195 0x0014 //RX_FDEQ_SUBNUM +196 0x4848 //RX_FDEQ_GAIN_0 +197 0x4848 //RX_FDEQ_GAIN_1 +198 0x4848 //RX_FDEQ_GAIN_2 +199 0x4848 //RX_FDEQ_GAIN_3 +200 0x4848 //RX_FDEQ_GAIN_4 +201 0x4848 //RX_FDEQ_GAIN_5 +202 0x4848 //RX_FDEQ_GAIN_6 +203 0x4848 //RX_FDEQ_GAIN_7 +204 0x4848 //RX_FDEQ_GAIN_8 +205 0x4848 //RX_FDEQ_GAIN_9 +206 0x4848 //RX_FDEQ_GAIN_10 +207 0x4848 //RX_FDEQ_GAIN_11 +208 0x4848 //RX_FDEQ_GAIN_12 +209 0x4848 //RX_FDEQ_GAIN_13 +210 0x4848 //RX_FDEQ_GAIN_14 +211 0x4848 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0202 //RX_FDEQ_BIN_0 +221 0x0203 //RX_FDEQ_BIN_1 +222 0x0303 //RX_FDEQ_BIN_2 +223 0x0304 //RX_FDEQ_BIN_3 +224 0x0405 //RX_FDEQ_BIN_4 +225 0x0506 //RX_FDEQ_BIN_5 +226 0x0708 //RX_FDEQ_BIN_6 +227 0x090A //RX_FDEQ_BIN_7 +228 0x0B0C //RX_FDEQ_BIN_8 +229 0x0D08 //RX_FDEQ_BIN_9 +230 0x0000 //RX_FDEQ_BIN_10 +231 0x0000 //RX_FDEQ_BIN_11 +232 0x0000 //RX_FDEQ_BIN_12 +233 0x0000 //RX_FDEQ_BIN_13 +234 0x0000 //RX_FDEQ_BIN_14 +235 0x0000 //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x4000 //RX_FDEQ_RESRV_0 +245 0x0320 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0030 //RX_FDDRC_BAND_MARGIN_1 +248 0x0050 //RX_FDDRC_BAND_MARGIN_2 +249 0x0080 //RX_FDDRC_BAND_MARGIN_3 +250 0x0007 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x5000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x6400 //RX_FDDRC_THRD_3_2 +258 0x6400 //RX_FDDRC_THRD_3_3 +259 0x2000 //RX_FDDRC_SLANT_0_0 +260 0x2000 //RX_FDDRC_SLANT_0_1 +261 0x2000 //RX_FDDRC_SLANT_0_2 +262 0x2000 //RX_FDDRC_SLANT_0_3 +263 0x5333 //RX_FDDRC_SLANT_1_0 +264 0x5333 //RX_FDDRC_SLANT_1_1 +265 0x5333 //RX_FDDRC_SLANT_1_2 +266 0x5333 //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +286 0x0019 //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 +#VOL 3 +163 0x3000 //RX_TDDRC_ALPHA_UP_1 +164 0x3000 //RX_TDDRC_ALPHA_UP_2 +165 0x3000 //RX_TDDRC_ALPHA_UP_3 +166 0x3000 //RX_TDDRC_ALPHA_UP_4 +184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +190 0x7220 //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +269 0x0000 //RX_TDDRC_THRD_0 +270 0x0000 //RX_TDDRC_THRD_1 +271 0x1800 //RX_TDDRC_THRD_2 +272 0x1800 //RX_TDDRC_THRD_3 +273 0x7FFF //RX_TDDRC_SLANT_0 +274 0x7FFF //RX_TDDRC_SLANT_1 +275 0x3000 //RX_TDDRC_ALPHA_UP_0 +276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x199A //RX_TDDRC_HMNC_GAIN +279 0x0001 //RX_TDDRC_SMT_FLAG +280 0x0CCD //RX_TDDRC_SMT_W +281 0x0211 //RX_TDDRC_DRC_GAIN +195 0x0014 //RX_FDEQ_SUBNUM +196 0x4848 //RX_FDEQ_GAIN_0 +197 0x4848 //RX_FDEQ_GAIN_1 +198 0x4848 //RX_FDEQ_GAIN_2 +199 0x4848 //RX_FDEQ_GAIN_3 +200 0x4848 //RX_FDEQ_GAIN_4 +201 0x4848 //RX_FDEQ_GAIN_5 +202 0x4848 //RX_FDEQ_GAIN_6 +203 0x4848 //RX_FDEQ_GAIN_7 +204 0x4848 //RX_FDEQ_GAIN_8 +205 0x4848 //RX_FDEQ_GAIN_9 +206 0x4848 //RX_FDEQ_GAIN_10 +207 0x4848 //RX_FDEQ_GAIN_11 +208 0x4848 //RX_FDEQ_GAIN_12 +209 0x4848 //RX_FDEQ_GAIN_13 +210 0x4848 //RX_FDEQ_GAIN_14 +211 0x4848 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0202 //RX_FDEQ_BIN_0 +221 0x0203 //RX_FDEQ_BIN_1 +222 0x0303 //RX_FDEQ_BIN_2 +223 0x0304 //RX_FDEQ_BIN_3 +224 0x0405 //RX_FDEQ_BIN_4 +225 0x0506 //RX_FDEQ_BIN_5 +226 0x0708 //RX_FDEQ_BIN_6 +227 0x090A //RX_FDEQ_BIN_7 +228 0x0B0C //RX_FDEQ_BIN_8 +229 0x0D08 //RX_FDEQ_BIN_9 +230 0x0000 //RX_FDEQ_BIN_10 +231 0x0000 //RX_FDEQ_BIN_11 +232 0x0000 //RX_FDEQ_BIN_12 +233 0x0000 //RX_FDEQ_BIN_13 +234 0x0000 //RX_FDEQ_BIN_14 +235 0x0000 //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x4000 //RX_FDEQ_RESRV_0 +245 0x0320 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0030 //RX_FDDRC_BAND_MARGIN_1 +248 0x0050 //RX_FDDRC_BAND_MARGIN_2 +249 0x0080 //RX_FDDRC_BAND_MARGIN_3 +250 0x0007 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x5000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x6400 //RX_FDDRC_THRD_3_2 +258 0x6400 //RX_FDDRC_THRD_3_3 +259 0x2000 //RX_FDDRC_SLANT_0_0 +260 0x2000 //RX_FDDRC_SLANT_0_1 +261 0x2000 //RX_FDDRC_SLANT_0_2 +262 0x2000 //RX_FDDRC_SLANT_0_3 +263 0x5333 //RX_FDDRC_SLANT_1_0 +264 0x5333 //RX_FDDRC_SLANT_1_1 +265 0x5333 //RX_FDDRC_SLANT_1_2 +266 0x5333 //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +286 0x002B //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 +#VOL 4 +163 0x3000 //RX_TDDRC_ALPHA_UP_1 +164 0x3000 //RX_TDDRC_ALPHA_UP_2 +165 0x3000 //RX_TDDRC_ALPHA_UP_3 +166 0x3000 //RX_TDDRC_ALPHA_UP_4 +184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +190 0x7220 //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +269 0x0000 //RX_TDDRC_THRD_0 +270 0x0000 //RX_TDDRC_THRD_1 +271 0x1800 //RX_TDDRC_THRD_2 +272 0x1800 //RX_TDDRC_THRD_3 +273 0x7FFF //RX_TDDRC_SLANT_0 +274 0x7FFF //RX_TDDRC_SLANT_1 +275 0x3000 //RX_TDDRC_ALPHA_UP_0 +276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x199A //RX_TDDRC_HMNC_GAIN +279 0x0001 //RX_TDDRC_SMT_FLAG +280 0x0CCD //RX_TDDRC_SMT_W +281 0x0211 //RX_TDDRC_DRC_GAIN +195 0x0014 //RX_FDEQ_SUBNUM +196 0x4848 //RX_FDEQ_GAIN_0 +197 0x4848 //RX_FDEQ_GAIN_1 +198 0x4848 //RX_FDEQ_GAIN_2 +199 0x4848 //RX_FDEQ_GAIN_3 +200 0x4848 //RX_FDEQ_GAIN_4 +201 0x4848 //RX_FDEQ_GAIN_5 +202 0x4848 //RX_FDEQ_GAIN_6 +203 0x4848 //RX_FDEQ_GAIN_7 +204 0x4848 //RX_FDEQ_GAIN_8 +205 0x4848 //RX_FDEQ_GAIN_9 +206 0x4848 //RX_FDEQ_GAIN_10 +207 0x4848 //RX_FDEQ_GAIN_11 +208 0x4848 //RX_FDEQ_GAIN_12 +209 0x4848 //RX_FDEQ_GAIN_13 +210 0x4848 //RX_FDEQ_GAIN_14 +211 0x4848 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0202 //RX_FDEQ_BIN_0 +221 0x0203 //RX_FDEQ_BIN_1 +222 0x0303 //RX_FDEQ_BIN_2 +223 0x0304 //RX_FDEQ_BIN_3 +224 0x0405 //RX_FDEQ_BIN_4 +225 0x0506 //RX_FDEQ_BIN_5 +226 0x0708 //RX_FDEQ_BIN_6 +227 0x090A //RX_FDEQ_BIN_7 +228 0x0B0C //RX_FDEQ_BIN_8 +229 0x0D08 //RX_FDEQ_BIN_9 +230 0x0000 //RX_FDEQ_BIN_10 +231 0x0000 //RX_FDEQ_BIN_11 +232 0x0000 //RX_FDEQ_BIN_12 +233 0x0000 //RX_FDEQ_BIN_13 +234 0x0000 //RX_FDEQ_BIN_14 +235 0x0000 //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x4000 //RX_FDEQ_RESRV_0 +245 0x0320 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0030 //RX_FDDRC_BAND_MARGIN_1 +248 0x0050 //RX_FDDRC_BAND_MARGIN_2 +249 0x0080 //RX_FDDRC_BAND_MARGIN_3 +250 0x0007 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x5000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x6400 //RX_FDDRC_THRD_3_2 +258 0x6400 //RX_FDDRC_THRD_3_3 +259 0x2000 //RX_FDDRC_SLANT_0_0 +260 0x2000 //RX_FDDRC_SLANT_0_1 +261 0x2000 //RX_FDDRC_SLANT_0_2 +262 0x2000 //RX_FDDRC_SLANT_0_3 +263 0x5333 //RX_FDDRC_SLANT_1_0 +264 0x5333 //RX_FDDRC_SLANT_1_1 +265 0x5333 //RX_FDDRC_SLANT_1_2 +266 0x5333 //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +286 0x0048 //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 +#VOL 5 +163 0x3000 //RX_TDDRC_ALPHA_UP_1 +164 0x3000 //RX_TDDRC_ALPHA_UP_2 +165 0x3000 //RX_TDDRC_ALPHA_UP_3 +166 0x3000 //RX_TDDRC_ALPHA_UP_4 +184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +190 0x7220 //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +269 0x0000 //RX_TDDRC_THRD_0 +270 0x0000 //RX_TDDRC_THRD_1 +271 0x1800 //RX_TDDRC_THRD_2 +272 0x1800 //RX_TDDRC_THRD_3 +273 0x7FFF //RX_TDDRC_SLANT_0 +274 0x7FFF //RX_TDDRC_SLANT_1 +275 0x3000 //RX_TDDRC_ALPHA_UP_0 +276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x199A //RX_TDDRC_HMNC_GAIN +279 0x0001 //RX_TDDRC_SMT_FLAG +280 0x0CCD //RX_TDDRC_SMT_W +281 0x0211 //RX_TDDRC_DRC_GAIN +195 0x0014 //RX_FDEQ_SUBNUM +196 0x4848 //RX_FDEQ_GAIN_0 +197 0x4848 //RX_FDEQ_GAIN_1 +198 0x4848 //RX_FDEQ_GAIN_2 +199 0x4848 //RX_FDEQ_GAIN_3 +200 0x4848 //RX_FDEQ_GAIN_4 +201 0x4848 //RX_FDEQ_GAIN_5 +202 0x4848 //RX_FDEQ_GAIN_6 +203 0x4848 //RX_FDEQ_GAIN_7 +204 0x4848 //RX_FDEQ_GAIN_8 +205 0x4848 //RX_FDEQ_GAIN_9 +206 0x4848 //RX_FDEQ_GAIN_10 +207 0x4848 //RX_FDEQ_GAIN_11 +208 0x4848 //RX_FDEQ_GAIN_12 +209 0x4848 //RX_FDEQ_GAIN_13 +210 0x4848 //RX_FDEQ_GAIN_14 +211 0x4848 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0202 //RX_FDEQ_BIN_0 +221 0x0203 //RX_FDEQ_BIN_1 +222 0x0303 //RX_FDEQ_BIN_2 +223 0x0304 //RX_FDEQ_BIN_3 +224 0x0405 //RX_FDEQ_BIN_4 +225 0x0506 //RX_FDEQ_BIN_5 +226 0x0708 //RX_FDEQ_BIN_6 +227 0x090A //RX_FDEQ_BIN_7 +228 0x0B0C //RX_FDEQ_BIN_8 +229 0x0D08 //RX_FDEQ_BIN_9 +230 0x0000 //RX_FDEQ_BIN_10 +231 0x0000 //RX_FDEQ_BIN_11 +232 0x0000 //RX_FDEQ_BIN_12 +233 0x0000 //RX_FDEQ_BIN_13 +234 0x0000 //RX_FDEQ_BIN_14 +235 0x0000 //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x4000 //RX_FDEQ_RESRV_0 +245 0x0320 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0030 //RX_FDDRC_BAND_MARGIN_1 +248 0x0050 //RX_FDDRC_BAND_MARGIN_2 +249 0x0080 //RX_FDDRC_BAND_MARGIN_3 +250 0x0007 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x5000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x6400 //RX_FDDRC_THRD_3_2 +258 0x6400 //RX_FDDRC_THRD_3_3 +259 0x2000 //RX_FDDRC_SLANT_0_0 +260 0x2000 //RX_FDDRC_SLANT_0_1 +261 0x2000 //RX_FDDRC_SLANT_0_2 +262 0x2000 //RX_FDDRC_SLANT_0_3 +263 0x5333 //RX_FDDRC_SLANT_1_0 +264 0x5333 //RX_FDDRC_SLANT_1_1 +265 0x5333 //RX_FDDRC_SLANT_1_2 +266 0x5333 //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +286 0x007A //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 +#VOL 6 +163 0x3000 //RX_TDDRC_ALPHA_UP_1 +164 0x3000 //RX_TDDRC_ALPHA_UP_2 +165 0x3000 //RX_TDDRC_ALPHA_UP_3 +166 0x3000 //RX_TDDRC_ALPHA_UP_4 +184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +190 0x7220 //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +269 0x0000 //RX_TDDRC_THRD_0 +270 0x0000 //RX_TDDRC_THRD_1 +271 0x1800 //RX_TDDRC_THRD_2 +272 0x1800 //RX_TDDRC_THRD_3 +273 0x7FFF //RX_TDDRC_SLANT_0 +274 0x7FFF //RX_TDDRC_SLANT_1 +275 0x3000 //RX_TDDRC_ALPHA_UP_0 +276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x199A //RX_TDDRC_HMNC_GAIN +279 0x0001 //RX_TDDRC_SMT_FLAG +280 0x0CCD //RX_TDDRC_SMT_W +281 0x0211 //RX_TDDRC_DRC_GAIN +195 0x0014 //RX_FDEQ_SUBNUM +196 0x4848 //RX_FDEQ_GAIN_0 +197 0x4848 //RX_FDEQ_GAIN_1 +198 0x4848 //RX_FDEQ_GAIN_2 +199 0x4848 //RX_FDEQ_GAIN_3 +200 0x4848 //RX_FDEQ_GAIN_4 +201 0x4848 //RX_FDEQ_GAIN_5 +202 0x4848 //RX_FDEQ_GAIN_6 +203 0x4848 //RX_FDEQ_GAIN_7 +204 0x4848 //RX_FDEQ_GAIN_8 +205 0x4848 //RX_FDEQ_GAIN_9 +206 0x4848 //RX_FDEQ_GAIN_10 +207 0x4848 //RX_FDEQ_GAIN_11 +208 0x4848 //RX_FDEQ_GAIN_12 +209 0x4848 //RX_FDEQ_GAIN_13 +210 0x4848 //RX_FDEQ_GAIN_14 +211 0x4848 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0202 //RX_FDEQ_BIN_0 +221 0x0203 //RX_FDEQ_BIN_1 +222 0x0303 //RX_FDEQ_BIN_2 +223 0x0304 //RX_FDEQ_BIN_3 +224 0x0405 //RX_FDEQ_BIN_4 +225 0x0506 //RX_FDEQ_BIN_5 +226 0x0708 //RX_FDEQ_BIN_6 +227 0x090A //RX_FDEQ_BIN_7 +228 0x0B0C //RX_FDEQ_BIN_8 +229 0x0D08 //RX_FDEQ_BIN_9 +230 0x0000 //RX_FDEQ_BIN_10 +231 0x0000 //RX_FDEQ_BIN_11 +232 0x0000 //RX_FDEQ_BIN_12 +233 0x0000 //RX_FDEQ_BIN_13 +234 0x0000 //RX_FDEQ_BIN_14 +235 0x0000 //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x4000 //RX_FDEQ_RESRV_0 +245 0x0320 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0030 //RX_FDDRC_BAND_MARGIN_1 +248 0x0050 //RX_FDDRC_BAND_MARGIN_2 +249 0x0080 //RX_FDDRC_BAND_MARGIN_3 +250 0x0007 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x5000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x6400 //RX_FDDRC_THRD_3_2 +258 0x6400 //RX_FDDRC_THRD_3_3 +259 0x2000 //RX_FDDRC_SLANT_0_0 +260 0x2000 //RX_FDDRC_SLANT_0_1 +261 0x2000 //RX_FDDRC_SLANT_0_2 +262 0x2000 //RX_FDDRC_SLANT_0_3 +263 0x5333 //RX_FDDRC_SLANT_1_0 +264 0x5333 //RX_FDDRC_SLANT_1_1 +265 0x5333 //RX_FDDRC_SLANT_1_2 +266 0x5333 //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +286 0x0100 //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 #CASE_NAME HEADSET-USB_BLACKBIRD-VOICE_GENERIC-WB #PARAM_MODE FULL -#PARAM_TYPE TX+RX -#TOTAL_CUSTOM_STEP 7 +#PARAM_TYPE TX+2RX +#TOTAL_CUSTOM_STEP 7+7 #TX 0 0x0009 //TX_OPERATION_MODE_0 1 0x0009 //TX_OPERATION_MODE_1 @@ -2004,7 +2920,7 @@ 239 0x0800 //TX_DT_RESRV_7 240 0x0800 //TX_DT_RESRV_8 241 0x0000 //TX_DT_RESRV_9 -242 0xF400 //TX_THR_SN_EST_0 +242 0xFA00 //TX_THR_SN_EST_0 243 0xFA00 //TX_THR_SN_EST_1 244 0xF700 //TX_THR_SN_EST_2 245 0xFC00 //TX_THR_SN_EST_3 @@ -2013,20 +2929,20 @@ 248 0xF400 //TX_THR_SN_EST_6 249 0xF600 //TX_THR_SN_EST_7 250 0x0000 //TX_DELTA_THR_SN_EST_0 -251 0x0100 //TX_DELTA_THR_SN_EST_1 +251 0x0200 //TX_DELTA_THR_SN_EST_1 252 0x0200 //TX_DELTA_THR_SN_EST_2 -253 0x0200 //TX_DELTA_THR_SN_EST_3 -254 0x0100 //TX_DELTA_THR_SN_EST_4 +253 0x0100 //TX_DELTA_THR_SN_EST_3 +254 0x0200 //TX_DELTA_THR_SN_EST_4 255 0x0200 //TX_DELTA_THR_SN_EST_5 -256 0x0200 //TX_DELTA_THR_SN_EST_6 +256 0x0100 //TX_DELTA_THR_SN_EST_6 257 0x0200 //TX_DELTA_THR_SN_EST_7 258 0x6000 //TX_LAMBDA_NN_EST_0 -259 0x6000 //TX_LAMBDA_NN_EST_1 +259 0x4000 //TX_LAMBDA_NN_EST_1 260 0x4000 //TX_LAMBDA_NN_EST_2 261 0x4000 //TX_LAMBDA_NN_EST_3 262 0x4000 //TX_LAMBDA_NN_EST_4 263 0x4000 //TX_LAMBDA_NN_EST_5 -264 0x4000 //TX_LAMBDA_NN_EST_6 +264 0x6000 //TX_LAMBDA_NN_EST_6 265 0x4000 //TX_LAMBDA_NN_EST_7 266 0x0400 //TX_N_SN_EST 267 0x001E //TX_INBEAM_T @@ -2044,18 +2960,18 @@ 279 0x1000 //TX_B_POST_FLT_0 280 0x1000 //TX_B_POST_FLT_1 281 0x000F //TX_NS_LVL_CTRL_0 -282 0x0018 //TX_NS_LVL_CTRL_1 -283 0x0014 //TX_NS_LVL_CTRL_2 -284 0x001C //TX_NS_LVL_CTRL_3 -285 0x0012 //TX_NS_LVL_CTRL_4 +282 0x0014 //TX_NS_LVL_CTRL_1 +283 0x001C //TX_NS_LVL_CTRL_2 +284 0x0012 //TX_NS_LVL_CTRL_3 +285 0x000F //TX_NS_LVL_CTRL_4 286 0x000F //TX_NS_LVL_CTRL_5 -287 0x000F //TX_NS_LVL_CTRL_6 +287 0x0018 //TX_NS_LVL_CTRL_6 288 0x0011 //TX_NS_LVL_CTRL_7 289 0x000C //TX_MIN_GAIN_S_0 -290 0x000C //TX_MIN_GAIN_S_1 -291 0x000F //TX_MIN_GAIN_S_2 -292 0x000C //TX_MIN_GAIN_S_3 -293 0x0009 //TX_MIN_GAIN_S_4 +290 0x000F //TX_MIN_GAIN_S_1 +291 0x000C //TX_MIN_GAIN_S_2 +292 0x0009 //TX_MIN_GAIN_S_3 +293 0x000C //TX_MIN_GAIN_S_4 294 0x000C //TX_MIN_GAIN_S_5 295 0x000C //TX_MIN_GAIN_S_6 296 0x000F //TX_MIN_GAIN_S_7 @@ -2063,10 +2979,10 @@ 298 0x0000 //TX_NS_MAX_PRI_SNR_TH 299 0x0000 //TX_NMOS_SUP_MENSA 300 0x7FFF //TX_SNRI_SUP_0 -301 0x7FFF //TX_SNRI_SUP_1 -302 0x6000 //TX_SNRI_SUP_2 -303 0x2000 //TX_SNRI_SUP_3 -304 0x6000 //TX_SNRI_SUP_4 +301 0x6000 //TX_SNRI_SUP_1 +302 0x2000 //TX_SNRI_SUP_2 +303 0x6000 //TX_SNRI_SUP_3 +304 0x7FFF //TX_SNRI_SUP_4 305 0x7FFF //TX_SNRI_SUP_5 306 0x7FFF //TX_SNRI_SUP_6 307 0x7FFF //TX_SNRI_SUP_7 @@ -2077,17 +2993,17 @@ 312 0x7FFF //TX_A_POST_FILT_0 313 0x2000 //TX_A_POST_FILT_1 314 0x4000 //TX_A_POST_FILT_S_0 -315 0x4000 //TX_A_POST_FILT_S_1 +315 0x5000 //TX_A_POST_FILT_S_1 316 0x5000 //TX_A_POST_FILT_S_2 317 0x5000 //TX_A_POST_FILT_S_3 318 0x5000 //TX_A_POST_FILT_S_4 319 0x5000 //TX_A_POST_FILT_S_5 -320 0x5000 //TX_A_POST_FILT_S_6 +320 0x4000 //TX_A_POST_FILT_S_6 321 0x5000 //TX_A_POST_FILT_S_7 322 0x1000 //TX_B_POST_FILT_0 323 0x1000 //TX_B_POST_FILT_1 -324 0x1000 //TX_B_POST_FILT_2 -325 0x3000 //TX_B_POST_FILT_3 +324 0x3000 //TX_B_POST_FILT_2 +325 0x1000 //TX_B_POST_FILT_3 326 0x1000 //TX_B_POST_FILT_4 327 0x1000 //TX_B_POST_FILT_5 328 0x1000 //TX_B_POST_FILT_6 @@ -2102,12 +3018,12 @@ 337 0x7FFF //TX_B_LESSCUT_RTO_S_7 338 0x7CCD //TX_LAMBDA_PFILT 339 0x7B00 //TX_LAMBDA_PFILT_S_0 -340 0x7F00 //TX_LAMBDA_PFILT_S_1 +340 0x7B00 //TX_LAMBDA_PFILT_S_1 341 0x7B00 //TX_LAMBDA_PFILT_S_2 342 0x7B00 //TX_LAMBDA_PFILT_S_3 343 0x7B00 //TX_LAMBDA_PFILT_S_4 344 0x7B00 //TX_LAMBDA_PFILT_S_5 -345 0x7B00 //TX_LAMBDA_PFILT_S_6 +345 0x7F00 //TX_LAMBDA_PFILT_S_6 346 0x7B00 //TX_LAMBDA_PFILT_S_7 347 0x0200 //TX_K_PEPPER 348 0x0400 //TX_A_PEPPER @@ -2129,7 +3045,7 @@ 364 0x0000 //TX_K_APT 365 0x0001 //TX_NOISEDET 366 0x0190 //TX_NDETCT -367 0x0065 //TX_NOISE_TH_0 +367 0x0102 //TX_NOISE_TH_0 368 0x7FFF //TX_NOISE_TH_0_2 369 0x7FFF //TX_NOISE_TH_0_3 370 0x0900 //TX_NOISE_TH_1 @@ -2141,11 +3057,11 @@ 376 0x7FFF //TX_NOISE_TH_5_3 377 0x7FFF //TX_NOISE_TH_5_4 378 0x00FB //TX_NOISE_TH_6 -379 0x0029 //TX_MINENOISE_TH -380 0x4000 //TX_MINENOISE_MIC0_TH_MTS -381 0xFFEE //TX_MINENOISE_MIC0_TH_EXP -382 0x6000 //TX_MINENOISE_MIC0_S_TH_MTS -383 0xFFF3 //TX_MINENOISE_MIC0_S_TH_EXP +379 0x00F8 //TX_MINENOISE_TH +380 0xD508 //TX_MORENS_TFMASK_TH +381 0x0001 //TX_DRC_QUIET_FLOOR +382 0x3A98 //TX_RATIODTL_CUT_TH +383 0x0DAC //TX_DT_CUT_K1 384 0x0666 //TX_OUT_ENER_S_TH_CLEAN 385 0x0666 //TX_OUT_ENER_S_TH_LESSCLEAN 386 0x0333 //TX_OUT_ENER_S_TH_NOISY @@ -2153,22 +3069,22 @@ 388 0x0333 //TX_OUT_ENER_TH_SPEECH 389 0x2000 //TX_SN_NPB_GAIN 390 0x0000 //TX_NN_NPB_GAIN -391 0x0000 //TX_CSX_ALPHA_0 -392 0x0000 //TX_CSX_ALPHA_1 -393 0x0000 //TX_CSX_ALPHA_2 -394 0x0000 //TX_CSX_ALPHA_3 -395 0x0800 //TX_MU_ARSP_EST -396 0x00C8 //TX_P_OUTBEAM_MIN_TH +391 0x7FFF //TX_POST_MASK_SUP_HSNE +392 0x1388 //TX_TAIL_DET_TH +393 0x4000 //TX_B_LESSCUT_RTO_WTA +394 0x0000 //TX_MEL_G_R +395 0x0080 //TX_SUPHIGH_TH +396 0x0000 //TX_MASK_G_R 397 0x0002 //TX_EXTRA_NS_L -398 0x0800 //TX_EXTRA_NS_A -399 0x0005 //TX_VR_NOISE_FLOOR_TH +398 0x1800 //TX_C_POST_FLT_MASK +399 0x7FFF //TX_A_POST_FLT_WNS 400 0x0148 //TX_MIN_G_LOW300HZ 401 0x0002 //TX_MAXLEVEL_CNG 402 0x00B4 //TX_STN_NOISE_TH 403 0x4000 //TX_POST_MASK_SUP 404 0x7FFF //TX_POST_MASK_ADJUST 405 0x00C8 //TX_NS_ENOISE_MIC0_TH -406 0x0029 //TX_MINENOISE_MIC0_TH +406 0x00DC //TX_MINENOISE_MIC0_TH 407 0x012C //TX_MINENOISE_MIC0_S_TH 408 0x7FFF //TX_MIN_G_CTRL_SSNS 409 0x0800 //TX_METAL_RTO_THR @@ -2276,16 +3192,16 @@ 511 0x6666 //TX_MIC_TO_BFGAIN 512 0x0000 //TX_MICTOBFGAIN0 513 0x0000 //TX_FASTMUE_TH -514 0x0000 //TX_DERVB_LEN_0 -515 0x0000 //TX_DERVB_LEN_1 -516 0x0000 //TX_RHO_DERVB -517 0x0000 //TX_MIC_INDX_DERVB -518 0x0000 //TX_MU_DERVB -519 0x0000 //TX_DR_RESRV_0 -520 0x0000 //TX_DR_RESRV_1 -521 0x0000 //TX_DR_RESRV_2 -522 0x0000 //TX_DR_RESRV_3 -523 0x0000 //TX_DR_RESRV_4 +514 0xC000 //TX_DEREVERB_LF_MU +515 0xC000 //TX_DEREVERB_HF_MU +516 0xCCCC //TX_DEREVERB_DELAY +517 0xD999 //TX_DEREVERB_COEF_LEN +518 0x1F40 //TX_DEREVERB_DNR +519 0x0000 //TX_DEREVERB_ALPHA +520 0x0000 //TX_DEREVERB_BETA +521 0x0000 //TX_GSC_RTOL_TH +522 0x7000 //TX_GSC_RTOH_TH +523 0x0064 //TX_WIDE2_MEANHTH 524 0x0000 //TX_DR_RESRV_5 525 0x0000 //TX_DR_RESRV_6 526 0x0000 //TX_DR_RESRV_7 @@ -2659,8 +3575,73 @@ 894 0xC000 //TX_FASTNS_SSA_THHFL 895 0xCCCC //TX_FASTNS_SSA_THLFH 896 0xD999 //TX_FASTNS_SSA_THHFH +897 0x2339 //TX_SENDFUNC_REG_MICMUTE +898 0x0021 //TX_SENDFUNC_REG_MICMUTE1 +899 0x02BC //TX_MICMUTE_RATIO_THR +900 0x0140 //TX_MICMUTE_AMP_THR +901 0x0004 //TX_MICMUTE_HPF_IND +902 0x00C0 //TX_MICMUTE_LOG_EYR_TH +903 0x0008 //TX_MICMUTE_CVG_TIME +904 0x0008 //TX_MICMUTE_RELEASE_TIME +905 0x01FE //TX_MIC_VOLUME_MIC0MUTE +906 0x0020 //TX_MICMUTE_EPD_OFFSET_0 +907 0x001E //TX_MICMUTE_FRQ_AEC_L +908 0x7999 //TX_MICMUTE_EAD_THR +909 0x7FFF //TX_MICMUTE_LAMBDA_CB_NLE +910 0x7FFF //TX_MICMUTE_LAMBDA_RE_EST +911 0x4000 //TX_DTD_THR1_MICMUTE_0 +912 0x7000 //TX_DTD_THR1_MICMUTE_1 +913 0x7FFF //TX_DTD_THR1_MICMUTE_2 +914 0x7FFF //TX_DTD_THR1_MICMUTE_3 +915 0x6CCC //TX_DTD_THR2_MICMUTE_0 +916 0x0400 //TX_MICMUTE_MIN_EQ_RE_EST_0 +917 0x0400 //TX_MICMUTE_MIN_EQ_RE_EST_1 +918 0x1000 //TX_MICMUTE_MIN_EQ_RE_EST_2 +919 0x7FFF //TX_MICMUTE_MIN_EQ_RE_EST_3 +920 0x7FFF //TX_MICMUTE_MIN_EQ_RE_EST_4 +921 0x4000 //TX_MICMUTE_C_POST_FLT +922 0x03E8 //TX_MICMUTE_DT_CUT_K +923 0x0001 //TX_MICMUTE_DT_CUT_THR +924 0x03E8 //TX_MICMUTE_DT_CUT_K2 +925 0x0001 //TX_MICMUTE_DT_CUT_THR2 +926 0x0064 //TX_MICMUTE_DT2_HOLD_N +927 0x1000 //TX_MICMUTE_RATIODTH_THCUT +928 0x1000 //TX_MICMUTE_B_POST_FLT_ECHOL +929 0x7FFF //TX_MICMUTE_B_POST_FLT_ECHOH +930 0x0400 //TX_MICMUTE_C_POST_FLT_MASK +931 0x7999 //TX_MICMUTE_RATIODTL_CUT_TH +932 0x0258 //TX_MICMUTE_DT_CUT_K1 +933 0x0800 //TX_MICMUTE_N2_SN_EST +934 0xFC00 //TX_MICMUTE_THR_SN_EST_0 +935 0x001C //TX_MICMUTE_MIN_G_CTRL_0 +936 0x6000 //TX_MICMUTE_A_POST_FILT_S_0 +937 0x7000 //TX_MICMUTE_B_POST_FILT_0 +938 0x2710 //TX_MIC1RUB_AMP_THR +939 0x0010 //TX_MIC1MUTE_RATIO_THR +940 0x0450 //TX_MIC1MUTE_AMP_THR +941 0x0008 //TX_MIC1MUTE_CVG_TIME +942 0x0008 //TX_MIC1MUTE_RELEASE_TIME +943 0x0000 //TX_AMS_RESRV_01 +944 0x0000 //TX_AMS_RESRV_02 +945 0x0000 //TX_AMS_RESRV_03 +946 0x0000 //TX_AMS_RESRV_04 +947 0x0000 //TX_AMS_RESRV_05 +948 0x0000 //TX_AMS_RESRV_06 +949 0x0000 //TX_AMS_RESRV_07 +950 0x0000 //TX_AMS_RESRV_08 +951 0x0000 //TX_AMS_RESRV_09 +952 0x0000 //TX_AMS_RESRV_10 +953 0x0000 //TX_AMS_RESRV_11 +954 0x0000 //TX_AMS_RESRV_12 +955 0x0000 //TX_AMS_RESRV_13 +956 0x0000 //TX_AMS_RESRV_14 +957 0x0000 //TX_AMS_RESRV_15 +958 0x0000 //TX_AMS_RESRV_16 +959 0x0000 //TX_AMS_RESRV_17 +960 0x0000 //TX_AMS_RESRV_18 +961 0x0000 //TX_AMS_RESRV_19 #RX -0 0x042C //RX_RECVFUNC_MODE_0 +0 0x242C //RX_RECVFUNC_MODE_0 1 0x0000 //RX_RECVFUNC_MODE_1 2 0x0001 //RX_SAMPLINGFREQ_SIG 3 0x0001 //RX_SAMPLINGFREQ_PROC @@ -3510,11 +4491,862 @@ 110 0x0000 //RX_FDDRC_RESRV_0 129 0x0100 //RX_SPK_VOL 130 0x0000 //RX_VOL_RESRV_0 +#RX 2 +157 0x242C //RX_RECVFUNC_MODE_0 +158 0x0000 //RX_RECVFUNC_MODE_1 +159 0x0001 //RX_SAMPLINGFREQ_SIG +160 0x0001 //RX_SAMPLINGFREQ_PROC +161 0x000A //RX_FRAME_SZ +162 0x0000 //RX_DELAY_OPT +163 0x1000 //RX_TDDRC_ALPHA_UP_1 +164 0x1000 //RX_TDDRC_ALPHA_UP_2 +165 0x1000 //RX_TDDRC_ALPHA_UP_3 +166 0x1000 //RX_TDDRC_ALPHA_UP_4 +167 0x0800 //RX_PGA +168 0x7FFF //RX_A_HP +169 0x4000 //RX_B_PE +170 0x3800 //RX_THR_PITCH_DET_0 +171 0x3000 //RX_THR_PITCH_DET_1 +172 0x2800 //RX_THR_PITCH_DET_2 +173 0x0008 //RX_PITCH_BFR_LEN +174 0x0003 //RX_SBD_PITCH_DET +175 0x0100 //RX_PP_RESRV_0 +176 0x0020 //RX_PP_RESRV_1 +177 0x0600 //RX_N_SN_EST +178 0x000C //RX_N2_SN_EST +179 0x0010 //RX_NS_LVL_CTRL +180 0xF800 //RX_THR_SN_EST +181 0x7CCD //RX_LAMBDA_PFILT +182 0x000A //RX_FENS_RESRV_0 +183 0x0190 //RX_FENS_RESRV_1 +184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +187 0x0002 //RX_EXTRA_NS_L +188 0x0800 //RX_EXTRA_NS_A +189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +190 0x7FFF //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +192 0x199A //RX_A_POST_FLT +193 0x0000 //RX_LMT_THRD +194 0x4000 //RX_LMT_ALPHA +195 0x001C //RX_FDEQ_SUBNUM +196 0x4848 //RX_FDEQ_GAIN_0 +197 0x4848 //RX_FDEQ_GAIN_1 +198 0x4848 //RX_FDEQ_GAIN_2 +199 0x4848 //RX_FDEQ_GAIN_3 +200 0x4848 //RX_FDEQ_GAIN_4 +201 0x4848 //RX_FDEQ_GAIN_5 +202 0x484B //RX_FDEQ_GAIN_6 +203 0x4B48 //RX_FDEQ_GAIN_7 +204 0x4848 //RX_FDEQ_GAIN_8 +205 0x4848 //RX_FDEQ_GAIN_9 +206 0x4846 //RX_FDEQ_GAIN_10 +207 0x403F //RX_FDEQ_GAIN_11 +208 0x3F40 //RX_FDEQ_GAIN_12 +209 0x4248 //RX_FDEQ_GAIN_13 +210 0x4848 //RX_FDEQ_GAIN_14 +211 0x4848 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0202 //RX_FDEQ_BIN_0 +221 0x0203 //RX_FDEQ_BIN_1 +222 0x0303 //RX_FDEQ_BIN_2 +223 0x0304 //RX_FDEQ_BIN_3 +224 0x0405 //RX_FDEQ_BIN_4 +225 0x0506 //RX_FDEQ_BIN_5 +226 0x0708 //RX_FDEQ_BIN_6 +227 0x090A //RX_FDEQ_BIN_7 +228 0x0B0C //RX_FDEQ_BIN_8 +229 0x0D0E //RX_FDEQ_BIN_9 +230 0x0E0F //RX_FDEQ_BIN_10 +231 0x0F10 //RX_FDEQ_BIN_11 +232 0x1011 //RX_FDEQ_BIN_12 +233 0x1104 //RX_FDEQ_BIN_13 +234 0x0000 //RX_FDEQ_BIN_14 +235 0x0000 //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x4000 //RX_FDEQ_RESRV_0 +245 0x0320 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0030 //RX_FDDRC_BAND_MARGIN_1 +248 0x0050 //RX_FDDRC_BAND_MARGIN_2 +249 0x0080 //RX_FDDRC_BAND_MARGIN_3 +250 0x0007 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x5000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x6400 //RX_FDDRC_THRD_3_2 +258 0x6400 //RX_FDDRC_THRD_3_3 +259 0x2000 //RX_FDDRC_SLANT_0_0 +260 0x2000 //RX_FDDRC_SLANT_0_1 +261 0x2000 //RX_FDDRC_SLANT_0_2 +262 0x2000 //RX_FDDRC_SLANT_0_3 +263 0x5333 //RX_FDDRC_SLANT_1_0 +264 0x5333 //RX_FDDRC_SLANT_1_1 +265 0x5333 //RX_FDDRC_SLANT_1_2 +266 0x5333 //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +268 0x0002 //RX_FILTINDX +269 0x0000 //RX_TDDRC_THRD_0 +270 0x0000 //RX_TDDRC_THRD_1 +271 0x1C00 //RX_TDDRC_THRD_2 +272 0x1D00 //RX_TDDRC_THRD_3 +273 0x3000 //RX_TDDRC_SLANT_0 +274 0x7FFF //RX_TDDRC_SLANT_1 +275 0x1000 //RX_TDDRC_ALPHA_UP_0 +276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x199A //RX_TDDRC_HMNC_GAIN +279 0x0001 //RX_TDDRC_SMT_FLAG +280 0x0CCD //RX_TDDRC_SMT_W +281 0x01AE //RX_TDDRC_DRC_GAIN +282 0x7C00 //RX_LAMBDA_PKA_FP +283 0x280A //RX_TPKA_FP +284 0x032D //RX_MIN_G_FP +285 0x0A00 //RX_MAX_G_FP +286 0x000B //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 +288 0x0000 //RX_MAXLEVEL_CNG +289 0x3000 //RX_BWE_UV_TH +290 0x3000 //RX_BWE_UV_TH2 +291 0x1800 //RX_BWE_UV_TH3 +292 0x1000 //RX_BWE_V_TH +293 0x04CD //RX_BWE_GAIN1_V_TH1 +294 0x0F33 //RX_BWE_GAIN1_V_TH2 +295 0x7333 //RX_BWE_UV_EQ +296 0x199A //RX_BWE_V_EQ +297 0x7333 //RX_BWE_TONE_TH +298 0x0004 //RX_BWE_UV_HOLD_T +299 0x6CCD //RX_BWE_GAIN2_ALPHA +300 0x799A //RX_BWE_GAIN3_ALPHA +301 0x001E //RX_BWE_CUTOFF +302 0x3000 //RX_BWE_GAINFILL +303 0x3200 //RX_BWE_MAXTH_TONE +304 0x2000 //RX_BWE_EQ_0 +305 0x2000 //RX_BWE_EQ_1 +306 0x2000 //RX_BWE_EQ_2 +307 0x2000 //RX_BWE_EQ_3 +308 0x2000 //RX_BWE_EQ_4 +309 0x2000 //RX_BWE_EQ_5 +310 0x2000 //RX_BWE_EQ_6 +311 0x0000 //RX_BWE_RESRV_0 +312 0x0000 //RX_BWE_RESRV_1 +313 0x0000 //RX_BWE_RESRV_2 +#VOL 0 +163 0x1000 //RX_TDDRC_ALPHA_UP_1 +164 0x1000 //RX_TDDRC_ALPHA_UP_2 +165 0x1000 //RX_TDDRC_ALPHA_UP_3 +166 0x1000 //RX_TDDRC_ALPHA_UP_4 +184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +190 0x7220 //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +269 0x0000 //RX_TDDRC_THRD_0 +270 0x0000 //RX_TDDRC_THRD_1 +271 0x1800 //RX_TDDRC_THRD_2 +272 0x1800 //RX_TDDRC_THRD_3 +273 0x7FFF //RX_TDDRC_SLANT_0 +274 0x7FFF //RX_TDDRC_SLANT_1 +275 0x1000 //RX_TDDRC_ALPHA_UP_0 +276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x199A //RX_TDDRC_HMNC_GAIN +279 0x0001 //RX_TDDRC_SMT_FLAG +280 0x0CCD //RX_TDDRC_SMT_W +281 0x01A0 //RX_TDDRC_DRC_GAIN +195 0x001C //RX_FDEQ_SUBNUM +196 0x4848 //RX_FDEQ_GAIN_0 +197 0x4848 //RX_FDEQ_GAIN_1 +198 0x4848 //RX_FDEQ_GAIN_2 +199 0x4848 //RX_FDEQ_GAIN_3 +200 0x4848 //RX_FDEQ_GAIN_4 +201 0x4848 //RX_FDEQ_GAIN_5 +202 0x484B //RX_FDEQ_GAIN_6 +203 0x4B48 //RX_FDEQ_GAIN_7 +204 0x4848 //RX_FDEQ_GAIN_8 +205 0x4848 //RX_FDEQ_GAIN_9 +206 0x4846 //RX_FDEQ_GAIN_10 +207 0x403F //RX_FDEQ_GAIN_11 +208 0x3F40 //RX_FDEQ_GAIN_12 +209 0x4248 //RX_FDEQ_GAIN_13 +210 0x4848 //RX_FDEQ_GAIN_14 +211 0x4848 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0202 //RX_FDEQ_BIN_0 +221 0x0203 //RX_FDEQ_BIN_1 +222 0x0303 //RX_FDEQ_BIN_2 +223 0x0304 //RX_FDEQ_BIN_3 +224 0x0405 //RX_FDEQ_BIN_4 +225 0x0506 //RX_FDEQ_BIN_5 +226 0x0708 //RX_FDEQ_BIN_6 +227 0x090A //RX_FDEQ_BIN_7 +228 0x0B0C //RX_FDEQ_BIN_8 +229 0x0D0E //RX_FDEQ_BIN_9 +230 0x0E0F //RX_FDEQ_BIN_10 +231 0x0F10 //RX_FDEQ_BIN_11 +232 0x1011 //RX_FDEQ_BIN_12 +233 0x1104 //RX_FDEQ_BIN_13 +234 0x0000 //RX_FDEQ_BIN_14 +235 0x0000 //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x4000 //RX_FDEQ_RESRV_0 +245 0x0320 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0030 //RX_FDDRC_BAND_MARGIN_1 +248 0x0050 //RX_FDDRC_BAND_MARGIN_2 +249 0x0080 //RX_FDDRC_BAND_MARGIN_3 +250 0x0007 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x5000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x6400 //RX_FDDRC_THRD_3_2 +258 0x6400 //RX_FDDRC_THRD_3_3 +259 0x2000 //RX_FDDRC_SLANT_0_0 +260 0x2000 //RX_FDDRC_SLANT_0_1 +261 0x2000 //RX_FDDRC_SLANT_0_2 +262 0x2000 //RX_FDDRC_SLANT_0_3 +263 0x5333 //RX_FDDRC_SLANT_1_0 +264 0x5333 //RX_FDDRC_SLANT_1_1 +265 0x5333 //RX_FDDRC_SLANT_1_2 +266 0x5333 //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +286 0x000A //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 +#VOL 1 +163 0x1000 //RX_TDDRC_ALPHA_UP_1 +164 0x1000 //RX_TDDRC_ALPHA_UP_2 +165 0x1000 //RX_TDDRC_ALPHA_UP_3 +166 0x1000 //RX_TDDRC_ALPHA_UP_4 +184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +190 0x7220 //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +269 0x0000 //RX_TDDRC_THRD_0 +270 0x0000 //RX_TDDRC_THRD_1 +271 0x1800 //RX_TDDRC_THRD_2 +272 0x1800 //RX_TDDRC_THRD_3 +273 0x7FFF //RX_TDDRC_SLANT_0 +274 0x7FFF //RX_TDDRC_SLANT_1 +275 0x1000 //RX_TDDRC_ALPHA_UP_0 +276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x199A //RX_TDDRC_HMNC_GAIN +279 0x0001 //RX_TDDRC_SMT_FLAG +280 0x0CCD //RX_TDDRC_SMT_W +281 0x01A0 //RX_TDDRC_DRC_GAIN +195 0x001C //RX_FDEQ_SUBNUM +196 0x4848 //RX_FDEQ_GAIN_0 +197 0x4848 //RX_FDEQ_GAIN_1 +198 0x4848 //RX_FDEQ_GAIN_2 +199 0x4848 //RX_FDEQ_GAIN_3 +200 0x4848 //RX_FDEQ_GAIN_4 +201 0x4848 //RX_FDEQ_GAIN_5 +202 0x484B //RX_FDEQ_GAIN_6 +203 0x4B48 //RX_FDEQ_GAIN_7 +204 0x4848 //RX_FDEQ_GAIN_8 +205 0x4848 //RX_FDEQ_GAIN_9 +206 0x4846 //RX_FDEQ_GAIN_10 +207 0x403F //RX_FDEQ_GAIN_11 +208 0x3F40 //RX_FDEQ_GAIN_12 +209 0x4248 //RX_FDEQ_GAIN_13 +210 0x4848 //RX_FDEQ_GAIN_14 +211 0x4848 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0202 //RX_FDEQ_BIN_0 +221 0x0203 //RX_FDEQ_BIN_1 +222 0x0303 //RX_FDEQ_BIN_2 +223 0x0304 //RX_FDEQ_BIN_3 +224 0x0405 //RX_FDEQ_BIN_4 +225 0x0506 //RX_FDEQ_BIN_5 +226 0x0708 //RX_FDEQ_BIN_6 +227 0x090A //RX_FDEQ_BIN_7 +228 0x0B0C //RX_FDEQ_BIN_8 +229 0x0D0E //RX_FDEQ_BIN_9 +230 0x0E0F //RX_FDEQ_BIN_10 +231 0x0F10 //RX_FDEQ_BIN_11 +232 0x1011 //RX_FDEQ_BIN_12 +233 0x1104 //RX_FDEQ_BIN_13 +234 0x0000 //RX_FDEQ_BIN_14 +235 0x0000 //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x4000 //RX_FDEQ_RESRV_0 +245 0x0320 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0030 //RX_FDDRC_BAND_MARGIN_1 +248 0x0050 //RX_FDDRC_BAND_MARGIN_2 +249 0x0080 //RX_FDDRC_BAND_MARGIN_3 +250 0x0007 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x5000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x6400 //RX_FDDRC_THRD_3_2 +258 0x6400 //RX_FDDRC_THRD_3_3 +259 0x2000 //RX_FDDRC_SLANT_0_0 +260 0x2000 //RX_FDDRC_SLANT_0_1 +261 0x2000 //RX_FDDRC_SLANT_0_2 +262 0x2000 //RX_FDDRC_SLANT_0_3 +263 0x5333 //RX_FDDRC_SLANT_1_0 +264 0x5333 //RX_FDDRC_SLANT_1_1 +265 0x5333 //RX_FDDRC_SLANT_1_2 +266 0x5333 //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +286 0x0011 //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 +#VOL 2 +163 0x1000 //RX_TDDRC_ALPHA_UP_1 +164 0x1000 //RX_TDDRC_ALPHA_UP_2 +165 0x1000 //RX_TDDRC_ALPHA_UP_3 +166 0x1000 //RX_TDDRC_ALPHA_UP_4 +184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +190 0x7220 //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +269 0x0000 //RX_TDDRC_THRD_0 +270 0x0000 //RX_TDDRC_THRD_1 +271 0x1800 //RX_TDDRC_THRD_2 +272 0x1800 //RX_TDDRC_THRD_3 +273 0x7FFF //RX_TDDRC_SLANT_0 +274 0x7FFF //RX_TDDRC_SLANT_1 +275 0x1000 //RX_TDDRC_ALPHA_UP_0 +276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x199A //RX_TDDRC_HMNC_GAIN +279 0x0001 //RX_TDDRC_SMT_FLAG +280 0x0CCD //RX_TDDRC_SMT_W +281 0x01A0 //RX_TDDRC_DRC_GAIN +195 0x001C //RX_FDEQ_SUBNUM +196 0x4848 //RX_FDEQ_GAIN_0 +197 0x4848 //RX_FDEQ_GAIN_1 +198 0x4848 //RX_FDEQ_GAIN_2 +199 0x4848 //RX_FDEQ_GAIN_3 +200 0x4848 //RX_FDEQ_GAIN_4 +201 0x4848 //RX_FDEQ_GAIN_5 +202 0x484B //RX_FDEQ_GAIN_6 +203 0x4B48 //RX_FDEQ_GAIN_7 +204 0x4848 //RX_FDEQ_GAIN_8 +205 0x4848 //RX_FDEQ_GAIN_9 +206 0x4846 //RX_FDEQ_GAIN_10 +207 0x403F //RX_FDEQ_GAIN_11 +208 0x3F40 //RX_FDEQ_GAIN_12 +209 0x4248 //RX_FDEQ_GAIN_13 +210 0x4848 //RX_FDEQ_GAIN_14 +211 0x4848 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0202 //RX_FDEQ_BIN_0 +221 0x0203 //RX_FDEQ_BIN_1 +222 0x0303 //RX_FDEQ_BIN_2 +223 0x0304 //RX_FDEQ_BIN_3 +224 0x0405 //RX_FDEQ_BIN_4 +225 0x0506 //RX_FDEQ_BIN_5 +226 0x0708 //RX_FDEQ_BIN_6 +227 0x090A //RX_FDEQ_BIN_7 +228 0x0B0C //RX_FDEQ_BIN_8 +229 0x0D0E //RX_FDEQ_BIN_9 +230 0x0E0F //RX_FDEQ_BIN_10 +231 0x0F10 //RX_FDEQ_BIN_11 +232 0x1011 //RX_FDEQ_BIN_12 +233 0x1104 //RX_FDEQ_BIN_13 +234 0x0000 //RX_FDEQ_BIN_14 +235 0x0000 //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x4000 //RX_FDEQ_RESRV_0 +245 0x0320 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0030 //RX_FDDRC_BAND_MARGIN_1 +248 0x0050 //RX_FDDRC_BAND_MARGIN_2 +249 0x0080 //RX_FDDRC_BAND_MARGIN_3 +250 0x0007 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x5000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x6400 //RX_FDDRC_THRD_3_2 +258 0x6400 //RX_FDDRC_THRD_3_3 +259 0x2000 //RX_FDDRC_SLANT_0_0 +260 0x2000 //RX_FDDRC_SLANT_0_1 +261 0x2000 //RX_FDDRC_SLANT_0_2 +262 0x2000 //RX_FDDRC_SLANT_0_3 +263 0x5333 //RX_FDDRC_SLANT_1_0 +264 0x5333 //RX_FDDRC_SLANT_1_1 +265 0x5333 //RX_FDDRC_SLANT_1_2 +266 0x5333 //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +286 0x001D //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 +#VOL 3 +163 0x1000 //RX_TDDRC_ALPHA_UP_1 +164 0x1000 //RX_TDDRC_ALPHA_UP_2 +165 0x1000 //RX_TDDRC_ALPHA_UP_3 +166 0x1000 //RX_TDDRC_ALPHA_UP_4 +184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +190 0x7220 //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +269 0x0000 //RX_TDDRC_THRD_0 +270 0x0000 //RX_TDDRC_THRD_1 +271 0x1800 //RX_TDDRC_THRD_2 +272 0x1800 //RX_TDDRC_THRD_3 +273 0x7FFF //RX_TDDRC_SLANT_0 +274 0x7FFF //RX_TDDRC_SLANT_1 +275 0x1000 //RX_TDDRC_ALPHA_UP_0 +276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x199A //RX_TDDRC_HMNC_GAIN +279 0x0001 //RX_TDDRC_SMT_FLAG +280 0x0CCD //RX_TDDRC_SMT_W +281 0x01A0 //RX_TDDRC_DRC_GAIN +195 0x001C //RX_FDEQ_SUBNUM +196 0x4848 //RX_FDEQ_GAIN_0 +197 0x4848 //RX_FDEQ_GAIN_1 +198 0x4848 //RX_FDEQ_GAIN_2 +199 0x4848 //RX_FDEQ_GAIN_3 +200 0x4848 //RX_FDEQ_GAIN_4 +201 0x4848 //RX_FDEQ_GAIN_5 +202 0x484B //RX_FDEQ_GAIN_6 +203 0x4B48 //RX_FDEQ_GAIN_7 +204 0x4848 //RX_FDEQ_GAIN_8 +205 0x4848 //RX_FDEQ_GAIN_9 +206 0x4846 //RX_FDEQ_GAIN_10 +207 0x403F //RX_FDEQ_GAIN_11 +208 0x3F40 //RX_FDEQ_GAIN_12 +209 0x4248 //RX_FDEQ_GAIN_13 +210 0x4848 //RX_FDEQ_GAIN_14 +211 0x4848 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0202 //RX_FDEQ_BIN_0 +221 0x0203 //RX_FDEQ_BIN_1 +222 0x0303 //RX_FDEQ_BIN_2 +223 0x0304 //RX_FDEQ_BIN_3 +224 0x0405 //RX_FDEQ_BIN_4 +225 0x0506 //RX_FDEQ_BIN_5 +226 0x0708 //RX_FDEQ_BIN_6 +227 0x090A //RX_FDEQ_BIN_7 +228 0x0B0C //RX_FDEQ_BIN_8 +229 0x0D0E //RX_FDEQ_BIN_9 +230 0x0E0F //RX_FDEQ_BIN_10 +231 0x0F10 //RX_FDEQ_BIN_11 +232 0x1011 //RX_FDEQ_BIN_12 +233 0x1104 //RX_FDEQ_BIN_13 +234 0x0000 //RX_FDEQ_BIN_14 +235 0x0000 //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x4000 //RX_FDEQ_RESRV_0 +245 0x0320 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0030 //RX_FDDRC_BAND_MARGIN_1 +248 0x0050 //RX_FDDRC_BAND_MARGIN_2 +249 0x0080 //RX_FDDRC_BAND_MARGIN_3 +250 0x0007 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x5000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x6400 //RX_FDDRC_THRD_3_2 +258 0x6400 //RX_FDDRC_THRD_3_3 +259 0x2000 //RX_FDDRC_SLANT_0_0 +260 0x2000 //RX_FDDRC_SLANT_0_1 +261 0x2000 //RX_FDDRC_SLANT_0_2 +262 0x2000 //RX_FDDRC_SLANT_0_3 +263 0x5333 //RX_FDDRC_SLANT_1_0 +264 0x5333 //RX_FDDRC_SLANT_1_1 +265 0x5333 //RX_FDDRC_SLANT_1_2 +266 0x5333 //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +286 0x0030 //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 +#VOL 4 +163 0x1000 //RX_TDDRC_ALPHA_UP_1 +164 0x1000 //RX_TDDRC_ALPHA_UP_2 +165 0x1000 //RX_TDDRC_ALPHA_UP_3 +166 0x1000 //RX_TDDRC_ALPHA_UP_4 +184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +190 0x7220 //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +269 0x0000 //RX_TDDRC_THRD_0 +270 0x0000 //RX_TDDRC_THRD_1 +271 0x1800 //RX_TDDRC_THRD_2 +272 0x1800 //RX_TDDRC_THRD_3 +273 0x7FFF //RX_TDDRC_SLANT_0 +274 0x7FFF //RX_TDDRC_SLANT_1 +275 0x1000 //RX_TDDRC_ALPHA_UP_0 +276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x199A //RX_TDDRC_HMNC_GAIN +279 0x0001 //RX_TDDRC_SMT_FLAG +280 0x0CCD //RX_TDDRC_SMT_W +281 0x01A0 //RX_TDDRC_DRC_GAIN +195 0x001C //RX_FDEQ_SUBNUM +196 0x4848 //RX_FDEQ_GAIN_0 +197 0x4848 //RX_FDEQ_GAIN_1 +198 0x4848 //RX_FDEQ_GAIN_2 +199 0x4848 //RX_FDEQ_GAIN_3 +200 0x4848 //RX_FDEQ_GAIN_4 +201 0x4848 //RX_FDEQ_GAIN_5 +202 0x484B //RX_FDEQ_GAIN_6 +203 0x4B48 //RX_FDEQ_GAIN_7 +204 0x4848 //RX_FDEQ_GAIN_8 +205 0x4848 //RX_FDEQ_GAIN_9 +206 0x4846 //RX_FDEQ_GAIN_10 +207 0x403F //RX_FDEQ_GAIN_11 +208 0x3F40 //RX_FDEQ_GAIN_12 +209 0x4248 //RX_FDEQ_GAIN_13 +210 0x4848 //RX_FDEQ_GAIN_14 +211 0x4848 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0202 //RX_FDEQ_BIN_0 +221 0x0203 //RX_FDEQ_BIN_1 +222 0x0303 //RX_FDEQ_BIN_2 +223 0x0304 //RX_FDEQ_BIN_3 +224 0x0405 //RX_FDEQ_BIN_4 +225 0x0506 //RX_FDEQ_BIN_5 +226 0x0708 //RX_FDEQ_BIN_6 +227 0x090A //RX_FDEQ_BIN_7 +228 0x0B0C //RX_FDEQ_BIN_8 +229 0x0D0E //RX_FDEQ_BIN_9 +230 0x0E0F //RX_FDEQ_BIN_10 +231 0x0F10 //RX_FDEQ_BIN_11 +232 0x1011 //RX_FDEQ_BIN_12 +233 0x1104 //RX_FDEQ_BIN_13 +234 0x0000 //RX_FDEQ_BIN_14 +235 0x0000 //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x4000 //RX_FDEQ_RESRV_0 +245 0x0320 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0030 //RX_FDDRC_BAND_MARGIN_1 +248 0x0050 //RX_FDDRC_BAND_MARGIN_2 +249 0x0080 //RX_FDDRC_BAND_MARGIN_3 +250 0x0007 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x5000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x6400 //RX_FDDRC_THRD_3_2 +258 0x6400 //RX_FDDRC_THRD_3_3 +259 0x2000 //RX_FDDRC_SLANT_0_0 +260 0x2000 //RX_FDDRC_SLANT_0_1 +261 0x2000 //RX_FDDRC_SLANT_0_2 +262 0x2000 //RX_FDDRC_SLANT_0_3 +263 0x5333 //RX_FDDRC_SLANT_1_0 +264 0x5333 //RX_FDDRC_SLANT_1_1 +265 0x5333 //RX_FDDRC_SLANT_1_2 +266 0x5333 //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +286 0x0050 //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 +#VOL 5 +163 0x1000 //RX_TDDRC_ALPHA_UP_1 +164 0x1000 //RX_TDDRC_ALPHA_UP_2 +165 0x1000 //RX_TDDRC_ALPHA_UP_3 +166 0x1000 //RX_TDDRC_ALPHA_UP_4 +184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +190 0x7220 //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +269 0x0000 //RX_TDDRC_THRD_0 +270 0x0000 //RX_TDDRC_THRD_1 +271 0x1800 //RX_TDDRC_THRD_2 +272 0x1800 //RX_TDDRC_THRD_3 +273 0x7FFF //RX_TDDRC_SLANT_0 +274 0x7FFF //RX_TDDRC_SLANT_1 +275 0x1000 //RX_TDDRC_ALPHA_UP_0 +276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x199A //RX_TDDRC_HMNC_GAIN +279 0x0001 //RX_TDDRC_SMT_FLAG +280 0x0CCD //RX_TDDRC_SMT_W +281 0x01A0 //RX_TDDRC_DRC_GAIN +195 0x001C //RX_FDEQ_SUBNUM +196 0x4848 //RX_FDEQ_GAIN_0 +197 0x4848 //RX_FDEQ_GAIN_1 +198 0x4848 //RX_FDEQ_GAIN_2 +199 0x4848 //RX_FDEQ_GAIN_3 +200 0x4848 //RX_FDEQ_GAIN_4 +201 0x4848 //RX_FDEQ_GAIN_5 +202 0x484B //RX_FDEQ_GAIN_6 +203 0x4B48 //RX_FDEQ_GAIN_7 +204 0x4848 //RX_FDEQ_GAIN_8 +205 0x4848 //RX_FDEQ_GAIN_9 +206 0x4846 //RX_FDEQ_GAIN_10 +207 0x403F //RX_FDEQ_GAIN_11 +208 0x3F40 //RX_FDEQ_GAIN_12 +209 0x4248 //RX_FDEQ_GAIN_13 +210 0x4848 //RX_FDEQ_GAIN_14 +211 0x4848 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0202 //RX_FDEQ_BIN_0 +221 0x0203 //RX_FDEQ_BIN_1 +222 0x0303 //RX_FDEQ_BIN_2 +223 0x0304 //RX_FDEQ_BIN_3 +224 0x0405 //RX_FDEQ_BIN_4 +225 0x0506 //RX_FDEQ_BIN_5 +226 0x0708 //RX_FDEQ_BIN_6 +227 0x090A //RX_FDEQ_BIN_7 +228 0x0B0C //RX_FDEQ_BIN_8 +229 0x0D0E //RX_FDEQ_BIN_9 +230 0x0E0F //RX_FDEQ_BIN_10 +231 0x0F10 //RX_FDEQ_BIN_11 +232 0x1011 //RX_FDEQ_BIN_12 +233 0x1104 //RX_FDEQ_BIN_13 +234 0x0000 //RX_FDEQ_BIN_14 +235 0x0000 //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x4000 //RX_FDEQ_RESRV_0 +245 0x0320 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0030 //RX_FDDRC_BAND_MARGIN_1 +248 0x0050 //RX_FDDRC_BAND_MARGIN_2 +249 0x0080 //RX_FDDRC_BAND_MARGIN_3 +250 0x0007 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x5000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x6400 //RX_FDDRC_THRD_3_2 +258 0x6400 //RX_FDDRC_THRD_3_3 +259 0x2000 //RX_FDDRC_SLANT_0_0 +260 0x2000 //RX_FDDRC_SLANT_0_1 +261 0x2000 //RX_FDDRC_SLANT_0_2 +262 0x2000 //RX_FDDRC_SLANT_0_3 +263 0x5333 //RX_FDDRC_SLANT_1_0 +264 0x5333 //RX_FDDRC_SLANT_1_1 +265 0x5333 //RX_FDDRC_SLANT_1_2 +266 0x5333 //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +286 0x0087 //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 +#VOL 6 +163 0x1000 //RX_TDDRC_ALPHA_UP_1 +164 0x1000 //RX_TDDRC_ALPHA_UP_2 +165 0x1000 //RX_TDDRC_ALPHA_UP_3 +166 0x1000 //RX_TDDRC_ALPHA_UP_4 +184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +190 0x7220 //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +269 0x0000 //RX_TDDRC_THRD_0 +270 0x0000 //RX_TDDRC_THRD_1 +271 0x1800 //RX_TDDRC_THRD_2 +272 0x1800 //RX_TDDRC_THRD_3 +273 0x7FFF //RX_TDDRC_SLANT_0 +274 0x7FFF //RX_TDDRC_SLANT_1 +275 0x1000 //RX_TDDRC_ALPHA_UP_0 +276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x199A //RX_TDDRC_HMNC_GAIN +279 0x0001 //RX_TDDRC_SMT_FLAG +280 0x0CCD //RX_TDDRC_SMT_W +281 0x01A0 //RX_TDDRC_DRC_GAIN +195 0x001C //RX_FDEQ_SUBNUM +196 0x4848 //RX_FDEQ_GAIN_0 +197 0x4848 //RX_FDEQ_GAIN_1 +198 0x4848 //RX_FDEQ_GAIN_2 +199 0x4848 //RX_FDEQ_GAIN_3 +200 0x4848 //RX_FDEQ_GAIN_4 +201 0x4848 //RX_FDEQ_GAIN_5 +202 0x484B //RX_FDEQ_GAIN_6 +203 0x4B48 //RX_FDEQ_GAIN_7 +204 0x4848 //RX_FDEQ_GAIN_8 +205 0x4848 //RX_FDEQ_GAIN_9 +206 0x4846 //RX_FDEQ_GAIN_10 +207 0x403F //RX_FDEQ_GAIN_11 +208 0x3F40 //RX_FDEQ_GAIN_12 +209 0x4248 //RX_FDEQ_GAIN_13 +210 0x4848 //RX_FDEQ_GAIN_14 +211 0x4848 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0202 //RX_FDEQ_BIN_0 +221 0x0203 //RX_FDEQ_BIN_1 +222 0x0303 //RX_FDEQ_BIN_2 +223 0x0304 //RX_FDEQ_BIN_3 +224 0x0405 //RX_FDEQ_BIN_4 +225 0x0506 //RX_FDEQ_BIN_5 +226 0x0708 //RX_FDEQ_BIN_6 +227 0x090A //RX_FDEQ_BIN_7 +228 0x0B0C //RX_FDEQ_BIN_8 +229 0x0D0E //RX_FDEQ_BIN_9 +230 0x0E0F //RX_FDEQ_BIN_10 +231 0x0F10 //RX_FDEQ_BIN_11 +232 0x1011 //RX_FDEQ_BIN_12 +233 0x1104 //RX_FDEQ_BIN_13 +234 0x0000 //RX_FDEQ_BIN_14 +235 0x0000 //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x4000 //RX_FDEQ_RESRV_0 +245 0x0320 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0030 //RX_FDDRC_BAND_MARGIN_1 +248 0x0050 //RX_FDDRC_BAND_MARGIN_2 +249 0x0080 //RX_FDDRC_BAND_MARGIN_3 +250 0x0007 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x5000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x6400 //RX_FDDRC_THRD_3_2 +258 0x6400 //RX_FDDRC_THRD_3_3 +259 0x2000 //RX_FDDRC_SLANT_0_0 +260 0x2000 //RX_FDDRC_SLANT_0_1 +261 0x2000 //RX_FDDRC_SLANT_0_2 +262 0x2000 //RX_FDDRC_SLANT_0_3 +263 0x5333 //RX_FDDRC_SLANT_1_0 +264 0x5333 //RX_FDDRC_SLANT_1_1 +265 0x5333 //RX_FDDRC_SLANT_1_2 +266 0x5333 //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +286 0x0100 //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 #CASE_NAME HEADSET-USB_BLACKBIRD-VOICE_GENERIC-SWB -#PARAM_MODE FULL -#PARAM_TYPE TX+RX -#TOTAL_CUSTOM_STEP 7 +#PARAM_MODE Full +#PARAM_TYPE TX+2RX +#TOTAL_CUSTOM_STEP 7+7 #TX 0 0x0009 //TX_OPERATION_MODE_0 1 0x0001 //TX_OPERATION_MODE_1 @@ -3758,7 +5590,7 @@ 239 0x0800 //TX_DT_RESRV_7 240 0x0800 //TX_DT_RESRV_8 241 0x0000 //TX_DT_RESRV_9 -242 0xF400 //TX_THR_SN_EST_0 +242 0xFA00 //TX_THR_SN_EST_0 243 0xFA00 //TX_THR_SN_EST_1 244 0xF700 //TX_THR_SN_EST_2 245 0xFA00 //TX_THR_SN_EST_3 @@ -3767,20 +5599,20 @@ 248 0xF400 //TX_THR_SN_EST_6 249 0xF600 //TX_THR_SN_EST_7 250 0x0000 //TX_DELTA_THR_SN_EST_0 -251 0x0100 //TX_DELTA_THR_SN_EST_1 +251 0x0200 //TX_DELTA_THR_SN_EST_1 252 0x0200 //TX_DELTA_THR_SN_EST_2 -253 0x0200 //TX_DELTA_THR_SN_EST_3 -254 0x0100 //TX_DELTA_THR_SN_EST_4 +253 0x0100 //TX_DELTA_THR_SN_EST_3 +254 0x0200 //TX_DELTA_THR_SN_EST_4 255 0x0200 //TX_DELTA_THR_SN_EST_5 -256 0x0200 //TX_DELTA_THR_SN_EST_6 +256 0x0100 //TX_DELTA_THR_SN_EST_6 257 0x0200 //TX_DELTA_THR_SN_EST_7 258 0x6000 //TX_LAMBDA_NN_EST_0 -259 0x6000 //TX_LAMBDA_NN_EST_1 +259 0x4000 //TX_LAMBDA_NN_EST_1 260 0x4000 //TX_LAMBDA_NN_EST_2 261 0x4000 //TX_LAMBDA_NN_EST_3 262 0x4000 //TX_LAMBDA_NN_EST_4 263 0x4000 //TX_LAMBDA_NN_EST_5 -264 0x4000 //TX_LAMBDA_NN_EST_6 +264 0x6000 //TX_LAMBDA_NN_EST_6 265 0x4000 //TX_LAMBDA_NN_EST_7 266 0x0400 //TX_N_SN_EST 267 0x001E //TX_INBEAM_T @@ -3798,18 +5630,18 @@ 279 0x1000 //TX_B_POST_FLT_0 280 0x1000 //TX_B_POST_FLT_1 281 0x000F //TX_NS_LVL_CTRL_0 -282 0x0018 //TX_NS_LVL_CTRL_1 -283 0x0014 //TX_NS_LVL_CTRL_2 -284 0x0018 //TX_NS_LVL_CTRL_3 -285 0x0012 //TX_NS_LVL_CTRL_4 +282 0x0014 //TX_NS_LVL_CTRL_1 +283 0x0018 //TX_NS_LVL_CTRL_2 +284 0x0012 //TX_NS_LVL_CTRL_3 +285 0x000F //TX_NS_LVL_CTRL_4 286 0x000F //TX_NS_LVL_CTRL_5 -287 0x000F //TX_NS_LVL_CTRL_6 +287 0x0018 //TX_NS_LVL_CTRL_6 288 0x0011 //TX_NS_LVL_CTRL_7 289 0x000C //TX_MIN_GAIN_S_0 -290 0x000C //TX_MIN_GAIN_S_1 -291 0x000F //TX_MIN_GAIN_S_2 -292 0x000C //TX_MIN_GAIN_S_3 -293 0x0009 //TX_MIN_GAIN_S_4 +290 0x000F //TX_MIN_GAIN_S_1 +291 0x000C //TX_MIN_GAIN_S_2 +292 0x0009 //TX_MIN_GAIN_S_3 +293 0x000C //TX_MIN_GAIN_S_4 294 0x000C //TX_MIN_GAIN_S_5 295 0x000C //TX_MIN_GAIN_S_6 296 0x000F //TX_MIN_GAIN_S_7 @@ -3817,10 +5649,10 @@ 298 0x0000 //TX_NS_MAX_PRI_SNR_TH 299 0x0000 //TX_NMOS_SUP_MENSA 300 0x7FFF //TX_SNRI_SUP_0 -301 0x7FFF //TX_SNRI_SUP_1 -302 0x6000 //TX_SNRI_SUP_2 -303 0x5000 //TX_SNRI_SUP_3 -304 0x6000 //TX_SNRI_SUP_4 +301 0x6000 //TX_SNRI_SUP_1 +302 0x5000 //TX_SNRI_SUP_2 +303 0x6000 //TX_SNRI_SUP_3 +304 0x7FFF //TX_SNRI_SUP_4 305 0x7FFF //TX_SNRI_SUP_5 306 0x7FFF //TX_SNRI_SUP_6 307 0x7FFF //TX_SNRI_SUP_7 @@ -3831,17 +5663,17 @@ 312 0x7FFF //TX_A_POST_FILT_0 313 0x2000 //TX_A_POST_FILT_1 314 0x4000 //TX_A_POST_FILT_S_0 -315 0x4000 //TX_A_POST_FILT_S_1 +315 0x5000 //TX_A_POST_FILT_S_1 316 0x5000 //TX_A_POST_FILT_S_2 317 0x5000 //TX_A_POST_FILT_S_3 318 0x5000 //TX_A_POST_FILT_S_4 319 0x5000 //TX_A_POST_FILT_S_5 -320 0x5000 //TX_A_POST_FILT_S_6 +320 0x4000 //TX_A_POST_FILT_S_6 321 0x5000 //TX_A_POST_FILT_S_7 322 0x1000 //TX_B_POST_FILT_0 323 0x1000 //TX_B_POST_FILT_1 -324 0x1000 //TX_B_POST_FILT_2 -325 0x3000 //TX_B_POST_FILT_3 +324 0x3000 //TX_B_POST_FILT_2 +325 0x1000 //TX_B_POST_FILT_3 326 0x1000 //TX_B_POST_FILT_4 327 0x1000 //TX_B_POST_FILT_5 328 0x1000 //TX_B_POST_FILT_6 @@ -3856,12 +5688,12 @@ 337 0x7FFF //TX_B_LESSCUT_RTO_S_7 338 0x7CCD //TX_LAMBDA_PFILT 339 0x7B00 //TX_LAMBDA_PFILT_S_0 -340 0x7F00 //TX_LAMBDA_PFILT_S_1 -341 0x7B00 //TX_LAMBDA_PFILT_S_2 -342 0x7000 //TX_LAMBDA_PFILT_S_3 +340 0x7B00 //TX_LAMBDA_PFILT_S_1 +341 0x7000 //TX_LAMBDA_PFILT_S_2 +342 0x7B00 //TX_LAMBDA_PFILT_S_3 343 0x7B00 //TX_LAMBDA_PFILT_S_4 344 0x7B00 //TX_LAMBDA_PFILT_S_5 -345 0x7B00 //TX_LAMBDA_PFILT_S_6 +345 0x7F00 //TX_LAMBDA_PFILT_S_6 346 0x7B00 //TX_LAMBDA_PFILT_S_7 347 0x0200 //TX_K_PEPPER 348 0x0400 //TX_A_PEPPER @@ -3883,7 +5715,7 @@ 364 0x0000 //TX_K_APT 365 0x0001 //TX_NOISEDET 366 0x0190 //TX_NDETCT -367 0x0050 //TX_NOISE_TH_0 +367 0x0383 //TX_NOISE_TH_0 368 0x7FFF //TX_NOISE_TH_0_2 369 0x7FFF //TX_NOISE_TH_0_3 370 0x07D0 //TX_NOISE_TH_1 @@ -3895,11 +5727,11 @@ 376 0x7FFF //TX_NOISE_TH_5_3 377 0x7FFF //TX_NOISE_TH_5_4 378 0x044C //TX_NOISE_TH_6 -379 0x0014 //TX_MINENOISE_TH -380 0x4000 //TX_MINENOISE_MIC0_TH_MTS -381 0xFFEE //TX_MINENOISE_MIC0_TH_EXP -382 0x6000 //TX_MINENOISE_MIC0_S_TH_MTS -383 0xFFF3 //TX_MINENOISE_MIC0_S_TH_EXP +379 0x044C //TX_MINENOISE_TH +380 0xD508 //TX_MORENS_TFMASK_TH +381 0x0001 //TX_DRC_QUIET_FLOOR +382 0x3A98 //TX_RATIODTL_CUT_TH +383 0x0DAC //TX_DT_CUT_K1 384 0x0666 //TX_OUT_ENER_S_TH_CLEAN 385 0x0666 //TX_OUT_ENER_S_TH_LESSCLEAN 386 0x0333 //TX_OUT_ENER_S_TH_NOISY @@ -3907,22 +5739,22 @@ 388 0x0333 //TX_OUT_ENER_TH_SPEECH 389 0x2000 //TX_SN_NPB_GAIN 390 0x0000 //TX_NN_NPB_GAIN -391 0x0000 //TX_CSX_ALPHA_0 -392 0x0000 //TX_CSX_ALPHA_1 -393 0x0000 //TX_CSX_ALPHA_2 -394 0x0000 //TX_CSX_ALPHA_3 -395 0x0800 //TX_MU_ARSP_EST -396 0x00C8 //TX_P_OUTBEAM_MIN_TH +391 0x7FFF //TX_POST_MASK_SUP_HSNE +392 0x1388 //TX_TAIL_DET_TH +393 0x4000 //TX_B_LESSCUT_RTO_WTA +394 0x0000 //TX_MEL_G_R +395 0x0080 //TX_SUPHIGH_TH +396 0x0000 //TX_MASK_G_R 397 0x0002 //TX_EXTRA_NS_L -398 0x0800 //TX_EXTRA_NS_A -399 0x0005 //TX_VR_NOISE_FLOOR_TH +398 0x1800 //TX_C_POST_FLT_MASK +399 0x7FFF //TX_A_POST_FLT_WNS 400 0x0148 //TX_MIN_G_LOW300HZ 401 0x0004 //TX_MAXLEVEL_CNG 402 0x00B4 //TX_STN_NOISE_TH 403 0x4000 //TX_POST_MASK_SUP 404 0x7FFF //TX_POST_MASK_ADJUST 405 0x00C8 //TX_NS_ENOISE_MIC0_TH -406 0x0014 //TX_MINENOISE_MIC0_TH +406 0x02F3 //TX_MINENOISE_MIC0_TH 407 0x012C //TX_MINENOISE_MIC0_S_TH 408 0x7FFF //TX_MIN_G_CTRL_SSNS 409 0x0800 //TX_METAL_RTO_THR @@ -4030,16 +5862,16 @@ 511 0x6666 //TX_MIC_TO_BFGAIN 512 0x0000 //TX_MICTOBFGAIN0 513 0x0000 //TX_FASTMUE_TH -514 0x0000 //TX_DERVB_LEN_0 -515 0x0000 //TX_DERVB_LEN_1 -516 0x0000 //TX_RHO_DERVB -517 0x0000 //TX_MIC_INDX_DERVB -518 0x0000 //TX_MU_DERVB -519 0x0000 //TX_DR_RESRV_0 -520 0x0000 //TX_DR_RESRV_1 -521 0x0000 //TX_DR_RESRV_2 -522 0x0000 //TX_DR_RESRV_3 -523 0x0000 //TX_DR_RESRV_4 +514 0xC000 //TX_DEREVERB_LF_MU +515 0xC000 //TX_DEREVERB_HF_MU +516 0xCCCC //TX_DEREVERB_DELAY +517 0xD999 //TX_DEREVERB_COEF_LEN +518 0x1F40 //TX_DEREVERB_DNR +519 0x0000 //TX_DEREVERB_ALPHA +520 0x0000 //TX_DEREVERB_BETA +521 0x0000 //TX_GSC_RTOL_TH +522 0x7000 //TX_GSC_RTOH_TH +523 0x0064 //TX_WIDE2_MEANHTH 524 0x0000 //TX_DR_RESRV_5 525 0x0000 //TX_DR_RESRV_6 526 0x0000 //TX_DR_RESRV_7 @@ -4405,7 +6237,7 @@ 886 0x0CCD //TX_FASTNS_TFMASKBIN_TH2 887 0x0CCD //TX_FASTNS_TFMASKBIN_TH3 888 0x00C8 //TX_FASTNS_ARSPC_TH -889 0xC000 //TX_FASTNS_MASK5_TH +889 0x8000 //TX_FASTNS_MASK5_TH 890 0x4848 //TX_POSTSSA_MIN_G_VR_MASK 891 0x4000 //TX_A_LESSCUT_RTO_MASK 892 0x1770 //TX_FASTNS_NOISETH @@ -4413,8 +6245,73 @@ 894 0xC000 //TX_FASTNS_SSA_THHFL 895 0xCCCC //TX_FASTNS_SSA_THLFH 896 0xD999 //TX_FASTNS_SSA_THHFH +897 0x2339 //TX_SENDFUNC_REG_MICMUTE +898 0x0021 //TX_SENDFUNC_REG_MICMUTE1 +899 0x02BC //TX_MICMUTE_RATIO_THR +900 0x0140 //TX_MICMUTE_AMP_THR +901 0x0004 //TX_MICMUTE_HPF_IND +902 0x00C0 //TX_MICMUTE_LOG_EYR_TH +903 0x0008 //TX_MICMUTE_CVG_TIME +904 0x0008 //TX_MICMUTE_RELEASE_TIME +905 0x01FE //TX_MIC_VOLUME_MIC0MUTE +906 0x0020 //TX_MICMUTE_EPD_OFFSET_0 +907 0x001E //TX_MICMUTE_FRQ_AEC_L +908 0x7999 //TX_MICMUTE_EAD_THR +909 0x7FFF //TX_MICMUTE_LAMBDA_CB_NLE +910 0x7FFF //TX_MICMUTE_LAMBDA_RE_EST +911 0x4000 //TX_DTD_THR1_MICMUTE_0 +912 0x7000 //TX_DTD_THR1_MICMUTE_1 +913 0x7FFF //TX_DTD_THR1_MICMUTE_2 +914 0x7FFF //TX_DTD_THR1_MICMUTE_3 +915 0x6CCC //TX_DTD_THR2_MICMUTE_0 +916 0x0400 //TX_MICMUTE_MIN_EQ_RE_EST_0 +917 0x0400 //TX_MICMUTE_MIN_EQ_RE_EST_1 +918 0x1000 //TX_MICMUTE_MIN_EQ_RE_EST_2 +919 0x7FFF //TX_MICMUTE_MIN_EQ_RE_EST_3 +920 0x7FFF //TX_MICMUTE_MIN_EQ_RE_EST_4 +921 0x4000 //TX_MICMUTE_C_POST_FLT +922 0x03E8 //TX_MICMUTE_DT_CUT_K +923 0x0001 //TX_MICMUTE_DT_CUT_THR +924 0x03E8 //TX_MICMUTE_DT_CUT_K2 +925 0x0001 //TX_MICMUTE_DT_CUT_THR2 +926 0x0064 //TX_MICMUTE_DT2_HOLD_N +927 0x1000 //TX_MICMUTE_RATIODTH_THCUT +928 0x1000 //TX_MICMUTE_B_POST_FLT_ECHOL +929 0x7FFF //TX_MICMUTE_B_POST_FLT_ECHOH +930 0x0400 //TX_MICMUTE_C_POST_FLT_MASK +931 0x7999 //TX_MICMUTE_RATIODTL_CUT_TH +932 0x0258 //TX_MICMUTE_DT_CUT_K1 +933 0x0800 //TX_MICMUTE_N2_SN_EST +934 0xFC00 //TX_MICMUTE_THR_SN_EST_0 +935 0x001C //TX_MICMUTE_MIN_G_CTRL_0 +936 0x6000 //TX_MICMUTE_A_POST_FILT_S_0 +937 0x7000 //TX_MICMUTE_B_POST_FILT_0 +938 0x2710 //TX_MIC1RUB_AMP_THR +939 0x0010 //TX_MIC1MUTE_RATIO_THR +940 0x0450 //TX_MIC1MUTE_AMP_THR +941 0x0008 //TX_MIC1MUTE_CVG_TIME +942 0x0008 //TX_MIC1MUTE_RELEASE_TIME +943 0x0000 //TX_AMS_RESRV_01 +944 0x0000 //TX_AMS_RESRV_02 +945 0x0000 //TX_AMS_RESRV_03 +946 0x0000 //TX_AMS_RESRV_04 +947 0x0000 //TX_AMS_RESRV_05 +948 0x0000 //TX_AMS_RESRV_06 +949 0x0000 //TX_AMS_RESRV_07 +950 0x0000 //TX_AMS_RESRV_08 +951 0x0000 //TX_AMS_RESRV_09 +952 0x0000 //TX_AMS_RESRV_10 +953 0x0000 //TX_AMS_RESRV_11 +954 0x0000 //TX_AMS_RESRV_12 +955 0x0000 //TX_AMS_RESRV_13 +956 0x0000 //TX_AMS_RESRV_14 +957 0x0000 //TX_AMS_RESRV_15 +958 0x0000 //TX_AMS_RESRV_16 +959 0x0000 //TX_AMS_RESRV_17 +960 0x0000 //TX_AMS_RESRV_18 +961 0x0000 //TX_AMS_RESRV_19 #RX -0 0x042C //RX_RECVFUNC_MODE_0 +0 0x242C //RX_RECVFUNC_MODE_0 1 0x0000 //RX_RECVFUNC_MODE_1 2 0x0003 //RX_SAMPLINGFREQ_SIG 3 0x0003 //RX_SAMPLINGFREQ_PROC @@ -5264,11 +7161,862 @@ 110 0x0000 //RX_FDDRC_RESRV_0 129 0x0100 //RX_SPK_VOL 130 0x0000 //RX_VOL_RESRV_0 +#RX 2 +157 0x242C //RX_RECVFUNC_MODE_0 +158 0x0000 //RX_RECVFUNC_MODE_1 +159 0x0003 //RX_SAMPLINGFREQ_SIG +160 0x0003 //RX_SAMPLINGFREQ_PROC +161 0x000A //RX_FRAME_SZ +162 0x0000 //RX_DELAY_OPT +163 0x5000 //RX_TDDRC_ALPHA_UP_1 +164 0x5000 //RX_TDDRC_ALPHA_UP_2 +165 0x5000 //RX_TDDRC_ALPHA_UP_3 +166 0x2000 //RX_TDDRC_ALPHA_UP_4 +167 0x0800 //RX_PGA +168 0x7FFF //RX_A_HP +169 0x0000 //RX_B_PE +170 0x1800 //RX_THR_PITCH_DET_0 +171 0x1000 //RX_THR_PITCH_DET_1 +172 0x0800 //RX_THR_PITCH_DET_2 +173 0x0008 //RX_PITCH_BFR_LEN +174 0x0003 //RX_SBD_PITCH_DET +175 0x0100 //RX_PP_RESRV_0 +176 0x0020 //RX_PP_RESRV_1 +177 0x0400 //RX_N_SN_EST +178 0x000C //RX_N2_SN_EST +179 0x0003 //RX_NS_LVL_CTRL +180 0x9000 //RX_THR_SN_EST +181 0x7CCD //RX_LAMBDA_PFILT +182 0x000A //RX_FENS_RESRV_0 +183 0x0190 //RX_FENS_RESRV_1 +184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +187 0x0002 //RX_EXTRA_NS_L +188 0x0800 //RX_EXTRA_NS_A +189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +190 0x65AD //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +192 0x199A //RX_A_POST_FLT +193 0x0000 //RX_LMT_THRD +194 0x4000 //RX_LMT_ALPHA +195 0x0020 //RX_FDEQ_SUBNUM +196 0x4E52 //RX_FDEQ_GAIN_0 +197 0x5252 //RX_FDEQ_GAIN_1 +198 0x5252 //RX_FDEQ_GAIN_2 +199 0x5250 //RX_FDEQ_GAIN_3 +200 0x4C46 //RX_FDEQ_GAIN_4 +201 0x4748 //RX_FDEQ_GAIN_5 +202 0x5768 //RX_FDEQ_GAIN_6 +203 0x6162 //RX_FDEQ_GAIN_7 +204 0x5252 //RX_FDEQ_GAIN_8 +205 0x5256 //RX_FDEQ_GAIN_9 +206 0x5248 //RX_FDEQ_GAIN_10 +207 0x3434 //RX_FDEQ_GAIN_11 +208 0x3436 //RX_FDEQ_GAIN_12 +209 0x2A18 //RX_FDEQ_GAIN_13 +210 0x1830 //RX_FDEQ_GAIN_14 +211 0x3648 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0202 //RX_FDEQ_BIN_0 +221 0x0203 //RX_FDEQ_BIN_1 +222 0x0303 //RX_FDEQ_BIN_2 +223 0x0304 //RX_FDEQ_BIN_3 +224 0x0405 //RX_FDEQ_BIN_4 +225 0x0506 //RX_FDEQ_BIN_5 +226 0x0708 //RX_FDEQ_BIN_6 +227 0x090A //RX_FDEQ_BIN_7 +228 0x0B0C //RX_FDEQ_BIN_8 +229 0x0D0E //RX_FDEQ_BIN_9 +230 0x1013 //RX_FDEQ_BIN_10 +231 0x1719 //RX_FDEQ_BIN_11 +232 0x1B1E //RX_FDEQ_BIN_12 +233 0x1E1E //RX_FDEQ_BIN_13 +234 0x1E28 //RX_FDEQ_BIN_14 +235 0x284A //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x4000 //RX_FDEQ_RESRV_0 +245 0x0320 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0030 //RX_FDDRC_BAND_MARGIN_1 +248 0x0050 //RX_FDDRC_BAND_MARGIN_2 +249 0x0080 //RX_FDDRC_BAND_MARGIN_3 +250 0x0007 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x5000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x6400 //RX_FDDRC_THRD_3_2 +258 0x6400 //RX_FDDRC_THRD_3_3 +259 0x2000 //RX_FDDRC_SLANT_0_0 +260 0x2000 //RX_FDDRC_SLANT_0_1 +261 0x2000 //RX_FDDRC_SLANT_0_2 +262 0x2000 //RX_FDDRC_SLANT_0_3 +263 0x5333 //RX_FDDRC_SLANT_1_0 +264 0x5333 //RX_FDDRC_SLANT_1_1 +265 0x5333 //RX_FDDRC_SLANT_1_2 +266 0x5333 //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +268 0x0002 //RX_FILTINDX +269 0x0000 //RX_TDDRC_THRD_0 +270 0x0000 //RX_TDDRC_THRD_1 +271 0x1A00 //RX_TDDRC_THRD_2 +272 0x1A00 //RX_TDDRC_THRD_3 +273 0x3000 //RX_TDDRC_SLANT_0 +274 0x7EB8 //RX_TDDRC_SLANT_1 +275 0x5000 //RX_TDDRC_ALPHA_UP_0 +276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x199A //RX_TDDRC_HMNC_GAIN +279 0x0001 //RX_TDDRC_SMT_FLAG +280 0x0CCD //RX_TDDRC_SMT_W +281 0x023E //RX_TDDRC_DRC_GAIN +282 0x7C00 //RX_LAMBDA_PKA_FP +283 0x280A //RX_TPKA_FP +284 0x032D //RX_MIN_G_FP +285 0x0A00 //RX_MAX_G_FP +286 0x000B //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 +288 0x0000 //RX_MAXLEVEL_CNG +289 0x3000 //RX_BWE_UV_TH +290 0x3000 //RX_BWE_UV_TH2 +291 0x1800 //RX_BWE_UV_TH3 +292 0x1000 //RX_BWE_V_TH +293 0x04CD //RX_BWE_GAIN1_V_TH1 +294 0x0F33 //RX_BWE_GAIN1_V_TH2 +295 0x7333 //RX_BWE_UV_EQ +296 0x199A //RX_BWE_V_EQ +297 0x7333 //RX_BWE_TONE_TH +298 0x0004 //RX_BWE_UV_HOLD_T +299 0x6CCD //RX_BWE_GAIN2_ALPHA +300 0x799A //RX_BWE_GAIN3_ALPHA +301 0x001E //RX_BWE_CUTOFF +302 0x3000 //RX_BWE_GAINFILL +303 0x3200 //RX_BWE_MAXTH_TONE +304 0x2000 //RX_BWE_EQ_0 +305 0x2000 //RX_BWE_EQ_1 +306 0x2000 //RX_BWE_EQ_2 +307 0x2000 //RX_BWE_EQ_3 +308 0x2000 //RX_BWE_EQ_4 +309 0x2000 //RX_BWE_EQ_5 +310 0x2000 //RX_BWE_EQ_6 +311 0x0000 //RX_BWE_RESRV_0 +312 0x0000 //RX_BWE_RESRV_1 +313 0x0000 //RX_BWE_RESRV_2 +#VOL 0 +163 0x5000 //RX_TDDRC_ALPHA_UP_1 +164 0x5000 //RX_TDDRC_ALPHA_UP_2 +165 0x5000 //RX_TDDRC_ALPHA_UP_3 +166 0x2000 //RX_TDDRC_ALPHA_UP_4 +184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +190 0x7220 //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +269 0x0000 //RX_TDDRC_THRD_0 +270 0x0000 //RX_TDDRC_THRD_1 +271 0x1800 //RX_TDDRC_THRD_2 +272 0x1800 //RX_TDDRC_THRD_3 +273 0x7FFF //RX_TDDRC_SLANT_0 +274 0x7FFF //RX_TDDRC_SLANT_1 +275 0x5000 //RX_TDDRC_ALPHA_UP_0 +276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x199A //RX_TDDRC_HMNC_GAIN +279 0x0001 //RX_TDDRC_SMT_FLAG +280 0x0CCD //RX_TDDRC_SMT_W +281 0x0214 //RX_TDDRC_DRC_GAIN +195 0x0020 //RX_FDEQ_SUBNUM +196 0x6270 //RX_FDEQ_GAIN_0 +197 0x7A70 //RX_FDEQ_GAIN_1 +198 0x7270 //RX_FDEQ_GAIN_2 +199 0x6A70 //RX_FDEQ_GAIN_3 +200 0x645A //RX_FDEQ_GAIN_4 +201 0x5A5E //RX_FDEQ_GAIN_5 +202 0x6E72 //RX_FDEQ_GAIN_6 +203 0x7268 //RX_FDEQ_GAIN_7 +204 0x665A //RX_FDEQ_GAIN_8 +205 0x5A5A //RX_FDEQ_GAIN_9 +206 0x5A64 //RX_FDEQ_GAIN_10 +207 0x6448 //RX_FDEQ_GAIN_11 +208 0x4949 //RX_FDEQ_GAIN_12 +209 0x4848 //RX_FDEQ_GAIN_13 +210 0x4848 //RX_FDEQ_GAIN_14 +211 0x4848 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0202 //RX_FDEQ_BIN_0 +221 0x0203 //RX_FDEQ_BIN_1 +222 0x0303 //RX_FDEQ_BIN_2 +223 0x0304 //RX_FDEQ_BIN_3 +224 0x0405 //RX_FDEQ_BIN_4 +225 0x0506 //RX_FDEQ_BIN_5 +226 0x0708 //RX_FDEQ_BIN_6 +227 0x090A //RX_FDEQ_BIN_7 +228 0x0B0C //RX_FDEQ_BIN_8 +229 0x0D0E //RX_FDEQ_BIN_9 +230 0x1013 //RX_FDEQ_BIN_10 +231 0x1719 //RX_FDEQ_BIN_11 +232 0x1B1E //RX_FDEQ_BIN_12 +233 0x1E1E //RX_FDEQ_BIN_13 +234 0x1E28 //RX_FDEQ_BIN_14 +235 0x284A //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x4000 //RX_FDEQ_RESRV_0 +245 0x0320 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0030 //RX_FDDRC_BAND_MARGIN_1 +248 0x0050 //RX_FDDRC_BAND_MARGIN_2 +249 0x0080 //RX_FDDRC_BAND_MARGIN_3 +250 0x0007 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x5000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x6400 //RX_FDDRC_THRD_3_2 +258 0x6400 //RX_FDDRC_THRD_3_3 +259 0x2000 //RX_FDDRC_SLANT_0_0 +260 0x2000 //RX_FDDRC_SLANT_0_1 +261 0x2000 //RX_FDDRC_SLANT_0_2 +262 0x2000 //RX_FDDRC_SLANT_0_3 +263 0x5333 //RX_FDDRC_SLANT_1_0 +264 0x5333 //RX_FDDRC_SLANT_1_1 +265 0x5333 //RX_FDDRC_SLANT_1_2 +266 0x5333 //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +286 0x000A //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 +#VOL 1 +163 0x5000 //RX_TDDRC_ALPHA_UP_1 +164 0x5000 //RX_TDDRC_ALPHA_UP_2 +165 0x5000 //RX_TDDRC_ALPHA_UP_3 +166 0x2000 //RX_TDDRC_ALPHA_UP_4 +184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +190 0x7220 //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +269 0x0000 //RX_TDDRC_THRD_0 +270 0x0000 //RX_TDDRC_THRD_1 +271 0x1800 //RX_TDDRC_THRD_2 +272 0x1800 //RX_TDDRC_THRD_3 +273 0x7FFF //RX_TDDRC_SLANT_0 +274 0x7FFF //RX_TDDRC_SLANT_1 +275 0x5000 //RX_TDDRC_ALPHA_UP_0 +276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x199A //RX_TDDRC_HMNC_GAIN +279 0x0001 //RX_TDDRC_SMT_FLAG +280 0x0CCD //RX_TDDRC_SMT_W +281 0x0214 //RX_TDDRC_DRC_GAIN +195 0x0020 //RX_FDEQ_SUBNUM +196 0x6270 //RX_FDEQ_GAIN_0 +197 0x7A70 //RX_FDEQ_GAIN_1 +198 0x7270 //RX_FDEQ_GAIN_2 +199 0x6A70 //RX_FDEQ_GAIN_3 +200 0x645A //RX_FDEQ_GAIN_4 +201 0x5A5E //RX_FDEQ_GAIN_5 +202 0x6E72 //RX_FDEQ_GAIN_6 +203 0x7268 //RX_FDEQ_GAIN_7 +204 0x665A //RX_FDEQ_GAIN_8 +205 0x5A5A //RX_FDEQ_GAIN_9 +206 0x5A64 //RX_FDEQ_GAIN_10 +207 0x6448 //RX_FDEQ_GAIN_11 +208 0x4949 //RX_FDEQ_GAIN_12 +209 0x4848 //RX_FDEQ_GAIN_13 +210 0x4848 //RX_FDEQ_GAIN_14 +211 0x4848 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0202 //RX_FDEQ_BIN_0 +221 0x0203 //RX_FDEQ_BIN_1 +222 0x0303 //RX_FDEQ_BIN_2 +223 0x0304 //RX_FDEQ_BIN_3 +224 0x0405 //RX_FDEQ_BIN_4 +225 0x0506 //RX_FDEQ_BIN_5 +226 0x0708 //RX_FDEQ_BIN_6 +227 0x090A //RX_FDEQ_BIN_7 +228 0x0B0C //RX_FDEQ_BIN_8 +229 0x0D0E //RX_FDEQ_BIN_9 +230 0x1013 //RX_FDEQ_BIN_10 +231 0x1719 //RX_FDEQ_BIN_11 +232 0x1B1E //RX_FDEQ_BIN_12 +233 0x1E1E //RX_FDEQ_BIN_13 +234 0x1E28 //RX_FDEQ_BIN_14 +235 0x284A //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x4000 //RX_FDEQ_RESRV_0 +245 0x0320 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0030 //RX_FDDRC_BAND_MARGIN_1 +248 0x0050 //RX_FDDRC_BAND_MARGIN_2 +249 0x0080 //RX_FDDRC_BAND_MARGIN_3 +250 0x0007 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x5000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x6400 //RX_FDDRC_THRD_3_2 +258 0x6400 //RX_FDDRC_THRD_3_3 +259 0x2000 //RX_FDDRC_SLANT_0_0 +260 0x2000 //RX_FDDRC_SLANT_0_1 +261 0x2000 //RX_FDDRC_SLANT_0_2 +262 0x2000 //RX_FDDRC_SLANT_0_3 +263 0x5333 //RX_FDDRC_SLANT_1_0 +264 0x5333 //RX_FDDRC_SLANT_1_1 +265 0x5333 //RX_FDDRC_SLANT_1_2 +266 0x5333 //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +286 0x0011 //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 +#VOL 2 +163 0x5000 //RX_TDDRC_ALPHA_UP_1 +164 0x5000 //RX_TDDRC_ALPHA_UP_2 +165 0x5000 //RX_TDDRC_ALPHA_UP_3 +166 0x2000 //RX_TDDRC_ALPHA_UP_4 +184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +190 0x7220 //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +269 0x0000 //RX_TDDRC_THRD_0 +270 0x0000 //RX_TDDRC_THRD_1 +271 0x1800 //RX_TDDRC_THRD_2 +272 0x1800 //RX_TDDRC_THRD_3 +273 0x7FFF //RX_TDDRC_SLANT_0 +274 0x7FFF //RX_TDDRC_SLANT_1 +275 0x5000 //RX_TDDRC_ALPHA_UP_0 +276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x199A //RX_TDDRC_HMNC_GAIN +279 0x0001 //RX_TDDRC_SMT_FLAG +280 0x0CCD //RX_TDDRC_SMT_W +281 0x0214 //RX_TDDRC_DRC_GAIN +195 0x0020 //RX_FDEQ_SUBNUM +196 0x6270 //RX_FDEQ_GAIN_0 +197 0x7A70 //RX_FDEQ_GAIN_1 +198 0x7270 //RX_FDEQ_GAIN_2 +199 0x6A70 //RX_FDEQ_GAIN_3 +200 0x645A //RX_FDEQ_GAIN_4 +201 0x5A5E //RX_FDEQ_GAIN_5 +202 0x6E72 //RX_FDEQ_GAIN_6 +203 0x7268 //RX_FDEQ_GAIN_7 +204 0x665A //RX_FDEQ_GAIN_8 +205 0x5A5A //RX_FDEQ_GAIN_9 +206 0x5A64 //RX_FDEQ_GAIN_10 +207 0x6448 //RX_FDEQ_GAIN_11 +208 0x4949 //RX_FDEQ_GAIN_12 +209 0x4848 //RX_FDEQ_GAIN_13 +210 0x4848 //RX_FDEQ_GAIN_14 +211 0x4848 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0202 //RX_FDEQ_BIN_0 +221 0x0203 //RX_FDEQ_BIN_1 +222 0x0303 //RX_FDEQ_BIN_2 +223 0x0304 //RX_FDEQ_BIN_3 +224 0x0405 //RX_FDEQ_BIN_4 +225 0x0506 //RX_FDEQ_BIN_5 +226 0x0708 //RX_FDEQ_BIN_6 +227 0x090A //RX_FDEQ_BIN_7 +228 0x0B0C //RX_FDEQ_BIN_8 +229 0x0D0E //RX_FDEQ_BIN_9 +230 0x1013 //RX_FDEQ_BIN_10 +231 0x1719 //RX_FDEQ_BIN_11 +232 0x1B1E //RX_FDEQ_BIN_12 +233 0x1E1E //RX_FDEQ_BIN_13 +234 0x1E28 //RX_FDEQ_BIN_14 +235 0x284A //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x4000 //RX_FDEQ_RESRV_0 +245 0x0320 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0030 //RX_FDDRC_BAND_MARGIN_1 +248 0x0050 //RX_FDDRC_BAND_MARGIN_2 +249 0x0080 //RX_FDDRC_BAND_MARGIN_3 +250 0x0007 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x5000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x6400 //RX_FDDRC_THRD_3_2 +258 0x6400 //RX_FDDRC_THRD_3_3 +259 0x2000 //RX_FDDRC_SLANT_0_0 +260 0x2000 //RX_FDDRC_SLANT_0_1 +261 0x2000 //RX_FDDRC_SLANT_0_2 +262 0x2000 //RX_FDDRC_SLANT_0_3 +263 0x5333 //RX_FDDRC_SLANT_1_0 +264 0x5333 //RX_FDDRC_SLANT_1_1 +265 0x5333 //RX_FDDRC_SLANT_1_2 +266 0x5333 //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +286 0x001C //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 +#VOL 3 +163 0x5000 //RX_TDDRC_ALPHA_UP_1 +164 0x5000 //RX_TDDRC_ALPHA_UP_2 +165 0x5000 //RX_TDDRC_ALPHA_UP_3 +166 0x2000 //RX_TDDRC_ALPHA_UP_4 +184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +190 0x7220 //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +269 0x0000 //RX_TDDRC_THRD_0 +270 0x0000 //RX_TDDRC_THRD_1 +271 0x1800 //RX_TDDRC_THRD_2 +272 0x1800 //RX_TDDRC_THRD_3 +273 0x7FFF //RX_TDDRC_SLANT_0 +274 0x7FFF //RX_TDDRC_SLANT_1 +275 0x5000 //RX_TDDRC_ALPHA_UP_0 +276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x199A //RX_TDDRC_HMNC_GAIN +279 0x0001 //RX_TDDRC_SMT_FLAG +280 0x0CCD //RX_TDDRC_SMT_W +281 0x0214 //RX_TDDRC_DRC_GAIN +195 0x0020 //RX_FDEQ_SUBNUM +196 0x6270 //RX_FDEQ_GAIN_0 +197 0x7A70 //RX_FDEQ_GAIN_1 +198 0x7270 //RX_FDEQ_GAIN_2 +199 0x6A70 //RX_FDEQ_GAIN_3 +200 0x645A //RX_FDEQ_GAIN_4 +201 0x5A5E //RX_FDEQ_GAIN_5 +202 0x6E72 //RX_FDEQ_GAIN_6 +203 0x7268 //RX_FDEQ_GAIN_7 +204 0x665A //RX_FDEQ_GAIN_8 +205 0x5A5A //RX_FDEQ_GAIN_9 +206 0x5A64 //RX_FDEQ_GAIN_10 +207 0x6448 //RX_FDEQ_GAIN_11 +208 0x4949 //RX_FDEQ_GAIN_12 +209 0x4848 //RX_FDEQ_GAIN_13 +210 0x4848 //RX_FDEQ_GAIN_14 +211 0x4848 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0202 //RX_FDEQ_BIN_0 +221 0x0203 //RX_FDEQ_BIN_1 +222 0x0303 //RX_FDEQ_BIN_2 +223 0x0304 //RX_FDEQ_BIN_3 +224 0x0405 //RX_FDEQ_BIN_4 +225 0x0506 //RX_FDEQ_BIN_5 +226 0x0708 //RX_FDEQ_BIN_6 +227 0x090A //RX_FDEQ_BIN_7 +228 0x0B0C //RX_FDEQ_BIN_8 +229 0x0D0E //RX_FDEQ_BIN_9 +230 0x1013 //RX_FDEQ_BIN_10 +231 0x1719 //RX_FDEQ_BIN_11 +232 0x1B1E //RX_FDEQ_BIN_12 +233 0x1E1E //RX_FDEQ_BIN_13 +234 0x1E28 //RX_FDEQ_BIN_14 +235 0x284A //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x4000 //RX_FDEQ_RESRV_0 +245 0x0320 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0030 //RX_FDDRC_BAND_MARGIN_1 +248 0x0050 //RX_FDDRC_BAND_MARGIN_2 +249 0x0080 //RX_FDDRC_BAND_MARGIN_3 +250 0x0007 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x5000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x6400 //RX_FDDRC_THRD_3_2 +258 0x6400 //RX_FDDRC_THRD_3_3 +259 0x2000 //RX_FDDRC_SLANT_0_0 +260 0x2000 //RX_FDDRC_SLANT_0_1 +261 0x2000 //RX_FDDRC_SLANT_0_2 +262 0x2000 //RX_FDDRC_SLANT_0_3 +263 0x5333 //RX_FDDRC_SLANT_1_0 +264 0x5333 //RX_FDDRC_SLANT_1_1 +265 0x5333 //RX_FDDRC_SLANT_1_2 +266 0x5333 //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +286 0x002F //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 +#VOL 4 +163 0x5000 //RX_TDDRC_ALPHA_UP_1 +164 0x5000 //RX_TDDRC_ALPHA_UP_2 +165 0x5000 //RX_TDDRC_ALPHA_UP_3 +166 0x2000 //RX_TDDRC_ALPHA_UP_4 +184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +190 0x7220 //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +269 0x0000 //RX_TDDRC_THRD_0 +270 0x0000 //RX_TDDRC_THRD_1 +271 0x1800 //RX_TDDRC_THRD_2 +272 0x1800 //RX_TDDRC_THRD_3 +273 0x7FFF //RX_TDDRC_SLANT_0 +274 0x7FFF //RX_TDDRC_SLANT_1 +275 0x5000 //RX_TDDRC_ALPHA_UP_0 +276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x199A //RX_TDDRC_HMNC_GAIN +279 0x0001 //RX_TDDRC_SMT_FLAG +280 0x0CCD //RX_TDDRC_SMT_W +281 0x0214 //RX_TDDRC_DRC_GAIN +195 0x0020 //RX_FDEQ_SUBNUM +196 0x6270 //RX_FDEQ_GAIN_0 +197 0x7A70 //RX_FDEQ_GAIN_1 +198 0x7270 //RX_FDEQ_GAIN_2 +199 0x6A70 //RX_FDEQ_GAIN_3 +200 0x645A //RX_FDEQ_GAIN_4 +201 0x5A5E //RX_FDEQ_GAIN_5 +202 0x6E72 //RX_FDEQ_GAIN_6 +203 0x7268 //RX_FDEQ_GAIN_7 +204 0x665A //RX_FDEQ_GAIN_8 +205 0x5A5A //RX_FDEQ_GAIN_9 +206 0x5A64 //RX_FDEQ_GAIN_10 +207 0x6448 //RX_FDEQ_GAIN_11 +208 0x4949 //RX_FDEQ_GAIN_12 +209 0x4848 //RX_FDEQ_GAIN_13 +210 0x4848 //RX_FDEQ_GAIN_14 +211 0x4848 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0202 //RX_FDEQ_BIN_0 +221 0x0203 //RX_FDEQ_BIN_1 +222 0x0303 //RX_FDEQ_BIN_2 +223 0x0304 //RX_FDEQ_BIN_3 +224 0x0405 //RX_FDEQ_BIN_4 +225 0x0506 //RX_FDEQ_BIN_5 +226 0x0708 //RX_FDEQ_BIN_6 +227 0x090A //RX_FDEQ_BIN_7 +228 0x0B0C //RX_FDEQ_BIN_8 +229 0x0D0E //RX_FDEQ_BIN_9 +230 0x1013 //RX_FDEQ_BIN_10 +231 0x1719 //RX_FDEQ_BIN_11 +232 0x1B1E //RX_FDEQ_BIN_12 +233 0x1E1E //RX_FDEQ_BIN_13 +234 0x1E28 //RX_FDEQ_BIN_14 +235 0x284A //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x4000 //RX_FDEQ_RESRV_0 +245 0x0320 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0030 //RX_FDDRC_BAND_MARGIN_1 +248 0x0050 //RX_FDDRC_BAND_MARGIN_2 +249 0x0080 //RX_FDDRC_BAND_MARGIN_3 +250 0x0007 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x5000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x6400 //RX_FDDRC_THRD_3_2 +258 0x6400 //RX_FDDRC_THRD_3_3 +259 0x2000 //RX_FDDRC_SLANT_0_0 +260 0x2000 //RX_FDDRC_SLANT_0_1 +261 0x2000 //RX_FDDRC_SLANT_0_2 +262 0x2000 //RX_FDDRC_SLANT_0_3 +263 0x5333 //RX_FDDRC_SLANT_1_0 +264 0x5333 //RX_FDDRC_SLANT_1_1 +265 0x5333 //RX_FDDRC_SLANT_1_2 +266 0x5333 //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +286 0x004F //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 +#VOL 5 +163 0x5000 //RX_TDDRC_ALPHA_UP_1 +164 0x5000 //RX_TDDRC_ALPHA_UP_2 +165 0x5000 //RX_TDDRC_ALPHA_UP_3 +166 0x2000 //RX_TDDRC_ALPHA_UP_4 +184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +190 0x7220 //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +269 0x0000 //RX_TDDRC_THRD_0 +270 0x0000 //RX_TDDRC_THRD_1 +271 0x1800 //RX_TDDRC_THRD_2 +272 0x1800 //RX_TDDRC_THRD_3 +273 0x7FFF //RX_TDDRC_SLANT_0 +274 0x7FFF //RX_TDDRC_SLANT_1 +275 0x5000 //RX_TDDRC_ALPHA_UP_0 +276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x199A //RX_TDDRC_HMNC_GAIN +279 0x0001 //RX_TDDRC_SMT_FLAG +280 0x0CCD //RX_TDDRC_SMT_W +281 0x0214 //RX_TDDRC_DRC_GAIN +195 0x0020 //RX_FDEQ_SUBNUM +196 0x6270 //RX_FDEQ_GAIN_0 +197 0x7A70 //RX_FDEQ_GAIN_1 +198 0x7270 //RX_FDEQ_GAIN_2 +199 0x6A70 //RX_FDEQ_GAIN_3 +200 0x645A //RX_FDEQ_GAIN_4 +201 0x5A5E //RX_FDEQ_GAIN_5 +202 0x6E72 //RX_FDEQ_GAIN_6 +203 0x7268 //RX_FDEQ_GAIN_7 +204 0x665A //RX_FDEQ_GAIN_8 +205 0x5A5A //RX_FDEQ_GAIN_9 +206 0x5A64 //RX_FDEQ_GAIN_10 +207 0x6448 //RX_FDEQ_GAIN_11 +208 0x4949 //RX_FDEQ_GAIN_12 +209 0x4848 //RX_FDEQ_GAIN_13 +210 0x4848 //RX_FDEQ_GAIN_14 +211 0x4848 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0202 //RX_FDEQ_BIN_0 +221 0x0203 //RX_FDEQ_BIN_1 +222 0x0303 //RX_FDEQ_BIN_2 +223 0x0304 //RX_FDEQ_BIN_3 +224 0x0405 //RX_FDEQ_BIN_4 +225 0x0506 //RX_FDEQ_BIN_5 +226 0x0708 //RX_FDEQ_BIN_6 +227 0x090A //RX_FDEQ_BIN_7 +228 0x0B0C //RX_FDEQ_BIN_8 +229 0x0D0E //RX_FDEQ_BIN_9 +230 0x1013 //RX_FDEQ_BIN_10 +231 0x1719 //RX_FDEQ_BIN_11 +232 0x1B1E //RX_FDEQ_BIN_12 +233 0x1E1E //RX_FDEQ_BIN_13 +234 0x1E28 //RX_FDEQ_BIN_14 +235 0x284A //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x4000 //RX_FDEQ_RESRV_0 +245 0x0320 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0030 //RX_FDDRC_BAND_MARGIN_1 +248 0x0050 //RX_FDDRC_BAND_MARGIN_2 +249 0x0080 //RX_FDDRC_BAND_MARGIN_3 +250 0x0007 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x5000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x6400 //RX_FDDRC_THRD_3_2 +258 0x6400 //RX_FDDRC_THRD_3_3 +259 0x2000 //RX_FDDRC_SLANT_0_0 +260 0x2000 //RX_FDDRC_SLANT_0_1 +261 0x2000 //RX_FDDRC_SLANT_0_2 +262 0x2000 //RX_FDDRC_SLANT_0_3 +263 0x5333 //RX_FDDRC_SLANT_1_0 +264 0x5333 //RX_FDDRC_SLANT_1_1 +265 0x5333 //RX_FDDRC_SLANT_1_2 +266 0x5333 //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +286 0x0086 //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 +#VOL 6 +163 0x5000 //RX_TDDRC_ALPHA_UP_1 +164 0x5000 //RX_TDDRC_ALPHA_UP_2 +165 0x5000 //RX_TDDRC_ALPHA_UP_3 +166 0x2000 //RX_TDDRC_ALPHA_UP_4 +184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +190 0x7220 //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +269 0x0000 //RX_TDDRC_THRD_0 +270 0x0000 //RX_TDDRC_THRD_1 +271 0x1800 //RX_TDDRC_THRD_2 +272 0x1800 //RX_TDDRC_THRD_3 +273 0x7FFF //RX_TDDRC_SLANT_0 +274 0x7FFF //RX_TDDRC_SLANT_1 +275 0x5000 //RX_TDDRC_ALPHA_UP_0 +276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x199A //RX_TDDRC_HMNC_GAIN +279 0x0001 //RX_TDDRC_SMT_FLAG +280 0x0CCD //RX_TDDRC_SMT_W +281 0x0214 //RX_TDDRC_DRC_GAIN +195 0x0020 //RX_FDEQ_SUBNUM +196 0x6270 //RX_FDEQ_GAIN_0 +197 0x7A70 //RX_FDEQ_GAIN_1 +198 0x7270 //RX_FDEQ_GAIN_2 +199 0x6A70 //RX_FDEQ_GAIN_3 +200 0x645A //RX_FDEQ_GAIN_4 +201 0x5A5E //RX_FDEQ_GAIN_5 +202 0x6E72 //RX_FDEQ_GAIN_6 +203 0x7268 //RX_FDEQ_GAIN_7 +204 0x665A //RX_FDEQ_GAIN_8 +205 0x5A5A //RX_FDEQ_GAIN_9 +206 0x5A64 //RX_FDEQ_GAIN_10 +207 0x6448 //RX_FDEQ_GAIN_11 +208 0x4949 //RX_FDEQ_GAIN_12 +209 0x4848 //RX_FDEQ_GAIN_13 +210 0x4848 //RX_FDEQ_GAIN_14 +211 0x4848 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0202 //RX_FDEQ_BIN_0 +221 0x0203 //RX_FDEQ_BIN_1 +222 0x0303 //RX_FDEQ_BIN_2 +223 0x0304 //RX_FDEQ_BIN_3 +224 0x0405 //RX_FDEQ_BIN_4 +225 0x0506 //RX_FDEQ_BIN_5 +226 0x0708 //RX_FDEQ_BIN_6 +227 0x090A //RX_FDEQ_BIN_7 +228 0x0B0C //RX_FDEQ_BIN_8 +229 0x0D0E //RX_FDEQ_BIN_9 +230 0x1013 //RX_FDEQ_BIN_10 +231 0x1719 //RX_FDEQ_BIN_11 +232 0x1B1E //RX_FDEQ_BIN_12 +233 0x1E1E //RX_FDEQ_BIN_13 +234 0x1E28 //RX_FDEQ_BIN_14 +235 0x284A //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x4000 //RX_FDEQ_RESRV_0 +245 0x0320 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0030 //RX_FDDRC_BAND_MARGIN_1 +248 0x0050 //RX_FDDRC_BAND_MARGIN_2 +249 0x0080 //RX_FDDRC_BAND_MARGIN_3 +250 0x0007 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x5000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x6400 //RX_FDDRC_THRD_3_2 +258 0x6400 //RX_FDDRC_THRD_3_3 +259 0x2000 //RX_FDDRC_SLANT_0_0 +260 0x2000 //RX_FDDRC_SLANT_0_1 +261 0x2000 //RX_FDDRC_SLANT_0_2 +262 0x2000 //RX_FDDRC_SLANT_0_3 +263 0x5333 //RX_FDDRC_SLANT_1_0 +264 0x5333 //RX_FDDRC_SLANT_1_1 +265 0x5333 //RX_FDDRC_SLANT_1_2 +266 0x5333 //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +286 0x0100 //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 #CASE_NAME HEADSET-USB_BLACKBIRD-VOICE_GENERIC-FB -#PARAM_MODE FULL -#PARAM_TYPE TX+RX -#TOTAL_CUSTOM_STEP 7 +#PARAM_MODE Full +#PARAM_TYPE TX+2RX +#TOTAL_CUSTOM_STEP 7+7 #TX 0 0x0009 //TX_OPERATION_MODE_0 1 0x0009 //TX_OPERATION_MODE_1 @@ -5521,10 +8269,10 @@ 248 0xF600 //TX_THR_SN_EST_6 249 0xF600 //TX_THR_SN_EST_7 250 0x0200 //TX_DELTA_THR_SN_EST_0 -251 0x0200 //TX_DELTA_THR_SN_EST_1 -252 0x0400 //TX_DELTA_THR_SN_EST_2 -253 0x0300 //TX_DELTA_THR_SN_EST_3 -254 0x0600 //TX_DELTA_THR_SN_EST_4 +251 0x0400 //TX_DELTA_THR_SN_EST_1 +252 0x0300 //TX_DELTA_THR_SN_EST_2 +253 0x0600 //TX_DELTA_THR_SN_EST_3 +254 0x0200 //TX_DELTA_THR_SN_EST_4 255 0x0200 //TX_DELTA_THR_SN_EST_5 256 0x0200 //TX_DELTA_THR_SN_EST_6 257 0x0200 //TX_DELTA_THR_SN_EST_7 @@ -5552,31 +8300,31 @@ 279 0x2000 //TX_B_POST_FLT_0 280 0x2000 //TX_B_POST_FLT_1 281 0x0012 //TX_NS_LVL_CTRL_0 -282 0x0019 //TX_NS_LVL_CTRL_1 -283 0x0020 //TX_NS_LVL_CTRL_2 -284 0x0016 //TX_NS_LVL_CTRL_3 -285 0x0019 //TX_NS_LVL_CTRL_4 +282 0x0020 //TX_NS_LVL_CTRL_1 +283 0x0016 //TX_NS_LVL_CTRL_2 +284 0x0019 //TX_NS_LVL_CTRL_3 +285 0x0010 //TX_NS_LVL_CTRL_4 286 0x0010 //TX_NS_LVL_CTRL_5 -287 0x0010 //TX_NS_LVL_CTRL_6 +287 0x0019 //TX_NS_LVL_CTRL_6 288 0x0010 //TX_NS_LVL_CTRL_7 289 0x000C //TX_MIN_GAIN_S_0 -290 0x0011 //TX_MIN_GAIN_S_1 +290 0x000C //TX_MIN_GAIN_S_1 291 0x000C //TX_MIN_GAIN_S_2 -292 0x000C //TX_MIN_GAIN_S_3 -293 0x000F //TX_MIN_GAIN_S_4 +292 0x000F //TX_MIN_GAIN_S_3 +293 0x000C //TX_MIN_GAIN_S_4 294 0x000C //TX_MIN_GAIN_S_5 -295 0x000C //TX_MIN_GAIN_S_6 +295 0x0011 //TX_MIN_GAIN_S_6 296 0x000C //TX_MIN_GAIN_S_7 297 0x0800 //TX_NMOS_SUP 298 0x0000 //TX_NS_MAX_PRI_SNR_TH 299 0x0000 //TX_NMOS_SUP_MENSA 300 0x7000 //TX_SNRI_SUP_0 -301 0x6000 //TX_SNRI_SUP_1 -302 0x1000 //TX_SNRI_SUP_2 -303 0x7000 //TX_SNRI_SUP_3 -304 0x6000 //TX_SNRI_SUP_4 +301 0x1000 //TX_SNRI_SUP_1 +302 0x7000 //TX_SNRI_SUP_2 +303 0x6000 //TX_SNRI_SUP_3 +304 0x7FFF //TX_SNRI_SUP_4 305 0x7FFF //TX_SNRI_SUP_5 -306 0x7FFF //TX_SNRI_SUP_6 +306 0x6000 //TX_SNRI_SUP_6 307 0x7FFF //TX_SNRI_SUP_7 308 0x7FFF //TX_THR_LFNS 309 0x0016 //TX_G_LFNS @@ -5593,8 +8341,8 @@ 320 0x6000 //TX_A_POST_FILT_S_6 321 0x6000 //TX_A_POST_FILT_S_7 322 0x2000 //TX_B_POST_FILT_0 -323 0x2000 //TX_B_POST_FILT_1 -324 0x4000 //TX_B_POST_FILT_2 +323 0x4000 //TX_B_POST_FILT_1 +324 0x2000 //TX_B_POST_FILT_2 325 0x2000 //TX_B_POST_FILT_3 326 0x2000 //TX_B_POST_FILT_4 327 0x2000 //TX_B_POST_FILT_5 @@ -5637,7 +8385,7 @@ 364 0x0000 //TX_K_APT 365 0x0001 //TX_NOISEDET 366 0x0190 //TX_NDETCT -367 0x0020 //TX_NOISE_TH_0 +367 0x04E8 //TX_NOISE_TH_0 368 0x7FFF //TX_NOISE_TH_0_2 369 0x7FFF //TX_NOISE_TH_0_3 370 0x02A6 //TX_NOISE_TH_1 @@ -5649,11 +8397,11 @@ 376 0x0001 //TX_NOISE_TH_5_3 377 0x0000 //TX_NOISE_TH_5_4 378 0x02BC //TX_NOISE_TH_6 -379 0x0020 //TX_MINENOISE_TH -380 0x4000 //TX_MINENOISE_MIC0_TH_MTS -381 0xFFEE //TX_MINENOISE_MIC0_TH_EXP -382 0x6000 //TX_MINENOISE_MIC0_S_TH_MTS -383 0xFFF3 //TX_MINENOISE_MIC0_S_TH_EXP +379 0x02BC //TX_MINENOISE_TH +380 0xD508 //TX_MORENS_TFMASK_TH +381 0x0001 //TX_DRC_QUIET_FLOOR +382 0x3A98 //TX_RATIODTL_CUT_TH +383 0x1482 //TX_DT_CUT_K1 384 0x0666 //TX_OUT_ENER_S_TH_CLEAN 385 0x0666 //TX_OUT_ENER_S_TH_LESSCLEAN 386 0x0333 //TX_OUT_ENER_S_TH_NOISY @@ -5661,22 +8409,22 @@ 388 0x0333 //TX_OUT_ENER_TH_SPEECH 389 0x2000 //TX_SN_NPB_GAIN 390 0x0000 //TX_NN_NPB_GAIN -391 0x0000 //TX_CSX_ALPHA_0 -392 0x0000 //TX_CSX_ALPHA_1 -393 0x0000 //TX_CSX_ALPHA_2 -394 0x0000 //TX_CSX_ALPHA_3 -395 0x0800 //TX_MU_ARSP_EST -396 0x00C8 //TX_P_OUTBEAM_MIN_TH +391 0x7FFF //TX_POST_MASK_SUP_HSNE +392 0x1388 //TX_TAIL_DET_TH +393 0x4000 //TX_B_LESSCUT_RTO_WTA +394 0x0000 //TX_MEL_G_R +395 0x0080 //TX_SUPHIGH_TH +396 0x0000 //TX_MASK_G_R 397 0x0002 //TX_EXTRA_NS_L -398 0x0800 //TX_EXTRA_NS_A -399 0x0005 //TX_VR_NOISE_FLOOR_TH +398 0x1800 //TX_C_POST_FLT_MASK +399 0x7FFF //TX_A_POST_FLT_WNS 400 0x0148 //TX_MIN_G_LOW300HZ 401 0x0004 //TX_MAXLEVEL_CNG 402 0x00B4 //TX_STN_NOISE_TH 403 0x4000 //TX_POST_MASK_SUP 404 0x7FFF //TX_POST_MASK_ADJUST 405 0x00C8 //TX_NS_ENOISE_MIC0_TH -406 0x0020 //TX_MINENOISE_MIC0_TH +406 0x04E7 //TX_MINENOISE_MIC0_TH 407 0x012C //TX_MINENOISE_MIC0_S_TH 408 0x2900 //TX_MIN_G_CTRL_SSNS 409 0x0800 //TX_METAL_RTO_THR @@ -5784,16 +8532,16 @@ 511 0x6666 //TX_MIC_TO_BFGAIN 512 0x0000 //TX_MICTOBFGAIN0 513 0x0000 //TX_FASTMUE_TH -514 0x0000 //TX_DERVB_LEN_0 -515 0x0000 //TX_DERVB_LEN_1 -516 0x0000 //TX_RHO_DERVB -517 0x0000 //TX_MIC_INDX_DERVB -518 0x0000 //TX_MU_DERVB -519 0x0000 //TX_DR_RESRV_0 -520 0x0000 //TX_DR_RESRV_1 -521 0x0000 //TX_DR_RESRV_2 -522 0x0000 //TX_DR_RESRV_3 -523 0x0000 //TX_DR_RESRV_4 +514 0xC000 //TX_DEREVERB_LF_MU +515 0xC000 //TX_DEREVERB_HF_MU +516 0xCCCC //TX_DEREVERB_DELAY +517 0xD999 //TX_DEREVERB_COEF_LEN +518 0x1F40 //TX_DEREVERB_DNR +519 0x0000 //TX_DEREVERB_ALPHA +520 0x0000 //TX_DEREVERB_BETA +521 0x0000 //TX_GSC_RTOL_TH +522 0x7000 //TX_GSC_RTOH_TH +523 0x0064 //TX_WIDE2_MEANHTH 524 0x0000 //TX_DR_RESRV_5 525 0x0000 //TX_DR_RESRV_6 526 0x0000 //TX_DR_RESRV_7 @@ -6167,8 +8915,73 @@ 894 0xC000 //TX_FASTNS_SSA_THHFL 895 0xCCCC //TX_FASTNS_SSA_THLFH 896 0xD999 //TX_FASTNS_SSA_THHFH +897 0x2339 //TX_SENDFUNC_REG_MICMUTE +898 0x0021 //TX_SENDFUNC_REG_MICMUTE1 +899 0x02BC //TX_MICMUTE_RATIO_THR +900 0x0140 //TX_MICMUTE_AMP_THR +901 0x0004 //TX_MICMUTE_HPF_IND +902 0x00C0 //TX_MICMUTE_LOG_EYR_TH +903 0x0008 //TX_MICMUTE_CVG_TIME +904 0x0008 //TX_MICMUTE_RELEASE_TIME +905 0x01FE //TX_MIC_VOLUME_MIC0MUTE +906 0x0020 //TX_MICMUTE_EPD_OFFSET_0 +907 0x001E //TX_MICMUTE_FRQ_AEC_L +908 0x7999 //TX_MICMUTE_EAD_THR +909 0x7FFF //TX_MICMUTE_LAMBDA_CB_NLE +910 0x7FFF //TX_MICMUTE_LAMBDA_RE_EST +911 0x4000 //TX_DTD_THR1_MICMUTE_0 +912 0x7000 //TX_DTD_THR1_MICMUTE_1 +913 0x7FFF //TX_DTD_THR1_MICMUTE_2 +914 0x7FFF //TX_DTD_THR1_MICMUTE_3 +915 0x6CCC //TX_DTD_THR2_MICMUTE_0 +916 0x0400 //TX_MICMUTE_MIN_EQ_RE_EST_0 +917 0x0400 //TX_MICMUTE_MIN_EQ_RE_EST_1 +918 0x1000 //TX_MICMUTE_MIN_EQ_RE_EST_2 +919 0x7FFF //TX_MICMUTE_MIN_EQ_RE_EST_3 +920 0x7FFF //TX_MICMUTE_MIN_EQ_RE_EST_4 +921 0x4000 //TX_MICMUTE_C_POST_FLT +922 0x03E8 //TX_MICMUTE_DT_CUT_K +923 0x0001 //TX_MICMUTE_DT_CUT_THR +924 0x03E8 //TX_MICMUTE_DT_CUT_K2 +925 0x0001 //TX_MICMUTE_DT_CUT_THR2 +926 0x0064 //TX_MICMUTE_DT2_HOLD_N +927 0x1000 //TX_MICMUTE_RATIODTH_THCUT +928 0x1000 //TX_MICMUTE_B_POST_FLT_ECHOL +929 0x7FFF //TX_MICMUTE_B_POST_FLT_ECHOH +930 0x0400 //TX_MICMUTE_C_POST_FLT_MASK +931 0x7999 //TX_MICMUTE_RATIODTL_CUT_TH +932 0x0258 //TX_MICMUTE_DT_CUT_K1 +933 0x0800 //TX_MICMUTE_N2_SN_EST +934 0xFC00 //TX_MICMUTE_THR_SN_EST_0 +935 0x001C //TX_MICMUTE_MIN_G_CTRL_0 +936 0x6000 //TX_MICMUTE_A_POST_FILT_S_0 +937 0x7000 //TX_MICMUTE_B_POST_FILT_0 +938 0x2710 //TX_MIC1RUB_AMP_THR +939 0x0010 //TX_MIC1MUTE_RATIO_THR +940 0x0450 //TX_MIC1MUTE_AMP_THR +941 0x0008 //TX_MIC1MUTE_CVG_TIME +942 0x0008 //TX_MIC1MUTE_RELEASE_TIME +943 0x0000 //TX_AMS_RESRV_01 +944 0x0000 //TX_AMS_RESRV_02 +945 0x0000 //TX_AMS_RESRV_03 +946 0x0000 //TX_AMS_RESRV_04 +947 0x0000 //TX_AMS_RESRV_05 +948 0x0000 //TX_AMS_RESRV_06 +949 0x0000 //TX_AMS_RESRV_07 +950 0x0000 //TX_AMS_RESRV_08 +951 0x0000 //TX_AMS_RESRV_09 +952 0x0000 //TX_AMS_RESRV_10 +953 0x0000 //TX_AMS_RESRV_11 +954 0x0000 //TX_AMS_RESRV_12 +955 0x0000 //TX_AMS_RESRV_13 +956 0x0000 //TX_AMS_RESRV_14 +957 0x0000 //TX_AMS_RESRV_15 +958 0x0000 //TX_AMS_RESRV_16 +959 0x0000 //TX_AMS_RESRV_17 +960 0x0000 //TX_AMS_RESRV_18 +961 0x0000 //TX_AMS_RESRV_19 #RX -0 0x042C //RX_RECVFUNC_MODE_0 +0 0x242C //RX_RECVFUNC_MODE_0 1 0x0000 //RX_RECVFUNC_MODE_1 2 0x0004 //RX_SAMPLINGFREQ_SIG 3 0x0004 //RX_SAMPLINGFREQ_PROC @@ -6201,25 +9014,25 @@ 30 0x0002 //RX_EXTRA_NS_L 31 0x0800 //RX_EXTRA_NS_A 32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 -33 0x7FFF //RX_TDDRC_LIMITER_THRD +33 0x7220 //RX_TDDRC_LIMITER_THRD 34 0x0800 //RX_TDDRC_LIMITER_GAIN 35 0x199A //RX_A_POST_FLT 36 0x0000 //RX_LMT_THRD 37 0x4000 //RX_LMT_ALPHA 38 0x0020 //RX_FDEQ_SUBNUM -39 0x4852 //RX_FDEQ_GAIN_0 -40 0x5858 //RX_FDEQ_GAIN_1 -41 0x5C5A //RX_FDEQ_GAIN_2 -42 0x4F50 //RX_FDEQ_GAIN_3 -43 0x5A61 //RX_FDEQ_GAIN_4 -44 0x605B //RX_FDEQ_GAIN_5 -45 0x5050 //RX_FDEQ_GAIN_6 -46 0x5050 //RX_FDEQ_GAIN_7 -47 0x5044 //RX_FDEQ_GAIN_8 -48 0x3633 //RX_FDEQ_GAIN_9 -49 0x3424 //RX_FDEQ_GAIN_10 -50 0x1A24 //RX_FDEQ_GAIN_11 -51 0x2B37 //RX_FDEQ_GAIN_12 +39 0x4858 //RX_FDEQ_GAIN_0 +40 0x6265 //RX_FDEQ_GAIN_1 +41 0x6568 //RX_FDEQ_GAIN_2 +42 0x5654 //RX_FDEQ_GAIN_3 +43 0x676E //RX_FDEQ_GAIN_4 +44 0x6E6B //RX_FDEQ_GAIN_5 +45 0x5B5F //RX_FDEQ_GAIN_6 +46 0x5864 //RX_FDEQ_GAIN_7 +47 0x6548 //RX_FDEQ_GAIN_8 +48 0x4848 //RX_FDEQ_GAIN_9 +49 0x4848 //RX_FDEQ_GAIN_10 +50 0x4848 //RX_FDEQ_GAIN_11 +51 0x4848 //RX_FDEQ_GAIN_12 52 0x4848 //RX_FDEQ_GAIN_13 53 0x4848 //RX_FDEQ_GAIN_14 54 0x4848 //RX_FDEQ_GAIN_15 @@ -6282,22 +9095,22 @@ 111 0x0002 //RX_FILTINDX 112 0x0000 //RX_TDDRC_THRD_0 113 0x0000 //RX_TDDRC_THRD_1 -114 0x1200 //RX_TDDRC_THRD_2 -115 0x1900 //RX_TDDRC_THRD_3 -116 0x3000 //RX_TDDRC_SLANT_0 -117 0x6E00 //RX_TDDRC_SLANT_1 +114 0x1800 //RX_TDDRC_THRD_2 +115 0x1800 //RX_TDDRC_THRD_3 +116 0x7FFF //RX_TDDRC_SLANT_0 +117 0x7FFF //RX_TDDRC_SLANT_1 118 0x1000 //RX_TDDRC_ALPHA_UP_0 119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 120 0x0000 //RX_TDDRC_HMNC_FLAG 121 0x199A //RX_TDDRC_HMNC_GAIN 122 0x0001 //RX_TDDRC_SMT_FLAG 123 0x0CCD //RX_TDDRC_SMT_W -124 0x0240 //RX_TDDRC_DRC_GAIN +124 0x0231 //RX_TDDRC_DRC_GAIN 125 0x7C00 //RX_LAMBDA_PKA_FP 126 0x280A //RX_TPKA_FP 127 0x032D //RX_MIN_G_FP 128 0x0A00 //RX_MAX_G_FP -129 0x000A //RX_SPK_VOL +129 0x000B //RX_SPK_VOL 130 0x0000 //RX_VOL_RESRV_0 131 0x0000 //RX_MAXLEVEL_CNG 132 0x3000 //RX_BWE_UV_TH @@ -7018,11 +9831,862 @@ 110 0x0000 //RX_FDDRC_RESRV_0 129 0x0100 //RX_SPK_VOL 130 0x0000 //RX_VOL_RESRV_0 +#RX 2 +157 0x242C //RX_RECVFUNC_MODE_0 +158 0x0000 //RX_RECVFUNC_MODE_1 +159 0x0004 //RX_SAMPLINGFREQ_SIG +160 0x0004 //RX_SAMPLINGFREQ_PROC +161 0x000A //RX_FRAME_SZ +162 0x0000 //RX_DELAY_OPT +163 0x1000 //RX_TDDRC_ALPHA_UP_1 +164 0x1000 //RX_TDDRC_ALPHA_UP_2 +165 0x1000 //RX_TDDRC_ALPHA_UP_3 +166 0x1000 //RX_TDDRC_ALPHA_UP_4 +167 0x0800 //RX_PGA +168 0x7B02 //RX_A_HP +169 0x4000 //RX_B_PE +170 0x7800 //RX_THR_PITCH_DET_0 +171 0x7000 //RX_THR_PITCH_DET_1 +172 0x6000 //RX_THR_PITCH_DET_2 +173 0x0008 //RX_PITCH_BFR_LEN +174 0x0003 //RX_SBD_PITCH_DET +175 0x0100 //RX_PP_RESRV_0 +176 0x0020 //RX_PP_RESRV_1 +177 0x0500 //RX_N_SN_EST +178 0x000C //RX_N2_SN_EST +179 0x000A //RX_NS_LVL_CTRL +180 0xF600 //RX_THR_SN_EST +181 0x7000 //RX_LAMBDA_PFILT +182 0x000A //RX_FENS_RESRV_0 +183 0x0190 //RX_FENS_RESRV_1 +184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +187 0x0002 //RX_EXTRA_NS_L +188 0x0800 //RX_EXTRA_NS_A +189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +190 0x7220 //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +192 0x199A //RX_A_POST_FLT +193 0x0000 //RX_LMT_THRD +194 0x4000 //RX_LMT_ALPHA +195 0x0020 //RX_FDEQ_SUBNUM +196 0x4858 //RX_FDEQ_GAIN_0 +197 0x6265 //RX_FDEQ_GAIN_1 +198 0x6568 //RX_FDEQ_GAIN_2 +199 0x5654 //RX_FDEQ_GAIN_3 +200 0x676E //RX_FDEQ_GAIN_4 +201 0x6E6B //RX_FDEQ_GAIN_5 +202 0x5B5F //RX_FDEQ_GAIN_6 +203 0x5864 //RX_FDEQ_GAIN_7 +204 0x6548 //RX_FDEQ_GAIN_8 +205 0x4848 //RX_FDEQ_GAIN_9 +206 0x4848 //RX_FDEQ_GAIN_10 +207 0x4848 //RX_FDEQ_GAIN_11 +208 0x4848 //RX_FDEQ_GAIN_12 +209 0x4848 //RX_FDEQ_GAIN_13 +210 0x4848 //RX_FDEQ_GAIN_14 +211 0x4848 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0202 //RX_FDEQ_BIN_0 +221 0x0203 //RX_FDEQ_BIN_1 +222 0x0304 //RX_FDEQ_BIN_2 +223 0x0405 //RX_FDEQ_BIN_3 +224 0x0607 //RX_FDEQ_BIN_4 +225 0x0809 //RX_FDEQ_BIN_5 +226 0x0A0B //RX_FDEQ_BIN_6 +227 0x0C0D //RX_FDEQ_BIN_7 +228 0x0E0F //RX_FDEQ_BIN_8 +229 0x1011 //RX_FDEQ_BIN_9 +230 0x1214 //RX_FDEQ_BIN_10 +231 0x1618 //RX_FDEQ_BIN_11 +232 0x1C1C //RX_FDEQ_BIN_12 +233 0x2020 //RX_FDEQ_BIN_13 +234 0x2020 //RX_FDEQ_BIN_14 +235 0x2011 //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x4000 //RX_FDEQ_RESRV_0 +245 0x0320 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0030 //RX_FDDRC_BAND_MARGIN_1 +248 0x0050 //RX_FDDRC_BAND_MARGIN_2 +249 0x0080 //RX_FDDRC_BAND_MARGIN_3 +250 0x0007 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x5000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x6400 //RX_FDDRC_THRD_3_2 +258 0x6400 //RX_FDDRC_THRD_3_3 +259 0x2000 //RX_FDDRC_SLANT_0_0 +260 0x2000 //RX_FDDRC_SLANT_0_1 +261 0x2000 //RX_FDDRC_SLANT_0_2 +262 0x2000 //RX_FDDRC_SLANT_0_3 +263 0x5333 //RX_FDDRC_SLANT_1_0 +264 0x5333 //RX_FDDRC_SLANT_1_1 +265 0x5333 //RX_FDDRC_SLANT_1_2 +266 0x5333 //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +268 0x0002 //RX_FILTINDX +269 0x0000 //RX_TDDRC_THRD_0 +270 0x0000 //RX_TDDRC_THRD_1 +271 0x1800 //RX_TDDRC_THRD_2 +272 0x1800 //RX_TDDRC_THRD_3 +273 0x7FFF //RX_TDDRC_SLANT_0 +274 0x7FFF //RX_TDDRC_SLANT_1 +275 0x1000 //RX_TDDRC_ALPHA_UP_0 +276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x199A //RX_TDDRC_HMNC_GAIN +279 0x0001 //RX_TDDRC_SMT_FLAG +280 0x0CCD //RX_TDDRC_SMT_W +281 0x0231 //RX_TDDRC_DRC_GAIN +282 0x7C00 //RX_LAMBDA_PKA_FP +283 0x280A //RX_TPKA_FP +284 0x032D //RX_MIN_G_FP +285 0x0A00 //RX_MAX_G_FP +286 0x000B //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 +288 0x0000 //RX_MAXLEVEL_CNG +289 0x3000 //RX_BWE_UV_TH +290 0x3000 //RX_BWE_UV_TH2 +291 0x1800 //RX_BWE_UV_TH3 +292 0x1000 //RX_BWE_V_TH +293 0x04CD //RX_BWE_GAIN1_V_TH1 +294 0x0F33 //RX_BWE_GAIN1_V_TH2 +295 0x7333 //RX_BWE_UV_EQ +296 0x199A //RX_BWE_V_EQ +297 0x7333 //RX_BWE_TONE_TH +298 0x0004 //RX_BWE_UV_HOLD_T +299 0x6CCD //RX_BWE_GAIN2_ALPHA +300 0x799A //RX_BWE_GAIN3_ALPHA +301 0x001E //RX_BWE_CUTOFF +302 0x3000 //RX_BWE_GAINFILL +303 0x3200 //RX_BWE_MAXTH_TONE +304 0x2000 //RX_BWE_EQ_0 +305 0x2000 //RX_BWE_EQ_1 +306 0x2000 //RX_BWE_EQ_2 +307 0x2000 //RX_BWE_EQ_3 +308 0x2000 //RX_BWE_EQ_4 +309 0x2000 //RX_BWE_EQ_5 +310 0x2000 //RX_BWE_EQ_6 +311 0x0000 //RX_BWE_RESRV_0 +312 0x0000 //RX_BWE_RESRV_1 +313 0x0000 //RX_BWE_RESRV_2 +#VOL 0 +163 0x1000 //RX_TDDRC_ALPHA_UP_1 +164 0x1000 //RX_TDDRC_ALPHA_UP_2 +165 0x1000 //RX_TDDRC_ALPHA_UP_3 +166 0x1000 //RX_TDDRC_ALPHA_UP_4 +184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +190 0x7220 //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +269 0x0000 //RX_TDDRC_THRD_0 +270 0x0000 //RX_TDDRC_THRD_1 +271 0x1800 //RX_TDDRC_THRD_2 +272 0x1800 //RX_TDDRC_THRD_3 +273 0x7FFF //RX_TDDRC_SLANT_0 +274 0x7FFF //RX_TDDRC_SLANT_1 +275 0x1000 //RX_TDDRC_ALPHA_UP_0 +276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x199A //RX_TDDRC_HMNC_GAIN +279 0x0001 //RX_TDDRC_SMT_FLAG +280 0x0CCD //RX_TDDRC_SMT_W +281 0x0231 //RX_TDDRC_DRC_GAIN +195 0x0020 //RX_FDEQ_SUBNUM +196 0x4858 //RX_FDEQ_GAIN_0 +197 0x6265 //RX_FDEQ_GAIN_1 +198 0x6568 //RX_FDEQ_GAIN_2 +199 0x5654 //RX_FDEQ_GAIN_3 +200 0x676E //RX_FDEQ_GAIN_4 +201 0x6E6B //RX_FDEQ_GAIN_5 +202 0x5B5F //RX_FDEQ_GAIN_6 +203 0x5864 //RX_FDEQ_GAIN_7 +204 0x6548 //RX_FDEQ_GAIN_8 +205 0x4848 //RX_FDEQ_GAIN_9 +206 0x4848 //RX_FDEQ_GAIN_10 +207 0x4848 //RX_FDEQ_GAIN_11 +208 0x4848 //RX_FDEQ_GAIN_12 +209 0x4848 //RX_FDEQ_GAIN_13 +210 0x4848 //RX_FDEQ_GAIN_14 +211 0x4848 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0202 //RX_FDEQ_BIN_0 +221 0x0203 //RX_FDEQ_BIN_1 +222 0x0304 //RX_FDEQ_BIN_2 +223 0x0405 //RX_FDEQ_BIN_3 +224 0x0607 //RX_FDEQ_BIN_4 +225 0x0809 //RX_FDEQ_BIN_5 +226 0x0A0B //RX_FDEQ_BIN_6 +227 0x0C0D //RX_FDEQ_BIN_7 +228 0x0E0F //RX_FDEQ_BIN_8 +229 0x1011 //RX_FDEQ_BIN_9 +230 0x1214 //RX_FDEQ_BIN_10 +231 0x1618 //RX_FDEQ_BIN_11 +232 0x1C1C //RX_FDEQ_BIN_12 +233 0x2020 //RX_FDEQ_BIN_13 +234 0x2020 //RX_FDEQ_BIN_14 +235 0x2011 //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x4000 //RX_FDEQ_RESRV_0 +245 0x0320 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0030 //RX_FDDRC_BAND_MARGIN_1 +248 0x0050 //RX_FDDRC_BAND_MARGIN_2 +249 0x0080 //RX_FDDRC_BAND_MARGIN_3 +250 0x0007 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x5000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x6400 //RX_FDDRC_THRD_3_2 +258 0x6400 //RX_FDDRC_THRD_3_3 +259 0x2000 //RX_FDDRC_SLANT_0_0 +260 0x2000 //RX_FDDRC_SLANT_0_1 +261 0x2000 //RX_FDDRC_SLANT_0_2 +262 0x2000 //RX_FDDRC_SLANT_0_3 +263 0x5333 //RX_FDDRC_SLANT_1_0 +264 0x5333 //RX_FDDRC_SLANT_1_1 +265 0x5333 //RX_FDDRC_SLANT_1_2 +266 0x5333 //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +286 0x000B //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 +#VOL 1 +163 0x1000 //RX_TDDRC_ALPHA_UP_1 +164 0x1000 //RX_TDDRC_ALPHA_UP_2 +165 0x1000 //RX_TDDRC_ALPHA_UP_3 +166 0x1000 //RX_TDDRC_ALPHA_UP_4 +184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +190 0x7220 //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +269 0x0000 //RX_TDDRC_THRD_0 +270 0x0000 //RX_TDDRC_THRD_1 +271 0x1800 //RX_TDDRC_THRD_2 +272 0x1800 //RX_TDDRC_THRD_3 +273 0x7FFF //RX_TDDRC_SLANT_0 +274 0x7FFF //RX_TDDRC_SLANT_1 +275 0x1000 //RX_TDDRC_ALPHA_UP_0 +276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x199A //RX_TDDRC_HMNC_GAIN +279 0x0001 //RX_TDDRC_SMT_FLAG +280 0x0CCD //RX_TDDRC_SMT_W +281 0x0231 //RX_TDDRC_DRC_GAIN +195 0x0020 //RX_FDEQ_SUBNUM +196 0x4858 //RX_FDEQ_GAIN_0 +197 0x6265 //RX_FDEQ_GAIN_1 +198 0x6568 //RX_FDEQ_GAIN_2 +199 0x5654 //RX_FDEQ_GAIN_3 +200 0x676E //RX_FDEQ_GAIN_4 +201 0x6E6B //RX_FDEQ_GAIN_5 +202 0x5B5F //RX_FDEQ_GAIN_6 +203 0x5864 //RX_FDEQ_GAIN_7 +204 0x6548 //RX_FDEQ_GAIN_8 +205 0x4848 //RX_FDEQ_GAIN_9 +206 0x4848 //RX_FDEQ_GAIN_10 +207 0x4848 //RX_FDEQ_GAIN_11 +208 0x4848 //RX_FDEQ_GAIN_12 +209 0x4848 //RX_FDEQ_GAIN_13 +210 0x4848 //RX_FDEQ_GAIN_14 +211 0x4848 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0202 //RX_FDEQ_BIN_0 +221 0x0203 //RX_FDEQ_BIN_1 +222 0x0304 //RX_FDEQ_BIN_2 +223 0x0405 //RX_FDEQ_BIN_3 +224 0x0607 //RX_FDEQ_BIN_4 +225 0x0809 //RX_FDEQ_BIN_5 +226 0x0A0B //RX_FDEQ_BIN_6 +227 0x0C0D //RX_FDEQ_BIN_7 +228 0x0E0F //RX_FDEQ_BIN_8 +229 0x1011 //RX_FDEQ_BIN_9 +230 0x1214 //RX_FDEQ_BIN_10 +231 0x1618 //RX_FDEQ_BIN_11 +232 0x1C1C //RX_FDEQ_BIN_12 +233 0x2020 //RX_FDEQ_BIN_13 +234 0x2020 //RX_FDEQ_BIN_14 +235 0x2011 //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x4000 //RX_FDEQ_RESRV_0 +245 0x0320 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0030 //RX_FDDRC_BAND_MARGIN_1 +248 0x0050 //RX_FDDRC_BAND_MARGIN_2 +249 0x0080 //RX_FDDRC_BAND_MARGIN_3 +250 0x0007 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x5000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x6400 //RX_FDDRC_THRD_3_2 +258 0x6400 //RX_FDDRC_THRD_3_3 +259 0x2000 //RX_FDDRC_SLANT_0_0 +260 0x2000 //RX_FDDRC_SLANT_0_1 +261 0x2000 //RX_FDDRC_SLANT_0_2 +262 0x2000 //RX_FDDRC_SLANT_0_3 +263 0x5333 //RX_FDDRC_SLANT_1_0 +264 0x5333 //RX_FDDRC_SLANT_1_1 +265 0x5333 //RX_FDDRC_SLANT_1_2 +266 0x5333 //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +286 0x0012 //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 +#VOL 2 +163 0x1000 //RX_TDDRC_ALPHA_UP_1 +164 0x1000 //RX_TDDRC_ALPHA_UP_2 +165 0x1000 //RX_TDDRC_ALPHA_UP_3 +166 0x1000 //RX_TDDRC_ALPHA_UP_4 +184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +190 0x7220 //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +269 0x0000 //RX_TDDRC_THRD_0 +270 0x0000 //RX_TDDRC_THRD_1 +271 0x1800 //RX_TDDRC_THRD_2 +272 0x1800 //RX_TDDRC_THRD_3 +273 0x7FFF //RX_TDDRC_SLANT_0 +274 0x7FFF //RX_TDDRC_SLANT_1 +275 0x1000 //RX_TDDRC_ALPHA_UP_0 +276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x199A //RX_TDDRC_HMNC_GAIN +279 0x0001 //RX_TDDRC_SMT_FLAG +280 0x0CCD //RX_TDDRC_SMT_W +281 0x0231 //RX_TDDRC_DRC_GAIN +195 0x0020 //RX_FDEQ_SUBNUM +196 0x4858 //RX_FDEQ_GAIN_0 +197 0x6265 //RX_FDEQ_GAIN_1 +198 0x6568 //RX_FDEQ_GAIN_2 +199 0x5654 //RX_FDEQ_GAIN_3 +200 0x676E //RX_FDEQ_GAIN_4 +201 0x6E6B //RX_FDEQ_GAIN_5 +202 0x5B5F //RX_FDEQ_GAIN_6 +203 0x5864 //RX_FDEQ_GAIN_7 +204 0x6548 //RX_FDEQ_GAIN_8 +205 0x4848 //RX_FDEQ_GAIN_9 +206 0x4848 //RX_FDEQ_GAIN_10 +207 0x4848 //RX_FDEQ_GAIN_11 +208 0x4848 //RX_FDEQ_GAIN_12 +209 0x4848 //RX_FDEQ_GAIN_13 +210 0x4848 //RX_FDEQ_GAIN_14 +211 0x4848 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0202 //RX_FDEQ_BIN_0 +221 0x0203 //RX_FDEQ_BIN_1 +222 0x0304 //RX_FDEQ_BIN_2 +223 0x0405 //RX_FDEQ_BIN_3 +224 0x0607 //RX_FDEQ_BIN_4 +225 0x0809 //RX_FDEQ_BIN_5 +226 0x0A0B //RX_FDEQ_BIN_6 +227 0x0C0D //RX_FDEQ_BIN_7 +228 0x0E0F //RX_FDEQ_BIN_8 +229 0x1011 //RX_FDEQ_BIN_9 +230 0x1214 //RX_FDEQ_BIN_10 +231 0x1618 //RX_FDEQ_BIN_11 +232 0x1C1C //RX_FDEQ_BIN_12 +233 0x2020 //RX_FDEQ_BIN_13 +234 0x2020 //RX_FDEQ_BIN_14 +235 0x2011 //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x4000 //RX_FDEQ_RESRV_0 +245 0x0320 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0030 //RX_FDDRC_BAND_MARGIN_1 +248 0x0050 //RX_FDDRC_BAND_MARGIN_2 +249 0x0080 //RX_FDDRC_BAND_MARGIN_3 +250 0x0007 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x5000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x6400 //RX_FDDRC_THRD_3_2 +258 0x6400 //RX_FDDRC_THRD_3_3 +259 0x2000 //RX_FDDRC_SLANT_0_0 +260 0x2000 //RX_FDDRC_SLANT_0_1 +261 0x2000 //RX_FDDRC_SLANT_0_2 +262 0x2000 //RX_FDDRC_SLANT_0_3 +263 0x5333 //RX_FDDRC_SLANT_1_0 +264 0x5333 //RX_FDDRC_SLANT_1_1 +265 0x5333 //RX_FDDRC_SLANT_1_2 +266 0x5333 //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +286 0x001F //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 +#VOL 3 +163 0x1000 //RX_TDDRC_ALPHA_UP_1 +164 0x1000 //RX_TDDRC_ALPHA_UP_2 +165 0x1000 //RX_TDDRC_ALPHA_UP_3 +166 0x1000 //RX_TDDRC_ALPHA_UP_4 +184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +190 0x7220 //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +269 0x0000 //RX_TDDRC_THRD_0 +270 0x0000 //RX_TDDRC_THRD_1 +271 0x1800 //RX_TDDRC_THRD_2 +272 0x1800 //RX_TDDRC_THRD_3 +273 0x7FFF //RX_TDDRC_SLANT_0 +274 0x7FFF //RX_TDDRC_SLANT_1 +275 0x1000 //RX_TDDRC_ALPHA_UP_0 +276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x199A //RX_TDDRC_HMNC_GAIN +279 0x0001 //RX_TDDRC_SMT_FLAG +280 0x0CCD //RX_TDDRC_SMT_W +281 0x0231 //RX_TDDRC_DRC_GAIN +195 0x0020 //RX_FDEQ_SUBNUM +196 0x4858 //RX_FDEQ_GAIN_0 +197 0x6265 //RX_FDEQ_GAIN_1 +198 0x6568 //RX_FDEQ_GAIN_2 +199 0x5654 //RX_FDEQ_GAIN_3 +200 0x676E //RX_FDEQ_GAIN_4 +201 0x6E6B //RX_FDEQ_GAIN_5 +202 0x5B5F //RX_FDEQ_GAIN_6 +203 0x5864 //RX_FDEQ_GAIN_7 +204 0x6548 //RX_FDEQ_GAIN_8 +205 0x4848 //RX_FDEQ_GAIN_9 +206 0x4848 //RX_FDEQ_GAIN_10 +207 0x4848 //RX_FDEQ_GAIN_11 +208 0x4848 //RX_FDEQ_GAIN_12 +209 0x4848 //RX_FDEQ_GAIN_13 +210 0x4848 //RX_FDEQ_GAIN_14 +211 0x4848 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0202 //RX_FDEQ_BIN_0 +221 0x0203 //RX_FDEQ_BIN_1 +222 0x0304 //RX_FDEQ_BIN_2 +223 0x0405 //RX_FDEQ_BIN_3 +224 0x0607 //RX_FDEQ_BIN_4 +225 0x0809 //RX_FDEQ_BIN_5 +226 0x0A0B //RX_FDEQ_BIN_6 +227 0x0C0D //RX_FDEQ_BIN_7 +228 0x0E0F //RX_FDEQ_BIN_8 +229 0x1011 //RX_FDEQ_BIN_9 +230 0x1214 //RX_FDEQ_BIN_10 +231 0x1618 //RX_FDEQ_BIN_11 +232 0x1C1C //RX_FDEQ_BIN_12 +233 0x2020 //RX_FDEQ_BIN_13 +234 0x2020 //RX_FDEQ_BIN_14 +235 0x2011 //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x4000 //RX_FDEQ_RESRV_0 +245 0x0320 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0030 //RX_FDDRC_BAND_MARGIN_1 +248 0x0050 //RX_FDDRC_BAND_MARGIN_2 +249 0x0080 //RX_FDDRC_BAND_MARGIN_3 +250 0x0007 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x5000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x6400 //RX_FDDRC_THRD_3_2 +258 0x6400 //RX_FDDRC_THRD_3_3 +259 0x2000 //RX_FDDRC_SLANT_0_0 +260 0x2000 //RX_FDDRC_SLANT_0_1 +261 0x2000 //RX_FDDRC_SLANT_0_2 +262 0x2000 //RX_FDDRC_SLANT_0_3 +263 0x5333 //RX_FDDRC_SLANT_1_0 +264 0x5333 //RX_FDDRC_SLANT_1_1 +265 0x5333 //RX_FDDRC_SLANT_1_2 +266 0x5333 //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +286 0x0034 //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 +#VOL 4 +163 0x1000 //RX_TDDRC_ALPHA_UP_1 +164 0x1000 //RX_TDDRC_ALPHA_UP_2 +165 0x1000 //RX_TDDRC_ALPHA_UP_3 +166 0x1000 //RX_TDDRC_ALPHA_UP_4 +184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +190 0x7220 //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +269 0x0000 //RX_TDDRC_THRD_0 +270 0x0000 //RX_TDDRC_THRD_1 +271 0x1800 //RX_TDDRC_THRD_2 +272 0x1800 //RX_TDDRC_THRD_3 +273 0x7FFF //RX_TDDRC_SLANT_0 +274 0x7FFF //RX_TDDRC_SLANT_1 +275 0x1000 //RX_TDDRC_ALPHA_UP_0 +276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x199A //RX_TDDRC_HMNC_GAIN +279 0x0001 //RX_TDDRC_SMT_FLAG +280 0x0CCD //RX_TDDRC_SMT_W +281 0x0231 //RX_TDDRC_DRC_GAIN +195 0x0020 //RX_FDEQ_SUBNUM +196 0x4858 //RX_FDEQ_GAIN_0 +197 0x6265 //RX_FDEQ_GAIN_1 +198 0x6568 //RX_FDEQ_GAIN_2 +199 0x5654 //RX_FDEQ_GAIN_3 +200 0x676E //RX_FDEQ_GAIN_4 +201 0x6E6B //RX_FDEQ_GAIN_5 +202 0x5B5F //RX_FDEQ_GAIN_6 +203 0x5864 //RX_FDEQ_GAIN_7 +204 0x6548 //RX_FDEQ_GAIN_8 +205 0x4848 //RX_FDEQ_GAIN_9 +206 0x4848 //RX_FDEQ_GAIN_10 +207 0x4848 //RX_FDEQ_GAIN_11 +208 0x4848 //RX_FDEQ_GAIN_12 +209 0x4848 //RX_FDEQ_GAIN_13 +210 0x4848 //RX_FDEQ_GAIN_14 +211 0x4848 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0202 //RX_FDEQ_BIN_0 +221 0x0203 //RX_FDEQ_BIN_1 +222 0x0304 //RX_FDEQ_BIN_2 +223 0x0405 //RX_FDEQ_BIN_3 +224 0x0607 //RX_FDEQ_BIN_4 +225 0x0809 //RX_FDEQ_BIN_5 +226 0x0A0B //RX_FDEQ_BIN_6 +227 0x0C0D //RX_FDEQ_BIN_7 +228 0x0E0F //RX_FDEQ_BIN_8 +229 0x1011 //RX_FDEQ_BIN_9 +230 0x1214 //RX_FDEQ_BIN_10 +231 0x1618 //RX_FDEQ_BIN_11 +232 0x1C1C //RX_FDEQ_BIN_12 +233 0x2020 //RX_FDEQ_BIN_13 +234 0x2020 //RX_FDEQ_BIN_14 +235 0x2011 //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x4000 //RX_FDEQ_RESRV_0 +245 0x0320 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0030 //RX_FDDRC_BAND_MARGIN_1 +248 0x0050 //RX_FDDRC_BAND_MARGIN_2 +249 0x0080 //RX_FDDRC_BAND_MARGIN_3 +250 0x0007 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x5000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x6400 //RX_FDDRC_THRD_3_2 +258 0x6400 //RX_FDDRC_THRD_3_3 +259 0x2000 //RX_FDDRC_SLANT_0_0 +260 0x2000 //RX_FDDRC_SLANT_0_1 +261 0x2000 //RX_FDDRC_SLANT_0_2 +262 0x2000 //RX_FDDRC_SLANT_0_3 +263 0x5333 //RX_FDDRC_SLANT_1_0 +264 0x5333 //RX_FDDRC_SLANT_1_1 +265 0x5333 //RX_FDDRC_SLANT_1_2 +266 0x5333 //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +286 0x0056 //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 +#VOL 5 +163 0x1000 //RX_TDDRC_ALPHA_UP_1 +164 0x1000 //RX_TDDRC_ALPHA_UP_2 +165 0x1000 //RX_TDDRC_ALPHA_UP_3 +166 0x1000 //RX_TDDRC_ALPHA_UP_4 +184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +190 0x7220 //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +269 0x0000 //RX_TDDRC_THRD_0 +270 0x0000 //RX_TDDRC_THRD_1 +271 0x1800 //RX_TDDRC_THRD_2 +272 0x1800 //RX_TDDRC_THRD_3 +273 0x7FFF //RX_TDDRC_SLANT_0 +274 0x7FFF //RX_TDDRC_SLANT_1 +275 0x1000 //RX_TDDRC_ALPHA_UP_0 +276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x199A //RX_TDDRC_HMNC_GAIN +279 0x0001 //RX_TDDRC_SMT_FLAG +280 0x0CCD //RX_TDDRC_SMT_W +281 0x0231 //RX_TDDRC_DRC_GAIN +195 0x0020 //RX_FDEQ_SUBNUM +196 0x4858 //RX_FDEQ_GAIN_0 +197 0x6265 //RX_FDEQ_GAIN_1 +198 0x6568 //RX_FDEQ_GAIN_2 +199 0x5654 //RX_FDEQ_GAIN_3 +200 0x676E //RX_FDEQ_GAIN_4 +201 0x6E6B //RX_FDEQ_GAIN_5 +202 0x5B5F //RX_FDEQ_GAIN_6 +203 0x5864 //RX_FDEQ_GAIN_7 +204 0x6548 //RX_FDEQ_GAIN_8 +205 0x4848 //RX_FDEQ_GAIN_9 +206 0x4848 //RX_FDEQ_GAIN_10 +207 0x4848 //RX_FDEQ_GAIN_11 +208 0x4848 //RX_FDEQ_GAIN_12 +209 0x4848 //RX_FDEQ_GAIN_13 +210 0x4848 //RX_FDEQ_GAIN_14 +211 0x4848 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0202 //RX_FDEQ_BIN_0 +221 0x0203 //RX_FDEQ_BIN_1 +222 0x0304 //RX_FDEQ_BIN_2 +223 0x0405 //RX_FDEQ_BIN_3 +224 0x0607 //RX_FDEQ_BIN_4 +225 0x0809 //RX_FDEQ_BIN_5 +226 0x0A0B //RX_FDEQ_BIN_6 +227 0x0C0D //RX_FDEQ_BIN_7 +228 0x0E0F //RX_FDEQ_BIN_8 +229 0x1011 //RX_FDEQ_BIN_9 +230 0x1214 //RX_FDEQ_BIN_10 +231 0x1618 //RX_FDEQ_BIN_11 +232 0x1C1C //RX_FDEQ_BIN_12 +233 0x2020 //RX_FDEQ_BIN_13 +234 0x2020 //RX_FDEQ_BIN_14 +235 0x2011 //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x4000 //RX_FDEQ_RESRV_0 +245 0x0320 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0030 //RX_FDDRC_BAND_MARGIN_1 +248 0x0050 //RX_FDDRC_BAND_MARGIN_2 +249 0x0080 //RX_FDDRC_BAND_MARGIN_3 +250 0x0007 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x5000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x6400 //RX_FDDRC_THRD_3_2 +258 0x6400 //RX_FDDRC_THRD_3_3 +259 0x2000 //RX_FDDRC_SLANT_0_0 +260 0x2000 //RX_FDDRC_SLANT_0_1 +261 0x2000 //RX_FDDRC_SLANT_0_2 +262 0x2000 //RX_FDDRC_SLANT_0_3 +263 0x5333 //RX_FDDRC_SLANT_1_0 +264 0x5333 //RX_FDDRC_SLANT_1_1 +265 0x5333 //RX_FDDRC_SLANT_1_2 +266 0x5333 //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +286 0x0090 //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 +#VOL 6 +163 0x1000 //RX_TDDRC_ALPHA_UP_1 +164 0x1000 //RX_TDDRC_ALPHA_UP_2 +165 0x1000 //RX_TDDRC_ALPHA_UP_3 +166 0x1000 //RX_TDDRC_ALPHA_UP_4 +184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +190 0x7220 //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +269 0x0000 //RX_TDDRC_THRD_0 +270 0x0000 //RX_TDDRC_THRD_1 +271 0x1800 //RX_TDDRC_THRD_2 +272 0x1800 //RX_TDDRC_THRD_3 +273 0x7FFF //RX_TDDRC_SLANT_0 +274 0x7FFF //RX_TDDRC_SLANT_1 +275 0x1000 //RX_TDDRC_ALPHA_UP_0 +276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x199A //RX_TDDRC_HMNC_GAIN +279 0x0001 //RX_TDDRC_SMT_FLAG +280 0x0CCD //RX_TDDRC_SMT_W +281 0x0231 //RX_TDDRC_DRC_GAIN +195 0x0020 //RX_FDEQ_SUBNUM +196 0x4858 //RX_FDEQ_GAIN_0 +197 0x6265 //RX_FDEQ_GAIN_1 +198 0x6568 //RX_FDEQ_GAIN_2 +199 0x5654 //RX_FDEQ_GAIN_3 +200 0x676E //RX_FDEQ_GAIN_4 +201 0x6E6B //RX_FDEQ_GAIN_5 +202 0x5B5F //RX_FDEQ_GAIN_6 +203 0x5864 //RX_FDEQ_GAIN_7 +204 0x6548 //RX_FDEQ_GAIN_8 +205 0x4848 //RX_FDEQ_GAIN_9 +206 0x4848 //RX_FDEQ_GAIN_10 +207 0x4848 //RX_FDEQ_GAIN_11 +208 0x4848 //RX_FDEQ_GAIN_12 +209 0x4848 //RX_FDEQ_GAIN_13 +210 0x4848 //RX_FDEQ_GAIN_14 +211 0x4848 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0202 //RX_FDEQ_BIN_0 +221 0x0203 //RX_FDEQ_BIN_1 +222 0x0304 //RX_FDEQ_BIN_2 +223 0x0405 //RX_FDEQ_BIN_3 +224 0x0607 //RX_FDEQ_BIN_4 +225 0x0809 //RX_FDEQ_BIN_5 +226 0x0A0B //RX_FDEQ_BIN_6 +227 0x0C0D //RX_FDEQ_BIN_7 +228 0x0E0F //RX_FDEQ_BIN_8 +229 0x1011 //RX_FDEQ_BIN_9 +230 0x1214 //RX_FDEQ_BIN_10 +231 0x1618 //RX_FDEQ_BIN_11 +232 0x1C1C //RX_FDEQ_BIN_12 +233 0x2020 //RX_FDEQ_BIN_13 +234 0x2020 //RX_FDEQ_BIN_14 +235 0x2011 //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x4000 //RX_FDEQ_RESRV_0 +245 0x0320 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0030 //RX_FDDRC_BAND_MARGIN_1 +248 0x0050 //RX_FDDRC_BAND_MARGIN_2 +249 0x0080 //RX_FDDRC_BAND_MARGIN_3 +250 0x0007 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x5000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x6400 //RX_FDDRC_THRD_3_2 +258 0x6400 //RX_FDDRC_THRD_3_3 +259 0x2000 //RX_FDDRC_SLANT_0_0 +260 0x2000 //RX_FDDRC_SLANT_0_1 +261 0x2000 //RX_FDDRC_SLANT_0_2 +262 0x2000 //RX_FDDRC_SLANT_0_3 +263 0x5333 //RX_FDDRC_SLANT_1_0 +264 0x5333 //RX_FDDRC_SLANT_1_1 +265 0x5333 //RX_FDDRC_SLANT_1_2 +266 0x5333 //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +286 0x0100 //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 #CASE_NAME HEADSET-GOOGLE_CONDOR-VOICE_GENERIC-NB -#PARAM_MODE FULL -#PARAM_TYPE TX+RX -#TOTAL_CUSTOM_STEP 7 +#PARAM_MODE Full +#PARAM_TYPE TX+2RX +#TOTAL_CUSTOM_STEP 7+7 #TX 0 0x0009 //TX_OPERATION_MODE_0 1 0x0008 //TX_OPERATION_MODE_1 @@ -7339,20 +11003,20 @@ 312 0x7FFF //TX_A_POST_FILT_0 313 0x2000 //TX_A_POST_FILT_1 314 0x4000 //TX_A_POST_FILT_S_0 -315 0x4000 //TX_A_POST_FILT_S_1 -316 0x1000 //TX_A_POST_FILT_S_2 +315 0x1000 //TX_A_POST_FILT_S_1 +316 0x4000 //TX_A_POST_FILT_S_2 317 0x4000 //TX_A_POST_FILT_S_3 318 0x4000 //TX_A_POST_FILT_S_4 319 0x4000 //TX_A_POST_FILT_S_5 320 0x4000 //TX_A_POST_FILT_S_6 321 0x4000 //TX_A_POST_FILT_S_7 322 0x0400 //TX_B_POST_FILT_0 -323 0x0400 //TX_B_POST_FILT_1 +323 0x2000 //TX_B_POST_FILT_1 324 0x2000 //TX_B_POST_FILT_2 325 0x2000 //TX_B_POST_FILT_3 326 0x2000 //TX_B_POST_FILT_4 327 0x2000 //TX_B_POST_FILT_5 -328 0x2000 //TX_B_POST_FILT_6 +328 0x0400 //TX_B_POST_FILT_6 329 0x2000 //TX_B_POST_FILT_7 330 0x7FFF //TX_B_LESSCUT_RTO_S_0 331 0x7FFF //TX_B_LESSCUT_RTO_S_1 @@ -7391,7 +11055,7 @@ 364 0x0000 //TX_K_APT 365 0x0001 //TX_NOISEDET 366 0x0190 //TX_NDETCT -367 0x000A //TX_NOISE_TH_0 +367 0x003B //TX_NOISE_TH_0 368 0x1B58 //TX_NOISE_TH_0_2 369 0x2134 //TX_NOISE_TH_0_3 370 0x02BC //TX_NOISE_TH_1 @@ -7403,11 +11067,11 @@ 376 0x0000 //TX_NOISE_TH_5_3 377 0x0000 //TX_NOISE_TH_5_4 378 0x0032 //TX_NOISE_TH_6 -379 0x0014 //TX_MINENOISE_TH -380 0x4000 //TX_MINENOISE_MIC0_TH_MTS -381 0xFFEE //TX_MINENOISE_MIC0_TH_EXP -382 0x6000 //TX_MINENOISE_MIC0_S_TH_MTS -383 0xFFF3 //TX_MINENOISE_MIC0_S_TH_EXP +379 0x00C8 //TX_MINENOISE_TH +380 0xD508 //TX_MORENS_TFMASK_TH +381 0x0001 //TX_DRC_QUIET_FLOOR +382 0x3A98 //TX_RATIODTL_CUT_TH +383 0x0DAC //TX_DT_CUT_K1 384 0x00A5 //TX_OUT_ENER_S_TH_CLEAN 385 0x00A5 //TX_OUT_ENER_S_TH_LESSCLEAN 386 0x00A5 //TX_OUT_ENER_S_TH_NOISY @@ -7415,22 +11079,22 @@ 388 0x00CE //TX_OUT_ENER_TH_SPEECH 389 0x2000 //TX_SN_NPB_GAIN 390 0x0000 //TX_NN_NPB_GAIN -391 0x0000 //TX_CSX_ALPHA_0 -392 0x0000 //TX_CSX_ALPHA_1 -393 0x0000 //TX_CSX_ALPHA_2 -394 0x0000 //TX_CSX_ALPHA_3 -395 0x0800 //TX_MU_ARSP_EST -396 0x00C8 //TX_P_OUTBEAM_MIN_TH +391 0x7FFF //TX_POST_MASK_SUP_HSNE +392 0x1388 //TX_TAIL_DET_TH +393 0x4000 //TX_B_LESSCUT_RTO_WTA +394 0x0000 //TX_MEL_G_R +395 0x0080 //TX_SUPHIGH_TH +396 0x0000 //TX_MASK_G_R 397 0x0002 //TX_EXTRA_NS_L -398 0x0800 //TX_EXTRA_NS_A -399 0x0005 //TX_VR_NOISE_FLOOR_TH +398 0x1800 //TX_C_POST_FLT_MASK +399 0x7FFF //TX_A_POST_FLT_WNS 400 0x0148 //TX_MIN_G_LOW300HZ 401 0x0002 //TX_MAXLEVEL_CNG 402 0x00B4 //TX_STN_NOISE_TH 403 0x4000 //TX_POST_MASK_SUP 404 0x7FFF //TX_POST_MASK_ADJUST 405 0x00C8 //TX_NS_ENOISE_MIC0_TH -406 0x0014 //TX_MINENOISE_MIC0_TH +406 0x0032 //TX_MINENOISE_MIC0_TH 407 0x012C //TX_MINENOISE_MIC0_S_TH 408 0x7FFF //TX_MIN_G_CTRL_SSNS 409 0x0000 //TX_METAL_RTO_THR @@ -7538,16 +11202,16 @@ 511 0x6666 //TX_MIC_TO_BFGAIN 512 0x0000 //TX_MICTOBFGAIN0 513 0x0000 //TX_FASTMUE_TH -514 0x0000 //TX_DERVB_LEN_0 -515 0x0000 //TX_DERVB_LEN_1 -516 0x0000 //TX_RHO_DERVB -517 0x0000 //TX_MIC_INDX_DERVB -518 0x0000 //TX_MU_DERVB -519 0x0000 //TX_DR_RESRV_0 -520 0x0000 //TX_DR_RESRV_1 -521 0x0000 //TX_DR_RESRV_2 -522 0x0000 //TX_DR_RESRV_3 -523 0x0000 //TX_DR_RESRV_4 +514 0xC000 //TX_DEREVERB_LF_MU +515 0xC000 //TX_DEREVERB_HF_MU +516 0xCCCC //TX_DEREVERB_DELAY +517 0xD999 //TX_DEREVERB_COEF_LEN +518 0x1F40 //TX_DEREVERB_DNR +519 0x0000 //TX_DEREVERB_ALPHA +520 0x0000 //TX_DEREVERB_BETA +521 0x0000 //TX_GSC_RTOL_TH +522 0x7000 //TX_GSC_RTOH_TH +523 0x0064 //TX_WIDE2_MEANHTH 524 0x0000 //TX_DR_RESRV_5 525 0x0000 //TX_DR_RESRV_6 526 0x0000 //TX_DR_RESRV_7 @@ -7915,14 +11579,79 @@ 888 0x00C8 //TX_FASTNS_ARSPC_TH 889 0xC000 //TX_FASTNS_MASK5_TH 890 0x4848 //TX_POSTSSA_MIN_G_VR_MASK -891 0x7FFF //TX_A_LESSCUT_RTO_MASK +891 0x4000 //TX_A_LESSCUT_RTO_MASK 892 0x1770 //TX_FASTNS_NOISETH 893 0xC000 //TX_FASTNS_SSA_THLFL 894 0xC000 //TX_FASTNS_SSA_THHFL 895 0xCCCC //TX_FASTNS_SSA_THLFH 896 0xD999 //TX_FASTNS_SSA_THHFH +897 0x2339 //TX_SENDFUNC_REG_MICMUTE +898 0x0021 //TX_SENDFUNC_REG_MICMUTE1 +899 0x02BC //TX_MICMUTE_RATIO_THR +900 0x0140 //TX_MICMUTE_AMP_THR +901 0x0004 //TX_MICMUTE_HPF_IND +902 0x00C0 //TX_MICMUTE_LOG_EYR_TH +903 0x0008 //TX_MICMUTE_CVG_TIME +904 0x0008 //TX_MICMUTE_RELEASE_TIME +905 0x01FE //TX_MIC_VOLUME_MIC0MUTE +906 0x0020 //TX_MICMUTE_EPD_OFFSET_0 +907 0x001E //TX_MICMUTE_FRQ_AEC_L +908 0x7999 //TX_MICMUTE_EAD_THR +909 0x7FFF //TX_MICMUTE_LAMBDA_CB_NLE +910 0x7FFF //TX_MICMUTE_LAMBDA_RE_EST +911 0x4000 //TX_DTD_THR1_MICMUTE_0 +912 0x7000 //TX_DTD_THR1_MICMUTE_1 +913 0x7FFF //TX_DTD_THR1_MICMUTE_2 +914 0x7FFF //TX_DTD_THR1_MICMUTE_3 +915 0x6CCC //TX_DTD_THR2_MICMUTE_0 +916 0x0400 //TX_MICMUTE_MIN_EQ_RE_EST_0 +917 0x0400 //TX_MICMUTE_MIN_EQ_RE_EST_1 +918 0x1000 //TX_MICMUTE_MIN_EQ_RE_EST_2 +919 0x7FFF //TX_MICMUTE_MIN_EQ_RE_EST_3 +920 0x7FFF //TX_MICMUTE_MIN_EQ_RE_EST_4 +921 0x4000 //TX_MICMUTE_C_POST_FLT +922 0x03E8 //TX_MICMUTE_DT_CUT_K +923 0x0001 //TX_MICMUTE_DT_CUT_THR +924 0x03E8 //TX_MICMUTE_DT_CUT_K2 +925 0x0001 //TX_MICMUTE_DT_CUT_THR2 +926 0x0064 //TX_MICMUTE_DT2_HOLD_N +927 0x1000 //TX_MICMUTE_RATIODTH_THCUT +928 0x1000 //TX_MICMUTE_B_POST_FLT_ECHOL +929 0x7FFF //TX_MICMUTE_B_POST_FLT_ECHOH +930 0x0400 //TX_MICMUTE_C_POST_FLT_MASK +931 0x7999 //TX_MICMUTE_RATIODTL_CUT_TH +932 0x0258 //TX_MICMUTE_DT_CUT_K1 +933 0x0800 //TX_MICMUTE_N2_SN_EST +934 0xFC00 //TX_MICMUTE_THR_SN_EST_0 +935 0x001C //TX_MICMUTE_MIN_G_CTRL_0 +936 0x6000 //TX_MICMUTE_A_POST_FILT_S_0 +937 0x7000 //TX_MICMUTE_B_POST_FILT_0 +938 0x2710 //TX_MIC1RUB_AMP_THR +939 0x0010 //TX_MIC1MUTE_RATIO_THR +940 0x0450 //TX_MIC1MUTE_AMP_THR +941 0x0008 //TX_MIC1MUTE_CVG_TIME +942 0x0008 //TX_MIC1MUTE_RELEASE_TIME +943 0x0000 //TX_AMS_RESRV_01 +944 0x0000 //TX_AMS_RESRV_02 +945 0x0000 //TX_AMS_RESRV_03 +946 0x0000 //TX_AMS_RESRV_04 +947 0x0000 //TX_AMS_RESRV_05 +948 0x0000 //TX_AMS_RESRV_06 +949 0x0000 //TX_AMS_RESRV_07 +950 0x0000 //TX_AMS_RESRV_08 +951 0x0000 //TX_AMS_RESRV_09 +952 0x0000 //TX_AMS_RESRV_10 +953 0x0000 //TX_AMS_RESRV_11 +954 0x0000 //TX_AMS_RESRV_12 +955 0x0000 //TX_AMS_RESRV_13 +956 0x0000 //TX_AMS_RESRV_14 +957 0x0000 //TX_AMS_RESRV_15 +958 0x0000 //TX_AMS_RESRV_16 +959 0x0000 //TX_AMS_RESRV_17 +960 0x0000 //TX_AMS_RESRV_18 +961 0x0000 //TX_AMS_RESRV_19 #RX -0 0x002C //RX_RECVFUNC_MODE_0 +0 0x202C //RX_RECVFUNC_MODE_0 1 0x0000 //RX_RECVFUNC_MODE_1 2 0x0000 //RX_SAMPLINGFREQ_SIG 3 0x0000 //RX_SAMPLINGFREQ_PROC @@ -8772,11 +12501,862 @@ 110 0x0000 //RX_FDDRC_RESRV_0 129 0x0100 //RX_SPK_VOL 130 0x0000 //RX_VOL_RESRV_0 +#RX 2 +157 0x202C //RX_RECVFUNC_MODE_0 +158 0x0000 //RX_RECVFUNC_MODE_1 +159 0x0000 //RX_SAMPLINGFREQ_SIG +160 0x0000 //RX_SAMPLINGFREQ_PROC +161 0x000A //RX_FRAME_SZ +162 0x0000 //RX_DELAY_OPT +163 0x3000 //RX_TDDRC_ALPHA_UP_1 +164 0x3000 //RX_TDDRC_ALPHA_UP_2 +165 0x3000 //RX_TDDRC_ALPHA_UP_3 +166 0x3000 //RX_TDDRC_ALPHA_UP_4 +167 0x0800 //RX_PGA +168 0x7FFF //RX_A_HP +169 0x0000 //RX_B_PE +170 0x3800 //RX_THR_PITCH_DET_0 +171 0x3000 //RX_THR_PITCH_DET_1 +172 0x2800 //RX_THR_PITCH_DET_2 +173 0x0008 //RX_PITCH_BFR_LEN +174 0x0003 //RX_SBD_PITCH_DET +175 0x0100 //RX_PP_RESRV_0 +176 0x0020 //RX_PP_RESRV_1 +177 0x0600 //RX_N_SN_EST +178 0x000C //RX_N2_SN_EST +179 0x0010 //RX_NS_LVL_CTRL +180 0xF800 //RX_THR_SN_EST +181 0x7CCD //RX_LAMBDA_PFILT +182 0x000A //RX_FENS_RESRV_0 +183 0x0190 //RX_FENS_RESRV_1 +184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +187 0x0002 //RX_EXTRA_NS_L +188 0x0800 //RX_EXTRA_NS_A +189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +190 0x7FFF //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +192 0x199A //RX_A_POST_FLT +193 0x0000 //RX_LMT_THRD +194 0x4000 //RX_LMT_ALPHA +195 0x0014 //RX_FDEQ_SUBNUM +196 0x4848 //RX_FDEQ_GAIN_0 +197 0x4848 //RX_FDEQ_GAIN_1 +198 0x4848 //RX_FDEQ_GAIN_2 +199 0x4848 //RX_FDEQ_GAIN_3 +200 0x4848 //RX_FDEQ_GAIN_4 +201 0x4848 //RX_FDEQ_GAIN_5 +202 0x4848 //RX_FDEQ_GAIN_6 +203 0x4848 //RX_FDEQ_GAIN_7 +204 0x4848 //RX_FDEQ_GAIN_8 +205 0x4848 //RX_FDEQ_GAIN_9 +206 0x4848 //RX_FDEQ_GAIN_10 +207 0x4848 //RX_FDEQ_GAIN_11 +208 0x4848 //RX_FDEQ_GAIN_12 +209 0x4848 //RX_FDEQ_GAIN_13 +210 0x4848 //RX_FDEQ_GAIN_14 +211 0x4848 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0202 //RX_FDEQ_BIN_0 +221 0x0203 //RX_FDEQ_BIN_1 +222 0x0303 //RX_FDEQ_BIN_2 +223 0x0304 //RX_FDEQ_BIN_3 +224 0x0405 //RX_FDEQ_BIN_4 +225 0x0506 //RX_FDEQ_BIN_5 +226 0x0708 //RX_FDEQ_BIN_6 +227 0x090A //RX_FDEQ_BIN_7 +228 0x0B0C //RX_FDEQ_BIN_8 +229 0x0D08 //RX_FDEQ_BIN_9 +230 0x0000 //RX_FDEQ_BIN_10 +231 0x0000 //RX_FDEQ_BIN_11 +232 0x0000 //RX_FDEQ_BIN_12 +233 0x0000 //RX_FDEQ_BIN_13 +234 0x0000 //RX_FDEQ_BIN_14 +235 0x0000 //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x4000 //RX_FDEQ_RESRV_0 +245 0x0320 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0030 //RX_FDDRC_BAND_MARGIN_1 +248 0x0050 //RX_FDDRC_BAND_MARGIN_2 +249 0x0080 //RX_FDDRC_BAND_MARGIN_3 +250 0x0007 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x5000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x6400 //RX_FDDRC_THRD_3_2 +258 0x6400 //RX_FDDRC_THRD_3_3 +259 0x2000 //RX_FDDRC_SLANT_0_0 +260 0x2000 //RX_FDDRC_SLANT_0_1 +261 0x2000 //RX_FDDRC_SLANT_0_2 +262 0x2000 //RX_FDDRC_SLANT_0_3 +263 0x5333 //RX_FDDRC_SLANT_1_0 +264 0x5333 //RX_FDDRC_SLANT_1_1 +265 0x5333 //RX_FDDRC_SLANT_1_2 +266 0x5333 //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +268 0x0002 //RX_FILTINDX +269 0x0000 //RX_TDDRC_THRD_0 +270 0x0000 //RX_TDDRC_THRD_1 +271 0x2000 //RX_TDDRC_THRD_2 +272 0x3000 //RX_TDDRC_THRD_3 +273 0x0800 //RX_TDDRC_SLANT_0 +274 0x7EB8 //RX_TDDRC_SLANT_1 +275 0x3000 //RX_TDDRC_ALPHA_UP_0 +276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x199A //RX_TDDRC_HMNC_GAIN +279 0x0001 //RX_TDDRC_SMT_FLAG +280 0x0CCD //RX_TDDRC_SMT_W +281 0x0200 //RX_TDDRC_DRC_GAIN +282 0x7C00 //RX_LAMBDA_PKA_FP +283 0x2000 //RX_TPKA_FP +284 0x2000 //RX_MIN_G_FP +285 0x0080 //RX_MAX_G_FP +286 0x000B //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 +288 0x0000 //RX_MAXLEVEL_CNG +289 0x3000 //RX_BWE_UV_TH +290 0x3000 //RX_BWE_UV_TH2 +291 0x1800 //RX_BWE_UV_TH3 +292 0x1000 //RX_BWE_V_TH +293 0x04CD //RX_BWE_GAIN1_V_TH1 +294 0x0F33 //RX_BWE_GAIN1_V_TH2 +295 0x7333 //RX_BWE_UV_EQ +296 0x199A //RX_BWE_V_EQ +297 0x7333 //RX_BWE_TONE_TH +298 0x0004 //RX_BWE_UV_HOLD_T +299 0x6CCD //RX_BWE_GAIN2_ALPHA +300 0x799A //RX_BWE_GAIN3_ALPHA +301 0x001E //RX_BWE_CUTOFF +302 0x3000 //RX_BWE_GAINFILL +303 0x3200 //RX_BWE_MAXTH_TONE +304 0x2000 //RX_BWE_EQ_0 +305 0x2000 //RX_BWE_EQ_1 +306 0x2000 //RX_BWE_EQ_2 +307 0x2000 //RX_BWE_EQ_3 +308 0x2000 //RX_BWE_EQ_4 +309 0x2000 //RX_BWE_EQ_5 +310 0x2000 //RX_BWE_EQ_6 +311 0x0000 //RX_BWE_RESRV_0 +312 0x0000 //RX_BWE_RESRV_1 +313 0x0000 //RX_BWE_RESRV_2 +#VOL 0 +163 0x3000 //RX_TDDRC_ALPHA_UP_1 +164 0x3000 //RX_TDDRC_ALPHA_UP_2 +165 0x3000 //RX_TDDRC_ALPHA_UP_3 +166 0x3000 //RX_TDDRC_ALPHA_UP_4 +184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +190 0x7FFF //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +269 0x0000 //RX_TDDRC_THRD_0 +270 0x0000 //RX_TDDRC_THRD_1 +271 0x2000 //RX_TDDRC_THRD_2 +272 0x3000 //RX_TDDRC_THRD_3 +273 0x0800 //RX_TDDRC_SLANT_0 +274 0x7EB8 //RX_TDDRC_SLANT_1 +275 0x3000 //RX_TDDRC_ALPHA_UP_0 +276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x199A //RX_TDDRC_HMNC_GAIN +279 0x0001 //RX_TDDRC_SMT_FLAG +280 0x0CCD //RX_TDDRC_SMT_W +281 0x0200 //RX_TDDRC_DRC_GAIN +195 0x0014 //RX_FDEQ_SUBNUM +196 0x4848 //RX_FDEQ_GAIN_0 +197 0x4848 //RX_FDEQ_GAIN_1 +198 0x4848 //RX_FDEQ_GAIN_2 +199 0x4848 //RX_FDEQ_GAIN_3 +200 0x4848 //RX_FDEQ_GAIN_4 +201 0x4848 //RX_FDEQ_GAIN_5 +202 0x4848 //RX_FDEQ_GAIN_6 +203 0x4848 //RX_FDEQ_GAIN_7 +204 0x4848 //RX_FDEQ_GAIN_8 +205 0x4848 //RX_FDEQ_GAIN_9 +206 0x4848 //RX_FDEQ_GAIN_10 +207 0x4848 //RX_FDEQ_GAIN_11 +208 0x4848 //RX_FDEQ_GAIN_12 +209 0x4848 //RX_FDEQ_GAIN_13 +210 0x4848 //RX_FDEQ_GAIN_14 +211 0x4848 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0202 //RX_FDEQ_BIN_0 +221 0x0203 //RX_FDEQ_BIN_1 +222 0x0303 //RX_FDEQ_BIN_2 +223 0x0304 //RX_FDEQ_BIN_3 +224 0x0405 //RX_FDEQ_BIN_4 +225 0x0506 //RX_FDEQ_BIN_5 +226 0x0708 //RX_FDEQ_BIN_6 +227 0x090A //RX_FDEQ_BIN_7 +228 0x0B0C //RX_FDEQ_BIN_8 +229 0x0D08 //RX_FDEQ_BIN_9 +230 0x0000 //RX_FDEQ_BIN_10 +231 0x0000 //RX_FDEQ_BIN_11 +232 0x0000 //RX_FDEQ_BIN_12 +233 0x0000 //RX_FDEQ_BIN_13 +234 0x0000 //RX_FDEQ_BIN_14 +235 0x0000 //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x4000 //RX_FDEQ_RESRV_0 +245 0x0320 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0030 //RX_FDDRC_BAND_MARGIN_1 +248 0x0050 //RX_FDDRC_BAND_MARGIN_2 +249 0x0080 //RX_FDDRC_BAND_MARGIN_3 +250 0x0007 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x5000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x6400 //RX_FDDRC_THRD_3_2 +258 0x6400 //RX_FDDRC_THRD_3_3 +259 0x2000 //RX_FDDRC_SLANT_0_0 +260 0x2000 //RX_FDDRC_SLANT_0_1 +261 0x2000 //RX_FDDRC_SLANT_0_2 +262 0x2000 //RX_FDDRC_SLANT_0_3 +263 0x5333 //RX_FDDRC_SLANT_1_0 +264 0x5333 //RX_FDDRC_SLANT_1_1 +265 0x5333 //RX_FDDRC_SLANT_1_2 +266 0x5333 //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +286 0x000B //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 +#VOL 1 +163 0x3000 //RX_TDDRC_ALPHA_UP_1 +164 0x3000 //RX_TDDRC_ALPHA_UP_2 +165 0x3000 //RX_TDDRC_ALPHA_UP_3 +166 0x3000 //RX_TDDRC_ALPHA_UP_4 +184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +190 0x7FFF //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +269 0x0000 //RX_TDDRC_THRD_0 +270 0x0000 //RX_TDDRC_THRD_1 +271 0x2000 //RX_TDDRC_THRD_2 +272 0x3000 //RX_TDDRC_THRD_3 +273 0x0800 //RX_TDDRC_SLANT_0 +274 0x7EB8 //RX_TDDRC_SLANT_1 +275 0x3000 //RX_TDDRC_ALPHA_UP_0 +276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x199A //RX_TDDRC_HMNC_GAIN +279 0x0001 //RX_TDDRC_SMT_FLAG +280 0x0CCD //RX_TDDRC_SMT_W +281 0x0200 //RX_TDDRC_DRC_GAIN +195 0x0014 //RX_FDEQ_SUBNUM +196 0x4848 //RX_FDEQ_GAIN_0 +197 0x4848 //RX_FDEQ_GAIN_1 +198 0x4848 //RX_FDEQ_GAIN_2 +199 0x4848 //RX_FDEQ_GAIN_3 +200 0x4848 //RX_FDEQ_GAIN_4 +201 0x4848 //RX_FDEQ_GAIN_5 +202 0x4848 //RX_FDEQ_GAIN_6 +203 0x4848 //RX_FDEQ_GAIN_7 +204 0x4848 //RX_FDEQ_GAIN_8 +205 0x4848 //RX_FDEQ_GAIN_9 +206 0x4848 //RX_FDEQ_GAIN_10 +207 0x4848 //RX_FDEQ_GAIN_11 +208 0x4848 //RX_FDEQ_GAIN_12 +209 0x4848 //RX_FDEQ_GAIN_13 +210 0x4848 //RX_FDEQ_GAIN_14 +211 0x4848 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0202 //RX_FDEQ_BIN_0 +221 0x0203 //RX_FDEQ_BIN_1 +222 0x0303 //RX_FDEQ_BIN_2 +223 0x0304 //RX_FDEQ_BIN_3 +224 0x0405 //RX_FDEQ_BIN_4 +225 0x0506 //RX_FDEQ_BIN_5 +226 0x0708 //RX_FDEQ_BIN_6 +227 0x090A //RX_FDEQ_BIN_7 +228 0x0B0C //RX_FDEQ_BIN_8 +229 0x0D08 //RX_FDEQ_BIN_9 +230 0x0000 //RX_FDEQ_BIN_10 +231 0x0000 //RX_FDEQ_BIN_11 +232 0x0000 //RX_FDEQ_BIN_12 +233 0x0000 //RX_FDEQ_BIN_13 +234 0x0000 //RX_FDEQ_BIN_14 +235 0x0000 //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x4000 //RX_FDEQ_RESRV_0 +245 0x0320 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0030 //RX_FDDRC_BAND_MARGIN_1 +248 0x0050 //RX_FDDRC_BAND_MARGIN_2 +249 0x0080 //RX_FDDRC_BAND_MARGIN_3 +250 0x0007 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x5000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x6400 //RX_FDDRC_THRD_3_2 +258 0x6400 //RX_FDDRC_THRD_3_3 +259 0x2000 //RX_FDDRC_SLANT_0_0 +260 0x2000 //RX_FDDRC_SLANT_0_1 +261 0x2000 //RX_FDDRC_SLANT_0_2 +262 0x2000 //RX_FDDRC_SLANT_0_3 +263 0x5333 //RX_FDDRC_SLANT_1_0 +264 0x5333 //RX_FDDRC_SLANT_1_1 +265 0x5333 //RX_FDDRC_SLANT_1_2 +266 0x5333 //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +286 0x0013 //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 +#VOL 2 +163 0x3000 //RX_TDDRC_ALPHA_UP_1 +164 0x3000 //RX_TDDRC_ALPHA_UP_2 +165 0x3000 //RX_TDDRC_ALPHA_UP_3 +166 0x3000 //RX_TDDRC_ALPHA_UP_4 +184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +190 0x7FFF //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +269 0x0000 //RX_TDDRC_THRD_0 +270 0x0000 //RX_TDDRC_THRD_1 +271 0x2000 //RX_TDDRC_THRD_2 +272 0x3000 //RX_TDDRC_THRD_3 +273 0x0800 //RX_TDDRC_SLANT_0 +274 0x7EB8 //RX_TDDRC_SLANT_1 +275 0x3000 //RX_TDDRC_ALPHA_UP_0 +276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x199A //RX_TDDRC_HMNC_GAIN +279 0x0001 //RX_TDDRC_SMT_FLAG +280 0x0CCD //RX_TDDRC_SMT_W +281 0x0200 //RX_TDDRC_DRC_GAIN +195 0x0014 //RX_FDEQ_SUBNUM +196 0x4848 //RX_FDEQ_GAIN_0 +197 0x4848 //RX_FDEQ_GAIN_1 +198 0x4848 //RX_FDEQ_GAIN_2 +199 0x4848 //RX_FDEQ_GAIN_3 +200 0x4848 //RX_FDEQ_GAIN_4 +201 0x4848 //RX_FDEQ_GAIN_5 +202 0x4848 //RX_FDEQ_GAIN_6 +203 0x4848 //RX_FDEQ_GAIN_7 +204 0x4848 //RX_FDEQ_GAIN_8 +205 0x4848 //RX_FDEQ_GAIN_9 +206 0x4848 //RX_FDEQ_GAIN_10 +207 0x4848 //RX_FDEQ_GAIN_11 +208 0x4848 //RX_FDEQ_GAIN_12 +209 0x4848 //RX_FDEQ_GAIN_13 +210 0x4848 //RX_FDEQ_GAIN_14 +211 0x4848 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0202 //RX_FDEQ_BIN_0 +221 0x0203 //RX_FDEQ_BIN_1 +222 0x0303 //RX_FDEQ_BIN_2 +223 0x0304 //RX_FDEQ_BIN_3 +224 0x0405 //RX_FDEQ_BIN_4 +225 0x0506 //RX_FDEQ_BIN_5 +226 0x0708 //RX_FDEQ_BIN_6 +227 0x090A //RX_FDEQ_BIN_7 +228 0x0B0C //RX_FDEQ_BIN_8 +229 0x0D08 //RX_FDEQ_BIN_9 +230 0x0000 //RX_FDEQ_BIN_10 +231 0x0000 //RX_FDEQ_BIN_11 +232 0x0000 //RX_FDEQ_BIN_12 +233 0x0000 //RX_FDEQ_BIN_13 +234 0x0000 //RX_FDEQ_BIN_14 +235 0x0000 //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x4000 //RX_FDEQ_RESRV_0 +245 0x0320 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0030 //RX_FDDRC_BAND_MARGIN_1 +248 0x0050 //RX_FDDRC_BAND_MARGIN_2 +249 0x0080 //RX_FDDRC_BAND_MARGIN_3 +250 0x0007 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x5000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x6400 //RX_FDDRC_THRD_3_2 +258 0x6400 //RX_FDDRC_THRD_3_3 +259 0x2000 //RX_FDDRC_SLANT_0_0 +260 0x2000 //RX_FDDRC_SLANT_0_1 +261 0x2000 //RX_FDDRC_SLANT_0_2 +262 0x2000 //RX_FDDRC_SLANT_0_3 +263 0x5333 //RX_FDDRC_SLANT_1_0 +264 0x5333 //RX_FDDRC_SLANT_1_1 +265 0x5333 //RX_FDDRC_SLANT_1_2 +266 0x5333 //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +286 0x0020 //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 +#VOL 3 +163 0x3000 //RX_TDDRC_ALPHA_UP_1 +164 0x3000 //RX_TDDRC_ALPHA_UP_2 +165 0x3000 //RX_TDDRC_ALPHA_UP_3 +166 0x3000 //RX_TDDRC_ALPHA_UP_4 +184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +190 0x7FFF //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +269 0x0000 //RX_TDDRC_THRD_0 +270 0x0000 //RX_TDDRC_THRD_1 +271 0x2000 //RX_TDDRC_THRD_2 +272 0x3000 //RX_TDDRC_THRD_3 +273 0x0800 //RX_TDDRC_SLANT_0 +274 0x7EB8 //RX_TDDRC_SLANT_1 +275 0x3000 //RX_TDDRC_ALPHA_UP_0 +276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x199A //RX_TDDRC_HMNC_GAIN +279 0x0001 //RX_TDDRC_SMT_FLAG +280 0x0CCD //RX_TDDRC_SMT_W +281 0x0200 //RX_TDDRC_DRC_GAIN +195 0x0014 //RX_FDEQ_SUBNUM +196 0x4848 //RX_FDEQ_GAIN_0 +197 0x4848 //RX_FDEQ_GAIN_1 +198 0x4848 //RX_FDEQ_GAIN_2 +199 0x4848 //RX_FDEQ_GAIN_3 +200 0x4848 //RX_FDEQ_GAIN_4 +201 0x4848 //RX_FDEQ_GAIN_5 +202 0x4848 //RX_FDEQ_GAIN_6 +203 0x4848 //RX_FDEQ_GAIN_7 +204 0x4848 //RX_FDEQ_GAIN_8 +205 0x4848 //RX_FDEQ_GAIN_9 +206 0x4848 //RX_FDEQ_GAIN_10 +207 0x4848 //RX_FDEQ_GAIN_11 +208 0x4848 //RX_FDEQ_GAIN_12 +209 0x4848 //RX_FDEQ_GAIN_13 +210 0x4848 //RX_FDEQ_GAIN_14 +211 0x4848 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0202 //RX_FDEQ_BIN_0 +221 0x0203 //RX_FDEQ_BIN_1 +222 0x0303 //RX_FDEQ_BIN_2 +223 0x0304 //RX_FDEQ_BIN_3 +224 0x0405 //RX_FDEQ_BIN_4 +225 0x0506 //RX_FDEQ_BIN_5 +226 0x0708 //RX_FDEQ_BIN_6 +227 0x090A //RX_FDEQ_BIN_7 +228 0x0B0C //RX_FDEQ_BIN_8 +229 0x0D08 //RX_FDEQ_BIN_9 +230 0x0000 //RX_FDEQ_BIN_10 +231 0x0000 //RX_FDEQ_BIN_11 +232 0x0000 //RX_FDEQ_BIN_12 +233 0x0000 //RX_FDEQ_BIN_13 +234 0x0000 //RX_FDEQ_BIN_14 +235 0x0000 //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x4000 //RX_FDEQ_RESRV_0 +245 0x0320 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0030 //RX_FDDRC_BAND_MARGIN_1 +248 0x0050 //RX_FDDRC_BAND_MARGIN_2 +249 0x0080 //RX_FDDRC_BAND_MARGIN_3 +250 0x0007 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x5000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x6400 //RX_FDDRC_THRD_3_2 +258 0x6400 //RX_FDDRC_THRD_3_3 +259 0x2000 //RX_FDDRC_SLANT_0_0 +260 0x2000 //RX_FDDRC_SLANT_0_1 +261 0x2000 //RX_FDDRC_SLANT_0_2 +262 0x2000 //RX_FDDRC_SLANT_0_3 +263 0x5333 //RX_FDDRC_SLANT_1_0 +264 0x5333 //RX_FDDRC_SLANT_1_1 +265 0x5333 //RX_FDDRC_SLANT_1_2 +266 0x5333 //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +286 0x0036 //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 +#VOL 4 +163 0x3000 //RX_TDDRC_ALPHA_UP_1 +164 0x3000 //RX_TDDRC_ALPHA_UP_2 +165 0x3000 //RX_TDDRC_ALPHA_UP_3 +166 0x3000 //RX_TDDRC_ALPHA_UP_4 +184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +190 0x7FFF //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +269 0x0000 //RX_TDDRC_THRD_0 +270 0x0000 //RX_TDDRC_THRD_1 +271 0x2000 //RX_TDDRC_THRD_2 +272 0x3000 //RX_TDDRC_THRD_3 +273 0x0800 //RX_TDDRC_SLANT_0 +274 0x7EB8 //RX_TDDRC_SLANT_1 +275 0x3000 //RX_TDDRC_ALPHA_UP_0 +276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x199A //RX_TDDRC_HMNC_GAIN +279 0x0001 //RX_TDDRC_SMT_FLAG +280 0x0CCD //RX_TDDRC_SMT_W +281 0x0200 //RX_TDDRC_DRC_GAIN +195 0x0014 //RX_FDEQ_SUBNUM +196 0x4848 //RX_FDEQ_GAIN_0 +197 0x4848 //RX_FDEQ_GAIN_1 +198 0x4848 //RX_FDEQ_GAIN_2 +199 0x4848 //RX_FDEQ_GAIN_3 +200 0x4848 //RX_FDEQ_GAIN_4 +201 0x4848 //RX_FDEQ_GAIN_5 +202 0x4848 //RX_FDEQ_GAIN_6 +203 0x4848 //RX_FDEQ_GAIN_7 +204 0x4848 //RX_FDEQ_GAIN_8 +205 0x4848 //RX_FDEQ_GAIN_9 +206 0x4848 //RX_FDEQ_GAIN_10 +207 0x4848 //RX_FDEQ_GAIN_11 +208 0x4848 //RX_FDEQ_GAIN_12 +209 0x4848 //RX_FDEQ_GAIN_13 +210 0x4848 //RX_FDEQ_GAIN_14 +211 0x4848 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0202 //RX_FDEQ_BIN_0 +221 0x0203 //RX_FDEQ_BIN_1 +222 0x0303 //RX_FDEQ_BIN_2 +223 0x0304 //RX_FDEQ_BIN_3 +224 0x0405 //RX_FDEQ_BIN_4 +225 0x0506 //RX_FDEQ_BIN_5 +226 0x0708 //RX_FDEQ_BIN_6 +227 0x090A //RX_FDEQ_BIN_7 +228 0x0B0C //RX_FDEQ_BIN_8 +229 0x0D08 //RX_FDEQ_BIN_9 +230 0x0000 //RX_FDEQ_BIN_10 +231 0x0000 //RX_FDEQ_BIN_11 +232 0x0000 //RX_FDEQ_BIN_12 +233 0x0000 //RX_FDEQ_BIN_13 +234 0x0000 //RX_FDEQ_BIN_14 +235 0x0000 //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x4000 //RX_FDEQ_RESRV_0 +245 0x0320 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0030 //RX_FDDRC_BAND_MARGIN_1 +248 0x0050 //RX_FDDRC_BAND_MARGIN_2 +249 0x0080 //RX_FDDRC_BAND_MARGIN_3 +250 0x0007 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x5000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x6400 //RX_FDDRC_THRD_3_2 +258 0x6400 //RX_FDDRC_THRD_3_3 +259 0x2000 //RX_FDDRC_SLANT_0_0 +260 0x2000 //RX_FDDRC_SLANT_0_1 +261 0x2000 //RX_FDDRC_SLANT_0_2 +262 0x2000 //RX_FDDRC_SLANT_0_3 +263 0x5333 //RX_FDDRC_SLANT_1_0 +264 0x5333 //RX_FDDRC_SLANT_1_1 +265 0x5333 //RX_FDDRC_SLANT_1_2 +266 0x5333 //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +286 0x005B //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 +#VOL 5 +163 0x3000 //RX_TDDRC_ALPHA_UP_1 +164 0x3000 //RX_TDDRC_ALPHA_UP_2 +165 0x3000 //RX_TDDRC_ALPHA_UP_3 +166 0x3000 //RX_TDDRC_ALPHA_UP_4 +184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +190 0x7FFF //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +269 0x0000 //RX_TDDRC_THRD_0 +270 0x0000 //RX_TDDRC_THRD_1 +271 0x2000 //RX_TDDRC_THRD_2 +272 0x3000 //RX_TDDRC_THRD_3 +273 0x0800 //RX_TDDRC_SLANT_0 +274 0x7EB8 //RX_TDDRC_SLANT_1 +275 0x3000 //RX_TDDRC_ALPHA_UP_0 +276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x199A //RX_TDDRC_HMNC_GAIN +279 0x0001 //RX_TDDRC_SMT_FLAG +280 0x0CCD //RX_TDDRC_SMT_W +281 0x0200 //RX_TDDRC_DRC_GAIN +195 0x0014 //RX_FDEQ_SUBNUM +196 0x4848 //RX_FDEQ_GAIN_0 +197 0x4848 //RX_FDEQ_GAIN_1 +198 0x4848 //RX_FDEQ_GAIN_2 +199 0x4848 //RX_FDEQ_GAIN_3 +200 0x4848 //RX_FDEQ_GAIN_4 +201 0x4848 //RX_FDEQ_GAIN_5 +202 0x4848 //RX_FDEQ_GAIN_6 +203 0x4848 //RX_FDEQ_GAIN_7 +204 0x4848 //RX_FDEQ_GAIN_8 +205 0x4848 //RX_FDEQ_GAIN_9 +206 0x4848 //RX_FDEQ_GAIN_10 +207 0x4848 //RX_FDEQ_GAIN_11 +208 0x4848 //RX_FDEQ_GAIN_12 +209 0x4848 //RX_FDEQ_GAIN_13 +210 0x4848 //RX_FDEQ_GAIN_14 +211 0x4848 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0202 //RX_FDEQ_BIN_0 +221 0x0203 //RX_FDEQ_BIN_1 +222 0x0303 //RX_FDEQ_BIN_2 +223 0x0304 //RX_FDEQ_BIN_3 +224 0x0405 //RX_FDEQ_BIN_4 +225 0x0506 //RX_FDEQ_BIN_5 +226 0x0708 //RX_FDEQ_BIN_6 +227 0x090A //RX_FDEQ_BIN_7 +228 0x0B0C //RX_FDEQ_BIN_8 +229 0x0D08 //RX_FDEQ_BIN_9 +230 0x0000 //RX_FDEQ_BIN_10 +231 0x0000 //RX_FDEQ_BIN_11 +232 0x0000 //RX_FDEQ_BIN_12 +233 0x0000 //RX_FDEQ_BIN_13 +234 0x0000 //RX_FDEQ_BIN_14 +235 0x0000 //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x4000 //RX_FDEQ_RESRV_0 +245 0x0320 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0030 //RX_FDDRC_BAND_MARGIN_1 +248 0x0050 //RX_FDDRC_BAND_MARGIN_2 +249 0x0080 //RX_FDDRC_BAND_MARGIN_3 +250 0x0007 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x5000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x6400 //RX_FDDRC_THRD_3_2 +258 0x6400 //RX_FDDRC_THRD_3_3 +259 0x2000 //RX_FDDRC_SLANT_0_0 +260 0x2000 //RX_FDDRC_SLANT_0_1 +261 0x2000 //RX_FDDRC_SLANT_0_2 +262 0x2000 //RX_FDDRC_SLANT_0_3 +263 0x5333 //RX_FDDRC_SLANT_1_0 +264 0x5333 //RX_FDDRC_SLANT_1_1 +265 0x5333 //RX_FDDRC_SLANT_1_2 +266 0x5333 //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +286 0x0099 //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 +#VOL 6 +163 0x3000 //RX_TDDRC_ALPHA_UP_1 +164 0x3000 //RX_TDDRC_ALPHA_UP_2 +165 0x3000 //RX_TDDRC_ALPHA_UP_3 +166 0x3000 //RX_TDDRC_ALPHA_UP_4 +184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +190 0x7FFF //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +269 0x0000 //RX_TDDRC_THRD_0 +270 0x0000 //RX_TDDRC_THRD_1 +271 0x2000 //RX_TDDRC_THRD_2 +272 0x3000 //RX_TDDRC_THRD_3 +273 0x0800 //RX_TDDRC_SLANT_0 +274 0x7EB8 //RX_TDDRC_SLANT_1 +275 0x3000 //RX_TDDRC_ALPHA_UP_0 +276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x199A //RX_TDDRC_HMNC_GAIN +279 0x0001 //RX_TDDRC_SMT_FLAG +280 0x0CCD //RX_TDDRC_SMT_W +281 0x0200 //RX_TDDRC_DRC_GAIN +195 0x0014 //RX_FDEQ_SUBNUM +196 0x4848 //RX_FDEQ_GAIN_0 +197 0x4848 //RX_FDEQ_GAIN_1 +198 0x4848 //RX_FDEQ_GAIN_2 +199 0x4848 //RX_FDEQ_GAIN_3 +200 0x4848 //RX_FDEQ_GAIN_4 +201 0x4848 //RX_FDEQ_GAIN_5 +202 0x4848 //RX_FDEQ_GAIN_6 +203 0x4848 //RX_FDEQ_GAIN_7 +204 0x4848 //RX_FDEQ_GAIN_8 +205 0x4848 //RX_FDEQ_GAIN_9 +206 0x4848 //RX_FDEQ_GAIN_10 +207 0x4848 //RX_FDEQ_GAIN_11 +208 0x4848 //RX_FDEQ_GAIN_12 +209 0x4848 //RX_FDEQ_GAIN_13 +210 0x4848 //RX_FDEQ_GAIN_14 +211 0x4848 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0202 //RX_FDEQ_BIN_0 +221 0x0203 //RX_FDEQ_BIN_1 +222 0x0303 //RX_FDEQ_BIN_2 +223 0x0304 //RX_FDEQ_BIN_3 +224 0x0405 //RX_FDEQ_BIN_4 +225 0x0506 //RX_FDEQ_BIN_5 +226 0x0708 //RX_FDEQ_BIN_6 +227 0x090A //RX_FDEQ_BIN_7 +228 0x0B0C //RX_FDEQ_BIN_8 +229 0x0D08 //RX_FDEQ_BIN_9 +230 0x0000 //RX_FDEQ_BIN_10 +231 0x0000 //RX_FDEQ_BIN_11 +232 0x0000 //RX_FDEQ_BIN_12 +233 0x0000 //RX_FDEQ_BIN_13 +234 0x0000 //RX_FDEQ_BIN_14 +235 0x0000 //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x4000 //RX_FDEQ_RESRV_0 +245 0x0320 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0030 //RX_FDDRC_BAND_MARGIN_1 +248 0x0050 //RX_FDDRC_BAND_MARGIN_2 +249 0x0080 //RX_FDDRC_BAND_MARGIN_3 +250 0x0007 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x5000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x6400 //RX_FDDRC_THRD_3_2 +258 0x6400 //RX_FDDRC_THRD_3_3 +259 0x2000 //RX_FDDRC_SLANT_0_0 +260 0x2000 //RX_FDDRC_SLANT_0_1 +261 0x2000 //RX_FDDRC_SLANT_0_2 +262 0x2000 //RX_FDDRC_SLANT_0_3 +263 0x5333 //RX_FDDRC_SLANT_1_0 +264 0x5333 //RX_FDDRC_SLANT_1_1 +265 0x5333 //RX_FDDRC_SLANT_1_2 +266 0x5333 //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +286 0x0100 //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 #CASE_NAME HEADSET-GOOGLE_CONDOR-VOICE_GENERIC-WB -#PARAM_MODE FULL -#PARAM_TYPE TX+RX -#TOTAL_CUSTOM_STEP 7 +#PARAM_MODE Full +#PARAM_TYPE TX+2RX +#TOTAL_CUSTOM_STEP 7+7 #TX 0 0x0009 //TX_OPERATION_MODE_0 1 0x0008 //TX_OPERATION_MODE_1 @@ -9020,7 +13600,7 @@ 239 0x0800 //TX_DT_RESRV_7 240 0x0800 //TX_DT_RESRV_8 241 0x0000 //TX_DT_RESRV_9 -242 0xF400 //TX_THR_SN_EST_0 +242 0xFA00 //TX_THR_SN_EST_0 243 0xF400 //TX_THR_SN_EST_1 244 0xF600 //TX_THR_SN_EST_2 245 0xF400 //TX_THR_SN_EST_3 @@ -9029,20 +13609,20 @@ 248 0xF400 //TX_THR_SN_EST_6 249 0xF600 //TX_THR_SN_EST_7 250 0x0000 //TX_DELTA_THR_SN_EST_0 -251 0x0000 //TX_DELTA_THR_SN_EST_1 +251 0x0200 //TX_DELTA_THR_SN_EST_1 252 0x0200 //TX_DELTA_THR_SN_EST_2 253 0x0200 //TX_DELTA_THR_SN_EST_3 254 0x0200 //TX_DELTA_THR_SN_EST_4 255 0x0200 //TX_DELTA_THR_SN_EST_5 -256 0x0200 //TX_DELTA_THR_SN_EST_6 +256 0x0000 //TX_DELTA_THR_SN_EST_6 257 0x0200 //TX_DELTA_THR_SN_EST_7 258 0x6000 //TX_LAMBDA_NN_EST_0 -259 0x6000 //TX_LAMBDA_NN_EST_1 +259 0x4000 //TX_LAMBDA_NN_EST_1 260 0x4000 //TX_LAMBDA_NN_EST_2 261 0x4000 //TX_LAMBDA_NN_EST_3 262 0x4000 //TX_LAMBDA_NN_EST_4 263 0x4000 //TX_LAMBDA_NN_EST_5 -264 0x4000 //TX_LAMBDA_NN_EST_6 +264 0x6000 //TX_LAMBDA_NN_EST_6 265 0x4000 //TX_LAMBDA_NN_EST_7 266 0x0400 //TX_N_SN_EST 267 0x001E //TX_INBEAM_T @@ -9060,16 +13640,16 @@ 279 0x1000 //TX_B_POST_FLT_0 280 0x1000 //TX_B_POST_FLT_1 281 0x000F //TX_NS_LVL_CTRL_0 -282 0x000F //TX_NS_LVL_CTRL_1 -283 0x0011 //TX_NS_LVL_CTRL_2 +282 0x0011 //TX_NS_LVL_CTRL_1 +283 0x000F //TX_NS_LVL_CTRL_2 284 0x000F //TX_NS_LVL_CTRL_3 285 0x000F //TX_NS_LVL_CTRL_4 286 0x000F //TX_NS_LVL_CTRL_5 287 0x000F //TX_NS_LVL_CTRL_6 288 0x0011 //TX_NS_LVL_CTRL_7 289 0x000C //TX_MIN_GAIN_S_0 -290 0x000C //TX_MIN_GAIN_S_1 -291 0x000F //TX_MIN_GAIN_S_2 +290 0x000F //TX_MIN_GAIN_S_1 +291 0x000C //TX_MIN_GAIN_S_2 292 0x000C //TX_MIN_GAIN_S_3 293 0x000C //TX_MIN_GAIN_S_4 294 0x000C //TX_MIN_GAIN_S_5 @@ -9093,12 +13673,12 @@ 312 0x7FFF //TX_A_POST_FILT_0 313 0x2000 //TX_A_POST_FILT_1 314 0x4000 //TX_A_POST_FILT_S_0 -315 0x4000 //TX_A_POST_FILT_S_1 +315 0x5000 //TX_A_POST_FILT_S_1 316 0x5000 //TX_A_POST_FILT_S_2 317 0x5000 //TX_A_POST_FILT_S_3 318 0x5000 //TX_A_POST_FILT_S_4 319 0x5000 //TX_A_POST_FILT_S_5 -320 0x5000 //TX_A_POST_FILT_S_6 +320 0x4000 //TX_A_POST_FILT_S_6 321 0x5000 //TX_A_POST_FILT_S_7 322 0x1000 //TX_B_POST_FILT_0 323 0x1000 //TX_B_POST_FILT_1 @@ -9145,7 +13725,7 @@ 364 0x0000 //TX_K_APT 365 0x0001 //TX_NOISEDET 366 0x0190 //TX_NDETCT -367 0x0050 //TX_NOISE_TH_0 +367 0x0102 //TX_NOISE_TH_0 368 0x7FFF //TX_NOISE_TH_0_2 369 0x7FFF //TX_NOISE_TH_0_3 370 0x07D0 //TX_NOISE_TH_1 @@ -9157,11 +13737,11 @@ 376 0x7FFF //TX_NOISE_TH_5_3 377 0x7FFF //TX_NOISE_TH_5_4 378 0x044C //TX_NOISE_TH_6 -379 0x0014 //TX_MINENOISE_TH -380 0x4000 //TX_MINENOISE_MIC0_TH_MTS -381 0xFFEE //TX_MINENOISE_MIC0_TH_EXP -382 0x6000 //TX_MINENOISE_MIC0_S_TH_MTS -383 0xFFF3 //TX_MINENOISE_MIC0_S_TH_EXP +379 0x00F8 //TX_MINENOISE_TH +380 0xD508 //TX_MORENS_TFMASK_TH +381 0x0001 //TX_DRC_QUIET_FLOOR +382 0x3A98 //TX_RATIODTL_CUT_TH +383 0x0DAC //TX_DT_CUT_K1 384 0x0666 //TX_OUT_ENER_S_TH_CLEAN 385 0x0666 //TX_OUT_ENER_S_TH_LESSCLEAN 386 0x0333 //TX_OUT_ENER_S_TH_NOISY @@ -9169,22 +13749,22 @@ 388 0x0333 //TX_OUT_ENER_TH_SPEECH 389 0x2000 //TX_SN_NPB_GAIN 390 0x0000 //TX_NN_NPB_GAIN -391 0x0000 //TX_CSX_ALPHA_0 -392 0x0000 //TX_CSX_ALPHA_1 -393 0x0000 //TX_CSX_ALPHA_2 -394 0x0000 //TX_CSX_ALPHA_3 -395 0x0800 //TX_MU_ARSP_EST -396 0x00C8 //TX_P_OUTBEAM_MIN_TH +391 0x7FFF //TX_POST_MASK_SUP_HSNE +392 0x1388 //TX_TAIL_DET_TH +393 0x4000 //TX_B_LESSCUT_RTO_WTA +394 0x0000 //TX_MEL_G_R +395 0x0080 //TX_SUPHIGH_TH +396 0x0000 //TX_MASK_G_R 397 0x0002 //TX_EXTRA_NS_L -398 0x0800 //TX_EXTRA_NS_A -399 0x0005 //TX_VR_NOISE_FLOOR_TH +398 0x1800 //TX_C_POST_FLT_MASK +399 0x7FFF //TX_A_POST_FLT_WNS 400 0x0148 //TX_MIN_G_LOW300HZ 401 0x0002 //TX_MAXLEVEL_CNG 402 0x00B4 //TX_STN_NOISE_TH 403 0x4000 //TX_POST_MASK_SUP 404 0x7FFF //TX_POST_MASK_ADJUST 405 0x00C8 //TX_NS_ENOISE_MIC0_TH -406 0x0014 //TX_MINENOISE_MIC0_TH +406 0x00DC //TX_MINENOISE_MIC0_TH 407 0x012C //TX_MINENOISE_MIC0_S_TH 408 0x7FFF //TX_MIN_G_CTRL_SSNS 409 0x0000 //TX_METAL_RTO_THR @@ -9292,16 +13872,16 @@ 511 0x6666 //TX_MIC_TO_BFGAIN 512 0x0000 //TX_MICTOBFGAIN0 513 0x0000 //TX_FASTMUE_TH -514 0x0000 //TX_DERVB_LEN_0 -515 0x0000 //TX_DERVB_LEN_1 -516 0x0000 //TX_RHO_DERVB -517 0x0000 //TX_MIC_INDX_DERVB -518 0x0000 //TX_MU_DERVB -519 0x0000 //TX_DR_RESRV_0 -520 0x0000 //TX_DR_RESRV_1 -521 0x0000 //TX_DR_RESRV_2 -522 0x0000 //TX_DR_RESRV_3 -523 0x0000 //TX_DR_RESRV_4 +514 0xC000 //TX_DEREVERB_LF_MU +515 0xC000 //TX_DEREVERB_HF_MU +516 0xCCCC //TX_DEREVERB_DELAY +517 0xD999 //TX_DEREVERB_COEF_LEN +518 0x1F40 //TX_DEREVERB_DNR +519 0x0000 //TX_DEREVERB_ALPHA +520 0x0000 //TX_DEREVERB_BETA +521 0x0000 //TX_GSC_RTOL_TH +522 0x7000 //TX_GSC_RTOH_TH +523 0x0064 //TX_WIDE2_MEANHTH 524 0x0000 //TX_DR_RESRV_5 525 0x0000 //TX_DR_RESRV_6 526 0x0000 //TX_DR_RESRV_7 @@ -9669,14 +14249,79 @@ 888 0x00C8 //TX_FASTNS_ARSPC_TH 889 0xC000 //TX_FASTNS_MASK5_TH 890 0x4848 //TX_POSTSSA_MIN_G_VR_MASK -891 0x7FFF //TX_A_LESSCUT_RTO_MASK +891 0x4000 //TX_A_LESSCUT_RTO_MASK 892 0x1770 //TX_FASTNS_NOISETH 893 0xC000 //TX_FASTNS_SSA_THLFL 894 0xC000 //TX_FASTNS_SSA_THHFL 895 0xCCCC //TX_FASTNS_SSA_THLFH 896 0xD999 //TX_FASTNS_SSA_THHFH +897 0x2339 //TX_SENDFUNC_REG_MICMUTE +898 0x0021 //TX_SENDFUNC_REG_MICMUTE1 +899 0x02BC //TX_MICMUTE_RATIO_THR +900 0x0140 //TX_MICMUTE_AMP_THR +901 0x0004 //TX_MICMUTE_HPF_IND +902 0x00C0 //TX_MICMUTE_LOG_EYR_TH +903 0x0008 //TX_MICMUTE_CVG_TIME +904 0x0008 //TX_MICMUTE_RELEASE_TIME +905 0x01FE //TX_MIC_VOLUME_MIC0MUTE +906 0x0020 //TX_MICMUTE_EPD_OFFSET_0 +907 0x001E //TX_MICMUTE_FRQ_AEC_L +908 0x7999 //TX_MICMUTE_EAD_THR +909 0x7FFF //TX_MICMUTE_LAMBDA_CB_NLE +910 0x7FFF //TX_MICMUTE_LAMBDA_RE_EST +911 0x4000 //TX_DTD_THR1_MICMUTE_0 +912 0x7000 //TX_DTD_THR1_MICMUTE_1 +913 0x7FFF //TX_DTD_THR1_MICMUTE_2 +914 0x7FFF //TX_DTD_THR1_MICMUTE_3 +915 0x6CCC //TX_DTD_THR2_MICMUTE_0 +916 0x0400 //TX_MICMUTE_MIN_EQ_RE_EST_0 +917 0x0400 //TX_MICMUTE_MIN_EQ_RE_EST_1 +918 0x1000 //TX_MICMUTE_MIN_EQ_RE_EST_2 +919 0x7FFF //TX_MICMUTE_MIN_EQ_RE_EST_3 +920 0x7FFF //TX_MICMUTE_MIN_EQ_RE_EST_4 +921 0x4000 //TX_MICMUTE_C_POST_FLT +922 0x03E8 //TX_MICMUTE_DT_CUT_K +923 0x0001 //TX_MICMUTE_DT_CUT_THR +924 0x03E8 //TX_MICMUTE_DT_CUT_K2 +925 0x0001 //TX_MICMUTE_DT_CUT_THR2 +926 0x0064 //TX_MICMUTE_DT2_HOLD_N +927 0x1000 //TX_MICMUTE_RATIODTH_THCUT +928 0x1000 //TX_MICMUTE_B_POST_FLT_ECHOL +929 0x7FFF //TX_MICMUTE_B_POST_FLT_ECHOH +930 0x0400 //TX_MICMUTE_C_POST_FLT_MASK +931 0x7999 //TX_MICMUTE_RATIODTL_CUT_TH +932 0x0258 //TX_MICMUTE_DT_CUT_K1 +933 0x0800 //TX_MICMUTE_N2_SN_EST +934 0xFC00 //TX_MICMUTE_THR_SN_EST_0 +935 0x001C //TX_MICMUTE_MIN_G_CTRL_0 +936 0x6000 //TX_MICMUTE_A_POST_FILT_S_0 +937 0x7000 //TX_MICMUTE_B_POST_FILT_0 +938 0x2710 //TX_MIC1RUB_AMP_THR +939 0x0010 //TX_MIC1MUTE_RATIO_THR +940 0x0450 //TX_MIC1MUTE_AMP_THR +941 0x0008 //TX_MIC1MUTE_CVG_TIME +942 0x0008 //TX_MIC1MUTE_RELEASE_TIME +943 0x0000 //TX_AMS_RESRV_01 +944 0x0000 //TX_AMS_RESRV_02 +945 0x0000 //TX_AMS_RESRV_03 +946 0x0000 //TX_AMS_RESRV_04 +947 0x0000 //TX_AMS_RESRV_05 +948 0x0000 //TX_AMS_RESRV_06 +949 0x0000 //TX_AMS_RESRV_07 +950 0x0000 //TX_AMS_RESRV_08 +951 0x0000 //TX_AMS_RESRV_09 +952 0x0000 //TX_AMS_RESRV_10 +953 0x0000 //TX_AMS_RESRV_11 +954 0x0000 //TX_AMS_RESRV_12 +955 0x0000 //TX_AMS_RESRV_13 +956 0x0000 //TX_AMS_RESRV_14 +957 0x0000 //TX_AMS_RESRV_15 +958 0x0000 //TX_AMS_RESRV_16 +959 0x0000 //TX_AMS_RESRV_17 +960 0x0000 //TX_AMS_RESRV_18 +961 0x0000 //TX_AMS_RESRV_19 #RX -0 0x002C //RX_RECVFUNC_MODE_0 +0 0x202C //RX_RECVFUNC_MODE_0 1 0x0000 //RX_RECVFUNC_MODE_1 2 0x0001 //RX_SAMPLINGFREQ_SIG 3 0x0001 //RX_SAMPLINGFREQ_PROC @@ -10526,11 +15171,862 @@ 110 0x0000 //RX_FDDRC_RESRV_0 129 0x0100 //RX_SPK_VOL 130 0x0000 //RX_VOL_RESRV_0 +#RX 2 +157 0x202C //RX_RECVFUNC_MODE_0 +158 0x0000 //RX_RECVFUNC_MODE_1 +159 0x0001 //RX_SAMPLINGFREQ_SIG +160 0x0001 //RX_SAMPLINGFREQ_PROC +161 0x000A //RX_FRAME_SZ +162 0x0000 //RX_DELAY_OPT +163 0x3000 //RX_TDDRC_ALPHA_UP_1 +164 0x3000 //RX_TDDRC_ALPHA_UP_2 +165 0x3000 //RX_TDDRC_ALPHA_UP_3 +166 0x3000 //RX_TDDRC_ALPHA_UP_4 +167 0x0800 //RX_PGA +168 0x7FFF //RX_A_HP +169 0x4000 //RX_B_PE +170 0x3800 //RX_THR_PITCH_DET_0 +171 0x3000 //RX_THR_PITCH_DET_1 +172 0x2800 //RX_THR_PITCH_DET_2 +173 0x0008 //RX_PITCH_BFR_LEN +174 0x0003 //RX_SBD_PITCH_DET +175 0x0100 //RX_PP_RESRV_0 +176 0x0020 //RX_PP_RESRV_1 +177 0x0600 //RX_N_SN_EST +178 0x000C //RX_N2_SN_EST +179 0x0010 //RX_NS_LVL_CTRL +180 0xF800 //RX_THR_SN_EST +181 0x7CCD //RX_LAMBDA_PFILT +182 0x000A //RX_FENS_RESRV_0 +183 0x0190 //RX_FENS_RESRV_1 +184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +187 0x0002 //RX_EXTRA_NS_L +188 0x0800 //RX_EXTRA_NS_A +189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +190 0x7FFF //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +192 0x199A //RX_A_POST_FLT +193 0x0000 //RX_LMT_THRD +194 0x4000 //RX_LMT_ALPHA +195 0x001C //RX_FDEQ_SUBNUM +196 0x4848 //RX_FDEQ_GAIN_0 +197 0x4848 //RX_FDEQ_GAIN_1 +198 0x4848 //RX_FDEQ_GAIN_2 +199 0x4848 //RX_FDEQ_GAIN_3 +200 0x4848 //RX_FDEQ_GAIN_4 +201 0x4848 //RX_FDEQ_GAIN_5 +202 0x4848 //RX_FDEQ_GAIN_6 +203 0x4848 //RX_FDEQ_GAIN_7 +204 0x4848 //RX_FDEQ_GAIN_8 +205 0x4848 //RX_FDEQ_GAIN_9 +206 0x4848 //RX_FDEQ_GAIN_10 +207 0x4848 //RX_FDEQ_GAIN_11 +208 0x4848 //RX_FDEQ_GAIN_12 +209 0x4848 //RX_FDEQ_GAIN_13 +210 0x4848 //RX_FDEQ_GAIN_14 +211 0x4848 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0202 //RX_FDEQ_BIN_0 +221 0x0203 //RX_FDEQ_BIN_1 +222 0x0303 //RX_FDEQ_BIN_2 +223 0x0304 //RX_FDEQ_BIN_3 +224 0x0405 //RX_FDEQ_BIN_4 +225 0x0506 //RX_FDEQ_BIN_5 +226 0x0708 //RX_FDEQ_BIN_6 +227 0x090A //RX_FDEQ_BIN_7 +228 0x0B0C //RX_FDEQ_BIN_8 +229 0x0D0E //RX_FDEQ_BIN_9 +230 0x0E0F //RX_FDEQ_BIN_10 +231 0x0F10 //RX_FDEQ_BIN_11 +232 0x1011 //RX_FDEQ_BIN_12 +233 0x1104 //RX_FDEQ_BIN_13 +234 0x0000 //RX_FDEQ_BIN_14 +235 0x0000 //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x4000 //RX_FDEQ_RESRV_0 +245 0x0320 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0030 //RX_FDDRC_BAND_MARGIN_1 +248 0x0050 //RX_FDDRC_BAND_MARGIN_2 +249 0x0080 //RX_FDDRC_BAND_MARGIN_3 +250 0x0007 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x5000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x6400 //RX_FDDRC_THRD_3_2 +258 0x6400 //RX_FDDRC_THRD_3_3 +259 0x2000 //RX_FDDRC_SLANT_0_0 +260 0x2000 //RX_FDDRC_SLANT_0_1 +261 0x2000 //RX_FDDRC_SLANT_0_2 +262 0x2000 //RX_FDDRC_SLANT_0_3 +263 0x5333 //RX_FDDRC_SLANT_1_0 +264 0x5333 //RX_FDDRC_SLANT_1_1 +265 0x5333 //RX_FDDRC_SLANT_1_2 +266 0x5333 //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +268 0x0002 //RX_FILTINDX +269 0x0000 //RX_TDDRC_THRD_0 +270 0x0000 //RX_TDDRC_THRD_1 +271 0x2000 //RX_TDDRC_THRD_2 +272 0x3000 //RX_TDDRC_THRD_3 +273 0x0800 //RX_TDDRC_SLANT_0 +274 0x7EB8 //RX_TDDRC_SLANT_1 +275 0x3000 //RX_TDDRC_ALPHA_UP_0 +276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x199A //RX_TDDRC_HMNC_GAIN +279 0x0001 //RX_TDDRC_SMT_FLAG +280 0x0CCD //RX_TDDRC_SMT_W +281 0x0196 //RX_TDDRC_DRC_GAIN +282 0x7C00 //RX_LAMBDA_PKA_FP +283 0x2000 //RX_TPKA_FP +284 0x2000 //RX_MIN_G_FP +285 0x0080 //RX_MAX_G_FP +286 0x000B //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 +288 0x0000 //RX_MAXLEVEL_CNG +289 0x3000 //RX_BWE_UV_TH +290 0x3000 //RX_BWE_UV_TH2 +291 0x1800 //RX_BWE_UV_TH3 +292 0x1000 //RX_BWE_V_TH +293 0x04CD //RX_BWE_GAIN1_V_TH1 +294 0x0F33 //RX_BWE_GAIN1_V_TH2 +295 0x7333 //RX_BWE_UV_EQ +296 0x199A //RX_BWE_V_EQ +297 0x7333 //RX_BWE_TONE_TH +298 0x0004 //RX_BWE_UV_HOLD_T +299 0x6CCD //RX_BWE_GAIN2_ALPHA +300 0x799A //RX_BWE_GAIN3_ALPHA +301 0x001E //RX_BWE_CUTOFF +302 0x3000 //RX_BWE_GAINFILL +303 0x3200 //RX_BWE_MAXTH_TONE +304 0x2000 //RX_BWE_EQ_0 +305 0x2000 //RX_BWE_EQ_1 +306 0x2000 //RX_BWE_EQ_2 +307 0x2000 //RX_BWE_EQ_3 +308 0x2000 //RX_BWE_EQ_4 +309 0x2000 //RX_BWE_EQ_5 +310 0x2000 //RX_BWE_EQ_6 +311 0x0000 //RX_BWE_RESRV_0 +312 0x0000 //RX_BWE_RESRV_1 +313 0x0000 //RX_BWE_RESRV_2 +#VOL 0 +163 0x3000 //RX_TDDRC_ALPHA_UP_1 +164 0x3000 //RX_TDDRC_ALPHA_UP_2 +165 0x3000 //RX_TDDRC_ALPHA_UP_3 +166 0x3000 //RX_TDDRC_ALPHA_UP_4 +184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +190 0x7FFF //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +269 0x0000 //RX_TDDRC_THRD_0 +270 0x0000 //RX_TDDRC_THRD_1 +271 0x2000 //RX_TDDRC_THRD_2 +272 0x3000 //RX_TDDRC_THRD_3 +273 0x0800 //RX_TDDRC_SLANT_0 +274 0x7EB8 //RX_TDDRC_SLANT_1 +275 0x3000 //RX_TDDRC_ALPHA_UP_0 +276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x199A //RX_TDDRC_HMNC_GAIN +279 0x0001 //RX_TDDRC_SMT_FLAG +280 0x0CCD //RX_TDDRC_SMT_W +281 0x0196 //RX_TDDRC_DRC_GAIN +195 0x001C //RX_FDEQ_SUBNUM +196 0x4848 //RX_FDEQ_GAIN_0 +197 0x4848 //RX_FDEQ_GAIN_1 +198 0x4848 //RX_FDEQ_GAIN_2 +199 0x4848 //RX_FDEQ_GAIN_3 +200 0x4848 //RX_FDEQ_GAIN_4 +201 0x4848 //RX_FDEQ_GAIN_5 +202 0x4848 //RX_FDEQ_GAIN_6 +203 0x4848 //RX_FDEQ_GAIN_7 +204 0x4848 //RX_FDEQ_GAIN_8 +205 0x4848 //RX_FDEQ_GAIN_9 +206 0x4848 //RX_FDEQ_GAIN_10 +207 0x4848 //RX_FDEQ_GAIN_11 +208 0x4848 //RX_FDEQ_GAIN_12 +209 0x4848 //RX_FDEQ_GAIN_13 +210 0x4848 //RX_FDEQ_GAIN_14 +211 0x4848 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0202 //RX_FDEQ_BIN_0 +221 0x0203 //RX_FDEQ_BIN_1 +222 0x0303 //RX_FDEQ_BIN_2 +223 0x0304 //RX_FDEQ_BIN_3 +224 0x0405 //RX_FDEQ_BIN_4 +225 0x0506 //RX_FDEQ_BIN_5 +226 0x0708 //RX_FDEQ_BIN_6 +227 0x090A //RX_FDEQ_BIN_7 +228 0x0B0C //RX_FDEQ_BIN_8 +229 0x0D0E //RX_FDEQ_BIN_9 +230 0x0E0F //RX_FDEQ_BIN_10 +231 0x0F10 //RX_FDEQ_BIN_11 +232 0x1011 //RX_FDEQ_BIN_12 +233 0x1104 //RX_FDEQ_BIN_13 +234 0x0000 //RX_FDEQ_BIN_14 +235 0x0000 //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x4000 //RX_FDEQ_RESRV_0 +245 0x0320 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0030 //RX_FDDRC_BAND_MARGIN_1 +248 0x0050 //RX_FDDRC_BAND_MARGIN_2 +249 0x0080 //RX_FDDRC_BAND_MARGIN_3 +250 0x0007 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x5000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x6400 //RX_FDDRC_THRD_3_2 +258 0x6400 //RX_FDDRC_THRD_3_3 +259 0x2000 //RX_FDDRC_SLANT_0_0 +260 0x2000 //RX_FDDRC_SLANT_0_1 +261 0x2000 //RX_FDDRC_SLANT_0_2 +262 0x2000 //RX_FDDRC_SLANT_0_3 +263 0x5333 //RX_FDDRC_SLANT_1_0 +264 0x5333 //RX_FDDRC_SLANT_1_1 +265 0x5333 //RX_FDDRC_SLANT_1_2 +266 0x5333 //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +286 0x000B //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 +#VOL 1 +163 0x3000 //RX_TDDRC_ALPHA_UP_1 +164 0x3000 //RX_TDDRC_ALPHA_UP_2 +165 0x3000 //RX_TDDRC_ALPHA_UP_3 +166 0x3000 //RX_TDDRC_ALPHA_UP_4 +184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +190 0x7FFF //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +269 0x0000 //RX_TDDRC_THRD_0 +270 0x0000 //RX_TDDRC_THRD_1 +271 0x2000 //RX_TDDRC_THRD_2 +272 0x3000 //RX_TDDRC_THRD_3 +273 0x0800 //RX_TDDRC_SLANT_0 +274 0x7EB8 //RX_TDDRC_SLANT_1 +275 0x3000 //RX_TDDRC_ALPHA_UP_0 +276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x199A //RX_TDDRC_HMNC_GAIN +279 0x0001 //RX_TDDRC_SMT_FLAG +280 0x0CCD //RX_TDDRC_SMT_W +281 0x0196 //RX_TDDRC_DRC_GAIN +195 0x001C //RX_FDEQ_SUBNUM +196 0x4848 //RX_FDEQ_GAIN_0 +197 0x4848 //RX_FDEQ_GAIN_1 +198 0x4848 //RX_FDEQ_GAIN_2 +199 0x4848 //RX_FDEQ_GAIN_3 +200 0x4848 //RX_FDEQ_GAIN_4 +201 0x4848 //RX_FDEQ_GAIN_5 +202 0x4848 //RX_FDEQ_GAIN_6 +203 0x4848 //RX_FDEQ_GAIN_7 +204 0x4848 //RX_FDEQ_GAIN_8 +205 0x4848 //RX_FDEQ_GAIN_9 +206 0x4848 //RX_FDEQ_GAIN_10 +207 0x4848 //RX_FDEQ_GAIN_11 +208 0x4848 //RX_FDEQ_GAIN_12 +209 0x4848 //RX_FDEQ_GAIN_13 +210 0x4848 //RX_FDEQ_GAIN_14 +211 0x4848 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0202 //RX_FDEQ_BIN_0 +221 0x0203 //RX_FDEQ_BIN_1 +222 0x0303 //RX_FDEQ_BIN_2 +223 0x0304 //RX_FDEQ_BIN_3 +224 0x0405 //RX_FDEQ_BIN_4 +225 0x0506 //RX_FDEQ_BIN_5 +226 0x0708 //RX_FDEQ_BIN_6 +227 0x090A //RX_FDEQ_BIN_7 +228 0x0B0C //RX_FDEQ_BIN_8 +229 0x0D0E //RX_FDEQ_BIN_9 +230 0x0E0F //RX_FDEQ_BIN_10 +231 0x0F10 //RX_FDEQ_BIN_11 +232 0x1011 //RX_FDEQ_BIN_12 +233 0x1104 //RX_FDEQ_BIN_13 +234 0x0000 //RX_FDEQ_BIN_14 +235 0x0000 //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x4000 //RX_FDEQ_RESRV_0 +245 0x0320 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0030 //RX_FDDRC_BAND_MARGIN_1 +248 0x0050 //RX_FDDRC_BAND_MARGIN_2 +249 0x0080 //RX_FDDRC_BAND_MARGIN_3 +250 0x0007 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x5000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x6400 //RX_FDDRC_THRD_3_2 +258 0x6400 //RX_FDDRC_THRD_3_3 +259 0x2000 //RX_FDDRC_SLANT_0_0 +260 0x2000 //RX_FDDRC_SLANT_0_1 +261 0x2000 //RX_FDDRC_SLANT_0_2 +262 0x2000 //RX_FDDRC_SLANT_0_3 +263 0x5333 //RX_FDDRC_SLANT_1_0 +264 0x5333 //RX_FDDRC_SLANT_1_1 +265 0x5333 //RX_FDDRC_SLANT_1_2 +266 0x5333 //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +286 0x0013 //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 +#VOL 2 +163 0x3000 //RX_TDDRC_ALPHA_UP_1 +164 0x3000 //RX_TDDRC_ALPHA_UP_2 +165 0x3000 //RX_TDDRC_ALPHA_UP_3 +166 0x3000 //RX_TDDRC_ALPHA_UP_4 +184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +190 0x7FFF //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +269 0x0000 //RX_TDDRC_THRD_0 +270 0x0000 //RX_TDDRC_THRD_1 +271 0x2000 //RX_TDDRC_THRD_2 +272 0x3000 //RX_TDDRC_THRD_3 +273 0x0800 //RX_TDDRC_SLANT_0 +274 0x7EB8 //RX_TDDRC_SLANT_1 +275 0x3000 //RX_TDDRC_ALPHA_UP_0 +276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x199A //RX_TDDRC_HMNC_GAIN +279 0x0001 //RX_TDDRC_SMT_FLAG +280 0x0CCD //RX_TDDRC_SMT_W +281 0x0196 //RX_TDDRC_DRC_GAIN +195 0x001C //RX_FDEQ_SUBNUM +196 0x4848 //RX_FDEQ_GAIN_0 +197 0x4848 //RX_FDEQ_GAIN_1 +198 0x4848 //RX_FDEQ_GAIN_2 +199 0x4848 //RX_FDEQ_GAIN_3 +200 0x4848 //RX_FDEQ_GAIN_4 +201 0x4848 //RX_FDEQ_GAIN_5 +202 0x4848 //RX_FDEQ_GAIN_6 +203 0x4848 //RX_FDEQ_GAIN_7 +204 0x4848 //RX_FDEQ_GAIN_8 +205 0x4848 //RX_FDEQ_GAIN_9 +206 0x4848 //RX_FDEQ_GAIN_10 +207 0x4848 //RX_FDEQ_GAIN_11 +208 0x4848 //RX_FDEQ_GAIN_12 +209 0x4848 //RX_FDEQ_GAIN_13 +210 0x4848 //RX_FDEQ_GAIN_14 +211 0x4848 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0202 //RX_FDEQ_BIN_0 +221 0x0203 //RX_FDEQ_BIN_1 +222 0x0303 //RX_FDEQ_BIN_2 +223 0x0304 //RX_FDEQ_BIN_3 +224 0x0405 //RX_FDEQ_BIN_4 +225 0x0506 //RX_FDEQ_BIN_5 +226 0x0708 //RX_FDEQ_BIN_6 +227 0x090A //RX_FDEQ_BIN_7 +228 0x0B0C //RX_FDEQ_BIN_8 +229 0x0D0E //RX_FDEQ_BIN_9 +230 0x0E0F //RX_FDEQ_BIN_10 +231 0x0F10 //RX_FDEQ_BIN_11 +232 0x1011 //RX_FDEQ_BIN_12 +233 0x1104 //RX_FDEQ_BIN_13 +234 0x0000 //RX_FDEQ_BIN_14 +235 0x0000 //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x4000 //RX_FDEQ_RESRV_0 +245 0x0320 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0030 //RX_FDDRC_BAND_MARGIN_1 +248 0x0050 //RX_FDDRC_BAND_MARGIN_2 +249 0x0080 //RX_FDDRC_BAND_MARGIN_3 +250 0x0007 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x5000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x6400 //RX_FDDRC_THRD_3_2 +258 0x6400 //RX_FDDRC_THRD_3_3 +259 0x2000 //RX_FDDRC_SLANT_0_0 +260 0x2000 //RX_FDDRC_SLANT_0_1 +261 0x2000 //RX_FDDRC_SLANT_0_2 +262 0x2000 //RX_FDDRC_SLANT_0_3 +263 0x5333 //RX_FDDRC_SLANT_1_0 +264 0x5333 //RX_FDDRC_SLANT_1_1 +265 0x5333 //RX_FDDRC_SLANT_1_2 +266 0x5333 //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +286 0x0020 //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 +#VOL 3 +163 0x3000 //RX_TDDRC_ALPHA_UP_1 +164 0x3000 //RX_TDDRC_ALPHA_UP_2 +165 0x3000 //RX_TDDRC_ALPHA_UP_3 +166 0x3000 //RX_TDDRC_ALPHA_UP_4 +184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +190 0x7FFF //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +269 0x0000 //RX_TDDRC_THRD_0 +270 0x0000 //RX_TDDRC_THRD_1 +271 0x2000 //RX_TDDRC_THRD_2 +272 0x3000 //RX_TDDRC_THRD_3 +273 0x0800 //RX_TDDRC_SLANT_0 +274 0x7EB8 //RX_TDDRC_SLANT_1 +275 0x3000 //RX_TDDRC_ALPHA_UP_0 +276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x199A //RX_TDDRC_HMNC_GAIN +279 0x0001 //RX_TDDRC_SMT_FLAG +280 0x0CCD //RX_TDDRC_SMT_W +281 0x0196 //RX_TDDRC_DRC_GAIN +195 0x001C //RX_FDEQ_SUBNUM +196 0x4848 //RX_FDEQ_GAIN_0 +197 0x4848 //RX_FDEQ_GAIN_1 +198 0x4848 //RX_FDEQ_GAIN_2 +199 0x4848 //RX_FDEQ_GAIN_3 +200 0x4848 //RX_FDEQ_GAIN_4 +201 0x4848 //RX_FDEQ_GAIN_5 +202 0x4848 //RX_FDEQ_GAIN_6 +203 0x4848 //RX_FDEQ_GAIN_7 +204 0x4848 //RX_FDEQ_GAIN_8 +205 0x4848 //RX_FDEQ_GAIN_9 +206 0x4848 //RX_FDEQ_GAIN_10 +207 0x4848 //RX_FDEQ_GAIN_11 +208 0x4848 //RX_FDEQ_GAIN_12 +209 0x4848 //RX_FDEQ_GAIN_13 +210 0x4848 //RX_FDEQ_GAIN_14 +211 0x4848 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0202 //RX_FDEQ_BIN_0 +221 0x0203 //RX_FDEQ_BIN_1 +222 0x0303 //RX_FDEQ_BIN_2 +223 0x0304 //RX_FDEQ_BIN_3 +224 0x0405 //RX_FDEQ_BIN_4 +225 0x0506 //RX_FDEQ_BIN_5 +226 0x0708 //RX_FDEQ_BIN_6 +227 0x090A //RX_FDEQ_BIN_7 +228 0x0B0C //RX_FDEQ_BIN_8 +229 0x0D0E //RX_FDEQ_BIN_9 +230 0x0E0F //RX_FDEQ_BIN_10 +231 0x0F10 //RX_FDEQ_BIN_11 +232 0x1011 //RX_FDEQ_BIN_12 +233 0x1104 //RX_FDEQ_BIN_13 +234 0x0000 //RX_FDEQ_BIN_14 +235 0x0000 //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x4000 //RX_FDEQ_RESRV_0 +245 0x0320 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0030 //RX_FDDRC_BAND_MARGIN_1 +248 0x0050 //RX_FDDRC_BAND_MARGIN_2 +249 0x0080 //RX_FDDRC_BAND_MARGIN_3 +250 0x0007 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x5000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x6400 //RX_FDDRC_THRD_3_2 +258 0x6400 //RX_FDDRC_THRD_3_3 +259 0x2000 //RX_FDDRC_SLANT_0_0 +260 0x2000 //RX_FDDRC_SLANT_0_1 +261 0x2000 //RX_FDDRC_SLANT_0_2 +262 0x2000 //RX_FDDRC_SLANT_0_3 +263 0x5333 //RX_FDDRC_SLANT_1_0 +264 0x5333 //RX_FDDRC_SLANT_1_1 +265 0x5333 //RX_FDDRC_SLANT_1_2 +266 0x5333 //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +286 0x0036 //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 +#VOL 4 +163 0x3000 //RX_TDDRC_ALPHA_UP_1 +164 0x3000 //RX_TDDRC_ALPHA_UP_2 +165 0x3000 //RX_TDDRC_ALPHA_UP_3 +166 0x3000 //RX_TDDRC_ALPHA_UP_4 +184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +190 0x7FFF //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +269 0x0000 //RX_TDDRC_THRD_0 +270 0x0000 //RX_TDDRC_THRD_1 +271 0x2000 //RX_TDDRC_THRD_2 +272 0x3000 //RX_TDDRC_THRD_3 +273 0x0800 //RX_TDDRC_SLANT_0 +274 0x7EB8 //RX_TDDRC_SLANT_1 +275 0x3000 //RX_TDDRC_ALPHA_UP_0 +276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x199A //RX_TDDRC_HMNC_GAIN +279 0x0001 //RX_TDDRC_SMT_FLAG +280 0x0CCD //RX_TDDRC_SMT_W +281 0x0196 //RX_TDDRC_DRC_GAIN +195 0x001C //RX_FDEQ_SUBNUM +196 0x4848 //RX_FDEQ_GAIN_0 +197 0x4848 //RX_FDEQ_GAIN_1 +198 0x4848 //RX_FDEQ_GAIN_2 +199 0x4848 //RX_FDEQ_GAIN_3 +200 0x4848 //RX_FDEQ_GAIN_4 +201 0x4848 //RX_FDEQ_GAIN_5 +202 0x4848 //RX_FDEQ_GAIN_6 +203 0x4848 //RX_FDEQ_GAIN_7 +204 0x4848 //RX_FDEQ_GAIN_8 +205 0x4848 //RX_FDEQ_GAIN_9 +206 0x4848 //RX_FDEQ_GAIN_10 +207 0x4848 //RX_FDEQ_GAIN_11 +208 0x4848 //RX_FDEQ_GAIN_12 +209 0x4848 //RX_FDEQ_GAIN_13 +210 0x4848 //RX_FDEQ_GAIN_14 +211 0x4848 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0202 //RX_FDEQ_BIN_0 +221 0x0203 //RX_FDEQ_BIN_1 +222 0x0303 //RX_FDEQ_BIN_2 +223 0x0304 //RX_FDEQ_BIN_3 +224 0x0405 //RX_FDEQ_BIN_4 +225 0x0506 //RX_FDEQ_BIN_5 +226 0x0708 //RX_FDEQ_BIN_6 +227 0x090A //RX_FDEQ_BIN_7 +228 0x0B0C //RX_FDEQ_BIN_8 +229 0x0D0E //RX_FDEQ_BIN_9 +230 0x0E0F //RX_FDEQ_BIN_10 +231 0x0F10 //RX_FDEQ_BIN_11 +232 0x1011 //RX_FDEQ_BIN_12 +233 0x1104 //RX_FDEQ_BIN_13 +234 0x0000 //RX_FDEQ_BIN_14 +235 0x0000 //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x4000 //RX_FDEQ_RESRV_0 +245 0x0320 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0030 //RX_FDDRC_BAND_MARGIN_1 +248 0x0050 //RX_FDDRC_BAND_MARGIN_2 +249 0x0080 //RX_FDDRC_BAND_MARGIN_3 +250 0x0007 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x5000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x6400 //RX_FDDRC_THRD_3_2 +258 0x6400 //RX_FDDRC_THRD_3_3 +259 0x2000 //RX_FDDRC_SLANT_0_0 +260 0x2000 //RX_FDDRC_SLANT_0_1 +261 0x2000 //RX_FDDRC_SLANT_0_2 +262 0x2000 //RX_FDDRC_SLANT_0_3 +263 0x5333 //RX_FDDRC_SLANT_1_0 +264 0x5333 //RX_FDDRC_SLANT_1_1 +265 0x5333 //RX_FDDRC_SLANT_1_2 +266 0x5333 //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +286 0x005B //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 +#VOL 5 +163 0x3000 //RX_TDDRC_ALPHA_UP_1 +164 0x3000 //RX_TDDRC_ALPHA_UP_2 +165 0x3000 //RX_TDDRC_ALPHA_UP_3 +166 0x3000 //RX_TDDRC_ALPHA_UP_4 +184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +190 0x7FFF //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +269 0x0000 //RX_TDDRC_THRD_0 +270 0x0000 //RX_TDDRC_THRD_1 +271 0x2000 //RX_TDDRC_THRD_2 +272 0x3000 //RX_TDDRC_THRD_3 +273 0x0800 //RX_TDDRC_SLANT_0 +274 0x7EB8 //RX_TDDRC_SLANT_1 +275 0x3000 //RX_TDDRC_ALPHA_UP_0 +276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x199A //RX_TDDRC_HMNC_GAIN +279 0x0001 //RX_TDDRC_SMT_FLAG +280 0x0CCD //RX_TDDRC_SMT_W +281 0x0196 //RX_TDDRC_DRC_GAIN +195 0x001C //RX_FDEQ_SUBNUM +196 0x4848 //RX_FDEQ_GAIN_0 +197 0x4848 //RX_FDEQ_GAIN_1 +198 0x4848 //RX_FDEQ_GAIN_2 +199 0x4848 //RX_FDEQ_GAIN_3 +200 0x4848 //RX_FDEQ_GAIN_4 +201 0x4848 //RX_FDEQ_GAIN_5 +202 0x4848 //RX_FDEQ_GAIN_6 +203 0x4848 //RX_FDEQ_GAIN_7 +204 0x4848 //RX_FDEQ_GAIN_8 +205 0x4848 //RX_FDEQ_GAIN_9 +206 0x4848 //RX_FDEQ_GAIN_10 +207 0x4848 //RX_FDEQ_GAIN_11 +208 0x4848 //RX_FDEQ_GAIN_12 +209 0x4848 //RX_FDEQ_GAIN_13 +210 0x4848 //RX_FDEQ_GAIN_14 +211 0x4848 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0202 //RX_FDEQ_BIN_0 +221 0x0203 //RX_FDEQ_BIN_1 +222 0x0303 //RX_FDEQ_BIN_2 +223 0x0304 //RX_FDEQ_BIN_3 +224 0x0405 //RX_FDEQ_BIN_4 +225 0x0506 //RX_FDEQ_BIN_5 +226 0x0708 //RX_FDEQ_BIN_6 +227 0x090A //RX_FDEQ_BIN_7 +228 0x0B0C //RX_FDEQ_BIN_8 +229 0x0D0E //RX_FDEQ_BIN_9 +230 0x0E0F //RX_FDEQ_BIN_10 +231 0x0F10 //RX_FDEQ_BIN_11 +232 0x1011 //RX_FDEQ_BIN_12 +233 0x1104 //RX_FDEQ_BIN_13 +234 0x0000 //RX_FDEQ_BIN_14 +235 0x0000 //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x4000 //RX_FDEQ_RESRV_0 +245 0x0320 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0030 //RX_FDDRC_BAND_MARGIN_1 +248 0x0050 //RX_FDDRC_BAND_MARGIN_2 +249 0x0080 //RX_FDDRC_BAND_MARGIN_3 +250 0x0007 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x5000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x6400 //RX_FDDRC_THRD_3_2 +258 0x6400 //RX_FDDRC_THRD_3_3 +259 0x2000 //RX_FDDRC_SLANT_0_0 +260 0x2000 //RX_FDDRC_SLANT_0_1 +261 0x2000 //RX_FDDRC_SLANT_0_2 +262 0x2000 //RX_FDDRC_SLANT_0_3 +263 0x5333 //RX_FDDRC_SLANT_1_0 +264 0x5333 //RX_FDDRC_SLANT_1_1 +265 0x5333 //RX_FDDRC_SLANT_1_2 +266 0x5333 //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +286 0x0099 //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 +#VOL 6 +163 0x3000 //RX_TDDRC_ALPHA_UP_1 +164 0x3000 //RX_TDDRC_ALPHA_UP_2 +165 0x3000 //RX_TDDRC_ALPHA_UP_3 +166 0x3000 //RX_TDDRC_ALPHA_UP_4 +184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +190 0x7FFF //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +269 0x0000 //RX_TDDRC_THRD_0 +270 0x0000 //RX_TDDRC_THRD_1 +271 0x2000 //RX_TDDRC_THRD_2 +272 0x3000 //RX_TDDRC_THRD_3 +273 0x0800 //RX_TDDRC_SLANT_0 +274 0x7EB8 //RX_TDDRC_SLANT_1 +275 0x3000 //RX_TDDRC_ALPHA_UP_0 +276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x199A //RX_TDDRC_HMNC_GAIN +279 0x0001 //RX_TDDRC_SMT_FLAG +280 0x0CCD //RX_TDDRC_SMT_W +281 0x0196 //RX_TDDRC_DRC_GAIN +195 0x001C //RX_FDEQ_SUBNUM +196 0x4848 //RX_FDEQ_GAIN_0 +197 0x4848 //RX_FDEQ_GAIN_1 +198 0x4848 //RX_FDEQ_GAIN_2 +199 0x4848 //RX_FDEQ_GAIN_3 +200 0x4848 //RX_FDEQ_GAIN_4 +201 0x4848 //RX_FDEQ_GAIN_5 +202 0x4848 //RX_FDEQ_GAIN_6 +203 0x4848 //RX_FDEQ_GAIN_7 +204 0x4848 //RX_FDEQ_GAIN_8 +205 0x4848 //RX_FDEQ_GAIN_9 +206 0x4848 //RX_FDEQ_GAIN_10 +207 0x4848 //RX_FDEQ_GAIN_11 +208 0x4848 //RX_FDEQ_GAIN_12 +209 0x4848 //RX_FDEQ_GAIN_13 +210 0x4848 //RX_FDEQ_GAIN_14 +211 0x4848 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0202 //RX_FDEQ_BIN_0 +221 0x0203 //RX_FDEQ_BIN_1 +222 0x0303 //RX_FDEQ_BIN_2 +223 0x0304 //RX_FDEQ_BIN_3 +224 0x0405 //RX_FDEQ_BIN_4 +225 0x0506 //RX_FDEQ_BIN_5 +226 0x0708 //RX_FDEQ_BIN_6 +227 0x090A //RX_FDEQ_BIN_7 +228 0x0B0C //RX_FDEQ_BIN_8 +229 0x0D0E //RX_FDEQ_BIN_9 +230 0x0E0F //RX_FDEQ_BIN_10 +231 0x0F10 //RX_FDEQ_BIN_11 +232 0x1011 //RX_FDEQ_BIN_12 +233 0x1104 //RX_FDEQ_BIN_13 +234 0x0000 //RX_FDEQ_BIN_14 +235 0x0000 //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x4000 //RX_FDEQ_RESRV_0 +245 0x0320 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0030 //RX_FDDRC_BAND_MARGIN_1 +248 0x0050 //RX_FDDRC_BAND_MARGIN_2 +249 0x0080 //RX_FDDRC_BAND_MARGIN_3 +250 0x0007 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x5000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x6400 //RX_FDDRC_THRD_3_2 +258 0x6400 //RX_FDDRC_THRD_3_3 +259 0x2000 //RX_FDDRC_SLANT_0_0 +260 0x2000 //RX_FDDRC_SLANT_0_1 +261 0x2000 //RX_FDDRC_SLANT_0_2 +262 0x2000 //RX_FDDRC_SLANT_0_3 +263 0x5333 //RX_FDDRC_SLANT_1_0 +264 0x5333 //RX_FDDRC_SLANT_1_1 +265 0x5333 //RX_FDDRC_SLANT_1_2 +266 0x5333 //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +286 0x0100 //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 #CASE_NAME HEADSET-GOOGLE_CONDOR-VOICE_GENERIC-SWB -#PARAM_MODE FULL -#PARAM_TYPE TX+RX -#TOTAL_CUSTOM_STEP 7 +#PARAM_MODE Full +#PARAM_TYPE TX+2RX +#TOTAL_CUSTOM_STEP 7+7 #TX 0 0x0009 //TX_OPERATION_MODE_0 1 0x0001 //TX_OPERATION_MODE_1 @@ -10774,7 +16270,7 @@ 239 0x0800 //TX_DT_RESRV_7 240 0x0800 //TX_DT_RESRV_8 241 0x0000 //TX_DT_RESRV_9 -242 0xF400 //TX_THR_SN_EST_0 +242 0xFA00 //TX_THR_SN_EST_0 243 0xF400 //TX_THR_SN_EST_1 244 0xF600 //TX_THR_SN_EST_2 245 0xF400 //TX_THR_SN_EST_3 @@ -10783,20 +16279,20 @@ 248 0xF400 //TX_THR_SN_EST_6 249 0xF600 //TX_THR_SN_EST_7 250 0x0000 //TX_DELTA_THR_SN_EST_0 -251 0x0000 //TX_DELTA_THR_SN_EST_1 +251 0x0200 //TX_DELTA_THR_SN_EST_1 252 0x0200 //TX_DELTA_THR_SN_EST_2 253 0x0200 //TX_DELTA_THR_SN_EST_3 254 0x0200 //TX_DELTA_THR_SN_EST_4 255 0x0200 //TX_DELTA_THR_SN_EST_5 -256 0x0200 //TX_DELTA_THR_SN_EST_6 +256 0x0000 //TX_DELTA_THR_SN_EST_6 257 0x0200 //TX_DELTA_THR_SN_EST_7 258 0x6000 //TX_LAMBDA_NN_EST_0 -259 0x6000 //TX_LAMBDA_NN_EST_1 +259 0x4000 //TX_LAMBDA_NN_EST_1 260 0x4000 //TX_LAMBDA_NN_EST_2 261 0x4000 //TX_LAMBDA_NN_EST_3 262 0x4000 //TX_LAMBDA_NN_EST_4 263 0x4000 //TX_LAMBDA_NN_EST_5 -264 0x4000 //TX_LAMBDA_NN_EST_6 +264 0x6000 //TX_LAMBDA_NN_EST_6 265 0x4000 //TX_LAMBDA_NN_EST_7 266 0x0400 //TX_N_SN_EST 267 0x001E //TX_INBEAM_T @@ -10814,16 +16310,16 @@ 279 0x1000 //TX_B_POST_FLT_0 280 0x1000 //TX_B_POST_FLT_1 281 0x000B //TX_NS_LVL_CTRL_0 -282 0x000F //TX_NS_LVL_CTRL_1 -283 0x0011 //TX_NS_LVL_CTRL_2 +282 0x0011 //TX_NS_LVL_CTRL_1 +283 0x000F //TX_NS_LVL_CTRL_2 284 0x000F //TX_NS_LVL_CTRL_3 285 0x000F //TX_NS_LVL_CTRL_4 286 0x000F //TX_NS_LVL_CTRL_5 287 0x000F //TX_NS_LVL_CTRL_6 288 0x0011 //TX_NS_LVL_CTRL_7 289 0x000C //TX_MIN_GAIN_S_0 -290 0x000C //TX_MIN_GAIN_S_1 -291 0x000F //TX_MIN_GAIN_S_2 +290 0x000F //TX_MIN_GAIN_S_1 +291 0x000C //TX_MIN_GAIN_S_2 292 0x000C //TX_MIN_GAIN_S_3 293 0x000C //TX_MIN_GAIN_S_4 294 0x000C //TX_MIN_GAIN_S_5 @@ -10847,12 +16343,12 @@ 312 0x7FFF //TX_A_POST_FILT_0 313 0x2000 //TX_A_POST_FILT_1 314 0x2000 //TX_A_POST_FILT_S_0 -315 0x4000 //TX_A_POST_FILT_S_1 +315 0x5000 //TX_A_POST_FILT_S_1 316 0x5000 //TX_A_POST_FILT_S_2 317 0x5000 //TX_A_POST_FILT_S_3 318 0x5000 //TX_A_POST_FILT_S_4 319 0x5000 //TX_A_POST_FILT_S_5 -320 0x5000 //TX_A_POST_FILT_S_6 +320 0x4000 //TX_A_POST_FILT_S_6 321 0x5000 //TX_A_POST_FILT_S_7 322 0x1000 //TX_B_POST_FILT_0 323 0x1000 //TX_B_POST_FILT_1 @@ -10899,7 +16395,7 @@ 364 0x0000 //TX_K_APT 365 0x0001 //TX_NOISEDET 366 0x0190 //TX_NDETCT -367 0x0050 //TX_NOISE_TH_0 +367 0x0383 //TX_NOISE_TH_0 368 0x7FFF //TX_NOISE_TH_0_2 369 0x7FFF //TX_NOISE_TH_0_3 370 0x07D0 //TX_NOISE_TH_1 @@ -10911,11 +16407,11 @@ 376 0x7FFF //TX_NOISE_TH_5_3 377 0x7FFF //TX_NOISE_TH_5_4 378 0x044C //TX_NOISE_TH_6 -379 0x0014 //TX_MINENOISE_TH -380 0x4000 //TX_MINENOISE_MIC0_TH_MTS -381 0xFFEE //TX_MINENOISE_MIC0_TH_EXP -382 0x6000 //TX_MINENOISE_MIC0_S_TH_MTS -383 0xFFF3 //TX_MINENOISE_MIC0_S_TH_EXP +379 0x044C //TX_MINENOISE_TH +380 0xD508 //TX_MORENS_TFMASK_TH +381 0x0001 //TX_DRC_QUIET_FLOOR +382 0x3A98 //TX_RATIODTL_CUT_TH +383 0x0DAC //TX_DT_CUT_K1 384 0x0666 //TX_OUT_ENER_S_TH_CLEAN 385 0x0666 //TX_OUT_ENER_S_TH_LESSCLEAN 386 0x0333 //TX_OUT_ENER_S_TH_NOISY @@ -10923,22 +16419,22 @@ 388 0x0333 //TX_OUT_ENER_TH_SPEECH 389 0x2000 //TX_SN_NPB_GAIN 390 0x0000 //TX_NN_NPB_GAIN -391 0x0000 //TX_CSX_ALPHA_0 -392 0x0000 //TX_CSX_ALPHA_1 -393 0x0000 //TX_CSX_ALPHA_2 -394 0x0000 //TX_CSX_ALPHA_3 -395 0x0800 //TX_MU_ARSP_EST -396 0x00C8 //TX_P_OUTBEAM_MIN_TH +391 0x7FFF //TX_POST_MASK_SUP_HSNE +392 0x1388 //TX_TAIL_DET_TH +393 0x4000 //TX_B_LESSCUT_RTO_WTA +394 0x0000 //TX_MEL_G_R +395 0x0080 //TX_SUPHIGH_TH +396 0x0000 //TX_MASK_G_R 397 0x0002 //TX_EXTRA_NS_L -398 0x0800 //TX_EXTRA_NS_A -399 0x0005 //TX_VR_NOISE_FLOOR_TH +398 0x1800 //TX_C_POST_FLT_MASK +399 0x7FFF //TX_A_POST_FLT_WNS 400 0x0148 //TX_MIN_G_LOW300HZ 401 0x0002 //TX_MAXLEVEL_CNG 402 0x00B4 //TX_STN_NOISE_TH 403 0x4000 //TX_POST_MASK_SUP 404 0x7FFF //TX_POST_MASK_ADJUST 405 0x00C8 //TX_NS_ENOISE_MIC0_TH -406 0x0014 //TX_MINENOISE_MIC0_TH +406 0x02F3 //TX_MINENOISE_MIC0_TH 407 0x012C //TX_MINENOISE_MIC0_S_TH 408 0x2900 //TX_MIN_G_CTRL_SSNS 409 0x0800 //TX_METAL_RTO_THR @@ -11046,16 +16542,16 @@ 511 0x6666 //TX_MIC_TO_BFGAIN 512 0x0000 //TX_MICTOBFGAIN0 513 0x0000 //TX_FASTMUE_TH -514 0x0000 //TX_DERVB_LEN_0 -515 0x0000 //TX_DERVB_LEN_1 -516 0x0000 //TX_RHO_DERVB -517 0x0000 //TX_MIC_INDX_DERVB -518 0x0000 //TX_MU_DERVB -519 0x0000 //TX_DR_RESRV_0 -520 0x0000 //TX_DR_RESRV_1 -521 0x0000 //TX_DR_RESRV_2 -522 0x0000 //TX_DR_RESRV_3 -523 0x0000 //TX_DR_RESRV_4 +514 0xC000 //TX_DEREVERB_LF_MU +515 0xC000 //TX_DEREVERB_HF_MU +516 0xCCCC //TX_DEREVERB_DELAY +517 0xD999 //TX_DEREVERB_COEF_LEN +518 0x1F40 //TX_DEREVERB_DNR +519 0x0000 //TX_DEREVERB_ALPHA +520 0x0000 //TX_DEREVERB_BETA +521 0x0000 //TX_GSC_RTOL_TH +522 0x7000 //TX_GSC_RTOH_TH +523 0x0064 //TX_WIDE2_MEANHTH 524 0x0000 //TX_DR_RESRV_5 525 0x0000 //TX_DR_RESRV_6 526 0x0000 //TX_DR_RESRV_7 @@ -11421,16 +16917,81 @@ 886 0x0CCD //TX_FASTNS_TFMASKBIN_TH2 887 0x0CCD //TX_FASTNS_TFMASKBIN_TH3 888 0x0028 //TX_FASTNS_ARSPC_TH -889 0xC000 //TX_FASTNS_MASK5_TH +889 0x8000 //TX_FASTNS_MASK5_TH 890 0x4848 //TX_POSTSSA_MIN_G_VR_MASK -891 0x1000 //TX_A_LESSCUT_RTO_MASK +891 0x4000 //TX_A_LESSCUT_RTO_MASK 892 0x1770 //TX_FASTNS_NOISETH 893 0xC000 //TX_FASTNS_SSA_THLFL 894 0xC000 //TX_FASTNS_SSA_THHFL 895 0xCCCC //TX_FASTNS_SSA_THLFH 896 0xD999 //TX_FASTNS_SSA_THHFH +897 0x2339 //TX_SENDFUNC_REG_MICMUTE +898 0x0021 //TX_SENDFUNC_REG_MICMUTE1 +899 0x02BC //TX_MICMUTE_RATIO_THR +900 0x0140 //TX_MICMUTE_AMP_THR +901 0x0004 //TX_MICMUTE_HPF_IND +902 0x00C0 //TX_MICMUTE_LOG_EYR_TH +903 0x0008 //TX_MICMUTE_CVG_TIME +904 0x0008 //TX_MICMUTE_RELEASE_TIME +905 0x01FE //TX_MIC_VOLUME_MIC0MUTE +906 0x0020 //TX_MICMUTE_EPD_OFFSET_0 +907 0x001E //TX_MICMUTE_FRQ_AEC_L +908 0x7999 //TX_MICMUTE_EAD_THR +909 0x7FFF //TX_MICMUTE_LAMBDA_CB_NLE +910 0x7FFF //TX_MICMUTE_LAMBDA_RE_EST +911 0x4000 //TX_DTD_THR1_MICMUTE_0 +912 0x7000 //TX_DTD_THR1_MICMUTE_1 +913 0x7FFF //TX_DTD_THR1_MICMUTE_2 +914 0x7FFF //TX_DTD_THR1_MICMUTE_3 +915 0x6CCC //TX_DTD_THR2_MICMUTE_0 +916 0x0400 //TX_MICMUTE_MIN_EQ_RE_EST_0 +917 0x0400 //TX_MICMUTE_MIN_EQ_RE_EST_1 +918 0x1000 //TX_MICMUTE_MIN_EQ_RE_EST_2 +919 0x7FFF //TX_MICMUTE_MIN_EQ_RE_EST_3 +920 0x7FFF //TX_MICMUTE_MIN_EQ_RE_EST_4 +921 0x4000 //TX_MICMUTE_C_POST_FLT +922 0x03E8 //TX_MICMUTE_DT_CUT_K +923 0x0001 //TX_MICMUTE_DT_CUT_THR +924 0x03E8 //TX_MICMUTE_DT_CUT_K2 +925 0x0001 //TX_MICMUTE_DT_CUT_THR2 +926 0x0064 //TX_MICMUTE_DT2_HOLD_N +927 0x1000 //TX_MICMUTE_RATIODTH_THCUT +928 0x1000 //TX_MICMUTE_B_POST_FLT_ECHOL +929 0x7FFF //TX_MICMUTE_B_POST_FLT_ECHOH +930 0x0400 //TX_MICMUTE_C_POST_FLT_MASK +931 0x7999 //TX_MICMUTE_RATIODTL_CUT_TH +932 0x0258 //TX_MICMUTE_DT_CUT_K1 +933 0x0800 //TX_MICMUTE_N2_SN_EST +934 0xFC00 //TX_MICMUTE_THR_SN_EST_0 +935 0x001C //TX_MICMUTE_MIN_G_CTRL_0 +936 0x6000 //TX_MICMUTE_A_POST_FILT_S_0 +937 0x7000 //TX_MICMUTE_B_POST_FILT_0 +938 0x2710 //TX_MIC1RUB_AMP_THR +939 0x0010 //TX_MIC1MUTE_RATIO_THR +940 0x0450 //TX_MIC1MUTE_AMP_THR +941 0x0008 //TX_MIC1MUTE_CVG_TIME +942 0x0008 //TX_MIC1MUTE_RELEASE_TIME +943 0x0000 //TX_AMS_RESRV_01 +944 0x0000 //TX_AMS_RESRV_02 +945 0x0000 //TX_AMS_RESRV_03 +946 0x0000 //TX_AMS_RESRV_04 +947 0x0000 //TX_AMS_RESRV_05 +948 0x0000 //TX_AMS_RESRV_06 +949 0x0000 //TX_AMS_RESRV_07 +950 0x0000 //TX_AMS_RESRV_08 +951 0x0000 //TX_AMS_RESRV_09 +952 0x0000 //TX_AMS_RESRV_10 +953 0x0000 //TX_AMS_RESRV_11 +954 0x0000 //TX_AMS_RESRV_12 +955 0x0000 //TX_AMS_RESRV_13 +956 0x0000 //TX_AMS_RESRV_14 +957 0x0000 //TX_AMS_RESRV_15 +958 0x0000 //TX_AMS_RESRV_16 +959 0x0000 //TX_AMS_RESRV_17 +960 0x0000 //TX_AMS_RESRV_18 +961 0x0000 //TX_AMS_RESRV_19 #RX -0 0x002C //RX_RECVFUNC_MODE_0 +0 0x202C //RX_RECVFUNC_MODE_0 1 0x0000 //RX_RECVFUNC_MODE_1 2 0x0003 //RX_SAMPLINGFREQ_SIG 3 0x0003 //RX_SAMPLINGFREQ_PROC @@ -12280,11 +17841,862 @@ 110 0x0000 //RX_FDDRC_RESRV_0 129 0x0100 //RX_SPK_VOL 130 0x0000 //RX_VOL_RESRV_0 +#RX 2 +157 0x202C //RX_RECVFUNC_MODE_0 +158 0x0000 //RX_RECVFUNC_MODE_1 +159 0x0003 //RX_SAMPLINGFREQ_SIG +160 0x0003 //RX_SAMPLINGFREQ_PROC +161 0x000A //RX_FRAME_SZ +162 0x0000 //RX_DELAY_OPT +163 0x5000 //RX_TDDRC_ALPHA_UP_1 +164 0x5000 //RX_TDDRC_ALPHA_UP_2 +165 0x5000 //RX_TDDRC_ALPHA_UP_3 +166 0x2000 //RX_TDDRC_ALPHA_UP_4 +167 0x0800 //RX_PGA +168 0x7FFF //RX_A_HP +169 0x0000 //RX_B_PE +170 0x1800 //RX_THR_PITCH_DET_0 +171 0x1000 //RX_THR_PITCH_DET_1 +172 0x0800 //RX_THR_PITCH_DET_2 +173 0x0008 //RX_PITCH_BFR_LEN +174 0x0003 //RX_SBD_PITCH_DET +175 0x0100 //RX_PP_RESRV_0 +176 0x0020 //RX_PP_RESRV_1 +177 0x0400 //RX_N_SN_EST +178 0x000C //RX_N2_SN_EST +179 0x0003 //RX_NS_LVL_CTRL +180 0x9000 //RX_THR_SN_EST +181 0x7CCD //RX_LAMBDA_PFILT +182 0x000A //RX_FENS_RESRV_0 +183 0x0190 //RX_FENS_RESRV_1 +184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +187 0x0002 //RX_EXTRA_NS_L +188 0x0800 //RX_EXTRA_NS_A +189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +190 0x65AD //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +192 0x199A //RX_A_POST_FLT +193 0x0000 //RX_LMT_THRD +194 0x4000 //RX_LMT_ALPHA +195 0x0020 //RX_FDEQ_SUBNUM +196 0x4848 //RX_FDEQ_GAIN_0 +197 0x4848 //RX_FDEQ_GAIN_1 +198 0x4848 //RX_FDEQ_GAIN_2 +199 0x4848 //RX_FDEQ_GAIN_3 +200 0x4848 //RX_FDEQ_GAIN_4 +201 0x4848 //RX_FDEQ_GAIN_5 +202 0x4848 //RX_FDEQ_GAIN_6 +203 0x4848 //RX_FDEQ_GAIN_7 +204 0x4848 //RX_FDEQ_GAIN_8 +205 0x4848 //RX_FDEQ_GAIN_9 +206 0x4848 //RX_FDEQ_GAIN_10 +207 0x4848 //RX_FDEQ_GAIN_11 +208 0x4848 //RX_FDEQ_GAIN_12 +209 0x4848 //RX_FDEQ_GAIN_13 +210 0x4848 //RX_FDEQ_GAIN_14 +211 0x4848 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0202 //RX_FDEQ_BIN_0 +221 0x0203 //RX_FDEQ_BIN_1 +222 0x0303 //RX_FDEQ_BIN_2 +223 0x0304 //RX_FDEQ_BIN_3 +224 0x0405 //RX_FDEQ_BIN_4 +225 0x0506 //RX_FDEQ_BIN_5 +226 0x0708 //RX_FDEQ_BIN_6 +227 0x090A //RX_FDEQ_BIN_7 +228 0x0B0C //RX_FDEQ_BIN_8 +229 0x0D0E //RX_FDEQ_BIN_9 +230 0x1013 //RX_FDEQ_BIN_10 +231 0x1719 //RX_FDEQ_BIN_11 +232 0x1B1E //RX_FDEQ_BIN_12 +233 0x1E1E //RX_FDEQ_BIN_13 +234 0x1E28 //RX_FDEQ_BIN_14 +235 0x282C //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x4000 //RX_FDEQ_RESRV_0 +245 0x0320 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0030 //RX_FDDRC_BAND_MARGIN_1 +248 0x0050 //RX_FDDRC_BAND_MARGIN_2 +249 0x0080 //RX_FDDRC_BAND_MARGIN_3 +250 0x0007 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x5000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x6400 //RX_FDDRC_THRD_3_2 +258 0x6400 //RX_FDDRC_THRD_3_3 +259 0x2000 //RX_FDDRC_SLANT_0_0 +260 0x2000 //RX_FDDRC_SLANT_0_1 +261 0x2000 //RX_FDDRC_SLANT_0_2 +262 0x2000 //RX_FDDRC_SLANT_0_3 +263 0x5333 //RX_FDDRC_SLANT_1_0 +264 0x5333 //RX_FDDRC_SLANT_1_1 +265 0x5333 //RX_FDDRC_SLANT_1_2 +266 0x5333 //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +268 0x0002 //RX_FILTINDX +269 0x0000 //RX_TDDRC_THRD_0 +270 0x0000 //RX_TDDRC_THRD_1 +271 0x1A00 //RX_TDDRC_THRD_2 +272 0x1A00 //RX_TDDRC_THRD_3 +273 0x3000 //RX_TDDRC_SLANT_0 +274 0x7EB8 //RX_TDDRC_SLANT_1 +275 0x5000 //RX_TDDRC_ALPHA_UP_0 +276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x199A //RX_TDDRC_HMNC_GAIN +279 0x0001 //RX_TDDRC_SMT_FLAG +280 0x0CCD //RX_TDDRC_SMT_W +281 0x01C8 //RX_TDDRC_DRC_GAIN +282 0x7C00 //RX_LAMBDA_PKA_FP +283 0x2000 //RX_TPKA_FP +284 0x2000 //RX_MIN_G_FP +285 0x0080 //RX_MAX_G_FP +286 0x000B //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 +288 0x0000 //RX_MAXLEVEL_CNG +289 0x3000 //RX_BWE_UV_TH +290 0x3000 //RX_BWE_UV_TH2 +291 0x1800 //RX_BWE_UV_TH3 +292 0x1000 //RX_BWE_V_TH +293 0x04CD //RX_BWE_GAIN1_V_TH1 +294 0x0F33 //RX_BWE_GAIN1_V_TH2 +295 0x7333 //RX_BWE_UV_EQ +296 0x199A //RX_BWE_V_EQ +297 0x7333 //RX_BWE_TONE_TH +298 0x0004 //RX_BWE_UV_HOLD_T +299 0x6CCD //RX_BWE_GAIN2_ALPHA +300 0x799A //RX_BWE_GAIN3_ALPHA +301 0x001E //RX_BWE_CUTOFF +302 0x3000 //RX_BWE_GAINFILL +303 0x3200 //RX_BWE_MAXTH_TONE +304 0x2000 //RX_BWE_EQ_0 +305 0x2000 //RX_BWE_EQ_1 +306 0x2000 //RX_BWE_EQ_2 +307 0x2000 //RX_BWE_EQ_3 +308 0x2000 //RX_BWE_EQ_4 +309 0x2000 //RX_BWE_EQ_5 +310 0x2000 //RX_BWE_EQ_6 +311 0x0000 //RX_BWE_RESRV_0 +312 0x0000 //RX_BWE_RESRV_1 +313 0x0000 //RX_BWE_RESRV_2 +#VOL 0 +163 0x5000 //RX_TDDRC_ALPHA_UP_1 +164 0x5000 //RX_TDDRC_ALPHA_UP_2 +165 0x5000 //RX_TDDRC_ALPHA_UP_3 +166 0x2000 //RX_TDDRC_ALPHA_UP_4 +184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +190 0x65AD //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +269 0x0000 //RX_TDDRC_THRD_0 +270 0x0000 //RX_TDDRC_THRD_1 +271 0x1A00 //RX_TDDRC_THRD_2 +272 0x1A00 //RX_TDDRC_THRD_3 +273 0x3000 //RX_TDDRC_SLANT_0 +274 0x7EB8 //RX_TDDRC_SLANT_1 +275 0x5000 //RX_TDDRC_ALPHA_UP_0 +276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x199A //RX_TDDRC_HMNC_GAIN +279 0x0001 //RX_TDDRC_SMT_FLAG +280 0x0CCD //RX_TDDRC_SMT_W +281 0x01C8 //RX_TDDRC_DRC_GAIN +195 0x0020 //RX_FDEQ_SUBNUM +196 0x4848 //RX_FDEQ_GAIN_0 +197 0x4848 //RX_FDEQ_GAIN_1 +198 0x4848 //RX_FDEQ_GAIN_2 +199 0x4848 //RX_FDEQ_GAIN_3 +200 0x4848 //RX_FDEQ_GAIN_4 +201 0x4848 //RX_FDEQ_GAIN_5 +202 0x4848 //RX_FDEQ_GAIN_6 +203 0x4848 //RX_FDEQ_GAIN_7 +204 0x4848 //RX_FDEQ_GAIN_8 +205 0x4848 //RX_FDEQ_GAIN_9 +206 0x4848 //RX_FDEQ_GAIN_10 +207 0x4848 //RX_FDEQ_GAIN_11 +208 0x4848 //RX_FDEQ_GAIN_12 +209 0x4848 //RX_FDEQ_GAIN_13 +210 0x4848 //RX_FDEQ_GAIN_14 +211 0x4848 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0202 //RX_FDEQ_BIN_0 +221 0x0203 //RX_FDEQ_BIN_1 +222 0x0303 //RX_FDEQ_BIN_2 +223 0x0304 //RX_FDEQ_BIN_3 +224 0x0405 //RX_FDEQ_BIN_4 +225 0x0506 //RX_FDEQ_BIN_5 +226 0x0708 //RX_FDEQ_BIN_6 +227 0x090A //RX_FDEQ_BIN_7 +228 0x0B0C //RX_FDEQ_BIN_8 +229 0x0D0E //RX_FDEQ_BIN_9 +230 0x1013 //RX_FDEQ_BIN_10 +231 0x1719 //RX_FDEQ_BIN_11 +232 0x1B1E //RX_FDEQ_BIN_12 +233 0x1E1E //RX_FDEQ_BIN_13 +234 0x1E28 //RX_FDEQ_BIN_14 +235 0x282C //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x4000 //RX_FDEQ_RESRV_0 +245 0x0320 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0030 //RX_FDDRC_BAND_MARGIN_1 +248 0x0050 //RX_FDDRC_BAND_MARGIN_2 +249 0x0080 //RX_FDDRC_BAND_MARGIN_3 +250 0x0007 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x5000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x6400 //RX_FDDRC_THRD_3_2 +258 0x6400 //RX_FDDRC_THRD_3_3 +259 0x2000 //RX_FDDRC_SLANT_0_0 +260 0x2000 //RX_FDDRC_SLANT_0_1 +261 0x2000 //RX_FDDRC_SLANT_0_2 +262 0x2000 //RX_FDDRC_SLANT_0_3 +263 0x5333 //RX_FDDRC_SLANT_1_0 +264 0x5333 //RX_FDDRC_SLANT_1_1 +265 0x5333 //RX_FDDRC_SLANT_1_2 +266 0x5333 //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +286 0x000B //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 +#VOL 1 +163 0x5000 //RX_TDDRC_ALPHA_UP_1 +164 0x5000 //RX_TDDRC_ALPHA_UP_2 +165 0x5000 //RX_TDDRC_ALPHA_UP_3 +166 0x2000 //RX_TDDRC_ALPHA_UP_4 +184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +190 0x65AD //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +269 0x0000 //RX_TDDRC_THRD_0 +270 0x0000 //RX_TDDRC_THRD_1 +271 0x1A00 //RX_TDDRC_THRD_2 +272 0x1A00 //RX_TDDRC_THRD_3 +273 0x3000 //RX_TDDRC_SLANT_0 +274 0x7EB8 //RX_TDDRC_SLANT_1 +275 0x5000 //RX_TDDRC_ALPHA_UP_0 +276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x199A //RX_TDDRC_HMNC_GAIN +279 0x0001 //RX_TDDRC_SMT_FLAG +280 0x0CCD //RX_TDDRC_SMT_W +281 0x01C8 //RX_TDDRC_DRC_GAIN +195 0x0020 //RX_FDEQ_SUBNUM +196 0x4848 //RX_FDEQ_GAIN_0 +197 0x4848 //RX_FDEQ_GAIN_1 +198 0x4848 //RX_FDEQ_GAIN_2 +199 0x4848 //RX_FDEQ_GAIN_3 +200 0x4848 //RX_FDEQ_GAIN_4 +201 0x4848 //RX_FDEQ_GAIN_5 +202 0x4848 //RX_FDEQ_GAIN_6 +203 0x4848 //RX_FDEQ_GAIN_7 +204 0x4848 //RX_FDEQ_GAIN_8 +205 0x4848 //RX_FDEQ_GAIN_9 +206 0x4848 //RX_FDEQ_GAIN_10 +207 0x4848 //RX_FDEQ_GAIN_11 +208 0x4848 //RX_FDEQ_GAIN_12 +209 0x4848 //RX_FDEQ_GAIN_13 +210 0x4848 //RX_FDEQ_GAIN_14 +211 0x4848 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0202 //RX_FDEQ_BIN_0 +221 0x0203 //RX_FDEQ_BIN_1 +222 0x0303 //RX_FDEQ_BIN_2 +223 0x0304 //RX_FDEQ_BIN_3 +224 0x0405 //RX_FDEQ_BIN_4 +225 0x0506 //RX_FDEQ_BIN_5 +226 0x0708 //RX_FDEQ_BIN_6 +227 0x090A //RX_FDEQ_BIN_7 +228 0x0B0C //RX_FDEQ_BIN_8 +229 0x0D0E //RX_FDEQ_BIN_9 +230 0x1013 //RX_FDEQ_BIN_10 +231 0x1719 //RX_FDEQ_BIN_11 +232 0x1B1E //RX_FDEQ_BIN_12 +233 0x1E1E //RX_FDEQ_BIN_13 +234 0x1E28 //RX_FDEQ_BIN_14 +235 0x282C //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x4000 //RX_FDEQ_RESRV_0 +245 0x0320 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0030 //RX_FDDRC_BAND_MARGIN_1 +248 0x0050 //RX_FDDRC_BAND_MARGIN_2 +249 0x0080 //RX_FDDRC_BAND_MARGIN_3 +250 0x0007 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x5000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x6400 //RX_FDDRC_THRD_3_2 +258 0x6400 //RX_FDDRC_THRD_3_3 +259 0x2000 //RX_FDDRC_SLANT_0_0 +260 0x2000 //RX_FDDRC_SLANT_0_1 +261 0x2000 //RX_FDDRC_SLANT_0_2 +262 0x2000 //RX_FDDRC_SLANT_0_3 +263 0x5333 //RX_FDDRC_SLANT_1_0 +264 0x5333 //RX_FDDRC_SLANT_1_1 +265 0x5333 //RX_FDDRC_SLANT_1_2 +266 0x5333 //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +286 0x0013 //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 +#VOL 2 +163 0x5000 //RX_TDDRC_ALPHA_UP_1 +164 0x5000 //RX_TDDRC_ALPHA_UP_2 +165 0x5000 //RX_TDDRC_ALPHA_UP_3 +166 0x2000 //RX_TDDRC_ALPHA_UP_4 +184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +190 0x65AD //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +269 0x0000 //RX_TDDRC_THRD_0 +270 0x0000 //RX_TDDRC_THRD_1 +271 0x1A00 //RX_TDDRC_THRD_2 +272 0x1A00 //RX_TDDRC_THRD_3 +273 0x3000 //RX_TDDRC_SLANT_0 +274 0x7EB8 //RX_TDDRC_SLANT_1 +275 0x5000 //RX_TDDRC_ALPHA_UP_0 +276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x199A //RX_TDDRC_HMNC_GAIN +279 0x0001 //RX_TDDRC_SMT_FLAG +280 0x0CCD //RX_TDDRC_SMT_W +281 0x01C8 //RX_TDDRC_DRC_GAIN +195 0x0020 //RX_FDEQ_SUBNUM +196 0x4848 //RX_FDEQ_GAIN_0 +197 0x4848 //RX_FDEQ_GAIN_1 +198 0x4848 //RX_FDEQ_GAIN_2 +199 0x4848 //RX_FDEQ_GAIN_3 +200 0x4848 //RX_FDEQ_GAIN_4 +201 0x4848 //RX_FDEQ_GAIN_5 +202 0x4848 //RX_FDEQ_GAIN_6 +203 0x4848 //RX_FDEQ_GAIN_7 +204 0x4848 //RX_FDEQ_GAIN_8 +205 0x4848 //RX_FDEQ_GAIN_9 +206 0x4848 //RX_FDEQ_GAIN_10 +207 0x4848 //RX_FDEQ_GAIN_11 +208 0x4848 //RX_FDEQ_GAIN_12 +209 0x4848 //RX_FDEQ_GAIN_13 +210 0x4848 //RX_FDEQ_GAIN_14 +211 0x4848 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0202 //RX_FDEQ_BIN_0 +221 0x0203 //RX_FDEQ_BIN_1 +222 0x0303 //RX_FDEQ_BIN_2 +223 0x0304 //RX_FDEQ_BIN_3 +224 0x0405 //RX_FDEQ_BIN_4 +225 0x0506 //RX_FDEQ_BIN_5 +226 0x0708 //RX_FDEQ_BIN_6 +227 0x090A //RX_FDEQ_BIN_7 +228 0x0B0C //RX_FDEQ_BIN_8 +229 0x0D0E //RX_FDEQ_BIN_9 +230 0x1013 //RX_FDEQ_BIN_10 +231 0x1719 //RX_FDEQ_BIN_11 +232 0x1B1E //RX_FDEQ_BIN_12 +233 0x1E1E //RX_FDEQ_BIN_13 +234 0x1E28 //RX_FDEQ_BIN_14 +235 0x282C //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x4000 //RX_FDEQ_RESRV_0 +245 0x0320 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0030 //RX_FDDRC_BAND_MARGIN_1 +248 0x0050 //RX_FDDRC_BAND_MARGIN_2 +249 0x0080 //RX_FDDRC_BAND_MARGIN_3 +250 0x0007 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x5000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x6400 //RX_FDDRC_THRD_3_2 +258 0x6400 //RX_FDDRC_THRD_3_3 +259 0x2000 //RX_FDDRC_SLANT_0_0 +260 0x2000 //RX_FDDRC_SLANT_0_1 +261 0x2000 //RX_FDDRC_SLANT_0_2 +262 0x2000 //RX_FDDRC_SLANT_0_3 +263 0x5333 //RX_FDDRC_SLANT_1_0 +264 0x5333 //RX_FDDRC_SLANT_1_1 +265 0x5333 //RX_FDDRC_SLANT_1_2 +266 0x5333 //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +286 0x0020 //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 +#VOL 3 +163 0x5000 //RX_TDDRC_ALPHA_UP_1 +164 0x5000 //RX_TDDRC_ALPHA_UP_2 +165 0x5000 //RX_TDDRC_ALPHA_UP_3 +166 0x2000 //RX_TDDRC_ALPHA_UP_4 +184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +190 0x65AD //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +269 0x0000 //RX_TDDRC_THRD_0 +270 0x0000 //RX_TDDRC_THRD_1 +271 0x1A00 //RX_TDDRC_THRD_2 +272 0x1A00 //RX_TDDRC_THRD_3 +273 0x3000 //RX_TDDRC_SLANT_0 +274 0x7EB8 //RX_TDDRC_SLANT_1 +275 0x5000 //RX_TDDRC_ALPHA_UP_0 +276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x199A //RX_TDDRC_HMNC_GAIN +279 0x0001 //RX_TDDRC_SMT_FLAG +280 0x0CCD //RX_TDDRC_SMT_W +281 0x01C8 //RX_TDDRC_DRC_GAIN +195 0x0020 //RX_FDEQ_SUBNUM +196 0x4848 //RX_FDEQ_GAIN_0 +197 0x4848 //RX_FDEQ_GAIN_1 +198 0x4848 //RX_FDEQ_GAIN_2 +199 0x4848 //RX_FDEQ_GAIN_3 +200 0x4848 //RX_FDEQ_GAIN_4 +201 0x4848 //RX_FDEQ_GAIN_5 +202 0x4848 //RX_FDEQ_GAIN_6 +203 0x4848 //RX_FDEQ_GAIN_7 +204 0x4848 //RX_FDEQ_GAIN_8 +205 0x4848 //RX_FDEQ_GAIN_9 +206 0x4848 //RX_FDEQ_GAIN_10 +207 0x4848 //RX_FDEQ_GAIN_11 +208 0x4848 //RX_FDEQ_GAIN_12 +209 0x4848 //RX_FDEQ_GAIN_13 +210 0x4848 //RX_FDEQ_GAIN_14 +211 0x4848 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0202 //RX_FDEQ_BIN_0 +221 0x0203 //RX_FDEQ_BIN_1 +222 0x0303 //RX_FDEQ_BIN_2 +223 0x0304 //RX_FDEQ_BIN_3 +224 0x0405 //RX_FDEQ_BIN_4 +225 0x0506 //RX_FDEQ_BIN_5 +226 0x0708 //RX_FDEQ_BIN_6 +227 0x090A //RX_FDEQ_BIN_7 +228 0x0B0C //RX_FDEQ_BIN_8 +229 0x0D0E //RX_FDEQ_BIN_9 +230 0x1013 //RX_FDEQ_BIN_10 +231 0x1719 //RX_FDEQ_BIN_11 +232 0x1B1E //RX_FDEQ_BIN_12 +233 0x1E1E //RX_FDEQ_BIN_13 +234 0x1E28 //RX_FDEQ_BIN_14 +235 0x282C //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x4000 //RX_FDEQ_RESRV_0 +245 0x0320 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0030 //RX_FDDRC_BAND_MARGIN_1 +248 0x0050 //RX_FDDRC_BAND_MARGIN_2 +249 0x0080 //RX_FDDRC_BAND_MARGIN_3 +250 0x0007 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x5000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x6400 //RX_FDDRC_THRD_3_2 +258 0x6400 //RX_FDDRC_THRD_3_3 +259 0x2000 //RX_FDDRC_SLANT_0_0 +260 0x2000 //RX_FDDRC_SLANT_0_1 +261 0x2000 //RX_FDDRC_SLANT_0_2 +262 0x2000 //RX_FDDRC_SLANT_0_3 +263 0x5333 //RX_FDDRC_SLANT_1_0 +264 0x5333 //RX_FDDRC_SLANT_1_1 +265 0x5333 //RX_FDDRC_SLANT_1_2 +266 0x5333 //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +286 0x0036 //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 +#VOL 4 +163 0x5000 //RX_TDDRC_ALPHA_UP_1 +164 0x5000 //RX_TDDRC_ALPHA_UP_2 +165 0x5000 //RX_TDDRC_ALPHA_UP_3 +166 0x2000 //RX_TDDRC_ALPHA_UP_4 +184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +190 0x65AD //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +269 0x0000 //RX_TDDRC_THRD_0 +270 0x0000 //RX_TDDRC_THRD_1 +271 0x1A00 //RX_TDDRC_THRD_2 +272 0x1A00 //RX_TDDRC_THRD_3 +273 0x3000 //RX_TDDRC_SLANT_0 +274 0x7EB8 //RX_TDDRC_SLANT_1 +275 0x5000 //RX_TDDRC_ALPHA_UP_0 +276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x199A //RX_TDDRC_HMNC_GAIN +279 0x0001 //RX_TDDRC_SMT_FLAG +280 0x0CCD //RX_TDDRC_SMT_W +281 0x01C8 //RX_TDDRC_DRC_GAIN +195 0x0020 //RX_FDEQ_SUBNUM +196 0x4848 //RX_FDEQ_GAIN_0 +197 0x4848 //RX_FDEQ_GAIN_1 +198 0x4848 //RX_FDEQ_GAIN_2 +199 0x4848 //RX_FDEQ_GAIN_3 +200 0x4848 //RX_FDEQ_GAIN_4 +201 0x4848 //RX_FDEQ_GAIN_5 +202 0x4848 //RX_FDEQ_GAIN_6 +203 0x4848 //RX_FDEQ_GAIN_7 +204 0x4848 //RX_FDEQ_GAIN_8 +205 0x4848 //RX_FDEQ_GAIN_9 +206 0x4848 //RX_FDEQ_GAIN_10 +207 0x4848 //RX_FDEQ_GAIN_11 +208 0x4848 //RX_FDEQ_GAIN_12 +209 0x4848 //RX_FDEQ_GAIN_13 +210 0x4848 //RX_FDEQ_GAIN_14 +211 0x4848 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0202 //RX_FDEQ_BIN_0 +221 0x0203 //RX_FDEQ_BIN_1 +222 0x0303 //RX_FDEQ_BIN_2 +223 0x0304 //RX_FDEQ_BIN_3 +224 0x0405 //RX_FDEQ_BIN_4 +225 0x0506 //RX_FDEQ_BIN_5 +226 0x0708 //RX_FDEQ_BIN_6 +227 0x090A //RX_FDEQ_BIN_7 +228 0x0B0C //RX_FDEQ_BIN_8 +229 0x0D0E //RX_FDEQ_BIN_9 +230 0x1013 //RX_FDEQ_BIN_10 +231 0x1719 //RX_FDEQ_BIN_11 +232 0x1B1E //RX_FDEQ_BIN_12 +233 0x1E1E //RX_FDEQ_BIN_13 +234 0x1E28 //RX_FDEQ_BIN_14 +235 0x282C //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x4000 //RX_FDEQ_RESRV_0 +245 0x0320 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0030 //RX_FDDRC_BAND_MARGIN_1 +248 0x0050 //RX_FDDRC_BAND_MARGIN_2 +249 0x0080 //RX_FDDRC_BAND_MARGIN_3 +250 0x0007 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x5000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x6400 //RX_FDDRC_THRD_3_2 +258 0x6400 //RX_FDDRC_THRD_3_3 +259 0x2000 //RX_FDDRC_SLANT_0_0 +260 0x2000 //RX_FDDRC_SLANT_0_1 +261 0x2000 //RX_FDDRC_SLANT_0_2 +262 0x2000 //RX_FDDRC_SLANT_0_3 +263 0x5333 //RX_FDDRC_SLANT_1_0 +264 0x5333 //RX_FDDRC_SLANT_1_1 +265 0x5333 //RX_FDDRC_SLANT_1_2 +266 0x5333 //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +286 0x005B //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 +#VOL 5 +163 0x5000 //RX_TDDRC_ALPHA_UP_1 +164 0x5000 //RX_TDDRC_ALPHA_UP_2 +165 0x5000 //RX_TDDRC_ALPHA_UP_3 +166 0x2000 //RX_TDDRC_ALPHA_UP_4 +184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +190 0x65AD //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +269 0x0000 //RX_TDDRC_THRD_0 +270 0x0000 //RX_TDDRC_THRD_1 +271 0x1A00 //RX_TDDRC_THRD_2 +272 0x1A00 //RX_TDDRC_THRD_3 +273 0x3000 //RX_TDDRC_SLANT_0 +274 0x7EB8 //RX_TDDRC_SLANT_1 +275 0x5000 //RX_TDDRC_ALPHA_UP_0 +276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x199A //RX_TDDRC_HMNC_GAIN +279 0x0001 //RX_TDDRC_SMT_FLAG +280 0x0CCD //RX_TDDRC_SMT_W +281 0x01C8 //RX_TDDRC_DRC_GAIN +195 0x0020 //RX_FDEQ_SUBNUM +196 0x4848 //RX_FDEQ_GAIN_0 +197 0x4848 //RX_FDEQ_GAIN_1 +198 0x4848 //RX_FDEQ_GAIN_2 +199 0x4848 //RX_FDEQ_GAIN_3 +200 0x4848 //RX_FDEQ_GAIN_4 +201 0x4848 //RX_FDEQ_GAIN_5 +202 0x4848 //RX_FDEQ_GAIN_6 +203 0x4848 //RX_FDEQ_GAIN_7 +204 0x4848 //RX_FDEQ_GAIN_8 +205 0x4848 //RX_FDEQ_GAIN_9 +206 0x4848 //RX_FDEQ_GAIN_10 +207 0x4848 //RX_FDEQ_GAIN_11 +208 0x4848 //RX_FDEQ_GAIN_12 +209 0x4848 //RX_FDEQ_GAIN_13 +210 0x4848 //RX_FDEQ_GAIN_14 +211 0x4848 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0202 //RX_FDEQ_BIN_0 +221 0x0203 //RX_FDEQ_BIN_1 +222 0x0303 //RX_FDEQ_BIN_2 +223 0x0304 //RX_FDEQ_BIN_3 +224 0x0405 //RX_FDEQ_BIN_4 +225 0x0506 //RX_FDEQ_BIN_5 +226 0x0708 //RX_FDEQ_BIN_6 +227 0x090A //RX_FDEQ_BIN_7 +228 0x0B0C //RX_FDEQ_BIN_8 +229 0x0D0E //RX_FDEQ_BIN_9 +230 0x1013 //RX_FDEQ_BIN_10 +231 0x1719 //RX_FDEQ_BIN_11 +232 0x1B1E //RX_FDEQ_BIN_12 +233 0x1E1E //RX_FDEQ_BIN_13 +234 0x1E28 //RX_FDEQ_BIN_14 +235 0x282C //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x4000 //RX_FDEQ_RESRV_0 +245 0x0320 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0030 //RX_FDDRC_BAND_MARGIN_1 +248 0x0050 //RX_FDDRC_BAND_MARGIN_2 +249 0x0080 //RX_FDDRC_BAND_MARGIN_3 +250 0x0007 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x5000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x6400 //RX_FDDRC_THRD_3_2 +258 0x6400 //RX_FDDRC_THRD_3_3 +259 0x2000 //RX_FDDRC_SLANT_0_0 +260 0x2000 //RX_FDDRC_SLANT_0_1 +261 0x2000 //RX_FDDRC_SLANT_0_2 +262 0x2000 //RX_FDDRC_SLANT_0_3 +263 0x5333 //RX_FDDRC_SLANT_1_0 +264 0x5333 //RX_FDDRC_SLANT_1_1 +265 0x5333 //RX_FDDRC_SLANT_1_2 +266 0x5333 //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +286 0x0099 //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 +#VOL 6 +163 0x5000 //RX_TDDRC_ALPHA_UP_1 +164 0x5000 //RX_TDDRC_ALPHA_UP_2 +165 0x5000 //RX_TDDRC_ALPHA_UP_3 +166 0x2000 //RX_TDDRC_ALPHA_UP_4 +184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +190 0x65AD //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +269 0x0000 //RX_TDDRC_THRD_0 +270 0x0000 //RX_TDDRC_THRD_1 +271 0x1A00 //RX_TDDRC_THRD_2 +272 0x1A00 //RX_TDDRC_THRD_3 +273 0x3000 //RX_TDDRC_SLANT_0 +274 0x7EB8 //RX_TDDRC_SLANT_1 +275 0x5000 //RX_TDDRC_ALPHA_UP_0 +276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x199A //RX_TDDRC_HMNC_GAIN +279 0x0001 //RX_TDDRC_SMT_FLAG +280 0x0CCD //RX_TDDRC_SMT_W +281 0x01C8 //RX_TDDRC_DRC_GAIN +195 0x0020 //RX_FDEQ_SUBNUM +196 0x4848 //RX_FDEQ_GAIN_0 +197 0x4848 //RX_FDEQ_GAIN_1 +198 0x4848 //RX_FDEQ_GAIN_2 +199 0x4848 //RX_FDEQ_GAIN_3 +200 0x4848 //RX_FDEQ_GAIN_4 +201 0x4848 //RX_FDEQ_GAIN_5 +202 0x4848 //RX_FDEQ_GAIN_6 +203 0x4848 //RX_FDEQ_GAIN_7 +204 0x4848 //RX_FDEQ_GAIN_8 +205 0x4848 //RX_FDEQ_GAIN_9 +206 0x4848 //RX_FDEQ_GAIN_10 +207 0x4848 //RX_FDEQ_GAIN_11 +208 0x4848 //RX_FDEQ_GAIN_12 +209 0x4848 //RX_FDEQ_GAIN_13 +210 0x4848 //RX_FDEQ_GAIN_14 +211 0x4848 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0202 //RX_FDEQ_BIN_0 +221 0x0203 //RX_FDEQ_BIN_1 +222 0x0303 //RX_FDEQ_BIN_2 +223 0x0304 //RX_FDEQ_BIN_3 +224 0x0405 //RX_FDEQ_BIN_4 +225 0x0506 //RX_FDEQ_BIN_5 +226 0x0708 //RX_FDEQ_BIN_6 +227 0x090A //RX_FDEQ_BIN_7 +228 0x0B0C //RX_FDEQ_BIN_8 +229 0x0D0E //RX_FDEQ_BIN_9 +230 0x1013 //RX_FDEQ_BIN_10 +231 0x1719 //RX_FDEQ_BIN_11 +232 0x1B1E //RX_FDEQ_BIN_12 +233 0x1E1E //RX_FDEQ_BIN_13 +234 0x1E28 //RX_FDEQ_BIN_14 +235 0x282C //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x4000 //RX_FDEQ_RESRV_0 +245 0x0320 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0030 //RX_FDDRC_BAND_MARGIN_1 +248 0x0050 //RX_FDDRC_BAND_MARGIN_2 +249 0x0080 //RX_FDDRC_BAND_MARGIN_3 +250 0x0007 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x5000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x6400 //RX_FDDRC_THRD_3_2 +258 0x6400 //RX_FDDRC_THRD_3_3 +259 0x2000 //RX_FDDRC_SLANT_0_0 +260 0x2000 //RX_FDDRC_SLANT_0_1 +261 0x2000 //RX_FDDRC_SLANT_0_2 +262 0x2000 //RX_FDDRC_SLANT_0_3 +263 0x5333 //RX_FDDRC_SLANT_1_0 +264 0x5333 //RX_FDDRC_SLANT_1_1 +265 0x5333 //RX_FDDRC_SLANT_1_2 +266 0x5333 //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +286 0x0100 //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 #CASE_NAME HEADSET-GOOGLE_CONDOR-VOICE_GENERIC-FB -#PARAM_MODE FULL -#PARAM_TYPE TX+RX -#TOTAL_CUSTOM_STEP 7 +#PARAM_MODE Full +#PARAM_TYPE TX+2RX +#TOTAL_CUSTOM_STEP 7+7 #TX 0 0x0009 //TX_OPERATION_MODE_0 1 0x0009 //TX_OPERATION_MODE_1 @@ -12537,10 +18949,10 @@ 248 0xF600 //TX_THR_SN_EST_6 249 0xF600 //TX_THR_SN_EST_7 250 0x0200 //TX_DELTA_THR_SN_EST_0 -251 0x0200 //TX_DELTA_THR_SN_EST_1 -252 0x0400 //TX_DELTA_THR_SN_EST_2 -253 0x0300 //TX_DELTA_THR_SN_EST_3 -254 0x0600 //TX_DELTA_THR_SN_EST_4 +251 0x0400 //TX_DELTA_THR_SN_EST_1 +252 0x0300 //TX_DELTA_THR_SN_EST_2 +253 0x0600 //TX_DELTA_THR_SN_EST_3 +254 0x0200 //TX_DELTA_THR_SN_EST_4 255 0x0200 //TX_DELTA_THR_SN_EST_5 256 0x0200 //TX_DELTA_THR_SN_EST_6 257 0x0200 //TX_DELTA_THR_SN_EST_7 @@ -12568,31 +18980,31 @@ 279 0x2000 //TX_B_POST_FLT_0 280 0x2000 //TX_B_POST_FLT_1 281 0x0012 //TX_NS_LVL_CTRL_0 -282 0x0019 //TX_NS_LVL_CTRL_1 +282 0x0016 //TX_NS_LVL_CTRL_1 283 0x0016 //TX_NS_LVL_CTRL_2 -284 0x0016 //TX_NS_LVL_CTRL_3 -285 0x0019 //TX_NS_LVL_CTRL_4 +284 0x0019 //TX_NS_LVL_CTRL_3 +285 0x0010 //TX_NS_LVL_CTRL_4 286 0x0010 //TX_NS_LVL_CTRL_5 -287 0x0010 //TX_NS_LVL_CTRL_6 +287 0x0019 //TX_NS_LVL_CTRL_6 288 0x0010 //TX_NS_LVL_CTRL_7 289 0x000C //TX_MIN_GAIN_S_0 -290 0x0011 //TX_MIN_GAIN_S_1 +290 0x000C //TX_MIN_GAIN_S_1 291 0x000C //TX_MIN_GAIN_S_2 -292 0x000C //TX_MIN_GAIN_S_3 -293 0x000F //TX_MIN_GAIN_S_4 +292 0x000F //TX_MIN_GAIN_S_3 +293 0x000C //TX_MIN_GAIN_S_4 294 0x000C //TX_MIN_GAIN_S_5 -295 0x000C //TX_MIN_GAIN_S_6 +295 0x0011 //TX_MIN_GAIN_S_6 296 0x000C //TX_MIN_GAIN_S_7 297 0x7FFF //TX_NMOS_SUP 298 0x0000 //TX_NS_MAX_PRI_SNR_TH 299 0x0000 //TX_NMOS_SUP_MENSA 300 0x7000 //TX_SNRI_SUP_0 -301 0x6000 //TX_SNRI_SUP_1 +301 0x7000 //TX_SNRI_SUP_1 302 0x7000 //TX_SNRI_SUP_2 -303 0x7000 //TX_SNRI_SUP_3 -304 0x6000 //TX_SNRI_SUP_4 +303 0x6000 //TX_SNRI_SUP_3 +304 0x7FFF //TX_SNRI_SUP_4 305 0x7FFF //TX_SNRI_SUP_5 -306 0x7FFF //TX_SNRI_SUP_6 +306 0x6000 //TX_SNRI_SUP_6 307 0x7FFF //TX_SNRI_SUP_7 308 0x7FFF //TX_THR_LFNS 309 0x0016 //TX_G_LFNS @@ -12609,8 +19021,8 @@ 320 0x6000 //TX_A_POST_FILT_S_6 321 0x6000 //TX_A_POST_FILT_S_7 322 0x2000 //TX_B_POST_FILT_0 -323 0x2000 //TX_B_POST_FILT_1 -324 0x4000 //TX_B_POST_FILT_2 +323 0x4000 //TX_B_POST_FILT_1 +324 0x2000 //TX_B_POST_FILT_2 325 0x2000 //TX_B_POST_FILT_3 326 0x2000 //TX_B_POST_FILT_4 327 0x2000 //TX_B_POST_FILT_5 @@ -12653,7 +19065,7 @@ 364 0x0000 //TX_K_APT 365 0x0001 //TX_NOISEDET 366 0x0190 //TX_NDETCT -367 0x0020 //TX_NOISE_TH_0 +367 0x04E8 //TX_NOISE_TH_0 368 0x7FFF //TX_NOISE_TH_0_2 369 0x7FFF //TX_NOISE_TH_0_3 370 0x02A6 //TX_NOISE_TH_1 @@ -12665,11 +19077,11 @@ 376 0x0001 //TX_NOISE_TH_5_3 377 0x0000 //TX_NOISE_TH_5_4 378 0x02BC //TX_NOISE_TH_6 -379 0x0020 //TX_MINENOISE_TH -380 0x4000 //TX_MINENOISE_MIC0_TH_MTS -381 0xFFEE //TX_MINENOISE_MIC0_TH_EXP -382 0x6000 //TX_MINENOISE_MIC0_S_TH_MTS -383 0xFFF3 //TX_MINENOISE_MIC0_S_TH_EXP +379 0x02BC //TX_MINENOISE_TH +380 0xD508 //TX_MORENS_TFMASK_TH +381 0x0001 //TX_DRC_QUIET_FLOOR +382 0x3A98 //TX_RATIODTL_CUT_TH +383 0x1482 //TX_DT_CUT_K1 384 0x0666 //TX_OUT_ENER_S_TH_CLEAN 385 0x0666 //TX_OUT_ENER_S_TH_LESSCLEAN 386 0x0333 //TX_OUT_ENER_S_TH_NOISY @@ -12677,22 +19089,22 @@ 388 0x0333 //TX_OUT_ENER_TH_SPEECH 389 0x2000 //TX_SN_NPB_GAIN 390 0x0000 //TX_NN_NPB_GAIN -391 0x0000 //TX_CSX_ALPHA_0 -392 0x0000 //TX_CSX_ALPHA_1 -393 0x0000 //TX_CSX_ALPHA_2 -394 0x0000 //TX_CSX_ALPHA_3 -395 0x0800 //TX_MU_ARSP_EST -396 0x00C8 //TX_P_OUTBEAM_MIN_TH +391 0x7FFF //TX_POST_MASK_SUP_HSNE +392 0x1388 //TX_TAIL_DET_TH +393 0x4000 //TX_B_LESSCUT_RTO_WTA +394 0x0000 //TX_MEL_G_R +395 0x0080 //TX_SUPHIGH_TH +396 0x0000 //TX_MASK_G_R 397 0x0002 //TX_EXTRA_NS_L -398 0x0800 //TX_EXTRA_NS_A -399 0x0005 //TX_VR_NOISE_FLOOR_TH +398 0x1800 //TX_C_POST_FLT_MASK +399 0x7FFF //TX_A_POST_FLT_WNS 400 0x0148 //TX_MIN_G_LOW300HZ 401 0x0004 //TX_MAXLEVEL_CNG 402 0x00B4 //TX_STN_NOISE_TH 403 0x4000 //TX_POST_MASK_SUP 404 0x7FFF //TX_POST_MASK_ADJUST 405 0x00C8 //TX_NS_ENOISE_MIC0_TH -406 0x0020 //TX_MINENOISE_MIC0_TH +406 0x04E7 //TX_MINENOISE_MIC0_TH 407 0x012C //TX_MINENOISE_MIC0_S_TH 408 0x2900 //TX_MIN_G_CTRL_SSNS 409 0x0800 //TX_METAL_RTO_THR @@ -12800,16 +19212,16 @@ 511 0x6666 //TX_MIC_TO_BFGAIN 512 0x0000 //TX_MICTOBFGAIN0 513 0x0000 //TX_FASTMUE_TH -514 0x0000 //TX_DERVB_LEN_0 -515 0x0000 //TX_DERVB_LEN_1 -516 0x0000 //TX_RHO_DERVB -517 0x0000 //TX_MIC_INDX_DERVB -518 0x0000 //TX_MU_DERVB -519 0x0000 //TX_DR_RESRV_0 -520 0x0000 //TX_DR_RESRV_1 -521 0x0000 //TX_DR_RESRV_2 -522 0x0000 //TX_DR_RESRV_3 -523 0x0000 //TX_DR_RESRV_4 +514 0xC000 //TX_DEREVERB_LF_MU +515 0xC000 //TX_DEREVERB_HF_MU +516 0xCCCC //TX_DEREVERB_DELAY +517 0xD999 //TX_DEREVERB_COEF_LEN +518 0x1F40 //TX_DEREVERB_DNR +519 0x0000 //TX_DEREVERB_ALPHA +520 0x0000 //TX_DEREVERB_BETA +521 0x0000 //TX_GSC_RTOL_TH +522 0x7000 //TX_GSC_RTOH_TH +523 0x0064 //TX_WIDE2_MEANHTH 524 0x0000 //TX_DR_RESRV_5 525 0x0000 //TX_DR_RESRV_6 526 0x0000 //TX_DR_RESRV_7 @@ -13183,8 +19595,73 @@ 894 0xC000 //TX_FASTNS_SSA_THHFL 895 0xCCCC //TX_FASTNS_SSA_THLFH 896 0xD999 //TX_FASTNS_SSA_THHFH +897 0x2339 //TX_SENDFUNC_REG_MICMUTE +898 0x0021 //TX_SENDFUNC_REG_MICMUTE1 +899 0x02BC //TX_MICMUTE_RATIO_THR +900 0x0140 //TX_MICMUTE_AMP_THR +901 0x0004 //TX_MICMUTE_HPF_IND +902 0x00C0 //TX_MICMUTE_LOG_EYR_TH +903 0x0008 //TX_MICMUTE_CVG_TIME +904 0x0008 //TX_MICMUTE_RELEASE_TIME +905 0x01FE //TX_MIC_VOLUME_MIC0MUTE +906 0x0020 //TX_MICMUTE_EPD_OFFSET_0 +907 0x001E //TX_MICMUTE_FRQ_AEC_L +908 0x7999 //TX_MICMUTE_EAD_THR +909 0x7FFF //TX_MICMUTE_LAMBDA_CB_NLE +910 0x7FFF //TX_MICMUTE_LAMBDA_RE_EST +911 0x4000 //TX_DTD_THR1_MICMUTE_0 +912 0x7000 //TX_DTD_THR1_MICMUTE_1 +913 0x7FFF //TX_DTD_THR1_MICMUTE_2 +914 0x7FFF //TX_DTD_THR1_MICMUTE_3 +915 0x6CCC //TX_DTD_THR2_MICMUTE_0 +916 0x0400 //TX_MICMUTE_MIN_EQ_RE_EST_0 +917 0x0400 //TX_MICMUTE_MIN_EQ_RE_EST_1 +918 0x1000 //TX_MICMUTE_MIN_EQ_RE_EST_2 +919 0x7FFF //TX_MICMUTE_MIN_EQ_RE_EST_3 +920 0x7FFF //TX_MICMUTE_MIN_EQ_RE_EST_4 +921 0x4000 //TX_MICMUTE_C_POST_FLT +922 0x03E8 //TX_MICMUTE_DT_CUT_K +923 0x0001 //TX_MICMUTE_DT_CUT_THR +924 0x03E8 //TX_MICMUTE_DT_CUT_K2 +925 0x0001 //TX_MICMUTE_DT_CUT_THR2 +926 0x0064 //TX_MICMUTE_DT2_HOLD_N +927 0x1000 //TX_MICMUTE_RATIODTH_THCUT +928 0x1000 //TX_MICMUTE_B_POST_FLT_ECHOL +929 0x7FFF //TX_MICMUTE_B_POST_FLT_ECHOH +930 0x0400 //TX_MICMUTE_C_POST_FLT_MASK +931 0x7999 //TX_MICMUTE_RATIODTL_CUT_TH +932 0x0258 //TX_MICMUTE_DT_CUT_K1 +933 0x0800 //TX_MICMUTE_N2_SN_EST +934 0xFC00 //TX_MICMUTE_THR_SN_EST_0 +935 0x001C //TX_MICMUTE_MIN_G_CTRL_0 +936 0x6000 //TX_MICMUTE_A_POST_FILT_S_0 +937 0x7000 //TX_MICMUTE_B_POST_FILT_0 +938 0x2710 //TX_MIC1RUB_AMP_THR +939 0x0010 //TX_MIC1MUTE_RATIO_THR +940 0x0450 //TX_MIC1MUTE_AMP_THR +941 0x0008 //TX_MIC1MUTE_CVG_TIME +942 0x0008 //TX_MIC1MUTE_RELEASE_TIME +943 0x0000 //TX_AMS_RESRV_01 +944 0x0000 //TX_AMS_RESRV_02 +945 0x0000 //TX_AMS_RESRV_03 +946 0x0000 //TX_AMS_RESRV_04 +947 0x0000 //TX_AMS_RESRV_05 +948 0x0000 //TX_AMS_RESRV_06 +949 0x0000 //TX_AMS_RESRV_07 +950 0x0000 //TX_AMS_RESRV_08 +951 0x0000 //TX_AMS_RESRV_09 +952 0x0000 //TX_AMS_RESRV_10 +953 0x0000 //TX_AMS_RESRV_11 +954 0x0000 //TX_AMS_RESRV_12 +955 0x0000 //TX_AMS_RESRV_13 +956 0x0000 //TX_AMS_RESRV_14 +957 0x0000 //TX_AMS_RESRV_15 +958 0x0000 //TX_AMS_RESRV_16 +959 0x0000 //TX_AMS_RESRV_17 +960 0x0000 //TX_AMS_RESRV_18 +961 0x0000 //TX_AMS_RESRV_19 #RX -0 0x002C //RX_RECVFUNC_MODE_0 +0 0x202C //RX_RECVFUNC_MODE_0 1 0x0000 //RX_RECVFUNC_MODE_1 2 0x0004 //RX_SAMPLINGFREQ_SIG 3 0x0004 //RX_SAMPLINGFREQ_PROC @@ -14034,11 +20511,862 @@ 110 0x0000 //RX_FDDRC_RESRV_0 129 0x0100 //RX_SPK_VOL 130 0x0000 //RX_VOL_RESRV_0 +#RX 2 +157 0x202C //RX_RECVFUNC_MODE_0 +158 0x0000 //RX_RECVFUNC_MODE_1 +159 0x0004 //RX_SAMPLINGFREQ_SIG +160 0x0004 //RX_SAMPLINGFREQ_PROC +161 0x000A //RX_FRAME_SZ +162 0x0000 //RX_DELAY_OPT +163 0x1000 //RX_TDDRC_ALPHA_UP_1 +164 0x1000 //RX_TDDRC_ALPHA_UP_2 +165 0x1000 //RX_TDDRC_ALPHA_UP_3 +166 0x1000 //RX_TDDRC_ALPHA_UP_4 +167 0x0800 //RX_PGA +168 0x7B02 //RX_A_HP +169 0x4000 //RX_B_PE +170 0x7800 //RX_THR_PITCH_DET_0 +171 0x7000 //RX_THR_PITCH_DET_1 +172 0x6000 //RX_THR_PITCH_DET_2 +173 0x0008 //RX_PITCH_BFR_LEN +174 0x0003 //RX_SBD_PITCH_DET +175 0x0100 //RX_PP_RESRV_0 +176 0x0020 //RX_PP_RESRV_1 +177 0x0500 //RX_N_SN_EST +178 0x000C //RX_N2_SN_EST +179 0x000A //RX_NS_LVL_CTRL +180 0xF600 //RX_THR_SN_EST +181 0x7000 //RX_LAMBDA_PFILT +182 0x000A //RX_FENS_RESRV_0 +183 0x0190 //RX_FENS_RESRV_1 +184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +187 0x0002 //RX_EXTRA_NS_L +188 0x0800 //RX_EXTRA_NS_A +189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +190 0x7FFF //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +192 0x199A //RX_A_POST_FLT +193 0x0000 //RX_LMT_THRD +194 0x4000 //RX_LMT_ALPHA +195 0x0020 //RX_FDEQ_SUBNUM +196 0x4848 //RX_FDEQ_GAIN_0 +197 0x4848 //RX_FDEQ_GAIN_1 +198 0x4848 //RX_FDEQ_GAIN_2 +199 0x4848 //RX_FDEQ_GAIN_3 +200 0x4848 //RX_FDEQ_GAIN_4 +201 0x4848 //RX_FDEQ_GAIN_5 +202 0x4848 //RX_FDEQ_GAIN_6 +203 0x4848 //RX_FDEQ_GAIN_7 +204 0x4848 //RX_FDEQ_GAIN_8 +205 0x4848 //RX_FDEQ_GAIN_9 +206 0x4848 //RX_FDEQ_GAIN_10 +207 0x4848 //RX_FDEQ_GAIN_11 +208 0x4848 //RX_FDEQ_GAIN_12 +209 0x4848 //RX_FDEQ_GAIN_13 +210 0x4848 //RX_FDEQ_GAIN_14 +211 0x4848 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0202 //RX_FDEQ_BIN_0 +221 0x0203 //RX_FDEQ_BIN_1 +222 0x0304 //RX_FDEQ_BIN_2 +223 0x0405 //RX_FDEQ_BIN_3 +224 0x0607 //RX_FDEQ_BIN_4 +225 0x0809 //RX_FDEQ_BIN_5 +226 0x0A0B //RX_FDEQ_BIN_6 +227 0x0C0D //RX_FDEQ_BIN_7 +228 0x0E0F //RX_FDEQ_BIN_8 +229 0x1011 //RX_FDEQ_BIN_9 +230 0x1214 //RX_FDEQ_BIN_10 +231 0x1618 //RX_FDEQ_BIN_11 +232 0x1C1C //RX_FDEQ_BIN_12 +233 0x2020 //RX_FDEQ_BIN_13 +234 0x2020 //RX_FDEQ_BIN_14 +235 0x2011 //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x4000 //RX_FDEQ_RESRV_0 +245 0x0320 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0030 //RX_FDDRC_BAND_MARGIN_1 +248 0x0050 //RX_FDDRC_BAND_MARGIN_2 +249 0x0080 //RX_FDDRC_BAND_MARGIN_3 +250 0x0007 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x5000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x6400 //RX_FDDRC_THRD_3_2 +258 0x6400 //RX_FDDRC_THRD_3_3 +259 0x2000 //RX_FDDRC_SLANT_0_0 +260 0x2000 //RX_FDDRC_SLANT_0_1 +261 0x2000 //RX_FDDRC_SLANT_0_2 +262 0x2000 //RX_FDDRC_SLANT_0_3 +263 0x5333 //RX_FDDRC_SLANT_1_0 +264 0x5333 //RX_FDDRC_SLANT_1_1 +265 0x5333 //RX_FDDRC_SLANT_1_2 +266 0x5333 //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +268 0x0002 //RX_FILTINDX +269 0x0000 //RX_TDDRC_THRD_0 +270 0x0000 //RX_TDDRC_THRD_1 +271 0x1200 //RX_TDDRC_THRD_2 +272 0x1900 //RX_TDDRC_THRD_3 +273 0x3000 //RX_TDDRC_SLANT_0 +274 0x6E00 //RX_TDDRC_SLANT_1 +275 0x1000 //RX_TDDRC_ALPHA_UP_0 +276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x199A //RX_TDDRC_HMNC_GAIN +279 0x0001 //RX_TDDRC_SMT_FLAG +280 0x0CCD //RX_TDDRC_SMT_W +281 0x0240 //RX_TDDRC_DRC_GAIN +282 0x7C00 //RX_LAMBDA_PKA_FP +283 0x2000 //RX_TPKA_FP +284 0x2000 //RX_MIN_G_FP +285 0x0080 //RX_MAX_G_FP +286 0x000B //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 +288 0x0000 //RX_MAXLEVEL_CNG +289 0x3000 //RX_BWE_UV_TH +290 0x3000 //RX_BWE_UV_TH2 +291 0x1800 //RX_BWE_UV_TH3 +292 0x1000 //RX_BWE_V_TH +293 0x04CD //RX_BWE_GAIN1_V_TH1 +294 0x0F33 //RX_BWE_GAIN1_V_TH2 +295 0x7333 //RX_BWE_UV_EQ +296 0x199A //RX_BWE_V_EQ +297 0x7333 //RX_BWE_TONE_TH +298 0x0004 //RX_BWE_UV_HOLD_T +299 0x6CCD //RX_BWE_GAIN2_ALPHA +300 0x799A //RX_BWE_GAIN3_ALPHA +301 0x001E //RX_BWE_CUTOFF +302 0x3000 //RX_BWE_GAINFILL +303 0x3200 //RX_BWE_MAXTH_TONE +304 0x2000 //RX_BWE_EQ_0 +305 0x2000 //RX_BWE_EQ_1 +306 0x2000 //RX_BWE_EQ_2 +307 0x2000 //RX_BWE_EQ_3 +308 0x2000 //RX_BWE_EQ_4 +309 0x2000 //RX_BWE_EQ_5 +310 0x2000 //RX_BWE_EQ_6 +311 0x0000 //RX_BWE_RESRV_0 +312 0x0000 //RX_BWE_RESRV_1 +313 0x0000 //RX_BWE_RESRV_2 +#VOL 0 +163 0x1000 //RX_TDDRC_ALPHA_UP_1 +164 0x1000 //RX_TDDRC_ALPHA_UP_2 +165 0x1000 //RX_TDDRC_ALPHA_UP_3 +166 0x1000 //RX_TDDRC_ALPHA_UP_4 +184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +190 0x7FFF //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +269 0x0000 //RX_TDDRC_THRD_0 +270 0x0000 //RX_TDDRC_THRD_1 +271 0x1200 //RX_TDDRC_THRD_2 +272 0x1900 //RX_TDDRC_THRD_3 +273 0x3000 //RX_TDDRC_SLANT_0 +274 0x6E00 //RX_TDDRC_SLANT_1 +275 0x1000 //RX_TDDRC_ALPHA_UP_0 +276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x199A //RX_TDDRC_HMNC_GAIN +279 0x0001 //RX_TDDRC_SMT_FLAG +280 0x0CCD //RX_TDDRC_SMT_W +281 0x0240 //RX_TDDRC_DRC_GAIN +195 0x0020 //RX_FDEQ_SUBNUM +196 0x4848 //RX_FDEQ_GAIN_0 +197 0x4848 //RX_FDEQ_GAIN_1 +198 0x4848 //RX_FDEQ_GAIN_2 +199 0x4848 //RX_FDEQ_GAIN_3 +200 0x4848 //RX_FDEQ_GAIN_4 +201 0x4848 //RX_FDEQ_GAIN_5 +202 0x4848 //RX_FDEQ_GAIN_6 +203 0x4848 //RX_FDEQ_GAIN_7 +204 0x4848 //RX_FDEQ_GAIN_8 +205 0x4848 //RX_FDEQ_GAIN_9 +206 0x4848 //RX_FDEQ_GAIN_10 +207 0x4848 //RX_FDEQ_GAIN_11 +208 0x4848 //RX_FDEQ_GAIN_12 +209 0x4848 //RX_FDEQ_GAIN_13 +210 0x4848 //RX_FDEQ_GAIN_14 +211 0x4848 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0202 //RX_FDEQ_BIN_0 +221 0x0203 //RX_FDEQ_BIN_1 +222 0x0304 //RX_FDEQ_BIN_2 +223 0x0405 //RX_FDEQ_BIN_3 +224 0x0607 //RX_FDEQ_BIN_4 +225 0x0809 //RX_FDEQ_BIN_5 +226 0x0A0B //RX_FDEQ_BIN_6 +227 0x0C0D //RX_FDEQ_BIN_7 +228 0x0E0F //RX_FDEQ_BIN_8 +229 0x1011 //RX_FDEQ_BIN_9 +230 0x1214 //RX_FDEQ_BIN_10 +231 0x1618 //RX_FDEQ_BIN_11 +232 0x1C1C //RX_FDEQ_BIN_12 +233 0x2020 //RX_FDEQ_BIN_13 +234 0x2020 //RX_FDEQ_BIN_14 +235 0x2011 //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x4000 //RX_FDEQ_RESRV_0 +245 0x0320 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0030 //RX_FDDRC_BAND_MARGIN_1 +248 0x0050 //RX_FDDRC_BAND_MARGIN_2 +249 0x0080 //RX_FDDRC_BAND_MARGIN_3 +250 0x0007 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x5000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x6400 //RX_FDDRC_THRD_3_2 +258 0x6400 //RX_FDDRC_THRD_3_3 +259 0x2000 //RX_FDDRC_SLANT_0_0 +260 0x2000 //RX_FDDRC_SLANT_0_1 +261 0x2000 //RX_FDDRC_SLANT_0_2 +262 0x2000 //RX_FDDRC_SLANT_0_3 +263 0x5333 //RX_FDDRC_SLANT_1_0 +264 0x5333 //RX_FDDRC_SLANT_1_1 +265 0x5333 //RX_FDDRC_SLANT_1_2 +266 0x5333 //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +286 0x000B //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 +#VOL 1 +163 0x1000 //RX_TDDRC_ALPHA_UP_1 +164 0x1000 //RX_TDDRC_ALPHA_UP_2 +165 0x1000 //RX_TDDRC_ALPHA_UP_3 +166 0x1000 //RX_TDDRC_ALPHA_UP_4 +184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +190 0x7FFF //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +269 0x0000 //RX_TDDRC_THRD_0 +270 0x0000 //RX_TDDRC_THRD_1 +271 0x1200 //RX_TDDRC_THRD_2 +272 0x1900 //RX_TDDRC_THRD_3 +273 0x3000 //RX_TDDRC_SLANT_0 +274 0x6E00 //RX_TDDRC_SLANT_1 +275 0x1000 //RX_TDDRC_ALPHA_UP_0 +276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x199A //RX_TDDRC_HMNC_GAIN +279 0x0001 //RX_TDDRC_SMT_FLAG +280 0x0CCD //RX_TDDRC_SMT_W +281 0x0240 //RX_TDDRC_DRC_GAIN +195 0x0020 //RX_FDEQ_SUBNUM +196 0x4848 //RX_FDEQ_GAIN_0 +197 0x4848 //RX_FDEQ_GAIN_1 +198 0x4848 //RX_FDEQ_GAIN_2 +199 0x4848 //RX_FDEQ_GAIN_3 +200 0x4848 //RX_FDEQ_GAIN_4 +201 0x4848 //RX_FDEQ_GAIN_5 +202 0x4848 //RX_FDEQ_GAIN_6 +203 0x4848 //RX_FDEQ_GAIN_7 +204 0x4848 //RX_FDEQ_GAIN_8 +205 0x4848 //RX_FDEQ_GAIN_9 +206 0x4848 //RX_FDEQ_GAIN_10 +207 0x4848 //RX_FDEQ_GAIN_11 +208 0x4848 //RX_FDEQ_GAIN_12 +209 0x4848 //RX_FDEQ_GAIN_13 +210 0x4848 //RX_FDEQ_GAIN_14 +211 0x4848 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0202 //RX_FDEQ_BIN_0 +221 0x0203 //RX_FDEQ_BIN_1 +222 0x0304 //RX_FDEQ_BIN_2 +223 0x0405 //RX_FDEQ_BIN_3 +224 0x0607 //RX_FDEQ_BIN_4 +225 0x0809 //RX_FDEQ_BIN_5 +226 0x0A0B //RX_FDEQ_BIN_6 +227 0x0C0D //RX_FDEQ_BIN_7 +228 0x0E0F //RX_FDEQ_BIN_8 +229 0x1011 //RX_FDEQ_BIN_9 +230 0x1214 //RX_FDEQ_BIN_10 +231 0x1618 //RX_FDEQ_BIN_11 +232 0x1C1C //RX_FDEQ_BIN_12 +233 0x2020 //RX_FDEQ_BIN_13 +234 0x2020 //RX_FDEQ_BIN_14 +235 0x2011 //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x4000 //RX_FDEQ_RESRV_0 +245 0x0320 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0030 //RX_FDDRC_BAND_MARGIN_1 +248 0x0050 //RX_FDDRC_BAND_MARGIN_2 +249 0x0080 //RX_FDDRC_BAND_MARGIN_3 +250 0x0007 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x5000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x6400 //RX_FDDRC_THRD_3_2 +258 0x6400 //RX_FDDRC_THRD_3_3 +259 0x2000 //RX_FDDRC_SLANT_0_0 +260 0x2000 //RX_FDDRC_SLANT_0_1 +261 0x2000 //RX_FDDRC_SLANT_0_2 +262 0x2000 //RX_FDDRC_SLANT_0_3 +263 0x5333 //RX_FDDRC_SLANT_1_0 +264 0x5333 //RX_FDDRC_SLANT_1_1 +265 0x5333 //RX_FDDRC_SLANT_1_2 +266 0x5333 //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +286 0x0013 //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 +#VOL 2 +163 0x1000 //RX_TDDRC_ALPHA_UP_1 +164 0x1000 //RX_TDDRC_ALPHA_UP_2 +165 0x1000 //RX_TDDRC_ALPHA_UP_3 +166 0x1000 //RX_TDDRC_ALPHA_UP_4 +184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +190 0x7FFF //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +269 0x0000 //RX_TDDRC_THRD_0 +270 0x0000 //RX_TDDRC_THRD_1 +271 0x1200 //RX_TDDRC_THRD_2 +272 0x1900 //RX_TDDRC_THRD_3 +273 0x3000 //RX_TDDRC_SLANT_0 +274 0x6E00 //RX_TDDRC_SLANT_1 +275 0x1000 //RX_TDDRC_ALPHA_UP_0 +276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x199A //RX_TDDRC_HMNC_GAIN +279 0x0001 //RX_TDDRC_SMT_FLAG +280 0x0CCD //RX_TDDRC_SMT_W +281 0x0240 //RX_TDDRC_DRC_GAIN +195 0x0020 //RX_FDEQ_SUBNUM +196 0x4848 //RX_FDEQ_GAIN_0 +197 0x4848 //RX_FDEQ_GAIN_1 +198 0x4848 //RX_FDEQ_GAIN_2 +199 0x4848 //RX_FDEQ_GAIN_3 +200 0x4848 //RX_FDEQ_GAIN_4 +201 0x4848 //RX_FDEQ_GAIN_5 +202 0x4848 //RX_FDEQ_GAIN_6 +203 0x4848 //RX_FDEQ_GAIN_7 +204 0x4848 //RX_FDEQ_GAIN_8 +205 0x4848 //RX_FDEQ_GAIN_9 +206 0x4848 //RX_FDEQ_GAIN_10 +207 0x4848 //RX_FDEQ_GAIN_11 +208 0x4848 //RX_FDEQ_GAIN_12 +209 0x4848 //RX_FDEQ_GAIN_13 +210 0x4848 //RX_FDEQ_GAIN_14 +211 0x4848 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0202 //RX_FDEQ_BIN_0 +221 0x0203 //RX_FDEQ_BIN_1 +222 0x0304 //RX_FDEQ_BIN_2 +223 0x0405 //RX_FDEQ_BIN_3 +224 0x0607 //RX_FDEQ_BIN_4 +225 0x0809 //RX_FDEQ_BIN_5 +226 0x0A0B //RX_FDEQ_BIN_6 +227 0x0C0D //RX_FDEQ_BIN_7 +228 0x0E0F //RX_FDEQ_BIN_8 +229 0x1011 //RX_FDEQ_BIN_9 +230 0x1214 //RX_FDEQ_BIN_10 +231 0x1618 //RX_FDEQ_BIN_11 +232 0x1C1C //RX_FDEQ_BIN_12 +233 0x2020 //RX_FDEQ_BIN_13 +234 0x2020 //RX_FDEQ_BIN_14 +235 0x2011 //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x4000 //RX_FDEQ_RESRV_0 +245 0x0320 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0030 //RX_FDDRC_BAND_MARGIN_1 +248 0x0050 //RX_FDDRC_BAND_MARGIN_2 +249 0x0080 //RX_FDDRC_BAND_MARGIN_3 +250 0x0007 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x5000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x6400 //RX_FDDRC_THRD_3_2 +258 0x6400 //RX_FDDRC_THRD_3_3 +259 0x2000 //RX_FDDRC_SLANT_0_0 +260 0x2000 //RX_FDDRC_SLANT_0_1 +261 0x2000 //RX_FDDRC_SLANT_0_2 +262 0x2000 //RX_FDDRC_SLANT_0_3 +263 0x5333 //RX_FDDRC_SLANT_1_0 +264 0x5333 //RX_FDDRC_SLANT_1_1 +265 0x5333 //RX_FDDRC_SLANT_1_2 +266 0x5333 //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +286 0x0020 //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 +#VOL 3 +163 0x1000 //RX_TDDRC_ALPHA_UP_1 +164 0x1000 //RX_TDDRC_ALPHA_UP_2 +165 0x1000 //RX_TDDRC_ALPHA_UP_3 +166 0x1000 //RX_TDDRC_ALPHA_UP_4 +184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +190 0x7FFF //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +269 0x0000 //RX_TDDRC_THRD_0 +270 0x0000 //RX_TDDRC_THRD_1 +271 0x1200 //RX_TDDRC_THRD_2 +272 0x1900 //RX_TDDRC_THRD_3 +273 0x3000 //RX_TDDRC_SLANT_0 +274 0x6E00 //RX_TDDRC_SLANT_1 +275 0x1000 //RX_TDDRC_ALPHA_UP_0 +276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x199A //RX_TDDRC_HMNC_GAIN +279 0x0001 //RX_TDDRC_SMT_FLAG +280 0x0CCD //RX_TDDRC_SMT_W +281 0x0240 //RX_TDDRC_DRC_GAIN +195 0x0020 //RX_FDEQ_SUBNUM +196 0x4848 //RX_FDEQ_GAIN_0 +197 0x4848 //RX_FDEQ_GAIN_1 +198 0x4848 //RX_FDEQ_GAIN_2 +199 0x4848 //RX_FDEQ_GAIN_3 +200 0x4848 //RX_FDEQ_GAIN_4 +201 0x4848 //RX_FDEQ_GAIN_5 +202 0x4848 //RX_FDEQ_GAIN_6 +203 0x4848 //RX_FDEQ_GAIN_7 +204 0x4848 //RX_FDEQ_GAIN_8 +205 0x4848 //RX_FDEQ_GAIN_9 +206 0x4848 //RX_FDEQ_GAIN_10 +207 0x4848 //RX_FDEQ_GAIN_11 +208 0x4848 //RX_FDEQ_GAIN_12 +209 0x4848 //RX_FDEQ_GAIN_13 +210 0x4848 //RX_FDEQ_GAIN_14 +211 0x4848 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0202 //RX_FDEQ_BIN_0 +221 0x0203 //RX_FDEQ_BIN_1 +222 0x0304 //RX_FDEQ_BIN_2 +223 0x0405 //RX_FDEQ_BIN_3 +224 0x0607 //RX_FDEQ_BIN_4 +225 0x0809 //RX_FDEQ_BIN_5 +226 0x0A0B //RX_FDEQ_BIN_6 +227 0x0C0D //RX_FDEQ_BIN_7 +228 0x0E0F //RX_FDEQ_BIN_8 +229 0x1011 //RX_FDEQ_BIN_9 +230 0x1214 //RX_FDEQ_BIN_10 +231 0x1618 //RX_FDEQ_BIN_11 +232 0x1C1C //RX_FDEQ_BIN_12 +233 0x2020 //RX_FDEQ_BIN_13 +234 0x2020 //RX_FDEQ_BIN_14 +235 0x2011 //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x4000 //RX_FDEQ_RESRV_0 +245 0x0320 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0030 //RX_FDDRC_BAND_MARGIN_1 +248 0x0050 //RX_FDDRC_BAND_MARGIN_2 +249 0x0080 //RX_FDDRC_BAND_MARGIN_3 +250 0x0007 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x5000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x6400 //RX_FDDRC_THRD_3_2 +258 0x6400 //RX_FDDRC_THRD_3_3 +259 0x2000 //RX_FDDRC_SLANT_0_0 +260 0x2000 //RX_FDDRC_SLANT_0_1 +261 0x2000 //RX_FDDRC_SLANT_0_2 +262 0x2000 //RX_FDDRC_SLANT_0_3 +263 0x5333 //RX_FDDRC_SLANT_1_0 +264 0x5333 //RX_FDDRC_SLANT_1_1 +265 0x5333 //RX_FDDRC_SLANT_1_2 +266 0x5333 //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +286 0x0036 //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 +#VOL 4 +163 0x1000 //RX_TDDRC_ALPHA_UP_1 +164 0x1000 //RX_TDDRC_ALPHA_UP_2 +165 0x1000 //RX_TDDRC_ALPHA_UP_3 +166 0x1000 //RX_TDDRC_ALPHA_UP_4 +184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +190 0x7FFF //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +269 0x0000 //RX_TDDRC_THRD_0 +270 0x0000 //RX_TDDRC_THRD_1 +271 0x1200 //RX_TDDRC_THRD_2 +272 0x1900 //RX_TDDRC_THRD_3 +273 0x3000 //RX_TDDRC_SLANT_0 +274 0x6E00 //RX_TDDRC_SLANT_1 +275 0x1000 //RX_TDDRC_ALPHA_UP_0 +276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x199A //RX_TDDRC_HMNC_GAIN +279 0x0001 //RX_TDDRC_SMT_FLAG +280 0x0CCD //RX_TDDRC_SMT_W +281 0x0240 //RX_TDDRC_DRC_GAIN +195 0x0020 //RX_FDEQ_SUBNUM +196 0x4848 //RX_FDEQ_GAIN_0 +197 0x4848 //RX_FDEQ_GAIN_1 +198 0x4848 //RX_FDEQ_GAIN_2 +199 0x4848 //RX_FDEQ_GAIN_3 +200 0x4848 //RX_FDEQ_GAIN_4 +201 0x4848 //RX_FDEQ_GAIN_5 +202 0x4848 //RX_FDEQ_GAIN_6 +203 0x4848 //RX_FDEQ_GAIN_7 +204 0x4848 //RX_FDEQ_GAIN_8 +205 0x4848 //RX_FDEQ_GAIN_9 +206 0x4848 //RX_FDEQ_GAIN_10 +207 0x4848 //RX_FDEQ_GAIN_11 +208 0x4848 //RX_FDEQ_GAIN_12 +209 0x4848 //RX_FDEQ_GAIN_13 +210 0x4848 //RX_FDEQ_GAIN_14 +211 0x4848 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0202 //RX_FDEQ_BIN_0 +221 0x0203 //RX_FDEQ_BIN_1 +222 0x0304 //RX_FDEQ_BIN_2 +223 0x0405 //RX_FDEQ_BIN_3 +224 0x0607 //RX_FDEQ_BIN_4 +225 0x0809 //RX_FDEQ_BIN_5 +226 0x0A0B //RX_FDEQ_BIN_6 +227 0x0C0D //RX_FDEQ_BIN_7 +228 0x0E0F //RX_FDEQ_BIN_8 +229 0x1011 //RX_FDEQ_BIN_9 +230 0x1214 //RX_FDEQ_BIN_10 +231 0x1618 //RX_FDEQ_BIN_11 +232 0x1C1C //RX_FDEQ_BIN_12 +233 0x2020 //RX_FDEQ_BIN_13 +234 0x2020 //RX_FDEQ_BIN_14 +235 0x2011 //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x4000 //RX_FDEQ_RESRV_0 +245 0x0320 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0030 //RX_FDDRC_BAND_MARGIN_1 +248 0x0050 //RX_FDDRC_BAND_MARGIN_2 +249 0x0080 //RX_FDDRC_BAND_MARGIN_3 +250 0x0007 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x5000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x6400 //RX_FDDRC_THRD_3_2 +258 0x6400 //RX_FDDRC_THRD_3_3 +259 0x2000 //RX_FDDRC_SLANT_0_0 +260 0x2000 //RX_FDDRC_SLANT_0_1 +261 0x2000 //RX_FDDRC_SLANT_0_2 +262 0x2000 //RX_FDDRC_SLANT_0_3 +263 0x5333 //RX_FDDRC_SLANT_1_0 +264 0x5333 //RX_FDDRC_SLANT_1_1 +265 0x5333 //RX_FDDRC_SLANT_1_2 +266 0x5333 //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +286 0x005B //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 +#VOL 5 +163 0x1000 //RX_TDDRC_ALPHA_UP_1 +164 0x1000 //RX_TDDRC_ALPHA_UP_2 +165 0x1000 //RX_TDDRC_ALPHA_UP_3 +166 0x1000 //RX_TDDRC_ALPHA_UP_4 +184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +190 0x7FFF //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +269 0x0000 //RX_TDDRC_THRD_0 +270 0x0000 //RX_TDDRC_THRD_1 +271 0x1200 //RX_TDDRC_THRD_2 +272 0x1900 //RX_TDDRC_THRD_3 +273 0x3000 //RX_TDDRC_SLANT_0 +274 0x6E00 //RX_TDDRC_SLANT_1 +275 0x1000 //RX_TDDRC_ALPHA_UP_0 +276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x199A //RX_TDDRC_HMNC_GAIN +279 0x0001 //RX_TDDRC_SMT_FLAG +280 0x0CCD //RX_TDDRC_SMT_W +281 0x0240 //RX_TDDRC_DRC_GAIN +195 0x0020 //RX_FDEQ_SUBNUM +196 0x4848 //RX_FDEQ_GAIN_0 +197 0x4848 //RX_FDEQ_GAIN_1 +198 0x4848 //RX_FDEQ_GAIN_2 +199 0x4848 //RX_FDEQ_GAIN_3 +200 0x4848 //RX_FDEQ_GAIN_4 +201 0x4848 //RX_FDEQ_GAIN_5 +202 0x4848 //RX_FDEQ_GAIN_6 +203 0x4848 //RX_FDEQ_GAIN_7 +204 0x4848 //RX_FDEQ_GAIN_8 +205 0x4848 //RX_FDEQ_GAIN_9 +206 0x4848 //RX_FDEQ_GAIN_10 +207 0x4848 //RX_FDEQ_GAIN_11 +208 0x4848 //RX_FDEQ_GAIN_12 +209 0x4848 //RX_FDEQ_GAIN_13 +210 0x4848 //RX_FDEQ_GAIN_14 +211 0x4848 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0202 //RX_FDEQ_BIN_0 +221 0x0203 //RX_FDEQ_BIN_1 +222 0x0304 //RX_FDEQ_BIN_2 +223 0x0405 //RX_FDEQ_BIN_3 +224 0x0607 //RX_FDEQ_BIN_4 +225 0x0809 //RX_FDEQ_BIN_5 +226 0x0A0B //RX_FDEQ_BIN_6 +227 0x0C0D //RX_FDEQ_BIN_7 +228 0x0E0F //RX_FDEQ_BIN_8 +229 0x1011 //RX_FDEQ_BIN_9 +230 0x1214 //RX_FDEQ_BIN_10 +231 0x1618 //RX_FDEQ_BIN_11 +232 0x1C1C //RX_FDEQ_BIN_12 +233 0x2020 //RX_FDEQ_BIN_13 +234 0x2020 //RX_FDEQ_BIN_14 +235 0x2011 //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x4000 //RX_FDEQ_RESRV_0 +245 0x0320 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0030 //RX_FDDRC_BAND_MARGIN_1 +248 0x0050 //RX_FDDRC_BAND_MARGIN_2 +249 0x0080 //RX_FDDRC_BAND_MARGIN_3 +250 0x0007 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x5000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x6400 //RX_FDDRC_THRD_3_2 +258 0x6400 //RX_FDDRC_THRD_3_3 +259 0x2000 //RX_FDDRC_SLANT_0_0 +260 0x2000 //RX_FDDRC_SLANT_0_1 +261 0x2000 //RX_FDDRC_SLANT_0_2 +262 0x2000 //RX_FDDRC_SLANT_0_3 +263 0x5333 //RX_FDDRC_SLANT_1_0 +264 0x5333 //RX_FDDRC_SLANT_1_1 +265 0x5333 //RX_FDDRC_SLANT_1_2 +266 0x5333 //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +286 0x0099 //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 +#VOL 6 +163 0x1000 //RX_TDDRC_ALPHA_UP_1 +164 0x1000 //RX_TDDRC_ALPHA_UP_2 +165 0x1000 //RX_TDDRC_ALPHA_UP_3 +166 0x1000 //RX_TDDRC_ALPHA_UP_4 +184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +190 0x7FFF //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +269 0x0000 //RX_TDDRC_THRD_0 +270 0x0000 //RX_TDDRC_THRD_1 +271 0x1200 //RX_TDDRC_THRD_2 +272 0x1900 //RX_TDDRC_THRD_3 +273 0x3000 //RX_TDDRC_SLANT_0 +274 0x6E00 //RX_TDDRC_SLANT_1 +275 0x1000 //RX_TDDRC_ALPHA_UP_0 +276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x199A //RX_TDDRC_HMNC_GAIN +279 0x0001 //RX_TDDRC_SMT_FLAG +280 0x0CCD //RX_TDDRC_SMT_W +281 0x0240 //RX_TDDRC_DRC_GAIN +195 0x0020 //RX_FDEQ_SUBNUM +196 0x4848 //RX_FDEQ_GAIN_0 +197 0x4848 //RX_FDEQ_GAIN_1 +198 0x4848 //RX_FDEQ_GAIN_2 +199 0x4848 //RX_FDEQ_GAIN_3 +200 0x4848 //RX_FDEQ_GAIN_4 +201 0x4848 //RX_FDEQ_GAIN_5 +202 0x4848 //RX_FDEQ_GAIN_6 +203 0x4848 //RX_FDEQ_GAIN_7 +204 0x4848 //RX_FDEQ_GAIN_8 +205 0x4848 //RX_FDEQ_GAIN_9 +206 0x4848 //RX_FDEQ_GAIN_10 +207 0x4848 //RX_FDEQ_GAIN_11 +208 0x4848 //RX_FDEQ_GAIN_12 +209 0x4848 //RX_FDEQ_GAIN_13 +210 0x4848 //RX_FDEQ_GAIN_14 +211 0x4848 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0202 //RX_FDEQ_BIN_0 +221 0x0203 //RX_FDEQ_BIN_1 +222 0x0304 //RX_FDEQ_BIN_2 +223 0x0405 //RX_FDEQ_BIN_3 +224 0x0607 //RX_FDEQ_BIN_4 +225 0x0809 //RX_FDEQ_BIN_5 +226 0x0A0B //RX_FDEQ_BIN_6 +227 0x0C0D //RX_FDEQ_BIN_7 +228 0x0E0F //RX_FDEQ_BIN_8 +229 0x1011 //RX_FDEQ_BIN_9 +230 0x1214 //RX_FDEQ_BIN_10 +231 0x1618 //RX_FDEQ_BIN_11 +232 0x1C1C //RX_FDEQ_BIN_12 +233 0x2020 //RX_FDEQ_BIN_13 +234 0x2020 //RX_FDEQ_BIN_14 +235 0x2011 //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x4000 //RX_FDEQ_RESRV_0 +245 0x0320 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0030 //RX_FDDRC_BAND_MARGIN_1 +248 0x0050 //RX_FDDRC_BAND_MARGIN_2 +249 0x0080 //RX_FDDRC_BAND_MARGIN_3 +250 0x0007 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x5000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x6400 //RX_FDDRC_THRD_3_2 +258 0x6400 //RX_FDDRC_THRD_3_3 +259 0x2000 //RX_FDDRC_SLANT_0_0 +260 0x2000 //RX_FDDRC_SLANT_0_1 +261 0x2000 //RX_FDDRC_SLANT_0_2 +262 0x2000 //RX_FDDRC_SLANT_0_3 +263 0x5333 //RX_FDDRC_SLANT_1_0 +264 0x5333 //RX_FDDRC_SLANT_1_1 +265 0x5333 //RX_FDDRC_SLANT_1_2 +266 0x5333 //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +286 0x0100 //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 #CASE_NAME HEADSET-RESERVE1-VOICE_GENERIC-NB -#PARAM_MODE FULL -#PARAM_TYPE TX+RX -#TOTAL_CUSTOM_STEP 7 +#PARAM_MODE Full +#PARAM_TYPE TX+2RX +#TOTAL_CUSTOM_STEP 7+7 #TX 0 0x0009 //TX_OPERATION_MODE_0 1 0x0008 //TX_OPERATION_MODE_1 @@ -14355,20 +21683,20 @@ 312 0x7FFF //TX_A_POST_FILT_0 313 0x2000 //TX_A_POST_FILT_1 314 0x4000 //TX_A_POST_FILT_S_0 -315 0x4000 //TX_A_POST_FILT_S_1 -316 0x1000 //TX_A_POST_FILT_S_2 +315 0x1000 //TX_A_POST_FILT_S_1 +316 0x4000 //TX_A_POST_FILT_S_2 317 0x4000 //TX_A_POST_FILT_S_3 318 0x4000 //TX_A_POST_FILT_S_4 319 0x4000 //TX_A_POST_FILT_S_5 320 0x4000 //TX_A_POST_FILT_S_6 321 0x4000 //TX_A_POST_FILT_S_7 322 0x0400 //TX_B_POST_FILT_0 -323 0x0400 //TX_B_POST_FILT_1 +323 0x2000 //TX_B_POST_FILT_1 324 0x2000 //TX_B_POST_FILT_2 325 0x2000 //TX_B_POST_FILT_3 326 0x2000 //TX_B_POST_FILT_4 327 0x2000 //TX_B_POST_FILT_5 -328 0x2000 //TX_B_POST_FILT_6 +328 0x0400 //TX_B_POST_FILT_6 329 0x2000 //TX_B_POST_FILT_7 330 0x7FFF //TX_B_LESSCUT_RTO_S_0 331 0x7FFF //TX_B_LESSCUT_RTO_S_1 @@ -14407,7 +21735,7 @@ 364 0x0000 //TX_K_APT 365 0x0001 //TX_NOISEDET 366 0x0190 //TX_NDETCT -367 0x000A //TX_NOISE_TH_0 +367 0x003B //TX_NOISE_TH_0 368 0x1B58 //TX_NOISE_TH_0_2 369 0x2134 //TX_NOISE_TH_0_3 370 0x02BC //TX_NOISE_TH_1 @@ -14419,11 +21747,11 @@ 376 0x0000 //TX_NOISE_TH_5_3 377 0x0000 //TX_NOISE_TH_5_4 378 0x0032 //TX_NOISE_TH_6 -379 0x0014 //TX_MINENOISE_TH -380 0x4000 //TX_MINENOISE_MIC0_TH_MTS -381 0xFFEE //TX_MINENOISE_MIC0_TH_EXP -382 0x6000 //TX_MINENOISE_MIC0_S_TH_MTS -383 0xFFF3 //TX_MINENOISE_MIC0_S_TH_EXP +379 0x00C8 //TX_MINENOISE_TH +380 0xD508 //TX_MORENS_TFMASK_TH +381 0x0001 //TX_DRC_QUIET_FLOOR +382 0x3A98 //TX_RATIODTL_CUT_TH +383 0x0DAC //TX_DT_CUT_K1 384 0x00A5 //TX_OUT_ENER_S_TH_CLEAN 385 0x00A5 //TX_OUT_ENER_S_TH_LESSCLEAN 386 0x00A5 //TX_OUT_ENER_S_TH_NOISY @@ -14431,22 +21759,22 @@ 388 0x00CE //TX_OUT_ENER_TH_SPEECH 389 0x2000 //TX_SN_NPB_GAIN 390 0x0000 //TX_NN_NPB_GAIN -391 0x0000 //TX_CSX_ALPHA_0 -392 0x0000 //TX_CSX_ALPHA_1 -393 0x0000 //TX_CSX_ALPHA_2 -394 0x0000 //TX_CSX_ALPHA_3 -395 0x0800 //TX_MU_ARSP_EST -396 0x00C8 //TX_P_OUTBEAM_MIN_TH +391 0x7FFF //TX_POST_MASK_SUP_HSNE +392 0x1388 //TX_TAIL_DET_TH +393 0x4000 //TX_B_LESSCUT_RTO_WTA +394 0x0000 //TX_MEL_G_R +395 0x0080 //TX_SUPHIGH_TH +396 0x0000 //TX_MASK_G_R 397 0x0002 //TX_EXTRA_NS_L -398 0x0800 //TX_EXTRA_NS_A -399 0x0005 //TX_VR_NOISE_FLOOR_TH +398 0x1800 //TX_C_POST_FLT_MASK +399 0x7FFF //TX_A_POST_FLT_WNS 400 0x0148 //TX_MIN_G_LOW300HZ 401 0x0002 //TX_MAXLEVEL_CNG 402 0x00B4 //TX_STN_NOISE_TH 403 0x4000 //TX_POST_MASK_SUP 404 0x7FFF //TX_POST_MASK_ADJUST 405 0x00C8 //TX_NS_ENOISE_MIC0_TH -406 0x0014 //TX_MINENOISE_MIC0_TH +406 0x0032 //TX_MINENOISE_MIC0_TH 407 0x012C //TX_MINENOISE_MIC0_S_TH 408 0x7FFF //TX_MIN_G_CTRL_SSNS 409 0x0000 //TX_METAL_RTO_THR @@ -14554,16 +21882,16 @@ 511 0x6666 //TX_MIC_TO_BFGAIN 512 0x0000 //TX_MICTOBFGAIN0 513 0x0000 //TX_FASTMUE_TH -514 0x0000 //TX_DERVB_LEN_0 -515 0x0000 //TX_DERVB_LEN_1 -516 0x0000 //TX_RHO_DERVB -517 0x0000 //TX_MIC_INDX_DERVB -518 0x0000 //TX_MU_DERVB -519 0x0000 //TX_DR_RESRV_0 -520 0x0000 //TX_DR_RESRV_1 -521 0x0000 //TX_DR_RESRV_2 -522 0x0000 //TX_DR_RESRV_3 -523 0x0000 //TX_DR_RESRV_4 +514 0xC000 //TX_DEREVERB_LF_MU +515 0xC000 //TX_DEREVERB_HF_MU +516 0xCCCC //TX_DEREVERB_DELAY +517 0xD999 //TX_DEREVERB_COEF_LEN +518 0x1F40 //TX_DEREVERB_DNR +519 0x0000 //TX_DEREVERB_ALPHA +520 0x0000 //TX_DEREVERB_BETA +521 0x0000 //TX_GSC_RTOL_TH +522 0x7000 //TX_GSC_RTOH_TH +523 0x0064 //TX_WIDE2_MEANHTH 524 0x0000 //TX_DR_RESRV_5 525 0x0000 //TX_DR_RESRV_6 526 0x0000 //TX_DR_RESRV_7 @@ -14931,14 +22259,79 @@ 888 0x00C8 //TX_FASTNS_ARSPC_TH 889 0xC000 //TX_FASTNS_MASK5_TH 890 0x4848 //TX_POSTSSA_MIN_G_VR_MASK -891 0x7FFF //TX_A_LESSCUT_RTO_MASK +891 0x4000 //TX_A_LESSCUT_RTO_MASK 892 0x1770 //TX_FASTNS_NOISETH 893 0xC000 //TX_FASTNS_SSA_THLFL 894 0xC000 //TX_FASTNS_SSA_THHFL 895 0xCCCC //TX_FASTNS_SSA_THLFH 896 0xD999 //TX_FASTNS_SSA_THHFH +897 0x2339 //TX_SENDFUNC_REG_MICMUTE +898 0x0021 //TX_SENDFUNC_REG_MICMUTE1 +899 0x02BC //TX_MICMUTE_RATIO_THR +900 0x0140 //TX_MICMUTE_AMP_THR +901 0x0004 //TX_MICMUTE_HPF_IND +902 0x00C0 //TX_MICMUTE_LOG_EYR_TH +903 0x0008 //TX_MICMUTE_CVG_TIME +904 0x0008 //TX_MICMUTE_RELEASE_TIME +905 0x01FE //TX_MIC_VOLUME_MIC0MUTE +906 0x0020 //TX_MICMUTE_EPD_OFFSET_0 +907 0x001E //TX_MICMUTE_FRQ_AEC_L +908 0x7999 //TX_MICMUTE_EAD_THR +909 0x7FFF //TX_MICMUTE_LAMBDA_CB_NLE +910 0x7FFF //TX_MICMUTE_LAMBDA_RE_EST +911 0x4000 //TX_DTD_THR1_MICMUTE_0 +912 0x7000 //TX_DTD_THR1_MICMUTE_1 +913 0x7FFF //TX_DTD_THR1_MICMUTE_2 +914 0x7FFF //TX_DTD_THR1_MICMUTE_3 +915 0x6CCC //TX_DTD_THR2_MICMUTE_0 +916 0x0400 //TX_MICMUTE_MIN_EQ_RE_EST_0 +917 0x0400 //TX_MICMUTE_MIN_EQ_RE_EST_1 +918 0x1000 //TX_MICMUTE_MIN_EQ_RE_EST_2 +919 0x7FFF //TX_MICMUTE_MIN_EQ_RE_EST_3 +920 0x7FFF //TX_MICMUTE_MIN_EQ_RE_EST_4 +921 0x4000 //TX_MICMUTE_C_POST_FLT +922 0x03E8 //TX_MICMUTE_DT_CUT_K +923 0x0001 //TX_MICMUTE_DT_CUT_THR +924 0x03E8 //TX_MICMUTE_DT_CUT_K2 +925 0x0001 //TX_MICMUTE_DT_CUT_THR2 +926 0x0064 //TX_MICMUTE_DT2_HOLD_N +927 0x1000 //TX_MICMUTE_RATIODTH_THCUT +928 0x1000 //TX_MICMUTE_B_POST_FLT_ECHOL +929 0x7FFF //TX_MICMUTE_B_POST_FLT_ECHOH +930 0x0400 //TX_MICMUTE_C_POST_FLT_MASK +931 0x7999 //TX_MICMUTE_RATIODTL_CUT_TH +932 0x0258 //TX_MICMUTE_DT_CUT_K1 +933 0x0800 //TX_MICMUTE_N2_SN_EST +934 0xFC00 //TX_MICMUTE_THR_SN_EST_0 +935 0x001C //TX_MICMUTE_MIN_G_CTRL_0 +936 0x6000 //TX_MICMUTE_A_POST_FILT_S_0 +937 0x7000 //TX_MICMUTE_B_POST_FILT_0 +938 0x2710 //TX_MIC1RUB_AMP_THR +939 0x0010 //TX_MIC1MUTE_RATIO_THR +940 0x0450 //TX_MIC1MUTE_AMP_THR +941 0x0008 //TX_MIC1MUTE_CVG_TIME +942 0x0008 //TX_MIC1MUTE_RELEASE_TIME +943 0x0000 //TX_AMS_RESRV_01 +944 0x0000 //TX_AMS_RESRV_02 +945 0x0000 //TX_AMS_RESRV_03 +946 0x0000 //TX_AMS_RESRV_04 +947 0x0000 //TX_AMS_RESRV_05 +948 0x0000 //TX_AMS_RESRV_06 +949 0x0000 //TX_AMS_RESRV_07 +950 0x0000 //TX_AMS_RESRV_08 +951 0x0000 //TX_AMS_RESRV_09 +952 0x0000 //TX_AMS_RESRV_10 +953 0x0000 //TX_AMS_RESRV_11 +954 0x0000 //TX_AMS_RESRV_12 +955 0x0000 //TX_AMS_RESRV_13 +956 0x0000 //TX_AMS_RESRV_14 +957 0x0000 //TX_AMS_RESRV_15 +958 0x0000 //TX_AMS_RESRV_16 +959 0x0000 //TX_AMS_RESRV_17 +960 0x0000 //TX_AMS_RESRV_18 +961 0x0000 //TX_AMS_RESRV_19 #RX -0 0x002C //RX_RECVFUNC_MODE_0 +0 0x202C //RX_RECVFUNC_MODE_0 1 0x0000 //RX_RECVFUNC_MODE_1 2 0x0000 //RX_SAMPLINGFREQ_SIG 3 0x0000 //RX_SAMPLINGFREQ_PROC @@ -15788,11 +23181,862 @@ 110 0x0000 //RX_FDDRC_RESRV_0 129 0x0100 //RX_SPK_VOL 130 0x0000 //RX_VOL_RESRV_0 +#RX 2 +157 0x202C //RX_RECVFUNC_MODE_0 +158 0x0000 //RX_RECVFUNC_MODE_1 +159 0x0000 //RX_SAMPLINGFREQ_SIG +160 0x0000 //RX_SAMPLINGFREQ_PROC +161 0x000A //RX_FRAME_SZ +162 0x0000 //RX_DELAY_OPT +163 0x3000 //RX_TDDRC_ALPHA_UP_1 +164 0x3000 //RX_TDDRC_ALPHA_UP_2 +165 0x3000 //RX_TDDRC_ALPHA_UP_3 +166 0x3000 //RX_TDDRC_ALPHA_UP_4 +167 0x0800 //RX_PGA +168 0x7FFF //RX_A_HP +169 0x0000 //RX_B_PE +170 0x3800 //RX_THR_PITCH_DET_0 +171 0x3000 //RX_THR_PITCH_DET_1 +172 0x2800 //RX_THR_PITCH_DET_2 +173 0x0008 //RX_PITCH_BFR_LEN +174 0x0003 //RX_SBD_PITCH_DET +175 0x0100 //RX_PP_RESRV_0 +176 0x0020 //RX_PP_RESRV_1 +177 0x0600 //RX_N_SN_EST +178 0x000C //RX_N2_SN_EST +179 0x0010 //RX_NS_LVL_CTRL +180 0xF800 //RX_THR_SN_EST +181 0x7CCD //RX_LAMBDA_PFILT +182 0x000A //RX_FENS_RESRV_0 +183 0x0190 //RX_FENS_RESRV_1 +184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +187 0x0002 //RX_EXTRA_NS_L +188 0x0800 //RX_EXTRA_NS_A +189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +190 0x7FFF //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +192 0x199A //RX_A_POST_FLT +193 0x0000 //RX_LMT_THRD +194 0x4000 //RX_LMT_ALPHA +195 0x0014 //RX_FDEQ_SUBNUM +196 0x4848 //RX_FDEQ_GAIN_0 +197 0x4848 //RX_FDEQ_GAIN_1 +198 0x4848 //RX_FDEQ_GAIN_2 +199 0x4848 //RX_FDEQ_GAIN_3 +200 0x4848 //RX_FDEQ_GAIN_4 +201 0x4848 //RX_FDEQ_GAIN_5 +202 0x4848 //RX_FDEQ_GAIN_6 +203 0x4848 //RX_FDEQ_GAIN_7 +204 0x4848 //RX_FDEQ_GAIN_8 +205 0x4848 //RX_FDEQ_GAIN_9 +206 0x4848 //RX_FDEQ_GAIN_10 +207 0x4848 //RX_FDEQ_GAIN_11 +208 0x4848 //RX_FDEQ_GAIN_12 +209 0x4848 //RX_FDEQ_GAIN_13 +210 0x4848 //RX_FDEQ_GAIN_14 +211 0x4848 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0202 //RX_FDEQ_BIN_0 +221 0x0203 //RX_FDEQ_BIN_1 +222 0x0303 //RX_FDEQ_BIN_2 +223 0x0304 //RX_FDEQ_BIN_3 +224 0x0405 //RX_FDEQ_BIN_4 +225 0x0506 //RX_FDEQ_BIN_5 +226 0x0708 //RX_FDEQ_BIN_6 +227 0x090A //RX_FDEQ_BIN_7 +228 0x0B0C //RX_FDEQ_BIN_8 +229 0x0D08 //RX_FDEQ_BIN_9 +230 0x0000 //RX_FDEQ_BIN_10 +231 0x0000 //RX_FDEQ_BIN_11 +232 0x0000 //RX_FDEQ_BIN_12 +233 0x0000 //RX_FDEQ_BIN_13 +234 0x0000 //RX_FDEQ_BIN_14 +235 0x0000 //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x4000 //RX_FDEQ_RESRV_0 +245 0x0320 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0030 //RX_FDDRC_BAND_MARGIN_1 +248 0x0050 //RX_FDDRC_BAND_MARGIN_2 +249 0x0080 //RX_FDDRC_BAND_MARGIN_3 +250 0x0007 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x5000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x6400 //RX_FDDRC_THRD_3_2 +258 0x6400 //RX_FDDRC_THRD_3_3 +259 0x2000 //RX_FDDRC_SLANT_0_0 +260 0x2000 //RX_FDDRC_SLANT_0_1 +261 0x2000 //RX_FDDRC_SLANT_0_2 +262 0x2000 //RX_FDDRC_SLANT_0_3 +263 0x5333 //RX_FDDRC_SLANT_1_0 +264 0x5333 //RX_FDDRC_SLANT_1_1 +265 0x5333 //RX_FDDRC_SLANT_1_2 +266 0x5333 //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +268 0x0002 //RX_FILTINDX +269 0x0000 //RX_TDDRC_THRD_0 +270 0x0000 //RX_TDDRC_THRD_1 +271 0x2000 //RX_TDDRC_THRD_2 +272 0x3000 //RX_TDDRC_THRD_3 +273 0x0800 //RX_TDDRC_SLANT_0 +274 0x7EB8 //RX_TDDRC_SLANT_1 +275 0x3000 //RX_TDDRC_ALPHA_UP_0 +276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x199A //RX_TDDRC_HMNC_GAIN +279 0x0001 //RX_TDDRC_SMT_FLAG +280 0x0CCD //RX_TDDRC_SMT_W +281 0x0200 //RX_TDDRC_DRC_GAIN +282 0x7C00 //RX_LAMBDA_PKA_FP +283 0x2000 //RX_TPKA_FP +284 0x2000 //RX_MIN_G_FP +285 0x0080 //RX_MAX_G_FP +286 0x000B //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 +288 0x0000 //RX_MAXLEVEL_CNG +289 0x3000 //RX_BWE_UV_TH +290 0x3000 //RX_BWE_UV_TH2 +291 0x1800 //RX_BWE_UV_TH3 +292 0x1000 //RX_BWE_V_TH +293 0x04CD //RX_BWE_GAIN1_V_TH1 +294 0x0F33 //RX_BWE_GAIN1_V_TH2 +295 0x7333 //RX_BWE_UV_EQ +296 0x199A //RX_BWE_V_EQ +297 0x7333 //RX_BWE_TONE_TH +298 0x0004 //RX_BWE_UV_HOLD_T +299 0x6CCD //RX_BWE_GAIN2_ALPHA +300 0x799A //RX_BWE_GAIN3_ALPHA +301 0x001E //RX_BWE_CUTOFF +302 0x3000 //RX_BWE_GAINFILL +303 0x3200 //RX_BWE_MAXTH_TONE +304 0x2000 //RX_BWE_EQ_0 +305 0x2000 //RX_BWE_EQ_1 +306 0x2000 //RX_BWE_EQ_2 +307 0x2000 //RX_BWE_EQ_3 +308 0x2000 //RX_BWE_EQ_4 +309 0x2000 //RX_BWE_EQ_5 +310 0x2000 //RX_BWE_EQ_6 +311 0x0000 //RX_BWE_RESRV_0 +312 0x0000 //RX_BWE_RESRV_1 +313 0x0000 //RX_BWE_RESRV_2 +#VOL 0 +163 0x3000 //RX_TDDRC_ALPHA_UP_1 +164 0x3000 //RX_TDDRC_ALPHA_UP_2 +165 0x3000 //RX_TDDRC_ALPHA_UP_3 +166 0x3000 //RX_TDDRC_ALPHA_UP_4 +184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +190 0x7FFF //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +269 0x0000 //RX_TDDRC_THRD_0 +270 0x0000 //RX_TDDRC_THRD_1 +271 0x2000 //RX_TDDRC_THRD_2 +272 0x3000 //RX_TDDRC_THRD_3 +273 0x0800 //RX_TDDRC_SLANT_0 +274 0x7EB8 //RX_TDDRC_SLANT_1 +275 0x3000 //RX_TDDRC_ALPHA_UP_0 +276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x199A //RX_TDDRC_HMNC_GAIN +279 0x0001 //RX_TDDRC_SMT_FLAG +280 0x0CCD //RX_TDDRC_SMT_W +281 0x0200 //RX_TDDRC_DRC_GAIN +195 0x0014 //RX_FDEQ_SUBNUM +196 0x4848 //RX_FDEQ_GAIN_0 +197 0x4848 //RX_FDEQ_GAIN_1 +198 0x4848 //RX_FDEQ_GAIN_2 +199 0x4848 //RX_FDEQ_GAIN_3 +200 0x4848 //RX_FDEQ_GAIN_4 +201 0x4848 //RX_FDEQ_GAIN_5 +202 0x4848 //RX_FDEQ_GAIN_6 +203 0x4848 //RX_FDEQ_GAIN_7 +204 0x4848 //RX_FDEQ_GAIN_8 +205 0x4848 //RX_FDEQ_GAIN_9 +206 0x4848 //RX_FDEQ_GAIN_10 +207 0x4848 //RX_FDEQ_GAIN_11 +208 0x4848 //RX_FDEQ_GAIN_12 +209 0x4848 //RX_FDEQ_GAIN_13 +210 0x4848 //RX_FDEQ_GAIN_14 +211 0x4848 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0202 //RX_FDEQ_BIN_0 +221 0x0203 //RX_FDEQ_BIN_1 +222 0x0303 //RX_FDEQ_BIN_2 +223 0x0304 //RX_FDEQ_BIN_3 +224 0x0405 //RX_FDEQ_BIN_4 +225 0x0506 //RX_FDEQ_BIN_5 +226 0x0708 //RX_FDEQ_BIN_6 +227 0x090A //RX_FDEQ_BIN_7 +228 0x0B0C //RX_FDEQ_BIN_8 +229 0x0D08 //RX_FDEQ_BIN_9 +230 0x0000 //RX_FDEQ_BIN_10 +231 0x0000 //RX_FDEQ_BIN_11 +232 0x0000 //RX_FDEQ_BIN_12 +233 0x0000 //RX_FDEQ_BIN_13 +234 0x0000 //RX_FDEQ_BIN_14 +235 0x0000 //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x4000 //RX_FDEQ_RESRV_0 +245 0x0320 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0030 //RX_FDDRC_BAND_MARGIN_1 +248 0x0050 //RX_FDDRC_BAND_MARGIN_2 +249 0x0080 //RX_FDDRC_BAND_MARGIN_3 +250 0x0007 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x5000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x6400 //RX_FDDRC_THRD_3_2 +258 0x6400 //RX_FDDRC_THRD_3_3 +259 0x2000 //RX_FDDRC_SLANT_0_0 +260 0x2000 //RX_FDDRC_SLANT_0_1 +261 0x2000 //RX_FDDRC_SLANT_0_2 +262 0x2000 //RX_FDDRC_SLANT_0_3 +263 0x5333 //RX_FDDRC_SLANT_1_0 +264 0x5333 //RX_FDDRC_SLANT_1_1 +265 0x5333 //RX_FDDRC_SLANT_1_2 +266 0x5333 //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +286 0x000B //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 +#VOL 1 +163 0x3000 //RX_TDDRC_ALPHA_UP_1 +164 0x3000 //RX_TDDRC_ALPHA_UP_2 +165 0x3000 //RX_TDDRC_ALPHA_UP_3 +166 0x3000 //RX_TDDRC_ALPHA_UP_4 +184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +190 0x7FFF //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +269 0x0000 //RX_TDDRC_THRD_0 +270 0x0000 //RX_TDDRC_THRD_1 +271 0x2000 //RX_TDDRC_THRD_2 +272 0x3000 //RX_TDDRC_THRD_3 +273 0x0800 //RX_TDDRC_SLANT_0 +274 0x7EB8 //RX_TDDRC_SLANT_1 +275 0x3000 //RX_TDDRC_ALPHA_UP_0 +276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x199A //RX_TDDRC_HMNC_GAIN +279 0x0001 //RX_TDDRC_SMT_FLAG +280 0x0CCD //RX_TDDRC_SMT_W +281 0x0200 //RX_TDDRC_DRC_GAIN +195 0x0014 //RX_FDEQ_SUBNUM +196 0x4848 //RX_FDEQ_GAIN_0 +197 0x4848 //RX_FDEQ_GAIN_1 +198 0x4848 //RX_FDEQ_GAIN_2 +199 0x4848 //RX_FDEQ_GAIN_3 +200 0x4848 //RX_FDEQ_GAIN_4 +201 0x4848 //RX_FDEQ_GAIN_5 +202 0x4848 //RX_FDEQ_GAIN_6 +203 0x4848 //RX_FDEQ_GAIN_7 +204 0x4848 //RX_FDEQ_GAIN_8 +205 0x4848 //RX_FDEQ_GAIN_9 +206 0x4848 //RX_FDEQ_GAIN_10 +207 0x4848 //RX_FDEQ_GAIN_11 +208 0x4848 //RX_FDEQ_GAIN_12 +209 0x4848 //RX_FDEQ_GAIN_13 +210 0x4848 //RX_FDEQ_GAIN_14 +211 0x4848 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0202 //RX_FDEQ_BIN_0 +221 0x0203 //RX_FDEQ_BIN_1 +222 0x0303 //RX_FDEQ_BIN_2 +223 0x0304 //RX_FDEQ_BIN_3 +224 0x0405 //RX_FDEQ_BIN_4 +225 0x0506 //RX_FDEQ_BIN_5 +226 0x0708 //RX_FDEQ_BIN_6 +227 0x090A //RX_FDEQ_BIN_7 +228 0x0B0C //RX_FDEQ_BIN_8 +229 0x0D08 //RX_FDEQ_BIN_9 +230 0x0000 //RX_FDEQ_BIN_10 +231 0x0000 //RX_FDEQ_BIN_11 +232 0x0000 //RX_FDEQ_BIN_12 +233 0x0000 //RX_FDEQ_BIN_13 +234 0x0000 //RX_FDEQ_BIN_14 +235 0x0000 //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x4000 //RX_FDEQ_RESRV_0 +245 0x0320 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0030 //RX_FDDRC_BAND_MARGIN_1 +248 0x0050 //RX_FDDRC_BAND_MARGIN_2 +249 0x0080 //RX_FDDRC_BAND_MARGIN_3 +250 0x0007 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x5000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x6400 //RX_FDDRC_THRD_3_2 +258 0x6400 //RX_FDDRC_THRD_3_3 +259 0x2000 //RX_FDDRC_SLANT_0_0 +260 0x2000 //RX_FDDRC_SLANT_0_1 +261 0x2000 //RX_FDDRC_SLANT_0_2 +262 0x2000 //RX_FDDRC_SLANT_0_3 +263 0x5333 //RX_FDDRC_SLANT_1_0 +264 0x5333 //RX_FDDRC_SLANT_1_1 +265 0x5333 //RX_FDDRC_SLANT_1_2 +266 0x5333 //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +286 0x0013 //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 +#VOL 2 +163 0x3000 //RX_TDDRC_ALPHA_UP_1 +164 0x3000 //RX_TDDRC_ALPHA_UP_2 +165 0x3000 //RX_TDDRC_ALPHA_UP_3 +166 0x3000 //RX_TDDRC_ALPHA_UP_4 +184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +190 0x7FFF //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +269 0x0000 //RX_TDDRC_THRD_0 +270 0x0000 //RX_TDDRC_THRD_1 +271 0x2000 //RX_TDDRC_THRD_2 +272 0x3000 //RX_TDDRC_THRD_3 +273 0x0800 //RX_TDDRC_SLANT_0 +274 0x7EB8 //RX_TDDRC_SLANT_1 +275 0x3000 //RX_TDDRC_ALPHA_UP_0 +276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x199A //RX_TDDRC_HMNC_GAIN +279 0x0001 //RX_TDDRC_SMT_FLAG +280 0x0CCD //RX_TDDRC_SMT_W +281 0x0200 //RX_TDDRC_DRC_GAIN +195 0x0014 //RX_FDEQ_SUBNUM +196 0x4848 //RX_FDEQ_GAIN_0 +197 0x4848 //RX_FDEQ_GAIN_1 +198 0x4848 //RX_FDEQ_GAIN_2 +199 0x4848 //RX_FDEQ_GAIN_3 +200 0x4848 //RX_FDEQ_GAIN_4 +201 0x4848 //RX_FDEQ_GAIN_5 +202 0x4848 //RX_FDEQ_GAIN_6 +203 0x4848 //RX_FDEQ_GAIN_7 +204 0x4848 //RX_FDEQ_GAIN_8 +205 0x4848 //RX_FDEQ_GAIN_9 +206 0x4848 //RX_FDEQ_GAIN_10 +207 0x4848 //RX_FDEQ_GAIN_11 +208 0x4848 //RX_FDEQ_GAIN_12 +209 0x4848 //RX_FDEQ_GAIN_13 +210 0x4848 //RX_FDEQ_GAIN_14 +211 0x4848 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0202 //RX_FDEQ_BIN_0 +221 0x0203 //RX_FDEQ_BIN_1 +222 0x0303 //RX_FDEQ_BIN_2 +223 0x0304 //RX_FDEQ_BIN_3 +224 0x0405 //RX_FDEQ_BIN_4 +225 0x0506 //RX_FDEQ_BIN_5 +226 0x0708 //RX_FDEQ_BIN_6 +227 0x090A //RX_FDEQ_BIN_7 +228 0x0B0C //RX_FDEQ_BIN_8 +229 0x0D08 //RX_FDEQ_BIN_9 +230 0x0000 //RX_FDEQ_BIN_10 +231 0x0000 //RX_FDEQ_BIN_11 +232 0x0000 //RX_FDEQ_BIN_12 +233 0x0000 //RX_FDEQ_BIN_13 +234 0x0000 //RX_FDEQ_BIN_14 +235 0x0000 //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x4000 //RX_FDEQ_RESRV_0 +245 0x0320 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0030 //RX_FDDRC_BAND_MARGIN_1 +248 0x0050 //RX_FDDRC_BAND_MARGIN_2 +249 0x0080 //RX_FDDRC_BAND_MARGIN_3 +250 0x0007 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x5000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x6400 //RX_FDDRC_THRD_3_2 +258 0x6400 //RX_FDDRC_THRD_3_3 +259 0x2000 //RX_FDDRC_SLANT_0_0 +260 0x2000 //RX_FDDRC_SLANT_0_1 +261 0x2000 //RX_FDDRC_SLANT_0_2 +262 0x2000 //RX_FDDRC_SLANT_0_3 +263 0x5333 //RX_FDDRC_SLANT_1_0 +264 0x5333 //RX_FDDRC_SLANT_1_1 +265 0x5333 //RX_FDDRC_SLANT_1_2 +266 0x5333 //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +286 0x0020 //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 +#VOL 3 +163 0x3000 //RX_TDDRC_ALPHA_UP_1 +164 0x3000 //RX_TDDRC_ALPHA_UP_2 +165 0x3000 //RX_TDDRC_ALPHA_UP_3 +166 0x3000 //RX_TDDRC_ALPHA_UP_4 +184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +190 0x7FFF //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +269 0x0000 //RX_TDDRC_THRD_0 +270 0x0000 //RX_TDDRC_THRD_1 +271 0x2000 //RX_TDDRC_THRD_2 +272 0x3000 //RX_TDDRC_THRD_3 +273 0x0800 //RX_TDDRC_SLANT_0 +274 0x7EB8 //RX_TDDRC_SLANT_1 +275 0x3000 //RX_TDDRC_ALPHA_UP_0 +276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x199A //RX_TDDRC_HMNC_GAIN +279 0x0001 //RX_TDDRC_SMT_FLAG +280 0x0CCD //RX_TDDRC_SMT_W +281 0x0200 //RX_TDDRC_DRC_GAIN +195 0x0014 //RX_FDEQ_SUBNUM +196 0x4848 //RX_FDEQ_GAIN_0 +197 0x4848 //RX_FDEQ_GAIN_1 +198 0x4848 //RX_FDEQ_GAIN_2 +199 0x4848 //RX_FDEQ_GAIN_3 +200 0x4848 //RX_FDEQ_GAIN_4 +201 0x4848 //RX_FDEQ_GAIN_5 +202 0x4848 //RX_FDEQ_GAIN_6 +203 0x4848 //RX_FDEQ_GAIN_7 +204 0x4848 //RX_FDEQ_GAIN_8 +205 0x4848 //RX_FDEQ_GAIN_9 +206 0x4848 //RX_FDEQ_GAIN_10 +207 0x4848 //RX_FDEQ_GAIN_11 +208 0x4848 //RX_FDEQ_GAIN_12 +209 0x4848 //RX_FDEQ_GAIN_13 +210 0x4848 //RX_FDEQ_GAIN_14 +211 0x4848 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0202 //RX_FDEQ_BIN_0 +221 0x0203 //RX_FDEQ_BIN_1 +222 0x0303 //RX_FDEQ_BIN_2 +223 0x0304 //RX_FDEQ_BIN_3 +224 0x0405 //RX_FDEQ_BIN_4 +225 0x0506 //RX_FDEQ_BIN_5 +226 0x0708 //RX_FDEQ_BIN_6 +227 0x090A //RX_FDEQ_BIN_7 +228 0x0B0C //RX_FDEQ_BIN_8 +229 0x0D08 //RX_FDEQ_BIN_9 +230 0x0000 //RX_FDEQ_BIN_10 +231 0x0000 //RX_FDEQ_BIN_11 +232 0x0000 //RX_FDEQ_BIN_12 +233 0x0000 //RX_FDEQ_BIN_13 +234 0x0000 //RX_FDEQ_BIN_14 +235 0x0000 //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x4000 //RX_FDEQ_RESRV_0 +245 0x0320 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0030 //RX_FDDRC_BAND_MARGIN_1 +248 0x0050 //RX_FDDRC_BAND_MARGIN_2 +249 0x0080 //RX_FDDRC_BAND_MARGIN_3 +250 0x0007 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x5000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x6400 //RX_FDDRC_THRD_3_2 +258 0x6400 //RX_FDDRC_THRD_3_3 +259 0x2000 //RX_FDDRC_SLANT_0_0 +260 0x2000 //RX_FDDRC_SLANT_0_1 +261 0x2000 //RX_FDDRC_SLANT_0_2 +262 0x2000 //RX_FDDRC_SLANT_0_3 +263 0x5333 //RX_FDDRC_SLANT_1_0 +264 0x5333 //RX_FDDRC_SLANT_1_1 +265 0x5333 //RX_FDDRC_SLANT_1_2 +266 0x5333 //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +286 0x0036 //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 +#VOL 4 +163 0x3000 //RX_TDDRC_ALPHA_UP_1 +164 0x3000 //RX_TDDRC_ALPHA_UP_2 +165 0x3000 //RX_TDDRC_ALPHA_UP_3 +166 0x3000 //RX_TDDRC_ALPHA_UP_4 +184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +190 0x7FFF //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +269 0x0000 //RX_TDDRC_THRD_0 +270 0x0000 //RX_TDDRC_THRD_1 +271 0x2000 //RX_TDDRC_THRD_2 +272 0x3000 //RX_TDDRC_THRD_3 +273 0x0800 //RX_TDDRC_SLANT_0 +274 0x7EB8 //RX_TDDRC_SLANT_1 +275 0x3000 //RX_TDDRC_ALPHA_UP_0 +276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x199A //RX_TDDRC_HMNC_GAIN +279 0x0001 //RX_TDDRC_SMT_FLAG +280 0x0CCD //RX_TDDRC_SMT_W +281 0x0200 //RX_TDDRC_DRC_GAIN +195 0x0014 //RX_FDEQ_SUBNUM +196 0x4848 //RX_FDEQ_GAIN_0 +197 0x4848 //RX_FDEQ_GAIN_1 +198 0x4848 //RX_FDEQ_GAIN_2 +199 0x4848 //RX_FDEQ_GAIN_3 +200 0x4848 //RX_FDEQ_GAIN_4 +201 0x4848 //RX_FDEQ_GAIN_5 +202 0x4848 //RX_FDEQ_GAIN_6 +203 0x4848 //RX_FDEQ_GAIN_7 +204 0x4848 //RX_FDEQ_GAIN_8 +205 0x4848 //RX_FDEQ_GAIN_9 +206 0x4848 //RX_FDEQ_GAIN_10 +207 0x4848 //RX_FDEQ_GAIN_11 +208 0x4848 //RX_FDEQ_GAIN_12 +209 0x4848 //RX_FDEQ_GAIN_13 +210 0x4848 //RX_FDEQ_GAIN_14 +211 0x4848 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0202 //RX_FDEQ_BIN_0 +221 0x0203 //RX_FDEQ_BIN_1 +222 0x0303 //RX_FDEQ_BIN_2 +223 0x0304 //RX_FDEQ_BIN_3 +224 0x0405 //RX_FDEQ_BIN_4 +225 0x0506 //RX_FDEQ_BIN_5 +226 0x0708 //RX_FDEQ_BIN_6 +227 0x090A //RX_FDEQ_BIN_7 +228 0x0B0C //RX_FDEQ_BIN_8 +229 0x0D08 //RX_FDEQ_BIN_9 +230 0x0000 //RX_FDEQ_BIN_10 +231 0x0000 //RX_FDEQ_BIN_11 +232 0x0000 //RX_FDEQ_BIN_12 +233 0x0000 //RX_FDEQ_BIN_13 +234 0x0000 //RX_FDEQ_BIN_14 +235 0x0000 //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x4000 //RX_FDEQ_RESRV_0 +245 0x0320 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0030 //RX_FDDRC_BAND_MARGIN_1 +248 0x0050 //RX_FDDRC_BAND_MARGIN_2 +249 0x0080 //RX_FDDRC_BAND_MARGIN_3 +250 0x0007 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x5000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x6400 //RX_FDDRC_THRD_3_2 +258 0x6400 //RX_FDDRC_THRD_3_3 +259 0x2000 //RX_FDDRC_SLANT_0_0 +260 0x2000 //RX_FDDRC_SLANT_0_1 +261 0x2000 //RX_FDDRC_SLANT_0_2 +262 0x2000 //RX_FDDRC_SLANT_0_3 +263 0x5333 //RX_FDDRC_SLANT_1_0 +264 0x5333 //RX_FDDRC_SLANT_1_1 +265 0x5333 //RX_FDDRC_SLANT_1_2 +266 0x5333 //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +286 0x005B //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 +#VOL 5 +163 0x3000 //RX_TDDRC_ALPHA_UP_1 +164 0x3000 //RX_TDDRC_ALPHA_UP_2 +165 0x3000 //RX_TDDRC_ALPHA_UP_3 +166 0x3000 //RX_TDDRC_ALPHA_UP_4 +184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +190 0x7FFF //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +269 0x0000 //RX_TDDRC_THRD_0 +270 0x0000 //RX_TDDRC_THRD_1 +271 0x2000 //RX_TDDRC_THRD_2 +272 0x3000 //RX_TDDRC_THRD_3 +273 0x0800 //RX_TDDRC_SLANT_0 +274 0x7EB8 //RX_TDDRC_SLANT_1 +275 0x3000 //RX_TDDRC_ALPHA_UP_0 +276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x199A //RX_TDDRC_HMNC_GAIN +279 0x0001 //RX_TDDRC_SMT_FLAG +280 0x0CCD //RX_TDDRC_SMT_W +281 0x0200 //RX_TDDRC_DRC_GAIN +195 0x0014 //RX_FDEQ_SUBNUM +196 0x4848 //RX_FDEQ_GAIN_0 +197 0x4848 //RX_FDEQ_GAIN_1 +198 0x4848 //RX_FDEQ_GAIN_2 +199 0x4848 //RX_FDEQ_GAIN_3 +200 0x4848 //RX_FDEQ_GAIN_4 +201 0x4848 //RX_FDEQ_GAIN_5 +202 0x4848 //RX_FDEQ_GAIN_6 +203 0x4848 //RX_FDEQ_GAIN_7 +204 0x4848 //RX_FDEQ_GAIN_8 +205 0x4848 //RX_FDEQ_GAIN_9 +206 0x4848 //RX_FDEQ_GAIN_10 +207 0x4848 //RX_FDEQ_GAIN_11 +208 0x4848 //RX_FDEQ_GAIN_12 +209 0x4848 //RX_FDEQ_GAIN_13 +210 0x4848 //RX_FDEQ_GAIN_14 +211 0x4848 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0202 //RX_FDEQ_BIN_0 +221 0x0203 //RX_FDEQ_BIN_1 +222 0x0303 //RX_FDEQ_BIN_2 +223 0x0304 //RX_FDEQ_BIN_3 +224 0x0405 //RX_FDEQ_BIN_4 +225 0x0506 //RX_FDEQ_BIN_5 +226 0x0708 //RX_FDEQ_BIN_6 +227 0x090A //RX_FDEQ_BIN_7 +228 0x0B0C //RX_FDEQ_BIN_8 +229 0x0D08 //RX_FDEQ_BIN_9 +230 0x0000 //RX_FDEQ_BIN_10 +231 0x0000 //RX_FDEQ_BIN_11 +232 0x0000 //RX_FDEQ_BIN_12 +233 0x0000 //RX_FDEQ_BIN_13 +234 0x0000 //RX_FDEQ_BIN_14 +235 0x0000 //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x4000 //RX_FDEQ_RESRV_0 +245 0x0320 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0030 //RX_FDDRC_BAND_MARGIN_1 +248 0x0050 //RX_FDDRC_BAND_MARGIN_2 +249 0x0080 //RX_FDDRC_BAND_MARGIN_3 +250 0x0007 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x5000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x6400 //RX_FDDRC_THRD_3_2 +258 0x6400 //RX_FDDRC_THRD_3_3 +259 0x2000 //RX_FDDRC_SLANT_0_0 +260 0x2000 //RX_FDDRC_SLANT_0_1 +261 0x2000 //RX_FDDRC_SLANT_0_2 +262 0x2000 //RX_FDDRC_SLANT_0_3 +263 0x5333 //RX_FDDRC_SLANT_1_0 +264 0x5333 //RX_FDDRC_SLANT_1_1 +265 0x5333 //RX_FDDRC_SLANT_1_2 +266 0x5333 //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +286 0x0099 //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 +#VOL 6 +163 0x3000 //RX_TDDRC_ALPHA_UP_1 +164 0x3000 //RX_TDDRC_ALPHA_UP_2 +165 0x3000 //RX_TDDRC_ALPHA_UP_3 +166 0x3000 //RX_TDDRC_ALPHA_UP_4 +184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +190 0x7FFF //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +269 0x0000 //RX_TDDRC_THRD_0 +270 0x0000 //RX_TDDRC_THRD_1 +271 0x2000 //RX_TDDRC_THRD_2 +272 0x3000 //RX_TDDRC_THRD_3 +273 0x0800 //RX_TDDRC_SLANT_0 +274 0x7EB8 //RX_TDDRC_SLANT_1 +275 0x3000 //RX_TDDRC_ALPHA_UP_0 +276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x199A //RX_TDDRC_HMNC_GAIN +279 0x0001 //RX_TDDRC_SMT_FLAG +280 0x0CCD //RX_TDDRC_SMT_W +281 0x0200 //RX_TDDRC_DRC_GAIN +195 0x0014 //RX_FDEQ_SUBNUM +196 0x4848 //RX_FDEQ_GAIN_0 +197 0x4848 //RX_FDEQ_GAIN_1 +198 0x4848 //RX_FDEQ_GAIN_2 +199 0x4848 //RX_FDEQ_GAIN_3 +200 0x4848 //RX_FDEQ_GAIN_4 +201 0x4848 //RX_FDEQ_GAIN_5 +202 0x4848 //RX_FDEQ_GAIN_6 +203 0x4848 //RX_FDEQ_GAIN_7 +204 0x4848 //RX_FDEQ_GAIN_8 +205 0x4848 //RX_FDEQ_GAIN_9 +206 0x4848 //RX_FDEQ_GAIN_10 +207 0x4848 //RX_FDEQ_GAIN_11 +208 0x4848 //RX_FDEQ_GAIN_12 +209 0x4848 //RX_FDEQ_GAIN_13 +210 0x4848 //RX_FDEQ_GAIN_14 +211 0x4848 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0202 //RX_FDEQ_BIN_0 +221 0x0203 //RX_FDEQ_BIN_1 +222 0x0303 //RX_FDEQ_BIN_2 +223 0x0304 //RX_FDEQ_BIN_3 +224 0x0405 //RX_FDEQ_BIN_4 +225 0x0506 //RX_FDEQ_BIN_5 +226 0x0708 //RX_FDEQ_BIN_6 +227 0x090A //RX_FDEQ_BIN_7 +228 0x0B0C //RX_FDEQ_BIN_8 +229 0x0D08 //RX_FDEQ_BIN_9 +230 0x0000 //RX_FDEQ_BIN_10 +231 0x0000 //RX_FDEQ_BIN_11 +232 0x0000 //RX_FDEQ_BIN_12 +233 0x0000 //RX_FDEQ_BIN_13 +234 0x0000 //RX_FDEQ_BIN_14 +235 0x0000 //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x4000 //RX_FDEQ_RESRV_0 +245 0x0320 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0030 //RX_FDDRC_BAND_MARGIN_1 +248 0x0050 //RX_FDDRC_BAND_MARGIN_2 +249 0x0080 //RX_FDDRC_BAND_MARGIN_3 +250 0x0007 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x5000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x6400 //RX_FDDRC_THRD_3_2 +258 0x6400 //RX_FDDRC_THRD_3_3 +259 0x2000 //RX_FDDRC_SLANT_0_0 +260 0x2000 //RX_FDDRC_SLANT_0_1 +261 0x2000 //RX_FDDRC_SLANT_0_2 +262 0x2000 //RX_FDDRC_SLANT_0_3 +263 0x5333 //RX_FDDRC_SLANT_1_0 +264 0x5333 //RX_FDDRC_SLANT_1_1 +265 0x5333 //RX_FDDRC_SLANT_1_2 +266 0x5333 //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +286 0x0100 //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 #CASE_NAME HEADSET-RESERVE1-VOICE_GENERIC-WB -#PARAM_MODE FULL -#PARAM_TYPE TX+RX -#TOTAL_CUSTOM_STEP 7 +#PARAM_MODE Full +#PARAM_TYPE TX+2RX +#TOTAL_CUSTOM_STEP 7+7 #TX 0 0x0009 //TX_OPERATION_MODE_0 1 0x0008 //TX_OPERATION_MODE_1 @@ -16036,7 +24280,7 @@ 239 0x0800 //TX_DT_RESRV_7 240 0x0800 //TX_DT_RESRV_8 241 0x0000 //TX_DT_RESRV_9 -242 0xF400 //TX_THR_SN_EST_0 +242 0xFA00 //TX_THR_SN_EST_0 243 0xF400 //TX_THR_SN_EST_1 244 0xF600 //TX_THR_SN_EST_2 245 0xF400 //TX_THR_SN_EST_3 @@ -16045,20 +24289,20 @@ 248 0xF400 //TX_THR_SN_EST_6 249 0xF600 //TX_THR_SN_EST_7 250 0x0000 //TX_DELTA_THR_SN_EST_0 -251 0x0000 //TX_DELTA_THR_SN_EST_1 +251 0x0200 //TX_DELTA_THR_SN_EST_1 252 0x0200 //TX_DELTA_THR_SN_EST_2 253 0x0200 //TX_DELTA_THR_SN_EST_3 254 0x0200 //TX_DELTA_THR_SN_EST_4 255 0x0200 //TX_DELTA_THR_SN_EST_5 -256 0x0200 //TX_DELTA_THR_SN_EST_6 +256 0x0000 //TX_DELTA_THR_SN_EST_6 257 0x0200 //TX_DELTA_THR_SN_EST_7 258 0x6000 //TX_LAMBDA_NN_EST_0 -259 0x6000 //TX_LAMBDA_NN_EST_1 +259 0x4000 //TX_LAMBDA_NN_EST_1 260 0x4000 //TX_LAMBDA_NN_EST_2 261 0x4000 //TX_LAMBDA_NN_EST_3 262 0x4000 //TX_LAMBDA_NN_EST_4 263 0x4000 //TX_LAMBDA_NN_EST_5 -264 0x4000 //TX_LAMBDA_NN_EST_6 +264 0x6000 //TX_LAMBDA_NN_EST_6 265 0x4000 //TX_LAMBDA_NN_EST_7 266 0x0400 //TX_N_SN_EST 267 0x001E //TX_INBEAM_T @@ -16076,16 +24320,16 @@ 279 0x1000 //TX_B_POST_FLT_0 280 0x1000 //TX_B_POST_FLT_1 281 0x000F //TX_NS_LVL_CTRL_0 -282 0x000F //TX_NS_LVL_CTRL_1 -283 0x0011 //TX_NS_LVL_CTRL_2 +282 0x0011 //TX_NS_LVL_CTRL_1 +283 0x000F //TX_NS_LVL_CTRL_2 284 0x000F //TX_NS_LVL_CTRL_3 285 0x000F //TX_NS_LVL_CTRL_4 286 0x000F //TX_NS_LVL_CTRL_5 287 0x000F //TX_NS_LVL_CTRL_6 288 0x0011 //TX_NS_LVL_CTRL_7 289 0x000C //TX_MIN_GAIN_S_0 -290 0x000C //TX_MIN_GAIN_S_1 -291 0x000F //TX_MIN_GAIN_S_2 +290 0x000F //TX_MIN_GAIN_S_1 +291 0x000C //TX_MIN_GAIN_S_2 292 0x000C //TX_MIN_GAIN_S_3 293 0x000C //TX_MIN_GAIN_S_4 294 0x000C //TX_MIN_GAIN_S_5 @@ -16109,12 +24353,12 @@ 312 0x7FFF //TX_A_POST_FILT_0 313 0x2000 //TX_A_POST_FILT_1 314 0x4000 //TX_A_POST_FILT_S_0 -315 0x4000 //TX_A_POST_FILT_S_1 +315 0x5000 //TX_A_POST_FILT_S_1 316 0x5000 //TX_A_POST_FILT_S_2 317 0x5000 //TX_A_POST_FILT_S_3 318 0x5000 //TX_A_POST_FILT_S_4 319 0x5000 //TX_A_POST_FILT_S_5 -320 0x5000 //TX_A_POST_FILT_S_6 +320 0x4000 //TX_A_POST_FILT_S_6 321 0x5000 //TX_A_POST_FILT_S_7 322 0x1000 //TX_B_POST_FILT_0 323 0x1000 //TX_B_POST_FILT_1 @@ -16161,7 +24405,7 @@ 364 0x0000 //TX_K_APT 365 0x0001 //TX_NOISEDET 366 0x0190 //TX_NDETCT -367 0x0050 //TX_NOISE_TH_0 +367 0x0102 //TX_NOISE_TH_0 368 0x7FFF //TX_NOISE_TH_0_2 369 0x7FFF //TX_NOISE_TH_0_3 370 0x07D0 //TX_NOISE_TH_1 @@ -16173,11 +24417,11 @@ 376 0x7FFF //TX_NOISE_TH_5_3 377 0x7FFF //TX_NOISE_TH_5_4 378 0x044C //TX_NOISE_TH_6 -379 0x0014 //TX_MINENOISE_TH -380 0x4000 //TX_MINENOISE_MIC0_TH_MTS -381 0xFFEE //TX_MINENOISE_MIC0_TH_EXP -382 0x6000 //TX_MINENOISE_MIC0_S_TH_MTS -383 0xFFF3 //TX_MINENOISE_MIC0_S_TH_EXP +379 0x00F8 //TX_MINENOISE_TH +380 0xD508 //TX_MORENS_TFMASK_TH +381 0x0001 //TX_DRC_QUIET_FLOOR +382 0x3A98 //TX_RATIODTL_CUT_TH +383 0x0DAC //TX_DT_CUT_K1 384 0x0666 //TX_OUT_ENER_S_TH_CLEAN 385 0x0666 //TX_OUT_ENER_S_TH_LESSCLEAN 386 0x0333 //TX_OUT_ENER_S_TH_NOISY @@ -16185,22 +24429,22 @@ 388 0x0333 //TX_OUT_ENER_TH_SPEECH 389 0x2000 //TX_SN_NPB_GAIN 390 0x0000 //TX_NN_NPB_GAIN -391 0x0000 //TX_CSX_ALPHA_0 -392 0x0000 //TX_CSX_ALPHA_1 -393 0x0000 //TX_CSX_ALPHA_2 -394 0x0000 //TX_CSX_ALPHA_3 -395 0x0800 //TX_MU_ARSP_EST -396 0x00C8 //TX_P_OUTBEAM_MIN_TH +391 0x7FFF //TX_POST_MASK_SUP_HSNE +392 0x1388 //TX_TAIL_DET_TH +393 0x4000 //TX_B_LESSCUT_RTO_WTA +394 0x0000 //TX_MEL_G_R +395 0x0080 //TX_SUPHIGH_TH +396 0x0000 //TX_MASK_G_R 397 0x0002 //TX_EXTRA_NS_L -398 0x0800 //TX_EXTRA_NS_A -399 0x0005 //TX_VR_NOISE_FLOOR_TH +398 0x1800 //TX_C_POST_FLT_MASK +399 0x7FFF //TX_A_POST_FLT_WNS 400 0x0148 //TX_MIN_G_LOW300HZ 401 0x0002 //TX_MAXLEVEL_CNG 402 0x00B4 //TX_STN_NOISE_TH 403 0x4000 //TX_POST_MASK_SUP 404 0x7FFF //TX_POST_MASK_ADJUST 405 0x00C8 //TX_NS_ENOISE_MIC0_TH -406 0x0014 //TX_MINENOISE_MIC0_TH +406 0x00DC //TX_MINENOISE_MIC0_TH 407 0x012C //TX_MINENOISE_MIC0_S_TH 408 0x7FFF //TX_MIN_G_CTRL_SSNS 409 0x0000 //TX_METAL_RTO_THR @@ -16308,16 +24552,16 @@ 511 0x6666 //TX_MIC_TO_BFGAIN 512 0x0000 //TX_MICTOBFGAIN0 513 0x0000 //TX_FASTMUE_TH -514 0x0000 //TX_DERVB_LEN_0 -515 0x0000 //TX_DERVB_LEN_1 -516 0x0000 //TX_RHO_DERVB -517 0x0000 //TX_MIC_INDX_DERVB -518 0x0000 //TX_MU_DERVB -519 0x0000 //TX_DR_RESRV_0 -520 0x0000 //TX_DR_RESRV_1 -521 0x0000 //TX_DR_RESRV_2 -522 0x0000 //TX_DR_RESRV_3 -523 0x0000 //TX_DR_RESRV_4 +514 0xC000 //TX_DEREVERB_LF_MU +515 0xC000 //TX_DEREVERB_HF_MU +516 0xCCCC //TX_DEREVERB_DELAY +517 0xD999 //TX_DEREVERB_COEF_LEN +518 0x1F40 //TX_DEREVERB_DNR +519 0x0000 //TX_DEREVERB_ALPHA +520 0x0000 //TX_DEREVERB_BETA +521 0x0000 //TX_GSC_RTOL_TH +522 0x7000 //TX_GSC_RTOH_TH +523 0x0064 //TX_WIDE2_MEANHTH 524 0x0000 //TX_DR_RESRV_5 525 0x0000 //TX_DR_RESRV_6 526 0x0000 //TX_DR_RESRV_7 @@ -16685,14 +24929,79 @@ 888 0x00C8 //TX_FASTNS_ARSPC_TH 889 0xC000 //TX_FASTNS_MASK5_TH 890 0x4848 //TX_POSTSSA_MIN_G_VR_MASK -891 0x7FFF //TX_A_LESSCUT_RTO_MASK +891 0x4000 //TX_A_LESSCUT_RTO_MASK 892 0x1770 //TX_FASTNS_NOISETH 893 0xC000 //TX_FASTNS_SSA_THLFL 894 0xC000 //TX_FASTNS_SSA_THHFL 895 0xCCCC //TX_FASTNS_SSA_THLFH 896 0xD999 //TX_FASTNS_SSA_THHFH +897 0x2339 //TX_SENDFUNC_REG_MICMUTE +898 0x0021 //TX_SENDFUNC_REG_MICMUTE1 +899 0x02BC //TX_MICMUTE_RATIO_THR +900 0x0140 //TX_MICMUTE_AMP_THR +901 0x0004 //TX_MICMUTE_HPF_IND +902 0x00C0 //TX_MICMUTE_LOG_EYR_TH +903 0x0008 //TX_MICMUTE_CVG_TIME +904 0x0008 //TX_MICMUTE_RELEASE_TIME +905 0x01FE //TX_MIC_VOLUME_MIC0MUTE +906 0x0020 //TX_MICMUTE_EPD_OFFSET_0 +907 0x001E //TX_MICMUTE_FRQ_AEC_L +908 0x7999 //TX_MICMUTE_EAD_THR +909 0x7FFF //TX_MICMUTE_LAMBDA_CB_NLE +910 0x7FFF //TX_MICMUTE_LAMBDA_RE_EST +911 0x4000 //TX_DTD_THR1_MICMUTE_0 +912 0x7000 //TX_DTD_THR1_MICMUTE_1 +913 0x7FFF //TX_DTD_THR1_MICMUTE_2 +914 0x7FFF //TX_DTD_THR1_MICMUTE_3 +915 0x6CCC //TX_DTD_THR2_MICMUTE_0 +916 0x0400 //TX_MICMUTE_MIN_EQ_RE_EST_0 +917 0x0400 //TX_MICMUTE_MIN_EQ_RE_EST_1 +918 0x1000 //TX_MICMUTE_MIN_EQ_RE_EST_2 +919 0x7FFF //TX_MICMUTE_MIN_EQ_RE_EST_3 +920 0x7FFF //TX_MICMUTE_MIN_EQ_RE_EST_4 +921 0x4000 //TX_MICMUTE_C_POST_FLT +922 0x03E8 //TX_MICMUTE_DT_CUT_K +923 0x0001 //TX_MICMUTE_DT_CUT_THR +924 0x03E8 //TX_MICMUTE_DT_CUT_K2 +925 0x0001 //TX_MICMUTE_DT_CUT_THR2 +926 0x0064 //TX_MICMUTE_DT2_HOLD_N +927 0x1000 //TX_MICMUTE_RATIODTH_THCUT +928 0x1000 //TX_MICMUTE_B_POST_FLT_ECHOL +929 0x7FFF //TX_MICMUTE_B_POST_FLT_ECHOH +930 0x0400 //TX_MICMUTE_C_POST_FLT_MASK +931 0x7999 //TX_MICMUTE_RATIODTL_CUT_TH +932 0x0258 //TX_MICMUTE_DT_CUT_K1 +933 0x0800 //TX_MICMUTE_N2_SN_EST +934 0xFC00 //TX_MICMUTE_THR_SN_EST_0 +935 0x001C //TX_MICMUTE_MIN_G_CTRL_0 +936 0x6000 //TX_MICMUTE_A_POST_FILT_S_0 +937 0x7000 //TX_MICMUTE_B_POST_FILT_0 +938 0x2710 //TX_MIC1RUB_AMP_THR +939 0x0010 //TX_MIC1MUTE_RATIO_THR +940 0x0450 //TX_MIC1MUTE_AMP_THR +941 0x0008 //TX_MIC1MUTE_CVG_TIME +942 0x0008 //TX_MIC1MUTE_RELEASE_TIME +943 0x0000 //TX_AMS_RESRV_01 +944 0x0000 //TX_AMS_RESRV_02 +945 0x0000 //TX_AMS_RESRV_03 +946 0x0000 //TX_AMS_RESRV_04 +947 0x0000 //TX_AMS_RESRV_05 +948 0x0000 //TX_AMS_RESRV_06 +949 0x0000 //TX_AMS_RESRV_07 +950 0x0000 //TX_AMS_RESRV_08 +951 0x0000 //TX_AMS_RESRV_09 +952 0x0000 //TX_AMS_RESRV_10 +953 0x0000 //TX_AMS_RESRV_11 +954 0x0000 //TX_AMS_RESRV_12 +955 0x0000 //TX_AMS_RESRV_13 +956 0x0000 //TX_AMS_RESRV_14 +957 0x0000 //TX_AMS_RESRV_15 +958 0x0000 //TX_AMS_RESRV_16 +959 0x0000 //TX_AMS_RESRV_17 +960 0x0000 //TX_AMS_RESRV_18 +961 0x0000 //TX_AMS_RESRV_19 #RX -0 0x002C //RX_RECVFUNC_MODE_0 +0 0x202C //RX_RECVFUNC_MODE_0 1 0x0000 //RX_RECVFUNC_MODE_1 2 0x0001 //RX_SAMPLINGFREQ_SIG 3 0x0001 //RX_SAMPLINGFREQ_PROC @@ -17542,11 +25851,862 @@ 110 0x0000 //RX_FDDRC_RESRV_0 129 0x0100 //RX_SPK_VOL 130 0x0000 //RX_VOL_RESRV_0 +#RX 2 +157 0x202C //RX_RECVFUNC_MODE_0 +158 0x0000 //RX_RECVFUNC_MODE_1 +159 0x0001 //RX_SAMPLINGFREQ_SIG +160 0x0001 //RX_SAMPLINGFREQ_PROC +161 0x000A //RX_FRAME_SZ +162 0x0000 //RX_DELAY_OPT +163 0x3000 //RX_TDDRC_ALPHA_UP_1 +164 0x3000 //RX_TDDRC_ALPHA_UP_2 +165 0x3000 //RX_TDDRC_ALPHA_UP_3 +166 0x3000 //RX_TDDRC_ALPHA_UP_4 +167 0x0800 //RX_PGA +168 0x7FFF //RX_A_HP +169 0x4000 //RX_B_PE +170 0x3800 //RX_THR_PITCH_DET_0 +171 0x3000 //RX_THR_PITCH_DET_1 +172 0x2800 //RX_THR_PITCH_DET_2 +173 0x0008 //RX_PITCH_BFR_LEN +174 0x0003 //RX_SBD_PITCH_DET +175 0x0100 //RX_PP_RESRV_0 +176 0x0020 //RX_PP_RESRV_1 +177 0x0600 //RX_N_SN_EST +178 0x000C //RX_N2_SN_EST +179 0x0010 //RX_NS_LVL_CTRL +180 0xF800 //RX_THR_SN_EST +181 0x7CCD //RX_LAMBDA_PFILT +182 0x000A //RX_FENS_RESRV_0 +183 0x0190 //RX_FENS_RESRV_1 +184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +187 0x0002 //RX_EXTRA_NS_L +188 0x0800 //RX_EXTRA_NS_A +189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +190 0x7FFF //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +192 0x199A //RX_A_POST_FLT +193 0x0000 //RX_LMT_THRD +194 0x4000 //RX_LMT_ALPHA +195 0x001C //RX_FDEQ_SUBNUM +196 0x4848 //RX_FDEQ_GAIN_0 +197 0x4848 //RX_FDEQ_GAIN_1 +198 0x4848 //RX_FDEQ_GAIN_2 +199 0x4848 //RX_FDEQ_GAIN_3 +200 0x4848 //RX_FDEQ_GAIN_4 +201 0x4848 //RX_FDEQ_GAIN_5 +202 0x4848 //RX_FDEQ_GAIN_6 +203 0x4848 //RX_FDEQ_GAIN_7 +204 0x4848 //RX_FDEQ_GAIN_8 +205 0x4848 //RX_FDEQ_GAIN_9 +206 0x4848 //RX_FDEQ_GAIN_10 +207 0x4848 //RX_FDEQ_GAIN_11 +208 0x4848 //RX_FDEQ_GAIN_12 +209 0x4848 //RX_FDEQ_GAIN_13 +210 0x4848 //RX_FDEQ_GAIN_14 +211 0x4848 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0202 //RX_FDEQ_BIN_0 +221 0x0203 //RX_FDEQ_BIN_1 +222 0x0303 //RX_FDEQ_BIN_2 +223 0x0304 //RX_FDEQ_BIN_3 +224 0x0405 //RX_FDEQ_BIN_4 +225 0x0506 //RX_FDEQ_BIN_5 +226 0x0708 //RX_FDEQ_BIN_6 +227 0x090A //RX_FDEQ_BIN_7 +228 0x0B0C //RX_FDEQ_BIN_8 +229 0x0D0E //RX_FDEQ_BIN_9 +230 0x0E0F //RX_FDEQ_BIN_10 +231 0x0F10 //RX_FDEQ_BIN_11 +232 0x1011 //RX_FDEQ_BIN_12 +233 0x1104 //RX_FDEQ_BIN_13 +234 0x0000 //RX_FDEQ_BIN_14 +235 0x0000 //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x4000 //RX_FDEQ_RESRV_0 +245 0x0320 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0030 //RX_FDDRC_BAND_MARGIN_1 +248 0x0050 //RX_FDDRC_BAND_MARGIN_2 +249 0x0080 //RX_FDDRC_BAND_MARGIN_3 +250 0x0007 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x5000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x6400 //RX_FDDRC_THRD_3_2 +258 0x6400 //RX_FDDRC_THRD_3_3 +259 0x2000 //RX_FDDRC_SLANT_0_0 +260 0x2000 //RX_FDDRC_SLANT_0_1 +261 0x2000 //RX_FDDRC_SLANT_0_2 +262 0x2000 //RX_FDDRC_SLANT_0_3 +263 0x5333 //RX_FDDRC_SLANT_1_0 +264 0x5333 //RX_FDDRC_SLANT_1_1 +265 0x5333 //RX_FDDRC_SLANT_1_2 +266 0x5333 //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +268 0x0002 //RX_FILTINDX +269 0x0000 //RX_TDDRC_THRD_0 +270 0x0000 //RX_TDDRC_THRD_1 +271 0x2000 //RX_TDDRC_THRD_2 +272 0x3000 //RX_TDDRC_THRD_3 +273 0x0800 //RX_TDDRC_SLANT_0 +274 0x7EB8 //RX_TDDRC_SLANT_1 +275 0x3000 //RX_TDDRC_ALPHA_UP_0 +276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x199A //RX_TDDRC_HMNC_GAIN +279 0x0001 //RX_TDDRC_SMT_FLAG +280 0x0CCD //RX_TDDRC_SMT_W +281 0x0196 //RX_TDDRC_DRC_GAIN +282 0x7C00 //RX_LAMBDA_PKA_FP +283 0x2000 //RX_TPKA_FP +284 0x2000 //RX_MIN_G_FP +285 0x0080 //RX_MAX_G_FP +286 0x000B //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 +288 0x0000 //RX_MAXLEVEL_CNG +289 0x3000 //RX_BWE_UV_TH +290 0x3000 //RX_BWE_UV_TH2 +291 0x1800 //RX_BWE_UV_TH3 +292 0x1000 //RX_BWE_V_TH +293 0x04CD //RX_BWE_GAIN1_V_TH1 +294 0x0F33 //RX_BWE_GAIN1_V_TH2 +295 0x7333 //RX_BWE_UV_EQ +296 0x199A //RX_BWE_V_EQ +297 0x7333 //RX_BWE_TONE_TH +298 0x0004 //RX_BWE_UV_HOLD_T +299 0x6CCD //RX_BWE_GAIN2_ALPHA +300 0x799A //RX_BWE_GAIN3_ALPHA +301 0x001E //RX_BWE_CUTOFF +302 0x3000 //RX_BWE_GAINFILL +303 0x3200 //RX_BWE_MAXTH_TONE +304 0x2000 //RX_BWE_EQ_0 +305 0x2000 //RX_BWE_EQ_1 +306 0x2000 //RX_BWE_EQ_2 +307 0x2000 //RX_BWE_EQ_3 +308 0x2000 //RX_BWE_EQ_4 +309 0x2000 //RX_BWE_EQ_5 +310 0x2000 //RX_BWE_EQ_6 +311 0x0000 //RX_BWE_RESRV_0 +312 0x0000 //RX_BWE_RESRV_1 +313 0x0000 //RX_BWE_RESRV_2 +#VOL 0 +163 0x3000 //RX_TDDRC_ALPHA_UP_1 +164 0x3000 //RX_TDDRC_ALPHA_UP_2 +165 0x3000 //RX_TDDRC_ALPHA_UP_3 +166 0x3000 //RX_TDDRC_ALPHA_UP_4 +184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +190 0x7FFF //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +269 0x0000 //RX_TDDRC_THRD_0 +270 0x0000 //RX_TDDRC_THRD_1 +271 0x2000 //RX_TDDRC_THRD_2 +272 0x3000 //RX_TDDRC_THRD_3 +273 0x0800 //RX_TDDRC_SLANT_0 +274 0x7EB8 //RX_TDDRC_SLANT_1 +275 0x3000 //RX_TDDRC_ALPHA_UP_0 +276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x199A //RX_TDDRC_HMNC_GAIN +279 0x0001 //RX_TDDRC_SMT_FLAG +280 0x0CCD //RX_TDDRC_SMT_W +281 0x0196 //RX_TDDRC_DRC_GAIN +195 0x001C //RX_FDEQ_SUBNUM +196 0x4848 //RX_FDEQ_GAIN_0 +197 0x4848 //RX_FDEQ_GAIN_1 +198 0x4848 //RX_FDEQ_GAIN_2 +199 0x4848 //RX_FDEQ_GAIN_3 +200 0x4848 //RX_FDEQ_GAIN_4 +201 0x4848 //RX_FDEQ_GAIN_5 +202 0x4848 //RX_FDEQ_GAIN_6 +203 0x4848 //RX_FDEQ_GAIN_7 +204 0x4848 //RX_FDEQ_GAIN_8 +205 0x4848 //RX_FDEQ_GAIN_9 +206 0x4848 //RX_FDEQ_GAIN_10 +207 0x4848 //RX_FDEQ_GAIN_11 +208 0x4848 //RX_FDEQ_GAIN_12 +209 0x4848 //RX_FDEQ_GAIN_13 +210 0x4848 //RX_FDEQ_GAIN_14 +211 0x4848 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0202 //RX_FDEQ_BIN_0 +221 0x0203 //RX_FDEQ_BIN_1 +222 0x0303 //RX_FDEQ_BIN_2 +223 0x0304 //RX_FDEQ_BIN_3 +224 0x0405 //RX_FDEQ_BIN_4 +225 0x0506 //RX_FDEQ_BIN_5 +226 0x0708 //RX_FDEQ_BIN_6 +227 0x090A //RX_FDEQ_BIN_7 +228 0x0B0C //RX_FDEQ_BIN_8 +229 0x0D0E //RX_FDEQ_BIN_9 +230 0x0E0F //RX_FDEQ_BIN_10 +231 0x0F10 //RX_FDEQ_BIN_11 +232 0x1011 //RX_FDEQ_BIN_12 +233 0x1104 //RX_FDEQ_BIN_13 +234 0x0000 //RX_FDEQ_BIN_14 +235 0x0000 //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x4000 //RX_FDEQ_RESRV_0 +245 0x0320 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0030 //RX_FDDRC_BAND_MARGIN_1 +248 0x0050 //RX_FDDRC_BAND_MARGIN_2 +249 0x0080 //RX_FDDRC_BAND_MARGIN_3 +250 0x0007 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x5000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x6400 //RX_FDDRC_THRD_3_2 +258 0x6400 //RX_FDDRC_THRD_3_3 +259 0x2000 //RX_FDDRC_SLANT_0_0 +260 0x2000 //RX_FDDRC_SLANT_0_1 +261 0x2000 //RX_FDDRC_SLANT_0_2 +262 0x2000 //RX_FDDRC_SLANT_0_3 +263 0x5333 //RX_FDDRC_SLANT_1_0 +264 0x5333 //RX_FDDRC_SLANT_1_1 +265 0x5333 //RX_FDDRC_SLANT_1_2 +266 0x5333 //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +286 0x000B //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 +#VOL 1 +163 0x3000 //RX_TDDRC_ALPHA_UP_1 +164 0x3000 //RX_TDDRC_ALPHA_UP_2 +165 0x3000 //RX_TDDRC_ALPHA_UP_3 +166 0x3000 //RX_TDDRC_ALPHA_UP_4 +184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +190 0x7FFF //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +269 0x0000 //RX_TDDRC_THRD_0 +270 0x0000 //RX_TDDRC_THRD_1 +271 0x2000 //RX_TDDRC_THRD_2 +272 0x3000 //RX_TDDRC_THRD_3 +273 0x0800 //RX_TDDRC_SLANT_0 +274 0x7EB8 //RX_TDDRC_SLANT_1 +275 0x3000 //RX_TDDRC_ALPHA_UP_0 +276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x199A //RX_TDDRC_HMNC_GAIN +279 0x0001 //RX_TDDRC_SMT_FLAG +280 0x0CCD //RX_TDDRC_SMT_W +281 0x0196 //RX_TDDRC_DRC_GAIN +195 0x001C //RX_FDEQ_SUBNUM +196 0x4848 //RX_FDEQ_GAIN_0 +197 0x4848 //RX_FDEQ_GAIN_1 +198 0x4848 //RX_FDEQ_GAIN_2 +199 0x4848 //RX_FDEQ_GAIN_3 +200 0x4848 //RX_FDEQ_GAIN_4 +201 0x4848 //RX_FDEQ_GAIN_5 +202 0x4848 //RX_FDEQ_GAIN_6 +203 0x4848 //RX_FDEQ_GAIN_7 +204 0x4848 //RX_FDEQ_GAIN_8 +205 0x4848 //RX_FDEQ_GAIN_9 +206 0x4848 //RX_FDEQ_GAIN_10 +207 0x4848 //RX_FDEQ_GAIN_11 +208 0x4848 //RX_FDEQ_GAIN_12 +209 0x4848 //RX_FDEQ_GAIN_13 +210 0x4848 //RX_FDEQ_GAIN_14 +211 0x4848 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0202 //RX_FDEQ_BIN_0 +221 0x0203 //RX_FDEQ_BIN_1 +222 0x0303 //RX_FDEQ_BIN_2 +223 0x0304 //RX_FDEQ_BIN_3 +224 0x0405 //RX_FDEQ_BIN_4 +225 0x0506 //RX_FDEQ_BIN_5 +226 0x0708 //RX_FDEQ_BIN_6 +227 0x090A //RX_FDEQ_BIN_7 +228 0x0B0C //RX_FDEQ_BIN_8 +229 0x0D0E //RX_FDEQ_BIN_9 +230 0x0E0F //RX_FDEQ_BIN_10 +231 0x0F10 //RX_FDEQ_BIN_11 +232 0x1011 //RX_FDEQ_BIN_12 +233 0x1104 //RX_FDEQ_BIN_13 +234 0x0000 //RX_FDEQ_BIN_14 +235 0x0000 //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x4000 //RX_FDEQ_RESRV_0 +245 0x0320 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0030 //RX_FDDRC_BAND_MARGIN_1 +248 0x0050 //RX_FDDRC_BAND_MARGIN_2 +249 0x0080 //RX_FDDRC_BAND_MARGIN_3 +250 0x0007 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x5000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x6400 //RX_FDDRC_THRD_3_2 +258 0x6400 //RX_FDDRC_THRD_3_3 +259 0x2000 //RX_FDDRC_SLANT_0_0 +260 0x2000 //RX_FDDRC_SLANT_0_1 +261 0x2000 //RX_FDDRC_SLANT_0_2 +262 0x2000 //RX_FDDRC_SLANT_0_3 +263 0x5333 //RX_FDDRC_SLANT_1_0 +264 0x5333 //RX_FDDRC_SLANT_1_1 +265 0x5333 //RX_FDDRC_SLANT_1_2 +266 0x5333 //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +286 0x0013 //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 +#VOL 2 +163 0x3000 //RX_TDDRC_ALPHA_UP_1 +164 0x3000 //RX_TDDRC_ALPHA_UP_2 +165 0x3000 //RX_TDDRC_ALPHA_UP_3 +166 0x3000 //RX_TDDRC_ALPHA_UP_4 +184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +190 0x7FFF //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +269 0x0000 //RX_TDDRC_THRD_0 +270 0x0000 //RX_TDDRC_THRD_1 +271 0x2000 //RX_TDDRC_THRD_2 +272 0x3000 //RX_TDDRC_THRD_3 +273 0x0800 //RX_TDDRC_SLANT_0 +274 0x7EB8 //RX_TDDRC_SLANT_1 +275 0x3000 //RX_TDDRC_ALPHA_UP_0 +276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x199A //RX_TDDRC_HMNC_GAIN +279 0x0001 //RX_TDDRC_SMT_FLAG +280 0x0CCD //RX_TDDRC_SMT_W +281 0x0196 //RX_TDDRC_DRC_GAIN +195 0x001C //RX_FDEQ_SUBNUM +196 0x4848 //RX_FDEQ_GAIN_0 +197 0x4848 //RX_FDEQ_GAIN_1 +198 0x4848 //RX_FDEQ_GAIN_2 +199 0x4848 //RX_FDEQ_GAIN_3 +200 0x4848 //RX_FDEQ_GAIN_4 +201 0x4848 //RX_FDEQ_GAIN_5 +202 0x4848 //RX_FDEQ_GAIN_6 +203 0x4848 //RX_FDEQ_GAIN_7 +204 0x4848 //RX_FDEQ_GAIN_8 +205 0x4848 //RX_FDEQ_GAIN_9 +206 0x4848 //RX_FDEQ_GAIN_10 +207 0x4848 //RX_FDEQ_GAIN_11 +208 0x4848 //RX_FDEQ_GAIN_12 +209 0x4848 //RX_FDEQ_GAIN_13 +210 0x4848 //RX_FDEQ_GAIN_14 +211 0x4848 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0202 //RX_FDEQ_BIN_0 +221 0x0203 //RX_FDEQ_BIN_1 +222 0x0303 //RX_FDEQ_BIN_2 +223 0x0304 //RX_FDEQ_BIN_3 +224 0x0405 //RX_FDEQ_BIN_4 +225 0x0506 //RX_FDEQ_BIN_5 +226 0x0708 //RX_FDEQ_BIN_6 +227 0x090A //RX_FDEQ_BIN_7 +228 0x0B0C //RX_FDEQ_BIN_8 +229 0x0D0E //RX_FDEQ_BIN_9 +230 0x0E0F //RX_FDEQ_BIN_10 +231 0x0F10 //RX_FDEQ_BIN_11 +232 0x1011 //RX_FDEQ_BIN_12 +233 0x1104 //RX_FDEQ_BIN_13 +234 0x0000 //RX_FDEQ_BIN_14 +235 0x0000 //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x4000 //RX_FDEQ_RESRV_0 +245 0x0320 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0030 //RX_FDDRC_BAND_MARGIN_1 +248 0x0050 //RX_FDDRC_BAND_MARGIN_2 +249 0x0080 //RX_FDDRC_BAND_MARGIN_3 +250 0x0007 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x5000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x6400 //RX_FDDRC_THRD_3_2 +258 0x6400 //RX_FDDRC_THRD_3_3 +259 0x2000 //RX_FDDRC_SLANT_0_0 +260 0x2000 //RX_FDDRC_SLANT_0_1 +261 0x2000 //RX_FDDRC_SLANT_0_2 +262 0x2000 //RX_FDDRC_SLANT_0_3 +263 0x5333 //RX_FDDRC_SLANT_1_0 +264 0x5333 //RX_FDDRC_SLANT_1_1 +265 0x5333 //RX_FDDRC_SLANT_1_2 +266 0x5333 //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +286 0x0020 //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 +#VOL 3 +163 0x3000 //RX_TDDRC_ALPHA_UP_1 +164 0x3000 //RX_TDDRC_ALPHA_UP_2 +165 0x3000 //RX_TDDRC_ALPHA_UP_3 +166 0x3000 //RX_TDDRC_ALPHA_UP_4 +184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +190 0x7FFF //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +269 0x0000 //RX_TDDRC_THRD_0 +270 0x0000 //RX_TDDRC_THRD_1 +271 0x2000 //RX_TDDRC_THRD_2 +272 0x3000 //RX_TDDRC_THRD_3 +273 0x0800 //RX_TDDRC_SLANT_0 +274 0x7EB8 //RX_TDDRC_SLANT_1 +275 0x3000 //RX_TDDRC_ALPHA_UP_0 +276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x199A //RX_TDDRC_HMNC_GAIN +279 0x0001 //RX_TDDRC_SMT_FLAG +280 0x0CCD //RX_TDDRC_SMT_W +281 0x0196 //RX_TDDRC_DRC_GAIN +195 0x001C //RX_FDEQ_SUBNUM +196 0x4848 //RX_FDEQ_GAIN_0 +197 0x4848 //RX_FDEQ_GAIN_1 +198 0x4848 //RX_FDEQ_GAIN_2 +199 0x4848 //RX_FDEQ_GAIN_3 +200 0x4848 //RX_FDEQ_GAIN_4 +201 0x4848 //RX_FDEQ_GAIN_5 +202 0x4848 //RX_FDEQ_GAIN_6 +203 0x4848 //RX_FDEQ_GAIN_7 +204 0x4848 //RX_FDEQ_GAIN_8 +205 0x4848 //RX_FDEQ_GAIN_9 +206 0x4848 //RX_FDEQ_GAIN_10 +207 0x4848 //RX_FDEQ_GAIN_11 +208 0x4848 //RX_FDEQ_GAIN_12 +209 0x4848 //RX_FDEQ_GAIN_13 +210 0x4848 //RX_FDEQ_GAIN_14 +211 0x4848 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0202 //RX_FDEQ_BIN_0 +221 0x0203 //RX_FDEQ_BIN_1 +222 0x0303 //RX_FDEQ_BIN_2 +223 0x0304 //RX_FDEQ_BIN_3 +224 0x0405 //RX_FDEQ_BIN_4 +225 0x0506 //RX_FDEQ_BIN_5 +226 0x0708 //RX_FDEQ_BIN_6 +227 0x090A //RX_FDEQ_BIN_7 +228 0x0B0C //RX_FDEQ_BIN_8 +229 0x0D0E //RX_FDEQ_BIN_9 +230 0x0E0F //RX_FDEQ_BIN_10 +231 0x0F10 //RX_FDEQ_BIN_11 +232 0x1011 //RX_FDEQ_BIN_12 +233 0x1104 //RX_FDEQ_BIN_13 +234 0x0000 //RX_FDEQ_BIN_14 +235 0x0000 //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x4000 //RX_FDEQ_RESRV_0 +245 0x0320 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0030 //RX_FDDRC_BAND_MARGIN_1 +248 0x0050 //RX_FDDRC_BAND_MARGIN_2 +249 0x0080 //RX_FDDRC_BAND_MARGIN_3 +250 0x0007 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x5000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x6400 //RX_FDDRC_THRD_3_2 +258 0x6400 //RX_FDDRC_THRD_3_3 +259 0x2000 //RX_FDDRC_SLANT_0_0 +260 0x2000 //RX_FDDRC_SLANT_0_1 +261 0x2000 //RX_FDDRC_SLANT_0_2 +262 0x2000 //RX_FDDRC_SLANT_0_3 +263 0x5333 //RX_FDDRC_SLANT_1_0 +264 0x5333 //RX_FDDRC_SLANT_1_1 +265 0x5333 //RX_FDDRC_SLANT_1_2 +266 0x5333 //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +286 0x0036 //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 +#VOL 4 +163 0x3000 //RX_TDDRC_ALPHA_UP_1 +164 0x3000 //RX_TDDRC_ALPHA_UP_2 +165 0x3000 //RX_TDDRC_ALPHA_UP_3 +166 0x3000 //RX_TDDRC_ALPHA_UP_4 +184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +190 0x7FFF //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +269 0x0000 //RX_TDDRC_THRD_0 +270 0x0000 //RX_TDDRC_THRD_1 +271 0x2000 //RX_TDDRC_THRD_2 +272 0x3000 //RX_TDDRC_THRD_3 +273 0x0800 //RX_TDDRC_SLANT_0 +274 0x7EB8 //RX_TDDRC_SLANT_1 +275 0x3000 //RX_TDDRC_ALPHA_UP_0 +276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x199A //RX_TDDRC_HMNC_GAIN +279 0x0001 //RX_TDDRC_SMT_FLAG +280 0x0CCD //RX_TDDRC_SMT_W +281 0x0196 //RX_TDDRC_DRC_GAIN +195 0x001C //RX_FDEQ_SUBNUM +196 0x4848 //RX_FDEQ_GAIN_0 +197 0x4848 //RX_FDEQ_GAIN_1 +198 0x4848 //RX_FDEQ_GAIN_2 +199 0x4848 //RX_FDEQ_GAIN_3 +200 0x4848 //RX_FDEQ_GAIN_4 +201 0x4848 //RX_FDEQ_GAIN_5 +202 0x4848 //RX_FDEQ_GAIN_6 +203 0x4848 //RX_FDEQ_GAIN_7 +204 0x4848 //RX_FDEQ_GAIN_8 +205 0x4848 //RX_FDEQ_GAIN_9 +206 0x4848 //RX_FDEQ_GAIN_10 +207 0x4848 //RX_FDEQ_GAIN_11 +208 0x4848 //RX_FDEQ_GAIN_12 +209 0x4848 //RX_FDEQ_GAIN_13 +210 0x4848 //RX_FDEQ_GAIN_14 +211 0x4848 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0202 //RX_FDEQ_BIN_0 +221 0x0203 //RX_FDEQ_BIN_1 +222 0x0303 //RX_FDEQ_BIN_2 +223 0x0304 //RX_FDEQ_BIN_3 +224 0x0405 //RX_FDEQ_BIN_4 +225 0x0506 //RX_FDEQ_BIN_5 +226 0x0708 //RX_FDEQ_BIN_6 +227 0x090A //RX_FDEQ_BIN_7 +228 0x0B0C //RX_FDEQ_BIN_8 +229 0x0D0E //RX_FDEQ_BIN_9 +230 0x0E0F //RX_FDEQ_BIN_10 +231 0x0F10 //RX_FDEQ_BIN_11 +232 0x1011 //RX_FDEQ_BIN_12 +233 0x1104 //RX_FDEQ_BIN_13 +234 0x0000 //RX_FDEQ_BIN_14 +235 0x0000 //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x4000 //RX_FDEQ_RESRV_0 +245 0x0320 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0030 //RX_FDDRC_BAND_MARGIN_1 +248 0x0050 //RX_FDDRC_BAND_MARGIN_2 +249 0x0080 //RX_FDDRC_BAND_MARGIN_3 +250 0x0007 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x5000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x6400 //RX_FDDRC_THRD_3_2 +258 0x6400 //RX_FDDRC_THRD_3_3 +259 0x2000 //RX_FDDRC_SLANT_0_0 +260 0x2000 //RX_FDDRC_SLANT_0_1 +261 0x2000 //RX_FDDRC_SLANT_0_2 +262 0x2000 //RX_FDDRC_SLANT_0_3 +263 0x5333 //RX_FDDRC_SLANT_1_0 +264 0x5333 //RX_FDDRC_SLANT_1_1 +265 0x5333 //RX_FDDRC_SLANT_1_2 +266 0x5333 //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +286 0x005B //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 +#VOL 5 +163 0x3000 //RX_TDDRC_ALPHA_UP_1 +164 0x3000 //RX_TDDRC_ALPHA_UP_2 +165 0x3000 //RX_TDDRC_ALPHA_UP_3 +166 0x3000 //RX_TDDRC_ALPHA_UP_4 +184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +190 0x7FFF //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +269 0x0000 //RX_TDDRC_THRD_0 +270 0x0000 //RX_TDDRC_THRD_1 +271 0x2000 //RX_TDDRC_THRD_2 +272 0x3000 //RX_TDDRC_THRD_3 +273 0x0800 //RX_TDDRC_SLANT_0 +274 0x7EB8 //RX_TDDRC_SLANT_1 +275 0x3000 //RX_TDDRC_ALPHA_UP_0 +276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x199A //RX_TDDRC_HMNC_GAIN +279 0x0001 //RX_TDDRC_SMT_FLAG +280 0x0CCD //RX_TDDRC_SMT_W +281 0x0196 //RX_TDDRC_DRC_GAIN +195 0x001C //RX_FDEQ_SUBNUM +196 0x4848 //RX_FDEQ_GAIN_0 +197 0x4848 //RX_FDEQ_GAIN_1 +198 0x4848 //RX_FDEQ_GAIN_2 +199 0x4848 //RX_FDEQ_GAIN_3 +200 0x4848 //RX_FDEQ_GAIN_4 +201 0x4848 //RX_FDEQ_GAIN_5 +202 0x4848 //RX_FDEQ_GAIN_6 +203 0x4848 //RX_FDEQ_GAIN_7 +204 0x4848 //RX_FDEQ_GAIN_8 +205 0x4848 //RX_FDEQ_GAIN_9 +206 0x4848 //RX_FDEQ_GAIN_10 +207 0x4848 //RX_FDEQ_GAIN_11 +208 0x4848 //RX_FDEQ_GAIN_12 +209 0x4848 //RX_FDEQ_GAIN_13 +210 0x4848 //RX_FDEQ_GAIN_14 +211 0x4848 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0202 //RX_FDEQ_BIN_0 +221 0x0203 //RX_FDEQ_BIN_1 +222 0x0303 //RX_FDEQ_BIN_2 +223 0x0304 //RX_FDEQ_BIN_3 +224 0x0405 //RX_FDEQ_BIN_4 +225 0x0506 //RX_FDEQ_BIN_5 +226 0x0708 //RX_FDEQ_BIN_6 +227 0x090A //RX_FDEQ_BIN_7 +228 0x0B0C //RX_FDEQ_BIN_8 +229 0x0D0E //RX_FDEQ_BIN_9 +230 0x0E0F //RX_FDEQ_BIN_10 +231 0x0F10 //RX_FDEQ_BIN_11 +232 0x1011 //RX_FDEQ_BIN_12 +233 0x1104 //RX_FDEQ_BIN_13 +234 0x0000 //RX_FDEQ_BIN_14 +235 0x0000 //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x4000 //RX_FDEQ_RESRV_0 +245 0x0320 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0030 //RX_FDDRC_BAND_MARGIN_1 +248 0x0050 //RX_FDDRC_BAND_MARGIN_2 +249 0x0080 //RX_FDDRC_BAND_MARGIN_3 +250 0x0007 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x5000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x6400 //RX_FDDRC_THRD_3_2 +258 0x6400 //RX_FDDRC_THRD_3_3 +259 0x2000 //RX_FDDRC_SLANT_0_0 +260 0x2000 //RX_FDDRC_SLANT_0_1 +261 0x2000 //RX_FDDRC_SLANT_0_2 +262 0x2000 //RX_FDDRC_SLANT_0_3 +263 0x5333 //RX_FDDRC_SLANT_1_0 +264 0x5333 //RX_FDDRC_SLANT_1_1 +265 0x5333 //RX_FDDRC_SLANT_1_2 +266 0x5333 //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +286 0x0099 //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 +#VOL 6 +163 0x3000 //RX_TDDRC_ALPHA_UP_1 +164 0x3000 //RX_TDDRC_ALPHA_UP_2 +165 0x3000 //RX_TDDRC_ALPHA_UP_3 +166 0x3000 //RX_TDDRC_ALPHA_UP_4 +184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +190 0x7FFF //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +269 0x0000 //RX_TDDRC_THRD_0 +270 0x0000 //RX_TDDRC_THRD_1 +271 0x2000 //RX_TDDRC_THRD_2 +272 0x3000 //RX_TDDRC_THRD_3 +273 0x0800 //RX_TDDRC_SLANT_0 +274 0x7EB8 //RX_TDDRC_SLANT_1 +275 0x3000 //RX_TDDRC_ALPHA_UP_0 +276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x199A //RX_TDDRC_HMNC_GAIN +279 0x0001 //RX_TDDRC_SMT_FLAG +280 0x0CCD //RX_TDDRC_SMT_W +281 0x0196 //RX_TDDRC_DRC_GAIN +195 0x001C //RX_FDEQ_SUBNUM +196 0x4848 //RX_FDEQ_GAIN_0 +197 0x4848 //RX_FDEQ_GAIN_1 +198 0x4848 //RX_FDEQ_GAIN_2 +199 0x4848 //RX_FDEQ_GAIN_3 +200 0x4848 //RX_FDEQ_GAIN_4 +201 0x4848 //RX_FDEQ_GAIN_5 +202 0x4848 //RX_FDEQ_GAIN_6 +203 0x4848 //RX_FDEQ_GAIN_7 +204 0x4848 //RX_FDEQ_GAIN_8 +205 0x4848 //RX_FDEQ_GAIN_9 +206 0x4848 //RX_FDEQ_GAIN_10 +207 0x4848 //RX_FDEQ_GAIN_11 +208 0x4848 //RX_FDEQ_GAIN_12 +209 0x4848 //RX_FDEQ_GAIN_13 +210 0x4848 //RX_FDEQ_GAIN_14 +211 0x4848 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0202 //RX_FDEQ_BIN_0 +221 0x0203 //RX_FDEQ_BIN_1 +222 0x0303 //RX_FDEQ_BIN_2 +223 0x0304 //RX_FDEQ_BIN_3 +224 0x0405 //RX_FDEQ_BIN_4 +225 0x0506 //RX_FDEQ_BIN_5 +226 0x0708 //RX_FDEQ_BIN_6 +227 0x090A //RX_FDEQ_BIN_7 +228 0x0B0C //RX_FDEQ_BIN_8 +229 0x0D0E //RX_FDEQ_BIN_9 +230 0x0E0F //RX_FDEQ_BIN_10 +231 0x0F10 //RX_FDEQ_BIN_11 +232 0x1011 //RX_FDEQ_BIN_12 +233 0x1104 //RX_FDEQ_BIN_13 +234 0x0000 //RX_FDEQ_BIN_14 +235 0x0000 //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x4000 //RX_FDEQ_RESRV_0 +245 0x0320 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0030 //RX_FDDRC_BAND_MARGIN_1 +248 0x0050 //RX_FDDRC_BAND_MARGIN_2 +249 0x0080 //RX_FDDRC_BAND_MARGIN_3 +250 0x0007 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x5000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x6400 //RX_FDDRC_THRD_3_2 +258 0x6400 //RX_FDDRC_THRD_3_3 +259 0x2000 //RX_FDDRC_SLANT_0_0 +260 0x2000 //RX_FDDRC_SLANT_0_1 +261 0x2000 //RX_FDDRC_SLANT_0_2 +262 0x2000 //RX_FDDRC_SLANT_0_3 +263 0x5333 //RX_FDDRC_SLANT_1_0 +264 0x5333 //RX_FDDRC_SLANT_1_1 +265 0x5333 //RX_FDDRC_SLANT_1_2 +266 0x5333 //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +286 0x0100 //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 #CASE_NAME HEADSET-RESERVE1-VOICE_GENERIC-SWB -#PARAM_MODE FULL -#PARAM_TYPE TX+RX -#TOTAL_CUSTOM_STEP 7 +#PARAM_MODE Full +#PARAM_TYPE TX+2RX +#TOTAL_CUSTOM_STEP 7+7 #TX 0 0x0009 //TX_OPERATION_MODE_0 1 0x0001 //TX_OPERATION_MODE_1 @@ -17790,7 +26950,7 @@ 239 0x0800 //TX_DT_RESRV_7 240 0x0800 //TX_DT_RESRV_8 241 0x0000 //TX_DT_RESRV_9 -242 0xF400 //TX_THR_SN_EST_0 +242 0xFA00 //TX_THR_SN_EST_0 243 0xF400 //TX_THR_SN_EST_1 244 0xF600 //TX_THR_SN_EST_2 245 0xF400 //TX_THR_SN_EST_3 @@ -17799,20 +26959,20 @@ 248 0xF400 //TX_THR_SN_EST_6 249 0xF600 //TX_THR_SN_EST_7 250 0x0000 //TX_DELTA_THR_SN_EST_0 -251 0x0000 //TX_DELTA_THR_SN_EST_1 +251 0x0200 //TX_DELTA_THR_SN_EST_1 252 0x0200 //TX_DELTA_THR_SN_EST_2 253 0x0200 //TX_DELTA_THR_SN_EST_3 254 0x0200 //TX_DELTA_THR_SN_EST_4 255 0x0200 //TX_DELTA_THR_SN_EST_5 -256 0x0200 //TX_DELTA_THR_SN_EST_6 +256 0x0000 //TX_DELTA_THR_SN_EST_6 257 0x0200 //TX_DELTA_THR_SN_EST_7 258 0x6000 //TX_LAMBDA_NN_EST_0 -259 0x6000 //TX_LAMBDA_NN_EST_1 +259 0x4000 //TX_LAMBDA_NN_EST_1 260 0x4000 //TX_LAMBDA_NN_EST_2 261 0x4000 //TX_LAMBDA_NN_EST_3 262 0x4000 //TX_LAMBDA_NN_EST_4 263 0x4000 //TX_LAMBDA_NN_EST_5 -264 0x4000 //TX_LAMBDA_NN_EST_6 +264 0x6000 //TX_LAMBDA_NN_EST_6 265 0x4000 //TX_LAMBDA_NN_EST_7 266 0x0400 //TX_N_SN_EST 267 0x001E //TX_INBEAM_T @@ -17830,16 +26990,16 @@ 279 0x1000 //TX_B_POST_FLT_0 280 0x1000 //TX_B_POST_FLT_1 281 0x000B //TX_NS_LVL_CTRL_0 -282 0x000F //TX_NS_LVL_CTRL_1 -283 0x0011 //TX_NS_LVL_CTRL_2 +282 0x0011 //TX_NS_LVL_CTRL_1 +283 0x000F //TX_NS_LVL_CTRL_2 284 0x000F //TX_NS_LVL_CTRL_3 285 0x000F //TX_NS_LVL_CTRL_4 286 0x000F //TX_NS_LVL_CTRL_5 287 0x000F //TX_NS_LVL_CTRL_6 288 0x0011 //TX_NS_LVL_CTRL_7 289 0x000C //TX_MIN_GAIN_S_0 -290 0x000C //TX_MIN_GAIN_S_1 -291 0x000F //TX_MIN_GAIN_S_2 +290 0x000F //TX_MIN_GAIN_S_1 +291 0x000C //TX_MIN_GAIN_S_2 292 0x000C //TX_MIN_GAIN_S_3 293 0x000C //TX_MIN_GAIN_S_4 294 0x000C //TX_MIN_GAIN_S_5 @@ -17863,12 +27023,12 @@ 312 0x7FFF //TX_A_POST_FILT_0 313 0x2000 //TX_A_POST_FILT_1 314 0x2000 //TX_A_POST_FILT_S_0 -315 0x4000 //TX_A_POST_FILT_S_1 +315 0x5000 //TX_A_POST_FILT_S_1 316 0x5000 //TX_A_POST_FILT_S_2 317 0x5000 //TX_A_POST_FILT_S_3 318 0x5000 //TX_A_POST_FILT_S_4 319 0x5000 //TX_A_POST_FILT_S_5 -320 0x5000 //TX_A_POST_FILT_S_6 +320 0x4000 //TX_A_POST_FILT_S_6 321 0x5000 //TX_A_POST_FILT_S_7 322 0x1000 //TX_B_POST_FILT_0 323 0x1000 //TX_B_POST_FILT_1 @@ -17915,7 +27075,7 @@ 364 0x0000 //TX_K_APT 365 0x0001 //TX_NOISEDET 366 0x0190 //TX_NDETCT -367 0x0050 //TX_NOISE_TH_0 +367 0x0383 //TX_NOISE_TH_0 368 0x7FFF //TX_NOISE_TH_0_2 369 0x7FFF //TX_NOISE_TH_0_3 370 0x07D0 //TX_NOISE_TH_1 @@ -17927,11 +27087,11 @@ 376 0x7FFF //TX_NOISE_TH_5_3 377 0x7FFF //TX_NOISE_TH_5_4 378 0x044C //TX_NOISE_TH_6 -379 0x0014 //TX_MINENOISE_TH -380 0x4000 //TX_MINENOISE_MIC0_TH_MTS -381 0xFFEE //TX_MINENOISE_MIC0_TH_EXP -382 0x6000 //TX_MINENOISE_MIC0_S_TH_MTS -383 0xFFF3 //TX_MINENOISE_MIC0_S_TH_EXP +379 0x044C //TX_MINENOISE_TH +380 0xD508 //TX_MORENS_TFMASK_TH +381 0x0001 //TX_DRC_QUIET_FLOOR +382 0x3A98 //TX_RATIODTL_CUT_TH +383 0x0DAC //TX_DT_CUT_K1 384 0x0666 //TX_OUT_ENER_S_TH_CLEAN 385 0x0666 //TX_OUT_ENER_S_TH_LESSCLEAN 386 0x0333 //TX_OUT_ENER_S_TH_NOISY @@ -17939,22 +27099,22 @@ 388 0x0333 //TX_OUT_ENER_TH_SPEECH 389 0x2000 //TX_SN_NPB_GAIN 390 0x0000 //TX_NN_NPB_GAIN -391 0x0000 //TX_CSX_ALPHA_0 -392 0x0000 //TX_CSX_ALPHA_1 -393 0x0000 //TX_CSX_ALPHA_2 -394 0x0000 //TX_CSX_ALPHA_3 -395 0x0800 //TX_MU_ARSP_EST -396 0x00C8 //TX_P_OUTBEAM_MIN_TH +391 0x7FFF //TX_POST_MASK_SUP_HSNE +392 0x1388 //TX_TAIL_DET_TH +393 0x4000 //TX_B_LESSCUT_RTO_WTA +394 0x0000 //TX_MEL_G_R +395 0x0080 //TX_SUPHIGH_TH +396 0x0000 //TX_MASK_G_R 397 0x0002 //TX_EXTRA_NS_L -398 0x0800 //TX_EXTRA_NS_A -399 0x0005 //TX_VR_NOISE_FLOOR_TH +398 0x1800 //TX_C_POST_FLT_MASK +399 0x7FFF //TX_A_POST_FLT_WNS 400 0x0148 //TX_MIN_G_LOW300HZ 401 0x0002 //TX_MAXLEVEL_CNG 402 0x00B4 //TX_STN_NOISE_TH 403 0x4000 //TX_POST_MASK_SUP 404 0x7FFF //TX_POST_MASK_ADJUST 405 0x00C8 //TX_NS_ENOISE_MIC0_TH -406 0x0014 //TX_MINENOISE_MIC0_TH +406 0x02F3 //TX_MINENOISE_MIC0_TH 407 0x012C //TX_MINENOISE_MIC0_S_TH 408 0x2900 //TX_MIN_G_CTRL_SSNS 409 0x0800 //TX_METAL_RTO_THR @@ -18062,16 +27222,16 @@ 511 0x6666 //TX_MIC_TO_BFGAIN 512 0x0000 //TX_MICTOBFGAIN0 513 0x0000 //TX_FASTMUE_TH -514 0x0000 //TX_DERVB_LEN_0 -515 0x0000 //TX_DERVB_LEN_1 -516 0x0000 //TX_RHO_DERVB -517 0x0000 //TX_MIC_INDX_DERVB -518 0x0000 //TX_MU_DERVB -519 0x0000 //TX_DR_RESRV_0 -520 0x0000 //TX_DR_RESRV_1 -521 0x0000 //TX_DR_RESRV_2 -522 0x0000 //TX_DR_RESRV_3 -523 0x0000 //TX_DR_RESRV_4 +514 0xC000 //TX_DEREVERB_LF_MU +515 0xC000 //TX_DEREVERB_HF_MU +516 0xCCCC //TX_DEREVERB_DELAY +517 0xD999 //TX_DEREVERB_COEF_LEN +518 0x1F40 //TX_DEREVERB_DNR +519 0x0000 //TX_DEREVERB_ALPHA +520 0x0000 //TX_DEREVERB_BETA +521 0x0000 //TX_GSC_RTOL_TH +522 0x7000 //TX_GSC_RTOH_TH +523 0x0064 //TX_WIDE2_MEANHTH 524 0x0000 //TX_DR_RESRV_5 525 0x0000 //TX_DR_RESRV_6 526 0x0000 //TX_DR_RESRV_7 @@ -18437,16 +27597,81 @@ 886 0x0CCD //TX_FASTNS_TFMASKBIN_TH2 887 0x0CCD //TX_FASTNS_TFMASKBIN_TH3 888 0x0028 //TX_FASTNS_ARSPC_TH -889 0xC000 //TX_FASTNS_MASK5_TH +889 0x8000 //TX_FASTNS_MASK5_TH 890 0x4848 //TX_POSTSSA_MIN_G_VR_MASK -891 0x1000 //TX_A_LESSCUT_RTO_MASK +891 0x4000 //TX_A_LESSCUT_RTO_MASK 892 0x1770 //TX_FASTNS_NOISETH 893 0xC000 //TX_FASTNS_SSA_THLFL 894 0xC000 //TX_FASTNS_SSA_THHFL 895 0xCCCC //TX_FASTNS_SSA_THLFH 896 0xD999 //TX_FASTNS_SSA_THHFH +897 0x2339 //TX_SENDFUNC_REG_MICMUTE +898 0x0021 //TX_SENDFUNC_REG_MICMUTE1 +899 0x02BC //TX_MICMUTE_RATIO_THR +900 0x0140 //TX_MICMUTE_AMP_THR +901 0x0004 //TX_MICMUTE_HPF_IND +902 0x00C0 //TX_MICMUTE_LOG_EYR_TH +903 0x0008 //TX_MICMUTE_CVG_TIME +904 0x0008 //TX_MICMUTE_RELEASE_TIME +905 0x01FE //TX_MIC_VOLUME_MIC0MUTE +906 0x0020 //TX_MICMUTE_EPD_OFFSET_0 +907 0x001E //TX_MICMUTE_FRQ_AEC_L +908 0x7999 //TX_MICMUTE_EAD_THR +909 0x7FFF //TX_MICMUTE_LAMBDA_CB_NLE +910 0x7FFF //TX_MICMUTE_LAMBDA_RE_EST +911 0x4000 //TX_DTD_THR1_MICMUTE_0 +912 0x7000 //TX_DTD_THR1_MICMUTE_1 +913 0x7FFF //TX_DTD_THR1_MICMUTE_2 +914 0x7FFF //TX_DTD_THR1_MICMUTE_3 +915 0x6CCC //TX_DTD_THR2_MICMUTE_0 +916 0x0400 //TX_MICMUTE_MIN_EQ_RE_EST_0 +917 0x0400 //TX_MICMUTE_MIN_EQ_RE_EST_1 +918 0x1000 //TX_MICMUTE_MIN_EQ_RE_EST_2 +919 0x7FFF //TX_MICMUTE_MIN_EQ_RE_EST_3 +920 0x7FFF //TX_MICMUTE_MIN_EQ_RE_EST_4 +921 0x4000 //TX_MICMUTE_C_POST_FLT +922 0x03E8 //TX_MICMUTE_DT_CUT_K +923 0x0001 //TX_MICMUTE_DT_CUT_THR +924 0x03E8 //TX_MICMUTE_DT_CUT_K2 +925 0x0001 //TX_MICMUTE_DT_CUT_THR2 +926 0x0064 //TX_MICMUTE_DT2_HOLD_N +927 0x1000 //TX_MICMUTE_RATIODTH_THCUT +928 0x1000 //TX_MICMUTE_B_POST_FLT_ECHOL +929 0x7FFF //TX_MICMUTE_B_POST_FLT_ECHOH +930 0x0400 //TX_MICMUTE_C_POST_FLT_MASK +931 0x7999 //TX_MICMUTE_RATIODTL_CUT_TH +932 0x0258 //TX_MICMUTE_DT_CUT_K1 +933 0x0800 //TX_MICMUTE_N2_SN_EST +934 0xFC00 //TX_MICMUTE_THR_SN_EST_0 +935 0x001C //TX_MICMUTE_MIN_G_CTRL_0 +936 0x6000 //TX_MICMUTE_A_POST_FILT_S_0 +937 0x7000 //TX_MICMUTE_B_POST_FILT_0 +938 0x2710 //TX_MIC1RUB_AMP_THR +939 0x0010 //TX_MIC1MUTE_RATIO_THR +940 0x0450 //TX_MIC1MUTE_AMP_THR +941 0x0008 //TX_MIC1MUTE_CVG_TIME +942 0x0008 //TX_MIC1MUTE_RELEASE_TIME +943 0x0000 //TX_AMS_RESRV_01 +944 0x0000 //TX_AMS_RESRV_02 +945 0x0000 //TX_AMS_RESRV_03 +946 0x0000 //TX_AMS_RESRV_04 +947 0x0000 //TX_AMS_RESRV_05 +948 0x0000 //TX_AMS_RESRV_06 +949 0x0000 //TX_AMS_RESRV_07 +950 0x0000 //TX_AMS_RESRV_08 +951 0x0000 //TX_AMS_RESRV_09 +952 0x0000 //TX_AMS_RESRV_10 +953 0x0000 //TX_AMS_RESRV_11 +954 0x0000 //TX_AMS_RESRV_12 +955 0x0000 //TX_AMS_RESRV_13 +956 0x0000 //TX_AMS_RESRV_14 +957 0x0000 //TX_AMS_RESRV_15 +958 0x0000 //TX_AMS_RESRV_16 +959 0x0000 //TX_AMS_RESRV_17 +960 0x0000 //TX_AMS_RESRV_18 +961 0x0000 //TX_AMS_RESRV_19 #RX -0 0x002C //RX_RECVFUNC_MODE_0 +0 0x202C //RX_RECVFUNC_MODE_0 1 0x0000 //RX_RECVFUNC_MODE_1 2 0x0003 //RX_SAMPLINGFREQ_SIG 3 0x0003 //RX_SAMPLINGFREQ_PROC @@ -19296,11 +28521,862 @@ 110 0x0000 //RX_FDDRC_RESRV_0 129 0x0100 //RX_SPK_VOL 130 0x0000 //RX_VOL_RESRV_0 +#RX 2 +157 0x202C //RX_RECVFUNC_MODE_0 +158 0x0000 //RX_RECVFUNC_MODE_1 +159 0x0003 //RX_SAMPLINGFREQ_SIG +160 0x0003 //RX_SAMPLINGFREQ_PROC +161 0x000A //RX_FRAME_SZ +162 0x0000 //RX_DELAY_OPT +163 0x5000 //RX_TDDRC_ALPHA_UP_1 +164 0x5000 //RX_TDDRC_ALPHA_UP_2 +165 0x5000 //RX_TDDRC_ALPHA_UP_3 +166 0x2000 //RX_TDDRC_ALPHA_UP_4 +167 0x0800 //RX_PGA +168 0x7FFF //RX_A_HP +169 0x0000 //RX_B_PE +170 0x1800 //RX_THR_PITCH_DET_0 +171 0x1000 //RX_THR_PITCH_DET_1 +172 0x0800 //RX_THR_PITCH_DET_2 +173 0x0008 //RX_PITCH_BFR_LEN +174 0x0003 //RX_SBD_PITCH_DET +175 0x0100 //RX_PP_RESRV_0 +176 0x0020 //RX_PP_RESRV_1 +177 0x0400 //RX_N_SN_EST +178 0x000C //RX_N2_SN_EST +179 0x0003 //RX_NS_LVL_CTRL +180 0x9000 //RX_THR_SN_EST +181 0x7CCD //RX_LAMBDA_PFILT +182 0x000A //RX_FENS_RESRV_0 +183 0x0190 //RX_FENS_RESRV_1 +184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +187 0x0002 //RX_EXTRA_NS_L +188 0x0800 //RX_EXTRA_NS_A +189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +190 0x65AD //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +192 0x199A //RX_A_POST_FLT +193 0x0000 //RX_LMT_THRD +194 0x4000 //RX_LMT_ALPHA +195 0x0020 //RX_FDEQ_SUBNUM +196 0x4848 //RX_FDEQ_GAIN_0 +197 0x4848 //RX_FDEQ_GAIN_1 +198 0x4848 //RX_FDEQ_GAIN_2 +199 0x4848 //RX_FDEQ_GAIN_3 +200 0x4848 //RX_FDEQ_GAIN_4 +201 0x4848 //RX_FDEQ_GAIN_5 +202 0x4848 //RX_FDEQ_GAIN_6 +203 0x4848 //RX_FDEQ_GAIN_7 +204 0x4848 //RX_FDEQ_GAIN_8 +205 0x4848 //RX_FDEQ_GAIN_9 +206 0x4848 //RX_FDEQ_GAIN_10 +207 0x4848 //RX_FDEQ_GAIN_11 +208 0x4848 //RX_FDEQ_GAIN_12 +209 0x4848 //RX_FDEQ_GAIN_13 +210 0x4848 //RX_FDEQ_GAIN_14 +211 0x4848 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0202 //RX_FDEQ_BIN_0 +221 0x0203 //RX_FDEQ_BIN_1 +222 0x0303 //RX_FDEQ_BIN_2 +223 0x0304 //RX_FDEQ_BIN_3 +224 0x0405 //RX_FDEQ_BIN_4 +225 0x0506 //RX_FDEQ_BIN_5 +226 0x0708 //RX_FDEQ_BIN_6 +227 0x090A //RX_FDEQ_BIN_7 +228 0x0B0C //RX_FDEQ_BIN_8 +229 0x0D0E //RX_FDEQ_BIN_9 +230 0x1013 //RX_FDEQ_BIN_10 +231 0x1719 //RX_FDEQ_BIN_11 +232 0x1B1E //RX_FDEQ_BIN_12 +233 0x1E1E //RX_FDEQ_BIN_13 +234 0x1E28 //RX_FDEQ_BIN_14 +235 0x282C //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x4000 //RX_FDEQ_RESRV_0 +245 0x0320 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0030 //RX_FDDRC_BAND_MARGIN_1 +248 0x0050 //RX_FDDRC_BAND_MARGIN_2 +249 0x0080 //RX_FDDRC_BAND_MARGIN_3 +250 0x0007 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x5000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x6400 //RX_FDDRC_THRD_3_2 +258 0x6400 //RX_FDDRC_THRD_3_3 +259 0x2000 //RX_FDDRC_SLANT_0_0 +260 0x2000 //RX_FDDRC_SLANT_0_1 +261 0x2000 //RX_FDDRC_SLANT_0_2 +262 0x2000 //RX_FDDRC_SLANT_0_3 +263 0x5333 //RX_FDDRC_SLANT_1_0 +264 0x5333 //RX_FDDRC_SLANT_1_1 +265 0x5333 //RX_FDDRC_SLANT_1_2 +266 0x5333 //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +268 0x0002 //RX_FILTINDX +269 0x0000 //RX_TDDRC_THRD_0 +270 0x0000 //RX_TDDRC_THRD_1 +271 0x1A00 //RX_TDDRC_THRD_2 +272 0x1A00 //RX_TDDRC_THRD_3 +273 0x3000 //RX_TDDRC_SLANT_0 +274 0x7EB8 //RX_TDDRC_SLANT_1 +275 0x5000 //RX_TDDRC_ALPHA_UP_0 +276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x199A //RX_TDDRC_HMNC_GAIN +279 0x0001 //RX_TDDRC_SMT_FLAG +280 0x0CCD //RX_TDDRC_SMT_W +281 0x01C8 //RX_TDDRC_DRC_GAIN +282 0x7C00 //RX_LAMBDA_PKA_FP +283 0x2000 //RX_TPKA_FP +284 0x2000 //RX_MIN_G_FP +285 0x0080 //RX_MAX_G_FP +286 0x000B //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 +288 0x0000 //RX_MAXLEVEL_CNG +289 0x3000 //RX_BWE_UV_TH +290 0x3000 //RX_BWE_UV_TH2 +291 0x1800 //RX_BWE_UV_TH3 +292 0x1000 //RX_BWE_V_TH +293 0x04CD //RX_BWE_GAIN1_V_TH1 +294 0x0F33 //RX_BWE_GAIN1_V_TH2 +295 0x7333 //RX_BWE_UV_EQ +296 0x199A //RX_BWE_V_EQ +297 0x7333 //RX_BWE_TONE_TH +298 0x0004 //RX_BWE_UV_HOLD_T +299 0x6CCD //RX_BWE_GAIN2_ALPHA +300 0x799A //RX_BWE_GAIN3_ALPHA +301 0x001E //RX_BWE_CUTOFF +302 0x3000 //RX_BWE_GAINFILL +303 0x3200 //RX_BWE_MAXTH_TONE +304 0x2000 //RX_BWE_EQ_0 +305 0x2000 //RX_BWE_EQ_1 +306 0x2000 //RX_BWE_EQ_2 +307 0x2000 //RX_BWE_EQ_3 +308 0x2000 //RX_BWE_EQ_4 +309 0x2000 //RX_BWE_EQ_5 +310 0x2000 //RX_BWE_EQ_6 +311 0x0000 //RX_BWE_RESRV_0 +312 0x0000 //RX_BWE_RESRV_1 +313 0x0000 //RX_BWE_RESRV_2 +#VOL 0 +163 0x5000 //RX_TDDRC_ALPHA_UP_1 +164 0x5000 //RX_TDDRC_ALPHA_UP_2 +165 0x5000 //RX_TDDRC_ALPHA_UP_3 +166 0x2000 //RX_TDDRC_ALPHA_UP_4 +184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +190 0x65AD //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +269 0x0000 //RX_TDDRC_THRD_0 +270 0x0000 //RX_TDDRC_THRD_1 +271 0x1A00 //RX_TDDRC_THRD_2 +272 0x1A00 //RX_TDDRC_THRD_3 +273 0x3000 //RX_TDDRC_SLANT_0 +274 0x7EB8 //RX_TDDRC_SLANT_1 +275 0x5000 //RX_TDDRC_ALPHA_UP_0 +276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x199A //RX_TDDRC_HMNC_GAIN +279 0x0001 //RX_TDDRC_SMT_FLAG +280 0x0CCD //RX_TDDRC_SMT_W +281 0x01C8 //RX_TDDRC_DRC_GAIN +195 0x0020 //RX_FDEQ_SUBNUM +196 0x4848 //RX_FDEQ_GAIN_0 +197 0x4848 //RX_FDEQ_GAIN_1 +198 0x4848 //RX_FDEQ_GAIN_2 +199 0x4848 //RX_FDEQ_GAIN_3 +200 0x4848 //RX_FDEQ_GAIN_4 +201 0x4848 //RX_FDEQ_GAIN_5 +202 0x4848 //RX_FDEQ_GAIN_6 +203 0x4848 //RX_FDEQ_GAIN_7 +204 0x4848 //RX_FDEQ_GAIN_8 +205 0x4848 //RX_FDEQ_GAIN_9 +206 0x4848 //RX_FDEQ_GAIN_10 +207 0x4848 //RX_FDEQ_GAIN_11 +208 0x4848 //RX_FDEQ_GAIN_12 +209 0x4848 //RX_FDEQ_GAIN_13 +210 0x4848 //RX_FDEQ_GAIN_14 +211 0x4848 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0202 //RX_FDEQ_BIN_0 +221 0x0203 //RX_FDEQ_BIN_1 +222 0x0303 //RX_FDEQ_BIN_2 +223 0x0304 //RX_FDEQ_BIN_3 +224 0x0405 //RX_FDEQ_BIN_4 +225 0x0506 //RX_FDEQ_BIN_5 +226 0x0708 //RX_FDEQ_BIN_6 +227 0x090A //RX_FDEQ_BIN_7 +228 0x0B0C //RX_FDEQ_BIN_8 +229 0x0D0E //RX_FDEQ_BIN_9 +230 0x1013 //RX_FDEQ_BIN_10 +231 0x1719 //RX_FDEQ_BIN_11 +232 0x1B1E //RX_FDEQ_BIN_12 +233 0x1E1E //RX_FDEQ_BIN_13 +234 0x1E28 //RX_FDEQ_BIN_14 +235 0x282C //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x4000 //RX_FDEQ_RESRV_0 +245 0x0320 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0030 //RX_FDDRC_BAND_MARGIN_1 +248 0x0050 //RX_FDDRC_BAND_MARGIN_2 +249 0x0080 //RX_FDDRC_BAND_MARGIN_3 +250 0x0007 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x5000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x6400 //RX_FDDRC_THRD_3_2 +258 0x6400 //RX_FDDRC_THRD_3_3 +259 0x2000 //RX_FDDRC_SLANT_0_0 +260 0x2000 //RX_FDDRC_SLANT_0_1 +261 0x2000 //RX_FDDRC_SLANT_0_2 +262 0x2000 //RX_FDDRC_SLANT_0_3 +263 0x5333 //RX_FDDRC_SLANT_1_0 +264 0x5333 //RX_FDDRC_SLANT_1_1 +265 0x5333 //RX_FDDRC_SLANT_1_2 +266 0x5333 //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +286 0x000B //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 +#VOL 1 +163 0x5000 //RX_TDDRC_ALPHA_UP_1 +164 0x5000 //RX_TDDRC_ALPHA_UP_2 +165 0x5000 //RX_TDDRC_ALPHA_UP_3 +166 0x2000 //RX_TDDRC_ALPHA_UP_4 +184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +190 0x65AD //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +269 0x0000 //RX_TDDRC_THRD_0 +270 0x0000 //RX_TDDRC_THRD_1 +271 0x1A00 //RX_TDDRC_THRD_2 +272 0x1A00 //RX_TDDRC_THRD_3 +273 0x3000 //RX_TDDRC_SLANT_0 +274 0x7EB8 //RX_TDDRC_SLANT_1 +275 0x5000 //RX_TDDRC_ALPHA_UP_0 +276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x199A //RX_TDDRC_HMNC_GAIN +279 0x0001 //RX_TDDRC_SMT_FLAG +280 0x0CCD //RX_TDDRC_SMT_W +281 0x01C8 //RX_TDDRC_DRC_GAIN +195 0x0020 //RX_FDEQ_SUBNUM +196 0x4848 //RX_FDEQ_GAIN_0 +197 0x4848 //RX_FDEQ_GAIN_1 +198 0x4848 //RX_FDEQ_GAIN_2 +199 0x4848 //RX_FDEQ_GAIN_3 +200 0x4848 //RX_FDEQ_GAIN_4 +201 0x4848 //RX_FDEQ_GAIN_5 +202 0x4848 //RX_FDEQ_GAIN_6 +203 0x4848 //RX_FDEQ_GAIN_7 +204 0x4848 //RX_FDEQ_GAIN_8 +205 0x4848 //RX_FDEQ_GAIN_9 +206 0x4848 //RX_FDEQ_GAIN_10 +207 0x4848 //RX_FDEQ_GAIN_11 +208 0x4848 //RX_FDEQ_GAIN_12 +209 0x4848 //RX_FDEQ_GAIN_13 +210 0x4848 //RX_FDEQ_GAIN_14 +211 0x4848 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0202 //RX_FDEQ_BIN_0 +221 0x0203 //RX_FDEQ_BIN_1 +222 0x0303 //RX_FDEQ_BIN_2 +223 0x0304 //RX_FDEQ_BIN_3 +224 0x0405 //RX_FDEQ_BIN_4 +225 0x0506 //RX_FDEQ_BIN_5 +226 0x0708 //RX_FDEQ_BIN_6 +227 0x090A //RX_FDEQ_BIN_7 +228 0x0B0C //RX_FDEQ_BIN_8 +229 0x0D0E //RX_FDEQ_BIN_9 +230 0x1013 //RX_FDEQ_BIN_10 +231 0x1719 //RX_FDEQ_BIN_11 +232 0x1B1E //RX_FDEQ_BIN_12 +233 0x1E1E //RX_FDEQ_BIN_13 +234 0x1E28 //RX_FDEQ_BIN_14 +235 0x282C //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x4000 //RX_FDEQ_RESRV_0 +245 0x0320 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0030 //RX_FDDRC_BAND_MARGIN_1 +248 0x0050 //RX_FDDRC_BAND_MARGIN_2 +249 0x0080 //RX_FDDRC_BAND_MARGIN_3 +250 0x0007 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x5000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x6400 //RX_FDDRC_THRD_3_2 +258 0x6400 //RX_FDDRC_THRD_3_3 +259 0x2000 //RX_FDDRC_SLANT_0_0 +260 0x2000 //RX_FDDRC_SLANT_0_1 +261 0x2000 //RX_FDDRC_SLANT_0_2 +262 0x2000 //RX_FDDRC_SLANT_0_3 +263 0x5333 //RX_FDDRC_SLANT_1_0 +264 0x5333 //RX_FDDRC_SLANT_1_1 +265 0x5333 //RX_FDDRC_SLANT_1_2 +266 0x5333 //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +286 0x0013 //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 +#VOL 2 +163 0x5000 //RX_TDDRC_ALPHA_UP_1 +164 0x5000 //RX_TDDRC_ALPHA_UP_2 +165 0x5000 //RX_TDDRC_ALPHA_UP_3 +166 0x2000 //RX_TDDRC_ALPHA_UP_4 +184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +190 0x65AD //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +269 0x0000 //RX_TDDRC_THRD_0 +270 0x0000 //RX_TDDRC_THRD_1 +271 0x1A00 //RX_TDDRC_THRD_2 +272 0x1A00 //RX_TDDRC_THRD_3 +273 0x3000 //RX_TDDRC_SLANT_0 +274 0x7EB8 //RX_TDDRC_SLANT_1 +275 0x5000 //RX_TDDRC_ALPHA_UP_0 +276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x199A //RX_TDDRC_HMNC_GAIN +279 0x0001 //RX_TDDRC_SMT_FLAG +280 0x0CCD //RX_TDDRC_SMT_W +281 0x01C8 //RX_TDDRC_DRC_GAIN +195 0x0020 //RX_FDEQ_SUBNUM +196 0x4848 //RX_FDEQ_GAIN_0 +197 0x4848 //RX_FDEQ_GAIN_1 +198 0x4848 //RX_FDEQ_GAIN_2 +199 0x4848 //RX_FDEQ_GAIN_3 +200 0x4848 //RX_FDEQ_GAIN_4 +201 0x4848 //RX_FDEQ_GAIN_5 +202 0x4848 //RX_FDEQ_GAIN_6 +203 0x4848 //RX_FDEQ_GAIN_7 +204 0x4848 //RX_FDEQ_GAIN_8 +205 0x4848 //RX_FDEQ_GAIN_9 +206 0x4848 //RX_FDEQ_GAIN_10 +207 0x4848 //RX_FDEQ_GAIN_11 +208 0x4848 //RX_FDEQ_GAIN_12 +209 0x4848 //RX_FDEQ_GAIN_13 +210 0x4848 //RX_FDEQ_GAIN_14 +211 0x4848 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0202 //RX_FDEQ_BIN_0 +221 0x0203 //RX_FDEQ_BIN_1 +222 0x0303 //RX_FDEQ_BIN_2 +223 0x0304 //RX_FDEQ_BIN_3 +224 0x0405 //RX_FDEQ_BIN_4 +225 0x0506 //RX_FDEQ_BIN_5 +226 0x0708 //RX_FDEQ_BIN_6 +227 0x090A //RX_FDEQ_BIN_7 +228 0x0B0C //RX_FDEQ_BIN_8 +229 0x0D0E //RX_FDEQ_BIN_9 +230 0x1013 //RX_FDEQ_BIN_10 +231 0x1719 //RX_FDEQ_BIN_11 +232 0x1B1E //RX_FDEQ_BIN_12 +233 0x1E1E //RX_FDEQ_BIN_13 +234 0x1E28 //RX_FDEQ_BIN_14 +235 0x282C //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x4000 //RX_FDEQ_RESRV_0 +245 0x0320 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0030 //RX_FDDRC_BAND_MARGIN_1 +248 0x0050 //RX_FDDRC_BAND_MARGIN_2 +249 0x0080 //RX_FDDRC_BAND_MARGIN_3 +250 0x0007 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x5000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x6400 //RX_FDDRC_THRD_3_2 +258 0x6400 //RX_FDDRC_THRD_3_3 +259 0x2000 //RX_FDDRC_SLANT_0_0 +260 0x2000 //RX_FDDRC_SLANT_0_1 +261 0x2000 //RX_FDDRC_SLANT_0_2 +262 0x2000 //RX_FDDRC_SLANT_0_3 +263 0x5333 //RX_FDDRC_SLANT_1_0 +264 0x5333 //RX_FDDRC_SLANT_1_1 +265 0x5333 //RX_FDDRC_SLANT_1_2 +266 0x5333 //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +286 0x0020 //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 +#VOL 3 +163 0x5000 //RX_TDDRC_ALPHA_UP_1 +164 0x5000 //RX_TDDRC_ALPHA_UP_2 +165 0x5000 //RX_TDDRC_ALPHA_UP_3 +166 0x2000 //RX_TDDRC_ALPHA_UP_4 +184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +190 0x65AD //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +269 0x0000 //RX_TDDRC_THRD_0 +270 0x0000 //RX_TDDRC_THRD_1 +271 0x1A00 //RX_TDDRC_THRD_2 +272 0x1A00 //RX_TDDRC_THRD_3 +273 0x3000 //RX_TDDRC_SLANT_0 +274 0x7EB8 //RX_TDDRC_SLANT_1 +275 0x5000 //RX_TDDRC_ALPHA_UP_0 +276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x199A //RX_TDDRC_HMNC_GAIN +279 0x0001 //RX_TDDRC_SMT_FLAG +280 0x0CCD //RX_TDDRC_SMT_W +281 0x01C8 //RX_TDDRC_DRC_GAIN +195 0x0020 //RX_FDEQ_SUBNUM +196 0x4848 //RX_FDEQ_GAIN_0 +197 0x4848 //RX_FDEQ_GAIN_1 +198 0x4848 //RX_FDEQ_GAIN_2 +199 0x4848 //RX_FDEQ_GAIN_3 +200 0x4848 //RX_FDEQ_GAIN_4 +201 0x4848 //RX_FDEQ_GAIN_5 +202 0x4848 //RX_FDEQ_GAIN_6 +203 0x4848 //RX_FDEQ_GAIN_7 +204 0x4848 //RX_FDEQ_GAIN_8 +205 0x4848 //RX_FDEQ_GAIN_9 +206 0x4848 //RX_FDEQ_GAIN_10 +207 0x4848 //RX_FDEQ_GAIN_11 +208 0x4848 //RX_FDEQ_GAIN_12 +209 0x4848 //RX_FDEQ_GAIN_13 +210 0x4848 //RX_FDEQ_GAIN_14 +211 0x4848 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0202 //RX_FDEQ_BIN_0 +221 0x0203 //RX_FDEQ_BIN_1 +222 0x0303 //RX_FDEQ_BIN_2 +223 0x0304 //RX_FDEQ_BIN_3 +224 0x0405 //RX_FDEQ_BIN_4 +225 0x0506 //RX_FDEQ_BIN_5 +226 0x0708 //RX_FDEQ_BIN_6 +227 0x090A //RX_FDEQ_BIN_7 +228 0x0B0C //RX_FDEQ_BIN_8 +229 0x0D0E //RX_FDEQ_BIN_9 +230 0x1013 //RX_FDEQ_BIN_10 +231 0x1719 //RX_FDEQ_BIN_11 +232 0x1B1E //RX_FDEQ_BIN_12 +233 0x1E1E //RX_FDEQ_BIN_13 +234 0x1E28 //RX_FDEQ_BIN_14 +235 0x282C //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x4000 //RX_FDEQ_RESRV_0 +245 0x0320 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0030 //RX_FDDRC_BAND_MARGIN_1 +248 0x0050 //RX_FDDRC_BAND_MARGIN_2 +249 0x0080 //RX_FDDRC_BAND_MARGIN_3 +250 0x0007 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x5000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x6400 //RX_FDDRC_THRD_3_2 +258 0x6400 //RX_FDDRC_THRD_3_3 +259 0x2000 //RX_FDDRC_SLANT_0_0 +260 0x2000 //RX_FDDRC_SLANT_0_1 +261 0x2000 //RX_FDDRC_SLANT_0_2 +262 0x2000 //RX_FDDRC_SLANT_0_3 +263 0x5333 //RX_FDDRC_SLANT_1_0 +264 0x5333 //RX_FDDRC_SLANT_1_1 +265 0x5333 //RX_FDDRC_SLANT_1_2 +266 0x5333 //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +286 0x0036 //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 +#VOL 4 +163 0x5000 //RX_TDDRC_ALPHA_UP_1 +164 0x5000 //RX_TDDRC_ALPHA_UP_2 +165 0x5000 //RX_TDDRC_ALPHA_UP_3 +166 0x2000 //RX_TDDRC_ALPHA_UP_4 +184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +190 0x65AD //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +269 0x0000 //RX_TDDRC_THRD_0 +270 0x0000 //RX_TDDRC_THRD_1 +271 0x1A00 //RX_TDDRC_THRD_2 +272 0x1A00 //RX_TDDRC_THRD_3 +273 0x3000 //RX_TDDRC_SLANT_0 +274 0x7EB8 //RX_TDDRC_SLANT_1 +275 0x5000 //RX_TDDRC_ALPHA_UP_0 +276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x199A //RX_TDDRC_HMNC_GAIN +279 0x0001 //RX_TDDRC_SMT_FLAG +280 0x0CCD //RX_TDDRC_SMT_W +281 0x01C8 //RX_TDDRC_DRC_GAIN +195 0x0020 //RX_FDEQ_SUBNUM +196 0x4848 //RX_FDEQ_GAIN_0 +197 0x4848 //RX_FDEQ_GAIN_1 +198 0x4848 //RX_FDEQ_GAIN_2 +199 0x4848 //RX_FDEQ_GAIN_3 +200 0x4848 //RX_FDEQ_GAIN_4 +201 0x4848 //RX_FDEQ_GAIN_5 +202 0x4848 //RX_FDEQ_GAIN_6 +203 0x4848 //RX_FDEQ_GAIN_7 +204 0x4848 //RX_FDEQ_GAIN_8 +205 0x4848 //RX_FDEQ_GAIN_9 +206 0x4848 //RX_FDEQ_GAIN_10 +207 0x4848 //RX_FDEQ_GAIN_11 +208 0x4848 //RX_FDEQ_GAIN_12 +209 0x4848 //RX_FDEQ_GAIN_13 +210 0x4848 //RX_FDEQ_GAIN_14 +211 0x4848 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0202 //RX_FDEQ_BIN_0 +221 0x0203 //RX_FDEQ_BIN_1 +222 0x0303 //RX_FDEQ_BIN_2 +223 0x0304 //RX_FDEQ_BIN_3 +224 0x0405 //RX_FDEQ_BIN_4 +225 0x0506 //RX_FDEQ_BIN_5 +226 0x0708 //RX_FDEQ_BIN_6 +227 0x090A //RX_FDEQ_BIN_7 +228 0x0B0C //RX_FDEQ_BIN_8 +229 0x0D0E //RX_FDEQ_BIN_9 +230 0x1013 //RX_FDEQ_BIN_10 +231 0x1719 //RX_FDEQ_BIN_11 +232 0x1B1E //RX_FDEQ_BIN_12 +233 0x1E1E //RX_FDEQ_BIN_13 +234 0x1E28 //RX_FDEQ_BIN_14 +235 0x282C //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x4000 //RX_FDEQ_RESRV_0 +245 0x0320 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0030 //RX_FDDRC_BAND_MARGIN_1 +248 0x0050 //RX_FDDRC_BAND_MARGIN_2 +249 0x0080 //RX_FDDRC_BAND_MARGIN_3 +250 0x0007 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x5000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x6400 //RX_FDDRC_THRD_3_2 +258 0x6400 //RX_FDDRC_THRD_3_3 +259 0x2000 //RX_FDDRC_SLANT_0_0 +260 0x2000 //RX_FDDRC_SLANT_0_1 +261 0x2000 //RX_FDDRC_SLANT_0_2 +262 0x2000 //RX_FDDRC_SLANT_0_3 +263 0x5333 //RX_FDDRC_SLANT_1_0 +264 0x5333 //RX_FDDRC_SLANT_1_1 +265 0x5333 //RX_FDDRC_SLANT_1_2 +266 0x5333 //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +286 0x005B //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 +#VOL 5 +163 0x5000 //RX_TDDRC_ALPHA_UP_1 +164 0x5000 //RX_TDDRC_ALPHA_UP_2 +165 0x5000 //RX_TDDRC_ALPHA_UP_3 +166 0x2000 //RX_TDDRC_ALPHA_UP_4 +184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +190 0x65AD //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +269 0x0000 //RX_TDDRC_THRD_0 +270 0x0000 //RX_TDDRC_THRD_1 +271 0x1A00 //RX_TDDRC_THRD_2 +272 0x1A00 //RX_TDDRC_THRD_3 +273 0x3000 //RX_TDDRC_SLANT_0 +274 0x7EB8 //RX_TDDRC_SLANT_1 +275 0x5000 //RX_TDDRC_ALPHA_UP_0 +276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x199A //RX_TDDRC_HMNC_GAIN +279 0x0001 //RX_TDDRC_SMT_FLAG +280 0x0CCD //RX_TDDRC_SMT_W +281 0x01C8 //RX_TDDRC_DRC_GAIN +195 0x0020 //RX_FDEQ_SUBNUM +196 0x4848 //RX_FDEQ_GAIN_0 +197 0x4848 //RX_FDEQ_GAIN_1 +198 0x4848 //RX_FDEQ_GAIN_2 +199 0x4848 //RX_FDEQ_GAIN_3 +200 0x4848 //RX_FDEQ_GAIN_4 +201 0x4848 //RX_FDEQ_GAIN_5 +202 0x4848 //RX_FDEQ_GAIN_6 +203 0x4848 //RX_FDEQ_GAIN_7 +204 0x4848 //RX_FDEQ_GAIN_8 +205 0x4848 //RX_FDEQ_GAIN_9 +206 0x4848 //RX_FDEQ_GAIN_10 +207 0x4848 //RX_FDEQ_GAIN_11 +208 0x4848 //RX_FDEQ_GAIN_12 +209 0x4848 //RX_FDEQ_GAIN_13 +210 0x4848 //RX_FDEQ_GAIN_14 +211 0x4848 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0202 //RX_FDEQ_BIN_0 +221 0x0203 //RX_FDEQ_BIN_1 +222 0x0303 //RX_FDEQ_BIN_2 +223 0x0304 //RX_FDEQ_BIN_3 +224 0x0405 //RX_FDEQ_BIN_4 +225 0x0506 //RX_FDEQ_BIN_5 +226 0x0708 //RX_FDEQ_BIN_6 +227 0x090A //RX_FDEQ_BIN_7 +228 0x0B0C //RX_FDEQ_BIN_8 +229 0x0D0E //RX_FDEQ_BIN_9 +230 0x1013 //RX_FDEQ_BIN_10 +231 0x1719 //RX_FDEQ_BIN_11 +232 0x1B1E //RX_FDEQ_BIN_12 +233 0x1E1E //RX_FDEQ_BIN_13 +234 0x1E28 //RX_FDEQ_BIN_14 +235 0x282C //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x4000 //RX_FDEQ_RESRV_0 +245 0x0320 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0030 //RX_FDDRC_BAND_MARGIN_1 +248 0x0050 //RX_FDDRC_BAND_MARGIN_2 +249 0x0080 //RX_FDDRC_BAND_MARGIN_3 +250 0x0007 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x5000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x6400 //RX_FDDRC_THRD_3_2 +258 0x6400 //RX_FDDRC_THRD_3_3 +259 0x2000 //RX_FDDRC_SLANT_0_0 +260 0x2000 //RX_FDDRC_SLANT_0_1 +261 0x2000 //RX_FDDRC_SLANT_0_2 +262 0x2000 //RX_FDDRC_SLANT_0_3 +263 0x5333 //RX_FDDRC_SLANT_1_0 +264 0x5333 //RX_FDDRC_SLANT_1_1 +265 0x5333 //RX_FDDRC_SLANT_1_2 +266 0x5333 //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +286 0x0099 //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 +#VOL 6 +163 0x5000 //RX_TDDRC_ALPHA_UP_1 +164 0x5000 //RX_TDDRC_ALPHA_UP_2 +165 0x5000 //RX_TDDRC_ALPHA_UP_3 +166 0x2000 //RX_TDDRC_ALPHA_UP_4 +184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +190 0x65AD //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +269 0x0000 //RX_TDDRC_THRD_0 +270 0x0000 //RX_TDDRC_THRD_1 +271 0x1A00 //RX_TDDRC_THRD_2 +272 0x1A00 //RX_TDDRC_THRD_3 +273 0x3000 //RX_TDDRC_SLANT_0 +274 0x7EB8 //RX_TDDRC_SLANT_1 +275 0x5000 //RX_TDDRC_ALPHA_UP_0 +276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x199A //RX_TDDRC_HMNC_GAIN +279 0x0001 //RX_TDDRC_SMT_FLAG +280 0x0CCD //RX_TDDRC_SMT_W +281 0x01C8 //RX_TDDRC_DRC_GAIN +195 0x0020 //RX_FDEQ_SUBNUM +196 0x4848 //RX_FDEQ_GAIN_0 +197 0x4848 //RX_FDEQ_GAIN_1 +198 0x4848 //RX_FDEQ_GAIN_2 +199 0x4848 //RX_FDEQ_GAIN_3 +200 0x4848 //RX_FDEQ_GAIN_4 +201 0x4848 //RX_FDEQ_GAIN_5 +202 0x4848 //RX_FDEQ_GAIN_6 +203 0x4848 //RX_FDEQ_GAIN_7 +204 0x4848 //RX_FDEQ_GAIN_8 +205 0x4848 //RX_FDEQ_GAIN_9 +206 0x4848 //RX_FDEQ_GAIN_10 +207 0x4848 //RX_FDEQ_GAIN_11 +208 0x4848 //RX_FDEQ_GAIN_12 +209 0x4848 //RX_FDEQ_GAIN_13 +210 0x4848 //RX_FDEQ_GAIN_14 +211 0x4848 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0202 //RX_FDEQ_BIN_0 +221 0x0203 //RX_FDEQ_BIN_1 +222 0x0303 //RX_FDEQ_BIN_2 +223 0x0304 //RX_FDEQ_BIN_3 +224 0x0405 //RX_FDEQ_BIN_4 +225 0x0506 //RX_FDEQ_BIN_5 +226 0x0708 //RX_FDEQ_BIN_6 +227 0x090A //RX_FDEQ_BIN_7 +228 0x0B0C //RX_FDEQ_BIN_8 +229 0x0D0E //RX_FDEQ_BIN_9 +230 0x1013 //RX_FDEQ_BIN_10 +231 0x1719 //RX_FDEQ_BIN_11 +232 0x1B1E //RX_FDEQ_BIN_12 +233 0x1E1E //RX_FDEQ_BIN_13 +234 0x1E28 //RX_FDEQ_BIN_14 +235 0x282C //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x4000 //RX_FDEQ_RESRV_0 +245 0x0320 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0030 //RX_FDDRC_BAND_MARGIN_1 +248 0x0050 //RX_FDDRC_BAND_MARGIN_2 +249 0x0080 //RX_FDDRC_BAND_MARGIN_3 +250 0x0007 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x5000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x6400 //RX_FDDRC_THRD_3_2 +258 0x6400 //RX_FDDRC_THRD_3_3 +259 0x2000 //RX_FDDRC_SLANT_0_0 +260 0x2000 //RX_FDDRC_SLANT_0_1 +261 0x2000 //RX_FDDRC_SLANT_0_2 +262 0x2000 //RX_FDDRC_SLANT_0_3 +263 0x5333 //RX_FDDRC_SLANT_1_0 +264 0x5333 //RX_FDDRC_SLANT_1_1 +265 0x5333 //RX_FDDRC_SLANT_1_2 +266 0x5333 //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +286 0x0100 //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 #CASE_NAME HEADSET-RESERVE1-VOICE_GENERIC-FB -#PARAM_MODE FULL -#PARAM_TYPE TX+RX -#TOTAL_CUSTOM_STEP 7 +#PARAM_MODE Full +#PARAM_TYPE TX+2RX +#TOTAL_CUSTOM_STEP 7+7 #TX 0 0x0009 //TX_OPERATION_MODE_0 1 0x0009 //TX_OPERATION_MODE_1 @@ -19553,10 +29629,10 @@ 248 0xF600 //TX_THR_SN_EST_6 249 0xF600 //TX_THR_SN_EST_7 250 0x0200 //TX_DELTA_THR_SN_EST_0 -251 0x0200 //TX_DELTA_THR_SN_EST_1 -252 0x0400 //TX_DELTA_THR_SN_EST_2 -253 0x0300 //TX_DELTA_THR_SN_EST_3 -254 0x0600 //TX_DELTA_THR_SN_EST_4 +251 0x0400 //TX_DELTA_THR_SN_EST_1 +252 0x0300 //TX_DELTA_THR_SN_EST_2 +253 0x0600 //TX_DELTA_THR_SN_EST_3 +254 0x0200 //TX_DELTA_THR_SN_EST_4 255 0x0200 //TX_DELTA_THR_SN_EST_5 256 0x0200 //TX_DELTA_THR_SN_EST_6 257 0x0200 //TX_DELTA_THR_SN_EST_7 @@ -19584,31 +29660,31 @@ 279 0x2000 //TX_B_POST_FLT_0 280 0x2000 //TX_B_POST_FLT_1 281 0x0012 //TX_NS_LVL_CTRL_0 -282 0x0019 //TX_NS_LVL_CTRL_1 +282 0x0016 //TX_NS_LVL_CTRL_1 283 0x0016 //TX_NS_LVL_CTRL_2 -284 0x0016 //TX_NS_LVL_CTRL_3 -285 0x0019 //TX_NS_LVL_CTRL_4 +284 0x0019 //TX_NS_LVL_CTRL_3 +285 0x0010 //TX_NS_LVL_CTRL_4 286 0x0010 //TX_NS_LVL_CTRL_5 -287 0x0010 //TX_NS_LVL_CTRL_6 +287 0x0019 //TX_NS_LVL_CTRL_6 288 0x0010 //TX_NS_LVL_CTRL_7 289 0x000C //TX_MIN_GAIN_S_0 -290 0x0011 //TX_MIN_GAIN_S_1 +290 0x000C //TX_MIN_GAIN_S_1 291 0x000C //TX_MIN_GAIN_S_2 -292 0x000C //TX_MIN_GAIN_S_3 -293 0x000F //TX_MIN_GAIN_S_4 +292 0x000F //TX_MIN_GAIN_S_3 +293 0x000C //TX_MIN_GAIN_S_4 294 0x000C //TX_MIN_GAIN_S_5 -295 0x000C //TX_MIN_GAIN_S_6 +295 0x0011 //TX_MIN_GAIN_S_6 296 0x000C //TX_MIN_GAIN_S_7 297 0x7FFF //TX_NMOS_SUP 298 0x0000 //TX_NS_MAX_PRI_SNR_TH 299 0x0000 //TX_NMOS_SUP_MENSA 300 0x7000 //TX_SNRI_SUP_0 -301 0x6000 //TX_SNRI_SUP_1 +301 0x7000 //TX_SNRI_SUP_1 302 0x7000 //TX_SNRI_SUP_2 -303 0x7000 //TX_SNRI_SUP_3 -304 0x6000 //TX_SNRI_SUP_4 +303 0x6000 //TX_SNRI_SUP_3 +304 0x7FFF //TX_SNRI_SUP_4 305 0x7FFF //TX_SNRI_SUP_5 -306 0x7FFF //TX_SNRI_SUP_6 +306 0x6000 //TX_SNRI_SUP_6 307 0x7FFF //TX_SNRI_SUP_7 308 0x7FFF //TX_THR_LFNS 309 0x0016 //TX_G_LFNS @@ -19625,8 +29701,8 @@ 320 0x6000 //TX_A_POST_FILT_S_6 321 0x6000 //TX_A_POST_FILT_S_7 322 0x2000 //TX_B_POST_FILT_0 -323 0x2000 //TX_B_POST_FILT_1 -324 0x4000 //TX_B_POST_FILT_2 +323 0x4000 //TX_B_POST_FILT_1 +324 0x2000 //TX_B_POST_FILT_2 325 0x2000 //TX_B_POST_FILT_3 326 0x2000 //TX_B_POST_FILT_4 327 0x2000 //TX_B_POST_FILT_5 @@ -19669,7 +29745,7 @@ 364 0x0000 //TX_K_APT 365 0x0001 //TX_NOISEDET 366 0x0190 //TX_NDETCT -367 0x0020 //TX_NOISE_TH_0 +367 0x04E8 //TX_NOISE_TH_0 368 0x7FFF //TX_NOISE_TH_0_2 369 0x7FFF //TX_NOISE_TH_0_3 370 0x02A6 //TX_NOISE_TH_1 @@ -19681,11 +29757,11 @@ 376 0x0001 //TX_NOISE_TH_5_3 377 0x0000 //TX_NOISE_TH_5_4 378 0x02BC //TX_NOISE_TH_6 -379 0x0020 //TX_MINENOISE_TH -380 0x4000 //TX_MINENOISE_MIC0_TH_MTS -381 0xFFEE //TX_MINENOISE_MIC0_TH_EXP -382 0x6000 //TX_MINENOISE_MIC0_S_TH_MTS -383 0xFFF3 //TX_MINENOISE_MIC0_S_TH_EXP +379 0x02BC //TX_MINENOISE_TH +380 0xD508 //TX_MORENS_TFMASK_TH +381 0x0001 //TX_DRC_QUIET_FLOOR +382 0x3A98 //TX_RATIODTL_CUT_TH +383 0x1482 //TX_DT_CUT_K1 384 0x0666 //TX_OUT_ENER_S_TH_CLEAN 385 0x0666 //TX_OUT_ENER_S_TH_LESSCLEAN 386 0x0333 //TX_OUT_ENER_S_TH_NOISY @@ -19693,22 +29769,22 @@ 388 0x0333 //TX_OUT_ENER_TH_SPEECH 389 0x2000 //TX_SN_NPB_GAIN 390 0x0000 //TX_NN_NPB_GAIN -391 0x0000 //TX_CSX_ALPHA_0 -392 0x0000 //TX_CSX_ALPHA_1 -393 0x0000 //TX_CSX_ALPHA_2 -394 0x0000 //TX_CSX_ALPHA_3 -395 0x0800 //TX_MU_ARSP_EST -396 0x00C8 //TX_P_OUTBEAM_MIN_TH +391 0x7FFF //TX_POST_MASK_SUP_HSNE +392 0x1388 //TX_TAIL_DET_TH +393 0x4000 //TX_B_LESSCUT_RTO_WTA +394 0x0000 //TX_MEL_G_R +395 0x0080 //TX_SUPHIGH_TH +396 0x0000 //TX_MASK_G_R 397 0x0002 //TX_EXTRA_NS_L -398 0x0800 //TX_EXTRA_NS_A -399 0x0005 //TX_VR_NOISE_FLOOR_TH +398 0x1800 //TX_C_POST_FLT_MASK +399 0x7FFF //TX_A_POST_FLT_WNS 400 0x0148 //TX_MIN_G_LOW300HZ 401 0x0004 //TX_MAXLEVEL_CNG 402 0x00B4 //TX_STN_NOISE_TH 403 0x4000 //TX_POST_MASK_SUP 404 0x7FFF //TX_POST_MASK_ADJUST 405 0x00C8 //TX_NS_ENOISE_MIC0_TH -406 0x0020 //TX_MINENOISE_MIC0_TH +406 0x04E7 //TX_MINENOISE_MIC0_TH 407 0x012C //TX_MINENOISE_MIC0_S_TH 408 0x2900 //TX_MIN_G_CTRL_SSNS 409 0x0800 //TX_METAL_RTO_THR @@ -19816,16 +29892,16 @@ 511 0x6666 //TX_MIC_TO_BFGAIN 512 0x0000 //TX_MICTOBFGAIN0 513 0x0000 //TX_FASTMUE_TH -514 0x0000 //TX_DERVB_LEN_0 -515 0x0000 //TX_DERVB_LEN_1 -516 0x0000 //TX_RHO_DERVB -517 0x0000 //TX_MIC_INDX_DERVB -518 0x0000 //TX_MU_DERVB -519 0x0000 //TX_DR_RESRV_0 -520 0x0000 //TX_DR_RESRV_1 -521 0x0000 //TX_DR_RESRV_2 -522 0x0000 //TX_DR_RESRV_3 -523 0x0000 //TX_DR_RESRV_4 +514 0xC000 //TX_DEREVERB_LF_MU +515 0xC000 //TX_DEREVERB_HF_MU +516 0xCCCC //TX_DEREVERB_DELAY +517 0xD999 //TX_DEREVERB_COEF_LEN +518 0x1F40 //TX_DEREVERB_DNR +519 0x0000 //TX_DEREVERB_ALPHA +520 0x0000 //TX_DEREVERB_BETA +521 0x0000 //TX_GSC_RTOL_TH +522 0x7000 //TX_GSC_RTOH_TH +523 0x0064 //TX_WIDE2_MEANHTH 524 0x0000 //TX_DR_RESRV_5 525 0x0000 //TX_DR_RESRV_6 526 0x0000 //TX_DR_RESRV_7 @@ -20199,8 +30275,73 @@ 894 0xC000 //TX_FASTNS_SSA_THHFL 895 0xCCCC //TX_FASTNS_SSA_THLFH 896 0xD999 //TX_FASTNS_SSA_THHFH +897 0x2339 //TX_SENDFUNC_REG_MICMUTE +898 0x0021 //TX_SENDFUNC_REG_MICMUTE1 +899 0x02BC //TX_MICMUTE_RATIO_THR +900 0x0140 //TX_MICMUTE_AMP_THR +901 0x0004 //TX_MICMUTE_HPF_IND +902 0x00C0 //TX_MICMUTE_LOG_EYR_TH +903 0x0008 //TX_MICMUTE_CVG_TIME +904 0x0008 //TX_MICMUTE_RELEASE_TIME +905 0x01FE //TX_MIC_VOLUME_MIC0MUTE +906 0x0020 //TX_MICMUTE_EPD_OFFSET_0 +907 0x001E //TX_MICMUTE_FRQ_AEC_L +908 0x7999 //TX_MICMUTE_EAD_THR +909 0x7FFF //TX_MICMUTE_LAMBDA_CB_NLE +910 0x7FFF //TX_MICMUTE_LAMBDA_RE_EST +911 0x4000 //TX_DTD_THR1_MICMUTE_0 +912 0x7000 //TX_DTD_THR1_MICMUTE_1 +913 0x7FFF //TX_DTD_THR1_MICMUTE_2 +914 0x7FFF //TX_DTD_THR1_MICMUTE_3 +915 0x6CCC //TX_DTD_THR2_MICMUTE_0 +916 0x0400 //TX_MICMUTE_MIN_EQ_RE_EST_0 +917 0x0400 //TX_MICMUTE_MIN_EQ_RE_EST_1 +918 0x1000 //TX_MICMUTE_MIN_EQ_RE_EST_2 +919 0x7FFF //TX_MICMUTE_MIN_EQ_RE_EST_3 +920 0x7FFF //TX_MICMUTE_MIN_EQ_RE_EST_4 +921 0x4000 //TX_MICMUTE_C_POST_FLT +922 0x03E8 //TX_MICMUTE_DT_CUT_K +923 0x0001 //TX_MICMUTE_DT_CUT_THR +924 0x03E8 //TX_MICMUTE_DT_CUT_K2 +925 0x0001 //TX_MICMUTE_DT_CUT_THR2 +926 0x0064 //TX_MICMUTE_DT2_HOLD_N +927 0x1000 //TX_MICMUTE_RATIODTH_THCUT +928 0x1000 //TX_MICMUTE_B_POST_FLT_ECHOL +929 0x7FFF //TX_MICMUTE_B_POST_FLT_ECHOH +930 0x0400 //TX_MICMUTE_C_POST_FLT_MASK +931 0x7999 //TX_MICMUTE_RATIODTL_CUT_TH +932 0x0258 //TX_MICMUTE_DT_CUT_K1 +933 0x0800 //TX_MICMUTE_N2_SN_EST +934 0xFC00 //TX_MICMUTE_THR_SN_EST_0 +935 0x001C //TX_MICMUTE_MIN_G_CTRL_0 +936 0x6000 //TX_MICMUTE_A_POST_FILT_S_0 +937 0x7000 //TX_MICMUTE_B_POST_FILT_0 +938 0x2710 //TX_MIC1RUB_AMP_THR +939 0x0010 //TX_MIC1MUTE_RATIO_THR +940 0x0450 //TX_MIC1MUTE_AMP_THR +941 0x0008 //TX_MIC1MUTE_CVG_TIME +942 0x0008 //TX_MIC1MUTE_RELEASE_TIME +943 0x0000 //TX_AMS_RESRV_01 +944 0x0000 //TX_AMS_RESRV_02 +945 0x0000 //TX_AMS_RESRV_03 +946 0x0000 //TX_AMS_RESRV_04 +947 0x0000 //TX_AMS_RESRV_05 +948 0x0000 //TX_AMS_RESRV_06 +949 0x0000 //TX_AMS_RESRV_07 +950 0x0000 //TX_AMS_RESRV_08 +951 0x0000 //TX_AMS_RESRV_09 +952 0x0000 //TX_AMS_RESRV_10 +953 0x0000 //TX_AMS_RESRV_11 +954 0x0000 //TX_AMS_RESRV_12 +955 0x0000 //TX_AMS_RESRV_13 +956 0x0000 //TX_AMS_RESRV_14 +957 0x0000 //TX_AMS_RESRV_15 +958 0x0000 //TX_AMS_RESRV_16 +959 0x0000 //TX_AMS_RESRV_17 +960 0x0000 //TX_AMS_RESRV_18 +961 0x0000 //TX_AMS_RESRV_19 #RX -0 0x002C //RX_RECVFUNC_MODE_0 +0 0x202C //RX_RECVFUNC_MODE_0 1 0x0000 //RX_RECVFUNC_MODE_1 2 0x0004 //RX_SAMPLINGFREQ_SIG 3 0x0004 //RX_SAMPLINGFREQ_PROC @@ -21050,18 +31191,869 @@ 110 0x0000 //RX_FDDRC_RESRV_0 129 0x0100 //RX_SPK_VOL 130 0x0000 //RX_VOL_RESRV_0 +#RX 2 +157 0x202C //RX_RECVFUNC_MODE_0 +158 0x0000 //RX_RECVFUNC_MODE_1 +159 0x0004 //RX_SAMPLINGFREQ_SIG +160 0x0004 //RX_SAMPLINGFREQ_PROC +161 0x000A //RX_FRAME_SZ +162 0x0000 //RX_DELAY_OPT +163 0x1000 //RX_TDDRC_ALPHA_UP_1 +164 0x1000 //RX_TDDRC_ALPHA_UP_2 +165 0x1000 //RX_TDDRC_ALPHA_UP_3 +166 0x1000 //RX_TDDRC_ALPHA_UP_4 +167 0x0800 //RX_PGA +168 0x7B02 //RX_A_HP +169 0x4000 //RX_B_PE +170 0x7800 //RX_THR_PITCH_DET_0 +171 0x7000 //RX_THR_PITCH_DET_1 +172 0x6000 //RX_THR_PITCH_DET_2 +173 0x0008 //RX_PITCH_BFR_LEN +174 0x0003 //RX_SBD_PITCH_DET +175 0x0100 //RX_PP_RESRV_0 +176 0x0020 //RX_PP_RESRV_1 +177 0x0500 //RX_N_SN_EST +178 0x000C //RX_N2_SN_EST +179 0x000A //RX_NS_LVL_CTRL +180 0xF600 //RX_THR_SN_EST +181 0x7000 //RX_LAMBDA_PFILT +182 0x000A //RX_FENS_RESRV_0 +183 0x0190 //RX_FENS_RESRV_1 +184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +187 0x0002 //RX_EXTRA_NS_L +188 0x0800 //RX_EXTRA_NS_A +189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +190 0x7FFF //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +192 0x199A //RX_A_POST_FLT +193 0x0000 //RX_LMT_THRD +194 0x4000 //RX_LMT_ALPHA +195 0x0020 //RX_FDEQ_SUBNUM +196 0x4848 //RX_FDEQ_GAIN_0 +197 0x4848 //RX_FDEQ_GAIN_1 +198 0x4848 //RX_FDEQ_GAIN_2 +199 0x4848 //RX_FDEQ_GAIN_3 +200 0x4848 //RX_FDEQ_GAIN_4 +201 0x4848 //RX_FDEQ_GAIN_5 +202 0x4848 //RX_FDEQ_GAIN_6 +203 0x4848 //RX_FDEQ_GAIN_7 +204 0x4848 //RX_FDEQ_GAIN_8 +205 0x4848 //RX_FDEQ_GAIN_9 +206 0x4848 //RX_FDEQ_GAIN_10 +207 0x4848 //RX_FDEQ_GAIN_11 +208 0x4848 //RX_FDEQ_GAIN_12 +209 0x4848 //RX_FDEQ_GAIN_13 +210 0x4848 //RX_FDEQ_GAIN_14 +211 0x4848 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0202 //RX_FDEQ_BIN_0 +221 0x0203 //RX_FDEQ_BIN_1 +222 0x0304 //RX_FDEQ_BIN_2 +223 0x0405 //RX_FDEQ_BIN_3 +224 0x0607 //RX_FDEQ_BIN_4 +225 0x0809 //RX_FDEQ_BIN_5 +226 0x0A0B //RX_FDEQ_BIN_6 +227 0x0C0D //RX_FDEQ_BIN_7 +228 0x0E0F //RX_FDEQ_BIN_8 +229 0x1011 //RX_FDEQ_BIN_9 +230 0x1214 //RX_FDEQ_BIN_10 +231 0x1618 //RX_FDEQ_BIN_11 +232 0x1C1C //RX_FDEQ_BIN_12 +233 0x2020 //RX_FDEQ_BIN_13 +234 0x2020 //RX_FDEQ_BIN_14 +235 0x2011 //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x4000 //RX_FDEQ_RESRV_0 +245 0x0320 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0030 //RX_FDDRC_BAND_MARGIN_1 +248 0x0050 //RX_FDDRC_BAND_MARGIN_2 +249 0x0080 //RX_FDDRC_BAND_MARGIN_3 +250 0x0007 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x5000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x6400 //RX_FDDRC_THRD_3_2 +258 0x6400 //RX_FDDRC_THRD_3_3 +259 0x2000 //RX_FDDRC_SLANT_0_0 +260 0x2000 //RX_FDDRC_SLANT_0_1 +261 0x2000 //RX_FDDRC_SLANT_0_2 +262 0x2000 //RX_FDDRC_SLANT_0_3 +263 0x5333 //RX_FDDRC_SLANT_1_0 +264 0x5333 //RX_FDDRC_SLANT_1_1 +265 0x5333 //RX_FDDRC_SLANT_1_2 +266 0x5333 //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +268 0x0002 //RX_FILTINDX +269 0x0000 //RX_TDDRC_THRD_0 +270 0x0000 //RX_TDDRC_THRD_1 +271 0x1200 //RX_TDDRC_THRD_2 +272 0x1900 //RX_TDDRC_THRD_3 +273 0x3000 //RX_TDDRC_SLANT_0 +274 0x6E00 //RX_TDDRC_SLANT_1 +275 0x1000 //RX_TDDRC_ALPHA_UP_0 +276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x199A //RX_TDDRC_HMNC_GAIN +279 0x0001 //RX_TDDRC_SMT_FLAG +280 0x0CCD //RX_TDDRC_SMT_W +281 0x0240 //RX_TDDRC_DRC_GAIN +282 0x7C00 //RX_LAMBDA_PKA_FP +283 0x2000 //RX_TPKA_FP +284 0x2000 //RX_MIN_G_FP +285 0x0080 //RX_MAX_G_FP +286 0x000B //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 +288 0x0000 //RX_MAXLEVEL_CNG +289 0x3000 //RX_BWE_UV_TH +290 0x3000 //RX_BWE_UV_TH2 +291 0x1800 //RX_BWE_UV_TH3 +292 0x1000 //RX_BWE_V_TH +293 0x04CD //RX_BWE_GAIN1_V_TH1 +294 0x0F33 //RX_BWE_GAIN1_V_TH2 +295 0x7333 //RX_BWE_UV_EQ +296 0x199A //RX_BWE_V_EQ +297 0x7333 //RX_BWE_TONE_TH +298 0x0004 //RX_BWE_UV_HOLD_T +299 0x6CCD //RX_BWE_GAIN2_ALPHA +300 0x799A //RX_BWE_GAIN3_ALPHA +301 0x001E //RX_BWE_CUTOFF +302 0x3000 //RX_BWE_GAINFILL +303 0x3200 //RX_BWE_MAXTH_TONE +304 0x2000 //RX_BWE_EQ_0 +305 0x2000 //RX_BWE_EQ_1 +306 0x2000 //RX_BWE_EQ_2 +307 0x2000 //RX_BWE_EQ_3 +308 0x2000 //RX_BWE_EQ_4 +309 0x2000 //RX_BWE_EQ_5 +310 0x2000 //RX_BWE_EQ_6 +311 0x0000 //RX_BWE_RESRV_0 +312 0x0000 //RX_BWE_RESRV_1 +313 0x0000 //RX_BWE_RESRV_2 +#VOL 0 +163 0x1000 //RX_TDDRC_ALPHA_UP_1 +164 0x1000 //RX_TDDRC_ALPHA_UP_2 +165 0x1000 //RX_TDDRC_ALPHA_UP_3 +166 0x1000 //RX_TDDRC_ALPHA_UP_4 +184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +190 0x7FFF //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +269 0x0000 //RX_TDDRC_THRD_0 +270 0x0000 //RX_TDDRC_THRD_1 +271 0x1200 //RX_TDDRC_THRD_2 +272 0x1900 //RX_TDDRC_THRD_3 +273 0x3000 //RX_TDDRC_SLANT_0 +274 0x6E00 //RX_TDDRC_SLANT_1 +275 0x1000 //RX_TDDRC_ALPHA_UP_0 +276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x199A //RX_TDDRC_HMNC_GAIN +279 0x0001 //RX_TDDRC_SMT_FLAG +280 0x0CCD //RX_TDDRC_SMT_W +281 0x0240 //RX_TDDRC_DRC_GAIN +195 0x0020 //RX_FDEQ_SUBNUM +196 0x4848 //RX_FDEQ_GAIN_0 +197 0x4848 //RX_FDEQ_GAIN_1 +198 0x4848 //RX_FDEQ_GAIN_2 +199 0x4848 //RX_FDEQ_GAIN_3 +200 0x4848 //RX_FDEQ_GAIN_4 +201 0x4848 //RX_FDEQ_GAIN_5 +202 0x4848 //RX_FDEQ_GAIN_6 +203 0x4848 //RX_FDEQ_GAIN_7 +204 0x4848 //RX_FDEQ_GAIN_8 +205 0x4848 //RX_FDEQ_GAIN_9 +206 0x4848 //RX_FDEQ_GAIN_10 +207 0x4848 //RX_FDEQ_GAIN_11 +208 0x4848 //RX_FDEQ_GAIN_12 +209 0x4848 //RX_FDEQ_GAIN_13 +210 0x4848 //RX_FDEQ_GAIN_14 +211 0x4848 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0202 //RX_FDEQ_BIN_0 +221 0x0203 //RX_FDEQ_BIN_1 +222 0x0304 //RX_FDEQ_BIN_2 +223 0x0405 //RX_FDEQ_BIN_3 +224 0x0607 //RX_FDEQ_BIN_4 +225 0x0809 //RX_FDEQ_BIN_5 +226 0x0A0B //RX_FDEQ_BIN_6 +227 0x0C0D //RX_FDEQ_BIN_7 +228 0x0E0F //RX_FDEQ_BIN_8 +229 0x1011 //RX_FDEQ_BIN_9 +230 0x1214 //RX_FDEQ_BIN_10 +231 0x1618 //RX_FDEQ_BIN_11 +232 0x1C1C //RX_FDEQ_BIN_12 +233 0x2020 //RX_FDEQ_BIN_13 +234 0x2020 //RX_FDEQ_BIN_14 +235 0x2011 //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x4000 //RX_FDEQ_RESRV_0 +245 0x0320 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0030 //RX_FDDRC_BAND_MARGIN_1 +248 0x0050 //RX_FDDRC_BAND_MARGIN_2 +249 0x0080 //RX_FDDRC_BAND_MARGIN_3 +250 0x0007 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x5000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x6400 //RX_FDDRC_THRD_3_2 +258 0x6400 //RX_FDDRC_THRD_3_3 +259 0x2000 //RX_FDDRC_SLANT_0_0 +260 0x2000 //RX_FDDRC_SLANT_0_1 +261 0x2000 //RX_FDDRC_SLANT_0_2 +262 0x2000 //RX_FDDRC_SLANT_0_3 +263 0x5333 //RX_FDDRC_SLANT_1_0 +264 0x5333 //RX_FDDRC_SLANT_1_1 +265 0x5333 //RX_FDDRC_SLANT_1_2 +266 0x5333 //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +286 0x000B //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 +#VOL 1 +163 0x1000 //RX_TDDRC_ALPHA_UP_1 +164 0x1000 //RX_TDDRC_ALPHA_UP_2 +165 0x1000 //RX_TDDRC_ALPHA_UP_3 +166 0x1000 //RX_TDDRC_ALPHA_UP_4 +184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +190 0x7FFF //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +269 0x0000 //RX_TDDRC_THRD_0 +270 0x0000 //RX_TDDRC_THRD_1 +271 0x1200 //RX_TDDRC_THRD_2 +272 0x1900 //RX_TDDRC_THRD_3 +273 0x3000 //RX_TDDRC_SLANT_0 +274 0x6E00 //RX_TDDRC_SLANT_1 +275 0x1000 //RX_TDDRC_ALPHA_UP_0 +276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x199A //RX_TDDRC_HMNC_GAIN +279 0x0001 //RX_TDDRC_SMT_FLAG +280 0x0CCD //RX_TDDRC_SMT_W +281 0x0240 //RX_TDDRC_DRC_GAIN +195 0x0020 //RX_FDEQ_SUBNUM +196 0x4848 //RX_FDEQ_GAIN_0 +197 0x4848 //RX_FDEQ_GAIN_1 +198 0x4848 //RX_FDEQ_GAIN_2 +199 0x4848 //RX_FDEQ_GAIN_3 +200 0x4848 //RX_FDEQ_GAIN_4 +201 0x4848 //RX_FDEQ_GAIN_5 +202 0x4848 //RX_FDEQ_GAIN_6 +203 0x4848 //RX_FDEQ_GAIN_7 +204 0x4848 //RX_FDEQ_GAIN_8 +205 0x4848 //RX_FDEQ_GAIN_9 +206 0x4848 //RX_FDEQ_GAIN_10 +207 0x4848 //RX_FDEQ_GAIN_11 +208 0x4848 //RX_FDEQ_GAIN_12 +209 0x4848 //RX_FDEQ_GAIN_13 +210 0x4848 //RX_FDEQ_GAIN_14 +211 0x4848 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0202 //RX_FDEQ_BIN_0 +221 0x0203 //RX_FDEQ_BIN_1 +222 0x0304 //RX_FDEQ_BIN_2 +223 0x0405 //RX_FDEQ_BIN_3 +224 0x0607 //RX_FDEQ_BIN_4 +225 0x0809 //RX_FDEQ_BIN_5 +226 0x0A0B //RX_FDEQ_BIN_6 +227 0x0C0D //RX_FDEQ_BIN_7 +228 0x0E0F //RX_FDEQ_BIN_8 +229 0x1011 //RX_FDEQ_BIN_9 +230 0x1214 //RX_FDEQ_BIN_10 +231 0x1618 //RX_FDEQ_BIN_11 +232 0x1C1C //RX_FDEQ_BIN_12 +233 0x2020 //RX_FDEQ_BIN_13 +234 0x2020 //RX_FDEQ_BIN_14 +235 0x2011 //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x4000 //RX_FDEQ_RESRV_0 +245 0x0320 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0030 //RX_FDDRC_BAND_MARGIN_1 +248 0x0050 //RX_FDDRC_BAND_MARGIN_2 +249 0x0080 //RX_FDDRC_BAND_MARGIN_3 +250 0x0007 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x5000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x6400 //RX_FDDRC_THRD_3_2 +258 0x6400 //RX_FDDRC_THRD_3_3 +259 0x2000 //RX_FDDRC_SLANT_0_0 +260 0x2000 //RX_FDDRC_SLANT_0_1 +261 0x2000 //RX_FDDRC_SLANT_0_2 +262 0x2000 //RX_FDDRC_SLANT_0_3 +263 0x5333 //RX_FDDRC_SLANT_1_0 +264 0x5333 //RX_FDDRC_SLANT_1_1 +265 0x5333 //RX_FDDRC_SLANT_1_2 +266 0x5333 //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +286 0x0013 //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 +#VOL 2 +163 0x1000 //RX_TDDRC_ALPHA_UP_1 +164 0x1000 //RX_TDDRC_ALPHA_UP_2 +165 0x1000 //RX_TDDRC_ALPHA_UP_3 +166 0x1000 //RX_TDDRC_ALPHA_UP_4 +184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +190 0x7FFF //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +269 0x0000 //RX_TDDRC_THRD_0 +270 0x0000 //RX_TDDRC_THRD_1 +271 0x1200 //RX_TDDRC_THRD_2 +272 0x1900 //RX_TDDRC_THRD_3 +273 0x3000 //RX_TDDRC_SLANT_0 +274 0x6E00 //RX_TDDRC_SLANT_1 +275 0x1000 //RX_TDDRC_ALPHA_UP_0 +276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x199A //RX_TDDRC_HMNC_GAIN +279 0x0001 //RX_TDDRC_SMT_FLAG +280 0x0CCD //RX_TDDRC_SMT_W +281 0x0240 //RX_TDDRC_DRC_GAIN +195 0x0020 //RX_FDEQ_SUBNUM +196 0x4848 //RX_FDEQ_GAIN_0 +197 0x4848 //RX_FDEQ_GAIN_1 +198 0x4848 //RX_FDEQ_GAIN_2 +199 0x4848 //RX_FDEQ_GAIN_3 +200 0x4848 //RX_FDEQ_GAIN_4 +201 0x4848 //RX_FDEQ_GAIN_5 +202 0x4848 //RX_FDEQ_GAIN_6 +203 0x4848 //RX_FDEQ_GAIN_7 +204 0x4848 //RX_FDEQ_GAIN_8 +205 0x4848 //RX_FDEQ_GAIN_9 +206 0x4848 //RX_FDEQ_GAIN_10 +207 0x4848 //RX_FDEQ_GAIN_11 +208 0x4848 //RX_FDEQ_GAIN_12 +209 0x4848 //RX_FDEQ_GAIN_13 +210 0x4848 //RX_FDEQ_GAIN_14 +211 0x4848 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0202 //RX_FDEQ_BIN_0 +221 0x0203 //RX_FDEQ_BIN_1 +222 0x0304 //RX_FDEQ_BIN_2 +223 0x0405 //RX_FDEQ_BIN_3 +224 0x0607 //RX_FDEQ_BIN_4 +225 0x0809 //RX_FDEQ_BIN_5 +226 0x0A0B //RX_FDEQ_BIN_6 +227 0x0C0D //RX_FDEQ_BIN_7 +228 0x0E0F //RX_FDEQ_BIN_8 +229 0x1011 //RX_FDEQ_BIN_9 +230 0x1214 //RX_FDEQ_BIN_10 +231 0x1618 //RX_FDEQ_BIN_11 +232 0x1C1C //RX_FDEQ_BIN_12 +233 0x2020 //RX_FDEQ_BIN_13 +234 0x2020 //RX_FDEQ_BIN_14 +235 0x2011 //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x4000 //RX_FDEQ_RESRV_0 +245 0x0320 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0030 //RX_FDDRC_BAND_MARGIN_1 +248 0x0050 //RX_FDDRC_BAND_MARGIN_2 +249 0x0080 //RX_FDDRC_BAND_MARGIN_3 +250 0x0007 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x5000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x6400 //RX_FDDRC_THRD_3_2 +258 0x6400 //RX_FDDRC_THRD_3_3 +259 0x2000 //RX_FDDRC_SLANT_0_0 +260 0x2000 //RX_FDDRC_SLANT_0_1 +261 0x2000 //RX_FDDRC_SLANT_0_2 +262 0x2000 //RX_FDDRC_SLANT_0_3 +263 0x5333 //RX_FDDRC_SLANT_1_0 +264 0x5333 //RX_FDDRC_SLANT_1_1 +265 0x5333 //RX_FDDRC_SLANT_1_2 +266 0x5333 //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +286 0x0020 //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 +#VOL 3 +163 0x1000 //RX_TDDRC_ALPHA_UP_1 +164 0x1000 //RX_TDDRC_ALPHA_UP_2 +165 0x1000 //RX_TDDRC_ALPHA_UP_3 +166 0x1000 //RX_TDDRC_ALPHA_UP_4 +184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +190 0x7FFF //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +269 0x0000 //RX_TDDRC_THRD_0 +270 0x0000 //RX_TDDRC_THRD_1 +271 0x1200 //RX_TDDRC_THRD_2 +272 0x1900 //RX_TDDRC_THRD_3 +273 0x3000 //RX_TDDRC_SLANT_0 +274 0x6E00 //RX_TDDRC_SLANT_1 +275 0x1000 //RX_TDDRC_ALPHA_UP_0 +276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x199A //RX_TDDRC_HMNC_GAIN +279 0x0001 //RX_TDDRC_SMT_FLAG +280 0x0CCD //RX_TDDRC_SMT_W +281 0x0240 //RX_TDDRC_DRC_GAIN +195 0x0020 //RX_FDEQ_SUBNUM +196 0x4848 //RX_FDEQ_GAIN_0 +197 0x4848 //RX_FDEQ_GAIN_1 +198 0x4848 //RX_FDEQ_GAIN_2 +199 0x4848 //RX_FDEQ_GAIN_3 +200 0x4848 //RX_FDEQ_GAIN_4 +201 0x4848 //RX_FDEQ_GAIN_5 +202 0x4848 //RX_FDEQ_GAIN_6 +203 0x4848 //RX_FDEQ_GAIN_7 +204 0x4848 //RX_FDEQ_GAIN_8 +205 0x4848 //RX_FDEQ_GAIN_9 +206 0x4848 //RX_FDEQ_GAIN_10 +207 0x4848 //RX_FDEQ_GAIN_11 +208 0x4848 //RX_FDEQ_GAIN_12 +209 0x4848 //RX_FDEQ_GAIN_13 +210 0x4848 //RX_FDEQ_GAIN_14 +211 0x4848 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0202 //RX_FDEQ_BIN_0 +221 0x0203 //RX_FDEQ_BIN_1 +222 0x0304 //RX_FDEQ_BIN_2 +223 0x0405 //RX_FDEQ_BIN_3 +224 0x0607 //RX_FDEQ_BIN_4 +225 0x0809 //RX_FDEQ_BIN_5 +226 0x0A0B //RX_FDEQ_BIN_6 +227 0x0C0D //RX_FDEQ_BIN_7 +228 0x0E0F //RX_FDEQ_BIN_8 +229 0x1011 //RX_FDEQ_BIN_9 +230 0x1214 //RX_FDEQ_BIN_10 +231 0x1618 //RX_FDEQ_BIN_11 +232 0x1C1C //RX_FDEQ_BIN_12 +233 0x2020 //RX_FDEQ_BIN_13 +234 0x2020 //RX_FDEQ_BIN_14 +235 0x2011 //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x4000 //RX_FDEQ_RESRV_0 +245 0x0320 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0030 //RX_FDDRC_BAND_MARGIN_1 +248 0x0050 //RX_FDDRC_BAND_MARGIN_2 +249 0x0080 //RX_FDDRC_BAND_MARGIN_3 +250 0x0007 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x5000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x6400 //RX_FDDRC_THRD_3_2 +258 0x6400 //RX_FDDRC_THRD_3_3 +259 0x2000 //RX_FDDRC_SLANT_0_0 +260 0x2000 //RX_FDDRC_SLANT_0_1 +261 0x2000 //RX_FDDRC_SLANT_0_2 +262 0x2000 //RX_FDDRC_SLANT_0_3 +263 0x5333 //RX_FDDRC_SLANT_1_0 +264 0x5333 //RX_FDDRC_SLANT_1_1 +265 0x5333 //RX_FDDRC_SLANT_1_2 +266 0x5333 //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +286 0x0036 //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 +#VOL 4 +163 0x1000 //RX_TDDRC_ALPHA_UP_1 +164 0x1000 //RX_TDDRC_ALPHA_UP_2 +165 0x1000 //RX_TDDRC_ALPHA_UP_3 +166 0x1000 //RX_TDDRC_ALPHA_UP_4 +184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +190 0x7FFF //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +269 0x0000 //RX_TDDRC_THRD_0 +270 0x0000 //RX_TDDRC_THRD_1 +271 0x1200 //RX_TDDRC_THRD_2 +272 0x1900 //RX_TDDRC_THRD_3 +273 0x3000 //RX_TDDRC_SLANT_0 +274 0x6E00 //RX_TDDRC_SLANT_1 +275 0x1000 //RX_TDDRC_ALPHA_UP_0 +276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x199A //RX_TDDRC_HMNC_GAIN +279 0x0001 //RX_TDDRC_SMT_FLAG +280 0x0CCD //RX_TDDRC_SMT_W +281 0x0240 //RX_TDDRC_DRC_GAIN +195 0x0020 //RX_FDEQ_SUBNUM +196 0x4848 //RX_FDEQ_GAIN_0 +197 0x4848 //RX_FDEQ_GAIN_1 +198 0x4848 //RX_FDEQ_GAIN_2 +199 0x4848 //RX_FDEQ_GAIN_3 +200 0x4848 //RX_FDEQ_GAIN_4 +201 0x4848 //RX_FDEQ_GAIN_5 +202 0x4848 //RX_FDEQ_GAIN_6 +203 0x4848 //RX_FDEQ_GAIN_7 +204 0x4848 //RX_FDEQ_GAIN_8 +205 0x4848 //RX_FDEQ_GAIN_9 +206 0x4848 //RX_FDEQ_GAIN_10 +207 0x4848 //RX_FDEQ_GAIN_11 +208 0x4848 //RX_FDEQ_GAIN_12 +209 0x4848 //RX_FDEQ_GAIN_13 +210 0x4848 //RX_FDEQ_GAIN_14 +211 0x4848 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0202 //RX_FDEQ_BIN_0 +221 0x0203 //RX_FDEQ_BIN_1 +222 0x0304 //RX_FDEQ_BIN_2 +223 0x0405 //RX_FDEQ_BIN_3 +224 0x0607 //RX_FDEQ_BIN_4 +225 0x0809 //RX_FDEQ_BIN_5 +226 0x0A0B //RX_FDEQ_BIN_6 +227 0x0C0D //RX_FDEQ_BIN_7 +228 0x0E0F //RX_FDEQ_BIN_8 +229 0x1011 //RX_FDEQ_BIN_9 +230 0x1214 //RX_FDEQ_BIN_10 +231 0x1618 //RX_FDEQ_BIN_11 +232 0x1C1C //RX_FDEQ_BIN_12 +233 0x2020 //RX_FDEQ_BIN_13 +234 0x2020 //RX_FDEQ_BIN_14 +235 0x2011 //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x4000 //RX_FDEQ_RESRV_0 +245 0x0320 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0030 //RX_FDDRC_BAND_MARGIN_1 +248 0x0050 //RX_FDDRC_BAND_MARGIN_2 +249 0x0080 //RX_FDDRC_BAND_MARGIN_3 +250 0x0007 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x5000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x6400 //RX_FDDRC_THRD_3_2 +258 0x6400 //RX_FDDRC_THRD_3_3 +259 0x2000 //RX_FDDRC_SLANT_0_0 +260 0x2000 //RX_FDDRC_SLANT_0_1 +261 0x2000 //RX_FDDRC_SLANT_0_2 +262 0x2000 //RX_FDDRC_SLANT_0_3 +263 0x5333 //RX_FDDRC_SLANT_1_0 +264 0x5333 //RX_FDDRC_SLANT_1_1 +265 0x5333 //RX_FDDRC_SLANT_1_2 +266 0x5333 //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +286 0x005B //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 +#VOL 5 +163 0x1000 //RX_TDDRC_ALPHA_UP_1 +164 0x1000 //RX_TDDRC_ALPHA_UP_2 +165 0x1000 //RX_TDDRC_ALPHA_UP_3 +166 0x1000 //RX_TDDRC_ALPHA_UP_4 +184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +190 0x7FFF //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +269 0x0000 //RX_TDDRC_THRD_0 +270 0x0000 //RX_TDDRC_THRD_1 +271 0x1200 //RX_TDDRC_THRD_2 +272 0x1900 //RX_TDDRC_THRD_3 +273 0x3000 //RX_TDDRC_SLANT_0 +274 0x6E00 //RX_TDDRC_SLANT_1 +275 0x1000 //RX_TDDRC_ALPHA_UP_0 +276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x199A //RX_TDDRC_HMNC_GAIN +279 0x0001 //RX_TDDRC_SMT_FLAG +280 0x0CCD //RX_TDDRC_SMT_W +281 0x0240 //RX_TDDRC_DRC_GAIN +195 0x0020 //RX_FDEQ_SUBNUM +196 0x4848 //RX_FDEQ_GAIN_0 +197 0x4848 //RX_FDEQ_GAIN_1 +198 0x4848 //RX_FDEQ_GAIN_2 +199 0x4848 //RX_FDEQ_GAIN_3 +200 0x4848 //RX_FDEQ_GAIN_4 +201 0x4848 //RX_FDEQ_GAIN_5 +202 0x4848 //RX_FDEQ_GAIN_6 +203 0x4848 //RX_FDEQ_GAIN_7 +204 0x4848 //RX_FDEQ_GAIN_8 +205 0x4848 //RX_FDEQ_GAIN_9 +206 0x4848 //RX_FDEQ_GAIN_10 +207 0x4848 //RX_FDEQ_GAIN_11 +208 0x4848 //RX_FDEQ_GAIN_12 +209 0x4848 //RX_FDEQ_GAIN_13 +210 0x4848 //RX_FDEQ_GAIN_14 +211 0x4848 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0202 //RX_FDEQ_BIN_0 +221 0x0203 //RX_FDEQ_BIN_1 +222 0x0304 //RX_FDEQ_BIN_2 +223 0x0405 //RX_FDEQ_BIN_3 +224 0x0607 //RX_FDEQ_BIN_4 +225 0x0809 //RX_FDEQ_BIN_5 +226 0x0A0B //RX_FDEQ_BIN_6 +227 0x0C0D //RX_FDEQ_BIN_7 +228 0x0E0F //RX_FDEQ_BIN_8 +229 0x1011 //RX_FDEQ_BIN_9 +230 0x1214 //RX_FDEQ_BIN_10 +231 0x1618 //RX_FDEQ_BIN_11 +232 0x1C1C //RX_FDEQ_BIN_12 +233 0x2020 //RX_FDEQ_BIN_13 +234 0x2020 //RX_FDEQ_BIN_14 +235 0x2011 //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x4000 //RX_FDEQ_RESRV_0 +245 0x0320 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0030 //RX_FDDRC_BAND_MARGIN_1 +248 0x0050 //RX_FDDRC_BAND_MARGIN_2 +249 0x0080 //RX_FDDRC_BAND_MARGIN_3 +250 0x0007 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x5000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x6400 //RX_FDDRC_THRD_3_2 +258 0x6400 //RX_FDDRC_THRD_3_3 +259 0x2000 //RX_FDDRC_SLANT_0_0 +260 0x2000 //RX_FDDRC_SLANT_0_1 +261 0x2000 //RX_FDDRC_SLANT_0_2 +262 0x2000 //RX_FDDRC_SLANT_0_3 +263 0x5333 //RX_FDDRC_SLANT_1_0 +264 0x5333 //RX_FDDRC_SLANT_1_1 +265 0x5333 //RX_FDDRC_SLANT_1_2 +266 0x5333 //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +286 0x0099 //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 +#VOL 6 +163 0x1000 //RX_TDDRC_ALPHA_UP_1 +164 0x1000 //RX_TDDRC_ALPHA_UP_2 +165 0x1000 //RX_TDDRC_ALPHA_UP_3 +166 0x1000 //RX_TDDRC_ALPHA_UP_4 +184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +190 0x7FFF //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +269 0x0000 //RX_TDDRC_THRD_0 +270 0x0000 //RX_TDDRC_THRD_1 +271 0x1200 //RX_TDDRC_THRD_2 +272 0x1900 //RX_TDDRC_THRD_3 +273 0x3000 //RX_TDDRC_SLANT_0 +274 0x6E00 //RX_TDDRC_SLANT_1 +275 0x1000 //RX_TDDRC_ALPHA_UP_0 +276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x199A //RX_TDDRC_HMNC_GAIN +279 0x0001 //RX_TDDRC_SMT_FLAG +280 0x0CCD //RX_TDDRC_SMT_W +281 0x0240 //RX_TDDRC_DRC_GAIN +195 0x0020 //RX_FDEQ_SUBNUM +196 0x4848 //RX_FDEQ_GAIN_0 +197 0x4848 //RX_FDEQ_GAIN_1 +198 0x4848 //RX_FDEQ_GAIN_2 +199 0x4848 //RX_FDEQ_GAIN_3 +200 0x4848 //RX_FDEQ_GAIN_4 +201 0x4848 //RX_FDEQ_GAIN_5 +202 0x4848 //RX_FDEQ_GAIN_6 +203 0x4848 //RX_FDEQ_GAIN_7 +204 0x4848 //RX_FDEQ_GAIN_8 +205 0x4848 //RX_FDEQ_GAIN_9 +206 0x4848 //RX_FDEQ_GAIN_10 +207 0x4848 //RX_FDEQ_GAIN_11 +208 0x4848 //RX_FDEQ_GAIN_12 +209 0x4848 //RX_FDEQ_GAIN_13 +210 0x4848 //RX_FDEQ_GAIN_14 +211 0x4848 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0202 //RX_FDEQ_BIN_0 +221 0x0203 //RX_FDEQ_BIN_1 +222 0x0304 //RX_FDEQ_BIN_2 +223 0x0405 //RX_FDEQ_BIN_3 +224 0x0607 //RX_FDEQ_BIN_4 +225 0x0809 //RX_FDEQ_BIN_5 +226 0x0A0B //RX_FDEQ_BIN_6 +227 0x0C0D //RX_FDEQ_BIN_7 +228 0x0E0F //RX_FDEQ_BIN_8 +229 0x1011 //RX_FDEQ_BIN_9 +230 0x1214 //RX_FDEQ_BIN_10 +231 0x1618 //RX_FDEQ_BIN_11 +232 0x1C1C //RX_FDEQ_BIN_12 +233 0x2020 //RX_FDEQ_BIN_13 +234 0x2020 //RX_FDEQ_BIN_14 +235 0x2011 //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x4000 //RX_FDEQ_RESRV_0 +245 0x0320 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0030 //RX_FDDRC_BAND_MARGIN_1 +248 0x0050 //RX_FDDRC_BAND_MARGIN_2 +249 0x0080 //RX_FDDRC_BAND_MARGIN_3 +250 0x0007 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x5000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x6400 //RX_FDDRC_THRD_3_2 +258 0x6400 //RX_FDDRC_THRD_3_3 +259 0x2000 //RX_FDDRC_SLANT_0_0 +260 0x2000 //RX_FDDRC_SLANT_0_1 +261 0x2000 //RX_FDDRC_SLANT_0_2 +262 0x2000 //RX_FDDRC_SLANT_0_3 +263 0x5333 //RX_FDDRC_SLANT_1_0 +264 0x5333 //RX_FDDRC_SLANT_1_1 +265 0x5333 //RX_FDDRC_SLANT_1_2 +266 0x5333 //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +286 0x0100 //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 #CASE_NAME HEADSET-GOOGLE_CONDOR_HEADPHONE-VOICE_GENERIC-NB -#PARAM_MODE FULL -#PARAM_TYPE TX+RX -#TOTAL_CUSTOM_STEP 7 +#PARAM_MODE Full +#PARAM_TYPE TX+2RX +#TOTAL_CUSTOM_STEP 7+7 #TX 0 0x0001 //TX_OPERATION_MODE_0 1 0x0001 //TX_OPERATION_MODE_1 2 0x0033 //TX_PATCH_REG -3 0x2F7C //TX_SENDFUNC_MODE_0 +3 0x6F7C //TX_SENDFUNC_MODE_0 4 0x0001 //TX_SENDFUNC_MODE_1 -5 0x0003 //TX_NUM_MIC +5 0x0002 //TX_NUM_MIC 6 0x0000 //TX_SAMPLINGFREQ_SIG 7 0x0000 //TX_SAMPLINGFREQ_PROC 8 0x000A //TX_FRAME_SZ_SIG @@ -21077,8 +32069,8 @@ 18 0x0000 //TX_SYS_RESRV_2 19 0x0000 //TX_SYS_RESRV_3 20 0x0000 //TX_DIST2REF0 -21 0x00A4 //TX_DIST2REF1 -22 0x0017 //TX_DIST2REF_02 +21 0x009D //TX_DIST2REF1 +22 0x0010 //TX_DIST2REF_02 23 0x0000 //TX_DIST2REF_03 24 0x0000 //TX_DIST2REF_04 25 0x0000 //TX_DIST2REF_05 @@ -21184,7 +32176,7 @@ 125 0x6000 //TX_C_POST_FLT_MIC_MAINBLK 126 0x6000 //TX_C_POST_FLT_MIC_REFBLK 127 0x0010 //TX_MIC_BLOCK_N -128 0x7652 //TX_A_HP +128 0x7646 //TX_A_HP 129 0x4000 //TX_B_PE 130 0x5000 //TX_THR_PITCH_DET_0 131 0x4800 //TX_THR_PITCH_DET_1 @@ -21223,7 +32215,7 @@ 164 0x7FFF //TX_MIN_EQ_RE_EST_12 165 0x2000 //TX_LAMBDA_RE_EST 166 0x0000 //TX_LAMBDA_CB_NLE -167 0x7FFF //TX_C_POST_FLT +167 0x4000 //TX_C_POST_FLT 168 0x2000 //TX_GAIN_NP 169 0x0180 //TX_SE_HOLD_N 170 0x00C8 //TX_DT_HOLD_N @@ -21253,14 +32245,14 @@ 194 0x0000 //TX_NORMENERTH 195 0x0000 //TX_NORMENERHIGHTH 196 0x0000 //TX_NORMENERHIGHTHL -197 0x6590 //TX_DTD_THR1_0 -198 0x6590 //TX_DTD_THR1_1 -199 0x6590 //TX_DTD_THR1_2 +197 0x7FF0 //TX_DTD_THR1_0 +198 0x7FF0 //TX_DTD_THR1_1 +199 0x7FF0 //TX_DTD_THR1_2 200 0x7FF0 //TX_DTD_THR1_3 201 0x7FF0 //TX_DTD_THR1_4 202 0x7FF0 //TX_DTD_THR1_5 203 0x7FF0 //TX_DTD_THR1_6 -204 0x0CCD //TX_DTD_THR2_0 +204 0x7E00 //TX_DTD_THR2_0 205 0x0CCD //TX_DTD_THR2_1 206 0x0CCD //TX_DTD_THR2_2 207 0x0CCD //TX_DTD_THR2_3 @@ -21269,7 +32261,7 @@ 210 0x0CCD //TX_DTD_THR2_6 211 0x7FFF //TX_DTD_THR3 212 0x0000 //TX_SPK_CUT_K -213 0x157C //TX_DT_CUT_K +213 0x1F40 //TX_DT_CUT_K 214 0x0100 //TX_DT_CUT_THR 215 0x04EB //TX_COMFORT_G 216 0x01F4 //TX_POWER_YOUT_TH @@ -21279,18 +32271,18 @@ 220 0x0000 //TX_DTD_MIC_BLK 221 0x1000 //TX_ADPT_STRICT_L 222 0x1000 //TX_ADPT_STRICT_H -223 0x0BB8 //TX_RATIO_DT_L_TH_LOW +223 0x0001 //TX_RATIO_DT_L_TH_LOW 224 0x3A98 //TX_RATIO_DT_H_TH_LOW -225 0x1770 //TX_RATIO_DT_L_TH_HIGH +225 0x0640 //TX_RATIO_DT_L_TH_HIGH 226 0x4E20 //TX_RATIO_DT_H_TH_HIGH -227 0x09C4 //TX_RATIO_DT_L0_TH -228 0x0800 //TX_B_POST_FILT_ECHO_L +227 0x0001 //TX_RATIO_DT_L0_TH +228 0x7FFF //TX_B_POST_FILT_ECHO_L 229 0x2000 //TX_B_POST_FILT_ECHO_H 230 0x0200 //TX_MIN_G_CTRL_ECHO 231 0x1000 //TX_B_LESSCUT_RTO_ECHO 232 0x0000 //TX_EPD_OFFSET_00 233 0x0000 //TX_EPD_OFFST_01 -234 0x1388 //TX_RATIO_DT_L0_TH_HIGH +234 0x05DC //TX_RATIO_DT_L0_TH_HIGH 235 0x3A98 //TX_RATIO_DT_H_TH_CUT 236 0x7FFF //TX_MIN_EQ_RE_EST_13 237 0x0000 //TX_DTD_THR1_7 @@ -21298,7 +32290,7 @@ 239 0x0800 //TX_DT_RESRV_7 240 0x0800 //TX_DT_RESRV_8 241 0x0000 //TX_DT_RESRV_9 -242 0xF800 //TX_THR_SN_EST_0 +242 0xFA00 //TX_THR_SN_EST_0 243 0xFA00 //TX_THR_SN_EST_1 244 0xFA00 //TX_THR_SN_EST_2 245 0xF900 //TX_THR_SN_EST_3 @@ -21307,12 +32299,12 @@ 248 0xF800 //TX_THR_SN_EST_6 249 0xF800 //TX_THR_SN_EST_7 250 0x0050 //TX_DELTA_THR_SN_EST_0 -251 0x01A0 //TX_DELTA_THR_SN_EST_1 +251 0x0200 //TX_DELTA_THR_SN_EST_1 252 0x0200 //TX_DELTA_THR_SN_EST_2 -253 0x0200 //TX_DELTA_THR_SN_EST_3 -254 0x0100 //TX_DELTA_THR_SN_EST_4 +253 0x0100 //TX_DELTA_THR_SN_EST_3 +254 0x0200 //TX_DELTA_THR_SN_EST_4 255 0x0200 //TX_DELTA_THR_SN_EST_5 -256 0x0200 //TX_DELTA_THR_SN_EST_6 +256 0x01A0 //TX_DELTA_THR_SN_EST_6 257 0x0200 //TX_DELTA_THR_SN_EST_7 258 0x4000 //TX_LAMBDA_NN_EST_0 259 0x4000 //TX_LAMBDA_NN_EST_1 @@ -21339,28 +32331,28 @@ 280 0x1000 //TX_B_POST_FLT_1 281 0x0010 //TX_NS_LVL_CTRL_0 282 0x0012 //TX_NS_LVL_CTRL_1 -283 0x0017 //TX_NS_LVL_CTRL_2 -284 0x0015 //TX_NS_LVL_CTRL_3 +283 0x0015 //TX_NS_LVL_CTRL_2 +284 0x0012 //TX_NS_LVL_CTRL_3 285 0x0012 //TX_NS_LVL_CTRL_4 -286 0x0012 //TX_NS_LVL_CTRL_5 -287 0x0011 //TX_NS_LVL_CTRL_6 +286 0x0011 //TX_NS_LVL_CTRL_5 +287 0x0012 //TX_NS_LVL_CTRL_6 288 0x0011 //TX_NS_LVL_CTRL_7 289 0x000F //TX_MIN_GAIN_S_0 -290 0x000F //TX_MIN_GAIN_S_1 -291 0x000D //TX_MIN_GAIN_S_2 +290 0x000D //TX_MIN_GAIN_S_1 +291 0x000F //TX_MIN_GAIN_S_2 292 0x000F //TX_MIN_GAIN_S_3 293 0x000F //TX_MIN_GAIN_S_4 -294 0x000F //TX_MIN_GAIN_S_5 -295 0x0010 //TX_MIN_GAIN_S_6 +294 0x0010 //TX_MIN_GAIN_S_5 +295 0x000F //TX_MIN_GAIN_S_6 296 0x000F //TX_MIN_GAIN_S_7 297 0x4000 //TX_NMOS_SUP 298 0x0000 //TX_NS_MAX_PRI_SNR_TH 299 0x0000 //TX_NMOS_SUP_MENSA 300 0x7FFF //TX_SNRI_SUP_0 -301 0x4000 //TX_SNRI_SUP_1 -302 0x1000 //TX_SNRI_SUP_2 -303 0x4000 //TX_SNRI_SUP_3 -304 0x2400 //TX_SNRI_SUP_4 +301 0x3000 //TX_SNRI_SUP_1 +302 0x4000 //TX_SNRI_SUP_2 +303 0x2400 //TX_SNRI_SUP_3 +304 0x4000 //TX_SNRI_SUP_4 305 0x4000 //TX_SNRI_SUP_5 306 0x4000 //TX_SNRI_SUP_6 307 0x7FFF //TX_SNRI_SUP_7 @@ -21371,19 +32363,19 @@ 312 0x7FFF //TX_A_POST_FILT_0 313 0x2000 //TX_A_POST_FILT_1 314 0x4000 //TX_A_POST_FILT_S_0 -315 0x5000 //TX_A_POST_FILT_S_1 -316 0x2000 //TX_A_POST_FILT_S_2 -317 0x4000 //TX_A_POST_FILT_S_3 -318 0x1000 //TX_A_POST_FILT_S_4 -319 0x3000 //TX_A_POST_FILT_S_5 +315 0x2000 //TX_A_POST_FILT_S_1 +316 0x4000 //TX_A_POST_FILT_S_2 +317 0x1000 //TX_A_POST_FILT_S_3 +318 0x3000 //TX_A_POST_FILT_S_4 +319 0x5000 //TX_A_POST_FILT_S_5 320 0x5000 //TX_A_POST_FILT_S_6 321 0x7000 //TX_A_POST_FILT_S_7 322 0x1000 //TX_B_POST_FILT_0 323 0x1000 //TX_B_POST_FILT_1 324 0x1000 //TX_B_POST_FILT_2 -325 0x1000 //TX_B_POST_FILT_3 -326 0x5000 //TX_B_POST_FILT_4 -327 0x3000 //TX_B_POST_FILT_5 +325 0x5000 //TX_B_POST_FILT_3 +326 0x3000 //TX_B_POST_FILT_4 +327 0x1000 //TX_B_POST_FILT_5 328 0x1000 //TX_B_POST_FILT_6 329 0x2000 //TX_B_POST_FILT_7 330 0x4000 //TX_B_LESSCUT_RTO_S_0 @@ -21396,12 +32388,12 @@ 337 0x7FFF //TX_B_LESSCUT_RTO_S_7 338 0x7E00 //TX_LAMBDA_PFILT 339 0x7D00 //TX_LAMBDA_PFILT_S_0 -340 0x7900 //TX_LAMBDA_PFILT_S_1 -341 0x7400 //TX_LAMBDA_PFILT_S_2 -342 0x7900 //TX_LAMBDA_PFILT_S_3 -343 0x7000 //TX_LAMBDA_PFILT_S_4 +340 0x7C00 //TX_LAMBDA_PFILT_S_1 +341 0x7900 //TX_LAMBDA_PFILT_S_2 +342 0x7000 //TX_LAMBDA_PFILT_S_3 +343 0x7D00 //TX_LAMBDA_PFILT_S_4 344 0x7D00 //TX_LAMBDA_PFILT_S_5 -345 0x7D00 //TX_LAMBDA_PFILT_S_6 +345 0x7900 //TX_LAMBDA_PFILT_S_6 346 0x7D00 //TX_LAMBDA_PFILT_S_7 347 0x0200 //TX_K_PEPPER 348 0x0800 //TX_A_PEPPER @@ -21410,20 +32402,20 @@ 351 0x0001 //TX_HMNC_BST_FLG 352 0x0200 //TX_HMNC_BST_THR 353 0x0800 //TX_DT_BINVAD_TH_0 -354 0x0800 //TX_DT_BINVAD_TH_1 -355 0x0800 //TX_DT_BINVAD_TH_2 +354 0x0100 //TX_DT_BINVAD_TH_1 +355 0x0100 //TX_DT_BINVAD_TH_2 356 0x0800 //TX_DT_BINVAD_TH_3 357 0x0FA0 //TX_DT_BINVAD_ENDF -358 0x0400 //TX_C_POST_FLT_DT +358 0x7000 //TX_C_POST_FLT_DT 359 0x4000 //TX_NS_B_POST_FLT_LESSCUT -360 0x0100 //TX_DT_BOOST +360 0x01B0 //TX_DT_BOOST 361 0x0000 //TX_BF_SGRAD_FLG 362 0x0005 //TX_BF_DVG_TH 363 0x001E //TX_SN_C_F 364 0x0000 //TX_K_APT 365 0x0001 //TX_NOISEDET 366 0x0064 //TX_NDETCT -367 0x0050 //TX_NOISE_TH_0 +367 0x003B //TX_NOISE_TH_0 368 0x7FFF //TX_NOISE_TH_0_2 369 0x7FFF //TX_NOISE_TH_0_3 370 0x07D0 //TX_NOISE_TH_1 @@ -21435,11 +32427,11 @@ 376 0x0000 //TX_NOISE_TH_5_3 377 0x7FFF //TX_NOISE_TH_5_4 378 0x0FA0 //TX_NOISE_TH_6 -379 0x000A //TX_MINENOISE_TH -380 0x4000 //TX_MINENOISE_MIC0_TH_MTS -381 0xFFEE //TX_MINENOISE_MIC0_TH_EXP -382 0x6000 //TX_MINENOISE_MIC0_S_TH_MTS -383 0xFFF3 //TX_MINENOISE_MIC0_S_TH_EXP +379 0x00C8 //TX_MINENOISE_TH +380 0xD508 //TX_MORENS_TFMASK_TH +381 0x0001 //TX_DRC_QUIET_FLOOR +382 0x3A98 //TX_RATIODTL_CUT_TH +383 0x0DAC //TX_DT_CUT_K1 384 0x0666 //TX_OUT_ENER_S_TH_CLEAN 385 0x0666 //TX_OUT_ENER_S_TH_LESSCLEAN 386 0x0333 //TX_OUT_ENER_S_TH_NOISY @@ -21447,22 +32439,22 @@ 388 0x1000 //TX_OUT_ENER_TH_SPEECH 389 0x2000 //TX_SN_NPB_GAIN 390 0x0000 //TX_NN_NPB_GAIN -391 0x0000 //TX_CSX_ALPHA_0 -392 0x0000 //TX_CSX_ALPHA_1 -393 0x0000 //TX_CSX_ALPHA_2 -394 0x0000 //TX_CSX_ALPHA_3 -395 0x0800 //TX_MU_ARSP_EST -396 0x00C8 //TX_P_OUTBEAM_MIN_TH +391 0x7FFF //TX_POST_MASK_SUP_HSNE +392 0x1388 //TX_TAIL_DET_TH +393 0x4000 //TX_B_LESSCUT_RTO_WTA +394 0x0000 //TX_MEL_G_R +395 0x0080 //TX_SUPHIGH_TH +396 0x0000 //TX_MASK_G_R 397 0x0002 //TX_EXTRA_NS_L -398 0x0800 //TX_EXTRA_NS_A -399 0x0005 //TX_VR_NOISE_FLOOR_TH +398 0x1800 //TX_C_POST_FLT_MASK +399 0x7FFF //TX_A_POST_FLT_WNS 400 0x0148 //TX_MIN_G_LOW300HZ -401 0x0001 //TX_MAXLEVEL_CNG +401 0x0004 //TX_MAXLEVEL_CNG 402 0x00B4 //TX_STN_NOISE_TH 403 0x4000 //TX_POST_MASK_SUP 404 0x7FFF //TX_POST_MASK_ADJUST 405 0x00C8 //TX_NS_ENOISE_MIC0_TH -406 0x000A //TX_MINENOISE_MIC0_TH +406 0x0032 //TX_MINENOISE_MIC0_TH 407 0x012C //TX_MINENOISE_MIC0_S_TH 408 0x7FFF //TX_MIN_G_CTRL_SSNS 409 0x0000 //TX_METAL_RTO_THR @@ -21570,16 +32562,16 @@ 511 0x6666 //TX_MIC_TO_BFGAIN 512 0x0000 //TX_MICTOBFGAIN0 513 0x0000 //TX_FASTMUE_TH -514 0x0000 //TX_DERVB_LEN_0 -515 0x0000 //TX_DERVB_LEN_1 -516 0x0000 //TX_RHO_DERVB -517 0x0000 //TX_MIC_INDX_DERVB -518 0x0000 //TX_MU_DERVB -519 0x0000 //TX_DR_RESRV_0 -520 0x0000 //TX_DR_RESRV_1 -521 0x0000 //TX_DR_RESRV_2 -522 0x0000 //TX_DR_RESRV_3 -523 0x0000 //TX_DR_RESRV_4 +514 0xC000 //TX_DEREVERB_LF_MU +515 0xC000 //TX_DEREVERB_HF_MU +516 0xCCCC //TX_DEREVERB_DELAY +517 0xD999 //TX_DEREVERB_COEF_LEN +518 0x1F40 //TX_DEREVERB_DNR +519 0x0000 //TX_DEREVERB_ALPHA +520 0x0000 //TX_DEREVERB_BETA +521 0x0000 //TX_GSC_RTOL_TH +522 0x7000 //TX_GSC_RTOH_TH +523 0x0064 //TX_WIDE2_MEANHTH 524 0x0000 //TX_DR_RESRV_5 525 0x0000 //TX_DR_RESRV_6 526 0x0000 //TX_DR_RESRV_7 @@ -21623,16 +32615,16 @@ 564 0x0000 //TX_PB_RESRV_0 565 0x0000 //TX_PB_RESRV_1 566 0x0014 //TX_FDEQ_SUBNUM -567 0x5858 //TX_FDEQ_GAIN_0 -568 0x5850 //TX_FDEQ_GAIN_1 -569 0x5050 //TX_FDEQ_GAIN_2 -570 0x5048 //TX_FDEQ_GAIN_3 -571 0x3C48 //TX_FDEQ_GAIN_4 -572 0x3C48 //TX_FDEQ_GAIN_5 -573 0x4848 //TX_FDEQ_GAIN_6 -574 0x4842 //TX_FDEQ_GAIN_7 -575 0x3030 //TX_FDEQ_GAIN_8 -576 0x3030 //TX_FDEQ_GAIN_9 +567 0x5050 //TX_FDEQ_GAIN_0 +568 0x5048 //TX_FDEQ_GAIN_1 +569 0x4848 //TX_FDEQ_GAIN_2 +570 0x483C //TX_FDEQ_GAIN_3 +571 0x3034 //TX_FDEQ_GAIN_4 +572 0x3048 //TX_FDEQ_GAIN_5 +573 0x4840 //TX_FDEQ_GAIN_6 +574 0x403C //TX_FDEQ_GAIN_7 +575 0x262C //TX_FDEQ_GAIN_8 +576 0x3A3C //TX_FDEQ_GAIN_9 577 0x4848 //TX_FDEQ_GAIN_10 578 0x4848 //TX_FDEQ_GAIN_11 579 0x4848 //TX_FDEQ_GAIN_12 @@ -21656,7 +32648,7 @@ 597 0x0708 //TX_FDEQ_BIN_6 598 0x090A //TX_FDEQ_BIN_7 599 0x0B0C //TX_FDEQ_BIN_8 -600 0x0D08 //TX_FDEQ_BIN_9 +600 0x0D0E //TX_FDEQ_BIN_9 601 0x0000 //TX_FDEQ_BIN_10 602 0x0000 //TX_FDEQ_BIN_11 603 0x0000 //TX_FDEQ_BIN_12 @@ -21680,9 +32672,9 @@ 621 0x4848 //TX_PREEQ_GAIN_MIC0_4 622 0x4848 //TX_PREEQ_GAIN_MIC0_5 623 0x4848 //TX_PREEQ_GAIN_MIC0_6 -624 0x484A //TX_PREEQ_GAIN_MIC0_7 -625 0x4B4E //TX_PREEQ_GAIN_MIC0_8 -626 0x5054 //TX_PREEQ_GAIN_MIC0_9 +624 0x4848 //TX_PREEQ_GAIN_MIC0_7 +625 0x4A4C //TX_PREEQ_GAIN_MIC0_8 +626 0x4E50 //TX_PREEQ_GAIN_MIC0_9 627 0x4848 //TX_PREEQ_GAIN_MIC0_10 628 0x4848 //TX_PREEQ_GAIN_MIC0_11 629 0x4848 //TX_PREEQ_GAIN_MIC0_12 @@ -21706,7 +32698,7 @@ 647 0x0708 //TX_PREEQ_BIN_MIC0_6 648 0x090A //TX_PREEQ_BIN_MIC0_7 649 0x0B0C //TX_PREEQ_BIN_MIC0_8 -650 0x0D08 //TX_PREEQ_BIN_MIC0_9 +650 0x0D0E //TX_PREEQ_BIN_MIC0_9 651 0x0000 //TX_PREEQ_BIN_MIC0_10 652 0x0000 //TX_PREEQ_BIN_MIC0_11 653 0x0000 //TX_PREEQ_BIN_MIC0_12 @@ -21729,9 +32721,9 @@ 670 0x4848 //TX_PREEQ_GAIN_MIC1_4 671 0x4848 //TX_PREEQ_GAIN_MIC1_5 672 0x4848 //TX_PREEQ_GAIN_MIC1_6 -673 0x4848 //TX_PREEQ_GAIN_MIC1_7 -674 0x4848 //TX_PREEQ_GAIN_MIC1_8 -675 0x4848 //TX_PREEQ_GAIN_MIC1_9 +673 0x4846 //TX_PREEQ_GAIN_MIC1_7 +674 0x4544 //TX_PREEQ_GAIN_MIC1_8 +675 0x4241 //TX_PREEQ_GAIN_MIC1_9 676 0x4848 //TX_PREEQ_GAIN_MIC1_10 677 0x4848 //TX_PREEQ_GAIN_MIC1_11 678 0x4848 //TX_PREEQ_GAIN_MIC1_12 @@ -21746,16 +32738,16 @@ 687 0x4848 //TX_PREEQ_GAIN_MIC1_21 688 0x4848 //TX_PREEQ_GAIN_MIC1_22 689 0x4848 //TX_PREEQ_GAIN_MIC1_23 -690 0x251A //TX_PREEQ_BIN_MIC1_0 -691 0x0F0F //TX_PREEQ_BIN_MIC1_1 -692 0x0C08 //TX_PREEQ_BIN_MIC1_2 -693 0x0700 //TX_PREEQ_BIN_MIC1_3 -694 0x0000 //TX_PREEQ_BIN_MIC1_4 -695 0x0000 //TX_PREEQ_BIN_MIC1_5 -696 0x0000 //TX_PREEQ_BIN_MIC1_6 -697 0x0000 //TX_PREEQ_BIN_MIC1_7 -698 0x0000 //TX_PREEQ_BIN_MIC1_8 -699 0x0000 //TX_PREEQ_BIN_MIC1_9 +690 0x0202 //TX_PREEQ_BIN_MIC1_0 +691 0x0203 //TX_PREEQ_BIN_MIC1_1 +692 0x0303 //TX_PREEQ_BIN_MIC1_2 +693 0x0304 //TX_PREEQ_BIN_MIC1_3 +694 0x0405 //TX_PREEQ_BIN_MIC1_4 +695 0x0506 //TX_PREEQ_BIN_MIC1_5 +696 0x0708 //TX_PREEQ_BIN_MIC1_6 +697 0x090A //TX_PREEQ_BIN_MIC1_7 +698 0x0B0C //TX_PREEQ_BIN_MIC1_8 +699 0x0D0E //TX_PREEQ_BIN_MIC1_9 700 0x0000 //TX_PREEQ_BIN_MIC1_10 701 0x0000 //TX_PREEQ_BIN_MIC1_11 702 0x0000 //TX_PREEQ_BIN_MIC1_12 @@ -21795,7 +32787,7 @@ 736 0x4848 //TX_PREEQ_GAIN_MIC2_21 737 0x4848 //TX_PREEQ_GAIN_MIC2_22 738 0x4848 //TX_PREEQ_GAIN_MIC2_23 -739 0x7800 //TX_PREEQ_BIN_MIC2_0 +739 0x0000 //TX_PREEQ_BIN_MIC2_0 740 0x0000 //TX_PREEQ_BIN_MIC2_1 741 0x0000 //TX_PREEQ_BIN_MIC2_2 742 0x0000 //TX_PREEQ_BIN_MIC2_3 @@ -21847,7 +32839,7 @@ 788 0x7EB8 //TX_TDDRC_ALPHA_DWN_02 789 0x7EB8 //TX_TDDRC_ALPHA_DWN_03 790 0x7EB8 //TX_TDDRC_ALPHA_DWN_04 -791 0x7FFF //TX_TDDRC_TD_DRC_LIMIT +791 0x7214 //TX_TDDRC_TD_DRC_LIMIT 792 0x0800 //TX_TDDRC_POST_LIMIT_GAIN 793 0x0000 //TX_TDDRC_RESRV_0 794 0x0000 //TX_TDDRC_RESRV_1 @@ -21914,15 +32906,15 @@ 855 0x0010 //TX_TDDRC_THRD_1 856 0x1800 //TX_TDDRC_THRD_2 857 0x1800 //TX_TDDRC_THRD_3 -858 0x6000 //TX_TDDRC_SLANT_0 -859 0x6000 //TX_TDDRC_SLANT_1 +858 0x7FFF //TX_TDDRC_SLANT_0 +859 0x7FFF //TX_TDDRC_SLANT_1 860 0x4000 //TX_TDDRC_ALPHA_UP_00 861 0x6000 //TX_TDDRC_ALPHA_DWN_00 862 0x0000 //TX_TDDRC_HMNC_FLAG 863 0x199A //TX_TDDRC_HMNC_GAIN 864 0x0000 //TX_TDDRC_SMT_FLAG 865 0x0CCD //TX_TDDRC_SMT_W -866 0x0BE3 //TX_TDDRC_DRC_GAIN +866 0x0A00 //TX_TDDRC_DRC_GAIN 867 0x7FFF //TX_TDDRC_LMT_THRD 868 0x0000 //TX_TDDRC_LMT_ALPHA 869 0x0000 //TX_TFMASKLTH @@ -21947,14 +32939,79 @@ 888 0x0028 //TX_FASTNS_ARSPC_TH 889 0xC000 //TX_FASTNS_MASK5_TH 890 0x4848 //TX_POSTSSA_MIN_G_VR_MASK -891 0x7FFF //TX_A_LESSCUT_RTO_MASK +891 0x4000 //TX_A_LESSCUT_RTO_MASK 892 0x1770 //TX_FASTNS_NOISETH 893 0xC000 //TX_FASTNS_SSA_THLFL 894 0xC000 //TX_FASTNS_SSA_THHFL 895 0xCCCC //TX_FASTNS_SSA_THLFH 896 0xD999 //TX_FASTNS_SSA_THHFH +897 0x2339 //TX_SENDFUNC_REG_MICMUTE +898 0x0021 //TX_SENDFUNC_REG_MICMUTE1 +899 0x02BC //TX_MICMUTE_RATIO_THR +900 0x0140 //TX_MICMUTE_AMP_THR +901 0x0004 //TX_MICMUTE_HPF_IND +902 0x00C0 //TX_MICMUTE_LOG_EYR_TH +903 0x0008 //TX_MICMUTE_CVG_TIME +904 0x0008 //TX_MICMUTE_RELEASE_TIME +905 0x01FE //TX_MIC_VOLUME_MIC0MUTE +906 0x0020 //TX_MICMUTE_EPD_OFFSET_0 +907 0x001E //TX_MICMUTE_FRQ_AEC_L +908 0x7999 //TX_MICMUTE_EAD_THR +909 0x7FFF //TX_MICMUTE_LAMBDA_CB_NLE +910 0x7FFF //TX_MICMUTE_LAMBDA_RE_EST +911 0x4000 //TX_DTD_THR1_MICMUTE_0 +912 0x7000 //TX_DTD_THR1_MICMUTE_1 +913 0x7FFF //TX_DTD_THR1_MICMUTE_2 +914 0x7FFF //TX_DTD_THR1_MICMUTE_3 +915 0x6CCC //TX_DTD_THR2_MICMUTE_0 +916 0x0400 //TX_MICMUTE_MIN_EQ_RE_EST_0 +917 0x0400 //TX_MICMUTE_MIN_EQ_RE_EST_1 +918 0x1000 //TX_MICMUTE_MIN_EQ_RE_EST_2 +919 0x7FFF //TX_MICMUTE_MIN_EQ_RE_EST_3 +920 0x7FFF //TX_MICMUTE_MIN_EQ_RE_EST_4 +921 0x4000 //TX_MICMUTE_C_POST_FLT +922 0x03E8 //TX_MICMUTE_DT_CUT_K +923 0x0001 //TX_MICMUTE_DT_CUT_THR +924 0x03E8 //TX_MICMUTE_DT_CUT_K2 +925 0x0001 //TX_MICMUTE_DT_CUT_THR2 +926 0x0064 //TX_MICMUTE_DT2_HOLD_N +927 0x1000 //TX_MICMUTE_RATIODTH_THCUT +928 0x1000 //TX_MICMUTE_B_POST_FLT_ECHOL +929 0x7FFF //TX_MICMUTE_B_POST_FLT_ECHOH +930 0x0400 //TX_MICMUTE_C_POST_FLT_MASK +931 0x7999 //TX_MICMUTE_RATIODTL_CUT_TH +932 0x0258 //TX_MICMUTE_DT_CUT_K1 +933 0x0800 //TX_MICMUTE_N2_SN_EST +934 0xFC00 //TX_MICMUTE_THR_SN_EST_0 +935 0x001C //TX_MICMUTE_MIN_G_CTRL_0 +936 0x6000 //TX_MICMUTE_A_POST_FILT_S_0 +937 0x7000 //TX_MICMUTE_B_POST_FILT_0 +938 0x2710 //TX_MIC1RUB_AMP_THR +939 0x0010 //TX_MIC1MUTE_RATIO_THR +940 0x0450 //TX_MIC1MUTE_AMP_THR +941 0x0008 //TX_MIC1MUTE_CVG_TIME +942 0x0008 //TX_MIC1MUTE_RELEASE_TIME +943 0x0000 //TX_AMS_RESRV_01 +944 0x0000 //TX_AMS_RESRV_02 +945 0x0000 //TX_AMS_RESRV_03 +946 0x0000 //TX_AMS_RESRV_04 +947 0x0000 //TX_AMS_RESRV_05 +948 0x0000 //TX_AMS_RESRV_06 +949 0x0000 //TX_AMS_RESRV_07 +950 0x0000 //TX_AMS_RESRV_08 +951 0x0000 //TX_AMS_RESRV_09 +952 0x0000 //TX_AMS_RESRV_10 +953 0x0000 //TX_AMS_RESRV_11 +954 0x0000 //TX_AMS_RESRV_12 +955 0x0000 //TX_AMS_RESRV_13 +956 0x0000 //TX_AMS_RESRV_14 +957 0x0000 //TX_AMS_RESRV_15 +958 0x0000 //TX_AMS_RESRV_16 +959 0x0000 //TX_AMS_RESRV_17 +960 0x0000 //TX_AMS_RESRV_18 +961 0x0000 //TX_AMS_RESRV_19 #RX -0 0x002C //RX_RECVFUNC_MODE_0 +0 0x202C //RX_RECVFUNC_MODE_0 1 0x0000 //RX_RECVFUNC_MODE_1 2 0x0000 //RX_SAMPLINGFREQ_SIG 3 0x0000 //RX_SAMPLINGFREQ_PROC @@ -22804,18 +33861,869 @@ 110 0x0000 //RX_FDDRC_RESRV_0 129 0x0100 //RX_SPK_VOL 130 0x0000 //RX_VOL_RESRV_0 +#RX 2 +157 0x202C //RX_RECVFUNC_MODE_0 +158 0x0000 //RX_RECVFUNC_MODE_1 +159 0x0000 //RX_SAMPLINGFREQ_SIG +160 0x0000 //RX_SAMPLINGFREQ_PROC +161 0x000A //RX_FRAME_SZ +162 0x0000 //RX_DELAY_OPT +163 0x3000 //RX_TDDRC_ALPHA_UP_1 +164 0x3000 //RX_TDDRC_ALPHA_UP_2 +165 0x3000 //RX_TDDRC_ALPHA_UP_3 +166 0x3000 //RX_TDDRC_ALPHA_UP_4 +167 0x0800 //RX_PGA +168 0x7FFF //RX_A_HP +169 0x0000 //RX_B_PE +170 0x3800 //RX_THR_PITCH_DET_0 +171 0x3000 //RX_THR_PITCH_DET_1 +172 0x2800 //RX_THR_PITCH_DET_2 +173 0x0008 //RX_PITCH_BFR_LEN +174 0x0003 //RX_SBD_PITCH_DET +175 0x0100 //RX_PP_RESRV_0 +176 0x0020 //RX_PP_RESRV_1 +177 0x0600 //RX_N_SN_EST +178 0x000C //RX_N2_SN_EST +179 0x0010 //RX_NS_LVL_CTRL +180 0xF800 //RX_THR_SN_EST +181 0x7CCD //RX_LAMBDA_PFILT +182 0x000A //RX_FENS_RESRV_0 +183 0x0190 //RX_FENS_RESRV_1 +184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +187 0x0002 //RX_EXTRA_NS_L +188 0x0800 //RX_EXTRA_NS_A +189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +190 0x7FFF //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +192 0x199A //RX_A_POST_FLT +193 0x0000 //RX_LMT_THRD +194 0x4000 //RX_LMT_ALPHA +195 0x0014 //RX_FDEQ_SUBNUM +196 0x4848 //RX_FDEQ_GAIN_0 +197 0x4848 //RX_FDEQ_GAIN_1 +198 0x4848 //RX_FDEQ_GAIN_2 +199 0x4848 //RX_FDEQ_GAIN_3 +200 0x4848 //RX_FDEQ_GAIN_4 +201 0x4848 //RX_FDEQ_GAIN_5 +202 0x4848 //RX_FDEQ_GAIN_6 +203 0x4848 //RX_FDEQ_GAIN_7 +204 0x4848 //RX_FDEQ_GAIN_8 +205 0x4848 //RX_FDEQ_GAIN_9 +206 0x4848 //RX_FDEQ_GAIN_10 +207 0x4848 //RX_FDEQ_GAIN_11 +208 0x4848 //RX_FDEQ_GAIN_12 +209 0x4848 //RX_FDEQ_GAIN_13 +210 0x4848 //RX_FDEQ_GAIN_14 +211 0x4848 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0202 //RX_FDEQ_BIN_0 +221 0x0203 //RX_FDEQ_BIN_1 +222 0x0303 //RX_FDEQ_BIN_2 +223 0x0304 //RX_FDEQ_BIN_3 +224 0x0405 //RX_FDEQ_BIN_4 +225 0x0506 //RX_FDEQ_BIN_5 +226 0x0708 //RX_FDEQ_BIN_6 +227 0x090A //RX_FDEQ_BIN_7 +228 0x0B0C //RX_FDEQ_BIN_8 +229 0x0D08 //RX_FDEQ_BIN_9 +230 0x0000 //RX_FDEQ_BIN_10 +231 0x0000 //RX_FDEQ_BIN_11 +232 0x0000 //RX_FDEQ_BIN_12 +233 0x0000 //RX_FDEQ_BIN_13 +234 0x0000 //RX_FDEQ_BIN_14 +235 0x0000 //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x4000 //RX_FDEQ_RESRV_0 +245 0x0320 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0030 //RX_FDDRC_BAND_MARGIN_1 +248 0x0050 //RX_FDDRC_BAND_MARGIN_2 +249 0x0080 //RX_FDDRC_BAND_MARGIN_3 +250 0x0007 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x5000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x6400 //RX_FDDRC_THRD_3_2 +258 0x6400 //RX_FDDRC_THRD_3_3 +259 0x2000 //RX_FDDRC_SLANT_0_0 +260 0x2000 //RX_FDDRC_SLANT_0_1 +261 0x2000 //RX_FDDRC_SLANT_0_2 +262 0x2000 //RX_FDDRC_SLANT_0_3 +263 0x5333 //RX_FDDRC_SLANT_1_0 +264 0x5333 //RX_FDDRC_SLANT_1_1 +265 0x5333 //RX_FDDRC_SLANT_1_2 +266 0x5333 //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +268 0x0002 //RX_FILTINDX +269 0x0000 //RX_TDDRC_THRD_0 +270 0x0000 //RX_TDDRC_THRD_1 +271 0x2000 //RX_TDDRC_THRD_2 +272 0x3000 //RX_TDDRC_THRD_3 +273 0x0800 //RX_TDDRC_SLANT_0 +274 0x7EB8 //RX_TDDRC_SLANT_1 +275 0x3000 //RX_TDDRC_ALPHA_UP_0 +276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x199A //RX_TDDRC_HMNC_GAIN +279 0x0001 //RX_TDDRC_SMT_FLAG +280 0x0CCD //RX_TDDRC_SMT_W +281 0x0200 //RX_TDDRC_DRC_GAIN +282 0x7C00 //RX_LAMBDA_PKA_FP +283 0x2000 //RX_TPKA_FP +284 0x2000 //RX_MIN_G_FP +285 0x0080 //RX_MAX_G_FP +286 0x000B //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 +288 0x0000 //RX_MAXLEVEL_CNG +289 0x3000 //RX_BWE_UV_TH +290 0x3000 //RX_BWE_UV_TH2 +291 0x1800 //RX_BWE_UV_TH3 +292 0x1000 //RX_BWE_V_TH +293 0x04CD //RX_BWE_GAIN1_V_TH1 +294 0x0F33 //RX_BWE_GAIN1_V_TH2 +295 0x7333 //RX_BWE_UV_EQ +296 0x199A //RX_BWE_V_EQ +297 0x7333 //RX_BWE_TONE_TH +298 0x0004 //RX_BWE_UV_HOLD_T +299 0x6CCD //RX_BWE_GAIN2_ALPHA +300 0x799A //RX_BWE_GAIN3_ALPHA +301 0x001E //RX_BWE_CUTOFF +302 0x3000 //RX_BWE_GAINFILL +303 0x3200 //RX_BWE_MAXTH_TONE +304 0x2000 //RX_BWE_EQ_0 +305 0x2000 //RX_BWE_EQ_1 +306 0x2000 //RX_BWE_EQ_2 +307 0x2000 //RX_BWE_EQ_3 +308 0x2000 //RX_BWE_EQ_4 +309 0x2000 //RX_BWE_EQ_5 +310 0x2000 //RX_BWE_EQ_6 +311 0x0000 //RX_BWE_RESRV_0 +312 0x0000 //RX_BWE_RESRV_1 +313 0x0000 //RX_BWE_RESRV_2 +#VOL 0 +163 0x3000 //RX_TDDRC_ALPHA_UP_1 +164 0x3000 //RX_TDDRC_ALPHA_UP_2 +165 0x3000 //RX_TDDRC_ALPHA_UP_3 +166 0x3000 //RX_TDDRC_ALPHA_UP_4 +184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +190 0x7FFF //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +269 0x0000 //RX_TDDRC_THRD_0 +270 0x0000 //RX_TDDRC_THRD_1 +271 0x2000 //RX_TDDRC_THRD_2 +272 0x3000 //RX_TDDRC_THRD_3 +273 0x0800 //RX_TDDRC_SLANT_0 +274 0x7EB8 //RX_TDDRC_SLANT_1 +275 0x3000 //RX_TDDRC_ALPHA_UP_0 +276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x199A //RX_TDDRC_HMNC_GAIN +279 0x0001 //RX_TDDRC_SMT_FLAG +280 0x0CCD //RX_TDDRC_SMT_W +281 0x0200 //RX_TDDRC_DRC_GAIN +195 0x0014 //RX_FDEQ_SUBNUM +196 0x4848 //RX_FDEQ_GAIN_0 +197 0x4848 //RX_FDEQ_GAIN_1 +198 0x4848 //RX_FDEQ_GAIN_2 +199 0x4848 //RX_FDEQ_GAIN_3 +200 0x4848 //RX_FDEQ_GAIN_4 +201 0x4848 //RX_FDEQ_GAIN_5 +202 0x4848 //RX_FDEQ_GAIN_6 +203 0x4848 //RX_FDEQ_GAIN_7 +204 0x4848 //RX_FDEQ_GAIN_8 +205 0x4848 //RX_FDEQ_GAIN_9 +206 0x4848 //RX_FDEQ_GAIN_10 +207 0x4848 //RX_FDEQ_GAIN_11 +208 0x4848 //RX_FDEQ_GAIN_12 +209 0x4848 //RX_FDEQ_GAIN_13 +210 0x4848 //RX_FDEQ_GAIN_14 +211 0x4848 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0202 //RX_FDEQ_BIN_0 +221 0x0203 //RX_FDEQ_BIN_1 +222 0x0303 //RX_FDEQ_BIN_2 +223 0x0304 //RX_FDEQ_BIN_3 +224 0x0405 //RX_FDEQ_BIN_4 +225 0x0506 //RX_FDEQ_BIN_5 +226 0x0708 //RX_FDEQ_BIN_6 +227 0x090A //RX_FDEQ_BIN_7 +228 0x0B0C //RX_FDEQ_BIN_8 +229 0x0D08 //RX_FDEQ_BIN_9 +230 0x0000 //RX_FDEQ_BIN_10 +231 0x0000 //RX_FDEQ_BIN_11 +232 0x0000 //RX_FDEQ_BIN_12 +233 0x0000 //RX_FDEQ_BIN_13 +234 0x0000 //RX_FDEQ_BIN_14 +235 0x0000 //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x4000 //RX_FDEQ_RESRV_0 +245 0x0320 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0030 //RX_FDDRC_BAND_MARGIN_1 +248 0x0050 //RX_FDDRC_BAND_MARGIN_2 +249 0x0080 //RX_FDDRC_BAND_MARGIN_3 +250 0x0007 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x5000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x6400 //RX_FDDRC_THRD_3_2 +258 0x6400 //RX_FDDRC_THRD_3_3 +259 0x2000 //RX_FDDRC_SLANT_0_0 +260 0x2000 //RX_FDDRC_SLANT_0_1 +261 0x2000 //RX_FDDRC_SLANT_0_2 +262 0x2000 //RX_FDDRC_SLANT_0_3 +263 0x5333 //RX_FDDRC_SLANT_1_0 +264 0x5333 //RX_FDDRC_SLANT_1_1 +265 0x5333 //RX_FDDRC_SLANT_1_2 +266 0x5333 //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +286 0x000B //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 +#VOL 1 +163 0x3000 //RX_TDDRC_ALPHA_UP_1 +164 0x3000 //RX_TDDRC_ALPHA_UP_2 +165 0x3000 //RX_TDDRC_ALPHA_UP_3 +166 0x3000 //RX_TDDRC_ALPHA_UP_4 +184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +190 0x7FFF //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +269 0x0000 //RX_TDDRC_THRD_0 +270 0x0000 //RX_TDDRC_THRD_1 +271 0x2000 //RX_TDDRC_THRD_2 +272 0x3000 //RX_TDDRC_THRD_3 +273 0x0800 //RX_TDDRC_SLANT_0 +274 0x7EB8 //RX_TDDRC_SLANT_1 +275 0x3000 //RX_TDDRC_ALPHA_UP_0 +276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x199A //RX_TDDRC_HMNC_GAIN +279 0x0001 //RX_TDDRC_SMT_FLAG +280 0x0CCD //RX_TDDRC_SMT_W +281 0x0200 //RX_TDDRC_DRC_GAIN +195 0x0014 //RX_FDEQ_SUBNUM +196 0x4848 //RX_FDEQ_GAIN_0 +197 0x4848 //RX_FDEQ_GAIN_1 +198 0x4848 //RX_FDEQ_GAIN_2 +199 0x4848 //RX_FDEQ_GAIN_3 +200 0x4848 //RX_FDEQ_GAIN_4 +201 0x4848 //RX_FDEQ_GAIN_5 +202 0x4848 //RX_FDEQ_GAIN_6 +203 0x4848 //RX_FDEQ_GAIN_7 +204 0x4848 //RX_FDEQ_GAIN_8 +205 0x4848 //RX_FDEQ_GAIN_9 +206 0x4848 //RX_FDEQ_GAIN_10 +207 0x4848 //RX_FDEQ_GAIN_11 +208 0x4848 //RX_FDEQ_GAIN_12 +209 0x4848 //RX_FDEQ_GAIN_13 +210 0x4848 //RX_FDEQ_GAIN_14 +211 0x4848 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0202 //RX_FDEQ_BIN_0 +221 0x0203 //RX_FDEQ_BIN_1 +222 0x0303 //RX_FDEQ_BIN_2 +223 0x0304 //RX_FDEQ_BIN_3 +224 0x0405 //RX_FDEQ_BIN_4 +225 0x0506 //RX_FDEQ_BIN_5 +226 0x0708 //RX_FDEQ_BIN_6 +227 0x090A //RX_FDEQ_BIN_7 +228 0x0B0C //RX_FDEQ_BIN_8 +229 0x0D08 //RX_FDEQ_BIN_9 +230 0x0000 //RX_FDEQ_BIN_10 +231 0x0000 //RX_FDEQ_BIN_11 +232 0x0000 //RX_FDEQ_BIN_12 +233 0x0000 //RX_FDEQ_BIN_13 +234 0x0000 //RX_FDEQ_BIN_14 +235 0x0000 //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x4000 //RX_FDEQ_RESRV_0 +245 0x0320 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0030 //RX_FDDRC_BAND_MARGIN_1 +248 0x0050 //RX_FDDRC_BAND_MARGIN_2 +249 0x0080 //RX_FDDRC_BAND_MARGIN_3 +250 0x0007 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x5000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x6400 //RX_FDDRC_THRD_3_2 +258 0x6400 //RX_FDDRC_THRD_3_3 +259 0x2000 //RX_FDDRC_SLANT_0_0 +260 0x2000 //RX_FDDRC_SLANT_0_1 +261 0x2000 //RX_FDDRC_SLANT_0_2 +262 0x2000 //RX_FDDRC_SLANT_0_3 +263 0x5333 //RX_FDDRC_SLANT_1_0 +264 0x5333 //RX_FDDRC_SLANT_1_1 +265 0x5333 //RX_FDDRC_SLANT_1_2 +266 0x5333 //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +286 0x0013 //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 +#VOL 2 +163 0x3000 //RX_TDDRC_ALPHA_UP_1 +164 0x3000 //RX_TDDRC_ALPHA_UP_2 +165 0x3000 //RX_TDDRC_ALPHA_UP_3 +166 0x3000 //RX_TDDRC_ALPHA_UP_4 +184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +190 0x7FFF //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +269 0x0000 //RX_TDDRC_THRD_0 +270 0x0000 //RX_TDDRC_THRD_1 +271 0x2000 //RX_TDDRC_THRD_2 +272 0x3000 //RX_TDDRC_THRD_3 +273 0x0800 //RX_TDDRC_SLANT_0 +274 0x7EB8 //RX_TDDRC_SLANT_1 +275 0x3000 //RX_TDDRC_ALPHA_UP_0 +276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x199A //RX_TDDRC_HMNC_GAIN +279 0x0001 //RX_TDDRC_SMT_FLAG +280 0x0CCD //RX_TDDRC_SMT_W +281 0x0200 //RX_TDDRC_DRC_GAIN +195 0x0014 //RX_FDEQ_SUBNUM +196 0x4848 //RX_FDEQ_GAIN_0 +197 0x4848 //RX_FDEQ_GAIN_1 +198 0x4848 //RX_FDEQ_GAIN_2 +199 0x4848 //RX_FDEQ_GAIN_3 +200 0x4848 //RX_FDEQ_GAIN_4 +201 0x4848 //RX_FDEQ_GAIN_5 +202 0x4848 //RX_FDEQ_GAIN_6 +203 0x4848 //RX_FDEQ_GAIN_7 +204 0x4848 //RX_FDEQ_GAIN_8 +205 0x4848 //RX_FDEQ_GAIN_9 +206 0x4848 //RX_FDEQ_GAIN_10 +207 0x4848 //RX_FDEQ_GAIN_11 +208 0x4848 //RX_FDEQ_GAIN_12 +209 0x4848 //RX_FDEQ_GAIN_13 +210 0x4848 //RX_FDEQ_GAIN_14 +211 0x4848 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0202 //RX_FDEQ_BIN_0 +221 0x0203 //RX_FDEQ_BIN_1 +222 0x0303 //RX_FDEQ_BIN_2 +223 0x0304 //RX_FDEQ_BIN_3 +224 0x0405 //RX_FDEQ_BIN_4 +225 0x0506 //RX_FDEQ_BIN_5 +226 0x0708 //RX_FDEQ_BIN_6 +227 0x090A //RX_FDEQ_BIN_7 +228 0x0B0C //RX_FDEQ_BIN_8 +229 0x0D08 //RX_FDEQ_BIN_9 +230 0x0000 //RX_FDEQ_BIN_10 +231 0x0000 //RX_FDEQ_BIN_11 +232 0x0000 //RX_FDEQ_BIN_12 +233 0x0000 //RX_FDEQ_BIN_13 +234 0x0000 //RX_FDEQ_BIN_14 +235 0x0000 //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x4000 //RX_FDEQ_RESRV_0 +245 0x0320 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0030 //RX_FDDRC_BAND_MARGIN_1 +248 0x0050 //RX_FDDRC_BAND_MARGIN_2 +249 0x0080 //RX_FDDRC_BAND_MARGIN_3 +250 0x0007 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x5000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x6400 //RX_FDDRC_THRD_3_2 +258 0x6400 //RX_FDDRC_THRD_3_3 +259 0x2000 //RX_FDDRC_SLANT_0_0 +260 0x2000 //RX_FDDRC_SLANT_0_1 +261 0x2000 //RX_FDDRC_SLANT_0_2 +262 0x2000 //RX_FDDRC_SLANT_0_3 +263 0x5333 //RX_FDDRC_SLANT_1_0 +264 0x5333 //RX_FDDRC_SLANT_1_1 +265 0x5333 //RX_FDDRC_SLANT_1_2 +266 0x5333 //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +286 0x0020 //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 +#VOL 3 +163 0x3000 //RX_TDDRC_ALPHA_UP_1 +164 0x3000 //RX_TDDRC_ALPHA_UP_2 +165 0x3000 //RX_TDDRC_ALPHA_UP_3 +166 0x3000 //RX_TDDRC_ALPHA_UP_4 +184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +190 0x7FFF //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +269 0x0000 //RX_TDDRC_THRD_0 +270 0x0000 //RX_TDDRC_THRD_1 +271 0x2000 //RX_TDDRC_THRD_2 +272 0x3000 //RX_TDDRC_THRD_3 +273 0x0800 //RX_TDDRC_SLANT_0 +274 0x7EB8 //RX_TDDRC_SLANT_1 +275 0x3000 //RX_TDDRC_ALPHA_UP_0 +276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x199A //RX_TDDRC_HMNC_GAIN +279 0x0001 //RX_TDDRC_SMT_FLAG +280 0x0CCD //RX_TDDRC_SMT_W +281 0x0200 //RX_TDDRC_DRC_GAIN +195 0x0014 //RX_FDEQ_SUBNUM +196 0x4848 //RX_FDEQ_GAIN_0 +197 0x4848 //RX_FDEQ_GAIN_1 +198 0x4848 //RX_FDEQ_GAIN_2 +199 0x4848 //RX_FDEQ_GAIN_3 +200 0x4848 //RX_FDEQ_GAIN_4 +201 0x4848 //RX_FDEQ_GAIN_5 +202 0x4848 //RX_FDEQ_GAIN_6 +203 0x4848 //RX_FDEQ_GAIN_7 +204 0x4848 //RX_FDEQ_GAIN_8 +205 0x4848 //RX_FDEQ_GAIN_9 +206 0x4848 //RX_FDEQ_GAIN_10 +207 0x4848 //RX_FDEQ_GAIN_11 +208 0x4848 //RX_FDEQ_GAIN_12 +209 0x4848 //RX_FDEQ_GAIN_13 +210 0x4848 //RX_FDEQ_GAIN_14 +211 0x4848 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0202 //RX_FDEQ_BIN_0 +221 0x0203 //RX_FDEQ_BIN_1 +222 0x0303 //RX_FDEQ_BIN_2 +223 0x0304 //RX_FDEQ_BIN_3 +224 0x0405 //RX_FDEQ_BIN_4 +225 0x0506 //RX_FDEQ_BIN_5 +226 0x0708 //RX_FDEQ_BIN_6 +227 0x090A //RX_FDEQ_BIN_7 +228 0x0B0C //RX_FDEQ_BIN_8 +229 0x0D08 //RX_FDEQ_BIN_9 +230 0x0000 //RX_FDEQ_BIN_10 +231 0x0000 //RX_FDEQ_BIN_11 +232 0x0000 //RX_FDEQ_BIN_12 +233 0x0000 //RX_FDEQ_BIN_13 +234 0x0000 //RX_FDEQ_BIN_14 +235 0x0000 //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x4000 //RX_FDEQ_RESRV_0 +245 0x0320 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0030 //RX_FDDRC_BAND_MARGIN_1 +248 0x0050 //RX_FDDRC_BAND_MARGIN_2 +249 0x0080 //RX_FDDRC_BAND_MARGIN_3 +250 0x0007 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x5000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x6400 //RX_FDDRC_THRD_3_2 +258 0x6400 //RX_FDDRC_THRD_3_3 +259 0x2000 //RX_FDDRC_SLANT_0_0 +260 0x2000 //RX_FDDRC_SLANT_0_1 +261 0x2000 //RX_FDDRC_SLANT_0_2 +262 0x2000 //RX_FDDRC_SLANT_0_3 +263 0x5333 //RX_FDDRC_SLANT_1_0 +264 0x5333 //RX_FDDRC_SLANT_1_1 +265 0x5333 //RX_FDDRC_SLANT_1_2 +266 0x5333 //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +286 0x0036 //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 +#VOL 4 +163 0x3000 //RX_TDDRC_ALPHA_UP_1 +164 0x3000 //RX_TDDRC_ALPHA_UP_2 +165 0x3000 //RX_TDDRC_ALPHA_UP_3 +166 0x3000 //RX_TDDRC_ALPHA_UP_4 +184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +190 0x7FFF //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +269 0x0000 //RX_TDDRC_THRD_0 +270 0x0000 //RX_TDDRC_THRD_1 +271 0x2000 //RX_TDDRC_THRD_2 +272 0x3000 //RX_TDDRC_THRD_3 +273 0x0800 //RX_TDDRC_SLANT_0 +274 0x7EB8 //RX_TDDRC_SLANT_1 +275 0x3000 //RX_TDDRC_ALPHA_UP_0 +276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x199A //RX_TDDRC_HMNC_GAIN +279 0x0001 //RX_TDDRC_SMT_FLAG +280 0x0CCD //RX_TDDRC_SMT_W +281 0x0200 //RX_TDDRC_DRC_GAIN +195 0x0014 //RX_FDEQ_SUBNUM +196 0x4848 //RX_FDEQ_GAIN_0 +197 0x4848 //RX_FDEQ_GAIN_1 +198 0x4848 //RX_FDEQ_GAIN_2 +199 0x4848 //RX_FDEQ_GAIN_3 +200 0x4848 //RX_FDEQ_GAIN_4 +201 0x4848 //RX_FDEQ_GAIN_5 +202 0x4848 //RX_FDEQ_GAIN_6 +203 0x4848 //RX_FDEQ_GAIN_7 +204 0x4848 //RX_FDEQ_GAIN_8 +205 0x4848 //RX_FDEQ_GAIN_9 +206 0x4848 //RX_FDEQ_GAIN_10 +207 0x4848 //RX_FDEQ_GAIN_11 +208 0x4848 //RX_FDEQ_GAIN_12 +209 0x4848 //RX_FDEQ_GAIN_13 +210 0x4848 //RX_FDEQ_GAIN_14 +211 0x4848 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0202 //RX_FDEQ_BIN_0 +221 0x0203 //RX_FDEQ_BIN_1 +222 0x0303 //RX_FDEQ_BIN_2 +223 0x0304 //RX_FDEQ_BIN_3 +224 0x0405 //RX_FDEQ_BIN_4 +225 0x0506 //RX_FDEQ_BIN_5 +226 0x0708 //RX_FDEQ_BIN_6 +227 0x090A //RX_FDEQ_BIN_7 +228 0x0B0C //RX_FDEQ_BIN_8 +229 0x0D08 //RX_FDEQ_BIN_9 +230 0x0000 //RX_FDEQ_BIN_10 +231 0x0000 //RX_FDEQ_BIN_11 +232 0x0000 //RX_FDEQ_BIN_12 +233 0x0000 //RX_FDEQ_BIN_13 +234 0x0000 //RX_FDEQ_BIN_14 +235 0x0000 //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x4000 //RX_FDEQ_RESRV_0 +245 0x0320 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0030 //RX_FDDRC_BAND_MARGIN_1 +248 0x0050 //RX_FDDRC_BAND_MARGIN_2 +249 0x0080 //RX_FDDRC_BAND_MARGIN_3 +250 0x0007 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x5000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x6400 //RX_FDDRC_THRD_3_2 +258 0x6400 //RX_FDDRC_THRD_3_3 +259 0x2000 //RX_FDDRC_SLANT_0_0 +260 0x2000 //RX_FDDRC_SLANT_0_1 +261 0x2000 //RX_FDDRC_SLANT_0_2 +262 0x2000 //RX_FDDRC_SLANT_0_3 +263 0x5333 //RX_FDDRC_SLANT_1_0 +264 0x5333 //RX_FDDRC_SLANT_1_1 +265 0x5333 //RX_FDDRC_SLANT_1_2 +266 0x5333 //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +286 0x005B //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 +#VOL 5 +163 0x3000 //RX_TDDRC_ALPHA_UP_1 +164 0x3000 //RX_TDDRC_ALPHA_UP_2 +165 0x3000 //RX_TDDRC_ALPHA_UP_3 +166 0x3000 //RX_TDDRC_ALPHA_UP_4 +184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +190 0x7FFF //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +269 0x0000 //RX_TDDRC_THRD_0 +270 0x0000 //RX_TDDRC_THRD_1 +271 0x2000 //RX_TDDRC_THRD_2 +272 0x3000 //RX_TDDRC_THRD_3 +273 0x0800 //RX_TDDRC_SLANT_0 +274 0x7EB8 //RX_TDDRC_SLANT_1 +275 0x3000 //RX_TDDRC_ALPHA_UP_0 +276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x199A //RX_TDDRC_HMNC_GAIN +279 0x0001 //RX_TDDRC_SMT_FLAG +280 0x0CCD //RX_TDDRC_SMT_W +281 0x0200 //RX_TDDRC_DRC_GAIN +195 0x0014 //RX_FDEQ_SUBNUM +196 0x4848 //RX_FDEQ_GAIN_0 +197 0x4848 //RX_FDEQ_GAIN_1 +198 0x4848 //RX_FDEQ_GAIN_2 +199 0x4848 //RX_FDEQ_GAIN_3 +200 0x4848 //RX_FDEQ_GAIN_4 +201 0x4848 //RX_FDEQ_GAIN_5 +202 0x4848 //RX_FDEQ_GAIN_6 +203 0x4848 //RX_FDEQ_GAIN_7 +204 0x4848 //RX_FDEQ_GAIN_8 +205 0x4848 //RX_FDEQ_GAIN_9 +206 0x4848 //RX_FDEQ_GAIN_10 +207 0x4848 //RX_FDEQ_GAIN_11 +208 0x4848 //RX_FDEQ_GAIN_12 +209 0x4848 //RX_FDEQ_GAIN_13 +210 0x4848 //RX_FDEQ_GAIN_14 +211 0x4848 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0202 //RX_FDEQ_BIN_0 +221 0x0203 //RX_FDEQ_BIN_1 +222 0x0303 //RX_FDEQ_BIN_2 +223 0x0304 //RX_FDEQ_BIN_3 +224 0x0405 //RX_FDEQ_BIN_4 +225 0x0506 //RX_FDEQ_BIN_5 +226 0x0708 //RX_FDEQ_BIN_6 +227 0x090A //RX_FDEQ_BIN_7 +228 0x0B0C //RX_FDEQ_BIN_8 +229 0x0D08 //RX_FDEQ_BIN_9 +230 0x0000 //RX_FDEQ_BIN_10 +231 0x0000 //RX_FDEQ_BIN_11 +232 0x0000 //RX_FDEQ_BIN_12 +233 0x0000 //RX_FDEQ_BIN_13 +234 0x0000 //RX_FDEQ_BIN_14 +235 0x0000 //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x4000 //RX_FDEQ_RESRV_0 +245 0x0320 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0030 //RX_FDDRC_BAND_MARGIN_1 +248 0x0050 //RX_FDDRC_BAND_MARGIN_2 +249 0x0080 //RX_FDDRC_BAND_MARGIN_3 +250 0x0007 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x5000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x6400 //RX_FDDRC_THRD_3_2 +258 0x6400 //RX_FDDRC_THRD_3_3 +259 0x2000 //RX_FDDRC_SLANT_0_0 +260 0x2000 //RX_FDDRC_SLANT_0_1 +261 0x2000 //RX_FDDRC_SLANT_0_2 +262 0x2000 //RX_FDDRC_SLANT_0_3 +263 0x5333 //RX_FDDRC_SLANT_1_0 +264 0x5333 //RX_FDDRC_SLANT_1_1 +265 0x5333 //RX_FDDRC_SLANT_1_2 +266 0x5333 //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +286 0x0099 //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 +#VOL 6 +163 0x3000 //RX_TDDRC_ALPHA_UP_1 +164 0x3000 //RX_TDDRC_ALPHA_UP_2 +165 0x3000 //RX_TDDRC_ALPHA_UP_3 +166 0x3000 //RX_TDDRC_ALPHA_UP_4 +184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +190 0x7FFF //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +269 0x0000 //RX_TDDRC_THRD_0 +270 0x0000 //RX_TDDRC_THRD_1 +271 0x2000 //RX_TDDRC_THRD_2 +272 0x3000 //RX_TDDRC_THRD_3 +273 0x0800 //RX_TDDRC_SLANT_0 +274 0x7EB8 //RX_TDDRC_SLANT_1 +275 0x3000 //RX_TDDRC_ALPHA_UP_0 +276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x199A //RX_TDDRC_HMNC_GAIN +279 0x0001 //RX_TDDRC_SMT_FLAG +280 0x0CCD //RX_TDDRC_SMT_W +281 0x0200 //RX_TDDRC_DRC_GAIN +195 0x0014 //RX_FDEQ_SUBNUM +196 0x4848 //RX_FDEQ_GAIN_0 +197 0x4848 //RX_FDEQ_GAIN_1 +198 0x4848 //RX_FDEQ_GAIN_2 +199 0x4848 //RX_FDEQ_GAIN_3 +200 0x4848 //RX_FDEQ_GAIN_4 +201 0x4848 //RX_FDEQ_GAIN_5 +202 0x4848 //RX_FDEQ_GAIN_6 +203 0x4848 //RX_FDEQ_GAIN_7 +204 0x4848 //RX_FDEQ_GAIN_8 +205 0x4848 //RX_FDEQ_GAIN_9 +206 0x4848 //RX_FDEQ_GAIN_10 +207 0x4848 //RX_FDEQ_GAIN_11 +208 0x4848 //RX_FDEQ_GAIN_12 +209 0x4848 //RX_FDEQ_GAIN_13 +210 0x4848 //RX_FDEQ_GAIN_14 +211 0x4848 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0202 //RX_FDEQ_BIN_0 +221 0x0203 //RX_FDEQ_BIN_1 +222 0x0303 //RX_FDEQ_BIN_2 +223 0x0304 //RX_FDEQ_BIN_3 +224 0x0405 //RX_FDEQ_BIN_4 +225 0x0506 //RX_FDEQ_BIN_5 +226 0x0708 //RX_FDEQ_BIN_6 +227 0x090A //RX_FDEQ_BIN_7 +228 0x0B0C //RX_FDEQ_BIN_8 +229 0x0D08 //RX_FDEQ_BIN_9 +230 0x0000 //RX_FDEQ_BIN_10 +231 0x0000 //RX_FDEQ_BIN_11 +232 0x0000 //RX_FDEQ_BIN_12 +233 0x0000 //RX_FDEQ_BIN_13 +234 0x0000 //RX_FDEQ_BIN_14 +235 0x0000 //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x4000 //RX_FDEQ_RESRV_0 +245 0x0320 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0030 //RX_FDDRC_BAND_MARGIN_1 +248 0x0050 //RX_FDDRC_BAND_MARGIN_2 +249 0x0080 //RX_FDDRC_BAND_MARGIN_3 +250 0x0007 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x5000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x6400 //RX_FDDRC_THRD_3_2 +258 0x6400 //RX_FDDRC_THRD_3_3 +259 0x2000 //RX_FDDRC_SLANT_0_0 +260 0x2000 //RX_FDDRC_SLANT_0_1 +261 0x2000 //RX_FDDRC_SLANT_0_2 +262 0x2000 //RX_FDDRC_SLANT_0_3 +263 0x5333 //RX_FDDRC_SLANT_1_0 +264 0x5333 //RX_FDDRC_SLANT_1_1 +265 0x5333 //RX_FDDRC_SLANT_1_2 +266 0x5333 //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +286 0x0100 //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 #CASE_NAME HEADSET-GOOGLE_CONDOR_HEADPHONE-VOICE_GENERIC-WB -#PARAM_MODE FULL -#PARAM_TYPE TX+RX -#TOTAL_CUSTOM_STEP 7 +#PARAM_MODE Full +#PARAM_TYPE TX+2RX +#TOTAL_CUSTOM_STEP 7+7 #TX 0 0x0001 //TX_OPERATION_MODE_0 1 0x0001 //TX_OPERATION_MODE_1 2 0x0033 //TX_PATCH_REG -3 0x2F7C //TX_SENDFUNC_MODE_0 +3 0x6F7C //TX_SENDFUNC_MODE_0 4 0x0001 //TX_SENDFUNC_MODE_1 -5 0x0003 //TX_NUM_MIC +5 0x0002 //TX_NUM_MIC 6 0x0001 //TX_SAMPLINGFREQ_SIG 7 0x0001 //TX_SAMPLINGFREQ_PROC 8 0x000A //TX_FRAME_SZ_SIG @@ -22831,8 +34739,8 @@ 18 0x0000 //TX_SYS_RESRV_2 19 0x0000 //TX_SYS_RESRV_3 20 0x0000 //TX_DIST2REF0 -21 0x00A4 //TX_DIST2REF1 -22 0x0017 //TX_DIST2REF_02 +21 0x009D //TX_DIST2REF1 +22 0x0010 //TX_DIST2REF_02 23 0x0000 //TX_DIST2REF_03 24 0x0000 //TX_DIST2REF_04 25 0x0000 //TX_DIST2REF_05 @@ -22923,8 +34831,8 @@ 110 0x0000 //TX_ADCS_MASK 111 0x04D0 //TX_ADCS_GAIN 112 0x4000 //TX_NFC_GAINFAC -113 0x0000 //TX_MAINMIC_BLKFACTOR -114 0x0000 //TX_REFMIC_BLKFACTOR +113 0x0004 //TX_MAINMIC_BLKFACTOR +114 0x0004 //TX_REFMIC_BLKFACTOR 115 0x0000 //TX_BLMIC_BLKFACTOR 116 0x0000 //TX_BRMIC_BLKFACTOR 117 0x0031 //TX_MICBLK_START_BIN @@ -22962,7 +34870,7 @@ 149 0x0800 //TX_AEC_REF_GAIN_2 150 0x6800 //TX_EAD_THR 151 0x1000 //TX_THR_RE_EST -152 0x0200 //TX_MIN_EQ_RE_EST_0 +152 0x3000 //TX_MIN_EQ_RE_EST_0 153 0x0100 //TX_MIN_EQ_RE_EST_1 154 0x0200 //TX_MIN_EQ_RE_EST_2 155 0x0200 //TX_MIN_EQ_RE_EST_3 @@ -22975,13 +34883,13 @@ 162 0x1000 //TX_MIN_EQ_RE_EST_10 163 0x1000 //TX_MIN_EQ_RE_EST_11 164 0x1000 //TX_MIN_EQ_RE_EST_12 -165 0x4000 //TX_LAMBDA_RE_EST +165 0x1B00 //TX_LAMBDA_RE_EST 166 0x4000 //TX_LAMBDA_CB_NLE 167 0x7FFF //TX_C_POST_FLT 168 0x5000 //TX_GAIN_NP 169 0x0180 //TX_SE_HOLD_N 170 0x00C8 //TX_DT_HOLD_N -171 0x05DC //TX_DT2_HOLD_N +171 0x0020 //TX_DT2_HOLD_N 172 0x6666 //TX_AEC_RESRV_0 173 0x0000 //TX_AEC_RESRV_1 174 0x0014 //TX_AEC_RESRV_2 @@ -23007,15 +34915,15 @@ 194 0x0000 //TX_NORMENERTH 195 0x0000 //TX_NORMENERHIGHTH 196 0x0000 //TX_NORMENERHIGHTHL -197 0x6590 //TX_DTD_THR1_0 -198 0x6590 //TX_DTD_THR1_1 -199 0x6590 //TX_DTD_THR1_2 +197 0x76D0 //TX_DTD_THR1_0 +198 0x76D0 //TX_DTD_THR1_1 +199 0x76D0 //TX_DTD_THR1_2 200 0x7FF0 //TX_DTD_THR1_3 201 0x7FF0 //TX_DTD_THR1_4 202 0x7FF0 //TX_DTD_THR1_5 203 0x7FF0 //TX_DTD_THR1_6 -204 0x5000 //TX_DTD_THR2_0 -205 0x5000 //TX_DTD_THR2_1 +204 0x7E00 //TX_DTD_THR2_0 +205 0x7E00 //TX_DTD_THR2_1 206 0x5000 //TX_DTD_THR2_2 207 0x5000 //TX_DTD_THR2_3 208 0x5000 //TX_DTD_THR2_4 @@ -23023,8 +34931,8 @@ 210 0x5000 //TX_DTD_THR2_6 211 0x7FFF //TX_DTD_THR3 212 0x0000 //TX_SPK_CUT_K -213 0x07D0 //TX_DT_CUT_K -214 0x0100 //TX_DT_CUT_THR +213 0x03E8 //TX_DT_CUT_K +214 0x0010 //TX_DT_CUT_THR 215 0x04EB //TX_COMFORT_G 216 0x01F4 //TX_POWER_YOUT_TH 217 0x4000 //TX_FDPFGAINECHO @@ -23035,16 +34943,16 @@ 222 0x023E //TX_ADPT_STRICT_H 223 0x0BB8 //TX_RATIO_DT_L_TH_LOW 224 0x3A98 //TX_RATIO_DT_H_TH_LOW -225 0x1770 //TX_RATIO_DT_L_TH_HIGH -226 0x4E20 //TX_RATIO_DT_H_TH_HIGH -227 0x09C4 //TX_RATIO_DT_L0_TH -228 0x2000 //TX_B_POST_FILT_ECHO_L +225 0x044C //TX_RATIO_DT_L_TH_HIGH +226 0x7800 //TX_RATIO_DT_H_TH_HIGH +227 0x0001 //TX_RATIO_DT_L0_TH +228 0x7FFF //TX_B_POST_FILT_ECHO_L 229 0x7FFF //TX_B_POST_FILT_ECHO_H 230 0x0200 //TX_MIN_G_CTRL_ECHO 231 0x1000 //TX_B_LESSCUT_RTO_ECHO 232 0x0000 //TX_EPD_OFFSET_00 233 0x0000 //TX_EPD_OFFST_01 -234 0x1388 //TX_RATIO_DT_L0_TH_HIGH +234 0x03E8 //TX_RATIO_DT_L0_TH_HIGH 235 0x7FFF //TX_RATIO_DT_H_TH_CUT 236 0x7FFF //TX_MIN_EQ_RE_EST_13 237 0x0000 //TX_DTD_THR1_7 @@ -23052,7 +34960,7 @@ 239 0x0800 //TX_DT_RESRV_7 240 0x0800 //TX_DT_RESRV_8 241 0x0000 //TX_DT_RESRV_9 -242 0xF800 //TX_THR_SN_EST_0 +242 0xFA00 //TX_THR_SN_EST_0 243 0xFA00 //TX_THR_SN_EST_1 244 0xFA00 //TX_THR_SN_EST_2 245 0xFB00 //TX_THR_SN_EST_3 @@ -23061,11 +34969,11 @@ 248 0xF800 //TX_THR_SN_EST_6 249 0xF800 //TX_THR_SN_EST_7 250 0x0100 //TX_DELTA_THR_SN_EST_0 -251 0x0200 //TX_DELTA_THR_SN_EST_1 -252 0x0100 //TX_DELTA_THR_SN_EST_2 -253 0x0200 //TX_DELTA_THR_SN_EST_3 +251 0x0100 //TX_DELTA_THR_SN_EST_1 +252 0x0200 //TX_DELTA_THR_SN_EST_2 +253 0x0100 //TX_DELTA_THR_SN_EST_3 254 0x0100 //TX_DELTA_THR_SN_EST_4 -255 0x0100 //TX_DELTA_THR_SN_EST_5 +255 0x0200 //TX_DELTA_THR_SN_EST_5 256 0x0200 //TX_DELTA_THR_SN_EST_6 257 0x0200 //TX_DELTA_THR_SN_EST_7 258 0x4000 //TX_LAMBDA_NN_EST_0 @@ -23093,11 +35001,11 @@ 280 0x1000 //TX_B_POST_FLT_1 281 0x0010 //TX_NS_LVL_CTRL_0 282 0x0014 //TX_NS_LVL_CTRL_1 -283 0x0014 //TX_NS_LVL_CTRL_2 -284 0x0018 //TX_NS_LVL_CTRL_3 -285 0x0016 //TX_NS_LVL_CTRL_4 -286 0x0014 //TX_NS_LVL_CTRL_5 -287 0x0011 //TX_NS_LVL_CTRL_6 +283 0x0018 //TX_NS_LVL_CTRL_2 +284 0x0016 //TX_NS_LVL_CTRL_3 +285 0x0014 //TX_NS_LVL_CTRL_4 +286 0x0011 //TX_NS_LVL_CTRL_5 +287 0x0014 //TX_NS_LVL_CTRL_6 288 0x0011 //TX_NS_LVL_CTRL_7 289 0x000F //TX_MIN_GAIN_S_0 290 0x0010 //TX_MIN_GAIN_S_1 @@ -23115,8 +35023,8 @@ 302 0x4000 //TX_SNRI_SUP_2 303 0x4000 //TX_SNRI_SUP_3 304 0x4000 //TX_SNRI_SUP_4 -305 0x4000 //TX_SNRI_SUP_5 -306 0x50C0 //TX_SNRI_SUP_6 +305 0x50C0 //TX_SNRI_SUP_5 +306 0x4000 //TX_SNRI_SUP_6 307 0x7FFF //TX_SNRI_SUP_7 308 0x7FFF //TX_THR_LFNS 309 0x0018 //TX_G_LFNS @@ -23125,19 +35033,19 @@ 312 0x7FFF //TX_A_POST_FILT_0 313 0x2000 //TX_A_POST_FILT_1 314 0x5000 //TX_A_POST_FILT_S_0 -315 0x6000 //TX_A_POST_FILT_S_1 -316 0x4C00 //TX_A_POST_FILT_S_2 -317 0x4000 //TX_A_POST_FILT_S_3 -318 0x6000 //TX_A_POST_FILT_S_4 -319 0x4000 //TX_A_POST_FILT_S_5 -320 0x5000 //TX_A_POST_FILT_S_6 +315 0x4C00 //TX_A_POST_FILT_S_1 +316 0x4000 //TX_A_POST_FILT_S_2 +317 0x6000 //TX_A_POST_FILT_S_3 +318 0x4000 //TX_A_POST_FILT_S_4 +319 0x5000 //TX_A_POST_FILT_S_5 +320 0x6000 //TX_A_POST_FILT_S_6 321 0x7000 //TX_A_POST_FILT_S_7 322 0x2000 //TX_B_POST_FILT_0 -323 0x1000 //TX_B_POST_FILT_1 +323 0x2000 //TX_B_POST_FILT_1 324 0x2000 //TX_B_POST_FILT_2 -325 0x2000 //TX_B_POST_FILT_3 +325 0x4000 //TX_B_POST_FILT_3 326 0x4000 //TX_B_POST_FILT_4 -327 0x4000 //TX_B_POST_FILT_5 +327 0x1000 //TX_B_POST_FILT_5 328 0x1000 //TX_B_POST_FILT_6 329 0x2000 //TX_B_POST_FILT_7 330 0x4000 //TX_B_LESSCUT_RTO_S_0 @@ -23145,14 +35053,14 @@ 332 0x7FFF //TX_B_LESSCUT_RTO_S_2 333 0x7FFF //TX_B_LESSCUT_RTO_S_3 334 0x7FFF //TX_B_LESSCUT_RTO_S_4 -335 0x7FFF //TX_B_LESSCUT_RTO_S_5 -336 0x6000 //TX_B_LESSCUT_RTO_S_6 +335 0x6000 //TX_B_LESSCUT_RTO_S_5 +336 0x7FFF //TX_B_LESSCUT_RTO_S_6 337 0x7FFF //TX_B_LESSCUT_RTO_S_7 338 0x7C00 //TX_LAMBDA_PFILT 339 0x7C00 //TX_LAMBDA_PFILT_S_0 340 0x7C00 //TX_LAMBDA_PFILT_S_1 -341 0x7C00 //TX_LAMBDA_PFILT_S_2 -342 0x7A00 //TX_LAMBDA_PFILT_S_3 +341 0x7A00 //TX_LAMBDA_PFILT_S_2 +342 0x7C00 //TX_LAMBDA_PFILT_S_3 343 0x7C00 //TX_LAMBDA_PFILT_S_4 344 0x7C00 //TX_LAMBDA_PFILT_S_5 345 0x7C00 //TX_LAMBDA_PFILT_S_6 @@ -23163,10 +35071,10 @@ 350 0x0600 //TX_A_PEPPER_HF 351 0x0001 //TX_HMNC_BST_FLG 352 0x0200 //TX_HMNC_BST_THR -353 0x0200 //TX_DT_BINVAD_TH_0 -354 0x0200 //TX_DT_BINVAD_TH_1 -355 0x0200 //TX_DT_BINVAD_TH_2 -356 0x0200 //TX_DT_BINVAD_TH_3 +353 0x0800 //TX_DT_BINVAD_TH_0 +354 0x0800 //TX_DT_BINVAD_TH_1 +355 0x0800 //TX_DT_BINVAD_TH_2 +356 0x0800 //TX_DT_BINVAD_TH_3 357 0x1D4C //TX_DT_BINVAD_ENDF 358 0x0800 //TX_C_POST_FLT_DT 359 0x0CCD //TX_NS_B_POST_FLT_LESSCUT @@ -23177,7 +35085,7 @@ 364 0x0000 //TX_K_APT 365 0x0001 //TX_NOISEDET 366 0x0064 //TX_NDETCT -367 0x0032 //TX_NOISE_TH_0 +367 0x0102 //TX_NOISE_TH_0 368 0x7FFF //TX_NOISE_TH_0_2 369 0x7FFF //TX_NOISE_TH_0_3 370 0x017E //TX_NOISE_TH_1 @@ -23189,11 +35097,11 @@ 376 0x0001 //TX_NOISE_TH_5_3 377 0x7FFF //TX_NOISE_TH_5_4 378 0x0F0A //TX_NOISE_TH_6 -379 0x0033 //TX_MINENOISE_TH -380 0x4000 //TX_MINENOISE_MIC0_TH_MTS -381 0xFFEE //TX_MINENOISE_MIC0_TH_EXP -382 0x6000 //TX_MINENOISE_MIC0_S_TH_MTS -383 0xFFF3 //TX_MINENOISE_MIC0_S_TH_EXP +379 0x00F8 //TX_MINENOISE_TH +380 0xD508 //TX_MORENS_TFMASK_TH +381 0x0001 //TX_DRC_QUIET_FLOOR +382 0x3A98 //TX_RATIODTL_CUT_TH +383 0x0DAC //TX_DT_CUT_K1 384 0x0666 //TX_OUT_ENER_S_TH_CLEAN 385 0x0666 //TX_OUT_ENER_S_TH_LESSCLEAN 386 0x0333 //TX_OUT_ENER_S_TH_NOISY @@ -23201,22 +35109,22 @@ 388 0x0333 //TX_OUT_ENER_TH_SPEECH 389 0x2000 //TX_SN_NPB_GAIN 390 0x0000 //TX_NN_NPB_GAIN -391 0x0000 //TX_CSX_ALPHA_0 -392 0x0000 //TX_CSX_ALPHA_1 -393 0x0000 //TX_CSX_ALPHA_2 -394 0x0000 //TX_CSX_ALPHA_3 -395 0x0800 //TX_MU_ARSP_EST -396 0x00C8 //TX_P_OUTBEAM_MIN_TH +391 0x7FFF //TX_POST_MASK_SUP_HSNE +392 0x1388 //TX_TAIL_DET_TH +393 0x4000 //TX_B_LESSCUT_RTO_WTA +394 0x0000 //TX_MEL_G_R +395 0x0080 //TX_SUPHIGH_TH +396 0x0000 //TX_MASK_G_R 397 0x0002 //TX_EXTRA_NS_L -398 0x0800 //TX_EXTRA_NS_A -399 0x0005 //TX_VR_NOISE_FLOOR_TH +398 0x1800 //TX_C_POST_FLT_MASK +399 0x7FFF //TX_A_POST_FLT_WNS 400 0x0148 //TX_MIN_G_LOW300HZ -401 0x0001 //TX_MAXLEVEL_CNG +401 0x0004 //TX_MAXLEVEL_CNG 402 0x00B4 //TX_STN_NOISE_TH 403 0x4000 //TX_POST_MASK_SUP 404 0x7FFF //TX_POST_MASK_ADJUST 405 0x00C8 //TX_NS_ENOISE_MIC0_TH -406 0x0033 //TX_MINENOISE_MIC0_TH +406 0x00DC //TX_MINENOISE_MIC0_TH 407 0x012C //TX_MINENOISE_MIC0_S_TH 408 0x7FFF //TX_MIN_G_CTRL_SSNS 409 0x0000 //TX_METAL_RTO_THR @@ -23324,16 +35232,16 @@ 511 0x6666 //TX_MIC_TO_BFGAIN 512 0x0000 //TX_MICTOBFGAIN0 513 0x0000 //TX_FASTMUE_TH -514 0x0000 //TX_DERVB_LEN_0 -515 0x0000 //TX_DERVB_LEN_1 -516 0x0000 //TX_RHO_DERVB -517 0x0000 //TX_MIC_INDX_DERVB -518 0x0000 //TX_MU_DERVB -519 0x0000 //TX_DR_RESRV_0 -520 0x0000 //TX_DR_RESRV_1 -521 0x0000 //TX_DR_RESRV_2 -522 0x0000 //TX_DR_RESRV_3 -523 0x0000 //TX_DR_RESRV_4 +514 0xC000 //TX_DEREVERB_LF_MU +515 0xC000 //TX_DEREVERB_HF_MU +516 0xCCCC //TX_DEREVERB_DELAY +517 0xD999 //TX_DEREVERB_COEF_LEN +518 0x1F40 //TX_DEREVERB_DNR +519 0x0000 //TX_DEREVERB_ALPHA +520 0x0000 //TX_DEREVERB_BETA +521 0x0000 //TX_GSC_RTOL_TH +522 0x7000 //TX_GSC_RTOH_TH +523 0x0064 //TX_WIDE2_MEANHTH 524 0x0000 //TX_DR_RESRV_5 525 0x0000 //TX_DR_RESRV_6 526 0x0000 //TX_DR_RESRV_7 @@ -23376,19 +35284,19 @@ 563 0x0000 //TX_SAM_MARK 564 0x0000 //TX_PB_RESRV_0 565 0x0000 //TX_PB_RESRV_1 -566 0x001C //TX_FDEQ_SUBNUM -567 0x5050 //TX_FDEQ_GAIN_0 -568 0x5048 //TX_FDEQ_GAIN_1 +566 0x0020 //TX_FDEQ_SUBNUM +567 0x5454 //TX_FDEQ_GAIN_0 +568 0x5448 //TX_FDEQ_GAIN_1 569 0x4848 //TX_FDEQ_GAIN_2 570 0x4848 //TX_FDEQ_GAIN_3 571 0x4848 //TX_FDEQ_GAIN_4 572 0x4850 //TX_FDEQ_GAIN_5 573 0x5050 //TX_FDEQ_GAIN_6 -574 0x5048 //TX_FDEQ_GAIN_7 -575 0x4848 //TX_FDEQ_GAIN_8 -576 0x4844 //TX_FDEQ_GAIN_9 -577 0x3C36 //TX_FDEQ_GAIN_10 -578 0x3A3A //TX_FDEQ_GAIN_11 +574 0x5448 //TX_FDEQ_GAIN_7 +575 0x464C //TX_FDEQ_GAIN_8 +576 0x5050 //TX_FDEQ_GAIN_9 +577 0x4848 //TX_FDEQ_GAIN_10 +578 0x4848 //TX_FDEQ_GAIN_11 579 0x4848 //TX_FDEQ_GAIN_12 580 0x4848 //TX_FDEQ_GAIN_13 581 0x4848 //TX_FDEQ_GAIN_14 @@ -23411,10 +35319,10 @@ 598 0x090A //TX_FDEQ_BIN_7 599 0x0B0C //TX_FDEQ_BIN_8 600 0x0D0E //TX_FDEQ_BIN_9 -601 0x0E0F //TX_FDEQ_BIN_10 -602 0x0F10 //TX_FDEQ_BIN_11 -603 0x1011 //TX_FDEQ_BIN_12 -604 0x1104 //TX_FDEQ_BIN_13 +601 0x0F10 //TX_FDEQ_BIN_10 +602 0x1011 //TX_FDEQ_BIN_11 +603 0x1112 //TX_FDEQ_BIN_12 +604 0x120B //TX_FDEQ_BIN_13 605 0x0000 //TX_FDEQ_BIN_14 606 0x0000 //TX_FDEQ_BIN_15 607 0x0000 //TX_FDEQ_BIN_16 @@ -23434,13 +35342,13 @@ 621 0x4848 //TX_PREEQ_GAIN_MIC0_4 622 0x4848 //TX_PREEQ_GAIN_MIC0_5 623 0x4848 //TX_PREEQ_GAIN_MIC0_6 -624 0x484A //TX_PREEQ_GAIN_MIC0_7 -625 0x4C4E //TX_PREEQ_GAIN_MIC0_8 -626 0x5054 //TX_PREEQ_GAIN_MIC0_9 -627 0x5658 //TX_PREEQ_GAIN_MIC0_10 -628 0x5C5C //TX_PREEQ_GAIN_MIC0_11 -629 0x5E64 //TX_PREEQ_GAIN_MIC0_12 -630 0x6464 //TX_PREEQ_GAIN_MIC0_13 +624 0x4848 //TX_PREEQ_GAIN_MIC0_7 +625 0x484A //TX_PREEQ_GAIN_MIC0_8 +626 0x4B4C //TX_PREEQ_GAIN_MIC0_9 +627 0x4B4A //TX_PREEQ_GAIN_MIC0_10 +628 0x4A48 //TX_PREEQ_GAIN_MIC0_11 +629 0x4C4C //TX_PREEQ_GAIN_MIC0_12 +630 0x4C4C //TX_PREEQ_GAIN_MIC0_13 631 0x4848 //TX_PREEQ_GAIN_MIC0_14 632 0x4848 //TX_PREEQ_GAIN_MIC0_15 633 0x4848 //TX_PREEQ_GAIN_MIC0_16 @@ -23463,8 +35371,8 @@ 650 0x0D0E //TX_PREEQ_BIN_MIC0_9 651 0x0F10 //TX_PREEQ_BIN_MIC0_10 652 0x1011 //TX_PREEQ_BIN_MIC0_11 -653 0x1104 //TX_PREEQ_BIN_MIC0_12 -654 0x1010 //TX_PREEQ_BIN_MIC0_13 +653 0x1112 //TX_PREEQ_BIN_MIC0_12 +654 0x120B //TX_PREEQ_BIN_MIC0_13 655 0x0000 //TX_PREEQ_BIN_MIC0_14 656 0x0000 //TX_PREEQ_BIN_MIC0_15 657 0x0000 //TX_PREEQ_BIN_MIC0_16 @@ -23483,12 +35391,12 @@ 670 0x4848 //TX_PREEQ_GAIN_MIC1_4 671 0x4848 //TX_PREEQ_GAIN_MIC1_5 672 0x4848 //TX_PREEQ_GAIN_MIC1_6 -673 0x4848 //TX_PREEQ_GAIN_MIC1_7 -674 0x4848 //TX_PREEQ_GAIN_MIC1_8 -675 0x4848 //TX_PREEQ_GAIN_MIC1_9 -676 0x4848 //TX_PREEQ_GAIN_MIC1_10 -677 0x4848 //TX_PREEQ_GAIN_MIC1_11 -678 0x4848 //TX_PREEQ_GAIN_MIC1_12 +673 0x4846 //TX_PREEQ_GAIN_MIC1_7 +674 0x4544 //TX_PREEQ_GAIN_MIC1_8 +675 0x4241 //TX_PREEQ_GAIN_MIC1_9 +676 0x403E //TX_PREEQ_GAIN_MIC1_10 +677 0x3D3C //TX_PREEQ_GAIN_MIC1_11 +678 0x3C3C //TX_PREEQ_GAIN_MIC1_12 679 0x4848 //TX_PREEQ_GAIN_MIC1_13 680 0x4848 //TX_PREEQ_GAIN_MIC1_14 681 0x4848 //TX_PREEQ_GAIN_MIC1_15 @@ -23500,19 +35408,19 @@ 687 0x4848 //TX_PREEQ_GAIN_MIC1_21 688 0x4848 //TX_PREEQ_GAIN_MIC1_22 689 0x4848 //TX_PREEQ_GAIN_MIC1_23 -690 0x251A //TX_PREEQ_BIN_MIC1_0 -691 0x0F0F //TX_PREEQ_BIN_MIC1_1 -692 0x0C0C //TX_PREEQ_BIN_MIC1_2 -693 0x0C0F //TX_PREEQ_BIN_MIC1_3 -694 0x0F0F //TX_PREEQ_BIN_MIC1_4 -695 0x0F09 //TX_PREEQ_BIN_MIC1_5 -696 0x0909 //TX_PREEQ_BIN_MIC1_6 -697 0x0908 //TX_PREEQ_BIN_MIC1_7 -698 0x0700 //TX_PREEQ_BIN_MIC1_8 -699 0x0000 //TX_PREEQ_BIN_MIC1_9 -700 0x0000 //TX_PREEQ_BIN_MIC1_10 -701 0x0000 //TX_PREEQ_BIN_MIC1_11 -702 0x0000 //TX_PREEQ_BIN_MIC1_12 +690 0x0202 //TX_PREEQ_BIN_MIC1_0 +691 0x0203 //TX_PREEQ_BIN_MIC1_1 +692 0x0303 //TX_PREEQ_BIN_MIC1_2 +693 0x0304 //TX_PREEQ_BIN_MIC1_3 +694 0x0405 //TX_PREEQ_BIN_MIC1_4 +695 0x0506 //TX_PREEQ_BIN_MIC1_5 +696 0x0708 //TX_PREEQ_BIN_MIC1_6 +697 0x090A //TX_PREEQ_BIN_MIC1_7 +698 0x0B0C //TX_PREEQ_BIN_MIC1_8 +699 0x0F10 //TX_PREEQ_BIN_MIC1_9 +700 0x1011 //TX_PREEQ_BIN_MIC1_10 +701 0x1112 //TX_PREEQ_BIN_MIC1_11 +702 0x1208 //TX_PREEQ_BIN_MIC1_12 703 0x0000 //TX_PREEQ_BIN_MIC1_13 704 0x0000 //TX_PREEQ_BIN_MIC1_14 705 0x0000 //TX_PREEQ_BIN_MIC1_15 @@ -23601,7 +35509,7 @@ 788 0x7EB8 //TX_TDDRC_ALPHA_DWN_02 789 0x7EB8 //TX_TDDRC_ALPHA_DWN_03 790 0x7EB8 //TX_TDDRC_ALPHA_DWN_04 -791 0x7FFF //TX_TDDRC_TD_DRC_LIMIT +791 0x7214 //TX_TDDRC_TD_DRC_LIMIT 792 0x0800 //TX_TDDRC_POST_LIMIT_GAIN 793 0x0000 //TX_TDDRC_RESRV_0 794 0x0000 //TX_TDDRC_RESRV_1 @@ -23668,15 +35576,15 @@ 855 0x0002 //TX_TDDRC_THRD_1 856 0x1800 //TX_TDDRC_THRD_2 857 0x1800 //TX_TDDRC_THRD_3 -858 0x6000 //TX_TDDRC_SLANT_0 -859 0x6000 //TX_TDDRC_SLANT_1 +858 0x7FFF //TX_TDDRC_SLANT_0 +859 0x7FFF //TX_TDDRC_SLANT_1 860 0x0800 //TX_TDDRC_ALPHA_UP_00 861 0x7EB8 //TX_TDDRC_ALPHA_DWN_00 862 0x0000 //TX_TDDRC_HMNC_FLAG 863 0x199A //TX_TDDRC_HMNC_GAIN 864 0x0000 //TX_TDDRC_SMT_FLAG 865 0x0CCD //TX_TDDRC_SMT_W -866 0x0BE3 //TX_TDDRC_DRC_GAIN +866 0x0C97 //TX_TDDRC_DRC_GAIN 867 0x7FFF //TX_TDDRC_LMT_THRD 868 0x0000 //TX_TDDRC_LMT_ALPHA 869 0x0000 //TX_TFMASKLTH @@ -23701,14 +35609,79 @@ 888 0x0028 //TX_FASTNS_ARSPC_TH 889 0xC000 //TX_FASTNS_MASK5_TH 890 0x4848 //TX_POSTSSA_MIN_G_VR_MASK -891 0x1000 //TX_A_LESSCUT_RTO_MASK +891 0x4000 //TX_A_LESSCUT_RTO_MASK 892 0x1770 //TX_FASTNS_NOISETH 893 0xC000 //TX_FASTNS_SSA_THLFL 894 0xC000 //TX_FASTNS_SSA_THHFL 895 0xCCCC //TX_FASTNS_SSA_THLFH 896 0xD999 //TX_FASTNS_SSA_THHFH +897 0x2339 //TX_SENDFUNC_REG_MICMUTE +898 0x0021 //TX_SENDFUNC_REG_MICMUTE1 +899 0x02BC //TX_MICMUTE_RATIO_THR +900 0x0140 //TX_MICMUTE_AMP_THR +901 0x0004 //TX_MICMUTE_HPF_IND +902 0x00C0 //TX_MICMUTE_LOG_EYR_TH +903 0x0008 //TX_MICMUTE_CVG_TIME +904 0x0008 //TX_MICMUTE_RELEASE_TIME +905 0x01FE //TX_MIC_VOLUME_MIC0MUTE +906 0x0020 //TX_MICMUTE_EPD_OFFSET_0 +907 0x001E //TX_MICMUTE_FRQ_AEC_L +908 0x7999 //TX_MICMUTE_EAD_THR +909 0x7FFF //TX_MICMUTE_LAMBDA_CB_NLE +910 0x7FFF //TX_MICMUTE_LAMBDA_RE_EST +911 0x4000 //TX_DTD_THR1_MICMUTE_0 +912 0x7000 //TX_DTD_THR1_MICMUTE_1 +913 0x7FFF //TX_DTD_THR1_MICMUTE_2 +914 0x7FFF //TX_DTD_THR1_MICMUTE_3 +915 0x6CCC //TX_DTD_THR2_MICMUTE_0 +916 0x0400 //TX_MICMUTE_MIN_EQ_RE_EST_0 +917 0x0400 //TX_MICMUTE_MIN_EQ_RE_EST_1 +918 0x1000 //TX_MICMUTE_MIN_EQ_RE_EST_2 +919 0x7FFF //TX_MICMUTE_MIN_EQ_RE_EST_3 +920 0x7FFF //TX_MICMUTE_MIN_EQ_RE_EST_4 +921 0x4000 //TX_MICMUTE_C_POST_FLT +922 0x03E8 //TX_MICMUTE_DT_CUT_K +923 0x0001 //TX_MICMUTE_DT_CUT_THR +924 0x03E8 //TX_MICMUTE_DT_CUT_K2 +925 0x0001 //TX_MICMUTE_DT_CUT_THR2 +926 0x0064 //TX_MICMUTE_DT2_HOLD_N +927 0x1000 //TX_MICMUTE_RATIODTH_THCUT +928 0x1000 //TX_MICMUTE_B_POST_FLT_ECHOL +929 0x7FFF //TX_MICMUTE_B_POST_FLT_ECHOH +930 0x0400 //TX_MICMUTE_C_POST_FLT_MASK +931 0x7999 //TX_MICMUTE_RATIODTL_CUT_TH +932 0x0258 //TX_MICMUTE_DT_CUT_K1 +933 0x0800 //TX_MICMUTE_N2_SN_EST +934 0xFC00 //TX_MICMUTE_THR_SN_EST_0 +935 0x001C //TX_MICMUTE_MIN_G_CTRL_0 +936 0x6000 //TX_MICMUTE_A_POST_FILT_S_0 +937 0x7000 //TX_MICMUTE_B_POST_FILT_0 +938 0x2710 //TX_MIC1RUB_AMP_THR +939 0x0010 //TX_MIC1MUTE_RATIO_THR +940 0x0450 //TX_MIC1MUTE_AMP_THR +941 0x0008 //TX_MIC1MUTE_CVG_TIME +942 0x0008 //TX_MIC1MUTE_RELEASE_TIME +943 0x0000 //TX_AMS_RESRV_01 +944 0x0000 //TX_AMS_RESRV_02 +945 0x0000 //TX_AMS_RESRV_03 +946 0x0000 //TX_AMS_RESRV_04 +947 0x0000 //TX_AMS_RESRV_05 +948 0x0000 //TX_AMS_RESRV_06 +949 0x0000 //TX_AMS_RESRV_07 +950 0x0000 //TX_AMS_RESRV_08 +951 0x0000 //TX_AMS_RESRV_09 +952 0x0000 //TX_AMS_RESRV_10 +953 0x0000 //TX_AMS_RESRV_11 +954 0x0000 //TX_AMS_RESRV_12 +955 0x0000 //TX_AMS_RESRV_13 +956 0x0000 //TX_AMS_RESRV_14 +957 0x0000 //TX_AMS_RESRV_15 +958 0x0000 //TX_AMS_RESRV_16 +959 0x0000 //TX_AMS_RESRV_17 +960 0x0000 //TX_AMS_RESRV_18 +961 0x0000 //TX_AMS_RESRV_19 #RX -0 0x002C //RX_RECVFUNC_MODE_0 +0 0x202C //RX_RECVFUNC_MODE_0 1 0x0000 //RX_RECVFUNC_MODE_1 2 0x0001 //RX_SAMPLINGFREQ_SIG 3 0x0001 //RX_SAMPLINGFREQ_PROC @@ -24558,18 +36531,869 @@ 110 0x0000 //RX_FDDRC_RESRV_0 129 0x0100 //RX_SPK_VOL 130 0x0000 //RX_VOL_RESRV_0 +#RX 2 +157 0x202C //RX_RECVFUNC_MODE_0 +158 0x0000 //RX_RECVFUNC_MODE_1 +159 0x0001 //RX_SAMPLINGFREQ_SIG +160 0x0001 //RX_SAMPLINGFREQ_PROC +161 0x000A //RX_FRAME_SZ +162 0x0000 //RX_DELAY_OPT +163 0x3000 //RX_TDDRC_ALPHA_UP_1 +164 0x3000 //RX_TDDRC_ALPHA_UP_2 +165 0x3000 //RX_TDDRC_ALPHA_UP_3 +166 0x3000 //RX_TDDRC_ALPHA_UP_4 +167 0x0800 //RX_PGA +168 0x7FFF //RX_A_HP +169 0x4000 //RX_B_PE +170 0x3800 //RX_THR_PITCH_DET_0 +171 0x3000 //RX_THR_PITCH_DET_1 +172 0x2800 //RX_THR_PITCH_DET_2 +173 0x0008 //RX_PITCH_BFR_LEN +174 0x0003 //RX_SBD_PITCH_DET +175 0x0100 //RX_PP_RESRV_0 +176 0x0020 //RX_PP_RESRV_1 +177 0x0600 //RX_N_SN_EST +178 0x000C //RX_N2_SN_EST +179 0x0010 //RX_NS_LVL_CTRL +180 0xF800 //RX_THR_SN_EST +181 0x7CCD //RX_LAMBDA_PFILT +182 0x000A //RX_FENS_RESRV_0 +183 0x0190 //RX_FENS_RESRV_1 +184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +187 0x0002 //RX_EXTRA_NS_L +188 0x0800 //RX_EXTRA_NS_A +189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +190 0x7FFF //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +192 0x199A //RX_A_POST_FLT +193 0x0000 //RX_LMT_THRD +194 0x4000 //RX_LMT_ALPHA +195 0x001C //RX_FDEQ_SUBNUM +196 0x4848 //RX_FDEQ_GAIN_0 +197 0x4848 //RX_FDEQ_GAIN_1 +198 0x4848 //RX_FDEQ_GAIN_2 +199 0x4848 //RX_FDEQ_GAIN_3 +200 0x4848 //RX_FDEQ_GAIN_4 +201 0x4848 //RX_FDEQ_GAIN_5 +202 0x4848 //RX_FDEQ_GAIN_6 +203 0x4848 //RX_FDEQ_GAIN_7 +204 0x4848 //RX_FDEQ_GAIN_8 +205 0x4848 //RX_FDEQ_GAIN_9 +206 0x4848 //RX_FDEQ_GAIN_10 +207 0x4848 //RX_FDEQ_GAIN_11 +208 0x4848 //RX_FDEQ_GAIN_12 +209 0x4848 //RX_FDEQ_GAIN_13 +210 0x4848 //RX_FDEQ_GAIN_14 +211 0x4848 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0202 //RX_FDEQ_BIN_0 +221 0x0203 //RX_FDEQ_BIN_1 +222 0x0303 //RX_FDEQ_BIN_2 +223 0x0304 //RX_FDEQ_BIN_3 +224 0x0405 //RX_FDEQ_BIN_4 +225 0x0506 //RX_FDEQ_BIN_5 +226 0x0708 //RX_FDEQ_BIN_6 +227 0x090A //RX_FDEQ_BIN_7 +228 0x0B0C //RX_FDEQ_BIN_8 +229 0x0D0E //RX_FDEQ_BIN_9 +230 0x0E0F //RX_FDEQ_BIN_10 +231 0x0F10 //RX_FDEQ_BIN_11 +232 0x1011 //RX_FDEQ_BIN_12 +233 0x1104 //RX_FDEQ_BIN_13 +234 0x0000 //RX_FDEQ_BIN_14 +235 0x0000 //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x4000 //RX_FDEQ_RESRV_0 +245 0x0320 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0030 //RX_FDDRC_BAND_MARGIN_1 +248 0x0050 //RX_FDDRC_BAND_MARGIN_2 +249 0x0080 //RX_FDDRC_BAND_MARGIN_3 +250 0x0007 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x5000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x6400 //RX_FDDRC_THRD_3_2 +258 0x6400 //RX_FDDRC_THRD_3_3 +259 0x2000 //RX_FDDRC_SLANT_0_0 +260 0x2000 //RX_FDDRC_SLANT_0_1 +261 0x2000 //RX_FDDRC_SLANT_0_2 +262 0x2000 //RX_FDDRC_SLANT_0_3 +263 0x5333 //RX_FDDRC_SLANT_1_0 +264 0x5333 //RX_FDDRC_SLANT_1_1 +265 0x5333 //RX_FDDRC_SLANT_1_2 +266 0x5333 //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +268 0x0002 //RX_FILTINDX +269 0x0000 //RX_TDDRC_THRD_0 +270 0x0000 //RX_TDDRC_THRD_1 +271 0x2000 //RX_TDDRC_THRD_2 +272 0x3000 //RX_TDDRC_THRD_3 +273 0x0800 //RX_TDDRC_SLANT_0 +274 0x7EB8 //RX_TDDRC_SLANT_1 +275 0x3000 //RX_TDDRC_ALPHA_UP_0 +276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x199A //RX_TDDRC_HMNC_GAIN +279 0x0001 //RX_TDDRC_SMT_FLAG +280 0x0CCD //RX_TDDRC_SMT_W +281 0x0196 //RX_TDDRC_DRC_GAIN +282 0x7C00 //RX_LAMBDA_PKA_FP +283 0x2000 //RX_TPKA_FP +284 0x2000 //RX_MIN_G_FP +285 0x0080 //RX_MAX_G_FP +286 0x000B //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 +288 0x0000 //RX_MAXLEVEL_CNG +289 0x3000 //RX_BWE_UV_TH +290 0x3000 //RX_BWE_UV_TH2 +291 0x1800 //RX_BWE_UV_TH3 +292 0x1000 //RX_BWE_V_TH +293 0x04CD //RX_BWE_GAIN1_V_TH1 +294 0x0F33 //RX_BWE_GAIN1_V_TH2 +295 0x7333 //RX_BWE_UV_EQ +296 0x199A //RX_BWE_V_EQ +297 0x7333 //RX_BWE_TONE_TH +298 0x0004 //RX_BWE_UV_HOLD_T +299 0x6CCD //RX_BWE_GAIN2_ALPHA +300 0x799A //RX_BWE_GAIN3_ALPHA +301 0x001E //RX_BWE_CUTOFF +302 0x3000 //RX_BWE_GAINFILL +303 0x3200 //RX_BWE_MAXTH_TONE +304 0x2000 //RX_BWE_EQ_0 +305 0x2000 //RX_BWE_EQ_1 +306 0x2000 //RX_BWE_EQ_2 +307 0x2000 //RX_BWE_EQ_3 +308 0x2000 //RX_BWE_EQ_4 +309 0x2000 //RX_BWE_EQ_5 +310 0x2000 //RX_BWE_EQ_6 +311 0x0000 //RX_BWE_RESRV_0 +312 0x0000 //RX_BWE_RESRV_1 +313 0x0000 //RX_BWE_RESRV_2 +#VOL 0 +163 0x3000 //RX_TDDRC_ALPHA_UP_1 +164 0x3000 //RX_TDDRC_ALPHA_UP_2 +165 0x3000 //RX_TDDRC_ALPHA_UP_3 +166 0x3000 //RX_TDDRC_ALPHA_UP_4 +184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +190 0x7FFF //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +269 0x0000 //RX_TDDRC_THRD_0 +270 0x0000 //RX_TDDRC_THRD_1 +271 0x2000 //RX_TDDRC_THRD_2 +272 0x3000 //RX_TDDRC_THRD_3 +273 0x0800 //RX_TDDRC_SLANT_0 +274 0x7EB8 //RX_TDDRC_SLANT_1 +275 0x3000 //RX_TDDRC_ALPHA_UP_0 +276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x199A //RX_TDDRC_HMNC_GAIN +279 0x0001 //RX_TDDRC_SMT_FLAG +280 0x0CCD //RX_TDDRC_SMT_W +281 0x0196 //RX_TDDRC_DRC_GAIN +195 0x001C //RX_FDEQ_SUBNUM +196 0x4848 //RX_FDEQ_GAIN_0 +197 0x4848 //RX_FDEQ_GAIN_1 +198 0x4848 //RX_FDEQ_GAIN_2 +199 0x4848 //RX_FDEQ_GAIN_3 +200 0x4848 //RX_FDEQ_GAIN_4 +201 0x4848 //RX_FDEQ_GAIN_5 +202 0x4848 //RX_FDEQ_GAIN_6 +203 0x4848 //RX_FDEQ_GAIN_7 +204 0x4848 //RX_FDEQ_GAIN_8 +205 0x4848 //RX_FDEQ_GAIN_9 +206 0x4848 //RX_FDEQ_GAIN_10 +207 0x4848 //RX_FDEQ_GAIN_11 +208 0x4848 //RX_FDEQ_GAIN_12 +209 0x4848 //RX_FDEQ_GAIN_13 +210 0x4848 //RX_FDEQ_GAIN_14 +211 0x4848 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0202 //RX_FDEQ_BIN_0 +221 0x0203 //RX_FDEQ_BIN_1 +222 0x0303 //RX_FDEQ_BIN_2 +223 0x0304 //RX_FDEQ_BIN_3 +224 0x0405 //RX_FDEQ_BIN_4 +225 0x0506 //RX_FDEQ_BIN_5 +226 0x0708 //RX_FDEQ_BIN_6 +227 0x090A //RX_FDEQ_BIN_7 +228 0x0B0C //RX_FDEQ_BIN_8 +229 0x0D0E //RX_FDEQ_BIN_9 +230 0x0E0F //RX_FDEQ_BIN_10 +231 0x0F10 //RX_FDEQ_BIN_11 +232 0x1011 //RX_FDEQ_BIN_12 +233 0x1104 //RX_FDEQ_BIN_13 +234 0x0000 //RX_FDEQ_BIN_14 +235 0x0000 //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x4000 //RX_FDEQ_RESRV_0 +245 0x0320 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0030 //RX_FDDRC_BAND_MARGIN_1 +248 0x0050 //RX_FDDRC_BAND_MARGIN_2 +249 0x0080 //RX_FDDRC_BAND_MARGIN_3 +250 0x0007 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x5000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x6400 //RX_FDDRC_THRD_3_2 +258 0x6400 //RX_FDDRC_THRD_3_3 +259 0x2000 //RX_FDDRC_SLANT_0_0 +260 0x2000 //RX_FDDRC_SLANT_0_1 +261 0x2000 //RX_FDDRC_SLANT_0_2 +262 0x2000 //RX_FDDRC_SLANT_0_3 +263 0x5333 //RX_FDDRC_SLANT_1_0 +264 0x5333 //RX_FDDRC_SLANT_1_1 +265 0x5333 //RX_FDDRC_SLANT_1_2 +266 0x5333 //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +286 0x000B //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 +#VOL 1 +163 0x3000 //RX_TDDRC_ALPHA_UP_1 +164 0x3000 //RX_TDDRC_ALPHA_UP_2 +165 0x3000 //RX_TDDRC_ALPHA_UP_3 +166 0x3000 //RX_TDDRC_ALPHA_UP_4 +184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +190 0x7FFF //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +269 0x0000 //RX_TDDRC_THRD_0 +270 0x0000 //RX_TDDRC_THRD_1 +271 0x2000 //RX_TDDRC_THRD_2 +272 0x3000 //RX_TDDRC_THRD_3 +273 0x0800 //RX_TDDRC_SLANT_0 +274 0x7EB8 //RX_TDDRC_SLANT_1 +275 0x3000 //RX_TDDRC_ALPHA_UP_0 +276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x199A //RX_TDDRC_HMNC_GAIN +279 0x0001 //RX_TDDRC_SMT_FLAG +280 0x0CCD //RX_TDDRC_SMT_W +281 0x0196 //RX_TDDRC_DRC_GAIN +195 0x001C //RX_FDEQ_SUBNUM +196 0x4848 //RX_FDEQ_GAIN_0 +197 0x4848 //RX_FDEQ_GAIN_1 +198 0x4848 //RX_FDEQ_GAIN_2 +199 0x4848 //RX_FDEQ_GAIN_3 +200 0x4848 //RX_FDEQ_GAIN_4 +201 0x4848 //RX_FDEQ_GAIN_5 +202 0x4848 //RX_FDEQ_GAIN_6 +203 0x4848 //RX_FDEQ_GAIN_7 +204 0x4848 //RX_FDEQ_GAIN_8 +205 0x4848 //RX_FDEQ_GAIN_9 +206 0x4848 //RX_FDEQ_GAIN_10 +207 0x4848 //RX_FDEQ_GAIN_11 +208 0x4848 //RX_FDEQ_GAIN_12 +209 0x4848 //RX_FDEQ_GAIN_13 +210 0x4848 //RX_FDEQ_GAIN_14 +211 0x4848 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0202 //RX_FDEQ_BIN_0 +221 0x0203 //RX_FDEQ_BIN_1 +222 0x0303 //RX_FDEQ_BIN_2 +223 0x0304 //RX_FDEQ_BIN_3 +224 0x0405 //RX_FDEQ_BIN_4 +225 0x0506 //RX_FDEQ_BIN_5 +226 0x0708 //RX_FDEQ_BIN_6 +227 0x090A //RX_FDEQ_BIN_7 +228 0x0B0C //RX_FDEQ_BIN_8 +229 0x0D0E //RX_FDEQ_BIN_9 +230 0x0E0F //RX_FDEQ_BIN_10 +231 0x0F10 //RX_FDEQ_BIN_11 +232 0x1011 //RX_FDEQ_BIN_12 +233 0x1104 //RX_FDEQ_BIN_13 +234 0x0000 //RX_FDEQ_BIN_14 +235 0x0000 //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x4000 //RX_FDEQ_RESRV_0 +245 0x0320 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0030 //RX_FDDRC_BAND_MARGIN_1 +248 0x0050 //RX_FDDRC_BAND_MARGIN_2 +249 0x0080 //RX_FDDRC_BAND_MARGIN_3 +250 0x0007 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x5000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x6400 //RX_FDDRC_THRD_3_2 +258 0x6400 //RX_FDDRC_THRD_3_3 +259 0x2000 //RX_FDDRC_SLANT_0_0 +260 0x2000 //RX_FDDRC_SLANT_0_1 +261 0x2000 //RX_FDDRC_SLANT_0_2 +262 0x2000 //RX_FDDRC_SLANT_0_3 +263 0x5333 //RX_FDDRC_SLANT_1_0 +264 0x5333 //RX_FDDRC_SLANT_1_1 +265 0x5333 //RX_FDDRC_SLANT_1_2 +266 0x5333 //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +286 0x0013 //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 +#VOL 2 +163 0x3000 //RX_TDDRC_ALPHA_UP_1 +164 0x3000 //RX_TDDRC_ALPHA_UP_2 +165 0x3000 //RX_TDDRC_ALPHA_UP_3 +166 0x3000 //RX_TDDRC_ALPHA_UP_4 +184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +190 0x7FFF //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +269 0x0000 //RX_TDDRC_THRD_0 +270 0x0000 //RX_TDDRC_THRD_1 +271 0x2000 //RX_TDDRC_THRD_2 +272 0x3000 //RX_TDDRC_THRD_3 +273 0x0800 //RX_TDDRC_SLANT_0 +274 0x7EB8 //RX_TDDRC_SLANT_1 +275 0x3000 //RX_TDDRC_ALPHA_UP_0 +276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x199A //RX_TDDRC_HMNC_GAIN +279 0x0001 //RX_TDDRC_SMT_FLAG +280 0x0CCD //RX_TDDRC_SMT_W +281 0x0196 //RX_TDDRC_DRC_GAIN +195 0x001C //RX_FDEQ_SUBNUM +196 0x4848 //RX_FDEQ_GAIN_0 +197 0x4848 //RX_FDEQ_GAIN_1 +198 0x4848 //RX_FDEQ_GAIN_2 +199 0x4848 //RX_FDEQ_GAIN_3 +200 0x4848 //RX_FDEQ_GAIN_4 +201 0x4848 //RX_FDEQ_GAIN_5 +202 0x4848 //RX_FDEQ_GAIN_6 +203 0x4848 //RX_FDEQ_GAIN_7 +204 0x4848 //RX_FDEQ_GAIN_8 +205 0x4848 //RX_FDEQ_GAIN_9 +206 0x4848 //RX_FDEQ_GAIN_10 +207 0x4848 //RX_FDEQ_GAIN_11 +208 0x4848 //RX_FDEQ_GAIN_12 +209 0x4848 //RX_FDEQ_GAIN_13 +210 0x4848 //RX_FDEQ_GAIN_14 +211 0x4848 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0202 //RX_FDEQ_BIN_0 +221 0x0203 //RX_FDEQ_BIN_1 +222 0x0303 //RX_FDEQ_BIN_2 +223 0x0304 //RX_FDEQ_BIN_3 +224 0x0405 //RX_FDEQ_BIN_4 +225 0x0506 //RX_FDEQ_BIN_5 +226 0x0708 //RX_FDEQ_BIN_6 +227 0x090A //RX_FDEQ_BIN_7 +228 0x0B0C //RX_FDEQ_BIN_8 +229 0x0D0E //RX_FDEQ_BIN_9 +230 0x0E0F //RX_FDEQ_BIN_10 +231 0x0F10 //RX_FDEQ_BIN_11 +232 0x1011 //RX_FDEQ_BIN_12 +233 0x1104 //RX_FDEQ_BIN_13 +234 0x0000 //RX_FDEQ_BIN_14 +235 0x0000 //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x4000 //RX_FDEQ_RESRV_0 +245 0x0320 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0030 //RX_FDDRC_BAND_MARGIN_1 +248 0x0050 //RX_FDDRC_BAND_MARGIN_2 +249 0x0080 //RX_FDDRC_BAND_MARGIN_3 +250 0x0007 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x5000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x6400 //RX_FDDRC_THRD_3_2 +258 0x6400 //RX_FDDRC_THRD_3_3 +259 0x2000 //RX_FDDRC_SLANT_0_0 +260 0x2000 //RX_FDDRC_SLANT_0_1 +261 0x2000 //RX_FDDRC_SLANT_0_2 +262 0x2000 //RX_FDDRC_SLANT_0_3 +263 0x5333 //RX_FDDRC_SLANT_1_0 +264 0x5333 //RX_FDDRC_SLANT_1_1 +265 0x5333 //RX_FDDRC_SLANT_1_2 +266 0x5333 //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +286 0x0020 //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 +#VOL 3 +163 0x3000 //RX_TDDRC_ALPHA_UP_1 +164 0x3000 //RX_TDDRC_ALPHA_UP_2 +165 0x3000 //RX_TDDRC_ALPHA_UP_3 +166 0x3000 //RX_TDDRC_ALPHA_UP_4 +184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +190 0x7FFF //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +269 0x0000 //RX_TDDRC_THRD_0 +270 0x0000 //RX_TDDRC_THRD_1 +271 0x2000 //RX_TDDRC_THRD_2 +272 0x3000 //RX_TDDRC_THRD_3 +273 0x0800 //RX_TDDRC_SLANT_0 +274 0x7EB8 //RX_TDDRC_SLANT_1 +275 0x3000 //RX_TDDRC_ALPHA_UP_0 +276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x199A //RX_TDDRC_HMNC_GAIN +279 0x0001 //RX_TDDRC_SMT_FLAG +280 0x0CCD //RX_TDDRC_SMT_W +281 0x0196 //RX_TDDRC_DRC_GAIN +195 0x001C //RX_FDEQ_SUBNUM +196 0x4848 //RX_FDEQ_GAIN_0 +197 0x4848 //RX_FDEQ_GAIN_1 +198 0x4848 //RX_FDEQ_GAIN_2 +199 0x4848 //RX_FDEQ_GAIN_3 +200 0x4848 //RX_FDEQ_GAIN_4 +201 0x4848 //RX_FDEQ_GAIN_5 +202 0x4848 //RX_FDEQ_GAIN_6 +203 0x4848 //RX_FDEQ_GAIN_7 +204 0x4848 //RX_FDEQ_GAIN_8 +205 0x4848 //RX_FDEQ_GAIN_9 +206 0x4848 //RX_FDEQ_GAIN_10 +207 0x4848 //RX_FDEQ_GAIN_11 +208 0x4848 //RX_FDEQ_GAIN_12 +209 0x4848 //RX_FDEQ_GAIN_13 +210 0x4848 //RX_FDEQ_GAIN_14 +211 0x4848 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0202 //RX_FDEQ_BIN_0 +221 0x0203 //RX_FDEQ_BIN_1 +222 0x0303 //RX_FDEQ_BIN_2 +223 0x0304 //RX_FDEQ_BIN_3 +224 0x0405 //RX_FDEQ_BIN_4 +225 0x0506 //RX_FDEQ_BIN_5 +226 0x0708 //RX_FDEQ_BIN_6 +227 0x090A //RX_FDEQ_BIN_7 +228 0x0B0C //RX_FDEQ_BIN_8 +229 0x0D0E //RX_FDEQ_BIN_9 +230 0x0E0F //RX_FDEQ_BIN_10 +231 0x0F10 //RX_FDEQ_BIN_11 +232 0x1011 //RX_FDEQ_BIN_12 +233 0x1104 //RX_FDEQ_BIN_13 +234 0x0000 //RX_FDEQ_BIN_14 +235 0x0000 //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x4000 //RX_FDEQ_RESRV_0 +245 0x0320 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0030 //RX_FDDRC_BAND_MARGIN_1 +248 0x0050 //RX_FDDRC_BAND_MARGIN_2 +249 0x0080 //RX_FDDRC_BAND_MARGIN_3 +250 0x0007 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x5000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x6400 //RX_FDDRC_THRD_3_2 +258 0x6400 //RX_FDDRC_THRD_3_3 +259 0x2000 //RX_FDDRC_SLANT_0_0 +260 0x2000 //RX_FDDRC_SLANT_0_1 +261 0x2000 //RX_FDDRC_SLANT_0_2 +262 0x2000 //RX_FDDRC_SLANT_0_3 +263 0x5333 //RX_FDDRC_SLANT_1_0 +264 0x5333 //RX_FDDRC_SLANT_1_1 +265 0x5333 //RX_FDDRC_SLANT_1_2 +266 0x5333 //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +286 0x0036 //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 +#VOL 4 +163 0x3000 //RX_TDDRC_ALPHA_UP_1 +164 0x3000 //RX_TDDRC_ALPHA_UP_2 +165 0x3000 //RX_TDDRC_ALPHA_UP_3 +166 0x3000 //RX_TDDRC_ALPHA_UP_4 +184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +190 0x7FFF //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +269 0x0000 //RX_TDDRC_THRD_0 +270 0x0000 //RX_TDDRC_THRD_1 +271 0x2000 //RX_TDDRC_THRD_2 +272 0x3000 //RX_TDDRC_THRD_3 +273 0x0800 //RX_TDDRC_SLANT_0 +274 0x7EB8 //RX_TDDRC_SLANT_1 +275 0x3000 //RX_TDDRC_ALPHA_UP_0 +276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x199A //RX_TDDRC_HMNC_GAIN +279 0x0001 //RX_TDDRC_SMT_FLAG +280 0x0CCD //RX_TDDRC_SMT_W +281 0x0196 //RX_TDDRC_DRC_GAIN +195 0x001C //RX_FDEQ_SUBNUM +196 0x4848 //RX_FDEQ_GAIN_0 +197 0x4848 //RX_FDEQ_GAIN_1 +198 0x4848 //RX_FDEQ_GAIN_2 +199 0x4848 //RX_FDEQ_GAIN_3 +200 0x4848 //RX_FDEQ_GAIN_4 +201 0x4848 //RX_FDEQ_GAIN_5 +202 0x4848 //RX_FDEQ_GAIN_6 +203 0x4848 //RX_FDEQ_GAIN_7 +204 0x4848 //RX_FDEQ_GAIN_8 +205 0x4848 //RX_FDEQ_GAIN_9 +206 0x4848 //RX_FDEQ_GAIN_10 +207 0x4848 //RX_FDEQ_GAIN_11 +208 0x4848 //RX_FDEQ_GAIN_12 +209 0x4848 //RX_FDEQ_GAIN_13 +210 0x4848 //RX_FDEQ_GAIN_14 +211 0x4848 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0202 //RX_FDEQ_BIN_0 +221 0x0203 //RX_FDEQ_BIN_1 +222 0x0303 //RX_FDEQ_BIN_2 +223 0x0304 //RX_FDEQ_BIN_3 +224 0x0405 //RX_FDEQ_BIN_4 +225 0x0506 //RX_FDEQ_BIN_5 +226 0x0708 //RX_FDEQ_BIN_6 +227 0x090A //RX_FDEQ_BIN_7 +228 0x0B0C //RX_FDEQ_BIN_8 +229 0x0D0E //RX_FDEQ_BIN_9 +230 0x0E0F //RX_FDEQ_BIN_10 +231 0x0F10 //RX_FDEQ_BIN_11 +232 0x1011 //RX_FDEQ_BIN_12 +233 0x1104 //RX_FDEQ_BIN_13 +234 0x0000 //RX_FDEQ_BIN_14 +235 0x0000 //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x4000 //RX_FDEQ_RESRV_0 +245 0x0320 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0030 //RX_FDDRC_BAND_MARGIN_1 +248 0x0050 //RX_FDDRC_BAND_MARGIN_2 +249 0x0080 //RX_FDDRC_BAND_MARGIN_3 +250 0x0007 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x5000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x6400 //RX_FDDRC_THRD_3_2 +258 0x6400 //RX_FDDRC_THRD_3_3 +259 0x2000 //RX_FDDRC_SLANT_0_0 +260 0x2000 //RX_FDDRC_SLANT_0_1 +261 0x2000 //RX_FDDRC_SLANT_0_2 +262 0x2000 //RX_FDDRC_SLANT_0_3 +263 0x5333 //RX_FDDRC_SLANT_1_0 +264 0x5333 //RX_FDDRC_SLANT_1_1 +265 0x5333 //RX_FDDRC_SLANT_1_2 +266 0x5333 //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +286 0x005B //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 +#VOL 5 +163 0x3000 //RX_TDDRC_ALPHA_UP_1 +164 0x3000 //RX_TDDRC_ALPHA_UP_2 +165 0x3000 //RX_TDDRC_ALPHA_UP_3 +166 0x3000 //RX_TDDRC_ALPHA_UP_4 +184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +190 0x7FFF //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +269 0x0000 //RX_TDDRC_THRD_0 +270 0x0000 //RX_TDDRC_THRD_1 +271 0x2000 //RX_TDDRC_THRD_2 +272 0x3000 //RX_TDDRC_THRD_3 +273 0x0800 //RX_TDDRC_SLANT_0 +274 0x7EB8 //RX_TDDRC_SLANT_1 +275 0x3000 //RX_TDDRC_ALPHA_UP_0 +276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x199A //RX_TDDRC_HMNC_GAIN +279 0x0001 //RX_TDDRC_SMT_FLAG +280 0x0CCD //RX_TDDRC_SMT_W +281 0x0196 //RX_TDDRC_DRC_GAIN +195 0x001C //RX_FDEQ_SUBNUM +196 0x4848 //RX_FDEQ_GAIN_0 +197 0x4848 //RX_FDEQ_GAIN_1 +198 0x4848 //RX_FDEQ_GAIN_2 +199 0x4848 //RX_FDEQ_GAIN_3 +200 0x4848 //RX_FDEQ_GAIN_4 +201 0x4848 //RX_FDEQ_GAIN_5 +202 0x4848 //RX_FDEQ_GAIN_6 +203 0x4848 //RX_FDEQ_GAIN_7 +204 0x4848 //RX_FDEQ_GAIN_8 +205 0x4848 //RX_FDEQ_GAIN_9 +206 0x4848 //RX_FDEQ_GAIN_10 +207 0x4848 //RX_FDEQ_GAIN_11 +208 0x4848 //RX_FDEQ_GAIN_12 +209 0x4848 //RX_FDEQ_GAIN_13 +210 0x4848 //RX_FDEQ_GAIN_14 +211 0x4848 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0202 //RX_FDEQ_BIN_0 +221 0x0203 //RX_FDEQ_BIN_1 +222 0x0303 //RX_FDEQ_BIN_2 +223 0x0304 //RX_FDEQ_BIN_3 +224 0x0405 //RX_FDEQ_BIN_4 +225 0x0506 //RX_FDEQ_BIN_5 +226 0x0708 //RX_FDEQ_BIN_6 +227 0x090A //RX_FDEQ_BIN_7 +228 0x0B0C //RX_FDEQ_BIN_8 +229 0x0D0E //RX_FDEQ_BIN_9 +230 0x0E0F //RX_FDEQ_BIN_10 +231 0x0F10 //RX_FDEQ_BIN_11 +232 0x1011 //RX_FDEQ_BIN_12 +233 0x1104 //RX_FDEQ_BIN_13 +234 0x0000 //RX_FDEQ_BIN_14 +235 0x0000 //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x4000 //RX_FDEQ_RESRV_0 +245 0x0320 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0030 //RX_FDDRC_BAND_MARGIN_1 +248 0x0050 //RX_FDDRC_BAND_MARGIN_2 +249 0x0080 //RX_FDDRC_BAND_MARGIN_3 +250 0x0007 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x5000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x6400 //RX_FDDRC_THRD_3_2 +258 0x6400 //RX_FDDRC_THRD_3_3 +259 0x2000 //RX_FDDRC_SLANT_0_0 +260 0x2000 //RX_FDDRC_SLANT_0_1 +261 0x2000 //RX_FDDRC_SLANT_0_2 +262 0x2000 //RX_FDDRC_SLANT_0_3 +263 0x5333 //RX_FDDRC_SLANT_1_0 +264 0x5333 //RX_FDDRC_SLANT_1_1 +265 0x5333 //RX_FDDRC_SLANT_1_2 +266 0x5333 //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +286 0x0099 //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 +#VOL 6 +163 0x3000 //RX_TDDRC_ALPHA_UP_1 +164 0x3000 //RX_TDDRC_ALPHA_UP_2 +165 0x3000 //RX_TDDRC_ALPHA_UP_3 +166 0x3000 //RX_TDDRC_ALPHA_UP_4 +184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +190 0x7FFF //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +269 0x0000 //RX_TDDRC_THRD_0 +270 0x0000 //RX_TDDRC_THRD_1 +271 0x2000 //RX_TDDRC_THRD_2 +272 0x3000 //RX_TDDRC_THRD_3 +273 0x0800 //RX_TDDRC_SLANT_0 +274 0x7EB8 //RX_TDDRC_SLANT_1 +275 0x3000 //RX_TDDRC_ALPHA_UP_0 +276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x199A //RX_TDDRC_HMNC_GAIN +279 0x0001 //RX_TDDRC_SMT_FLAG +280 0x0CCD //RX_TDDRC_SMT_W +281 0x0196 //RX_TDDRC_DRC_GAIN +195 0x001C //RX_FDEQ_SUBNUM +196 0x4848 //RX_FDEQ_GAIN_0 +197 0x4848 //RX_FDEQ_GAIN_1 +198 0x4848 //RX_FDEQ_GAIN_2 +199 0x4848 //RX_FDEQ_GAIN_3 +200 0x4848 //RX_FDEQ_GAIN_4 +201 0x4848 //RX_FDEQ_GAIN_5 +202 0x4848 //RX_FDEQ_GAIN_6 +203 0x4848 //RX_FDEQ_GAIN_7 +204 0x4848 //RX_FDEQ_GAIN_8 +205 0x4848 //RX_FDEQ_GAIN_9 +206 0x4848 //RX_FDEQ_GAIN_10 +207 0x4848 //RX_FDEQ_GAIN_11 +208 0x4848 //RX_FDEQ_GAIN_12 +209 0x4848 //RX_FDEQ_GAIN_13 +210 0x4848 //RX_FDEQ_GAIN_14 +211 0x4848 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0202 //RX_FDEQ_BIN_0 +221 0x0203 //RX_FDEQ_BIN_1 +222 0x0303 //RX_FDEQ_BIN_2 +223 0x0304 //RX_FDEQ_BIN_3 +224 0x0405 //RX_FDEQ_BIN_4 +225 0x0506 //RX_FDEQ_BIN_5 +226 0x0708 //RX_FDEQ_BIN_6 +227 0x090A //RX_FDEQ_BIN_7 +228 0x0B0C //RX_FDEQ_BIN_8 +229 0x0D0E //RX_FDEQ_BIN_9 +230 0x0E0F //RX_FDEQ_BIN_10 +231 0x0F10 //RX_FDEQ_BIN_11 +232 0x1011 //RX_FDEQ_BIN_12 +233 0x1104 //RX_FDEQ_BIN_13 +234 0x0000 //RX_FDEQ_BIN_14 +235 0x0000 //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x4000 //RX_FDEQ_RESRV_0 +245 0x0320 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0030 //RX_FDDRC_BAND_MARGIN_1 +248 0x0050 //RX_FDDRC_BAND_MARGIN_2 +249 0x0080 //RX_FDDRC_BAND_MARGIN_3 +250 0x0007 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x5000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x6400 //RX_FDDRC_THRD_3_2 +258 0x6400 //RX_FDDRC_THRD_3_3 +259 0x2000 //RX_FDDRC_SLANT_0_0 +260 0x2000 //RX_FDDRC_SLANT_0_1 +261 0x2000 //RX_FDDRC_SLANT_0_2 +262 0x2000 //RX_FDDRC_SLANT_0_3 +263 0x5333 //RX_FDDRC_SLANT_1_0 +264 0x5333 //RX_FDDRC_SLANT_1_1 +265 0x5333 //RX_FDDRC_SLANT_1_2 +266 0x5333 //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +286 0x0100 //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 #CASE_NAME HEADSET-GOOGLE_CONDOR_HEADPHONE-VOICE_GENERIC-SWB -#PARAM_MODE FULL -#PARAM_TYPE TX+RX -#TOTAL_CUSTOM_STEP 7 +#PARAM_MODE Full +#PARAM_TYPE TX+2RX +#TOTAL_CUSTOM_STEP 7+7 #TX 0 0x0001 //TX_OPERATION_MODE_0 1 0x0001 //TX_OPERATION_MODE_1 2 0x0033 //TX_PATCH_REG -3 0x2F7C //TX_SENDFUNC_MODE_0 +3 0x6F7C //TX_SENDFUNC_MODE_0 4 0x0001 //TX_SENDFUNC_MODE_1 -5 0x0003 //TX_NUM_MIC +5 0x0002 //TX_NUM_MIC 6 0x0003 //TX_SAMPLINGFREQ_SIG 7 0x0003 //TX_SAMPLINGFREQ_PROC 8 0x000A //TX_FRAME_SZ_SIG @@ -24585,8 +37409,8 @@ 18 0x0000 //TX_SYS_RESRV_2 19 0x0000 //TX_SYS_RESRV_3 20 0x0000 //TX_DIST2REF0 -21 0x00A4 //TX_DIST2REF1 -22 0x0017 //TX_DIST2REF_02 +21 0x009D //TX_DIST2REF1 +22 0x0010 //TX_DIST2REF_02 23 0x0000 //TX_DIST2REF_03 24 0x0000 //TX_DIST2REF_04 25 0x0000 //TX_DIST2REF_05 @@ -24692,7 +37516,7 @@ 125 0x6000 //TX_C_POST_FLT_MIC_MAINBLK 126 0x6000 //TX_C_POST_FLT_MIC_REFBLK 127 0x0010 //TX_MIC_BLOCK_N -128 0x7B02 //TX_A_HP +128 0x7D83 //TX_A_HP 129 0x4000 //TX_B_PE 130 0x5000 //TX_THR_PITCH_DET_0 131 0x4800 //TX_THR_PITCH_DET_1 @@ -24729,8 +37553,8 @@ 162 0x7800 //TX_MIN_EQ_RE_EST_10 163 0x7800 //TX_MIN_EQ_RE_EST_11 164 0x7800 //TX_MIN_EQ_RE_EST_12 -165 0x4000 //TX_LAMBDA_RE_EST -166 0x3000 //TX_LAMBDA_CB_NLE +165 0x0880 //TX_LAMBDA_RE_EST +166 0x7FFF //TX_LAMBDA_CB_NLE 167 0x7FFF //TX_C_POST_FLT 168 0x4000 //TX_GAIN_NP 169 0x0180 //TX_SE_HOLD_N @@ -24789,16 +37613,16 @@ 222 0x023E //TX_ADPT_STRICT_H 223 0x0BB8 //TX_RATIO_DT_L_TH_LOW 224 0x3A98 //TX_RATIO_DT_H_TH_LOW -225 0x1F40 //TX_RATIO_DT_L_TH_HIGH -226 0x6590 //TX_RATIO_DT_H_TH_HIGH +225 0x1770 //TX_RATIO_DT_L_TH_HIGH +226 0x733C //TX_RATIO_DT_H_TH_HIGH 227 0x09C4 //TX_RATIO_DT_L0_TH -228 0x2000 //TX_B_POST_FILT_ECHO_L -229 0x1000 //TX_B_POST_FILT_ECHO_H +228 0x7FFF //TX_B_POST_FILT_ECHO_L +229 0x7FFF //TX_B_POST_FILT_ECHO_H 230 0x0200 //TX_MIN_G_CTRL_ECHO 231 0x1000 //TX_B_LESSCUT_RTO_ECHO 232 0x0000 //TX_EPD_OFFSET_00 233 0x0000 //TX_EPD_OFFST_01 -234 0x2328 //TX_RATIO_DT_L0_TH_HIGH +234 0x3A98 //TX_RATIO_DT_L0_TH_HIGH 235 0x7FFF //TX_RATIO_DT_H_TH_CUT 236 0x7FFF //TX_MIN_EQ_RE_EST_13 237 0x0000 //TX_DTD_THR1_7 @@ -24806,7 +37630,7 @@ 239 0x0800 //TX_DT_RESRV_7 240 0x0800 //TX_DT_RESRV_8 241 0x0000 //TX_DT_RESRV_9 -242 0xF800 //TX_THR_SN_EST_0 +242 0xFA00 //TX_THR_SN_EST_0 243 0xFA00 //TX_THR_SN_EST_1 244 0xFA00 //TX_THR_SN_EST_2 245 0xFA00 //TX_THR_SN_EST_3 @@ -24817,10 +37641,10 @@ 250 0x0100 //TX_DELTA_THR_SN_EST_0 251 0x0100 //TX_DELTA_THR_SN_EST_1 252 0x0100 //TX_DELTA_THR_SN_EST_2 -253 0x0100 //TX_DELTA_THR_SN_EST_3 -254 0x0000 //TX_DELTA_THR_SN_EST_4 -255 0x0100 //TX_DELTA_THR_SN_EST_5 -256 0x0200 //TX_DELTA_THR_SN_EST_6 +253 0x0000 //TX_DELTA_THR_SN_EST_3 +254 0x0100 //TX_DELTA_THR_SN_EST_4 +255 0x0200 //TX_DELTA_THR_SN_EST_5 +256 0x0100 //TX_DELTA_THR_SN_EST_6 257 0x0200 //TX_DELTA_THR_SN_EST_7 258 0x4000 //TX_LAMBDA_NN_EST_0 259 0x4000 //TX_LAMBDA_NN_EST_1 @@ -24847,11 +37671,11 @@ 280 0x1000 //TX_B_POST_FLT_1 281 0x0010 //TX_NS_LVL_CTRL_0 282 0x003C //TX_NS_LVL_CTRL_1 -283 0x003C //TX_NS_LVL_CTRL_2 -284 0x0024 //TX_NS_LVL_CTRL_3 -285 0x003C //TX_NS_LVL_CTRL_4 -286 0x0014 //TX_NS_LVL_CTRL_5 -287 0x0011 //TX_NS_LVL_CTRL_6 +283 0x0024 //TX_NS_LVL_CTRL_2 +284 0x003C //TX_NS_LVL_CTRL_3 +285 0x0014 //TX_NS_LVL_CTRL_4 +286 0x0011 //TX_NS_LVL_CTRL_5 +287 0x003C //TX_NS_LVL_CTRL_6 288 0x0011 //TX_NS_LVL_CTRL_7 289 0x000F //TX_MIN_GAIN_S_0 290 0x0010 //TX_MIN_GAIN_S_1 @@ -24867,10 +37691,10 @@ 300 0x7FFF //TX_SNRI_SUP_0 301 0x1400 //TX_SNRI_SUP_1 302 0x1400 //TX_SNRI_SUP_2 -303 0x1400 //TX_SNRI_SUP_3 +303 0x4000 //TX_SNRI_SUP_3 304 0x4000 //TX_SNRI_SUP_4 -305 0x4000 //TX_SNRI_SUP_5 -306 0x50C0 //TX_SNRI_SUP_6 +305 0x50C0 //TX_SNRI_SUP_5 +306 0x1400 //TX_SNRI_SUP_6 307 0x7FFF //TX_SNRI_SUP_7 308 0x7FFF //TX_THR_LFNS 309 0x0018 //TX_G_LFNS @@ -24879,19 +37703,19 @@ 312 0x7FFF //TX_A_POST_FILT_0 313 0x2000 //TX_A_POST_FILT_1 314 0x5000 //TX_A_POST_FILT_S_0 -315 0x7C00 //TX_A_POST_FILT_S_1 -316 0x4C00 //TX_A_POST_FILT_S_2 -317 0x4000 //TX_A_POST_FILT_S_3 -318 0x6000 //TX_A_POST_FILT_S_4 -319 0x4000 //TX_A_POST_FILT_S_5 -320 0x5000 //TX_A_POST_FILT_S_6 +315 0x4C00 //TX_A_POST_FILT_S_1 +316 0x4000 //TX_A_POST_FILT_S_2 +317 0x6000 //TX_A_POST_FILT_S_3 +318 0x4000 //TX_A_POST_FILT_S_4 +319 0x5000 //TX_A_POST_FILT_S_5 +320 0x7C00 //TX_A_POST_FILT_S_6 321 0x7000 //TX_A_POST_FILT_S_7 322 0x2000 //TX_B_POST_FILT_0 -323 0x1000 //TX_B_POST_FILT_1 +323 0x6000 //TX_B_POST_FILT_1 324 0x6000 //TX_B_POST_FILT_2 325 0x6000 //TX_B_POST_FILT_3 -326 0x6000 //TX_B_POST_FILT_4 -327 0x4000 //TX_B_POST_FILT_5 +326 0x4000 //TX_B_POST_FILT_4 +327 0x1000 //TX_B_POST_FILT_5 328 0x1000 //TX_B_POST_FILT_6 329 0x2000 //TX_B_POST_FILT_7 330 0x4000 //TX_B_LESSCUT_RTO_S_0 @@ -24899,8 +37723,8 @@ 332 0x7FFF //TX_B_LESSCUT_RTO_S_2 333 0x7FFF //TX_B_LESSCUT_RTO_S_3 334 0x7FFF //TX_B_LESSCUT_RTO_S_4 -335 0x7FFF //TX_B_LESSCUT_RTO_S_5 -336 0x6000 //TX_B_LESSCUT_RTO_S_6 +335 0x6000 //TX_B_LESSCUT_RTO_S_5 +336 0x7FFF //TX_B_LESSCUT_RTO_S_6 337 0x7FFF //TX_B_LESSCUT_RTO_S_7 338 0x7C00 //TX_LAMBDA_PFILT 339 0x7D00 //TX_LAMBDA_PFILT_S_0 @@ -24931,7 +37755,7 @@ 364 0x0000 //TX_K_APT 365 0x0001 //TX_NOISEDET 366 0x0064 //TX_NDETCT -367 0x0050 //TX_NOISE_TH_0 +367 0x0383 //TX_NOISE_TH_0 368 0x7FFF //TX_NOISE_TH_0_2 369 0x7FFF //TX_NOISE_TH_0_3 370 0x07D0 //TX_NOISE_TH_1 @@ -24943,11 +37767,11 @@ 376 0x0000 //TX_NOISE_TH_5_3 377 0x7FFF //TX_NOISE_TH_5_4 378 0x0DAC //TX_NOISE_TH_6 -379 0x0050 //TX_MINENOISE_TH -380 0x4000 //TX_MINENOISE_MIC0_TH_MTS -381 0xFFEE //TX_MINENOISE_MIC0_TH_EXP -382 0x6000 //TX_MINENOISE_MIC0_S_TH_MTS -383 0xFFF3 //TX_MINENOISE_MIC0_S_TH_EXP +379 0x044C //TX_MINENOISE_TH +380 0xD508 //TX_MORENS_TFMASK_TH +381 0x0001 //TX_DRC_QUIET_FLOOR +382 0x3A98 //TX_RATIODTL_CUT_TH +383 0x0DAC //TX_DT_CUT_K1 384 0x0666 //TX_OUT_ENER_S_TH_CLEAN 385 0x0666 //TX_OUT_ENER_S_TH_LESSCLEAN 386 0x0333 //TX_OUT_ENER_S_TH_NOISY @@ -24955,22 +37779,22 @@ 388 0x0333 //TX_OUT_ENER_TH_SPEECH 389 0x2000 //TX_SN_NPB_GAIN 390 0x0000 //TX_NN_NPB_GAIN -391 0x0000 //TX_CSX_ALPHA_0 -392 0x0000 //TX_CSX_ALPHA_1 -393 0x0000 //TX_CSX_ALPHA_2 -394 0x0000 //TX_CSX_ALPHA_3 -395 0x0800 //TX_MU_ARSP_EST -396 0x00C8 //TX_P_OUTBEAM_MIN_TH +391 0x7FFF //TX_POST_MASK_SUP_HSNE +392 0x1388 //TX_TAIL_DET_TH +393 0x4000 //TX_B_LESSCUT_RTO_WTA +394 0x0000 //TX_MEL_G_R +395 0x0080 //TX_SUPHIGH_TH +396 0x0000 //TX_MASK_G_R 397 0x0002 //TX_EXTRA_NS_L -398 0x0800 //TX_EXTRA_NS_A -399 0x0005 //TX_VR_NOISE_FLOOR_TH +398 0x1800 //TX_C_POST_FLT_MASK +399 0x7FFF //TX_A_POST_FLT_WNS 400 0x0148 //TX_MIN_G_LOW300HZ -401 0x0001 //TX_MAXLEVEL_CNG +401 0x0004 //TX_MAXLEVEL_CNG 402 0x00B4 //TX_STN_NOISE_TH 403 0x4000 //TX_POST_MASK_SUP 404 0x7FFF //TX_POST_MASK_ADJUST 405 0x00C8 //TX_NS_ENOISE_MIC0_TH -406 0x0050 //TX_MINENOISE_MIC0_TH +406 0x02F3 //TX_MINENOISE_MIC0_TH 407 0x012C //TX_MINENOISE_MIC0_S_TH 408 0x4000 //TX_MIN_G_CTRL_SSNS 409 0x0000 //TX_METAL_RTO_THR @@ -25078,16 +37902,16 @@ 511 0x6666 //TX_MIC_TO_BFGAIN 512 0x0000 //TX_MICTOBFGAIN0 513 0x0000 //TX_FASTMUE_TH -514 0x0000 //TX_DERVB_LEN_0 -515 0x0000 //TX_DERVB_LEN_1 -516 0x0000 //TX_RHO_DERVB -517 0x0000 //TX_MIC_INDX_DERVB -518 0x0000 //TX_MU_DERVB -519 0x0000 //TX_DR_RESRV_0 -520 0x0000 //TX_DR_RESRV_1 -521 0x0000 //TX_DR_RESRV_2 -522 0x0000 //TX_DR_RESRV_3 -523 0x0000 //TX_DR_RESRV_4 +514 0xC000 //TX_DEREVERB_LF_MU +515 0xC000 //TX_DEREVERB_HF_MU +516 0xCCCC //TX_DEREVERB_DELAY +517 0xD999 //TX_DEREVERB_COEF_LEN +518 0x1F40 //TX_DEREVERB_DNR +519 0x0000 //TX_DEREVERB_ALPHA +520 0x0000 //TX_DEREVERB_BETA +521 0x0000 //TX_GSC_RTOL_TH +522 0x7000 //TX_GSC_RTOH_TH +523 0x0064 //TX_WIDE2_MEANHTH 524 0x0000 //TX_DR_RESRV_5 525 0x0000 //TX_DR_RESRV_6 526 0x0000 //TX_DR_RESRV_7 @@ -25131,22 +37955,22 @@ 564 0x0000 //TX_PB_RESRV_0 565 0x0000 //TX_PB_RESRV_1 566 0x0020 //TX_FDEQ_SUBNUM -567 0x4848 //TX_FDEQ_GAIN_0 -568 0x4848 //TX_FDEQ_GAIN_1 +567 0x5450 //TX_FDEQ_GAIN_0 +568 0x4C48 //TX_FDEQ_GAIN_1 569 0x4850 //TX_FDEQ_GAIN_2 570 0x5050 //TX_FDEQ_GAIN_3 571 0x4848 //TX_FDEQ_GAIN_4 -572 0x484A //TX_FDEQ_GAIN_5 +572 0x484E //TX_FDEQ_GAIN_5 573 0x4E5E //TX_FDEQ_GAIN_6 -574 0x5C4C //TX_FDEQ_GAIN_7 +574 0x584E //TX_FDEQ_GAIN_7 575 0x4C4E //TX_FDEQ_GAIN_8 -576 0x4844 //TX_FDEQ_GAIN_9 -577 0x4448 //TX_FDEQ_GAIN_10 -578 0x4850 //TX_FDEQ_GAIN_11 -579 0x5C6A //TX_FDEQ_GAIN_12 -580 0x5A84 //TX_FDEQ_GAIN_13 -581 0x7880 //TX_FDEQ_GAIN_14 -582 0x7F7F //TX_FDEQ_GAIN_15 +576 0x564E //TX_FDEQ_GAIN_9 +577 0x5058 //TX_FDEQ_GAIN_10 +578 0x625C //TX_FDEQ_GAIN_11 +579 0x6C6C //TX_FDEQ_GAIN_12 +580 0x7086 //TX_FDEQ_GAIN_13 +581 0x869C //TX_FDEQ_GAIN_14 +582 0xB0B0 //TX_FDEQ_GAIN_15 583 0x4848 //TX_FDEQ_GAIN_16 584 0x4848 //TX_FDEQ_GAIN_17 585 0x4848 //TX_FDEQ_GAIN_18 @@ -25170,7 +37994,7 @@ 603 0x1B1E //TX_FDEQ_BIN_12 604 0x1E1E //TX_FDEQ_BIN_13 605 0x1E28 //TX_FDEQ_BIN_14 -606 0x282C //TX_FDEQ_BIN_15 +606 0x284A //TX_FDEQ_BIN_15 607 0x0000 //TX_FDEQ_BIN_16 608 0x0000 //TX_FDEQ_BIN_17 609 0x0000 //TX_FDEQ_BIN_18 @@ -25188,15 +38012,15 @@ 621 0x4848 //TX_PREEQ_GAIN_MIC0_4 622 0x4848 //TX_PREEQ_GAIN_MIC0_5 623 0x4848 //TX_PREEQ_GAIN_MIC0_6 -624 0x484A //TX_PREEQ_GAIN_MIC0_7 -625 0x4C4E //TX_PREEQ_GAIN_MIC0_8 -626 0x5054 //TX_PREEQ_GAIN_MIC0_9 -627 0x5658 //TX_PREEQ_GAIN_MIC0_10 -628 0x5C5C //TX_PREEQ_GAIN_MIC0_11 -629 0x6474 //TX_PREEQ_GAIN_MIC0_12 -630 0x7870 //TX_PREEQ_GAIN_MIC0_13 -631 0x5C48 //TX_PREEQ_GAIN_MIC0_14 -632 0x383C //TX_PREEQ_GAIN_MIC0_15 +624 0x4848 //TX_PREEQ_GAIN_MIC0_7 +625 0x494A //TX_PREEQ_GAIN_MIC0_8 +626 0x4B4C //TX_PREEQ_GAIN_MIC0_9 +627 0x4B4A //TX_PREEQ_GAIN_MIC0_10 +628 0x484B //TX_PREEQ_GAIN_MIC0_11 +629 0x4C4C //TX_PREEQ_GAIN_MIC0_12 +630 0x4B48 //TX_PREEQ_GAIN_MIC0_13 +631 0x3838 //TX_PREEQ_GAIN_MIC0_14 +632 0x3835 //TX_PREEQ_GAIN_MIC0_15 633 0x4848 //TX_PREEQ_GAIN_MIC0_16 634 0x4848 //TX_PREEQ_GAIN_MIC0_17 635 0x4848 //TX_PREEQ_GAIN_MIC0_18 @@ -25237,15 +38061,15 @@ 670 0x4848 //TX_PREEQ_GAIN_MIC1_4 671 0x4848 //TX_PREEQ_GAIN_MIC1_5 672 0x4848 //TX_PREEQ_GAIN_MIC1_6 -673 0x4848 //TX_PREEQ_GAIN_MIC1_7 -674 0x4848 //TX_PREEQ_GAIN_MIC1_8 -675 0x4848 //TX_PREEQ_GAIN_MIC1_9 -676 0x4848 //TX_PREEQ_GAIN_MIC1_10 -677 0x4848 //TX_PREEQ_GAIN_MIC1_11 -678 0x4848 //TX_PREEQ_GAIN_MIC1_12 -679 0x4848 //TX_PREEQ_GAIN_MIC1_13 -680 0x4848 //TX_PREEQ_GAIN_MIC1_14 -681 0x4848 //TX_PREEQ_GAIN_MIC1_15 +673 0x4846 //TX_PREEQ_GAIN_MIC1_7 +674 0x4544 //TX_PREEQ_GAIN_MIC1_8 +675 0x4241 //TX_PREEQ_GAIN_MIC1_9 +676 0x403E //TX_PREEQ_GAIN_MIC1_10 +677 0x3D3C //TX_PREEQ_GAIN_MIC1_11 +678 0x3C3C //TX_PREEQ_GAIN_MIC1_12 +679 0x3C39 //TX_PREEQ_GAIN_MIC1_13 +680 0x3838 //TX_PREEQ_GAIN_MIC1_14 +681 0x3A3C //TX_PREEQ_GAIN_MIC1_15 682 0x4848 //TX_PREEQ_GAIN_MIC1_16 683 0x4848 //TX_PREEQ_GAIN_MIC1_17 684 0x4848 //TX_PREEQ_GAIN_MIC1_18 @@ -25254,22 +38078,22 @@ 687 0x4848 //TX_PREEQ_GAIN_MIC1_21 688 0x4848 //TX_PREEQ_GAIN_MIC1_22 689 0x4848 //TX_PREEQ_GAIN_MIC1_23 -690 0x251A //TX_PREEQ_BIN_MIC1_0 -691 0x0F0F //TX_PREEQ_BIN_MIC1_1 -692 0x0C0C //TX_PREEQ_BIN_MIC1_2 -693 0x0C0F //TX_PREEQ_BIN_MIC1_3 -694 0x0F0F //TX_PREEQ_BIN_MIC1_4 -695 0x0F09 //TX_PREEQ_BIN_MIC1_5 -696 0x0909 //TX_PREEQ_BIN_MIC1_6 -697 0x0908 //TX_PREEQ_BIN_MIC1_7 -698 0x070F //TX_PREEQ_BIN_MIC1_8 -699 0x1F08 //TX_PREEQ_BIN_MIC1_9 -700 0x0808 //TX_PREEQ_BIN_MIC1_10 -701 0x0920 //TX_PREEQ_BIN_MIC1_11 -702 0x2020 //TX_PREEQ_BIN_MIC1_12 -703 0x2021 //TX_PREEQ_BIN_MIC1_13 -704 0x0000 //TX_PREEQ_BIN_MIC1_14 -705 0x0000 //TX_PREEQ_BIN_MIC1_15 +690 0x0202 //TX_PREEQ_BIN_MIC1_0 +691 0x0203 //TX_PREEQ_BIN_MIC1_1 +692 0x0303 //TX_PREEQ_BIN_MIC1_2 +693 0x0304 //TX_PREEQ_BIN_MIC1_3 +694 0x0405 //TX_PREEQ_BIN_MIC1_4 +695 0x0506 //TX_PREEQ_BIN_MIC1_5 +696 0x0708 //TX_PREEQ_BIN_MIC1_6 +697 0x090A //TX_PREEQ_BIN_MIC1_7 +698 0x0B0C //TX_PREEQ_BIN_MIC1_8 +699 0x0D0E //TX_PREEQ_BIN_MIC1_9 +700 0x1013 //TX_PREEQ_BIN_MIC1_10 +701 0x1719 //TX_PREEQ_BIN_MIC1_11 +702 0x1B1E //TX_PREEQ_BIN_MIC1_12 +703 0x1E1E //TX_PREEQ_BIN_MIC1_13 +704 0x1E28 //TX_PREEQ_BIN_MIC1_14 +705 0x282C //TX_PREEQ_BIN_MIC1_15 706 0x0000 //TX_PREEQ_BIN_MIC1_16 707 0x0000 //TX_PREEQ_BIN_MIC1_17 708 0x0000 //TX_PREEQ_BIN_MIC1_18 @@ -25355,7 +38179,7 @@ 788 0x7EB8 //TX_TDDRC_ALPHA_DWN_02 789 0x7EB8 //TX_TDDRC_ALPHA_DWN_03 790 0x7EB8 //TX_TDDRC_ALPHA_DWN_04 -791 0x7FFF //TX_TDDRC_TD_DRC_LIMIT +791 0x7214 //TX_TDDRC_TD_DRC_LIMIT 792 0x0800 //TX_TDDRC_POST_LIMIT_GAIN 793 0x0000 //TX_TDDRC_RESRV_0 794 0x0000 //TX_TDDRC_RESRV_1 @@ -25418,12 +38242,12 @@ 851 0x0000 //TX_FFP_RESRV_5 852 0x0000 //TX_FFP_RESRV_6 853 0x0002 //TX_FILTINDX -854 0x0001 //TX_TDDRC_THRD_0 -855 0x0002 //TX_TDDRC_THRD_1 -856 0x1000 //TX_TDDRC_THRD_2 -857 0x1000 //TX_TDDRC_THRD_3 -858 0x6000 //TX_TDDRC_SLANT_0 -859 0x6000 //TX_TDDRC_SLANT_1 +854 0x0003 //TX_TDDRC_THRD_0 +855 0x0004 //TX_TDDRC_THRD_1 +856 0x1800 //TX_TDDRC_THRD_2 +857 0x1800 //TX_TDDRC_THRD_3 +858 0x7FFF //TX_TDDRC_SLANT_0 +859 0x7FFF //TX_TDDRC_SLANT_1 860 0x0800 //TX_TDDRC_ALPHA_UP_00 861 0x7EB8 //TX_TDDRC_ALPHA_DWN_00 862 0x0000 //TX_TDDRC_HMNC_FLAG @@ -25453,7 +38277,7 @@ 886 0x0CCD //TX_FASTNS_TFMASKBIN_TH2 887 0x0CCD //TX_FASTNS_TFMASKBIN_TH3 888 0x00C8 //TX_FASTNS_ARSPC_TH -889 0xC000 //TX_FASTNS_MASK5_TH +889 0x8000 //TX_FASTNS_MASK5_TH 890 0x4848 //TX_POSTSSA_MIN_G_VR_MASK 891 0x4000 //TX_A_LESSCUT_RTO_MASK 892 0x1770 //TX_FASTNS_NOISETH @@ -25461,8 +38285,73 @@ 894 0xC000 //TX_FASTNS_SSA_THHFL 895 0xCCCC //TX_FASTNS_SSA_THLFH 896 0xD999 //TX_FASTNS_SSA_THHFH +897 0x2339 //TX_SENDFUNC_REG_MICMUTE +898 0x0021 //TX_SENDFUNC_REG_MICMUTE1 +899 0x02BC //TX_MICMUTE_RATIO_THR +900 0x0140 //TX_MICMUTE_AMP_THR +901 0x0004 //TX_MICMUTE_HPF_IND +902 0x00C0 //TX_MICMUTE_LOG_EYR_TH +903 0x0008 //TX_MICMUTE_CVG_TIME +904 0x0008 //TX_MICMUTE_RELEASE_TIME +905 0x01FE //TX_MIC_VOLUME_MIC0MUTE +906 0x0020 //TX_MICMUTE_EPD_OFFSET_0 +907 0x001E //TX_MICMUTE_FRQ_AEC_L +908 0x7999 //TX_MICMUTE_EAD_THR +909 0x7FFF //TX_MICMUTE_LAMBDA_CB_NLE +910 0x7FFF //TX_MICMUTE_LAMBDA_RE_EST +911 0x4000 //TX_DTD_THR1_MICMUTE_0 +912 0x7000 //TX_DTD_THR1_MICMUTE_1 +913 0x7FFF //TX_DTD_THR1_MICMUTE_2 +914 0x7FFF //TX_DTD_THR1_MICMUTE_3 +915 0x6CCC //TX_DTD_THR2_MICMUTE_0 +916 0x0400 //TX_MICMUTE_MIN_EQ_RE_EST_0 +917 0x0400 //TX_MICMUTE_MIN_EQ_RE_EST_1 +918 0x1000 //TX_MICMUTE_MIN_EQ_RE_EST_2 +919 0x7FFF //TX_MICMUTE_MIN_EQ_RE_EST_3 +920 0x7FFF //TX_MICMUTE_MIN_EQ_RE_EST_4 +921 0x4000 //TX_MICMUTE_C_POST_FLT +922 0x03E8 //TX_MICMUTE_DT_CUT_K +923 0x0001 //TX_MICMUTE_DT_CUT_THR +924 0x03E8 //TX_MICMUTE_DT_CUT_K2 +925 0x0001 //TX_MICMUTE_DT_CUT_THR2 +926 0x0064 //TX_MICMUTE_DT2_HOLD_N +927 0x1000 //TX_MICMUTE_RATIODTH_THCUT +928 0x1000 //TX_MICMUTE_B_POST_FLT_ECHOL +929 0x7FFF //TX_MICMUTE_B_POST_FLT_ECHOH +930 0x0400 //TX_MICMUTE_C_POST_FLT_MASK +931 0x7999 //TX_MICMUTE_RATIODTL_CUT_TH +932 0x0258 //TX_MICMUTE_DT_CUT_K1 +933 0x0800 //TX_MICMUTE_N2_SN_EST +934 0xFC00 //TX_MICMUTE_THR_SN_EST_0 +935 0x001C //TX_MICMUTE_MIN_G_CTRL_0 +936 0x6000 //TX_MICMUTE_A_POST_FILT_S_0 +937 0x7000 //TX_MICMUTE_B_POST_FILT_0 +938 0x2710 //TX_MIC1RUB_AMP_THR +939 0x0010 //TX_MIC1MUTE_RATIO_THR +940 0x0450 //TX_MIC1MUTE_AMP_THR +941 0x0008 //TX_MIC1MUTE_CVG_TIME +942 0x0008 //TX_MIC1MUTE_RELEASE_TIME +943 0x0000 //TX_AMS_RESRV_01 +944 0x0000 //TX_AMS_RESRV_02 +945 0x0000 //TX_AMS_RESRV_03 +946 0x0000 //TX_AMS_RESRV_04 +947 0x0000 //TX_AMS_RESRV_05 +948 0x0000 //TX_AMS_RESRV_06 +949 0x0000 //TX_AMS_RESRV_07 +950 0x0000 //TX_AMS_RESRV_08 +951 0x0000 //TX_AMS_RESRV_09 +952 0x0000 //TX_AMS_RESRV_10 +953 0x0000 //TX_AMS_RESRV_11 +954 0x0000 //TX_AMS_RESRV_12 +955 0x0000 //TX_AMS_RESRV_13 +956 0x0000 //TX_AMS_RESRV_14 +957 0x0000 //TX_AMS_RESRV_15 +958 0x0000 //TX_AMS_RESRV_16 +959 0x0000 //TX_AMS_RESRV_17 +960 0x0000 //TX_AMS_RESRV_18 +961 0x0000 //TX_AMS_RESRV_19 #RX -0 0x002C //RX_RECVFUNC_MODE_0 +0 0x202C //RX_RECVFUNC_MODE_0 1 0x0000 //RX_RECVFUNC_MODE_1 2 0x0003 //RX_SAMPLINGFREQ_SIG 3 0x0003 //RX_SAMPLINGFREQ_PROC @@ -26312,18 +39201,869 @@ 110 0x0000 //RX_FDDRC_RESRV_0 129 0x0100 //RX_SPK_VOL 130 0x0000 //RX_VOL_RESRV_0 +#RX 2 +157 0x202C //RX_RECVFUNC_MODE_0 +158 0x0000 //RX_RECVFUNC_MODE_1 +159 0x0003 //RX_SAMPLINGFREQ_SIG +160 0x0003 //RX_SAMPLINGFREQ_PROC +161 0x000A //RX_FRAME_SZ +162 0x0000 //RX_DELAY_OPT +163 0x5000 //RX_TDDRC_ALPHA_UP_1 +164 0x5000 //RX_TDDRC_ALPHA_UP_2 +165 0x5000 //RX_TDDRC_ALPHA_UP_3 +166 0x2000 //RX_TDDRC_ALPHA_UP_4 +167 0x0800 //RX_PGA +168 0x7FFF //RX_A_HP +169 0x0000 //RX_B_PE +170 0x1800 //RX_THR_PITCH_DET_0 +171 0x1000 //RX_THR_PITCH_DET_1 +172 0x0800 //RX_THR_PITCH_DET_2 +173 0x0008 //RX_PITCH_BFR_LEN +174 0x0003 //RX_SBD_PITCH_DET +175 0x0100 //RX_PP_RESRV_0 +176 0x0020 //RX_PP_RESRV_1 +177 0x0400 //RX_N_SN_EST +178 0x000C //RX_N2_SN_EST +179 0x0003 //RX_NS_LVL_CTRL +180 0x9000 //RX_THR_SN_EST +181 0x7CCD //RX_LAMBDA_PFILT +182 0x000A //RX_FENS_RESRV_0 +183 0x0190 //RX_FENS_RESRV_1 +184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +187 0x0002 //RX_EXTRA_NS_L +188 0x0800 //RX_EXTRA_NS_A +189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +190 0x65AD //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +192 0x199A //RX_A_POST_FLT +193 0x0000 //RX_LMT_THRD +194 0x4000 //RX_LMT_ALPHA +195 0x0020 //RX_FDEQ_SUBNUM +196 0x4848 //RX_FDEQ_GAIN_0 +197 0x4848 //RX_FDEQ_GAIN_1 +198 0x4848 //RX_FDEQ_GAIN_2 +199 0x4848 //RX_FDEQ_GAIN_3 +200 0x4848 //RX_FDEQ_GAIN_4 +201 0x4848 //RX_FDEQ_GAIN_5 +202 0x4848 //RX_FDEQ_GAIN_6 +203 0x4848 //RX_FDEQ_GAIN_7 +204 0x4848 //RX_FDEQ_GAIN_8 +205 0x4848 //RX_FDEQ_GAIN_9 +206 0x4848 //RX_FDEQ_GAIN_10 +207 0x4848 //RX_FDEQ_GAIN_11 +208 0x4848 //RX_FDEQ_GAIN_12 +209 0x4848 //RX_FDEQ_GAIN_13 +210 0x4848 //RX_FDEQ_GAIN_14 +211 0x4848 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0202 //RX_FDEQ_BIN_0 +221 0x0203 //RX_FDEQ_BIN_1 +222 0x0303 //RX_FDEQ_BIN_2 +223 0x0304 //RX_FDEQ_BIN_3 +224 0x0405 //RX_FDEQ_BIN_4 +225 0x0506 //RX_FDEQ_BIN_5 +226 0x0708 //RX_FDEQ_BIN_6 +227 0x090A //RX_FDEQ_BIN_7 +228 0x0B0C //RX_FDEQ_BIN_8 +229 0x0D0E //RX_FDEQ_BIN_9 +230 0x1013 //RX_FDEQ_BIN_10 +231 0x1719 //RX_FDEQ_BIN_11 +232 0x1B1E //RX_FDEQ_BIN_12 +233 0x1E1E //RX_FDEQ_BIN_13 +234 0x1E28 //RX_FDEQ_BIN_14 +235 0x282C //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x4000 //RX_FDEQ_RESRV_0 +245 0x0320 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0030 //RX_FDDRC_BAND_MARGIN_1 +248 0x0050 //RX_FDDRC_BAND_MARGIN_2 +249 0x0080 //RX_FDDRC_BAND_MARGIN_3 +250 0x0007 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x5000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x6400 //RX_FDDRC_THRD_3_2 +258 0x6400 //RX_FDDRC_THRD_3_3 +259 0x2000 //RX_FDDRC_SLANT_0_0 +260 0x2000 //RX_FDDRC_SLANT_0_1 +261 0x2000 //RX_FDDRC_SLANT_0_2 +262 0x2000 //RX_FDDRC_SLANT_0_3 +263 0x5333 //RX_FDDRC_SLANT_1_0 +264 0x5333 //RX_FDDRC_SLANT_1_1 +265 0x5333 //RX_FDDRC_SLANT_1_2 +266 0x5333 //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +268 0x0002 //RX_FILTINDX +269 0x0000 //RX_TDDRC_THRD_0 +270 0x0000 //RX_TDDRC_THRD_1 +271 0x1A00 //RX_TDDRC_THRD_2 +272 0x1A00 //RX_TDDRC_THRD_3 +273 0x3000 //RX_TDDRC_SLANT_0 +274 0x7EB8 //RX_TDDRC_SLANT_1 +275 0x5000 //RX_TDDRC_ALPHA_UP_0 +276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x199A //RX_TDDRC_HMNC_GAIN +279 0x0001 //RX_TDDRC_SMT_FLAG +280 0x0CCD //RX_TDDRC_SMT_W +281 0x01C8 //RX_TDDRC_DRC_GAIN +282 0x7C00 //RX_LAMBDA_PKA_FP +283 0x2000 //RX_TPKA_FP +284 0x2000 //RX_MIN_G_FP +285 0x0080 //RX_MAX_G_FP +286 0x000B //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 +288 0x0000 //RX_MAXLEVEL_CNG +289 0x3000 //RX_BWE_UV_TH +290 0x3000 //RX_BWE_UV_TH2 +291 0x1800 //RX_BWE_UV_TH3 +292 0x1000 //RX_BWE_V_TH +293 0x04CD //RX_BWE_GAIN1_V_TH1 +294 0x0F33 //RX_BWE_GAIN1_V_TH2 +295 0x7333 //RX_BWE_UV_EQ +296 0x199A //RX_BWE_V_EQ +297 0x7333 //RX_BWE_TONE_TH +298 0x0004 //RX_BWE_UV_HOLD_T +299 0x6CCD //RX_BWE_GAIN2_ALPHA +300 0x799A //RX_BWE_GAIN3_ALPHA +301 0x001E //RX_BWE_CUTOFF +302 0x3000 //RX_BWE_GAINFILL +303 0x3200 //RX_BWE_MAXTH_TONE +304 0x2000 //RX_BWE_EQ_0 +305 0x2000 //RX_BWE_EQ_1 +306 0x2000 //RX_BWE_EQ_2 +307 0x2000 //RX_BWE_EQ_3 +308 0x2000 //RX_BWE_EQ_4 +309 0x2000 //RX_BWE_EQ_5 +310 0x2000 //RX_BWE_EQ_6 +311 0x0000 //RX_BWE_RESRV_0 +312 0x0000 //RX_BWE_RESRV_1 +313 0x0000 //RX_BWE_RESRV_2 +#VOL 0 +163 0x5000 //RX_TDDRC_ALPHA_UP_1 +164 0x5000 //RX_TDDRC_ALPHA_UP_2 +165 0x5000 //RX_TDDRC_ALPHA_UP_3 +166 0x2000 //RX_TDDRC_ALPHA_UP_4 +184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +190 0x65AD //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +269 0x0000 //RX_TDDRC_THRD_0 +270 0x0000 //RX_TDDRC_THRD_1 +271 0x1A00 //RX_TDDRC_THRD_2 +272 0x1A00 //RX_TDDRC_THRD_3 +273 0x3000 //RX_TDDRC_SLANT_0 +274 0x7EB8 //RX_TDDRC_SLANT_1 +275 0x5000 //RX_TDDRC_ALPHA_UP_0 +276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x199A //RX_TDDRC_HMNC_GAIN +279 0x0001 //RX_TDDRC_SMT_FLAG +280 0x0CCD //RX_TDDRC_SMT_W +281 0x01C8 //RX_TDDRC_DRC_GAIN +195 0x0020 //RX_FDEQ_SUBNUM +196 0x4848 //RX_FDEQ_GAIN_0 +197 0x4848 //RX_FDEQ_GAIN_1 +198 0x4848 //RX_FDEQ_GAIN_2 +199 0x4848 //RX_FDEQ_GAIN_3 +200 0x4848 //RX_FDEQ_GAIN_4 +201 0x4848 //RX_FDEQ_GAIN_5 +202 0x4848 //RX_FDEQ_GAIN_6 +203 0x4848 //RX_FDEQ_GAIN_7 +204 0x4848 //RX_FDEQ_GAIN_8 +205 0x4848 //RX_FDEQ_GAIN_9 +206 0x4848 //RX_FDEQ_GAIN_10 +207 0x4848 //RX_FDEQ_GAIN_11 +208 0x4848 //RX_FDEQ_GAIN_12 +209 0x4848 //RX_FDEQ_GAIN_13 +210 0x4848 //RX_FDEQ_GAIN_14 +211 0x4848 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0202 //RX_FDEQ_BIN_0 +221 0x0203 //RX_FDEQ_BIN_1 +222 0x0303 //RX_FDEQ_BIN_2 +223 0x0304 //RX_FDEQ_BIN_3 +224 0x0405 //RX_FDEQ_BIN_4 +225 0x0506 //RX_FDEQ_BIN_5 +226 0x0708 //RX_FDEQ_BIN_6 +227 0x090A //RX_FDEQ_BIN_7 +228 0x0B0C //RX_FDEQ_BIN_8 +229 0x0D0E //RX_FDEQ_BIN_9 +230 0x1013 //RX_FDEQ_BIN_10 +231 0x1719 //RX_FDEQ_BIN_11 +232 0x1B1E //RX_FDEQ_BIN_12 +233 0x1E1E //RX_FDEQ_BIN_13 +234 0x1E28 //RX_FDEQ_BIN_14 +235 0x282C //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x4000 //RX_FDEQ_RESRV_0 +245 0x0320 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0030 //RX_FDDRC_BAND_MARGIN_1 +248 0x0050 //RX_FDDRC_BAND_MARGIN_2 +249 0x0080 //RX_FDDRC_BAND_MARGIN_3 +250 0x0007 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x5000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x6400 //RX_FDDRC_THRD_3_2 +258 0x6400 //RX_FDDRC_THRD_3_3 +259 0x2000 //RX_FDDRC_SLANT_0_0 +260 0x2000 //RX_FDDRC_SLANT_0_1 +261 0x2000 //RX_FDDRC_SLANT_0_2 +262 0x2000 //RX_FDDRC_SLANT_0_3 +263 0x5333 //RX_FDDRC_SLANT_1_0 +264 0x5333 //RX_FDDRC_SLANT_1_1 +265 0x5333 //RX_FDDRC_SLANT_1_2 +266 0x5333 //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +286 0x000B //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 +#VOL 1 +163 0x5000 //RX_TDDRC_ALPHA_UP_1 +164 0x5000 //RX_TDDRC_ALPHA_UP_2 +165 0x5000 //RX_TDDRC_ALPHA_UP_3 +166 0x2000 //RX_TDDRC_ALPHA_UP_4 +184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +190 0x65AD //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +269 0x0000 //RX_TDDRC_THRD_0 +270 0x0000 //RX_TDDRC_THRD_1 +271 0x1A00 //RX_TDDRC_THRD_2 +272 0x1A00 //RX_TDDRC_THRD_3 +273 0x3000 //RX_TDDRC_SLANT_0 +274 0x7EB8 //RX_TDDRC_SLANT_1 +275 0x5000 //RX_TDDRC_ALPHA_UP_0 +276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x199A //RX_TDDRC_HMNC_GAIN +279 0x0001 //RX_TDDRC_SMT_FLAG +280 0x0CCD //RX_TDDRC_SMT_W +281 0x01C8 //RX_TDDRC_DRC_GAIN +195 0x0020 //RX_FDEQ_SUBNUM +196 0x4848 //RX_FDEQ_GAIN_0 +197 0x4848 //RX_FDEQ_GAIN_1 +198 0x4848 //RX_FDEQ_GAIN_2 +199 0x4848 //RX_FDEQ_GAIN_3 +200 0x4848 //RX_FDEQ_GAIN_4 +201 0x4848 //RX_FDEQ_GAIN_5 +202 0x4848 //RX_FDEQ_GAIN_6 +203 0x4848 //RX_FDEQ_GAIN_7 +204 0x4848 //RX_FDEQ_GAIN_8 +205 0x4848 //RX_FDEQ_GAIN_9 +206 0x4848 //RX_FDEQ_GAIN_10 +207 0x4848 //RX_FDEQ_GAIN_11 +208 0x4848 //RX_FDEQ_GAIN_12 +209 0x4848 //RX_FDEQ_GAIN_13 +210 0x4848 //RX_FDEQ_GAIN_14 +211 0x4848 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0202 //RX_FDEQ_BIN_0 +221 0x0203 //RX_FDEQ_BIN_1 +222 0x0303 //RX_FDEQ_BIN_2 +223 0x0304 //RX_FDEQ_BIN_3 +224 0x0405 //RX_FDEQ_BIN_4 +225 0x0506 //RX_FDEQ_BIN_5 +226 0x0708 //RX_FDEQ_BIN_6 +227 0x090A //RX_FDEQ_BIN_7 +228 0x0B0C //RX_FDEQ_BIN_8 +229 0x0D0E //RX_FDEQ_BIN_9 +230 0x1013 //RX_FDEQ_BIN_10 +231 0x1719 //RX_FDEQ_BIN_11 +232 0x1B1E //RX_FDEQ_BIN_12 +233 0x1E1E //RX_FDEQ_BIN_13 +234 0x1E28 //RX_FDEQ_BIN_14 +235 0x282C //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x4000 //RX_FDEQ_RESRV_0 +245 0x0320 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0030 //RX_FDDRC_BAND_MARGIN_1 +248 0x0050 //RX_FDDRC_BAND_MARGIN_2 +249 0x0080 //RX_FDDRC_BAND_MARGIN_3 +250 0x0007 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x5000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x6400 //RX_FDDRC_THRD_3_2 +258 0x6400 //RX_FDDRC_THRD_3_3 +259 0x2000 //RX_FDDRC_SLANT_0_0 +260 0x2000 //RX_FDDRC_SLANT_0_1 +261 0x2000 //RX_FDDRC_SLANT_0_2 +262 0x2000 //RX_FDDRC_SLANT_0_3 +263 0x5333 //RX_FDDRC_SLANT_1_0 +264 0x5333 //RX_FDDRC_SLANT_1_1 +265 0x5333 //RX_FDDRC_SLANT_1_2 +266 0x5333 //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +286 0x0013 //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 +#VOL 2 +163 0x5000 //RX_TDDRC_ALPHA_UP_1 +164 0x5000 //RX_TDDRC_ALPHA_UP_2 +165 0x5000 //RX_TDDRC_ALPHA_UP_3 +166 0x2000 //RX_TDDRC_ALPHA_UP_4 +184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +190 0x65AD //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +269 0x0000 //RX_TDDRC_THRD_0 +270 0x0000 //RX_TDDRC_THRD_1 +271 0x1A00 //RX_TDDRC_THRD_2 +272 0x1A00 //RX_TDDRC_THRD_3 +273 0x3000 //RX_TDDRC_SLANT_0 +274 0x7EB8 //RX_TDDRC_SLANT_1 +275 0x5000 //RX_TDDRC_ALPHA_UP_0 +276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x199A //RX_TDDRC_HMNC_GAIN +279 0x0001 //RX_TDDRC_SMT_FLAG +280 0x0CCD //RX_TDDRC_SMT_W +281 0x01C8 //RX_TDDRC_DRC_GAIN +195 0x0020 //RX_FDEQ_SUBNUM +196 0x4848 //RX_FDEQ_GAIN_0 +197 0x4848 //RX_FDEQ_GAIN_1 +198 0x4848 //RX_FDEQ_GAIN_2 +199 0x4848 //RX_FDEQ_GAIN_3 +200 0x4848 //RX_FDEQ_GAIN_4 +201 0x4848 //RX_FDEQ_GAIN_5 +202 0x4848 //RX_FDEQ_GAIN_6 +203 0x4848 //RX_FDEQ_GAIN_7 +204 0x4848 //RX_FDEQ_GAIN_8 +205 0x4848 //RX_FDEQ_GAIN_9 +206 0x4848 //RX_FDEQ_GAIN_10 +207 0x4848 //RX_FDEQ_GAIN_11 +208 0x4848 //RX_FDEQ_GAIN_12 +209 0x4848 //RX_FDEQ_GAIN_13 +210 0x4848 //RX_FDEQ_GAIN_14 +211 0x4848 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0202 //RX_FDEQ_BIN_0 +221 0x0203 //RX_FDEQ_BIN_1 +222 0x0303 //RX_FDEQ_BIN_2 +223 0x0304 //RX_FDEQ_BIN_3 +224 0x0405 //RX_FDEQ_BIN_4 +225 0x0506 //RX_FDEQ_BIN_5 +226 0x0708 //RX_FDEQ_BIN_6 +227 0x090A //RX_FDEQ_BIN_7 +228 0x0B0C //RX_FDEQ_BIN_8 +229 0x0D0E //RX_FDEQ_BIN_9 +230 0x1013 //RX_FDEQ_BIN_10 +231 0x1719 //RX_FDEQ_BIN_11 +232 0x1B1E //RX_FDEQ_BIN_12 +233 0x1E1E //RX_FDEQ_BIN_13 +234 0x1E28 //RX_FDEQ_BIN_14 +235 0x282C //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x4000 //RX_FDEQ_RESRV_0 +245 0x0320 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0030 //RX_FDDRC_BAND_MARGIN_1 +248 0x0050 //RX_FDDRC_BAND_MARGIN_2 +249 0x0080 //RX_FDDRC_BAND_MARGIN_3 +250 0x0007 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x5000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x6400 //RX_FDDRC_THRD_3_2 +258 0x6400 //RX_FDDRC_THRD_3_3 +259 0x2000 //RX_FDDRC_SLANT_0_0 +260 0x2000 //RX_FDDRC_SLANT_0_1 +261 0x2000 //RX_FDDRC_SLANT_0_2 +262 0x2000 //RX_FDDRC_SLANT_0_3 +263 0x5333 //RX_FDDRC_SLANT_1_0 +264 0x5333 //RX_FDDRC_SLANT_1_1 +265 0x5333 //RX_FDDRC_SLANT_1_2 +266 0x5333 //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +286 0x0020 //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 +#VOL 3 +163 0x5000 //RX_TDDRC_ALPHA_UP_1 +164 0x5000 //RX_TDDRC_ALPHA_UP_2 +165 0x5000 //RX_TDDRC_ALPHA_UP_3 +166 0x2000 //RX_TDDRC_ALPHA_UP_4 +184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +190 0x65AD //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +269 0x0000 //RX_TDDRC_THRD_0 +270 0x0000 //RX_TDDRC_THRD_1 +271 0x1A00 //RX_TDDRC_THRD_2 +272 0x1A00 //RX_TDDRC_THRD_3 +273 0x3000 //RX_TDDRC_SLANT_0 +274 0x7EB8 //RX_TDDRC_SLANT_1 +275 0x5000 //RX_TDDRC_ALPHA_UP_0 +276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x199A //RX_TDDRC_HMNC_GAIN +279 0x0001 //RX_TDDRC_SMT_FLAG +280 0x0CCD //RX_TDDRC_SMT_W +281 0x01C8 //RX_TDDRC_DRC_GAIN +195 0x0020 //RX_FDEQ_SUBNUM +196 0x4848 //RX_FDEQ_GAIN_0 +197 0x4848 //RX_FDEQ_GAIN_1 +198 0x4848 //RX_FDEQ_GAIN_2 +199 0x4848 //RX_FDEQ_GAIN_3 +200 0x4848 //RX_FDEQ_GAIN_4 +201 0x4848 //RX_FDEQ_GAIN_5 +202 0x4848 //RX_FDEQ_GAIN_6 +203 0x4848 //RX_FDEQ_GAIN_7 +204 0x4848 //RX_FDEQ_GAIN_8 +205 0x4848 //RX_FDEQ_GAIN_9 +206 0x4848 //RX_FDEQ_GAIN_10 +207 0x4848 //RX_FDEQ_GAIN_11 +208 0x4848 //RX_FDEQ_GAIN_12 +209 0x4848 //RX_FDEQ_GAIN_13 +210 0x4848 //RX_FDEQ_GAIN_14 +211 0x4848 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0202 //RX_FDEQ_BIN_0 +221 0x0203 //RX_FDEQ_BIN_1 +222 0x0303 //RX_FDEQ_BIN_2 +223 0x0304 //RX_FDEQ_BIN_3 +224 0x0405 //RX_FDEQ_BIN_4 +225 0x0506 //RX_FDEQ_BIN_5 +226 0x0708 //RX_FDEQ_BIN_6 +227 0x090A //RX_FDEQ_BIN_7 +228 0x0B0C //RX_FDEQ_BIN_8 +229 0x0D0E //RX_FDEQ_BIN_9 +230 0x1013 //RX_FDEQ_BIN_10 +231 0x1719 //RX_FDEQ_BIN_11 +232 0x1B1E //RX_FDEQ_BIN_12 +233 0x1E1E //RX_FDEQ_BIN_13 +234 0x1E28 //RX_FDEQ_BIN_14 +235 0x282C //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x4000 //RX_FDEQ_RESRV_0 +245 0x0320 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0030 //RX_FDDRC_BAND_MARGIN_1 +248 0x0050 //RX_FDDRC_BAND_MARGIN_2 +249 0x0080 //RX_FDDRC_BAND_MARGIN_3 +250 0x0007 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x5000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x6400 //RX_FDDRC_THRD_3_2 +258 0x6400 //RX_FDDRC_THRD_3_3 +259 0x2000 //RX_FDDRC_SLANT_0_0 +260 0x2000 //RX_FDDRC_SLANT_0_1 +261 0x2000 //RX_FDDRC_SLANT_0_2 +262 0x2000 //RX_FDDRC_SLANT_0_3 +263 0x5333 //RX_FDDRC_SLANT_1_0 +264 0x5333 //RX_FDDRC_SLANT_1_1 +265 0x5333 //RX_FDDRC_SLANT_1_2 +266 0x5333 //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +286 0x0036 //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 +#VOL 4 +163 0x5000 //RX_TDDRC_ALPHA_UP_1 +164 0x5000 //RX_TDDRC_ALPHA_UP_2 +165 0x5000 //RX_TDDRC_ALPHA_UP_3 +166 0x2000 //RX_TDDRC_ALPHA_UP_4 +184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +190 0x65AD //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +269 0x0000 //RX_TDDRC_THRD_0 +270 0x0000 //RX_TDDRC_THRD_1 +271 0x1A00 //RX_TDDRC_THRD_2 +272 0x1A00 //RX_TDDRC_THRD_3 +273 0x3000 //RX_TDDRC_SLANT_0 +274 0x7EB8 //RX_TDDRC_SLANT_1 +275 0x5000 //RX_TDDRC_ALPHA_UP_0 +276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x199A //RX_TDDRC_HMNC_GAIN +279 0x0001 //RX_TDDRC_SMT_FLAG +280 0x0CCD //RX_TDDRC_SMT_W +281 0x01C8 //RX_TDDRC_DRC_GAIN +195 0x0020 //RX_FDEQ_SUBNUM +196 0x4848 //RX_FDEQ_GAIN_0 +197 0x4848 //RX_FDEQ_GAIN_1 +198 0x4848 //RX_FDEQ_GAIN_2 +199 0x4848 //RX_FDEQ_GAIN_3 +200 0x4848 //RX_FDEQ_GAIN_4 +201 0x4848 //RX_FDEQ_GAIN_5 +202 0x4848 //RX_FDEQ_GAIN_6 +203 0x4848 //RX_FDEQ_GAIN_7 +204 0x4848 //RX_FDEQ_GAIN_8 +205 0x4848 //RX_FDEQ_GAIN_9 +206 0x4848 //RX_FDEQ_GAIN_10 +207 0x4848 //RX_FDEQ_GAIN_11 +208 0x4848 //RX_FDEQ_GAIN_12 +209 0x4848 //RX_FDEQ_GAIN_13 +210 0x4848 //RX_FDEQ_GAIN_14 +211 0x4848 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0202 //RX_FDEQ_BIN_0 +221 0x0203 //RX_FDEQ_BIN_1 +222 0x0303 //RX_FDEQ_BIN_2 +223 0x0304 //RX_FDEQ_BIN_3 +224 0x0405 //RX_FDEQ_BIN_4 +225 0x0506 //RX_FDEQ_BIN_5 +226 0x0708 //RX_FDEQ_BIN_6 +227 0x090A //RX_FDEQ_BIN_7 +228 0x0B0C //RX_FDEQ_BIN_8 +229 0x0D0E //RX_FDEQ_BIN_9 +230 0x1013 //RX_FDEQ_BIN_10 +231 0x1719 //RX_FDEQ_BIN_11 +232 0x1B1E //RX_FDEQ_BIN_12 +233 0x1E1E //RX_FDEQ_BIN_13 +234 0x1E28 //RX_FDEQ_BIN_14 +235 0x282C //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x4000 //RX_FDEQ_RESRV_0 +245 0x0320 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0030 //RX_FDDRC_BAND_MARGIN_1 +248 0x0050 //RX_FDDRC_BAND_MARGIN_2 +249 0x0080 //RX_FDDRC_BAND_MARGIN_3 +250 0x0007 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x5000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x6400 //RX_FDDRC_THRD_3_2 +258 0x6400 //RX_FDDRC_THRD_3_3 +259 0x2000 //RX_FDDRC_SLANT_0_0 +260 0x2000 //RX_FDDRC_SLANT_0_1 +261 0x2000 //RX_FDDRC_SLANT_0_2 +262 0x2000 //RX_FDDRC_SLANT_0_3 +263 0x5333 //RX_FDDRC_SLANT_1_0 +264 0x5333 //RX_FDDRC_SLANT_1_1 +265 0x5333 //RX_FDDRC_SLANT_1_2 +266 0x5333 //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +286 0x005B //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 +#VOL 5 +163 0x5000 //RX_TDDRC_ALPHA_UP_1 +164 0x5000 //RX_TDDRC_ALPHA_UP_2 +165 0x5000 //RX_TDDRC_ALPHA_UP_3 +166 0x2000 //RX_TDDRC_ALPHA_UP_4 +184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +190 0x65AD //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +269 0x0000 //RX_TDDRC_THRD_0 +270 0x0000 //RX_TDDRC_THRD_1 +271 0x1A00 //RX_TDDRC_THRD_2 +272 0x1A00 //RX_TDDRC_THRD_3 +273 0x3000 //RX_TDDRC_SLANT_0 +274 0x7EB8 //RX_TDDRC_SLANT_1 +275 0x5000 //RX_TDDRC_ALPHA_UP_0 +276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x199A //RX_TDDRC_HMNC_GAIN +279 0x0001 //RX_TDDRC_SMT_FLAG +280 0x0CCD //RX_TDDRC_SMT_W +281 0x01C8 //RX_TDDRC_DRC_GAIN +195 0x0020 //RX_FDEQ_SUBNUM +196 0x4848 //RX_FDEQ_GAIN_0 +197 0x4848 //RX_FDEQ_GAIN_1 +198 0x4848 //RX_FDEQ_GAIN_2 +199 0x4848 //RX_FDEQ_GAIN_3 +200 0x4848 //RX_FDEQ_GAIN_4 +201 0x4848 //RX_FDEQ_GAIN_5 +202 0x4848 //RX_FDEQ_GAIN_6 +203 0x4848 //RX_FDEQ_GAIN_7 +204 0x4848 //RX_FDEQ_GAIN_8 +205 0x4848 //RX_FDEQ_GAIN_9 +206 0x4848 //RX_FDEQ_GAIN_10 +207 0x4848 //RX_FDEQ_GAIN_11 +208 0x4848 //RX_FDEQ_GAIN_12 +209 0x4848 //RX_FDEQ_GAIN_13 +210 0x4848 //RX_FDEQ_GAIN_14 +211 0x4848 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0202 //RX_FDEQ_BIN_0 +221 0x0203 //RX_FDEQ_BIN_1 +222 0x0303 //RX_FDEQ_BIN_2 +223 0x0304 //RX_FDEQ_BIN_3 +224 0x0405 //RX_FDEQ_BIN_4 +225 0x0506 //RX_FDEQ_BIN_5 +226 0x0708 //RX_FDEQ_BIN_6 +227 0x090A //RX_FDEQ_BIN_7 +228 0x0B0C //RX_FDEQ_BIN_8 +229 0x0D0E //RX_FDEQ_BIN_9 +230 0x1013 //RX_FDEQ_BIN_10 +231 0x1719 //RX_FDEQ_BIN_11 +232 0x1B1E //RX_FDEQ_BIN_12 +233 0x1E1E //RX_FDEQ_BIN_13 +234 0x1E28 //RX_FDEQ_BIN_14 +235 0x282C //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x4000 //RX_FDEQ_RESRV_0 +245 0x0320 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0030 //RX_FDDRC_BAND_MARGIN_1 +248 0x0050 //RX_FDDRC_BAND_MARGIN_2 +249 0x0080 //RX_FDDRC_BAND_MARGIN_3 +250 0x0007 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x5000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x6400 //RX_FDDRC_THRD_3_2 +258 0x6400 //RX_FDDRC_THRD_3_3 +259 0x2000 //RX_FDDRC_SLANT_0_0 +260 0x2000 //RX_FDDRC_SLANT_0_1 +261 0x2000 //RX_FDDRC_SLANT_0_2 +262 0x2000 //RX_FDDRC_SLANT_0_3 +263 0x5333 //RX_FDDRC_SLANT_1_0 +264 0x5333 //RX_FDDRC_SLANT_1_1 +265 0x5333 //RX_FDDRC_SLANT_1_2 +266 0x5333 //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +286 0x0099 //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 +#VOL 6 +163 0x5000 //RX_TDDRC_ALPHA_UP_1 +164 0x5000 //RX_TDDRC_ALPHA_UP_2 +165 0x5000 //RX_TDDRC_ALPHA_UP_3 +166 0x2000 //RX_TDDRC_ALPHA_UP_4 +184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +190 0x65AD //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +269 0x0000 //RX_TDDRC_THRD_0 +270 0x0000 //RX_TDDRC_THRD_1 +271 0x1A00 //RX_TDDRC_THRD_2 +272 0x1A00 //RX_TDDRC_THRD_3 +273 0x3000 //RX_TDDRC_SLANT_0 +274 0x7EB8 //RX_TDDRC_SLANT_1 +275 0x5000 //RX_TDDRC_ALPHA_UP_0 +276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x199A //RX_TDDRC_HMNC_GAIN +279 0x0001 //RX_TDDRC_SMT_FLAG +280 0x0CCD //RX_TDDRC_SMT_W +281 0x01C8 //RX_TDDRC_DRC_GAIN +195 0x0020 //RX_FDEQ_SUBNUM +196 0x4848 //RX_FDEQ_GAIN_0 +197 0x4848 //RX_FDEQ_GAIN_1 +198 0x4848 //RX_FDEQ_GAIN_2 +199 0x4848 //RX_FDEQ_GAIN_3 +200 0x4848 //RX_FDEQ_GAIN_4 +201 0x4848 //RX_FDEQ_GAIN_5 +202 0x4848 //RX_FDEQ_GAIN_6 +203 0x4848 //RX_FDEQ_GAIN_7 +204 0x4848 //RX_FDEQ_GAIN_8 +205 0x4848 //RX_FDEQ_GAIN_9 +206 0x4848 //RX_FDEQ_GAIN_10 +207 0x4848 //RX_FDEQ_GAIN_11 +208 0x4848 //RX_FDEQ_GAIN_12 +209 0x4848 //RX_FDEQ_GAIN_13 +210 0x4848 //RX_FDEQ_GAIN_14 +211 0x4848 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0202 //RX_FDEQ_BIN_0 +221 0x0203 //RX_FDEQ_BIN_1 +222 0x0303 //RX_FDEQ_BIN_2 +223 0x0304 //RX_FDEQ_BIN_3 +224 0x0405 //RX_FDEQ_BIN_4 +225 0x0506 //RX_FDEQ_BIN_5 +226 0x0708 //RX_FDEQ_BIN_6 +227 0x090A //RX_FDEQ_BIN_7 +228 0x0B0C //RX_FDEQ_BIN_8 +229 0x0D0E //RX_FDEQ_BIN_9 +230 0x1013 //RX_FDEQ_BIN_10 +231 0x1719 //RX_FDEQ_BIN_11 +232 0x1B1E //RX_FDEQ_BIN_12 +233 0x1E1E //RX_FDEQ_BIN_13 +234 0x1E28 //RX_FDEQ_BIN_14 +235 0x282C //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x4000 //RX_FDEQ_RESRV_0 +245 0x0320 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0030 //RX_FDDRC_BAND_MARGIN_1 +248 0x0050 //RX_FDDRC_BAND_MARGIN_2 +249 0x0080 //RX_FDDRC_BAND_MARGIN_3 +250 0x0007 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x5000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x6400 //RX_FDDRC_THRD_3_2 +258 0x6400 //RX_FDDRC_THRD_3_3 +259 0x2000 //RX_FDDRC_SLANT_0_0 +260 0x2000 //RX_FDDRC_SLANT_0_1 +261 0x2000 //RX_FDDRC_SLANT_0_2 +262 0x2000 //RX_FDDRC_SLANT_0_3 +263 0x5333 //RX_FDDRC_SLANT_1_0 +264 0x5333 //RX_FDDRC_SLANT_1_1 +265 0x5333 //RX_FDDRC_SLANT_1_2 +266 0x5333 //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +286 0x0100 //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 #CASE_NAME HEADSET-GOOGLE_CONDOR_HEADPHONE-VOICE_GENERIC-FB -#PARAM_MODE FULL -#PARAM_TYPE TX+RX -#TOTAL_CUSTOM_STEP 7 +#PARAM_MODE Full +#PARAM_TYPE TX+2RX +#TOTAL_CUSTOM_STEP 7+7 #TX 0 0x0001 //TX_OPERATION_MODE_0 1 0x0001 //TX_OPERATION_MODE_1 2 0x0033 //TX_PATCH_REG -3 0x4B7C //TX_SENDFUNC_MODE_0 +3 0x6B7C //TX_SENDFUNC_MODE_0 4 0x0001 //TX_SENDFUNC_MODE_1 -5 0x0003 //TX_NUM_MIC +5 0x0002 //TX_NUM_MIC 6 0x0004 //TX_SAMPLINGFREQ_SIG 7 0x0004 //TX_SAMPLINGFREQ_PROC 8 0x000A //TX_FRAME_SZ_SIG @@ -26339,15 +40079,15 @@ 18 0x0000 //TX_SYS_RESRV_2 19 0x0000 //TX_SYS_RESRV_3 20 0x0000 //TX_DIST2REF0 -21 0x00A4 //TX_DIST2REF1 -22 0x0017 //TX_DIST2REF_02 +21 0x009D //TX_DIST2REF1 +22 0x0010 //TX_DIST2REF_02 23 0x0000 //TX_DIST2REF_03 24 0x0000 //TX_DIST2REF_04 25 0x0000 //TX_DIST2REF_05 26 0x0000 //TX_MMIC -27 0x0FF7 //TX_PGA_0 -28 0x0FF7 //TX_PGA_1 -29 0x0FF7 //TX_PGA_2 +27 0x1000 //TX_PGA_0 +28 0x1000 //TX_PGA_1 +29 0x1000 //TX_PGA_2 30 0x0000 //TX_PGA_3 31 0x0000 //TX_PGA_4 32 0x0000 //TX_PGA_5 @@ -26483,7 +40223,7 @@ 162 0x7FFF //TX_MIN_EQ_RE_EST_10 163 0x7FFF //TX_MIN_EQ_RE_EST_11 164 0x7FFF //TX_MIN_EQ_RE_EST_12 -165 0x4000 //TX_LAMBDA_RE_EST +165 0x0700 //TX_LAMBDA_RE_EST 166 0x0CCD //TX_LAMBDA_CB_NLE 167 0x2000 //TX_C_POST_FLT 168 0x7FFF //TX_GAIN_NP @@ -26543,16 +40283,16 @@ 222 0x023E //TX_ADPT_STRICT_H 223 0x0BB8 //TX_RATIO_DT_L_TH_LOW 224 0x3A98 //TX_RATIO_DT_H_TH_LOW -225 0x1770 //TX_RATIO_DT_L_TH_HIGH +225 0x1194 //TX_RATIO_DT_L_TH_HIGH 226 0x4E20 //TX_RATIO_DT_H_TH_HIGH 227 0x09C4 //TX_RATIO_DT_L0_TH -228 0x2000 //TX_B_POST_FILT_ECHO_L +228 0x7FFF //TX_B_POST_FILT_ECHO_L 229 0x2000 //TX_B_POST_FILT_ECHO_H 230 0x0200 //TX_MIN_G_CTRL_ECHO 231 0x1000 //TX_B_LESSCUT_RTO_ECHO -232 0x0000 //TX_EPD_OFFSET_00 +232 0x0063 //TX_EPD_OFFSET_00 233 0x0000 //TX_EPD_OFFST_01 -234 0x1388 //TX_RATIO_DT_L0_TH_HIGH +234 0x0A28 //TX_RATIO_DT_L0_TH_HIGH 235 0x3A98 //TX_RATIO_DT_H_TH_CUT 236 0x7FFF //TX_MIN_EQ_RE_EST_13 237 0x0000 //TX_DTD_THR1_7 @@ -26560,7 +40300,7 @@ 239 0x0800 //TX_DT_RESRV_7 240 0x0800 //TX_DT_RESRV_8 241 0x0000 //TX_DT_RESRV_9 -242 0xF800 //TX_THR_SN_EST_0 +242 0xF700 //TX_THR_SN_EST_0 243 0xFA00 //TX_THR_SN_EST_1 244 0xFA00 //TX_THR_SN_EST_2 245 0xFB00 //TX_THR_SN_EST_3 @@ -26569,11 +40309,11 @@ 248 0xF800 //TX_THR_SN_EST_6 249 0xF800 //TX_THR_SN_EST_7 250 0x0100 //TX_DELTA_THR_SN_EST_0 -251 0x0200 //TX_DELTA_THR_SN_EST_1 -252 0x0100 //TX_DELTA_THR_SN_EST_2 -253 0x0200 //TX_DELTA_THR_SN_EST_3 +251 0x0100 //TX_DELTA_THR_SN_EST_1 +252 0x0200 //TX_DELTA_THR_SN_EST_2 +253 0x0100 //TX_DELTA_THR_SN_EST_3 254 0x0100 //TX_DELTA_THR_SN_EST_4 -255 0x0100 //TX_DELTA_THR_SN_EST_5 +255 0x0200 //TX_DELTA_THR_SN_EST_5 256 0x0200 //TX_DELTA_THR_SN_EST_6 257 0x0200 //TX_DELTA_THR_SN_EST_7 258 0x4000 //TX_LAMBDA_NN_EST_0 @@ -26601,11 +40341,11 @@ 280 0x1000 //TX_B_POST_FLT_1 281 0x0010 //TX_NS_LVL_CTRL_0 282 0x0014 //TX_NS_LVL_CTRL_1 -283 0x0014 //TX_NS_LVL_CTRL_2 -284 0x0018 //TX_NS_LVL_CTRL_3 -285 0x0016 //TX_NS_LVL_CTRL_4 -286 0x0014 //TX_NS_LVL_CTRL_5 -287 0x0011 //TX_NS_LVL_CTRL_6 +283 0x0018 //TX_NS_LVL_CTRL_2 +284 0x0016 //TX_NS_LVL_CTRL_3 +285 0x0014 //TX_NS_LVL_CTRL_4 +286 0x0011 //TX_NS_LVL_CTRL_5 +287 0x0014 //TX_NS_LVL_CTRL_6 288 0x0011 //TX_NS_LVL_CTRL_7 289 0x000F //TX_MIN_GAIN_S_0 290 0x0010 //TX_MIN_GAIN_S_1 @@ -26623,8 +40363,8 @@ 302 0x4000 //TX_SNRI_SUP_2 303 0x4000 //TX_SNRI_SUP_3 304 0x4000 //TX_SNRI_SUP_4 -305 0x4000 //TX_SNRI_SUP_5 -306 0x50C0 //TX_SNRI_SUP_6 +305 0x50C0 //TX_SNRI_SUP_5 +306 0x4000 //TX_SNRI_SUP_6 307 0x7FFF //TX_SNRI_SUP_7 308 0x7FFF //TX_THR_LFNS 309 0x0018 //TX_G_LFNS @@ -26633,19 +40373,19 @@ 312 0x7FFF //TX_A_POST_FILT_0 313 0x2000 //TX_A_POST_FILT_1 314 0x5000 //TX_A_POST_FILT_S_0 -315 0x6000 //TX_A_POST_FILT_S_1 -316 0x4C00 //TX_A_POST_FILT_S_2 -317 0x4000 //TX_A_POST_FILT_S_3 -318 0x6000 //TX_A_POST_FILT_S_4 -319 0x4000 //TX_A_POST_FILT_S_5 -320 0x5000 //TX_A_POST_FILT_S_6 +315 0x4C00 //TX_A_POST_FILT_S_1 +316 0x4000 //TX_A_POST_FILT_S_2 +317 0x6000 //TX_A_POST_FILT_S_3 +318 0x4000 //TX_A_POST_FILT_S_4 +319 0x5000 //TX_A_POST_FILT_S_5 +320 0x6000 //TX_A_POST_FILT_S_6 321 0x7000 //TX_A_POST_FILT_S_7 322 0x2000 //TX_B_POST_FILT_0 -323 0x1000 //TX_B_POST_FILT_1 +323 0x2000 //TX_B_POST_FILT_1 324 0x2000 //TX_B_POST_FILT_2 -325 0x2000 //TX_B_POST_FILT_3 +325 0x4000 //TX_B_POST_FILT_3 326 0x4000 //TX_B_POST_FILT_4 -327 0x4000 //TX_B_POST_FILT_5 +327 0x1000 //TX_B_POST_FILT_5 328 0x1000 //TX_B_POST_FILT_6 329 0x2000 //TX_B_POST_FILT_7 330 0x4000 //TX_B_LESSCUT_RTO_S_0 @@ -26653,26 +40393,26 @@ 332 0x7FFF //TX_B_LESSCUT_RTO_S_2 333 0x7FFF //TX_B_LESSCUT_RTO_S_3 334 0x7FFF //TX_B_LESSCUT_RTO_S_4 -335 0x7FFF //TX_B_LESSCUT_RTO_S_5 -336 0x6000 //TX_B_LESSCUT_RTO_S_6 +335 0x6000 //TX_B_LESSCUT_RTO_S_5 +336 0x7FFF //TX_B_LESSCUT_RTO_S_6 337 0x7FFF //TX_B_LESSCUT_RTO_S_7 338 0x7C00 //TX_LAMBDA_PFILT 339 0x7C00 //TX_LAMBDA_PFILT_S_0 340 0x7C00 //TX_LAMBDA_PFILT_S_1 -341 0x7C00 //TX_LAMBDA_PFILT_S_2 -342 0x7A00 //TX_LAMBDA_PFILT_S_3 +341 0x7A00 //TX_LAMBDA_PFILT_S_2 +342 0x7C00 //TX_LAMBDA_PFILT_S_3 343 0x7C00 //TX_LAMBDA_PFILT_S_4 344 0x7C00 //TX_LAMBDA_PFILT_S_5 345 0x7C00 //TX_LAMBDA_PFILT_S_6 346 0x7C00 //TX_LAMBDA_PFILT_S_7 -347 0x0000 //TX_K_PEPPER +347 0x0180 //TX_K_PEPPER 348 0x0800 //TX_A_PEPPER 349 0x1EAA //TX_K_PEPPER_HF 350 0x0600 //TX_A_PEPPER_HF 351 0x0001 //TX_HMNC_BST_FLG 352 0x0200 //TX_HMNC_BST_THR -353 0x0200 //TX_DT_BINVAD_TH_0 -354 0x0200 //TX_DT_BINVAD_TH_1 +353 0x2000 //TX_DT_BINVAD_TH_0 +354 0x0800 //TX_DT_BINVAD_TH_1 355 0x0200 //TX_DT_BINVAD_TH_2 356 0x0200 //TX_DT_BINVAD_TH_3 357 0x1F40 //TX_DT_BINVAD_ENDF @@ -26685,7 +40425,7 @@ 364 0x0000 //TX_K_APT 365 0x0001 //TX_NOISEDET 366 0x0064 //TX_NDETCT -367 0x0050 //TX_NOISE_TH_0 +367 0x04E8 //TX_NOISE_TH_0 368 0x7FFF //TX_NOISE_TH_0_2 369 0x7FFF //TX_NOISE_TH_0_3 370 0x07D0 //TX_NOISE_TH_1 @@ -26697,11 +40437,11 @@ 376 0x0000 //TX_NOISE_TH_5_3 377 0x7FFF //TX_NOISE_TH_5_4 378 0x2710 //TX_NOISE_TH_6 -379 0x0033 //TX_MINENOISE_TH -380 0x4000 //TX_MINENOISE_MIC0_TH_MTS -381 0xFFEE //TX_MINENOISE_MIC0_TH_EXP -382 0x6000 //TX_MINENOISE_MIC0_S_TH_MTS -383 0xFFF3 //TX_MINENOISE_MIC0_S_TH_EXP +379 0x02BC //TX_MINENOISE_TH +380 0xD508 //TX_MORENS_TFMASK_TH +381 0x0001 //TX_DRC_QUIET_FLOOR +382 0x3A98 //TX_RATIODTL_CUT_TH +383 0x1482 //TX_DT_CUT_K1 384 0x0666 //TX_OUT_ENER_S_TH_CLEAN 385 0x0666 //TX_OUT_ENER_S_TH_LESSCLEAN 386 0x0333 //TX_OUT_ENER_S_TH_NOISY @@ -26709,22 +40449,22 @@ 388 0x0333 //TX_OUT_ENER_TH_SPEECH 389 0x2000 //TX_SN_NPB_GAIN 390 0x0000 //TX_NN_NPB_GAIN -391 0x0000 //TX_CSX_ALPHA_0 -392 0x0000 //TX_CSX_ALPHA_1 -393 0x0000 //TX_CSX_ALPHA_2 -394 0x0000 //TX_CSX_ALPHA_3 -395 0x0800 //TX_MU_ARSP_EST -396 0x00C8 //TX_P_OUTBEAM_MIN_TH +391 0x7FFF //TX_POST_MASK_SUP_HSNE +392 0x1388 //TX_TAIL_DET_TH +393 0x4000 //TX_B_LESSCUT_RTO_WTA +394 0x0000 //TX_MEL_G_R +395 0x0080 //TX_SUPHIGH_TH +396 0x0000 //TX_MASK_G_R 397 0x0002 //TX_EXTRA_NS_L -398 0x0800 //TX_EXTRA_NS_A -399 0x0005 //TX_VR_NOISE_FLOOR_TH +398 0x1800 //TX_C_POST_FLT_MASK +399 0x7FFF //TX_A_POST_FLT_WNS 400 0x0148 //TX_MIN_G_LOW300HZ -401 0x0002 //TX_MAXLEVEL_CNG +401 0x0004 //TX_MAXLEVEL_CNG 402 0x00B4 //TX_STN_NOISE_TH 403 0x4000 //TX_POST_MASK_SUP 404 0x7FFF //TX_POST_MASK_ADJUST 405 0x00C8 //TX_NS_ENOISE_MIC0_TH -406 0x0033 //TX_MINENOISE_MIC0_TH +406 0x04E7 //TX_MINENOISE_MIC0_TH 407 0x012C //TX_MINENOISE_MIC0_S_TH 408 0x7FFF //TX_MIN_G_CTRL_SSNS 409 0x0000 //TX_METAL_RTO_THR @@ -26832,16 +40572,16 @@ 511 0x6666 //TX_MIC_TO_BFGAIN 512 0x0000 //TX_MICTOBFGAIN0 513 0x0000 //TX_FASTMUE_TH -514 0x0000 //TX_DERVB_LEN_0 -515 0x0000 //TX_DERVB_LEN_1 -516 0x0000 //TX_RHO_DERVB -517 0x0000 //TX_MIC_INDX_DERVB -518 0x0000 //TX_MU_DERVB -519 0x0000 //TX_DR_RESRV_0 -520 0x0000 //TX_DR_RESRV_1 -521 0x0000 //TX_DR_RESRV_2 -522 0x0000 //TX_DR_RESRV_3 -523 0x0000 //TX_DR_RESRV_4 +514 0xC000 //TX_DEREVERB_LF_MU +515 0xC000 //TX_DEREVERB_HF_MU +516 0xCCCC //TX_DEREVERB_DELAY +517 0xD999 //TX_DEREVERB_COEF_LEN +518 0x1F40 //TX_DEREVERB_DNR +519 0x0000 //TX_DEREVERB_ALPHA +520 0x0000 //TX_DEREVERB_BETA +521 0x0000 //TX_GSC_RTOL_TH +522 0x7000 //TX_GSC_RTOH_TH +523 0x0064 //TX_WIDE2_MEANHTH 524 0x0000 //TX_DR_RESRV_5 525 0x0000 //TX_DR_RESRV_6 526 0x0000 //TX_DR_RESRV_7 @@ -26888,19 +40628,19 @@ 567 0x4848 //TX_FDEQ_GAIN_0 568 0x4848 //TX_FDEQ_GAIN_1 569 0x4848 //TX_FDEQ_GAIN_2 -570 0x4848 //TX_FDEQ_GAIN_3 -571 0x4848 //TX_FDEQ_GAIN_4 -572 0x4848 //TX_FDEQ_GAIN_5 -573 0x4848 //TX_FDEQ_GAIN_6 -574 0x4848 //TX_FDEQ_GAIN_7 -575 0x4848 //TX_FDEQ_GAIN_8 -576 0x4853 //TX_FDEQ_GAIN_9 -577 0x5450 //TX_FDEQ_GAIN_10 -578 0x7465 //TX_FDEQ_GAIN_11 -579 0x807F //TX_FDEQ_GAIN_12 -580 0x82C4 //TX_FDEQ_GAIN_13 -581 0xC4C4 //TX_FDEQ_GAIN_14 -582 0xC4C4 //TX_FDEQ_GAIN_15 +570 0x484C //TX_FDEQ_GAIN_3 +571 0x4C4C //TX_FDEQ_GAIN_4 +572 0x544C //TX_FDEQ_GAIN_5 +573 0x5454 //TX_FDEQ_GAIN_6 +574 0x5454 //TX_FDEQ_GAIN_7 +575 0x585A //TX_FDEQ_GAIN_8 +576 0x5C5C //TX_FDEQ_GAIN_9 +577 0x6068 //TX_FDEQ_GAIN_10 +578 0x8894 //TX_FDEQ_GAIN_11 +579 0x94B4 //TX_FDEQ_GAIN_12 +580 0xB4C7 //TX_FDEQ_GAIN_13 +581 0xC7C6 //TX_FDEQ_GAIN_14 +582 0xC6C6 //TX_FDEQ_GAIN_15 583 0x4848 //TX_FDEQ_GAIN_16 584 0x4848 //TX_FDEQ_GAIN_17 585 0x4848 //TX_FDEQ_GAIN_18 @@ -26934,24 +40674,24 @@ 613 0x0000 //TX_FDEQ_BIN_22 614 0x0000 //TX_FDEQ_BIN_23 615 0x0000 //TX_FDEQ_PADDING -616 0x0020 //TX_PREEQ_SUBNUM_MIC0 +616 0x0030 //TX_PREEQ_SUBNUM_MIC0 617 0x4848 //TX_PREEQ_GAIN_MIC0_0 618 0x4848 //TX_PREEQ_GAIN_MIC0_1 619 0x4848 //TX_PREEQ_GAIN_MIC0_2 620 0x4848 //TX_PREEQ_GAIN_MIC0_3 621 0x4848 //TX_PREEQ_GAIN_MIC0_4 622 0x4848 //TX_PREEQ_GAIN_MIC0_5 -623 0x4A4C //TX_PREEQ_GAIN_MIC0_6 -624 0x4E50 //TX_PREEQ_GAIN_MIC0_7 -625 0x5456 //TX_PREEQ_GAIN_MIC0_8 -626 0x585C //TX_PREEQ_GAIN_MIC0_9 -627 0x5C64 //TX_PREEQ_GAIN_MIC0_10 -628 0x7478 //TX_PREEQ_GAIN_MIC0_11 -629 0x705C //TX_PREEQ_GAIN_MIC0_12 -630 0x4838 //TX_PREEQ_GAIN_MIC0_13 -631 0x3C70 //TX_PREEQ_GAIN_MIC0_14 -632 0x4848 //TX_PREEQ_GAIN_MIC0_15 -633 0x4848 //TX_PREEQ_GAIN_MIC0_16 +623 0x4849 //TX_PREEQ_GAIN_MIC0_6 +624 0x4A4B //TX_PREEQ_GAIN_MIC0_7 +625 0x4C4B //TX_PREEQ_GAIN_MIC0_8 +626 0x4A48 //TX_PREEQ_GAIN_MIC0_9 +627 0x4B4C //TX_PREEQ_GAIN_MIC0_10 +628 0x4C4B //TX_PREEQ_GAIN_MIC0_11 +629 0x4838 //TX_PREEQ_GAIN_MIC0_12 +630 0x3858 //TX_PREEQ_GAIN_MIC0_13 +631 0x7060 //TX_PREEQ_GAIN_MIC0_14 +632 0x9870 //TX_PREEQ_GAIN_MIC0_15 +633 0x5848 //TX_PREEQ_GAIN_MIC0_16 634 0x4848 //TX_PREEQ_GAIN_MIC0_17 635 0x4848 //TX_PREEQ_GAIN_MIC0_18 636 0x4848 //TX_PREEQ_GAIN_MIC0_19 @@ -26965,17 +40705,17 @@ 644 0x0304 //TX_PREEQ_BIN_MIC0_3 645 0x0405 //TX_PREEQ_BIN_MIC0_4 646 0x0506 //TX_PREEQ_BIN_MIC0_5 -647 0x0708 //TX_PREEQ_BIN_MIC0_6 -648 0x0909 //TX_PREEQ_BIN_MIC0_7 -649 0x090B //TX_PREEQ_BIN_MIC0_8 +647 0x0808 //TX_PREEQ_BIN_MIC0_6 +648 0x0809 //TX_PREEQ_BIN_MIC0_7 +649 0x0A0A //TX_PREEQ_BIN_MIC0_8 650 0x0C10 //TX_PREEQ_BIN_MIC0_9 651 0x1013 //TX_PREEQ_BIN_MIC0_10 652 0x1414 //TX_PREEQ_BIN_MIC0_11 -653 0x1414 //TX_PREEQ_BIN_MIC0_12 -654 0x1C1E //TX_PREEQ_BIN_MIC0_13 -655 0x1E28 //TX_PREEQ_BIN_MIC0_14 -656 0x462C //TX_PREEQ_BIN_MIC0_15 -657 0x0000 //TX_PREEQ_BIN_MIC0_16 +653 0x261E //TX_PREEQ_BIN_MIC0_12 +654 0x1E14 //TX_PREEQ_BIN_MIC0_13 +655 0x1414 //TX_PREEQ_BIN_MIC0_14 +656 0x2814 //TX_PREEQ_BIN_MIC0_15 +657 0x4000 //TX_PREEQ_BIN_MIC0_16 658 0x0000 //TX_PREEQ_BIN_MIC0_17 659 0x0000 //TX_PREEQ_BIN_MIC0_18 660 0x0000 //TX_PREEQ_BIN_MIC0_19 @@ -26990,15 +40730,15 @@ 669 0x4848 //TX_PREEQ_GAIN_MIC1_3 670 0x4848 //TX_PREEQ_GAIN_MIC1_4 671 0x4848 //TX_PREEQ_GAIN_MIC1_5 -672 0x4848 //TX_PREEQ_GAIN_MIC1_6 -673 0x4848 //TX_PREEQ_GAIN_MIC1_7 -674 0x4848 //TX_PREEQ_GAIN_MIC1_8 -675 0x4848 //TX_PREEQ_GAIN_MIC1_9 -676 0x4848 //TX_PREEQ_GAIN_MIC1_10 -677 0x4848 //TX_PREEQ_GAIN_MIC1_11 -678 0x4848 //TX_PREEQ_GAIN_MIC1_12 -679 0x4848 //TX_PREEQ_GAIN_MIC1_13 -680 0x4848 //TX_PREEQ_GAIN_MIC1_14 +672 0x4645 //TX_PREEQ_GAIN_MIC1_6 +673 0x4442 //TX_PREEQ_GAIN_MIC1_7 +674 0x4140 //TX_PREEQ_GAIN_MIC1_8 +675 0x3E3D //TX_PREEQ_GAIN_MIC1_9 +676 0x3C3C //TX_PREEQ_GAIN_MIC1_10 +677 0x3C3C //TX_PREEQ_GAIN_MIC1_11 +678 0x3938 //TX_PREEQ_GAIN_MIC1_12 +679 0x3A3C //TX_PREEQ_GAIN_MIC1_13 +680 0x3C3E //TX_PREEQ_GAIN_MIC1_14 681 0x4848 //TX_PREEQ_GAIN_MIC1_15 682 0x4848 //TX_PREEQ_GAIN_MIC1_16 683 0x4848 //TX_PREEQ_GAIN_MIC1_17 @@ -27008,23 +40748,23 @@ 687 0x4848 //TX_PREEQ_GAIN_MIC1_21 688 0x4848 //TX_PREEQ_GAIN_MIC1_22 689 0x4848 //TX_PREEQ_GAIN_MIC1_23 -690 0x1812 //TX_PREEQ_BIN_MIC1_0 -691 0x0A0A //TX_PREEQ_BIN_MIC1_1 -692 0x0808 //TX_PREEQ_BIN_MIC1_2 -693 0x080A //TX_PREEQ_BIN_MIC1_3 -694 0x0B09 //TX_PREEQ_BIN_MIC1_4 -695 0x0A06 //TX_PREEQ_BIN_MIC1_5 -696 0x0606 //TX_PREEQ_BIN_MIC1_6 -697 0x0605 //TX_PREEQ_BIN_MIC1_7 -698 0x050A //TX_PREEQ_BIN_MIC1_8 -699 0x1505 //TX_PREEQ_BIN_MIC1_9 -700 0x0506 //TX_PREEQ_BIN_MIC1_10 -701 0x0615 //TX_PREEQ_BIN_MIC1_11 -702 0x1516 //TX_PREEQ_BIN_MIC1_12 -703 0x2021 //TX_PREEQ_BIN_MIC1_13 -704 0x2021 //TX_PREEQ_BIN_MIC1_14 -705 0x2021 //TX_PREEQ_BIN_MIC1_15 -706 0x0800 //TX_PREEQ_BIN_MIC1_16 +690 0x0202 //TX_PREEQ_BIN_MIC1_0 +691 0x0203 //TX_PREEQ_BIN_MIC1_1 +692 0x0303 //TX_PREEQ_BIN_MIC1_2 +693 0x0304 //TX_PREEQ_BIN_MIC1_3 +694 0x0405 //TX_PREEQ_BIN_MIC1_4 +695 0x0506 //TX_PREEQ_BIN_MIC1_5 +696 0x0808 //TX_PREEQ_BIN_MIC1_6 +697 0x0809 //TX_PREEQ_BIN_MIC1_7 +698 0x0A0A //TX_PREEQ_BIN_MIC1_8 +699 0x0C10 //TX_PREEQ_BIN_MIC1_9 +700 0x1013 //TX_PREEQ_BIN_MIC1_10 +701 0x1414 //TX_PREEQ_BIN_MIC1_11 +702 0x261E //TX_PREEQ_BIN_MIC1_12 +703 0x1E14 //TX_PREEQ_BIN_MIC1_13 +704 0x1414 //TX_PREEQ_BIN_MIC1_14 +705 0x2814 //TX_PREEQ_BIN_MIC1_15 +706 0x4000 //TX_PREEQ_BIN_MIC1_16 707 0x0000 //TX_PREEQ_BIN_MIC1_17 708 0x0000 //TX_PREEQ_BIN_MIC1_18 709 0x0000 //TX_PREEQ_BIN_MIC1_19 @@ -27109,7 +40849,7 @@ 788 0x7EB8 //TX_TDDRC_ALPHA_DWN_02 789 0x7EB8 //TX_TDDRC_ALPHA_DWN_03 790 0x7EB8 //TX_TDDRC_ALPHA_DWN_04 -791 0x7FFF //TX_TDDRC_TD_DRC_LIMIT +791 0x7214 //TX_TDDRC_TD_DRC_LIMIT 792 0x0800 //TX_TDDRC_POST_LIMIT_GAIN 793 0x0000 //TX_TDDRC_RESRV_0 794 0x0000 //TX_TDDRC_RESRV_1 @@ -27171,20 +40911,20 @@ 850 0x0000 //TX_FFP_RESRV_4 851 0x0000 //TX_FFP_RESRV_5 852 0x0000 //TX_FFP_RESRV_6 -853 0x0004 //TX_FILTINDX +853 0x0002 //TX_FILTINDX 854 0x0004 //TX_TDDRC_THRD_0 855 0x0016 //TX_TDDRC_THRD_1 -856 0x1900 //TX_TDDRC_THRD_2 -857 0x1900 //TX_TDDRC_THRD_3 -858 0x3000 //TX_TDDRC_SLANT_0 -859 0x7B00 //TX_TDDRC_SLANT_1 +856 0x1800 //TX_TDDRC_THRD_2 +857 0x1800 //TX_TDDRC_THRD_3 +858 0x7FFF //TX_TDDRC_SLANT_0 +859 0x7FFF //TX_TDDRC_SLANT_1 860 0x0C00 //TX_TDDRC_ALPHA_UP_00 861 0x7EB8 //TX_TDDRC_ALPHA_DWN_00 862 0x0000 //TX_TDDRC_HMNC_FLAG 863 0x199A //TX_TDDRC_HMNC_GAIN 864 0x0000 //TX_TDDRC_SMT_FLAG 865 0x0CCD //TX_TDDRC_SMT_W -866 0x0A98 //TX_TDDRC_DRC_GAIN +866 0x0B39 //TX_TDDRC_DRC_GAIN 867 0x7FFF //TX_TDDRC_LMT_THRD 868 0x0000 //TX_TDDRC_LMT_ALPHA 869 0x0000 //TX_TFMASKLTH @@ -27209,14 +40949,79 @@ 888 0x0028 //TX_FASTNS_ARSPC_TH 889 0xC000 //TX_FASTNS_MASK5_TH 890 0x4848 //TX_POSTSSA_MIN_G_VR_MASK -891 0x1000 //TX_A_LESSCUT_RTO_MASK +891 0x7000 //TX_A_LESSCUT_RTO_MASK 892 0x1770 //TX_FASTNS_NOISETH 893 0xC000 //TX_FASTNS_SSA_THLFL 894 0xC000 //TX_FASTNS_SSA_THHFL 895 0xCCCC //TX_FASTNS_SSA_THLFH 896 0xD999 //TX_FASTNS_SSA_THHFH +897 0x2339 //TX_SENDFUNC_REG_MICMUTE +898 0x0021 //TX_SENDFUNC_REG_MICMUTE1 +899 0x02BC //TX_MICMUTE_RATIO_THR +900 0x0140 //TX_MICMUTE_AMP_THR +901 0x0004 //TX_MICMUTE_HPF_IND +902 0x00C0 //TX_MICMUTE_LOG_EYR_TH +903 0x0008 //TX_MICMUTE_CVG_TIME +904 0x0008 //TX_MICMUTE_RELEASE_TIME +905 0x01FE //TX_MIC_VOLUME_MIC0MUTE +906 0x0020 //TX_MICMUTE_EPD_OFFSET_0 +907 0x001E //TX_MICMUTE_FRQ_AEC_L +908 0x7999 //TX_MICMUTE_EAD_THR +909 0x7FFF //TX_MICMUTE_LAMBDA_CB_NLE +910 0x7FFF //TX_MICMUTE_LAMBDA_RE_EST +911 0x4000 //TX_DTD_THR1_MICMUTE_0 +912 0x7000 //TX_DTD_THR1_MICMUTE_1 +913 0x7FFF //TX_DTD_THR1_MICMUTE_2 +914 0x7FFF //TX_DTD_THR1_MICMUTE_3 +915 0x6CCC //TX_DTD_THR2_MICMUTE_0 +916 0x0400 //TX_MICMUTE_MIN_EQ_RE_EST_0 +917 0x0400 //TX_MICMUTE_MIN_EQ_RE_EST_1 +918 0x1000 //TX_MICMUTE_MIN_EQ_RE_EST_2 +919 0x7FFF //TX_MICMUTE_MIN_EQ_RE_EST_3 +920 0x7FFF //TX_MICMUTE_MIN_EQ_RE_EST_4 +921 0x4000 //TX_MICMUTE_C_POST_FLT +922 0x03E8 //TX_MICMUTE_DT_CUT_K +923 0x0001 //TX_MICMUTE_DT_CUT_THR +924 0x03E8 //TX_MICMUTE_DT_CUT_K2 +925 0x0001 //TX_MICMUTE_DT_CUT_THR2 +926 0x0064 //TX_MICMUTE_DT2_HOLD_N +927 0x1000 //TX_MICMUTE_RATIODTH_THCUT +928 0x1000 //TX_MICMUTE_B_POST_FLT_ECHOL +929 0x7FFF //TX_MICMUTE_B_POST_FLT_ECHOH +930 0x0400 //TX_MICMUTE_C_POST_FLT_MASK +931 0x7999 //TX_MICMUTE_RATIODTL_CUT_TH +932 0x0258 //TX_MICMUTE_DT_CUT_K1 +933 0x0800 //TX_MICMUTE_N2_SN_EST +934 0xFC00 //TX_MICMUTE_THR_SN_EST_0 +935 0x001C //TX_MICMUTE_MIN_G_CTRL_0 +936 0x6000 //TX_MICMUTE_A_POST_FILT_S_0 +937 0x7000 //TX_MICMUTE_B_POST_FILT_0 +938 0x2710 //TX_MIC1RUB_AMP_THR +939 0x0010 //TX_MIC1MUTE_RATIO_THR +940 0x0450 //TX_MIC1MUTE_AMP_THR +941 0x0008 //TX_MIC1MUTE_CVG_TIME +942 0x0008 //TX_MIC1MUTE_RELEASE_TIME +943 0x0000 //TX_AMS_RESRV_01 +944 0x0000 //TX_AMS_RESRV_02 +945 0x0000 //TX_AMS_RESRV_03 +946 0x0000 //TX_AMS_RESRV_04 +947 0x0000 //TX_AMS_RESRV_05 +948 0x0000 //TX_AMS_RESRV_06 +949 0x0000 //TX_AMS_RESRV_07 +950 0x0000 //TX_AMS_RESRV_08 +951 0x0000 //TX_AMS_RESRV_09 +952 0x0000 //TX_AMS_RESRV_10 +953 0x0000 //TX_AMS_RESRV_11 +954 0x0000 //TX_AMS_RESRV_12 +955 0x0000 //TX_AMS_RESRV_13 +956 0x0000 //TX_AMS_RESRV_14 +957 0x0000 //TX_AMS_RESRV_15 +958 0x0000 //TX_AMS_RESRV_16 +959 0x0000 //TX_AMS_RESRV_17 +960 0x0000 //TX_AMS_RESRV_18 +961 0x0000 //TX_AMS_RESRV_19 #RX -0 0x002C //RX_RECVFUNC_MODE_0 +0 0x202C //RX_RECVFUNC_MODE_0 1 0x0000 //RX_RECVFUNC_MODE_1 2 0x0004 //RX_SAMPLINGFREQ_SIG 3 0x0004 //RX_SAMPLINGFREQ_PROC @@ -28066,11 +41871,862 @@ 110 0x0000 //RX_FDDRC_RESRV_0 129 0x0100 //RX_SPK_VOL 130 0x0000 //RX_VOL_RESRV_0 +#RX 2 +157 0x202C //RX_RECVFUNC_MODE_0 +158 0x0000 //RX_RECVFUNC_MODE_1 +159 0x0004 //RX_SAMPLINGFREQ_SIG +160 0x0004 //RX_SAMPLINGFREQ_PROC +161 0x000A //RX_FRAME_SZ +162 0x0000 //RX_DELAY_OPT +163 0x1000 //RX_TDDRC_ALPHA_UP_1 +164 0x1000 //RX_TDDRC_ALPHA_UP_2 +165 0x1000 //RX_TDDRC_ALPHA_UP_3 +166 0x1000 //RX_TDDRC_ALPHA_UP_4 +167 0x0800 //RX_PGA +168 0x7B02 //RX_A_HP +169 0x4000 //RX_B_PE +170 0x7800 //RX_THR_PITCH_DET_0 +171 0x7000 //RX_THR_PITCH_DET_1 +172 0x6000 //RX_THR_PITCH_DET_2 +173 0x0008 //RX_PITCH_BFR_LEN +174 0x0003 //RX_SBD_PITCH_DET +175 0x0100 //RX_PP_RESRV_0 +176 0x0020 //RX_PP_RESRV_1 +177 0x0500 //RX_N_SN_EST +178 0x000C //RX_N2_SN_EST +179 0x000A //RX_NS_LVL_CTRL +180 0xF600 //RX_THR_SN_EST +181 0x7000 //RX_LAMBDA_PFILT +182 0x000A //RX_FENS_RESRV_0 +183 0x0190 //RX_FENS_RESRV_1 +184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +187 0x0002 //RX_EXTRA_NS_L +188 0x0800 //RX_EXTRA_NS_A +189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +190 0x7FFF //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +192 0x199A //RX_A_POST_FLT +193 0x0000 //RX_LMT_THRD +194 0x4000 //RX_LMT_ALPHA +195 0x0020 //RX_FDEQ_SUBNUM +196 0x4848 //RX_FDEQ_GAIN_0 +197 0x4848 //RX_FDEQ_GAIN_1 +198 0x4848 //RX_FDEQ_GAIN_2 +199 0x4848 //RX_FDEQ_GAIN_3 +200 0x4848 //RX_FDEQ_GAIN_4 +201 0x4848 //RX_FDEQ_GAIN_5 +202 0x4848 //RX_FDEQ_GAIN_6 +203 0x4848 //RX_FDEQ_GAIN_7 +204 0x4848 //RX_FDEQ_GAIN_8 +205 0x4848 //RX_FDEQ_GAIN_9 +206 0x4848 //RX_FDEQ_GAIN_10 +207 0x4848 //RX_FDEQ_GAIN_11 +208 0x4848 //RX_FDEQ_GAIN_12 +209 0x4848 //RX_FDEQ_GAIN_13 +210 0x4848 //RX_FDEQ_GAIN_14 +211 0x4848 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0202 //RX_FDEQ_BIN_0 +221 0x0203 //RX_FDEQ_BIN_1 +222 0x0304 //RX_FDEQ_BIN_2 +223 0x0405 //RX_FDEQ_BIN_3 +224 0x0607 //RX_FDEQ_BIN_4 +225 0x0809 //RX_FDEQ_BIN_5 +226 0x0A0B //RX_FDEQ_BIN_6 +227 0x0C0D //RX_FDEQ_BIN_7 +228 0x0E0F //RX_FDEQ_BIN_8 +229 0x1011 //RX_FDEQ_BIN_9 +230 0x1214 //RX_FDEQ_BIN_10 +231 0x1618 //RX_FDEQ_BIN_11 +232 0x1C1C //RX_FDEQ_BIN_12 +233 0x2020 //RX_FDEQ_BIN_13 +234 0x2020 //RX_FDEQ_BIN_14 +235 0x2011 //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x4000 //RX_FDEQ_RESRV_0 +245 0x0320 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0030 //RX_FDDRC_BAND_MARGIN_1 +248 0x0050 //RX_FDDRC_BAND_MARGIN_2 +249 0x0080 //RX_FDDRC_BAND_MARGIN_3 +250 0x0007 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x5000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x6400 //RX_FDDRC_THRD_3_2 +258 0x6400 //RX_FDDRC_THRD_3_3 +259 0x2000 //RX_FDDRC_SLANT_0_0 +260 0x2000 //RX_FDDRC_SLANT_0_1 +261 0x2000 //RX_FDDRC_SLANT_0_2 +262 0x2000 //RX_FDDRC_SLANT_0_3 +263 0x5333 //RX_FDDRC_SLANT_1_0 +264 0x5333 //RX_FDDRC_SLANT_1_1 +265 0x5333 //RX_FDDRC_SLANT_1_2 +266 0x5333 //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +268 0x0002 //RX_FILTINDX +269 0x0000 //RX_TDDRC_THRD_0 +270 0x0000 //RX_TDDRC_THRD_1 +271 0x1200 //RX_TDDRC_THRD_2 +272 0x1900 //RX_TDDRC_THRD_3 +273 0x3000 //RX_TDDRC_SLANT_0 +274 0x6E00 //RX_TDDRC_SLANT_1 +275 0x1000 //RX_TDDRC_ALPHA_UP_0 +276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x199A //RX_TDDRC_HMNC_GAIN +279 0x0001 //RX_TDDRC_SMT_FLAG +280 0x0CCD //RX_TDDRC_SMT_W +281 0x0240 //RX_TDDRC_DRC_GAIN +282 0x7C00 //RX_LAMBDA_PKA_FP +283 0x2000 //RX_TPKA_FP +284 0x2000 //RX_MIN_G_FP +285 0x0080 //RX_MAX_G_FP +286 0x000B //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 +288 0x0000 //RX_MAXLEVEL_CNG +289 0x3000 //RX_BWE_UV_TH +290 0x3000 //RX_BWE_UV_TH2 +291 0x1800 //RX_BWE_UV_TH3 +292 0x1000 //RX_BWE_V_TH +293 0x04CD //RX_BWE_GAIN1_V_TH1 +294 0x0F33 //RX_BWE_GAIN1_V_TH2 +295 0x7333 //RX_BWE_UV_EQ +296 0x199A //RX_BWE_V_EQ +297 0x7333 //RX_BWE_TONE_TH +298 0x0004 //RX_BWE_UV_HOLD_T +299 0x6CCD //RX_BWE_GAIN2_ALPHA +300 0x799A //RX_BWE_GAIN3_ALPHA +301 0x001E //RX_BWE_CUTOFF +302 0x3000 //RX_BWE_GAINFILL +303 0x3200 //RX_BWE_MAXTH_TONE +304 0x2000 //RX_BWE_EQ_0 +305 0x2000 //RX_BWE_EQ_1 +306 0x2000 //RX_BWE_EQ_2 +307 0x2000 //RX_BWE_EQ_3 +308 0x2000 //RX_BWE_EQ_4 +309 0x2000 //RX_BWE_EQ_5 +310 0x2000 //RX_BWE_EQ_6 +311 0x0000 //RX_BWE_RESRV_0 +312 0x0000 //RX_BWE_RESRV_1 +313 0x0000 //RX_BWE_RESRV_2 +#VOL 0 +163 0x1000 //RX_TDDRC_ALPHA_UP_1 +164 0x1000 //RX_TDDRC_ALPHA_UP_2 +165 0x1000 //RX_TDDRC_ALPHA_UP_3 +166 0x1000 //RX_TDDRC_ALPHA_UP_4 +184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +190 0x7FFF //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +269 0x0000 //RX_TDDRC_THRD_0 +270 0x0000 //RX_TDDRC_THRD_1 +271 0x1200 //RX_TDDRC_THRD_2 +272 0x1900 //RX_TDDRC_THRD_3 +273 0x3000 //RX_TDDRC_SLANT_0 +274 0x6E00 //RX_TDDRC_SLANT_1 +275 0x1000 //RX_TDDRC_ALPHA_UP_0 +276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x199A //RX_TDDRC_HMNC_GAIN +279 0x0001 //RX_TDDRC_SMT_FLAG +280 0x0CCD //RX_TDDRC_SMT_W +281 0x0240 //RX_TDDRC_DRC_GAIN +195 0x0020 //RX_FDEQ_SUBNUM +196 0x4848 //RX_FDEQ_GAIN_0 +197 0x4848 //RX_FDEQ_GAIN_1 +198 0x4848 //RX_FDEQ_GAIN_2 +199 0x4848 //RX_FDEQ_GAIN_3 +200 0x4848 //RX_FDEQ_GAIN_4 +201 0x4848 //RX_FDEQ_GAIN_5 +202 0x4848 //RX_FDEQ_GAIN_6 +203 0x4848 //RX_FDEQ_GAIN_7 +204 0x4848 //RX_FDEQ_GAIN_8 +205 0x4848 //RX_FDEQ_GAIN_9 +206 0x4848 //RX_FDEQ_GAIN_10 +207 0x4848 //RX_FDEQ_GAIN_11 +208 0x4848 //RX_FDEQ_GAIN_12 +209 0x4848 //RX_FDEQ_GAIN_13 +210 0x4848 //RX_FDEQ_GAIN_14 +211 0x4848 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0202 //RX_FDEQ_BIN_0 +221 0x0203 //RX_FDEQ_BIN_1 +222 0x0304 //RX_FDEQ_BIN_2 +223 0x0405 //RX_FDEQ_BIN_3 +224 0x0607 //RX_FDEQ_BIN_4 +225 0x0809 //RX_FDEQ_BIN_5 +226 0x0A0B //RX_FDEQ_BIN_6 +227 0x0C0D //RX_FDEQ_BIN_7 +228 0x0E0F //RX_FDEQ_BIN_8 +229 0x1011 //RX_FDEQ_BIN_9 +230 0x1214 //RX_FDEQ_BIN_10 +231 0x1618 //RX_FDEQ_BIN_11 +232 0x1C1C //RX_FDEQ_BIN_12 +233 0x2020 //RX_FDEQ_BIN_13 +234 0x2020 //RX_FDEQ_BIN_14 +235 0x2011 //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x4000 //RX_FDEQ_RESRV_0 +245 0x0320 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0030 //RX_FDDRC_BAND_MARGIN_1 +248 0x0050 //RX_FDDRC_BAND_MARGIN_2 +249 0x0080 //RX_FDDRC_BAND_MARGIN_3 +250 0x0007 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x5000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x6400 //RX_FDDRC_THRD_3_2 +258 0x6400 //RX_FDDRC_THRD_3_3 +259 0x2000 //RX_FDDRC_SLANT_0_0 +260 0x2000 //RX_FDDRC_SLANT_0_1 +261 0x2000 //RX_FDDRC_SLANT_0_2 +262 0x2000 //RX_FDDRC_SLANT_0_3 +263 0x5333 //RX_FDDRC_SLANT_1_0 +264 0x5333 //RX_FDDRC_SLANT_1_1 +265 0x5333 //RX_FDDRC_SLANT_1_2 +266 0x5333 //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +286 0x000B //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 +#VOL 1 +163 0x1000 //RX_TDDRC_ALPHA_UP_1 +164 0x1000 //RX_TDDRC_ALPHA_UP_2 +165 0x1000 //RX_TDDRC_ALPHA_UP_3 +166 0x1000 //RX_TDDRC_ALPHA_UP_4 +184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +190 0x7FFF //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +269 0x0000 //RX_TDDRC_THRD_0 +270 0x0000 //RX_TDDRC_THRD_1 +271 0x1200 //RX_TDDRC_THRD_2 +272 0x1900 //RX_TDDRC_THRD_3 +273 0x3000 //RX_TDDRC_SLANT_0 +274 0x6E00 //RX_TDDRC_SLANT_1 +275 0x1000 //RX_TDDRC_ALPHA_UP_0 +276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x199A //RX_TDDRC_HMNC_GAIN +279 0x0001 //RX_TDDRC_SMT_FLAG +280 0x0CCD //RX_TDDRC_SMT_W +281 0x0240 //RX_TDDRC_DRC_GAIN +195 0x0020 //RX_FDEQ_SUBNUM +196 0x4848 //RX_FDEQ_GAIN_0 +197 0x4848 //RX_FDEQ_GAIN_1 +198 0x4848 //RX_FDEQ_GAIN_2 +199 0x4848 //RX_FDEQ_GAIN_3 +200 0x4848 //RX_FDEQ_GAIN_4 +201 0x4848 //RX_FDEQ_GAIN_5 +202 0x4848 //RX_FDEQ_GAIN_6 +203 0x4848 //RX_FDEQ_GAIN_7 +204 0x4848 //RX_FDEQ_GAIN_8 +205 0x4848 //RX_FDEQ_GAIN_9 +206 0x4848 //RX_FDEQ_GAIN_10 +207 0x4848 //RX_FDEQ_GAIN_11 +208 0x4848 //RX_FDEQ_GAIN_12 +209 0x4848 //RX_FDEQ_GAIN_13 +210 0x4848 //RX_FDEQ_GAIN_14 +211 0x4848 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0202 //RX_FDEQ_BIN_0 +221 0x0203 //RX_FDEQ_BIN_1 +222 0x0304 //RX_FDEQ_BIN_2 +223 0x0405 //RX_FDEQ_BIN_3 +224 0x0607 //RX_FDEQ_BIN_4 +225 0x0809 //RX_FDEQ_BIN_5 +226 0x0A0B //RX_FDEQ_BIN_6 +227 0x0C0D //RX_FDEQ_BIN_7 +228 0x0E0F //RX_FDEQ_BIN_8 +229 0x1011 //RX_FDEQ_BIN_9 +230 0x1214 //RX_FDEQ_BIN_10 +231 0x1618 //RX_FDEQ_BIN_11 +232 0x1C1C //RX_FDEQ_BIN_12 +233 0x2020 //RX_FDEQ_BIN_13 +234 0x2020 //RX_FDEQ_BIN_14 +235 0x2011 //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x4000 //RX_FDEQ_RESRV_0 +245 0x0320 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0030 //RX_FDDRC_BAND_MARGIN_1 +248 0x0050 //RX_FDDRC_BAND_MARGIN_2 +249 0x0080 //RX_FDDRC_BAND_MARGIN_3 +250 0x0007 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x5000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x6400 //RX_FDDRC_THRD_3_2 +258 0x6400 //RX_FDDRC_THRD_3_3 +259 0x2000 //RX_FDDRC_SLANT_0_0 +260 0x2000 //RX_FDDRC_SLANT_0_1 +261 0x2000 //RX_FDDRC_SLANT_0_2 +262 0x2000 //RX_FDDRC_SLANT_0_3 +263 0x5333 //RX_FDDRC_SLANT_1_0 +264 0x5333 //RX_FDDRC_SLANT_1_1 +265 0x5333 //RX_FDDRC_SLANT_1_2 +266 0x5333 //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +286 0x0013 //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 +#VOL 2 +163 0x1000 //RX_TDDRC_ALPHA_UP_1 +164 0x1000 //RX_TDDRC_ALPHA_UP_2 +165 0x1000 //RX_TDDRC_ALPHA_UP_3 +166 0x1000 //RX_TDDRC_ALPHA_UP_4 +184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +190 0x7FFF //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +269 0x0000 //RX_TDDRC_THRD_0 +270 0x0000 //RX_TDDRC_THRD_1 +271 0x1200 //RX_TDDRC_THRD_2 +272 0x1900 //RX_TDDRC_THRD_3 +273 0x3000 //RX_TDDRC_SLANT_0 +274 0x6E00 //RX_TDDRC_SLANT_1 +275 0x1000 //RX_TDDRC_ALPHA_UP_0 +276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x199A //RX_TDDRC_HMNC_GAIN +279 0x0001 //RX_TDDRC_SMT_FLAG +280 0x0CCD //RX_TDDRC_SMT_W +281 0x0240 //RX_TDDRC_DRC_GAIN +195 0x0020 //RX_FDEQ_SUBNUM +196 0x4848 //RX_FDEQ_GAIN_0 +197 0x4848 //RX_FDEQ_GAIN_1 +198 0x4848 //RX_FDEQ_GAIN_2 +199 0x4848 //RX_FDEQ_GAIN_3 +200 0x4848 //RX_FDEQ_GAIN_4 +201 0x4848 //RX_FDEQ_GAIN_5 +202 0x4848 //RX_FDEQ_GAIN_6 +203 0x4848 //RX_FDEQ_GAIN_7 +204 0x4848 //RX_FDEQ_GAIN_8 +205 0x4848 //RX_FDEQ_GAIN_9 +206 0x4848 //RX_FDEQ_GAIN_10 +207 0x4848 //RX_FDEQ_GAIN_11 +208 0x4848 //RX_FDEQ_GAIN_12 +209 0x4848 //RX_FDEQ_GAIN_13 +210 0x4848 //RX_FDEQ_GAIN_14 +211 0x4848 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0202 //RX_FDEQ_BIN_0 +221 0x0203 //RX_FDEQ_BIN_1 +222 0x0304 //RX_FDEQ_BIN_2 +223 0x0405 //RX_FDEQ_BIN_3 +224 0x0607 //RX_FDEQ_BIN_4 +225 0x0809 //RX_FDEQ_BIN_5 +226 0x0A0B //RX_FDEQ_BIN_6 +227 0x0C0D //RX_FDEQ_BIN_7 +228 0x0E0F //RX_FDEQ_BIN_8 +229 0x1011 //RX_FDEQ_BIN_9 +230 0x1214 //RX_FDEQ_BIN_10 +231 0x1618 //RX_FDEQ_BIN_11 +232 0x1C1C //RX_FDEQ_BIN_12 +233 0x2020 //RX_FDEQ_BIN_13 +234 0x2020 //RX_FDEQ_BIN_14 +235 0x2011 //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x4000 //RX_FDEQ_RESRV_0 +245 0x0320 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0030 //RX_FDDRC_BAND_MARGIN_1 +248 0x0050 //RX_FDDRC_BAND_MARGIN_2 +249 0x0080 //RX_FDDRC_BAND_MARGIN_3 +250 0x0007 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x5000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x6400 //RX_FDDRC_THRD_3_2 +258 0x6400 //RX_FDDRC_THRD_3_3 +259 0x2000 //RX_FDDRC_SLANT_0_0 +260 0x2000 //RX_FDDRC_SLANT_0_1 +261 0x2000 //RX_FDDRC_SLANT_0_2 +262 0x2000 //RX_FDDRC_SLANT_0_3 +263 0x5333 //RX_FDDRC_SLANT_1_0 +264 0x5333 //RX_FDDRC_SLANT_1_1 +265 0x5333 //RX_FDDRC_SLANT_1_2 +266 0x5333 //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +286 0x0020 //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 +#VOL 3 +163 0x1000 //RX_TDDRC_ALPHA_UP_1 +164 0x1000 //RX_TDDRC_ALPHA_UP_2 +165 0x1000 //RX_TDDRC_ALPHA_UP_3 +166 0x1000 //RX_TDDRC_ALPHA_UP_4 +184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +190 0x7FFF //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +269 0x0000 //RX_TDDRC_THRD_0 +270 0x0000 //RX_TDDRC_THRD_1 +271 0x1200 //RX_TDDRC_THRD_2 +272 0x1900 //RX_TDDRC_THRD_3 +273 0x3000 //RX_TDDRC_SLANT_0 +274 0x6E00 //RX_TDDRC_SLANT_1 +275 0x1000 //RX_TDDRC_ALPHA_UP_0 +276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x199A //RX_TDDRC_HMNC_GAIN +279 0x0001 //RX_TDDRC_SMT_FLAG +280 0x0CCD //RX_TDDRC_SMT_W +281 0x0240 //RX_TDDRC_DRC_GAIN +195 0x0020 //RX_FDEQ_SUBNUM +196 0x4848 //RX_FDEQ_GAIN_0 +197 0x4848 //RX_FDEQ_GAIN_1 +198 0x4848 //RX_FDEQ_GAIN_2 +199 0x4848 //RX_FDEQ_GAIN_3 +200 0x4848 //RX_FDEQ_GAIN_4 +201 0x4848 //RX_FDEQ_GAIN_5 +202 0x4848 //RX_FDEQ_GAIN_6 +203 0x4848 //RX_FDEQ_GAIN_7 +204 0x4848 //RX_FDEQ_GAIN_8 +205 0x4848 //RX_FDEQ_GAIN_9 +206 0x4848 //RX_FDEQ_GAIN_10 +207 0x4848 //RX_FDEQ_GAIN_11 +208 0x4848 //RX_FDEQ_GAIN_12 +209 0x4848 //RX_FDEQ_GAIN_13 +210 0x4848 //RX_FDEQ_GAIN_14 +211 0x4848 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0202 //RX_FDEQ_BIN_0 +221 0x0203 //RX_FDEQ_BIN_1 +222 0x0304 //RX_FDEQ_BIN_2 +223 0x0405 //RX_FDEQ_BIN_3 +224 0x0607 //RX_FDEQ_BIN_4 +225 0x0809 //RX_FDEQ_BIN_5 +226 0x0A0B //RX_FDEQ_BIN_6 +227 0x0C0D //RX_FDEQ_BIN_7 +228 0x0E0F //RX_FDEQ_BIN_8 +229 0x1011 //RX_FDEQ_BIN_9 +230 0x1214 //RX_FDEQ_BIN_10 +231 0x1618 //RX_FDEQ_BIN_11 +232 0x1C1C //RX_FDEQ_BIN_12 +233 0x2020 //RX_FDEQ_BIN_13 +234 0x2020 //RX_FDEQ_BIN_14 +235 0x2011 //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x4000 //RX_FDEQ_RESRV_0 +245 0x0320 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0030 //RX_FDDRC_BAND_MARGIN_1 +248 0x0050 //RX_FDDRC_BAND_MARGIN_2 +249 0x0080 //RX_FDDRC_BAND_MARGIN_3 +250 0x0007 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x5000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x6400 //RX_FDDRC_THRD_3_2 +258 0x6400 //RX_FDDRC_THRD_3_3 +259 0x2000 //RX_FDDRC_SLANT_0_0 +260 0x2000 //RX_FDDRC_SLANT_0_1 +261 0x2000 //RX_FDDRC_SLANT_0_2 +262 0x2000 //RX_FDDRC_SLANT_0_3 +263 0x5333 //RX_FDDRC_SLANT_1_0 +264 0x5333 //RX_FDDRC_SLANT_1_1 +265 0x5333 //RX_FDDRC_SLANT_1_2 +266 0x5333 //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +286 0x0036 //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 +#VOL 4 +163 0x1000 //RX_TDDRC_ALPHA_UP_1 +164 0x1000 //RX_TDDRC_ALPHA_UP_2 +165 0x1000 //RX_TDDRC_ALPHA_UP_3 +166 0x1000 //RX_TDDRC_ALPHA_UP_4 +184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +190 0x7FFF //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +269 0x0000 //RX_TDDRC_THRD_0 +270 0x0000 //RX_TDDRC_THRD_1 +271 0x1200 //RX_TDDRC_THRD_2 +272 0x1900 //RX_TDDRC_THRD_3 +273 0x3000 //RX_TDDRC_SLANT_0 +274 0x6E00 //RX_TDDRC_SLANT_1 +275 0x1000 //RX_TDDRC_ALPHA_UP_0 +276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x199A //RX_TDDRC_HMNC_GAIN +279 0x0001 //RX_TDDRC_SMT_FLAG +280 0x0CCD //RX_TDDRC_SMT_W +281 0x0240 //RX_TDDRC_DRC_GAIN +195 0x0020 //RX_FDEQ_SUBNUM +196 0x4848 //RX_FDEQ_GAIN_0 +197 0x4848 //RX_FDEQ_GAIN_1 +198 0x4848 //RX_FDEQ_GAIN_2 +199 0x4848 //RX_FDEQ_GAIN_3 +200 0x4848 //RX_FDEQ_GAIN_4 +201 0x4848 //RX_FDEQ_GAIN_5 +202 0x4848 //RX_FDEQ_GAIN_6 +203 0x4848 //RX_FDEQ_GAIN_7 +204 0x4848 //RX_FDEQ_GAIN_8 +205 0x4848 //RX_FDEQ_GAIN_9 +206 0x4848 //RX_FDEQ_GAIN_10 +207 0x4848 //RX_FDEQ_GAIN_11 +208 0x4848 //RX_FDEQ_GAIN_12 +209 0x4848 //RX_FDEQ_GAIN_13 +210 0x4848 //RX_FDEQ_GAIN_14 +211 0x4848 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0202 //RX_FDEQ_BIN_0 +221 0x0203 //RX_FDEQ_BIN_1 +222 0x0304 //RX_FDEQ_BIN_2 +223 0x0405 //RX_FDEQ_BIN_3 +224 0x0607 //RX_FDEQ_BIN_4 +225 0x0809 //RX_FDEQ_BIN_5 +226 0x0A0B //RX_FDEQ_BIN_6 +227 0x0C0D //RX_FDEQ_BIN_7 +228 0x0E0F //RX_FDEQ_BIN_8 +229 0x1011 //RX_FDEQ_BIN_9 +230 0x1214 //RX_FDEQ_BIN_10 +231 0x1618 //RX_FDEQ_BIN_11 +232 0x1C1C //RX_FDEQ_BIN_12 +233 0x2020 //RX_FDEQ_BIN_13 +234 0x2020 //RX_FDEQ_BIN_14 +235 0x2011 //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x4000 //RX_FDEQ_RESRV_0 +245 0x0320 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0030 //RX_FDDRC_BAND_MARGIN_1 +248 0x0050 //RX_FDDRC_BAND_MARGIN_2 +249 0x0080 //RX_FDDRC_BAND_MARGIN_3 +250 0x0007 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x5000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x6400 //RX_FDDRC_THRD_3_2 +258 0x6400 //RX_FDDRC_THRD_3_3 +259 0x2000 //RX_FDDRC_SLANT_0_0 +260 0x2000 //RX_FDDRC_SLANT_0_1 +261 0x2000 //RX_FDDRC_SLANT_0_2 +262 0x2000 //RX_FDDRC_SLANT_0_3 +263 0x5333 //RX_FDDRC_SLANT_1_0 +264 0x5333 //RX_FDDRC_SLANT_1_1 +265 0x5333 //RX_FDDRC_SLANT_1_2 +266 0x5333 //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +286 0x005B //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 +#VOL 5 +163 0x1000 //RX_TDDRC_ALPHA_UP_1 +164 0x1000 //RX_TDDRC_ALPHA_UP_2 +165 0x1000 //RX_TDDRC_ALPHA_UP_3 +166 0x1000 //RX_TDDRC_ALPHA_UP_4 +184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +190 0x7FFF //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +269 0x0000 //RX_TDDRC_THRD_0 +270 0x0000 //RX_TDDRC_THRD_1 +271 0x1200 //RX_TDDRC_THRD_2 +272 0x1900 //RX_TDDRC_THRD_3 +273 0x3000 //RX_TDDRC_SLANT_0 +274 0x6E00 //RX_TDDRC_SLANT_1 +275 0x1000 //RX_TDDRC_ALPHA_UP_0 +276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x199A //RX_TDDRC_HMNC_GAIN +279 0x0001 //RX_TDDRC_SMT_FLAG +280 0x0CCD //RX_TDDRC_SMT_W +281 0x0240 //RX_TDDRC_DRC_GAIN +195 0x0020 //RX_FDEQ_SUBNUM +196 0x4848 //RX_FDEQ_GAIN_0 +197 0x4848 //RX_FDEQ_GAIN_1 +198 0x4848 //RX_FDEQ_GAIN_2 +199 0x4848 //RX_FDEQ_GAIN_3 +200 0x4848 //RX_FDEQ_GAIN_4 +201 0x4848 //RX_FDEQ_GAIN_5 +202 0x4848 //RX_FDEQ_GAIN_6 +203 0x4848 //RX_FDEQ_GAIN_7 +204 0x4848 //RX_FDEQ_GAIN_8 +205 0x4848 //RX_FDEQ_GAIN_9 +206 0x4848 //RX_FDEQ_GAIN_10 +207 0x4848 //RX_FDEQ_GAIN_11 +208 0x4848 //RX_FDEQ_GAIN_12 +209 0x4848 //RX_FDEQ_GAIN_13 +210 0x4848 //RX_FDEQ_GAIN_14 +211 0x4848 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0202 //RX_FDEQ_BIN_0 +221 0x0203 //RX_FDEQ_BIN_1 +222 0x0304 //RX_FDEQ_BIN_2 +223 0x0405 //RX_FDEQ_BIN_3 +224 0x0607 //RX_FDEQ_BIN_4 +225 0x0809 //RX_FDEQ_BIN_5 +226 0x0A0B //RX_FDEQ_BIN_6 +227 0x0C0D //RX_FDEQ_BIN_7 +228 0x0E0F //RX_FDEQ_BIN_8 +229 0x1011 //RX_FDEQ_BIN_9 +230 0x1214 //RX_FDEQ_BIN_10 +231 0x1618 //RX_FDEQ_BIN_11 +232 0x1C1C //RX_FDEQ_BIN_12 +233 0x2020 //RX_FDEQ_BIN_13 +234 0x2020 //RX_FDEQ_BIN_14 +235 0x2011 //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x4000 //RX_FDEQ_RESRV_0 +245 0x0320 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0030 //RX_FDDRC_BAND_MARGIN_1 +248 0x0050 //RX_FDDRC_BAND_MARGIN_2 +249 0x0080 //RX_FDDRC_BAND_MARGIN_3 +250 0x0007 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x5000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x6400 //RX_FDDRC_THRD_3_2 +258 0x6400 //RX_FDDRC_THRD_3_3 +259 0x2000 //RX_FDDRC_SLANT_0_0 +260 0x2000 //RX_FDDRC_SLANT_0_1 +261 0x2000 //RX_FDDRC_SLANT_0_2 +262 0x2000 //RX_FDDRC_SLANT_0_3 +263 0x5333 //RX_FDDRC_SLANT_1_0 +264 0x5333 //RX_FDDRC_SLANT_1_1 +265 0x5333 //RX_FDDRC_SLANT_1_2 +266 0x5333 //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +286 0x0099 //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 +#VOL 6 +163 0x1000 //RX_TDDRC_ALPHA_UP_1 +164 0x1000 //RX_TDDRC_ALPHA_UP_2 +165 0x1000 //RX_TDDRC_ALPHA_UP_3 +166 0x1000 //RX_TDDRC_ALPHA_UP_4 +184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +190 0x7FFF //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +269 0x0000 //RX_TDDRC_THRD_0 +270 0x0000 //RX_TDDRC_THRD_1 +271 0x1200 //RX_TDDRC_THRD_2 +272 0x1900 //RX_TDDRC_THRD_3 +273 0x3000 //RX_TDDRC_SLANT_0 +274 0x6E00 //RX_TDDRC_SLANT_1 +275 0x1000 //RX_TDDRC_ALPHA_UP_0 +276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x199A //RX_TDDRC_HMNC_GAIN +279 0x0001 //RX_TDDRC_SMT_FLAG +280 0x0CCD //RX_TDDRC_SMT_W +281 0x0240 //RX_TDDRC_DRC_GAIN +195 0x0020 //RX_FDEQ_SUBNUM +196 0x4848 //RX_FDEQ_GAIN_0 +197 0x4848 //RX_FDEQ_GAIN_1 +198 0x4848 //RX_FDEQ_GAIN_2 +199 0x4848 //RX_FDEQ_GAIN_3 +200 0x4848 //RX_FDEQ_GAIN_4 +201 0x4848 //RX_FDEQ_GAIN_5 +202 0x4848 //RX_FDEQ_GAIN_6 +203 0x4848 //RX_FDEQ_GAIN_7 +204 0x4848 //RX_FDEQ_GAIN_8 +205 0x4848 //RX_FDEQ_GAIN_9 +206 0x4848 //RX_FDEQ_GAIN_10 +207 0x4848 //RX_FDEQ_GAIN_11 +208 0x4848 //RX_FDEQ_GAIN_12 +209 0x4848 //RX_FDEQ_GAIN_13 +210 0x4848 //RX_FDEQ_GAIN_14 +211 0x4848 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0202 //RX_FDEQ_BIN_0 +221 0x0203 //RX_FDEQ_BIN_1 +222 0x0304 //RX_FDEQ_BIN_2 +223 0x0405 //RX_FDEQ_BIN_3 +224 0x0607 //RX_FDEQ_BIN_4 +225 0x0809 //RX_FDEQ_BIN_5 +226 0x0A0B //RX_FDEQ_BIN_6 +227 0x0C0D //RX_FDEQ_BIN_7 +228 0x0E0F //RX_FDEQ_BIN_8 +229 0x1011 //RX_FDEQ_BIN_9 +230 0x1214 //RX_FDEQ_BIN_10 +231 0x1618 //RX_FDEQ_BIN_11 +232 0x1C1C //RX_FDEQ_BIN_12 +233 0x2020 //RX_FDEQ_BIN_13 +234 0x2020 //RX_FDEQ_BIN_14 +235 0x2011 //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x4000 //RX_FDEQ_RESRV_0 +245 0x0320 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0030 //RX_FDDRC_BAND_MARGIN_1 +248 0x0050 //RX_FDDRC_BAND_MARGIN_2 +249 0x0080 //RX_FDDRC_BAND_MARGIN_3 +250 0x0007 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x5000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x6400 //RX_FDDRC_THRD_3_2 +258 0x6400 //RX_FDDRC_THRD_3_3 +259 0x2000 //RX_FDDRC_SLANT_0_0 +260 0x2000 //RX_FDDRC_SLANT_0_1 +261 0x2000 //RX_FDDRC_SLANT_0_2 +262 0x2000 //RX_FDDRC_SLANT_0_3 +263 0x5333 //RX_FDDRC_SLANT_1_0 +264 0x5333 //RX_FDDRC_SLANT_1_1 +265 0x5333 //RX_FDDRC_SLANT_1_2 +266 0x5333 //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +286 0x0100 //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 #CASE_NAME HEADSET-GOOGLE_CONDOR_CERTIFICATION1-VOICE_GENERIC-NB -#PARAM_MODE FULL -#PARAM_TYPE TX+RX -#TOTAL_CUSTOM_STEP 7 +#PARAM_MODE Full +#PARAM_TYPE TX+2RX +#TOTAL_CUSTOM_STEP 7+7 #TX 0 0x0009 //TX_OPERATION_MODE_0 1 0x0008 //TX_OPERATION_MODE_1 @@ -28387,20 +43043,20 @@ 312 0x7FFF //TX_A_POST_FILT_0 313 0x2000 //TX_A_POST_FILT_1 314 0x4000 //TX_A_POST_FILT_S_0 -315 0x4000 //TX_A_POST_FILT_S_1 -316 0x1000 //TX_A_POST_FILT_S_2 +315 0x1000 //TX_A_POST_FILT_S_1 +316 0x4000 //TX_A_POST_FILT_S_2 317 0x4000 //TX_A_POST_FILT_S_3 318 0x4000 //TX_A_POST_FILT_S_4 319 0x4000 //TX_A_POST_FILT_S_5 320 0x4000 //TX_A_POST_FILT_S_6 321 0x4000 //TX_A_POST_FILT_S_7 322 0x0400 //TX_B_POST_FILT_0 -323 0x0400 //TX_B_POST_FILT_1 +323 0x2000 //TX_B_POST_FILT_1 324 0x2000 //TX_B_POST_FILT_2 325 0x2000 //TX_B_POST_FILT_3 326 0x2000 //TX_B_POST_FILT_4 327 0x2000 //TX_B_POST_FILT_5 -328 0x2000 //TX_B_POST_FILT_6 +328 0x0400 //TX_B_POST_FILT_6 329 0x2000 //TX_B_POST_FILT_7 330 0x7FFF //TX_B_LESSCUT_RTO_S_0 331 0x7FFF //TX_B_LESSCUT_RTO_S_1 @@ -28439,7 +43095,7 @@ 364 0x0000 //TX_K_APT 365 0x0001 //TX_NOISEDET 366 0x0190 //TX_NDETCT -367 0x000A //TX_NOISE_TH_0 +367 0x003B //TX_NOISE_TH_0 368 0x1B58 //TX_NOISE_TH_0_2 369 0x2134 //TX_NOISE_TH_0_3 370 0x02BC //TX_NOISE_TH_1 @@ -28451,11 +43107,11 @@ 376 0x0000 //TX_NOISE_TH_5_3 377 0x0000 //TX_NOISE_TH_5_4 378 0x0032 //TX_NOISE_TH_6 -379 0x0014 //TX_MINENOISE_TH -380 0x4000 //TX_MINENOISE_MIC0_TH_MTS -381 0xFFEE //TX_MINENOISE_MIC0_TH_EXP -382 0x6000 //TX_MINENOISE_MIC0_S_TH_MTS -383 0xFFF3 //TX_MINENOISE_MIC0_S_TH_EXP +379 0x00C8 //TX_MINENOISE_TH +380 0xD508 //TX_MORENS_TFMASK_TH +381 0x0001 //TX_DRC_QUIET_FLOOR +382 0x3A98 //TX_RATIODTL_CUT_TH +383 0x0DAC //TX_DT_CUT_K1 384 0x00A5 //TX_OUT_ENER_S_TH_CLEAN 385 0x00A5 //TX_OUT_ENER_S_TH_LESSCLEAN 386 0x00A5 //TX_OUT_ENER_S_TH_NOISY @@ -28463,22 +43119,22 @@ 388 0x00CE //TX_OUT_ENER_TH_SPEECH 389 0x2000 //TX_SN_NPB_GAIN 390 0x0000 //TX_NN_NPB_GAIN -391 0x0000 //TX_CSX_ALPHA_0 -392 0x0000 //TX_CSX_ALPHA_1 -393 0x0000 //TX_CSX_ALPHA_2 -394 0x0000 //TX_CSX_ALPHA_3 -395 0x0800 //TX_MU_ARSP_EST -396 0x00C8 //TX_P_OUTBEAM_MIN_TH +391 0x7FFF //TX_POST_MASK_SUP_HSNE +392 0x1388 //TX_TAIL_DET_TH +393 0x4000 //TX_B_LESSCUT_RTO_WTA +394 0x0000 //TX_MEL_G_R +395 0x0080 //TX_SUPHIGH_TH +396 0x0000 //TX_MASK_G_R 397 0x0002 //TX_EXTRA_NS_L -398 0x0800 //TX_EXTRA_NS_A -399 0x0005 //TX_VR_NOISE_FLOOR_TH +398 0x1800 //TX_C_POST_FLT_MASK +399 0x7FFF //TX_A_POST_FLT_WNS 400 0x0148 //TX_MIN_G_LOW300HZ 401 0x0002 //TX_MAXLEVEL_CNG 402 0x00B4 //TX_STN_NOISE_TH 403 0x4000 //TX_POST_MASK_SUP 404 0x7FFF //TX_POST_MASK_ADJUST 405 0x00C8 //TX_NS_ENOISE_MIC0_TH -406 0x0014 //TX_MINENOISE_MIC0_TH +406 0x0032 //TX_MINENOISE_MIC0_TH 407 0x012C //TX_MINENOISE_MIC0_S_TH 408 0x7FFF //TX_MIN_G_CTRL_SSNS 409 0x0000 //TX_METAL_RTO_THR @@ -28586,16 +43242,16 @@ 511 0x6666 //TX_MIC_TO_BFGAIN 512 0x0000 //TX_MICTOBFGAIN0 513 0x0000 //TX_FASTMUE_TH -514 0x0000 //TX_DERVB_LEN_0 -515 0x0000 //TX_DERVB_LEN_1 -516 0x0000 //TX_RHO_DERVB -517 0x0000 //TX_MIC_INDX_DERVB -518 0x0000 //TX_MU_DERVB -519 0x0000 //TX_DR_RESRV_0 -520 0x0000 //TX_DR_RESRV_1 -521 0x0000 //TX_DR_RESRV_2 -522 0x0000 //TX_DR_RESRV_3 -523 0x0000 //TX_DR_RESRV_4 +514 0xC000 //TX_DEREVERB_LF_MU +515 0xC000 //TX_DEREVERB_HF_MU +516 0xCCCC //TX_DEREVERB_DELAY +517 0xD999 //TX_DEREVERB_COEF_LEN +518 0x1F40 //TX_DEREVERB_DNR +519 0x0000 //TX_DEREVERB_ALPHA +520 0x0000 //TX_DEREVERB_BETA +521 0x0000 //TX_GSC_RTOL_TH +522 0x7000 //TX_GSC_RTOH_TH +523 0x0064 //TX_WIDE2_MEANHTH 524 0x0000 //TX_DR_RESRV_5 525 0x0000 //TX_DR_RESRV_6 526 0x0000 //TX_DR_RESRV_7 @@ -28963,14 +43619,79 @@ 888 0x00C8 //TX_FASTNS_ARSPC_TH 889 0xC000 //TX_FASTNS_MASK5_TH 890 0x4848 //TX_POSTSSA_MIN_G_VR_MASK -891 0x7FFF //TX_A_LESSCUT_RTO_MASK +891 0x4000 //TX_A_LESSCUT_RTO_MASK 892 0x1770 //TX_FASTNS_NOISETH 893 0xC000 //TX_FASTNS_SSA_THLFL 894 0xC000 //TX_FASTNS_SSA_THHFL 895 0xCCCC //TX_FASTNS_SSA_THLFH 896 0xD999 //TX_FASTNS_SSA_THHFH +897 0x2339 //TX_SENDFUNC_REG_MICMUTE +898 0x0021 //TX_SENDFUNC_REG_MICMUTE1 +899 0x02BC //TX_MICMUTE_RATIO_THR +900 0x0140 //TX_MICMUTE_AMP_THR +901 0x0004 //TX_MICMUTE_HPF_IND +902 0x00C0 //TX_MICMUTE_LOG_EYR_TH +903 0x0008 //TX_MICMUTE_CVG_TIME +904 0x0008 //TX_MICMUTE_RELEASE_TIME +905 0x01FE //TX_MIC_VOLUME_MIC0MUTE +906 0x0020 //TX_MICMUTE_EPD_OFFSET_0 +907 0x001E //TX_MICMUTE_FRQ_AEC_L +908 0x7999 //TX_MICMUTE_EAD_THR +909 0x7FFF //TX_MICMUTE_LAMBDA_CB_NLE +910 0x7FFF //TX_MICMUTE_LAMBDA_RE_EST +911 0x4000 //TX_DTD_THR1_MICMUTE_0 +912 0x7000 //TX_DTD_THR1_MICMUTE_1 +913 0x7FFF //TX_DTD_THR1_MICMUTE_2 +914 0x7FFF //TX_DTD_THR1_MICMUTE_3 +915 0x6CCC //TX_DTD_THR2_MICMUTE_0 +916 0x0400 //TX_MICMUTE_MIN_EQ_RE_EST_0 +917 0x0400 //TX_MICMUTE_MIN_EQ_RE_EST_1 +918 0x1000 //TX_MICMUTE_MIN_EQ_RE_EST_2 +919 0x7FFF //TX_MICMUTE_MIN_EQ_RE_EST_3 +920 0x7FFF //TX_MICMUTE_MIN_EQ_RE_EST_4 +921 0x4000 //TX_MICMUTE_C_POST_FLT +922 0x03E8 //TX_MICMUTE_DT_CUT_K +923 0x0001 //TX_MICMUTE_DT_CUT_THR +924 0x03E8 //TX_MICMUTE_DT_CUT_K2 +925 0x0001 //TX_MICMUTE_DT_CUT_THR2 +926 0x0064 //TX_MICMUTE_DT2_HOLD_N +927 0x1000 //TX_MICMUTE_RATIODTH_THCUT +928 0x1000 //TX_MICMUTE_B_POST_FLT_ECHOL +929 0x7FFF //TX_MICMUTE_B_POST_FLT_ECHOH +930 0x0400 //TX_MICMUTE_C_POST_FLT_MASK +931 0x7999 //TX_MICMUTE_RATIODTL_CUT_TH +932 0x0258 //TX_MICMUTE_DT_CUT_K1 +933 0x0800 //TX_MICMUTE_N2_SN_EST +934 0xFC00 //TX_MICMUTE_THR_SN_EST_0 +935 0x001C //TX_MICMUTE_MIN_G_CTRL_0 +936 0x6000 //TX_MICMUTE_A_POST_FILT_S_0 +937 0x7000 //TX_MICMUTE_B_POST_FILT_0 +938 0x2710 //TX_MIC1RUB_AMP_THR +939 0x0010 //TX_MIC1MUTE_RATIO_THR +940 0x0450 //TX_MIC1MUTE_AMP_THR +941 0x0008 //TX_MIC1MUTE_CVG_TIME +942 0x0008 //TX_MIC1MUTE_RELEASE_TIME +943 0x0000 //TX_AMS_RESRV_01 +944 0x0000 //TX_AMS_RESRV_02 +945 0x0000 //TX_AMS_RESRV_03 +946 0x0000 //TX_AMS_RESRV_04 +947 0x0000 //TX_AMS_RESRV_05 +948 0x0000 //TX_AMS_RESRV_06 +949 0x0000 //TX_AMS_RESRV_07 +950 0x0000 //TX_AMS_RESRV_08 +951 0x0000 //TX_AMS_RESRV_09 +952 0x0000 //TX_AMS_RESRV_10 +953 0x0000 //TX_AMS_RESRV_11 +954 0x0000 //TX_AMS_RESRV_12 +955 0x0000 //TX_AMS_RESRV_13 +956 0x0000 //TX_AMS_RESRV_14 +957 0x0000 //TX_AMS_RESRV_15 +958 0x0000 //TX_AMS_RESRV_16 +959 0x0000 //TX_AMS_RESRV_17 +960 0x0000 //TX_AMS_RESRV_18 +961 0x0000 //TX_AMS_RESRV_19 #RX -0 0x0024 //RX_RECVFUNC_MODE_0 +0 0x2024 //RX_RECVFUNC_MODE_0 1 0x0000 //RX_RECVFUNC_MODE_1 2 0x0000 //RX_SAMPLINGFREQ_SIG 3 0x0000 //RX_SAMPLINGFREQ_PROC @@ -29820,11 +44541,862 @@ 110 0x0000 //RX_FDDRC_RESRV_0 129 0x0100 //RX_SPK_VOL 130 0x0000 //RX_VOL_RESRV_0 +#RX 2 +157 0x2024 //RX_RECVFUNC_MODE_0 +158 0x0000 //RX_RECVFUNC_MODE_1 +159 0x0000 //RX_SAMPLINGFREQ_SIG +160 0x0000 //RX_SAMPLINGFREQ_PROC +161 0x000A //RX_FRAME_SZ +162 0x0000 //RX_DELAY_OPT +163 0x3000 //RX_TDDRC_ALPHA_UP_1 +164 0x3000 //RX_TDDRC_ALPHA_UP_2 +165 0x3000 //RX_TDDRC_ALPHA_UP_3 +166 0x3000 //RX_TDDRC_ALPHA_UP_4 +167 0x0800 //RX_PGA +168 0x7FFF //RX_A_HP +169 0x0000 //RX_B_PE +170 0x3800 //RX_THR_PITCH_DET_0 +171 0x3000 //RX_THR_PITCH_DET_1 +172 0x2800 //RX_THR_PITCH_DET_2 +173 0x0008 //RX_PITCH_BFR_LEN +174 0x0003 //RX_SBD_PITCH_DET +175 0x0100 //RX_PP_RESRV_0 +176 0x0020 //RX_PP_RESRV_1 +177 0x0600 //RX_N_SN_EST +178 0x000C //RX_N2_SN_EST +179 0x0010 //RX_NS_LVL_CTRL +180 0xF800 //RX_THR_SN_EST +181 0x7CCD //RX_LAMBDA_PFILT +182 0x000A //RX_FENS_RESRV_0 +183 0x0190 //RX_FENS_RESRV_1 +184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +187 0x0002 //RX_EXTRA_NS_L +188 0x0800 //RX_EXTRA_NS_A +189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +190 0x7FFF //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +192 0x199A //RX_A_POST_FLT +193 0x0000 //RX_LMT_THRD +194 0x4000 //RX_LMT_ALPHA +195 0x0014 //RX_FDEQ_SUBNUM +196 0x4848 //RX_FDEQ_GAIN_0 +197 0x4848 //RX_FDEQ_GAIN_1 +198 0x4848 //RX_FDEQ_GAIN_2 +199 0x4848 //RX_FDEQ_GAIN_3 +200 0x4848 //RX_FDEQ_GAIN_4 +201 0x4848 //RX_FDEQ_GAIN_5 +202 0x4848 //RX_FDEQ_GAIN_6 +203 0x4848 //RX_FDEQ_GAIN_7 +204 0x4848 //RX_FDEQ_GAIN_8 +205 0x4848 //RX_FDEQ_GAIN_9 +206 0x4848 //RX_FDEQ_GAIN_10 +207 0x4848 //RX_FDEQ_GAIN_11 +208 0x4848 //RX_FDEQ_GAIN_12 +209 0x4848 //RX_FDEQ_GAIN_13 +210 0x4848 //RX_FDEQ_GAIN_14 +211 0x4848 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0202 //RX_FDEQ_BIN_0 +221 0x0203 //RX_FDEQ_BIN_1 +222 0x0303 //RX_FDEQ_BIN_2 +223 0x0304 //RX_FDEQ_BIN_3 +224 0x0405 //RX_FDEQ_BIN_4 +225 0x0506 //RX_FDEQ_BIN_5 +226 0x0708 //RX_FDEQ_BIN_6 +227 0x090A //RX_FDEQ_BIN_7 +228 0x0B0C //RX_FDEQ_BIN_8 +229 0x0D08 //RX_FDEQ_BIN_9 +230 0x0000 //RX_FDEQ_BIN_10 +231 0x0000 //RX_FDEQ_BIN_11 +232 0x0000 //RX_FDEQ_BIN_12 +233 0x0000 //RX_FDEQ_BIN_13 +234 0x0000 //RX_FDEQ_BIN_14 +235 0x0000 //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x4000 //RX_FDEQ_RESRV_0 +245 0x0320 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0030 //RX_FDDRC_BAND_MARGIN_1 +248 0x0050 //RX_FDDRC_BAND_MARGIN_2 +249 0x0080 //RX_FDDRC_BAND_MARGIN_3 +250 0x0007 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x5000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x6400 //RX_FDDRC_THRD_3_2 +258 0x6400 //RX_FDDRC_THRD_3_3 +259 0x2000 //RX_FDDRC_SLANT_0_0 +260 0x2000 //RX_FDDRC_SLANT_0_1 +261 0x2000 //RX_FDDRC_SLANT_0_2 +262 0x2000 //RX_FDDRC_SLANT_0_3 +263 0x5333 //RX_FDDRC_SLANT_1_0 +264 0x5333 //RX_FDDRC_SLANT_1_1 +265 0x5333 //RX_FDDRC_SLANT_1_2 +266 0x5333 //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +268 0x0002 //RX_FILTINDX +269 0x0000 //RX_TDDRC_THRD_0 +270 0x0000 //RX_TDDRC_THRD_1 +271 0x2030 //RX_TDDRC_THRD_2 +272 0x2030 //RX_TDDRC_THRD_3 +273 0x0800 //RX_TDDRC_SLANT_0 +274 0x7EB8 //RX_TDDRC_SLANT_1 +275 0x3000 //RX_TDDRC_ALPHA_UP_0 +276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x199A //RX_TDDRC_HMNC_GAIN +279 0x0001 //RX_TDDRC_SMT_FLAG +280 0x0CCD //RX_TDDRC_SMT_W +281 0x0478 //RX_TDDRC_DRC_GAIN +282 0x7C00 //RX_LAMBDA_PKA_FP +283 0x2000 //RX_TPKA_FP +284 0x2000 //RX_MIN_G_FP +285 0x0080 //RX_MAX_G_FP +286 0x000C //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 +288 0x0000 //RX_MAXLEVEL_CNG +289 0x3000 //RX_BWE_UV_TH +290 0x3000 //RX_BWE_UV_TH2 +291 0x1800 //RX_BWE_UV_TH3 +292 0x1000 //RX_BWE_V_TH +293 0x04CD //RX_BWE_GAIN1_V_TH1 +294 0x0F33 //RX_BWE_GAIN1_V_TH2 +295 0x7333 //RX_BWE_UV_EQ +296 0x199A //RX_BWE_V_EQ +297 0x7333 //RX_BWE_TONE_TH +298 0x0004 //RX_BWE_UV_HOLD_T +299 0x6CCD //RX_BWE_GAIN2_ALPHA +300 0x799A //RX_BWE_GAIN3_ALPHA +301 0x001E //RX_BWE_CUTOFF +302 0x3000 //RX_BWE_GAINFILL +303 0x3200 //RX_BWE_MAXTH_TONE +304 0x2000 //RX_BWE_EQ_0 +305 0x2000 //RX_BWE_EQ_1 +306 0x2000 //RX_BWE_EQ_2 +307 0x2000 //RX_BWE_EQ_3 +308 0x2000 //RX_BWE_EQ_4 +309 0x2000 //RX_BWE_EQ_5 +310 0x2000 //RX_BWE_EQ_6 +311 0x0000 //RX_BWE_RESRV_0 +312 0x0000 //RX_BWE_RESRV_1 +313 0x0000 //RX_BWE_RESRV_2 +#VOL 0 +163 0x3000 //RX_TDDRC_ALPHA_UP_1 +164 0x3000 //RX_TDDRC_ALPHA_UP_2 +165 0x3000 //RX_TDDRC_ALPHA_UP_3 +166 0x3000 //RX_TDDRC_ALPHA_UP_4 +184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +190 0x7FFF //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +269 0x0000 //RX_TDDRC_THRD_0 +270 0x0000 //RX_TDDRC_THRD_1 +271 0x2030 //RX_TDDRC_THRD_2 +272 0x2030 //RX_TDDRC_THRD_3 +273 0x0800 //RX_TDDRC_SLANT_0 +274 0x7EB8 //RX_TDDRC_SLANT_1 +275 0x3000 //RX_TDDRC_ALPHA_UP_0 +276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x199A //RX_TDDRC_HMNC_GAIN +279 0x0001 //RX_TDDRC_SMT_FLAG +280 0x0CCD //RX_TDDRC_SMT_W +281 0x0478 //RX_TDDRC_DRC_GAIN +195 0x0014 //RX_FDEQ_SUBNUM +196 0x4848 //RX_FDEQ_GAIN_0 +197 0x4848 //RX_FDEQ_GAIN_1 +198 0x4848 //RX_FDEQ_GAIN_2 +199 0x4848 //RX_FDEQ_GAIN_3 +200 0x4848 //RX_FDEQ_GAIN_4 +201 0x4848 //RX_FDEQ_GAIN_5 +202 0x4848 //RX_FDEQ_GAIN_6 +203 0x4848 //RX_FDEQ_GAIN_7 +204 0x4848 //RX_FDEQ_GAIN_8 +205 0x4848 //RX_FDEQ_GAIN_9 +206 0x4848 //RX_FDEQ_GAIN_10 +207 0x4848 //RX_FDEQ_GAIN_11 +208 0x4848 //RX_FDEQ_GAIN_12 +209 0x4848 //RX_FDEQ_GAIN_13 +210 0x4848 //RX_FDEQ_GAIN_14 +211 0x4848 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0202 //RX_FDEQ_BIN_0 +221 0x0203 //RX_FDEQ_BIN_1 +222 0x0303 //RX_FDEQ_BIN_2 +223 0x0304 //RX_FDEQ_BIN_3 +224 0x0405 //RX_FDEQ_BIN_4 +225 0x0506 //RX_FDEQ_BIN_5 +226 0x0708 //RX_FDEQ_BIN_6 +227 0x090A //RX_FDEQ_BIN_7 +228 0x0B0C //RX_FDEQ_BIN_8 +229 0x0D08 //RX_FDEQ_BIN_9 +230 0x0000 //RX_FDEQ_BIN_10 +231 0x0000 //RX_FDEQ_BIN_11 +232 0x0000 //RX_FDEQ_BIN_12 +233 0x0000 //RX_FDEQ_BIN_13 +234 0x0000 //RX_FDEQ_BIN_14 +235 0x0000 //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x4000 //RX_FDEQ_RESRV_0 +245 0x0320 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0030 //RX_FDDRC_BAND_MARGIN_1 +248 0x0050 //RX_FDDRC_BAND_MARGIN_2 +249 0x0080 //RX_FDDRC_BAND_MARGIN_3 +250 0x0007 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x5000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x6400 //RX_FDDRC_THRD_3_2 +258 0x6400 //RX_FDDRC_THRD_3_3 +259 0x2000 //RX_FDDRC_SLANT_0_0 +260 0x2000 //RX_FDDRC_SLANT_0_1 +261 0x2000 //RX_FDDRC_SLANT_0_2 +262 0x2000 //RX_FDDRC_SLANT_0_3 +263 0x5333 //RX_FDDRC_SLANT_1_0 +264 0x5333 //RX_FDDRC_SLANT_1_1 +265 0x5333 //RX_FDDRC_SLANT_1_2 +266 0x5333 //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +286 0x000C //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 +#VOL 1 +163 0x3000 //RX_TDDRC_ALPHA_UP_1 +164 0x3000 //RX_TDDRC_ALPHA_UP_2 +165 0x3000 //RX_TDDRC_ALPHA_UP_3 +166 0x3000 //RX_TDDRC_ALPHA_UP_4 +184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +190 0x7FFF //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +269 0x0000 //RX_TDDRC_THRD_0 +270 0x0000 //RX_TDDRC_THRD_1 +271 0x2030 //RX_TDDRC_THRD_2 +272 0x2030 //RX_TDDRC_THRD_3 +273 0x0800 //RX_TDDRC_SLANT_0 +274 0x7EB8 //RX_TDDRC_SLANT_1 +275 0x3000 //RX_TDDRC_ALPHA_UP_0 +276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x199A //RX_TDDRC_HMNC_GAIN +279 0x0001 //RX_TDDRC_SMT_FLAG +280 0x0CCD //RX_TDDRC_SMT_W +281 0x0478 //RX_TDDRC_DRC_GAIN +195 0x0014 //RX_FDEQ_SUBNUM +196 0x4848 //RX_FDEQ_GAIN_0 +197 0x4848 //RX_FDEQ_GAIN_1 +198 0x4848 //RX_FDEQ_GAIN_2 +199 0x4848 //RX_FDEQ_GAIN_3 +200 0x4848 //RX_FDEQ_GAIN_4 +201 0x4848 //RX_FDEQ_GAIN_5 +202 0x4848 //RX_FDEQ_GAIN_6 +203 0x4848 //RX_FDEQ_GAIN_7 +204 0x4848 //RX_FDEQ_GAIN_8 +205 0x4848 //RX_FDEQ_GAIN_9 +206 0x4848 //RX_FDEQ_GAIN_10 +207 0x4848 //RX_FDEQ_GAIN_11 +208 0x4848 //RX_FDEQ_GAIN_12 +209 0x4848 //RX_FDEQ_GAIN_13 +210 0x4848 //RX_FDEQ_GAIN_14 +211 0x4848 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0202 //RX_FDEQ_BIN_0 +221 0x0203 //RX_FDEQ_BIN_1 +222 0x0303 //RX_FDEQ_BIN_2 +223 0x0304 //RX_FDEQ_BIN_3 +224 0x0405 //RX_FDEQ_BIN_4 +225 0x0506 //RX_FDEQ_BIN_5 +226 0x0708 //RX_FDEQ_BIN_6 +227 0x090A //RX_FDEQ_BIN_7 +228 0x0B0C //RX_FDEQ_BIN_8 +229 0x0D08 //RX_FDEQ_BIN_9 +230 0x0000 //RX_FDEQ_BIN_10 +231 0x0000 //RX_FDEQ_BIN_11 +232 0x0000 //RX_FDEQ_BIN_12 +233 0x0000 //RX_FDEQ_BIN_13 +234 0x0000 //RX_FDEQ_BIN_14 +235 0x0000 //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x4000 //RX_FDEQ_RESRV_0 +245 0x0320 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0030 //RX_FDDRC_BAND_MARGIN_1 +248 0x0050 //RX_FDDRC_BAND_MARGIN_2 +249 0x0080 //RX_FDDRC_BAND_MARGIN_3 +250 0x0007 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x5000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x6400 //RX_FDDRC_THRD_3_2 +258 0x6400 //RX_FDDRC_THRD_3_3 +259 0x2000 //RX_FDDRC_SLANT_0_0 +260 0x2000 //RX_FDDRC_SLANT_0_1 +261 0x2000 //RX_FDDRC_SLANT_0_2 +262 0x2000 //RX_FDDRC_SLANT_0_3 +263 0x5333 //RX_FDDRC_SLANT_1_0 +264 0x5333 //RX_FDDRC_SLANT_1_1 +265 0x5333 //RX_FDDRC_SLANT_1_2 +266 0x5333 //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +286 0x0014 //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 +#VOL 2 +163 0x3000 //RX_TDDRC_ALPHA_UP_1 +164 0x3000 //RX_TDDRC_ALPHA_UP_2 +165 0x3000 //RX_TDDRC_ALPHA_UP_3 +166 0x3000 //RX_TDDRC_ALPHA_UP_4 +184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +190 0x7FFF //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +269 0x0000 //RX_TDDRC_THRD_0 +270 0x0000 //RX_TDDRC_THRD_1 +271 0x2030 //RX_TDDRC_THRD_2 +272 0x2030 //RX_TDDRC_THRD_3 +273 0x0800 //RX_TDDRC_SLANT_0 +274 0x7EB8 //RX_TDDRC_SLANT_1 +275 0x3000 //RX_TDDRC_ALPHA_UP_0 +276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x199A //RX_TDDRC_HMNC_GAIN +279 0x0001 //RX_TDDRC_SMT_FLAG +280 0x0CCD //RX_TDDRC_SMT_W +281 0x0478 //RX_TDDRC_DRC_GAIN +195 0x0014 //RX_FDEQ_SUBNUM +196 0x4848 //RX_FDEQ_GAIN_0 +197 0x4848 //RX_FDEQ_GAIN_1 +198 0x4848 //RX_FDEQ_GAIN_2 +199 0x4848 //RX_FDEQ_GAIN_3 +200 0x4848 //RX_FDEQ_GAIN_4 +201 0x4848 //RX_FDEQ_GAIN_5 +202 0x4848 //RX_FDEQ_GAIN_6 +203 0x4848 //RX_FDEQ_GAIN_7 +204 0x4848 //RX_FDEQ_GAIN_8 +205 0x4848 //RX_FDEQ_GAIN_9 +206 0x4848 //RX_FDEQ_GAIN_10 +207 0x4848 //RX_FDEQ_GAIN_11 +208 0x4848 //RX_FDEQ_GAIN_12 +209 0x4848 //RX_FDEQ_GAIN_13 +210 0x4848 //RX_FDEQ_GAIN_14 +211 0x4848 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0202 //RX_FDEQ_BIN_0 +221 0x0203 //RX_FDEQ_BIN_1 +222 0x0303 //RX_FDEQ_BIN_2 +223 0x0304 //RX_FDEQ_BIN_3 +224 0x0405 //RX_FDEQ_BIN_4 +225 0x0506 //RX_FDEQ_BIN_5 +226 0x0708 //RX_FDEQ_BIN_6 +227 0x090A //RX_FDEQ_BIN_7 +228 0x0B0C //RX_FDEQ_BIN_8 +229 0x0D08 //RX_FDEQ_BIN_9 +230 0x0000 //RX_FDEQ_BIN_10 +231 0x0000 //RX_FDEQ_BIN_11 +232 0x0000 //RX_FDEQ_BIN_12 +233 0x0000 //RX_FDEQ_BIN_13 +234 0x0000 //RX_FDEQ_BIN_14 +235 0x0000 //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x4000 //RX_FDEQ_RESRV_0 +245 0x0320 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0030 //RX_FDDRC_BAND_MARGIN_1 +248 0x0050 //RX_FDDRC_BAND_MARGIN_2 +249 0x0080 //RX_FDDRC_BAND_MARGIN_3 +250 0x0007 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x5000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x6400 //RX_FDDRC_THRD_3_2 +258 0x6400 //RX_FDDRC_THRD_3_3 +259 0x2000 //RX_FDDRC_SLANT_0_0 +260 0x2000 //RX_FDDRC_SLANT_0_1 +261 0x2000 //RX_FDDRC_SLANT_0_2 +262 0x2000 //RX_FDDRC_SLANT_0_3 +263 0x5333 //RX_FDDRC_SLANT_1_0 +264 0x5333 //RX_FDDRC_SLANT_1_1 +265 0x5333 //RX_FDDRC_SLANT_1_2 +266 0x5333 //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +286 0x0021 //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 +#VOL 3 +163 0x3000 //RX_TDDRC_ALPHA_UP_1 +164 0x3000 //RX_TDDRC_ALPHA_UP_2 +165 0x3000 //RX_TDDRC_ALPHA_UP_3 +166 0x3000 //RX_TDDRC_ALPHA_UP_4 +184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +190 0x7FFF //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +269 0x0000 //RX_TDDRC_THRD_0 +270 0x0000 //RX_TDDRC_THRD_1 +271 0x2030 //RX_TDDRC_THRD_2 +272 0x2030 //RX_TDDRC_THRD_3 +273 0x0800 //RX_TDDRC_SLANT_0 +274 0x7EB8 //RX_TDDRC_SLANT_1 +275 0x3000 //RX_TDDRC_ALPHA_UP_0 +276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x199A //RX_TDDRC_HMNC_GAIN +279 0x0001 //RX_TDDRC_SMT_FLAG +280 0x0CCD //RX_TDDRC_SMT_W +281 0x0478 //RX_TDDRC_DRC_GAIN +195 0x0014 //RX_FDEQ_SUBNUM +196 0x4848 //RX_FDEQ_GAIN_0 +197 0x4848 //RX_FDEQ_GAIN_1 +198 0x4848 //RX_FDEQ_GAIN_2 +199 0x4848 //RX_FDEQ_GAIN_3 +200 0x4848 //RX_FDEQ_GAIN_4 +201 0x4848 //RX_FDEQ_GAIN_5 +202 0x4848 //RX_FDEQ_GAIN_6 +203 0x4848 //RX_FDEQ_GAIN_7 +204 0x4848 //RX_FDEQ_GAIN_8 +205 0x4848 //RX_FDEQ_GAIN_9 +206 0x4848 //RX_FDEQ_GAIN_10 +207 0x4848 //RX_FDEQ_GAIN_11 +208 0x4848 //RX_FDEQ_GAIN_12 +209 0x4848 //RX_FDEQ_GAIN_13 +210 0x4848 //RX_FDEQ_GAIN_14 +211 0x4848 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0202 //RX_FDEQ_BIN_0 +221 0x0203 //RX_FDEQ_BIN_1 +222 0x0303 //RX_FDEQ_BIN_2 +223 0x0304 //RX_FDEQ_BIN_3 +224 0x0405 //RX_FDEQ_BIN_4 +225 0x0506 //RX_FDEQ_BIN_5 +226 0x0708 //RX_FDEQ_BIN_6 +227 0x090A //RX_FDEQ_BIN_7 +228 0x0B0C //RX_FDEQ_BIN_8 +229 0x0D08 //RX_FDEQ_BIN_9 +230 0x0000 //RX_FDEQ_BIN_10 +231 0x0000 //RX_FDEQ_BIN_11 +232 0x0000 //RX_FDEQ_BIN_12 +233 0x0000 //RX_FDEQ_BIN_13 +234 0x0000 //RX_FDEQ_BIN_14 +235 0x0000 //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x4000 //RX_FDEQ_RESRV_0 +245 0x0320 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0030 //RX_FDDRC_BAND_MARGIN_1 +248 0x0050 //RX_FDDRC_BAND_MARGIN_2 +249 0x0080 //RX_FDDRC_BAND_MARGIN_3 +250 0x0007 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x5000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x6400 //RX_FDDRC_THRD_3_2 +258 0x6400 //RX_FDDRC_THRD_3_3 +259 0x2000 //RX_FDDRC_SLANT_0_0 +260 0x2000 //RX_FDDRC_SLANT_0_1 +261 0x2000 //RX_FDDRC_SLANT_0_2 +262 0x2000 //RX_FDDRC_SLANT_0_3 +263 0x5333 //RX_FDDRC_SLANT_1_0 +264 0x5333 //RX_FDDRC_SLANT_1_1 +265 0x5333 //RX_FDDRC_SLANT_1_2 +266 0x5333 //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +286 0x0037 //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 +#VOL 4 +163 0x3000 //RX_TDDRC_ALPHA_UP_1 +164 0x3000 //RX_TDDRC_ALPHA_UP_2 +165 0x3000 //RX_TDDRC_ALPHA_UP_3 +166 0x3000 //RX_TDDRC_ALPHA_UP_4 +184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +190 0x7FFF //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +269 0x0000 //RX_TDDRC_THRD_0 +270 0x0000 //RX_TDDRC_THRD_1 +271 0x2030 //RX_TDDRC_THRD_2 +272 0x2030 //RX_TDDRC_THRD_3 +273 0x0800 //RX_TDDRC_SLANT_0 +274 0x7EB8 //RX_TDDRC_SLANT_1 +275 0x3000 //RX_TDDRC_ALPHA_UP_0 +276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x199A //RX_TDDRC_HMNC_GAIN +279 0x0001 //RX_TDDRC_SMT_FLAG +280 0x0CCD //RX_TDDRC_SMT_W +281 0x0478 //RX_TDDRC_DRC_GAIN +195 0x0014 //RX_FDEQ_SUBNUM +196 0x4848 //RX_FDEQ_GAIN_0 +197 0x4848 //RX_FDEQ_GAIN_1 +198 0x4848 //RX_FDEQ_GAIN_2 +199 0x4848 //RX_FDEQ_GAIN_3 +200 0x4848 //RX_FDEQ_GAIN_4 +201 0x4848 //RX_FDEQ_GAIN_5 +202 0x4848 //RX_FDEQ_GAIN_6 +203 0x4848 //RX_FDEQ_GAIN_7 +204 0x4848 //RX_FDEQ_GAIN_8 +205 0x4848 //RX_FDEQ_GAIN_9 +206 0x4848 //RX_FDEQ_GAIN_10 +207 0x4848 //RX_FDEQ_GAIN_11 +208 0x4848 //RX_FDEQ_GAIN_12 +209 0x4848 //RX_FDEQ_GAIN_13 +210 0x4848 //RX_FDEQ_GAIN_14 +211 0x4848 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0202 //RX_FDEQ_BIN_0 +221 0x0203 //RX_FDEQ_BIN_1 +222 0x0303 //RX_FDEQ_BIN_2 +223 0x0304 //RX_FDEQ_BIN_3 +224 0x0405 //RX_FDEQ_BIN_4 +225 0x0506 //RX_FDEQ_BIN_5 +226 0x0708 //RX_FDEQ_BIN_6 +227 0x090A //RX_FDEQ_BIN_7 +228 0x0B0C //RX_FDEQ_BIN_8 +229 0x0D08 //RX_FDEQ_BIN_9 +230 0x0000 //RX_FDEQ_BIN_10 +231 0x0000 //RX_FDEQ_BIN_11 +232 0x0000 //RX_FDEQ_BIN_12 +233 0x0000 //RX_FDEQ_BIN_13 +234 0x0000 //RX_FDEQ_BIN_14 +235 0x0000 //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x4000 //RX_FDEQ_RESRV_0 +245 0x0320 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0030 //RX_FDDRC_BAND_MARGIN_1 +248 0x0050 //RX_FDDRC_BAND_MARGIN_2 +249 0x0080 //RX_FDDRC_BAND_MARGIN_3 +250 0x0007 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x5000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x6400 //RX_FDDRC_THRD_3_2 +258 0x6400 //RX_FDDRC_THRD_3_3 +259 0x2000 //RX_FDDRC_SLANT_0_0 +260 0x2000 //RX_FDDRC_SLANT_0_1 +261 0x2000 //RX_FDDRC_SLANT_0_2 +262 0x2000 //RX_FDDRC_SLANT_0_3 +263 0x5333 //RX_FDDRC_SLANT_1_0 +264 0x5333 //RX_FDDRC_SLANT_1_1 +265 0x5333 //RX_FDDRC_SLANT_1_2 +266 0x5333 //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +286 0x005B //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 +#VOL 5 +163 0x3000 //RX_TDDRC_ALPHA_UP_1 +164 0x3000 //RX_TDDRC_ALPHA_UP_2 +165 0x3000 //RX_TDDRC_ALPHA_UP_3 +166 0x3000 //RX_TDDRC_ALPHA_UP_4 +184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +190 0x7FFF //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +269 0x0000 //RX_TDDRC_THRD_0 +270 0x0000 //RX_TDDRC_THRD_1 +271 0x2030 //RX_TDDRC_THRD_2 +272 0x2030 //RX_TDDRC_THRD_3 +273 0x0800 //RX_TDDRC_SLANT_0 +274 0x7EB8 //RX_TDDRC_SLANT_1 +275 0x3000 //RX_TDDRC_ALPHA_UP_0 +276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x199A //RX_TDDRC_HMNC_GAIN +279 0x0001 //RX_TDDRC_SMT_FLAG +280 0x0CCD //RX_TDDRC_SMT_W +281 0x0478 //RX_TDDRC_DRC_GAIN +195 0x0014 //RX_FDEQ_SUBNUM +196 0x4848 //RX_FDEQ_GAIN_0 +197 0x4848 //RX_FDEQ_GAIN_1 +198 0x4848 //RX_FDEQ_GAIN_2 +199 0x4848 //RX_FDEQ_GAIN_3 +200 0x4848 //RX_FDEQ_GAIN_4 +201 0x4848 //RX_FDEQ_GAIN_5 +202 0x4848 //RX_FDEQ_GAIN_6 +203 0x4848 //RX_FDEQ_GAIN_7 +204 0x4848 //RX_FDEQ_GAIN_8 +205 0x4848 //RX_FDEQ_GAIN_9 +206 0x4848 //RX_FDEQ_GAIN_10 +207 0x4848 //RX_FDEQ_GAIN_11 +208 0x4848 //RX_FDEQ_GAIN_12 +209 0x4848 //RX_FDEQ_GAIN_13 +210 0x4848 //RX_FDEQ_GAIN_14 +211 0x4848 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0202 //RX_FDEQ_BIN_0 +221 0x0203 //RX_FDEQ_BIN_1 +222 0x0303 //RX_FDEQ_BIN_2 +223 0x0304 //RX_FDEQ_BIN_3 +224 0x0405 //RX_FDEQ_BIN_4 +225 0x0506 //RX_FDEQ_BIN_5 +226 0x0708 //RX_FDEQ_BIN_6 +227 0x090A //RX_FDEQ_BIN_7 +228 0x0B0C //RX_FDEQ_BIN_8 +229 0x0D08 //RX_FDEQ_BIN_9 +230 0x0000 //RX_FDEQ_BIN_10 +231 0x0000 //RX_FDEQ_BIN_11 +232 0x0000 //RX_FDEQ_BIN_12 +233 0x0000 //RX_FDEQ_BIN_13 +234 0x0000 //RX_FDEQ_BIN_14 +235 0x0000 //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x4000 //RX_FDEQ_RESRV_0 +245 0x0320 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0030 //RX_FDDRC_BAND_MARGIN_1 +248 0x0050 //RX_FDDRC_BAND_MARGIN_2 +249 0x0080 //RX_FDDRC_BAND_MARGIN_3 +250 0x0007 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x5000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x6400 //RX_FDDRC_THRD_3_2 +258 0x6400 //RX_FDDRC_THRD_3_3 +259 0x2000 //RX_FDDRC_SLANT_0_0 +260 0x2000 //RX_FDDRC_SLANT_0_1 +261 0x2000 //RX_FDDRC_SLANT_0_2 +262 0x2000 //RX_FDDRC_SLANT_0_3 +263 0x5333 //RX_FDDRC_SLANT_1_0 +264 0x5333 //RX_FDDRC_SLANT_1_1 +265 0x5333 //RX_FDDRC_SLANT_1_2 +266 0x5333 //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +286 0x0099 //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 +#VOL 6 +163 0x3000 //RX_TDDRC_ALPHA_UP_1 +164 0x3000 //RX_TDDRC_ALPHA_UP_2 +165 0x3000 //RX_TDDRC_ALPHA_UP_3 +166 0x3000 //RX_TDDRC_ALPHA_UP_4 +184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +190 0x7FFF //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +269 0x0000 //RX_TDDRC_THRD_0 +270 0x0000 //RX_TDDRC_THRD_1 +271 0x2030 //RX_TDDRC_THRD_2 +272 0x2030 //RX_TDDRC_THRD_3 +273 0x0800 //RX_TDDRC_SLANT_0 +274 0x7EB8 //RX_TDDRC_SLANT_1 +275 0x3000 //RX_TDDRC_ALPHA_UP_0 +276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x199A //RX_TDDRC_HMNC_GAIN +279 0x0001 //RX_TDDRC_SMT_FLAG +280 0x0CCD //RX_TDDRC_SMT_W +281 0x0478 //RX_TDDRC_DRC_GAIN +195 0x0014 //RX_FDEQ_SUBNUM +196 0x4848 //RX_FDEQ_GAIN_0 +197 0x4848 //RX_FDEQ_GAIN_1 +198 0x4848 //RX_FDEQ_GAIN_2 +199 0x4848 //RX_FDEQ_GAIN_3 +200 0x4848 //RX_FDEQ_GAIN_4 +201 0x4848 //RX_FDEQ_GAIN_5 +202 0x4848 //RX_FDEQ_GAIN_6 +203 0x4848 //RX_FDEQ_GAIN_7 +204 0x4848 //RX_FDEQ_GAIN_8 +205 0x4848 //RX_FDEQ_GAIN_9 +206 0x4848 //RX_FDEQ_GAIN_10 +207 0x4848 //RX_FDEQ_GAIN_11 +208 0x4848 //RX_FDEQ_GAIN_12 +209 0x4848 //RX_FDEQ_GAIN_13 +210 0x4848 //RX_FDEQ_GAIN_14 +211 0x4848 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0202 //RX_FDEQ_BIN_0 +221 0x0203 //RX_FDEQ_BIN_1 +222 0x0303 //RX_FDEQ_BIN_2 +223 0x0304 //RX_FDEQ_BIN_3 +224 0x0405 //RX_FDEQ_BIN_4 +225 0x0506 //RX_FDEQ_BIN_5 +226 0x0708 //RX_FDEQ_BIN_6 +227 0x090A //RX_FDEQ_BIN_7 +228 0x0B0C //RX_FDEQ_BIN_8 +229 0x0D08 //RX_FDEQ_BIN_9 +230 0x0000 //RX_FDEQ_BIN_10 +231 0x0000 //RX_FDEQ_BIN_11 +232 0x0000 //RX_FDEQ_BIN_12 +233 0x0000 //RX_FDEQ_BIN_13 +234 0x0000 //RX_FDEQ_BIN_14 +235 0x0000 //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x4000 //RX_FDEQ_RESRV_0 +245 0x0320 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0030 //RX_FDDRC_BAND_MARGIN_1 +248 0x0050 //RX_FDDRC_BAND_MARGIN_2 +249 0x0080 //RX_FDDRC_BAND_MARGIN_3 +250 0x0007 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x5000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x6400 //RX_FDDRC_THRD_3_2 +258 0x6400 //RX_FDDRC_THRD_3_3 +259 0x2000 //RX_FDDRC_SLANT_0_0 +260 0x2000 //RX_FDDRC_SLANT_0_1 +261 0x2000 //RX_FDDRC_SLANT_0_2 +262 0x2000 //RX_FDDRC_SLANT_0_3 +263 0x5333 //RX_FDDRC_SLANT_1_0 +264 0x5333 //RX_FDDRC_SLANT_1_1 +265 0x5333 //RX_FDDRC_SLANT_1_2 +266 0x5333 //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +286 0x0100 //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 #CASE_NAME HEADSET-GOOGLE_CONDOR_CERTIFICATION1-VOICE_GENERIC-WB -#PARAM_MODE FULL -#PARAM_TYPE TX+RX -#TOTAL_CUSTOM_STEP 7 +#PARAM_MODE Full +#PARAM_TYPE TX+2RX +#TOTAL_CUSTOM_STEP 7+7 #TX 0 0x0009 //TX_OPERATION_MODE_0 1 0x0008 //TX_OPERATION_MODE_1 @@ -30068,7 +45640,7 @@ 239 0x0800 //TX_DT_RESRV_7 240 0x0800 //TX_DT_RESRV_8 241 0x0000 //TX_DT_RESRV_9 -242 0xF400 //TX_THR_SN_EST_0 +242 0xFA00 //TX_THR_SN_EST_0 243 0xF400 //TX_THR_SN_EST_1 244 0xF600 //TX_THR_SN_EST_2 245 0xF400 //TX_THR_SN_EST_3 @@ -30077,20 +45649,20 @@ 248 0xF400 //TX_THR_SN_EST_6 249 0xF600 //TX_THR_SN_EST_7 250 0x0000 //TX_DELTA_THR_SN_EST_0 -251 0x0000 //TX_DELTA_THR_SN_EST_1 +251 0x0200 //TX_DELTA_THR_SN_EST_1 252 0x0200 //TX_DELTA_THR_SN_EST_2 253 0x0200 //TX_DELTA_THR_SN_EST_3 254 0x0200 //TX_DELTA_THR_SN_EST_4 255 0x0200 //TX_DELTA_THR_SN_EST_5 -256 0x0200 //TX_DELTA_THR_SN_EST_6 +256 0x0000 //TX_DELTA_THR_SN_EST_6 257 0x0200 //TX_DELTA_THR_SN_EST_7 258 0x6000 //TX_LAMBDA_NN_EST_0 -259 0x6000 //TX_LAMBDA_NN_EST_1 +259 0x4000 //TX_LAMBDA_NN_EST_1 260 0x4000 //TX_LAMBDA_NN_EST_2 261 0x4000 //TX_LAMBDA_NN_EST_3 262 0x4000 //TX_LAMBDA_NN_EST_4 263 0x4000 //TX_LAMBDA_NN_EST_5 -264 0x4000 //TX_LAMBDA_NN_EST_6 +264 0x6000 //TX_LAMBDA_NN_EST_6 265 0x4000 //TX_LAMBDA_NN_EST_7 266 0x0400 //TX_N_SN_EST 267 0x001E //TX_INBEAM_T @@ -30108,16 +45680,16 @@ 279 0x1000 //TX_B_POST_FLT_0 280 0x1000 //TX_B_POST_FLT_1 281 0x000F //TX_NS_LVL_CTRL_0 -282 0x000F //TX_NS_LVL_CTRL_1 -283 0x0011 //TX_NS_LVL_CTRL_2 +282 0x0011 //TX_NS_LVL_CTRL_1 +283 0x000F //TX_NS_LVL_CTRL_2 284 0x000F //TX_NS_LVL_CTRL_3 285 0x000F //TX_NS_LVL_CTRL_4 286 0x000F //TX_NS_LVL_CTRL_5 287 0x000F //TX_NS_LVL_CTRL_6 288 0x0011 //TX_NS_LVL_CTRL_7 289 0x000C //TX_MIN_GAIN_S_0 -290 0x000C //TX_MIN_GAIN_S_1 -291 0x000F //TX_MIN_GAIN_S_2 +290 0x000F //TX_MIN_GAIN_S_1 +291 0x000C //TX_MIN_GAIN_S_2 292 0x000C //TX_MIN_GAIN_S_3 293 0x000C //TX_MIN_GAIN_S_4 294 0x000C //TX_MIN_GAIN_S_5 @@ -30141,12 +45713,12 @@ 312 0x7FFF //TX_A_POST_FILT_0 313 0x2000 //TX_A_POST_FILT_1 314 0x4000 //TX_A_POST_FILT_S_0 -315 0x4000 //TX_A_POST_FILT_S_1 +315 0x5000 //TX_A_POST_FILT_S_1 316 0x5000 //TX_A_POST_FILT_S_2 317 0x5000 //TX_A_POST_FILT_S_3 318 0x5000 //TX_A_POST_FILT_S_4 319 0x5000 //TX_A_POST_FILT_S_5 -320 0x5000 //TX_A_POST_FILT_S_6 +320 0x4000 //TX_A_POST_FILT_S_6 321 0x5000 //TX_A_POST_FILT_S_7 322 0x1000 //TX_B_POST_FILT_0 323 0x1000 //TX_B_POST_FILT_1 @@ -30193,7 +45765,7 @@ 364 0x0000 //TX_K_APT 365 0x0001 //TX_NOISEDET 366 0x0190 //TX_NDETCT -367 0x0050 //TX_NOISE_TH_0 +367 0x0102 //TX_NOISE_TH_0 368 0x7FFF //TX_NOISE_TH_0_2 369 0x7FFF //TX_NOISE_TH_0_3 370 0x07D0 //TX_NOISE_TH_1 @@ -30205,11 +45777,11 @@ 376 0x7FFF //TX_NOISE_TH_5_3 377 0x7FFF //TX_NOISE_TH_5_4 378 0x044C //TX_NOISE_TH_6 -379 0x0014 //TX_MINENOISE_TH -380 0x4000 //TX_MINENOISE_MIC0_TH_MTS -381 0xFFEE //TX_MINENOISE_MIC0_TH_EXP -382 0x6000 //TX_MINENOISE_MIC0_S_TH_MTS -383 0xFFF3 //TX_MINENOISE_MIC0_S_TH_EXP +379 0x00F8 //TX_MINENOISE_TH +380 0xD508 //TX_MORENS_TFMASK_TH +381 0x0001 //TX_DRC_QUIET_FLOOR +382 0x3A98 //TX_RATIODTL_CUT_TH +383 0x0DAC //TX_DT_CUT_K1 384 0x0666 //TX_OUT_ENER_S_TH_CLEAN 385 0x0666 //TX_OUT_ENER_S_TH_LESSCLEAN 386 0x0333 //TX_OUT_ENER_S_TH_NOISY @@ -30217,22 +45789,22 @@ 388 0x0333 //TX_OUT_ENER_TH_SPEECH 389 0x2000 //TX_SN_NPB_GAIN 390 0x0000 //TX_NN_NPB_GAIN -391 0x0000 //TX_CSX_ALPHA_0 -392 0x0000 //TX_CSX_ALPHA_1 -393 0x0000 //TX_CSX_ALPHA_2 -394 0x0000 //TX_CSX_ALPHA_3 -395 0x0800 //TX_MU_ARSP_EST -396 0x00C8 //TX_P_OUTBEAM_MIN_TH +391 0x7FFF //TX_POST_MASK_SUP_HSNE +392 0x1388 //TX_TAIL_DET_TH +393 0x4000 //TX_B_LESSCUT_RTO_WTA +394 0x0000 //TX_MEL_G_R +395 0x0080 //TX_SUPHIGH_TH +396 0x0000 //TX_MASK_G_R 397 0x0002 //TX_EXTRA_NS_L -398 0x0800 //TX_EXTRA_NS_A -399 0x0005 //TX_VR_NOISE_FLOOR_TH +398 0x1800 //TX_C_POST_FLT_MASK +399 0x7FFF //TX_A_POST_FLT_WNS 400 0x0148 //TX_MIN_G_LOW300HZ 401 0x0002 //TX_MAXLEVEL_CNG 402 0x00B4 //TX_STN_NOISE_TH 403 0x4000 //TX_POST_MASK_SUP 404 0x7FFF //TX_POST_MASK_ADJUST 405 0x00C8 //TX_NS_ENOISE_MIC0_TH -406 0x0014 //TX_MINENOISE_MIC0_TH +406 0x00DC //TX_MINENOISE_MIC0_TH 407 0x012C //TX_MINENOISE_MIC0_S_TH 408 0x7FFF //TX_MIN_G_CTRL_SSNS 409 0x0000 //TX_METAL_RTO_THR @@ -30340,16 +45912,16 @@ 511 0x6666 //TX_MIC_TO_BFGAIN 512 0x0000 //TX_MICTOBFGAIN0 513 0x0000 //TX_FASTMUE_TH -514 0x0000 //TX_DERVB_LEN_0 -515 0x0000 //TX_DERVB_LEN_1 -516 0x0000 //TX_RHO_DERVB -517 0x0000 //TX_MIC_INDX_DERVB -518 0x0000 //TX_MU_DERVB -519 0x0000 //TX_DR_RESRV_0 -520 0x0000 //TX_DR_RESRV_1 -521 0x0000 //TX_DR_RESRV_2 -522 0x0000 //TX_DR_RESRV_3 -523 0x0000 //TX_DR_RESRV_4 +514 0xC000 //TX_DEREVERB_LF_MU +515 0xC000 //TX_DEREVERB_HF_MU +516 0xCCCC //TX_DEREVERB_DELAY +517 0xD999 //TX_DEREVERB_COEF_LEN +518 0x1F40 //TX_DEREVERB_DNR +519 0x0000 //TX_DEREVERB_ALPHA +520 0x0000 //TX_DEREVERB_BETA +521 0x0000 //TX_GSC_RTOL_TH +522 0x7000 //TX_GSC_RTOH_TH +523 0x0064 //TX_WIDE2_MEANHTH 524 0x0000 //TX_DR_RESRV_5 525 0x0000 //TX_DR_RESRV_6 526 0x0000 //TX_DR_RESRV_7 @@ -30717,14 +46289,79 @@ 888 0x00C8 //TX_FASTNS_ARSPC_TH 889 0xC000 //TX_FASTNS_MASK5_TH 890 0x4848 //TX_POSTSSA_MIN_G_VR_MASK -891 0x7FFF //TX_A_LESSCUT_RTO_MASK +891 0x4000 //TX_A_LESSCUT_RTO_MASK 892 0x1770 //TX_FASTNS_NOISETH 893 0xC000 //TX_FASTNS_SSA_THLFL 894 0xC000 //TX_FASTNS_SSA_THHFL 895 0xCCCC //TX_FASTNS_SSA_THLFH 896 0xD999 //TX_FASTNS_SSA_THHFH +897 0x2339 //TX_SENDFUNC_REG_MICMUTE +898 0x0021 //TX_SENDFUNC_REG_MICMUTE1 +899 0x02BC //TX_MICMUTE_RATIO_THR +900 0x0140 //TX_MICMUTE_AMP_THR +901 0x0004 //TX_MICMUTE_HPF_IND +902 0x00C0 //TX_MICMUTE_LOG_EYR_TH +903 0x0008 //TX_MICMUTE_CVG_TIME +904 0x0008 //TX_MICMUTE_RELEASE_TIME +905 0x01FE //TX_MIC_VOLUME_MIC0MUTE +906 0x0020 //TX_MICMUTE_EPD_OFFSET_0 +907 0x001E //TX_MICMUTE_FRQ_AEC_L +908 0x7999 //TX_MICMUTE_EAD_THR +909 0x7FFF //TX_MICMUTE_LAMBDA_CB_NLE +910 0x7FFF //TX_MICMUTE_LAMBDA_RE_EST +911 0x4000 //TX_DTD_THR1_MICMUTE_0 +912 0x7000 //TX_DTD_THR1_MICMUTE_1 +913 0x7FFF //TX_DTD_THR1_MICMUTE_2 +914 0x7FFF //TX_DTD_THR1_MICMUTE_3 +915 0x6CCC //TX_DTD_THR2_MICMUTE_0 +916 0x0400 //TX_MICMUTE_MIN_EQ_RE_EST_0 +917 0x0400 //TX_MICMUTE_MIN_EQ_RE_EST_1 +918 0x1000 //TX_MICMUTE_MIN_EQ_RE_EST_2 +919 0x7FFF //TX_MICMUTE_MIN_EQ_RE_EST_3 +920 0x7FFF //TX_MICMUTE_MIN_EQ_RE_EST_4 +921 0x4000 //TX_MICMUTE_C_POST_FLT +922 0x03E8 //TX_MICMUTE_DT_CUT_K +923 0x0001 //TX_MICMUTE_DT_CUT_THR +924 0x03E8 //TX_MICMUTE_DT_CUT_K2 +925 0x0001 //TX_MICMUTE_DT_CUT_THR2 +926 0x0064 //TX_MICMUTE_DT2_HOLD_N +927 0x1000 //TX_MICMUTE_RATIODTH_THCUT +928 0x1000 //TX_MICMUTE_B_POST_FLT_ECHOL +929 0x7FFF //TX_MICMUTE_B_POST_FLT_ECHOH +930 0x0400 //TX_MICMUTE_C_POST_FLT_MASK +931 0x7999 //TX_MICMUTE_RATIODTL_CUT_TH +932 0x0258 //TX_MICMUTE_DT_CUT_K1 +933 0x0800 //TX_MICMUTE_N2_SN_EST +934 0xFC00 //TX_MICMUTE_THR_SN_EST_0 +935 0x001C //TX_MICMUTE_MIN_G_CTRL_0 +936 0x6000 //TX_MICMUTE_A_POST_FILT_S_0 +937 0x7000 //TX_MICMUTE_B_POST_FILT_0 +938 0x2710 //TX_MIC1RUB_AMP_THR +939 0x0010 //TX_MIC1MUTE_RATIO_THR +940 0x0450 //TX_MIC1MUTE_AMP_THR +941 0x0008 //TX_MIC1MUTE_CVG_TIME +942 0x0008 //TX_MIC1MUTE_RELEASE_TIME +943 0x0000 //TX_AMS_RESRV_01 +944 0x0000 //TX_AMS_RESRV_02 +945 0x0000 //TX_AMS_RESRV_03 +946 0x0000 //TX_AMS_RESRV_04 +947 0x0000 //TX_AMS_RESRV_05 +948 0x0000 //TX_AMS_RESRV_06 +949 0x0000 //TX_AMS_RESRV_07 +950 0x0000 //TX_AMS_RESRV_08 +951 0x0000 //TX_AMS_RESRV_09 +952 0x0000 //TX_AMS_RESRV_10 +953 0x0000 //TX_AMS_RESRV_11 +954 0x0000 //TX_AMS_RESRV_12 +955 0x0000 //TX_AMS_RESRV_13 +956 0x0000 //TX_AMS_RESRV_14 +957 0x0000 //TX_AMS_RESRV_15 +958 0x0000 //TX_AMS_RESRV_16 +959 0x0000 //TX_AMS_RESRV_17 +960 0x0000 //TX_AMS_RESRV_18 +961 0x0000 //TX_AMS_RESRV_19 #RX -0 0x0024 //RX_RECVFUNC_MODE_0 +0 0x2024 //RX_RECVFUNC_MODE_0 1 0x0000 //RX_RECVFUNC_MODE_1 2 0x0001 //RX_SAMPLINGFREQ_SIG 3 0x0001 //RX_SAMPLINGFREQ_PROC @@ -31574,11 +47211,862 @@ 110 0x0000 //RX_FDDRC_RESRV_0 129 0x0100 //RX_SPK_VOL 130 0x0000 //RX_VOL_RESRV_0 +#RX 2 +157 0x2024 //RX_RECVFUNC_MODE_0 +158 0x0000 //RX_RECVFUNC_MODE_1 +159 0x0001 //RX_SAMPLINGFREQ_SIG +160 0x0001 //RX_SAMPLINGFREQ_PROC +161 0x000A //RX_FRAME_SZ +162 0x0000 //RX_DELAY_OPT +163 0x3000 //RX_TDDRC_ALPHA_UP_1 +164 0x3000 //RX_TDDRC_ALPHA_UP_2 +165 0x3000 //RX_TDDRC_ALPHA_UP_3 +166 0x3000 //RX_TDDRC_ALPHA_UP_4 +167 0x0800 //RX_PGA +168 0x7FFF //RX_A_HP +169 0x4000 //RX_B_PE +170 0x3800 //RX_THR_PITCH_DET_0 +171 0x3000 //RX_THR_PITCH_DET_1 +172 0x2800 //RX_THR_PITCH_DET_2 +173 0x0008 //RX_PITCH_BFR_LEN +174 0x0003 //RX_SBD_PITCH_DET +175 0x0100 //RX_PP_RESRV_0 +176 0x0020 //RX_PP_RESRV_1 +177 0x0600 //RX_N_SN_EST +178 0x000C //RX_N2_SN_EST +179 0x0010 //RX_NS_LVL_CTRL +180 0xF800 //RX_THR_SN_EST +181 0x7CCD //RX_LAMBDA_PFILT +182 0x000A //RX_FENS_RESRV_0 +183 0x0190 //RX_FENS_RESRV_1 +184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +187 0x0002 //RX_EXTRA_NS_L +188 0x0800 //RX_EXTRA_NS_A +189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +190 0x7FFF //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +192 0x199A //RX_A_POST_FLT +193 0x0000 //RX_LMT_THRD +194 0x4000 //RX_LMT_ALPHA +195 0x001C //RX_FDEQ_SUBNUM +196 0x4848 //RX_FDEQ_GAIN_0 +197 0x4848 //RX_FDEQ_GAIN_1 +198 0x4848 //RX_FDEQ_GAIN_2 +199 0x4848 //RX_FDEQ_GAIN_3 +200 0x4848 //RX_FDEQ_GAIN_4 +201 0x4848 //RX_FDEQ_GAIN_5 +202 0x4848 //RX_FDEQ_GAIN_6 +203 0x4848 //RX_FDEQ_GAIN_7 +204 0x4848 //RX_FDEQ_GAIN_8 +205 0x4848 //RX_FDEQ_GAIN_9 +206 0x4848 //RX_FDEQ_GAIN_10 +207 0x4848 //RX_FDEQ_GAIN_11 +208 0x4848 //RX_FDEQ_GAIN_12 +209 0x4848 //RX_FDEQ_GAIN_13 +210 0x4848 //RX_FDEQ_GAIN_14 +211 0x4848 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0202 //RX_FDEQ_BIN_0 +221 0x0203 //RX_FDEQ_BIN_1 +222 0x0303 //RX_FDEQ_BIN_2 +223 0x0304 //RX_FDEQ_BIN_3 +224 0x0405 //RX_FDEQ_BIN_4 +225 0x0506 //RX_FDEQ_BIN_5 +226 0x0708 //RX_FDEQ_BIN_6 +227 0x090A //RX_FDEQ_BIN_7 +228 0x0B0C //RX_FDEQ_BIN_8 +229 0x0D0E //RX_FDEQ_BIN_9 +230 0x0E0F //RX_FDEQ_BIN_10 +231 0x0F10 //RX_FDEQ_BIN_11 +232 0x1011 //RX_FDEQ_BIN_12 +233 0x1104 //RX_FDEQ_BIN_13 +234 0x0000 //RX_FDEQ_BIN_14 +235 0x0000 //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x4000 //RX_FDEQ_RESRV_0 +245 0x0320 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0030 //RX_FDDRC_BAND_MARGIN_1 +248 0x0050 //RX_FDDRC_BAND_MARGIN_2 +249 0x0080 //RX_FDDRC_BAND_MARGIN_3 +250 0x0007 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x5000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x6400 //RX_FDDRC_THRD_3_2 +258 0x6400 //RX_FDDRC_THRD_3_3 +259 0x2000 //RX_FDDRC_SLANT_0_0 +260 0x2000 //RX_FDDRC_SLANT_0_1 +261 0x2000 //RX_FDDRC_SLANT_0_2 +262 0x2000 //RX_FDDRC_SLANT_0_3 +263 0x5333 //RX_FDDRC_SLANT_1_0 +264 0x5333 //RX_FDDRC_SLANT_1_1 +265 0x5333 //RX_FDDRC_SLANT_1_2 +266 0x5333 //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +268 0x0002 //RX_FILTINDX +269 0x0000 //RX_TDDRC_THRD_0 +270 0x0000 //RX_TDDRC_THRD_1 +271 0x2000 //RX_TDDRC_THRD_2 +272 0x3000 //RX_TDDRC_THRD_3 +273 0x0800 //RX_TDDRC_SLANT_0 +274 0x7EB8 //RX_TDDRC_SLANT_1 +275 0x3000 //RX_TDDRC_ALPHA_UP_0 +276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x199A //RX_TDDRC_HMNC_GAIN +279 0x0001 //RX_TDDRC_SMT_FLAG +280 0x0CCD //RX_TDDRC_SMT_W +281 0x0196 //RX_TDDRC_DRC_GAIN +282 0x7C00 //RX_LAMBDA_PKA_FP +283 0x2000 //RX_TPKA_FP +284 0x2000 //RX_MIN_G_FP +285 0x0080 //RX_MAX_G_FP +286 0x000C //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 +288 0x0000 //RX_MAXLEVEL_CNG +289 0x3000 //RX_BWE_UV_TH +290 0x3000 //RX_BWE_UV_TH2 +291 0x1800 //RX_BWE_UV_TH3 +292 0x1000 //RX_BWE_V_TH +293 0x04CD //RX_BWE_GAIN1_V_TH1 +294 0x0F33 //RX_BWE_GAIN1_V_TH2 +295 0x7333 //RX_BWE_UV_EQ +296 0x199A //RX_BWE_V_EQ +297 0x7333 //RX_BWE_TONE_TH +298 0x0004 //RX_BWE_UV_HOLD_T +299 0x6CCD //RX_BWE_GAIN2_ALPHA +300 0x799A //RX_BWE_GAIN3_ALPHA +301 0x001E //RX_BWE_CUTOFF +302 0x3000 //RX_BWE_GAINFILL +303 0x3200 //RX_BWE_MAXTH_TONE +304 0x2000 //RX_BWE_EQ_0 +305 0x2000 //RX_BWE_EQ_1 +306 0x2000 //RX_BWE_EQ_2 +307 0x2000 //RX_BWE_EQ_3 +308 0x2000 //RX_BWE_EQ_4 +309 0x2000 //RX_BWE_EQ_5 +310 0x2000 //RX_BWE_EQ_6 +311 0x0000 //RX_BWE_RESRV_0 +312 0x0000 //RX_BWE_RESRV_1 +313 0x0000 //RX_BWE_RESRV_2 +#VOL 0 +163 0x3000 //RX_TDDRC_ALPHA_UP_1 +164 0x3000 //RX_TDDRC_ALPHA_UP_2 +165 0x3000 //RX_TDDRC_ALPHA_UP_3 +166 0x3000 //RX_TDDRC_ALPHA_UP_4 +184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +190 0x7FFF //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +269 0x0000 //RX_TDDRC_THRD_0 +270 0x0000 //RX_TDDRC_THRD_1 +271 0x2000 //RX_TDDRC_THRD_2 +272 0x3000 //RX_TDDRC_THRD_3 +273 0x0800 //RX_TDDRC_SLANT_0 +274 0x7EB8 //RX_TDDRC_SLANT_1 +275 0x3000 //RX_TDDRC_ALPHA_UP_0 +276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x199A //RX_TDDRC_HMNC_GAIN +279 0x0001 //RX_TDDRC_SMT_FLAG +280 0x0CCD //RX_TDDRC_SMT_W +281 0x0196 //RX_TDDRC_DRC_GAIN +195 0x001C //RX_FDEQ_SUBNUM +196 0x4848 //RX_FDEQ_GAIN_0 +197 0x4848 //RX_FDEQ_GAIN_1 +198 0x4848 //RX_FDEQ_GAIN_2 +199 0x4848 //RX_FDEQ_GAIN_3 +200 0x4848 //RX_FDEQ_GAIN_4 +201 0x4848 //RX_FDEQ_GAIN_5 +202 0x4848 //RX_FDEQ_GAIN_6 +203 0x4848 //RX_FDEQ_GAIN_7 +204 0x4848 //RX_FDEQ_GAIN_8 +205 0x4848 //RX_FDEQ_GAIN_9 +206 0x4848 //RX_FDEQ_GAIN_10 +207 0x4848 //RX_FDEQ_GAIN_11 +208 0x4848 //RX_FDEQ_GAIN_12 +209 0x4848 //RX_FDEQ_GAIN_13 +210 0x4848 //RX_FDEQ_GAIN_14 +211 0x4848 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0202 //RX_FDEQ_BIN_0 +221 0x0203 //RX_FDEQ_BIN_1 +222 0x0303 //RX_FDEQ_BIN_2 +223 0x0304 //RX_FDEQ_BIN_3 +224 0x0405 //RX_FDEQ_BIN_4 +225 0x0506 //RX_FDEQ_BIN_5 +226 0x0708 //RX_FDEQ_BIN_6 +227 0x090A //RX_FDEQ_BIN_7 +228 0x0B0C //RX_FDEQ_BIN_8 +229 0x0D0E //RX_FDEQ_BIN_9 +230 0x0E0F //RX_FDEQ_BIN_10 +231 0x0F10 //RX_FDEQ_BIN_11 +232 0x1011 //RX_FDEQ_BIN_12 +233 0x1104 //RX_FDEQ_BIN_13 +234 0x0000 //RX_FDEQ_BIN_14 +235 0x0000 //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x4000 //RX_FDEQ_RESRV_0 +245 0x0320 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0030 //RX_FDDRC_BAND_MARGIN_1 +248 0x0050 //RX_FDDRC_BAND_MARGIN_2 +249 0x0080 //RX_FDDRC_BAND_MARGIN_3 +250 0x0007 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x5000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x6400 //RX_FDDRC_THRD_3_2 +258 0x6400 //RX_FDDRC_THRD_3_3 +259 0x2000 //RX_FDDRC_SLANT_0_0 +260 0x2000 //RX_FDDRC_SLANT_0_1 +261 0x2000 //RX_FDDRC_SLANT_0_2 +262 0x2000 //RX_FDDRC_SLANT_0_3 +263 0x5333 //RX_FDDRC_SLANT_1_0 +264 0x5333 //RX_FDDRC_SLANT_1_1 +265 0x5333 //RX_FDDRC_SLANT_1_2 +266 0x5333 //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +286 0x000C //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 +#VOL 1 +163 0x3000 //RX_TDDRC_ALPHA_UP_1 +164 0x3000 //RX_TDDRC_ALPHA_UP_2 +165 0x3000 //RX_TDDRC_ALPHA_UP_3 +166 0x3000 //RX_TDDRC_ALPHA_UP_4 +184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +190 0x7FFF //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +269 0x0000 //RX_TDDRC_THRD_0 +270 0x0000 //RX_TDDRC_THRD_1 +271 0x2000 //RX_TDDRC_THRD_2 +272 0x3000 //RX_TDDRC_THRD_3 +273 0x0800 //RX_TDDRC_SLANT_0 +274 0x7EB8 //RX_TDDRC_SLANT_1 +275 0x3000 //RX_TDDRC_ALPHA_UP_0 +276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x199A //RX_TDDRC_HMNC_GAIN +279 0x0001 //RX_TDDRC_SMT_FLAG +280 0x0CCD //RX_TDDRC_SMT_W +281 0x0196 //RX_TDDRC_DRC_GAIN +195 0x001C //RX_FDEQ_SUBNUM +196 0x4848 //RX_FDEQ_GAIN_0 +197 0x4848 //RX_FDEQ_GAIN_1 +198 0x4848 //RX_FDEQ_GAIN_2 +199 0x4848 //RX_FDEQ_GAIN_3 +200 0x4848 //RX_FDEQ_GAIN_4 +201 0x4848 //RX_FDEQ_GAIN_5 +202 0x4848 //RX_FDEQ_GAIN_6 +203 0x4848 //RX_FDEQ_GAIN_7 +204 0x4848 //RX_FDEQ_GAIN_8 +205 0x4848 //RX_FDEQ_GAIN_9 +206 0x4848 //RX_FDEQ_GAIN_10 +207 0x4848 //RX_FDEQ_GAIN_11 +208 0x4848 //RX_FDEQ_GAIN_12 +209 0x4848 //RX_FDEQ_GAIN_13 +210 0x4848 //RX_FDEQ_GAIN_14 +211 0x4848 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0202 //RX_FDEQ_BIN_0 +221 0x0203 //RX_FDEQ_BIN_1 +222 0x0303 //RX_FDEQ_BIN_2 +223 0x0304 //RX_FDEQ_BIN_3 +224 0x0405 //RX_FDEQ_BIN_4 +225 0x0506 //RX_FDEQ_BIN_5 +226 0x0708 //RX_FDEQ_BIN_6 +227 0x090A //RX_FDEQ_BIN_7 +228 0x0B0C //RX_FDEQ_BIN_8 +229 0x0D0E //RX_FDEQ_BIN_9 +230 0x0E0F //RX_FDEQ_BIN_10 +231 0x0F10 //RX_FDEQ_BIN_11 +232 0x1011 //RX_FDEQ_BIN_12 +233 0x1104 //RX_FDEQ_BIN_13 +234 0x0000 //RX_FDEQ_BIN_14 +235 0x0000 //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x4000 //RX_FDEQ_RESRV_0 +245 0x0320 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0030 //RX_FDDRC_BAND_MARGIN_1 +248 0x0050 //RX_FDDRC_BAND_MARGIN_2 +249 0x0080 //RX_FDDRC_BAND_MARGIN_3 +250 0x0007 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x5000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x6400 //RX_FDDRC_THRD_3_2 +258 0x6400 //RX_FDDRC_THRD_3_3 +259 0x2000 //RX_FDDRC_SLANT_0_0 +260 0x2000 //RX_FDDRC_SLANT_0_1 +261 0x2000 //RX_FDDRC_SLANT_0_2 +262 0x2000 //RX_FDDRC_SLANT_0_3 +263 0x5333 //RX_FDDRC_SLANT_1_0 +264 0x5333 //RX_FDDRC_SLANT_1_1 +265 0x5333 //RX_FDDRC_SLANT_1_2 +266 0x5333 //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +286 0x0014 //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 +#VOL 2 +163 0x3000 //RX_TDDRC_ALPHA_UP_1 +164 0x3000 //RX_TDDRC_ALPHA_UP_2 +165 0x3000 //RX_TDDRC_ALPHA_UP_3 +166 0x3000 //RX_TDDRC_ALPHA_UP_4 +184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +190 0x7FFF //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +269 0x0000 //RX_TDDRC_THRD_0 +270 0x0000 //RX_TDDRC_THRD_1 +271 0x2000 //RX_TDDRC_THRD_2 +272 0x3000 //RX_TDDRC_THRD_3 +273 0x0800 //RX_TDDRC_SLANT_0 +274 0x7EB8 //RX_TDDRC_SLANT_1 +275 0x3000 //RX_TDDRC_ALPHA_UP_0 +276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x199A //RX_TDDRC_HMNC_GAIN +279 0x0001 //RX_TDDRC_SMT_FLAG +280 0x0CCD //RX_TDDRC_SMT_W +281 0x0196 //RX_TDDRC_DRC_GAIN +195 0x001C //RX_FDEQ_SUBNUM +196 0x4848 //RX_FDEQ_GAIN_0 +197 0x4848 //RX_FDEQ_GAIN_1 +198 0x4848 //RX_FDEQ_GAIN_2 +199 0x4848 //RX_FDEQ_GAIN_3 +200 0x4848 //RX_FDEQ_GAIN_4 +201 0x4848 //RX_FDEQ_GAIN_5 +202 0x4848 //RX_FDEQ_GAIN_6 +203 0x4848 //RX_FDEQ_GAIN_7 +204 0x4848 //RX_FDEQ_GAIN_8 +205 0x4848 //RX_FDEQ_GAIN_9 +206 0x4848 //RX_FDEQ_GAIN_10 +207 0x4848 //RX_FDEQ_GAIN_11 +208 0x4848 //RX_FDEQ_GAIN_12 +209 0x4848 //RX_FDEQ_GAIN_13 +210 0x4848 //RX_FDEQ_GAIN_14 +211 0x4848 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0202 //RX_FDEQ_BIN_0 +221 0x0203 //RX_FDEQ_BIN_1 +222 0x0303 //RX_FDEQ_BIN_2 +223 0x0304 //RX_FDEQ_BIN_3 +224 0x0405 //RX_FDEQ_BIN_4 +225 0x0506 //RX_FDEQ_BIN_5 +226 0x0708 //RX_FDEQ_BIN_6 +227 0x090A //RX_FDEQ_BIN_7 +228 0x0B0C //RX_FDEQ_BIN_8 +229 0x0D0E //RX_FDEQ_BIN_9 +230 0x0E0F //RX_FDEQ_BIN_10 +231 0x0F10 //RX_FDEQ_BIN_11 +232 0x1011 //RX_FDEQ_BIN_12 +233 0x1104 //RX_FDEQ_BIN_13 +234 0x0000 //RX_FDEQ_BIN_14 +235 0x0000 //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x4000 //RX_FDEQ_RESRV_0 +245 0x0320 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0030 //RX_FDDRC_BAND_MARGIN_1 +248 0x0050 //RX_FDDRC_BAND_MARGIN_2 +249 0x0080 //RX_FDDRC_BAND_MARGIN_3 +250 0x0007 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x5000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x6400 //RX_FDDRC_THRD_3_2 +258 0x6400 //RX_FDDRC_THRD_3_3 +259 0x2000 //RX_FDDRC_SLANT_0_0 +260 0x2000 //RX_FDDRC_SLANT_0_1 +261 0x2000 //RX_FDDRC_SLANT_0_2 +262 0x2000 //RX_FDDRC_SLANT_0_3 +263 0x5333 //RX_FDDRC_SLANT_1_0 +264 0x5333 //RX_FDDRC_SLANT_1_1 +265 0x5333 //RX_FDDRC_SLANT_1_2 +266 0x5333 //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +286 0x0021 //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 +#VOL 3 +163 0x3000 //RX_TDDRC_ALPHA_UP_1 +164 0x3000 //RX_TDDRC_ALPHA_UP_2 +165 0x3000 //RX_TDDRC_ALPHA_UP_3 +166 0x3000 //RX_TDDRC_ALPHA_UP_4 +184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +190 0x7FFF //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +269 0x0000 //RX_TDDRC_THRD_0 +270 0x0000 //RX_TDDRC_THRD_1 +271 0x2000 //RX_TDDRC_THRD_2 +272 0x3000 //RX_TDDRC_THRD_3 +273 0x0800 //RX_TDDRC_SLANT_0 +274 0x7EB8 //RX_TDDRC_SLANT_1 +275 0x3000 //RX_TDDRC_ALPHA_UP_0 +276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x199A //RX_TDDRC_HMNC_GAIN +279 0x0001 //RX_TDDRC_SMT_FLAG +280 0x0CCD //RX_TDDRC_SMT_W +281 0x0196 //RX_TDDRC_DRC_GAIN +195 0x001C //RX_FDEQ_SUBNUM +196 0x4848 //RX_FDEQ_GAIN_0 +197 0x4848 //RX_FDEQ_GAIN_1 +198 0x4848 //RX_FDEQ_GAIN_2 +199 0x4848 //RX_FDEQ_GAIN_3 +200 0x4848 //RX_FDEQ_GAIN_4 +201 0x4848 //RX_FDEQ_GAIN_5 +202 0x4848 //RX_FDEQ_GAIN_6 +203 0x4848 //RX_FDEQ_GAIN_7 +204 0x4848 //RX_FDEQ_GAIN_8 +205 0x4848 //RX_FDEQ_GAIN_9 +206 0x4848 //RX_FDEQ_GAIN_10 +207 0x4848 //RX_FDEQ_GAIN_11 +208 0x4848 //RX_FDEQ_GAIN_12 +209 0x4848 //RX_FDEQ_GAIN_13 +210 0x4848 //RX_FDEQ_GAIN_14 +211 0x4848 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0202 //RX_FDEQ_BIN_0 +221 0x0203 //RX_FDEQ_BIN_1 +222 0x0303 //RX_FDEQ_BIN_2 +223 0x0304 //RX_FDEQ_BIN_3 +224 0x0405 //RX_FDEQ_BIN_4 +225 0x0506 //RX_FDEQ_BIN_5 +226 0x0708 //RX_FDEQ_BIN_6 +227 0x090A //RX_FDEQ_BIN_7 +228 0x0B0C //RX_FDEQ_BIN_8 +229 0x0D0E //RX_FDEQ_BIN_9 +230 0x0E0F //RX_FDEQ_BIN_10 +231 0x0F10 //RX_FDEQ_BIN_11 +232 0x1011 //RX_FDEQ_BIN_12 +233 0x1104 //RX_FDEQ_BIN_13 +234 0x0000 //RX_FDEQ_BIN_14 +235 0x0000 //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x4000 //RX_FDEQ_RESRV_0 +245 0x0320 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0030 //RX_FDDRC_BAND_MARGIN_1 +248 0x0050 //RX_FDDRC_BAND_MARGIN_2 +249 0x0080 //RX_FDDRC_BAND_MARGIN_3 +250 0x0007 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x5000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x6400 //RX_FDDRC_THRD_3_2 +258 0x6400 //RX_FDDRC_THRD_3_3 +259 0x2000 //RX_FDDRC_SLANT_0_0 +260 0x2000 //RX_FDDRC_SLANT_0_1 +261 0x2000 //RX_FDDRC_SLANT_0_2 +262 0x2000 //RX_FDDRC_SLANT_0_3 +263 0x5333 //RX_FDDRC_SLANT_1_0 +264 0x5333 //RX_FDDRC_SLANT_1_1 +265 0x5333 //RX_FDDRC_SLANT_1_2 +266 0x5333 //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +286 0x0037 //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 +#VOL 4 +163 0x3000 //RX_TDDRC_ALPHA_UP_1 +164 0x3000 //RX_TDDRC_ALPHA_UP_2 +165 0x3000 //RX_TDDRC_ALPHA_UP_3 +166 0x3000 //RX_TDDRC_ALPHA_UP_4 +184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +190 0x7FFF //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +269 0x0000 //RX_TDDRC_THRD_0 +270 0x0000 //RX_TDDRC_THRD_1 +271 0x2000 //RX_TDDRC_THRD_2 +272 0x3000 //RX_TDDRC_THRD_3 +273 0x0800 //RX_TDDRC_SLANT_0 +274 0x7EB8 //RX_TDDRC_SLANT_1 +275 0x3000 //RX_TDDRC_ALPHA_UP_0 +276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x199A //RX_TDDRC_HMNC_GAIN +279 0x0001 //RX_TDDRC_SMT_FLAG +280 0x0CCD //RX_TDDRC_SMT_W +281 0x0196 //RX_TDDRC_DRC_GAIN +195 0x001C //RX_FDEQ_SUBNUM +196 0x4848 //RX_FDEQ_GAIN_0 +197 0x4848 //RX_FDEQ_GAIN_1 +198 0x4848 //RX_FDEQ_GAIN_2 +199 0x4848 //RX_FDEQ_GAIN_3 +200 0x4848 //RX_FDEQ_GAIN_4 +201 0x4848 //RX_FDEQ_GAIN_5 +202 0x4848 //RX_FDEQ_GAIN_6 +203 0x4848 //RX_FDEQ_GAIN_7 +204 0x4848 //RX_FDEQ_GAIN_8 +205 0x4848 //RX_FDEQ_GAIN_9 +206 0x4848 //RX_FDEQ_GAIN_10 +207 0x4848 //RX_FDEQ_GAIN_11 +208 0x4848 //RX_FDEQ_GAIN_12 +209 0x4848 //RX_FDEQ_GAIN_13 +210 0x4848 //RX_FDEQ_GAIN_14 +211 0x4848 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0202 //RX_FDEQ_BIN_0 +221 0x0203 //RX_FDEQ_BIN_1 +222 0x0303 //RX_FDEQ_BIN_2 +223 0x0304 //RX_FDEQ_BIN_3 +224 0x0405 //RX_FDEQ_BIN_4 +225 0x0506 //RX_FDEQ_BIN_5 +226 0x0708 //RX_FDEQ_BIN_6 +227 0x090A //RX_FDEQ_BIN_7 +228 0x0B0C //RX_FDEQ_BIN_8 +229 0x0D0E //RX_FDEQ_BIN_9 +230 0x0E0F //RX_FDEQ_BIN_10 +231 0x0F10 //RX_FDEQ_BIN_11 +232 0x1011 //RX_FDEQ_BIN_12 +233 0x1104 //RX_FDEQ_BIN_13 +234 0x0000 //RX_FDEQ_BIN_14 +235 0x0000 //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x4000 //RX_FDEQ_RESRV_0 +245 0x0320 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0030 //RX_FDDRC_BAND_MARGIN_1 +248 0x0050 //RX_FDDRC_BAND_MARGIN_2 +249 0x0080 //RX_FDDRC_BAND_MARGIN_3 +250 0x0007 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x5000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x6400 //RX_FDDRC_THRD_3_2 +258 0x6400 //RX_FDDRC_THRD_3_3 +259 0x2000 //RX_FDDRC_SLANT_0_0 +260 0x2000 //RX_FDDRC_SLANT_0_1 +261 0x2000 //RX_FDDRC_SLANT_0_2 +262 0x2000 //RX_FDDRC_SLANT_0_3 +263 0x5333 //RX_FDDRC_SLANT_1_0 +264 0x5333 //RX_FDDRC_SLANT_1_1 +265 0x5333 //RX_FDDRC_SLANT_1_2 +266 0x5333 //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +286 0x005B //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 +#VOL 5 +163 0x3000 //RX_TDDRC_ALPHA_UP_1 +164 0x3000 //RX_TDDRC_ALPHA_UP_2 +165 0x3000 //RX_TDDRC_ALPHA_UP_3 +166 0x3000 //RX_TDDRC_ALPHA_UP_4 +184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +190 0x7FFF //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +269 0x0000 //RX_TDDRC_THRD_0 +270 0x0000 //RX_TDDRC_THRD_1 +271 0x2000 //RX_TDDRC_THRD_2 +272 0x3000 //RX_TDDRC_THRD_3 +273 0x0800 //RX_TDDRC_SLANT_0 +274 0x7EB8 //RX_TDDRC_SLANT_1 +275 0x3000 //RX_TDDRC_ALPHA_UP_0 +276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x199A //RX_TDDRC_HMNC_GAIN +279 0x0001 //RX_TDDRC_SMT_FLAG +280 0x0CCD //RX_TDDRC_SMT_W +281 0x0196 //RX_TDDRC_DRC_GAIN +195 0x001C //RX_FDEQ_SUBNUM +196 0x4848 //RX_FDEQ_GAIN_0 +197 0x4848 //RX_FDEQ_GAIN_1 +198 0x4848 //RX_FDEQ_GAIN_2 +199 0x4848 //RX_FDEQ_GAIN_3 +200 0x4848 //RX_FDEQ_GAIN_4 +201 0x4848 //RX_FDEQ_GAIN_5 +202 0x4848 //RX_FDEQ_GAIN_6 +203 0x4848 //RX_FDEQ_GAIN_7 +204 0x4848 //RX_FDEQ_GAIN_8 +205 0x4848 //RX_FDEQ_GAIN_9 +206 0x4848 //RX_FDEQ_GAIN_10 +207 0x4848 //RX_FDEQ_GAIN_11 +208 0x4848 //RX_FDEQ_GAIN_12 +209 0x4848 //RX_FDEQ_GAIN_13 +210 0x4848 //RX_FDEQ_GAIN_14 +211 0x4848 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0202 //RX_FDEQ_BIN_0 +221 0x0203 //RX_FDEQ_BIN_1 +222 0x0303 //RX_FDEQ_BIN_2 +223 0x0304 //RX_FDEQ_BIN_3 +224 0x0405 //RX_FDEQ_BIN_4 +225 0x0506 //RX_FDEQ_BIN_5 +226 0x0708 //RX_FDEQ_BIN_6 +227 0x090A //RX_FDEQ_BIN_7 +228 0x0B0C //RX_FDEQ_BIN_8 +229 0x0D0E //RX_FDEQ_BIN_9 +230 0x0E0F //RX_FDEQ_BIN_10 +231 0x0F10 //RX_FDEQ_BIN_11 +232 0x1011 //RX_FDEQ_BIN_12 +233 0x1104 //RX_FDEQ_BIN_13 +234 0x0000 //RX_FDEQ_BIN_14 +235 0x0000 //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x4000 //RX_FDEQ_RESRV_0 +245 0x0320 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0030 //RX_FDDRC_BAND_MARGIN_1 +248 0x0050 //RX_FDDRC_BAND_MARGIN_2 +249 0x0080 //RX_FDDRC_BAND_MARGIN_3 +250 0x0007 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x5000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x6400 //RX_FDDRC_THRD_3_2 +258 0x6400 //RX_FDDRC_THRD_3_3 +259 0x2000 //RX_FDDRC_SLANT_0_0 +260 0x2000 //RX_FDDRC_SLANT_0_1 +261 0x2000 //RX_FDDRC_SLANT_0_2 +262 0x2000 //RX_FDDRC_SLANT_0_3 +263 0x5333 //RX_FDDRC_SLANT_1_0 +264 0x5333 //RX_FDDRC_SLANT_1_1 +265 0x5333 //RX_FDDRC_SLANT_1_2 +266 0x5333 //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +286 0x0099 //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 +#VOL 6 +163 0x3000 //RX_TDDRC_ALPHA_UP_1 +164 0x3000 //RX_TDDRC_ALPHA_UP_2 +165 0x3000 //RX_TDDRC_ALPHA_UP_3 +166 0x3000 //RX_TDDRC_ALPHA_UP_4 +184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +190 0x7FFF //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +269 0x0000 //RX_TDDRC_THRD_0 +270 0x0000 //RX_TDDRC_THRD_1 +271 0x2000 //RX_TDDRC_THRD_2 +272 0x3000 //RX_TDDRC_THRD_3 +273 0x0800 //RX_TDDRC_SLANT_0 +274 0x7EB8 //RX_TDDRC_SLANT_1 +275 0x3000 //RX_TDDRC_ALPHA_UP_0 +276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x199A //RX_TDDRC_HMNC_GAIN +279 0x0001 //RX_TDDRC_SMT_FLAG +280 0x0CCD //RX_TDDRC_SMT_W +281 0x0196 //RX_TDDRC_DRC_GAIN +195 0x001C //RX_FDEQ_SUBNUM +196 0x4848 //RX_FDEQ_GAIN_0 +197 0x4848 //RX_FDEQ_GAIN_1 +198 0x4848 //RX_FDEQ_GAIN_2 +199 0x4848 //RX_FDEQ_GAIN_3 +200 0x4848 //RX_FDEQ_GAIN_4 +201 0x4848 //RX_FDEQ_GAIN_5 +202 0x4848 //RX_FDEQ_GAIN_6 +203 0x4848 //RX_FDEQ_GAIN_7 +204 0x4848 //RX_FDEQ_GAIN_8 +205 0x4848 //RX_FDEQ_GAIN_9 +206 0x4848 //RX_FDEQ_GAIN_10 +207 0x4848 //RX_FDEQ_GAIN_11 +208 0x4848 //RX_FDEQ_GAIN_12 +209 0x4848 //RX_FDEQ_GAIN_13 +210 0x4848 //RX_FDEQ_GAIN_14 +211 0x4848 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0202 //RX_FDEQ_BIN_0 +221 0x0203 //RX_FDEQ_BIN_1 +222 0x0303 //RX_FDEQ_BIN_2 +223 0x0304 //RX_FDEQ_BIN_3 +224 0x0405 //RX_FDEQ_BIN_4 +225 0x0506 //RX_FDEQ_BIN_5 +226 0x0708 //RX_FDEQ_BIN_6 +227 0x090A //RX_FDEQ_BIN_7 +228 0x0B0C //RX_FDEQ_BIN_8 +229 0x0D0E //RX_FDEQ_BIN_9 +230 0x0E0F //RX_FDEQ_BIN_10 +231 0x0F10 //RX_FDEQ_BIN_11 +232 0x1011 //RX_FDEQ_BIN_12 +233 0x1104 //RX_FDEQ_BIN_13 +234 0x0000 //RX_FDEQ_BIN_14 +235 0x0000 //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x4000 //RX_FDEQ_RESRV_0 +245 0x0320 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0030 //RX_FDDRC_BAND_MARGIN_1 +248 0x0050 //RX_FDDRC_BAND_MARGIN_2 +249 0x0080 //RX_FDDRC_BAND_MARGIN_3 +250 0x0007 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x5000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x6400 //RX_FDDRC_THRD_3_2 +258 0x6400 //RX_FDDRC_THRD_3_3 +259 0x2000 //RX_FDDRC_SLANT_0_0 +260 0x2000 //RX_FDDRC_SLANT_0_1 +261 0x2000 //RX_FDDRC_SLANT_0_2 +262 0x2000 //RX_FDDRC_SLANT_0_3 +263 0x5333 //RX_FDDRC_SLANT_1_0 +264 0x5333 //RX_FDDRC_SLANT_1_1 +265 0x5333 //RX_FDDRC_SLANT_1_2 +266 0x5333 //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +286 0x0100 //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 #CASE_NAME HEADSET-GOOGLE_CONDOR_CERTIFICATION1-VOICE_GENERIC-SWB -#PARAM_MODE FULL -#PARAM_TYPE TX+RX -#TOTAL_CUSTOM_STEP 7 +#PARAM_MODE Full +#PARAM_TYPE TX+2RX +#TOTAL_CUSTOM_STEP 7+7 #TX 0 0x0009 //TX_OPERATION_MODE_0 1 0x0001 //TX_OPERATION_MODE_1 @@ -31822,7 +48310,7 @@ 239 0x0800 //TX_DT_RESRV_7 240 0x0800 //TX_DT_RESRV_8 241 0x0000 //TX_DT_RESRV_9 -242 0xF400 //TX_THR_SN_EST_0 +242 0xFA00 //TX_THR_SN_EST_0 243 0xF400 //TX_THR_SN_EST_1 244 0xF600 //TX_THR_SN_EST_2 245 0xF400 //TX_THR_SN_EST_3 @@ -31831,20 +48319,20 @@ 248 0xF400 //TX_THR_SN_EST_6 249 0xF600 //TX_THR_SN_EST_7 250 0x0000 //TX_DELTA_THR_SN_EST_0 -251 0x0000 //TX_DELTA_THR_SN_EST_1 +251 0x0200 //TX_DELTA_THR_SN_EST_1 252 0x0200 //TX_DELTA_THR_SN_EST_2 253 0x0200 //TX_DELTA_THR_SN_EST_3 254 0x0200 //TX_DELTA_THR_SN_EST_4 255 0x0200 //TX_DELTA_THR_SN_EST_5 -256 0x0200 //TX_DELTA_THR_SN_EST_6 +256 0x0000 //TX_DELTA_THR_SN_EST_6 257 0x0200 //TX_DELTA_THR_SN_EST_7 258 0x6000 //TX_LAMBDA_NN_EST_0 -259 0x6000 //TX_LAMBDA_NN_EST_1 +259 0x4000 //TX_LAMBDA_NN_EST_1 260 0x4000 //TX_LAMBDA_NN_EST_2 261 0x4000 //TX_LAMBDA_NN_EST_3 262 0x4000 //TX_LAMBDA_NN_EST_4 263 0x4000 //TX_LAMBDA_NN_EST_5 -264 0x4000 //TX_LAMBDA_NN_EST_6 +264 0x6000 //TX_LAMBDA_NN_EST_6 265 0x4000 //TX_LAMBDA_NN_EST_7 266 0x0400 //TX_N_SN_EST 267 0x001E //TX_INBEAM_T @@ -31862,16 +48350,16 @@ 279 0x1000 //TX_B_POST_FLT_0 280 0x1000 //TX_B_POST_FLT_1 281 0x000B //TX_NS_LVL_CTRL_0 -282 0x000F //TX_NS_LVL_CTRL_1 -283 0x0011 //TX_NS_LVL_CTRL_2 +282 0x0011 //TX_NS_LVL_CTRL_1 +283 0x000F //TX_NS_LVL_CTRL_2 284 0x000F //TX_NS_LVL_CTRL_3 285 0x000F //TX_NS_LVL_CTRL_4 286 0x000F //TX_NS_LVL_CTRL_5 287 0x000F //TX_NS_LVL_CTRL_6 288 0x0011 //TX_NS_LVL_CTRL_7 289 0x000C //TX_MIN_GAIN_S_0 -290 0x000C //TX_MIN_GAIN_S_1 -291 0x000F //TX_MIN_GAIN_S_2 +290 0x000F //TX_MIN_GAIN_S_1 +291 0x000C //TX_MIN_GAIN_S_2 292 0x000C //TX_MIN_GAIN_S_3 293 0x000C //TX_MIN_GAIN_S_4 294 0x000C //TX_MIN_GAIN_S_5 @@ -31895,12 +48383,12 @@ 312 0x7FFF //TX_A_POST_FILT_0 313 0x2000 //TX_A_POST_FILT_1 314 0x2000 //TX_A_POST_FILT_S_0 -315 0x4000 //TX_A_POST_FILT_S_1 +315 0x5000 //TX_A_POST_FILT_S_1 316 0x5000 //TX_A_POST_FILT_S_2 317 0x5000 //TX_A_POST_FILT_S_3 318 0x5000 //TX_A_POST_FILT_S_4 319 0x5000 //TX_A_POST_FILT_S_5 -320 0x5000 //TX_A_POST_FILT_S_6 +320 0x4000 //TX_A_POST_FILT_S_6 321 0x5000 //TX_A_POST_FILT_S_7 322 0x1000 //TX_B_POST_FILT_0 323 0x1000 //TX_B_POST_FILT_1 @@ -31947,7 +48435,7 @@ 364 0x0000 //TX_K_APT 365 0x0001 //TX_NOISEDET 366 0x0190 //TX_NDETCT -367 0x0050 //TX_NOISE_TH_0 +367 0x0383 //TX_NOISE_TH_0 368 0x7FFF //TX_NOISE_TH_0_2 369 0x7FFF //TX_NOISE_TH_0_3 370 0x07D0 //TX_NOISE_TH_1 @@ -31959,11 +48447,11 @@ 376 0x7FFF //TX_NOISE_TH_5_3 377 0x7FFF //TX_NOISE_TH_5_4 378 0x044C //TX_NOISE_TH_6 -379 0x0014 //TX_MINENOISE_TH -380 0x4000 //TX_MINENOISE_MIC0_TH_MTS -381 0xFFEE //TX_MINENOISE_MIC0_TH_EXP -382 0x6000 //TX_MINENOISE_MIC0_S_TH_MTS -383 0xFFF3 //TX_MINENOISE_MIC0_S_TH_EXP +379 0x044C //TX_MINENOISE_TH +380 0xD508 //TX_MORENS_TFMASK_TH +381 0x0001 //TX_DRC_QUIET_FLOOR +382 0x3A98 //TX_RATIODTL_CUT_TH +383 0x0DAC //TX_DT_CUT_K1 384 0x0666 //TX_OUT_ENER_S_TH_CLEAN 385 0x0666 //TX_OUT_ENER_S_TH_LESSCLEAN 386 0x0333 //TX_OUT_ENER_S_TH_NOISY @@ -31971,22 +48459,22 @@ 388 0x0333 //TX_OUT_ENER_TH_SPEECH 389 0x2000 //TX_SN_NPB_GAIN 390 0x0000 //TX_NN_NPB_GAIN -391 0x0000 //TX_CSX_ALPHA_0 -392 0x0000 //TX_CSX_ALPHA_1 -393 0x0000 //TX_CSX_ALPHA_2 -394 0x0000 //TX_CSX_ALPHA_3 -395 0x0800 //TX_MU_ARSP_EST -396 0x00C8 //TX_P_OUTBEAM_MIN_TH +391 0x7FFF //TX_POST_MASK_SUP_HSNE +392 0x1388 //TX_TAIL_DET_TH +393 0x4000 //TX_B_LESSCUT_RTO_WTA +394 0x0000 //TX_MEL_G_R +395 0x0080 //TX_SUPHIGH_TH +396 0x0000 //TX_MASK_G_R 397 0x0002 //TX_EXTRA_NS_L -398 0x0800 //TX_EXTRA_NS_A -399 0x0005 //TX_VR_NOISE_FLOOR_TH +398 0x1800 //TX_C_POST_FLT_MASK +399 0x7FFF //TX_A_POST_FLT_WNS 400 0x0148 //TX_MIN_G_LOW300HZ 401 0x0002 //TX_MAXLEVEL_CNG 402 0x00B4 //TX_STN_NOISE_TH 403 0x4000 //TX_POST_MASK_SUP 404 0x7FFF //TX_POST_MASK_ADJUST 405 0x00C8 //TX_NS_ENOISE_MIC0_TH -406 0x0014 //TX_MINENOISE_MIC0_TH +406 0x02F3 //TX_MINENOISE_MIC0_TH 407 0x012C //TX_MINENOISE_MIC0_S_TH 408 0x2900 //TX_MIN_G_CTRL_SSNS 409 0x0800 //TX_METAL_RTO_THR @@ -32094,16 +48582,16 @@ 511 0x6666 //TX_MIC_TO_BFGAIN 512 0x0000 //TX_MICTOBFGAIN0 513 0x0000 //TX_FASTMUE_TH -514 0x0000 //TX_DERVB_LEN_0 -515 0x0000 //TX_DERVB_LEN_1 -516 0x0000 //TX_RHO_DERVB -517 0x0000 //TX_MIC_INDX_DERVB -518 0x0000 //TX_MU_DERVB -519 0x0000 //TX_DR_RESRV_0 -520 0x0000 //TX_DR_RESRV_1 -521 0x0000 //TX_DR_RESRV_2 -522 0x0000 //TX_DR_RESRV_3 -523 0x0000 //TX_DR_RESRV_4 +514 0xC000 //TX_DEREVERB_LF_MU +515 0xC000 //TX_DEREVERB_HF_MU +516 0xCCCC //TX_DEREVERB_DELAY +517 0xD999 //TX_DEREVERB_COEF_LEN +518 0x1F40 //TX_DEREVERB_DNR +519 0x0000 //TX_DEREVERB_ALPHA +520 0x0000 //TX_DEREVERB_BETA +521 0x0000 //TX_GSC_RTOL_TH +522 0x7000 //TX_GSC_RTOH_TH +523 0x0064 //TX_WIDE2_MEANHTH 524 0x0000 //TX_DR_RESRV_5 525 0x0000 //TX_DR_RESRV_6 526 0x0000 //TX_DR_RESRV_7 @@ -32469,16 +48957,81 @@ 886 0x0CCD //TX_FASTNS_TFMASKBIN_TH2 887 0x0CCD //TX_FASTNS_TFMASKBIN_TH3 888 0x0028 //TX_FASTNS_ARSPC_TH -889 0xC000 //TX_FASTNS_MASK5_TH +889 0x8000 //TX_FASTNS_MASK5_TH 890 0x4848 //TX_POSTSSA_MIN_G_VR_MASK -891 0x1000 //TX_A_LESSCUT_RTO_MASK +891 0x4000 //TX_A_LESSCUT_RTO_MASK 892 0x1770 //TX_FASTNS_NOISETH 893 0xC000 //TX_FASTNS_SSA_THLFL 894 0xC000 //TX_FASTNS_SSA_THHFL 895 0xCCCC //TX_FASTNS_SSA_THLFH 896 0xD999 //TX_FASTNS_SSA_THHFH +897 0x2339 //TX_SENDFUNC_REG_MICMUTE +898 0x0021 //TX_SENDFUNC_REG_MICMUTE1 +899 0x02BC //TX_MICMUTE_RATIO_THR +900 0x0140 //TX_MICMUTE_AMP_THR +901 0x0004 //TX_MICMUTE_HPF_IND +902 0x00C0 //TX_MICMUTE_LOG_EYR_TH +903 0x0008 //TX_MICMUTE_CVG_TIME +904 0x0008 //TX_MICMUTE_RELEASE_TIME +905 0x01FE //TX_MIC_VOLUME_MIC0MUTE +906 0x0020 //TX_MICMUTE_EPD_OFFSET_0 +907 0x001E //TX_MICMUTE_FRQ_AEC_L +908 0x7999 //TX_MICMUTE_EAD_THR +909 0x7FFF //TX_MICMUTE_LAMBDA_CB_NLE +910 0x7FFF //TX_MICMUTE_LAMBDA_RE_EST +911 0x4000 //TX_DTD_THR1_MICMUTE_0 +912 0x7000 //TX_DTD_THR1_MICMUTE_1 +913 0x7FFF //TX_DTD_THR1_MICMUTE_2 +914 0x7FFF //TX_DTD_THR1_MICMUTE_3 +915 0x6CCC //TX_DTD_THR2_MICMUTE_0 +916 0x0400 //TX_MICMUTE_MIN_EQ_RE_EST_0 +917 0x0400 //TX_MICMUTE_MIN_EQ_RE_EST_1 +918 0x1000 //TX_MICMUTE_MIN_EQ_RE_EST_2 +919 0x7FFF //TX_MICMUTE_MIN_EQ_RE_EST_3 +920 0x7FFF //TX_MICMUTE_MIN_EQ_RE_EST_4 +921 0x4000 //TX_MICMUTE_C_POST_FLT +922 0x03E8 //TX_MICMUTE_DT_CUT_K +923 0x0001 //TX_MICMUTE_DT_CUT_THR +924 0x03E8 //TX_MICMUTE_DT_CUT_K2 +925 0x0001 //TX_MICMUTE_DT_CUT_THR2 +926 0x0064 //TX_MICMUTE_DT2_HOLD_N +927 0x1000 //TX_MICMUTE_RATIODTH_THCUT +928 0x1000 //TX_MICMUTE_B_POST_FLT_ECHOL +929 0x7FFF //TX_MICMUTE_B_POST_FLT_ECHOH +930 0x0400 //TX_MICMUTE_C_POST_FLT_MASK +931 0x7999 //TX_MICMUTE_RATIODTL_CUT_TH +932 0x0258 //TX_MICMUTE_DT_CUT_K1 +933 0x0800 //TX_MICMUTE_N2_SN_EST +934 0xFC00 //TX_MICMUTE_THR_SN_EST_0 +935 0x001C //TX_MICMUTE_MIN_G_CTRL_0 +936 0x6000 //TX_MICMUTE_A_POST_FILT_S_0 +937 0x7000 //TX_MICMUTE_B_POST_FILT_0 +938 0x2710 //TX_MIC1RUB_AMP_THR +939 0x0010 //TX_MIC1MUTE_RATIO_THR +940 0x0450 //TX_MIC1MUTE_AMP_THR +941 0x0008 //TX_MIC1MUTE_CVG_TIME +942 0x0008 //TX_MIC1MUTE_RELEASE_TIME +943 0x0000 //TX_AMS_RESRV_01 +944 0x0000 //TX_AMS_RESRV_02 +945 0x0000 //TX_AMS_RESRV_03 +946 0x0000 //TX_AMS_RESRV_04 +947 0x0000 //TX_AMS_RESRV_05 +948 0x0000 //TX_AMS_RESRV_06 +949 0x0000 //TX_AMS_RESRV_07 +950 0x0000 //TX_AMS_RESRV_08 +951 0x0000 //TX_AMS_RESRV_09 +952 0x0000 //TX_AMS_RESRV_10 +953 0x0000 //TX_AMS_RESRV_11 +954 0x0000 //TX_AMS_RESRV_12 +955 0x0000 //TX_AMS_RESRV_13 +956 0x0000 //TX_AMS_RESRV_14 +957 0x0000 //TX_AMS_RESRV_15 +958 0x0000 //TX_AMS_RESRV_16 +959 0x0000 //TX_AMS_RESRV_17 +960 0x0000 //TX_AMS_RESRV_18 +961 0x0000 //TX_AMS_RESRV_19 #RX -0 0x0024 //RX_RECVFUNC_MODE_0 +0 0x2024 //RX_RECVFUNC_MODE_0 1 0x0000 //RX_RECVFUNC_MODE_1 2 0x0003 //RX_SAMPLINGFREQ_SIG 3 0x0003 //RX_SAMPLINGFREQ_PROC @@ -33328,11 +49881,862 @@ 110 0x0000 //RX_FDDRC_RESRV_0 129 0x0100 //RX_SPK_VOL 130 0x0000 //RX_VOL_RESRV_0 +#RX 2 +157 0x2024 //RX_RECVFUNC_MODE_0 +158 0x0000 //RX_RECVFUNC_MODE_1 +159 0x0003 //RX_SAMPLINGFREQ_SIG +160 0x0003 //RX_SAMPLINGFREQ_PROC +161 0x000A //RX_FRAME_SZ +162 0x0000 //RX_DELAY_OPT +163 0x5000 //RX_TDDRC_ALPHA_UP_1 +164 0x5000 //RX_TDDRC_ALPHA_UP_2 +165 0x5000 //RX_TDDRC_ALPHA_UP_3 +166 0x2000 //RX_TDDRC_ALPHA_UP_4 +167 0x0800 //RX_PGA +168 0x7FFF //RX_A_HP +169 0x0000 //RX_B_PE +170 0x1800 //RX_THR_PITCH_DET_0 +171 0x1000 //RX_THR_PITCH_DET_1 +172 0x0800 //RX_THR_PITCH_DET_2 +173 0x0008 //RX_PITCH_BFR_LEN +174 0x0003 //RX_SBD_PITCH_DET +175 0x0100 //RX_PP_RESRV_0 +176 0x0020 //RX_PP_RESRV_1 +177 0x0400 //RX_N_SN_EST +178 0x000C //RX_N2_SN_EST +179 0x0003 //RX_NS_LVL_CTRL +180 0x9000 //RX_THR_SN_EST +181 0x7CCD //RX_LAMBDA_PFILT +182 0x000A //RX_FENS_RESRV_0 +183 0x0190 //RX_FENS_RESRV_1 +184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +187 0x0002 //RX_EXTRA_NS_L +188 0x0800 //RX_EXTRA_NS_A +189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +190 0x65AD //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +192 0x199A //RX_A_POST_FLT +193 0x0000 //RX_LMT_THRD +194 0x4000 //RX_LMT_ALPHA +195 0x0020 //RX_FDEQ_SUBNUM +196 0x4848 //RX_FDEQ_GAIN_0 +197 0x4848 //RX_FDEQ_GAIN_1 +198 0x4848 //RX_FDEQ_GAIN_2 +199 0x4848 //RX_FDEQ_GAIN_3 +200 0x4848 //RX_FDEQ_GAIN_4 +201 0x4848 //RX_FDEQ_GAIN_5 +202 0x4848 //RX_FDEQ_GAIN_6 +203 0x4848 //RX_FDEQ_GAIN_7 +204 0x4848 //RX_FDEQ_GAIN_8 +205 0x4848 //RX_FDEQ_GAIN_9 +206 0x4848 //RX_FDEQ_GAIN_10 +207 0x4848 //RX_FDEQ_GAIN_11 +208 0x4848 //RX_FDEQ_GAIN_12 +209 0x4848 //RX_FDEQ_GAIN_13 +210 0x4848 //RX_FDEQ_GAIN_14 +211 0x4848 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0202 //RX_FDEQ_BIN_0 +221 0x0203 //RX_FDEQ_BIN_1 +222 0x0303 //RX_FDEQ_BIN_2 +223 0x0304 //RX_FDEQ_BIN_3 +224 0x0405 //RX_FDEQ_BIN_4 +225 0x0506 //RX_FDEQ_BIN_5 +226 0x0708 //RX_FDEQ_BIN_6 +227 0x090A //RX_FDEQ_BIN_7 +228 0x0B0C //RX_FDEQ_BIN_8 +229 0x0D0E //RX_FDEQ_BIN_9 +230 0x1013 //RX_FDEQ_BIN_10 +231 0x1719 //RX_FDEQ_BIN_11 +232 0x1B1E //RX_FDEQ_BIN_12 +233 0x1E1E //RX_FDEQ_BIN_13 +234 0x1E28 //RX_FDEQ_BIN_14 +235 0x282C //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x4000 //RX_FDEQ_RESRV_0 +245 0x0320 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0030 //RX_FDDRC_BAND_MARGIN_1 +248 0x0050 //RX_FDDRC_BAND_MARGIN_2 +249 0x0080 //RX_FDDRC_BAND_MARGIN_3 +250 0x0007 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x5000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x6400 //RX_FDDRC_THRD_3_2 +258 0x6400 //RX_FDDRC_THRD_3_3 +259 0x2000 //RX_FDDRC_SLANT_0_0 +260 0x2000 //RX_FDDRC_SLANT_0_1 +261 0x2000 //RX_FDDRC_SLANT_0_2 +262 0x2000 //RX_FDDRC_SLANT_0_3 +263 0x5333 //RX_FDDRC_SLANT_1_0 +264 0x5333 //RX_FDDRC_SLANT_1_1 +265 0x5333 //RX_FDDRC_SLANT_1_2 +266 0x5333 //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +268 0x0002 //RX_FILTINDX +269 0x0000 //RX_TDDRC_THRD_0 +270 0x0000 //RX_TDDRC_THRD_1 +271 0x1A00 //RX_TDDRC_THRD_2 +272 0x1A00 //RX_TDDRC_THRD_3 +273 0x3000 //RX_TDDRC_SLANT_0 +274 0x7EB8 //RX_TDDRC_SLANT_1 +275 0x5000 //RX_TDDRC_ALPHA_UP_0 +276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x199A //RX_TDDRC_HMNC_GAIN +279 0x0001 //RX_TDDRC_SMT_FLAG +280 0x0CCD //RX_TDDRC_SMT_W +281 0x01C8 //RX_TDDRC_DRC_GAIN +282 0x7C00 //RX_LAMBDA_PKA_FP +283 0x2000 //RX_TPKA_FP +284 0x2000 //RX_MIN_G_FP +285 0x0080 //RX_MAX_G_FP +286 0x000C //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 +288 0x0000 //RX_MAXLEVEL_CNG +289 0x3000 //RX_BWE_UV_TH +290 0x3000 //RX_BWE_UV_TH2 +291 0x1800 //RX_BWE_UV_TH3 +292 0x1000 //RX_BWE_V_TH +293 0x04CD //RX_BWE_GAIN1_V_TH1 +294 0x0F33 //RX_BWE_GAIN1_V_TH2 +295 0x7333 //RX_BWE_UV_EQ +296 0x199A //RX_BWE_V_EQ +297 0x7333 //RX_BWE_TONE_TH +298 0x0004 //RX_BWE_UV_HOLD_T +299 0x6CCD //RX_BWE_GAIN2_ALPHA +300 0x799A //RX_BWE_GAIN3_ALPHA +301 0x001E //RX_BWE_CUTOFF +302 0x3000 //RX_BWE_GAINFILL +303 0x3200 //RX_BWE_MAXTH_TONE +304 0x2000 //RX_BWE_EQ_0 +305 0x2000 //RX_BWE_EQ_1 +306 0x2000 //RX_BWE_EQ_2 +307 0x2000 //RX_BWE_EQ_3 +308 0x2000 //RX_BWE_EQ_4 +309 0x2000 //RX_BWE_EQ_5 +310 0x2000 //RX_BWE_EQ_6 +311 0x0000 //RX_BWE_RESRV_0 +312 0x0000 //RX_BWE_RESRV_1 +313 0x0000 //RX_BWE_RESRV_2 +#VOL 0 +163 0x5000 //RX_TDDRC_ALPHA_UP_1 +164 0x5000 //RX_TDDRC_ALPHA_UP_2 +165 0x5000 //RX_TDDRC_ALPHA_UP_3 +166 0x2000 //RX_TDDRC_ALPHA_UP_4 +184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +190 0x65AD //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +269 0x0000 //RX_TDDRC_THRD_0 +270 0x0000 //RX_TDDRC_THRD_1 +271 0x1A00 //RX_TDDRC_THRD_2 +272 0x1A00 //RX_TDDRC_THRD_3 +273 0x3000 //RX_TDDRC_SLANT_0 +274 0x7EB8 //RX_TDDRC_SLANT_1 +275 0x5000 //RX_TDDRC_ALPHA_UP_0 +276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x199A //RX_TDDRC_HMNC_GAIN +279 0x0001 //RX_TDDRC_SMT_FLAG +280 0x0CCD //RX_TDDRC_SMT_W +281 0x01C8 //RX_TDDRC_DRC_GAIN +195 0x0020 //RX_FDEQ_SUBNUM +196 0x4848 //RX_FDEQ_GAIN_0 +197 0x4848 //RX_FDEQ_GAIN_1 +198 0x4848 //RX_FDEQ_GAIN_2 +199 0x4848 //RX_FDEQ_GAIN_3 +200 0x4848 //RX_FDEQ_GAIN_4 +201 0x4848 //RX_FDEQ_GAIN_5 +202 0x4848 //RX_FDEQ_GAIN_6 +203 0x4848 //RX_FDEQ_GAIN_7 +204 0x4848 //RX_FDEQ_GAIN_8 +205 0x4848 //RX_FDEQ_GAIN_9 +206 0x4848 //RX_FDEQ_GAIN_10 +207 0x4848 //RX_FDEQ_GAIN_11 +208 0x4848 //RX_FDEQ_GAIN_12 +209 0x4848 //RX_FDEQ_GAIN_13 +210 0x4848 //RX_FDEQ_GAIN_14 +211 0x4848 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0202 //RX_FDEQ_BIN_0 +221 0x0203 //RX_FDEQ_BIN_1 +222 0x0303 //RX_FDEQ_BIN_2 +223 0x0304 //RX_FDEQ_BIN_3 +224 0x0405 //RX_FDEQ_BIN_4 +225 0x0506 //RX_FDEQ_BIN_5 +226 0x0708 //RX_FDEQ_BIN_6 +227 0x090A //RX_FDEQ_BIN_7 +228 0x0B0C //RX_FDEQ_BIN_8 +229 0x0D0E //RX_FDEQ_BIN_9 +230 0x1013 //RX_FDEQ_BIN_10 +231 0x1719 //RX_FDEQ_BIN_11 +232 0x1B1E //RX_FDEQ_BIN_12 +233 0x1E1E //RX_FDEQ_BIN_13 +234 0x1E28 //RX_FDEQ_BIN_14 +235 0x282C //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x4000 //RX_FDEQ_RESRV_0 +245 0x0320 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0030 //RX_FDDRC_BAND_MARGIN_1 +248 0x0050 //RX_FDDRC_BAND_MARGIN_2 +249 0x0080 //RX_FDDRC_BAND_MARGIN_3 +250 0x0007 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x5000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x6400 //RX_FDDRC_THRD_3_2 +258 0x6400 //RX_FDDRC_THRD_3_3 +259 0x2000 //RX_FDDRC_SLANT_0_0 +260 0x2000 //RX_FDDRC_SLANT_0_1 +261 0x2000 //RX_FDDRC_SLANT_0_2 +262 0x2000 //RX_FDDRC_SLANT_0_3 +263 0x5333 //RX_FDDRC_SLANT_1_0 +264 0x5333 //RX_FDDRC_SLANT_1_1 +265 0x5333 //RX_FDDRC_SLANT_1_2 +266 0x5333 //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +286 0x000C //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 +#VOL 1 +163 0x5000 //RX_TDDRC_ALPHA_UP_1 +164 0x5000 //RX_TDDRC_ALPHA_UP_2 +165 0x5000 //RX_TDDRC_ALPHA_UP_3 +166 0x2000 //RX_TDDRC_ALPHA_UP_4 +184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +190 0x65AD //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +269 0x0000 //RX_TDDRC_THRD_0 +270 0x0000 //RX_TDDRC_THRD_1 +271 0x1A00 //RX_TDDRC_THRD_2 +272 0x1A00 //RX_TDDRC_THRD_3 +273 0x3000 //RX_TDDRC_SLANT_0 +274 0x7EB8 //RX_TDDRC_SLANT_1 +275 0x5000 //RX_TDDRC_ALPHA_UP_0 +276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x199A //RX_TDDRC_HMNC_GAIN +279 0x0001 //RX_TDDRC_SMT_FLAG +280 0x0CCD //RX_TDDRC_SMT_W +281 0x01C8 //RX_TDDRC_DRC_GAIN +195 0x0020 //RX_FDEQ_SUBNUM +196 0x4848 //RX_FDEQ_GAIN_0 +197 0x4848 //RX_FDEQ_GAIN_1 +198 0x4848 //RX_FDEQ_GAIN_2 +199 0x4848 //RX_FDEQ_GAIN_3 +200 0x4848 //RX_FDEQ_GAIN_4 +201 0x4848 //RX_FDEQ_GAIN_5 +202 0x4848 //RX_FDEQ_GAIN_6 +203 0x4848 //RX_FDEQ_GAIN_7 +204 0x4848 //RX_FDEQ_GAIN_8 +205 0x4848 //RX_FDEQ_GAIN_9 +206 0x4848 //RX_FDEQ_GAIN_10 +207 0x4848 //RX_FDEQ_GAIN_11 +208 0x4848 //RX_FDEQ_GAIN_12 +209 0x4848 //RX_FDEQ_GAIN_13 +210 0x4848 //RX_FDEQ_GAIN_14 +211 0x4848 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0202 //RX_FDEQ_BIN_0 +221 0x0203 //RX_FDEQ_BIN_1 +222 0x0303 //RX_FDEQ_BIN_2 +223 0x0304 //RX_FDEQ_BIN_3 +224 0x0405 //RX_FDEQ_BIN_4 +225 0x0506 //RX_FDEQ_BIN_5 +226 0x0708 //RX_FDEQ_BIN_6 +227 0x090A //RX_FDEQ_BIN_7 +228 0x0B0C //RX_FDEQ_BIN_8 +229 0x0D0E //RX_FDEQ_BIN_9 +230 0x1013 //RX_FDEQ_BIN_10 +231 0x1719 //RX_FDEQ_BIN_11 +232 0x1B1E //RX_FDEQ_BIN_12 +233 0x1E1E //RX_FDEQ_BIN_13 +234 0x1E28 //RX_FDEQ_BIN_14 +235 0x282C //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x4000 //RX_FDEQ_RESRV_0 +245 0x0320 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0030 //RX_FDDRC_BAND_MARGIN_1 +248 0x0050 //RX_FDDRC_BAND_MARGIN_2 +249 0x0080 //RX_FDDRC_BAND_MARGIN_3 +250 0x0007 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x5000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x6400 //RX_FDDRC_THRD_3_2 +258 0x6400 //RX_FDDRC_THRD_3_3 +259 0x2000 //RX_FDDRC_SLANT_0_0 +260 0x2000 //RX_FDDRC_SLANT_0_1 +261 0x2000 //RX_FDDRC_SLANT_0_2 +262 0x2000 //RX_FDDRC_SLANT_0_3 +263 0x5333 //RX_FDDRC_SLANT_1_0 +264 0x5333 //RX_FDDRC_SLANT_1_1 +265 0x5333 //RX_FDDRC_SLANT_1_2 +266 0x5333 //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +286 0x0014 //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 +#VOL 2 +163 0x5000 //RX_TDDRC_ALPHA_UP_1 +164 0x5000 //RX_TDDRC_ALPHA_UP_2 +165 0x5000 //RX_TDDRC_ALPHA_UP_3 +166 0x2000 //RX_TDDRC_ALPHA_UP_4 +184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +190 0x65AD //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +269 0x0000 //RX_TDDRC_THRD_0 +270 0x0000 //RX_TDDRC_THRD_1 +271 0x1A00 //RX_TDDRC_THRD_2 +272 0x1A00 //RX_TDDRC_THRD_3 +273 0x3000 //RX_TDDRC_SLANT_0 +274 0x7EB8 //RX_TDDRC_SLANT_1 +275 0x5000 //RX_TDDRC_ALPHA_UP_0 +276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x199A //RX_TDDRC_HMNC_GAIN +279 0x0001 //RX_TDDRC_SMT_FLAG +280 0x0CCD //RX_TDDRC_SMT_W +281 0x01C8 //RX_TDDRC_DRC_GAIN +195 0x0020 //RX_FDEQ_SUBNUM +196 0x4848 //RX_FDEQ_GAIN_0 +197 0x4848 //RX_FDEQ_GAIN_1 +198 0x4848 //RX_FDEQ_GAIN_2 +199 0x4848 //RX_FDEQ_GAIN_3 +200 0x4848 //RX_FDEQ_GAIN_4 +201 0x4848 //RX_FDEQ_GAIN_5 +202 0x4848 //RX_FDEQ_GAIN_6 +203 0x4848 //RX_FDEQ_GAIN_7 +204 0x4848 //RX_FDEQ_GAIN_8 +205 0x4848 //RX_FDEQ_GAIN_9 +206 0x4848 //RX_FDEQ_GAIN_10 +207 0x4848 //RX_FDEQ_GAIN_11 +208 0x4848 //RX_FDEQ_GAIN_12 +209 0x4848 //RX_FDEQ_GAIN_13 +210 0x4848 //RX_FDEQ_GAIN_14 +211 0x4848 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0202 //RX_FDEQ_BIN_0 +221 0x0203 //RX_FDEQ_BIN_1 +222 0x0303 //RX_FDEQ_BIN_2 +223 0x0304 //RX_FDEQ_BIN_3 +224 0x0405 //RX_FDEQ_BIN_4 +225 0x0506 //RX_FDEQ_BIN_5 +226 0x0708 //RX_FDEQ_BIN_6 +227 0x090A //RX_FDEQ_BIN_7 +228 0x0B0C //RX_FDEQ_BIN_8 +229 0x0D0E //RX_FDEQ_BIN_9 +230 0x1013 //RX_FDEQ_BIN_10 +231 0x1719 //RX_FDEQ_BIN_11 +232 0x1B1E //RX_FDEQ_BIN_12 +233 0x1E1E //RX_FDEQ_BIN_13 +234 0x1E28 //RX_FDEQ_BIN_14 +235 0x282C //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x4000 //RX_FDEQ_RESRV_0 +245 0x0320 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0030 //RX_FDDRC_BAND_MARGIN_1 +248 0x0050 //RX_FDDRC_BAND_MARGIN_2 +249 0x0080 //RX_FDDRC_BAND_MARGIN_3 +250 0x0007 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x5000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x6400 //RX_FDDRC_THRD_3_2 +258 0x6400 //RX_FDDRC_THRD_3_3 +259 0x2000 //RX_FDDRC_SLANT_0_0 +260 0x2000 //RX_FDDRC_SLANT_0_1 +261 0x2000 //RX_FDDRC_SLANT_0_2 +262 0x2000 //RX_FDDRC_SLANT_0_3 +263 0x5333 //RX_FDDRC_SLANT_1_0 +264 0x5333 //RX_FDDRC_SLANT_1_1 +265 0x5333 //RX_FDDRC_SLANT_1_2 +266 0x5333 //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +286 0x0021 //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 +#VOL 3 +163 0x5000 //RX_TDDRC_ALPHA_UP_1 +164 0x5000 //RX_TDDRC_ALPHA_UP_2 +165 0x5000 //RX_TDDRC_ALPHA_UP_3 +166 0x2000 //RX_TDDRC_ALPHA_UP_4 +184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +190 0x65AD //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +269 0x0000 //RX_TDDRC_THRD_0 +270 0x0000 //RX_TDDRC_THRD_1 +271 0x1A00 //RX_TDDRC_THRD_2 +272 0x1A00 //RX_TDDRC_THRD_3 +273 0x3000 //RX_TDDRC_SLANT_0 +274 0x7EB8 //RX_TDDRC_SLANT_1 +275 0x5000 //RX_TDDRC_ALPHA_UP_0 +276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x199A //RX_TDDRC_HMNC_GAIN +279 0x0001 //RX_TDDRC_SMT_FLAG +280 0x0CCD //RX_TDDRC_SMT_W +281 0x01C8 //RX_TDDRC_DRC_GAIN +195 0x0020 //RX_FDEQ_SUBNUM +196 0x4848 //RX_FDEQ_GAIN_0 +197 0x4848 //RX_FDEQ_GAIN_1 +198 0x4848 //RX_FDEQ_GAIN_2 +199 0x4848 //RX_FDEQ_GAIN_3 +200 0x4848 //RX_FDEQ_GAIN_4 +201 0x4848 //RX_FDEQ_GAIN_5 +202 0x4848 //RX_FDEQ_GAIN_6 +203 0x4848 //RX_FDEQ_GAIN_7 +204 0x4848 //RX_FDEQ_GAIN_8 +205 0x4848 //RX_FDEQ_GAIN_9 +206 0x4848 //RX_FDEQ_GAIN_10 +207 0x4848 //RX_FDEQ_GAIN_11 +208 0x4848 //RX_FDEQ_GAIN_12 +209 0x4848 //RX_FDEQ_GAIN_13 +210 0x4848 //RX_FDEQ_GAIN_14 +211 0x4848 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0202 //RX_FDEQ_BIN_0 +221 0x0203 //RX_FDEQ_BIN_1 +222 0x0303 //RX_FDEQ_BIN_2 +223 0x0304 //RX_FDEQ_BIN_3 +224 0x0405 //RX_FDEQ_BIN_4 +225 0x0506 //RX_FDEQ_BIN_5 +226 0x0708 //RX_FDEQ_BIN_6 +227 0x090A //RX_FDEQ_BIN_7 +228 0x0B0C //RX_FDEQ_BIN_8 +229 0x0D0E //RX_FDEQ_BIN_9 +230 0x1013 //RX_FDEQ_BIN_10 +231 0x1719 //RX_FDEQ_BIN_11 +232 0x1B1E //RX_FDEQ_BIN_12 +233 0x1E1E //RX_FDEQ_BIN_13 +234 0x1E28 //RX_FDEQ_BIN_14 +235 0x282C //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x4000 //RX_FDEQ_RESRV_0 +245 0x0320 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0030 //RX_FDDRC_BAND_MARGIN_1 +248 0x0050 //RX_FDDRC_BAND_MARGIN_2 +249 0x0080 //RX_FDDRC_BAND_MARGIN_3 +250 0x0007 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x5000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x6400 //RX_FDDRC_THRD_3_2 +258 0x6400 //RX_FDDRC_THRD_3_3 +259 0x2000 //RX_FDDRC_SLANT_0_0 +260 0x2000 //RX_FDDRC_SLANT_0_1 +261 0x2000 //RX_FDDRC_SLANT_0_2 +262 0x2000 //RX_FDDRC_SLANT_0_3 +263 0x5333 //RX_FDDRC_SLANT_1_0 +264 0x5333 //RX_FDDRC_SLANT_1_1 +265 0x5333 //RX_FDDRC_SLANT_1_2 +266 0x5333 //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +286 0x0037 //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 +#VOL 4 +163 0x5000 //RX_TDDRC_ALPHA_UP_1 +164 0x5000 //RX_TDDRC_ALPHA_UP_2 +165 0x5000 //RX_TDDRC_ALPHA_UP_3 +166 0x2000 //RX_TDDRC_ALPHA_UP_4 +184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +190 0x65AD //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +269 0x0000 //RX_TDDRC_THRD_0 +270 0x0000 //RX_TDDRC_THRD_1 +271 0x1A00 //RX_TDDRC_THRD_2 +272 0x1A00 //RX_TDDRC_THRD_3 +273 0x3000 //RX_TDDRC_SLANT_0 +274 0x7EB8 //RX_TDDRC_SLANT_1 +275 0x5000 //RX_TDDRC_ALPHA_UP_0 +276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x199A //RX_TDDRC_HMNC_GAIN +279 0x0001 //RX_TDDRC_SMT_FLAG +280 0x0CCD //RX_TDDRC_SMT_W +281 0x01C8 //RX_TDDRC_DRC_GAIN +195 0x0020 //RX_FDEQ_SUBNUM +196 0x4848 //RX_FDEQ_GAIN_0 +197 0x4848 //RX_FDEQ_GAIN_1 +198 0x4848 //RX_FDEQ_GAIN_2 +199 0x4848 //RX_FDEQ_GAIN_3 +200 0x4848 //RX_FDEQ_GAIN_4 +201 0x4848 //RX_FDEQ_GAIN_5 +202 0x4848 //RX_FDEQ_GAIN_6 +203 0x4848 //RX_FDEQ_GAIN_7 +204 0x4848 //RX_FDEQ_GAIN_8 +205 0x4848 //RX_FDEQ_GAIN_9 +206 0x4848 //RX_FDEQ_GAIN_10 +207 0x4848 //RX_FDEQ_GAIN_11 +208 0x4848 //RX_FDEQ_GAIN_12 +209 0x4848 //RX_FDEQ_GAIN_13 +210 0x4848 //RX_FDEQ_GAIN_14 +211 0x4848 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0202 //RX_FDEQ_BIN_0 +221 0x0203 //RX_FDEQ_BIN_1 +222 0x0303 //RX_FDEQ_BIN_2 +223 0x0304 //RX_FDEQ_BIN_3 +224 0x0405 //RX_FDEQ_BIN_4 +225 0x0506 //RX_FDEQ_BIN_5 +226 0x0708 //RX_FDEQ_BIN_6 +227 0x090A //RX_FDEQ_BIN_7 +228 0x0B0C //RX_FDEQ_BIN_8 +229 0x0D0E //RX_FDEQ_BIN_9 +230 0x1013 //RX_FDEQ_BIN_10 +231 0x1719 //RX_FDEQ_BIN_11 +232 0x1B1E //RX_FDEQ_BIN_12 +233 0x1E1E //RX_FDEQ_BIN_13 +234 0x1E28 //RX_FDEQ_BIN_14 +235 0x282C //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x4000 //RX_FDEQ_RESRV_0 +245 0x0320 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0030 //RX_FDDRC_BAND_MARGIN_1 +248 0x0050 //RX_FDDRC_BAND_MARGIN_2 +249 0x0080 //RX_FDDRC_BAND_MARGIN_3 +250 0x0007 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x5000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x6400 //RX_FDDRC_THRD_3_2 +258 0x6400 //RX_FDDRC_THRD_3_3 +259 0x2000 //RX_FDDRC_SLANT_0_0 +260 0x2000 //RX_FDDRC_SLANT_0_1 +261 0x2000 //RX_FDDRC_SLANT_0_2 +262 0x2000 //RX_FDDRC_SLANT_0_3 +263 0x5333 //RX_FDDRC_SLANT_1_0 +264 0x5333 //RX_FDDRC_SLANT_1_1 +265 0x5333 //RX_FDDRC_SLANT_1_2 +266 0x5333 //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +286 0x005B //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 +#VOL 5 +163 0x5000 //RX_TDDRC_ALPHA_UP_1 +164 0x5000 //RX_TDDRC_ALPHA_UP_2 +165 0x5000 //RX_TDDRC_ALPHA_UP_3 +166 0x2000 //RX_TDDRC_ALPHA_UP_4 +184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +190 0x65AD //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +269 0x0000 //RX_TDDRC_THRD_0 +270 0x0000 //RX_TDDRC_THRD_1 +271 0x1A00 //RX_TDDRC_THRD_2 +272 0x1A00 //RX_TDDRC_THRD_3 +273 0x3000 //RX_TDDRC_SLANT_0 +274 0x7EB8 //RX_TDDRC_SLANT_1 +275 0x5000 //RX_TDDRC_ALPHA_UP_0 +276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x199A //RX_TDDRC_HMNC_GAIN +279 0x0001 //RX_TDDRC_SMT_FLAG +280 0x0CCD //RX_TDDRC_SMT_W +281 0x01C8 //RX_TDDRC_DRC_GAIN +195 0x0020 //RX_FDEQ_SUBNUM +196 0x4848 //RX_FDEQ_GAIN_0 +197 0x4848 //RX_FDEQ_GAIN_1 +198 0x4848 //RX_FDEQ_GAIN_2 +199 0x4848 //RX_FDEQ_GAIN_3 +200 0x4848 //RX_FDEQ_GAIN_4 +201 0x4848 //RX_FDEQ_GAIN_5 +202 0x4848 //RX_FDEQ_GAIN_6 +203 0x4848 //RX_FDEQ_GAIN_7 +204 0x4848 //RX_FDEQ_GAIN_8 +205 0x4848 //RX_FDEQ_GAIN_9 +206 0x4848 //RX_FDEQ_GAIN_10 +207 0x4848 //RX_FDEQ_GAIN_11 +208 0x4848 //RX_FDEQ_GAIN_12 +209 0x4848 //RX_FDEQ_GAIN_13 +210 0x4848 //RX_FDEQ_GAIN_14 +211 0x4848 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0202 //RX_FDEQ_BIN_0 +221 0x0203 //RX_FDEQ_BIN_1 +222 0x0303 //RX_FDEQ_BIN_2 +223 0x0304 //RX_FDEQ_BIN_3 +224 0x0405 //RX_FDEQ_BIN_4 +225 0x0506 //RX_FDEQ_BIN_5 +226 0x0708 //RX_FDEQ_BIN_6 +227 0x090A //RX_FDEQ_BIN_7 +228 0x0B0C //RX_FDEQ_BIN_8 +229 0x0D0E //RX_FDEQ_BIN_9 +230 0x1013 //RX_FDEQ_BIN_10 +231 0x1719 //RX_FDEQ_BIN_11 +232 0x1B1E //RX_FDEQ_BIN_12 +233 0x1E1E //RX_FDEQ_BIN_13 +234 0x1E28 //RX_FDEQ_BIN_14 +235 0x282C //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x4000 //RX_FDEQ_RESRV_0 +245 0x0320 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0030 //RX_FDDRC_BAND_MARGIN_1 +248 0x0050 //RX_FDDRC_BAND_MARGIN_2 +249 0x0080 //RX_FDDRC_BAND_MARGIN_3 +250 0x0007 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x5000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x6400 //RX_FDDRC_THRD_3_2 +258 0x6400 //RX_FDDRC_THRD_3_3 +259 0x2000 //RX_FDDRC_SLANT_0_0 +260 0x2000 //RX_FDDRC_SLANT_0_1 +261 0x2000 //RX_FDDRC_SLANT_0_2 +262 0x2000 //RX_FDDRC_SLANT_0_3 +263 0x5333 //RX_FDDRC_SLANT_1_0 +264 0x5333 //RX_FDDRC_SLANT_1_1 +265 0x5333 //RX_FDDRC_SLANT_1_2 +266 0x5333 //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +286 0x0099 //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 +#VOL 6 +163 0x5000 //RX_TDDRC_ALPHA_UP_1 +164 0x5000 //RX_TDDRC_ALPHA_UP_2 +165 0x5000 //RX_TDDRC_ALPHA_UP_3 +166 0x2000 //RX_TDDRC_ALPHA_UP_4 +184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +190 0x65AD //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +269 0x0000 //RX_TDDRC_THRD_0 +270 0x0000 //RX_TDDRC_THRD_1 +271 0x1A00 //RX_TDDRC_THRD_2 +272 0x1A00 //RX_TDDRC_THRD_3 +273 0x3000 //RX_TDDRC_SLANT_0 +274 0x7EB8 //RX_TDDRC_SLANT_1 +275 0x5000 //RX_TDDRC_ALPHA_UP_0 +276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x199A //RX_TDDRC_HMNC_GAIN +279 0x0001 //RX_TDDRC_SMT_FLAG +280 0x0CCD //RX_TDDRC_SMT_W +281 0x01C8 //RX_TDDRC_DRC_GAIN +195 0x0020 //RX_FDEQ_SUBNUM +196 0x4848 //RX_FDEQ_GAIN_0 +197 0x4848 //RX_FDEQ_GAIN_1 +198 0x4848 //RX_FDEQ_GAIN_2 +199 0x4848 //RX_FDEQ_GAIN_3 +200 0x4848 //RX_FDEQ_GAIN_4 +201 0x4848 //RX_FDEQ_GAIN_5 +202 0x4848 //RX_FDEQ_GAIN_6 +203 0x4848 //RX_FDEQ_GAIN_7 +204 0x4848 //RX_FDEQ_GAIN_8 +205 0x4848 //RX_FDEQ_GAIN_9 +206 0x4848 //RX_FDEQ_GAIN_10 +207 0x4848 //RX_FDEQ_GAIN_11 +208 0x4848 //RX_FDEQ_GAIN_12 +209 0x4848 //RX_FDEQ_GAIN_13 +210 0x4848 //RX_FDEQ_GAIN_14 +211 0x4848 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0202 //RX_FDEQ_BIN_0 +221 0x0203 //RX_FDEQ_BIN_1 +222 0x0303 //RX_FDEQ_BIN_2 +223 0x0304 //RX_FDEQ_BIN_3 +224 0x0405 //RX_FDEQ_BIN_4 +225 0x0506 //RX_FDEQ_BIN_5 +226 0x0708 //RX_FDEQ_BIN_6 +227 0x090A //RX_FDEQ_BIN_7 +228 0x0B0C //RX_FDEQ_BIN_8 +229 0x0D0E //RX_FDEQ_BIN_9 +230 0x1013 //RX_FDEQ_BIN_10 +231 0x1719 //RX_FDEQ_BIN_11 +232 0x1B1E //RX_FDEQ_BIN_12 +233 0x1E1E //RX_FDEQ_BIN_13 +234 0x1E28 //RX_FDEQ_BIN_14 +235 0x282C //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x4000 //RX_FDEQ_RESRV_0 +245 0x0320 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0030 //RX_FDDRC_BAND_MARGIN_1 +248 0x0050 //RX_FDDRC_BAND_MARGIN_2 +249 0x0080 //RX_FDDRC_BAND_MARGIN_3 +250 0x0007 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x5000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x6400 //RX_FDDRC_THRD_3_2 +258 0x6400 //RX_FDDRC_THRD_3_3 +259 0x2000 //RX_FDDRC_SLANT_0_0 +260 0x2000 //RX_FDDRC_SLANT_0_1 +261 0x2000 //RX_FDDRC_SLANT_0_2 +262 0x2000 //RX_FDDRC_SLANT_0_3 +263 0x5333 //RX_FDDRC_SLANT_1_0 +264 0x5333 //RX_FDDRC_SLANT_1_1 +265 0x5333 //RX_FDDRC_SLANT_1_2 +266 0x5333 //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +286 0x0100 //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 #CASE_NAME HEADSET-GOOGLE_CONDOR_CERTIFICATION1-VOICE_GENERIC-FB -#PARAM_MODE FULL -#PARAM_TYPE TX+RX -#TOTAL_CUSTOM_STEP 7 +#PARAM_MODE Full +#PARAM_TYPE TX+2RX +#TOTAL_CUSTOM_STEP 7+7 #TX 0 0x0009 //TX_OPERATION_MODE_0 1 0x0009 //TX_OPERATION_MODE_1 @@ -33585,10 +50989,10 @@ 248 0xF600 //TX_THR_SN_EST_6 249 0xF600 //TX_THR_SN_EST_7 250 0x0200 //TX_DELTA_THR_SN_EST_0 -251 0x0200 //TX_DELTA_THR_SN_EST_1 -252 0x0400 //TX_DELTA_THR_SN_EST_2 -253 0x0300 //TX_DELTA_THR_SN_EST_3 -254 0x0600 //TX_DELTA_THR_SN_EST_4 +251 0x0400 //TX_DELTA_THR_SN_EST_1 +252 0x0300 //TX_DELTA_THR_SN_EST_2 +253 0x0600 //TX_DELTA_THR_SN_EST_3 +254 0x0200 //TX_DELTA_THR_SN_EST_4 255 0x0200 //TX_DELTA_THR_SN_EST_5 256 0x0200 //TX_DELTA_THR_SN_EST_6 257 0x0200 //TX_DELTA_THR_SN_EST_7 @@ -33616,31 +51020,31 @@ 279 0x2000 //TX_B_POST_FLT_0 280 0x2000 //TX_B_POST_FLT_1 281 0x0012 //TX_NS_LVL_CTRL_0 -282 0x0019 //TX_NS_LVL_CTRL_1 +282 0x0016 //TX_NS_LVL_CTRL_1 283 0x0016 //TX_NS_LVL_CTRL_2 -284 0x0016 //TX_NS_LVL_CTRL_3 -285 0x0019 //TX_NS_LVL_CTRL_4 +284 0x0019 //TX_NS_LVL_CTRL_3 +285 0x0010 //TX_NS_LVL_CTRL_4 286 0x0010 //TX_NS_LVL_CTRL_5 -287 0x0010 //TX_NS_LVL_CTRL_6 +287 0x0019 //TX_NS_LVL_CTRL_6 288 0x0010 //TX_NS_LVL_CTRL_7 289 0x000C //TX_MIN_GAIN_S_0 -290 0x0011 //TX_MIN_GAIN_S_1 +290 0x000C //TX_MIN_GAIN_S_1 291 0x000C //TX_MIN_GAIN_S_2 -292 0x000C //TX_MIN_GAIN_S_3 -293 0x000F //TX_MIN_GAIN_S_4 +292 0x000F //TX_MIN_GAIN_S_3 +293 0x000C //TX_MIN_GAIN_S_4 294 0x000C //TX_MIN_GAIN_S_5 -295 0x000C //TX_MIN_GAIN_S_6 +295 0x0011 //TX_MIN_GAIN_S_6 296 0x000C //TX_MIN_GAIN_S_7 297 0x7FFF //TX_NMOS_SUP 298 0x0000 //TX_NS_MAX_PRI_SNR_TH 299 0x0000 //TX_NMOS_SUP_MENSA 300 0x7000 //TX_SNRI_SUP_0 -301 0x6000 //TX_SNRI_SUP_1 +301 0x7000 //TX_SNRI_SUP_1 302 0x7000 //TX_SNRI_SUP_2 -303 0x7000 //TX_SNRI_SUP_3 -304 0x6000 //TX_SNRI_SUP_4 +303 0x6000 //TX_SNRI_SUP_3 +304 0x7FFF //TX_SNRI_SUP_4 305 0x7FFF //TX_SNRI_SUP_5 -306 0x7FFF //TX_SNRI_SUP_6 +306 0x6000 //TX_SNRI_SUP_6 307 0x7FFF //TX_SNRI_SUP_7 308 0x7FFF //TX_THR_LFNS 309 0x0016 //TX_G_LFNS @@ -33657,8 +51061,8 @@ 320 0x6000 //TX_A_POST_FILT_S_6 321 0x6000 //TX_A_POST_FILT_S_7 322 0x2000 //TX_B_POST_FILT_0 -323 0x2000 //TX_B_POST_FILT_1 -324 0x4000 //TX_B_POST_FILT_2 +323 0x4000 //TX_B_POST_FILT_1 +324 0x2000 //TX_B_POST_FILT_2 325 0x2000 //TX_B_POST_FILT_3 326 0x2000 //TX_B_POST_FILT_4 327 0x2000 //TX_B_POST_FILT_5 @@ -33701,7 +51105,7 @@ 364 0x0000 //TX_K_APT 365 0x0001 //TX_NOISEDET 366 0x0190 //TX_NDETCT -367 0x0020 //TX_NOISE_TH_0 +367 0x04E8 //TX_NOISE_TH_0 368 0x7FFF //TX_NOISE_TH_0_2 369 0x7FFF //TX_NOISE_TH_0_3 370 0x02A6 //TX_NOISE_TH_1 @@ -33713,11 +51117,11 @@ 376 0x0001 //TX_NOISE_TH_5_3 377 0x0000 //TX_NOISE_TH_5_4 378 0x02BC //TX_NOISE_TH_6 -379 0x0020 //TX_MINENOISE_TH -380 0x4000 //TX_MINENOISE_MIC0_TH_MTS -381 0xFFEE //TX_MINENOISE_MIC0_TH_EXP -382 0x6000 //TX_MINENOISE_MIC0_S_TH_MTS -383 0xFFF3 //TX_MINENOISE_MIC0_S_TH_EXP +379 0x02BC //TX_MINENOISE_TH +380 0xD508 //TX_MORENS_TFMASK_TH +381 0x0001 //TX_DRC_QUIET_FLOOR +382 0x3A98 //TX_RATIODTL_CUT_TH +383 0x1482 //TX_DT_CUT_K1 384 0x0666 //TX_OUT_ENER_S_TH_CLEAN 385 0x0666 //TX_OUT_ENER_S_TH_LESSCLEAN 386 0x0333 //TX_OUT_ENER_S_TH_NOISY @@ -33725,22 +51129,22 @@ 388 0x0333 //TX_OUT_ENER_TH_SPEECH 389 0x2000 //TX_SN_NPB_GAIN 390 0x0000 //TX_NN_NPB_GAIN -391 0x0000 //TX_CSX_ALPHA_0 -392 0x0000 //TX_CSX_ALPHA_1 -393 0x0000 //TX_CSX_ALPHA_2 -394 0x0000 //TX_CSX_ALPHA_3 -395 0x0800 //TX_MU_ARSP_EST -396 0x00C8 //TX_P_OUTBEAM_MIN_TH +391 0x7FFF //TX_POST_MASK_SUP_HSNE +392 0x1388 //TX_TAIL_DET_TH +393 0x4000 //TX_B_LESSCUT_RTO_WTA +394 0x0000 //TX_MEL_G_R +395 0x0080 //TX_SUPHIGH_TH +396 0x0000 //TX_MASK_G_R 397 0x0002 //TX_EXTRA_NS_L -398 0x0800 //TX_EXTRA_NS_A -399 0x0005 //TX_VR_NOISE_FLOOR_TH +398 0x1800 //TX_C_POST_FLT_MASK +399 0x7FFF //TX_A_POST_FLT_WNS 400 0x0148 //TX_MIN_G_LOW300HZ 401 0x0004 //TX_MAXLEVEL_CNG 402 0x00B4 //TX_STN_NOISE_TH 403 0x4000 //TX_POST_MASK_SUP 404 0x7FFF //TX_POST_MASK_ADJUST 405 0x00C8 //TX_NS_ENOISE_MIC0_TH -406 0x0020 //TX_MINENOISE_MIC0_TH +406 0x04E7 //TX_MINENOISE_MIC0_TH 407 0x012C //TX_MINENOISE_MIC0_S_TH 408 0x2900 //TX_MIN_G_CTRL_SSNS 409 0x0800 //TX_METAL_RTO_THR @@ -33848,16 +51252,16 @@ 511 0x6666 //TX_MIC_TO_BFGAIN 512 0x0000 //TX_MICTOBFGAIN0 513 0x0000 //TX_FASTMUE_TH -514 0x0000 //TX_DERVB_LEN_0 -515 0x0000 //TX_DERVB_LEN_1 -516 0x0000 //TX_RHO_DERVB -517 0x0000 //TX_MIC_INDX_DERVB -518 0x0000 //TX_MU_DERVB -519 0x0000 //TX_DR_RESRV_0 -520 0x0000 //TX_DR_RESRV_1 -521 0x0000 //TX_DR_RESRV_2 -522 0x0000 //TX_DR_RESRV_3 -523 0x0000 //TX_DR_RESRV_4 +514 0xC000 //TX_DEREVERB_LF_MU +515 0xC000 //TX_DEREVERB_HF_MU +516 0xCCCC //TX_DEREVERB_DELAY +517 0xD999 //TX_DEREVERB_COEF_LEN +518 0x1F40 //TX_DEREVERB_DNR +519 0x0000 //TX_DEREVERB_ALPHA +520 0x0000 //TX_DEREVERB_BETA +521 0x0000 //TX_GSC_RTOL_TH +522 0x7000 //TX_GSC_RTOH_TH +523 0x0064 //TX_WIDE2_MEANHTH 524 0x0000 //TX_DR_RESRV_5 525 0x0000 //TX_DR_RESRV_6 526 0x0000 //TX_DR_RESRV_7 @@ -34231,8 +51635,73 @@ 894 0xC000 //TX_FASTNS_SSA_THHFL 895 0xCCCC //TX_FASTNS_SSA_THLFH 896 0xD999 //TX_FASTNS_SSA_THHFH +897 0x2339 //TX_SENDFUNC_REG_MICMUTE +898 0x0021 //TX_SENDFUNC_REG_MICMUTE1 +899 0x02BC //TX_MICMUTE_RATIO_THR +900 0x0140 //TX_MICMUTE_AMP_THR +901 0x0004 //TX_MICMUTE_HPF_IND +902 0x00C0 //TX_MICMUTE_LOG_EYR_TH +903 0x0008 //TX_MICMUTE_CVG_TIME +904 0x0008 //TX_MICMUTE_RELEASE_TIME +905 0x01FE //TX_MIC_VOLUME_MIC0MUTE +906 0x0020 //TX_MICMUTE_EPD_OFFSET_0 +907 0x001E //TX_MICMUTE_FRQ_AEC_L +908 0x7999 //TX_MICMUTE_EAD_THR +909 0x7FFF //TX_MICMUTE_LAMBDA_CB_NLE +910 0x7FFF //TX_MICMUTE_LAMBDA_RE_EST +911 0x4000 //TX_DTD_THR1_MICMUTE_0 +912 0x7000 //TX_DTD_THR1_MICMUTE_1 +913 0x7FFF //TX_DTD_THR1_MICMUTE_2 +914 0x7FFF //TX_DTD_THR1_MICMUTE_3 +915 0x6CCC //TX_DTD_THR2_MICMUTE_0 +916 0x0400 //TX_MICMUTE_MIN_EQ_RE_EST_0 +917 0x0400 //TX_MICMUTE_MIN_EQ_RE_EST_1 +918 0x1000 //TX_MICMUTE_MIN_EQ_RE_EST_2 +919 0x7FFF //TX_MICMUTE_MIN_EQ_RE_EST_3 +920 0x7FFF //TX_MICMUTE_MIN_EQ_RE_EST_4 +921 0x4000 //TX_MICMUTE_C_POST_FLT +922 0x03E8 //TX_MICMUTE_DT_CUT_K +923 0x0001 //TX_MICMUTE_DT_CUT_THR +924 0x03E8 //TX_MICMUTE_DT_CUT_K2 +925 0x0001 //TX_MICMUTE_DT_CUT_THR2 +926 0x0064 //TX_MICMUTE_DT2_HOLD_N +927 0x1000 //TX_MICMUTE_RATIODTH_THCUT +928 0x1000 //TX_MICMUTE_B_POST_FLT_ECHOL +929 0x7FFF //TX_MICMUTE_B_POST_FLT_ECHOH +930 0x0400 //TX_MICMUTE_C_POST_FLT_MASK +931 0x7999 //TX_MICMUTE_RATIODTL_CUT_TH +932 0x0258 //TX_MICMUTE_DT_CUT_K1 +933 0x0800 //TX_MICMUTE_N2_SN_EST +934 0xFC00 //TX_MICMUTE_THR_SN_EST_0 +935 0x001C //TX_MICMUTE_MIN_G_CTRL_0 +936 0x6000 //TX_MICMUTE_A_POST_FILT_S_0 +937 0x7000 //TX_MICMUTE_B_POST_FILT_0 +938 0x2710 //TX_MIC1RUB_AMP_THR +939 0x0010 //TX_MIC1MUTE_RATIO_THR +940 0x0450 //TX_MIC1MUTE_AMP_THR +941 0x0008 //TX_MIC1MUTE_CVG_TIME +942 0x0008 //TX_MIC1MUTE_RELEASE_TIME +943 0x0000 //TX_AMS_RESRV_01 +944 0x0000 //TX_AMS_RESRV_02 +945 0x0000 //TX_AMS_RESRV_03 +946 0x0000 //TX_AMS_RESRV_04 +947 0x0000 //TX_AMS_RESRV_05 +948 0x0000 //TX_AMS_RESRV_06 +949 0x0000 //TX_AMS_RESRV_07 +950 0x0000 //TX_AMS_RESRV_08 +951 0x0000 //TX_AMS_RESRV_09 +952 0x0000 //TX_AMS_RESRV_10 +953 0x0000 //TX_AMS_RESRV_11 +954 0x0000 //TX_AMS_RESRV_12 +955 0x0000 //TX_AMS_RESRV_13 +956 0x0000 //TX_AMS_RESRV_14 +957 0x0000 //TX_AMS_RESRV_15 +958 0x0000 //TX_AMS_RESRV_16 +959 0x0000 //TX_AMS_RESRV_17 +960 0x0000 //TX_AMS_RESRV_18 +961 0x0000 //TX_AMS_RESRV_19 #RX -0 0x002C //RX_RECVFUNC_MODE_0 +0 0x202C //RX_RECVFUNC_MODE_0 1 0x0000 //RX_RECVFUNC_MODE_1 2 0x0004 //RX_SAMPLINGFREQ_SIG 3 0x0004 //RX_SAMPLINGFREQ_PROC @@ -35082,11 +52551,862 @@ 110 0x0000 //RX_FDDRC_RESRV_0 129 0x0100 //RX_SPK_VOL 130 0x0000 //RX_VOL_RESRV_0 +#RX 2 +157 0x202C //RX_RECVFUNC_MODE_0 +158 0x0000 //RX_RECVFUNC_MODE_1 +159 0x0004 //RX_SAMPLINGFREQ_SIG +160 0x0004 //RX_SAMPLINGFREQ_PROC +161 0x000A //RX_FRAME_SZ +162 0x0000 //RX_DELAY_OPT +163 0x1000 //RX_TDDRC_ALPHA_UP_1 +164 0x1000 //RX_TDDRC_ALPHA_UP_2 +165 0x1000 //RX_TDDRC_ALPHA_UP_3 +166 0x1000 //RX_TDDRC_ALPHA_UP_4 +167 0x0800 //RX_PGA +168 0x7B02 //RX_A_HP +169 0x4000 //RX_B_PE +170 0x7800 //RX_THR_PITCH_DET_0 +171 0x7000 //RX_THR_PITCH_DET_1 +172 0x6000 //RX_THR_PITCH_DET_2 +173 0x0008 //RX_PITCH_BFR_LEN +174 0x0003 //RX_SBD_PITCH_DET +175 0x0100 //RX_PP_RESRV_0 +176 0x0020 //RX_PP_RESRV_1 +177 0x0500 //RX_N_SN_EST +178 0x000C //RX_N2_SN_EST +179 0x000A //RX_NS_LVL_CTRL +180 0xF600 //RX_THR_SN_EST +181 0x7000 //RX_LAMBDA_PFILT +182 0x000A //RX_FENS_RESRV_0 +183 0x0190 //RX_FENS_RESRV_1 +184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +187 0x0002 //RX_EXTRA_NS_L +188 0x0800 //RX_EXTRA_NS_A +189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +190 0x7FFF //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +192 0x199A //RX_A_POST_FLT +193 0x0000 //RX_LMT_THRD +194 0x4000 //RX_LMT_ALPHA +195 0x0020 //RX_FDEQ_SUBNUM +196 0x4848 //RX_FDEQ_GAIN_0 +197 0x4848 //RX_FDEQ_GAIN_1 +198 0x4848 //RX_FDEQ_GAIN_2 +199 0x4848 //RX_FDEQ_GAIN_3 +200 0x4848 //RX_FDEQ_GAIN_4 +201 0x4848 //RX_FDEQ_GAIN_5 +202 0x4848 //RX_FDEQ_GAIN_6 +203 0x4848 //RX_FDEQ_GAIN_7 +204 0x4848 //RX_FDEQ_GAIN_8 +205 0x4848 //RX_FDEQ_GAIN_9 +206 0x4848 //RX_FDEQ_GAIN_10 +207 0x4848 //RX_FDEQ_GAIN_11 +208 0x4848 //RX_FDEQ_GAIN_12 +209 0x4848 //RX_FDEQ_GAIN_13 +210 0x4848 //RX_FDEQ_GAIN_14 +211 0x4848 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0202 //RX_FDEQ_BIN_0 +221 0x0203 //RX_FDEQ_BIN_1 +222 0x0304 //RX_FDEQ_BIN_2 +223 0x0405 //RX_FDEQ_BIN_3 +224 0x0607 //RX_FDEQ_BIN_4 +225 0x0809 //RX_FDEQ_BIN_5 +226 0x0A0B //RX_FDEQ_BIN_6 +227 0x0C0D //RX_FDEQ_BIN_7 +228 0x0E0F //RX_FDEQ_BIN_8 +229 0x1011 //RX_FDEQ_BIN_9 +230 0x1214 //RX_FDEQ_BIN_10 +231 0x1618 //RX_FDEQ_BIN_11 +232 0x1C1C //RX_FDEQ_BIN_12 +233 0x2020 //RX_FDEQ_BIN_13 +234 0x2020 //RX_FDEQ_BIN_14 +235 0x2011 //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x4000 //RX_FDEQ_RESRV_0 +245 0x0320 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0030 //RX_FDDRC_BAND_MARGIN_1 +248 0x0050 //RX_FDDRC_BAND_MARGIN_2 +249 0x0080 //RX_FDDRC_BAND_MARGIN_3 +250 0x0007 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x5000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x6400 //RX_FDDRC_THRD_3_2 +258 0x6400 //RX_FDDRC_THRD_3_3 +259 0x2000 //RX_FDDRC_SLANT_0_0 +260 0x2000 //RX_FDDRC_SLANT_0_1 +261 0x2000 //RX_FDDRC_SLANT_0_2 +262 0x2000 //RX_FDDRC_SLANT_0_3 +263 0x5333 //RX_FDDRC_SLANT_1_0 +264 0x5333 //RX_FDDRC_SLANT_1_1 +265 0x5333 //RX_FDDRC_SLANT_1_2 +266 0x5333 //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +268 0x0002 //RX_FILTINDX +269 0x0000 //RX_TDDRC_THRD_0 +270 0x0000 //RX_TDDRC_THRD_1 +271 0x1200 //RX_TDDRC_THRD_2 +272 0x1900 //RX_TDDRC_THRD_3 +273 0x3000 //RX_TDDRC_SLANT_0 +274 0x6E00 //RX_TDDRC_SLANT_1 +275 0x1000 //RX_TDDRC_ALPHA_UP_0 +276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x199A //RX_TDDRC_HMNC_GAIN +279 0x0001 //RX_TDDRC_SMT_FLAG +280 0x0CCD //RX_TDDRC_SMT_W +281 0x0240 //RX_TDDRC_DRC_GAIN +282 0x7C00 //RX_LAMBDA_PKA_FP +283 0x2000 //RX_TPKA_FP +284 0x2000 //RX_MIN_G_FP +285 0x0080 //RX_MAX_G_FP +286 0x000B //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 +288 0x0000 //RX_MAXLEVEL_CNG +289 0x3000 //RX_BWE_UV_TH +290 0x3000 //RX_BWE_UV_TH2 +291 0x1800 //RX_BWE_UV_TH3 +292 0x1000 //RX_BWE_V_TH +293 0x04CD //RX_BWE_GAIN1_V_TH1 +294 0x0F33 //RX_BWE_GAIN1_V_TH2 +295 0x7333 //RX_BWE_UV_EQ +296 0x199A //RX_BWE_V_EQ +297 0x7333 //RX_BWE_TONE_TH +298 0x0004 //RX_BWE_UV_HOLD_T +299 0x6CCD //RX_BWE_GAIN2_ALPHA +300 0x799A //RX_BWE_GAIN3_ALPHA +301 0x001E //RX_BWE_CUTOFF +302 0x3000 //RX_BWE_GAINFILL +303 0x3200 //RX_BWE_MAXTH_TONE +304 0x2000 //RX_BWE_EQ_0 +305 0x2000 //RX_BWE_EQ_1 +306 0x2000 //RX_BWE_EQ_2 +307 0x2000 //RX_BWE_EQ_3 +308 0x2000 //RX_BWE_EQ_4 +309 0x2000 //RX_BWE_EQ_5 +310 0x2000 //RX_BWE_EQ_6 +311 0x0000 //RX_BWE_RESRV_0 +312 0x0000 //RX_BWE_RESRV_1 +313 0x0000 //RX_BWE_RESRV_2 +#VOL 0 +163 0x1000 //RX_TDDRC_ALPHA_UP_1 +164 0x1000 //RX_TDDRC_ALPHA_UP_2 +165 0x1000 //RX_TDDRC_ALPHA_UP_3 +166 0x1000 //RX_TDDRC_ALPHA_UP_4 +184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +190 0x7FFF //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +269 0x0000 //RX_TDDRC_THRD_0 +270 0x0000 //RX_TDDRC_THRD_1 +271 0x1200 //RX_TDDRC_THRD_2 +272 0x1900 //RX_TDDRC_THRD_3 +273 0x3000 //RX_TDDRC_SLANT_0 +274 0x6E00 //RX_TDDRC_SLANT_1 +275 0x1000 //RX_TDDRC_ALPHA_UP_0 +276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x199A //RX_TDDRC_HMNC_GAIN +279 0x0001 //RX_TDDRC_SMT_FLAG +280 0x0CCD //RX_TDDRC_SMT_W +281 0x0240 //RX_TDDRC_DRC_GAIN +195 0x0020 //RX_FDEQ_SUBNUM +196 0x4848 //RX_FDEQ_GAIN_0 +197 0x4848 //RX_FDEQ_GAIN_1 +198 0x4848 //RX_FDEQ_GAIN_2 +199 0x4848 //RX_FDEQ_GAIN_3 +200 0x4848 //RX_FDEQ_GAIN_4 +201 0x4848 //RX_FDEQ_GAIN_5 +202 0x4848 //RX_FDEQ_GAIN_6 +203 0x4848 //RX_FDEQ_GAIN_7 +204 0x4848 //RX_FDEQ_GAIN_8 +205 0x4848 //RX_FDEQ_GAIN_9 +206 0x4848 //RX_FDEQ_GAIN_10 +207 0x4848 //RX_FDEQ_GAIN_11 +208 0x4848 //RX_FDEQ_GAIN_12 +209 0x4848 //RX_FDEQ_GAIN_13 +210 0x4848 //RX_FDEQ_GAIN_14 +211 0x4848 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0202 //RX_FDEQ_BIN_0 +221 0x0203 //RX_FDEQ_BIN_1 +222 0x0304 //RX_FDEQ_BIN_2 +223 0x0405 //RX_FDEQ_BIN_3 +224 0x0607 //RX_FDEQ_BIN_4 +225 0x0809 //RX_FDEQ_BIN_5 +226 0x0A0B //RX_FDEQ_BIN_6 +227 0x0C0D //RX_FDEQ_BIN_7 +228 0x0E0F //RX_FDEQ_BIN_8 +229 0x1011 //RX_FDEQ_BIN_9 +230 0x1214 //RX_FDEQ_BIN_10 +231 0x1618 //RX_FDEQ_BIN_11 +232 0x1C1C //RX_FDEQ_BIN_12 +233 0x2020 //RX_FDEQ_BIN_13 +234 0x2020 //RX_FDEQ_BIN_14 +235 0x2011 //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x4000 //RX_FDEQ_RESRV_0 +245 0x0320 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0030 //RX_FDDRC_BAND_MARGIN_1 +248 0x0050 //RX_FDDRC_BAND_MARGIN_2 +249 0x0080 //RX_FDDRC_BAND_MARGIN_3 +250 0x0007 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x5000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x6400 //RX_FDDRC_THRD_3_2 +258 0x6400 //RX_FDDRC_THRD_3_3 +259 0x2000 //RX_FDDRC_SLANT_0_0 +260 0x2000 //RX_FDDRC_SLANT_0_1 +261 0x2000 //RX_FDDRC_SLANT_0_2 +262 0x2000 //RX_FDDRC_SLANT_0_3 +263 0x5333 //RX_FDDRC_SLANT_1_0 +264 0x5333 //RX_FDDRC_SLANT_1_1 +265 0x5333 //RX_FDDRC_SLANT_1_2 +266 0x5333 //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +286 0x000B //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 +#VOL 1 +163 0x1000 //RX_TDDRC_ALPHA_UP_1 +164 0x1000 //RX_TDDRC_ALPHA_UP_2 +165 0x1000 //RX_TDDRC_ALPHA_UP_3 +166 0x1000 //RX_TDDRC_ALPHA_UP_4 +184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +190 0x7FFF //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +269 0x0000 //RX_TDDRC_THRD_0 +270 0x0000 //RX_TDDRC_THRD_1 +271 0x1200 //RX_TDDRC_THRD_2 +272 0x1900 //RX_TDDRC_THRD_3 +273 0x3000 //RX_TDDRC_SLANT_0 +274 0x6E00 //RX_TDDRC_SLANT_1 +275 0x1000 //RX_TDDRC_ALPHA_UP_0 +276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x199A //RX_TDDRC_HMNC_GAIN +279 0x0001 //RX_TDDRC_SMT_FLAG +280 0x0CCD //RX_TDDRC_SMT_W +281 0x0240 //RX_TDDRC_DRC_GAIN +195 0x0020 //RX_FDEQ_SUBNUM +196 0x4848 //RX_FDEQ_GAIN_0 +197 0x4848 //RX_FDEQ_GAIN_1 +198 0x4848 //RX_FDEQ_GAIN_2 +199 0x4848 //RX_FDEQ_GAIN_3 +200 0x4848 //RX_FDEQ_GAIN_4 +201 0x4848 //RX_FDEQ_GAIN_5 +202 0x4848 //RX_FDEQ_GAIN_6 +203 0x4848 //RX_FDEQ_GAIN_7 +204 0x4848 //RX_FDEQ_GAIN_8 +205 0x4848 //RX_FDEQ_GAIN_9 +206 0x4848 //RX_FDEQ_GAIN_10 +207 0x4848 //RX_FDEQ_GAIN_11 +208 0x4848 //RX_FDEQ_GAIN_12 +209 0x4848 //RX_FDEQ_GAIN_13 +210 0x4848 //RX_FDEQ_GAIN_14 +211 0x4848 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0202 //RX_FDEQ_BIN_0 +221 0x0203 //RX_FDEQ_BIN_1 +222 0x0304 //RX_FDEQ_BIN_2 +223 0x0405 //RX_FDEQ_BIN_3 +224 0x0607 //RX_FDEQ_BIN_4 +225 0x0809 //RX_FDEQ_BIN_5 +226 0x0A0B //RX_FDEQ_BIN_6 +227 0x0C0D //RX_FDEQ_BIN_7 +228 0x0E0F //RX_FDEQ_BIN_8 +229 0x1011 //RX_FDEQ_BIN_9 +230 0x1214 //RX_FDEQ_BIN_10 +231 0x1618 //RX_FDEQ_BIN_11 +232 0x1C1C //RX_FDEQ_BIN_12 +233 0x2020 //RX_FDEQ_BIN_13 +234 0x2020 //RX_FDEQ_BIN_14 +235 0x2011 //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x4000 //RX_FDEQ_RESRV_0 +245 0x0320 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0030 //RX_FDDRC_BAND_MARGIN_1 +248 0x0050 //RX_FDDRC_BAND_MARGIN_2 +249 0x0080 //RX_FDDRC_BAND_MARGIN_3 +250 0x0007 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x5000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x6400 //RX_FDDRC_THRD_3_2 +258 0x6400 //RX_FDDRC_THRD_3_3 +259 0x2000 //RX_FDDRC_SLANT_0_0 +260 0x2000 //RX_FDDRC_SLANT_0_1 +261 0x2000 //RX_FDDRC_SLANT_0_2 +262 0x2000 //RX_FDDRC_SLANT_0_3 +263 0x5333 //RX_FDDRC_SLANT_1_0 +264 0x5333 //RX_FDDRC_SLANT_1_1 +265 0x5333 //RX_FDDRC_SLANT_1_2 +266 0x5333 //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +286 0x0013 //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 +#VOL 2 +163 0x1000 //RX_TDDRC_ALPHA_UP_1 +164 0x1000 //RX_TDDRC_ALPHA_UP_2 +165 0x1000 //RX_TDDRC_ALPHA_UP_3 +166 0x1000 //RX_TDDRC_ALPHA_UP_4 +184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +190 0x7FFF //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +269 0x0000 //RX_TDDRC_THRD_0 +270 0x0000 //RX_TDDRC_THRD_1 +271 0x1200 //RX_TDDRC_THRD_2 +272 0x1900 //RX_TDDRC_THRD_3 +273 0x3000 //RX_TDDRC_SLANT_0 +274 0x6E00 //RX_TDDRC_SLANT_1 +275 0x1000 //RX_TDDRC_ALPHA_UP_0 +276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x199A //RX_TDDRC_HMNC_GAIN +279 0x0001 //RX_TDDRC_SMT_FLAG +280 0x0CCD //RX_TDDRC_SMT_W +281 0x0240 //RX_TDDRC_DRC_GAIN +195 0x0020 //RX_FDEQ_SUBNUM +196 0x4848 //RX_FDEQ_GAIN_0 +197 0x4848 //RX_FDEQ_GAIN_1 +198 0x4848 //RX_FDEQ_GAIN_2 +199 0x4848 //RX_FDEQ_GAIN_3 +200 0x4848 //RX_FDEQ_GAIN_4 +201 0x4848 //RX_FDEQ_GAIN_5 +202 0x4848 //RX_FDEQ_GAIN_6 +203 0x4848 //RX_FDEQ_GAIN_7 +204 0x4848 //RX_FDEQ_GAIN_8 +205 0x4848 //RX_FDEQ_GAIN_9 +206 0x4848 //RX_FDEQ_GAIN_10 +207 0x4848 //RX_FDEQ_GAIN_11 +208 0x4848 //RX_FDEQ_GAIN_12 +209 0x4848 //RX_FDEQ_GAIN_13 +210 0x4848 //RX_FDEQ_GAIN_14 +211 0x4848 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0202 //RX_FDEQ_BIN_0 +221 0x0203 //RX_FDEQ_BIN_1 +222 0x0304 //RX_FDEQ_BIN_2 +223 0x0405 //RX_FDEQ_BIN_3 +224 0x0607 //RX_FDEQ_BIN_4 +225 0x0809 //RX_FDEQ_BIN_5 +226 0x0A0B //RX_FDEQ_BIN_6 +227 0x0C0D //RX_FDEQ_BIN_7 +228 0x0E0F //RX_FDEQ_BIN_8 +229 0x1011 //RX_FDEQ_BIN_9 +230 0x1214 //RX_FDEQ_BIN_10 +231 0x1618 //RX_FDEQ_BIN_11 +232 0x1C1C //RX_FDEQ_BIN_12 +233 0x2020 //RX_FDEQ_BIN_13 +234 0x2020 //RX_FDEQ_BIN_14 +235 0x2011 //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x4000 //RX_FDEQ_RESRV_0 +245 0x0320 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0030 //RX_FDDRC_BAND_MARGIN_1 +248 0x0050 //RX_FDDRC_BAND_MARGIN_2 +249 0x0080 //RX_FDDRC_BAND_MARGIN_3 +250 0x0007 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x5000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x6400 //RX_FDDRC_THRD_3_2 +258 0x6400 //RX_FDDRC_THRD_3_3 +259 0x2000 //RX_FDDRC_SLANT_0_0 +260 0x2000 //RX_FDDRC_SLANT_0_1 +261 0x2000 //RX_FDDRC_SLANT_0_2 +262 0x2000 //RX_FDDRC_SLANT_0_3 +263 0x5333 //RX_FDDRC_SLANT_1_0 +264 0x5333 //RX_FDDRC_SLANT_1_1 +265 0x5333 //RX_FDDRC_SLANT_1_2 +266 0x5333 //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +286 0x0020 //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 +#VOL 3 +163 0x1000 //RX_TDDRC_ALPHA_UP_1 +164 0x1000 //RX_TDDRC_ALPHA_UP_2 +165 0x1000 //RX_TDDRC_ALPHA_UP_3 +166 0x1000 //RX_TDDRC_ALPHA_UP_4 +184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +190 0x7FFF //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +269 0x0000 //RX_TDDRC_THRD_0 +270 0x0000 //RX_TDDRC_THRD_1 +271 0x1200 //RX_TDDRC_THRD_2 +272 0x1900 //RX_TDDRC_THRD_3 +273 0x3000 //RX_TDDRC_SLANT_0 +274 0x6E00 //RX_TDDRC_SLANT_1 +275 0x1000 //RX_TDDRC_ALPHA_UP_0 +276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x199A //RX_TDDRC_HMNC_GAIN +279 0x0001 //RX_TDDRC_SMT_FLAG +280 0x0CCD //RX_TDDRC_SMT_W +281 0x0240 //RX_TDDRC_DRC_GAIN +195 0x0020 //RX_FDEQ_SUBNUM +196 0x4848 //RX_FDEQ_GAIN_0 +197 0x4848 //RX_FDEQ_GAIN_1 +198 0x4848 //RX_FDEQ_GAIN_2 +199 0x4848 //RX_FDEQ_GAIN_3 +200 0x4848 //RX_FDEQ_GAIN_4 +201 0x4848 //RX_FDEQ_GAIN_5 +202 0x4848 //RX_FDEQ_GAIN_6 +203 0x4848 //RX_FDEQ_GAIN_7 +204 0x4848 //RX_FDEQ_GAIN_8 +205 0x4848 //RX_FDEQ_GAIN_9 +206 0x4848 //RX_FDEQ_GAIN_10 +207 0x4848 //RX_FDEQ_GAIN_11 +208 0x4848 //RX_FDEQ_GAIN_12 +209 0x4848 //RX_FDEQ_GAIN_13 +210 0x4848 //RX_FDEQ_GAIN_14 +211 0x4848 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0202 //RX_FDEQ_BIN_0 +221 0x0203 //RX_FDEQ_BIN_1 +222 0x0304 //RX_FDEQ_BIN_2 +223 0x0405 //RX_FDEQ_BIN_3 +224 0x0607 //RX_FDEQ_BIN_4 +225 0x0809 //RX_FDEQ_BIN_5 +226 0x0A0B //RX_FDEQ_BIN_6 +227 0x0C0D //RX_FDEQ_BIN_7 +228 0x0E0F //RX_FDEQ_BIN_8 +229 0x1011 //RX_FDEQ_BIN_9 +230 0x1214 //RX_FDEQ_BIN_10 +231 0x1618 //RX_FDEQ_BIN_11 +232 0x1C1C //RX_FDEQ_BIN_12 +233 0x2020 //RX_FDEQ_BIN_13 +234 0x2020 //RX_FDEQ_BIN_14 +235 0x2011 //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x4000 //RX_FDEQ_RESRV_0 +245 0x0320 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0030 //RX_FDDRC_BAND_MARGIN_1 +248 0x0050 //RX_FDDRC_BAND_MARGIN_2 +249 0x0080 //RX_FDDRC_BAND_MARGIN_3 +250 0x0007 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x5000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x6400 //RX_FDDRC_THRD_3_2 +258 0x6400 //RX_FDDRC_THRD_3_3 +259 0x2000 //RX_FDDRC_SLANT_0_0 +260 0x2000 //RX_FDDRC_SLANT_0_1 +261 0x2000 //RX_FDDRC_SLANT_0_2 +262 0x2000 //RX_FDDRC_SLANT_0_3 +263 0x5333 //RX_FDDRC_SLANT_1_0 +264 0x5333 //RX_FDDRC_SLANT_1_1 +265 0x5333 //RX_FDDRC_SLANT_1_2 +266 0x5333 //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +286 0x0036 //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 +#VOL 4 +163 0x1000 //RX_TDDRC_ALPHA_UP_1 +164 0x1000 //RX_TDDRC_ALPHA_UP_2 +165 0x1000 //RX_TDDRC_ALPHA_UP_3 +166 0x1000 //RX_TDDRC_ALPHA_UP_4 +184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +190 0x7FFF //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +269 0x0000 //RX_TDDRC_THRD_0 +270 0x0000 //RX_TDDRC_THRD_1 +271 0x1200 //RX_TDDRC_THRD_2 +272 0x1900 //RX_TDDRC_THRD_3 +273 0x3000 //RX_TDDRC_SLANT_0 +274 0x6E00 //RX_TDDRC_SLANT_1 +275 0x1000 //RX_TDDRC_ALPHA_UP_0 +276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x199A //RX_TDDRC_HMNC_GAIN +279 0x0001 //RX_TDDRC_SMT_FLAG +280 0x0CCD //RX_TDDRC_SMT_W +281 0x0240 //RX_TDDRC_DRC_GAIN +195 0x0020 //RX_FDEQ_SUBNUM +196 0x4848 //RX_FDEQ_GAIN_0 +197 0x4848 //RX_FDEQ_GAIN_1 +198 0x4848 //RX_FDEQ_GAIN_2 +199 0x4848 //RX_FDEQ_GAIN_3 +200 0x4848 //RX_FDEQ_GAIN_4 +201 0x4848 //RX_FDEQ_GAIN_5 +202 0x4848 //RX_FDEQ_GAIN_6 +203 0x4848 //RX_FDEQ_GAIN_7 +204 0x4848 //RX_FDEQ_GAIN_8 +205 0x4848 //RX_FDEQ_GAIN_9 +206 0x4848 //RX_FDEQ_GAIN_10 +207 0x4848 //RX_FDEQ_GAIN_11 +208 0x4848 //RX_FDEQ_GAIN_12 +209 0x4848 //RX_FDEQ_GAIN_13 +210 0x4848 //RX_FDEQ_GAIN_14 +211 0x4848 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0202 //RX_FDEQ_BIN_0 +221 0x0203 //RX_FDEQ_BIN_1 +222 0x0304 //RX_FDEQ_BIN_2 +223 0x0405 //RX_FDEQ_BIN_3 +224 0x0607 //RX_FDEQ_BIN_4 +225 0x0809 //RX_FDEQ_BIN_5 +226 0x0A0B //RX_FDEQ_BIN_6 +227 0x0C0D //RX_FDEQ_BIN_7 +228 0x0E0F //RX_FDEQ_BIN_8 +229 0x1011 //RX_FDEQ_BIN_9 +230 0x1214 //RX_FDEQ_BIN_10 +231 0x1618 //RX_FDEQ_BIN_11 +232 0x1C1C //RX_FDEQ_BIN_12 +233 0x2020 //RX_FDEQ_BIN_13 +234 0x2020 //RX_FDEQ_BIN_14 +235 0x2011 //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x4000 //RX_FDEQ_RESRV_0 +245 0x0320 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0030 //RX_FDDRC_BAND_MARGIN_1 +248 0x0050 //RX_FDDRC_BAND_MARGIN_2 +249 0x0080 //RX_FDDRC_BAND_MARGIN_3 +250 0x0007 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x5000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x6400 //RX_FDDRC_THRD_3_2 +258 0x6400 //RX_FDDRC_THRD_3_3 +259 0x2000 //RX_FDDRC_SLANT_0_0 +260 0x2000 //RX_FDDRC_SLANT_0_1 +261 0x2000 //RX_FDDRC_SLANT_0_2 +262 0x2000 //RX_FDDRC_SLANT_0_3 +263 0x5333 //RX_FDDRC_SLANT_1_0 +264 0x5333 //RX_FDDRC_SLANT_1_1 +265 0x5333 //RX_FDDRC_SLANT_1_2 +266 0x5333 //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +286 0x005B //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 +#VOL 5 +163 0x1000 //RX_TDDRC_ALPHA_UP_1 +164 0x1000 //RX_TDDRC_ALPHA_UP_2 +165 0x1000 //RX_TDDRC_ALPHA_UP_3 +166 0x1000 //RX_TDDRC_ALPHA_UP_4 +184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +190 0x7FFF //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +269 0x0000 //RX_TDDRC_THRD_0 +270 0x0000 //RX_TDDRC_THRD_1 +271 0x1200 //RX_TDDRC_THRD_2 +272 0x1900 //RX_TDDRC_THRD_3 +273 0x3000 //RX_TDDRC_SLANT_0 +274 0x6E00 //RX_TDDRC_SLANT_1 +275 0x1000 //RX_TDDRC_ALPHA_UP_0 +276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x199A //RX_TDDRC_HMNC_GAIN +279 0x0001 //RX_TDDRC_SMT_FLAG +280 0x0CCD //RX_TDDRC_SMT_W +281 0x0240 //RX_TDDRC_DRC_GAIN +195 0x0020 //RX_FDEQ_SUBNUM +196 0x4848 //RX_FDEQ_GAIN_0 +197 0x4848 //RX_FDEQ_GAIN_1 +198 0x4848 //RX_FDEQ_GAIN_2 +199 0x4848 //RX_FDEQ_GAIN_3 +200 0x4848 //RX_FDEQ_GAIN_4 +201 0x4848 //RX_FDEQ_GAIN_5 +202 0x4848 //RX_FDEQ_GAIN_6 +203 0x4848 //RX_FDEQ_GAIN_7 +204 0x4848 //RX_FDEQ_GAIN_8 +205 0x4848 //RX_FDEQ_GAIN_9 +206 0x4848 //RX_FDEQ_GAIN_10 +207 0x4848 //RX_FDEQ_GAIN_11 +208 0x4848 //RX_FDEQ_GAIN_12 +209 0x4848 //RX_FDEQ_GAIN_13 +210 0x4848 //RX_FDEQ_GAIN_14 +211 0x4848 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0202 //RX_FDEQ_BIN_0 +221 0x0203 //RX_FDEQ_BIN_1 +222 0x0304 //RX_FDEQ_BIN_2 +223 0x0405 //RX_FDEQ_BIN_3 +224 0x0607 //RX_FDEQ_BIN_4 +225 0x0809 //RX_FDEQ_BIN_5 +226 0x0A0B //RX_FDEQ_BIN_6 +227 0x0C0D //RX_FDEQ_BIN_7 +228 0x0E0F //RX_FDEQ_BIN_8 +229 0x1011 //RX_FDEQ_BIN_9 +230 0x1214 //RX_FDEQ_BIN_10 +231 0x1618 //RX_FDEQ_BIN_11 +232 0x1C1C //RX_FDEQ_BIN_12 +233 0x2020 //RX_FDEQ_BIN_13 +234 0x2020 //RX_FDEQ_BIN_14 +235 0x2011 //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x4000 //RX_FDEQ_RESRV_0 +245 0x0320 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0030 //RX_FDDRC_BAND_MARGIN_1 +248 0x0050 //RX_FDDRC_BAND_MARGIN_2 +249 0x0080 //RX_FDDRC_BAND_MARGIN_3 +250 0x0007 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x5000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x6400 //RX_FDDRC_THRD_3_2 +258 0x6400 //RX_FDDRC_THRD_3_3 +259 0x2000 //RX_FDDRC_SLANT_0_0 +260 0x2000 //RX_FDDRC_SLANT_0_1 +261 0x2000 //RX_FDDRC_SLANT_0_2 +262 0x2000 //RX_FDDRC_SLANT_0_3 +263 0x5333 //RX_FDDRC_SLANT_1_0 +264 0x5333 //RX_FDDRC_SLANT_1_1 +265 0x5333 //RX_FDDRC_SLANT_1_2 +266 0x5333 //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +286 0x0099 //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 +#VOL 6 +163 0x1000 //RX_TDDRC_ALPHA_UP_1 +164 0x1000 //RX_TDDRC_ALPHA_UP_2 +165 0x1000 //RX_TDDRC_ALPHA_UP_3 +166 0x1000 //RX_TDDRC_ALPHA_UP_4 +184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +190 0x7FFF //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +269 0x0000 //RX_TDDRC_THRD_0 +270 0x0000 //RX_TDDRC_THRD_1 +271 0x1200 //RX_TDDRC_THRD_2 +272 0x1900 //RX_TDDRC_THRD_3 +273 0x3000 //RX_TDDRC_SLANT_0 +274 0x6E00 //RX_TDDRC_SLANT_1 +275 0x1000 //RX_TDDRC_ALPHA_UP_0 +276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x199A //RX_TDDRC_HMNC_GAIN +279 0x0001 //RX_TDDRC_SMT_FLAG +280 0x0CCD //RX_TDDRC_SMT_W +281 0x0240 //RX_TDDRC_DRC_GAIN +195 0x0020 //RX_FDEQ_SUBNUM +196 0x4848 //RX_FDEQ_GAIN_0 +197 0x4848 //RX_FDEQ_GAIN_1 +198 0x4848 //RX_FDEQ_GAIN_2 +199 0x4848 //RX_FDEQ_GAIN_3 +200 0x4848 //RX_FDEQ_GAIN_4 +201 0x4848 //RX_FDEQ_GAIN_5 +202 0x4848 //RX_FDEQ_GAIN_6 +203 0x4848 //RX_FDEQ_GAIN_7 +204 0x4848 //RX_FDEQ_GAIN_8 +205 0x4848 //RX_FDEQ_GAIN_9 +206 0x4848 //RX_FDEQ_GAIN_10 +207 0x4848 //RX_FDEQ_GAIN_11 +208 0x4848 //RX_FDEQ_GAIN_12 +209 0x4848 //RX_FDEQ_GAIN_13 +210 0x4848 //RX_FDEQ_GAIN_14 +211 0x4848 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0202 //RX_FDEQ_BIN_0 +221 0x0203 //RX_FDEQ_BIN_1 +222 0x0304 //RX_FDEQ_BIN_2 +223 0x0405 //RX_FDEQ_BIN_3 +224 0x0607 //RX_FDEQ_BIN_4 +225 0x0809 //RX_FDEQ_BIN_5 +226 0x0A0B //RX_FDEQ_BIN_6 +227 0x0C0D //RX_FDEQ_BIN_7 +228 0x0E0F //RX_FDEQ_BIN_8 +229 0x1011 //RX_FDEQ_BIN_9 +230 0x1214 //RX_FDEQ_BIN_10 +231 0x1618 //RX_FDEQ_BIN_11 +232 0x1C1C //RX_FDEQ_BIN_12 +233 0x2020 //RX_FDEQ_BIN_13 +234 0x2020 //RX_FDEQ_BIN_14 +235 0x2011 //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x4000 //RX_FDEQ_RESRV_0 +245 0x0320 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0030 //RX_FDDRC_BAND_MARGIN_1 +248 0x0050 //RX_FDDRC_BAND_MARGIN_2 +249 0x0080 //RX_FDDRC_BAND_MARGIN_3 +250 0x0007 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x5000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x6400 //RX_FDDRC_THRD_3_2 +258 0x6400 //RX_FDDRC_THRD_3_3 +259 0x2000 //RX_FDDRC_SLANT_0_0 +260 0x2000 //RX_FDDRC_SLANT_0_1 +261 0x2000 //RX_FDDRC_SLANT_0_2 +262 0x2000 //RX_FDDRC_SLANT_0_3 +263 0x5333 //RX_FDDRC_SLANT_1_0 +264 0x5333 //RX_FDDRC_SLANT_1_1 +265 0x5333 //RX_FDDRC_SLANT_1_2 +266 0x5333 //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +286 0x0100 //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 #CASE_NAME HEADSET-TTY_HCO-VOICE_GENERIC-NB -#PARAM_MODE FULL -#PARAM_TYPE TX+RX -#TOTAL_CUSTOM_STEP 7 +#PARAM_MODE Full +#PARAM_TYPE TX+2RX +#TOTAL_CUSTOM_STEP 7+7 #TX 0 0x0001 //TX_OPERATION_MODE_0 1 0x0000 //TX_OPERATION_MODE_1 @@ -35330,7 +53650,7 @@ 239 0x0000 //TX_DT_RESRV_7 240 0x0000 //TX_DT_RESRV_8 241 0x0000 //TX_DT_RESRV_9 -242 0xF200 //TX_THR_SN_EST_0 +242 0xFA00 //TX_THR_SN_EST_0 243 0xF400 //TX_THR_SN_EST_1 244 0xF800 //TX_THR_SN_EST_2 245 0xF600 //TX_THR_SN_EST_3 @@ -35339,12 +53659,12 @@ 248 0xF800 //TX_THR_SN_EST_6 249 0xF800 //TX_THR_SN_EST_7 250 0x0100 //TX_DELTA_THR_SN_EST_0 -251 0x0000 //TX_DELTA_THR_SN_EST_1 +251 0x0100 //TX_DELTA_THR_SN_EST_1 252 0x0100 //TX_DELTA_THR_SN_EST_2 -253 0x0100 //TX_DELTA_THR_SN_EST_3 +253 0x0200 //TX_DELTA_THR_SN_EST_3 254 0x0200 //TX_DELTA_THR_SN_EST_4 255 0x0200 //TX_DELTA_THR_SN_EST_5 -256 0x0200 //TX_DELTA_THR_SN_EST_6 +256 0x0000 //TX_DELTA_THR_SN_EST_6 257 0x0200 //TX_DELTA_THR_SN_EST_7 258 0x4000 //TX_LAMBDA_NN_EST_0 259 0x4000 //TX_LAMBDA_NN_EST_1 @@ -35370,12 +53690,12 @@ 279 0x0000 //TX_B_POST_FLT_0 280 0x0000 //TX_B_POST_FLT_1 281 0x001A //TX_NS_LVL_CTRL_0 -282 0x001A //TX_NS_LVL_CTRL_1 +282 0x0014 //TX_NS_LVL_CTRL_1 283 0x0014 //TX_NS_LVL_CTRL_2 -284 0x0014 //TX_NS_LVL_CTRL_3 +284 0x000C //TX_NS_LVL_CTRL_3 285 0x000C //TX_NS_LVL_CTRL_4 286 0x000C //TX_NS_LVL_CTRL_5 -287 0x000C //TX_NS_LVL_CTRL_6 +287 0x001A //TX_NS_LVL_CTRL_6 288 0x000C //TX_NS_LVL_CTRL_7 289 0x000E //TX_MIN_GAIN_S_0 290 0x0014 //TX_MIN_GAIN_S_1 @@ -35391,10 +53711,10 @@ 300 0x7FFF //TX_SNRI_SUP_0 301 0x7FFF //TX_SNRI_SUP_1 302 0x7FFF //TX_SNRI_SUP_2 -303 0x7FFF //TX_SNRI_SUP_3 +303 0x4000 //TX_SNRI_SUP_3 304 0x4000 //TX_SNRI_SUP_4 305 0x4000 //TX_SNRI_SUP_5 -306 0x4000 //TX_SNRI_SUP_6 +306 0x7FFF //TX_SNRI_SUP_6 307 0x4000 //TX_SNRI_SUP_7 308 0x1200 //TX_THR_LFNS 309 0x0147 //TX_G_LFNS @@ -35403,12 +53723,12 @@ 312 0x7FFF //TX_A_POST_FILT_0 313 0x7FFF //TX_A_POST_FILT_1 314 0x4000 //TX_A_POST_FILT_S_0 -315 0x199A //TX_A_POST_FILT_S_1 +315 0x1000 //TX_A_POST_FILT_S_1 316 0x1000 //TX_A_POST_FILT_S_2 -317 0x1000 //TX_A_POST_FILT_S_3 +317 0x6666 //TX_A_POST_FILT_S_3 318 0x6666 //TX_A_POST_FILT_S_4 319 0x6666 //TX_A_POST_FILT_S_5 -320 0x6666 //TX_A_POST_FILT_S_6 +320 0x199A //TX_A_POST_FILT_S_6 321 0x6666 //TX_A_POST_FILT_S_7 322 0x2000 //TX_B_POST_FILT_0 323 0x2000 //TX_B_POST_FILT_1 @@ -35455,7 +53775,7 @@ 364 0x0000 //TX_K_APT 365 0x0001 //TX_NOISEDET 366 0x05A0 //TX_NDETCT -367 0x000A //TX_NOISE_TH_0 +367 0x003B //TX_NOISE_TH_0 368 0x1388 //TX_NOISE_TH_0_2 369 0x3A98 //TX_NOISE_TH_0_3 370 0x0C80 //TX_NOISE_TH_1 @@ -35467,11 +53787,11 @@ 376 0x7FFF //TX_NOISE_TH_5_3 377 0x7FFF //TX_NOISE_TH_5_4 378 0x00C8 //TX_NOISE_TH_6 -379 0x000A //TX_MINENOISE_TH -380 0x0000 //TX_MINENOISE_MIC0_TH_MTS -381 0x0000 //TX_MINENOISE_MIC0_TH_EXP -382 0x0000 //TX_MINENOISE_MIC0_S_TH_MTS -383 0x0000 //TX_MINENOISE_MIC0_S_TH_EXP +379 0x00C8 //TX_MINENOISE_TH +380 0xD508 //TX_MORENS_TFMASK_TH +381 0x0001 //TX_DRC_QUIET_FLOOR +382 0x3A98 //TX_RATIODTL_CUT_TH +383 0x0DAC //TX_DT_CUT_K1 384 0x6400 //TX_OUT_ENER_S_TH_CLEAN 385 0x6400 //TX_OUT_ENER_S_TH_LESSCLEAN 386 0x6400 //TX_OUT_ENER_S_TH_NOISY @@ -35479,22 +53799,22 @@ 388 0x7D00 //TX_OUT_ENER_TH_SPEECH 389 0x0000 //TX_SN_NPB_GAIN 390 0x0000 //TX_NN_NPB_GAIN -391 0x0000 //TX_CSX_ALPHA_0 -392 0x0000 //TX_CSX_ALPHA_1 -393 0x0000 //TX_CSX_ALPHA_2 -394 0x0000 //TX_CSX_ALPHA_3 -395 0x0000 //TX_MU_ARSP_EST -396 0x0000 //TX_P_OUTBEAM_MIN_TH +391 0x7FFF //TX_POST_MASK_SUP_HSNE +392 0x1388 //TX_TAIL_DET_TH +393 0x4000 //TX_B_LESSCUT_RTO_WTA +394 0x0000 //TX_MEL_G_R +395 0x0080 //TX_SUPHIGH_TH +396 0x0000 //TX_MASK_G_R 397 0x0000 //TX_EXTRA_NS_L -398 0x0000 //TX_EXTRA_NS_A -399 0x0000 //TX_VR_NOISE_FLOOR_TH +398 0x1800 //TX_C_POST_FLT_MASK +399 0x7FFF //TX_A_POST_FLT_WNS 400 0x0000 //TX_MIN_G_LOW300HZ 401 0x0010 //TX_MAXLEVEL_CNG 402 0x0000 //TX_STN_NOISE_TH 403 0x0000 //TX_POST_MASK_SUP 404 0x0000 //TX_POST_MASK_ADJUST 405 0x0014 //TX_NS_ENOISE_MIC0_TH -406 0x0014 //TX_MINENOISE_MIC0_TH +406 0x0032 //TX_MINENOISE_MIC0_TH 407 0x0226 //TX_MINENOISE_MIC0_S_TH 408 0x2879 //TX_MIN_G_CTRL_SSNS 409 0x0400 //TX_METAL_RTO_THR @@ -35602,16 +53922,16 @@ 511 0x6666 //TX_MIC_TO_BFGAIN 512 0x6666 //TX_MICTOBFGAIN0 513 0x0014 //TX_FASTMUE_TH -514 0x0000 //TX_DERVB_LEN_0 -515 0x0000 //TX_DERVB_LEN_1 -516 0x0000 //TX_RHO_DERVB -517 0x0000 //TX_MIC_INDX_DERVB -518 0x0000 //TX_MU_DERVB -519 0x0000 //TX_DR_RESRV_0 -520 0x0000 //TX_DR_RESRV_1 -521 0x0000 //TX_DR_RESRV_2 -522 0x0000 //TX_DR_RESRV_3 -523 0x0000 //TX_DR_RESRV_4 +514 0xC000 //TX_DEREVERB_LF_MU +515 0xC000 //TX_DEREVERB_HF_MU +516 0xCCCC //TX_DEREVERB_DELAY +517 0xD999 //TX_DEREVERB_COEF_LEN +518 0x1F40 //TX_DEREVERB_DNR +519 0x0000 //TX_DEREVERB_ALPHA +520 0x0000 //TX_DEREVERB_BETA +521 0x0000 //TX_GSC_RTOL_TH +522 0x7000 //TX_GSC_RTOH_TH +523 0x0064 //TX_WIDE2_MEANHTH 524 0x0000 //TX_DR_RESRV_5 525 0x0000 //TX_DR_RESRV_6 526 0x0000 //TX_DR_RESRV_7 @@ -35977,16 +54297,81 @@ 886 0x0000 //TX_FASTNS_TFMASKBIN_TH2 887 0x0000 //TX_FASTNS_TFMASKBIN_TH3 888 0x00C8 //TX_FASTNS_ARSPC_TH -889 0xD99A //TX_FASTNS_MASK5_TH +889 0xC000 //TX_FASTNS_MASK5_TH 890 0x051F //TX_POSTSSA_MIN_G_VR_MASK -891 0x7FFF //TX_A_LESSCUT_RTO_MASK +891 0x4000 //TX_A_LESSCUT_RTO_MASK 892 0x1770 //TX_FASTNS_NOISETH 893 0xC000 //TX_FASTNS_SSA_THLFL 894 0xC000 //TX_FASTNS_SSA_THHFL 895 0xCCCC //TX_FASTNS_SSA_THLFH 896 0xD999 //TX_FASTNS_SSA_THHFH +897 0x2339 //TX_SENDFUNC_REG_MICMUTE +898 0x0021 //TX_SENDFUNC_REG_MICMUTE1 +899 0x02BC //TX_MICMUTE_RATIO_THR +900 0x0140 //TX_MICMUTE_AMP_THR +901 0x0004 //TX_MICMUTE_HPF_IND +902 0x00C0 //TX_MICMUTE_LOG_EYR_TH +903 0x0008 //TX_MICMUTE_CVG_TIME +904 0x0008 //TX_MICMUTE_RELEASE_TIME +905 0x01FE //TX_MIC_VOLUME_MIC0MUTE +906 0x0020 //TX_MICMUTE_EPD_OFFSET_0 +907 0x001E //TX_MICMUTE_FRQ_AEC_L +908 0x7999 //TX_MICMUTE_EAD_THR +909 0x7FFF //TX_MICMUTE_LAMBDA_CB_NLE +910 0x7FFF //TX_MICMUTE_LAMBDA_RE_EST +911 0x4000 //TX_DTD_THR1_MICMUTE_0 +912 0x7000 //TX_DTD_THR1_MICMUTE_1 +913 0x7FFF //TX_DTD_THR1_MICMUTE_2 +914 0x7FFF //TX_DTD_THR1_MICMUTE_3 +915 0x6CCC //TX_DTD_THR2_MICMUTE_0 +916 0x0400 //TX_MICMUTE_MIN_EQ_RE_EST_0 +917 0x0400 //TX_MICMUTE_MIN_EQ_RE_EST_1 +918 0x1000 //TX_MICMUTE_MIN_EQ_RE_EST_2 +919 0x7FFF //TX_MICMUTE_MIN_EQ_RE_EST_3 +920 0x7FFF //TX_MICMUTE_MIN_EQ_RE_EST_4 +921 0x4000 //TX_MICMUTE_C_POST_FLT +922 0x03E8 //TX_MICMUTE_DT_CUT_K +923 0x0001 //TX_MICMUTE_DT_CUT_THR +924 0x03E8 //TX_MICMUTE_DT_CUT_K2 +925 0x0001 //TX_MICMUTE_DT_CUT_THR2 +926 0x0064 //TX_MICMUTE_DT2_HOLD_N +927 0x1000 //TX_MICMUTE_RATIODTH_THCUT +928 0x1000 //TX_MICMUTE_B_POST_FLT_ECHOL +929 0x7FFF //TX_MICMUTE_B_POST_FLT_ECHOH +930 0x0400 //TX_MICMUTE_C_POST_FLT_MASK +931 0x7999 //TX_MICMUTE_RATIODTL_CUT_TH +932 0x0258 //TX_MICMUTE_DT_CUT_K1 +933 0x0800 //TX_MICMUTE_N2_SN_EST +934 0xFC00 //TX_MICMUTE_THR_SN_EST_0 +935 0x001C //TX_MICMUTE_MIN_G_CTRL_0 +936 0x6000 //TX_MICMUTE_A_POST_FILT_S_0 +937 0x7000 //TX_MICMUTE_B_POST_FILT_0 +938 0x2710 //TX_MIC1RUB_AMP_THR +939 0x0010 //TX_MIC1MUTE_RATIO_THR +940 0x0450 //TX_MIC1MUTE_AMP_THR +941 0x0008 //TX_MIC1MUTE_CVG_TIME +942 0x0008 //TX_MIC1MUTE_RELEASE_TIME +943 0x0000 //TX_AMS_RESRV_01 +944 0x0000 //TX_AMS_RESRV_02 +945 0x0000 //TX_AMS_RESRV_03 +946 0x0000 //TX_AMS_RESRV_04 +947 0x0000 //TX_AMS_RESRV_05 +948 0x0000 //TX_AMS_RESRV_06 +949 0x0000 //TX_AMS_RESRV_07 +950 0x0000 //TX_AMS_RESRV_08 +951 0x0000 //TX_AMS_RESRV_09 +952 0x0000 //TX_AMS_RESRV_10 +953 0x0000 //TX_AMS_RESRV_11 +954 0x0000 //TX_AMS_RESRV_12 +955 0x0000 //TX_AMS_RESRV_13 +956 0x0000 //TX_AMS_RESRV_14 +957 0x0000 //TX_AMS_RESRV_15 +958 0x0000 //TX_AMS_RESRV_16 +959 0x0000 //TX_AMS_RESRV_17 +960 0x0000 //TX_AMS_RESRV_18 +961 0x0000 //TX_AMS_RESRV_19 #RX -0 0x027C //RX_RECVFUNC_MODE_0 +0 0x243C //RX_RECVFUNC_MODE_0 1 0x0000 //RX_RECVFUNC_MODE_1 2 0x0000 //RX_SAMPLINGFREQ_SIG 3 0x0000 //RX_SAMPLINGFREQ_PROC @@ -35996,8 +54381,8 @@ 7 0x1000 //RX_TDDRC_ALPHA_UP_2 8 0x1000 //RX_TDDRC_ALPHA_UP_3 9 0x1000 //RX_TDDRC_ALPHA_UP_4 -10 0x0800 //RX_PGA -11 0x7652 //RX_A_HP +10 0x0403 //RX_PGA +11 0x7646 //RX_A_HP 12 0x4000 //RX_B_PE 13 0x7800 //RX_THR_PITCH_DET_0 14 0x7000 //RX_THR_PITCH_DET_1 @@ -36026,12 +54411,12 @@ 37 0x4000 //RX_LMT_ALPHA 38 0x0014 //RX_FDEQ_SUBNUM 39 0x8080 //RX_FDEQ_GAIN_0 -40 0x8058 //RX_FDEQ_GAIN_1 -41 0x5454 //RX_FDEQ_GAIN_2 -42 0x545C //RX_FDEQ_GAIN_3 -43 0x6448 //RX_FDEQ_GAIN_4 +40 0x8054 //RX_FDEQ_GAIN_1 +41 0x5050 //RX_FDEQ_GAIN_2 +42 0x5058 //RX_FDEQ_GAIN_3 +43 0x5C70 //RX_FDEQ_GAIN_4 44 0x4848 //RX_FDEQ_GAIN_5 -45 0x5848 //RX_FDEQ_GAIN_6 +45 0x484C //RX_FDEQ_GAIN_6 46 0x4848 //RX_FDEQ_GAIN_7 47 0x485A //RX_FDEQ_GAIN_8 48 0x5A58 //RX_FDEQ_GAIN_9 @@ -36053,8 +54438,8 @@ 64 0x0203 //RX_FDEQ_BIN_1 65 0x0303 //RX_FDEQ_BIN_2 66 0x0304 //RX_FDEQ_BIN_3 -67 0x0405 //RX_FDEQ_BIN_4 -68 0x0506 //RX_FDEQ_BIN_5 +67 0x0604 //RX_FDEQ_BIN_4 +68 0x0406 //RX_FDEQ_BIN_5 69 0x0708 //RX_FDEQ_BIN_6 70 0x090A //RX_FDEQ_BIN_7 71 0x0B0C //RX_FDEQ_BIN_8 @@ -36110,12 +54495,12 @@ 121 0x199A //RX_TDDRC_HMNC_GAIN 122 0x0001 //RX_TDDRC_SMT_FLAG 123 0x0CCD //RX_TDDRC_SMT_W -124 0x0700 //RX_TDDRC_DRC_GAIN +124 0x0780 //RX_TDDRC_DRC_GAIN 125 0x7C00 //RX_LAMBDA_PKA_FP -126 0x2000 //RX_TPKA_FP -127 0x2000 //RX_MIN_G_FP -128 0x0080 //RX_MAX_G_FP -129 0x0016 //RX_SPK_VOL +126 0x1194 //RX_TPKA_FP +127 0x0400 //RX_MIN_G_FP +128 0x0800 //RX_MAX_G_FP +129 0x0015 //RX_SPK_VOL 130 0x0000 //RX_VOL_RESRV_0 131 0x0000 //RX_MAXLEVEL_CNG 132 0x3000 //RX_BWE_UV_TH @@ -36156,8 +54541,8 @@ 34 0x0800 //RX_TDDRC_LIMITER_GAIN 112 0x0002 //RX_TDDRC_THRD_0 113 0x0004 //RX_TDDRC_THRD_1 -114 0x1A00 //RX_TDDRC_THRD_2 -115 0x1A00 //RX_TDDRC_THRD_3 +114 0x1800 //RX_TDDRC_THRD_2 +115 0x1800 //RX_TDDRC_THRD_3 116 0x7FFF //RX_TDDRC_SLANT_0 117 0x7FFF //RX_TDDRC_SLANT_1 118 0x1000 //RX_TDDRC_ALPHA_UP_0 @@ -36166,18 +54551,18 @@ 121 0x199A //RX_TDDRC_HMNC_GAIN 122 0x0001 //RX_TDDRC_SMT_FLAG 123 0x0CCD //RX_TDDRC_SMT_W -124 0x0700 //RX_TDDRC_DRC_GAIN +124 0x0780 //RX_TDDRC_DRC_GAIN 38 0x0014 //RX_FDEQ_SUBNUM 39 0x8080 //RX_FDEQ_GAIN_0 -40 0x8058 //RX_FDEQ_GAIN_1 -41 0x5454 //RX_FDEQ_GAIN_2 -42 0x545C //RX_FDEQ_GAIN_3 -43 0x6448 //RX_FDEQ_GAIN_4 -44 0x4848 //RX_FDEQ_GAIN_5 -45 0x5848 //RX_FDEQ_GAIN_6 -46 0x4848 //RX_FDEQ_GAIN_7 -47 0x485A //RX_FDEQ_GAIN_8 -48 0x5A58 //RX_FDEQ_GAIN_9 +40 0x8050 //RX_FDEQ_GAIN_1 +41 0x4840 //RX_FDEQ_GAIN_2 +42 0x4040 //RX_FDEQ_GAIN_3 +43 0x4C68 //RX_FDEQ_GAIN_4 +44 0x403C //RX_FDEQ_GAIN_5 +45 0x3C38 //RX_FDEQ_GAIN_6 +46 0x3430 //RX_FDEQ_GAIN_7 +47 0x303C //RX_FDEQ_GAIN_8 +48 0x4C50 //RX_FDEQ_GAIN_9 49 0x4848 //RX_FDEQ_GAIN_10 50 0x4848 //RX_FDEQ_GAIN_11 51 0x4848 //RX_FDEQ_GAIN_12 @@ -36196,8 +54581,8 @@ 64 0x0203 //RX_FDEQ_BIN_1 65 0x0303 //RX_FDEQ_BIN_2 66 0x0304 //RX_FDEQ_BIN_3 -67 0x0405 //RX_FDEQ_BIN_4 -68 0x0506 //RX_FDEQ_BIN_5 +67 0x0703 //RX_FDEQ_BIN_4 +68 0x0406 //RX_FDEQ_BIN_5 69 0x0708 //RX_FDEQ_BIN_6 70 0x090A //RX_FDEQ_BIN_7 71 0x0B0C //RX_FDEQ_BIN_8 @@ -36240,7 +54625,7 @@ 108 0x7FFF //RX_FDDRC_SLANT_1_2 109 0x7FFF //RX_FDDRC_SLANT_1_3 110 0x0000 //RX_FDDRC_RESRV_0 -129 0x0016 //RX_SPK_VOL +129 0x0012 //RX_SPK_VOL 130 0x0000 //RX_VOL_RESRV_0 #VOL 1 6 0x1000 //RX_TDDRC_ALPHA_UP_1 @@ -36255,8 +54640,8 @@ 34 0x0800 //RX_TDDRC_LIMITER_GAIN 112 0x0002 //RX_TDDRC_THRD_0 113 0x0004 //RX_TDDRC_THRD_1 -114 0x1A00 //RX_TDDRC_THRD_2 -115 0x1A00 //RX_TDDRC_THRD_3 +114 0x1800 //RX_TDDRC_THRD_2 +115 0x1800 //RX_TDDRC_THRD_3 116 0x7FFF //RX_TDDRC_SLANT_0 117 0x7FFF //RX_TDDRC_SLANT_1 118 0x1000 //RX_TDDRC_ALPHA_UP_0 @@ -36265,18 +54650,18 @@ 121 0x199A //RX_TDDRC_HMNC_GAIN 122 0x0001 //RX_TDDRC_SMT_FLAG 123 0x0CCD //RX_TDDRC_SMT_W -124 0x0700 //RX_TDDRC_DRC_GAIN +124 0x0780 //RX_TDDRC_DRC_GAIN 38 0x0014 //RX_FDEQ_SUBNUM 39 0x8080 //RX_FDEQ_GAIN_0 -40 0x8058 //RX_FDEQ_GAIN_1 -41 0x5454 //RX_FDEQ_GAIN_2 -42 0x545C //RX_FDEQ_GAIN_3 -43 0x6448 //RX_FDEQ_GAIN_4 -44 0x4848 //RX_FDEQ_GAIN_5 -45 0x5848 //RX_FDEQ_GAIN_6 -46 0x4848 //RX_FDEQ_GAIN_7 -47 0x485A //RX_FDEQ_GAIN_8 -48 0x5A58 //RX_FDEQ_GAIN_9 +40 0x8050 //RX_FDEQ_GAIN_1 +41 0x4840 //RX_FDEQ_GAIN_2 +42 0x4040 //RX_FDEQ_GAIN_3 +43 0x4C68 //RX_FDEQ_GAIN_4 +44 0x403C //RX_FDEQ_GAIN_5 +45 0x3C38 //RX_FDEQ_GAIN_6 +46 0x3430 //RX_FDEQ_GAIN_7 +47 0x303C //RX_FDEQ_GAIN_8 +48 0x4C50 //RX_FDEQ_GAIN_9 49 0x4848 //RX_FDEQ_GAIN_10 50 0x4848 //RX_FDEQ_GAIN_11 51 0x4848 //RX_FDEQ_GAIN_12 @@ -36295,8 +54680,8 @@ 64 0x0203 //RX_FDEQ_BIN_1 65 0x0303 //RX_FDEQ_BIN_2 66 0x0304 //RX_FDEQ_BIN_3 -67 0x0405 //RX_FDEQ_BIN_4 -68 0x0506 //RX_FDEQ_BIN_5 +67 0x0703 //RX_FDEQ_BIN_4 +68 0x0406 //RX_FDEQ_BIN_5 69 0x0708 //RX_FDEQ_BIN_6 70 0x090A //RX_FDEQ_BIN_7 71 0x0B0C //RX_FDEQ_BIN_8 @@ -36339,7 +54724,7 @@ 108 0x7FFF //RX_FDDRC_SLANT_1_2 109 0x7FFF //RX_FDDRC_SLANT_1_3 110 0x0000 //RX_FDDRC_RESRV_0 -129 0x0020 //RX_SPK_VOL +129 0x001B //RX_SPK_VOL 130 0x0000 //RX_VOL_RESRV_0 #VOL 2 6 0x1000 //RX_TDDRC_ALPHA_UP_1 @@ -36354,8 +54739,8 @@ 34 0x0800 //RX_TDDRC_LIMITER_GAIN 112 0x0002 //RX_TDDRC_THRD_0 113 0x0004 //RX_TDDRC_THRD_1 -114 0x1A00 //RX_TDDRC_THRD_2 -115 0x1A00 //RX_TDDRC_THRD_3 +114 0x1800 //RX_TDDRC_THRD_2 +115 0x1800 //RX_TDDRC_THRD_3 116 0x7FFF //RX_TDDRC_SLANT_0 117 0x7FFF //RX_TDDRC_SLANT_1 118 0x1000 //RX_TDDRC_ALPHA_UP_0 @@ -36364,18 +54749,18 @@ 121 0x199A //RX_TDDRC_HMNC_GAIN 122 0x0001 //RX_TDDRC_SMT_FLAG 123 0x0CCD //RX_TDDRC_SMT_W -124 0x0700 //RX_TDDRC_DRC_GAIN +124 0x0780 //RX_TDDRC_DRC_GAIN 38 0x0014 //RX_FDEQ_SUBNUM 39 0x8080 //RX_FDEQ_GAIN_0 -40 0x8058 //RX_FDEQ_GAIN_1 -41 0x5454 //RX_FDEQ_GAIN_2 -42 0x545C //RX_FDEQ_GAIN_3 -43 0x6448 //RX_FDEQ_GAIN_4 -44 0x4848 //RX_FDEQ_GAIN_5 -45 0x5848 //RX_FDEQ_GAIN_6 -46 0x4848 //RX_FDEQ_GAIN_7 -47 0x485A //RX_FDEQ_GAIN_8 -48 0x5A58 //RX_FDEQ_GAIN_9 +40 0x8050 //RX_FDEQ_GAIN_1 +41 0x4840 //RX_FDEQ_GAIN_2 +42 0x4040 //RX_FDEQ_GAIN_3 +43 0x4C68 //RX_FDEQ_GAIN_4 +44 0x403C //RX_FDEQ_GAIN_5 +45 0x3C38 //RX_FDEQ_GAIN_6 +46 0x3430 //RX_FDEQ_GAIN_7 +47 0x303C //RX_FDEQ_GAIN_8 +48 0x4C50 //RX_FDEQ_GAIN_9 49 0x4848 //RX_FDEQ_GAIN_10 50 0x4848 //RX_FDEQ_GAIN_11 51 0x4848 //RX_FDEQ_GAIN_12 @@ -36394,8 +54779,8 @@ 64 0x0203 //RX_FDEQ_BIN_1 65 0x0303 //RX_FDEQ_BIN_2 66 0x0304 //RX_FDEQ_BIN_3 -67 0x0405 //RX_FDEQ_BIN_4 -68 0x0506 //RX_FDEQ_BIN_5 +67 0x0703 //RX_FDEQ_BIN_4 +68 0x0406 //RX_FDEQ_BIN_5 69 0x0708 //RX_FDEQ_BIN_6 70 0x090A //RX_FDEQ_BIN_7 71 0x0B0C //RX_FDEQ_BIN_8 @@ -36438,7 +54823,7 @@ 108 0x7FFF //RX_FDDRC_SLANT_1_2 109 0x7FFF //RX_FDDRC_SLANT_1_3 110 0x0000 //RX_FDDRC_RESRV_0 -129 0x002E //RX_SPK_VOL +129 0x0026 //RX_SPK_VOL 130 0x0000 //RX_VOL_RESRV_0 #VOL 3 6 0x1000 //RX_TDDRC_ALPHA_UP_1 @@ -36453,8 +54838,8 @@ 34 0x0800 //RX_TDDRC_LIMITER_GAIN 112 0x0002 //RX_TDDRC_THRD_0 113 0x0004 //RX_TDDRC_THRD_1 -114 0x1A00 //RX_TDDRC_THRD_2 -115 0x1A00 //RX_TDDRC_THRD_3 +114 0x1800 //RX_TDDRC_THRD_2 +115 0x1800 //RX_TDDRC_THRD_3 116 0x7FFF //RX_TDDRC_SLANT_0 117 0x7FFF //RX_TDDRC_SLANT_1 118 0x1000 //RX_TDDRC_ALPHA_UP_0 @@ -36463,18 +54848,18 @@ 121 0x199A //RX_TDDRC_HMNC_GAIN 122 0x0001 //RX_TDDRC_SMT_FLAG 123 0x0CCD //RX_TDDRC_SMT_W -124 0x0700 //RX_TDDRC_DRC_GAIN +124 0x0780 //RX_TDDRC_DRC_GAIN 38 0x0014 //RX_FDEQ_SUBNUM 39 0x8080 //RX_FDEQ_GAIN_0 -40 0x8058 //RX_FDEQ_GAIN_1 -41 0x5454 //RX_FDEQ_GAIN_2 -42 0x545C //RX_FDEQ_GAIN_3 -43 0x6448 //RX_FDEQ_GAIN_4 -44 0x4848 //RX_FDEQ_GAIN_5 -45 0x5848 //RX_FDEQ_GAIN_6 -46 0x4848 //RX_FDEQ_GAIN_7 -47 0x485A //RX_FDEQ_GAIN_8 -48 0x5A58 //RX_FDEQ_GAIN_9 +40 0x8050 //RX_FDEQ_GAIN_1 +41 0x4840 //RX_FDEQ_GAIN_2 +42 0x4040 //RX_FDEQ_GAIN_3 +43 0x4C68 //RX_FDEQ_GAIN_4 +44 0x403C //RX_FDEQ_GAIN_5 +45 0x3C38 //RX_FDEQ_GAIN_6 +46 0x3430 //RX_FDEQ_GAIN_7 +47 0x303C //RX_FDEQ_GAIN_8 +48 0x4C50 //RX_FDEQ_GAIN_9 49 0x4848 //RX_FDEQ_GAIN_10 50 0x4848 //RX_FDEQ_GAIN_11 51 0x4848 //RX_FDEQ_GAIN_12 @@ -36493,8 +54878,8 @@ 64 0x0203 //RX_FDEQ_BIN_1 65 0x0303 //RX_FDEQ_BIN_2 66 0x0304 //RX_FDEQ_BIN_3 -67 0x0405 //RX_FDEQ_BIN_4 -68 0x0506 //RX_FDEQ_BIN_5 +67 0x0703 //RX_FDEQ_BIN_4 +68 0x0406 //RX_FDEQ_BIN_5 69 0x0708 //RX_FDEQ_BIN_6 70 0x090A //RX_FDEQ_BIN_7 71 0x0B0C //RX_FDEQ_BIN_8 @@ -36537,7 +54922,7 @@ 108 0x7FFF //RX_FDDRC_SLANT_1_2 109 0x7FFF //RX_FDDRC_SLANT_1_3 110 0x0000 //RX_FDDRC_RESRV_0 -129 0x0041 //RX_SPK_VOL +129 0x0037 //RX_SPK_VOL 130 0x0000 //RX_VOL_RESRV_0 #VOL 4 6 0x1000 //RX_TDDRC_ALPHA_UP_1 @@ -36552,8 +54937,8 @@ 34 0x0800 //RX_TDDRC_LIMITER_GAIN 112 0x0002 //RX_TDDRC_THRD_0 113 0x0004 //RX_TDDRC_THRD_1 -114 0x1A00 //RX_TDDRC_THRD_2 -115 0x1A00 //RX_TDDRC_THRD_3 +114 0x1800 //RX_TDDRC_THRD_2 +115 0x1800 //RX_TDDRC_THRD_3 116 0x7FFF //RX_TDDRC_SLANT_0 117 0x7FFF //RX_TDDRC_SLANT_1 118 0x1000 //RX_TDDRC_ALPHA_UP_0 @@ -36562,18 +54947,18 @@ 121 0x199A //RX_TDDRC_HMNC_GAIN 122 0x0001 //RX_TDDRC_SMT_FLAG 123 0x0CCD //RX_TDDRC_SMT_W -124 0x0700 //RX_TDDRC_DRC_GAIN +124 0x0D56 //RX_TDDRC_DRC_GAIN 38 0x0014 //RX_FDEQ_SUBNUM 39 0x8080 //RX_FDEQ_GAIN_0 -40 0x8058 //RX_FDEQ_GAIN_1 -41 0x5454 //RX_FDEQ_GAIN_2 -42 0x545C //RX_FDEQ_GAIN_3 -43 0x6448 //RX_FDEQ_GAIN_4 -44 0x4848 //RX_FDEQ_GAIN_5 -45 0x5848 //RX_FDEQ_GAIN_6 -46 0x4848 //RX_FDEQ_GAIN_7 -47 0x485A //RX_FDEQ_GAIN_8 -48 0x5A58 //RX_FDEQ_GAIN_9 +40 0x8050 //RX_FDEQ_GAIN_1 +41 0x4840 //RX_FDEQ_GAIN_2 +42 0x4040 //RX_FDEQ_GAIN_3 +43 0x4470 //RX_FDEQ_GAIN_4 +44 0x383C //RX_FDEQ_GAIN_5 +45 0x3C3C //RX_FDEQ_GAIN_6 +46 0x3434 //RX_FDEQ_GAIN_7 +47 0x344C //RX_FDEQ_GAIN_8 +48 0x585C //RX_FDEQ_GAIN_9 49 0x4848 //RX_FDEQ_GAIN_10 50 0x4848 //RX_FDEQ_GAIN_11 51 0x4848 //RX_FDEQ_GAIN_12 @@ -36592,8 +54977,8 @@ 64 0x0203 //RX_FDEQ_BIN_1 65 0x0303 //RX_FDEQ_BIN_2 66 0x0304 //RX_FDEQ_BIN_3 -67 0x0405 //RX_FDEQ_BIN_4 -68 0x0506 //RX_FDEQ_BIN_5 +67 0x0703 //RX_FDEQ_BIN_4 +68 0x0406 //RX_FDEQ_BIN_5 69 0x0708 //RX_FDEQ_BIN_6 70 0x090A //RX_FDEQ_BIN_7 71 0x0B0C //RX_FDEQ_BIN_8 @@ -36636,7 +55021,7 @@ 108 0x7FFF //RX_FDDRC_SLANT_1_2 109 0x7FFF //RX_FDDRC_SLANT_1_3 110 0x0000 //RX_FDDRC_RESRV_0 -129 0x005C //RX_SPK_VOL +129 0x002C //RX_SPK_VOL 130 0x0000 //RX_VOL_RESRV_0 #VOL 5 6 0x1000 //RX_TDDRC_ALPHA_UP_1 @@ -36651,8 +55036,8 @@ 34 0x0800 //RX_TDDRC_LIMITER_GAIN 112 0x0002 //RX_TDDRC_THRD_0 113 0x0004 //RX_TDDRC_THRD_1 -114 0x1A00 //RX_TDDRC_THRD_2 -115 0x1A00 //RX_TDDRC_THRD_3 +114 0x1800 //RX_TDDRC_THRD_2 +115 0x1800 //RX_TDDRC_THRD_3 116 0x7FFF //RX_TDDRC_SLANT_0 117 0x7FFF //RX_TDDRC_SLANT_1 118 0x1000 //RX_TDDRC_ALPHA_UP_0 @@ -36661,18 +55046,18 @@ 121 0x199A //RX_TDDRC_HMNC_GAIN 122 0x0001 //RX_TDDRC_SMT_FLAG 123 0x0CCD //RX_TDDRC_SMT_W -124 0x0700 //RX_TDDRC_DRC_GAIN +124 0x0D56 //RX_TDDRC_DRC_GAIN 38 0x0014 //RX_FDEQ_SUBNUM 39 0x8080 //RX_FDEQ_GAIN_0 -40 0x8058 //RX_FDEQ_GAIN_1 -41 0x5454 //RX_FDEQ_GAIN_2 -42 0x545C //RX_FDEQ_GAIN_3 -43 0x6448 //RX_FDEQ_GAIN_4 -44 0x4848 //RX_FDEQ_GAIN_5 -45 0x5848 //RX_FDEQ_GAIN_6 -46 0x4848 //RX_FDEQ_GAIN_7 -47 0x485A //RX_FDEQ_GAIN_8 -48 0x5A58 //RX_FDEQ_GAIN_9 +40 0x8050 //RX_FDEQ_GAIN_1 +41 0x4840 //RX_FDEQ_GAIN_2 +42 0x4040 //RX_FDEQ_GAIN_3 +43 0x4470 //RX_FDEQ_GAIN_4 +44 0x383C //RX_FDEQ_GAIN_5 +45 0x3C3C //RX_FDEQ_GAIN_6 +46 0x3434 //RX_FDEQ_GAIN_7 +47 0x344C //RX_FDEQ_GAIN_8 +48 0x585C //RX_FDEQ_GAIN_9 49 0x4848 //RX_FDEQ_GAIN_10 50 0x4848 //RX_FDEQ_GAIN_11 51 0x4848 //RX_FDEQ_GAIN_12 @@ -36691,8 +55076,8 @@ 64 0x0203 //RX_FDEQ_BIN_1 65 0x0303 //RX_FDEQ_BIN_2 66 0x0304 //RX_FDEQ_BIN_3 -67 0x0405 //RX_FDEQ_BIN_4 -68 0x0506 //RX_FDEQ_BIN_5 +67 0x0703 //RX_FDEQ_BIN_4 +68 0x0406 //RX_FDEQ_BIN_5 69 0x0708 //RX_FDEQ_BIN_6 70 0x090A //RX_FDEQ_BIN_7 71 0x0B0C //RX_FDEQ_BIN_8 @@ -36735,7 +55120,7 @@ 108 0x7FFF //RX_FDDRC_SLANT_1_2 109 0x7FFF //RX_FDDRC_SLANT_1_3 110 0x0000 //RX_FDDRC_RESRV_0 -129 0x008A //RX_SPK_VOL +129 0x0051 //RX_SPK_VOL 130 0x0000 //RX_VOL_RESRV_0 #VOL 6 6 0x1000 //RX_TDDRC_ALPHA_UP_1 @@ -36750,8 +55135,8 @@ 34 0x0800 //RX_TDDRC_LIMITER_GAIN 112 0x0002 //RX_TDDRC_THRD_0 113 0x0004 //RX_TDDRC_THRD_1 -114 0x1A00 //RX_TDDRC_THRD_2 -115 0x1A00 //RX_TDDRC_THRD_3 +114 0x1800 //RX_TDDRC_THRD_2 +115 0x1800 //RX_TDDRC_THRD_3 116 0x7FFF //RX_TDDRC_SLANT_0 117 0x7FFF //RX_TDDRC_SLANT_1 118 0x1000 //RX_TDDRC_ALPHA_UP_0 @@ -36760,18 +55145,18 @@ 121 0x199A //RX_TDDRC_HMNC_GAIN 122 0x0001 //RX_TDDRC_SMT_FLAG 123 0x0CCD //RX_TDDRC_SMT_W -124 0x0700 //RX_TDDRC_DRC_GAIN +124 0x0D56 //RX_TDDRC_DRC_GAIN 38 0x0014 //RX_FDEQ_SUBNUM 39 0x8080 //RX_FDEQ_GAIN_0 -40 0x8058 //RX_FDEQ_GAIN_1 -41 0x5454 //RX_FDEQ_GAIN_2 -42 0x545C //RX_FDEQ_GAIN_3 -43 0x6448 //RX_FDEQ_GAIN_4 -44 0x4848 //RX_FDEQ_GAIN_5 -45 0x5848 //RX_FDEQ_GAIN_6 -46 0x4848 //RX_FDEQ_GAIN_7 -47 0x485A //RX_FDEQ_GAIN_8 -48 0x5A58 //RX_FDEQ_GAIN_9 +40 0x8050 //RX_FDEQ_GAIN_1 +41 0x4840 //RX_FDEQ_GAIN_2 +42 0x4040 //RX_FDEQ_GAIN_3 +43 0x4470 //RX_FDEQ_GAIN_4 +44 0x383C //RX_FDEQ_GAIN_5 +45 0x3C3C //RX_FDEQ_GAIN_6 +46 0x3434 //RX_FDEQ_GAIN_7 +47 0x344C //RX_FDEQ_GAIN_8 +48 0x585C //RX_FDEQ_GAIN_9 49 0x4848 //RX_FDEQ_GAIN_10 50 0x4848 //RX_FDEQ_GAIN_11 51 0x4848 //RX_FDEQ_GAIN_12 @@ -36790,8 +55175,8 @@ 64 0x0203 //RX_FDEQ_BIN_1 65 0x0303 //RX_FDEQ_BIN_2 66 0x0304 //RX_FDEQ_BIN_3 -67 0x0405 //RX_FDEQ_BIN_4 -68 0x0506 //RX_FDEQ_BIN_5 +67 0x0703 //RX_FDEQ_BIN_4 +68 0x0406 //RX_FDEQ_BIN_5 69 0x0708 //RX_FDEQ_BIN_6 70 0x090A //RX_FDEQ_BIN_7 71 0x0B0C //RX_FDEQ_BIN_8 @@ -36836,11 +55221,862 @@ 110 0x0000 //RX_FDDRC_RESRV_0 129 0x0100 //RX_SPK_VOL 130 0x0000 //RX_VOL_RESRV_0 +#RX 2 +157 0x243C //RX_RECVFUNC_MODE_0 +158 0x0000 //RX_RECVFUNC_MODE_1 +159 0x0000 //RX_SAMPLINGFREQ_SIG +160 0x0000 //RX_SAMPLINGFREQ_PROC +161 0x000A //RX_FRAME_SZ +162 0x0000 //RX_DELAY_OPT +163 0x1000 //RX_TDDRC_ALPHA_UP_1 +164 0x1000 //RX_TDDRC_ALPHA_UP_2 +165 0x1000 //RX_TDDRC_ALPHA_UP_3 +166 0x1000 //RX_TDDRC_ALPHA_UP_4 +167 0x0403 //RX_PGA +168 0x7646 //RX_A_HP +169 0x4000 //RX_B_PE +170 0x7800 //RX_THR_PITCH_DET_0 +171 0x7000 //RX_THR_PITCH_DET_1 +172 0x6000 //RX_THR_PITCH_DET_2 +173 0x0008 //RX_PITCH_BFR_LEN +174 0x0003 //RX_SBD_PITCH_DET +175 0x0100 //RX_PP_RESRV_0 +176 0x0020 //RX_PP_RESRV_1 +177 0x0400 //RX_N_SN_EST +178 0x000C //RX_N2_SN_EST +179 0x0010 //RX_NS_LVL_CTRL +180 0xF800 //RX_THR_SN_EST +181 0x7E00 //RX_LAMBDA_PFILT +182 0x000A //RX_FENS_RESRV_0 +183 0x0190 //RX_FENS_RESRV_1 +184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +185 0x4000 //RX_TDDRC_ALPHA_DWN_2 +186 0x4000 //RX_TDDRC_ALPHA_DWN_3 +187 0x0002 //RX_EXTRA_NS_L +188 0x0800 //RX_EXTRA_NS_A +189 0x4000 //RX_TDDRC_ALPHA_DWN_4 +190 0x7214 //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +192 0x199A //RX_A_POST_FLT +193 0x0000 //RX_LMT_THRD +194 0x4000 //RX_LMT_ALPHA +195 0x0014 //RX_FDEQ_SUBNUM +196 0x8080 //RX_FDEQ_GAIN_0 +197 0x8054 //RX_FDEQ_GAIN_1 +198 0x5050 //RX_FDEQ_GAIN_2 +199 0x5058 //RX_FDEQ_GAIN_3 +200 0x5C70 //RX_FDEQ_GAIN_4 +201 0x4848 //RX_FDEQ_GAIN_5 +202 0x484C //RX_FDEQ_GAIN_6 +203 0x4848 //RX_FDEQ_GAIN_7 +204 0x485A //RX_FDEQ_GAIN_8 +205 0x5A58 //RX_FDEQ_GAIN_9 +206 0x4848 //RX_FDEQ_GAIN_10 +207 0x4848 //RX_FDEQ_GAIN_11 +208 0x4848 //RX_FDEQ_GAIN_12 +209 0x4848 //RX_FDEQ_GAIN_13 +210 0x4848 //RX_FDEQ_GAIN_14 +211 0x4848 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0202 //RX_FDEQ_BIN_0 +221 0x0203 //RX_FDEQ_BIN_1 +222 0x0303 //RX_FDEQ_BIN_2 +223 0x0304 //RX_FDEQ_BIN_3 +224 0x0604 //RX_FDEQ_BIN_4 +225 0x0406 //RX_FDEQ_BIN_5 +226 0x0708 //RX_FDEQ_BIN_6 +227 0x090A //RX_FDEQ_BIN_7 +228 0x0B0C //RX_FDEQ_BIN_8 +229 0x0D08 //RX_FDEQ_BIN_9 +230 0x0000 //RX_FDEQ_BIN_10 +231 0x0000 //RX_FDEQ_BIN_11 +232 0x0000 //RX_FDEQ_BIN_12 +233 0x0000 //RX_FDEQ_BIN_13 +234 0x0000 //RX_FDEQ_BIN_14 +235 0x0000 //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x4000 //RX_FDEQ_RESRV_0 +245 0x0320 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0035 //RX_FDDRC_BAND_MARGIN_1 +248 0x0060 //RX_FDDRC_BAND_MARGIN_2 +249 0x0080 //RX_FDDRC_BAND_MARGIN_3 +250 0x0004 //RX_FDDRC_BLOCK_EXP +251 0x0600 //RX_FDDRC_THRD_2_0 +252 0x0600 //RX_FDDRC_THRD_2_1 +253 0x0600 //RX_FDDRC_THRD_2_2 +254 0x0600 //RX_FDDRC_THRD_2_3 +255 0x0800 //RX_FDDRC_THRD_3_0 +256 0x0800 //RX_FDDRC_THRD_3_1 +257 0x0800 //RX_FDDRC_THRD_3_2 +258 0x0800 //RX_FDDRC_THRD_3_3 +259 0x0000 //RX_FDDRC_SLANT_0_0 +260 0x0000 //RX_FDDRC_SLANT_0_1 +261 0x0000 //RX_FDDRC_SLANT_0_2 +262 0x0000 //RX_FDDRC_SLANT_0_3 +263 0x7FFF //RX_FDDRC_SLANT_1_0 +264 0x7FFF //RX_FDDRC_SLANT_1_1 +265 0x7FFF //RX_FDDRC_SLANT_1_2 +266 0x7FFF //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +268 0x0005 //RX_FILTINDX +269 0x0002 //RX_TDDRC_THRD_0 +270 0x0004 //RX_TDDRC_THRD_1 +271 0x1A00 //RX_TDDRC_THRD_2 +272 0x1A00 //RX_TDDRC_THRD_3 +273 0x7FFF //RX_TDDRC_SLANT_0 +274 0x7FFF //RX_TDDRC_SLANT_1 +275 0x1000 //RX_TDDRC_ALPHA_UP_0 +276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x199A //RX_TDDRC_HMNC_GAIN +279 0x0001 //RX_TDDRC_SMT_FLAG +280 0x0CCD //RX_TDDRC_SMT_W +281 0x0780 //RX_TDDRC_DRC_GAIN +282 0x7C00 //RX_LAMBDA_PKA_FP +283 0x1194 //RX_TPKA_FP +284 0x0400 //RX_MIN_G_FP +285 0x0800 //RX_MAX_G_FP +286 0x0015 //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 +288 0x0000 //RX_MAXLEVEL_CNG +289 0x3000 //RX_BWE_UV_TH +290 0x3000 //RX_BWE_UV_TH2 +291 0x1800 //RX_BWE_UV_TH3 +292 0x1000 //RX_BWE_V_TH +293 0x04CD //RX_BWE_GAIN1_V_TH1 +294 0x0F33 //RX_BWE_GAIN1_V_TH2 +295 0x7333 //RX_BWE_UV_EQ +296 0x199A //RX_BWE_V_EQ +297 0x7333 //RX_BWE_TONE_TH +298 0x0004 //RX_BWE_UV_HOLD_T +299 0x6CCD //RX_BWE_GAIN2_ALPHA +300 0x799A //RX_BWE_GAIN3_ALPHA +301 0x001E //RX_BWE_CUTOFF +302 0x3000 //RX_BWE_GAINFILL +303 0x3200 //RX_BWE_MAXTH_TONE +304 0x2000 //RX_BWE_EQ_0 +305 0x2000 //RX_BWE_EQ_1 +306 0x2000 //RX_BWE_EQ_2 +307 0x2000 //RX_BWE_EQ_3 +308 0x2000 //RX_BWE_EQ_4 +309 0x2000 //RX_BWE_EQ_5 +310 0x2000 //RX_BWE_EQ_6 +311 0x0000 //RX_BWE_RESRV_0 +312 0x0000 //RX_BWE_RESRV_1 +313 0x0000 //RX_BWE_RESRV_2 +#VOL 0 +163 0x1000 //RX_TDDRC_ALPHA_UP_1 +164 0x1000 //RX_TDDRC_ALPHA_UP_2 +165 0x1000 //RX_TDDRC_ALPHA_UP_3 +166 0x1000 //RX_TDDRC_ALPHA_UP_4 +184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +185 0x4000 //RX_TDDRC_ALPHA_DWN_2 +186 0x4000 //RX_TDDRC_ALPHA_DWN_3 +189 0x4000 //RX_TDDRC_ALPHA_DWN_4 +190 0x7214 //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +269 0x0002 //RX_TDDRC_THRD_0 +270 0x0004 //RX_TDDRC_THRD_1 +271 0x1800 //RX_TDDRC_THRD_2 +272 0x1800 //RX_TDDRC_THRD_3 +273 0x7FFF //RX_TDDRC_SLANT_0 +274 0x7FFF //RX_TDDRC_SLANT_1 +275 0x1000 //RX_TDDRC_ALPHA_UP_0 +276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x199A //RX_TDDRC_HMNC_GAIN +279 0x0001 //RX_TDDRC_SMT_FLAG +280 0x0CCD //RX_TDDRC_SMT_W +281 0x0780 //RX_TDDRC_DRC_GAIN +195 0x0014 //RX_FDEQ_SUBNUM +196 0x8080 //RX_FDEQ_GAIN_0 +197 0x8050 //RX_FDEQ_GAIN_1 +198 0x4840 //RX_FDEQ_GAIN_2 +199 0x4040 //RX_FDEQ_GAIN_3 +200 0x4C68 //RX_FDEQ_GAIN_4 +201 0x403C //RX_FDEQ_GAIN_5 +202 0x3C38 //RX_FDEQ_GAIN_6 +203 0x3430 //RX_FDEQ_GAIN_7 +204 0x303C //RX_FDEQ_GAIN_8 +205 0x4C50 //RX_FDEQ_GAIN_9 +206 0x4848 //RX_FDEQ_GAIN_10 +207 0x4848 //RX_FDEQ_GAIN_11 +208 0x4848 //RX_FDEQ_GAIN_12 +209 0x4848 //RX_FDEQ_GAIN_13 +210 0x4848 //RX_FDEQ_GAIN_14 +211 0x4848 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0202 //RX_FDEQ_BIN_0 +221 0x0203 //RX_FDEQ_BIN_1 +222 0x0303 //RX_FDEQ_BIN_2 +223 0x0304 //RX_FDEQ_BIN_3 +224 0x0703 //RX_FDEQ_BIN_4 +225 0x0406 //RX_FDEQ_BIN_5 +226 0x0708 //RX_FDEQ_BIN_6 +227 0x090A //RX_FDEQ_BIN_7 +228 0x0B0C //RX_FDEQ_BIN_8 +229 0x0D08 //RX_FDEQ_BIN_9 +230 0x0000 //RX_FDEQ_BIN_10 +231 0x0000 //RX_FDEQ_BIN_11 +232 0x0000 //RX_FDEQ_BIN_12 +233 0x0000 //RX_FDEQ_BIN_13 +234 0x0000 //RX_FDEQ_BIN_14 +235 0x0000 //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x4000 //RX_FDEQ_RESRV_0 +245 0x0320 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0035 //RX_FDDRC_BAND_MARGIN_1 +248 0x0060 //RX_FDDRC_BAND_MARGIN_2 +249 0x0080 //RX_FDDRC_BAND_MARGIN_3 +250 0x0004 //RX_FDDRC_BLOCK_EXP +251 0x0600 //RX_FDDRC_THRD_2_0 +252 0x0600 //RX_FDDRC_THRD_2_1 +253 0x0600 //RX_FDDRC_THRD_2_2 +254 0x0600 //RX_FDDRC_THRD_2_3 +255 0x0800 //RX_FDDRC_THRD_3_0 +256 0x0800 //RX_FDDRC_THRD_3_1 +257 0x0800 //RX_FDDRC_THRD_3_2 +258 0x0800 //RX_FDDRC_THRD_3_3 +259 0x0000 //RX_FDDRC_SLANT_0_0 +260 0x0000 //RX_FDDRC_SLANT_0_1 +261 0x0000 //RX_FDDRC_SLANT_0_2 +262 0x0000 //RX_FDDRC_SLANT_0_3 +263 0x7FFF //RX_FDDRC_SLANT_1_0 +264 0x7FFF //RX_FDDRC_SLANT_1_1 +265 0x7FFF //RX_FDDRC_SLANT_1_2 +266 0x7FFF //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +286 0x0012 //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 +#VOL 1 +163 0x1000 //RX_TDDRC_ALPHA_UP_1 +164 0x1000 //RX_TDDRC_ALPHA_UP_2 +165 0x1000 //RX_TDDRC_ALPHA_UP_3 +166 0x1000 //RX_TDDRC_ALPHA_UP_4 +184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +185 0x4000 //RX_TDDRC_ALPHA_DWN_2 +186 0x4000 //RX_TDDRC_ALPHA_DWN_3 +189 0x4000 //RX_TDDRC_ALPHA_DWN_4 +190 0x7214 //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +269 0x0002 //RX_TDDRC_THRD_0 +270 0x0004 //RX_TDDRC_THRD_1 +271 0x1800 //RX_TDDRC_THRD_2 +272 0x1800 //RX_TDDRC_THRD_3 +273 0x7FFF //RX_TDDRC_SLANT_0 +274 0x7FFF //RX_TDDRC_SLANT_1 +275 0x1000 //RX_TDDRC_ALPHA_UP_0 +276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x199A //RX_TDDRC_HMNC_GAIN +279 0x0001 //RX_TDDRC_SMT_FLAG +280 0x0CCD //RX_TDDRC_SMT_W +281 0x0780 //RX_TDDRC_DRC_GAIN +195 0x0014 //RX_FDEQ_SUBNUM +196 0x8080 //RX_FDEQ_GAIN_0 +197 0x8050 //RX_FDEQ_GAIN_1 +198 0x4840 //RX_FDEQ_GAIN_2 +199 0x4040 //RX_FDEQ_GAIN_3 +200 0x4C68 //RX_FDEQ_GAIN_4 +201 0x403C //RX_FDEQ_GAIN_5 +202 0x3C38 //RX_FDEQ_GAIN_6 +203 0x3430 //RX_FDEQ_GAIN_7 +204 0x303C //RX_FDEQ_GAIN_8 +205 0x4C50 //RX_FDEQ_GAIN_9 +206 0x4848 //RX_FDEQ_GAIN_10 +207 0x4848 //RX_FDEQ_GAIN_11 +208 0x4848 //RX_FDEQ_GAIN_12 +209 0x4848 //RX_FDEQ_GAIN_13 +210 0x4848 //RX_FDEQ_GAIN_14 +211 0x4848 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0202 //RX_FDEQ_BIN_0 +221 0x0203 //RX_FDEQ_BIN_1 +222 0x0303 //RX_FDEQ_BIN_2 +223 0x0304 //RX_FDEQ_BIN_3 +224 0x0703 //RX_FDEQ_BIN_4 +225 0x0406 //RX_FDEQ_BIN_5 +226 0x0708 //RX_FDEQ_BIN_6 +227 0x090A //RX_FDEQ_BIN_7 +228 0x0B0C //RX_FDEQ_BIN_8 +229 0x0D08 //RX_FDEQ_BIN_9 +230 0x0000 //RX_FDEQ_BIN_10 +231 0x0000 //RX_FDEQ_BIN_11 +232 0x0000 //RX_FDEQ_BIN_12 +233 0x0000 //RX_FDEQ_BIN_13 +234 0x0000 //RX_FDEQ_BIN_14 +235 0x0000 //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x4000 //RX_FDEQ_RESRV_0 +245 0x0320 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0035 //RX_FDDRC_BAND_MARGIN_1 +248 0x0060 //RX_FDDRC_BAND_MARGIN_2 +249 0x0080 //RX_FDDRC_BAND_MARGIN_3 +250 0x0004 //RX_FDDRC_BLOCK_EXP +251 0x0600 //RX_FDDRC_THRD_2_0 +252 0x0600 //RX_FDDRC_THRD_2_1 +253 0x0600 //RX_FDDRC_THRD_2_2 +254 0x0600 //RX_FDDRC_THRD_2_3 +255 0x0800 //RX_FDDRC_THRD_3_0 +256 0x0800 //RX_FDDRC_THRD_3_1 +257 0x0800 //RX_FDDRC_THRD_3_2 +258 0x0800 //RX_FDDRC_THRD_3_3 +259 0x0000 //RX_FDDRC_SLANT_0_0 +260 0x0000 //RX_FDDRC_SLANT_0_1 +261 0x0000 //RX_FDDRC_SLANT_0_2 +262 0x0000 //RX_FDDRC_SLANT_0_3 +263 0x7FFF //RX_FDDRC_SLANT_1_0 +264 0x7FFF //RX_FDDRC_SLANT_1_1 +265 0x7FFF //RX_FDDRC_SLANT_1_2 +266 0x7FFF //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +286 0x001B //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 +#VOL 2 +163 0x1000 //RX_TDDRC_ALPHA_UP_1 +164 0x1000 //RX_TDDRC_ALPHA_UP_2 +165 0x1000 //RX_TDDRC_ALPHA_UP_3 +166 0x1000 //RX_TDDRC_ALPHA_UP_4 +184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +185 0x4000 //RX_TDDRC_ALPHA_DWN_2 +186 0x4000 //RX_TDDRC_ALPHA_DWN_3 +189 0x4000 //RX_TDDRC_ALPHA_DWN_4 +190 0x7214 //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +269 0x0002 //RX_TDDRC_THRD_0 +270 0x0004 //RX_TDDRC_THRD_1 +271 0x1800 //RX_TDDRC_THRD_2 +272 0x1800 //RX_TDDRC_THRD_3 +273 0x7FFF //RX_TDDRC_SLANT_0 +274 0x7FFF //RX_TDDRC_SLANT_1 +275 0x1000 //RX_TDDRC_ALPHA_UP_0 +276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x199A //RX_TDDRC_HMNC_GAIN +279 0x0001 //RX_TDDRC_SMT_FLAG +280 0x0CCD //RX_TDDRC_SMT_W +281 0x0780 //RX_TDDRC_DRC_GAIN +195 0x0014 //RX_FDEQ_SUBNUM +196 0x8080 //RX_FDEQ_GAIN_0 +197 0x8050 //RX_FDEQ_GAIN_1 +198 0x4840 //RX_FDEQ_GAIN_2 +199 0x4040 //RX_FDEQ_GAIN_3 +200 0x4C68 //RX_FDEQ_GAIN_4 +201 0x403C //RX_FDEQ_GAIN_5 +202 0x3C38 //RX_FDEQ_GAIN_6 +203 0x3430 //RX_FDEQ_GAIN_7 +204 0x303C //RX_FDEQ_GAIN_8 +205 0x4C50 //RX_FDEQ_GAIN_9 +206 0x4848 //RX_FDEQ_GAIN_10 +207 0x4848 //RX_FDEQ_GAIN_11 +208 0x4848 //RX_FDEQ_GAIN_12 +209 0x4848 //RX_FDEQ_GAIN_13 +210 0x4848 //RX_FDEQ_GAIN_14 +211 0x4848 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0202 //RX_FDEQ_BIN_0 +221 0x0203 //RX_FDEQ_BIN_1 +222 0x0303 //RX_FDEQ_BIN_2 +223 0x0304 //RX_FDEQ_BIN_3 +224 0x0703 //RX_FDEQ_BIN_4 +225 0x0406 //RX_FDEQ_BIN_5 +226 0x0708 //RX_FDEQ_BIN_6 +227 0x090A //RX_FDEQ_BIN_7 +228 0x0B0C //RX_FDEQ_BIN_8 +229 0x0D08 //RX_FDEQ_BIN_9 +230 0x0000 //RX_FDEQ_BIN_10 +231 0x0000 //RX_FDEQ_BIN_11 +232 0x0000 //RX_FDEQ_BIN_12 +233 0x0000 //RX_FDEQ_BIN_13 +234 0x0000 //RX_FDEQ_BIN_14 +235 0x0000 //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x4000 //RX_FDEQ_RESRV_0 +245 0x0320 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0035 //RX_FDDRC_BAND_MARGIN_1 +248 0x0060 //RX_FDDRC_BAND_MARGIN_2 +249 0x0080 //RX_FDDRC_BAND_MARGIN_3 +250 0x0004 //RX_FDDRC_BLOCK_EXP +251 0x0600 //RX_FDDRC_THRD_2_0 +252 0x0600 //RX_FDDRC_THRD_2_1 +253 0x0600 //RX_FDDRC_THRD_2_2 +254 0x0600 //RX_FDDRC_THRD_2_3 +255 0x0800 //RX_FDDRC_THRD_3_0 +256 0x0800 //RX_FDDRC_THRD_3_1 +257 0x0800 //RX_FDDRC_THRD_3_2 +258 0x0800 //RX_FDDRC_THRD_3_3 +259 0x0000 //RX_FDDRC_SLANT_0_0 +260 0x0000 //RX_FDDRC_SLANT_0_1 +261 0x0000 //RX_FDDRC_SLANT_0_2 +262 0x0000 //RX_FDDRC_SLANT_0_3 +263 0x7FFF //RX_FDDRC_SLANT_1_0 +264 0x7FFF //RX_FDDRC_SLANT_1_1 +265 0x7FFF //RX_FDDRC_SLANT_1_2 +266 0x7FFF //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +286 0x0026 //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 +#VOL 3 +163 0x1000 //RX_TDDRC_ALPHA_UP_1 +164 0x1000 //RX_TDDRC_ALPHA_UP_2 +165 0x1000 //RX_TDDRC_ALPHA_UP_3 +166 0x1000 //RX_TDDRC_ALPHA_UP_4 +184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +185 0x4000 //RX_TDDRC_ALPHA_DWN_2 +186 0x4000 //RX_TDDRC_ALPHA_DWN_3 +189 0x4000 //RX_TDDRC_ALPHA_DWN_4 +190 0x7214 //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +269 0x0002 //RX_TDDRC_THRD_0 +270 0x0004 //RX_TDDRC_THRD_1 +271 0x1800 //RX_TDDRC_THRD_2 +272 0x1800 //RX_TDDRC_THRD_3 +273 0x7FFF //RX_TDDRC_SLANT_0 +274 0x7FFF //RX_TDDRC_SLANT_1 +275 0x1000 //RX_TDDRC_ALPHA_UP_0 +276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x199A //RX_TDDRC_HMNC_GAIN +279 0x0001 //RX_TDDRC_SMT_FLAG +280 0x0CCD //RX_TDDRC_SMT_W +281 0x0780 //RX_TDDRC_DRC_GAIN +195 0x0014 //RX_FDEQ_SUBNUM +196 0x8080 //RX_FDEQ_GAIN_0 +197 0x8050 //RX_FDEQ_GAIN_1 +198 0x4840 //RX_FDEQ_GAIN_2 +199 0x4040 //RX_FDEQ_GAIN_3 +200 0x4C68 //RX_FDEQ_GAIN_4 +201 0x403C //RX_FDEQ_GAIN_5 +202 0x3C38 //RX_FDEQ_GAIN_6 +203 0x3430 //RX_FDEQ_GAIN_7 +204 0x303C //RX_FDEQ_GAIN_8 +205 0x4C50 //RX_FDEQ_GAIN_9 +206 0x4848 //RX_FDEQ_GAIN_10 +207 0x4848 //RX_FDEQ_GAIN_11 +208 0x4848 //RX_FDEQ_GAIN_12 +209 0x4848 //RX_FDEQ_GAIN_13 +210 0x4848 //RX_FDEQ_GAIN_14 +211 0x4848 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0202 //RX_FDEQ_BIN_0 +221 0x0203 //RX_FDEQ_BIN_1 +222 0x0303 //RX_FDEQ_BIN_2 +223 0x0304 //RX_FDEQ_BIN_3 +224 0x0703 //RX_FDEQ_BIN_4 +225 0x0406 //RX_FDEQ_BIN_5 +226 0x0708 //RX_FDEQ_BIN_6 +227 0x090A //RX_FDEQ_BIN_7 +228 0x0B0C //RX_FDEQ_BIN_8 +229 0x0D08 //RX_FDEQ_BIN_9 +230 0x0000 //RX_FDEQ_BIN_10 +231 0x0000 //RX_FDEQ_BIN_11 +232 0x0000 //RX_FDEQ_BIN_12 +233 0x0000 //RX_FDEQ_BIN_13 +234 0x0000 //RX_FDEQ_BIN_14 +235 0x0000 //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x4000 //RX_FDEQ_RESRV_0 +245 0x0320 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0035 //RX_FDDRC_BAND_MARGIN_1 +248 0x0060 //RX_FDDRC_BAND_MARGIN_2 +249 0x0080 //RX_FDDRC_BAND_MARGIN_3 +250 0x0004 //RX_FDDRC_BLOCK_EXP +251 0x0600 //RX_FDDRC_THRD_2_0 +252 0x0600 //RX_FDDRC_THRD_2_1 +253 0x0600 //RX_FDDRC_THRD_2_2 +254 0x0600 //RX_FDDRC_THRD_2_3 +255 0x0800 //RX_FDDRC_THRD_3_0 +256 0x0800 //RX_FDDRC_THRD_3_1 +257 0x0800 //RX_FDDRC_THRD_3_2 +258 0x0800 //RX_FDDRC_THRD_3_3 +259 0x0000 //RX_FDDRC_SLANT_0_0 +260 0x0000 //RX_FDDRC_SLANT_0_1 +261 0x0000 //RX_FDDRC_SLANT_0_2 +262 0x0000 //RX_FDDRC_SLANT_0_3 +263 0x7FFF //RX_FDDRC_SLANT_1_0 +264 0x7FFF //RX_FDDRC_SLANT_1_1 +265 0x7FFF //RX_FDDRC_SLANT_1_2 +266 0x7FFF //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +286 0x0037 //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 +#VOL 4 +163 0x1000 //RX_TDDRC_ALPHA_UP_1 +164 0x1000 //RX_TDDRC_ALPHA_UP_2 +165 0x1000 //RX_TDDRC_ALPHA_UP_3 +166 0x1000 //RX_TDDRC_ALPHA_UP_4 +184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +185 0x4000 //RX_TDDRC_ALPHA_DWN_2 +186 0x4000 //RX_TDDRC_ALPHA_DWN_3 +189 0x4000 //RX_TDDRC_ALPHA_DWN_4 +190 0x7214 //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +269 0x0002 //RX_TDDRC_THRD_0 +270 0x0004 //RX_TDDRC_THRD_1 +271 0x1800 //RX_TDDRC_THRD_2 +272 0x1800 //RX_TDDRC_THRD_3 +273 0x7FFF //RX_TDDRC_SLANT_0 +274 0x7FFF //RX_TDDRC_SLANT_1 +275 0x1000 //RX_TDDRC_ALPHA_UP_0 +276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x199A //RX_TDDRC_HMNC_GAIN +279 0x0001 //RX_TDDRC_SMT_FLAG +280 0x0CCD //RX_TDDRC_SMT_W +281 0x0D56 //RX_TDDRC_DRC_GAIN +195 0x0014 //RX_FDEQ_SUBNUM +196 0x8080 //RX_FDEQ_GAIN_0 +197 0x8050 //RX_FDEQ_GAIN_1 +198 0x4840 //RX_FDEQ_GAIN_2 +199 0x4040 //RX_FDEQ_GAIN_3 +200 0x4470 //RX_FDEQ_GAIN_4 +201 0x383C //RX_FDEQ_GAIN_5 +202 0x3C3C //RX_FDEQ_GAIN_6 +203 0x3434 //RX_FDEQ_GAIN_7 +204 0x344C //RX_FDEQ_GAIN_8 +205 0x585C //RX_FDEQ_GAIN_9 +206 0x4848 //RX_FDEQ_GAIN_10 +207 0x4848 //RX_FDEQ_GAIN_11 +208 0x4848 //RX_FDEQ_GAIN_12 +209 0x4848 //RX_FDEQ_GAIN_13 +210 0x4848 //RX_FDEQ_GAIN_14 +211 0x4848 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0202 //RX_FDEQ_BIN_0 +221 0x0203 //RX_FDEQ_BIN_1 +222 0x0303 //RX_FDEQ_BIN_2 +223 0x0304 //RX_FDEQ_BIN_3 +224 0x0703 //RX_FDEQ_BIN_4 +225 0x0406 //RX_FDEQ_BIN_5 +226 0x0708 //RX_FDEQ_BIN_6 +227 0x090A //RX_FDEQ_BIN_7 +228 0x0B0C //RX_FDEQ_BIN_8 +229 0x0D08 //RX_FDEQ_BIN_9 +230 0x0000 //RX_FDEQ_BIN_10 +231 0x0000 //RX_FDEQ_BIN_11 +232 0x0000 //RX_FDEQ_BIN_12 +233 0x0000 //RX_FDEQ_BIN_13 +234 0x0000 //RX_FDEQ_BIN_14 +235 0x0000 //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x4000 //RX_FDEQ_RESRV_0 +245 0x0320 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0035 //RX_FDDRC_BAND_MARGIN_1 +248 0x0060 //RX_FDDRC_BAND_MARGIN_2 +249 0x0080 //RX_FDDRC_BAND_MARGIN_3 +250 0x0004 //RX_FDDRC_BLOCK_EXP +251 0x0600 //RX_FDDRC_THRD_2_0 +252 0x0600 //RX_FDDRC_THRD_2_1 +253 0x0600 //RX_FDDRC_THRD_2_2 +254 0x0600 //RX_FDDRC_THRD_2_3 +255 0x0800 //RX_FDDRC_THRD_3_0 +256 0x0800 //RX_FDDRC_THRD_3_1 +257 0x0800 //RX_FDDRC_THRD_3_2 +258 0x0800 //RX_FDDRC_THRD_3_3 +259 0x0000 //RX_FDDRC_SLANT_0_0 +260 0x0000 //RX_FDDRC_SLANT_0_1 +261 0x0000 //RX_FDDRC_SLANT_0_2 +262 0x0000 //RX_FDDRC_SLANT_0_3 +263 0x7FFF //RX_FDDRC_SLANT_1_0 +264 0x7FFF //RX_FDDRC_SLANT_1_1 +265 0x7FFF //RX_FDDRC_SLANT_1_2 +266 0x7FFF //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +286 0x002C //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 +#VOL 5 +163 0x1000 //RX_TDDRC_ALPHA_UP_1 +164 0x1000 //RX_TDDRC_ALPHA_UP_2 +165 0x1000 //RX_TDDRC_ALPHA_UP_3 +166 0x1000 //RX_TDDRC_ALPHA_UP_4 +184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +185 0x4000 //RX_TDDRC_ALPHA_DWN_2 +186 0x4000 //RX_TDDRC_ALPHA_DWN_3 +189 0x4000 //RX_TDDRC_ALPHA_DWN_4 +190 0x7214 //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +269 0x0002 //RX_TDDRC_THRD_0 +270 0x0004 //RX_TDDRC_THRD_1 +271 0x1800 //RX_TDDRC_THRD_2 +272 0x1800 //RX_TDDRC_THRD_3 +273 0x7FFF //RX_TDDRC_SLANT_0 +274 0x7FFF //RX_TDDRC_SLANT_1 +275 0x1000 //RX_TDDRC_ALPHA_UP_0 +276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x199A //RX_TDDRC_HMNC_GAIN +279 0x0001 //RX_TDDRC_SMT_FLAG +280 0x0CCD //RX_TDDRC_SMT_W +281 0x0D56 //RX_TDDRC_DRC_GAIN +195 0x0014 //RX_FDEQ_SUBNUM +196 0x8080 //RX_FDEQ_GAIN_0 +197 0x8050 //RX_FDEQ_GAIN_1 +198 0x4840 //RX_FDEQ_GAIN_2 +199 0x4040 //RX_FDEQ_GAIN_3 +200 0x4470 //RX_FDEQ_GAIN_4 +201 0x383C //RX_FDEQ_GAIN_5 +202 0x3C3C //RX_FDEQ_GAIN_6 +203 0x3434 //RX_FDEQ_GAIN_7 +204 0x344C //RX_FDEQ_GAIN_8 +205 0x585C //RX_FDEQ_GAIN_9 +206 0x4848 //RX_FDEQ_GAIN_10 +207 0x4848 //RX_FDEQ_GAIN_11 +208 0x4848 //RX_FDEQ_GAIN_12 +209 0x4848 //RX_FDEQ_GAIN_13 +210 0x4848 //RX_FDEQ_GAIN_14 +211 0x4848 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0202 //RX_FDEQ_BIN_0 +221 0x0203 //RX_FDEQ_BIN_1 +222 0x0303 //RX_FDEQ_BIN_2 +223 0x0304 //RX_FDEQ_BIN_3 +224 0x0703 //RX_FDEQ_BIN_4 +225 0x0406 //RX_FDEQ_BIN_5 +226 0x0708 //RX_FDEQ_BIN_6 +227 0x090A //RX_FDEQ_BIN_7 +228 0x0B0C //RX_FDEQ_BIN_8 +229 0x0D08 //RX_FDEQ_BIN_9 +230 0x0000 //RX_FDEQ_BIN_10 +231 0x0000 //RX_FDEQ_BIN_11 +232 0x0000 //RX_FDEQ_BIN_12 +233 0x0000 //RX_FDEQ_BIN_13 +234 0x0000 //RX_FDEQ_BIN_14 +235 0x0000 //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x4000 //RX_FDEQ_RESRV_0 +245 0x0320 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0035 //RX_FDDRC_BAND_MARGIN_1 +248 0x0060 //RX_FDDRC_BAND_MARGIN_2 +249 0x0080 //RX_FDDRC_BAND_MARGIN_3 +250 0x0004 //RX_FDDRC_BLOCK_EXP +251 0x0600 //RX_FDDRC_THRD_2_0 +252 0x0600 //RX_FDDRC_THRD_2_1 +253 0x0600 //RX_FDDRC_THRD_2_2 +254 0x0600 //RX_FDDRC_THRD_2_3 +255 0x0800 //RX_FDDRC_THRD_3_0 +256 0x0800 //RX_FDDRC_THRD_3_1 +257 0x0800 //RX_FDDRC_THRD_3_2 +258 0x0800 //RX_FDDRC_THRD_3_3 +259 0x0000 //RX_FDDRC_SLANT_0_0 +260 0x0000 //RX_FDDRC_SLANT_0_1 +261 0x0000 //RX_FDDRC_SLANT_0_2 +262 0x0000 //RX_FDDRC_SLANT_0_3 +263 0x7FFF //RX_FDDRC_SLANT_1_0 +264 0x7FFF //RX_FDDRC_SLANT_1_1 +265 0x7FFF //RX_FDDRC_SLANT_1_2 +266 0x7FFF //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +286 0x0051 //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 +#VOL 6 +163 0x1000 //RX_TDDRC_ALPHA_UP_1 +164 0x1000 //RX_TDDRC_ALPHA_UP_2 +165 0x1000 //RX_TDDRC_ALPHA_UP_3 +166 0x1000 //RX_TDDRC_ALPHA_UP_4 +184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +185 0x4000 //RX_TDDRC_ALPHA_DWN_2 +186 0x4000 //RX_TDDRC_ALPHA_DWN_3 +189 0x4000 //RX_TDDRC_ALPHA_DWN_4 +190 0x7214 //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +269 0x0002 //RX_TDDRC_THRD_0 +270 0x0004 //RX_TDDRC_THRD_1 +271 0x1800 //RX_TDDRC_THRD_2 +272 0x1800 //RX_TDDRC_THRD_3 +273 0x7FFF //RX_TDDRC_SLANT_0 +274 0x7FFF //RX_TDDRC_SLANT_1 +275 0x1000 //RX_TDDRC_ALPHA_UP_0 +276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x199A //RX_TDDRC_HMNC_GAIN +279 0x0001 //RX_TDDRC_SMT_FLAG +280 0x0CCD //RX_TDDRC_SMT_W +281 0x0D56 //RX_TDDRC_DRC_GAIN +195 0x0014 //RX_FDEQ_SUBNUM +196 0x8080 //RX_FDEQ_GAIN_0 +197 0x8050 //RX_FDEQ_GAIN_1 +198 0x4840 //RX_FDEQ_GAIN_2 +199 0x4040 //RX_FDEQ_GAIN_3 +200 0x4470 //RX_FDEQ_GAIN_4 +201 0x383C //RX_FDEQ_GAIN_5 +202 0x3C3C //RX_FDEQ_GAIN_6 +203 0x3434 //RX_FDEQ_GAIN_7 +204 0x344C //RX_FDEQ_GAIN_8 +205 0x585C //RX_FDEQ_GAIN_9 +206 0x4848 //RX_FDEQ_GAIN_10 +207 0x4848 //RX_FDEQ_GAIN_11 +208 0x4848 //RX_FDEQ_GAIN_12 +209 0x4848 //RX_FDEQ_GAIN_13 +210 0x4848 //RX_FDEQ_GAIN_14 +211 0x4848 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0202 //RX_FDEQ_BIN_0 +221 0x0203 //RX_FDEQ_BIN_1 +222 0x0303 //RX_FDEQ_BIN_2 +223 0x0304 //RX_FDEQ_BIN_3 +224 0x0703 //RX_FDEQ_BIN_4 +225 0x0406 //RX_FDEQ_BIN_5 +226 0x0708 //RX_FDEQ_BIN_6 +227 0x090A //RX_FDEQ_BIN_7 +228 0x0B0C //RX_FDEQ_BIN_8 +229 0x0D08 //RX_FDEQ_BIN_9 +230 0x0000 //RX_FDEQ_BIN_10 +231 0x0000 //RX_FDEQ_BIN_11 +232 0x0000 //RX_FDEQ_BIN_12 +233 0x0000 //RX_FDEQ_BIN_13 +234 0x0000 //RX_FDEQ_BIN_14 +235 0x0000 //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x4000 //RX_FDEQ_RESRV_0 +245 0x0320 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0035 //RX_FDDRC_BAND_MARGIN_1 +248 0x0060 //RX_FDDRC_BAND_MARGIN_2 +249 0x0080 //RX_FDDRC_BAND_MARGIN_3 +250 0x0004 //RX_FDDRC_BLOCK_EXP +251 0x0600 //RX_FDDRC_THRD_2_0 +252 0x0600 //RX_FDDRC_THRD_2_1 +253 0x0600 //RX_FDDRC_THRD_2_2 +254 0x0600 //RX_FDDRC_THRD_2_3 +255 0x0800 //RX_FDDRC_THRD_3_0 +256 0x0800 //RX_FDDRC_THRD_3_1 +257 0x0800 //RX_FDDRC_THRD_3_2 +258 0x0800 //RX_FDDRC_THRD_3_3 +259 0x0000 //RX_FDDRC_SLANT_0_0 +260 0x0000 //RX_FDDRC_SLANT_0_1 +261 0x0000 //RX_FDDRC_SLANT_0_2 +262 0x0000 //RX_FDDRC_SLANT_0_3 +263 0x7FFF //RX_FDDRC_SLANT_1_0 +264 0x7FFF //RX_FDDRC_SLANT_1_1 +265 0x7FFF //RX_FDDRC_SLANT_1_2 +266 0x7FFF //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +286 0x0100 //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 #CASE_NAME HEADSET-TTY_HCO-VOICE_GENERIC-WB -#PARAM_MODE FULL -#PARAM_TYPE TX+RX -#TOTAL_CUSTOM_STEP 7 +#PARAM_MODE Full +#PARAM_TYPE TX+2RX +#TOTAL_CUSTOM_STEP 7+7 #TX 0 0x0001 //TX_OPERATION_MODE_0 1 0x0000 //TX_OPERATION_MODE_1 @@ -37084,7 +56320,7 @@ 239 0x0000 //TX_DT_RESRV_7 240 0x0000 //TX_DT_RESRV_8 241 0x0000 //TX_DT_RESRV_9 -242 0xF200 //TX_THR_SN_EST_0 +242 0xFA00 //TX_THR_SN_EST_0 243 0xF400 //TX_THR_SN_EST_1 244 0xF800 //TX_THR_SN_EST_2 245 0xF600 //TX_THR_SN_EST_3 @@ -37093,12 +56329,12 @@ 248 0xF800 //TX_THR_SN_EST_6 249 0xF800 //TX_THR_SN_EST_7 250 0x0100 //TX_DELTA_THR_SN_EST_0 -251 0x0000 //TX_DELTA_THR_SN_EST_1 +251 0x0100 //TX_DELTA_THR_SN_EST_1 252 0x0100 //TX_DELTA_THR_SN_EST_2 -253 0x0100 //TX_DELTA_THR_SN_EST_3 +253 0x0200 //TX_DELTA_THR_SN_EST_3 254 0x0200 //TX_DELTA_THR_SN_EST_4 255 0x0200 //TX_DELTA_THR_SN_EST_5 -256 0x0200 //TX_DELTA_THR_SN_EST_6 +256 0x0000 //TX_DELTA_THR_SN_EST_6 257 0x0200 //TX_DELTA_THR_SN_EST_7 258 0x4000 //TX_LAMBDA_NN_EST_0 259 0x4000 //TX_LAMBDA_NN_EST_1 @@ -37124,12 +56360,12 @@ 279 0x0000 //TX_B_POST_FLT_0 280 0x0000 //TX_B_POST_FLT_1 281 0x001A //TX_NS_LVL_CTRL_0 -282 0x001A //TX_NS_LVL_CTRL_1 +282 0x0014 //TX_NS_LVL_CTRL_1 283 0x0014 //TX_NS_LVL_CTRL_2 -284 0x0014 //TX_NS_LVL_CTRL_3 +284 0x000C //TX_NS_LVL_CTRL_3 285 0x000C //TX_NS_LVL_CTRL_4 286 0x000C //TX_NS_LVL_CTRL_5 -287 0x000C //TX_NS_LVL_CTRL_6 +287 0x001A //TX_NS_LVL_CTRL_6 288 0x000C //TX_NS_LVL_CTRL_7 289 0x000E //TX_MIN_GAIN_S_0 290 0x0014 //TX_MIN_GAIN_S_1 @@ -37145,10 +56381,10 @@ 300 0x7FFF //TX_SNRI_SUP_0 301 0x7FFF //TX_SNRI_SUP_1 302 0x7FFF //TX_SNRI_SUP_2 -303 0x7FFF //TX_SNRI_SUP_3 +303 0x4000 //TX_SNRI_SUP_3 304 0x4000 //TX_SNRI_SUP_4 305 0x4000 //TX_SNRI_SUP_5 -306 0x4000 //TX_SNRI_SUP_6 +306 0x7FFF //TX_SNRI_SUP_6 307 0x4000 //TX_SNRI_SUP_7 308 0x1200 //TX_THR_LFNS 309 0x0147 //TX_G_LFNS @@ -37157,12 +56393,12 @@ 312 0x7FFF //TX_A_POST_FILT_0 313 0x7FFF //TX_A_POST_FILT_1 314 0x4000 //TX_A_POST_FILT_S_0 -315 0x199A //TX_A_POST_FILT_S_1 +315 0x1000 //TX_A_POST_FILT_S_1 316 0x1000 //TX_A_POST_FILT_S_2 -317 0x1000 //TX_A_POST_FILT_S_3 +317 0x6666 //TX_A_POST_FILT_S_3 318 0x6666 //TX_A_POST_FILT_S_4 319 0x6666 //TX_A_POST_FILT_S_5 -320 0x6666 //TX_A_POST_FILT_S_6 +320 0x199A //TX_A_POST_FILT_S_6 321 0x6666 //TX_A_POST_FILT_S_7 322 0x2000 //TX_B_POST_FILT_0 323 0x2000 //TX_B_POST_FILT_1 @@ -37209,7 +56445,7 @@ 364 0x0000 //TX_K_APT 365 0x0001 //TX_NOISEDET 366 0x05A0 //TX_NDETCT -367 0x000A //TX_NOISE_TH_0 +367 0x0102 //TX_NOISE_TH_0 368 0x1388 //TX_NOISE_TH_0_2 369 0x3A98 //TX_NOISE_TH_0_3 370 0x0C80 //TX_NOISE_TH_1 @@ -37221,11 +56457,11 @@ 376 0x7FFF //TX_NOISE_TH_5_3 377 0x7FFF //TX_NOISE_TH_5_4 378 0x00C8 //TX_NOISE_TH_6 -379 0x000A //TX_MINENOISE_TH -380 0x0000 //TX_MINENOISE_MIC0_TH_MTS -381 0x0000 //TX_MINENOISE_MIC0_TH_EXP -382 0x0000 //TX_MINENOISE_MIC0_S_TH_MTS -383 0x0000 //TX_MINENOISE_MIC0_S_TH_EXP +379 0x00F8 //TX_MINENOISE_TH +380 0xD508 //TX_MORENS_TFMASK_TH +381 0x0001 //TX_DRC_QUIET_FLOOR +382 0x3A98 //TX_RATIODTL_CUT_TH +383 0x0DAC //TX_DT_CUT_K1 384 0x6400 //TX_OUT_ENER_S_TH_CLEAN 385 0x6400 //TX_OUT_ENER_S_TH_LESSCLEAN 386 0x6400 //TX_OUT_ENER_S_TH_NOISY @@ -37233,22 +56469,22 @@ 388 0x7D00 //TX_OUT_ENER_TH_SPEECH 389 0x0000 //TX_SN_NPB_GAIN 390 0x0000 //TX_NN_NPB_GAIN -391 0x0000 //TX_CSX_ALPHA_0 -392 0x0000 //TX_CSX_ALPHA_1 -393 0x0000 //TX_CSX_ALPHA_2 -394 0x0000 //TX_CSX_ALPHA_3 -395 0x0000 //TX_MU_ARSP_EST -396 0x0000 //TX_P_OUTBEAM_MIN_TH +391 0x7FFF //TX_POST_MASK_SUP_HSNE +392 0x1388 //TX_TAIL_DET_TH +393 0x4000 //TX_B_LESSCUT_RTO_WTA +394 0x0000 //TX_MEL_G_R +395 0x0080 //TX_SUPHIGH_TH +396 0x0000 //TX_MASK_G_R 397 0x0000 //TX_EXTRA_NS_L -398 0x0000 //TX_EXTRA_NS_A -399 0x0000 //TX_VR_NOISE_FLOOR_TH +398 0x1800 //TX_C_POST_FLT_MASK +399 0x7FFF //TX_A_POST_FLT_WNS 400 0x0000 //TX_MIN_G_LOW300HZ 401 0x0010 //TX_MAXLEVEL_CNG 402 0x0000 //TX_STN_NOISE_TH 403 0x0000 //TX_POST_MASK_SUP 404 0x0000 //TX_POST_MASK_ADJUST 405 0x0014 //TX_NS_ENOISE_MIC0_TH -406 0x0014 //TX_MINENOISE_MIC0_TH +406 0x00DC //TX_MINENOISE_MIC0_TH 407 0x0226 //TX_MINENOISE_MIC0_S_TH 408 0x2879 //TX_MIN_G_CTRL_SSNS 409 0x0400 //TX_METAL_RTO_THR @@ -37356,16 +56592,16 @@ 511 0x6666 //TX_MIC_TO_BFGAIN 512 0x6666 //TX_MICTOBFGAIN0 513 0x0014 //TX_FASTMUE_TH -514 0x0000 //TX_DERVB_LEN_0 -515 0x0000 //TX_DERVB_LEN_1 -516 0x0000 //TX_RHO_DERVB -517 0x0000 //TX_MIC_INDX_DERVB -518 0x0000 //TX_MU_DERVB -519 0x0000 //TX_DR_RESRV_0 -520 0x0000 //TX_DR_RESRV_1 -521 0x0000 //TX_DR_RESRV_2 -522 0x0000 //TX_DR_RESRV_3 -523 0x0000 //TX_DR_RESRV_4 +514 0xC000 //TX_DEREVERB_LF_MU +515 0xC000 //TX_DEREVERB_HF_MU +516 0xCCCC //TX_DEREVERB_DELAY +517 0xD999 //TX_DEREVERB_COEF_LEN +518 0x1F40 //TX_DEREVERB_DNR +519 0x0000 //TX_DEREVERB_ALPHA +520 0x0000 //TX_DEREVERB_BETA +521 0x0000 //TX_GSC_RTOL_TH +522 0x7000 //TX_GSC_RTOH_TH +523 0x0064 //TX_WIDE2_MEANHTH 524 0x0000 //TX_DR_RESRV_5 525 0x0000 //TX_DR_RESRV_6 526 0x0000 //TX_DR_RESRV_7 @@ -37731,16 +56967,81 @@ 886 0x0000 //TX_FASTNS_TFMASKBIN_TH2 887 0x0000 //TX_FASTNS_TFMASKBIN_TH3 888 0x00C8 //TX_FASTNS_ARSPC_TH -889 0xD99A //TX_FASTNS_MASK5_TH +889 0xC000 //TX_FASTNS_MASK5_TH 890 0x051F //TX_POSTSSA_MIN_G_VR_MASK -891 0x7FFF //TX_A_LESSCUT_RTO_MASK +891 0x4000 //TX_A_LESSCUT_RTO_MASK 892 0x1770 //TX_FASTNS_NOISETH 893 0xC000 //TX_FASTNS_SSA_THLFL 894 0xC000 //TX_FASTNS_SSA_THHFL 895 0xCCCC //TX_FASTNS_SSA_THLFH 896 0xD999 //TX_FASTNS_SSA_THHFH +897 0x2339 //TX_SENDFUNC_REG_MICMUTE +898 0x0021 //TX_SENDFUNC_REG_MICMUTE1 +899 0x02BC //TX_MICMUTE_RATIO_THR +900 0x0140 //TX_MICMUTE_AMP_THR +901 0x0004 //TX_MICMUTE_HPF_IND +902 0x00C0 //TX_MICMUTE_LOG_EYR_TH +903 0x0008 //TX_MICMUTE_CVG_TIME +904 0x0008 //TX_MICMUTE_RELEASE_TIME +905 0x01FE //TX_MIC_VOLUME_MIC0MUTE +906 0x0020 //TX_MICMUTE_EPD_OFFSET_0 +907 0x001E //TX_MICMUTE_FRQ_AEC_L +908 0x7999 //TX_MICMUTE_EAD_THR +909 0x7FFF //TX_MICMUTE_LAMBDA_CB_NLE +910 0x7FFF //TX_MICMUTE_LAMBDA_RE_EST +911 0x4000 //TX_DTD_THR1_MICMUTE_0 +912 0x7000 //TX_DTD_THR1_MICMUTE_1 +913 0x7FFF //TX_DTD_THR1_MICMUTE_2 +914 0x7FFF //TX_DTD_THR1_MICMUTE_3 +915 0x6CCC //TX_DTD_THR2_MICMUTE_0 +916 0x0400 //TX_MICMUTE_MIN_EQ_RE_EST_0 +917 0x0400 //TX_MICMUTE_MIN_EQ_RE_EST_1 +918 0x1000 //TX_MICMUTE_MIN_EQ_RE_EST_2 +919 0x7FFF //TX_MICMUTE_MIN_EQ_RE_EST_3 +920 0x7FFF //TX_MICMUTE_MIN_EQ_RE_EST_4 +921 0x4000 //TX_MICMUTE_C_POST_FLT +922 0x03E8 //TX_MICMUTE_DT_CUT_K +923 0x0001 //TX_MICMUTE_DT_CUT_THR +924 0x03E8 //TX_MICMUTE_DT_CUT_K2 +925 0x0001 //TX_MICMUTE_DT_CUT_THR2 +926 0x0064 //TX_MICMUTE_DT2_HOLD_N +927 0x1000 //TX_MICMUTE_RATIODTH_THCUT +928 0x1000 //TX_MICMUTE_B_POST_FLT_ECHOL +929 0x7FFF //TX_MICMUTE_B_POST_FLT_ECHOH +930 0x0400 //TX_MICMUTE_C_POST_FLT_MASK +931 0x7999 //TX_MICMUTE_RATIODTL_CUT_TH +932 0x0258 //TX_MICMUTE_DT_CUT_K1 +933 0x0800 //TX_MICMUTE_N2_SN_EST +934 0xFC00 //TX_MICMUTE_THR_SN_EST_0 +935 0x001C //TX_MICMUTE_MIN_G_CTRL_0 +936 0x6000 //TX_MICMUTE_A_POST_FILT_S_0 +937 0x7000 //TX_MICMUTE_B_POST_FILT_0 +938 0x2710 //TX_MIC1RUB_AMP_THR +939 0x0010 //TX_MIC1MUTE_RATIO_THR +940 0x0450 //TX_MIC1MUTE_AMP_THR +941 0x0008 //TX_MIC1MUTE_CVG_TIME +942 0x0008 //TX_MIC1MUTE_RELEASE_TIME +943 0x0000 //TX_AMS_RESRV_01 +944 0x0000 //TX_AMS_RESRV_02 +945 0x0000 //TX_AMS_RESRV_03 +946 0x0000 //TX_AMS_RESRV_04 +947 0x0000 //TX_AMS_RESRV_05 +948 0x0000 //TX_AMS_RESRV_06 +949 0x0000 //TX_AMS_RESRV_07 +950 0x0000 //TX_AMS_RESRV_08 +951 0x0000 //TX_AMS_RESRV_09 +952 0x0000 //TX_AMS_RESRV_10 +953 0x0000 //TX_AMS_RESRV_11 +954 0x0000 //TX_AMS_RESRV_12 +955 0x0000 //TX_AMS_RESRV_13 +956 0x0000 //TX_AMS_RESRV_14 +957 0x0000 //TX_AMS_RESRV_15 +958 0x0000 //TX_AMS_RESRV_16 +959 0x0000 //TX_AMS_RESRV_17 +960 0x0000 //TX_AMS_RESRV_18 +961 0x0000 //TX_AMS_RESRV_19 #RX -0 0x027C //RX_RECVFUNC_MODE_0 +0 0x243C //RX_RECVFUNC_MODE_0 1 0x0000 //RX_RECVFUNC_MODE_1 2 0x0001 //RX_SAMPLINGFREQ_SIG 3 0x0001 //RX_SAMPLINGFREQ_PROC @@ -37750,7 +57051,7 @@ 7 0x6000 //RX_TDDRC_ALPHA_UP_2 8 0x6000 //RX_TDDRC_ALPHA_UP_3 9 0x1000 //RX_TDDRC_ALPHA_UP_4 -10 0x0800 //RX_PGA +10 0x0403 //RX_PGA 11 0x7B02 //RX_A_HP 12 0x4000 //RX_B_PE 13 0x7800 //RX_THR_PITCH_DET_0 @@ -37780,14 +57081,14 @@ 37 0x4000 //RX_LMT_ALPHA 38 0x001C //RX_FDEQ_SUBNUM 39 0x6868 //RX_FDEQ_GAIN_0 -40 0x6858 //RX_FDEQ_GAIN_1 -41 0x5858 //RX_FDEQ_GAIN_2 -42 0x5858 //RX_FDEQ_GAIN_3 +40 0x6864 //RX_FDEQ_GAIN_1 +41 0x7070 //RX_FDEQ_GAIN_2 +42 0x6058 //RX_FDEQ_GAIN_3 43 0x5C5C //RX_FDEQ_GAIN_4 -44 0x5854 //RX_FDEQ_GAIN_5 -45 0x544C //RX_FDEQ_GAIN_6 -46 0x4C4C //RX_FDEQ_GAIN_7 -47 0x4C60 //RX_FDEQ_GAIN_8 +44 0x8854 //RX_FDEQ_GAIN_5 +45 0x5448 //RX_FDEQ_GAIN_6 +46 0x4848 //RX_FDEQ_GAIN_7 +47 0x4860 //RX_FDEQ_GAIN_8 48 0x6068 //RX_FDEQ_GAIN_9 49 0x7070 //RX_FDEQ_GAIN_10 50 0x8070 //RX_FDEQ_GAIN_11 @@ -37864,12 +57165,12 @@ 121 0x199A //RX_TDDRC_HMNC_GAIN 122 0x0001 //RX_TDDRC_SMT_FLAG 123 0x0CCD //RX_TDDRC_SMT_W -124 0x06AF //RX_TDDRC_DRC_GAIN +124 0x0715 //RX_TDDRC_DRC_GAIN 125 0x7C00 //RX_LAMBDA_PKA_FP -126 0x2000 //RX_TPKA_FP -127 0x2000 //RX_MIN_G_FP -128 0x0080 //RX_MAX_G_FP -129 0x0014 //RX_SPK_VOL +126 0x157C //RX_TPKA_FP +127 0x0400 //RX_MIN_G_FP +128 0x0800 //RX_MAX_G_FP +129 0x0100 //RX_SPK_VOL 130 0x0000 //RX_VOL_RESRV_0 131 0x0000 //RX_MAXLEVEL_CNG 132 0x3000 //RX_BWE_UV_TH @@ -37903,15 +57204,15 @@ 8 0x6000 //RX_TDDRC_ALPHA_UP_3 9 0x1000 //RX_TDDRC_ALPHA_UP_4 27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 -28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 -29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 -32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +28 0x4000 //RX_TDDRC_ALPHA_DWN_2 +29 0x4000 //RX_TDDRC_ALPHA_DWN_3 +32 0x4000 //RX_TDDRC_ALPHA_DWN_4 33 0x7214 //RX_TDDRC_LIMITER_THRD 34 0x0800 //RX_TDDRC_LIMITER_GAIN 112 0x0002 //RX_TDDRC_THRD_0 113 0x0004 //RX_TDDRC_THRD_1 -114 0x1C00 //RX_TDDRC_THRD_2 -115 0x1C00 //RX_TDDRC_THRD_3 +114 0x1800 //RX_TDDRC_THRD_2 +115 0x1800 //RX_TDDRC_THRD_3 116 0x7FFF //RX_TDDRC_SLANT_0 117 0x7FFF //RX_TDDRC_SLANT_1 118 0x6000 //RX_TDDRC_ALPHA_UP_0 @@ -37920,22 +57221,22 @@ 121 0x199A //RX_TDDRC_HMNC_GAIN 122 0x0001 //RX_TDDRC_SMT_FLAG 123 0x0CCD //RX_TDDRC_SMT_W -124 0x06AF //RX_TDDRC_DRC_GAIN +124 0x0780 //RX_TDDRC_DRC_GAIN 38 0x001C //RX_FDEQ_SUBNUM -39 0x6868 //RX_FDEQ_GAIN_0 -40 0x6858 //RX_FDEQ_GAIN_1 -41 0x5858 //RX_FDEQ_GAIN_2 -42 0x5858 //RX_FDEQ_GAIN_3 -43 0x5C5C //RX_FDEQ_GAIN_4 -44 0x5854 //RX_FDEQ_GAIN_5 -45 0x544C //RX_FDEQ_GAIN_6 -46 0x4C4C //RX_FDEQ_GAIN_7 -47 0x4C60 //RX_FDEQ_GAIN_8 -48 0x6068 //RX_FDEQ_GAIN_9 -49 0x7070 //RX_FDEQ_GAIN_10 -50 0x8070 //RX_FDEQ_GAIN_11 -51 0x6060 //RX_FDEQ_GAIN_12 -52 0x7070 //RX_FDEQ_GAIN_13 +39 0x5C5C //RX_FDEQ_GAIN_0 +40 0x5448 //RX_FDEQ_GAIN_1 +41 0x4848 //RX_FDEQ_GAIN_2 +42 0x4840 //RX_FDEQ_GAIN_3 +43 0x4848 //RX_FDEQ_GAIN_4 +44 0x6048 //RX_FDEQ_GAIN_5 +45 0x4C40 //RX_FDEQ_GAIN_6 +46 0x4038 //RX_FDEQ_GAIN_7 +47 0x3C48 //RX_FDEQ_GAIN_8 +48 0x545C //RX_FDEQ_GAIN_9 +49 0x6864 //RX_FDEQ_GAIN_10 +50 0x7058 //RX_FDEQ_GAIN_11 +51 0x443C //RX_FDEQ_GAIN_12 +52 0x3838 //RX_FDEQ_GAIN_13 53 0x4848 //RX_FDEQ_GAIN_14 54 0x4848 //RX_FDEQ_GAIN_15 55 0x4848 //RX_FDEQ_GAIN_16 @@ -37994,7 +57295,7 @@ 108 0x7FFF //RX_FDDRC_SLANT_1_2 109 0x7FFF //RX_FDDRC_SLANT_1_3 110 0x0000 //RX_FDDRC_RESRV_0 -129 0x0014 //RX_SPK_VOL +129 0x0011 //RX_SPK_VOL 130 0x0000 //RX_VOL_RESRV_0 #VOL 1 6 0x6000 //RX_TDDRC_ALPHA_UP_1 @@ -38002,15 +57303,15 @@ 8 0x6000 //RX_TDDRC_ALPHA_UP_3 9 0x1000 //RX_TDDRC_ALPHA_UP_4 27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 -28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 -29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 -32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +28 0x4000 //RX_TDDRC_ALPHA_DWN_2 +29 0x4000 //RX_TDDRC_ALPHA_DWN_3 +32 0x4000 //RX_TDDRC_ALPHA_DWN_4 33 0x7214 //RX_TDDRC_LIMITER_THRD 34 0x0800 //RX_TDDRC_LIMITER_GAIN 112 0x0002 //RX_TDDRC_THRD_0 113 0x0004 //RX_TDDRC_THRD_1 -114 0x1C00 //RX_TDDRC_THRD_2 -115 0x1C00 //RX_TDDRC_THRD_3 +114 0x1800 //RX_TDDRC_THRD_2 +115 0x1800 //RX_TDDRC_THRD_3 116 0x7FFF //RX_TDDRC_SLANT_0 117 0x7FFF //RX_TDDRC_SLANT_1 118 0x6000 //RX_TDDRC_ALPHA_UP_0 @@ -38019,22 +57320,22 @@ 121 0x199A //RX_TDDRC_HMNC_GAIN 122 0x0001 //RX_TDDRC_SMT_FLAG 123 0x0CCD //RX_TDDRC_SMT_W -124 0x06AF //RX_TDDRC_DRC_GAIN +124 0x0780 //RX_TDDRC_DRC_GAIN 38 0x001C //RX_FDEQ_SUBNUM -39 0x6868 //RX_FDEQ_GAIN_0 -40 0x6858 //RX_FDEQ_GAIN_1 -41 0x5858 //RX_FDEQ_GAIN_2 -42 0x5858 //RX_FDEQ_GAIN_3 -43 0x5C5C //RX_FDEQ_GAIN_4 -44 0x5854 //RX_FDEQ_GAIN_5 -45 0x544C //RX_FDEQ_GAIN_6 -46 0x4C4C //RX_FDEQ_GAIN_7 -47 0x4C60 //RX_FDEQ_GAIN_8 -48 0x6068 //RX_FDEQ_GAIN_9 -49 0x7070 //RX_FDEQ_GAIN_10 -50 0x8070 //RX_FDEQ_GAIN_11 -51 0x6060 //RX_FDEQ_GAIN_12 -52 0x7070 //RX_FDEQ_GAIN_13 +39 0x5C5C //RX_FDEQ_GAIN_0 +40 0x5448 //RX_FDEQ_GAIN_1 +41 0x4848 //RX_FDEQ_GAIN_2 +42 0x4840 //RX_FDEQ_GAIN_3 +43 0x4848 //RX_FDEQ_GAIN_4 +44 0x6048 //RX_FDEQ_GAIN_5 +45 0x4C40 //RX_FDEQ_GAIN_6 +46 0x4038 //RX_FDEQ_GAIN_7 +47 0x3C48 //RX_FDEQ_GAIN_8 +48 0x545C //RX_FDEQ_GAIN_9 +49 0x6864 //RX_FDEQ_GAIN_10 +50 0x7058 //RX_FDEQ_GAIN_11 +51 0x443C //RX_FDEQ_GAIN_12 +52 0x3838 //RX_FDEQ_GAIN_13 53 0x4848 //RX_FDEQ_GAIN_14 54 0x4848 //RX_FDEQ_GAIN_15 55 0x4848 //RX_FDEQ_GAIN_16 @@ -38093,7 +57394,7 @@ 108 0x7FFF //RX_FDDRC_SLANT_1_2 109 0x7FFF //RX_FDDRC_SLANT_1_3 110 0x0000 //RX_FDDRC_RESRV_0 -129 0x001A //RX_SPK_VOL +129 0x0019 //RX_SPK_VOL 130 0x0000 //RX_VOL_RESRV_0 #VOL 2 6 0x6000 //RX_TDDRC_ALPHA_UP_1 @@ -38101,15 +57402,15 @@ 8 0x6000 //RX_TDDRC_ALPHA_UP_3 9 0x1000 //RX_TDDRC_ALPHA_UP_4 27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 -28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 -29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 -32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +28 0x4000 //RX_TDDRC_ALPHA_DWN_2 +29 0x4000 //RX_TDDRC_ALPHA_DWN_3 +32 0x4000 //RX_TDDRC_ALPHA_DWN_4 33 0x7214 //RX_TDDRC_LIMITER_THRD 34 0x0800 //RX_TDDRC_LIMITER_GAIN 112 0x0002 //RX_TDDRC_THRD_0 113 0x0004 //RX_TDDRC_THRD_1 -114 0x1C00 //RX_TDDRC_THRD_2 -115 0x1C00 //RX_TDDRC_THRD_3 +114 0x1800 //RX_TDDRC_THRD_2 +115 0x1800 //RX_TDDRC_THRD_3 116 0x7FFF //RX_TDDRC_SLANT_0 117 0x7FFF //RX_TDDRC_SLANT_1 118 0x6000 //RX_TDDRC_ALPHA_UP_0 @@ -38118,22 +57419,22 @@ 121 0x199A //RX_TDDRC_HMNC_GAIN 122 0x0001 //RX_TDDRC_SMT_FLAG 123 0x0CCD //RX_TDDRC_SMT_W -124 0x06AF //RX_TDDRC_DRC_GAIN +124 0x0780 //RX_TDDRC_DRC_GAIN 38 0x001C //RX_FDEQ_SUBNUM -39 0x6868 //RX_FDEQ_GAIN_0 -40 0x6858 //RX_FDEQ_GAIN_1 -41 0x5858 //RX_FDEQ_GAIN_2 -42 0x5858 //RX_FDEQ_GAIN_3 -43 0x5C5C //RX_FDEQ_GAIN_4 -44 0x5854 //RX_FDEQ_GAIN_5 -45 0x544C //RX_FDEQ_GAIN_6 -46 0x4C4C //RX_FDEQ_GAIN_7 -47 0x4C60 //RX_FDEQ_GAIN_8 -48 0x6068 //RX_FDEQ_GAIN_9 -49 0x7070 //RX_FDEQ_GAIN_10 -50 0x8070 //RX_FDEQ_GAIN_11 -51 0x6060 //RX_FDEQ_GAIN_12 -52 0x7070 //RX_FDEQ_GAIN_13 +39 0x5C5C //RX_FDEQ_GAIN_0 +40 0x5448 //RX_FDEQ_GAIN_1 +41 0x4848 //RX_FDEQ_GAIN_2 +42 0x4840 //RX_FDEQ_GAIN_3 +43 0x4848 //RX_FDEQ_GAIN_4 +44 0x6048 //RX_FDEQ_GAIN_5 +45 0x4C40 //RX_FDEQ_GAIN_6 +46 0x4038 //RX_FDEQ_GAIN_7 +47 0x3C48 //RX_FDEQ_GAIN_8 +48 0x545C //RX_FDEQ_GAIN_9 +49 0x6864 //RX_FDEQ_GAIN_10 +50 0x7058 //RX_FDEQ_GAIN_11 +51 0x443C //RX_FDEQ_GAIN_12 +52 0x3838 //RX_FDEQ_GAIN_13 53 0x4848 //RX_FDEQ_GAIN_14 54 0x4848 //RX_FDEQ_GAIN_15 55 0x4848 //RX_FDEQ_GAIN_16 @@ -38192,7 +57493,7 @@ 108 0x7FFF //RX_FDDRC_SLANT_1_2 109 0x7FFF //RX_FDDRC_SLANT_1_3 110 0x0000 //RX_FDDRC_RESRV_0 -129 0x0026 //RX_SPK_VOL +129 0x0024 //RX_SPK_VOL 130 0x0000 //RX_VOL_RESRV_0 #VOL 3 6 0x6000 //RX_TDDRC_ALPHA_UP_1 @@ -38200,15 +57501,15 @@ 8 0x6000 //RX_TDDRC_ALPHA_UP_3 9 0x1000 //RX_TDDRC_ALPHA_UP_4 27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 -28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 -29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 -32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +28 0x4000 //RX_TDDRC_ALPHA_DWN_2 +29 0x4000 //RX_TDDRC_ALPHA_DWN_3 +32 0x4000 //RX_TDDRC_ALPHA_DWN_4 33 0x7214 //RX_TDDRC_LIMITER_THRD 34 0x0800 //RX_TDDRC_LIMITER_GAIN 112 0x0002 //RX_TDDRC_THRD_0 113 0x0004 //RX_TDDRC_THRD_1 -114 0x1C00 //RX_TDDRC_THRD_2 -115 0x1C00 //RX_TDDRC_THRD_3 +114 0x1800 //RX_TDDRC_THRD_2 +115 0x1800 //RX_TDDRC_THRD_3 116 0x7FFF //RX_TDDRC_SLANT_0 117 0x7FFF //RX_TDDRC_SLANT_1 118 0x6000 //RX_TDDRC_ALPHA_UP_0 @@ -38217,22 +57518,22 @@ 121 0x199A //RX_TDDRC_HMNC_GAIN 122 0x0001 //RX_TDDRC_SMT_FLAG 123 0x0CCD //RX_TDDRC_SMT_W -124 0x06AF //RX_TDDRC_DRC_GAIN +124 0x0780 //RX_TDDRC_DRC_GAIN 38 0x001C //RX_FDEQ_SUBNUM -39 0x6868 //RX_FDEQ_GAIN_0 -40 0x6858 //RX_FDEQ_GAIN_1 -41 0x5858 //RX_FDEQ_GAIN_2 -42 0x5858 //RX_FDEQ_GAIN_3 -43 0x5C5C //RX_FDEQ_GAIN_4 -44 0x5854 //RX_FDEQ_GAIN_5 -45 0x544C //RX_FDEQ_GAIN_6 -46 0x4C4C //RX_FDEQ_GAIN_7 -47 0x4C60 //RX_FDEQ_GAIN_8 -48 0x6068 //RX_FDEQ_GAIN_9 -49 0x7070 //RX_FDEQ_GAIN_10 -50 0x8070 //RX_FDEQ_GAIN_11 -51 0x6060 //RX_FDEQ_GAIN_12 -52 0x7070 //RX_FDEQ_GAIN_13 +39 0x5C5C //RX_FDEQ_GAIN_0 +40 0x5448 //RX_FDEQ_GAIN_1 +41 0x4848 //RX_FDEQ_GAIN_2 +42 0x4840 //RX_FDEQ_GAIN_3 +43 0x4848 //RX_FDEQ_GAIN_4 +44 0x6048 //RX_FDEQ_GAIN_5 +45 0x4C40 //RX_FDEQ_GAIN_6 +46 0x4038 //RX_FDEQ_GAIN_7 +47 0x3C48 //RX_FDEQ_GAIN_8 +48 0x545C //RX_FDEQ_GAIN_9 +49 0x6864 //RX_FDEQ_GAIN_10 +50 0x7058 //RX_FDEQ_GAIN_11 +51 0x443C //RX_FDEQ_GAIN_12 +52 0x3838 //RX_FDEQ_GAIN_13 53 0x4848 //RX_FDEQ_GAIN_14 54 0x4848 //RX_FDEQ_GAIN_15 55 0x4848 //RX_FDEQ_GAIN_16 @@ -38291,7 +57592,7 @@ 108 0x7FFF //RX_FDDRC_SLANT_1_2 109 0x7FFF //RX_FDDRC_SLANT_1_3 110 0x0000 //RX_FDDRC_RESRV_0 -129 0x0035 //RX_SPK_VOL +129 0x0034 //RX_SPK_VOL 130 0x0000 //RX_VOL_RESRV_0 #VOL 4 6 0x6000 //RX_TDDRC_ALPHA_UP_1 @@ -38299,15 +57600,15 @@ 8 0x6000 //RX_TDDRC_ALPHA_UP_3 9 0x1000 //RX_TDDRC_ALPHA_UP_4 27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 -28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 -29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 -32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +28 0x4000 //RX_TDDRC_ALPHA_DWN_2 +29 0x4000 //RX_TDDRC_ALPHA_DWN_3 +32 0x4000 //RX_TDDRC_ALPHA_DWN_4 33 0x7214 //RX_TDDRC_LIMITER_THRD 34 0x0800 //RX_TDDRC_LIMITER_GAIN 112 0x0002 //RX_TDDRC_THRD_0 113 0x0004 //RX_TDDRC_THRD_1 -114 0x1C00 //RX_TDDRC_THRD_2 -115 0x1C00 //RX_TDDRC_THRD_3 +114 0x1800 //RX_TDDRC_THRD_2 +115 0x1800 //RX_TDDRC_THRD_3 116 0x7FFF //RX_TDDRC_SLANT_0 117 0x7FFF //RX_TDDRC_SLANT_1 118 0x6000 //RX_TDDRC_ALPHA_UP_0 @@ -38316,22 +57617,22 @@ 121 0x199A //RX_TDDRC_HMNC_GAIN 122 0x0001 //RX_TDDRC_SMT_FLAG 123 0x0CCD //RX_TDDRC_SMT_W -124 0x06AF //RX_TDDRC_DRC_GAIN +124 0x0B39 //RX_TDDRC_DRC_GAIN 38 0x001C //RX_FDEQ_SUBNUM -39 0x7878 //RX_FDEQ_GAIN_0 -40 0x786C //RX_FDEQ_GAIN_1 -41 0x6C6C //RX_FDEQ_GAIN_2 -42 0x6262 //RX_FDEQ_GAIN_3 -43 0x5A60 //RX_FDEQ_GAIN_4 -44 0x7A54 //RX_FDEQ_GAIN_5 -45 0x5448 //RX_FDEQ_GAIN_6 -46 0x4848 //RX_FDEQ_GAIN_7 -47 0x4860 //RX_FDEQ_GAIN_8 +39 0x6868 //RX_FDEQ_GAIN_0 +40 0x685C //RX_FDEQ_GAIN_1 +41 0x6868 //RX_FDEQ_GAIN_2 +42 0x544C //RX_FDEQ_GAIN_3 +43 0x4C54 //RX_FDEQ_GAIN_4 +44 0x704C //RX_FDEQ_GAIN_5 +45 0x4C40 //RX_FDEQ_GAIN_6 +46 0x4040 //RX_FDEQ_GAIN_7 +47 0x445C //RX_FDEQ_GAIN_8 48 0x6068 //RX_FDEQ_GAIN_9 49 0x7070 //RX_FDEQ_GAIN_10 -50 0x8070 //RX_FDEQ_GAIN_11 +50 0x7C74 //RX_FDEQ_GAIN_11 51 0x6060 //RX_FDEQ_GAIN_12 -52 0x7070 //RX_FDEQ_GAIN_13 +52 0x6C6C //RX_FDEQ_GAIN_13 53 0x4848 //RX_FDEQ_GAIN_14 54 0x4848 //RX_FDEQ_GAIN_15 55 0x4848 //RX_FDEQ_GAIN_16 @@ -38390,7 +57691,7 @@ 108 0x7FFF //RX_FDDRC_SLANT_1_2 109 0x7FFF //RX_FDDRC_SLANT_1_3 110 0x0000 //RX_FDDRC_RESRV_0 -129 0x0058 //RX_SPK_VOL +129 0x0038 //RX_SPK_VOL 130 0x0000 //RX_VOL_RESRV_0 #VOL 5 6 0x6000 //RX_TDDRC_ALPHA_UP_1 @@ -38398,15 +57699,15 @@ 8 0x6000 //RX_TDDRC_ALPHA_UP_3 9 0x1000 //RX_TDDRC_ALPHA_UP_4 27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 -28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 -29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 -32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +28 0x4000 //RX_TDDRC_ALPHA_DWN_2 +29 0x4000 //RX_TDDRC_ALPHA_DWN_3 +32 0x4000 //RX_TDDRC_ALPHA_DWN_4 33 0x7214 //RX_TDDRC_LIMITER_THRD 34 0x0800 //RX_TDDRC_LIMITER_GAIN 112 0x0002 //RX_TDDRC_THRD_0 113 0x0004 //RX_TDDRC_THRD_1 -114 0x1C00 //RX_TDDRC_THRD_2 -115 0x1C00 //RX_TDDRC_THRD_3 +114 0x1800 //RX_TDDRC_THRD_2 +115 0x1800 //RX_TDDRC_THRD_3 116 0x7FFF //RX_TDDRC_SLANT_0 117 0x7FFF //RX_TDDRC_SLANT_1 118 0x6000 //RX_TDDRC_ALPHA_UP_0 @@ -38415,22 +57716,22 @@ 121 0x199A //RX_TDDRC_HMNC_GAIN 122 0x0001 //RX_TDDRC_SMT_FLAG 123 0x0CCD //RX_TDDRC_SMT_W -124 0x06AF //RX_TDDRC_DRC_GAIN +124 0x0B39 //RX_TDDRC_DRC_GAIN 38 0x001C //RX_FDEQ_SUBNUM -39 0x7878 //RX_FDEQ_GAIN_0 -40 0x786C //RX_FDEQ_GAIN_1 -41 0x6C6C //RX_FDEQ_GAIN_2 -42 0x6262 //RX_FDEQ_GAIN_3 -43 0x5A60 //RX_FDEQ_GAIN_4 -44 0x7A54 //RX_FDEQ_GAIN_5 -45 0x5448 //RX_FDEQ_GAIN_6 -46 0x4848 //RX_FDEQ_GAIN_7 -47 0x4860 //RX_FDEQ_GAIN_8 +39 0x6868 //RX_FDEQ_GAIN_0 +40 0x685C //RX_FDEQ_GAIN_1 +41 0x6868 //RX_FDEQ_GAIN_2 +42 0x544C //RX_FDEQ_GAIN_3 +43 0x4C54 //RX_FDEQ_GAIN_4 +44 0x704C //RX_FDEQ_GAIN_5 +45 0x4C40 //RX_FDEQ_GAIN_6 +46 0x4040 //RX_FDEQ_GAIN_7 +47 0x445C //RX_FDEQ_GAIN_8 48 0x6068 //RX_FDEQ_GAIN_9 49 0x7070 //RX_FDEQ_GAIN_10 -50 0x8070 //RX_FDEQ_GAIN_11 +50 0x7C74 //RX_FDEQ_GAIN_11 51 0x6060 //RX_FDEQ_GAIN_12 -52 0x7070 //RX_FDEQ_GAIN_13 +52 0x6C6C //RX_FDEQ_GAIN_13 53 0x4848 //RX_FDEQ_GAIN_14 54 0x4848 //RX_FDEQ_GAIN_15 55 0x4848 //RX_FDEQ_GAIN_16 @@ -38489,7 +57790,7 @@ 108 0x7FFF //RX_FDDRC_SLANT_1_2 109 0x7FFF //RX_FDDRC_SLANT_1_3 110 0x0000 //RX_FDDRC_RESRV_0 -129 0x0085 //RX_SPK_VOL +129 0x0060 //RX_SPK_VOL 130 0x0000 //RX_VOL_RESRV_0 #VOL 6 6 0x6000 //RX_TDDRC_ALPHA_UP_1 @@ -38497,15 +57798,15 @@ 8 0x6000 //RX_TDDRC_ALPHA_UP_3 9 0x1000 //RX_TDDRC_ALPHA_UP_4 27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 -28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 -29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 -32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +28 0x4000 //RX_TDDRC_ALPHA_DWN_2 +29 0x4000 //RX_TDDRC_ALPHA_DWN_3 +32 0x4000 //RX_TDDRC_ALPHA_DWN_4 33 0x7214 //RX_TDDRC_LIMITER_THRD 34 0x0800 //RX_TDDRC_LIMITER_GAIN 112 0x0002 //RX_TDDRC_THRD_0 113 0x0004 //RX_TDDRC_THRD_1 -114 0x1C00 //RX_TDDRC_THRD_2 -115 0x1C00 //RX_TDDRC_THRD_3 +114 0x1800 //RX_TDDRC_THRD_2 +115 0x1800 //RX_TDDRC_THRD_3 116 0x7FFF //RX_TDDRC_SLANT_0 117 0x7FFF //RX_TDDRC_SLANT_1 118 0x6000 //RX_TDDRC_ALPHA_UP_0 @@ -38514,22 +57815,22 @@ 121 0x199A //RX_TDDRC_HMNC_GAIN 122 0x0001 //RX_TDDRC_SMT_FLAG 123 0x0CCD //RX_TDDRC_SMT_W -124 0x06AF //RX_TDDRC_DRC_GAIN +124 0x0B39 //RX_TDDRC_DRC_GAIN 38 0x001C //RX_FDEQ_SUBNUM -39 0x7878 //RX_FDEQ_GAIN_0 -40 0x786C //RX_FDEQ_GAIN_1 -41 0x6C6C //RX_FDEQ_GAIN_2 -42 0x6262 //RX_FDEQ_GAIN_3 -43 0x5A60 //RX_FDEQ_GAIN_4 -44 0x7A54 //RX_FDEQ_GAIN_5 -45 0x5448 //RX_FDEQ_GAIN_6 -46 0x4848 //RX_FDEQ_GAIN_7 -47 0x4860 //RX_FDEQ_GAIN_8 +39 0x6868 //RX_FDEQ_GAIN_0 +40 0x685C //RX_FDEQ_GAIN_1 +41 0x6868 //RX_FDEQ_GAIN_2 +42 0x544C //RX_FDEQ_GAIN_3 +43 0x4C54 //RX_FDEQ_GAIN_4 +44 0x704C //RX_FDEQ_GAIN_5 +45 0x4C40 //RX_FDEQ_GAIN_6 +46 0x4040 //RX_FDEQ_GAIN_7 +47 0x445C //RX_FDEQ_GAIN_8 48 0x6068 //RX_FDEQ_GAIN_9 49 0x7070 //RX_FDEQ_GAIN_10 -50 0x8070 //RX_FDEQ_GAIN_11 +50 0x7C74 //RX_FDEQ_GAIN_11 51 0x6060 //RX_FDEQ_GAIN_12 -52 0x7070 //RX_FDEQ_GAIN_13 +52 0x6C6C //RX_FDEQ_GAIN_13 53 0x4848 //RX_FDEQ_GAIN_14 54 0x4848 //RX_FDEQ_GAIN_15 55 0x4848 //RX_FDEQ_GAIN_16 @@ -38590,11 +57891,862 @@ 110 0x0000 //RX_FDDRC_RESRV_0 129 0x0100 //RX_SPK_VOL 130 0x0000 //RX_VOL_RESRV_0 +#RX 2 +157 0x243C //RX_RECVFUNC_MODE_0 +158 0x0000 //RX_RECVFUNC_MODE_1 +159 0x0001 //RX_SAMPLINGFREQ_SIG +160 0x0001 //RX_SAMPLINGFREQ_PROC +161 0x000A //RX_FRAME_SZ +162 0x0000 //RX_DELAY_OPT +163 0x6000 //RX_TDDRC_ALPHA_UP_1 +164 0x6000 //RX_TDDRC_ALPHA_UP_2 +165 0x6000 //RX_TDDRC_ALPHA_UP_3 +166 0x1000 //RX_TDDRC_ALPHA_UP_4 +167 0x0403 //RX_PGA +168 0x7B02 //RX_A_HP +169 0x4000 //RX_B_PE +170 0x7800 //RX_THR_PITCH_DET_0 +171 0x7000 //RX_THR_PITCH_DET_1 +172 0x6000 //RX_THR_PITCH_DET_2 +173 0x0008 //RX_PITCH_BFR_LEN +174 0x0003 //RX_SBD_PITCH_DET +175 0x0100 //RX_PP_RESRV_0 +176 0x0020 //RX_PP_RESRV_1 +177 0x0400 //RX_N_SN_EST +178 0x000C //RX_N2_SN_EST +179 0x0010 //RX_NS_LVL_CTRL +180 0xF800 //RX_THR_SN_EST +181 0x7E00 //RX_LAMBDA_PFILT +182 0x000A //RX_FENS_RESRV_0 +183 0x0190 //RX_FENS_RESRV_1 +184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +187 0x0002 //RX_EXTRA_NS_L +188 0x0800 //RX_EXTRA_NS_A +189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +190 0x7214 //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +192 0x199A //RX_A_POST_FLT +193 0x0000 //RX_LMT_THRD +194 0x4000 //RX_LMT_ALPHA +195 0x001C //RX_FDEQ_SUBNUM +196 0x6868 //RX_FDEQ_GAIN_0 +197 0x6864 //RX_FDEQ_GAIN_1 +198 0x7070 //RX_FDEQ_GAIN_2 +199 0x6058 //RX_FDEQ_GAIN_3 +200 0x5C5C //RX_FDEQ_GAIN_4 +201 0x8854 //RX_FDEQ_GAIN_5 +202 0x5448 //RX_FDEQ_GAIN_6 +203 0x4848 //RX_FDEQ_GAIN_7 +204 0x4860 //RX_FDEQ_GAIN_8 +205 0x6068 //RX_FDEQ_GAIN_9 +206 0x7070 //RX_FDEQ_GAIN_10 +207 0x8070 //RX_FDEQ_GAIN_11 +208 0x6060 //RX_FDEQ_GAIN_12 +209 0x7070 //RX_FDEQ_GAIN_13 +210 0x4848 //RX_FDEQ_GAIN_14 +211 0x4848 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0202 //RX_FDEQ_BIN_0 +221 0x0203 //RX_FDEQ_BIN_1 +222 0x0303 //RX_FDEQ_BIN_2 +223 0x0304 //RX_FDEQ_BIN_3 +224 0x0404 //RX_FDEQ_BIN_4 +225 0x0204 //RX_FDEQ_BIN_5 +226 0x0A0A //RX_FDEQ_BIN_6 +227 0x0A0A //RX_FDEQ_BIN_7 +228 0x0B0C //RX_FDEQ_BIN_8 +229 0x0D0E //RX_FDEQ_BIN_9 +230 0x0E0F //RX_FDEQ_BIN_10 +231 0x0F10 //RX_FDEQ_BIN_11 +232 0x1011 //RX_FDEQ_BIN_12 +233 0x1104 //RX_FDEQ_BIN_13 +234 0x0000 //RX_FDEQ_BIN_14 +235 0x0000 //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x4000 //RX_FDEQ_RESRV_0 +245 0x0320 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0035 //RX_FDDRC_BAND_MARGIN_1 +248 0x00D5 //RX_FDDRC_BAND_MARGIN_2 +249 0x0120 //RX_FDDRC_BAND_MARGIN_3 +250 0x0004 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x2000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x2000 //RX_FDDRC_THRD_3_2 +258 0x5000 //RX_FDDRC_THRD_3_3 +259 0x4000 //RX_FDDRC_SLANT_0_0 +260 0x4000 //RX_FDDRC_SLANT_0_1 +261 0x4000 //RX_FDDRC_SLANT_0_2 +262 0x4000 //RX_FDDRC_SLANT_0_3 +263 0x7FFF //RX_FDDRC_SLANT_1_0 +264 0x7FFF //RX_FDDRC_SLANT_1_1 +265 0x7FFF //RX_FDDRC_SLANT_1_2 +266 0x7FFF //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +268 0x0002 //RX_FILTINDX +269 0x0002 //RX_TDDRC_THRD_0 +270 0x0004 //RX_TDDRC_THRD_1 +271 0x1C00 //RX_TDDRC_THRD_2 +272 0x1C00 //RX_TDDRC_THRD_3 +273 0x7FFF //RX_TDDRC_SLANT_0 +274 0x7FFF //RX_TDDRC_SLANT_1 +275 0x6000 //RX_TDDRC_ALPHA_UP_0 +276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x199A //RX_TDDRC_HMNC_GAIN +279 0x0001 //RX_TDDRC_SMT_FLAG +280 0x0CCD //RX_TDDRC_SMT_W +281 0x0715 //RX_TDDRC_DRC_GAIN +282 0x7C00 //RX_LAMBDA_PKA_FP +283 0x157C //RX_TPKA_FP +284 0x0400 //RX_MIN_G_FP +285 0x0800 //RX_MAX_G_FP +286 0x0100 //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 +288 0x0000 //RX_MAXLEVEL_CNG +289 0x3000 //RX_BWE_UV_TH +290 0x3000 //RX_BWE_UV_TH2 +291 0x1800 //RX_BWE_UV_TH3 +292 0x1000 //RX_BWE_V_TH +293 0x04CD //RX_BWE_GAIN1_V_TH1 +294 0x0F33 //RX_BWE_GAIN1_V_TH2 +295 0x7333 //RX_BWE_UV_EQ +296 0x199A //RX_BWE_V_EQ +297 0x7333 //RX_BWE_TONE_TH +298 0x0004 //RX_BWE_UV_HOLD_T +299 0x6CCD //RX_BWE_GAIN2_ALPHA +300 0x799A //RX_BWE_GAIN3_ALPHA +301 0x001E //RX_BWE_CUTOFF +302 0x3000 //RX_BWE_GAINFILL +303 0x3200 //RX_BWE_MAXTH_TONE +304 0x2000 //RX_BWE_EQ_0 +305 0x2000 //RX_BWE_EQ_1 +306 0x2000 //RX_BWE_EQ_2 +307 0x2000 //RX_BWE_EQ_3 +308 0x2000 //RX_BWE_EQ_4 +309 0x2000 //RX_BWE_EQ_5 +310 0x2000 //RX_BWE_EQ_6 +311 0x0000 //RX_BWE_RESRV_0 +312 0x0000 //RX_BWE_RESRV_1 +313 0x0000 //RX_BWE_RESRV_2 +#VOL 0 +163 0x6000 //RX_TDDRC_ALPHA_UP_1 +164 0x6000 //RX_TDDRC_ALPHA_UP_2 +165 0x6000 //RX_TDDRC_ALPHA_UP_3 +166 0x1000 //RX_TDDRC_ALPHA_UP_4 +184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +185 0x4000 //RX_TDDRC_ALPHA_DWN_2 +186 0x4000 //RX_TDDRC_ALPHA_DWN_3 +189 0x4000 //RX_TDDRC_ALPHA_DWN_4 +190 0x7214 //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +269 0x0002 //RX_TDDRC_THRD_0 +270 0x0004 //RX_TDDRC_THRD_1 +271 0x1800 //RX_TDDRC_THRD_2 +272 0x1800 //RX_TDDRC_THRD_3 +273 0x7FFF //RX_TDDRC_SLANT_0 +274 0x7FFF //RX_TDDRC_SLANT_1 +275 0x6000 //RX_TDDRC_ALPHA_UP_0 +276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x199A //RX_TDDRC_HMNC_GAIN +279 0x0001 //RX_TDDRC_SMT_FLAG +280 0x0CCD //RX_TDDRC_SMT_W +281 0x0780 //RX_TDDRC_DRC_GAIN +195 0x001C //RX_FDEQ_SUBNUM +196 0x5C5C //RX_FDEQ_GAIN_0 +197 0x5448 //RX_FDEQ_GAIN_1 +198 0x4848 //RX_FDEQ_GAIN_2 +199 0x4840 //RX_FDEQ_GAIN_3 +200 0x4848 //RX_FDEQ_GAIN_4 +201 0x6048 //RX_FDEQ_GAIN_5 +202 0x4C40 //RX_FDEQ_GAIN_6 +203 0x4038 //RX_FDEQ_GAIN_7 +204 0x3C48 //RX_FDEQ_GAIN_8 +205 0x545C //RX_FDEQ_GAIN_9 +206 0x6864 //RX_FDEQ_GAIN_10 +207 0x7058 //RX_FDEQ_GAIN_11 +208 0x443C //RX_FDEQ_GAIN_12 +209 0x3838 //RX_FDEQ_GAIN_13 +210 0x4848 //RX_FDEQ_GAIN_14 +211 0x4848 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0202 //RX_FDEQ_BIN_0 +221 0x0203 //RX_FDEQ_BIN_1 +222 0x0303 //RX_FDEQ_BIN_2 +223 0x0304 //RX_FDEQ_BIN_3 +224 0x0404 //RX_FDEQ_BIN_4 +225 0x0204 //RX_FDEQ_BIN_5 +226 0x0A0A //RX_FDEQ_BIN_6 +227 0x0A0A //RX_FDEQ_BIN_7 +228 0x0B0C //RX_FDEQ_BIN_8 +229 0x0D0E //RX_FDEQ_BIN_9 +230 0x0E0F //RX_FDEQ_BIN_10 +231 0x0F10 //RX_FDEQ_BIN_11 +232 0x1011 //RX_FDEQ_BIN_12 +233 0x1104 //RX_FDEQ_BIN_13 +234 0x0000 //RX_FDEQ_BIN_14 +235 0x0000 //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x4000 //RX_FDEQ_RESRV_0 +245 0x0320 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0035 //RX_FDDRC_BAND_MARGIN_1 +248 0x00D5 //RX_FDDRC_BAND_MARGIN_2 +249 0x0120 //RX_FDDRC_BAND_MARGIN_3 +250 0x0004 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x2000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x2000 //RX_FDDRC_THRD_3_2 +258 0x5000 //RX_FDDRC_THRD_3_3 +259 0x4000 //RX_FDDRC_SLANT_0_0 +260 0x4000 //RX_FDDRC_SLANT_0_1 +261 0x4000 //RX_FDDRC_SLANT_0_2 +262 0x4000 //RX_FDDRC_SLANT_0_3 +263 0x7FFF //RX_FDDRC_SLANT_1_0 +264 0x7FFF //RX_FDDRC_SLANT_1_1 +265 0x7FFF //RX_FDDRC_SLANT_1_2 +266 0x7FFF //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +286 0x0011 //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 +#VOL 1 +163 0x6000 //RX_TDDRC_ALPHA_UP_1 +164 0x6000 //RX_TDDRC_ALPHA_UP_2 +165 0x6000 //RX_TDDRC_ALPHA_UP_3 +166 0x1000 //RX_TDDRC_ALPHA_UP_4 +184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +185 0x4000 //RX_TDDRC_ALPHA_DWN_2 +186 0x4000 //RX_TDDRC_ALPHA_DWN_3 +189 0x4000 //RX_TDDRC_ALPHA_DWN_4 +190 0x7214 //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +269 0x0002 //RX_TDDRC_THRD_0 +270 0x0004 //RX_TDDRC_THRD_1 +271 0x1800 //RX_TDDRC_THRD_2 +272 0x1800 //RX_TDDRC_THRD_3 +273 0x7FFF //RX_TDDRC_SLANT_0 +274 0x7FFF //RX_TDDRC_SLANT_1 +275 0x6000 //RX_TDDRC_ALPHA_UP_0 +276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x199A //RX_TDDRC_HMNC_GAIN +279 0x0001 //RX_TDDRC_SMT_FLAG +280 0x0CCD //RX_TDDRC_SMT_W +281 0x0780 //RX_TDDRC_DRC_GAIN +195 0x001C //RX_FDEQ_SUBNUM +196 0x5C5C //RX_FDEQ_GAIN_0 +197 0x5448 //RX_FDEQ_GAIN_1 +198 0x4848 //RX_FDEQ_GAIN_2 +199 0x4840 //RX_FDEQ_GAIN_3 +200 0x4848 //RX_FDEQ_GAIN_4 +201 0x6048 //RX_FDEQ_GAIN_5 +202 0x4C40 //RX_FDEQ_GAIN_6 +203 0x4038 //RX_FDEQ_GAIN_7 +204 0x3C48 //RX_FDEQ_GAIN_8 +205 0x545C //RX_FDEQ_GAIN_9 +206 0x6864 //RX_FDEQ_GAIN_10 +207 0x7058 //RX_FDEQ_GAIN_11 +208 0x443C //RX_FDEQ_GAIN_12 +209 0x3838 //RX_FDEQ_GAIN_13 +210 0x4848 //RX_FDEQ_GAIN_14 +211 0x4848 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0202 //RX_FDEQ_BIN_0 +221 0x0203 //RX_FDEQ_BIN_1 +222 0x0303 //RX_FDEQ_BIN_2 +223 0x0304 //RX_FDEQ_BIN_3 +224 0x0404 //RX_FDEQ_BIN_4 +225 0x0204 //RX_FDEQ_BIN_5 +226 0x0A0A //RX_FDEQ_BIN_6 +227 0x0A0A //RX_FDEQ_BIN_7 +228 0x0B0C //RX_FDEQ_BIN_8 +229 0x0D0E //RX_FDEQ_BIN_9 +230 0x0E0F //RX_FDEQ_BIN_10 +231 0x0F10 //RX_FDEQ_BIN_11 +232 0x1011 //RX_FDEQ_BIN_12 +233 0x1104 //RX_FDEQ_BIN_13 +234 0x0000 //RX_FDEQ_BIN_14 +235 0x0000 //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x4000 //RX_FDEQ_RESRV_0 +245 0x0320 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0035 //RX_FDDRC_BAND_MARGIN_1 +248 0x00D5 //RX_FDDRC_BAND_MARGIN_2 +249 0x0120 //RX_FDDRC_BAND_MARGIN_3 +250 0x0004 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x2000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x2000 //RX_FDDRC_THRD_3_2 +258 0x5000 //RX_FDDRC_THRD_3_3 +259 0x4000 //RX_FDDRC_SLANT_0_0 +260 0x4000 //RX_FDDRC_SLANT_0_1 +261 0x4000 //RX_FDDRC_SLANT_0_2 +262 0x4000 //RX_FDDRC_SLANT_0_3 +263 0x7FFF //RX_FDDRC_SLANT_1_0 +264 0x7FFF //RX_FDDRC_SLANT_1_1 +265 0x7FFF //RX_FDDRC_SLANT_1_2 +266 0x7FFF //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +286 0x0019 //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 +#VOL 2 +163 0x6000 //RX_TDDRC_ALPHA_UP_1 +164 0x6000 //RX_TDDRC_ALPHA_UP_2 +165 0x6000 //RX_TDDRC_ALPHA_UP_3 +166 0x1000 //RX_TDDRC_ALPHA_UP_4 +184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +185 0x4000 //RX_TDDRC_ALPHA_DWN_2 +186 0x4000 //RX_TDDRC_ALPHA_DWN_3 +189 0x4000 //RX_TDDRC_ALPHA_DWN_4 +190 0x7214 //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +269 0x0002 //RX_TDDRC_THRD_0 +270 0x0004 //RX_TDDRC_THRD_1 +271 0x1800 //RX_TDDRC_THRD_2 +272 0x1800 //RX_TDDRC_THRD_3 +273 0x7FFF //RX_TDDRC_SLANT_0 +274 0x7FFF //RX_TDDRC_SLANT_1 +275 0x6000 //RX_TDDRC_ALPHA_UP_0 +276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x199A //RX_TDDRC_HMNC_GAIN +279 0x0001 //RX_TDDRC_SMT_FLAG +280 0x0CCD //RX_TDDRC_SMT_W +281 0x0780 //RX_TDDRC_DRC_GAIN +195 0x001C //RX_FDEQ_SUBNUM +196 0x5C5C //RX_FDEQ_GAIN_0 +197 0x5448 //RX_FDEQ_GAIN_1 +198 0x4848 //RX_FDEQ_GAIN_2 +199 0x4840 //RX_FDEQ_GAIN_3 +200 0x4848 //RX_FDEQ_GAIN_4 +201 0x6048 //RX_FDEQ_GAIN_5 +202 0x4C40 //RX_FDEQ_GAIN_6 +203 0x4038 //RX_FDEQ_GAIN_7 +204 0x3C48 //RX_FDEQ_GAIN_8 +205 0x545C //RX_FDEQ_GAIN_9 +206 0x6864 //RX_FDEQ_GAIN_10 +207 0x7058 //RX_FDEQ_GAIN_11 +208 0x443C //RX_FDEQ_GAIN_12 +209 0x3838 //RX_FDEQ_GAIN_13 +210 0x4848 //RX_FDEQ_GAIN_14 +211 0x4848 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0202 //RX_FDEQ_BIN_0 +221 0x0203 //RX_FDEQ_BIN_1 +222 0x0303 //RX_FDEQ_BIN_2 +223 0x0304 //RX_FDEQ_BIN_3 +224 0x0404 //RX_FDEQ_BIN_4 +225 0x0204 //RX_FDEQ_BIN_5 +226 0x0A0A //RX_FDEQ_BIN_6 +227 0x0A0A //RX_FDEQ_BIN_7 +228 0x0B0C //RX_FDEQ_BIN_8 +229 0x0D0E //RX_FDEQ_BIN_9 +230 0x0E0F //RX_FDEQ_BIN_10 +231 0x0F10 //RX_FDEQ_BIN_11 +232 0x1011 //RX_FDEQ_BIN_12 +233 0x1104 //RX_FDEQ_BIN_13 +234 0x0000 //RX_FDEQ_BIN_14 +235 0x0000 //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x4000 //RX_FDEQ_RESRV_0 +245 0x0320 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0035 //RX_FDDRC_BAND_MARGIN_1 +248 0x00D5 //RX_FDDRC_BAND_MARGIN_2 +249 0x0120 //RX_FDDRC_BAND_MARGIN_3 +250 0x0004 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x2000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x2000 //RX_FDDRC_THRD_3_2 +258 0x5000 //RX_FDDRC_THRD_3_3 +259 0x4000 //RX_FDDRC_SLANT_0_0 +260 0x4000 //RX_FDDRC_SLANT_0_1 +261 0x4000 //RX_FDDRC_SLANT_0_2 +262 0x4000 //RX_FDDRC_SLANT_0_3 +263 0x7FFF //RX_FDDRC_SLANT_1_0 +264 0x7FFF //RX_FDDRC_SLANT_1_1 +265 0x7FFF //RX_FDDRC_SLANT_1_2 +266 0x7FFF //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +286 0x0024 //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 +#VOL 3 +163 0x6000 //RX_TDDRC_ALPHA_UP_1 +164 0x6000 //RX_TDDRC_ALPHA_UP_2 +165 0x6000 //RX_TDDRC_ALPHA_UP_3 +166 0x1000 //RX_TDDRC_ALPHA_UP_4 +184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +185 0x4000 //RX_TDDRC_ALPHA_DWN_2 +186 0x4000 //RX_TDDRC_ALPHA_DWN_3 +189 0x4000 //RX_TDDRC_ALPHA_DWN_4 +190 0x7214 //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +269 0x0002 //RX_TDDRC_THRD_0 +270 0x0004 //RX_TDDRC_THRD_1 +271 0x1800 //RX_TDDRC_THRD_2 +272 0x1800 //RX_TDDRC_THRD_3 +273 0x7FFF //RX_TDDRC_SLANT_0 +274 0x7FFF //RX_TDDRC_SLANT_1 +275 0x6000 //RX_TDDRC_ALPHA_UP_0 +276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x199A //RX_TDDRC_HMNC_GAIN +279 0x0001 //RX_TDDRC_SMT_FLAG +280 0x0CCD //RX_TDDRC_SMT_W +281 0x0780 //RX_TDDRC_DRC_GAIN +195 0x001C //RX_FDEQ_SUBNUM +196 0x5C5C //RX_FDEQ_GAIN_0 +197 0x5448 //RX_FDEQ_GAIN_1 +198 0x4848 //RX_FDEQ_GAIN_2 +199 0x4840 //RX_FDEQ_GAIN_3 +200 0x4848 //RX_FDEQ_GAIN_4 +201 0x6048 //RX_FDEQ_GAIN_5 +202 0x4C40 //RX_FDEQ_GAIN_6 +203 0x4038 //RX_FDEQ_GAIN_7 +204 0x3C48 //RX_FDEQ_GAIN_8 +205 0x545C //RX_FDEQ_GAIN_9 +206 0x6864 //RX_FDEQ_GAIN_10 +207 0x7058 //RX_FDEQ_GAIN_11 +208 0x443C //RX_FDEQ_GAIN_12 +209 0x3838 //RX_FDEQ_GAIN_13 +210 0x4848 //RX_FDEQ_GAIN_14 +211 0x4848 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0202 //RX_FDEQ_BIN_0 +221 0x0203 //RX_FDEQ_BIN_1 +222 0x0303 //RX_FDEQ_BIN_2 +223 0x0304 //RX_FDEQ_BIN_3 +224 0x0404 //RX_FDEQ_BIN_4 +225 0x0204 //RX_FDEQ_BIN_5 +226 0x0A0A //RX_FDEQ_BIN_6 +227 0x0A0A //RX_FDEQ_BIN_7 +228 0x0B0C //RX_FDEQ_BIN_8 +229 0x0D0E //RX_FDEQ_BIN_9 +230 0x0E0F //RX_FDEQ_BIN_10 +231 0x0F10 //RX_FDEQ_BIN_11 +232 0x1011 //RX_FDEQ_BIN_12 +233 0x1104 //RX_FDEQ_BIN_13 +234 0x0000 //RX_FDEQ_BIN_14 +235 0x0000 //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x4000 //RX_FDEQ_RESRV_0 +245 0x0320 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0035 //RX_FDDRC_BAND_MARGIN_1 +248 0x00D5 //RX_FDDRC_BAND_MARGIN_2 +249 0x0120 //RX_FDDRC_BAND_MARGIN_3 +250 0x0004 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x2000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x2000 //RX_FDDRC_THRD_3_2 +258 0x5000 //RX_FDDRC_THRD_3_3 +259 0x4000 //RX_FDDRC_SLANT_0_0 +260 0x4000 //RX_FDDRC_SLANT_0_1 +261 0x4000 //RX_FDDRC_SLANT_0_2 +262 0x4000 //RX_FDDRC_SLANT_0_3 +263 0x7FFF //RX_FDDRC_SLANT_1_0 +264 0x7FFF //RX_FDDRC_SLANT_1_1 +265 0x7FFF //RX_FDDRC_SLANT_1_2 +266 0x7FFF //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +286 0x0034 //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 +#VOL 4 +163 0x6000 //RX_TDDRC_ALPHA_UP_1 +164 0x6000 //RX_TDDRC_ALPHA_UP_2 +165 0x6000 //RX_TDDRC_ALPHA_UP_3 +166 0x1000 //RX_TDDRC_ALPHA_UP_4 +184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +185 0x4000 //RX_TDDRC_ALPHA_DWN_2 +186 0x4000 //RX_TDDRC_ALPHA_DWN_3 +189 0x4000 //RX_TDDRC_ALPHA_DWN_4 +190 0x7214 //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +269 0x0002 //RX_TDDRC_THRD_0 +270 0x0004 //RX_TDDRC_THRD_1 +271 0x1800 //RX_TDDRC_THRD_2 +272 0x1800 //RX_TDDRC_THRD_3 +273 0x7FFF //RX_TDDRC_SLANT_0 +274 0x7FFF //RX_TDDRC_SLANT_1 +275 0x6000 //RX_TDDRC_ALPHA_UP_0 +276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x199A //RX_TDDRC_HMNC_GAIN +279 0x0001 //RX_TDDRC_SMT_FLAG +280 0x0CCD //RX_TDDRC_SMT_W +281 0x0B39 //RX_TDDRC_DRC_GAIN +195 0x001C //RX_FDEQ_SUBNUM +196 0x6868 //RX_FDEQ_GAIN_0 +197 0x685C //RX_FDEQ_GAIN_1 +198 0x6868 //RX_FDEQ_GAIN_2 +199 0x544C //RX_FDEQ_GAIN_3 +200 0x4C54 //RX_FDEQ_GAIN_4 +201 0x704C //RX_FDEQ_GAIN_5 +202 0x4C40 //RX_FDEQ_GAIN_6 +203 0x4040 //RX_FDEQ_GAIN_7 +204 0x445C //RX_FDEQ_GAIN_8 +205 0x6068 //RX_FDEQ_GAIN_9 +206 0x7070 //RX_FDEQ_GAIN_10 +207 0x7C74 //RX_FDEQ_GAIN_11 +208 0x6060 //RX_FDEQ_GAIN_12 +209 0x6C6C //RX_FDEQ_GAIN_13 +210 0x4848 //RX_FDEQ_GAIN_14 +211 0x4848 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0202 //RX_FDEQ_BIN_0 +221 0x0203 //RX_FDEQ_BIN_1 +222 0x0303 //RX_FDEQ_BIN_2 +223 0x0304 //RX_FDEQ_BIN_3 +224 0x0404 //RX_FDEQ_BIN_4 +225 0x0204 //RX_FDEQ_BIN_5 +226 0x0A0A //RX_FDEQ_BIN_6 +227 0x0A0A //RX_FDEQ_BIN_7 +228 0x0B0C //RX_FDEQ_BIN_8 +229 0x0D0E //RX_FDEQ_BIN_9 +230 0x0E0F //RX_FDEQ_BIN_10 +231 0x0F10 //RX_FDEQ_BIN_11 +232 0x1011 //RX_FDEQ_BIN_12 +233 0x1104 //RX_FDEQ_BIN_13 +234 0x0000 //RX_FDEQ_BIN_14 +235 0x0000 //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x4000 //RX_FDEQ_RESRV_0 +245 0x0320 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0035 //RX_FDDRC_BAND_MARGIN_1 +248 0x00D5 //RX_FDDRC_BAND_MARGIN_2 +249 0x0120 //RX_FDDRC_BAND_MARGIN_3 +250 0x0004 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x2000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x2000 //RX_FDDRC_THRD_3_2 +258 0x5000 //RX_FDDRC_THRD_3_3 +259 0x4000 //RX_FDDRC_SLANT_0_0 +260 0x4000 //RX_FDDRC_SLANT_0_1 +261 0x4000 //RX_FDDRC_SLANT_0_2 +262 0x4000 //RX_FDDRC_SLANT_0_3 +263 0x7FFF //RX_FDDRC_SLANT_1_0 +264 0x7FFF //RX_FDDRC_SLANT_1_1 +265 0x7FFF //RX_FDDRC_SLANT_1_2 +266 0x7FFF //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +286 0x0038 //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 +#VOL 5 +163 0x6000 //RX_TDDRC_ALPHA_UP_1 +164 0x6000 //RX_TDDRC_ALPHA_UP_2 +165 0x6000 //RX_TDDRC_ALPHA_UP_3 +166 0x1000 //RX_TDDRC_ALPHA_UP_4 +184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +185 0x4000 //RX_TDDRC_ALPHA_DWN_2 +186 0x4000 //RX_TDDRC_ALPHA_DWN_3 +189 0x4000 //RX_TDDRC_ALPHA_DWN_4 +190 0x7214 //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +269 0x0002 //RX_TDDRC_THRD_0 +270 0x0004 //RX_TDDRC_THRD_1 +271 0x1800 //RX_TDDRC_THRD_2 +272 0x1800 //RX_TDDRC_THRD_3 +273 0x7FFF //RX_TDDRC_SLANT_0 +274 0x7FFF //RX_TDDRC_SLANT_1 +275 0x6000 //RX_TDDRC_ALPHA_UP_0 +276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x199A //RX_TDDRC_HMNC_GAIN +279 0x0001 //RX_TDDRC_SMT_FLAG +280 0x0CCD //RX_TDDRC_SMT_W +281 0x0B39 //RX_TDDRC_DRC_GAIN +195 0x001C //RX_FDEQ_SUBNUM +196 0x6868 //RX_FDEQ_GAIN_0 +197 0x685C //RX_FDEQ_GAIN_1 +198 0x6868 //RX_FDEQ_GAIN_2 +199 0x544C //RX_FDEQ_GAIN_3 +200 0x4C54 //RX_FDEQ_GAIN_4 +201 0x704C //RX_FDEQ_GAIN_5 +202 0x4C40 //RX_FDEQ_GAIN_6 +203 0x4040 //RX_FDEQ_GAIN_7 +204 0x445C //RX_FDEQ_GAIN_8 +205 0x6068 //RX_FDEQ_GAIN_9 +206 0x7070 //RX_FDEQ_GAIN_10 +207 0x7C74 //RX_FDEQ_GAIN_11 +208 0x6060 //RX_FDEQ_GAIN_12 +209 0x6C6C //RX_FDEQ_GAIN_13 +210 0x4848 //RX_FDEQ_GAIN_14 +211 0x4848 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0202 //RX_FDEQ_BIN_0 +221 0x0203 //RX_FDEQ_BIN_1 +222 0x0303 //RX_FDEQ_BIN_2 +223 0x0304 //RX_FDEQ_BIN_3 +224 0x0404 //RX_FDEQ_BIN_4 +225 0x0204 //RX_FDEQ_BIN_5 +226 0x0A0A //RX_FDEQ_BIN_6 +227 0x0A0A //RX_FDEQ_BIN_7 +228 0x0B0C //RX_FDEQ_BIN_8 +229 0x0D0E //RX_FDEQ_BIN_9 +230 0x0E0F //RX_FDEQ_BIN_10 +231 0x0F10 //RX_FDEQ_BIN_11 +232 0x1011 //RX_FDEQ_BIN_12 +233 0x1104 //RX_FDEQ_BIN_13 +234 0x0000 //RX_FDEQ_BIN_14 +235 0x0000 //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x4000 //RX_FDEQ_RESRV_0 +245 0x0320 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0035 //RX_FDDRC_BAND_MARGIN_1 +248 0x00D5 //RX_FDDRC_BAND_MARGIN_2 +249 0x0120 //RX_FDDRC_BAND_MARGIN_3 +250 0x0004 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x2000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x2000 //RX_FDDRC_THRD_3_2 +258 0x5000 //RX_FDDRC_THRD_3_3 +259 0x4000 //RX_FDDRC_SLANT_0_0 +260 0x4000 //RX_FDDRC_SLANT_0_1 +261 0x4000 //RX_FDDRC_SLANT_0_2 +262 0x4000 //RX_FDDRC_SLANT_0_3 +263 0x7FFF //RX_FDDRC_SLANT_1_0 +264 0x7FFF //RX_FDDRC_SLANT_1_1 +265 0x7FFF //RX_FDDRC_SLANT_1_2 +266 0x7FFF //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +286 0x0060 //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 +#VOL 6 +163 0x6000 //RX_TDDRC_ALPHA_UP_1 +164 0x6000 //RX_TDDRC_ALPHA_UP_2 +165 0x6000 //RX_TDDRC_ALPHA_UP_3 +166 0x1000 //RX_TDDRC_ALPHA_UP_4 +184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +185 0x4000 //RX_TDDRC_ALPHA_DWN_2 +186 0x4000 //RX_TDDRC_ALPHA_DWN_3 +189 0x4000 //RX_TDDRC_ALPHA_DWN_4 +190 0x7214 //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +269 0x0002 //RX_TDDRC_THRD_0 +270 0x0004 //RX_TDDRC_THRD_1 +271 0x1800 //RX_TDDRC_THRD_2 +272 0x1800 //RX_TDDRC_THRD_3 +273 0x7FFF //RX_TDDRC_SLANT_0 +274 0x7FFF //RX_TDDRC_SLANT_1 +275 0x6000 //RX_TDDRC_ALPHA_UP_0 +276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x199A //RX_TDDRC_HMNC_GAIN +279 0x0001 //RX_TDDRC_SMT_FLAG +280 0x0CCD //RX_TDDRC_SMT_W +281 0x0B39 //RX_TDDRC_DRC_GAIN +195 0x001C //RX_FDEQ_SUBNUM +196 0x6868 //RX_FDEQ_GAIN_0 +197 0x685C //RX_FDEQ_GAIN_1 +198 0x6868 //RX_FDEQ_GAIN_2 +199 0x544C //RX_FDEQ_GAIN_3 +200 0x4C54 //RX_FDEQ_GAIN_4 +201 0x704C //RX_FDEQ_GAIN_5 +202 0x4C40 //RX_FDEQ_GAIN_6 +203 0x4040 //RX_FDEQ_GAIN_7 +204 0x445C //RX_FDEQ_GAIN_8 +205 0x6068 //RX_FDEQ_GAIN_9 +206 0x7070 //RX_FDEQ_GAIN_10 +207 0x7C74 //RX_FDEQ_GAIN_11 +208 0x6060 //RX_FDEQ_GAIN_12 +209 0x6C6C //RX_FDEQ_GAIN_13 +210 0x4848 //RX_FDEQ_GAIN_14 +211 0x4848 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0202 //RX_FDEQ_BIN_0 +221 0x0203 //RX_FDEQ_BIN_1 +222 0x0303 //RX_FDEQ_BIN_2 +223 0x0304 //RX_FDEQ_BIN_3 +224 0x0404 //RX_FDEQ_BIN_4 +225 0x0204 //RX_FDEQ_BIN_5 +226 0x0A0A //RX_FDEQ_BIN_6 +227 0x0A0A //RX_FDEQ_BIN_7 +228 0x0B0C //RX_FDEQ_BIN_8 +229 0x0D0E //RX_FDEQ_BIN_9 +230 0x0E0F //RX_FDEQ_BIN_10 +231 0x0F10 //RX_FDEQ_BIN_11 +232 0x1011 //RX_FDEQ_BIN_12 +233 0x1104 //RX_FDEQ_BIN_13 +234 0x0000 //RX_FDEQ_BIN_14 +235 0x0000 //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x4000 //RX_FDEQ_RESRV_0 +245 0x0320 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0035 //RX_FDDRC_BAND_MARGIN_1 +248 0x00D5 //RX_FDDRC_BAND_MARGIN_2 +249 0x0120 //RX_FDDRC_BAND_MARGIN_3 +250 0x0004 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x2000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x2000 //RX_FDDRC_THRD_3_2 +258 0x5000 //RX_FDDRC_THRD_3_3 +259 0x4000 //RX_FDDRC_SLANT_0_0 +260 0x4000 //RX_FDDRC_SLANT_0_1 +261 0x4000 //RX_FDDRC_SLANT_0_2 +262 0x4000 //RX_FDDRC_SLANT_0_3 +263 0x7FFF //RX_FDDRC_SLANT_1_0 +264 0x7FFF //RX_FDDRC_SLANT_1_1 +265 0x7FFF //RX_FDDRC_SLANT_1_2 +266 0x7FFF //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +286 0x0100 //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 #CASE_NAME HEADSET-TTY_HCO-VOICE_GENERIC-SWB -#PARAM_MODE FULL -#PARAM_TYPE TX+RX -#TOTAL_CUSTOM_STEP 7 +#PARAM_MODE Full +#PARAM_TYPE TX+2RX +#TOTAL_CUSTOM_STEP 7+7 #TX 0 0x0001 //TX_OPERATION_MODE_0 1 0x0000 //TX_OPERATION_MODE_1 @@ -38838,7 +58990,7 @@ 239 0x0000 //TX_DT_RESRV_7 240 0x0000 //TX_DT_RESRV_8 241 0x0000 //TX_DT_RESRV_9 -242 0xF200 //TX_THR_SN_EST_0 +242 0xFA00 //TX_THR_SN_EST_0 243 0xF400 //TX_THR_SN_EST_1 244 0xF800 //TX_THR_SN_EST_2 245 0xF600 //TX_THR_SN_EST_3 @@ -38847,12 +58999,12 @@ 248 0xF800 //TX_THR_SN_EST_6 249 0xF800 //TX_THR_SN_EST_7 250 0x0100 //TX_DELTA_THR_SN_EST_0 -251 0x0000 //TX_DELTA_THR_SN_EST_1 +251 0x0100 //TX_DELTA_THR_SN_EST_1 252 0x0100 //TX_DELTA_THR_SN_EST_2 -253 0x0100 //TX_DELTA_THR_SN_EST_3 +253 0x0200 //TX_DELTA_THR_SN_EST_3 254 0x0200 //TX_DELTA_THR_SN_EST_4 255 0x0200 //TX_DELTA_THR_SN_EST_5 -256 0x0200 //TX_DELTA_THR_SN_EST_6 +256 0x0000 //TX_DELTA_THR_SN_EST_6 257 0x0200 //TX_DELTA_THR_SN_EST_7 258 0x4000 //TX_LAMBDA_NN_EST_0 259 0x4000 //TX_LAMBDA_NN_EST_1 @@ -38878,12 +59030,12 @@ 279 0x0000 //TX_B_POST_FLT_0 280 0x0000 //TX_B_POST_FLT_1 281 0x001A //TX_NS_LVL_CTRL_0 -282 0x001A //TX_NS_LVL_CTRL_1 +282 0x0014 //TX_NS_LVL_CTRL_1 283 0x0014 //TX_NS_LVL_CTRL_2 -284 0x0014 //TX_NS_LVL_CTRL_3 +284 0x000C //TX_NS_LVL_CTRL_3 285 0x000C //TX_NS_LVL_CTRL_4 286 0x000C //TX_NS_LVL_CTRL_5 -287 0x000C //TX_NS_LVL_CTRL_6 +287 0x001A //TX_NS_LVL_CTRL_6 288 0x000C //TX_NS_LVL_CTRL_7 289 0x000E //TX_MIN_GAIN_S_0 290 0x0014 //TX_MIN_GAIN_S_1 @@ -38899,10 +59051,10 @@ 300 0x7FFF //TX_SNRI_SUP_0 301 0x7FFF //TX_SNRI_SUP_1 302 0x7FFF //TX_SNRI_SUP_2 -303 0x7FFF //TX_SNRI_SUP_3 +303 0x4000 //TX_SNRI_SUP_3 304 0x4000 //TX_SNRI_SUP_4 305 0x4000 //TX_SNRI_SUP_5 -306 0x4000 //TX_SNRI_SUP_6 +306 0x7FFF //TX_SNRI_SUP_6 307 0x4000 //TX_SNRI_SUP_7 308 0x1200 //TX_THR_LFNS 309 0x0147 //TX_G_LFNS @@ -38911,12 +59063,12 @@ 312 0x7FFF //TX_A_POST_FILT_0 313 0x7FFF //TX_A_POST_FILT_1 314 0x4000 //TX_A_POST_FILT_S_0 -315 0x199A //TX_A_POST_FILT_S_1 +315 0x1000 //TX_A_POST_FILT_S_1 316 0x1000 //TX_A_POST_FILT_S_2 -317 0x1000 //TX_A_POST_FILT_S_3 +317 0x6666 //TX_A_POST_FILT_S_3 318 0x6666 //TX_A_POST_FILT_S_4 319 0x6666 //TX_A_POST_FILT_S_5 -320 0x6666 //TX_A_POST_FILT_S_6 +320 0x199A //TX_A_POST_FILT_S_6 321 0x6666 //TX_A_POST_FILT_S_7 322 0x2000 //TX_B_POST_FILT_0 323 0x2000 //TX_B_POST_FILT_1 @@ -38963,7 +59115,7 @@ 364 0x0000 //TX_K_APT 365 0x0001 //TX_NOISEDET 366 0x05A0 //TX_NDETCT -367 0x000A //TX_NOISE_TH_0 +367 0x0383 //TX_NOISE_TH_0 368 0x1388 //TX_NOISE_TH_0_2 369 0x3A98 //TX_NOISE_TH_0_3 370 0x0C80 //TX_NOISE_TH_1 @@ -38975,11 +59127,11 @@ 376 0x7FFF //TX_NOISE_TH_5_3 377 0x7FFF //TX_NOISE_TH_5_4 378 0x00C8 //TX_NOISE_TH_6 -379 0x000A //TX_MINENOISE_TH -380 0x0000 //TX_MINENOISE_MIC0_TH_MTS -381 0x0000 //TX_MINENOISE_MIC0_TH_EXP -382 0x0000 //TX_MINENOISE_MIC0_S_TH_MTS -383 0x0000 //TX_MINENOISE_MIC0_S_TH_EXP +379 0x044C //TX_MINENOISE_TH +380 0xD508 //TX_MORENS_TFMASK_TH +381 0x0001 //TX_DRC_QUIET_FLOOR +382 0x3A98 //TX_RATIODTL_CUT_TH +383 0x0DAC //TX_DT_CUT_K1 384 0x6400 //TX_OUT_ENER_S_TH_CLEAN 385 0x6400 //TX_OUT_ENER_S_TH_LESSCLEAN 386 0x6400 //TX_OUT_ENER_S_TH_NOISY @@ -38987,22 +59139,22 @@ 388 0x7D00 //TX_OUT_ENER_TH_SPEECH 389 0x0000 //TX_SN_NPB_GAIN 390 0x0000 //TX_NN_NPB_GAIN -391 0x0000 //TX_CSX_ALPHA_0 -392 0x0000 //TX_CSX_ALPHA_1 -393 0x0000 //TX_CSX_ALPHA_2 -394 0x0000 //TX_CSX_ALPHA_3 -395 0x0000 //TX_MU_ARSP_EST -396 0x0000 //TX_P_OUTBEAM_MIN_TH +391 0x7FFF //TX_POST_MASK_SUP_HSNE +392 0x1388 //TX_TAIL_DET_TH +393 0x4000 //TX_B_LESSCUT_RTO_WTA +394 0x0000 //TX_MEL_G_R +395 0x0080 //TX_SUPHIGH_TH +396 0x0000 //TX_MASK_G_R 397 0x0000 //TX_EXTRA_NS_L -398 0x0000 //TX_EXTRA_NS_A -399 0x0000 //TX_VR_NOISE_FLOOR_TH +398 0x1800 //TX_C_POST_FLT_MASK +399 0x7FFF //TX_A_POST_FLT_WNS 400 0x0000 //TX_MIN_G_LOW300HZ 401 0x0010 //TX_MAXLEVEL_CNG 402 0x0000 //TX_STN_NOISE_TH 403 0x0000 //TX_POST_MASK_SUP 404 0x0000 //TX_POST_MASK_ADJUST 405 0x0014 //TX_NS_ENOISE_MIC0_TH -406 0x0014 //TX_MINENOISE_MIC0_TH +406 0x02F3 //TX_MINENOISE_MIC0_TH 407 0x0226 //TX_MINENOISE_MIC0_S_TH 408 0x2879 //TX_MIN_G_CTRL_SSNS 409 0x0400 //TX_METAL_RTO_THR @@ -39110,16 +59262,16 @@ 511 0x6666 //TX_MIC_TO_BFGAIN 512 0x6666 //TX_MICTOBFGAIN0 513 0x0014 //TX_FASTMUE_TH -514 0x0000 //TX_DERVB_LEN_0 -515 0x0000 //TX_DERVB_LEN_1 -516 0x0000 //TX_RHO_DERVB -517 0x0000 //TX_MIC_INDX_DERVB -518 0x0000 //TX_MU_DERVB -519 0x0000 //TX_DR_RESRV_0 -520 0x0000 //TX_DR_RESRV_1 -521 0x0000 //TX_DR_RESRV_2 -522 0x0000 //TX_DR_RESRV_3 -523 0x0000 //TX_DR_RESRV_4 +514 0xC000 //TX_DEREVERB_LF_MU +515 0xC000 //TX_DEREVERB_HF_MU +516 0xCCCC //TX_DEREVERB_DELAY +517 0xD999 //TX_DEREVERB_COEF_LEN +518 0x1F40 //TX_DEREVERB_DNR +519 0x0000 //TX_DEREVERB_ALPHA +520 0x0000 //TX_DEREVERB_BETA +521 0x0000 //TX_GSC_RTOL_TH +522 0x7000 //TX_GSC_RTOH_TH +523 0x0064 //TX_WIDE2_MEANHTH 524 0x0000 //TX_DR_RESRV_5 525 0x0000 //TX_DR_RESRV_6 526 0x0000 //TX_DR_RESRV_7 @@ -39485,16 +59637,81 @@ 886 0x0000 //TX_FASTNS_TFMASKBIN_TH2 887 0x0000 //TX_FASTNS_TFMASKBIN_TH3 888 0x00C8 //TX_FASTNS_ARSPC_TH -889 0xD99A //TX_FASTNS_MASK5_TH +889 0x8000 //TX_FASTNS_MASK5_TH 890 0x051F //TX_POSTSSA_MIN_G_VR_MASK -891 0x7FFF //TX_A_LESSCUT_RTO_MASK +891 0x4000 //TX_A_LESSCUT_RTO_MASK 892 0x1770 //TX_FASTNS_NOISETH 893 0xC000 //TX_FASTNS_SSA_THLFL 894 0xC000 //TX_FASTNS_SSA_THHFL 895 0xCCCC //TX_FASTNS_SSA_THLFH 896 0xD999 //TX_FASTNS_SSA_THHFH +897 0x2339 //TX_SENDFUNC_REG_MICMUTE +898 0x0021 //TX_SENDFUNC_REG_MICMUTE1 +899 0x02BC //TX_MICMUTE_RATIO_THR +900 0x0140 //TX_MICMUTE_AMP_THR +901 0x0004 //TX_MICMUTE_HPF_IND +902 0x00C0 //TX_MICMUTE_LOG_EYR_TH +903 0x0008 //TX_MICMUTE_CVG_TIME +904 0x0008 //TX_MICMUTE_RELEASE_TIME +905 0x01FE //TX_MIC_VOLUME_MIC0MUTE +906 0x0020 //TX_MICMUTE_EPD_OFFSET_0 +907 0x001E //TX_MICMUTE_FRQ_AEC_L +908 0x7999 //TX_MICMUTE_EAD_THR +909 0x7FFF //TX_MICMUTE_LAMBDA_CB_NLE +910 0x7FFF //TX_MICMUTE_LAMBDA_RE_EST +911 0x4000 //TX_DTD_THR1_MICMUTE_0 +912 0x7000 //TX_DTD_THR1_MICMUTE_1 +913 0x7FFF //TX_DTD_THR1_MICMUTE_2 +914 0x7FFF //TX_DTD_THR1_MICMUTE_3 +915 0x6CCC //TX_DTD_THR2_MICMUTE_0 +916 0x0400 //TX_MICMUTE_MIN_EQ_RE_EST_0 +917 0x0400 //TX_MICMUTE_MIN_EQ_RE_EST_1 +918 0x1000 //TX_MICMUTE_MIN_EQ_RE_EST_2 +919 0x7FFF //TX_MICMUTE_MIN_EQ_RE_EST_3 +920 0x7FFF //TX_MICMUTE_MIN_EQ_RE_EST_4 +921 0x4000 //TX_MICMUTE_C_POST_FLT +922 0x03E8 //TX_MICMUTE_DT_CUT_K +923 0x0001 //TX_MICMUTE_DT_CUT_THR +924 0x03E8 //TX_MICMUTE_DT_CUT_K2 +925 0x0001 //TX_MICMUTE_DT_CUT_THR2 +926 0x0064 //TX_MICMUTE_DT2_HOLD_N +927 0x1000 //TX_MICMUTE_RATIODTH_THCUT +928 0x1000 //TX_MICMUTE_B_POST_FLT_ECHOL +929 0x7FFF //TX_MICMUTE_B_POST_FLT_ECHOH +930 0x0400 //TX_MICMUTE_C_POST_FLT_MASK +931 0x7999 //TX_MICMUTE_RATIODTL_CUT_TH +932 0x0258 //TX_MICMUTE_DT_CUT_K1 +933 0x0800 //TX_MICMUTE_N2_SN_EST +934 0xFC00 //TX_MICMUTE_THR_SN_EST_0 +935 0x001C //TX_MICMUTE_MIN_G_CTRL_0 +936 0x6000 //TX_MICMUTE_A_POST_FILT_S_0 +937 0x7000 //TX_MICMUTE_B_POST_FILT_0 +938 0x2710 //TX_MIC1RUB_AMP_THR +939 0x0010 //TX_MIC1MUTE_RATIO_THR +940 0x0450 //TX_MIC1MUTE_AMP_THR +941 0x0008 //TX_MIC1MUTE_CVG_TIME +942 0x0008 //TX_MIC1MUTE_RELEASE_TIME +943 0x0000 //TX_AMS_RESRV_01 +944 0x0000 //TX_AMS_RESRV_02 +945 0x0000 //TX_AMS_RESRV_03 +946 0x0000 //TX_AMS_RESRV_04 +947 0x0000 //TX_AMS_RESRV_05 +948 0x0000 //TX_AMS_RESRV_06 +949 0x0000 //TX_AMS_RESRV_07 +950 0x0000 //TX_AMS_RESRV_08 +951 0x0000 //TX_AMS_RESRV_09 +952 0x0000 //TX_AMS_RESRV_10 +953 0x0000 //TX_AMS_RESRV_11 +954 0x0000 //TX_AMS_RESRV_12 +955 0x0000 //TX_AMS_RESRV_13 +956 0x0000 //TX_AMS_RESRV_14 +957 0x0000 //TX_AMS_RESRV_15 +958 0x0000 //TX_AMS_RESRV_16 +959 0x0000 //TX_AMS_RESRV_17 +960 0x0000 //TX_AMS_RESRV_18 +961 0x0000 //TX_AMS_RESRV_19 #RX -0 0x027C //RX_RECVFUNC_MODE_0 +0 0x243C //RX_RECVFUNC_MODE_0 1 0x0000 //RX_RECVFUNC_MODE_1 2 0x0003 //RX_SAMPLINGFREQ_SIG 3 0x0003 //RX_SAMPLINGFREQ_PROC @@ -39504,8 +59721,8 @@ 7 0x6000 //RX_TDDRC_ALPHA_UP_2 8 0x6000 //RX_TDDRC_ALPHA_UP_3 9 0x1000 //RX_TDDRC_ALPHA_UP_4 -10 0x0800 //RX_PGA -11 0x7652 //RX_A_HP +10 0x0403 //RX_PGA +11 0x7D83 //RX_A_HP 12 0x4000 //RX_B_PE 13 0x7800 //RX_THR_PITCH_DET_0 14 0x7000 //RX_THR_PITCH_DET_1 @@ -39533,22 +59750,22 @@ 36 0x0000 //RX_LMT_THRD 37 0x4000 //RX_LMT_ALPHA 38 0x0020 //RX_FDEQ_SUBNUM -39 0x484E //RX_FDEQ_GAIN_0 -40 0x4E4E //RX_FDEQ_GAIN_1 -41 0x4E4E //RX_FDEQ_GAIN_2 +39 0x4848 //RX_FDEQ_GAIN_0 +40 0x4848 //RX_FDEQ_GAIN_1 +41 0x4848 //RX_FDEQ_GAIN_2 42 0x4848 //RX_FDEQ_GAIN_3 -43 0x484E //RX_FDEQ_GAIN_4 -44 0x6E4E //RX_FDEQ_GAIN_5 -45 0x4850 //RX_FDEQ_GAIN_6 +43 0x4848 //RX_FDEQ_GAIN_4 +44 0x7C48 //RX_FDEQ_GAIN_5 +45 0x4848 //RX_FDEQ_GAIN_6 46 0x4848 //RX_FDEQ_GAIN_7 47 0x4860 //RX_FDEQ_GAIN_8 48 0x7468 //RX_FDEQ_GAIN_9 -49 0x6060 //RX_FDEQ_GAIN_10 -50 0x6666 //RX_FDEQ_GAIN_11 -51 0x6666 //RX_FDEQ_GAIN_12 -52 0x6666 //RX_FDEQ_GAIN_13 -53 0x6060 //RX_FDEQ_GAIN_14 -54 0x6060 //RX_FDEQ_GAIN_15 +49 0x5858 //RX_FDEQ_GAIN_10 +50 0x5858 //RX_FDEQ_GAIN_11 +51 0x5C54 //RX_FDEQ_GAIN_12 +52 0x5448 //RX_FDEQ_GAIN_13 +53 0x4848 //RX_FDEQ_GAIN_14 +54 0x5858 //RX_FDEQ_GAIN_15 55 0x4848 //RX_FDEQ_GAIN_16 56 0x4848 //RX_FDEQ_GAIN_17 57 0x4848 //RX_FDEQ_GAIN_18 @@ -39562,7 +59779,7 @@ 65 0x0303 //RX_FDEQ_BIN_2 66 0x0304 //RX_FDEQ_BIN_3 67 0x0404 //RX_FDEQ_BIN_4 -68 0x0209 //RX_FDEQ_BIN_5 +68 0x0308 //RX_FDEQ_BIN_5 69 0x0808 //RX_FDEQ_BIN_6 70 0x090A //RX_FDEQ_BIN_7 71 0x0B0C //RX_FDEQ_BIN_8 @@ -39618,12 +59835,12 @@ 121 0x199A //RX_TDDRC_HMNC_GAIN 122 0x0001 //RX_TDDRC_SMT_FLAG 123 0x0CCD //RX_TDDRC_SMT_W -124 0x04BC //RX_TDDRC_DRC_GAIN +124 0x0550 //RX_TDDRC_DRC_GAIN 125 0x7C00 //RX_LAMBDA_PKA_FP -126 0x2000 //RX_TPKA_FP -127 0x2000 //RX_MIN_G_FP -128 0x0080 //RX_MAX_G_FP -129 0x0019 //RX_SPK_VOL +126 0x0FA0 //RX_TPKA_FP +127 0x0400 //RX_MIN_G_FP +128 0x0800 //RX_MAX_G_FP +129 0x0014 //RX_SPK_VOL 130 0x0000 //RX_VOL_RESRV_0 131 0x0000 //RX_MAXLEVEL_CNG 132 0x3000 //RX_BWE_UV_TH @@ -39657,41 +59874,41 @@ 8 0x6000 //RX_TDDRC_ALPHA_UP_3 9 0x1000 //RX_TDDRC_ALPHA_UP_4 27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 -28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 -29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 -32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +28 0x4000 //RX_TDDRC_ALPHA_DWN_2 +29 0x4000 //RX_TDDRC_ALPHA_DWN_3 +32 0x4000 //RX_TDDRC_ALPHA_DWN_4 33 0x7214 //RX_TDDRC_LIMITER_THRD 34 0x0800 //RX_TDDRC_LIMITER_GAIN 112 0x0002 //RX_TDDRC_THRD_0 113 0x0004 //RX_TDDRC_THRD_1 -114 0x1A00 //RX_TDDRC_THRD_2 -115 0x1A00 //RX_TDDRC_THRD_3 -116 0x7EB8 //RX_TDDRC_SLANT_0 -117 0x2500 //RX_TDDRC_SLANT_1 +114 0x1800 //RX_TDDRC_THRD_2 +115 0x1800 //RX_TDDRC_THRD_3 +116 0x7FFF //RX_TDDRC_SLANT_0 +117 0x7FFF //RX_TDDRC_SLANT_1 118 0x6000 //RX_TDDRC_ALPHA_UP_0 119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 120 0x0000 //RX_TDDRC_HMNC_FLAG 121 0x199A //RX_TDDRC_HMNC_GAIN 122 0x0001 //RX_TDDRC_SMT_FLAG 123 0x0CCD //RX_TDDRC_SMT_W -124 0x04BC //RX_TDDRC_DRC_GAIN +124 0x0780 //RX_TDDRC_DRC_GAIN 38 0x0020 //RX_FDEQ_SUBNUM -39 0x484E //RX_FDEQ_GAIN_0 -40 0x4E4E //RX_FDEQ_GAIN_1 -41 0x4E4E //RX_FDEQ_GAIN_2 -42 0x4848 //RX_FDEQ_GAIN_3 -43 0x484E //RX_FDEQ_GAIN_4 -44 0x6E4E //RX_FDEQ_GAIN_5 -45 0x4850 //RX_FDEQ_GAIN_6 -46 0x4848 //RX_FDEQ_GAIN_7 -47 0x4860 //RX_FDEQ_GAIN_8 -48 0x7468 //RX_FDEQ_GAIN_9 -49 0x6060 //RX_FDEQ_GAIN_10 -50 0x6666 //RX_FDEQ_GAIN_11 -51 0x6666 //RX_FDEQ_GAIN_12 -52 0x6666 //RX_FDEQ_GAIN_13 -53 0x6060 //RX_FDEQ_GAIN_14 -54 0x6060 //RX_FDEQ_GAIN_15 +39 0x6868 //RX_FDEQ_GAIN_0 +40 0x6848 //RX_FDEQ_GAIN_1 +41 0x4848 //RX_FDEQ_GAIN_2 +42 0x3434 //RX_FDEQ_GAIN_3 +43 0x3840 //RX_FDEQ_GAIN_4 +44 0x4838 //RX_FDEQ_GAIN_5 +45 0x5444 //RX_FDEQ_GAIN_6 +46 0x443C //RX_FDEQ_GAIN_7 +47 0x3C60 //RX_FDEQ_GAIN_8 +48 0x6460 //RX_FDEQ_GAIN_9 +49 0x6064 //RX_FDEQ_GAIN_10 +50 0x5C5C //RX_FDEQ_GAIN_11 +51 0x5440 //RX_FDEQ_GAIN_12 +52 0x4040 //RX_FDEQ_GAIN_13 +53 0x4040 //RX_FDEQ_GAIN_14 +54 0x5858 //RX_FDEQ_GAIN_15 55 0x4848 //RX_FDEQ_GAIN_16 56 0x4848 //RX_FDEQ_GAIN_17 57 0x4848 //RX_FDEQ_GAIN_18 @@ -39705,7 +59922,106 @@ 65 0x0303 //RX_FDEQ_BIN_2 66 0x0304 //RX_FDEQ_BIN_3 67 0x0404 //RX_FDEQ_BIN_4 -68 0x0209 //RX_FDEQ_BIN_5 +68 0x0308 //RX_FDEQ_BIN_5 +69 0x0808 //RX_FDEQ_BIN_6 +70 0x090A //RX_FDEQ_BIN_7 +71 0x0B0C //RX_FDEQ_BIN_8 +72 0x0D0E //RX_FDEQ_BIN_9 +73 0x1013 //RX_FDEQ_BIN_10 +74 0x1719 //RX_FDEQ_BIN_11 +75 0x1B1E //RX_FDEQ_BIN_12 +76 0x1E1E //RX_FDEQ_BIN_13 +77 0x1E28 //RX_FDEQ_BIN_14 +78 0x282C //RX_FDEQ_BIN_15 +79 0x0000 //RX_FDEQ_BIN_16 +80 0x0000 //RX_FDEQ_BIN_17 +81 0x0000 //RX_FDEQ_BIN_18 +82 0x0000 //RX_FDEQ_BIN_19 +83 0x0000 //RX_FDEQ_BIN_20 +84 0x0000 //RX_FDEQ_BIN_21 +85 0x0000 //RX_FDEQ_BIN_22 +86 0x0000 //RX_FDEQ_BIN_23 +87 0x4000 //RX_FDEQ_RESRV_0 +88 0x0320 //RX_FDEQ_RESRV_1 +89 0x0018 //RX_FDDRC_BAND_MARGIN_0 +90 0x0035 //RX_FDDRC_BAND_MARGIN_1 +91 0x00D5 //RX_FDDRC_BAND_MARGIN_2 +92 0x0120 //RX_FDDRC_BAND_MARGIN_3 +93 0x0004 //RX_FDDRC_BLOCK_EXP +94 0x5000 //RX_FDDRC_THRD_2_0 +95 0x5000 //RX_FDDRC_THRD_2_1 +96 0x2000 //RX_FDDRC_THRD_2_2 +97 0x5000 //RX_FDDRC_THRD_2_3 +98 0x6400 //RX_FDDRC_THRD_3_0 +99 0x6400 //RX_FDDRC_THRD_3_1 +100 0x2000 //RX_FDDRC_THRD_3_2 +101 0x5000 //RX_FDDRC_THRD_3_3 +102 0x4000 //RX_FDDRC_SLANT_0_0 +103 0x4000 //RX_FDDRC_SLANT_0_1 +104 0x4000 //RX_FDDRC_SLANT_0_2 +105 0x4000 //RX_FDDRC_SLANT_0_3 +106 0x7FFF //RX_FDDRC_SLANT_1_0 +107 0x7FFF //RX_FDDRC_SLANT_1_1 +108 0x7FFF //RX_FDDRC_SLANT_1_2 +109 0x7FFF //RX_FDDRC_SLANT_1_3 +110 0x0000 //RX_FDDRC_RESRV_0 +129 0x0011 //RX_SPK_VOL +130 0x0000 //RX_VOL_RESRV_0 +#VOL 1 +6 0x6000 //RX_TDDRC_ALPHA_UP_1 +7 0x6000 //RX_TDDRC_ALPHA_UP_2 +8 0x6000 //RX_TDDRC_ALPHA_UP_3 +9 0x1000 //RX_TDDRC_ALPHA_UP_4 +27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +28 0x4000 //RX_TDDRC_ALPHA_DWN_2 +29 0x4000 //RX_TDDRC_ALPHA_DWN_3 +32 0x4000 //RX_TDDRC_ALPHA_DWN_4 +33 0x7214 //RX_TDDRC_LIMITER_THRD +34 0x0800 //RX_TDDRC_LIMITER_GAIN +112 0x0002 //RX_TDDRC_THRD_0 +113 0x0004 //RX_TDDRC_THRD_1 +114 0x1800 //RX_TDDRC_THRD_2 +115 0x1800 //RX_TDDRC_THRD_3 +116 0x7FFF //RX_TDDRC_SLANT_0 +117 0x7FFF //RX_TDDRC_SLANT_1 +118 0x6000 //RX_TDDRC_ALPHA_UP_0 +119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +120 0x0000 //RX_TDDRC_HMNC_FLAG +121 0x199A //RX_TDDRC_HMNC_GAIN +122 0x0001 //RX_TDDRC_SMT_FLAG +123 0x0CCD //RX_TDDRC_SMT_W +124 0x0780 //RX_TDDRC_DRC_GAIN +38 0x0020 //RX_FDEQ_SUBNUM +39 0x6868 //RX_FDEQ_GAIN_0 +40 0x6848 //RX_FDEQ_GAIN_1 +41 0x4848 //RX_FDEQ_GAIN_2 +42 0x3434 //RX_FDEQ_GAIN_3 +43 0x3840 //RX_FDEQ_GAIN_4 +44 0x4838 //RX_FDEQ_GAIN_5 +45 0x5444 //RX_FDEQ_GAIN_6 +46 0x443C //RX_FDEQ_GAIN_7 +47 0x3C60 //RX_FDEQ_GAIN_8 +48 0x6460 //RX_FDEQ_GAIN_9 +49 0x6064 //RX_FDEQ_GAIN_10 +50 0x5C5C //RX_FDEQ_GAIN_11 +51 0x5440 //RX_FDEQ_GAIN_12 +52 0x4040 //RX_FDEQ_GAIN_13 +53 0x4040 //RX_FDEQ_GAIN_14 +54 0x5858 //RX_FDEQ_GAIN_15 +55 0x4848 //RX_FDEQ_GAIN_16 +56 0x4848 //RX_FDEQ_GAIN_17 +57 0x4848 //RX_FDEQ_GAIN_18 +58 0x4848 //RX_FDEQ_GAIN_19 +59 0x4848 //RX_FDEQ_GAIN_20 +60 0x4848 //RX_FDEQ_GAIN_21 +61 0x4848 //RX_FDEQ_GAIN_22 +62 0x4848 //RX_FDEQ_GAIN_23 +63 0x0202 //RX_FDEQ_BIN_0 +64 0x0203 //RX_FDEQ_BIN_1 +65 0x0303 //RX_FDEQ_BIN_2 +66 0x0304 //RX_FDEQ_BIN_3 +67 0x0404 //RX_FDEQ_BIN_4 +68 0x0308 //RX_FDEQ_BIN_5 69 0x0808 //RX_FDEQ_BIN_6 70 0x090A //RX_FDEQ_BIN_7 71 0x0B0C //RX_FDEQ_BIN_8 @@ -39750,146 +60066,47 @@ 110 0x0000 //RX_FDDRC_RESRV_0 129 0x0019 //RX_SPK_VOL 130 0x0000 //RX_VOL_RESRV_0 -#VOL 1 -6 0x6000 //RX_TDDRC_ALPHA_UP_1 -7 0x6000 //RX_TDDRC_ALPHA_UP_2 -8 0x6000 //RX_TDDRC_ALPHA_UP_3 -9 0x1000 //RX_TDDRC_ALPHA_UP_4 -27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 -28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 -29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 -32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 -33 0x7214 //RX_TDDRC_LIMITER_THRD -34 0x0800 //RX_TDDRC_LIMITER_GAIN -112 0x0002 //RX_TDDRC_THRD_0 -113 0x0004 //RX_TDDRC_THRD_1 -114 0x1A00 //RX_TDDRC_THRD_2 -115 0x1A00 //RX_TDDRC_THRD_3 -116 0x7EB8 //RX_TDDRC_SLANT_0 -117 0x2500 //RX_TDDRC_SLANT_1 -118 0x6000 //RX_TDDRC_ALPHA_UP_0 -119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 -120 0x0000 //RX_TDDRC_HMNC_FLAG -121 0x199A //RX_TDDRC_HMNC_GAIN -122 0x0001 //RX_TDDRC_SMT_FLAG -123 0x0CCD //RX_TDDRC_SMT_W -124 0x04BC //RX_TDDRC_DRC_GAIN -38 0x0020 //RX_FDEQ_SUBNUM -39 0x484E //RX_FDEQ_GAIN_0 -40 0x4E4E //RX_FDEQ_GAIN_1 -41 0x4E4E //RX_FDEQ_GAIN_2 -42 0x4848 //RX_FDEQ_GAIN_3 -43 0x484E //RX_FDEQ_GAIN_4 -44 0x6E4E //RX_FDEQ_GAIN_5 -45 0x4850 //RX_FDEQ_GAIN_6 -46 0x4848 //RX_FDEQ_GAIN_7 -47 0x4860 //RX_FDEQ_GAIN_8 -48 0x7468 //RX_FDEQ_GAIN_9 -49 0x6060 //RX_FDEQ_GAIN_10 -50 0x6666 //RX_FDEQ_GAIN_11 -51 0x6666 //RX_FDEQ_GAIN_12 -52 0x6666 //RX_FDEQ_GAIN_13 -53 0x6060 //RX_FDEQ_GAIN_14 -54 0x6060 //RX_FDEQ_GAIN_15 -55 0x4848 //RX_FDEQ_GAIN_16 -56 0x4848 //RX_FDEQ_GAIN_17 -57 0x4848 //RX_FDEQ_GAIN_18 -58 0x4848 //RX_FDEQ_GAIN_19 -59 0x4848 //RX_FDEQ_GAIN_20 -60 0x4848 //RX_FDEQ_GAIN_21 -61 0x4848 //RX_FDEQ_GAIN_22 -62 0x4848 //RX_FDEQ_GAIN_23 -63 0x0202 //RX_FDEQ_BIN_0 -64 0x0203 //RX_FDEQ_BIN_1 -65 0x0303 //RX_FDEQ_BIN_2 -66 0x0304 //RX_FDEQ_BIN_3 -67 0x0404 //RX_FDEQ_BIN_4 -68 0x0209 //RX_FDEQ_BIN_5 -69 0x0808 //RX_FDEQ_BIN_6 -70 0x090A //RX_FDEQ_BIN_7 -71 0x0B0C //RX_FDEQ_BIN_8 -72 0x0D0E //RX_FDEQ_BIN_9 -73 0x1013 //RX_FDEQ_BIN_10 -74 0x1719 //RX_FDEQ_BIN_11 -75 0x1B1E //RX_FDEQ_BIN_12 -76 0x1E1E //RX_FDEQ_BIN_13 -77 0x1E28 //RX_FDEQ_BIN_14 -78 0x282C //RX_FDEQ_BIN_15 -79 0x0000 //RX_FDEQ_BIN_16 -80 0x0000 //RX_FDEQ_BIN_17 -81 0x0000 //RX_FDEQ_BIN_18 -82 0x0000 //RX_FDEQ_BIN_19 -83 0x0000 //RX_FDEQ_BIN_20 -84 0x0000 //RX_FDEQ_BIN_21 -85 0x0000 //RX_FDEQ_BIN_22 -86 0x0000 //RX_FDEQ_BIN_23 -87 0x4000 //RX_FDEQ_RESRV_0 -88 0x0320 //RX_FDEQ_RESRV_1 -89 0x0018 //RX_FDDRC_BAND_MARGIN_0 -90 0x0035 //RX_FDDRC_BAND_MARGIN_1 -91 0x00D5 //RX_FDDRC_BAND_MARGIN_2 -92 0x0120 //RX_FDDRC_BAND_MARGIN_3 -93 0x0004 //RX_FDDRC_BLOCK_EXP -94 0x5000 //RX_FDDRC_THRD_2_0 -95 0x5000 //RX_FDDRC_THRD_2_1 -96 0x2000 //RX_FDDRC_THRD_2_2 -97 0x5000 //RX_FDDRC_THRD_2_3 -98 0x6400 //RX_FDDRC_THRD_3_0 -99 0x6400 //RX_FDDRC_THRD_3_1 -100 0x2000 //RX_FDDRC_THRD_3_2 -101 0x5000 //RX_FDDRC_THRD_3_3 -102 0x4000 //RX_FDDRC_SLANT_0_0 -103 0x4000 //RX_FDDRC_SLANT_0_1 -104 0x4000 //RX_FDDRC_SLANT_0_2 -105 0x4000 //RX_FDDRC_SLANT_0_3 -106 0x7FFF //RX_FDDRC_SLANT_1_0 -107 0x7FFF //RX_FDDRC_SLANT_1_1 -108 0x7FFF //RX_FDDRC_SLANT_1_2 -109 0x7FFF //RX_FDDRC_SLANT_1_3 -110 0x0000 //RX_FDDRC_RESRV_0 -129 0x0023 //RX_SPK_VOL -130 0x0000 //RX_VOL_RESRV_0 #VOL 2 6 0x6000 //RX_TDDRC_ALPHA_UP_1 7 0x6000 //RX_TDDRC_ALPHA_UP_2 8 0x6000 //RX_TDDRC_ALPHA_UP_3 9 0x1000 //RX_TDDRC_ALPHA_UP_4 27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 -28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 -29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 -32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +28 0x4000 //RX_TDDRC_ALPHA_DWN_2 +29 0x4000 //RX_TDDRC_ALPHA_DWN_3 +32 0x4000 //RX_TDDRC_ALPHA_DWN_4 33 0x7214 //RX_TDDRC_LIMITER_THRD 34 0x0800 //RX_TDDRC_LIMITER_GAIN 112 0x0002 //RX_TDDRC_THRD_0 113 0x0004 //RX_TDDRC_THRD_1 -114 0x1A00 //RX_TDDRC_THRD_2 -115 0x1A00 //RX_TDDRC_THRD_3 -116 0x7EB8 //RX_TDDRC_SLANT_0 -117 0x2500 //RX_TDDRC_SLANT_1 +114 0x1800 //RX_TDDRC_THRD_2 +115 0x1800 //RX_TDDRC_THRD_3 +116 0x7FFF //RX_TDDRC_SLANT_0 +117 0x7FFF //RX_TDDRC_SLANT_1 118 0x6000 //RX_TDDRC_ALPHA_UP_0 119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 120 0x0000 //RX_TDDRC_HMNC_FLAG 121 0x199A //RX_TDDRC_HMNC_GAIN 122 0x0001 //RX_TDDRC_SMT_FLAG 123 0x0CCD //RX_TDDRC_SMT_W -124 0x04BC //RX_TDDRC_DRC_GAIN +124 0x0780 //RX_TDDRC_DRC_GAIN 38 0x0020 //RX_FDEQ_SUBNUM -39 0x484E //RX_FDEQ_GAIN_0 -40 0x4E4E //RX_FDEQ_GAIN_1 -41 0x4E4E //RX_FDEQ_GAIN_2 -42 0x4848 //RX_FDEQ_GAIN_3 -43 0x484E //RX_FDEQ_GAIN_4 -44 0x6E4E //RX_FDEQ_GAIN_5 -45 0x4850 //RX_FDEQ_GAIN_6 -46 0x4848 //RX_FDEQ_GAIN_7 -47 0x4860 //RX_FDEQ_GAIN_8 -48 0x7468 //RX_FDEQ_GAIN_9 -49 0x6060 //RX_FDEQ_GAIN_10 -50 0x6666 //RX_FDEQ_GAIN_11 -51 0x6666 //RX_FDEQ_GAIN_12 -52 0x6666 //RX_FDEQ_GAIN_13 -53 0x6060 //RX_FDEQ_GAIN_14 -54 0x6060 //RX_FDEQ_GAIN_15 +39 0x6868 //RX_FDEQ_GAIN_0 +40 0x6848 //RX_FDEQ_GAIN_1 +41 0x4848 //RX_FDEQ_GAIN_2 +42 0x3434 //RX_FDEQ_GAIN_3 +43 0x3840 //RX_FDEQ_GAIN_4 +44 0x4838 //RX_FDEQ_GAIN_5 +45 0x5444 //RX_FDEQ_GAIN_6 +46 0x443C //RX_FDEQ_GAIN_7 +47 0x3C60 //RX_FDEQ_GAIN_8 +48 0x6460 //RX_FDEQ_GAIN_9 +49 0x6064 //RX_FDEQ_GAIN_10 +50 0x5C5C //RX_FDEQ_GAIN_11 +51 0x5440 //RX_FDEQ_GAIN_12 +52 0x4040 //RX_FDEQ_GAIN_13 +53 0x4040 //RX_FDEQ_GAIN_14 +54 0x5858 //RX_FDEQ_GAIN_15 55 0x4848 //RX_FDEQ_GAIN_16 56 0x4848 //RX_FDEQ_GAIN_17 57 0x4848 //RX_FDEQ_GAIN_18 @@ -39903,7 +60120,7 @@ 65 0x0303 //RX_FDEQ_BIN_2 66 0x0304 //RX_FDEQ_BIN_3 67 0x0404 //RX_FDEQ_BIN_4 -68 0x0209 //RX_FDEQ_BIN_5 +68 0x0308 //RX_FDEQ_BIN_5 69 0x0808 //RX_FDEQ_BIN_6 70 0x090A //RX_FDEQ_BIN_7 71 0x0B0C //RX_FDEQ_BIN_8 @@ -39946,7 +60163,7 @@ 108 0x7FFF //RX_FDDRC_SLANT_1_2 109 0x7FFF //RX_FDDRC_SLANT_1_3 110 0x0000 //RX_FDDRC_RESRV_0 -129 0x0032 //RX_SPK_VOL +129 0x0025 //RX_SPK_VOL 130 0x0000 //RX_VOL_RESRV_0 #VOL 3 6 0x6000 //RX_TDDRC_ALPHA_UP_1 @@ -39954,41 +60171,41 @@ 8 0x6000 //RX_TDDRC_ALPHA_UP_3 9 0x1000 //RX_TDDRC_ALPHA_UP_4 27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 -28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 -29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 -32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +28 0x4000 //RX_TDDRC_ALPHA_DWN_2 +29 0x4000 //RX_TDDRC_ALPHA_DWN_3 +32 0x4000 //RX_TDDRC_ALPHA_DWN_4 33 0x7214 //RX_TDDRC_LIMITER_THRD 34 0x0800 //RX_TDDRC_LIMITER_GAIN 112 0x0002 //RX_TDDRC_THRD_0 113 0x0004 //RX_TDDRC_THRD_1 -114 0x1A00 //RX_TDDRC_THRD_2 -115 0x1A00 //RX_TDDRC_THRD_3 -116 0x7EB8 //RX_TDDRC_SLANT_0 -117 0x2500 //RX_TDDRC_SLANT_1 +114 0x1800 //RX_TDDRC_THRD_2 +115 0x1800 //RX_TDDRC_THRD_3 +116 0x7FFF //RX_TDDRC_SLANT_0 +117 0x7FFF //RX_TDDRC_SLANT_1 118 0x6000 //RX_TDDRC_ALPHA_UP_0 119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 120 0x0000 //RX_TDDRC_HMNC_FLAG 121 0x199A //RX_TDDRC_HMNC_GAIN 122 0x0001 //RX_TDDRC_SMT_FLAG 123 0x0CCD //RX_TDDRC_SMT_W -124 0x04BC //RX_TDDRC_DRC_GAIN +124 0x0780 //RX_TDDRC_DRC_GAIN 38 0x0020 //RX_FDEQ_SUBNUM -39 0x484E //RX_FDEQ_GAIN_0 -40 0x4E4E //RX_FDEQ_GAIN_1 -41 0x4E4E //RX_FDEQ_GAIN_2 -42 0x4848 //RX_FDEQ_GAIN_3 -43 0x484E //RX_FDEQ_GAIN_4 -44 0x6E4E //RX_FDEQ_GAIN_5 -45 0x4850 //RX_FDEQ_GAIN_6 -46 0x4848 //RX_FDEQ_GAIN_7 -47 0x4860 //RX_FDEQ_GAIN_8 -48 0x7468 //RX_FDEQ_GAIN_9 -49 0x6060 //RX_FDEQ_GAIN_10 -50 0x6666 //RX_FDEQ_GAIN_11 -51 0x6666 //RX_FDEQ_GAIN_12 -52 0x6666 //RX_FDEQ_GAIN_13 -53 0x6060 //RX_FDEQ_GAIN_14 -54 0x6060 //RX_FDEQ_GAIN_15 +39 0x6868 //RX_FDEQ_GAIN_0 +40 0x6848 //RX_FDEQ_GAIN_1 +41 0x4848 //RX_FDEQ_GAIN_2 +42 0x3434 //RX_FDEQ_GAIN_3 +43 0x3840 //RX_FDEQ_GAIN_4 +44 0x4838 //RX_FDEQ_GAIN_5 +45 0x5444 //RX_FDEQ_GAIN_6 +46 0x443C //RX_FDEQ_GAIN_7 +47 0x3C60 //RX_FDEQ_GAIN_8 +48 0x6460 //RX_FDEQ_GAIN_9 +49 0x6064 //RX_FDEQ_GAIN_10 +50 0x5C5C //RX_FDEQ_GAIN_11 +51 0x5440 //RX_FDEQ_GAIN_12 +52 0x4040 //RX_FDEQ_GAIN_13 +53 0x4040 //RX_FDEQ_GAIN_14 +54 0x5858 //RX_FDEQ_GAIN_15 55 0x4848 //RX_FDEQ_GAIN_16 56 0x4848 //RX_FDEQ_GAIN_17 57 0x4848 //RX_FDEQ_GAIN_18 @@ -40002,7 +60219,7 @@ 65 0x0303 //RX_FDEQ_BIN_2 66 0x0304 //RX_FDEQ_BIN_3 67 0x0404 //RX_FDEQ_BIN_4 -68 0x0209 //RX_FDEQ_BIN_5 +68 0x0308 //RX_FDEQ_BIN_5 69 0x0808 //RX_FDEQ_BIN_6 70 0x090A //RX_FDEQ_BIN_7 71 0x0B0C //RX_FDEQ_BIN_8 @@ -40045,7 +60262,7 @@ 108 0x7FFF //RX_FDDRC_SLANT_1_2 109 0x7FFF //RX_FDDRC_SLANT_1_3 110 0x0000 //RX_FDDRC_RESRV_0 -129 0x0048 //RX_SPK_VOL +129 0x0036 //RX_SPK_VOL 130 0x0000 //RX_VOL_RESRV_0 #VOL 4 6 0x6000 //RX_TDDRC_ALPHA_UP_1 @@ -40053,41 +60270,41 @@ 8 0x6000 //RX_TDDRC_ALPHA_UP_3 9 0x1000 //RX_TDDRC_ALPHA_UP_4 27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 -28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 -29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 -32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +28 0x4000 //RX_TDDRC_ALPHA_DWN_2 +29 0x4000 //RX_TDDRC_ALPHA_DWN_3 +32 0x4000 //RX_TDDRC_ALPHA_DWN_4 33 0x7214 //RX_TDDRC_LIMITER_THRD 34 0x0800 //RX_TDDRC_LIMITER_GAIN 112 0x0002 //RX_TDDRC_THRD_0 113 0x0004 //RX_TDDRC_THRD_1 -114 0x1A00 //RX_TDDRC_THRD_2 -115 0x1A00 //RX_TDDRC_THRD_3 -116 0x7EB8 //RX_TDDRC_SLANT_0 -117 0x2500 //RX_TDDRC_SLANT_1 +114 0x1800 //RX_TDDRC_THRD_2 +115 0x1800 //RX_TDDRC_THRD_3 +116 0x7FFF //RX_TDDRC_SLANT_0 +117 0x7FFF //RX_TDDRC_SLANT_1 118 0x6000 //RX_TDDRC_ALPHA_UP_0 119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 120 0x0000 //RX_TDDRC_HMNC_FLAG 121 0x199A //RX_TDDRC_HMNC_GAIN 122 0x0001 //RX_TDDRC_SMT_FLAG 123 0x0CCD //RX_TDDRC_SMT_W -124 0x04BC //RX_TDDRC_DRC_GAIN +124 0x0D56 //RX_TDDRC_DRC_GAIN 38 0x0020 //RX_FDEQ_SUBNUM -39 0x484E //RX_FDEQ_GAIN_0 -40 0x4E4E //RX_FDEQ_GAIN_1 -41 0x4E4E //RX_FDEQ_GAIN_2 -42 0x4848 //RX_FDEQ_GAIN_3 -43 0x484E //RX_FDEQ_GAIN_4 -44 0x6E4E //RX_FDEQ_GAIN_5 -45 0x4850 //RX_FDEQ_GAIN_6 -46 0x4848 //RX_FDEQ_GAIN_7 -47 0x4860 //RX_FDEQ_GAIN_8 -48 0x7468 //RX_FDEQ_GAIN_9 -49 0x6060 //RX_FDEQ_GAIN_10 -50 0x6666 //RX_FDEQ_GAIN_11 -51 0x6666 //RX_FDEQ_GAIN_12 -52 0x6666 //RX_FDEQ_GAIN_13 -53 0x6060 //RX_FDEQ_GAIN_14 -54 0x6060 //RX_FDEQ_GAIN_15 +39 0x6868 //RX_FDEQ_GAIN_0 +40 0x6850 //RX_FDEQ_GAIN_1 +41 0x5048 //RX_FDEQ_GAIN_2 +42 0x383C //RX_FDEQ_GAIN_3 +43 0x4048 //RX_FDEQ_GAIN_4 +44 0x7040 //RX_FDEQ_GAIN_5 +45 0x4C44 //RX_FDEQ_GAIN_6 +46 0x4448 //RX_FDEQ_GAIN_7 +47 0x4868 //RX_FDEQ_GAIN_8 +48 0x7C70 //RX_FDEQ_GAIN_9 +49 0x707C //RX_FDEQ_GAIN_10 +50 0x786C //RX_FDEQ_GAIN_11 +51 0x6454 //RX_FDEQ_GAIN_12 +52 0x604C //RX_FDEQ_GAIN_13 +53 0x585C //RX_FDEQ_GAIN_14 +54 0x7480 //RX_FDEQ_GAIN_15 55 0x4848 //RX_FDEQ_GAIN_16 56 0x4848 //RX_FDEQ_GAIN_17 57 0x4848 //RX_FDEQ_GAIN_18 @@ -40101,7 +60318,7 @@ 65 0x0303 //RX_FDEQ_BIN_2 66 0x0304 //RX_FDEQ_BIN_3 67 0x0404 //RX_FDEQ_BIN_4 -68 0x0209 //RX_FDEQ_BIN_5 +68 0x0308 //RX_FDEQ_BIN_5 69 0x0808 //RX_FDEQ_BIN_6 70 0x090A //RX_FDEQ_BIN_7 71 0x0B0C //RX_FDEQ_BIN_8 @@ -40144,7 +60361,7 @@ 108 0x7FFF //RX_FDDRC_SLANT_1_2 109 0x7FFF //RX_FDDRC_SLANT_1_3 110 0x0000 //RX_FDDRC_RESRV_0 -129 0x0068 //RX_SPK_VOL +129 0x0034 //RX_SPK_VOL 130 0x0000 //RX_VOL_RESRV_0 #VOL 5 6 0x6000 //RX_TDDRC_ALPHA_UP_1 @@ -40152,41 +60369,41 @@ 8 0x6000 //RX_TDDRC_ALPHA_UP_3 9 0x1000 //RX_TDDRC_ALPHA_UP_4 27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 -28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 -29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 -32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +28 0x4000 //RX_TDDRC_ALPHA_DWN_2 +29 0x4000 //RX_TDDRC_ALPHA_DWN_3 +32 0x4000 //RX_TDDRC_ALPHA_DWN_4 33 0x7214 //RX_TDDRC_LIMITER_THRD 34 0x0800 //RX_TDDRC_LIMITER_GAIN 112 0x0002 //RX_TDDRC_THRD_0 113 0x0004 //RX_TDDRC_THRD_1 -114 0x1A00 //RX_TDDRC_THRD_2 -115 0x1A00 //RX_TDDRC_THRD_3 -116 0x7EB8 //RX_TDDRC_SLANT_0 -117 0x2500 //RX_TDDRC_SLANT_1 +114 0x1800 //RX_TDDRC_THRD_2 +115 0x1800 //RX_TDDRC_THRD_3 +116 0x7FFF //RX_TDDRC_SLANT_0 +117 0x7FFF //RX_TDDRC_SLANT_1 118 0x6000 //RX_TDDRC_ALPHA_UP_0 119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 120 0x0000 //RX_TDDRC_HMNC_FLAG 121 0x199A //RX_TDDRC_HMNC_GAIN 122 0x0001 //RX_TDDRC_SMT_FLAG 123 0x0CCD //RX_TDDRC_SMT_W -124 0x04BC //RX_TDDRC_DRC_GAIN +124 0x0D56 //RX_TDDRC_DRC_GAIN 38 0x0020 //RX_FDEQ_SUBNUM -39 0x484E //RX_FDEQ_GAIN_0 -40 0x4E4E //RX_FDEQ_GAIN_1 -41 0x4E4E //RX_FDEQ_GAIN_2 -42 0x4848 //RX_FDEQ_GAIN_3 -43 0x484E //RX_FDEQ_GAIN_4 -44 0x6E4E //RX_FDEQ_GAIN_5 -45 0x4850 //RX_FDEQ_GAIN_6 -46 0x4848 //RX_FDEQ_GAIN_7 -47 0x4860 //RX_FDEQ_GAIN_8 -48 0x7468 //RX_FDEQ_GAIN_9 -49 0x6060 //RX_FDEQ_GAIN_10 -50 0x6666 //RX_FDEQ_GAIN_11 -51 0x6666 //RX_FDEQ_GAIN_12 -52 0x6666 //RX_FDEQ_GAIN_13 -53 0x6060 //RX_FDEQ_GAIN_14 -54 0x6060 //RX_FDEQ_GAIN_15 +39 0x6868 //RX_FDEQ_GAIN_0 +40 0x6850 //RX_FDEQ_GAIN_1 +41 0x5048 //RX_FDEQ_GAIN_2 +42 0x383C //RX_FDEQ_GAIN_3 +43 0x4048 //RX_FDEQ_GAIN_4 +44 0x7040 //RX_FDEQ_GAIN_5 +45 0x4C44 //RX_FDEQ_GAIN_6 +46 0x4448 //RX_FDEQ_GAIN_7 +47 0x4868 //RX_FDEQ_GAIN_8 +48 0x7C70 //RX_FDEQ_GAIN_9 +49 0x707C //RX_FDEQ_GAIN_10 +50 0x786C //RX_FDEQ_GAIN_11 +51 0x6454 //RX_FDEQ_GAIN_12 +52 0x604C //RX_FDEQ_GAIN_13 +53 0x585C //RX_FDEQ_GAIN_14 +54 0x7480 //RX_FDEQ_GAIN_15 55 0x4848 //RX_FDEQ_GAIN_16 56 0x4848 //RX_FDEQ_GAIN_17 57 0x4848 //RX_FDEQ_GAIN_18 @@ -40200,7 +60417,7 @@ 65 0x0303 //RX_FDEQ_BIN_2 66 0x0304 //RX_FDEQ_BIN_3 67 0x0404 //RX_FDEQ_BIN_4 -68 0x0209 //RX_FDEQ_BIN_5 +68 0x0308 //RX_FDEQ_BIN_5 69 0x0808 //RX_FDEQ_BIN_6 70 0x090A //RX_FDEQ_BIN_7 71 0x0B0C //RX_FDEQ_BIN_8 @@ -40243,7 +60460,7 @@ 108 0x7FFF //RX_FDDRC_SLANT_1_2 109 0x7FFF //RX_FDDRC_SLANT_1_3 110 0x0000 //RX_FDDRC_RESRV_0 -129 0x0097 //RX_SPK_VOL +129 0x0059 //RX_SPK_VOL 130 0x0000 //RX_VOL_RESRV_0 #VOL 6 6 0x6000 //RX_TDDRC_ALPHA_UP_1 @@ -40251,41 +60468,41 @@ 8 0x6000 //RX_TDDRC_ALPHA_UP_3 9 0x1000 //RX_TDDRC_ALPHA_UP_4 27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 -28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 -29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 -32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +28 0x4000 //RX_TDDRC_ALPHA_DWN_2 +29 0x4000 //RX_TDDRC_ALPHA_DWN_3 +32 0x4000 //RX_TDDRC_ALPHA_DWN_4 33 0x7214 //RX_TDDRC_LIMITER_THRD 34 0x0800 //RX_TDDRC_LIMITER_GAIN 112 0x0002 //RX_TDDRC_THRD_0 113 0x0004 //RX_TDDRC_THRD_1 -114 0x1A00 //RX_TDDRC_THRD_2 -115 0x1A00 //RX_TDDRC_THRD_3 -116 0x7EB8 //RX_TDDRC_SLANT_0 -117 0x2500 //RX_TDDRC_SLANT_1 +114 0x1800 //RX_TDDRC_THRD_2 +115 0x1800 //RX_TDDRC_THRD_3 +116 0x7FFF //RX_TDDRC_SLANT_0 +117 0x7FFF //RX_TDDRC_SLANT_1 118 0x6000 //RX_TDDRC_ALPHA_UP_0 119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 120 0x0000 //RX_TDDRC_HMNC_FLAG 121 0x199A //RX_TDDRC_HMNC_GAIN 122 0x0001 //RX_TDDRC_SMT_FLAG 123 0x0CCD //RX_TDDRC_SMT_W -124 0x04BC //RX_TDDRC_DRC_GAIN +124 0x0D56 //RX_TDDRC_DRC_GAIN 38 0x0020 //RX_FDEQ_SUBNUM -39 0x484E //RX_FDEQ_GAIN_0 -40 0x4E4E //RX_FDEQ_GAIN_1 -41 0x4E4E //RX_FDEQ_GAIN_2 -42 0x4848 //RX_FDEQ_GAIN_3 -43 0x484E //RX_FDEQ_GAIN_4 -44 0x6E4E //RX_FDEQ_GAIN_5 -45 0x4850 //RX_FDEQ_GAIN_6 -46 0x4848 //RX_FDEQ_GAIN_7 -47 0x4860 //RX_FDEQ_GAIN_8 -48 0x7468 //RX_FDEQ_GAIN_9 -49 0x6060 //RX_FDEQ_GAIN_10 -50 0x6666 //RX_FDEQ_GAIN_11 -51 0x6666 //RX_FDEQ_GAIN_12 -52 0x6666 //RX_FDEQ_GAIN_13 -53 0x6060 //RX_FDEQ_GAIN_14 -54 0x6060 //RX_FDEQ_GAIN_15 +39 0x6868 //RX_FDEQ_GAIN_0 +40 0x6850 //RX_FDEQ_GAIN_1 +41 0x5048 //RX_FDEQ_GAIN_2 +42 0x383C //RX_FDEQ_GAIN_3 +43 0x4048 //RX_FDEQ_GAIN_4 +44 0x7040 //RX_FDEQ_GAIN_5 +45 0x4C44 //RX_FDEQ_GAIN_6 +46 0x4448 //RX_FDEQ_GAIN_7 +47 0x4868 //RX_FDEQ_GAIN_8 +48 0x7C70 //RX_FDEQ_GAIN_9 +49 0x707C //RX_FDEQ_GAIN_10 +50 0x786C //RX_FDEQ_GAIN_11 +51 0x6454 //RX_FDEQ_GAIN_12 +52 0x604C //RX_FDEQ_GAIN_13 +53 0x585C //RX_FDEQ_GAIN_14 +54 0x7480 //RX_FDEQ_GAIN_15 55 0x4848 //RX_FDEQ_GAIN_16 56 0x4848 //RX_FDEQ_GAIN_17 57 0x4848 //RX_FDEQ_GAIN_18 @@ -40299,7 +60516,7 @@ 65 0x0303 //RX_FDEQ_BIN_2 66 0x0304 //RX_FDEQ_BIN_3 67 0x0404 //RX_FDEQ_BIN_4 -68 0x0209 //RX_FDEQ_BIN_5 +68 0x0308 //RX_FDEQ_BIN_5 69 0x0808 //RX_FDEQ_BIN_6 70 0x090A //RX_FDEQ_BIN_7 71 0x0B0C //RX_FDEQ_BIN_8 @@ -40344,11 +60561,862 @@ 110 0x0000 //RX_FDDRC_RESRV_0 129 0x0100 //RX_SPK_VOL 130 0x0000 //RX_VOL_RESRV_0 +#RX 2 +157 0x243C //RX_RECVFUNC_MODE_0 +158 0x0000 //RX_RECVFUNC_MODE_1 +159 0x0003 //RX_SAMPLINGFREQ_SIG +160 0x0003 //RX_SAMPLINGFREQ_PROC +161 0x000A //RX_FRAME_SZ +162 0x0000 //RX_DELAY_OPT +163 0x6000 //RX_TDDRC_ALPHA_UP_1 +164 0x6000 //RX_TDDRC_ALPHA_UP_2 +165 0x6000 //RX_TDDRC_ALPHA_UP_3 +166 0x1000 //RX_TDDRC_ALPHA_UP_4 +167 0x0403 //RX_PGA +168 0x7D83 //RX_A_HP +169 0x4000 //RX_B_PE +170 0x7800 //RX_THR_PITCH_DET_0 +171 0x7000 //RX_THR_PITCH_DET_1 +172 0x6000 //RX_THR_PITCH_DET_2 +173 0x0008 //RX_PITCH_BFR_LEN +174 0x0003 //RX_SBD_PITCH_DET +175 0x0100 //RX_PP_RESRV_0 +176 0x0020 //RX_PP_RESRV_1 +177 0x0400 //RX_N_SN_EST +178 0x000C //RX_N2_SN_EST +179 0x0010 //RX_NS_LVL_CTRL +180 0xF800 //RX_THR_SN_EST +181 0x7E00 //RX_LAMBDA_PFILT +182 0x000A //RX_FENS_RESRV_0 +183 0x0190 //RX_FENS_RESRV_1 +184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +187 0x0002 //RX_EXTRA_NS_L +188 0x0800 //RX_EXTRA_NS_A +189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +190 0x7214 //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +192 0x199A //RX_A_POST_FLT +193 0x0000 //RX_LMT_THRD +194 0x4000 //RX_LMT_ALPHA +195 0x0020 //RX_FDEQ_SUBNUM +196 0x4848 //RX_FDEQ_GAIN_0 +197 0x4848 //RX_FDEQ_GAIN_1 +198 0x4848 //RX_FDEQ_GAIN_2 +199 0x4848 //RX_FDEQ_GAIN_3 +200 0x4848 //RX_FDEQ_GAIN_4 +201 0x7C48 //RX_FDEQ_GAIN_5 +202 0x4848 //RX_FDEQ_GAIN_6 +203 0x4848 //RX_FDEQ_GAIN_7 +204 0x4860 //RX_FDEQ_GAIN_8 +205 0x7468 //RX_FDEQ_GAIN_9 +206 0x5858 //RX_FDEQ_GAIN_10 +207 0x5858 //RX_FDEQ_GAIN_11 +208 0x5C54 //RX_FDEQ_GAIN_12 +209 0x5448 //RX_FDEQ_GAIN_13 +210 0x4848 //RX_FDEQ_GAIN_14 +211 0x5858 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0202 //RX_FDEQ_BIN_0 +221 0x0203 //RX_FDEQ_BIN_1 +222 0x0303 //RX_FDEQ_BIN_2 +223 0x0304 //RX_FDEQ_BIN_3 +224 0x0404 //RX_FDEQ_BIN_4 +225 0x0308 //RX_FDEQ_BIN_5 +226 0x0808 //RX_FDEQ_BIN_6 +227 0x090A //RX_FDEQ_BIN_7 +228 0x0B0C //RX_FDEQ_BIN_8 +229 0x0D0E //RX_FDEQ_BIN_9 +230 0x1013 //RX_FDEQ_BIN_10 +231 0x1719 //RX_FDEQ_BIN_11 +232 0x1B1E //RX_FDEQ_BIN_12 +233 0x1E1E //RX_FDEQ_BIN_13 +234 0x1E28 //RX_FDEQ_BIN_14 +235 0x282C //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x4000 //RX_FDEQ_RESRV_0 +245 0x0320 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0035 //RX_FDDRC_BAND_MARGIN_1 +248 0x00D5 //RX_FDDRC_BAND_MARGIN_2 +249 0x0120 //RX_FDDRC_BAND_MARGIN_3 +250 0x0004 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x2000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x2000 //RX_FDDRC_THRD_3_2 +258 0x5000 //RX_FDDRC_THRD_3_3 +259 0x4000 //RX_FDDRC_SLANT_0_0 +260 0x4000 //RX_FDDRC_SLANT_0_1 +261 0x4000 //RX_FDDRC_SLANT_0_2 +262 0x4000 //RX_FDDRC_SLANT_0_3 +263 0x7FFF //RX_FDDRC_SLANT_1_0 +264 0x7FFF //RX_FDDRC_SLANT_1_1 +265 0x7FFF //RX_FDDRC_SLANT_1_2 +266 0x7FFF //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +268 0x0002 //RX_FILTINDX +269 0x0002 //RX_TDDRC_THRD_0 +270 0x0004 //RX_TDDRC_THRD_1 +271 0x1A00 //RX_TDDRC_THRD_2 +272 0x1A00 //RX_TDDRC_THRD_3 +273 0x7EB8 //RX_TDDRC_SLANT_0 +274 0x2500 //RX_TDDRC_SLANT_1 +275 0x6000 //RX_TDDRC_ALPHA_UP_0 +276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x199A //RX_TDDRC_HMNC_GAIN +279 0x0001 //RX_TDDRC_SMT_FLAG +280 0x0CCD //RX_TDDRC_SMT_W +281 0x0550 //RX_TDDRC_DRC_GAIN +282 0x7C00 //RX_LAMBDA_PKA_FP +283 0x0FA0 //RX_TPKA_FP +284 0x0400 //RX_MIN_G_FP +285 0x0800 //RX_MAX_G_FP +286 0x0014 //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 +288 0x0000 //RX_MAXLEVEL_CNG +289 0x3000 //RX_BWE_UV_TH +290 0x3000 //RX_BWE_UV_TH2 +291 0x1800 //RX_BWE_UV_TH3 +292 0x1000 //RX_BWE_V_TH +293 0x04CD //RX_BWE_GAIN1_V_TH1 +294 0x0F33 //RX_BWE_GAIN1_V_TH2 +295 0x7333 //RX_BWE_UV_EQ +296 0x199A //RX_BWE_V_EQ +297 0x7333 //RX_BWE_TONE_TH +298 0x0004 //RX_BWE_UV_HOLD_T +299 0x6CCD //RX_BWE_GAIN2_ALPHA +300 0x799A //RX_BWE_GAIN3_ALPHA +301 0x001E //RX_BWE_CUTOFF +302 0x3000 //RX_BWE_GAINFILL +303 0x3200 //RX_BWE_MAXTH_TONE +304 0x2000 //RX_BWE_EQ_0 +305 0x2000 //RX_BWE_EQ_1 +306 0x2000 //RX_BWE_EQ_2 +307 0x2000 //RX_BWE_EQ_3 +308 0x2000 //RX_BWE_EQ_4 +309 0x2000 //RX_BWE_EQ_5 +310 0x2000 //RX_BWE_EQ_6 +311 0x0000 //RX_BWE_RESRV_0 +312 0x0000 //RX_BWE_RESRV_1 +313 0x0000 //RX_BWE_RESRV_2 +#VOL 0 +163 0x6000 //RX_TDDRC_ALPHA_UP_1 +164 0x6000 //RX_TDDRC_ALPHA_UP_2 +165 0x6000 //RX_TDDRC_ALPHA_UP_3 +166 0x1000 //RX_TDDRC_ALPHA_UP_4 +184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +185 0x4000 //RX_TDDRC_ALPHA_DWN_2 +186 0x4000 //RX_TDDRC_ALPHA_DWN_3 +189 0x4000 //RX_TDDRC_ALPHA_DWN_4 +190 0x7214 //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +269 0x0002 //RX_TDDRC_THRD_0 +270 0x0004 //RX_TDDRC_THRD_1 +271 0x1800 //RX_TDDRC_THRD_2 +272 0x1800 //RX_TDDRC_THRD_3 +273 0x7FFF //RX_TDDRC_SLANT_0 +274 0x7FFF //RX_TDDRC_SLANT_1 +275 0x6000 //RX_TDDRC_ALPHA_UP_0 +276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x199A //RX_TDDRC_HMNC_GAIN +279 0x0001 //RX_TDDRC_SMT_FLAG +280 0x0CCD //RX_TDDRC_SMT_W +281 0x0780 //RX_TDDRC_DRC_GAIN +195 0x0020 //RX_FDEQ_SUBNUM +196 0x6868 //RX_FDEQ_GAIN_0 +197 0x6848 //RX_FDEQ_GAIN_1 +198 0x4848 //RX_FDEQ_GAIN_2 +199 0x3434 //RX_FDEQ_GAIN_3 +200 0x3840 //RX_FDEQ_GAIN_4 +201 0x4838 //RX_FDEQ_GAIN_5 +202 0x5444 //RX_FDEQ_GAIN_6 +203 0x443C //RX_FDEQ_GAIN_7 +204 0x3C60 //RX_FDEQ_GAIN_8 +205 0x6460 //RX_FDEQ_GAIN_9 +206 0x6064 //RX_FDEQ_GAIN_10 +207 0x5C5C //RX_FDEQ_GAIN_11 +208 0x5440 //RX_FDEQ_GAIN_12 +209 0x4040 //RX_FDEQ_GAIN_13 +210 0x4040 //RX_FDEQ_GAIN_14 +211 0x5858 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0202 //RX_FDEQ_BIN_0 +221 0x0203 //RX_FDEQ_BIN_1 +222 0x0303 //RX_FDEQ_BIN_2 +223 0x0304 //RX_FDEQ_BIN_3 +224 0x0404 //RX_FDEQ_BIN_4 +225 0x0308 //RX_FDEQ_BIN_5 +226 0x0808 //RX_FDEQ_BIN_6 +227 0x090A //RX_FDEQ_BIN_7 +228 0x0B0C //RX_FDEQ_BIN_8 +229 0x0D0E //RX_FDEQ_BIN_9 +230 0x1013 //RX_FDEQ_BIN_10 +231 0x1719 //RX_FDEQ_BIN_11 +232 0x1B1E //RX_FDEQ_BIN_12 +233 0x1E1E //RX_FDEQ_BIN_13 +234 0x1E28 //RX_FDEQ_BIN_14 +235 0x282C //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x4000 //RX_FDEQ_RESRV_0 +245 0x0320 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0035 //RX_FDDRC_BAND_MARGIN_1 +248 0x00D5 //RX_FDDRC_BAND_MARGIN_2 +249 0x0120 //RX_FDDRC_BAND_MARGIN_3 +250 0x0004 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x2000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x2000 //RX_FDDRC_THRD_3_2 +258 0x5000 //RX_FDDRC_THRD_3_3 +259 0x4000 //RX_FDDRC_SLANT_0_0 +260 0x4000 //RX_FDDRC_SLANT_0_1 +261 0x4000 //RX_FDDRC_SLANT_0_2 +262 0x4000 //RX_FDDRC_SLANT_0_3 +263 0x7FFF //RX_FDDRC_SLANT_1_0 +264 0x7FFF //RX_FDDRC_SLANT_1_1 +265 0x7FFF //RX_FDDRC_SLANT_1_2 +266 0x7FFF //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +286 0x0011 //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 +#VOL 1 +163 0x6000 //RX_TDDRC_ALPHA_UP_1 +164 0x6000 //RX_TDDRC_ALPHA_UP_2 +165 0x6000 //RX_TDDRC_ALPHA_UP_3 +166 0x1000 //RX_TDDRC_ALPHA_UP_4 +184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +185 0x4000 //RX_TDDRC_ALPHA_DWN_2 +186 0x4000 //RX_TDDRC_ALPHA_DWN_3 +189 0x4000 //RX_TDDRC_ALPHA_DWN_4 +190 0x7214 //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +269 0x0002 //RX_TDDRC_THRD_0 +270 0x0004 //RX_TDDRC_THRD_1 +271 0x1800 //RX_TDDRC_THRD_2 +272 0x1800 //RX_TDDRC_THRD_3 +273 0x7FFF //RX_TDDRC_SLANT_0 +274 0x7FFF //RX_TDDRC_SLANT_1 +275 0x6000 //RX_TDDRC_ALPHA_UP_0 +276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x199A //RX_TDDRC_HMNC_GAIN +279 0x0001 //RX_TDDRC_SMT_FLAG +280 0x0CCD //RX_TDDRC_SMT_W +281 0x0780 //RX_TDDRC_DRC_GAIN +195 0x0020 //RX_FDEQ_SUBNUM +196 0x6868 //RX_FDEQ_GAIN_0 +197 0x6848 //RX_FDEQ_GAIN_1 +198 0x4848 //RX_FDEQ_GAIN_2 +199 0x3434 //RX_FDEQ_GAIN_3 +200 0x3840 //RX_FDEQ_GAIN_4 +201 0x4838 //RX_FDEQ_GAIN_5 +202 0x5444 //RX_FDEQ_GAIN_6 +203 0x443C //RX_FDEQ_GAIN_7 +204 0x3C60 //RX_FDEQ_GAIN_8 +205 0x6460 //RX_FDEQ_GAIN_9 +206 0x6064 //RX_FDEQ_GAIN_10 +207 0x5C5C //RX_FDEQ_GAIN_11 +208 0x5440 //RX_FDEQ_GAIN_12 +209 0x4040 //RX_FDEQ_GAIN_13 +210 0x4040 //RX_FDEQ_GAIN_14 +211 0x5858 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0202 //RX_FDEQ_BIN_0 +221 0x0203 //RX_FDEQ_BIN_1 +222 0x0303 //RX_FDEQ_BIN_2 +223 0x0304 //RX_FDEQ_BIN_3 +224 0x0404 //RX_FDEQ_BIN_4 +225 0x0308 //RX_FDEQ_BIN_5 +226 0x0808 //RX_FDEQ_BIN_6 +227 0x090A //RX_FDEQ_BIN_7 +228 0x0B0C //RX_FDEQ_BIN_8 +229 0x0D0E //RX_FDEQ_BIN_9 +230 0x1013 //RX_FDEQ_BIN_10 +231 0x1719 //RX_FDEQ_BIN_11 +232 0x1B1E //RX_FDEQ_BIN_12 +233 0x1E1E //RX_FDEQ_BIN_13 +234 0x1E28 //RX_FDEQ_BIN_14 +235 0x282C //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x4000 //RX_FDEQ_RESRV_0 +245 0x0320 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0035 //RX_FDDRC_BAND_MARGIN_1 +248 0x00D5 //RX_FDDRC_BAND_MARGIN_2 +249 0x0120 //RX_FDDRC_BAND_MARGIN_3 +250 0x0004 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x2000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x2000 //RX_FDDRC_THRD_3_2 +258 0x5000 //RX_FDDRC_THRD_3_3 +259 0x4000 //RX_FDDRC_SLANT_0_0 +260 0x4000 //RX_FDDRC_SLANT_0_1 +261 0x4000 //RX_FDDRC_SLANT_0_2 +262 0x4000 //RX_FDDRC_SLANT_0_3 +263 0x7FFF //RX_FDDRC_SLANT_1_0 +264 0x7FFF //RX_FDDRC_SLANT_1_1 +265 0x7FFF //RX_FDDRC_SLANT_1_2 +266 0x7FFF //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +286 0x0019 //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 +#VOL 2 +163 0x6000 //RX_TDDRC_ALPHA_UP_1 +164 0x6000 //RX_TDDRC_ALPHA_UP_2 +165 0x6000 //RX_TDDRC_ALPHA_UP_3 +166 0x1000 //RX_TDDRC_ALPHA_UP_4 +184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +185 0x4000 //RX_TDDRC_ALPHA_DWN_2 +186 0x4000 //RX_TDDRC_ALPHA_DWN_3 +189 0x4000 //RX_TDDRC_ALPHA_DWN_4 +190 0x7214 //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +269 0x0002 //RX_TDDRC_THRD_0 +270 0x0004 //RX_TDDRC_THRD_1 +271 0x1800 //RX_TDDRC_THRD_2 +272 0x1800 //RX_TDDRC_THRD_3 +273 0x7FFF //RX_TDDRC_SLANT_0 +274 0x7FFF //RX_TDDRC_SLANT_1 +275 0x6000 //RX_TDDRC_ALPHA_UP_0 +276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x199A //RX_TDDRC_HMNC_GAIN +279 0x0001 //RX_TDDRC_SMT_FLAG +280 0x0CCD //RX_TDDRC_SMT_W +281 0x0780 //RX_TDDRC_DRC_GAIN +195 0x0020 //RX_FDEQ_SUBNUM +196 0x6868 //RX_FDEQ_GAIN_0 +197 0x6848 //RX_FDEQ_GAIN_1 +198 0x4848 //RX_FDEQ_GAIN_2 +199 0x3434 //RX_FDEQ_GAIN_3 +200 0x3840 //RX_FDEQ_GAIN_4 +201 0x4838 //RX_FDEQ_GAIN_5 +202 0x5444 //RX_FDEQ_GAIN_6 +203 0x443C //RX_FDEQ_GAIN_7 +204 0x3C60 //RX_FDEQ_GAIN_8 +205 0x6460 //RX_FDEQ_GAIN_9 +206 0x6064 //RX_FDEQ_GAIN_10 +207 0x5C5C //RX_FDEQ_GAIN_11 +208 0x5440 //RX_FDEQ_GAIN_12 +209 0x4040 //RX_FDEQ_GAIN_13 +210 0x4040 //RX_FDEQ_GAIN_14 +211 0x5858 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0202 //RX_FDEQ_BIN_0 +221 0x0203 //RX_FDEQ_BIN_1 +222 0x0303 //RX_FDEQ_BIN_2 +223 0x0304 //RX_FDEQ_BIN_3 +224 0x0404 //RX_FDEQ_BIN_4 +225 0x0308 //RX_FDEQ_BIN_5 +226 0x0808 //RX_FDEQ_BIN_6 +227 0x090A //RX_FDEQ_BIN_7 +228 0x0B0C //RX_FDEQ_BIN_8 +229 0x0D0E //RX_FDEQ_BIN_9 +230 0x1013 //RX_FDEQ_BIN_10 +231 0x1719 //RX_FDEQ_BIN_11 +232 0x1B1E //RX_FDEQ_BIN_12 +233 0x1E1E //RX_FDEQ_BIN_13 +234 0x1E28 //RX_FDEQ_BIN_14 +235 0x282C //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x4000 //RX_FDEQ_RESRV_0 +245 0x0320 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0035 //RX_FDDRC_BAND_MARGIN_1 +248 0x00D5 //RX_FDDRC_BAND_MARGIN_2 +249 0x0120 //RX_FDDRC_BAND_MARGIN_3 +250 0x0004 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x2000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x2000 //RX_FDDRC_THRD_3_2 +258 0x5000 //RX_FDDRC_THRD_3_3 +259 0x4000 //RX_FDDRC_SLANT_0_0 +260 0x4000 //RX_FDDRC_SLANT_0_1 +261 0x4000 //RX_FDDRC_SLANT_0_2 +262 0x4000 //RX_FDDRC_SLANT_0_3 +263 0x7FFF //RX_FDDRC_SLANT_1_0 +264 0x7FFF //RX_FDDRC_SLANT_1_1 +265 0x7FFF //RX_FDDRC_SLANT_1_2 +266 0x7FFF //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +286 0x0025 //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 +#VOL 3 +163 0x6000 //RX_TDDRC_ALPHA_UP_1 +164 0x6000 //RX_TDDRC_ALPHA_UP_2 +165 0x6000 //RX_TDDRC_ALPHA_UP_3 +166 0x1000 //RX_TDDRC_ALPHA_UP_4 +184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +185 0x4000 //RX_TDDRC_ALPHA_DWN_2 +186 0x4000 //RX_TDDRC_ALPHA_DWN_3 +189 0x4000 //RX_TDDRC_ALPHA_DWN_4 +190 0x7214 //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +269 0x0002 //RX_TDDRC_THRD_0 +270 0x0004 //RX_TDDRC_THRD_1 +271 0x1800 //RX_TDDRC_THRD_2 +272 0x1800 //RX_TDDRC_THRD_3 +273 0x7FFF //RX_TDDRC_SLANT_0 +274 0x7FFF //RX_TDDRC_SLANT_1 +275 0x6000 //RX_TDDRC_ALPHA_UP_0 +276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x199A //RX_TDDRC_HMNC_GAIN +279 0x0001 //RX_TDDRC_SMT_FLAG +280 0x0CCD //RX_TDDRC_SMT_W +281 0x0780 //RX_TDDRC_DRC_GAIN +195 0x0020 //RX_FDEQ_SUBNUM +196 0x6868 //RX_FDEQ_GAIN_0 +197 0x6848 //RX_FDEQ_GAIN_1 +198 0x4848 //RX_FDEQ_GAIN_2 +199 0x3434 //RX_FDEQ_GAIN_3 +200 0x3840 //RX_FDEQ_GAIN_4 +201 0x4838 //RX_FDEQ_GAIN_5 +202 0x5444 //RX_FDEQ_GAIN_6 +203 0x443C //RX_FDEQ_GAIN_7 +204 0x3C60 //RX_FDEQ_GAIN_8 +205 0x6460 //RX_FDEQ_GAIN_9 +206 0x6064 //RX_FDEQ_GAIN_10 +207 0x5C5C //RX_FDEQ_GAIN_11 +208 0x5440 //RX_FDEQ_GAIN_12 +209 0x4040 //RX_FDEQ_GAIN_13 +210 0x4040 //RX_FDEQ_GAIN_14 +211 0x5858 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0202 //RX_FDEQ_BIN_0 +221 0x0203 //RX_FDEQ_BIN_1 +222 0x0303 //RX_FDEQ_BIN_2 +223 0x0304 //RX_FDEQ_BIN_3 +224 0x0404 //RX_FDEQ_BIN_4 +225 0x0308 //RX_FDEQ_BIN_5 +226 0x0808 //RX_FDEQ_BIN_6 +227 0x090A //RX_FDEQ_BIN_7 +228 0x0B0C //RX_FDEQ_BIN_8 +229 0x0D0E //RX_FDEQ_BIN_9 +230 0x1013 //RX_FDEQ_BIN_10 +231 0x1719 //RX_FDEQ_BIN_11 +232 0x1B1E //RX_FDEQ_BIN_12 +233 0x1E1E //RX_FDEQ_BIN_13 +234 0x1E28 //RX_FDEQ_BIN_14 +235 0x282C //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x4000 //RX_FDEQ_RESRV_0 +245 0x0320 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0035 //RX_FDDRC_BAND_MARGIN_1 +248 0x00D5 //RX_FDDRC_BAND_MARGIN_2 +249 0x0120 //RX_FDDRC_BAND_MARGIN_3 +250 0x0004 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x2000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x2000 //RX_FDDRC_THRD_3_2 +258 0x5000 //RX_FDDRC_THRD_3_3 +259 0x4000 //RX_FDDRC_SLANT_0_0 +260 0x4000 //RX_FDDRC_SLANT_0_1 +261 0x4000 //RX_FDDRC_SLANT_0_2 +262 0x4000 //RX_FDDRC_SLANT_0_3 +263 0x7FFF //RX_FDDRC_SLANT_1_0 +264 0x7FFF //RX_FDDRC_SLANT_1_1 +265 0x7FFF //RX_FDDRC_SLANT_1_2 +266 0x7FFF //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +286 0x0036 //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 +#VOL 4 +163 0x6000 //RX_TDDRC_ALPHA_UP_1 +164 0x6000 //RX_TDDRC_ALPHA_UP_2 +165 0x6000 //RX_TDDRC_ALPHA_UP_3 +166 0x1000 //RX_TDDRC_ALPHA_UP_4 +184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +185 0x4000 //RX_TDDRC_ALPHA_DWN_2 +186 0x4000 //RX_TDDRC_ALPHA_DWN_3 +189 0x4000 //RX_TDDRC_ALPHA_DWN_4 +190 0x7214 //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +269 0x0002 //RX_TDDRC_THRD_0 +270 0x0004 //RX_TDDRC_THRD_1 +271 0x1800 //RX_TDDRC_THRD_2 +272 0x1800 //RX_TDDRC_THRD_3 +273 0x7FFF //RX_TDDRC_SLANT_0 +274 0x7FFF //RX_TDDRC_SLANT_1 +275 0x6000 //RX_TDDRC_ALPHA_UP_0 +276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x199A //RX_TDDRC_HMNC_GAIN +279 0x0001 //RX_TDDRC_SMT_FLAG +280 0x0CCD //RX_TDDRC_SMT_W +281 0x0D56 //RX_TDDRC_DRC_GAIN +195 0x0020 //RX_FDEQ_SUBNUM +196 0x6868 //RX_FDEQ_GAIN_0 +197 0x6850 //RX_FDEQ_GAIN_1 +198 0x5048 //RX_FDEQ_GAIN_2 +199 0x383C //RX_FDEQ_GAIN_3 +200 0x4048 //RX_FDEQ_GAIN_4 +201 0x7040 //RX_FDEQ_GAIN_5 +202 0x4C44 //RX_FDEQ_GAIN_6 +203 0x4448 //RX_FDEQ_GAIN_7 +204 0x4868 //RX_FDEQ_GAIN_8 +205 0x7C70 //RX_FDEQ_GAIN_9 +206 0x707C //RX_FDEQ_GAIN_10 +207 0x786C //RX_FDEQ_GAIN_11 +208 0x6454 //RX_FDEQ_GAIN_12 +209 0x604C //RX_FDEQ_GAIN_13 +210 0x585C //RX_FDEQ_GAIN_14 +211 0x7480 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0202 //RX_FDEQ_BIN_0 +221 0x0203 //RX_FDEQ_BIN_1 +222 0x0303 //RX_FDEQ_BIN_2 +223 0x0304 //RX_FDEQ_BIN_3 +224 0x0404 //RX_FDEQ_BIN_4 +225 0x0308 //RX_FDEQ_BIN_5 +226 0x0808 //RX_FDEQ_BIN_6 +227 0x090A //RX_FDEQ_BIN_7 +228 0x0B0C //RX_FDEQ_BIN_8 +229 0x0D0E //RX_FDEQ_BIN_9 +230 0x1013 //RX_FDEQ_BIN_10 +231 0x1719 //RX_FDEQ_BIN_11 +232 0x1B1E //RX_FDEQ_BIN_12 +233 0x1E1E //RX_FDEQ_BIN_13 +234 0x1E28 //RX_FDEQ_BIN_14 +235 0x282C //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x4000 //RX_FDEQ_RESRV_0 +245 0x0320 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0035 //RX_FDDRC_BAND_MARGIN_1 +248 0x00D5 //RX_FDDRC_BAND_MARGIN_2 +249 0x0120 //RX_FDDRC_BAND_MARGIN_3 +250 0x0004 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x2000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x2000 //RX_FDDRC_THRD_3_2 +258 0x5000 //RX_FDDRC_THRD_3_3 +259 0x4000 //RX_FDDRC_SLANT_0_0 +260 0x4000 //RX_FDDRC_SLANT_0_1 +261 0x4000 //RX_FDDRC_SLANT_0_2 +262 0x4000 //RX_FDDRC_SLANT_0_3 +263 0x7FFF //RX_FDDRC_SLANT_1_0 +264 0x7FFF //RX_FDDRC_SLANT_1_1 +265 0x7FFF //RX_FDDRC_SLANT_1_2 +266 0x7FFF //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +286 0x0034 //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 +#VOL 5 +163 0x6000 //RX_TDDRC_ALPHA_UP_1 +164 0x6000 //RX_TDDRC_ALPHA_UP_2 +165 0x6000 //RX_TDDRC_ALPHA_UP_3 +166 0x1000 //RX_TDDRC_ALPHA_UP_4 +184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +185 0x4000 //RX_TDDRC_ALPHA_DWN_2 +186 0x4000 //RX_TDDRC_ALPHA_DWN_3 +189 0x4000 //RX_TDDRC_ALPHA_DWN_4 +190 0x7214 //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +269 0x0002 //RX_TDDRC_THRD_0 +270 0x0004 //RX_TDDRC_THRD_1 +271 0x1800 //RX_TDDRC_THRD_2 +272 0x1800 //RX_TDDRC_THRD_3 +273 0x7FFF //RX_TDDRC_SLANT_0 +274 0x7FFF //RX_TDDRC_SLANT_1 +275 0x6000 //RX_TDDRC_ALPHA_UP_0 +276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x199A //RX_TDDRC_HMNC_GAIN +279 0x0001 //RX_TDDRC_SMT_FLAG +280 0x0CCD //RX_TDDRC_SMT_W +281 0x0D56 //RX_TDDRC_DRC_GAIN +195 0x0020 //RX_FDEQ_SUBNUM +196 0x6868 //RX_FDEQ_GAIN_0 +197 0x6850 //RX_FDEQ_GAIN_1 +198 0x5048 //RX_FDEQ_GAIN_2 +199 0x383C //RX_FDEQ_GAIN_3 +200 0x4048 //RX_FDEQ_GAIN_4 +201 0x7040 //RX_FDEQ_GAIN_5 +202 0x4C44 //RX_FDEQ_GAIN_6 +203 0x4448 //RX_FDEQ_GAIN_7 +204 0x4868 //RX_FDEQ_GAIN_8 +205 0x7C70 //RX_FDEQ_GAIN_9 +206 0x707C //RX_FDEQ_GAIN_10 +207 0x786C //RX_FDEQ_GAIN_11 +208 0x6454 //RX_FDEQ_GAIN_12 +209 0x604C //RX_FDEQ_GAIN_13 +210 0x585C //RX_FDEQ_GAIN_14 +211 0x7480 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0202 //RX_FDEQ_BIN_0 +221 0x0203 //RX_FDEQ_BIN_1 +222 0x0303 //RX_FDEQ_BIN_2 +223 0x0304 //RX_FDEQ_BIN_3 +224 0x0404 //RX_FDEQ_BIN_4 +225 0x0308 //RX_FDEQ_BIN_5 +226 0x0808 //RX_FDEQ_BIN_6 +227 0x090A //RX_FDEQ_BIN_7 +228 0x0B0C //RX_FDEQ_BIN_8 +229 0x0D0E //RX_FDEQ_BIN_9 +230 0x1013 //RX_FDEQ_BIN_10 +231 0x1719 //RX_FDEQ_BIN_11 +232 0x1B1E //RX_FDEQ_BIN_12 +233 0x1E1E //RX_FDEQ_BIN_13 +234 0x1E28 //RX_FDEQ_BIN_14 +235 0x282C //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x4000 //RX_FDEQ_RESRV_0 +245 0x0320 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0035 //RX_FDDRC_BAND_MARGIN_1 +248 0x00D5 //RX_FDDRC_BAND_MARGIN_2 +249 0x0120 //RX_FDDRC_BAND_MARGIN_3 +250 0x0004 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x2000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x2000 //RX_FDDRC_THRD_3_2 +258 0x5000 //RX_FDDRC_THRD_3_3 +259 0x4000 //RX_FDDRC_SLANT_0_0 +260 0x4000 //RX_FDDRC_SLANT_0_1 +261 0x4000 //RX_FDDRC_SLANT_0_2 +262 0x4000 //RX_FDDRC_SLANT_0_3 +263 0x7FFF //RX_FDDRC_SLANT_1_0 +264 0x7FFF //RX_FDDRC_SLANT_1_1 +265 0x7FFF //RX_FDDRC_SLANT_1_2 +266 0x7FFF //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +286 0x0059 //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 +#VOL 6 +163 0x6000 //RX_TDDRC_ALPHA_UP_1 +164 0x6000 //RX_TDDRC_ALPHA_UP_2 +165 0x6000 //RX_TDDRC_ALPHA_UP_3 +166 0x1000 //RX_TDDRC_ALPHA_UP_4 +184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +185 0x4000 //RX_TDDRC_ALPHA_DWN_2 +186 0x4000 //RX_TDDRC_ALPHA_DWN_3 +189 0x4000 //RX_TDDRC_ALPHA_DWN_4 +190 0x7214 //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +269 0x0002 //RX_TDDRC_THRD_0 +270 0x0004 //RX_TDDRC_THRD_1 +271 0x1800 //RX_TDDRC_THRD_2 +272 0x1800 //RX_TDDRC_THRD_3 +273 0x7FFF //RX_TDDRC_SLANT_0 +274 0x7FFF //RX_TDDRC_SLANT_1 +275 0x6000 //RX_TDDRC_ALPHA_UP_0 +276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x199A //RX_TDDRC_HMNC_GAIN +279 0x0001 //RX_TDDRC_SMT_FLAG +280 0x0CCD //RX_TDDRC_SMT_W +281 0x0D56 //RX_TDDRC_DRC_GAIN +195 0x0020 //RX_FDEQ_SUBNUM +196 0x6868 //RX_FDEQ_GAIN_0 +197 0x6850 //RX_FDEQ_GAIN_1 +198 0x5048 //RX_FDEQ_GAIN_2 +199 0x383C //RX_FDEQ_GAIN_3 +200 0x4048 //RX_FDEQ_GAIN_4 +201 0x7040 //RX_FDEQ_GAIN_5 +202 0x4C44 //RX_FDEQ_GAIN_6 +203 0x4448 //RX_FDEQ_GAIN_7 +204 0x4868 //RX_FDEQ_GAIN_8 +205 0x7C70 //RX_FDEQ_GAIN_9 +206 0x707C //RX_FDEQ_GAIN_10 +207 0x786C //RX_FDEQ_GAIN_11 +208 0x6454 //RX_FDEQ_GAIN_12 +209 0x604C //RX_FDEQ_GAIN_13 +210 0x585C //RX_FDEQ_GAIN_14 +211 0x7480 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0202 //RX_FDEQ_BIN_0 +221 0x0203 //RX_FDEQ_BIN_1 +222 0x0303 //RX_FDEQ_BIN_2 +223 0x0304 //RX_FDEQ_BIN_3 +224 0x0404 //RX_FDEQ_BIN_4 +225 0x0308 //RX_FDEQ_BIN_5 +226 0x0808 //RX_FDEQ_BIN_6 +227 0x090A //RX_FDEQ_BIN_7 +228 0x0B0C //RX_FDEQ_BIN_8 +229 0x0D0E //RX_FDEQ_BIN_9 +230 0x1013 //RX_FDEQ_BIN_10 +231 0x1719 //RX_FDEQ_BIN_11 +232 0x1B1E //RX_FDEQ_BIN_12 +233 0x1E1E //RX_FDEQ_BIN_13 +234 0x1E28 //RX_FDEQ_BIN_14 +235 0x282C //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x4000 //RX_FDEQ_RESRV_0 +245 0x0320 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0035 //RX_FDDRC_BAND_MARGIN_1 +248 0x00D5 //RX_FDDRC_BAND_MARGIN_2 +249 0x0120 //RX_FDDRC_BAND_MARGIN_3 +250 0x0004 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x2000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x2000 //RX_FDDRC_THRD_3_2 +258 0x5000 //RX_FDDRC_THRD_3_3 +259 0x4000 //RX_FDDRC_SLANT_0_0 +260 0x4000 //RX_FDDRC_SLANT_0_1 +261 0x4000 //RX_FDDRC_SLANT_0_2 +262 0x4000 //RX_FDDRC_SLANT_0_3 +263 0x7FFF //RX_FDDRC_SLANT_1_0 +264 0x7FFF //RX_FDDRC_SLANT_1_1 +265 0x7FFF //RX_FDDRC_SLANT_1_2 +266 0x7FFF //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +286 0x0100 //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 #CASE_NAME HEADSET-TTY_HCO-VOICE_GENERIC-FB -#PARAM_MODE FULL -#PARAM_TYPE TX+RX -#TOTAL_CUSTOM_STEP 7 +#PARAM_MODE Full +#PARAM_TYPE TX+2RX +#TOTAL_CUSTOM_STEP 7+7 #TX 0 0x0001 //TX_OPERATION_MODE_0 1 0x0000 //TX_OPERATION_MODE_1 @@ -40592,7 +61660,7 @@ 239 0x0000 //TX_DT_RESRV_7 240 0x0000 //TX_DT_RESRV_8 241 0x0000 //TX_DT_RESRV_9 -242 0xF200 //TX_THR_SN_EST_0 +242 0xF700 //TX_THR_SN_EST_0 243 0xF400 //TX_THR_SN_EST_1 244 0xF800 //TX_THR_SN_EST_2 245 0xF600 //TX_THR_SN_EST_3 @@ -40601,12 +61669,12 @@ 248 0xF800 //TX_THR_SN_EST_6 249 0xF800 //TX_THR_SN_EST_7 250 0x0100 //TX_DELTA_THR_SN_EST_0 -251 0x0000 //TX_DELTA_THR_SN_EST_1 +251 0x0100 //TX_DELTA_THR_SN_EST_1 252 0x0100 //TX_DELTA_THR_SN_EST_2 -253 0x0100 //TX_DELTA_THR_SN_EST_3 +253 0x0200 //TX_DELTA_THR_SN_EST_3 254 0x0200 //TX_DELTA_THR_SN_EST_4 255 0x0200 //TX_DELTA_THR_SN_EST_5 -256 0x0200 //TX_DELTA_THR_SN_EST_6 +256 0x0000 //TX_DELTA_THR_SN_EST_6 257 0x0200 //TX_DELTA_THR_SN_EST_7 258 0x4000 //TX_LAMBDA_NN_EST_0 259 0x4000 //TX_LAMBDA_NN_EST_1 @@ -40632,12 +61700,12 @@ 279 0x0000 //TX_B_POST_FLT_0 280 0x0000 //TX_B_POST_FLT_1 281 0x001A //TX_NS_LVL_CTRL_0 -282 0x001A //TX_NS_LVL_CTRL_1 +282 0x0014 //TX_NS_LVL_CTRL_1 283 0x0014 //TX_NS_LVL_CTRL_2 -284 0x0014 //TX_NS_LVL_CTRL_3 +284 0x000C //TX_NS_LVL_CTRL_3 285 0x000C //TX_NS_LVL_CTRL_4 286 0x000C //TX_NS_LVL_CTRL_5 -287 0x000C //TX_NS_LVL_CTRL_6 +287 0x001A //TX_NS_LVL_CTRL_6 288 0x000C //TX_NS_LVL_CTRL_7 289 0x000E //TX_MIN_GAIN_S_0 290 0x0014 //TX_MIN_GAIN_S_1 @@ -40653,10 +61721,10 @@ 300 0x7FFF //TX_SNRI_SUP_0 301 0x7FFF //TX_SNRI_SUP_1 302 0x7FFF //TX_SNRI_SUP_2 -303 0x7FFF //TX_SNRI_SUP_3 +303 0x4000 //TX_SNRI_SUP_3 304 0x4000 //TX_SNRI_SUP_4 305 0x4000 //TX_SNRI_SUP_5 -306 0x4000 //TX_SNRI_SUP_6 +306 0x7FFF //TX_SNRI_SUP_6 307 0x4000 //TX_SNRI_SUP_7 308 0x1200 //TX_THR_LFNS 309 0x0147 //TX_G_LFNS @@ -40665,12 +61733,12 @@ 312 0x7FFF //TX_A_POST_FILT_0 313 0x7FFF //TX_A_POST_FILT_1 314 0x4000 //TX_A_POST_FILT_S_0 -315 0x199A //TX_A_POST_FILT_S_1 +315 0x1000 //TX_A_POST_FILT_S_1 316 0x1000 //TX_A_POST_FILT_S_2 -317 0x1000 //TX_A_POST_FILT_S_3 +317 0x6666 //TX_A_POST_FILT_S_3 318 0x6666 //TX_A_POST_FILT_S_4 319 0x6666 //TX_A_POST_FILT_S_5 -320 0x6666 //TX_A_POST_FILT_S_6 +320 0x199A //TX_A_POST_FILT_S_6 321 0x6666 //TX_A_POST_FILT_S_7 322 0x2000 //TX_B_POST_FILT_0 323 0x2000 //TX_B_POST_FILT_1 @@ -40717,7 +61785,7 @@ 364 0x0000 //TX_K_APT 365 0x0001 //TX_NOISEDET 366 0x05A0 //TX_NDETCT -367 0x000A //TX_NOISE_TH_0 +367 0x04E8 //TX_NOISE_TH_0 368 0x1388 //TX_NOISE_TH_0_2 369 0x3A98 //TX_NOISE_TH_0_3 370 0x0C80 //TX_NOISE_TH_1 @@ -40729,11 +61797,11 @@ 376 0x7FFF //TX_NOISE_TH_5_3 377 0x7FFF //TX_NOISE_TH_5_4 378 0x00C8 //TX_NOISE_TH_6 -379 0x000A //TX_MINENOISE_TH -380 0x0000 //TX_MINENOISE_MIC0_TH_MTS -381 0x0000 //TX_MINENOISE_MIC0_TH_EXP -382 0x0000 //TX_MINENOISE_MIC0_S_TH_MTS -383 0x0000 //TX_MINENOISE_MIC0_S_TH_EXP +379 0x02BC //TX_MINENOISE_TH +380 0xD508 //TX_MORENS_TFMASK_TH +381 0x0001 //TX_DRC_QUIET_FLOOR +382 0x3A98 //TX_RATIODTL_CUT_TH +383 0x1482 //TX_DT_CUT_K1 384 0x6400 //TX_OUT_ENER_S_TH_CLEAN 385 0x6400 //TX_OUT_ENER_S_TH_LESSCLEAN 386 0x6400 //TX_OUT_ENER_S_TH_NOISY @@ -40741,22 +61809,22 @@ 388 0x7D00 //TX_OUT_ENER_TH_SPEECH 389 0x0000 //TX_SN_NPB_GAIN 390 0x0000 //TX_NN_NPB_GAIN -391 0x0000 //TX_CSX_ALPHA_0 -392 0x0000 //TX_CSX_ALPHA_1 -393 0x0000 //TX_CSX_ALPHA_2 -394 0x0000 //TX_CSX_ALPHA_3 -395 0x0000 //TX_MU_ARSP_EST -396 0x0000 //TX_P_OUTBEAM_MIN_TH +391 0x7FFF //TX_POST_MASK_SUP_HSNE +392 0x1388 //TX_TAIL_DET_TH +393 0x4000 //TX_B_LESSCUT_RTO_WTA +394 0x0000 //TX_MEL_G_R +395 0x0080 //TX_SUPHIGH_TH +396 0x0000 //TX_MASK_G_R 397 0x0000 //TX_EXTRA_NS_L -398 0x0000 //TX_EXTRA_NS_A -399 0x0000 //TX_VR_NOISE_FLOOR_TH +398 0x1800 //TX_C_POST_FLT_MASK +399 0x7FFF //TX_A_POST_FLT_WNS 400 0x0000 //TX_MIN_G_LOW300HZ 401 0x0010 //TX_MAXLEVEL_CNG 402 0x0000 //TX_STN_NOISE_TH 403 0x0000 //TX_POST_MASK_SUP 404 0x0000 //TX_POST_MASK_ADJUST 405 0x0014 //TX_NS_ENOISE_MIC0_TH -406 0x0014 //TX_MINENOISE_MIC0_TH +406 0x04E7 //TX_MINENOISE_MIC0_TH 407 0x0226 //TX_MINENOISE_MIC0_S_TH 408 0x2879 //TX_MIN_G_CTRL_SSNS 409 0x0400 //TX_METAL_RTO_THR @@ -40864,16 +61932,16 @@ 511 0x6666 //TX_MIC_TO_BFGAIN 512 0x6666 //TX_MICTOBFGAIN0 513 0x0014 //TX_FASTMUE_TH -514 0x0000 //TX_DERVB_LEN_0 -515 0x0000 //TX_DERVB_LEN_1 -516 0x0000 //TX_RHO_DERVB -517 0x0000 //TX_MIC_INDX_DERVB -518 0x0000 //TX_MU_DERVB -519 0x0000 //TX_DR_RESRV_0 -520 0x0000 //TX_DR_RESRV_1 -521 0x0000 //TX_DR_RESRV_2 -522 0x0000 //TX_DR_RESRV_3 -523 0x0000 //TX_DR_RESRV_4 +514 0xC000 //TX_DEREVERB_LF_MU +515 0xC000 //TX_DEREVERB_HF_MU +516 0xCCCC //TX_DEREVERB_DELAY +517 0xD999 //TX_DEREVERB_COEF_LEN +518 0x1F40 //TX_DEREVERB_DNR +519 0x0000 //TX_DEREVERB_ALPHA +520 0x0000 //TX_DEREVERB_BETA +521 0x0000 //TX_GSC_RTOL_TH +522 0x7000 //TX_GSC_RTOH_TH +523 0x0064 //TX_WIDE2_MEANHTH 524 0x0000 //TX_DR_RESRV_5 525 0x0000 //TX_DR_RESRV_6 526 0x0000 //TX_DR_RESRV_7 @@ -41239,16 +62307,81 @@ 886 0x0000 //TX_FASTNS_TFMASKBIN_TH2 887 0x0000 //TX_FASTNS_TFMASKBIN_TH3 888 0x00C8 //TX_FASTNS_ARSPC_TH -889 0xD99A //TX_FASTNS_MASK5_TH +889 0xC000 //TX_FASTNS_MASK5_TH 890 0x051F //TX_POSTSSA_MIN_G_VR_MASK -891 0x7FFF //TX_A_LESSCUT_RTO_MASK +891 0x7000 //TX_A_LESSCUT_RTO_MASK 892 0x1770 //TX_FASTNS_NOISETH 893 0xC000 //TX_FASTNS_SSA_THLFL 894 0xC000 //TX_FASTNS_SSA_THHFL 895 0xCCCC //TX_FASTNS_SSA_THLFH 896 0xD999 //TX_FASTNS_SSA_THHFH +897 0x2339 //TX_SENDFUNC_REG_MICMUTE +898 0x0021 //TX_SENDFUNC_REG_MICMUTE1 +899 0x02BC //TX_MICMUTE_RATIO_THR +900 0x0140 //TX_MICMUTE_AMP_THR +901 0x0004 //TX_MICMUTE_HPF_IND +902 0x00C0 //TX_MICMUTE_LOG_EYR_TH +903 0x0008 //TX_MICMUTE_CVG_TIME +904 0x0008 //TX_MICMUTE_RELEASE_TIME +905 0x01FE //TX_MIC_VOLUME_MIC0MUTE +906 0x0020 //TX_MICMUTE_EPD_OFFSET_0 +907 0x001E //TX_MICMUTE_FRQ_AEC_L +908 0x7999 //TX_MICMUTE_EAD_THR +909 0x7FFF //TX_MICMUTE_LAMBDA_CB_NLE +910 0x7FFF //TX_MICMUTE_LAMBDA_RE_EST +911 0x4000 //TX_DTD_THR1_MICMUTE_0 +912 0x7000 //TX_DTD_THR1_MICMUTE_1 +913 0x7FFF //TX_DTD_THR1_MICMUTE_2 +914 0x7FFF //TX_DTD_THR1_MICMUTE_3 +915 0x6CCC //TX_DTD_THR2_MICMUTE_0 +916 0x0400 //TX_MICMUTE_MIN_EQ_RE_EST_0 +917 0x0400 //TX_MICMUTE_MIN_EQ_RE_EST_1 +918 0x1000 //TX_MICMUTE_MIN_EQ_RE_EST_2 +919 0x7FFF //TX_MICMUTE_MIN_EQ_RE_EST_3 +920 0x7FFF //TX_MICMUTE_MIN_EQ_RE_EST_4 +921 0x4000 //TX_MICMUTE_C_POST_FLT +922 0x03E8 //TX_MICMUTE_DT_CUT_K +923 0x0001 //TX_MICMUTE_DT_CUT_THR +924 0x03E8 //TX_MICMUTE_DT_CUT_K2 +925 0x0001 //TX_MICMUTE_DT_CUT_THR2 +926 0x0064 //TX_MICMUTE_DT2_HOLD_N +927 0x1000 //TX_MICMUTE_RATIODTH_THCUT +928 0x1000 //TX_MICMUTE_B_POST_FLT_ECHOL +929 0x7FFF //TX_MICMUTE_B_POST_FLT_ECHOH +930 0x0400 //TX_MICMUTE_C_POST_FLT_MASK +931 0x7999 //TX_MICMUTE_RATIODTL_CUT_TH +932 0x0258 //TX_MICMUTE_DT_CUT_K1 +933 0x0800 //TX_MICMUTE_N2_SN_EST +934 0xFC00 //TX_MICMUTE_THR_SN_EST_0 +935 0x001C //TX_MICMUTE_MIN_G_CTRL_0 +936 0x6000 //TX_MICMUTE_A_POST_FILT_S_0 +937 0x7000 //TX_MICMUTE_B_POST_FILT_0 +938 0x2710 //TX_MIC1RUB_AMP_THR +939 0x0010 //TX_MIC1MUTE_RATIO_THR +940 0x0450 //TX_MIC1MUTE_AMP_THR +941 0x0008 //TX_MIC1MUTE_CVG_TIME +942 0x0008 //TX_MIC1MUTE_RELEASE_TIME +943 0x0000 //TX_AMS_RESRV_01 +944 0x0000 //TX_AMS_RESRV_02 +945 0x0000 //TX_AMS_RESRV_03 +946 0x0000 //TX_AMS_RESRV_04 +947 0x0000 //TX_AMS_RESRV_05 +948 0x0000 //TX_AMS_RESRV_06 +949 0x0000 //TX_AMS_RESRV_07 +950 0x0000 //TX_AMS_RESRV_08 +951 0x0000 //TX_AMS_RESRV_09 +952 0x0000 //TX_AMS_RESRV_10 +953 0x0000 //TX_AMS_RESRV_11 +954 0x0000 //TX_AMS_RESRV_12 +955 0x0000 //TX_AMS_RESRV_13 +956 0x0000 //TX_AMS_RESRV_14 +957 0x0000 //TX_AMS_RESRV_15 +958 0x0000 //TX_AMS_RESRV_16 +959 0x0000 //TX_AMS_RESRV_17 +960 0x0000 //TX_AMS_RESRV_18 +961 0x0000 //TX_AMS_RESRV_19 #RX -0 0x006C //RX_RECVFUNC_MODE_0 +0 0x242C //RX_RECVFUNC_MODE_0 1 0x0000 //RX_RECVFUNC_MODE_1 2 0x0004 //RX_SAMPLINGFREQ_SIG 3 0x0004 //RX_SAMPLINGFREQ_PROC @@ -41258,7 +62391,7 @@ 7 0x4000 //RX_TDDRC_ALPHA_UP_2 8 0x4000 //RX_TDDRC_ALPHA_UP_3 9 0x4000 //RX_TDDRC_ALPHA_UP_4 -10 0x0800 //RX_PGA +10 0x0403 //RX_PGA 11 0x7E56 //RX_A_HP 12 0x4000 //RX_B_PE 13 0x7800 //RX_THR_PITCH_DET_0 @@ -41276,32 +62409,32 @@ 25 0x000A //RX_FENS_RESRV_0 26 0x0190 //RX_FENS_RESRV_1 27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 -28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 -29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +28 0x4000 //RX_TDDRC_ALPHA_DWN_2 +29 0x4000 //RX_TDDRC_ALPHA_DWN_3 30 0x0002 //RX_EXTRA_NS_L 31 0x0800 //RX_EXTRA_NS_A -32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 -33 0x7FFF //RX_TDDRC_LIMITER_THRD +32 0x4000 //RX_TDDRC_ALPHA_DWN_4 +33 0x7214 //RX_TDDRC_LIMITER_THRD 34 0x0800 //RX_TDDRC_LIMITER_GAIN 35 0x199A //RX_A_POST_FLT 36 0x0000 //RX_LMT_THRD 37 0x4000 //RX_LMT_ALPHA 38 0x0020 //RX_FDEQ_SUBNUM 39 0x4848 //RX_FDEQ_GAIN_0 -40 0x4848 //RX_FDEQ_GAIN_1 -41 0x4848 //RX_FDEQ_GAIN_2 -42 0x4850 //RX_FDEQ_GAIN_3 -43 0x4848 //RX_FDEQ_GAIN_4 -44 0x4848 //RX_FDEQ_GAIN_5 -45 0x4568 //RX_FDEQ_GAIN_6 -46 0x485C //RX_FDEQ_GAIN_7 -47 0x5C60 //RX_FDEQ_GAIN_8 -48 0x685C //RX_FDEQ_GAIN_9 -49 0x5648 //RX_FDEQ_GAIN_10 -50 0x484C //RX_FDEQ_GAIN_11 -51 0x706C //RX_FDEQ_GAIN_12 -52 0x7070 //RX_FDEQ_GAIN_13 -53 0x6868 //RX_FDEQ_GAIN_14 +40 0x4040 //RX_FDEQ_GAIN_1 +41 0x3838 //RX_FDEQ_GAIN_2 +42 0x3448 //RX_FDEQ_GAIN_3 +43 0x343C //RX_FDEQ_GAIN_4 +44 0x4040 //RX_FDEQ_GAIN_5 +45 0x4048 //RX_FDEQ_GAIN_6 +46 0x384C //RX_FDEQ_GAIN_7 +47 0x4C54 //RX_FDEQ_GAIN_8 +48 0x5C54 //RX_FDEQ_GAIN_9 +49 0x4E38 //RX_FDEQ_GAIN_10 +50 0x303C //RX_FDEQ_GAIN_11 +51 0x5450 //RX_FDEQ_GAIN_12 +52 0x4860 //RX_FDEQ_GAIN_13 +53 0x6060 //RX_FDEQ_GAIN_14 54 0x6060 //RX_FDEQ_GAIN_15 55 0x4848 //RX_FDEQ_GAIN_16 56 0x4848 //RX_FDEQ_GAIN_17 @@ -41364,20 +62497,20 @@ 113 0x0002 //RX_TDDRC_THRD_1 114 0x1800 //RX_TDDRC_THRD_2 115 0x1800 //RX_TDDRC_THRD_3 -116 0x6000 //RX_TDDRC_SLANT_0 -117 0x6E00 //RX_TDDRC_SLANT_1 +116 0x7FFF //RX_TDDRC_SLANT_0 +117 0x7FFF //RX_TDDRC_SLANT_1 118 0x4000 //RX_TDDRC_ALPHA_UP_0 119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 120 0x0000 //RX_TDDRC_HMNC_FLAG 121 0x199A //RX_TDDRC_HMNC_GAIN 122 0x0001 //RX_TDDRC_SMT_FLAG 123 0x0CCD //RX_TDDRC_SMT_W -124 0x02D2 //RX_TDDRC_DRC_GAIN +124 0x0439 //RX_TDDRC_DRC_GAIN 125 0x7C00 //RX_LAMBDA_PKA_FP -126 0x2000 //RX_TPKA_FP -127 0x2000 //RX_MIN_G_FP -128 0x0080 //RX_MAX_G_FP -129 0x0013 //RX_SPK_VOL +126 0x1B58 //RX_TPKA_FP +127 0x0400 //RX_MIN_G_FP +128 0x0800 //RX_MAX_G_FP +129 0x0100 //RX_SPK_VOL 130 0x0000 //RX_VOL_RESRV_0 131 0x0000 //RX_MAXLEVEL_CNG 132 0x3000 //RX_BWE_UV_TH @@ -41411,40 +62544,40 @@ 8 0x4000 //RX_TDDRC_ALPHA_UP_3 9 0x4000 //RX_TDDRC_ALPHA_UP_4 27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 -28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 -29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 -32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 -33 0x7FFF //RX_TDDRC_LIMITER_THRD +28 0x4000 //RX_TDDRC_ALPHA_DWN_2 +29 0x4000 //RX_TDDRC_ALPHA_DWN_3 +32 0x4000 //RX_TDDRC_ALPHA_DWN_4 +33 0x7214 //RX_TDDRC_LIMITER_THRD 34 0x0800 //RX_TDDRC_LIMITER_GAIN 112 0x0001 //RX_TDDRC_THRD_0 113 0x0002 //RX_TDDRC_THRD_1 114 0x1800 //RX_TDDRC_THRD_2 115 0x1800 //RX_TDDRC_THRD_3 -116 0x6000 //RX_TDDRC_SLANT_0 -117 0x6E00 //RX_TDDRC_SLANT_1 +116 0x7FFF //RX_TDDRC_SLANT_0 +117 0x7FFF //RX_TDDRC_SLANT_1 118 0x4000 //RX_TDDRC_ALPHA_UP_0 119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 120 0x0000 //RX_TDDRC_HMNC_FLAG 121 0x199A //RX_TDDRC_HMNC_GAIN 122 0x0001 //RX_TDDRC_SMT_FLAG 123 0x0CCD //RX_TDDRC_SMT_W -124 0x02D2 //RX_TDDRC_DRC_GAIN +124 0x0439 //RX_TDDRC_DRC_GAIN 38 0x0020 //RX_FDEQ_SUBNUM 39 0x4848 //RX_FDEQ_GAIN_0 -40 0x4848 //RX_FDEQ_GAIN_1 -41 0x4848 //RX_FDEQ_GAIN_2 -42 0x4850 //RX_FDEQ_GAIN_3 -43 0x4848 //RX_FDEQ_GAIN_4 -44 0x4848 //RX_FDEQ_GAIN_5 -45 0x4568 //RX_FDEQ_GAIN_6 -46 0x485C //RX_FDEQ_GAIN_7 -47 0x5C60 //RX_FDEQ_GAIN_8 -48 0x685C //RX_FDEQ_GAIN_9 -49 0x5648 //RX_FDEQ_GAIN_10 -50 0x484C //RX_FDEQ_GAIN_11 -51 0x706C //RX_FDEQ_GAIN_12 -52 0x7070 //RX_FDEQ_GAIN_13 -53 0x6868 //RX_FDEQ_GAIN_14 +40 0x4040 //RX_FDEQ_GAIN_1 +41 0x3838 //RX_FDEQ_GAIN_2 +42 0x3448 //RX_FDEQ_GAIN_3 +43 0x343C //RX_FDEQ_GAIN_4 +44 0x4040 //RX_FDEQ_GAIN_5 +45 0x4048 //RX_FDEQ_GAIN_6 +46 0x384C //RX_FDEQ_GAIN_7 +47 0x4C54 //RX_FDEQ_GAIN_8 +48 0x5C54 //RX_FDEQ_GAIN_9 +49 0x4E38 //RX_FDEQ_GAIN_10 +50 0x303C //RX_FDEQ_GAIN_11 +51 0x5450 //RX_FDEQ_GAIN_12 +52 0x4860 //RX_FDEQ_GAIN_13 +53 0x6060 //RX_FDEQ_GAIN_14 54 0x6060 //RX_FDEQ_GAIN_15 55 0x4848 //RX_FDEQ_GAIN_16 56 0x4848 //RX_FDEQ_GAIN_17 @@ -41502,7 +62635,7 @@ 108 0x7FFF //RX_FDDRC_SLANT_1_2 109 0x7FFF //RX_FDDRC_SLANT_1_3 110 0x0000 //RX_FDDRC_RESRV_0 -129 0x0013 //RX_SPK_VOL +129 0x0012 //RX_SPK_VOL 130 0x0000 //RX_VOL_RESRV_0 #VOL 1 6 0x4000 //RX_TDDRC_ALPHA_UP_1 @@ -41510,40 +62643,40 @@ 8 0x4000 //RX_TDDRC_ALPHA_UP_3 9 0x4000 //RX_TDDRC_ALPHA_UP_4 27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 -28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 -29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 -32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 -33 0x7FFF //RX_TDDRC_LIMITER_THRD +28 0x4000 //RX_TDDRC_ALPHA_DWN_2 +29 0x4000 //RX_TDDRC_ALPHA_DWN_3 +32 0x4000 //RX_TDDRC_ALPHA_DWN_4 +33 0x7214 //RX_TDDRC_LIMITER_THRD 34 0x0800 //RX_TDDRC_LIMITER_GAIN 112 0x0001 //RX_TDDRC_THRD_0 113 0x0002 //RX_TDDRC_THRD_1 114 0x1800 //RX_TDDRC_THRD_2 115 0x1800 //RX_TDDRC_THRD_3 -116 0x6000 //RX_TDDRC_SLANT_0 -117 0x6E00 //RX_TDDRC_SLANT_1 +116 0x7FFF //RX_TDDRC_SLANT_0 +117 0x7FFF //RX_TDDRC_SLANT_1 118 0x4000 //RX_TDDRC_ALPHA_UP_0 119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 120 0x0000 //RX_TDDRC_HMNC_FLAG 121 0x199A //RX_TDDRC_HMNC_GAIN 122 0x0001 //RX_TDDRC_SMT_FLAG 123 0x0CCD //RX_TDDRC_SMT_W -124 0x02D2 //RX_TDDRC_DRC_GAIN +124 0x0439 //RX_TDDRC_DRC_GAIN 38 0x0020 //RX_FDEQ_SUBNUM 39 0x4848 //RX_FDEQ_GAIN_0 -40 0x4848 //RX_FDEQ_GAIN_1 -41 0x4848 //RX_FDEQ_GAIN_2 -42 0x4850 //RX_FDEQ_GAIN_3 -43 0x4848 //RX_FDEQ_GAIN_4 -44 0x4848 //RX_FDEQ_GAIN_5 -45 0x4568 //RX_FDEQ_GAIN_6 -46 0x485C //RX_FDEQ_GAIN_7 -47 0x5C60 //RX_FDEQ_GAIN_8 -48 0x685C //RX_FDEQ_GAIN_9 -49 0x5648 //RX_FDEQ_GAIN_10 -50 0x484C //RX_FDEQ_GAIN_11 -51 0x706C //RX_FDEQ_GAIN_12 -52 0x7070 //RX_FDEQ_GAIN_13 -53 0x6868 //RX_FDEQ_GAIN_14 +40 0x4040 //RX_FDEQ_GAIN_1 +41 0x3838 //RX_FDEQ_GAIN_2 +42 0x3448 //RX_FDEQ_GAIN_3 +43 0x343C //RX_FDEQ_GAIN_4 +44 0x4040 //RX_FDEQ_GAIN_5 +45 0x4048 //RX_FDEQ_GAIN_6 +46 0x384C //RX_FDEQ_GAIN_7 +47 0x4C54 //RX_FDEQ_GAIN_8 +48 0x5C54 //RX_FDEQ_GAIN_9 +49 0x4E38 //RX_FDEQ_GAIN_10 +50 0x303C //RX_FDEQ_GAIN_11 +51 0x5450 //RX_FDEQ_GAIN_12 +52 0x4860 //RX_FDEQ_GAIN_13 +53 0x6060 //RX_FDEQ_GAIN_14 54 0x6060 //RX_FDEQ_GAIN_15 55 0x4848 //RX_FDEQ_GAIN_16 56 0x4848 //RX_FDEQ_GAIN_17 @@ -41601,7 +62734,7 @@ 108 0x7FFF //RX_FDDRC_SLANT_1_2 109 0x7FFF //RX_FDDRC_SLANT_1_3 110 0x0000 //RX_FDDRC_RESRV_0 -129 0x001C //RX_SPK_VOL +129 0x001A //RX_SPK_VOL 130 0x0000 //RX_VOL_RESRV_0 #VOL 2 6 0x4000 //RX_TDDRC_ALPHA_UP_1 @@ -41609,40 +62742,40 @@ 8 0x4000 //RX_TDDRC_ALPHA_UP_3 9 0x4000 //RX_TDDRC_ALPHA_UP_4 27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 -28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 -29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 -32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 -33 0x7FFF //RX_TDDRC_LIMITER_THRD +28 0x4000 //RX_TDDRC_ALPHA_DWN_2 +29 0x4000 //RX_TDDRC_ALPHA_DWN_3 +32 0x4000 //RX_TDDRC_ALPHA_DWN_4 +33 0x7214 //RX_TDDRC_LIMITER_THRD 34 0x0800 //RX_TDDRC_LIMITER_GAIN 112 0x0001 //RX_TDDRC_THRD_0 113 0x0002 //RX_TDDRC_THRD_1 114 0x1800 //RX_TDDRC_THRD_2 115 0x1800 //RX_TDDRC_THRD_3 -116 0x6000 //RX_TDDRC_SLANT_0 -117 0x6E00 //RX_TDDRC_SLANT_1 +116 0x7FFF //RX_TDDRC_SLANT_0 +117 0x7FFF //RX_TDDRC_SLANT_1 118 0x4000 //RX_TDDRC_ALPHA_UP_0 119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 120 0x0000 //RX_TDDRC_HMNC_FLAG 121 0x199A //RX_TDDRC_HMNC_GAIN 122 0x0001 //RX_TDDRC_SMT_FLAG 123 0x0CCD //RX_TDDRC_SMT_W -124 0x02D2 //RX_TDDRC_DRC_GAIN +124 0x0439 //RX_TDDRC_DRC_GAIN 38 0x0020 //RX_FDEQ_SUBNUM 39 0x4848 //RX_FDEQ_GAIN_0 -40 0x4848 //RX_FDEQ_GAIN_1 -41 0x4848 //RX_FDEQ_GAIN_2 -42 0x4850 //RX_FDEQ_GAIN_3 -43 0x4848 //RX_FDEQ_GAIN_4 -44 0x4848 //RX_FDEQ_GAIN_5 -45 0x4568 //RX_FDEQ_GAIN_6 -46 0x485C //RX_FDEQ_GAIN_7 -47 0x5C60 //RX_FDEQ_GAIN_8 -48 0x685C //RX_FDEQ_GAIN_9 -49 0x5648 //RX_FDEQ_GAIN_10 -50 0x484C //RX_FDEQ_GAIN_11 -51 0x706C //RX_FDEQ_GAIN_12 -52 0x7070 //RX_FDEQ_GAIN_13 -53 0x6868 //RX_FDEQ_GAIN_14 +40 0x4040 //RX_FDEQ_GAIN_1 +41 0x3838 //RX_FDEQ_GAIN_2 +42 0x3448 //RX_FDEQ_GAIN_3 +43 0x343C //RX_FDEQ_GAIN_4 +44 0x4040 //RX_FDEQ_GAIN_5 +45 0x4048 //RX_FDEQ_GAIN_6 +46 0x384C //RX_FDEQ_GAIN_7 +47 0x4C54 //RX_FDEQ_GAIN_8 +48 0x5C54 //RX_FDEQ_GAIN_9 +49 0x4E38 //RX_FDEQ_GAIN_10 +50 0x303C //RX_FDEQ_GAIN_11 +51 0x5450 //RX_FDEQ_GAIN_12 +52 0x4860 //RX_FDEQ_GAIN_13 +53 0x6060 //RX_FDEQ_GAIN_14 54 0x6060 //RX_FDEQ_GAIN_15 55 0x4848 //RX_FDEQ_GAIN_16 56 0x4848 //RX_FDEQ_GAIN_17 @@ -41700,7 +62833,7 @@ 108 0x7FFF //RX_FDDRC_SLANT_1_2 109 0x7FFF //RX_FDDRC_SLANT_1_3 110 0x0000 //RX_FDDRC_RESRV_0 -129 0x0028 //RX_SPK_VOL +129 0x0025 //RX_SPK_VOL 130 0x0000 //RX_VOL_RESRV_0 #VOL 3 6 0x4000 //RX_TDDRC_ALPHA_UP_1 @@ -41708,40 +62841,40 @@ 8 0x4000 //RX_TDDRC_ALPHA_UP_3 9 0x4000 //RX_TDDRC_ALPHA_UP_4 27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 -28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 -29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 -32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 -33 0x7FFF //RX_TDDRC_LIMITER_THRD +28 0x4000 //RX_TDDRC_ALPHA_DWN_2 +29 0x4000 //RX_TDDRC_ALPHA_DWN_3 +32 0x4000 //RX_TDDRC_ALPHA_DWN_4 +33 0x7214 //RX_TDDRC_LIMITER_THRD 34 0x0800 //RX_TDDRC_LIMITER_GAIN 112 0x0001 //RX_TDDRC_THRD_0 113 0x0002 //RX_TDDRC_THRD_1 114 0x1800 //RX_TDDRC_THRD_2 115 0x1800 //RX_TDDRC_THRD_3 -116 0x6000 //RX_TDDRC_SLANT_0 -117 0x6E00 //RX_TDDRC_SLANT_1 +116 0x7FFF //RX_TDDRC_SLANT_0 +117 0x7FFF //RX_TDDRC_SLANT_1 118 0x4000 //RX_TDDRC_ALPHA_UP_0 119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 120 0x0000 //RX_TDDRC_HMNC_FLAG 121 0x199A //RX_TDDRC_HMNC_GAIN 122 0x0001 //RX_TDDRC_SMT_FLAG 123 0x0CCD //RX_TDDRC_SMT_W -124 0x02D2 //RX_TDDRC_DRC_GAIN +124 0x0439 //RX_TDDRC_DRC_GAIN 38 0x0020 //RX_FDEQ_SUBNUM 39 0x4848 //RX_FDEQ_GAIN_0 -40 0x4848 //RX_FDEQ_GAIN_1 -41 0x4848 //RX_FDEQ_GAIN_2 -42 0x4850 //RX_FDEQ_GAIN_3 -43 0x4848 //RX_FDEQ_GAIN_4 -44 0x4848 //RX_FDEQ_GAIN_5 -45 0x4568 //RX_FDEQ_GAIN_6 -46 0x485C //RX_FDEQ_GAIN_7 -47 0x5C60 //RX_FDEQ_GAIN_8 -48 0x685C //RX_FDEQ_GAIN_9 -49 0x5648 //RX_FDEQ_GAIN_10 -50 0x484C //RX_FDEQ_GAIN_11 -51 0x706C //RX_FDEQ_GAIN_12 -52 0x7070 //RX_FDEQ_GAIN_13 -53 0x6868 //RX_FDEQ_GAIN_14 +40 0x4040 //RX_FDEQ_GAIN_1 +41 0x3838 //RX_FDEQ_GAIN_2 +42 0x3448 //RX_FDEQ_GAIN_3 +43 0x343C //RX_FDEQ_GAIN_4 +44 0x4040 //RX_FDEQ_GAIN_5 +45 0x4048 //RX_FDEQ_GAIN_6 +46 0x384C //RX_FDEQ_GAIN_7 +47 0x4C54 //RX_FDEQ_GAIN_8 +48 0x5C54 //RX_FDEQ_GAIN_9 +49 0x4E38 //RX_FDEQ_GAIN_10 +50 0x303C //RX_FDEQ_GAIN_11 +51 0x5450 //RX_FDEQ_GAIN_12 +52 0x4860 //RX_FDEQ_GAIN_13 +53 0x6060 //RX_FDEQ_GAIN_14 54 0x6060 //RX_FDEQ_GAIN_15 55 0x4848 //RX_FDEQ_GAIN_16 56 0x4848 //RX_FDEQ_GAIN_17 @@ -41807,40 +62940,40 @@ 8 0x4000 //RX_TDDRC_ALPHA_UP_3 9 0x4000 //RX_TDDRC_ALPHA_UP_4 27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 -28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 -29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 -32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 -33 0x7FFF //RX_TDDRC_LIMITER_THRD +28 0x4000 //RX_TDDRC_ALPHA_DWN_2 +29 0x4000 //RX_TDDRC_ALPHA_DWN_3 +32 0x4000 //RX_TDDRC_ALPHA_DWN_4 +33 0x7214 //RX_TDDRC_LIMITER_THRD 34 0x0800 //RX_TDDRC_LIMITER_GAIN 112 0x0001 //RX_TDDRC_THRD_0 113 0x0002 //RX_TDDRC_THRD_1 114 0x1800 //RX_TDDRC_THRD_2 115 0x1800 //RX_TDDRC_THRD_3 -116 0x6000 //RX_TDDRC_SLANT_0 -117 0x6E00 //RX_TDDRC_SLANT_1 +116 0x7FFF //RX_TDDRC_SLANT_0 +117 0x7FFF //RX_TDDRC_SLANT_1 118 0x4000 //RX_TDDRC_ALPHA_UP_0 119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 120 0x0000 //RX_TDDRC_HMNC_FLAG 121 0x199A //RX_TDDRC_HMNC_GAIN 122 0x0001 //RX_TDDRC_SMT_FLAG 123 0x0CCD //RX_TDDRC_SMT_W -124 0x02D2 //RX_TDDRC_DRC_GAIN +124 0x0439 //RX_TDDRC_DRC_GAIN 38 0x0020 //RX_FDEQ_SUBNUM -39 0x4C4C //RX_FDEQ_GAIN_0 -40 0x4C4C //RX_FDEQ_GAIN_1 -41 0x4C48 //RX_FDEQ_GAIN_2 -42 0x4870 //RX_FDEQ_GAIN_3 -43 0x4848 //RX_FDEQ_GAIN_4 -44 0x4848 //RX_FDEQ_GAIN_5 -45 0x4568 //RX_FDEQ_GAIN_6 -46 0x485C //RX_FDEQ_GAIN_7 -47 0x5C60 //RX_FDEQ_GAIN_8 -48 0x685C //RX_FDEQ_GAIN_9 -49 0x5648 //RX_FDEQ_GAIN_10 -50 0x484C //RX_FDEQ_GAIN_11 -51 0x706C //RX_FDEQ_GAIN_12 -52 0x7070 //RX_FDEQ_GAIN_13 -53 0x6868 //RX_FDEQ_GAIN_14 +39 0x4848 //RX_FDEQ_GAIN_0 +40 0x4040 //RX_FDEQ_GAIN_1 +41 0x3838 //RX_FDEQ_GAIN_2 +42 0x3448 //RX_FDEQ_GAIN_3 +43 0x343C //RX_FDEQ_GAIN_4 +44 0x4040 //RX_FDEQ_GAIN_5 +45 0x4048 //RX_FDEQ_GAIN_6 +46 0x384C //RX_FDEQ_GAIN_7 +47 0x4C54 //RX_FDEQ_GAIN_8 +48 0x5C54 //RX_FDEQ_GAIN_9 +49 0x4E38 //RX_FDEQ_GAIN_10 +50 0x303C //RX_FDEQ_GAIN_11 +51 0x5450 //RX_FDEQ_GAIN_12 +52 0x4860 //RX_FDEQ_GAIN_13 +53 0x6060 //RX_FDEQ_GAIN_14 54 0x6060 //RX_FDEQ_GAIN_15 55 0x4848 //RX_FDEQ_GAIN_16 56 0x4848 //RX_FDEQ_GAIN_17 @@ -41898,7 +63031,7 @@ 108 0x7FFF //RX_FDDRC_SLANT_1_2 109 0x7FFF //RX_FDDRC_SLANT_1_3 110 0x0000 //RX_FDDRC_RESRV_0 -129 0x0052 //RX_SPK_VOL +129 0x004D //RX_SPK_VOL 130 0x0000 //RX_VOL_RESRV_0 #VOL 5 6 0x4000 //RX_TDDRC_ALPHA_UP_1 @@ -41906,40 +63039,40 @@ 8 0x4000 //RX_TDDRC_ALPHA_UP_3 9 0x4000 //RX_TDDRC_ALPHA_UP_4 27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 -28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 -29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 -32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 -33 0x7FFF //RX_TDDRC_LIMITER_THRD +28 0x4000 //RX_TDDRC_ALPHA_DWN_2 +29 0x4000 //RX_TDDRC_ALPHA_DWN_3 +32 0x4000 //RX_TDDRC_ALPHA_DWN_4 +33 0x7214 //RX_TDDRC_LIMITER_THRD 34 0x0800 //RX_TDDRC_LIMITER_GAIN 112 0x0001 //RX_TDDRC_THRD_0 113 0x0002 //RX_TDDRC_THRD_1 114 0x1800 //RX_TDDRC_THRD_2 115 0x1800 //RX_TDDRC_THRD_3 -116 0x6000 //RX_TDDRC_SLANT_0 -117 0x6E00 //RX_TDDRC_SLANT_1 +116 0x7FFF //RX_TDDRC_SLANT_0 +117 0x7FFF //RX_TDDRC_SLANT_1 118 0x4000 //RX_TDDRC_ALPHA_UP_0 119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 120 0x0000 //RX_TDDRC_HMNC_FLAG 121 0x199A //RX_TDDRC_HMNC_GAIN 122 0x0001 //RX_TDDRC_SMT_FLAG 123 0x0CCD //RX_TDDRC_SMT_W -124 0x02D2 //RX_TDDRC_DRC_GAIN +124 0x0439 //RX_TDDRC_DRC_GAIN 38 0x0020 //RX_FDEQ_SUBNUM -39 0x4C4C //RX_FDEQ_GAIN_0 -40 0x4C4C //RX_FDEQ_GAIN_1 -41 0x4C48 //RX_FDEQ_GAIN_2 -42 0x4870 //RX_FDEQ_GAIN_3 -43 0x4848 //RX_FDEQ_GAIN_4 -44 0x4848 //RX_FDEQ_GAIN_5 -45 0x4568 //RX_FDEQ_GAIN_6 -46 0x485C //RX_FDEQ_GAIN_7 -47 0x5C60 //RX_FDEQ_GAIN_8 -48 0x685C //RX_FDEQ_GAIN_9 -49 0x5648 //RX_FDEQ_GAIN_10 -50 0x484C //RX_FDEQ_GAIN_11 -51 0x706C //RX_FDEQ_GAIN_12 -52 0x7070 //RX_FDEQ_GAIN_13 -53 0x6868 //RX_FDEQ_GAIN_14 +39 0x4848 //RX_FDEQ_GAIN_0 +40 0x4040 //RX_FDEQ_GAIN_1 +41 0x3838 //RX_FDEQ_GAIN_2 +42 0x3448 //RX_FDEQ_GAIN_3 +43 0x343C //RX_FDEQ_GAIN_4 +44 0x4040 //RX_FDEQ_GAIN_5 +45 0x4048 //RX_FDEQ_GAIN_6 +46 0x384C //RX_FDEQ_GAIN_7 +47 0x4C54 //RX_FDEQ_GAIN_8 +48 0x5C54 //RX_FDEQ_GAIN_9 +49 0x4E38 //RX_FDEQ_GAIN_10 +50 0x303C //RX_FDEQ_GAIN_11 +51 0x5450 //RX_FDEQ_GAIN_12 +52 0x4860 //RX_FDEQ_GAIN_13 +53 0x6060 //RX_FDEQ_GAIN_14 54 0x6060 //RX_FDEQ_GAIN_15 55 0x4848 //RX_FDEQ_GAIN_16 56 0x4848 //RX_FDEQ_GAIN_17 @@ -41997,7 +63130,7 @@ 108 0x7FFF //RX_FDDRC_SLANT_1_2 109 0x7FFF //RX_FDDRC_SLANT_1_3 110 0x0000 //RX_FDDRC_RESRV_0 -129 0x0078 //RX_SPK_VOL +129 0x0074 //RX_SPK_VOL 130 0x0000 //RX_VOL_RESRV_0 #VOL 6 6 0x4000 //RX_TDDRC_ALPHA_UP_1 @@ -42005,40 +63138,40 @@ 8 0x4000 //RX_TDDRC_ALPHA_UP_3 9 0x4000 //RX_TDDRC_ALPHA_UP_4 27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 -28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 -29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 -32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 -33 0x7FFF //RX_TDDRC_LIMITER_THRD +28 0x4000 //RX_TDDRC_ALPHA_DWN_2 +29 0x4000 //RX_TDDRC_ALPHA_DWN_3 +32 0x4000 //RX_TDDRC_ALPHA_DWN_4 +33 0x7214 //RX_TDDRC_LIMITER_THRD 34 0x0800 //RX_TDDRC_LIMITER_GAIN 112 0x0001 //RX_TDDRC_THRD_0 113 0x0002 //RX_TDDRC_THRD_1 114 0x1800 //RX_TDDRC_THRD_2 115 0x1800 //RX_TDDRC_THRD_3 -116 0x6000 //RX_TDDRC_SLANT_0 -117 0x6E00 //RX_TDDRC_SLANT_1 +116 0x7FFF //RX_TDDRC_SLANT_0 +117 0x7FFF //RX_TDDRC_SLANT_1 118 0x4000 //RX_TDDRC_ALPHA_UP_0 119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 120 0x0000 //RX_TDDRC_HMNC_FLAG 121 0x199A //RX_TDDRC_HMNC_GAIN 122 0x0001 //RX_TDDRC_SMT_FLAG 123 0x0CCD //RX_TDDRC_SMT_W -124 0x02D2 //RX_TDDRC_DRC_GAIN +124 0x0439 //RX_TDDRC_DRC_GAIN 38 0x0020 //RX_FDEQ_SUBNUM -39 0x4C4C //RX_FDEQ_GAIN_0 -40 0x4C4C //RX_FDEQ_GAIN_1 -41 0x4C48 //RX_FDEQ_GAIN_2 -42 0x4870 //RX_FDEQ_GAIN_3 -43 0x4848 //RX_FDEQ_GAIN_4 -44 0x4848 //RX_FDEQ_GAIN_5 -45 0x4568 //RX_FDEQ_GAIN_6 -46 0x485C //RX_FDEQ_GAIN_7 -47 0x5C60 //RX_FDEQ_GAIN_8 -48 0x685C //RX_FDEQ_GAIN_9 -49 0x5648 //RX_FDEQ_GAIN_10 -50 0x484C //RX_FDEQ_GAIN_11 -51 0x706C //RX_FDEQ_GAIN_12 -52 0x7070 //RX_FDEQ_GAIN_13 -53 0x6868 //RX_FDEQ_GAIN_14 +39 0x4848 //RX_FDEQ_GAIN_0 +40 0x4040 //RX_FDEQ_GAIN_1 +41 0x3838 //RX_FDEQ_GAIN_2 +42 0x3448 //RX_FDEQ_GAIN_3 +43 0x343C //RX_FDEQ_GAIN_4 +44 0x4040 //RX_FDEQ_GAIN_5 +45 0x4048 //RX_FDEQ_GAIN_6 +46 0x384C //RX_FDEQ_GAIN_7 +47 0x4C54 //RX_FDEQ_GAIN_8 +48 0x5C54 //RX_FDEQ_GAIN_9 +49 0x4E38 //RX_FDEQ_GAIN_10 +50 0x303C //RX_FDEQ_GAIN_11 +51 0x5450 //RX_FDEQ_GAIN_12 +52 0x4860 //RX_FDEQ_GAIN_13 +53 0x6060 //RX_FDEQ_GAIN_14 54 0x6060 //RX_FDEQ_GAIN_15 55 0x4848 //RX_FDEQ_GAIN_16 56 0x4848 //RX_FDEQ_GAIN_17 @@ -42098,18 +63231,869 @@ 110 0x0000 //RX_FDDRC_RESRV_0 129 0x0100 //RX_SPK_VOL 130 0x0000 //RX_VOL_RESRV_0 +#RX 2 +157 0x242C //RX_RECVFUNC_MODE_0 +158 0x0000 //RX_RECVFUNC_MODE_1 +159 0x0004 //RX_SAMPLINGFREQ_SIG +160 0x0004 //RX_SAMPLINGFREQ_PROC +161 0x000A //RX_FRAME_SZ +162 0x0000 //RX_DELAY_OPT +163 0x4000 //RX_TDDRC_ALPHA_UP_1 +164 0x4000 //RX_TDDRC_ALPHA_UP_2 +165 0x4000 //RX_TDDRC_ALPHA_UP_3 +166 0x4000 //RX_TDDRC_ALPHA_UP_4 +167 0x0403 //RX_PGA +168 0x7E56 //RX_A_HP +169 0x4000 //RX_B_PE +170 0x7800 //RX_THR_PITCH_DET_0 +171 0x7000 //RX_THR_PITCH_DET_1 +172 0x6000 //RX_THR_PITCH_DET_2 +173 0x0008 //RX_PITCH_BFR_LEN +174 0x0003 //RX_SBD_PITCH_DET +175 0x0100 //RX_PP_RESRV_0 +176 0x0020 //RX_PP_RESRV_1 +177 0x0400 //RX_N_SN_EST +178 0x000C //RX_N2_SN_EST +179 0x0014 //RX_NS_LVL_CTRL +180 0xF400 //RX_THR_SN_EST +181 0x7E00 //RX_LAMBDA_PFILT +182 0x000A //RX_FENS_RESRV_0 +183 0x0190 //RX_FENS_RESRV_1 +184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +185 0x4000 //RX_TDDRC_ALPHA_DWN_2 +186 0x4000 //RX_TDDRC_ALPHA_DWN_3 +187 0x0002 //RX_EXTRA_NS_L +188 0x0800 //RX_EXTRA_NS_A +189 0x4000 //RX_TDDRC_ALPHA_DWN_4 +190 0x7214 //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +192 0x199A //RX_A_POST_FLT +193 0x0000 //RX_LMT_THRD +194 0x4000 //RX_LMT_ALPHA +195 0x0020 //RX_FDEQ_SUBNUM +196 0x4848 //RX_FDEQ_GAIN_0 +197 0x4040 //RX_FDEQ_GAIN_1 +198 0x3838 //RX_FDEQ_GAIN_2 +199 0x3448 //RX_FDEQ_GAIN_3 +200 0x343C //RX_FDEQ_GAIN_4 +201 0x4040 //RX_FDEQ_GAIN_5 +202 0x4048 //RX_FDEQ_GAIN_6 +203 0x384C //RX_FDEQ_GAIN_7 +204 0x4C54 //RX_FDEQ_GAIN_8 +205 0x5C54 //RX_FDEQ_GAIN_9 +206 0x4E38 //RX_FDEQ_GAIN_10 +207 0x303C //RX_FDEQ_GAIN_11 +208 0x5450 //RX_FDEQ_GAIN_12 +209 0x4860 //RX_FDEQ_GAIN_13 +210 0x6060 //RX_FDEQ_GAIN_14 +211 0x6060 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0202 //RX_FDEQ_BIN_0 +221 0x0203 //RX_FDEQ_BIN_1 +222 0x0303 //RX_FDEQ_BIN_2 +223 0x0402 //RX_FDEQ_BIN_3 +224 0x0504 //RX_FDEQ_BIN_4 +225 0x0209 //RX_FDEQ_BIN_5 +226 0x0808 //RX_FDEQ_BIN_6 +227 0x090A //RX_FDEQ_BIN_7 +228 0x0B0C //RX_FDEQ_BIN_8 +229 0x0D0E //RX_FDEQ_BIN_9 +230 0x1013 //RX_FDEQ_BIN_10 +231 0x1719 //RX_FDEQ_BIN_11 +232 0x1B1E //RX_FDEQ_BIN_12 +233 0x1E1E //RX_FDEQ_BIN_13 +234 0x1E28 //RX_FDEQ_BIN_14 +235 0x282C //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x4000 //RX_FDEQ_RESRV_0 +245 0x0320 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0030 //RX_FDDRC_BAND_MARGIN_1 +248 0x0050 //RX_FDDRC_BAND_MARGIN_2 +249 0x0080 //RX_FDDRC_BAND_MARGIN_3 +250 0x0004 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x2000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x2000 //RX_FDDRC_THRD_3_2 +258 0x5000 //RX_FDDRC_THRD_3_3 +259 0x4000 //RX_FDDRC_SLANT_0_0 +260 0x4000 //RX_FDDRC_SLANT_0_1 +261 0x4000 //RX_FDDRC_SLANT_0_2 +262 0x4000 //RX_FDDRC_SLANT_0_3 +263 0x7FFF //RX_FDDRC_SLANT_1_0 +264 0x7FFF //RX_FDDRC_SLANT_1_1 +265 0x7FFF //RX_FDDRC_SLANT_1_2 +266 0x7FFF //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +268 0x0002 //RX_FILTINDX +269 0x0001 //RX_TDDRC_THRD_0 +270 0x0002 //RX_TDDRC_THRD_1 +271 0x1800 //RX_TDDRC_THRD_2 +272 0x1800 //RX_TDDRC_THRD_3 +273 0x7FFF //RX_TDDRC_SLANT_0 +274 0x7FFF //RX_TDDRC_SLANT_1 +275 0x4000 //RX_TDDRC_ALPHA_UP_0 +276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x199A //RX_TDDRC_HMNC_GAIN +279 0x0001 //RX_TDDRC_SMT_FLAG +280 0x0CCD //RX_TDDRC_SMT_W +281 0x0439 //RX_TDDRC_DRC_GAIN +282 0x7C00 //RX_LAMBDA_PKA_FP +283 0x1B58 //RX_TPKA_FP +284 0x0400 //RX_MIN_G_FP +285 0x0800 //RX_MAX_G_FP +286 0x0100 //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 +288 0x0000 //RX_MAXLEVEL_CNG +289 0x3000 //RX_BWE_UV_TH +290 0x3000 //RX_BWE_UV_TH2 +291 0x1800 //RX_BWE_UV_TH3 +292 0x1000 //RX_BWE_V_TH +293 0x04CD //RX_BWE_GAIN1_V_TH1 +294 0x0F33 //RX_BWE_GAIN1_V_TH2 +295 0x7333 //RX_BWE_UV_EQ +296 0x199A //RX_BWE_V_EQ +297 0x7333 //RX_BWE_TONE_TH +298 0x0004 //RX_BWE_UV_HOLD_T +299 0x6CCD //RX_BWE_GAIN2_ALPHA +300 0x799A //RX_BWE_GAIN3_ALPHA +301 0x001E //RX_BWE_CUTOFF +302 0x3000 //RX_BWE_GAINFILL +303 0x3200 //RX_BWE_MAXTH_TONE +304 0x2000 //RX_BWE_EQ_0 +305 0x2000 //RX_BWE_EQ_1 +306 0x2000 //RX_BWE_EQ_2 +307 0x2000 //RX_BWE_EQ_3 +308 0x2000 //RX_BWE_EQ_4 +309 0x2000 //RX_BWE_EQ_5 +310 0x2000 //RX_BWE_EQ_6 +311 0x0000 //RX_BWE_RESRV_0 +312 0x0000 //RX_BWE_RESRV_1 +313 0x0000 //RX_BWE_RESRV_2 +#VOL 0 +163 0x4000 //RX_TDDRC_ALPHA_UP_1 +164 0x4000 //RX_TDDRC_ALPHA_UP_2 +165 0x4000 //RX_TDDRC_ALPHA_UP_3 +166 0x4000 //RX_TDDRC_ALPHA_UP_4 +184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +185 0x4000 //RX_TDDRC_ALPHA_DWN_2 +186 0x4000 //RX_TDDRC_ALPHA_DWN_3 +189 0x4000 //RX_TDDRC_ALPHA_DWN_4 +190 0x7214 //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +269 0x0001 //RX_TDDRC_THRD_0 +270 0x0002 //RX_TDDRC_THRD_1 +271 0x1800 //RX_TDDRC_THRD_2 +272 0x1800 //RX_TDDRC_THRD_3 +273 0x7FFF //RX_TDDRC_SLANT_0 +274 0x7FFF //RX_TDDRC_SLANT_1 +275 0x4000 //RX_TDDRC_ALPHA_UP_0 +276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x199A //RX_TDDRC_HMNC_GAIN +279 0x0001 //RX_TDDRC_SMT_FLAG +280 0x0CCD //RX_TDDRC_SMT_W +281 0x0439 //RX_TDDRC_DRC_GAIN +195 0x0020 //RX_FDEQ_SUBNUM +196 0x4848 //RX_FDEQ_GAIN_0 +197 0x4040 //RX_FDEQ_GAIN_1 +198 0x3838 //RX_FDEQ_GAIN_2 +199 0x3448 //RX_FDEQ_GAIN_3 +200 0x343C //RX_FDEQ_GAIN_4 +201 0x4040 //RX_FDEQ_GAIN_5 +202 0x4048 //RX_FDEQ_GAIN_6 +203 0x384C //RX_FDEQ_GAIN_7 +204 0x4C54 //RX_FDEQ_GAIN_8 +205 0x5C54 //RX_FDEQ_GAIN_9 +206 0x4E38 //RX_FDEQ_GAIN_10 +207 0x303C //RX_FDEQ_GAIN_11 +208 0x5450 //RX_FDEQ_GAIN_12 +209 0x4860 //RX_FDEQ_GAIN_13 +210 0x6060 //RX_FDEQ_GAIN_14 +211 0x6060 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0202 //RX_FDEQ_BIN_0 +221 0x0203 //RX_FDEQ_BIN_1 +222 0x0303 //RX_FDEQ_BIN_2 +223 0x0402 //RX_FDEQ_BIN_3 +224 0x0504 //RX_FDEQ_BIN_4 +225 0x0209 //RX_FDEQ_BIN_5 +226 0x0808 //RX_FDEQ_BIN_6 +227 0x090A //RX_FDEQ_BIN_7 +228 0x0B0C //RX_FDEQ_BIN_8 +229 0x0D0E //RX_FDEQ_BIN_9 +230 0x1013 //RX_FDEQ_BIN_10 +231 0x1719 //RX_FDEQ_BIN_11 +232 0x1B1E //RX_FDEQ_BIN_12 +233 0x1E1E //RX_FDEQ_BIN_13 +234 0x1E28 //RX_FDEQ_BIN_14 +235 0x282C //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x4000 //RX_FDEQ_RESRV_0 +245 0x0320 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0030 //RX_FDDRC_BAND_MARGIN_1 +248 0x0050 //RX_FDDRC_BAND_MARGIN_2 +249 0x0080 //RX_FDDRC_BAND_MARGIN_3 +250 0x0004 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x2000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x2000 //RX_FDDRC_THRD_3_2 +258 0x5000 //RX_FDDRC_THRD_3_3 +259 0x4000 //RX_FDDRC_SLANT_0_0 +260 0x4000 //RX_FDDRC_SLANT_0_1 +261 0x4000 //RX_FDDRC_SLANT_0_2 +262 0x4000 //RX_FDDRC_SLANT_0_3 +263 0x7FFF //RX_FDDRC_SLANT_1_0 +264 0x7FFF //RX_FDDRC_SLANT_1_1 +265 0x7FFF //RX_FDDRC_SLANT_1_2 +266 0x7FFF //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +286 0x0012 //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 +#VOL 1 +163 0x4000 //RX_TDDRC_ALPHA_UP_1 +164 0x4000 //RX_TDDRC_ALPHA_UP_2 +165 0x4000 //RX_TDDRC_ALPHA_UP_3 +166 0x4000 //RX_TDDRC_ALPHA_UP_4 +184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +185 0x4000 //RX_TDDRC_ALPHA_DWN_2 +186 0x4000 //RX_TDDRC_ALPHA_DWN_3 +189 0x4000 //RX_TDDRC_ALPHA_DWN_4 +190 0x7214 //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +269 0x0001 //RX_TDDRC_THRD_0 +270 0x0002 //RX_TDDRC_THRD_1 +271 0x1800 //RX_TDDRC_THRD_2 +272 0x1800 //RX_TDDRC_THRD_3 +273 0x7FFF //RX_TDDRC_SLANT_0 +274 0x7FFF //RX_TDDRC_SLANT_1 +275 0x4000 //RX_TDDRC_ALPHA_UP_0 +276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x199A //RX_TDDRC_HMNC_GAIN +279 0x0001 //RX_TDDRC_SMT_FLAG +280 0x0CCD //RX_TDDRC_SMT_W +281 0x0439 //RX_TDDRC_DRC_GAIN +195 0x0020 //RX_FDEQ_SUBNUM +196 0x4848 //RX_FDEQ_GAIN_0 +197 0x4040 //RX_FDEQ_GAIN_1 +198 0x3838 //RX_FDEQ_GAIN_2 +199 0x3448 //RX_FDEQ_GAIN_3 +200 0x343C //RX_FDEQ_GAIN_4 +201 0x4040 //RX_FDEQ_GAIN_5 +202 0x4048 //RX_FDEQ_GAIN_6 +203 0x384C //RX_FDEQ_GAIN_7 +204 0x4C54 //RX_FDEQ_GAIN_8 +205 0x5C54 //RX_FDEQ_GAIN_9 +206 0x4E38 //RX_FDEQ_GAIN_10 +207 0x303C //RX_FDEQ_GAIN_11 +208 0x5450 //RX_FDEQ_GAIN_12 +209 0x4860 //RX_FDEQ_GAIN_13 +210 0x6060 //RX_FDEQ_GAIN_14 +211 0x6060 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0202 //RX_FDEQ_BIN_0 +221 0x0203 //RX_FDEQ_BIN_1 +222 0x0303 //RX_FDEQ_BIN_2 +223 0x0402 //RX_FDEQ_BIN_3 +224 0x0504 //RX_FDEQ_BIN_4 +225 0x0209 //RX_FDEQ_BIN_5 +226 0x0808 //RX_FDEQ_BIN_6 +227 0x090A //RX_FDEQ_BIN_7 +228 0x0B0C //RX_FDEQ_BIN_8 +229 0x0D0E //RX_FDEQ_BIN_9 +230 0x1013 //RX_FDEQ_BIN_10 +231 0x1719 //RX_FDEQ_BIN_11 +232 0x1B1E //RX_FDEQ_BIN_12 +233 0x1E1E //RX_FDEQ_BIN_13 +234 0x1E28 //RX_FDEQ_BIN_14 +235 0x282C //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x4000 //RX_FDEQ_RESRV_0 +245 0x0320 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0030 //RX_FDDRC_BAND_MARGIN_1 +248 0x0050 //RX_FDDRC_BAND_MARGIN_2 +249 0x0080 //RX_FDDRC_BAND_MARGIN_3 +250 0x0004 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x2000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x2000 //RX_FDDRC_THRD_3_2 +258 0x5000 //RX_FDDRC_THRD_3_3 +259 0x4000 //RX_FDDRC_SLANT_0_0 +260 0x4000 //RX_FDDRC_SLANT_0_1 +261 0x4000 //RX_FDDRC_SLANT_0_2 +262 0x4000 //RX_FDDRC_SLANT_0_3 +263 0x7FFF //RX_FDDRC_SLANT_1_0 +264 0x7FFF //RX_FDDRC_SLANT_1_1 +265 0x7FFF //RX_FDDRC_SLANT_1_2 +266 0x7FFF //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +286 0x001A //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 +#VOL 2 +163 0x4000 //RX_TDDRC_ALPHA_UP_1 +164 0x4000 //RX_TDDRC_ALPHA_UP_2 +165 0x4000 //RX_TDDRC_ALPHA_UP_3 +166 0x4000 //RX_TDDRC_ALPHA_UP_4 +184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +185 0x4000 //RX_TDDRC_ALPHA_DWN_2 +186 0x4000 //RX_TDDRC_ALPHA_DWN_3 +189 0x4000 //RX_TDDRC_ALPHA_DWN_4 +190 0x7214 //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +269 0x0001 //RX_TDDRC_THRD_0 +270 0x0002 //RX_TDDRC_THRD_1 +271 0x1800 //RX_TDDRC_THRD_2 +272 0x1800 //RX_TDDRC_THRD_3 +273 0x7FFF //RX_TDDRC_SLANT_0 +274 0x7FFF //RX_TDDRC_SLANT_1 +275 0x4000 //RX_TDDRC_ALPHA_UP_0 +276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x199A //RX_TDDRC_HMNC_GAIN +279 0x0001 //RX_TDDRC_SMT_FLAG +280 0x0CCD //RX_TDDRC_SMT_W +281 0x0439 //RX_TDDRC_DRC_GAIN +195 0x0020 //RX_FDEQ_SUBNUM +196 0x4848 //RX_FDEQ_GAIN_0 +197 0x4040 //RX_FDEQ_GAIN_1 +198 0x3838 //RX_FDEQ_GAIN_2 +199 0x3448 //RX_FDEQ_GAIN_3 +200 0x343C //RX_FDEQ_GAIN_4 +201 0x4040 //RX_FDEQ_GAIN_5 +202 0x4048 //RX_FDEQ_GAIN_6 +203 0x384C //RX_FDEQ_GAIN_7 +204 0x4C54 //RX_FDEQ_GAIN_8 +205 0x5C54 //RX_FDEQ_GAIN_9 +206 0x4E38 //RX_FDEQ_GAIN_10 +207 0x303C //RX_FDEQ_GAIN_11 +208 0x5450 //RX_FDEQ_GAIN_12 +209 0x4860 //RX_FDEQ_GAIN_13 +210 0x6060 //RX_FDEQ_GAIN_14 +211 0x6060 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0202 //RX_FDEQ_BIN_0 +221 0x0203 //RX_FDEQ_BIN_1 +222 0x0303 //RX_FDEQ_BIN_2 +223 0x0402 //RX_FDEQ_BIN_3 +224 0x0504 //RX_FDEQ_BIN_4 +225 0x0209 //RX_FDEQ_BIN_5 +226 0x0808 //RX_FDEQ_BIN_6 +227 0x090A //RX_FDEQ_BIN_7 +228 0x0B0C //RX_FDEQ_BIN_8 +229 0x0D0E //RX_FDEQ_BIN_9 +230 0x1013 //RX_FDEQ_BIN_10 +231 0x1719 //RX_FDEQ_BIN_11 +232 0x1B1E //RX_FDEQ_BIN_12 +233 0x1E1E //RX_FDEQ_BIN_13 +234 0x1E28 //RX_FDEQ_BIN_14 +235 0x282C //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x4000 //RX_FDEQ_RESRV_0 +245 0x0320 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0030 //RX_FDDRC_BAND_MARGIN_1 +248 0x0050 //RX_FDDRC_BAND_MARGIN_2 +249 0x0080 //RX_FDDRC_BAND_MARGIN_3 +250 0x0004 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x2000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x2000 //RX_FDDRC_THRD_3_2 +258 0x5000 //RX_FDDRC_THRD_3_3 +259 0x4000 //RX_FDDRC_SLANT_0_0 +260 0x4000 //RX_FDDRC_SLANT_0_1 +261 0x4000 //RX_FDDRC_SLANT_0_2 +262 0x4000 //RX_FDDRC_SLANT_0_3 +263 0x7FFF //RX_FDDRC_SLANT_1_0 +264 0x7FFF //RX_FDDRC_SLANT_1_1 +265 0x7FFF //RX_FDDRC_SLANT_1_2 +266 0x7FFF //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +286 0x0025 //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 +#VOL 3 +163 0x4000 //RX_TDDRC_ALPHA_UP_1 +164 0x4000 //RX_TDDRC_ALPHA_UP_2 +165 0x4000 //RX_TDDRC_ALPHA_UP_3 +166 0x4000 //RX_TDDRC_ALPHA_UP_4 +184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +185 0x4000 //RX_TDDRC_ALPHA_DWN_2 +186 0x4000 //RX_TDDRC_ALPHA_DWN_3 +189 0x4000 //RX_TDDRC_ALPHA_DWN_4 +190 0x7214 //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +269 0x0001 //RX_TDDRC_THRD_0 +270 0x0002 //RX_TDDRC_THRD_1 +271 0x1800 //RX_TDDRC_THRD_2 +272 0x1800 //RX_TDDRC_THRD_3 +273 0x7FFF //RX_TDDRC_SLANT_0 +274 0x7FFF //RX_TDDRC_SLANT_1 +275 0x4000 //RX_TDDRC_ALPHA_UP_0 +276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x199A //RX_TDDRC_HMNC_GAIN +279 0x0001 //RX_TDDRC_SMT_FLAG +280 0x0CCD //RX_TDDRC_SMT_W +281 0x0439 //RX_TDDRC_DRC_GAIN +195 0x0020 //RX_FDEQ_SUBNUM +196 0x4848 //RX_FDEQ_GAIN_0 +197 0x4040 //RX_FDEQ_GAIN_1 +198 0x3838 //RX_FDEQ_GAIN_2 +199 0x3448 //RX_FDEQ_GAIN_3 +200 0x343C //RX_FDEQ_GAIN_4 +201 0x4040 //RX_FDEQ_GAIN_5 +202 0x4048 //RX_FDEQ_GAIN_6 +203 0x384C //RX_FDEQ_GAIN_7 +204 0x4C54 //RX_FDEQ_GAIN_8 +205 0x5C54 //RX_FDEQ_GAIN_9 +206 0x4E38 //RX_FDEQ_GAIN_10 +207 0x303C //RX_FDEQ_GAIN_11 +208 0x5450 //RX_FDEQ_GAIN_12 +209 0x4860 //RX_FDEQ_GAIN_13 +210 0x6060 //RX_FDEQ_GAIN_14 +211 0x6060 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0202 //RX_FDEQ_BIN_0 +221 0x0203 //RX_FDEQ_BIN_1 +222 0x0303 //RX_FDEQ_BIN_2 +223 0x0402 //RX_FDEQ_BIN_3 +224 0x0504 //RX_FDEQ_BIN_4 +225 0x0209 //RX_FDEQ_BIN_5 +226 0x0808 //RX_FDEQ_BIN_6 +227 0x090A //RX_FDEQ_BIN_7 +228 0x0B0C //RX_FDEQ_BIN_8 +229 0x0D0E //RX_FDEQ_BIN_9 +230 0x1013 //RX_FDEQ_BIN_10 +231 0x1719 //RX_FDEQ_BIN_11 +232 0x1B1E //RX_FDEQ_BIN_12 +233 0x1E1E //RX_FDEQ_BIN_13 +234 0x1E28 //RX_FDEQ_BIN_14 +235 0x282C //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x4000 //RX_FDEQ_RESRV_0 +245 0x0320 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0030 //RX_FDDRC_BAND_MARGIN_1 +248 0x0050 //RX_FDDRC_BAND_MARGIN_2 +249 0x0080 //RX_FDDRC_BAND_MARGIN_3 +250 0x0004 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x2000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x2000 //RX_FDDRC_THRD_3_2 +258 0x5000 //RX_FDDRC_THRD_3_3 +259 0x4000 //RX_FDDRC_SLANT_0_0 +260 0x4000 //RX_FDDRC_SLANT_0_1 +261 0x4000 //RX_FDDRC_SLANT_0_2 +262 0x4000 //RX_FDDRC_SLANT_0_3 +263 0x7FFF //RX_FDDRC_SLANT_1_0 +264 0x7FFF //RX_FDDRC_SLANT_1_1 +265 0x7FFF //RX_FDDRC_SLANT_1_2 +266 0x7FFF //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +286 0x0035 //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 +#VOL 4 +163 0x4000 //RX_TDDRC_ALPHA_UP_1 +164 0x4000 //RX_TDDRC_ALPHA_UP_2 +165 0x4000 //RX_TDDRC_ALPHA_UP_3 +166 0x4000 //RX_TDDRC_ALPHA_UP_4 +184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +185 0x4000 //RX_TDDRC_ALPHA_DWN_2 +186 0x4000 //RX_TDDRC_ALPHA_DWN_3 +189 0x4000 //RX_TDDRC_ALPHA_DWN_4 +190 0x7214 //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +269 0x0001 //RX_TDDRC_THRD_0 +270 0x0002 //RX_TDDRC_THRD_1 +271 0x1800 //RX_TDDRC_THRD_2 +272 0x1800 //RX_TDDRC_THRD_3 +273 0x7FFF //RX_TDDRC_SLANT_0 +274 0x7FFF //RX_TDDRC_SLANT_1 +275 0x4000 //RX_TDDRC_ALPHA_UP_0 +276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x199A //RX_TDDRC_HMNC_GAIN +279 0x0001 //RX_TDDRC_SMT_FLAG +280 0x0CCD //RX_TDDRC_SMT_W +281 0x0439 //RX_TDDRC_DRC_GAIN +195 0x0020 //RX_FDEQ_SUBNUM +196 0x4848 //RX_FDEQ_GAIN_0 +197 0x4040 //RX_FDEQ_GAIN_1 +198 0x3838 //RX_FDEQ_GAIN_2 +199 0x3448 //RX_FDEQ_GAIN_3 +200 0x343C //RX_FDEQ_GAIN_4 +201 0x4040 //RX_FDEQ_GAIN_5 +202 0x4048 //RX_FDEQ_GAIN_6 +203 0x384C //RX_FDEQ_GAIN_7 +204 0x4C54 //RX_FDEQ_GAIN_8 +205 0x5C54 //RX_FDEQ_GAIN_9 +206 0x4E38 //RX_FDEQ_GAIN_10 +207 0x303C //RX_FDEQ_GAIN_11 +208 0x5450 //RX_FDEQ_GAIN_12 +209 0x4860 //RX_FDEQ_GAIN_13 +210 0x6060 //RX_FDEQ_GAIN_14 +211 0x6060 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0202 //RX_FDEQ_BIN_0 +221 0x0203 //RX_FDEQ_BIN_1 +222 0x0303 //RX_FDEQ_BIN_2 +223 0x0402 //RX_FDEQ_BIN_3 +224 0x0504 //RX_FDEQ_BIN_4 +225 0x0209 //RX_FDEQ_BIN_5 +226 0x0808 //RX_FDEQ_BIN_6 +227 0x090A //RX_FDEQ_BIN_7 +228 0x0B0C //RX_FDEQ_BIN_8 +229 0x0D0E //RX_FDEQ_BIN_9 +230 0x1013 //RX_FDEQ_BIN_10 +231 0x1719 //RX_FDEQ_BIN_11 +232 0x1B1E //RX_FDEQ_BIN_12 +233 0x1E1E //RX_FDEQ_BIN_13 +234 0x1E28 //RX_FDEQ_BIN_14 +235 0x282C //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x4000 //RX_FDEQ_RESRV_0 +245 0x0320 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0030 //RX_FDDRC_BAND_MARGIN_1 +248 0x0050 //RX_FDDRC_BAND_MARGIN_2 +249 0x0080 //RX_FDDRC_BAND_MARGIN_3 +250 0x0004 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x2000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x2000 //RX_FDDRC_THRD_3_2 +258 0x5000 //RX_FDDRC_THRD_3_3 +259 0x4000 //RX_FDDRC_SLANT_0_0 +260 0x4000 //RX_FDDRC_SLANT_0_1 +261 0x4000 //RX_FDDRC_SLANT_0_2 +262 0x4000 //RX_FDDRC_SLANT_0_3 +263 0x7FFF //RX_FDDRC_SLANT_1_0 +264 0x7FFF //RX_FDDRC_SLANT_1_1 +265 0x7FFF //RX_FDDRC_SLANT_1_2 +266 0x7FFF //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +286 0x004D //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 +#VOL 5 +163 0x4000 //RX_TDDRC_ALPHA_UP_1 +164 0x4000 //RX_TDDRC_ALPHA_UP_2 +165 0x4000 //RX_TDDRC_ALPHA_UP_3 +166 0x4000 //RX_TDDRC_ALPHA_UP_4 +184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +185 0x4000 //RX_TDDRC_ALPHA_DWN_2 +186 0x4000 //RX_TDDRC_ALPHA_DWN_3 +189 0x4000 //RX_TDDRC_ALPHA_DWN_4 +190 0x7214 //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +269 0x0001 //RX_TDDRC_THRD_0 +270 0x0002 //RX_TDDRC_THRD_1 +271 0x1800 //RX_TDDRC_THRD_2 +272 0x1800 //RX_TDDRC_THRD_3 +273 0x7FFF //RX_TDDRC_SLANT_0 +274 0x7FFF //RX_TDDRC_SLANT_1 +275 0x4000 //RX_TDDRC_ALPHA_UP_0 +276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x199A //RX_TDDRC_HMNC_GAIN +279 0x0001 //RX_TDDRC_SMT_FLAG +280 0x0CCD //RX_TDDRC_SMT_W +281 0x0439 //RX_TDDRC_DRC_GAIN +195 0x0020 //RX_FDEQ_SUBNUM +196 0x4848 //RX_FDEQ_GAIN_0 +197 0x4040 //RX_FDEQ_GAIN_1 +198 0x3838 //RX_FDEQ_GAIN_2 +199 0x3448 //RX_FDEQ_GAIN_3 +200 0x343C //RX_FDEQ_GAIN_4 +201 0x4040 //RX_FDEQ_GAIN_5 +202 0x4048 //RX_FDEQ_GAIN_6 +203 0x384C //RX_FDEQ_GAIN_7 +204 0x4C54 //RX_FDEQ_GAIN_8 +205 0x5C54 //RX_FDEQ_GAIN_9 +206 0x4E38 //RX_FDEQ_GAIN_10 +207 0x303C //RX_FDEQ_GAIN_11 +208 0x5450 //RX_FDEQ_GAIN_12 +209 0x4860 //RX_FDEQ_GAIN_13 +210 0x6060 //RX_FDEQ_GAIN_14 +211 0x6060 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0202 //RX_FDEQ_BIN_0 +221 0x0203 //RX_FDEQ_BIN_1 +222 0x0303 //RX_FDEQ_BIN_2 +223 0x0402 //RX_FDEQ_BIN_3 +224 0x0504 //RX_FDEQ_BIN_4 +225 0x0209 //RX_FDEQ_BIN_5 +226 0x0808 //RX_FDEQ_BIN_6 +227 0x090A //RX_FDEQ_BIN_7 +228 0x0B0C //RX_FDEQ_BIN_8 +229 0x0D0E //RX_FDEQ_BIN_9 +230 0x1013 //RX_FDEQ_BIN_10 +231 0x1719 //RX_FDEQ_BIN_11 +232 0x1B1E //RX_FDEQ_BIN_12 +233 0x1E1E //RX_FDEQ_BIN_13 +234 0x1E28 //RX_FDEQ_BIN_14 +235 0x282C //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x4000 //RX_FDEQ_RESRV_0 +245 0x0320 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0030 //RX_FDDRC_BAND_MARGIN_1 +248 0x0050 //RX_FDDRC_BAND_MARGIN_2 +249 0x0080 //RX_FDDRC_BAND_MARGIN_3 +250 0x0004 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x2000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x2000 //RX_FDDRC_THRD_3_2 +258 0x5000 //RX_FDDRC_THRD_3_3 +259 0x4000 //RX_FDDRC_SLANT_0_0 +260 0x4000 //RX_FDDRC_SLANT_0_1 +261 0x4000 //RX_FDDRC_SLANT_0_2 +262 0x4000 //RX_FDDRC_SLANT_0_3 +263 0x7FFF //RX_FDDRC_SLANT_1_0 +264 0x7FFF //RX_FDDRC_SLANT_1_1 +265 0x7FFF //RX_FDDRC_SLANT_1_2 +266 0x7FFF //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +286 0x0074 //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 +#VOL 6 +163 0x4000 //RX_TDDRC_ALPHA_UP_1 +164 0x4000 //RX_TDDRC_ALPHA_UP_2 +165 0x4000 //RX_TDDRC_ALPHA_UP_3 +166 0x4000 //RX_TDDRC_ALPHA_UP_4 +184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +185 0x4000 //RX_TDDRC_ALPHA_DWN_2 +186 0x4000 //RX_TDDRC_ALPHA_DWN_3 +189 0x4000 //RX_TDDRC_ALPHA_DWN_4 +190 0x7214 //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +269 0x0001 //RX_TDDRC_THRD_0 +270 0x0002 //RX_TDDRC_THRD_1 +271 0x1800 //RX_TDDRC_THRD_2 +272 0x1800 //RX_TDDRC_THRD_3 +273 0x7FFF //RX_TDDRC_SLANT_0 +274 0x7FFF //RX_TDDRC_SLANT_1 +275 0x4000 //RX_TDDRC_ALPHA_UP_0 +276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x199A //RX_TDDRC_HMNC_GAIN +279 0x0001 //RX_TDDRC_SMT_FLAG +280 0x0CCD //RX_TDDRC_SMT_W +281 0x0439 //RX_TDDRC_DRC_GAIN +195 0x0020 //RX_FDEQ_SUBNUM +196 0x4848 //RX_FDEQ_GAIN_0 +197 0x4040 //RX_FDEQ_GAIN_1 +198 0x3838 //RX_FDEQ_GAIN_2 +199 0x3448 //RX_FDEQ_GAIN_3 +200 0x343C //RX_FDEQ_GAIN_4 +201 0x4040 //RX_FDEQ_GAIN_5 +202 0x4048 //RX_FDEQ_GAIN_6 +203 0x384C //RX_FDEQ_GAIN_7 +204 0x4C54 //RX_FDEQ_GAIN_8 +205 0x5C54 //RX_FDEQ_GAIN_9 +206 0x4E38 //RX_FDEQ_GAIN_10 +207 0x303C //RX_FDEQ_GAIN_11 +208 0x5450 //RX_FDEQ_GAIN_12 +209 0x4860 //RX_FDEQ_GAIN_13 +210 0x6060 //RX_FDEQ_GAIN_14 +211 0x6060 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0202 //RX_FDEQ_BIN_0 +221 0x0203 //RX_FDEQ_BIN_1 +222 0x0303 //RX_FDEQ_BIN_2 +223 0x0402 //RX_FDEQ_BIN_3 +224 0x0504 //RX_FDEQ_BIN_4 +225 0x0209 //RX_FDEQ_BIN_5 +226 0x0808 //RX_FDEQ_BIN_6 +227 0x090A //RX_FDEQ_BIN_7 +228 0x0B0C //RX_FDEQ_BIN_8 +229 0x0D0E //RX_FDEQ_BIN_9 +230 0x1013 //RX_FDEQ_BIN_10 +231 0x1719 //RX_FDEQ_BIN_11 +232 0x1B1E //RX_FDEQ_BIN_12 +233 0x1E1E //RX_FDEQ_BIN_13 +234 0x1E28 //RX_FDEQ_BIN_14 +235 0x282C //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x4000 //RX_FDEQ_RESRV_0 +245 0x0320 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0030 //RX_FDDRC_BAND_MARGIN_1 +248 0x0050 //RX_FDDRC_BAND_MARGIN_2 +249 0x0080 //RX_FDDRC_BAND_MARGIN_3 +250 0x0004 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x2000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x2000 //RX_FDDRC_THRD_3_2 +258 0x5000 //RX_FDDRC_THRD_3_3 +259 0x4000 //RX_FDDRC_SLANT_0_0 +260 0x4000 //RX_FDDRC_SLANT_0_1 +261 0x4000 //RX_FDDRC_SLANT_0_2 +262 0x4000 //RX_FDDRC_SLANT_0_3 +263 0x7FFF //RX_FDDRC_SLANT_1_0 +264 0x7FFF //RX_FDDRC_SLANT_1_1 +265 0x7FFF //RX_FDDRC_SLANT_1_2 +266 0x7FFF //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +286 0x0100 //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 #CASE_NAME HEADSET-TTY_VCO-VOICE_GENERIC-NB -#PARAM_MODE FULL -#PARAM_TYPE TX+RX -#TOTAL_CUSTOM_STEP 7 +#PARAM_MODE Full +#PARAM_TYPE TX+2RX +#TOTAL_CUSTOM_STEP 7+7 #TX 0 0x0001 //TX_OPERATION_MODE_0 1 0x0001 //TX_OPERATION_MODE_1 2 0x0033 //TX_PATCH_REG -3 0x2F7C //TX_SENDFUNC_MODE_0 +3 0x6F7C //TX_SENDFUNC_MODE_0 4 0x0001 //TX_SENDFUNC_MODE_1 -5 0x0003 //TX_NUM_MIC +5 0x0002 //TX_NUM_MIC 6 0x0000 //TX_SAMPLINGFREQ_SIG 7 0x0000 //TX_SAMPLINGFREQ_PROC 8 0x000A //TX_FRAME_SZ_SIG @@ -42125,8 +64109,8 @@ 18 0x0000 //TX_SYS_RESRV_2 19 0x0000 //TX_SYS_RESRV_3 20 0x0000 //TX_DIST2REF0 -21 0x00A4 //TX_DIST2REF1 -22 0x0017 //TX_DIST2REF_02 +21 0x009D //TX_DIST2REF1 +22 0x0010 //TX_DIST2REF_02 23 0x0000 //TX_DIST2REF_03 24 0x0000 //TX_DIST2REF_04 25 0x0000 //TX_DIST2REF_05 @@ -42232,7 +64216,7 @@ 125 0x6000 //TX_C_POST_FLT_MIC_MAINBLK 126 0x6000 //TX_C_POST_FLT_MIC_REFBLK 127 0x0010 //TX_MIC_BLOCK_N -128 0x7652 //TX_A_HP +128 0x7646 //TX_A_HP 129 0x4000 //TX_B_PE 130 0x5000 //TX_THR_PITCH_DET_0 131 0x4800 //TX_THR_PITCH_DET_1 @@ -42271,7 +64255,7 @@ 164 0x7FFF //TX_MIN_EQ_RE_EST_12 165 0x2000 //TX_LAMBDA_RE_EST 166 0x0000 //TX_LAMBDA_CB_NLE -167 0x7FFF //TX_C_POST_FLT +167 0x4000 //TX_C_POST_FLT 168 0x2000 //TX_GAIN_NP 169 0x0180 //TX_SE_HOLD_N 170 0x00C8 //TX_DT_HOLD_N @@ -42301,14 +64285,14 @@ 194 0x0000 //TX_NORMENERTH 195 0x0000 //TX_NORMENERHIGHTH 196 0x0000 //TX_NORMENERHIGHTHL -197 0x6590 //TX_DTD_THR1_0 -198 0x6590 //TX_DTD_THR1_1 -199 0x6590 //TX_DTD_THR1_2 +197 0x7FF0 //TX_DTD_THR1_0 +198 0x7FF0 //TX_DTD_THR1_1 +199 0x7FF0 //TX_DTD_THR1_2 200 0x7FF0 //TX_DTD_THR1_3 201 0x7FF0 //TX_DTD_THR1_4 202 0x7FF0 //TX_DTD_THR1_5 203 0x7FF0 //TX_DTD_THR1_6 -204 0x0CCD //TX_DTD_THR2_0 +204 0x7E00 //TX_DTD_THR2_0 205 0x0CCD //TX_DTD_THR2_1 206 0x0CCD //TX_DTD_THR2_2 207 0x0CCD //TX_DTD_THR2_3 @@ -42317,7 +64301,7 @@ 210 0x0CCD //TX_DTD_THR2_6 211 0x7FFF //TX_DTD_THR3 212 0x0000 //TX_SPK_CUT_K -213 0x157C //TX_DT_CUT_K +213 0x1F40 //TX_DT_CUT_K 214 0x0100 //TX_DT_CUT_THR 215 0x04EB //TX_COMFORT_G 216 0x01F4 //TX_POWER_YOUT_TH @@ -42327,18 +64311,18 @@ 220 0x0000 //TX_DTD_MIC_BLK 221 0x1000 //TX_ADPT_STRICT_L 222 0x1000 //TX_ADPT_STRICT_H -223 0x0BB8 //TX_RATIO_DT_L_TH_LOW +223 0x0001 //TX_RATIO_DT_L_TH_LOW 224 0x3A98 //TX_RATIO_DT_H_TH_LOW -225 0x1770 //TX_RATIO_DT_L_TH_HIGH +225 0x0640 //TX_RATIO_DT_L_TH_HIGH 226 0x4E20 //TX_RATIO_DT_H_TH_HIGH -227 0x09C4 //TX_RATIO_DT_L0_TH -228 0x0800 //TX_B_POST_FILT_ECHO_L +227 0x0001 //TX_RATIO_DT_L0_TH +228 0x7FFF //TX_B_POST_FILT_ECHO_L 229 0x2000 //TX_B_POST_FILT_ECHO_H 230 0x0200 //TX_MIN_G_CTRL_ECHO 231 0x1000 //TX_B_LESSCUT_RTO_ECHO 232 0x0000 //TX_EPD_OFFSET_00 233 0x0000 //TX_EPD_OFFST_01 -234 0x1388 //TX_RATIO_DT_L0_TH_HIGH +234 0x05DC //TX_RATIO_DT_L0_TH_HIGH 235 0x3A98 //TX_RATIO_DT_H_TH_CUT 236 0x7FFF //TX_MIN_EQ_RE_EST_13 237 0x0000 //TX_DTD_THR1_7 @@ -42346,7 +64330,7 @@ 239 0x0800 //TX_DT_RESRV_7 240 0x0800 //TX_DT_RESRV_8 241 0x0000 //TX_DT_RESRV_9 -242 0xF800 //TX_THR_SN_EST_0 +242 0xFA00 //TX_THR_SN_EST_0 243 0xFA00 //TX_THR_SN_EST_1 244 0xFA00 //TX_THR_SN_EST_2 245 0xF900 //TX_THR_SN_EST_3 @@ -42355,12 +64339,12 @@ 248 0xF800 //TX_THR_SN_EST_6 249 0xF800 //TX_THR_SN_EST_7 250 0x0050 //TX_DELTA_THR_SN_EST_0 -251 0x01A0 //TX_DELTA_THR_SN_EST_1 +251 0x0200 //TX_DELTA_THR_SN_EST_1 252 0x0200 //TX_DELTA_THR_SN_EST_2 -253 0x0200 //TX_DELTA_THR_SN_EST_3 -254 0x0100 //TX_DELTA_THR_SN_EST_4 +253 0x0100 //TX_DELTA_THR_SN_EST_3 +254 0x0200 //TX_DELTA_THR_SN_EST_4 255 0x0200 //TX_DELTA_THR_SN_EST_5 -256 0x0200 //TX_DELTA_THR_SN_EST_6 +256 0x01A0 //TX_DELTA_THR_SN_EST_6 257 0x0200 //TX_DELTA_THR_SN_EST_7 258 0x4000 //TX_LAMBDA_NN_EST_0 259 0x4000 //TX_LAMBDA_NN_EST_1 @@ -42387,28 +64371,28 @@ 280 0x1000 //TX_B_POST_FLT_1 281 0x0010 //TX_NS_LVL_CTRL_0 282 0x0012 //TX_NS_LVL_CTRL_1 -283 0x0017 //TX_NS_LVL_CTRL_2 -284 0x0015 //TX_NS_LVL_CTRL_3 +283 0x0015 //TX_NS_LVL_CTRL_2 +284 0x0012 //TX_NS_LVL_CTRL_3 285 0x0012 //TX_NS_LVL_CTRL_4 -286 0x0012 //TX_NS_LVL_CTRL_5 -287 0x0011 //TX_NS_LVL_CTRL_6 +286 0x0011 //TX_NS_LVL_CTRL_5 +287 0x0012 //TX_NS_LVL_CTRL_6 288 0x0011 //TX_NS_LVL_CTRL_7 289 0x000F //TX_MIN_GAIN_S_0 -290 0x000F //TX_MIN_GAIN_S_1 -291 0x000D //TX_MIN_GAIN_S_2 +290 0x000D //TX_MIN_GAIN_S_1 +291 0x000F //TX_MIN_GAIN_S_2 292 0x000F //TX_MIN_GAIN_S_3 293 0x000F //TX_MIN_GAIN_S_4 -294 0x000F //TX_MIN_GAIN_S_5 -295 0x0010 //TX_MIN_GAIN_S_6 +294 0x0010 //TX_MIN_GAIN_S_5 +295 0x000F //TX_MIN_GAIN_S_6 296 0x000F //TX_MIN_GAIN_S_7 297 0x4000 //TX_NMOS_SUP 298 0x0000 //TX_NS_MAX_PRI_SNR_TH 299 0x0000 //TX_NMOS_SUP_MENSA 300 0x7FFF //TX_SNRI_SUP_0 -301 0x4000 //TX_SNRI_SUP_1 -302 0x1000 //TX_SNRI_SUP_2 -303 0x4000 //TX_SNRI_SUP_3 -304 0x2400 //TX_SNRI_SUP_4 +301 0x3000 //TX_SNRI_SUP_1 +302 0x4000 //TX_SNRI_SUP_2 +303 0x2400 //TX_SNRI_SUP_3 +304 0x4000 //TX_SNRI_SUP_4 305 0x4000 //TX_SNRI_SUP_5 306 0x4000 //TX_SNRI_SUP_6 307 0x7FFF //TX_SNRI_SUP_7 @@ -42419,19 +64403,19 @@ 312 0x7FFF //TX_A_POST_FILT_0 313 0x2000 //TX_A_POST_FILT_1 314 0x4000 //TX_A_POST_FILT_S_0 -315 0x5000 //TX_A_POST_FILT_S_1 -316 0x2000 //TX_A_POST_FILT_S_2 -317 0x4000 //TX_A_POST_FILT_S_3 -318 0x1000 //TX_A_POST_FILT_S_4 -319 0x3000 //TX_A_POST_FILT_S_5 +315 0x2000 //TX_A_POST_FILT_S_1 +316 0x4000 //TX_A_POST_FILT_S_2 +317 0x1000 //TX_A_POST_FILT_S_3 +318 0x3000 //TX_A_POST_FILT_S_4 +319 0x5000 //TX_A_POST_FILT_S_5 320 0x5000 //TX_A_POST_FILT_S_6 321 0x7000 //TX_A_POST_FILT_S_7 322 0x1000 //TX_B_POST_FILT_0 323 0x1000 //TX_B_POST_FILT_1 324 0x1000 //TX_B_POST_FILT_2 -325 0x1000 //TX_B_POST_FILT_3 -326 0x5000 //TX_B_POST_FILT_4 -327 0x3000 //TX_B_POST_FILT_5 +325 0x5000 //TX_B_POST_FILT_3 +326 0x3000 //TX_B_POST_FILT_4 +327 0x1000 //TX_B_POST_FILT_5 328 0x1000 //TX_B_POST_FILT_6 329 0x2000 //TX_B_POST_FILT_7 330 0x4000 //TX_B_LESSCUT_RTO_S_0 @@ -42444,12 +64428,12 @@ 337 0x7FFF //TX_B_LESSCUT_RTO_S_7 338 0x7E00 //TX_LAMBDA_PFILT 339 0x7D00 //TX_LAMBDA_PFILT_S_0 -340 0x7900 //TX_LAMBDA_PFILT_S_1 -341 0x7400 //TX_LAMBDA_PFILT_S_2 -342 0x7900 //TX_LAMBDA_PFILT_S_3 -343 0x7000 //TX_LAMBDA_PFILT_S_4 +340 0x7C00 //TX_LAMBDA_PFILT_S_1 +341 0x7900 //TX_LAMBDA_PFILT_S_2 +342 0x7000 //TX_LAMBDA_PFILT_S_3 +343 0x7D00 //TX_LAMBDA_PFILT_S_4 344 0x7D00 //TX_LAMBDA_PFILT_S_5 -345 0x7D00 //TX_LAMBDA_PFILT_S_6 +345 0x7900 //TX_LAMBDA_PFILT_S_6 346 0x7D00 //TX_LAMBDA_PFILT_S_7 347 0x0200 //TX_K_PEPPER 348 0x0800 //TX_A_PEPPER @@ -42458,20 +64442,20 @@ 351 0x0001 //TX_HMNC_BST_FLG 352 0x0200 //TX_HMNC_BST_THR 353 0x0800 //TX_DT_BINVAD_TH_0 -354 0x0800 //TX_DT_BINVAD_TH_1 -355 0x0800 //TX_DT_BINVAD_TH_2 +354 0x0100 //TX_DT_BINVAD_TH_1 +355 0x0100 //TX_DT_BINVAD_TH_2 356 0x0800 //TX_DT_BINVAD_TH_3 357 0x0FA0 //TX_DT_BINVAD_ENDF -358 0x0400 //TX_C_POST_FLT_DT +358 0x7000 //TX_C_POST_FLT_DT 359 0x4000 //TX_NS_B_POST_FLT_LESSCUT -360 0x0100 //TX_DT_BOOST +360 0x01B0 //TX_DT_BOOST 361 0x0000 //TX_BF_SGRAD_FLG 362 0x0005 //TX_BF_DVG_TH 363 0x001E //TX_SN_C_F 364 0x0000 //TX_K_APT 365 0x0001 //TX_NOISEDET 366 0x0064 //TX_NDETCT -367 0x0050 //TX_NOISE_TH_0 +367 0x003B //TX_NOISE_TH_0 368 0x7FFF //TX_NOISE_TH_0_2 369 0x7FFF //TX_NOISE_TH_0_3 370 0x07D0 //TX_NOISE_TH_1 @@ -42483,11 +64467,11 @@ 376 0x0000 //TX_NOISE_TH_5_3 377 0x7FFF //TX_NOISE_TH_5_4 378 0x0FA0 //TX_NOISE_TH_6 -379 0x000A //TX_MINENOISE_TH -380 0x4000 //TX_MINENOISE_MIC0_TH_MTS -381 0xFFEE //TX_MINENOISE_MIC0_TH_EXP -382 0x6000 //TX_MINENOISE_MIC0_S_TH_MTS -383 0xFFF3 //TX_MINENOISE_MIC0_S_TH_EXP +379 0x00C8 //TX_MINENOISE_TH +380 0xD508 //TX_MORENS_TFMASK_TH +381 0x0001 //TX_DRC_QUIET_FLOOR +382 0x3A98 //TX_RATIODTL_CUT_TH +383 0x0DAC //TX_DT_CUT_K1 384 0x0666 //TX_OUT_ENER_S_TH_CLEAN 385 0x0666 //TX_OUT_ENER_S_TH_LESSCLEAN 386 0x0333 //TX_OUT_ENER_S_TH_NOISY @@ -42495,22 +64479,22 @@ 388 0x1000 //TX_OUT_ENER_TH_SPEECH 389 0x2000 //TX_SN_NPB_GAIN 390 0x0000 //TX_NN_NPB_GAIN -391 0x0000 //TX_CSX_ALPHA_0 -392 0x0000 //TX_CSX_ALPHA_1 -393 0x0000 //TX_CSX_ALPHA_2 -394 0x0000 //TX_CSX_ALPHA_3 -395 0x0800 //TX_MU_ARSP_EST -396 0x00C8 //TX_P_OUTBEAM_MIN_TH +391 0x7FFF //TX_POST_MASK_SUP_HSNE +392 0x1388 //TX_TAIL_DET_TH +393 0x4000 //TX_B_LESSCUT_RTO_WTA +394 0x0000 //TX_MEL_G_R +395 0x0080 //TX_SUPHIGH_TH +396 0x0000 //TX_MASK_G_R 397 0x0002 //TX_EXTRA_NS_L -398 0x0800 //TX_EXTRA_NS_A -399 0x0005 //TX_VR_NOISE_FLOOR_TH +398 0x1800 //TX_C_POST_FLT_MASK +399 0x7FFF //TX_A_POST_FLT_WNS 400 0x0148 //TX_MIN_G_LOW300HZ -401 0x0001 //TX_MAXLEVEL_CNG +401 0x0004 //TX_MAXLEVEL_CNG 402 0x00B4 //TX_STN_NOISE_TH 403 0x4000 //TX_POST_MASK_SUP 404 0x7FFF //TX_POST_MASK_ADJUST 405 0x00C8 //TX_NS_ENOISE_MIC0_TH -406 0x000A //TX_MINENOISE_MIC0_TH +406 0x0032 //TX_MINENOISE_MIC0_TH 407 0x012C //TX_MINENOISE_MIC0_S_TH 408 0x7FFF //TX_MIN_G_CTRL_SSNS 409 0x0000 //TX_METAL_RTO_THR @@ -42618,16 +64602,16 @@ 511 0x6666 //TX_MIC_TO_BFGAIN 512 0x0000 //TX_MICTOBFGAIN0 513 0x0000 //TX_FASTMUE_TH -514 0x0000 //TX_DERVB_LEN_0 -515 0x0000 //TX_DERVB_LEN_1 -516 0x0000 //TX_RHO_DERVB -517 0x0000 //TX_MIC_INDX_DERVB -518 0x0000 //TX_MU_DERVB -519 0x0000 //TX_DR_RESRV_0 -520 0x0000 //TX_DR_RESRV_1 -521 0x0000 //TX_DR_RESRV_2 -522 0x0000 //TX_DR_RESRV_3 -523 0x0000 //TX_DR_RESRV_4 +514 0xC000 //TX_DEREVERB_LF_MU +515 0xC000 //TX_DEREVERB_HF_MU +516 0xCCCC //TX_DEREVERB_DELAY +517 0xD999 //TX_DEREVERB_COEF_LEN +518 0x1F40 //TX_DEREVERB_DNR +519 0x0000 //TX_DEREVERB_ALPHA +520 0x0000 //TX_DEREVERB_BETA +521 0x0000 //TX_GSC_RTOL_TH +522 0x7000 //TX_GSC_RTOH_TH +523 0x0064 //TX_WIDE2_MEANHTH 524 0x0000 //TX_DR_RESRV_5 525 0x0000 //TX_DR_RESRV_6 526 0x0000 //TX_DR_RESRV_7 @@ -42671,16 +64655,16 @@ 564 0x0000 //TX_PB_RESRV_0 565 0x0000 //TX_PB_RESRV_1 566 0x0014 //TX_FDEQ_SUBNUM -567 0x5858 //TX_FDEQ_GAIN_0 -568 0x5850 //TX_FDEQ_GAIN_1 -569 0x5050 //TX_FDEQ_GAIN_2 -570 0x5048 //TX_FDEQ_GAIN_3 -571 0x3C48 //TX_FDEQ_GAIN_4 -572 0x3C48 //TX_FDEQ_GAIN_5 -573 0x4848 //TX_FDEQ_GAIN_6 -574 0x4842 //TX_FDEQ_GAIN_7 -575 0x3030 //TX_FDEQ_GAIN_8 -576 0x3030 //TX_FDEQ_GAIN_9 +567 0x5050 //TX_FDEQ_GAIN_0 +568 0x5048 //TX_FDEQ_GAIN_1 +569 0x4848 //TX_FDEQ_GAIN_2 +570 0x483C //TX_FDEQ_GAIN_3 +571 0x3034 //TX_FDEQ_GAIN_4 +572 0x3048 //TX_FDEQ_GAIN_5 +573 0x4840 //TX_FDEQ_GAIN_6 +574 0x403C //TX_FDEQ_GAIN_7 +575 0x262C //TX_FDEQ_GAIN_8 +576 0x3A3C //TX_FDEQ_GAIN_9 577 0x4848 //TX_FDEQ_GAIN_10 578 0x4848 //TX_FDEQ_GAIN_11 579 0x4848 //TX_FDEQ_GAIN_12 @@ -42704,7 +64688,7 @@ 597 0x0708 //TX_FDEQ_BIN_6 598 0x090A //TX_FDEQ_BIN_7 599 0x0B0C //TX_FDEQ_BIN_8 -600 0x0D08 //TX_FDEQ_BIN_9 +600 0x0D0E //TX_FDEQ_BIN_9 601 0x0000 //TX_FDEQ_BIN_10 602 0x0000 //TX_FDEQ_BIN_11 603 0x0000 //TX_FDEQ_BIN_12 @@ -42728,9 +64712,9 @@ 621 0x4848 //TX_PREEQ_GAIN_MIC0_4 622 0x4848 //TX_PREEQ_GAIN_MIC0_5 623 0x4848 //TX_PREEQ_GAIN_MIC0_6 -624 0x484A //TX_PREEQ_GAIN_MIC0_7 -625 0x4B4E //TX_PREEQ_GAIN_MIC0_8 -626 0x5054 //TX_PREEQ_GAIN_MIC0_9 +624 0x4848 //TX_PREEQ_GAIN_MIC0_7 +625 0x4A4C //TX_PREEQ_GAIN_MIC0_8 +626 0x4E50 //TX_PREEQ_GAIN_MIC0_9 627 0x4848 //TX_PREEQ_GAIN_MIC0_10 628 0x4848 //TX_PREEQ_GAIN_MIC0_11 629 0x4848 //TX_PREEQ_GAIN_MIC0_12 @@ -42754,7 +64738,7 @@ 647 0x0708 //TX_PREEQ_BIN_MIC0_6 648 0x090A //TX_PREEQ_BIN_MIC0_7 649 0x0B0C //TX_PREEQ_BIN_MIC0_8 -650 0x0D08 //TX_PREEQ_BIN_MIC0_9 +650 0x0D0E //TX_PREEQ_BIN_MIC0_9 651 0x0000 //TX_PREEQ_BIN_MIC0_10 652 0x0000 //TX_PREEQ_BIN_MIC0_11 653 0x0000 //TX_PREEQ_BIN_MIC0_12 @@ -42777,9 +64761,9 @@ 670 0x4848 //TX_PREEQ_GAIN_MIC1_4 671 0x4848 //TX_PREEQ_GAIN_MIC1_5 672 0x4848 //TX_PREEQ_GAIN_MIC1_6 -673 0x4848 //TX_PREEQ_GAIN_MIC1_7 -674 0x4848 //TX_PREEQ_GAIN_MIC1_8 -675 0x4848 //TX_PREEQ_GAIN_MIC1_9 +673 0x4846 //TX_PREEQ_GAIN_MIC1_7 +674 0x4544 //TX_PREEQ_GAIN_MIC1_8 +675 0x4241 //TX_PREEQ_GAIN_MIC1_9 676 0x4848 //TX_PREEQ_GAIN_MIC1_10 677 0x4848 //TX_PREEQ_GAIN_MIC1_11 678 0x4848 //TX_PREEQ_GAIN_MIC1_12 @@ -42794,16 +64778,16 @@ 687 0x4848 //TX_PREEQ_GAIN_MIC1_21 688 0x4848 //TX_PREEQ_GAIN_MIC1_22 689 0x4848 //TX_PREEQ_GAIN_MIC1_23 -690 0x251A //TX_PREEQ_BIN_MIC1_0 -691 0x0F0F //TX_PREEQ_BIN_MIC1_1 -692 0x0C08 //TX_PREEQ_BIN_MIC1_2 -693 0x0700 //TX_PREEQ_BIN_MIC1_3 -694 0x0000 //TX_PREEQ_BIN_MIC1_4 -695 0x0000 //TX_PREEQ_BIN_MIC1_5 -696 0x0000 //TX_PREEQ_BIN_MIC1_6 -697 0x0000 //TX_PREEQ_BIN_MIC1_7 -698 0x0000 //TX_PREEQ_BIN_MIC1_8 -699 0x0000 //TX_PREEQ_BIN_MIC1_9 +690 0x0202 //TX_PREEQ_BIN_MIC1_0 +691 0x0203 //TX_PREEQ_BIN_MIC1_1 +692 0x0303 //TX_PREEQ_BIN_MIC1_2 +693 0x0304 //TX_PREEQ_BIN_MIC1_3 +694 0x0405 //TX_PREEQ_BIN_MIC1_4 +695 0x0506 //TX_PREEQ_BIN_MIC1_5 +696 0x0708 //TX_PREEQ_BIN_MIC1_6 +697 0x090A //TX_PREEQ_BIN_MIC1_7 +698 0x0B0C //TX_PREEQ_BIN_MIC1_8 +699 0x0D0E //TX_PREEQ_BIN_MIC1_9 700 0x0000 //TX_PREEQ_BIN_MIC1_10 701 0x0000 //TX_PREEQ_BIN_MIC1_11 702 0x0000 //TX_PREEQ_BIN_MIC1_12 @@ -42843,7 +64827,7 @@ 736 0x4848 //TX_PREEQ_GAIN_MIC2_21 737 0x4848 //TX_PREEQ_GAIN_MIC2_22 738 0x4848 //TX_PREEQ_GAIN_MIC2_23 -739 0x7800 //TX_PREEQ_BIN_MIC2_0 +739 0x0000 //TX_PREEQ_BIN_MIC2_0 740 0x0000 //TX_PREEQ_BIN_MIC2_1 741 0x0000 //TX_PREEQ_BIN_MIC2_2 742 0x0000 //TX_PREEQ_BIN_MIC2_3 @@ -42895,7 +64879,7 @@ 788 0x7EB8 //TX_TDDRC_ALPHA_DWN_02 789 0x7EB8 //TX_TDDRC_ALPHA_DWN_03 790 0x7EB8 //TX_TDDRC_ALPHA_DWN_04 -791 0x7FFF //TX_TDDRC_TD_DRC_LIMIT +791 0x7214 //TX_TDDRC_TD_DRC_LIMIT 792 0x0800 //TX_TDDRC_POST_LIMIT_GAIN 793 0x0000 //TX_TDDRC_RESRV_0 794 0x0000 //TX_TDDRC_RESRV_1 @@ -42962,15 +64946,15 @@ 855 0x0010 //TX_TDDRC_THRD_1 856 0x1800 //TX_TDDRC_THRD_2 857 0x1800 //TX_TDDRC_THRD_3 -858 0x6000 //TX_TDDRC_SLANT_0 -859 0x6000 //TX_TDDRC_SLANT_1 +858 0x7FFF //TX_TDDRC_SLANT_0 +859 0x7FFF //TX_TDDRC_SLANT_1 860 0x4000 //TX_TDDRC_ALPHA_UP_00 861 0x6000 //TX_TDDRC_ALPHA_DWN_00 862 0x0000 //TX_TDDRC_HMNC_FLAG 863 0x199A //TX_TDDRC_HMNC_GAIN 864 0x0000 //TX_TDDRC_SMT_FLAG 865 0x0CCD //TX_TDDRC_SMT_W -866 0x0BE3 //TX_TDDRC_DRC_GAIN +866 0x0A00 //TX_TDDRC_DRC_GAIN 867 0x7FFF //TX_TDDRC_LMT_THRD 868 0x0000 //TX_TDDRC_LMT_ALPHA 869 0x0000 //TX_TFMASKLTH @@ -42995,14 +64979,79 @@ 888 0x0028 //TX_FASTNS_ARSPC_TH 889 0xC000 //TX_FASTNS_MASK5_TH 890 0x4848 //TX_POSTSSA_MIN_G_VR_MASK -891 0x7FFF //TX_A_LESSCUT_RTO_MASK +891 0x4000 //TX_A_LESSCUT_RTO_MASK 892 0x1770 //TX_FASTNS_NOISETH 893 0xC000 //TX_FASTNS_SSA_THLFL 894 0xC000 //TX_FASTNS_SSA_THHFL 895 0xCCCC //TX_FASTNS_SSA_THLFH 896 0xD999 //TX_FASTNS_SSA_THHFH +897 0x2339 //TX_SENDFUNC_REG_MICMUTE +898 0x0021 //TX_SENDFUNC_REG_MICMUTE1 +899 0x02BC //TX_MICMUTE_RATIO_THR +900 0x0140 //TX_MICMUTE_AMP_THR +901 0x0004 //TX_MICMUTE_HPF_IND +902 0x00C0 //TX_MICMUTE_LOG_EYR_TH +903 0x0008 //TX_MICMUTE_CVG_TIME +904 0x0008 //TX_MICMUTE_RELEASE_TIME +905 0x01FE //TX_MIC_VOLUME_MIC0MUTE +906 0x0020 //TX_MICMUTE_EPD_OFFSET_0 +907 0x001E //TX_MICMUTE_FRQ_AEC_L +908 0x7999 //TX_MICMUTE_EAD_THR +909 0x7FFF //TX_MICMUTE_LAMBDA_CB_NLE +910 0x7FFF //TX_MICMUTE_LAMBDA_RE_EST +911 0x4000 //TX_DTD_THR1_MICMUTE_0 +912 0x7000 //TX_DTD_THR1_MICMUTE_1 +913 0x7FFF //TX_DTD_THR1_MICMUTE_2 +914 0x7FFF //TX_DTD_THR1_MICMUTE_3 +915 0x6CCC //TX_DTD_THR2_MICMUTE_0 +916 0x0400 //TX_MICMUTE_MIN_EQ_RE_EST_0 +917 0x0400 //TX_MICMUTE_MIN_EQ_RE_EST_1 +918 0x1000 //TX_MICMUTE_MIN_EQ_RE_EST_2 +919 0x7FFF //TX_MICMUTE_MIN_EQ_RE_EST_3 +920 0x7FFF //TX_MICMUTE_MIN_EQ_RE_EST_4 +921 0x4000 //TX_MICMUTE_C_POST_FLT +922 0x03E8 //TX_MICMUTE_DT_CUT_K +923 0x0001 //TX_MICMUTE_DT_CUT_THR +924 0x03E8 //TX_MICMUTE_DT_CUT_K2 +925 0x0001 //TX_MICMUTE_DT_CUT_THR2 +926 0x0064 //TX_MICMUTE_DT2_HOLD_N +927 0x1000 //TX_MICMUTE_RATIODTH_THCUT +928 0x1000 //TX_MICMUTE_B_POST_FLT_ECHOL +929 0x7FFF //TX_MICMUTE_B_POST_FLT_ECHOH +930 0x0400 //TX_MICMUTE_C_POST_FLT_MASK +931 0x7999 //TX_MICMUTE_RATIODTL_CUT_TH +932 0x0258 //TX_MICMUTE_DT_CUT_K1 +933 0x0800 //TX_MICMUTE_N2_SN_EST +934 0xFC00 //TX_MICMUTE_THR_SN_EST_0 +935 0x001C //TX_MICMUTE_MIN_G_CTRL_0 +936 0x6000 //TX_MICMUTE_A_POST_FILT_S_0 +937 0x7000 //TX_MICMUTE_B_POST_FILT_0 +938 0x2710 //TX_MIC1RUB_AMP_THR +939 0x0010 //TX_MIC1MUTE_RATIO_THR +940 0x0450 //TX_MIC1MUTE_AMP_THR +941 0x0008 //TX_MIC1MUTE_CVG_TIME +942 0x0008 //TX_MIC1MUTE_RELEASE_TIME +943 0x0000 //TX_AMS_RESRV_01 +944 0x0000 //TX_AMS_RESRV_02 +945 0x0000 //TX_AMS_RESRV_03 +946 0x0000 //TX_AMS_RESRV_04 +947 0x0000 //TX_AMS_RESRV_05 +948 0x0000 //TX_AMS_RESRV_06 +949 0x0000 //TX_AMS_RESRV_07 +950 0x0000 //TX_AMS_RESRV_08 +951 0x0000 //TX_AMS_RESRV_09 +952 0x0000 //TX_AMS_RESRV_10 +953 0x0000 //TX_AMS_RESRV_11 +954 0x0000 //TX_AMS_RESRV_12 +955 0x0000 //TX_AMS_RESRV_13 +956 0x0000 //TX_AMS_RESRV_14 +957 0x0000 //TX_AMS_RESRV_15 +958 0x0000 //TX_AMS_RESRV_16 +959 0x0000 //TX_AMS_RESRV_17 +960 0x0000 //TX_AMS_RESRV_18 +961 0x0000 //TX_AMS_RESRV_19 #RX -0 0x0040 //RX_RECVFUNC_MODE_0 +0 0x2040 //RX_RECVFUNC_MODE_0 1 0x0000 //RX_RECVFUNC_MODE_1 2 0x0000 //RX_SAMPLINGFREQ_SIG 3 0x0000 //RX_SAMPLINGFREQ_PROC @@ -43852,18 +65901,869 @@ 110 0x0000 //RX_FDDRC_RESRV_0 129 0x0100 //RX_SPK_VOL 130 0x0000 //RX_VOL_RESRV_0 +#RX 2 +157 0x2040 //RX_RECVFUNC_MODE_0 +158 0x0000 //RX_RECVFUNC_MODE_1 +159 0x0000 //RX_SAMPLINGFREQ_SIG +160 0x0000 //RX_SAMPLINGFREQ_PROC +161 0x000A //RX_FRAME_SZ +162 0x0000 //RX_DELAY_OPT +163 0x3000 //RX_TDDRC_ALPHA_UP_1 +164 0x3000 //RX_TDDRC_ALPHA_UP_2 +165 0x3000 //RX_TDDRC_ALPHA_UP_3 +166 0x3000 //RX_TDDRC_ALPHA_UP_4 +167 0x050D //RX_PGA +168 0x7652 //RX_A_HP +169 0x4000 //RX_B_PE +170 0x7800 //RX_THR_PITCH_DET_0 +171 0x7000 //RX_THR_PITCH_DET_1 +172 0x6000 //RX_THR_PITCH_DET_2 +173 0x0000 //RX_PITCH_BFR_LEN +174 0x0000 //RX_SBD_PITCH_DET +175 0x0000 //RX_PP_RESRV_0 +176 0x0000 //RX_PP_RESRV_1 +177 0xF800 //RX_N_SN_EST +178 0x0000 //RX_N2_SN_EST +179 0x000F //RX_NS_LVL_CTRL +180 0xF800 //RX_THR_SN_EST +181 0x7E00 //RX_LAMBDA_PFILT +182 0x000A //RX_FENS_RESRV_0 +183 0x0000 //RX_FENS_RESRV_1 +184 0x7FB0 //RX_TDDRC_ALPHA_DWN_1 +185 0x7FB0 //RX_TDDRC_ALPHA_DWN_2 +186 0x7FB0 //RX_TDDRC_ALPHA_DWN_3 +187 0x0000 //RX_EXTRA_NS_L +188 0x0000 //RX_EXTRA_NS_A +189 0x7FB0 //RX_TDDRC_ALPHA_DWN_4 +190 0xDA9E //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +192 0x0000 //RX_A_POST_FLT +193 0x0000 //RX_LMT_THRD +194 0x4000 //RX_LMT_ALPHA +195 0x0020 //RX_FDEQ_SUBNUM +196 0x4848 //RX_FDEQ_GAIN_0 +197 0x4848 //RX_FDEQ_GAIN_1 +198 0x4848 //RX_FDEQ_GAIN_2 +199 0x4848 //RX_FDEQ_GAIN_3 +200 0x4848 //RX_FDEQ_GAIN_4 +201 0x4848 //RX_FDEQ_GAIN_5 +202 0x4848 //RX_FDEQ_GAIN_6 +203 0x4848 //RX_FDEQ_GAIN_7 +204 0x4848 //RX_FDEQ_GAIN_8 +205 0x4848 //RX_FDEQ_GAIN_9 +206 0x4848 //RX_FDEQ_GAIN_10 +207 0x4848 //RX_FDEQ_GAIN_11 +208 0x4848 //RX_FDEQ_GAIN_12 +209 0x4848 //RX_FDEQ_GAIN_13 +210 0x4848 //RX_FDEQ_GAIN_14 +211 0x4848 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0000 //RX_FDEQ_BIN_0 +221 0x0000 //RX_FDEQ_BIN_1 +222 0x0000 //RX_FDEQ_BIN_2 +223 0x0000 //RX_FDEQ_BIN_3 +224 0x0000 //RX_FDEQ_BIN_4 +225 0x0000 //RX_FDEQ_BIN_5 +226 0x0000 //RX_FDEQ_BIN_6 +227 0x0000 //RX_FDEQ_BIN_7 +228 0x0000 //RX_FDEQ_BIN_8 +229 0x0000 //RX_FDEQ_BIN_9 +230 0x0000 //RX_FDEQ_BIN_10 +231 0x0000 //RX_FDEQ_BIN_11 +232 0x0000 //RX_FDEQ_BIN_12 +233 0x0000 //RX_FDEQ_BIN_13 +234 0x0000 //RX_FDEQ_BIN_14 +235 0x0000 //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x0000 //RX_FDEQ_RESRV_0 +245 0x0000 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0030 //RX_FDDRC_BAND_MARGIN_1 +248 0x0050 //RX_FDDRC_BAND_MARGIN_2 +249 0x0080 //RX_FDDRC_BAND_MARGIN_3 +250 0x0004 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x5000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x6400 //RX_FDDRC_THRD_3_2 +258 0x6400 //RX_FDDRC_THRD_3_3 +259 0x2000 //RX_FDDRC_SLANT_0_0 +260 0x2000 //RX_FDDRC_SLANT_0_1 +261 0x2000 //RX_FDDRC_SLANT_0_2 +262 0x2000 //RX_FDDRC_SLANT_0_3 +263 0x2000 //RX_FDDRC_SLANT_1_0 +264 0x2000 //RX_FDDRC_SLANT_1_1 +265 0x2000 //RX_FDDRC_SLANT_1_2 +266 0x2000 //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +268 0x0003 //RX_FILTINDX +269 0x0000 //RX_TDDRC_THRD_0 +270 0x0000 //RX_TDDRC_THRD_1 +271 0x0E80 //RX_TDDRC_THRD_2 +272 0x3800 //RX_TDDRC_THRD_3 +273 0x2A00 //RX_TDDRC_SLANT_0 +274 0x6E00 //RX_TDDRC_SLANT_1 +275 0x3000 //RX_TDDRC_ALPHA_UP_0 +276 0x7FB0 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x0000 //RX_TDDRC_HMNC_GAIN +279 0x0000 //RX_TDDRC_SMT_FLAG +280 0x0000 //RX_TDDRC_SMT_W +281 0x0100 //RX_TDDRC_DRC_GAIN +282 0x7C00 //RX_LAMBDA_PKA_FP +283 0x2000 //RX_TPKA_FP +284 0x0080 //RX_MIN_G_FP +285 0x2000 //RX_MAX_G_FP +286 0x0100 //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 +288 0x0010 //RX_MAXLEVEL_CNG +289 0x0000 //RX_BWE_UV_TH +290 0x0000 //RX_BWE_UV_TH2 +291 0x0000 //RX_BWE_UV_TH3 +292 0x0000 //RX_BWE_V_TH +293 0x0000 //RX_BWE_GAIN1_V_TH1 +294 0x0000 //RX_BWE_GAIN1_V_TH2 +295 0x0000 //RX_BWE_UV_EQ +296 0x0000 //RX_BWE_V_EQ +297 0x0000 //RX_BWE_TONE_TH +298 0x0000 //RX_BWE_UV_HOLD_T +299 0x0000 //RX_BWE_GAIN2_ALPHA +300 0x0000 //RX_BWE_GAIN3_ALPHA +301 0x0000 //RX_BWE_CUTOFF +302 0x0000 //RX_BWE_GAINFILL +303 0x0000 //RX_BWE_MAXTH_TONE +304 0x0000 //RX_BWE_EQ_0 +305 0x0000 //RX_BWE_EQ_1 +306 0x0000 //RX_BWE_EQ_2 +307 0x0000 //RX_BWE_EQ_3 +308 0x0000 //RX_BWE_EQ_4 +309 0x0000 //RX_BWE_EQ_5 +310 0x0000 //RX_BWE_EQ_6 +311 0x0000 //RX_BWE_RESRV_0 +312 0x0000 //RX_BWE_RESRV_1 +313 0x0000 //RX_BWE_RESRV_2 +#VOL 0 +163 0x3000 //RX_TDDRC_ALPHA_UP_1 +164 0x3000 //RX_TDDRC_ALPHA_UP_2 +165 0x3000 //RX_TDDRC_ALPHA_UP_3 +166 0x3000 //RX_TDDRC_ALPHA_UP_4 +184 0x7FB0 //RX_TDDRC_ALPHA_DWN_1 +185 0x7FB0 //RX_TDDRC_ALPHA_DWN_2 +186 0x7FB0 //RX_TDDRC_ALPHA_DWN_3 +189 0x7FB0 //RX_TDDRC_ALPHA_DWN_4 +190 0xDA9E //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +269 0x0000 //RX_TDDRC_THRD_0 +270 0x0000 //RX_TDDRC_THRD_1 +271 0x0E80 //RX_TDDRC_THRD_2 +272 0x3800 //RX_TDDRC_THRD_3 +273 0x2A00 //RX_TDDRC_SLANT_0 +274 0x6E00 //RX_TDDRC_SLANT_1 +275 0x3000 //RX_TDDRC_ALPHA_UP_0 +276 0x7FB0 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x0000 //RX_TDDRC_HMNC_GAIN +279 0x0000 //RX_TDDRC_SMT_FLAG +280 0x0000 //RX_TDDRC_SMT_W +281 0x0100 //RX_TDDRC_DRC_GAIN +195 0x0020 //RX_FDEQ_SUBNUM +196 0x4848 //RX_FDEQ_GAIN_0 +197 0x4848 //RX_FDEQ_GAIN_1 +198 0x4848 //RX_FDEQ_GAIN_2 +199 0x4848 //RX_FDEQ_GAIN_3 +200 0x4848 //RX_FDEQ_GAIN_4 +201 0x4848 //RX_FDEQ_GAIN_5 +202 0x4848 //RX_FDEQ_GAIN_6 +203 0x4848 //RX_FDEQ_GAIN_7 +204 0x4848 //RX_FDEQ_GAIN_8 +205 0x4848 //RX_FDEQ_GAIN_9 +206 0x4848 //RX_FDEQ_GAIN_10 +207 0x4848 //RX_FDEQ_GAIN_11 +208 0x4848 //RX_FDEQ_GAIN_12 +209 0x4848 //RX_FDEQ_GAIN_13 +210 0x4848 //RX_FDEQ_GAIN_14 +211 0x4848 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0000 //RX_FDEQ_BIN_0 +221 0x0000 //RX_FDEQ_BIN_1 +222 0x0000 //RX_FDEQ_BIN_2 +223 0x0000 //RX_FDEQ_BIN_3 +224 0x0000 //RX_FDEQ_BIN_4 +225 0x0000 //RX_FDEQ_BIN_5 +226 0x0000 //RX_FDEQ_BIN_6 +227 0x0000 //RX_FDEQ_BIN_7 +228 0x0000 //RX_FDEQ_BIN_8 +229 0x0000 //RX_FDEQ_BIN_9 +230 0x0000 //RX_FDEQ_BIN_10 +231 0x0000 //RX_FDEQ_BIN_11 +232 0x0000 //RX_FDEQ_BIN_12 +233 0x0000 //RX_FDEQ_BIN_13 +234 0x0000 //RX_FDEQ_BIN_14 +235 0x0000 //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x0000 //RX_FDEQ_RESRV_0 +245 0x0000 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0030 //RX_FDDRC_BAND_MARGIN_1 +248 0x0050 //RX_FDDRC_BAND_MARGIN_2 +249 0x0080 //RX_FDDRC_BAND_MARGIN_3 +250 0x0004 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x5000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x6400 //RX_FDDRC_THRD_3_2 +258 0x6400 //RX_FDDRC_THRD_3_3 +259 0x2000 //RX_FDDRC_SLANT_0_0 +260 0x2000 //RX_FDDRC_SLANT_0_1 +261 0x2000 //RX_FDDRC_SLANT_0_2 +262 0x2000 //RX_FDDRC_SLANT_0_3 +263 0x2000 //RX_FDDRC_SLANT_1_0 +264 0x2000 //RX_FDDRC_SLANT_1_1 +265 0x2000 //RX_FDDRC_SLANT_1_2 +266 0x2000 //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +286 0x0100 //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 +#VOL 1 +163 0x3000 //RX_TDDRC_ALPHA_UP_1 +164 0x3000 //RX_TDDRC_ALPHA_UP_2 +165 0x3000 //RX_TDDRC_ALPHA_UP_3 +166 0x3000 //RX_TDDRC_ALPHA_UP_4 +184 0x7FB0 //RX_TDDRC_ALPHA_DWN_1 +185 0x7FB0 //RX_TDDRC_ALPHA_DWN_2 +186 0x7FB0 //RX_TDDRC_ALPHA_DWN_3 +189 0x7FB0 //RX_TDDRC_ALPHA_DWN_4 +190 0xDA9E //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +269 0x0000 //RX_TDDRC_THRD_0 +270 0x0000 //RX_TDDRC_THRD_1 +271 0x0E80 //RX_TDDRC_THRD_2 +272 0x3800 //RX_TDDRC_THRD_3 +273 0x2A00 //RX_TDDRC_SLANT_0 +274 0x6E00 //RX_TDDRC_SLANT_1 +275 0x3000 //RX_TDDRC_ALPHA_UP_0 +276 0x7FB0 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x0000 //RX_TDDRC_HMNC_GAIN +279 0x0000 //RX_TDDRC_SMT_FLAG +280 0x0000 //RX_TDDRC_SMT_W +281 0x0100 //RX_TDDRC_DRC_GAIN +195 0x0020 //RX_FDEQ_SUBNUM +196 0x4848 //RX_FDEQ_GAIN_0 +197 0x4848 //RX_FDEQ_GAIN_1 +198 0x4848 //RX_FDEQ_GAIN_2 +199 0x4848 //RX_FDEQ_GAIN_3 +200 0x4848 //RX_FDEQ_GAIN_4 +201 0x4848 //RX_FDEQ_GAIN_5 +202 0x4848 //RX_FDEQ_GAIN_6 +203 0x4848 //RX_FDEQ_GAIN_7 +204 0x4848 //RX_FDEQ_GAIN_8 +205 0x4848 //RX_FDEQ_GAIN_9 +206 0x4848 //RX_FDEQ_GAIN_10 +207 0x4848 //RX_FDEQ_GAIN_11 +208 0x4848 //RX_FDEQ_GAIN_12 +209 0x4848 //RX_FDEQ_GAIN_13 +210 0x4848 //RX_FDEQ_GAIN_14 +211 0x4848 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0000 //RX_FDEQ_BIN_0 +221 0x0000 //RX_FDEQ_BIN_1 +222 0x0000 //RX_FDEQ_BIN_2 +223 0x0000 //RX_FDEQ_BIN_3 +224 0x0000 //RX_FDEQ_BIN_4 +225 0x0000 //RX_FDEQ_BIN_5 +226 0x0000 //RX_FDEQ_BIN_6 +227 0x0000 //RX_FDEQ_BIN_7 +228 0x0000 //RX_FDEQ_BIN_8 +229 0x0000 //RX_FDEQ_BIN_9 +230 0x0000 //RX_FDEQ_BIN_10 +231 0x0000 //RX_FDEQ_BIN_11 +232 0x0000 //RX_FDEQ_BIN_12 +233 0x0000 //RX_FDEQ_BIN_13 +234 0x0000 //RX_FDEQ_BIN_14 +235 0x0000 //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x0000 //RX_FDEQ_RESRV_0 +245 0x0000 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0030 //RX_FDDRC_BAND_MARGIN_1 +248 0x0050 //RX_FDDRC_BAND_MARGIN_2 +249 0x0080 //RX_FDDRC_BAND_MARGIN_3 +250 0x0004 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x5000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x6400 //RX_FDDRC_THRD_3_2 +258 0x6400 //RX_FDDRC_THRD_3_3 +259 0x2000 //RX_FDDRC_SLANT_0_0 +260 0x2000 //RX_FDDRC_SLANT_0_1 +261 0x2000 //RX_FDDRC_SLANT_0_2 +262 0x2000 //RX_FDDRC_SLANT_0_3 +263 0x2000 //RX_FDDRC_SLANT_1_0 +264 0x2000 //RX_FDDRC_SLANT_1_1 +265 0x2000 //RX_FDDRC_SLANT_1_2 +266 0x2000 //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +286 0x0100 //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 +#VOL 2 +163 0x3000 //RX_TDDRC_ALPHA_UP_1 +164 0x3000 //RX_TDDRC_ALPHA_UP_2 +165 0x3000 //RX_TDDRC_ALPHA_UP_3 +166 0x3000 //RX_TDDRC_ALPHA_UP_4 +184 0x7FB0 //RX_TDDRC_ALPHA_DWN_1 +185 0x7FB0 //RX_TDDRC_ALPHA_DWN_2 +186 0x7FB0 //RX_TDDRC_ALPHA_DWN_3 +189 0x7FB0 //RX_TDDRC_ALPHA_DWN_4 +190 0xDA9E //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +269 0x0000 //RX_TDDRC_THRD_0 +270 0x0000 //RX_TDDRC_THRD_1 +271 0x0E80 //RX_TDDRC_THRD_2 +272 0x3800 //RX_TDDRC_THRD_3 +273 0x2A00 //RX_TDDRC_SLANT_0 +274 0x6E00 //RX_TDDRC_SLANT_1 +275 0x3000 //RX_TDDRC_ALPHA_UP_0 +276 0x7FB0 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x0000 //RX_TDDRC_HMNC_GAIN +279 0x0000 //RX_TDDRC_SMT_FLAG +280 0x0000 //RX_TDDRC_SMT_W +281 0x0100 //RX_TDDRC_DRC_GAIN +195 0x0020 //RX_FDEQ_SUBNUM +196 0x4848 //RX_FDEQ_GAIN_0 +197 0x4848 //RX_FDEQ_GAIN_1 +198 0x4848 //RX_FDEQ_GAIN_2 +199 0x4848 //RX_FDEQ_GAIN_3 +200 0x4848 //RX_FDEQ_GAIN_4 +201 0x4848 //RX_FDEQ_GAIN_5 +202 0x4848 //RX_FDEQ_GAIN_6 +203 0x4848 //RX_FDEQ_GAIN_7 +204 0x4848 //RX_FDEQ_GAIN_8 +205 0x4848 //RX_FDEQ_GAIN_9 +206 0x4848 //RX_FDEQ_GAIN_10 +207 0x4848 //RX_FDEQ_GAIN_11 +208 0x4848 //RX_FDEQ_GAIN_12 +209 0x4848 //RX_FDEQ_GAIN_13 +210 0x4848 //RX_FDEQ_GAIN_14 +211 0x4848 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0000 //RX_FDEQ_BIN_0 +221 0x0000 //RX_FDEQ_BIN_1 +222 0x0000 //RX_FDEQ_BIN_2 +223 0x0000 //RX_FDEQ_BIN_3 +224 0x0000 //RX_FDEQ_BIN_4 +225 0x0000 //RX_FDEQ_BIN_5 +226 0x0000 //RX_FDEQ_BIN_6 +227 0x0000 //RX_FDEQ_BIN_7 +228 0x0000 //RX_FDEQ_BIN_8 +229 0x0000 //RX_FDEQ_BIN_9 +230 0x0000 //RX_FDEQ_BIN_10 +231 0x0000 //RX_FDEQ_BIN_11 +232 0x0000 //RX_FDEQ_BIN_12 +233 0x0000 //RX_FDEQ_BIN_13 +234 0x0000 //RX_FDEQ_BIN_14 +235 0x0000 //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x0000 //RX_FDEQ_RESRV_0 +245 0x0000 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0030 //RX_FDDRC_BAND_MARGIN_1 +248 0x0050 //RX_FDDRC_BAND_MARGIN_2 +249 0x0080 //RX_FDDRC_BAND_MARGIN_3 +250 0x0004 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x5000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x6400 //RX_FDDRC_THRD_3_2 +258 0x6400 //RX_FDDRC_THRD_3_3 +259 0x2000 //RX_FDDRC_SLANT_0_0 +260 0x2000 //RX_FDDRC_SLANT_0_1 +261 0x2000 //RX_FDDRC_SLANT_0_2 +262 0x2000 //RX_FDDRC_SLANT_0_3 +263 0x2000 //RX_FDDRC_SLANT_1_0 +264 0x2000 //RX_FDDRC_SLANT_1_1 +265 0x2000 //RX_FDDRC_SLANT_1_2 +266 0x2000 //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +286 0x0100 //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 +#VOL 3 +163 0x3000 //RX_TDDRC_ALPHA_UP_1 +164 0x3000 //RX_TDDRC_ALPHA_UP_2 +165 0x3000 //RX_TDDRC_ALPHA_UP_3 +166 0x3000 //RX_TDDRC_ALPHA_UP_4 +184 0x7FB0 //RX_TDDRC_ALPHA_DWN_1 +185 0x7FB0 //RX_TDDRC_ALPHA_DWN_2 +186 0x7FB0 //RX_TDDRC_ALPHA_DWN_3 +189 0x7FB0 //RX_TDDRC_ALPHA_DWN_4 +190 0xDA9E //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +269 0x0000 //RX_TDDRC_THRD_0 +270 0x0000 //RX_TDDRC_THRD_1 +271 0x0E80 //RX_TDDRC_THRD_2 +272 0x3800 //RX_TDDRC_THRD_3 +273 0x2A00 //RX_TDDRC_SLANT_0 +274 0x6E00 //RX_TDDRC_SLANT_1 +275 0x3000 //RX_TDDRC_ALPHA_UP_0 +276 0x7FB0 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x0000 //RX_TDDRC_HMNC_GAIN +279 0x0000 //RX_TDDRC_SMT_FLAG +280 0x0000 //RX_TDDRC_SMT_W +281 0x0100 //RX_TDDRC_DRC_GAIN +195 0x0020 //RX_FDEQ_SUBNUM +196 0x4848 //RX_FDEQ_GAIN_0 +197 0x4848 //RX_FDEQ_GAIN_1 +198 0x4848 //RX_FDEQ_GAIN_2 +199 0x4848 //RX_FDEQ_GAIN_3 +200 0x4848 //RX_FDEQ_GAIN_4 +201 0x4848 //RX_FDEQ_GAIN_5 +202 0x4848 //RX_FDEQ_GAIN_6 +203 0x4848 //RX_FDEQ_GAIN_7 +204 0x4848 //RX_FDEQ_GAIN_8 +205 0x4848 //RX_FDEQ_GAIN_9 +206 0x4848 //RX_FDEQ_GAIN_10 +207 0x4848 //RX_FDEQ_GAIN_11 +208 0x4848 //RX_FDEQ_GAIN_12 +209 0x4848 //RX_FDEQ_GAIN_13 +210 0x4848 //RX_FDEQ_GAIN_14 +211 0x4848 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0000 //RX_FDEQ_BIN_0 +221 0x0000 //RX_FDEQ_BIN_1 +222 0x0000 //RX_FDEQ_BIN_2 +223 0x0000 //RX_FDEQ_BIN_3 +224 0x0000 //RX_FDEQ_BIN_4 +225 0x0000 //RX_FDEQ_BIN_5 +226 0x0000 //RX_FDEQ_BIN_6 +227 0x0000 //RX_FDEQ_BIN_7 +228 0x0000 //RX_FDEQ_BIN_8 +229 0x0000 //RX_FDEQ_BIN_9 +230 0x0000 //RX_FDEQ_BIN_10 +231 0x0000 //RX_FDEQ_BIN_11 +232 0x0000 //RX_FDEQ_BIN_12 +233 0x0000 //RX_FDEQ_BIN_13 +234 0x0000 //RX_FDEQ_BIN_14 +235 0x0000 //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x0000 //RX_FDEQ_RESRV_0 +245 0x0000 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0030 //RX_FDDRC_BAND_MARGIN_1 +248 0x0050 //RX_FDDRC_BAND_MARGIN_2 +249 0x0080 //RX_FDDRC_BAND_MARGIN_3 +250 0x0004 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x5000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x6400 //RX_FDDRC_THRD_3_2 +258 0x6400 //RX_FDDRC_THRD_3_3 +259 0x2000 //RX_FDDRC_SLANT_0_0 +260 0x2000 //RX_FDDRC_SLANT_0_1 +261 0x2000 //RX_FDDRC_SLANT_0_2 +262 0x2000 //RX_FDDRC_SLANT_0_3 +263 0x2000 //RX_FDDRC_SLANT_1_0 +264 0x2000 //RX_FDDRC_SLANT_1_1 +265 0x2000 //RX_FDDRC_SLANT_1_2 +266 0x2000 //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +286 0x0100 //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 +#VOL 4 +163 0x3000 //RX_TDDRC_ALPHA_UP_1 +164 0x3000 //RX_TDDRC_ALPHA_UP_2 +165 0x3000 //RX_TDDRC_ALPHA_UP_3 +166 0x3000 //RX_TDDRC_ALPHA_UP_4 +184 0x7FB0 //RX_TDDRC_ALPHA_DWN_1 +185 0x7FB0 //RX_TDDRC_ALPHA_DWN_2 +186 0x7FB0 //RX_TDDRC_ALPHA_DWN_3 +189 0x7FB0 //RX_TDDRC_ALPHA_DWN_4 +190 0xDA9E //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +269 0x0000 //RX_TDDRC_THRD_0 +270 0x0000 //RX_TDDRC_THRD_1 +271 0x0E80 //RX_TDDRC_THRD_2 +272 0x3800 //RX_TDDRC_THRD_3 +273 0x2A00 //RX_TDDRC_SLANT_0 +274 0x6E00 //RX_TDDRC_SLANT_1 +275 0x3000 //RX_TDDRC_ALPHA_UP_0 +276 0x7FB0 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x0000 //RX_TDDRC_HMNC_GAIN +279 0x0000 //RX_TDDRC_SMT_FLAG +280 0x0000 //RX_TDDRC_SMT_W +281 0x0100 //RX_TDDRC_DRC_GAIN +195 0x0020 //RX_FDEQ_SUBNUM +196 0x4848 //RX_FDEQ_GAIN_0 +197 0x4848 //RX_FDEQ_GAIN_1 +198 0x4848 //RX_FDEQ_GAIN_2 +199 0x4848 //RX_FDEQ_GAIN_3 +200 0x4848 //RX_FDEQ_GAIN_4 +201 0x4848 //RX_FDEQ_GAIN_5 +202 0x4848 //RX_FDEQ_GAIN_6 +203 0x4848 //RX_FDEQ_GAIN_7 +204 0x4848 //RX_FDEQ_GAIN_8 +205 0x4848 //RX_FDEQ_GAIN_9 +206 0x4848 //RX_FDEQ_GAIN_10 +207 0x4848 //RX_FDEQ_GAIN_11 +208 0x4848 //RX_FDEQ_GAIN_12 +209 0x4848 //RX_FDEQ_GAIN_13 +210 0x4848 //RX_FDEQ_GAIN_14 +211 0x4848 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0000 //RX_FDEQ_BIN_0 +221 0x0000 //RX_FDEQ_BIN_1 +222 0x0000 //RX_FDEQ_BIN_2 +223 0x0000 //RX_FDEQ_BIN_3 +224 0x0000 //RX_FDEQ_BIN_4 +225 0x0000 //RX_FDEQ_BIN_5 +226 0x0000 //RX_FDEQ_BIN_6 +227 0x0000 //RX_FDEQ_BIN_7 +228 0x0000 //RX_FDEQ_BIN_8 +229 0x0000 //RX_FDEQ_BIN_9 +230 0x0000 //RX_FDEQ_BIN_10 +231 0x0000 //RX_FDEQ_BIN_11 +232 0x0000 //RX_FDEQ_BIN_12 +233 0x0000 //RX_FDEQ_BIN_13 +234 0x0000 //RX_FDEQ_BIN_14 +235 0x0000 //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x0000 //RX_FDEQ_RESRV_0 +245 0x0000 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0030 //RX_FDDRC_BAND_MARGIN_1 +248 0x0050 //RX_FDDRC_BAND_MARGIN_2 +249 0x0080 //RX_FDDRC_BAND_MARGIN_3 +250 0x0004 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x5000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x6400 //RX_FDDRC_THRD_3_2 +258 0x6400 //RX_FDDRC_THRD_3_3 +259 0x2000 //RX_FDDRC_SLANT_0_0 +260 0x2000 //RX_FDDRC_SLANT_0_1 +261 0x2000 //RX_FDDRC_SLANT_0_2 +262 0x2000 //RX_FDDRC_SLANT_0_3 +263 0x2000 //RX_FDDRC_SLANT_1_0 +264 0x2000 //RX_FDDRC_SLANT_1_1 +265 0x2000 //RX_FDDRC_SLANT_1_2 +266 0x2000 //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +286 0x0100 //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 +#VOL 5 +163 0x3000 //RX_TDDRC_ALPHA_UP_1 +164 0x3000 //RX_TDDRC_ALPHA_UP_2 +165 0x3000 //RX_TDDRC_ALPHA_UP_3 +166 0x3000 //RX_TDDRC_ALPHA_UP_4 +184 0x7FB0 //RX_TDDRC_ALPHA_DWN_1 +185 0x7FB0 //RX_TDDRC_ALPHA_DWN_2 +186 0x7FB0 //RX_TDDRC_ALPHA_DWN_3 +189 0x7FB0 //RX_TDDRC_ALPHA_DWN_4 +190 0xDA9E //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +269 0x0000 //RX_TDDRC_THRD_0 +270 0x0000 //RX_TDDRC_THRD_1 +271 0x0E80 //RX_TDDRC_THRD_2 +272 0x3800 //RX_TDDRC_THRD_3 +273 0x2A00 //RX_TDDRC_SLANT_0 +274 0x6E00 //RX_TDDRC_SLANT_1 +275 0x3000 //RX_TDDRC_ALPHA_UP_0 +276 0x7FB0 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x0000 //RX_TDDRC_HMNC_GAIN +279 0x0000 //RX_TDDRC_SMT_FLAG +280 0x0000 //RX_TDDRC_SMT_W +281 0x0100 //RX_TDDRC_DRC_GAIN +195 0x0020 //RX_FDEQ_SUBNUM +196 0x4848 //RX_FDEQ_GAIN_0 +197 0x4848 //RX_FDEQ_GAIN_1 +198 0x4848 //RX_FDEQ_GAIN_2 +199 0x4848 //RX_FDEQ_GAIN_3 +200 0x4848 //RX_FDEQ_GAIN_4 +201 0x4848 //RX_FDEQ_GAIN_5 +202 0x4848 //RX_FDEQ_GAIN_6 +203 0x4848 //RX_FDEQ_GAIN_7 +204 0x4848 //RX_FDEQ_GAIN_8 +205 0x4848 //RX_FDEQ_GAIN_9 +206 0x4848 //RX_FDEQ_GAIN_10 +207 0x4848 //RX_FDEQ_GAIN_11 +208 0x4848 //RX_FDEQ_GAIN_12 +209 0x4848 //RX_FDEQ_GAIN_13 +210 0x4848 //RX_FDEQ_GAIN_14 +211 0x4848 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0000 //RX_FDEQ_BIN_0 +221 0x0000 //RX_FDEQ_BIN_1 +222 0x0000 //RX_FDEQ_BIN_2 +223 0x0000 //RX_FDEQ_BIN_3 +224 0x0000 //RX_FDEQ_BIN_4 +225 0x0000 //RX_FDEQ_BIN_5 +226 0x0000 //RX_FDEQ_BIN_6 +227 0x0000 //RX_FDEQ_BIN_7 +228 0x0000 //RX_FDEQ_BIN_8 +229 0x0000 //RX_FDEQ_BIN_9 +230 0x0000 //RX_FDEQ_BIN_10 +231 0x0000 //RX_FDEQ_BIN_11 +232 0x0000 //RX_FDEQ_BIN_12 +233 0x0000 //RX_FDEQ_BIN_13 +234 0x0000 //RX_FDEQ_BIN_14 +235 0x0000 //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x0000 //RX_FDEQ_RESRV_0 +245 0x0000 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0030 //RX_FDDRC_BAND_MARGIN_1 +248 0x0050 //RX_FDDRC_BAND_MARGIN_2 +249 0x0080 //RX_FDDRC_BAND_MARGIN_3 +250 0x0004 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x5000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x6400 //RX_FDDRC_THRD_3_2 +258 0x6400 //RX_FDDRC_THRD_3_3 +259 0x2000 //RX_FDDRC_SLANT_0_0 +260 0x2000 //RX_FDDRC_SLANT_0_1 +261 0x2000 //RX_FDDRC_SLANT_0_2 +262 0x2000 //RX_FDDRC_SLANT_0_3 +263 0x2000 //RX_FDDRC_SLANT_1_0 +264 0x2000 //RX_FDDRC_SLANT_1_1 +265 0x2000 //RX_FDDRC_SLANT_1_2 +266 0x2000 //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +286 0x0100 //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 +#VOL 6 +163 0x3000 //RX_TDDRC_ALPHA_UP_1 +164 0x3000 //RX_TDDRC_ALPHA_UP_2 +165 0x3000 //RX_TDDRC_ALPHA_UP_3 +166 0x3000 //RX_TDDRC_ALPHA_UP_4 +184 0x7FB0 //RX_TDDRC_ALPHA_DWN_1 +185 0x7FB0 //RX_TDDRC_ALPHA_DWN_2 +186 0x7FB0 //RX_TDDRC_ALPHA_DWN_3 +189 0x7FB0 //RX_TDDRC_ALPHA_DWN_4 +190 0xDA9E //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +269 0x0000 //RX_TDDRC_THRD_0 +270 0x0000 //RX_TDDRC_THRD_1 +271 0x0E80 //RX_TDDRC_THRD_2 +272 0x3800 //RX_TDDRC_THRD_3 +273 0x2A00 //RX_TDDRC_SLANT_0 +274 0x6E00 //RX_TDDRC_SLANT_1 +275 0x3000 //RX_TDDRC_ALPHA_UP_0 +276 0x7FB0 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x0000 //RX_TDDRC_HMNC_GAIN +279 0x0000 //RX_TDDRC_SMT_FLAG +280 0x0000 //RX_TDDRC_SMT_W +281 0x0100 //RX_TDDRC_DRC_GAIN +195 0x0020 //RX_FDEQ_SUBNUM +196 0x4848 //RX_FDEQ_GAIN_0 +197 0x4848 //RX_FDEQ_GAIN_1 +198 0x4848 //RX_FDEQ_GAIN_2 +199 0x4848 //RX_FDEQ_GAIN_3 +200 0x4848 //RX_FDEQ_GAIN_4 +201 0x4848 //RX_FDEQ_GAIN_5 +202 0x4848 //RX_FDEQ_GAIN_6 +203 0x4848 //RX_FDEQ_GAIN_7 +204 0x4848 //RX_FDEQ_GAIN_8 +205 0x4848 //RX_FDEQ_GAIN_9 +206 0x4848 //RX_FDEQ_GAIN_10 +207 0x4848 //RX_FDEQ_GAIN_11 +208 0x4848 //RX_FDEQ_GAIN_12 +209 0x4848 //RX_FDEQ_GAIN_13 +210 0x4848 //RX_FDEQ_GAIN_14 +211 0x4848 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0000 //RX_FDEQ_BIN_0 +221 0x0000 //RX_FDEQ_BIN_1 +222 0x0000 //RX_FDEQ_BIN_2 +223 0x0000 //RX_FDEQ_BIN_3 +224 0x0000 //RX_FDEQ_BIN_4 +225 0x0000 //RX_FDEQ_BIN_5 +226 0x0000 //RX_FDEQ_BIN_6 +227 0x0000 //RX_FDEQ_BIN_7 +228 0x0000 //RX_FDEQ_BIN_8 +229 0x0000 //RX_FDEQ_BIN_9 +230 0x0000 //RX_FDEQ_BIN_10 +231 0x0000 //RX_FDEQ_BIN_11 +232 0x0000 //RX_FDEQ_BIN_12 +233 0x0000 //RX_FDEQ_BIN_13 +234 0x0000 //RX_FDEQ_BIN_14 +235 0x0000 //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x0000 //RX_FDEQ_RESRV_0 +245 0x0000 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0030 //RX_FDDRC_BAND_MARGIN_1 +248 0x0050 //RX_FDDRC_BAND_MARGIN_2 +249 0x0080 //RX_FDDRC_BAND_MARGIN_3 +250 0x0004 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x5000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x6400 //RX_FDDRC_THRD_3_2 +258 0x6400 //RX_FDDRC_THRD_3_3 +259 0x2000 //RX_FDDRC_SLANT_0_0 +260 0x2000 //RX_FDDRC_SLANT_0_1 +261 0x2000 //RX_FDDRC_SLANT_0_2 +262 0x2000 //RX_FDDRC_SLANT_0_3 +263 0x2000 //RX_FDDRC_SLANT_1_0 +264 0x2000 //RX_FDDRC_SLANT_1_1 +265 0x2000 //RX_FDDRC_SLANT_1_2 +266 0x2000 //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +286 0x0100 //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 #CASE_NAME HEADSET-TTY_VCO-VOICE_GENERIC-WB -#PARAM_MODE FULL -#PARAM_TYPE TX+RX -#TOTAL_CUSTOM_STEP 7 +#PARAM_MODE Full +#PARAM_TYPE TX+2RX +#TOTAL_CUSTOM_STEP 7+7 #TX 0 0x0001 //TX_OPERATION_MODE_0 1 0x0001 //TX_OPERATION_MODE_1 2 0x0033 //TX_PATCH_REG -3 0x2F7C //TX_SENDFUNC_MODE_0 +3 0x6F7C //TX_SENDFUNC_MODE_0 4 0x0001 //TX_SENDFUNC_MODE_1 -5 0x0003 //TX_NUM_MIC +5 0x0002 //TX_NUM_MIC 6 0x0001 //TX_SAMPLINGFREQ_SIG 7 0x0001 //TX_SAMPLINGFREQ_PROC 8 0x000A //TX_FRAME_SZ_SIG @@ -43879,8 +66779,8 @@ 18 0x0000 //TX_SYS_RESRV_2 19 0x0000 //TX_SYS_RESRV_3 20 0x0000 //TX_DIST2REF0 -21 0x00A4 //TX_DIST2REF1 -22 0x0017 //TX_DIST2REF_02 +21 0x009D //TX_DIST2REF1 +22 0x0010 //TX_DIST2REF_02 23 0x0000 //TX_DIST2REF_03 24 0x0000 //TX_DIST2REF_04 25 0x0000 //TX_DIST2REF_05 @@ -43971,8 +66871,8 @@ 110 0x0000 //TX_ADCS_MASK 111 0x04D0 //TX_ADCS_GAIN 112 0x4000 //TX_NFC_GAINFAC -113 0x0000 //TX_MAINMIC_BLKFACTOR -114 0x0000 //TX_REFMIC_BLKFACTOR +113 0x0004 //TX_MAINMIC_BLKFACTOR +114 0x0004 //TX_REFMIC_BLKFACTOR 115 0x0000 //TX_BLMIC_BLKFACTOR 116 0x0000 //TX_BRMIC_BLKFACTOR 117 0x0031 //TX_MICBLK_START_BIN @@ -44010,7 +66910,7 @@ 149 0x0800 //TX_AEC_REF_GAIN_2 150 0x6800 //TX_EAD_THR 151 0x1000 //TX_THR_RE_EST -152 0x0200 //TX_MIN_EQ_RE_EST_0 +152 0x3000 //TX_MIN_EQ_RE_EST_0 153 0x0100 //TX_MIN_EQ_RE_EST_1 154 0x0200 //TX_MIN_EQ_RE_EST_2 155 0x0200 //TX_MIN_EQ_RE_EST_3 @@ -44023,13 +66923,13 @@ 162 0x1000 //TX_MIN_EQ_RE_EST_10 163 0x1000 //TX_MIN_EQ_RE_EST_11 164 0x1000 //TX_MIN_EQ_RE_EST_12 -165 0x4000 //TX_LAMBDA_RE_EST +165 0x1B00 //TX_LAMBDA_RE_EST 166 0x4000 //TX_LAMBDA_CB_NLE 167 0x7FFF //TX_C_POST_FLT 168 0x5000 //TX_GAIN_NP 169 0x0180 //TX_SE_HOLD_N 170 0x00C8 //TX_DT_HOLD_N -171 0x05DC //TX_DT2_HOLD_N +171 0x0020 //TX_DT2_HOLD_N 172 0x6666 //TX_AEC_RESRV_0 173 0x0000 //TX_AEC_RESRV_1 174 0x0014 //TX_AEC_RESRV_2 @@ -44055,15 +66955,15 @@ 194 0x0000 //TX_NORMENERTH 195 0x0000 //TX_NORMENERHIGHTH 196 0x0000 //TX_NORMENERHIGHTHL -197 0x6590 //TX_DTD_THR1_0 -198 0x6590 //TX_DTD_THR1_1 -199 0x6590 //TX_DTD_THR1_2 +197 0x76D0 //TX_DTD_THR1_0 +198 0x76D0 //TX_DTD_THR1_1 +199 0x76D0 //TX_DTD_THR1_2 200 0x7FF0 //TX_DTD_THR1_3 201 0x7FF0 //TX_DTD_THR1_4 202 0x7FF0 //TX_DTD_THR1_5 203 0x7FF0 //TX_DTD_THR1_6 -204 0x5000 //TX_DTD_THR2_0 -205 0x5000 //TX_DTD_THR2_1 +204 0x7E00 //TX_DTD_THR2_0 +205 0x7E00 //TX_DTD_THR2_1 206 0x5000 //TX_DTD_THR2_2 207 0x5000 //TX_DTD_THR2_3 208 0x5000 //TX_DTD_THR2_4 @@ -44071,8 +66971,8 @@ 210 0x5000 //TX_DTD_THR2_6 211 0x7FFF //TX_DTD_THR3 212 0x0000 //TX_SPK_CUT_K -213 0x07D0 //TX_DT_CUT_K -214 0x0100 //TX_DT_CUT_THR +213 0x03E8 //TX_DT_CUT_K +214 0x0010 //TX_DT_CUT_THR 215 0x04EB //TX_COMFORT_G 216 0x01F4 //TX_POWER_YOUT_TH 217 0x4000 //TX_FDPFGAINECHO @@ -44083,16 +66983,16 @@ 222 0x023E //TX_ADPT_STRICT_H 223 0x0BB8 //TX_RATIO_DT_L_TH_LOW 224 0x3A98 //TX_RATIO_DT_H_TH_LOW -225 0x1770 //TX_RATIO_DT_L_TH_HIGH -226 0x4E20 //TX_RATIO_DT_H_TH_HIGH -227 0x09C4 //TX_RATIO_DT_L0_TH -228 0x2000 //TX_B_POST_FILT_ECHO_L +225 0x044C //TX_RATIO_DT_L_TH_HIGH +226 0x7800 //TX_RATIO_DT_H_TH_HIGH +227 0x0001 //TX_RATIO_DT_L0_TH +228 0x7FFF //TX_B_POST_FILT_ECHO_L 229 0x7FFF //TX_B_POST_FILT_ECHO_H 230 0x0200 //TX_MIN_G_CTRL_ECHO 231 0x1000 //TX_B_LESSCUT_RTO_ECHO 232 0x0000 //TX_EPD_OFFSET_00 233 0x0000 //TX_EPD_OFFST_01 -234 0x1388 //TX_RATIO_DT_L0_TH_HIGH +234 0x03E8 //TX_RATIO_DT_L0_TH_HIGH 235 0x7FFF //TX_RATIO_DT_H_TH_CUT 236 0x7FFF //TX_MIN_EQ_RE_EST_13 237 0x0000 //TX_DTD_THR1_7 @@ -44100,7 +67000,7 @@ 239 0x0800 //TX_DT_RESRV_7 240 0x0800 //TX_DT_RESRV_8 241 0x0000 //TX_DT_RESRV_9 -242 0xF800 //TX_THR_SN_EST_0 +242 0xFA00 //TX_THR_SN_EST_0 243 0xFA00 //TX_THR_SN_EST_1 244 0xFA00 //TX_THR_SN_EST_2 245 0xFB00 //TX_THR_SN_EST_3 @@ -44109,11 +67009,11 @@ 248 0xF800 //TX_THR_SN_EST_6 249 0xF800 //TX_THR_SN_EST_7 250 0x0100 //TX_DELTA_THR_SN_EST_0 -251 0x0200 //TX_DELTA_THR_SN_EST_1 -252 0x0100 //TX_DELTA_THR_SN_EST_2 -253 0x0200 //TX_DELTA_THR_SN_EST_3 +251 0x0100 //TX_DELTA_THR_SN_EST_1 +252 0x0200 //TX_DELTA_THR_SN_EST_2 +253 0x0100 //TX_DELTA_THR_SN_EST_3 254 0x0100 //TX_DELTA_THR_SN_EST_4 -255 0x0100 //TX_DELTA_THR_SN_EST_5 +255 0x0200 //TX_DELTA_THR_SN_EST_5 256 0x0200 //TX_DELTA_THR_SN_EST_6 257 0x0200 //TX_DELTA_THR_SN_EST_7 258 0x4000 //TX_LAMBDA_NN_EST_0 @@ -44141,11 +67041,11 @@ 280 0x1000 //TX_B_POST_FLT_1 281 0x0010 //TX_NS_LVL_CTRL_0 282 0x0014 //TX_NS_LVL_CTRL_1 -283 0x0014 //TX_NS_LVL_CTRL_2 -284 0x0018 //TX_NS_LVL_CTRL_3 -285 0x0016 //TX_NS_LVL_CTRL_4 -286 0x0014 //TX_NS_LVL_CTRL_5 -287 0x0011 //TX_NS_LVL_CTRL_6 +283 0x0018 //TX_NS_LVL_CTRL_2 +284 0x0016 //TX_NS_LVL_CTRL_3 +285 0x0014 //TX_NS_LVL_CTRL_4 +286 0x0011 //TX_NS_LVL_CTRL_5 +287 0x0014 //TX_NS_LVL_CTRL_6 288 0x0011 //TX_NS_LVL_CTRL_7 289 0x000F //TX_MIN_GAIN_S_0 290 0x0010 //TX_MIN_GAIN_S_1 @@ -44163,8 +67063,8 @@ 302 0x4000 //TX_SNRI_SUP_2 303 0x4000 //TX_SNRI_SUP_3 304 0x4000 //TX_SNRI_SUP_4 -305 0x4000 //TX_SNRI_SUP_5 -306 0x50C0 //TX_SNRI_SUP_6 +305 0x50C0 //TX_SNRI_SUP_5 +306 0x4000 //TX_SNRI_SUP_6 307 0x7FFF //TX_SNRI_SUP_7 308 0x7FFF //TX_THR_LFNS 309 0x0018 //TX_G_LFNS @@ -44173,19 +67073,19 @@ 312 0x7FFF //TX_A_POST_FILT_0 313 0x2000 //TX_A_POST_FILT_1 314 0x5000 //TX_A_POST_FILT_S_0 -315 0x6000 //TX_A_POST_FILT_S_1 -316 0x4C00 //TX_A_POST_FILT_S_2 -317 0x4000 //TX_A_POST_FILT_S_3 -318 0x6000 //TX_A_POST_FILT_S_4 -319 0x4000 //TX_A_POST_FILT_S_5 -320 0x5000 //TX_A_POST_FILT_S_6 +315 0x4C00 //TX_A_POST_FILT_S_1 +316 0x4000 //TX_A_POST_FILT_S_2 +317 0x6000 //TX_A_POST_FILT_S_3 +318 0x4000 //TX_A_POST_FILT_S_4 +319 0x5000 //TX_A_POST_FILT_S_5 +320 0x6000 //TX_A_POST_FILT_S_6 321 0x7000 //TX_A_POST_FILT_S_7 322 0x2000 //TX_B_POST_FILT_0 -323 0x1000 //TX_B_POST_FILT_1 +323 0x2000 //TX_B_POST_FILT_1 324 0x2000 //TX_B_POST_FILT_2 -325 0x2000 //TX_B_POST_FILT_3 +325 0x4000 //TX_B_POST_FILT_3 326 0x4000 //TX_B_POST_FILT_4 -327 0x4000 //TX_B_POST_FILT_5 +327 0x1000 //TX_B_POST_FILT_5 328 0x1000 //TX_B_POST_FILT_6 329 0x2000 //TX_B_POST_FILT_7 330 0x4000 //TX_B_LESSCUT_RTO_S_0 @@ -44193,14 +67093,14 @@ 332 0x7FFF //TX_B_LESSCUT_RTO_S_2 333 0x7FFF //TX_B_LESSCUT_RTO_S_3 334 0x7FFF //TX_B_LESSCUT_RTO_S_4 -335 0x7FFF //TX_B_LESSCUT_RTO_S_5 -336 0x6000 //TX_B_LESSCUT_RTO_S_6 +335 0x6000 //TX_B_LESSCUT_RTO_S_5 +336 0x7FFF //TX_B_LESSCUT_RTO_S_6 337 0x7FFF //TX_B_LESSCUT_RTO_S_7 338 0x7C00 //TX_LAMBDA_PFILT 339 0x7C00 //TX_LAMBDA_PFILT_S_0 340 0x7C00 //TX_LAMBDA_PFILT_S_1 -341 0x7C00 //TX_LAMBDA_PFILT_S_2 -342 0x7A00 //TX_LAMBDA_PFILT_S_3 +341 0x7A00 //TX_LAMBDA_PFILT_S_2 +342 0x7C00 //TX_LAMBDA_PFILT_S_3 343 0x7C00 //TX_LAMBDA_PFILT_S_4 344 0x7C00 //TX_LAMBDA_PFILT_S_5 345 0x7C00 //TX_LAMBDA_PFILT_S_6 @@ -44211,10 +67111,10 @@ 350 0x0600 //TX_A_PEPPER_HF 351 0x0001 //TX_HMNC_BST_FLG 352 0x0200 //TX_HMNC_BST_THR -353 0x0200 //TX_DT_BINVAD_TH_0 -354 0x0200 //TX_DT_BINVAD_TH_1 -355 0x0200 //TX_DT_BINVAD_TH_2 -356 0x0200 //TX_DT_BINVAD_TH_3 +353 0x0800 //TX_DT_BINVAD_TH_0 +354 0x0800 //TX_DT_BINVAD_TH_1 +355 0x0800 //TX_DT_BINVAD_TH_2 +356 0x0800 //TX_DT_BINVAD_TH_3 357 0x1D4C //TX_DT_BINVAD_ENDF 358 0x0800 //TX_C_POST_FLT_DT 359 0x0CCD //TX_NS_B_POST_FLT_LESSCUT @@ -44225,7 +67125,7 @@ 364 0x0000 //TX_K_APT 365 0x0001 //TX_NOISEDET 366 0x0064 //TX_NDETCT -367 0x0032 //TX_NOISE_TH_0 +367 0x0102 //TX_NOISE_TH_0 368 0x7FFF //TX_NOISE_TH_0_2 369 0x7FFF //TX_NOISE_TH_0_3 370 0x017E //TX_NOISE_TH_1 @@ -44237,11 +67137,11 @@ 376 0x0001 //TX_NOISE_TH_5_3 377 0x7FFF //TX_NOISE_TH_5_4 378 0x0F0A //TX_NOISE_TH_6 -379 0x0033 //TX_MINENOISE_TH -380 0x4000 //TX_MINENOISE_MIC0_TH_MTS -381 0xFFEE //TX_MINENOISE_MIC0_TH_EXP -382 0x6000 //TX_MINENOISE_MIC0_S_TH_MTS -383 0xFFF3 //TX_MINENOISE_MIC0_S_TH_EXP +379 0x00F8 //TX_MINENOISE_TH +380 0xD508 //TX_MORENS_TFMASK_TH +381 0x0001 //TX_DRC_QUIET_FLOOR +382 0x3A98 //TX_RATIODTL_CUT_TH +383 0x0DAC //TX_DT_CUT_K1 384 0x0666 //TX_OUT_ENER_S_TH_CLEAN 385 0x0666 //TX_OUT_ENER_S_TH_LESSCLEAN 386 0x0333 //TX_OUT_ENER_S_TH_NOISY @@ -44249,22 +67149,22 @@ 388 0x0333 //TX_OUT_ENER_TH_SPEECH 389 0x2000 //TX_SN_NPB_GAIN 390 0x0000 //TX_NN_NPB_GAIN -391 0x0000 //TX_CSX_ALPHA_0 -392 0x0000 //TX_CSX_ALPHA_1 -393 0x0000 //TX_CSX_ALPHA_2 -394 0x0000 //TX_CSX_ALPHA_3 -395 0x0800 //TX_MU_ARSP_EST -396 0x00C8 //TX_P_OUTBEAM_MIN_TH +391 0x7FFF //TX_POST_MASK_SUP_HSNE +392 0x1388 //TX_TAIL_DET_TH +393 0x4000 //TX_B_LESSCUT_RTO_WTA +394 0x0000 //TX_MEL_G_R +395 0x0080 //TX_SUPHIGH_TH +396 0x0000 //TX_MASK_G_R 397 0x0002 //TX_EXTRA_NS_L -398 0x0800 //TX_EXTRA_NS_A -399 0x0005 //TX_VR_NOISE_FLOOR_TH +398 0x1800 //TX_C_POST_FLT_MASK +399 0x7FFF //TX_A_POST_FLT_WNS 400 0x0148 //TX_MIN_G_LOW300HZ -401 0x0001 //TX_MAXLEVEL_CNG +401 0x0004 //TX_MAXLEVEL_CNG 402 0x00B4 //TX_STN_NOISE_TH 403 0x4000 //TX_POST_MASK_SUP 404 0x7FFF //TX_POST_MASK_ADJUST 405 0x00C8 //TX_NS_ENOISE_MIC0_TH -406 0x0033 //TX_MINENOISE_MIC0_TH +406 0x00DC //TX_MINENOISE_MIC0_TH 407 0x012C //TX_MINENOISE_MIC0_S_TH 408 0x7FFF //TX_MIN_G_CTRL_SSNS 409 0x0000 //TX_METAL_RTO_THR @@ -44372,16 +67272,16 @@ 511 0x6666 //TX_MIC_TO_BFGAIN 512 0x0000 //TX_MICTOBFGAIN0 513 0x0000 //TX_FASTMUE_TH -514 0x0000 //TX_DERVB_LEN_0 -515 0x0000 //TX_DERVB_LEN_1 -516 0x0000 //TX_RHO_DERVB -517 0x0000 //TX_MIC_INDX_DERVB -518 0x0000 //TX_MU_DERVB -519 0x0000 //TX_DR_RESRV_0 -520 0x0000 //TX_DR_RESRV_1 -521 0x0000 //TX_DR_RESRV_2 -522 0x0000 //TX_DR_RESRV_3 -523 0x0000 //TX_DR_RESRV_4 +514 0xC000 //TX_DEREVERB_LF_MU +515 0xC000 //TX_DEREVERB_HF_MU +516 0xCCCC //TX_DEREVERB_DELAY +517 0xD999 //TX_DEREVERB_COEF_LEN +518 0x1F40 //TX_DEREVERB_DNR +519 0x0000 //TX_DEREVERB_ALPHA +520 0x0000 //TX_DEREVERB_BETA +521 0x0000 //TX_GSC_RTOL_TH +522 0x7000 //TX_GSC_RTOH_TH +523 0x0064 //TX_WIDE2_MEANHTH 524 0x0000 //TX_DR_RESRV_5 525 0x0000 //TX_DR_RESRV_6 526 0x0000 //TX_DR_RESRV_7 @@ -44424,19 +67324,19 @@ 563 0x0000 //TX_SAM_MARK 564 0x0000 //TX_PB_RESRV_0 565 0x0000 //TX_PB_RESRV_1 -566 0x001C //TX_FDEQ_SUBNUM -567 0x5050 //TX_FDEQ_GAIN_0 -568 0x5048 //TX_FDEQ_GAIN_1 +566 0x0020 //TX_FDEQ_SUBNUM +567 0x5454 //TX_FDEQ_GAIN_0 +568 0x5448 //TX_FDEQ_GAIN_1 569 0x4848 //TX_FDEQ_GAIN_2 570 0x4848 //TX_FDEQ_GAIN_3 571 0x4848 //TX_FDEQ_GAIN_4 572 0x4850 //TX_FDEQ_GAIN_5 573 0x5050 //TX_FDEQ_GAIN_6 -574 0x5048 //TX_FDEQ_GAIN_7 -575 0x4848 //TX_FDEQ_GAIN_8 -576 0x4844 //TX_FDEQ_GAIN_9 -577 0x3C36 //TX_FDEQ_GAIN_10 -578 0x3A3A //TX_FDEQ_GAIN_11 +574 0x5448 //TX_FDEQ_GAIN_7 +575 0x464C //TX_FDEQ_GAIN_8 +576 0x5050 //TX_FDEQ_GAIN_9 +577 0x4848 //TX_FDEQ_GAIN_10 +578 0x4848 //TX_FDEQ_GAIN_11 579 0x4848 //TX_FDEQ_GAIN_12 580 0x4848 //TX_FDEQ_GAIN_13 581 0x4848 //TX_FDEQ_GAIN_14 @@ -44459,10 +67359,10 @@ 598 0x090A //TX_FDEQ_BIN_7 599 0x0B0C //TX_FDEQ_BIN_8 600 0x0D0E //TX_FDEQ_BIN_9 -601 0x0E0F //TX_FDEQ_BIN_10 -602 0x0F10 //TX_FDEQ_BIN_11 -603 0x1011 //TX_FDEQ_BIN_12 -604 0x1104 //TX_FDEQ_BIN_13 +601 0x0F10 //TX_FDEQ_BIN_10 +602 0x1011 //TX_FDEQ_BIN_11 +603 0x1112 //TX_FDEQ_BIN_12 +604 0x120B //TX_FDEQ_BIN_13 605 0x0000 //TX_FDEQ_BIN_14 606 0x0000 //TX_FDEQ_BIN_15 607 0x0000 //TX_FDEQ_BIN_16 @@ -44482,13 +67382,13 @@ 621 0x4848 //TX_PREEQ_GAIN_MIC0_4 622 0x4848 //TX_PREEQ_GAIN_MIC0_5 623 0x4848 //TX_PREEQ_GAIN_MIC0_6 -624 0x484A //TX_PREEQ_GAIN_MIC0_7 -625 0x4C4E //TX_PREEQ_GAIN_MIC0_8 -626 0x5054 //TX_PREEQ_GAIN_MIC0_9 -627 0x5658 //TX_PREEQ_GAIN_MIC0_10 -628 0x5C5C //TX_PREEQ_GAIN_MIC0_11 -629 0x5E64 //TX_PREEQ_GAIN_MIC0_12 -630 0x6464 //TX_PREEQ_GAIN_MIC0_13 +624 0x4848 //TX_PREEQ_GAIN_MIC0_7 +625 0x484A //TX_PREEQ_GAIN_MIC0_8 +626 0x4B4C //TX_PREEQ_GAIN_MIC0_9 +627 0x4B4A //TX_PREEQ_GAIN_MIC0_10 +628 0x4A48 //TX_PREEQ_GAIN_MIC0_11 +629 0x4C4C //TX_PREEQ_GAIN_MIC0_12 +630 0x4C4C //TX_PREEQ_GAIN_MIC0_13 631 0x4848 //TX_PREEQ_GAIN_MIC0_14 632 0x4848 //TX_PREEQ_GAIN_MIC0_15 633 0x4848 //TX_PREEQ_GAIN_MIC0_16 @@ -44511,8 +67411,8 @@ 650 0x0D0E //TX_PREEQ_BIN_MIC0_9 651 0x0F10 //TX_PREEQ_BIN_MIC0_10 652 0x1011 //TX_PREEQ_BIN_MIC0_11 -653 0x1104 //TX_PREEQ_BIN_MIC0_12 -654 0x1010 //TX_PREEQ_BIN_MIC0_13 +653 0x1112 //TX_PREEQ_BIN_MIC0_12 +654 0x120B //TX_PREEQ_BIN_MIC0_13 655 0x0000 //TX_PREEQ_BIN_MIC0_14 656 0x0000 //TX_PREEQ_BIN_MIC0_15 657 0x0000 //TX_PREEQ_BIN_MIC0_16 @@ -44531,12 +67431,12 @@ 670 0x4848 //TX_PREEQ_GAIN_MIC1_4 671 0x4848 //TX_PREEQ_GAIN_MIC1_5 672 0x4848 //TX_PREEQ_GAIN_MIC1_6 -673 0x4848 //TX_PREEQ_GAIN_MIC1_7 -674 0x4848 //TX_PREEQ_GAIN_MIC1_8 -675 0x4848 //TX_PREEQ_GAIN_MIC1_9 -676 0x4848 //TX_PREEQ_GAIN_MIC1_10 -677 0x4848 //TX_PREEQ_GAIN_MIC1_11 -678 0x4848 //TX_PREEQ_GAIN_MIC1_12 +673 0x4846 //TX_PREEQ_GAIN_MIC1_7 +674 0x4544 //TX_PREEQ_GAIN_MIC1_8 +675 0x4241 //TX_PREEQ_GAIN_MIC1_9 +676 0x403E //TX_PREEQ_GAIN_MIC1_10 +677 0x3D3C //TX_PREEQ_GAIN_MIC1_11 +678 0x3C3C //TX_PREEQ_GAIN_MIC1_12 679 0x4848 //TX_PREEQ_GAIN_MIC1_13 680 0x4848 //TX_PREEQ_GAIN_MIC1_14 681 0x4848 //TX_PREEQ_GAIN_MIC1_15 @@ -44548,19 +67448,19 @@ 687 0x4848 //TX_PREEQ_GAIN_MIC1_21 688 0x4848 //TX_PREEQ_GAIN_MIC1_22 689 0x4848 //TX_PREEQ_GAIN_MIC1_23 -690 0x251A //TX_PREEQ_BIN_MIC1_0 -691 0x0F0F //TX_PREEQ_BIN_MIC1_1 -692 0x0C0C //TX_PREEQ_BIN_MIC1_2 -693 0x0C0F //TX_PREEQ_BIN_MIC1_3 -694 0x0F0F //TX_PREEQ_BIN_MIC1_4 -695 0x0F09 //TX_PREEQ_BIN_MIC1_5 -696 0x0909 //TX_PREEQ_BIN_MIC1_6 -697 0x0908 //TX_PREEQ_BIN_MIC1_7 -698 0x0700 //TX_PREEQ_BIN_MIC1_8 -699 0x0000 //TX_PREEQ_BIN_MIC1_9 -700 0x0000 //TX_PREEQ_BIN_MIC1_10 -701 0x0000 //TX_PREEQ_BIN_MIC1_11 -702 0x0000 //TX_PREEQ_BIN_MIC1_12 +690 0x0202 //TX_PREEQ_BIN_MIC1_0 +691 0x0203 //TX_PREEQ_BIN_MIC1_1 +692 0x0303 //TX_PREEQ_BIN_MIC1_2 +693 0x0304 //TX_PREEQ_BIN_MIC1_3 +694 0x0405 //TX_PREEQ_BIN_MIC1_4 +695 0x0506 //TX_PREEQ_BIN_MIC1_5 +696 0x0708 //TX_PREEQ_BIN_MIC1_6 +697 0x090A //TX_PREEQ_BIN_MIC1_7 +698 0x0B0C //TX_PREEQ_BIN_MIC1_8 +699 0x0F10 //TX_PREEQ_BIN_MIC1_9 +700 0x1011 //TX_PREEQ_BIN_MIC1_10 +701 0x1112 //TX_PREEQ_BIN_MIC1_11 +702 0x1208 //TX_PREEQ_BIN_MIC1_12 703 0x0000 //TX_PREEQ_BIN_MIC1_13 704 0x0000 //TX_PREEQ_BIN_MIC1_14 705 0x0000 //TX_PREEQ_BIN_MIC1_15 @@ -44649,7 +67549,7 @@ 788 0x7EB8 //TX_TDDRC_ALPHA_DWN_02 789 0x7EB8 //TX_TDDRC_ALPHA_DWN_03 790 0x7EB8 //TX_TDDRC_ALPHA_DWN_04 -791 0x7FFF //TX_TDDRC_TD_DRC_LIMIT +791 0x7214 //TX_TDDRC_TD_DRC_LIMIT 792 0x0800 //TX_TDDRC_POST_LIMIT_GAIN 793 0x0000 //TX_TDDRC_RESRV_0 794 0x0000 //TX_TDDRC_RESRV_1 @@ -44716,15 +67616,15 @@ 855 0x0002 //TX_TDDRC_THRD_1 856 0x1800 //TX_TDDRC_THRD_2 857 0x1800 //TX_TDDRC_THRD_3 -858 0x6000 //TX_TDDRC_SLANT_0 -859 0x6000 //TX_TDDRC_SLANT_1 +858 0x7FFF //TX_TDDRC_SLANT_0 +859 0x7FFF //TX_TDDRC_SLANT_1 860 0x0800 //TX_TDDRC_ALPHA_UP_00 861 0x7EB8 //TX_TDDRC_ALPHA_DWN_00 862 0x0000 //TX_TDDRC_HMNC_FLAG 863 0x199A //TX_TDDRC_HMNC_GAIN 864 0x0000 //TX_TDDRC_SMT_FLAG 865 0x0CCD //TX_TDDRC_SMT_W -866 0x0BE3 //TX_TDDRC_DRC_GAIN +866 0x0C97 //TX_TDDRC_DRC_GAIN 867 0x7FFF //TX_TDDRC_LMT_THRD 868 0x0000 //TX_TDDRC_LMT_ALPHA 869 0x0000 //TX_TFMASKLTH @@ -44749,14 +67649,79 @@ 888 0x0028 //TX_FASTNS_ARSPC_TH 889 0xC000 //TX_FASTNS_MASK5_TH 890 0x4848 //TX_POSTSSA_MIN_G_VR_MASK -891 0x1000 //TX_A_LESSCUT_RTO_MASK +891 0x4000 //TX_A_LESSCUT_RTO_MASK 892 0x1770 //TX_FASTNS_NOISETH 893 0xC000 //TX_FASTNS_SSA_THLFL 894 0xC000 //TX_FASTNS_SSA_THHFL 895 0xCCCC //TX_FASTNS_SSA_THLFH 896 0xD999 //TX_FASTNS_SSA_THHFH +897 0x2339 //TX_SENDFUNC_REG_MICMUTE +898 0x0021 //TX_SENDFUNC_REG_MICMUTE1 +899 0x02BC //TX_MICMUTE_RATIO_THR +900 0x0140 //TX_MICMUTE_AMP_THR +901 0x0004 //TX_MICMUTE_HPF_IND +902 0x00C0 //TX_MICMUTE_LOG_EYR_TH +903 0x0008 //TX_MICMUTE_CVG_TIME +904 0x0008 //TX_MICMUTE_RELEASE_TIME +905 0x01FE //TX_MIC_VOLUME_MIC0MUTE +906 0x0020 //TX_MICMUTE_EPD_OFFSET_0 +907 0x001E //TX_MICMUTE_FRQ_AEC_L +908 0x7999 //TX_MICMUTE_EAD_THR +909 0x7FFF //TX_MICMUTE_LAMBDA_CB_NLE +910 0x7FFF //TX_MICMUTE_LAMBDA_RE_EST +911 0x4000 //TX_DTD_THR1_MICMUTE_0 +912 0x7000 //TX_DTD_THR1_MICMUTE_1 +913 0x7FFF //TX_DTD_THR1_MICMUTE_2 +914 0x7FFF //TX_DTD_THR1_MICMUTE_3 +915 0x6CCC //TX_DTD_THR2_MICMUTE_0 +916 0x0400 //TX_MICMUTE_MIN_EQ_RE_EST_0 +917 0x0400 //TX_MICMUTE_MIN_EQ_RE_EST_1 +918 0x1000 //TX_MICMUTE_MIN_EQ_RE_EST_2 +919 0x7FFF //TX_MICMUTE_MIN_EQ_RE_EST_3 +920 0x7FFF //TX_MICMUTE_MIN_EQ_RE_EST_4 +921 0x4000 //TX_MICMUTE_C_POST_FLT +922 0x03E8 //TX_MICMUTE_DT_CUT_K +923 0x0001 //TX_MICMUTE_DT_CUT_THR +924 0x03E8 //TX_MICMUTE_DT_CUT_K2 +925 0x0001 //TX_MICMUTE_DT_CUT_THR2 +926 0x0064 //TX_MICMUTE_DT2_HOLD_N +927 0x1000 //TX_MICMUTE_RATIODTH_THCUT +928 0x1000 //TX_MICMUTE_B_POST_FLT_ECHOL +929 0x7FFF //TX_MICMUTE_B_POST_FLT_ECHOH +930 0x0400 //TX_MICMUTE_C_POST_FLT_MASK +931 0x7999 //TX_MICMUTE_RATIODTL_CUT_TH +932 0x0258 //TX_MICMUTE_DT_CUT_K1 +933 0x0800 //TX_MICMUTE_N2_SN_EST +934 0xFC00 //TX_MICMUTE_THR_SN_EST_0 +935 0x001C //TX_MICMUTE_MIN_G_CTRL_0 +936 0x6000 //TX_MICMUTE_A_POST_FILT_S_0 +937 0x7000 //TX_MICMUTE_B_POST_FILT_0 +938 0x2710 //TX_MIC1RUB_AMP_THR +939 0x0010 //TX_MIC1MUTE_RATIO_THR +940 0x0450 //TX_MIC1MUTE_AMP_THR +941 0x0008 //TX_MIC1MUTE_CVG_TIME +942 0x0008 //TX_MIC1MUTE_RELEASE_TIME +943 0x0000 //TX_AMS_RESRV_01 +944 0x0000 //TX_AMS_RESRV_02 +945 0x0000 //TX_AMS_RESRV_03 +946 0x0000 //TX_AMS_RESRV_04 +947 0x0000 //TX_AMS_RESRV_05 +948 0x0000 //TX_AMS_RESRV_06 +949 0x0000 //TX_AMS_RESRV_07 +950 0x0000 //TX_AMS_RESRV_08 +951 0x0000 //TX_AMS_RESRV_09 +952 0x0000 //TX_AMS_RESRV_10 +953 0x0000 //TX_AMS_RESRV_11 +954 0x0000 //TX_AMS_RESRV_12 +955 0x0000 //TX_AMS_RESRV_13 +956 0x0000 //TX_AMS_RESRV_14 +957 0x0000 //TX_AMS_RESRV_15 +958 0x0000 //TX_AMS_RESRV_16 +959 0x0000 //TX_AMS_RESRV_17 +960 0x0000 //TX_AMS_RESRV_18 +961 0x0000 //TX_AMS_RESRV_19 #RX -0 0x0040 //RX_RECVFUNC_MODE_0 +0 0x2040 //RX_RECVFUNC_MODE_0 1 0x0000 //RX_RECVFUNC_MODE_1 2 0x0000 //RX_SAMPLINGFREQ_SIG 3 0x0000 //RX_SAMPLINGFREQ_PROC @@ -45606,18 +68571,869 @@ 110 0x0000 //RX_FDDRC_RESRV_0 129 0x0100 //RX_SPK_VOL 130 0x0000 //RX_VOL_RESRV_0 +#RX 2 +157 0x2040 //RX_RECVFUNC_MODE_0 +158 0x0000 //RX_RECVFUNC_MODE_1 +159 0x0000 //RX_SAMPLINGFREQ_SIG +160 0x0000 //RX_SAMPLINGFREQ_PROC +161 0x000A //RX_FRAME_SZ +162 0x0000 //RX_DELAY_OPT +163 0x3000 //RX_TDDRC_ALPHA_UP_1 +164 0x3000 //RX_TDDRC_ALPHA_UP_2 +165 0x3000 //RX_TDDRC_ALPHA_UP_3 +166 0x3000 //RX_TDDRC_ALPHA_UP_4 +167 0x050D //RX_PGA +168 0x7652 //RX_A_HP +169 0x4000 //RX_B_PE +170 0x7800 //RX_THR_PITCH_DET_0 +171 0x7000 //RX_THR_PITCH_DET_1 +172 0x6000 //RX_THR_PITCH_DET_2 +173 0x0000 //RX_PITCH_BFR_LEN +174 0x0000 //RX_SBD_PITCH_DET +175 0x0000 //RX_PP_RESRV_0 +176 0x0000 //RX_PP_RESRV_1 +177 0xF800 //RX_N_SN_EST +178 0x0000 //RX_N2_SN_EST +179 0x000F //RX_NS_LVL_CTRL +180 0xF800 //RX_THR_SN_EST +181 0x7E00 //RX_LAMBDA_PFILT +182 0x000A //RX_FENS_RESRV_0 +183 0x0000 //RX_FENS_RESRV_1 +184 0x7FB0 //RX_TDDRC_ALPHA_DWN_1 +185 0x7FB0 //RX_TDDRC_ALPHA_DWN_2 +186 0x7FB0 //RX_TDDRC_ALPHA_DWN_3 +187 0x0000 //RX_EXTRA_NS_L +188 0x0000 //RX_EXTRA_NS_A +189 0x7FB0 //RX_TDDRC_ALPHA_DWN_4 +190 0xDA9E //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +192 0x0000 //RX_A_POST_FLT +193 0x0000 //RX_LMT_THRD +194 0x4000 //RX_LMT_ALPHA +195 0x0020 //RX_FDEQ_SUBNUM +196 0x4848 //RX_FDEQ_GAIN_0 +197 0x4848 //RX_FDEQ_GAIN_1 +198 0x4848 //RX_FDEQ_GAIN_2 +199 0x4848 //RX_FDEQ_GAIN_3 +200 0x4848 //RX_FDEQ_GAIN_4 +201 0x4848 //RX_FDEQ_GAIN_5 +202 0x4848 //RX_FDEQ_GAIN_6 +203 0x4848 //RX_FDEQ_GAIN_7 +204 0x4848 //RX_FDEQ_GAIN_8 +205 0x4848 //RX_FDEQ_GAIN_9 +206 0x4848 //RX_FDEQ_GAIN_10 +207 0x4848 //RX_FDEQ_GAIN_11 +208 0x4848 //RX_FDEQ_GAIN_12 +209 0x4848 //RX_FDEQ_GAIN_13 +210 0x4848 //RX_FDEQ_GAIN_14 +211 0x4848 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0000 //RX_FDEQ_BIN_0 +221 0x0000 //RX_FDEQ_BIN_1 +222 0x0000 //RX_FDEQ_BIN_2 +223 0x0000 //RX_FDEQ_BIN_3 +224 0x0000 //RX_FDEQ_BIN_4 +225 0x0000 //RX_FDEQ_BIN_5 +226 0x0000 //RX_FDEQ_BIN_6 +227 0x0000 //RX_FDEQ_BIN_7 +228 0x0000 //RX_FDEQ_BIN_8 +229 0x0000 //RX_FDEQ_BIN_9 +230 0x0000 //RX_FDEQ_BIN_10 +231 0x0000 //RX_FDEQ_BIN_11 +232 0x0000 //RX_FDEQ_BIN_12 +233 0x0000 //RX_FDEQ_BIN_13 +234 0x0000 //RX_FDEQ_BIN_14 +235 0x0000 //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x0000 //RX_FDEQ_RESRV_0 +245 0x0000 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0030 //RX_FDDRC_BAND_MARGIN_1 +248 0x0050 //RX_FDDRC_BAND_MARGIN_2 +249 0x0080 //RX_FDDRC_BAND_MARGIN_3 +250 0x0004 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x5000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x6400 //RX_FDDRC_THRD_3_2 +258 0x6400 //RX_FDDRC_THRD_3_3 +259 0x2000 //RX_FDDRC_SLANT_0_0 +260 0x2000 //RX_FDDRC_SLANT_0_1 +261 0x2000 //RX_FDDRC_SLANT_0_2 +262 0x2000 //RX_FDDRC_SLANT_0_3 +263 0x2000 //RX_FDDRC_SLANT_1_0 +264 0x2000 //RX_FDDRC_SLANT_1_1 +265 0x2000 //RX_FDDRC_SLANT_1_2 +266 0x2000 //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +268 0x0003 //RX_FILTINDX +269 0x0000 //RX_TDDRC_THRD_0 +270 0x0000 //RX_TDDRC_THRD_1 +271 0x0E80 //RX_TDDRC_THRD_2 +272 0x3800 //RX_TDDRC_THRD_3 +273 0x2A00 //RX_TDDRC_SLANT_0 +274 0x6E00 //RX_TDDRC_SLANT_1 +275 0x3000 //RX_TDDRC_ALPHA_UP_0 +276 0x7FB0 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x0000 //RX_TDDRC_HMNC_GAIN +279 0x0000 //RX_TDDRC_SMT_FLAG +280 0x0000 //RX_TDDRC_SMT_W +281 0x0100 //RX_TDDRC_DRC_GAIN +282 0x7C00 //RX_LAMBDA_PKA_FP +283 0x2000 //RX_TPKA_FP +284 0x0080 //RX_MIN_G_FP +285 0x2000 //RX_MAX_G_FP +286 0x0100 //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 +288 0x0010 //RX_MAXLEVEL_CNG +289 0x0000 //RX_BWE_UV_TH +290 0x0000 //RX_BWE_UV_TH2 +291 0x0000 //RX_BWE_UV_TH3 +292 0x0000 //RX_BWE_V_TH +293 0x0000 //RX_BWE_GAIN1_V_TH1 +294 0x0000 //RX_BWE_GAIN1_V_TH2 +295 0x0000 //RX_BWE_UV_EQ +296 0x0000 //RX_BWE_V_EQ +297 0x0000 //RX_BWE_TONE_TH +298 0x0000 //RX_BWE_UV_HOLD_T +299 0x0000 //RX_BWE_GAIN2_ALPHA +300 0x0000 //RX_BWE_GAIN3_ALPHA +301 0x0000 //RX_BWE_CUTOFF +302 0x0000 //RX_BWE_GAINFILL +303 0x0000 //RX_BWE_MAXTH_TONE +304 0x0000 //RX_BWE_EQ_0 +305 0x0000 //RX_BWE_EQ_1 +306 0x0000 //RX_BWE_EQ_2 +307 0x0000 //RX_BWE_EQ_3 +308 0x0000 //RX_BWE_EQ_4 +309 0x0000 //RX_BWE_EQ_5 +310 0x0000 //RX_BWE_EQ_6 +311 0x0000 //RX_BWE_RESRV_0 +312 0x0000 //RX_BWE_RESRV_1 +313 0x0000 //RX_BWE_RESRV_2 +#VOL 0 +163 0x3000 //RX_TDDRC_ALPHA_UP_1 +164 0x3000 //RX_TDDRC_ALPHA_UP_2 +165 0x3000 //RX_TDDRC_ALPHA_UP_3 +166 0x3000 //RX_TDDRC_ALPHA_UP_4 +184 0x7FB0 //RX_TDDRC_ALPHA_DWN_1 +185 0x7FB0 //RX_TDDRC_ALPHA_DWN_2 +186 0x7FB0 //RX_TDDRC_ALPHA_DWN_3 +189 0x7FB0 //RX_TDDRC_ALPHA_DWN_4 +190 0xDA9E //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +269 0x0000 //RX_TDDRC_THRD_0 +270 0x0000 //RX_TDDRC_THRD_1 +271 0x0E80 //RX_TDDRC_THRD_2 +272 0x3800 //RX_TDDRC_THRD_3 +273 0x2A00 //RX_TDDRC_SLANT_0 +274 0x6E00 //RX_TDDRC_SLANT_1 +275 0x3000 //RX_TDDRC_ALPHA_UP_0 +276 0x7FB0 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x0000 //RX_TDDRC_HMNC_GAIN +279 0x0000 //RX_TDDRC_SMT_FLAG +280 0x0000 //RX_TDDRC_SMT_W +281 0x0100 //RX_TDDRC_DRC_GAIN +195 0x0020 //RX_FDEQ_SUBNUM +196 0x4848 //RX_FDEQ_GAIN_0 +197 0x4848 //RX_FDEQ_GAIN_1 +198 0x4848 //RX_FDEQ_GAIN_2 +199 0x4848 //RX_FDEQ_GAIN_3 +200 0x4848 //RX_FDEQ_GAIN_4 +201 0x4848 //RX_FDEQ_GAIN_5 +202 0x4848 //RX_FDEQ_GAIN_6 +203 0x4848 //RX_FDEQ_GAIN_7 +204 0x4848 //RX_FDEQ_GAIN_8 +205 0x4848 //RX_FDEQ_GAIN_9 +206 0x4848 //RX_FDEQ_GAIN_10 +207 0x4848 //RX_FDEQ_GAIN_11 +208 0x4848 //RX_FDEQ_GAIN_12 +209 0x4848 //RX_FDEQ_GAIN_13 +210 0x4848 //RX_FDEQ_GAIN_14 +211 0x4848 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0000 //RX_FDEQ_BIN_0 +221 0x0000 //RX_FDEQ_BIN_1 +222 0x0000 //RX_FDEQ_BIN_2 +223 0x0000 //RX_FDEQ_BIN_3 +224 0x0000 //RX_FDEQ_BIN_4 +225 0x0000 //RX_FDEQ_BIN_5 +226 0x0000 //RX_FDEQ_BIN_6 +227 0x0000 //RX_FDEQ_BIN_7 +228 0x0000 //RX_FDEQ_BIN_8 +229 0x0000 //RX_FDEQ_BIN_9 +230 0x0000 //RX_FDEQ_BIN_10 +231 0x0000 //RX_FDEQ_BIN_11 +232 0x0000 //RX_FDEQ_BIN_12 +233 0x0000 //RX_FDEQ_BIN_13 +234 0x0000 //RX_FDEQ_BIN_14 +235 0x0000 //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x0000 //RX_FDEQ_RESRV_0 +245 0x0000 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0030 //RX_FDDRC_BAND_MARGIN_1 +248 0x0050 //RX_FDDRC_BAND_MARGIN_2 +249 0x0080 //RX_FDDRC_BAND_MARGIN_3 +250 0x0004 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x5000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x6400 //RX_FDDRC_THRD_3_2 +258 0x6400 //RX_FDDRC_THRD_3_3 +259 0x2000 //RX_FDDRC_SLANT_0_0 +260 0x2000 //RX_FDDRC_SLANT_0_1 +261 0x2000 //RX_FDDRC_SLANT_0_2 +262 0x2000 //RX_FDDRC_SLANT_0_3 +263 0x2000 //RX_FDDRC_SLANT_1_0 +264 0x2000 //RX_FDDRC_SLANT_1_1 +265 0x2000 //RX_FDDRC_SLANT_1_2 +266 0x2000 //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +286 0x0100 //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 +#VOL 1 +163 0x3000 //RX_TDDRC_ALPHA_UP_1 +164 0x3000 //RX_TDDRC_ALPHA_UP_2 +165 0x3000 //RX_TDDRC_ALPHA_UP_3 +166 0x3000 //RX_TDDRC_ALPHA_UP_4 +184 0x7FB0 //RX_TDDRC_ALPHA_DWN_1 +185 0x7FB0 //RX_TDDRC_ALPHA_DWN_2 +186 0x7FB0 //RX_TDDRC_ALPHA_DWN_3 +189 0x7FB0 //RX_TDDRC_ALPHA_DWN_4 +190 0xDA9E //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +269 0x0000 //RX_TDDRC_THRD_0 +270 0x0000 //RX_TDDRC_THRD_1 +271 0x0E80 //RX_TDDRC_THRD_2 +272 0x3800 //RX_TDDRC_THRD_3 +273 0x2A00 //RX_TDDRC_SLANT_0 +274 0x6E00 //RX_TDDRC_SLANT_1 +275 0x3000 //RX_TDDRC_ALPHA_UP_0 +276 0x7FB0 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x0000 //RX_TDDRC_HMNC_GAIN +279 0x0000 //RX_TDDRC_SMT_FLAG +280 0x0000 //RX_TDDRC_SMT_W +281 0x0100 //RX_TDDRC_DRC_GAIN +195 0x0020 //RX_FDEQ_SUBNUM +196 0x4848 //RX_FDEQ_GAIN_0 +197 0x4848 //RX_FDEQ_GAIN_1 +198 0x4848 //RX_FDEQ_GAIN_2 +199 0x4848 //RX_FDEQ_GAIN_3 +200 0x4848 //RX_FDEQ_GAIN_4 +201 0x4848 //RX_FDEQ_GAIN_5 +202 0x4848 //RX_FDEQ_GAIN_6 +203 0x4848 //RX_FDEQ_GAIN_7 +204 0x4848 //RX_FDEQ_GAIN_8 +205 0x4848 //RX_FDEQ_GAIN_9 +206 0x4848 //RX_FDEQ_GAIN_10 +207 0x4848 //RX_FDEQ_GAIN_11 +208 0x4848 //RX_FDEQ_GAIN_12 +209 0x4848 //RX_FDEQ_GAIN_13 +210 0x4848 //RX_FDEQ_GAIN_14 +211 0x4848 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0000 //RX_FDEQ_BIN_0 +221 0x0000 //RX_FDEQ_BIN_1 +222 0x0000 //RX_FDEQ_BIN_2 +223 0x0000 //RX_FDEQ_BIN_3 +224 0x0000 //RX_FDEQ_BIN_4 +225 0x0000 //RX_FDEQ_BIN_5 +226 0x0000 //RX_FDEQ_BIN_6 +227 0x0000 //RX_FDEQ_BIN_7 +228 0x0000 //RX_FDEQ_BIN_8 +229 0x0000 //RX_FDEQ_BIN_9 +230 0x0000 //RX_FDEQ_BIN_10 +231 0x0000 //RX_FDEQ_BIN_11 +232 0x0000 //RX_FDEQ_BIN_12 +233 0x0000 //RX_FDEQ_BIN_13 +234 0x0000 //RX_FDEQ_BIN_14 +235 0x0000 //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x0000 //RX_FDEQ_RESRV_0 +245 0x0000 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0030 //RX_FDDRC_BAND_MARGIN_1 +248 0x0050 //RX_FDDRC_BAND_MARGIN_2 +249 0x0080 //RX_FDDRC_BAND_MARGIN_3 +250 0x0004 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x5000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x6400 //RX_FDDRC_THRD_3_2 +258 0x6400 //RX_FDDRC_THRD_3_3 +259 0x2000 //RX_FDDRC_SLANT_0_0 +260 0x2000 //RX_FDDRC_SLANT_0_1 +261 0x2000 //RX_FDDRC_SLANT_0_2 +262 0x2000 //RX_FDDRC_SLANT_0_3 +263 0x2000 //RX_FDDRC_SLANT_1_0 +264 0x2000 //RX_FDDRC_SLANT_1_1 +265 0x2000 //RX_FDDRC_SLANT_1_2 +266 0x2000 //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +286 0x0100 //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 +#VOL 2 +163 0x3000 //RX_TDDRC_ALPHA_UP_1 +164 0x3000 //RX_TDDRC_ALPHA_UP_2 +165 0x3000 //RX_TDDRC_ALPHA_UP_3 +166 0x3000 //RX_TDDRC_ALPHA_UP_4 +184 0x7FB0 //RX_TDDRC_ALPHA_DWN_1 +185 0x7FB0 //RX_TDDRC_ALPHA_DWN_2 +186 0x7FB0 //RX_TDDRC_ALPHA_DWN_3 +189 0x7FB0 //RX_TDDRC_ALPHA_DWN_4 +190 0xDA9E //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +269 0x0000 //RX_TDDRC_THRD_0 +270 0x0000 //RX_TDDRC_THRD_1 +271 0x0E80 //RX_TDDRC_THRD_2 +272 0x3800 //RX_TDDRC_THRD_3 +273 0x2A00 //RX_TDDRC_SLANT_0 +274 0x6E00 //RX_TDDRC_SLANT_1 +275 0x3000 //RX_TDDRC_ALPHA_UP_0 +276 0x7FB0 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x0000 //RX_TDDRC_HMNC_GAIN +279 0x0000 //RX_TDDRC_SMT_FLAG +280 0x0000 //RX_TDDRC_SMT_W +281 0x0100 //RX_TDDRC_DRC_GAIN +195 0x0020 //RX_FDEQ_SUBNUM +196 0x4848 //RX_FDEQ_GAIN_0 +197 0x4848 //RX_FDEQ_GAIN_1 +198 0x4848 //RX_FDEQ_GAIN_2 +199 0x4848 //RX_FDEQ_GAIN_3 +200 0x4848 //RX_FDEQ_GAIN_4 +201 0x4848 //RX_FDEQ_GAIN_5 +202 0x4848 //RX_FDEQ_GAIN_6 +203 0x4848 //RX_FDEQ_GAIN_7 +204 0x4848 //RX_FDEQ_GAIN_8 +205 0x4848 //RX_FDEQ_GAIN_9 +206 0x4848 //RX_FDEQ_GAIN_10 +207 0x4848 //RX_FDEQ_GAIN_11 +208 0x4848 //RX_FDEQ_GAIN_12 +209 0x4848 //RX_FDEQ_GAIN_13 +210 0x4848 //RX_FDEQ_GAIN_14 +211 0x4848 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0000 //RX_FDEQ_BIN_0 +221 0x0000 //RX_FDEQ_BIN_1 +222 0x0000 //RX_FDEQ_BIN_2 +223 0x0000 //RX_FDEQ_BIN_3 +224 0x0000 //RX_FDEQ_BIN_4 +225 0x0000 //RX_FDEQ_BIN_5 +226 0x0000 //RX_FDEQ_BIN_6 +227 0x0000 //RX_FDEQ_BIN_7 +228 0x0000 //RX_FDEQ_BIN_8 +229 0x0000 //RX_FDEQ_BIN_9 +230 0x0000 //RX_FDEQ_BIN_10 +231 0x0000 //RX_FDEQ_BIN_11 +232 0x0000 //RX_FDEQ_BIN_12 +233 0x0000 //RX_FDEQ_BIN_13 +234 0x0000 //RX_FDEQ_BIN_14 +235 0x0000 //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x0000 //RX_FDEQ_RESRV_0 +245 0x0000 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0030 //RX_FDDRC_BAND_MARGIN_1 +248 0x0050 //RX_FDDRC_BAND_MARGIN_2 +249 0x0080 //RX_FDDRC_BAND_MARGIN_3 +250 0x0004 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x5000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x6400 //RX_FDDRC_THRD_3_2 +258 0x6400 //RX_FDDRC_THRD_3_3 +259 0x2000 //RX_FDDRC_SLANT_0_0 +260 0x2000 //RX_FDDRC_SLANT_0_1 +261 0x2000 //RX_FDDRC_SLANT_0_2 +262 0x2000 //RX_FDDRC_SLANT_0_3 +263 0x2000 //RX_FDDRC_SLANT_1_0 +264 0x2000 //RX_FDDRC_SLANT_1_1 +265 0x2000 //RX_FDDRC_SLANT_1_2 +266 0x2000 //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +286 0x0100 //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 +#VOL 3 +163 0x3000 //RX_TDDRC_ALPHA_UP_1 +164 0x3000 //RX_TDDRC_ALPHA_UP_2 +165 0x3000 //RX_TDDRC_ALPHA_UP_3 +166 0x3000 //RX_TDDRC_ALPHA_UP_4 +184 0x7FB0 //RX_TDDRC_ALPHA_DWN_1 +185 0x7FB0 //RX_TDDRC_ALPHA_DWN_2 +186 0x7FB0 //RX_TDDRC_ALPHA_DWN_3 +189 0x7FB0 //RX_TDDRC_ALPHA_DWN_4 +190 0xDA9E //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +269 0x0000 //RX_TDDRC_THRD_0 +270 0x0000 //RX_TDDRC_THRD_1 +271 0x0E80 //RX_TDDRC_THRD_2 +272 0x3800 //RX_TDDRC_THRD_3 +273 0x2A00 //RX_TDDRC_SLANT_0 +274 0x6E00 //RX_TDDRC_SLANT_1 +275 0x3000 //RX_TDDRC_ALPHA_UP_0 +276 0x7FB0 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x0000 //RX_TDDRC_HMNC_GAIN +279 0x0000 //RX_TDDRC_SMT_FLAG +280 0x0000 //RX_TDDRC_SMT_W +281 0x0100 //RX_TDDRC_DRC_GAIN +195 0x0020 //RX_FDEQ_SUBNUM +196 0x4848 //RX_FDEQ_GAIN_0 +197 0x4848 //RX_FDEQ_GAIN_1 +198 0x4848 //RX_FDEQ_GAIN_2 +199 0x4848 //RX_FDEQ_GAIN_3 +200 0x4848 //RX_FDEQ_GAIN_4 +201 0x4848 //RX_FDEQ_GAIN_5 +202 0x4848 //RX_FDEQ_GAIN_6 +203 0x4848 //RX_FDEQ_GAIN_7 +204 0x4848 //RX_FDEQ_GAIN_8 +205 0x4848 //RX_FDEQ_GAIN_9 +206 0x4848 //RX_FDEQ_GAIN_10 +207 0x4848 //RX_FDEQ_GAIN_11 +208 0x4848 //RX_FDEQ_GAIN_12 +209 0x4848 //RX_FDEQ_GAIN_13 +210 0x4848 //RX_FDEQ_GAIN_14 +211 0x4848 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0000 //RX_FDEQ_BIN_0 +221 0x0000 //RX_FDEQ_BIN_1 +222 0x0000 //RX_FDEQ_BIN_2 +223 0x0000 //RX_FDEQ_BIN_3 +224 0x0000 //RX_FDEQ_BIN_4 +225 0x0000 //RX_FDEQ_BIN_5 +226 0x0000 //RX_FDEQ_BIN_6 +227 0x0000 //RX_FDEQ_BIN_7 +228 0x0000 //RX_FDEQ_BIN_8 +229 0x0000 //RX_FDEQ_BIN_9 +230 0x0000 //RX_FDEQ_BIN_10 +231 0x0000 //RX_FDEQ_BIN_11 +232 0x0000 //RX_FDEQ_BIN_12 +233 0x0000 //RX_FDEQ_BIN_13 +234 0x0000 //RX_FDEQ_BIN_14 +235 0x0000 //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x0000 //RX_FDEQ_RESRV_0 +245 0x0000 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0030 //RX_FDDRC_BAND_MARGIN_1 +248 0x0050 //RX_FDDRC_BAND_MARGIN_2 +249 0x0080 //RX_FDDRC_BAND_MARGIN_3 +250 0x0004 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x5000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x6400 //RX_FDDRC_THRD_3_2 +258 0x6400 //RX_FDDRC_THRD_3_3 +259 0x2000 //RX_FDDRC_SLANT_0_0 +260 0x2000 //RX_FDDRC_SLANT_0_1 +261 0x2000 //RX_FDDRC_SLANT_0_2 +262 0x2000 //RX_FDDRC_SLANT_0_3 +263 0x2000 //RX_FDDRC_SLANT_1_0 +264 0x2000 //RX_FDDRC_SLANT_1_1 +265 0x2000 //RX_FDDRC_SLANT_1_2 +266 0x2000 //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +286 0x0100 //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 +#VOL 4 +163 0x3000 //RX_TDDRC_ALPHA_UP_1 +164 0x3000 //RX_TDDRC_ALPHA_UP_2 +165 0x3000 //RX_TDDRC_ALPHA_UP_3 +166 0x3000 //RX_TDDRC_ALPHA_UP_4 +184 0x7FB0 //RX_TDDRC_ALPHA_DWN_1 +185 0x7FB0 //RX_TDDRC_ALPHA_DWN_2 +186 0x7FB0 //RX_TDDRC_ALPHA_DWN_3 +189 0x7FB0 //RX_TDDRC_ALPHA_DWN_4 +190 0xDA9E //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +269 0x0000 //RX_TDDRC_THRD_0 +270 0x0000 //RX_TDDRC_THRD_1 +271 0x0E80 //RX_TDDRC_THRD_2 +272 0x3800 //RX_TDDRC_THRD_3 +273 0x2A00 //RX_TDDRC_SLANT_0 +274 0x6E00 //RX_TDDRC_SLANT_1 +275 0x3000 //RX_TDDRC_ALPHA_UP_0 +276 0x7FB0 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x0000 //RX_TDDRC_HMNC_GAIN +279 0x0000 //RX_TDDRC_SMT_FLAG +280 0x0000 //RX_TDDRC_SMT_W +281 0x0100 //RX_TDDRC_DRC_GAIN +195 0x0020 //RX_FDEQ_SUBNUM +196 0x4848 //RX_FDEQ_GAIN_0 +197 0x4848 //RX_FDEQ_GAIN_1 +198 0x4848 //RX_FDEQ_GAIN_2 +199 0x4848 //RX_FDEQ_GAIN_3 +200 0x4848 //RX_FDEQ_GAIN_4 +201 0x4848 //RX_FDEQ_GAIN_5 +202 0x4848 //RX_FDEQ_GAIN_6 +203 0x4848 //RX_FDEQ_GAIN_7 +204 0x4848 //RX_FDEQ_GAIN_8 +205 0x4848 //RX_FDEQ_GAIN_9 +206 0x4848 //RX_FDEQ_GAIN_10 +207 0x4848 //RX_FDEQ_GAIN_11 +208 0x4848 //RX_FDEQ_GAIN_12 +209 0x4848 //RX_FDEQ_GAIN_13 +210 0x4848 //RX_FDEQ_GAIN_14 +211 0x4848 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0000 //RX_FDEQ_BIN_0 +221 0x0000 //RX_FDEQ_BIN_1 +222 0x0000 //RX_FDEQ_BIN_2 +223 0x0000 //RX_FDEQ_BIN_3 +224 0x0000 //RX_FDEQ_BIN_4 +225 0x0000 //RX_FDEQ_BIN_5 +226 0x0000 //RX_FDEQ_BIN_6 +227 0x0000 //RX_FDEQ_BIN_7 +228 0x0000 //RX_FDEQ_BIN_8 +229 0x0000 //RX_FDEQ_BIN_9 +230 0x0000 //RX_FDEQ_BIN_10 +231 0x0000 //RX_FDEQ_BIN_11 +232 0x0000 //RX_FDEQ_BIN_12 +233 0x0000 //RX_FDEQ_BIN_13 +234 0x0000 //RX_FDEQ_BIN_14 +235 0x0000 //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x0000 //RX_FDEQ_RESRV_0 +245 0x0000 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0030 //RX_FDDRC_BAND_MARGIN_1 +248 0x0050 //RX_FDDRC_BAND_MARGIN_2 +249 0x0080 //RX_FDDRC_BAND_MARGIN_3 +250 0x0004 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x5000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x6400 //RX_FDDRC_THRD_3_2 +258 0x6400 //RX_FDDRC_THRD_3_3 +259 0x2000 //RX_FDDRC_SLANT_0_0 +260 0x2000 //RX_FDDRC_SLANT_0_1 +261 0x2000 //RX_FDDRC_SLANT_0_2 +262 0x2000 //RX_FDDRC_SLANT_0_3 +263 0x2000 //RX_FDDRC_SLANT_1_0 +264 0x2000 //RX_FDDRC_SLANT_1_1 +265 0x2000 //RX_FDDRC_SLANT_1_2 +266 0x2000 //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +286 0x0100 //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 +#VOL 5 +163 0x3000 //RX_TDDRC_ALPHA_UP_1 +164 0x3000 //RX_TDDRC_ALPHA_UP_2 +165 0x3000 //RX_TDDRC_ALPHA_UP_3 +166 0x3000 //RX_TDDRC_ALPHA_UP_4 +184 0x7FB0 //RX_TDDRC_ALPHA_DWN_1 +185 0x7FB0 //RX_TDDRC_ALPHA_DWN_2 +186 0x7FB0 //RX_TDDRC_ALPHA_DWN_3 +189 0x7FB0 //RX_TDDRC_ALPHA_DWN_4 +190 0xDA9E //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +269 0x0000 //RX_TDDRC_THRD_0 +270 0x0000 //RX_TDDRC_THRD_1 +271 0x0E80 //RX_TDDRC_THRD_2 +272 0x3800 //RX_TDDRC_THRD_3 +273 0x2A00 //RX_TDDRC_SLANT_0 +274 0x6E00 //RX_TDDRC_SLANT_1 +275 0x3000 //RX_TDDRC_ALPHA_UP_0 +276 0x7FB0 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x0000 //RX_TDDRC_HMNC_GAIN +279 0x0000 //RX_TDDRC_SMT_FLAG +280 0x0000 //RX_TDDRC_SMT_W +281 0x0100 //RX_TDDRC_DRC_GAIN +195 0x0020 //RX_FDEQ_SUBNUM +196 0x4848 //RX_FDEQ_GAIN_0 +197 0x4848 //RX_FDEQ_GAIN_1 +198 0x4848 //RX_FDEQ_GAIN_2 +199 0x4848 //RX_FDEQ_GAIN_3 +200 0x4848 //RX_FDEQ_GAIN_4 +201 0x4848 //RX_FDEQ_GAIN_5 +202 0x4848 //RX_FDEQ_GAIN_6 +203 0x4848 //RX_FDEQ_GAIN_7 +204 0x4848 //RX_FDEQ_GAIN_8 +205 0x4848 //RX_FDEQ_GAIN_9 +206 0x4848 //RX_FDEQ_GAIN_10 +207 0x4848 //RX_FDEQ_GAIN_11 +208 0x4848 //RX_FDEQ_GAIN_12 +209 0x4848 //RX_FDEQ_GAIN_13 +210 0x4848 //RX_FDEQ_GAIN_14 +211 0x4848 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0000 //RX_FDEQ_BIN_0 +221 0x0000 //RX_FDEQ_BIN_1 +222 0x0000 //RX_FDEQ_BIN_2 +223 0x0000 //RX_FDEQ_BIN_3 +224 0x0000 //RX_FDEQ_BIN_4 +225 0x0000 //RX_FDEQ_BIN_5 +226 0x0000 //RX_FDEQ_BIN_6 +227 0x0000 //RX_FDEQ_BIN_7 +228 0x0000 //RX_FDEQ_BIN_8 +229 0x0000 //RX_FDEQ_BIN_9 +230 0x0000 //RX_FDEQ_BIN_10 +231 0x0000 //RX_FDEQ_BIN_11 +232 0x0000 //RX_FDEQ_BIN_12 +233 0x0000 //RX_FDEQ_BIN_13 +234 0x0000 //RX_FDEQ_BIN_14 +235 0x0000 //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x0000 //RX_FDEQ_RESRV_0 +245 0x0000 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0030 //RX_FDDRC_BAND_MARGIN_1 +248 0x0050 //RX_FDDRC_BAND_MARGIN_2 +249 0x0080 //RX_FDDRC_BAND_MARGIN_3 +250 0x0004 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x5000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x6400 //RX_FDDRC_THRD_3_2 +258 0x6400 //RX_FDDRC_THRD_3_3 +259 0x2000 //RX_FDDRC_SLANT_0_0 +260 0x2000 //RX_FDDRC_SLANT_0_1 +261 0x2000 //RX_FDDRC_SLANT_0_2 +262 0x2000 //RX_FDDRC_SLANT_0_3 +263 0x2000 //RX_FDDRC_SLANT_1_0 +264 0x2000 //RX_FDDRC_SLANT_1_1 +265 0x2000 //RX_FDDRC_SLANT_1_2 +266 0x2000 //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +286 0x0100 //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 +#VOL 6 +163 0x3000 //RX_TDDRC_ALPHA_UP_1 +164 0x3000 //RX_TDDRC_ALPHA_UP_2 +165 0x3000 //RX_TDDRC_ALPHA_UP_3 +166 0x3000 //RX_TDDRC_ALPHA_UP_4 +184 0x7FB0 //RX_TDDRC_ALPHA_DWN_1 +185 0x7FB0 //RX_TDDRC_ALPHA_DWN_2 +186 0x7FB0 //RX_TDDRC_ALPHA_DWN_3 +189 0x7FB0 //RX_TDDRC_ALPHA_DWN_4 +190 0xDA9E //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +269 0x0000 //RX_TDDRC_THRD_0 +270 0x0000 //RX_TDDRC_THRD_1 +271 0x0E80 //RX_TDDRC_THRD_2 +272 0x3800 //RX_TDDRC_THRD_3 +273 0x2A00 //RX_TDDRC_SLANT_0 +274 0x6E00 //RX_TDDRC_SLANT_1 +275 0x3000 //RX_TDDRC_ALPHA_UP_0 +276 0x7FB0 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x0000 //RX_TDDRC_HMNC_GAIN +279 0x0000 //RX_TDDRC_SMT_FLAG +280 0x0000 //RX_TDDRC_SMT_W +281 0x0100 //RX_TDDRC_DRC_GAIN +195 0x0020 //RX_FDEQ_SUBNUM +196 0x4848 //RX_FDEQ_GAIN_0 +197 0x4848 //RX_FDEQ_GAIN_1 +198 0x4848 //RX_FDEQ_GAIN_2 +199 0x4848 //RX_FDEQ_GAIN_3 +200 0x4848 //RX_FDEQ_GAIN_4 +201 0x4848 //RX_FDEQ_GAIN_5 +202 0x4848 //RX_FDEQ_GAIN_6 +203 0x4848 //RX_FDEQ_GAIN_7 +204 0x4848 //RX_FDEQ_GAIN_8 +205 0x4848 //RX_FDEQ_GAIN_9 +206 0x4848 //RX_FDEQ_GAIN_10 +207 0x4848 //RX_FDEQ_GAIN_11 +208 0x4848 //RX_FDEQ_GAIN_12 +209 0x4848 //RX_FDEQ_GAIN_13 +210 0x4848 //RX_FDEQ_GAIN_14 +211 0x4848 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0000 //RX_FDEQ_BIN_0 +221 0x0000 //RX_FDEQ_BIN_1 +222 0x0000 //RX_FDEQ_BIN_2 +223 0x0000 //RX_FDEQ_BIN_3 +224 0x0000 //RX_FDEQ_BIN_4 +225 0x0000 //RX_FDEQ_BIN_5 +226 0x0000 //RX_FDEQ_BIN_6 +227 0x0000 //RX_FDEQ_BIN_7 +228 0x0000 //RX_FDEQ_BIN_8 +229 0x0000 //RX_FDEQ_BIN_9 +230 0x0000 //RX_FDEQ_BIN_10 +231 0x0000 //RX_FDEQ_BIN_11 +232 0x0000 //RX_FDEQ_BIN_12 +233 0x0000 //RX_FDEQ_BIN_13 +234 0x0000 //RX_FDEQ_BIN_14 +235 0x0000 //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x0000 //RX_FDEQ_RESRV_0 +245 0x0000 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0030 //RX_FDDRC_BAND_MARGIN_1 +248 0x0050 //RX_FDDRC_BAND_MARGIN_2 +249 0x0080 //RX_FDDRC_BAND_MARGIN_3 +250 0x0004 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x5000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x6400 //RX_FDDRC_THRD_3_2 +258 0x6400 //RX_FDDRC_THRD_3_3 +259 0x2000 //RX_FDDRC_SLANT_0_0 +260 0x2000 //RX_FDDRC_SLANT_0_1 +261 0x2000 //RX_FDDRC_SLANT_0_2 +262 0x2000 //RX_FDDRC_SLANT_0_3 +263 0x2000 //RX_FDDRC_SLANT_1_0 +264 0x2000 //RX_FDDRC_SLANT_1_1 +265 0x2000 //RX_FDDRC_SLANT_1_2 +266 0x2000 //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +286 0x0100 //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 #CASE_NAME HEADSET-TTY_VCO-VOICE_GENERIC-SWB -#PARAM_MODE FULL -#PARAM_TYPE TX+RX -#TOTAL_CUSTOM_STEP 7 +#PARAM_MODE Full +#PARAM_TYPE TX+2RX +#TOTAL_CUSTOM_STEP 7+7 #TX 0 0x0001 //TX_OPERATION_MODE_0 1 0x0001 //TX_OPERATION_MODE_1 2 0x0033 //TX_PATCH_REG -3 0x2F7C //TX_SENDFUNC_MODE_0 +3 0x6F7C //TX_SENDFUNC_MODE_0 4 0x0001 //TX_SENDFUNC_MODE_1 -5 0x0003 //TX_NUM_MIC +5 0x0002 //TX_NUM_MIC 6 0x0003 //TX_SAMPLINGFREQ_SIG 7 0x0003 //TX_SAMPLINGFREQ_PROC 8 0x000A //TX_FRAME_SZ_SIG @@ -45633,8 +69449,8 @@ 18 0x0000 //TX_SYS_RESRV_2 19 0x0000 //TX_SYS_RESRV_3 20 0x0000 //TX_DIST2REF0 -21 0x00A4 //TX_DIST2REF1 -22 0x0017 //TX_DIST2REF_02 +21 0x009D //TX_DIST2REF1 +22 0x0010 //TX_DIST2REF_02 23 0x0000 //TX_DIST2REF_03 24 0x0000 //TX_DIST2REF_04 25 0x0000 //TX_DIST2REF_05 @@ -45740,7 +69556,7 @@ 125 0x6000 //TX_C_POST_FLT_MIC_MAINBLK 126 0x6000 //TX_C_POST_FLT_MIC_REFBLK 127 0x0010 //TX_MIC_BLOCK_N -128 0x7B02 //TX_A_HP +128 0x7D83 //TX_A_HP 129 0x4000 //TX_B_PE 130 0x5000 //TX_THR_PITCH_DET_0 131 0x4800 //TX_THR_PITCH_DET_1 @@ -45777,8 +69593,8 @@ 162 0x7800 //TX_MIN_EQ_RE_EST_10 163 0x7800 //TX_MIN_EQ_RE_EST_11 164 0x7800 //TX_MIN_EQ_RE_EST_12 -165 0x4000 //TX_LAMBDA_RE_EST -166 0x3000 //TX_LAMBDA_CB_NLE +165 0x0880 //TX_LAMBDA_RE_EST +166 0x7FFF //TX_LAMBDA_CB_NLE 167 0x7FFF //TX_C_POST_FLT 168 0x4000 //TX_GAIN_NP 169 0x0180 //TX_SE_HOLD_N @@ -45837,16 +69653,16 @@ 222 0x023E //TX_ADPT_STRICT_H 223 0x0BB8 //TX_RATIO_DT_L_TH_LOW 224 0x3A98 //TX_RATIO_DT_H_TH_LOW -225 0x1F40 //TX_RATIO_DT_L_TH_HIGH -226 0x6590 //TX_RATIO_DT_H_TH_HIGH +225 0x1770 //TX_RATIO_DT_L_TH_HIGH +226 0x733C //TX_RATIO_DT_H_TH_HIGH 227 0x09C4 //TX_RATIO_DT_L0_TH -228 0x2000 //TX_B_POST_FILT_ECHO_L -229 0x1000 //TX_B_POST_FILT_ECHO_H +228 0x7FFF //TX_B_POST_FILT_ECHO_L +229 0x7FFF //TX_B_POST_FILT_ECHO_H 230 0x0200 //TX_MIN_G_CTRL_ECHO 231 0x1000 //TX_B_LESSCUT_RTO_ECHO 232 0x0000 //TX_EPD_OFFSET_00 233 0x0000 //TX_EPD_OFFST_01 -234 0x2328 //TX_RATIO_DT_L0_TH_HIGH +234 0x3A98 //TX_RATIO_DT_L0_TH_HIGH 235 0x7FFF //TX_RATIO_DT_H_TH_CUT 236 0x7FFF //TX_MIN_EQ_RE_EST_13 237 0x0000 //TX_DTD_THR1_7 @@ -45854,7 +69670,7 @@ 239 0x0800 //TX_DT_RESRV_7 240 0x0800 //TX_DT_RESRV_8 241 0x0000 //TX_DT_RESRV_9 -242 0xF800 //TX_THR_SN_EST_0 +242 0xFA00 //TX_THR_SN_EST_0 243 0xFA00 //TX_THR_SN_EST_1 244 0xFA00 //TX_THR_SN_EST_2 245 0xFA00 //TX_THR_SN_EST_3 @@ -45865,10 +69681,10 @@ 250 0x0100 //TX_DELTA_THR_SN_EST_0 251 0x0100 //TX_DELTA_THR_SN_EST_1 252 0x0100 //TX_DELTA_THR_SN_EST_2 -253 0x0100 //TX_DELTA_THR_SN_EST_3 -254 0x0000 //TX_DELTA_THR_SN_EST_4 -255 0x0100 //TX_DELTA_THR_SN_EST_5 -256 0x0200 //TX_DELTA_THR_SN_EST_6 +253 0x0000 //TX_DELTA_THR_SN_EST_3 +254 0x0100 //TX_DELTA_THR_SN_EST_4 +255 0x0200 //TX_DELTA_THR_SN_EST_5 +256 0x0100 //TX_DELTA_THR_SN_EST_6 257 0x0200 //TX_DELTA_THR_SN_EST_7 258 0x4000 //TX_LAMBDA_NN_EST_0 259 0x4000 //TX_LAMBDA_NN_EST_1 @@ -45895,11 +69711,11 @@ 280 0x1000 //TX_B_POST_FLT_1 281 0x0010 //TX_NS_LVL_CTRL_0 282 0x003C //TX_NS_LVL_CTRL_1 -283 0x003C //TX_NS_LVL_CTRL_2 -284 0x0024 //TX_NS_LVL_CTRL_3 -285 0x003C //TX_NS_LVL_CTRL_4 -286 0x0014 //TX_NS_LVL_CTRL_5 -287 0x0011 //TX_NS_LVL_CTRL_6 +283 0x0024 //TX_NS_LVL_CTRL_2 +284 0x003C //TX_NS_LVL_CTRL_3 +285 0x0014 //TX_NS_LVL_CTRL_4 +286 0x0011 //TX_NS_LVL_CTRL_5 +287 0x003C //TX_NS_LVL_CTRL_6 288 0x0011 //TX_NS_LVL_CTRL_7 289 0x000F //TX_MIN_GAIN_S_0 290 0x0010 //TX_MIN_GAIN_S_1 @@ -45915,10 +69731,10 @@ 300 0x7FFF //TX_SNRI_SUP_0 301 0x1400 //TX_SNRI_SUP_1 302 0x1400 //TX_SNRI_SUP_2 -303 0x1400 //TX_SNRI_SUP_3 +303 0x4000 //TX_SNRI_SUP_3 304 0x4000 //TX_SNRI_SUP_4 -305 0x4000 //TX_SNRI_SUP_5 -306 0x50C0 //TX_SNRI_SUP_6 +305 0x50C0 //TX_SNRI_SUP_5 +306 0x1400 //TX_SNRI_SUP_6 307 0x7FFF //TX_SNRI_SUP_7 308 0x7FFF //TX_THR_LFNS 309 0x0018 //TX_G_LFNS @@ -45927,19 +69743,19 @@ 312 0x7FFF //TX_A_POST_FILT_0 313 0x2000 //TX_A_POST_FILT_1 314 0x5000 //TX_A_POST_FILT_S_0 -315 0x7C00 //TX_A_POST_FILT_S_1 -316 0x4C00 //TX_A_POST_FILT_S_2 -317 0x4000 //TX_A_POST_FILT_S_3 -318 0x6000 //TX_A_POST_FILT_S_4 -319 0x4000 //TX_A_POST_FILT_S_5 -320 0x5000 //TX_A_POST_FILT_S_6 +315 0x4C00 //TX_A_POST_FILT_S_1 +316 0x4000 //TX_A_POST_FILT_S_2 +317 0x6000 //TX_A_POST_FILT_S_3 +318 0x4000 //TX_A_POST_FILT_S_4 +319 0x5000 //TX_A_POST_FILT_S_5 +320 0x7C00 //TX_A_POST_FILT_S_6 321 0x7000 //TX_A_POST_FILT_S_7 322 0x2000 //TX_B_POST_FILT_0 -323 0x1000 //TX_B_POST_FILT_1 +323 0x6000 //TX_B_POST_FILT_1 324 0x6000 //TX_B_POST_FILT_2 325 0x6000 //TX_B_POST_FILT_3 -326 0x6000 //TX_B_POST_FILT_4 -327 0x4000 //TX_B_POST_FILT_5 +326 0x4000 //TX_B_POST_FILT_4 +327 0x1000 //TX_B_POST_FILT_5 328 0x1000 //TX_B_POST_FILT_6 329 0x2000 //TX_B_POST_FILT_7 330 0x4000 //TX_B_LESSCUT_RTO_S_0 @@ -45947,8 +69763,8 @@ 332 0x7FFF //TX_B_LESSCUT_RTO_S_2 333 0x7FFF //TX_B_LESSCUT_RTO_S_3 334 0x7FFF //TX_B_LESSCUT_RTO_S_4 -335 0x7FFF //TX_B_LESSCUT_RTO_S_5 -336 0x6000 //TX_B_LESSCUT_RTO_S_6 +335 0x6000 //TX_B_LESSCUT_RTO_S_5 +336 0x7FFF //TX_B_LESSCUT_RTO_S_6 337 0x7FFF //TX_B_LESSCUT_RTO_S_7 338 0x7C00 //TX_LAMBDA_PFILT 339 0x7D00 //TX_LAMBDA_PFILT_S_0 @@ -45979,7 +69795,7 @@ 364 0x0000 //TX_K_APT 365 0x0001 //TX_NOISEDET 366 0x0064 //TX_NDETCT -367 0x0050 //TX_NOISE_TH_0 +367 0x0383 //TX_NOISE_TH_0 368 0x7FFF //TX_NOISE_TH_0_2 369 0x7FFF //TX_NOISE_TH_0_3 370 0x07D0 //TX_NOISE_TH_1 @@ -45991,11 +69807,11 @@ 376 0x0000 //TX_NOISE_TH_5_3 377 0x7FFF //TX_NOISE_TH_5_4 378 0x0DAC //TX_NOISE_TH_6 -379 0x0050 //TX_MINENOISE_TH -380 0x4000 //TX_MINENOISE_MIC0_TH_MTS -381 0xFFEE //TX_MINENOISE_MIC0_TH_EXP -382 0x6000 //TX_MINENOISE_MIC0_S_TH_MTS -383 0xFFF3 //TX_MINENOISE_MIC0_S_TH_EXP +379 0x044C //TX_MINENOISE_TH +380 0xD508 //TX_MORENS_TFMASK_TH +381 0x0001 //TX_DRC_QUIET_FLOOR +382 0x3A98 //TX_RATIODTL_CUT_TH +383 0x0DAC //TX_DT_CUT_K1 384 0x0666 //TX_OUT_ENER_S_TH_CLEAN 385 0x0666 //TX_OUT_ENER_S_TH_LESSCLEAN 386 0x0333 //TX_OUT_ENER_S_TH_NOISY @@ -46003,22 +69819,22 @@ 388 0x0333 //TX_OUT_ENER_TH_SPEECH 389 0x2000 //TX_SN_NPB_GAIN 390 0x0000 //TX_NN_NPB_GAIN -391 0x0000 //TX_CSX_ALPHA_0 -392 0x0000 //TX_CSX_ALPHA_1 -393 0x0000 //TX_CSX_ALPHA_2 -394 0x0000 //TX_CSX_ALPHA_3 -395 0x0800 //TX_MU_ARSP_EST -396 0x00C8 //TX_P_OUTBEAM_MIN_TH +391 0x7FFF //TX_POST_MASK_SUP_HSNE +392 0x1388 //TX_TAIL_DET_TH +393 0x4000 //TX_B_LESSCUT_RTO_WTA +394 0x0000 //TX_MEL_G_R +395 0x0080 //TX_SUPHIGH_TH +396 0x0000 //TX_MASK_G_R 397 0x0002 //TX_EXTRA_NS_L -398 0x0800 //TX_EXTRA_NS_A -399 0x0005 //TX_VR_NOISE_FLOOR_TH +398 0x1800 //TX_C_POST_FLT_MASK +399 0x7FFF //TX_A_POST_FLT_WNS 400 0x0148 //TX_MIN_G_LOW300HZ -401 0x0001 //TX_MAXLEVEL_CNG +401 0x0004 //TX_MAXLEVEL_CNG 402 0x00B4 //TX_STN_NOISE_TH 403 0x4000 //TX_POST_MASK_SUP 404 0x7FFF //TX_POST_MASK_ADJUST 405 0x00C8 //TX_NS_ENOISE_MIC0_TH -406 0x0050 //TX_MINENOISE_MIC0_TH +406 0x02F3 //TX_MINENOISE_MIC0_TH 407 0x012C //TX_MINENOISE_MIC0_S_TH 408 0x4000 //TX_MIN_G_CTRL_SSNS 409 0x0000 //TX_METAL_RTO_THR @@ -46126,16 +69942,16 @@ 511 0x6666 //TX_MIC_TO_BFGAIN 512 0x0000 //TX_MICTOBFGAIN0 513 0x0000 //TX_FASTMUE_TH -514 0x0000 //TX_DERVB_LEN_0 -515 0x0000 //TX_DERVB_LEN_1 -516 0x0000 //TX_RHO_DERVB -517 0x0000 //TX_MIC_INDX_DERVB -518 0x0000 //TX_MU_DERVB -519 0x0000 //TX_DR_RESRV_0 -520 0x0000 //TX_DR_RESRV_1 -521 0x0000 //TX_DR_RESRV_2 -522 0x0000 //TX_DR_RESRV_3 -523 0x0000 //TX_DR_RESRV_4 +514 0xC000 //TX_DEREVERB_LF_MU +515 0xC000 //TX_DEREVERB_HF_MU +516 0xCCCC //TX_DEREVERB_DELAY +517 0xD999 //TX_DEREVERB_COEF_LEN +518 0x1F40 //TX_DEREVERB_DNR +519 0x0000 //TX_DEREVERB_ALPHA +520 0x0000 //TX_DEREVERB_BETA +521 0x0000 //TX_GSC_RTOL_TH +522 0x7000 //TX_GSC_RTOH_TH +523 0x0064 //TX_WIDE2_MEANHTH 524 0x0000 //TX_DR_RESRV_5 525 0x0000 //TX_DR_RESRV_6 526 0x0000 //TX_DR_RESRV_7 @@ -46179,22 +69995,22 @@ 564 0x0000 //TX_PB_RESRV_0 565 0x0000 //TX_PB_RESRV_1 566 0x0020 //TX_FDEQ_SUBNUM -567 0x4848 //TX_FDEQ_GAIN_0 -568 0x4848 //TX_FDEQ_GAIN_1 +567 0x5450 //TX_FDEQ_GAIN_0 +568 0x4C48 //TX_FDEQ_GAIN_1 569 0x4850 //TX_FDEQ_GAIN_2 570 0x5050 //TX_FDEQ_GAIN_3 571 0x4848 //TX_FDEQ_GAIN_4 -572 0x484A //TX_FDEQ_GAIN_5 +572 0x484E //TX_FDEQ_GAIN_5 573 0x4E5E //TX_FDEQ_GAIN_6 -574 0x5C4C //TX_FDEQ_GAIN_7 +574 0x584E //TX_FDEQ_GAIN_7 575 0x4C4E //TX_FDEQ_GAIN_8 -576 0x4844 //TX_FDEQ_GAIN_9 -577 0x4448 //TX_FDEQ_GAIN_10 -578 0x4850 //TX_FDEQ_GAIN_11 -579 0x5C6A //TX_FDEQ_GAIN_12 -580 0x5A84 //TX_FDEQ_GAIN_13 -581 0x7880 //TX_FDEQ_GAIN_14 -582 0x7F7F //TX_FDEQ_GAIN_15 +576 0x564E //TX_FDEQ_GAIN_9 +577 0x5058 //TX_FDEQ_GAIN_10 +578 0x625C //TX_FDEQ_GAIN_11 +579 0x6C6C //TX_FDEQ_GAIN_12 +580 0x7086 //TX_FDEQ_GAIN_13 +581 0x869C //TX_FDEQ_GAIN_14 +582 0xB0B0 //TX_FDEQ_GAIN_15 583 0x4848 //TX_FDEQ_GAIN_16 584 0x4848 //TX_FDEQ_GAIN_17 585 0x4848 //TX_FDEQ_GAIN_18 @@ -46218,7 +70034,7 @@ 603 0x1B1E //TX_FDEQ_BIN_12 604 0x1E1E //TX_FDEQ_BIN_13 605 0x1E28 //TX_FDEQ_BIN_14 -606 0x282C //TX_FDEQ_BIN_15 +606 0x284A //TX_FDEQ_BIN_15 607 0x0000 //TX_FDEQ_BIN_16 608 0x0000 //TX_FDEQ_BIN_17 609 0x0000 //TX_FDEQ_BIN_18 @@ -46236,15 +70052,15 @@ 621 0x4848 //TX_PREEQ_GAIN_MIC0_4 622 0x4848 //TX_PREEQ_GAIN_MIC0_5 623 0x4848 //TX_PREEQ_GAIN_MIC0_6 -624 0x484A //TX_PREEQ_GAIN_MIC0_7 -625 0x4C4E //TX_PREEQ_GAIN_MIC0_8 -626 0x5054 //TX_PREEQ_GAIN_MIC0_9 -627 0x5658 //TX_PREEQ_GAIN_MIC0_10 -628 0x5C5C //TX_PREEQ_GAIN_MIC0_11 -629 0x6474 //TX_PREEQ_GAIN_MIC0_12 -630 0x7870 //TX_PREEQ_GAIN_MIC0_13 -631 0x5C48 //TX_PREEQ_GAIN_MIC0_14 -632 0x383C //TX_PREEQ_GAIN_MIC0_15 +624 0x4848 //TX_PREEQ_GAIN_MIC0_7 +625 0x494A //TX_PREEQ_GAIN_MIC0_8 +626 0x4B4C //TX_PREEQ_GAIN_MIC0_9 +627 0x4B4A //TX_PREEQ_GAIN_MIC0_10 +628 0x484B //TX_PREEQ_GAIN_MIC0_11 +629 0x4C4C //TX_PREEQ_GAIN_MIC0_12 +630 0x4B48 //TX_PREEQ_GAIN_MIC0_13 +631 0x3838 //TX_PREEQ_GAIN_MIC0_14 +632 0x3835 //TX_PREEQ_GAIN_MIC0_15 633 0x4848 //TX_PREEQ_GAIN_MIC0_16 634 0x4848 //TX_PREEQ_GAIN_MIC0_17 635 0x4848 //TX_PREEQ_GAIN_MIC0_18 @@ -46285,15 +70101,15 @@ 670 0x4848 //TX_PREEQ_GAIN_MIC1_4 671 0x4848 //TX_PREEQ_GAIN_MIC1_5 672 0x4848 //TX_PREEQ_GAIN_MIC1_6 -673 0x4848 //TX_PREEQ_GAIN_MIC1_7 -674 0x4848 //TX_PREEQ_GAIN_MIC1_8 -675 0x4848 //TX_PREEQ_GAIN_MIC1_9 -676 0x4848 //TX_PREEQ_GAIN_MIC1_10 -677 0x4848 //TX_PREEQ_GAIN_MIC1_11 -678 0x4848 //TX_PREEQ_GAIN_MIC1_12 -679 0x4848 //TX_PREEQ_GAIN_MIC1_13 -680 0x4848 //TX_PREEQ_GAIN_MIC1_14 -681 0x4848 //TX_PREEQ_GAIN_MIC1_15 +673 0x4846 //TX_PREEQ_GAIN_MIC1_7 +674 0x4544 //TX_PREEQ_GAIN_MIC1_8 +675 0x4241 //TX_PREEQ_GAIN_MIC1_9 +676 0x403E //TX_PREEQ_GAIN_MIC1_10 +677 0x3D3C //TX_PREEQ_GAIN_MIC1_11 +678 0x3C3C //TX_PREEQ_GAIN_MIC1_12 +679 0x3C39 //TX_PREEQ_GAIN_MIC1_13 +680 0x3838 //TX_PREEQ_GAIN_MIC1_14 +681 0x3A3C //TX_PREEQ_GAIN_MIC1_15 682 0x4848 //TX_PREEQ_GAIN_MIC1_16 683 0x4848 //TX_PREEQ_GAIN_MIC1_17 684 0x4848 //TX_PREEQ_GAIN_MIC1_18 @@ -46302,22 +70118,22 @@ 687 0x4848 //TX_PREEQ_GAIN_MIC1_21 688 0x4848 //TX_PREEQ_GAIN_MIC1_22 689 0x4848 //TX_PREEQ_GAIN_MIC1_23 -690 0x251A //TX_PREEQ_BIN_MIC1_0 -691 0x0F0F //TX_PREEQ_BIN_MIC1_1 -692 0x0C0C //TX_PREEQ_BIN_MIC1_2 -693 0x0C0F //TX_PREEQ_BIN_MIC1_3 -694 0x0F0F //TX_PREEQ_BIN_MIC1_4 -695 0x0F09 //TX_PREEQ_BIN_MIC1_5 -696 0x0909 //TX_PREEQ_BIN_MIC1_6 -697 0x0908 //TX_PREEQ_BIN_MIC1_7 -698 0x070F //TX_PREEQ_BIN_MIC1_8 -699 0x1F08 //TX_PREEQ_BIN_MIC1_9 -700 0x0808 //TX_PREEQ_BIN_MIC1_10 -701 0x0920 //TX_PREEQ_BIN_MIC1_11 -702 0x2020 //TX_PREEQ_BIN_MIC1_12 -703 0x2021 //TX_PREEQ_BIN_MIC1_13 -704 0x0000 //TX_PREEQ_BIN_MIC1_14 -705 0x0000 //TX_PREEQ_BIN_MIC1_15 +690 0x0202 //TX_PREEQ_BIN_MIC1_0 +691 0x0203 //TX_PREEQ_BIN_MIC1_1 +692 0x0303 //TX_PREEQ_BIN_MIC1_2 +693 0x0304 //TX_PREEQ_BIN_MIC1_3 +694 0x0405 //TX_PREEQ_BIN_MIC1_4 +695 0x0506 //TX_PREEQ_BIN_MIC1_5 +696 0x0708 //TX_PREEQ_BIN_MIC1_6 +697 0x090A //TX_PREEQ_BIN_MIC1_7 +698 0x0B0C //TX_PREEQ_BIN_MIC1_8 +699 0x0D0E //TX_PREEQ_BIN_MIC1_9 +700 0x1013 //TX_PREEQ_BIN_MIC1_10 +701 0x1719 //TX_PREEQ_BIN_MIC1_11 +702 0x1B1E //TX_PREEQ_BIN_MIC1_12 +703 0x1E1E //TX_PREEQ_BIN_MIC1_13 +704 0x1E28 //TX_PREEQ_BIN_MIC1_14 +705 0x282C //TX_PREEQ_BIN_MIC1_15 706 0x0000 //TX_PREEQ_BIN_MIC1_16 707 0x0000 //TX_PREEQ_BIN_MIC1_17 708 0x0000 //TX_PREEQ_BIN_MIC1_18 @@ -46403,7 +70219,7 @@ 788 0x7EB8 //TX_TDDRC_ALPHA_DWN_02 789 0x7EB8 //TX_TDDRC_ALPHA_DWN_03 790 0x7EB8 //TX_TDDRC_ALPHA_DWN_04 -791 0x7FFF //TX_TDDRC_TD_DRC_LIMIT +791 0x7214 //TX_TDDRC_TD_DRC_LIMIT 792 0x0800 //TX_TDDRC_POST_LIMIT_GAIN 793 0x0000 //TX_TDDRC_RESRV_0 794 0x0000 //TX_TDDRC_RESRV_1 @@ -46466,12 +70282,12 @@ 851 0x0000 //TX_FFP_RESRV_5 852 0x0000 //TX_FFP_RESRV_6 853 0x0002 //TX_FILTINDX -854 0x0001 //TX_TDDRC_THRD_0 -855 0x0002 //TX_TDDRC_THRD_1 -856 0x1000 //TX_TDDRC_THRD_2 -857 0x1000 //TX_TDDRC_THRD_3 -858 0x6000 //TX_TDDRC_SLANT_0 -859 0x6000 //TX_TDDRC_SLANT_1 +854 0x0003 //TX_TDDRC_THRD_0 +855 0x0004 //TX_TDDRC_THRD_1 +856 0x1800 //TX_TDDRC_THRD_2 +857 0x1800 //TX_TDDRC_THRD_3 +858 0x7FFF //TX_TDDRC_SLANT_0 +859 0x7FFF //TX_TDDRC_SLANT_1 860 0x0800 //TX_TDDRC_ALPHA_UP_00 861 0x7EB8 //TX_TDDRC_ALPHA_DWN_00 862 0x0000 //TX_TDDRC_HMNC_FLAG @@ -46501,7 +70317,7 @@ 886 0x0CCD //TX_FASTNS_TFMASKBIN_TH2 887 0x0CCD //TX_FASTNS_TFMASKBIN_TH3 888 0x00C8 //TX_FASTNS_ARSPC_TH -889 0xC000 //TX_FASTNS_MASK5_TH +889 0x8000 //TX_FASTNS_MASK5_TH 890 0x4848 //TX_POSTSSA_MIN_G_VR_MASK 891 0x4000 //TX_A_LESSCUT_RTO_MASK 892 0x1770 //TX_FASTNS_NOISETH @@ -46509,8 +70325,73 @@ 894 0xC000 //TX_FASTNS_SSA_THHFL 895 0xCCCC //TX_FASTNS_SSA_THLFH 896 0xD999 //TX_FASTNS_SSA_THHFH +897 0x2339 //TX_SENDFUNC_REG_MICMUTE +898 0x0021 //TX_SENDFUNC_REG_MICMUTE1 +899 0x02BC //TX_MICMUTE_RATIO_THR +900 0x0140 //TX_MICMUTE_AMP_THR +901 0x0004 //TX_MICMUTE_HPF_IND +902 0x00C0 //TX_MICMUTE_LOG_EYR_TH +903 0x0008 //TX_MICMUTE_CVG_TIME +904 0x0008 //TX_MICMUTE_RELEASE_TIME +905 0x01FE //TX_MIC_VOLUME_MIC0MUTE +906 0x0020 //TX_MICMUTE_EPD_OFFSET_0 +907 0x001E //TX_MICMUTE_FRQ_AEC_L +908 0x7999 //TX_MICMUTE_EAD_THR +909 0x7FFF //TX_MICMUTE_LAMBDA_CB_NLE +910 0x7FFF //TX_MICMUTE_LAMBDA_RE_EST +911 0x4000 //TX_DTD_THR1_MICMUTE_0 +912 0x7000 //TX_DTD_THR1_MICMUTE_1 +913 0x7FFF //TX_DTD_THR1_MICMUTE_2 +914 0x7FFF //TX_DTD_THR1_MICMUTE_3 +915 0x6CCC //TX_DTD_THR2_MICMUTE_0 +916 0x0400 //TX_MICMUTE_MIN_EQ_RE_EST_0 +917 0x0400 //TX_MICMUTE_MIN_EQ_RE_EST_1 +918 0x1000 //TX_MICMUTE_MIN_EQ_RE_EST_2 +919 0x7FFF //TX_MICMUTE_MIN_EQ_RE_EST_3 +920 0x7FFF //TX_MICMUTE_MIN_EQ_RE_EST_4 +921 0x4000 //TX_MICMUTE_C_POST_FLT +922 0x03E8 //TX_MICMUTE_DT_CUT_K +923 0x0001 //TX_MICMUTE_DT_CUT_THR +924 0x03E8 //TX_MICMUTE_DT_CUT_K2 +925 0x0001 //TX_MICMUTE_DT_CUT_THR2 +926 0x0064 //TX_MICMUTE_DT2_HOLD_N +927 0x1000 //TX_MICMUTE_RATIODTH_THCUT +928 0x1000 //TX_MICMUTE_B_POST_FLT_ECHOL +929 0x7FFF //TX_MICMUTE_B_POST_FLT_ECHOH +930 0x0400 //TX_MICMUTE_C_POST_FLT_MASK +931 0x7999 //TX_MICMUTE_RATIODTL_CUT_TH +932 0x0258 //TX_MICMUTE_DT_CUT_K1 +933 0x0800 //TX_MICMUTE_N2_SN_EST +934 0xFC00 //TX_MICMUTE_THR_SN_EST_0 +935 0x001C //TX_MICMUTE_MIN_G_CTRL_0 +936 0x6000 //TX_MICMUTE_A_POST_FILT_S_0 +937 0x7000 //TX_MICMUTE_B_POST_FILT_0 +938 0x2710 //TX_MIC1RUB_AMP_THR +939 0x0010 //TX_MIC1MUTE_RATIO_THR +940 0x0450 //TX_MIC1MUTE_AMP_THR +941 0x0008 //TX_MIC1MUTE_CVG_TIME +942 0x0008 //TX_MIC1MUTE_RELEASE_TIME +943 0x0000 //TX_AMS_RESRV_01 +944 0x0000 //TX_AMS_RESRV_02 +945 0x0000 //TX_AMS_RESRV_03 +946 0x0000 //TX_AMS_RESRV_04 +947 0x0000 //TX_AMS_RESRV_05 +948 0x0000 //TX_AMS_RESRV_06 +949 0x0000 //TX_AMS_RESRV_07 +950 0x0000 //TX_AMS_RESRV_08 +951 0x0000 //TX_AMS_RESRV_09 +952 0x0000 //TX_AMS_RESRV_10 +953 0x0000 //TX_AMS_RESRV_11 +954 0x0000 //TX_AMS_RESRV_12 +955 0x0000 //TX_AMS_RESRV_13 +956 0x0000 //TX_AMS_RESRV_14 +957 0x0000 //TX_AMS_RESRV_15 +958 0x0000 //TX_AMS_RESRV_16 +959 0x0000 //TX_AMS_RESRV_17 +960 0x0000 //TX_AMS_RESRV_18 +961 0x0000 //TX_AMS_RESRV_19 #RX -0 0x0040 //RX_RECVFUNC_MODE_0 +0 0x2040 //RX_RECVFUNC_MODE_0 1 0x0000 //RX_RECVFUNC_MODE_1 2 0x0000 //RX_SAMPLINGFREQ_SIG 3 0x0000 //RX_SAMPLINGFREQ_PROC @@ -47360,18 +71241,869 @@ 110 0x0000 //RX_FDDRC_RESRV_0 129 0x0100 //RX_SPK_VOL 130 0x0000 //RX_VOL_RESRV_0 +#RX 2 +157 0x2040 //RX_RECVFUNC_MODE_0 +158 0x0000 //RX_RECVFUNC_MODE_1 +159 0x0000 //RX_SAMPLINGFREQ_SIG +160 0x0000 //RX_SAMPLINGFREQ_PROC +161 0x000A //RX_FRAME_SZ +162 0x0000 //RX_DELAY_OPT +163 0x3000 //RX_TDDRC_ALPHA_UP_1 +164 0x3000 //RX_TDDRC_ALPHA_UP_2 +165 0x3000 //RX_TDDRC_ALPHA_UP_3 +166 0x3000 //RX_TDDRC_ALPHA_UP_4 +167 0x050D //RX_PGA +168 0x7652 //RX_A_HP +169 0x4000 //RX_B_PE +170 0x7800 //RX_THR_PITCH_DET_0 +171 0x7000 //RX_THR_PITCH_DET_1 +172 0x6000 //RX_THR_PITCH_DET_2 +173 0x0000 //RX_PITCH_BFR_LEN +174 0x0000 //RX_SBD_PITCH_DET +175 0x0000 //RX_PP_RESRV_0 +176 0x0000 //RX_PP_RESRV_1 +177 0xF800 //RX_N_SN_EST +178 0x0000 //RX_N2_SN_EST +179 0x000F //RX_NS_LVL_CTRL +180 0xF800 //RX_THR_SN_EST +181 0x7E00 //RX_LAMBDA_PFILT +182 0x000A //RX_FENS_RESRV_0 +183 0x0000 //RX_FENS_RESRV_1 +184 0x7FB0 //RX_TDDRC_ALPHA_DWN_1 +185 0x7FB0 //RX_TDDRC_ALPHA_DWN_2 +186 0x7FB0 //RX_TDDRC_ALPHA_DWN_3 +187 0x0000 //RX_EXTRA_NS_L +188 0x0000 //RX_EXTRA_NS_A +189 0x7FB0 //RX_TDDRC_ALPHA_DWN_4 +190 0xDA9E //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +192 0x0000 //RX_A_POST_FLT +193 0x0000 //RX_LMT_THRD +194 0x4000 //RX_LMT_ALPHA +195 0x0020 //RX_FDEQ_SUBNUM +196 0x4848 //RX_FDEQ_GAIN_0 +197 0x4848 //RX_FDEQ_GAIN_1 +198 0x4848 //RX_FDEQ_GAIN_2 +199 0x4848 //RX_FDEQ_GAIN_3 +200 0x4848 //RX_FDEQ_GAIN_4 +201 0x4848 //RX_FDEQ_GAIN_5 +202 0x4848 //RX_FDEQ_GAIN_6 +203 0x4848 //RX_FDEQ_GAIN_7 +204 0x4848 //RX_FDEQ_GAIN_8 +205 0x4848 //RX_FDEQ_GAIN_9 +206 0x4848 //RX_FDEQ_GAIN_10 +207 0x4848 //RX_FDEQ_GAIN_11 +208 0x4848 //RX_FDEQ_GAIN_12 +209 0x4848 //RX_FDEQ_GAIN_13 +210 0x4848 //RX_FDEQ_GAIN_14 +211 0x4848 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0000 //RX_FDEQ_BIN_0 +221 0x0000 //RX_FDEQ_BIN_1 +222 0x0000 //RX_FDEQ_BIN_2 +223 0x0000 //RX_FDEQ_BIN_3 +224 0x0000 //RX_FDEQ_BIN_4 +225 0x0000 //RX_FDEQ_BIN_5 +226 0x0000 //RX_FDEQ_BIN_6 +227 0x0000 //RX_FDEQ_BIN_7 +228 0x0000 //RX_FDEQ_BIN_8 +229 0x0000 //RX_FDEQ_BIN_9 +230 0x0000 //RX_FDEQ_BIN_10 +231 0x0000 //RX_FDEQ_BIN_11 +232 0x0000 //RX_FDEQ_BIN_12 +233 0x0000 //RX_FDEQ_BIN_13 +234 0x0000 //RX_FDEQ_BIN_14 +235 0x0000 //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x0000 //RX_FDEQ_RESRV_0 +245 0x0000 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0030 //RX_FDDRC_BAND_MARGIN_1 +248 0x0050 //RX_FDDRC_BAND_MARGIN_2 +249 0x0080 //RX_FDDRC_BAND_MARGIN_3 +250 0x0004 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x5000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x6400 //RX_FDDRC_THRD_3_2 +258 0x6400 //RX_FDDRC_THRD_3_3 +259 0x2000 //RX_FDDRC_SLANT_0_0 +260 0x2000 //RX_FDDRC_SLANT_0_1 +261 0x2000 //RX_FDDRC_SLANT_0_2 +262 0x2000 //RX_FDDRC_SLANT_0_3 +263 0x2000 //RX_FDDRC_SLANT_1_0 +264 0x2000 //RX_FDDRC_SLANT_1_1 +265 0x2000 //RX_FDDRC_SLANT_1_2 +266 0x2000 //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +268 0x0003 //RX_FILTINDX +269 0x0000 //RX_TDDRC_THRD_0 +270 0x0000 //RX_TDDRC_THRD_1 +271 0x0E80 //RX_TDDRC_THRD_2 +272 0x3800 //RX_TDDRC_THRD_3 +273 0x2A00 //RX_TDDRC_SLANT_0 +274 0x6E00 //RX_TDDRC_SLANT_1 +275 0x3000 //RX_TDDRC_ALPHA_UP_0 +276 0x7FB0 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x0000 //RX_TDDRC_HMNC_GAIN +279 0x0000 //RX_TDDRC_SMT_FLAG +280 0x0000 //RX_TDDRC_SMT_W +281 0x0100 //RX_TDDRC_DRC_GAIN +282 0x7C00 //RX_LAMBDA_PKA_FP +283 0x2000 //RX_TPKA_FP +284 0x0080 //RX_MIN_G_FP +285 0x2000 //RX_MAX_G_FP +286 0x0100 //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 +288 0x0010 //RX_MAXLEVEL_CNG +289 0x0000 //RX_BWE_UV_TH +290 0x0000 //RX_BWE_UV_TH2 +291 0x0000 //RX_BWE_UV_TH3 +292 0x0000 //RX_BWE_V_TH +293 0x0000 //RX_BWE_GAIN1_V_TH1 +294 0x0000 //RX_BWE_GAIN1_V_TH2 +295 0x0000 //RX_BWE_UV_EQ +296 0x0000 //RX_BWE_V_EQ +297 0x0000 //RX_BWE_TONE_TH +298 0x0000 //RX_BWE_UV_HOLD_T +299 0x0000 //RX_BWE_GAIN2_ALPHA +300 0x0000 //RX_BWE_GAIN3_ALPHA +301 0x0000 //RX_BWE_CUTOFF +302 0x0000 //RX_BWE_GAINFILL +303 0x0000 //RX_BWE_MAXTH_TONE +304 0x0000 //RX_BWE_EQ_0 +305 0x0000 //RX_BWE_EQ_1 +306 0x0000 //RX_BWE_EQ_2 +307 0x0000 //RX_BWE_EQ_3 +308 0x0000 //RX_BWE_EQ_4 +309 0x0000 //RX_BWE_EQ_5 +310 0x0000 //RX_BWE_EQ_6 +311 0x0000 //RX_BWE_RESRV_0 +312 0x0000 //RX_BWE_RESRV_1 +313 0x0000 //RX_BWE_RESRV_2 +#VOL 0 +163 0x3000 //RX_TDDRC_ALPHA_UP_1 +164 0x3000 //RX_TDDRC_ALPHA_UP_2 +165 0x3000 //RX_TDDRC_ALPHA_UP_3 +166 0x3000 //RX_TDDRC_ALPHA_UP_4 +184 0x7FB0 //RX_TDDRC_ALPHA_DWN_1 +185 0x7FB0 //RX_TDDRC_ALPHA_DWN_2 +186 0x7FB0 //RX_TDDRC_ALPHA_DWN_3 +189 0x7FB0 //RX_TDDRC_ALPHA_DWN_4 +190 0xDA9E //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +269 0x0000 //RX_TDDRC_THRD_0 +270 0x0000 //RX_TDDRC_THRD_1 +271 0x0E80 //RX_TDDRC_THRD_2 +272 0x3800 //RX_TDDRC_THRD_3 +273 0x2A00 //RX_TDDRC_SLANT_0 +274 0x6E00 //RX_TDDRC_SLANT_1 +275 0x3000 //RX_TDDRC_ALPHA_UP_0 +276 0x7FB0 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x0000 //RX_TDDRC_HMNC_GAIN +279 0x0000 //RX_TDDRC_SMT_FLAG +280 0x0000 //RX_TDDRC_SMT_W +281 0x0100 //RX_TDDRC_DRC_GAIN +195 0x0020 //RX_FDEQ_SUBNUM +196 0x4848 //RX_FDEQ_GAIN_0 +197 0x4848 //RX_FDEQ_GAIN_1 +198 0x4848 //RX_FDEQ_GAIN_2 +199 0x4848 //RX_FDEQ_GAIN_3 +200 0x4848 //RX_FDEQ_GAIN_4 +201 0x4848 //RX_FDEQ_GAIN_5 +202 0x4848 //RX_FDEQ_GAIN_6 +203 0x4848 //RX_FDEQ_GAIN_7 +204 0x4848 //RX_FDEQ_GAIN_8 +205 0x4848 //RX_FDEQ_GAIN_9 +206 0x4848 //RX_FDEQ_GAIN_10 +207 0x4848 //RX_FDEQ_GAIN_11 +208 0x4848 //RX_FDEQ_GAIN_12 +209 0x4848 //RX_FDEQ_GAIN_13 +210 0x4848 //RX_FDEQ_GAIN_14 +211 0x4848 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0000 //RX_FDEQ_BIN_0 +221 0x0000 //RX_FDEQ_BIN_1 +222 0x0000 //RX_FDEQ_BIN_2 +223 0x0000 //RX_FDEQ_BIN_3 +224 0x0000 //RX_FDEQ_BIN_4 +225 0x0000 //RX_FDEQ_BIN_5 +226 0x0000 //RX_FDEQ_BIN_6 +227 0x0000 //RX_FDEQ_BIN_7 +228 0x0000 //RX_FDEQ_BIN_8 +229 0x0000 //RX_FDEQ_BIN_9 +230 0x0000 //RX_FDEQ_BIN_10 +231 0x0000 //RX_FDEQ_BIN_11 +232 0x0000 //RX_FDEQ_BIN_12 +233 0x0000 //RX_FDEQ_BIN_13 +234 0x0000 //RX_FDEQ_BIN_14 +235 0x0000 //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x0000 //RX_FDEQ_RESRV_0 +245 0x0000 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0030 //RX_FDDRC_BAND_MARGIN_1 +248 0x0050 //RX_FDDRC_BAND_MARGIN_2 +249 0x0080 //RX_FDDRC_BAND_MARGIN_3 +250 0x0004 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x5000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x6400 //RX_FDDRC_THRD_3_2 +258 0x6400 //RX_FDDRC_THRD_3_3 +259 0x2000 //RX_FDDRC_SLANT_0_0 +260 0x2000 //RX_FDDRC_SLANT_0_1 +261 0x2000 //RX_FDDRC_SLANT_0_2 +262 0x2000 //RX_FDDRC_SLANT_0_3 +263 0x2000 //RX_FDDRC_SLANT_1_0 +264 0x2000 //RX_FDDRC_SLANT_1_1 +265 0x2000 //RX_FDDRC_SLANT_1_2 +266 0x2000 //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +286 0x0100 //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 +#VOL 1 +163 0x3000 //RX_TDDRC_ALPHA_UP_1 +164 0x3000 //RX_TDDRC_ALPHA_UP_2 +165 0x3000 //RX_TDDRC_ALPHA_UP_3 +166 0x3000 //RX_TDDRC_ALPHA_UP_4 +184 0x7FB0 //RX_TDDRC_ALPHA_DWN_1 +185 0x7FB0 //RX_TDDRC_ALPHA_DWN_2 +186 0x7FB0 //RX_TDDRC_ALPHA_DWN_3 +189 0x7FB0 //RX_TDDRC_ALPHA_DWN_4 +190 0xDA9E //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +269 0x0000 //RX_TDDRC_THRD_0 +270 0x0000 //RX_TDDRC_THRD_1 +271 0x0E80 //RX_TDDRC_THRD_2 +272 0x3800 //RX_TDDRC_THRD_3 +273 0x2A00 //RX_TDDRC_SLANT_0 +274 0x6E00 //RX_TDDRC_SLANT_1 +275 0x3000 //RX_TDDRC_ALPHA_UP_0 +276 0x7FB0 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x0000 //RX_TDDRC_HMNC_GAIN +279 0x0000 //RX_TDDRC_SMT_FLAG +280 0x0000 //RX_TDDRC_SMT_W +281 0x0100 //RX_TDDRC_DRC_GAIN +195 0x0020 //RX_FDEQ_SUBNUM +196 0x4848 //RX_FDEQ_GAIN_0 +197 0x4848 //RX_FDEQ_GAIN_1 +198 0x4848 //RX_FDEQ_GAIN_2 +199 0x4848 //RX_FDEQ_GAIN_3 +200 0x4848 //RX_FDEQ_GAIN_4 +201 0x4848 //RX_FDEQ_GAIN_5 +202 0x4848 //RX_FDEQ_GAIN_6 +203 0x4848 //RX_FDEQ_GAIN_7 +204 0x4848 //RX_FDEQ_GAIN_8 +205 0x4848 //RX_FDEQ_GAIN_9 +206 0x4848 //RX_FDEQ_GAIN_10 +207 0x4848 //RX_FDEQ_GAIN_11 +208 0x4848 //RX_FDEQ_GAIN_12 +209 0x4848 //RX_FDEQ_GAIN_13 +210 0x4848 //RX_FDEQ_GAIN_14 +211 0x4848 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0000 //RX_FDEQ_BIN_0 +221 0x0000 //RX_FDEQ_BIN_1 +222 0x0000 //RX_FDEQ_BIN_2 +223 0x0000 //RX_FDEQ_BIN_3 +224 0x0000 //RX_FDEQ_BIN_4 +225 0x0000 //RX_FDEQ_BIN_5 +226 0x0000 //RX_FDEQ_BIN_6 +227 0x0000 //RX_FDEQ_BIN_7 +228 0x0000 //RX_FDEQ_BIN_8 +229 0x0000 //RX_FDEQ_BIN_9 +230 0x0000 //RX_FDEQ_BIN_10 +231 0x0000 //RX_FDEQ_BIN_11 +232 0x0000 //RX_FDEQ_BIN_12 +233 0x0000 //RX_FDEQ_BIN_13 +234 0x0000 //RX_FDEQ_BIN_14 +235 0x0000 //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x0000 //RX_FDEQ_RESRV_0 +245 0x0000 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0030 //RX_FDDRC_BAND_MARGIN_1 +248 0x0050 //RX_FDDRC_BAND_MARGIN_2 +249 0x0080 //RX_FDDRC_BAND_MARGIN_3 +250 0x0004 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x5000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x6400 //RX_FDDRC_THRD_3_2 +258 0x6400 //RX_FDDRC_THRD_3_3 +259 0x2000 //RX_FDDRC_SLANT_0_0 +260 0x2000 //RX_FDDRC_SLANT_0_1 +261 0x2000 //RX_FDDRC_SLANT_0_2 +262 0x2000 //RX_FDDRC_SLANT_0_3 +263 0x2000 //RX_FDDRC_SLANT_1_0 +264 0x2000 //RX_FDDRC_SLANT_1_1 +265 0x2000 //RX_FDDRC_SLANT_1_2 +266 0x2000 //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +286 0x0100 //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 +#VOL 2 +163 0x3000 //RX_TDDRC_ALPHA_UP_1 +164 0x3000 //RX_TDDRC_ALPHA_UP_2 +165 0x3000 //RX_TDDRC_ALPHA_UP_3 +166 0x3000 //RX_TDDRC_ALPHA_UP_4 +184 0x7FB0 //RX_TDDRC_ALPHA_DWN_1 +185 0x7FB0 //RX_TDDRC_ALPHA_DWN_2 +186 0x7FB0 //RX_TDDRC_ALPHA_DWN_3 +189 0x7FB0 //RX_TDDRC_ALPHA_DWN_4 +190 0xDA9E //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +269 0x0000 //RX_TDDRC_THRD_0 +270 0x0000 //RX_TDDRC_THRD_1 +271 0x0E80 //RX_TDDRC_THRD_2 +272 0x3800 //RX_TDDRC_THRD_3 +273 0x2A00 //RX_TDDRC_SLANT_0 +274 0x6E00 //RX_TDDRC_SLANT_1 +275 0x3000 //RX_TDDRC_ALPHA_UP_0 +276 0x7FB0 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x0000 //RX_TDDRC_HMNC_GAIN +279 0x0000 //RX_TDDRC_SMT_FLAG +280 0x0000 //RX_TDDRC_SMT_W +281 0x0100 //RX_TDDRC_DRC_GAIN +195 0x0020 //RX_FDEQ_SUBNUM +196 0x4848 //RX_FDEQ_GAIN_0 +197 0x4848 //RX_FDEQ_GAIN_1 +198 0x4848 //RX_FDEQ_GAIN_2 +199 0x4848 //RX_FDEQ_GAIN_3 +200 0x4848 //RX_FDEQ_GAIN_4 +201 0x4848 //RX_FDEQ_GAIN_5 +202 0x4848 //RX_FDEQ_GAIN_6 +203 0x4848 //RX_FDEQ_GAIN_7 +204 0x4848 //RX_FDEQ_GAIN_8 +205 0x4848 //RX_FDEQ_GAIN_9 +206 0x4848 //RX_FDEQ_GAIN_10 +207 0x4848 //RX_FDEQ_GAIN_11 +208 0x4848 //RX_FDEQ_GAIN_12 +209 0x4848 //RX_FDEQ_GAIN_13 +210 0x4848 //RX_FDEQ_GAIN_14 +211 0x4848 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0000 //RX_FDEQ_BIN_0 +221 0x0000 //RX_FDEQ_BIN_1 +222 0x0000 //RX_FDEQ_BIN_2 +223 0x0000 //RX_FDEQ_BIN_3 +224 0x0000 //RX_FDEQ_BIN_4 +225 0x0000 //RX_FDEQ_BIN_5 +226 0x0000 //RX_FDEQ_BIN_6 +227 0x0000 //RX_FDEQ_BIN_7 +228 0x0000 //RX_FDEQ_BIN_8 +229 0x0000 //RX_FDEQ_BIN_9 +230 0x0000 //RX_FDEQ_BIN_10 +231 0x0000 //RX_FDEQ_BIN_11 +232 0x0000 //RX_FDEQ_BIN_12 +233 0x0000 //RX_FDEQ_BIN_13 +234 0x0000 //RX_FDEQ_BIN_14 +235 0x0000 //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x0000 //RX_FDEQ_RESRV_0 +245 0x0000 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0030 //RX_FDDRC_BAND_MARGIN_1 +248 0x0050 //RX_FDDRC_BAND_MARGIN_2 +249 0x0080 //RX_FDDRC_BAND_MARGIN_3 +250 0x0004 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x5000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x6400 //RX_FDDRC_THRD_3_2 +258 0x6400 //RX_FDDRC_THRD_3_3 +259 0x2000 //RX_FDDRC_SLANT_0_0 +260 0x2000 //RX_FDDRC_SLANT_0_1 +261 0x2000 //RX_FDDRC_SLANT_0_2 +262 0x2000 //RX_FDDRC_SLANT_0_3 +263 0x2000 //RX_FDDRC_SLANT_1_0 +264 0x2000 //RX_FDDRC_SLANT_1_1 +265 0x2000 //RX_FDDRC_SLANT_1_2 +266 0x2000 //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +286 0x0100 //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 +#VOL 3 +163 0x3000 //RX_TDDRC_ALPHA_UP_1 +164 0x3000 //RX_TDDRC_ALPHA_UP_2 +165 0x3000 //RX_TDDRC_ALPHA_UP_3 +166 0x3000 //RX_TDDRC_ALPHA_UP_4 +184 0x7FB0 //RX_TDDRC_ALPHA_DWN_1 +185 0x7FB0 //RX_TDDRC_ALPHA_DWN_2 +186 0x7FB0 //RX_TDDRC_ALPHA_DWN_3 +189 0x7FB0 //RX_TDDRC_ALPHA_DWN_4 +190 0xDA9E //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +269 0x0000 //RX_TDDRC_THRD_0 +270 0x0000 //RX_TDDRC_THRD_1 +271 0x0E80 //RX_TDDRC_THRD_2 +272 0x3800 //RX_TDDRC_THRD_3 +273 0x2A00 //RX_TDDRC_SLANT_0 +274 0x6E00 //RX_TDDRC_SLANT_1 +275 0x3000 //RX_TDDRC_ALPHA_UP_0 +276 0x7FB0 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x0000 //RX_TDDRC_HMNC_GAIN +279 0x0000 //RX_TDDRC_SMT_FLAG +280 0x0000 //RX_TDDRC_SMT_W +281 0x0100 //RX_TDDRC_DRC_GAIN +195 0x0020 //RX_FDEQ_SUBNUM +196 0x4848 //RX_FDEQ_GAIN_0 +197 0x4848 //RX_FDEQ_GAIN_1 +198 0x4848 //RX_FDEQ_GAIN_2 +199 0x4848 //RX_FDEQ_GAIN_3 +200 0x4848 //RX_FDEQ_GAIN_4 +201 0x4848 //RX_FDEQ_GAIN_5 +202 0x4848 //RX_FDEQ_GAIN_6 +203 0x4848 //RX_FDEQ_GAIN_7 +204 0x4848 //RX_FDEQ_GAIN_8 +205 0x4848 //RX_FDEQ_GAIN_9 +206 0x4848 //RX_FDEQ_GAIN_10 +207 0x4848 //RX_FDEQ_GAIN_11 +208 0x4848 //RX_FDEQ_GAIN_12 +209 0x4848 //RX_FDEQ_GAIN_13 +210 0x4848 //RX_FDEQ_GAIN_14 +211 0x4848 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0000 //RX_FDEQ_BIN_0 +221 0x0000 //RX_FDEQ_BIN_1 +222 0x0000 //RX_FDEQ_BIN_2 +223 0x0000 //RX_FDEQ_BIN_3 +224 0x0000 //RX_FDEQ_BIN_4 +225 0x0000 //RX_FDEQ_BIN_5 +226 0x0000 //RX_FDEQ_BIN_6 +227 0x0000 //RX_FDEQ_BIN_7 +228 0x0000 //RX_FDEQ_BIN_8 +229 0x0000 //RX_FDEQ_BIN_9 +230 0x0000 //RX_FDEQ_BIN_10 +231 0x0000 //RX_FDEQ_BIN_11 +232 0x0000 //RX_FDEQ_BIN_12 +233 0x0000 //RX_FDEQ_BIN_13 +234 0x0000 //RX_FDEQ_BIN_14 +235 0x0000 //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x0000 //RX_FDEQ_RESRV_0 +245 0x0000 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0030 //RX_FDDRC_BAND_MARGIN_1 +248 0x0050 //RX_FDDRC_BAND_MARGIN_2 +249 0x0080 //RX_FDDRC_BAND_MARGIN_3 +250 0x0004 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x5000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x6400 //RX_FDDRC_THRD_3_2 +258 0x6400 //RX_FDDRC_THRD_3_3 +259 0x2000 //RX_FDDRC_SLANT_0_0 +260 0x2000 //RX_FDDRC_SLANT_0_1 +261 0x2000 //RX_FDDRC_SLANT_0_2 +262 0x2000 //RX_FDDRC_SLANT_0_3 +263 0x2000 //RX_FDDRC_SLANT_1_0 +264 0x2000 //RX_FDDRC_SLANT_1_1 +265 0x2000 //RX_FDDRC_SLANT_1_2 +266 0x2000 //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +286 0x0100 //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 +#VOL 4 +163 0x3000 //RX_TDDRC_ALPHA_UP_1 +164 0x3000 //RX_TDDRC_ALPHA_UP_2 +165 0x3000 //RX_TDDRC_ALPHA_UP_3 +166 0x3000 //RX_TDDRC_ALPHA_UP_4 +184 0x7FB0 //RX_TDDRC_ALPHA_DWN_1 +185 0x7FB0 //RX_TDDRC_ALPHA_DWN_2 +186 0x7FB0 //RX_TDDRC_ALPHA_DWN_3 +189 0x7FB0 //RX_TDDRC_ALPHA_DWN_4 +190 0xDA9E //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +269 0x0000 //RX_TDDRC_THRD_0 +270 0x0000 //RX_TDDRC_THRD_1 +271 0x0E80 //RX_TDDRC_THRD_2 +272 0x3800 //RX_TDDRC_THRD_3 +273 0x2A00 //RX_TDDRC_SLANT_0 +274 0x6E00 //RX_TDDRC_SLANT_1 +275 0x3000 //RX_TDDRC_ALPHA_UP_0 +276 0x7FB0 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x0000 //RX_TDDRC_HMNC_GAIN +279 0x0000 //RX_TDDRC_SMT_FLAG +280 0x0000 //RX_TDDRC_SMT_W +281 0x0100 //RX_TDDRC_DRC_GAIN +195 0x0020 //RX_FDEQ_SUBNUM +196 0x4848 //RX_FDEQ_GAIN_0 +197 0x4848 //RX_FDEQ_GAIN_1 +198 0x4848 //RX_FDEQ_GAIN_2 +199 0x4848 //RX_FDEQ_GAIN_3 +200 0x4848 //RX_FDEQ_GAIN_4 +201 0x4848 //RX_FDEQ_GAIN_5 +202 0x4848 //RX_FDEQ_GAIN_6 +203 0x4848 //RX_FDEQ_GAIN_7 +204 0x4848 //RX_FDEQ_GAIN_8 +205 0x4848 //RX_FDEQ_GAIN_9 +206 0x4848 //RX_FDEQ_GAIN_10 +207 0x4848 //RX_FDEQ_GAIN_11 +208 0x4848 //RX_FDEQ_GAIN_12 +209 0x4848 //RX_FDEQ_GAIN_13 +210 0x4848 //RX_FDEQ_GAIN_14 +211 0x4848 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0000 //RX_FDEQ_BIN_0 +221 0x0000 //RX_FDEQ_BIN_1 +222 0x0000 //RX_FDEQ_BIN_2 +223 0x0000 //RX_FDEQ_BIN_3 +224 0x0000 //RX_FDEQ_BIN_4 +225 0x0000 //RX_FDEQ_BIN_5 +226 0x0000 //RX_FDEQ_BIN_6 +227 0x0000 //RX_FDEQ_BIN_7 +228 0x0000 //RX_FDEQ_BIN_8 +229 0x0000 //RX_FDEQ_BIN_9 +230 0x0000 //RX_FDEQ_BIN_10 +231 0x0000 //RX_FDEQ_BIN_11 +232 0x0000 //RX_FDEQ_BIN_12 +233 0x0000 //RX_FDEQ_BIN_13 +234 0x0000 //RX_FDEQ_BIN_14 +235 0x0000 //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x0000 //RX_FDEQ_RESRV_0 +245 0x0000 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0030 //RX_FDDRC_BAND_MARGIN_1 +248 0x0050 //RX_FDDRC_BAND_MARGIN_2 +249 0x0080 //RX_FDDRC_BAND_MARGIN_3 +250 0x0004 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x5000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x6400 //RX_FDDRC_THRD_3_2 +258 0x6400 //RX_FDDRC_THRD_3_3 +259 0x2000 //RX_FDDRC_SLANT_0_0 +260 0x2000 //RX_FDDRC_SLANT_0_1 +261 0x2000 //RX_FDDRC_SLANT_0_2 +262 0x2000 //RX_FDDRC_SLANT_0_3 +263 0x2000 //RX_FDDRC_SLANT_1_0 +264 0x2000 //RX_FDDRC_SLANT_1_1 +265 0x2000 //RX_FDDRC_SLANT_1_2 +266 0x2000 //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +286 0x0100 //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 +#VOL 5 +163 0x3000 //RX_TDDRC_ALPHA_UP_1 +164 0x3000 //RX_TDDRC_ALPHA_UP_2 +165 0x3000 //RX_TDDRC_ALPHA_UP_3 +166 0x3000 //RX_TDDRC_ALPHA_UP_4 +184 0x7FB0 //RX_TDDRC_ALPHA_DWN_1 +185 0x7FB0 //RX_TDDRC_ALPHA_DWN_2 +186 0x7FB0 //RX_TDDRC_ALPHA_DWN_3 +189 0x7FB0 //RX_TDDRC_ALPHA_DWN_4 +190 0xDA9E //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +269 0x0000 //RX_TDDRC_THRD_0 +270 0x0000 //RX_TDDRC_THRD_1 +271 0x0E80 //RX_TDDRC_THRD_2 +272 0x3800 //RX_TDDRC_THRD_3 +273 0x2A00 //RX_TDDRC_SLANT_0 +274 0x6E00 //RX_TDDRC_SLANT_1 +275 0x3000 //RX_TDDRC_ALPHA_UP_0 +276 0x7FB0 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x0000 //RX_TDDRC_HMNC_GAIN +279 0x0000 //RX_TDDRC_SMT_FLAG +280 0x0000 //RX_TDDRC_SMT_W +281 0x0100 //RX_TDDRC_DRC_GAIN +195 0x0020 //RX_FDEQ_SUBNUM +196 0x4848 //RX_FDEQ_GAIN_0 +197 0x4848 //RX_FDEQ_GAIN_1 +198 0x4848 //RX_FDEQ_GAIN_2 +199 0x4848 //RX_FDEQ_GAIN_3 +200 0x4848 //RX_FDEQ_GAIN_4 +201 0x4848 //RX_FDEQ_GAIN_5 +202 0x4848 //RX_FDEQ_GAIN_6 +203 0x4848 //RX_FDEQ_GAIN_7 +204 0x4848 //RX_FDEQ_GAIN_8 +205 0x4848 //RX_FDEQ_GAIN_9 +206 0x4848 //RX_FDEQ_GAIN_10 +207 0x4848 //RX_FDEQ_GAIN_11 +208 0x4848 //RX_FDEQ_GAIN_12 +209 0x4848 //RX_FDEQ_GAIN_13 +210 0x4848 //RX_FDEQ_GAIN_14 +211 0x4848 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0000 //RX_FDEQ_BIN_0 +221 0x0000 //RX_FDEQ_BIN_1 +222 0x0000 //RX_FDEQ_BIN_2 +223 0x0000 //RX_FDEQ_BIN_3 +224 0x0000 //RX_FDEQ_BIN_4 +225 0x0000 //RX_FDEQ_BIN_5 +226 0x0000 //RX_FDEQ_BIN_6 +227 0x0000 //RX_FDEQ_BIN_7 +228 0x0000 //RX_FDEQ_BIN_8 +229 0x0000 //RX_FDEQ_BIN_9 +230 0x0000 //RX_FDEQ_BIN_10 +231 0x0000 //RX_FDEQ_BIN_11 +232 0x0000 //RX_FDEQ_BIN_12 +233 0x0000 //RX_FDEQ_BIN_13 +234 0x0000 //RX_FDEQ_BIN_14 +235 0x0000 //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x0000 //RX_FDEQ_RESRV_0 +245 0x0000 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0030 //RX_FDDRC_BAND_MARGIN_1 +248 0x0050 //RX_FDDRC_BAND_MARGIN_2 +249 0x0080 //RX_FDDRC_BAND_MARGIN_3 +250 0x0004 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x5000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x6400 //RX_FDDRC_THRD_3_2 +258 0x6400 //RX_FDDRC_THRD_3_3 +259 0x2000 //RX_FDDRC_SLANT_0_0 +260 0x2000 //RX_FDDRC_SLANT_0_1 +261 0x2000 //RX_FDDRC_SLANT_0_2 +262 0x2000 //RX_FDDRC_SLANT_0_3 +263 0x2000 //RX_FDDRC_SLANT_1_0 +264 0x2000 //RX_FDDRC_SLANT_1_1 +265 0x2000 //RX_FDDRC_SLANT_1_2 +266 0x2000 //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +286 0x0100 //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 +#VOL 6 +163 0x3000 //RX_TDDRC_ALPHA_UP_1 +164 0x3000 //RX_TDDRC_ALPHA_UP_2 +165 0x3000 //RX_TDDRC_ALPHA_UP_3 +166 0x3000 //RX_TDDRC_ALPHA_UP_4 +184 0x7FB0 //RX_TDDRC_ALPHA_DWN_1 +185 0x7FB0 //RX_TDDRC_ALPHA_DWN_2 +186 0x7FB0 //RX_TDDRC_ALPHA_DWN_3 +189 0x7FB0 //RX_TDDRC_ALPHA_DWN_4 +190 0xDA9E //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +269 0x0000 //RX_TDDRC_THRD_0 +270 0x0000 //RX_TDDRC_THRD_1 +271 0x0E80 //RX_TDDRC_THRD_2 +272 0x3800 //RX_TDDRC_THRD_3 +273 0x2A00 //RX_TDDRC_SLANT_0 +274 0x6E00 //RX_TDDRC_SLANT_1 +275 0x3000 //RX_TDDRC_ALPHA_UP_0 +276 0x7FB0 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x0000 //RX_TDDRC_HMNC_GAIN +279 0x0000 //RX_TDDRC_SMT_FLAG +280 0x0000 //RX_TDDRC_SMT_W +281 0x0100 //RX_TDDRC_DRC_GAIN +195 0x0020 //RX_FDEQ_SUBNUM +196 0x4848 //RX_FDEQ_GAIN_0 +197 0x4848 //RX_FDEQ_GAIN_1 +198 0x4848 //RX_FDEQ_GAIN_2 +199 0x4848 //RX_FDEQ_GAIN_3 +200 0x4848 //RX_FDEQ_GAIN_4 +201 0x4848 //RX_FDEQ_GAIN_5 +202 0x4848 //RX_FDEQ_GAIN_6 +203 0x4848 //RX_FDEQ_GAIN_7 +204 0x4848 //RX_FDEQ_GAIN_8 +205 0x4848 //RX_FDEQ_GAIN_9 +206 0x4848 //RX_FDEQ_GAIN_10 +207 0x4848 //RX_FDEQ_GAIN_11 +208 0x4848 //RX_FDEQ_GAIN_12 +209 0x4848 //RX_FDEQ_GAIN_13 +210 0x4848 //RX_FDEQ_GAIN_14 +211 0x4848 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0000 //RX_FDEQ_BIN_0 +221 0x0000 //RX_FDEQ_BIN_1 +222 0x0000 //RX_FDEQ_BIN_2 +223 0x0000 //RX_FDEQ_BIN_3 +224 0x0000 //RX_FDEQ_BIN_4 +225 0x0000 //RX_FDEQ_BIN_5 +226 0x0000 //RX_FDEQ_BIN_6 +227 0x0000 //RX_FDEQ_BIN_7 +228 0x0000 //RX_FDEQ_BIN_8 +229 0x0000 //RX_FDEQ_BIN_9 +230 0x0000 //RX_FDEQ_BIN_10 +231 0x0000 //RX_FDEQ_BIN_11 +232 0x0000 //RX_FDEQ_BIN_12 +233 0x0000 //RX_FDEQ_BIN_13 +234 0x0000 //RX_FDEQ_BIN_14 +235 0x0000 //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x0000 //RX_FDEQ_RESRV_0 +245 0x0000 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0030 //RX_FDDRC_BAND_MARGIN_1 +248 0x0050 //RX_FDDRC_BAND_MARGIN_2 +249 0x0080 //RX_FDDRC_BAND_MARGIN_3 +250 0x0004 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x5000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x6400 //RX_FDDRC_THRD_3_2 +258 0x6400 //RX_FDDRC_THRD_3_3 +259 0x2000 //RX_FDDRC_SLANT_0_0 +260 0x2000 //RX_FDDRC_SLANT_0_1 +261 0x2000 //RX_FDDRC_SLANT_0_2 +262 0x2000 //RX_FDDRC_SLANT_0_3 +263 0x2000 //RX_FDDRC_SLANT_1_0 +264 0x2000 //RX_FDDRC_SLANT_1_1 +265 0x2000 //RX_FDDRC_SLANT_1_2 +266 0x2000 //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +286 0x0100 //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 #CASE_NAME HEADSET-TTY_VCO-VOICE_GENERIC-FB -#PARAM_MODE FULL -#PARAM_TYPE TX+RX -#TOTAL_CUSTOM_STEP 7 +#PARAM_MODE Full +#PARAM_TYPE TX+2RX +#TOTAL_CUSTOM_STEP 7+7 #TX 0 0x0001 //TX_OPERATION_MODE_0 1 0x0001 //TX_OPERATION_MODE_1 2 0x0033 //TX_PATCH_REG -3 0x4B7C //TX_SENDFUNC_MODE_0 +3 0x6B7C //TX_SENDFUNC_MODE_0 4 0x0001 //TX_SENDFUNC_MODE_1 -5 0x0003 //TX_NUM_MIC +5 0x0002 //TX_NUM_MIC 6 0x0004 //TX_SAMPLINGFREQ_SIG 7 0x0004 //TX_SAMPLINGFREQ_PROC 8 0x000A //TX_FRAME_SZ_SIG @@ -47387,15 +72119,15 @@ 18 0x0000 //TX_SYS_RESRV_2 19 0x0000 //TX_SYS_RESRV_3 20 0x0000 //TX_DIST2REF0 -21 0x00A4 //TX_DIST2REF1 -22 0x0017 //TX_DIST2REF_02 +21 0x009D //TX_DIST2REF1 +22 0x0010 //TX_DIST2REF_02 23 0x0000 //TX_DIST2REF_03 24 0x0000 //TX_DIST2REF_04 25 0x0000 //TX_DIST2REF_05 26 0x0000 //TX_MMIC -27 0x0FF7 //TX_PGA_0 -28 0x0FF7 //TX_PGA_1 -29 0x0FF7 //TX_PGA_2 +27 0x1000 //TX_PGA_0 +28 0x1000 //TX_PGA_1 +29 0x1000 //TX_PGA_2 30 0x0000 //TX_PGA_3 31 0x0000 //TX_PGA_4 32 0x0000 //TX_PGA_5 @@ -47531,7 +72263,7 @@ 162 0x7FFF //TX_MIN_EQ_RE_EST_10 163 0x7FFF //TX_MIN_EQ_RE_EST_11 164 0x7FFF //TX_MIN_EQ_RE_EST_12 -165 0x4000 //TX_LAMBDA_RE_EST +165 0x0700 //TX_LAMBDA_RE_EST 166 0x0CCD //TX_LAMBDA_CB_NLE 167 0x2000 //TX_C_POST_FLT 168 0x7FFF //TX_GAIN_NP @@ -47591,16 +72323,16 @@ 222 0x023E //TX_ADPT_STRICT_H 223 0x0BB8 //TX_RATIO_DT_L_TH_LOW 224 0x3A98 //TX_RATIO_DT_H_TH_LOW -225 0x1770 //TX_RATIO_DT_L_TH_HIGH +225 0x1194 //TX_RATIO_DT_L_TH_HIGH 226 0x4E20 //TX_RATIO_DT_H_TH_HIGH 227 0x09C4 //TX_RATIO_DT_L0_TH -228 0x2000 //TX_B_POST_FILT_ECHO_L +228 0x7FFF //TX_B_POST_FILT_ECHO_L 229 0x2000 //TX_B_POST_FILT_ECHO_H 230 0x0200 //TX_MIN_G_CTRL_ECHO 231 0x1000 //TX_B_LESSCUT_RTO_ECHO -232 0x0000 //TX_EPD_OFFSET_00 +232 0x0063 //TX_EPD_OFFSET_00 233 0x0000 //TX_EPD_OFFST_01 -234 0x1388 //TX_RATIO_DT_L0_TH_HIGH +234 0x0A28 //TX_RATIO_DT_L0_TH_HIGH 235 0x3A98 //TX_RATIO_DT_H_TH_CUT 236 0x7FFF //TX_MIN_EQ_RE_EST_13 237 0x0000 //TX_DTD_THR1_7 @@ -47608,7 +72340,7 @@ 239 0x0800 //TX_DT_RESRV_7 240 0x0800 //TX_DT_RESRV_8 241 0x0000 //TX_DT_RESRV_9 -242 0xF800 //TX_THR_SN_EST_0 +242 0xF700 //TX_THR_SN_EST_0 243 0xFA00 //TX_THR_SN_EST_1 244 0xFA00 //TX_THR_SN_EST_2 245 0xFB00 //TX_THR_SN_EST_3 @@ -47617,11 +72349,11 @@ 248 0xF800 //TX_THR_SN_EST_6 249 0xF800 //TX_THR_SN_EST_7 250 0x0100 //TX_DELTA_THR_SN_EST_0 -251 0x0200 //TX_DELTA_THR_SN_EST_1 -252 0x0100 //TX_DELTA_THR_SN_EST_2 -253 0x0200 //TX_DELTA_THR_SN_EST_3 +251 0x0100 //TX_DELTA_THR_SN_EST_1 +252 0x0200 //TX_DELTA_THR_SN_EST_2 +253 0x0100 //TX_DELTA_THR_SN_EST_3 254 0x0100 //TX_DELTA_THR_SN_EST_4 -255 0x0100 //TX_DELTA_THR_SN_EST_5 +255 0x0200 //TX_DELTA_THR_SN_EST_5 256 0x0200 //TX_DELTA_THR_SN_EST_6 257 0x0200 //TX_DELTA_THR_SN_EST_7 258 0x4000 //TX_LAMBDA_NN_EST_0 @@ -47649,11 +72381,11 @@ 280 0x1000 //TX_B_POST_FLT_1 281 0x0010 //TX_NS_LVL_CTRL_0 282 0x0014 //TX_NS_LVL_CTRL_1 -283 0x0014 //TX_NS_LVL_CTRL_2 -284 0x0018 //TX_NS_LVL_CTRL_3 -285 0x0016 //TX_NS_LVL_CTRL_4 -286 0x0014 //TX_NS_LVL_CTRL_5 -287 0x0011 //TX_NS_LVL_CTRL_6 +283 0x0018 //TX_NS_LVL_CTRL_2 +284 0x0016 //TX_NS_LVL_CTRL_3 +285 0x0014 //TX_NS_LVL_CTRL_4 +286 0x0011 //TX_NS_LVL_CTRL_5 +287 0x0014 //TX_NS_LVL_CTRL_6 288 0x0011 //TX_NS_LVL_CTRL_7 289 0x000F //TX_MIN_GAIN_S_0 290 0x0010 //TX_MIN_GAIN_S_1 @@ -47671,8 +72403,8 @@ 302 0x4000 //TX_SNRI_SUP_2 303 0x4000 //TX_SNRI_SUP_3 304 0x4000 //TX_SNRI_SUP_4 -305 0x4000 //TX_SNRI_SUP_5 -306 0x50C0 //TX_SNRI_SUP_6 +305 0x50C0 //TX_SNRI_SUP_5 +306 0x4000 //TX_SNRI_SUP_6 307 0x7FFF //TX_SNRI_SUP_7 308 0x7FFF //TX_THR_LFNS 309 0x0018 //TX_G_LFNS @@ -47681,19 +72413,19 @@ 312 0x7FFF //TX_A_POST_FILT_0 313 0x2000 //TX_A_POST_FILT_1 314 0x5000 //TX_A_POST_FILT_S_0 -315 0x6000 //TX_A_POST_FILT_S_1 -316 0x4C00 //TX_A_POST_FILT_S_2 -317 0x4000 //TX_A_POST_FILT_S_3 -318 0x6000 //TX_A_POST_FILT_S_4 -319 0x4000 //TX_A_POST_FILT_S_5 -320 0x5000 //TX_A_POST_FILT_S_6 +315 0x4C00 //TX_A_POST_FILT_S_1 +316 0x4000 //TX_A_POST_FILT_S_2 +317 0x6000 //TX_A_POST_FILT_S_3 +318 0x4000 //TX_A_POST_FILT_S_4 +319 0x5000 //TX_A_POST_FILT_S_5 +320 0x6000 //TX_A_POST_FILT_S_6 321 0x7000 //TX_A_POST_FILT_S_7 322 0x2000 //TX_B_POST_FILT_0 -323 0x1000 //TX_B_POST_FILT_1 +323 0x2000 //TX_B_POST_FILT_1 324 0x2000 //TX_B_POST_FILT_2 -325 0x2000 //TX_B_POST_FILT_3 +325 0x4000 //TX_B_POST_FILT_3 326 0x4000 //TX_B_POST_FILT_4 -327 0x4000 //TX_B_POST_FILT_5 +327 0x1000 //TX_B_POST_FILT_5 328 0x1000 //TX_B_POST_FILT_6 329 0x2000 //TX_B_POST_FILT_7 330 0x4000 //TX_B_LESSCUT_RTO_S_0 @@ -47701,26 +72433,26 @@ 332 0x7FFF //TX_B_LESSCUT_RTO_S_2 333 0x7FFF //TX_B_LESSCUT_RTO_S_3 334 0x7FFF //TX_B_LESSCUT_RTO_S_4 -335 0x7FFF //TX_B_LESSCUT_RTO_S_5 -336 0x6000 //TX_B_LESSCUT_RTO_S_6 +335 0x6000 //TX_B_LESSCUT_RTO_S_5 +336 0x7FFF //TX_B_LESSCUT_RTO_S_6 337 0x7FFF //TX_B_LESSCUT_RTO_S_7 338 0x7C00 //TX_LAMBDA_PFILT 339 0x7C00 //TX_LAMBDA_PFILT_S_0 340 0x7C00 //TX_LAMBDA_PFILT_S_1 -341 0x7C00 //TX_LAMBDA_PFILT_S_2 -342 0x7A00 //TX_LAMBDA_PFILT_S_3 +341 0x7A00 //TX_LAMBDA_PFILT_S_2 +342 0x7C00 //TX_LAMBDA_PFILT_S_3 343 0x7C00 //TX_LAMBDA_PFILT_S_4 344 0x7C00 //TX_LAMBDA_PFILT_S_5 345 0x7C00 //TX_LAMBDA_PFILT_S_6 346 0x7C00 //TX_LAMBDA_PFILT_S_7 -347 0x0000 //TX_K_PEPPER +347 0x0180 //TX_K_PEPPER 348 0x0800 //TX_A_PEPPER 349 0x1EAA //TX_K_PEPPER_HF 350 0x0600 //TX_A_PEPPER_HF 351 0x0001 //TX_HMNC_BST_FLG 352 0x0200 //TX_HMNC_BST_THR -353 0x0200 //TX_DT_BINVAD_TH_0 -354 0x0200 //TX_DT_BINVAD_TH_1 +353 0x2000 //TX_DT_BINVAD_TH_0 +354 0x0800 //TX_DT_BINVAD_TH_1 355 0x0200 //TX_DT_BINVAD_TH_2 356 0x0200 //TX_DT_BINVAD_TH_3 357 0x1F40 //TX_DT_BINVAD_ENDF @@ -47733,7 +72465,7 @@ 364 0x0000 //TX_K_APT 365 0x0001 //TX_NOISEDET 366 0x0064 //TX_NDETCT -367 0x0050 //TX_NOISE_TH_0 +367 0x04E8 //TX_NOISE_TH_0 368 0x7FFF //TX_NOISE_TH_0_2 369 0x7FFF //TX_NOISE_TH_0_3 370 0x07D0 //TX_NOISE_TH_1 @@ -47745,11 +72477,11 @@ 376 0x0000 //TX_NOISE_TH_5_3 377 0x7FFF //TX_NOISE_TH_5_4 378 0x2710 //TX_NOISE_TH_6 -379 0x0033 //TX_MINENOISE_TH -380 0x4000 //TX_MINENOISE_MIC0_TH_MTS -381 0xFFEE //TX_MINENOISE_MIC0_TH_EXP -382 0x6000 //TX_MINENOISE_MIC0_S_TH_MTS -383 0xFFF3 //TX_MINENOISE_MIC0_S_TH_EXP +379 0x02BC //TX_MINENOISE_TH +380 0xD508 //TX_MORENS_TFMASK_TH +381 0x0001 //TX_DRC_QUIET_FLOOR +382 0x3A98 //TX_RATIODTL_CUT_TH +383 0x1482 //TX_DT_CUT_K1 384 0x0666 //TX_OUT_ENER_S_TH_CLEAN 385 0x0666 //TX_OUT_ENER_S_TH_LESSCLEAN 386 0x0333 //TX_OUT_ENER_S_TH_NOISY @@ -47757,22 +72489,22 @@ 388 0x0333 //TX_OUT_ENER_TH_SPEECH 389 0x2000 //TX_SN_NPB_GAIN 390 0x0000 //TX_NN_NPB_GAIN -391 0x0000 //TX_CSX_ALPHA_0 -392 0x0000 //TX_CSX_ALPHA_1 -393 0x0000 //TX_CSX_ALPHA_2 -394 0x0000 //TX_CSX_ALPHA_3 -395 0x0800 //TX_MU_ARSP_EST -396 0x00C8 //TX_P_OUTBEAM_MIN_TH +391 0x7FFF //TX_POST_MASK_SUP_HSNE +392 0x1388 //TX_TAIL_DET_TH +393 0x4000 //TX_B_LESSCUT_RTO_WTA +394 0x0000 //TX_MEL_G_R +395 0x0080 //TX_SUPHIGH_TH +396 0x0000 //TX_MASK_G_R 397 0x0002 //TX_EXTRA_NS_L -398 0x0800 //TX_EXTRA_NS_A -399 0x0005 //TX_VR_NOISE_FLOOR_TH +398 0x1800 //TX_C_POST_FLT_MASK +399 0x7FFF //TX_A_POST_FLT_WNS 400 0x0148 //TX_MIN_G_LOW300HZ -401 0x0002 //TX_MAXLEVEL_CNG +401 0x0004 //TX_MAXLEVEL_CNG 402 0x00B4 //TX_STN_NOISE_TH 403 0x4000 //TX_POST_MASK_SUP 404 0x7FFF //TX_POST_MASK_ADJUST 405 0x00C8 //TX_NS_ENOISE_MIC0_TH -406 0x0033 //TX_MINENOISE_MIC0_TH +406 0x04E7 //TX_MINENOISE_MIC0_TH 407 0x012C //TX_MINENOISE_MIC0_S_TH 408 0x7FFF //TX_MIN_G_CTRL_SSNS 409 0x0000 //TX_METAL_RTO_THR @@ -47880,16 +72612,16 @@ 511 0x6666 //TX_MIC_TO_BFGAIN 512 0x0000 //TX_MICTOBFGAIN0 513 0x0000 //TX_FASTMUE_TH -514 0x0000 //TX_DERVB_LEN_0 -515 0x0000 //TX_DERVB_LEN_1 -516 0x0000 //TX_RHO_DERVB -517 0x0000 //TX_MIC_INDX_DERVB -518 0x0000 //TX_MU_DERVB -519 0x0000 //TX_DR_RESRV_0 -520 0x0000 //TX_DR_RESRV_1 -521 0x0000 //TX_DR_RESRV_2 -522 0x0000 //TX_DR_RESRV_3 -523 0x0000 //TX_DR_RESRV_4 +514 0xC000 //TX_DEREVERB_LF_MU +515 0xC000 //TX_DEREVERB_HF_MU +516 0xCCCC //TX_DEREVERB_DELAY +517 0xD999 //TX_DEREVERB_COEF_LEN +518 0x1F40 //TX_DEREVERB_DNR +519 0x0000 //TX_DEREVERB_ALPHA +520 0x0000 //TX_DEREVERB_BETA +521 0x0000 //TX_GSC_RTOL_TH +522 0x7000 //TX_GSC_RTOH_TH +523 0x0064 //TX_WIDE2_MEANHTH 524 0x0000 //TX_DR_RESRV_5 525 0x0000 //TX_DR_RESRV_6 526 0x0000 //TX_DR_RESRV_7 @@ -47936,19 +72668,19 @@ 567 0x4848 //TX_FDEQ_GAIN_0 568 0x4848 //TX_FDEQ_GAIN_1 569 0x4848 //TX_FDEQ_GAIN_2 -570 0x4848 //TX_FDEQ_GAIN_3 -571 0x4848 //TX_FDEQ_GAIN_4 -572 0x4848 //TX_FDEQ_GAIN_5 -573 0x4848 //TX_FDEQ_GAIN_6 -574 0x4848 //TX_FDEQ_GAIN_7 -575 0x4848 //TX_FDEQ_GAIN_8 -576 0x4853 //TX_FDEQ_GAIN_9 -577 0x5450 //TX_FDEQ_GAIN_10 -578 0x7465 //TX_FDEQ_GAIN_11 -579 0x807F //TX_FDEQ_GAIN_12 -580 0x82C4 //TX_FDEQ_GAIN_13 -581 0xC4C4 //TX_FDEQ_GAIN_14 -582 0xC4C4 //TX_FDEQ_GAIN_15 +570 0x484C //TX_FDEQ_GAIN_3 +571 0x4C4C //TX_FDEQ_GAIN_4 +572 0x544C //TX_FDEQ_GAIN_5 +573 0x5454 //TX_FDEQ_GAIN_6 +574 0x5454 //TX_FDEQ_GAIN_7 +575 0x585A //TX_FDEQ_GAIN_8 +576 0x5C5C //TX_FDEQ_GAIN_9 +577 0x6068 //TX_FDEQ_GAIN_10 +578 0x8894 //TX_FDEQ_GAIN_11 +579 0x94B4 //TX_FDEQ_GAIN_12 +580 0xB4C7 //TX_FDEQ_GAIN_13 +581 0xC7C6 //TX_FDEQ_GAIN_14 +582 0xC6C6 //TX_FDEQ_GAIN_15 583 0x4848 //TX_FDEQ_GAIN_16 584 0x4848 //TX_FDEQ_GAIN_17 585 0x4848 //TX_FDEQ_GAIN_18 @@ -47982,24 +72714,24 @@ 613 0x0000 //TX_FDEQ_BIN_22 614 0x0000 //TX_FDEQ_BIN_23 615 0x0000 //TX_FDEQ_PADDING -616 0x0020 //TX_PREEQ_SUBNUM_MIC0 +616 0x0030 //TX_PREEQ_SUBNUM_MIC0 617 0x4848 //TX_PREEQ_GAIN_MIC0_0 618 0x4848 //TX_PREEQ_GAIN_MIC0_1 619 0x4848 //TX_PREEQ_GAIN_MIC0_2 620 0x4848 //TX_PREEQ_GAIN_MIC0_3 621 0x4848 //TX_PREEQ_GAIN_MIC0_4 622 0x4848 //TX_PREEQ_GAIN_MIC0_5 -623 0x4A4C //TX_PREEQ_GAIN_MIC0_6 -624 0x4E50 //TX_PREEQ_GAIN_MIC0_7 -625 0x5456 //TX_PREEQ_GAIN_MIC0_8 -626 0x585C //TX_PREEQ_GAIN_MIC0_9 -627 0x5C64 //TX_PREEQ_GAIN_MIC0_10 -628 0x7478 //TX_PREEQ_GAIN_MIC0_11 -629 0x705C //TX_PREEQ_GAIN_MIC0_12 -630 0x4838 //TX_PREEQ_GAIN_MIC0_13 -631 0x3C70 //TX_PREEQ_GAIN_MIC0_14 -632 0x4848 //TX_PREEQ_GAIN_MIC0_15 -633 0x4848 //TX_PREEQ_GAIN_MIC0_16 +623 0x4849 //TX_PREEQ_GAIN_MIC0_6 +624 0x4A4B //TX_PREEQ_GAIN_MIC0_7 +625 0x4C4B //TX_PREEQ_GAIN_MIC0_8 +626 0x4A48 //TX_PREEQ_GAIN_MIC0_9 +627 0x4B4C //TX_PREEQ_GAIN_MIC0_10 +628 0x4C4B //TX_PREEQ_GAIN_MIC0_11 +629 0x4838 //TX_PREEQ_GAIN_MIC0_12 +630 0x3858 //TX_PREEQ_GAIN_MIC0_13 +631 0x7060 //TX_PREEQ_GAIN_MIC0_14 +632 0x9870 //TX_PREEQ_GAIN_MIC0_15 +633 0x5848 //TX_PREEQ_GAIN_MIC0_16 634 0x4848 //TX_PREEQ_GAIN_MIC0_17 635 0x4848 //TX_PREEQ_GAIN_MIC0_18 636 0x4848 //TX_PREEQ_GAIN_MIC0_19 @@ -48013,17 +72745,17 @@ 644 0x0304 //TX_PREEQ_BIN_MIC0_3 645 0x0405 //TX_PREEQ_BIN_MIC0_4 646 0x0506 //TX_PREEQ_BIN_MIC0_5 -647 0x0708 //TX_PREEQ_BIN_MIC0_6 -648 0x0909 //TX_PREEQ_BIN_MIC0_7 -649 0x090B //TX_PREEQ_BIN_MIC0_8 +647 0x0808 //TX_PREEQ_BIN_MIC0_6 +648 0x0809 //TX_PREEQ_BIN_MIC0_7 +649 0x0A0A //TX_PREEQ_BIN_MIC0_8 650 0x0C10 //TX_PREEQ_BIN_MIC0_9 651 0x1013 //TX_PREEQ_BIN_MIC0_10 652 0x1414 //TX_PREEQ_BIN_MIC0_11 -653 0x1414 //TX_PREEQ_BIN_MIC0_12 -654 0x1C1E //TX_PREEQ_BIN_MIC0_13 -655 0x1E28 //TX_PREEQ_BIN_MIC0_14 -656 0x462C //TX_PREEQ_BIN_MIC0_15 -657 0x0000 //TX_PREEQ_BIN_MIC0_16 +653 0x261E //TX_PREEQ_BIN_MIC0_12 +654 0x1E14 //TX_PREEQ_BIN_MIC0_13 +655 0x1414 //TX_PREEQ_BIN_MIC0_14 +656 0x2814 //TX_PREEQ_BIN_MIC0_15 +657 0x4000 //TX_PREEQ_BIN_MIC0_16 658 0x0000 //TX_PREEQ_BIN_MIC0_17 659 0x0000 //TX_PREEQ_BIN_MIC0_18 660 0x0000 //TX_PREEQ_BIN_MIC0_19 @@ -48038,15 +72770,15 @@ 669 0x4848 //TX_PREEQ_GAIN_MIC1_3 670 0x4848 //TX_PREEQ_GAIN_MIC1_4 671 0x4848 //TX_PREEQ_GAIN_MIC1_5 -672 0x4848 //TX_PREEQ_GAIN_MIC1_6 -673 0x4848 //TX_PREEQ_GAIN_MIC1_7 -674 0x4848 //TX_PREEQ_GAIN_MIC1_8 -675 0x4848 //TX_PREEQ_GAIN_MIC1_9 -676 0x4848 //TX_PREEQ_GAIN_MIC1_10 -677 0x4848 //TX_PREEQ_GAIN_MIC1_11 -678 0x4848 //TX_PREEQ_GAIN_MIC1_12 -679 0x4848 //TX_PREEQ_GAIN_MIC1_13 -680 0x4848 //TX_PREEQ_GAIN_MIC1_14 +672 0x4645 //TX_PREEQ_GAIN_MIC1_6 +673 0x4442 //TX_PREEQ_GAIN_MIC1_7 +674 0x4140 //TX_PREEQ_GAIN_MIC1_8 +675 0x3E3D //TX_PREEQ_GAIN_MIC1_9 +676 0x3C3C //TX_PREEQ_GAIN_MIC1_10 +677 0x3C3C //TX_PREEQ_GAIN_MIC1_11 +678 0x3938 //TX_PREEQ_GAIN_MIC1_12 +679 0x3A3C //TX_PREEQ_GAIN_MIC1_13 +680 0x3C3E //TX_PREEQ_GAIN_MIC1_14 681 0x4848 //TX_PREEQ_GAIN_MIC1_15 682 0x4848 //TX_PREEQ_GAIN_MIC1_16 683 0x4848 //TX_PREEQ_GAIN_MIC1_17 @@ -48056,23 +72788,23 @@ 687 0x4848 //TX_PREEQ_GAIN_MIC1_21 688 0x4848 //TX_PREEQ_GAIN_MIC1_22 689 0x4848 //TX_PREEQ_GAIN_MIC1_23 -690 0x1812 //TX_PREEQ_BIN_MIC1_0 -691 0x0A0A //TX_PREEQ_BIN_MIC1_1 -692 0x0808 //TX_PREEQ_BIN_MIC1_2 -693 0x080A //TX_PREEQ_BIN_MIC1_3 -694 0x0B09 //TX_PREEQ_BIN_MIC1_4 -695 0x0A06 //TX_PREEQ_BIN_MIC1_5 -696 0x0606 //TX_PREEQ_BIN_MIC1_6 -697 0x0605 //TX_PREEQ_BIN_MIC1_7 -698 0x050A //TX_PREEQ_BIN_MIC1_8 -699 0x1505 //TX_PREEQ_BIN_MIC1_9 -700 0x0506 //TX_PREEQ_BIN_MIC1_10 -701 0x0615 //TX_PREEQ_BIN_MIC1_11 -702 0x1516 //TX_PREEQ_BIN_MIC1_12 -703 0x2021 //TX_PREEQ_BIN_MIC1_13 -704 0x2021 //TX_PREEQ_BIN_MIC1_14 -705 0x2021 //TX_PREEQ_BIN_MIC1_15 -706 0x0800 //TX_PREEQ_BIN_MIC1_16 +690 0x0202 //TX_PREEQ_BIN_MIC1_0 +691 0x0203 //TX_PREEQ_BIN_MIC1_1 +692 0x0303 //TX_PREEQ_BIN_MIC1_2 +693 0x0304 //TX_PREEQ_BIN_MIC1_3 +694 0x0405 //TX_PREEQ_BIN_MIC1_4 +695 0x0506 //TX_PREEQ_BIN_MIC1_5 +696 0x0808 //TX_PREEQ_BIN_MIC1_6 +697 0x0809 //TX_PREEQ_BIN_MIC1_7 +698 0x0A0A //TX_PREEQ_BIN_MIC1_8 +699 0x0C10 //TX_PREEQ_BIN_MIC1_9 +700 0x1013 //TX_PREEQ_BIN_MIC1_10 +701 0x1414 //TX_PREEQ_BIN_MIC1_11 +702 0x261E //TX_PREEQ_BIN_MIC1_12 +703 0x1E14 //TX_PREEQ_BIN_MIC1_13 +704 0x1414 //TX_PREEQ_BIN_MIC1_14 +705 0x2814 //TX_PREEQ_BIN_MIC1_15 +706 0x4000 //TX_PREEQ_BIN_MIC1_16 707 0x0000 //TX_PREEQ_BIN_MIC1_17 708 0x0000 //TX_PREEQ_BIN_MIC1_18 709 0x0000 //TX_PREEQ_BIN_MIC1_19 @@ -48157,7 +72889,7 @@ 788 0x7EB8 //TX_TDDRC_ALPHA_DWN_02 789 0x7EB8 //TX_TDDRC_ALPHA_DWN_03 790 0x7EB8 //TX_TDDRC_ALPHA_DWN_04 -791 0x7FFF //TX_TDDRC_TD_DRC_LIMIT +791 0x7214 //TX_TDDRC_TD_DRC_LIMIT 792 0x0800 //TX_TDDRC_POST_LIMIT_GAIN 793 0x0000 //TX_TDDRC_RESRV_0 794 0x0000 //TX_TDDRC_RESRV_1 @@ -48219,20 +72951,20 @@ 850 0x0000 //TX_FFP_RESRV_4 851 0x0000 //TX_FFP_RESRV_5 852 0x0000 //TX_FFP_RESRV_6 -853 0x0004 //TX_FILTINDX +853 0x0002 //TX_FILTINDX 854 0x0004 //TX_TDDRC_THRD_0 855 0x0016 //TX_TDDRC_THRD_1 -856 0x1900 //TX_TDDRC_THRD_2 -857 0x1900 //TX_TDDRC_THRD_3 -858 0x3000 //TX_TDDRC_SLANT_0 -859 0x7B00 //TX_TDDRC_SLANT_1 +856 0x1800 //TX_TDDRC_THRD_2 +857 0x1800 //TX_TDDRC_THRD_3 +858 0x7FFF //TX_TDDRC_SLANT_0 +859 0x7FFF //TX_TDDRC_SLANT_1 860 0x0C00 //TX_TDDRC_ALPHA_UP_00 861 0x7EB8 //TX_TDDRC_ALPHA_DWN_00 862 0x0000 //TX_TDDRC_HMNC_FLAG 863 0x199A //TX_TDDRC_HMNC_GAIN 864 0x0000 //TX_TDDRC_SMT_FLAG 865 0x0CCD //TX_TDDRC_SMT_W -866 0x0A98 //TX_TDDRC_DRC_GAIN +866 0x0B39 //TX_TDDRC_DRC_GAIN 867 0x7FFF //TX_TDDRC_LMT_THRD 868 0x0000 //TX_TDDRC_LMT_ALPHA 869 0x0000 //TX_TFMASKLTH @@ -48257,14 +72989,79 @@ 888 0x0028 //TX_FASTNS_ARSPC_TH 889 0xC000 //TX_FASTNS_MASK5_TH 890 0x4848 //TX_POSTSSA_MIN_G_VR_MASK -891 0x1000 //TX_A_LESSCUT_RTO_MASK +891 0x7000 //TX_A_LESSCUT_RTO_MASK 892 0x1770 //TX_FASTNS_NOISETH 893 0xC000 //TX_FASTNS_SSA_THLFL 894 0xC000 //TX_FASTNS_SSA_THHFL 895 0xCCCC //TX_FASTNS_SSA_THLFH 896 0xD999 //TX_FASTNS_SSA_THHFH +897 0x2339 //TX_SENDFUNC_REG_MICMUTE +898 0x0021 //TX_SENDFUNC_REG_MICMUTE1 +899 0x02BC //TX_MICMUTE_RATIO_THR +900 0x0140 //TX_MICMUTE_AMP_THR +901 0x0004 //TX_MICMUTE_HPF_IND +902 0x00C0 //TX_MICMUTE_LOG_EYR_TH +903 0x0008 //TX_MICMUTE_CVG_TIME +904 0x0008 //TX_MICMUTE_RELEASE_TIME +905 0x01FE //TX_MIC_VOLUME_MIC0MUTE +906 0x0020 //TX_MICMUTE_EPD_OFFSET_0 +907 0x001E //TX_MICMUTE_FRQ_AEC_L +908 0x7999 //TX_MICMUTE_EAD_THR +909 0x7FFF //TX_MICMUTE_LAMBDA_CB_NLE +910 0x7FFF //TX_MICMUTE_LAMBDA_RE_EST +911 0x4000 //TX_DTD_THR1_MICMUTE_0 +912 0x7000 //TX_DTD_THR1_MICMUTE_1 +913 0x7FFF //TX_DTD_THR1_MICMUTE_2 +914 0x7FFF //TX_DTD_THR1_MICMUTE_3 +915 0x6CCC //TX_DTD_THR2_MICMUTE_0 +916 0x0400 //TX_MICMUTE_MIN_EQ_RE_EST_0 +917 0x0400 //TX_MICMUTE_MIN_EQ_RE_EST_1 +918 0x1000 //TX_MICMUTE_MIN_EQ_RE_EST_2 +919 0x7FFF //TX_MICMUTE_MIN_EQ_RE_EST_3 +920 0x7FFF //TX_MICMUTE_MIN_EQ_RE_EST_4 +921 0x4000 //TX_MICMUTE_C_POST_FLT +922 0x03E8 //TX_MICMUTE_DT_CUT_K +923 0x0001 //TX_MICMUTE_DT_CUT_THR +924 0x03E8 //TX_MICMUTE_DT_CUT_K2 +925 0x0001 //TX_MICMUTE_DT_CUT_THR2 +926 0x0064 //TX_MICMUTE_DT2_HOLD_N +927 0x1000 //TX_MICMUTE_RATIODTH_THCUT +928 0x1000 //TX_MICMUTE_B_POST_FLT_ECHOL +929 0x7FFF //TX_MICMUTE_B_POST_FLT_ECHOH +930 0x0400 //TX_MICMUTE_C_POST_FLT_MASK +931 0x7999 //TX_MICMUTE_RATIODTL_CUT_TH +932 0x0258 //TX_MICMUTE_DT_CUT_K1 +933 0x0800 //TX_MICMUTE_N2_SN_EST +934 0xFC00 //TX_MICMUTE_THR_SN_EST_0 +935 0x001C //TX_MICMUTE_MIN_G_CTRL_0 +936 0x6000 //TX_MICMUTE_A_POST_FILT_S_0 +937 0x7000 //TX_MICMUTE_B_POST_FILT_0 +938 0x2710 //TX_MIC1RUB_AMP_THR +939 0x0010 //TX_MIC1MUTE_RATIO_THR +940 0x0450 //TX_MIC1MUTE_AMP_THR +941 0x0008 //TX_MIC1MUTE_CVG_TIME +942 0x0008 //TX_MIC1MUTE_RELEASE_TIME +943 0x0000 //TX_AMS_RESRV_01 +944 0x0000 //TX_AMS_RESRV_02 +945 0x0000 //TX_AMS_RESRV_03 +946 0x0000 //TX_AMS_RESRV_04 +947 0x0000 //TX_AMS_RESRV_05 +948 0x0000 //TX_AMS_RESRV_06 +949 0x0000 //TX_AMS_RESRV_07 +950 0x0000 //TX_AMS_RESRV_08 +951 0x0000 //TX_AMS_RESRV_09 +952 0x0000 //TX_AMS_RESRV_10 +953 0x0000 //TX_AMS_RESRV_11 +954 0x0000 //TX_AMS_RESRV_12 +955 0x0000 //TX_AMS_RESRV_13 +956 0x0000 //TX_AMS_RESRV_14 +957 0x0000 //TX_AMS_RESRV_15 +958 0x0000 //TX_AMS_RESRV_16 +959 0x0000 //TX_AMS_RESRV_17 +960 0x0000 //TX_AMS_RESRV_18 +961 0x0000 //TX_AMS_RESRV_19 #RX -0 0x0040 //RX_RECVFUNC_MODE_0 +0 0x2040 //RX_RECVFUNC_MODE_0 1 0x0000 //RX_RECVFUNC_MODE_1 2 0x0000 //RX_SAMPLINGFREQ_SIG 3 0x0000 //RX_SAMPLINGFREQ_PROC @@ -49114,11 +73911,862 @@ 110 0x0000 //RX_FDDRC_RESRV_0 129 0x0100 //RX_SPK_VOL 130 0x0000 //RX_VOL_RESRV_0 +#RX 2 +157 0x2040 //RX_RECVFUNC_MODE_0 +158 0x0000 //RX_RECVFUNC_MODE_1 +159 0x0000 //RX_SAMPLINGFREQ_SIG +160 0x0000 //RX_SAMPLINGFREQ_PROC +161 0x000A //RX_FRAME_SZ +162 0x0000 //RX_DELAY_OPT +163 0x3000 //RX_TDDRC_ALPHA_UP_1 +164 0x3000 //RX_TDDRC_ALPHA_UP_2 +165 0x3000 //RX_TDDRC_ALPHA_UP_3 +166 0x3000 //RX_TDDRC_ALPHA_UP_4 +167 0x050D //RX_PGA +168 0x7652 //RX_A_HP +169 0x4000 //RX_B_PE +170 0x7800 //RX_THR_PITCH_DET_0 +171 0x7000 //RX_THR_PITCH_DET_1 +172 0x6000 //RX_THR_PITCH_DET_2 +173 0x0000 //RX_PITCH_BFR_LEN +174 0x0000 //RX_SBD_PITCH_DET +175 0x0000 //RX_PP_RESRV_0 +176 0x0000 //RX_PP_RESRV_1 +177 0xF800 //RX_N_SN_EST +178 0x0000 //RX_N2_SN_EST +179 0x000F //RX_NS_LVL_CTRL +180 0xF800 //RX_THR_SN_EST +181 0x7E00 //RX_LAMBDA_PFILT +182 0x000A //RX_FENS_RESRV_0 +183 0x0000 //RX_FENS_RESRV_1 +184 0x7FB0 //RX_TDDRC_ALPHA_DWN_1 +185 0x7FB0 //RX_TDDRC_ALPHA_DWN_2 +186 0x7FB0 //RX_TDDRC_ALPHA_DWN_3 +187 0x0000 //RX_EXTRA_NS_L +188 0x0000 //RX_EXTRA_NS_A +189 0x7FB0 //RX_TDDRC_ALPHA_DWN_4 +190 0xDA9E //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +192 0x0000 //RX_A_POST_FLT +193 0x0000 //RX_LMT_THRD +194 0x4000 //RX_LMT_ALPHA +195 0x0020 //RX_FDEQ_SUBNUM +196 0x4848 //RX_FDEQ_GAIN_0 +197 0x4848 //RX_FDEQ_GAIN_1 +198 0x4848 //RX_FDEQ_GAIN_2 +199 0x4848 //RX_FDEQ_GAIN_3 +200 0x4848 //RX_FDEQ_GAIN_4 +201 0x4848 //RX_FDEQ_GAIN_5 +202 0x4848 //RX_FDEQ_GAIN_6 +203 0x4848 //RX_FDEQ_GAIN_7 +204 0x4848 //RX_FDEQ_GAIN_8 +205 0x4848 //RX_FDEQ_GAIN_9 +206 0x4848 //RX_FDEQ_GAIN_10 +207 0x4848 //RX_FDEQ_GAIN_11 +208 0x4848 //RX_FDEQ_GAIN_12 +209 0x4848 //RX_FDEQ_GAIN_13 +210 0x4848 //RX_FDEQ_GAIN_14 +211 0x4848 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0000 //RX_FDEQ_BIN_0 +221 0x0000 //RX_FDEQ_BIN_1 +222 0x0000 //RX_FDEQ_BIN_2 +223 0x0000 //RX_FDEQ_BIN_3 +224 0x0000 //RX_FDEQ_BIN_4 +225 0x0000 //RX_FDEQ_BIN_5 +226 0x0000 //RX_FDEQ_BIN_6 +227 0x0000 //RX_FDEQ_BIN_7 +228 0x0000 //RX_FDEQ_BIN_8 +229 0x0000 //RX_FDEQ_BIN_9 +230 0x0000 //RX_FDEQ_BIN_10 +231 0x0000 //RX_FDEQ_BIN_11 +232 0x0000 //RX_FDEQ_BIN_12 +233 0x0000 //RX_FDEQ_BIN_13 +234 0x0000 //RX_FDEQ_BIN_14 +235 0x0000 //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x0000 //RX_FDEQ_RESRV_0 +245 0x0000 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0030 //RX_FDDRC_BAND_MARGIN_1 +248 0x0050 //RX_FDDRC_BAND_MARGIN_2 +249 0x0080 //RX_FDDRC_BAND_MARGIN_3 +250 0x0004 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x5000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x6400 //RX_FDDRC_THRD_3_2 +258 0x6400 //RX_FDDRC_THRD_3_3 +259 0x2000 //RX_FDDRC_SLANT_0_0 +260 0x2000 //RX_FDDRC_SLANT_0_1 +261 0x2000 //RX_FDDRC_SLANT_0_2 +262 0x2000 //RX_FDDRC_SLANT_0_3 +263 0x2000 //RX_FDDRC_SLANT_1_0 +264 0x2000 //RX_FDDRC_SLANT_1_1 +265 0x2000 //RX_FDDRC_SLANT_1_2 +266 0x2000 //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +268 0x0003 //RX_FILTINDX +269 0x0000 //RX_TDDRC_THRD_0 +270 0x0000 //RX_TDDRC_THRD_1 +271 0x0E80 //RX_TDDRC_THRD_2 +272 0x3800 //RX_TDDRC_THRD_3 +273 0x2A00 //RX_TDDRC_SLANT_0 +274 0x6E00 //RX_TDDRC_SLANT_1 +275 0x3000 //RX_TDDRC_ALPHA_UP_0 +276 0x7FB0 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x0000 //RX_TDDRC_HMNC_GAIN +279 0x0000 //RX_TDDRC_SMT_FLAG +280 0x0000 //RX_TDDRC_SMT_W +281 0x0100 //RX_TDDRC_DRC_GAIN +282 0x7C00 //RX_LAMBDA_PKA_FP +283 0x2000 //RX_TPKA_FP +284 0x0080 //RX_MIN_G_FP +285 0x2000 //RX_MAX_G_FP +286 0x0100 //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 +288 0x0010 //RX_MAXLEVEL_CNG +289 0x0000 //RX_BWE_UV_TH +290 0x0000 //RX_BWE_UV_TH2 +291 0x0000 //RX_BWE_UV_TH3 +292 0x0000 //RX_BWE_V_TH +293 0x0000 //RX_BWE_GAIN1_V_TH1 +294 0x0000 //RX_BWE_GAIN1_V_TH2 +295 0x0000 //RX_BWE_UV_EQ +296 0x0000 //RX_BWE_V_EQ +297 0x0000 //RX_BWE_TONE_TH +298 0x0000 //RX_BWE_UV_HOLD_T +299 0x0000 //RX_BWE_GAIN2_ALPHA +300 0x0000 //RX_BWE_GAIN3_ALPHA +301 0x0000 //RX_BWE_CUTOFF +302 0x0000 //RX_BWE_GAINFILL +303 0x0000 //RX_BWE_MAXTH_TONE +304 0x0000 //RX_BWE_EQ_0 +305 0x0000 //RX_BWE_EQ_1 +306 0x0000 //RX_BWE_EQ_2 +307 0x0000 //RX_BWE_EQ_3 +308 0x0000 //RX_BWE_EQ_4 +309 0x0000 //RX_BWE_EQ_5 +310 0x0000 //RX_BWE_EQ_6 +311 0x0000 //RX_BWE_RESRV_0 +312 0x0000 //RX_BWE_RESRV_1 +313 0x0000 //RX_BWE_RESRV_2 +#VOL 0 +163 0x3000 //RX_TDDRC_ALPHA_UP_1 +164 0x3000 //RX_TDDRC_ALPHA_UP_2 +165 0x3000 //RX_TDDRC_ALPHA_UP_3 +166 0x3000 //RX_TDDRC_ALPHA_UP_4 +184 0x7FB0 //RX_TDDRC_ALPHA_DWN_1 +185 0x7FB0 //RX_TDDRC_ALPHA_DWN_2 +186 0x7FB0 //RX_TDDRC_ALPHA_DWN_3 +189 0x7FB0 //RX_TDDRC_ALPHA_DWN_4 +190 0xDA9E //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +269 0x0000 //RX_TDDRC_THRD_0 +270 0x0000 //RX_TDDRC_THRD_1 +271 0x0E80 //RX_TDDRC_THRD_2 +272 0x3800 //RX_TDDRC_THRD_3 +273 0x2A00 //RX_TDDRC_SLANT_0 +274 0x6E00 //RX_TDDRC_SLANT_1 +275 0x3000 //RX_TDDRC_ALPHA_UP_0 +276 0x7FB0 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x0000 //RX_TDDRC_HMNC_GAIN +279 0x0000 //RX_TDDRC_SMT_FLAG +280 0x0000 //RX_TDDRC_SMT_W +281 0x0100 //RX_TDDRC_DRC_GAIN +195 0x0020 //RX_FDEQ_SUBNUM +196 0x4848 //RX_FDEQ_GAIN_0 +197 0x4848 //RX_FDEQ_GAIN_1 +198 0x4848 //RX_FDEQ_GAIN_2 +199 0x4848 //RX_FDEQ_GAIN_3 +200 0x4848 //RX_FDEQ_GAIN_4 +201 0x4848 //RX_FDEQ_GAIN_5 +202 0x4848 //RX_FDEQ_GAIN_6 +203 0x4848 //RX_FDEQ_GAIN_7 +204 0x4848 //RX_FDEQ_GAIN_8 +205 0x4848 //RX_FDEQ_GAIN_9 +206 0x4848 //RX_FDEQ_GAIN_10 +207 0x4848 //RX_FDEQ_GAIN_11 +208 0x4848 //RX_FDEQ_GAIN_12 +209 0x4848 //RX_FDEQ_GAIN_13 +210 0x4848 //RX_FDEQ_GAIN_14 +211 0x4848 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0000 //RX_FDEQ_BIN_0 +221 0x0000 //RX_FDEQ_BIN_1 +222 0x0000 //RX_FDEQ_BIN_2 +223 0x0000 //RX_FDEQ_BIN_3 +224 0x0000 //RX_FDEQ_BIN_4 +225 0x0000 //RX_FDEQ_BIN_5 +226 0x0000 //RX_FDEQ_BIN_6 +227 0x0000 //RX_FDEQ_BIN_7 +228 0x0000 //RX_FDEQ_BIN_8 +229 0x0000 //RX_FDEQ_BIN_9 +230 0x0000 //RX_FDEQ_BIN_10 +231 0x0000 //RX_FDEQ_BIN_11 +232 0x0000 //RX_FDEQ_BIN_12 +233 0x0000 //RX_FDEQ_BIN_13 +234 0x0000 //RX_FDEQ_BIN_14 +235 0x0000 //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x0000 //RX_FDEQ_RESRV_0 +245 0x0000 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0030 //RX_FDDRC_BAND_MARGIN_1 +248 0x0050 //RX_FDDRC_BAND_MARGIN_2 +249 0x0080 //RX_FDDRC_BAND_MARGIN_3 +250 0x0004 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x5000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x6400 //RX_FDDRC_THRD_3_2 +258 0x6400 //RX_FDDRC_THRD_3_3 +259 0x2000 //RX_FDDRC_SLANT_0_0 +260 0x2000 //RX_FDDRC_SLANT_0_1 +261 0x2000 //RX_FDDRC_SLANT_0_2 +262 0x2000 //RX_FDDRC_SLANT_0_3 +263 0x2000 //RX_FDDRC_SLANT_1_0 +264 0x2000 //RX_FDDRC_SLANT_1_1 +265 0x2000 //RX_FDDRC_SLANT_1_2 +266 0x2000 //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +286 0x0100 //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 +#VOL 1 +163 0x3000 //RX_TDDRC_ALPHA_UP_1 +164 0x3000 //RX_TDDRC_ALPHA_UP_2 +165 0x3000 //RX_TDDRC_ALPHA_UP_3 +166 0x3000 //RX_TDDRC_ALPHA_UP_4 +184 0x7FB0 //RX_TDDRC_ALPHA_DWN_1 +185 0x7FB0 //RX_TDDRC_ALPHA_DWN_2 +186 0x7FB0 //RX_TDDRC_ALPHA_DWN_3 +189 0x7FB0 //RX_TDDRC_ALPHA_DWN_4 +190 0xDA9E //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +269 0x0000 //RX_TDDRC_THRD_0 +270 0x0000 //RX_TDDRC_THRD_1 +271 0x0E80 //RX_TDDRC_THRD_2 +272 0x3800 //RX_TDDRC_THRD_3 +273 0x2A00 //RX_TDDRC_SLANT_0 +274 0x6E00 //RX_TDDRC_SLANT_1 +275 0x3000 //RX_TDDRC_ALPHA_UP_0 +276 0x7FB0 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x0000 //RX_TDDRC_HMNC_GAIN +279 0x0000 //RX_TDDRC_SMT_FLAG +280 0x0000 //RX_TDDRC_SMT_W +281 0x0100 //RX_TDDRC_DRC_GAIN +195 0x0020 //RX_FDEQ_SUBNUM +196 0x4848 //RX_FDEQ_GAIN_0 +197 0x4848 //RX_FDEQ_GAIN_1 +198 0x4848 //RX_FDEQ_GAIN_2 +199 0x4848 //RX_FDEQ_GAIN_3 +200 0x4848 //RX_FDEQ_GAIN_4 +201 0x4848 //RX_FDEQ_GAIN_5 +202 0x4848 //RX_FDEQ_GAIN_6 +203 0x4848 //RX_FDEQ_GAIN_7 +204 0x4848 //RX_FDEQ_GAIN_8 +205 0x4848 //RX_FDEQ_GAIN_9 +206 0x4848 //RX_FDEQ_GAIN_10 +207 0x4848 //RX_FDEQ_GAIN_11 +208 0x4848 //RX_FDEQ_GAIN_12 +209 0x4848 //RX_FDEQ_GAIN_13 +210 0x4848 //RX_FDEQ_GAIN_14 +211 0x4848 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0000 //RX_FDEQ_BIN_0 +221 0x0000 //RX_FDEQ_BIN_1 +222 0x0000 //RX_FDEQ_BIN_2 +223 0x0000 //RX_FDEQ_BIN_3 +224 0x0000 //RX_FDEQ_BIN_4 +225 0x0000 //RX_FDEQ_BIN_5 +226 0x0000 //RX_FDEQ_BIN_6 +227 0x0000 //RX_FDEQ_BIN_7 +228 0x0000 //RX_FDEQ_BIN_8 +229 0x0000 //RX_FDEQ_BIN_9 +230 0x0000 //RX_FDEQ_BIN_10 +231 0x0000 //RX_FDEQ_BIN_11 +232 0x0000 //RX_FDEQ_BIN_12 +233 0x0000 //RX_FDEQ_BIN_13 +234 0x0000 //RX_FDEQ_BIN_14 +235 0x0000 //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x0000 //RX_FDEQ_RESRV_0 +245 0x0000 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0030 //RX_FDDRC_BAND_MARGIN_1 +248 0x0050 //RX_FDDRC_BAND_MARGIN_2 +249 0x0080 //RX_FDDRC_BAND_MARGIN_3 +250 0x0004 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x5000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x6400 //RX_FDDRC_THRD_3_2 +258 0x6400 //RX_FDDRC_THRD_3_3 +259 0x2000 //RX_FDDRC_SLANT_0_0 +260 0x2000 //RX_FDDRC_SLANT_0_1 +261 0x2000 //RX_FDDRC_SLANT_0_2 +262 0x2000 //RX_FDDRC_SLANT_0_3 +263 0x2000 //RX_FDDRC_SLANT_1_0 +264 0x2000 //RX_FDDRC_SLANT_1_1 +265 0x2000 //RX_FDDRC_SLANT_1_2 +266 0x2000 //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +286 0x0100 //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 +#VOL 2 +163 0x3000 //RX_TDDRC_ALPHA_UP_1 +164 0x3000 //RX_TDDRC_ALPHA_UP_2 +165 0x3000 //RX_TDDRC_ALPHA_UP_3 +166 0x3000 //RX_TDDRC_ALPHA_UP_4 +184 0x7FB0 //RX_TDDRC_ALPHA_DWN_1 +185 0x7FB0 //RX_TDDRC_ALPHA_DWN_2 +186 0x7FB0 //RX_TDDRC_ALPHA_DWN_3 +189 0x7FB0 //RX_TDDRC_ALPHA_DWN_4 +190 0xDA9E //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +269 0x0000 //RX_TDDRC_THRD_0 +270 0x0000 //RX_TDDRC_THRD_1 +271 0x0E80 //RX_TDDRC_THRD_2 +272 0x3800 //RX_TDDRC_THRD_3 +273 0x2A00 //RX_TDDRC_SLANT_0 +274 0x6E00 //RX_TDDRC_SLANT_1 +275 0x3000 //RX_TDDRC_ALPHA_UP_0 +276 0x7FB0 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x0000 //RX_TDDRC_HMNC_GAIN +279 0x0000 //RX_TDDRC_SMT_FLAG +280 0x0000 //RX_TDDRC_SMT_W +281 0x0100 //RX_TDDRC_DRC_GAIN +195 0x0020 //RX_FDEQ_SUBNUM +196 0x4848 //RX_FDEQ_GAIN_0 +197 0x4848 //RX_FDEQ_GAIN_1 +198 0x4848 //RX_FDEQ_GAIN_2 +199 0x4848 //RX_FDEQ_GAIN_3 +200 0x4848 //RX_FDEQ_GAIN_4 +201 0x4848 //RX_FDEQ_GAIN_5 +202 0x4848 //RX_FDEQ_GAIN_6 +203 0x4848 //RX_FDEQ_GAIN_7 +204 0x4848 //RX_FDEQ_GAIN_8 +205 0x4848 //RX_FDEQ_GAIN_9 +206 0x4848 //RX_FDEQ_GAIN_10 +207 0x4848 //RX_FDEQ_GAIN_11 +208 0x4848 //RX_FDEQ_GAIN_12 +209 0x4848 //RX_FDEQ_GAIN_13 +210 0x4848 //RX_FDEQ_GAIN_14 +211 0x4848 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0000 //RX_FDEQ_BIN_0 +221 0x0000 //RX_FDEQ_BIN_1 +222 0x0000 //RX_FDEQ_BIN_2 +223 0x0000 //RX_FDEQ_BIN_3 +224 0x0000 //RX_FDEQ_BIN_4 +225 0x0000 //RX_FDEQ_BIN_5 +226 0x0000 //RX_FDEQ_BIN_6 +227 0x0000 //RX_FDEQ_BIN_7 +228 0x0000 //RX_FDEQ_BIN_8 +229 0x0000 //RX_FDEQ_BIN_9 +230 0x0000 //RX_FDEQ_BIN_10 +231 0x0000 //RX_FDEQ_BIN_11 +232 0x0000 //RX_FDEQ_BIN_12 +233 0x0000 //RX_FDEQ_BIN_13 +234 0x0000 //RX_FDEQ_BIN_14 +235 0x0000 //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x0000 //RX_FDEQ_RESRV_0 +245 0x0000 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0030 //RX_FDDRC_BAND_MARGIN_1 +248 0x0050 //RX_FDDRC_BAND_MARGIN_2 +249 0x0080 //RX_FDDRC_BAND_MARGIN_3 +250 0x0004 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x5000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x6400 //RX_FDDRC_THRD_3_2 +258 0x6400 //RX_FDDRC_THRD_3_3 +259 0x2000 //RX_FDDRC_SLANT_0_0 +260 0x2000 //RX_FDDRC_SLANT_0_1 +261 0x2000 //RX_FDDRC_SLANT_0_2 +262 0x2000 //RX_FDDRC_SLANT_0_3 +263 0x2000 //RX_FDDRC_SLANT_1_0 +264 0x2000 //RX_FDDRC_SLANT_1_1 +265 0x2000 //RX_FDDRC_SLANT_1_2 +266 0x2000 //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +286 0x0100 //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 +#VOL 3 +163 0x3000 //RX_TDDRC_ALPHA_UP_1 +164 0x3000 //RX_TDDRC_ALPHA_UP_2 +165 0x3000 //RX_TDDRC_ALPHA_UP_3 +166 0x3000 //RX_TDDRC_ALPHA_UP_4 +184 0x7FB0 //RX_TDDRC_ALPHA_DWN_1 +185 0x7FB0 //RX_TDDRC_ALPHA_DWN_2 +186 0x7FB0 //RX_TDDRC_ALPHA_DWN_3 +189 0x7FB0 //RX_TDDRC_ALPHA_DWN_4 +190 0xDA9E //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +269 0x0000 //RX_TDDRC_THRD_0 +270 0x0000 //RX_TDDRC_THRD_1 +271 0x0E80 //RX_TDDRC_THRD_2 +272 0x3800 //RX_TDDRC_THRD_3 +273 0x2A00 //RX_TDDRC_SLANT_0 +274 0x6E00 //RX_TDDRC_SLANT_1 +275 0x3000 //RX_TDDRC_ALPHA_UP_0 +276 0x7FB0 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x0000 //RX_TDDRC_HMNC_GAIN +279 0x0000 //RX_TDDRC_SMT_FLAG +280 0x0000 //RX_TDDRC_SMT_W +281 0x0100 //RX_TDDRC_DRC_GAIN +195 0x0020 //RX_FDEQ_SUBNUM +196 0x4848 //RX_FDEQ_GAIN_0 +197 0x4848 //RX_FDEQ_GAIN_1 +198 0x4848 //RX_FDEQ_GAIN_2 +199 0x4848 //RX_FDEQ_GAIN_3 +200 0x4848 //RX_FDEQ_GAIN_4 +201 0x4848 //RX_FDEQ_GAIN_5 +202 0x4848 //RX_FDEQ_GAIN_6 +203 0x4848 //RX_FDEQ_GAIN_7 +204 0x4848 //RX_FDEQ_GAIN_8 +205 0x4848 //RX_FDEQ_GAIN_9 +206 0x4848 //RX_FDEQ_GAIN_10 +207 0x4848 //RX_FDEQ_GAIN_11 +208 0x4848 //RX_FDEQ_GAIN_12 +209 0x4848 //RX_FDEQ_GAIN_13 +210 0x4848 //RX_FDEQ_GAIN_14 +211 0x4848 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0000 //RX_FDEQ_BIN_0 +221 0x0000 //RX_FDEQ_BIN_1 +222 0x0000 //RX_FDEQ_BIN_2 +223 0x0000 //RX_FDEQ_BIN_3 +224 0x0000 //RX_FDEQ_BIN_4 +225 0x0000 //RX_FDEQ_BIN_5 +226 0x0000 //RX_FDEQ_BIN_6 +227 0x0000 //RX_FDEQ_BIN_7 +228 0x0000 //RX_FDEQ_BIN_8 +229 0x0000 //RX_FDEQ_BIN_9 +230 0x0000 //RX_FDEQ_BIN_10 +231 0x0000 //RX_FDEQ_BIN_11 +232 0x0000 //RX_FDEQ_BIN_12 +233 0x0000 //RX_FDEQ_BIN_13 +234 0x0000 //RX_FDEQ_BIN_14 +235 0x0000 //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x0000 //RX_FDEQ_RESRV_0 +245 0x0000 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0030 //RX_FDDRC_BAND_MARGIN_1 +248 0x0050 //RX_FDDRC_BAND_MARGIN_2 +249 0x0080 //RX_FDDRC_BAND_MARGIN_3 +250 0x0004 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x5000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x6400 //RX_FDDRC_THRD_3_2 +258 0x6400 //RX_FDDRC_THRD_3_3 +259 0x2000 //RX_FDDRC_SLANT_0_0 +260 0x2000 //RX_FDDRC_SLANT_0_1 +261 0x2000 //RX_FDDRC_SLANT_0_2 +262 0x2000 //RX_FDDRC_SLANT_0_3 +263 0x2000 //RX_FDDRC_SLANT_1_0 +264 0x2000 //RX_FDDRC_SLANT_1_1 +265 0x2000 //RX_FDDRC_SLANT_1_2 +266 0x2000 //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +286 0x0100 //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 +#VOL 4 +163 0x3000 //RX_TDDRC_ALPHA_UP_1 +164 0x3000 //RX_TDDRC_ALPHA_UP_2 +165 0x3000 //RX_TDDRC_ALPHA_UP_3 +166 0x3000 //RX_TDDRC_ALPHA_UP_4 +184 0x7FB0 //RX_TDDRC_ALPHA_DWN_1 +185 0x7FB0 //RX_TDDRC_ALPHA_DWN_2 +186 0x7FB0 //RX_TDDRC_ALPHA_DWN_3 +189 0x7FB0 //RX_TDDRC_ALPHA_DWN_4 +190 0xDA9E //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +269 0x0000 //RX_TDDRC_THRD_0 +270 0x0000 //RX_TDDRC_THRD_1 +271 0x0E80 //RX_TDDRC_THRD_2 +272 0x3800 //RX_TDDRC_THRD_3 +273 0x2A00 //RX_TDDRC_SLANT_0 +274 0x6E00 //RX_TDDRC_SLANT_1 +275 0x3000 //RX_TDDRC_ALPHA_UP_0 +276 0x7FB0 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x0000 //RX_TDDRC_HMNC_GAIN +279 0x0000 //RX_TDDRC_SMT_FLAG +280 0x0000 //RX_TDDRC_SMT_W +281 0x0100 //RX_TDDRC_DRC_GAIN +195 0x0020 //RX_FDEQ_SUBNUM +196 0x4848 //RX_FDEQ_GAIN_0 +197 0x4848 //RX_FDEQ_GAIN_1 +198 0x4848 //RX_FDEQ_GAIN_2 +199 0x4848 //RX_FDEQ_GAIN_3 +200 0x4848 //RX_FDEQ_GAIN_4 +201 0x4848 //RX_FDEQ_GAIN_5 +202 0x4848 //RX_FDEQ_GAIN_6 +203 0x4848 //RX_FDEQ_GAIN_7 +204 0x4848 //RX_FDEQ_GAIN_8 +205 0x4848 //RX_FDEQ_GAIN_9 +206 0x4848 //RX_FDEQ_GAIN_10 +207 0x4848 //RX_FDEQ_GAIN_11 +208 0x4848 //RX_FDEQ_GAIN_12 +209 0x4848 //RX_FDEQ_GAIN_13 +210 0x4848 //RX_FDEQ_GAIN_14 +211 0x4848 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0000 //RX_FDEQ_BIN_0 +221 0x0000 //RX_FDEQ_BIN_1 +222 0x0000 //RX_FDEQ_BIN_2 +223 0x0000 //RX_FDEQ_BIN_3 +224 0x0000 //RX_FDEQ_BIN_4 +225 0x0000 //RX_FDEQ_BIN_5 +226 0x0000 //RX_FDEQ_BIN_6 +227 0x0000 //RX_FDEQ_BIN_7 +228 0x0000 //RX_FDEQ_BIN_8 +229 0x0000 //RX_FDEQ_BIN_9 +230 0x0000 //RX_FDEQ_BIN_10 +231 0x0000 //RX_FDEQ_BIN_11 +232 0x0000 //RX_FDEQ_BIN_12 +233 0x0000 //RX_FDEQ_BIN_13 +234 0x0000 //RX_FDEQ_BIN_14 +235 0x0000 //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x0000 //RX_FDEQ_RESRV_0 +245 0x0000 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0030 //RX_FDDRC_BAND_MARGIN_1 +248 0x0050 //RX_FDDRC_BAND_MARGIN_2 +249 0x0080 //RX_FDDRC_BAND_MARGIN_3 +250 0x0004 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x5000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x6400 //RX_FDDRC_THRD_3_2 +258 0x6400 //RX_FDDRC_THRD_3_3 +259 0x2000 //RX_FDDRC_SLANT_0_0 +260 0x2000 //RX_FDDRC_SLANT_0_1 +261 0x2000 //RX_FDDRC_SLANT_0_2 +262 0x2000 //RX_FDDRC_SLANT_0_3 +263 0x2000 //RX_FDDRC_SLANT_1_0 +264 0x2000 //RX_FDDRC_SLANT_1_1 +265 0x2000 //RX_FDDRC_SLANT_1_2 +266 0x2000 //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +286 0x0100 //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 +#VOL 5 +163 0x3000 //RX_TDDRC_ALPHA_UP_1 +164 0x3000 //RX_TDDRC_ALPHA_UP_2 +165 0x3000 //RX_TDDRC_ALPHA_UP_3 +166 0x3000 //RX_TDDRC_ALPHA_UP_4 +184 0x7FB0 //RX_TDDRC_ALPHA_DWN_1 +185 0x7FB0 //RX_TDDRC_ALPHA_DWN_2 +186 0x7FB0 //RX_TDDRC_ALPHA_DWN_3 +189 0x7FB0 //RX_TDDRC_ALPHA_DWN_4 +190 0xDA9E //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +269 0x0000 //RX_TDDRC_THRD_0 +270 0x0000 //RX_TDDRC_THRD_1 +271 0x0E80 //RX_TDDRC_THRD_2 +272 0x3800 //RX_TDDRC_THRD_3 +273 0x2A00 //RX_TDDRC_SLANT_0 +274 0x6E00 //RX_TDDRC_SLANT_1 +275 0x3000 //RX_TDDRC_ALPHA_UP_0 +276 0x7FB0 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x0000 //RX_TDDRC_HMNC_GAIN +279 0x0000 //RX_TDDRC_SMT_FLAG +280 0x0000 //RX_TDDRC_SMT_W +281 0x0100 //RX_TDDRC_DRC_GAIN +195 0x0020 //RX_FDEQ_SUBNUM +196 0x4848 //RX_FDEQ_GAIN_0 +197 0x4848 //RX_FDEQ_GAIN_1 +198 0x4848 //RX_FDEQ_GAIN_2 +199 0x4848 //RX_FDEQ_GAIN_3 +200 0x4848 //RX_FDEQ_GAIN_4 +201 0x4848 //RX_FDEQ_GAIN_5 +202 0x4848 //RX_FDEQ_GAIN_6 +203 0x4848 //RX_FDEQ_GAIN_7 +204 0x4848 //RX_FDEQ_GAIN_8 +205 0x4848 //RX_FDEQ_GAIN_9 +206 0x4848 //RX_FDEQ_GAIN_10 +207 0x4848 //RX_FDEQ_GAIN_11 +208 0x4848 //RX_FDEQ_GAIN_12 +209 0x4848 //RX_FDEQ_GAIN_13 +210 0x4848 //RX_FDEQ_GAIN_14 +211 0x4848 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0000 //RX_FDEQ_BIN_0 +221 0x0000 //RX_FDEQ_BIN_1 +222 0x0000 //RX_FDEQ_BIN_2 +223 0x0000 //RX_FDEQ_BIN_3 +224 0x0000 //RX_FDEQ_BIN_4 +225 0x0000 //RX_FDEQ_BIN_5 +226 0x0000 //RX_FDEQ_BIN_6 +227 0x0000 //RX_FDEQ_BIN_7 +228 0x0000 //RX_FDEQ_BIN_8 +229 0x0000 //RX_FDEQ_BIN_9 +230 0x0000 //RX_FDEQ_BIN_10 +231 0x0000 //RX_FDEQ_BIN_11 +232 0x0000 //RX_FDEQ_BIN_12 +233 0x0000 //RX_FDEQ_BIN_13 +234 0x0000 //RX_FDEQ_BIN_14 +235 0x0000 //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x0000 //RX_FDEQ_RESRV_0 +245 0x0000 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0030 //RX_FDDRC_BAND_MARGIN_1 +248 0x0050 //RX_FDDRC_BAND_MARGIN_2 +249 0x0080 //RX_FDDRC_BAND_MARGIN_3 +250 0x0004 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x5000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x6400 //RX_FDDRC_THRD_3_2 +258 0x6400 //RX_FDDRC_THRD_3_3 +259 0x2000 //RX_FDDRC_SLANT_0_0 +260 0x2000 //RX_FDDRC_SLANT_0_1 +261 0x2000 //RX_FDDRC_SLANT_0_2 +262 0x2000 //RX_FDDRC_SLANT_0_3 +263 0x2000 //RX_FDDRC_SLANT_1_0 +264 0x2000 //RX_FDDRC_SLANT_1_1 +265 0x2000 //RX_FDDRC_SLANT_1_2 +266 0x2000 //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +286 0x0100 //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 +#VOL 6 +163 0x3000 //RX_TDDRC_ALPHA_UP_1 +164 0x3000 //RX_TDDRC_ALPHA_UP_2 +165 0x3000 //RX_TDDRC_ALPHA_UP_3 +166 0x3000 //RX_TDDRC_ALPHA_UP_4 +184 0x7FB0 //RX_TDDRC_ALPHA_DWN_1 +185 0x7FB0 //RX_TDDRC_ALPHA_DWN_2 +186 0x7FB0 //RX_TDDRC_ALPHA_DWN_3 +189 0x7FB0 //RX_TDDRC_ALPHA_DWN_4 +190 0xDA9E //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +269 0x0000 //RX_TDDRC_THRD_0 +270 0x0000 //RX_TDDRC_THRD_1 +271 0x0E80 //RX_TDDRC_THRD_2 +272 0x3800 //RX_TDDRC_THRD_3 +273 0x2A00 //RX_TDDRC_SLANT_0 +274 0x6E00 //RX_TDDRC_SLANT_1 +275 0x3000 //RX_TDDRC_ALPHA_UP_0 +276 0x7FB0 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x0000 //RX_TDDRC_HMNC_GAIN +279 0x0000 //RX_TDDRC_SMT_FLAG +280 0x0000 //RX_TDDRC_SMT_W +281 0x0100 //RX_TDDRC_DRC_GAIN +195 0x0020 //RX_FDEQ_SUBNUM +196 0x4848 //RX_FDEQ_GAIN_0 +197 0x4848 //RX_FDEQ_GAIN_1 +198 0x4848 //RX_FDEQ_GAIN_2 +199 0x4848 //RX_FDEQ_GAIN_3 +200 0x4848 //RX_FDEQ_GAIN_4 +201 0x4848 //RX_FDEQ_GAIN_5 +202 0x4848 //RX_FDEQ_GAIN_6 +203 0x4848 //RX_FDEQ_GAIN_7 +204 0x4848 //RX_FDEQ_GAIN_8 +205 0x4848 //RX_FDEQ_GAIN_9 +206 0x4848 //RX_FDEQ_GAIN_10 +207 0x4848 //RX_FDEQ_GAIN_11 +208 0x4848 //RX_FDEQ_GAIN_12 +209 0x4848 //RX_FDEQ_GAIN_13 +210 0x4848 //RX_FDEQ_GAIN_14 +211 0x4848 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0000 //RX_FDEQ_BIN_0 +221 0x0000 //RX_FDEQ_BIN_1 +222 0x0000 //RX_FDEQ_BIN_2 +223 0x0000 //RX_FDEQ_BIN_3 +224 0x0000 //RX_FDEQ_BIN_4 +225 0x0000 //RX_FDEQ_BIN_5 +226 0x0000 //RX_FDEQ_BIN_6 +227 0x0000 //RX_FDEQ_BIN_7 +228 0x0000 //RX_FDEQ_BIN_8 +229 0x0000 //RX_FDEQ_BIN_9 +230 0x0000 //RX_FDEQ_BIN_10 +231 0x0000 //RX_FDEQ_BIN_11 +232 0x0000 //RX_FDEQ_BIN_12 +233 0x0000 //RX_FDEQ_BIN_13 +234 0x0000 //RX_FDEQ_BIN_14 +235 0x0000 //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x0000 //RX_FDEQ_RESRV_0 +245 0x0000 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0030 //RX_FDDRC_BAND_MARGIN_1 +248 0x0050 //RX_FDDRC_BAND_MARGIN_2 +249 0x0080 //RX_FDDRC_BAND_MARGIN_3 +250 0x0004 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x5000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x6400 //RX_FDDRC_THRD_3_2 +258 0x6400 //RX_FDDRC_THRD_3_3 +259 0x2000 //RX_FDDRC_SLANT_0_0 +260 0x2000 //RX_FDDRC_SLANT_0_1 +261 0x2000 //RX_FDDRC_SLANT_0_2 +262 0x2000 //RX_FDDRC_SLANT_0_3 +263 0x2000 //RX_FDDRC_SLANT_1_0 +264 0x2000 //RX_FDDRC_SLANT_1_1 +265 0x2000 //RX_FDDRC_SLANT_1_2 +266 0x2000 //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +286 0x0100 //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 #CASE_NAME HEADSET-TTY_FULL-VOICE_GENERIC-NB -#PARAM_MODE FULL -#PARAM_TYPE TX+RX -#TOTAL_CUSTOM_STEP 7 +#PARAM_MODE Full +#PARAM_TYPE TX+2RX +#TOTAL_CUSTOM_STEP 7+7 #TX 0 0x0001 //TX_OPERATION_MODE_0 1 0x0000 //TX_OPERATION_MODE_1 @@ -49362,7 +75010,7 @@ 239 0x0000 //TX_DT_RESRV_7 240 0x0000 //TX_DT_RESRV_8 241 0x0000 //TX_DT_RESRV_9 -242 0xF200 //TX_THR_SN_EST_0 +242 0xFA00 //TX_THR_SN_EST_0 243 0xF400 //TX_THR_SN_EST_1 244 0xF800 //TX_THR_SN_EST_2 245 0xF600 //TX_THR_SN_EST_3 @@ -49371,12 +75019,12 @@ 248 0xF800 //TX_THR_SN_EST_6 249 0xF800 //TX_THR_SN_EST_7 250 0x0100 //TX_DELTA_THR_SN_EST_0 -251 0x0000 //TX_DELTA_THR_SN_EST_1 +251 0x0100 //TX_DELTA_THR_SN_EST_1 252 0x0100 //TX_DELTA_THR_SN_EST_2 -253 0x0100 //TX_DELTA_THR_SN_EST_3 +253 0x0200 //TX_DELTA_THR_SN_EST_3 254 0x0200 //TX_DELTA_THR_SN_EST_4 255 0x0200 //TX_DELTA_THR_SN_EST_5 -256 0x0200 //TX_DELTA_THR_SN_EST_6 +256 0x0000 //TX_DELTA_THR_SN_EST_6 257 0x0200 //TX_DELTA_THR_SN_EST_7 258 0x4000 //TX_LAMBDA_NN_EST_0 259 0x4000 //TX_LAMBDA_NN_EST_1 @@ -49402,12 +75050,12 @@ 279 0x0000 //TX_B_POST_FLT_0 280 0x0000 //TX_B_POST_FLT_1 281 0x001A //TX_NS_LVL_CTRL_0 -282 0x001A //TX_NS_LVL_CTRL_1 +282 0x0014 //TX_NS_LVL_CTRL_1 283 0x0014 //TX_NS_LVL_CTRL_2 -284 0x0014 //TX_NS_LVL_CTRL_3 +284 0x000C //TX_NS_LVL_CTRL_3 285 0x000C //TX_NS_LVL_CTRL_4 286 0x000C //TX_NS_LVL_CTRL_5 -287 0x000C //TX_NS_LVL_CTRL_6 +287 0x001A //TX_NS_LVL_CTRL_6 288 0x000C //TX_NS_LVL_CTRL_7 289 0x000E //TX_MIN_GAIN_S_0 290 0x0014 //TX_MIN_GAIN_S_1 @@ -49423,10 +75071,10 @@ 300 0x7FFF //TX_SNRI_SUP_0 301 0x7FFF //TX_SNRI_SUP_1 302 0x7FFF //TX_SNRI_SUP_2 -303 0x7FFF //TX_SNRI_SUP_3 +303 0x4000 //TX_SNRI_SUP_3 304 0x4000 //TX_SNRI_SUP_4 305 0x4000 //TX_SNRI_SUP_5 -306 0x4000 //TX_SNRI_SUP_6 +306 0x7FFF //TX_SNRI_SUP_6 307 0x4000 //TX_SNRI_SUP_7 308 0x1200 //TX_THR_LFNS 309 0x0147 //TX_G_LFNS @@ -49435,12 +75083,12 @@ 312 0x7FFF //TX_A_POST_FILT_0 313 0x7FFF //TX_A_POST_FILT_1 314 0x4000 //TX_A_POST_FILT_S_0 -315 0x199A //TX_A_POST_FILT_S_1 +315 0x1000 //TX_A_POST_FILT_S_1 316 0x1000 //TX_A_POST_FILT_S_2 -317 0x1000 //TX_A_POST_FILT_S_3 +317 0x6666 //TX_A_POST_FILT_S_3 318 0x6666 //TX_A_POST_FILT_S_4 319 0x6666 //TX_A_POST_FILT_S_5 -320 0x6666 //TX_A_POST_FILT_S_6 +320 0x199A //TX_A_POST_FILT_S_6 321 0x6666 //TX_A_POST_FILT_S_7 322 0x2000 //TX_B_POST_FILT_0 323 0x2000 //TX_B_POST_FILT_1 @@ -49487,7 +75135,7 @@ 364 0x0000 //TX_K_APT 365 0x0001 //TX_NOISEDET 366 0x05A0 //TX_NDETCT -367 0x000A //TX_NOISE_TH_0 +367 0x003B //TX_NOISE_TH_0 368 0x1388 //TX_NOISE_TH_0_2 369 0x3A98 //TX_NOISE_TH_0_3 370 0x0C80 //TX_NOISE_TH_1 @@ -49499,11 +75147,11 @@ 376 0x7FFF //TX_NOISE_TH_5_3 377 0x7FFF //TX_NOISE_TH_5_4 378 0x00C8 //TX_NOISE_TH_6 -379 0x000A //TX_MINENOISE_TH -380 0x0000 //TX_MINENOISE_MIC0_TH_MTS -381 0x0000 //TX_MINENOISE_MIC0_TH_EXP -382 0x0000 //TX_MINENOISE_MIC0_S_TH_MTS -383 0x0000 //TX_MINENOISE_MIC0_S_TH_EXP +379 0x00C8 //TX_MINENOISE_TH +380 0xD508 //TX_MORENS_TFMASK_TH +381 0x0001 //TX_DRC_QUIET_FLOOR +382 0x3A98 //TX_RATIODTL_CUT_TH +383 0x0DAC //TX_DT_CUT_K1 384 0x6400 //TX_OUT_ENER_S_TH_CLEAN 385 0x6400 //TX_OUT_ENER_S_TH_LESSCLEAN 386 0x6400 //TX_OUT_ENER_S_TH_NOISY @@ -49511,22 +75159,22 @@ 388 0x7D00 //TX_OUT_ENER_TH_SPEECH 389 0x0000 //TX_SN_NPB_GAIN 390 0x0000 //TX_NN_NPB_GAIN -391 0x0000 //TX_CSX_ALPHA_0 -392 0x0000 //TX_CSX_ALPHA_1 -393 0x0000 //TX_CSX_ALPHA_2 -394 0x0000 //TX_CSX_ALPHA_3 -395 0x0000 //TX_MU_ARSP_EST -396 0x0000 //TX_P_OUTBEAM_MIN_TH +391 0x7FFF //TX_POST_MASK_SUP_HSNE +392 0x1388 //TX_TAIL_DET_TH +393 0x4000 //TX_B_LESSCUT_RTO_WTA +394 0x0000 //TX_MEL_G_R +395 0x0080 //TX_SUPHIGH_TH +396 0x0000 //TX_MASK_G_R 397 0x0000 //TX_EXTRA_NS_L -398 0x0000 //TX_EXTRA_NS_A -399 0x0000 //TX_VR_NOISE_FLOOR_TH +398 0x1800 //TX_C_POST_FLT_MASK +399 0x7FFF //TX_A_POST_FLT_WNS 400 0x0000 //TX_MIN_G_LOW300HZ 401 0x0010 //TX_MAXLEVEL_CNG 402 0x0000 //TX_STN_NOISE_TH 403 0x0000 //TX_POST_MASK_SUP 404 0x0000 //TX_POST_MASK_ADJUST 405 0x0014 //TX_NS_ENOISE_MIC0_TH -406 0x0014 //TX_MINENOISE_MIC0_TH +406 0x0032 //TX_MINENOISE_MIC0_TH 407 0x0226 //TX_MINENOISE_MIC0_S_TH 408 0x2879 //TX_MIN_G_CTRL_SSNS 409 0x0400 //TX_METAL_RTO_THR @@ -49634,16 +75282,16 @@ 511 0x6666 //TX_MIC_TO_BFGAIN 512 0x6666 //TX_MICTOBFGAIN0 513 0x0014 //TX_FASTMUE_TH -514 0x0000 //TX_DERVB_LEN_0 -515 0x0000 //TX_DERVB_LEN_1 -516 0x0000 //TX_RHO_DERVB -517 0x0000 //TX_MIC_INDX_DERVB -518 0x0000 //TX_MU_DERVB -519 0x0000 //TX_DR_RESRV_0 -520 0x0000 //TX_DR_RESRV_1 -521 0x0000 //TX_DR_RESRV_2 -522 0x0000 //TX_DR_RESRV_3 -523 0x0000 //TX_DR_RESRV_4 +514 0xC000 //TX_DEREVERB_LF_MU +515 0xC000 //TX_DEREVERB_HF_MU +516 0xCCCC //TX_DEREVERB_DELAY +517 0xD999 //TX_DEREVERB_COEF_LEN +518 0x1F40 //TX_DEREVERB_DNR +519 0x0000 //TX_DEREVERB_ALPHA +520 0x0000 //TX_DEREVERB_BETA +521 0x0000 //TX_GSC_RTOL_TH +522 0x7000 //TX_GSC_RTOH_TH +523 0x0064 //TX_WIDE2_MEANHTH 524 0x0000 //TX_DR_RESRV_5 525 0x0000 //TX_DR_RESRV_6 526 0x0000 //TX_DR_RESRV_7 @@ -50009,16 +75657,81 @@ 886 0x0000 //TX_FASTNS_TFMASKBIN_TH2 887 0x0000 //TX_FASTNS_TFMASKBIN_TH3 888 0x00C8 //TX_FASTNS_ARSPC_TH -889 0xD99A //TX_FASTNS_MASK5_TH +889 0xC000 //TX_FASTNS_MASK5_TH 890 0x051F //TX_POSTSSA_MIN_G_VR_MASK -891 0x7FFF //TX_A_LESSCUT_RTO_MASK +891 0x4000 //TX_A_LESSCUT_RTO_MASK 892 0x1770 //TX_FASTNS_NOISETH 893 0xC000 //TX_FASTNS_SSA_THLFL 894 0xC000 //TX_FASTNS_SSA_THHFL 895 0xCCCC //TX_FASTNS_SSA_THLFH 896 0xD999 //TX_FASTNS_SSA_THHFH +897 0x2339 //TX_SENDFUNC_REG_MICMUTE +898 0x0021 //TX_SENDFUNC_REG_MICMUTE1 +899 0x02BC //TX_MICMUTE_RATIO_THR +900 0x0140 //TX_MICMUTE_AMP_THR +901 0x0004 //TX_MICMUTE_HPF_IND +902 0x00C0 //TX_MICMUTE_LOG_EYR_TH +903 0x0008 //TX_MICMUTE_CVG_TIME +904 0x0008 //TX_MICMUTE_RELEASE_TIME +905 0x01FE //TX_MIC_VOLUME_MIC0MUTE +906 0x0020 //TX_MICMUTE_EPD_OFFSET_0 +907 0x001E //TX_MICMUTE_FRQ_AEC_L +908 0x7999 //TX_MICMUTE_EAD_THR +909 0x7FFF //TX_MICMUTE_LAMBDA_CB_NLE +910 0x7FFF //TX_MICMUTE_LAMBDA_RE_EST +911 0x4000 //TX_DTD_THR1_MICMUTE_0 +912 0x7000 //TX_DTD_THR1_MICMUTE_1 +913 0x7FFF //TX_DTD_THR1_MICMUTE_2 +914 0x7FFF //TX_DTD_THR1_MICMUTE_3 +915 0x6CCC //TX_DTD_THR2_MICMUTE_0 +916 0x0400 //TX_MICMUTE_MIN_EQ_RE_EST_0 +917 0x0400 //TX_MICMUTE_MIN_EQ_RE_EST_1 +918 0x1000 //TX_MICMUTE_MIN_EQ_RE_EST_2 +919 0x7FFF //TX_MICMUTE_MIN_EQ_RE_EST_3 +920 0x7FFF //TX_MICMUTE_MIN_EQ_RE_EST_4 +921 0x4000 //TX_MICMUTE_C_POST_FLT +922 0x03E8 //TX_MICMUTE_DT_CUT_K +923 0x0001 //TX_MICMUTE_DT_CUT_THR +924 0x03E8 //TX_MICMUTE_DT_CUT_K2 +925 0x0001 //TX_MICMUTE_DT_CUT_THR2 +926 0x0064 //TX_MICMUTE_DT2_HOLD_N +927 0x1000 //TX_MICMUTE_RATIODTH_THCUT +928 0x1000 //TX_MICMUTE_B_POST_FLT_ECHOL +929 0x7FFF //TX_MICMUTE_B_POST_FLT_ECHOH +930 0x0400 //TX_MICMUTE_C_POST_FLT_MASK +931 0x7999 //TX_MICMUTE_RATIODTL_CUT_TH +932 0x0258 //TX_MICMUTE_DT_CUT_K1 +933 0x0800 //TX_MICMUTE_N2_SN_EST +934 0xFC00 //TX_MICMUTE_THR_SN_EST_0 +935 0x001C //TX_MICMUTE_MIN_G_CTRL_0 +936 0x6000 //TX_MICMUTE_A_POST_FILT_S_0 +937 0x7000 //TX_MICMUTE_B_POST_FILT_0 +938 0x2710 //TX_MIC1RUB_AMP_THR +939 0x0010 //TX_MIC1MUTE_RATIO_THR +940 0x0450 //TX_MIC1MUTE_AMP_THR +941 0x0008 //TX_MIC1MUTE_CVG_TIME +942 0x0008 //TX_MIC1MUTE_RELEASE_TIME +943 0x0000 //TX_AMS_RESRV_01 +944 0x0000 //TX_AMS_RESRV_02 +945 0x0000 //TX_AMS_RESRV_03 +946 0x0000 //TX_AMS_RESRV_04 +947 0x0000 //TX_AMS_RESRV_05 +948 0x0000 //TX_AMS_RESRV_06 +949 0x0000 //TX_AMS_RESRV_07 +950 0x0000 //TX_AMS_RESRV_08 +951 0x0000 //TX_AMS_RESRV_09 +952 0x0000 //TX_AMS_RESRV_10 +953 0x0000 //TX_AMS_RESRV_11 +954 0x0000 //TX_AMS_RESRV_12 +955 0x0000 //TX_AMS_RESRV_13 +956 0x0000 //TX_AMS_RESRV_14 +957 0x0000 //TX_AMS_RESRV_15 +958 0x0000 //TX_AMS_RESRV_16 +959 0x0000 //TX_AMS_RESRV_17 +960 0x0000 //TX_AMS_RESRV_18 +961 0x0000 //TX_AMS_RESRV_19 #RX -0 0x0040 //RX_RECVFUNC_MODE_0 +0 0x2040 //RX_RECVFUNC_MODE_0 1 0x0000 //RX_RECVFUNC_MODE_1 2 0x0000 //RX_SAMPLINGFREQ_SIG 3 0x0000 //RX_SAMPLINGFREQ_PROC @@ -50868,11 +76581,862 @@ 110 0x0000 //RX_FDDRC_RESRV_0 129 0x0100 //RX_SPK_VOL 130 0x0000 //RX_VOL_RESRV_0 +#RX 2 +157 0x2040 //RX_RECVFUNC_MODE_0 +158 0x0000 //RX_RECVFUNC_MODE_1 +159 0x0000 //RX_SAMPLINGFREQ_SIG +160 0x0000 //RX_SAMPLINGFREQ_PROC +161 0x000A //RX_FRAME_SZ +162 0x0000 //RX_DELAY_OPT +163 0x3000 //RX_TDDRC_ALPHA_UP_1 +164 0x3000 //RX_TDDRC_ALPHA_UP_2 +165 0x3000 //RX_TDDRC_ALPHA_UP_3 +166 0x3000 //RX_TDDRC_ALPHA_UP_4 +167 0x050D //RX_PGA +168 0x7652 //RX_A_HP +169 0x4000 //RX_B_PE +170 0x7800 //RX_THR_PITCH_DET_0 +171 0x7000 //RX_THR_PITCH_DET_1 +172 0x6000 //RX_THR_PITCH_DET_2 +173 0x0000 //RX_PITCH_BFR_LEN +174 0x0000 //RX_SBD_PITCH_DET +175 0x0000 //RX_PP_RESRV_0 +176 0x0000 //RX_PP_RESRV_1 +177 0xF800 //RX_N_SN_EST +178 0x0000 //RX_N2_SN_EST +179 0x000F //RX_NS_LVL_CTRL +180 0xF800 //RX_THR_SN_EST +181 0x7E00 //RX_LAMBDA_PFILT +182 0x000A //RX_FENS_RESRV_0 +183 0x0000 //RX_FENS_RESRV_1 +184 0x7FB0 //RX_TDDRC_ALPHA_DWN_1 +185 0x7FB0 //RX_TDDRC_ALPHA_DWN_2 +186 0x7FB0 //RX_TDDRC_ALPHA_DWN_3 +187 0x0000 //RX_EXTRA_NS_L +188 0x0000 //RX_EXTRA_NS_A +189 0x7FB0 //RX_TDDRC_ALPHA_DWN_4 +190 0xDA9E //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +192 0x0000 //RX_A_POST_FLT +193 0x0000 //RX_LMT_THRD +194 0x4000 //RX_LMT_ALPHA +195 0x0020 //RX_FDEQ_SUBNUM +196 0x4848 //RX_FDEQ_GAIN_0 +197 0x4848 //RX_FDEQ_GAIN_1 +198 0x4848 //RX_FDEQ_GAIN_2 +199 0x4848 //RX_FDEQ_GAIN_3 +200 0x4848 //RX_FDEQ_GAIN_4 +201 0x4848 //RX_FDEQ_GAIN_5 +202 0x4848 //RX_FDEQ_GAIN_6 +203 0x4848 //RX_FDEQ_GAIN_7 +204 0x4848 //RX_FDEQ_GAIN_8 +205 0x4848 //RX_FDEQ_GAIN_9 +206 0x4848 //RX_FDEQ_GAIN_10 +207 0x4848 //RX_FDEQ_GAIN_11 +208 0x4848 //RX_FDEQ_GAIN_12 +209 0x4848 //RX_FDEQ_GAIN_13 +210 0x4848 //RX_FDEQ_GAIN_14 +211 0x4848 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0000 //RX_FDEQ_BIN_0 +221 0x0000 //RX_FDEQ_BIN_1 +222 0x0000 //RX_FDEQ_BIN_2 +223 0x0000 //RX_FDEQ_BIN_3 +224 0x0000 //RX_FDEQ_BIN_4 +225 0x0000 //RX_FDEQ_BIN_5 +226 0x0000 //RX_FDEQ_BIN_6 +227 0x0000 //RX_FDEQ_BIN_7 +228 0x0000 //RX_FDEQ_BIN_8 +229 0x0000 //RX_FDEQ_BIN_9 +230 0x0000 //RX_FDEQ_BIN_10 +231 0x0000 //RX_FDEQ_BIN_11 +232 0x0000 //RX_FDEQ_BIN_12 +233 0x0000 //RX_FDEQ_BIN_13 +234 0x0000 //RX_FDEQ_BIN_14 +235 0x0000 //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x0000 //RX_FDEQ_RESRV_0 +245 0x0000 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0030 //RX_FDDRC_BAND_MARGIN_1 +248 0x0050 //RX_FDDRC_BAND_MARGIN_2 +249 0x0080 //RX_FDDRC_BAND_MARGIN_3 +250 0x0004 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x5000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x6400 //RX_FDDRC_THRD_3_2 +258 0x6400 //RX_FDDRC_THRD_3_3 +259 0x2000 //RX_FDDRC_SLANT_0_0 +260 0x2000 //RX_FDDRC_SLANT_0_1 +261 0x2000 //RX_FDDRC_SLANT_0_2 +262 0x2000 //RX_FDDRC_SLANT_0_3 +263 0x2000 //RX_FDDRC_SLANT_1_0 +264 0x2000 //RX_FDDRC_SLANT_1_1 +265 0x2000 //RX_FDDRC_SLANT_1_2 +266 0x2000 //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +268 0x0003 //RX_FILTINDX +269 0x0000 //RX_TDDRC_THRD_0 +270 0x0000 //RX_TDDRC_THRD_1 +271 0x0E80 //RX_TDDRC_THRD_2 +272 0x3800 //RX_TDDRC_THRD_3 +273 0x2A00 //RX_TDDRC_SLANT_0 +274 0x6E00 //RX_TDDRC_SLANT_1 +275 0x3000 //RX_TDDRC_ALPHA_UP_0 +276 0x7FB0 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x0000 //RX_TDDRC_HMNC_GAIN +279 0x0000 //RX_TDDRC_SMT_FLAG +280 0x0000 //RX_TDDRC_SMT_W +281 0x0100 //RX_TDDRC_DRC_GAIN +282 0x7C00 //RX_LAMBDA_PKA_FP +283 0x2000 //RX_TPKA_FP +284 0x0080 //RX_MIN_G_FP +285 0x2000 //RX_MAX_G_FP +286 0x0100 //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 +288 0x0010 //RX_MAXLEVEL_CNG +289 0x0000 //RX_BWE_UV_TH +290 0x0000 //RX_BWE_UV_TH2 +291 0x0000 //RX_BWE_UV_TH3 +292 0x0000 //RX_BWE_V_TH +293 0x0000 //RX_BWE_GAIN1_V_TH1 +294 0x0000 //RX_BWE_GAIN1_V_TH2 +295 0x0000 //RX_BWE_UV_EQ +296 0x0000 //RX_BWE_V_EQ +297 0x0000 //RX_BWE_TONE_TH +298 0x0000 //RX_BWE_UV_HOLD_T +299 0x0000 //RX_BWE_GAIN2_ALPHA +300 0x0000 //RX_BWE_GAIN3_ALPHA +301 0x0000 //RX_BWE_CUTOFF +302 0x0000 //RX_BWE_GAINFILL +303 0x0000 //RX_BWE_MAXTH_TONE +304 0x0000 //RX_BWE_EQ_0 +305 0x0000 //RX_BWE_EQ_1 +306 0x0000 //RX_BWE_EQ_2 +307 0x0000 //RX_BWE_EQ_3 +308 0x0000 //RX_BWE_EQ_4 +309 0x0000 //RX_BWE_EQ_5 +310 0x0000 //RX_BWE_EQ_6 +311 0x0000 //RX_BWE_RESRV_0 +312 0x0000 //RX_BWE_RESRV_1 +313 0x0000 //RX_BWE_RESRV_2 +#VOL 0 +163 0x3000 //RX_TDDRC_ALPHA_UP_1 +164 0x3000 //RX_TDDRC_ALPHA_UP_2 +165 0x3000 //RX_TDDRC_ALPHA_UP_3 +166 0x3000 //RX_TDDRC_ALPHA_UP_4 +184 0x7FB0 //RX_TDDRC_ALPHA_DWN_1 +185 0x7FB0 //RX_TDDRC_ALPHA_DWN_2 +186 0x7FB0 //RX_TDDRC_ALPHA_DWN_3 +189 0x7FB0 //RX_TDDRC_ALPHA_DWN_4 +190 0xDA9E //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +269 0x0000 //RX_TDDRC_THRD_0 +270 0x0000 //RX_TDDRC_THRD_1 +271 0x0E80 //RX_TDDRC_THRD_2 +272 0x3800 //RX_TDDRC_THRD_3 +273 0x2A00 //RX_TDDRC_SLANT_0 +274 0x6E00 //RX_TDDRC_SLANT_1 +275 0x3000 //RX_TDDRC_ALPHA_UP_0 +276 0x7FB0 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x0000 //RX_TDDRC_HMNC_GAIN +279 0x0000 //RX_TDDRC_SMT_FLAG +280 0x0000 //RX_TDDRC_SMT_W +281 0x0100 //RX_TDDRC_DRC_GAIN +195 0x0020 //RX_FDEQ_SUBNUM +196 0x4848 //RX_FDEQ_GAIN_0 +197 0x4848 //RX_FDEQ_GAIN_1 +198 0x4848 //RX_FDEQ_GAIN_2 +199 0x4848 //RX_FDEQ_GAIN_3 +200 0x4848 //RX_FDEQ_GAIN_4 +201 0x4848 //RX_FDEQ_GAIN_5 +202 0x4848 //RX_FDEQ_GAIN_6 +203 0x4848 //RX_FDEQ_GAIN_7 +204 0x4848 //RX_FDEQ_GAIN_8 +205 0x4848 //RX_FDEQ_GAIN_9 +206 0x4848 //RX_FDEQ_GAIN_10 +207 0x4848 //RX_FDEQ_GAIN_11 +208 0x4848 //RX_FDEQ_GAIN_12 +209 0x4848 //RX_FDEQ_GAIN_13 +210 0x4848 //RX_FDEQ_GAIN_14 +211 0x4848 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0000 //RX_FDEQ_BIN_0 +221 0x0000 //RX_FDEQ_BIN_1 +222 0x0000 //RX_FDEQ_BIN_2 +223 0x0000 //RX_FDEQ_BIN_3 +224 0x0000 //RX_FDEQ_BIN_4 +225 0x0000 //RX_FDEQ_BIN_5 +226 0x0000 //RX_FDEQ_BIN_6 +227 0x0000 //RX_FDEQ_BIN_7 +228 0x0000 //RX_FDEQ_BIN_8 +229 0x0000 //RX_FDEQ_BIN_9 +230 0x0000 //RX_FDEQ_BIN_10 +231 0x0000 //RX_FDEQ_BIN_11 +232 0x0000 //RX_FDEQ_BIN_12 +233 0x0000 //RX_FDEQ_BIN_13 +234 0x0000 //RX_FDEQ_BIN_14 +235 0x0000 //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x0000 //RX_FDEQ_RESRV_0 +245 0x0000 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0030 //RX_FDDRC_BAND_MARGIN_1 +248 0x0050 //RX_FDDRC_BAND_MARGIN_2 +249 0x0080 //RX_FDDRC_BAND_MARGIN_3 +250 0x0004 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x5000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x6400 //RX_FDDRC_THRD_3_2 +258 0x6400 //RX_FDDRC_THRD_3_3 +259 0x2000 //RX_FDDRC_SLANT_0_0 +260 0x2000 //RX_FDDRC_SLANT_0_1 +261 0x2000 //RX_FDDRC_SLANT_0_2 +262 0x2000 //RX_FDDRC_SLANT_0_3 +263 0x2000 //RX_FDDRC_SLANT_1_0 +264 0x2000 //RX_FDDRC_SLANT_1_1 +265 0x2000 //RX_FDDRC_SLANT_1_2 +266 0x2000 //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +286 0x0100 //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 +#VOL 1 +163 0x3000 //RX_TDDRC_ALPHA_UP_1 +164 0x3000 //RX_TDDRC_ALPHA_UP_2 +165 0x3000 //RX_TDDRC_ALPHA_UP_3 +166 0x3000 //RX_TDDRC_ALPHA_UP_4 +184 0x7FB0 //RX_TDDRC_ALPHA_DWN_1 +185 0x7FB0 //RX_TDDRC_ALPHA_DWN_2 +186 0x7FB0 //RX_TDDRC_ALPHA_DWN_3 +189 0x7FB0 //RX_TDDRC_ALPHA_DWN_4 +190 0xDA9E //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +269 0x0000 //RX_TDDRC_THRD_0 +270 0x0000 //RX_TDDRC_THRD_1 +271 0x0E80 //RX_TDDRC_THRD_2 +272 0x3800 //RX_TDDRC_THRD_3 +273 0x2A00 //RX_TDDRC_SLANT_0 +274 0x6E00 //RX_TDDRC_SLANT_1 +275 0x3000 //RX_TDDRC_ALPHA_UP_0 +276 0x7FB0 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x0000 //RX_TDDRC_HMNC_GAIN +279 0x0000 //RX_TDDRC_SMT_FLAG +280 0x0000 //RX_TDDRC_SMT_W +281 0x0100 //RX_TDDRC_DRC_GAIN +195 0x0020 //RX_FDEQ_SUBNUM +196 0x4848 //RX_FDEQ_GAIN_0 +197 0x4848 //RX_FDEQ_GAIN_1 +198 0x4848 //RX_FDEQ_GAIN_2 +199 0x4848 //RX_FDEQ_GAIN_3 +200 0x4848 //RX_FDEQ_GAIN_4 +201 0x4848 //RX_FDEQ_GAIN_5 +202 0x4848 //RX_FDEQ_GAIN_6 +203 0x4848 //RX_FDEQ_GAIN_7 +204 0x4848 //RX_FDEQ_GAIN_8 +205 0x4848 //RX_FDEQ_GAIN_9 +206 0x4848 //RX_FDEQ_GAIN_10 +207 0x4848 //RX_FDEQ_GAIN_11 +208 0x4848 //RX_FDEQ_GAIN_12 +209 0x4848 //RX_FDEQ_GAIN_13 +210 0x4848 //RX_FDEQ_GAIN_14 +211 0x4848 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0000 //RX_FDEQ_BIN_0 +221 0x0000 //RX_FDEQ_BIN_1 +222 0x0000 //RX_FDEQ_BIN_2 +223 0x0000 //RX_FDEQ_BIN_3 +224 0x0000 //RX_FDEQ_BIN_4 +225 0x0000 //RX_FDEQ_BIN_5 +226 0x0000 //RX_FDEQ_BIN_6 +227 0x0000 //RX_FDEQ_BIN_7 +228 0x0000 //RX_FDEQ_BIN_8 +229 0x0000 //RX_FDEQ_BIN_9 +230 0x0000 //RX_FDEQ_BIN_10 +231 0x0000 //RX_FDEQ_BIN_11 +232 0x0000 //RX_FDEQ_BIN_12 +233 0x0000 //RX_FDEQ_BIN_13 +234 0x0000 //RX_FDEQ_BIN_14 +235 0x0000 //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x0000 //RX_FDEQ_RESRV_0 +245 0x0000 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0030 //RX_FDDRC_BAND_MARGIN_1 +248 0x0050 //RX_FDDRC_BAND_MARGIN_2 +249 0x0080 //RX_FDDRC_BAND_MARGIN_3 +250 0x0004 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x5000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x6400 //RX_FDDRC_THRD_3_2 +258 0x6400 //RX_FDDRC_THRD_3_3 +259 0x2000 //RX_FDDRC_SLANT_0_0 +260 0x2000 //RX_FDDRC_SLANT_0_1 +261 0x2000 //RX_FDDRC_SLANT_0_2 +262 0x2000 //RX_FDDRC_SLANT_0_3 +263 0x2000 //RX_FDDRC_SLANT_1_0 +264 0x2000 //RX_FDDRC_SLANT_1_1 +265 0x2000 //RX_FDDRC_SLANT_1_2 +266 0x2000 //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +286 0x0100 //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 +#VOL 2 +163 0x3000 //RX_TDDRC_ALPHA_UP_1 +164 0x3000 //RX_TDDRC_ALPHA_UP_2 +165 0x3000 //RX_TDDRC_ALPHA_UP_3 +166 0x3000 //RX_TDDRC_ALPHA_UP_4 +184 0x7FB0 //RX_TDDRC_ALPHA_DWN_1 +185 0x7FB0 //RX_TDDRC_ALPHA_DWN_2 +186 0x7FB0 //RX_TDDRC_ALPHA_DWN_3 +189 0x7FB0 //RX_TDDRC_ALPHA_DWN_4 +190 0xDA9E //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +269 0x0000 //RX_TDDRC_THRD_0 +270 0x0000 //RX_TDDRC_THRD_1 +271 0x0E80 //RX_TDDRC_THRD_2 +272 0x3800 //RX_TDDRC_THRD_3 +273 0x2A00 //RX_TDDRC_SLANT_0 +274 0x6E00 //RX_TDDRC_SLANT_1 +275 0x3000 //RX_TDDRC_ALPHA_UP_0 +276 0x7FB0 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x0000 //RX_TDDRC_HMNC_GAIN +279 0x0000 //RX_TDDRC_SMT_FLAG +280 0x0000 //RX_TDDRC_SMT_W +281 0x0100 //RX_TDDRC_DRC_GAIN +195 0x0020 //RX_FDEQ_SUBNUM +196 0x4848 //RX_FDEQ_GAIN_0 +197 0x4848 //RX_FDEQ_GAIN_1 +198 0x4848 //RX_FDEQ_GAIN_2 +199 0x4848 //RX_FDEQ_GAIN_3 +200 0x4848 //RX_FDEQ_GAIN_4 +201 0x4848 //RX_FDEQ_GAIN_5 +202 0x4848 //RX_FDEQ_GAIN_6 +203 0x4848 //RX_FDEQ_GAIN_7 +204 0x4848 //RX_FDEQ_GAIN_8 +205 0x4848 //RX_FDEQ_GAIN_9 +206 0x4848 //RX_FDEQ_GAIN_10 +207 0x4848 //RX_FDEQ_GAIN_11 +208 0x4848 //RX_FDEQ_GAIN_12 +209 0x4848 //RX_FDEQ_GAIN_13 +210 0x4848 //RX_FDEQ_GAIN_14 +211 0x4848 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0000 //RX_FDEQ_BIN_0 +221 0x0000 //RX_FDEQ_BIN_1 +222 0x0000 //RX_FDEQ_BIN_2 +223 0x0000 //RX_FDEQ_BIN_3 +224 0x0000 //RX_FDEQ_BIN_4 +225 0x0000 //RX_FDEQ_BIN_5 +226 0x0000 //RX_FDEQ_BIN_6 +227 0x0000 //RX_FDEQ_BIN_7 +228 0x0000 //RX_FDEQ_BIN_8 +229 0x0000 //RX_FDEQ_BIN_9 +230 0x0000 //RX_FDEQ_BIN_10 +231 0x0000 //RX_FDEQ_BIN_11 +232 0x0000 //RX_FDEQ_BIN_12 +233 0x0000 //RX_FDEQ_BIN_13 +234 0x0000 //RX_FDEQ_BIN_14 +235 0x0000 //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x0000 //RX_FDEQ_RESRV_0 +245 0x0000 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0030 //RX_FDDRC_BAND_MARGIN_1 +248 0x0050 //RX_FDDRC_BAND_MARGIN_2 +249 0x0080 //RX_FDDRC_BAND_MARGIN_3 +250 0x0004 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x5000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x6400 //RX_FDDRC_THRD_3_2 +258 0x6400 //RX_FDDRC_THRD_3_3 +259 0x2000 //RX_FDDRC_SLANT_0_0 +260 0x2000 //RX_FDDRC_SLANT_0_1 +261 0x2000 //RX_FDDRC_SLANT_0_2 +262 0x2000 //RX_FDDRC_SLANT_0_3 +263 0x2000 //RX_FDDRC_SLANT_1_0 +264 0x2000 //RX_FDDRC_SLANT_1_1 +265 0x2000 //RX_FDDRC_SLANT_1_2 +266 0x2000 //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +286 0x0100 //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 +#VOL 3 +163 0x3000 //RX_TDDRC_ALPHA_UP_1 +164 0x3000 //RX_TDDRC_ALPHA_UP_2 +165 0x3000 //RX_TDDRC_ALPHA_UP_3 +166 0x3000 //RX_TDDRC_ALPHA_UP_4 +184 0x7FB0 //RX_TDDRC_ALPHA_DWN_1 +185 0x7FB0 //RX_TDDRC_ALPHA_DWN_2 +186 0x7FB0 //RX_TDDRC_ALPHA_DWN_3 +189 0x7FB0 //RX_TDDRC_ALPHA_DWN_4 +190 0xDA9E //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +269 0x0000 //RX_TDDRC_THRD_0 +270 0x0000 //RX_TDDRC_THRD_1 +271 0x0E80 //RX_TDDRC_THRD_2 +272 0x3800 //RX_TDDRC_THRD_3 +273 0x2A00 //RX_TDDRC_SLANT_0 +274 0x6E00 //RX_TDDRC_SLANT_1 +275 0x3000 //RX_TDDRC_ALPHA_UP_0 +276 0x7FB0 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x0000 //RX_TDDRC_HMNC_GAIN +279 0x0000 //RX_TDDRC_SMT_FLAG +280 0x0000 //RX_TDDRC_SMT_W +281 0x0100 //RX_TDDRC_DRC_GAIN +195 0x0020 //RX_FDEQ_SUBNUM +196 0x4848 //RX_FDEQ_GAIN_0 +197 0x4848 //RX_FDEQ_GAIN_1 +198 0x4848 //RX_FDEQ_GAIN_2 +199 0x4848 //RX_FDEQ_GAIN_3 +200 0x4848 //RX_FDEQ_GAIN_4 +201 0x4848 //RX_FDEQ_GAIN_5 +202 0x4848 //RX_FDEQ_GAIN_6 +203 0x4848 //RX_FDEQ_GAIN_7 +204 0x4848 //RX_FDEQ_GAIN_8 +205 0x4848 //RX_FDEQ_GAIN_9 +206 0x4848 //RX_FDEQ_GAIN_10 +207 0x4848 //RX_FDEQ_GAIN_11 +208 0x4848 //RX_FDEQ_GAIN_12 +209 0x4848 //RX_FDEQ_GAIN_13 +210 0x4848 //RX_FDEQ_GAIN_14 +211 0x4848 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0000 //RX_FDEQ_BIN_0 +221 0x0000 //RX_FDEQ_BIN_1 +222 0x0000 //RX_FDEQ_BIN_2 +223 0x0000 //RX_FDEQ_BIN_3 +224 0x0000 //RX_FDEQ_BIN_4 +225 0x0000 //RX_FDEQ_BIN_5 +226 0x0000 //RX_FDEQ_BIN_6 +227 0x0000 //RX_FDEQ_BIN_7 +228 0x0000 //RX_FDEQ_BIN_8 +229 0x0000 //RX_FDEQ_BIN_9 +230 0x0000 //RX_FDEQ_BIN_10 +231 0x0000 //RX_FDEQ_BIN_11 +232 0x0000 //RX_FDEQ_BIN_12 +233 0x0000 //RX_FDEQ_BIN_13 +234 0x0000 //RX_FDEQ_BIN_14 +235 0x0000 //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x0000 //RX_FDEQ_RESRV_0 +245 0x0000 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0030 //RX_FDDRC_BAND_MARGIN_1 +248 0x0050 //RX_FDDRC_BAND_MARGIN_2 +249 0x0080 //RX_FDDRC_BAND_MARGIN_3 +250 0x0004 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x5000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x6400 //RX_FDDRC_THRD_3_2 +258 0x6400 //RX_FDDRC_THRD_3_3 +259 0x2000 //RX_FDDRC_SLANT_0_0 +260 0x2000 //RX_FDDRC_SLANT_0_1 +261 0x2000 //RX_FDDRC_SLANT_0_2 +262 0x2000 //RX_FDDRC_SLANT_0_3 +263 0x2000 //RX_FDDRC_SLANT_1_0 +264 0x2000 //RX_FDDRC_SLANT_1_1 +265 0x2000 //RX_FDDRC_SLANT_1_2 +266 0x2000 //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +286 0x0100 //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 +#VOL 4 +163 0x3000 //RX_TDDRC_ALPHA_UP_1 +164 0x3000 //RX_TDDRC_ALPHA_UP_2 +165 0x3000 //RX_TDDRC_ALPHA_UP_3 +166 0x3000 //RX_TDDRC_ALPHA_UP_4 +184 0x7FB0 //RX_TDDRC_ALPHA_DWN_1 +185 0x7FB0 //RX_TDDRC_ALPHA_DWN_2 +186 0x7FB0 //RX_TDDRC_ALPHA_DWN_3 +189 0x7FB0 //RX_TDDRC_ALPHA_DWN_4 +190 0xDA9E //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +269 0x0000 //RX_TDDRC_THRD_0 +270 0x0000 //RX_TDDRC_THRD_1 +271 0x0E80 //RX_TDDRC_THRD_2 +272 0x3800 //RX_TDDRC_THRD_3 +273 0x2A00 //RX_TDDRC_SLANT_0 +274 0x6E00 //RX_TDDRC_SLANT_1 +275 0x3000 //RX_TDDRC_ALPHA_UP_0 +276 0x7FB0 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x0000 //RX_TDDRC_HMNC_GAIN +279 0x0000 //RX_TDDRC_SMT_FLAG +280 0x0000 //RX_TDDRC_SMT_W +281 0x0100 //RX_TDDRC_DRC_GAIN +195 0x0020 //RX_FDEQ_SUBNUM +196 0x4848 //RX_FDEQ_GAIN_0 +197 0x4848 //RX_FDEQ_GAIN_1 +198 0x4848 //RX_FDEQ_GAIN_2 +199 0x4848 //RX_FDEQ_GAIN_3 +200 0x4848 //RX_FDEQ_GAIN_4 +201 0x4848 //RX_FDEQ_GAIN_5 +202 0x4848 //RX_FDEQ_GAIN_6 +203 0x4848 //RX_FDEQ_GAIN_7 +204 0x4848 //RX_FDEQ_GAIN_8 +205 0x4848 //RX_FDEQ_GAIN_9 +206 0x4848 //RX_FDEQ_GAIN_10 +207 0x4848 //RX_FDEQ_GAIN_11 +208 0x4848 //RX_FDEQ_GAIN_12 +209 0x4848 //RX_FDEQ_GAIN_13 +210 0x4848 //RX_FDEQ_GAIN_14 +211 0x4848 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0000 //RX_FDEQ_BIN_0 +221 0x0000 //RX_FDEQ_BIN_1 +222 0x0000 //RX_FDEQ_BIN_2 +223 0x0000 //RX_FDEQ_BIN_3 +224 0x0000 //RX_FDEQ_BIN_4 +225 0x0000 //RX_FDEQ_BIN_5 +226 0x0000 //RX_FDEQ_BIN_6 +227 0x0000 //RX_FDEQ_BIN_7 +228 0x0000 //RX_FDEQ_BIN_8 +229 0x0000 //RX_FDEQ_BIN_9 +230 0x0000 //RX_FDEQ_BIN_10 +231 0x0000 //RX_FDEQ_BIN_11 +232 0x0000 //RX_FDEQ_BIN_12 +233 0x0000 //RX_FDEQ_BIN_13 +234 0x0000 //RX_FDEQ_BIN_14 +235 0x0000 //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x0000 //RX_FDEQ_RESRV_0 +245 0x0000 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0030 //RX_FDDRC_BAND_MARGIN_1 +248 0x0050 //RX_FDDRC_BAND_MARGIN_2 +249 0x0080 //RX_FDDRC_BAND_MARGIN_3 +250 0x0004 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x5000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x6400 //RX_FDDRC_THRD_3_2 +258 0x6400 //RX_FDDRC_THRD_3_3 +259 0x2000 //RX_FDDRC_SLANT_0_0 +260 0x2000 //RX_FDDRC_SLANT_0_1 +261 0x2000 //RX_FDDRC_SLANT_0_2 +262 0x2000 //RX_FDDRC_SLANT_0_3 +263 0x2000 //RX_FDDRC_SLANT_1_0 +264 0x2000 //RX_FDDRC_SLANT_1_1 +265 0x2000 //RX_FDDRC_SLANT_1_2 +266 0x2000 //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +286 0x0100 //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 +#VOL 5 +163 0x3000 //RX_TDDRC_ALPHA_UP_1 +164 0x3000 //RX_TDDRC_ALPHA_UP_2 +165 0x3000 //RX_TDDRC_ALPHA_UP_3 +166 0x3000 //RX_TDDRC_ALPHA_UP_4 +184 0x7FB0 //RX_TDDRC_ALPHA_DWN_1 +185 0x7FB0 //RX_TDDRC_ALPHA_DWN_2 +186 0x7FB0 //RX_TDDRC_ALPHA_DWN_3 +189 0x7FB0 //RX_TDDRC_ALPHA_DWN_4 +190 0xDA9E //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +269 0x0000 //RX_TDDRC_THRD_0 +270 0x0000 //RX_TDDRC_THRD_1 +271 0x0E80 //RX_TDDRC_THRD_2 +272 0x3800 //RX_TDDRC_THRD_3 +273 0x2A00 //RX_TDDRC_SLANT_0 +274 0x6E00 //RX_TDDRC_SLANT_1 +275 0x3000 //RX_TDDRC_ALPHA_UP_0 +276 0x7FB0 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x0000 //RX_TDDRC_HMNC_GAIN +279 0x0000 //RX_TDDRC_SMT_FLAG +280 0x0000 //RX_TDDRC_SMT_W +281 0x0100 //RX_TDDRC_DRC_GAIN +195 0x0020 //RX_FDEQ_SUBNUM +196 0x4848 //RX_FDEQ_GAIN_0 +197 0x4848 //RX_FDEQ_GAIN_1 +198 0x4848 //RX_FDEQ_GAIN_2 +199 0x4848 //RX_FDEQ_GAIN_3 +200 0x4848 //RX_FDEQ_GAIN_4 +201 0x4848 //RX_FDEQ_GAIN_5 +202 0x4848 //RX_FDEQ_GAIN_6 +203 0x4848 //RX_FDEQ_GAIN_7 +204 0x4848 //RX_FDEQ_GAIN_8 +205 0x4848 //RX_FDEQ_GAIN_9 +206 0x4848 //RX_FDEQ_GAIN_10 +207 0x4848 //RX_FDEQ_GAIN_11 +208 0x4848 //RX_FDEQ_GAIN_12 +209 0x4848 //RX_FDEQ_GAIN_13 +210 0x4848 //RX_FDEQ_GAIN_14 +211 0x4848 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0000 //RX_FDEQ_BIN_0 +221 0x0000 //RX_FDEQ_BIN_1 +222 0x0000 //RX_FDEQ_BIN_2 +223 0x0000 //RX_FDEQ_BIN_3 +224 0x0000 //RX_FDEQ_BIN_4 +225 0x0000 //RX_FDEQ_BIN_5 +226 0x0000 //RX_FDEQ_BIN_6 +227 0x0000 //RX_FDEQ_BIN_7 +228 0x0000 //RX_FDEQ_BIN_8 +229 0x0000 //RX_FDEQ_BIN_9 +230 0x0000 //RX_FDEQ_BIN_10 +231 0x0000 //RX_FDEQ_BIN_11 +232 0x0000 //RX_FDEQ_BIN_12 +233 0x0000 //RX_FDEQ_BIN_13 +234 0x0000 //RX_FDEQ_BIN_14 +235 0x0000 //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x0000 //RX_FDEQ_RESRV_0 +245 0x0000 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0030 //RX_FDDRC_BAND_MARGIN_1 +248 0x0050 //RX_FDDRC_BAND_MARGIN_2 +249 0x0080 //RX_FDDRC_BAND_MARGIN_3 +250 0x0004 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x5000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x6400 //RX_FDDRC_THRD_3_2 +258 0x6400 //RX_FDDRC_THRD_3_3 +259 0x2000 //RX_FDDRC_SLANT_0_0 +260 0x2000 //RX_FDDRC_SLANT_0_1 +261 0x2000 //RX_FDDRC_SLANT_0_2 +262 0x2000 //RX_FDDRC_SLANT_0_3 +263 0x2000 //RX_FDDRC_SLANT_1_0 +264 0x2000 //RX_FDDRC_SLANT_1_1 +265 0x2000 //RX_FDDRC_SLANT_1_2 +266 0x2000 //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +286 0x0100 //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 +#VOL 6 +163 0x3000 //RX_TDDRC_ALPHA_UP_1 +164 0x3000 //RX_TDDRC_ALPHA_UP_2 +165 0x3000 //RX_TDDRC_ALPHA_UP_3 +166 0x3000 //RX_TDDRC_ALPHA_UP_4 +184 0x7FB0 //RX_TDDRC_ALPHA_DWN_1 +185 0x7FB0 //RX_TDDRC_ALPHA_DWN_2 +186 0x7FB0 //RX_TDDRC_ALPHA_DWN_3 +189 0x7FB0 //RX_TDDRC_ALPHA_DWN_4 +190 0xDA9E //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +269 0x0000 //RX_TDDRC_THRD_0 +270 0x0000 //RX_TDDRC_THRD_1 +271 0x0E80 //RX_TDDRC_THRD_2 +272 0x3800 //RX_TDDRC_THRD_3 +273 0x2A00 //RX_TDDRC_SLANT_0 +274 0x6E00 //RX_TDDRC_SLANT_1 +275 0x3000 //RX_TDDRC_ALPHA_UP_0 +276 0x7FB0 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x0000 //RX_TDDRC_HMNC_GAIN +279 0x0000 //RX_TDDRC_SMT_FLAG +280 0x0000 //RX_TDDRC_SMT_W +281 0x0100 //RX_TDDRC_DRC_GAIN +195 0x0020 //RX_FDEQ_SUBNUM +196 0x4848 //RX_FDEQ_GAIN_0 +197 0x4848 //RX_FDEQ_GAIN_1 +198 0x4848 //RX_FDEQ_GAIN_2 +199 0x4848 //RX_FDEQ_GAIN_3 +200 0x4848 //RX_FDEQ_GAIN_4 +201 0x4848 //RX_FDEQ_GAIN_5 +202 0x4848 //RX_FDEQ_GAIN_6 +203 0x4848 //RX_FDEQ_GAIN_7 +204 0x4848 //RX_FDEQ_GAIN_8 +205 0x4848 //RX_FDEQ_GAIN_9 +206 0x4848 //RX_FDEQ_GAIN_10 +207 0x4848 //RX_FDEQ_GAIN_11 +208 0x4848 //RX_FDEQ_GAIN_12 +209 0x4848 //RX_FDEQ_GAIN_13 +210 0x4848 //RX_FDEQ_GAIN_14 +211 0x4848 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0000 //RX_FDEQ_BIN_0 +221 0x0000 //RX_FDEQ_BIN_1 +222 0x0000 //RX_FDEQ_BIN_2 +223 0x0000 //RX_FDEQ_BIN_3 +224 0x0000 //RX_FDEQ_BIN_4 +225 0x0000 //RX_FDEQ_BIN_5 +226 0x0000 //RX_FDEQ_BIN_6 +227 0x0000 //RX_FDEQ_BIN_7 +228 0x0000 //RX_FDEQ_BIN_8 +229 0x0000 //RX_FDEQ_BIN_9 +230 0x0000 //RX_FDEQ_BIN_10 +231 0x0000 //RX_FDEQ_BIN_11 +232 0x0000 //RX_FDEQ_BIN_12 +233 0x0000 //RX_FDEQ_BIN_13 +234 0x0000 //RX_FDEQ_BIN_14 +235 0x0000 //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x0000 //RX_FDEQ_RESRV_0 +245 0x0000 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0030 //RX_FDDRC_BAND_MARGIN_1 +248 0x0050 //RX_FDDRC_BAND_MARGIN_2 +249 0x0080 //RX_FDDRC_BAND_MARGIN_3 +250 0x0004 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x5000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x6400 //RX_FDDRC_THRD_3_2 +258 0x6400 //RX_FDDRC_THRD_3_3 +259 0x2000 //RX_FDDRC_SLANT_0_0 +260 0x2000 //RX_FDDRC_SLANT_0_1 +261 0x2000 //RX_FDDRC_SLANT_0_2 +262 0x2000 //RX_FDDRC_SLANT_0_3 +263 0x2000 //RX_FDDRC_SLANT_1_0 +264 0x2000 //RX_FDDRC_SLANT_1_1 +265 0x2000 //RX_FDDRC_SLANT_1_2 +266 0x2000 //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +286 0x0100 //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 #CASE_NAME HEADSET-TTY_FULL-VOICE_GENERIC-WB -#PARAM_MODE FULL -#PARAM_TYPE TX+RX -#TOTAL_CUSTOM_STEP 7 +#PARAM_MODE Full +#PARAM_TYPE TX+2RX +#TOTAL_CUSTOM_STEP 7+7 #TX 0 0x0001 //TX_OPERATION_MODE_0 1 0x0000 //TX_OPERATION_MODE_1 @@ -51116,7 +77680,7 @@ 239 0x0000 //TX_DT_RESRV_7 240 0x0000 //TX_DT_RESRV_8 241 0x0000 //TX_DT_RESRV_9 -242 0xF200 //TX_THR_SN_EST_0 +242 0xFA00 //TX_THR_SN_EST_0 243 0xF400 //TX_THR_SN_EST_1 244 0xF800 //TX_THR_SN_EST_2 245 0xF600 //TX_THR_SN_EST_3 @@ -51125,12 +77689,12 @@ 248 0xF800 //TX_THR_SN_EST_6 249 0xF800 //TX_THR_SN_EST_7 250 0x0100 //TX_DELTA_THR_SN_EST_0 -251 0x0000 //TX_DELTA_THR_SN_EST_1 +251 0x0100 //TX_DELTA_THR_SN_EST_1 252 0x0100 //TX_DELTA_THR_SN_EST_2 -253 0x0100 //TX_DELTA_THR_SN_EST_3 +253 0x0200 //TX_DELTA_THR_SN_EST_3 254 0x0200 //TX_DELTA_THR_SN_EST_4 255 0x0200 //TX_DELTA_THR_SN_EST_5 -256 0x0200 //TX_DELTA_THR_SN_EST_6 +256 0x0000 //TX_DELTA_THR_SN_EST_6 257 0x0200 //TX_DELTA_THR_SN_EST_7 258 0x4000 //TX_LAMBDA_NN_EST_0 259 0x4000 //TX_LAMBDA_NN_EST_1 @@ -51156,12 +77720,12 @@ 279 0x0000 //TX_B_POST_FLT_0 280 0x0000 //TX_B_POST_FLT_1 281 0x001A //TX_NS_LVL_CTRL_0 -282 0x001A //TX_NS_LVL_CTRL_1 +282 0x0014 //TX_NS_LVL_CTRL_1 283 0x0014 //TX_NS_LVL_CTRL_2 -284 0x0014 //TX_NS_LVL_CTRL_3 +284 0x000C //TX_NS_LVL_CTRL_3 285 0x000C //TX_NS_LVL_CTRL_4 286 0x000C //TX_NS_LVL_CTRL_5 -287 0x000C //TX_NS_LVL_CTRL_6 +287 0x001A //TX_NS_LVL_CTRL_6 288 0x000C //TX_NS_LVL_CTRL_7 289 0x000E //TX_MIN_GAIN_S_0 290 0x0014 //TX_MIN_GAIN_S_1 @@ -51177,10 +77741,10 @@ 300 0x7FFF //TX_SNRI_SUP_0 301 0x7FFF //TX_SNRI_SUP_1 302 0x7FFF //TX_SNRI_SUP_2 -303 0x7FFF //TX_SNRI_SUP_3 +303 0x4000 //TX_SNRI_SUP_3 304 0x4000 //TX_SNRI_SUP_4 305 0x4000 //TX_SNRI_SUP_5 -306 0x4000 //TX_SNRI_SUP_6 +306 0x7FFF //TX_SNRI_SUP_6 307 0x4000 //TX_SNRI_SUP_7 308 0x1200 //TX_THR_LFNS 309 0x0147 //TX_G_LFNS @@ -51189,12 +77753,12 @@ 312 0x7FFF //TX_A_POST_FILT_0 313 0x7FFF //TX_A_POST_FILT_1 314 0x4000 //TX_A_POST_FILT_S_0 -315 0x199A //TX_A_POST_FILT_S_1 +315 0x1000 //TX_A_POST_FILT_S_1 316 0x1000 //TX_A_POST_FILT_S_2 -317 0x1000 //TX_A_POST_FILT_S_3 +317 0x6666 //TX_A_POST_FILT_S_3 318 0x6666 //TX_A_POST_FILT_S_4 319 0x6666 //TX_A_POST_FILT_S_5 -320 0x6666 //TX_A_POST_FILT_S_6 +320 0x199A //TX_A_POST_FILT_S_6 321 0x6666 //TX_A_POST_FILT_S_7 322 0x2000 //TX_B_POST_FILT_0 323 0x2000 //TX_B_POST_FILT_1 @@ -51241,7 +77805,7 @@ 364 0x0000 //TX_K_APT 365 0x0001 //TX_NOISEDET 366 0x05A0 //TX_NDETCT -367 0x000A //TX_NOISE_TH_0 +367 0x0102 //TX_NOISE_TH_0 368 0x1388 //TX_NOISE_TH_0_2 369 0x3A98 //TX_NOISE_TH_0_3 370 0x0C80 //TX_NOISE_TH_1 @@ -51253,11 +77817,11 @@ 376 0x7FFF //TX_NOISE_TH_5_3 377 0x7FFF //TX_NOISE_TH_5_4 378 0x00C8 //TX_NOISE_TH_6 -379 0x000A //TX_MINENOISE_TH -380 0x0000 //TX_MINENOISE_MIC0_TH_MTS -381 0x0000 //TX_MINENOISE_MIC0_TH_EXP -382 0x0000 //TX_MINENOISE_MIC0_S_TH_MTS -383 0x0000 //TX_MINENOISE_MIC0_S_TH_EXP +379 0x00F8 //TX_MINENOISE_TH +380 0xD508 //TX_MORENS_TFMASK_TH +381 0x0001 //TX_DRC_QUIET_FLOOR +382 0x3A98 //TX_RATIODTL_CUT_TH +383 0x0DAC //TX_DT_CUT_K1 384 0x6400 //TX_OUT_ENER_S_TH_CLEAN 385 0x6400 //TX_OUT_ENER_S_TH_LESSCLEAN 386 0x6400 //TX_OUT_ENER_S_TH_NOISY @@ -51265,22 +77829,22 @@ 388 0x7D00 //TX_OUT_ENER_TH_SPEECH 389 0x0000 //TX_SN_NPB_GAIN 390 0x0000 //TX_NN_NPB_GAIN -391 0x0000 //TX_CSX_ALPHA_0 -392 0x0000 //TX_CSX_ALPHA_1 -393 0x0000 //TX_CSX_ALPHA_2 -394 0x0000 //TX_CSX_ALPHA_3 -395 0x0000 //TX_MU_ARSP_EST -396 0x0000 //TX_P_OUTBEAM_MIN_TH +391 0x7FFF //TX_POST_MASK_SUP_HSNE +392 0x1388 //TX_TAIL_DET_TH +393 0x4000 //TX_B_LESSCUT_RTO_WTA +394 0x0000 //TX_MEL_G_R +395 0x0080 //TX_SUPHIGH_TH +396 0x0000 //TX_MASK_G_R 397 0x0000 //TX_EXTRA_NS_L -398 0x0000 //TX_EXTRA_NS_A -399 0x0000 //TX_VR_NOISE_FLOOR_TH +398 0x1800 //TX_C_POST_FLT_MASK +399 0x7FFF //TX_A_POST_FLT_WNS 400 0x0000 //TX_MIN_G_LOW300HZ 401 0x0010 //TX_MAXLEVEL_CNG 402 0x0000 //TX_STN_NOISE_TH 403 0x0000 //TX_POST_MASK_SUP 404 0x0000 //TX_POST_MASK_ADJUST 405 0x0014 //TX_NS_ENOISE_MIC0_TH -406 0x0014 //TX_MINENOISE_MIC0_TH +406 0x00DC //TX_MINENOISE_MIC0_TH 407 0x0226 //TX_MINENOISE_MIC0_S_TH 408 0x2879 //TX_MIN_G_CTRL_SSNS 409 0x0400 //TX_METAL_RTO_THR @@ -51388,16 +77952,16 @@ 511 0x6666 //TX_MIC_TO_BFGAIN 512 0x6666 //TX_MICTOBFGAIN0 513 0x0014 //TX_FASTMUE_TH -514 0x0000 //TX_DERVB_LEN_0 -515 0x0000 //TX_DERVB_LEN_1 -516 0x0000 //TX_RHO_DERVB -517 0x0000 //TX_MIC_INDX_DERVB -518 0x0000 //TX_MU_DERVB -519 0x0000 //TX_DR_RESRV_0 -520 0x0000 //TX_DR_RESRV_1 -521 0x0000 //TX_DR_RESRV_2 -522 0x0000 //TX_DR_RESRV_3 -523 0x0000 //TX_DR_RESRV_4 +514 0xC000 //TX_DEREVERB_LF_MU +515 0xC000 //TX_DEREVERB_HF_MU +516 0xCCCC //TX_DEREVERB_DELAY +517 0xD999 //TX_DEREVERB_COEF_LEN +518 0x1F40 //TX_DEREVERB_DNR +519 0x0000 //TX_DEREVERB_ALPHA +520 0x0000 //TX_DEREVERB_BETA +521 0x0000 //TX_GSC_RTOL_TH +522 0x7000 //TX_GSC_RTOH_TH +523 0x0064 //TX_WIDE2_MEANHTH 524 0x0000 //TX_DR_RESRV_5 525 0x0000 //TX_DR_RESRV_6 526 0x0000 //TX_DR_RESRV_7 @@ -51763,16 +78327,81 @@ 886 0x0000 //TX_FASTNS_TFMASKBIN_TH2 887 0x0000 //TX_FASTNS_TFMASKBIN_TH3 888 0x00C8 //TX_FASTNS_ARSPC_TH -889 0xD99A //TX_FASTNS_MASK5_TH +889 0xC000 //TX_FASTNS_MASK5_TH 890 0x051F //TX_POSTSSA_MIN_G_VR_MASK -891 0x7FFF //TX_A_LESSCUT_RTO_MASK +891 0x4000 //TX_A_LESSCUT_RTO_MASK 892 0x1770 //TX_FASTNS_NOISETH 893 0xC000 //TX_FASTNS_SSA_THLFL 894 0xC000 //TX_FASTNS_SSA_THHFL 895 0xCCCC //TX_FASTNS_SSA_THLFH 896 0xD999 //TX_FASTNS_SSA_THHFH +897 0x2339 //TX_SENDFUNC_REG_MICMUTE +898 0x0021 //TX_SENDFUNC_REG_MICMUTE1 +899 0x02BC //TX_MICMUTE_RATIO_THR +900 0x0140 //TX_MICMUTE_AMP_THR +901 0x0004 //TX_MICMUTE_HPF_IND +902 0x00C0 //TX_MICMUTE_LOG_EYR_TH +903 0x0008 //TX_MICMUTE_CVG_TIME +904 0x0008 //TX_MICMUTE_RELEASE_TIME +905 0x01FE //TX_MIC_VOLUME_MIC0MUTE +906 0x0020 //TX_MICMUTE_EPD_OFFSET_0 +907 0x001E //TX_MICMUTE_FRQ_AEC_L +908 0x7999 //TX_MICMUTE_EAD_THR +909 0x7FFF //TX_MICMUTE_LAMBDA_CB_NLE +910 0x7FFF //TX_MICMUTE_LAMBDA_RE_EST +911 0x4000 //TX_DTD_THR1_MICMUTE_0 +912 0x7000 //TX_DTD_THR1_MICMUTE_1 +913 0x7FFF //TX_DTD_THR1_MICMUTE_2 +914 0x7FFF //TX_DTD_THR1_MICMUTE_3 +915 0x6CCC //TX_DTD_THR2_MICMUTE_0 +916 0x0400 //TX_MICMUTE_MIN_EQ_RE_EST_0 +917 0x0400 //TX_MICMUTE_MIN_EQ_RE_EST_1 +918 0x1000 //TX_MICMUTE_MIN_EQ_RE_EST_2 +919 0x7FFF //TX_MICMUTE_MIN_EQ_RE_EST_3 +920 0x7FFF //TX_MICMUTE_MIN_EQ_RE_EST_4 +921 0x4000 //TX_MICMUTE_C_POST_FLT +922 0x03E8 //TX_MICMUTE_DT_CUT_K +923 0x0001 //TX_MICMUTE_DT_CUT_THR +924 0x03E8 //TX_MICMUTE_DT_CUT_K2 +925 0x0001 //TX_MICMUTE_DT_CUT_THR2 +926 0x0064 //TX_MICMUTE_DT2_HOLD_N +927 0x1000 //TX_MICMUTE_RATIODTH_THCUT +928 0x1000 //TX_MICMUTE_B_POST_FLT_ECHOL +929 0x7FFF //TX_MICMUTE_B_POST_FLT_ECHOH +930 0x0400 //TX_MICMUTE_C_POST_FLT_MASK +931 0x7999 //TX_MICMUTE_RATIODTL_CUT_TH +932 0x0258 //TX_MICMUTE_DT_CUT_K1 +933 0x0800 //TX_MICMUTE_N2_SN_EST +934 0xFC00 //TX_MICMUTE_THR_SN_EST_0 +935 0x001C //TX_MICMUTE_MIN_G_CTRL_0 +936 0x6000 //TX_MICMUTE_A_POST_FILT_S_0 +937 0x7000 //TX_MICMUTE_B_POST_FILT_0 +938 0x2710 //TX_MIC1RUB_AMP_THR +939 0x0010 //TX_MIC1MUTE_RATIO_THR +940 0x0450 //TX_MIC1MUTE_AMP_THR +941 0x0008 //TX_MIC1MUTE_CVG_TIME +942 0x0008 //TX_MIC1MUTE_RELEASE_TIME +943 0x0000 //TX_AMS_RESRV_01 +944 0x0000 //TX_AMS_RESRV_02 +945 0x0000 //TX_AMS_RESRV_03 +946 0x0000 //TX_AMS_RESRV_04 +947 0x0000 //TX_AMS_RESRV_05 +948 0x0000 //TX_AMS_RESRV_06 +949 0x0000 //TX_AMS_RESRV_07 +950 0x0000 //TX_AMS_RESRV_08 +951 0x0000 //TX_AMS_RESRV_09 +952 0x0000 //TX_AMS_RESRV_10 +953 0x0000 //TX_AMS_RESRV_11 +954 0x0000 //TX_AMS_RESRV_12 +955 0x0000 //TX_AMS_RESRV_13 +956 0x0000 //TX_AMS_RESRV_14 +957 0x0000 //TX_AMS_RESRV_15 +958 0x0000 //TX_AMS_RESRV_16 +959 0x0000 //TX_AMS_RESRV_17 +960 0x0000 //TX_AMS_RESRV_18 +961 0x0000 //TX_AMS_RESRV_19 #RX -0 0x0040 //RX_RECVFUNC_MODE_0 +0 0x2040 //RX_RECVFUNC_MODE_0 1 0x0000 //RX_RECVFUNC_MODE_1 2 0x0000 //RX_SAMPLINGFREQ_SIG 3 0x0000 //RX_SAMPLINGFREQ_PROC @@ -52622,11 +79251,862 @@ 110 0x0000 //RX_FDDRC_RESRV_0 129 0x0100 //RX_SPK_VOL 130 0x0000 //RX_VOL_RESRV_0 +#RX 2 +157 0x2040 //RX_RECVFUNC_MODE_0 +158 0x0000 //RX_RECVFUNC_MODE_1 +159 0x0000 //RX_SAMPLINGFREQ_SIG +160 0x0000 //RX_SAMPLINGFREQ_PROC +161 0x000A //RX_FRAME_SZ +162 0x0000 //RX_DELAY_OPT +163 0x3000 //RX_TDDRC_ALPHA_UP_1 +164 0x3000 //RX_TDDRC_ALPHA_UP_2 +165 0x3000 //RX_TDDRC_ALPHA_UP_3 +166 0x3000 //RX_TDDRC_ALPHA_UP_4 +167 0x050D //RX_PGA +168 0x7652 //RX_A_HP +169 0x4000 //RX_B_PE +170 0x7800 //RX_THR_PITCH_DET_0 +171 0x7000 //RX_THR_PITCH_DET_1 +172 0x6000 //RX_THR_PITCH_DET_2 +173 0x0000 //RX_PITCH_BFR_LEN +174 0x0000 //RX_SBD_PITCH_DET +175 0x0000 //RX_PP_RESRV_0 +176 0x0000 //RX_PP_RESRV_1 +177 0xF800 //RX_N_SN_EST +178 0x0000 //RX_N2_SN_EST +179 0x000F //RX_NS_LVL_CTRL +180 0xF800 //RX_THR_SN_EST +181 0x7E00 //RX_LAMBDA_PFILT +182 0x000A //RX_FENS_RESRV_0 +183 0x0000 //RX_FENS_RESRV_1 +184 0x7FB0 //RX_TDDRC_ALPHA_DWN_1 +185 0x7FB0 //RX_TDDRC_ALPHA_DWN_2 +186 0x7FB0 //RX_TDDRC_ALPHA_DWN_3 +187 0x0000 //RX_EXTRA_NS_L +188 0x0000 //RX_EXTRA_NS_A +189 0x7FB0 //RX_TDDRC_ALPHA_DWN_4 +190 0xDA9E //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +192 0x0000 //RX_A_POST_FLT +193 0x0000 //RX_LMT_THRD +194 0x4000 //RX_LMT_ALPHA +195 0x0020 //RX_FDEQ_SUBNUM +196 0x4848 //RX_FDEQ_GAIN_0 +197 0x4848 //RX_FDEQ_GAIN_1 +198 0x4848 //RX_FDEQ_GAIN_2 +199 0x4848 //RX_FDEQ_GAIN_3 +200 0x4848 //RX_FDEQ_GAIN_4 +201 0x4848 //RX_FDEQ_GAIN_5 +202 0x4848 //RX_FDEQ_GAIN_6 +203 0x4848 //RX_FDEQ_GAIN_7 +204 0x4848 //RX_FDEQ_GAIN_8 +205 0x4848 //RX_FDEQ_GAIN_9 +206 0x4848 //RX_FDEQ_GAIN_10 +207 0x4848 //RX_FDEQ_GAIN_11 +208 0x4848 //RX_FDEQ_GAIN_12 +209 0x4848 //RX_FDEQ_GAIN_13 +210 0x4848 //RX_FDEQ_GAIN_14 +211 0x4848 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0000 //RX_FDEQ_BIN_0 +221 0x0000 //RX_FDEQ_BIN_1 +222 0x0000 //RX_FDEQ_BIN_2 +223 0x0000 //RX_FDEQ_BIN_3 +224 0x0000 //RX_FDEQ_BIN_4 +225 0x0000 //RX_FDEQ_BIN_5 +226 0x0000 //RX_FDEQ_BIN_6 +227 0x0000 //RX_FDEQ_BIN_7 +228 0x0000 //RX_FDEQ_BIN_8 +229 0x0000 //RX_FDEQ_BIN_9 +230 0x0000 //RX_FDEQ_BIN_10 +231 0x0000 //RX_FDEQ_BIN_11 +232 0x0000 //RX_FDEQ_BIN_12 +233 0x0000 //RX_FDEQ_BIN_13 +234 0x0000 //RX_FDEQ_BIN_14 +235 0x0000 //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x0000 //RX_FDEQ_RESRV_0 +245 0x0000 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0030 //RX_FDDRC_BAND_MARGIN_1 +248 0x0050 //RX_FDDRC_BAND_MARGIN_2 +249 0x0080 //RX_FDDRC_BAND_MARGIN_3 +250 0x0004 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x5000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x6400 //RX_FDDRC_THRD_3_2 +258 0x6400 //RX_FDDRC_THRD_3_3 +259 0x2000 //RX_FDDRC_SLANT_0_0 +260 0x2000 //RX_FDDRC_SLANT_0_1 +261 0x2000 //RX_FDDRC_SLANT_0_2 +262 0x2000 //RX_FDDRC_SLANT_0_3 +263 0x2000 //RX_FDDRC_SLANT_1_0 +264 0x2000 //RX_FDDRC_SLANT_1_1 +265 0x2000 //RX_FDDRC_SLANT_1_2 +266 0x2000 //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +268 0x0003 //RX_FILTINDX +269 0x0000 //RX_TDDRC_THRD_0 +270 0x0000 //RX_TDDRC_THRD_1 +271 0x0E80 //RX_TDDRC_THRD_2 +272 0x3800 //RX_TDDRC_THRD_3 +273 0x2A00 //RX_TDDRC_SLANT_0 +274 0x6E00 //RX_TDDRC_SLANT_1 +275 0x3000 //RX_TDDRC_ALPHA_UP_0 +276 0x7FB0 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x0000 //RX_TDDRC_HMNC_GAIN +279 0x0000 //RX_TDDRC_SMT_FLAG +280 0x0000 //RX_TDDRC_SMT_W +281 0x0100 //RX_TDDRC_DRC_GAIN +282 0x7C00 //RX_LAMBDA_PKA_FP +283 0x2000 //RX_TPKA_FP +284 0x0080 //RX_MIN_G_FP +285 0x2000 //RX_MAX_G_FP +286 0x0100 //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 +288 0x0010 //RX_MAXLEVEL_CNG +289 0x0000 //RX_BWE_UV_TH +290 0x0000 //RX_BWE_UV_TH2 +291 0x0000 //RX_BWE_UV_TH3 +292 0x0000 //RX_BWE_V_TH +293 0x0000 //RX_BWE_GAIN1_V_TH1 +294 0x0000 //RX_BWE_GAIN1_V_TH2 +295 0x0000 //RX_BWE_UV_EQ +296 0x0000 //RX_BWE_V_EQ +297 0x0000 //RX_BWE_TONE_TH +298 0x0000 //RX_BWE_UV_HOLD_T +299 0x0000 //RX_BWE_GAIN2_ALPHA +300 0x0000 //RX_BWE_GAIN3_ALPHA +301 0x0000 //RX_BWE_CUTOFF +302 0x0000 //RX_BWE_GAINFILL +303 0x0000 //RX_BWE_MAXTH_TONE +304 0x0000 //RX_BWE_EQ_0 +305 0x0000 //RX_BWE_EQ_1 +306 0x0000 //RX_BWE_EQ_2 +307 0x0000 //RX_BWE_EQ_3 +308 0x0000 //RX_BWE_EQ_4 +309 0x0000 //RX_BWE_EQ_5 +310 0x0000 //RX_BWE_EQ_6 +311 0x0000 //RX_BWE_RESRV_0 +312 0x0000 //RX_BWE_RESRV_1 +313 0x0000 //RX_BWE_RESRV_2 +#VOL 0 +163 0x3000 //RX_TDDRC_ALPHA_UP_1 +164 0x3000 //RX_TDDRC_ALPHA_UP_2 +165 0x3000 //RX_TDDRC_ALPHA_UP_3 +166 0x3000 //RX_TDDRC_ALPHA_UP_4 +184 0x7FB0 //RX_TDDRC_ALPHA_DWN_1 +185 0x7FB0 //RX_TDDRC_ALPHA_DWN_2 +186 0x7FB0 //RX_TDDRC_ALPHA_DWN_3 +189 0x7FB0 //RX_TDDRC_ALPHA_DWN_4 +190 0xDA9E //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +269 0x0000 //RX_TDDRC_THRD_0 +270 0x0000 //RX_TDDRC_THRD_1 +271 0x0E80 //RX_TDDRC_THRD_2 +272 0x3800 //RX_TDDRC_THRD_3 +273 0x2A00 //RX_TDDRC_SLANT_0 +274 0x6E00 //RX_TDDRC_SLANT_1 +275 0x3000 //RX_TDDRC_ALPHA_UP_0 +276 0x7FB0 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x0000 //RX_TDDRC_HMNC_GAIN +279 0x0000 //RX_TDDRC_SMT_FLAG +280 0x0000 //RX_TDDRC_SMT_W +281 0x0100 //RX_TDDRC_DRC_GAIN +195 0x0020 //RX_FDEQ_SUBNUM +196 0x4848 //RX_FDEQ_GAIN_0 +197 0x4848 //RX_FDEQ_GAIN_1 +198 0x4848 //RX_FDEQ_GAIN_2 +199 0x4848 //RX_FDEQ_GAIN_3 +200 0x4848 //RX_FDEQ_GAIN_4 +201 0x4848 //RX_FDEQ_GAIN_5 +202 0x4848 //RX_FDEQ_GAIN_6 +203 0x4848 //RX_FDEQ_GAIN_7 +204 0x4848 //RX_FDEQ_GAIN_8 +205 0x4848 //RX_FDEQ_GAIN_9 +206 0x4848 //RX_FDEQ_GAIN_10 +207 0x4848 //RX_FDEQ_GAIN_11 +208 0x4848 //RX_FDEQ_GAIN_12 +209 0x4848 //RX_FDEQ_GAIN_13 +210 0x4848 //RX_FDEQ_GAIN_14 +211 0x4848 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0000 //RX_FDEQ_BIN_0 +221 0x0000 //RX_FDEQ_BIN_1 +222 0x0000 //RX_FDEQ_BIN_2 +223 0x0000 //RX_FDEQ_BIN_3 +224 0x0000 //RX_FDEQ_BIN_4 +225 0x0000 //RX_FDEQ_BIN_5 +226 0x0000 //RX_FDEQ_BIN_6 +227 0x0000 //RX_FDEQ_BIN_7 +228 0x0000 //RX_FDEQ_BIN_8 +229 0x0000 //RX_FDEQ_BIN_9 +230 0x0000 //RX_FDEQ_BIN_10 +231 0x0000 //RX_FDEQ_BIN_11 +232 0x0000 //RX_FDEQ_BIN_12 +233 0x0000 //RX_FDEQ_BIN_13 +234 0x0000 //RX_FDEQ_BIN_14 +235 0x0000 //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x0000 //RX_FDEQ_RESRV_0 +245 0x0000 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0030 //RX_FDDRC_BAND_MARGIN_1 +248 0x0050 //RX_FDDRC_BAND_MARGIN_2 +249 0x0080 //RX_FDDRC_BAND_MARGIN_3 +250 0x0004 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x5000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x6400 //RX_FDDRC_THRD_3_2 +258 0x6400 //RX_FDDRC_THRD_3_3 +259 0x2000 //RX_FDDRC_SLANT_0_0 +260 0x2000 //RX_FDDRC_SLANT_0_1 +261 0x2000 //RX_FDDRC_SLANT_0_2 +262 0x2000 //RX_FDDRC_SLANT_0_3 +263 0x2000 //RX_FDDRC_SLANT_1_0 +264 0x2000 //RX_FDDRC_SLANT_1_1 +265 0x2000 //RX_FDDRC_SLANT_1_2 +266 0x2000 //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +286 0x0100 //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 +#VOL 1 +163 0x3000 //RX_TDDRC_ALPHA_UP_1 +164 0x3000 //RX_TDDRC_ALPHA_UP_2 +165 0x3000 //RX_TDDRC_ALPHA_UP_3 +166 0x3000 //RX_TDDRC_ALPHA_UP_4 +184 0x7FB0 //RX_TDDRC_ALPHA_DWN_1 +185 0x7FB0 //RX_TDDRC_ALPHA_DWN_2 +186 0x7FB0 //RX_TDDRC_ALPHA_DWN_3 +189 0x7FB0 //RX_TDDRC_ALPHA_DWN_4 +190 0xDA9E //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +269 0x0000 //RX_TDDRC_THRD_0 +270 0x0000 //RX_TDDRC_THRD_1 +271 0x0E80 //RX_TDDRC_THRD_2 +272 0x3800 //RX_TDDRC_THRD_3 +273 0x2A00 //RX_TDDRC_SLANT_0 +274 0x6E00 //RX_TDDRC_SLANT_1 +275 0x3000 //RX_TDDRC_ALPHA_UP_0 +276 0x7FB0 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x0000 //RX_TDDRC_HMNC_GAIN +279 0x0000 //RX_TDDRC_SMT_FLAG +280 0x0000 //RX_TDDRC_SMT_W +281 0x0100 //RX_TDDRC_DRC_GAIN +195 0x0020 //RX_FDEQ_SUBNUM +196 0x4848 //RX_FDEQ_GAIN_0 +197 0x4848 //RX_FDEQ_GAIN_1 +198 0x4848 //RX_FDEQ_GAIN_2 +199 0x4848 //RX_FDEQ_GAIN_3 +200 0x4848 //RX_FDEQ_GAIN_4 +201 0x4848 //RX_FDEQ_GAIN_5 +202 0x4848 //RX_FDEQ_GAIN_6 +203 0x4848 //RX_FDEQ_GAIN_7 +204 0x4848 //RX_FDEQ_GAIN_8 +205 0x4848 //RX_FDEQ_GAIN_9 +206 0x4848 //RX_FDEQ_GAIN_10 +207 0x4848 //RX_FDEQ_GAIN_11 +208 0x4848 //RX_FDEQ_GAIN_12 +209 0x4848 //RX_FDEQ_GAIN_13 +210 0x4848 //RX_FDEQ_GAIN_14 +211 0x4848 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0000 //RX_FDEQ_BIN_0 +221 0x0000 //RX_FDEQ_BIN_1 +222 0x0000 //RX_FDEQ_BIN_2 +223 0x0000 //RX_FDEQ_BIN_3 +224 0x0000 //RX_FDEQ_BIN_4 +225 0x0000 //RX_FDEQ_BIN_5 +226 0x0000 //RX_FDEQ_BIN_6 +227 0x0000 //RX_FDEQ_BIN_7 +228 0x0000 //RX_FDEQ_BIN_8 +229 0x0000 //RX_FDEQ_BIN_9 +230 0x0000 //RX_FDEQ_BIN_10 +231 0x0000 //RX_FDEQ_BIN_11 +232 0x0000 //RX_FDEQ_BIN_12 +233 0x0000 //RX_FDEQ_BIN_13 +234 0x0000 //RX_FDEQ_BIN_14 +235 0x0000 //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x0000 //RX_FDEQ_RESRV_0 +245 0x0000 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0030 //RX_FDDRC_BAND_MARGIN_1 +248 0x0050 //RX_FDDRC_BAND_MARGIN_2 +249 0x0080 //RX_FDDRC_BAND_MARGIN_3 +250 0x0004 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x5000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x6400 //RX_FDDRC_THRD_3_2 +258 0x6400 //RX_FDDRC_THRD_3_3 +259 0x2000 //RX_FDDRC_SLANT_0_0 +260 0x2000 //RX_FDDRC_SLANT_0_1 +261 0x2000 //RX_FDDRC_SLANT_0_2 +262 0x2000 //RX_FDDRC_SLANT_0_3 +263 0x2000 //RX_FDDRC_SLANT_1_0 +264 0x2000 //RX_FDDRC_SLANT_1_1 +265 0x2000 //RX_FDDRC_SLANT_1_2 +266 0x2000 //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +286 0x0100 //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 +#VOL 2 +163 0x3000 //RX_TDDRC_ALPHA_UP_1 +164 0x3000 //RX_TDDRC_ALPHA_UP_2 +165 0x3000 //RX_TDDRC_ALPHA_UP_3 +166 0x3000 //RX_TDDRC_ALPHA_UP_4 +184 0x7FB0 //RX_TDDRC_ALPHA_DWN_1 +185 0x7FB0 //RX_TDDRC_ALPHA_DWN_2 +186 0x7FB0 //RX_TDDRC_ALPHA_DWN_3 +189 0x7FB0 //RX_TDDRC_ALPHA_DWN_4 +190 0xDA9E //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +269 0x0000 //RX_TDDRC_THRD_0 +270 0x0000 //RX_TDDRC_THRD_1 +271 0x0E80 //RX_TDDRC_THRD_2 +272 0x3800 //RX_TDDRC_THRD_3 +273 0x2A00 //RX_TDDRC_SLANT_0 +274 0x6E00 //RX_TDDRC_SLANT_1 +275 0x3000 //RX_TDDRC_ALPHA_UP_0 +276 0x7FB0 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x0000 //RX_TDDRC_HMNC_GAIN +279 0x0000 //RX_TDDRC_SMT_FLAG +280 0x0000 //RX_TDDRC_SMT_W +281 0x0100 //RX_TDDRC_DRC_GAIN +195 0x0020 //RX_FDEQ_SUBNUM +196 0x4848 //RX_FDEQ_GAIN_0 +197 0x4848 //RX_FDEQ_GAIN_1 +198 0x4848 //RX_FDEQ_GAIN_2 +199 0x4848 //RX_FDEQ_GAIN_3 +200 0x4848 //RX_FDEQ_GAIN_4 +201 0x4848 //RX_FDEQ_GAIN_5 +202 0x4848 //RX_FDEQ_GAIN_6 +203 0x4848 //RX_FDEQ_GAIN_7 +204 0x4848 //RX_FDEQ_GAIN_8 +205 0x4848 //RX_FDEQ_GAIN_9 +206 0x4848 //RX_FDEQ_GAIN_10 +207 0x4848 //RX_FDEQ_GAIN_11 +208 0x4848 //RX_FDEQ_GAIN_12 +209 0x4848 //RX_FDEQ_GAIN_13 +210 0x4848 //RX_FDEQ_GAIN_14 +211 0x4848 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0000 //RX_FDEQ_BIN_0 +221 0x0000 //RX_FDEQ_BIN_1 +222 0x0000 //RX_FDEQ_BIN_2 +223 0x0000 //RX_FDEQ_BIN_3 +224 0x0000 //RX_FDEQ_BIN_4 +225 0x0000 //RX_FDEQ_BIN_5 +226 0x0000 //RX_FDEQ_BIN_6 +227 0x0000 //RX_FDEQ_BIN_7 +228 0x0000 //RX_FDEQ_BIN_8 +229 0x0000 //RX_FDEQ_BIN_9 +230 0x0000 //RX_FDEQ_BIN_10 +231 0x0000 //RX_FDEQ_BIN_11 +232 0x0000 //RX_FDEQ_BIN_12 +233 0x0000 //RX_FDEQ_BIN_13 +234 0x0000 //RX_FDEQ_BIN_14 +235 0x0000 //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x0000 //RX_FDEQ_RESRV_0 +245 0x0000 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0030 //RX_FDDRC_BAND_MARGIN_1 +248 0x0050 //RX_FDDRC_BAND_MARGIN_2 +249 0x0080 //RX_FDDRC_BAND_MARGIN_3 +250 0x0004 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x5000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x6400 //RX_FDDRC_THRD_3_2 +258 0x6400 //RX_FDDRC_THRD_3_3 +259 0x2000 //RX_FDDRC_SLANT_0_0 +260 0x2000 //RX_FDDRC_SLANT_0_1 +261 0x2000 //RX_FDDRC_SLANT_0_2 +262 0x2000 //RX_FDDRC_SLANT_0_3 +263 0x2000 //RX_FDDRC_SLANT_1_0 +264 0x2000 //RX_FDDRC_SLANT_1_1 +265 0x2000 //RX_FDDRC_SLANT_1_2 +266 0x2000 //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +286 0x0100 //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 +#VOL 3 +163 0x3000 //RX_TDDRC_ALPHA_UP_1 +164 0x3000 //RX_TDDRC_ALPHA_UP_2 +165 0x3000 //RX_TDDRC_ALPHA_UP_3 +166 0x3000 //RX_TDDRC_ALPHA_UP_4 +184 0x7FB0 //RX_TDDRC_ALPHA_DWN_1 +185 0x7FB0 //RX_TDDRC_ALPHA_DWN_2 +186 0x7FB0 //RX_TDDRC_ALPHA_DWN_3 +189 0x7FB0 //RX_TDDRC_ALPHA_DWN_4 +190 0xDA9E //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +269 0x0000 //RX_TDDRC_THRD_0 +270 0x0000 //RX_TDDRC_THRD_1 +271 0x0E80 //RX_TDDRC_THRD_2 +272 0x3800 //RX_TDDRC_THRD_3 +273 0x2A00 //RX_TDDRC_SLANT_0 +274 0x6E00 //RX_TDDRC_SLANT_1 +275 0x3000 //RX_TDDRC_ALPHA_UP_0 +276 0x7FB0 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x0000 //RX_TDDRC_HMNC_GAIN +279 0x0000 //RX_TDDRC_SMT_FLAG +280 0x0000 //RX_TDDRC_SMT_W +281 0x0100 //RX_TDDRC_DRC_GAIN +195 0x0020 //RX_FDEQ_SUBNUM +196 0x4848 //RX_FDEQ_GAIN_0 +197 0x4848 //RX_FDEQ_GAIN_1 +198 0x4848 //RX_FDEQ_GAIN_2 +199 0x4848 //RX_FDEQ_GAIN_3 +200 0x4848 //RX_FDEQ_GAIN_4 +201 0x4848 //RX_FDEQ_GAIN_5 +202 0x4848 //RX_FDEQ_GAIN_6 +203 0x4848 //RX_FDEQ_GAIN_7 +204 0x4848 //RX_FDEQ_GAIN_8 +205 0x4848 //RX_FDEQ_GAIN_9 +206 0x4848 //RX_FDEQ_GAIN_10 +207 0x4848 //RX_FDEQ_GAIN_11 +208 0x4848 //RX_FDEQ_GAIN_12 +209 0x4848 //RX_FDEQ_GAIN_13 +210 0x4848 //RX_FDEQ_GAIN_14 +211 0x4848 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0000 //RX_FDEQ_BIN_0 +221 0x0000 //RX_FDEQ_BIN_1 +222 0x0000 //RX_FDEQ_BIN_2 +223 0x0000 //RX_FDEQ_BIN_3 +224 0x0000 //RX_FDEQ_BIN_4 +225 0x0000 //RX_FDEQ_BIN_5 +226 0x0000 //RX_FDEQ_BIN_6 +227 0x0000 //RX_FDEQ_BIN_7 +228 0x0000 //RX_FDEQ_BIN_8 +229 0x0000 //RX_FDEQ_BIN_9 +230 0x0000 //RX_FDEQ_BIN_10 +231 0x0000 //RX_FDEQ_BIN_11 +232 0x0000 //RX_FDEQ_BIN_12 +233 0x0000 //RX_FDEQ_BIN_13 +234 0x0000 //RX_FDEQ_BIN_14 +235 0x0000 //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x0000 //RX_FDEQ_RESRV_0 +245 0x0000 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0030 //RX_FDDRC_BAND_MARGIN_1 +248 0x0050 //RX_FDDRC_BAND_MARGIN_2 +249 0x0080 //RX_FDDRC_BAND_MARGIN_3 +250 0x0004 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x5000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x6400 //RX_FDDRC_THRD_3_2 +258 0x6400 //RX_FDDRC_THRD_3_3 +259 0x2000 //RX_FDDRC_SLANT_0_0 +260 0x2000 //RX_FDDRC_SLANT_0_1 +261 0x2000 //RX_FDDRC_SLANT_0_2 +262 0x2000 //RX_FDDRC_SLANT_0_3 +263 0x2000 //RX_FDDRC_SLANT_1_0 +264 0x2000 //RX_FDDRC_SLANT_1_1 +265 0x2000 //RX_FDDRC_SLANT_1_2 +266 0x2000 //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +286 0x0100 //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 +#VOL 4 +163 0x3000 //RX_TDDRC_ALPHA_UP_1 +164 0x3000 //RX_TDDRC_ALPHA_UP_2 +165 0x3000 //RX_TDDRC_ALPHA_UP_3 +166 0x3000 //RX_TDDRC_ALPHA_UP_4 +184 0x7FB0 //RX_TDDRC_ALPHA_DWN_1 +185 0x7FB0 //RX_TDDRC_ALPHA_DWN_2 +186 0x7FB0 //RX_TDDRC_ALPHA_DWN_3 +189 0x7FB0 //RX_TDDRC_ALPHA_DWN_4 +190 0xDA9E //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +269 0x0000 //RX_TDDRC_THRD_0 +270 0x0000 //RX_TDDRC_THRD_1 +271 0x0E80 //RX_TDDRC_THRD_2 +272 0x3800 //RX_TDDRC_THRD_3 +273 0x2A00 //RX_TDDRC_SLANT_0 +274 0x6E00 //RX_TDDRC_SLANT_1 +275 0x3000 //RX_TDDRC_ALPHA_UP_0 +276 0x7FB0 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x0000 //RX_TDDRC_HMNC_GAIN +279 0x0000 //RX_TDDRC_SMT_FLAG +280 0x0000 //RX_TDDRC_SMT_W +281 0x0100 //RX_TDDRC_DRC_GAIN +195 0x0020 //RX_FDEQ_SUBNUM +196 0x4848 //RX_FDEQ_GAIN_0 +197 0x4848 //RX_FDEQ_GAIN_1 +198 0x4848 //RX_FDEQ_GAIN_2 +199 0x4848 //RX_FDEQ_GAIN_3 +200 0x4848 //RX_FDEQ_GAIN_4 +201 0x4848 //RX_FDEQ_GAIN_5 +202 0x4848 //RX_FDEQ_GAIN_6 +203 0x4848 //RX_FDEQ_GAIN_7 +204 0x4848 //RX_FDEQ_GAIN_8 +205 0x4848 //RX_FDEQ_GAIN_9 +206 0x4848 //RX_FDEQ_GAIN_10 +207 0x4848 //RX_FDEQ_GAIN_11 +208 0x4848 //RX_FDEQ_GAIN_12 +209 0x4848 //RX_FDEQ_GAIN_13 +210 0x4848 //RX_FDEQ_GAIN_14 +211 0x4848 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0000 //RX_FDEQ_BIN_0 +221 0x0000 //RX_FDEQ_BIN_1 +222 0x0000 //RX_FDEQ_BIN_2 +223 0x0000 //RX_FDEQ_BIN_3 +224 0x0000 //RX_FDEQ_BIN_4 +225 0x0000 //RX_FDEQ_BIN_5 +226 0x0000 //RX_FDEQ_BIN_6 +227 0x0000 //RX_FDEQ_BIN_7 +228 0x0000 //RX_FDEQ_BIN_8 +229 0x0000 //RX_FDEQ_BIN_9 +230 0x0000 //RX_FDEQ_BIN_10 +231 0x0000 //RX_FDEQ_BIN_11 +232 0x0000 //RX_FDEQ_BIN_12 +233 0x0000 //RX_FDEQ_BIN_13 +234 0x0000 //RX_FDEQ_BIN_14 +235 0x0000 //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x0000 //RX_FDEQ_RESRV_0 +245 0x0000 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0030 //RX_FDDRC_BAND_MARGIN_1 +248 0x0050 //RX_FDDRC_BAND_MARGIN_2 +249 0x0080 //RX_FDDRC_BAND_MARGIN_3 +250 0x0004 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x5000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x6400 //RX_FDDRC_THRD_3_2 +258 0x6400 //RX_FDDRC_THRD_3_3 +259 0x2000 //RX_FDDRC_SLANT_0_0 +260 0x2000 //RX_FDDRC_SLANT_0_1 +261 0x2000 //RX_FDDRC_SLANT_0_2 +262 0x2000 //RX_FDDRC_SLANT_0_3 +263 0x2000 //RX_FDDRC_SLANT_1_0 +264 0x2000 //RX_FDDRC_SLANT_1_1 +265 0x2000 //RX_FDDRC_SLANT_1_2 +266 0x2000 //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +286 0x0100 //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 +#VOL 5 +163 0x3000 //RX_TDDRC_ALPHA_UP_1 +164 0x3000 //RX_TDDRC_ALPHA_UP_2 +165 0x3000 //RX_TDDRC_ALPHA_UP_3 +166 0x3000 //RX_TDDRC_ALPHA_UP_4 +184 0x7FB0 //RX_TDDRC_ALPHA_DWN_1 +185 0x7FB0 //RX_TDDRC_ALPHA_DWN_2 +186 0x7FB0 //RX_TDDRC_ALPHA_DWN_3 +189 0x7FB0 //RX_TDDRC_ALPHA_DWN_4 +190 0xDA9E //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +269 0x0000 //RX_TDDRC_THRD_0 +270 0x0000 //RX_TDDRC_THRD_1 +271 0x0E80 //RX_TDDRC_THRD_2 +272 0x3800 //RX_TDDRC_THRD_3 +273 0x2A00 //RX_TDDRC_SLANT_0 +274 0x6E00 //RX_TDDRC_SLANT_1 +275 0x3000 //RX_TDDRC_ALPHA_UP_0 +276 0x7FB0 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x0000 //RX_TDDRC_HMNC_GAIN +279 0x0000 //RX_TDDRC_SMT_FLAG +280 0x0000 //RX_TDDRC_SMT_W +281 0x0100 //RX_TDDRC_DRC_GAIN +195 0x0020 //RX_FDEQ_SUBNUM +196 0x4848 //RX_FDEQ_GAIN_0 +197 0x4848 //RX_FDEQ_GAIN_1 +198 0x4848 //RX_FDEQ_GAIN_2 +199 0x4848 //RX_FDEQ_GAIN_3 +200 0x4848 //RX_FDEQ_GAIN_4 +201 0x4848 //RX_FDEQ_GAIN_5 +202 0x4848 //RX_FDEQ_GAIN_6 +203 0x4848 //RX_FDEQ_GAIN_7 +204 0x4848 //RX_FDEQ_GAIN_8 +205 0x4848 //RX_FDEQ_GAIN_9 +206 0x4848 //RX_FDEQ_GAIN_10 +207 0x4848 //RX_FDEQ_GAIN_11 +208 0x4848 //RX_FDEQ_GAIN_12 +209 0x4848 //RX_FDEQ_GAIN_13 +210 0x4848 //RX_FDEQ_GAIN_14 +211 0x4848 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0000 //RX_FDEQ_BIN_0 +221 0x0000 //RX_FDEQ_BIN_1 +222 0x0000 //RX_FDEQ_BIN_2 +223 0x0000 //RX_FDEQ_BIN_3 +224 0x0000 //RX_FDEQ_BIN_4 +225 0x0000 //RX_FDEQ_BIN_5 +226 0x0000 //RX_FDEQ_BIN_6 +227 0x0000 //RX_FDEQ_BIN_7 +228 0x0000 //RX_FDEQ_BIN_8 +229 0x0000 //RX_FDEQ_BIN_9 +230 0x0000 //RX_FDEQ_BIN_10 +231 0x0000 //RX_FDEQ_BIN_11 +232 0x0000 //RX_FDEQ_BIN_12 +233 0x0000 //RX_FDEQ_BIN_13 +234 0x0000 //RX_FDEQ_BIN_14 +235 0x0000 //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x0000 //RX_FDEQ_RESRV_0 +245 0x0000 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0030 //RX_FDDRC_BAND_MARGIN_1 +248 0x0050 //RX_FDDRC_BAND_MARGIN_2 +249 0x0080 //RX_FDDRC_BAND_MARGIN_3 +250 0x0004 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x5000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x6400 //RX_FDDRC_THRD_3_2 +258 0x6400 //RX_FDDRC_THRD_3_3 +259 0x2000 //RX_FDDRC_SLANT_0_0 +260 0x2000 //RX_FDDRC_SLANT_0_1 +261 0x2000 //RX_FDDRC_SLANT_0_2 +262 0x2000 //RX_FDDRC_SLANT_0_3 +263 0x2000 //RX_FDDRC_SLANT_1_0 +264 0x2000 //RX_FDDRC_SLANT_1_1 +265 0x2000 //RX_FDDRC_SLANT_1_2 +266 0x2000 //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +286 0x0100 //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 +#VOL 6 +163 0x3000 //RX_TDDRC_ALPHA_UP_1 +164 0x3000 //RX_TDDRC_ALPHA_UP_2 +165 0x3000 //RX_TDDRC_ALPHA_UP_3 +166 0x3000 //RX_TDDRC_ALPHA_UP_4 +184 0x7FB0 //RX_TDDRC_ALPHA_DWN_1 +185 0x7FB0 //RX_TDDRC_ALPHA_DWN_2 +186 0x7FB0 //RX_TDDRC_ALPHA_DWN_3 +189 0x7FB0 //RX_TDDRC_ALPHA_DWN_4 +190 0xDA9E //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +269 0x0000 //RX_TDDRC_THRD_0 +270 0x0000 //RX_TDDRC_THRD_1 +271 0x0E80 //RX_TDDRC_THRD_2 +272 0x3800 //RX_TDDRC_THRD_3 +273 0x2A00 //RX_TDDRC_SLANT_0 +274 0x6E00 //RX_TDDRC_SLANT_1 +275 0x3000 //RX_TDDRC_ALPHA_UP_0 +276 0x7FB0 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x0000 //RX_TDDRC_HMNC_GAIN +279 0x0000 //RX_TDDRC_SMT_FLAG +280 0x0000 //RX_TDDRC_SMT_W +281 0x0100 //RX_TDDRC_DRC_GAIN +195 0x0020 //RX_FDEQ_SUBNUM +196 0x4848 //RX_FDEQ_GAIN_0 +197 0x4848 //RX_FDEQ_GAIN_1 +198 0x4848 //RX_FDEQ_GAIN_2 +199 0x4848 //RX_FDEQ_GAIN_3 +200 0x4848 //RX_FDEQ_GAIN_4 +201 0x4848 //RX_FDEQ_GAIN_5 +202 0x4848 //RX_FDEQ_GAIN_6 +203 0x4848 //RX_FDEQ_GAIN_7 +204 0x4848 //RX_FDEQ_GAIN_8 +205 0x4848 //RX_FDEQ_GAIN_9 +206 0x4848 //RX_FDEQ_GAIN_10 +207 0x4848 //RX_FDEQ_GAIN_11 +208 0x4848 //RX_FDEQ_GAIN_12 +209 0x4848 //RX_FDEQ_GAIN_13 +210 0x4848 //RX_FDEQ_GAIN_14 +211 0x4848 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0000 //RX_FDEQ_BIN_0 +221 0x0000 //RX_FDEQ_BIN_1 +222 0x0000 //RX_FDEQ_BIN_2 +223 0x0000 //RX_FDEQ_BIN_3 +224 0x0000 //RX_FDEQ_BIN_4 +225 0x0000 //RX_FDEQ_BIN_5 +226 0x0000 //RX_FDEQ_BIN_6 +227 0x0000 //RX_FDEQ_BIN_7 +228 0x0000 //RX_FDEQ_BIN_8 +229 0x0000 //RX_FDEQ_BIN_9 +230 0x0000 //RX_FDEQ_BIN_10 +231 0x0000 //RX_FDEQ_BIN_11 +232 0x0000 //RX_FDEQ_BIN_12 +233 0x0000 //RX_FDEQ_BIN_13 +234 0x0000 //RX_FDEQ_BIN_14 +235 0x0000 //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x0000 //RX_FDEQ_RESRV_0 +245 0x0000 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0030 //RX_FDDRC_BAND_MARGIN_1 +248 0x0050 //RX_FDDRC_BAND_MARGIN_2 +249 0x0080 //RX_FDDRC_BAND_MARGIN_3 +250 0x0004 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x5000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x6400 //RX_FDDRC_THRD_3_2 +258 0x6400 //RX_FDDRC_THRD_3_3 +259 0x2000 //RX_FDDRC_SLANT_0_0 +260 0x2000 //RX_FDDRC_SLANT_0_1 +261 0x2000 //RX_FDDRC_SLANT_0_2 +262 0x2000 //RX_FDDRC_SLANT_0_3 +263 0x2000 //RX_FDDRC_SLANT_1_0 +264 0x2000 //RX_FDDRC_SLANT_1_1 +265 0x2000 //RX_FDDRC_SLANT_1_2 +266 0x2000 //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +286 0x0100 //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 #CASE_NAME HEADSET-TTY_FULL-VOICE_GENERIC-SWB -#PARAM_MODE FULL -#PARAM_TYPE TX+RX -#TOTAL_CUSTOM_STEP 7 +#PARAM_MODE Full +#PARAM_TYPE TX+2RX +#TOTAL_CUSTOM_STEP 7+7 #TX 0 0x0001 //TX_OPERATION_MODE_0 1 0x0000 //TX_OPERATION_MODE_1 @@ -52870,7 +80350,7 @@ 239 0x0000 //TX_DT_RESRV_7 240 0x0000 //TX_DT_RESRV_8 241 0x0000 //TX_DT_RESRV_9 -242 0xF200 //TX_THR_SN_EST_0 +242 0xFA00 //TX_THR_SN_EST_0 243 0xF400 //TX_THR_SN_EST_1 244 0xF800 //TX_THR_SN_EST_2 245 0xF600 //TX_THR_SN_EST_3 @@ -52879,12 +80359,12 @@ 248 0xF800 //TX_THR_SN_EST_6 249 0xF800 //TX_THR_SN_EST_7 250 0x0100 //TX_DELTA_THR_SN_EST_0 -251 0x0000 //TX_DELTA_THR_SN_EST_1 +251 0x0100 //TX_DELTA_THR_SN_EST_1 252 0x0100 //TX_DELTA_THR_SN_EST_2 -253 0x0100 //TX_DELTA_THR_SN_EST_3 +253 0x0200 //TX_DELTA_THR_SN_EST_3 254 0x0200 //TX_DELTA_THR_SN_EST_4 255 0x0200 //TX_DELTA_THR_SN_EST_5 -256 0x0200 //TX_DELTA_THR_SN_EST_6 +256 0x0000 //TX_DELTA_THR_SN_EST_6 257 0x0200 //TX_DELTA_THR_SN_EST_7 258 0x4000 //TX_LAMBDA_NN_EST_0 259 0x4000 //TX_LAMBDA_NN_EST_1 @@ -52910,12 +80390,12 @@ 279 0x0000 //TX_B_POST_FLT_0 280 0x0000 //TX_B_POST_FLT_1 281 0x001A //TX_NS_LVL_CTRL_0 -282 0x001A //TX_NS_LVL_CTRL_1 +282 0x0014 //TX_NS_LVL_CTRL_1 283 0x0014 //TX_NS_LVL_CTRL_2 -284 0x0014 //TX_NS_LVL_CTRL_3 +284 0x000C //TX_NS_LVL_CTRL_3 285 0x000C //TX_NS_LVL_CTRL_4 286 0x000C //TX_NS_LVL_CTRL_5 -287 0x000C //TX_NS_LVL_CTRL_6 +287 0x001A //TX_NS_LVL_CTRL_6 288 0x000C //TX_NS_LVL_CTRL_7 289 0x000E //TX_MIN_GAIN_S_0 290 0x0014 //TX_MIN_GAIN_S_1 @@ -52931,10 +80411,10 @@ 300 0x7FFF //TX_SNRI_SUP_0 301 0x7FFF //TX_SNRI_SUP_1 302 0x7FFF //TX_SNRI_SUP_2 -303 0x7FFF //TX_SNRI_SUP_3 +303 0x4000 //TX_SNRI_SUP_3 304 0x4000 //TX_SNRI_SUP_4 305 0x4000 //TX_SNRI_SUP_5 -306 0x4000 //TX_SNRI_SUP_6 +306 0x7FFF //TX_SNRI_SUP_6 307 0x4000 //TX_SNRI_SUP_7 308 0x1200 //TX_THR_LFNS 309 0x0147 //TX_G_LFNS @@ -52943,12 +80423,12 @@ 312 0x7FFF //TX_A_POST_FILT_0 313 0x7FFF //TX_A_POST_FILT_1 314 0x4000 //TX_A_POST_FILT_S_0 -315 0x199A //TX_A_POST_FILT_S_1 +315 0x1000 //TX_A_POST_FILT_S_1 316 0x1000 //TX_A_POST_FILT_S_2 -317 0x1000 //TX_A_POST_FILT_S_3 +317 0x6666 //TX_A_POST_FILT_S_3 318 0x6666 //TX_A_POST_FILT_S_4 319 0x6666 //TX_A_POST_FILT_S_5 -320 0x6666 //TX_A_POST_FILT_S_6 +320 0x199A //TX_A_POST_FILT_S_6 321 0x6666 //TX_A_POST_FILT_S_7 322 0x2000 //TX_B_POST_FILT_0 323 0x2000 //TX_B_POST_FILT_1 @@ -52995,7 +80475,7 @@ 364 0x0000 //TX_K_APT 365 0x0001 //TX_NOISEDET 366 0x05A0 //TX_NDETCT -367 0x000A //TX_NOISE_TH_0 +367 0x0383 //TX_NOISE_TH_0 368 0x1388 //TX_NOISE_TH_0_2 369 0x3A98 //TX_NOISE_TH_0_3 370 0x0C80 //TX_NOISE_TH_1 @@ -53007,11 +80487,11 @@ 376 0x7FFF //TX_NOISE_TH_5_3 377 0x7FFF //TX_NOISE_TH_5_4 378 0x00C8 //TX_NOISE_TH_6 -379 0x000A //TX_MINENOISE_TH -380 0x0000 //TX_MINENOISE_MIC0_TH_MTS -381 0x0000 //TX_MINENOISE_MIC0_TH_EXP -382 0x0000 //TX_MINENOISE_MIC0_S_TH_MTS -383 0x0000 //TX_MINENOISE_MIC0_S_TH_EXP +379 0x044C //TX_MINENOISE_TH +380 0xD508 //TX_MORENS_TFMASK_TH +381 0x0001 //TX_DRC_QUIET_FLOOR +382 0x3A98 //TX_RATIODTL_CUT_TH +383 0x0DAC //TX_DT_CUT_K1 384 0x6400 //TX_OUT_ENER_S_TH_CLEAN 385 0x6400 //TX_OUT_ENER_S_TH_LESSCLEAN 386 0x6400 //TX_OUT_ENER_S_TH_NOISY @@ -53019,22 +80499,22 @@ 388 0x7D00 //TX_OUT_ENER_TH_SPEECH 389 0x0000 //TX_SN_NPB_GAIN 390 0x0000 //TX_NN_NPB_GAIN -391 0x0000 //TX_CSX_ALPHA_0 -392 0x0000 //TX_CSX_ALPHA_1 -393 0x0000 //TX_CSX_ALPHA_2 -394 0x0000 //TX_CSX_ALPHA_3 -395 0x0000 //TX_MU_ARSP_EST -396 0x0000 //TX_P_OUTBEAM_MIN_TH +391 0x7FFF //TX_POST_MASK_SUP_HSNE +392 0x1388 //TX_TAIL_DET_TH +393 0x4000 //TX_B_LESSCUT_RTO_WTA +394 0x0000 //TX_MEL_G_R +395 0x0080 //TX_SUPHIGH_TH +396 0x0000 //TX_MASK_G_R 397 0x0000 //TX_EXTRA_NS_L -398 0x0000 //TX_EXTRA_NS_A -399 0x0000 //TX_VR_NOISE_FLOOR_TH +398 0x1800 //TX_C_POST_FLT_MASK +399 0x7FFF //TX_A_POST_FLT_WNS 400 0x0000 //TX_MIN_G_LOW300HZ 401 0x0010 //TX_MAXLEVEL_CNG 402 0x0000 //TX_STN_NOISE_TH 403 0x0000 //TX_POST_MASK_SUP 404 0x0000 //TX_POST_MASK_ADJUST 405 0x0014 //TX_NS_ENOISE_MIC0_TH -406 0x0014 //TX_MINENOISE_MIC0_TH +406 0x02F3 //TX_MINENOISE_MIC0_TH 407 0x0226 //TX_MINENOISE_MIC0_S_TH 408 0x2879 //TX_MIN_G_CTRL_SSNS 409 0x0400 //TX_METAL_RTO_THR @@ -53142,16 +80622,16 @@ 511 0x6666 //TX_MIC_TO_BFGAIN 512 0x6666 //TX_MICTOBFGAIN0 513 0x0014 //TX_FASTMUE_TH -514 0x0000 //TX_DERVB_LEN_0 -515 0x0000 //TX_DERVB_LEN_1 -516 0x0000 //TX_RHO_DERVB -517 0x0000 //TX_MIC_INDX_DERVB -518 0x0000 //TX_MU_DERVB -519 0x0000 //TX_DR_RESRV_0 -520 0x0000 //TX_DR_RESRV_1 -521 0x0000 //TX_DR_RESRV_2 -522 0x0000 //TX_DR_RESRV_3 -523 0x0000 //TX_DR_RESRV_4 +514 0xC000 //TX_DEREVERB_LF_MU +515 0xC000 //TX_DEREVERB_HF_MU +516 0xCCCC //TX_DEREVERB_DELAY +517 0xD999 //TX_DEREVERB_COEF_LEN +518 0x1F40 //TX_DEREVERB_DNR +519 0x0000 //TX_DEREVERB_ALPHA +520 0x0000 //TX_DEREVERB_BETA +521 0x0000 //TX_GSC_RTOL_TH +522 0x7000 //TX_GSC_RTOH_TH +523 0x0064 //TX_WIDE2_MEANHTH 524 0x0000 //TX_DR_RESRV_5 525 0x0000 //TX_DR_RESRV_6 526 0x0000 //TX_DR_RESRV_7 @@ -53517,16 +80997,81 @@ 886 0x0000 //TX_FASTNS_TFMASKBIN_TH2 887 0x0000 //TX_FASTNS_TFMASKBIN_TH3 888 0x00C8 //TX_FASTNS_ARSPC_TH -889 0xD99A //TX_FASTNS_MASK5_TH +889 0x8000 //TX_FASTNS_MASK5_TH 890 0x051F //TX_POSTSSA_MIN_G_VR_MASK -891 0x7FFF //TX_A_LESSCUT_RTO_MASK +891 0x4000 //TX_A_LESSCUT_RTO_MASK 892 0x1770 //TX_FASTNS_NOISETH 893 0xC000 //TX_FASTNS_SSA_THLFL 894 0xC000 //TX_FASTNS_SSA_THHFL 895 0xCCCC //TX_FASTNS_SSA_THLFH 896 0xD999 //TX_FASTNS_SSA_THHFH +897 0x2339 //TX_SENDFUNC_REG_MICMUTE +898 0x0021 //TX_SENDFUNC_REG_MICMUTE1 +899 0x02BC //TX_MICMUTE_RATIO_THR +900 0x0140 //TX_MICMUTE_AMP_THR +901 0x0004 //TX_MICMUTE_HPF_IND +902 0x00C0 //TX_MICMUTE_LOG_EYR_TH +903 0x0008 //TX_MICMUTE_CVG_TIME +904 0x0008 //TX_MICMUTE_RELEASE_TIME +905 0x01FE //TX_MIC_VOLUME_MIC0MUTE +906 0x0020 //TX_MICMUTE_EPD_OFFSET_0 +907 0x001E //TX_MICMUTE_FRQ_AEC_L +908 0x7999 //TX_MICMUTE_EAD_THR +909 0x7FFF //TX_MICMUTE_LAMBDA_CB_NLE +910 0x7FFF //TX_MICMUTE_LAMBDA_RE_EST +911 0x4000 //TX_DTD_THR1_MICMUTE_0 +912 0x7000 //TX_DTD_THR1_MICMUTE_1 +913 0x7FFF //TX_DTD_THR1_MICMUTE_2 +914 0x7FFF //TX_DTD_THR1_MICMUTE_3 +915 0x6CCC //TX_DTD_THR2_MICMUTE_0 +916 0x0400 //TX_MICMUTE_MIN_EQ_RE_EST_0 +917 0x0400 //TX_MICMUTE_MIN_EQ_RE_EST_1 +918 0x1000 //TX_MICMUTE_MIN_EQ_RE_EST_2 +919 0x7FFF //TX_MICMUTE_MIN_EQ_RE_EST_3 +920 0x7FFF //TX_MICMUTE_MIN_EQ_RE_EST_4 +921 0x4000 //TX_MICMUTE_C_POST_FLT +922 0x03E8 //TX_MICMUTE_DT_CUT_K +923 0x0001 //TX_MICMUTE_DT_CUT_THR +924 0x03E8 //TX_MICMUTE_DT_CUT_K2 +925 0x0001 //TX_MICMUTE_DT_CUT_THR2 +926 0x0064 //TX_MICMUTE_DT2_HOLD_N +927 0x1000 //TX_MICMUTE_RATIODTH_THCUT +928 0x1000 //TX_MICMUTE_B_POST_FLT_ECHOL +929 0x7FFF //TX_MICMUTE_B_POST_FLT_ECHOH +930 0x0400 //TX_MICMUTE_C_POST_FLT_MASK +931 0x7999 //TX_MICMUTE_RATIODTL_CUT_TH +932 0x0258 //TX_MICMUTE_DT_CUT_K1 +933 0x0800 //TX_MICMUTE_N2_SN_EST +934 0xFC00 //TX_MICMUTE_THR_SN_EST_0 +935 0x001C //TX_MICMUTE_MIN_G_CTRL_0 +936 0x6000 //TX_MICMUTE_A_POST_FILT_S_0 +937 0x7000 //TX_MICMUTE_B_POST_FILT_0 +938 0x2710 //TX_MIC1RUB_AMP_THR +939 0x0010 //TX_MIC1MUTE_RATIO_THR +940 0x0450 //TX_MIC1MUTE_AMP_THR +941 0x0008 //TX_MIC1MUTE_CVG_TIME +942 0x0008 //TX_MIC1MUTE_RELEASE_TIME +943 0x0000 //TX_AMS_RESRV_01 +944 0x0000 //TX_AMS_RESRV_02 +945 0x0000 //TX_AMS_RESRV_03 +946 0x0000 //TX_AMS_RESRV_04 +947 0x0000 //TX_AMS_RESRV_05 +948 0x0000 //TX_AMS_RESRV_06 +949 0x0000 //TX_AMS_RESRV_07 +950 0x0000 //TX_AMS_RESRV_08 +951 0x0000 //TX_AMS_RESRV_09 +952 0x0000 //TX_AMS_RESRV_10 +953 0x0000 //TX_AMS_RESRV_11 +954 0x0000 //TX_AMS_RESRV_12 +955 0x0000 //TX_AMS_RESRV_13 +956 0x0000 //TX_AMS_RESRV_14 +957 0x0000 //TX_AMS_RESRV_15 +958 0x0000 //TX_AMS_RESRV_16 +959 0x0000 //TX_AMS_RESRV_17 +960 0x0000 //TX_AMS_RESRV_18 +961 0x0000 //TX_AMS_RESRV_19 #RX -0 0x0040 //RX_RECVFUNC_MODE_0 +0 0x2040 //RX_RECVFUNC_MODE_0 1 0x0000 //RX_RECVFUNC_MODE_1 2 0x0000 //RX_SAMPLINGFREQ_SIG 3 0x0000 //RX_SAMPLINGFREQ_PROC @@ -54376,11 +81921,862 @@ 110 0x0000 //RX_FDDRC_RESRV_0 129 0x0100 //RX_SPK_VOL 130 0x0000 //RX_VOL_RESRV_0 +#RX 2 +157 0x2040 //RX_RECVFUNC_MODE_0 +158 0x0000 //RX_RECVFUNC_MODE_1 +159 0x0000 //RX_SAMPLINGFREQ_SIG +160 0x0000 //RX_SAMPLINGFREQ_PROC +161 0x000A //RX_FRAME_SZ +162 0x0000 //RX_DELAY_OPT +163 0x3000 //RX_TDDRC_ALPHA_UP_1 +164 0x3000 //RX_TDDRC_ALPHA_UP_2 +165 0x3000 //RX_TDDRC_ALPHA_UP_3 +166 0x3000 //RX_TDDRC_ALPHA_UP_4 +167 0x050D //RX_PGA +168 0x7652 //RX_A_HP +169 0x4000 //RX_B_PE +170 0x7800 //RX_THR_PITCH_DET_0 +171 0x7000 //RX_THR_PITCH_DET_1 +172 0x6000 //RX_THR_PITCH_DET_2 +173 0x0000 //RX_PITCH_BFR_LEN +174 0x0000 //RX_SBD_PITCH_DET +175 0x0000 //RX_PP_RESRV_0 +176 0x0000 //RX_PP_RESRV_1 +177 0xF800 //RX_N_SN_EST +178 0x0000 //RX_N2_SN_EST +179 0x000F //RX_NS_LVL_CTRL +180 0xF800 //RX_THR_SN_EST +181 0x7E00 //RX_LAMBDA_PFILT +182 0x000A //RX_FENS_RESRV_0 +183 0x0000 //RX_FENS_RESRV_1 +184 0x7FB0 //RX_TDDRC_ALPHA_DWN_1 +185 0x7FB0 //RX_TDDRC_ALPHA_DWN_2 +186 0x7FB0 //RX_TDDRC_ALPHA_DWN_3 +187 0x0000 //RX_EXTRA_NS_L +188 0x0000 //RX_EXTRA_NS_A +189 0x7FB0 //RX_TDDRC_ALPHA_DWN_4 +190 0xDA9E //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +192 0x0000 //RX_A_POST_FLT +193 0x0000 //RX_LMT_THRD +194 0x4000 //RX_LMT_ALPHA +195 0x0020 //RX_FDEQ_SUBNUM +196 0x4848 //RX_FDEQ_GAIN_0 +197 0x4848 //RX_FDEQ_GAIN_1 +198 0x4848 //RX_FDEQ_GAIN_2 +199 0x4848 //RX_FDEQ_GAIN_3 +200 0x4848 //RX_FDEQ_GAIN_4 +201 0x4848 //RX_FDEQ_GAIN_5 +202 0x4848 //RX_FDEQ_GAIN_6 +203 0x4848 //RX_FDEQ_GAIN_7 +204 0x4848 //RX_FDEQ_GAIN_8 +205 0x4848 //RX_FDEQ_GAIN_9 +206 0x4848 //RX_FDEQ_GAIN_10 +207 0x4848 //RX_FDEQ_GAIN_11 +208 0x4848 //RX_FDEQ_GAIN_12 +209 0x4848 //RX_FDEQ_GAIN_13 +210 0x4848 //RX_FDEQ_GAIN_14 +211 0x4848 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0000 //RX_FDEQ_BIN_0 +221 0x0000 //RX_FDEQ_BIN_1 +222 0x0000 //RX_FDEQ_BIN_2 +223 0x0000 //RX_FDEQ_BIN_3 +224 0x0000 //RX_FDEQ_BIN_4 +225 0x0000 //RX_FDEQ_BIN_5 +226 0x0000 //RX_FDEQ_BIN_6 +227 0x0000 //RX_FDEQ_BIN_7 +228 0x0000 //RX_FDEQ_BIN_8 +229 0x0000 //RX_FDEQ_BIN_9 +230 0x0000 //RX_FDEQ_BIN_10 +231 0x0000 //RX_FDEQ_BIN_11 +232 0x0000 //RX_FDEQ_BIN_12 +233 0x0000 //RX_FDEQ_BIN_13 +234 0x0000 //RX_FDEQ_BIN_14 +235 0x0000 //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x0000 //RX_FDEQ_RESRV_0 +245 0x0000 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0030 //RX_FDDRC_BAND_MARGIN_1 +248 0x0050 //RX_FDDRC_BAND_MARGIN_2 +249 0x0080 //RX_FDDRC_BAND_MARGIN_3 +250 0x0004 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x5000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x6400 //RX_FDDRC_THRD_3_2 +258 0x6400 //RX_FDDRC_THRD_3_3 +259 0x2000 //RX_FDDRC_SLANT_0_0 +260 0x2000 //RX_FDDRC_SLANT_0_1 +261 0x2000 //RX_FDDRC_SLANT_0_2 +262 0x2000 //RX_FDDRC_SLANT_0_3 +263 0x2000 //RX_FDDRC_SLANT_1_0 +264 0x2000 //RX_FDDRC_SLANT_1_1 +265 0x2000 //RX_FDDRC_SLANT_1_2 +266 0x2000 //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +268 0x0003 //RX_FILTINDX +269 0x0000 //RX_TDDRC_THRD_0 +270 0x0000 //RX_TDDRC_THRD_1 +271 0x0E80 //RX_TDDRC_THRD_2 +272 0x3800 //RX_TDDRC_THRD_3 +273 0x2A00 //RX_TDDRC_SLANT_0 +274 0x6E00 //RX_TDDRC_SLANT_1 +275 0x3000 //RX_TDDRC_ALPHA_UP_0 +276 0x7FB0 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x0000 //RX_TDDRC_HMNC_GAIN +279 0x0000 //RX_TDDRC_SMT_FLAG +280 0x0000 //RX_TDDRC_SMT_W +281 0x0100 //RX_TDDRC_DRC_GAIN +282 0x7C00 //RX_LAMBDA_PKA_FP +283 0x2000 //RX_TPKA_FP +284 0x0080 //RX_MIN_G_FP +285 0x2000 //RX_MAX_G_FP +286 0x0100 //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 +288 0x0010 //RX_MAXLEVEL_CNG +289 0x0000 //RX_BWE_UV_TH +290 0x0000 //RX_BWE_UV_TH2 +291 0x0000 //RX_BWE_UV_TH3 +292 0x0000 //RX_BWE_V_TH +293 0x0000 //RX_BWE_GAIN1_V_TH1 +294 0x0000 //RX_BWE_GAIN1_V_TH2 +295 0x0000 //RX_BWE_UV_EQ +296 0x0000 //RX_BWE_V_EQ +297 0x0000 //RX_BWE_TONE_TH +298 0x0000 //RX_BWE_UV_HOLD_T +299 0x0000 //RX_BWE_GAIN2_ALPHA +300 0x0000 //RX_BWE_GAIN3_ALPHA +301 0x0000 //RX_BWE_CUTOFF +302 0x0000 //RX_BWE_GAINFILL +303 0x0000 //RX_BWE_MAXTH_TONE +304 0x0000 //RX_BWE_EQ_0 +305 0x0000 //RX_BWE_EQ_1 +306 0x0000 //RX_BWE_EQ_2 +307 0x0000 //RX_BWE_EQ_3 +308 0x0000 //RX_BWE_EQ_4 +309 0x0000 //RX_BWE_EQ_5 +310 0x0000 //RX_BWE_EQ_6 +311 0x0000 //RX_BWE_RESRV_0 +312 0x0000 //RX_BWE_RESRV_1 +313 0x0000 //RX_BWE_RESRV_2 +#VOL 0 +163 0x3000 //RX_TDDRC_ALPHA_UP_1 +164 0x3000 //RX_TDDRC_ALPHA_UP_2 +165 0x3000 //RX_TDDRC_ALPHA_UP_3 +166 0x3000 //RX_TDDRC_ALPHA_UP_4 +184 0x7FB0 //RX_TDDRC_ALPHA_DWN_1 +185 0x7FB0 //RX_TDDRC_ALPHA_DWN_2 +186 0x7FB0 //RX_TDDRC_ALPHA_DWN_3 +189 0x7FB0 //RX_TDDRC_ALPHA_DWN_4 +190 0xDA9E //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +269 0x0000 //RX_TDDRC_THRD_0 +270 0x0000 //RX_TDDRC_THRD_1 +271 0x0E80 //RX_TDDRC_THRD_2 +272 0x3800 //RX_TDDRC_THRD_3 +273 0x2A00 //RX_TDDRC_SLANT_0 +274 0x6E00 //RX_TDDRC_SLANT_1 +275 0x3000 //RX_TDDRC_ALPHA_UP_0 +276 0x7FB0 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x0000 //RX_TDDRC_HMNC_GAIN +279 0x0000 //RX_TDDRC_SMT_FLAG +280 0x0000 //RX_TDDRC_SMT_W +281 0x0100 //RX_TDDRC_DRC_GAIN +195 0x0020 //RX_FDEQ_SUBNUM +196 0x4848 //RX_FDEQ_GAIN_0 +197 0x4848 //RX_FDEQ_GAIN_1 +198 0x4848 //RX_FDEQ_GAIN_2 +199 0x4848 //RX_FDEQ_GAIN_3 +200 0x4848 //RX_FDEQ_GAIN_4 +201 0x4848 //RX_FDEQ_GAIN_5 +202 0x4848 //RX_FDEQ_GAIN_6 +203 0x4848 //RX_FDEQ_GAIN_7 +204 0x4848 //RX_FDEQ_GAIN_8 +205 0x4848 //RX_FDEQ_GAIN_9 +206 0x4848 //RX_FDEQ_GAIN_10 +207 0x4848 //RX_FDEQ_GAIN_11 +208 0x4848 //RX_FDEQ_GAIN_12 +209 0x4848 //RX_FDEQ_GAIN_13 +210 0x4848 //RX_FDEQ_GAIN_14 +211 0x4848 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0000 //RX_FDEQ_BIN_0 +221 0x0000 //RX_FDEQ_BIN_1 +222 0x0000 //RX_FDEQ_BIN_2 +223 0x0000 //RX_FDEQ_BIN_3 +224 0x0000 //RX_FDEQ_BIN_4 +225 0x0000 //RX_FDEQ_BIN_5 +226 0x0000 //RX_FDEQ_BIN_6 +227 0x0000 //RX_FDEQ_BIN_7 +228 0x0000 //RX_FDEQ_BIN_8 +229 0x0000 //RX_FDEQ_BIN_9 +230 0x0000 //RX_FDEQ_BIN_10 +231 0x0000 //RX_FDEQ_BIN_11 +232 0x0000 //RX_FDEQ_BIN_12 +233 0x0000 //RX_FDEQ_BIN_13 +234 0x0000 //RX_FDEQ_BIN_14 +235 0x0000 //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x0000 //RX_FDEQ_RESRV_0 +245 0x0000 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0030 //RX_FDDRC_BAND_MARGIN_1 +248 0x0050 //RX_FDDRC_BAND_MARGIN_2 +249 0x0080 //RX_FDDRC_BAND_MARGIN_3 +250 0x0004 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x5000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x6400 //RX_FDDRC_THRD_3_2 +258 0x6400 //RX_FDDRC_THRD_3_3 +259 0x2000 //RX_FDDRC_SLANT_0_0 +260 0x2000 //RX_FDDRC_SLANT_0_1 +261 0x2000 //RX_FDDRC_SLANT_0_2 +262 0x2000 //RX_FDDRC_SLANT_0_3 +263 0x2000 //RX_FDDRC_SLANT_1_0 +264 0x2000 //RX_FDDRC_SLANT_1_1 +265 0x2000 //RX_FDDRC_SLANT_1_2 +266 0x2000 //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +286 0x0100 //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 +#VOL 1 +163 0x3000 //RX_TDDRC_ALPHA_UP_1 +164 0x3000 //RX_TDDRC_ALPHA_UP_2 +165 0x3000 //RX_TDDRC_ALPHA_UP_3 +166 0x3000 //RX_TDDRC_ALPHA_UP_4 +184 0x7FB0 //RX_TDDRC_ALPHA_DWN_1 +185 0x7FB0 //RX_TDDRC_ALPHA_DWN_2 +186 0x7FB0 //RX_TDDRC_ALPHA_DWN_3 +189 0x7FB0 //RX_TDDRC_ALPHA_DWN_4 +190 0xDA9E //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +269 0x0000 //RX_TDDRC_THRD_0 +270 0x0000 //RX_TDDRC_THRD_1 +271 0x0E80 //RX_TDDRC_THRD_2 +272 0x3800 //RX_TDDRC_THRD_3 +273 0x2A00 //RX_TDDRC_SLANT_0 +274 0x6E00 //RX_TDDRC_SLANT_1 +275 0x3000 //RX_TDDRC_ALPHA_UP_0 +276 0x7FB0 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x0000 //RX_TDDRC_HMNC_GAIN +279 0x0000 //RX_TDDRC_SMT_FLAG +280 0x0000 //RX_TDDRC_SMT_W +281 0x0100 //RX_TDDRC_DRC_GAIN +195 0x0020 //RX_FDEQ_SUBNUM +196 0x4848 //RX_FDEQ_GAIN_0 +197 0x4848 //RX_FDEQ_GAIN_1 +198 0x4848 //RX_FDEQ_GAIN_2 +199 0x4848 //RX_FDEQ_GAIN_3 +200 0x4848 //RX_FDEQ_GAIN_4 +201 0x4848 //RX_FDEQ_GAIN_5 +202 0x4848 //RX_FDEQ_GAIN_6 +203 0x4848 //RX_FDEQ_GAIN_7 +204 0x4848 //RX_FDEQ_GAIN_8 +205 0x4848 //RX_FDEQ_GAIN_9 +206 0x4848 //RX_FDEQ_GAIN_10 +207 0x4848 //RX_FDEQ_GAIN_11 +208 0x4848 //RX_FDEQ_GAIN_12 +209 0x4848 //RX_FDEQ_GAIN_13 +210 0x4848 //RX_FDEQ_GAIN_14 +211 0x4848 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0000 //RX_FDEQ_BIN_0 +221 0x0000 //RX_FDEQ_BIN_1 +222 0x0000 //RX_FDEQ_BIN_2 +223 0x0000 //RX_FDEQ_BIN_3 +224 0x0000 //RX_FDEQ_BIN_4 +225 0x0000 //RX_FDEQ_BIN_5 +226 0x0000 //RX_FDEQ_BIN_6 +227 0x0000 //RX_FDEQ_BIN_7 +228 0x0000 //RX_FDEQ_BIN_8 +229 0x0000 //RX_FDEQ_BIN_9 +230 0x0000 //RX_FDEQ_BIN_10 +231 0x0000 //RX_FDEQ_BIN_11 +232 0x0000 //RX_FDEQ_BIN_12 +233 0x0000 //RX_FDEQ_BIN_13 +234 0x0000 //RX_FDEQ_BIN_14 +235 0x0000 //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x0000 //RX_FDEQ_RESRV_0 +245 0x0000 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0030 //RX_FDDRC_BAND_MARGIN_1 +248 0x0050 //RX_FDDRC_BAND_MARGIN_2 +249 0x0080 //RX_FDDRC_BAND_MARGIN_3 +250 0x0004 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x5000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x6400 //RX_FDDRC_THRD_3_2 +258 0x6400 //RX_FDDRC_THRD_3_3 +259 0x2000 //RX_FDDRC_SLANT_0_0 +260 0x2000 //RX_FDDRC_SLANT_0_1 +261 0x2000 //RX_FDDRC_SLANT_0_2 +262 0x2000 //RX_FDDRC_SLANT_0_3 +263 0x2000 //RX_FDDRC_SLANT_1_0 +264 0x2000 //RX_FDDRC_SLANT_1_1 +265 0x2000 //RX_FDDRC_SLANT_1_2 +266 0x2000 //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +286 0x0100 //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 +#VOL 2 +163 0x3000 //RX_TDDRC_ALPHA_UP_1 +164 0x3000 //RX_TDDRC_ALPHA_UP_2 +165 0x3000 //RX_TDDRC_ALPHA_UP_3 +166 0x3000 //RX_TDDRC_ALPHA_UP_4 +184 0x7FB0 //RX_TDDRC_ALPHA_DWN_1 +185 0x7FB0 //RX_TDDRC_ALPHA_DWN_2 +186 0x7FB0 //RX_TDDRC_ALPHA_DWN_3 +189 0x7FB0 //RX_TDDRC_ALPHA_DWN_4 +190 0xDA9E //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +269 0x0000 //RX_TDDRC_THRD_0 +270 0x0000 //RX_TDDRC_THRD_1 +271 0x0E80 //RX_TDDRC_THRD_2 +272 0x3800 //RX_TDDRC_THRD_3 +273 0x2A00 //RX_TDDRC_SLANT_0 +274 0x6E00 //RX_TDDRC_SLANT_1 +275 0x3000 //RX_TDDRC_ALPHA_UP_0 +276 0x7FB0 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x0000 //RX_TDDRC_HMNC_GAIN +279 0x0000 //RX_TDDRC_SMT_FLAG +280 0x0000 //RX_TDDRC_SMT_W +281 0x0100 //RX_TDDRC_DRC_GAIN +195 0x0020 //RX_FDEQ_SUBNUM +196 0x4848 //RX_FDEQ_GAIN_0 +197 0x4848 //RX_FDEQ_GAIN_1 +198 0x4848 //RX_FDEQ_GAIN_2 +199 0x4848 //RX_FDEQ_GAIN_3 +200 0x4848 //RX_FDEQ_GAIN_4 +201 0x4848 //RX_FDEQ_GAIN_5 +202 0x4848 //RX_FDEQ_GAIN_6 +203 0x4848 //RX_FDEQ_GAIN_7 +204 0x4848 //RX_FDEQ_GAIN_8 +205 0x4848 //RX_FDEQ_GAIN_9 +206 0x4848 //RX_FDEQ_GAIN_10 +207 0x4848 //RX_FDEQ_GAIN_11 +208 0x4848 //RX_FDEQ_GAIN_12 +209 0x4848 //RX_FDEQ_GAIN_13 +210 0x4848 //RX_FDEQ_GAIN_14 +211 0x4848 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0000 //RX_FDEQ_BIN_0 +221 0x0000 //RX_FDEQ_BIN_1 +222 0x0000 //RX_FDEQ_BIN_2 +223 0x0000 //RX_FDEQ_BIN_3 +224 0x0000 //RX_FDEQ_BIN_4 +225 0x0000 //RX_FDEQ_BIN_5 +226 0x0000 //RX_FDEQ_BIN_6 +227 0x0000 //RX_FDEQ_BIN_7 +228 0x0000 //RX_FDEQ_BIN_8 +229 0x0000 //RX_FDEQ_BIN_9 +230 0x0000 //RX_FDEQ_BIN_10 +231 0x0000 //RX_FDEQ_BIN_11 +232 0x0000 //RX_FDEQ_BIN_12 +233 0x0000 //RX_FDEQ_BIN_13 +234 0x0000 //RX_FDEQ_BIN_14 +235 0x0000 //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x0000 //RX_FDEQ_RESRV_0 +245 0x0000 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0030 //RX_FDDRC_BAND_MARGIN_1 +248 0x0050 //RX_FDDRC_BAND_MARGIN_2 +249 0x0080 //RX_FDDRC_BAND_MARGIN_3 +250 0x0004 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x5000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x6400 //RX_FDDRC_THRD_3_2 +258 0x6400 //RX_FDDRC_THRD_3_3 +259 0x2000 //RX_FDDRC_SLANT_0_0 +260 0x2000 //RX_FDDRC_SLANT_0_1 +261 0x2000 //RX_FDDRC_SLANT_0_2 +262 0x2000 //RX_FDDRC_SLANT_0_3 +263 0x2000 //RX_FDDRC_SLANT_1_0 +264 0x2000 //RX_FDDRC_SLANT_1_1 +265 0x2000 //RX_FDDRC_SLANT_1_2 +266 0x2000 //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +286 0x0100 //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 +#VOL 3 +163 0x3000 //RX_TDDRC_ALPHA_UP_1 +164 0x3000 //RX_TDDRC_ALPHA_UP_2 +165 0x3000 //RX_TDDRC_ALPHA_UP_3 +166 0x3000 //RX_TDDRC_ALPHA_UP_4 +184 0x7FB0 //RX_TDDRC_ALPHA_DWN_1 +185 0x7FB0 //RX_TDDRC_ALPHA_DWN_2 +186 0x7FB0 //RX_TDDRC_ALPHA_DWN_3 +189 0x7FB0 //RX_TDDRC_ALPHA_DWN_4 +190 0xDA9E //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +269 0x0000 //RX_TDDRC_THRD_0 +270 0x0000 //RX_TDDRC_THRD_1 +271 0x0E80 //RX_TDDRC_THRD_2 +272 0x3800 //RX_TDDRC_THRD_3 +273 0x2A00 //RX_TDDRC_SLANT_0 +274 0x6E00 //RX_TDDRC_SLANT_1 +275 0x3000 //RX_TDDRC_ALPHA_UP_0 +276 0x7FB0 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x0000 //RX_TDDRC_HMNC_GAIN +279 0x0000 //RX_TDDRC_SMT_FLAG +280 0x0000 //RX_TDDRC_SMT_W +281 0x0100 //RX_TDDRC_DRC_GAIN +195 0x0020 //RX_FDEQ_SUBNUM +196 0x4848 //RX_FDEQ_GAIN_0 +197 0x4848 //RX_FDEQ_GAIN_1 +198 0x4848 //RX_FDEQ_GAIN_2 +199 0x4848 //RX_FDEQ_GAIN_3 +200 0x4848 //RX_FDEQ_GAIN_4 +201 0x4848 //RX_FDEQ_GAIN_5 +202 0x4848 //RX_FDEQ_GAIN_6 +203 0x4848 //RX_FDEQ_GAIN_7 +204 0x4848 //RX_FDEQ_GAIN_8 +205 0x4848 //RX_FDEQ_GAIN_9 +206 0x4848 //RX_FDEQ_GAIN_10 +207 0x4848 //RX_FDEQ_GAIN_11 +208 0x4848 //RX_FDEQ_GAIN_12 +209 0x4848 //RX_FDEQ_GAIN_13 +210 0x4848 //RX_FDEQ_GAIN_14 +211 0x4848 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0000 //RX_FDEQ_BIN_0 +221 0x0000 //RX_FDEQ_BIN_1 +222 0x0000 //RX_FDEQ_BIN_2 +223 0x0000 //RX_FDEQ_BIN_3 +224 0x0000 //RX_FDEQ_BIN_4 +225 0x0000 //RX_FDEQ_BIN_5 +226 0x0000 //RX_FDEQ_BIN_6 +227 0x0000 //RX_FDEQ_BIN_7 +228 0x0000 //RX_FDEQ_BIN_8 +229 0x0000 //RX_FDEQ_BIN_9 +230 0x0000 //RX_FDEQ_BIN_10 +231 0x0000 //RX_FDEQ_BIN_11 +232 0x0000 //RX_FDEQ_BIN_12 +233 0x0000 //RX_FDEQ_BIN_13 +234 0x0000 //RX_FDEQ_BIN_14 +235 0x0000 //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x0000 //RX_FDEQ_RESRV_0 +245 0x0000 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0030 //RX_FDDRC_BAND_MARGIN_1 +248 0x0050 //RX_FDDRC_BAND_MARGIN_2 +249 0x0080 //RX_FDDRC_BAND_MARGIN_3 +250 0x0004 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x5000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x6400 //RX_FDDRC_THRD_3_2 +258 0x6400 //RX_FDDRC_THRD_3_3 +259 0x2000 //RX_FDDRC_SLANT_0_0 +260 0x2000 //RX_FDDRC_SLANT_0_1 +261 0x2000 //RX_FDDRC_SLANT_0_2 +262 0x2000 //RX_FDDRC_SLANT_0_3 +263 0x2000 //RX_FDDRC_SLANT_1_0 +264 0x2000 //RX_FDDRC_SLANT_1_1 +265 0x2000 //RX_FDDRC_SLANT_1_2 +266 0x2000 //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +286 0x0100 //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 +#VOL 4 +163 0x3000 //RX_TDDRC_ALPHA_UP_1 +164 0x3000 //RX_TDDRC_ALPHA_UP_2 +165 0x3000 //RX_TDDRC_ALPHA_UP_3 +166 0x3000 //RX_TDDRC_ALPHA_UP_4 +184 0x7FB0 //RX_TDDRC_ALPHA_DWN_1 +185 0x7FB0 //RX_TDDRC_ALPHA_DWN_2 +186 0x7FB0 //RX_TDDRC_ALPHA_DWN_3 +189 0x7FB0 //RX_TDDRC_ALPHA_DWN_4 +190 0xDA9E //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +269 0x0000 //RX_TDDRC_THRD_0 +270 0x0000 //RX_TDDRC_THRD_1 +271 0x0E80 //RX_TDDRC_THRD_2 +272 0x3800 //RX_TDDRC_THRD_3 +273 0x2A00 //RX_TDDRC_SLANT_0 +274 0x6E00 //RX_TDDRC_SLANT_1 +275 0x3000 //RX_TDDRC_ALPHA_UP_0 +276 0x7FB0 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x0000 //RX_TDDRC_HMNC_GAIN +279 0x0000 //RX_TDDRC_SMT_FLAG +280 0x0000 //RX_TDDRC_SMT_W +281 0x0100 //RX_TDDRC_DRC_GAIN +195 0x0020 //RX_FDEQ_SUBNUM +196 0x4848 //RX_FDEQ_GAIN_0 +197 0x4848 //RX_FDEQ_GAIN_1 +198 0x4848 //RX_FDEQ_GAIN_2 +199 0x4848 //RX_FDEQ_GAIN_3 +200 0x4848 //RX_FDEQ_GAIN_4 +201 0x4848 //RX_FDEQ_GAIN_5 +202 0x4848 //RX_FDEQ_GAIN_6 +203 0x4848 //RX_FDEQ_GAIN_7 +204 0x4848 //RX_FDEQ_GAIN_8 +205 0x4848 //RX_FDEQ_GAIN_9 +206 0x4848 //RX_FDEQ_GAIN_10 +207 0x4848 //RX_FDEQ_GAIN_11 +208 0x4848 //RX_FDEQ_GAIN_12 +209 0x4848 //RX_FDEQ_GAIN_13 +210 0x4848 //RX_FDEQ_GAIN_14 +211 0x4848 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0000 //RX_FDEQ_BIN_0 +221 0x0000 //RX_FDEQ_BIN_1 +222 0x0000 //RX_FDEQ_BIN_2 +223 0x0000 //RX_FDEQ_BIN_3 +224 0x0000 //RX_FDEQ_BIN_4 +225 0x0000 //RX_FDEQ_BIN_5 +226 0x0000 //RX_FDEQ_BIN_6 +227 0x0000 //RX_FDEQ_BIN_7 +228 0x0000 //RX_FDEQ_BIN_8 +229 0x0000 //RX_FDEQ_BIN_9 +230 0x0000 //RX_FDEQ_BIN_10 +231 0x0000 //RX_FDEQ_BIN_11 +232 0x0000 //RX_FDEQ_BIN_12 +233 0x0000 //RX_FDEQ_BIN_13 +234 0x0000 //RX_FDEQ_BIN_14 +235 0x0000 //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x0000 //RX_FDEQ_RESRV_0 +245 0x0000 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0030 //RX_FDDRC_BAND_MARGIN_1 +248 0x0050 //RX_FDDRC_BAND_MARGIN_2 +249 0x0080 //RX_FDDRC_BAND_MARGIN_3 +250 0x0004 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x5000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x6400 //RX_FDDRC_THRD_3_2 +258 0x6400 //RX_FDDRC_THRD_3_3 +259 0x2000 //RX_FDDRC_SLANT_0_0 +260 0x2000 //RX_FDDRC_SLANT_0_1 +261 0x2000 //RX_FDDRC_SLANT_0_2 +262 0x2000 //RX_FDDRC_SLANT_0_3 +263 0x2000 //RX_FDDRC_SLANT_1_0 +264 0x2000 //RX_FDDRC_SLANT_1_1 +265 0x2000 //RX_FDDRC_SLANT_1_2 +266 0x2000 //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +286 0x0100 //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 +#VOL 5 +163 0x3000 //RX_TDDRC_ALPHA_UP_1 +164 0x3000 //RX_TDDRC_ALPHA_UP_2 +165 0x3000 //RX_TDDRC_ALPHA_UP_3 +166 0x3000 //RX_TDDRC_ALPHA_UP_4 +184 0x7FB0 //RX_TDDRC_ALPHA_DWN_1 +185 0x7FB0 //RX_TDDRC_ALPHA_DWN_2 +186 0x7FB0 //RX_TDDRC_ALPHA_DWN_3 +189 0x7FB0 //RX_TDDRC_ALPHA_DWN_4 +190 0xDA9E //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +269 0x0000 //RX_TDDRC_THRD_0 +270 0x0000 //RX_TDDRC_THRD_1 +271 0x0E80 //RX_TDDRC_THRD_2 +272 0x3800 //RX_TDDRC_THRD_3 +273 0x2A00 //RX_TDDRC_SLANT_0 +274 0x6E00 //RX_TDDRC_SLANT_1 +275 0x3000 //RX_TDDRC_ALPHA_UP_0 +276 0x7FB0 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x0000 //RX_TDDRC_HMNC_GAIN +279 0x0000 //RX_TDDRC_SMT_FLAG +280 0x0000 //RX_TDDRC_SMT_W +281 0x0100 //RX_TDDRC_DRC_GAIN +195 0x0020 //RX_FDEQ_SUBNUM +196 0x4848 //RX_FDEQ_GAIN_0 +197 0x4848 //RX_FDEQ_GAIN_1 +198 0x4848 //RX_FDEQ_GAIN_2 +199 0x4848 //RX_FDEQ_GAIN_3 +200 0x4848 //RX_FDEQ_GAIN_4 +201 0x4848 //RX_FDEQ_GAIN_5 +202 0x4848 //RX_FDEQ_GAIN_6 +203 0x4848 //RX_FDEQ_GAIN_7 +204 0x4848 //RX_FDEQ_GAIN_8 +205 0x4848 //RX_FDEQ_GAIN_9 +206 0x4848 //RX_FDEQ_GAIN_10 +207 0x4848 //RX_FDEQ_GAIN_11 +208 0x4848 //RX_FDEQ_GAIN_12 +209 0x4848 //RX_FDEQ_GAIN_13 +210 0x4848 //RX_FDEQ_GAIN_14 +211 0x4848 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0000 //RX_FDEQ_BIN_0 +221 0x0000 //RX_FDEQ_BIN_1 +222 0x0000 //RX_FDEQ_BIN_2 +223 0x0000 //RX_FDEQ_BIN_3 +224 0x0000 //RX_FDEQ_BIN_4 +225 0x0000 //RX_FDEQ_BIN_5 +226 0x0000 //RX_FDEQ_BIN_6 +227 0x0000 //RX_FDEQ_BIN_7 +228 0x0000 //RX_FDEQ_BIN_8 +229 0x0000 //RX_FDEQ_BIN_9 +230 0x0000 //RX_FDEQ_BIN_10 +231 0x0000 //RX_FDEQ_BIN_11 +232 0x0000 //RX_FDEQ_BIN_12 +233 0x0000 //RX_FDEQ_BIN_13 +234 0x0000 //RX_FDEQ_BIN_14 +235 0x0000 //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x0000 //RX_FDEQ_RESRV_0 +245 0x0000 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0030 //RX_FDDRC_BAND_MARGIN_1 +248 0x0050 //RX_FDDRC_BAND_MARGIN_2 +249 0x0080 //RX_FDDRC_BAND_MARGIN_3 +250 0x0004 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x5000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x6400 //RX_FDDRC_THRD_3_2 +258 0x6400 //RX_FDDRC_THRD_3_3 +259 0x2000 //RX_FDDRC_SLANT_0_0 +260 0x2000 //RX_FDDRC_SLANT_0_1 +261 0x2000 //RX_FDDRC_SLANT_0_2 +262 0x2000 //RX_FDDRC_SLANT_0_3 +263 0x2000 //RX_FDDRC_SLANT_1_0 +264 0x2000 //RX_FDDRC_SLANT_1_1 +265 0x2000 //RX_FDDRC_SLANT_1_2 +266 0x2000 //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +286 0x0100 //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 +#VOL 6 +163 0x3000 //RX_TDDRC_ALPHA_UP_1 +164 0x3000 //RX_TDDRC_ALPHA_UP_2 +165 0x3000 //RX_TDDRC_ALPHA_UP_3 +166 0x3000 //RX_TDDRC_ALPHA_UP_4 +184 0x7FB0 //RX_TDDRC_ALPHA_DWN_1 +185 0x7FB0 //RX_TDDRC_ALPHA_DWN_2 +186 0x7FB0 //RX_TDDRC_ALPHA_DWN_3 +189 0x7FB0 //RX_TDDRC_ALPHA_DWN_4 +190 0xDA9E //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +269 0x0000 //RX_TDDRC_THRD_0 +270 0x0000 //RX_TDDRC_THRD_1 +271 0x0E80 //RX_TDDRC_THRD_2 +272 0x3800 //RX_TDDRC_THRD_3 +273 0x2A00 //RX_TDDRC_SLANT_0 +274 0x6E00 //RX_TDDRC_SLANT_1 +275 0x3000 //RX_TDDRC_ALPHA_UP_0 +276 0x7FB0 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x0000 //RX_TDDRC_HMNC_GAIN +279 0x0000 //RX_TDDRC_SMT_FLAG +280 0x0000 //RX_TDDRC_SMT_W +281 0x0100 //RX_TDDRC_DRC_GAIN +195 0x0020 //RX_FDEQ_SUBNUM +196 0x4848 //RX_FDEQ_GAIN_0 +197 0x4848 //RX_FDEQ_GAIN_1 +198 0x4848 //RX_FDEQ_GAIN_2 +199 0x4848 //RX_FDEQ_GAIN_3 +200 0x4848 //RX_FDEQ_GAIN_4 +201 0x4848 //RX_FDEQ_GAIN_5 +202 0x4848 //RX_FDEQ_GAIN_6 +203 0x4848 //RX_FDEQ_GAIN_7 +204 0x4848 //RX_FDEQ_GAIN_8 +205 0x4848 //RX_FDEQ_GAIN_9 +206 0x4848 //RX_FDEQ_GAIN_10 +207 0x4848 //RX_FDEQ_GAIN_11 +208 0x4848 //RX_FDEQ_GAIN_12 +209 0x4848 //RX_FDEQ_GAIN_13 +210 0x4848 //RX_FDEQ_GAIN_14 +211 0x4848 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0000 //RX_FDEQ_BIN_0 +221 0x0000 //RX_FDEQ_BIN_1 +222 0x0000 //RX_FDEQ_BIN_2 +223 0x0000 //RX_FDEQ_BIN_3 +224 0x0000 //RX_FDEQ_BIN_4 +225 0x0000 //RX_FDEQ_BIN_5 +226 0x0000 //RX_FDEQ_BIN_6 +227 0x0000 //RX_FDEQ_BIN_7 +228 0x0000 //RX_FDEQ_BIN_8 +229 0x0000 //RX_FDEQ_BIN_9 +230 0x0000 //RX_FDEQ_BIN_10 +231 0x0000 //RX_FDEQ_BIN_11 +232 0x0000 //RX_FDEQ_BIN_12 +233 0x0000 //RX_FDEQ_BIN_13 +234 0x0000 //RX_FDEQ_BIN_14 +235 0x0000 //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x0000 //RX_FDEQ_RESRV_0 +245 0x0000 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0030 //RX_FDDRC_BAND_MARGIN_1 +248 0x0050 //RX_FDDRC_BAND_MARGIN_2 +249 0x0080 //RX_FDDRC_BAND_MARGIN_3 +250 0x0004 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x5000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x6400 //RX_FDDRC_THRD_3_2 +258 0x6400 //RX_FDDRC_THRD_3_3 +259 0x2000 //RX_FDDRC_SLANT_0_0 +260 0x2000 //RX_FDDRC_SLANT_0_1 +261 0x2000 //RX_FDDRC_SLANT_0_2 +262 0x2000 //RX_FDDRC_SLANT_0_3 +263 0x2000 //RX_FDDRC_SLANT_1_0 +264 0x2000 //RX_FDDRC_SLANT_1_1 +265 0x2000 //RX_FDDRC_SLANT_1_2 +266 0x2000 //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +286 0x0100 //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 #CASE_NAME HEADSET-TTY_FULL-VOICE_GENERIC-FB -#PARAM_MODE FULL -#PARAM_TYPE TX+RX -#TOTAL_CUSTOM_STEP 7 +#PARAM_MODE Full +#PARAM_TYPE TX+2RX +#TOTAL_CUSTOM_STEP 7+7 #TX 0 0x0001 //TX_OPERATION_MODE_0 1 0x0000 //TX_OPERATION_MODE_1 @@ -54624,7 +83020,7 @@ 239 0x0000 //TX_DT_RESRV_7 240 0x0000 //TX_DT_RESRV_8 241 0x0000 //TX_DT_RESRV_9 -242 0xF200 //TX_THR_SN_EST_0 +242 0xF700 //TX_THR_SN_EST_0 243 0xF400 //TX_THR_SN_EST_1 244 0xF800 //TX_THR_SN_EST_2 245 0xF600 //TX_THR_SN_EST_3 @@ -54633,12 +83029,12 @@ 248 0xF800 //TX_THR_SN_EST_6 249 0xF800 //TX_THR_SN_EST_7 250 0x0100 //TX_DELTA_THR_SN_EST_0 -251 0x0000 //TX_DELTA_THR_SN_EST_1 +251 0x0100 //TX_DELTA_THR_SN_EST_1 252 0x0100 //TX_DELTA_THR_SN_EST_2 -253 0x0100 //TX_DELTA_THR_SN_EST_3 +253 0x0200 //TX_DELTA_THR_SN_EST_3 254 0x0200 //TX_DELTA_THR_SN_EST_4 255 0x0200 //TX_DELTA_THR_SN_EST_5 -256 0x0200 //TX_DELTA_THR_SN_EST_6 +256 0x0000 //TX_DELTA_THR_SN_EST_6 257 0x0200 //TX_DELTA_THR_SN_EST_7 258 0x4000 //TX_LAMBDA_NN_EST_0 259 0x4000 //TX_LAMBDA_NN_EST_1 @@ -54664,12 +83060,12 @@ 279 0x0000 //TX_B_POST_FLT_0 280 0x0000 //TX_B_POST_FLT_1 281 0x001A //TX_NS_LVL_CTRL_0 -282 0x001A //TX_NS_LVL_CTRL_1 +282 0x0014 //TX_NS_LVL_CTRL_1 283 0x0014 //TX_NS_LVL_CTRL_2 -284 0x0014 //TX_NS_LVL_CTRL_3 +284 0x000C //TX_NS_LVL_CTRL_3 285 0x000C //TX_NS_LVL_CTRL_4 286 0x000C //TX_NS_LVL_CTRL_5 -287 0x000C //TX_NS_LVL_CTRL_6 +287 0x001A //TX_NS_LVL_CTRL_6 288 0x000C //TX_NS_LVL_CTRL_7 289 0x000E //TX_MIN_GAIN_S_0 290 0x0014 //TX_MIN_GAIN_S_1 @@ -54685,10 +83081,10 @@ 300 0x7FFF //TX_SNRI_SUP_0 301 0x7FFF //TX_SNRI_SUP_1 302 0x7FFF //TX_SNRI_SUP_2 -303 0x7FFF //TX_SNRI_SUP_3 +303 0x4000 //TX_SNRI_SUP_3 304 0x4000 //TX_SNRI_SUP_4 305 0x4000 //TX_SNRI_SUP_5 -306 0x4000 //TX_SNRI_SUP_6 +306 0x7FFF //TX_SNRI_SUP_6 307 0x4000 //TX_SNRI_SUP_7 308 0x1200 //TX_THR_LFNS 309 0x0147 //TX_G_LFNS @@ -54697,12 +83093,12 @@ 312 0x7FFF //TX_A_POST_FILT_0 313 0x7FFF //TX_A_POST_FILT_1 314 0x4000 //TX_A_POST_FILT_S_0 -315 0x199A //TX_A_POST_FILT_S_1 +315 0x1000 //TX_A_POST_FILT_S_1 316 0x1000 //TX_A_POST_FILT_S_2 -317 0x1000 //TX_A_POST_FILT_S_3 +317 0x6666 //TX_A_POST_FILT_S_3 318 0x6666 //TX_A_POST_FILT_S_4 319 0x6666 //TX_A_POST_FILT_S_5 -320 0x6666 //TX_A_POST_FILT_S_6 +320 0x199A //TX_A_POST_FILT_S_6 321 0x6666 //TX_A_POST_FILT_S_7 322 0x2000 //TX_B_POST_FILT_0 323 0x2000 //TX_B_POST_FILT_1 @@ -54749,7 +83145,7 @@ 364 0x0000 //TX_K_APT 365 0x0001 //TX_NOISEDET 366 0x05A0 //TX_NDETCT -367 0x000A //TX_NOISE_TH_0 +367 0x04E8 //TX_NOISE_TH_0 368 0x1388 //TX_NOISE_TH_0_2 369 0x3A98 //TX_NOISE_TH_0_3 370 0x0C80 //TX_NOISE_TH_1 @@ -54761,11 +83157,11 @@ 376 0x7FFF //TX_NOISE_TH_5_3 377 0x7FFF //TX_NOISE_TH_5_4 378 0x00C8 //TX_NOISE_TH_6 -379 0x000A //TX_MINENOISE_TH -380 0x0000 //TX_MINENOISE_MIC0_TH_MTS -381 0x0000 //TX_MINENOISE_MIC0_TH_EXP -382 0x0000 //TX_MINENOISE_MIC0_S_TH_MTS -383 0x0000 //TX_MINENOISE_MIC0_S_TH_EXP +379 0x02BC //TX_MINENOISE_TH +380 0xD508 //TX_MORENS_TFMASK_TH +381 0x0001 //TX_DRC_QUIET_FLOOR +382 0x3A98 //TX_RATIODTL_CUT_TH +383 0x1482 //TX_DT_CUT_K1 384 0x6400 //TX_OUT_ENER_S_TH_CLEAN 385 0x6400 //TX_OUT_ENER_S_TH_LESSCLEAN 386 0x6400 //TX_OUT_ENER_S_TH_NOISY @@ -54773,22 +83169,22 @@ 388 0x7D00 //TX_OUT_ENER_TH_SPEECH 389 0x0000 //TX_SN_NPB_GAIN 390 0x0000 //TX_NN_NPB_GAIN -391 0x0000 //TX_CSX_ALPHA_0 -392 0x0000 //TX_CSX_ALPHA_1 -393 0x0000 //TX_CSX_ALPHA_2 -394 0x0000 //TX_CSX_ALPHA_3 -395 0x0000 //TX_MU_ARSP_EST -396 0x0000 //TX_P_OUTBEAM_MIN_TH +391 0x7FFF //TX_POST_MASK_SUP_HSNE +392 0x1388 //TX_TAIL_DET_TH +393 0x4000 //TX_B_LESSCUT_RTO_WTA +394 0x0000 //TX_MEL_G_R +395 0x0080 //TX_SUPHIGH_TH +396 0x0000 //TX_MASK_G_R 397 0x0000 //TX_EXTRA_NS_L -398 0x0000 //TX_EXTRA_NS_A -399 0x0000 //TX_VR_NOISE_FLOOR_TH +398 0x1800 //TX_C_POST_FLT_MASK +399 0x7FFF //TX_A_POST_FLT_WNS 400 0x0000 //TX_MIN_G_LOW300HZ 401 0x0010 //TX_MAXLEVEL_CNG 402 0x0000 //TX_STN_NOISE_TH 403 0x0000 //TX_POST_MASK_SUP 404 0x0000 //TX_POST_MASK_ADJUST 405 0x0014 //TX_NS_ENOISE_MIC0_TH -406 0x0014 //TX_MINENOISE_MIC0_TH +406 0x04E7 //TX_MINENOISE_MIC0_TH 407 0x0226 //TX_MINENOISE_MIC0_S_TH 408 0x2879 //TX_MIN_G_CTRL_SSNS 409 0x0400 //TX_METAL_RTO_THR @@ -54896,16 +83292,16 @@ 511 0x6666 //TX_MIC_TO_BFGAIN 512 0x6666 //TX_MICTOBFGAIN0 513 0x0014 //TX_FASTMUE_TH -514 0x0000 //TX_DERVB_LEN_0 -515 0x0000 //TX_DERVB_LEN_1 -516 0x0000 //TX_RHO_DERVB -517 0x0000 //TX_MIC_INDX_DERVB -518 0x0000 //TX_MU_DERVB -519 0x0000 //TX_DR_RESRV_0 -520 0x0000 //TX_DR_RESRV_1 -521 0x0000 //TX_DR_RESRV_2 -522 0x0000 //TX_DR_RESRV_3 -523 0x0000 //TX_DR_RESRV_4 +514 0xC000 //TX_DEREVERB_LF_MU +515 0xC000 //TX_DEREVERB_HF_MU +516 0xCCCC //TX_DEREVERB_DELAY +517 0xD999 //TX_DEREVERB_COEF_LEN +518 0x1F40 //TX_DEREVERB_DNR +519 0x0000 //TX_DEREVERB_ALPHA +520 0x0000 //TX_DEREVERB_BETA +521 0x0000 //TX_GSC_RTOL_TH +522 0x7000 //TX_GSC_RTOH_TH +523 0x0064 //TX_WIDE2_MEANHTH 524 0x0000 //TX_DR_RESRV_5 525 0x0000 //TX_DR_RESRV_6 526 0x0000 //TX_DR_RESRV_7 @@ -55271,16 +83667,81 @@ 886 0x0000 //TX_FASTNS_TFMASKBIN_TH2 887 0x0000 //TX_FASTNS_TFMASKBIN_TH3 888 0x00C8 //TX_FASTNS_ARSPC_TH -889 0xD99A //TX_FASTNS_MASK5_TH +889 0xC000 //TX_FASTNS_MASK5_TH 890 0x051F //TX_POSTSSA_MIN_G_VR_MASK -891 0x7FFF //TX_A_LESSCUT_RTO_MASK +891 0x7000 //TX_A_LESSCUT_RTO_MASK 892 0x1770 //TX_FASTNS_NOISETH 893 0xC000 //TX_FASTNS_SSA_THLFL 894 0xC000 //TX_FASTNS_SSA_THHFL 895 0xCCCC //TX_FASTNS_SSA_THLFH 896 0xD999 //TX_FASTNS_SSA_THHFH +897 0x2339 //TX_SENDFUNC_REG_MICMUTE +898 0x0021 //TX_SENDFUNC_REG_MICMUTE1 +899 0x02BC //TX_MICMUTE_RATIO_THR +900 0x0140 //TX_MICMUTE_AMP_THR +901 0x0004 //TX_MICMUTE_HPF_IND +902 0x00C0 //TX_MICMUTE_LOG_EYR_TH +903 0x0008 //TX_MICMUTE_CVG_TIME +904 0x0008 //TX_MICMUTE_RELEASE_TIME +905 0x01FE //TX_MIC_VOLUME_MIC0MUTE +906 0x0020 //TX_MICMUTE_EPD_OFFSET_0 +907 0x001E //TX_MICMUTE_FRQ_AEC_L +908 0x7999 //TX_MICMUTE_EAD_THR +909 0x7FFF //TX_MICMUTE_LAMBDA_CB_NLE +910 0x7FFF //TX_MICMUTE_LAMBDA_RE_EST +911 0x4000 //TX_DTD_THR1_MICMUTE_0 +912 0x7000 //TX_DTD_THR1_MICMUTE_1 +913 0x7FFF //TX_DTD_THR1_MICMUTE_2 +914 0x7FFF //TX_DTD_THR1_MICMUTE_3 +915 0x6CCC //TX_DTD_THR2_MICMUTE_0 +916 0x0400 //TX_MICMUTE_MIN_EQ_RE_EST_0 +917 0x0400 //TX_MICMUTE_MIN_EQ_RE_EST_1 +918 0x1000 //TX_MICMUTE_MIN_EQ_RE_EST_2 +919 0x7FFF //TX_MICMUTE_MIN_EQ_RE_EST_3 +920 0x7FFF //TX_MICMUTE_MIN_EQ_RE_EST_4 +921 0x4000 //TX_MICMUTE_C_POST_FLT +922 0x03E8 //TX_MICMUTE_DT_CUT_K +923 0x0001 //TX_MICMUTE_DT_CUT_THR +924 0x03E8 //TX_MICMUTE_DT_CUT_K2 +925 0x0001 //TX_MICMUTE_DT_CUT_THR2 +926 0x0064 //TX_MICMUTE_DT2_HOLD_N +927 0x1000 //TX_MICMUTE_RATIODTH_THCUT +928 0x1000 //TX_MICMUTE_B_POST_FLT_ECHOL +929 0x7FFF //TX_MICMUTE_B_POST_FLT_ECHOH +930 0x0400 //TX_MICMUTE_C_POST_FLT_MASK +931 0x7999 //TX_MICMUTE_RATIODTL_CUT_TH +932 0x0258 //TX_MICMUTE_DT_CUT_K1 +933 0x0800 //TX_MICMUTE_N2_SN_EST +934 0xFC00 //TX_MICMUTE_THR_SN_EST_0 +935 0x001C //TX_MICMUTE_MIN_G_CTRL_0 +936 0x6000 //TX_MICMUTE_A_POST_FILT_S_0 +937 0x7000 //TX_MICMUTE_B_POST_FILT_0 +938 0x2710 //TX_MIC1RUB_AMP_THR +939 0x0010 //TX_MIC1MUTE_RATIO_THR +940 0x0450 //TX_MIC1MUTE_AMP_THR +941 0x0008 //TX_MIC1MUTE_CVG_TIME +942 0x0008 //TX_MIC1MUTE_RELEASE_TIME +943 0x0000 //TX_AMS_RESRV_01 +944 0x0000 //TX_AMS_RESRV_02 +945 0x0000 //TX_AMS_RESRV_03 +946 0x0000 //TX_AMS_RESRV_04 +947 0x0000 //TX_AMS_RESRV_05 +948 0x0000 //TX_AMS_RESRV_06 +949 0x0000 //TX_AMS_RESRV_07 +950 0x0000 //TX_AMS_RESRV_08 +951 0x0000 //TX_AMS_RESRV_09 +952 0x0000 //TX_AMS_RESRV_10 +953 0x0000 //TX_AMS_RESRV_11 +954 0x0000 //TX_AMS_RESRV_12 +955 0x0000 //TX_AMS_RESRV_13 +956 0x0000 //TX_AMS_RESRV_14 +957 0x0000 //TX_AMS_RESRV_15 +958 0x0000 //TX_AMS_RESRV_16 +959 0x0000 //TX_AMS_RESRV_17 +960 0x0000 //TX_AMS_RESRV_18 +961 0x0000 //TX_AMS_RESRV_19 #RX -0 0x0040 //RX_RECVFUNC_MODE_0 +0 0x2040 //RX_RECVFUNC_MODE_0 1 0x0000 //RX_RECVFUNC_MODE_1 2 0x0000 //RX_SAMPLINGFREQ_SIG 3 0x0000 //RX_SAMPLINGFREQ_PROC @@ -56130,4 +84591,855 @@ 110 0x0000 //RX_FDDRC_RESRV_0 129 0x0100 //RX_SPK_VOL 130 0x0000 //RX_VOL_RESRV_0 +#RX 2 +157 0x2040 //RX_RECVFUNC_MODE_0 +158 0x0000 //RX_RECVFUNC_MODE_1 +159 0x0000 //RX_SAMPLINGFREQ_SIG +160 0x0000 //RX_SAMPLINGFREQ_PROC +161 0x000A //RX_FRAME_SZ +162 0x0000 //RX_DELAY_OPT +163 0x3000 //RX_TDDRC_ALPHA_UP_1 +164 0x3000 //RX_TDDRC_ALPHA_UP_2 +165 0x3000 //RX_TDDRC_ALPHA_UP_3 +166 0x3000 //RX_TDDRC_ALPHA_UP_4 +167 0x050D //RX_PGA +168 0x7652 //RX_A_HP +169 0x4000 //RX_B_PE +170 0x7800 //RX_THR_PITCH_DET_0 +171 0x7000 //RX_THR_PITCH_DET_1 +172 0x6000 //RX_THR_PITCH_DET_2 +173 0x0000 //RX_PITCH_BFR_LEN +174 0x0000 //RX_SBD_PITCH_DET +175 0x0000 //RX_PP_RESRV_0 +176 0x0000 //RX_PP_RESRV_1 +177 0xF800 //RX_N_SN_EST +178 0x0000 //RX_N2_SN_EST +179 0x000F //RX_NS_LVL_CTRL +180 0xF800 //RX_THR_SN_EST +181 0x7E00 //RX_LAMBDA_PFILT +182 0x000A //RX_FENS_RESRV_0 +183 0x0000 //RX_FENS_RESRV_1 +184 0x7FB0 //RX_TDDRC_ALPHA_DWN_1 +185 0x7FB0 //RX_TDDRC_ALPHA_DWN_2 +186 0x7FB0 //RX_TDDRC_ALPHA_DWN_3 +187 0x0000 //RX_EXTRA_NS_L +188 0x0000 //RX_EXTRA_NS_A +189 0x7FB0 //RX_TDDRC_ALPHA_DWN_4 +190 0xDA9E //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +192 0x0000 //RX_A_POST_FLT +193 0x0000 //RX_LMT_THRD +194 0x4000 //RX_LMT_ALPHA +195 0x0020 //RX_FDEQ_SUBNUM +196 0x4848 //RX_FDEQ_GAIN_0 +197 0x4848 //RX_FDEQ_GAIN_1 +198 0x4848 //RX_FDEQ_GAIN_2 +199 0x4848 //RX_FDEQ_GAIN_3 +200 0x4848 //RX_FDEQ_GAIN_4 +201 0x4848 //RX_FDEQ_GAIN_5 +202 0x4848 //RX_FDEQ_GAIN_6 +203 0x4848 //RX_FDEQ_GAIN_7 +204 0x4848 //RX_FDEQ_GAIN_8 +205 0x4848 //RX_FDEQ_GAIN_9 +206 0x4848 //RX_FDEQ_GAIN_10 +207 0x4848 //RX_FDEQ_GAIN_11 +208 0x4848 //RX_FDEQ_GAIN_12 +209 0x4848 //RX_FDEQ_GAIN_13 +210 0x4848 //RX_FDEQ_GAIN_14 +211 0x4848 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0000 //RX_FDEQ_BIN_0 +221 0x0000 //RX_FDEQ_BIN_1 +222 0x0000 //RX_FDEQ_BIN_2 +223 0x0000 //RX_FDEQ_BIN_3 +224 0x0000 //RX_FDEQ_BIN_4 +225 0x0000 //RX_FDEQ_BIN_5 +226 0x0000 //RX_FDEQ_BIN_6 +227 0x0000 //RX_FDEQ_BIN_7 +228 0x0000 //RX_FDEQ_BIN_8 +229 0x0000 //RX_FDEQ_BIN_9 +230 0x0000 //RX_FDEQ_BIN_10 +231 0x0000 //RX_FDEQ_BIN_11 +232 0x0000 //RX_FDEQ_BIN_12 +233 0x0000 //RX_FDEQ_BIN_13 +234 0x0000 //RX_FDEQ_BIN_14 +235 0x0000 //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x0000 //RX_FDEQ_RESRV_0 +245 0x0000 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0030 //RX_FDDRC_BAND_MARGIN_1 +248 0x0050 //RX_FDDRC_BAND_MARGIN_2 +249 0x0080 //RX_FDDRC_BAND_MARGIN_3 +250 0x0004 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x5000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x6400 //RX_FDDRC_THRD_3_2 +258 0x6400 //RX_FDDRC_THRD_3_3 +259 0x2000 //RX_FDDRC_SLANT_0_0 +260 0x2000 //RX_FDDRC_SLANT_0_1 +261 0x2000 //RX_FDDRC_SLANT_0_2 +262 0x2000 //RX_FDDRC_SLANT_0_3 +263 0x2000 //RX_FDDRC_SLANT_1_0 +264 0x2000 //RX_FDDRC_SLANT_1_1 +265 0x2000 //RX_FDDRC_SLANT_1_2 +266 0x2000 //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +268 0x0003 //RX_FILTINDX +269 0x0000 //RX_TDDRC_THRD_0 +270 0x0000 //RX_TDDRC_THRD_1 +271 0x0E80 //RX_TDDRC_THRD_2 +272 0x3800 //RX_TDDRC_THRD_3 +273 0x2A00 //RX_TDDRC_SLANT_0 +274 0x6E00 //RX_TDDRC_SLANT_1 +275 0x3000 //RX_TDDRC_ALPHA_UP_0 +276 0x7FB0 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x0000 //RX_TDDRC_HMNC_GAIN +279 0x0000 //RX_TDDRC_SMT_FLAG +280 0x0000 //RX_TDDRC_SMT_W +281 0x0100 //RX_TDDRC_DRC_GAIN +282 0x7C00 //RX_LAMBDA_PKA_FP +283 0x2000 //RX_TPKA_FP +284 0x0080 //RX_MIN_G_FP +285 0x2000 //RX_MAX_G_FP +286 0x0100 //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 +288 0x0010 //RX_MAXLEVEL_CNG +289 0x0000 //RX_BWE_UV_TH +290 0x0000 //RX_BWE_UV_TH2 +291 0x0000 //RX_BWE_UV_TH3 +292 0x0000 //RX_BWE_V_TH +293 0x0000 //RX_BWE_GAIN1_V_TH1 +294 0x0000 //RX_BWE_GAIN1_V_TH2 +295 0x0000 //RX_BWE_UV_EQ +296 0x0000 //RX_BWE_V_EQ +297 0x0000 //RX_BWE_TONE_TH +298 0x0000 //RX_BWE_UV_HOLD_T +299 0x0000 //RX_BWE_GAIN2_ALPHA +300 0x0000 //RX_BWE_GAIN3_ALPHA +301 0x0000 //RX_BWE_CUTOFF +302 0x0000 //RX_BWE_GAINFILL +303 0x0000 //RX_BWE_MAXTH_TONE +304 0x0000 //RX_BWE_EQ_0 +305 0x0000 //RX_BWE_EQ_1 +306 0x0000 //RX_BWE_EQ_2 +307 0x0000 //RX_BWE_EQ_3 +308 0x0000 //RX_BWE_EQ_4 +309 0x0000 //RX_BWE_EQ_5 +310 0x0000 //RX_BWE_EQ_6 +311 0x0000 //RX_BWE_RESRV_0 +312 0x0000 //RX_BWE_RESRV_1 +313 0x0000 //RX_BWE_RESRV_2 +#VOL 0 +163 0x3000 //RX_TDDRC_ALPHA_UP_1 +164 0x3000 //RX_TDDRC_ALPHA_UP_2 +165 0x3000 //RX_TDDRC_ALPHA_UP_3 +166 0x3000 //RX_TDDRC_ALPHA_UP_4 +184 0x7FB0 //RX_TDDRC_ALPHA_DWN_1 +185 0x7FB0 //RX_TDDRC_ALPHA_DWN_2 +186 0x7FB0 //RX_TDDRC_ALPHA_DWN_3 +189 0x7FB0 //RX_TDDRC_ALPHA_DWN_4 +190 0xDA9E //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +269 0x0000 //RX_TDDRC_THRD_0 +270 0x0000 //RX_TDDRC_THRD_1 +271 0x0E80 //RX_TDDRC_THRD_2 +272 0x3800 //RX_TDDRC_THRD_3 +273 0x2A00 //RX_TDDRC_SLANT_0 +274 0x6E00 //RX_TDDRC_SLANT_1 +275 0x3000 //RX_TDDRC_ALPHA_UP_0 +276 0x7FB0 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x0000 //RX_TDDRC_HMNC_GAIN +279 0x0000 //RX_TDDRC_SMT_FLAG +280 0x0000 //RX_TDDRC_SMT_W +281 0x0100 //RX_TDDRC_DRC_GAIN +195 0x0020 //RX_FDEQ_SUBNUM +196 0x4848 //RX_FDEQ_GAIN_0 +197 0x4848 //RX_FDEQ_GAIN_1 +198 0x4848 //RX_FDEQ_GAIN_2 +199 0x4848 //RX_FDEQ_GAIN_3 +200 0x4848 //RX_FDEQ_GAIN_4 +201 0x4848 //RX_FDEQ_GAIN_5 +202 0x4848 //RX_FDEQ_GAIN_6 +203 0x4848 //RX_FDEQ_GAIN_7 +204 0x4848 //RX_FDEQ_GAIN_8 +205 0x4848 //RX_FDEQ_GAIN_9 +206 0x4848 //RX_FDEQ_GAIN_10 +207 0x4848 //RX_FDEQ_GAIN_11 +208 0x4848 //RX_FDEQ_GAIN_12 +209 0x4848 //RX_FDEQ_GAIN_13 +210 0x4848 //RX_FDEQ_GAIN_14 +211 0x4848 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0000 //RX_FDEQ_BIN_0 +221 0x0000 //RX_FDEQ_BIN_1 +222 0x0000 //RX_FDEQ_BIN_2 +223 0x0000 //RX_FDEQ_BIN_3 +224 0x0000 //RX_FDEQ_BIN_4 +225 0x0000 //RX_FDEQ_BIN_5 +226 0x0000 //RX_FDEQ_BIN_6 +227 0x0000 //RX_FDEQ_BIN_7 +228 0x0000 //RX_FDEQ_BIN_8 +229 0x0000 //RX_FDEQ_BIN_9 +230 0x0000 //RX_FDEQ_BIN_10 +231 0x0000 //RX_FDEQ_BIN_11 +232 0x0000 //RX_FDEQ_BIN_12 +233 0x0000 //RX_FDEQ_BIN_13 +234 0x0000 //RX_FDEQ_BIN_14 +235 0x0000 //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x0000 //RX_FDEQ_RESRV_0 +245 0x0000 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0030 //RX_FDDRC_BAND_MARGIN_1 +248 0x0050 //RX_FDDRC_BAND_MARGIN_2 +249 0x0080 //RX_FDDRC_BAND_MARGIN_3 +250 0x0004 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x5000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x6400 //RX_FDDRC_THRD_3_2 +258 0x6400 //RX_FDDRC_THRD_3_3 +259 0x2000 //RX_FDDRC_SLANT_0_0 +260 0x2000 //RX_FDDRC_SLANT_0_1 +261 0x2000 //RX_FDDRC_SLANT_0_2 +262 0x2000 //RX_FDDRC_SLANT_0_3 +263 0x2000 //RX_FDDRC_SLANT_1_0 +264 0x2000 //RX_FDDRC_SLANT_1_1 +265 0x2000 //RX_FDDRC_SLANT_1_2 +266 0x2000 //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +286 0x0100 //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 +#VOL 1 +163 0x3000 //RX_TDDRC_ALPHA_UP_1 +164 0x3000 //RX_TDDRC_ALPHA_UP_2 +165 0x3000 //RX_TDDRC_ALPHA_UP_3 +166 0x3000 //RX_TDDRC_ALPHA_UP_4 +184 0x7FB0 //RX_TDDRC_ALPHA_DWN_1 +185 0x7FB0 //RX_TDDRC_ALPHA_DWN_2 +186 0x7FB0 //RX_TDDRC_ALPHA_DWN_3 +189 0x7FB0 //RX_TDDRC_ALPHA_DWN_4 +190 0xDA9E //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +269 0x0000 //RX_TDDRC_THRD_0 +270 0x0000 //RX_TDDRC_THRD_1 +271 0x0E80 //RX_TDDRC_THRD_2 +272 0x3800 //RX_TDDRC_THRD_3 +273 0x2A00 //RX_TDDRC_SLANT_0 +274 0x6E00 //RX_TDDRC_SLANT_1 +275 0x3000 //RX_TDDRC_ALPHA_UP_0 +276 0x7FB0 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x0000 //RX_TDDRC_HMNC_GAIN +279 0x0000 //RX_TDDRC_SMT_FLAG +280 0x0000 //RX_TDDRC_SMT_W +281 0x0100 //RX_TDDRC_DRC_GAIN +195 0x0020 //RX_FDEQ_SUBNUM +196 0x4848 //RX_FDEQ_GAIN_0 +197 0x4848 //RX_FDEQ_GAIN_1 +198 0x4848 //RX_FDEQ_GAIN_2 +199 0x4848 //RX_FDEQ_GAIN_3 +200 0x4848 //RX_FDEQ_GAIN_4 +201 0x4848 //RX_FDEQ_GAIN_5 +202 0x4848 //RX_FDEQ_GAIN_6 +203 0x4848 //RX_FDEQ_GAIN_7 +204 0x4848 //RX_FDEQ_GAIN_8 +205 0x4848 //RX_FDEQ_GAIN_9 +206 0x4848 //RX_FDEQ_GAIN_10 +207 0x4848 //RX_FDEQ_GAIN_11 +208 0x4848 //RX_FDEQ_GAIN_12 +209 0x4848 //RX_FDEQ_GAIN_13 +210 0x4848 //RX_FDEQ_GAIN_14 +211 0x4848 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0000 //RX_FDEQ_BIN_0 +221 0x0000 //RX_FDEQ_BIN_1 +222 0x0000 //RX_FDEQ_BIN_2 +223 0x0000 //RX_FDEQ_BIN_3 +224 0x0000 //RX_FDEQ_BIN_4 +225 0x0000 //RX_FDEQ_BIN_5 +226 0x0000 //RX_FDEQ_BIN_6 +227 0x0000 //RX_FDEQ_BIN_7 +228 0x0000 //RX_FDEQ_BIN_8 +229 0x0000 //RX_FDEQ_BIN_9 +230 0x0000 //RX_FDEQ_BIN_10 +231 0x0000 //RX_FDEQ_BIN_11 +232 0x0000 //RX_FDEQ_BIN_12 +233 0x0000 //RX_FDEQ_BIN_13 +234 0x0000 //RX_FDEQ_BIN_14 +235 0x0000 //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x0000 //RX_FDEQ_RESRV_0 +245 0x0000 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0030 //RX_FDDRC_BAND_MARGIN_1 +248 0x0050 //RX_FDDRC_BAND_MARGIN_2 +249 0x0080 //RX_FDDRC_BAND_MARGIN_3 +250 0x0004 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x5000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x6400 //RX_FDDRC_THRD_3_2 +258 0x6400 //RX_FDDRC_THRD_3_3 +259 0x2000 //RX_FDDRC_SLANT_0_0 +260 0x2000 //RX_FDDRC_SLANT_0_1 +261 0x2000 //RX_FDDRC_SLANT_0_2 +262 0x2000 //RX_FDDRC_SLANT_0_3 +263 0x2000 //RX_FDDRC_SLANT_1_0 +264 0x2000 //RX_FDDRC_SLANT_1_1 +265 0x2000 //RX_FDDRC_SLANT_1_2 +266 0x2000 //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +286 0x0100 //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 +#VOL 2 +163 0x3000 //RX_TDDRC_ALPHA_UP_1 +164 0x3000 //RX_TDDRC_ALPHA_UP_2 +165 0x3000 //RX_TDDRC_ALPHA_UP_3 +166 0x3000 //RX_TDDRC_ALPHA_UP_4 +184 0x7FB0 //RX_TDDRC_ALPHA_DWN_1 +185 0x7FB0 //RX_TDDRC_ALPHA_DWN_2 +186 0x7FB0 //RX_TDDRC_ALPHA_DWN_3 +189 0x7FB0 //RX_TDDRC_ALPHA_DWN_4 +190 0xDA9E //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +269 0x0000 //RX_TDDRC_THRD_0 +270 0x0000 //RX_TDDRC_THRD_1 +271 0x0E80 //RX_TDDRC_THRD_2 +272 0x3800 //RX_TDDRC_THRD_3 +273 0x2A00 //RX_TDDRC_SLANT_0 +274 0x6E00 //RX_TDDRC_SLANT_1 +275 0x3000 //RX_TDDRC_ALPHA_UP_0 +276 0x7FB0 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x0000 //RX_TDDRC_HMNC_GAIN +279 0x0000 //RX_TDDRC_SMT_FLAG +280 0x0000 //RX_TDDRC_SMT_W +281 0x0100 //RX_TDDRC_DRC_GAIN +195 0x0020 //RX_FDEQ_SUBNUM +196 0x4848 //RX_FDEQ_GAIN_0 +197 0x4848 //RX_FDEQ_GAIN_1 +198 0x4848 //RX_FDEQ_GAIN_2 +199 0x4848 //RX_FDEQ_GAIN_3 +200 0x4848 //RX_FDEQ_GAIN_4 +201 0x4848 //RX_FDEQ_GAIN_5 +202 0x4848 //RX_FDEQ_GAIN_6 +203 0x4848 //RX_FDEQ_GAIN_7 +204 0x4848 //RX_FDEQ_GAIN_8 +205 0x4848 //RX_FDEQ_GAIN_9 +206 0x4848 //RX_FDEQ_GAIN_10 +207 0x4848 //RX_FDEQ_GAIN_11 +208 0x4848 //RX_FDEQ_GAIN_12 +209 0x4848 //RX_FDEQ_GAIN_13 +210 0x4848 //RX_FDEQ_GAIN_14 +211 0x4848 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0000 //RX_FDEQ_BIN_0 +221 0x0000 //RX_FDEQ_BIN_1 +222 0x0000 //RX_FDEQ_BIN_2 +223 0x0000 //RX_FDEQ_BIN_3 +224 0x0000 //RX_FDEQ_BIN_4 +225 0x0000 //RX_FDEQ_BIN_5 +226 0x0000 //RX_FDEQ_BIN_6 +227 0x0000 //RX_FDEQ_BIN_7 +228 0x0000 //RX_FDEQ_BIN_8 +229 0x0000 //RX_FDEQ_BIN_9 +230 0x0000 //RX_FDEQ_BIN_10 +231 0x0000 //RX_FDEQ_BIN_11 +232 0x0000 //RX_FDEQ_BIN_12 +233 0x0000 //RX_FDEQ_BIN_13 +234 0x0000 //RX_FDEQ_BIN_14 +235 0x0000 //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x0000 //RX_FDEQ_RESRV_0 +245 0x0000 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0030 //RX_FDDRC_BAND_MARGIN_1 +248 0x0050 //RX_FDDRC_BAND_MARGIN_2 +249 0x0080 //RX_FDDRC_BAND_MARGIN_3 +250 0x0004 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x5000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x6400 //RX_FDDRC_THRD_3_2 +258 0x6400 //RX_FDDRC_THRD_3_3 +259 0x2000 //RX_FDDRC_SLANT_0_0 +260 0x2000 //RX_FDDRC_SLANT_0_1 +261 0x2000 //RX_FDDRC_SLANT_0_2 +262 0x2000 //RX_FDDRC_SLANT_0_3 +263 0x2000 //RX_FDDRC_SLANT_1_0 +264 0x2000 //RX_FDDRC_SLANT_1_1 +265 0x2000 //RX_FDDRC_SLANT_1_2 +266 0x2000 //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +286 0x0100 //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 +#VOL 3 +163 0x3000 //RX_TDDRC_ALPHA_UP_1 +164 0x3000 //RX_TDDRC_ALPHA_UP_2 +165 0x3000 //RX_TDDRC_ALPHA_UP_3 +166 0x3000 //RX_TDDRC_ALPHA_UP_4 +184 0x7FB0 //RX_TDDRC_ALPHA_DWN_1 +185 0x7FB0 //RX_TDDRC_ALPHA_DWN_2 +186 0x7FB0 //RX_TDDRC_ALPHA_DWN_3 +189 0x7FB0 //RX_TDDRC_ALPHA_DWN_4 +190 0xDA9E //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +269 0x0000 //RX_TDDRC_THRD_0 +270 0x0000 //RX_TDDRC_THRD_1 +271 0x0E80 //RX_TDDRC_THRD_2 +272 0x3800 //RX_TDDRC_THRD_3 +273 0x2A00 //RX_TDDRC_SLANT_0 +274 0x6E00 //RX_TDDRC_SLANT_1 +275 0x3000 //RX_TDDRC_ALPHA_UP_0 +276 0x7FB0 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x0000 //RX_TDDRC_HMNC_GAIN +279 0x0000 //RX_TDDRC_SMT_FLAG +280 0x0000 //RX_TDDRC_SMT_W +281 0x0100 //RX_TDDRC_DRC_GAIN +195 0x0020 //RX_FDEQ_SUBNUM +196 0x4848 //RX_FDEQ_GAIN_0 +197 0x4848 //RX_FDEQ_GAIN_1 +198 0x4848 //RX_FDEQ_GAIN_2 +199 0x4848 //RX_FDEQ_GAIN_3 +200 0x4848 //RX_FDEQ_GAIN_4 +201 0x4848 //RX_FDEQ_GAIN_5 +202 0x4848 //RX_FDEQ_GAIN_6 +203 0x4848 //RX_FDEQ_GAIN_7 +204 0x4848 //RX_FDEQ_GAIN_8 +205 0x4848 //RX_FDEQ_GAIN_9 +206 0x4848 //RX_FDEQ_GAIN_10 +207 0x4848 //RX_FDEQ_GAIN_11 +208 0x4848 //RX_FDEQ_GAIN_12 +209 0x4848 //RX_FDEQ_GAIN_13 +210 0x4848 //RX_FDEQ_GAIN_14 +211 0x4848 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0000 //RX_FDEQ_BIN_0 +221 0x0000 //RX_FDEQ_BIN_1 +222 0x0000 //RX_FDEQ_BIN_2 +223 0x0000 //RX_FDEQ_BIN_3 +224 0x0000 //RX_FDEQ_BIN_4 +225 0x0000 //RX_FDEQ_BIN_5 +226 0x0000 //RX_FDEQ_BIN_6 +227 0x0000 //RX_FDEQ_BIN_7 +228 0x0000 //RX_FDEQ_BIN_8 +229 0x0000 //RX_FDEQ_BIN_9 +230 0x0000 //RX_FDEQ_BIN_10 +231 0x0000 //RX_FDEQ_BIN_11 +232 0x0000 //RX_FDEQ_BIN_12 +233 0x0000 //RX_FDEQ_BIN_13 +234 0x0000 //RX_FDEQ_BIN_14 +235 0x0000 //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x0000 //RX_FDEQ_RESRV_0 +245 0x0000 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0030 //RX_FDDRC_BAND_MARGIN_1 +248 0x0050 //RX_FDDRC_BAND_MARGIN_2 +249 0x0080 //RX_FDDRC_BAND_MARGIN_3 +250 0x0004 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x5000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x6400 //RX_FDDRC_THRD_3_2 +258 0x6400 //RX_FDDRC_THRD_3_3 +259 0x2000 //RX_FDDRC_SLANT_0_0 +260 0x2000 //RX_FDDRC_SLANT_0_1 +261 0x2000 //RX_FDDRC_SLANT_0_2 +262 0x2000 //RX_FDDRC_SLANT_0_3 +263 0x2000 //RX_FDDRC_SLANT_1_0 +264 0x2000 //RX_FDDRC_SLANT_1_1 +265 0x2000 //RX_FDDRC_SLANT_1_2 +266 0x2000 //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +286 0x0100 //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 +#VOL 4 +163 0x3000 //RX_TDDRC_ALPHA_UP_1 +164 0x3000 //RX_TDDRC_ALPHA_UP_2 +165 0x3000 //RX_TDDRC_ALPHA_UP_3 +166 0x3000 //RX_TDDRC_ALPHA_UP_4 +184 0x7FB0 //RX_TDDRC_ALPHA_DWN_1 +185 0x7FB0 //RX_TDDRC_ALPHA_DWN_2 +186 0x7FB0 //RX_TDDRC_ALPHA_DWN_3 +189 0x7FB0 //RX_TDDRC_ALPHA_DWN_4 +190 0xDA9E //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +269 0x0000 //RX_TDDRC_THRD_0 +270 0x0000 //RX_TDDRC_THRD_1 +271 0x0E80 //RX_TDDRC_THRD_2 +272 0x3800 //RX_TDDRC_THRD_3 +273 0x2A00 //RX_TDDRC_SLANT_0 +274 0x6E00 //RX_TDDRC_SLANT_1 +275 0x3000 //RX_TDDRC_ALPHA_UP_0 +276 0x7FB0 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x0000 //RX_TDDRC_HMNC_GAIN +279 0x0000 //RX_TDDRC_SMT_FLAG +280 0x0000 //RX_TDDRC_SMT_W +281 0x0100 //RX_TDDRC_DRC_GAIN +195 0x0020 //RX_FDEQ_SUBNUM +196 0x4848 //RX_FDEQ_GAIN_0 +197 0x4848 //RX_FDEQ_GAIN_1 +198 0x4848 //RX_FDEQ_GAIN_2 +199 0x4848 //RX_FDEQ_GAIN_3 +200 0x4848 //RX_FDEQ_GAIN_4 +201 0x4848 //RX_FDEQ_GAIN_5 +202 0x4848 //RX_FDEQ_GAIN_6 +203 0x4848 //RX_FDEQ_GAIN_7 +204 0x4848 //RX_FDEQ_GAIN_8 +205 0x4848 //RX_FDEQ_GAIN_9 +206 0x4848 //RX_FDEQ_GAIN_10 +207 0x4848 //RX_FDEQ_GAIN_11 +208 0x4848 //RX_FDEQ_GAIN_12 +209 0x4848 //RX_FDEQ_GAIN_13 +210 0x4848 //RX_FDEQ_GAIN_14 +211 0x4848 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0000 //RX_FDEQ_BIN_0 +221 0x0000 //RX_FDEQ_BIN_1 +222 0x0000 //RX_FDEQ_BIN_2 +223 0x0000 //RX_FDEQ_BIN_3 +224 0x0000 //RX_FDEQ_BIN_4 +225 0x0000 //RX_FDEQ_BIN_5 +226 0x0000 //RX_FDEQ_BIN_6 +227 0x0000 //RX_FDEQ_BIN_7 +228 0x0000 //RX_FDEQ_BIN_8 +229 0x0000 //RX_FDEQ_BIN_9 +230 0x0000 //RX_FDEQ_BIN_10 +231 0x0000 //RX_FDEQ_BIN_11 +232 0x0000 //RX_FDEQ_BIN_12 +233 0x0000 //RX_FDEQ_BIN_13 +234 0x0000 //RX_FDEQ_BIN_14 +235 0x0000 //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x0000 //RX_FDEQ_RESRV_0 +245 0x0000 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0030 //RX_FDDRC_BAND_MARGIN_1 +248 0x0050 //RX_FDDRC_BAND_MARGIN_2 +249 0x0080 //RX_FDDRC_BAND_MARGIN_3 +250 0x0004 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x5000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x6400 //RX_FDDRC_THRD_3_2 +258 0x6400 //RX_FDDRC_THRD_3_3 +259 0x2000 //RX_FDDRC_SLANT_0_0 +260 0x2000 //RX_FDDRC_SLANT_0_1 +261 0x2000 //RX_FDDRC_SLANT_0_2 +262 0x2000 //RX_FDDRC_SLANT_0_3 +263 0x2000 //RX_FDDRC_SLANT_1_0 +264 0x2000 //RX_FDDRC_SLANT_1_1 +265 0x2000 //RX_FDDRC_SLANT_1_2 +266 0x2000 //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +286 0x0100 //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 +#VOL 5 +163 0x3000 //RX_TDDRC_ALPHA_UP_1 +164 0x3000 //RX_TDDRC_ALPHA_UP_2 +165 0x3000 //RX_TDDRC_ALPHA_UP_3 +166 0x3000 //RX_TDDRC_ALPHA_UP_4 +184 0x7FB0 //RX_TDDRC_ALPHA_DWN_1 +185 0x7FB0 //RX_TDDRC_ALPHA_DWN_2 +186 0x7FB0 //RX_TDDRC_ALPHA_DWN_3 +189 0x7FB0 //RX_TDDRC_ALPHA_DWN_4 +190 0xDA9E //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +269 0x0000 //RX_TDDRC_THRD_0 +270 0x0000 //RX_TDDRC_THRD_1 +271 0x0E80 //RX_TDDRC_THRD_2 +272 0x3800 //RX_TDDRC_THRD_3 +273 0x2A00 //RX_TDDRC_SLANT_0 +274 0x6E00 //RX_TDDRC_SLANT_1 +275 0x3000 //RX_TDDRC_ALPHA_UP_0 +276 0x7FB0 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x0000 //RX_TDDRC_HMNC_GAIN +279 0x0000 //RX_TDDRC_SMT_FLAG +280 0x0000 //RX_TDDRC_SMT_W +281 0x0100 //RX_TDDRC_DRC_GAIN +195 0x0020 //RX_FDEQ_SUBNUM +196 0x4848 //RX_FDEQ_GAIN_0 +197 0x4848 //RX_FDEQ_GAIN_1 +198 0x4848 //RX_FDEQ_GAIN_2 +199 0x4848 //RX_FDEQ_GAIN_3 +200 0x4848 //RX_FDEQ_GAIN_4 +201 0x4848 //RX_FDEQ_GAIN_5 +202 0x4848 //RX_FDEQ_GAIN_6 +203 0x4848 //RX_FDEQ_GAIN_7 +204 0x4848 //RX_FDEQ_GAIN_8 +205 0x4848 //RX_FDEQ_GAIN_9 +206 0x4848 //RX_FDEQ_GAIN_10 +207 0x4848 //RX_FDEQ_GAIN_11 +208 0x4848 //RX_FDEQ_GAIN_12 +209 0x4848 //RX_FDEQ_GAIN_13 +210 0x4848 //RX_FDEQ_GAIN_14 +211 0x4848 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0000 //RX_FDEQ_BIN_0 +221 0x0000 //RX_FDEQ_BIN_1 +222 0x0000 //RX_FDEQ_BIN_2 +223 0x0000 //RX_FDEQ_BIN_3 +224 0x0000 //RX_FDEQ_BIN_4 +225 0x0000 //RX_FDEQ_BIN_5 +226 0x0000 //RX_FDEQ_BIN_6 +227 0x0000 //RX_FDEQ_BIN_7 +228 0x0000 //RX_FDEQ_BIN_8 +229 0x0000 //RX_FDEQ_BIN_9 +230 0x0000 //RX_FDEQ_BIN_10 +231 0x0000 //RX_FDEQ_BIN_11 +232 0x0000 //RX_FDEQ_BIN_12 +233 0x0000 //RX_FDEQ_BIN_13 +234 0x0000 //RX_FDEQ_BIN_14 +235 0x0000 //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x0000 //RX_FDEQ_RESRV_0 +245 0x0000 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0030 //RX_FDDRC_BAND_MARGIN_1 +248 0x0050 //RX_FDDRC_BAND_MARGIN_2 +249 0x0080 //RX_FDDRC_BAND_MARGIN_3 +250 0x0004 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x5000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x6400 //RX_FDDRC_THRD_3_2 +258 0x6400 //RX_FDDRC_THRD_3_3 +259 0x2000 //RX_FDDRC_SLANT_0_0 +260 0x2000 //RX_FDDRC_SLANT_0_1 +261 0x2000 //RX_FDDRC_SLANT_0_2 +262 0x2000 //RX_FDDRC_SLANT_0_3 +263 0x2000 //RX_FDDRC_SLANT_1_0 +264 0x2000 //RX_FDDRC_SLANT_1_1 +265 0x2000 //RX_FDDRC_SLANT_1_2 +266 0x2000 //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +286 0x0100 //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 +#VOL 6 +163 0x3000 //RX_TDDRC_ALPHA_UP_1 +164 0x3000 //RX_TDDRC_ALPHA_UP_2 +165 0x3000 //RX_TDDRC_ALPHA_UP_3 +166 0x3000 //RX_TDDRC_ALPHA_UP_4 +184 0x7FB0 //RX_TDDRC_ALPHA_DWN_1 +185 0x7FB0 //RX_TDDRC_ALPHA_DWN_2 +186 0x7FB0 //RX_TDDRC_ALPHA_DWN_3 +189 0x7FB0 //RX_TDDRC_ALPHA_DWN_4 +190 0xDA9E //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +269 0x0000 //RX_TDDRC_THRD_0 +270 0x0000 //RX_TDDRC_THRD_1 +271 0x0E80 //RX_TDDRC_THRD_2 +272 0x3800 //RX_TDDRC_THRD_3 +273 0x2A00 //RX_TDDRC_SLANT_0 +274 0x6E00 //RX_TDDRC_SLANT_1 +275 0x3000 //RX_TDDRC_ALPHA_UP_0 +276 0x7FB0 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x0000 //RX_TDDRC_HMNC_GAIN +279 0x0000 //RX_TDDRC_SMT_FLAG +280 0x0000 //RX_TDDRC_SMT_W +281 0x0100 //RX_TDDRC_DRC_GAIN +195 0x0020 //RX_FDEQ_SUBNUM +196 0x4848 //RX_FDEQ_GAIN_0 +197 0x4848 //RX_FDEQ_GAIN_1 +198 0x4848 //RX_FDEQ_GAIN_2 +199 0x4848 //RX_FDEQ_GAIN_3 +200 0x4848 //RX_FDEQ_GAIN_4 +201 0x4848 //RX_FDEQ_GAIN_5 +202 0x4848 //RX_FDEQ_GAIN_6 +203 0x4848 //RX_FDEQ_GAIN_7 +204 0x4848 //RX_FDEQ_GAIN_8 +205 0x4848 //RX_FDEQ_GAIN_9 +206 0x4848 //RX_FDEQ_GAIN_10 +207 0x4848 //RX_FDEQ_GAIN_11 +208 0x4848 //RX_FDEQ_GAIN_12 +209 0x4848 //RX_FDEQ_GAIN_13 +210 0x4848 //RX_FDEQ_GAIN_14 +211 0x4848 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0000 //RX_FDEQ_BIN_0 +221 0x0000 //RX_FDEQ_BIN_1 +222 0x0000 //RX_FDEQ_BIN_2 +223 0x0000 //RX_FDEQ_BIN_3 +224 0x0000 //RX_FDEQ_BIN_4 +225 0x0000 //RX_FDEQ_BIN_5 +226 0x0000 //RX_FDEQ_BIN_6 +227 0x0000 //RX_FDEQ_BIN_7 +228 0x0000 //RX_FDEQ_BIN_8 +229 0x0000 //RX_FDEQ_BIN_9 +230 0x0000 //RX_FDEQ_BIN_10 +231 0x0000 //RX_FDEQ_BIN_11 +232 0x0000 //RX_FDEQ_BIN_12 +233 0x0000 //RX_FDEQ_BIN_13 +234 0x0000 //RX_FDEQ_BIN_14 +235 0x0000 //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x0000 //RX_FDEQ_RESRV_0 +245 0x0000 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0030 //RX_FDDRC_BAND_MARGIN_1 +248 0x0050 //RX_FDDRC_BAND_MARGIN_2 +249 0x0080 //RX_FDDRC_BAND_MARGIN_3 +250 0x0004 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x5000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x6400 //RX_FDDRC_THRD_3_2 +258 0x6400 //RX_FDDRC_THRD_3_3 +259 0x2000 //RX_FDDRC_SLANT_0_0 +260 0x2000 //RX_FDDRC_SLANT_0_1 +261 0x2000 //RX_FDDRC_SLANT_0_2 +262 0x2000 //RX_FDDRC_SLANT_0_3 +263 0x2000 //RX_FDDRC_SLANT_1_0 +264 0x2000 //RX_FDDRC_SLANT_1_1 +265 0x2000 //RX_FDDRC_SLANT_1_2 +266 0x2000 //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +286 0x0100 //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 diff --git a/audio/cheetah/tuning/waves/waves_config.ini b/audio/cheetah/tuning/waves/waves_config.ini index 3e8c870..b9343d5 100644 --- a/audio/cheetah/tuning/waves/waves_config.ini +++ b/audio/cheetah/tuning/waves/waves_config.ini @@ -6,7 +6,6 @@ ######################################################################################################## [HAL_SUPPORTED_FEATURES] CUSTOM_ACTION_258=1 -# Action 258 parameters: [dev, mode, throttle control state] ######################################################################################################## # This defined the options of supported sample rates. @@ -20,20 +19,17 @@ SR_COMMON = 48000 # This can be configured by Waves or platform vendor. ######################################################################################################## [HAL_ORIENTATION_SUBTYPES] -OST_SPEAKER = 0:12,90:13,180:12,270:0|13 +OST_SPEAKER = 0:12,90:13,180:12,270:14 ######################################################################################################## # This defines available preset configurations. # This should be configured by Waves only unless platform vendor is familiar with MPS structure. ######################################################################################################## [HAL_SUPPORTED_PRESETS] -SPEAKER_MUSIC_THROTTLE= OM:1,SM:2,OST:OST_SPEAKER -SPEAKER_SAFE_MUSIC_THROTTLE = OM:10,SM:2,OST:OST_SPEAKER -SPEAKER_SAFE_CALL_THROTTLE = OM:10,SM:2,OST:OST_SPEAKER +SPEAKER_MUSIC_THROTTLE= OM:1,SM:3,OST:OST_SPEAKER +SPEAKER_SAFE_MUSIC_THROTTLE = OM:10,SM:3,OST:OST_SPEAKER SPEAKER_MUSIC = OM:1,SM:2,OST:OST_SPEAKER SPEAKER_SAFE_MUSIC = OM:10,SM:2,OST:OST_SPEAKER -SPEAKER_SAFE_CALL = OM:10,SM:2,OST:OST_SPEAKER -HEADSET_MUSIC = OM:2,SM:2 ######################################################################################################## # This defines available CONTROL configurations. Only define the CONTROL if you need it. @@ -41,9 +37,7 @@ HEADSET_MUSIC = OM:2,SM:2 # This can be configured by Waves or platform vendor. ######################################################################################################## [HAL_SUPPORTED_CONTROLS] -SPEAKER_INSTANCE = INSTANCE:1,DEV:0,SR:SR_COMMON,PRESET:SPEAKER_MUSIC|SPEAKER_SAFE_MUSIC|SPEAKER_SAFE_CALL|SPEAKER_MUSIC_THROTTLE|SPEAKER_SAFE_MUSIC_THROTTLE|SPEAKER_SAFE_CALL_THROTTLE -A2DP_INSTANCE = INSTANCE:2,DEV:0,SR:SR_COMMON,PRESET:HEADSET_MUSIC -USB_HEADPHONE_INSTANCE = INSTANCE:4,DEV:0,SR:SR_COMMON,PRESET:HEADSET_MUSIC +SPEAKER_INSTANCE = INSTANCE:1,DEV:0,SR:SR_COMMON,PRESET:SPEAKER_MUSIC|SPEAKER_SAFE_MUSIC|SPEAKER_MUSIC_THROTTLE|SPEAKER_SAFE_MUSIC_THROTTLE [COEFS_CONVERTER_SETTING] AlgFxPath=/vendor/lib/libAlgFx_HiFi3z.so @@ -58,8 +52,10 @@ AlgFxPath64=/vendor/lib64/libAlgFx_HiFi3z.so [CUSTOM_ACTION_258] CASE_1=PRIORITY:0,NUMBERS:2:0|1:1|2,PRESET:SPEAKER_MUSIC -CASE_2=PRIORITY:1,NUMBERS:1|2|4194304:2|3|4:1|2,PRESET:SPEAKER_SAFE_CALL +CASE_2=PRIORITY:1,NUMBERS:1|2|4194304:2|3|4:1|2,PRESET:SPEAKER_SAFE_MUSIC CASE_3=PRIORITY:2,NUMBERS:1|4194304:0|1:1|2,PRESET:SPEAKER_SAFE_MUSIC CASE_4=PRIORITY:3,NUMBERS:2:0|1:0,PRESET:SPEAKER_MUSIC_THROTTLE -CASE_5=PRIORITY:4,NUMBERS:1|2|4194304:2|3|4:0,PRESET:SPEAKER_SAFE_CALL_THROTTLE +CASE_5=PRIORITY:4,NUMBERS:1|2|4194304:2|3|4:0,PRESET:SPEAKER_SAFE_MUSIC_THROTTLE CASE_6=PRIORITY:5,NUMBERS:1|4194304:0|1:0,PRESET:SPEAKER_SAFE_MUSIC_THROTTLE +# Action 258 parameters: audio_devices_t, audio_mode_t, throttle_control_state_t +# - throttle_control_state_t: 0 - Enabled, 1 - Disabled, 2 - Bypassed diff --git a/audio/cheetah/tuning/waves/waves_preset.mps b/audio/cheetah/tuning/waves/waves_preset.mps index bd08ee3..e8383b9 100644 Binary files a/audio/cheetah/tuning/waves/waves_preset.mps and b/audio/cheetah/tuning/waves/waves_preset.mps differ diff --git a/audio/cloudripper/config/audio_platform_configuration.xml b/audio/cloudripper/config/audio_platform_configuration.xml index 0356bb9..8ef3573 100644 --- a/audio/cloudripper/config/audio_platform_configuration.xml +++ b/audio/cloudripper/config/audio_platform_configuration.xml @@ -187,7 +187,7 @@ - + @@ -282,7 +282,7 @@ - + diff --git a/audio/cloudripper/config/mixer_paths.xml b/audio/cloudripper/config/mixer_paths.xml index 9fef955..2a1e039 100644 --- a/audio/cloudripper/config/mixer_paths.xml +++ b/audio/cloudripper/config/mixer_paths.xml @@ -640,6 +640,10 @@ + + + + diff --git a/audio/cloudripper/tuning/fortemedia/BLUETOOTH.dat b/audio/cloudripper/tuning/fortemedia/BLUETOOTH.dat index 722b835..04a8e1b 100644 Binary files a/audio/cloudripper/tuning/fortemedia/BLUETOOTH.dat and b/audio/cloudripper/tuning/fortemedia/BLUETOOTH.dat differ diff --git a/audio/cloudripper/tuning/fortemedia/BLUETOOTH.mods b/audio/cloudripper/tuning/fortemedia/BLUETOOTH.mods index 21cd874..c2f94a8 100644 --- a/audio/cloudripper/tuning/fortemedia/BLUETOOTH.mods +++ b/audio/cloudripper/tuning/fortemedia/BLUETOOTH.mods @@ -1,11 +1,12 @@ #PLATFORM_NAME gChip #EXPORT_FLAG BLUETOOTH -#SINGLE_API_VER 1.1.6 -#SAVE_TIME 2021-08-20 16:32:53 +#SINGLE_API_VER 1.2.0 +#SAVE_TIME 2022-02-11 16:24:43 #CASE_NAME BLUETOOTH-RESERVE1-VOICE_GENERIC-FB -#PARAM_TYPE TX+RX -#TOTAL_CUSTOM_STEP 7 +#PARAM_MODE FULL +#PARAM_TYPE TX+2RX +#TOTAL_CUSTOM_STEP 7+7 #TX 0 0x0001 //TX_OPERATION_MODE_0 1 0x0000 //TX_OPERATION_MODE_1 @@ -258,12 +259,12 @@ 248 0xF800 //TX_THR_SN_EST_6 249 0xF800 //TX_THR_SN_EST_7 250 0x0100 //TX_DELTA_THR_SN_EST_0 -251 0x0000 //TX_DELTA_THR_SN_EST_1 +251 0x0100 //TX_DELTA_THR_SN_EST_1 252 0x0100 //TX_DELTA_THR_SN_EST_2 -253 0x0100 //TX_DELTA_THR_SN_EST_3 +253 0x0200 //TX_DELTA_THR_SN_EST_3 254 0x0200 //TX_DELTA_THR_SN_EST_4 255 0x0200 //TX_DELTA_THR_SN_EST_5 -256 0x0200 //TX_DELTA_THR_SN_EST_6 +256 0x0000 //TX_DELTA_THR_SN_EST_6 257 0x0200 //TX_DELTA_THR_SN_EST_7 258 0x4000 //TX_LAMBDA_NN_EST_0 259 0x4000 //TX_LAMBDA_NN_EST_1 @@ -289,12 +290,12 @@ 279 0x0000 //TX_B_POST_FLT_0 280 0x0000 //TX_B_POST_FLT_1 281 0x001A //TX_NS_LVL_CTRL_0 -282 0x001A //TX_NS_LVL_CTRL_1 +282 0x0014 //TX_NS_LVL_CTRL_1 283 0x0014 //TX_NS_LVL_CTRL_2 -284 0x0014 //TX_NS_LVL_CTRL_3 +284 0x000C //TX_NS_LVL_CTRL_3 285 0x000C //TX_NS_LVL_CTRL_4 286 0x000C //TX_NS_LVL_CTRL_5 -287 0x000C //TX_NS_LVL_CTRL_6 +287 0x001A //TX_NS_LVL_CTRL_6 288 0x000C //TX_NS_LVL_CTRL_7 289 0x000E //TX_MIN_GAIN_S_0 290 0x0014 //TX_MIN_GAIN_S_1 @@ -310,10 +311,10 @@ 300 0x7FFF //TX_SNRI_SUP_0 301 0x7FFF //TX_SNRI_SUP_1 302 0x7FFF //TX_SNRI_SUP_2 -303 0x7FFF //TX_SNRI_SUP_3 +303 0x4000 //TX_SNRI_SUP_3 304 0x4000 //TX_SNRI_SUP_4 305 0x4000 //TX_SNRI_SUP_5 -306 0x4000 //TX_SNRI_SUP_6 +306 0x7FFF //TX_SNRI_SUP_6 307 0x4000 //TX_SNRI_SUP_7 308 0x1200 //TX_THR_LFNS 309 0x0028 //TX_G_LFNS @@ -322,12 +323,12 @@ 312 0x7FFF //TX_A_POST_FILT_0 313 0x7FFF //TX_A_POST_FILT_1 314 0x4000 //TX_A_POST_FILT_S_0 -315 0x199A //TX_A_POST_FILT_S_1 +315 0x1000 //TX_A_POST_FILT_S_1 316 0x1000 //TX_A_POST_FILT_S_2 -317 0x1000 //TX_A_POST_FILT_S_3 +317 0x6666 //TX_A_POST_FILT_S_3 318 0x6666 //TX_A_POST_FILT_S_4 319 0x6666 //TX_A_POST_FILT_S_5 -320 0x6666 //TX_A_POST_FILT_S_6 +320 0x199A //TX_A_POST_FILT_S_6 321 0x6666 //TX_A_POST_FILT_S_7 322 0x2000 //TX_B_POST_FILT_0 323 0x2000 //TX_B_POST_FILT_1 @@ -387,10 +388,10 @@ 377 0x7FFF //TX_NOISE_TH_5_4 378 0x00C8 //TX_NOISE_TH_6 379 0x000A //TX_MINENOISE_TH -380 0x0000 //TX_MINENOISE_MIC0_TH_MTS -381 0x0000 //TX_MINENOISE_MIC0_TH_EXP -382 0x0000 //TX_MINENOISE_MIC0_S_TH_MTS -383 0x0000 //TX_MINENOISE_MIC0_S_TH_EXP +380 0x0000 //TX_MORENS_TFMASK_TH +381 0x0000 //TX_DRC_QUIET_FLOOR +382 0x0000 //TX_RATIODTL_CUT_TH +383 0x0000 //TX_DT_CUT_K1 384 0x0640 //TX_OUT_ENER_S_TH_CLEAN 385 0x0640 //TX_OUT_ENER_S_TH_LESSCLEAN 386 0x0640 //TX_OUT_ENER_S_TH_NOISY @@ -398,15 +399,15 @@ 388 0x07D0 //TX_OUT_ENER_TH_SPEECH 389 0x0000 //TX_SN_NPB_GAIN 390 0x0000 //TX_NN_NPB_GAIN -391 0x0000 //TX_CSX_ALPHA_0 -392 0x0000 //TX_CSX_ALPHA_1 -393 0x0000 //TX_CSX_ALPHA_2 -394 0x0000 //TX_CSX_ALPHA_3 -395 0x0000 //TX_MU_ARSP_EST -396 0x0000 //TX_P_OUTBEAM_MIN_TH +391 0x0000 //TX_POST_MASK_SUP_HSNE +392 0x0000 //TX_TAIL_DET_TH +393 0x0000 //TX_B_LESSCUT_RTO_WTA +394 0x0000 //TX_MEL_G_R +395 0x0000 //TX_SUPHIGH_TH +396 0x0000 //TX_MASK_G_R 397 0x0000 //TX_EXTRA_NS_L -398 0x0000 //TX_EXTRA_NS_A -399 0x0000 //TX_VR_NOISE_FLOOR_TH +398 0x0000 //TX_C_POST_FLT_MASK +399 0x0000 //TX_A_POST_FLT_WNS 400 0x0000 //TX_MIN_G_LOW300HZ 401 0x0010 //TX_MAXLEVEL_CNG 402 0x0000 //TX_STN_NOISE_TH @@ -521,16 +522,16 @@ 511 0x6666 //TX_MIC_TO_BFGAIN 512 0x6666 //TX_MICTOBFGAIN0 513 0x0014 //TX_FASTMUE_TH -514 0x0000 //TX_DERVB_LEN_0 -515 0x0000 //TX_DERVB_LEN_1 -516 0x0000 //TX_RHO_DERVB -517 0x0000 //TX_MIC_INDX_DERVB -518 0x0000 //TX_MU_DERVB -519 0x0000 //TX_DR_RESRV_0 -520 0x0000 //TX_DR_RESRV_1 -521 0x0000 //TX_DR_RESRV_2 -522 0x0000 //TX_DR_RESRV_3 -523 0x0000 //TX_DR_RESRV_4 +514 0x0000 //TX_DEREVERB_LF_MU +515 0x0000 //TX_DEREVERB_HF_MU +516 0x0000 //TX_DEREVERB_DELAY +517 0x0000 //TX_DEREVERB_COEF_LEN +518 0x0000 //TX_DEREVERB_DNR +519 0x0000 //TX_DEREVERB_ALPHA +520 0x0000 //TX_DEREVERB_BETA +521 0x0000 //TX_GSC_RTOL_TH +522 0x0000 //TX_GSC_RTOH_TH +523 0x0000 //TX_WIDE2_MEANHTH 524 0x0000 //TX_DR_RESRV_5 525 0x0000 //TX_DR_RESRV_6 526 0x0000 //TX_DR_RESRV_7 @@ -904,6 +905,71 @@ 894 0xC000 //TX_FASTNS_SSA_THHFL 895 0xCCCC //TX_FASTNS_SSA_THLFH 896 0xD999 //TX_FASTNS_SSA_THHFH +897 0x0000 //TX_SENDFUNC_REG_MICMUTE +898 0x0000 //TX_SENDFUNC_REG_MICMUTE1 +899 0x0000 //TX_MICMUTE_RATIO_THR +900 0x0000 //TX_MICMUTE_AMP_THR +901 0x0000 //TX_MICMUTE_HPF_IND +902 0x0000 //TX_MICMUTE_LOG_EYR_TH +903 0x0000 //TX_MICMUTE_CVG_TIME +904 0x0000 //TX_MICMUTE_RELEASE_TIME +905 0x0000 //TX_MIC_VOLUME_MIC0MUTE +906 0x0000 //TX_MICMUTE_EPD_OFFSET_0 +907 0x0000 //TX_MICMUTE_FRQ_AEC_L +908 0x0000 //TX_MICMUTE_EAD_THR +909 0x0000 //TX_MICMUTE_LAMBDA_CB_NLE +910 0x0000 //TX_MICMUTE_LAMBDA_RE_EST +911 0x0000 //TX_DTD_THR1_MICMUTE_0 +912 0x0000 //TX_DTD_THR1_MICMUTE_1 +913 0x0000 //TX_DTD_THR1_MICMUTE_2 +914 0x0000 //TX_DTD_THR1_MICMUTE_3 +915 0x0000 //TX_DTD_THR2_MICMUTE_0 +916 0x0000 //TX_MICMUTE_MIN_EQ_RE_EST_0 +917 0x0000 //TX_MICMUTE_MIN_EQ_RE_EST_1 +918 0x0000 //TX_MICMUTE_MIN_EQ_RE_EST_2 +919 0x0000 //TX_MICMUTE_MIN_EQ_RE_EST_3 +920 0x0000 //TX_MICMUTE_MIN_EQ_RE_EST_4 +921 0x0000 //TX_MICMUTE_C_POST_FLT +922 0x0000 //TX_MICMUTE_DT_CUT_K +923 0x0000 //TX_MICMUTE_DT_CUT_THR +924 0x0000 //TX_MICMUTE_DT_CUT_K2 +925 0x0000 //TX_MICMUTE_DT_CUT_THR2 +926 0x0000 //TX_MICMUTE_DT2_HOLD_N +927 0x0000 //TX_MICMUTE_RATIODTH_THCUT +928 0x0000 //TX_MICMUTE_B_POST_FLT_ECHOL +929 0x0000 //TX_MICMUTE_B_POST_FLT_ECHOH +930 0x0000 //TX_MICMUTE_C_POST_FLT_MASK +931 0x0000 //TX_MICMUTE_RATIODTL_CUT_TH +932 0x0000 //TX_MICMUTE_DT_CUT_K1 +933 0x0000 //TX_MICMUTE_N2_SN_EST +934 0x0000 //TX_MICMUTE_THR_SN_EST_0 +935 0x0000 //TX_MICMUTE_MIN_G_CTRL_0 +936 0x0000 //TX_MICMUTE_A_POST_FILT_S_0 +937 0x0000 //TX_MICMUTE_B_POST_FILT_0 +938 0x0000 //TX_MIC1RUB_AMP_THR +939 0x0000 //TX_MIC1MUTE_RATIO_THR +940 0x0000 //TX_MIC1MUTE_AMP_THR +941 0x0000 //TX_MIC1MUTE_CVG_TIME +942 0x0000 //TX_MIC1MUTE_RELEASE_TIME +943 0x0000 //TX_AMS_RESRV_01 +944 0x0000 //TX_AMS_RESRV_02 +945 0x0000 //TX_AMS_RESRV_03 +946 0x0000 //TX_AMS_RESRV_04 +947 0x0000 //TX_AMS_RESRV_05 +948 0x0000 //TX_AMS_RESRV_06 +949 0x0000 //TX_AMS_RESRV_07 +950 0x0000 //TX_AMS_RESRV_08 +951 0x0000 //TX_AMS_RESRV_09 +952 0x0000 //TX_AMS_RESRV_10 +953 0x0000 //TX_AMS_RESRV_11 +954 0x0000 //TX_AMS_RESRV_12 +955 0x0000 //TX_AMS_RESRV_13 +956 0x0000 //TX_AMS_RESRV_14 +957 0x0000 //TX_AMS_RESRV_15 +958 0x0000 //TX_AMS_RESRV_16 +959 0x0000 //TX_AMS_RESRV_17 +960 0x0000 //TX_AMS_RESRV_18 +961 0x0000 //TX_AMS_RESRV_19 #RX 0 0x0000 //RX_RECVFUNC_MODE_0 1 0x0000 //RX_RECVFUNC_MODE_1 @@ -1755,10 +1821,862 @@ 110 0x0000 //RX_FDDRC_RESRV_0 129 0x0100 //RX_SPK_VOL 130 0x0000 //RX_VOL_RESRV_0 +#RX 2 +157 0x0000 //RX_RECVFUNC_MODE_0 +158 0x0000 //RX_RECVFUNC_MODE_1 +159 0x0000 //RX_SAMPLINGFREQ_SIG +160 0x0000 //RX_SAMPLINGFREQ_PROC +161 0x000A //RX_FRAME_SZ +162 0x0000 //RX_DELAY_OPT +163 0x3000 //RX_TDDRC_ALPHA_UP_1 +164 0x3000 //RX_TDDRC_ALPHA_UP_2 +165 0x3000 //RX_TDDRC_ALPHA_UP_3 +166 0x3000 //RX_TDDRC_ALPHA_UP_4 +167 0x0800 //RX_PGA +168 0x7652 //RX_A_HP +169 0x4000 //RX_B_PE +170 0x7800 //RX_THR_PITCH_DET_0 +171 0x7000 //RX_THR_PITCH_DET_1 +172 0x6000 //RX_THR_PITCH_DET_2 +173 0x0000 //RX_PITCH_BFR_LEN +174 0x0000 //RX_SBD_PITCH_DET +175 0x0000 //RX_PP_RESRV_0 +176 0x0000 //RX_PP_RESRV_1 +177 0xF800 //RX_N_SN_EST +178 0x0000 //RX_N2_SN_EST +179 0x000F //RX_NS_LVL_CTRL +180 0xF800 //RX_THR_SN_EST +181 0x7E00 //RX_LAMBDA_PFILT +182 0x000A //RX_FENS_RESRV_0 +183 0x0000 //RX_FENS_RESRV_1 +184 0x7FB0 //RX_TDDRC_ALPHA_DWN_1 +185 0x7FB0 //RX_TDDRC_ALPHA_DWN_2 +186 0x7FB0 //RX_TDDRC_ALPHA_DWN_3 +187 0x0000 //RX_EXTRA_NS_L +188 0x0000 //RX_EXTRA_NS_A +189 0x7FB0 //RX_TDDRC_ALPHA_DWN_4 +190 0x65AD //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +192 0x0000 //RX_A_POST_FLT +193 0x0000 //RX_LMT_THRD +194 0x4000 //RX_LMT_ALPHA +195 0x0020 //RX_FDEQ_SUBNUM +196 0x4848 //RX_FDEQ_GAIN_0 +197 0x4848 //RX_FDEQ_GAIN_1 +198 0x4848 //RX_FDEQ_GAIN_2 +199 0x4848 //RX_FDEQ_GAIN_3 +200 0x4848 //RX_FDEQ_GAIN_4 +201 0x4848 //RX_FDEQ_GAIN_5 +202 0x4848 //RX_FDEQ_GAIN_6 +203 0x4848 //RX_FDEQ_GAIN_7 +204 0x4848 //RX_FDEQ_GAIN_8 +205 0x4848 //RX_FDEQ_GAIN_9 +206 0x4848 //RX_FDEQ_GAIN_10 +207 0x4848 //RX_FDEQ_GAIN_11 +208 0x4848 //RX_FDEQ_GAIN_12 +209 0x4848 //RX_FDEQ_GAIN_13 +210 0x4848 //RX_FDEQ_GAIN_14 +211 0x4848 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0000 //RX_FDEQ_BIN_0 +221 0x0000 //RX_FDEQ_BIN_1 +222 0x0000 //RX_FDEQ_BIN_2 +223 0x0000 //RX_FDEQ_BIN_3 +224 0x0000 //RX_FDEQ_BIN_4 +225 0x0000 //RX_FDEQ_BIN_5 +226 0x0000 //RX_FDEQ_BIN_6 +227 0x0000 //RX_FDEQ_BIN_7 +228 0x0000 //RX_FDEQ_BIN_8 +229 0x0000 //RX_FDEQ_BIN_9 +230 0x0000 //RX_FDEQ_BIN_10 +231 0x0000 //RX_FDEQ_BIN_11 +232 0x0000 //RX_FDEQ_BIN_12 +233 0x0000 //RX_FDEQ_BIN_13 +234 0x0000 //RX_FDEQ_BIN_14 +235 0x0000 //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x0000 //RX_FDEQ_RESRV_0 +245 0x0000 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0030 //RX_FDDRC_BAND_MARGIN_1 +248 0x0050 //RX_FDDRC_BAND_MARGIN_2 +249 0x0080 //RX_FDDRC_BAND_MARGIN_3 +250 0x0004 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x5000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x6400 //RX_FDDRC_THRD_3_2 +258 0x6400 //RX_FDDRC_THRD_3_3 +259 0x2000 //RX_FDDRC_SLANT_0_0 +260 0x2000 //RX_FDDRC_SLANT_0_1 +261 0x2000 //RX_FDDRC_SLANT_0_2 +262 0x2000 //RX_FDDRC_SLANT_0_3 +263 0x2000 //RX_FDDRC_SLANT_1_0 +264 0x2000 //RX_FDDRC_SLANT_1_1 +265 0x2000 //RX_FDDRC_SLANT_1_2 +266 0x2000 //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +268 0x0000 //RX_FILTINDX +269 0x0000 //RX_TDDRC_THRD_0 +270 0x0000 //RX_TDDRC_THRD_1 +271 0x0E80 //RX_TDDRC_THRD_2 +272 0x3800 //RX_TDDRC_THRD_3 +273 0x2A00 //RX_TDDRC_SLANT_0 +274 0x6E00 //RX_TDDRC_SLANT_1 +275 0x3000 //RX_TDDRC_ALPHA_UP_0 +276 0x7FB0 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x0000 //RX_TDDRC_HMNC_GAIN +279 0x0000 //RX_TDDRC_SMT_FLAG +280 0x0000 //RX_TDDRC_SMT_W +281 0x0100 //RX_TDDRC_DRC_GAIN +282 0x7C00 //RX_LAMBDA_PKA_FP +283 0x2000 //RX_TPKA_FP +284 0x0080 //RX_MIN_G_FP +285 0x2000 //RX_MAX_G_FP +286 0x000C //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 +288 0x0010 //RX_MAXLEVEL_CNG +289 0x0000 //RX_BWE_UV_TH +290 0x0000 //RX_BWE_UV_TH2 +291 0x0000 //RX_BWE_UV_TH3 +292 0x0000 //RX_BWE_V_TH +293 0x0000 //RX_BWE_GAIN1_V_TH1 +294 0x0000 //RX_BWE_GAIN1_V_TH2 +295 0x0000 //RX_BWE_UV_EQ +296 0x0000 //RX_BWE_V_EQ +297 0x0000 //RX_BWE_TONE_TH +298 0x0000 //RX_BWE_UV_HOLD_T +299 0x0000 //RX_BWE_GAIN2_ALPHA +300 0x0000 //RX_BWE_GAIN3_ALPHA +301 0x0000 //RX_BWE_CUTOFF +302 0x0000 //RX_BWE_GAINFILL +303 0x0000 //RX_BWE_MAXTH_TONE +304 0x0000 //RX_BWE_EQ_0 +305 0x0000 //RX_BWE_EQ_1 +306 0x0000 //RX_BWE_EQ_2 +307 0x0000 //RX_BWE_EQ_3 +308 0x0000 //RX_BWE_EQ_4 +309 0x0000 //RX_BWE_EQ_5 +310 0x0000 //RX_BWE_EQ_6 +311 0x0000 //RX_BWE_RESRV_0 +312 0x0000 //RX_BWE_RESRV_1 +313 0x0000 //RX_BWE_RESRV_2 +#VOL 0 +163 0x3000 //RX_TDDRC_ALPHA_UP_1 +164 0x3000 //RX_TDDRC_ALPHA_UP_2 +165 0x3000 //RX_TDDRC_ALPHA_UP_3 +166 0x3000 //RX_TDDRC_ALPHA_UP_4 +184 0x7FB0 //RX_TDDRC_ALPHA_DWN_1 +185 0x7FB0 //RX_TDDRC_ALPHA_DWN_2 +186 0x7FB0 //RX_TDDRC_ALPHA_DWN_3 +189 0x7FB0 //RX_TDDRC_ALPHA_DWN_4 +190 0x65AD //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +269 0x0000 //RX_TDDRC_THRD_0 +270 0x0000 //RX_TDDRC_THRD_1 +271 0x0E80 //RX_TDDRC_THRD_2 +272 0x3800 //RX_TDDRC_THRD_3 +273 0x2A00 //RX_TDDRC_SLANT_0 +274 0x6E00 //RX_TDDRC_SLANT_1 +275 0x3000 //RX_TDDRC_ALPHA_UP_0 +276 0x7FB0 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x0000 //RX_TDDRC_HMNC_GAIN +279 0x0000 //RX_TDDRC_SMT_FLAG +280 0x0000 //RX_TDDRC_SMT_W +281 0x0100 //RX_TDDRC_DRC_GAIN +195 0x0020 //RX_FDEQ_SUBNUM +196 0x4848 //RX_FDEQ_GAIN_0 +197 0x4848 //RX_FDEQ_GAIN_1 +198 0x4848 //RX_FDEQ_GAIN_2 +199 0x4848 //RX_FDEQ_GAIN_3 +200 0x4848 //RX_FDEQ_GAIN_4 +201 0x4848 //RX_FDEQ_GAIN_5 +202 0x4848 //RX_FDEQ_GAIN_6 +203 0x4848 //RX_FDEQ_GAIN_7 +204 0x4848 //RX_FDEQ_GAIN_8 +205 0x4848 //RX_FDEQ_GAIN_9 +206 0x4848 //RX_FDEQ_GAIN_10 +207 0x4848 //RX_FDEQ_GAIN_11 +208 0x4848 //RX_FDEQ_GAIN_12 +209 0x4848 //RX_FDEQ_GAIN_13 +210 0x4848 //RX_FDEQ_GAIN_14 +211 0x4848 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0000 //RX_FDEQ_BIN_0 +221 0x0000 //RX_FDEQ_BIN_1 +222 0x0000 //RX_FDEQ_BIN_2 +223 0x0000 //RX_FDEQ_BIN_3 +224 0x0000 //RX_FDEQ_BIN_4 +225 0x0000 //RX_FDEQ_BIN_5 +226 0x0000 //RX_FDEQ_BIN_6 +227 0x0000 //RX_FDEQ_BIN_7 +228 0x0000 //RX_FDEQ_BIN_8 +229 0x0000 //RX_FDEQ_BIN_9 +230 0x0000 //RX_FDEQ_BIN_10 +231 0x0000 //RX_FDEQ_BIN_11 +232 0x0000 //RX_FDEQ_BIN_12 +233 0x0000 //RX_FDEQ_BIN_13 +234 0x0000 //RX_FDEQ_BIN_14 +235 0x0000 //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x0000 //RX_FDEQ_RESRV_0 +245 0x0000 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0030 //RX_FDDRC_BAND_MARGIN_1 +248 0x0050 //RX_FDDRC_BAND_MARGIN_2 +249 0x0080 //RX_FDDRC_BAND_MARGIN_3 +250 0x0004 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x5000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x6400 //RX_FDDRC_THRD_3_2 +258 0x6400 //RX_FDDRC_THRD_3_3 +259 0x2000 //RX_FDDRC_SLANT_0_0 +260 0x2000 //RX_FDDRC_SLANT_0_1 +261 0x2000 //RX_FDDRC_SLANT_0_2 +262 0x2000 //RX_FDDRC_SLANT_0_3 +263 0x2000 //RX_FDDRC_SLANT_1_0 +264 0x2000 //RX_FDDRC_SLANT_1_1 +265 0x2000 //RX_FDDRC_SLANT_1_2 +266 0x2000 //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +286 0x000C //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 +#VOL 1 +163 0x3000 //RX_TDDRC_ALPHA_UP_1 +164 0x3000 //RX_TDDRC_ALPHA_UP_2 +165 0x3000 //RX_TDDRC_ALPHA_UP_3 +166 0x3000 //RX_TDDRC_ALPHA_UP_4 +184 0x7FB0 //RX_TDDRC_ALPHA_DWN_1 +185 0x7FB0 //RX_TDDRC_ALPHA_DWN_2 +186 0x7FB0 //RX_TDDRC_ALPHA_DWN_3 +189 0x7FB0 //RX_TDDRC_ALPHA_DWN_4 +190 0x65AD //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +269 0x0000 //RX_TDDRC_THRD_0 +270 0x0000 //RX_TDDRC_THRD_1 +271 0x0E80 //RX_TDDRC_THRD_2 +272 0x3800 //RX_TDDRC_THRD_3 +273 0x2A00 //RX_TDDRC_SLANT_0 +274 0x6E00 //RX_TDDRC_SLANT_1 +275 0x3000 //RX_TDDRC_ALPHA_UP_0 +276 0x7FB0 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x0000 //RX_TDDRC_HMNC_GAIN +279 0x0000 //RX_TDDRC_SMT_FLAG +280 0x0000 //RX_TDDRC_SMT_W +281 0x0100 //RX_TDDRC_DRC_GAIN +195 0x0020 //RX_FDEQ_SUBNUM +196 0x4848 //RX_FDEQ_GAIN_0 +197 0x4848 //RX_FDEQ_GAIN_1 +198 0x4848 //RX_FDEQ_GAIN_2 +199 0x4848 //RX_FDEQ_GAIN_3 +200 0x4848 //RX_FDEQ_GAIN_4 +201 0x4848 //RX_FDEQ_GAIN_5 +202 0x4848 //RX_FDEQ_GAIN_6 +203 0x4848 //RX_FDEQ_GAIN_7 +204 0x4848 //RX_FDEQ_GAIN_8 +205 0x4848 //RX_FDEQ_GAIN_9 +206 0x4848 //RX_FDEQ_GAIN_10 +207 0x4848 //RX_FDEQ_GAIN_11 +208 0x4848 //RX_FDEQ_GAIN_12 +209 0x4848 //RX_FDEQ_GAIN_13 +210 0x4848 //RX_FDEQ_GAIN_14 +211 0x4848 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0000 //RX_FDEQ_BIN_0 +221 0x0000 //RX_FDEQ_BIN_1 +222 0x0000 //RX_FDEQ_BIN_2 +223 0x0000 //RX_FDEQ_BIN_3 +224 0x0000 //RX_FDEQ_BIN_4 +225 0x0000 //RX_FDEQ_BIN_5 +226 0x0000 //RX_FDEQ_BIN_6 +227 0x0000 //RX_FDEQ_BIN_7 +228 0x0000 //RX_FDEQ_BIN_8 +229 0x0000 //RX_FDEQ_BIN_9 +230 0x0000 //RX_FDEQ_BIN_10 +231 0x0000 //RX_FDEQ_BIN_11 +232 0x0000 //RX_FDEQ_BIN_12 +233 0x0000 //RX_FDEQ_BIN_13 +234 0x0000 //RX_FDEQ_BIN_14 +235 0x0000 //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x0000 //RX_FDEQ_RESRV_0 +245 0x0000 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0030 //RX_FDDRC_BAND_MARGIN_1 +248 0x0050 //RX_FDDRC_BAND_MARGIN_2 +249 0x0080 //RX_FDDRC_BAND_MARGIN_3 +250 0x0004 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x5000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x6400 //RX_FDDRC_THRD_3_2 +258 0x6400 //RX_FDDRC_THRD_3_3 +259 0x2000 //RX_FDDRC_SLANT_0_0 +260 0x2000 //RX_FDDRC_SLANT_0_1 +261 0x2000 //RX_FDDRC_SLANT_0_2 +262 0x2000 //RX_FDDRC_SLANT_0_3 +263 0x2000 //RX_FDDRC_SLANT_1_0 +264 0x2000 //RX_FDDRC_SLANT_1_1 +265 0x2000 //RX_FDDRC_SLANT_1_2 +266 0x2000 //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +286 0x0014 //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 +#VOL 2 +163 0x3000 //RX_TDDRC_ALPHA_UP_1 +164 0x3000 //RX_TDDRC_ALPHA_UP_2 +165 0x3000 //RX_TDDRC_ALPHA_UP_3 +166 0x3000 //RX_TDDRC_ALPHA_UP_4 +184 0x7FB0 //RX_TDDRC_ALPHA_DWN_1 +185 0x7FB0 //RX_TDDRC_ALPHA_DWN_2 +186 0x7FB0 //RX_TDDRC_ALPHA_DWN_3 +189 0x7FB0 //RX_TDDRC_ALPHA_DWN_4 +190 0x65AD //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +269 0x0000 //RX_TDDRC_THRD_0 +270 0x0000 //RX_TDDRC_THRD_1 +271 0x0E80 //RX_TDDRC_THRD_2 +272 0x3800 //RX_TDDRC_THRD_3 +273 0x2A00 //RX_TDDRC_SLANT_0 +274 0x6E00 //RX_TDDRC_SLANT_1 +275 0x3000 //RX_TDDRC_ALPHA_UP_0 +276 0x7FB0 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x0000 //RX_TDDRC_HMNC_GAIN +279 0x0000 //RX_TDDRC_SMT_FLAG +280 0x0000 //RX_TDDRC_SMT_W +281 0x0100 //RX_TDDRC_DRC_GAIN +195 0x0020 //RX_FDEQ_SUBNUM +196 0x4848 //RX_FDEQ_GAIN_0 +197 0x4848 //RX_FDEQ_GAIN_1 +198 0x4848 //RX_FDEQ_GAIN_2 +199 0x4848 //RX_FDEQ_GAIN_3 +200 0x4848 //RX_FDEQ_GAIN_4 +201 0x4848 //RX_FDEQ_GAIN_5 +202 0x4848 //RX_FDEQ_GAIN_6 +203 0x4848 //RX_FDEQ_GAIN_7 +204 0x4848 //RX_FDEQ_GAIN_8 +205 0x4848 //RX_FDEQ_GAIN_9 +206 0x4848 //RX_FDEQ_GAIN_10 +207 0x4848 //RX_FDEQ_GAIN_11 +208 0x4848 //RX_FDEQ_GAIN_12 +209 0x4848 //RX_FDEQ_GAIN_13 +210 0x4848 //RX_FDEQ_GAIN_14 +211 0x4848 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0000 //RX_FDEQ_BIN_0 +221 0x0000 //RX_FDEQ_BIN_1 +222 0x0000 //RX_FDEQ_BIN_2 +223 0x0000 //RX_FDEQ_BIN_3 +224 0x0000 //RX_FDEQ_BIN_4 +225 0x0000 //RX_FDEQ_BIN_5 +226 0x0000 //RX_FDEQ_BIN_6 +227 0x0000 //RX_FDEQ_BIN_7 +228 0x0000 //RX_FDEQ_BIN_8 +229 0x0000 //RX_FDEQ_BIN_9 +230 0x0000 //RX_FDEQ_BIN_10 +231 0x0000 //RX_FDEQ_BIN_11 +232 0x0000 //RX_FDEQ_BIN_12 +233 0x0000 //RX_FDEQ_BIN_13 +234 0x0000 //RX_FDEQ_BIN_14 +235 0x0000 //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x0000 //RX_FDEQ_RESRV_0 +245 0x0000 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0030 //RX_FDDRC_BAND_MARGIN_1 +248 0x0050 //RX_FDDRC_BAND_MARGIN_2 +249 0x0080 //RX_FDDRC_BAND_MARGIN_3 +250 0x0004 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x5000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x6400 //RX_FDDRC_THRD_3_2 +258 0x6400 //RX_FDDRC_THRD_3_3 +259 0x2000 //RX_FDDRC_SLANT_0_0 +260 0x2000 //RX_FDDRC_SLANT_0_1 +261 0x2000 //RX_FDDRC_SLANT_0_2 +262 0x2000 //RX_FDDRC_SLANT_0_3 +263 0x2000 //RX_FDDRC_SLANT_1_0 +264 0x2000 //RX_FDDRC_SLANT_1_1 +265 0x2000 //RX_FDDRC_SLANT_1_2 +266 0x2000 //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +286 0x0021 //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 +#VOL 3 +163 0x3000 //RX_TDDRC_ALPHA_UP_1 +164 0x3000 //RX_TDDRC_ALPHA_UP_2 +165 0x3000 //RX_TDDRC_ALPHA_UP_3 +166 0x3000 //RX_TDDRC_ALPHA_UP_4 +184 0x7FB0 //RX_TDDRC_ALPHA_DWN_1 +185 0x7FB0 //RX_TDDRC_ALPHA_DWN_2 +186 0x7FB0 //RX_TDDRC_ALPHA_DWN_3 +189 0x7FB0 //RX_TDDRC_ALPHA_DWN_4 +190 0x65AD //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +269 0x0000 //RX_TDDRC_THRD_0 +270 0x0000 //RX_TDDRC_THRD_1 +271 0x0E80 //RX_TDDRC_THRD_2 +272 0x3800 //RX_TDDRC_THRD_3 +273 0x2A00 //RX_TDDRC_SLANT_0 +274 0x6E00 //RX_TDDRC_SLANT_1 +275 0x3000 //RX_TDDRC_ALPHA_UP_0 +276 0x7FB0 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x0000 //RX_TDDRC_HMNC_GAIN +279 0x0000 //RX_TDDRC_SMT_FLAG +280 0x0000 //RX_TDDRC_SMT_W +281 0x0100 //RX_TDDRC_DRC_GAIN +195 0x0020 //RX_FDEQ_SUBNUM +196 0x4848 //RX_FDEQ_GAIN_0 +197 0x4848 //RX_FDEQ_GAIN_1 +198 0x4848 //RX_FDEQ_GAIN_2 +199 0x4848 //RX_FDEQ_GAIN_3 +200 0x4848 //RX_FDEQ_GAIN_4 +201 0x4848 //RX_FDEQ_GAIN_5 +202 0x4848 //RX_FDEQ_GAIN_6 +203 0x4848 //RX_FDEQ_GAIN_7 +204 0x4848 //RX_FDEQ_GAIN_8 +205 0x4848 //RX_FDEQ_GAIN_9 +206 0x4848 //RX_FDEQ_GAIN_10 +207 0x4848 //RX_FDEQ_GAIN_11 +208 0x4848 //RX_FDEQ_GAIN_12 +209 0x4848 //RX_FDEQ_GAIN_13 +210 0x4848 //RX_FDEQ_GAIN_14 +211 0x4848 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0000 //RX_FDEQ_BIN_0 +221 0x0000 //RX_FDEQ_BIN_1 +222 0x0000 //RX_FDEQ_BIN_2 +223 0x0000 //RX_FDEQ_BIN_3 +224 0x0000 //RX_FDEQ_BIN_4 +225 0x0000 //RX_FDEQ_BIN_5 +226 0x0000 //RX_FDEQ_BIN_6 +227 0x0000 //RX_FDEQ_BIN_7 +228 0x0000 //RX_FDEQ_BIN_8 +229 0x0000 //RX_FDEQ_BIN_9 +230 0x0000 //RX_FDEQ_BIN_10 +231 0x0000 //RX_FDEQ_BIN_11 +232 0x0000 //RX_FDEQ_BIN_12 +233 0x0000 //RX_FDEQ_BIN_13 +234 0x0000 //RX_FDEQ_BIN_14 +235 0x0000 //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x0000 //RX_FDEQ_RESRV_0 +245 0x0000 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0030 //RX_FDDRC_BAND_MARGIN_1 +248 0x0050 //RX_FDDRC_BAND_MARGIN_2 +249 0x0080 //RX_FDDRC_BAND_MARGIN_3 +250 0x0004 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x5000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x6400 //RX_FDDRC_THRD_3_2 +258 0x6400 //RX_FDDRC_THRD_3_3 +259 0x2000 //RX_FDDRC_SLANT_0_0 +260 0x2000 //RX_FDDRC_SLANT_0_1 +261 0x2000 //RX_FDDRC_SLANT_0_2 +262 0x2000 //RX_FDDRC_SLANT_0_3 +263 0x2000 //RX_FDDRC_SLANT_1_0 +264 0x2000 //RX_FDDRC_SLANT_1_1 +265 0x2000 //RX_FDDRC_SLANT_1_2 +266 0x2000 //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +286 0x0037 //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 +#VOL 4 +163 0x3000 //RX_TDDRC_ALPHA_UP_1 +164 0x3000 //RX_TDDRC_ALPHA_UP_2 +165 0x3000 //RX_TDDRC_ALPHA_UP_3 +166 0x3000 //RX_TDDRC_ALPHA_UP_4 +184 0x7FB0 //RX_TDDRC_ALPHA_DWN_1 +185 0x7FB0 //RX_TDDRC_ALPHA_DWN_2 +186 0x7FB0 //RX_TDDRC_ALPHA_DWN_3 +189 0x7FB0 //RX_TDDRC_ALPHA_DWN_4 +190 0x65AD //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +269 0x0000 //RX_TDDRC_THRD_0 +270 0x0000 //RX_TDDRC_THRD_1 +271 0x0E80 //RX_TDDRC_THRD_2 +272 0x3800 //RX_TDDRC_THRD_3 +273 0x2A00 //RX_TDDRC_SLANT_0 +274 0x6E00 //RX_TDDRC_SLANT_1 +275 0x3000 //RX_TDDRC_ALPHA_UP_0 +276 0x7FB0 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x0000 //RX_TDDRC_HMNC_GAIN +279 0x0000 //RX_TDDRC_SMT_FLAG +280 0x0000 //RX_TDDRC_SMT_W +281 0x0100 //RX_TDDRC_DRC_GAIN +195 0x0020 //RX_FDEQ_SUBNUM +196 0x4848 //RX_FDEQ_GAIN_0 +197 0x4848 //RX_FDEQ_GAIN_1 +198 0x4848 //RX_FDEQ_GAIN_2 +199 0x4848 //RX_FDEQ_GAIN_3 +200 0x4848 //RX_FDEQ_GAIN_4 +201 0x4848 //RX_FDEQ_GAIN_5 +202 0x4848 //RX_FDEQ_GAIN_6 +203 0x4848 //RX_FDEQ_GAIN_7 +204 0x4848 //RX_FDEQ_GAIN_8 +205 0x4848 //RX_FDEQ_GAIN_9 +206 0x4848 //RX_FDEQ_GAIN_10 +207 0x4848 //RX_FDEQ_GAIN_11 +208 0x4848 //RX_FDEQ_GAIN_12 +209 0x4848 //RX_FDEQ_GAIN_13 +210 0x4848 //RX_FDEQ_GAIN_14 +211 0x4848 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0000 //RX_FDEQ_BIN_0 +221 0x0000 //RX_FDEQ_BIN_1 +222 0x0000 //RX_FDEQ_BIN_2 +223 0x0000 //RX_FDEQ_BIN_3 +224 0x0000 //RX_FDEQ_BIN_4 +225 0x0000 //RX_FDEQ_BIN_5 +226 0x0000 //RX_FDEQ_BIN_6 +227 0x0000 //RX_FDEQ_BIN_7 +228 0x0000 //RX_FDEQ_BIN_8 +229 0x0000 //RX_FDEQ_BIN_9 +230 0x0000 //RX_FDEQ_BIN_10 +231 0x0000 //RX_FDEQ_BIN_11 +232 0x0000 //RX_FDEQ_BIN_12 +233 0x0000 //RX_FDEQ_BIN_13 +234 0x0000 //RX_FDEQ_BIN_14 +235 0x0000 //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x0000 //RX_FDEQ_RESRV_0 +245 0x0000 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0030 //RX_FDDRC_BAND_MARGIN_1 +248 0x0050 //RX_FDDRC_BAND_MARGIN_2 +249 0x0080 //RX_FDDRC_BAND_MARGIN_3 +250 0x0004 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x5000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x6400 //RX_FDDRC_THRD_3_2 +258 0x6400 //RX_FDDRC_THRD_3_3 +259 0x2000 //RX_FDDRC_SLANT_0_0 +260 0x2000 //RX_FDDRC_SLANT_0_1 +261 0x2000 //RX_FDDRC_SLANT_0_2 +262 0x2000 //RX_FDDRC_SLANT_0_3 +263 0x2000 //RX_FDDRC_SLANT_1_0 +264 0x2000 //RX_FDDRC_SLANT_1_1 +265 0x2000 //RX_FDDRC_SLANT_1_2 +266 0x2000 //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +286 0x005B //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 +#VOL 5 +163 0x3000 //RX_TDDRC_ALPHA_UP_1 +164 0x3000 //RX_TDDRC_ALPHA_UP_2 +165 0x3000 //RX_TDDRC_ALPHA_UP_3 +166 0x3000 //RX_TDDRC_ALPHA_UP_4 +184 0x7FB0 //RX_TDDRC_ALPHA_DWN_1 +185 0x7FB0 //RX_TDDRC_ALPHA_DWN_2 +186 0x7FB0 //RX_TDDRC_ALPHA_DWN_3 +189 0x7FB0 //RX_TDDRC_ALPHA_DWN_4 +190 0x65AD //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +269 0x0000 //RX_TDDRC_THRD_0 +270 0x0000 //RX_TDDRC_THRD_1 +271 0x0E80 //RX_TDDRC_THRD_2 +272 0x3800 //RX_TDDRC_THRD_3 +273 0x2A00 //RX_TDDRC_SLANT_0 +274 0x6E00 //RX_TDDRC_SLANT_1 +275 0x3000 //RX_TDDRC_ALPHA_UP_0 +276 0x7FB0 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x0000 //RX_TDDRC_HMNC_GAIN +279 0x0000 //RX_TDDRC_SMT_FLAG +280 0x0000 //RX_TDDRC_SMT_W +281 0x0100 //RX_TDDRC_DRC_GAIN +195 0x0020 //RX_FDEQ_SUBNUM +196 0x4848 //RX_FDEQ_GAIN_0 +197 0x4848 //RX_FDEQ_GAIN_1 +198 0x4848 //RX_FDEQ_GAIN_2 +199 0x4848 //RX_FDEQ_GAIN_3 +200 0x4848 //RX_FDEQ_GAIN_4 +201 0x4848 //RX_FDEQ_GAIN_5 +202 0x4848 //RX_FDEQ_GAIN_6 +203 0x4848 //RX_FDEQ_GAIN_7 +204 0x4848 //RX_FDEQ_GAIN_8 +205 0x4848 //RX_FDEQ_GAIN_9 +206 0x4848 //RX_FDEQ_GAIN_10 +207 0x4848 //RX_FDEQ_GAIN_11 +208 0x4848 //RX_FDEQ_GAIN_12 +209 0x4848 //RX_FDEQ_GAIN_13 +210 0x4848 //RX_FDEQ_GAIN_14 +211 0x4848 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0000 //RX_FDEQ_BIN_0 +221 0x0000 //RX_FDEQ_BIN_1 +222 0x0000 //RX_FDEQ_BIN_2 +223 0x0000 //RX_FDEQ_BIN_3 +224 0x0000 //RX_FDEQ_BIN_4 +225 0x0000 //RX_FDEQ_BIN_5 +226 0x0000 //RX_FDEQ_BIN_6 +227 0x0000 //RX_FDEQ_BIN_7 +228 0x0000 //RX_FDEQ_BIN_8 +229 0x0000 //RX_FDEQ_BIN_9 +230 0x0000 //RX_FDEQ_BIN_10 +231 0x0000 //RX_FDEQ_BIN_11 +232 0x0000 //RX_FDEQ_BIN_12 +233 0x0000 //RX_FDEQ_BIN_13 +234 0x0000 //RX_FDEQ_BIN_14 +235 0x0000 //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x0000 //RX_FDEQ_RESRV_0 +245 0x0000 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0030 //RX_FDDRC_BAND_MARGIN_1 +248 0x0050 //RX_FDDRC_BAND_MARGIN_2 +249 0x0080 //RX_FDDRC_BAND_MARGIN_3 +250 0x0004 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x5000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x6400 //RX_FDDRC_THRD_3_2 +258 0x6400 //RX_FDDRC_THRD_3_3 +259 0x2000 //RX_FDDRC_SLANT_0_0 +260 0x2000 //RX_FDDRC_SLANT_0_1 +261 0x2000 //RX_FDDRC_SLANT_0_2 +262 0x2000 //RX_FDDRC_SLANT_0_3 +263 0x2000 //RX_FDDRC_SLANT_1_0 +264 0x2000 //RX_FDDRC_SLANT_1_1 +265 0x2000 //RX_FDDRC_SLANT_1_2 +266 0x2000 //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +286 0x0099 //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 +#VOL 6 +163 0x3000 //RX_TDDRC_ALPHA_UP_1 +164 0x3000 //RX_TDDRC_ALPHA_UP_2 +165 0x3000 //RX_TDDRC_ALPHA_UP_3 +166 0x3000 //RX_TDDRC_ALPHA_UP_4 +184 0x7FB0 //RX_TDDRC_ALPHA_DWN_1 +185 0x7FB0 //RX_TDDRC_ALPHA_DWN_2 +186 0x7FB0 //RX_TDDRC_ALPHA_DWN_3 +189 0x7FB0 //RX_TDDRC_ALPHA_DWN_4 +190 0x65AD //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +269 0x0000 //RX_TDDRC_THRD_0 +270 0x0000 //RX_TDDRC_THRD_1 +271 0x0E80 //RX_TDDRC_THRD_2 +272 0x3800 //RX_TDDRC_THRD_3 +273 0x2A00 //RX_TDDRC_SLANT_0 +274 0x6E00 //RX_TDDRC_SLANT_1 +275 0x3000 //RX_TDDRC_ALPHA_UP_0 +276 0x7FB0 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x0000 //RX_TDDRC_HMNC_GAIN +279 0x0000 //RX_TDDRC_SMT_FLAG +280 0x0000 //RX_TDDRC_SMT_W +281 0x0100 //RX_TDDRC_DRC_GAIN +195 0x0020 //RX_FDEQ_SUBNUM +196 0x4848 //RX_FDEQ_GAIN_0 +197 0x4848 //RX_FDEQ_GAIN_1 +198 0x4848 //RX_FDEQ_GAIN_2 +199 0x4848 //RX_FDEQ_GAIN_3 +200 0x4848 //RX_FDEQ_GAIN_4 +201 0x4848 //RX_FDEQ_GAIN_5 +202 0x4848 //RX_FDEQ_GAIN_6 +203 0x4848 //RX_FDEQ_GAIN_7 +204 0x4848 //RX_FDEQ_GAIN_8 +205 0x4848 //RX_FDEQ_GAIN_9 +206 0x4848 //RX_FDEQ_GAIN_10 +207 0x4848 //RX_FDEQ_GAIN_11 +208 0x4848 //RX_FDEQ_GAIN_12 +209 0x4848 //RX_FDEQ_GAIN_13 +210 0x4848 //RX_FDEQ_GAIN_14 +211 0x4848 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0000 //RX_FDEQ_BIN_0 +221 0x0000 //RX_FDEQ_BIN_1 +222 0x0000 //RX_FDEQ_BIN_2 +223 0x0000 //RX_FDEQ_BIN_3 +224 0x0000 //RX_FDEQ_BIN_4 +225 0x0000 //RX_FDEQ_BIN_5 +226 0x0000 //RX_FDEQ_BIN_6 +227 0x0000 //RX_FDEQ_BIN_7 +228 0x0000 //RX_FDEQ_BIN_8 +229 0x0000 //RX_FDEQ_BIN_9 +230 0x0000 //RX_FDEQ_BIN_10 +231 0x0000 //RX_FDEQ_BIN_11 +232 0x0000 //RX_FDEQ_BIN_12 +233 0x0000 //RX_FDEQ_BIN_13 +234 0x0000 //RX_FDEQ_BIN_14 +235 0x0000 //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x0000 //RX_FDEQ_RESRV_0 +245 0x0000 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0030 //RX_FDDRC_BAND_MARGIN_1 +248 0x0050 //RX_FDDRC_BAND_MARGIN_2 +249 0x0080 //RX_FDDRC_BAND_MARGIN_3 +250 0x0004 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x5000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x6400 //RX_FDDRC_THRD_3_2 +258 0x6400 //RX_FDDRC_THRD_3_3 +259 0x2000 //RX_FDDRC_SLANT_0_0 +260 0x2000 //RX_FDDRC_SLANT_0_1 +261 0x2000 //RX_FDDRC_SLANT_0_2 +262 0x2000 //RX_FDDRC_SLANT_0_3 +263 0x2000 //RX_FDDRC_SLANT_1_0 +264 0x2000 //RX_FDDRC_SLANT_1_1 +265 0x2000 //RX_FDDRC_SLANT_1_2 +266 0x2000 //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +286 0x0100 //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 #CASE_NAME BLUETOOTH-BT_HAC-VOICE_GENERIC-NB -#PARAM_TYPE TX+RX -#TOTAL_CUSTOM_STEP 7 +#PARAM_MODE FULL +#PARAM_TYPE TX+2RX +#TOTAL_CUSTOM_STEP 7+7 #TX 0 0x0001 //TX_OPERATION_MODE_0 1 0x0001 //TX_OPERATION_MODE_1 @@ -2011,12 +2929,12 @@ 248 0xF800 //TX_THR_SN_EST_6 249 0xF800 //TX_THR_SN_EST_7 250 0x0050 //TX_DELTA_THR_SN_EST_0 -251 0x01A0 //TX_DELTA_THR_SN_EST_1 +251 0x0200 //TX_DELTA_THR_SN_EST_1 252 0x0200 //TX_DELTA_THR_SN_EST_2 -253 0x0200 //TX_DELTA_THR_SN_EST_3 -254 0x0100 //TX_DELTA_THR_SN_EST_4 +253 0x0100 //TX_DELTA_THR_SN_EST_3 +254 0x0200 //TX_DELTA_THR_SN_EST_4 255 0x0200 //TX_DELTA_THR_SN_EST_5 -256 0x0200 //TX_DELTA_THR_SN_EST_6 +256 0x01A0 //TX_DELTA_THR_SN_EST_6 257 0x0200 //TX_DELTA_THR_SN_EST_7 258 0x4000 //TX_LAMBDA_NN_EST_0 259 0x4000 //TX_LAMBDA_NN_EST_1 @@ -2042,29 +2960,29 @@ 279 0x1000 //TX_B_POST_FLT_0 280 0x1000 //TX_B_POST_FLT_1 281 0x0010 //TX_NS_LVL_CTRL_0 -282 0x0012 //TX_NS_LVL_CTRL_1 -283 0x0017 //TX_NS_LVL_CTRL_2 -284 0x0015 //TX_NS_LVL_CTRL_3 +282 0x0017 //TX_NS_LVL_CTRL_1 +283 0x0015 //TX_NS_LVL_CTRL_2 +284 0x0012 //TX_NS_LVL_CTRL_3 285 0x0012 //TX_NS_LVL_CTRL_4 -286 0x0012 //TX_NS_LVL_CTRL_5 -287 0x0011 //TX_NS_LVL_CTRL_6 +286 0x0011 //TX_NS_LVL_CTRL_5 +287 0x0012 //TX_NS_LVL_CTRL_6 288 0x0011 //TX_NS_LVL_CTRL_7 289 0x000F //TX_MIN_GAIN_S_0 -290 0x000F //TX_MIN_GAIN_S_1 -291 0x000D //TX_MIN_GAIN_S_2 +290 0x000D //TX_MIN_GAIN_S_1 +291 0x000F //TX_MIN_GAIN_S_2 292 0x000F //TX_MIN_GAIN_S_3 293 0x000F //TX_MIN_GAIN_S_4 -294 0x000F //TX_MIN_GAIN_S_5 -295 0x0010 //TX_MIN_GAIN_S_6 +294 0x0010 //TX_MIN_GAIN_S_5 +295 0x000F //TX_MIN_GAIN_S_6 296 0x000F //TX_MIN_GAIN_S_7 297 0x4000 //TX_NMOS_SUP 298 0x0000 //TX_NS_MAX_PRI_SNR_TH 299 0x0000 //TX_NMOS_SUP_MENSA 300 0x7FFF //TX_SNRI_SUP_0 -301 0x4000 //TX_SNRI_SUP_1 -302 0x1000 //TX_SNRI_SUP_2 -303 0x4000 //TX_SNRI_SUP_3 -304 0x2400 //TX_SNRI_SUP_4 +301 0x1000 //TX_SNRI_SUP_1 +302 0x4000 //TX_SNRI_SUP_2 +303 0x2400 //TX_SNRI_SUP_3 +304 0x4000 //TX_SNRI_SUP_4 305 0x4000 //TX_SNRI_SUP_5 306 0x4000 //TX_SNRI_SUP_6 307 0x7FFF //TX_SNRI_SUP_7 @@ -2075,19 +2993,19 @@ 312 0x7FFF //TX_A_POST_FILT_0 313 0x2000 //TX_A_POST_FILT_1 314 0x4000 //TX_A_POST_FILT_S_0 -315 0x5000 //TX_A_POST_FILT_S_1 -316 0x2000 //TX_A_POST_FILT_S_2 -317 0x4000 //TX_A_POST_FILT_S_3 -318 0x1000 //TX_A_POST_FILT_S_4 -319 0x3000 //TX_A_POST_FILT_S_5 +315 0x2000 //TX_A_POST_FILT_S_1 +316 0x4000 //TX_A_POST_FILT_S_2 +317 0x1000 //TX_A_POST_FILT_S_3 +318 0x3000 //TX_A_POST_FILT_S_4 +319 0x5000 //TX_A_POST_FILT_S_5 320 0x5000 //TX_A_POST_FILT_S_6 321 0x7000 //TX_A_POST_FILT_S_7 322 0x1000 //TX_B_POST_FILT_0 323 0x1000 //TX_B_POST_FILT_1 324 0x1000 //TX_B_POST_FILT_2 -325 0x1000 //TX_B_POST_FILT_3 -326 0x5000 //TX_B_POST_FILT_4 -327 0x3000 //TX_B_POST_FILT_5 +325 0x5000 //TX_B_POST_FILT_3 +326 0x3000 //TX_B_POST_FILT_4 +327 0x1000 //TX_B_POST_FILT_5 328 0x1000 //TX_B_POST_FILT_6 329 0x2000 //TX_B_POST_FILT_7 330 0x4000 //TX_B_LESSCUT_RTO_S_0 @@ -2100,12 +3018,12 @@ 337 0x7FFF //TX_B_LESSCUT_RTO_S_7 338 0x7E00 //TX_LAMBDA_PFILT 339 0x7D00 //TX_LAMBDA_PFILT_S_0 -340 0x7900 //TX_LAMBDA_PFILT_S_1 -341 0x7400 //TX_LAMBDA_PFILT_S_2 -342 0x7900 //TX_LAMBDA_PFILT_S_3 -343 0x7000 //TX_LAMBDA_PFILT_S_4 +340 0x7400 //TX_LAMBDA_PFILT_S_1 +341 0x7900 //TX_LAMBDA_PFILT_S_2 +342 0x7000 //TX_LAMBDA_PFILT_S_3 +343 0x7D00 //TX_LAMBDA_PFILT_S_4 344 0x7D00 //TX_LAMBDA_PFILT_S_5 -345 0x7D00 //TX_LAMBDA_PFILT_S_6 +345 0x7900 //TX_LAMBDA_PFILT_S_6 346 0x7D00 //TX_LAMBDA_PFILT_S_7 347 0x0200 //TX_K_PEPPER 348 0x0800 //TX_A_PEPPER @@ -2140,10 +3058,10 @@ 377 0x7FFF //TX_NOISE_TH_5_4 378 0x0FA0 //TX_NOISE_TH_6 379 0x000A //TX_MINENOISE_TH -380 0x4000 //TX_MINENOISE_MIC0_TH_MTS -381 0xFFEE //TX_MINENOISE_MIC0_TH_EXP -382 0x6000 //TX_MINENOISE_MIC0_S_TH_MTS -383 0xFFF3 //TX_MINENOISE_MIC0_S_TH_EXP +380 0x4000 //TX_MORENS_TFMASK_TH +381 0xFFEE //TX_DRC_QUIET_FLOOR +382 0x6000 //TX_RATIODTL_CUT_TH +383 0xFFF3 //TX_DT_CUT_K1 384 0x0666 //TX_OUT_ENER_S_TH_CLEAN 385 0x0666 //TX_OUT_ENER_S_TH_LESSCLEAN 386 0x0333 //TX_OUT_ENER_S_TH_NOISY @@ -2151,15 +3069,15 @@ 388 0x1000 //TX_OUT_ENER_TH_SPEECH 389 0x2000 //TX_SN_NPB_GAIN 390 0x0000 //TX_NN_NPB_GAIN -391 0x0000 //TX_CSX_ALPHA_0 -392 0x0000 //TX_CSX_ALPHA_1 -393 0x0000 //TX_CSX_ALPHA_2 -394 0x0000 //TX_CSX_ALPHA_3 -395 0x0800 //TX_MU_ARSP_EST -396 0x00C8 //TX_P_OUTBEAM_MIN_TH +391 0x0000 //TX_POST_MASK_SUP_HSNE +392 0x0000 //TX_TAIL_DET_TH +393 0x0000 //TX_B_LESSCUT_RTO_WTA +394 0x0000 //TX_MEL_G_R +395 0x0800 //TX_SUPHIGH_TH +396 0x00C8 //TX_MASK_G_R 397 0x0002 //TX_EXTRA_NS_L -398 0x0800 //TX_EXTRA_NS_A -399 0x0005 //TX_VR_NOISE_FLOOR_TH +398 0x0800 //TX_C_POST_FLT_MASK +399 0x0005 //TX_A_POST_FLT_WNS 400 0x0148 //TX_MIN_G_LOW300HZ 401 0x0001 //TX_MAXLEVEL_CNG 402 0x00B4 //TX_STN_NOISE_TH @@ -2274,16 +3192,16 @@ 511 0x6666 //TX_MIC_TO_BFGAIN 512 0x0000 //TX_MICTOBFGAIN0 513 0x0000 //TX_FASTMUE_TH -514 0x0000 //TX_DERVB_LEN_0 -515 0x0000 //TX_DERVB_LEN_1 -516 0x0000 //TX_RHO_DERVB -517 0x0000 //TX_MIC_INDX_DERVB -518 0x0000 //TX_MU_DERVB -519 0x0000 //TX_DR_RESRV_0 -520 0x0000 //TX_DR_RESRV_1 -521 0x0000 //TX_DR_RESRV_2 -522 0x0000 //TX_DR_RESRV_3 -523 0x0000 //TX_DR_RESRV_4 +514 0x0000 //TX_DEREVERB_LF_MU +515 0x0000 //TX_DEREVERB_HF_MU +516 0x0000 //TX_DEREVERB_DELAY +517 0x0000 //TX_DEREVERB_COEF_LEN +518 0x0000 //TX_DEREVERB_DNR +519 0x0000 //TX_DEREVERB_ALPHA +520 0x0000 //TX_DEREVERB_BETA +521 0x0000 //TX_GSC_RTOL_TH +522 0x0000 //TX_GSC_RTOH_TH +523 0x0000 //TX_WIDE2_MEANHTH 524 0x0000 //TX_DR_RESRV_5 525 0x0000 //TX_DR_RESRV_6 526 0x0000 //TX_DR_RESRV_7 @@ -2657,8 +3575,73 @@ 894 0xC000 //TX_FASTNS_SSA_THHFL 895 0xCCCC //TX_FASTNS_SSA_THLFH 896 0xD999 //TX_FASTNS_SSA_THHFH +897 0x0000 //TX_SENDFUNC_REG_MICMUTE +898 0x0000 //TX_SENDFUNC_REG_MICMUTE1 +899 0x0000 //TX_MICMUTE_RATIO_THR +900 0x0000 //TX_MICMUTE_AMP_THR +901 0x0000 //TX_MICMUTE_HPF_IND +902 0x0000 //TX_MICMUTE_LOG_EYR_TH +903 0x0000 //TX_MICMUTE_CVG_TIME +904 0x0000 //TX_MICMUTE_RELEASE_TIME +905 0x0000 //TX_MIC_VOLUME_MIC0MUTE +906 0x0000 //TX_MICMUTE_EPD_OFFSET_0 +907 0x0000 //TX_MICMUTE_FRQ_AEC_L +908 0x0000 //TX_MICMUTE_EAD_THR +909 0x0000 //TX_MICMUTE_LAMBDA_CB_NLE +910 0x0000 //TX_MICMUTE_LAMBDA_RE_EST +911 0x0000 //TX_DTD_THR1_MICMUTE_0 +912 0x0000 //TX_DTD_THR1_MICMUTE_1 +913 0x0000 //TX_DTD_THR1_MICMUTE_2 +914 0x0000 //TX_DTD_THR1_MICMUTE_3 +915 0x0000 //TX_DTD_THR2_MICMUTE_0 +916 0x0000 //TX_MICMUTE_MIN_EQ_RE_EST_0 +917 0x0000 //TX_MICMUTE_MIN_EQ_RE_EST_1 +918 0x0000 //TX_MICMUTE_MIN_EQ_RE_EST_2 +919 0x0000 //TX_MICMUTE_MIN_EQ_RE_EST_3 +920 0x0000 //TX_MICMUTE_MIN_EQ_RE_EST_4 +921 0x0000 //TX_MICMUTE_C_POST_FLT +922 0x0000 //TX_MICMUTE_DT_CUT_K +923 0x0000 //TX_MICMUTE_DT_CUT_THR +924 0x0000 //TX_MICMUTE_DT_CUT_K2 +925 0x0000 //TX_MICMUTE_DT_CUT_THR2 +926 0x0000 //TX_MICMUTE_DT2_HOLD_N +927 0x0000 //TX_MICMUTE_RATIODTH_THCUT +928 0x0000 //TX_MICMUTE_B_POST_FLT_ECHOL +929 0x0000 //TX_MICMUTE_B_POST_FLT_ECHOH +930 0x0000 //TX_MICMUTE_C_POST_FLT_MASK +931 0x0000 //TX_MICMUTE_RATIODTL_CUT_TH +932 0x0000 //TX_MICMUTE_DT_CUT_K1 +933 0x0000 //TX_MICMUTE_N2_SN_EST +934 0x0000 //TX_MICMUTE_THR_SN_EST_0 +935 0x0000 //TX_MICMUTE_MIN_G_CTRL_0 +936 0x0000 //TX_MICMUTE_A_POST_FILT_S_0 +937 0x0000 //TX_MICMUTE_B_POST_FILT_0 +938 0x0000 //TX_MIC1RUB_AMP_THR +939 0x0000 //TX_MIC1MUTE_RATIO_THR +940 0x0000 //TX_MIC1MUTE_AMP_THR +941 0x0000 //TX_MIC1MUTE_CVG_TIME +942 0x0000 //TX_MIC1MUTE_RELEASE_TIME +943 0x0000 //TX_AMS_RESRV_01 +944 0x0000 //TX_AMS_RESRV_02 +945 0x0000 //TX_AMS_RESRV_03 +946 0x0000 //TX_AMS_RESRV_04 +947 0x0000 //TX_AMS_RESRV_05 +948 0x0000 //TX_AMS_RESRV_06 +949 0x0000 //TX_AMS_RESRV_07 +950 0x0000 //TX_AMS_RESRV_08 +951 0x0000 //TX_AMS_RESRV_09 +952 0x0000 //TX_AMS_RESRV_10 +953 0x0000 //TX_AMS_RESRV_11 +954 0x0000 //TX_AMS_RESRV_12 +955 0x0000 //TX_AMS_RESRV_13 +956 0x0000 //TX_AMS_RESRV_14 +957 0x0000 //TX_AMS_RESRV_15 +958 0x0000 //TX_AMS_RESRV_16 +959 0x0000 //TX_AMS_RESRV_17 +960 0x0000 //TX_AMS_RESRV_18 +961 0x0000 //TX_AMS_RESRV_19 #RX -0 0x006C //RX_RECVFUNC_MODE_0 +0 0x206C //RX_RECVFUNC_MODE_0 1 0x0000 //RX_RECVFUNC_MODE_1 2 0x0000 //RX_SAMPLINGFREQ_SIG 3 0x0000 //RX_SAMPLINGFREQ_PROC @@ -3508,10 +4491,862 @@ 110 0x0000 //RX_FDDRC_RESRV_0 129 0x0100 //RX_SPK_VOL 130 0x0000 //RX_VOL_RESRV_0 +#RX 2 +157 0x206C //RX_RECVFUNC_MODE_0 +158 0x0000 //RX_RECVFUNC_MODE_1 +159 0x0000 //RX_SAMPLINGFREQ_SIG +160 0x0000 //RX_SAMPLINGFREQ_PROC +161 0x000A //RX_FRAME_SZ +162 0x0000 //RX_DELAY_OPT +163 0x3000 //RX_TDDRC_ALPHA_UP_1 +164 0x3000 //RX_TDDRC_ALPHA_UP_2 +165 0x3000 //RX_TDDRC_ALPHA_UP_3 +166 0x3000 //RX_TDDRC_ALPHA_UP_4 +167 0x0800 //RX_PGA +168 0x7FFF //RX_A_HP +169 0x0000 //RX_B_PE +170 0x3800 //RX_THR_PITCH_DET_0 +171 0x3000 //RX_THR_PITCH_DET_1 +172 0x2800 //RX_THR_PITCH_DET_2 +173 0x0008 //RX_PITCH_BFR_LEN +174 0x0003 //RX_SBD_PITCH_DET +175 0x0100 //RX_PP_RESRV_0 +176 0x0020 //RX_PP_RESRV_1 +177 0x0600 //RX_N_SN_EST +178 0x000C //RX_N2_SN_EST +179 0x0010 //RX_NS_LVL_CTRL +180 0xF800 //RX_THR_SN_EST +181 0x7CCD //RX_LAMBDA_PFILT +182 0x000A //RX_FENS_RESRV_0 +183 0x0190 //RX_FENS_RESRV_1 +184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +187 0x0002 //RX_EXTRA_NS_L +188 0x0800 //RX_EXTRA_NS_A +189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +190 0x7FFF //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +192 0x199A //RX_A_POST_FLT +193 0x0000 //RX_LMT_THRD +194 0x4000 //RX_LMT_ALPHA +195 0x0014 //RX_FDEQ_SUBNUM +196 0x4848 //RX_FDEQ_GAIN_0 +197 0x4848 //RX_FDEQ_GAIN_1 +198 0x4848 //RX_FDEQ_GAIN_2 +199 0x4848 //RX_FDEQ_GAIN_3 +200 0x4848 //RX_FDEQ_GAIN_4 +201 0x4848 //RX_FDEQ_GAIN_5 +202 0x4444 //RX_FDEQ_GAIN_6 +203 0x4040 //RX_FDEQ_GAIN_7 +204 0x4040 //RX_FDEQ_GAIN_8 +205 0x4040 //RX_FDEQ_GAIN_9 +206 0x4848 //RX_FDEQ_GAIN_10 +207 0x4848 //RX_FDEQ_GAIN_11 +208 0x4848 //RX_FDEQ_GAIN_12 +209 0x4848 //RX_FDEQ_GAIN_13 +210 0x4848 //RX_FDEQ_GAIN_14 +211 0x4848 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0202 //RX_FDEQ_BIN_0 +221 0x0203 //RX_FDEQ_BIN_1 +222 0x0303 //RX_FDEQ_BIN_2 +223 0x0304 //RX_FDEQ_BIN_3 +224 0x0405 //RX_FDEQ_BIN_4 +225 0x0506 //RX_FDEQ_BIN_5 +226 0x0708 //RX_FDEQ_BIN_6 +227 0x090A //RX_FDEQ_BIN_7 +228 0x0B0C //RX_FDEQ_BIN_8 +229 0x0D0E //RX_FDEQ_BIN_9 +230 0x0000 //RX_FDEQ_BIN_10 +231 0x0000 //RX_FDEQ_BIN_11 +232 0x0000 //RX_FDEQ_BIN_12 +233 0x0000 //RX_FDEQ_BIN_13 +234 0x0000 //RX_FDEQ_BIN_14 +235 0x0000 //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x4000 //RX_FDEQ_RESRV_0 +245 0x0320 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0030 //RX_FDDRC_BAND_MARGIN_1 +248 0x0050 //RX_FDDRC_BAND_MARGIN_2 +249 0x0080 //RX_FDDRC_BAND_MARGIN_3 +250 0x0007 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x5000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x6400 //RX_FDDRC_THRD_3_2 +258 0x6400 //RX_FDDRC_THRD_3_3 +259 0x2000 //RX_FDDRC_SLANT_0_0 +260 0x2000 //RX_FDDRC_SLANT_0_1 +261 0x2000 //RX_FDDRC_SLANT_0_2 +262 0x2000 //RX_FDDRC_SLANT_0_3 +263 0x5333 //RX_FDDRC_SLANT_1_0 +264 0x5333 //RX_FDDRC_SLANT_1_1 +265 0x5333 //RX_FDDRC_SLANT_1_2 +266 0x5333 //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +268 0x0000 //RX_FILTINDX +269 0x0000 //RX_TDDRC_THRD_0 +270 0x0000 //RX_TDDRC_THRD_1 +271 0x7FFF //RX_TDDRC_THRD_2 +272 0x7FFF //RX_TDDRC_THRD_3 +273 0x7FFF //RX_TDDRC_SLANT_0 +274 0x7EB8 //RX_TDDRC_SLANT_1 +275 0x3000 //RX_TDDRC_ALPHA_UP_0 +276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x199A //RX_TDDRC_HMNC_GAIN +279 0x0001 //RX_TDDRC_SMT_FLAG +280 0x0CCD //RX_TDDRC_SMT_W +281 0x017F //RX_TDDRC_DRC_GAIN +282 0x7C00 //RX_LAMBDA_PKA_FP +283 0x2000 //RX_TPKA_FP +284 0x2000 //RX_MIN_G_FP +285 0x0080 //RX_MAX_G_FP +286 0x0100 //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 +288 0x0000 //RX_MAXLEVEL_CNG +289 0x3000 //RX_BWE_UV_TH +290 0x3000 //RX_BWE_UV_TH2 +291 0x1800 //RX_BWE_UV_TH3 +292 0x1000 //RX_BWE_V_TH +293 0x04CD //RX_BWE_GAIN1_V_TH1 +294 0x0F33 //RX_BWE_GAIN1_V_TH2 +295 0x7333 //RX_BWE_UV_EQ +296 0x199A //RX_BWE_V_EQ +297 0x7333 //RX_BWE_TONE_TH +298 0x0004 //RX_BWE_UV_HOLD_T +299 0x6CCD //RX_BWE_GAIN2_ALPHA +300 0x799A //RX_BWE_GAIN3_ALPHA +301 0x001E //RX_BWE_CUTOFF +302 0x3000 //RX_BWE_GAINFILL +303 0x3200 //RX_BWE_MAXTH_TONE +304 0x2000 //RX_BWE_EQ_0 +305 0x2000 //RX_BWE_EQ_1 +306 0x2000 //RX_BWE_EQ_2 +307 0x2000 //RX_BWE_EQ_3 +308 0x2000 //RX_BWE_EQ_4 +309 0x2000 //RX_BWE_EQ_5 +310 0x2000 //RX_BWE_EQ_6 +311 0x0000 //RX_BWE_RESRV_0 +312 0x0000 //RX_BWE_RESRV_1 +313 0x0000 //RX_BWE_RESRV_2 +#VOL 0 +163 0x3000 //RX_TDDRC_ALPHA_UP_1 +164 0x3000 //RX_TDDRC_ALPHA_UP_2 +165 0x3000 //RX_TDDRC_ALPHA_UP_3 +166 0x3000 //RX_TDDRC_ALPHA_UP_4 +184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +190 0x7FFF //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +269 0x0000 //RX_TDDRC_THRD_0 +270 0x0000 //RX_TDDRC_THRD_1 +271 0x7FFF //RX_TDDRC_THRD_2 +272 0x7FFF //RX_TDDRC_THRD_3 +273 0x7FFF //RX_TDDRC_SLANT_0 +274 0x7EB8 //RX_TDDRC_SLANT_1 +275 0x3000 //RX_TDDRC_ALPHA_UP_0 +276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x199A //RX_TDDRC_HMNC_GAIN +279 0x0001 //RX_TDDRC_SMT_FLAG +280 0x0CCD //RX_TDDRC_SMT_W +281 0x017F //RX_TDDRC_DRC_GAIN +195 0x0014 //RX_FDEQ_SUBNUM +196 0x4848 //RX_FDEQ_GAIN_0 +197 0x4848 //RX_FDEQ_GAIN_1 +198 0x4848 //RX_FDEQ_GAIN_2 +199 0x4848 //RX_FDEQ_GAIN_3 +200 0x4848 //RX_FDEQ_GAIN_4 +201 0x4848 //RX_FDEQ_GAIN_5 +202 0x4444 //RX_FDEQ_GAIN_6 +203 0x4040 //RX_FDEQ_GAIN_7 +204 0x4040 //RX_FDEQ_GAIN_8 +205 0x4040 //RX_FDEQ_GAIN_9 +206 0x4848 //RX_FDEQ_GAIN_10 +207 0x4848 //RX_FDEQ_GAIN_11 +208 0x4848 //RX_FDEQ_GAIN_12 +209 0x4848 //RX_FDEQ_GAIN_13 +210 0x4848 //RX_FDEQ_GAIN_14 +211 0x4848 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0202 //RX_FDEQ_BIN_0 +221 0x0203 //RX_FDEQ_BIN_1 +222 0x0303 //RX_FDEQ_BIN_2 +223 0x0304 //RX_FDEQ_BIN_3 +224 0x0405 //RX_FDEQ_BIN_4 +225 0x0506 //RX_FDEQ_BIN_5 +226 0x0708 //RX_FDEQ_BIN_6 +227 0x090A //RX_FDEQ_BIN_7 +228 0x0B0C //RX_FDEQ_BIN_8 +229 0x0D0E //RX_FDEQ_BIN_9 +230 0x0000 //RX_FDEQ_BIN_10 +231 0x0000 //RX_FDEQ_BIN_11 +232 0x0000 //RX_FDEQ_BIN_12 +233 0x0000 //RX_FDEQ_BIN_13 +234 0x0000 //RX_FDEQ_BIN_14 +235 0x0000 //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x4000 //RX_FDEQ_RESRV_0 +245 0x0320 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0030 //RX_FDDRC_BAND_MARGIN_1 +248 0x0050 //RX_FDDRC_BAND_MARGIN_2 +249 0x0080 //RX_FDDRC_BAND_MARGIN_3 +250 0x0007 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x5000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x6400 //RX_FDDRC_THRD_3_2 +258 0x6400 //RX_FDDRC_THRD_3_3 +259 0x2000 //RX_FDDRC_SLANT_0_0 +260 0x2000 //RX_FDDRC_SLANT_0_1 +261 0x2000 //RX_FDDRC_SLANT_0_2 +262 0x2000 //RX_FDDRC_SLANT_0_3 +263 0x5333 //RX_FDDRC_SLANT_1_0 +264 0x5333 //RX_FDDRC_SLANT_1_1 +265 0x5333 //RX_FDDRC_SLANT_1_2 +266 0x5333 //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +286 0x0100 //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 +#VOL 1 +163 0x3000 //RX_TDDRC_ALPHA_UP_1 +164 0x3000 //RX_TDDRC_ALPHA_UP_2 +165 0x3000 //RX_TDDRC_ALPHA_UP_3 +166 0x3000 //RX_TDDRC_ALPHA_UP_4 +184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +190 0x7FFF //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +269 0x0000 //RX_TDDRC_THRD_0 +270 0x0000 //RX_TDDRC_THRD_1 +271 0x7FFF //RX_TDDRC_THRD_2 +272 0x7FFF //RX_TDDRC_THRD_3 +273 0x7FFF //RX_TDDRC_SLANT_0 +274 0x7EB8 //RX_TDDRC_SLANT_1 +275 0x3000 //RX_TDDRC_ALPHA_UP_0 +276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x199A //RX_TDDRC_HMNC_GAIN +279 0x0001 //RX_TDDRC_SMT_FLAG +280 0x0CCD //RX_TDDRC_SMT_W +281 0x017F //RX_TDDRC_DRC_GAIN +195 0x0014 //RX_FDEQ_SUBNUM +196 0x4848 //RX_FDEQ_GAIN_0 +197 0x4848 //RX_FDEQ_GAIN_1 +198 0x4848 //RX_FDEQ_GAIN_2 +199 0x4848 //RX_FDEQ_GAIN_3 +200 0x4848 //RX_FDEQ_GAIN_4 +201 0x4848 //RX_FDEQ_GAIN_5 +202 0x4444 //RX_FDEQ_GAIN_6 +203 0x4040 //RX_FDEQ_GAIN_7 +204 0x4040 //RX_FDEQ_GAIN_8 +205 0x4040 //RX_FDEQ_GAIN_9 +206 0x4848 //RX_FDEQ_GAIN_10 +207 0x4848 //RX_FDEQ_GAIN_11 +208 0x4848 //RX_FDEQ_GAIN_12 +209 0x4848 //RX_FDEQ_GAIN_13 +210 0x4848 //RX_FDEQ_GAIN_14 +211 0x4848 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0202 //RX_FDEQ_BIN_0 +221 0x0203 //RX_FDEQ_BIN_1 +222 0x0303 //RX_FDEQ_BIN_2 +223 0x0304 //RX_FDEQ_BIN_3 +224 0x0405 //RX_FDEQ_BIN_4 +225 0x0506 //RX_FDEQ_BIN_5 +226 0x0708 //RX_FDEQ_BIN_6 +227 0x090A //RX_FDEQ_BIN_7 +228 0x0B0C //RX_FDEQ_BIN_8 +229 0x0D0E //RX_FDEQ_BIN_9 +230 0x0000 //RX_FDEQ_BIN_10 +231 0x0000 //RX_FDEQ_BIN_11 +232 0x0000 //RX_FDEQ_BIN_12 +233 0x0000 //RX_FDEQ_BIN_13 +234 0x0000 //RX_FDEQ_BIN_14 +235 0x0000 //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x4000 //RX_FDEQ_RESRV_0 +245 0x0320 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0030 //RX_FDDRC_BAND_MARGIN_1 +248 0x0050 //RX_FDDRC_BAND_MARGIN_2 +249 0x0080 //RX_FDDRC_BAND_MARGIN_3 +250 0x0007 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x5000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x6400 //RX_FDDRC_THRD_3_2 +258 0x6400 //RX_FDDRC_THRD_3_3 +259 0x2000 //RX_FDDRC_SLANT_0_0 +260 0x2000 //RX_FDDRC_SLANT_0_1 +261 0x2000 //RX_FDDRC_SLANT_0_2 +262 0x2000 //RX_FDDRC_SLANT_0_3 +263 0x5333 //RX_FDDRC_SLANT_1_0 +264 0x5333 //RX_FDDRC_SLANT_1_1 +265 0x5333 //RX_FDDRC_SLANT_1_2 +266 0x5333 //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +286 0x0100 //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 +#VOL 2 +163 0x3000 //RX_TDDRC_ALPHA_UP_1 +164 0x3000 //RX_TDDRC_ALPHA_UP_2 +165 0x3000 //RX_TDDRC_ALPHA_UP_3 +166 0x3000 //RX_TDDRC_ALPHA_UP_4 +184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +190 0x7FFF //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +269 0x0000 //RX_TDDRC_THRD_0 +270 0x0000 //RX_TDDRC_THRD_1 +271 0x7FFF //RX_TDDRC_THRD_2 +272 0x7FFF //RX_TDDRC_THRD_3 +273 0x7FFF //RX_TDDRC_SLANT_0 +274 0x7EB8 //RX_TDDRC_SLANT_1 +275 0x3000 //RX_TDDRC_ALPHA_UP_0 +276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x199A //RX_TDDRC_HMNC_GAIN +279 0x0001 //RX_TDDRC_SMT_FLAG +280 0x0CCD //RX_TDDRC_SMT_W +281 0x017F //RX_TDDRC_DRC_GAIN +195 0x0014 //RX_FDEQ_SUBNUM +196 0x4848 //RX_FDEQ_GAIN_0 +197 0x4848 //RX_FDEQ_GAIN_1 +198 0x4848 //RX_FDEQ_GAIN_2 +199 0x4848 //RX_FDEQ_GAIN_3 +200 0x4848 //RX_FDEQ_GAIN_4 +201 0x4848 //RX_FDEQ_GAIN_5 +202 0x4444 //RX_FDEQ_GAIN_6 +203 0x4040 //RX_FDEQ_GAIN_7 +204 0x4040 //RX_FDEQ_GAIN_8 +205 0x4040 //RX_FDEQ_GAIN_9 +206 0x4848 //RX_FDEQ_GAIN_10 +207 0x4848 //RX_FDEQ_GAIN_11 +208 0x4848 //RX_FDEQ_GAIN_12 +209 0x4848 //RX_FDEQ_GAIN_13 +210 0x4848 //RX_FDEQ_GAIN_14 +211 0x4848 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0202 //RX_FDEQ_BIN_0 +221 0x0203 //RX_FDEQ_BIN_1 +222 0x0303 //RX_FDEQ_BIN_2 +223 0x0304 //RX_FDEQ_BIN_3 +224 0x0405 //RX_FDEQ_BIN_4 +225 0x0506 //RX_FDEQ_BIN_5 +226 0x0708 //RX_FDEQ_BIN_6 +227 0x090A //RX_FDEQ_BIN_7 +228 0x0B0C //RX_FDEQ_BIN_8 +229 0x0D0E //RX_FDEQ_BIN_9 +230 0x0000 //RX_FDEQ_BIN_10 +231 0x0000 //RX_FDEQ_BIN_11 +232 0x0000 //RX_FDEQ_BIN_12 +233 0x0000 //RX_FDEQ_BIN_13 +234 0x0000 //RX_FDEQ_BIN_14 +235 0x0000 //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x4000 //RX_FDEQ_RESRV_0 +245 0x0320 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0030 //RX_FDDRC_BAND_MARGIN_1 +248 0x0050 //RX_FDDRC_BAND_MARGIN_2 +249 0x0080 //RX_FDDRC_BAND_MARGIN_3 +250 0x0007 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x5000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x6400 //RX_FDDRC_THRD_3_2 +258 0x6400 //RX_FDDRC_THRD_3_3 +259 0x2000 //RX_FDDRC_SLANT_0_0 +260 0x2000 //RX_FDDRC_SLANT_0_1 +261 0x2000 //RX_FDDRC_SLANT_0_2 +262 0x2000 //RX_FDDRC_SLANT_0_3 +263 0x5333 //RX_FDDRC_SLANT_1_0 +264 0x5333 //RX_FDDRC_SLANT_1_1 +265 0x5333 //RX_FDDRC_SLANT_1_2 +266 0x5333 //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +286 0x0100 //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 +#VOL 3 +163 0x3000 //RX_TDDRC_ALPHA_UP_1 +164 0x3000 //RX_TDDRC_ALPHA_UP_2 +165 0x3000 //RX_TDDRC_ALPHA_UP_3 +166 0x3000 //RX_TDDRC_ALPHA_UP_4 +184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +190 0x7FFF //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +269 0x0000 //RX_TDDRC_THRD_0 +270 0x0000 //RX_TDDRC_THRD_1 +271 0x7FFF //RX_TDDRC_THRD_2 +272 0x7FFF //RX_TDDRC_THRD_3 +273 0x7FFF //RX_TDDRC_SLANT_0 +274 0x7EB8 //RX_TDDRC_SLANT_1 +275 0x3000 //RX_TDDRC_ALPHA_UP_0 +276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x199A //RX_TDDRC_HMNC_GAIN +279 0x0001 //RX_TDDRC_SMT_FLAG +280 0x0CCD //RX_TDDRC_SMT_W +281 0x017F //RX_TDDRC_DRC_GAIN +195 0x0014 //RX_FDEQ_SUBNUM +196 0x4848 //RX_FDEQ_GAIN_0 +197 0x4848 //RX_FDEQ_GAIN_1 +198 0x4848 //RX_FDEQ_GAIN_2 +199 0x4848 //RX_FDEQ_GAIN_3 +200 0x4848 //RX_FDEQ_GAIN_4 +201 0x4848 //RX_FDEQ_GAIN_5 +202 0x4444 //RX_FDEQ_GAIN_6 +203 0x4040 //RX_FDEQ_GAIN_7 +204 0x4040 //RX_FDEQ_GAIN_8 +205 0x4040 //RX_FDEQ_GAIN_9 +206 0x4848 //RX_FDEQ_GAIN_10 +207 0x4848 //RX_FDEQ_GAIN_11 +208 0x4848 //RX_FDEQ_GAIN_12 +209 0x4848 //RX_FDEQ_GAIN_13 +210 0x4848 //RX_FDEQ_GAIN_14 +211 0x4848 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0202 //RX_FDEQ_BIN_0 +221 0x0203 //RX_FDEQ_BIN_1 +222 0x0303 //RX_FDEQ_BIN_2 +223 0x0304 //RX_FDEQ_BIN_3 +224 0x0405 //RX_FDEQ_BIN_4 +225 0x0506 //RX_FDEQ_BIN_5 +226 0x0708 //RX_FDEQ_BIN_6 +227 0x090A //RX_FDEQ_BIN_7 +228 0x0B0C //RX_FDEQ_BIN_8 +229 0x0D0E //RX_FDEQ_BIN_9 +230 0x0000 //RX_FDEQ_BIN_10 +231 0x0000 //RX_FDEQ_BIN_11 +232 0x0000 //RX_FDEQ_BIN_12 +233 0x0000 //RX_FDEQ_BIN_13 +234 0x0000 //RX_FDEQ_BIN_14 +235 0x0000 //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x4000 //RX_FDEQ_RESRV_0 +245 0x0320 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0030 //RX_FDDRC_BAND_MARGIN_1 +248 0x0050 //RX_FDDRC_BAND_MARGIN_2 +249 0x0080 //RX_FDDRC_BAND_MARGIN_3 +250 0x0007 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x5000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x6400 //RX_FDDRC_THRD_3_2 +258 0x6400 //RX_FDDRC_THRD_3_3 +259 0x2000 //RX_FDDRC_SLANT_0_0 +260 0x2000 //RX_FDDRC_SLANT_0_1 +261 0x2000 //RX_FDDRC_SLANT_0_2 +262 0x2000 //RX_FDDRC_SLANT_0_3 +263 0x5333 //RX_FDDRC_SLANT_1_0 +264 0x5333 //RX_FDDRC_SLANT_1_1 +265 0x5333 //RX_FDDRC_SLANT_1_2 +266 0x5333 //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +286 0x0100 //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 +#VOL 4 +163 0x3000 //RX_TDDRC_ALPHA_UP_1 +164 0x3000 //RX_TDDRC_ALPHA_UP_2 +165 0x3000 //RX_TDDRC_ALPHA_UP_3 +166 0x3000 //RX_TDDRC_ALPHA_UP_4 +184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +190 0x7FFF //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +269 0x0000 //RX_TDDRC_THRD_0 +270 0x0000 //RX_TDDRC_THRD_1 +271 0x7FFF //RX_TDDRC_THRD_2 +272 0x7FFF //RX_TDDRC_THRD_3 +273 0x7FFF //RX_TDDRC_SLANT_0 +274 0x7EB8 //RX_TDDRC_SLANT_1 +275 0x3000 //RX_TDDRC_ALPHA_UP_0 +276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x199A //RX_TDDRC_HMNC_GAIN +279 0x0001 //RX_TDDRC_SMT_FLAG +280 0x0CCD //RX_TDDRC_SMT_W +281 0x017F //RX_TDDRC_DRC_GAIN +195 0x0014 //RX_FDEQ_SUBNUM +196 0x4848 //RX_FDEQ_GAIN_0 +197 0x4848 //RX_FDEQ_GAIN_1 +198 0x4848 //RX_FDEQ_GAIN_2 +199 0x4848 //RX_FDEQ_GAIN_3 +200 0x4848 //RX_FDEQ_GAIN_4 +201 0x4848 //RX_FDEQ_GAIN_5 +202 0x4444 //RX_FDEQ_GAIN_6 +203 0x4040 //RX_FDEQ_GAIN_7 +204 0x4040 //RX_FDEQ_GAIN_8 +205 0x4040 //RX_FDEQ_GAIN_9 +206 0x4848 //RX_FDEQ_GAIN_10 +207 0x4848 //RX_FDEQ_GAIN_11 +208 0x4848 //RX_FDEQ_GAIN_12 +209 0x4848 //RX_FDEQ_GAIN_13 +210 0x4848 //RX_FDEQ_GAIN_14 +211 0x4848 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0202 //RX_FDEQ_BIN_0 +221 0x0203 //RX_FDEQ_BIN_1 +222 0x0303 //RX_FDEQ_BIN_2 +223 0x0304 //RX_FDEQ_BIN_3 +224 0x0405 //RX_FDEQ_BIN_4 +225 0x0506 //RX_FDEQ_BIN_5 +226 0x0708 //RX_FDEQ_BIN_6 +227 0x090A //RX_FDEQ_BIN_7 +228 0x0B0C //RX_FDEQ_BIN_8 +229 0x0D0E //RX_FDEQ_BIN_9 +230 0x0000 //RX_FDEQ_BIN_10 +231 0x0000 //RX_FDEQ_BIN_11 +232 0x0000 //RX_FDEQ_BIN_12 +233 0x0000 //RX_FDEQ_BIN_13 +234 0x0000 //RX_FDEQ_BIN_14 +235 0x0000 //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x4000 //RX_FDEQ_RESRV_0 +245 0x0320 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0030 //RX_FDDRC_BAND_MARGIN_1 +248 0x0050 //RX_FDDRC_BAND_MARGIN_2 +249 0x0080 //RX_FDDRC_BAND_MARGIN_3 +250 0x0007 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x5000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x6400 //RX_FDDRC_THRD_3_2 +258 0x6400 //RX_FDDRC_THRD_3_3 +259 0x2000 //RX_FDDRC_SLANT_0_0 +260 0x2000 //RX_FDDRC_SLANT_0_1 +261 0x2000 //RX_FDDRC_SLANT_0_2 +262 0x2000 //RX_FDDRC_SLANT_0_3 +263 0x5333 //RX_FDDRC_SLANT_1_0 +264 0x5333 //RX_FDDRC_SLANT_1_1 +265 0x5333 //RX_FDDRC_SLANT_1_2 +266 0x5333 //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +286 0x0100 //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 +#VOL 5 +163 0x3000 //RX_TDDRC_ALPHA_UP_1 +164 0x3000 //RX_TDDRC_ALPHA_UP_2 +165 0x3000 //RX_TDDRC_ALPHA_UP_3 +166 0x3000 //RX_TDDRC_ALPHA_UP_4 +184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +190 0x7FFF //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +269 0x0000 //RX_TDDRC_THRD_0 +270 0x0000 //RX_TDDRC_THRD_1 +271 0x7FFF //RX_TDDRC_THRD_2 +272 0x7FFF //RX_TDDRC_THRD_3 +273 0x7FFF //RX_TDDRC_SLANT_0 +274 0x7EB8 //RX_TDDRC_SLANT_1 +275 0x3000 //RX_TDDRC_ALPHA_UP_0 +276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x199A //RX_TDDRC_HMNC_GAIN +279 0x0001 //RX_TDDRC_SMT_FLAG +280 0x0CCD //RX_TDDRC_SMT_W +281 0x017F //RX_TDDRC_DRC_GAIN +195 0x0014 //RX_FDEQ_SUBNUM +196 0x4848 //RX_FDEQ_GAIN_0 +197 0x4848 //RX_FDEQ_GAIN_1 +198 0x4848 //RX_FDEQ_GAIN_2 +199 0x4848 //RX_FDEQ_GAIN_3 +200 0x4848 //RX_FDEQ_GAIN_4 +201 0x4848 //RX_FDEQ_GAIN_5 +202 0x4444 //RX_FDEQ_GAIN_6 +203 0x4040 //RX_FDEQ_GAIN_7 +204 0x4040 //RX_FDEQ_GAIN_8 +205 0x4040 //RX_FDEQ_GAIN_9 +206 0x4848 //RX_FDEQ_GAIN_10 +207 0x4848 //RX_FDEQ_GAIN_11 +208 0x4848 //RX_FDEQ_GAIN_12 +209 0x4848 //RX_FDEQ_GAIN_13 +210 0x4848 //RX_FDEQ_GAIN_14 +211 0x4848 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0202 //RX_FDEQ_BIN_0 +221 0x0203 //RX_FDEQ_BIN_1 +222 0x0303 //RX_FDEQ_BIN_2 +223 0x0304 //RX_FDEQ_BIN_3 +224 0x0405 //RX_FDEQ_BIN_4 +225 0x0506 //RX_FDEQ_BIN_5 +226 0x0708 //RX_FDEQ_BIN_6 +227 0x090A //RX_FDEQ_BIN_7 +228 0x0B0C //RX_FDEQ_BIN_8 +229 0x0D0E //RX_FDEQ_BIN_9 +230 0x0000 //RX_FDEQ_BIN_10 +231 0x0000 //RX_FDEQ_BIN_11 +232 0x0000 //RX_FDEQ_BIN_12 +233 0x0000 //RX_FDEQ_BIN_13 +234 0x0000 //RX_FDEQ_BIN_14 +235 0x0000 //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x4000 //RX_FDEQ_RESRV_0 +245 0x0320 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0030 //RX_FDDRC_BAND_MARGIN_1 +248 0x0050 //RX_FDDRC_BAND_MARGIN_2 +249 0x0080 //RX_FDDRC_BAND_MARGIN_3 +250 0x0007 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x5000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x6400 //RX_FDDRC_THRD_3_2 +258 0x6400 //RX_FDDRC_THRD_3_3 +259 0x2000 //RX_FDDRC_SLANT_0_0 +260 0x2000 //RX_FDDRC_SLANT_0_1 +261 0x2000 //RX_FDDRC_SLANT_0_2 +262 0x2000 //RX_FDDRC_SLANT_0_3 +263 0x5333 //RX_FDDRC_SLANT_1_0 +264 0x5333 //RX_FDDRC_SLANT_1_1 +265 0x5333 //RX_FDDRC_SLANT_1_2 +266 0x5333 //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +286 0x0100 //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 +#VOL 6 +163 0x3000 //RX_TDDRC_ALPHA_UP_1 +164 0x3000 //RX_TDDRC_ALPHA_UP_2 +165 0x3000 //RX_TDDRC_ALPHA_UP_3 +166 0x3000 //RX_TDDRC_ALPHA_UP_4 +184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +190 0x7FFF //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +269 0x0000 //RX_TDDRC_THRD_0 +270 0x0000 //RX_TDDRC_THRD_1 +271 0x7FFF //RX_TDDRC_THRD_2 +272 0x7FFF //RX_TDDRC_THRD_3 +273 0x7FFF //RX_TDDRC_SLANT_0 +274 0x7EB8 //RX_TDDRC_SLANT_1 +275 0x3000 //RX_TDDRC_ALPHA_UP_0 +276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x199A //RX_TDDRC_HMNC_GAIN +279 0x0001 //RX_TDDRC_SMT_FLAG +280 0x0CCD //RX_TDDRC_SMT_W +281 0x017F //RX_TDDRC_DRC_GAIN +195 0x0014 //RX_FDEQ_SUBNUM +196 0x4848 //RX_FDEQ_GAIN_0 +197 0x4848 //RX_FDEQ_GAIN_1 +198 0x4848 //RX_FDEQ_GAIN_2 +199 0x4848 //RX_FDEQ_GAIN_3 +200 0x4848 //RX_FDEQ_GAIN_4 +201 0x4848 //RX_FDEQ_GAIN_5 +202 0x4444 //RX_FDEQ_GAIN_6 +203 0x4040 //RX_FDEQ_GAIN_7 +204 0x4040 //RX_FDEQ_GAIN_8 +205 0x4040 //RX_FDEQ_GAIN_9 +206 0x4848 //RX_FDEQ_GAIN_10 +207 0x4848 //RX_FDEQ_GAIN_11 +208 0x4848 //RX_FDEQ_GAIN_12 +209 0x4848 //RX_FDEQ_GAIN_13 +210 0x4848 //RX_FDEQ_GAIN_14 +211 0x4848 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0202 //RX_FDEQ_BIN_0 +221 0x0203 //RX_FDEQ_BIN_1 +222 0x0303 //RX_FDEQ_BIN_2 +223 0x0304 //RX_FDEQ_BIN_3 +224 0x0405 //RX_FDEQ_BIN_4 +225 0x0506 //RX_FDEQ_BIN_5 +226 0x0708 //RX_FDEQ_BIN_6 +227 0x090A //RX_FDEQ_BIN_7 +228 0x0B0C //RX_FDEQ_BIN_8 +229 0x0D0E //RX_FDEQ_BIN_9 +230 0x0000 //RX_FDEQ_BIN_10 +231 0x0000 //RX_FDEQ_BIN_11 +232 0x0000 //RX_FDEQ_BIN_12 +233 0x0000 //RX_FDEQ_BIN_13 +234 0x0000 //RX_FDEQ_BIN_14 +235 0x0000 //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x4000 //RX_FDEQ_RESRV_0 +245 0x0320 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0030 //RX_FDDRC_BAND_MARGIN_1 +248 0x0050 //RX_FDDRC_BAND_MARGIN_2 +249 0x0080 //RX_FDDRC_BAND_MARGIN_3 +250 0x0007 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x5000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x6400 //RX_FDDRC_THRD_3_2 +258 0x6400 //RX_FDDRC_THRD_3_3 +259 0x2000 //RX_FDDRC_SLANT_0_0 +260 0x2000 //RX_FDDRC_SLANT_0_1 +261 0x2000 //RX_FDDRC_SLANT_0_2 +262 0x2000 //RX_FDDRC_SLANT_0_3 +263 0x5333 //RX_FDDRC_SLANT_1_0 +264 0x5333 //RX_FDDRC_SLANT_1_1 +265 0x5333 //RX_FDDRC_SLANT_1_2 +266 0x5333 //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +286 0x0100 //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 #CASE_NAME BLUETOOTH-BT_HAC-VOICE_GENERIC-WB -#PARAM_TYPE TX+RX -#TOTAL_CUSTOM_STEP 7 +#PARAM_MODE FULL +#PARAM_TYPE TX+2RX +#TOTAL_CUSTOM_STEP 7+7 #TX 0 0x0001 //TX_OPERATION_MODE_0 1 0x0001 //TX_OPERATION_MODE_1 @@ -3764,11 +5599,11 @@ 248 0xF800 //TX_THR_SN_EST_6 249 0xF800 //TX_THR_SN_EST_7 250 0x0100 //TX_DELTA_THR_SN_EST_0 -251 0x0200 //TX_DELTA_THR_SN_EST_1 -252 0x0100 //TX_DELTA_THR_SN_EST_2 -253 0x0200 //TX_DELTA_THR_SN_EST_3 +251 0x0100 //TX_DELTA_THR_SN_EST_1 +252 0x0200 //TX_DELTA_THR_SN_EST_2 +253 0x0100 //TX_DELTA_THR_SN_EST_3 254 0x0100 //TX_DELTA_THR_SN_EST_4 -255 0x0100 //TX_DELTA_THR_SN_EST_5 +255 0x0200 //TX_DELTA_THR_SN_EST_5 256 0x0200 //TX_DELTA_THR_SN_EST_6 257 0x0200 //TX_DELTA_THR_SN_EST_7 258 0x4000 //TX_LAMBDA_NN_EST_0 @@ -3796,11 +5631,11 @@ 280 0x1000 //TX_B_POST_FLT_1 281 0x0010 //TX_NS_LVL_CTRL_0 282 0x0014 //TX_NS_LVL_CTRL_1 -283 0x0014 //TX_NS_LVL_CTRL_2 -284 0x0018 //TX_NS_LVL_CTRL_3 -285 0x0016 //TX_NS_LVL_CTRL_4 -286 0x0014 //TX_NS_LVL_CTRL_5 -287 0x0011 //TX_NS_LVL_CTRL_6 +283 0x0018 //TX_NS_LVL_CTRL_2 +284 0x0016 //TX_NS_LVL_CTRL_3 +285 0x0014 //TX_NS_LVL_CTRL_4 +286 0x0011 //TX_NS_LVL_CTRL_5 +287 0x0014 //TX_NS_LVL_CTRL_6 288 0x0011 //TX_NS_LVL_CTRL_7 289 0x000F //TX_MIN_GAIN_S_0 290 0x0010 //TX_MIN_GAIN_S_1 @@ -3818,8 +5653,8 @@ 302 0x4000 //TX_SNRI_SUP_2 303 0x4000 //TX_SNRI_SUP_3 304 0x4000 //TX_SNRI_SUP_4 -305 0x4000 //TX_SNRI_SUP_5 -306 0x50C0 //TX_SNRI_SUP_6 +305 0x50C0 //TX_SNRI_SUP_5 +306 0x4000 //TX_SNRI_SUP_6 307 0x7FFF //TX_SNRI_SUP_7 308 0x7FFF //TX_THR_LFNS 309 0x0018 //TX_G_LFNS @@ -3828,19 +5663,19 @@ 312 0x7FFF //TX_A_POST_FILT_0 313 0x2000 //TX_A_POST_FILT_1 314 0x5000 //TX_A_POST_FILT_S_0 -315 0x6000 //TX_A_POST_FILT_S_1 -316 0x4C00 //TX_A_POST_FILT_S_2 -317 0x4000 //TX_A_POST_FILT_S_3 -318 0x6000 //TX_A_POST_FILT_S_4 -319 0x4000 //TX_A_POST_FILT_S_5 -320 0x5000 //TX_A_POST_FILT_S_6 +315 0x4C00 //TX_A_POST_FILT_S_1 +316 0x4000 //TX_A_POST_FILT_S_2 +317 0x6000 //TX_A_POST_FILT_S_3 +318 0x4000 //TX_A_POST_FILT_S_4 +319 0x5000 //TX_A_POST_FILT_S_5 +320 0x6000 //TX_A_POST_FILT_S_6 321 0x7000 //TX_A_POST_FILT_S_7 322 0x2000 //TX_B_POST_FILT_0 -323 0x1000 //TX_B_POST_FILT_1 +323 0x2000 //TX_B_POST_FILT_1 324 0x2000 //TX_B_POST_FILT_2 -325 0x2000 //TX_B_POST_FILT_3 +325 0x4000 //TX_B_POST_FILT_3 326 0x4000 //TX_B_POST_FILT_4 -327 0x4000 //TX_B_POST_FILT_5 +327 0x1000 //TX_B_POST_FILT_5 328 0x1000 //TX_B_POST_FILT_6 329 0x2000 //TX_B_POST_FILT_7 330 0x4000 //TX_B_LESSCUT_RTO_S_0 @@ -3848,14 +5683,14 @@ 332 0x7FFF //TX_B_LESSCUT_RTO_S_2 333 0x7FFF //TX_B_LESSCUT_RTO_S_3 334 0x7FFF //TX_B_LESSCUT_RTO_S_4 -335 0x7FFF //TX_B_LESSCUT_RTO_S_5 -336 0x6000 //TX_B_LESSCUT_RTO_S_6 +335 0x6000 //TX_B_LESSCUT_RTO_S_5 +336 0x7FFF //TX_B_LESSCUT_RTO_S_6 337 0x7FFF //TX_B_LESSCUT_RTO_S_7 338 0x7C00 //TX_LAMBDA_PFILT 339 0x7C00 //TX_LAMBDA_PFILT_S_0 340 0x7C00 //TX_LAMBDA_PFILT_S_1 -341 0x7C00 //TX_LAMBDA_PFILT_S_2 -342 0x7A00 //TX_LAMBDA_PFILT_S_3 +341 0x7A00 //TX_LAMBDA_PFILT_S_2 +342 0x7C00 //TX_LAMBDA_PFILT_S_3 343 0x7C00 //TX_LAMBDA_PFILT_S_4 344 0x7C00 //TX_LAMBDA_PFILT_S_5 345 0x7C00 //TX_LAMBDA_PFILT_S_6 @@ -3893,10 +5728,10 @@ 377 0x7FFF //TX_NOISE_TH_5_4 378 0x0F0A //TX_NOISE_TH_6 379 0x0033 //TX_MINENOISE_TH -380 0x4000 //TX_MINENOISE_MIC0_TH_MTS -381 0xFFEE //TX_MINENOISE_MIC0_TH_EXP -382 0x6000 //TX_MINENOISE_MIC0_S_TH_MTS -383 0xFFF3 //TX_MINENOISE_MIC0_S_TH_EXP +380 0x4000 //TX_MORENS_TFMASK_TH +381 0xFFEE //TX_DRC_QUIET_FLOOR +382 0x6000 //TX_RATIODTL_CUT_TH +383 0xFFF3 //TX_DT_CUT_K1 384 0x0666 //TX_OUT_ENER_S_TH_CLEAN 385 0x0666 //TX_OUT_ENER_S_TH_LESSCLEAN 386 0x0333 //TX_OUT_ENER_S_TH_NOISY @@ -3904,15 +5739,15 @@ 388 0x0333 //TX_OUT_ENER_TH_SPEECH 389 0x2000 //TX_SN_NPB_GAIN 390 0x0000 //TX_NN_NPB_GAIN -391 0x0000 //TX_CSX_ALPHA_0 -392 0x0000 //TX_CSX_ALPHA_1 -393 0x0000 //TX_CSX_ALPHA_2 -394 0x0000 //TX_CSX_ALPHA_3 -395 0x0800 //TX_MU_ARSP_EST -396 0x00C8 //TX_P_OUTBEAM_MIN_TH +391 0x0000 //TX_POST_MASK_SUP_HSNE +392 0x0000 //TX_TAIL_DET_TH +393 0x0000 //TX_B_LESSCUT_RTO_WTA +394 0x0000 //TX_MEL_G_R +395 0x0800 //TX_SUPHIGH_TH +396 0x00C8 //TX_MASK_G_R 397 0x0002 //TX_EXTRA_NS_L -398 0x0800 //TX_EXTRA_NS_A -399 0x0005 //TX_VR_NOISE_FLOOR_TH +398 0x0800 //TX_C_POST_FLT_MASK +399 0x0005 //TX_A_POST_FLT_WNS 400 0x0148 //TX_MIN_G_LOW300HZ 401 0x0001 //TX_MAXLEVEL_CNG 402 0x00B4 //TX_STN_NOISE_TH @@ -4027,16 +5862,16 @@ 511 0x6666 //TX_MIC_TO_BFGAIN 512 0x0000 //TX_MICTOBFGAIN0 513 0x0000 //TX_FASTMUE_TH -514 0x0000 //TX_DERVB_LEN_0 -515 0x0000 //TX_DERVB_LEN_1 -516 0x0000 //TX_RHO_DERVB -517 0x0000 //TX_MIC_INDX_DERVB -518 0x0000 //TX_MU_DERVB -519 0x0000 //TX_DR_RESRV_0 -520 0x0000 //TX_DR_RESRV_1 -521 0x0000 //TX_DR_RESRV_2 -522 0x0000 //TX_DR_RESRV_3 -523 0x0000 //TX_DR_RESRV_4 +514 0x0000 //TX_DEREVERB_LF_MU +515 0x0000 //TX_DEREVERB_HF_MU +516 0x0000 //TX_DEREVERB_DELAY +517 0x0000 //TX_DEREVERB_COEF_LEN +518 0x0000 //TX_DEREVERB_DNR +519 0x0000 //TX_DEREVERB_ALPHA +520 0x0000 //TX_DEREVERB_BETA +521 0x0000 //TX_GSC_RTOL_TH +522 0x0000 //TX_GSC_RTOH_TH +523 0x0000 //TX_WIDE2_MEANHTH 524 0x0000 //TX_DR_RESRV_5 525 0x0000 //TX_DR_RESRV_6 526 0x0000 //TX_DR_RESRV_7 @@ -4410,8 +6245,73 @@ 894 0xC000 //TX_FASTNS_SSA_THHFL 895 0xCCCC //TX_FASTNS_SSA_THLFH 896 0xD999 //TX_FASTNS_SSA_THHFH +897 0x0000 //TX_SENDFUNC_REG_MICMUTE +898 0x0000 //TX_SENDFUNC_REG_MICMUTE1 +899 0x0000 //TX_MICMUTE_RATIO_THR +900 0x0000 //TX_MICMUTE_AMP_THR +901 0x0000 //TX_MICMUTE_HPF_IND +902 0x0000 //TX_MICMUTE_LOG_EYR_TH +903 0x0000 //TX_MICMUTE_CVG_TIME +904 0x0000 //TX_MICMUTE_RELEASE_TIME +905 0x0000 //TX_MIC_VOLUME_MIC0MUTE +906 0x0000 //TX_MICMUTE_EPD_OFFSET_0 +907 0x0000 //TX_MICMUTE_FRQ_AEC_L +908 0x0000 //TX_MICMUTE_EAD_THR +909 0x0000 //TX_MICMUTE_LAMBDA_CB_NLE +910 0x0000 //TX_MICMUTE_LAMBDA_RE_EST +911 0x0000 //TX_DTD_THR1_MICMUTE_0 +912 0x0000 //TX_DTD_THR1_MICMUTE_1 +913 0x0000 //TX_DTD_THR1_MICMUTE_2 +914 0x0000 //TX_DTD_THR1_MICMUTE_3 +915 0x0000 //TX_DTD_THR2_MICMUTE_0 +916 0x0000 //TX_MICMUTE_MIN_EQ_RE_EST_0 +917 0x0000 //TX_MICMUTE_MIN_EQ_RE_EST_1 +918 0x0000 //TX_MICMUTE_MIN_EQ_RE_EST_2 +919 0x0000 //TX_MICMUTE_MIN_EQ_RE_EST_3 +920 0x0000 //TX_MICMUTE_MIN_EQ_RE_EST_4 +921 0x0000 //TX_MICMUTE_C_POST_FLT +922 0x0000 //TX_MICMUTE_DT_CUT_K +923 0x0000 //TX_MICMUTE_DT_CUT_THR +924 0x0000 //TX_MICMUTE_DT_CUT_K2 +925 0x0000 //TX_MICMUTE_DT_CUT_THR2 +926 0x0000 //TX_MICMUTE_DT2_HOLD_N +927 0x0000 //TX_MICMUTE_RATIODTH_THCUT +928 0x0000 //TX_MICMUTE_B_POST_FLT_ECHOL +929 0x0000 //TX_MICMUTE_B_POST_FLT_ECHOH +930 0x0000 //TX_MICMUTE_C_POST_FLT_MASK +931 0x0000 //TX_MICMUTE_RATIODTL_CUT_TH +932 0x0000 //TX_MICMUTE_DT_CUT_K1 +933 0x0000 //TX_MICMUTE_N2_SN_EST +934 0x0000 //TX_MICMUTE_THR_SN_EST_0 +935 0x0000 //TX_MICMUTE_MIN_G_CTRL_0 +936 0x0000 //TX_MICMUTE_A_POST_FILT_S_0 +937 0x0000 //TX_MICMUTE_B_POST_FILT_0 +938 0x0000 //TX_MIC1RUB_AMP_THR +939 0x0000 //TX_MIC1MUTE_RATIO_THR +940 0x0000 //TX_MIC1MUTE_AMP_THR +941 0x0000 //TX_MIC1MUTE_CVG_TIME +942 0x0000 //TX_MIC1MUTE_RELEASE_TIME +943 0x0000 //TX_AMS_RESRV_01 +944 0x0000 //TX_AMS_RESRV_02 +945 0x0000 //TX_AMS_RESRV_03 +946 0x0000 //TX_AMS_RESRV_04 +947 0x0000 //TX_AMS_RESRV_05 +948 0x0000 //TX_AMS_RESRV_06 +949 0x0000 //TX_AMS_RESRV_07 +950 0x0000 //TX_AMS_RESRV_08 +951 0x0000 //TX_AMS_RESRV_09 +952 0x0000 //TX_AMS_RESRV_10 +953 0x0000 //TX_AMS_RESRV_11 +954 0x0000 //TX_AMS_RESRV_12 +955 0x0000 //TX_AMS_RESRV_13 +956 0x0000 //TX_AMS_RESRV_14 +957 0x0000 //TX_AMS_RESRV_15 +958 0x0000 //TX_AMS_RESRV_16 +959 0x0000 //TX_AMS_RESRV_17 +960 0x0000 //TX_AMS_RESRV_18 +961 0x0000 //TX_AMS_RESRV_19 #RX -0 0x006C //RX_RECVFUNC_MODE_0 +0 0x206C //RX_RECVFUNC_MODE_0 1 0x0000 //RX_RECVFUNC_MODE_1 2 0x0001 //RX_SAMPLINGFREQ_SIG 3 0x0001 //RX_SAMPLINGFREQ_PROC @@ -5261,10 +7161,862 @@ 110 0x0000 //RX_FDDRC_RESRV_0 129 0x0100 //RX_SPK_VOL 130 0x0000 //RX_VOL_RESRV_0 +#RX 2 +157 0x206C //RX_RECVFUNC_MODE_0 +158 0x0000 //RX_RECVFUNC_MODE_1 +159 0x0001 //RX_SAMPLINGFREQ_SIG +160 0x0001 //RX_SAMPLINGFREQ_PROC +161 0x000A //RX_FRAME_SZ +162 0x0000 //RX_DELAY_OPT +163 0x1000 //RX_TDDRC_ALPHA_UP_1 +164 0x1000 //RX_TDDRC_ALPHA_UP_2 +165 0x1000 //RX_TDDRC_ALPHA_UP_3 +166 0x1000 //RX_TDDRC_ALPHA_UP_4 +167 0x0800 //RX_PGA +168 0x7FFF //RX_A_HP +169 0x4000 //RX_B_PE +170 0x3800 //RX_THR_PITCH_DET_0 +171 0x3000 //RX_THR_PITCH_DET_1 +172 0x2800 //RX_THR_PITCH_DET_2 +173 0x0008 //RX_PITCH_BFR_LEN +174 0x0003 //RX_SBD_PITCH_DET +175 0x0100 //RX_PP_RESRV_0 +176 0x0020 //RX_PP_RESRV_1 +177 0x0600 //RX_N_SN_EST +178 0x000C //RX_N2_SN_EST +179 0x0010 //RX_NS_LVL_CTRL +180 0xF800 //RX_THR_SN_EST +181 0x7CCD //RX_LAMBDA_PFILT +182 0x000A //RX_FENS_RESRV_0 +183 0x0190 //RX_FENS_RESRV_1 +184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +187 0x0002 //RX_EXTRA_NS_L +188 0x0800 //RX_EXTRA_NS_A +189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +190 0x7FFF //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +192 0x199A //RX_A_POST_FLT +193 0x0000 //RX_LMT_THRD +194 0x4000 //RX_LMT_ALPHA +195 0x001C //RX_FDEQ_SUBNUM +196 0x4848 //RX_FDEQ_GAIN_0 +197 0x4848 //RX_FDEQ_GAIN_1 +198 0x4848 //RX_FDEQ_GAIN_2 +199 0x4848 //RX_FDEQ_GAIN_3 +200 0x4848 //RX_FDEQ_GAIN_4 +201 0x4848 //RX_FDEQ_GAIN_5 +202 0x4848 //RX_FDEQ_GAIN_6 +203 0x4848 //RX_FDEQ_GAIN_7 +204 0x4848 //RX_FDEQ_GAIN_8 +205 0x3C3C //RX_FDEQ_GAIN_9 +206 0x3C3C //RX_FDEQ_GAIN_10 +207 0x3838 //RX_FDEQ_GAIN_11 +208 0x3838 //RX_FDEQ_GAIN_12 +209 0x3030 //RX_FDEQ_GAIN_13 +210 0x4848 //RX_FDEQ_GAIN_14 +211 0x4848 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0202 //RX_FDEQ_BIN_0 +221 0x0203 //RX_FDEQ_BIN_1 +222 0x0303 //RX_FDEQ_BIN_2 +223 0x0304 //RX_FDEQ_BIN_3 +224 0x0405 //RX_FDEQ_BIN_4 +225 0x0506 //RX_FDEQ_BIN_5 +226 0x0708 //RX_FDEQ_BIN_6 +227 0x090A //RX_FDEQ_BIN_7 +228 0x0B0C //RX_FDEQ_BIN_8 +229 0x0D0E //RX_FDEQ_BIN_9 +230 0x0E0F //RX_FDEQ_BIN_10 +231 0x0F10 //RX_FDEQ_BIN_11 +232 0x1011 //RX_FDEQ_BIN_12 +233 0x1112 //RX_FDEQ_BIN_13 +234 0x0000 //RX_FDEQ_BIN_14 +235 0x0000 //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x4000 //RX_FDEQ_RESRV_0 +245 0x0320 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0030 //RX_FDDRC_BAND_MARGIN_1 +248 0x0050 //RX_FDDRC_BAND_MARGIN_2 +249 0x0080 //RX_FDDRC_BAND_MARGIN_3 +250 0x0007 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x5000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x6400 //RX_FDDRC_THRD_3_2 +258 0x6400 //RX_FDDRC_THRD_3_3 +259 0x2000 //RX_FDDRC_SLANT_0_0 +260 0x2000 //RX_FDDRC_SLANT_0_1 +261 0x2000 //RX_FDDRC_SLANT_0_2 +262 0x2000 //RX_FDDRC_SLANT_0_3 +263 0x5333 //RX_FDDRC_SLANT_1_0 +264 0x5333 //RX_FDDRC_SLANT_1_1 +265 0x5333 //RX_FDDRC_SLANT_1_2 +266 0x5333 //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +268 0x0000 //RX_FILTINDX +269 0x0000 //RX_TDDRC_THRD_0 +270 0x0000 //RX_TDDRC_THRD_1 +271 0x7FFF //RX_TDDRC_THRD_2 +272 0x7FFF //RX_TDDRC_THRD_3 +273 0x7E70 //RX_TDDRC_SLANT_0 +274 0x7FFF //RX_TDDRC_SLANT_1 +275 0x1000 //RX_TDDRC_ALPHA_UP_0 +276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x199A //RX_TDDRC_HMNC_GAIN +279 0x0001 //RX_TDDRC_SMT_FLAG +280 0x0CCD //RX_TDDRC_SMT_W +281 0x0155 //RX_TDDRC_DRC_GAIN +282 0x7C00 //RX_LAMBDA_PKA_FP +283 0x2000 //RX_TPKA_FP +284 0x2000 //RX_MIN_G_FP +285 0x0080 //RX_MAX_G_FP +286 0x0100 //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 +288 0x0000 //RX_MAXLEVEL_CNG +289 0x3000 //RX_BWE_UV_TH +290 0x3000 //RX_BWE_UV_TH2 +291 0x1800 //RX_BWE_UV_TH3 +292 0x1000 //RX_BWE_V_TH +293 0x04CD //RX_BWE_GAIN1_V_TH1 +294 0x0F33 //RX_BWE_GAIN1_V_TH2 +295 0x7333 //RX_BWE_UV_EQ +296 0x199A //RX_BWE_V_EQ +297 0x7333 //RX_BWE_TONE_TH +298 0x0004 //RX_BWE_UV_HOLD_T +299 0x6CCD //RX_BWE_GAIN2_ALPHA +300 0x799A //RX_BWE_GAIN3_ALPHA +301 0x001E //RX_BWE_CUTOFF +302 0x3000 //RX_BWE_GAINFILL +303 0x3200 //RX_BWE_MAXTH_TONE +304 0x2000 //RX_BWE_EQ_0 +305 0x2000 //RX_BWE_EQ_1 +306 0x2000 //RX_BWE_EQ_2 +307 0x2000 //RX_BWE_EQ_3 +308 0x2000 //RX_BWE_EQ_4 +309 0x2000 //RX_BWE_EQ_5 +310 0x2000 //RX_BWE_EQ_6 +311 0x0000 //RX_BWE_RESRV_0 +312 0x0000 //RX_BWE_RESRV_1 +313 0x0000 //RX_BWE_RESRV_2 +#VOL 0 +163 0x1000 //RX_TDDRC_ALPHA_UP_1 +164 0x1000 //RX_TDDRC_ALPHA_UP_2 +165 0x1000 //RX_TDDRC_ALPHA_UP_3 +166 0x1000 //RX_TDDRC_ALPHA_UP_4 +184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +190 0x7FFF //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +269 0x0000 //RX_TDDRC_THRD_0 +270 0x0000 //RX_TDDRC_THRD_1 +271 0x7FFF //RX_TDDRC_THRD_2 +272 0x7FFF //RX_TDDRC_THRD_3 +273 0x7E70 //RX_TDDRC_SLANT_0 +274 0x7FFF //RX_TDDRC_SLANT_1 +275 0x1000 //RX_TDDRC_ALPHA_UP_0 +276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x199A //RX_TDDRC_HMNC_GAIN +279 0x0001 //RX_TDDRC_SMT_FLAG +280 0x0CCD //RX_TDDRC_SMT_W +281 0x0155 //RX_TDDRC_DRC_GAIN +195 0x001C //RX_FDEQ_SUBNUM +196 0x4848 //RX_FDEQ_GAIN_0 +197 0x4848 //RX_FDEQ_GAIN_1 +198 0x4848 //RX_FDEQ_GAIN_2 +199 0x4848 //RX_FDEQ_GAIN_3 +200 0x4848 //RX_FDEQ_GAIN_4 +201 0x4848 //RX_FDEQ_GAIN_5 +202 0x4848 //RX_FDEQ_GAIN_6 +203 0x4848 //RX_FDEQ_GAIN_7 +204 0x4848 //RX_FDEQ_GAIN_8 +205 0x3C3C //RX_FDEQ_GAIN_9 +206 0x3C3C //RX_FDEQ_GAIN_10 +207 0x3838 //RX_FDEQ_GAIN_11 +208 0x3838 //RX_FDEQ_GAIN_12 +209 0x3030 //RX_FDEQ_GAIN_13 +210 0x4848 //RX_FDEQ_GAIN_14 +211 0x4848 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0202 //RX_FDEQ_BIN_0 +221 0x0203 //RX_FDEQ_BIN_1 +222 0x0303 //RX_FDEQ_BIN_2 +223 0x0304 //RX_FDEQ_BIN_3 +224 0x0405 //RX_FDEQ_BIN_4 +225 0x0506 //RX_FDEQ_BIN_5 +226 0x0708 //RX_FDEQ_BIN_6 +227 0x090A //RX_FDEQ_BIN_7 +228 0x0B0C //RX_FDEQ_BIN_8 +229 0x0D0E //RX_FDEQ_BIN_9 +230 0x0E0F //RX_FDEQ_BIN_10 +231 0x0F10 //RX_FDEQ_BIN_11 +232 0x1011 //RX_FDEQ_BIN_12 +233 0x1112 //RX_FDEQ_BIN_13 +234 0x0000 //RX_FDEQ_BIN_14 +235 0x0000 //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x4000 //RX_FDEQ_RESRV_0 +245 0x0320 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0030 //RX_FDDRC_BAND_MARGIN_1 +248 0x0050 //RX_FDDRC_BAND_MARGIN_2 +249 0x0080 //RX_FDDRC_BAND_MARGIN_3 +250 0x0007 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x5000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x6400 //RX_FDDRC_THRD_3_2 +258 0x6400 //RX_FDDRC_THRD_3_3 +259 0x2000 //RX_FDDRC_SLANT_0_0 +260 0x2000 //RX_FDDRC_SLANT_0_1 +261 0x2000 //RX_FDDRC_SLANT_0_2 +262 0x2000 //RX_FDDRC_SLANT_0_3 +263 0x5333 //RX_FDDRC_SLANT_1_0 +264 0x5333 //RX_FDDRC_SLANT_1_1 +265 0x5333 //RX_FDDRC_SLANT_1_2 +266 0x5333 //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +286 0x0100 //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 +#VOL 1 +163 0x1000 //RX_TDDRC_ALPHA_UP_1 +164 0x1000 //RX_TDDRC_ALPHA_UP_2 +165 0x1000 //RX_TDDRC_ALPHA_UP_3 +166 0x1000 //RX_TDDRC_ALPHA_UP_4 +184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +190 0x7FFF //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +269 0x0000 //RX_TDDRC_THRD_0 +270 0x0000 //RX_TDDRC_THRD_1 +271 0x7FFF //RX_TDDRC_THRD_2 +272 0x7FFF //RX_TDDRC_THRD_3 +273 0x7E70 //RX_TDDRC_SLANT_0 +274 0x7FFF //RX_TDDRC_SLANT_1 +275 0x1000 //RX_TDDRC_ALPHA_UP_0 +276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x199A //RX_TDDRC_HMNC_GAIN +279 0x0001 //RX_TDDRC_SMT_FLAG +280 0x0CCD //RX_TDDRC_SMT_W +281 0x0155 //RX_TDDRC_DRC_GAIN +195 0x001C //RX_FDEQ_SUBNUM +196 0x4848 //RX_FDEQ_GAIN_0 +197 0x4848 //RX_FDEQ_GAIN_1 +198 0x4848 //RX_FDEQ_GAIN_2 +199 0x4848 //RX_FDEQ_GAIN_3 +200 0x4848 //RX_FDEQ_GAIN_4 +201 0x4848 //RX_FDEQ_GAIN_5 +202 0x4848 //RX_FDEQ_GAIN_6 +203 0x4848 //RX_FDEQ_GAIN_7 +204 0x4848 //RX_FDEQ_GAIN_8 +205 0x3C3C //RX_FDEQ_GAIN_9 +206 0x3C3C //RX_FDEQ_GAIN_10 +207 0x3838 //RX_FDEQ_GAIN_11 +208 0x3838 //RX_FDEQ_GAIN_12 +209 0x3030 //RX_FDEQ_GAIN_13 +210 0x4848 //RX_FDEQ_GAIN_14 +211 0x4848 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0202 //RX_FDEQ_BIN_0 +221 0x0203 //RX_FDEQ_BIN_1 +222 0x0303 //RX_FDEQ_BIN_2 +223 0x0304 //RX_FDEQ_BIN_3 +224 0x0405 //RX_FDEQ_BIN_4 +225 0x0506 //RX_FDEQ_BIN_5 +226 0x0708 //RX_FDEQ_BIN_6 +227 0x090A //RX_FDEQ_BIN_7 +228 0x0B0C //RX_FDEQ_BIN_8 +229 0x0D0E //RX_FDEQ_BIN_9 +230 0x0E0F //RX_FDEQ_BIN_10 +231 0x0F10 //RX_FDEQ_BIN_11 +232 0x1011 //RX_FDEQ_BIN_12 +233 0x1112 //RX_FDEQ_BIN_13 +234 0x0000 //RX_FDEQ_BIN_14 +235 0x0000 //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x4000 //RX_FDEQ_RESRV_0 +245 0x0320 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0030 //RX_FDDRC_BAND_MARGIN_1 +248 0x0050 //RX_FDDRC_BAND_MARGIN_2 +249 0x0080 //RX_FDDRC_BAND_MARGIN_3 +250 0x0007 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x5000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x6400 //RX_FDDRC_THRD_3_2 +258 0x6400 //RX_FDDRC_THRD_3_3 +259 0x2000 //RX_FDDRC_SLANT_0_0 +260 0x2000 //RX_FDDRC_SLANT_0_1 +261 0x2000 //RX_FDDRC_SLANT_0_2 +262 0x2000 //RX_FDDRC_SLANT_0_3 +263 0x5333 //RX_FDDRC_SLANT_1_0 +264 0x5333 //RX_FDDRC_SLANT_1_1 +265 0x5333 //RX_FDDRC_SLANT_1_2 +266 0x5333 //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +286 0x0100 //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 +#VOL 2 +163 0x1000 //RX_TDDRC_ALPHA_UP_1 +164 0x1000 //RX_TDDRC_ALPHA_UP_2 +165 0x1000 //RX_TDDRC_ALPHA_UP_3 +166 0x1000 //RX_TDDRC_ALPHA_UP_4 +184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +190 0x7FFF //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +269 0x0000 //RX_TDDRC_THRD_0 +270 0x0000 //RX_TDDRC_THRD_1 +271 0x7FFF //RX_TDDRC_THRD_2 +272 0x7FFF //RX_TDDRC_THRD_3 +273 0x7E70 //RX_TDDRC_SLANT_0 +274 0x7FFF //RX_TDDRC_SLANT_1 +275 0x1000 //RX_TDDRC_ALPHA_UP_0 +276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x199A //RX_TDDRC_HMNC_GAIN +279 0x0001 //RX_TDDRC_SMT_FLAG +280 0x0CCD //RX_TDDRC_SMT_W +281 0x0155 //RX_TDDRC_DRC_GAIN +195 0x001C //RX_FDEQ_SUBNUM +196 0x4848 //RX_FDEQ_GAIN_0 +197 0x4848 //RX_FDEQ_GAIN_1 +198 0x4848 //RX_FDEQ_GAIN_2 +199 0x4848 //RX_FDEQ_GAIN_3 +200 0x4848 //RX_FDEQ_GAIN_4 +201 0x4848 //RX_FDEQ_GAIN_5 +202 0x4848 //RX_FDEQ_GAIN_6 +203 0x4848 //RX_FDEQ_GAIN_7 +204 0x4848 //RX_FDEQ_GAIN_8 +205 0x3C3C //RX_FDEQ_GAIN_9 +206 0x3C3C //RX_FDEQ_GAIN_10 +207 0x3838 //RX_FDEQ_GAIN_11 +208 0x3838 //RX_FDEQ_GAIN_12 +209 0x3030 //RX_FDEQ_GAIN_13 +210 0x4848 //RX_FDEQ_GAIN_14 +211 0x4848 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0202 //RX_FDEQ_BIN_0 +221 0x0203 //RX_FDEQ_BIN_1 +222 0x0303 //RX_FDEQ_BIN_2 +223 0x0304 //RX_FDEQ_BIN_3 +224 0x0405 //RX_FDEQ_BIN_4 +225 0x0506 //RX_FDEQ_BIN_5 +226 0x0708 //RX_FDEQ_BIN_6 +227 0x090A //RX_FDEQ_BIN_7 +228 0x0B0C //RX_FDEQ_BIN_8 +229 0x0D0E //RX_FDEQ_BIN_9 +230 0x0E0F //RX_FDEQ_BIN_10 +231 0x0F10 //RX_FDEQ_BIN_11 +232 0x1011 //RX_FDEQ_BIN_12 +233 0x1112 //RX_FDEQ_BIN_13 +234 0x0000 //RX_FDEQ_BIN_14 +235 0x0000 //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x4000 //RX_FDEQ_RESRV_0 +245 0x0320 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0030 //RX_FDDRC_BAND_MARGIN_1 +248 0x0050 //RX_FDDRC_BAND_MARGIN_2 +249 0x0080 //RX_FDDRC_BAND_MARGIN_3 +250 0x0007 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x5000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x6400 //RX_FDDRC_THRD_3_2 +258 0x6400 //RX_FDDRC_THRD_3_3 +259 0x2000 //RX_FDDRC_SLANT_0_0 +260 0x2000 //RX_FDDRC_SLANT_0_1 +261 0x2000 //RX_FDDRC_SLANT_0_2 +262 0x2000 //RX_FDDRC_SLANT_0_3 +263 0x5333 //RX_FDDRC_SLANT_1_0 +264 0x5333 //RX_FDDRC_SLANT_1_1 +265 0x5333 //RX_FDDRC_SLANT_1_2 +266 0x5333 //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +286 0x0100 //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 +#VOL 3 +163 0x1000 //RX_TDDRC_ALPHA_UP_1 +164 0x1000 //RX_TDDRC_ALPHA_UP_2 +165 0x1000 //RX_TDDRC_ALPHA_UP_3 +166 0x1000 //RX_TDDRC_ALPHA_UP_4 +184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +190 0x7FFF //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +269 0x0000 //RX_TDDRC_THRD_0 +270 0x0000 //RX_TDDRC_THRD_1 +271 0x7FFF //RX_TDDRC_THRD_2 +272 0x7FFF //RX_TDDRC_THRD_3 +273 0x7E70 //RX_TDDRC_SLANT_0 +274 0x7FFF //RX_TDDRC_SLANT_1 +275 0x1000 //RX_TDDRC_ALPHA_UP_0 +276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x199A //RX_TDDRC_HMNC_GAIN +279 0x0001 //RX_TDDRC_SMT_FLAG +280 0x0CCD //RX_TDDRC_SMT_W +281 0x0155 //RX_TDDRC_DRC_GAIN +195 0x001C //RX_FDEQ_SUBNUM +196 0x4848 //RX_FDEQ_GAIN_0 +197 0x4848 //RX_FDEQ_GAIN_1 +198 0x4848 //RX_FDEQ_GAIN_2 +199 0x4848 //RX_FDEQ_GAIN_3 +200 0x4848 //RX_FDEQ_GAIN_4 +201 0x4848 //RX_FDEQ_GAIN_5 +202 0x4848 //RX_FDEQ_GAIN_6 +203 0x4848 //RX_FDEQ_GAIN_7 +204 0x4848 //RX_FDEQ_GAIN_8 +205 0x3C3C //RX_FDEQ_GAIN_9 +206 0x3C3C //RX_FDEQ_GAIN_10 +207 0x3838 //RX_FDEQ_GAIN_11 +208 0x3838 //RX_FDEQ_GAIN_12 +209 0x3030 //RX_FDEQ_GAIN_13 +210 0x4848 //RX_FDEQ_GAIN_14 +211 0x4848 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0202 //RX_FDEQ_BIN_0 +221 0x0203 //RX_FDEQ_BIN_1 +222 0x0303 //RX_FDEQ_BIN_2 +223 0x0304 //RX_FDEQ_BIN_3 +224 0x0405 //RX_FDEQ_BIN_4 +225 0x0506 //RX_FDEQ_BIN_5 +226 0x0708 //RX_FDEQ_BIN_6 +227 0x090A //RX_FDEQ_BIN_7 +228 0x0B0C //RX_FDEQ_BIN_8 +229 0x0D0E //RX_FDEQ_BIN_9 +230 0x0E0F //RX_FDEQ_BIN_10 +231 0x0F10 //RX_FDEQ_BIN_11 +232 0x1011 //RX_FDEQ_BIN_12 +233 0x1112 //RX_FDEQ_BIN_13 +234 0x0000 //RX_FDEQ_BIN_14 +235 0x0000 //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x4000 //RX_FDEQ_RESRV_0 +245 0x0320 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0030 //RX_FDDRC_BAND_MARGIN_1 +248 0x0050 //RX_FDDRC_BAND_MARGIN_2 +249 0x0080 //RX_FDDRC_BAND_MARGIN_3 +250 0x0007 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x5000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x6400 //RX_FDDRC_THRD_3_2 +258 0x6400 //RX_FDDRC_THRD_3_3 +259 0x2000 //RX_FDDRC_SLANT_0_0 +260 0x2000 //RX_FDDRC_SLANT_0_1 +261 0x2000 //RX_FDDRC_SLANT_0_2 +262 0x2000 //RX_FDDRC_SLANT_0_3 +263 0x5333 //RX_FDDRC_SLANT_1_0 +264 0x5333 //RX_FDDRC_SLANT_1_1 +265 0x5333 //RX_FDDRC_SLANT_1_2 +266 0x5333 //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +286 0x0100 //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 +#VOL 4 +163 0x1000 //RX_TDDRC_ALPHA_UP_1 +164 0x1000 //RX_TDDRC_ALPHA_UP_2 +165 0x1000 //RX_TDDRC_ALPHA_UP_3 +166 0x1000 //RX_TDDRC_ALPHA_UP_4 +184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +190 0x7FFF //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +269 0x0000 //RX_TDDRC_THRD_0 +270 0x0000 //RX_TDDRC_THRD_1 +271 0x7FFF //RX_TDDRC_THRD_2 +272 0x7FFF //RX_TDDRC_THRD_3 +273 0x7E70 //RX_TDDRC_SLANT_0 +274 0x7FFF //RX_TDDRC_SLANT_1 +275 0x1000 //RX_TDDRC_ALPHA_UP_0 +276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x199A //RX_TDDRC_HMNC_GAIN +279 0x0001 //RX_TDDRC_SMT_FLAG +280 0x0CCD //RX_TDDRC_SMT_W +281 0x0155 //RX_TDDRC_DRC_GAIN +195 0x001C //RX_FDEQ_SUBNUM +196 0x4848 //RX_FDEQ_GAIN_0 +197 0x4848 //RX_FDEQ_GAIN_1 +198 0x4848 //RX_FDEQ_GAIN_2 +199 0x4848 //RX_FDEQ_GAIN_3 +200 0x4848 //RX_FDEQ_GAIN_4 +201 0x4848 //RX_FDEQ_GAIN_5 +202 0x4848 //RX_FDEQ_GAIN_6 +203 0x4848 //RX_FDEQ_GAIN_7 +204 0x4848 //RX_FDEQ_GAIN_8 +205 0x3C3C //RX_FDEQ_GAIN_9 +206 0x3C3C //RX_FDEQ_GAIN_10 +207 0x3838 //RX_FDEQ_GAIN_11 +208 0x3838 //RX_FDEQ_GAIN_12 +209 0x3030 //RX_FDEQ_GAIN_13 +210 0x4848 //RX_FDEQ_GAIN_14 +211 0x4848 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0202 //RX_FDEQ_BIN_0 +221 0x0203 //RX_FDEQ_BIN_1 +222 0x0303 //RX_FDEQ_BIN_2 +223 0x0304 //RX_FDEQ_BIN_3 +224 0x0405 //RX_FDEQ_BIN_4 +225 0x0506 //RX_FDEQ_BIN_5 +226 0x0708 //RX_FDEQ_BIN_6 +227 0x090A //RX_FDEQ_BIN_7 +228 0x0B0C //RX_FDEQ_BIN_8 +229 0x0D0E //RX_FDEQ_BIN_9 +230 0x0E0F //RX_FDEQ_BIN_10 +231 0x0F10 //RX_FDEQ_BIN_11 +232 0x1011 //RX_FDEQ_BIN_12 +233 0x1112 //RX_FDEQ_BIN_13 +234 0x0000 //RX_FDEQ_BIN_14 +235 0x0000 //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x4000 //RX_FDEQ_RESRV_0 +245 0x0320 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0030 //RX_FDDRC_BAND_MARGIN_1 +248 0x0050 //RX_FDDRC_BAND_MARGIN_2 +249 0x0080 //RX_FDDRC_BAND_MARGIN_3 +250 0x0007 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x5000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x6400 //RX_FDDRC_THRD_3_2 +258 0x6400 //RX_FDDRC_THRD_3_3 +259 0x2000 //RX_FDDRC_SLANT_0_0 +260 0x2000 //RX_FDDRC_SLANT_0_1 +261 0x2000 //RX_FDDRC_SLANT_0_2 +262 0x2000 //RX_FDDRC_SLANT_0_3 +263 0x5333 //RX_FDDRC_SLANT_1_0 +264 0x5333 //RX_FDDRC_SLANT_1_1 +265 0x5333 //RX_FDDRC_SLANT_1_2 +266 0x5333 //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +286 0x0100 //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 +#VOL 5 +163 0x1000 //RX_TDDRC_ALPHA_UP_1 +164 0x1000 //RX_TDDRC_ALPHA_UP_2 +165 0x1000 //RX_TDDRC_ALPHA_UP_3 +166 0x1000 //RX_TDDRC_ALPHA_UP_4 +184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +190 0x7FFF //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +269 0x0000 //RX_TDDRC_THRD_0 +270 0x0000 //RX_TDDRC_THRD_1 +271 0x7FFF //RX_TDDRC_THRD_2 +272 0x7FFF //RX_TDDRC_THRD_3 +273 0x7E70 //RX_TDDRC_SLANT_0 +274 0x7FFF //RX_TDDRC_SLANT_1 +275 0x1000 //RX_TDDRC_ALPHA_UP_0 +276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x199A //RX_TDDRC_HMNC_GAIN +279 0x0001 //RX_TDDRC_SMT_FLAG +280 0x0CCD //RX_TDDRC_SMT_W +281 0x0155 //RX_TDDRC_DRC_GAIN +195 0x001C //RX_FDEQ_SUBNUM +196 0x4848 //RX_FDEQ_GAIN_0 +197 0x4848 //RX_FDEQ_GAIN_1 +198 0x4848 //RX_FDEQ_GAIN_2 +199 0x4848 //RX_FDEQ_GAIN_3 +200 0x4848 //RX_FDEQ_GAIN_4 +201 0x4848 //RX_FDEQ_GAIN_5 +202 0x4848 //RX_FDEQ_GAIN_6 +203 0x4848 //RX_FDEQ_GAIN_7 +204 0x4848 //RX_FDEQ_GAIN_8 +205 0x3C3C //RX_FDEQ_GAIN_9 +206 0x3C3C //RX_FDEQ_GAIN_10 +207 0x3838 //RX_FDEQ_GAIN_11 +208 0x3838 //RX_FDEQ_GAIN_12 +209 0x3030 //RX_FDEQ_GAIN_13 +210 0x4848 //RX_FDEQ_GAIN_14 +211 0x4848 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0202 //RX_FDEQ_BIN_0 +221 0x0203 //RX_FDEQ_BIN_1 +222 0x0303 //RX_FDEQ_BIN_2 +223 0x0304 //RX_FDEQ_BIN_3 +224 0x0405 //RX_FDEQ_BIN_4 +225 0x0506 //RX_FDEQ_BIN_5 +226 0x0708 //RX_FDEQ_BIN_6 +227 0x090A //RX_FDEQ_BIN_7 +228 0x0B0C //RX_FDEQ_BIN_8 +229 0x0D0E //RX_FDEQ_BIN_9 +230 0x0E0F //RX_FDEQ_BIN_10 +231 0x0F10 //RX_FDEQ_BIN_11 +232 0x1011 //RX_FDEQ_BIN_12 +233 0x1112 //RX_FDEQ_BIN_13 +234 0x0000 //RX_FDEQ_BIN_14 +235 0x0000 //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x4000 //RX_FDEQ_RESRV_0 +245 0x0320 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0030 //RX_FDDRC_BAND_MARGIN_1 +248 0x0050 //RX_FDDRC_BAND_MARGIN_2 +249 0x0080 //RX_FDDRC_BAND_MARGIN_3 +250 0x0007 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x5000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x6400 //RX_FDDRC_THRD_3_2 +258 0x6400 //RX_FDDRC_THRD_3_3 +259 0x2000 //RX_FDDRC_SLANT_0_0 +260 0x2000 //RX_FDDRC_SLANT_0_1 +261 0x2000 //RX_FDDRC_SLANT_0_2 +262 0x2000 //RX_FDDRC_SLANT_0_3 +263 0x5333 //RX_FDDRC_SLANT_1_0 +264 0x5333 //RX_FDDRC_SLANT_1_1 +265 0x5333 //RX_FDDRC_SLANT_1_2 +266 0x5333 //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +286 0x0100 //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 +#VOL 6 +163 0x1000 //RX_TDDRC_ALPHA_UP_1 +164 0x1000 //RX_TDDRC_ALPHA_UP_2 +165 0x1000 //RX_TDDRC_ALPHA_UP_3 +166 0x1000 //RX_TDDRC_ALPHA_UP_4 +184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +190 0x7FFF //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +269 0x0000 //RX_TDDRC_THRD_0 +270 0x0000 //RX_TDDRC_THRD_1 +271 0x7FFF //RX_TDDRC_THRD_2 +272 0x7FFF //RX_TDDRC_THRD_3 +273 0x7E70 //RX_TDDRC_SLANT_0 +274 0x7FFF //RX_TDDRC_SLANT_1 +275 0x1000 //RX_TDDRC_ALPHA_UP_0 +276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x199A //RX_TDDRC_HMNC_GAIN +279 0x0001 //RX_TDDRC_SMT_FLAG +280 0x0CCD //RX_TDDRC_SMT_W +281 0x0155 //RX_TDDRC_DRC_GAIN +195 0x001C //RX_FDEQ_SUBNUM +196 0x4848 //RX_FDEQ_GAIN_0 +197 0x4848 //RX_FDEQ_GAIN_1 +198 0x4848 //RX_FDEQ_GAIN_2 +199 0x4848 //RX_FDEQ_GAIN_3 +200 0x4848 //RX_FDEQ_GAIN_4 +201 0x4848 //RX_FDEQ_GAIN_5 +202 0x4848 //RX_FDEQ_GAIN_6 +203 0x4848 //RX_FDEQ_GAIN_7 +204 0x4848 //RX_FDEQ_GAIN_8 +205 0x3C3C //RX_FDEQ_GAIN_9 +206 0x3C3C //RX_FDEQ_GAIN_10 +207 0x3838 //RX_FDEQ_GAIN_11 +208 0x3838 //RX_FDEQ_GAIN_12 +209 0x3030 //RX_FDEQ_GAIN_13 +210 0x4848 //RX_FDEQ_GAIN_14 +211 0x4848 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0202 //RX_FDEQ_BIN_0 +221 0x0203 //RX_FDEQ_BIN_1 +222 0x0303 //RX_FDEQ_BIN_2 +223 0x0304 //RX_FDEQ_BIN_3 +224 0x0405 //RX_FDEQ_BIN_4 +225 0x0506 //RX_FDEQ_BIN_5 +226 0x0708 //RX_FDEQ_BIN_6 +227 0x090A //RX_FDEQ_BIN_7 +228 0x0B0C //RX_FDEQ_BIN_8 +229 0x0D0E //RX_FDEQ_BIN_9 +230 0x0E0F //RX_FDEQ_BIN_10 +231 0x0F10 //RX_FDEQ_BIN_11 +232 0x1011 //RX_FDEQ_BIN_12 +233 0x1112 //RX_FDEQ_BIN_13 +234 0x0000 //RX_FDEQ_BIN_14 +235 0x0000 //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x4000 //RX_FDEQ_RESRV_0 +245 0x0320 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0030 //RX_FDDRC_BAND_MARGIN_1 +248 0x0050 //RX_FDDRC_BAND_MARGIN_2 +249 0x0080 //RX_FDDRC_BAND_MARGIN_3 +250 0x0007 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x5000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x6400 //RX_FDDRC_THRD_3_2 +258 0x6400 //RX_FDDRC_THRD_3_3 +259 0x2000 //RX_FDDRC_SLANT_0_0 +260 0x2000 //RX_FDDRC_SLANT_0_1 +261 0x2000 //RX_FDDRC_SLANT_0_2 +262 0x2000 //RX_FDDRC_SLANT_0_3 +263 0x5333 //RX_FDDRC_SLANT_1_0 +264 0x5333 //RX_FDDRC_SLANT_1_1 +265 0x5333 //RX_FDDRC_SLANT_1_2 +266 0x5333 //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +286 0x0100 //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 #CASE_NAME BLUETOOTH-BT_HAC-VOICE_GENERIC-SWB -#PARAM_TYPE TX+RX -#TOTAL_CUSTOM_STEP 7 +#PARAM_MODE Full +#PARAM_TYPE TX+2RX +#TOTAL_CUSTOM_STEP 7+7 #TX 0 0x0001 //TX_OPERATION_MODE_0 1 0x0001 //TX_OPERATION_MODE_1 @@ -5519,10 +8271,10 @@ 250 0x0100 //TX_DELTA_THR_SN_EST_0 251 0x0100 //TX_DELTA_THR_SN_EST_1 252 0x0100 //TX_DELTA_THR_SN_EST_2 -253 0x0100 //TX_DELTA_THR_SN_EST_3 -254 0x0000 //TX_DELTA_THR_SN_EST_4 -255 0x0100 //TX_DELTA_THR_SN_EST_5 -256 0x0200 //TX_DELTA_THR_SN_EST_6 +253 0x0000 //TX_DELTA_THR_SN_EST_3 +254 0x0100 //TX_DELTA_THR_SN_EST_4 +255 0x0200 //TX_DELTA_THR_SN_EST_5 +256 0x0100 //TX_DELTA_THR_SN_EST_6 257 0x0200 //TX_DELTA_THR_SN_EST_7 258 0x4000 //TX_LAMBDA_NN_EST_0 259 0x4000 //TX_LAMBDA_NN_EST_1 @@ -5549,11 +8301,11 @@ 280 0x1000 //TX_B_POST_FLT_1 281 0x0010 //TX_NS_LVL_CTRL_0 282 0x003C //TX_NS_LVL_CTRL_1 -283 0x003C //TX_NS_LVL_CTRL_2 -284 0x0024 //TX_NS_LVL_CTRL_3 -285 0x003C //TX_NS_LVL_CTRL_4 -286 0x0014 //TX_NS_LVL_CTRL_5 -287 0x0011 //TX_NS_LVL_CTRL_6 +283 0x0024 //TX_NS_LVL_CTRL_2 +284 0x003C //TX_NS_LVL_CTRL_3 +285 0x0014 //TX_NS_LVL_CTRL_4 +286 0x0011 //TX_NS_LVL_CTRL_5 +287 0x003C //TX_NS_LVL_CTRL_6 288 0x0011 //TX_NS_LVL_CTRL_7 289 0x000F //TX_MIN_GAIN_S_0 290 0x0010 //TX_MIN_GAIN_S_1 @@ -5569,10 +8321,10 @@ 300 0x7FFF //TX_SNRI_SUP_0 301 0x1400 //TX_SNRI_SUP_1 302 0x1400 //TX_SNRI_SUP_2 -303 0x1400 //TX_SNRI_SUP_3 +303 0x4000 //TX_SNRI_SUP_3 304 0x4000 //TX_SNRI_SUP_4 -305 0x4000 //TX_SNRI_SUP_5 -306 0x50C0 //TX_SNRI_SUP_6 +305 0x50C0 //TX_SNRI_SUP_5 +306 0x1400 //TX_SNRI_SUP_6 307 0x7FFF //TX_SNRI_SUP_7 308 0x7FFF //TX_THR_LFNS 309 0x0018 //TX_G_LFNS @@ -5581,19 +8333,19 @@ 312 0x7FFF //TX_A_POST_FILT_0 313 0x2000 //TX_A_POST_FILT_1 314 0x5000 //TX_A_POST_FILT_S_0 -315 0x7C00 //TX_A_POST_FILT_S_1 -316 0x4C00 //TX_A_POST_FILT_S_2 -317 0x4000 //TX_A_POST_FILT_S_3 -318 0x6000 //TX_A_POST_FILT_S_4 -319 0x4000 //TX_A_POST_FILT_S_5 -320 0x5000 //TX_A_POST_FILT_S_6 +315 0x4C00 //TX_A_POST_FILT_S_1 +316 0x4000 //TX_A_POST_FILT_S_2 +317 0x6000 //TX_A_POST_FILT_S_3 +318 0x4000 //TX_A_POST_FILT_S_4 +319 0x5000 //TX_A_POST_FILT_S_5 +320 0x7C00 //TX_A_POST_FILT_S_6 321 0x7000 //TX_A_POST_FILT_S_7 322 0x2000 //TX_B_POST_FILT_0 -323 0x1000 //TX_B_POST_FILT_1 +323 0x6000 //TX_B_POST_FILT_1 324 0x6000 //TX_B_POST_FILT_2 325 0x6000 //TX_B_POST_FILT_3 -326 0x6000 //TX_B_POST_FILT_4 -327 0x4000 //TX_B_POST_FILT_5 +326 0x4000 //TX_B_POST_FILT_4 +327 0x1000 //TX_B_POST_FILT_5 328 0x1000 //TX_B_POST_FILT_6 329 0x2000 //TX_B_POST_FILT_7 330 0x4000 //TX_B_LESSCUT_RTO_S_0 @@ -5601,8 +8353,8 @@ 332 0x7FFF //TX_B_LESSCUT_RTO_S_2 333 0x7FFF //TX_B_LESSCUT_RTO_S_3 334 0x7FFF //TX_B_LESSCUT_RTO_S_4 -335 0x7FFF //TX_B_LESSCUT_RTO_S_5 -336 0x6000 //TX_B_LESSCUT_RTO_S_6 +335 0x6000 //TX_B_LESSCUT_RTO_S_5 +336 0x7FFF //TX_B_LESSCUT_RTO_S_6 337 0x7FFF //TX_B_LESSCUT_RTO_S_7 338 0x7C00 //TX_LAMBDA_PFILT 339 0x7D00 //TX_LAMBDA_PFILT_S_0 @@ -5646,10 +8398,10 @@ 377 0x7FFF //TX_NOISE_TH_5_4 378 0x0DAC //TX_NOISE_TH_6 379 0x0050 //TX_MINENOISE_TH -380 0x4000 //TX_MINENOISE_MIC0_TH_MTS -381 0xFFEE //TX_MINENOISE_MIC0_TH_EXP -382 0x6000 //TX_MINENOISE_MIC0_S_TH_MTS -383 0xFFF3 //TX_MINENOISE_MIC0_S_TH_EXP +380 0x4000 //TX_MORENS_TFMASK_TH +381 0xFFEE //TX_DRC_QUIET_FLOOR +382 0x6000 //TX_RATIODTL_CUT_TH +383 0xFFF3 //TX_DT_CUT_K1 384 0x0666 //TX_OUT_ENER_S_TH_CLEAN 385 0x0666 //TX_OUT_ENER_S_TH_LESSCLEAN 386 0x0333 //TX_OUT_ENER_S_TH_NOISY @@ -5657,15 +8409,15 @@ 388 0x0333 //TX_OUT_ENER_TH_SPEECH 389 0x2000 //TX_SN_NPB_GAIN 390 0x0000 //TX_NN_NPB_GAIN -391 0x0000 //TX_CSX_ALPHA_0 -392 0x0000 //TX_CSX_ALPHA_1 -393 0x0000 //TX_CSX_ALPHA_2 -394 0x0000 //TX_CSX_ALPHA_3 -395 0x0800 //TX_MU_ARSP_EST -396 0x00C8 //TX_P_OUTBEAM_MIN_TH +391 0x0000 //TX_POST_MASK_SUP_HSNE +392 0x0000 //TX_TAIL_DET_TH +393 0x0000 //TX_B_LESSCUT_RTO_WTA +394 0x0000 //TX_MEL_G_R +395 0x0800 //TX_SUPHIGH_TH +396 0x00C8 //TX_MASK_G_R 397 0x0002 //TX_EXTRA_NS_L -398 0x0800 //TX_EXTRA_NS_A -399 0x0005 //TX_VR_NOISE_FLOOR_TH +398 0x0800 //TX_C_POST_FLT_MASK +399 0x0005 //TX_A_POST_FLT_WNS 400 0x0148 //TX_MIN_G_LOW300HZ 401 0x0001 //TX_MAXLEVEL_CNG 402 0x00B4 //TX_STN_NOISE_TH @@ -5780,16 +8532,16 @@ 511 0x6666 //TX_MIC_TO_BFGAIN 512 0x0000 //TX_MICTOBFGAIN0 513 0x0000 //TX_FASTMUE_TH -514 0x0000 //TX_DERVB_LEN_0 -515 0x0000 //TX_DERVB_LEN_1 -516 0x0000 //TX_RHO_DERVB -517 0x0000 //TX_MIC_INDX_DERVB -518 0x0000 //TX_MU_DERVB -519 0x0000 //TX_DR_RESRV_0 -520 0x0000 //TX_DR_RESRV_1 -521 0x0000 //TX_DR_RESRV_2 -522 0x0000 //TX_DR_RESRV_3 -523 0x0000 //TX_DR_RESRV_4 +514 0x0000 //TX_DEREVERB_LF_MU +515 0x0000 //TX_DEREVERB_HF_MU +516 0x0000 //TX_DEREVERB_DELAY +517 0x0000 //TX_DEREVERB_COEF_LEN +518 0x0000 //TX_DEREVERB_DNR +519 0x0000 //TX_DEREVERB_ALPHA +520 0x0000 //TX_DEREVERB_BETA +521 0x0000 //TX_GSC_RTOL_TH +522 0x0000 //TX_GSC_RTOH_TH +523 0x0000 //TX_WIDE2_MEANHTH 524 0x0000 //TX_DR_RESRV_5 525 0x0000 //TX_DR_RESRV_6 526 0x0000 //TX_DR_RESRV_7 @@ -6163,8 +8915,73 @@ 894 0xC000 //TX_FASTNS_SSA_THHFL 895 0xCCCC //TX_FASTNS_SSA_THLFH 896 0xD999 //TX_FASTNS_SSA_THHFH +897 0x0000 //TX_SENDFUNC_REG_MICMUTE +898 0x0000 //TX_SENDFUNC_REG_MICMUTE1 +899 0x0000 //TX_MICMUTE_RATIO_THR +900 0x0000 //TX_MICMUTE_AMP_THR +901 0x0000 //TX_MICMUTE_HPF_IND +902 0x0000 //TX_MICMUTE_LOG_EYR_TH +903 0x0000 //TX_MICMUTE_CVG_TIME +904 0x0000 //TX_MICMUTE_RELEASE_TIME +905 0x0000 //TX_MIC_VOLUME_MIC0MUTE +906 0x0000 //TX_MICMUTE_EPD_OFFSET_0 +907 0x0000 //TX_MICMUTE_FRQ_AEC_L +908 0x0000 //TX_MICMUTE_EAD_THR +909 0x0000 //TX_MICMUTE_LAMBDA_CB_NLE +910 0x0000 //TX_MICMUTE_LAMBDA_RE_EST +911 0x0000 //TX_DTD_THR1_MICMUTE_0 +912 0x0000 //TX_DTD_THR1_MICMUTE_1 +913 0x0000 //TX_DTD_THR1_MICMUTE_2 +914 0x0000 //TX_DTD_THR1_MICMUTE_3 +915 0x0000 //TX_DTD_THR2_MICMUTE_0 +916 0x0000 //TX_MICMUTE_MIN_EQ_RE_EST_0 +917 0x0000 //TX_MICMUTE_MIN_EQ_RE_EST_1 +918 0x0000 //TX_MICMUTE_MIN_EQ_RE_EST_2 +919 0x0000 //TX_MICMUTE_MIN_EQ_RE_EST_3 +920 0x0000 //TX_MICMUTE_MIN_EQ_RE_EST_4 +921 0x0000 //TX_MICMUTE_C_POST_FLT +922 0x0000 //TX_MICMUTE_DT_CUT_K +923 0x0000 //TX_MICMUTE_DT_CUT_THR +924 0x0000 //TX_MICMUTE_DT_CUT_K2 +925 0x0000 //TX_MICMUTE_DT_CUT_THR2 +926 0x0000 //TX_MICMUTE_DT2_HOLD_N +927 0x0000 //TX_MICMUTE_RATIODTH_THCUT +928 0x0000 //TX_MICMUTE_B_POST_FLT_ECHOL +929 0x0000 //TX_MICMUTE_B_POST_FLT_ECHOH +930 0x0000 //TX_MICMUTE_C_POST_FLT_MASK +931 0x0000 //TX_MICMUTE_RATIODTL_CUT_TH +932 0x0000 //TX_MICMUTE_DT_CUT_K1 +933 0x0000 //TX_MICMUTE_N2_SN_EST +934 0x0000 //TX_MICMUTE_THR_SN_EST_0 +935 0x0000 //TX_MICMUTE_MIN_G_CTRL_0 +936 0x0000 //TX_MICMUTE_A_POST_FILT_S_0 +937 0x0000 //TX_MICMUTE_B_POST_FILT_0 +938 0x0000 //TX_MIC1RUB_AMP_THR +939 0x0000 //TX_MIC1MUTE_RATIO_THR +940 0x0000 //TX_MIC1MUTE_AMP_THR +941 0x0000 //TX_MIC1MUTE_CVG_TIME +942 0x0000 //TX_MIC1MUTE_RELEASE_TIME +943 0x0000 //TX_AMS_RESRV_01 +944 0x0000 //TX_AMS_RESRV_02 +945 0x0000 //TX_AMS_RESRV_03 +946 0x0000 //TX_AMS_RESRV_04 +947 0x0000 //TX_AMS_RESRV_05 +948 0x0000 //TX_AMS_RESRV_06 +949 0x0000 //TX_AMS_RESRV_07 +950 0x0000 //TX_AMS_RESRV_08 +951 0x0000 //TX_AMS_RESRV_09 +952 0x0000 //TX_AMS_RESRV_10 +953 0x0000 //TX_AMS_RESRV_11 +954 0x0000 //TX_AMS_RESRV_12 +955 0x0000 //TX_AMS_RESRV_13 +956 0x0000 //TX_AMS_RESRV_14 +957 0x0000 //TX_AMS_RESRV_15 +958 0x0000 //TX_AMS_RESRV_16 +959 0x0000 //TX_AMS_RESRV_17 +960 0x0000 //TX_AMS_RESRV_18 +961 0x0000 //TX_AMS_RESRV_19 #RX -0 0x0064 //RX_RECVFUNC_MODE_0 +0 0x2064 //RX_RECVFUNC_MODE_0 1 0x0000 //RX_RECVFUNC_MODE_1 2 0x0003 //RX_SAMPLINGFREQ_SIG 3 0x0003 //RX_SAMPLINGFREQ_PROC @@ -7014,10 +9831,862 @@ 110 0x0000 //RX_FDDRC_RESRV_0 129 0x0100 //RX_SPK_VOL 130 0x0000 //RX_VOL_RESRV_0 +#RX 2 +157 0x2064 //RX_RECVFUNC_MODE_0 +158 0x0000 //RX_RECVFUNC_MODE_1 +159 0x0003 //RX_SAMPLINGFREQ_SIG +160 0x0003 //RX_SAMPLINGFREQ_PROC +161 0x000A //RX_FRAME_SZ +162 0x0000 //RX_DELAY_OPT +163 0x3000 //RX_TDDRC_ALPHA_UP_1 +164 0x3000 //RX_TDDRC_ALPHA_UP_2 +165 0x3000 //RX_TDDRC_ALPHA_UP_3 +166 0x3000 //RX_TDDRC_ALPHA_UP_4 +167 0x0800 //RX_PGA +168 0x7FFF //RX_A_HP +169 0x0000 //RX_B_PE +170 0x1800 //RX_THR_PITCH_DET_0 +171 0x1000 //RX_THR_PITCH_DET_1 +172 0x0800 //RX_THR_PITCH_DET_2 +173 0x0008 //RX_PITCH_BFR_LEN +174 0x0003 //RX_SBD_PITCH_DET +175 0x0100 //RX_PP_RESRV_0 +176 0x0020 //RX_PP_RESRV_1 +177 0x0400 //RX_N_SN_EST +178 0x000C //RX_N2_SN_EST +179 0x0003 //RX_NS_LVL_CTRL +180 0x9000 //RX_THR_SN_EST +181 0x7CCD //RX_LAMBDA_PFILT +182 0x000A //RX_FENS_RESRV_0 +183 0x0190 //RX_FENS_RESRV_1 +184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +187 0x0002 //RX_EXTRA_NS_L +188 0x0800 //RX_EXTRA_NS_A +189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +190 0x7FFF //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +192 0x199A //RX_A_POST_FLT +193 0x0000 //RX_LMT_THRD +194 0x4000 //RX_LMT_ALPHA +195 0x0020 //RX_FDEQ_SUBNUM +196 0x4848 //RX_FDEQ_GAIN_0 +197 0x4848 //RX_FDEQ_GAIN_1 +198 0x4848 //RX_FDEQ_GAIN_2 +199 0x4848 //RX_FDEQ_GAIN_3 +200 0x4848 //RX_FDEQ_GAIN_4 +201 0x4848 //RX_FDEQ_GAIN_5 +202 0x4848 //RX_FDEQ_GAIN_6 +203 0x4848 //RX_FDEQ_GAIN_7 +204 0x4848 //RX_FDEQ_GAIN_8 +205 0x4848 //RX_FDEQ_GAIN_9 +206 0x4848 //RX_FDEQ_GAIN_10 +207 0x4848 //RX_FDEQ_GAIN_11 +208 0x4848 //RX_FDEQ_GAIN_12 +209 0x4848 //RX_FDEQ_GAIN_13 +210 0x4848 //RX_FDEQ_GAIN_14 +211 0x4848 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0202 //RX_FDEQ_BIN_0 +221 0x0203 //RX_FDEQ_BIN_1 +222 0x0303 //RX_FDEQ_BIN_2 +223 0x0304 //RX_FDEQ_BIN_3 +224 0x0405 //RX_FDEQ_BIN_4 +225 0x0506 //RX_FDEQ_BIN_5 +226 0x0708 //RX_FDEQ_BIN_6 +227 0x090A //RX_FDEQ_BIN_7 +228 0x0B0C //RX_FDEQ_BIN_8 +229 0x0D0E //RX_FDEQ_BIN_9 +230 0x1013 //RX_FDEQ_BIN_10 +231 0x1719 //RX_FDEQ_BIN_11 +232 0x1B1E //RX_FDEQ_BIN_12 +233 0x1E1E //RX_FDEQ_BIN_13 +234 0x1E28 //RX_FDEQ_BIN_14 +235 0x282C //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x4000 //RX_FDEQ_RESRV_0 +245 0x0320 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0030 //RX_FDDRC_BAND_MARGIN_1 +248 0x0050 //RX_FDDRC_BAND_MARGIN_2 +249 0x0080 //RX_FDDRC_BAND_MARGIN_3 +250 0x0007 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x5000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x6400 //RX_FDDRC_THRD_3_2 +258 0x6400 //RX_FDDRC_THRD_3_3 +259 0x2000 //RX_FDDRC_SLANT_0_0 +260 0x2000 //RX_FDDRC_SLANT_0_1 +261 0x2000 //RX_FDDRC_SLANT_0_2 +262 0x2000 //RX_FDDRC_SLANT_0_3 +263 0x5333 //RX_FDDRC_SLANT_1_0 +264 0x5333 //RX_FDDRC_SLANT_1_1 +265 0x5333 //RX_FDDRC_SLANT_1_2 +266 0x5333 //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +268 0x0000 //RX_FILTINDX +269 0x0000 //RX_TDDRC_THRD_0 +270 0x0000 //RX_TDDRC_THRD_1 +271 0x7FFF //RX_TDDRC_THRD_2 +272 0x7FFF //RX_TDDRC_THRD_3 +273 0x7FFF //RX_TDDRC_SLANT_0 +274 0x7FFF //RX_TDDRC_SLANT_1 +275 0x3000 //RX_TDDRC_ALPHA_UP_0 +276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x199A //RX_TDDRC_HMNC_GAIN +279 0x0001 //RX_TDDRC_SMT_FLAG +280 0x0CCD //RX_TDDRC_SMT_W +281 0x0155 //RX_TDDRC_DRC_GAIN +282 0x7C00 //RX_LAMBDA_PKA_FP +283 0x2000 //RX_TPKA_FP +284 0x2000 //RX_MIN_G_FP +285 0x0080 //RX_MAX_G_FP +286 0x0100 //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 +288 0x0000 //RX_MAXLEVEL_CNG +289 0x3000 //RX_BWE_UV_TH +290 0x3000 //RX_BWE_UV_TH2 +291 0x1800 //RX_BWE_UV_TH3 +292 0x1000 //RX_BWE_V_TH +293 0x04CD //RX_BWE_GAIN1_V_TH1 +294 0x0F33 //RX_BWE_GAIN1_V_TH2 +295 0x7333 //RX_BWE_UV_EQ +296 0x199A //RX_BWE_V_EQ +297 0x7333 //RX_BWE_TONE_TH +298 0x0004 //RX_BWE_UV_HOLD_T +299 0x6CCD //RX_BWE_GAIN2_ALPHA +300 0x799A //RX_BWE_GAIN3_ALPHA +301 0x001E //RX_BWE_CUTOFF +302 0x3000 //RX_BWE_GAINFILL +303 0x3200 //RX_BWE_MAXTH_TONE +304 0x2000 //RX_BWE_EQ_0 +305 0x2000 //RX_BWE_EQ_1 +306 0x2000 //RX_BWE_EQ_2 +307 0x2000 //RX_BWE_EQ_3 +308 0x2000 //RX_BWE_EQ_4 +309 0x2000 //RX_BWE_EQ_5 +310 0x2000 //RX_BWE_EQ_6 +311 0x0000 //RX_BWE_RESRV_0 +312 0x0000 //RX_BWE_RESRV_1 +313 0x0000 //RX_BWE_RESRV_2 +#VOL 0 +163 0x3000 //RX_TDDRC_ALPHA_UP_1 +164 0x3000 //RX_TDDRC_ALPHA_UP_2 +165 0x3000 //RX_TDDRC_ALPHA_UP_3 +166 0x3000 //RX_TDDRC_ALPHA_UP_4 +184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +190 0x7FFF //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +269 0x0000 //RX_TDDRC_THRD_0 +270 0x0000 //RX_TDDRC_THRD_1 +271 0x7FFF //RX_TDDRC_THRD_2 +272 0x7FFF //RX_TDDRC_THRD_3 +273 0x7FFF //RX_TDDRC_SLANT_0 +274 0x7FFF //RX_TDDRC_SLANT_1 +275 0x3000 //RX_TDDRC_ALPHA_UP_0 +276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x199A //RX_TDDRC_HMNC_GAIN +279 0x0001 //RX_TDDRC_SMT_FLAG +280 0x0CCD //RX_TDDRC_SMT_W +281 0x0155 //RX_TDDRC_DRC_GAIN +195 0x0020 //RX_FDEQ_SUBNUM +196 0x4848 //RX_FDEQ_GAIN_0 +197 0x4848 //RX_FDEQ_GAIN_1 +198 0x4848 //RX_FDEQ_GAIN_2 +199 0x4848 //RX_FDEQ_GAIN_3 +200 0x4848 //RX_FDEQ_GAIN_4 +201 0x4848 //RX_FDEQ_GAIN_5 +202 0x4848 //RX_FDEQ_GAIN_6 +203 0x4848 //RX_FDEQ_GAIN_7 +204 0x4848 //RX_FDEQ_GAIN_8 +205 0x4848 //RX_FDEQ_GAIN_9 +206 0x4848 //RX_FDEQ_GAIN_10 +207 0x4848 //RX_FDEQ_GAIN_11 +208 0x4848 //RX_FDEQ_GAIN_12 +209 0x4848 //RX_FDEQ_GAIN_13 +210 0x4848 //RX_FDEQ_GAIN_14 +211 0x4848 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0202 //RX_FDEQ_BIN_0 +221 0x0203 //RX_FDEQ_BIN_1 +222 0x0303 //RX_FDEQ_BIN_2 +223 0x0304 //RX_FDEQ_BIN_3 +224 0x0405 //RX_FDEQ_BIN_4 +225 0x0506 //RX_FDEQ_BIN_5 +226 0x0708 //RX_FDEQ_BIN_6 +227 0x090A //RX_FDEQ_BIN_7 +228 0x0B0C //RX_FDEQ_BIN_8 +229 0x0D0E //RX_FDEQ_BIN_9 +230 0x1013 //RX_FDEQ_BIN_10 +231 0x1719 //RX_FDEQ_BIN_11 +232 0x1B1E //RX_FDEQ_BIN_12 +233 0x1E1E //RX_FDEQ_BIN_13 +234 0x1E28 //RX_FDEQ_BIN_14 +235 0x282C //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x4000 //RX_FDEQ_RESRV_0 +245 0x0320 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0030 //RX_FDDRC_BAND_MARGIN_1 +248 0x0050 //RX_FDDRC_BAND_MARGIN_2 +249 0x0080 //RX_FDDRC_BAND_MARGIN_3 +250 0x0007 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x5000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x6400 //RX_FDDRC_THRD_3_2 +258 0x6400 //RX_FDDRC_THRD_3_3 +259 0x2000 //RX_FDDRC_SLANT_0_0 +260 0x2000 //RX_FDDRC_SLANT_0_1 +261 0x2000 //RX_FDDRC_SLANT_0_2 +262 0x2000 //RX_FDDRC_SLANT_0_3 +263 0x5333 //RX_FDDRC_SLANT_1_0 +264 0x5333 //RX_FDDRC_SLANT_1_1 +265 0x5333 //RX_FDDRC_SLANT_1_2 +266 0x5333 //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +286 0x0100 //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 +#VOL 1 +163 0x3000 //RX_TDDRC_ALPHA_UP_1 +164 0x3000 //RX_TDDRC_ALPHA_UP_2 +165 0x3000 //RX_TDDRC_ALPHA_UP_3 +166 0x3000 //RX_TDDRC_ALPHA_UP_4 +184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +190 0x7FFF //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +269 0x0000 //RX_TDDRC_THRD_0 +270 0x0000 //RX_TDDRC_THRD_1 +271 0x7FFF //RX_TDDRC_THRD_2 +272 0x7FFF //RX_TDDRC_THRD_3 +273 0x7FFF //RX_TDDRC_SLANT_0 +274 0x7FFF //RX_TDDRC_SLANT_1 +275 0x3000 //RX_TDDRC_ALPHA_UP_0 +276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x199A //RX_TDDRC_HMNC_GAIN +279 0x0001 //RX_TDDRC_SMT_FLAG +280 0x0CCD //RX_TDDRC_SMT_W +281 0x0155 //RX_TDDRC_DRC_GAIN +195 0x0020 //RX_FDEQ_SUBNUM +196 0x4848 //RX_FDEQ_GAIN_0 +197 0x4848 //RX_FDEQ_GAIN_1 +198 0x4848 //RX_FDEQ_GAIN_2 +199 0x4848 //RX_FDEQ_GAIN_3 +200 0x4848 //RX_FDEQ_GAIN_4 +201 0x4848 //RX_FDEQ_GAIN_5 +202 0x4848 //RX_FDEQ_GAIN_6 +203 0x4848 //RX_FDEQ_GAIN_7 +204 0x4848 //RX_FDEQ_GAIN_8 +205 0x4848 //RX_FDEQ_GAIN_9 +206 0x4848 //RX_FDEQ_GAIN_10 +207 0x4848 //RX_FDEQ_GAIN_11 +208 0x4848 //RX_FDEQ_GAIN_12 +209 0x4848 //RX_FDEQ_GAIN_13 +210 0x4848 //RX_FDEQ_GAIN_14 +211 0x4848 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0202 //RX_FDEQ_BIN_0 +221 0x0203 //RX_FDEQ_BIN_1 +222 0x0303 //RX_FDEQ_BIN_2 +223 0x0304 //RX_FDEQ_BIN_3 +224 0x0405 //RX_FDEQ_BIN_4 +225 0x0506 //RX_FDEQ_BIN_5 +226 0x0708 //RX_FDEQ_BIN_6 +227 0x090A //RX_FDEQ_BIN_7 +228 0x0B0C //RX_FDEQ_BIN_8 +229 0x0D0E //RX_FDEQ_BIN_9 +230 0x1013 //RX_FDEQ_BIN_10 +231 0x1719 //RX_FDEQ_BIN_11 +232 0x1B1E //RX_FDEQ_BIN_12 +233 0x1E1E //RX_FDEQ_BIN_13 +234 0x1E28 //RX_FDEQ_BIN_14 +235 0x282C //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x4000 //RX_FDEQ_RESRV_0 +245 0x0320 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0030 //RX_FDDRC_BAND_MARGIN_1 +248 0x0050 //RX_FDDRC_BAND_MARGIN_2 +249 0x0080 //RX_FDDRC_BAND_MARGIN_3 +250 0x0007 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x5000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x6400 //RX_FDDRC_THRD_3_2 +258 0x6400 //RX_FDDRC_THRD_3_3 +259 0x2000 //RX_FDDRC_SLANT_0_0 +260 0x2000 //RX_FDDRC_SLANT_0_1 +261 0x2000 //RX_FDDRC_SLANT_0_2 +262 0x2000 //RX_FDDRC_SLANT_0_3 +263 0x5333 //RX_FDDRC_SLANT_1_0 +264 0x5333 //RX_FDDRC_SLANT_1_1 +265 0x5333 //RX_FDDRC_SLANT_1_2 +266 0x5333 //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +286 0x0100 //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 +#VOL 2 +163 0x3000 //RX_TDDRC_ALPHA_UP_1 +164 0x3000 //RX_TDDRC_ALPHA_UP_2 +165 0x3000 //RX_TDDRC_ALPHA_UP_3 +166 0x3000 //RX_TDDRC_ALPHA_UP_4 +184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +190 0x7FFF //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +269 0x0000 //RX_TDDRC_THRD_0 +270 0x0000 //RX_TDDRC_THRD_1 +271 0x7FFF //RX_TDDRC_THRD_2 +272 0x7FFF //RX_TDDRC_THRD_3 +273 0x7FFF //RX_TDDRC_SLANT_0 +274 0x7FFF //RX_TDDRC_SLANT_1 +275 0x3000 //RX_TDDRC_ALPHA_UP_0 +276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x199A //RX_TDDRC_HMNC_GAIN +279 0x0001 //RX_TDDRC_SMT_FLAG +280 0x0CCD //RX_TDDRC_SMT_W +281 0x0155 //RX_TDDRC_DRC_GAIN +195 0x0020 //RX_FDEQ_SUBNUM +196 0x4848 //RX_FDEQ_GAIN_0 +197 0x4848 //RX_FDEQ_GAIN_1 +198 0x4848 //RX_FDEQ_GAIN_2 +199 0x4848 //RX_FDEQ_GAIN_3 +200 0x4848 //RX_FDEQ_GAIN_4 +201 0x4848 //RX_FDEQ_GAIN_5 +202 0x4848 //RX_FDEQ_GAIN_6 +203 0x4848 //RX_FDEQ_GAIN_7 +204 0x4848 //RX_FDEQ_GAIN_8 +205 0x4848 //RX_FDEQ_GAIN_9 +206 0x4848 //RX_FDEQ_GAIN_10 +207 0x4848 //RX_FDEQ_GAIN_11 +208 0x4848 //RX_FDEQ_GAIN_12 +209 0x4848 //RX_FDEQ_GAIN_13 +210 0x4848 //RX_FDEQ_GAIN_14 +211 0x4848 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0202 //RX_FDEQ_BIN_0 +221 0x0203 //RX_FDEQ_BIN_1 +222 0x0303 //RX_FDEQ_BIN_2 +223 0x0304 //RX_FDEQ_BIN_3 +224 0x0405 //RX_FDEQ_BIN_4 +225 0x0506 //RX_FDEQ_BIN_5 +226 0x0708 //RX_FDEQ_BIN_6 +227 0x090A //RX_FDEQ_BIN_7 +228 0x0B0C //RX_FDEQ_BIN_8 +229 0x0D0E //RX_FDEQ_BIN_9 +230 0x1013 //RX_FDEQ_BIN_10 +231 0x1719 //RX_FDEQ_BIN_11 +232 0x1B1E //RX_FDEQ_BIN_12 +233 0x1E1E //RX_FDEQ_BIN_13 +234 0x1E28 //RX_FDEQ_BIN_14 +235 0x282C //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x4000 //RX_FDEQ_RESRV_0 +245 0x0320 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0030 //RX_FDDRC_BAND_MARGIN_1 +248 0x0050 //RX_FDDRC_BAND_MARGIN_2 +249 0x0080 //RX_FDDRC_BAND_MARGIN_3 +250 0x0007 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x5000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x6400 //RX_FDDRC_THRD_3_2 +258 0x6400 //RX_FDDRC_THRD_3_3 +259 0x2000 //RX_FDDRC_SLANT_0_0 +260 0x2000 //RX_FDDRC_SLANT_0_1 +261 0x2000 //RX_FDDRC_SLANT_0_2 +262 0x2000 //RX_FDDRC_SLANT_0_3 +263 0x5333 //RX_FDDRC_SLANT_1_0 +264 0x5333 //RX_FDDRC_SLANT_1_1 +265 0x5333 //RX_FDDRC_SLANT_1_2 +266 0x5333 //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +286 0x0100 //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 +#VOL 3 +163 0x3000 //RX_TDDRC_ALPHA_UP_1 +164 0x3000 //RX_TDDRC_ALPHA_UP_2 +165 0x3000 //RX_TDDRC_ALPHA_UP_3 +166 0x3000 //RX_TDDRC_ALPHA_UP_4 +184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +190 0x7FFF //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +269 0x0000 //RX_TDDRC_THRD_0 +270 0x0000 //RX_TDDRC_THRD_1 +271 0x7FFF //RX_TDDRC_THRD_2 +272 0x7FFF //RX_TDDRC_THRD_3 +273 0x7FFF //RX_TDDRC_SLANT_0 +274 0x7FFF //RX_TDDRC_SLANT_1 +275 0x3000 //RX_TDDRC_ALPHA_UP_0 +276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x199A //RX_TDDRC_HMNC_GAIN +279 0x0001 //RX_TDDRC_SMT_FLAG +280 0x0CCD //RX_TDDRC_SMT_W +281 0x0155 //RX_TDDRC_DRC_GAIN +195 0x0020 //RX_FDEQ_SUBNUM +196 0x4848 //RX_FDEQ_GAIN_0 +197 0x4848 //RX_FDEQ_GAIN_1 +198 0x4848 //RX_FDEQ_GAIN_2 +199 0x4848 //RX_FDEQ_GAIN_3 +200 0x4848 //RX_FDEQ_GAIN_4 +201 0x4848 //RX_FDEQ_GAIN_5 +202 0x4848 //RX_FDEQ_GAIN_6 +203 0x4848 //RX_FDEQ_GAIN_7 +204 0x4848 //RX_FDEQ_GAIN_8 +205 0x4848 //RX_FDEQ_GAIN_9 +206 0x4848 //RX_FDEQ_GAIN_10 +207 0x4848 //RX_FDEQ_GAIN_11 +208 0x4848 //RX_FDEQ_GAIN_12 +209 0x4848 //RX_FDEQ_GAIN_13 +210 0x4848 //RX_FDEQ_GAIN_14 +211 0x4848 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0202 //RX_FDEQ_BIN_0 +221 0x0203 //RX_FDEQ_BIN_1 +222 0x0303 //RX_FDEQ_BIN_2 +223 0x0304 //RX_FDEQ_BIN_3 +224 0x0405 //RX_FDEQ_BIN_4 +225 0x0506 //RX_FDEQ_BIN_5 +226 0x0708 //RX_FDEQ_BIN_6 +227 0x090A //RX_FDEQ_BIN_7 +228 0x0B0C //RX_FDEQ_BIN_8 +229 0x0D0E //RX_FDEQ_BIN_9 +230 0x1013 //RX_FDEQ_BIN_10 +231 0x1719 //RX_FDEQ_BIN_11 +232 0x1B1E //RX_FDEQ_BIN_12 +233 0x1E1E //RX_FDEQ_BIN_13 +234 0x1E28 //RX_FDEQ_BIN_14 +235 0x282C //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x4000 //RX_FDEQ_RESRV_0 +245 0x0320 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0030 //RX_FDDRC_BAND_MARGIN_1 +248 0x0050 //RX_FDDRC_BAND_MARGIN_2 +249 0x0080 //RX_FDDRC_BAND_MARGIN_3 +250 0x0007 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x5000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x6400 //RX_FDDRC_THRD_3_2 +258 0x6400 //RX_FDDRC_THRD_3_3 +259 0x2000 //RX_FDDRC_SLANT_0_0 +260 0x2000 //RX_FDDRC_SLANT_0_1 +261 0x2000 //RX_FDDRC_SLANT_0_2 +262 0x2000 //RX_FDDRC_SLANT_0_3 +263 0x5333 //RX_FDDRC_SLANT_1_0 +264 0x5333 //RX_FDDRC_SLANT_1_1 +265 0x5333 //RX_FDDRC_SLANT_1_2 +266 0x5333 //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +286 0x0100 //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 +#VOL 4 +163 0x3000 //RX_TDDRC_ALPHA_UP_1 +164 0x3000 //RX_TDDRC_ALPHA_UP_2 +165 0x3000 //RX_TDDRC_ALPHA_UP_3 +166 0x3000 //RX_TDDRC_ALPHA_UP_4 +184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +190 0x7FFF //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +269 0x0000 //RX_TDDRC_THRD_0 +270 0x0000 //RX_TDDRC_THRD_1 +271 0x7FFF //RX_TDDRC_THRD_2 +272 0x7FFF //RX_TDDRC_THRD_3 +273 0x7FFF //RX_TDDRC_SLANT_0 +274 0x7FFF //RX_TDDRC_SLANT_1 +275 0x3000 //RX_TDDRC_ALPHA_UP_0 +276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x199A //RX_TDDRC_HMNC_GAIN +279 0x0001 //RX_TDDRC_SMT_FLAG +280 0x0CCD //RX_TDDRC_SMT_W +281 0x0155 //RX_TDDRC_DRC_GAIN +195 0x0020 //RX_FDEQ_SUBNUM +196 0x4848 //RX_FDEQ_GAIN_0 +197 0x4848 //RX_FDEQ_GAIN_1 +198 0x4848 //RX_FDEQ_GAIN_2 +199 0x4848 //RX_FDEQ_GAIN_3 +200 0x4848 //RX_FDEQ_GAIN_4 +201 0x4848 //RX_FDEQ_GAIN_5 +202 0x4848 //RX_FDEQ_GAIN_6 +203 0x4848 //RX_FDEQ_GAIN_7 +204 0x4848 //RX_FDEQ_GAIN_8 +205 0x4848 //RX_FDEQ_GAIN_9 +206 0x4848 //RX_FDEQ_GAIN_10 +207 0x4848 //RX_FDEQ_GAIN_11 +208 0x4848 //RX_FDEQ_GAIN_12 +209 0x4848 //RX_FDEQ_GAIN_13 +210 0x4848 //RX_FDEQ_GAIN_14 +211 0x4848 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0202 //RX_FDEQ_BIN_0 +221 0x0203 //RX_FDEQ_BIN_1 +222 0x0303 //RX_FDEQ_BIN_2 +223 0x0304 //RX_FDEQ_BIN_3 +224 0x0405 //RX_FDEQ_BIN_4 +225 0x0506 //RX_FDEQ_BIN_5 +226 0x0708 //RX_FDEQ_BIN_6 +227 0x090A //RX_FDEQ_BIN_7 +228 0x0B0C //RX_FDEQ_BIN_8 +229 0x0D0E //RX_FDEQ_BIN_9 +230 0x1013 //RX_FDEQ_BIN_10 +231 0x1719 //RX_FDEQ_BIN_11 +232 0x1B1E //RX_FDEQ_BIN_12 +233 0x1E1E //RX_FDEQ_BIN_13 +234 0x1E28 //RX_FDEQ_BIN_14 +235 0x282C //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x4000 //RX_FDEQ_RESRV_0 +245 0x0320 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0030 //RX_FDDRC_BAND_MARGIN_1 +248 0x0050 //RX_FDDRC_BAND_MARGIN_2 +249 0x0080 //RX_FDDRC_BAND_MARGIN_3 +250 0x0007 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x5000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x6400 //RX_FDDRC_THRD_3_2 +258 0x6400 //RX_FDDRC_THRD_3_3 +259 0x2000 //RX_FDDRC_SLANT_0_0 +260 0x2000 //RX_FDDRC_SLANT_0_1 +261 0x2000 //RX_FDDRC_SLANT_0_2 +262 0x2000 //RX_FDDRC_SLANT_0_3 +263 0x5333 //RX_FDDRC_SLANT_1_0 +264 0x5333 //RX_FDDRC_SLANT_1_1 +265 0x5333 //RX_FDDRC_SLANT_1_2 +266 0x5333 //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +286 0x0100 //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 +#VOL 5 +163 0x3000 //RX_TDDRC_ALPHA_UP_1 +164 0x3000 //RX_TDDRC_ALPHA_UP_2 +165 0x3000 //RX_TDDRC_ALPHA_UP_3 +166 0x3000 //RX_TDDRC_ALPHA_UP_4 +184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +190 0x7FFF //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +269 0x0000 //RX_TDDRC_THRD_0 +270 0x0000 //RX_TDDRC_THRD_1 +271 0x7FFF //RX_TDDRC_THRD_2 +272 0x7FFF //RX_TDDRC_THRD_3 +273 0x7FFF //RX_TDDRC_SLANT_0 +274 0x7FFF //RX_TDDRC_SLANT_1 +275 0x3000 //RX_TDDRC_ALPHA_UP_0 +276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x199A //RX_TDDRC_HMNC_GAIN +279 0x0001 //RX_TDDRC_SMT_FLAG +280 0x0CCD //RX_TDDRC_SMT_W +281 0x0155 //RX_TDDRC_DRC_GAIN +195 0x0020 //RX_FDEQ_SUBNUM +196 0x4848 //RX_FDEQ_GAIN_0 +197 0x4848 //RX_FDEQ_GAIN_1 +198 0x4848 //RX_FDEQ_GAIN_2 +199 0x4848 //RX_FDEQ_GAIN_3 +200 0x4848 //RX_FDEQ_GAIN_4 +201 0x4848 //RX_FDEQ_GAIN_5 +202 0x4848 //RX_FDEQ_GAIN_6 +203 0x4848 //RX_FDEQ_GAIN_7 +204 0x4848 //RX_FDEQ_GAIN_8 +205 0x4848 //RX_FDEQ_GAIN_9 +206 0x4848 //RX_FDEQ_GAIN_10 +207 0x4848 //RX_FDEQ_GAIN_11 +208 0x4848 //RX_FDEQ_GAIN_12 +209 0x4848 //RX_FDEQ_GAIN_13 +210 0x4848 //RX_FDEQ_GAIN_14 +211 0x4848 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0202 //RX_FDEQ_BIN_0 +221 0x0203 //RX_FDEQ_BIN_1 +222 0x0303 //RX_FDEQ_BIN_2 +223 0x0304 //RX_FDEQ_BIN_3 +224 0x0405 //RX_FDEQ_BIN_4 +225 0x0506 //RX_FDEQ_BIN_5 +226 0x0708 //RX_FDEQ_BIN_6 +227 0x090A //RX_FDEQ_BIN_7 +228 0x0B0C //RX_FDEQ_BIN_8 +229 0x0D0E //RX_FDEQ_BIN_9 +230 0x1013 //RX_FDEQ_BIN_10 +231 0x1719 //RX_FDEQ_BIN_11 +232 0x1B1E //RX_FDEQ_BIN_12 +233 0x1E1E //RX_FDEQ_BIN_13 +234 0x1E28 //RX_FDEQ_BIN_14 +235 0x282C //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x4000 //RX_FDEQ_RESRV_0 +245 0x0320 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0030 //RX_FDDRC_BAND_MARGIN_1 +248 0x0050 //RX_FDDRC_BAND_MARGIN_2 +249 0x0080 //RX_FDDRC_BAND_MARGIN_3 +250 0x0007 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x5000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x6400 //RX_FDDRC_THRD_3_2 +258 0x6400 //RX_FDDRC_THRD_3_3 +259 0x2000 //RX_FDDRC_SLANT_0_0 +260 0x2000 //RX_FDDRC_SLANT_0_1 +261 0x2000 //RX_FDDRC_SLANT_0_2 +262 0x2000 //RX_FDDRC_SLANT_0_3 +263 0x5333 //RX_FDDRC_SLANT_1_0 +264 0x5333 //RX_FDDRC_SLANT_1_1 +265 0x5333 //RX_FDDRC_SLANT_1_2 +266 0x5333 //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +286 0x0100 //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 +#VOL 6 +163 0x3000 //RX_TDDRC_ALPHA_UP_1 +164 0x3000 //RX_TDDRC_ALPHA_UP_2 +165 0x3000 //RX_TDDRC_ALPHA_UP_3 +166 0x3000 //RX_TDDRC_ALPHA_UP_4 +184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +190 0x7FFF //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +269 0x0000 //RX_TDDRC_THRD_0 +270 0x0000 //RX_TDDRC_THRD_1 +271 0x7FFF //RX_TDDRC_THRD_2 +272 0x7FFF //RX_TDDRC_THRD_3 +273 0x7FFF //RX_TDDRC_SLANT_0 +274 0x7FFF //RX_TDDRC_SLANT_1 +275 0x3000 //RX_TDDRC_ALPHA_UP_0 +276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x199A //RX_TDDRC_HMNC_GAIN +279 0x0001 //RX_TDDRC_SMT_FLAG +280 0x0CCD //RX_TDDRC_SMT_W +281 0x0155 //RX_TDDRC_DRC_GAIN +195 0x0020 //RX_FDEQ_SUBNUM +196 0x4848 //RX_FDEQ_GAIN_0 +197 0x4848 //RX_FDEQ_GAIN_1 +198 0x4848 //RX_FDEQ_GAIN_2 +199 0x4848 //RX_FDEQ_GAIN_3 +200 0x4848 //RX_FDEQ_GAIN_4 +201 0x4848 //RX_FDEQ_GAIN_5 +202 0x4848 //RX_FDEQ_GAIN_6 +203 0x4848 //RX_FDEQ_GAIN_7 +204 0x4848 //RX_FDEQ_GAIN_8 +205 0x4848 //RX_FDEQ_GAIN_9 +206 0x4848 //RX_FDEQ_GAIN_10 +207 0x4848 //RX_FDEQ_GAIN_11 +208 0x4848 //RX_FDEQ_GAIN_12 +209 0x4848 //RX_FDEQ_GAIN_13 +210 0x4848 //RX_FDEQ_GAIN_14 +211 0x4848 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0202 //RX_FDEQ_BIN_0 +221 0x0203 //RX_FDEQ_BIN_1 +222 0x0303 //RX_FDEQ_BIN_2 +223 0x0304 //RX_FDEQ_BIN_3 +224 0x0405 //RX_FDEQ_BIN_4 +225 0x0506 //RX_FDEQ_BIN_5 +226 0x0708 //RX_FDEQ_BIN_6 +227 0x090A //RX_FDEQ_BIN_7 +228 0x0B0C //RX_FDEQ_BIN_8 +229 0x0D0E //RX_FDEQ_BIN_9 +230 0x1013 //RX_FDEQ_BIN_10 +231 0x1719 //RX_FDEQ_BIN_11 +232 0x1B1E //RX_FDEQ_BIN_12 +233 0x1E1E //RX_FDEQ_BIN_13 +234 0x1E28 //RX_FDEQ_BIN_14 +235 0x282C //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x4000 //RX_FDEQ_RESRV_0 +245 0x0320 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0030 //RX_FDDRC_BAND_MARGIN_1 +248 0x0050 //RX_FDDRC_BAND_MARGIN_2 +249 0x0080 //RX_FDDRC_BAND_MARGIN_3 +250 0x0007 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x5000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x6400 //RX_FDDRC_THRD_3_2 +258 0x6400 //RX_FDDRC_THRD_3_3 +259 0x2000 //RX_FDDRC_SLANT_0_0 +260 0x2000 //RX_FDDRC_SLANT_0_1 +261 0x2000 //RX_FDDRC_SLANT_0_2 +262 0x2000 //RX_FDDRC_SLANT_0_3 +263 0x5333 //RX_FDDRC_SLANT_1_0 +264 0x5333 //RX_FDDRC_SLANT_1_1 +265 0x5333 //RX_FDDRC_SLANT_1_2 +266 0x5333 //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +286 0x0100 //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 #CASE_NAME BLUETOOTH-BT_HAC-VOICE_GENERIC-FB -#PARAM_TYPE TX+RX -#TOTAL_CUSTOM_STEP 7 +#PARAM_MODE Full +#PARAM_TYPE TX+2RX +#TOTAL_CUSTOM_STEP 7+7 #TX 0 0x0001 //TX_OPERATION_MODE_0 1 0x0001 //TX_OPERATION_MODE_1 @@ -7270,11 +10939,11 @@ 248 0xF800 //TX_THR_SN_EST_6 249 0xF800 //TX_THR_SN_EST_7 250 0x0100 //TX_DELTA_THR_SN_EST_0 -251 0x0200 //TX_DELTA_THR_SN_EST_1 -252 0x0100 //TX_DELTA_THR_SN_EST_2 -253 0x0200 //TX_DELTA_THR_SN_EST_3 +251 0x0100 //TX_DELTA_THR_SN_EST_1 +252 0x0200 //TX_DELTA_THR_SN_EST_2 +253 0x0100 //TX_DELTA_THR_SN_EST_3 254 0x0100 //TX_DELTA_THR_SN_EST_4 -255 0x0100 //TX_DELTA_THR_SN_EST_5 +255 0x0200 //TX_DELTA_THR_SN_EST_5 256 0x0200 //TX_DELTA_THR_SN_EST_6 257 0x0200 //TX_DELTA_THR_SN_EST_7 258 0x4000 //TX_LAMBDA_NN_EST_0 @@ -7302,11 +10971,11 @@ 280 0x1000 //TX_B_POST_FLT_1 281 0x0010 //TX_NS_LVL_CTRL_0 282 0x0014 //TX_NS_LVL_CTRL_1 -283 0x0014 //TX_NS_LVL_CTRL_2 -284 0x0018 //TX_NS_LVL_CTRL_3 -285 0x0016 //TX_NS_LVL_CTRL_4 -286 0x0014 //TX_NS_LVL_CTRL_5 -287 0x0011 //TX_NS_LVL_CTRL_6 +283 0x0018 //TX_NS_LVL_CTRL_2 +284 0x0016 //TX_NS_LVL_CTRL_3 +285 0x0014 //TX_NS_LVL_CTRL_4 +286 0x0011 //TX_NS_LVL_CTRL_5 +287 0x0014 //TX_NS_LVL_CTRL_6 288 0x0011 //TX_NS_LVL_CTRL_7 289 0x000F //TX_MIN_GAIN_S_0 290 0x0010 //TX_MIN_GAIN_S_1 @@ -7324,8 +10993,8 @@ 302 0x4000 //TX_SNRI_SUP_2 303 0x4000 //TX_SNRI_SUP_3 304 0x4000 //TX_SNRI_SUP_4 -305 0x4000 //TX_SNRI_SUP_5 -306 0x50C0 //TX_SNRI_SUP_6 +305 0x50C0 //TX_SNRI_SUP_5 +306 0x4000 //TX_SNRI_SUP_6 307 0x7FFF //TX_SNRI_SUP_7 308 0x7FFF //TX_THR_LFNS 309 0x0018 //TX_G_LFNS @@ -7334,19 +11003,19 @@ 312 0x7FFF //TX_A_POST_FILT_0 313 0x2000 //TX_A_POST_FILT_1 314 0x5000 //TX_A_POST_FILT_S_0 -315 0x6000 //TX_A_POST_FILT_S_1 -316 0x4C00 //TX_A_POST_FILT_S_2 -317 0x4000 //TX_A_POST_FILT_S_3 -318 0x6000 //TX_A_POST_FILT_S_4 -319 0x4000 //TX_A_POST_FILT_S_5 -320 0x5000 //TX_A_POST_FILT_S_6 +315 0x4C00 //TX_A_POST_FILT_S_1 +316 0x4000 //TX_A_POST_FILT_S_2 +317 0x6000 //TX_A_POST_FILT_S_3 +318 0x4000 //TX_A_POST_FILT_S_4 +319 0x5000 //TX_A_POST_FILT_S_5 +320 0x6000 //TX_A_POST_FILT_S_6 321 0x7000 //TX_A_POST_FILT_S_7 322 0x2000 //TX_B_POST_FILT_0 -323 0x1000 //TX_B_POST_FILT_1 +323 0x2000 //TX_B_POST_FILT_1 324 0x2000 //TX_B_POST_FILT_2 -325 0x2000 //TX_B_POST_FILT_3 +325 0x4000 //TX_B_POST_FILT_3 326 0x4000 //TX_B_POST_FILT_4 -327 0x4000 //TX_B_POST_FILT_5 +327 0x1000 //TX_B_POST_FILT_5 328 0x1000 //TX_B_POST_FILT_6 329 0x2000 //TX_B_POST_FILT_7 330 0x4000 //TX_B_LESSCUT_RTO_S_0 @@ -7354,14 +11023,14 @@ 332 0x7FFF //TX_B_LESSCUT_RTO_S_2 333 0x7FFF //TX_B_LESSCUT_RTO_S_3 334 0x7FFF //TX_B_LESSCUT_RTO_S_4 -335 0x7FFF //TX_B_LESSCUT_RTO_S_5 -336 0x6000 //TX_B_LESSCUT_RTO_S_6 +335 0x6000 //TX_B_LESSCUT_RTO_S_5 +336 0x7FFF //TX_B_LESSCUT_RTO_S_6 337 0x7FFF //TX_B_LESSCUT_RTO_S_7 338 0x7C00 //TX_LAMBDA_PFILT 339 0x7C00 //TX_LAMBDA_PFILT_S_0 340 0x7C00 //TX_LAMBDA_PFILT_S_1 -341 0x7C00 //TX_LAMBDA_PFILT_S_2 -342 0x7A00 //TX_LAMBDA_PFILT_S_3 +341 0x7A00 //TX_LAMBDA_PFILT_S_2 +342 0x7C00 //TX_LAMBDA_PFILT_S_3 343 0x7C00 //TX_LAMBDA_PFILT_S_4 344 0x7C00 //TX_LAMBDA_PFILT_S_5 345 0x7C00 //TX_LAMBDA_PFILT_S_6 @@ -7399,10 +11068,10 @@ 377 0x7FFF //TX_NOISE_TH_5_4 378 0x2710 //TX_NOISE_TH_6 379 0x0033 //TX_MINENOISE_TH -380 0x4000 //TX_MINENOISE_MIC0_TH_MTS -381 0xFFEE //TX_MINENOISE_MIC0_TH_EXP -382 0x6000 //TX_MINENOISE_MIC0_S_TH_MTS -383 0xFFF3 //TX_MINENOISE_MIC0_S_TH_EXP +380 0x4000 //TX_MORENS_TFMASK_TH +381 0xFFEE //TX_DRC_QUIET_FLOOR +382 0x6000 //TX_RATIODTL_CUT_TH +383 0xFFF3 //TX_DT_CUT_K1 384 0x0666 //TX_OUT_ENER_S_TH_CLEAN 385 0x0666 //TX_OUT_ENER_S_TH_LESSCLEAN 386 0x0333 //TX_OUT_ENER_S_TH_NOISY @@ -7410,15 +11079,15 @@ 388 0x0333 //TX_OUT_ENER_TH_SPEECH 389 0x2000 //TX_SN_NPB_GAIN 390 0x0000 //TX_NN_NPB_GAIN -391 0x0000 //TX_CSX_ALPHA_0 -392 0x0000 //TX_CSX_ALPHA_1 -393 0x0000 //TX_CSX_ALPHA_2 -394 0x0000 //TX_CSX_ALPHA_3 -395 0x0800 //TX_MU_ARSP_EST -396 0x00C8 //TX_P_OUTBEAM_MIN_TH +391 0x0000 //TX_POST_MASK_SUP_HSNE +392 0x0000 //TX_TAIL_DET_TH +393 0x0000 //TX_B_LESSCUT_RTO_WTA +394 0x0000 //TX_MEL_G_R +395 0x0800 //TX_SUPHIGH_TH +396 0x00C8 //TX_MASK_G_R 397 0x0002 //TX_EXTRA_NS_L -398 0x0800 //TX_EXTRA_NS_A -399 0x0005 //TX_VR_NOISE_FLOOR_TH +398 0x0800 //TX_C_POST_FLT_MASK +399 0x0005 //TX_A_POST_FLT_WNS 400 0x0148 //TX_MIN_G_LOW300HZ 401 0x0002 //TX_MAXLEVEL_CNG 402 0x00B4 //TX_STN_NOISE_TH @@ -7533,16 +11202,16 @@ 511 0x6666 //TX_MIC_TO_BFGAIN 512 0x0000 //TX_MICTOBFGAIN0 513 0x0000 //TX_FASTMUE_TH -514 0x0000 //TX_DERVB_LEN_0 -515 0x0000 //TX_DERVB_LEN_1 -516 0x0000 //TX_RHO_DERVB -517 0x0000 //TX_MIC_INDX_DERVB -518 0x0000 //TX_MU_DERVB -519 0x0000 //TX_DR_RESRV_0 -520 0x0000 //TX_DR_RESRV_1 -521 0x0000 //TX_DR_RESRV_2 -522 0x0000 //TX_DR_RESRV_3 -523 0x0000 //TX_DR_RESRV_4 +514 0x0000 //TX_DEREVERB_LF_MU +515 0x0000 //TX_DEREVERB_HF_MU +516 0x0000 //TX_DEREVERB_DELAY +517 0x0000 //TX_DEREVERB_COEF_LEN +518 0x0000 //TX_DEREVERB_DNR +519 0x0000 //TX_DEREVERB_ALPHA +520 0x0000 //TX_DEREVERB_BETA +521 0x0000 //TX_GSC_RTOL_TH +522 0x0000 //TX_GSC_RTOH_TH +523 0x0000 //TX_WIDE2_MEANHTH 524 0x0000 //TX_DR_RESRV_5 525 0x0000 //TX_DR_RESRV_6 526 0x0000 //TX_DR_RESRV_7 @@ -7916,6 +11585,71 @@ 894 0xC000 //TX_FASTNS_SSA_THHFL 895 0xCCCC //TX_FASTNS_SSA_THLFH 896 0xD999 //TX_FASTNS_SSA_THHFH +897 0x0000 //TX_SENDFUNC_REG_MICMUTE +898 0x0000 //TX_SENDFUNC_REG_MICMUTE1 +899 0x0000 //TX_MICMUTE_RATIO_THR +900 0x0000 //TX_MICMUTE_AMP_THR +901 0x0000 //TX_MICMUTE_HPF_IND +902 0x0000 //TX_MICMUTE_LOG_EYR_TH +903 0x0000 //TX_MICMUTE_CVG_TIME +904 0x0000 //TX_MICMUTE_RELEASE_TIME +905 0x0000 //TX_MIC_VOLUME_MIC0MUTE +906 0x0000 //TX_MICMUTE_EPD_OFFSET_0 +907 0x0000 //TX_MICMUTE_FRQ_AEC_L +908 0x0000 //TX_MICMUTE_EAD_THR +909 0x0000 //TX_MICMUTE_LAMBDA_CB_NLE +910 0x0000 //TX_MICMUTE_LAMBDA_RE_EST +911 0x0000 //TX_DTD_THR1_MICMUTE_0 +912 0x0000 //TX_DTD_THR1_MICMUTE_1 +913 0x0000 //TX_DTD_THR1_MICMUTE_2 +914 0x0000 //TX_DTD_THR1_MICMUTE_3 +915 0x0000 //TX_DTD_THR2_MICMUTE_0 +916 0x0000 //TX_MICMUTE_MIN_EQ_RE_EST_0 +917 0x0000 //TX_MICMUTE_MIN_EQ_RE_EST_1 +918 0x0000 //TX_MICMUTE_MIN_EQ_RE_EST_2 +919 0x0000 //TX_MICMUTE_MIN_EQ_RE_EST_3 +920 0x0000 //TX_MICMUTE_MIN_EQ_RE_EST_4 +921 0x0000 //TX_MICMUTE_C_POST_FLT +922 0x0000 //TX_MICMUTE_DT_CUT_K +923 0x0000 //TX_MICMUTE_DT_CUT_THR +924 0x0000 //TX_MICMUTE_DT_CUT_K2 +925 0x0000 //TX_MICMUTE_DT_CUT_THR2 +926 0x0000 //TX_MICMUTE_DT2_HOLD_N +927 0x0000 //TX_MICMUTE_RATIODTH_THCUT +928 0x0000 //TX_MICMUTE_B_POST_FLT_ECHOL +929 0x0000 //TX_MICMUTE_B_POST_FLT_ECHOH +930 0x0000 //TX_MICMUTE_C_POST_FLT_MASK +931 0x0000 //TX_MICMUTE_RATIODTL_CUT_TH +932 0x0000 //TX_MICMUTE_DT_CUT_K1 +933 0x0000 //TX_MICMUTE_N2_SN_EST +934 0x0000 //TX_MICMUTE_THR_SN_EST_0 +935 0x0000 //TX_MICMUTE_MIN_G_CTRL_0 +936 0x0000 //TX_MICMUTE_A_POST_FILT_S_0 +937 0x0000 //TX_MICMUTE_B_POST_FILT_0 +938 0x0000 //TX_MIC1RUB_AMP_THR +939 0x0000 //TX_MIC1MUTE_RATIO_THR +940 0x0000 //TX_MIC1MUTE_AMP_THR +941 0x0000 //TX_MIC1MUTE_CVG_TIME +942 0x0000 //TX_MIC1MUTE_RELEASE_TIME +943 0x0000 //TX_AMS_RESRV_01 +944 0x0000 //TX_AMS_RESRV_02 +945 0x0000 //TX_AMS_RESRV_03 +946 0x0000 //TX_AMS_RESRV_04 +947 0x0000 //TX_AMS_RESRV_05 +948 0x0000 //TX_AMS_RESRV_06 +949 0x0000 //TX_AMS_RESRV_07 +950 0x0000 //TX_AMS_RESRV_08 +951 0x0000 //TX_AMS_RESRV_09 +952 0x0000 //TX_AMS_RESRV_10 +953 0x0000 //TX_AMS_RESRV_11 +954 0x0000 //TX_AMS_RESRV_12 +955 0x0000 //TX_AMS_RESRV_13 +956 0x0000 //TX_AMS_RESRV_14 +957 0x0000 //TX_AMS_RESRV_15 +958 0x0000 //TX_AMS_RESRV_16 +959 0x0000 //TX_AMS_RESRV_17 +960 0x0000 //TX_AMS_RESRV_18 +961 0x0000 //TX_AMS_RESRV_19 #RX 0 0x0064 //RX_RECVFUNC_MODE_0 1 0x0000 //RX_RECVFUNC_MODE_1 @@ -8767,10 +12501,862 @@ 110 0x0000 //RX_FDDRC_RESRV_0 129 0x0100 //RX_SPK_VOL 130 0x0000 //RX_VOL_RESRV_0 +#RX 2 +157 0x0064 //RX_RECVFUNC_MODE_0 +158 0x0000 //RX_RECVFUNC_MODE_1 +159 0x0004 //RX_SAMPLINGFREQ_SIG +160 0x0004 //RX_SAMPLINGFREQ_PROC +161 0x000A //RX_FRAME_SZ +162 0x0000 //RX_DELAY_OPT +163 0x1000 //RX_TDDRC_ALPHA_UP_1 +164 0x1000 //RX_TDDRC_ALPHA_UP_2 +165 0x1000 //RX_TDDRC_ALPHA_UP_3 +166 0x1000 //RX_TDDRC_ALPHA_UP_4 +167 0x0800 //RX_PGA +168 0x7FFF //RX_A_HP +169 0x4000 //RX_B_PE +170 0x7800 //RX_THR_PITCH_DET_0 +171 0x7000 //RX_THR_PITCH_DET_1 +172 0x6000 //RX_THR_PITCH_DET_2 +173 0x0008 //RX_PITCH_BFR_LEN +174 0x0003 //RX_SBD_PITCH_DET +175 0x0100 //RX_PP_RESRV_0 +176 0x0020 //RX_PP_RESRV_1 +177 0x0500 //RX_N_SN_EST +178 0x000C //RX_N2_SN_EST +179 0x000A //RX_NS_LVL_CTRL +180 0xF600 //RX_THR_SN_EST +181 0x7000 //RX_LAMBDA_PFILT +182 0x000A //RX_FENS_RESRV_0 +183 0x0190 //RX_FENS_RESRV_1 +184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +187 0x0002 //RX_EXTRA_NS_L +188 0x0800 //RX_EXTRA_NS_A +189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +190 0x7FFF //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +192 0x199A //RX_A_POST_FLT +193 0x0000 //RX_LMT_THRD +194 0x4000 //RX_LMT_ALPHA +195 0x0020 //RX_FDEQ_SUBNUM +196 0x4848 //RX_FDEQ_GAIN_0 +197 0x4848 //RX_FDEQ_GAIN_1 +198 0x4848 //RX_FDEQ_GAIN_2 +199 0x4848 //RX_FDEQ_GAIN_3 +200 0x4848 //RX_FDEQ_GAIN_4 +201 0x4848 //RX_FDEQ_GAIN_5 +202 0x4848 //RX_FDEQ_GAIN_6 +203 0x4848 //RX_FDEQ_GAIN_7 +204 0x4848 //RX_FDEQ_GAIN_8 +205 0x4848 //RX_FDEQ_GAIN_9 +206 0x4848 //RX_FDEQ_GAIN_10 +207 0x4848 //RX_FDEQ_GAIN_11 +208 0x4848 //RX_FDEQ_GAIN_12 +209 0x4848 //RX_FDEQ_GAIN_13 +210 0x4848 //RX_FDEQ_GAIN_14 +211 0x4848 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0202 //RX_FDEQ_BIN_0 +221 0x0203 //RX_FDEQ_BIN_1 +222 0x0304 //RX_FDEQ_BIN_2 +223 0x0405 //RX_FDEQ_BIN_3 +224 0x0607 //RX_FDEQ_BIN_4 +225 0x0809 //RX_FDEQ_BIN_5 +226 0x0A0B //RX_FDEQ_BIN_6 +227 0x0C0D //RX_FDEQ_BIN_7 +228 0x0E0F //RX_FDEQ_BIN_8 +229 0x1011 //RX_FDEQ_BIN_9 +230 0x1214 //RX_FDEQ_BIN_10 +231 0x1618 //RX_FDEQ_BIN_11 +232 0x1C1C //RX_FDEQ_BIN_12 +233 0x2020 //RX_FDEQ_BIN_13 +234 0x2020 //RX_FDEQ_BIN_14 +235 0x2011 //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x4000 //RX_FDEQ_RESRV_0 +245 0x0320 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0030 //RX_FDDRC_BAND_MARGIN_1 +248 0x0050 //RX_FDDRC_BAND_MARGIN_2 +249 0x0080 //RX_FDDRC_BAND_MARGIN_3 +250 0x0007 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x5000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x6400 //RX_FDDRC_THRD_3_2 +258 0x6400 //RX_FDDRC_THRD_3_3 +259 0x2000 //RX_FDDRC_SLANT_0_0 +260 0x2000 //RX_FDDRC_SLANT_0_1 +261 0x2000 //RX_FDDRC_SLANT_0_2 +262 0x2000 //RX_FDDRC_SLANT_0_3 +263 0x5333 //RX_FDDRC_SLANT_1_0 +264 0x5333 //RX_FDDRC_SLANT_1_1 +265 0x5333 //RX_FDDRC_SLANT_1_2 +266 0x5333 //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +268 0x0000 //RX_FILTINDX +269 0x0000 //RX_TDDRC_THRD_0 +270 0x0000 //RX_TDDRC_THRD_1 +271 0x7FFF //RX_TDDRC_THRD_2 +272 0x7FFF //RX_TDDRC_THRD_3 +273 0x7FFF //RX_TDDRC_SLANT_0 +274 0x7FFF //RX_TDDRC_SLANT_1 +275 0x1000 //RX_TDDRC_ALPHA_UP_0 +276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x199A //RX_TDDRC_HMNC_GAIN +279 0x0001 //RX_TDDRC_SMT_FLAG +280 0x0CCD //RX_TDDRC_SMT_W +281 0x0155 //RX_TDDRC_DRC_GAIN +282 0x7C00 //RX_LAMBDA_PKA_FP +283 0x2000 //RX_TPKA_FP +284 0x2000 //RX_MIN_G_FP +285 0x0080 //RX_MAX_G_FP +286 0x0100 //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 +288 0x0000 //RX_MAXLEVEL_CNG +289 0x3000 //RX_BWE_UV_TH +290 0x3000 //RX_BWE_UV_TH2 +291 0x1800 //RX_BWE_UV_TH3 +292 0x1000 //RX_BWE_V_TH +293 0x04CD //RX_BWE_GAIN1_V_TH1 +294 0x0F33 //RX_BWE_GAIN1_V_TH2 +295 0x7333 //RX_BWE_UV_EQ +296 0x199A //RX_BWE_V_EQ +297 0x7333 //RX_BWE_TONE_TH +298 0x0004 //RX_BWE_UV_HOLD_T +299 0x6CCD //RX_BWE_GAIN2_ALPHA +300 0x799A //RX_BWE_GAIN3_ALPHA +301 0x001E //RX_BWE_CUTOFF +302 0x3000 //RX_BWE_GAINFILL +303 0x3200 //RX_BWE_MAXTH_TONE +304 0x2000 //RX_BWE_EQ_0 +305 0x2000 //RX_BWE_EQ_1 +306 0x2000 //RX_BWE_EQ_2 +307 0x2000 //RX_BWE_EQ_3 +308 0x2000 //RX_BWE_EQ_4 +309 0x2000 //RX_BWE_EQ_5 +310 0x2000 //RX_BWE_EQ_6 +311 0x0000 //RX_BWE_RESRV_0 +312 0x0000 //RX_BWE_RESRV_1 +313 0x0000 //RX_BWE_RESRV_2 +#VOL 0 +163 0x1000 //RX_TDDRC_ALPHA_UP_1 +164 0x1000 //RX_TDDRC_ALPHA_UP_2 +165 0x1000 //RX_TDDRC_ALPHA_UP_3 +166 0x1000 //RX_TDDRC_ALPHA_UP_4 +184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +190 0x7FFF //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +269 0x0000 //RX_TDDRC_THRD_0 +270 0x0000 //RX_TDDRC_THRD_1 +271 0x7FFF //RX_TDDRC_THRD_2 +272 0x7FFF //RX_TDDRC_THRD_3 +273 0x7FFF //RX_TDDRC_SLANT_0 +274 0x7FFF //RX_TDDRC_SLANT_1 +275 0x1000 //RX_TDDRC_ALPHA_UP_0 +276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x199A //RX_TDDRC_HMNC_GAIN +279 0x0001 //RX_TDDRC_SMT_FLAG +280 0x0CCD //RX_TDDRC_SMT_W +281 0x0155 //RX_TDDRC_DRC_GAIN +195 0x0020 //RX_FDEQ_SUBNUM +196 0x4848 //RX_FDEQ_GAIN_0 +197 0x4848 //RX_FDEQ_GAIN_1 +198 0x4848 //RX_FDEQ_GAIN_2 +199 0x4848 //RX_FDEQ_GAIN_3 +200 0x4848 //RX_FDEQ_GAIN_4 +201 0x4848 //RX_FDEQ_GAIN_5 +202 0x4848 //RX_FDEQ_GAIN_6 +203 0x4848 //RX_FDEQ_GAIN_7 +204 0x4848 //RX_FDEQ_GAIN_8 +205 0x4848 //RX_FDEQ_GAIN_9 +206 0x4848 //RX_FDEQ_GAIN_10 +207 0x4848 //RX_FDEQ_GAIN_11 +208 0x4848 //RX_FDEQ_GAIN_12 +209 0x4848 //RX_FDEQ_GAIN_13 +210 0x4848 //RX_FDEQ_GAIN_14 +211 0x4848 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0202 //RX_FDEQ_BIN_0 +221 0x0203 //RX_FDEQ_BIN_1 +222 0x0304 //RX_FDEQ_BIN_2 +223 0x0405 //RX_FDEQ_BIN_3 +224 0x0607 //RX_FDEQ_BIN_4 +225 0x0809 //RX_FDEQ_BIN_5 +226 0x0A0B //RX_FDEQ_BIN_6 +227 0x0C0D //RX_FDEQ_BIN_7 +228 0x0E0F //RX_FDEQ_BIN_8 +229 0x1011 //RX_FDEQ_BIN_9 +230 0x1214 //RX_FDEQ_BIN_10 +231 0x1618 //RX_FDEQ_BIN_11 +232 0x1C1C //RX_FDEQ_BIN_12 +233 0x2020 //RX_FDEQ_BIN_13 +234 0x2020 //RX_FDEQ_BIN_14 +235 0x2011 //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x4000 //RX_FDEQ_RESRV_0 +245 0x0320 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0030 //RX_FDDRC_BAND_MARGIN_1 +248 0x0050 //RX_FDDRC_BAND_MARGIN_2 +249 0x0080 //RX_FDDRC_BAND_MARGIN_3 +250 0x0007 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x5000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x6400 //RX_FDDRC_THRD_3_2 +258 0x6400 //RX_FDDRC_THRD_3_3 +259 0x2000 //RX_FDDRC_SLANT_0_0 +260 0x2000 //RX_FDDRC_SLANT_0_1 +261 0x2000 //RX_FDDRC_SLANT_0_2 +262 0x2000 //RX_FDDRC_SLANT_0_3 +263 0x5333 //RX_FDDRC_SLANT_1_0 +264 0x5333 //RX_FDDRC_SLANT_1_1 +265 0x5333 //RX_FDDRC_SLANT_1_2 +266 0x5333 //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +286 0x0100 //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 +#VOL 1 +163 0x1000 //RX_TDDRC_ALPHA_UP_1 +164 0x1000 //RX_TDDRC_ALPHA_UP_2 +165 0x1000 //RX_TDDRC_ALPHA_UP_3 +166 0x1000 //RX_TDDRC_ALPHA_UP_4 +184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +190 0x7FFF //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +269 0x0000 //RX_TDDRC_THRD_0 +270 0x0000 //RX_TDDRC_THRD_1 +271 0x7FFF //RX_TDDRC_THRD_2 +272 0x7FFF //RX_TDDRC_THRD_3 +273 0x7FFF //RX_TDDRC_SLANT_0 +274 0x7FFF //RX_TDDRC_SLANT_1 +275 0x1000 //RX_TDDRC_ALPHA_UP_0 +276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x199A //RX_TDDRC_HMNC_GAIN +279 0x0001 //RX_TDDRC_SMT_FLAG +280 0x0CCD //RX_TDDRC_SMT_W +281 0x0155 //RX_TDDRC_DRC_GAIN +195 0x0020 //RX_FDEQ_SUBNUM +196 0x4848 //RX_FDEQ_GAIN_0 +197 0x4848 //RX_FDEQ_GAIN_1 +198 0x4848 //RX_FDEQ_GAIN_2 +199 0x4848 //RX_FDEQ_GAIN_3 +200 0x4848 //RX_FDEQ_GAIN_4 +201 0x4848 //RX_FDEQ_GAIN_5 +202 0x4848 //RX_FDEQ_GAIN_6 +203 0x4848 //RX_FDEQ_GAIN_7 +204 0x4848 //RX_FDEQ_GAIN_8 +205 0x4848 //RX_FDEQ_GAIN_9 +206 0x4848 //RX_FDEQ_GAIN_10 +207 0x4848 //RX_FDEQ_GAIN_11 +208 0x4848 //RX_FDEQ_GAIN_12 +209 0x4848 //RX_FDEQ_GAIN_13 +210 0x4848 //RX_FDEQ_GAIN_14 +211 0x4848 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0202 //RX_FDEQ_BIN_0 +221 0x0203 //RX_FDEQ_BIN_1 +222 0x0304 //RX_FDEQ_BIN_2 +223 0x0405 //RX_FDEQ_BIN_3 +224 0x0607 //RX_FDEQ_BIN_4 +225 0x0809 //RX_FDEQ_BIN_5 +226 0x0A0B //RX_FDEQ_BIN_6 +227 0x0C0D //RX_FDEQ_BIN_7 +228 0x0E0F //RX_FDEQ_BIN_8 +229 0x1011 //RX_FDEQ_BIN_9 +230 0x1214 //RX_FDEQ_BIN_10 +231 0x1618 //RX_FDEQ_BIN_11 +232 0x1C1C //RX_FDEQ_BIN_12 +233 0x2020 //RX_FDEQ_BIN_13 +234 0x2020 //RX_FDEQ_BIN_14 +235 0x2011 //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x4000 //RX_FDEQ_RESRV_0 +245 0x0320 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0030 //RX_FDDRC_BAND_MARGIN_1 +248 0x0050 //RX_FDDRC_BAND_MARGIN_2 +249 0x0080 //RX_FDDRC_BAND_MARGIN_3 +250 0x0007 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x5000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x6400 //RX_FDDRC_THRD_3_2 +258 0x6400 //RX_FDDRC_THRD_3_3 +259 0x2000 //RX_FDDRC_SLANT_0_0 +260 0x2000 //RX_FDDRC_SLANT_0_1 +261 0x2000 //RX_FDDRC_SLANT_0_2 +262 0x2000 //RX_FDDRC_SLANT_0_3 +263 0x5333 //RX_FDDRC_SLANT_1_0 +264 0x5333 //RX_FDDRC_SLANT_1_1 +265 0x5333 //RX_FDDRC_SLANT_1_2 +266 0x5333 //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +286 0x0100 //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 +#VOL 2 +163 0x1000 //RX_TDDRC_ALPHA_UP_1 +164 0x1000 //RX_TDDRC_ALPHA_UP_2 +165 0x1000 //RX_TDDRC_ALPHA_UP_3 +166 0x1000 //RX_TDDRC_ALPHA_UP_4 +184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +190 0x7FFF //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +269 0x0000 //RX_TDDRC_THRD_0 +270 0x0000 //RX_TDDRC_THRD_1 +271 0x7FFF //RX_TDDRC_THRD_2 +272 0x7FFF //RX_TDDRC_THRD_3 +273 0x7FFF //RX_TDDRC_SLANT_0 +274 0x7FFF //RX_TDDRC_SLANT_1 +275 0x1000 //RX_TDDRC_ALPHA_UP_0 +276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x199A //RX_TDDRC_HMNC_GAIN +279 0x0001 //RX_TDDRC_SMT_FLAG +280 0x0CCD //RX_TDDRC_SMT_W +281 0x0155 //RX_TDDRC_DRC_GAIN +195 0x0020 //RX_FDEQ_SUBNUM +196 0x4848 //RX_FDEQ_GAIN_0 +197 0x4848 //RX_FDEQ_GAIN_1 +198 0x4848 //RX_FDEQ_GAIN_2 +199 0x4848 //RX_FDEQ_GAIN_3 +200 0x4848 //RX_FDEQ_GAIN_4 +201 0x4848 //RX_FDEQ_GAIN_5 +202 0x4848 //RX_FDEQ_GAIN_6 +203 0x4848 //RX_FDEQ_GAIN_7 +204 0x4848 //RX_FDEQ_GAIN_8 +205 0x4848 //RX_FDEQ_GAIN_9 +206 0x4848 //RX_FDEQ_GAIN_10 +207 0x4848 //RX_FDEQ_GAIN_11 +208 0x4848 //RX_FDEQ_GAIN_12 +209 0x4848 //RX_FDEQ_GAIN_13 +210 0x4848 //RX_FDEQ_GAIN_14 +211 0x4848 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0202 //RX_FDEQ_BIN_0 +221 0x0203 //RX_FDEQ_BIN_1 +222 0x0304 //RX_FDEQ_BIN_2 +223 0x0405 //RX_FDEQ_BIN_3 +224 0x0607 //RX_FDEQ_BIN_4 +225 0x0809 //RX_FDEQ_BIN_5 +226 0x0A0B //RX_FDEQ_BIN_6 +227 0x0C0D //RX_FDEQ_BIN_7 +228 0x0E0F //RX_FDEQ_BIN_8 +229 0x1011 //RX_FDEQ_BIN_9 +230 0x1214 //RX_FDEQ_BIN_10 +231 0x1618 //RX_FDEQ_BIN_11 +232 0x1C1C //RX_FDEQ_BIN_12 +233 0x2020 //RX_FDEQ_BIN_13 +234 0x2020 //RX_FDEQ_BIN_14 +235 0x2011 //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x4000 //RX_FDEQ_RESRV_0 +245 0x0320 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0030 //RX_FDDRC_BAND_MARGIN_1 +248 0x0050 //RX_FDDRC_BAND_MARGIN_2 +249 0x0080 //RX_FDDRC_BAND_MARGIN_3 +250 0x0007 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x5000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x6400 //RX_FDDRC_THRD_3_2 +258 0x6400 //RX_FDDRC_THRD_3_3 +259 0x2000 //RX_FDDRC_SLANT_0_0 +260 0x2000 //RX_FDDRC_SLANT_0_1 +261 0x2000 //RX_FDDRC_SLANT_0_2 +262 0x2000 //RX_FDDRC_SLANT_0_3 +263 0x5333 //RX_FDDRC_SLANT_1_0 +264 0x5333 //RX_FDDRC_SLANT_1_1 +265 0x5333 //RX_FDDRC_SLANT_1_2 +266 0x5333 //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +286 0x0100 //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 +#VOL 3 +163 0x1000 //RX_TDDRC_ALPHA_UP_1 +164 0x1000 //RX_TDDRC_ALPHA_UP_2 +165 0x1000 //RX_TDDRC_ALPHA_UP_3 +166 0x1000 //RX_TDDRC_ALPHA_UP_4 +184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +190 0x7FFF //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +269 0x0000 //RX_TDDRC_THRD_0 +270 0x0000 //RX_TDDRC_THRD_1 +271 0x7FFF //RX_TDDRC_THRD_2 +272 0x7FFF //RX_TDDRC_THRD_3 +273 0x7FFF //RX_TDDRC_SLANT_0 +274 0x7FFF //RX_TDDRC_SLANT_1 +275 0x1000 //RX_TDDRC_ALPHA_UP_0 +276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x199A //RX_TDDRC_HMNC_GAIN +279 0x0001 //RX_TDDRC_SMT_FLAG +280 0x0CCD //RX_TDDRC_SMT_W +281 0x0155 //RX_TDDRC_DRC_GAIN +195 0x0020 //RX_FDEQ_SUBNUM +196 0x4848 //RX_FDEQ_GAIN_0 +197 0x4848 //RX_FDEQ_GAIN_1 +198 0x4848 //RX_FDEQ_GAIN_2 +199 0x4848 //RX_FDEQ_GAIN_3 +200 0x4848 //RX_FDEQ_GAIN_4 +201 0x4848 //RX_FDEQ_GAIN_5 +202 0x4848 //RX_FDEQ_GAIN_6 +203 0x4848 //RX_FDEQ_GAIN_7 +204 0x4848 //RX_FDEQ_GAIN_8 +205 0x4848 //RX_FDEQ_GAIN_9 +206 0x4848 //RX_FDEQ_GAIN_10 +207 0x4848 //RX_FDEQ_GAIN_11 +208 0x4848 //RX_FDEQ_GAIN_12 +209 0x4848 //RX_FDEQ_GAIN_13 +210 0x4848 //RX_FDEQ_GAIN_14 +211 0x4848 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0202 //RX_FDEQ_BIN_0 +221 0x0203 //RX_FDEQ_BIN_1 +222 0x0304 //RX_FDEQ_BIN_2 +223 0x0405 //RX_FDEQ_BIN_3 +224 0x0607 //RX_FDEQ_BIN_4 +225 0x0809 //RX_FDEQ_BIN_5 +226 0x0A0B //RX_FDEQ_BIN_6 +227 0x0C0D //RX_FDEQ_BIN_7 +228 0x0E0F //RX_FDEQ_BIN_8 +229 0x1011 //RX_FDEQ_BIN_9 +230 0x1214 //RX_FDEQ_BIN_10 +231 0x1618 //RX_FDEQ_BIN_11 +232 0x1C1C //RX_FDEQ_BIN_12 +233 0x2020 //RX_FDEQ_BIN_13 +234 0x2020 //RX_FDEQ_BIN_14 +235 0x2011 //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x4000 //RX_FDEQ_RESRV_0 +245 0x0320 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0030 //RX_FDDRC_BAND_MARGIN_1 +248 0x0050 //RX_FDDRC_BAND_MARGIN_2 +249 0x0080 //RX_FDDRC_BAND_MARGIN_3 +250 0x0007 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x5000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x6400 //RX_FDDRC_THRD_3_2 +258 0x6400 //RX_FDDRC_THRD_3_3 +259 0x2000 //RX_FDDRC_SLANT_0_0 +260 0x2000 //RX_FDDRC_SLANT_0_1 +261 0x2000 //RX_FDDRC_SLANT_0_2 +262 0x2000 //RX_FDDRC_SLANT_0_3 +263 0x5333 //RX_FDDRC_SLANT_1_0 +264 0x5333 //RX_FDDRC_SLANT_1_1 +265 0x5333 //RX_FDDRC_SLANT_1_2 +266 0x5333 //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +286 0x0100 //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 +#VOL 4 +163 0x1000 //RX_TDDRC_ALPHA_UP_1 +164 0x1000 //RX_TDDRC_ALPHA_UP_2 +165 0x1000 //RX_TDDRC_ALPHA_UP_3 +166 0x1000 //RX_TDDRC_ALPHA_UP_4 +184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +190 0x7FFF //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +269 0x0000 //RX_TDDRC_THRD_0 +270 0x0000 //RX_TDDRC_THRD_1 +271 0x7FFF //RX_TDDRC_THRD_2 +272 0x7FFF //RX_TDDRC_THRD_3 +273 0x7FFF //RX_TDDRC_SLANT_0 +274 0x7FFF //RX_TDDRC_SLANT_1 +275 0x1000 //RX_TDDRC_ALPHA_UP_0 +276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x199A //RX_TDDRC_HMNC_GAIN +279 0x0001 //RX_TDDRC_SMT_FLAG +280 0x0CCD //RX_TDDRC_SMT_W +281 0x0155 //RX_TDDRC_DRC_GAIN +195 0x0020 //RX_FDEQ_SUBNUM +196 0x4848 //RX_FDEQ_GAIN_0 +197 0x4848 //RX_FDEQ_GAIN_1 +198 0x4848 //RX_FDEQ_GAIN_2 +199 0x4848 //RX_FDEQ_GAIN_3 +200 0x4848 //RX_FDEQ_GAIN_4 +201 0x4848 //RX_FDEQ_GAIN_5 +202 0x4848 //RX_FDEQ_GAIN_6 +203 0x4848 //RX_FDEQ_GAIN_7 +204 0x4848 //RX_FDEQ_GAIN_8 +205 0x4848 //RX_FDEQ_GAIN_9 +206 0x4848 //RX_FDEQ_GAIN_10 +207 0x4848 //RX_FDEQ_GAIN_11 +208 0x4848 //RX_FDEQ_GAIN_12 +209 0x4848 //RX_FDEQ_GAIN_13 +210 0x4848 //RX_FDEQ_GAIN_14 +211 0x4848 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0202 //RX_FDEQ_BIN_0 +221 0x0203 //RX_FDEQ_BIN_1 +222 0x0304 //RX_FDEQ_BIN_2 +223 0x0405 //RX_FDEQ_BIN_3 +224 0x0607 //RX_FDEQ_BIN_4 +225 0x0809 //RX_FDEQ_BIN_5 +226 0x0A0B //RX_FDEQ_BIN_6 +227 0x0C0D //RX_FDEQ_BIN_7 +228 0x0E0F //RX_FDEQ_BIN_8 +229 0x1011 //RX_FDEQ_BIN_9 +230 0x1214 //RX_FDEQ_BIN_10 +231 0x1618 //RX_FDEQ_BIN_11 +232 0x1C1C //RX_FDEQ_BIN_12 +233 0x2020 //RX_FDEQ_BIN_13 +234 0x2020 //RX_FDEQ_BIN_14 +235 0x2011 //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x4000 //RX_FDEQ_RESRV_0 +245 0x0320 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0030 //RX_FDDRC_BAND_MARGIN_1 +248 0x0050 //RX_FDDRC_BAND_MARGIN_2 +249 0x0080 //RX_FDDRC_BAND_MARGIN_3 +250 0x0007 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x5000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x6400 //RX_FDDRC_THRD_3_2 +258 0x6400 //RX_FDDRC_THRD_3_3 +259 0x2000 //RX_FDDRC_SLANT_0_0 +260 0x2000 //RX_FDDRC_SLANT_0_1 +261 0x2000 //RX_FDDRC_SLANT_0_2 +262 0x2000 //RX_FDDRC_SLANT_0_3 +263 0x5333 //RX_FDDRC_SLANT_1_0 +264 0x5333 //RX_FDDRC_SLANT_1_1 +265 0x5333 //RX_FDDRC_SLANT_1_2 +266 0x5333 //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +286 0x0100 //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 +#VOL 5 +163 0x1000 //RX_TDDRC_ALPHA_UP_1 +164 0x1000 //RX_TDDRC_ALPHA_UP_2 +165 0x1000 //RX_TDDRC_ALPHA_UP_3 +166 0x1000 //RX_TDDRC_ALPHA_UP_4 +184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +190 0x7FFF //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +269 0x0000 //RX_TDDRC_THRD_0 +270 0x0000 //RX_TDDRC_THRD_1 +271 0x7FFF //RX_TDDRC_THRD_2 +272 0x7FFF //RX_TDDRC_THRD_3 +273 0x7FFF //RX_TDDRC_SLANT_0 +274 0x7FFF //RX_TDDRC_SLANT_1 +275 0x1000 //RX_TDDRC_ALPHA_UP_0 +276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x199A //RX_TDDRC_HMNC_GAIN +279 0x0001 //RX_TDDRC_SMT_FLAG +280 0x0CCD //RX_TDDRC_SMT_W +281 0x0155 //RX_TDDRC_DRC_GAIN +195 0x0020 //RX_FDEQ_SUBNUM +196 0x4848 //RX_FDEQ_GAIN_0 +197 0x4848 //RX_FDEQ_GAIN_1 +198 0x4848 //RX_FDEQ_GAIN_2 +199 0x4848 //RX_FDEQ_GAIN_3 +200 0x4848 //RX_FDEQ_GAIN_4 +201 0x4848 //RX_FDEQ_GAIN_5 +202 0x4848 //RX_FDEQ_GAIN_6 +203 0x4848 //RX_FDEQ_GAIN_7 +204 0x4848 //RX_FDEQ_GAIN_8 +205 0x4848 //RX_FDEQ_GAIN_9 +206 0x4848 //RX_FDEQ_GAIN_10 +207 0x4848 //RX_FDEQ_GAIN_11 +208 0x4848 //RX_FDEQ_GAIN_12 +209 0x4848 //RX_FDEQ_GAIN_13 +210 0x4848 //RX_FDEQ_GAIN_14 +211 0x4848 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0202 //RX_FDEQ_BIN_0 +221 0x0203 //RX_FDEQ_BIN_1 +222 0x0304 //RX_FDEQ_BIN_2 +223 0x0405 //RX_FDEQ_BIN_3 +224 0x0607 //RX_FDEQ_BIN_4 +225 0x0809 //RX_FDEQ_BIN_5 +226 0x0A0B //RX_FDEQ_BIN_6 +227 0x0C0D //RX_FDEQ_BIN_7 +228 0x0E0F //RX_FDEQ_BIN_8 +229 0x1011 //RX_FDEQ_BIN_9 +230 0x1214 //RX_FDEQ_BIN_10 +231 0x1618 //RX_FDEQ_BIN_11 +232 0x1C1C //RX_FDEQ_BIN_12 +233 0x2020 //RX_FDEQ_BIN_13 +234 0x2020 //RX_FDEQ_BIN_14 +235 0x2011 //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x4000 //RX_FDEQ_RESRV_0 +245 0x0320 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0030 //RX_FDDRC_BAND_MARGIN_1 +248 0x0050 //RX_FDDRC_BAND_MARGIN_2 +249 0x0080 //RX_FDDRC_BAND_MARGIN_3 +250 0x0007 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x5000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x6400 //RX_FDDRC_THRD_3_2 +258 0x6400 //RX_FDDRC_THRD_3_3 +259 0x2000 //RX_FDDRC_SLANT_0_0 +260 0x2000 //RX_FDDRC_SLANT_0_1 +261 0x2000 //RX_FDDRC_SLANT_0_2 +262 0x2000 //RX_FDDRC_SLANT_0_3 +263 0x5333 //RX_FDDRC_SLANT_1_0 +264 0x5333 //RX_FDDRC_SLANT_1_1 +265 0x5333 //RX_FDDRC_SLANT_1_2 +266 0x5333 //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +286 0x0100 //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 +#VOL 6 +163 0x1000 //RX_TDDRC_ALPHA_UP_1 +164 0x1000 //RX_TDDRC_ALPHA_UP_2 +165 0x1000 //RX_TDDRC_ALPHA_UP_3 +166 0x1000 //RX_TDDRC_ALPHA_UP_4 +184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +190 0x7FFF //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +269 0x0000 //RX_TDDRC_THRD_0 +270 0x0000 //RX_TDDRC_THRD_1 +271 0x7FFF //RX_TDDRC_THRD_2 +272 0x7FFF //RX_TDDRC_THRD_3 +273 0x7FFF //RX_TDDRC_SLANT_0 +274 0x7FFF //RX_TDDRC_SLANT_1 +275 0x1000 //RX_TDDRC_ALPHA_UP_0 +276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x199A //RX_TDDRC_HMNC_GAIN +279 0x0001 //RX_TDDRC_SMT_FLAG +280 0x0CCD //RX_TDDRC_SMT_W +281 0x0155 //RX_TDDRC_DRC_GAIN +195 0x0020 //RX_FDEQ_SUBNUM +196 0x4848 //RX_FDEQ_GAIN_0 +197 0x4848 //RX_FDEQ_GAIN_1 +198 0x4848 //RX_FDEQ_GAIN_2 +199 0x4848 //RX_FDEQ_GAIN_3 +200 0x4848 //RX_FDEQ_GAIN_4 +201 0x4848 //RX_FDEQ_GAIN_5 +202 0x4848 //RX_FDEQ_GAIN_6 +203 0x4848 //RX_FDEQ_GAIN_7 +204 0x4848 //RX_FDEQ_GAIN_8 +205 0x4848 //RX_FDEQ_GAIN_9 +206 0x4848 //RX_FDEQ_GAIN_10 +207 0x4848 //RX_FDEQ_GAIN_11 +208 0x4848 //RX_FDEQ_GAIN_12 +209 0x4848 //RX_FDEQ_GAIN_13 +210 0x4848 //RX_FDEQ_GAIN_14 +211 0x4848 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0202 //RX_FDEQ_BIN_0 +221 0x0203 //RX_FDEQ_BIN_1 +222 0x0304 //RX_FDEQ_BIN_2 +223 0x0405 //RX_FDEQ_BIN_3 +224 0x0607 //RX_FDEQ_BIN_4 +225 0x0809 //RX_FDEQ_BIN_5 +226 0x0A0B //RX_FDEQ_BIN_6 +227 0x0C0D //RX_FDEQ_BIN_7 +228 0x0E0F //RX_FDEQ_BIN_8 +229 0x1011 //RX_FDEQ_BIN_9 +230 0x1214 //RX_FDEQ_BIN_10 +231 0x1618 //RX_FDEQ_BIN_11 +232 0x1C1C //RX_FDEQ_BIN_12 +233 0x2020 //RX_FDEQ_BIN_13 +234 0x2020 //RX_FDEQ_BIN_14 +235 0x2011 //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x4000 //RX_FDEQ_RESRV_0 +245 0x0320 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0030 //RX_FDDRC_BAND_MARGIN_1 +248 0x0050 //RX_FDDRC_BAND_MARGIN_2 +249 0x0080 //RX_FDDRC_BAND_MARGIN_3 +250 0x0007 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x5000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x6400 //RX_FDDRC_THRD_3_2 +258 0x6400 //RX_FDDRC_THRD_3_3 +259 0x2000 //RX_FDDRC_SLANT_0_0 +260 0x2000 //RX_FDDRC_SLANT_0_1 +261 0x2000 //RX_FDDRC_SLANT_0_2 +262 0x2000 //RX_FDDRC_SLANT_0_3 +263 0x5333 //RX_FDDRC_SLANT_1_0 +264 0x5333 //RX_FDDRC_SLANT_1_1 +265 0x5333 //RX_FDDRC_SLANT_1_2 +266 0x5333 //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +286 0x0100 //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 #CASE_NAME BLUETOOTH-BTNB-VOICE_GENERIC-NB -#PARAM_TYPE TX+RX -#TOTAL_CUSTOM_STEP 7 +#PARAM_MODE Full +#PARAM_TYPE TX+2RX +#TOTAL_CUSTOM_STEP 7+7 #TX 0 0x0008 //TX_OPERATION_MODE_0 1 0x0008 //TX_OPERATION_MODE_1 @@ -9023,20 +13609,20 @@ 248 0xF400 //TX_THR_SN_EST_6 249 0xF600 //TX_THR_SN_EST_7 250 0x0000 //TX_DELTA_THR_SN_EST_0 -251 0x0000 //TX_DELTA_THR_SN_EST_1 +251 0x0200 //TX_DELTA_THR_SN_EST_1 252 0x0200 //TX_DELTA_THR_SN_EST_2 253 0x0200 //TX_DELTA_THR_SN_EST_3 254 0x0200 //TX_DELTA_THR_SN_EST_4 255 0x0200 //TX_DELTA_THR_SN_EST_5 -256 0x0200 //TX_DELTA_THR_SN_EST_6 +256 0x0000 //TX_DELTA_THR_SN_EST_6 257 0x0200 //TX_DELTA_THR_SN_EST_7 258 0x6000 //TX_LAMBDA_NN_EST_0 -259 0x6000 //TX_LAMBDA_NN_EST_1 +259 0x4000 //TX_LAMBDA_NN_EST_1 260 0x4000 //TX_LAMBDA_NN_EST_2 261 0x4000 //TX_LAMBDA_NN_EST_3 262 0x4000 //TX_LAMBDA_NN_EST_4 263 0x4000 //TX_LAMBDA_NN_EST_5 -264 0x4000 //TX_LAMBDA_NN_EST_6 +264 0x6000 //TX_LAMBDA_NN_EST_6 265 0x4000 //TX_LAMBDA_NN_EST_7 266 0x0400 //TX_N_SN_EST 267 0x001E //TX_INBEAM_T @@ -9054,16 +13640,16 @@ 279 0x1000 //TX_B_POST_FLT_0 280 0x1000 //TX_B_POST_FLT_1 281 0x000F //TX_NS_LVL_CTRL_0 -282 0x000F //TX_NS_LVL_CTRL_1 -283 0x0011 //TX_NS_LVL_CTRL_2 +282 0x0011 //TX_NS_LVL_CTRL_1 +283 0x000F //TX_NS_LVL_CTRL_2 284 0x000F //TX_NS_LVL_CTRL_3 285 0x000F //TX_NS_LVL_CTRL_4 286 0x000F //TX_NS_LVL_CTRL_5 287 0x000F //TX_NS_LVL_CTRL_6 288 0x0011 //TX_NS_LVL_CTRL_7 289 0x000C //TX_MIN_GAIN_S_0 -290 0x000C //TX_MIN_GAIN_S_1 -291 0x000F //TX_MIN_GAIN_S_2 +290 0x000F //TX_MIN_GAIN_S_1 +291 0x000C //TX_MIN_GAIN_S_2 292 0x000C //TX_MIN_GAIN_S_3 293 0x000C //TX_MIN_GAIN_S_4 294 0x000C //TX_MIN_GAIN_S_5 @@ -9087,12 +13673,12 @@ 312 0x7FFF //TX_A_POST_FILT_0 313 0x2000 //TX_A_POST_FILT_1 314 0x4000 //TX_A_POST_FILT_S_0 -315 0x4000 //TX_A_POST_FILT_S_1 +315 0x5000 //TX_A_POST_FILT_S_1 316 0x5000 //TX_A_POST_FILT_S_2 317 0x5000 //TX_A_POST_FILT_S_3 318 0x5000 //TX_A_POST_FILT_S_4 319 0x5000 //TX_A_POST_FILT_S_5 -320 0x5000 //TX_A_POST_FILT_S_6 +320 0x4000 //TX_A_POST_FILT_S_6 321 0x5000 //TX_A_POST_FILT_S_7 322 0x1000 //TX_B_POST_FILT_0 323 0x1000 //TX_B_POST_FILT_1 @@ -9152,10 +13738,10 @@ 377 0x7FFF //TX_NOISE_TH_5_4 378 0x044C //TX_NOISE_TH_6 379 0x0014 //TX_MINENOISE_TH -380 0x4000 //TX_MINENOISE_MIC0_TH_MTS -381 0xFFEE //TX_MINENOISE_MIC0_TH_EXP -382 0x6000 //TX_MINENOISE_MIC0_S_TH_MTS -383 0xFFF3 //TX_MINENOISE_MIC0_S_TH_EXP +380 0x4000 //TX_MORENS_TFMASK_TH +381 0xFFEE //TX_DRC_QUIET_FLOOR +382 0x6000 //TX_RATIODTL_CUT_TH +383 0xFFF3 //TX_DT_CUT_K1 384 0x0666 //TX_OUT_ENER_S_TH_CLEAN 385 0x0666 //TX_OUT_ENER_S_TH_LESSCLEAN 386 0x0333 //TX_OUT_ENER_S_TH_NOISY @@ -9163,15 +13749,15 @@ 388 0x0333 //TX_OUT_ENER_TH_SPEECH 389 0x2000 //TX_SN_NPB_GAIN 390 0x0000 //TX_NN_NPB_GAIN -391 0x0000 //TX_CSX_ALPHA_0 -392 0x0000 //TX_CSX_ALPHA_1 -393 0x0000 //TX_CSX_ALPHA_2 -394 0x0000 //TX_CSX_ALPHA_3 -395 0x0800 //TX_MU_ARSP_EST -396 0x00C8 //TX_P_OUTBEAM_MIN_TH +391 0x0000 //TX_POST_MASK_SUP_HSNE +392 0x0000 //TX_TAIL_DET_TH +393 0x0000 //TX_B_LESSCUT_RTO_WTA +394 0x0000 //TX_MEL_G_R +395 0x0800 //TX_SUPHIGH_TH +396 0x00C8 //TX_MASK_G_R 397 0x0002 //TX_EXTRA_NS_L -398 0x0800 //TX_EXTRA_NS_A -399 0x0005 //TX_VR_NOISE_FLOOR_TH +398 0x0800 //TX_C_POST_FLT_MASK +399 0x0005 //TX_A_POST_FLT_WNS 400 0x0148 //TX_MIN_G_LOW300HZ 401 0x0002 //TX_MAXLEVEL_CNG 402 0x00B4 //TX_STN_NOISE_TH @@ -9286,16 +13872,16 @@ 511 0x6666 //TX_MIC_TO_BFGAIN 512 0x0000 //TX_MICTOBFGAIN0 513 0x0000 //TX_FASTMUE_TH -514 0x0000 //TX_DERVB_LEN_0 -515 0x0000 //TX_DERVB_LEN_1 -516 0x0000 //TX_RHO_DERVB -517 0x0000 //TX_MIC_INDX_DERVB -518 0x0000 //TX_MU_DERVB -519 0x0000 //TX_DR_RESRV_0 -520 0x0000 //TX_DR_RESRV_1 -521 0x0000 //TX_DR_RESRV_2 -522 0x0000 //TX_DR_RESRV_3 -523 0x0000 //TX_DR_RESRV_4 +514 0x0000 //TX_DEREVERB_LF_MU +515 0x0000 //TX_DEREVERB_HF_MU +516 0x0000 //TX_DEREVERB_DELAY +517 0x0000 //TX_DEREVERB_COEF_LEN +518 0x0000 //TX_DEREVERB_DNR +519 0x0000 //TX_DEREVERB_ALPHA +520 0x0000 //TX_DEREVERB_BETA +521 0x0000 //TX_GSC_RTOL_TH +522 0x0000 //TX_GSC_RTOH_TH +523 0x0000 //TX_WIDE2_MEANHTH 524 0x0000 //TX_DR_RESRV_5 525 0x0000 //TX_DR_RESRV_6 526 0x0000 //TX_DR_RESRV_7 @@ -9669,8 +14255,73 @@ 894 0xC000 //TX_FASTNS_SSA_THHFL 895 0xCCCC //TX_FASTNS_SSA_THLFH 896 0xD999 //TX_FASTNS_SSA_THHFH +897 0x0000 //TX_SENDFUNC_REG_MICMUTE +898 0x0000 //TX_SENDFUNC_REG_MICMUTE1 +899 0x0000 //TX_MICMUTE_RATIO_THR +900 0x0000 //TX_MICMUTE_AMP_THR +901 0x0000 //TX_MICMUTE_HPF_IND +902 0x0000 //TX_MICMUTE_LOG_EYR_TH +903 0x0000 //TX_MICMUTE_CVG_TIME +904 0x0000 //TX_MICMUTE_RELEASE_TIME +905 0x0000 //TX_MIC_VOLUME_MIC0MUTE +906 0x0000 //TX_MICMUTE_EPD_OFFSET_0 +907 0x0000 //TX_MICMUTE_FRQ_AEC_L +908 0x0000 //TX_MICMUTE_EAD_THR +909 0x0000 //TX_MICMUTE_LAMBDA_CB_NLE +910 0x0000 //TX_MICMUTE_LAMBDA_RE_EST +911 0x0000 //TX_DTD_THR1_MICMUTE_0 +912 0x0000 //TX_DTD_THR1_MICMUTE_1 +913 0x0000 //TX_DTD_THR1_MICMUTE_2 +914 0x0000 //TX_DTD_THR1_MICMUTE_3 +915 0x0000 //TX_DTD_THR2_MICMUTE_0 +916 0x0000 //TX_MICMUTE_MIN_EQ_RE_EST_0 +917 0x0000 //TX_MICMUTE_MIN_EQ_RE_EST_1 +918 0x0000 //TX_MICMUTE_MIN_EQ_RE_EST_2 +919 0x0000 //TX_MICMUTE_MIN_EQ_RE_EST_3 +920 0x0000 //TX_MICMUTE_MIN_EQ_RE_EST_4 +921 0x0000 //TX_MICMUTE_C_POST_FLT +922 0x0000 //TX_MICMUTE_DT_CUT_K +923 0x0000 //TX_MICMUTE_DT_CUT_THR +924 0x0000 //TX_MICMUTE_DT_CUT_K2 +925 0x0000 //TX_MICMUTE_DT_CUT_THR2 +926 0x0000 //TX_MICMUTE_DT2_HOLD_N +927 0x0000 //TX_MICMUTE_RATIODTH_THCUT +928 0x0000 //TX_MICMUTE_B_POST_FLT_ECHOL +929 0x0000 //TX_MICMUTE_B_POST_FLT_ECHOH +930 0x0000 //TX_MICMUTE_C_POST_FLT_MASK +931 0x0000 //TX_MICMUTE_RATIODTL_CUT_TH +932 0x0000 //TX_MICMUTE_DT_CUT_K1 +933 0x0000 //TX_MICMUTE_N2_SN_EST +934 0x0000 //TX_MICMUTE_THR_SN_EST_0 +935 0x0000 //TX_MICMUTE_MIN_G_CTRL_0 +936 0x0000 //TX_MICMUTE_A_POST_FILT_S_0 +937 0x0000 //TX_MICMUTE_B_POST_FILT_0 +938 0x0000 //TX_MIC1RUB_AMP_THR +939 0x0000 //TX_MIC1MUTE_RATIO_THR +940 0x0000 //TX_MIC1MUTE_AMP_THR +941 0x0000 //TX_MIC1MUTE_CVG_TIME +942 0x0000 //TX_MIC1MUTE_RELEASE_TIME +943 0x0000 //TX_AMS_RESRV_01 +944 0x0000 //TX_AMS_RESRV_02 +945 0x0000 //TX_AMS_RESRV_03 +946 0x0000 //TX_AMS_RESRV_04 +947 0x0000 //TX_AMS_RESRV_05 +948 0x0000 //TX_AMS_RESRV_06 +949 0x0000 //TX_AMS_RESRV_07 +950 0x0000 //TX_AMS_RESRV_08 +951 0x0000 //TX_AMS_RESRV_09 +952 0x0000 //TX_AMS_RESRV_10 +953 0x0000 //TX_AMS_RESRV_11 +954 0x0000 //TX_AMS_RESRV_12 +955 0x0000 //TX_AMS_RESRV_13 +956 0x0000 //TX_AMS_RESRV_14 +957 0x0000 //TX_AMS_RESRV_15 +958 0x0000 //TX_AMS_RESRV_16 +959 0x0000 //TX_AMS_RESRV_17 +960 0x0000 //TX_AMS_RESRV_18 +961 0x0000 //TX_AMS_RESRV_19 #RX -0 0x006C //RX_RECVFUNC_MODE_0 +0 0x206C //RX_RECVFUNC_MODE_0 1 0x0000 //RX_RECVFUNC_MODE_1 2 0x0000 //RX_SAMPLINGFREQ_SIG 3 0x0000 //RX_SAMPLINGFREQ_PROC @@ -10520,10 +15171,862 @@ 110 0x0000 //RX_FDDRC_RESRV_0 129 0x0100 //RX_SPK_VOL 130 0x0000 //RX_VOL_RESRV_0 +#RX 2 +157 0x206C //RX_RECVFUNC_MODE_0 +158 0x0000 //RX_RECVFUNC_MODE_1 +159 0x0000 //RX_SAMPLINGFREQ_SIG +160 0x0000 //RX_SAMPLINGFREQ_PROC +161 0x000A //RX_FRAME_SZ +162 0x0000 //RX_DELAY_OPT +163 0x3000 //RX_TDDRC_ALPHA_UP_1 +164 0x3000 //RX_TDDRC_ALPHA_UP_2 +165 0x3000 //RX_TDDRC_ALPHA_UP_3 +166 0x3000 //RX_TDDRC_ALPHA_UP_4 +167 0x0800 //RX_PGA +168 0x7FFF //RX_A_HP +169 0x0000 //RX_B_PE +170 0x3800 //RX_THR_PITCH_DET_0 +171 0x3000 //RX_THR_PITCH_DET_1 +172 0x2800 //RX_THR_PITCH_DET_2 +173 0x0008 //RX_PITCH_BFR_LEN +174 0x0003 //RX_SBD_PITCH_DET +175 0x0100 //RX_PP_RESRV_0 +176 0x0020 //RX_PP_RESRV_1 +177 0x0600 //RX_N_SN_EST +178 0x000C //RX_N2_SN_EST +179 0x0010 //RX_NS_LVL_CTRL +180 0xF800 //RX_THR_SN_EST +181 0x7CCD //RX_LAMBDA_PFILT +182 0x000A //RX_FENS_RESRV_0 +183 0x0190 //RX_FENS_RESRV_1 +184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +187 0x0002 //RX_EXTRA_NS_L +188 0x0800 //RX_EXTRA_NS_A +189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +190 0x7FFF //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +192 0x199A //RX_A_POST_FLT +193 0x0000 //RX_LMT_THRD +194 0x4000 //RX_LMT_ALPHA +195 0x0014 //RX_FDEQ_SUBNUM +196 0x4848 //RX_FDEQ_GAIN_0 +197 0x4848 //RX_FDEQ_GAIN_1 +198 0x4848 //RX_FDEQ_GAIN_2 +199 0x4848 //RX_FDEQ_GAIN_3 +200 0x4848 //RX_FDEQ_GAIN_4 +201 0x4848 //RX_FDEQ_GAIN_5 +202 0x4444 //RX_FDEQ_GAIN_6 +203 0x4040 //RX_FDEQ_GAIN_7 +204 0x4040 //RX_FDEQ_GAIN_8 +205 0x4040 //RX_FDEQ_GAIN_9 +206 0x4848 //RX_FDEQ_GAIN_10 +207 0x4848 //RX_FDEQ_GAIN_11 +208 0x4848 //RX_FDEQ_GAIN_12 +209 0x4848 //RX_FDEQ_GAIN_13 +210 0x4848 //RX_FDEQ_GAIN_14 +211 0x4848 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0202 //RX_FDEQ_BIN_0 +221 0x0203 //RX_FDEQ_BIN_1 +222 0x0303 //RX_FDEQ_BIN_2 +223 0x0304 //RX_FDEQ_BIN_3 +224 0x0405 //RX_FDEQ_BIN_4 +225 0x0506 //RX_FDEQ_BIN_5 +226 0x0708 //RX_FDEQ_BIN_6 +227 0x090A //RX_FDEQ_BIN_7 +228 0x0B0C //RX_FDEQ_BIN_8 +229 0x0D0E //RX_FDEQ_BIN_9 +230 0x0000 //RX_FDEQ_BIN_10 +231 0x0000 //RX_FDEQ_BIN_11 +232 0x0000 //RX_FDEQ_BIN_12 +233 0x0000 //RX_FDEQ_BIN_13 +234 0x0000 //RX_FDEQ_BIN_14 +235 0x0000 //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x4000 //RX_FDEQ_RESRV_0 +245 0x0320 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0030 //RX_FDDRC_BAND_MARGIN_1 +248 0x0050 //RX_FDDRC_BAND_MARGIN_2 +249 0x0080 //RX_FDDRC_BAND_MARGIN_3 +250 0x0007 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x5000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x6400 //RX_FDDRC_THRD_3_2 +258 0x6400 //RX_FDDRC_THRD_3_3 +259 0x2000 //RX_FDDRC_SLANT_0_0 +260 0x2000 //RX_FDDRC_SLANT_0_1 +261 0x2000 //RX_FDDRC_SLANT_0_2 +262 0x2000 //RX_FDDRC_SLANT_0_3 +263 0x5333 //RX_FDDRC_SLANT_1_0 +264 0x5333 //RX_FDDRC_SLANT_1_1 +265 0x5333 //RX_FDDRC_SLANT_1_2 +266 0x5333 //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +268 0x0000 //RX_FILTINDX +269 0x0000 //RX_TDDRC_THRD_0 +270 0x0000 //RX_TDDRC_THRD_1 +271 0x7FFF //RX_TDDRC_THRD_2 +272 0x7FFF //RX_TDDRC_THRD_3 +273 0x7FFF //RX_TDDRC_SLANT_0 +274 0x7EB8 //RX_TDDRC_SLANT_1 +275 0x3000 //RX_TDDRC_ALPHA_UP_0 +276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x199A //RX_TDDRC_HMNC_GAIN +279 0x0001 //RX_TDDRC_SMT_FLAG +280 0x0CCD //RX_TDDRC_SMT_W +281 0x017F //RX_TDDRC_DRC_GAIN +282 0x7C00 //RX_LAMBDA_PKA_FP +283 0x2000 //RX_TPKA_FP +284 0x2000 //RX_MIN_G_FP +285 0x0080 //RX_MAX_G_FP +286 0x0100 //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 +288 0x0000 //RX_MAXLEVEL_CNG +289 0x3000 //RX_BWE_UV_TH +290 0x3000 //RX_BWE_UV_TH2 +291 0x1800 //RX_BWE_UV_TH3 +292 0x1000 //RX_BWE_V_TH +293 0x04CD //RX_BWE_GAIN1_V_TH1 +294 0x0F33 //RX_BWE_GAIN1_V_TH2 +295 0x7333 //RX_BWE_UV_EQ +296 0x199A //RX_BWE_V_EQ +297 0x7333 //RX_BWE_TONE_TH +298 0x0004 //RX_BWE_UV_HOLD_T +299 0x6CCD //RX_BWE_GAIN2_ALPHA +300 0x799A //RX_BWE_GAIN3_ALPHA +301 0x001E //RX_BWE_CUTOFF +302 0x3000 //RX_BWE_GAINFILL +303 0x3200 //RX_BWE_MAXTH_TONE +304 0x2000 //RX_BWE_EQ_0 +305 0x2000 //RX_BWE_EQ_1 +306 0x2000 //RX_BWE_EQ_2 +307 0x2000 //RX_BWE_EQ_3 +308 0x2000 //RX_BWE_EQ_4 +309 0x2000 //RX_BWE_EQ_5 +310 0x2000 //RX_BWE_EQ_6 +311 0x0000 //RX_BWE_RESRV_0 +312 0x0000 //RX_BWE_RESRV_1 +313 0x0000 //RX_BWE_RESRV_2 +#VOL 0 +163 0x3000 //RX_TDDRC_ALPHA_UP_1 +164 0x3000 //RX_TDDRC_ALPHA_UP_2 +165 0x3000 //RX_TDDRC_ALPHA_UP_3 +166 0x3000 //RX_TDDRC_ALPHA_UP_4 +184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +190 0x7FFF //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +269 0x0000 //RX_TDDRC_THRD_0 +270 0x0000 //RX_TDDRC_THRD_1 +271 0x7FFF //RX_TDDRC_THRD_2 +272 0x7FFF //RX_TDDRC_THRD_3 +273 0x7FFF //RX_TDDRC_SLANT_0 +274 0x7EB8 //RX_TDDRC_SLANT_1 +275 0x3000 //RX_TDDRC_ALPHA_UP_0 +276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x199A //RX_TDDRC_HMNC_GAIN +279 0x0001 //RX_TDDRC_SMT_FLAG +280 0x0CCD //RX_TDDRC_SMT_W +281 0x017F //RX_TDDRC_DRC_GAIN +195 0x0014 //RX_FDEQ_SUBNUM +196 0x4848 //RX_FDEQ_GAIN_0 +197 0x4848 //RX_FDEQ_GAIN_1 +198 0x4848 //RX_FDEQ_GAIN_2 +199 0x4848 //RX_FDEQ_GAIN_3 +200 0x4848 //RX_FDEQ_GAIN_4 +201 0x4848 //RX_FDEQ_GAIN_5 +202 0x4444 //RX_FDEQ_GAIN_6 +203 0x4040 //RX_FDEQ_GAIN_7 +204 0x4040 //RX_FDEQ_GAIN_8 +205 0x4040 //RX_FDEQ_GAIN_9 +206 0x4848 //RX_FDEQ_GAIN_10 +207 0x4848 //RX_FDEQ_GAIN_11 +208 0x4848 //RX_FDEQ_GAIN_12 +209 0x4848 //RX_FDEQ_GAIN_13 +210 0x4848 //RX_FDEQ_GAIN_14 +211 0x4848 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0202 //RX_FDEQ_BIN_0 +221 0x0203 //RX_FDEQ_BIN_1 +222 0x0303 //RX_FDEQ_BIN_2 +223 0x0304 //RX_FDEQ_BIN_3 +224 0x0405 //RX_FDEQ_BIN_4 +225 0x0506 //RX_FDEQ_BIN_5 +226 0x0708 //RX_FDEQ_BIN_6 +227 0x090A //RX_FDEQ_BIN_7 +228 0x0B0C //RX_FDEQ_BIN_8 +229 0x0D0E //RX_FDEQ_BIN_9 +230 0x0000 //RX_FDEQ_BIN_10 +231 0x0000 //RX_FDEQ_BIN_11 +232 0x0000 //RX_FDEQ_BIN_12 +233 0x0000 //RX_FDEQ_BIN_13 +234 0x0000 //RX_FDEQ_BIN_14 +235 0x0000 //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x4000 //RX_FDEQ_RESRV_0 +245 0x0320 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0030 //RX_FDDRC_BAND_MARGIN_1 +248 0x0050 //RX_FDDRC_BAND_MARGIN_2 +249 0x0080 //RX_FDDRC_BAND_MARGIN_3 +250 0x0007 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x5000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x6400 //RX_FDDRC_THRD_3_2 +258 0x6400 //RX_FDDRC_THRD_3_3 +259 0x2000 //RX_FDDRC_SLANT_0_0 +260 0x2000 //RX_FDDRC_SLANT_0_1 +261 0x2000 //RX_FDDRC_SLANT_0_2 +262 0x2000 //RX_FDDRC_SLANT_0_3 +263 0x5333 //RX_FDDRC_SLANT_1_0 +264 0x5333 //RX_FDDRC_SLANT_1_1 +265 0x5333 //RX_FDDRC_SLANT_1_2 +266 0x5333 //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +286 0x0100 //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 +#VOL 1 +163 0x3000 //RX_TDDRC_ALPHA_UP_1 +164 0x3000 //RX_TDDRC_ALPHA_UP_2 +165 0x3000 //RX_TDDRC_ALPHA_UP_3 +166 0x3000 //RX_TDDRC_ALPHA_UP_4 +184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +190 0x7FFF //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +269 0x0000 //RX_TDDRC_THRD_0 +270 0x0000 //RX_TDDRC_THRD_1 +271 0x7FFF //RX_TDDRC_THRD_2 +272 0x7FFF //RX_TDDRC_THRD_3 +273 0x7FFF //RX_TDDRC_SLANT_0 +274 0x7EB8 //RX_TDDRC_SLANT_1 +275 0x3000 //RX_TDDRC_ALPHA_UP_0 +276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x199A //RX_TDDRC_HMNC_GAIN +279 0x0001 //RX_TDDRC_SMT_FLAG +280 0x0CCD //RX_TDDRC_SMT_W +281 0x017F //RX_TDDRC_DRC_GAIN +195 0x0014 //RX_FDEQ_SUBNUM +196 0x4848 //RX_FDEQ_GAIN_0 +197 0x4848 //RX_FDEQ_GAIN_1 +198 0x4848 //RX_FDEQ_GAIN_2 +199 0x4848 //RX_FDEQ_GAIN_3 +200 0x4848 //RX_FDEQ_GAIN_4 +201 0x4848 //RX_FDEQ_GAIN_5 +202 0x4444 //RX_FDEQ_GAIN_6 +203 0x4040 //RX_FDEQ_GAIN_7 +204 0x4040 //RX_FDEQ_GAIN_8 +205 0x4040 //RX_FDEQ_GAIN_9 +206 0x4848 //RX_FDEQ_GAIN_10 +207 0x4848 //RX_FDEQ_GAIN_11 +208 0x4848 //RX_FDEQ_GAIN_12 +209 0x4848 //RX_FDEQ_GAIN_13 +210 0x4848 //RX_FDEQ_GAIN_14 +211 0x4848 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0202 //RX_FDEQ_BIN_0 +221 0x0203 //RX_FDEQ_BIN_1 +222 0x0303 //RX_FDEQ_BIN_2 +223 0x0304 //RX_FDEQ_BIN_3 +224 0x0405 //RX_FDEQ_BIN_4 +225 0x0506 //RX_FDEQ_BIN_5 +226 0x0708 //RX_FDEQ_BIN_6 +227 0x090A //RX_FDEQ_BIN_7 +228 0x0B0C //RX_FDEQ_BIN_8 +229 0x0D0E //RX_FDEQ_BIN_9 +230 0x0000 //RX_FDEQ_BIN_10 +231 0x0000 //RX_FDEQ_BIN_11 +232 0x0000 //RX_FDEQ_BIN_12 +233 0x0000 //RX_FDEQ_BIN_13 +234 0x0000 //RX_FDEQ_BIN_14 +235 0x0000 //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x4000 //RX_FDEQ_RESRV_0 +245 0x0320 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0030 //RX_FDDRC_BAND_MARGIN_1 +248 0x0050 //RX_FDDRC_BAND_MARGIN_2 +249 0x0080 //RX_FDDRC_BAND_MARGIN_3 +250 0x0007 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x5000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x6400 //RX_FDDRC_THRD_3_2 +258 0x6400 //RX_FDDRC_THRD_3_3 +259 0x2000 //RX_FDDRC_SLANT_0_0 +260 0x2000 //RX_FDDRC_SLANT_0_1 +261 0x2000 //RX_FDDRC_SLANT_0_2 +262 0x2000 //RX_FDDRC_SLANT_0_3 +263 0x5333 //RX_FDDRC_SLANT_1_0 +264 0x5333 //RX_FDDRC_SLANT_1_1 +265 0x5333 //RX_FDDRC_SLANT_1_2 +266 0x5333 //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +286 0x0100 //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 +#VOL 2 +163 0x3000 //RX_TDDRC_ALPHA_UP_1 +164 0x3000 //RX_TDDRC_ALPHA_UP_2 +165 0x3000 //RX_TDDRC_ALPHA_UP_3 +166 0x3000 //RX_TDDRC_ALPHA_UP_4 +184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +190 0x7FFF //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +269 0x0000 //RX_TDDRC_THRD_0 +270 0x0000 //RX_TDDRC_THRD_1 +271 0x7FFF //RX_TDDRC_THRD_2 +272 0x7FFF //RX_TDDRC_THRD_3 +273 0x7FFF //RX_TDDRC_SLANT_0 +274 0x7EB8 //RX_TDDRC_SLANT_1 +275 0x3000 //RX_TDDRC_ALPHA_UP_0 +276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x199A //RX_TDDRC_HMNC_GAIN +279 0x0001 //RX_TDDRC_SMT_FLAG +280 0x0CCD //RX_TDDRC_SMT_W +281 0x017F //RX_TDDRC_DRC_GAIN +195 0x0014 //RX_FDEQ_SUBNUM +196 0x4848 //RX_FDEQ_GAIN_0 +197 0x4848 //RX_FDEQ_GAIN_1 +198 0x4848 //RX_FDEQ_GAIN_2 +199 0x4848 //RX_FDEQ_GAIN_3 +200 0x4848 //RX_FDEQ_GAIN_4 +201 0x4848 //RX_FDEQ_GAIN_5 +202 0x4444 //RX_FDEQ_GAIN_6 +203 0x4040 //RX_FDEQ_GAIN_7 +204 0x4040 //RX_FDEQ_GAIN_8 +205 0x4040 //RX_FDEQ_GAIN_9 +206 0x4848 //RX_FDEQ_GAIN_10 +207 0x4848 //RX_FDEQ_GAIN_11 +208 0x4848 //RX_FDEQ_GAIN_12 +209 0x4848 //RX_FDEQ_GAIN_13 +210 0x4848 //RX_FDEQ_GAIN_14 +211 0x4848 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0202 //RX_FDEQ_BIN_0 +221 0x0203 //RX_FDEQ_BIN_1 +222 0x0303 //RX_FDEQ_BIN_2 +223 0x0304 //RX_FDEQ_BIN_3 +224 0x0405 //RX_FDEQ_BIN_4 +225 0x0506 //RX_FDEQ_BIN_5 +226 0x0708 //RX_FDEQ_BIN_6 +227 0x090A //RX_FDEQ_BIN_7 +228 0x0B0C //RX_FDEQ_BIN_8 +229 0x0D0E //RX_FDEQ_BIN_9 +230 0x0000 //RX_FDEQ_BIN_10 +231 0x0000 //RX_FDEQ_BIN_11 +232 0x0000 //RX_FDEQ_BIN_12 +233 0x0000 //RX_FDEQ_BIN_13 +234 0x0000 //RX_FDEQ_BIN_14 +235 0x0000 //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x4000 //RX_FDEQ_RESRV_0 +245 0x0320 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0030 //RX_FDDRC_BAND_MARGIN_1 +248 0x0050 //RX_FDDRC_BAND_MARGIN_2 +249 0x0080 //RX_FDDRC_BAND_MARGIN_3 +250 0x0007 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x5000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x6400 //RX_FDDRC_THRD_3_2 +258 0x6400 //RX_FDDRC_THRD_3_3 +259 0x2000 //RX_FDDRC_SLANT_0_0 +260 0x2000 //RX_FDDRC_SLANT_0_1 +261 0x2000 //RX_FDDRC_SLANT_0_2 +262 0x2000 //RX_FDDRC_SLANT_0_3 +263 0x5333 //RX_FDDRC_SLANT_1_0 +264 0x5333 //RX_FDDRC_SLANT_1_1 +265 0x5333 //RX_FDDRC_SLANT_1_2 +266 0x5333 //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +286 0x0100 //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 +#VOL 3 +163 0x3000 //RX_TDDRC_ALPHA_UP_1 +164 0x3000 //RX_TDDRC_ALPHA_UP_2 +165 0x3000 //RX_TDDRC_ALPHA_UP_3 +166 0x3000 //RX_TDDRC_ALPHA_UP_4 +184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +190 0x7FFF //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +269 0x0000 //RX_TDDRC_THRD_0 +270 0x0000 //RX_TDDRC_THRD_1 +271 0x7FFF //RX_TDDRC_THRD_2 +272 0x7FFF //RX_TDDRC_THRD_3 +273 0x7FFF //RX_TDDRC_SLANT_0 +274 0x7EB8 //RX_TDDRC_SLANT_1 +275 0x3000 //RX_TDDRC_ALPHA_UP_0 +276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x199A //RX_TDDRC_HMNC_GAIN +279 0x0001 //RX_TDDRC_SMT_FLAG +280 0x0CCD //RX_TDDRC_SMT_W +281 0x017F //RX_TDDRC_DRC_GAIN +195 0x0014 //RX_FDEQ_SUBNUM +196 0x4848 //RX_FDEQ_GAIN_0 +197 0x4848 //RX_FDEQ_GAIN_1 +198 0x4848 //RX_FDEQ_GAIN_2 +199 0x4848 //RX_FDEQ_GAIN_3 +200 0x4848 //RX_FDEQ_GAIN_4 +201 0x4848 //RX_FDEQ_GAIN_5 +202 0x4444 //RX_FDEQ_GAIN_6 +203 0x4040 //RX_FDEQ_GAIN_7 +204 0x4040 //RX_FDEQ_GAIN_8 +205 0x4040 //RX_FDEQ_GAIN_9 +206 0x4848 //RX_FDEQ_GAIN_10 +207 0x4848 //RX_FDEQ_GAIN_11 +208 0x4848 //RX_FDEQ_GAIN_12 +209 0x4848 //RX_FDEQ_GAIN_13 +210 0x4848 //RX_FDEQ_GAIN_14 +211 0x4848 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0202 //RX_FDEQ_BIN_0 +221 0x0203 //RX_FDEQ_BIN_1 +222 0x0303 //RX_FDEQ_BIN_2 +223 0x0304 //RX_FDEQ_BIN_3 +224 0x0405 //RX_FDEQ_BIN_4 +225 0x0506 //RX_FDEQ_BIN_5 +226 0x0708 //RX_FDEQ_BIN_6 +227 0x090A //RX_FDEQ_BIN_7 +228 0x0B0C //RX_FDEQ_BIN_8 +229 0x0D0E //RX_FDEQ_BIN_9 +230 0x0000 //RX_FDEQ_BIN_10 +231 0x0000 //RX_FDEQ_BIN_11 +232 0x0000 //RX_FDEQ_BIN_12 +233 0x0000 //RX_FDEQ_BIN_13 +234 0x0000 //RX_FDEQ_BIN_14 +235 0x0000 //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x4000 //RX_FDEQ_RESRV_0 +245 0x0320 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0030 //RX_FDDRC_BAND_MARGIN_1 +248 0x0050 //RX_FDDRC_BAND_MARGIN_2 +249 0x0080 //RX_FDDRC_BAND_MARGIN_3 +250 0x0007 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x5000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x6400 //RX_FDDRC_THRD_3_2 +258 0x6400 //RX_FDDRC_THRD_3_3 +259 0x2000 //RX_FDDRC_SLANT_0_0 +260 0x2000 //RX_FDDRC_SLANT_0_1 +261 0x2000 //RX_FDDRC_SLANT_0_2 +262 0x2000 //RX_FDDRC_SLANT_0_3 +263 0x5333 //RX_FDDRC_SLANT_1_0 +264 0x5333 //RX_FDDRC_SLANT_1_1 +265 0x5333 //RX_FDDRC_SLANT_1_2 +266 0x5333 //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +286 0x0100 //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 +#VOL 4 +163 0x3000 //RX_TDDRC_ALPHA_UP_1 +164 0x3000 //RX_TDDRC_ALPHA_UP_2 +165 0x3000 //RX_TDDRC_ALPHA_UP_3 +166 0x3000 //RX_TDDRC_ALPHA_UP_4 +184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +190 0x7FFF //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +269 0x0000 //RX_TDDRC_THRD_0 +270 0x0000 //RX_TDDRC_THRD_1 +271 0x7FFF //RX_TDDRC_THRD_2 +272 0x7FFF //RX_TDDRC_THRD_3 +273 0x7FFF //RX_TDDRC_SLANT_0 +274 0x7EB8 //RX_TDDRC_SLANT_1 +275 0x3000 //RX_TDDRC_ALPHA_UP_0 +276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x199A //RX_TDDRC_HMNC_GAIN +279 0x0001 //RX_TDDRC_SMT_FLAG +280 0x0CCD //RX_TDDRC_SMT_W +281 0x017F //RX_TDDRC_DRC_GAIN +195 0x0014 //RX_FDEQ_SUBNUM +196 0x4848 //RX_FDEQ_GAIN_0 +197 0x4848 //RX_FDEQ_GAIN_1 +198 0x4848 //RX_FDEQ_GAIN_2 +199 0x4848 //RX_FDEQ_GAIN_3 +200 0x4848 //RX_FDEQ_GAIN_4 +201 0x4848 //RX_FDEQ_GAIN_5 +202 0x4444 //RX_FDEQ_GAIN_6 +203 0x4040 //RX_FDEQ_GAIN_7 +204 0x4040 //RX_FDEQ_GAIN_8 +205 0x4040 //RX_FDEQ_GAIN_9 +206 0x4848 //RX_FDEQ_GAIN_10 +207 0x4848 //RX_FDEQ_GAIN_11 +208 0x4848 //RX_FDEQ_GAIN_12 +209 0x4848 //RX_FDEQ_GAIN_13 +210 0x4848 //RX_FDEQ_GAIN_14 +211 0x4848 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0202 //RX_FDEQ_BIN_0 +221 0x0203 //RX_FDEQ_BIN_1 +222 0x0303 //RX_FDEQ_BIN_2 +223 0x0304 //RX_FDEQ_BIN_3 +224 0x0405 //RX_FDEQ_BIN_4 +225 0x0506 //RX_FDEQ_BIN_5 +226 0x0708 //RX_FDEQ_BIN_6 +227 0x090A //RX_FDEQ_BIN_7 +228 0x0B0C //RX_FDEQ_BIN_8 +229 0x0D0E //RX_FDEQ_BIN_9 +230 0x0000 //RX_FDEQ_BIN_10 +231 0x0000 //RX_FDEQ_BIN_11 +232 0x0000 //RX_FDEQ_BIN_12 +233 0x0000 //RX_FDEQ_BIN_13 +234 0x0000 //RX_FDEQ_BIN_14 +235 0x0000 //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x4000 //RX_FDEQ_RESRV_0 +245 0x0320 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0030 //RX_FDDRC_BAND_MARGIN_1 +248 0x0050 //RX_FDDRC_BAND_MARGIN_2 +249 0x0080 //RX_FDDRC_BAND_MARGIN_3 +250 0x0007 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x5000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x6400 //RX_FDDRC_THRD_3_2 +258 0x6400 //RX_FDDRC_THRD_3_3 +259 0x2000 //RX_FDDRC_SLANT_0_0 +260 0x2000 //RX_FDDRC_SLANT_0_1 +261 0x2000 //RX_FDDRC_SLANT_0_2 +262 0x2000 //RX_FDDRC_SLANT_0_3 +263 0x5333 //RX_FDDRC_SLANT_1_0 +264 0x5333 //RX_FDDRC_SLANT_1_1 +265 0x5333 //RX_FDDRC_SLANT_1_2 +266 0x5333 //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +286 0x0100 //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 +#VOL 5 +163 0x3000 //RX_TDDRC_ALPHA_UP_1 +164 0x3000 //RX_TDDRC_ALPHA_UP_2 +165 0x3000 //RX_TDDRC_ALPHA_UP_3 +166 0x3000 //RX_TDDRC_ALPHA_UP_4 +184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +190 0x7FFF //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +269 0x0000 //RX_TDDRC_THRD_0 +270 0x0000 //RX_TDDRC_THRD_1 +271 0x7FFF //RX_TDDRC_THRD_2 +272 0x7FFF //RX_TDDRC_THRD_3 +273 0x7FFF //RX_TDDRC_SLANT_0 +274 0x7EB8 //RX_TDDRC_SLANT_1 +275 0x3000 //RX_TDDRC_ALPHA_UP_0 +276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x199A //RX_TDDRC_HMNC_GAIN +279 0x0001 //RX_TDDRC_SMT_FLAG +280 0x0CCD //RX_TDDRC_SMT_W +281 0x017F //RX_TDDRC_DRC_GAIN +195 0x0014 //RX_FDEQ_SUBNUM +196 0x4848 //RX_FDEQ_GAIN_0 +197 0x4848 //RX_FDEQ_GAIN_1 +198 0x4848 //RX_FDEQ_GAIN_2 +199 0x4848 //RX_FDEQ_GAIN_3 +200 0x4848 //RX_FDEQ_GAIN_4 +201 0x4848 //RX_FDEQ_GAIN_5 +202 0x4444 //RX_FDEQ_GAIN_6 +203 0x4040 //RX_FDEQ_GAIN_7 +204 0x4040 //RX_FDEQ_GAIN_8 +205 0x4040 //RX_FDEQ_GAIN_9 +206 0x4848 //RX_FDEQ_GAIN_10 +207 0x4848 //RX_FDEQ_GAIN_11 +208 0x4848 //RX_FDEQ_GAIN_12 +209 0x4848 //RX_FDEQ_GAIN_13 +210 0x4848 //RX_FDEQ_GAIN_14 +211 0x4848 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0202 //RX_FDEQ_BIN_0 +221 0x0203 //RX_FDEQ_BIN_1 +222 0x0303 //RX_FDEQ_BIN_2 +223 0x0304 //RX_FDEQ_BIN_3 +224 0x0405 //RX_FDEQ_BIN_4 +225 0x0506 //RX_FDEQ_BIN_5 +226 0x0708 //RX_FDEQ_BIN_6 +227 0x090A //RX_FDEQ_BIN_7 +228 0x0B0C //RX_FDEQ_BIN_8 +229 0x0D0E //RX_FDEQ_BIN_9 +230 0x0000 //RX_FDEQ_BIN_10 +231 0x0000 //RX_FDEQ_BIN_11 +232 0x0000 //RX_FDEQ_BIN_12 +233 0x0000 //RX_FDEQ_BIN_13 +234 0x0000 //RX_FDEQ_BIN_14 +235 0x0000 //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x4000 //RX_FDEQ_RESRV_0 +245 0x0320 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0030 //RX_FDDRC_BAND_MARGIN_1 +248 0x0050 //RX_FDDRC_BAND_MARGIN_2 +249 0x0080 //RX_FDDRC_BAND_MARGIN_3 +250 0x0007 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x5000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x6400 //RX_FDDRC_THRD_3_2 +258 0x6400 //RX_FDDRC_THRD_3_3 +259 0x2000 //RX_FDDRC_SLANT_0_0 +260 0x2000 //RX_FDDRC_SLANT_0_1 +261 0x2000 //RX_FDDRC_SLANT_0_2 +262 0x2000 //RX_FDDRC_SLANT_0_3 +263 0x5333 //RX_FDDRC_SLANT_1_0 +264 0x5333 //RX_FDDRC_SLANT_1_1 +265 0x5333 //RX_FDDRC_SLANT_1_2 +266 0x5333 //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +286 0x0100 //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 +#VOL 6 +163 0x3000 //RX_TDDRC_ALPHA_UP_1 +164 0x3000 //RX_TDDRC_ALPHA_UP_2 +165 0x3000 //RX_TDDRC_ALPHA_UP_3 +166 0x3000 //RX_TDDRC_ALPHA_UP_4 +184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +190 0x7FFF //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +269 0x0000 //RX_TDDRC_THRD_0 +270 0x0000 //RX_TDDRC_THRD_1 +271 0x7FFF //RX_TDDRC_THRD_2 +272 0x7FFF //RX_TDDRC_THRD_3 +273 0x7FFF //RX_TDDRC_SLANT_0 +274 0x7EB8 //RX_TDDRC_SLANT_1 +275 0x3000 //RX_TDDRC_ALPHA_UP_0 +276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x199A //RX_TDDRC_HMNC_GAIN +279 0x0001 //RX_TDDRC_SMT_FLAG +280 0x0CCD //RX_TDDRC_SMT_W +281 0x017F //RX_TDDRC_DRC_GAIN +195 0x0014 //RX_FDEQ_SUBNUM +196 0x4848 //RX_FDEQ_GAIN_0 +197 0x4848 //RX_FDEQ_GAIN_1 +198 0x4848 //RX_FDEQ_GAIN_2 +199 0x4848 //RX_FDEQ_GAIN_3 +200 0x4848 //RX_FDEQ_GAIN_4 +201 0x4848 //RX_FDEQ_GAIN_5 +202 0x4444 //RX_FDEQ_GAIN_6 +203 0x4040 //RX_FDEQ_GAIN_7 +204 0x4040 //RX_FDEQ_GAIN_8 +205 0x4040 //RX_FDEQ_GAIN_9 +206 0x4848 //RX_FDEQ_GAIN_10 +207 0x4848 //RX_FDEQ_GAIN_11 +208 0x4848 //RX_FDEQ_GAIN_12 +209 0x4848 //RX_FDEQ_GAIN_13 +210 0x4848 //RX_FDEQ_GAIN_14 +211 0x4848 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0202 //RX_FDEQ_BIN_0 +221 0x0203 //RX_FDEQ_BIN_1 +222 0x0303 //RX_FDEQ_BIN_2 +223 0x0304 //RX_FDEQ_BIN_3 +224 0x0405 //RX_FDEQ_BIN_4 +225 0x0506 //RX_FDEQ_BIN_5 +226 0x0708 //RX_FDEQ_BIN_6 +227 0x090A //RX_FDEQ_BIN_7 +228 0x0B0C //RX_FDEQ_BIN_8 +229 0x0D0E //RX_FDEQ_BIN_9 +230 0x0000 //RX_FDEQ_BIN_10 +231 0x0000 //RX_FDEQ_BIN_11 +232 0x0000 //RX_FDEQ_BIN_12 +233 0x0000 //RX_FDEQ_BIN_13 +234 0x0000 //RX_FDEQ_BIN_14 +235 0x0000 //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x4000 //RX_FDEQ_RESRV_0 +245 0x0320 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0030 //RX_FDDRC_BAND_MARGIN_1 +248 0x0050 //RX_FDDRC_BAND_MARGIN_2 +249 0x0080 //RX_FDDRC_BAND_MARGIN_3 +250 0x0007 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x5000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x6400 //RX_FDDRC_THRD_3_2 +258 0x6400 //RX_FDDRC_THRD_3_3 +259 0x2000 //RX_FDDRC_SLANT_0_0 +260 0x2000 //RX_FDDRC_SLANT_0_1 +261 0x2000 //RX_FDDRC_SLANT_0_2 +262 0x2000 //RX_FDDRC_SLANT_0_3 +263 0x5333 //RX_FDDRC_SLANT_1_0 +264 0x5333 //RX_FDDRC_SLANT_1_1 +265 0x5333 //RX_FDDRC_SLANT_1_2 +266 0x5333 //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +286 0x0100 //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 #CASE_NAME BLUETOOTH-BTNB-VOICE_GENERIC-WB -#PARAM_TYPE TX+RX -#TOTAL_CUSTOM_STEP 7 +#PARAM_MODE Full +#PARAM_TYPE TX+2RX +#TOTAL_CUSTOM_STEP 7+7 #TX 0 0x0008 //TX_OPERATION_MODE_0 1 0x0008 //TX_OPERATION_MODE_1 @@ -10776,20 +16279,20 @@ 248 0xF400 //TX_THR_SN_EST_6 249 0xF600 //TX_THR_SN_EST_7 250 0x0000 //TX_DELTA_THR_SN_EST_0 -251 0x0000 //TX_DELTA_THR_SN_EST_1 +251 0x0200 //TX_DELTA_THR_SN_EST_1 252 0x0200 //TX_DELTA_THR_SN_EST_2 253 0x0200 //TX_DELTA_THR_SN_EST_3 254 0x0200 //TX_DELTA_THR_SN_EST_4 255 0x0200 //TX_DELTA_THR_SN_EST_5 -256 0x0200 //TX_DELTA_THR_SN_EST_6 +256 0x0000 //TX_DELTA_THR_SN_EST_6 257 0x0200 //TX_DELTA_THR_SN_EST_7 258 0x6000 //TX_LAMBDA_NN_EST_0 -259 0x6000 //TX_LAMBDA_NN_EST_1 +259 0x4000 //TX_LAMBDA_NN_EST_1 260 0x4000 //TX_LAMBDA_NN_EST_2 261 0x4000 //TX_LAMBDA_NN_EST_3 262 0x4000 //TX_LAMBDA_NN_EST_4 263 0x4000 //TX_LAMBDA_NN_EST_5 -264 0x4000 //TX_LAMBDA_NN_EST_6 +264 0x6000 //TX_LAMBDA_NN_EST_6 265 0x4000 //TX_LAMBDA_NN_EST_7 266 0x0400 //TX_N_SN_EST 267 0x001E //TX_INBEAM_T @@ -10807,16 +16310,16 @@ 279 0x1000 //TX_B_POST_FLT_0 280 0x1000 //TX_B_POST_FLT_1 281 0x000F //TX_NS_LVL_CTRL_0 -282 0x000F //TX_NS_LVL_CTRL_1 -283 0x0011 //TX_NS_LVL_CTRL_2 +282 0x0011 //TX_NS_LVL_CTRL_1 +283 0x000F //TX_NS_LVL_CTRL_2 284 0x000F //TX_NS_LVL_CTRL_3 285 0x000F //TX_NS_LVL_CTRL_4 286 0x000F //TX_NS_LVL_CTRL_5 287 0x000F //TX_NS_LVL_CTRL_6 288 0x0011 //TX_NS_LVL_CTRL_7 289 0x000C //TX_MIN_GAIN_S_0 -290 0x000C //TX_MIN_GAIN_S_1 -291 0x000F //TX_MIN_GAIN_S_2 +290 0x000F //TX_MIN_GAIN_S_1 +291 0x000C //TX_MIN_GAIN_S_2 292 0x000C //TX_MIN_GAIN_S_3 293 0x000C //TX_MIN_GAIN_S_4 294 0x000C //TX_MIN_GAIN_S_5 @@ -10840,12 +16343,12 @@ 312 0x7FFF //TX_A_POST_FILT_0 313 0x2000 //TX_A_POST_FILT_1 314 0x4000 //TX_A_POST_FILT_S_0 -315 0x4000 //TX_A_POST_FILT_S_1 +315 0x5000 //TX_A_POST_FILT_S_1 316 0x5000 //TX_A_POST_FILT_S_2 317 0x5000 //TX_A_POST_FILT_S_3 318 0x5000 //TX_A_POST_FILT_S_4 319 0x5000 //TX_A_POST_FILT_S_5 -320 0x5000 //TX_A_POST_FILT_S_6 +320 0x4000 //TX_A_POST_FILT_S_6 321 0x5000 //TX_A_POST_FILT_S_7 322 0x1000 //TX_B_POST_FILT_0 323 0x1000 //TX_B_POST_FILT_1 @@ -10905,10 +16408,10 @@ 377 0x7FFF //TX_NOISE_TH_5_4 378 0x044C //TX_NOISE_TH_6 379 0x0014 //TX_MINENOISE_TH -380 0x4000 //TX_MINENOISE_MIC0_TH_MTS -381 0xFFEE //TX_MINENOISE_MIC0_TH_EXP -382 0x6000 //TX_MINENOISE_MIC0_S_TH_MTS -383 0xFFF3 //TX_MINENOISE_MIC0_S_TH_EXP +380 0x4000 //TX_MORENS_TFMASK_TH +381 0xFFEE //TX_DRC_QUIET_FLOOR +382 0x6000 //TX_RATIODTL_CUT_TH +383 0xFFF3 //TX_DT_CUT_K1 384 0x0666 //TX_OUT_ENER_S_TH_CLEAN 385 0x0666 //TX_OUT_ENER_S_TH_LESSCLEAN 386 0x0333 //TX_OUT_ENER_S_TH_NOISY @@ -10916,15 +16419,15 @@ 388 0x0333 //TX_OUT_ENER_TH_SPEECH 389 0x2000 //TX_SN_NPB_GAIN 390 0x0000 //TX_NN_NPB_GAIN -391 0x0000 //TX_CSX_ALPHA_0 -392 0x0000 //TX_CSX_ALPHA_1 -393 0x0000 //TX_CSX_ALPHA_2 -394 0x0000 //TX_CSX_ALPHA_3 -395 0x0800 //TX_MU_ARSP_EST -396 0x00C8 //TX_P_OUTBEAM_MIN_TH +391 0x0000 //TX_POST_MASK_SUP_HSNE +392 0x0000 //TX_TAIL_DET_TH +393 0x0000 //TX_B_LESSCUT_RTO_WTA +394 0x0000 //TX_MEL_G_R +395 0x0800 //TX_SUPHIGH_TH +396 0x00C8 //TX_MASK_G_R 397 0x0002 //TX_EXTRA_NS_L -398 0x0800 //TX_EXTRA_NS_A -399 0x0005 //TX_VR_NOISE_FLOOR_TH +398 0x0800 //TX_C_POST_FLT_MASK +399 0x0005 //TX_A_POST_FLT_WNS 400 0x0148 //TX_MIN_G_LOW300HZ 401 0x0002 //TX_MAXLEVEL_CNG 402 0x00B4 //TX_STN_NOISE_TH @@ -11039,16 +16542,16 @@ 511 0x6666 //TX_MIC_TO_BFGAIN 512 0x0000 //TX_MICTOBFGAIN0 513 0x0000 //TX_FASTMUE_TH -514 0x0000 //TX_DERVB_LEN_0 -515 0x0000 //TX_DERVB_LEN_1 -516 0x0000 //TX_RHO_DERVB -517 0x0000 //TX_MIC_INDX_DERVB -518 0x0000 //TX_MU_DERVB -519 0x0000 //TX_DR_RESRV_0 -520 0x0000 //TX_DR_RESRV_1 -521 0x0000 //TX_DR_RESRV_2 -522 0x0000 //TX_DR_RESRV_3 -523 0x0000 //TX_DR_RESRV_4 +514 0x0000 //TX_DEREVERB_LF_MU +515 0x0000 //TX_DEREVERB_HF_MU +516 0x0000 //TX_DEREVERB_DELAY +517 0x0000 //TX_DEREVERB_COEF_LEN +518 0x0000 //TX_DEREVERB_DNR +519 0x0000 //TX_DEREVERB_ALPHA +520 0x0000 //TX_DEREVERB_BETA +521 0x0000 //TX_GSC_RTOL_TH +522 0x0000 //TX_GSC_RTOH_TH +523 0x0000 //TX_WIDE2_MEANHTH 524 0x0000 //TX_DR_RESRV_5 525 0x0000 //TX_DR_RESRV_6 526 0x0000 //TX_DR_RESRV_7 @@ -11422,8 +16925,73 @@ 894 0xC000 //TX_FASTNS_SSA_THHFL 895 0xCCCC //TX_FASTNS_SSA_THLFH 896 0xD999 //TX_FASTNS_SSA_THHFH +897 0x0000 //TX_SENDFUNC_REG_MICMUTE +898 0x0000 //TX_SENDFUNC_REG_MICMUTE1 +899 0x0000 //TX_MICMUTE_RATIO_THR +900 0x0000 //TX_MICMUTE_AMP_THR +901 0x0000 //TX_MICMUTE_HPF_IND +902 0x0000 //TX_MICMUTE_LOG_EYR_TH +903 0x0000 //TX_MICMUTE_CVG_TIME +904 0x0000 //TX_MICMUTE_RELEASE_TIME +905 0x0000 //TX_MIC_VOLUME_MIC0MUTE +906 0x0000 //TX_MICMUTE_EPD_OFFSET_0 +907 0x0000 //TX_MICMUTE_FRQ_AEC_L +908 0x0000 //TX_MICMUTE_EAD_THR +909 0x0000 //TX_MICMUTE_LAMBDA_CB_NLE +910 0x0000 //TX_MICMUTE_LAMBDA_RE_EST +911 0x0000 //TX_DTD_THR1_MICMUTE_0 +912 0x0000 //TX_DTD_THR1_MICMUTE_1 +913 0x0000 //TX_DTD_THR1_MICMUTE_2 +914 0x0000 //TX_DTD_THR1_MICMUTE_3 +915 0x0000 //TX_DTD_THR2_MICMUTE_0 +916 0x0000 //TX_MICMUTE_MIN_EQ_RE_EST_0 +917 0x0000 //TX_MICMUTE_MIN_EQ_RE_EST_1 +918 0x0000 //TX_MICMUTE_MIN_EQ_RE_EST_2 +919 0x0000 //TX_MICMUTE_MIN_EQ_RE_EST_3 +920 0x0000 //TX_MICMUTE_MIN_EQ_RE_EST_4 +921 0x0000 //TX_MICMUTE_C_POST_FLT +922 0x0000 //TX_MICMUTE_DT_CUT_K +923 0x0000 //TX_MICMUTE_DT_CUT_THR +924 0x0000 //TX_MICMUTE_DT_CUT_K2 +925 0x0000 //TX_MICMUTE_DT_CUT_THR2 +926 0x0000 //TX_MICMUTE_DT2_HOLD_N +927 0x0000 //TX_MICMUTE_RATIODTH_THCUT +928 0x0000 //TX_MICMUTE_B_POST_FLT_ECHOL +929 0x0000 //TX_MICMUTE_B_POST_FLT_ECHOH +930 0x0000 //TX_MICMUTE_C_POST_FLT_MASK +931 0x0000 //TX_MICMUTE_RATIODTL_CUT_TH +932 0x0000 //TX_MICMUTE_DT_CUT_K1 +933 0x0000 //TX_MICMUTE_N2_SN_EST +934 0x0000 //TX_MICMUTE_THR_SN_EST_0 +935 0x0000 //TX_MICMUTE_MIN_G_CTRL_0 +936 0x0000 //TX_MICMUTE_A_POST_FILT_S_0 +937 0x0000 //TX_MICMUTE_B_POST_FILT_0 +938 0x0000 //TX_MIC1RUB_AMP_THR +939 0x0000 //TX_MIC1MUTE_RATIO_THR +940 0x0000 //TX_MIC1MUTE_AMP_THR +941 0x0000 //TX_MIC1MUTE_CVG_TIME +942 0x0000 //TX_MIC1MUTE_RELEASE_TIME +943 0x0000 //TX_AMS_RESRV_01 +944 0x0000 //TX_AMS_RESRV_02 +945 0x0000 //TX_AMS_RESRV_03 +946 0x0000 //TX_AMS_RESRV_04 +947 0x0000 //TX_AMS_RESRV_05 +948 0x0000 //TX_AMS_RESRV_06 +949 0x0000 //TX_AMS_RESRV_07 +950 0x0000 //TX_AMS_RESRV_08 +951 0x0000 //TX_AMS_RESRV_09 +952 0x0000 //TX_AMS_RESRV_10 +953 0x0000 //TX_AMS_RESRV_11 +954 0x0000 //TX_AMS_RESRV_12 +955 0x0000 //TX_AMS_RESRV_13 +956 0x0000 //TX_AMS_RESRV_14 +957 0x0000 //TX_AMS_RESRV_15 +958 0x0000 //TX_AMS_RESRV_16 +959 0x0000 //TX_AMS_RESRV_17 +960 0x0000 //TX_AMS_RESRV_18 +961 0x0000 //TX_AMS_RESRV_19 #RX -0 0x006C //RX_RECVFUNC_MODE_0 +0 0x206C //RX_RECVFUNC_MODE_0 1 0x0000 //RX_RECVFUNC_MODE_1 2 0x0001 //RX_SAMPLINGFREQ_SIG 3 0x0001 //RX_SAMPLINGFREQ_PROC @@ -12273,10 +17841,862 @@ 110 0x0000 //RX_FDDRC_RESRV_0 129 0x0100 //RX_SPK_VOL 130 0x0000 //RX_VOL_RESRV_0 +#RX 2 +157 0x206C //RX_RECVFUNC_MODE_0 +158 0x0000 //RX_RECVFUNC_MODE_1 +159 0x0001 //RX_SAMPLINGFREQ_SIG +160 0x0001 //RX_SAMPLINGFREQ_PROC +161 0x000A //RX_FRAME_SZ +162 0x0000 //RX_DELAY_OPT +163 0x1000 //RX_TDDRC_ALPHA_UP_1 +164 0x1000 //RX_TDDRC_ALPHA_UP_2 +165 0x1000 //RX_TDDRC_ALPHA_UP_3 +166 0x1000 //RX_TDDRC_ALPHA_UP_4 +167 0x0800 //RX_PGA +168 0x7FFF //RX_A_HP +169 0x4000 //RX_B_PE +170 0x3800 //RX_THR_PITCH_DET_0 +171 0x3000 //RX_THR_PITCH_DET_1 +172 0x2800 //RX_THR_PITCH_DET_2 +173 0x0008 //RX_PITCH_BFR_LEN +174 0x0003 //RX_SBD_PITCH_DET +175 0x0100 //RX_PP_RESRV_0 +176 0x0020 //RX_PP_RESRV_1 +177 0x0600 //RX_N_SN_EST +178 0x000C //RX_N2_SN_EST +179 0x0010 //RX_NS_LVL_CTRL +180 0xF800 //RX_THR_SN_EST +181 0x7CCD //RX_LAMBDA_PFILT +182 0x000A //RX_FENS_RESRV_0 +183 0x0190 //RX_FENS_RESRV_1 +184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +187 0x0002 //RX_EXTRA_NS_L +188 0x0800 //RX_EXTRA_NS_A +189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +190 0x7FFF //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +192 0x199A //RX_A_POST_FLT +193 0x0000 //RX_LMT_THRD +194 0x4000 //RX_LMT_ALPHA +195 0x001C //RX_FDEQ_SUBNUM +196 0x4848 //RX_FDEQ_GAIN_0 +197 0x4848 //RX_FDEQ_GAIN_1 +198 0x4848 //RX_FDEQ_GAIN_2 +199 0x4848 //RX_FDEQ_GAIN_3 +200 0x4848 //RX_FDEQ_GAIN_4 +201 0x4848 //RX_FDEQ_GAIN_5 +202 0x4848 //RX_FDEQ_GAIN_6 +203 0x4848 //RX_FDEQ_GAIN_7 +204 0x4848 //RX_FDEQ_GAIN_8 +205 0x3C3C //RX_FDEQ_GAIN_9 +206 0x3C3C //RX_FDEQ_GAIN_10 +207 0x3838 //RX_FDEQ_GAIN_11 +208 0x3838 //RX_FDEQ_GAIN_12 +209 0x3030 //RX_FDEQ_GAIN_13 +210 0x4848 //RX_FDEQ_GAIN_14 +211 0x4848 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0202 //RX_FDEQ_BIN_0 +221 0x0203 //RX_FDEQ_BIN_1 +222 0x0303 //RX_FDEQ_BIN_2 +223 0x0304 //RX_FDEQ_BIN_3 +224 0x0405 //RX_FDEQ_BIN_4 +225 0x0506 //RX_FDEQ_BIN_5 +226 0x0708 //RX_FDEQ_BIN_6 +227 0x090A //RX_FDEQ_BIN_7 +228 0x0B0C //RX_FDEQ_BIN_8 +229 0x0D0E //RX_FDEQ_BIN_9 +230 0x0E0F //RX_FDEQ_BIN_10 +231 0x0F10 //RX_FDEQ_BIN_11 +232 0x1011 //RX_FDEQ_BIN_12 +233 0x1112 //RX_FDEQ_BIN_13 +234 0x0000 //RX_FDEQ_BIN_14 +235 0x0000 //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x4000 //RX_FDEQ_RESRV_0 +245 0x0320 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0030 //RX_FDDRC_BAND_MARGIN_1 +248 0x0050 //RX_FDDRC_BAND_MARGIN_2 +249 0x0080 //RX_FDDRC_BAND_MARGIN_3 +250 0x0007 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x5000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x6400 //RX_FDDRC_THRD_3_2 +258 0x6400 //RX_FDDRC_THRD_3_3 +259 0x2000 //RX_FDDRC_SLANT_0_0 +260 0x2000 //RX_FDDRC_SLANT_0_1 +261 0x2000 //RX_FDDRC_SLANT_0_2 +262 0x2000 //RX_FDDRC_SLANT_0_3 +263 0x5333 //RX_FDDRC_SLANT_1_0 +264 0x5333 //RX_FDDRC_SLANT_1_1 +265 0x5333 //RX_FDDRC_SLANT_1_2 +266 0x5333 //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +268 0x0000 //RX_FILTINDX +269 0x0000 //RX_TDDRC_THRD_0 +270 0x0000 //RX_TDDRC_THRD_1 +271 0x7FFF //RX_TDDRC_THRD_2 +272 0x7FFF //RX_TDDRC_THRD_3 +273 0x7E70 //RX_TDDRC_SLANT_0 +274 0x7FFF //RX_TDDRC_SLANT_1 +275 0x1000 //RX_TDDRC_ALPHA_UP_0 +276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x199A //RX_TDDRC_HMNC_GAIN +279 0x0001 //RX_TDDRC_SMT_FLAG +280 0x0CCD //RX_TDDRC_SMT_W +281 0x0155 //RX_TDDRC_DRC_GAIN +282 0x7C00 //RX_LAMBDA_PKA_FP +283 0x2000 //RX_TPKA_FP +284 0x2000 //RX_MIN_G_FP +285 0x0080 //RX_MAX_G_FP +286 0x0100 //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 +288 0x0000 //RX_MAXLEVEL_CNG +289 0x3000 //RX_BWE_UV_TH +290 0x3000 //RX_BWE_UV_TH2 +291 0x1800 //RX_BWE_UV_TH3 +292 0x1000 //RX_BWE_V_TH +293 0x04CD //RX_BWE_GAIN1_V_TH1 +294 0x0F33 //RX_BWE_GAIN1_V_TH2 +295 0x7333 //RX_BWE_UV_EQ +296 0x199A //RX_BWE_V_EQ +297 0x7333 //RX_BWE_TONE_TH +298 0x0004 //RX_BWE_UV_HOLD_T +299 0x6CCD //RX_BWE_GAIN2_ALPHA +300 0x799A //RX_BWE_GAIN3_ALPHA +301 0x001E //RX_BWE_CUTOFF +302 0x3000 //RX_BWE_GAINFILL +303 0x3200 //RX_BWE_MAXTH_TONE +304 0x2000 //RX_BWE_EQ_0 +305 0x2000 //RX_BWE_EQ_1 +306 0x2000 //RX_BWE_EQ_2 +307 0x2000 //RX_BWE_EQ_3 +308 0x2000 //RX_BWE_EQ_4 +309 0x2000 //RX_BWE_EQ_5 +310 0x2000 //RX_BWE_EQ_6 +311 0x0000 //RX_BWE_RESRV_0 +312 0x0000 //RX_BWE_RESRV_1 +313 0x0000 //RX_BWE_RESRV_2 +#VOL 0 +163 0x1000 //RX_TDDRC_ALPHA_UP_1 +164 0x1000 //RX_TDDRC_ALPHA_UP_2 +165 0x1000 //RX_TDDRC_ALPHA_UP_3 +166 0x1000 //RX_TDDRC_ALPHA_UP_4 +184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +190 0x7FFF //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +269 0x0000 //RX_TDDRC_THRD_0 +270 0x0000 //RX_TDDRC_THRD_1 +271 0x7FFF //RX_TDDRC_THRD_2 +272 0x7FFF //RX_TDDRC_THRD_3 +273 0x7E70 //RX_TDDRC_SLANT_0 +274 0x7FFF //RX_TDDRC_SLANT_1 +275 0x1000 //RX_TDDRC_ALPHA_UP_0 +276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x199A //RX_TDDRC_HMNC_GAIN +279 0x0001 //RX_TDDRC_SMT_FLAG +280 0x0CCD //RX_TDDRC_SMT_W +281 0x0155 //RX_TDDRC_DRC_GAIN +195 0x001C //RX_FDEQ_SUBNUM +196 0x4848 //RX_FDEQ_GAIN_0 +197 0x4848 //RX_FDEQ_GAIN_1 +198 0x4848 //RX_FDEQ_GAIN_2 +199 0x4848 //RX_FDEQ_GAIN_3 +200 0x4848 //RX_FDEQ_GAIN_4 +201 0x4848 //RX_FDEQ_GAIN_5 +202 0x4848 //RX_FDEQ_GAIN_6 +203 0x4848 //RX_FDEQ_GAIN_7 +204 0x4848 //RX_FDEQ_GAIN_8 +205 0x3C3C //RX_FDEQ_GAIN_9 +206 0x3C3C //RX_FDEQ_GAIN_10 +207 0x3838 //RX_FDEQ_GAIN_11 +208 0x3838 //RX_FDEQ_GAIN_12 +209 0x3030 //RX_FDEQ_GAIN_13 +210 0x4848 //RX_FDEQ_GAIN_14 +211 0x4848 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0202 //RX_FDEQ_BIN_0 +221 0x0203 //RX_FDEQ_BIN_1 +222 0x0303 //RX_FDEQ_BIN_2 +223 0x0304 //RX_FDEQ_BIN_3 +224 0x0405 //RX_FDEQ_BIN_4 +225 0x0506 //RX_FDEQ_BIN_5 +226 0x0708 //RX_FDEQ_BIN_6 +227 0x090A //RX_FDEQ_BIN_7 +228 0x0B0C //RX_FDEQ_BIN_8 +229 0x0D0E //RX_FDEQ_BIN_9 +230 0x0E0F //RX_FDEQ_BIN_10 +231 0x0F10 //RX_FDEQ_BIN_11 +232 0x1011 //RX_FDEQ_BIN_12 +233 0x1112 //RX_FDEQ_BIN_13 +234 0x0000 //RX_FDEQ_BIN_14 +235 0x0000 //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x4000 //RX_FDEQ_RESRV_0 +245 0x0320 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0030 //RX_FDDRC_BAND_MARGIN_1 +248 0x0050 //RX_FDDRC_BAND_MARGIN_2 +249 0x0080 //RX_FDDRC_BAND_MARGIN_3 +250 0x0007 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x5000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x6400 //RX_FDDRC_THRD_3_2 +258 0x6400 //RX_FDDRC_THRD_3_3 +259 0x2000 //RX_FDDRC_SLANT_0_0 +260 0x2000 //RX_FDDRC_SLANT_0_1 +261 0x2000 //RX_FDDRC_SLANT_0_2 +262 0x2000 //RX_FDDRC_SLANT_0_3 +263 0x5333 //RX_FDDRC_SLANT_1_0 +264 0x5333 //RX_FDDRC_SLANT_1_1 +265 0x5333 //RX_FDDRC_SLANT_1_2 +266 0x5333 //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +286 0x0100 //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 +#VOL 1 +163 0x1000 //RX_TDDRC_ALPHA_UP_1 +164 0x1000 //RX_TDDRC_ALPHA_UP_2 +165 0x1000 //RX_TDDRC_ALPHA_UP_3 +166 0x1000 //RX_TDDRC_ALPHA_UP_4 +184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +190 0x7FFF //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +269 0x0000 //RX_TDDRC_THRD_0 +270 0x0000 //RX_TDDRC_THRD_1 +271 0x7FFF //RX_TDDRC_THRD_2 +272 0x7FFF //RX_TDDRC_THRD_3 +273 0x7E70 //RX_TDDRC_SLANT_0 +274 0x7FFF //RX_TDDRC_SLANT_1 +275 0x1000 //RX_TDDRC_ALPHA_UP_0 +276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x199A //RX_TDDRC_HMNC_GAIN +279 0x0001 //RX_TDDRC_SMT_FLAG +280 0x0CCD //RX_TDDRC_SMT_W +281 0x0155 //RX_TDDRC_DRC_GAIN +195 0x001C //RX_FDEQ_SUBNUM +196 0x4848 //RX_FDEQ_GAIN_0 +197 0x4848 //RX_FDEQ_GAIN_1 +198 0x4848 //RX_FDEQ_GAIN_2 +199 0x4848 //RX_FDEQ_GAIN_3 +200 0x4848 //RX_FDEQ_GAIN_4 +201 0x4848 //RX_FDEQ_GAIN_5 +202 0x4848 //RX_FDEQ_GAIN_6 +203 0x4848 //RX_FDEQ_GAIN_7 +204 0x4848 //RX_FDEQ_GAIN_8 +205 0x3C3C //RX_FDEQ_GAIN_9 +206 0x3C3C //RX_FDEQ_GAIN_10 +207 0x3838 //RX_FDEQ_GAIN_11 +208 0x3838 //RX_FDEQ_GAIN_12 +209 0x3030 //RX_FDEQ_GAIN_13 +210 0x4848 //RX_FDEQ_GAIN_14 +211 0x4848 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0202 //RX_FDEQ_BIN_0 +221 0x0203 //RX_FDEQ_BIN_1 +222 0x0303 //RX_FDEQ_BIN_2 +223 0x0304 //RX_FDEQ_BIN_3 +224 0x0405 //RX_FDEQ_BIN_4 +225 0x0506 //RX_FDEQ_BIN_5 +226 0x0708 //RX_FDEQ_BIN_6 +227 0x090A //RX_FDEQ_BIN_7 +228 0x0B0C //RX_FDEQ_BIN_8 +229 0x0D0E //RX_FDEQ_BIN_9 +230 0x0E0F //RX_FDEQ_BIN_10 +231 0x0F10 //RX_FDEQ_BIN_11 +232 0x1011 //RX_FDEQ_BIN_12 +233 0x1112 //RX_FDEQ_BIN_13 +234 0x0000 //RX_FDEQ_BIN_14 +235 0x0000 //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x4000 //RX_FDEQ_RESRV_0 +245 0x0320 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0030 //RX_FDDRC_BAND_MARGIN_1 +248 0x0050 //RX_FDDRC_BAND_MARGIN_2 +249 0x0080 //RX_FDDRC_BAND_MARGIN_3 +250 0x0007 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x5000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x6400 //RX_FDDRC_THRD_3_2 +258 0x6400 //RX_FDDRC_THRD_3_3 +259 0x2000 //RX_FDDRC_SLANT_0_0 +260 0x2000 //RX_FDDRC_SLANT_0_1 +261 0x2000 //RX_FDDRC_SLANT_0_2 +262 0x2000 //RX_FDDRC_SLANT_0_3 +263 0x5333 //RX_FDDRC_SLANT_1_0 +264 0x5333 //RX_FDDRC_SLANT_1_1 +265 0x5333 //RX_FDDRC_SLANT_1_2 +266 0x5333 //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +286 0x0100 //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 +#VOL 2 +163 0x1000 //RX_TDDRC_ALPHA_UP_1 +164 0x1000 //RX_TDDRC_ALPHA_UP_2 +165 0x1000 //RX_TDDRC_ALPHA_UP_3 +166 0x1000 //RX_TDDRC_ALPHA_UP_4 +184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +190 0x7FFF //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +269 0x0000 //RX_TDDRC_THRD_0 +270 0x0000 //RX_TDDRC_THRD_1 +271 0x7FFF //RX_TDDRC_THRD_2 +272 0x7FFF //RX_TDDRC_THRD_3 +273 0x7E70 //RX_TDDRC_SLANT_0 +274 0x7FFF //RX_TDDRC_SLANT_1 +275 0x1000 //RX_TDDRC_ALPHA_UP_0 +276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x199A //RX_TDDRC_HMNC_GAIN +279 0x0001 //RX_TDDRC_SMT_FLAG +280 0x0CCD //RX_TDDRC_SMT_W +281 0x0155 //RX_TDDRC_DRC_GAIN +195 0x001C //RX_FDEQ_SUBNUM +196 0x4848 //RX_FDEQ_GAIN_0 +197 0x4848 //RX_FDEQ_GAIN_1 +198 0x4848 //RX_FDEQ_GAIN_2 +199 0x4848 //RX_FDEQ_GAIN_3 +200 0x4848 //RX_FDEQ_GAIN_4 +201 0x4848 //RX_FDEQ_GAIN_5 +202 0x4848 //RX_FDEQ_GAIN_6 +203 0x4848 //RX_FDEQ_GAIN_7 +204 0x4848 //RX_FDEQ_GAIN_8 +205 0x3C3C //RX_FDEQ_GAIN_9 +206 0x3C3C //RX_FDEQ_GAIN_10 +207 0x3838 //RX_FDEQ_GAIN_11 +208 0x3838 //RX_FDEQ_GAIN_12 +209 0x3030 //RX_FDEQ_GAIN_13 +210 0x4848 //RX_FDEQ_GAIN_14 +211 0x4848 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0202 //RX_FDEQ_BIN_0 +221 0x0203 //RX_FDEQ_BIN_1 +222 0x0303 //RX_FDEQ_BIN_2 +223 0x0304 //RX_FDEQ_BIN_3 +224 0x0405 //RX_FDEQ_BIN_4 +225 0x0506 //RX_FDEQ_BIN_5 +226 0x0708 //RX_FDEQ_BIN_6 +227 0x090A //RX_FDEQ_BIN_7 +228 0x0B0C //RX_FDEQ_BIN_8 +229 0x0D0E //RX_FDEQ_BIN_9 +230 0x0E0F //RX_FDEQ_BIN_10 +231 0x0F10 //RX_FDEQ_BIN_11 +232 0x1011 //RX_FDEQ_BIN_12 +233 0x1112 //RX_FDEQ_BIN_13 +234 0x0000 //RX_FDEQ_BIN_14 +235 0x0000 //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x4000 //RX_FDEQ_RESRV_0 +245 0x0320 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0030 //RX_FDDRC_BAND_MARGIN_1 +248 0x0050 //RX_FDDRC_BAND_MARGIN_2 +249 0x0080 //RX_FDDRC_BAND_MARGIN_3 +250 0x0007 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x5000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x6400 //RX_FDDRC_THRD_3_2 +258 0x6400 //RX_FDDRC_THRD_3_3 +259 0x2000 //RX_FDDRC_SLANT_0_0 +260 0x2000 //RX_FDDRC_SLANT_0_1 +261 0x2000 //RX_FDDRC_SLANT_0_2 +262 0x2000 //RX_FDDRC_SLANT_0_3 +263 0x5333 //RX_FDDRC_SLANT_1_0 +264 0x5333 //RX_FDDRC_SLANT_1_1 +265 0x5333 //RX_FDDRC_SLANT_1_2 +266 0x5333 //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +286 0x0100 //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 +#VOL 3 +163 0x1000 //RX_TDDRC_ALPHA_UP_1 +164 0x1000 //RX_TDDRC_ALPHA_UP_2 +165 0x1000 //RX_TDDRC_ALPHA_UP_3 +166 0x1000 //RX_TDDRC_ALPHA_UP_4 +184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +190 0x7FFF //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +269 0x0000 //RX_TDDRC_THRD_0 +270 0x0000 //RX_TDDRC_THRD_1 +271 0x7FFF //RX_TDDRC_THRD_2 +272 0x7FFF //RX_TDDRC_THRD_3 +273 0x7E70 //RX_TDDRC_SLANT_0 +274 0x7FFF //RX_TDDRC_SLANT_1 +275 0x1000 //RX_TDDRC_ALPHA_UP_0 +276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x199A //RX_TDDRC_HMNC_GAIN +279 0x0001 //RX_TDDRC_SMT_FLAG +280 0x0CCD //RX_TDDRC_SMT_W +281 0x0155 //RX_TDDRC_DRC_GAIN +195 0x001C //RX_FDEQ_SUBNUM +196 0x4848 //RX_FDEQ_GAIN_0 +197 0x4848 //RX_FDEQ_GAIN_1 +198 0x4848 //RX_FDEQ_GAIN_2 +199 0x4848 //RX_FDEQ_GAIN_3 +200 0x4848 //RX_FDEQ_GAIN_4 +201 0x4848 //RX_FDEQ_GAIN_5 +202 0x4848 //RX_FDEQ_GAIN_6 +203 0x4848 //RX_FDEQ_GAIN_7 +204 0x4848 //RX_FDEQ_GAIN_8 +205 0x3C3C //RX_FDEQ_GAIN_9 +206 0x3C3C //RX_FDEQ_GAIN_10 +207 0x3838 //RX_FDEQ_GAIN_11 +208 0x3838 //RX_FDEQ_GAIN_12 +209 0x3030 //RX_FDEQ_GAIN_13 +210 0x4848 //RX_FDEQ_GAIN_14 +211 0x4848 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0202 //RX_FDEQ_BIN_0 +221 0x0203 //RX_FDEQ_BIN_1 +222 0x0303 //RX_FDEQ_BIN_2 +223 0x0304 //RX_FDEQ_BIN_3 +224 0x0405 //RX_FDEQ_BIN_4 +225 0x0506 //RX_FDEQ_BIN_5 +226 0x0708 //RX_FDEQ_BIN_6 +227 0x090A //RX_FDEQ_BIN_7 +228 0x0B0C //RX_FDEQ_BIN_8 +229 0x0D0E //RX_FDEQ_BIN_9 +230 0x0E0F //RX_FDEQ_BIN_10 +231 0x0F10 //RX_FDEQ_BIN_11 +232 0x1011 //RX_FDEQ_BIN_12 +233 0x1112 //RX_FDEQ_BIN_13 +234 0x0000 //RX_FDEQ_BIN_14 +235 0x0000 //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x4000 //RX_FDEQ_RESRV_0 +245 0x0320 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0030 //RX_FDDRC_BAND_MARGIN_1 +248 0x0050 //RX_FDDRC_BAND_MARGIN_2 +249 0x0080 //RX_FDDRC_BAND_MARGIN_3 +250 0x0007 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x5000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x6400 //RX_FDDRC_THRD_3_2 +258 0x6400 //RX_FDDRC_THRD_3_3 +259 0x2000 //RX_FDDRC_SLANT_0_0 +260 0x2000 //RX_FDDRC_SLANT_0_1 +261 0x2000 //RX_FDDRC_SLANT_0_2 +262 0x2000 //RX_FDDRC_SLANT_0_3 +263 0x5333 //RX_FDDRC_SLANT_1_0 +264 0x5333 //RX_FDDRC_SLANT_1_1 +265 0x5333 //RX_FDDRC_SLANT_1_2 +266 0x5333 //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +286 0x0100 //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 +#VOL 4 +163 0x1000 //RX_TDDRC_ALPHA_UP_1 +164 0x1000 //RX_TDDRC_ALPHA_UP_2 +165 0x1000 //RX_TDDRC_ALPHA_UP_3 +166 0x1000 //RX_TDDRC_ALPHA_UP_4 +184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +190 0x7FFF //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +269 0x0000 //RX_TDDRC_THRD_0 +270 0x0000 //RX_TDDRC_THRD_1 +271 0x7FFF //RX_TDDRC_THRD_2 +272 0x7FFF //RX_TDDRC_THRD_3 +273 0x7E70 //RX_TDDRC_SLANT_0 +274 0x7FFF //RX_TDDRC_SLANT_1 +275 0x1000 //RX_TDDRC_ALPHA_UP_0 +276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x199A //RX_TDDRC_HMNC_GAIN +279 0x0001 //RX_TDDRC_SMT_FLAG +280 0x0CCD //RX_TDDRC_SMT_W +281 0x0155 //RX_TDDRC_DRC_GAIN +195 0x001C //RX_FDEQ_SUBNUM +196 0x4848 //RX_FDEQ_GAIN_0 +197 0x4848 //RX_FDEQ_GAIN_1 +198 0x4848 //RX_FDEQ_GAIN_2 +199 0x4848 //RX_FDEQ_GAIN_3 +200 0x4848 //RX_FDEQ_GAIN_4 +201 0x4848 //RX_FDEQ_GAIN_5 +202 0x4848 //RX_FDEQ_GAIN_6 +203 0x4848 //RX_FDEQ_GAIN_7 +204 0x4848 //RX_FDEQ_GAIN_8 +205 0x3C3C //RX_FDEQ_GAIN_9 +206 0x3C3C //RX_FDEQ_GAIN_10 +207 0x3838 //RX_FDEQ_GAIN_11 +208 0x3838 //RX_FDEQ_GAIN_12 +209 0x3030 //RX_FDEQ_GAIN_13 +210 0x4848 //RX_FDEQ_GAIN_14 +211 0x4848 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0202 //RX_FDEQ_BIN_0 +221 0x0203 //RX_FDEQ_BIN_1 +222 0x0303 //RX_FDEQ_BIN_2 +223 0x0304 //RX_FDEQ_BIN_3 +224 0x0405 //RX_FDEQ_BIN_4 +225 0x0506 //RX_FDEQ_BIN_5 +226 0x0708 //RX_FDEQ_BIN_6 +227 0x090A //RX_FDEQ_BIN_7 +228 0x0B0C //RX_FDEQ_BIN_8 +229 0x0D0E //RX_FDEQ_BIN_9 +230 0x0E0F //RX_FDEQ_BIN_10 +231 0x0F10 //RX_FDEQ_BIN_11 +232 0x1011 //RX_FDEQ_BIN_12 +233 0x1112 //RX_FDEQ_BIN_13 +234 0x0000 //RX_FDEQ_BIN_14 +235 0x0000 //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x4000 //RX_FDEQ_RESRV_0 +245 0x0320 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0030 //RX_FDDRC_BAND_MARGIN_1 +248 0x0050 //RX_FDDRC_BAND_MARGIN_2 +249 0x0080 //RX_FDDRC_BAND_MARGIN_3 +250 0x0007 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x5000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x6400 //RX_FDDRC_THRD_3_2 +258 0x6400 //RX_FDDRC_THRD_3_3 +259 0x2000 //RX_FDDRC_SLANT_0_0 +260 0x2000 //RX_FDDRC_SLANT_0_1 +261 0x2000 //RX_FDDRC_SLANT_0_2 +262 0x2000 //RX_FDDRC_SLANT_0_3 +263 0x5333 //RX_FDDRC_SLANT_1_0 +264 0x5333 //RX_FDDRC_SLANT_1_1 +265 0x5333 //RX_FDDRC_SLANT_1_2 +266 0x5333 //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +286 0x0100 //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 +#VOL 5 +163 0x1000 //RX_TDDRC_ALPHA_UP_1 +164 0x1000 //RX_TDDRC_ALPHA_UP_2 +165 0x1000 //RX_TDDRC_ALPHA_UP_3 +166 0x1000 //RX_TDDRC_ALPHA_UP_4 +184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +190 0x7FFF //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +269 0x0000 //RX_TDDRC_THRD_0 +270 0x0000 //RX_TDDRC_THRD_1 +271 0x7FFF //RX_TDDRC_THRD_2 +272 0x7FFF //RX_TDDRC_THRD_3 +273 0x7E70 //RX_TDDRC_SLANT_0 +274 0x7FFF //RX_TDDRC_SLANT_1 +275 0x1000 //RX_TDDRC_ALPHA_UP_0 +276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x199A //RX_TDDRC_HMNC_GAIN +279 0x0001 //RX_TDDRC_SMT_FLAG +280 0x0CCD //RX_TDDRC_SMT_W +281 0x0155 //RX_TDDRC_DRC_GAIN +195 0x001C //RX_FDEQ_SUBNUM +196 0x4848 //RX_FDEQ_GAIN_0 +197 0x4848 //RX_FDEQ_GAIN_1 +198 0x4848 //RX_FDEQ_GAIN_2 +199 0x4848 //RX_FDEQ_GAIN_3 +200 0x4848 //RX_FDEQ_GAIN_4 +201 0x4848 //RX_FDEQ_GAIN_5 +202 0x4848 //RX_FDEQ_GAIN_6 +203 0x4848 //RX_FDEQ_GAIN_7 +204 0x4848 //RX_FDEQ_GAIN_8 +205 0x3C3C //RX_FDEQ_GAIN_9 +206 0x3C3C //RX_FDEQ_GAIN_10 +207 0x3838 //RX_FDEQ_GAIN_11 +208 0x3838 //RX_FDEQ_GAIN_12 +209 0x3030 //RX_FDEQ_GAIN_13 +210 0x4848 //RX_FDEQ_GAIN_14 +211 0x4848 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0202 //RX_FDEQ_BIN_0 +221 0x0203 //RX_FDEQ_BIN_1 +222 0x0303 //RX_FDEQ_BIN_2 +223 0x0304 //RX_FDEQ_BIN_3 +224 0x0405 //RX_FDEQ_BIN_4 +225 0x0506 //RX_FDEQ_BIN_5 +226 0x0708 //RX_FDEQ_BIN_6 +227 0x090A //RX_FDEQ_BIN_7 +228 0x0B0C //RX_FDEQ_BIN_8 +229 0x0D0E //RX_FDEQ_BIN_9 +230 0x0E0F //RX_FDEQ_BIN_10 +231 0x0F10 //RX_FDEQ_BIN_11 +232 0x1011 //RX_FDEQ_BIN_12 +233 0x1112 //RX_FDEQ_BIN_13 +234 0x0000 //RX_FDEQ_BIN_14 +235 0x0000 //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x4000 //RX_FDEQ_RESRV_0 +245 0x0320 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0030 //RX_FDDRC_BAND_MARGIN_1 +248 0x0050 //RX_FDDRC_BAND_MARGIN_2 +249 0x0080 //RX_FDDRC_BAND_MARGIN_3 +250 0x0007 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x5000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x6400 //RX_FDDRC_THRD_3_2 +258 0x6400 //RX_FDDRC_THRD_3_3 +259 0x2000 //RX_FDDRC_SLANT_0_0 +260 0x2000 //RX_FDDRC_SLANT_0_1 +261 0x2000 //RX_FDDRC_SLANT_0_2 +262 0x2000 //RX_FDDRC_SLANT_0_3 +263 0x5333 //RX_FDDRC_SLANT_1_0 +264 0x5333 //RX_FDDRC_SLANT_1_1 +265 0x5333 //RX_FDDRC_SLANT_1_2 +266 0x5333 //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +286 0x0100 //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 +#VOL 6 +163 0x1000 //RX_TDDRC_ALPHA_UP_1 +164 0x1000 //RX_TDDRC_ALPHA_UP_2 +165 0x1000 //RX_TDDRC_ALPHA_UP_3 +166 0x1000 //RX_TDDRC_ALPHA_UP_4 +184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +190 0x7FFF //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +269 0x0000 //RX_TDDRC_THRD_0 +270 0x0000 //RX_TDDRC_THRD_1 +271 0x7FFF //RX_TDDRC_THRD_2 +272 0x7FFF //RX_TDDRC_THRD_3 +273 0x7E70 //RX_TDDRC_SLANT_0 +274 0x7FFF //RX_TDDRC_SLANT_1 +275 0x1000 //RX_TDDRC_ALPHA_UP_0 +276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x199A //RX_TDDRC_HMNC_GAIN +279 0x0001 //RX_TDDRC_SMT_FLAG +280 0x0CCD //RX_TDDRC_SMT_W +281 0x0155 //RX_TDDRC_DRC_GAIN +195 0x001C //RX_FDEQ_SUBNUM +196 0x4848 //RX_FDEQ_GAIN_0 +197 0x4848 //RX_FDEQ_GAIN_1 +198 0x4848 //RX_FDEQ_GAIN_2 +199 0x4848 //RX_FDEQ_GAIN_3 +200 0x4848 //RX_FDEQ_GAIN_4 +201 0x4848 //RX_FDEQ_GAIN_5 +202 0x4848 //RX_FDEQ_GAIN_6 +203 0x4848 //RX_FDEQ_GAIN_7 +204 0x4848 //RX_FDEQ_GAIN_8 +205 0x3C3C //RX_FDEQ_GAIN_9 +206 0x3C3C //RX_FDEQ_GAIN_10 +207 0x3838 //RX_FDEQ_GAIN_11 +208 0x3838 //RX_FDEQ_GAIN_12 +209 0x3030 //RX_FDEQ_GAIN_13 +210 0x4848 //RX_FDEQ_GAIN_14 +211 0x4848 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0202 //RX_FDEQ_BIN_0 +221 0x0203 //RX_FDEQ_BIN_1 +222 0x0303 //RX_FDEQ_BIN_2 +223 0x0304 //RX_FDEQ_BIN_3 +224 0x0405 //RX_FDEQ_BIN_4 +225 0x0506 //RX_FDEQ_BIN_5 +226 0x0708 //RX_FDEQ_BIN_6 +227 0x090A //RX_FDEQ_BIN_7 +228 0x0B0C //RX_FDEQ_BIN_8 +229 0x0D0E //RX_FDEQ_BIN_9 +230 0x0E0F //RX_FDEQ_BIN_10 +231 0x0F10 //RX_FDEQ_BIN_11 +232 0x1011 //RX_FDEQ_BIN_12 +233 0x1112 //RX_FDEQ_BIN_13 +234 0x0000 //RX_FDEQ_BIN_14 +235 0x0000 //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x4000 //RX_FDEQ_RESRV_0 +245 0x0320 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0030 //RX_FDDRC_BAND_MARGIN_1 +248 0x0050 //RX_FDDRC_BAND_MARGIN_2 +249 0x0080 //RX_FDDRC_BAND_MARGIN_3 +250 0x0007 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x5000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x6400 //RX_FDDRC_THRD_3_2 +258 0x6400 //RX_FDDRC_THRD_3_3 +259 0x2000 //RX_FDDRC_SLANT_0_0 +260 0x2000 //RX_FDDRC_SLANT_0_1 +261 0x2000 //RX_FDDRC_SLANT_0_2 +262 0x2000 //RX_FDDRC_SLANT_0_3 +263 0x5333 //RX_FDDRC_SLANT_1_0 +264 0x5333 //RX_FDDRC_SLANT_1_1 +265 0x5333 //RX_FDDRC_SLANT_1_2 +266 0x5333 //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +286 0x0100 //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 #CASE_NAME BLUETOOTH-BTNB-VOICE_GENERIC-SWB -#PARAM_TYPE TX+RX -#TOTAL_CUSTOM_STEP 7 +#PARAM_MODE Full +#PARAM_TYPE TX+2RX +#TOTAL_CUSTOM_STEP 7+7 #TX 0 0x0001 //TX_OPERATION_MODE_0 1 0x0001 //TX_OPERATION_MODE_1 @@ -12529,20 +18949,20 @@ 248 0xF400 //TX_THR_SN_EST_6 249 0xF600 //TX_THR_SN_EST_7 250 0x0000 //TX_DELTA_THR_SN_EST_0 -251 0x0000 //TX_DELTA_THR_SN_EST_1 +251 0x0200 //TX_DELTA_THR_SN_EST_1 252 0x0200 //TX_DELTA_THR_SN_EST_2 253 0x0200 //TX_DELTA_THR_SN_EST_3 254 0x0200 //TX_DELTA_THR_SN_EST_4 255 0x0200 //TX_DELTA_THR_SN_EST_5 -256 0x0200 //TX_DELTA_THR_SN_EST_6 +256 0x0000 //TX_DELTA_THR_SN_EST_6 257 0x0200 //TX_DELTA_THR_SN_EST_7 258 0x6000 //TX_LAMBDA_NN_EST_0 -259 0x6000 //TX_LAMBDA_NN_EST_1 +259 0x4000 //TX_LAMBDA_NN_EST_1 260 0x4000 //TX_LAMBDA_NN_EST_2 261 0x4000 //TX_LAMBDA_NN_EST_3 262 0x4000 //TX_LAMBDA_NN_EST_4 263 0x4000 //TX_LAMBDA_NN_EST_5 -264 0x4000 //TX_LAMBDA_NN_EST_6 +264 0x6000 //TX_LAMBDA_NN_EST_6 265 0x4000 //TX_LAMBDA_NN_EST_7 266 0x0400 //TX_N_SN_EST 267 0x001E //TX_INBEAM_T @@ -12560,16 +18980,16 @@ 279 0x1000 //TX_B_POST_FLT_0 280 0x1000 //TX_B_POST_FLT_1 281 0x000B //TX_NS_LVL_CTRL_0 -282 0x000F //TX_NS_LVL_CTRL_1 -283 0x0011 //TX_NS_LVL_CTRL_2 +282 0x0011 //TX_NS_LVL_CTRL_1 +283 0x000F //TX_NS_LVL_CTRL_2 284 0x000F //TX_NS_LVL_CTRL_3 285 0x000F //TX_NS_LVL_CTRL_4 286 0x000F //TX_NS_LVL_CTRL_5 287 0x000F //TX_NS_LVL_CTRL_6 288 0x0011 //TX_NS_LVL_CTRL_7 289 0x000C //TX_MIN_GAIN_S_0 -290 0x000C //TX_MIN_GAIN_S_1 -291 0x000F //TX_MIN_GAIN_S_2 +290 0x000F //TX_MIN_GAIN_S_1 +291 0x000C //TX_MIN_GAIN_S_2 292 0x000C //TX_MIN_GAIN_S_3 293 0x000C //TX_MIN_GAIN_S_4 294 0x000C //TX_MIN_GAIN_S_5 @@ -12593,12 +19013,12 @@ 312 0x7FFF //TX_A_POST_FILT_0 313 0x2000 //TX_A_POST_FILT_1 314 0x2000 //TX_A_POST_FILT_S_0 -315 0x4000 //TX_A_POST_FILT_S_1 +315 0x5000 //TX_A_POST_FILT_S_1 316 0x5000 //TX_A_POST_FILT_S_2 317 0x5000 //TX_A_POST_FILT_S_3 318 0x5000 //TX_A_POST_FILT_S_4 319 0x5000 //TX_A_POST_FILT_S_5 -320 0x5000 //TX_A_POST_FILT_S_6 +320 0x4000 //TX_A_POST_FILT_S_6 321 0x5000 //TX_A_POST_FILT_S_7 322 0x1000 //TX_B_POST_FILT_0 323 0x1000 //TX_B_POST_FILT_1 @@ -12658,10 +19078,10 @@ 377 0x7FFF //TX_NOISE_TH_5_4 378 0x044C //TX_NOISE_TH_6 379 0x0014 //TX_MINENOISE_TH -380 0x4000 //TX_MINENOISE_MIC0_TH_MTS -381 0xFFEE //TX_MINENOISE_MIC0_TH_EXP -382 0x6000 //TX_MINENOISE_MIC0_S_TH_MTS -383 0xFFF3 //TX_MINENOISE_MIC0_S_TH_EXP +380 0x4000 //TX_MORENS_TFMASK_TH +381 0xFFEE //TX_DRC_QUIET_FLOOR +382 0x6000 //TX_RATIODTL_CUT_TH +383 0xFFF3 //TX_DT_CUT_K1 384 0x0666 //TX_OUT_ENER_S_TH_CLEAN 385 0x0666 //TX_OUT_ENER_S_TH_LESSCLEAN 386 0x0333 //TX_OUT_ENER_S_TH_NOISY @@ -12669,15 +19089,15 @@ 388 0x0333 //TX_OUT_ENER_TH_SPEECH 389 0x2000 //TX_SN_NPB_GAIN 390 0x0000 //TX_NN_NPB_GAIN -391 0x0000 //TX_CSX_ALPHA_0 -392 0x0000 //TX_CSX_ALPHA_1 -393 0x0000 //TX_CSX_ALPHA_2 -394 0x0000 //TX_CSX_ALPHA_3 -395 0x0800 //TX_MU_ARSP_EST -396 0x00C8 //TX_P_OUTBEAM_MIN_TH +391 0x0000 //TX_POST_MASK_SUP_HSNE +392 0x0000 //TX_TAIL_DET_TH +393 0x0000 //TX_B_LESSCUT_RTO_WTA +394 0x0000 //TX_MEL_G_R +395 0x0800 //TX_SUPHIGH_TH +396 0x00C8 //TX_MASK_G_R 397 0x0002 //TX_EXTRA_NS_L -398 0x0800 //TX_EXTRA_NS_A -399 0x0005 //TX_VR_NOISE_FLOOR_TH +398 0x0800 //TX_C_POST_FLT_MASK +399 0x0005 //TX_A_POST_FLT_WNS 400 0x0148 //TX_MIN_G_LOW300HZ 401 0x0002 //TX_MAXLEVEL_CNG 402 0x00B4 //TX_STN_NOISE_TH @@ -12792,16 +19212,16 @@ 511 0x6666 //TX_MIC_TO_BFGAIN 512 0x0000 //TX_MICTOBFGAIN0 513 0x0000 //TX_FASTMUE_TH -514 0x0000 //TX_DERVB_LEN_0 -515 0x0000 //TX_DERVB_LEN_1 -516 0x0000 //TX_RHO_DERVB -517 0x0000 //TX_MIC_INDX_DERVB -518 0x0000 //TX_MU_DERVB -519 0x0000 //TX_DR_RESRV_0 -520 0x0000 //TX_DR_RESRV_1 -521 0x0000 //TX_DR_RESRV_2 -522 0x0000 //TX_DR_RESRV_3 -523 0x0000 //TX_DR_RESRV_4 +514 0x0000 //TX_DEREVERB_LF_MU +515 0x0000 //TX_DEREVERB_HF_MU +516 0x0000 //TX_DEREVERB_DELAY +517 0x0000 //TX_DEREVERB_COEF_LEN +518 0x0000 //TX_DEREVERB_DNR +519 0x0000 //TX_DEREVERB_ALPHA +520 0x0000 //TX_DEREVERB_BETA +521 0x0000 //TX_GSC_RTOL_TH +522 0x0000 //TX_GSC_RTOH_TH +523 0x0000 //TX_WIDE2_MEANHTH 524 0x0000 //TX_DR_RESRV_5 525 0x0000 //TX_DR_RESRV_6 526 0x0000 //TX_DR_RESRV_7 @@ -13175,8 +19595,73 @@ 894 0xC000 //TX_FASTNS_SSA_THHFL 895 0xCCCC //TX_FASTNS_SSA_THLFH 896 0xD999 //TX_FASTNS_SSA_THHFH +897 0x0000 //TX_SENDFUNC_REG_MICMUTE +898 0x0000 //TX_SENDFUNC_REG_MICMUTE1 +899 0x0000 //TX_MICMUTE_RATIO_THR +900 0x0000 //TX_MICMUTE_AMP_THR +901 0x0000 //TX_MICMUTE_HPF_IND +902 0x0000 //TX_MICMUTE_LOG_EYR_TH +903 0x0000 //TX_MICMUTE_CVG_TIME +904 0x0000 //TX_MICMUTE_RELEASE_TIME +905 0x0000 //TX_MIC_VOLUME_MIC0MUTE +906 0x0000 //TX_MICMUTE_EPD_OFFSET_0 +907 0x0000 //TX_MICMUTE_FRQ_AEC_L +908 0x0000 //TX_MICMUTE_EAD_THR +909 0x0000 //TX_MICMUTE_LAMBDA_CB_NLE +910 0x0000 //TX_MICMUTE_LAMBDA_RE_EST +911 0x0000 //TX_DTD_THR1_MICMUTE_0 +912 0x0000 //TX_DTD_THR1_MICMUTE_1 +913 0x0000 //TX_DTD_THR1_MICMUTE_2 +914 0x0000 //TX_DTD_THR1_MICMUTE_3 +915 0x0000 //TX_DTD_THR2_MICMUTE_0 +916 0x0000 //TX_MICMUTE_MIN_EQ_RE_EST_0 +917 0x0000 //TX_MICMUTE_MIN_EQ_RE_EST_1 +918 0x0000 //TX_MICMUTE_MIN_EQ_RE_EST_2 +919 0x0000 //TX_MICMUTE_MIN_EQ_RE_EST_3 +920 0x0000 //TX_MICMUTE_MIN_EQ_RE_EST_4 +921 0x0000 //TX_MICMUTE_C_POST_FLT +922 0x0000 //TX_MICMUTE_DT_CUT_K +923 0x0000 //TX_MICMUTE_DT_CUT_THR +924 0x0000 //TX_MICMUTE_DT_CUT_K2 +925 0x0000 //TX_MICMUTE_DT_CUT_THR2 +926 0x0000 //TX_MICMUTE_DT2_HOLD_N +927 0x0000 //TX_MICMUTE_RATIODTH_THCUT +928 0x0000 //TX_MICMUTE_B_POST_FLT_ECHOL +929 0x0000 //TX_MICMUTE_B_POST_FLT_ECHOH +930 0x0000 //TX_MICMUTE_C_POST_FLT_MASK +931 0x0000 //TX_MICMUTE_RATIODTL_CUT_TH +932 0x0000 //TX_MICMUTE_DT_CUT_K1 +933 0x0000 //TX_MICMUTE_N2_SN_EST +934 0x0000 //TX_MICMUTE_THR_SN_EST_0 +935 0x0000 //TX_MICMUTE_MIN_G_CTRL_0 +936 0x0000 //TX_MICMUTE_A_POST_FILT_S_0 +937 0x0000 //TX_MICMUTE_B_POST_FILT_0 +938 0x0000 //TX_MIC1RUB_AMP_THR +939 0x0000 //TX_MIC1MUTE_RATIO_THR +940 0x0000 //TX_MIC1MUTE_AMP_THR +941 0x0000 //TX_MIC1MUTE_CVG_TIME +942 0x0000 //TX_MIC1MUTE_RELEASE_TIME +943 0x0000 //TX_AMS_RESRV_01 +944 0x0000 //TX_AMS_RESRV_02 +945 0x0000 //TX_AMS_RESRV_03 +946 0x0000 //TX_AMS_RESRV_04 +947 0x0000 //TX_AMS_RESRV_05 +948 0x0000 //TX_AMS_RESRV_06 +949 0x0000 //TX_AMS_RESRV_07 +950 0x0000 //TX_AMS_RESRV_08 +951 0x0000 //TX_AMS_RESRV_09 +952 0x0000 //TX_AMS_RESRV_10 +953 0x0000 //TX_AMS_RESRV_11 +954 0x0000 //TX_AMS_RESRV_12 +955 0x0000 //TX_AMS_RESRV_13 +956 0x0000 //TX_AMS_RESRV_14 +957 0x0000 //TX_AMS_RESRV_15 +958 0x0000 //TX_AMS_RESRV_16 +959 0x0000 //TX_AMS_RESRV_17 +960 0x0000 //TX_AMS_RESRV_18 +961 0x0000 //TX_AMS_RESRV_19 #RX -0 0x0064 //RX_RECVFUNC_MODE_0 +0 0x2064 //RX_RECVFUNC_MODE_0 1 0x0000 //RX_RECVFUNC_MODE_1 2 0x0003 //RX_SAMPLINGFREQ_SIG 3 0x0003 //RX_SAMPLINGFREQ_PROC @@ -14026,10 +20511,862 @@ 110 0x0000 //RX_FDDRC_RESRV_0 129 0x0100 //RX_SPK_VOL 130 0x0000 //RX_VOL_RESRV_0 +#RX 2 +157 0x2064 //RX_RECVFUNC_MODE_0 +158 0x0000 //RX_RECVFUNC_MODE_1 +159 0x0003 //RX_SAMPLINGFREQ_SIG +160 0x0003 //RX_SAMPLINGFREQ_PROC +161 0x000A //RX_FRAME_SZ +162 0x0000 //RX_DELAY_OPT +163 0x3000 //RX_TDDRC_ALPHA_UP_1 +164 0x3000 //RX_TDDRC_ALPHA_UP_2 +165 0x3000 //RX_TDDRC_ALPHA_UP_3 +166 0x3000 //RX_TDDRC_ALPHA_UP_4 +167 0x0800 //RX_PGA +168 0x7FFF //RX_A_HP +169 0x0000 //RX_B_PE +170 0x1800 //RX_THR_PITCH_DET_0 +171 0x1000 //RX_THR_PITCH_DET_1 +172 0x0800 //RX_THR_PITCH_DET_2 +173 0x0008 //RX_PITCH_BFR_LEN +174 0x0003 //RX_SBD_PITCH_DET +175 0x0100 //RX_PP_RESRV_0 +176 0x0020 //RX_PP_RESRV_1 +177 0x0400 //RX_N_SN_EST +178 0x000C //RX_N2_SN_EST +179 0x0003 //RX_NS_LVL_CTRL +180 0x9000 //RX_THR_SN_EST +181 0x7CCD //RX_LAMBDA_PFILT +182 0x000A //RX_FENS_RESRV_0 +183 0x0190 //RX_FENS_RESRV_1 +184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +187 0x0002 //RX_EXTRA_NS_L +188 0x0800 //RX_EXTRA_NS_A +189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +190 0x7FFF //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +192 0x199A //RX_A_POST_FLT +193 0x0000 //RX_LMT_THRD +194 0x4000 //RX_LMT_ALPHA +195 0x0020 //RX_FDEQ_SUBNUM +196 0x4848 //RX_FDEQ_GAIN_0 +197 0x4848 //RX_FDEQ_GAIN_1 +198 0x4848 //RX_FDEQ_GAIN_2 +199 0x4848 //RX_FDEQ_GAIN_3 +200 0x4848 //RX_FDEQ_GAIN_4 +201 0x4848 //RX_FDEQ_GAIN_5 +202 0x4848 //RX_FDEQ_GAIN_6 +203 0x4848 //RX_FDEQ_GAIN_7 +204 0x4848 //RX_FDEQ_GAIN_8 +205 0x4848 //RX_FDEQ_GAIN_9 +206 0x4848 //RX_FDEQ_GAIN_10 +207 0x4848 //RX_FDEQ_GAIN_11 +208 0x4848 //RX_FDEQ_GAIN_12 +209 0x4848 //RX_FDEQ_GAIN_13 +210 0x4848 //RX_FDEQ_GAIN_14 +211 0x4848 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0202 //RX_FDEQ_BIN_0 +221 0x0203 //RX_FDEQ_BIN_1 +222 0x0303 //RX_FDEQ_BIN_2 +223 0x0304 //RX_FDEQ_BIN_3 +224 0x0405 //RX_FDEQ_BIN_4 +225 0x0506 //RX_FDEQ_BIN_5 +226 0x0708 //RX_FDEQ_BIN_6 +227 0x090A //RX_FDEQ_BIN_7 +228 0x0B0C //RX_FDEQ_BIN_8 +229 0x0D0E //RX_FDEQ_BIN_9 +230 0x1013 //RX_FDEQ_BIN_10 +231 0x1719 //RX_FDEQ_BIN_11 +232 0x1B1E //RX_FDEQ_BIN_12 +233 0x1E1E //RX_FDEQ_BIN_13 +234 0x1E28 //RX_FDEQ_BIN_14 +235 0x282C //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x4000 //RX_FDEQ_RESRV_0 +245 0x0320 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0030 //RX_FDDRC_BAND_MARGIN_1 +248 0x0050 //RX_FDDRC_BAND_MARGIN_2 +249 0x0080 //RX_FDDRC_BAND_MARGIN_3 +250 0x0007 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x5000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x6400 //RX_FDDRC_THRD_3_2 +258 0x6400 //RX_FDDRC_THRD_3_3 +259 0x2000 //RX_FDDRC_SLANT_0_0 +260 0x2000 //RX_FDDRC_SLANT_0_1 +261 0x2000 //RX_FDDRC_SLANT_0_2 +262 0x2000 //RX_FDDRC_SLANT_0_3 +263 0x5333 //RX_FDDRC_SLANT_1_0 +264 0x5333 //RX_FDDRC_SLANT_1_1 +265 0x5333 //RX_FDDRC_SLANT_1_2 +266 0x5333 //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +268 0x0000 //RX_FILTINDX +269 0x0000 //RX_TDDRC_THRD_0 +270 0x0000 //RX_TDDRC_THRD_1 +271 0x7FFF //RX_TDDRC_THRD_2 +272 0x7FFF //RX_TDDRC_THRD_3 +273 0x7FFF //RX_TDDRC_SLANT_0 +274 0x7FFF //RX_TDDRC_SLANT_1 +275 0x3000 //RX_TDDRC_ALPHA_UP_0 +276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x199A //RX_TDDRC_HMNC_GAIN +279 0x0001 //RX_TDDRC_SMT_FLAG +280 0x0CCD //RX_TDDRC_SMT_W +281 0x0155 //RX_TDDRC_DRC_GAIN +282 0x7C00 //RX_LAMBDA_PKA_FP +283 0x2000 //RX_TPKA_FP +284 0x2000 //RX_MIN_G_FP +285 0x0080 //RX_MAX_G_FP +286 0x0100 //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 +288 0x0000 //RX_MAXLEVEL_CNG +289 0x3000 //RX_BWE_UV_TH +290 0x3000 //RX_BWE_UV_TH2 +291 0x1800 //RX_BWE_UV_TH3 +292 0x1000 //RX_BWE_V_TH +293 0x04CD //RX_BWE_GAIN1_V_TH1 +294 0x0F33 //RX_BWE_GAIN1_V_TH2 +295 0x7333 //RX_BWE_UV_EQ +296 0x199A //RX_BWE_V_EQ +297 0x7333 //RX_BWE_TONE_TH +298 0x0004 //RX_BWE_UV_HOLD_T +299 0x6CCD //RX_BWE_GAIN2_ALPHA +300 0x799A //RX_BWE_GAIN3_ALPHA +301 0x001E //RX_BWE_CUTOFF +302 0x3000 //RX_BWE_GAINFILL +303 0x3200 //RX_BWE_MAXTH_TONE +304 0x2000 //RX_BWE_EQ_0 +305 0x2000 //RX_BWE_EQ_1 +306 0x2000 //RX_BWE_EQ_2 +307 0x2000 //RX_BWE_EQ_3 +308 0x2000 //RX_BWE_EQ_4 +309 0x2000 //RX_BWE_EQ_5 +310 0x2000 //RX_BWE_EQ_6 +311 0x0000 //RX_BWE_RESRV_0 +312 0x0000 //RX_BWE_RESRV_1 +313 0x0000 //RX_BWE_RESRV_2 +#VOL 0 +163 0x3000 //RX_TDDRC_ALPHA_UP_1 +164 0x3000 //RX_TDDRC_ALPHA_UP_2 +165 0x3000 //RX_TDDRC_ALPHA_UP_3 +166 0x3000 //RX_TDDRC_ALPHA_UP_4 +184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +190 0x7FFF //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +269 0x0000 //RX_TDDRC_THRD_0 +270 0x0000 //RX_TDDRC_THRD_1 +271 0x7FFF //RX_TDDRC_THRD_2 +272 0x7FFF //RX_TDDRC_THRD_3 +273 0x7FFF //RX_TDDRC_SLANT_0 +274 0x7FFF //RX_TDDRC_SLANT_1 +275 0x3000 //RX_TDDRC_ALPHA_UP_0 +276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x199A //RX_TDDRC_HMNC_GAIN +279 0x0001 //RX_TDDRC_SMT_FLAG +280 0x0CCD //RX_TDDRC_SMT_W +281 0x0155 //RX_TDDRC_DRC_GAIN +195 0x0020 //RX_FDEQ_SUBNUM +196 0x4848 //RX_FDEQ_GAIN_0 +197 0x4848 //RX_FDEQ_GAIN_1 +198 0x4848 //RX_FDEQ_GAIN_2 +199 0x4848 //RX_FDEQ_GAIN_3 +200 0x4848 //RX_FDEQ_GAIN_4 +201 0x4848 //RX_FDEQ_GAIN_5 +202 0x4848 //RX_FDEQ_GAIN_6 +203 0x4848 //RX_FDEQ_GAIN_7 +204 0x4848 //RX_FDEQ_GAIN_8 +205 0x4848 //RX_FDEQ_GAIN_9 +206 0x4848 //RX_FDEQ_GAIN_10 +207 0x4848 //RX_FDEQ_GAIN_11 +208 0x4848 //RX_FDEQ_GAIN_12 +209 0x4848 //RX_FDEQ_GAIN_13 +210 0x4848 //RX_FDEQ_GAIN_14 +211 0x4848 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0202 //RX_FDEQ_BIN_0 +221 0x0203 //RX_FDEQ_BIN_1 +222 0x0303 //RX_FDEQ_BIN_2 +223 0x0304 //RX_FDEQ_BIN_3 +224 0x0405 //RX_FDEQ_BIN_4 +225 0x0506 //RX_FDEQ_BIN_5 +226 0x0708 //RX_FDEQ_BIN_6 +227 0x090A //RX_FDEQ_BIN_7 +228 0x0B0C //RX_FDEQ_BIN_8 +229 0x0D0E //RX_FDEQ_BIN_9 +230 0x1013 //RX_FDEQ_BIN_10 +231 0x1719 //RX_FDEQ_BIN_11 +232 0x1B1E //RX_FDEQ_BIN_12 +233 0x1E1E //RX_FDEQ_BIN_13 +234 0x1E28 //RX_FDEQ_BIN_14 +235 0x282C //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x4000 //RX_FDEQ_RESRV_0 +245 0x0320 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0030 //RX_FDDRC_BAND_MARGIN_1 +248 0x0050 //RX_FDDRC_BAND_MARGIN_2 +249 0x0080 //RX_FDDRC_BAND_MARGIN_3 +250 0x0007 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x5000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x6400 //RX_FDDRC_THRD_3_2 +258 0x6400 //RX_FDDRC_THRD_3_3 +259 0x2000 //RX_FDDRC_SLANT_0_0 +260 0x2000 //RX_FDDRC_SLANT_0_1 +261 0x2000 //RX_FDDRC_SLANT_0_2 +262 0x2000 //RX_FDDRC_SLANT_0_3 +263 0x5333 //RX_FDDRC_SLANT_1_0 +264 0x5333 //RX_FDDRC_SLANT_1_1 +265 0x5333 //RX_FDDRC_SLANT_1_2 +266 0x5333 //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +286 0x0100 //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 +#VOL 1 +163 0x3000 //RX_TDDRC_ALPHA_UP_1 +164 0x3000 //RX_TDDRC_ALPHA_UP_2 +165 0x3000 //RX_TDDRC_ALPHA_UP_3 +166 0x3000 //RX_TDDRC_ALPHA_UP_4 +184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +190 0x7FFF //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +269 0x0000 //RX_TDDRC_THRD_0 +270 0x0000 //RX_TDDRC_THRD_1 +271 0x7FFF //RX_TDDRC_THRD_2 +272 0x7FFF //RX_TDDRC_THRD_3 +273 0x7FFF //RX_TDDRC_SLANT_0 +274 0x7FFF //RX_TDDRC_SLANT_1 +275 0x3000 //RX_TDDRC_ALPHA_UP_0 +276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x199A //RX_TDDRC_HMNC_GAIN +279 0x0001 //RX_TDDRC_SMT_FLAG +280 0x0CCD //RX_TDDRC_SMT_W +281 0x0155 //RX_TDDRC_DRC_GAIN +195 0x0020 //RX_FDEQ_SUBNUM +196 0x4848 //RX_FDEQ_GAIN_0 +197 0x4848 //RX_FDEQ_GAIN_1 +198 0x4848 //RX_FDEQ_GAIN_2 +199 0x4848 //RX_FDEQ_GAIN_3 +200 0x4848 //RX_FDEQ_GAIN_4 +201 0x4848 //RX_FDEQ_GAIN_5 +202 0x4848 //RX_FDEQ_GAIN_6 +203 0x4848 //RX_FDEQ_GAIN_7 +204 0x4848 //RX_FDEQ_GAIN_8 +205 0x4848 //RX_FDEQ_GAIN_9 +206 0x4848 //RX_FDEQ_GAIN_10 +207 0x4848 //RX_FDEQ_GAIN_11 +208 0x4848 //RX_FDEQ_GAIN_12 +209 0x4848 //RX_FDEQ_GAIN_13 +210 0x4848 //RX_FDEQ_GAIN_14 +211 0x4848 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0202 //RX_FDEQ_BIN_0 +221 0x0203 //RX_FDEQ_BIN_1 +222 0x0303 //RX_FDEQ_BIN_2 +223 0x0304 //RX_FDEQ_BIN_3 +224 0x0405 //RX_FDEQ_BIN_4 +225 0x0506 //RX_FDEQ_BIN_5 +226 0x0708 //RX_FDEQ_BIN_6 +227 0x090A //RX_FDEQ_BIN_7 +228 0x0B0C //RX_FDEQ_BIN_8 +229 0x0D0E //RX_FDEQ_BIN_9 +230 0x1013 //RX_FDEQ_BIN_10 +231 0x1719 //RX_FDEQ_BIN_11 +232 0x1B1E //RX_FDEQ_BIN_12 +233 0x1E1E //RX_FDEQ_BIN_13 +234 0x1E28 //RX_FDEQ_BIN_14 +235 0x282C //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x4000 //RX_FDEQ_RESRV_0 +245 0x0320 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0030 //RX_FDDRC_BAND_MARGIN_1 +248 0x0050 //RX_FDDRC_BAND_MARGIN_2 +249 0x0080 //RX_FDDRC_BAND_MARGIN_3 +250 0x0007 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x5000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x6400 //RX_FDDRC_THRD_3_2 +258 0x6400 //RX_FDDRC_THRD_3_3 +259 0x2000 //RX_FDDRC_SLANT_0_0 +260 0x2000 //RX_FDDRC_SLANT_0_1 +261 0x2000 //RX_FDDRC_SLANT_0_2 +262 0x2000 //RX_FDDRC_SLANT_0_3 +263 0x5333 //RX_FDDRC_SLANT_1_0 +264 0x5333 //RX_FDDRC_SLANT_1_1 +265 0x5333 //RX_FDDRC_SLANT_1_2 +266 0x5333 //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +286 0x0100 //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 +#VOL 2 +163 0x3000 //RX_TDDRC_ALPHA_UP_1 +164 0x3000 //RX_TDDRC_ALPHA_UP_2 +165 0x3000 //RX_TDDRC_ALPHA_UP_3 +166 0x3000 //RX_TDDRC_ALPHA_UP_4 +184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +190 0x7FFF //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +269 0x0000 //RX_TDDRC_THRD_0 +270 0x0000 //RX_TDDRC_THRD_1 +271 0x7FFF //RX_TDDRC_THRD_2 +272 0x7FFF //RX_TDDRC_THRD_3 +273 0x7FFF //RX_TDDRC_SLANT_0 +274 0x7FFF //RX_TDDRC_SLANT_1 +275 0x3000 //RX_TDDRC_ALPHA_UP_0 +276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x199A //RX_TDDRC_HMNC_GAIN +279 0x0001 //RX_TDDRC_SMT_FLAG +280 0x0CCD //RX_TDDRC_SMT_W +281 0x0155 //RX_TDDRC_DRC_GAIN +195 0x0020 //RX_FDEQ_SUBNUM +196 0x4848 //RX_FDEQ_GAIN_0 +197 0x4848 //RX_FDEQ_GAIN_1 +198 0x4848 //RX_FDEQ_GAIN_2 +199 0x4848 //RX_FDEQ_GAIN_3 +200 0x4848 //RX_FDEQ_GAIN_4 +201 0x4848 //RX_FDEQ_GAIN_5 +202 0x4848 //RX_FDEQ_GAIN_6 +203 0x4848 //RX_FDEQ_GAIN_7 +204 0x4848 //RX_FDEQ_GAIN_8 +205 0x4848 //RX_FDEQ_GAIN_9 +206 0x4848 //RX_FDEQ_GAIN_10 +207 0x4848 //RX_FDEQ_GAIN_11 +208 0x4848 //RX_FDEQ_GAIN_12 +209 0x4848 //RX_FDEQ_GAIN_13 +210 0x4848 //RX_FDEQ_GAIN_14 +211 0x4848 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0202 //RX_FDEQ_BIN_0 +221 0x0203 //RX_FDEQ_BIN_1 +222 0x0303 //RX_FDEQ_BIN_2 +223 0x0304 //RX_FDEQ_BIN_3 +224 0x0405 //RX_FDEQ_BIN_4 +225 0x0506 //RX_FDEQ_BIN_5 +226 0x0708 //RX_FDEQ_BIN_6 +227 0x090A //RX_FDEQ_BIN_7 +228 0x0B0C //RX_FDEQ_BIN_8 +229 0x0D0E //RX_FDEQ_BIN_9 +230 0x1013 //RX_FDEQ_BIN_10 +231 0x1719 //RX_FDEQ_BIN_11 +232 0x1B1E //RX_FDEQ_BIN_12 +233 0x1E1E //RX_FDEQ_BIN_13 +234 0x1E28 //RX_FDEQ_BIN_14 +235 0x282C //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x4000 //RX_FDEQ_RESRV_0 +245 0x0320 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0030 //RX_FDDRC_BAND_MARGIN_1 +248 0x0050 //RX_FDDRC_BAND_MARGIN_2 +249 0x0080 //RX_FDDRC_BAND_MARGIN_3 +250 0x0007 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x5000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x6400 //RX_FDDRC_THRD_3_2 +258 0x6400 //RX_FDDRC_THRD_3_3 +259 0x2000 //RX_FDDRC_SLANT_0_0 +260 0x2000 //RX_FDDRC_SLANT_0_1 +261 0x2000 //RX_FDDRC_SLANT_0_2 +262 0x2000 //RX_FDDRC_SLANT_0_3 +263 0x5333 //RX_FDDRC_SLANT_1_0 +264 0x5333 //RX_FDDRC_SLANT_1_1 +265 0x5333 //RX_FDDRC_SLANT_1_2 +266 0x5333 //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +286 0x0100 //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 +#VOL 3 +163 0x3000 //RX_TDDRC_ALPHA_UP_1 +164 0x3000 //RX_TDDRC_ALPHA_UP_2 +165 0x3000 //RX_TDDRC_ALPHA_UP_3 +166 0x3000 //RX_TDDRC_ALPHA_UP_4 +184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +190 0x7FFF //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +269 0x0000 //RX_TDDRC_THRD_0 +270 0x0000 //RX_TDDRC_THRD_1 +271 0x7FFF //RX_TDDRC_THRD_2 +272 0x7FFF //RX_TDDRC_THRD_3 +273 0x7FFF //RX_TDDRC_SLANT_0 +274 0x7FFF //RX_TDDRC_SLANT_1 +275 0x3000 //RX_TDDRC_ALPHA_UP_0 +276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x199A //RX_TDDRC_HMNC_GAIN +279 0x0001 //RX_TDDRC_SMT_FLAG +280 0x0CCD //RX_TDDRC_SMT_W +281 0x0155 //RX_TDDRC_DRC_GAIN +195 0x0020 //RX_FDEQ_SUBNUM +196 0x4848 //RX_FDEQ_GAIN_0 +197 0x4848 //RX_FDEQ_GAIN_1 +198 0x4848 //RX_FDEQ_GAIN_2 +199 0x4848 //RX_FDEQ_GAIN_3 +200 0x4848 //RX_FDEQ_GAIN_4 +201 0x4848 //RX_FDEQ_GAIN_5 +202 0x4848 //RX_FDEQ_GAIN_6 +203 0x4848 //RX_FDEQ_GAIN_7 +204 0x4848 //RX_FDEQ_GAIN_8 +205 0x4848 //RX_FDEQ_GAIN_9 +206 0x4848 //RX_FDEQ_GAIN_10 +207 0x4848 //RX_FDEQ_GAIN_11 +208 0x4848 //RX_FDEQ_GAIN_12 +209 0x4848 //RX_FDEQ_GAIN_13 +210 0x4848 //RX_FDEQ_GAIN_14 +211 0x4848 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0202 //RX_FDEQ_BIN_0 +221 0x0203 //RX_FDEQ_BIN_1 +222 0x0303 //RX_FDEQ_BIN_2 +223 0x0304 //RX_FDEQ_BIN_3 +224 0x0405 //RX_FDEQ_BIN_4 +225 0x0506 //RX_FDEQ_BIN_5 +226 0x0708 //RX_FDEQ_BIN_6 +227 0x090A //RX_FDEQ_BIN_7 +228 0x0B0C //RX_FDEQ_BIN_8 +229 0x0D0E //RX_FDEQ_BIN_9 +230 0x1013 //RX_FDEQ_BIN_10 +231 0x1719 //RX_FDEQ_BIN_11 +232 0x1B1E //RX_FDEQ_BIN_12 +233 0x1E1E //RX_FDEQ_BIN_13 +234 0x1E28 //RX_FDEQ_BIN_14 +235 0x282C //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x4000 //RX_FDEQ_RESRV_0 +245 0x0320 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0030 //RX_FDDRC_BAND_MARGIN_1 +248 0x0050 //RX_FDDRC_BAND_MARGIN_2 +249 0x0080 //RX_FDDRC_BAND_MARGIN_3 +250 0x0007 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x5000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x6400 //RX_FDDRC_THRD_3_2 +258 0x6400 //RX_FDDRC_THRD_3_3 +259 0x2000 //RX_FDDRC_SLANT_0_0 +260 0x2000 //RX_FDDRC_SLANT_0_1 +261 0x2000 //RX_FDDRC_SLANT_0_2 +262 0x2000 //RX_FDDRC_SLANT_0_3 +263 0x5333 //RX_FDDRC_SLANT_1_0 +264 0x5333 //RX_FDDRC_SLANT_1_1 +265 0x5333 //RX_FDDRC_SLANT_1_2 +266 0x5333 //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +286 0x0100 //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 +#VOL 4 +163 0x3000 //RX_TDDRC_ALPHA_UP_1 +164 0x3000 //RX_TDDRC_ALPHA_UP_2 +165 0x3000 //RX_TDDRC_ALPHA_UP_3 +166 0x3000 //RX_TDDRC_ALPHA_UP_4 +184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +190 0x7FFF //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +269 0x0000 //RX_TDDRC_THRD_0 +270 0x0000 //RX_TDDRC_THRD_1 +271 0x7FFF //RX_TDDRC_THRD_2 +272 0x7FFF //RX_TDDRC_THRD_3 +273 0x7FFF //RX_TDDRC_SLANT_0 +274 0x7FFF //RX_TDDRC_SLANT_1 +275 0x3000 //RX_TDDRC_ALPHA_UP_0 +276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x199A //RX_TDDRC_HMNC_GAIN +279 0x0001 //RX_TDDRC_SMT_FLAG +280 0x0CCD //RX_TDDRC_SMT_W +281 0x0155 //RX_TDDRC_DRC_GAIN +195 0x0020 //RX_FDEQ_SUBNUM +196 0x4848 //RX_FDEQ_GAIN_0 +197 0x4848 //RX_FDEQ_GAIN_1 +198 0x4848 //RX_FDEQ_GAIN_2 +199 0x4848 //RX_FDEQ_GAIN_3 +200 0x4848 //RX_FDEQ_GAIN_4 +201 0x4848 //RX_FDEQ_GAIN_5 +202 0x4848 //RX_FDEQ_GAIN_6 +203 0x4848 //RX_FDEQ_GAIN_7 +204 0x4848 //RX_FDEQ_GAIN_8 +205 0x4848 //RX_FDEQ_GAIN_9 +206 0x4848 //RX_FDEQ_GAIN_10 +207 0x4848 //RX_FDEQ_GAIN_11 +208 0x4848 //RX_FDEQ_GAIN_12 +209 0x4848 //RX_FDEQ_GAIN_13 +210 0x4848 //RX_FDEQ_GAIN_14 +211 0x4848 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0202 //RX_FDEQ_BIN_0 +221 0x0203 //RX_FDEQ_BIN_1 +222 0x0303 //RX_FDEQ_BIN_2 +223 0x0304 //RX_FDEQ_BIN_3 +224 0x0405 //RX_FDEQ_BIN_4 +225 0x0506 //RX_FDEQ_BIN_5 +226 0x0708 //RX_FDEQ_BIN_6 +227 0x090A //RX_FDEQ_BIN_7 +228 0x0B0C //RX_FDEQ_BIN_8 +229 0x0D0E //RX_FDEQ_BIN_9 +230 0x1013 //RX_FDEQ_BIN_10 +231 0x1719 //RX_FDEQ_BIN_11 +232 0x1B1E //RX_FDEQ_BIN_12 +233 0x1E1E //RX_FDEQ_BIN_13 +234 0x1E28 //RX_FDEQ_BIN_14 +235 0x282C //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x4000 //RX_FDEQ_RESRV_0 +245 0x0320 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0030 //RX_FDDRC_BAND_MARGIN_1 +248 0x0050 //RX_FDDRC_BAND_MARGIN_2 +249 0x0080 //RX_FDDRC_BAND_MARGIN_3 +250 0x0007 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x5000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x6400 //RX_FDDRC_THRD_3_2 +258 0x6400 //RX_FDDRC_THRD_3_3 +259 0x2000 //RX_FDDRC_SLANT_0_0 +260 0x2000 //RX_FDDRC_SLANT_0_1 +261 0x2000 //RX_FDDRC_SLANT_0_2 +262 0x2000 //RX_FDDRC_SLANT_0_3 +263 0x5333 //RX_FDDRC_SLANT_1_0 +264 0x5333 //RX_FDDRC_SLANT_1_1 +265 0x5333 //RX_FDDRC_SLANT_1_2 +266 0x5333 //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +286 0x0100 //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 +#VOL 5 +163 0x3000 //RX_TDDRC_ALPHA_UP_1 +164 0x3000 //RX_TDDRC_ALPHA_UP_2 +165 0x3000 //RX_TDDRC_ALPHA_UP_3 +166 0x3000 //RX_TDDRC_ALPHA_UP_4 +184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +190 0x7FFF //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +269 0x0000 //RX_TDDRC_THRD_0 +270 0x0000 //RX_TDDRC_THRD_1 +271 0x7FFF //RX_TDDRC_THRD_2 +272 0x7FFF //RX_TDDRC_THRD_3 +273 0x7FFF //RX_TDDRC_SLANT_0 +274 0x7FFF //RX_TDDRC_SLANT_1 +275 0x3000 //RX_TDDRC_ALPHA_UP_0 +276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x199A //RX_TDDRC_HMNC_GAIN +279 0x0001 //RX_TDDRC_SMT_FLAG +280 0x0CCD //RX_TDDRC_SMT_W +281 0x0155 //RX_TDDRC_DRC_GAIN +195 0x0020 //RX_FDEQ_SUBNUM +196 0x4848 //RX_FDEQ_GAIN_0 +197 0x4848 //RX_FDEQ_GAIN_1 +198 0x4848 //RX_FDEQ_GAIN_2 +199 0x4848 //RX_FDEQ_GAIN_3 +200 0x4848 //RX_FDEQ_GAIN_4 +201 0x4848 //RX_FDEQ_GAIN_5 +202 0x4848 //RX_FDEQ_GAIN_6 +203 0x4848 //RX_FDEQ_GAIN_7 +204 0x4848 //RX_FDEQ_GAIN_8 +205 0x4848 //RX_FDEQ_GAIN_9 +206 0x4848 //RX_FDEQ_GAIN_10 +207 0x4848 //RX_FDEQ_GAIN_11 +208 0x4848 //RX_FDEQ_GAIN_12 +209 0x4848 //RX_FDEQ_GAIN_13 +210 0x4848 //RX_FDEQ_GAIN_14 +211 0x4848 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0202 //RX_FDEQ_BIN_0 +221 0x0203 //RX_FDEQ_BIN_1 +222 0x0303 //RX_FDEQ_BIN_2 +223 0x0304 //RX_FDEQ_BIN_3 +224 0x0405 //RX_FDEQ_BIN_4 +225 0x0506 //RX_FDEQ_BIN_5 +226 0x0708 //RX_FDEQ_BIN_6 +227 0x090A //RX_FDEQ_BIN_7 +228 0x0B0C //RX_FDEQ_BIN_8 +229 0x0D0E //RX_FDEQ_BIN_9 +230 0x1013 //RX_FDEQ_BIN_10 +231 0x1719 //RX_FDEQ_BIN_11 +232 0x1B1E //RX_FDEQ_BIN_12 +233 0x1E1E //RX_FDEQ_BIN_13 +234 0x1E28 //RX_FDEQ_BIN_14 +235 0x282C //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x4000 //RX_FDEQ_RESRV_0 +245 0x0320 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0030 //RX_FDDRC_BAND_MARGIN_1 +248 0x0050 //RX_FDDRC_BAND_MARGIN_2 +249 0x0080 //RX_FDDRC_BAND_MARGIN_3 +250 0x0007 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x5000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x6400 //RX_FDDRC_THRD_3_2 +258 0x6400 //RX_FDDRC_THRD_3_3 +259 0x2000 //RX_FDDRC_SLANT_0_0 +260 0x2000 //RX_FDDRC_SLANT_0_1 +261 0x2000 //RX_FDDRC_SLANT_0_2 +262 0x2000 //RX_FDDRC_SLANT_0_3 +263 0x5333 //RX_FDDRC_SLANT_1_0 +264 0x5333 //RX_FDDRC_SLANT_1_1 +265 0x5333 //RX_FDDRC_SLANT_1_2 +266 0x5333 //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +286 0x0100 //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 +#VOL 6 +163 0x3000 //RX_TDDRC_ALPHA_UP_1 +164 0x3000 //RX_TDDRC_ALPHA_UP_2 +165 0x3000 //RX_TDDRC_ALPHA_UP_3 +166 0x3000 //RX_TDDRC_ALPHA_UP_4 +184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +190 0x7FFF //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +269 0x0000 //RX_TDDRC_THRD_0 +270 0x0000 //RX_TDDRC_THRD_1 +271 0x7FFF //RX_TDDRC_THRD_2 +272 0x7FFF //RX_TDDRC_THRD_3 +273 0x7FFF //RX_TDDRC_SLANT_0 +274 0x7FFF //RX_TDDRC_SLANT_1 +275 0x3000 //RX_TDDRC_ALPHA_UP_0 +276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x199A //RX_TDDRC_HMNC_GAIN +279 0x0001 //RX_TDDRC_SMT_FLAG +280 0x0CCD //RX_TDDRC_SMT_W +281 0x0155 //RX_TDDRC_DRC_GAIN +195 0x0020 //RX_FDEQ_SUBNUM +196 0x4848 //RX_FDEQ_GAIN_0 +197 0x4848 //RX_FDEQ_GAIN_1 +198 0x4848 //RX_FDEQ_GAIN_2 +199 0x4848 //RX_FDEQ_GAIN_3 +200 0x4848 //RX_FDEQ_GAIN_4 +201 0x4848 //RX_FDEQ_GAIN_5 +202 0x4848 //RX_FDEQ_GAIN_6 +203 0x4848 //RX_FDEQ_GAIN_7 +204 0x4848 //RX_FDEQ_GAIN_8 +205 0x4848 //RX_FDEQ_GAIN_9 +206 0x4848 //RX_FDEQ_GAIN_10 +207 0x4848 //RX_FDEQ_GAIN_11 +208 0x4848 //RX_FDEQ_GAIN_12 +209 0x4848 //RX_FDEQ_GAIN_13 +210 0x4848 //RX_FDEQ_GAIN_14 +211 0x4848 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0202 //RX_FDEQ_BIN_0 +221 0x0203 //RX_FDEQ_BIN_1 +222 0x0303 //RX_FDEQ_BIN_2 +223 0x0304 //RX_FDEQ_BIN_3 +224 0x0405 //RX_FDEQ_BIN_4 +225 0x0506 //RX_FDEQ_BIN_5 +226 0x0708 //RX_FDEQ_BIN_6 +227 0x090A //RX_FDEQ_BIN_7 +228 0x0B0C //RX_FDEQ_BIN_8 +229 0x0D0E //RX_FDEQ_BIN_9 +230 0x1013 //RX_FDEQ_BIN_10 +231 0x1719 //RX_FDEQ_BIN_11 +232 0x1B1E //RX_FDEQ_BIN_12 +233 0x1E1E //RX_FDEQ_BIN_13 +234 0x1E28 //RX_FDEQ_BIN_14 +235 0x282C //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x4000 //RX_FDEQ_RESRV_0 +245 0x0320 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0030 //RX_FDDRC_BAND_MARGIN_1 +248 0x0050 //RX_FDDRC_BAND_MARGIN_2 +249 0x0080 //RX_FDDRC_BAND_MARGIN_3 +250 0x0007 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x5000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x6400 //RX_FDDRC_THRD_3_2 +258 0x6400 //RX_FDDRC_THRD_3_3 +259 0x2000 //RX_FDDRC_SLANT_0_0 +260 0x2000 //RX_FDDRC_SLANT_0_1 +261 0x2000 //RX_FDDRC_SLANT_0_2 +262 0x2000 //RX_FDDRC_SLANT_0_3 +263 0x5333 //RX_FDDRC_SLANT_1_0 +264 0x5333 //RX_FDDRC_SLANT_1_1 +265 0x5333 //RX_FDDRC_SLANT_1_2 +266 0x5333 //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +286 0x0100 //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 #CASE_NAME BLUETOOTH-BTNB-VOICE_GENERIC-FB -#PARAM_TYPE TX+RX -#TOTAL_CUSTOM_STEP 7 +#PARAM_MODE Full +#PARAM_TYPE TX+2RX +#TOTAL_CUSTOM_STEP 7+7 #TX 0 0x0009 //TX_OPERATION_MODE_0 1 0x0009 //TX_OPERATION_MODE_1 @@ -14282,10 +21619,10 @@ 248 0xF600 //TX_THR_SN_EST_6 249 0xF600 //TX_THR_SN_EST_7 250 0x0200 //TX_DELTA_THR_SN_EST_0 -251 0x0200 //TX_DELTA_THR_SN_EST_1 -252 0x0400 //TX_DELTA_THR_SN_EST_2 -253 0x0300 //TX_DELTA_THR_SN_EST_3 -254 0x0600 //TX_DELTA_THR_SN_EST_4 +251 0x0400 //TX_DELTA_THR_SN_EST_1 +252 0x0300 //TX_DELTA_THR_SN_EST_2 +253 0x0600 //TX_DELTA_THR_SN_EST_3 +254 0x0200 //TX_DELTA_THR_SN_EST_4 255 0x0200 //TX_DELTA_THR_SN_EST_5 256 0x0200 //TX_DELTA_THR_SN_EST_6 257 0x0200 //TX_DELTA_THR_SN_EST_7 @@ -14313,31 +21650,31 @@ 279 0x2000 //TX_B_POST_FLT_0 280 0x2000 //TX_B_POST_FLT_1 281 0x0012 //TX_NS_LVL_CTRL_0 -282 0x0019 //TX_NS_LVL_CTRL_1 +282 0x0016 //TX_NS_LVL_CTRL_1 283 0x0016 //TX_NS_LVL_CTRL_2 -284 0x0016 //TX_NS_LVL_CTRL_3 -285 0x0019 //TX_NS_LVL_CTRL_4 +284 0x0019 //TX_NS_LVL_CTRL_3 +285 0x0010 //TX_NS_LVL_CTRL_4 286 0x0010 //TX_NS_LVL_CTRL_5 -287 0x0010 //TX_NS_LVL_CTRL_6 +287 0x0019 //TX_NS_LVL_CTRL_6 288 0x0010 //TX_NS_LVL_CTRL_7 289 0x000C //TX_MIN_GAIN_S_0 -290 0x0011 //TX_MIN_GAIN_S_1 +290 0x000C //TX_MIN_GAIN_S_1 291 0x000C //TX_MIN_GAIN_S_2 -292 0x000C //TX_MIN_GAIN_S_3 -293 0x000F //TX_MIN_GAIN_S_4 +292 0x000F //TX_MIN_GAIN_S_3 +293 0x000C //TX_MIN_GAIN_S_4 294 0x000C //TX_MIN_GAIN_S_5 -295 0x000C //TX_MIN_GAIN_S_6 +295 0x0011 //TX_MIN_GAIN_S_6 296 0x000C //TX_MIN_GAIN_S_7 297 0x7FFF //TX_NMOS_SUP 298 0x0000 //TX_NS_MAX_PRI_SNR_TH 299 0x0000 //TX_NMOS_SUP_MENSA 300 0x7000 //TX_SNRI_SUP_0 -301 0x6000 //TX_SNRI_SUP_1 +301 0x7000 //TX_SNRI_SUP_1 302 0x7000 //TX_SNRI_SUP_2 -303 0x7000 //TX_SNRI_SUP_3 -304 0x6000 //TX_SNRI_SUP_4 +303 0x6000 //TX_SNRI_SUP_3 +304 0x7FFF //TX_SNRI_SUP_4 305 0x7FFF //TX_SNRI_SUP_5 -306 0x7FFF //TX_SNRI_SUP_6 +306 0x6000 //TX_SNRI_SUP_6 307 0x7FFF //TX_SNRI_SUP_7 308 0x7FFF //TX_THR_LFNS 309 0x0016 //TX_G_LFNS @@ -14354,8 +21691,8 @@ 320 0x6000 //TX_A_POST_FILT_S_6 321 0x6000 //TX_A_POST_FILT_S_7 322 0x2000 //TX_B_POST_FILT_0 -323 0x2000 //TX_B_POST_FILT_1 -324 0x4000 //TX_B_POST_FILT_2 +323 0x4000 //TX_B_POST_FILT_1 +324 0x2000 //TX_B_POST_FILT_2 325 0x2000 //TX_B_POST_FILT_3 326 0x2000 //TX_B_POST_FILT_4 327 0x2000 //TX_B_POST_FILT_5 @@ -14411,10 +21748,10 @@ 377 0x0000 //TX_NOISE_TH_5_4 378 0x02BC //TX_NOISE_TH_6 379 0x0020 //TX_MINENOISE_TH -380 0x4000 //TX_MINENOISE_MIC0_TH_MTS -381 0xFFEE //TX_MINENOISE_MIC0_TH_EXP -382 0x6000 //TX_MINENOISE_MIC0_S_TH_MTS -383 0xFFF3 //TX_MINENOISE_MIC0_S_TH_EXP +380 0x4000 //TX_MORENS_TFMASK_TH +381 0xFFEE //TX_DRC_QUIET_FLOOR +382 0x6000 //TX_RATIODTL_CUT_TH +383 0xFFF3 //TX_DT_CUT_K1 384 0x0666 //TX_OUT_ENER_S_TH_CLEAN 385 0x0666 //TX_OUT_ENER_S_TH_LESSCLEAN 386 0x0333 //TX_OUT_ENER_S_TH_NOISY @@ -14422,15 +21759,15 @@ 388 0x0333 //TX_OUT_ENER_TH_SPEECH 389 0x2000 //TX_SN_NPB_GAIN 390 0x0000 //TX_NN_NPB_GAIN -391 0x0000 //TX_CSX_ALPHA_0 -392 0x0000 //TX_CSX_ALPHA_1 -393 0x0000 //TX_CSX_ALPHA_2 -394 0x0000 //TX_CSX_ALPHA_3 -395 0x0800 //TX_MU_ARSP_EST -396 0x00C8 //TX_P_OUTBEAM_MIN_TH +391 0x0000 //TX_POST_MASK_SUP_HSNE +392 0x0000 //TX_TAIL_DET_TH +393 0x0000 //TX_B_LESSCUT_RTO_WTA +394 0x0000 //TX_MEL_G_R +395 0x0800 //TX_SUPHIGH_TH +396 0x00C8 //TX_MASK_G_R 397 0x0002 //TX_EXTRA_NS_L -398 0x0800 //TX_EXTRA_NS_A -399 0x0005 //TX_VR_NOISE_FLOOR_TH +398 0x0800 //TX_C_POST_FLT_MASK +399 0x0005 //TX_A_POST_FLT_WNS 400 0x0148 //TX_MIN_G_LOW300HZ 401 0x0002 //TX_MAXLEVEL_CNG 402 0x00B4 //TX_STN_NOISE_TH @@ -14545,16 +21882,16 @@ 511 0x6666 //TX_MIC_TO_BFGAIN 512 0x0000 //TX_MICTOBFGAIN0 513 0x0000 //TX_FASTMUE_TH -514 0x0000 //TX_DERVB_LEN_0 -515 0x0000 //TX_DERVB_LEN_1 -516 0x0000 //TX_RHO_DERVB -517 0x0000 //TX_MIC_INDX_DERVB -518 0x0000 //TX_MU_DERVB -519 0x0000 //TX_DR_RESRV_0 -520 0x0000 //TX_DR_RESRV_1 -521 0x0000 //TX_DR_RESRV_2 -522 0x0000 //TX_DR_RESRV_3 -523 0x0000 //TX_DR_RESRV_4 +514 0x0000 //TX_DEREVERB_LF_MU +515 0x0000 //TX_DEREVERB_HF_MU +516 0x0000 //TX_DEREVERB_DELAY +517 0x0000 //TX_DEREVERB_COEF_LEN +518 0x0000 //TX_DEREVERB_DNR +519 0x0000 //TX_DEREVERB_ALPHA +520 0x0000 //TX_DEREVERB_BETA +521 0x0000 //TX_GSC_RTOL_TH +522 0x0000 //TX_GSC_RTOH_TH +523 0x0000 //TX_WIDE2_MEANHTH 524 0x0000 //TX_DR_RESRV_5 525 0x0000 //TX_DR_RESRV_6 526 0x0000 //TX_DR_RESRV_7 @@ -14928,8 +22265,73 @@ 894 0xC000 //TX_FASTNS_SSA_THHFL 895 0xCCCC //TX_FASTNS_SSA_THLFH 896 0xD999 //TX_FASTNS_SSA_THHFH +897 0x0000 //TX_SENDFUNC_REG_MICMUTE +898 0x0000 //TX_SENDFUNC_REG_MICMUTE1 +899 0x0000 //TX_MICMUTE_RATIO_THR +900 0x0000 //TX_MICMUTE_AMP_THR +901 0x0000 //TX_MICMUTE_HPF_IND +902 0x0000 //TX_MICMUTE_LOG_EYR_TH +903 0x0000 //TX_MICMUTE_CVG_TIME +904 0x0000 //TX_MICMUTE_RELEASE_TIME +905 0x0000 //TX_MIC_VOLUME_MIC0MUTE +906 0x0000 //TX_MICMUTE_EPD_OFFSET_0 +907 0x0000 //TX_MICMUTE_FRQ_AEC_L +908 0x0000 //TX_MICMUTE_EAD_THR +909 0x0000 //TX_MICMUTE_LAMBDA_CB_NLE +910 0x0000 //TX_MICMUTE_LAMBDA_RE_EST +911 0x0000 //TX_DTD_THR1_MICMUTE_0 +912 0x0000 //TX_DTD_THR1_MICMUTE_1 +913 0x0000 //TX_DTD_THR1_MICMUTE_2 +914 0x0000 //TX_DTD_THR1_MICMUTE_3 +915 0x0000 //TX_DTD_THR2_MICMUTE_0 +916 0x0000 //TX_MICMUTE_MIN_EQ_RE_EST_0 +917 0x0000 //TX_MICMUTE_MIN_EQ_RE_EST_1 +918 0x0000 //TX_MICMUTE_MIN_EQ_RE_EST_2 +919 0x0000 //TX_MICMUTE_MIN_EQ_RE_EST_3 +920 0x0000 //TX_MICMUTE_MIN_EQ_RE_EST_4 +921 0x0000 //TX_MICMUTE_C_POST_FLT +922 0x0000 //TX_MICMUTE_DT_CUT_K +923 0x0000 //TX_MICMUTE_DT_CUT_THR +924 0x0000 //TX_MICMUTE_DT_CUT_K2 +925 0x0000 //TX_MICMUTE_DT_CUT_THR2 +926 0x0000 //TX_MICMUTE_DT2_HOLD_N +927 0x0000 //TX_MICMUTE_RATIODTH_THCUT +928 0x0000 //TX_MICMUTE_B_POST_FLT_ECHOL +929 0x0000 //TX_MICMUTE_B_POST_FLT_ECHOH +930 0x0000 //TX_MICMUTE_C_POST_FLT_MASK +931 0x0000 //TX_MICMUTE_RATIODTL_CUT_TH +932 0x0000 //TX_MICMUTE_DT_CUT_K1 +933 0x0000 //TX_MICMUTE_N2_SN_EST +934 0x0000 //TX_MICMUTE_THR_SN_EST_0 +935 0x0000 //TX_MICMUTE_MIN_G_CTRL_0 +936 0x0000 //TX_MICMUTE_A_POST_FILT_S_0 +937 0x0000 //TX_MICMUTE_B_POST_FILT_0 +938 0x0000 //TX_MIC1RUB_AMP_THR +939 0x0000 //TX_MIC1MUTE_RATIO_THR +940 0x0000 //TX_MIC1MUTE_AMP_THR +941 0x0000 //TX_MIC1MUTE_CVG_TIME +942 0x0000 //TX_MIC1MUTE_RELEASE_TIME +943 0x0000 //TX_AMS_RESRV_01 +944 0x0000 //TX_AMS_RESRV_02 +945 0x0000 //TX_AMS_RESRV_03 +946 0x0000 //TX_AMS_RESRV_04 +947 0x0000 //TX_AMS_RESRV_05 +948 0x0000 //TX_AMS_RESRV_06 +949 0x0000 //TX_AMS_RESRV_07 +950 0x0000 //TX_AMS_RESRV_08 +951 0x0000 //TX_AMS_RESRV_09 +952 0x0000 //TX_AMS_RESRV_10 +953 0x0000 //TX_AMS_RESRV_11 +954 0x0000 //TX_AMS_RESRV_12 +955 0x0000 //TX_AMS_RESRV_13 +956 0x0000 //TX_AMS_RESRV_14 +957 0x0000 //TX_AMS_RESRV_15 +958 0x0000 //TX_AMS_RESRV_16 +959 0x0000 //TX_AMS_RESRV_17 +960 0x0000 //TX_AMS_RESRV_18 +961 0x0000 //TX_AMS_RESRV_19 #RX -0 0x0064 //RX_RECVFUNC_MODE_0 +0 0x2064 //RX_RECVFUNC_MODE_0 1 0x0000 //RX_RECVFUNC_MODE_1 2 0x0004 //RX_SAMPLINGFREQ_SIG 3 0x0004 //RX_SAMPLINGFREQ_PROC @@ -15779,10 +23181,862 @@ 110 0x0000 //RX_FDDRC_RESRV_0 129 0x0100 //RX_SPK_VOL 130 0x0000 //RX_VOL_RESRV_0 +#RX 2 +157 0x0064 //RX_RECVFUNC_MODE_0 +158 0x0000 //RX_RECVFUNC_MODE_1 +159 0x0004 //RX_SAMPLINGFREQ_SIG +160 0x0004 //RX_SAMPLINGFREQ_PROC +161 0x000A //RX_FRAME_SZ +162 0x0000 //RX_DELAY_OPT +163 0x1000 //RX_TDDRC_ALPHA_UP_1 +164 0x1000 //RX_TDDRC_ALPHA_UP_2 +165 0x1000 //RX_TDDRC_ALPHA_UP_3 +166 0x1000 //RX_TDDRC_ALPHA_UP_4 +167 0x0800 //RX_PGA +168 0x7FFF //RX_A_HP +169 0x4000 //RX_B_PE +170 0x7800 //RX_THR_PITCH_DET_0 +171 0x7000 //RX_THR_PITCH_DET_1 +172 0x6000 //RX_THR_PITCH_DET_2 +173 0x0008 //RX_PITCH_BFR_LEN +174 0x0003 //RX_SBD_PITCH_DET +175 0x0100 //RX_PP_RESRV_0 +176 0x0020 //RX_PP_RESRV_1 +177 0x0500 //RX_N_SN_EST +178 0x000C //RX_N2_SN_EST +179 0x000A //RX_NS_LVL_CTRL +180 0xF600 //RX_THR_SN_EST +181 0x7000 //RX_LAMBDA_PFILT +182 0x000A //RX_FENS_RESRV_0 +183 0x0190 //RX_FENS_RESRV_1 +184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +187 0x0002 //RX_EXTRA_NS_L +188 0x0800 //RX_EXTRA_NS_A +189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +190 0x7FFF //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +192 0x199A //RX_A_POST_FLT +193 0x0000 //RX_LMT_THRD +194 0x4000 //RX_LMT_ALPHA +195 0x0020 //RX_FDEQ_SUBNUM +196 0x4848 //RX_FDEQ_GAIN_0 +197 0x4848 //RX_FDEQ_GAIN_1 +198 0x4848 //RX_FDEQ_GAIN_2 +199 0x4848 //RX_FDEQ_GAIN_3 +200 0x4848 //RX_FDEQ_GAIN_4 +201 0x4848 //RX_FDEQ_GAIN_5 +202 0x4848 //RX_FDEQ_GAIN_6 +203 0x4848 //RX_FDEQ_GAIN_7 +204 0x4848 //RX_FDEQ_GAIN_8 +205 0x4848 //RX_FDEQ_GAIN_9 +206 0x4848 //RX_FDEQ_GAIN_10 +207 0x4848 //RX_FDEQ_GAIN_11 +208 0x4848 //RX_FDEQ_GAIN_12 +209 0x4848 //RX_FDEQ_GAIN_13 +210 0x4848 //RX_FDEQ_GAIN_14 +211 0x4848 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0202 //RX_FDEQ_BIN_0 +221 0x0203 //RX_FDEQ_BIN_1 +222 0x0304 //RX_FDEQ_BIN_2 +223 0x0405 //RX_FDEQ_BIN_3 +224 0x0607 //RX_FDEQ_BIN_4 +225 0x0809 //RX_FDEQ_BIN_5 +226 0x0A0B //RX_FDEQ_BIN_6 +227 0x0C0D //RX_FDEQ_BIN_7 +228 0x0E0F //RX_FDEQ_BIN_8 +229 0x1011 //RX_FDEQ_BIN_9 +230 0x1214 //RX_FDEQ_BIN_10 +231 0x1618 //RX_FDEQ_BIN_11 +232 0x1C1C //RX_FDEQ_BIN_12 +233 0x2020 //RX_FDEQ_BIN_13 +234 0x2020 //RX_FDEQ_BIN_14 +235 0x2011 //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x4000 //RX_FDEQ_RESRV_0 +245 0x0320 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0030 //RX_FDDRC_BAND_MARGIN_1 +248 0x0050 //RX_FDDRC_BAND_MARGIN_2 +249 0x0080 //RX_FDDRC_BAND_MARGIN_3 +250 0x0007 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x5000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x6400 //RX_FDDRC_THRD_3_2 +258 0x6400 //RX_FDDRC_THRD_3_3 +259 0x2000 //RX_FDDRC_SLANT_0_0 +260 0x2000 //RX_FDDRC_SLANT_0_1 +261 0x2000 //RX_FDDRC_SLANT_0_2 +262 0x2000 //RX_FDDRC_SLANT_0_3 +263 0x5333 //RX_FDDRC_SLANT_1_0 +264 0x5333 //RX_FDDRC_SLANT_1_1 +265 0x5333 //RX_FDDRC_SLANT_1_2 +266 0x5333 //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +268 0x0000 //RX_FILTINDX +269 0x0000 //RX_TDDRC_THRD_0 +270 0x0000 //RX_TDDRC_THRD_1 +271 0x7FFF //RX_TDDRC_THRD_2 +272 0x7FFF //RX_TDDRC_THRD_3 +273 0x7FFF //RX_TDDRC_SLANT_0 +274 0x7FFF //RX_TDDRC_SLANT_1 +275 0x1000 //RX_TDDRC_ALPHA_UP_0 +276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x199A //RX_TDDRC_HMNC_GAIN +279 0x0001 //RX_TDDRC_SMT_FLAG +280 0x0CCD //RX_TDDRC_SMT_W +281 0x0155 //RX_TDDRC_DRC_GAIN +282 0x7C00 //RX_LAMBDA_PKA_FP +283 0x2000 //RX_TPKA_FP +284 0x2000 //RX_MIN_G_FP +285 0x0080 //RX_MAX_G_FP +286 0x0100 //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 +288 0x0000 //RX_MAXLEVEL_CNG +289 0x3000 //RX_BWE_UV_TH +290 0x3000 //RX_BWE_UV_TH2 +291 0x1800 //RX_BWE_UV_TH3 +292 0x1000 //RX_BWE_V_TH +293 0x04CD //RX_BWE_GAIN1_V_TH1 +294 0x0F33 //RX_BWE_GAIN1_V_TH2 +295 0x7333 //RX_BWE_UV_EQ +296 0x199A //RX_BWE_V_EQ +297 0x7333 //RX_BWE_TONE_TH +298 0x0004 //RX_BWE_UV_HOLD_T +299 0x6CCD //RX_BWE_GAIN2_ALPHA +300 0x799A //RX_BWE_GAIN3_ALPHA +301 0x001E //RX_BWE_CUTOFF +302 0x3000 //RX_BWE_GAINFILL +303 0x3200 //RX_BWE_MAXTH_TONE +304 0x2000 //RX_BWE_EQ_0 +305 0x2000 //RX_BWE_EQ_1 +306 0x2000 //RX_BWE_EQ_2 +307 0x2000 //RX_BWE_EQ_3 +308 0x2000 //RX_BWE_EQ_4 +309 0x2000 //RX_BWE_EQ_5 +310 0x2000 //RX_BWE_EQ_6 +311 0x0000 //RX_BWE_RESRV_0 +312 0x0000 //RX_BWE_RESRV_1 +313 0x0000 //RX_BWE_RESRV_2 +#VOL 0 +163 0x1000 //RX_TDDRC_ALPHA_UP_1 +164 0x1000 //RX_TDDRC_ALPHA_UP_2 +165 0x1000 //RX_TDDRC_ALPHA_UP_3 +166 0x1000 //RX_TDDRC_ALPHA_UP_4 +184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +190 0x7FFF //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +269 0x0000 //RX_TDDRC_THRD_0 +270 0x0000 //RX_TDDRC_THRD_1 +271 0x7FFF //RX_TDDRC_THRD_2 +272 0x7FFF //RX_TDDRC_THRD_3 +273 0x7FFF //RX_TDDRC_SLANT_0 +274 0x7FFF //RX_TDDRC_SLANT_1 +275 0x1000 //RX_TDDRC_ALPHA_UP_0 +276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x199A //RX_TDDRC_HMNC_GAIN +279 0x0001 //RX_TDDRC_SMT_FLAG +280 0x0CCD //RX_TDDRC_SMT_W +281 0x0155 //RX_TDDRC_DRC_GAIN +195 0x0020 //RX_FDEQ_SUBNUM +196 0x4848 //RX_FDEQ_GAIN_0 +197 0x4848 //RX_FDEQ_GAIN_1 +198 0x4848 //RX_FDEQ_GAIN_2 +199 0x4848 //RX_FDEQ_GAIN_3 +200 0x4848 //RX_FDEQ_GAIN_4 +201 0x4848 //RX_FDEQ_GAIN_5 +202 0x4848 //RX_FDEQ_GAIN_6 +203 0x4848 //RX_FDEQ_GAIN_7 +204 0x4848 //RX_FDEQ_GAIN_8 +205 0x4848 //RX_FDEQ_GAIN_9 +206 0x4848 //RX_FDEQ_GAIN_10 +207 0x4848 //RX_FDEQ_GAIN_11 +208 0x4848 //RX_FDEQ_GAIN_12 +209 0x4848 //RX_FDEQ_GAIN_13 +210 0x4848 //RX_FDEQ_GAIN_14 +211 0x4848 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0202 //RX_FDEQ_BIN_0 +221 0x0203 //RX_FDEQ_BIN_1 +222 0x0304 //RX_FDEQ_BIN_2 +223 0x0405 //RX_FDEQ_BIN_3 +224 0x0607 //RX_FDEQ_BIN_4 +225 0x0809 //RX_FDEQ_BIN_5 +226 0x0A0B //RX_FDEQ_BIN_6 +227 0x0C0D //RX_FDEQ_BIN_7 +228 0x0E0F //RX_FDEQ_BIN_8 +229 0x1011 //RX_FDEQ_BIN_9 +230 0x1214 //RX_FDEQ_BIN_10 +231 0x1618 //RX_FDEQ_BIN_11 +232 0x1C1C //RX_FDEQ_BIN_12 +233 0x2020 //RX_FDEQ_BIN_13 +234 0x2020 //RX_FDEQ_BIN_14 +235 0x2011 //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x4000 //RX_FDEQ_RESRV_0 +245 0x0320 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0030 //RX_FDDRC_BAND_MARGIN_1 +248 0x0050 //RX_FDDRC_BAND_MARGIN_2 +249 0x0080 //RX_FDDRC_BAND_MARGIN_3 +250 0x0007 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x5000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x6400 //RX_FDDRC_THRD_3_2 +258 0x6400 //RX_FDDRC_THRD_3_3 +259 0x2000 //RX_FDDRC_SLANT_0_0 +260 0x2000 //RX_FDDRC_SLANT_0_1 +261 0x2000 //RX_FDDRC_SLANT_0_2 +262 0x2000 //RX_FDDRC_SLANT_0_3 +263 0x5333 //RX_FDDRC_SLANT_1_0 +264 0x5333 //RX_FDDRC_SLANT_1_1 +265 0x5333 //RX_FDDRC_SLANT_1_2 +266 0x5333 //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +286 0x0100 //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 +#VOL 1 +163 0x1000 //RX_TDDRC_ALPHA_UP_1 +164 0x1000 //RX_TDDRC_ALPHA_UP_2 +165 0x1000 //RX_TDDRC_ALPHA_UP_3 +166 0x1000 //RX_TDDRC_ALPHA_UP_4 +184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +190 0x7FFF //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +269 0x0000 //RX_TDDRC_THRD_0 +270 0x0000 //RX_TDDRC_THRD_1 +271 0x7FFF //RX_TDDRC_THRD_2 +272 0x7FFF //RX_TDDRC_THRD_3 +273 0x7FFF //RX_TDDRC_SLANT_0 +274 0x7FFF //RX_TDDRC_SLANT_1 +275 0x1000 //RX_TDDRC_ALPHA_UP_0 +276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x199A //RX_TDDRC_HMNC_GAIN +279 0x0001 //RX_TDDRC_SMT_FLAG +280 0x0CCD //RX_TDDRC_SMT_W +281 0x0155 //RX_TDDRC_DRC_GAIN +195 0x0020 //RX_FDEQ_SUBNUM +196 0x4848 //RX_FDEQ_GAIN_0 +197 0x4848 //RX_FDEQ_GAIN_1 +198 0x4848 //RX_FDEQ_GAIN_2 +199 0x4848 //RX_FDEQ_GAIN_3 +200 0x4848 //RX_FDEQ_GAIN_4 +201 0x4848 //RX_FDEQ_GAIN_5 +202 0x4848 //RX_FDEQ_GAIN_6 +203 0x4848 //RX_FDEQ_GAIN_7 +204 0x4848 //RX_FDEQ_GAIN_8 +205 0x4848 //RX_FDEQ_GAIN_9 +206 0x4848 //RX_FDEQ_GAIN_10 +207 0x4848 //RX_FDEQ_GAIN_11 +208 0x4848 //RX_FDEQ_GAIN_12 +209 0x4848 //RX_FDEQ_GAIN_13 +210 0x4848 //RX_FDEQ_GAIN_14 +211 0x4848 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0202 //RX_FDEQ_BIN_0 +221 0x0203 //RX_FDEQ_BIN_1 +222 0x0304 //RX_FDEQ_BIN_2 +223 0x0405 //RX_FDEQ_BIN_3 +224 0x0607 //RX_FDEQ_BIN_4 +225 0x0809 //RX_FDEQ_BIN_5 +226 0x0A0B //RX_FDEQ_BIN_6 +227 0x0C0D //RX_FDEQ_BIN_7 +228 0x0E0F //RX_FDEQ_BIN_8 +229 0x1011 //RX_FDEQ_BIN_9 +230 0x1214 //RX_FDEQ_BIN_10 +231 0x1618 //RX_FDEQ_BIN_11 +232 0x1C1C //RX_FDEQ_BIN_12 +233 0x2020 //RX_FDEQ_BIN_13 +234 0x2020 //RX_FDEQ_BIN_14 +235 0x2011 //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x4000 //RX_FDEQ_RESRV_0 +245 0x0320 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0030 //RX_FDDRC_BAND_MARGIN_1 +248 0x0050 //RX_FDDRC_BAND_MARGIN_2 +249 0x0080 //RX_FDDRC_BAND_MARGIN_3 +250 0x0007 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x5000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x6400 //RX_FDDRC_THRD_3_2 +258 0x6400 //RX_FDDRC_THRD_3_3 +259 0x2000 //RX_FDDRC_SLANT_0_0 +260 0x2000 //RX_FDDRC_SLANT_0_1 +261 0x2000 //RX_FDDRC_SLANT_0_2 +262 0x2000 //RX_FDDRC_SLANT_0_3 +263 0x5333 //RX_FDDRC_SLANT_1_0 +264 0x5333 //RX_FDDRC_SLANT_1_1 +265 0x5333 //RX_FDDRC_SLANT_1_2 +266 0x5333 //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +286 0x0100 //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 +#VOL 2 +163 0x1000 //RX_TDDRC_ALPHA_UP_1 +164 0x1000 //RX_TDDRC_ALPHA_UP_2 +165 0x1000 //RX_TDDRC_ALPHA_UP_3 +166 0x1000 //RX_TDDRC_ALPHA_UP_4 +184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +190 0x7FFF //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +269 0x0000 //RX_TDDRC_THRD_0 +270 0x0000 //RX_TDDRC_THRD_1 +271 0x7FFF //RX_TDDRC_THRD_2 +272 0x7FFF //RX_TDDRC_THRD_3 +273 0x7FFF //RX_TDDRC_SLANT_0 +274 0x7FFF //RX_TDDRC_SLANT_1 +275 0x1000 //RX_TDDRC_ALPHA_UP_0 +276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x199A //RX_TDDRC_HMNC_GAIN +279 0x0001 //RX_TDDRC_SMT_FLAG +280 0x0CCD //RX_TDDRC_SMT_W +281 0x0155 //RX_TDDRC_DRC_GAIN +195 0x0020 //RX_FDEQ_SUBNUM +196 0x4848 //RX_FDEQ_GAIN_0 +197 0x4848 //RX_FDEQ_GAIN_1 +198 0x4848 //RX_FDEQ_GAIN_2 +199 0x4848 //RX_FDEQ_GAIN_3 +200 0x4848 //RX_FDEQ_GAIN_4 +201 0x4848 //RX_FDEQ_GAIN_5 +202 0x4848 //RX_FDEQ_GAIN_6 +203 0x4848 //RX_FDEQ_GAIN_7 +204 0x4848 //RX_FDEQ_GAIN_8 +205 0x4848 //RX_FDEQ_GAIN_9 +206 0x4848 //RX_FDEQ_GAIN_10 +207 0x4848 //RX_FDEQ_GAIN_11 +208 0x4848 //RX_FDEQ_GAIN_12 +209 0x4848 //RX_FDEQ_GAIN_13 +210 0x4848 //RX_FDEQ_GAIN_14 +211 0x4848 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0202 //RX_FDEQ_BIN_0 +221 0x0203 //RX_FDEQ_BIN_1 +222 0x0304 //RX_FDEQ_BIN_2 +223 0x0405 //RX_FDEQ_BIN_3 +224 0x0607 //RX_FDEQ_BIN_4 +225 0x0809 //RX_FDEQ_BIN_5 +226 0x0A0B //RX_FDEQ_BIN_6 +227 0x0C0D //RX_FDEQ_BIN_7 +228 0x0E0F //RX_FDEQ_BIN_8 +229 0x1011 //RX_FDEQ_BIN_9 +230 0x1214 //RX_FDEQ_BIN_10 +231 0x1618 //RX_FDEQ_BIN_11 +232 0x1C1C //RX_FDEQ_BIN_12 +233 0x2020 //RX_FDEQ_BIN_13 +234 0x2020 //RX_FDEQ_BIN_14 +235 0x2011 //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x4000 //RX_FDEQ_RESRV_0 +245 0x0320 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0030 //RX_FDDRC_BAND_MARGIN_1 +248 0x0050 //RX_FDDRC_BAND_MARGIN_2 +249 0x0080 //RX_FDDRC_BAND_MARGIN_3 +250 0x0007 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x5000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x6400 //RX_FDDRC_THRD_3_2 +258 0x6400 //RX_FDDRC_THRD_3_3 +259 0x2000 //RX_FDDRC_SLANT_0_0 +260 0x2000 //RX_FDDRC_SLANT_0_1 +261 0x2000 //RX_FDDRC_SLANT_0_2 +262 0x2000 //RX_FDDRC_SLANT_0_3 +263 0x5333 //RX_FDDRC_SLANT_1_0 +264 0x5333 //RX_FDDRC_SLANT_1_1 +265 0x5333 //RX_FDDRC_SLANT_1_2 +266 0x5333 //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +286 0x0100 //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 +#VOL 3 +163 0x1000 //RX_TDDRC_ALPHA_UP_1 +164 0x1000 //RX_TDDRC_ALPHA_UP_2 +165 0x1000 //RX_TDDRC_ALPHA_UP_3 +166 0x1000 //RX_TDDRC_ALPHA_UP_4 +184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +190 0x7FFF //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +269 0x0000 //RX_TDDRC_THRD_0 +270 0x0000 //RX_TDDRC_THRD_1 +271 0x7FFF //RX_TDDRC_THRD_2 +272 0x7FFF //RX_TDDRC_THRD_3 +273 0x7FFF //RX_TDDRC_SLANT_0 +274 0x7FFF //RX_TDDRC_SLANT_1 +275 0x1000 //RX_TDDRC_ALPHA_UP_0 +276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x199A //RX_TDDRC_HMNC_GAIN +279 0x0001 //RX_TDDRC_SMT_FLAG +280 0x0CCD //RX_TDDRC_SMT_W +281 0x0155 //RX_TDDRC_DRC_GAIN +195 0x0020 //RX_FDEQ_SUBNUM +196 0x4848 //RX_FDEQ_GAIN_0 +197 0x4848 //RX_FDEQ_GAIN_1 +198 0x4848 //RX_FDEQ_GAIN_2 +199 0x4848 //RX_FDEQ_GAIN_3 +200 0x4848 //RX_FDEQ_GAIN_4 +201 0x4848 //RX_FDEQ_GAIN_5 +202 0x4848 //RX_FDEQ_GAIN_6 +203 0x4848 //RX_FDEQ_GAIN_7 +204 0x4848 //RX_FDEQ_GAIN_8 +205 0x4848 //RX_FDEQ_GAIN_9 +206 0x4848 //RX_FDEQ_GAIN_10 +207 0x4848 //RX_FDEQ_GAIN_11 +208 0x4848 //RX_FDEQ_GAIN_12 +209 0x4848 //RX_FDEQ_GAIN_13 +210 0x4848 //RX_FDEQ_GAIN_14 +211 0x4848 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0202 //RX_FDEQ_BIN_0 +221 0x0203 //RX_FDEQ_BIN_1 +222 0x0304 //RX_FDEQ_BIN_2 +223 0x0405 //RX_FDEQ_BIN_3 +224 0x0607 //RX_FDEQ_BIN_4 +225 0x0809 //RX_FDEQ_BIN_5 +226 0x0A0B //RX_FDEQ_BIN_6 +227 0x0C0D //RX_FDEQ_BIN_7 +228 0x0E0F //RX_FDEQ_BIN_8 +229 0x1011 //RX_FDEQ_BIN_9 +230 0x1214 //RX_FDEQ_BIN_10 +231 0x1618 //RX_FDEQ_BIN_11 +232 0x1C1C //RX_FDEQ_BIN_12 +233 0x2020 //RX_FDEQ_BIN_13 +234 0x2020 //RX_FDEQ_BIN_14 +235 0x2011 //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x4000 //RX_FDEQ_RESRV_0 +245 0x0320 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0030 //RX_FDDRC_BAND_MARGIN_1 +248 0x0050 //RX_FDDRC_BAND_MARGIN_2 +249 0x0080 //RX_FDDRC_BAND_MARGIN_3 +250 0x0007 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x5000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x6400 //RX_FDDRC_THRD_3_2 +258 0x6400 //RX_FDDRC_THRD_3_3 +259 0x2000 //RX_FDDRC_SLANT_0_0 +260 0x2000 //RX_FDDRC_SLANT_0_1 +261 0x2000 //RX_FDDRC_SLANT_0_2 +262 0x2000 //RX_FDDRC_SLANT_0_3 +263 0x5333 //RX_FDDRC_SLANT_1_0 +264 0x5333 //RX_FDDRC_SLANT_1_1 +265 0x5333 //RX_FDDRC_SLANT_1_2 +266 0x5333 //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +286 0x0100 //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 +#VOL 4 +163 0x1000 //RX_TDDRC_ALPHA_UP_1 +164 0x1000 //RX_TDDRC_ALPHA_UP_2 +165 0x1000 //RX_TDDRC_ALPHA_UP_3 +166 0x1000 //RX_TDDRC_ALPHA_UP_4 +184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +190 0x7FFF //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +269 0x0000 //RX_TDDRC_THRD_0 +270 0x0000 //RX_TDDRC_THRD_1 +271 0x7FFF //RX_TDDRC_THRD_2 +272 0x7FFF //RX_TDDRC_THRD_3 +273 0x7FFF //RX_TDDRC_SLANT_0 +274 0x7FFF //RX_TDDRC_SLANT_1 +275 0x1000 //RX_TDDRC_ALPHA_UP_0 +276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x199A //RX_TDDRC_HMNC_GAIN +279 0x0001 //RX_TDDRC_SMT_FLAG +280 0x0CCD //RX_TDDRC_SMT_W +281 0x0155 //RX_TDDRC_DRC_GAIN +195 0x0020 //RX_FDEQ_SUBNUM +196 0x4848 //RX_FDEQ_GAIN_0 +197 0x4848 //RX_FDEQ_GAIN_1 +198 0x4848 //RX_FDEQ_GAIN_2 +199 0x4848 //RX_FDEQ_GAIN_3 +200 0x4848 //RX_FDEQ_GAIN_4 +201 0x4848 //RX_FDEQ_GAIN_5 +202 0x4848 //RX_FDEQ_GAIN_6 +203 0x4848 //RX_FDEQ_GAIN_7 +204 0x4848 //RX_FDEQ_GAIN_8 +205 0x4848 //RX_FDEQ_GAIN_9 +206 0x4848 //RX_FDEQ_GAIN_10 +207 0x4848 //RX_FDEQ_GAIN_11 +208 0x4848 //RX_FDEQ_GAIN_12 +209 0x4848 //RX_FDEQ_GAIN_13 +210 0x4848 //RX_FDEQ_GAIN_14 +211 0x4848 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0202 //RX_FDEQ_BIN_0 +221 0x0203 //RX_FDEQ_BIN_1 +222 0x0304 //RX_FDEQ_BIN_2 +223 0x0405 //RX_FDEQ_BIN_3 +224 0x0607 //RX_FDEQ_BIN_4 +225 0x0809 //RX_FDEQ_BIN_5 +226 0x0A0B //RX_FDEQ_BIN_6 +227 0x0C0D //RX_FDEQ_BIN_7 +228 0x0E0F //RX_FDEQ_BIN_8 +229 0x1011 //RX_FDEQ_BIN_9 +230 0x1214 //RX_FDEQ_BIN_10 +231 0x1618 //RX_FDEQ_BIN_11 +232 0x1C1C //RX_FDEQ_BIN_12 +233 0x2020 //RX_FDEQ_BIN_13 +234 0x2020 //RX_FDEQ_BIN_14 +235 0x2011 //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x4000 //RX_FDEQ_RESRV_0 +245 0x0320 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0030 //RX_FDDRC_BAND_MARGIN_1 +248 0x0050 //RX_FDDRC_BAND_MARGIN_2 +249 0x0080 //RX_FDDRC_BAND_MARGIN_3 +250 0x0007 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x5000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x6400 //RX_FDDRC_THRD_3_2 +258 0x6400 //RX_FDDRC_THRD_3_3 +259 0x2000 //RX_FDDRC_SLANT_0_0 +260 0x2000 //RX_FDDRC_SLANT_0_1 +261 0x2000 //RX_FDDRC_SLANT_0_2 +262 0x2000 //RX_FDDRC_SLANT_0_3 +263 0x5333 //RX_FDDRC_SLANT_1_0 +264 0x5333 //RX_FDDRC_SLANT_1_1 +265 0x5333 //RX_FDDRC_SLANT_1_2 +266 0x5333 //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +286 0x0100 //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 +#VOL 5 +163 0x1000 //RX_TDDRC_ALPHA_UP_1 +164 0x1000 //RX_TDDRC_ALPHA_UP_2 +165 0x1000 //RX_TDDRC_ALPHA_UP_3 +166 0x1000 //RX_TDDRC_ALPHA_UP_4 +184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +190 0x7FFF //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +269 0x0000 //RX_TDDRC_THRD_0 +270 0x0000 //RX_TDDRC_THRD_1 +271 0x7FFF //RX_TDDRC_THRD_2 +272 0x7FFF //RX_TDDRC_THRD_3 +273 0x7FFF //RX_TDDRC_SLANT_0 +274 0x7FFF //RX_TDDRC_SLANT_1 +275 0x1000 //RX_TDDRC_ALPHA_UP_0 +276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x199A //RX_TDDRC_HMNC_GAIN +279 0x0001 //RX_TDDRC_SMT_FLAG +280 0x0CCD //RX_TDDRC_SMT_W +281 0x0155 //RX_TDDRC_DRC_GAIN +195 0x0020 //RX_FDEQ_SUBNUM +196 0x4848 //RX_FDEQ_GAIN_0 +197 0x4848 //RX_FDEQ_GAIN_1 +198 0x4848 //RX_FDEQ_GAIN_2 +199 0x4848 //RX_FDEQ_GAIN_3 +200 0x4848 //RX_FDEQ_GAIN_4 +201 0x4848 //RX_FDEQ_GAIN_5 +202 0x4848 //RX_FDEQ_GAIN_6 +203 0x4848 //RX_FDEQ_GAIN_7 +204 0x4848 //RX_FDEQ_GAIN_8 +205 0x4848 //RX_FDEQ_GAIN_9 +206 0x4848 //RX_FDEQ_GAIN_10 +207 0x4848 //RX_FDEQ_GAIN_11 +208 0x4848 //RX_FDEQ_GAIN_12 +209 0x4848 //RX_FDEQ_GAIN_13 +210 0x4848 //RX_FDEQ_GAIN_14 +211 0x4848 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0202 //RX_FDEQ_BIN_0 +221 0x0203 //RX_FDEQ_BIN_1 +222 0x0304 //RX_FDEQ_BIN_2 +223 0x0405 //RX_FDEQ_BIN_3 +224 0x0607 //RX_FDEQ_BIN_4 +225 0x0809 //RX_FDEQ_BIN_5 +226 0x0A0B //RX_FDEQ_BIN_6 +227 0x0C0D //RX_FDEQ_BIN_7 +228 0x0E0F //RX_FDEQ_BIN_8 +229 0x1011 //RX_FDEQ_BIN_9 +230 0x1214 //RX_FDEQ_BIN_10 +231 0x1618 //RX_FDEQ_BIN_11 +232 0x1C1C //RX_FDEQ_BIN_12 +233 0x2020 //RX_FDEQ_BIN_13 +234 0x2020 //RX_FDEQ_BIN_14 +235 0x2011 //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x4000 //RX_FDEQ_RESRV_0 +245 0x0320 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0030 //RX_FDDRC_BAND_MARGIN_1 +248 0x0050 //RX_FDDRC_BAND_MARGIN_2 +249 0x0080 //RX_FDDRC_BAND_MARGIN_3 +250 0x0007 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x5000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x6400 //RX_FDDRC_THRD_3_2 +258 0x6400 //RX_FDDRC_THRD_3_3 +259 0x2000 //RX_FDDRC_SLANT_0_0 +260 0x2000 //RX_FDDRC_SLANT_0_1 +261 0x2000 //RX_FDDRC_SLANT_0_2 +262 0x2000 //RX_FDDRC_SLANT_0_3 +263 0x5333 //RX_FDDRC_SLANT_1_0 +264 0x5333 //RX_FDDRC_SLANT_1_1 +265 0x5333 //RX_FDDRC_SLANT_1_2 +266 0x5333 //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +286 0x0100 //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 +#VOL 6 +163 0x1000 //RX_TDDRC_ALPHA_UP_1 +164 0x1000 //RX_TDDRC_ALPHA_UP_2 +165 0x1000 //RX_TDDRC_ALPHA_UP_3 +166 0x1000 //RX_TDDRC_ALPHA_UP_4 +184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +190 0x7FFF //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +269 0x0000 //RX_TDDRC_THRD_0 +270 0x0000 //RX_TDDRC_THRD_1 +271 0x7FFF //RX_TDDRC_THRD_2 +272 0x7FFF //RX_TDDRC_THRD_3 +273 0x7FFF //RX_TDDRC_SLANT_0 +274 0x7FFF //RX_TDDRC_SLANT_1 +275 0x1000 //RX_TDDRC_ALPHA_UP_0 +276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x199A //RX_TDDRC_HMNC_GAIN +279 0x0001 //RX_TDDRC_SMT_FLAG +280 0x0CCD //RX_TDDRC_SMT_W +281 0x0155 //RX_TDDRC_DRC_GAIN +195 0x0020 //RX_FDEQ_SUBNUM +196 0x4848 //RX_FDEQ_GAIN_0 +197 0x4848 //RX_FDEQ_GAIN_1 +198 0x4848 //RX_FDEQ_GAIN_2 +199 0x4848 //RX_FDEQ_GAIN_3 +200 0x4848 //RX_FDEQ_GAIN_4 +201 0x4848 //RX_FDEQ_GAIN_5 +202 0x4848 //RX_FDEQ_GAIN_6 +203 0x4848 //RX_FDEQ_GAIN_7 +204 0x4848 //RX_FDEQ_GAIN_8 +205 0x4848 //RX_FDEQ_GAIN_9 +206 0x4848 //RX_FDEQ_GAIN_10 +207 0x4848 //RX_FDEQ_GAIN_11 +208 0x4848 //RX_FDEQ_GAIN_12 +209 0x4848 //RX_FDEQ_GAIN_13 +210 0x4848 //RX_FDEQ_GAIN_14 +211 0x4848 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0202 //RX_FDEQ_BIN_0 +221 0x0203 //RX_FDEQ_BIN_1 +222 0x0304 //RX_FDEQ_BIN_2 +223 0x0405 //RX_FDEQ_BIN_3 +224 0x0607 //RX_FDEQ_BIN_4 +225 0x0809 //RX_FDEQ_BIN_5 +226 0x0A0B //RX_FDEQ_BIN_6 +227 0x0C0D //RX_FDEQ_BIN_7 +228 0x0E0F //RX_FDEQ_BIN_8 +229 0x1011 //RX_FDEQ_BIN_9 +230 0x1214 //RX_FDEQ_BIN_10 +231 0x1618 //RX_FDEQ_BIN_11 +232 0x1C1C //RX_FDEQ_BIN_12 +233 0x2020 //RX_FDEQ_BIN_13 +234 0x2020 //RX_FDEQ_BIN_14 +235 0x2011 //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x4000 //RX_FDEQ_RESRV_0 +245 0x0320 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0030 //RX_FDDRC_BAND_MARGIN_1 +248 0x0050 //RX_FDDRC_BAND_MARGIN_2 +249 0x0080 //RX_FDDRC_BAND_MARGIN_3 +250 0x0007 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x5000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x6400 //RX_FDDRC_THRD_3_2 +258 0x6400 //RX_FDDRC_THRD_3_3 +259 0x2000 //RX_FDDRC_SLANT_0_0 +260 0x2000 //RX_FDDRC_SLANT_0_1 +261 0x2000 //RX_FDDRC_SLANT_0_2 +262 0x2000 //RX_FDDRC_SLANT_0_3 +263 0x5333 //RX_FDDRC_SLANT_1_0 +264 0x5333 //RX_FDDRC_SLANT_1_1 +265 0x5333 //RX_FDDRC_SLANT_1_2 +266 0x5333 //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +286 0x0100 //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 #CASE_NAME BLUETOOTH-BTNB_NREC-VOICE_GENERIC-NB -#PARAM_TYPE TX+RX -#TOTAL_CUSTOM_STEP 7 +#PARAM_MODE Full +#PARAM_TYPE TX+2RX +#TOTAL_CUSTOM_STEP 7+7 #TX 0 0x0008 //TX_OPERATION_MODE_0 1 0x0008 //TX_OPERATION_MODE_1 @@ -16035,20 +24289,20 @@ 248 0xF400 //TX_THR_SN_EST_6 249 0xF600 //TX_THR_SN_EST_7 250 0x0000 //TX_DELTA_THR_SN_EST_0 -251 0x0000 //TX_DELTA_THR_SN_EST_1 +251 0x0200 //TX_DELTA_THR_SN_EST_1 252 0x0200 //TX_DELTA_THR_SN_EST_2 253 0x0200 //TX_DELTA_THR_SN_EST_3 254 0x0200 //TX_DELTA_THR_SN_EST_4 255 0x0200 //TX_DELTA_THR_SN_EST_5 -256 0x0200 //TX_DELTA_THR_SN_EST_6 +256 0x0000 //TX_DELTA_THR_SN_EST_6 257 0x0200 //TX_DELTA_THR_SN_EST_7 258 0x6000 //TX_LAMBDA_NN_EST_0 -259 0x6000 //TX_LAMBDA_NN_EST_1 +259 0x4000 //TX_LAMBDA_NN_EST_1 260 0x4000 //TX_LAMBDA_NN_EST_2 261 0x4000 //TX_LAMBDA_NN_EST_3 262 0x4000 //TX_LAMBDA_NN_EST_4 263 0x4000 //TX_LAMBDA_NN_EST_5 -264 0x4000 //TX_LAMBDA_NN_EST_6 +264 0x6000 //TX_LAMBDA_NN_EST_6 265 0x4000 //TX_LAMBDA_NN_EST_7 266 0x0400 //TX_N_SN_EST 267 0x001E //TX_INBEAM_T @@ -16066,16 +24320,16 @@ 279 0x1000 //TX_B_POST_FLT_0 280 0x1000 //TX_B_POST_FLT_1 281 0x000F //TX_NS_LVL_CTRL_0 -282 0x000F //TX_NS_LVL_CTRL_1 -283 0x0011 //TX_NS_LVL_CTRL_2 +282 0x0011 //TX_NS_LVL_CTRL_1 +283 0x000F //TX_NS_LVL_CTRL_2 284 0x000F //TX_NS_LVL_CTRL_3 285 0x000F //TX_NS_LVL_CTRL_4 286 0x000F //TX_NS_LVL_CTRL_5 287 0x000F //TX_NS_LVL_CTRL_6 288 0x0011 //TX_NS_LVL_CTRL_7 289 0x000C //TX_MIN_GAIN_S_0 -290 0x000C //TX_MIN_GAIN_S_1 -291 0x000F //TX_MIN_GAIN_S_2 +290 0x000F //TX_MIN_GAIN_S_1 +291 0x000C //TX_MIN_GAIN_S_2 292 0x000C //TX_MIN_GAIN_S_3 293 0x000C //TX_MIN_GAIN_S_4 294 0x000C //TX_MIN_GAIN_S_5 @@ -16099,12 +24353,12 @@ 312 0x7FFF //TX_A_POST_FILT_0 313 0x2000 //TX_A_POST_FILT_1 314 0x4000 //TX_A_POST_FILT_S_0 -315 0x4000 //TX_A_POST_FILT_S_1 +315 0x5000 //TX_A_POST_FILT_S_1 316 0x5000 //TX_A_POST_FILT_S_2 317 0x5000 //TX_A_POST_FILT_S_3 318 0x5000 //TX_A_POST_FILT_S_4 319 0x5000 //TX_A_POST_FILT_S_5 -320 0x5000 //TX_A_POST_FILT_S_6 +320 0x4000 //TX_A_POST_FILT_S_6 321 0x5000 //TX_A_POST_FILT_S_7 322 0x1000 //TX_B_POST_FILT_0 323 0x1000 //TX_B_POST_FILT_1 @@ -16164,10 +24418,10 @@ 377 0x7FFF //TX_NOISE_TH_5_4 378 0x044C //TX_NOISE_TH_6 379 0x0014 //TX_MINENOISE_TH -380 0x4000 //TX_MINENOISE_MIC0_TH_MTS -381 0xFFEE //TX_MINENOISE_MIC0_TH_EXP -382 0x6000 //TX_MINENOISE_MIC0_S_TH_MTS -383 0xFFF3 //TX_MINENOISE_MIC0_S_TH_EXP +380 0x4000 //TX_MORENS_TFMASK_TH +381 0xFFEE //TX_DRC_QUIET_FLOOR +382 0x6000 //TX_RATIODTL_CUT_TH +383 0xFFF3 //TX_DT_CUT_K1 384 0x0666 //TX_OUT_ENER_S_TH_CLEAN 385 0x0666 //TX_OUT_ENER_S_TH_LESSCLEAN 386 0x0333 //TX_OUT_ENER_S_TH_NOISY @@ -16175,15 +24429,15 @@ 388 0x0333 //TX_OUT_ENER_TH_SPEECH 389 0x2000 //TX_SN_NPB_GAIN 390 0x0000 //TX_NN_NPB_GAIN -391 0x0000 //TX_CSX_ALPHA_0 -392 0x0000 //TX_CSX_ALPHA_1 -393 0x0000 //TX_CSX_ALPHA_2 -394 0x0000 //TX_CSX_ALPHA_3 -395 0x0800 //TX_MU_ARSP_EST -396 0x00C8 //TX_P_OUTBEAM_MIN_TH +391 0x0000 //TX_POST_MASK_SUP_HSNE +392 0x0000 //TX_TAIL_DET_TH +393 0x0000 //TX_B_LESSCUT_RTO_WTA +394 0x0000 //TX_MEL_G_R +395 0x0800 //TX_SUPHIGH_TH +396 0x00C8 //TX_MASK_G_R 397 0x0002 //TX_EXTRA_NS_L -398 0x0800 //TX_EXTRA_NS_A -399 0x0005 //TX_VR_NOISE_FLOOR_TH +398 0x0800 //TX_C_POST_FLT_MASK +399 0x0005 //TX_A_POST_FLT_WNS 400 0x0148 //TX_MIN_G_LOW300HZ 401 0x0002 //TX_MAXLEVEL_CNG 402 0x00B4 //TX_STN_NOISE_TH @@ -16298,16 +24552,16 @@ 511 0x6666 //TX_MIC_TO_BFGAIN 512 0x0000 //TX_MICTOBFGAIN0 513 0x0000 //TX_FASTMUE_TH -514 0x0000 //TX_DERVB_LEN_0 -515 0x0000 //TX_DERVB_LEN_1 -516 0x0000 //TX_RHO_DERVB -517 0x0000 //TX_MIC_INDX_DERVB -518 0x0000 //TX_MU_DERVB -519 0x0000 //TX_DR_RESRV_0 -520 0x0000 //TX_DR_RESRV_1 -521 0x0000 //TX_DR_RESRV_2 -522 0x0000 //TX_DR_RESRV_3 -523 0x0000 //TX_DR_RESRV_4 +514 0x0000 //TX_DEREVERB_LF_MU +515 0x0000 //TX_DEREVERB_HF_MU +516 0x0000 //TX_DEREVERB_DELAY +517 0x0000 //TX_DEREVERB_COEF_LEN +518 0x0000 //TX_DEREVERB_DNR +519 0x0000 //TX_DEREVERB_ALPHA +520 0x0000 //TX_DEREVERB_BETA +521 0x0000 //TX_GSC_RTOL_TH +522 0x0000 //TX_GSC_RTOH_TH +523 0x0000 //TX_WIDE2_MEANHTH 524 0x0000 //TX_DR_RESRV_5 525 0x0000 //TX_DR_RESRV_6 526 0x0000 //TX_DR_RESRV_7 @@ -16681,8 +24935,73 @@ 894 0xC000 //TX_FASTNS_SSA_THHFL 895 0xCCCC //TX_FASTNS_SSA_THLFH 896 0xD999 //TX_FASTNS_SSA_THHFH +897 0x0000 //TX_SENDFUNC_REG_MICMUTE +898 0x0000 //TX_SENDFUNC_REG_MICMUTE1 +899 0x0000 //TX_MICMUTE_RATIO_THR +900 0x0000 //TX_MICMUTE_AMP_THR +901 0x0000 //TX_MICMUTE_HPF_IND +902 0x0000 //TX_MICMUTE_LOG_EYR_TH +903 0x0000 //TX_MICMUTE_CVG_TIME +904 0x0000 //TX_MICMUTE_RELEASE_TIME +905 0x0000 //TX_MIC_VOLUME_MIC0MUTE +906 0x0000 //TX_MICMUTE_EPD_OFFSET_0 +907 0x0000 //TX_MICMUTE_FRQ_AEC_L +908 0x0000 //TX_MICMUTE_EAD_THR +909 0x0000 //TX_MICMUTE_LAMBDA_CB_NLE +910 0x0000 //TX_MICMUTE_LAMBDA_RE_EST +911 0x0000 //TX_DTD_THR1_MICMUTE_0 +912 0x0000 //TX_DTD_THR1_MICMUTE_1 +913 0x0000 //TX_DTD_THR1_MICMUTE_2 +914 0x0000 //TX_DTD_THR1_MICMUTE_3 +915 0x0000 //TX_DTD_THR2_MICMUTE_0 +916 0x0000 //TX_MICMUTE_MIN_EQ_RE_EST_0 +917 0x0000 //TX_MICMUTE_MIN_EQ_RE_EST_1 +918 0x0000 //TX_MICMUTE_MIN_EQ_RE_EST_2 +919 0x0000 //TX_MICMUTE_MIN_EQ_RE_EST_3 +920 0x0000 //TX_MICMUTE_MIN_EQ_RE_EST_4 +921 0x0000 //TX_MICMUTE_C_POST_FLT +922 0x0000 //TX_MICMUTE_DT_CUT_K +923 0x0000 //TX_MICMUTE_DT_CUT_THR +924 0x0000 //TX_MICMUTE_DT_CUT_K2 +925 0x0000 //TX_MICMUTE_DT_CUT_THR2 +926 0x0000 //TX_MICMUTE_DT2_HOLD_N +927 0x0000 //TX_MICMUTE_RATIODTH_THCUT +928 0x0000 //TX_MICMUTE_B_POST_FLT_ECHOL +929 0x0000 //TX_MICMUTE_B_POST_FLT_ECHOH +930 0x0000 //TX_MICMUTE_C_POST_FLT_MASK +931 0x0000 //TX_MICMUTE_RATIODTL_CUT_TH +932 0x0000 //TX_MICMUTE_DT_CUT_K1 +933 0x0000 //TX_MICMUTE_N2_SN_EST +934 0x0000 //TX_MICMUTE_THR_SN_EST_0 +935 0x0000 //TX_MICMUTE_MIN_G_CTRL_0 +936 0x0000 //TX_MICMUTE_A_POST_FILT_S_0 +937 0x0000 //TX_MICMUTE_B_POST_FILT_0 +938 0x0000 //TX_MIC1RUB_AMP_THR +939 0x0000 //TX_MIC1MUTE_RATIO_THR +940 0x0000 //TX_MIC1MUTE_AMP_THR +941 0x0000 //TX_MIC1MUTE_CVG_TIME +942 0x0000 //TX_MIC1MUTE_RELEASE_TIME +943 0x0000 //TX_AMS_RESRV_01 +944 0x0000 //TX_AMS_RESRV_02 +945 0x0000 //TX_AMS_RESRV_03 +946 0x0000 //TX_AMS_RESRV_04 +947 0x0000 //TX_AMS_RESRV_05 +948 0x0000 //TX_AMS_RESRV_06 +949 0x0000 //TX_AMS_RESRV_07 +950 0x0000 //TX_AMS_RESRV_08 +951 0x0000 //TX_AMS_RESRV_09 +952 0x0000 //TX_AMS_RESRV_10 +953 0x0000 //TX_AMS_RESRV_11 +954 0x0000 //TX_AMS_RESRV_12 +955 0x0000 //TX_AMS_RESRV_13 +956 0x0000 //TX_AMS_RESRV_14 +957 0x0000 //TX_AMS_RESRV_15 +958 0x0000 //TX_AMS_RESRV_16 +959 0x0000 //TX_AMS_RESRV_17 +960 0x0000 //TX_AMS_RESRV_18 +961 0x0000 //TX_AMS_RESRV_19 #RX -0 0x006C //RX_RECVFUNC_MODE_0 +0 0x206C //RX_RECVFUNC_MODE_0 1 0x0000 //RX_RECVFUNC_MODE_1 2 0x0000 //RX_SAMPLINGFREQ_SIG 3 0x0000 //RX_SAMPLINGFREQ_PROC @@ -17532,10 +25851,862 @@ 110 0x0000 //RX_FDDRC_RESRV_0 129 0x0100 //RX_SPK_VOL 130 0x0000 //RX_VOL_RESRV_0 +#RX 2 +157 0x206C //RX_RECVFUNC_MODE_0 +158 0x0000 //RX_RECVFUNC_MODE_1 +159 0x0000 //RX_SAMPLINGFREQ_SIG +160 0x0000 //RX_SAMPLINGFREQ_PROC +161 0x000A //RX_FRAME_SZ +162 0x0000 //RX_DELAY_OPT +163 0x3000 //RX_TDDRC_ALPHA_UP_1 +164 0x3000 //RX_TDDRC_ALPHA_UP_2 +165 0x3000 //RX_TDDRC_ALPHA_UP_3 +166 0x3000 //RX_TDDRC_ALPHA_UP_4 +167 0x0800 //RX_PGA +168 0x7FFF //RX_A_HP +169 0x0000 //RX_B_PE +170 0x3800 //RX_THR_PITCH_DET_0 +171 0x3000 //RX_THR_PITCH_DET_1 +172 0x2800 //RX_THR_PITCH_DET_2 +173 0x0008 //RX_PITCH_BFR_LEN +174 0x0003 //RX_SBD_PITCH_DET +175 0x0100 //RX_PP_RESRV_0 +176 0x0020 //RX_PP_RESRV_1 +177 0x0600 //RX_N_SN_EST +178 0x000C //RX_N2_SN_EST +179 0x0010 //RX_NS_LVL_CTRL +180 0xF800 //RX_THR_SN_EST +181 0x7CCD //RX_LAMBDA_PFILT +182 0x000A //RX_FENS_RESRV_0 +183 0x0190 //RX_FENS_RESRV_1 +184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +187 0x0002 //RX_EXTRA_NS_L +188 0x0800 //RX_EXTRA_NS_A +189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +190 0x7FFF //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +192 0x199A //RX_A_POST_FLT +193 0x0000 //RX_LMT_THRD +194 0x4000 //RX_LMT_ALPHA +195 0x0014 //RX_FDEQ_SUBNUM +196 0x4848 //RX_FDEQ_GAIN_0 +197 0x4848 //RX_FDEQ_GAIN_1 +198 0x4848 //RX_FDEQ_GAIN_2 +199 0x4848 //RX_FDEQ_GAIN_3 +200 0x4848 //RX_FDEQ_GAIN_4 +201 0x4848 //RX_FDEQ_GAIN_5 +202 0x4444 //RX_FDEQ_GAIN_6 +203 0x4040 //RX_FDEQ_GAIN_7 +204 0x4040 //RX_FDEQ_GAIN_8 +205 0x4040 //RX_FDEQ_GAIN_9 +206 0x4848 //RX_FDEQ_GAIN_10 +207 0x4848 //RX_FDEQ_GAIN_11 +208 0x4848 //RX_FDEQ_GAIN_12 +209 0x4848 //RX_FDEQ_GAIN_13 +210 0x4848 //RX_FDEQ_GAIN_14 +211 0x4848 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0202 //RX_FDEQ_BIN_0 +221 0x0203 //RX_FDEQ_BIN_1 +222 0x0303 //RX_FDEQ_BIN_2 +223 0x0304 //RX_FDEQ_BIN_3 +224 0x0405 //RX_FDEQ_BIN_4 +225 0x0506 //RX_FDEQ_BIN_5 +226 0x0708 //RX_FDEQ_BIN_6 +227 0x090A //RX_FDEQ_BIN_7 +228 0x0B0C //RX_FDEQ_BIN_8 +229 0x0D0E //RX_FDEQ_BIN_9 +230 0x0000 //RX_FDEQ_BIN_10 +231 0x0000 //RX_FDEQ_BIN_11 +232 0x0000 //RX_FDEQ_BIN_12 +233 0x0000 //RX_FDEQ_BIN_13 +234 0x0000 //RX_FDEQ_BIN_14 +235 0x0000 //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x4000 //RX_FDEQ_RESRV_0 +245 0x0320 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0030 //RX_FDDRC_BAND_MARGIN_1 +248 0x0050 //RX_FDDRC_BAND_MARGIN_2 +249 0x0080 //RX_FDDRC_BAND_MARGIN_3 +250 0x0007 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x5000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x6400 //RX_FDDRC_THRD_3_2 +258 0x6400 //RX_FDDRC_THRD_3_3 +259 0x2000 //RX_FDDRC_SLANT_0_0 +260 0x2000 //RX_FDDRC_SLANT_0_1 +261 0x2000 //RX_FDDRC_SLANT_0_2 +262 0x2000 //RX_FDDRC_SLANT_0_3 +263 0x5333 //RX_FDDRC_SLANT_1_0 +264 0x5333 //RX_FDDRC_SLANT_1_1 +265 0x5333 //RX_FDDRC_SLANT_1_2 +266 0x5333 //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +268 0x0000 //RX_FILTINDX +269 0x0000 //RX_TDDRC_THRD_0 +270 0x0000 //RX_TDDRC_THRD_1 +271 0x7FFF //RX_TDDRC_THRD_2 +272 0x7FFF //RX_TDDRC_THRD_3 +273 0x7FFF //RX_TDDRC_SLANT_0 +274 0x7EB8 //RX_TDDRC_SLANT_1 +275 0x3000 //RX_TDDRC_ALPHA_UP_0 +276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x199A //RX_TDDRC_HMNC_GAIN +279 0x0001 //RX_TDDRC_SMT_FLAG +280 0x0CCD //RX_TDDRC_SMT_W +281 0x017F //RX_TDDRC_DRC_GAIN +282 0x7C00 //RX_LAMBDA_PKA_FP +283 0x2000 //RX_TPKA_FP +284 0x2000 //RX_MIN_G_FP +285 0x0080 //RX_MAX_G_FP +286 0x0100 //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 +288 0x0000 //RX_MAXLEVEL_CNG +289 0x3000 //RX_BWE_UV_TH +290 0x3000 //RX_BWE_UV_TH2 +291 0x1800 //RX_BWE_UV_TH3 +292 0x1000 //RX_BWE_V_TH +293 0x04CD //RX_BWE_GAIN1_V_TH1 +294 0x0F33 //RX_BWE_GAIN1_V_TH2 +295 0x7333 //RX_BWE_UV_EQ +296 0x199A //RX_BWE_V_EQ +297 0x7333 //RX_BWE_TONE_TH +298 0x0004 //RX_BWE_UV_HOLD_T +299 0x6CCD //RX_BWE_GAIN2_ALPHA +300 0x799A //RX_BWE_GAIN3_ALPHA +301 0x001E //RX_BWE_CUTOFF +302 0x3000 //RX_BWE_GAINFILL +303 0x3200 //RX_BWE_MAXTH_TONE +304 0x2000 //RX_BWE_EQ_0 +305 0x2000 //RX_BWE_EQ_1 +306 0x2000 //RX_BWE_EQ_2 +307 0x2000 //RX_BWE_EQ_3 +308 0x2000 //RX_BWE_EQ_4 +309 0x2000 //RX_BWE_EQ_5 +310 0x2000 //RX_BWE_EQ_6 +311 0x0000 //RX_BWE_RESRV_0 +312 0x0000 //RX_BWE_RESRV_1 +313 0x0000 //RX_BWE_RESRV_2 +#VOL 0 +163 0x3000 //RX_TDDRC_ALPHA_UP_1 +164 0x3000 //RX_TDDRC_ALPHA_UP_2 +165 0x3000 //RX_TDDRC_ALPHA_UP_3 +166 0x3000 //RX_TDDRC_ALPHA_UP_4 +184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +190 0x7FFF //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +269 0x0000 //RX_TDDRC_THRD_0 +270 0x0000 //RX_TDDRC_THRD_1 +271 0x7FFF //RX_TDDRC_THRD_2 +272 0x7FFF //RX_TDDRC_THRD_3 +273 0x7FFF //RX_TDDRC_SLANT_0 +274 0x7EB8 //RX_TDDRC_SLANT_1 +275 0x3000 //RX_TDDRC_ALPHA_UP_0 +276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x199A //RX_TDDRC_HMNC_GAIN +279 0x0001 //RX_TDDRC_SMT_FLAG +280 0x0CCD //RX_TDDRC_SMT_W +281 0x017F //RX_TDDRC_DRC_GAIN +195 0x0014 //RX_FDEQ_SUBNUM +196 0x4848 //RX_FDEQ_GAIN_0 +197 0x4848 //RX_FDEQ_GAIN_1 +198 0x4848 //RX_FDEQ_GAIN_2 +199 0x4848 //RX_FDEQ_GAIN_3 +200 0x4848 //RX_FDEQ_GAIN_4 +201 0x4848 //RX_FDEQ_GAIN_5 +202 0x4444 //RX_FDEQ_GAIN_6 +203 0x4040 //RX_FDEQ_GAIN_7 +204 0x4040 //RX_FDEQ_GAIN_8 +205 0x4040 //RX_FDEQ_GAIN_9 +206 0x4848 //RX_FDEQ_GAIN_10 +207 0x4848 //RX_FDEQ_GAIN_11 +208 0x4848 //RX_FDEQ_GAIN_12 +209 0x4848 //RX_FDEQ_GAIN_13 +210 0x4848 //RX_FDEQ_GAIN_14 +211 0x4848 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0202 //RX_FDEQ_BIN_0 +221 0x0203 //RX_FDEQ_BIN_1 +222 0x0303 //RX_FDEQ_BIN_2 +223 0x0304 //RX_FDEQ_BIN_3 +224 0x0405 //RX_FDEQ_BIN_4 +225 0x0506 //RX_FDEQ_BIN_5 +226 0x0708 //RX_FDEQ_BIN_6 +227 0x090A //RX_FDEQ_BIN_7 +228 0x0B0C //RX_FDEQ_BIN_8 +229 0x0D0E //RX_FDEQ_BIN_9 +230 0x0000 //RX_FDEQ_BIN_10 +231 0x0000 //RX_FDEQ_BIN_11 +232 0x0000 //RX_FDEQ_BIN_12 +233 0x0000 //RX_FDEQ_BIN_13 +234 0x0000 //RX_FDEQ_BIN_14 +235 0x0000 //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x4000 //RX_FDEQ_RESRV_0 +245 0x0320 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0030 //RX_FDDRC_BAND_MARGIN_1 +248 0x0050 //RX_FDDRC_BAND_MARGIN_2 +249 0x0080 //RX_FDDRC_BAND_MARGIN_3 +250 0x0007 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x5000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x6400 //RX_FDDRC_THRD_3_2 +258 0x6400 //RX_FDDRC_THRD_3_3 +259 0x2000 //RX_FDDRC_SLANT_0_0 +260 0x2000 //RX_FDDRC_SLANT_0_1 +261 0x2000 //RX_FDDRC_SLANT_0_2 +262 0x2000 //RX_FDDRC_SLANT_0_3 +263 0x5333 //RX_FDDRC_SLANT_1_0 +264 0x5333 //RX_FDDRC_SLANT_1_1 +265 0x5333 //RX_FDDRC_SLANT_1_2 +266 0x5333 //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +286 0x0100 //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 +#VOL 1 +163 0x3000 //RX_TDDRC_ALPHA_UP_1 +164 0x3000 //RX_TDDRC_ALPHA_UP_2 +165 0x3000 //RX_TDDRC_ALPHA_UP_3 +166 0x3000 //RX_TDDRC_ALPHA_UP_4 +184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +190 0x7FFF //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +269 0x0000 //RX_TDDRC_THRD_0 +270 0x0000 //RX_TDDRC_THRD_1 +271 0x7FFF //RX_TDDRC_THRD_2 +272 0x7FFF //RX_TDDRC_THRD_3 +273 0x7FFF //RX_TDDRC_SLANT_0 +274 0x7EB8 //RX_TDDRC_SLANT_1 +275 0x3000 //RX_TDDRC_ALPHA_UP_0 +276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x199A //RX_TDDRC_HMNC_GAIN +279 0x0001 //RX_TDDRC_SMT_FLAG +280 0x0CCD //RX_TDDRC_SMT_W +281 0x017F //RX_TDDRC_DRC_GAIN +195 0x0014 //RX_FDEQ_SUBNUM +196 0x4848 //RX_FDEQ_GAIN_0 +197 0x4848 //RX_FDEQ_GAIN_1 +198 0x4848 //RX_FDEQ_GAIN_2 +199 0x4848 //RX_FDEQ_GAIN_3 +200 0x4848 //RX_FDEQ_GAIN_4 +201 0x4848 //RX_FDEQ_GAIN_5 +202 0x4444 //RX_FDEQ_GAIN_6 +203 0x4040 //RX_FDEQ_GAIN_7 +204 0x4040 //RX_FDEQ_GAIN_8 +205 0x4040 //RX_FDEQ_GAIN_9 +206 0x4848 //RX_FDEQ_GAIN_10 +207 0x4848 //RX_FDEQ_GAIN_11 +208 0x4848 //RX_FDEQ_GAIN_12 +209 0x4848 //RX_FDEQ_GAIN_13 +210 0x4848 //RX_FDEQ_GAIN_14 +211 0x4848 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0202 //RX_FDEQ_BIN_0 +221 0x0203 //RX_FDEQ_BIN_1 +222 0x0303 //RX_FDEQ_BIN_2 +223 0x0304 //RX_FDEQ_BIN_3 +224 0x0405 //RX_FDEQ_BIN_4 +225 0x0506 //RX_FDEQ_BIN_5 +226 0x0708 //RX_FDEQ_BIN_6 +227 0x090A //RX_FDEQ_BIN_7 +228 0x0B0C //RX_FDEQ_BIN_8 +229 0x0D0E //RX_FDEQ_BIN_9 +230 0x0000 //RX_FDEQ_BIN_10 +231 0x0000 //RX_FDEQ_BIN_11 +232 0x0000 //RX_FDEQ_BIN_12 +233 0x0000 //RX_FDEQ_BIN_13 +234 0x0000 //RX_FDEQ_BIN_14 +235 0x0000 //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x4000 //RX_FDEQ_RESRV_0 +245 0x0320 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0030 //RX_FDDRC_BAND_MARGIN_1 +248 0x0050 //RX_FDDRC_BAND_MARGIN_2 +249 0x0080 //RX_FDDRC_BAND_MARGIN_3 +250 0x0007 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x5000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x6400 //RX_FDDRC_THRD_3_2 +258 0x6400 //RX_FDDRC_THRD_3_3 +259 0x2000 //RX_FDDRC_SLANT_0_0 +260 0x2000 //RX_FDDRC_SLANT_0_1 +261 0x2000 //RX_FDDRC_SLANT_0_2 +262 0x2000 //RX_FDDRC_SLANT_0_3 +263 0x5333 //RX_FDDRC_SLANT_1_0 +264 0x5333 //RX_FDDRC_SLANT_1_1 +265 0x5333 //RX_FDDRC_SLANT_1_2 +266 0x5333 //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +286 0x0100 //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 +#VOL 2 +163 0x3000 //RX_TDDRC_ALPHA_UP_1 +164 0x3000 //RX_TDDRC_ALPHA_UP_2 +165 0x3000 //RX_TDDRC_ALPHA_UP_3 +166 0x3000 //RX_TDDRC_ALPHA_UP_4 +184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +190 0x7FFF //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +269 0x0000 //RX_TDDRC_THRD_0 +270 0x0000 //RX_TDDRC_THRD_1 +271 0x7FFF //RX_TDDRC_THRD_2 +272 0x7FFF //RX_TDDRC_THRD_3 +273 0x7FFF //RX_TDDRC_SLANT_0 +274 0x7EB8 //RX_TDDRC_SLANT_1 +275 0x3000 //RX_TDDRC_ALPHA_UP_0 +276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x199A //RX_TDDRC_HMNC_GAIN +279 0x0001 //RX_TDDRC_SMT_FLAG +280 0x0CCD //RX_TDDRC_SMT_W +281 0x017F //RX_TDDRC_DRC_GAIN +195 0x0014 //RX_FDEQ_SUBNUM +196 0x4848 //RX_FDEQ_GAIN_0 +197 0x4848 //RX_FDEQ_GAIN_1 +198 0x4848 //RX_FDEQ_GAIN_2 +199 0x4848 //RX_FDEQ_GAIN_3 +200 0x4848 //RX_FDEQ_GAIN_4 +201 0x4848 //RX_FDEQ_GAIN_5 +202 0x4444 //RX_FDEQ_GAIN_6 +203 0x4040 //RX_FDEQ_GAIN_7 +204 0x4040 //RX_FDEQ_GAIN_8 +205 0x4040 //RX_FDEQ_GAIN_9 +206 0x4848 //RX_FDEQ_GAIN_10 +207 0x4848 //RX_FDEQ_GAIN_11 +208 0x4848 //RX_FDEQ_GAIN_12 +209 0x4848 //RX_FDEQ_GAIN_13 +210 0x4848 //RX_FDEQ_GAIN_14 +211 0x4848 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0202 //RX_FDEQ_BIN_0 +221 0x0203 //RX_FDEQ_BIN_1 +222 0x0303 //RX_FDEQ_BIN_2 +223 0x0304 //RX_FDEQ_BIN_3 +224 0x0405 //RX_FDEQ_BIN_4 +225 0x0506 //RX_FDEQ_BIN_5 +226 0x0708 //RX_FDEQ_BIN_6 +227 0x090A //RX_FDEQ_BIN_7 +228 0x0B0C //RX_FDEQ_BIN_8 +229 0x0D0E //RX_FDEQ_BIN_9 +230 0x0000 //RX_FDEQ_BIN_10 +231 0x0000 //RX_FDEQ_BIN_11 +232 0x0000 //RX_FDEQ_BIN_12 +233 0x0000 //RX_FDEQ_BIN_13 +234 0x0000 //RX_FDEQ_BIN_14 +235 0x0000 //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x4000 //RX_FDEQ_RESRV_0 +245 0x0320 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0030 //RX_FDDRC_BAND_MARGIN_1 +248 0x0050 //RX_FDDRC_BAND_MARGIN_2 +249 0x0080 //RX_FDDRC_BAND_MARGIN_3 +250 0x0007 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x5000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x6400 //RX_FDDRC_THRD_3_2 +258 0x6400 //RX_FDDRC_THRD_3_3 +259 0x2000 //RX_FDDRC_SLANT_0_0 +260 0x2000 //RX_FDDRC_SLANT_0_1 +261 0x2000 //RX_FDDRC_SLANT_0_2 +262 0x2000 //RX_FDDRC_SLANT_0_3 +263 0x5333 //RX_FDDRC_SLANT_1_0 +264 0x5333 //RX_FDDRC_SLANT_1_1 +265 0x5333 //RX_FDDRC_SLANT_1_2 +266 0x5333 //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +286 0x0100 //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 +#VOL 3 +163 0x3000 //RX_TDDRC_ALPHA_UP_1 +164 0x3000 //RX_TDDRC_ALPHA_UP_2 +165 0x3000 //RX_TDDRC_ALPHA_UP_3 +166 0x3000 //RX_TDDRC_ALPHA_UP_4 +184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +190 0x7FFF //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +269 0x0000 //RX_TDDRC_THRD_0 +270 0x0000 //RX_TDDRC_THRD_1 +271 0x7FFF //RX_TDDRC_THRD_2 +272 0x7FFF //RX_TDDRC_THRD_3 +273 0x7FFF //RX_TDDRC_SLANT_0 +274 0x7EB8 //RX_TDDRC_SLANT_1 +275 0x3000 //RX_TDDRC_ALPHA_UP_0 +276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x199A //RX_TDDRC_HMNC_GAIN +279 0x0001 //RX_TDDRC_SMT_FLAG +280 0x0CCD //RX_TDDRC_SMT_W +281 0x017F //RX_TDDRC_DRC_GAIN +195 0x0014 //RX_FDEQ_SUBNUM +196 0x4848 //RX_FDEQ_GAIN_0 +197 0x4848 //RX_FDEQ_GAIN_1 +198 0x4848 //RX_FDEQ_GAIN_2 +199 0x4848 //RX_FDEQ_GAIN_3 +200 0x4848 //RX_FDEQ_GAIN_4 +201 0x4848 //RX_FDEQ_GAIN_5 +202 0x4444 //RX_FDEQ_GAIN_6 +203 0x4040 //RX_FDEQ_GAIN_7 +204 0x4040 //RX_FDEQ_GAIN_8 +205 0x4040 //RX_FDEQ_GAIN_9 +206 0x4848 //RX_FDEQ_GAIN_10 +207 0x4848 //RX_FDEQ_GAIN_11 +208 0x4848 //RX_FDEQ_GAIN_12 +209 0x4848 //RX_FDEQ_GAIN_13 +210 0x4848 //RX_FDEQ_GAIN_14 +211 0x4848 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0202 //RX_FDEQ_BIN_0 +221 0x0203 //RX_FDEQ_BIN_1 +222 0x0303 //RX_FDEQ_BIN_2 +223 0x0304 //RX_FDEQ_BIN_3 +224 0x0405 //RX_FDEQ_BIN_4 +225 0x0506 //RX_FDEQ_BIN_5 +226 0x0708 //RX_FDEQ_BIN_6 +227 0x090A //RX_FDEQ_BIN_7 +228 0x0B0C //RX_FDEQ_BIN_8 +229 0x0D0E //RX_FDEQ_BIN_9 +230 0x0000 //RX_FDEQ_BIN_10 +231 0x0000 //RX_FDEQ_BIN_11 +232 0x0000 //RX_FDEQ_BIN_12 +233 0x0000 //RX_FDEQ_BIN_13 +234 0x0000 //RX_FDEQ_BIN_14 +235 0x0000 //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x4000 //RX_FDEQ_RESRV_0 +245 0x0320 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0030 //RX_FDDRC_BAND_MARGIN_1 +248 0x0050 //RX_FDDRC_BAND_MARGIN_2 +249 0x0080 //RX_FDDRC_BAND_MARGIN_3 +250 0x0007 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x5000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x6400 //RX_FDDRC_THRD_3_2 +258 0x6400 //RX_FDDRC_THRD_3_3 +259 0x2000 //RX_FDDRC_SLANT_0_0 +260 0x2000 //RX_FDDRC_SLANT_0_1 +261 0x2000 //RX_FDDRC_SLANT_0_2 +262 0x2000 //RX_FDDRC_SLANT_0_3 +263 0x5333 //RX_FDDRC_SLANT_1_0 +264 0x5333 //RX_FDDRC_SLANT_1_1 +265 0x5333 //RX_FDDRC_SLANT_1_2 +266 0x5333 //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +286 0x0100 //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 +#VOL 4 +163 0x3000 //RX_TDDRC_ALPHA_UP_1 +164 0x3000 //RX_TDDRC_ALPHA_UP_2 +165 0x3000 //RX_TDDRC_ALPHA_UP_3 +166 0x3000 //RX_TDDRC_ALPHA_UP_4 +184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +190 0x7FFF //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +269 0x0000 //RX_TDDRC_THRD_0 +270 0x0000 //RX_TDDRC_THRD_1 +271 0x7FFF //RX_TDDRC_THRD_2 +272 0x7FFF //RX_TDDRC_THRD_3 +273 0x7FFF //RX_TDDRC_SLANT_0 +274 0x7EB8 //RX_TDDRC_SLANT_1 +275 0x3000 //RX_TDDRC_ALPHA_UP_0 +276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x199A //RX_TDDRC_HMNC_GAIN +279 0x0001 //RX_TDDRC_SMT_FLAG +280 0x0CCD //RX_TDDRC_SMT_W +281 0x017F //RX_TDDRC_DRC_GAIN +195 0x0014 //RX_FDEQ_SUBNUM +196 0x4848 //RX_FDEQ_GAIN_0 +197 0x4848 //RX_FDEQ_GAIN_1 +198 0x4848 //RX_FDEQ_GAIN_2 +199 0x4848 //RX_FDEQ_GAIN_3 +200 0x4848 //RX_FDEQ_GAIN_4 +201 0x4848 //RX_FDEQ_GAIN_5 +202 0x4444 //RX_FDEQ_GAIN_6 +203 0x4040 //RX_FDEQ_GAIN_7 +204 0x4040 //RX_FDEQ_GAIN_8 +205 0x4040 //RX_FDEQ_GAIN_9 +206 0x4848 //RX_FDEQ_GAIN_10 +207 0x4848 //RX_FDEQ_GAIN_11 +208 0x4848 //RX_FDEQ_GAIN_12 +209 0x4848 //RX_FDEQ_GAIN_13 +210 0x4848 //RX_FDEQ_GAIN_14 +211 0x4848 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0202 //RX_FDEQ_BIN_0 +221 0x0203 //RX_FDEQ_BIN_1 +222 0x0303 //RX_FDEQ_BIN_2 +223 0x0304 //RX_FDEQ_BIN_3 +224 0x0405 //RX_FDEQ_BIN_4 +225 0x0506 //RX_FDEQ_BIN_5 +226 0x0708 //RX_FDEQ_BIN_6 +227 0x090A //RX_FDEQ_BIN_7 +228 0x0B0C //RX_FDEQ_BIN_8 +229 0x0D0E //RX_FDEQ_BIN_9 +230 0x0000 //RX_FDEQ_BIN_10 +231 0x0000 //RX_FDEQ_BIN_11 +232 0x0000 //RX_FDEQ_BIN_12 +233 0x0000 //RX_FDEQ_BIN_13 +234 0x0000 //RX_FDEQ_BIN_14 +235 0x0000 //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x4000 //RX_FDEQ_RESRV_0 +245 0x0320 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0030 //RX_FDDRC_BAND_MARGIN_1 +248 0x0050 //RX_FDDRC_BAND_MARGIN_2 +249 0x0080 //RX_FDDRC_BAND_MARGIN_3 +250 0x0007 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x5000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x6400 //RX_FDDRC_THRD_3_2 +258 0x6400 //RX_FDDRC_THRD_3_3 +259 0x2000 //RX_FDDRC_SLANT_0_0 +260 0x2000 //RX_FDDRC_SLANT_0_1 +261 0x2000 //RX_FDDRC_SLANT_0_2 +262 0x2000 //RX_FDDRC_SLANT_0_3 +263 0x5333 //RX_FDDRC_SLANT_1_0 +264 0x5333 //RX_FDDRC_SLANT_1_1 +265 0x5333 //RX_FDDRC_SLANT_1_2 +266 0x5333 //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +286 0x0100 //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 +#VOL 5 +163 0x3000 //RX_TDDRC_ALPHA_UP_1 +164 0x3000 //RX_TDDRC_ALPHA_UP_2 +165 0x3000 //RX_TDDRC_ALPHA_UP_3 +166 0x3000 //RX_TDDRC_ALPHA_UP_4 +184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +190 0x7FFF //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +269 0x0000 //RX_TDDRC_THRD_0 +270 0x0000 //RX_TDDRC_THRD_1 +271 0x7FFF //RX_TDDRC_THRD_2 +272 0x7FFF //RX_TDDRC_THRD_3 +273 0x7FFF //RX_TDDRC_SLANT_0 +274 0x7EB8 //RX_TDDRC_SLANT_1 +275 0x3000 //RX_TDDRC_ALPHA_UP_0 +276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x199A //RX_TDDRC_HMNC_GAIN +279 0x0001 //RX_TDDRC_SMT_FLAG +280 0x0CCD //RX_TDDRC_SMT_W +281 0x017F //RX_TDDRC_DRC_GAIN +195 0x0014 //RX_FDEQ_SUBNUM +196 0x4848 //RX_FDEQ_GAIN_0 +197 0x4848 //RX_FDEQ_GAIN_1 +198 0x4848 //RX_FDEQ_GAIN_2 +199 0x4848 //RX_FDEQ_GAIN_3 +200 0x4848 //RX_FDEQ_GAIN_4 +201 0x4848 //RX_FDEQ_GAIN_5 +202 0x4444 //RX_FDEQ_GAIN_6 +203 0x4040 //RX_FDEQ_GAIN_7 +204 0x4040 //RX_FDEQ_GAIN_8 +205 0x4040 //RX_FDEQ_GAIN_9 +206 0x4848 //RX_FDEQ_GAIN_10 +207 0x4848 //RX_FDEQ_GAIN_11 +208 0x4848 //RX_FDEQ_GAIN_12 +209 0x4848 //RX_FDEQ_GAIN_13 +210 0x4848 //RX_FDEQ_GAIN_14 +211 0x4848 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0202 //RX_FDEQ_BIN_0 +221 0x0203 //RX_FDEQ_BIN_1 +222 0x0303 //RX_FDEQ_BIN_2 +223 0x0304 //RX_FDEQ_BIN_3 +224 0x0405 //RX_FDEQ_BIN_4 +225 0x0506 //RX_FDEQ_BIN_5 +226 0x0708 //RX_FDEQ_BIN_6 +227 0x090A //RX_FDEQ_BIN_7 +228 0x0B0C //RX_FDEQ_BIN_8 +229 0x0D0E //RX_FDEQ_BIN_9 +230 0x0000 //RX_FDEQ_BIN_10 +231 0x0000 //RX_FDEQ_BIN_11 +232 0x0000 //RX_FDEQ_BIN_12 +233 0x0000 //RX_FDEQ_BIN_13 +234 0x0000 //RX_FDEQ_BIN_14 +235 0x0000 //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x4000 //RX_FDEQ_RESRV_0 +245 0x0320 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0030 //RX_FDDRC_BAND_MARGIN_1 +248 0x0050 //RX_FDDRC_BAND_MARGIN_2 +249 0x0080 //RX_FDDRC_BAND_MARGIN_3 +250 0x0007 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x5000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x6400 //RX_FDDRC_THRD_3_2 +258 0x6400 //RX_FDDRC_THRD_3_3 +259 0x2000 //RX_FDDRC_SLANT_0_0 +260 0x2000 //RX_FDDRC_SLANT_0_1 +261 0x2000 //RX_FDDRC_SLANT_0_2 +262 0x2000 //RX_FDDRC_SLANT_0_3 +263 0x5333 //RX_FDDRC_SLANT_1_0 +264 0x5333 //RX_FDDRC_SLANT_1_1 +265 0x5333 //RX_FDDRC_SLANT_1_2 +266 0x5333 //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +286 0x0100 //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 +#VOL 6 +163 0x3000 //RX_TDDRC_ALPHA_UP_1 +164 0x3000 //RX_TDDRC_ALPHA_UP_2 +165 0x3000 //RX_TDDRC_ALPHA_UP_3 +166 0x3000 //RX_TDDRC_ALPHA_UP_4 +184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +190 0x7FFF //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +269 0x0000 //RX_TDDRC_THRD_0 +270 0x0000 //RX_TDDRC_THRD_1 +271 0x7FFF //RX_TDDRC_THRD_2 +272 0x7FFF //RX_TDDRC_THRD_3 +273 0x7FFF //RX_TDDRC_SLANT_0 +274 0x7EB8 //RX_TDDRC_SLANT_1 +275 0x3000 //RX_TDDRC_ALPHA_UP_0 +276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x199A //RX_TDDRC_HMNC_GAIN +279 0x0001 //RX_TDDRC_SMT_FLAG +280 0x0CCD //RX_TDDRC_SMT_W +281 0x017F //RX_TDDRC_DRC_GAIN +195 0x0014 //RX_FDEQ_SUBNUM +196 0x4848 //RX_FDEQ_GAIN_0 +197 0x4848 //RX_FDEQ_GAIN_1 +198 0x4848 //RX_FDEQ_GAIN_2 +199 0x4848 //RX_FDEQ_GAIN_3 +200 0x4848 //RX_FDEQ_GAIN_4 +201 0x4848 //RX_FDEQ_GAIN_5 +202 0x4444 //RX_FDEQ_GAIN_6 +203 0x4040 //RX_FDEQ_GAIN_7 +204 0x4040 //RX_FDEQ_GAIN_8 +205 0x4040 //RX_FDEQ_GAIN_9 +206 0x4848 //RX_FDEQ_GAIN_10 +207 0x4848 //RX_FDEQ_GAIN_11 +208 0x4848 //RX_FDEQ_GAIN_12 +209 0x4848 //RX_FDEQ_GAIN_13 +210 0x4848 //RX_FDEQ_GAIN_14 +211 0x4848 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0202 //RX_FDEQ_BIN_0 +221 0x0203 //RX_FDEQ_BIN_1 +222 0x0303 //RX_FDEQ_BIN_2 +223 0x0304 //RX_FDEQ_BIN_3 +224 0x0405 //RX_FDEQ_BIN_4 +225 0x0506 //RX_FDEQ_BIN_5 +226 0x0708 //RX_FDEQ_BIN_6 +227 0x090A //RX_FDEQ_BIN_7 +228 0x0B0C //RX_FDEQ_BIN_8 +229 0x0D0E //RX_FDEQ_BIN_9 +230 0x0000 //RX_FDEQ_BIN_10 +231 0x0000 //RX_FDEQ_BIN_11 +232 0x0000 //RX_FDEQ_BIN_12 +233 0x0000 //RX_FDEQ_BIN_13 +234 0x0000 //RX_FDEQ_BIN_14 +235 0x0000 //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x4000 //RX_FDEQ_RESRV_0 +245 0x0320 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0030 //RX_FDDRC_BAND_MARGIN_1 +248 0x0050 //RX_FDDRC_BAND_MARGIN_2 +249 0x0080 //RX_FDDRC_BAND_MARGIN_3 +250 0x0007 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x5000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x6400 //RX_FDDRC_THRD_3_2 +258 0x6400 //RX_FDDRC_THRD_3_3 +259 0x2000 //RX_FDDRC_SLANT_0_0 +260 0x2000 //RX_FDDRC_SLANT_0_1 +261 0x2000 //RX_FDDRC_SLANT_0_2 +262 0x2000 //RX_FDDRC_SLANT_0_3 +263 0x5333 //RX_FDDRC_SLANT_1_0 +264 0x5333 //RX_FDDRC_SLANT_1_1 +265 0x5333 //RX_FDDRC_SLANT_1_2 +266 0x5333 //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +286 0x0100 //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 #CASE_NAME BLUETOOTH-BTNB_NREC-VOICE_GENERIC-WB -#PARAM_TYPE TX+RX -#TOTAL_CUSTOM_STEP 7 +#PARAM_MODE Full +#PARAM_TYPE TX+2RX +#TOTAL_CUSTOM_STEP 7+7 #TX 0 0x0008 //TX_OPERATION_MODE_0 1 0x0008 //TX_OPERATION_MODE_1 @@ -17788,20 +26959,20 @@ 248 0xF400 //TX_THR_SN_EST_6 249 0xF600 //TX_THR_SN_EST_7 250 0x0000 //TX_DELTA_THR_SN_EST_0 -251 0x0000 //TX_DELTA_THR_SN_EST_1 +251 0x0200 //TX_DELTA_THR_SN_EST_1 252 0x0200 //TX_DELTA_THR_SN_EST_2 253 0x0200 //TX_DELTA_THR_SN_EST_3 254 0x0200 //TX_DELTA_THR_SN_EST_4 255 0x0200 //TX_DELTA_THR_SN_EST_5 -256 0x0200 //TX_DELTA_THR_SN_EST_6 +256 0x0000 //TX_DELTA_THR_SN_EST_6 257 0x0200 //TX_DELTA_THR_SN_EST_7 258 0x6000 //TX_LAMBDA_NN_EST_0 -259 0x6000 //TX_LAMBDA_NN_EST_1 +259 0x4000 //TX_LAMBDA_NN_EST_1 260 0x4000 //TX_LAMBDA_NN_EST_2 261 0x4000 //TX_LAMBDA_NN_EST_3 262 0x4000 //TX_LAMBDA_NN_EST_4 263 0x4000 //TX_LAMBDA_NN_EST_5 -264 0x4000 //TX_LAMBDA_NN_EST_6 +264 0x6000 //TX_LAMBDA_NN_EST_6 265 0x4000 //TX_LAMBDA_NN_EST_7 266 0x0400 //TX_N_SN_EST 267 0x001E //TX_INBEAM_T @@ -17819,16 +26990,16 @@ 279 0x1000 //TX_B_POST_FLT_0 280 0x1000 //TX_B_POST_FLT_1 281 0x000F //TX_NS_LVL_CTRL_0 -282 0x000F //TX_NS_LVL_CTRL_1 -283 0x0011 //TX_NS_LVL_CTRL_2 +282 0x0011 //TX_NS_LVL_CTRL_1 +283 0x000F //TX_NS_LVL_CTRL_2 284 0x000F //TX_NS_LVL_CTRL_3 285 0x000F //TX_NS_LVL_CTRL_4 286 0x000F //TX_NS_LVL_CTRL_5 287 0x000F //TX_NS_LVL_CTRL_6 288 0x0011 //TX_NS_LVL_CTRL_7 289 0x000C //TX_MIN_GAIN_S_0 -290 0x000C //TX_MIN_GAIN_S_1 -291 0x000F //TX_MIN_GAIN_S_2 +290 0x000F //TX_MIN_GAIN_S_1 +291 0x000C //TX_MIN_GAIN_S_2 292 0x000C //TX_MIN_GAIN_S_3 293 0x000C //TX_MIN_GAIN_S_4 294 0x000C //TX_MIN_GAIN_S_5 @@ -17852,12 +27023,12 @@ 312 0x7FFF //TX_A_POST_FILT_0 313 0x2000 //TX_A_POST_FILT_1 314 0x4000 //TX_A_POST_FILT_S_0 -315 0x4000 //TX_A_POST_FILT_S_1 +315 0x5000 //TX_A_POST_FILT_S_1 316 0x5000 //TX_A_POST_FILT_S_2 317 0x5000 //TX_A_POST_FILT_S_3 318 0x5000 //TX_A_POST_FILT_S_4 319 0x5000 //TX_A_POST_FILT_S_5 -320 0x5000 //TX_A_POST_FILT_S_6 +320 0x4000 //TX_A_POST_FILT_S_6 321 0x5000 //TX_A_POST_FILT_S_7 322 0x1000 //TX_B_POST_FILT_0 323 0x1000 //TX_B_POST_FILT_1 @@ -17917,10 +27088,10 @@ 377 0x7FFF //TX_NOISE_TH_5_4 378 0x044C //TX_NOISE_TH_6 379 0x0014 //TX_MINENOISE_TH -380 0x4000 //TX_MINENOISE_MIC0_TH_MTS -381 0xFFEE //TX_MINENOISE_MIC0_TH_EXP -382 0x6000 //TX_MINENOISE_MIC0_S_TH_MTS -383 0xFFF3 //TX_MINENOISE_MIC0_S_TH_EXP +380 0x4000 //TX_MORENS_TFMASK_TH +381 0xFFEE //TX_DRC_QUIET_FLOOR +382 0x6000 //TX_RATIODTL_CUT_TH +383 0xFFF3 //TX_DT_CUT_K1 384 0x0666 //TX_OUT_ENER_S_TH_CLEAN 385 0x0666 //TX_OUT_ENER_S_TH_LESSCLEAN 386 0x0333 //TX_OUT_ENER_S_TH_NOISY @@ -17928,15 +27099,15 @@ 388 0x0333 //TX_OUT_ENER_TH_SPEECH 389 0x2000 //TX_SN_NPB_GAIN 390 0x0000 //TX_NN_NPB_GAIN -391 0x0000 //TX_CSX_ALPHA_0 -392 0x0000 //TX_CSX_ALPHA_1 -393 0x0000 //TX_CSX_ALPHA_2 -394 0x0000 //TX_CSX_ALPHA_3 -395 0x0800 //TX_MU_ARSP_EST -396 0x00C8 //TX_P_OUTBEAM_MIN_TH +391 0x0000 //TX_POST_MASK_SUP_HSNE +392 0x0000 //TX_TAIL_DET_TH +393 0x0000 //TX_B_LESSCUT_RTO_WTA +394 0x0000 //TX_MEL_G_R +395 0x0800 //TX_SUPHIGH_TH +396 0x00C8 //TX_MASK_G_R 397 0x0002 //TX_EXTRA_NS_L -398 0x0800 //TX_EXTRA_NS_A -399 0x0005 //TX_VR_NOISE_FLOOR_TH +398 0x0800 //TX_C_POST_FLT_MASK +399 0x0005 //TX_A_POST_FLT_WNS 400 0x0148 //TX_MIN_G_LOW300HZ 401 0x0002 //TX_MAXLEVEL_CNG 402 0x00B4 //TX_STN_NOISE_TH @@ -18051,16 +27222,16 @@ 511 0x6666 //TX_MIC_TO_BFGAIN 512 0x0000 //TX_MICTOBFGAIN0 513 0x0000 //TX_FASTMUE_TH -514 0x0000 //TX_DERVB_LEN_0 -515 0x0000 //TX_DERVB_LEN_1 -516 0x0000 //TX_RHO_DERVB -517 0x0000 //TX_MIC_INDX_DERVB -518 0x0000 //TX_MU_DERVB -519 0x0000 //TX_DR_RESRV_0 -520 0x0000 //TX_DR_RESRV_1 -521 0x0000 //TX_DR_RESRV_2 -522 0x0000 //TX_DR_RESRV_3 -523 0x0000 //TX_DR_RESRV_4 +514 0x0000 //TX_DEREVERB_LF_MU +515 0x0000 //TX_DEREVERB_HF_MU +516 0x0000 //TX_DEREVERB_DELAY +517 0x0000 //TX_DEREVERB_COEF_LEN +518 0x0000 //TX_DEREVERB_DNR +519 0x0000 //TX_DEREVERB_ALPHA +520 0x0000 //TX_DEREVERB_BETA +521 0x0000 //TX_GSC_RTOL_TH +522 0x0000 //TX_GSC_RTOH_TH +523 0x0000 //TX_WIDE2_MEANHTH 524 0x0000 //TX_DR_RESRV_5 525 0x0000 //TX_DR_RESRV_6 526 0x0000 //TX_DR_RESRV_7 @@ -18434,8 +27605,73 @@ 894 0xC000 //TX_FASTNS_SSA_THHFL 895 0xCCCC //TX_FASTNS_SSA_THLFH 896 0xD999 //TX_FASTNS_SSA_THHFH +897 0x0000 //TX_SENDFUNC_REG_MICMUTE +898 0x0000 //TX_SENDFUNC_REG_MICMUTE1 +899 0x0000 //TX_MICMUTE_RATIO_THR +900 0x0000 //TX_MICMUTE_AMP_THR +901 0x0000 //TX_MICMUTE_HPF_IND +902 0x0000 //TX_MICMUTE_LOG_EYR_TH +903 0x0000 //TX_MICMUTE_CVG_TIME +904 0x0000 //TX_MICMUTE_RELEASE_TIME +905 0x0000 //TX_MIC_VOLUME_MIC0MUTE +906 0x0000 //TX_MICMUTE_EPD_OFFSET_0 +907 0x0000 //TX_MICMUTE_FRQ_AEC_L +908 0x0000 //TX_MICMUTE_EAD_THR +909 0x0000 //TX_MICMUTE_LAMBDA_CB_NLE +910 0x0000 //TX_MICMUTE_LAMBDA_RE_EST +911 0x0000 //TX_DTD_THR1_MICMUTE_0 +912 0x0000 //TX_DTD_THR1_MICMUTE_1 +913 0x0000 //TX_DTD_THR1_MICMUTE_2 +914 0x0000 //TX_DTD_THR1_MICMUTE_3 +915 0x0000 //TX_DTD_THR2_MICMUTE_0 +916 0x0000 //TX_MICMUTE_MIN_EQ_RE_EST_0 +917 0x0000 //TX_MICMUTE_MIN_EQ_RE_EST_1 +918 0x0000 //TX_MICMUTE_MIN_EQ_RE_EST_2 +919 0x0000 //TX_MICMUTE_MIN_EQ_RE_EST_3 +920 0x0000 //TX_MICMUTE_MIN_EQ_RE_EST_4 +921 0x0000 //TX_MICMUTE_C_POST_FLT +922 0x0000 //TX_MICMUTE_DT_CUT_K +923 0x0000 //TX_MICMUTE_DT_CUT_THR +924 0x0000 //TX_MICMUTE_DT_CUT_K2 +925 0x0000 //TX_MICMUTE_DT_CUT_THR2 +926 0x0000 //TX_MICMUTE_DT2_HOLD_N +927 0x0000 //TX_MICMUTE_RATIODTH_THCUT +928 0x0000 //TX_MICMUTE_B_POST_FLT_ECHOL +929 0x0000 //TX_MICMUTE_B_POST_FLT_ECHOH +930 0x0000 //TX_MICMUTE_C_POST_FLT_MASK +931 0x0000 //TX_MICMUTE_RATIODTL_CUT_TH +932 0x0000 //TX_MICMUTE_DT_CUT_K1 +933 0x0000 //TX_MICMUTE_N2_SN_EST +934 0x0000 //TX_MICMUTE_THR_SN_EST_0 +935 0x0000 //TX_MICMUTE_MIN_G_CTRL_0 +936 0x0000 //TX_MICMUTE_A_POST_FILT_S_0 +937 0x0000 //TX_MICMUTE_B_POST_FILT_0 +938 0x0000 //TX_MIC1RUB_AMP_THR +939 0x0000 //TX_MIC1MUTE_RATIO_THR +940 0x0000 //TX_MIC1MUTE_AMP_THR +941 0x0000 //TX_MIC1MUTE_CVG_TIME +942 0x0000 //TX_MIC1MUTE_RELEASE_TIME +943 0x0000 //TX_AMS_RESRV_01 +944 0x0000 //TX_AMS_RESRV_02 +945 0x0000 //TX_AMS_RESRV_03 +946 0x0000 //TX_AMS_RESRV_04 +947 0x0000 //TX_AMS_RESRV_05 +948 0x0000 //TX_AMS_RESRV_06 +949 0x0000 //TX_AMS_RESRV_07 +950 0x0000 //TX_AMS_RESRV_08 +951 0x0000 //TX_AMS_RESRV_09 +952 0x0000 //TX_AMS_RESRV_10 +953 0x0000 //TX_AMS_RESRV_11 +954 0x0000 //TX_AMS_RESRV_12 +955 0x0000 //TX_AMS_RESRV_13 +956 0x0000 //TX_AMS_RESRV_14 +957 0x0000 //TX_AMS_RESRV_15 +958 0x0000 //TX_AMS_RESRV_16 +959 0x0000 //TX_AMS_RESRV_17 +960 0x0000 //TX_AMS_RESRV_18 +961 0x0000 //TX_AMS_RESRV_19 #RX -0 0x006C //RX_RECVFUNC_MODE_0 +0 0x206C //RX_RECVFUNC_MODE_0 1 0x0000 //RX_RECVFUNC_MODE_1 2 0x0001 //RX_SAMPLINGFREQ_SIG 3 0x0001 //RX_SAMPLINGFREQ_PROC @@ -19285,10 +28521,862 @@ 110 0x0000 //RX_FDDRC_RESRV_0 129 0x0100 //RX_SPK_VOL 130 0x0000 //RX_VOL_RESRV_0 +#RX 2 +157 0x206C //RX_RECVFUNC_MODE_0 +158 0x0000 //RX_RECVFUNC_MODE_1 +159 0x0001 //RX_SAMPLINGFREQ_SIG +160 0x0001 //RX_SAMPLINGFREQ_PROC +161 0x000A //RX_FRAME_SZ +162 0x0000 //RX_DELAY_OPT +163 0x1000 //RX_TDDRC_ALPHA_UP_1 +164 0x1000 //RX_TDDRC_ALPHA_UP_2 +165 0x1000 //RX_TDDRC_ALPHA_UP_3 +166 0x1000 //RX_TDDRC_ALPHA_UP_4 +167 0x0800 //RX_PGA +168 0x7FFF //RX_A_HP +169 0x4000 //RX_B_PE +170 0x3800 //RX_THR_PITCH_DET_0 +171 0x3000 //RX_THR_PITCH_DET_1 +172 0x2800 //RX_THR_PITCH_DET_2 +173 0x0008 //RX_PITCH_BFR_LEN +174 0x0003 //RX_SBD_PITCH_DET +175 0x0100 //RX_PP_RESRV_0 +176 0x0020 //RX_PP_RESRV_1 +177 0x0600 //RX_N_SN_EST +178 0x000C //RX_N2_SN_EST +179 0x0010 //RX_NS_LVL_CTRL +180 0xF800 //RX_THR_SN_EST +181 0x7CCD //RX_LAMBDA_PFILT +182 0x000A //RX_FENS_RESRV_0 +183 0x0190 //RX_FENS_RESRV_1 +184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +187 0x0002 //RX_EXTRA_NS_L +188 0x0800 //RX_EXTRA_NS_A +189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +190 0x7FFF //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +192 0x199A //RX_A_POST_FLT +193 0x0000 //RX_LMT_THRD +194 0x4000 //RX_LMT_ALPHA +195 0x001C //RX_FDEQ_SUBNUM +196 0x4848 //RX_FDEQ_GAIN_0 +197 0x4848 //RX_FDEQ_GAIN_1 +198 0x4848 //RX_FDEQ_GAIN_2 +199 0x4848 //RX_FDEQ_GAIN_3 +200 0x4848 //RX_FDEQ_GAIN_4 +201 0x4848 //RX_FDEQ_GAIN_5 +202 0x4848 //RX_FDEQ_GAIN_6 +203 0x4848 //RX_FDEQ_GAIN_7 +204 0x4848 //RX_FDEQ_GAIN_8 +205 0x3C3C //RX_FDEQ_GAIN_9 +206 0x3C3C //RX_FDEQ_GAIN_10 +207 0x3838 //RX_FDEQ_GAIN_11 +208 0x3838 //RX_FDEQ_GAIN_12 +209 0x3030 //RX_FDEQ_GAIN_13 +210 0x4848 //RX_FDEQ_GAIN_14 +211 0x4848 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0202 //RX_FDEQ_BIN_0 +221 0x0203 //RX_FDEQ_BIN_1 +222 0x0303 //RX_FDEQ_BIN_2 +223 0x0304 //RX_FDEQ_BIN_3 +224 0x0405 //RX_FDEQ_BIN_4 +225 0x0506 //RX_FDEQ_BIN_5 +226 0x0708 //RX_FDEQ_BIN_6 +227 0x090A //RX_FDEQ_BIN_7 +228 0x0B0C //RX_FDEQ_BIN_8 +229 0x0D0E //RX_FDEQ_BIN_9 +230 0x0E0F //RX_FDEQ_BIN_10 +231 0x0F10 //RX_FDEQ_BIN_11 +232 0x1011 //RX_FDEQ_BIN_12 +233 0x1112 //RX_FDEQ_BIN_13 +234 0x0000 //RX_FDEQ_BIN_14 +235 0x0000 //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x4000 //RX_FDEQ_RESRV_0 +245 0x0320 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0030 //RX_FDDRC_BAND_MARGIN_1 +248 0x0050 //RX_FDDRC_BAND_MARGIN_2 +249 0x0080 //RX_FDDRC_BAND_MARGIN_3 +250 0x0007 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x5000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x6400 //RX_FDDRC_THRD_3_2 +258 0x6400 //RX_FDDRC_THRD_3_3 +259 0x2000 //RX_FDDRC_SLANT_0_0 +260 0x2000 //RX_FDDRC_SLANT_0_1 +261 0x2000 //RX_FDDRC_SLANT_0_2 +262 0x2000 //RX_FDDRC_SLANT_0_3 +263 0x5333 //RX_FDDRC_SLANT_1_0 +264 0x5333 //RX_FDDRC_SLANT_1_1 +265 0x5333 //RX_FDDRC_SLANT_1_2 +266 0x5333 //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +268 0x0000 //RX_FILTINDX +269 0x0000 //RX_TDDRC_THRD_0 +270 0x0000 //RX_TDDRC_THRD_1 +271 0x7FFF //RX_TDDRC_THRD_2 +272 0x7FFF //RX_TDDRC_THRD_3 +273 0x7E70 //RX_TDDRC_SLANT_0 +274 0x7FFF //RX_TDDRC_SLANT_1 +275 0x1000 //RX_TDDRC_ALPHA_UP_0 +276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x199A //RX_TDDRC_HMNC_GAIN +279 0x0001 //RX_TDDRC_SMT_FLAG +280 0x0CCD //RX_TDDRC_SMT_W +281 0x0155 //RX_TDDRC_DRC_GAIN +282 0x7C00 //RX_LAMBDA_PKA_FP +283 0x2000 //RX_TPKA_FP +284 0x2000 //RX_MIN_G_FP +285 0x0080 //RX_MAX_G_FP +286 0x0100 //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 +288 0x0000 //RX_MAXLEVEL_CNG +289 0x3000 //RX_BWE_UV_TH +290 0x3000 //RX_BWE_UV_TH2 +291 0x1800 //RX_BWE_UV_TH3 +292 0x1000 //RX_BWE_V_TH +293 0x04CD //RX_BWE_GAIN1_V_TH1 +294 0x0F33 //RX_BWE_GAIN1_V_TH2 +295 0x7333 //RX_BWE_UV_EQ +296 0x199A //RX_BWE_V_EQ +297 0x7333 //RX_BWE_TONE_TH +298 0x0004 //RX_BWE_UV_HOLD_T +299 0x6CCD //RX_BWE_GAIN2_ALPHA +300 0x799A //RX_BWE_GAIN3_ALPHA +301 0x001E //RX_BWE_CUTOFF +302 0x3000 //RX_BWE_GAINFILL +303 0x3200 //RX_BWE_MAXTH_TONE +304 0x2000 //RX_BWE_EQ_0 +305 0x2000 //RX_BWE_EQ_1 +306 0x2000 //RX_BWE_EQ_2 +307 0x2000 //RX_BWE_EQ_3 +308 0x2000 //RX_BWE_EQ_4 +309 0x2000 //RX_BWE_EQ_5 +310 0x2000 //RX_BWE_EQ_6 +311 0x0000 //RX_BWE_RESRV_0 +312 0x0000 //RX_BWE_RESRV_1 +313 0x0000 //RX_BWE_RESRV_2 +#VOL 0 +163 0x1000 //RX_TDDRC_ALPHA_UP_1 +164 0x1000 //RX_TDDRC_ALPHA_UP_2 +165 0x1000 //RX_TDDRC_ALPHA_UP_3 +166 0x1000 //RX_TDDRC_ALPHA_UP_4 +184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +190 0x7FFF //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +269 0x0000 //RX_TDDRC_THRD_0 +270 0x0000 //RX_TDDRC_THRD_1 +271 0x7FFF //RX_TDDRC_THRD_2 +272 0x7FFF //RX_TDDRC_THRD_3 +273 0x7E70 //RX_TDDRC_SLANT_0 +274 0x7FFF //RX_TDDRC_SLANT_1 +275 0x1000 //RX_TDDRC_ALPHA_UP_0 +276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x199A //RX_TDDRC_HMNC_GAIN +279 0x0001 //RX_TDDRC_SMT_FLAG +280 0x0CCD //RX_TDDRC_SMT_W +281 0x0155 //RX_TDDRC_DRC_GAIN +195 0x001C //RX_FDEQ_SUBNUM +196 0x4848 //RX_FDEQ_GAIN_0 +197 0x4848 //RX_FDEQ_GAIN_1 +198 0x4848 //RX_FDEQ_GAIN_2 +199 0x4848 //RX_FDEQ_GAIN_3 +200 0x4848 //RX_FDEQ_GAIN_4 +201 0x4848 //RX_FDEQ_GAIN_5 +202 0x4848 //RX_FDEQ_GAIN_6 +203 0x4848 //RX_FDEQ_GAIN_7 +204 0x4848 //RX_FDEQ_GAIN_8 +205 0x3C3C //RX_FDEQ_GAIN_9 +206 0x3C3C //RX_FDEQ_GAIN_10 +207 0x3838 //RX_FDEQ_GAIN_11 +208 0x3838 //RX_FDEQ_GAIN_12 +209 0x3030 //RX_FDEQ_GAIN_13 +210 0x4848 //RX_FDEQ_GAIN_14 +211 0x4848 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0202 //RX_FDEQ_BIN_0 +221 0x0203 //RX_FDEQ_BIN_1 +222 0x0303 //RX_FDEQ_BIN_2 +223 0x0304 //RX_FDEQ_BIN_3 +224 0x0405 //RX_FDEQ_BIN_4 +225 0x0506 //RX_FDEQ_BIN_5 +226 0x0708 //RX_FDEQ_BIN_6 +227 0x090A //RX_FDEQ_BIN_7 +228 0x0B0C //RX_FDEQ_BIN_8 +229 0x0D0E //RX_FDEQ_BIN_9 +230 0x0E0F //RX_FDEQ_BIN_10 +231 0x0F10 //RX_FDEQ_BIN_11 +232 0x1011 //RX_FDEQ_BIN_12 +233 0x1112 //RX_FDEQ_BIN_13 +234 0x0000 //RX_FDEQ_BIN_14 +235 0x0000 //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x4000 //RX_FDEQ_RESRV_0 +245 0x0320 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0030 //RX_FDDRC_BAND_MARGIN_1 +248 0x0050 //RX_FDDRC_BAND_MARGIN_2 +249 0x0080 //RX_FDDRC_BAND_MARGIN_3 +250 0x0007 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x5000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x6400 //RX_FDDRC_THRD_3_2 +258 0x6400 //RX_FDDRC_THRD_3_3 +259 0x2000 //RX_FDDRC_SLANT_0_0 +260 0x2000 //RX_FDDRC_SLANT_0_1 +261 0x2000 //RX_FDDRC_SLANT_0_2 +262 0x2000 //RX_FDDRC_SLANT_0_3 +263 0x5333 //RX_FDDRC_SLANT_1_0 +264 0x5333 //RX_FDDRC_SLANT_1_1 +265 0x5333 //RX_FDDRC_SLANT_1_2 +266 0x5333 //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +286 0x0100 //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 +#VOL 1 +163 0x1000 //RX_TDDRC_ALPHA_UP_1 +164 0x1000 //RX_TDDRC_ALPHA_UP_2 +165 0x1000 //RX_TDDRC_ALPHA_UP_3 +166 0x1000 //RX_TDDRC_ALPHA_UP_4 +184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +190 0x7FFF //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +269 0x0000 //RX_TDDRC_THRD_0 +270 0x0000 //RX_TDDRC_THRD_1 +271 0x7FFF //RX_TDDRC_THRD_2 +272 0x7FFF //RX_TDDRC_THRD_3 +273 0x7E70 //RX_TDDRC_SLANT_0 +274 0x7FFF //RX_TDDRC_SLANT_1 +275 0x1000 //RX_TDDRC_ALPHA_UP_0 +276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x199A //RX_TDDRC_HMNC_GAIN +279 0x0001 //RX_TDDRC_SMT_FLAG +280 0x0CCD //RX_TDDRC_SMT_W +281 0x0155 //RX_TDDRC_DRC_GAIN +195 0x001C //RX_FDEQ_SUBNUM +196 0x4848 //RX_FDEQ_GAIN_0 +197 0x4848 //RX_FDEQ_GAIN_1 +198 0x4848 //RX_FDEQ_GAIN_2 +199 0x4848 //RX_FDEQ_GAIN_3 +200 0x4848 //RX_FDEQ_GAIN_4 +201 0x4848 //RX_FDEQ_GAIN_5 +202 0x4848 //RX_FDEQ_GAIN_6 +203 0x4848 //RX_FDEQ_GAIN_7 +204 0x4848 //RX_FDEQ_GAIN_8 +205 0x3C3C //RX_FDEQ_GAIN_9 +206 0x3C3C //RX_FDEQ_GAIN_10 +207 0x3838 //RX_FDEQ_GAIN_11 +208 0x3838 //RX_FDEQ_GAIN_12 +209 0x3030 //RX_FDEQ_GAIN_13 +210 0x4848 //RX_FDEQ_GAIN_14 +211 0x4848 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0202 //RX_FDEQ_BIN_0 +221 0x0203 //RX_FDEQ_BIN_1 +222 0x0303 //RX_FDEQ_BIN_2 +223 0x0304 //RX_FDEQ_BIN_3 +224 0x0405 //RX_FDEQ_BIN_4 +225 0x0506 //RX_FDEQ_BIN_5 +226 0x0708 //RX_FDEQ_BIN_6 +227 0x090A //RX_FDEQ_BIN_7 +228 0x0B0C //RX_FDEQ_BIN_8 +229 0x0D0E //RX_FDEQ_BIN_9 +230 0x0E0F //RX_FDEQ_BIN_10 +231 0x0F10 //RX_FDEQ_BIN_11 +232 0x1011 //RX_FDEQ_BIN_12 +233 0x1112 //RX_FDEQ_BIN_13 +234 0x0000 //RX_FDEQ_BIN_14 +235 0x0000 //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x4000 //RX_FDEQ_RESRV_0 +245 0x0320 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0030 //RX_FDDRC_BAND_MARGIN_1 +248 0x0050 //RX_FDDRC_BAND_MARGIN_2 +249 0x0080 //RX_FDDRC_BAND_MARGIN_3 +250 0x0007 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x5000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x6400 //RX_FDDRC_THRD_3_2 +258 0x6400 //RX_FDDRC_THRD_3_3 +259 0x2000 //RX_FDDRC_SLANT_0_0 +260 0x2000 //RX_FDDRC_SLANT_0_1 +261 0x2000 //RX_FDDRC_SLANT_0_2 +262 0x2000 //RX_FDDRC_SLANT_0_3 +263 0x5333 //RX_FDDRC_SLANT_1_0 +264 0x5333 //RX_FDDRC_SLANT_1_1 +265 0x5333 //RX_FDDRC_SLANT_1_2 +266 0x5333 //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +286 0x0100 //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 +#VOL 2 +163 0x1000 //RX_TDDRC_ALPHA_UP_1 +164 0x1000 //RX_TDDRC_ALPHA_UP_2 +165 0x1000 //RX_TDDRC_ALPHA_UP_3 +166 0x1000 //RX_TDDRC_ALPHA_UP_4 +184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +190 0x7FFF //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +269 0x0000 //RX_TDDRC_THRD_0 +270 0x0000 //RX_TDDRC_THRD_1 +271 0x7FFF //RX_TDDRC_THRD_2 +272 0x7FFF //RX_TDDRC_THRD_3 +273 0x7E70 //RX_TDDRC_SLANT_0 +274 0x7FFF //RX_TDDRC_SLANT_1 +275 0x1000 //RX_TDDRC_ALPHA_UP_0 +276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x199A //RX_TDDRC_HMNC_GAIN +279 0x0001 //RX_TDDRC_SMT_FLAG +280 0x0CCD //RX_TDDRC_SMT_W +281 0x0155 //RX_TDDRC_DRC_GAIN +195 0x001C //RX_FDEQ_SUBNUM +196 0x4848 //RX_FDEQ_GAIN_0 +197 0x4848 //RX_FDEQ_GAIN_1 +198 0x4848 //RX_FDEQ_GAIN_2 +199 0x4848 //RX_FDEQ_GAIN_3 +200 0x4848 //RX_FDEQ_GAIN_4 +201 0x4848 //RX_FDEQ_GAIN_5 +202 0x4848 //RX_FDEQ_GAIN_6 +203 0x4848 //RX_FDEQ_GAIN_7 +204 0x4848 //RX_FDEQ_GAIN_8 +205 0x3C3C //RX_FDEQ_GAIN_9 +206 0x3C3C //RX_FDEQ_GAIN_10 +207 0x3838 //RX_FDEQ_GAIN_11 +208 0x3838 //RX_FDEQ_GAIN_12 +209 0x3030 //RX_FDEQ_GAIN_13 +210 0x4848 //RX_FDEQ_GAIN_14 +211 0x4848 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0202 //RX_FDEQ_BIN_0 +221 0x0203 //RX_FDEQ_BIN_1 +222 0x0303 //RX_FDEQ_BIN_2 +223 0x0304 //RX_FDEQ_BIN_3 +224 0x0405 //RX_FDEQ_BIN_4 +225 0x0506 //RX_FDEQ_BIN_5 +226 0x0708 //RX_FDEQ_BIN_6 +227 0x090A //RX_FDEQ_BIN_7 +228 0x0B0C //RX_FDEQ_BIN_8 +229 0x0D0E //RX_FDEQ_BIN_9 +230 0x0E0F //RX_FDEQ_BIN_10 +231 0x0F10 //RX_FDEQ_BIN_11 +232 0x1011 //RX_FDEQ_BIN_12 +233 0x1112 //RX_FDEQ_BIN_13 +234 0x0000 //RX_FDEQ_BIN_14 +235 0x0000 //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x4000 //RX_FDEQ_RESRV_0 +245 0x0320 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0030 //RX_FDDRC_BAND_MARGIN_1 +248 0x0050 //RX_FDDRC_BAND_MARGIN_2 +249 0x0080 //RX_FDDRC_BAND_MARGIN_3 +250 0x0007 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x5000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x6400 //RX_FDDRC_THRD_3_2 +258 0x6400 //RX_FDDRC_THRD_3_3 +259 0x2000 //RX_FDDRC_SLANT_0_0 +260 0x2000 //RX_FDDRC_SLANT_0_1 +261 0x2000 //RX_FDDRC_SLANT_0_2 +262 0x2000 //RX_FDDRC_SLANT_0_3 +263 0x5333 //RX_FDDRC_SLANT_1_0 +264 0x5333 //RX_FDDRC_SLANT_1_1 +265 0x5333 //RX_FDDRC_SLANT_1_2 +266 0x5333 //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +286 0x0100 //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 +#VOL 3 +163 0x1000 //RX_TDDRC_ALPHA_UP_1 +164 0x1000 //RX_TDDRC_ALPHA_UP_2 +165 0x1000 //RX_TDDRC_ALPHA_UP_3 +166 0x1000 //RX_TDDRC_ALPHA_UP_4 +184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +190 0x7FFF //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +269 0x0000 //RX_TDDRC_THRD_0 +270 0x0000 //RX_TDDRC_THRD_1 +271 0x7FFF //RX_TDDRC_THRD_2 +272 0x7FFF //RX_TDDRC_THRD_3 +273 0x7E70 //RX_TDDRC_SLANT_0 +274 0x7FFF //RX_TDDRC_SLANT_1 +275 0x1000 //RX_TDDRC_ALPHA_UP_0 +276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x199A //RX_TDDRC_HMNC_GAIN +279 0x0001 //RX_TDDRC_SMT_FLAG +280 0x0CCD //RX_TDDRC_SMT_W +281 0x0155 //RX_TDDRC_DRC_GAIN +195 0x001C //RX_FDEQ_SUBNUM +196 0x4848 //RX_FDEQ_GAIN_0 +197 0x4848 //RX_FDEQ_GAIN_1 +198 0x4848 //RX_FDEQ_GAIN_2 +199 0x4848 //RX_FDEQ_GAIN_3 +200 0x4848 //RX_FDEQ_GAIN_4 +201 0x4848 //RX_FDEQ_GAIN_5 +202 0x4848 //RX_FDEQ_GAIN_6 +203 0x4848 //RX_FDEQ_GAIN_7 +204 0x4848 //RX_FDEQ_GAIN_8 +205 0x3C3C //RX_FDEQ_GAIN_9 +206 0x3C3C //RX_FDEQ_GAIN_10 +207 0x3838 //RX_FDEQ_GAIN_11 +208 0x3838 //RX_FDEQ_GAIN_12 +209 0x3030 //RX_FDEQ_GAIN_13 +210 0x4848 //RX_FDEQ_GAIN_14 +211 0x4848 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0202 //RX_FDEQ_BIN_0 +221 0x0203 //RX_FDEQ_BIN_1 +222 0x0303 //RX_FDEQ_BIN_2 +223 0x0304 //RX_FDEQ_BIN_3 +224 0x0405 //RX_FDEQ_BIN_4 +225 0x0506 //RX_FDEQ_BIN_5 +226 0x0708 //RX_FDEQ_BIN_6 +227 0x090A //RX_FDEQ_BIN_7 +228 0x0B0C //RX_FDEQ_BIN_8 +229 0x0D0E //RX_FDEQ_BIN_9 +230 0x0E0F //RX_FDEQ_BIN_10 +231 0x0F10 //RX_FDEQ_BIN_11 +232 0x1011 //RX_FDEQ_BIN_12 +233 0x1112 //RX_FDEQ_BIN_13 +234 0x0000 //RX_FDEQ_BIN_14 +235 0x0000 //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x4000 //RX_FDEQ_RESRV_0 +245 0x0320 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0030 //RX_FDDRC_BAND_MARGIN_1 +248 0x0050 //RX_FDDRC_BAND_MARGIN_2 +249 0x0080 //RX_FDDRC_BAND_MARGIN_3 +250 0x0007 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x5000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x6400 //RX_FDDRC_THRD_3_2 +258 0x6400 //RX_FDDRC_THRD_3_3 +259 0x2000 //RX_FDDRC_SLANT_0_0 +260 0x2000 //RX_FDDRC_SLANT_0_1 +261 0x2000 //RX_FDDRC_SLANT_0_2 +262 0x2000 //RX_FDDRC_SLANT_0_3 +263 0x5333 //RX_FDDRC_SLANT_1_0 +264 0x5333 //RX_FDDRC_SLANT_1_1 +265 0x5333 //RX_FDDRC_SLANT_1_2 +266 0x5333 //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +286 0x0100 //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 +#VOL 4 +163 0x1000 //RX_TDDRC_ALPHA_UP_1 +164 0x1000 //RX_TDDRC_ALPHA_UP_2 +165 0x1000 //RX_TDDRC_ALPHA_UP_3 +166 0x1000 //RX_TDDRC_ALPHA_UP_4 +184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +190 0x7FFF //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +269 0x0000 //RX_TDDRC_THRD_0 +270 0x0000 //RX_TDDRC_THRD_1 +271 0x7FFF //RX_TDDRC_THRD_2 +272 0x7FFF //RX_TDDRC_THRD_3 +273 0x7E70 //RX_TDDRC_SLANT_0 +274 0x7FFF //RX_TDDRC_SLANT_1 +275 0x1000 //RX_TDDRC_ALPHA_UP_0 +276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x199A //RX_TDDRC_HMNC_GAIN +279 0x0001 //RX_TDDRC_SMT_FLAG +280 0x0CCD //RX_TDDRC_SMT_W +281 0x0155 //RX_TDDRC_DRC_GAIN +195 0x001C //RX_FDEQ_SUBNUM +196 0x4848 //RX_FDEQ_GAIN_0 +197 0x4848 //RX_FDEQ_GAIN_1 +198 0x4848 //RX_FDEQ_GAIN_2 +199 0x4848 //RX_FDEQ_GAIN_3 +200 0x4848 //RX_FDEQ_GAIN_4 +201 0x4848 //RX_FDEQ_GAIN_5 +202 0x4848 //RX_FDEQ_GAIN_6 +203 0x4848 //RX_FDEQ_GAIN_7 +204 0x4848 //RX_FDEQ_GAIN_8 +205 0x3C3C //RX_FDEQ_GAIN_9 +206 0x3C3C //RX_FDEQ_GAIN_10 +207 0x3838 //RX_FDEQ_GAIN_11 +208 0x3838 //RX_FDEQ_GAIN_12 +209 0x3030 //RX_FDEQ_GAIN_13 +210 0x4848 //RX_FDEQ_GAIN_14 +211 0x4848 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0202 //RX_FDEQ_BIN_0 +221 0x0203 //RX_FDEQ_BIN_1 +222 0x0303 //RX_FDEQ_BIN_2 +223 0x0304 //RX_FDEQ_BIN_3 +224 0x0405 //RX_FDEQ_BIN_4 +225 0x0506 //RX_FDEQ_BIN_5 +226 0x0708 //RX_FDEQ_BIN_6 +227 0x090A //RX_FDEQ_BIN_7 +228 0x0B0C //RX_FDEQ_BIN_8 +229 0x0D0E //RX_FDEQ_BIN_9 +230 0x0E0F //RX_FDEQ_BIN_10 +231 0x0F10 //RX_FDEQ_BIN_11 +232 0x1011 //RX_FDEQ_BIN_12 +233 0x1112 //RX_FDEQ_BIN_13 +234 0x0000 //RX_FDEQ_BIN_14 +235 0x0000 //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x4000 //RX_FDEQ_RESRV_0 +245 0x0320 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0030 //RX_FDDRC_BAND_MARGIN_1 +248 0x0050 //RX_FDDRC_BAND_MARGIN_2 +249 0x0080 //RX_FDDRC_BAND_MARGIN_3 +250 0x0007 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x5000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x6400 //RX_FDDRC_THRD_3_2 +258 0x6400 //RX_FDDRC_THRD_3_3 +259 0x2000 //RX_FDDRC_SLANT_0_0 +260 0x2000 //RX_FDDRC_SLANT_0_1 +261 0x2000 //RX_FDDRC_SLANT_0_2 +262 0x2000 //RX_FDDRC_SLANT_0_3 +263 0x5333 //RX_FDDRC_SLANT_1_0 +264 0x5333 //RX_FDDRC_SLANT_1_1 +265 0x5333 //RX_FDDRC_SLANT_1_2 +266 0x5333 //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +286 0x0100 //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 +#VOL 5 +163 0x1000 //RX_TDDRC_ALPHA_UP_1 +164 0x1000 //RX_TDDRC_ALPHA_UP_2 +165 0x1000 //RX_TDDRC_ALPHA_UP_3 +166 0x1000 //RX_TDDRC_ALPHA_UP_4 +184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +190 0x7FFF //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +269 0x0000 //RX_TDDRC_THRD_0 +270 0x0000 //RX_TDDRC_THRD_1 +271 0x7FFF //RX_TDDRC_THRD_2 +272 0x7FFF //RX_TDDRC_THRD_3 +273 0x7E70 //RX_TDDRC_SLANT_0 +274 0x7FFF //RX_TDDRC_SLANT_1 +275 0x1000 //RX_TDDRC_ALPHA_UP_0 +276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x199A //RX_TDDRC_HMNC_GAIN +279 0x0001 //RX_TDDRC_SMT_FLAG +280 0x0CCD //RX_TDDRC_SMT_W +281 0x0155 //RX_TDDRC_DRC_GAIN +195 0x001C //RX_FDEQ_SUBNUM +196 0x4848 //RX_FDEQ_GAIN_0 +197 0x4848 //RX_FDEQ_GAIN_1 +198 0x4848 //RX_FDEQ_GAIN_2 +199 0x4848 //RX_FDEQ_GAIN_3 +200 0x4848 //RX_FDEQ_GAIN_4 +201 0x4848 //RX_FDEQ_GAIN_5 +202 0x4848 //RX_FDEQ_GAIN_6 +203 0x4848 //RX_FDEQ_GAIN_7 +204 0x4848 //RX_FDEQ_GAIN_8 +205 0x3C3C //RX_FDEQ_GAIN_9 +206 0x3C3C //RX_FDEQ_GAIN_10 +207 0x3838 //RX_FDEQ_GAIN_11 +208 0x3838 //RX_FDEQ_GAIN_12 +209 0x3030 //RX_FDEQ_GAIN_13 +210 0x4848 //RX_FDEQ_GAIN_14 +211 0x4848 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0202 //RX_FDEQ_BIN_0 +221 0x0203 //RX_FDEQ_BIN_1 +222 0x0303 //RX_FDEQ_BIN_2 +223 0x0304 //RX_FDEQ_BIN_3 +224 0x0405 //RX_FDEQ_BIN_4 +225 0x0506 //RX_FDEQ_BIN_5 +226 0x0708 //RX_FDEQ_BIN_6 +227 0x090A //RX_FDEQ_BIN_7 +228 0x0B0C //RX_FDEQ_BIN_8 +229 0x0D0E //RX_FDEQ_BIN_9 +230 0x0E0F //RX_FDEQ_BIN_10 +231 0x0F10 //RX_FDEQ_BIN_11 +232 0x1011 //RX_FDEQ_BIN_12 +233 0x1112 //RX_FDEQ_BIN_13 +234 0x0000 //RX_FDEQ_BIN_14 +235 0x0000 //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x4000 //RX_FDEQ_RESRV_0 +245 0x0320 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0030 //RX_FDDRC_BAND_MARGIN_1 +248 0x0050 //RX_FDDRC_BAND_MARGIN_2 +249 0x0080 //RX_FDDRC_BAND_MARGIN_3 +250 0x0007 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x5000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x6400 //RX_FDDRC_THRD_3_2 +258 0x6400 //RX_FDDRC_THRD_3_3 +259 0x2000 //RX_FDDRC_SLANT_0_0 +260 0x2000 //RX_FDDRC_SLANT_0_1 +261 0x2000 //RX_FDDRC_SLANT_0_2 +262 0x2000 //RX_FDDRC_SLANT_0_3 +263 0x5333 //RX_FDDRC_SLANT_1_0 +264 0x5333 //RX_FDDRC_SLANT_1_1 +265 0x5333 //RX_FDDRC_SLANT_1_2 +266 0x5333 //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +286 0x0100 //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 +#VOL 6 +163 0x1000 //RX_TDDRC_ALPHA_UP_1 +164 0x1000 //RX_TDDRC_ALPHA_UP_2 +165 0x1000 //RX_TDDRC_ALPHA_UP_3 +166 0x1000 //RX_TDDRC_ALPHA_UP_4 +184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +190 0x7FFF //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +269 0x0000 //RX_TDDRC_THRD_0 +270 0x0000 //RX_TDDRC_THRD_1 +271 0x7FFF //RX_TDDRC_THRD_2 +272 0x7FFF //RX_TDDRC_THRD_3 +273 0x7E70 //RX_TDDRC_SLANT_0 +274 0x7FFF //RX_TDDRC_SLANT_1 +275 0x1000 //RX_TDDRC_ALPHA_UP_0 +276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x199A //RX_TDDRC_HMNC_GAIN +279 0x0001 //RX_TDDRC_SMT_FLAG +280 0x0CCD //RX_TDDRC_SMT_W +281 0x0155 //RX_TDDRC_DRC_GAIN +195 0x001C //RX_FDEQ_SUBNUM +196 0x4848 //RX_FDEQ_GAIN_0 +197 0x4848 //RX_FDEQ_GAIN_1 +198 0x4848 //RX_FDEQ_GAIN_2 +199 0x4848 //RX_FDEQ_GAIN_3 +200 0x4848 //RX_FDEQ_GAIN_4 +201 0x4848 //RX_FDEQ_GAIN_5 +202 0x4848 //RX_FDEQ_GAIN_6 +203 0x4848 //RX_FDEQ_GAIN_7 +204 0x4848 //RX_FDEQ_GAIN_8 +205 0x3C3C //RX_FDEQ_GAIN_9 +206 0x3C3C //RX_FDEQ_GAIN_10 +207 0x3838 //RX_FDEQ_GAIN_11 +208 0x3838 //RX_FDEQ_GAIN_12 +209 0x3030 //RX_FDEQ_GAIN_13 +210 0x4848 //RX_FDEQ_GAIN_14 +211 0x4848 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0202 //RX_FDEQ_BIN_0 +221 0x0203 //RX_FDEQ_BIN_1 +222 0x0303 //RX_FDEQ_BIN_2 +223 0x0304 //RX_FDEQ_BIN_3 +224 0x0405 //RX_FDEQ_BIN_4 +225 0x0506 //RX_FDEQ_BIN_5 +226 0x0708 //RX_FDEQ_BIN_6 +227 0x090A //RX_FDEQ_BIN_7 +228 0x0B0C //RX_FDEQ_BIN_8 +229 0x0D0E //RX_FDEQ_BIN_9 +230 0x0E0F //RX_FDEQ_BIN_10 +231 0x0F10 //RX_FDEQ_BIN_11 +232 0x1011 //RX_FDEQ_BIN_12 +233 0x1112 //RX_FDEQ_BIN_13 +234 0x0000 //RX_FDEQ_BIN_14 +235 0x0000 //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x4000 //RX_FDEQ_RESRV_0 +245 0x0320 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0030 //RX_FDDRC_BAND_MARGIN_1 +248 0x0050 //RX_FDDRC_BAND_MARGIN_2 +249 0x0080 //RX_FDDRC_BAND_MARGIN_3 +250 0x0007 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x5000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x6400 //RX_FDDRC_THRD_3_2 +258 0x6400 //RX_FDDRC_THRD_3_3 +259 0x2000 //RX_FDDRC_SLANT_0_0 +260 0x2000 //RX_FDDRC_SLANT_0_1 +261 0x2000 //RX_FDDRC_SLANT_0_2 +262 0x2000 //RX_FDDRC_SLANT_0_3 +263 0x5333 //RX_FDDRC_SLANT_1_0 +264 0x5333 //RX_FDDRC_SLANT_1_1 +265 0x5333 //RX_FDDRC_SLANT_1_2 +266 0x5333 //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +286 0x0100 //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 #CASE_NAME BLUETOOTH-BTNB_NREC-VOICE_GENERIC-SWB -#PARAM_TYPE TX+RX -#TOTAL_CUSTOM_STEP 7 +#PARAM_MODE Full +#PARAM_TYPE TX+2RX +#TOTAL_CUSTOM_STEP 7+7 #TX 0 0x0001 //TX_OPERATION_MODE_0 1 0x0001 //TX_OPERATION_MODE_1 @@ -19541,20 +29629,20 @@ 248 0xF400 //TX_THR_SN_EST_6 249 0xF600 //TX_THR_SN_EST_7 250 0x0000 //TX_DELTA_THR_SN_EST_0 -251 0x0000 //TX_DELTA_THR_SN_EST_1 +251 0x0200 //TX_DELTA_THR_SN_EST_1 252 0x0200 //TX_DELTA_THR_SN_EST_2 253 0x0200 //TX_DELTA_THR_SN_EST_3 254 0x0200 //TX_DELTA_THR_SN_EST_4 255 0x0200 //TX_DELTA_THR_SN_EST_5 -256 0x0200 //TX_DELTA_THR_SN_EST_6 +256 0x0000 //TX_DELTA_THR_SN_EST_6 257 0x0200 //TX_DELTA_THR_SN_EST_7 258 0x6000 //TX_LAMBDA_NN_EST_0 -259 0x6000 //TX_LAMBDA_NN_EST_1 +259 0x4000 //TX_LAMBDA_NN_EST_1 260 0x4000 //TX_LAMBDA_NN_EST_2 261 0x4000 //TX_LAMBDA_NN_EST_3 262 0x4000 //TX_LAMBDA_NN_EST_4 263 0x4000 //TX_LAMBDA_NN_EST_5 -264 0x4000 //TX_LAMBDA_NN_EST_6 +264 0x6000 //TX_LAMBDA_NN_EST_6 265 0x4000 //TX_LAMBDA_NN_EST_7 266 0x0400 //TX_N_SN_EST 267 0x001E //TX_INBEAM_T @@ -19572,16 +29660,16 @@ 279 0x1000 //TX_B_POST_FLT_0 280 0x1000 //TX_B_POST_FLT_1 281 0x000B //TX_NS_LVL_CTRL_0 -282 0x000F //TX_NS_LVL_CTRL_1 -283 0x0011 //TX_NS_LVL_CTRL_2 +282 0x0011 //TX_NS_LVL_CTRL_1 +283 0x000F //TX_NS_LVL_CTRL_2 284 0x000F //TX_NS_LVL_CTRL_3 285 0x000F //TX_NS_LVL_CTRL_4 286 0x000F //TX_NS_LVL_CTRL_5 287 0x000F //TX_NS_LVL_CTRL_6 288 0x0011 //TX_NS_LVL_CTRL_7 289 0x000C //TX_MIN_GAIN_S_0 -290 0x000C //TX_MIN_GAIN_S_1 -291 0x000F //TX_MIN_GAIN_S_2 +290 0x000F //TX_MIN_GAIN_S_1 +291 0x000C //TX_MIN_GAIN_S_2 292 0x000C //TX_MIN_GAIN_S_3 293 0x000C //TX_MIN_GAIN_S_4 294 0x000C //TX_MIN_GAIN_S_5 @@ -19605,12 +29693,12 @@ 312 0x7FFF //TX_A_POST_FILT_0 313 0x2000 //TX_A_POST_FILT_1 314 0x2000 //TX_A_POST_FILT_S_0 -315 0x4000 //TX_A_POST_FILT_S_1 +315 0x5000 //TX_A_POST_FILT_S_1 316 0x5000 //TX_A_POST_FILT_S_2 317 0x5000 //TX_A_POST_FILT_S_3 318 0x5000 //TX_A_POST_FILT_S_4 319 0x5000 //TX_A_POST_FILT_S_5 -320 0x5000 //TX_A_POST_FILT_S_6 +320 0x4000 //TX_A_POST_FILT_S_6 321 0x5000 //TX_A_POST_FILT_S_7 322 0x1000 //TX_B_POST_FILT_0 323 0x1000 //TX_B_POST_FILT_1 @@ -19670,10 +29758,10 @@ 377 0x7FFF //TX_NOISE_TH_5_4 378 0x044C //TX_NOISE_TH_6 379 0x0014 //TX_MINENOISE_TH -380 0x4000 //TX_MINENOISE_MIC0_TH_MTS -381 0xFFEE //TX_MINENOISE_MIC0_TH_EXP -382 0x6000 //TX_MINENOISE_MIC0_S_TH_MTS -383 0xFFF3 //TX_MINENOISE_MIC0_S_TH_EXP +380 0x4000 //TX_MORENS_TFMASK_TH +381 0xFFEE //TX_DRC_QUIET_FLOOR +382 0x6000 //TX_RATIODTL_CUT_TH +383 0xFFF3 //TX_DT_CUT_K1 384 0x0666 //TX_OUT_ENER_S_TH_CLEAN 385 0x0666 //TX_OUT_ENER_S_TH_LESSCLEAN 386 0x0333 //TX_OUT_ENER_S_TH_NOISY @@ -19681,15 +29769,15 @@ 388 0x0333 //TX_OUT_ENER_TH_SPEECH 389 0x2000 //TX_SN_NPB_GAIN 390 0x0000 //TX_NN_NPB_GAIN -391 0x0000 //TX_CSX_ALPHA_0 -392 0x0000 //TX_CSX_ALPHA_1 -393 0x0000 //TX_CSX_ALPHA_2 -394 0x0000 //TX_CSX_ALPHA_3 -395 0x0800 //TX_MU_ARSP_EST -396 0x00C8 //TX_P_OUTBEAM_MIN_TH +391 0x0000 //TX_POST_MASK_SUP_HSNE +392 0x0000 //TX_TAIL_DET_TH +393 0x0000 //TX_B_LESSCUT_RTO_WTA +394 0x0000 //TX_MEL_G_R +395 0x0800 //TX_SUPHIGH_TH +396 0x00C8 //TX_MASK_G_R 397 0x0002 //TX_EXTRA_NS_L -398 0x0800 //TX_EXTRA_NS_A -399 0x0005 //TX_VR_NOISE_FLOOR_TH +398 0x0800 //TX_C_POST_FLT_MASK +399 0x0005 //TX_A_POST_FLT_WNS 400 0x0148 //TX_MIN_G_LOW300HZ 401 0x0002 //TX_MAXLEVEL_CNG 402 0x00B4 //TX_STN_NOISE_TH @@ -19804,16 +29892,16 @@ 511 0x6666 //TX_MIC_TO_BFGAIN 512 0x0000 //TX_MICTOBFGAIN0 513 0x0000 //TX_FASTMUE_TH -514 0x0000 //TX_DERVB_LEN_0 -515 0x0000 //TX_DERVB_LEN_1 -516 0x0000 //TX_RHO_DERVB -517 0x0000 //TX_MIC_INDX_DERVB -518 0x0000 //TX_MU_DERVB -519 0x0000 //TX_DR_RESRV_0 -520 0x0000 //TX_DR_RESRV_1 -521 0x0000 //TX_DR_RESRV_2 -522 0x0000 //TX_DR_RESRV_3 -523 0x0000 //TX_DR_RESRV_4 +514 0x0000 //TX_DEREVERB_LF_MU +515 0x0000 //TX_DEREVERB_HF_MU +516 0x0000 //TX_DEREVERB_DELAY +517 0x0000 //TX_DEREVERB_COEF_LEN +518 0x0000 //TX_DEREVERB_DNR +519 0x0000 //TX_DEREVERB_ALPHA +520 0x0000 //TX_DEREVERB_BETA +521 0x0000 //TX_GSC_RTOL_TH +522 0x0000 //TX_GSC_RTOH_TH +523 0x0000 //TX_WIDE2_MEANHTH 524 0x0000 //TX_DR_RESRV_5 525 0x0000 //TX_DR_RESRV_6 526 0x0000 //TX_DR_RESRV_7 @@ -20187,8 +30275,73 @@ 894 0xC000 //TX_FASTNS_SSA_THHFL 895 0xCCCC //TX_FASTNS_SSA_THLFH 896 0xD999 //TX_FASTNS_SSA_THHFH +897 0x0000 //TX_SENDFUNC_REG_MICMUTE +898 0x0000 //TX_SENDFUNC_REG_MICMUTE1 +899 0x0000 //TX_MICMUTE_RATIO_THR +900 0x0000 //TX_MICMUTE_AMP_THR +901 0x0000 //TX_MICMUTE_HPF_IND +902 0x0000 //TX_MICMUTE_LOG_EYR_TH +903 0x0000 //TX_MICMUTE_CVG_TIME +904 0x0000 //TX_MICMUTE_RELEASE_TIME +905 0x0000 //TX_MIC_VOLUME_MIC0MUTE +906 0x0000 //TX_MICMUTE_EPD_OFFSET_0 +907 0x0000 //TX_MICMUTE_FRQ_AEC_L +908 0x0000 //TX_MICMUTE_EAD_THR +909 0x0000 //TX_MICMUTE_LAMBDA_CB_NLE +910 0x0000 //TX_MICMUTE_LAMBDA_RE_EST +911 0x0000 //TX_DTD_THR1_MICMUTE_0 +912 0x0000 //TX_DTD_THR1_MICMUTE_1 +913 0x0000 //TX_DTD_THR1_MICMUTE_2 +914 0x0000 //TX_DTD_THR1_MICMUTE_3 +915 0x0000 //TX_DTD_THR2_MICMUTE_0 +916 0x0000 //TX_MICMUTE_MIN_EQ_RE_EST_0 +917 0x0000 //TX_MICMUTE_MIN_EQ_RE_EST_1 +918 0x0000 //TX_MICMUTE_MIN_EQ_RE_EST_2 +919 0x0000 //TX_MICMUTE_MIN_EQ_RE_EST_3 +920 0x0000 //TX_MICMUTE_MIN_EQ_RE_EST_4 +921 0x0000 //TX_MICMUTE_C_POST_FLT +922 0x0000 //TX_MICMUTE_DT_CUT_K +923 0x0000 //TX_MICMUTE_DT_CUT_THR +924 0x0000 //TX_MICMUTE_DT_CUT_K2 +925 0x0000 //TX_MICMUTE_DT_CUT_THR2 +926 0x0000 //TX_MICMUTE_DT2_HOLD_N +927 0x0000 //TX_MICMUTE_RATIODTH_THCUT +928 0x0000 //TX_MICMUTE_B_POST_FLT_ECHOL +929 0x0000 //TX_MICMUTE_B_POST_FLT_ECHOH +930 0x0000 //TX_MICMUTE_C_POST_FLT_MASK +931 0x0000 //TX_MICMUTE_RATIODTL_CUT_TH +932 0x0000 //TX_MICMUTE_DT_CUT_K1 +933 0x0000 //TX_MICMUTE_N2_SN_EST +934 0x0000 //TX_MICMUTE_THR_SN_EST_0 +935 0x0000 //TX_MICMUTE_MIN_G_CTRL_0 +936 0x0000 //TX_MICMUTE_A_POST_FILT_S_0 +937 0x0000 //TX_MICMUTE_B_POST_FILT_0 +938 0x0000 //TX_MIC1RUB_AMP_THR +939 0x0000 //TX_MIC1MUTE_RATIO_THR +940 0x0000 //TX_MIC1MUTE_AMP_THR +941 0x0000 //TX_MIC1MUTE_CVG_TIME +942 0x0000 //TX_MIC1MUTE_RELEASE_TIME +943 0x0000 //TX_AMS_RESRV_01 +944 0x0000 //TX_AMS_RESRV_02 +945 0x0000 //TX_AMS_RESRV_03 +946 0x0000 //TX_AMS_RESRV_04 +947 0x0000 //TX_AMS_RESRV_05 +948 0x0000 //TX_AMS_RESRV_06 +949 0x0000 //TX_AMS_RESRV_07 +950 0x0000 //TX_AMS_RESRV_08 +951 0x0000 //TX_AMS_RESRV_09 +952 0x0000 //TX_AMS_RESRV_10 +953 0x0000 //TX_AMS_RESRV_11 +954 0x0000 //TX_AMS_RESRV_12 +955 0x0000 //TX_AMS_RESRV_13 +956 0x0000 //TX_AMS_RESRV_14 +957 0x0000 //TX_AMS_RESRV_15 +958 0x0000 //TX_AMS_RESRV_16 +959 0x0000 //TX_AMS_RESRV_17 +960 0x0000 //TX_AMS_RESRV_18 +961 0x0000 //TX_AMS_RESRV_19 #RX -0 0x0064 //RX_RECVFUNC_MODE_0 +0 0x2064 //RX_RECVFUNC_MODE_0 1 0x0000 //RX_RECVFUNC_MODE_1 2 0x0003 //RX_SAMPLINGFREQ_SIG 3 0x0003 //RX_SAMPLINGFREQ_PROC @@ -21038,10 +31191,862 @@ 110 0x0000 //RX_FDDRC_RESRV_0 129 0x0100 //RX_SPK_VOL 130 0x0000 //RX_VOL_RESRV_0 +#RX 2 +157 0x2064 //RX_RECVFUNC_MODE_0 +158 0x0000 //RX_RECVFUNC_MODE_1 +159 0x0003 //RX_SAMPLINGFREQ_SIG +160 0x0003 //RX_SAMPLINGFREQ_PROC +161 0x000A //RX_FRAME_SZ +162 0x0000 //RX_DELAY_OPT +163 0x3000 //RX_TDDRC_ALPHA_UP_1 +164 0x3000 //RX_TDDRC_ALPHA_UP_2 +165 0x3000 //RX_TDDRC_ALPHA_UP_3 +166 0x3000 //RX_TDDRC_ALPHA_UP_4 +167 0x0800 //RX_PGA +168 0x7FFF //RX_A_HP +169 0x0000 //RX_B_PE +170 0x1800 //RX_THR_PITCH_DET_0 +171 0x1000 //RX_THR_PITCH_DET_1 +172 0x0800 //RX_THR_PITCH_DET_2 +173 0x0008 //RX_PITCH_BFR_LEN +174 0x0003 //RX_SBD_PITCH_DET +175 0x0100 //RX_PP_RESRV_0 +176 0x0020 //RX_PP_RESRV_1 +177 0x0400 //RX_N_SN_EST +178 0x000C //RX_N2_SN_EST +179 0x0003 //RX_NS_LVL_CTRL +180 0x9000 //RX_THR_SN_EST +181 0x7CCD //RX_LAMBDA_PFILT +182 0x000A //RX_FENS_RESRV_0 +183 0x0190 //RX_FENS_RESRV_1 +184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +187 0x0002 //RX_EXTRA_NS_L +188 0x0800 //RX_EXTRA_NS_A +189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +190 0x7FFF //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +192 0x199A //RX_A_POST_FLT +193 0x0000 //RX_LMT_THRD +194 0x4000 //RX_LMT_ALPHA +195 0x0020 //RX_FDEQ_SUBNUM +196 0x4848 //RX_FDEQ_GAIN_0 +197 0x4848 //RX_FDEQ_GAIN_1 +198 0x4848 //RX_FDEQ_GAIN_2 +199 0x4848 //RX_FDEQ_GAIN_3 +200 0x4848 //RX_FDEQ_GAIN_4 +201 0x4848 //RX_FDEQ_GAIN_5 +202 0x4848 //RX_FDEQ_GAIN_6 +203 0x4848 //RX_FDEQ_GAIN_7 +204 0x4848 //RX_FDEQ_GAIN_8 +205 0x4848 //RX_FDEQ_GAIN_9 +206 0x4848 //RX_FDEQ_GAIN_10 +207 0x4848 //RX_FDEQ_GAIN_11 +208 0x4848 //RX_FDEQ_GAIN_12 +209 0x4848 //RX_FDEQ_GAIN_13 +210 0x4848 //RX_FDEQ_GAIN_14 +211 0x4848 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0202 //RX_FDEQ_BIN_0 +221 0x0203 //RX_FDEQ_BIN_1 +222 0x0303 //RX_FDEQ_BIN_2 +223 0x0304 //RX_FDEQ_BIN_3 +224 0x0405 //RX_FDEQ_BIN_4 +225 0x0506 //RX_FDEQ_BIN_5 +226 0x0708 //RX_FDEQ_BIN_6 +227 0x090A //RX_FDEQ_BIN_7 +228 0x0B0C //RX_FDEQ_BIN_8 +229 0x0D0E //RX_FDEQ_BIN_9 +230 0x1013 //RX_FDEQ_BIN_10 +231 0x1719 //RX_FDEQ_BIN_11 +232 0x1B1E //RX_FDEQ_BIN_12 +233 0x1E1E //RX_FDEQ_BIN_13 +234 0x1E28 //RX_FDEQ_BIN_14 +235 0x282C //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x4000 //RX_FDEQ_RESRV_0 +245 0x0320 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0030 //RX_FDDRC_BAND_MARGIN_1 +248 0x0050 //RX_FDDRC_BAND_MARGIN_2 +249 0x0080 //RX_FDDRC_BAND_MARGIN_3 +250 0x0007 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x5000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x6400 //RX_FDDRC_THRD_3_2 +258 0x6400 //RX_FDDRC_THRD_3_3 +259 0x2000 //RX_FDDRC_SLANT_0_0 +260 0x2000 //RX_FDDRC_SLANT_0_1 +261 0x2000 //RX_FDDRC_SLANT_0_2 +262 0x2000 //RX_FDDRC_SLANT_0_3 +263 0x5333 //RX_FDDRC_SLANT_1_0 +264 0x5333 //RX_FDDRC_SLANT_1_1 +265 0x5333 //RX_FDDRC_SLANT_1_2 +266 0x5333 //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +268 0x0000 //RX_FILTINDX +269 0x0000 //RX_TDDRC_THRD_0 +270 0x0000 //RX_TDDRC_THRD_1 +271 0x7FFF //RX_TDDRC_THRD_2 +272 0x7FFF //RX_TDDRC_THRD_3 +273 0x7FFF //RX_TDDRC_SLANT_0 +274 0x7FFF //RX_TDDRC_SLANT_1 +275 0x3000 //RX_TDDRC_ALPHA_UP_0 +276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x199A //RX_TDDRC_HMNC_GAIN +279 0x0001 //RX_TDDRC_SMT_FLAG +280 0x0CCD //RX_TDDRC_SMT_W +281 0x0155 //RX_TDDRC_DRC_GAIN +282 0x7C00 //RX_LAMBDA_PKA_FP +283 0x2000 //RX_TPKA_FP +284 0x2000 //RX_MIN_G_FP +285 0x0080 //RX_MAX_G_FP +286 0x0100 //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 +288 0x0000 //RX_MAXLEVEL_CNG +289 0x3000 //RX_BWE_UV_TH +290 0x3000 //RX_BWE_UV_TH2 +291 0x1800 //RX_BWE_UV_TH3 +292 0x1000 //RX_BWE_V_TH +293 0x04CD //RX_BWE_GAIN1_V_TH1 +294 0x0F33 //RX_BWE_GAIN1_V_TH2 +295 0x7333 //RX_BWE_UV_EQ +296 0x199A //RX_BWE_V_EQ +297 0x7333 //RX_BWE_TONE_TH +298 0x0004 //RX_BWE_UV_HOLD_T +299 0x6CCD //RX_BWE_GAIN2_ALPHA +300 0x799A //RX_BWE_GAIN3_ALPHA +301 0x001E //RX_BWE_CUTOFF +302 0x3000 //RX_BWE_GAINFILL +303 0x3200 //RX_BWE_MAXTH_TONE +304 0x2000 //RX_BWE_EQ_0 +305 0x2000 //RX_BWE_EQ_1 +306 0x2000 //RX_BWE_EQ_2 +307 0x2000 //RX_BWE_EQ_3 +308 0x2000 //RX_BWE_EQ_4 +309 0x2000 //RX_BWE_EQ_5 +310 0x2000 //RX_BWE_EQ_6 +311 0x0000 //RX_BWE_RESRV_0 +312 0x0000 //RX_BWE_RESRV_1 +313 0x0000 //RX_BWE_RESRV_2 +#VOL 0 +163 0x3000 //RX_TDDRC_ALPHA_UP_1 +164 0x3000 //RX_TDDRC_ALPHA_UP_2 +165 0x3000 //RX_TDDRC_ALPHA_UP_3 +166 0x3000 //RX_TDDRC_ALPHA_UP_4 +184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +190 0x7FFF //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +269 0x0000 //RX_TDDRC_THRD_0 +270 0x0000 //RX_TDDRC_THRD_1 +271 0x7FFF //RX_TDDRC_THRD_2 +272 0x7FFF //RX_TDDRC_THRD_3 +273 0x7FFF //RX_TDDRC_SLANT_0 +274 0x7FFF //RX_TDDRC_SLANT_1 +275 0x3000 //RX_TDDRC_ALPHA_UP_0 +276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x199A //RX_TDDRC_HMNC_GAIN +279 0x0001 //RX_TDDRC_SMT_FLAG +280 0x0CCD //RX_TDDRC_SMT_W +281 0x0155 //RX_TDDRC_DRC_GAIN +195 0x0020 //RX_FDEQ_SUBNUM +196 0x4848 //RX_FDEQ_GAIN_0 +197 0x4848 //RX_FDEQ_GAIN_1 +198 0x4848 //RX_FDEQ_GAIN_2 +199 0x4848 //RX_FDEQ_GAIN_3 +200 0x4848 //RX_FDEQ_GAIN_4 +201 0x4848 //RX_FDEQ_GAIN_5 +202 0x4848 //RX_FDEQ_GAIN_6 +203 0x4848 //RX_FDEQ_GAIN_7 +204 0x4848 //RX_FDEQ_GAIN_8 +205 0x4848 //RX_FDEQ_GAIN_9 +206 0x4848 //RX_FDEQ_GAIN_10 +207 0x4848 //RX_FDEQ_GAIN_11 +208 0x4848 //RX_FDEQ_GAIN_12 +209 0x4848 //RX_FDEQ_GAIN_13 +210 0x4848 //RX_FDEQ_GAIN_14 +211 0x4848 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0202 //RX_FDEQ_BIN_0 +221 0x0203 //RX_FDEQ_BIN_1 +222 0x0303 //RX_FDEQ_BIN_2 +223 0x0304 //RX_FDEQ_BIN_3 +224 0x0405 //RX_FDEQ_BIN_4 +225 0x0506 //RX_FDEQ_BIN_5 +226 0x0708 //RX_FDEQ_BIN_6 +227 0x090A //RX_FDEQ_BIN_7 +228 0x0B0C //RX_FDEQ_BIN_8 +229 0x0D0E //RX_FDEQ_BIN_9 +230 0x1013 //RX_FDEQ_BIN_10 +231 0x1719 //RX_FDEQ_BIN_11 +232 0x1B1E //RX_FDEQ_BIN_12 +233 0x1E1E //RX_FDEQ_BIN_13 +234 0x1E28 //RX_FDEQ_BIN_14 +235 0x282C //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x4000 //RX_FDEQ_RESRV_0 +245 0x0320 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0030 //RX_FDDRC_BAND_MARGIN_1 +248 0x0050 //RX_FDDRC_BAND_MARGIN_2 +249 0x0080 //RX_FDDRC_BAND_MARGIN_3 +250 0x0007 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x5000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x6400 //RX_FDDRC_THRD_3_2 +258 0x6400 //RX_FDDRC_THRD_3_3 +259 0x2000 //RX_FDDRC_SLANT_0_0 +260 0x2000 //RX_FDDRC_SLANT_0_1 +261 0x2000 //RX_FDDRC_SLANT_0_2 +262 0x2000 //RX_FDDRC_SLANT_0_3 +263 0x5333 //RX_FDDRC_SLANT_1_0 +264 0x5333 //RX_FDDRC_SLANT_1_1 +265 0x5333 //RX_FDDRC_SLANT_1_2 +266 0x5333 //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +286 0x0100 //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 +#VOL 1 +163 0x3000 //RX_TDDRC_ALPHA_UP_1 +164 0x3000 //RX_TDDRC_ALPHA_UP_2 +165 0x3000 //RX_TDDRC_ALPHA_UP_3 +166 0x3000 //RX_TDDRC_ALPHA_UP_4 +184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +190 0x7FFF //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +269 0x0000 //RX_TDDRC_THRD_0 +270 0x0000 //RX_TDDRC_THRD_1 +271 0x7FFF //RX_TDDRC_THRD_2 +272 0x7FFF //RX_TDDRC_THRD_3 +273 0x7FFF //RX_TDDRC_SLANT_0 +274 0x7FFF //RX_TDDRC_SLANT_1 +275 0x3000 //RX_TDDRC_ALPHA_UP_0 +276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x199A //RX_TDDRC_HMNC_GAIN +279 0x0001 //RX_TDDRC_SMT_FLAG +280 0x0CCD //RX_TDDRC_SMT_W +281 0x0155 //RX_TDDRC_DRC_GAIN +195 0x0020 //RX_FDEQ_SUBNUM +196 0x4848 //RX_FDEQ_GAIN_0 +197 0x4848 //RX_FDEQ_GAIN_1 +198 0x4848 //RX_FDEQ_GAIN_2 +199 0x4848 //RX_FDEQ_GAIN_3 +200 0x4848 //RX_FDEQ_GAIN_4 +201 0x4848 //RX_FDEQ_GAIN_5 +202 0x4848 //RX_FDEQ_GAIN_6 +203 0x4848 //RX_FDEQ_GAIN_7 +204 0x4848 //RX_FDEQ_GAIN_8 +205 0x4848 //RX_FDEQ_GAIN_9 +206 0x4848 //RX_FDEQ_GAIN_10 +207 0x4848 //RX_FDEQ_GAIN_11 +208 0x4848 //RX_FDEQ_GAIN_12 +209 0x4848 //RX_FDEQ_GAIN_13 +210 0x4848 //RX_FDEQ_GAIN_14 +211 0x4848 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0202 //RX_FDEQ_BIN_0 +221 0x0203 //RX_FDEQ_BIN_1 +222 0x0303 //RX_FDEQ_BIN_2 +223 0x0304 //RX_FDEQ_BIN_3 +224 0x0405 //RX_FDEQ_BIN_4 +225 0x0506 //RX_FDEQ_BIN_5 +226 0x0708 //RX_FDEQ_BIN_6 +227 0x090A //RX_FDEQ_BIN_7 +228 0x0B0C //RX_FDEQ_BIN_8 +229 0x0D0E //RX_FDEQ_BIN_9 +230 0x1013 //RX_FDEQ_BIN_10 +231 0x1719 //RX_FDEQ_BIN_11 +232 0x1B1E //RX_FDEQ_BIN_12 +233 0x1E1E //RX_FDEQ_BIN_13 +234 0x1E28 //RX_FDEQ_BIN_14 +235 0x282C //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x4000 //RX_FDEQ_RESRV_0 +245 0x0320 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0030 //RX_FDDRC_BAND_MARGIN_1 +248 0x0050 //RX_FDDRC_BAND_MARGIN_2 +249 0x0080 //RX_FDDRC_BAND_MARGIN_3 +250 0x0007 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x5000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x6400 //RX_FDDRC_THRD_3_2 +258 0x6400 //RX_FDDRC_THRD_3_3 +259 0x2000 //RX_FDDRC_SLANT_0_0 +260 0x2000 //RX_FDDRC_SLANT_0_1 +261 0x2000 //RX_FDDRC_SLANT_0_2 +262 0x2000 //RX_FDDRC_SLANT_0_3 +263 0x5333 //RX_FDDRC_SLANT_1_0 +264 0x5333 //RX_FDDRC_SLANT_1_1 +265 0x5333 //RX_FDDRC_SLANT_1_2 +266 0x5333 //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +286 0x0100 //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 +#VOL 2 +163 0x3000 //RX_TDDRC_ALPHA_UP_1 +164 0x3000 //RX_TDDRC_ALPHA_UP_2 +165 0x3000 //RX_TDDRC_ALPHA_UP_3 +166 0x3000 //RX_TDDRC_ALPHA_UP_4 +184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +190 0x7FFF //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +269 0x0000 //RX_TDDRC_THRD_0 +270 0x0000 //RX_TDDRC_THRD_1 +271 0x7FFF //RX_TDDRC_THRD_2 +272 0x7FFF //RX_TDDRC_THRD_3 +273 0x7FFF //RX_TDDRC_SLANT_0 +274 0x7FFF //RX_TDDRC_SLANT_1 +275 0x3000 //RX_TDDRC_ALPHA_UP_0 +276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x199A //RX_TDDRC_HMNC_GAIN +279 0x0001 //RX_TDDRC_SMT_FLAG +280 0x0CCD //RX_TDDRC_SMT_W +281 0x0155 //RX_TDDRC_DRC_GAIN +195 0x0020 //RX_FDEQ_SUBNUM +196 0x4848 //RX_FDEQ_GAIN_0 +197 0x4848 //RX_FDEQ_GAIN_1 +198 0x4848 //RX_FDEQ_GAIN_2 +199 0x4848 //RX_FDEQ_GAIN_3 +200 0x4848 //RX_FDEQ_GAIN_4 +201 0x4848 //RX_FDEQ_GAIN_5 +202 0x4848 //RX_FDEQ_GAIN_6 +203 0x4848 //RX_FDEQ_GAIN_7 +204 0x4848 //RX_FDEQ_GAIN_8 +205 0x4848 //RX_FDEQ_GAIN_9 +206 0x4848 //RX_FDEQ_GAIN_10 +207 0x4848 //RX_FDEQ_GAIN_11 +208 0x4848 //RX_FDEQ_GAIN_12 +209 0x4848 //RX_FDEQ_GAIN_13 +210 0x4848 //RX_FDEQ_GAIN_14 +211 0x4848 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0202 //RX_FDEQ_BIN_0 +221 0x0203 //RX_FDEQ_BIN_1 +222 0x0303 //RX_FDEQ_BIN_2 +223 0x0304 //RX_FDEQ_BIN_3 +224 0x0405 //RX_FDEQ_BIN_4 +225 0x0506 //RX_FDEQ_BIN_5 +226 0x0708 //RX_FDEQ_BIN_6 +227 0x090A //RX_FDEQ_BIN_7 +228 0x0B0C //RX_FDEQ_BIN_8 +229 0x0D0E //RX_FDEQ_BIN_9 +230 0x1013 //RX_FDEQ_BIN_10 +231 0x1719 //RX_FDEQ_BIN_11 +232 0x1B1E //RX_FDEQ_BIN_12 +233 0x1E1E //RX_FDEQ_BIN_13 +234 0x1E28 //RX_FDEQ_BIN_14 +235 0x282C //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x4000 //RX_FDEQ_RESRV_0 +245 0x0320 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0030 //RX_FDDRC_BAND_MARGIN_1 +248 0x0050 //RX_FDDRC_BAND_MARGIN_2 +249 0x0080 //RX_FDDRC_BAND_MARGIN_3 +250 0x0007 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x5000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x6400 //RX_FDDRC_THRD_3_2 +258 0x6400 //RX_FDDRC_THRD_3_3 +259 0x2000 //RX_FDDRC_SLANT_0_0 +260 0x2000 //RX_FDDRC_SLANT_0_1 +261 0x2000 //RX_FDDRC_SLANT_0_2 +262 0x2000 //RX_FDDRC_SLANT_0_3 +263 0x5333 //RX_FDDRC_SLANT_1_0 +264 0x5333 //RX_FDDRC_SLANT_1_1 +265 0x5333 //RX_FDDRC_SLANT_1_2 +266 0x5333 //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +286 0x0100 //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 +#VOL 3 +163 0x3000 //RX_TDDRC_ALPHA_UP_1 +164 0x3000 //RX_TDDRC_ALPHA_UP_2 +165 0x3000 //RX_TDDRC_ALPHA_UP_3 +166 0x3000 //RX_TDDRC_ALPHA_UP_4 +184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +190 0x7FFF //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +269 0x0000 //RX_TDDRC_THRD_0 +270 0x0000 //RX_TDDRC_THRD_1 +271 0x7FFF //RX_TDDRC_THRD_2 +272 0x7FFF //RX_TDDRC_THRD_3 +273 0x7FFF //RX_TDDRC_SLANT_0 +274 0x7FFF //RX_TDDRC_SLANT_1 +275 0x3000 //RX_TDDRC_ALPHA_UP_0 +276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x199A //RX_TDDRC_HMNC_GAIN +279 0x0001 //RX_TDDRC_SMT_FLAG +280 0x0CCD //RX_TDDRC_SMT_W +281 0x0155 //RX_TDDRC_DRC_GAIN +195 0x0020 //RX_FDEQ_SUBNUM +196 0x4848 //RX_FDEQ_GAIN_0 +197 0x4848 //RX_FDEQ_GAIN_1 +198 0x4848 //RX_FDEQ_GAIN_2 +199 0x4848 //RX_FDEQ_GAIN_3 +200 0x4848 //RX_FDEQ_GAIN_4 +201 0x4848 //RX_FDEQ_GAIN_5 +202 0x4848 //RX_FDEQ_GAIN_6 +203 0x4848 //RX_FDEQ_GAIN_7 +204 0x4848 //RX_FDEQ_GAIN_8 +205 0x4848 //RX_FDEQ_GAIN_9 +206 0x4848 //RX_FDEQ_GAIN_10 +207 0x4848 //RX_FDEQ_GAIN_11 +208 0x4848 //RX_FDEQ_GAIN_12 +209 0x4848 //RX_FDEQ_GAIN_13 +210 0x4848 //RX_FDEQ_GAIN_14 +211 0x4848 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0202 //RX_FDEQ_BIN_0 +221 0x0203 //RX_FDEQ_BIN_1 +222 0x0303 //RX_FDEQ_BIN_2 +223 0x0304 //RX_FDEQ_BIN_3 +224 0x0405 //RX_FDEQ_BIN_4 +225 0x0506 //RX_FDEQ_BIN_5 +226 0x0708 //RX_FDEQ_BIN_6 +227 0x090A //RX_FDEQ_BIN_7 +228 0x0B0C //RX_FDEQ_BIN_8 +229 0x0D0E //RX_FDEQ_BIN_9 +230 0x1013 //RX_FDEQ_BIN_10 +231 0x1719 //RX_FDEQ_BIN_11 +232 0x1B1E //RX_FDEQ_BIN_12 +233 0x1E1E //RX_FDEQ_BIN_13 +234 0x1E28 //RX_FDEQ_BIN_14 +235 0x282C //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x4000 //RX_FDEQ_RESRV_0 +245 0x0320 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0030 //RX_FDDRC_BAND_MARGIN_1 +248 0x0050 //RX_FDDRC_BAND_MARGIN_2 +249 0x0080 //RX_FDDRC_BAND_MARGIN_3 +250 0x0007 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x5000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x6400 //RX_FDDRC_THRD_3_2 +258 0x6400 //RX_FDDRC_THRD_3_3 +259 0x2000 //RX_FDDRC_SLANT_0_0 +260 0x2000 //RX_FDDRC_SLANT_0_1 +261 0x2000 //RX_FDDRC_SLANT_0_2 +262 0x2000 //RX_FDDRC_SLANT_0_3 +263 0x5333 //RX_FDDRC_SLANT_1_0 +264 0x5333 //RX_FDDRC_SLANT_1_1 +265 0x5333 //RX_FDDRC_SLANT_1_2 +266 0x5333 //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +286 0x0100 //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 +#VOL 4 +163 0x3000 //RX_TDDRC_ALPHA_UP_1 +164 0x3000 //RX_TDDRC_ALPHA_UP_2 +165 0x3000 //RX_TDDRC_ALPHA_UP_3 +166 0x3000 //RX_TDDRC_ALPHA_UP_4 +184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +190 0x7FFF //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +269 0x0000 //RX_TDDRC_THRD_0 +270 0x0000 //RX_TDDRC_THRD_1 +271 0x7FFF //RX_TDDRC_THRD_2 +272 0x7FFF //RX_TDDRC_THRD_3 +273 0x7FFF //RX_TDDRC_SLANT_0 +274 0x7FFF //RX_TDDRC_SLANT_1 +275 0x3000 //RX_TDDRC_ALPHA_UP_0 +276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x199A //RX_TDDRC_HMNC_GAIN +279 0x0001 //RX_TDDRC_SMT_FLAG +280 0x0CCD //RX_TDDRC_SMT_W +281 0x0155 //RX_TDDRC_DRC_GAIN +195 0x0020 //RX_FDEQ_SUBNUM +196 0x4848 //RX_FDEQ_GAIN_0 +197 0x4848 //RX_FDEQ_GAIN_1 +198 0x4848 //RX_FDEQ_GAIN_2 +199 0x4848 //RX_FDEQ_GAIN_3 +200 0x4848 //RX_FDEQ_GAIN_4 +201 0x4848 //RX_FDEQ_GAIN_5 +202 0x4848 //RX_FDEQ_GAIN_6 +203 0x4848 //RX_FDEQ_GAIN_7 +204 0x4848 //RX_FDEQ_GAIN_8 +205 0x4848 //RX_FDEQ_GAIN_9 +206 0x4848 //RX_FDEQ_GAIN_10 +207 0x4848 //RX_FDEQ_GAIN_11 +208 0x4848 //RX_FDEQ_GAIN_12 +209 0x4848 //RX_FDEQ_GAIN_13 +210 0x4848 //RX_FDEQ_GAIN_14 +211 0x4848 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0202 //RX_FDEQ_BIN_0 +221 0x0203 //RX_FDEQ_BIN_1 +222 0x0303 //RX_FDEQ_BIN_2 +223 0x0304 //RX_FDEQ_BIN_3 +224 0x0405 //RX_FDEQ_BIN_4 +225 0x0506 //RX_FDEQ_BIN_5 +226 0x0708 //RX_FDEQ_BIN_6 +227 0x090A //RX_FDEQ_BIN_7 +228 0x0B0C //RX_FDEQ_BIN_8 +229 0x0D0E //RX_FDEQ_BIN_9 +230 0x1013 //RX_FDEQ_BIN_10 +231 0x1719 //RX_FDEQ_BIN_11 +232 0x1B1E //RX_FDEQ_BIN_12 +233 0x1E1E //RX_FDEQ_BIN_13 +234 0x1E28 //RX_FDEQ_BIN_14 +235 0x282C //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x4000 //RX_FDEQ_RESRV_0 +245 0x0320 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0030 //RX_FDDRC_BAND_MARGIN_1 +248 0x0050 //RX_FDDRC_BAND_MARGIN_2 +249 0x0080 //RX_FDDRC_BAND_MARGIN_3 +250 0x0007 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x5000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x6400 //RX_FDDRC_THRD_3_2 +258 0x6400 //RX_FDDRC_THRD_3_3 +259 0x2000 //RX_FDDRC_SLANT_0_0 +260 0x2000 //RX_FDDRC_SLANT_0_1 +261 0x2000 //RX_FDDRC_SLANT_0_2 +262 0x2000 //RX_FDDRC_SLANT_0_3 +263 0x5333 //RX_FDDRC_SLANT_1_0 +264 0x5333 //RX_FDDRC_SLANT_1_1 +265 0x5333 //RX_FDDRC_SLANT_1_2 +266 0x5333 //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +286 0x0100 //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 +#VOL 5 +163 0x3000 //RX_TDDRC_ALPHA_UP_1 +164 0x3000 //RX_TDDRC_ALPHA_UP_2 +165 0x3000 //RX_TDDRC_ALPHA_UP_3 +166 0x3000 //RX_TDDRC_ALPHA_UP_4 +184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +190 0x7FFF //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +269 0x0000 //RX_TDDRC_THRD_0 +270 0x0000 //RX_TDDRC_THRD_1 +271 0x7FFF //RX_TDDRC_THRD_2 +272 0x7FFF //RX_TDDRC_THRD_3 +273 0x7FFF //RX_TDDRC_SLANT_0 +274 0x7FFF //RX_TDDRC_SLANT_1 +275 0x3000 //RX_TDDRC_ALPHA_UP_0 +276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x199A //RX_TDDRC_HMNC_GAIN +279 0x0001 //RX_TDDRC_SMT_FLAG +280 0x0CCD //RX_TDDRC_SMT_W +281 0x0155 //RX_TDDRC_DRC_GAIN +195 0x0020 //RX_FDEQ_SUBNUM +196 0x4848 //RX_FDEQ_GAIN_0 +197 0x4848 //RX_FDEQ_GAIN_1 +198 0x4848 //RX_FDEQ_GAIN_2 +199 0x4848 //RX_FDEQ_GAIN_3 +200 0x4848 //RX_FDEQ_GAIN_4 +201 0x4848 //RX_FDEQ_GAIN_5 +202 0x4848 //RX_FDEQ_GAIN_6 +203 0x4848 //RX_FDEQ_GAIN_7 +204 0x4848 //RX_FDEQ_GAIN_8 +205 0x4848 //RX_FDEQ_GAIN_9 +206 0x4848 //RX_FDEQ_GAIN_10 +207 0x4848 //RX_FDEQ_GAIN_11 +208 0x4848 //RX_FDEQ_GAIN_12 +209 0x4848 //RX_FDEQ_GAIN_13 +210 0x4848 //RX_FDEQ_GAIN_14 +211 0x4848 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0202 //RX_FDEQ_BIN_0 +221 0x0203 //RX_FDEQ_BIN_1 +222 0x0303 //RX_FDEQ_BIN_2 +223 0x0304 //RX_FDEQ_BIN_3 +224 0x0405 //RX_FDEQ_BIN_4 +225 0x0506 //RX_FDEQ_BIN_5 +226 0x0708 //RX_FDEQ_BIN_6 +227 0x090A //RX_FDEQ_BIN_7 +228 0x0B0C //RX_FDEQ_BIN_8 +229 0x0D0E //RX_FDEQ_BIN_9 +230 0x1013 //RX_FDEQ_BIN_10 +231 0x1719 //RX_FDEQ_BIN_11 +232 0x1B1E //RX_FDEQ_BIN_12 +233 0x1E1E //RX_FDEQ_BIN_13 +234 0x1E28 //RX_FDEQ_BIN_14 +235 0x282C //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x4000 //RX_FDEQ_RESRV_0 +245 0x0320 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0030 //RX_FDDRC_BAND_MARGIN_1 +248 0x0050 //RX_FDDRC_BAND_MARGIN_2 +249 0x0080 //RX_FDDRC_BAND_MARGIN_3 +250 0x0007 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x5000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x6400 //RX_FDDRC_THRD_3_2 +258 0x6400 //RX_FDDRC_THRD_3_3 +259 0x2000 //RX_FDDRC_SLANT_0_0 +260 0x2000 //RX_FDDRC_SLANT_0_1 +261 0x2000 //RX_FDDRC_SLANT_0_2 +262 0x2000 //RX_FDDRC_SLANT_0_3 +263 0x5333 //RX_FDDRC_SLANT_1_0 +264 0x5333 //RX_FDDRC_SLANT_1_1 +265 0x5333 //RX_FDDRC_SLANT_1_2 +266 0x5333 //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +286 0x0100 //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 +#VOL 6 +163 0x3000 //RX_TDDRC_ALPHA_UP_1 +164 0x3000 //RX_TDDRC_ALPHA_UP_2 +165 0x3000 //RX_TDDRC_ALPHA_UP_3 +166 0x3000 //RX_TDDRC_ALPHA_UP_4 +184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +190 0x7FFF //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +269 0x0000 //RX_TDDRC_THRD_0 +270 0x0000 //RX_TDDRC_THRD_1 +271 0x7FFF //RX_TDDRC_THRD_2 +272 0x7FFF //RX_TDDRC_THRD_3 +273 0x7FFF //RX_TDDRC_SLANT_0 +274 0x7FFF //RX_TDDRC_SLANT_1 +275 0x3000 //RX_TDDRC_ALPHA_UP_0 +276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x199A //RX_TDDRC_HMNC_GAIN +279 0x0001 //RX_TDDRC_SMT_FLAG +280 0x0CCD //RX_TDDRC_SMT_W +281 0x0155 //RX_TDDRC_DRC_GAIN +195 0x0020 //RX_FDEQ_SUBNUM +196 0x4848 //RX_FDEQ_GAIN_0 +197 0x4848 //RX_FDEQ_GAIN_1 +198 0x4848 //RX_FDEQ_GAIN_2 +199 0x4848 //RX_FDEQ_GAIN_3 +200 0x4848 //RX_FDEQ_GAIN_4 +201 0x4848 //RX_FDEQ_GAIN_5 +202 0x4848 //RX_FDEQ_GAIN_6 +203 0x4848 //RX_FDEQ_GAIN_7 +204 0x4848 //RX_FDEQ_GAIN_8 +205 0x4848 //RX_FDEQ_GAIN_9 +206 0x4848 //RX_FDEQ_GAIN_10 +207 0x4848 //RX_FDEQ_GAIN_11 +208 0x4848 //RX_FDEQ_GAIN_12 +209 0x4848 //RX_FDEQ_GAIN_13 +210 0x4848 //RX_FDEQ_GAIN_14 +211 0x4848 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0202 //RX_FDEQ_BIN_0 +221 0x0203 //RX_FDEQ_BIN_1 +222 0x0303 //RX_FDEQ_BIN_2 +223 0x0304 //RX_FDEQ_BIN_3 +224 0x0405 //RX_FDEQ_BIN_4 +225 0x0506 //RX_FDEQ_BIN_5 +226 0x0708 //RX_FDEQ_BIN_6 +227 0x090A //RX_FDEQ_BIN_7 +228 0x0B0C //RX_FDEQ_BIN_8 +229 0x0D0E //RX_FDEQ_BIN_9 +230 0x1013 //RX_FDEQ_BIN_10 +231 0x1719 //RX_FDEQ_BIN_11 +232 0x1B1E //RX_FDEQ_BIN_12 +233 0x1E1E //RX_FDEQ_BIN_13 +234 0x1E28 //RX_FDEQ_BIN_14 +235 0x282C //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x4000 //RX_FDEQ_RESRV_0 +245 0x0320 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0030 //RX_FDDRC_BAND_MARGIN_1 +248 0x0050 //RX_FDDRC_BAND_MARGIN_2 +249 0x0080 //RX_FDDRC_BAND_MARGIN_3 +250 0x0007 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x5000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x6400 //RX_FDDRC_THRD_3_2 +258 0x6400 //RX_FDDRC_THRD_3_3 +259 0x2000 //RX_FDDRC_SLANT_0_0 +260 0x2000 //RX_FDDRC_SLANT_0_1 +261 0x2000 //RX_FDDRC_SLANT_0_2 +262 0x2000 //RX_FDDRC_SLANT_0_3 +263 0x5333 //RX_FDDRC_SLANT_1_0 +264 0x5333 //RX_FDDRC_SLANT_1_1 +265 0x5333 //RX_FDDRC_SLANT_1_2 +266 0x5333 //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +286 0x0100 //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 #CASE_NAME BLUETOOTH-BTNB_NREC-VOICE_GENERIC-FB -#PARAM_TYPE TX+RX -#TOTAL_CUSTOM_STEP 7 +#PARAM_MODE Full +#PARAM_TYPE TX+2RX +#TOTAL_CUSTOM_STEP 7+7 #TX 0 0x0009 //TX_OPERATION_MODE_0 1 0x0009 //TX_OPERATION_MODE_1 @@ -21294,10 +32299,10 @@ 248 0xF600 //TX_THR_SN_EST_6 249 0xF600 //TX_THR_SN_EST_7 250 0x0200 //TX_DELTA_THR_SN_EST_0 -251 0x0200 //TX_DELTA_THR_SN_EST_1 -252 0x0400 //TX_DELTA_THR_SN_EST_2 -253 0x0300 //TX_DELTA_THR_SN_EST_3 -254 0x0600 //TX_DELTA_THR_SN_EST_4 +251 0x0400 //TX_DELTA_THR_SN_EST_1 +252 0x0300 //TX_DELTA_THR_SN_EST_2 +253 0x0600 //TX_DELTA_THR_SN_EST_3 +254 0x0200 //TX_DELTA_THR_SN_EST_4 255 0x0200 //TX_DELTA_THR_SN_EST_5 256 0x0200 //TX_DELTA_THR_SN_EST_6 257 0x0200 //TX_DELTA_THR_SN_EST_7 @@ -21325,31 +32330,31 @@ 279 0x2000 //TX_B_POST_FLT_0 280 0x2000 //TX_B_POST_FLT_1 281 0x0012 //TX_NS_LVL_CTRL_0 -282 0x0019 //TX_NS_LVL_CTRL_1 +282 0x0016 //TX_NS_LVL_CTRL_1 283 0x0016 //TX_NS_LVL_CTRL_2 -284 0x0016 //TX_NS_LVL_CTRL_3 -285 0x0019 //TX_NS_LVL_CTRL_4 +284 0x0019 //TX_NS_LVL_CTRL_3 +285 0x0010 //TX_NS_LVL_CTRL_4 286 0x0010 //TX_NS_LVL_CTRL_5 -287 0x0010 //TX_NS_LVL_CTRL_6 +287 0x0019 //TX_NS_LVL_CTRL_6 288 0x0010 //TX_NS_LVL_CTRL_7 289 0x000C //TX_MIN_GAIN_S_0 -290 0x0011 //TX_MIN_GAIN_S_1 +290 0x000C //TX_MIN_GAIN_S_1 291 0x000C //TX_MIN_GAIN_S_2 -292 0x000C //TX_MIN_GAIN_S_3 -293 0x000F //TX_MIN_GAIN_S_4 +292 0x000F //TX_MIN_GAIN_S_3 +293 0x000C //TX_MIN_GAIN_S_4 294 0x000C //TX_MIN_GAIN_S_5 -295 0x000C //TX_MIN_GAIN_S_6 +295 0x0011 //TX_MIN_GAIN_S_6 296 0x000C //TX_MIN_GAIN_S_7 297 0x7FFF //TX_NMOS_SUP 298 0x0000 //TX_NS_MAX_PRI_SNR_TH 299 0x0000 //TX_NMOS_SUP_MENSA 300 0x7000 //TX_SNRI_SUP_0 -301 0x6000 //TX_SNRI_SUP_1 +301 0x7000 //TX_SNRI_SUP_1 302 0x7000 //TX_SNRI_SUP_2 -303 0x7000 //TX_SNRI_SUP_3 -304 0x6000 //TX_SNRI_SUP_4 +303 0x6000 //TX_SNRI_SUP_3 +304 0x7FFF //TX_SNRI_SUP_4 305 0x7FFF //TX_SNRI_SUP_5 -306 0x7FFF //TX_SNRI_SUP_6 +306 0x6000 //TX_SNRI_SUP_6 307 0x7FFF //TX_SNRI_SUP_7 308 0x7FFF //TX_THR_LFNS 309 0x0016 //TX_G_LFNS @@ -21366,8 +32371,8 @@ 320 0x6000 //TX_A_POST_FILT_S_6 321 0x6000 //TX_A_POST_FILT_S_7 322 0x2000 //TX_B_POST_FILT_0 -323 0x2000 //TX_B_POST_FILT_1 -324 0x4000 //TX_B_POST_FILT_2 +323 0x4000 //TX_B_POST_FILT_1 +324 0x2000 //TX_B_POST_FILT_2 325 0x2000 //TX_B_POST_FILT_3 326 0x2000 //TX_B_POST_FILT_4 327 0x2000 //TX_B_POST_FILT_5 @@ -21423,10 +32428,10 @@ 377 0x0000 //TX_NOISE_TH_5_4 378 0x02BC //TX_NOISE_TH_6 379 0x0020 //TX_MINENOISE_TH -380 0x4000 //TX_MINENOISE_MIC0_TH_MTS -381 0xFFEE //TX_MINENOISE_MIC0_TH_EXP -382 0x6000 //TX_MINENOISE_MIC0_S_TH_MTS -383 0xFFF3 //TX_MINENOISE_MIC0_S_TH_EXP +380 0x4000 //TX_MORENS_TFMASK_TH +381 0xFFEE //TX_DRC_QUIET_FLOOR +382 0x6000 //TX_RATIODTL_CUT_TH +383 0xFFF3 //TX_DT_CUT_K1 384 0x0666 //TX_OUT_ENER_S_TH_CLEAN 385 0x0666 //TX_OUT_ENER_S_TH_LESSCLEAN 386 0x0333 //TX_OUT_ENER_S_TH_NOISY @@ -21434,15 +32439,15 @@ 388 0x0333 //TX_OUT_ENER_TH_SPEECH 389 0x2000 //TX_SN_NPB_GAIN 390 0x0000 //TX_NN_NPB_GAIN -391 0x0000 //TX_CSX_ALPHA_0 -392 0x0000 //TX_CSX_ALPHA_1 -393 0x0000 //TX_CSX_ALPHA_2 -394 0x0000 //TX_CSX_ALPHA_3 -395 0x0800 //TX_MU_ARSP_EST -396 0x00C8 //TX_P_OUTBEAM_MIN_TH +391 0x0000 //TX_POST_MASK_SUP_HSNE +392 0x0000 //TX_TAIL_DET_TH +393 0x0000 //TX_B_LESSCUT_RTO_WTA +394 0x0000 //TX_MEL_G_R +395 0x0800 //TX_SUPHIGH_TH +396 0x00C8 //TX_MASK_G_R 397 0x0002 //TX_EXTRA_NS_L -398 0x0800 //TX_EXTRA_NS_A -399 0x0005 //TX_VR_NOISE_FLOOR_TH +398 0x0800 //TX_C_POST_FLT_MASK +399 0x0005 //TX_A_POST_FLT_WNS 400 0x0148 //TX_MIN_G_LOW300HZ 401 0x0002 //TX_MAXLEVEL_CNG 402 0x00B4 //TX_STN_NOISE_TH @@ -21557,16 +32562,16 @@ 511 0x6666 //TX_MIC_TO_BFGAIN 512 0x0000 //TX_MICTOBFGAIN0 513 0x0000 //TX_FASTMUE_TH -514 0x0000 //TX_DERVB_LEN_0 -515 0x0000 //TX_DERVB_LEN_1 -516 0x0000 //TX_RHO_DERVB -517 0x0000 //TX_MIC_INDX_DERVB -518 0x0000 //TX_MU_DERVB -519 0x0000 //TX_DR_RESRV_0 -520 0x0000 //TX_DR_RESRV_1 -521 0x0000 //TX_DR_RESRV_2 -522 0x0000 //TX_DR_RESRV_3 -523 0x0000 //TX_DR_RESRV_4 +514 0x0000 //TX_DEREVERB_LF_MU +515 0x0000 //TX_DEREVERB_HF_MU +516 0x0000 //TX_DEREVERB_DELAY +517 0x0000 //TX_DEREVERB_COEF_LEN +518 0x0000 //TX_DEREVERB_DNR +519 0x0000 //TX_DEREVERB_ALPHA +520 0x0000 //TX_DEREVERB_BETA +521 0x0000 //TX_GSC_RTOL_TH +522 0x0000 //TX_GSC_RTOH_TH +523 0x0000 //TX_WIDE2_MEANHTH 524 0x0000 //TX_DR_RESRV_5 525 0x0000 //TX_DR_RESRV_6 526 0x0000 //TX_DR_RESRV_7 @@ -21940,8 +32945,73 @@ 894 0xC000 //TX_FASTNS_SSA_THHFL 895 0xCCCC //TX_FASTNS_SSA_THLFH 896 0xD999 //TX_FASTNS_SSA_THHFH +897 0x0000 //TX_SENDFUNC_REG_MICMUTE +898 0x0000 //TX_SENDFUNC_REG_MICMUTE1 +899 0x0000 //TX_MICMUTE_RATIO_THR +900 0x0000 //TX_MICMUTE_AMP_THR +901 0x0000 //TX_MICMUTE_HPF_IND +902 0x0000 //TX_MICMUTE_LOG_EYR_TH +903 0x0000 //TX_MICMUTE_CVG_TIME +904 0x0000 //TX_MICMUTE_RELEASE_TIME +905 0x0000 //TX_MIC_VOLUME_MIC0MUTE +906 0x0000 //TX_MICMUTE_EPD_OFFSET_0 +907 0x0000 //TX_MICMUTE_FRQ_AEC_L +908 0x0000 //TX_MICMUTE_EAD_THR +909 0x0000 //TX_MICMUTE_LAMBDA_CB_NLE +910 0x0000 //TX_MICMUTE_LAMBDA_RE_EST +911 0x0000 //TX_DTD_THR1_MICMUTE_0 +912 0x0000 //TX_DTD_THR1_MICMUTE_1 +913 0x0000 //TX_DTD_THR1_MICMUTE_2 +914 0x0000 //TX_DTD_THR1_MICMUTE_3 +915 0x0000 //TX_DTD_THR2_MICMUTE_0 +916 0x0000 //TX_MICMUTE_MIN_EQ_RE_EST_0 +917 0x0000 //TX_MICMUTE_MIN_EQ_RE_EST_1 +918 0x0000 //TX_MICMUTE_MIN_EQ_RE_EST_2 +919 0x0000 //TX_MICMUTE_MIN_EQ_RE_EST_3 +920 0x0000 //TX_MICMUTE_MIN_EQ_RE_EST_4 +921 0x0000 //TX_MICMUTE_C_POST_FLT +922 0x0000 //TX_MICMUTE_DT_CUT_K +923 0x0000 //TX_MICMUTE_DT_CUT_THR +924 0x0000 //TX_MICMUTE_DT_CUT_K2 +925 0x0000 //TX_MICMUTE_DT_CUT_THR2 +926 0x0000 //TX_MICMUTE_DT2_HOLD_N +927 0x0000 //TX_MICMUTE_RATIODTH_THCUT +928 0x0000 //TX_MICMUTE_B_POST_FLT_ECHOL +929 0x0000 //TX_MICMUTE_B_POST_FLT_ECHOH +930 0x0000 //TX_MICMUTE_C_POST_FLT_MASK +931 0x0000 //TX_MICMUTE_RATIODTL_CUT_TH +932 0x0000 //TX_MICMUTE_DT_CUT_K1 +933 0x0000 //TX_MICMUTE_N2_SN_EST +934 0x0000 //TX_MICMUTE_THR_SN_EST_0 +935 0x0000 //TX_MICMUTE_MIN_G_CTRL_0 +936 0x0000 //TX_MICMUTE_A_POST_FILT_S_0 +937 0x0000 //TX_MICMUTE_B_POST_FILT_0 +938 0x0000 //TX_MIC1RUB_AMP_THR +939 0x0000 //TX_MIC1MUTE_RATIO_THR +940 0x0000 //TX_MIC1MUTE_AMP_THR +941 0x0000 //TX_MIC1MUTE_CVG_TIME +942 0x0000 //TX_MIC1MUTE_RELEASE_TIME +943 0x0000 //TX_AMS_RESRV_01 +944 0x0000 //TX_AMS_RESRV_02 +945 0x0000 //TX_AMS_RESRV_03 +946 0x0000 //TX_AMS_RESRV_04 +947 0x0000 //TX_AMS_RESRV_05 +948 0x0000 //TX_AMS_RESRV_06 +949 0x0000 //TX_AMS_RESRV_07 +950 0x0000 //TX_AMS_RESRV_08 +951 0x0000 //TX_AMS_RESRV_09 +952 0x0000 //TX_AMS_RESRV_10 +953 0x0000 //TX_AMS_RESRV_11 +954 0x0000 //TX_AMS_RESRV_12 +955 0x0000 //TX_AMS_RESRV_13 +956 0x0000 //TX_AMS_RESRV_14 +957 0x0000 //TX_AMS_RESRV_15 +958 0x0000 //TX_AMS_RESRV_16 +959 0x0000 //TX_AMS_RESRV_17 +960 0x0000 //TX_AMS_RESRV_18 +961 0x0000 //TX_AMS_RESRV_19 #RX -0 0x0064 //RX_RECVFUNC_MODE_0 +0 0x2064 //RX_RECVFUNC_MODE_0 1 0x0000 //RX_RECVFUNC_MODE_1 2 0x0004 //RX_SAMPLINGFREQ_SIG 3 0x0004 //RX_SAMPLINGFREQ_PROC @@ -22791,10 +33861,862 @@ 110 0x0000 //RX_FDDRC_RESRV_0 129 0x0100 //RX_SPK_VOL 130 0x0000 //RX_VOL_RESRV_0 +#RX 2 +157 0x0064 //RX_RECVFUNC_MODE_0 +158 0x0000 //RX_RECVFUNC_MODE_1 +159 0x0004 //RX_SAMPLINGFREQ_SIG +160 0x0004 //RX_SAMPLINGFREQ_PROC +161 0x000A //RX_FRAME_SZ +162 0x0000 //RX_DELAY_OPT +163 0x1000 //RX_TDDRC_ALPHA_UP_1 +164 0x1000 //RX_TDDRC_ALPHA_UP_2 +165 0x1000 //RX_TDDRC_ALPHA_UP_3 +166 0x1000 //RX_TDDRC_ALPHA_UP_4 +167 0x0800 //RX_PGA +168 0x7FFF //RX_A_HP +169 0x4000 //RX_B_PE +170 0x7800 //RX_THR_PITCH_DET_0 +171 0x7000 //RX_THR_PITCH_DET_1 +172 0x6000 //RX_THR_PITCH_DET_2 +173 0x0008 //RX_PITCH_BFR_LEN +174 0x0003 //RX_SBD_PITCH_DET +175 0x0100 //RX_PP_RESRV_0 +176 0x0020 //RX_PP_RESRV_1 +177 0x0500 //RX_N_SN_EST +178 0x000C //RX_N2_SN_EST +179 0x000A //RX_NS_LVL_CTRL +180 0xF600 //RX_THR_SN_EST +181 0x7000 //RX_LAMBDA_PFILT +182 0x000A //RX_FENS_RESRV_0 +183 0x0190 //RX_FENS_RESRV_1 +184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +187 0x0002 //RX_EXTRA_NS_L +188 0x0800 //RX_EXTRA_NS_A +189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +190 0x7FFF //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +192 0x199A //RX_A_POST_FLT +193 0x0000 //RX_LMT_THRD +194 0x4000 //RX_LMT_ALPHA +195 0x0020 //RX_FDEQ_SUBNUM +196 0x4848 //RX_FDEQ_GAIN_0 +197 0x4848 //RX_FDEQ_GAIN_1 +198 0x4848 //RX_FDEQ_GAIN_2 +199 0x4848 //RX_FDEQ_GAIN_3 +200 0x4848 //RX_FDEQ_GAIN_4 +201 0x4848 //RX_FDEQ_GAIN_5 +202 0x4848 //RX_FDEQ_GAIN_6 +203 0x4848 //RX_FDEQ_GAIN_7 +204 0x4848 //RX_FDEQ_GAIN_8 +205 0x4848 //RX_FDEQ_GAIN_9 +206 0x4848 //RX_FDEQ_GAIN_10 +207 0x4848 //RX_FDEQ_GAIN_11 +208 0x4848 //RX_FDEQ_GAIN_12 +209 0x4848 //RX_FDEQ_GAIN_13 +210 0x4848 //RX_FDEQ_GAIN_14 +211 0x4848 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0202 //RX_FDEQ_BIN_0 +221 0x0203 //RX_FDEQ_BIN_1 +222 0x0304 //RX_FDEQ_BIN_2 +223 0x0405 //RX_FDEQ_BIN_3 +224 0x0607 //RX_FDEQ_BIN_4 +225 0x0809 //RX_FDEQ_BIN_5 +226 0x0A0B //RX_FDEQ_BIN_6 +227 0x0C0D //RX_FDEQ_BIN_7 +228 0x0E0F //RX_FDEQ_BIN_8 +229 0x1011 //RX_FDEQ_BIN_9 +230 0x1214 //RX_FDEQ_BIN_10 +231 0x1618 //RX_FDEQ_BIN_11 +232 0x1C1C //RX_FDEQ_BIN_12 +233 0x2020 //RX_FDEQ_BIN_13 +234 0x2020 //RX_FDEQ_BIN_14 +235 0x2011 //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x4000 //RX_FDEQ_RESRV_0 +245 0x0320 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0030 //RX_FDDRC_BAND_MARGIN_1 +248 0x0050 //RX_FDDRC_BAND_MARGIN_2 +249 0x0080 //RX_FDDRC_BAND_MARGIN_3 +250 0x0007 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x5000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x6400 //RX_FDDRC_THRD_3_2 +258 0x6400 //RX_FDDRC_THRD_3_3 +259 0x2000 //RX_FDDRC_SLANT_0_0 +260 0x2000 //RX_FDDRC_SLANT_0_1 +261 0x2000 //RX_FDDRC_SLANT_0_2 +262 0x2000 //RX_FDDRC_SLANT_0_3 +263 0x5333 //RX_FDDRC_SLANT_1_0 +264 0x5333 //RX_FDDRC_SLANT_1_1 +265 0x5333 //RX_FDDRC_SLANT_1_2 +266 0x5333 //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +268 0x0000 //RX_FILTINDX +269 0x0000 //RX_TDDRC_THRD_0 +270 0x0000 //RX_TDDRC_THRD_1 +271 0x7FFF //RX_TDDRC_THRD_2 +272 0x7FFF //RX_TDDRC_THRD_3 +273 0x7FFF //RX_TDDRC_SLANT_0 +274 0x7FFF //RX_TDDRC_SLANT_1 +275 0x1000 //RX_TDDRC_ALPHA_UP_0 +276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x199A //RX_TDDRC_HMNC_GAIN +279 0x0001 //RX_TDDRC_SMT_FLAG +280 0x0CCD //RX_TDDRC_SMT_W +281 0x0155 //RX_TDDRC_DRC_GAIN +282 0x7C00 //RX_LAMBDA_PKA_FP +283 0x2000 //RX_TPKA_FP +284 0x2000 //RX_MIN_G_FP +285 0x0080 //RX_MAX_G_FP +286 0x0100 //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 +288 0x0000 //RX_MAXLEVEL_CNG +289 0x3000 //RX_BWE_UV_TH +290 0x3000 //RX_BWE_UV_TH2 +291 0x1800 //RX_BWE_UV_TH3 +292 0x1000 //RX_BWE_V_TH +293 0x04CD //RX_BWE_GAIN1_V_TH1 +294 0x0F33 //RX_BWE_GAIN1_V_TH2 +295 0x7333 //RX_BWE_UV_EQ +296 0x199A //RX_BWE_V_EQ +297 0x7333 //RX_BWE_TONE_TH +298 0x0004 //RX_BWE_UV_HOLD_T +299 0x6CCD //RX_BWE_GAIN2_ALPHA +300 0x799A //RX_BWE_GAIN3_ALPHA +301 0x001E //RX_BWE_CUTOFF +302 0x3000 //RX_BWE_GAINFILL +303 0x3200 //RX_BWE_MAXTH_TONE +304 0x2000 //RX_BWE_EQ_0 +305 0x2000 //RX_BWE_EQ_1 +306 0x2000 //RX_BWE_EQ_2 +307 0x2000 //RX_BWE_EQ_3 +308 0x2000 //RX_BWE_EQ_4 +309 0x2000 //RX_BWE_EQ_5 +310 0x2000 //RX_BWE_EQ_6 +311 0x0000 //RX_BWE_RESRV_0 +312 0x0000 //RX_BWE_RESRV_1 +313 0x0000 //RX_BWE_RESRV_2 +#VOL 0 +163 0x1000 //RX_TDDRC_ALPHA_UP_1 +164 0x1000 //RX_TDDRC_ALPHA_UP_2 +165 0x1000 //RX_TDDRC_ALPHA_UP_3 +166 0x1000 //RX_TDDRC_ALPHA_UP_4 +184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +190 0x7FFF //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +269 0x0000 //RX_TDDRC_THRD_0 +270 0x0000 //RX_TDDRC_THRD_1 +271 0x7FFF //RX_TDDRC_THRD_2 +272 0x7FFF //RX_TDDRC_THRD_3 +273 0x7FFF //RX_TDDRC_SLANT_0 +274 0x7FFF //RX_TDDRC_SLANT_1 +275 0x1000 //RX_TDDRC_ALPHA_UP_0 +276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x199A //RX_TDDRC_HMNC_GAIN +279 0x0001 //RX_TDDRC_SMT_FLAG +280 0x0CCD //RX_TDDRC_SMT_W +281 0x0155 //RX_TDDRC_DRC_GAIN +195 0x0020 //RX_FDEQ_SUBNUM +196 0x4848 //RX_FDEQ_GAIN_0 +197 0x4848 //RX_FDEQ_GAIN_1 +198 0x4848 //RX_FDEQ_GAIN_2 +199 0x4848 //RX_FDEQ_GAIN_3 +200 0x4848 //RX_FDEQ_GAIN_4 +201 0x4848 //RX_FDEQ_GAIN_5 +202 0x4848 //RX_FDEQ_GAIN_6 +203 0x4848 //RX_FDEQ_GAIN_7 +204 0x4848 //RX_FDEQ_GAIN_8 +205 0x4848 //RX_FDEQ_GAIN_9 +206 0x4848 //RX_FDEQ_GAIN_10 +207 0x4848 //RX_FDEQ_GAIN_11 +208 0x4848 //RX_FDEQ_GAIN_12 +209 0x4848 //RX_FDEQ_GAIN_13 +210 0x4848 //RX_FDEQ_GAIN_14 +211 0x4848 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0202 //RX_FDEQ_BIN_0 +221 0x0203 //RX_FDEQ_BIN_1 +222 0x0304 //RX_FDEQ_BIN_2 +223 0x0405 //RX_FDEQ_BIN_3 +224 0x0607 //RX_FDEQ_BIN_4 +225 0x0809 //RX_FDEQ_BIN_5 +226 0x0A0B //RX_FDEQ_BIN_6 +227 0x0C0D //RX_FDEQ_BIN_7 +228 0x0E0F //RX_FDEQ_BIN_8 +229 0x1011 //RX_FDEQ_BIN_9 +230 0x1214 //RX_FDEQ_BIN_10 +231 0x1618 //RX_FDEQ_BIN_11 +232 0x1C1C //RX_FDEQ_BIN_12 +233 0x2020 //RX_FDEQ_BIN_13 +234 0x2020 //RX_FDEQ_BIN_14 +235 0x2011 //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x4000 //RX_FDEQ_RESRV_0 +245 0x0320 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0030 //RX_FDDRC_BAND_MARGIN_1 +248 0x0050 //RX_FDDRC_BAND_MARGIN_2 +249 0x0080 //RX_FDDRC_BAND_MARGIN_3 +250 0x0007 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x5000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x6400 //RX_FDDRC_THRD_3_2 +258 0x6400 //RX_FDDRC_THRD_3_3 +259 0x2000 //RX_FDDRC_SLANT_0_0 +260 0x2000 //RX_FDDRC_SLANT_0_1 +261 0x2000 //RX_FDDRC_SLANT_0_2 +262 0x2000 //RX_FDDRC_SLANT_0_3 +263 0x5333 //RX_FDDRC_SLANT_1_0 +264 0x5333 //RX_FDDRC_SLANT_1_1 +265 0x5333 //RX_FDDRC_SLANT_1_2 +266 0x5333 //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +286 0x0100 //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 +#VOL 1 +163 0x1000 //RX_TDDRC_ALPHA_UP_1 +164 0x1000 //RX_TDDRC_ALPHA_UP_2 +165 0x1000 //RX_TDDRC_ALPHA_UP_3 +166 0x1000 //RX_TDDRC_ALPHA_UP_4 +184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +190 0x7FFF //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +269 0x0000 //RX_TDDRC_THRD_0 +270 0x0000 //RX_TDDRC_THRD_1 +271 0x7FFF //RX_TDDRC_THRD_2 +272 0x7FFF //RX_TDDRC_THRD_3 +273 0x7FFF //RX_TDDRC_SLANT_0 +274 0x7FFF //RX_TDDRC_SLANT_1 +275 0x1000 //RX_TDDRC_ALPHA_UP_0 +276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x199A //RX_TDDRC_HMNC_GAIN +279 0x0001 //RX_TDDRC_SMT_FLAG +280 0x0CCD //RX_TDDRC_SMT_W +281 0x0155 //RX_TDDRC_DRC_GAIN +195 0x0020 //RX_FDEQ_SUBNUM +196 0x4848 //RX_FDEQ_GAIN_0 +197 0x4848 //RX_FDEQ_GAIN_1 +198 0x4848 //RX_FDEQ_GAIN_2 +199 0x4848 //RX_FDEQ_GAIN_3 +200 0x4848 //RX_FDEQ_GAIN_4 +201 0x4848 //RX_FDEQ_GAIN_5 +202 0x4848 //RX_FDEQ_GAIN_6 +203 0x4848 //RX_FDEQ_GAIN_7 +204 0x4848 //RX_FDEQ_GAIN_8 +205 0x4848 //RX_FDEQ_GAIN_9 +206 0x4848 //RX_FDEQ_GAIN_10 +207 0x4848 //RX_FDEQ_GAIN_11 +208 0x4848 //RX_FDEQ_GAIN_12 +209 0x4848 //RX_FDEQ_GAIN_13 +210 0x4848 //RX_FDEQ_GAIN_14 +211 0x4848 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0202 //RX_FDEQ_BIN_0 +221 0x0203 //RX_FDEQ_BIN_1 +222 0x0304 //RX_FDEQ_BIN_2 +223 0x0405 //RX_FDEQ_BIN_3 +224 0x0607 //RX_FDEQ_BIN_4 +225 0x0809 //RX_FDEQ_BIN_5 +226 0x0A0B //RX_FDEQ_BIN_6 +227 0x0C0D //RX_FDEQ_BIN_7 +228 0x0E0F //RX_FDEQ_BIN_8 +229 0x1011 //RX_FDEQ_BIN_9 +230 0x1214 //RX_FDEQ_BIN_10 +231 0x1618 //RX_FDEQ_BIN_11 +232 0x1C1C //RX_FDEQ_BIN_12 +233 0x2020 //RX_FDEQ_BIN_13 +234 0x2020 //RX_FDEQ_BIN_14 +235 0x2011 //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x4000 //RX_FDEQ_RESRV_0 +245 0x0320 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0030 //RX_FDDRC_BAND_MARGIN_1 +248 0x0050 //RX_FDDRC_BAND_MARGIN_2 +249 0x0080 //RX_FDDRC_BAND_MARGIN_3 +250 0x0007 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x5000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x6400 //RX_FDDRC_THRD_3_2 +258 0x6400 //RX_FDDRC_THRD_3_3 +259 0x2000 //RX_FDDRC_SLANT_0_0 +260 0x2000 //RX_FDDRC_SLANT_0_1 +261 0x2000 //RX_FDDRC_SLANT_0_2 +262 0x2000 //RX_FDDRC_SLANT_0_3 +263 0x5333 //RX_FDDRC_SLANT_1_0 +264 0x5333 //RX_FDDRC_SLANT_1_1 +265 0x5333 //RX_FDDRC_SLANT_1_2 +266 0x5333 //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +286 0x0100 //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 +#VOL 2 +163 0x1000 //RX_TDDRC_ALPHA_UP_1 +164 0x1000 //RX_TDDRC_ALPHA_UP_2 +165 0x1000 //RX_TDDRC_ALPHA_UP_3 +166 0x1000 //RX_TDDRC_ALPHA_UP_4 +184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +190 0x7FFF //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +269 0x0000 //RX_TDDRC_THRD_0 +270 0x0000 //RX_TDDRC_THRD_1 +271 0x7FFF //RX_TDDRC_THRD_2 +272 0x7FFF //RX_TDDRC_THRD_3 +273 0x7FFF //RX_TDDRC_SLANT_0 +274 0x7FFF //RX_TDDRC_SLANT_1 +275 0x1000 //RX_TDDRC_ALPHA_UP_0 +276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x199A //RX_TDDRC_HMNC_GAIN +279 0x0001 //RX_TDDRC_SMT_FLAG +280 0x0CCD //RX_TDDRC_SMT_W +281 0x0155 //RX_TDDRC_DRC_GAIN +195 0x0020 //RX_FDEQ_SUBNUM +196 0x4848 //RX_FDEQ_GAIN_0 +197 0x4848 //RX_FDEQ_GAIN_1 +198 0x4848 //RX_FDEQ_GAIN_2 +199 0x4848 //RX_FDEQ_GAIN_3 +200 0x4848 //RX_FDEQ_GAIN_4 +201 0x4848 //RX_FDEQ_GAIN_5 +202 0x4848 //RX_FDEQ_GAIN_6 +203 0x4848 //RX_FDEQ_GAIN_7 +204 0x4848 //RX_FDEQ_GAIN_8 +205 0x4848 //RX_FDEQ_GAIN_9 +206 0x4848 //RX_FDEQ_GAIN_10 +207 0x4848 //RX_FDEQ_GAIN_11 +208 0x4848 //RX_FDEQ_GAIN_12 +209 0x4848 //RX_FDEQ_GAIN_13 +210 0x4848 //RX_FDEQ_GAIN_14 +211 0x4848 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0202 //RX_FDEQ_BIN_0 +221 0x0203 //RX_FDEQ_BIN_1 +222 0x0304 //RX_FDEQ_BIN_2 +223 0x0405 //RX_FDEQ_BIN_3 +224 0x0607 //RX_FDEQ_BIN_4 +225 0x0809 //RX_FDEQ_BIN_5 +226 0x0A0B //RX_FDEQ_BIN_6 +227 0x0C0D //RX_FDEQ_BIN_7 +228 0x0E0F //RX_FDEQ_BIN_8 +229 0x1011 //RX_FDEQ_BIN_9 +230 0x1214 //RX_FDEQ_BIN_10 +231 0x1618 //RX_FDEQ_BIN_11 +232 0x1C1C //RX_FDEQ_BIN_12 +233 0x2020 //RX_FDEQ_BIN_13 +234 0x2020 //RX_FDEQ_BIN_14 +235 0x2011 //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x4000 //RX_FDEQ_RESRV_0 +245 0x0320 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0030 //RX_FDDRC_BAND_MARGIN_1 +248 0x0050 //RX_FDDRC_BAND_MARGIN_2 +249 0x0080 //RX_FDDRC_BAND_MARGIN_3 +250 0x0007 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x5000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x6400 //RX_FDDRC_THRD_3_2 +258 0x6400 //RX_FDDRC_THRD_3_3 +259 0x2000 //RX_FDDRC_SLANT_0_0 +260 0x2000 //RX_FDDRC_SLANT_0_1 +261 0x2000 //RX_FDDRC_SLANT_0_2 +262 0x2000 //RX_FDDRC_SLANT_0_3 +263 0x5333 //RX_FDDRC_SLANT_1_0 +264 0x5333 //RX_FDDRC_SLANT_1_1 +265 0x5333 //RX_FDDRC_SLANT_1_2 +266 0x5333 //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +286 0x0100 //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 +#VOL 3 +163 0x1000 //RX_TDDRC_ALPHA_UP_1 +164 0x1000 //RX_TDDRC_ALPHA_UP_2 +165 0x1000 //RX_TDDRC_ALPHA_UP_3 +166 0x1000 //RX_TDDRC_ALPHA_UP_4 +184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +190 0x7FFF //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +269 0x0000 //RX_TDDRC_THRD_0 +270 0x0000 //RX_TDDRC_THRD_1 +271 0x7FFF //RX_TDDRC_THRD_2 +272 0x7FFF //RX_TDDRC_THRD_3 +273 0x7FFF //RX_TDDRC_SLANT_0 +274 0x7FFF //RX_TDDRC_SLANT_1 +275 0x1000 //RX_TDDRC_ALPHA_UP_0 +276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x199A //RX_TDDRC_HMNC_GAIN +279 0x0001 //RX_TDDRC_SMT_FLAG +280 0x0CCD //RX_TDDRC_SMT_W +281 0x0155 //RX_TDDRC_DRC_GAIN +195 0x0020 //RX_FDEQ_SUBNUM +196 0x4848 //RX_FDEQ_GAIN_0 +197 0x4848 //RX_FDEQ_GAIN_1 +198 0x4848 //RX_FDEQ_GAIN_2 +199 0x4848 //RX_FDEQ_GAIN_3 +200 0x4848 //RX_FDEQ_GAIN_4 +201 0x4848 //RX_FDEQ_GAIN_5 +202 0x4848 //RX_FDEQ_GAIN_6 +203 0x4848 //RX_FDEQ_GAIN_7 +204 0x4848 //RX_FDEQ_GAIN_8 +205 0x4848 //RX_FDEQ_GAIN_9 +206 0x4848 //RX_FDEQ_GAIN_10 +207 0x4848 //RX_FDEQ_GAIN_11 +208 0x4848 //RX_FDEQ_GAIN_12 +209 0x4848 //RX_FDEQ_GAIN_13 +210 0x4848 //RX_FDEQ_GAIN_14 +211 0x4848 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0202 //RX_FDEQ_BIN_0 +221 0x0203 //RX_FDEQ_BIN_1 +222 0x0304 //RX_FDEQ_BIN_2 +223 0x0405 //RX_FDEQ_BIN_3 +224 0x0607 //RX_FDEQ_BIN_4 +225 0x0809 //RX_FDEQ_BIN_5 +226 0x0A0B //RX_FDEQ_BIN_6 +227 0x0C0D //RX_FDEQ_BIN_7 +228 0x0E0F //RX_FDEQ_BIN_8 +229 0x1011 //RX_FDEQ_BIN_9 +230 0x1214 //RX_FDEQ_BIN_10 +231 0x1618 //RX_FDEQ_BIN_11 +232 0x1C1C //RX_FDEQ_BIN_12 +233 0x2020 //RX_FDEQ_BIN_13 +234 0x2020 //RX_FDEQ_BIN_14 +235 0x2011 //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x4000 //RX_FDEQ_RESRV_0 +245 0x0320 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0030 //RX_FDDRC_BAND_MARGIN_1 +248 0x0050 //RX_FDDRC_BAND_MARGIN_2 +249 0x0080 //RX_FDDRC_BAND_MARGIN_3 +250 0x0007 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x5000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x6400 //RX_FDDRC_THRD_3_2 +258 0x6400 //RX_FDDRC_THRD_3_3 +259 0x2000 //RX_FDDRC_SLANT_0_0 +260 0x2000 //RX_FDDRC_SLANT_0_1 +261 0x2000 //RX_FDDRC_SLANT_0_2 +262 0x2000 //RX_FDDRC_SLANT_0_3 +263 0x5333 //RX_FDDRC_SLANT_1_0 +264 0x5333 //RX_FDDRC_SLANT_1_1 +265 0x5333 //RX_FDDRC_SLANT_1_2 +266 0x5333 //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +286 0x0100 //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 +#VOL 4 +163 0x1000 //RX_TDDRC_ALPHA_UP_1 +164 0x1000 //RX_TDDRC_ALPHA_UP_2 +165 0x1000 //RX_TDDRC_ALPHA_UP_3 +166 0x1000 //RX_TDDRC_ALPHA_UP_4 +184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +190 0x7FFF //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +269 0x0000 //RX_TDDRC_THRD_0 +270 0x0000 //RX_TDDRC_THRD_1 +271 0x7FFF //RX_TDDRC_THRD_2 +272 0x7FFF //RX_TDDRC_THRD_3 +273 0x7FFF //RX_TDDRC_SLANT_0 +274 0x7FFF //RX_TDDRC_SLANT_1 +275 0x1000 //RX_TDDRC_ALPHA_UP_0 +276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x199A //RX_TDDRC_HMNC_GAIN +279 0x0001 //RX_TDDRC_SMT_FLAG +280 0x0CCD //RX_TDDRC_SMT_W +281 0x0155 //RX_TDDRC_DRC_GAIN +195 0x0020 //RX_FDEQ_SUBNUM +196 0x4848 //RX_FDEQ_GAIN_0 +197 0x4848 //RX_FDEQ_GAIN_1 +198 0x4848 //RX_FDEQ_GAIN_2 +199 0x4848 //RX_FDEQ_GAIN_3 +200 0x4848 //RX_FDEQ_GAIN_4 +201 0x4848 //RX_FDEQ_GAIN_5 +202 0x4848 //RX_FDEQ_GAIN_6 +203 0x4848 //RX_FDEQ_GAIN_7 +204 0x4848 //RX_FDEQ_GAIN_8 +205 0x4848 //RX_FDEQ_GAIN_9 +206 0x4848 //RX_FDEQ_GAIN_10 +207 0x4848 //RX_FDEQ_GAIN_11 +208 0x4848 //RX_FDEQ_GAIN_12 +209 0x4848 //RX_FDEQ_GAIN_13 +210 0x4848 //RX_FDEQ_GAIN_14 +211 0x4848 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0202 //RX_FDEQ_BIN_0 +221 0x0203 //RX_FDEQ_BIN_1 +222 0x0304 //RX_FDEQ_BIN_2 +223 0x0405 //RX_FDEQ_BIN_3 +224 0x0607 //RX_FDEQ_BIN_4 +225 0x0809 //RX_FDEQ_BIN_5 +226 0x0A0B //RX_FDEQ_BIN_6 +227 0x0C0D //RX_FDEQ_BIN_7 +228 0x0E0F //RX_FDEQ_BIN_8 +229 0x1011 //RX_FDEQ_BIN_9 +230 0x1214 //RX_FDEQ_BIN_10 +231 0x1618 //RX_FDEQ_BIN_11 +232 0x1C1C //RX_FDEQ_BIN_12 +233 0x2020 //RX_FDEQ_BIN_13 +234 0x2020 //RX_FDEQ_BIN_14 +235 0x2011 //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x4000 //RX_FDEQ_RESRV_0 +245 0x0320 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0030 //RX_FDDRC_BAND_MARGIN_1 +248 0x0050 //RX_FDDRC_BAND_MARGIN_2 +249 0x0080 //RX_FDDRC_BAND_MARGIN_3 +250 0x0007 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x5000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x6400 //RX_FDDRC_THRD_3_2 +258 0x6400 //RX_FDDRC_THRD_3_3 +259 0x2000 //RX_FDDRC_SLANT_0_0 +260 0x2000 //RX_FDDRC_SLANT_0_1 +261 0x2000 //RX_FDDRC_SLANT_0_2 +262 0x2000 //RX_FDDRC_SLANT_0_3 +263 0x5333 //RX_FDDRC_SLANT_1_0 +264 0x5333 //RX_FDDRC_SLANT_1_1 +265 0x5333 //RX_FDDRC_SLANT_1_2 +266 0x5333 //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +286 0x0100 //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 +#VOL 5 +163 0x1000 //RX_TDDRC_ALPHA_UP_1 +164 0x1000 //RX_TDDRC_ALPHA_UP_2 +165 0x1000 //RX_TDDRC_ALPHA_UP_3 +166 0x1000 //RX_TDDRC_ALPHA_UP_4 +184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +190 0x7FFF //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +269 0x0000 //RX_TDDRC_THRD_0 +270 0x0000 //RX_TDDRC_THRD_1 +271 0x7FFF //RX_TDDRC_THRD_2 +272 0x7FFF //RX_TDDRC_THRD_3 +273 0x7FFF //RX_TDDRC_SLANT_0 +274 0x7FFF //RX_TDDRC_SLANT_1 +275 0x1000 //RX_TDDRC_ALPHA_UP_0 +276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x199A //RX_TDDRC_HMNC_GAIN +279 0x0001 //RX_TDDRC_SMT_FLAG +280 0x0CCD //RX_TDDRC_SMT_W +281 0x0155 //RX_TDDRC_DRC_GAIN +195 0x0020 //RX_FDEQ_SUBNUM +196 0x4848 //RX_FDEQ_GAIN_0 +197 0x4848 //RX_FDEQ_GAIN_1 +198 0x4848 //RX_FDEQ_GAIN_2 +199 0x4848 //RX_FDEQ_GAIN_3 +200 0x4848 //RX_FDEQ_GAIN_4 +201 0x4848 //RX_FDEQ_GAIN_5 +202 0x4848 //RX_FDEQ_GAIN_6 +203 0x4848 //RX_FDEQ_GAIN_7 +204 0x4848 //RX_FDEQ_GAIN_8 +205 0x4848 //RX_FDEQ_GAIN_9 +206 0x4848 //RX_FDEQ_GAIN_10 +207 0x4848 //RX_FDEQ_GAIN_11 +208 0x4848 //RX_FDEQ_GAIN_12 +209 0x4848 //RX_FDEQ_GAIN_13 +210 0x4848 //RX_FDEQ_GAIN_14 +211 0x4848 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0202 //RX_FDEQ_BIN_0 +221 0x0203 //RX_FDEQ_BIN_1 +222 0x0304 //RX_FDEQ_BIN_2 +223 0x0405 //RX_FDEQ_BIN_3 +224 0x0607 //RX_FDEQ_BIN_4 +225 0x0809 //RX_FDEQ_BIN_5 +226 0x0A0B //RX_FDEQ_BIN_6 +227 0x0C0D //RX_FDEQ_BIN_7 +228 0x0E0F //RX_FDEQ_BIN_8 +229 0x1011 //RX_FDEQ_BIN_9 +230 0x1214 //RX_FDEQ_BIN_10 +231 0x1618 //RX_FDEQ_BIN_11 +232 0x1C1C //RX_FDEQ_BIN_12 +233 0x2020 //RX_FDEQ_BIN_13 +234 0x2020 //RX_FDEQ_BIN_14 +235 0x2011 //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x4000 //RX_FDEQ_RESRV_0 +245 0x0320 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0030 //RX_FDDRC_BAND_MARGIN_1 +248 0x0050 //RX_FDDRC_BAND_MARGIN_2 +249 0x0080 //RX_FDDRC_BAND_MARGIN_3 +250 0x0007 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x5000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x6400 //RX_FDDRC_THRD_3_2 +258 0x6400 //RX_FDDRC_THRD_3_3 +259 0x2000 //RX_FDDRC_SLANT_0_0 +260 0x2000 //RX_FDDRC_SLANT_0_1 +261 0x2000 //RX_FDDRC_SLANT_0_2 +262 0x2000 //RX_FDDRC_SLANT_0_3 +263 0x5333 //RX_FDDRC_SLANT_1_0 +264 0x5333 //RX_FDDRC_SLANT_1_1 +265 0x5333 //RX_FDDRC_SLANT_1_2 +266 0x5333 //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +286 0x0100 //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 +#VOL 6 +163 0x1000 //RX_TDDRC_ALPHA_UP_1 +164 0x1000 //RX_TDDRC_ALPHA_UP_2 +165 0x1000 //RX_TDDRC_ALPHA_UP_3 +166 0x1000 //RX_TDDRC_ALPHA_UP_4 +184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +190 0x7FFF //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +269 0x0000 //RX_TDDRC_THRD_0 +270 0x0000 //RX_TDDRC_THRD_1 +271 0x7FFF //RX_TDDRC_THRD_2 +272 0x7FFF //RX_TDDRC_THRD_3 +273 0x7FFF //RX_TDDRC_SLANT_0 +274 0x7FFF //RX_TDDRC_SLANT_1 +275 0x1000 //RX_TDDRC_ALPHA_UP_0 +276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x199A //RX_TDDRC_HMNC_GAIN +279 0x0001 //RX_TDDRC_SMT_FLAG +280 0x0CCD //RX_TDDRC_SMT_W +281 0x0155 //RX_TDDRC_DRC_GAIN +195 0x0020 //RX_FDEQ_SUBNUM +196 0x4848 //RX_FDEQ_GAIN_0 +197 0x4848 //RX_FDEQ_GAIN_1 +198 0x4848 //RX_FDEQ_GAIN_2 +199 0x4848 //RX_FDEQ_GAIN_3 +200 0x4848 //RX_FDEQ_GAIN_4 +201 0x4848 //RX_FDEQ_GAIN_5 +202 0x4848 //RX_FDEQ_GAIN_6 +203 0x4848 //RX_FDEQ_GAIN_7 +204 0x4848 //RX_FDEQ_GAIN_8 +205 0x4848 //RX_FDEQ_GAIN_9 +206 0x4848 //RX_FDEQ_GAIN_10 +207 0x4848 //RX_FDEQ_GAIN_11 +208 0x4848 //RX_FDEQ_GAIN_12 +209 0x4848 //RX_FDEQ_GAIN_13 +210 0x4848 //RX_FDEQ_GAIN_14 +211 0x4848 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0202 //RX_FDEQ_BIN_0 +221 0x0203 //RX_FDEQ_BIN_1 +222 0x0304 //RX_FDEQ_BIN_2 +223 0x0405 //RX_FDEQ_BIN_3 +224 0x0607 //RX_FDEQ_BIN_4 +225 0x0809 //RX_FDEQ_BIN_5 +226 0x0A0B //RX_FDEQ_BIN_6 +227 0x0C0D //RX_FDEQ_BIN_7 +228 0x0E0F //RX_FDEQ_BIN_8 +229 0x1011 //RX_FDEQ_BIN_9 +230 0x1214 //RX_FDEQ_BIN_10 +231 0x1618 //RX_FDEQ_BIN_11 +232 0x1C1C //RX_FDEQ_BIN_12 +233 0x2020 //RX_FDEQ_BIN_13 +234 0x2020 //RX_FDEQ_BIN_14 +235 0x2011 //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x4000 //RX_FDEQ_RESRV_0 +245 0x0320 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0030 //RX_FDDRC_BAND_MARGIN_1 +248 0x0050 //RX_FDDRC_BAND_MARGIN_2 +249 0x0080 //RX_FDDRC_BAND_MARGIN_3 +250 0x0007 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x5000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x6400 //RX_FDDRC_THRD_3_2 +258 0x6400 //RX_FDDRC_THRD_3_3 +259 0x2000 //RX_FDDRC_SLANT_0_0 +260 0x2000 //RX_FDDRC_SLANT_0_1 +261 0x2000 //RX_FDDRC_SLANT_0_2 +262 0x2000 //RX_FDDRC_SLANT_0_3 +263 0x5333 //RX_FDDRC_SLANT_1_0 +264 0x5333 //RX_FDDRC_SLANT_1_1 +265 0x5333 //RX_FDDRC_SLANT_1_2 +266 0x5333 //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +286 0x0100 //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 #CASE_NAME BLUETOOTH-BTWB-VOICE_GENERIC-NB -#PARAM_TYPE TX+RX -#TOTAL_CUSTOM_STEP 7 +#PARAM_MODE Full +#PARAM_TYPE TX+2RX +#TOTAL_CUSTOM_STEP 7+7 #TX 0 0x0008 //TX_OPERATION_MODE_0 1 0x0008 //TX_OPERATION_MODE_1 @@ -23047,20 +34969,20 @@ 248 0xF400 //TX_THR_SN_EST_6 249 0xF600 //TX_THR_SN_EST_7 250 0x0000 //TX_DELTA_THR_SN_EST_0 -251 0x0000 //TX_DELTA_THR_SN_EST_1 +251 0x0200 //TX_DELTA_THR_SN_EST_1 252 0x0200 //TX_DELTA_THR_SN_EST_2 253 0x0200 //TX_DELTA_THR_SN_EST_3 254 0x0200 //TX_DELTA_THR_SN_EST_4 255 0x0200 //TX_DELTA_THR_SN_EST_5 -256 0x0200 //TX_DELTA_THR_SN_EST_6 +256 0x0000 //TX_DELTA_THR_SN_EST_6 257 0x0200 //TX_DELTA_THR_SN_EST_7 258 0x6000 //TX_LAMBDA_NN_EST_0 -259 0x6000 //TX_LAMBDA_NN_EST_1 +259 0x4000 //TX_LAMBDA_NN_EST_1 260 0x4000 //TX_LAMBDA_NN_EST_2 261 0x4000 //TX_LAMBDA_NN_EST_3 262 0x4000 //TX_LAMBDA_NN_EST_4 263 0x4000 //TX_LAMBDA_NN_EST_5 -264 0x4000 //TX_LAMBDA_NN_EST_6 +264 0x6000 //TX_LAMBDA_NN_EST_6 265 0x4000 //TX_LAMBDA_NN_EST_7 266 0x0400 //TX_N_SN_EST 267 0x001E //TX_INBEAM_T @@ -23078,16 +35000,16 @@ 279 0x1000 //TX_B_POST_FLT_0 280 0x1000 //TX_B_POST_FLT_1 281 0x000F //TX_NS_LVL_CTRL_0 -282 0x000F //TX_NS_LVL_CTRL_1 -283 0x0011 //TX_NS_LVL_CTRL_2 +282 0x0011 //TX_NS_LVL_CTRL_1 +283 0x000F //TX_NS_LVL_CTRL_2 284 0x000F //TX_NS_LVL_CTRL_3 285 0x000F //TX_NS_LVL_CTRL_4 286 0x000F //TX_NS_LVL_CTRL_5 287 0x000F //TX_NS_LVL_CTRL_6 288 0x0011 //TX_NS_LVL_CTRL_7 289 0x000C //TX_MIN_GAIN_S_0 -290 0x000C //TX_MIN_GAIN_S_1 -291 0x000F //TX_MIN_GAIN_S_2 +290 0x000F //TX_MIN_GAIN_S_1 +291 0x000C //TX_MIN_GAIN_S_2 292 0x000C //TX_MIN_GAIN_S_3 293 0x000C //TX_MIN_GAIN_S_4 294 0x000C //TX_MIN_GAIN_S_5 @@ -23111,12 +35033,12 @@ 312 0x7FFF //TX_A_POST_FILT_0 313 0x2000 //TX_A_POST_FILT_1 314 0x4000 //TX_A_POST_FILT_S_0 -315 0x4000 //TX_A_POST_FILT_S_1 +315 0x5000 //TX_A_POST_FILT_S_1 316 0x5000 //TX_A_POST_FILT_S_2 317 0x5000 //TX_A_POST_FILT_S_3 318 0x5000 //TX_A_POST_FILT_S_4 319 0x5000 //TX_A_POST_FILT_S_5 -320 0x5000 //TX_A_POST_FILT_S_6 +320 0x4000 //TX_A_POST_FILT_S_6 321 0x5000 //TX_A_POST_FILT_S_7 322 0x1000 //TX_B_POST_FILT_0 323 0x1000 //TX_B_POST_FILT_1 @@ -23176,10 +35098,10 @@ 377 0x7FFF //TX_NOISE_TH_5_4 378 0x044C //TX_NOISE_TH_6 379 0x0014 //TX_MINENOISE_TH -380 0x4000 //TX_MINENOISE_MIC0_TH_MTS -381 0xFFEE //TX_MINENOISE_MIC0_TH_EXP -382 0x6000 //TX_MINENOISE_MIC0_S_TH_MTS -383 0xFFF3 //TX_MINENOISE_MIC0_S_TH_EXP +380 0x4000 //TX_MORENS_TFMASK_TH +381 0xFFEE //TX_DRC_QUIET_FLOOR +382 0x6000 //TX_RATIODTL_CUT_TH +383 0xFFF3 //TX_DT_CUT_K1 384 0x0666 //TX_OUT_ENER_S_TH_CLEAN 385 0x0666 //TX_OUT_ENER_S_TH_LESSCLEAN 386 0x0333 //TX_OUT_ENER_S_TH_NOISY @@ -23187,15 +35109,15 @@ 388 0x0333 //TX_OUT_ENER_TH_SPEECH 389 0x2000 //TX_SN_NPB_GAIN 390 0x0000 //TX_NN_NPB_GAIN -391 0x0000 //TX_CSX_ALPHA_0 -392 0x0000 //TX_CSX_ALPHA_1 -393 0x0000 //TX_CSX_ALPHA_2 -394 0x0000 //TX_CSX_ALPHA_3 -395 0x0800 //TX_MU_ARSP_EST -396 0x00C8 //TX_P_OUTBEAM_MIN_TH +391 0x0000 //TX_POST_MASK_SUP_HSNE +392 0x0000 //TX_TAIL_DET_TH +393 0x0000 //TX_B_LESSCUT_RTO_WTA +394 0x0000 //TX_MEL_G_R +395 0x0800 //TX_SUPHIGH_TH +396 0x00C8 //TX_MASK_G_R 397 0x0002 //TX_EXTRA_NS_L -398 0x0800 //TX_EXTRA_NS_A -399 0x0005 //TX_VR_NOISE_FLOOR_TH +398 0x0800 //TX_C_POST_FLT_MASK +399 0x0005 //TX_A_POST_FLT_WNS 400 0x0148 //TX_MIN_G_LOW300HZ 401 0x0002 //TX_MAXLEVEL_CNG 402 0x00B4 //TX_STN_NOISE_TH @@ -23310,16 +35232,16 @@ 511 0x6666 //TX_MIC_TO_BFGAIN 512 0x0000 //TX_MICTOBFGAIN0 513 0x0000 //TX_FASTMUE_TH -514 0x0000 //TX_DERVB_LEN_0 -515 0x0000 //TX_DERVB_LEN_1 -516 0x0000 //TX_RHO_DERVB -517 0x0000 //TX_MIC_INDX_DERVB -518 0x0000 //TX_MU_DERVB -519 0x0000 //TX_DR_RESRV_0 -520 0x0000 //TX_DR_RESRV_1 -521 0x0000 //TX_DR_RESRV_2 -522 0x0000 //TX_DR_RESRV_3 -523 0x0000 //TX_DR_RESRV_4 +514 0x0000 //TX_DEREVERB_LF_MU +515 0x0000 //TX_DEREVERB_HF_MU +516 0x0000 //TX_DEREVERB_DELAY +517 0x0000 //TX_DEREVERB_COEF_LEN +518 0x0000 //TX_DEREVERB_DNR +519 0x0000 //TX_DEREVERB_ALPHA +520 0x0000 //TX_DEREVERB_BETA +521 0x0000 //TX_GSC_RTOL_TH +522 0x0000 //TX_GSC_RTOH_TH +523 0x0000 //TX_WIDE2_MEANHTH 524 0x0000 //TX_DR_RESRV_5 525 0x0000 //TX_DR_RESRV_6 526 0x0000 //TX_DR_RESRV_7 @@ -23693,8 +35615,73 @@ 894 0xC000 //TX_FASTNS_SSA_THHFL 895 0xCCCC //TX_FASTNS_SSA_THLFH 896 0xD999 //TX_FASTNS_SSA_THHFH +897 0x0000 //TX_SENDFUNC_REG_MICMUTE +898 0x0000 //TX_SENDFUNC_REG_MICMUTE1 +899 0x0000 //TX_MICMUTE_RATIO_THR +900 0x0000 //TX_MICMUTE_AMP_THR +901 0x0000 //TX_MICMUTE_HPF_IND +902 0x0000 //TX_MICMUTE_LOG_EYR_TH +903 0x0000 //TX_MICMUTE_CVG_TIME +904 0x0000 //TX_MICMUTE_RELEASE_TIME +905 0x0000 //TX_MIC_VOLUME_MIC0MUTE +906 0x0000 //TX_MICMUTE_EPD_OFFSET_0 +907 0x0000 //TX_MICMUTE_FRQ_AEC_L +908 0x0000 //TX_MICMUTE_EAD_THR +909 0x0000 //TX_MICMUTE_LAMBDA_CB_NLE +910 0x0000 //TX_MICMUTE_LAMBDA_RE_EST +911 0x0000 //TX_DTD_THR1_MICMUTE_0 +912 0x0000 //TX_DTD_THR1_MICMUTE_1 +913 0x0000 //TX_DTD_THR1_MICMUTE_2 +914 0x0000 //TX_DTD_THR1_MICMUTE_3 +915 0x0000 //TX_DTD_THR2_MICMUTE_0 +916 0x0000 //TX_MICMUTE_MIN_EQ_RE_EST_0 +917 0x0000 //TX_MICMUTE_MIN_EQ_RE_EST_1 +918 0x0000 //TX_MICMUTE_MIN_EQ_RE_EST_2 +919 0x0000 //TX_MICMUTE_MIN_EQ_RE_EST_3 +920 0x0000 //TX_MICMUTE_MIN_EQ_RE_EST_4 +921 0x0000 //TX_MICMUTE_C_POST_FLT +922 0x0000 //TX_MICMUTE_DT_CUT_K +923 0x0000 //TX_MICMUTE_DT_CUT_THR +924 0x0000 //TX_MICMUTE_DT_CUT_K2 +925 0x0000 //TX_MICMUTE_DT_CUT_THR2 +926 0x0000 //TX_MICMUTE_DT2_HOLD_N +927 0x0000 //TX_MICMUTE_RATIODTH_THCUT +928 0x0000 //TX_MICMUTE_B_POST_FLT_ECHOL +929 0x0000 //TX_MICMUTE_B_POST_FLT_ECHOH +930 0x0000 //TX_MICMUTE_C_POST_FLT_MASK +931 0x0000 //TX_MICMUTE_RATIODTL_CUT_TH +932 0x0000 //TX_MICMUTE_DT_CUT_K1 +933 0x0000 //TX_MICMUTE_N2_SN_EST +934 0x0000 //TX_MICMUTE_THR_SN_EST_0 +935 0x0000 //TX_MICMUTE_MIN_G_CTRL_0 +936 0x0000 //TX_MICMUTE_A_POST_FILT_S_0 +937 0x0000 //TX_MICMUTE_B_POST_FILT_0 +938 0x0000 //TX_MIC1RUB_AMP_THR +939 0x0000 //TX_MIC1MUTE_RATIO_THR +940 0x0000 //TX_MIC1MUTE_AMP_THR +941 0x0000 //TX_MIC1MUTE_CVG_TIME +942 0x0000 //TX_MIC1MUTE_RELEASE_TIME +943 0x0000 //TX_AMS_RESRV_01 +944 0x0000 //TX_AMS_RESRV_02 +945 0x0000 //TX_AMS_RESRV_03 +946 0x0000 //TX_AMS_RESRV_04 +947 0x0000 //TX_AMS_RESRV_05 +948 0x0000 //TX_AMS_RESRV_06 +949 0x0000 //TX_AMS_RESRV_07 +950 0x0000 //TX_AMS_RESRV_08 +951 0x0000 //TX_AMS_RESRV_09 +952 0x0000 //TX_AMS_RESRV_10 +953 0x0000 //TX_AMS_RESRV_11 +954 0x0000 //TX_AMS_RESRV_12 +955 0x0000 //TX_AMS_RESRV_13 +956 0x0000 //TX_AMS_RESRV_14 +957 0x0000 //TX_AMS_RESRV_15 +958 0x0000 //TX_AMS_RESRV_16 +959 0x0000 //TX_AMS_RESRV_17 +960 0x0000 //TX_AMS_RESRV_18 +961 0x0000 //TX_AMS_RESRV_19 #RX -0 0x006C //RX_RECVFUNC_MODE_0 +0 0x206C //RX_RECVFUNC_MODE_0 1 0x0000 //RX_RECVFUNC_MODE_1 2 0x0000 //RX_SAMPLINGFREQ_SIG 3 0x0000 //RX_SAMPLINGFREQ_PROC @@ -24544,10 +36531,862 @@ 110 0x0000 //RX_FDDRC_RESRV_0 129 0x0100 //RX_SPK_VOL 130 0x0000 //RX_VOL_RESRV_0 +#RX 2 +157 0x206C //RX_RECVFUNC_MODE_0 +158 0x0000 //RX_RECVFUNC_MODE_1 +159 0x0000 //RX_SAMPLINGFREQ_SIG +160 0x0000 //RX_SAMPLINGFREQ_PROC +161 0x000A //RX_FRAME_SZ +162 0x0000 //RX_DELAY_OPT +163 0x3000 //RX_TDDRC_ALPHA_UP_1 +164 0x3000 //RX_TDDRC_ALPHA_UP_2 +165 0x3000 //RX_TDDRC_ALPHA_UP_3 +166 0x3000 //RX_TDDRC_ALPHA_UP_4 +167 0x0800 //RX_PGA +168 0x7FFF //RX_A_HP +169 0x0000 //RX_B_PE +170 0x3800 //RX_THR_PITCH_DET_0 +171 0x3000 //RX_THR_PITCH_DET_1 +172 0x2800 //RX_THR_PITCH_DET_2 +173 0x0008 //RX_PITCH_BFR_LEN +174 0x0003 //RX_SBD_PITCH_DET +175 0x0100 //RX_PP_RESRV_0 +176 0x0020 //RX_PP_RESRV_1 +177 0x0600 //RX_N_SN_EST +178 0x000C //RX_N2_SN_EST +179 0x0010 //RX_NS_LVL_CTRL +180 0xF800 //RX_THR_SN_EST +181 0x7CCD //RX_LAMBDA_PFILT +182 0x000A //RX_FENS_RESRV_0 +183 0x0190 //RX_FENS_RESRV_1 +184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +187 0x0002 //RX_EXTRA_NS_L +188 0x0800 //RX_EXTRA_NS_A +189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +190 0x7FFF //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +192 0x199A //RX_A_POST_FLT +193 0x0000 //RX_LMT_THRD +194 0x4000 //RX_LMT_ALPHA +195 0x0014 //RX_FDEQ_SUBNUM +196 0x4848 //RX_FDEQ_GAIN_0 +197 0x4848 //RX_FDEQ_GAIN_1 +198 0x4848 //RX_FDEQ_GAIN_2 +199 0x4848 //RX_FDEQ_GAIN_3 +200 0x4848 //RX_FDEQ_GAIN_4 +201 0x4848 //RX_FDEQ_GAIN_5 +202 0x4444 //RX_FDEQ_GAIN_6 +203 0x4040 //RX_FDEQ_GAIN_7 +204 0x4040 //RX_FDEQ_GAIN_8 +205 0x4040 //RX_FDEQ_GAIN_9 +206 0x4848 //RX_FDEQ_GAIN_10 +207 0x4848 //RX_FDEQ_GAIN_11 +208 0x4848 //RX_FDEQ_GAIN_12 +209 0x4848 //RX_FDEQ_GAIN_13 +210 0x4848 //RX_FDEQ_GAIN_14 +211 0x4848 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0202 //RX_FDEQ_BIN_0 +221 0x0203 //RX_FDEQ_BIN_1 +222 0x0303 //RX_FDEQ_BIN_2 +223 0x0304 //RX_FDEQ_BIN_3 +224 0x0405 //RX_FDEQ_BIN_4 +225 0x0506 //RX_FDEQ_BIN_5 +226 0x0708 //RX_FDEQ_BIN_6 +227 0x090A //RX_FDEQ_BIN_7 +228 0x0B0C //RX_FDEQ_BIN_8 +229 0x0D0E //RX_FDEQ_BIN_9 +230 0x0000 //RX_FDEQ_BIN_10 +231 0x0000 //RX_FDEQ_BIN_11 +232 0x0000 //RX_FDEQ_BIN_12 +233 0x0000 //RX_FDEQ_BIN_13 +234 0x0000 //RX_FDEQ_BIN_14 +235 0x0000 //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x4000 //RX_FDEQ_RESRV_0 +245 0x0320 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0030 //RX_FDDRC_BAND_MARGIN_1 +248 0x0050 //RX_FDDRC_BAND_MARGIN_2 +249 0x0080 //RX_FDDRC_BAND_MARGIN_3 +250 0x0007 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x5000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x6400 //RX_FDDRC_THRD_3_2 +258 0x6400 //RX_FDDRC_THRD_3_3 +259 0x2000 //RX_FDDRC_SLANT_0_0 +260 0x2000 //RX_FDDRC_SLANT_0_1 +261 0x2000 //RX_FDDRC_SLANT_0_2 +262 0x2000 //RX_FDDRC_SLANT_0_3 +263 0x5333 //RX_FDDRC_SLANT_1_0 +264 0x5333 //RX_FDDRC_SLANT_1_1 +265 0x5333 //RX_FDDRC_SLANT_1_2 +266 0x5333 //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +268 0x0000 //RX_FILTINDX +269 0x0000 //RX_TDDRC_THRD_0 +270 0x0000 //RX_TDDRC_THRD_1 +271 0x7FFF //RX_TDDRC_THRD_2 +272 0x7FFF //RX_TDDRC_THRD_3 +273 0x7FFF //RX_TDDRC_SLANT_0 +274 0x7EB8 //RX_TDDRC_SLANT_1 +275 0x3000 //RX_TDDRC_ALPHA_UP_0 +276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x199A //RX_TDDRC_HMNC_GAIN +279 0x0001 //RX_TDDRC_SMT_FLAG +280 0x0CCD //RX_TDDRC_SMT_W +281 0x017F //RX_TDDRC_DRC_GAIN +282 0x7C00 //RX_LAMBDA_PKA_FP +283 0x2000 //RX_TPKA_FP +284 0x2000 //RX_MIN_G_FP +285 0x0080 //RX_MAX_G_FP +286 0x0100 //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 +288 0x0000 //RX_MAXLEVEL_CNG +289 0x3000 //RX_BWE_UV_TH +290 0x3000 //RX_BWE_UV_TH2 +291 0x1800 //RX_BWE_UV_TH3 +292 0x1000 //RX_BWE_V_TH +293 0x04CD //RX_BWE_GAIN1_V_TH1 +294 0x0F33 //RX_BWE_GAIN1_V_TH2 +295 0x7333 //RX_BWE_UV_EQ +296 0x199A //RX_BWE_V_EQ +297 0x7333 //RX_BWE_TONE_TH +298 0x0004 //RX_BWE_UV_HOLD_T +299 0x6CCD //RX_BWE_GAIN2_ALPHA +300 0x799A //RX_BWE_GAIN3_ALPHA +301 0x001E //RX_BWE_CUTOFF +302 0x3000 //RX_BWE_GAINFILL +303 0x3200 //RX_BWE_MAXTH_TONE +304 0x2000 //RX_BWE_EQ_0 +305 0x2000 //RX_BWE_EQ_1 +306 0x2000 //RX_BWE_EQ_2 +307 0x2000 //RX_BWE_EQ_3 +308 0x2000 //RX_BWE_EQ_4 +309 0x2000 //RX_BWE_EQ_5 +310 0x2000 //RX_BWE_EQ_6 +311 0x0000 //RX_BWE_RESRV_0 +312 0x0000 //RX_BWE_RESRV_1 +313 0x0000 //RX_BWE_RESRV_2 +#VOL 0 +163 0x3000 //RX_TDDRC_ALPHA_UP_1 +164 0x3000 //RX_TDDRC_ALPHA_UP_2 +165 0x3000 //RX_TDDRC_ALPHA_UP_3 +166 0x3000 //RX_TDDRC_ALPHA_UP_4 +184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +190 0x7FFF //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +269 0x0000 //RX_TDDRC_THRD_0 +270 0x0000 //RX_TDDRC_THRD_1 +271 0x7FFF //RX_TDDRC_THRD_2 +272 0x7FFF //RX_TDDRC_THRD_3 +273 0x7FFF //RX_TDDRC_SLANT_0 +274 0x7EB8 //RX_TDDRC_SLANT_1 +275 0x3000 //RX_TDDRC_ALPHA_UP_0 +276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x199A //RX_TDDRC_HMNC_GAIN +279 0x0001 //RX_TDDRC_SMT_FLAG +280 0x0CCD //RX_TDDRC_SMT_W +281 0x017F //RX_TDDRC_DRC_GAIN +195 0x0014 //RX_FDEQ_SUBNUM +196 0x4848 //RX_FDEQ_GAIN_0 +197 0x4848 //RX_FDEQ_GAIN_1 +198 0x4848 //RX_FDEQ_GAIN_2 +199 0x4848 //RX_FDEQ_GAIN_3 +200 0x4848 //RX_FDEQ_GAIN_4 +201 0x4848 //RX_FDEQ_GAIN_5 +202 0x4444 //RX_FDEQ_GAIN_6 +203 0x4040 //RX_FDEQ_GAIN_7 +204 0x4040 //RX_FDEQ_GAIN_8 +205 0x4040 //RX_FDEQ_GAIN_9 +206 0x4848 //RX_FDEQ_GAIN_10 +207 0x4848 //RX_FDEQ_GAIN_11 +208 0x4848 //RX_FDEQ_GAIN_12 +209 0x4848 //RX_FDEQ_GAIN_13 +210 0x4848 //RX_FDEQ_GAIN_14 +211 0x4848 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0202 //RX_FDEQ_BIN_0 +221 0x0203 //RX_FDEQ_BIN_1 +222 0x0303 //RX_FDEQ_BIN_2 +223 0x0304 //RX_FDEQ_BIN_3 +224 0x0405 //RX_FDEQ_BIN_4 +225 0x0506 //RX_FDEQ_BIN_5 +226 0x0708 //RX_FDEQ_BIN_6 +227 0x090A //RX_FDEQ_BIN_7 +228 0x0B0C //RX_FDEQ_BIN_8 +229 0x0D0E //RX_FDEQ_BIN_9 +230 0x0000 //RX_FDEQ_BIN_10 +231 0x0000 //RX_FDEQ_BIN_11 +232 0x0000 //RX_FDEQ_BIN_12 +233 0x0000 //RX_FDEQ_BIN_13 +234 0x0000 //RX_FDEQ_BIN_14 +235 0x0000 //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x4000 //RX_FDEQ_RESRV_0 +245 0x0320 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0030 //RX_FDDRC_BAND_MARGIN_1 +248 0x0050 //RX_FDDRC_BAND_MARGIN_2 +249 0x0080 //RX_FDDRC_BAND_MARGIN_3 +250 0x0007 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x5000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x6400 //RX_FDDRC_THRD_3_2 +258 0x6400 //RX_FDDRC_THRD_3_3 +259 0x2000 //RX_FDDRC_SLANT_0_0 +260 0x2000 //RX_FDDRC_SLANT_0_1 +261 0x2000 //RX_FDDRC_SLANT_0_2 +262 0x2000 //RX_FDDRC_SLANT_0_3 +263 0x5333 //RX_FDDRC_SLANT_1_0 +264 0x5333 //RX_FDDRC_SLANT_1_1 +265 0x5333 //RX_FDDRC_SLANT_1_2 +266 0x5333 //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +286 0x0100 //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 +#VOL 1 +163 0x3000 //RX_TDDRC_ALPHA_UP_1 +164 0x3000 //RX_TDDRC_ALPHA_UP_2 +165 0x3000 //RX_TDDRC_ALPHA_UP_3 +166 0x3000 //RX_TDDRC_ALPHA_UP_4 +184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +190 0x7FFF //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +269 0x0000 //RX_TDDRC_THRD_0 +270 0x0000 //RX_TDDRC_THRD_1 +271 0x7FFF //RX_TDDRC_THRD_2 +272 0x7FFF //RX_TDDRC_THRD_3 +273 0x7FFF //RX_TDDRC_SLANT_0 +274 0x7EB8 //RX_TDDRC_SLANT_1 +275 0x3000 //RX_TDDRC_ALPHA_UP_0 +276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x199A //RX_TDDRC_HMNC_GAIN +279 0x0001 //RX_TDDRC_SMT_FLAG +280 0x0CCD //RX_TDDRC_SMT_W +281 0x017F //RX_TDDRC_DRC_GAIN +195 0x0014 //RX_FDEQ_SUBNUM +196 0x4848 //RX_FDEQ_GAIN_0 +197 0x4848 //RX_FDEQ_GAIN_1 +198 0x4848 //RX_FDEQ_GAIN_2 +199 0x4848 //RX_FDEQ_GAIN_3 +200 0x4848 //RX_FDEQ_GAIN_4 +201 0x4848 //RX_FDEQ_GAIN_5 +202 0x4444 //RX_FDEQ_GAIN_6 +203 0x4040 //RX_FDEQ_GAIN_7 +204 0x4040 //RX_FDEQ_GAIN_8 +205 0x4040 //RX_FDEQ_GAIN_9 +206 0x4848 //RX_FDEQ_GAIN_10 +207 0x4848 //RX_FDEQ_GAIN_11 +208 0x4848 //RX_FDEQ_GAIN_12 +209 0x4848 //RX_FDEQ_GAIN_13 +210 0x4848 //RX_FDEQ_GAIN_14 +211 0x4848 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0202 //RX_FDEQ_BIN_0 +221 0x0203 //RX_FDEQ_BIN_1 +222 0x0303 //RX_FDEQ_BIN_2 +223 0x0304 //RX_FDEQ_BIN_3 +224 0x0405 //RX_FDEQ_BIN_4 +225 0x0506 //RX_FDEQ_BIN_5 +226 0x0708 //RX_FDEQ_BIN_6 +227 0x090A //RX_FDEQ_BIN_7 +228 0x0B0C //RX_FDEQ_BIN_8 +229 0x0D0E //RX_FDEQ_BIN_9 +230 0x0000 //RX_FDEQ_BIN_10 +231 0x0000 //RX_FDEQ_BIN_11 +232 0x0000 //RX_FDEQ_BIN_12 +233 0x0000 //RX_FDEQ_BIN_13 +234 0x0000 //RX_FDEQ_BIN_14 +235 0x0000 //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x4000 //RX_FDEQ_RESRV_0 +245 0x0320 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0030 //RX_FDDRC_BAND_MARGIN_1 +248 0x0050 //RX_FDDRC_BAND_MARGIN_2 +249 0x0080 //RX_FDDRC_BAND_MARGIN_3 +250 0x0007 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x5000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x6400 //RX_FDDRC_THRD_3_2 +258 0x6400 //RX_FDDRC_THRD_3_3 +259 0x2000 //RX_FDDRC_SLANT_0_0 +260 0x2000 //RX_FDDRC_SLANT_0_1 +261 0x2000 //RX_FDDRC_SLANT_0_2 +262 0x2000 //RX_FDDRC_SLANT_0_3 +263 0x5333 //RX_FDDRC_SLANT_1_0 +264 0x5333 //RX_FDDRC_SLANT_1_1 +265 0x5333 //RX_FDDRC_SLANT_1_2 +266 0x5333 //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +286 0x0100 //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 +#VOL 2 +163 0x3000 //RX_TDDRC_ALPHA_UP_1 +164 0x3000 //RX_TDDRC_ALPHA_UP_2 +165 0x3000 //RX_TDDRC_ALPHA_UP_3 +166 0x3000 //RX_TDDRC_ALPHA_UP_4 +184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +190 0x7FFF //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +269 0x0000 //RX_TDDRC_THRD_0 +270 0x0000 //RX_TDDRC_THRD_1 +271 0x7FFF //RX_TDDRC_THRD_2 +272 0x7FFF //RX_TDDRC_THRD_3 +273 0x7FFF //RX_TDDRC_SLANT_0 +274 0x7EB8 //RX_TDDRC_SLANT_1 +275 0x3000 //RX_TDDRC_ALPHA_UP_0 +276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x199A //RX_TDDRC_HMNC_GAIN +279 0x0001 //RX_TDDRC_SMT_FLAG +280 0x0CCD //RX_TDDRC_SMT_W +281 0x017F //RX_TDDRC_DRC_GAIN +195 0x0014 //RX_FDEQ_SUBNUM +196 0x4848 //RX_FDEQ_GAIN_0 +197 0x4848 //RX_FDEQ_GAIN_1 +198 0x4848 //RX_FDEQ_GAIN_2 +199 0x4848 //RX_FDEQ_GAIN_3 +200 0x4848 //RX_FDEQ_GAIN_4 +201 0x4848 //RX_FDEQ_GAIN_5 +202 0x4444 //RX_FDEQ_GAIN_6 +203 0x4040 //RX_FDEQ_GAIN_7 +204 0x4040 //RX_FDEQ_GAIN_8 +205 0x4040 //RX_FDEQ_GAIN_9 +206 0x4848 //RX_FDEQ_GAIN_10 +207 0x4848 //RX_FDEQ_GAIN_11 +208 0x4848 //RX_FDEQ_GAIN_12 +209 0x4848 //RX_FDEQ_GAIN_13 +210 0x4848 //RX_FDEQ_GAIN_14 +211 0x4848 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0202 //RX_FDEQ_BIN_0 +221 0x0203 //RX_FDEQ_BIN_1 +222 0x0303 //RX_FDEQ_BIN_2 +223 0x0304 //RX_FDEQ_BIN_3 +224 0x0405 //RX_FDEQ_BIN_4 +225 0x0506 //RX_FDEQ_BIN_5 +226 0x0708 //RX_FDEQ_BIN_6 +227 0x090A //RX_FDEQ_BIN_7 +228 0x0B0C //RX_FDEQ_BIN_8 +229 0x0D0E //RX_FDEQ_BIN_9 +230 0x0000 //RX_FDEQ_BIN_10 +231 0x0000 //RX_FDEQ_BIN_11 +232 0x0000 //RX_FDEQ_BIN_12 +233 0x0000 //RX_FDEQ_BIN_13 +234 0x0000 //RX_FDEQ_BIN_14 +235 0x0000 //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x4000 //RX_FDEQ_RESRV_0 +245 0x0320 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0030 //RX_FDDRC_BAND_MARGIN_1 +248 0x0050 //RX_FDDRC_BAND_MARGIN_2 +249 0x0080 //RX_FDDRC_BAND_MARGIN_3 +250 0x0007 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x5000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x6400 //RX_FDDRC_THRD_3_2 +258 0x6400 //RX_FDDRC_THRD_3_3 +259 0x2000 //RX_FDDRC_SLANT_0_0 +260 0x2000 //RX_FDDRC_SLANT_0_1 +261 0x2000 //RX_FDDRC_SLANT_0_2 +262 0x2000 //RX_FDDRC_SLANT_0_3 +263 0x5333 //RX_FDDRC_SLANT_1_0 +264 0x5333 //RX_FDDRC_SLANT_1_1 +265 0x5333 //RX_FDDRC_SLANT_1_2 +266 0x5333 //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +286 0x0100 //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 +#VOL 3 +163 0x3000 //RX_TDDRC_ALPHA_UP_1 +164 0x3000 //RX_TDDRC_ALPHA_UP_2 +165 0x3000 //RX_TDDRC_ALPHA_UP_3 +166 0x3000 //RX_TDDRC_ALPHA_UP_4 +184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +190 0x7FFF //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +269 0x0000 //RX_TDDRC_THRD_0 +270 0x0000 //RX_TDDRC_THRD_1 +271 0x7FFF //RX_TDDRC_THRD_2 +272 0x7FFF //RX_TDDRC_THRD_3 +273 0x7FFF //RX_TDDRC_SLANT_0 +274 0x7EB8 //RX_TDDRC_SLANT_1 +275 0x3000 //RX_TDDRC_ALPHA_UP_0 +276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x199A //RX_TDDRC_HMNC_GAIN +279 0x0001 //RX_TDDRC_SMT_FLAG +280 0x0CCD //RX_TDDRC_SMT_W +281 0x017F //RX_TDDRC_DRC_GAIN +195 0x0014 //RX_FDEQ_SUBNUM +196 0x4848 //RX_FDEQ_GAIN_0 +197 0x4848 //RX_FDEQ_GAIN_1 +198 0x4848 //RX_FDEQ_GAIN_2 +199 0x4848 //RX_FDEQ_GAIN_3 +200 0x4848 //RX_FDEQ_GAIN_4 +201 0x4848 //RX_FDEQ_GAIN_5 +202 0x4444 //RX_FDEQ_GAIN_6 +203 0x4040 //RX_FDEQ_GAIN_7 +204 0x4040 //RX_FDEQ_GAIN_8 +205 0x4040 //RX_FDEQ_GAIN_9 +206 0x4848 //RX_FDEQ_GAIN_10 +207 0x4848 //RX_FDEQ_GAIN_11 +208 0x4848 //RX_FDEQ_GAIN_12 +209 0x4848 //RX_FDEQ_GAIN_13 +210 0x4848 //RX_FDEQ_GAIN_14 +211 0x4848 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0202 //RX_FDEQ_BIN_0 +221 0x0203 //RX_FDEQ_BIN_1 +222 0x0303 //RX_FDEQ_BIN_2 +223 0x0304 //RX_FDEQ_BIN_3 +224 0x0405 //RX_FDEQ_BIN_4 +225 0x0506 //RX_FDEQ_BIN_5 +226 0x0708 //RX_FDEQ_BIN_6 +227 0x090A //RX_FDEQ_BIN_7 +228 0x0B0C //RX_FDEQ_BIN_8 +229 0x0D0E //RX_FDEQ_BIN_9 +230 0x0000 //RX_FDEQ_BIN_10 +231 0x0000 //RX_FDEQ_BIN_11 +232 0x0000 //RX_FDEQ_BIN_12 +233 0x0000 //RX_FDEQ_BIN_13 +234 0x0000 //RX_FDEQ_BIN_14 +235 0x0000 //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x4000 //RX_FDEQ_RESRV_0 +245 0x0320 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0030 //RX_FDDRC_BAND_MARGIN_1 +248 0x0050 //RX_FDDRC_BAND_MARGIN_2 +249 0x0080 //RX_FDDRC_BAND_MARGIN_3 +250 0x0007 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x5000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x6400 //RX_FDDRC_THRD_3_2 +258 0x6400 //RX_FDDRC_THRD_3_3 +259 0x2000 //RX_FDDRC_SLANT_0_0 +260 0x2000 //RX_FDDRC_SLANT_0_1 +261 0x2000 //RX_FDDRC_SLANT_0_2 +262 0x2000 //RX_FDDRC_SLANT_0_3 +263 0x5333 //RX_FDDRC_SLANT_1_0 +264 0x5333 //RX_FDDRC_SLANT_1_1 +265 0x5333 //RX_FDDRC_SLANT_1_2 +266 0x5333 //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +286 0x0100 //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 +#VOL 4 +163 0x3000 //RX_TDDRC_ALPHA_UP_1 +164 0x3000 //RX_TDDRC_ALPHA_UP_2 +165 0x3000 //RX_TDDRC_ALPHA_UP_3 +166 0x3000 //RX_TDDRC_ALPHA_UP_4 +184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +190 0x7FFF //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +269 0x0000 //RX_TDDRC_THRD_0 +270 0x0000 //RX_TDDRC_THRD_1 +271 0x7FFF //RX_TDDRC_THRD_2 +272 0x7FFF //RX_TDDRC_THRD_3 +273 0x7FFF //RX_TDDRC_SLANT_0 +274 0x7EB8 //RX_TDDRC_SLANT_1 +275 0x3000 //RX_TDDRC_ALPHA_UP_0 +276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x199A //RX_TDDRC_HMNC_GAIN +279 0x0001 //RX_TDDRC_SMT_FLAG +280 0x0CCD //RX_TDDRC_SMT_W +281 0x017F //RX_TDDRC_DRC_GAIN +195 0x0014 //RX_FDEQ_SUBNUM +196 0x4848 //RX_FDEQ_GAIN_0 +197 0x4848 //RX_FDEQ_GAIN_1 +198 0x4848 //RX_FDEQ_GAIN_2 +199 0x4848 //RX_FDEQ_GAIN_3 +200 0x4848 //RX_FDEQ_GAIN_4 +201 0x4848 //RX_FDEQ_GAIN_5 +202 0x4444 //RX_FDEQ_GAIN_6 +203 0x4040 //RX_FDEQ_GAIN_7 +204 0x4040 //RX_FDEQ_GAIN_8 +205 0x4040 //RX_FDEQ_GAIN_9 +206 0x4848 //RX_FDEQ_GAIN_10 +207 0x4848 //RX_FDEQ_GAIN_11 +208 0x4848 //RX_FDEQ_GAIN_12 +209 0x4848 //RX_FDEQ_GAIN_13 +210 0x4848 //RX_FDEQ_GAIN_14 +211 0x4848 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0202 //RX_FDEQ_BIN_0 +221 0x0203 //RX_FDEQ_BIN_1 +222 0x0303 //RX_FDEQ_BIN_2 +223 0x0304 //RX_FDEQ_BIN_3 +224 0x0405 //RX_FDEQ_BIN_4 +225 0x0506 //RX_FDEQ_BIN_5 +226 0x0708 //RX_FDEQ_BIN_6 +227 0x090A //RX_FDEQ_BIN_7 +228 0x0B0C //RX_FDEQ_BIN_8 +229 0x0D0E //RX_FDEQ_BIN_9 +230 0x0000 //RX_FDEQ_BIN_10 +231 0x0000 //RX_FDEQ_BIN_11 +232 0x0000 //RX_FDEQ_BIN_12 +233 0x0000 //RX_FDEQ_BIN_13 +234 0x0000 //RX_FDEQ_BIN_14 +235 0x0000 //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x4000 //RX_FDEQ_RESRV_0 +245 0x0320 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0030 //RX_FDDRC_BAND_MARGIN_1 +248 0x0050 //RX_FDDRC_BAND_MARGIN_2 +249 0x0080 //RX_FDDRC_BAND_MARGIN_3 +250 0x0007 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x5000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x6400 //RX_FDDRC_THRD_3_2 +258 0x6400 //RX_FDDRC_THRD_3_3 +259 0x2000 //RX_FDDRC_SLANT_0_0 +260 0x2000 //RX_FDDRC_SLANT_0_1 +261 0x2000 //RX_FDDRC_SLANT_0_2 +262 0x2000 //RX_FDDRC_SLANT_0_3 +263 0x5333 //RX_FDDRC_SLANT_1_0 +264 0x5333 //RX_FDDRC_SLANT_1_1 +265 0x5333 //RX_FDDRC_SLANT_1_2 +266 0x5333 //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +286 0x0100 //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 +#VOL 5 +163 0x3000 //RX_TDDRC_ALPHA_UP_1 +164 0x3000 //RX_TDDRC_ALPHA_UP_2 +165 0x3000 //RX_TDDRC_ALPHA_UP_3 +166 0x3000 //RX_TDDRC_ALPHA_UP_4 +184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +190 0x7FFF //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +269 0x0000 //RX_TDDRC_THRD_0 +270 0x0000 //RX_TDDRC_THRD_1 +271 0x7FFF //RX_TDDRC_THRD_2 +272 0x7FFF //RX_TDDRC_THRD_3 +273 0x7FFF //RX_TDDRC_SLANT_0 +274 0x7EB8 //RX_TDDRC_SLANT_1 +275 0x3000 //RX_TDDRC_ALPHA_UP_0 +276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x199A //RX_TDDRC_HMNC_GAIN +279 0x0001 //RX_TDDRC_SMT_FLAG +280 0x0CCD //RX_TDDRC_SMT_W +281 0x017F //RX_TDDRC_DRC_GAIN +195 0x0014 //RX_FDEQ_SUBNUM +196 0x4848 //RX_FDEQ_GAIN_0 +197 0x4848 //RX_FDEQ_GAIN_1 +198 0x4848 //RX_FDEQ_GAIN_2 +199 0x4848 //RX_FDEQ_GAIN_3 +200 0x4848 //RX_FDEQ_GAIN_4 +201 0x4848 //RX_FDEQ_GAIN_5 +202 0x4444 //RX_FDEQ_GAIN_6 +203 0x4040 //RX_FDEQ_GAIN_7 +204 0x4040 //RX_FDEQ_GAIN_8 +205 0x4040 //RX_FDEQ_GAIN_9 +206 0x4848 //RX_FDEQ_GAIN_10 +207 0x4848 //RX_FDEQ_GAIN_11 +208 0x4848 //RX_FDEQ_GAIN_12 +209 0x4848 //RX_FDEQ_GAIN_13 +210 0x4848 //RX_FDEQ_GAIN_14 +211 0x4848 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0202 //RX_FDEQ_BIN_0 +221 0x0203 //RX_FDEQ_BIN_1 +222 0x0303 //RX_FDEQ_BIN_2 +223 0x0304 //RX_FDEQ_BIN_3 +224 0x0405 //RX_FDEQ_BIN_4 +225 0x0506 //RX_FDEQ_BIN_5 +226 0x0708 //RX_FDEQ_BIN_6 +227 0x090A //RX_FDEQ_BIN_7 +228 0x0B0C //RX_FDEQ_BIN_8 +229 0x0D0E //RX_FDEQ_BIN_9 +230 0x0000 //RX_FDEQ_BIN_10 +231 0x0000 //RX_FDEQ_BIN_11 +232 0x0000 //RX_FDEQ_BIN_12 +233 0x0000 //RX_FDEQ_BIN_13 +234 0x0000 //RX_FDEQ_BIN_14 +235 0x0000 //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x4000 //RX_FDEQ_RESRV_0 +245 0x0320 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0030 //RX_FDDRC_BAND_MARGIN_1 +248 0x0050 //RX_FDDRC_BAND_MARGIN_2 +249 0x0080 //RX_FDDRC_BAND_MARGIN_3 +250 0x0007 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x5000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x6400 //RX_FDDRC_THRD_3_2 +258 0x6400 //RX_FDDRC_THRD_3_3 +259 0x2000 //RX_FDDRC_SLANT_0_0 +260 0x2000 //RX_FDDRC_SLANT_0_1 +261 0x2000 //RX_FDDRC_SLANT_0_2 +262 0x2000 //RX_FDDRC_SLANT_0_3 +263 0x5333 //RX_FDDRC_SLANT_1_0 +264 0x5333 //RX_FDDRC_SLANT_1_1 +265 0x5333 //RX_FDDRC_SLANT_1_2 +266 0x5333 //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +286 0x0100 //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 +#VOL 6 +163 0x3000 //RX_TDDRC_ALPHA_UP_1 +164 0x3000 //RX_TDDRC_ALPHA_UP_2 +165 0x3000 //RX_TDDRC_ALPHA_UP_3 +166 0x3000 //RX_TDDRC_ALPHA_UP_4 +184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +190 0x7FFF //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +269 0x0000 //RX_TDDRC_THRD_0 +270 0x0000 //RX_TDDRC_THRD_1 +271 0x7FFF //RX_TDDRC_THRD_2 +272 0x7FFF //RX_TDDRC_THRD_3 +273 0x7FFF //RX_TDDRC_SLANT_0 +274 0x7EB8 //RX_TDDRC_SLANT_1 +275 0x3000 //RX_TDDRC_ALPHA_UP_0 +276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x199A //RX_TDDRC_HMNC_GAIN +279 0x0001 //RX_TDDRC_SMT_FLAG +280 0x0CCD //RX_TDDRC_SMT_W +281 0x017F //RX_TDDRC_DRC_GAIN +195 0x0014 //RX_FDEQ_SUBNUM +196 0x4848 //RX_FDEQ_GAIN_0 +197 0x4848 //RX_FDEQ_GAIN_1 +198 0x4848 //RX_FDEQ_GAIN_2 +199 0x4848 //RX_FDEQ_GAIN_3 +200 0x4848 //RX_FDEQ_GAIN_4 +201 0x4848 //RX_FDEQ_GAIN_5 +202 0x4444 //RX_FDEQ_GAIN_6 +203 0x4040 //RX_FDEQ_GAIN_7 +204 0x4040 //RX_FDEQ_GAIN_8 +205 0x4040 //RX_FDEQ_GAIN_9 +206 0x4848 //RX_FDEQ_GAIN_10 +207 0x4848 //RX_FDEQ_GAIN_11 +208 0x4848 //RX_FDEQ_GAIN_12 +209 0x4848 //RX_FDEQ_GAIN_13 +210 0x4848 //RX_FDEQ_GAIN_14 +211 0x4848 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0202 //RX_FDEQ_BIN_0 +221 0x0203 //RX_FDEQ_BIN_1 +222 0x0303 //RX_FDEQ_BIN_2 +223 0x0304 //RX_FDEQ_BIN_3 +224 0x0405 //RX_FDEQ_BIN_4 +225 0x0506 //RX_FDEQ_BIN_5 +226 0x0708 //RX_FDEQ_BIN_6 +227 0x090A //RX_FDEQ_BIN_7 +228 0x0B0C //RX_FDEQ_BIN_8 +229 0x0D0E //RX_FDEQ_BIN_9 +230 0x0000 //RX_FDEQ_BIN_10 +231 0x0000 //RX_FDEQ_BIN_11 +232 0x0000 //RX_FDEQ_BIN_12 +233 0x0000 //RX_FDEQ_BIN_13 +234 0x0000 //RX_FDEQ_BIN_14 +235 0x0000 //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x4000 //RX_FDEQ_RESRV_0 +245 0x0320 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0030 //RX_FDDRC_BAND_MARGIN_1 +248 0x0050 //RX_FDDRC_BAND_MARGIN_2 +249 0x0080 //RX_FDDRC_BAND_MARGIN_3 +250 0x0007 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x5000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x6400 //RX_FDDRC_THRD_3_2 +258 0x6400 //RX_FDDRC_THRD_3_3 +259 0x2000 //RX_FDDRC_SLANT_0_0 +260 0x2000 //RX_FDDRC_SLANT_0_1 +261 0x2000 //RX_FDDRC_SLANT_0_2 +262 0x2000 //RX_FDDRC_SLANT_0_3 +263 0x5333 //RX_FDDRC_SLANT_1_0 +264 0x5333 //RX_FDDRC_SLANT_1_1 +265 0x5333 //RX_FDDRC_SLANT_1_2 +266 0x5333 //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +286 0x0100 //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 #CASE_NAME BLUETOOTH-BTWB-VOICE_GENERIC-WB -#PARAM_TYPE TX+RX -#TOTAL_CUSTOM_STEP 7 +#PARAM_MODE Full +#PARAM_TYPE TX+2RX +#TOTAL_CUSTOM_STEP 7+7 #TX 0 0x0008 //TX_OPERATION_MODE_0 1 0x0008 //TX_OPERATION_MODE_1 @@ -24800,20 +37639,20 @@ 248 0xF400 //TX_THR_SN_EST_6 249 0xF600 //TX_THR_SN_EST_7 250 0x0000 //TX_DELTA_THR_SN_EST_0 -251 0x0000 //TX_DELTA_THR_SN_EST_1 +251 0x0200 //TX_DELTA_THR_SN_EST_1 252 0x0200 //TX_DELTA_THR_SN_EST_2 253 0x0200 //TX_DELTA_THR_SN_EST_3 254 0x0200 //TX_DELTA_THR_SN_EST_4 255 0x0200 //TX_DELTA_THR_SN_EST_5 -256 0x0200 //TX_DELTA_THR_SN_EST_6 +256 0x0000 //TX_DELTA_THR_SN_EST_6 257 0x0200 //TX_DELTA_THR_SN_EST_7 258 0x6000 //TX_LAMBDA_NN_EST_0 -259 0x6000 //TX_LAMBDA_NN_EST_1 +259 0x4000 //TX_LAMBDA_NN_EST_1 260 0x4000 //TX_LAMBDA_NN_EST_2 261 0x4000 //TX_LAMBDA_NN_EST_3 262 0x4000 //TX_LAMBDA_NN_EST_4 263 0x4000 //TX_LAMBDA_NN_EST_5 -264 0x4000 //TX_LAMBDA_NN_EST_6 +264 0x6000 //TX_LAMBDA_NN_EST_6 265 0x4000 //TX_LAMBDA_NN_EST_7 266 0x0400 //TX_N_SN_EST 267 0x001E //TX_INBEAM_T @@ -24831,16 +37670,16 @@ 279 0x1000 //TX_B_POST_FLT_0 280 0x1000 //TX_B_POST_FLT_1 281 0x000F //TX_NS_LVL_CTRL_0 -282 0x000F //TX_NS_LVL_CTRL_1 -283 0x0011 //TX_NS_LVL_CTRL_2 +282 0x0011 //TX_NS_LVL_CTRL_1 +283 0x000F //TX_NS_LVL_CTRL_2 284 0x000F //TX_NS_LVL_CTRL_3 285 0x000F //TX_NS_LVL_CTRL_4 286 0x000F //TX_NS_LVL_CTRL_5 287 0x000F //TX_NS_LVL_CTRL_6 288 0x0011 //TX_NS_LVL_CTRL_7 289 0x000C //TX_MIN_GAIN_S_0 -290 0x000C //TX_MIN_GAIN_S_1 -291 0x000F //TX_MIN_GAIN_S_2 +290 0x000F //TX_MIN_GAIN_S_1 +291 0x000C //TX_MIN_GAIN_S_2 292 0x000C //TX_MIN_GAIN_S_3 293 0x000C //TX_MIN_GAIN_S_4 294 0x000C //TX_MIN_GAIN_S_5 @@ -24864,12 +37703,12 @@ 312 0x7FFF //TX_A_POST_FILT_0 313 0x2000 //TX_A_POST_FILT_1 314 0x4000 //TX_A_POST_FILT_S_0 -315 0x4000 //TX_A_POST_FILT_S_1 +315 0x5000 //TX_A_POST_FILT_S_1 316 0x5000 //TX_A_POST_FILT_S_2 317 0x5000 //TX_A_POST_FILT_S_3 318 0x5000 //TX_A_POST_FILT_S_4 319 0x5000 //TX_A_POST_FILT_S_5 -320 0x5000 //TX_A_POST_FILT_S_6 +320 0x4000 //TX_A_POST_FILT_S_6 321 0x5000 //TX_A_POST_FILT_S_7 322 0x1000 //TX_B_POST_FILT_0 323 0x1000 //TX_B_POST_FILT_1 @@ -24929,10 +37768,10 @@ 377 0x7FFF //TX_NOISE_TH_5_4 378 0x044C //TX_NOISE_TH_6 379 0x0014 //TX_MINENOISE_TH -380 0x4000 //TX_MINENOISE_MIC0_TH_MTS -381 0xFFEE //TX_MINENOISE_MIC0_TH_EXP -382 0x6000 //TX_MINENOISE_MIC0_S_TH_MTS -383 0xFFF3 //TX_MINENOISE_MIC0_S_TH_EXP +380 0x4000 //TX_MORENS_TFMASK_TH +381 0xFFEE //TX_DRC_QUIET_FLOOR +382 0x6000 //TX_RATIODTL_CUT_TH +383 0xFFF3 //TX_DT_CUT_K1 384 0x0666 //TX_OUT_ENER_S_TH_CLEAN 385 0x0666 //TX_OUT_ENER_S_TH_LESSCLEAN 386 0x0333 //TX_OUT_ENER_S_TH_NOISY @@ -24940,15 +37779,15 @@ 388 0x0333 //TX_OUT_ENER_TH_SPEECH 389 0x2000 //TX_SN_NPB_GAIN 390 0x0000 //TX_NN_NPB_GAIN -391 0x0000 //TX_CSX_ALPHA_0 -392 0x0000 //TX_CSX_ALPHA_1 -393 0x0000 //TX_CSX_ALPHA_2 -394 0x0000 //TX_CSX_ALPHA_3 -395 0x0800 //TX_MU_ARSP_EST -396 0x00C8 //TX_P_OUTBEAM_MIN_TH +391 0x0000 //TX_POST_MASK_SUP_HSNE +392 0x0000 //TX_TAIL_DET_TH +393 0x0000 //TX_B_LESSCUT_RTO_WTA +394 0x0000 //TX_MEL_G_R +395 0x0800 //TX_SUPHIGH_TH +396 0x00C8 //TX_MASK_G_R 397 0x0002 //TX_EXTRA_NS_L -398 0x0800 //TX_EXTRA_NS_A -399 0x0005 //TX_VR_NOISE_FLOOR_TH +398 0x0800 //TX_C_POST_FLT_MASK +399 0x0005 //TX_A_POST_FLT_WNS 400 0x0148 //TX_MIN_G_LOW300HZ 401 0x0002 //TX_MAXLEVEL_CNG 402 0x00B4 //TX_STN_NOISE_TH @@ -25063,16 +37902,16 @@ 511 0x6666 //TX_MIC_TO_BFGAIN 512 0x0000 //TX_MICTOBFGAIN0 513 0x0000 //TX_FASTMUE_TH -514 0x0000 //TX_DERVB_LEN_0 -515 0x0000 //TX_DERVB_LEN_1 -516 0x0000 //TX_RHO_DERVB -517 0x0000 //TX_MIC_INDX_DERVB -518 0x0000 //TX_MU_DERVB -519 0x0000 //TX_DR_RESRV_0 -520 0x0000 //TX_DR_RESRV_1 -521 0x0000 //TX_DR_RESRV_2 -522 0x0000 //TX_DR_RESRV_3 -523 0x0000 //TX_DR_RESRV_4 +514 0x0000 //TX_DEREVERB_LF_MU +515 0x0000 //TX_DEREVERB_HF_MU +516 0x0000 //TX_DEREVERB_DELAY +517 0x0000 //TX_DEREVERB_COEF_LEN +518 0x0000 //TX_DEREVERB_DNR +519 0x0000 //TX_DEREVERB_ALPHA +520 0x0000 //TX_DEREVERB_BETA +521 0x0000 //TX_GSC_RTOL_TH +522 0x0000 //TX_GSC_RTOH_TH +523 0x0000 //TX_WIDE2_MEANHTH 524 0x0000 //TX_DR_RESRV_5 525 0x0000 //TX_DR_RESRV_6 526 0x0000 //TX_DR_RESRV_7 @@ -25446,8 +38285,73 @@ 894 0xC000 //TX_FASTNS_SSA_THHFL 895 0xCCCC //TX_FASTNS_SSA_THLFH 896 0xD999 //TX_FASTNS_SSA_THHFH +897 0x0000 //TX_SENDFUNC_REG_MICMUTE +898 0x0000 //TX_SENDFUNC_REG_MICMUTE1 +899 0x0000 //TX_MICMUTE_RATIO_THR +900 0x0000 //TX_MICMUTE_AMP_THR +901 0x0000 //TX_MICMUTE_HPF_IND +902 0x0000 //TX_MICMUTE_LOG_EYR_TH +903 0x0000 //TX_MICMUTE_CVG_TIME +904 0x0000 //TX_MICMUTE_RELEASE_TIME +905 0x0000 //TX_MIC_VOLUME_MIC0MUTE +906 0x0000 //TX_MICMUTE_EPD_OFFSET_0 +907 0x0000 //TX_MICMUTE_FRQ_AEC_L +908 0x0000 //TX_MICMUTE_EAD_THR +909 0x0000 //TX_MICMUTE_LAMBDA_CB_NLE +910 0x0000 //TX_MICMUTE_LAMBDA_RE_EST +911 0x0000 //TX_DTD_THR1_MICMUTE_0 +912 0x0000 //TX_DTD_THR1_MICMUTE_1 +913 0x0000 //TX_DTD_THR1_MICMUTE_2 +914 0x0000 //TX_DTD_THR1_MICMUTE_3 +915 0x0000 //TX_DTD_THR2_MICMUTE_0 +916 0x0000 //TX_MICMUTE_MIN_EQ_RE_EST_0 +917 0x0000 //TX_MICMUTE_MIN_EQ_RE_EST_1 +918 0x0000 //TX_MICMUTE_MIN_EQ_RE_EST_2 +919 0x0000 //TX_MICMUTE_MIN_EQ_RE_EST_3 +920 0x0000 //TX_MICMUTE_MIN_EQ_RE_EST_4 +921 0x0000 //TX_MICMUTE_C_POST_FLT +922 0x0000 //TX_MICMUTE_DT_CUT_K +923 0x0000 //TX_MICMUTE_DT_CUT_THR +924 0x0000 //TX_MICMUTE_DT_CUT_K2 +925 0x0000 //TX_MICMUTE_DT_CUT_THR2 +926 0x0000 //TX_MICMUTE_DT2_HOLD_N +927 0x0000 //TX_MICMUTE_RATIODTH_THCUT +928 0x0000 //TX_MICMUTE_B_POST_FLT_ECHOL +929 0x0000 //TX_MICMUTE_B_POST_FLT_ECHOH +930 0x0000 //TX_MICMUTE_C_POST_FLT_MASK +931 0x0000 //TX_MICMUTE_RATIODTL_CUT_TH +932 0x0000 //TX_MICMUTE_DT_CUT_K1 +933 0x0000 //TX_MICMUTE_N2_SN_EST +934 0x0000 //TX_MICMUTE_THR_SN_EST_0 +935 0x0000 //TX_MICMUTE_MIN_G_CTRL_0 +936 0x0000 //TX_MICMUTE_A_POST_FILT_S_0 +937 0x0000 //TX_MICMUTE_B_POST_FILT_0 +938 0x0000 //TX_MIC1RUB_AMP_THR +939 0x0000 //TX_MIC1MUTE_RATIO_THR +940 0x0000 //TX_MIC1MUTE_AMP_THR +941 0x0000 //TX_MIC1MUTE_CVG_TIME +942 0x0000 //TX_MIC1MUTE_RELEASE_TIME +943 0x0000 //TX_AMS_RESRV_01 +944 0x0000 //TX_AMS_RESRV_02 +945 0x0000 //TX_AMS_RESRV_03 +946 0x0000 //TX_AMS_RESRV_04 +947 0x0000 //TX_AMS_RESRV_05 +948 0x0000 //TX_AMS_RESRV_06 +949 0x0000 //TX_AMS_RESRV_07 +950 0x0000 //TX_AMS_RESRV_08 +951 0x0000 //TX_AMS_RESRV_09 +952 0x0000 //TX_AMS_RESRV_10 +953 0x0000 //TX_AMS_RESRV_11 +954 0x0000 //TX_AMS_RESRV_12 +955 0x0000 //TX_AMS_RESRV_13 +956 0x0000 //TX_AMS_RESRV_14 +957 0x0000 //TX_AMS_RESRV_15 +958 0x0000 //TX_AMS_RESRV_16 +959 0x0000 //TX_AMS_RESRV_17 +960 0x0000 //TX_AMS_RESRV_18 +961 0x0000 //TX_AMS_RESRV_19 #RX -0 0x006C //RX_RECVFUNC_MODE_0 +0 0x206C //RX_RECVFUNC_MODE_0 1 0x0000 //RX_RECVFUNC_MODE_1 2 0x0001 //RX_SAMPLINGFREQ_SIG 3 0x0001 //RX_SAMPLINGFREQ_PROC @@ -26297,10 +39201,862 @@ 110 0x0000 //RX_FDDRC_RESRV_0 129 0x0100 //RX_SPK_VOL 130 0x0000 //RX_VOL_RESRV_0 +#RX 2 +157 0x206C //RX_RECVFUNC_MODE_0 +158 0x0000 //RX_RECVFUNC_MODE_1 +159 0x0001 //RX_SAMPLINGFREQ_SIG +160 0x0001 //RX_SAMPLINGFREQ_PROC +161 0x000A //RX_FRAME_SZ +162 0x0000 //RX_DELAY_OPT +163 0x1000 //RX_TDDRC_ALPHA_UP_1 +164 0x1000 //RX_TDDRC_ALPHA_UP_2 +165 0x1000 //RX_TDDRC_ALPHA_UP_3 +166 0x1000 //RX_TDDRC_ALPHA_UP_4 +167 0x0800 //RX_PGA +168 0x7FFF //RX_A_HP +169 0x4000 //RX_B_PE +170 0x3800 //RX_THR_PITCH_DET_0 +171 0x3000 //RX_THR_PITCH_DET_1 +172 0x2800 //RX_THR_PITCH_DET_2 +173 0x0008 //RX_PITCH_BFR_LEN +174 0x0003 //RX_SBD_PITCH_DET +175 0x0100 //RX_PP_RESRV_0 +176 0x0020 //RX_PP_RESRV_1 +177 0x0600 //RX_N_SN_EST +178 0x000C //RX_N2_SN_EST +179 0x0010 //RX_NS_LVL_CTRL +180 0xF800 //RX_THR_SN_EST +181 0x7CCD //RX_LAMBDA_PFILT +182 0x000A //RX_FENS_RESRV_0 +183 0x0190 //RX_FENS_RESRV_1 +184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +187 0x0002 //RX_EXTRA_NS_L +188 0x0800 //RX_EXTRA_NS_A +189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +190 0x7FFF //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +192 0x199A //RX_A_POST_FLT +193 0x0000 //RX_LMT_THRD +194 0x4000 //RX_LMT_ALPHA +195 0x001C //RX_FDEQ_SUBNUM +196 0x4848 //RX_FDEQ_GAIN_0 +197 0x4848 //RX_FDEQ_GAIN_1 +198 0x4848 //RX_FDEQ_GAIN_2 +199 0x4848 //RX_FDEQ_GAIN_3 +200 0x4848 //RX_FDEQ_GAIN_4 +201 0x4848 //RX_FDEQ_GAIN_5 +202 0x4848 //RX_FDEQ_GAIN_6 +203 0x4848 //RX_FDEQ_GAIN_7 +204 0x4848 //RX_FDEQ_GAIN_8 +205 0x3C3C //RX_FDEQ_GAIN_9 +206 0x3C3C //RX_FDEQ_GAIN_10 +207 0x3838 //RX_FDEQ_GAIN_11 +208 0x3838 //RX_FDEQ_GAIN_12 +209 0x3030 //RX_FDEQ_GAIN_13 +210 0x4848 //RX_FDEQ_GAIN_14 +211 0x4848 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0202 //RX_FDEQ_BIN_0 +221 0x0203 //RX_FDEQ_BIN_1 +222 0x0303 //RX_FDEQ_BIN_2 +223 0x0304 //RX_FDEQ_BIN_3 +224 0x0405 //RX_FDEQ_BIN_4 +225 0x0506 //RX_FDEQ_BIN_5 +226 0x0708 //RX_FDEQ_BIN_6 +227 0x090A //RX_FDEQ_BIN_7 +228 0x0B0C //RX_FDEQ_BIN_8 +229 0x0D0E //RX_FDEQ_BIN_9 +230 0x0E0F //RX_FDEQ_BIN_10 +231 0x0F10 //RX_FDEQ_BIN_11 +232 0x1011 //RX_FDEQ_BIN_12 +233 0x1112 //RX_FDEQ_BIN_13 +234 0x0000 //RX_FDEQ_BIN_14 +235 0x0000 //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x4000 //RX_FDEQ_RESRV_0 +245 0x0320 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0030 //RX_FDDRC_BAND_MARGIN_1 +248 0x0050 //RX_FDDRC_BAND_MARGIN_2 +249 0x0080 //RX_FDDRC_BAND_MARGIN_3 +250 0x0007 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x5000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x6400 //RX_FDDRC_THRD_3_2 +258 0x6400 //RX_FDDRC_THRD_3_3 +259 0x2000 //RX_FDDRC_SLANT_0_0 +260 0x2000 //RX_FDDRC_SLANT_0_1 +261 0x2000 //RX_FDDRC_SLANT_0_2 +262 0x2000 //RX_FDDRC_SLANT_0_3 +263 0x5333 //RX_FDDRC_SLANT_1_0 +264 0x5333 //RX_FDDRC_SLANT_1_1 +265 0x5333 //RX_FDDRC_SLANT_1_2 +266 0x5333 //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +268 0x0000 //RX_FILTINDX +269 0x0000 //RX_TDDRC_THRD_0 +270 0x0000 //RX_TDDRC_THRD_1 +271 0x7FFF //RX_TDDRC_THRD_2 +272 0x7FFF //RX_TDDRC_THRD_3 +273 0x7E70 //RX_TDDRC_SLANT_0 +274 0x7FFF //RX_TDDRC_SLANT_1 +275 0x1000 //RX_TDDRC_ALPHA_UP_0 +276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x199A //RX_TDDRC_HMNC_GAIN +279 0x0001 //RX_TDDRC_SMT_FLAG +280 0x0CCD //RX_TDDRC_SMT_W +281 0x0155 //RX_TDDRC_DRC_GAIN +282 0x7C00 //RX_LAMBDA_PKA_FP +283 0x2000 //RX_TPKA_FP +284 0x2000 //RX_MIN_G_FP +285 0x0080 //RX_MAX_G_FP +286 0x0100 //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 +288 0x0000 //RX_MAXLEVEL_CNG +289 0x3000 //RX_BWE_UV_TH +290 0x3000 //RX_BWE_UV_TH2 +291 0x1800 //RX_BWE_UV_TH3 +292 0x1000 //RX_BWE_V_TH +293 0x04CD //RX_BWE_GAIN1_V_TH1 +294 0x0F33 //RX_BWE_GAIN1_V_TH2 +295 0x7333 //RX_BWE_UV_EQ +296 0x199A //RX_BWE_V_EQ +297 0x7333 //RX_BWE_TONE_TH +298 0x0004 //RX_BWE_UV_HOLD_T +299 0x6CCD //RX_BWE_GAIN2_ALPHA +300 0x799A //RX_BWE_GAIN3_ALPHA +301 0x001E //RX_BWE_CUTOFF +302 0x3000 //RX_BWE_GAINFILL +303 0x3200 //RX_BWE_MAXTH_TONE +304 0x2000 //RX_BWE_EQ_0 +305 0x2000 //RX_BWE_EQ_1 +306 0x2000 //RX_BWE_EQ_2 +307 0x2000 //RX_BWE_EQ_3 +308 0x2000 //RX_BWE_EQ_4 +309 0x2000 //RX_BWE_EQ_5 +310 0x2000 //RX_BWE_EQ_6 +311 0x0000 //RX_BWE_RESRV_0 +312 0x0000 //RX_BWE_RESRV_1 +313 0x0000 //RX_BWE_RESRV_2 +#VOL 0 +163 0x1000 //RX_TDDRC_ALPHA_UP_1 +164 0x1000 //RX_TDDRC_ALPHA_UP_2 +165 0x1000 //RX_TDDRC_ALPHA_UP_3 +166 0x1000 //RX_TDDRC_ALPHA_UP_4 +184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +190 0x7FFF //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +269 0x0000 //RX_TDDRC_THRD_0 +270 0x0000 //RX_TDDRC_THRD_1 +271 0x7FFF //RX_TDDRC_THRD_2 +272 0x7FFF //RX_TDDRC_THRD_3 +273 0x7E70 //RX_TDDRC_SLANT_0 +274 0x7FFF //RX_TDDRC_SLANT_1 +275 0x1000 //RX_TDDRC_ALPHA_UP_0 +276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x199A //RX_TDDRC_HMNC_GAIN +279 0x0001 //RX_TDDRC_SMT_FLAG +280 0x0CCD //RX_TDDRC_SMT_W +281 0x0155 //RX_TDDRC_DRC_GAIN +195 0x001C //RX_FDEQ_SUBNUM +196 0x4848 //RX_FDEQ_GAIN_0 +197 0x4848 //RX_FDEQ_GAIN_1 +198 0x4848 //RX_FDEQ_GAIN_2 +199 0x4848 //RX_FDEQ_GAIN_3 +200 0x4848 //RX_FDEQ_GAIN_4 +201 0x4848 //RX_FDEQ_GAIN_5 +202 0x4848 //RX_FDEQ_GAIN_6 +203 0x4848 //RX_FDEQ_GAIN_7 +204 0x4848 //RX_FDEQ_GAIN_8 +205 0x3C3C //RX_FDEQ_GAIN_9 +206 0x3C3C //RX_FDEQ_GAIN_10 +207 0x3838 //RX_FDEQ_GAIN_11 +208 0x3838 //RX_FDEQ_GAIN_12 +209 0x3030 //RX_FDEQ_GAIN_13 +210 0x4848 //RX_FDEQ_GAIN_14 +211 0x4848 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0202 //RX_FDEQ_BIN_0 +221 0x0203 //RX_FDEQ_BIN_1 +222 0x0303 //RX_FDEQ_BIN_2 +223 0x0304 //RX_FDEQ_BIN_3 +224 0x0405 //RX_FDEQ_BIN_4 +225 0x0506 //RX_FDEQ_BIN_5 +226 0x0708 //RX_FDEQ_BIN_6 +227 0x090A //RX_FDEQ_BIN_7 +228 0x0B0C //RX_FDEQ_BIN_8 +229 0x0D0E //RX_FDEQ_BIN_9 +230 0x0E0F //RX_FDEQ_BIN_10 +231 0x0F10 //RX_FDEQ_BIN_11 +232 0x1011 //RX_FDEQ_BIN_12 +233 0x1112 //RX_FDEQ_BIN_13 +234 0x0000 //RX_FDEQ_BIN_14 +235 0x0000 //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x4000 //RX_FDEQ_RESRV_0 +245 0x0320 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0030 //RX_FDDRC_BAND_MARGIN_1 +248 0x0050 //RX_FDDRC_BAND_MARGIN_2 +249 0x0080 //RX_FDDRC_BAND_MARGIN_3 +250 0x0007 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x5000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x6400 //RX_FDDRC_THRD_3_2 +258 0x6400 //RX_FDDRC_THRD_3_3 +259 0x2000 //RX_FDDRC_SLANT_0_0 +260 0x2000 //RX_FDDRC_SLANT_0_1 +261 0x2000 //RX_FDDRC_SLANT_0_2 +262 0x2000 //RX_FDDRC_SLANT_0_3 +263 0x5333 //RX_FDDRC_SLANT_1_0 +264 0x5333 //RX_FDDRC_SLANT_1_1 +265 0x5333 //RX_FDDRC_SLANT_1_2 +266 0x5333 //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +286 0x0100 //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 +#VOL 1 +163 0x1000 //RX_TDDRC_ALPHA_UP_1 +164 0x1000 //RX_TDDRC_ALPHA_UP_2 +165 0x1000 //RX_TDDRC_ALPHA_UP_3 +166 0x1000 //RX_TDDRC_ALPHA_UP_4 +184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +190 0x7FFF //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +269 0x0000 //RX_TDDRC_THRD_0 +270 0x0000 //RX_TDDRC_THRD_1 +271 0x7FFF //RX_TDDRC_THRD_2 +272 0x7FFF //RX_TDDRC_THRD_3 +273 0x7E70 //RX_TDDRC_SLANT_0 +274 0x7FFF //RX_TDDRC_SLANT_1 +275 0x1000 //RX_TDDRC_ALPHA_UP_0 +276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x199A //RX_TDDRC_HMNC_GAIN +279 0x0001 //RX_TDDRC_SMT_FLAG +280 0x0CCD //RX_TDDRC_SMT_W +281 0x0155 //RX_TDDRC_DRC_GAIN +195 0x001C //RX_FDEQ_SUBNUM +196 0x4848 //RX_FDEQ_GAIN_0 +197 0x4848 //RX_FDEQ_GAIN_1 +198 0x4848 //RX_FDEQ_GAIN_2 +199 0x4848 //RX_FDEQ_GAIN_3 +200 0x4848 //RX_FDEQ_GAIN_4 +201 0x4848 //RX_FDEQ_GAIN_5 +202 0x4848 //RX_FDEQ_GAIN_6 +203 0x4848 //RX_FDEQ_GAIN_7 +204 0x4848 //RX_FDEQ_GAIN_8 +205 0x3C3C //RX_FDEQ_GAIN_9 +206 0x3C3C //RX_FDEQ_GAIN_10 +207 0x3838 //RX_FDEQ_GAIN_11 +208 0x3838 //RX_FDEQ_GAIN_12 +209 0x3030 //RX_FDEQ_GAIN_13 +210 0x4848 //RX_FDEQ_GAIN_14 +211 0x4848 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0202 //RX_FDEQ_BIN_0 +221 0x0203 //RX_FDEQ_BIN_1 +222 0x0303 //RX_FDEQ_BIN_2 +223 0x0304 //RX_FDEQ_BIN_3 +224 0x0405 //RX_FDEQ_BIN_4 +225 0x0506 //RX_FDEQ_BIN_5 +226 0x0708 //RX_FDEQ_BIN_6 +227 0x090A //RX_FDEQ_BIN_7 +228 0x0B0C //RX_FDEQ_BIN_8 +229 0x0D0E //RX_FDEQ_BIN_9 +230 0x0E0F //RX_FDEQ_BIN_10 +231 0x0F10 //RX_FDEQ_BIN_11 +232 0x1011 //RX_FDEQ_BIN_12 +233 0x1112 //RX_FDEQ_BIN_13 +234 0x0000 //RX_FDEQ_BIN_14 +235 0x0000 //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x4000 //RX_FDEQ_RESRV_0 +245 0x0320 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0030 //RX_FDDRC_BAND_MARGIN_1 +248 0x0050 //RX_FDDRC_BAND_MARGIN_2 +249 0x0080 //RX_FDDRC_BAND_MARGIN_3 +250 0x0007 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x5000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x6400 //RX_FDDRC_THRD_3_2 +258 0x6400 //RX_FDDRC_THRD_3_3 +259 0x2000 //RX_FDDRC_SLANT_0_0 +260 0x2000 //RX_FDDRC_SLANT_0_1 +261 0x2000 //RX_FDDRC_SLANT_0_2 +262 0x2000 //RX_FDDRC_SLANT_0_3 +263 0x5333 //RX_FDDRC_SLANT_1_0 +264 0x5333 //RX_FDDRC_SLANT_1_1 +265 0x5333 //RX_FDDRC_SLANT_1_2 +266 0x5333 //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +286 0x0100 //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 +#VOL 2 +163 0x1000 //RX_TDDRC_ALPHA_UP_1 +164 0x1000 //RX_TDDRC_ALPHA_UP_2 +165 0x1000 //RX_TDDRC_ALPHA_UP_3 +166 0x1000 //RX_TDDRC_ALPHA_UP_4 +184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +190 0x7FFF //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +269 0x0000 //RX_TDDRC_THRD_0 +270 0x0000 //RX_TDDRC_THRD_1 +271 0x7FFF //RX_TDDRC_THRD_2 +272 0x7FFF //RX_TDDRC_THRD_3 +273 0x7E70 //RX_TDDRC_SLANT_0 +274 0x7FFF //RX_TDDRC_SLANT_1 +275 0x1000 //RX_TDDRC_ALPHA_UP_0 +276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x199A //RX_TDDRC_HMNC_GAIN +279 0x0001 //RX_TDDRC_SMT_FLAG +280 0x0CCD //RX_TDDRC_SMT_W +281 0x0155 //RX_TDDRC_DRC_GAIN +195 0x001C //RX_FDEQ_SUBNUM +196 0x4848 //RX_FDEQ_GAIN_0 +197 0x4848 //RX_FDEQ_GAIN_1 +198 0x4848 //RX_FDEQ_GAIN_2 +199 0x4848 //RX_FDEQ_GAIN_3 +200 0x4848 //RX_FDEQ_GAIN_4 +201 0x4848 //RX_FDEQ_GAIN_5 +202 0x4848 //RX_FDEQ_GAIN_6 +203 0x4848 //RX_FDEQ_GAIN_7 +204 0x4848 //RX_FDEQ_GAIN_8 +205 0x3C3C //RX_FDEQ_GAIN_9 +206 0x3C3C //RX_FDEQ_GAIN_10 +207 0x3838 //RX_FDEQ_GAIN_11 +208 0x3838 //RX_FDEQ_GAIN_12 +209 0x3030 //RX_FDEQ_GAIN_13 +210 0x4848 //RX_FDEQ_GAIN_14 +211 0x4848 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0202 //RX_FDEQ_BIN_0 +221 0x0203 //RX_FDEQ_BIN_1 +222 0x0303 //RX_FDEQ_BIN_2 +223 0x0304 //RX_FDEQ_BIN_3 +224 0x0405 //RX_FDEQ_BIN_4 +225 0x0506 //RX_FDEQ_BIN_5 +226 0x0708 //RX_FDEQ_BIN_6 +227 0x090A //RX_FDEQ_BIN_7 +228 0x0B0C //RX_FDEQ_BIN_8 +229 0x0D0E //RX_FDEQ_BIN_9 +230 0x0E0F //RX_FDEQ_BIN_10 +231 0x0F10 //RX_FDEQ_BIN_11 +232 0x1011 //RX_FDEQ_BIN_12 +233 0x1112 //RX_FDEQ_BIN_13 +234 0x0000 //RX_FDEQ_BIN_14 +235 0x0000 //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x4000 //RX_FDEQ_RESRV_0 +245 0x0320 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0030 //RX_FDDRC_BAND_MARGIN_1 +248 0x0050 //RX_FDDRC_BAND_MARGIN_2 +249 0x0080 //RX_FDDRC_BAND_MARGIN_3 +250 0x0007 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x5000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x6400 //RX_FDDRC_THRD_3_2 +258 0x6400 //RX_FDDRC_THRD_3_3 +259 0x2000 //RX_FDDRC_SLANT_0_0 +260 0x2000 //RX_FDDRC_SLANT_0_1 +261 0x2000 //RX_FDDRC_SLANT_0_2 +262 0x2000 //RX_FDDRC_SLANT_0_3 +263 0x5333 //RX_FDDRC_SLANT_1_0 +264 0x5333 //RX_FDDRC_SLANT_1_1 +265 0x5333 //RX_FDDRC_SLANT_1_2 +266 0x5333 //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +286 0x0100 //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 +#VOL 3 +163 0x1000 //RX_TDDRC_ALPHA_UP_1 +164 0x1000 //RX_TDDRC_ALPHA_UP_2 +165 0x1000 //RX_TDDRC_ALPHA_UP_3 +166 0x1000 //RX_TDDRC_ALPHA_UP_4 +184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +190 0x7FFF //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +269 0x0000 //RX_TDDRC_THRD_0 +270 0x0000 //RX_TDDRC_THRD_1 +271 0x7FFF //RX_TDDRC_THRD_2 +272 0x7FFF //RX_TDDRC_THRD_3 +273 0x7E70 //RX_TDDRC_SLANT_0 +274 0x7FFF //RX_TDDRC_SLANT_1 +275 0x1000 //RX_TDDRC_ALPHA_UP_0 +276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x199A //RX_TDDRC_HMNC_GAIN +279 0x0001 //RX_TDDRC_SMT_FLAG +280 0x0CCD //RX_TDDRC_SMT_W +281 0x0155 //RX_TDDRC_DRC_GAIN +195 0x001C //RX_FDEQ_SUBNUM +196 0x4848 //RX_FDEQ_GAIN_0 +197 0x4848 //RX_FDEQ_GAIN_1 +198 0x4848 //RX_FDEQ_GAIN_2 +199 0x4848 //RX_FDEQ_GAIN_3 +200 0x4848 //RX_FDEQ_GAIN_4 +201 0x4848 //RX_FDEQ_GAIN_5 +202 0x4848 //RX_FDEQ_GAIN_6 +203 0x4848 //RX_FDEQ_GAIN_7 +204 0x4848 //RX_FDEQ_GAIN_8 +205 0x3C3C //RX_FDEQ_GAIN_9 +206 0x3C3C //RX_FDEQ_GAIN_10 +207 0x3838 //RX_FDEQ_GAIN_11 +208 0x3838 //RX_FDEQ_GAIN_12 +209 0x3030 //RX_FDEQ_GAIN_13 +210 0x4848 //RX_FDEQ_GAIN_14 +211 0x4848 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0202 //RX_FDEQ_BIN_0 +221 0x0203 //RX_FDEQ_BIN_1 +222 0x0303 //RX_FDEQ_BIN_2 +223 0x0304 //RX_FDEQ_BIN_3 +224 0x0405 //RX_FDEQ_BIN_4 +225 0x0506 //RX_FDEQ_BIN_5 +226 0x0708 //RX_FDEQ_BIN_6 +227 0x090A //RX_FDEQ_BIN_7 +228 0x0B0C //RX_FDEQ_BIN_8 +229 0x0D0E //RX_FDEQ_BIN_9 +230 0x0E0F //RX_FDEQ_BIN_10 +231 0x0F10 //RX_FDEQ_BIN_11 +232 0x1011 //RX_FDEQ_BIN_12 +233 0x1112 //RX_FDEQ_BIN_13 +234 0x0000 //RX_FDEQ_BIN_14 +235 0x0000 //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x4000 //RX_FDEQ_RESRV_0 +245 0x0320 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0030 //RX_FDDRC_BAND_MARGIN_1 +248 0x0050 //RX_FDDRC_BAND_MARGIN_2 +249 0x0080 //RX_FDDRC_BAND_MARGIN_3 +250 0x0007 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x5000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x6400 //RX_FDDRC_THRD_3_2 +258 0x6400 //RX_FDDRC_THRD_3_3 +259 0x2000 //RX_FDDRC_SLANT_0_0 +260 0x2000 //RX_FDDRC_SLANT_0_1 +261 0x2000 //RX_FDDRC_SLANT_0_2 +262 0x2000 //RX_FDDRC_SLANT_0_3 +263 0x5333 //RX_FDDRC_SLANT_1_0 +264 0x5333 //RX_FDDRC_SLANT_1_1 +265 0x5333 //RX_FDDRC_SLANT_1_2 +266 0x5333 //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +286 0x0100 //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 +#VOL 4 +163 0x1000 //RX_TDDRC_ALPHA_UP_1 +164 0x1000 //RX_TDDRC_ALPHA_UP_2 +165 0x1000 //RX_TDDRC_ALPHA_UP_3 +166 0x1000 //RX_TDDRC_ALPHA_UP_4 +184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +190 0x7FFF //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +269 0x0000 //RX_TDDRC_THRD_0 +270 0x0000 //RX_TDDRC_THRD_1 +271 0x7FFF //RX_TDDRC_THRD_2 +272 0x7FFF //RX_TDDRC_THRD_3 +273 0x7E70 //RX_TDDRC_SLANT_0 +274 0x7FFF //RX_TDDRC_SLANT_1 +275 0x1000 //RX_TDDRC_ALPHA_UP_0 +276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x199A //RX_TDDRC_HMNC_GAIN +279 0x0001 //RX_TDDRC_SMT_FLAG +280 0x0CCD //RX_TDDRC_SMT_W +281 0x0155 //RX_TDDRC_DRC_GAIN +195 0x001C //RX_FDEQ_SUBNUM +196 0x4848 //RX_FDEQ_GAIN_0 +197 0x4848 //RX_FDEQ_GAIN_1 +198 0x4848 //RX_FDEQ_GAIN_2 +199 0x4848 //RX_FDEQ_GAIN_3 +200 0x4848 //RX_FDEQ_GAIN_4 +201 0x4848 //RX_FDEQ_GAIN_5 +202 0x4848 //RX_FDEQ_GAIN_6 +203 0x4848 //RX_FDEQ_GAIN_7 +204 0x4848 //RX_FDEQ_GAIN_8 +205 0x3C3C //RX_FDEQ_GAIN_9 +206 0x3C3C //RX_FDEQ_GAIN_10 +207 0x3838 //RX_FDEQ_GAIN_11 +208 0x3838 //RX_FDEQ_GAIN_12 +209 0x3030 //RX_FDEQ_GAIN_13 +210 0x4848 //RX_FDEQ_GAIN_14 +211 0x4848 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0202 //RX_FDEQ_BIN_0 +221 0x0203 //RX_FDEQ_BIN_1 +222 0x0303 //RX_FDEQ_BIN_2 +223 0x0304 //RX_FDEQ_BIN_3 +224 0x0405 //RX_FDEQ_BIN_4 +225 0x0506 //RX_FDEQ_BIN_5 +226 0x0708 //RX_FDEQ_BIN_6 +227 0x090A //RX_FDEQ_BIN_7 +228 0x0B0C //RX_FDEQ_BIN_8 +229 0x0D0E //RX_FDEQ_BIN_9 +230 0x0E0F //RX_FDEQ_BIN_10 +231 0x0F10 //RX_FDEQ_BIN_11 +232 0x1011 //RX_FDEQ_BIN_12 +233 0x1112 //RX_FDEQ_BIN_13 +234 0x0000 //RX_FDEQ_BIN_14 +235 0x0000 //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x4000 //RX_FDEQ_RESRV_0 +245 0x0320 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0030 //RX_FDDRC_BAND_MARGIN_1 +248 0x0050 //RX_FDDRC_BAND_MARGIN_2 +249 0x0080 //RX_FDDRC_BAND_MARGIN_3 +250 0x0007 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x5000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x6400 //RX_FDDRC_THRD_3_2 +258 0x6400 //RX_FDDRC_THRD_3_3 +259 0x2000 //RX_FDDRC_SLANT_0_0 +260 0x2000 //RX_FDDRC_SLANT_0_1 +261 0x2000 //RX_FDDRC_SLANT_0_2 +262 0x2000 //RX_FDDRC_SLANT_0_3 +263 0x5333 //RX_FDDRC_SLANT_1_0 +264 0x5333 //RX_FDDRC_SLANT_1_1 +265 0x5333 //RX_FDDRC_SLANT_1_2 +266 0x5333 //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +286 0x0100 //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 +#VOL 5 +163 0x1000 //RX_TDDRC_ALPHA_UP_1 +164 0x1000 //RX_TDDRC_ALPHA_UP_2 +165 0x1000 //RX_TDDRC_ALPHA_UP_3 +166 0x1000 //RX_TDDRC_ALPHA_UP_4 +184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +190 0x7FFF //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +269 0x0000 //RX_TDDRC_THRD_0 +270 0x0000 //RX_TDDRC_THRD_1 +271 0x7FFF //RX_TDDRC_THRD_2 +272 0x7FFF //RX_TDDRC_THRD_3 +273 0x7E70 //RX_TDDRC_SLANT_0 +274 0x7FFF //RX_TDDRC_SLANT_1 +275 0x1000 //RX_TDDRC_ALPHA_UP_0 +276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x199A //RX_TDDRC_HMNC_GAIN +279 0x0001 //RX_TDDRC_SMT_FLAG +280 0x0CCD //RX_TDDRC_SMT_W +281 0x0155 //RX_TDDRC_DRC_GAIN +195 0x001C //RX_FDEQ_SUBNUM +196 0x4848 //RX_FDEQ_GAIN_0 +197 0x4848 //RX_FDEQ_GAIN_1 +198 0x4848 //RX_FDEQ_GAIN_2 +199 0x4848 //RX_FDEQ_GAIN_3 +200 0x4848 //RX_FDEQ_GAIN_4 +201 0x4848 //RX_FDEQ_GAIN_5 +202 0x4848 //RX_FDEQ_GAIN_6 +203 0x4848 //RX_FDEQ_GAIN_7 +204 0x4848 //RX_FDEQ_GAIN_8 +205 0x3C3C //RX_FDEQ_GAIN_9 +206 0x3C3C //RX_FDEQ_GAIN_10 +207 0x3838 //RX_FDEQ_GAIN_11 +208 0x3838 //RX_FDEQ_GAIN_12 +209 0x3030 //RX_FDEQ_GAIN_13 +210 0x4848 //RX_FDEQ_GAIN_14 +211 0x4848 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0202 //RX_FDEQ_BIN_0 +221 0x0203 //RX_FDEQ_BIN_1 +222 0x0303 //RX_FDEQ_BIN_2 +223 0x0304 //RX_FDEQ_BIN_3 +224 0x0405 //RX_FDEQ_BIN_4 +225 0x0506 //RX_FDEQ_BIN_5 +226 0x0708 //RX_FDEQ_BIN_6 +227 0x090A //RX_FDEQ_BIN_7 +228 0x0B0C //RX_FDEQ_BIN_8 +229 0x0D0E //RX_FDEQ_BIN_9 +230 0x0E0F //RX_FDEQ_BIN_10 +231 0x0F10 //RX_FDEQ_BIN_11 +232 0x1011 //RX_FDEQ_BIN_12 +233 0x1112 //RX_FDEQ_BIN_13 +234 0x0000 //RX_FDEQ_BIN_14 +235 0x0000 //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x4000 //RX_FDEQ_RESRV_0 +245 0x0320 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0030 //RX_FDDRC_BAND_MARGIN_1 +248 0x0050 //RX_FDDRC_BAND_MARGIN_2 +249 0x0080 //RX_FDDRC_BAND_MARGIN_3 +250 0x0007 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x5000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x6400 //RX_FDDRC_THRD_3_2 +258 0x6400 //RX_FDDRC_THRD_3_3 +259 0x2000 //RX_FDDRC_SLANT_0_0 +260 0x2000 //RX_FDDRC_SLANT_0_1 +261 0x2000 //RX_FDDRC_SLANT_0_2 +262 0x2000 //RX_FDDRC_SLANT_0_3 +263 0x5333 //RX_FDDRC_SLANT_1_0 +264 0x5333 //RX_FDDRC_SLANT_1_1 +265 0x5333 //RX_FDDRC_SLANT_1_2 +266 0x5333 //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +286 0x0100 //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 +#VOL 6 +163 0x1000 //RX_TDDRC_ALPHA_UP_1 +164 0x1000 //RX_TDDRC_ALPHA_UP_2 +165 0x1000 //RX_TDDRC_ALPHA_UP_3 +166 0x1000 //RX_TDDRC_ALPHA_UP_4 +184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +190 0x7FFF //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +269 0x0000 //RX_TDDRC_THRD_0 +270 0x0000 //RX_TDDRC_THRD_1 +271 0x7FFF //RX_TDDRC_THRD_2 +272 0x7FFF //RX_TDDRC_THRD_3 +273 0x7E70 //RX_TDDRC_SLANT_0 +274 0x7FFF //RX_TDDRC_SLANT_1 +275 0x1000 //RX_TDDRC_ALPHA_UP_0 +276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x199A //RX_TDDRC_HMNC_GAIN +279 0x0001 //RX_TDDRC_SMT_FLAG +280 0x0CCD //RX_TDDRC_SMT_W +281 0x0155 //RX_TDDRC_DRC_GAIN +195 0x001C //RX_FDEQ_SUBNUM +196 0x4848 //RX_FDEQ_GAIN_0 +197 0x4848 //RX_FDEQ_GAIN_1 +198 0x4848 //RX_FDEQ_GAIN_2 +199 0x4848 //RX_FDEQ_GAIN_3 +200 0x4848 //RX_FDEQ_GAIN_4 +201 0x4848 //RX_FDEQ_GAIN_5 +202 0x4848 //RX_FDEQ_GAIN_6 +203 0x4848 //RX_FDEQ_GAIN_7 +204 0x4848 //RX_FDEQ_GAIN_8 +205 0x3C3C //RX_FDEQ_GAIN_9 +206 0x3C3C //RX_FDEQ_GAIN_10 +207 0x3838 //RX_FDEQ_GAIN_11 +208 0x3838 //RX_FDEQ_GAIN_12 +209 0x3030 //RX_FDEQ_GAIN_13 +210 0x4848 //RX_FDEQ_GAIN_14 +211 0x4848 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0202 //RX_FDEQ_BIN_0 +221 0x0203 //RX_FDEQ_BIN_1 +222 0x0303 //RX_FDEQ_BIN_2 +223 0x0304 //RX_FDEQ_BIN_3 +224 0x0405 //RX_FDEQ_BIN_4 +225 0x0506 //RX_FDEQ_BIN_5 +226 0x0708 //RX_FDEQ_BIN_6 +227 0x090A //RX_FDEQ_BIN_7 +228 0x0B0C //RX_FDEQ_BIN_8 +229 0x0D0E //RX_FDEQ_BIN_9 +230 0x0E0F //RX_FDEQ_BIN_10 +231 0x0F10 //RX_FDEQ_BIN_11 +232 0x1011 //RX_FDEQ_BIN_12 +233 0x1112 //RX_FDEQ_BIN_13 +234 0x0000 //RX_FDEQ_BIN_14 +235 0x0000 //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x4000 //RX_FDEQ_RESRV_0 +245 0x0320 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0030 //RX_FDDRC_BAND_MARGIN_1 +248 0x0050 //RX_FDDRC_BAND_MARGIN_2 +249 0x0080 //RX_FDDRC_BAND_MARGIN_3 +250 0x0007 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x5000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x6400 //RX_FDDRC_THRD_3_2 +258 0x6400 //RX_FDDRC_THRD_3_3 +259 0x2000 //RX_FDDRC_SLANT_0_0 +260 0x2000 //RX_FDDRC_SLANT_0_1 +261 0x2000 //RX_FDDRC_SLANT_0_2 +262 0x2000 //RX_FDDRC_SLANT_0_3 +263 0x5333 //RX_FDDRC_SLANT_1_0 +264 0x5333 //RX_FDDRC_SLANT_1_1 +265 0x5333 //RX_FDDRC_SLANT_1_2 +266 0x5333 //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +286 0x0100 //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 #CASE_NAME BLUETOOTH-BTWB-VOICE_GENERIC-SWB -#PARAM_TYPE TX+RX -#TOTAL_CUSTOM_STEP 7 +#PARAM_MODE Full +#PARAM_TYPE TX+2RX +#TOTAL_CUSTOM_STEP 7+7 #TX 0 0x0001 //TX_OPERATION_MODE_0 1 0x0001 //TX_OPERATION_MODE_1 @@ -26553,20 +40309,20 @@ 248 0xF400 //TX_THR_SN_EST_6 249 0xF600 //TX_THR_SN_EST_7 250 0x0000 //TX_DELTA_THR_SN_EST_0 -251 0x0000 //TX_DELTA_THR_SN_EST_1 +251 0x0200 //TX_DELTA_THR_SN_EST_1 252 0x0200 //TX_DELTA_THR_SN_EST_2 253 0x0200 //TX_DELTA_THR_SN_EST_3 254 0x0200 //TX_DELTA_THR_SN_EST_4 255 0x0200 //TX_DELTA_THR_SN_EST_5 -256 0x0200 //TX_DELTA_THR_SN_EST_6 +256 0x0000 //TX_DELTA_THR_SN_EST_6 257 0x0200 //TX_DELTA_THR_SN_EST_7 258 0x6000 //TX_LAMBDA_NN_EST_0 -259 0x6000 //TX_LAMBDA_NN_EST_1 +259 0x4000 //TX_LAMBDA_NN_EST_1 260 0x4000 //TX_LAMBDA_NN_EST_2 261 0x4000 //TX_LAMBDA_NN_EST_3 262 0x4000 //TX_LAMBDA_NN_EST_4 263 0x4000 //TX_LAMBDA_NN_EST_5 -264 0x4000 //TX_LAMBDA_NN_EST_6 +264 0x6000 //TX_LAMBDA_NN_EST_6 265 0x4000 //TX_LAMBDA_NN_EST_7 266 0x0400 //TX_N_SN_EST 267 0x001E //TX_INBEAM_T @@ -26584,16 +40340,16 @@ 279 0x1000 //TX_B_POST_FLT_0 280 0x1000 //TX_B_POST_FLT_1 281 0x000B //TX_NS_LVL_CTRL_0 -282 0x000F //TX_NS_LVL_CTRL_1 -283 0x0011 //TX_NS_LVL_CTRL_2 +282 0x0011 //TX_NS_LVL_CTRL_1 +283 0x000F //TX_NS_LVL_CTRL_2 284 0x000F //TX_NS_LVL_CTRL_3 285 0x000F //TX_NS_LVL_CTRL_4 286 0x000F //TX_NS_LVL_CTRL_5 287 0x000F //TX_NS_LVL_CTRL_6 288 0x0011 //TX_NS_LVL_CTRL_7 289 0x000C //TX_MIN_GAIN_S_0 -290 0x000C //TX_MIN_GAIN_S_1 -291 0x000F //TX_MIN_GAIN_S_2 +290 0x000F //TX_MIN_GAIN_S_1 +291 0x000C //TX_MIN_GAIN_S_2 292 0x000C //TX_MIN_GAIN_S_3 293 0x000C //TX_MIN_GAIN_S_4 294 0x000C //TX_MIN_GAIN_S_5 @@ -26617,12 +40373,12 @@ 312 0x7FFF //TX_A_POST_FILT_0 313 0x2000 //TX_A_POST_FILT_1 314 0x2000 //TX_A_POST_FILT_S_0 -315 0x4000 //TX_A_POST_FILT_S_1 +315 0x5000 //TX_A_POST_FILT_S_1 316 0x5000 //TX_A_POST_FILT_S_2 317 0x5000 //TX_A_POST_FILT_S_3 318 0x5000 //TX_A_POST_FILT_S_4 319 0x5000 //TX_A_POST_FILT_S_5 -320 0x5000 //TX_A_POST_FILT_S_6 +320 0x4000 //TX_A_POST_FILT_S_6 321 0x5000 //TX_A_POST_FILT_S_7 322 0x1000 //TX_B_POST_FILT_0 323 0x1000 //TX_B_POST_FILT_1 @@ -26682,10 +40438,10 @@ 377 0x7FFF //TX_NOISE_TH_5_4 378 0x044C //TX_NOISE_TH_6 379 0x0014 //TX_MINENOISE_TH -380 0x4000 //TX_MINENOISE_MIC0_TH_MTS -381 0xFFEE //TX_MINENOISE_MIC0_TH_EXP -382 0x6000 //TX_MINENOISE_MIC0_S_TH_MTS -383 0xFFF3 //TX_MINENOISE_MIC0_S_TH_EXP +380 0x4000 //TX_MORENS_TFMASK_TH +381 0xFFEE //TX_DRC_QUIET_FLOOR +382 0x6000 //TX_RATIODTL_CUT_TH +383 0xFFF3 //TX_DT_CUT_K1 384 0x0666 //TX_OUT_ENER_S_TH_CLEAN 385 0x0666 //TX_OUT_ENER_S_TH_LESSCLEAN 386 0x0333 //TX_OUT_ENER_S_TH_NOISY @@ -26693,15 +40449,15 @@ 388 0x0333 //TX_OUT_ENER_TH_SPEECH 389 0x2000 //TX_SN_NPB_GAIN 390 0x0000 //TX_NN_NPB_GAIN -391 0x0000 //TX_CSX_ALPHA_0 -392 0x0000 //TX_CSX_ALPHA_1 -393 0x0000 //TX_CSX_ALPHA_2 -394 0x0000 //TX_CSX_ALPHA_3 -395 0x0800 //TX_MU_ARSP_EST -396 0x00C8 //TX_P_OUTBEAM_MIN_TH +391 0x0000 //TX_POST_MASK_SUP_HSNE +392 0x0000 //TX_TAIL_DET_TH +393 0x0000 //TX_B_LESSCUT_RTO_WTA +394 0x0000 //TX_MEL_G_R +395 0x0800 //TX_SUPHIGH_TH +396 0x00C8 //TX_MASK_G_R 397 0x0002 //TX_EXTRA_NS_L -398 0x0800 //TX_EXTRA_NS_A -399 0x0005 //TX_VR_NOISE_FLOOR_TH +398 0x0800 //TX_C_POST_FLT_MASK +399 0x0005 //TX_A_POST_FLT_WNS 400 0x0148 //TX_MIN_G_LOW300HZ 401 0x0002 //TX_MAXLEVEL_CNG 402 0x00B4 //TX_STN_NOISE_TH @@ -26816,16 +40572,16 @@ 511 0x6666 //TX_MIC_TO_BFGAIN 512 0x0000 //TX_MICTOBFGAIN0 513 0x0000 //TX_FASTMUE_TH -514 0x0000 //TX_DERVB_LEN_0 -515 0x0000 //TX_DERVB_LEN_1 -516 0x0000 //TX_RHO_DERVB -517 0x0000 //TX_MIC_INDX_DERVB -518 0x0000 //TX_MU_DERVB -519 0x0000 //TX_DR_RESRV_0 -520 0x0000 //TX_DR_RESRV_1 -521 0x0000 //TX_DR_RESRV_2 -522 0x0000 //TX_DR_RESRV_3 -523 0x0000 //TX_DR_RESRV_4 +514 0x0000 //TX_DEREVERB_LF_MU +515 0x0000 //TX_DEREVERB_HF_MU +516 0x0000 //TX_DEREVERB_DELAY +517 0x0000 //TX_DEREVERB_COEF_LEN +518 0x0000 //TX_DEREVERB_DNR +519 0x0000 //TX_DEREVERB_ALPHA +520 0x0000 //TX_DEREVERB_BETA +521 0x0000 //TX_GSC_RTOL_TH +522 0x0000 //TX_GSC_RTOH_TH +523 0x0000 //TX_WIDE2_MEANHTH 524 0x0000 //TX_DR_RESRV_5 525 0x0000 //TX_DR_RESRV_6 526 0x0000 //TX_DR_RESRV_7 @@ -27199,8 +40955,73 @@ 894 0xC000 //TX_FASTNS_SSA_THHFL 895 0xCCCC //TX_FASTNS_SSA_THLFH 896 0xD999 //TX_FASTNS_SSA_THHFH +897 0x0000 //TX_SENDFUNC_REG_MICMUTE +898 0x0000 //TX_SENDFUNC_REG_MICMUTE1 +899 0x0000 //TX_MICMUTE_RATIO_THR +900 0x0000 //TX_MICMUTE_AMP_THR +901 0x0000 //TX_MICMUTE_HPF_IND +902 0x0000 //TX_MICMUTE_LOG_EYR_TH +903 0x0000 //TX_MICMUTE_CVG_TIME +904 0x0000 //TX_MICMUTE_RELEASE_TIME +905 0x0000 //TX_MIC_VOLUME_MIC0MUTE +906 0x0000 //TX_MICMUTE_EPD_OFFSET_0 +907 0x0000 //TX_MICMUTE_FRQ_AEC_L +908 0x0000 //TX_MICMUTE_EAD_THR +909 0x0000 //TX_MICMUTE_LAMBDA_CB_NLE +910 0x0000 //TX_MICMUTE_LAMBDA_RE_EST +911 0x0000 //TX_DTD_THR1_MICMUTE_0 +912 0x0000 //TX_DTD_THR1_MICMUTE_1 +913 0x0000 //TX_DTD_THR1_MICMUTE_2 +914 0x0000 //TX_DTD_THR1_MICMUTE_3 +915 0x0000 //TX_DTD_THR2_MICMUTE_0 +916 0x0000 //TX_MICMUTE_MIN_EQ_RE_EST_0 +917 0x0000 //TX_MICMUTE_MIN_EQ_RE_EST_1 +918 0x0000 //TX_MICMUTE_MIN_EQ_RE_EST_2 +919 0x0000 //TX_MICMUTE_MIN_EQ_RE_EST_3 +920 0x0000 //TX_MICMUTE_MIN_EQ_RE_EST_4 +921 0x0000 //TX_MICMUTE_C_POST_FLT +922 0x0000 //TX_MICMUTE_DT_CUT_K +923 0x0000 //TX_MICMUTE_DT_CUT_THR +924 0x0000 //TX_MICMUTE_DT_CUT_K2 +925 0x0000 //TX_MICMUTE_DT_CUT_THR2 +926 0x0000 //TX_MICMUTE_DT2_HOLD_N +927 0x0000 //TX_MICMUTE_RATIODTH_THCUT +928 0x0000 //TX_MICMUTE_B_POST_FLT_ECHOL +929 0x0000 //TX_MICMUTE_B_POST_FLT_ECHOH +930 0x0000 //TX_MICMUTE_C_POST_FLT_MASK +931 0x0000 //TX_MICMUTE_RATIODTL_CUT_TH +932 0x0000 //TX_MICMUTE_DT_CUT_K1 +933 0x0000 //TX_MICMUTE_N2_SN_EST +934 0x0000 //TX_MICMUTE_THR_SN_EST_0 +935 0x0000 //TX_MICMUTE_MIN_G_CTRL_0 +936 0x0000 //TX_MICMUTE_A_POST_FILT_S_0 +937 0x0000 //TX_MICMUTE_B_POST_FILT_0 +938 0x0000 //TX_MIC1RUB_AMP_THR +939 0x0000 //TX_MIC1MUTE_RATIO_THR +940 0x0000 //TX_MIC1MUTE_AMP_THR +941 0x0000 //TX_MIC1MUTE_CVG_TIME +942 0x0000 //TX_MIC1MUTE_RELEASE_TIME +943 0x0000 //TX_AMS_RESRV_01 +944 0x0000 //TX_AMS_RESRV_02 +945 0x0000 //TX_AMS_RESRV_03 +946 0x0000 //TX_AMS_RESRV_04 +947 0x0000 //TX_AMS_RESRV_05 +948 0x0000 //TX_AMS_RESRV_06 +949 0x0000 //TX_AMS_RESRV_07 +950 0x0000 //TX_AMS_RESRV_08 +951 0x0000 //TX_AMS_RESRV_09 +952 0x0000 //TX_AMS_RESRV_10 +953 0x0000 //TX_AMS_RESRV_11 +954 0x0000 //TX_AMS_RESRV_12 +955 0x0000 //TX_AMS_RESRV_13 +956 0x0000 //TX_AMS_RESRV_14 +957 0x0000 //TX_AMS_RESRV_15 +958 0x0000 //TX_AMS_RESRV_16 +959 0x0000 //TX_AMS_RESRV_17 +960 0x0000 //TX_AMS_RESRV_18 +961 0x0000 //TX_AMS_RESRV_19 #RX -0 0x0064 //RX_RECVFUNC_MODE_0 +0 0x2064 //RX_RECVFUNC_MODE_0 1 0x0000 //RX_RECVFUNC_MODE_1 2 0x0003 //RX_SAMPLINGFREQ_SIG 3 0x0003 //RX_SAMPLINGFREQ_PROC @@ -28050,10 +41871,862 @@ 110 0x0000 //RX_FDDRC_RESRV_0 129 0x0100 //RX_SPK_VOL 130 0x0000 //RX_VOL_RESRV_0 +#RX 2 +157 0x2064 //RX_RECVFUNC_MODE_0 +158 0x0000 //RX_RECVFUNC_MODE_1 +159 0x0003 //RX_SAMPLINGFREQ_SIG +160 0x0003 //RX_SAMPLINGFREQ_PROC +161 0x000A //RX_FRAME_SZ +162 0x0000 //RX_DELAY_OPT +163 0x3000 //RX_TDDRC_ALPHA_UP_1 +164 0x3000 //RX_TDDRC_ALPHA_UP_2 +165 0x3000 //RX_TDDRC_ALPHA_UP_3 +166 0x3000 //RX_TDDRC_ALPHA_UP_4 +167 0x0800 //RX_PGA +168 0x7FFF //RX_A_HP +169 0x0000 //RX_B_PE +170 0x1800 //RX_THR_PITCH_DET_0 +171 0x1000 //RX_THR_PITCH_DET_1 +172 0x0800 //RX_THR_PITCH_DET_2 +173 0x0008 //RX_PITCH_BFR_LEN +174 0x0003 //RX_SBD_PITCH_DET +175 0x0100 //RX_PP_RESRV_0 +176 0x0020 //RX_PP_RESRV_1 +177 0x0400 //RX_N_SN_EST +178 0x000C //RX_N2_SN_EST +179 0x0003 //RX_NS_LVL_CTRL +180 0x9000 //RX_THR_SN_EST +181 0x7CCD //RX_LAMBDA_PFILT +182 0x000A //RX_FENS_RESRV_0 +183 0x0190 //RX_FENS_RESRV_1 +184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +187 0x0002 //RX_EXTRA_NS_L +188 0x0800 //RX_EXTRA_NS_A +189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +190 0x7FFF //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +192 0x199A //RX_A_POST_FLT +193 0x0000 //RX_LMT_THRD +194 0x4000 //RX_LMT_ALPHA +195 0x0020 //RX_FDEQ_SUBNUM +196 0x4848 //RX_FDEQ_GAIN_0 +197 0x4848 //RX_FDEQ_GAIN_1 +198 0x4848 //RX_FDEQ_GAIN_2 +199 0x4848 //RX_FDEQ_GAIN_3 +200 0x4848 //RX_FDEQ_GAIN_4 +201 0x4848 //RX_FDEQ_GAIN_5 +202 0x4848 //RX_FDEQ_GAIN_6 +203 0x4848 //RX_FDEQ_GAIN_7 +204 0x4848 //RX_FDEQ_GAIN_8 +205 0x4848 //RX_FDEQ_GAIN_9 +206 0x4848 //RX_FDEQ_GAIN_10 +207 0x4848 //RX_FDEQ_GAIN_11 +208 0x4848 //RX_FDEQ_GAIN_12 +209 0x4848 //RX_FDEQ_GAIN_13 +210 0x4848 //RX_FDEQ_GAIN_14 +211 0x4848 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0202 //RX_FDEQ_BIN_0 +221 0x0203 //RX_FDEQ_BIN_1 +222 0x0303 //RX_FDEQ_BIN_2 +223 0x0304 //RX_FDEQ_BIN_3 +224 0x0405 //RX_FDEQ_BIN_4 +225 0x0506 //RX_FDEQ_BIN_5 +226 0x0708 //RX_FDEQ_BIN_6 +227 0x090A //RX_FDEQ_BIN_7 +228 0x0B0C //RX_FDEQ_BIN_8 +229 0x0D0E //RX_FDEQ_BIN_9 +230 0x1013 //RX_FDEQ_BIN_10 +231 0x1719 //RX_FDEQ_BIN_11 +232 0x1B1E //RX_FDEQ_BIN_12 +233 0x1E1E //RX_FDEQ_BIN_13 +234 0x1E28 //RX_FDEQ_BIN_14 +235 0x282C //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x4000 //RX_FDEQ_RESRV_0 +245 0x0320 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0030 //RX_FDDRC_BAND_MARGIN_1 +248 0x0050 //RX_FDDRC_BAND_MARGIN_2 +249 0x0080 //RX_FDDRC_BAND_MARGIN_3 +250 0x0007 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x5000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x6400 //RX_FDDRC_THRD_3_2 +258 0x6400 //RX_FDDRC_THRD_3_3 +259 0x2000 //RX_FDDRC_SLANT_0_0 +260 0x2000 //RX_FDDRC_SLANT_0_1 +261 0x2000 //RX_FDDRC_SLANT_0_2 +262 0x2000 //RX_FDDRC_SLANT_0_3 +263 0x5333 //RX_FDDRC_SLANT_1_0 +264 0x5333 //RX_FDDRC_SLANT_1_1 +265 0x5333 //RX_FDDRC_SLANT_1_2 +266 0x5333 //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +268 0x0000 //RX_FILTINDX +269 0x0000 //RX_TDDRC_THRD_0 +270 0x0000 //RX_TDDRC_THRD_1 +271 0x7FFF //RX_TDDRC_THRD_2 +272 0x7FFF //RX_TDDRC_THRD_3 +273 0x7FFF //RX_TDDRC_SLANT_0 +274 0x7FFF //RX_TDDRC_SLANT_1 +275 0x3000 //RX_TDDRC_ALPHA_UP_0 +276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x199A //RX_TDDRC_HMNC_GAIN +279 0x0001 //RX_TDDRC_SMT_FLAG +280 0x0CCD //RX_TDDRC_SMT_W +281 0x0155 //RX_TDDRC_DRC_GAIN +282 0x7C00 //RX_LAMBDA_PKA_FP +283 0x2000 //RX_TPKA_FP +284 0x2000 //RX_MIN_G_FP +285 0x0080 //RX_MAX_G_FP +286 0x0100 //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 +288 0x0000 //RX_MAXLEVEL_CNG +289 0x3000 //RX_BWE_UV_TH +290 0x3000 //RX_BWE_UV_TH2 +291 0x1800 //RX_BWE_UV_TH3 +292 0x1000 //RX_BWE_V_TH +293 0x04CD //RX_BWE_GAIN1_V_TH1 +294 0x0F33 //RX_BWE_GAIN1_V_TH2 +295 0x7333 //RX_BWE_UV_EQ +296 0x199A //RX_BWE_V_EQ +297 0x7333 //RX_BWE_TONE_TH +298 0x0004 //RX_BWE_UV_HOLD_T +299 0x6CCD //RX_BWE_GAIN2_ALPHA +300 0x799A //RX_BWE_GAIN3_ALPHA +301 0x001E //RX_BWE_CUTOFF +302 0x3000 //RX_BWE_GAINFILL +303 0x3200 //RX_BWE_MAXTH_TONE +304 0x2000 //RX_BWE_EQ_0 +305 0x2000 //RX_BWE_EQ_1 +306 0x2000 //RX_BWE_EQ_2 +307 0x2000 //RX_BWE_EQ_3 +308 0x2000 //RX_BWE_EQ_4 +309 0x2000 //RX_BWE_EQ_5 +310 0x2000 //RX_BWE_EQ_6 +311 0x0000 //RX_BWE_RESRV_0 +312 0x0000 //RX_BWE_RESRV_1 +313 0x0000 //RX_BWE_RESRV_2 +#VOL 0 +163 0x3000 //RX_TDDRC_ALPHA_UP_1 +164 0x3000 //RX_TDDRC_ALPHA_UP_2 +165 0x3000 //RX_TDDRC_ALPHA_UP_3 +166 0x3000 //RX_TDDRC_ALPHA_UP_4 +184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +190 0x7FFF //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +269 0x0000 //RX_TDDRC_THRD_0 +270 0x0000 //RX_TDDRC_THRD_1 +271 0x7FFF //RX_TDDRC_THRD_2 +272 0x7FFF //RX_TDDRC_THRD_3 +273 0x7FFF //RX_TDDRC_SLANT_0 +274 0x7FFF //RX_TDDRC_SLANT_1 +275 0x3000 //RX_TDDRC_ALPHA_UP_0 +276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x199A //RX_TDDRC_HMNC_GAIN +279 0x0001 //RX_TDDRC_SMT_FLAG +280 0x0CCD //RX_TDDRC_SMT_W +281 0x0155 //RX_TDDRC_DRC_GAIN +195 0x0020 //RX_FDEQ_SUBNUM +196 0x4848 //RX_FDEQ_GAIN_0 +197 0x4848 //RX_FDEQ_GAIN_1 +198 0x4848 //RX_FDEQ_GAIN_2 +199 0x4848 //RX_FDEQ_GAIN_3 +200 0x4848 //RX_FDEQ_GAIN_4 +201 0x4848 //RX_FDEQ_GAIN_5 +202 0x4848 //RX_FDEQ_GAIN_6 +203 0x4848 //RX_FDEQ_GAIN_7 +204 0x4848 //RX_FDEQ_GAIN_8 +205 0x4848 //RX_FDEQ_GAIN_9 +206 0x4848 //RX_FDEQ_GAIN_10 +207 0x4848 //RX_FDEQ_GAIN_11 +208 0x4848 //RX_FDEQ_GAIN_12 +209 0x4848 //RX_FDEQ_GAIN_13 +210 0x4848 //RX_FDEQ_GAIN_14 +211 0x4848 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0202 //RX_FDEQ_BIN_0 +221 0x0203 //RX_FDEQ_BIN_1 +222 0x0303 //RX_FDEQ_BIN_2 +223 0x0304 //RX_FDEQ_BIN_3 +224 0x0405 //RX_FDEQ_BIN_4 +225 0x0506 //RX_FDEQ_BIN_5 +226 0x0708 //RX_FDEQ_BIN_6 +227 0x090A //RX_FDEQ_BIN_7 +228 0x0B0C //RX_FDEQ_BIN_8 +229 0x0D0E //RX_FDEQ_BIN_9 +230 0x1013 //RX_FDEQ_BIN_10 +231 0x1719 //RX_FDEQ_BIN_11 +232 0x1B1E //RX_FDEQ_BIN_12 +233 0x1E1E //RX_FDEQ_BIN_13 +234 0x1E28 //RX_FDEQ_BIN_14 +235 0x282C //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x4000 //RX_FDEQ_RESRV_0 +245 0x0320 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0030 //RX_FDDRC_BAND_MARGIN_1 +248 0x0050 //RX_FDDRC_BAND_MARGIN_2 +249 0x0080 //RX_FDDRC_BAND_MARGIN_3 +250 0x0007 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x5000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x6400 //RX_FDDRC_THRD_3_2 +258 0x6400 //RX_FDDRC_THRD_3_3 +259 0x2000 //RX_FDDRC_SLANT_0_0 +260 0x2000 //RX_FDDRC_SLANT_0_1 +261 0x2000 //RX_FDDRC_SLANT_0_2 +262 0x2000 //RX_FDDRC_SLANT_0_3 +263 0x5333 //RX_FDDRC_SLANT_1_0 +264 0x5333 //RX_FDDRC_SLANT_1_1 +265 0x5333 //RX_FDDRC_SLANT_1_2 +266 0x5333 //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +286 0x0100 //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 +#VOL 1 +163 0x3000 //RX_TDDRC_ALPHA_UP_1 +164 0x3000 //RX_TDDRC_ALPHA_UP_2 +165 0x3000 //RX_TDDRC_ALPHA_UP_3 +166 0x3000 //RX_TDDRC_ALPHA_UP_4 +184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +190 0x7FFF //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +269 0x0000 //RX_TDDRC_THRD_0 +270 0x0000 //RX_TDDRC_THRD_1 +271 0x7FFF //RX_TDDRC_THRD_2 +272 0x7FFF //RX_TDDRC_THRD_3 +273 0x7FFF //RX_TDDRC_SLANT_0 +274 0x7FFF //RX_TDDRC_SLANT_1 +275 0x3000 //RX_TDDRC_ALPHA_UP_0 +276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x199A //RX_TDDRC_HMNC_GAIN +279 0x0001 //RX_TDDRC_SMT_FLAG +280 0x0CCD //RX_TDDRC_SMT_W +281 0x0155 //RX_TDDRC_DRC_GAIN +195 0x0020 //RX_FDEQ_SUBNUM +196 0x4848 //RX_FDEQ_GAIN_0 +197 0x4848 //RX_FDEQ_GAIN_1 +198 0x4848 //RX_FDEQ_GAIN_2 +199 0x4848 //RX_FDEQ_GAIN_3 +200 0x4848 //RX_FDEQ_GAIN_4 +201 0x4848 //RX_FDEQ_GAIN_5 +202 0x4848 //RX_FDEQ_GAIN_6 +203 0x4848 //RX_FDEQ_GAIN_7 +204 0x4848 //RX_FDEQ_GAIN_8 +205 0x4848 //RX_FDEQ_GAIN_9 +206 0x4848 //RX_FDEQ_GAIN_10 +207 0x4848 //RX_FDEQ_GAIN_11 +208 0x4848 //RX_FDEQ_GAIN_12 +209 0x4848 //RX_FDEQ_GAIN_13 +210 0x4848 //RX_FDEQ_GAIN_14 +211 0x4848 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0202 //RX_FDEQ_BIN_0 +221 0x0203 //RX_FDEQ_BIN_1 +222 0x0303 //RX_FDEQ_BIN_2 +223 0x0304 //RX_FDEQ_BIN_3 +224 0x0405 //RX_FDEQ_BIN_4 +225 0x0506 //RX_FDEQ_BIN_5 +226 0x0708 //RX_FDEQ_BIN_6 +227 0x090A //RX_FDEQ_BIN_7 +228 0x0B0C //RX_FDEQ_BIN_8 +229 0x0D0E //RX_FDEQ_BIN_9 +230 0x1013 //RX_FDEQ_BIN_10 +231 0x1719 //RX_FDEQ_BIN_11 +232 0x1B1E //RX_FDEQ_BIN_12 +233 0x1E1E //RX_FDEQ_BIN_13 +234 0x1E28 //RX_FDEQ_BIN_14 +235 0x282C //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x4000 //RX_FDEQ_RESRV_0 +245 0x0320 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0030 //RX_FDDRC_BAND_MARGIN_1 +248 0x0050 //RX_FDDRC_BAND_MARGIN_2 +249 0x0080 //RX_FDDRC_BAND_MARGIN_3 +250 0x0007 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x5000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x6400 //RX_FDDRC_THRD_3_2 +258 0x6400 //RX_FDDRC_THRD_3_3 +259 0x2000 //RX_FDDRC_SLANT_0_0 +260 0x2000 //RX_FDDRC_SLANT_0_1 +261 0x2000 //RX_FDDRC_SLANT_0_2 +262 0x2000 //RX_FDDRC_SLANT_0_3 +263 0x5333 //RX_FDDRC_SLANT_1_0 +264 0x5333 //RX_FDDRC_SLANT_1_1 +265 0x5333 //RX_FDDRC_SLANT_1_2 +266 0x5333 //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +286 0x0100 //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 +#VOL 2 +163 0x3000 //RX_TDDRC_ALPHA_UP_1 +164 0x3000 //RX_TDDRC_ALPHA_UP_2 +165 0x3000 //RX_TDDRC_ALPHA_UP_3 +166 0x3000 //RX_TDDRC_ALPHA_UP_4 +184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +190 0x7FFF //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +269 0x0000 //RX_TDDRC_THRD_0 +270 0x0000 //RX_TDDRC_THRD_1 +271 0x7FFF //RX_TDDRC_THRD_2 +272 0x7FFF //RX_TDDRC_THRD_3 +273 0x7FFF //RX_TDDRC_SLANT_0 +274 0x7FFF //RX_TDDRC_SLANT_1 +275 0x3000 //RX_TDDRC_ALPHA_UP_0 +276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x199A //RX_TDDRC_HMNC_GAIN +279 0x0001 //RX_TDDRC_SMT_FLAG +280 0x0CCD //RX_TDDRC_SMT_W +281 0x0155 //RX_TDDRC_DRC_GAIN +195 0x0020 //RX_FDEQ_SUBNUM +196 0x4848 //RX_FDEQ_GAIN_0 +197 0x4848 //RX_FDEQ_GAIN_1 +198 0x4848 //RX_FDEQ_GAIN_2 +199 0x4848 //RX_FDEQ_GAIN_3 +200 0x4848 //RX_FDEQ_GAIN_4 +201 0x4848 //RX_FDEQ_GAIN_5 +202 0x4848 //RX_FDEQ_GAIN_6 +203 0x4848 //RX_FDEQ_GAIN_7 +204 0x4848 //RX_FDEQ_GAIN_8 +205 0x4848 //RX_FDEQ_GAIN_9 +206 0x4848 //RX_FDEQ_GAIN_10 +207 0x4848 //RX_FDEQ_GAIN_11 +208 0x4848 //RX_FDEQ_GAIN_12 +209 0x4848 //RX_FDEQ_GAIN_13 +210 0x4848 //RX_FDEQ_GAIN_14 +211 0x4848 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0202 //RX_FDEQ_BIN_0 +221 0x0203 //RX_FDEQ_BIN_1 +222 0x0303 //RX_FDEQ_BIN_2 +223 0x0304 //RX_FDEQ_BIN_3 +224 0x0405 //RX_FDEQ_BIN_4 +225 0x0506 //RX_FDEQ_BIN_5 +226 0x0708 //RX_FDEQ_BIN_6 +227 0x090A //RX_FDEQ_BIN_7 +228 0x0B0C //RX_FDEQ_BIN_8 +229 0x0D0E //RX_FDEQ_BIN_9 +230 0x1013 //RX_FDEQ_BIN_10 +231 0x1719 //RX_FDEQ_BIN_11 +232 0x1B1E //RX_FDEQ_BIN_12 +233 0x1E1E //RX_FDEQ_BIN_13 +234 0x1E28 //RX_FDEQ_BIN_14 +235 0x282C //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x4000 //RX_FDEQ_RESRV_0 +245 0x0320 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0030 //RX_FDDRC_BAND_MARGIN_1 +248 0x0050 //RX_FDDRC_BAND_MARGIN_2 +249 0x0080 //RX_FDDRC_BAND_MARGIN_3 +250 0x0007 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x5000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x6400 //RX_FDDRC_THRD_3_2 +258 0x6400 //RX_FDDRC_THRD_3_3 +259 0x2000 //RX_FDDRC_SLANT_0_0 +260 0x2000 //RX_FDDRC_SLANT_0_1 +261 0x2000 //RX_FDDRC_SLANT_0_2 +262 0x2000 //RX_FDDRC_SLANT_0_3 +263 0x5333 //RX_FDDRC_SLANT_1_0 +264 0x5333 //RX_FDDRC_SLANT_1_1 +265 0x5333 //RX_FDDRC_SLANT_1_2 +266 0x5333 //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +286 0x0100 //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 +#VOL 3 +163 0x3000 //RX_TDDRC_ALPHA_UP_1 +164 0x3000 //RX_TDDRC_ALPHA_UP_2 +165 0x3000 //RX_TDDRC_ALPHA_UP_3 +166 0x3000 //RX_TDDRC_ALPHA_UP_4 +184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +190 0x7FFF //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +269 0x0000 //RX_TDDRC_THRD_0 +270 0x0000 //RX_TDDRC_THRD_1 +271 0x7FFF //RX_TDDRC_THRD_2 +272 0x7FFF //RX_TDDRC_THRD_3 +273 0x7FFF //RX_TDDRC_SLANT_0 +274 0x7FFF //RX_TDDRC_SLANT_1 +275 0x3000 //RX_TDDRC_ALPHA_UP_0 +276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x199A //RX_TDDRC_HMNC_GAIN +279 0x0001 //RX_TDDRC_SMT_FLAG +280 0x0CCD //RX_TDDRC_SMT_W +281 0x0155 //RX_TDDRC_DRC_GAIN +195 0x0020 //RX_FDEQ_SUBNUM +196 0x4848 //RX_FDEQ_GAIN_0 +197 0x4848 //RX_FDEQ_GAIN_1 +198 0x4848 //RX_FDEQ_GAIN_2 +199 0x4848 //RX_FDEQ_GAIN_3 +200 0x4848 //RX_FDEQ_GAIN_4 +201 0x4848 //RX_FDEQ_GAIN_5 +202 0x4848 //RX_FDEQ_GAIN_6 +203 0x4848 //RX_FDEQ_GAIN_7 +204 0x4848 //RX_FDEQ_GAIN_8 +205 0x4848 //RX_FDEQ_GAIN_9 +206 0x4848 //RX_FDEQ_GAIN_10 +207 0x4848 //RX_FDEQ_GAIN_11 +208 0x4848 //RX_FDEQ_GAIN_12 +209 0x4848 //RX_FDEQ_GAIN_13 +210 0x4848 //RX_FDEQ_GAIN_14 +211 0x4848 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0202 //RX_FDEQ_BIN_0 +221 0x0203 //RX_FDEQ_BIN_1 +222 0x0303 //RX_FDEQ_BIN_2 +223 0x0304 //RX_FDEQ_BIN_3 +224 0x0405 //RX_FDEQ_BIN_4 +225 0x0506 //RX_FDEQ_BIN_5 +226 0x0708 //RX_FDEQ_BIN_6 +227 0x090A //RX_FDEQ_BIN_7 +228 0x0B0C //RX_FDEQ_BIN_8 +229 0x0D0E //RX_FDEQ_BIN_9 +230 0x1013 //RX_FDEQ_BIN_10 +231 0x1719 //RX_FDEQ_BIN_11 +232 0x1B1E //RX_FDEQ_BIN_12 +233 0x1E1E //RX_FDEQ_BIN_13 +234 0x1E28 //RX_FDEQ_BIN_14 +235 0x282C //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x4000 //RX_FDEQ_RESRV_0 +245 0x0320 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0030 //RX_FDDRC_BAND_MARGIN_1 +248 0x0050 //RX_FDDRC_BAND_MARGIN_2 +249 0x0080 //RX_FDDRC_BAND_MARGIN_3 +250 0x0007 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x5000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x6400 //RX_FDDRC_THRD_3_2 +258 0x6400 //RX_FDDRC_THRD_3_3 +259 0x2000 //RX_FDDRC_SLANT_0_0 +260 0x2000 //RX_FDDRC_SLANT_0_1 +261 0x2000 //RX_FDDRC_SLANT_0_2 +262 0x2000 //RX_FDDRC_SLANT_0_3 +263 0x5333 //RX_FDDRC_SLANT_1_0 +264 0x5333 //RX_FDDRC_SLANT_1_1 +265 0x5333 //RX_FDDRC_SLANT_1_2 +266 0x5333 //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +286 0x0100 //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 +#VOL 4 +163 0x3000 //RX_TDDRC_ALPHA_UP_1 +164 0x3000 //RX_TDDRC_ALPHA_UP_2 +165 0x3000 //RX_TDDRC_ALPHA_UP_3 +166 0x3000 //RX_TDDRC_ALPHA_UP_4 +184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +190 0x7FFF //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +269 0x0000 //RX_TDDRC_THRD_0 +270 0x0000 //RX_TDDRC_THRD_1 +271 0x7FFF //RX_TDDRC_THRD_2 +272 0x7FFF //RX_TDDRC_THRD_3 +273 0x7FFF //RX_TDDRC_SLANT_0 +274 0x7FFF //RX_TDDRC_SLANT_1 +275 0x3000 //RX_TDDRC_ALPHA_UP_0 +276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x199A //RX_TDDRC_HMNC_GAIN +279 0x0001 //RX_TDDRC_SMT_FLAG +280 0x0CCD //RX_TDDRC_SMT_W +281 0x0155 //RX_TDDRC_DRC_GAIN +195 0x0020 //RX_FDEQ_SUBNUM +196 0x4848 //RX_FDEQ_GAIN_0 +197 0x4848 //RX_FDEQ_GAIN_1 +198 0x4848 //RX_FDEQ_GAIN_2 +199 0x4848 //RX_FDEQ_GAIN_3 +200 0x4848 //RX_FDEQ_GAIN_4 +201 0x4848 //RX_FDEQ_GAIN_5 +202 0x4848 //RX_FDEQ_GAIN_6 +203 0x4848 //RX_FDEQ_GAIN_7 +204 0x4848 //RX_FDEQ_GAIN_8 +205 0x4848 //RX_FDEQ_GAIN_9 +206 0x4848 //RX_FDEQ_GAIN_10 +207 0x4848 //RX_FDEQ_GAIN_11 +208 0x4848 //RX_FDEQ_GAIN_12 +209 0x4848 //RX_FDEQ_GAIN_13 +210 0x4848 //RX_FDEQ_GAIN_14 +211 0x4848 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0202 //RX_FDEQ_BIN_0 +221 0x0203 //RX_FDEQ_BIN_1 +222 0x0303 //RX_FDEQ_BIN_2 +223 0x0304 //RX_FDEQ_BIN_3 +224 0x0405 //RX_FDEQ_BIN_4 +225 0x0506 //RX_FDEQ_BIN_5 +226 0x0708 //RX_FDEQ_BIN_6 +227 0x090A //RX_FDEQ_BIN_7 +228 0x0B0C //RX_FDEQ_BIN_8 +229 0x0D0E //RX_FDEQ_BIN_9 +230 0x1013 //RX_FDEQ_BIN_10 +231 0x1719 //RX_FDEQ_BIN_11 +232 0x1B1E //RX_FDEQ_BIN_12 +233 0x1E1E //RX_FDEQ_BIN_13 +234 0x1E28 //RX_FDEQ_BIN_14 +235 0x282C //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x4000 //RX_FDEQ_RESRV_0 +245 0x0320 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0030 //RX_FDDRC_BAND_MARGIN_1 +248 0x0050 //RX_FDDRC_BAND_MARGIN_2 +249 0x0080 //RX_FDDRC_BAND_MARGIN_3 +250 0x0007 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x5000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x6400 //RX_FDDRC_THRD_3_2 +258 0x6400 //RX_FDDRC_THRD_3_3 +259 0x2000 //RX_FDDRC_SLANT_0_0 +260 0x2000 //RX_FDDRC_SLANT_0_1 +261 0x2000 //RX_FDDRC_SLANT_0_2 +262 0x2000 //RX_FDDRC_SLANT_0_3 +263 0x5333 //RX_FDDRC_SLANT_1_0 +264 0x5333 //RX_FDDRC_SLANT_1_1 +265 0x5333 //RX_FDDRC_SLANT_1_2 +266 0x5333 //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +286 0x0100 //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 +#VOL 5 +163 0x3000 //RX_TDDRC_ALPHA_UP_1 +164 0x3000 //RX_TDDRC_ALPHA_UP_2 +165 0x3000 //RX_TDDRC_ALPHA_UP_3 +166 0x3000 //RX_TDDRC_ALPHA_UP_4 +184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +190 0x7FFF //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +269 0x0000 //RX_TDDRC_THRD_0 +270 0x0000 //RX_TDDRC_THRD_1 +271 0x7FFF //RX_TDDRC_THRD_2 +272 0x7FFF //RX_TDDRC_THRD_3 +273 0x7FFF //RX_TDDRC_SLANT_0 +274 0x7FFF //RX_TDDRC_SLANT_1 +275 0x3000 //RX_TDDRC_ALPHA_UP_0 +276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x199A //RX_TDDRC_HMNC_GAIN +279 0x0001 //RX_TDDRC_SMT_FLAG +280 0x0CCD //RX_TDDRC_SMT_W +281 0x0155 //RX_TDDRC_DRC_GAIN +195 0x0020 //RX_FDEQ_SUBNUM +196 0x4848 //RX_FDEQ_GAIN_0 +197 0x4848 //RX_FDEQ_GAIN_1 +198 0x4848 //RX_FDEQ_GAIN_2 +199 0x4848 //RX_FDEQ_GAIN_3 +200 0x4848 //RX_FDEQ_GAIN_4 +201 0x4848 //RX_FDEQ_GAIN_5 +202 0x4848 //RX_FDEQ_GAIN_6 +203 0x4848 //RX_FDEQ_GAIN_7 +204 0x4848 //RX_FDEQ_GAIN_8 +205 0x4848 //RX_FDEQ_GAIN_9 +206 0x4848 //RX_FDEQ_GAIN_10 +207 0x4848 //RX_FDEQ_GAIN_11 +208 0x4848 //RX_FDEQ_GAIN_12 +209 0x4848 //RX_FDEQ_GAIN_13 +210 0x4848 //RX_FDEQ_GAIN_14 +211 0x4848 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0202 //RX_FDEQ_BIN_0 +221 0x0203 //RX_FDEQ_BIN_1 +222 0x0303 //RX_FDEQ_BIN_2 +223 0x0304 //RX_FDEQ_BIN_3 +224 0x0405 //RX_FDEQ_BIN_4 +225 0x0506 //RX_FDEQ_BIN_5 +226 0x0708 //RX_FDEQ_BIN_6 +227 0x090A //RX_FDEQ_BIN_7 +228 0x0B0C //RX_FDEQ_BIN_8 +229 0x0D0E //RX_FDEQ_BIN_9 +230 0x1013 //RX_FDEQ_BIN_10 +231 0x1719 //RX_FDEQ_BIN_11 +232 0x1B1E //RX_FDEQ_BIN_12 +233 0x1E1E //RX_FDEQ_BIN_13 +234 0x1E28 //RX_FDEQ_BIN_14 +235 0x282C //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x4000 //RX_FDEQ_RESRV_0 +245 0x0320 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0030 //RX_FDDRC_BAND_MARGIN_1 +248 0x0050 //RX_FDDRC_BAND_MARGIN_2 +249 0x0080 //RX_FDDRC_BAND_MARGIN_3 +250 0x0007 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x5000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x6400 //RX_FDDRC_THRD_3_2 +258 0x6400 //RX_FDDRC_THRD_3_3 +259 0x2000 //RX_FDDRC_SLANT_0_0 +260 0x2000 //RX_FDDRC_SLANT_0_1 +261 0x2000 //RX_FDDRC_SLANT_0_2 +262 0x2000 //RX_FDDRC_SLANT_0_3 +263 0x5333 //RX_FDDRC_SLANT_1_0 +264 0x5333 //RX_FDDRC_SLANT_1_1 +265 0x5333 //RX_FDDRC_SLANT_1_2 +266 0x5333 //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +286 0x0100 //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 +#VOL 6 +163 0x3000 //RX_TDDRC_ALPHA_UP_1 +164 0x3000 //RX_TDDRC_ALPHA_UP_2 +165 0x3000 //RX_TDDRC_ALPHA_UP_3 +166 0x3000 //RX_TDDRC_ALPHA_UP_4 +184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +190 0x7FFF //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +269 0x0000 //RX_TDDRC_THRD_0 +270 0x0000 //RX_TDDRC_THRD_1 +271 0x7FFF //RX_TDDRC_THRD_2 +272 0x7FFF //RX_TDDRC_THRD_3 +273 0x7FFF //RX_TDDRC_SLANT_0 +274 0x7FFF //RX_TDDRC_SLANT_1 +275 0x3000 //RX_TDDRC_ALPHA_UP_0 +276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x199A //RX_TDDRC_HMNC_GAIN +279 0x0001 //RX_TDDRC_SMT_FLAG +280 0x0CCD //RX_TDDRC_SMT_W +281 0x0155 //RX_TDDRC_DRC_GAIN +195 0x0020 //RX_FDEQ_SUBNUM +196 0x4848 //RX_FDEQ_GAIN_0 +197 0x4848 //RX_FDEQ_GAIN_1 +198 0x4848 //RX_FDEQ_GAIN_2 +199 0x4848 //RX_FDEQ_GAIN_3 +200 0x4848 //RX_FDEQ_GAIN_4 +201 0x4848 //RX_FDEQ_GAIN_5 +202 0x4848 //RX_FDEQ_GAIN_6 +203 0x4848 //RX_FDEQ_GAIN_7 +204 0x4848 //RX_FDEQ_GAIN_8 +205 0x4848 //RX_FDEQ_GAIN_9 +206 0x4848 //RX_FDEQ_GAIN_10 +207 0x4848 //RX_FDEQ_GAIN_11 +208 0x4848 //RX_FDEQ_GAIN_12 +209 0x4848 //RX_FDEQ_GAIN_13 +210 0x4848 //RX_FDEQ_GAIN_14 +211 0x4848 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0202 //RX_FDEQ_BIN_0 +221 0x0203 //RX_FDEQ_BIN_1 +222 0x0303 //RX_FDEQ_BIN_2 +223 0x0304 //RX_FDEQ_BIN_3 +224 0x0405 //RX_FDEQ_BIN_4 +225 0x0506 //RX_FDEQ_BIN_5 +226 0x0708 //RX_FDEQ_BIN_6 +227 0x090A //RX_FDEQ_BIN_7 +228 0x0B0C //RX_FDEQ_BIN_8 +229 0x0D0E //RX_FDEQ_BIN_9 +230 0x1013 //RX_FDEQ_BIN_10 +231 0x1719 //RX_FDEQ_BIN_11 +232 0x1B1E //RX_FDEQ_BIN_12 +233 0x1E1E //RX_FDEQ_BIN_13 +234 0x1E28 //RX_FDEQ_BIN_14 +235 0x282C //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x4000 //RX_FDEQ_RESRV_0 +245 0x0320 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0030 //RX_FDDRC_BAND_MARGIN_1 +248 0x0050 //RX_FDDRC_BAND_MARGIN_2 +249 0x0080 //RX_FDDRC_BAND_MARGIN_3 +250 0x0007 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x5000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x6400 //RX_FDDRC_THRD_3_2 +258 0x6400 //RX_FDDRC_THRD_3_3 +259 0x2000 //RX_FDDRC_SLANT_0_0 +260 0x2000 //RX_FDDRC_SLANT_0_1 +261 0x2000 //RX_FDDRC_SLANT_0_2 +262 0x2000 //RX_FDDRC_SLANT_0_3 +263 0x5333 //RX_FDDRC_SLANT_1_0 +264 0x5333 //RX_FDDRC_SLANT_1_1 +265 0x5333 //RX_FDDRC_SLANT_1_2 +266 0x5333 //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +286 0x0100 //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 #CASE_NAME BLUETOOTH-BTWB-VOICE_GENERIC-FB -#PARAM_TYPE TX+RX -#TOTAL_CUSTOM_STEP 7 +#PARAM_MODE Full +#PARAM_TYPE TX+2RX +#TOTAL_CUSTOM_STEP 7+7 #TX 0 0x0009 //TX_OPERATION_MODE_0 1 0x0009 //TX_OPERATION_MODE_1 @@ -28306,10 +42979,10 @@ 248 0xF600 //TX_THR_SN_EST_6 249 0xF600 //TX_THR_SN_EST_7 250 0x0200 //TX_DELTA_THR_SN_EST_0 -251 0x0200 //TX_DELTA_THR_SN_EST_1 -252 0x0400 //TX_DELTA_THR_SN_EST_2 -253 0x0300 //TX_DELTA_THR_SN_EST_3 -254 0x0600 //TX_DELTA_THR_SN_EST_4 +251 0x0400 //TX_DELTA_THR_SN_EST_1 +252 0x0300 //TX_DELTA_THR_SN_EST_2 +253 0x0600 //TX_DELTA_THR_SN_EST_3 +254 0x0200 //TX_DELTA_THR_SN_EST_4 255 0x0200 //TX_DELTA_THR_SN_EST_5 256 0x0200 //TX_DELTA_THR_SN_EST_6 257 0x0200 //TX_DELTA_THR_SN_EST_7 @@ -28337,31 +43010,31 @@ 279 0x2000 //TX_B_POST_FLT_0 280 0x2000 //TX_B_POST_FLT_1 281 0x0012 //TX_NS_LVL_CTRL_0 -282 0x0019 //TX_NS_LVL_CTRL_1 +282 0x0016 //TX_NS_LVL_CTRL_1 283 0x0016 //TX_NS_LVL_CTRL_2 -284 0x0016 //TX_NS_LVL_CTRL_3 -285 0x0019 //TX_NS_LVL_CTRL_4 +284 0x0019 //TX_NS_LVL_CTRL_3 +285 0x0010 //TX_NS_LVL_CTRL_4 286 0x0010 //TX_NS_LVL_CTRL_5 -287 0x0010 //TX_NS_LVL_CTRL_6 +287 0x0019 //TX_NS_LVL_CTRL_6 288 0x0010 //TX_NS_LVL_CTRL_7 289 0x000C //TX_MIN_GAIN_S_0 -290 0x0011 //TX_MIN_GAIN_S_1 +290 0x000C //TX_MIN_GAIN_S_1 291 0x000C //TX_MIN_GAIN_S_2 -292 0x000C //TX_MIN_GAIN_S_3 -293 0x000F //TX_MIN_GAIN_S_4 +292 0x000F //TX_MIN_GAIN_S_3 +293 0x000C //TX_MIN_GAIN_S_4 294 0x000C //TX_MIN_GAIN_S_5 -295 0x000C //TX_MIN_GAIN_S_6 +295 0x0011 //TX_MIN_GAIN_S_6 296 0x000C //TX_MIN_GAIN_S_7 297 0x7FFF //TX_NMOS_SUP 298 0x0000 //TX_NS_MAX_PRI_SNR_TH 299 0x0000 //TX_NMOS_SUP_MENSA 300 0x7000 //TX_SNRI_SUP_0 -301 0x6000 //TX_SNRI_SUP_1 +301 0x7000 //TX_SNRI_SUP_1 302 0x7000 //TX_SNRI_SUP_2 -303 0x7000 //TX_SNRI_SUP_3 -304 0x6000 //TX_SNRI_SUP_4 +303 0x6000 //TX_SNRI_SUP_3 +304 0x7FFF //TX_SNRI_SUP_4 305 0x7FFF //TX_SNRI_SUP_5 -306 0x7FFF //TX_SNRI_SUP_6 +306 0x6000 //TX_SNRI_SUP_6 307 0x7FFF //TX_SNRI_SUP_7 308 0x7FFF //TX_THR_LFNS 309 0x0016 //TX_G_LFNS @@ -28378,8 +43051,8 @@ 320 0x6000 //TX_A_POST_FILT_S_6 321 0x6000 //TX_A_POST_FILT_S_7 322 0x2000 //TX_B_POST_FILT_0 -323 0x2000 //TX_B_POST_FILT_1 -324 0x4000 //TX_B_POST_FILT_2 +323 0x4000 //TX_B_POST_FILT_1 +324 0x2000 //TX_B_POST_FILT_2 325 0x2000 //TX_B_POST_FILT_3 326 0x2000 //TX_B_POST_FILT_4 327 0x2000 //TX_B_POST_FILT_5 @@ -28435,10 +43108,10 @@ 377 0x0000 //TX_NOISE_TH_5_4 378 0x02BC //TX_NOISE_TH_6 379 0x0020 //TX_MINENOISE_TH -380 0x4000 //TX_MINENOISE_MIC0_TH_MTS -381 0xFFEE //TX_MINENOISE_MIC0_TH_EXP -382 0x6000 //TX_MINENOISE_MIC0_S_TH_MTS -383 0xFFF3 //TX_MINENOISE_MIC0_S_TH_EXP +380 0x4000 //TX_MORENS_TFMASK_TH +381 0xFFEE //TX_DRC_QUIET_FLOOR +382 0x6000 //TX_RATIODTL_CUT_TH +383 0xFFF3 //TX_DT_CUT_K1 384 0x0666 //TX_OUT_ENER_S_TH_CLEAN 385 0x0666 //TX_OUT_ENER_S_TH_LESSCLEAN 386 0x0333 //TX_OUT_ENER_S_TH_NOISY @@ -28446,15 +43119,15 @@ 388 0x0333 //TX_OUT_ENER_TH_SPEECH 389 0x2000 //TX_SN_NPB_GAIN 390 0x0000 //TX_NN_NPB_GAIN -391 0x0000 //TX_CSX_ALPHA_0 -392 0x0000 //TX_CSX_ALPHA_1 -393 0x0000 //TX_CSX_ALPHA_2 -394 0x0000 //TX_CSX_ALPHA_3 -395 0x0800 //TX_MU_ARSP_EST -396 0x00C8 //TX_P_OUTBEAM_MIN_TH +391 0x0000 //TX_POST_MASK_SUP_HSNE +392 0x0000 //TX_TAIL_DET_TH +393 0x0000 //TX_B_LESSCUT_RTO_WTA +394 0x0000 //TX_MEL_G_R +395 0x0800 //TX_SUPHIGH_TH +396 0x00C8 //TX_MASK_G_R 397 0x0002 //TX_EXTRA_NS_L -398 0x0800 //TX_EXTRA_NS_A -399 0x0005 //TX_VR_NOISE_FLOOR_TH +398 0x0800 //TX_C_POST_FLT_MASK +399 0x0005 //TX_A_POST_FLT_WNS 400 0x0148 //TX_MIN_G_LOW300HZ 401 0x0002 //TX_MAXLEVEL_CNG 402 0x00B4 //TX_STN_NOISE_TH @@ -28569,16 +43242,16 @@ 511 0x6666 //TX_MIC_TO_BFGAIN 512 0x0000 //TX_MICTOBFGAIN0 513 0x0000 //TX_FASTMUE_TH -514 0x0000 //TX_DERVB_LEN_0 -515 0x0000 //TX_DERVB_LEN_1 -516 0x0000 //TX_RHO_DERVB -517 0x0000 //TX_MIC_INDX_DERVB -518 0x0000 //TX_MU_DERVB -519 0x0000 //TX_DR_RESRV_0 -520 0x0000 //TX_DR_RESRV_1 -521 0x0000 //TX_DR_RESRV_2 -522 0x0000 //TX_DR_RESRV_3 -523 0x0000 //TX_DR_RESRV_4 +514 0x0000 //TX_DEREVERB_LF_MU +515 0x0000 //TX_DEREVERB_HF_MU +516 0x0000 //TX_DEREVERB_DELAY +517 0x0000 //TX_DEREVERB_COEF_LEN +518 0x0000 //TX_DEREVERB_DNR +519 0x0000 //TX_DEREVERB_ALPHA +520 0x0000 //TX_DEREVERB_BETA +521 0x0000 //TX_GSC_RTOL_TH +522 0x0000 //TX_GSC_RTOH_TH +523 0x0000 //TX_WIDE2_MEANHTH 524 0x0000 //TX_DR_RESRV_5 525 0x0000 //TX_DR_RESRV_6 526 0x0000 //TX_DR_RESRV_7 @@ -28952,8 +43625,73 @@ 894 0xC000 //TX_FASTNS_SSA_THHFL 895 0xCCCC //TX_FASTNS_SSA_THLFH 896 0xD999 //TX_FASTNS_SSA_THHFH +897 0x0000 //TX_SENDFUNC_REG_MICMUTE +898 0x0000 //TX_SENDFUNC_REG_MICMUTE1 +899 0x0000 //TX_MICMUTE_RATIO_THR +900 0x0000 //TX_MICMUTE_AMP_THR +901 0x0000 //TX_MICMUTE_HPF_IND +902 0x0000 //TX_MICMUTE_LOG_EYR_TH +903 0x0000 //TX_MICMUTE_CVG_TIME +904 0x0000 //TX_MICMUTE_RELEASE_TIME +905 0x0000 //TX_MIC_VOLUME_MIC0MUTE +906 0x0000 //TX_MICMUTE_EPD_OFFSET_0 +907 0x0000 //TX_MICMUTE_FRQ_AEC_L +908 0x0000 //TX_MICMUTE_EAD_THR +909 0x0000 //TX_MICMUTE_LAMBDA_CB_NLE +910 0x0000 //TX_MICMUTE_LAMBDA_RE_EST +911 0x0000 //TX_DTD_THR1_MICMUTE_0 +912 0x0000 //TX_DTD_THR1_MICMUTE_1 +913 0x0000 //TX_DTD_THR1_MICMUTE_2 +914 0x0000 //TX_DTD_THR1_MICMUTE_3 +915 0x0000 //TX_DTD_THR2_MICMUTE_0 +916 0x0000 //TX_MICMUTE_MIN_EQ_RE_EST_0 +917 0x0000 //TX_MICMUTE_MIN_EQ_RE_EST_1 +918 0x0000 //TX_MICMUTE_MIN_EQ_RE_EST_2 +919 0x0000 //TX_MICMUTE_MIN_EQ_RE_EST_3 +920 0x0000 //TX_MICMUTE_MIN_EQ_RE_EST_4 +921 0x0000 //TX_MICMUTE_C_POST_FLT +922 0x0000 //TX_MICMUTE_DT_CUT_K +923 0x0000 //TX_MICMUTE_DT_CUT_THR +924 0x0000 //TX_MICMUTE_DT_CUT_K2 +925 0x0000 //TX_MICMUTE_DT_CUT_THR2 +926 0x0000 //TX_MICMUTE_DT2_HOLD_N +927 0x0000 //TX_MICMUTE_RATIODTH_THCUT +928 0x0000 //TX_MICMUTE_B_POST_FLT_ECHOL +929 0x0000 //TX_MICMUTE_B_POST_FLT_ECHOH +930 0x0000 //TX_MICMUTE_C_POST_FLT_MASK +931 0x0000 //TX_MICMUTE_RATIODTL_CUT_TH +932 0x0000 //TX_MICMUTE_DT_CUT_K1 +933 0x0000 //TX_MICMUTE_N2_SN_EST +934 0x0000 //TX_MICMUTE_THR_SN_EST_0 +935 0x0000 //TX_MICMUTE_MIN_G_CTRL_0 +936 0x0000 //TX_MICMUTE_A_POST_FILT_S_0 +937 0x0000 //TX_MICMUTE_B_POST_FILT_0 +938 0x0000 //TX_MIC1RUB_AMP_THR +939 0x0000 //TX_MIC1MUTE_RATIO_THR +940 0x0000 //TX_MIC1MUTE_AMP_THR +941 0x0000 //TX_MIC1MUTE_CVG_TIME +942 0x0000 //TX_MIC1MUTE_RELEASE_TIME +943 0x0000 //TX_AMS_RESRV_01 +944 0x0000 //TX_AMS_RESRV_02 +945 0x0000 //TX_AMS_RESRV_03 +946 0x0000 //TX_AMS_RESRV_04 +947 0x0000 //TX_AMS_RESRV_05 +948 0x0000 //TX_AMS_RESRV_06 +949 0x0000 //TX_AMS_RESRV_07 +950 0x0000 //TX_AMS_RESRV_08 +951 0x0000 //TX_AMS_RESRV_09 +952 0x0000 //TX_AMS_RESRV_10 +953 0x0000 //TX_AMS_RESRV_11 +954 0x0000 //TX_AMS_RESRV_12 +955 0x0000 //TX_AMS_RESRV_13 +956 0x0000 //TX_AMS_RESRV_14 +957 0x0000 //TX_AMS_RESRV_15 +958 0x0000 //TX_AMS_RESRV_16 +959 0x0000 //TX_AMS_RESRV_17 +960 0x0000 //TX_AMS_RESRV_18 +961 0x0000 //TX_AMS_RESRV_19 #RX -0 0x0064 //RX_RECVFUNC_MODE_0 +0 0x2064 //RX_RECVFUNC_MODE_0 1 0x0000 //RX_RECVFUNC_MODE_1 2 0x0004 //RX_SAMPLINGFREQ_SIG 3 0x0004 //RX_SAMPLINGFREQ_PROC @@ -29803,10 +44541,862 @@ 110 0x0000 //RX_FDDRC_RESRV_0 129 0x0100 //RX_SPK_VOL 130 0x0000 //RX_VOL_RESRV_0 +#RX 2 +157 0x0064 //RX_RECVFUNC_MODE_0 +158 0x0000 //RX_RECVFUNC_MODE_1 +159 0x0004 //RX_SAMPLINGFREQ_SIG +160 0x0004 //RX_SAMPLINGFREQ_PROC +161 0x000A //RX_FRAME_SZ +162 0x0000 //RX_DELAY_OPT +163 0x1000 //RX_TDDRC_ALPHA_UP_1 +164 0x1000 //RX_TDDRC_ALPHA_UP_2 +165 0x1000 //RX_TDDRC_ALPHA_UP_3 +166 0x1000 //RX_TDDRC_ALPHA_UP_4 +167 0x0800 //RX_PGA +168 0x7FFF //RX_A_HP +169 0x4000 //RX_B_PE +170 0x7800 //RX_THR_PITCH_DET_0 +171 0x7000 //RX_THR_PITCH_DET_1 +172 0x6000 //RX_THR_PITCH_DET_2 +173 0x0008 //RX_PITCH_BFR_LEN +174 0x0003 //RX_SBD_PITCH_DET +175 0x0100 //RX_PP_RESRV_0 +176 0x0020 //RX_PP_RESRV_1 +177 0x0500 //RX_N_SN_EST +178 0x000C //RX_N2_SN_EST +179 0x000A //RX_NS_LVL_CTRL +180 0xF600 //RX_THR_SN_EST +181 0x7000 //RX_LAMBDA_PFILT +182 0x000A //RX_FENS_RESRV_0 +183 0x0190 //RX_FENS_RESRV_1 +184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +187 0x0002 //RX_EXTRA_NS_L +188 0x0800 //RX_EXTRA_NS_A +189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +190 0x7FFF //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +192 0x199A //RX_A_POST_FLT +193 0x0000 //RX_LMT_THRD +194 0x4000 //RX_LMT_ALPHA +195 0x0020 //RX_FDEQ_SUBNUM +196 0x4848 //RX_FDEQ_GAIN_0 +197 0x4848 //RX_FDEQ_GAIN_1 +198 0x4848 //RX_FDEQ_GAIN_2 +199 0x4848 //RX_FDEQ_GAIN_3 +200 0x4848 //RX_FDEQ_GAIN_4 +201 0x4848 //RX_FDEQ_GAIN_5 +202 0x4848 //RX_FDEQ_GAIN_6 +203 0x4848 //RX_FDEQ_GAIN_7 +204 0x4848 //RX_FDEQ_GAIN_8 +205 0x4848 //RX_FDEQ_GAIN_9 +206 0x4848 //RX_FDEQ_GAIN_10 +207 0x4848 //RX_FDEQ_GAIN_11 +208 0x4848 //RX_FDEQ_GAIN_12 +209 0x4848 //RX_FDEQ_GAIN_13 +210 0x4848 //RX_FDEQ_GAIN_14 +211 0x4848 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0202 //RX_FDEQ_BIN_0 +221 0x0203 //RX_FDEQ_BIN_1 +222 0x0304 //RX_FDEQ_BIN_2 +223 0x0405 //RX_FDEQ_BIN_3 +224 0x0607 //RX_FDEQ_BIN_4 +225 0x0809 //RX_FDEQ_BIN_5 +226 0x0A0B //RX_FDEQ_BIN_6 +227 0x0C0D //RX_FDEQ_BIN_7 +228 0x0E0F //RX_FDEQ_BIN_8 +229 0x1011 //RX_FDEQ_BIN_9 +230 0x1214 //RX_FDEQ_BIN_10 +231 0x1618 //RX_FDEQ_BIN_11 +232 0x1C1C //RX_FDEQ_BIN_12 +233 0x2020 //RX_FDEQ_BIN_13 +234 0x2020 //RX_FDEQ_BIN_14 +235 0x2011 //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x4000 //RX_FDEQ_RESRV_0 +245 0x0320 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0030 //RX_FDDRC_BAND_MARGIN_1 +248 0x0050 //RX_FDDRC_BAND_MARGIN_2 +249 0x0080 //RX_FDDRC_BAND_MARGIN_3 +250 0x0007 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x5000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x6400 //RX_FDDRC_THRD_3_2 +258 0x6400 //RX_FDDRC_THRD_3_3 +259 0x2000 //RX_FDDRC_SLANT_0_0 +260 0x2000 //RX_FDDRC_SLANT_0_1 +261 0x2000 //RX_FDDRC_SLANT_0_2 +262 0x2000 //RX_FDDRC_SLANT_0_3 +263 0x5333 //RX_FDDRC_SLANT_1_0 +264 0x5333 //RX_FDDRC_SLANT_1_1 +265 0x5333 //RX_FDDRC_SLANT_1_2 +266 0x5333 //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +268 0x0000 //RX_FILTINDX +269 0x0000 //RX_TDDRC_THRD_0 +270 0x0000 //RX_TDDRC_THRD_1 +271 0x7FFF //RX_TDDRC_THRD_2 +272 0x7FFF //RX_TDDRC_THRD_3 +273 0x7FFF //RX_TDDRC_SLANT_0 +274 0x7FFF //RX_TDDRC_SLANT_1 +275 0x1000 //RX_TDDRC_ALPHA_UP_0 +276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x199A //RX_TDDRC_HMNC_GAIN +279 0x0001 //RX_TDDRC_SMT_FLAG +280 0x0CCD //RX_TDDRC_SMT_W +281 0x0155 //RX_TDDRC_DRC_GAIN +282 0x7C00 //RX_LAMBDA_PKA_FP +283 0x2000 //RX_TPKA_FP +284 0x2000 //RX_MIN_G_FP +285 0x0080 //RX_MAX_G_FP +286 0x0100 //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 +288 0x0000 //RX_MAXLEVEL_CNG +289 0x3000 //RX_BWE_UV_TH +290 0x3000 //RX_BWE_UV_TH2 +291 0x1800 //RX_BWE_UV_TH3 +292 0x1000 //RX_BWE_V_TH +293 0x04CD //RX_BWE_GAIN1_V_TH1 +294 0x0F33 //RX_BWE_GAIN1_V_TH2 +295 0x7333 //RX_BWE_UV_EQ +296 0x199A //RX_BWE_V_EQ +297 0x7333 //RX_BWE_TONE_TH +298 0x0004 //RX_BWE_UV_HOLD_T +299 0x6CCD //RX_BWE_GAIN2_ALPHA +300 0x799A //RX_BWE_GAIN3_ALPHA +301 0x001E //RX_BWE_CUTOFF +302 0x3000 //RX_BWE_GAINFILL +303 0x3200 //RX_BWE_MAXTH_TONE +304 0x2000 //RX_BWE_EQ_0 +305 0x2000 //RX_BWE_EQ_1 +306 0x2000 //RX_BWE_EQ_2 +307 0x2000 //RX_BWE_EQ_3 +308 0x2000 //RX_BWE_EQ_4 +309 0x2000 //RX_BWE_EQ_5 +310 0x2000 //RX_BWE_EQ_6 +311 0x0000 //RX_BWE_RESRV_0 +312 0x0000 //RX_BWE_RESRV_1 +313 0x0000 //RX_BWE_RESRV_2 +#VOL 0 +163 0x1000 //RX_TDDRC_ALPHA_UP_1 +164 0x1000 //RX_TDDRC_ALPHA_UP_2 +165 0x1000 //RX_TDDRC_ALPHA_UP_3 +166 0x1000 //RX_TDDRC_ALPHA_UP_4 +184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +190 0x7FFF //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +269 0x0000 //RX_TDDRC_THRD_0 +270 0x0000 //RX_TDDRC_THRD_1 +271 0x7FFF //RX_TDDRC_THRD_2 +272 0x7FFF //RX_TDDRC_THRD_3 +273 0x7FFF //RX_TDDRC_SLANT_0 +274 0x7FFF //RX_TDDRC_SLANT_1 +275 0x1000 //RX_TDDRC_ALPHA_UP_0 +276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x199A //RX_TDDRC_HMNC_GAIN +279 0x0001 //RX_TDDRC_SMT_FLAG +280 0x0CCD //RX_TDDRC_SMT_W +281 0x0155 //RX_TDDRC_DRC_GAIN +195 0x0020 //RX_FDEQ_SUBNUM +196 0x4848 //RX_FDEQ_GAIN_0 +197 0x4848 //RX_FDEQ_GAIN_1 +198 0x4848 //RX_FDEQ_GAIN_2 +199 0x4848 //RX_FDEQ_GAIN_3 +200 0x4848 //RX_FDEQ_GAIN_4 +201 0x4848 //RX_FDEQ_GAIN_5 +202 0x4848 //RX_FDEQ_GAIN_6 +203 0x4848 //RX_FDEQ_GAIN_7 +204 0x4848 //RX_FDEQ_GAIN_8 +205 0x4848 //RX_FDEQ_GAIN_9 +206 0x4848 //RX_FDEQ_GAIN_10 +207 0x4848 //RX_FDEQ_GAIN_11 +208 0x4848 //RX_FDEQ_GAIN_12 +209 0x4848 //RX_FDEQ_GAIN_13 +210 0x4848 //RX_FDEQ_GAIN_14 +211 0x4848 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0202 //RX_FDEQ_BIN_0 +221 0x0203 //RX_FDEQ_BIN_1 +222 0x0304 //RX_FDEQ_BIN_2 +223 0x0405 //RX_FDEQ_BIN_3 +224 0x0607 //RX_FDEQ_BIN_4 +225 0x0809 //RX_FDEQ_BIN_5 +226 0x0A0B //RX_FDEQ_BIN_6 +227 0x0C0D //RX_FDEQ_BIN_7 +228 0x0E0F //RX_FDEQ_BIN_8 +229 0x1011 //RX_FDEQ_BIN_9 +230 0x1214 //RX_FDEQ_BIN_10 +231 0x1618 //RX_FDEQ_BIN_11 +232 0x1C1C //RX_FDEQ_BIN_12 +233 0x2020 //RX_FDEQ_BIN_13 +234 0x2020 //RX_FDEQ_BIN_14 +235 0x2011 //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x4000 //RX_FDEQ_RESRV_0 +245 0x0320 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0030 //RX_FDDRC_BAND_MARGIN_1 +248 0x0050 //RX_FDDRC_BAND_MARGIN_2 +249 0x0080 //RX_FDDRC_BAND_MARGIN_3 +250 0x0007 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x5000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x6400 //RX_FDDRC_THRD_3_2 +258 0x6400 //RX_FDDRC_THRD_3_3 +259 0x2000 //RX_FDDRC_SLANT_0_0 +260 0x2000 //RX_FDDRC_SLANT_0_1 +261 0x2000 //RX_FDDRC_SLANT_0_2 +262 0x2000 //RX_FDDRC_SLANT_0_3 +263 0x5333 //RX_FDDRC_SLANT_1_0 +264 0x5333 //RX_FDDRC_SLANT_1_1 +265 0x5333 //RX_FDDRC_SLANT_1_2 +266 0x5333 //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +286 0x0100 //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 +#VOL 1 +163 0x1000 //RX_TDDRC_ALPHA_UP_1 +164 0x1000 //RX_TDDRC_ALPHA_UP_2 +165 0x1000 //RX_TDDRC_ALPHA_UP_3 +166 0x1000 //RX_TDDRC_ALPHA_UP_4 +184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +190 0x7FFF //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +269 0x0000 //RX_TDDRC_THRD_0 +270 0x0000 //RX_TDDRC_THRD_1 +271 0x7FFF //RX_TDDRC_THRD_2 +272 0x7FFF //RX_TDDRC_THRD_3 +273 0x7FFF //RX_TDDRC_SLANT_0 +274 0x7FFF //RX_TDDRC_SLANT_1 +275 0x1000 //RX_TDDRC_ALPHA_UP_0 +276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x199A //RX_TDDRC_HMNC_GAIN +279 0x0001 //RX_TDDRC_SMT_FLAG +280 0x0CCD //RX_TDDRC_SMT_W +281 0x0155 //RX_TDDRC_DRC_GAIN +195 0x0020 //RX_FDEQ_SUBNUM +196 0x4848 //RX_FDEQ_GAIN_0 +197 0x4848 //RX_FDEQ_GAIN_1 +198 0x4848 //RX_FDEQ_GAIN_2 +199 0x4848 //RX_FDEQ_GAIN_3 +200 0x4848 //RX_FDEQ_GAIN_4 +201 0x4848 //RX_FDEQ_GAIN_5 +202 0x4848 //RX_FDEQ_GAIN_6 +203 0x4848 //RX_FDEQ_GAIN_7 +204 0x4848 //RX_FDEQ_GAIN_8 +205 0x4848 //RX_FDEQ_GAIN_9 +206 0x4848 //RX_FDEQ_GAIN_10 +207 0x4848 //RX_FDEQ_GAIN_11 +208 0x4848 //RX_FDEQ_GAIN_12 +209 0x4848 //RX_FDEQ_GAIN_13 +210 0x4848 //RX_FDEQ_GAIN_14 +211 0x4848 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0202 //RX_FDEQ_BIN_0 +221 0x0203 //RX_FDEQ_BIN_1 +222 0x0304 //RX_FDEQ_BIN_2 +223 0x0405 //RX_FDEQ_BIN_3 +224 0x0607 //RX_FDEQ_BIN_4 +225 0x0809 //RX_FDEQ_BIN_5 +226 0x0A0B //RX_FDEQ_BIN_6 +227 0x0C0D //RX_FDEQ_BIN_7 +228 0x0E0F //RX_FDEQ_BIN_8 +229 0x1011 //RX_FDEQ_BIN_9 +230 0x1214 //RX_FDEQ_BIN_10 +231 0x1618 //RX_FDEQ_BIN_11 +232 0x1C1C //RX_FDEQ_BIN_12 +233 0x2020 //RX_FDEQ_BIN_13 +234 0x2020 //RX_FDEQ_BIN_14 +235 0x2011 //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x4000 //RX_FDEQ_RESRV_0 +245 0x0320 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0030 //RX_FDDRC_BAND_MARGIN_1 +248 0x0050 //RX_FDDRC_BAND_MARGIN_2 +249 0x0080 //RX_FDDRC_BAND_MARGIN_3 +250 0x0007 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x5000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x6400 //RX_FDDRC_THRD_3_2 +258 0x6400 //RX_FDDRC_THRD_3_3 +259 0x2000 //RX_FDDRC_SLANT_0_0 +260 0x2000 //RX_FDDRC_SLANT_0_1 +261 0x2000 //RX_FDDRC_SLANT_0_2 +262 0x2000 //RX_FDDRC_SLANT_0_3 +263 0x5333 //RX_FDDRC_SLANT_1_0 +264 0x5333 //RX_FDDRC_SLANT_1_1 +265 0x5333 //RX_FDDRC_SLANT_1_2 +266 0x5333 //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +286 0x0100 //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 +#VOL 2 +163 0x1000 //RX_TDDRC_ALPHA_UP_1 +164 0x1000 //RX_TDDRC_ALPHA_UP_2 +165 0x1000 //RX_TDDRC_ALPHA_UP_3 +166 0x1000 //RX_TDDRC_ALPHA_UP_4 +184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +190 0x7FFF //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +269 0x0000 //RX_TDDRC_THRD_0 +270 0x0000 //RX_TDDRC_THRD_1 +271 0x7FFF //RX_TDDRC_THRD_2 +272 0x7FFF //RX_TDDRC_THRD_3 +273 0x7FFF //RX_TDDRC_SLANT_0 +274 0x7FFF //RX_TDDRC_SLANT_1 +275 0x1000 //RX_TDDRC_ALPHA_UP_0 +276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x199A //RX_TDDRC_HMNC_GAIN +279 0x0001 //RX_TDDRC_SMT_FLAG +280 0x0CCD //RX_TDDRC_SMT_W +281 0x0155 //RX_TDDRC_DRC_GAIN +195 0x0020 //RX_FDEQ_SUBNUM +196 0x4848 //RX_FDEQ_GAIN_0 +197 0x4848 //RX_FDEQ_GAIN_1 +198 0x4848 //RX_FDEQ_GAIN_2 +199 0x4848 //RX_FDEQ_GAIN_3 +200 0x4848 //RX_FDEQ_GAIN_4 +201 0x4848 //RX_FDEQ_GAIN_5 +202 0x4848 //RX_FDEQ_GAIN_6 +203 0x4848 //RX_FDEQ_GAIN_7 +204 0x4848 //RX_FDEQ_GAIN_8 +205 0x4848 //RX_FDEQ_GAIN_9 +206 0x4848 //RX_FDEQ_GAIN_10 +207 0x4848 //RX_FDEQ_GAIN_11 +208 0x4848 //RX_FDEQ_GAIN_12 +209 0x4848 //RX_FDEQ_GAIN_13 +210 0x4848 //RX_FDEQ_GAIN_14 +211 0x4848 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0202 //RX_FDEQ_BIN_0 +221 0x0203 //RX_FDEQ_BIN_1 +222 0x0304 //RX_FDEQ_BIN_2 +223 0x0405 //RX_FDEQ_BIN_3 +224 0x0607 //RX_FDEQ_BIN_4 +225 0x0809 //RX_FDEQ_BIN_5 +226 0x0A0B //RX_FDEQ_BIN_6 +227 0x0C0D //RX_FDEQ_BIN_7 +228 0x0E0F //RX_FDEQ_BIN_8 +229 0x1011 //RX_FDEQ_BIN_9 +230 0x1214 //RX_FDEQ_BIN_10 +231 0x1618 //RX_FDEQ_BIN_11 +232 0x1C1C //RX_FDEQ_BIN_12 +233 0x2020 //RX_FDEQ_BIN_13 +234 0x2020 //RX_FDEQ_BIN_14 +235 0x2011 //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x4000 //RX_FDEQ_RESRV_0 +245 0x0320 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0030 //RX_FDDRC_BAND_MARGIN_1 +248 0x0050 //RX_FDDRC_BAND_MARGIN_2 +249 0x0080 //RX_FDDRC_BAND_MARGIN_3 +250 0x0007 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x5000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x6400 //RX_FDDRC_THRD_3_2 +258 0x6400 //RX_FDDRC_THRD_3_3 +259 0x2000 //RX_FDDRC_SLANT_0_0 +260 0x2000 //RX_FDDRC_SLANT_0_1 +261 0x2000 //RX_FDDRC_SLANT_0_2 +262 0x2000 //RX_FDDRC_SLANT_0_3 +263 0x5333 //RX_FDDRC_SLANT_1_0 +264 0x5333 //RX_FDDRC_SLANT_1_1 +265 0x5333 //RX_FDDRC_SLANT_1_2 +266 0x5333 //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +286 0x0100 //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 +#VOL 3 +163 0x1000 //RX_TDDRC_ALPHA_UP_1 +164 0x1000 //RX_TDDRC_ALPHA_UP_2 +165 0x1000 //RX_TDDRC_ALPHA_UP_3 +166 0x1000 //RX_TDDRC_ALPHA_UP_4 +184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +190 0x7FFF //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +269 0x0000 //RX_TDDRC_THRD_0 +270 0x0000 //RX_TDDRC_THRD_1 +271 0x7FFF //RX_TDDRC_THRD_2 +272 0x7FFF //RX_TDDRC_THRD_3 +273 0x7FFF //RX_TDDRC_SLANT_0 +274 0x7FFF //RX_TDDRC_SLANT_1 +275 0x1000 //RX_TDDRC_ALPHA_UP_0 +276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x199A //RX_TDDRC_HMNC_GAIN +279 0x0001 //RX_TDDRC_SMT_FLAG +280 0x0CCD //RX_TDDRC_SMT_W +281 0x0155 //RX_TDDRC_DRC_GAIN +195 0x0020 //RX_FDEQ_SUBNUM +196 0x4848 //RX_FDEQ_GAIN_0 +197 0x4848 //RX_FDEQ_GAIN_1 +198 0x4848 //RX_FDEQ_GAIN_2 +199 0x4848 //RX_FDEQ_GAIN_3 +200 0x4848 //RX_FDEQ_GAIN_4 +201 0x4848 //RX_FDEQ_GAIN_5 +202 0x4848 //RX_FDEQ_GAIN_6 +203 0x4848 //RX_FDEQ_GAIN_7 +204 0x4848 //RX_FDEQ_GAIN_8 +205 0x4848 //RX_FDEQ_GAIN_9 +206 0x4848 //RX_FDEQ_GAIN_10 +207 0x4848 //RX_FDEQ_GAIN_11 +208 0x4848 //RX_FDEQ_GAIN_12 +209 0x4848 //RX_FDEQ_GAIN_13 +210 0x4848 //RX_FDEQ_GAIN_14 +211 0x4848 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0202 //RX_FDEQ_BIN_0 +221 0x0203 //RX_FDEQ_BIN_1 +222 0x0304 //RX_FDEQ_BIN_2 +223 0x0405 //RX_FDEQ_BIN_3 +224 0x0607 //RX_FDEQ_BIN_4 +225 0x0809 //RX_FDEQ_BIN_5 +226 0x0A0B //RX_FDEQ_BIN_6 +227 0x0C0D //RX_FDEQ_BIN_7 +228 0x0E0F //RX_FDEQ_BIN_8 +229 0x1011 //RX_FDEQ_BIN_9 +230 0x1214 //RX_FDEQ_BIN_10 +231 0x1618 //RX_FDEQ_BIN_11 +232 0x1C1C //RX_FDEQ_BIN_12 +233 0x2020 //RX_FDEQ_BIN_13 +234 0x2020 //RX_FDEQ_BIN_14 +235 0x2011 //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x4000 //RX_FDEQ_RESRV_0 +245 0x0320 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0030 //RX_FDDRC_BAND_MARGIN_1 +248 0x0050 //RX_FDDRC_BAND_MARGIN_2 +249 0x0080 //RX_FDDRC_BAND_MARGIN_3 +250 0x0007 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x5000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x6400 //RX_FDDRC_THRD_3_2 +258 0x6400 //RX_FDDRC_THRD_3_3 +259 0x2000 //RX_FDDRC_SLANT_0_0 +260 0x2000 //RX_FDDRC_SLANT_0_1 +261 0x2000 //RX_FDDRC_SLANT_0_2 +262 0x2000 //RX_FDDRC_SLANT_0_3 +263 0x5333 //RX_FDDRC_SLANT_1_0 +264 0x5333 //RX_FDDRC_SLANT_1_1 +265 0x5333 //RX_FDDRC_SLANT_1_2 +266 0x5333 //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +286 0x0100 //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 +#VOL 4 +163 0x1000 //RX_TDDRC_ALPHA_UP_1 +164 0x1000 //RX_TDDRC_ALPHA_UP_2 +165 0x1000 //RX_TDDRC_ALPHA_UP_3 +166 0x1000 //RX_TDDRC_ALPHA_UP_4 +184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +190 0x7FFF //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +269 0x0000 //RX_TDDRC_THRD_0 +270 0x0000 //RX_TDDRC_THRD_1 +271 0x7FFF //RX_TDDRC_THRD_2 +272 0x7FFF //RX_TDDRC_THRD_3 +273 0x7FFF //RX_TDDRC_SLANT_0 +274 0x7FFF //RX_TDDRC_SLANT_1 +275 0x1000 //RX_TDDRC_ALPHA_UP_0 +276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x199A //RX_TDDRC_HMNC_GAIN +279 0x0001 //RX_TDDRC_SMT_FLAG +280 0x0CCD //RX_TDDRC_SMT_W +281 0x0155 //RX_TDDRC_DRC_GAIN +195 0x0020 //RX_FDEQ_SUBNUM +196 0x4848 //RX_FDEQ_GAIN_0 +197 0x4848 //RX_FDEQ_GAIN_1 +198 0x4848 //RX_FDEQ_GAIN_2 +199 0x4848 //RX_FDEQ_GAIN_3 +200 0x4848 //RX_FDEQ_GAIN_4 +201 0x4848 //RX_FDEQ_GAIN_5 +202 0x4848 //RX_FDEQ_GAIN_6 +203 0x4848 //RX_FDEQ_GAIN_7 +204 0x4848 //RX_FDEQ_GAIN_8 +205 0x4848 //RX_FDEQ_GAIN_9 +206 0x4848 //RX_FDEQ_GAIN_10 +207 0x4848 //RX_FDEQ_GAIN_11 +208 0x4848 //RX_FDEQ_GAIN_12 +209 0x4848 //RX_FDEQ_GAIN_13 +210 0x4848 //RX_FDEQ_GAIN_14 +211 0x4848 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0202 //RX_FDEQ_BIN_0 +221 0x0203 //RX_FDEQ_BIN_1 +222 0x0304 //RX_FDEQ_BIN_2 +223 0x0405 //RX_FDEQ_BIN_3 +224 0x0607 //RX_FDEQ_BIN_4 +225 0x0809 //RX_FDEQ_BIN_5 +226 0x0A0B //RX_FDEQ_BIN_6 +227 0x0C0D //RX_FDEQ_BIN_7 +228 0x0E0F //RX_FDEQ_BIN_8 +229 0x1011 //RX_FDEQ_BIN_9 +230 0x1214 //RX_FDEQ_BIN_10 +231 0x1618 //RX_FDEQ_BIN_11 +232 0x1C1C //RX_FDEQ_BIN_12 +233 0x2020 //RX_FDEQ_BIN_13 +234 0x2020 //RX_FDEQ_BIN_14 +235 0x2011 //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x4000 //RX_FDEQ_RESRV_0 +245 0x0320 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0030 //RX_FDDRC_BAND_MARGIN_1 +248 0x0050 //RX_FDDRC_BAND_MARGIN_2 +249 0x0080 //RX_FDDRC_BAND_MARGIN_3 +250 0x0007 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x5000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x6400 //RX_FDDRC_THRD_3_2 +258 0x6400 //RX_FDDRC_THRD_3_3 +259 0x2000 //RX_FDDRC_SLANT_0_0 +260 0x2000 //RX_FDDRC_SLANT_0_1 +261 0x2000 //RX_FDDRC_SLANT_0_2 +262 0x2000 //RX_FDDRC_SLANT_0_3 +263 0x5333 //RX_FDDRC_SLANT_1_0 +264 0x5333 //RX_FDDRC_SLANT_1_1 +265 0x5333 //RX_FDDRC_SLANT_1_2 +266 0x5333 //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +286 0x0100 //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 +#VOL 5 +163 0x1000 //RX_TDDRC_ALPHA_UP_1 +164 0x1000 //RX_TDDRC_ALPHA_UP_2 +165 0x1000 //RX_TDDRC_ALPHA_UP_3 +166 0x1000 //RX_TDDRC_ALPHA_UP_4 +184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +190 0x7FFF //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +269 0x0000 //RX_TDDRC_THRD_0 +270 0x0000 //RX_TDDRC_THRD_1 +271 0x7FFF //RX_TDDRC_THRD_2 +272 0x7FFF //RX_TDDRC_THRD_3 +273 0x7FFF //RX_TDDRC_SLANT_0 +274 0x7FFF //RX_TDDRC_SLANT_1 +275 0x1000 //RX_TDDRC_ALPHA_UP_0 +276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x199A //RX_TDDRC_HMNC_GAIN +279 0x0001 //RX_TDDRC_SMT_FLAG +280 0x0CCD //RX_TDDRC_SMT_W +281 0x0155 //RX_TDDRC_DRC_GAIN +195 0x0020 //RX_FDEQ_SUBNUM +196 0x4848 //RX_FDEQ_GAIN_0 +197 0x4848 //RX_FDEQ_GAIN_1 +198 0x4848 //RX_FDEQ_GAIN_2 +199 0x4848 //RX_FDEQ_GAIN_3 +200 0x4848 //RX_FDEQ_GAIN_4 +201 0x4848 //RX_FDEQ_GAIN_5 +202 0x4848 //RX_FDEQ_GAIN_6 +203 0x4848 //RX_FDEQ_GAIN_7 +204 0x4848 //RX_FDEQ_GAIN_8 +205 0x4848 //RX_FDEQ_GAIN_9 +206 0x4848 //RX_FDEQ_GAIN_10 +207 0x4848 //RX_FDEQ_GAIN_11 +208 0x4848 //RX_FDEQ_GAIN_12 +209 0x4848 //RX_FDEQ_GAIN_13 +210 0x4848 //RX_FDEQ_GAIN_14 +211 0x4848 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0202 //RX_FDEQ_BIN_0 +221 0x0203 //RX_FDEQ_BIN_1 +222 0x0304 //RX_FDEQ_BIN_2 +223 0x0405 //RX_FDEQ_BIN_3 +224 0x0607 //RX_FDEQ_BIN_4 +225 0x0809 //RX_FDEQ_BIN_5 +226 0x0A0B //RX_FDEQ_BIN_6 +227 0x0C0D //RX_FDEQ_BIN_7 +228 0x0E0F //RX_FDEQ_BIN_8 +229 0x1011 //RX_FDEQ_BIN_9 +230 0x1214 //RX_FDEQ_BIN_10 +231 0x1618 //RX_FDEQ_BIN_11 +232 0x1C1C //RX_FDEQ_BIN_12 +233 0x2020 //RX_FDEQ_BIN_13 +234 0x2020 //RX_FDEQ_BIN_14 +235 0x2011 //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x4000 //RX_FDEQ_RESRV_0 +245 0x0320 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0030 //RX_FDDRC_BAND_MARGIN_1 +248 0x0050 //RX_FDDRC_BAND_MARGIN_2 +249 0x0080 //RX_FDDRC_BAND_MARGIN_3 +250 0x0007 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x5000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x6400 //RX_FDDRC_THRD_3_2 +258 0x6400 //RX_FDDRC_THRD_3_3 +259 0x2000 //RX_FDDRC_SLANT_0_0 +260 0x2000 //RX_FDDRC_SLANT_0_1 +261 0x2000 //RX_FDDRC_SLANT_0_2 +262 0x2000 //RX_FDDRC_SLANT_0_3 +263 0x5333 //RX_FDDRC_SLANT_1_0 +264 0x5333 //RX_FDDRC_SLANT_1_1 +265 0x5333 //RX_FDDRC_SLANT_1_2 +266 0x5333 //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +286 0x0100 //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 +#VOL 6 +163 0x1000 //RX_TDDRC_ALPHA_UP_1 +164 0x1000 //RX_TDDRC_ALPHA_UP_2 +165 0x1000 //RX_TDDRC_ALPHA_UP_3 +166 0x1000 //RX_TDDRC_ALPHA_UP_4 +184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +190 0x7FFF //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +269 0x0000 //RX_TDDRC_THRD_0 +270 0x0000 //RX_TDDRC_THRD_1 +271 0x7FFF //RX_TDDRC_THRD_2 +272 0x7FFF //RX_TDDRC_THRD_3 +273 0x7FFF //RX_TDDRC_SLANT_0 +274 0x7FFF //RX_TDDRC_SLANT_1 +275 0x1000 //RX_TDDRC_ALPHA_UP_0 +276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x199A //RX_TDDRC_HMNC_GAIN +279 0x0001 //RX_TDDRC_SMT_FLAG +280 0x0CCD //RX_TDDRC_SMT_W +281 0x0155 //RX_TDDRC_DRC_GAIN +195 0x0020 //RX_FDEQ_SUBNUM +196 0x4848 //RX_FDEQ_GAIN_0 +197 0x4848 //RX_FDEQ_GAIN_1 +198 0x4848 //RX_FDEQ_GAIN_2 +199 0x4848 //RX_FDEQ_GAIN_3 +200 0x4848 //RX_FDEQ_GAIN_4 +201 0x4848 //RX_FDEQ_GAIN_5 +202 0x4848 //RX_FDEQ_GAIN_6 +203 0x4848 //RX_FDEQ_GAIN_7 +204 0x4848 //RX_FDEQ_GAIN_8 +205 0x4848 //RX_FDEQ_GAIN_9 +206 0x4848 //RX_FDEQ_GAIN_10 +207 0x4848 //RX_FDEQ_GAIN_11 +208 0x4848 //RX_FDEQ_GAIN_12 +209 0x4848 //RX_FDEQ_GAIN_13 +210 0x4848 //RX_FDEQ_GAIN_14 +211 0x4848 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0202 //RX_FDEQ_BIN_0 +221 0x0203 //RX_FDEQ_BIN_1 +222 0x0304 //RX_FDEQ_BIN_2 +223 0x0405 //RX_FDEQ_BIN_3 +224 0x0607 //RX_FDEQ_BIN_4 +225 0x0809 //RX_FDEQ_BIN_5 +226 0x0A0B //RX_FDEQ_BIN_6 +227 0x0C0D //RX_FDEQ_BIN_7 +228 0x0E0F //RX_FDEQ_BIN_8 +229 0x1011 //RX_FDEQ_BIN_9 +230 0x1214 //RX_FDEQ_BIN_10 +231 0x1618 //RX_FDEQ_BIN_11 +232 0x1C1C //RX_FDEQ_BIN_12 +233 0x2020 //RX_FDEQ_BIN_13 +234 0x2020 //RX_FDEQ_BIN_14 +235 0x2011 //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x4000 //RX_FDEQ_RESRV_0 +245 0x0320 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0030 //RX_FDDRC_BAND_MARGIN_1 +248 0x0050 //RX_FDDRC_BAND_MARGIN_2 +249 0x0080 //RX_FDDRC_BAND_MARGIN_3 +250 0x0007 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x5000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x6400 //RX_FDDRC_THRD_3_2 +258 0x6400 //RX_FDDRC_THRD_3_3 +259 0x2000 //RX_FDDRC_SLANT_0_0 +260 0x2000 //RX_FDDRC_SLANT_0_1 +261 0x2000 //RX_FDDRC_SLANT_0_2 +262 0x2000 //RX_FDDRC_SLANT_0_3 +263 0x5333 //RX_FDDRC_SLANT_1_0 +264 0x5333 //RX_FDDRC_SLANT_1_1 +265 0x5333 //RX_FDDRC_SLANT_1_2 +266 0x5333 //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +286 0x0100 //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 #CASE_NAME BLUETOOTH-BTWB_NREC-VOICE_GENERIC-NB -#PARAM_TYPE TX+RX -#TOTAL_CUSTOM_STEP 7 +#PARAM_MODE Full +#PARAM_TYPE TX+2RX +#TOTAL_CUSTOM_STEP 7+7 #TX 0 0x0008 //TX_OPERATION_MODE_0 1 0x0008 //TX_OPERATION_MODE_1 @@ -30059,20 +45649,20 @@ 248 0xF400 //TX_THR_SN_EST_6 249 0xF600 //TX_THR_SN_EST_7 250 0x0000 //TX_DELTA_THR_SN_EST_0 -251 0x0000 //TX_DELTA_THR_SN_EST_1 +251 0x0200 //TX_DELTA_THR_SN_EST_1 252 0x0200 //TX_DELTA_THR_SN_EST_2 253 0x0200 //TX_DELTA_THR_SN_EST_3 254 0x0200 //TX_DELTA_THR_SN_EST_4 255 0x0200 //TX_DELTA_THR_SN_EST_5 -256 0x0200 //TX_DELTA_THR_SN_EST_6 +256 0x0000 //TX_DELTA_THR_SN_EST_6 257 0x0200 //TX_DELTA_THR_SN_EST_7 258 0x6000 //TX_LAMBDA_NN_EST_0 -259 0x6000 //TX_LAMBDA_NN_EST_1 +259 0x4000 //TX_LAMBDA_NN_EST_1 260 0x4000 //TX_LAMBDA_NN_EST_2 261 0x4000 //TX_LAMBDA_NN_EST_3 262 0x4000 //TX_LAMBDA_NN_EST_4 263 0x4000 //TX_LAMBDA_NN_EST_5 -264 0x4000 //TX_LAMBDA_NN_EST_6 +264 0x6000 //TX_LAMBDA_NN_EST_6 265 0x4000 //TX_LAMBDA_NN_EST_7 266 0x0400 //TX_N_SN_EST 267 0x001E //TX_INBEAM_T @@ -30090,16 +45680,16 @@ 279 0x1000 //TX_B_POST_FLT_0 280 0x1000 //TX_B_POST_FLT_1 281 0x000F //TX_NS_LVL_CTRL_0 -282 0x000F //TX_NS_LVL_CTRL_1 -283 0x0011 //TX_NS_LVL_CTRL_2 +282 0x0011 //TX_NS_LVL_CTRL_1 +283 0x000F //TX_NS_LVL_CTRL_2 284 0x000F //TX_NS_LVL_CTRL_3 285 0x000F //TX_NS_LVL_CTRL_4 286 0x000F //TX_NS_LVL_CTRL_5 287 0x000F //TX_NS_LVL_CTRL_6 288 0x0011 //TX_NS_LVL_CTRL_7 289 0x000C //TX_MIN_GAIN_S_0 -290 0x000C //TX_MIN_GAIN_S_1 -291 0x000F //TX_MIN_GAIN_S_2 +290 0x000F //TX_MIN_GAIN_S_1 +291 0x000C //TX_MIN_GAIN_S_2 292 0x000C //TX_MIN_GAIN_S_3 293 0x000C //TX_MIN_GAIN_S_4 294 0x000C //TX_MIN_GAIN_S_5 @@ -30123,12 +45713,12 @@ 312 0x7FFF //TX_A_POST_FILT_0 313 0x2000 //TX_A_POST_FILT_1 314 0x4000 //TX_A_POST_FILT_S_0 -315 0x4000 //TX_A_POST_FILT_S_1 +315 0x5000 //TX_A_POST_FILT_S_1 316 0x5000 //TX_A_POST_FILT_S_2 317 0x5000 //TX_A_POST_FILT_S_3 318 0x5000 //TX_A_POST_FILT_S_4 319 0x5000 //TX_A_POST_FILT_S_5 -320 0x5000 //TX_A_POST_FILT_S_6 +320 0x4000 //TX_A_POST_FILT_S_6 321 0x5000 //TX_A_POST_FILT_S_7 322 0x1000 //TX_B_POST_FILT_0 323 0x1000 //TX_B_POST_FILT_1 @@ -30188,10 +45778,10 @@ 377 0x7FFF //TX_NOISE_TH_5_4 378 0x044C //TX_NOISE_TH_6 379 0x0014 //TX_MINENOISE_TH -380 0x4000 //TX_MINENOISE_MIC0_TH_MTS -381 0xFFEE //TX_MINENOISE_MIC0_TH_EXP -382 0x6000 //TX_MINENOISE_MIC0_S_TH_MTS -383 0xFFF3 //TX_MINENOISE_MIC0_S_TH_EXP +380 0x4000 //TX_MORENS_TFMASK_TH +381 0xFFEE //TX_DRC_QUIET_FLOOR +382 0x6000 //TX_RATIODTL_CUT_TH +383 0xFFF3 //TX_DT_CUT_K1 384 0x0666 //TX_OUT_ENER_S_TH_CLEAN 385 0x0666 //TX_OUT_ENER_S_TH_LESSCLEAN 386 0x0333 //TX_OUT_ENER_S_TH_NOISY @@ -30199,15 +45789,15 @@ 388 0x0333 //TX_OUT_ENER_TH_SPEECH 389 0x2000 //TX_SN_NPB_GAIN 390 0x0000 //TX_NN_NPB_GAIN -391 0x0000 //TX_CSX_ALPHA_0 -392 0x0000 //TX_CSX_ALPHA_1 -393 0x0000 //TX_CSX_ALPHA_2 -394 0x0000 //TX_CSX_ALPHA_3 -395 0x0800 //TX_MU_ARSP_EST -396 0x00C8 //TX_P_OUTBEAM_MIN_TH +391 0x0000 //TX_POST_MASK_SUP_HSNE +392 0x0000 //TX_TAIL_DET_TH +393 0x0000 //TX_B_LESSCUT_RTO_WTA +394 0x0000 //TX_MEL_G_R +395 0x0800 //TX_SUPHIGH_TH +396 0x00C8 //TX_MASK_G_R 397 0x0002 //TX_EXTRA_NS_L -398 0x0800 //TX_EXTRA_NS_A -399 0x0005 //TX_VR_NOISE_FLOOR_TH +398 0x0800 //TX_C_POST_FLT_MASK +399 0x0005 //TX_A_POST_FLT_WNS 400 0x0148 //TX_MIN_G_LOW300HZ 401 0x0002 //TX_MAXLEVEL_CNG 402 0x00B4 //TX_STN_NOISE_TH @@ -30322,16 +45912,16 @@ 511 0x6666 //TX_MIC_TO_BFGAIN 512 0x0000 //TX_MICTOBFGAIN0 513 0x0000 //TX_FASTMUE_TH -514 0x0000 //TX_DERVB_LEN_0 -515 0x0000 //TX_DERVB_LEN_1 -516 0x0000 //TX_RHO_DERVB -517 0x0000 //TX_MIC_INDX_DERVB -518 0x0000 //TX_MU_DERVB -519 0x0000 //TX_DR_RESRV_0 -520 0x0000 //TX_DR_RESRV_1 -521 0x0000 //TX_DR_RESRV_2 -522 0x0000 //TX_DR_RESRV_3 -523 0x0000 //TX_DR_RESRV_4 +514 0x0000 //TX_DEREVERB_LF_MU +515 0x0000 //TX_DEREVERB_HF_MU +516 0x0000 //TX_DEREVERB_DELAY +517 0x0000 //TX_DEREVERB_COEF_LEN +518 0x0000 //TX_DEREVERB_DNR +519 0x0000 //TX_DEREVERB_ALPHA +520 0x0000 //TX_DEREVERB_BETA +521 0x0000 //TX_GSC_RTOL_TH +522 0x0000 //TX_GSC_RTOH_TH +523 0x0000 //TX_WIDE2_MEANHTH 524 0x0000 //TX_DR_RESRV_5 525 0x0000 //TX_DR_RESRV_6 526 0x0000 //TX_DR_RESRV_7 @@ -30705,8 +46295,73 @@ 894 0xC000 //TX_FASTNS_SSA_THHFL 895 0xCCCC //TX_FASTNS_SSA_THLFH 896 0xD999 //TX_FASTNS_SSA_THHFH +897 0x0000 //TX_SENDFUNC_REG_MICMUTE +898 0x0000 //TX_SENDFUNC_REG_MICMUTE1 +899 0x0000 //TX_MICMUTE_RATIO_THR +900 0x0000 //TX_MICMUTE_AMP_THR +901 0x0000 //TX_MICMUTE_HPF_IND +902 0x0000 //TX_MICMUTE_LOG_EYR_TH +903 0x0000 //TX_MICMUTE_CVG_TIME +904 0x0000 //TX_MICMUTE_RELEASE_TIME +905 0x0000 //TX_MIC_VOLUME_MIC0MUTE +906 0x0000 //TX_MICMUTE_EPD_OFFSET_0 +907 0x0000 //TX_MICMUTE_FRQ_AEC_L +908 0x0000 //TX_MICMUTE_EAD_THR +909 0x0000 //TX_MICMUTE_LAMBDA_CB_NLE +910 0x0000 //TX_MICMUTE_LAMBDA_RE_EST +911 0x0000 //TX_DTD_THR1_MICMUTE_0 +912 0x0000 //TX_DTD_THR1_MICMUTE_1 +913 0x0000 //TX_DTD_THR1_MICMUTE_2 +914 0x0000 //TX_DTD_THR1_MICMUTE_3 +915 0x0000 //TX_DTD_THR2_MICMUTE_0 +916 0x0000 //TX_MICMUTE_MIN_EQ_RE_EST_0 +917 0x0000 //TX_MICMUTE_MIN_EQ_RE_EST_1 +918 0x0000 //TX_MICMUTE_MIN_EQ_RE_EST_2 +919 0x0000 //TX_MICMUTE_MIN_EQ_RE_EST_3 +920 0x0000 //TX_MICMUTE_MIN_EQ_RE_EST_4 +921 0x0000 //TX_MICMUTE_C_POST_FLT +922 0x0000 //TX_MICMUTE_DT_CUT_K +923 0x0000 //TX_MICMUTE_DT_CUT_THR +924 0x0000 //TX_MICMUTE_DT_CUT_K2 +925 0x0000 //TX_MICMUTE_DT_CUT_THR2 +926 0x0000 //TX_MICMUTE_DT2_HOLD_N +927 0x0000 //TX_MICMUTE_RATIODTH_THCUT +928 0x0000 //TX_MICMUTE_B_POST_FLT_ECHOL +929 0x0000 //TX_MICMUTE_B_POST_FLT_ECHOH +930 0x0000 //TX_MICMUTE_C_POST_FLT_MASK +931 0x0000 //TX_MICMUTE_RATIODTL_CUT_TH +932 0x0000 //TX_MICMUTE_DT_CUT_K1 +933 0x0000 //TX_MICMUTE_N2_SN_EST +934 0x0000 //TX_MICMUTE_THR_SN_EST_0 +935 0x0000 //TX_MICMUTE_MIN_G_CTRL_0 +936 0x0000 //TX_MICMUTE_A_POST_FILT_S_0 +937 0x0000 //TX_MICMUTE_B_POST_FILT_0 +938 0x0000 //TX_MIC1RUB_AMP_THR +939 0x0000 //TX_MIC1MUTE_RATIO_THR +940 0x0000 //TX_MIC1MUTE_AMP_THR +941 0x0000 //TX_MIC1MUTE_CVG_TIME +942 0x0000 //TX_MIC1MUTE_RELEASE_TIME +943 0x0000 //TX_AMS_RESRV_01 +944 0x0000 //TX_AMS_RESRV_02 +945 0x0000 //TX_AMS_RESRV_03 +946 0x0000 //TX_AMS_RESRV_04 +947 0x0000 //TX_AMS_RESRV_05 +948 0x0000 //TX_AMS_RESRV_06 +949 0x0000 //TX_AMS_RESRV_07 +950 0x0000 //TX_AMS_RESRV_08 +951 0x0000 //TX_AMS_RESRV_09 +952 0x0000 //TX_AMS_RESRV_10 +953 0x0000 //TX_AMS_RESRV_11 +954 0x0000 //TX_AMS_RESRV_12 +955 0x0000 //TX_AMS_RESRV_13 +956 0x0000 //TX_AMS_RESRV_14 +957 0x0000 //TX_AMS_RESRV_15 +958 0x0000 //TX_AMS_RESRV_16 +959 0x0000 //TX_AMS_RESRV_17 +960 0x0000 //TX_AMS_RESRV_18 +961 0x0000 //TX_AMS_RESRV_19 #RX -0 0x006C //RX_RECVFUNC_MODE_0 +0 0x206C //RX_RECVFUNC_MODE_0 1 0x0000 //RX_RECVFUNC_MODE_1 2 0x0000 //RX_SAMPLINGFREQ_SIG 3 0x0000 //RX_SAMPLINGFREQ_PROC @@ -31556,10 +47211,862 @@ 110 0x0000 //RX_FDDRC_RESRV_0 129 0x0100 //RX_SPK_VOL 130 0x0000 //RX_VOL_RESRV_0 +#RX 2 +157 0x206C //RX_RECVFUNC_MODE_0 +158 0x0000 //RX_RECVFUNC_MODE_1 +159 0x0000 //RX_SAMPLINGFREQ_SIG +160 0x0000 //RX_SAMPLINGFREQ_PROC +161 0x000A //RX_FRAME_SZ +162 0x0000 //RX_DELAY_OPT +163 0x3000 //RX_TDDRC_ALPHA_UP_1 +164 0x3000 //RX_TDDRC_ALPHA_UP_2 +165 0x3000 //RX_TDDRC_ALPHA_UP_3 +166 0x3000 //RX_TDDRC_ALPHA_UP_4 +167 0x0800 //RX_PGA +168 0x7FFF //RX_A_HP +169 0x0000 //RX_B_PE +170 0x3800 //RX_THR_PITCH_DET_0 +171 0x3000 //RX_THR_PITCH_DET_1 +172 0x2800 //RX_THR_PITCH_DET_2 +173 0x0008 //RX_PITCH_BFR_LEN +174 0x0003 //RX_SBD_PITCH_DET +175 0x0100 //RX_PP_RESRV_0 +176 0x0020 //RX_PP_RESRV_1 +177 0x0600 //RX_N_SN_EST +178 0x000C //RX_N2_SN_EST +179 0x0010 //RX_NS_LVL_CTRL +180 0xF800 //RX_THR_SN_EST +181 0x7CCD //RX_LAMBDA_PFILT +182 0x000A //RX_FENS_RESRV_0 +183 0x0190 //RX_FENS_RESRV_1 +184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +187 0x0002 //RX_EXTRA_NS_L +188 0x0800 //RX_EXTRA_NS_A +189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +190 0x7FFF //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +192 0x199A //RX_A_POST_FLT +193 0x0000 //RX_LMT_THRD +194 0x4000 //RX_LMT_ALPHA +195 0x0014 //RX_FDEQ_SUBNUM +196 0x4848 //RX_FDEQ_GAIN_0 +197 0x4848 //RX_FDEQ_GAIN_1 +198 0x4848 //RX_FDEQ_GAIN_2 +199 0x4848 //RX_FDEQ_GAIN_3 +200 0x4848 //RX_FDEQ_GAIN_4 +201 0x4848 //RX_FDEQ_GAIN_5 +202 0x4444 //RX_FDEQ_GAIN_6 +203 0x4040 //RX_FDEQ_GAIN_7 +204 0x4040 //RX_FDEQ_GAIN_8 +205 0x4040 //RX_FDEQ_GAIN_9 +206 0x4848 //RX_FDEQ_GAIN_10 +207 0x4848 //RX_FDEQ_GAIN_11 +208 0x4848 //RX_FDEQ_GAIN_12 +209 0x4848 //RX_FDEQ_GAIN_13 +210 0x4848 //RX_FDEQ_GAIN_14 +211 0x4848 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0202 //RX_FDEQ_BIN_0 +221 0x0203 //RX_FDEQ_BIN_1 +222 0x0303 //RX_FDEQ_BIN_2 +223 0x0304 //RX_FDEQ_BIN_3 +224 0x0405 //RX_FDEQ_BIN_4 +225 0x0506 //RX_FDEQ_BIN_5 +226 0x0708 //RX_FDEQ_BIN_6 +227 0x090A //RX_FDEQ_BIN_7 +228 0x0B0C //RX_FDEQ_BIN_8 +229 0x0D0E //RX_FDEQ_BIN_9 +230 0x0000 //RX_FDEQ_BIN_10 +231 0x0000 //RX_FDEQ_BIN_11 +232 0x0000 //RX_FDEQ_BIN_12 +233 0x0000 //RX_FDEQ_BIN_13 +234 0x0000 //RX_FDEQ_BIN_14 +235 0x0000 //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x4000 //RX_FDEQ_RESRV_0 +245 0x0320 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0030 //RX_FDDRC_BAND_MARGIN_1 +248 0x0050 //RX_FDDRC_BAND_MARGIN_2 +249 0x0080 //RX_FDDRC_BAND_MARGIN_3 +250 0x0007 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x5000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x6400 //RX_FDDRC_THRD_3_2 +258 0x6400 //RX_FDDRC_THRD_3_3 +259 0x2000 //RX_FDDRC_SLANT_0_0 +260 0x2000 //RX_FDDRC_SLANT_0_1 +261 0x2000 //RX_FDDRC_SLANT_0_2 +262 0x2000 //RX_FDDRC_SLANT_0_3 +263 0x5333 //RX_FDDRC_SLANT_1_0 +264 0x5333 //RX_FDDRC_SLANT_1_1 +265 0x5333 //RX_FDDRC_SLANT_1_2 +266 0x5333 //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +268 0x0000 //RX_FILTINDX +269 0x0000 //RX_TDDRC_THRD_0 +270 0x0000 //RX_TDDRC_THRD_1 +271 0x7FFF //RX_TDDRC_THRD_2 +272 0x7FFF //RX_TDDRC_THRD_3 +273 0x7FFF //RX_TDDRC_SLANT_0 +274 0x7EB8 //RX_TDDRC_SLANT_1 +275 0x3000 //RX_TDDRC_ALPHA_UP_0 +276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x199A //RX_TDDRC_HMNC_GAIN +279 0x0001 //RX_TDDRC_SMT_FLAG +280 0x0CCD //RX_TDDRC_SMT_W +281 0x017F //RX_TDDRC_DRC_GAIN +282 0x7C00 //RX_LAMBDA_PKA_FP +283 0x2000 //RX_TPKA_FP +284 0x2000 //RX_MIN_G_FP +285 0x0080 //RX_MAX_G_FP +286 0x0100 //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 +288 0x0000 //RX_MAXLEVEL_CNG +289 0x3000 //RX_BWE_UV_TH +290 0x3000 //RX_BWE_UV_TH2 +291 0x1800 //RX_BWE_UV_TH3 +292 0x1000 //RX_BWE_V_TH +293 0x04CD //RX_BWE_GAIN1_V_TH1 +294 0x0F33 //RX_BWE_GAIN1_V_TH2 +295 0x7333 //RX_BWE_UV_EQ +296 0x199A //RX_BWE_V_EQ +297 0x7333 //RX_BWE_TONE_TH +298 0x0004 //RX_BWE_UV_HOLD_T +299 0x6CCD //RX_BWE_GAIN2_ALPHA +300 0x799A //RX_BWE_GAIN3_ALPHA +301 0x001E //RX_BWE_CUTOFF +302 0x3000 //RX_BWE_GAINFILL +303 0x3200 //RX_BWE_MAXTH_TONE +304 0x2000 //RX_BWE_EQ_0 +305 0x2000 //RX_BWE_EQ_1 +306 0x2000 //RX_BWE_EQ_2 +307 0x2000 //RX_BWE_EQ_3 +308 0x2000 //RX_BWE_EQ_4 +309 0x2000 //RX_BWE_EQ_5 +310 0x2000 //RX_BWE_EQ_6 +311 0x0000 //RX_BWE_RESRV_0 +312 0x0000 //RX_BWE_RESRV_1 +313 0x0000 //RX_BWE_RESRV_2 +#VOL 0 +163 0x3000 //RX_TDDRC_ALPHA_UP_1 +164 0x3000 //RX_TDDRC_ALPHA_UP_2 +165 0x3000 //RX_TDDRC_ALPHA_UP_3 +166 0x3000 //RX_TDDRC_ALPHA_UP_4 +184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +190 0x7FFF //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +269 0x0000 //RX_TDDRC_THRD_0 +270 0x0000 //RX_TDDRC_THRD_1 +271 0x7FFF //RX_TDDRC_THRD_2 +272 0x7FFF //RX_TDDRC_THRD_3 +273 0x7FFF //RX_TDDRC_SLANT_0 +274 0x7EB8 //RX_TDDRC_SLANT_1 +275 0x3000 //RX_TDDRC_ALPHA_UP_0 +276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x199A //RX_TDDRC_HMNC_GAIN +279 0x0001 //RX_TDDRC_SMT_FLAG +280 0x0CCD //RX_TDDRC_SMT_W +281 0x017F //RX_TDDRC_DRC_GAIN +195 0x0014 //RX_FDEQ_SUBNUM +196 0x4848 //RX_FDEQ_GAIN_0 +197 0x4848 //RX_FDEQ_GAIN_1 +198 0x4848 //RX_FDEQ_GAIN_2 +199 0x4848 //RX_FDEQ_GAIN_3 +200 0x4848 //RX_FDEQ_GAIN_4 +201 0x4848 //RX_FDEQ_GAIN_5 +202 0x4444 //RX_FDEQ_GAIN_6 +203 0x4040 //RX_FDEQ_GAIN_7 +204 0x4040 //RX_FDEQ_GAIN_8 +205 0x4040 //RX_FDEQ_GAIN_9 +206 0x4848 //RX_FDEQ_GAIN_10 +207 0x4848 //RX_FDEQ_GAIN_11 +208 0x4848 //RX_FDEQ_GAIN_12 +209 0x4848 //RX_FDEQ_GAIN_13 +210 0x4848 //RX_FDEQ_GAIN_14 +211 0x4848 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0202 //RX_FDEQ_BIN_0 +221 0x0203 //RX_FDEQ_BIN_1 +222 0x0303 //RX_FDEQ_BIN_2 +223 0x0304 //RX_FDEQ_BIN_3 +224 0x0405 //RX_FDEQ_BIN_4 +225 0x0506 //RX_FDEQ_BIN_5 +226 0x0708 //RX_FDEQ_BIN_6 +227 0x090A //RX_FDEQ_BIN_7 +228 0x0B0C //RX_FDEQ_BIN_8 +229 0x0D0E //RX_FDEQ_BIN_9 +230 0x0000 //RX_FDEQ_BIN_10 +231 0x0000 //RX_FDEQ_BIN_11 +232 0x0000 //RX_FDEQ_BIN_12 +233 0x0000 //RX_FDEQ_BIN_13 +234 0x0000 //RX_FDEQ_BIN_14 +235 0x0000 //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x4000 //RX_FDEQ_RESRV_0 +245 0x0320 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0030 //RX_FDDRC_BAND_MARGIN_1 +248 0x0050 //RX_FDDRC_BAND_MARGIN_2 +249 0x0080 //RX_FDDRC_BAND_MARGIN_3 +250 0x0007 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x5000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x6400 //RX_FDDRC_THRD_3_2 +258 0x6400 //RX_FDDRC_THRD_3_3 +259 0x2000 //RX_FDDRC_SLANT_0_0 +260 0x2000 //RX_FDDRC_SLANT_0_1 +261 0x2000 //RX_FDDRC_SLANT_0_2 +262 0x2000 //RX_FDDRC_SLANT_0_3 +263 0x5333 //RX_FDDRC_SLANT_1_0 +264 0x5333 //RX_FDDRC_SLANT_1_1 +265 0x5333 //RX_FDDRC_SLANT_1_2 +266 0x5333 //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +286 0x0100 //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 +#VOL 1 +163 0x3000 //RX_TDDRC_ALPHA_UP_1 +164 0x3000 //RX_TDDRC_ALPHA_UP_2 +165 0x3000 //RX_TDDRC_ALPHA_UP_3 +166 0x3000 //RX_TDDRC_ALPHA_UP_4 +184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +190 0x7FFF //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +269 0x0000 //RX_TDDRC_THRD_0 +270 0x0000 //RX_TDDRC_THRD_1 +271 0x7FFF //RX_TDDRC_THRD_2 +272 0x7FFF //RX_TDDRC_THRD_3 +273 0x7FFF //RX_TDDRC_SLANT_0 +274 0x7EB8 //RX_TDDRC_SLANT_1 +275 0x3000 //RX_TDDRC_ALPHA_UP_0 +276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x199A //RX_TDDRC_HMNC_GAIN +279 0x0001 //RX_TDDRC_SMT_FLAG +280 0x0CCD //RX_TDDRC_SMT_W +281 0x017F //RX_TDDRC_DRC_GAIN +195 0x0014 //RX_FDEQ_SUBNUM +196 0x4848 //RX_FDEQ_GAIN_0 +197 0x4848 //RX_FDEQ_GAIN_1 +198 0x4848 //RX_FDEQ_GAIN_2 +199 0x4848 //RX_FDEQ_GAIN_3 +200 0x4848 //RX_FDEQ_GAIN_4 +201 0x4848 //RX_FDEQ_GAIN_5 +202 0x4444 //RX_FDEQ_GAIN_6 +203 0x4040 //RX_FDEQ_GAIN_7 +204 0x4040 //RX_FDEQ_GAIN_8 +205 0x4040 //RX_FDEQ_GAIN_9 +206 0x4848 //RX_FDEQ_GAIN_10 +207 0x4848 //RX_FDEQ_GAIN_11 +208 0x4848 //RX_FDEQ_GAIN_12 +209 0x4848 //RX_FDEQ_GAIN_13 +210 0x4848 //RX_FDEQ_GAIN_14 +211 0x4848 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0202 //RX_FDEQ_BIN_0 +221 0x0203 //RX_FDEQ_BIN_1 +222 0x0303 //RX_FDEQ_BIN_2 +223 0x0304 //RX_FDEQ_BIN_3 +224 0x0405 //RX_FDEQ_BIN_4 +225 0x0506 //RX_FDEQ_BIN_5 +226 0x0708 //RX_FDEQ_BIN_6 +227 0x090A //RX_FDEQ_BIN_7 +228 0x0B0C //RX_FDEQ_BIN_8 +229 0x0D0E //RX_FDEQ_BIN_9 +230 0x0000 //RX_FDEQ_BIN_10 +231 0x0000 //RX_FDEQ_BIN_11 +232 0x0000 //RX_FDEQ_BIN_12 +233 0x0000 //RX_FDEQ_BIN_13 +234 0x0000 //RX_FDEQ_BIN_14 +235 0x0000 //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x4000 //RX_FDEQ_RESRV_0 +245 0x0320 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0030 //RX_FDDRC_BAND_MARGIN_1 +248 0x0050 //RX_FDDRC_BAND_MARGIN_2 +249 0x0080 //RX_FDDRC_BAND_MARGIN_3 +250 0x0007 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x5000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x6400 //RX_FDDRC_THRD_3_2 +258 0x6400 //RX_FDDRC_THRD_3_3 +259 0x2000 //RX_FDDRC_SLANT_0_0 +260 0x2000 //RX_FDDRC_SLANT_0_1 +261 0x2000 //RX_FDDRC_SLANT_0_2 +262 0x2000 //RX_FDDRC_SLANT_0_3 +263 0x5333 //RX_FDDRC_SLANT_1_0 +264 0x5333 //RX_FDDRC_SLANT_1_1 +265 0x5333 //RX_FDDRC_SLANT_1_2 +266 0x5333 //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +286 0x0100 //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 +#VOL 2 +163 0x3000 //RX_TDDRC_ALPHA_UP_1 +164 0x3000 //RX_TDDRC_ALPHA_UP_2 +165 0x3000 //RX_TDDRC_ALPHA_UP_3 +166 0x3000 //RX_TDDRC_ALPHA_UP_4 +184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +190 0x7FFF //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +269 0x0000 //RX_TDDRC_THRD_0 +270 0x0000 //RX_TDDRC_THRD_1 +271 0x7FFF //RX_TDDRC_THRD_2 +272 0x7FFF //RX_TDDRC_THRD_3 +273 0x7FFF //RX_TDDRC_SLANT_0 +274 0x7EB8 //RX_TDDRC_SLANT_1 +275 0x3000 //RX_TDDRC_ALPHA_UP_0 +276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x199A //RX_TDDRC_HMNC_GAIN +279 0x0001 //RX_TDDRC_SMT_FLAG +280 0x0CCD //RX_TDDRC_SMT_W +281 0x017F //RX_TDDRC_DRC_GAIN +195 0x0014 //RX_FDEQ_SUBNUM +196 0x4848 //RX_FDEQ_GAIN_0 +197 0x4848 //RX_FDEQ_GAIN_1 +198 0x4848 //RX_FDEQ_GAIN_2 +199 0x4848 //RX_FDEQ_GAIN_3 +200 0x4848 //RX_FDEQ_GAIN_4 +201 0x4848 //RX_FDEQ_GAIN_5 +202 0x4444 //RX_FDEQ_GAIN_6 +203 0x4040 //RX_FDEQ_GAIN_7 +204 0x4040 //RX_FDEQ_GAIN_8 +205 0x4040 //RX_FDEQ_GAIN_9 +206 0x4848 //RX_FDEQ_GAIN_10 +207 0x4848 //RX_FDEQ_GAIN_11 +208 0x4848 //RX_FDEQ_GAIN_12 +209 0x4848 //RX_FDEQ_GAIN_13 +210 0x4848 //RX_FDEQ_GAIN_14 +211 0x4848 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0202 //RX_FDEQ_BIN_0 +221 0x0203 //RX_FDEQ_BIN_1 +222 0x0303 //RX_FDEQ_BIN_2 +223 0x0304 //RX_FDEQ_BIN_3 +224 0x0405 //RX_FDEQ_BIN_4 +225 0x0506 //RX_FDEQ_BIN_5 +226 0x0708 //RX_FDEQ_BIN_6 +227 0x090A //RX_FDEQ_BIN_7 +228 0x0B0C //RX_FDEQ_BIN_8 +229 0x0D0E //RX_FDEQ_BIN_9 +230 0x0000 //RX_FDEQ_BIN_10 +231 0x0000 //RX_FDEQ_BIN_11 +232 0x0000 //RX_FDEQ_BIN_12 +233 0x0000 //RX_FDEQ_BIN_13 +234 0x0000 //RX_FDEQ_BIN_14 +235 0x0000 //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x4000 //RX_FDEQ_RESRV_0 +245 0x0320 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0030 //RX_FDDRC_BAND_MARGIN_1 +248 0x0050 //RX_FDDRC_BAND_MARGIN_2 +249 0x0080 //RX_FDDRC_BAND_MARGIN_3 +250 0x0007 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x5000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x6400 //RX_FDDRC_THRD_3_2 +258 0x6400 //RX_FDDRC_THRD_3_3 +259 0x2000 //RX_FDDRC_SLANT_0_0 +260 0x2000 //RX_FDDRC_SLANT_0_1 +261 0x2000 //RX_FDDRC_SLANT_0_2 +262 0x2000 //RX_FDDRC_SLANT_0_3 +263 0x5333 //RX_FDDRC_SLANT_1_0 +264 0x5333 //RX_FDDRC_SLANT_1_1 +265 0x5333 //RX_FDDRC_SLANT_1_2 +266 0x5333 //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +286 0x0100 //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 +#VOL 3 +163 0x3000 //RX_TDDRC_ALPHA_UP_1 +164 0x3000 //RX_TDDRC_ALPHA_UP_2 +165 0x3000 //RX_TDDRC_ALPHA_UP_3 +166 0x3000 //RX_TDDRC_ALPHA_UP_4 +184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +190 0x7FFF //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +269 0x0000 //RX_TDDRC_THRD_0 +270 0x0000 //RX_TDDRC_THRD_1 +271 0x7FFF //RX_TDDRC_THRD_2 +272 0x7FFF //RX_TDDRC_THRD_3 +273 0x7FFF //RX_TDDRC_SLANT_0 +274 0x7EB8 //RX_TDDRC_SLANT_1 +275 0x3000 //RX_TDDRC_ALPHA_UP_0 +276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x199A //RX_TDDRC_HMNC_GAIN +279 0x0001 //RX_TDDRC_SMT_FLAG +280 0x0CCD //RX_TDDRC_SMT_W +281 0x017F //RX_TDDRC_DRC_GAIN +195 0x0014 //RX_FDEQ_SUBNUM +196 0x4848 //RX_FDEQ_GAIN_0 +197 0x4848 //RX_FDEQ_GAIN_1 +198 0x4848 //RX_FDEQ_GAIN_2 +199 0x4848 //RX_FDEQ_GAIN_3 +200 0x4848 //RX_FDEQ_GAIN_4 +201 0x4848 //RX_FDEQ_GAIN_5 +202 0x4444 //RX_FDEQ_GAIN_6 +203 0x4040 //RX_FDEQ_GAIN_7 +204 0x4040 //RX_FDEQ_GAIN_8 +205 0x4040 //RX_FDEQ_GAIN_9 +206 0x4848 //RX_FDEQ_GAIN_10 +207 0x4848 //RX_FDEQ_GAIN_11 +208 0x4848 //RX_FDEQ_GAIN_12 +209 0x4848 //RX_FDEQ_GAIN_13 +210 0x4848 //RX_FDEQ_GAIN_14 +211 0x4848 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0202 //RX_FDEQ_BIN_0 +221 0x0203 //RX_FDEQ_BIN_1 +222 0x0303 //RX_FDEQ_BIN_2 +223 0x0304 //RX_FDEQ_BIN_3 +224 0x0405 //RX_FDEQ_BIN_4 +225 0x0506 //RX_FDEQ_BIN_5 +226 0x0708 //RX_FDEQ_BIN_6 +227 0x090A //RX_FDEQ_BIN_7 +228 0x0B0C //RX_FDEQ_BIN_8 +229 0x0D0E //RX_FDEQ_BIN_9 +230 0x0000 //RX_FDEQ_BIN_10 +231 0x0000 //RX_FDEQ_BIN_11 +232 0x0000 //RX_FDEQ_BIN_12 +233 0x0000 //RX_FDEQ_BIN_13 +234 0x0000 //RX_FDEQ_BIN_14 +235 0x0000 //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x4000 //RX_FDEQ_RESRV_0 +245 0x0320 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0030 //RX_FDDRC_BAND_MARGIN_1 +248 0x0050 //RX_FDDRC_BAND_MARGIN_2 +249 0x0080 //RX_FDDRC_BAND_MARGIN_3 +250 0x0007 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x5000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x6400 //RX_FDDRC_THRD_3_2 +258 0x6400 //RX_FDDRC_THRD_3_3 +259 0x2000 //RX_FDDRC_SLANT_0_0 +260 0x2000 //RX_FDDRC_SLANT_0_1 +261 0x2000 //RX_FDDRC_SLANT_0_2 +262 0x2000 //RX_FDDRC_SLANT_0_3 +263 0x5333 //RX_FDDRC_SLANT_1_0 +264 0x5333 //RX_FDDRC_SLANT_1_1 +265 0x5333 //RX_FDDRC_SLANT_1_2 +266 0x5333 //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +286 0x0100 //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 +#VOL 4 +163 0x3000 //RX_TDDRC_ALPHA_UP_1 +164 0x3000 //RX_TDDRC_ALPHA_UP_2 +165 0x3000 //RX_TDDRC_ALPHA_UP_3 +166 0x3000 //RX_TDDRC_ALPHA_UP_4 +184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +190 0x7FFF //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +269 0x0000 //RX_TDDRC_THRD_0 +270 0x0000 //RX_TDDRC_THRD_1 +271 0x7FFF //RX_TDDRC_THRD_2 +272 0x7FFF //RX_TDDRC_THRD_3 +273 0x7FFF //RX_TDDRC_SLANT_0 +274 0x7EB8 //RX_TDDRC_SLANT_1 +275 0x3000 //RX_TDDRC_ALPHA_UP_0 +276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x199A //RX_TDDRC_HMNC_GAIN +279 0x0001 //RX_TDDRC_SMT_FLAG +280 0x0CCD //RX_TDDRC_SMT_W +281 0x017F //RX_TDDRC_DRC_GAIN +195 0x0014 //RX_FDEQ_SUBNUM +196 0x4848 //RX_FDEQ_GAIN_0 +197 0x4848 //RX_FDEQ_GAIN_1 +198 0x4848 //RX_FDEQ_GAIN_2 +199 0x4848 //RX_FDEQ_GAIN_3 +200 0x4848 //RX_FDEQ_GAIN_4 +201 0x4848 //RX_FDEQ_GAIN_5 +202 0x4444 //RX_FDEQ_GAIN_6 +203 0x4040 //RX_FDEQ_GAIN_7 +204 0x4040 //RX_FDEQ_GAIN_8 +205 0x4040 //RX_FDEQ_GAIN_9 +206 0x4848 //RX_FDEQ_GAIN_10 +207 0x4848 //RX_FDEQ_GAIN_11 +208 0x4848 //RX_FDEQ_GAIN_12 +209 0x4848 //RX_FDEQ_GAIN_13 +210 0x4848 //RX_FDEQ_GAIN_14 +211 0x4848 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0202 //RX_FDEQ_BIN_0 +221 0x0203 //RX_FDEQ_BIN_1 +222 0x0303 //RX_FDEQ_BIN_2 +223 0x0304 //RX_FDEQ_BIN_3 +224 0x0405 //RX_FDEQ_BIN_4 +225 0x0506 //RX_FDEQ_BIN_5 +226 0x0708 //RX_FDEQ_BIN_6 +227 0x090A //RX_FDEQ_BIN_7 +228 0x0B0C //RX_FDEQ_BIN_8 +229 0x0D0E //RX_FDEQ_BIN_9 +230 0x0000 //RX_FDEQ_BIN_10 +231 0x0000 //RX_FDEQ_BIN_11 +232 0x0000 //RX_FDEQ_BIN_12 +233 0x0000 //RX_FDEQ_BIN_13 +234 0x0000 //RX_FDEQ_BIN_14 +235 0x0000 //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x4000 //RX_FDEQ_RESRV_0 +245 0x0320 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0030 //RX_FDDRC_BAND_MARGIN_1 +248 0x0050 //RX_FDDRC_BAND_MARGIN_2 +249 0x0080 //RX_FDDRC_BAND_MARGIN_3 +250 0x0007 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x5000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x6400 //RX_FDDRC_THRD_3_2 +258 0x6400 //RX_FDDRC_THRD_3_3 +259 0x2000 //RX_FDDRC_SLANT_0_0 +260 0x2000 //RX_FDDRC_SLANT_0_1 +261 0x2000 //RX_FDDRC_SLANT_0_2 +262 0x2000 //RX_FDDRC_SLANT_0_3 +263 0x5333 //RX_FDDRC_SLANT_1_0 +264 0x5333 //RX_FDDRC_SLANT_1_1 +265 0x5333 //RX_FDDRC_SLANT_1_2 +266 0x5333 //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +286 0x0100 //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 +#VOL 5 +163 0x3000 //RX_TDDRC_ALPHA_UP_1 +164 0x3000 //RX_TDDRC_ALPHA_UP_2 +165 0x3000 //RX_TDDRC_ALPHA_UP_3 +166 0x3000 //RX_TDDRC_ALPHA_UP_4 +184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +190 0x7FFF //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +269 0x0000 //RX_TDDRC_THRD_0 +270 0x0000 //RX_TDDRC_THRD_1 +271 0x7FFF //RX_TDDRC_THRD_2 +272 0x7FFF //RX_TDDRC_THRD_3 +273 0x7FFF //RX_TDDRC_SLANT_0 +274 0x7EB8 //RX_TDDRC_SLANT_1 +275 0x3000 //RX_TDDRC_ALPHA_UP_0 +276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x199A //RX_TDDRC_HMNC_GAIN +279 0x0001 //RX_TDDRC_SMT_FLAG +280 0x0CCD //RX_TDDRC_SMT_W +281 0x017F //RX_TDDRC_DRC_GAIN +195 0x0014 //RX_FDEQ_SUBNUM +196 0x4848 //RX_FDEQ_GAIN_0 +197 0x4848 //RX_FDEQ_GAIN_1 +198 0x4848 //RX_FDEQ_GAIN_2 +199 0x4848 //RX_FDEQ_GAIN_3 +200 0x4848 //RX_FDEQ_GAIN_4 +201 0x4848 //RX_FDEQ_GAIN_5 +202 0x4444 //RX_FDEQ_GAIN_6 +203 0x4040 //RX_FDEQ_GAIN_7 +204 0x4040 //RX_FDEQ_GAIN_8 +205 0x4040 //RX_FDEQ_GAIN_9 +206 0x4848 //RX_FDEQ_GAIN_10 +207 0x4848 //RX_FDEQ_GAIN_11 +208 0x4848 //RX_FDEQ_GAIN_12 +209 0x4848 //RX_FDEQ_GAIN_13 +210 0x4848 //RX_FDEQ_GAIN_14 +211 0x4848 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0202 //RX_FDEQ_BIN_0 +221 0x0203 //RX_FDEQ_BIN_1 +222 0x0303 //RX_FDEQ_BIN_2 +223 0x0304 //RX_FDEQ_BIN_3 +224 0x0405 //RX_FDEQ_BIN_4 +225 0x0506 //RX_FDEQ_BIN_5 +226 0x0708 //RX_FDEQ_BIN_6 +227 0x090A //RX_FDEQ_BIN_7 +228 0x0B0C //RX_FDEQ_BIN_8 +229 0x0D0E //RX_FDEQ_BIN_9 +230 0x0000 //RX_FDEQ_BIN_10 +231 0x0000 //RX_FDEQ_BIN_11 +232 0x0000 //RX_FDEQ_BIN_12 +233 0x0000 //RX_FDEQ_BIN_13 +234 0x0000 //RX_FDEQ_BIN_14 +235 0x0000 //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x4000 //RX_FDEQ_RESRV_0 +245 0x0320 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0030 //RX_FDDRC_BAND_MARGIN_1 +248 0x0050 //RX_FDDRC_BAND_MARGIN_2 +249 0x0080 //RX_FDDRC_BAND_MARGIN_3 +250 0x0007 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x5000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x6400 //RX_FDDRC_THRD_3_2 +258 0x6400 //RX_FDDRC_THRD_3_3 +259 0x2000 //RX_FDDRC_SLANT_0_0 +260 0x2000 //RX_FDDRC_SLANT_0_1 +261 0x2000 //RX_FDDRC_SLANT_0_2 +262 0x2000 //RX_FDDRC_SLANT_0_3 +263 0x5333 //RX_FDDRC_SLANT_1_0 +264 0x5333 //RX_FDDRC_SLANT_1_1 +265 0x5333 //RX_FDDRC_SLANT_1_2 +266 0x5333 //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +286 0x0100 //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 +#VOL 6 +163 0x3000 //RX_TDDRC_ALPHA_UP_1 +164 0x3000 //RX_TDDRC_ALPHA_UP_2 +165 0x3000 //RX_TDDRC_ALPHA_UP_3 +166 0x3000 //RX_TDDRC_ALPHA_UP_4 +184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +190 0x7FFF //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +269 0x0000 //RX_TDDRC_THRD_0 +270 0x0000 //RX_TDDRC_THRD_1 +271 0x7FFF //RX_TDDRC_THRD_2 +272 0x7FFF //RX_TDDRC_THRD_3 +273 0x7FFF //RX_TDDRC_SLANT_0 +274 0x7EB8 //RX_TDDRC_SLANT_1 +275 0x3000 //RX_TDDRC_ALPHA_UP_0 +276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x199A //RX_TDDRC_HMNC_GAIN +279 0x0001 //RX_TDDRC_SMT_FLAG +280 0x0CCD //RX_TDDRC_SMT_W +281 0x017F //RX_TDDRC_DRC_GAIN +195 0x0014 //RX_FDEQ_SUBNUM +196 0x4848 //RX_FDEQ_GAIN_0 +197 0x4848 //RX_FDEQ_GAIN_1 +198 0x4848 //RX_FDEQ_GAIN_2 +199 0x4848 //RX_FDEQ_GAIN_3 +200 0x4848 //RX_FDEQ_GAIN_4 +201 0x4848 //RX_FDEQ_GAIN_5 +202 0x4444 //RX_FDEQ_GAIN_6 +203 0x4040 //RX_FDEQ_GAIN_7 +204 0x4040 //RX_FDEQ_GAIN_8 +205 0x4040 //RX_FDEQ_GAIN_9 +206 0x4848 //RX_FDEQ_GAIN_10 +207 0x4848 //RX_FDEQ_GAIN_11 +208 0x4848 //RX_FDEQ_GAIN_12 +209 0x4848 //RX_FDEQ_GAIN_13 +210 0x4848 //RX_FDEQ_GAIN_14 +211 0x4848 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0202 //RX_FDEQ_BIN_0 +221 0x0203 //RX_FDEQ_BIN_1 +222 0x0303 //RX_FDEQ_BIN_2 +223 0x0304 //RX_FDEQ_BIN_3 +224 0x0405 //RX_FDEQ_BIN_4 +225 0x0506 //RX_FDEQ_BIN_5 +226 0x0708 //RX_FDEQ_BIN_6 +227 0x090A //RX_FDEQ_BIN_7 +228 0x0B0C //RX_FDEQ_BIN_8 +229 0x0D0E //RX_FDEQ_BIN_9 +230 0x0000 //RX_FDEQ_BIN_10 +231 0x0000 //RX_FDEQ_BIN_11 +232 0x0000 //RX_FDEQ_BIN_12 +233 0x0000 //RX_FDEQ_BIN_13 +234 0x0000 //RX_FDEQ_BIN_14 +235 0x0000 //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x4000 //RX_FDEQ_RESRV_0 +245 0x0320 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0030 //RX_FDDRC_BAND_MARGIN_1 +248 0x0050 //RX_FDDRC_BAND_MARGIN_2 +249 0x0080 //RX_FDDRC_BAND_MARGIN_3 +250 0x0007 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x5000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x6400 //RX_FDDRC_THRD_3_2 +258 0x6400 //RX_FDDRC_THRD_3_3 +259 0x2000 //RX_FDDRC_SLANT_0_0 +260 0x2000 //RX_FDDRC_SLANT_0_1 +261 0x2000 //RX_FDDRC_SLANT_0_2 +262 0x2000 //RX_FDDRC_SLANT_0_3 +263 0x5333 //RX_FDDRC_SLANT_1_0 +264 0x5333 //RX_FDDRC_SLANT_1_1 +265 0x5333 //RX_FDDRC_SLANT_1_2 +266 0x5333 //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +286 0x0100 //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 #CASE_NAME BLUETOOTH-BTWB_NREC-VOICE_GENERIC-WB -#PARAM_TYPE TX+RX -#TOTAL_CUSTOM_STEP 7 +#PARAM_MODE Full +#PARAM_TYPE TX+2RX +#TOTAL_CUSTOM_STEP 7+7 #TX 0 0x0008 //TX_OPERATION_MODE_0 1 0x0008 //TX_OPERATION_MODE_1 @@ -31812,20 +48319,20 @@ 248 0xF400 //TX_THR_SN_EST_6 249 0xF600 //TX_THR_SN_EST_7 250 0x0000 //TX_DELTA_THR_SN_EST_0 -251 0x0000 //TX_DELTA_THR_SN_EST_1 +251 0x0200 //TX_DELTA_THR_SN_EST_1 252 0x0200 //TX_DELTA_THR_SN_EST_2 253 0x0200 //TX_DELTA_THR_SN_EST_3 254 0x0200 //TX_DELTA_THR_SN_EST_4 255 0x0200 //TX_DELTA_THR_SN_EST_5 -256 0x0200 //TX_DELTA_THR_SN_EST_6 +256 0x0000 //TX_DELTA_THR_SN_EST_6 257 0x0200 //TX_DELTA_THR_SN_EST_7 258 0x6000 //TX_LAMBDA_NN_EST_0 -259 0x6000 //TX_LAMBDA_NN_EST_1 +259 0x4000 //TX_LAMBDA_NN_EST_1 260 0x4000 //TX_LAMBDA_NN_EST_2 261 0x4000 //TX_LAMBDA_NN_EST_3 262 0x4000 //TX_LAMBDA_NN_EST_4 263 0x4000 //TX_LAMBDA_NN_EST_5 -264 0x4000 //TX_LAMBDA_NN_EST_6 +264 0x6000 //TX_LAMBDA_NN_EST_6 265 0x4000 //TX_LAMBDA_NN_EST_7 266 0x0400 //TX_N_SN_EST 267 0x001E //TX_INBEAM_T @@ -31843,16 +48350,16 @@ 279 0x1000 //TX_B_POST_FLT_0 280 0x1000 //TX_B_POST_FLT_1 281 0x000F //TX_NS_LVL_CTRL_0 -282 0x000F //TX_NS_LVL_CTRL_1 -283 0x0011 //TX_NS_LVL_CTRL_2 +282 0x0011 //TX_NS_LVL_CTRL_1 +283 0x000F //TX_NS_LVL_CTRL_2 284 0x000F //TX_NS_LVL_CTRL_3 285 0x000F //TX_NS_LVL_CTRL_4 286 0x000F //TX_NS_LVL_CTRL_5 287 0x000F //TX_NS_LVL_CTRL_6 288 0x0011 //TX_NS_LVL_CTRL_7 289 0x000C //TX_MIN_GAIN_S_0 -290 0x000C //TX_MIN_GAIN_S_1 -291 0x000F //TX_MIN_GAIN_S_2 +290 0x000F //TX_MIN_GAIN_S_1 +291 0x000C //TX_MIN_GAIN_S_2 292 0x000C //TX_MIN_GAIN_S_3 293 0x000C //TX_MIN_GAIN_S_4 294 0x000C //TX_MIN_GAIN_S_5 @@ -31876,12 +48383,12 @@ 312 0x7FFF //TX_A_POST_FILT_0 313 0x2000 //TX_A_POST_FILT_1 314 0x4000 //TX_A_POST_FILT_S_0 -315 0x4000 //TX_A_POST_FILT_S_1 +315 0x5000 //TX_A_POST_FILT_S_1 316 0x5000 //TX_A_POST_FILT_S_2 317 0x5000 //TX_A_POST_FILT_S_3 318 0x5000 //TX_A_POST_FILT_S_4 319 0x5000 //TX_A_POST_FILT_S_5 -320 0x5000 //TX_A_POST_FILT_S_6 +320 0x4000 //TX_A_POST_FILT_S_6 321 0x5000 //TX_A_POST_FILT_S_7 322 0x1000 //TX_B_POST_FILT_0 323 0x1000 //TX_B_POST_FILT_1 @@ -31941,10 +48448,10 @@ 377 0x7FFF //TX_NOISE_TH_5_4 378 0x044C //TX_NOISE_TH_6 379 0x0014 //TX_MINENOISE_TH -380 0x4000 //TX_MINENOISE_MIC0_TH_MTS -381 0xFFEE //TX_MINENOISE_MIC0_TH_EXP -382 0x6000 //TX_MINENOISE_MIC0_S_TH_MTS -383 0xFFF3 //TX_MINENOISE_MIC0_S_TH_EXP +380 0x4000 //TX_MORENS_TFMASK_TH +381 0xFFEE //TX_DRC_QUIET_FLOOR +382 0x6000 //TX_RATIODTL_CUT_TH +383 0xFFF3 //TX_DT_CUT_K1 384 0x0666 //TX_OUT_ENER_S_TH_CLEAN 385 0x0666 //TX_OUT_ENER_S_TH_LESSCLEAN 386 0x0333 //TX_OUT_ENER_S_TH_NOISY @@ -31952,15 +48459,15 @@ 388 0x0333 //TX_OUT_ENER_TH_SPEECH 389 0x2000 //TX_SN_NPB_GAIN 390 0x0000 //TX_NN_NPB_GAIN -391 0x0000 //TX_CSX_ALPHA_0 -392 0x0000 //TX_CSX_ALPHA_1 -393 0x0000 //TX_CSX_ALPHA_2 -394 0x0000 //TX_CSX_ALPHA_3 -395 0x0800 //TX_MU_ARSP_EST -396 0x00C8 //TX_P_OUTBEAM_MIN_TH +391 0x0000 //TX_POST_MASK_SUP_HSNE +392 0x0000 //TX_TAIL_DET_TH +393 0x0000 //TX_B_LESSCUT_RTO_WTA +394 0x0000 //TX_MEL_G_R +395 0x0800 //TX_SUPHIGH_TH +396 0x00C8 //TX_MASK_G_R 397 0x0002 //TX_EXTRA_NS_L -398 0x0800 //TX_EXTRA_NS_A -399 0x0005 //TX_VR_NOISE_FLOOR_TH +398 0x0800 //TX_C_POST_FLT_MASK +399 0x0005 //TX_A_POST_FLT_WNS 400 0x0148 //TX_MIN_G_LOW300HZ 401 0x0002 //TX_MAXLEVEL_CNG 402 0x00B4 //TX_STN_NOISE_TH @@ -32075,16 +48582,16 @@ 511 0x6666 //TX_MIC_TO_BFGAIN 512 0x0000 //TX_MICTOBFGAIN0 513 0x0000 //TX_FASTMUE_TH -514 0x0000 //TX_DERVB_LEN_0 -515 0x0000 //TX_DERVB_LEN_1 -516 0x0000 //TX_RHO_DERVB -517 0x0000 //TX_MIC_INDX_DERVB -518 0x0000 //TX_MU_DERVB -519 0x0000 //TX_DR_RESRV_0 -520 0x0000 //TX_DR_RESRV_1 -521 0x0000 //TX_DR_RESRV_2 -522 0x0000 //TX_DR_RESRV_3 -523 0x0000 //TX_DR_RESRV_4 +514 0x0000 //TX_DEREVERB_LF_MU +515 0x0000 //TX_DEREVERB_HF_MU +516 0x0000 //TX_DEREVERB_DELAY +517 0x0000 //TX_DEREVERB_COEF_LEN +518 0x0000 //TX_DEREVERB_DNR +519 0x0000 //TX_DEREVERB_ALPHA +520 0x0000 //TX_DEREVERB_BETA +521 0x0000 //TX_GSC_RTOL_TH +522 0x0000 //TX_GSC_RTOH_TH +523 0x0000 //TX_WIDE2_MEANHTH 524 0x0000 //TX_DR_RESRV_5 525 0x0000 //TX_DR_RESRV_6 526 0x0000 //TX_DR_RESRV_7 @@ -32458,8 +48965,73 @@ 894 0xC000 //TX_FASTNS_SSA_THHFL 895 0xCCCC //TX_FASTNS_SSA_THLFH 896 0xD999 //TX_FASTNS_SSA_THHFH +897 0x0000 //TX_SENDFUNC_REG_MICMUTE +898 0x0000 //TX_SENDFUNC_REG_MICMUTE1 +899 0x0000 //TX_MICMUTE_RATIO_THR +900 0x0000 //TX_MICMUTE_AMP_THR +901 0x0000 //TX_MICMUTE_HPF_IND +902 0x0000 //TX_MICMUTE_LOG_EYR_TH +903 0x0000 //TX_MICMUTE_CVG_TIME +904 0x0000 //TX_MICMUTE_RELEASE_TIME +905 0x0000 //TX_MIC_VOLUME_MIC0MUTE +906 0x0000 //TX_MICMUTE_EPD_OFFSET_0 +907 0x0000 //TX_MICMUTE_FRQ_AEC_L +908 0x0000 //TX_MICMUTE_EAD_THR +909 0x0000 //TX_MICMUTE_LAMBDA_CB_NLE +910 0x0000 //TX_MICMUTE_LAMBDA_RE_EST +911 0x0000 //TX_DTD_THR1_MICMUTE_0 +912 0x0000 //TX_DTD_THR1_MICMUTE_1 +913 0x0000 //TX_DTD_THR1_MICMUTE_2 +914 0x0000 //TX_DTD_THR1_MICMUTE_3 +915 0x0000 //TX_DTD_THR2_MICMUTE_0 +916 0x0000 //TX_MICMUTE_MIN_EQ_RE_EST_0 +917 0x0000 //TX_MICMUTE_MIN_EQ_RE_EST_1 +918 0x0000 //TX_MICMUTE_MIN_EQ_RE_EST_2 +919 0x0000 //TX_MICMUTE_MIN_EQ_RE_EST_3 +920 0x0000 //TX_MICMUTE_MIN_EQ_RE_EST_4 +921 0x0000 //TX_MICMUTE_C_POST_FLT +922 0x0000 //TX_MICMUTE_DT_CUT_K +923 0x0000 //TX_MICMUTE_DT_CUT_THR +924 0x0000 //TX_MICMUTE_DT_CUT_K2 +925 0x0000 //TX_MICMUTE_DT_CUT_THR2 +926 0x0000 //TX_MICMUTE_DT2_HOLD_N +927 0x0000 //TX_MICMUTE_RATIODTH_THCUT +928 0x0000 //TX_MICMUTE_B_POST_FLT_ECHOL +929 0x0000 //TX_MICMUTE_B_POST_FLT_ECHOH +930 0x0000 //TX_MICMUTE_C_POST_FLT_MASK +931 0x0000 //TX_MICMUTE_RATIODTL_CUT_TH +932 0x0000 //TX_MICMUTE_DT_CUT_K1 +933 0x0000 //TX_MICMUTE_N2_SN_EST +934 0x0000 //TX_MICMUTE_THR_SN_EST_0 +935 0x0000 //TX_MICMUTE_MIN_G_CTRL_0 +936 0x0000 //TX_MICMUTE_A_POST_FILT_S_0 +937 0x0000 //TX_MICMUTE_B_POST_FILT_0 +938 0x0000 //TX_MIC1RUB_AMP_THR +939 0x0000 //TX_MIC1MUTE_RATIO_THR +940 0x0000 //TX_MIC1MUTE_AMP_THR +941 0x0000 //TX_MIC1MUTE_CVG_TIME +942 0x0000 //TX_MIC1MUTE_RELEASE_TIME +943 0x0000 //TX_AMS_RESRV_01 +944 0x0000 //TX_AMS_RESRV_02 +945 0x0000 //TX_AMS_RESRV_03 +946 0x0000 //TX_AMS_RESRV_04 +947 0x0000 //TX_AMS_RESRV_05 +948 0x0000 //TX_AMS_RESRV_06 +949 0x0000 //TX_AMS_RESRV_07 +950 0x0000 //TX_AMS_RESRV_08 +951 0x0000 //TX_AMS_RESRV_09 +952 0x0000 //TX_AMS_RESRV_10 +953 0x0000 //TX_AMS_RESRV_11 +954 0x0000 //TX_AMS_RESRV_12 +955 0x0000 //TX_AMS_RESRV_13 +956 0x0000 //TX_AMS_RESRV_14 +957 0x0000 //TX_AMS_RESRV_15 +958 0x0000 //TX_AMS_RESRV_16 +959 0x0000 //TX_AMS_RESRV_17 +960 0x0000 //TX_AMS_RESRV_18 +961 0x0000 //TX_AMS_RESRV_19 #RX -0 0x006C //RX_RECVFUNC_MODE_0 +0 0x206C //RX_RECVFUNC_MODE_0 1 0x0000 //RX_RECVFUNC_MODE_1 2 0x0001 //RX_SAMPLINGFREQ_SIG 3 0x0001 //RX_SAMPLINGFREQ_PROC @@ -33309,10 +49881,862 @@ 110 0x0000 //RX_FDDRC_RESRV_0 129 0x0100 //RX_SPK_VOL 130 0x0000 //RX_VOL_RESRV_0 +#RX 2 +157 0x206C //RX_RECVFUNC_MODE_0 +158 0x0000 //RX_RECVFUNC_MODE_1 +159 0x0001 //RX_SAMPLINGFREQ_SIG +160 0x0001 //RX_SAMPLINGFREQ_PROC +161 0x000A //RX_FRAME_SZ +162 0x0000 //RX_DELAY_OPT +163 0x1000 //RX_TDDRC_ALPHA_UP_1 +164 0x1000 //RX_TDDRC_ALPHA_UP_2 +165 0x1000 //RX_TDDRC_ALPHA_UP_3 +166 0x1000 //RX_TDDRC_ALPHA_UP_4 +167 0x0800 //RX_PGA +168 0x7FFF //RX_A_HP +169 0x4000 //RX_B_PE +170 0x3800 //RX_THR_PITCH_DET_0 +171 0x3000 //RX_THR_PITCH_DET_1 +172 0x2800 //RX_THR_PITCH_DET_2 +173 0x0008 //RX_PITCH_BFR_LEN +174 0x0003 //RX_SBD_PITCH_DET +175 0x0100 //RX_PP_RESRV_0 +176 0x0020 //RX_PP_RESRV_1 +177 0x0600 //RX_N_SN_EST +178 0x000C //RX_N2_SN_EST +179 0x0010 //RX_NS_LVL_CTRL +180 0xF800 //RX_THR_SN_EST +181 0x7CCD //RX_LAMBDA_PFILT +182 0x000A //RX_FENS_RESRV_0 +183 0x0190 //RX_FENS_RESRV_1 +184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +187 0x0002 //RX_EXTRA_NS_L +188 0x0800 //RX_EXTRA_NS_A +189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +190 0x7FFF //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +192 0x199A //RX_A_POST_FLT +193 0x0000 //RX_LMT_THRD +194 0x4000 //RX_LMT_ALPHA +195 0x001C //RX_FDEQ_SUBNUM +196 0x4848 //RX_FDEQ_GAIN_0 +197 0x4848 //RX_FDEQ_GAIN_1 +198 0x4848 //RX_FDEQ_GAIN_2 +199 0x4848 //RX_FDEQ_GAIN_3 +200 0x4848 //RX_FDEQ_GAIN_4 +201 0x4848 //RX_FDEQ_GAIN_5 +202 0x4848 //RX_FDEQ_GAIN_6 +203 0x4848 //RX_FDEQ_GAIN_7 +204 0x4848 //RX_FDEQ_GAIN_8 +205 0x3C3C //RX_FDEQ_GAIN_9 +206 0x3C3C //RX_FDEQ_GAIN_10 +207 0x3838 //RX_FDEQ_GAIN_11 +208 0x3838 //RX_FDEQ_GAIN_12 +209 0x3030 //RX_FDEQ_GAIN_13 +210 0x4848 //RX_FDEQ_GAIN_14 +211 0x4848 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0202 //RX_FDEQ_BIN_0 +221 0x0203 //RX_FDEQ_BIN_1 +222 0x0303 //RX_FDEQ_BIN_2 +223 0x0304 //RX_FDEQ_BIN_3 +224 0x0405 //RX_FDEQ_BIN_4 +225 0x0506 //RX_FDEQ_BIN_5 +226 0x0708 //RX_FDEQ_BIN_6 +227 0x090A //RX_FDEQ_BIN_7 +228 0x0B0C //RX_FDEQ_BIN_8 +229 0x0D0E //RX_FDEQ_BIN_9 +230 0x0E0F //RX_FDEQ_BIN_10 +231 0x0F10 //RX_FDEQ_BIN_11 +232 0x1011 //RX_FDEQ_BIN_12 +233 0x1112 //RX_FDEQ_BIN_13 +234 0x0000 //RX_FDEQ_BIN_14 +235 0x0000 //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x4000 //RX_FDEQ_RESRV_0 +245 0x0320 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0030 //RX_FDDRC_BAND_MARGIN_1 +248 0x0050 //RX_FDDRC_BAND_MARGIN_2 +249 0x0080 //RX_FDDRC_BAND_MARGIN_3 +250 0x0007 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x5000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x6400 //RX_FDDRC_THRD_3_2 +258 0x6400 //RX_FDDRC_THRD_3_3 +259 0x2000 //RX_FDDRC_SLANT_0_0 +260 0x2000 //RX_FDDRC_SLANT_0_1 +261 0x2000 //RX_FDDRC_SLANT_0_2 +262 0x2000 //RX_FDDRC_SLANT_0_3 +263 0x5333 //RX_FDDRC_SLANT_1_0 +264 0x5333 //RX_FDDRC_SLANT_1_1 +265 0x5333 //RX_FDDRC_SLANT_1_2 +266 0x5333 //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +268 0x0000 //RX_FILTINDX +269 0x0000 //RX_TDDRC_THRD_0 +270 0x0000 //RX_TDDRC_THRD_1 +271 0x7FFF //RX_TDDRC_THRD_2 +272 0x7FFF //RX_TDDRC_THRD_3 +273 0x7E70 //RX_TDDRC_SLANT_0 +274 0x7FFF //RX_TDDRC_SLANT_1 +275 0x1000 //RX_TDDRC_ALPHA_UP_0 +276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x199A //RX_TDDRC_HMNC_GAIN +279 0x0001 //RX_TDDRC_SMT_FLAG +280 0x0CCD //RX_TDDRC_SMT_W +281 0x0155 //RX_TDDRC_DRC_GAIN +282 0x7C00 //RX_LAMBDA_PKA_FP +283 0x2000 //RX_TPKA_FP +284 0x2000 //RX_MIN_G_FP +285 0x0080 //RX_MAX_G_FP +286 0x0100 //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 +288 0x0000 //RX_MAXLEVEL_CNG +289 0x3000 //RX_BWE_UV_TH +290 0x3000 //RX_BWE_UV_TH2 +291 0x1800 //RX_BWE_UV_TH3 +292 0x1000 //RX_BWE_V_TH +293 0x04CD //RX_BWE_GAIN1_V_TH1 +294 0x0F33 //RX_BWE_GAIN1_V_TH2 +295 0x7333 //RX_BWE_UV_EQ +296 0x199A //RX_BWE_V_EQ +297 0x7333 //RX_BWE_TONE_TH +298 0x0004 //RX_BWE_UV_HOLD_T +299 0x6CCD //RX_BWE_GAIN2_ALPHA +300 0x799A //RX_BWE_GAIN3_ALPHA +301 0x001E //RX_BWE_CUTOFF +302 0x3000 //RX_BWE_GAINFILL +303 0x3200 //RX_BWE_MAXTH_TONE +304 0x2000 //RX_BWE_EQ_0 +305 0x2000 //RX_BWE_EQ_1 +306 0x2000 //RX_BWE_EQ_2 +307 0x2000 //RX_BWE_EQ_3 +308 0x2000 //RX_BWE_EQ_4 +309 0x2000 //RX_BWE_EQ_5 +310 0x2000 //RX_BWE_EQ_6 +311 0x0000 //RX_BWE_RESRV_0 +312 0x0000 //RX_BWE_RESRV_1 +313 0x0000 //RX_BWE_RESRV_2 +#VOL 0 +163 0x1000 //RX_TDDRC_ALPHA_UP_1 +164 0x1000 //RX_TDDRC_ALPHA_UP_2 +165 0x1000 //RX_TDDRC_ALPHA_UP_3 +166 0x1000 //RX_TDDRC_ALPHA_UP_4 +184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +190 0x7FFF //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +269 0x0000 //RX_TDDRC_THRD_0 +270 0x0000 //RX_TDDRC_THRD_1 +271 0x7FFF //RX_TDDRC_THRD_2 +272 0x7FFF //RX_TDDRC_THRD_3 +273 0x7E70 //RX_TDDRC_SLANT_0 +274 0x7FFF //RX_TDDRC_SLANT_1 +275 0x1000 //RX_TDDRC_ALPHA_UP_0 +276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x199A //RX_TDDRC_HMNC_GAIN +279 0x0001 //RX_TDDRC_SMT_FLAG +280 0x0CCD //RX_TDDRC_SMT_W +281 0x0155 //RX_TDDRC_DRC_GAIN +195 0x001C //RX_FDEQ_SUBNUM +196 0x4848 //RX_FDEQ_GAIN_0 +197 0x4848 //RX_FDEQ_GAIN_1 +198 0x4848 //RX_FDEQ_GAIN_2 +199 0x4848 //RX_FDEQ_GAIN_3 +200 0x4848 //RX_FDEQ_GAIN_4 +201 0x4848 //RX_FDEQ_GAIN_5 +202 0x4848 //RX_FDEQ_GAIN_6 +203 0x4848 //RX_FDEQ_GAIN_7 +204 0x4848 //RX_FDEQ_GAIN_8 +205 0x3C3C //RX_FDEQ_GAIN_9 +206 0x3C3C //RX_FDEQ_GAIN_10 +207 0x3838 //RX_FDEQ_GAIN_11 +208 0x3838 //RX_FDEQ_GAIN_12 +209 0x3030 //RX_FDEQ_GAIN_13 +210 0x4848 //RX_FDEQ_GAIN_14 +211 0x4848 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0202 //RX_FDEQ_BIN_0 +221 0x0203 //RX_FDEQ_BIN_1 +222 0x0303 //RX_FDEQ_BIN_2 +223 0x0304 //RX_FDEQ_BIN_3 +224 0x0405 //RX_FDEQ_BIN_4 +225 0x0506 //RX_FDEQ_BIN_5 +226 0x0708 //RX_FDEQ_BIN_6 +227 0x090A //RX_FDEQ_BIN_7 +228 0x0B0C //RX_FDEQ_BIN_8 +229 0x0D0E //RX_FDEQ_BIN_9 +230 0x0E0F //RX_FDEQ_BIN_10 +231 0x0F10 //RX_FDEQ_BIN_11 +232 0x1011 //RX_FDEQ_BIN_12 +233 0x1112 //RX_FDEQ_BIN_13 +234 0x0000 //RX_FDEQ_BIN_14 +235 0x0000 //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x4000 //RX_FDEQ_RESRV_0 +245 0x0320 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0030 //RX_FDDRC_BAND_MARGIN_1 +248 0x0050 //RX_FDDRC_BAND_MARGIN_2 +249 0x0080 //RX_FDDRC_BAND_MARGIN_3 +250 0x0007 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x5000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x6400 //RX_FDDRC_THRD_3_2 +258 0x6400 //RX_FDDRC_THRD_3_3 +259 0x2000 //RX_FDDRC_SLANT_0_0 +260 0x2000 //RX_FDDRC_SLANT_0_1 +261 0x2000 //RX_FDDRC_SLANT_0_2 +262 0x2000 //RX_FDDRC_SLANT_0_3 +263 0x5333 //RX_FDDRC_SLANT_1_0 +264 0x5333 //RX_FDDRC_SLANT_1_1 +265 0x5333 //RX_FDDRC_SLANT_1_2 +266 0x5333 //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +286 0x0100 //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 +#VOL 1 +163 0x1000 //RX_TDDRC_ALPHA_UP_1 +164 0x1000 //RX_TDDRC_ALPHA_UP_2 +165 0x1000 //RX_TDDRC_ALPHA_UP_3 +166 0x1000 //RX_TDDRC_ALPHA_UP_4 +184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +190 0x7FFF //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +269 0x0000 //RX_TDDRC_THRD_0 +270 0x0000 //RX_TDDRC_THRD_1 +271 0x7FFF //RX_TDDRC_THRD_2 +272 0x7FFF //RX_TDDRC_THRD_3 +273 0x7E70 //RX_TDDRC_SLANT_0 +274 0x7FFF //RX_TDDRC_SLANT_1 +275 0x1000 //RX_TDDRC_ALPHA_UP_0 +276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x199A //RX_TDDRC_HMNC_GAIN +279 0x0001 //RX_TDDRC_SMT_FLAG +280 0x0CCD //RX_TDDRC_SMT_W +281 0x0155 //RX_TDDRC_DRC_GAIN +195 0x001C //RX_FDEQ_SUBNUM +196 0x4848 //RX_FDEQ_GAIN_0 +197 0x4848 //RX_FDEQ_GAIN_1 +198 0x4848 //RX_FDEQ_GAIN_2 +199 0x4848 //RX_FDEQ_GAIN_3 +200 0x4848 //RX_FDEQ_GAIN_4 +201 0x4848 //RX_FDEQ_GAIN_5 +202 0x4848 //RX_FDEQ_GAIN_6 +203 0x4848 //RX_FDEQ_GAIN_7 +204 0x4848 //RX_FDEQ_GAIN_8 +205 0x3C3C //RX_FDEQ_GAIN_9 +206 0x3C3C //RX_FDEQ_GAIN_10 +207 0x3838 //RX_FDEQ_GAIN_11 +208 0x3838 //RX_FDEQ_GAIN_12 +209 0x3030 //RX_FDEQ_GAIN_13 +210 0x4848 //RX_FDEQ_GAIN_14 +211 0x4848 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0202 //RX_FDEQ_BIN_0 +221 0x0203 //RX_FDEQ_BIN_1 +222 0x0303 //RX_FDEQ_BIN_2 +223 0x0304 //RX_FDEQ_BIN_3 +224 0x0405 //RX_FDEQ_BIN_4 +225 0x0506 //RX_FDEQ_BIN_5 +226 0x0708 //RX_FDEQ_BIN_6 +227 0x090A //RX_FDEQ_BIN_7 +228 0x0B0C //RX_FDEQ_BIN_8 +229 0x0D0E //RX_FDEQ_BIN_9 +230 0x0E0F //RX_FDEQ_BIN_10 +231 0x0F10 //RX_FDEQ_BIN_11 +232 0x1011 //RX_FDEQ_BIN_12 +233 0x1112 //RX_FDEQ_BIN_13 +234 0x0000 //RX_FDEQ_BIN_14 +235 0x0000 //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x4000 //RX_FDEQ_RESRV_0 +245 0x0320 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0030 //RX_FDDRC_BAND_MARGIN_1 +248 0x0050 //RX_FDDRC_BAND_MARGIN_2 +249 0x0080 //RX_FDDRC_BAND_MARGIN_3 +250 0x0007 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x5000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x6400 //RX_FDDRC_THRD_3_2 +258 0x6400 //RX_FDDRC_THRD_3_3 +259 0x2000 //RX_FDDRC_SLANT_0_0 +260 0x2000 //RX_FDDRC_SLANT_0_1 +261 0x2000 //RX_FDDRC_SLANT_0_2 +262 0x2000 //RX_FDDRC_SLANT_0_3 +263 0x5333 //RX_FDDRC_SLANT_1_0 +264 0x5333 //RX_FDDRC_SLANT_1_1 +265 0x5333 //RX_FDDRC_SLANT_1_2 +266 0x5333 //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +286 0x0100 //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 +#VOL 2 +163 0x1000 //RX_TDDRC_ALPHA_UP_1 +164 0x1000 //RX_TDDRC_ALPHA_UP_2 +165 0x1000 //RX_TDDRC_ALPHA_UP_3 +166 0x1000 //RX_TDDRC_ALPHA_UP_4 +184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +190 0x7FFF //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +269 0x0000 //RX_TDDRC_THRD_0 +270 0x0000 //RX_TDDRC_THRD_1 +271 0x7FFF //RX_TDDRC_THRD_2 +272 0x7FFF //RX_TDDRC_THRD_3 +273 0x7E70 //RX_TDDRC_SLANT_0 +274 0x7FFF //RX_TDDRC_SLANT_1 +275 0x1000 //RX_TDDRC_ALPHA_UP_0 +276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x199A //RX_TDDRC_HMNC_GAIN +279 0x0001 //RX_TDDRC_SMT_FLAG +280 0x0CCD //RX_TDDRC_SMT_W +281 0x0155 //RX_TDDRC_DRC_GAIN +195 0x001C //RX_FDEQ_SUBNUM +196 0x4848 //RX_FDEQ_GAIN_0 +197 0x4848 //RX_FDEQ_GAIN_1 +198 0x4848 //RX_FDEQ_GAIN_2 +199 0x4848 //RX_FDEQ_GAIN_3 +200 0x4848 //RX_FDEQ_GAIN_4 +201 0x4848 //RX_FDEQ_GAIN_5 +202 0x4848 //RX_FDEQ_GAIN_6 +203 0x4848 //RX_FDEQ_GAIN_7 +204 0x4848 //RX_FDEQ_GAIN_8 +205 0x3C3C //RX_FDEQ_GAIN_9 +206 0x3C3C //RX_FDEQ_GAIN_10 +207 0x3838 //RX_FDEQ_GAIN_11 +208 0x3838 //RX_FDEQ_GAIN_12 +209 0x3030 //RX_FDEQ_GAIN_13 +210 0x4848 //RX_FDEQ_GAIN_14 +211 0x4848 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0202 //RX_FDEQ_BIN_0 +221 0x0203 //RX_FDEQ_BIN_1 +222 0x0303 //RX_FDEQ_BIN_2 +223 0x0304 //RX_FDEQ_BIN_3 +224 0x0405 //RX_FDEQ_BIN_4 +225 0x0506 //RX_FDEQ_BIN_5 +226 0x0708 //RX_FDEQ_BIN_6 +227 0x090A //RX_FDEQ_BIN_7 +228 0x0B0C //RX_FDEQ_BIN_8 +229 0x0D0E //RX_FDEQ_BIN_9 +230 0x0E0F //RX_FDEQ_BIN_10 +231 0x0F10 //RX_FDEQ_BIN_11 +232 0x1011 //RX_FDEQ_BIN_12 +233 0x1112 //RX_FDEQ_BIN_13 +234 0x0000 //RX_FDEQ_BIN_14 +235 0x0000 //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x4000 //RX_FDEQ_RESRV_0 +245 0x0320 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0030 //RX_FDDRC_BAND_MARGIN_1 +248 0x0050 //RX_FDDRC_BAND_MARGIN_2 +249 0x0080 //RX_FDDRC_BAND_MARGIN_3 +250 0x0007 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x5000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x6400 //RX_FDDRC_THRD_3_2 +258 0x6400 //RX_FDDRC_THRD_3_3 +259 0x2000 //RX_FDDRC_SLANT_0_0 +260 0x2000 //RX_FDDRC_SLANT_0_1 +261 0x2000 //RX_FDDRC_SLANT_0_2 +262 0x2000 //RX_FDDRC_SLANT_0_3 +263 0x5333 //RX_FDDRC_SLANT_1_0 +264 0x5333 //RX_FDDRC_SLANT_1_1 +265 0x5333 //RX_FDDRC_SLANT_1_2 +266 0x5333 //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +286 0x0100 //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 +#VOL 3 +163 0x1000 //RX_TDDRC_ALPHA_UP_1 +164 0x1000 //RX_TDDRC_ALPHA_UP_2 +165 0x1000 //RX_TDDRC_ALPHA_UP_3 +166 0x1000 //RX_TDDRC_ALPHA_UP_4 +184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +190 0x7FFF //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +269 0x0000 //RX_TDDRC_THRD_0 +270 0x0000 //RX_TDDRC_THRD_1 +271 0x7FFF //RX_TDDRC_THRD_2 +272 0x7FFF //RX_TDDRC_THRD_3 +273 0x7E70 //RX_TDDRC_SLANT_0 +274 0x7FFF //RX_TDDRC_SLANT_1 +275 0x1000 //RX_TDDRC_ALPHA_UP_0 +276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x199A //RX_TDDRC_HMNC_GAIN +279 0x0001 //RX_TDDRC_SMT_FLAG +280 0x0CCD //RX_TDDRC_SMT_W +281 0x0155 //RX_TDDRC_DRC_GAIN +195 0x001C //RX_FDEQ_SUBNUM +196 0x4848 //RX_FDEQ_GAIN_0 +197 0x4848 //RX_FDEQ_GAIN_1 +198 0x4848 //RX_FDEQ_GAIN_2 +199 0x4848 //RX_FDEQ_GAIN_3 +200 0x4848 //RX_FDEQ_GAIN_4 +201 0x4848 //RX_FDEQ_GAIN_5 +202 0x4848 //RX_FDEQ_GAIN_6 +203 0x4848 //RX_FDEQ_GAIN_7 +204 0x4848 //RX_FDEQ_GAIN_8 +205 0x3C3C //RX_FDEQ_GAIN_9 +206 0x3C3C //RX_FDEQ_GAIN_10 +207 0x3838 //RX_FDEQ_GAIN_11 +208 0x3838 //RX_FDEQ_GAIN_12 +209 0x3030 //RX_FDEQ_GAIN_13 +210 0x4848 //RX_FDEQ_GAIN_14 +211 0x4848 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0202 //RX_FDEQ_BIN_0 +221 0x0203 //RX_FDEQ_BIN_1 +222 0x0303 //RX_FDEQ_BIN_2 +223 0x0304 //RX_FDEQ_BIN_3 +224 0x0405 //RX_FDEQ_BIN_4 +225 0x0506 //RX_FDEQ_BIN_5 +226 0x0708 //RX_FDEQ_BIN_6 +227 0x090A //RX_FDEQ_BIN_7 +228 0x0B0C //RX_FDEQ_BIN_8 +229 0x0D0E //RX_FDEQ_BIN_9 +230 0x0E0F //RX_FDEQ_BIN_10 +231 0x0F10 //RX_FDEQ_BIN_11 +232 0x1011 //RX_FDEQ_BIN_12 +233 0x1112 //RX_FDEQ_BIN_13 +234 0x0000 //RX_FDEQ_BIN_14 +235 0x0000 //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x4000 //RX_FDEQ_RESRV_0 +245 0x0320 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0030 //RX_FDDRC_BAND_MARGIN_1 +248 0x0050 //RX_FDDRC_BAND_MARGIN_2 +249 0x0080 //RX_FDDRC_BAND_MARGIN_3 +250 0x0007 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x5000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x6400 //RX_FDDRC_THRD_3_2 +258 0x6400 //RX_FDDRC_THRD_3_3 +259 0x2000 //RX_FDDRC_SLANT_0_0 +260 0x2000 //RX_FDDRC_SLANT_0_1 +261 0x2000 //RX_FDDRC_SLANT_0_2 +262 0x2000 //RX_FDDRC_SLANT_0_3 +263 0x5333 //RX_FDDRC_SLANT_1_0 +264 0x5333 //RX_FDDRC_SLANT_1_1 +265 0x5333 //RX_FDDRC_SLANT_1_2 +266 0x5333 //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +286 0x0100 //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 +#VOL 4 +163 0x1000 //RX_TDDRC_ALPHA_UP_1 +164 0x1000 //RX_TDDRC_ALPHA_UP_2 +165 0x1000 //RX_TDDRC_ALPHA_UP_3 +166 0x1000 //RX_TDDRC_ALPHA_UP_4 +184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +190 0x7FFF //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +269 0x0000 //RX_TDDRC_THRD_0 +270 0x0000 //RX_TDDRC_THRD_1 +271 0x7FFF //RX_TDDRC_THRD_2 +272 0x7FFF //RX_TDDRC_THRD_3 +273 0x7E70 //RX_TDDRC_SLANT_0 +274 0x7FFF //RX_TDDRC_SLANT_1 +275 0x1000 //RX_TDDRC_ALPHA_UP_0 +276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x199A //RX_TDDRC_HMNC_GAIN +279 0x0001 //RX_TDDRC_SMT_FLAG +280 0x0CCD //RX_TDDRC_SMT_W +281 0x0155 //RX_TDDRC_DRC_GAIN +195 0x001C //RX_FDEQ_SUBNUM +196 0x4848 //RX_FDEQ_GAIN_0 +197 0x4848 //RX_FDEQ_GAIN_1 +198 0x4848 //RX_FDEQ_GAIN_2 +199 0x4848 //RX_FDEQ_GAIN_3 +200 0x4848 //RX_FDEQ_GAIN_4 +201 0x4848 //RX_FDEQ_GAIN_5 +202 0x4848 //RX_FDEQ_GAIN_6 +203 0x4848 //RX_FDEQ_GAIN_7 +204 0x4848 //RX_FDEQ_GAIN_8 +205 0x3C3C //RX_FDEQ_GAIN_9 +206 0x3C3C //RX_FDEQ_GAIN_10 +207 0x3838 //RX_FDEQ_GAIN_11 +208 0x3838 //RX_FDEQ_GAIN_12 +209 0x3030 //RX_FDEQ_GAIN_13 +210 0x4848 //RX_FDEQ_GAIN_14 +211 0x4848 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0202 //RX_FDEQ_BIN_0 +221 0x0203 //RX_FDEQ_BIN_1 +222 0x0303 //RX_FDEQ_BIN_2 +223 0x0304 //RX_FDEQ_BIN_3 +224 0x0405 //RX_FDEQ_BIN_4 +225 0x0506 //RX_FDEQ_BIN_5 +226 0x0708 //RX_FDEQ_BIN_6 +227 0x090A //RX_FDEQ_BIN_7 +228 0x0B0C //RX_FDEQ_BIN_8 +229 0x0D0E //RX_FDEQ_BIN_9 +230 0x0E0F //RX_FDEQ_BIN_10 +231 0x0F10 //RX_FDEQ_BIN_11 +232 0x1011 //RX_FDEQ_BIN_12 +233 0x1112 //RX_FDEQ_BIN_13 +234 0x0000 //RX_FDEQ_BIN_14 +235 0x0000 //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x4000 //RX_FDEQ_RESRV_0 +245 0x0320 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0030 //RX_FDDRC_BAND_MARGIN_1 +248 0x0050 //RX_FDDRC_BAND_MARGIN_2 +249 0x0080 //RX_FDDRC_BAND_MARGIN_3 +250 0x0007 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x5000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x6400 //RX_FDDRC_THRD_3_2 +258 0x6400 //RX_FDDRC_THRD_3_3 +259 0x2000 //RX_FDDRC_SLANT_0_0 +260 0x2000 //RX_FDDRC_SLANT_0_1 +261 0x2000 //RX_FDDRC_SLANT_0_2 +262 0x2000 //RX_FDDRC_SLANT_0_3 +263 0x5333 //RX_FDDRC_SLANT_1_0 +264 0x5333 //RX_FDDRC_SLANT_1_1 +265 0x5333 //RX_FDDRC_SLANT_1_2 +266 0x5333 //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +286 0x0100 //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 +#VOL 5 +163 0x1000 //RX_TDDRC_ALPHA_UP_1 +164 0x1000 //RX_TDDRC_ALPHA_UP_2 +165 0x1000 //RX_TDDRC_ALPHA_UP_3 +166 0x1000 //RX_TDDRC_ALPHA_UP_4 +184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +190 0x7FFF //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +269 0x0000 //RX_TDDRC_THRD_0 +270 0x0000 //RX_TDDRC_THRD_1 +271 0x7FFF //RX_TDDRC_THRD_2 +272 0x7FFF //RX_TDDRC_THRD_3 +273 0x7E70 //RX_TDDRC_SLANT_0 +274 0x7FFF //RX_TDDRC_SLANT_1 +275 0x1000 //RX_TDDRC_ALPHA_UP_0 +276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x199A //RX_TDDRC_HMNC_GAIN +279 0x0001 //RX_TDDRC_SMT_FLAG +280 0x0CCD //RX_TDDRC_SMT_W +281 0x0155 //RX_TDDRC_DRC_GAIN +195 0x001C //RX_FDEQ_SUBNUM +196 0x4848 //RX_FDEQ_GAIN_0 +197 0x4848 //RX_FDEQ_GAIN_1 +198 0x4848 //RX_FDEQ_GAIN_2 +199 0x4848 //RX_FDEQ_GAIN_3 +200 0x4848 //RX_FDEQ_GAIN_4 +201 0x4848 //RX_FDEQ_GAIN_5 +202 0x4848 //RX_FDEQ_GAIN_6 +203 0x4848 //RX_FDEQ_GAIN_7 +204 0x4848 //RX_FDEQ_GAIN_8 +205 0x3C3C //RX_FDEQ_GAIN_9 +206 0x3C3C //RX_FDEQ_GAIN_10 +207 0x3838 //RX_FDEQ_GAIN_11 +208 0x3838 //RX_FDEQ_GAIN_12 +209 0x3030 //RX_FDEQ_GAIN_13 +210 0x4848 //RX_FDEQ_GAIN_14 +211 0x4848 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0202 //RX_FDEQ_BIN_0 +221 0x0203 //RX_FDEQ_BIN_1 +222 0x0303 //RX_FDEQ_BIN_2 +223 0x0304 //RX_FDEQ_BIN_3 +224 0x0405 //RX_FDEQ_BIN_4 +225 0x0506 //RX_FDEQ_BIN_5 +226 0x0708 //RX_FDEQ_BIN_6 +227 0x090A //RX_FDEQ_BIN_7 +228 0x0B0C //RX_FDEQ_BIN_8 +229 0x0D0E //RX_FDEQ_BIN_9 +230 0x0E0F //RX_FDEQ_BIN_10 +231 0x0F10 //RX_FDEQ_BIN_11 +232 0x1011 //RX_FDEQ_BIN_12 +233 0x1112 //RX_FDEQ_BIN_13 +234 0x0000 //RX_FDEQ_BIN_14 +235 0x0000 //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x4000 //RX_FDEQ_RESRV_0 +245 0x0320 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0030 //RX_FDDRC_BAND_MARGIN_1 +248 0x0050 //RX_FDDRC_BAND_MARGIN_2 +249 0x0080 //RX_FDDRC_BAND_MARGIN_3 +250 0x0007 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x5000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x6400 //RX_FDDRC_THRD_3_2 +258 0x6400 //RX_FDDRC_THRD_3_3 +259 0x2000 //RX_FDDRC_SLANT_0_0 +260 0x2000 //RX_FDDRC_SLANT_0_1 +261 0x2000 //RX_FDDRC_SLANT_0_2 +262 0x2000 //RX_FDDRC_SLANT_0_3 +263 0x5333 //RX_FDDRC_SLANT_1_0 +264 0x5333 //RX_FDDRC_SLANT_1_1 +265 0x5333 //RX_FDDRC_SLANT_1_2 +266 0x5333 //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +286 0x0100 //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 +#VOL 6 +163 0x1000 //RX_TDDRC_ALPHA_UP_1 +164 0x1000 //RX_TDDRC_ALPHA_UP_2 +165 0x1000 //RX_TDDRC_ALPHA_UP_3 +166 0x1000 //RX_TDDRC_ALPHA_UP_4 +184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +190 0x7FFF //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +269 0x0000 //RX_TDDRC_THRD_0 +270 0x0000 //RX_TDDRC_THRD_1 +271 0x7FFF //RX_TDDRC_THRD_2 +272 0x7FFF //RX_TDDRC_THRD_3 +273 0x7E70 //RX_TDDRC_SLANT_0 +274 0x7FFF //RX_TDDRC_SLANT_1 +275 0x1000 //RX_TDDRC_ALPHA_UP_0 +276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x199A //RX_TDDRC_HMNC_GAIN +279 0x0001 //RX_TDDRC_SMT_FLAG +280 0x0CCD //RX_TDDRC_SMT_W +281 0x0155 //RX_TDDRC_DRC_GAIN +195 0x001C //RX_FDEQ_SUBNUM +196 0x4848 //RX_FDEQ_GAIN_0 +197 0x4848 //RX_FDEQ_GAIN_1 +198 0x4848 //RX_FDEQ_GAIN_2 +199 0x4848 //RX_FDEQ_GAIN_3 +200 0x4848 //RX_FDEQ_GAIN_4 +201 0x4848 //RX_FDEQ_GAIN_5 +202 0x4848 //RX_FDEQ_GAIN_6 +203 0x4848 //RX_FDEQ_GAIN_7 +204 0x4848 //RX_FDEQ_GAIN_8 +205 0x3C3C //RX_FDEQ_GAIN_9 +206 0x3C3C //RX_FDEQ_GAIN_10 +207 0x3838 //RX_FDEQ_GAIN_11 +208 0x3838 //RX_FDEQ_GAIN_12 +209 0x3030 //RX_FDEQ_GAIN_13 +210 0x4848 //RX_FDEQ_GAIN_14 +211 0x4848 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0202 //RX_FDEQ_BIN_0 +221 0x0203 //RX_FDEQ_BIN_1 +222 0x0303 //RX_FDEQ_BIN_2 +223 0x0304 //RX_FDEQ_BIN_3 +224 0x0405 //RX_FDEQ_BIN_4 +225 0x0506 //RX_FDEQ_BIN_5 +226 0x0708 //RX_FDEQ_BIN_6 +227 0x090A //RX_FDEQ_BIN_7 +228 0x0B0C //RX_FDEQ_BIN_8 +229 0x0D0E //RX_FDEQ_BIN_9 +230 0x0E0F //RX_FDEQ_BIN_10 +231 0x0F10 //RX_FDEQ_BIN_11 +232 0x1011 //RX_FDEQ_BIN_12 +233 0x1112 //RX_FDEQ_BIN_13 +234 0x0000 //RX_FDEQ_BIN_14 +235 0x0000 //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x4000 //RX_FDEQ_RESRV_0 +245 0x0320 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0030 //RX_FDDRC_BAND_MARGIN_1 +248 0x0050 //RX_FDDRC_BAND_MARGIN_2 +249 0x0080 //RX_FDDRC_BAND_MARGIN_3 +250 0x0007 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x5000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x6400 //RX_FDDRC_THRD_3_2 +258 0x6400 //RX_FDDRC_THRD_3_3 +259 0x2000 //RX_FDDRC_SLANT_0_0 +260 0x2000 //RX_FDDRC_SLANT_0_1 +261 0x2000 //RX_FDDRC_SLANT_0_2 +262 0x2000 //RX_FDDRC_SLANT_0_3 +263 0x5333 //RX_FDDRC_SLANT_1_0 +264 0x5333 //RX_FDDRC_SLANT_1_1 +265 0x5333 //RX_FDDRC_SLANT_1_2 +266 0x5333 //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +286 0x0100 //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 #CASE_NAME BLUETOOTH-BTWB_NREC-VOICE_GENERIC-SWB -#PARAM_TYPE TX+RX -#TOTAL_CUSTOM_STEP 7 +#PARAM_MODE Full +#PARAM_TYPE TX+2RX +#TOTAL_CUSTOM_STEP 7+7 #TX 0 0x0001 //TX_OPERATION_MODE_0 1 0x0001 //TX_OPERATION_MODE_1 @@ -33565,20 +50989,20 @@ 248 0xF400 //TX_THR_SN_EST_6 249 0xF600 //TX_THR_SN_EST_7 250 0x0000 //TX_DELTA_THR_SN_EST_0 -251 0x0000 //TX_DELTA_THR_SN_EST_1 +251 0x0200 //TX_DELTA_THR_SN_EST_1 252 0x0200 //TX_DELTA_THR_SN_EST_2 253 0x0200 //TX_DELTA_THR_SN_EST_3 254 0x0200 //TX_DELTA_THR_SN_EST_4 255 0x0200 //TX_DELTA_THR_SN_EST_5 -256 0x0200 //TX_DELTA_THR_SN_EST_6 +256 0x0000 //TX_DELTA_THR_SN_EST_6 257 0x0200 //TX_DELTA_THR_SN_EST_7 258 0x6000 //TX_LAMBDA_NN_EST_0 -259 0x6000 //TX_LAMBDA_NN_EST_1 +259 0x4000 //TX_LAMBDA_NN_EST_1 260 0x4000 //TX_LAMBDA_NN_EST_2 261 0x4000 //TX_LAMBDA_NN_EST_3 262 0x4000 //TX_LAMBDA_NN_EST_4 263 0x4000 //TX_LAMBDA_NN_EST_5 -264 0x4000 //TX_LAMBDA_NN_EST_6 +264 0x6000 //TX_LAMBDA_NN_EST_6 265 0x4000 //TX_LAMBDA_NN_EST_7 266 0x0400 //TX_N_SN_EST 267 0x001E //TX_INBEAM_T @@ -33596,16 +51020,16 @@ 279 0x1000 //TX_B_POST_FLT_0 280 0x1000 //TX_B_POST_FLT_1 281 0x000B //TX_NS_LVL_CTRL_0 -282 0x000F //TX_NS_LVL_CTRL_1 -283 0x0011 //TX_NS_LVL_CTRL_2 +282 0x0011 //TX_NS_LVL_CTRL_1 +283 0x000F //TX_NS_LVL_CTRL_2 284 0x000F //TX_NS_LVL_CTRL_3 285 0x000F //TX_NS_LVL_CTRL_4 286 0x000F //TX_NS_LVL_CTRL_5 287 0x000F //TX_NS_LVL_CTRL_6 288 0x0011 //TX_NS_LVL_CTRL_7 289 0x000C //TX_MIN_GAIN_S_0 -290 0x000C //TX_MIN_GAIN_S_1 -291 0x000F //TX_MIN_GAIN_S_2 +290 0x000F //TX_MIN_GAIN_S_1 +291 0x000C //TX_MIN_GAIN_S_2 292 0x000C //TX_MIN_GAIN_S_3 293 0x000C //TX_MIN_GAIN_S_4 294 0x000C //TX_MIN_GAIN_S_5 @@ -33629,12 +51053,12 @@ 312 0x7FFF //TX_A_POST_FILT_0 313 0x2000 //TX_A_POST_FILT_1 314 0x2000 //TX_A_POST_FILT_S_0 -315 0x4000 //TX_A_POST_FILT_S_1 +315 0x5000 //TX_A_POST_FILT_S_1 316 0x5000 //TX_A_POST_FILT_S_2 317 0x5000 //TX_A_POST_FILT_S_3 318 0x5000 //TX_A_POST_FILT_S_4 319 0x5000 //TX_A_POST_FILT_S_5 -320 0x5000 //TX_A_POST_FILT_S_6 +320 0x4000 //TX_A_POST_FILT_S_6 321 0x5000 //TX_A_POST_FILT_S_7 322 0x1000 //TX_B_POST_FILT_0 323 0x1000 //TX_B_POST_FILT_1 @@ -33694,10 +51118,10 @@ 377 0x7FFF //TX_NOISE_TH_5_4 378 0x044C //TX_NOISE_TH_6 379 0x0014 //TX_MINENOISE_TH -380 0x4000 //TX_MINENOISE_MIC0_TH_MTS -381 0xFFEE //TX_MINENOISE_MIC0_TH_EXP -382 0x6000 //TX_MINENOISE_MIC0_S_TH_MTS -383 0xFFF3 //TX_MINENOISE_MIC0_S_TH_EXP +380 0x4000 //TX_MORENS_TFMASK_TH +381 0xFFEE //TX_DRC_QUIET_FLOOR +382 0x6000 //TX_RATIODTL_CUT_TH +383 0xFFF3 //TX_DT_CUT_K1 384 0x0666 //TX_OUT_ENER_S_TH_CLEAN 385 0x0666 //TX_OUT_ENER_S_TH_LESSCLEAN 386 0x0333 //TX_OUT_ENER_S_TH_NOISY @@ -33705,15 +51129,15 @@ 388 0x0333 //TX_OUT_ENER_TH_SPEECH 389 0x2000 //TX_SN_NPB_GAIN 390 0x0000 //TX_NN_NPB_GAIN -391 0x0000 //TX_CSX_ALPHA_0 -392 0x0000 //TX_CSX_ALPHA_1 -393 0x0000 //TX_CSX_ALPHA_2 -394 0x0000 //TX_CSX_ALPHA_3 -395 0x0800 //TX_MU_ARSP_EST -396 0x00C8 //TX_P_OUTBEAM_MIN_TH +391 0x0000 //TX_POST_MASK_SUP_HSNE +392 0x0000 //TX_TAIL_DET_TH +393 0x0000 //TX_B_LESSCUT_RTO_WTA +394 0x0000 //TX_MEL_G_R +395 0x0800 //TX_SUPHIGH_TH +396 0x00C8 //TX_MASK_G_R 397 0x0002 //TX_EXTRA_NS_L -398 0x0800 //TX_EXTRA_NS_A -399 0x0005 //TX_VR_NOISE_FLOOR_TH +398 0x0800 //TX_C_POST_FLT_MASK +399 0x0005 //TX_A_POST_FLT_WNS 400 0x0148 //TX_MIN_G_LOW300HZ 401 0x0002 //TX_MAXLEVEL_CNG 402 0x00B4 //TX_STN_NOISE_TH @@ -33828,16 +51252,16 @@ 511 0x6666 //TX_MIC_TO_BFGAIN 512 0x0000 //TX_MICTOBFGAIN0 513 0x0000 //TX_FASTMUE_TH -514 0x0000 //TX_DERVB_LEN_0 -515 0x0000 //TX_DERVB_LEN_1 -516 0x0000 //TX_RHO_DERVB -517 0x0000 //TX_MIC_INDX_DERVB -518 0x0000 //TX_MU_DERVB -519 0x0000 //TX_DR_RESRV_0 -520 0x0000 //TX_DR_RESRV_1 -521 0x0000 //TX_DR_RESRV_2 -522 0x0000 //TX_DR_RESRV_3 -523 0x0000 //TX_DR_RESRV_4 +514 0x0000 //TX_DEREVERB_LF_MU +515 0x0000 //TX_DEREVERB_HF_MU +516 0x0000 //TX_DEREVERB_DELAY +517 0x0000 //TX_DEREVERB_COEF_LEN +518 0x0000 //TX_DEREVERB_DNR +519 0x0000 //TX_DEREVERB_ALPHA +520 0x0000 //TX_DEREVERB_BETA +521 0x0000 //TX_GSC_RTOL_TH +522 0x0000 //TX_GSC_RTOH_TH +523 0x0000 //TX_WIDE2_MEANHTH 524 0x0000 //TX_DR_RESRV_5 525 0x0000 //TX_DR_RESRV_6 526 0x0000 //TX_DR_RESRV_7 @@ -34211,8 +51635,73 @@ 894 0xC000 //TX_FASTNS_SSA_THHFL 895 0xCCCC //TX_FASTNS_SSA_THLFH 896 0xD999 //TX_FASTNS_SSA_THHFH +897 0x0000 //TX_SENDFUNC_REG_MICMUTE +898 0x0000 //TX_SENDFUNC_REG_MICMUTE1 +899 0x0000 //TX_MICMUTE_RATIO_THR +900 0x0000 //TX_MICMUTE_AMP_THR +901 0x0000 //TX_MICMUTE_HPF_IND +902 0x0000 //TX_MICMUTE_LOG_EYR_TH +903 0x0000 //TX_MICMUTE_CVG_TIME +904 0x0000 //TX_MICMUTE_RELEASE_TIME +905 0x0000 //TX_MIC_VOLUME_MIC0MUTE +906 0x0000 //TX_MICMUTE_EPD_OFFSET_0 +907 0x0000 //TX_MICMUTE_FRQ_AEC_L +908 0x0000 //TX_MICMUTE_EAD_THR +909 0x0000 //TX_MICMUTE_LAMBDA_CB_NLE +910 0x0000 //TX_MICMUTE_LAMBDA_RE_EST +911 0x0000 //TX_DTD_THR1_MICMUTE_0 +912 0x0000 //TX_DTD_THR1_MICMUTE_1 +913 0x0000 //TX_DTD_THR1_MICMUTE_2 +914 0x0000 //TX_DTD_THR1_MICMUTE_3 +915 0x0000 //TX_DTD_THR2_MICMUTE_0 +916 0x0000 //TX_MICMUTE_MIN_EQ_RE_EST_0 +917 0x0000 //TX_MICMUTE_MIN_EQ_RE_EST_1 +918 0x0000 //TX_MICMUTE_MIN_EQ_RE_EST_2 +919 0x0000 //TX_MICMUTE_MIN_EQ_RE_EST_3 +920 0x0000 //TX_MICMUTE_MIN_EQ_RE_EST_4 +921 0x0000 //TX_MICMUTE_C_POST_FLT +922 0x0000 //TX_MICMUTE_DT_CUT_K +923 0x0000 //TX_MICMUTE_DT_CUT_THR +924 0x0000 //TX_MICMUTE_DT_CUT_K2 +925 0x0000 //TX_MICMUTE_DT_CUT_THR2 +926 0x0000 //TX_MICMUTE_DT2_HOLD_N +927 0x0000 //TX_MICMUTE_RATIODTH_THCUT +928 0x0000 //TX_MICMUTE_B_POST_FLT_ECHOL +929 0x0000 //TX_MICMUTE_B_POST_FLT_ECHOH +930 0x0000 //TX_MICMUTE_C_POST_FLT_MASK +931 0x0000 //TX_MICMUTE_RATIODTL_CUT_TH +932 0x0000 //TX_MICMUTE_DT_CUT_K1 +933 0x0000 //TX_MICMUTE_N2_SN_EST +934 0x0000 //TX_MICMUTE_THR_SN_EST_0 +935 0x0000 //TX_MICMUTE_MIN_G_CTRL_0 +936 0x0000 //TX_MICMUTE_A_POST_FILT_S_0 +937 0x0000 //TX_MICMUTE_B_POST_FILT_0 +938 0x0000 //TX_MIC1RUB_AMP_THR +939 0x0000 //TX_MIC1MUTE_RATIO_THR +940 0x0000 //TX_MIC1MUTE_AMP_THR +941 0x0000 //TX_MIC1MUTE_CVG_TIME +942 0x0000 //TX_MIC1MUTE_RELEASE_TIME +943 0x0000 //TX_AMS_RESRV_01 +944 0x0000 //TX_AMS_RESRV_02 +945 0x0000 //TX_AMS_RESRV_03 +946 0x0000 //TX_AMS_RESRV_04 +947 0x0000 //TX_AMS_RESRV_05 +948 0x0000 //TX_AMS_RESRV_06 +949 0x0000 //TX_AMS_RESRV_07 +950 0x0000 //TX_AMS_RESRV_08 +951 0x0000 //TX_AMS_RESRV_09 +952 0x0000 //TX_AMS_RESRV_10 +953 0x0000 //TX_AMS_RESRV_11 +954 0x0000 //TX_AMS_RESRV_12 +955 0x0000 //TX_AMS_RESRV_13 +956 0x0000 //TX_AMS_RESRV_14 +957 0x0000 //TX_AMS_RESRV_15 +958 0x0000 //TX_AMS_RESRV_16 +959 0x0000 //TX_AMS_RESRV_17 +960 0x0000 //TX_AMS_RESRV_18 +961 0x0000 //TX_AMS_RESRV_19 #RX -0 0x0064 //RX_RECVFUNC_MODE_0 +0 0x2064 //RX_RECVFUNC_MODE_0 1 0x0000 //RX_RECVFUNC_MODE_1 2 0x0003 //RX_SAMPLINGFREQ_SIG 3 0x0003 //RX_SAMPLINGFREQ_PROC @@ -35062,10 +52551,862 @@ 110 0x0000 //RX_FDDRC_RESRV_0 129 0x0100 //RX_SPK_VOL 130 0x0000 //RX_VOL_RESRV_0 +#RX 2 +157 0x2064 //RX_RECVFUNC_MODE_0 +158 0x0000 //RX_RECVFUNC_MODE_1 +159 0x0003 //RX_SAMPLINGFREQ_SIG +160 0x0003 //RX_SAMPLINGFREQ_PROC +161 0x000A //RX_FRAME_SZ +162 0x0000 //RX_DELAY_OPT +163 0x3000 //RX_TDDRC_ALPHA_UP_1 +164 0x3000 //RX_TDDRC_ALPHA_UP_2 +165 0x3000 //RX_TDDRC_ALPHA_UP_3 +166 0x3000 //RX_TDDRC_ALPHA_UP_4 +167 0x0800 //RX_PGA +168 0x7FFF //RX_A_HP +169 0x0000 //RX_B_PE +170 0x1800 //RX_THR_PITCH_DET_0 +171 0x1000 //RX_THR_PITCH_DET_1 +172 0x0800 //RX_THR_PITCH_DET_2 +173 0x0008 //RX_PITCH_BFR_LEN +174 0x0003 //RX_SBD_PITCH_DET +175 0x0100 //RX_PP_RESRV_0 +176 0x0020 //RX_PP_RESRV_1 +177 0x0400 //RX_N_SN_EST +178 0x000C //RX_N2_SN_EST +179 0x0003 //RX_NS_LVL_CTRL +180 0x9000 //RX_THR_SN_EST +181 0x7CCD //RX_LAMBDA_PFILT +182 0x000A //RX_FENS_RESRV_0 +183 0x0190 //RX_FENS_RESRV_1 +184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +187 0x0002 //RX_EXTRA_NS_L +188 0x0800 //RX_EXTRA_NS_A +189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +190 0x7FFF //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +192 0x199A //RX_A_POST_FLT +193 0x0000 //RX_LMT_THRD +194 0x4000 //RX_LMT_ALPHA +195 0x0020 //RX_FDEQ_SUBNUM +196 0x4848 //RX_FDEQ_GAIN_0 +197 0x4848 //RX_FDEQ_GAIN_1 +198 0x4848 //RX_FDEQ_GAIN_2 +199 0x4848 //RX_FDEQ_GAIN_3 +200 0x4848 //RX_FDEQ_GAIN_4 +201 0x4848 //RX_FDEQ_GAIN_5 +202 0x4848 //RX_FDEQ_GAIN_6 +203 0x4848 //RX_FDEQ_GAIN_7 +204 0x4848 //RX_FDEQ_GAIN_8 +205 0x4848 //RX_FDEQ_GAIN_9 +206 0x4848 //RX_FDEQ_GAIN_10 +207 0x4848 //RX_FDEQ_GAIN_11 +208 0x4848 //RX_FDEQ_GAIN_12 +209 0x4848 //RX_FDEQ_GAIN_13 +210 0x4848 //RX_FDEQ_GAIN_14 +211 0x4848 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0202 //RX_FDEQ_BIN_0 +221 0x0203 //RX_FDEQ_BIN_1 +222 0x0303 //RX_FDEQ_BIN_2 +223 0x0304 //RX_FDEQ_BIN_3 +224 0x0405 //RX_FDEQ_BIN_4 +225 0x0506 //RX_FDEQ_BIN_5 +226 0x0708 //RX_FDEQ_BIN_6 +227 0x090A //RX_FDEQ_BIN_7 +228 0x0B0C //RX_FDEQ_BIN_8 +229 0x0D0E //RX_FDEQ_BIN_9 +230 0x1013 //RX_FDEQ_BIN_10 +231 0x1719 //RX_FDEQ_BIN_11 +232 0x1B1E //RX_FDEQ_BIN_12 +233 0x1E1E //RX_FDEQ_BIN_13 +234 0x1E28 //RX_FDEQ_BIN_14 +235 0x282C //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x4000 //RX_FDEQ_RESRV_0 +245 0x0320 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0030 //RX_FDDRC_BAND_MARGIN_1 +248 0x0050 //RX_FDDRC_BAND_MARGIN_2 +249 0x0080 //RX_FDDRC_BAND_MARGIN_3 +250 0x0007 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x5000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x6400 //RX_FDDRC_THRD_3_2 +258 0x6400 //RX_FDDRC_THRD_3_3 +259 0x2000 //RX_FDDRC_SLANT_0_0 +260 0x2000 //RX_FDDRC_SLANT_0_1 +261 0x2000 //RX_FDDRC_SLANT_0_2 +262 0x2000 //RX_FDDRC_SLANT_0_3 +263 0x5333 //RX_FDDRC_SLANT_1_0 +264 0x5333 //RX_FDDRC_SLANT_1_1 +265 0x5333 //RX_FDDRC_SLANT_1_2 +266 0x5333 //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +268 0x0000 //RX_FILTINDX +269 0x0000 //RX_TDDRC_THRD_0 +270 0x0000 //RX_TDDRC_THRD_1 +271 0x7FFF //RX_TDDRC_THRD_2 +272 0x7FFF //RX_TDDRC_THRD_3 +273 0x7FFF //RX_TDDRC_SLANT_0 +274 0x7FFF //RX_TDDRC_SLANT_1 +275 0x3000 //RX_TDDRC_ALPHA_UP_0 +276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x199A //RX_TDDRC_HMNC_GAIN +279 0x0001 //RX_TDDRC_SMT_FLAG +280 0x0CCD //RX_TDDRC_SMT_W +281 0x0155 //RX_TDDRC_DRC_GAIN +282 0x7C00 //RX_LAMBDA_PKA_FP +283 0x2000 //RX_TPKA_FP +284 0x2000 //RX_MIN_G_FP +285 0x0080 //RX_MAX_G_FP +286 0x0100 //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 +288 0x0000 //RX_MAXLEVEL_CNG +289 0x3000 //RX_BWE_UV_TH +290 0x3000 //RX_BWE_UV_TH2 +291 0x1800 //RX_BWE_UV_TH3 +292 0x1000 //RX_BWE_V_TH +293 0x04CD //RX_BWE_GAIN1_V_TH1 +294 0x0F33 //RX_BWE_GAIN1_V_TH2 +295 0x7333 //RX_BWE_UV_EQ +296 0x199A //RX_BWE_V_EQ +297 0x7333 //RX_BWE_TONE_TH +298 0x0004 //RX_BWE_UV_HOLD_T +299 0x6CCD //RX_BWE_GAIN2_ALPHA +300 0x799A //RX_BWE_GAIN3_ALPHA +301 0x001E //RX_BWE_CUTOFF +302 0x3000 //RX_BWE_GAINFILL +303 0x3200 //RX_BWE_MAXTH_TONE +304 0x2000 //RX_BWE_EQ_0 +305 0x2000 //RX_BWE_EQ_1 +306 0x2000 //RX_BWE_EQ_2 +307 0x2000 //RX_BWE_EQ_3 +308 0x2000 //RX_BWE_EQ_4 +309 0x2000 //RX_BWE_EQ_5 +310 0x2000 //RX_BWE_EQ_6 +311 0x0000 //RX_BWE_RESRV_0 +312 0x0000 //RX_BWE_RESRV_1 +313 0x0000 //RX_BWE_RESRV_2 +#VOL 0 +163 0x3000 //RX_TDDRC_ALPHA_UP_1 +164 0x3000 //RX_TDDRC_ALPHA_UP_2 +165 0x3000 //RX_TDDRC_ALPHA_UP_3 +166 0x3000 //RX_TDDRC_ALPHA_UP_4 +184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +190 0x7FFF //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +269 0x0000 //RX_TDDRC_THRD_0 +270 0x0000 //RX_TDDRC_THRD_1 +271 0x7FFF //RX_TDDRC_THRD_2 +272 0x7FFF //RX_TDDRC_THRD_3 +273 0x7FFF //RX_TDDRC_SLANT_0 +274 0x7FFF //RX_TDDRC_SLANT_1 +275 0x3000 //RX_TDDRC_ALPHA_UP_0 +276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x199A //RX_TDDRC_HMNC_GAIN +279 0x0001 //RX_TDDRC_SMT_FLAG +280 0x0CCD //RX_TDDRC_SMT_W +281 0x0155 //RX_TDDRC_DRC_GAIN +195 0x0020 //RX_FDEQ_SUBNUM +196 0x4848 //RX_FDEQ_GAIN_0 +197 0x4848 //RX_FDEQ_GAIN_1 +198 0x4848 //RX_FDEQ_GAIN_2 +199 0x4848 //RX_FDEQ_GAIN_3 +200 0x4848 //RX_FDEQ_GAIN_4 +201 0x4848 //RX_FDEQ_GAIN_5 +202 0x4848 //RX_FDEQ_GAIN_6 +203 0x4848 //RX_FDEQ_GAIN_7 +204 0x4848 //RX_FDEQ_GAIN_8 +205 0x4848 //RX_FDEQ_GAIN_9 +206 0x4848 //RX_FDEQ_GAIN_10 +207 0x4848 //RX_FDEQ_GAIN_11 +208 0x4848 //RX_FDEQ_GAIN_12 +209 0x4848 //RX_FDEQ_GAIN_13 +210 0x4848 //RX_FDEQ_GAIN_14 +211 0x4848 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0202 //RX_FDEQ_BIN_0 +221 0x0203 //RX_FDEQ_BIN_1 +222 0x0303 //RX_FDEQ_BIN_2 +223 0x0304 //RX_FDEQ_BIN_3 +224 0x0405 //RX_FDEQ_BIN_4 +225 0x0506 //RX_FDEQ_BIN_5 +226 0x0708 //RX_FDEQ_BIN_6 +227 0x090A //RX_FDEQ_BIN_7 +228 0x0B0C //RX_FDEQ_BIN_8 +229 0x0D0E //RX_FDEQ_BIN_9 +230 0x1013 //RX_FDEQ_BIN_10 +231 0x1719 //RX_FDEQ_BIN_11 +232 0x1B1E //RX_FDEQ_BIN_12 +233 0x1E1E //RX_FDEQ_BIN_13 +234 0x1E28 //RX_FDEQ_BIN_14 +235 0x282C //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x4000 //RX_FDEQ_RESRV_0 +245 0x0320 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0030 //RX_FDDRC_BAND_MARGIN_1 +248 0x0050 //RX_FDDRC_BAND_MARGIN_2 +249 0x0080 //RX_FDDRC_BAND_MARGIN_3 +250 0x0007 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x5000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x6400 //RX_FDDRC_THRD_3_2 +258 0x6400 //RX_FDDRC_THRD_3_3 +259 0x2000 //RX_FDDRC_SLANT_0_0 +260 0x2000 //RX_FDDRC_SLANT_0_1 +261 0x2000 //RX_FDDRC_SLANT_0_2 +262 0x2000 //RX_FDDRC_SLANT_0_3 +263 0x5333 //RX_FDDRC_SLANT_1_0 +264 0x5333 //RX_FDDRC_SLANT_1_1 +265 0x5333 //RX_FDDRC_SLANT_1_2 +266 0x5333 //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +286 0x0100 //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 +#VOL 1 +163 0x3000 //RX_TDDRC_ALPHA_UP_1 +164 0x3000 //RX_TDDRC_ALPHA_UP_2 +165 0x3000 //RX_TDDRC_ALPHA_UP_3 +166 0x3000 //RX_TDDRC_ALPHA_UP_4 +184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +190 0x7FFF //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +269 0x0000 //RX_TDDRC_THRD_0 +270 0x0000 //RX_TDDRC_THRD_1 +271 0x7FFF //RX_TDDRC_THRD_2 +272 0x7FFF //RX_TDDRC_THRD_3 +273 0x7FFF //RX_TDDRC_SLANT_0 +274 0x7FFF //RX_TDDRC_SLANT_1 +275 0x3000 //RX_TDDRC_ALPHA_UP_0 +276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x199A //RX_TDDRC_HMNC_GAIN +279 0x0001 //RX_TDDRC_SMT_FLAG +280 0x0CCD //RX_TDDRC_SMT_W +281 0x0155 //RX_TDDRC_DRC_GAIN +195 0x0020 //RX_FDEQ_SUBNUM +196 0x4848 //RX_FDEQ_GAIN_0 +197 0x4848 //RX_FDEQ_GAIN_1 +198 0x4848 //RX_FDEQ_GAIN_2 +199 0x4848 //RX_FDEQ_GAIN_3 +200 0x4848 //RX_FDEQ_GAIN_4 +201 0x4848 //RX_FDEQ_GAIN_5 +202 0x4848 //RX_FDEQ_GAIN_6 +203 0x4848 //RX_FDEQ_GAIN_7 +204 0x4848 //RX_FDEQ_GAIN_8 +205 0x4848 //RX_FDEQ_GAIN_9 +206 0x4848 //RX_FDEQ_GAIN_10 +207 0x4848 //RX_FDEQ_GAIN_11 +208 0x4848 //RX_FDEQ_GAIN_12 +209 0x4848 //RX_FDEQ_GAIN_13 +210 0x4848 //RX_FDEQ_GAIN_14 +211 0x4848 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0202 //RX_FDEQ_BIN_0 +221 0x0203 //RX_FDEQ_BIN_1 +222 0x0303 //RX_FDEQ_BIN_2 +223 0x0304 //RX_FDEQ_BIN_3 +224 0x0405 //RX_FDEQ_BIN_4 +225 0x0506 //RX_FDEQ_BIN_5 +226 0x0708 //RX_FDEQ_BIN_6 +227 0x090A //RX_FDEQ_BIN_7 +228 0x0B0C //RX_FDEQ_BIN_8 +229 0x0D0E //RX_FDEQ_BIN_9 +230 0x1013 //RX_FDEQ_BIN_10 +231 0x1719 //RX_FDEQ_BIN_11 +232 0x1B1E //RX_FDEQ_BIN_12 +233 0x1E1E //RX_FDEQ_BIN_13 +234 0x1E28 //RX_FDEQ_BIN_14 +235 0x282C //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x4000 //RX_FDEQ_RESRV_0 +245 0x0320 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0030 //RX_FDDRC_BAND_MARGIN_1 +248 0x0050 //RX_FDDRC_BAND_MARGIN_2 +249 0x0080 //RX_FDDRC_BAND_MARGIN_3 +250 0x0007 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x5000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x6400 //RX_FDDRC_THRD_3_2 +258 0x6400 //RX_FDDRC_THRD_3_3 +259 0x2000 //RX_FDDRC_SLANT_0_0 +260 0x2000 //RX_FDDRC_SLANT_0_1 +261 0x2000 //RX_FDDRC_SLANT_0_2 +262 0x2000 //RX_FDDRC_SLANT_0_3 +263 0x5333 //RX_FDDRC_SLANT_1_0 +264 0x5333 //RX_FDDRC_SLANT_1_1 +265 0x5333 //RX_FDDRC_SLANT_1_2 +266 0x5333 //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +286 0x0100 //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 +#VOL 2 +163 0x3000 //RX_TDDRC_ALPHA_UP_1 +164 0x3000 //RX_TDDRC_ALPHA_UP_2 +165 0x3000 //RX_TDDRC_ALPHA_UP_3 +166 0x3000 //RX_TDDRC_ALPHA_UP_4 +184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +190 0x7FFF //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +269 0x0000 //RX_TDDRC_THRD_0 +270 0x0000 //RX_TDDRC_THRD_1 +271 0x7FFF //RX_TDDRC_THRD_2 +272 0x7FFF //RX_TDDRC_THRD_3 +273 0x7FFF //RX_TDDRC_SLANT_0 +274 0x7FFF //RX_TDDRC_SLANT_1 +275 0x3000 //RX_TDDRC_ALPHA_UP_0 +276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x199A //RX_TDDRC_HMNC_GAIN +279 0x0001 //RX_TDDRC_SMT_FLAG +280 0x0CCD //RX_TDDRC_SMT_W +281 0x0155 //RX_TDDRC_DRC_GAIN +195 0x0020 //RX_FDEQ_SUBNUM +196 0x4848 //RX_FDEQ_GAIN_0 +197 0x4848 //RX_FDEQ_GAIN_1 +198 0x4848 //RX_FDEQ_GAIN_2 +199 0x4848 //RX_FDEQ_GAIN_3 +200 0x4848 //RX_FDEQ_GAIN_4 +201 0x4848 //RX_FDEQ_GAIN_5 +202 0x4848 //RX_FDEQ_GAIN_6 +203 0x4848 //RX_FDEQ_GAIN_7 +204 0x4848 //RX_FDEQ_GAIN_8 +205 0x4848 //RX_FDEQ_GAIN_9 +206 0x4848 //RX_FDEQ_GAIN_10 +207 0x4848 //RX_FDEQ_GAIN_11 +208 0x4848 //RX_FDEQ_GAIN_12 +209 0x4848 //RX_FDEQ_GAIN_13 +210 0x4848 //RX_FDEQ_GAIN_14 +211 0x4848 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0202 //RX_FDEQ_BIN_0 +221 0x0203 //RX_FDEQ_BIN_1 +222 0x0303 //RX_FDEQ_BIN_2 +223 0x0304 //RX_FDEQ_BIN_3 +224 0x0405 //RX_FDEQ_BIN_4 +225 0x0506 //RX_FDEQ_BIN_5 +226 0x0708 //RX_FDEQ_BIN_6 +227 0x090A //RX_FDEQ_BIN_7 +228 0x0B0C //RX_FDEQ_BIN_8 +229 0x0D0E //RX_FDEQ_BIN_9 +230 0x1013 //RX_FDEQ_BIN_10 +231 0x1719 //RX_FDEQ_BIN_11 +232 0x1B1E //RX_FDEQ_BIN_12 +233 0x1E1E //RX_FDEQ_BIN_13 +234 0x1E28 //RX_FDEQ_BIN_14 +235 0x282C //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x4000 //RX_FDEQ_RESRV_0 +245 0x0320 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0030 //RX_FDDRC_BAND_MARGIN_1 +248 0x0050 //RX_FDDRC_BAND_MARGIN_2 +249 0x0080 //RX_FDDRC_BAND_MARGIN_3 +250 0x0007 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x5000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x6400 //RX_FDDRC_THRD_3_2 +258 0x6400 //RX_FDDRC_THRD_3_3 +259 0x2000 //RX_FDDRC_SLANT_0_0 +260 0x2000 //RX_FDDRC_SLANT_0_1 +261 0x2000 //RX_FDDRC_SLANT_0_2 +262 0x2000 //RX_FDDRC_SLANT_0_3 +263 0x5333 //RX_FDDRC_SLANT_1_0 +264 0x5333 //RX_FDDRC_SLANT_1_1 +265 0x5333 //RX_FDDRC_SLANT_1_2 +266 0x5333 //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +286 0x0100 //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 +#VOL 3 +163 0x3000 //RX_TDDRC_ALPHA_UP_1 +164 0x3000 //RX_TDDRC_ALPHA_UP_2 +165 0x3000 //RX_TDDRC_ALPHA_UP_3 +166 0x3000 //RX_TDDRC_ALPHA_UP_4 +184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +190 0x7FFF //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +269 0x0000 //RX_TDDRC_THRD_0 +270 0x0000 //RX_TDDRC_THRD_1 +271 0x7FFF //RX_TDDRC_THRD_2 +272 0x7FFF //RX_TDDRC_THRD_3 +273 0x7FFF //RX_TDDRC_SLANT_0 +274 0x7FFF //RX_TDDRC_SLANT_1 +275 0x3000 //RX_TDDRC_ALPHA_UP_0 +276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x199A //RX_TDDRC_HMNC_GAIN +279 0x0001 //RX_TDDRC_SMT_FLAG +280 0x0CCD //RX_TDDRC_SMT_W +281 0x0155 //RX_TDDRC_DRC_GAIN +195 0x0020 //RX_FDEQ_SUBNUM +196 0x4848 //RX_FDEQ_GAIN_0 +197 0x4848 //RX_FDEQ_GAIN_1 +198 0x4848 //RX_FDEQ_GAIN_2 +199 0x4848 //RX_FDEQ_GAIN_3 +200 0x4848 //RX_FDEQ_GAIN_4 +201 0x4848 //RX_FDEQ_GAIN_5 +202 0x4848 //RX_FDEQ_GAIN_6 +203 0x4848 //RX_FDEQ_GAIN_7 +204 0x4848 //RX_FDEQ_GAIN_8 +205 0x4848 //RX_FDEQ_GAIN_9 +206 0x4848 //RX_FDEQ_GAIN_10 +207 0x4848 //RX_FDEQ_GAIN_11 +208 0x4848 //RX_FDEQ_GAIN_12 +209 0x4848 //RX_FDEQ_GAIN_13 +210 0x4848 //RX_FDEQ_GAIN_14 +211 0x4848 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0202 //RX_FDEQ_BIN_0 +221 0x0203 //RX_FDEQ_BIN_1 +222 0x0303 //RX_FDEQ_BIN_2 +223 0x0304 //RX_FDEQ_BIN_3 +224 0x0405 //RX_FDEQ_BIN_4 +225 0x0506 //RX_FDEQ_BIN_5 +226 0x0708 //RX_FDEQ_BIN_6 +227 0x090A //RX_FDEQ_BIN_7 +228 0x0B0C //RX_FDEQ_BIN_8 +229 0x0D0E //RX_FDEQ_BIN_9 +230 0x1013 //RX_FDEQ_BIN_10 +231 0x1719 //RX_FDEQ_BIN_11 +232 0x1B1E //RX_FDEQ_BIN_12 +233 0x1E1E //RX_FDEQ_BIN_13 +234 0x1E28 //RX_FDEQ_BIN_14 +235 0x282C //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x4000 //RX_FDEQ_RESRV_0 +245 0x0320 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0030 //RX_FDDRC_BAND_MARGIN_1 +248 0x0050 //RX_FDDRC_BAND_MARGIN_2 +249 0x0080 //RX_FDDRC_BAND_MARGIN_3 +250 0x0007 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x5000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x6400 //RX_FDDRC_THRD_3_2 +258 0x6400 //RX_FDDRC_THRD_3_3 +259 0x2000 //RX_FDDRC_SLANT_0_0 +260 0x2000 //RX_FDDRC_SLANT_0_1 +261 0x2000 //RX_FDDRC_SLANT_0_2 +262 0x2000 //RX_FDDRC_SLANT_0_3 +263 0x5333 //RX_FDDRC_SLANT_1_0 +264 0x5333 //RX_FDDRC_SLANT_1_1 +265 0x5333 //RX_FDDRC_SLANT_1_2 +266 0x5333 //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +286 0x0100 //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 +#VOL 4 +163 0x3000 //RX_TDDRC_ALPHA_UP_1 +164 0x3000 //RX_TDDRC_ALPHA_UP_2 +165 0x3000 //RX_TDDRC_ALPHA_UP_3 +166 0x3000 //RX_TDDRC_ALPHA_UP_4 +184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +190 0x7FFF //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +269 0x0000 //RX_TDDRC_THRD_0 +270 0x0000 //RX_TDDRC_THRD_1 +271 0x7FFF //RX_TDDRC_THRD_2 +272 0x7FFF //RX_TDDRC_THRD_3 +273 0x7FFF //RX_TDDRC_SLANT_0 +274 0x7FFF //RX_TDDRC_SLANT_1 +275 0x3000 //RX_TDDRC_ALPHA_UP_0 +276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x199A //RX_TDDRC_HMNC_GAIN +279 0x0001 //RX_TDDRC_SMT_FLAG +280 0x0CCD //RX_TDDRC_SMT_W +281 0x0155 //RX_TDDRC_DRC_GAIN +195 0x0020 //RX_FDEQ_SUBNUM +196 0x4848 //RX_FDEQ_GAIN_0 +197 0x4848 //RX_FDEQ_GAIN_1 +198 0x4848 //RX_FDEQ_GAIN_2 +199 0x4848 //RX_FDEQ_GAIN_3 +200 0x4848 //RX_FDEQ_GAIN_4 +201 0x4848 //RX_FDEQ_GAIN_5 +202 0x4848 //RX_FDEQ_GAIN_6 +203 0x4848 //RX_FDEQ_GAIN_7 +204 0x4848 //RX_FDEQ_GAIN_8 +205 0x4848 //RX_FDEQ_GAIN_9 +206 0x4848 //RX_FDEQ_GAIN_10 +207 0x4848 //RX_FDEQ_GAIN_11 +208 0x4848 //RX_FDEQ_GAIN_12 +209 0x4848 //RX_FDEQ_GAIN_13 +210 0x4848 //RX_FDEQ_GAIN_14 +211 0x4848 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0202 //RX_FDEQ_BIN_0 +221 0x0203 //RX_FDEQ_BIN_1 +222 0x0303 //RX_FDEQ_BIN_2 +223 0x0304 //RX_FDEQ_BIN_3 +224 0x0405 //RX_FDEQ_BIN_4 +225 0x0506 //RX_FDEQ_BIN_5 +226 0x0708 //RX_FDEQ_BIN_6 +227 0x090A //RX_FDEQ_BIN_7 +228 0x0B0C //RX_FDEQ_BIN_8 +229 0x0D0E //RX_FDEQ_BIN_9 +230 0x1013 //RX_FDEQ_BIN_10 +231 0x1719 //RX_FDEQ_BIN_11 +232 0x1B1E //RX_FDEQ_BIN_12 +233 0x1E1E //RX_FDEQ_BIN_13 +234 0x1E28 //RX_FDEQ_BIN_14 +235 0x282C //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x4000 //RX_FDEQ_RESRV_0 +245 0x0320 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0030 //RX_FDDRC_BAND_MARGIN_1 +248 0x0050 //RX_FDDRC_BAND_MARGIN_2 +249 0x0080 //RX_FDDRC_BAND_MARGIN_3 +250 0x0007 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x5000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x6400 //RX_FDDRC_THRD_3_2 +258 0x6400 //RX_FDDRC_THRD_3_3 +259 0x2000 //RX_FDDRC_SLANT_0_0 +260 0x2000 //RX_FDDRC_SLANT_0_1 +261 0x2000 //RX_FDDRC_SLANT_0_2 +262 0x2000 //RX_FDDRC_SLANT_0_3 +263 0x5333 //RX_FDDRC_SLANT_1_0 +264 0x5333 //RX_FDDRC_SLANT_1_1 +265 0x5333 //RX_FDDRC_SLANT_1_2 +266 0x5333 //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +286 0x0100 //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 +#VOL 5 +163 0x3000 //RX_TDDRC_ALPHA_UP_1 +164 0x3000 //RX_TDDRC_ALPHA_UP_2 +165 0x3000 //RX_TDDRC_ALPHA_UP_3 +166 0x3000 //RX_TDDRC_ALPHA_UP_4 +184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +190 0x7FFF //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +269 0x0000 //RX_TDDRC_THRD_0 +270 0x0000 //RX_TDDRC_THRD_1 +271 0x7FFF //RX_TDDRC_THRD_2 +272 0x7FFF //RX_TDDRC_THRD_3 +273 0x7FFF //RX_TDDRC_SLANT_0 +274 0x7FFF //RX_TDDRC_SLANT_1 +275 0x3000 //RX_TDDRC_ALPHA_UP_0 +276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x199A //RX_TDDRC_HMNC_GAIN +279 0x0001 //RX_TDDRC_SMT_FLAG +280 0x0CCD //RX_TDDRC_SMT_W +281 0x0155 //RX_TDDRC_DRC_GAIN +195 0x0020 //RX_FDEQ_SUBNUM +196 0x4848 //RX_FDEQ_GAIN_0 +197 0x4848 //RX_FDEQ_GAIN_1 +198 0x4848 //RX_FDEQ_GAIN_2 +199 0x4848 //RX_FDEQ_GAIN_3 +200 0x4848 //RX_FDEQ_GAIN_4 +201 0x4848 //RX_FDEQ_GAIN_5 +202 0x4848 //RX_FDEQ_GAIN_6 +203 0x4848 //RX_FDEQ_GAIN_7 +204 0x4848 //RX_FDEQ_GAIN_8 +205 0x4848 //RX_FDEQ_GAIN_9 +206 0x4848 //RX_FDEQ_GAIN_10 +207 0x4848 //RX_FDEQ_GAIN_11 +208 0x4848 //RX_FDEQ_GAIN_12 +209 0x4848 //RX_FDEQ_GAIN_13 +210 0x4848 //RX_FDEQ_GAIN_14 +211 0x4848 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0202 //RX_FDEQ_BIN_0 +221 0x0203 //RX_FDEQ_BIN_1 +222 0x0303 //RX_FDEQ_BIN_2 +223 0x0304 //RX_FDEQ_BIN_3 +224 0x0405 //RX_FDEQ_BIN_4 +225 0x0506 //RX_FDEQ_BIN_5 +226 0x0708 //RX_FDEQ_BIN_6 +227 0x090A //RX_FDEQ_BIN_7 +228 0x0B0C //RX_FDEQ_BIN_8 +229 0x0D0E //RX_FDEQ_BIN_9 +230 0x1013 //RX_FDEQ_BIN_10 +231 0x1719 //RX_FDEQ_BIN_11 +232 0x1B1E //RX_FDEQ_BIN_12 +233 0x1E1E //RX_FDEQ_BIN_13 +234 0x1E28 //RX_FDEQ_BIN_14 +235 0x282C //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x4000 //RX_FDEQ_RESRV_0 +245 0x0320 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0030 //RX_FDDRC_BAND_MARGIN_1 +248 0x0050 //RX_FDDRC_BAND_MARGIN_2 +249 0x0080 //RX_FDDRC_BAND_MARGIN_3 +250 0x0007 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x5000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x6400 //RX_FDDRC_THRD_3_2 +258 0x6400 //RX_FDDRC_THRD_3_3 +259 0x2000 //RX_FDDRC_SLANT_0_0 +260 0x2000 //RX_FDDRC_SLANT_0_1 +261 0x2000 //RX_FDDRC_SLANT_0_2 +262 0x2000 //RX_FDDRC_SLANT_0_3 +263 0x5333 //RX_FDDRC_SLANT_1_0 +264 0x5333 //RX_FDDRC_SLANT_1_1 +265 0x5333 //RX_FDDRC_SLANT_1_2 +266 0x5333 //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +286 0x0100 //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 +#VOL 6 +163 0x3000 //RX_TDDRC_ALPHA_UP_1 +164 0x3000 //RX_TDDRC_ALPHA_UP_2 +165 0x3000 //RX_TDDRC_ALPHA_UP_3 +166 0x3000 //RX_TDDRC_ALPHA_UP_4 +184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +190 0x7FFF //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +269 0x0000 //RX_TDDRC_THRD_0 +270 0x0000 //RX_TDDRC_THRD_1 +271 0x7FFF //RX_TDDRC_THRD_2 +272 0x7FFF //RX_TDDRC_THRD_3 +273 0x7FFF //RX_TDDRC_SLANT_0 +274 0x7FFF //RX_TDDRC_SLANT_1 +275 0x3000 //RX_TDDRC_ALPHA_UP_0 +276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x199A //RX_TDDRC_HMNC_GAIN +279 0x0001 //RX_TDDRC_SMT_FLAG +280 0x0CCD //RX_TDDRC_SMT_W +281 0x0155 //RX_TDDRC_DRC_GAIN +195 0x0020 //RX_FDEQ_SUBNUM +196 0x4848 //RX_FDEQ_GAIN_0 +197 0x4848 //RX_FDEQ_GAIN_1 +198 0x4848 //RX_FDEQ_GAIN_2 +199 0x4848 //RX_FDEQ_GAIN_3 +200 0x4848 //RX_FDEQ_GAIN_4 +201 0x4848 //RX_FDEQ_GAIN_5 +202 0x4848 //RX_FDEQ_GAIN_6 +203 0x4848 //RX_FDEQ_GAIN_7 +204 0x4848 //RX_FDEQ_GAIN_8 +205 0x4848 //RX_FDEQ_GAIN_9 +206 0x4848 //RX_FDEQ_GAIN_10 +207 0x4848 //RX_FDEQ_GAIN_11 +208 0x4848 //RX_FDEQ_GAIN_12 +209 0x4848 //RX_FDEQ_GAIN_13 +210 0x4848 //RX_FDEQ_GAIN_14 +211 0x4848 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0202 //RX_FDEQ_BIN_0 +221 0x0203 //RX_FDEQ_BIN_1 +222 0x0303 //RX_FDEQ_BIN_2 +223 0x0304 //RX_FDEQ_BIN_3 +224 0x0405 //RX_FDEQ_BIN_4 +225 0x0506 //RX_FDEQ_BIN_5 +226 0x0708 //RX_FDEQ_BIN_6 +227 0x090A //RX_FDEQ_BIN_7 +228 0x0B0C //RX_FDEQ_BIN_8 +229 0x0D0E //RX_FDEQ_BIN_9 +230 0x1013 //RX_FDEQ_BIN_10 +231 0x1719 //RX_FDEQ_BIN_11 +232 0x1B1E //RX_FDEQ_BIN_12 +233 0x1E1E //RX_FDEQ_BIN_13 +234 0x1E28 //RX_FDEQ_BIN_14 +235 0x282C //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x4000 //RX_FDEQ_RESRV_0 +245 0x0320 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0030 //RX_FDDRC_BAND_MARGIN_1 +248 0x0050 //RX_FDDRC_BAND_MARGIN_2 +249 0x0080 //RX_FDDRC_BAND_MARGIN_3 +250 0x0007 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x5000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x6400 //RX_FDDRC_THRD_3_2 +258 0x6400 //RX_FDDRC_THRD_3_3 +259 0x2000 //RX_FDDRC_SLANT_0_0 +260 0x2000 //RX_FDDRC_SLANT_0_1 +261 0x2000 //RX_FDDRC_SLANT_0_2 +262 0x2000 //RX_FDDRC_SLANT_0_3 +263 0x5333 //RX_FDDRC_SLANT_1_0 +264 0x5333 //RX_FDDRC_SLANT_1_1 +265 0x5333 //RX_FDDRC_SLANT_1_2 +266 0x5333 //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +286 0x0100 //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 #CASE_NAME BLUETOOTH-BTWB_NREC-VOICE_GENERIC-FB -#PARAM_TYPE TX+RX -#TOTAL_CUSTOM_STEP 7 +#PARAM_MODE Full +#PARAM_TYPE TX+2RX +#TOTAL_CUSTOM_STEP 7+7 #TX 0 0x0009 //TX_OPERATION_MODE_0 1 0x0009 //TX_OPERATION_MODE_1 @@ -35318,10 +53659,10 @@ 248 0xF600 //TX_THR_SN_EST_6 249 0xF600 //TX_THR_SN_EST_7 250 0x0200 //TX_DELTA_THR_SN_EST_0 -251 0x0200 //TX_DELTA_THR_SN_EST_1 -252 0x0400 //TX_DELTA_THR_SN_EST_2 -253 0x0300 //TX_DELTA_THR_SN_EST_3 -254 0x0600 //TX_DELTA_THR_SN_EST_4 +251 0x0400 //TX_DELTA_THR_SN_EST_1 +252 0x0300 //TX_DELTA_THR_SN_EST_2 +253 0x0600 //TX_DELTA_THR_SN_EST_3 +254 0x0200 //TX_DELTA_THR_SN_EST_4 255 0x0200 //TX_DELTA_THR_SN_EST_5 256 0x0200 //TX_DELTA_THR_SN_EST_6 257 0x0200 //TX_DELTA_THR_SN_EST_7 @@ -35349,31 +53690,31 @@ 279 0x2000 //TX_B_POST_FLT_0 280 0x2000 //TX_B_POST_FLT_1 281 0x0012 //TX_NS_LVL_CTRL_0 -282 0x0019 //TX_NS_LVL_CTRL_1 +282 0x0016 //TX_NS_LVL_CTRL_1 283 0x0016 //TX_NS_LVL_CTRL_2 -284 0x0016 //TX_NS_LVL_CTRL_3 -285 0x0019 //TX_NS_LVL_CTRL_4 +284 0x0019 //TX_NS_LVL_CTRL_3 +285 0x0010 //TX_NS_LVL_CTRL_4 286 0x0010 //TX_NS_LVL_CTRL_5 -287 0x0010 //TX_NS_LVL_CTRL_6 +287 0x0019 //TX_NS_LVL_CTRL_6 288 0x0010 //TX_NS_LVL_CTRL_7 289 0x000C //TX_MIN_GAIN_S_0 -290 0x0011 //TX_MIN_GAIN_S_1 +290 0x000C //TX_MIN_GAIN_S_1 291 0x000C //TX_MIN_GAIN_S_2 -292 0x000C //TX_MIN_GAIN_S_3 -293 0x000F //TX_MIN_GAIN_S_4 +292 0x000F //TX_MIN_GAIN_S_3 +293 0x000C //TX_MIN_GAIN_S_4 294 0x000C //TX_MIN_GAIN_S_5 -295 0x000C //TX_MIN_GAIN_S_6 +295 0x0011 //TX_MIN_GAIN_S_6 296 0x000C //TX_MIN_GAIN_S_7 297 0x7FFF //TX_NMOS_SUP 298 0x0000 //TX_NS_MAX_PRI_SNR_TH 299 0x0000 //TX_NMOS_SUP_MENSA 300 0x7000 //TX_SNRI_SUP_0 -301 0x6000 //TX_SNRI_SUP_1 +301 0x7000 //TX_SNRI_SUP_1 302 0x7000 //TX_SNRI_SUP_2 -303 0x7000 //TX_SNRI_SUP_3 -304 0x6000 //TX_SNRI_SUP_4 +303 0x6000 //TX_SNRI_SUP_3 +304 0x7FFF //TX_SNRI_SUP_4 305 0x7FFF //TX_SNRI_SUP_5 -306 0x7FFF //TX_SNRI_SUP_6 +306 0x6000 //TX_SNRI_SUP_6 307 0x7FFF //TX_SNRI_SUP_7 308 0x7FFF //TX_THR_LFNS 309 0x0016 //TX_G_LFNS @@ -35390,8 +53731,8 @@ 320 0x6000 //TX_A_POST_FILT_S_6 321 0x6000 //TX_A_POST_FILT_S_7 322 0x2000 //TX_B_POST_FILT_0 -323 0x2000 //TX_B_POST_FILT_1 -324 0x4000 //TX_B_POST_FILT_2 +323 0x4000 //TX_B_POST_FILT_1 +324 0x2000 //TX_B_POST_FILT_2 325 0x2000 //TX_B_POST_FILT_3 326 0x2000 //TX_B_POST_FILT_4 327 0x2000 //TX_B_POST_FILT_5 @@ -35447,10 +53788,10 @@ 377 0x0000 //TX_NOISE_TH_5_4 378 0x02BC //TX_NOISE_TH_6 379 0x0020 //TX_MINENOISE_TH -380 0x4000 //TX_MINENOISE_MIC0_TH_MTS -381 0xFFEE //TX_MINENOISE_MIC0_TH_EXP -382 0x6000 //TX_MINENOISE_MIC0_S_TH_MTS -383 0xFFF3 //TX_MINENOISE_MIC0_S_TH_EXP +380 0x4000 //TX_MORENS_TFMASK_TH +381 0xFFEE //TX_DRC_QUIET_FLOOR +382 0x6000 //TX_RATIODTL_CUT_TH +383 0xFFF3 //TX_DT_CUT_K1 384 0x0666 //TX_OUT_ENER_S_TH_CLEAN 385 0x0666 //TX_OUT_ENER_S_TH_LESSCLEAN 386 0x0333 //TX_OUT_ENER_S_TH_NOISY @@ -35458,15 +53799,15 @@ 388 0x0333 //TX_OUT_ENER_TH_SPEECH 389 0x2000 //TX_SN_NPB_GAIN 390 0x0000 //TX_NN_NPB_GAIN -391 0x0000 //TX_CSX_ALPHA_0 -392 0x0000 //TX_CSX_ALPHA_1 -393 0x0000 //TX_CSX_ALPHA_2 -394 0x0000 //TX_CSX_ALPHA_3 -395 0x0800 //TX_MU_ARSP_EST -396 0x00C8 //TX_P_OUTBEAM_MIN_TH +391 0x0000 //TX_POST_MASK_SUP_HSNE +392 0x0000 //TX_TAIL_DET_TH +393 0x0000 //TX_B_LESSCUT_RTO_WTA +394 0x0000 //TX_MEL_G_R +395 0x0800 //TX_SUPHIGH_TH +396 0x00C8 //TX_MASK_G_R 397 0x0002 //TX_EXTRA_NS_L -398 0x0800 //TX_EXTRA_NS_A -399 0x0005 //TX_VR_NOISE_FLOOR_TH +398 0x0800 //TX_C_POST_FLT_MASK +399 0x0005 //TX_A_POST_FLT_WNS 400 0x0148 //TX_MIN_G_LOW300HZ 401 0x0002 //TX_MAXLEVEL_CNG 402 0x00B4 //TX_STN_NOISE_TH @@ -35581,16 +53922,16 @@ 511 0x6666 //TX_MIC_TO_BFGAIN 512 0x0000 //TX_MICTOBFGAIN0 513 0x0000 //TX_FASTMUE_TH -514 0x0000 //TX_DERVB_LEN_0 -515 0x0000 //TX_DERVB_LEN_1 -516 0x0000 //TX_RHO_DERVB -517 0x0000 //TX_MIC_INDX_DERVB -518 0x0000 //TX_MU_DERVB -519 0x0000 //TX_DR_RESRV_0 -520 0x0000 //TX_DR_RESRV_1 -521 0x0000 //TX_DR_RESRV_2 -522 0x0000 //TX_DR_RESRV_3 -523 0x0000 //TX_DR_RESRV_4 +514 0x0000 //TX_DEREVERB_LF_MU +515 0x0000 //TX_DEREVERB_HF_MU +516 0x0000 //TX_DEREVERB_DELAY +517 0x0000 //TX_DEREVERB_COEF_LEN +518 0x0000 //TX_DEREVERB_DNR +519 0x0000 //TX_DEREVERB_ALPHA +520 0x0000 //TX_DEREVERB_BETA +521 0x0000 //TX_GSC_RTOL_TH +522 0x0000 //TX_GSC_RTOH_TH +523 0x0000 //TX_WIDE2_MEANHTH 524 0x0000 //TX_DR_RESRV_5 525 0x0000 //TX_DR_RESRV_6 526 0x0000 //TX_DR_RESRV_7 @@ -35964,8 +54305,73 @@ 894 0xC000 //TX_FASTNS_SSA_THHFL 895 0xCCCC //TX_FASTNS_SSA_THLFH 896 0xD999 //TX_FASTNS_SSA_THHFH +897 0x0000 //TX_SENDFUNC_REG_MICMUTE +898 0x0000 //TX_SENDFUNC_REG_MICMUTE1 +899 0x0000 //TX_MICMUTE_RATIO_THR +900 0x0000 //TX_MICMUTE_AMP_THR +901 0x0000 //TX_MICMUTE_HPF_IND +902 0x0000 //TX_MICMUTE_LOG_EYR_TH +903 0x0000 //TX_MICMUTE_CVG_TIME +904 0x0000 //TX_MICMUTE_RELEASE_TIME +905 0x0000 //TX_MIC_VOLUME_MIC0MUTE +906 0x0000 //TX_MICMUTE_EPD_OFFSET_0 +907 0x0000 //TX_MICMUTE_FRQ_AEC_L +908 0x0000 //TX_MICMUTE_EAD_THR +909 0x0000 //TX_MICMUTE_LAMBDA_CB_NLE +910 0x0000 //TX_MICMUTE_LAMBDA_RE_EST +911 0x0000 //TX_DTD_THR1_MICMUTE_0 +912 0x0000 //TX_DTD_THR1_MICMUTE_1 +913 0x0000 //TX_DTD_THR1_MICMUTE_2 +914 0x0000 //TX_DTD_THR1_MICMUTE_3 +915 0x0000 //TX_DTD_THR2_MICMUTE_0 +916 0x0000 //TX_MICMUTE_MIN_EQ_RE_EST_0 +917 0x0000 //TX_MICMUTE_MIN_EQ_RE_EST_1 +918 0x0000 //TX_MICMUTE_MIN_EQ_RE_EST_2 +919 0x0000 //TX_MICMUTE_MIN_EQ_RE_EST_3 +920 0x0000 //TX_MICMUTE_MIN_EQ_RE_EST_4 +921 0x0000 //TX_MICMUTE_C_POST_FLT +922 0x0000 //TX_MICMUTE_DT_CUT_K +923 0x0000 //TX_MICMUTE_DT_CUT_THR +924 0x0000 //TX_MICMUTE_DT_CUT_K2 +925 0x0000 //TX_MICMUTE_DT_CUT_THR2 +926 0x0000 //TX_MICMUTE_DT2_HOLD_N +927 0x0000 //TX_MICMUTE_RATIODTH_THCUT +928 0x0000 //TX_MICMUTE_B_POST_FLT_ECHOL +929 0x0000 //TX_MICMUTE_B_POST_FLT_ECHOH +930 0x0000 //TX_MICMUTE_C_POST_FLT_MASK +931 0x0000 //TX_MICMUTE_RATIODTL_CUT_TH +932 0x0000 //TX_MICMUTE_DT_CUT_K1 +933 0x0000 //TX_MICMUTE_N2_SN_EST +934 0x0000 //TX_MICMUTE_THR_SN_EST_0 +935 0x0000 //TX_MICMUTE_MIN_G_CTRL_0 +936 0x0000 //TX_MICMUTE_A_POST_FILT_S_0 +937 0x0000 //TX_MICMUTE_B_POST_FILT_0 +938 0x0000 //TX_MIC1RUB_AMP_THR +939 0x0000 //TX_MIC1MUTE_RATIO_THR +940 0x0000 //TX_MIC1MUTE_AMP_THR +941 0x0000 //TX_MIC1MUTE_CVG_TIME +942 0x0000 //TX_MIC1MUTE_RELEASE_TIME +943 0x0000 //TX_AMS_RESRV_01 +944 0x0000 //TX_AMS_RESRV_02 +945 0x0000 //TX_AMS_RESRV_03 +946 0x0000 //TX_AMS_RESRV_04 +947 0x0000 //TX_AMS_RESRV_05 +948 0x0000 //TX_AMS_RESRV_06 +949 0x0000 //TX_AMS_RESRV_07 +950 0x0000 //TX_AMS_RESRV_08 +951 0x0000 //TX_AMS_RESRV_09 +952 0x0000 //TX_AMS_RESRV_10 +953 0x0000 //TX_AMS_RESRV_11 +954 0x0000 //TX_AMS_RESRV_12 +955 0x0000 //TX_AMS_RESRV_13 +956 0x0000 //TX_AMS_RESRV_14 +957 0x0000 //TX_AMS_RESRV_15 +958 0x0000 //TX_AMS_RESRV_16 +959 0x0000 //TX_AMS_RESRV_17 +960 0x0000 //TX_AMS_RESRV_18 +961 0x0000 //TX_AMS_RESRV_19 #RX -0 0x0064 //RX_RECVFUNC_MODE_0 +0 0x2064 //RX_RECVFUNC_MODE_0 1 0x0000 //RX_RECVFUNC_MODE_1 2 0x0004 //RX_SAMPLINGFREQ_SIG 3 0x0004 //RX_SAMPLINGFREQ_PROC @@ -36815,4 +55221,855 @@ 110 0x0000 //RX_FDDRC_RESRV_0 129 0x0100 //RX_SPK_VOL 130 0x0000 //RX_VOL_RESRV_0 +#RX 2 +157 0x0064 //RX_RECVFUNC_MODE_0 +158 0x0000 //RX_RECVFUNC_MODE_1 +159 0x0004 //RX_SAMPLINGFREQ_SIG +160 0x0004 //RX_SAMPLINGFREQ_PROC +161 0x000A //RX_FRAME_SZ +162 0x0000 //RX_DELAY_OPT +163 0x1000 //RX_TDDRC_ALPHA_UP_1 +164 0x1000 //RX_TDDRC_ALPHA_UP_2 +165 0x1000 //RX_TDDRC_ALPHA_UP_3 +166 0x1000 //RX_TDDRC_ALPHA_UP_4 +167 0x0800 //RX_PGA +168 0x7FFF //RX_A_HP +169 0x4000 //RX_B_PE +170 0x7800 //RX_THR_PITCH_DET_0 +171 0x7000 //RX_THR_PITCH_DET_1 +172 0x6000 //RX_THR_PITCH_DET_2 +173 0x0008 //RX_PITCH_BFR_LEN +174 0x0003 //RX_SBD_PITCH_DET +175 0x0100 //RX_PP_RESRV_0 +176 0x0020 //RX_PP_RESRV_1 +177 0x0500 //RX_N_SN_EST +178 0x000C //RX_N2_SN_EST +179 0x000A //RX_NS_LVL_CTRL +180 0xF600 //RX_THR_SN_EST +181 0x7000 //RX_LAMBDA_PFILT +182 0x000A //RX_FENS_RESRV_0 +183 0x0190 //RX_FENS_RESRV_1 +184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +187 0x0002 //RX_EXTRA_NS_L +188 0x0800 //RX_EXTRA_NS_A +189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +190 0x7FFF //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +192 0x199A //RX_A_POST_FLT +193 0x0000 //RX_LMT_THRD +194 0x4000 //RX_LMT_ALPHA +195 0x0020 //RX_FDEQ_SUBNUM +196 0x4848 //RX_FDEQ_GAIN_0 +197 0x4848 //RX_FDEQ_GAIN_1 +198 0x4848 //RX_FDEQ_GAIN_2 +199 0x4848 //RX_FDEQ_GAIN_3 +200 0x4848 //RX_FDEQ_GAIN_4 +201 0x4848 //RX_FDEQ_GAIN_5 +202 0x4848 //RX_FDEQ_GAIN_6 +203 0x4848 //RX_FDEQ_GAIN_7 +204 0x4848 //RX_FDEQ_GAIN_8 +205 0x4848 //RX_FDEQ_GAIN_9 +206 0x4848 //RX_FDEQ_GAIN_10 +207 0x4848 //RX_FDEQ_GAIN_11 +208 0x4848 //RX_FDEQ_GAIN_12 +209 0x4848 //RX_FDEQ_GAIN_13 +210 0x4848 //RX_FDEQ_GAIN_14 +211 0x4848 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0202 //RX_FDEQ_BIN_0 +221 0x0203 //RX_FDEQ_BIN_1 +222 0x0304 //RX_FDEQ_BIN_2 +223 0x0405 //RX_FDEQ_BIN_3 +224 0x0607 //RX_FDEQ_BIN_4 +225 0x0809 //RX_FDEQ_BIN_5 +226 0x0A0B //RX_FDEQ_BIN_6 +227 0x0C0D //RX_FDEQ_BIN_7 +228 0x0E0F //RX_FDEQ_BIN_8 +229 0x1011 //RX_FDEQ_BIN_9 +230 0x1214 //RX_FDEQ_BIN_10 +231 0x1618 //RX_FDEQ_BIN_11 +232 0x1C1C //RX_FDEQ_BIN_12 +233 0x2020 //RX_FDEQ_BIN_13 +234 0x2020 //RX_FDEQ_BIN_14 +235 0x2011 //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x4000 //RX_FDEQ_RESRV_0 +245 0x0320 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0030 //RX_FDDRC_BAND_MARGIN_1 +248 0x0050 //RX_FDDRC_BAND_MARGIN_2 +249 0x0080 //RX_FDDRC_BAND_MARGIN_3 +250 0x0007 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x5000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x6400 //RX_FDDRC_THRD_3_2 +258 0x6400 //RX_FDDRC_THRD_3_3 +259 0x2000 //RX_FDDRC_SLANT_0_0 +260 0x2000 //RX_FDDRC_SLANT_0_1 +261 0x2000 //RX_FDDRC_SLANT_0_2 +262 0x2000 //RX_FDDRC_SLANT_0_3 +263 0x5333 //RX_FDDRC_SLANT_1_0 +264 0x5333 //RX_FDDRC_SLANT_1_1 +265 0x5333 //RX_FDDRC_SLANT_1_2 +266 0x5333 //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +268 0x0000 //RX_FILTINDX +269 0x0000 //RX_TDDRC_THRD_0 +270 0x0000 //RX_TDDRC_THRD_1 +271 0x7FFF //RX_TDDRC_THRD_2 +272 0x7FFF //RX_TDDRC_THRD_3 +273 0x7FFF //RX_TDDRC_SLANT_0 +274 0x7FFF //RX_TDDRC_SLANT_1 +275 0x1000 //RX_TDDRC_ALPHA_UP_0 +276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x199A //RX_TDDRC_HMNC_GAIN +279 0x0001 //RX_TDDRC_SMT_FLAG +280 0x0CCD //RX_TDDRC_SMT_W +281 0x0155 //RX_TDDRC_DRC_GAIN +282 0x7C00 //RX_LAMBDA_PKA_FP +283 0x2000 //RX_TPKA_FP +284 0x2000 //RX_MIN_G_FP +285 0x0080 //RX_MAX_G_FP +286 0x0100 //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 +288 0x0000 //RX_MAXLEVEL_CNG +289 0x3000 //RX_BWE_UV_TH +290 0x3000 //RX_BWE_UV_TH2 +291 0x1800 //RX_BWE_UV_TH3 +292 0x1000 //RX_BWE_V_TH +293 0x04CD //RX_BWE_GAIN1_V_TH1 +294 0x0F33 //RX_BWE_GAIN1_V_TH2 +295 0x7333 //RX_BWE_UV_EQ +296 0x199A //RX_BWE_V_EQ +297 0x7333 //RX_BWE_TONE_TH +298 0x0004 //RX_BWE_UV_HOLD_T +299 0x6CCD //RX_BWE_GAIN2_ALPHA +300 0x799A //RX_BWE_GAIN3_ALPHA +301 0x001E //RX_BWE_CUTOFF +302 0x3000 //RX_BWE_GAINFILL +303 0x3200 //RX_BWE_MAXTH_TONE +304 0x2000 //RX_BWE_EQ_0 +305 0x2000 //RX_BWE_EQ_1 +306 0x2000 //RX_BWE_EQ_2 +307 0x2000 //RX_BWE_EQ_3 +308 0x2000 //RX_BWE_EQ_4 +309 0x2000 //RX_BWE_EQ_5 +310 0x2000 //RX_BWE_EQ_6 +311 0x0000 //RX_BWE_RESRV_0 +312 0x0000 //RX_BWE_RESRV_1 +313 0x0000 //RX_BWE_RESRV_2 +#VOL 0 +163 0x1000 //RX_TDDRC_ALPHA_UP_1 +164 0x1000 //RX_TDDRC_ALPHA_UP_2 +165 0x1000 //RX_TDDRC_ALPHA_UP_3 +166 0x1000 //RX_TDDRC_ALPHA_UP_4 +184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +190 0x7FFF //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +269 0x0000 //RX_TDDRC_THRD_0 +270 0x0000 //RX_TDDRC_THRD_1 +271 0x7FFF //RX_TDDRC_THRD_2 +272 0x7FFF //RX_TDDRC_THRD_3 +273 0x7FFF //RX_TDDRC_SLANT_0 +274 0x7FFF //RX_TDDRC_SLANT_1 +275 0x1000 //RX_TDDRC_ALPHA_UP_0 +276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x199A //RX_TDDRC_HMNC_GAIN +279 0x0001 //RX_TDDRC_SMT_FLAG +280 0x0CCD //RX_TDDRC_SMT_W +281 0x0155 //RX_TDDRC_DRC_GAIN +195 0x0020 //RX_FDEQ_SUBNUM +196 0x4848 //RX_FDEQ_GAIN_0 +197 0x4848 //RX_FDEQ_GAIN_1 +198 0x4848 //RX_FDEQ_GAIN_2 +199 0x4848 //RX_FDEQ_GAIN_3 +200 0x4848 //RX_FDEQ_GAIN_4 +201 0x4848 //RX_FDEQ_GAIN_5 +202 0x4848 //RX_FDEQ_GAIN_6 +203 0x4848 //RX_FDEQ_GAIN_7 +204 0x4848 //RX_FDEQ_GAIN_8 +205 0x4848 //RX_FDEQ_GAIN_9 +206 0x4848 //RX_FDEQ_GAIN_10 +207 0x4848 //RX_FDEQ_GAIN_11 +208 0x4848 //RX_FDEQ_GAIN_12 +209 0x4848 //RX_FDEQ_GAIN_13 +210 0x4848 //RX_FDEQ_GAIN_14 +211 0x4848 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0202 //RX_FDEQ_BIN_0 +221 0x0203 //RX_FDEQ_BIN_1 +222 0x0304 //RX_FDEQ_BIN_2 +223 0x0405 //RX_FDEQ_BIN_3 +224 0x0607 //RX_FDEQ_BIN_4 +225 0x0809 //RX_FDEQ_BIN_5 +226 0x0A0B //RX_FDEQ_BIN_6 +227 0x0C0D //RX_FDEQ_BIN_7 +228 0x0E0F //RX_FDEQ_BIN_8 +229 0x1011 //RX_FDEQ_BIN_9 +230 0x1214 //RX_FDEQ_BIN_10 +231 0x1618 //RX_FDEQ_BIN_11 +232 0x1C1C //RX_FDEQ_BIN_12 +233 0x2020 //RX_FDEQ_BIN_13 +234 0x2020 //RX_FDEQ_BIN_14 +235 0x2011 //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x4000 //RX_FDEQ_RESRV_0 +245 0x0320 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0030 //RX_FDDRC_BAND_MARGIN_1 +248 0x0050 //RX_FDDRC_BAND_MARGIN_2 +249 0x0080 //RX_FDDRC_BAND_MARGIN_3 +250 0x0007 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x5000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x6400 //RX_FDDRC_THRD_3_2 +258 0x6400 //RX_FDDRC_THRD_3_3 +259 0x2000 //RX_FDDRC_SLANT_0_0 +260 0x2000 //RX_FDDRC_SLANT_0_1 +261 0x2000 //RX_FDDRC_SLANT_0_2 +262 0x2000 //RX_FDDRC_SLANT_0_3 +263 0x5333 //RX_FDDRC_SLANT_1_0 +264 0x5333 //RX_FDDRC_SLANT_1_1 +265 0x5333 //RX_FDDRC_SLANT_1_2 +266 0x5333 //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +286 0x0100 //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 +#VOL 1 +163 0x1000 //RX_TDDRC_ALPHA_UP_1 +164 0x1000 //RX_TDDRC_ALPHA_UP_2 +165 0x1000 //RX_TDDRC_ALPHA_UP_3 +166 0x1000 //RX_TDDRC_ALPHA_UP_4 +184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +190 0x7FFF //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +269 0x0000 //RX_TDDRC_THRD_0 +270 0x0000 //RX_TDDRC_THRD_1 +271 0x7FFF //RX_TDDRC_THRD_2 +272 0x7FFF //RX_TDDRC_THRD_3 +273 0x7FFF //RX_TDDRC_SLANT_0 +274 0x7FFF //RX_TDDRC_SLANT_1 +275 0x1000 //RX_TDDRC_ALPHA_UP_0 +276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x199A //RX_TDDRC_HMNC_GAIN +279 0x0001 //RX_TDDRC_SMT_FLAG +280 0x0CCD //RX_TDDRC_SMT_W +281 0x0155 //RX_TDDRC_DRC_GAIN +195 0x0020 //RX_FDEQ_SUBNUM +196 0x4848 //RX_FDEQ_GAIN_0 +197 0x4848 //RX_FDEQ_GAIN_1 +198 0x4848 //RX_FDEQ_GAIN_2 +199 0x4848 //RX_FDEQ_GAIN_3 +200 0x4848 //RX_FDEQ_GAIN_4 +201 0x4848 //RX_FDEQ_GAIN_5 +202 0x4848 //RX_FDEQ_GAIN_6 +203 0x4848 //RX_FDEQ_GAIN_7 +204 0x4848 //RX_FDEQ_GAIN_8 +205 0x4848 //RX_FDEQ_GAIN_9 +206 0x4848 //RX_FDEQ_GAIN_10 +207 0x4848 //RX_FDEQ_GAIN_11 +208 0x4848 //RX_FDEQ_GAIN_12 +209 0x4848 //RX_FDEQ_GAIN_13 +210 0x4848 //RX_FDEQ_GAIN_14 +211 0x4848 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0202 //RX_FDEQ_BIN_0 +221 0x0203 //RX_FDEQ_BIN_1 +222 0x0304 //RX_FDEQ_BIN_2 +223 0x0405 //RX_FDEQ_BIN_3 +224 0x0607 //RX_FDEQ_BIN_4 +225 0x0809 //RX_FDEQ_BIN_5 +226 0x0A0B //RX_FDEQ_BIN_6 +227 0x0C0D //RX_FDEQ_BIN_7 +228 0x0E0F //RX_FDEQ_BIN_8 +229 0x1011 //RX_FDEQ_BIN_9 +230 0x1214 //RX_FDEQ_BIN_10 +231 0x1618 //RX_FDEQ_BIN_11 +232 0x1C1C //RX_FDEQ_BIN_12 +233 0x2020 //RX_FDEQ_BIN_13 +234 0x2020 //RX_FDEQ_BIN_14 +235 0x2011 //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x4000 //RX_FDEQ_RESRV_0 +245 0x0320 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0030 //RX_FDDRC_BAND_MARGIN_1 +248 0x0050 //RX_FDDRC_BAND_MARGIN_2 +249 0x0080 //RX_FDDRC_BAND_MARGIN_3 +250 0x0007 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x5000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x6400 //RX_FDDRC_THRD_3_2 +258 0x6400 //RX_FDDRC_THRD_3_3 +259 0x2000 //RX_FDDRC_SLANT_0_0 +260 0x2000 //RX_FDDRC_SLANT_0_1 +261 0x2000 //RX_FDDRC_SLANT_0_2 +262 0x2000 //RX_FDDRC_SLANT_0_3 +263 0x5333 //RX_FDDRC_SLANT_1_0 +264 0x5333 //RX_FDDRC_SLANT_1_1 +265 0x5333 //RX_FDDRC_SLANT_1_2 +266 0x5333 //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +286 0x0100 //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 +#VOL 2 +163 0x1000 //RX_TDDRC_ALPHA_UP_1 +164 0x1000 //RX_TDDRC_ALPHA_UP_2 +165 0x1000 //RX_TDDRC_ALPHA_UP_3 +166 0x1000 //RX_TDDRC_ALPHA_UP_4 +184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +190 0x7FFF //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +269 0x0000 //RX_TDDRC_THRD_0 +270 0x0000 //RX_TDDRC_THRD_1 +271 0x7FFF //RX_TDDRC_THRD_2 +272 0x7FFF //RX_TDDRC_THRD_3 +273 0x7FFF //RX_TDDRC_SLANT_0 +274 0x7FFF //RX_TDDRC_SLANT_1 +275 0x1000 //RX_TDDRC_ALPHA_UP_0 +276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x199A //RX_TDDRC_HMNC_GAIN +279 0x0001 //RX_TDDRC_SMT_FLAG +280 0x0CCD //RX_TDDRC_SMT_W +281 0x0155 //RX_TDDRC_DRC_GAIN +195 0x0020 //RX_FDEQ_SUBNUM +196 0x4848 //RX_FDEQ_GAIN_0 +197 0x4848 //RX_FDEQ_GAIN_1 +198 0x4848 //RX_FDEQ_GAIN_2 +199 0x4848 //RX_FDEQ_GAIN_3 +200 0x4848 //RX_FDEQ_GAIN_4 +201 0x4848 //RX_FDEQ_GAIN_5 +202 0x4848 //RX_FDEQ_GAIN_6 +203 0x4848 //RX_FDEQ_GAIN_7 +204 0x4848 //RX_FDEQ_GAIN_8 +205 0x4848 //RX_FDEQ_GAIN_9 +206 0x4848 //RX_FDEQ_GAIN_10 +207 0x4848 //RX_FDEQ_GAIN_11 +208 0x4848 //RX_FDEQ_GAIN_12 +209 0x4848 //RX_FDEQ_GAIN_13 +210 0x4848 //RX_FDEQ_GAIN_14 +211 0x4848 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0202 //RX_FDEQ_BIN_0 +221 0x0203 //RX_FDEQ_BIN_1 +222 0x0304 //RX_FDEQ_BIN_2 +223 0x0405 //RX_FDEQ_BIN_3 +224 0x0607 //RX_FDEQ_BIN_4 +225 0x0809 //RX_FDEQ_BIN_5 +226 0x0A0B //RX_FDEQ_BIN_6 +227 0x0C0D //RX_FDEQ_BIN_7 +228 0x0E0F //RX_FDEQ_BIN_8 +229 0x1011 //RX_FDEQ_BIN_9 +230 0x1214 //RX_FDEQ_BIN_10 +231 0x1618 //RX_FDEQ_BIN_11 +232 0x1C1C //RX_FDEQ_BIN_12 +233 0x2020 //RX_FDEQ_BIN_13 +234 0x2020 //RX_FDEQ_BIN_14 +235 0x2011 //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x4000 //RX_FDEQ_RESRV_0 +245 0x0320 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0030 //RX_FDDRC_BAND_MARGIN_1 +248 0x0050 //RX_FDDRC_BAND_MARGIN_2 +249 0x0080 //RX_FDDRC_BAND_MARGIN_3 +250 0x0007 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x5000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x6400 //RX_FDDRC_THRD_3_2 +258 0x6400 //RX_FDDRC_THRD_3_3 +259 0x2000 //RX_FDDRC_SLANT_0_0 +260 0x2000 //RX_FDDRC_SLANT_0_1 +261 0x2000 //RX_FDDRC_SLANT_0_2 +262 0x2000 //RX_FDDRC_SLANT_0_3 +263 0x5333 //RX_FDDRC_SLANT_1_0 +264 0x5333 //RX_FDDRC_SLANT_1_1 +265 0x5333 //RX_FDDRC_SLANT_1_2 +266 0x5333 //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +286 0x0100 //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 +#VOL 3 +163 0x1000 //RX_TDDRC_ALPHA_UP_1 +164 0x1000 //RX_TDDRC_ALPHA_UP_2 +165 0x1000 //RX_TDDRC_ALPHA_UP_3 +166 0x1000 //RX_TDDRC_ALPHA_UP_4 +184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +190 0x7FFF //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +269 0x0000 //RX_TDDRC_THRD_0 +270 0x0000 //RX_TDDRC_THRD_1 +271 0x7FFF //RX_TDDRC_THRD_2 +272 0x7FFF //RX_TDDRC_THRD_3 +273 0x7FFF //RX_TDDRC_SLANT_0 +274 0x7FFF //RX_TDDRC_SLANT_1 +275 0x1000 //RX_TDDRC_ALPHA_UP_0 +276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x199A //RX_TDDRC_HMNC_GAIN +279 0x0001 //RX_TDDRC_SMT_FLAG +280 0x0CCD //RX_TDDRC_SMT_W +281 0x0155 //RX_TDDRC_DRC_GAIN +195 0x0020 //RX_FDEQ_SUBNUM +196 0x4848 //RX_FDEQ_GAIN_0 +197 0x4848 //RX_FDEQ_GAIN_1 +198 0x4848 //RX_FDEQ_GAIN_2 +199 0x4848 //RX_FDEQ_GAIN_3 +200 0x4848 //RX_FDEQ_GAIN_4 +201 0x4848 //RX_FDEQ_GAIN_5 +202 0x4848 //RX_FDEQ_GAIN_6 +203 0x4848 //RX_FDEQ_GAIN_7 +204 0x4848 //RX_FDEQ_GAIN_8 +205 0x4848 //RX_FDEQ_GAIN_9 +206 0x4848 //RX_FDEQ_GAIN_10 +207 0x4848 //RX_FDEQ_GAIN_11 +208 0x4848 //RX_FDEQ_GAIN_12 +209 0x4848 //RX_FDEQ_GAIN_13 +210 0x4848 //RX_FDEQ_GAIN_14 +211 0x4848 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0202 //RX_FDEQ_BIN_0 +221 0x0203 //RX_FDEQ_BIN_1 +222 0x0304 //RX_FDEQ_BIN_2 +223 0x0405 //RX_FDEQ_BIN_3 +224 0x0607 //RX_FDEQ_BIN_4 +225 0x0809 //RX_FDEQ_BIN_5 +226 0x0A0B //RX_FDEQ_BIN_6 +227 0x0C0D //RX_FDEQ_BIN_7 +228 0x0E0F //RX_FDEQ_BIN_8 +229 0x1011 //RX_FDEQ_BIN_9 +230 0x1214 //RX_FDEQ_BIN_10 +231 0x1618 //RX_FDEQ_BIN_11 +232 0x1C1C //RX_FDEQ_BIN_12 +233 0x2020 //RX_FDEQ_BIN_13 +234 0x2020 //RX_FDEQ_BIN_14 +235 0x2011 //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x4000 //RX_FDEQ_RESRV_0 +245 0x0320 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0030 //RX_FDDRC_BAND_MARGIN_1 +248 0x0050 //RX_FDDRC_BAND_MARGIN_2 +249 0x0080 //RX_FDDRC_BAND_MARGIN_3 +250 0x0007 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x5000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x6400 //RX_FDDRC_THRD_3_2 +258 0x6400 //RX_FDDRC_THRD_3_3 +259 0x2000 //RX_FDDRC_SLANT_0_0 +260 0x2000 //RX_FDDRC_SLANT_0_1 +261 0x2000 //RX_FDDRC_SLANT_0_2 +262 0x2000 //RX_FDDRC_SLANT_0_3 +263 0x5333 //RX_FDDRC_SLANT_1_0 +264 0x5333 //RX_FDDRC_SLANT_1_1 +265 0x5333 //RX_FDDRC_SLANT_1_2 +266 0x5333 //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +286 0x0100 //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 +#VOL 4 +163 0x1000 //RX_TDDRC_ALPHA_UP_1 +164 0x1000 //RX_TDDRC_ALPHA_UP_2 +165 0x1000 //RX_TDDRC_ALPHA_UP_3 +166 0x1000 //RX_TDDRC_ALPHA_UP_4 +184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +190 0x7FFF //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +269 0x0000 //RX_TDDRC_THRD_0 +270 0x0000 //RX_TDDRC_THRD_1 +271 0x7FFF //RX_TDDRC_THRD_2 +272 0x7FFF //RX_TDDRC_THRD_3 +273 0x7FFF //RX_TDDRC_SLANT_0 +274 0x7FFF //RX_TDDRC_SLANT_1 +275 0x1000 //RX_TDDRC_ALPHA_UP_0 +276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x199A //RX_TDDRC_HMNC_GAIN +279 0x0001 //RX_TDDRC_SMT_FLAG +280 0x0CCD //RX_TDDRC_SMT_W +281 0x0155 //RX_TDDRC_DRC_GAIN +195 0x0020 //RX_FDEQ_SUBNUM +196 0x4848 //RX_FDEQ_GAIN_0 +197 0x4848 //RX_FDEQ_GAIN_1 +198 0x4848 //RX_FDEQ_GAIN_2 +199 0x4848 //RX_FDEQ_GAIN_3 +200 0x4848 //RX_FDEQ_GAIN_4 +201 0x4848 //RX_FDEQ_GAIN_5 +202 0x4848 //RX_FDEQ_GAIN_6 +203 0x4848 //RX_FDEQ_GAIN_7 +204 0x4848 //RX_FDEQ_GAIN_8 +205 0x4848 //RX_FDEQ_GAIN_9 +206 0x4848 //RX_FDEQ_GAIN_10 +207 0x4848 //RX_FDEQ_GAIN_11 +208 0x4848 //RX_FDEQ_GAIN_12 +209 0x4848 //RX_FDEQ_GAIN_13 +210 0x4848 //RX_FDEQ_GAIN_14 +211 0x4848 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0202 //RX_FDEQ_BIN_0 +221 0x0203 //RX_FDEQ_BIN_1 +222 0x0304 //RX_FDEQ_BIN_2 +223 0x0405 //RX_FDEQ_BIN_3 +224 0x0607 //RX_FDEQ_BIN_4 +225 0x0809 //RX_FDEQ_BIN_5 +226 0x0A0B //RX_FDEQ_BIN_6 +227 0x0C0D //RX_FDEQ_BIN_7 +228 0x0E0F //RX_FDEQ_BIN_8 +229 0x1011 //RX_FDEQ_BIN_9 +230 0x1214 //RX_FDEQ_BIN_10 +231 0x1618 //RX_FDEQ_BIN_11 +232 0x1C1C //RX_FDEQ_BIN_12 +233 0x2020 //RX_FDEQ_BIN_13 +234 0x2020 //RX_FDEQ_BIN_14 +235 0x2011 //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x4000 //RX_FDEQ_RESRV_0 +245 0x0320 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0030 //RX_FDDRC_BAND_MARGIN_1 +248 0x0050 //RX_FDDRC_BAND_MARGIN_2 +249 0x0080 //RX_FDDRC_BAND_MARGIN_3 +250 0x0007 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x5000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x6400 //RX_FDDRC_THRD_3_2 +258 0x6400 //RX_FDDRC_THRD_3_3 +259 0x2000 //RX_FDDRC_SLANT_0_0 +260 0x2000 //RX_FDDRC_SLANT_0_1 +261 0x2000 //RX_FDDRC_SLANT_0_2 +262 0x2000 //RX_FDDRC_SLANT_0_3 +263 0x5333 //RX_FDDRC_SLANT_1_0 +264 0x5333 //RX_FDDRC_SLANT_1_1 +265 0x5333 //RX_FDDRC_SLANT_1_2 +266 0x5333 //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +286 0x0100 //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 +#VOL 5 +163 0x1000 //RX_TDDRC_ALPHA_UP_1 +164 0x1000 //RX_TDDRC_ALPHA_UP_2 +165 0x1000 //RX_TDDRC_ALPHA_UP_3 +166 0x1000 //RX_TDDRC_ALPHA_UP_4 +184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +190 0x7FFF //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +269 0x0000 //RX_TDDRC_THRD_0 +270 0x0000 //RX_TDDRC_THRD_1 +271 0x7FFF //RX_TDDRC_THRD_2 +272 0x7FFF //RX_TDDRC_THRD_3 +273 0x7FFF //RX_TDDRC_SLANT_0 +274 0x7FFF //RX_TDDRC_SLANT_1 +275 0x1000 //RX_TDDRC_ALPHA_UP_0 +276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x199A //RX_TDDRC_HMNC_GAIN +279 0x0001 //RX_TDDRC_SMT_FLAG +280 0x0CCD //RX_TDDRC_SMT_W +281 0x0155 //RX_TDDRC_DRC_GAIN +195 0x0020 //RX_FDEQ_SUBNUM +196 0x4848 //RX_FDEQ_GAIN_0 +197 0x4848 //RX_FDEQ_GAIN_1 +198 0x4848 //RX_FDEQ_GAIN_2 +199 0x4848 //RX_FDEQ_GAIN_3 +200 0x4848 //RX_FDEQ_GAIN_4 +201 0x4848 //RX_FDEQ_GAIN_5 +202 0x4848 //RX_FDEQ_GAIN_6 +203 0x4848 //RX_FDEQ_GAIN_7 +204 0x4848 //RX_FDEQ_GAIN_8 +205 0x4848 //RX_FDEQ_GAIN_9 +206 0x4848 //RX_FDEQ_GAIN_10 +207 0x4848 //RX_FDEQ_GAIN_11 +208 0x4848 //RX_FDEQ_GAIN_12 +209 0x4848 //RX_FDEQ_GAIN_13 +210 0x4848 //RX_FDEQ_GAIN_14 +211 0x4848 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0202 //RX_FDEQ_BIN_0 +221 0x0203 //RX_FDEQ_BIN_1 +222 0x0304 //RX_FDEQ_BIN_2 +223 0x0405 //RX_FDEQ_BIN_3 +224 0x0607 //RX_FDEQ_BIN_4 +225 0x0809 //RX_FDEQ_BIN_5 +226 0x0A0B //RX_FDEQ_BIN_6 +227 0x0C0D //RX_FDEQ_BIN_7 +228 0x0E0F //RX_FDEQ_BIN_8 +229 0x1011 //RX_FDEQ_BIN_9 +230 0x1214 //RX_FDEQ_BIN_10 +231 0x1618 //RX_FDEQ_BIN_11 +232 0x1C1C //RX_FDEQ_BIN_12 +233 0x2020 //RX_FDEQ_BIN_13 +234 0x2020 //RX_FDEQ_BIN_14 +235 0x2011 //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x4000 //RX_FDEQ_RESRV_0 +245 0x0320 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0030 //RX_FDDRC_BAND_MARGIN_1 +248 0x0050 //RX_FDDRC_BAND_MARGIN_2 +249 0x0080 //RX_FDDRC_BAND_MARGIN_3 +250 0x0007 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x5000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x6400 //RX_FDDRC_THRD_3_2 +258 0x6400 //RX_FDDRC_THRD_3_3 +259 0x2000 //RX_FDDRC_SLANT_0_0 +260 0x2000 //RX_FDDRC_SLANT_0_1 +261 0x2000 //RX_FDDRC_SLANT_0_2 +262 0x2000 //RX_FDDRC_SLANT_0_3 +263 0x5333 //RX_FDDRC_SLANT_1_0 +264 0x5333 //RX_FDDRC_SLANT_1_1 +265 0x5333 //RX_FDDRC_SLANT_1_2 +266 0x5333 //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +286 0x0100 //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 +#VOL 6 +163 0x1000 //RX_TDDRC_ALPHA_UP_1 +164 0x1000 //RX_TDDRC_ALPHA_UP_2 +165 0x1000 //RX_TDDRC_ALPHA_UP_3 +166 0x1000 //RX_TDDRC_ALPHA_UP_4 +184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +190 0x7FFF //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +269 0x0000 //RX_TDDRC_THRD_0 +270 0x0000 //RX_TDDRC_THRD_1 +271 0x7FFF //RX_TDDRC_THRD_2 +272 0x7FFF //RX_TDDRC_THRD_3 +273 0x7FFF //RX_TDDRC_SLANT_0 +274 0x7FFF //RX_TDDRC_SLANT_1 +275 0x1000 //RX_TDDRC_ALPHA_UP_0 +276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x199A //RX_TDDRC_HMNC_GAIN +279 0x0001 //RX_TDDRC_SMT_FLAG +280 0x0CCD //RX_TDDRC_SMT_W +281 0x0155 //RX_TDDRC_DRC_GAIN +195 0x0020 //RX_FDEQ_SUBNUM +196 0x4848 //RX_FDEQ_GAIN_0 +197 0x4848 //RX_FDEQ_GAIN_1 +198 0x4848 //RX_FDEQ_GAIN_2 +199 0x4848 //RX_FDEQ_GAIN_3 +200 0x4848 //RX_FDEQ_GAIN_4 +201 0x4848 //RX_FDEQ_GAIN_5 +202 0x4848 //RX_FDEQ_GAIN_6 +203 0x4848 //RX_FDEQ_GAIN_7 +204 0x4848 //RX_FDEQ_GAIN_8 +205 0x4848 //RX_FDEQ_GAIN_9 +206 0x4848 //RX_FDEQ_GAIN_10 +207 0x4848 //RX_FDEQ_GAIN_11 +208 0x4848 //RX_FDEQ_GAIN_12 +209 0x4848 //RX_FDEQ_GAIN_13 +210 0x4848 //RX_FDEQ_GAIN_14 +211 0x4848 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0202 //RX_FDEQ_BIN_0 +221 0x0203 //RX_FDEQ_BIN_1 +222 0x0304 //RX_FDEQ_BIN_2 +223 0x0405 //RX_FDEQ_BIN_3 +224 0x0607 //RX_FDEQ_BIN_4 +225 0x0809 //RX_FDEQ_BIN_5 +226 0x0A0B //RX_FDEQ_BIN_6 +227 0x0C0D //RX_FDEQ_BIN_7 +228 0x0E0F //RX_FDEQ_BIN_8 +229 0x1011 //RX_FDEQ_BIN_9 +230 0x1214 //RX_FDEQ_BIN_10 +231 0x1618 //RX_FDEQ_BIN_11 +232 0x1C1C //RX_FDEQ_BIN_12 +233 0x2020 //RX_FDEQ_BIN_13 +234 0x2020 //RX_FDEQ_BIN_14 +235 0x2011 //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x4000 //RX_FDEQ_RESRV_0 +245 0x0320 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0030 //RX_FDDRC_BAND_MARGIN_1 +248 0x0050 //RX_FDDRC_BAND_MARGIN_2 +249 0x0080 //RX_FDDRC_BAND_MARGIN_3 +250 0x0007 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x5000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x6400 //RX_FDDRC_THRD_3_2 +258 0x6400 //RX_FDDRC_THRD_3_3 +259 0x2000 //RX_FDDRC_SLANT_0_0 +260 0x2000 //RX_FDDRC_SLANT_0_1 +261 0x2000 //RX_FDDRC_SLANT_0_2 +262 0x2000 //RX_FDDRC_SLANT_0_3 +263 0x5333 //RX_FDDRC_SLANT_1_0 +264 0x5333 //RX_FDDRC_SLANT_1_1 +265 0x5333 //RX_FDDRC_SLANT_1_2 +266 0x5333 //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +286 0x0100 //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 diff --git a/audio/cloudripper/tuning/fortemedia/HANDSET.dat b/audio/cloudripper/tuning/fortemedia/HANDSET.dat index a996c9b..9c27e32 100644 Binary files a/audio/cloudripper/tuning/fortemedia/HANDSET.dat and b/audio/cloudripper/tuning/fortemedia/HANDSET.dat differ diff --git a/audio/cloudripper/tuning/fortemedia/HANDSET.mods b/audio/cloudripper/tuning/fortemedia/HANDSET.mods index b64d3d1..83a612d 100644 --- a/audio/cloudripper/tuning/fortemedia/HANDSET.mods +++ b/audio/cloudripper/tuning/fortemedia/HANDSET.mods @@ -1,11 +1,12 @@ #PLATFORM_NAME gChip #EXPORT_FLAG HANDSET -#SINGLE_API_VER 1.1.6 -#SAVE_TIME 2021-08-20 16:47:25 +#SINGLE_API_VER 1.2.0 +#SAVE_TIME 2022-02-09 11:15:13 #CASE_NAME HANDSET-HANDSET-RESERVE1-FB -#PARAM_TYPE TX+RX -#TOTAL_CUSTOM_STEP 7 +#PARAM_MODE FULL +#PARAM_TYPE TX+2RX +#TOTAL_CUSTOM_STEP 7+7 #TX 0 0x0000 //TX_OPERATION_MODE_0 1 0x0000 //TX_OPERATION_MODE_1 @@ -258,12 +259,12 @@ 248 0xF800 //TX_THR_SN_EST_6 249 0xF700 //TX_THR_SN_EST_7 250 0x0000 //TX_DELTA_THR_SN_EST_0 -251 0x0100 //TX_DELTA_THR_SN_EST_1 +251 0x0200 //TX_DELTA_THR_SN_EST_1 252 0x0200 //TX_DELTA_THR_SN_EST_2 253 0x0200 //TX_DELTA_THR_SN_EST_3 -254 0x0200 //TX_DELTA_THR_SN_EST_4 -255 0x0100 //TX_DELTA_THR_SN_EST_5 -256 0x0200 //TX_DELTA_THR_SN_EST_6 +254 0x0100 //TX_DELTA_THR_SN_EST_4 +255 0x0200 //TX_DELTA_THR_SN_EST_5 +256 0x0100 //TX_DELTA_THR_SN_EST_6 257 0x0200 //TX_DELTA_THR_SN_EST_7 258 0x4000 //TX_LAMBDA_NN_EST_0 259 0x4000 //TX_LAMBDA_NN_EST_1 @@ -291,16 +292,16 @@ 281 0x0014 //TX_NS_LVL_CTRL_0 282 0x0016 //TX_NS_LVL_CTRL_1 283 0x0016 //TX_NS_LVL_CTRL_2 -284 0x0016 //TX_NS_LVL_CTRL_3 -285 0x0018 //TX_NS_LVL_CTRL_4 -286 0x0016 //TX_NS_LVL_CTRL_5 -287 0x0012 //TX_NS_LVL_CTRL_6 +284 0x0018 //TX_NS_LVL_CTRL_3 +285 0x0016 //TX_NS_LVL_CTRL_4 +286 0x0012 //TX_NS_LVL_CTRL_5 +287 0x0016 //TX_NS_LVL_CTRL_6 288 0x0017 //TX_NS_LVL_CTRL_7 289 0x000E //TX_MIN_GAIN_S_0 -290 0x0012 //TX_MIN_GAIN_S_1 -291 0x0007 //TX_MIN_GAIN_S_2 -292 0x0012 //TX_MIN_GAIN_S_3 -293 0x0010 //TX_MIN_GAIN_S_4 +290 0x0007 //TX_MIN_GAIN_S_1 +291 0x0012 //TX_MIN_GAIN_S_2 +292 0x0010 //TX_MIN_GAIN_S_3 +293 0x0012 //TX_MIN_GAIN_S_4 294 0x0012 //TX_MIN_GAIN_S_5 295 0x0012 //TX_MIN_GAIN_S_6 296 0x0012 //TX_MIN_GAIN_S_7 @@ -322,29 +323,29 @@ 312 0x7FFF //TX_A_POST_FILT_0 313 0x2000 //TX_A_POST_FILT_1 314 0x4000 //TX_A_POST_FILT_S_0 -315 0x5000 //TX_A_POST_FILT_S_1 +315 0x4000 //TX_A_POST_FILT_S_1 316 0x4000 //TX_A_POST_FILT_S_2 317 0x4000 //TX_A_POST_FILT_S_3 318 0x4000 //TX_A_POST_FILT_S_4 319 0x4000 //TX_A_POST_FILT_S_5 -320 0x4000 //TX_A_POST_FILT_S_6 +320 0x5000 //TX_A_POST_FILT_S_6 321 0x7000 //TX_A_POST_FILT_S_7 322 0x1000 //TX_B_POST_FILT_0 323 0x2000 //TX_B_POST_FILT_1 -324 0x3000 //TX_B_POST_FILT_2 +324 0x2000 //TX_B_POST_FILT_2 325 0x2000 //TX_B_POST_FILT_3 -326 0x5000 //TX_B_POST_FILT_4 +326 0x2000 //TX_B_POST_FILT_4 327 0x2000 //TX_B_POST_FILT_5 -328 0x6000 //TX_B_POST_FILT_6 +328 0x3000 //TX_B_POST_FILT_6 329 0x3000 //TX_B_POST_FILT_7 330 0x1000 //TX_B_LESSCUT_RTO_S_0 -331 0x6000 //TX_B_LESSCUT_RTO_S_1 -332 0x6000 //TX_B_LESSCUT_RTO_S_2 -333 0x6000 //TX_B_LESSCUT_RTO_S_3 -334 0x6000 //TX_B_LESSCUT_RTO_S_4 -335 0x6000 //TX_B_LESSCUT_RTO_S_5 -336 0x7FFF //TX_B_LESSCUT_RTO_S_6 -337 0x7FFF //TX_B_LESSCUT_RTO_S_7 +331 0x1000 //TX_B_LESSCUT_RTO_S_1 +332 0x1000 //TX_B_LESSCUT_RTO_S_2 +333 0x1000 //TX_B_LESSCUT_RTO_S_3 +334 0x1000 //TX_B_LESSCUT_RTO_S_4 +335 0x1000 //TX_B_LESSCUT_RTO_S_5 +336 0x1000 //TX_B_LESSCUT_RTO_S_6 +337 0x1000 //TX_B_LESSCUT_RTO_S_7 338 0x7E14 //TX_LAMBDA_PFILT 339 0x7C29 //TX_LAMBDA_PFILT_S_0 340 0x7C29 //TX_LAMBDA_PFILT_S_1 @@ -387,10 +388,10 @@ 377 0x4E20 //TX_NOISE_TH_5_4 378 0x39DF //TX_NOISE_TH_6 379 0x0014 //TX_MINENOISE_TH -380 0x4000 //TX_MINENOISE_MIC0_TH_MTS -381 0xFFEE //TX_MINENOISE_MIC0_TH_EXP -382 0x6000 //TX_MINENOISE_MIC0_S_TH_MTS -383 0xFFF3 //TX_MINENOISE_MIC0_S_TH_EXP +380 0xD508 //TX_MORENS_TFMASK_TH +381 0x0001 //TX_DRC_QUIET_FLOOR +382 0x6D60 //TX_RATIODTL_CUT_TH +383 0x1482 //TX_DT_CUT_K1 384 0x00A5 //TX_OUT_ENER_S_TH_CLEAN 385 0x00A5 //TX_OUT_ENER_S_TH_LESSCLEAN 386 0x00A5 //TX_OUT_ENER_S_TH_NOISY @@ -398,15 +399,15 @@ 388 0x0200 //TX_OUT_ENER_TH_SPEECH 389 0x2000 //TX_SN_NPB_GAIN 390 0x0000 //TX_NN_NPB_GAIN -391 0x0000 //TX_CSX_ALPHA_0 -392 0x0000 //TX_CSX_ALPHA_1 -393 0x0000 //TX_CSX_ALPHA_2 -394 0x0000 //TX_CSX_ALPHA_3 -395 0x0800 //TX_MU_ARSP_EST -396 0x00C8 //TX_P_OUTBEAM_MIN_TH +391 0x3000 //TX_POST_MASK_SUP_HSNE +392 0x07D0 //TX_TAIL_DET_TH +393 0x4000 //TX_B_LESSCUT_RTO_WTA +394 0x0000 //TX_MEL_G_R +395 0x0080 //TX_SUPHIGH_TH +396 0x0000 //TX_MASK_G_R 397 0x0002 //TX_EXTRA_NS_L -398 0x0800 //TX_EXTRA_NS_A -399 0x0005 //TX_VR_NOISE_FLOOR_TH +398 0x1800 //TX_C_POST_FLT_MASK +399 0x7FFF //TX_A_POST_FLT_WNS 400 0x0148 //TX_MIN_G_LOW300HZ 401 0x0004 //TX_MAXLEVEL_CNG 402 0x00B4 //TX_STN_NOISE_TH @@ -521,16 +522,16 @@ 511 0x6666 //TX_MIC_TO_BFGAIN 512 0x0000 //TX_MICTOBFGAIN0 513 0x0000 //TX_FASTMUE_TH -514 0x0000 //TX_DERVB_LEN_0 -515 0x0000 //TX_DERVB_LEN_1 -516 0x0000 //TX_RHO_DERVB -517 0x0000 //TX_MIC_INDX_DERVB -518 0x0000 //TX_MU_DERVB -519 0x0000 //TX_DR_RESRV_0 -520 0x0000 //TX_DR_RESRV_1 -521 0x0000 //TX_DR_RESRV_2 -522 0x0000 //TX_DR_RESRV_3 -523 0x0000 //TX_DR_RESRV_4 +514 0x2CCC //TX_DEREVERB_LF_MU +515 0x3200 //TX_DEREVERB_HF_MU +516 0x0007 //TX_DEREVERB_DELAY +517 0x0004 //TX_DEREVERB_COEF_LEN +518 0x0003 //TX_DEREVERB_DNR +519 0x0000 //TX_DEREVERB_ALPHA +520 0x0000 //TX_DEREVERB_BETA +521 0x7FFF //TX_GSC_RTOL_TH +522 0x7FFF //TX_GSC_RTOH_TH +523 0x7E2C //TX_WIDE2_MEANHTH 524 0x0000 //TX_DR_RESRV_5 525 0x0000 //TX_DR_RESRV_6 526 0x0000 //TX_DR_RESRV_7 @@ -904,6 +905,71 @@ 894 0xC000 //TX_FASTNS_SSA_THHFL 895 0xCCCC //TX_FASTNS_SSA_THLFH 896 0xD999 //TX_FASTNS_SSA_THHFH +897 0x2339 //TX_SENDFUNC_REG_MICMUTE +898 0x0021 //TX_SENDFUNC_REG_MICMUTE1 +899 0x02BC //TX_MICMUTE_RATIO_THR +900 0x0140 //TX_MICMUTE_AMP_THR +901 0x0004 //TX_MICMUTE_HPF_IND +902 0x00C0 //TX_MICMUTE_LOG_EYR_TH +903 0x0008 //TX_MICMUTE_CVG_TIME +904 0x0008 //TX_MICMUTE_RELEASE_TIME +905 0x01FE //TX_MIC_VOLUME_MIC0MUTE +906 0x0020 //TX_MICMUTE_EPD_OFFSET_0 +907 0x001E //TX_MICMUTE_FRQ_AEC_L +908 0x7999 //TX_MICMUTE_EAD_THR +909 0x7FFF //TX_MICMUTE_LAMBDA_CB_NLE +910 0x7FFF //TX_MICMUTE_LAMBDA_RE_EST +911 0x4000 //TX_DTD_THR1_MICMUTE_0 +912 0x7000 //TX_DTD_THR1_MICMUTE_1 +913 0x7FFF //TX_DTD_THR1_MICMUTE_2 +914 0x7FFF //TX_DTD_THR1_MICMUTE_3 +915 0x6CCC //TX_DTD_THR2_MICMUTE_0 +916 0x0400 //TX_MICMUTE_MIN_EQ_RE_EST_0 +917 0x0400 //TX_MICMUTE_MIN_EQ_RE_EST_1 +918 0x1000 //TX_MICMUTE_MIN_EQ_RE_EST_2 +919 0x7FFF //TX_MICMUTE_MIN_EQ_RE_EST_3 +920 0x7FFF //TX_MICMUTE_MIN_EQ_RE_EST_4 +921 0x4000 //TX_MICMUTE_C_POST_FLT +922 0x03E8 //TX_MICMUTE_DT_CUT_K +923 0x0001 //TX_MICMUTE_DT_CUT_THR +924 0x03E8 //TX_MICMUTE_DT_CUT_K2 +925 0x0001 //TX_MICMUTE_DT_CUT_THR2 +926 0x0064 //TX_MICMUTE_DT2_HOLD_N +927 0x1000 //TX_MICMUTE_RATIODTH_THCUT +928 0x1000 //TX_MICMUTE_B_POST_FLT_ECHOL +929 0x7FFF //TX_MICMUTE_B_POST_FLT_ECHOH +930 0x0400 //TX_MICMUTE_C_POST_FLT_MASK +931 0x7999 //TX_MICMUTE_RATIODTL_CUT_TH +932 0x0258 //TX_MICMUTE_DT_CUT_K1 +933 0x0800 //TX_MICMUTE_N2_SN_EST +934 0xFC00 //TX_MICMUTE_THR_SN_EST_0 +935 0x001C //TX_MICMUTE_MIN_G_CTRL_0 +936 0x6000 //TX_MICMUTE_A_POST_FILT_S_0 +937 0x7000 //TX_MICMUTE_B_POST_FILT_0 +938 0x2710 //TX_MIC1RUB_AMP_THR +939 0x0010 //TX_MIC1MUTE_RATIO_THR +940 0x0450 //TX_MIC1MUTE_AMP_THR +941 0x0008 //TX_MIC1MUTE_CVG_TIME +942 0x0008 //TX_MIC1MUTE_RELEASE_TIME +943 0x0000 //TX_AMS_RESRV_01 +944 0x0000 //TX_AMS_RESRV_02 +945 0x0000 //TX_AMS_RESRV_03 +946 0x0000 //TX_AMS_RESRV_04 +947 0x0000 //TX_AMS_RESRV_05 +948 0x0000 //TX_AMS_RESRV_06 +949 0x0000 //TX_AMS_RESRV_07 +950 0x0000 //TX_AMS_RESRV_08 +951 0x0000 //TX_AMS_RESRV_09 +952 0x0000 //TX_AMS_RESRV_10 +953 0x0000 //TX_AMS_RESRV_11 +954 0x0000 //TX_AMS_RESRV_12 +955 0x0000 //TX_AMS_RESRV_13 +956 0x0000 //TX_AMS_RESRV_14 +957 0x0000 //TX_AMS_RESRV_15 +958 0x0000 //TX_AMS_RESRV_16 +959 0x0000 //TX_AMS_RESRV_17 +960 0x0000 //TX_AMS_RESRV_18 +961 0x0000 //TX_AMS_RESRV_19 #RX 0 0x003C //RX_RECVFUNC_MODE_0 1 0x0000 //RX_RECVFUNC_MODE_1 @@ -1755,10 +1821,862 @@ 110 0x0000 //RX_FDDRC_RESRV_0 129 0x0100 //RX_SPK_VOL 130 0x0000 //RX_VOL_RESRV_0 +#RX 2 +157 0x003C //RX_RECVFUNC_MODE_0 +158 0x0000 //RX_RECVFUNC_MODE_1 +159 0x0004 //RX_SAMPLINGFREQ_SIG +160 0x0004 //RX_SAMPLINGFREQ_PROC +161 0x000A //RX_FRAME_SZ +162 0x0000 //RX_DELAY_OPT +163 0x1000 //RX_TDDRC_ALPHA_UP_1 +164 0x1000 //RX_TDDRC_ALPHA_UP_2 +165 0x1000 //RX_TDDRC_ALPHA_UP_3 +166 0x1000 //RX_TDDRC_ALPHA_UP_4 +167 0x064E //RX_PGA +168 0x7FFF //RX_A_HP +169 0x4000 //RX_B_PE +170 0x5800 //RX_THR_PITCH_DET_0 +171 0x5000 //RX_THR_PITCH_DET_1 +172 0x4000 //RX_THR_PITCH_DET_2 +173 0x0008 //RX_PITCH_BFR_LEN +174 0x0003 //RX_SBD_PITCH_DET +175 0x0100 //RX_PP_RESRV_0 +176 0x0020 //RX_PP_RESRV_1 +177 0x0600 //RX_N_SN_EST +178 0x000C //RX_N2_SN_EST +179 0x000F //RX_NS_LVL_CTRL +180 0xF800 //RX_THR_SN_EST +181 0x7E00 //RX_LAMBDA_PFILT +182 0x000A //RX_FENS_RESRV_0 +183 0x0190 //RX_FENS_RESRV_1 +184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +187 0x0002 //RX_EXTRA_NS_L +188 0x0800 //RX_EXTRA_NS_A +189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +190 0x7000 //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +192 0x199A //RX_A_POST_FLT +193 0x0000 //RX_LMT_THRD +194 0x4000 //RX_LMT_ALPHA +195 0x0020 //RX_FDEQ_SUBNUM +196 0x4848 //RX_FDEQ_GAIN_0 +197 0x4850 //RX_FDEQ_GAIN_1 +198 0x6478 //RX_FDEQ_GAIN_2 +199 0x8689 //RX_FDEQ_GAIN_3 +200 0x908F //RX_FDEQ_GAIN_4 +201 0x9495 //RX_FDEQ_GAIN_5 +202 0x989D //RX_FDEQ_GAIN_6 +203 0x9DA6 //RX_FDEQ_GAIN_7 +204 0xA895 //RX_FDEQ_GAIN_8 +205 0x8A8A //RX_FDEQ_GAIN_9 +206 0x8E78 //RX_FDEQ_GAIN_10 +207 0x7070 //RX_FDEQ_GAIN_11 +208 0x7680 //RX_FDEQ_GAIN_12 +209 0x787C //RX_FDEQ_GAIN_13 +210 0x8890 //RX_FDEQ_GAIN_14 +211 0x9CAC //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0202 //RX_FDEQ_BIN_0 +221 0x0202 //RX_FDEQ_BIN_1 +222 0x0302 //RX_FDEQ_BIN_2 +223 0x0304 //RX_FDEQ_BIN_3 +224 0x0405 //RX_FDEQ_BIN_4 +225 0x0506 //RX_FDEQ_BIN_5 +226 0x0708 //RX_FDEQ_BIN_6 +227 0x090A //RX_FDEQ_BIN_7 +228 0x0B0C //RX_FDEQ_BIN_8 +229 0x0D0E //RX_FDEQ_BIN_9 +230 0x1013 //RX_FDEQ_BIN_10 +231 0x1719 //RX_FDEQ_BIN_11 +232 0x1B1E //RX_FDEQ_BIN_12 +233 0x1E1E //RX_FDEQ_BIN_13 +234 0x1E28 //RX_FDEQ_BIN_14 +235 0x282C //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x4000 //RX_FDEQ_RESRV_0 +245 0x0320 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0030 //RX_FDDRC_BAND_MARGIN_1 +248 0x0050 //RX_FDDRC_BAND_MARGIN_2 +249 0x0080 //RX_FDDRC_BAND_MARGIN_3 +250 0x0007 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x5000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x6400 //RX_FDDRC_THRD_3_2 +258 0x6400 //RX_FDDRC_THRD_3_3 +259 0x2000 //RX_FDDRC_SLANT_0_0 +260 0x2000 //RX_FDDRC_SLANT_0_1 +261 0x2000 //RX_FDDRC_SLANT_0_2 +262 0x2000 //RX_FDDRC_SLANT_0_3 +263 0x5333 //RX_FDDRC_SLANT_1_0 +264 0x5333 //RX_FDDRC_SLANT_1_1 +265 0x5333 //RX_FDDRC_SLANT_1_2 +266 0x5333 //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +268 0x0002 //RX_FILTINDX +269 0x0000 //RX_TDDRC_THRD_0 +270 0x0000 //RX_TDDRC_THRD_1 +271 0x1800 //RX_TDDRC_THRD_2 +272 0x1800 //RX_TDDRC_THRD_3 +273 0x3000 //RX_TDDRC_SLANT_0 +274 0x6E00 //RX_TDDRC_SLANT_1 +275 0x1000 //RX_TDDRC_ALPHA_UP_0 +276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x199A //RX_TDDRC_HMNC_GAIN +279 0x0001 //RX_TDDRC_SMT_FLAG +280 0x0CCD //RX_TDDRC_SMT_W +281 0x0275 //RX_TDDRC_DRC_GAIN +282 0x7C00 //RX_LAMBDA_PKA_FP +283 0x2000 //RX_TPKA_FP +284 0x2000 //RX_MIN_G_FP +285 0x0080 //RX_MAX_G_FP +286 0x000D //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 +288 0x0000 //RX_MAXLEVEL_CNG +289 0x3000 //RX_BWE_UV_TH +290 0x3000 //RX_BWE_UV_TH2 +291 0x1800 //RX_BWE_UV_TH3 +292 0x1000 //RX_BWE_V_TH +293 0x04CD //RX_BWE_GAIN1_V_TH1 +294 0x0F33 //RX_BWE_GAIN1_V_TH2 +295 0x7333 //RX_BWE_UV_EQ +296 0x199A //RX_BWE_V_EQ +297 0x7333 //RX_BWE_TONE_TH +298 0x0004 //RX_BWE_UV_HOLD_T +299 0x6CCD //RX_BWE_GAIN2_ALPHA +300 0x799A //RX_BWE_GAIN3_ALPHA +301 0x001E //RX_BWE_CUTOFF +302 0x3000 //RX_BWE_GAINFILL +303 0x3200 //RX_BWE_MAXTH_TONE +304 0x2000 //RX_BWE_EQ_0 +305 0x2000 //RX_BWE_EQ_1 +306 0x2000 //RX_BWE_EQ_2 +307 0x2000 //RX_BWE_EQ_3 +308 0x2000 //RX_BWE_EQ_4 +309 0x2000 //RX_BWE_EQ_5 +310 0x2000 //RX_BWE_EQ_6 +311 0x0000 //RX_BWE_RESRV_0 +312 0x0000 //RX_BWE_RESRV_1 +313 0x0000 //RX_BWE_RESRV_2 +#VOL 0 +163 0x1000 //RX_TDDRC_ALPHA_UP_1 +164 0x1000 //RX_TDDRC_ALPHA_UP_2 +165 0x1000 //RX_TDDRC_ALPHA_UP_3 +166 0x1000 //RX_TDDRC_ALPHA_UP_4 +184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +190 0x7000 //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +269 0x0000 //RX_TDDRC_THRD_0 +270 0x0000 //RX_TDDRC_THRD_1 +271 0x1800 //RX_TDDRC_THRD_2 +272 0x1800 //RX_TDDRC_THRD_3 +273 0x3000 //RX_TDDRC_SLANT_0 +274 0x6E00 //RX_TDDRC_SLANT_1 +275 0x1000 //RX_TDDRC_ALPHA_UP_0 +276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x199A //RX_TDDRC_HMNC_GAIN +279 0x0001 //RX_TDDRC_SMT_FLAG +280 0x0CCD //RX_TDDRC_SMT_W +281 0x0275 //RX_TDDRC_DRC_GAIN +195 0x0020 //RX_FDEQ_SUBNUM +196 0x4848 //RX_FDEQ_GAIN_0 +197 0x4850 //RX_FDEQ_GAIN_1 +198 0x6478 //RX_FDEQ_GAIN_2 +199 0x8689 //RX_FDEQ_GAIN_3 +200 0x908F //RX_FDEQ_GAIN_4 +201 0x9495 //RX_FDEQ_GAIN_5 +202 0x989D //RX_FDEQ_GAIN_6 +203 0x9DA6 //RX_FDEQ_GAIN_7 +204 0xA895 //RX_FDEQ_GAIN_8 +205 0x8A8A //RX_FDEQ_GAIN_9 +206 0x8E78 //RX_FDEQ_GAIN_10 +207 0x7070 //RX_FDEQ_GAIN_11 +208 0x7680 //RX_FDEQ_GAIN_12 +209 0x787C //RX_FDEQ_GAIN_13 +210 0x8890 //RX_FDEQ_GAIN_14 +211 0x9CAC //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0202 //RX_FDEQ_BIN_0 +221 0x0202 //RX_FDEQ_BIN_1 +222 0x0302 //RX_FDEQ_BIN_2 +223 0x0304 //RX_FDEQ_BIN_3 +224 0x0405 //RX_FDEQ_BIN_4 +225 0x0506 //RX_FDEQ_BIN_5 +226 0x0708 //RX_FDEQ_BIN_6 +227 0x090A //RX_FDEQ_BIN_7 +228 0x0B0C //RX_FDEQ_BIN_8 +229 0x0D0E //RX_FDEQ_BIN_9 +230 0x1013 //RX_FDEQ_BIN_10 +231 0x1719 //RX_FDEQ_BIN_11 +232 0x1B1E //RX_FDEQ_BIN_12 +233 0x1E1E //RX_FDEQ_BIN_13 +234 0x1E28 //RX_FDEQ_BIN_14 +235 0x282C //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x4000 //RX_FDEQ_RESRV_0 +245 0x0320 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0030 //RX_FDDRC_BAND_MARGIN_1 +248 0x0050 //RX_FDDRC_BAND_MARGIN_2 +249 0x0080 //RX_FDDRC_BAND_MARGIN_3 +250 0x0007 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x5000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x6400 //RX_FDDRC_THRD_3_2 +258 0x6400 //RX_FDDRC_THRD_3_3 +259 0x2000 //RX_FDDRC_SLANT_0_0 +260 0x2000 //RX_FDDRC_SLANT_0_1 +261 0x2000 //RX_FDDRC_SLANT_0_2 +262 0x2000 //RX_FDDRC_SLANT_0_3 +263 0x5333 //RX_FDDRC_SLANT_1_0 +264 0x5333 //RX_FDDRC_SLANT_1_1 +265 0x5333 //RX_FDDRC_SLANT_1_2 +266 0x5333 //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +286 0x000D //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 +#VOL 1 +163 0x1000 //RX_TDDRC_ALPHA_UP_1 +164 0x1000 //RX_TDDRC_ALPHA_UP_2 +165 0x1000 //RX_TDDRC_ALPHA_UP_3 +166 0x1000 //RX_TDDRC_ALPHA_UP_4 +184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +190 0x7000 //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +269 0x0000 //RX_TDDRC_THRD_0 +270 0x0000 //RX_TDDRC_THRD_1 +271 0x1800 //RX_TDDRC_THRD_2 +272 0x1800 //RX_TDDRC_THRD_3 +273 0x3000 //RX_TDDRC_SLANT_0 +274 0x6E00 //RX_TDDRC_SLANT_1 +275 0x1000 //RX_TDDRC_ALPHA_UP_0 +276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x199A //RX_TDDRC_HMNC_GAIN +279 0x0001 //RX_TDDRC_SMT_FLAG +280 0x0CCD //RX_TDDRC_SMT_W +281 0x0275 //RX_TDDRC_DRC_GAIN +195 0x0020 //RX_FDEQ_SUBNUM +196 0x4848 //RX_FDEQ_GAIN_0 +197 0x4850 //RX_FDEQ_GAIN_1 +198 0x6478 //RX_FDEQ_GAIN_2 +199 0x8689 //RX_FDEQ_GAIN_3 +200 0x908F //RX_FDEQ_GAIN_4 +201 0x9495 //RX_FDEQ_GAIN_5 +202 0x989D //RX_FDEQ_GAIN_6 +203 0x9DA6 //RX_FDEQ_GAIN_7 +204 0xA895 //RX_FDEQ_GAIN_8 +205 0x8A8A //RX_FDEQ_GAIN_9 +206 0x8E78 //RX_FDEQ_GAIN_10 +207 0x7070 //RX_FDEQ_GAIN_11 +208 0x7680 //RX_FDEQ_GAIN_12 +209 0x787C //RX_FDEQ_GAIN_13 +210 0x8890 //RX_FDEQ_GAIN_14 +211 0x9CAC //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0202 //RX_FDEQ_BIN_0 +221 0x0202 //RX_FDEQ_BIN_1 +222 0x0302 //RX_FDEQ_BIN_2 +223 0x0304 //RX_FDEQ_BIN_3 +224 0x0405 //RX_FDEQ_BIN_4 +225 0x0506 //RX_FDEQ_BIN_5 +226 0x0708 //RX_FDEQ_BIN_6 +227 0x090A //RX_FDEQ_BIN_7 +228 0x0B0C //RX_FDEQ_BIN_8 +229 0x0D0E //RX_FDEQ_BIN_9 +230 0x1013 //RX_FDEQ_BIN_10 +231 0x1719 //RX_FDEQ_BIN_11 +232 0x1B1E //RX_FDEQ_BIN_12 +233 0x1E1E //RX_FDEQ_BIN_13 +234 0x1E28 //RX_FDEQ_BIN_14 +235 0x282C //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x4000 //RX_FDEQ_RESRV_0 +245 0x0320 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0030 //RX_FDDRC_BAND_MARGIN_1 +248 0x0050 //RX_FDDRC_BAND_MARGIN_2 +249 0x0080 //RX_FDDRC_BAND_MARGIN_3 +250 0x0007 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x5000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x6400 //RX_FDDRC_THRD_3_2 +258 0x6400 //RX_FDDRC_THRD_3_3 +259 0x2000 //RX_FDDRC_SLANT_0_0 +260 0x2000 //RX_FDDRC_SLANT_0_1 +261 0x2000 //RX_FDDRC_SLANT_0_2 +262 0x2000 //RX_FDDRC_SLANT_0_3 +263 0x5333 //RX_FDDRC_SLANT_1_0 +264 0x5333 //RX_FDDRC_SLANT_1_1 +265 0x5333 //RX_FDDRC_SLANT_1_2 +266 0x5333 //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +286 0x0016 //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 +#VOL 2 +163 0x1000 //RX_TDDRC_ALPHA_UP_1 +164 0x1000 //RX_TDDRC_ALPHA_UP_2 +165 0x1000 //RX_TDDRC_ALPHA_UP_3 +166 0x1000 //RX_TDDRC_ALPHA_UP_4 +184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +190 0x7000 //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +269 0x0000 //RX_TDDRC_THRD_0 +270 0x0000 //RX_TDDRC_THRD_1 +271 0x1800 //RX_TDDRC_THRD_2 +272 0x1800 //RX_TDDRC_THRD_3 +273 0x3000 //RX_TDDRC_SLANT_0 +274 0x6E00 //RX_TDDRC_SLANT_1 +275 0x1000 //RX_TDDRC_ALPHA_UP_0 +276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x199A //RX_TDDRC_HMNC_GAIN +279 0x0001 //RX_TDDRC_SMT_FLAG +280 0x0CCD //RX_TDDRC_SMT_W +281 0x0275 //RX_TDDRC_DRC_GAIN +195 0x0020 //RX_FDEQ_SUBNUM +196 0x4848 //RX_FDEQ_GAIN_0 +197 0x4850 //RX_FDEQ_GAIN_1 +198 0x6478 //RX_FDEQ_GAIN_2 +199 0x8689 //RX_FDEQ_GAIN_3 +200 0x908F //RX_FDEQ_GAIN_4 +201 0x9495 //RX_FDEQ_GAIN_5 +202 0x989D //RX_FDEQ_GAIN_6 +203 0x9DA6 //RX_FDEQ_GAIN_7 +204 0xA895 //RX_FDEQ_GAIN_8 +205 0x8A8A //RX_FDEQ_GAIN_9 +206 0x8E78 //RX_FDEQ_GAIN_10 +207 0x7070 //RX_FDEQ_GAIN_11 +208 0x7680 //RX_FDEQ_GAIN_12 +209 0x787C //RX_FDEQ_GAIN_13 +210 0x8890 //RX_FDEQ_GAIN_14 +211 0x9CAC //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0202 //RX_FDEQ_BIN_0 +221 0x0202 //RX_FDEQ_BIN_1 +222 0x0302 //RX_FDEQ_BIN_2 +223 0x0304 //RX_FDEQ_BIN_3 +224 0x0405 //RX_FDEQ_BIN_4 +225 0x0506 //RX_FDEQ_BIN_5 +226 0x0708 //RX_FDEQ_BIN_6 +227 0x090A //RX_FDEQ_BIN_7 +228 0x0B0C //RX_FDEQ_BIN_8 +229 0x0D0E //RX_FDEQ_BIN_9 +230 0x1013 //RX_FDEQ_BIN_10 +231 0x1719 //RX_FDEQ_BIN_11 +232 0x1B1E //RX_FDEQ_BIN_12 +233 0x1E1E //RX_FDEQ_BIN_13 +234 0x1E28 //RX_FDEQ_BIN_14 +235 0x282C //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x4000 //RX_FDEQ_RESRV_0 +245 0x0320 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0030 //RX_FDDRC_BAND_MARGIN_1 +248 0x0050 //RX_FDDRC_BAND_MARGIN_2 +249 0x0080 //RX_FDDRC_BAND_MARGIN_3 +250 0x0007 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x5000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x6400 //RX_FDDRC_THRD_3_2 +258 0x6400 //RX_FDDRC_THRD_3_3 +259 0x2000 //RX_FDDRC_SLANT_0_0 +260 0x2000 //RX_FDDRC_SLANT_0_1 +261 0x2000 //RX_FDDRC_SLANT_0_2 +262 0x2000 //RX_FDDRC_SLANT_0_3 +263 0x5333 //RX_FDDRC_SLANT_1_0 +264 0x5333 //RX_FDDRC_SLANT_1_1 +265 0x5333 //RX_FDDRC_SLANT_1_2 +266 0x5333 //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +286 0x0026 //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 +#VOL 3 +163 0x1000 //RX_TDDRC_ALPHA_UP_1 +164 0x1000 //RX_TDDRC_ALPHA_UP_2 +165 0x1000 //RX_TDDRC_ALPHA_UP_3 +166 0x1000 //RX_TDDRC_ALPHA_UP_4 +184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +190 0x7000 //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +269 0x0000 //RX_TDDRC_THRD_0 +270 0x0000 //RX_TDDRC_THRD_1 +271 0x1800 //RX_TDDRC_THRD_2 +272 0x1800 //RX_TDDRC_THRD_3 +273 0x3000 //RX_TDDRC_SLANT_0 +274 0x6E00 //RX_TDDRC_SLANT_1 +275 0x1000 //RX_TDDRC_ALPHA_UP_0 +276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x199A //RX_TDDRC_HMNC_GAIN +279 0x0001 //RX_TDDRC_SMT_FLAG +280 0x0CCD //RX_TDDRC_SMT_W +281 0x0275 //RX_TDDRC_DRC_GAIN +195 0x0020 //RX_FDEQ_SUBNUM +196 0x4848 //RX_FDEQ_GAIN_0 +197 0x4850 //RX_FDEQ_GAIN_1 +198 0x6478 //RX_FDEQ_GAIN_2 +199 0x8689 //RX_FDEQ_GAIN_3 +200 0x908F //RX_FDEQ_GAIN_4 +201 0x9495 //RX_FDEQ_GAIN_5 +202 0x989D //RX_FDEQ_GAIN_6 +203 0x9DA6 //RX_FDEQ_GAIN_7 +204 0xA895 //RX_FDEQ_GAIN_8 +205 0x8A8A //RX_FDEQ_GAIN_9 +206 0x8E78 //RX_FDEQ_GAIN_10 +207 0x7070 //RX_FDEQ_GAIN_11 +208 0x7680 //RX_FDEQ_GAIN_12 +209 0x787C //RX_FDEQ_GAIN_13 +210 0x8890 //RX_FDEQ_GAIN_14 +211 0x9CAC //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0202 //RX_FDEQ_BIN_0 +221 0x0202 //RX_FDEQ_BIN_1 +222 0x0302 //RX_FDEQ_BIN_2 +223 0x0304 //RX_FDEQ_BIN_3 +224 0x0405 //RX_FDEQ_BIN_4 +225 0x0506 //RX_FDEQ_BIN_5 +226 0x0708 //RX_FDEQ_BIN_6 +227 0x090A //RX_FDEQ_BIN_7 +228 0x0B0C //RX_FDEQ_BIN_8 +229 0x0D0E //RX_FDEQ_BIN_9 +230 0x1013 //RX_FDEQ_BIN_10 +231 0x1719 //RX_FDEQ_BIN_11 +232 0x1B1E //RX_FDEQ_BIN_12 +233 0x1E1E //RX_FDEQ_BIN_13 +234 0x1E28 //RX_FDEQ_BIN_14 +235 0x282C //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x4000 //RX_FDEQ_RESRV_0 +245 0x0320 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0030 //RX_FDDRC_BAND_MARGIN_1 +248 0x0050 //RX_FDDRC_BAND_MARGIN_2 +249 0x0080 //RX_FDDRC_BAND_MARGIN_3 +250 0x0007 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x5000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x6400 //RX_FDDRC_THRD_3_2 +258 0x6400 //RX_FDDRC_THRD_3_3 +259 0x2000 //RX_FDDRC_SLANT_0_0 +260 0x2000 //RX_FDDRC_SLANT_0_1 +261 0x2000 //RX_FDDRC_SLANT_0_2 +262 0x2000 //RX_FDDRC_SLANT_0_3 +263 0x5333 //RX_FDDRC_SLANT_1_0 +264 0x5333 //RX_FDDRC_SLANT_1_1 +265 0x5333 //RX_FDDRC_SLANT_1_2 +266 0x5333 //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +286 0x003D //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 +#VOL 4 +163 0x1000 //RX_TDDRC_ALPHA_UP_1 +164 0x1000 //RX_TDDRC_ALPHA_UP_2 +165 0x1000 //RX_TDDRC_ALPHA_UP_3 +166 0x1000 //RX_TDDRC_ALPHA_UP_4 +184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +190 0x7000 //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +269 0x0000 //RX_TDDRC_THRD_0 +270 0x0000 //RX_TDDRC_THRD_1 +271 0x1800 //RX_TDDRC_THRD_2 +272 0x1800 //RX_TDDRC_THRD_3 +273 0x3000 //RX_TDDRC_SLANT_0 +274 0x6E00 //RX_TDDRC_SLANT_1 +275 0x1000 //RX_TDDRC_ALPHA_UP_0 +276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x199A //RX_TDDRC_HMNC_GAIN +279 0x0001 //RX_TDDRC_SMT_FLAG +280 0x0CCD //RX_TDDRC_SMT_W +281 0x0275 //RX_TDDRC_DRC_GAIN +195 0x0020 //RX_FDEQ_SUBNUM +196 0x4848 //RX_FDEQ_GAIN_0 +197 0x4850 //RX_FDEQ_GAIN_1 +198 0x6478 //RX_FDEQ_GAIN_2 +199 0x8689 //RX_FDEQ_GAIN_3 +200 0x908F //RX_FDEQ_GAIN_4 +201 0x9495 //RX_FDEQ_GAIN_5 +202 0x989D //RX_FDEQ_GAIN_6 +203 0x9DA6 //RX_FDEQ_GAIN_7 +204 0xA895 //RX_FDEQ_GAIN_8 +205 0x8A8A //RX_FDEQ_GAIN_9 +206 0x8E78 //RX_FDEQ_GAIN_10 +207 0x7070 //RX_FDEQ_GAIN_11 +208 0x7680 //RX_FDEQ_GAIN_12 +209 0x787C //RX_FDEQ_GAIN_13 +210 0x8890 //RX_FDEQ_GAIN_14 +211 0x9CAC //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0202 //RX_FDEQ_BIN_0 +221 0x0202 //RX_FDEQ_BIN_1 +222 0x0302 //RX_FDEQ_BIN_2 +223 0x0304 //RX_FDEQ_BIN_3 +224 0x0405 //RX_FDEQ_BIN_4 +225 0x0506 //RX_FDEQ_BIN_5 +226 0x0708 //RX_FDEQ_BIN_6 +227 0x090A //RX_FDEQ_BIN_7 +228 0x0B0C //RX_FDEQ_BIN_8 +229 0x0D0E //RX_FDEQ_BIN_9 +230 0x1013 //RX_FDEQ_BIN_10 +231 0x1719 //RX_FDEQ_BIN_11 +232 0x1B1E //RX_FDEQ_BIN_12 +233 0x1E1E //RX_FDEQ_BIN_13 +234 0x1E28 //RX_FDEQ_BIN_14 +235 0x282C //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x4000 //RX_FDEQ_RESRV_0 +245 0x0320 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0030 //RX_FDDRC_BAND_MARGIN_1 +248 0x0050 //RX_FDDRC_BAND_MARGIN_2 +249 0x0080 //RX_FDDRC_BAND_MARGIN_3 +250 0x0007 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x5000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x6400 //RX_FDDRC_THRD_3_2 +258 0x6400 //RX_FDDRC_THRD_3_3 +259 0x2000 //RX_FDDRC_SLANT_0_0 +260 0x2000 //RX_FDDRC_SLANT_0_1 +261 0x2000 //RX_FDDRC_SLANT_0_2 +262 0x2000 //RX_FDDRC_SLANT_0_3 +263 0x5333 //RX_FDDRC_SLANT_1_0 +264 0x5333 //RX_FDDRC_SLANT_1_1 +265 0x5333 //RX_FDDRC_SLANT_1_2 +266 0x5333 //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +286 0x0060 //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 +#VOL 5 +163 0x1000 //RX_TDDRC_ALPHA_UP_1 +164 0x1000 //RX_TDDRC_ALPHA_UP_2 +165 0x1000 //RX_TDDRC_ALPHA_UP_3 +166 0x1000 //RX_TDDRC_ALPHA_UP_4 +184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +190 0x7000 //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +269 0x0000 //RX_TDDRC_THRD_0 +270 0x0000 //RX_TDDRC_THRD_1 +271 0x1800 //RX_TDDRC_THRD_2 +272 0x1800 //RX_TDDRC_THRD_3 +273 0x3000 //RX_TDDRC_SLANT_0 +274 0x6E00 //RX_TDDRC_SLANT_1 +275 0x1000 //RX_TDDRC_ALPHA_UP_0 +276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x199A //RX_TDDRC_HMNC_GAIN +279 0x0001 //RX_TDDRC_SMT_FLAG +280 0x0CCD //RX_TDDRC_SMT_W +281 0x0275 //RX_TDDRC_DRC_GAIN +195 0x0020 //RX_FDEQ_SUBNUM +196 0x4848 //RX_FDEQ_GAIN_0 +197 0x4850 //RX_FDEQ_GAIN_1 +198 0x6478 //RX_FDEQ_GAIN_2 +199 0x8689 //RX_FDEQ_GAIN_3 +200 0x908F //RX_FDEQ_GAIN_4 +201 0x9495 //RX_FDEQ_GAIN_5 +202 0x989D //RX_FDEQ_GAIN_6 +203 0x9DA6 //RX_FDEQ_GAIN_7 +204 0xA895 //RX_FDEQ_GAIN_8 +205 0x8A8A //RX_FDEQ_GAIN_9 +206 0x8E78 //RX_FDEQ_GAIN_10 +207 0x7070 //RX_FDEQ_GAIN_11 +208 0x7680 //RX_FDEQ_GAIN_12 +209 0x787C //RX_FDEQ_GAIN_13 +210 0x8890 //RX_FDEQ_GAIN_14 +211 0x9CAC //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0202 //RX_FDEQ_BIN_0 +221 0x0202 //RX_FDEQ_BIN_1 +222 0x0302 //RX_FDEQ_BIN_2 +223 0x0304 //RX_FDEQ_BIN_3 +224 0x0405 //RX_FDEQ_BIN_4 +225 0x0506 //RX_FDEQ_BIN_5 +226 0x0708 //RX_FDEQ_BIN_6 +227 0x090A //RX_FDEQ_BIN_7 +228 0x0B0C //RX_FDEQ_BIN_8 +229 0x0D0E //RX_FDEQ_BIN_9 +230 0x1013 //RX_FDEQ_BIN_10 +231 0x1719 //RX_FDEQ_BIN_11 +232 0x1B1E //RX_FDEQ_BIN_12 +233 0x1E1E //RX_FDEQ_BIN_13 +234 0x1E28 //RX_FDEQ_BIN_14 +235 0x282C //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x4000 //RX_FDEQ_RESRV_0 +245 0x0320 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0030 //RX_FDDRC_BAND_MARGIN_1 +248 0x0050 //RX_FDDRC_BAND_MARGIN_2 +249 0x0080 //RX_FDDRC_BAND_MARGIN_3 +250 0x0007 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x5000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x6400 //RX_FDDRC_THRD_3_2 +258 0x6400 //RX_FDDRC_THRD_3_3 +259 0x2000 //RX_FDDRC_SLANT_0_0 +260 0x2000 //RX_FDDRC_SLANT_0_1 +261 0x2000 //RX_FDDRC_SLANT_0_2 +262 0x2000 //RX_FDDRC_SLANT_0_3 +263 0x5333 //RX_FDDRC_SLANT_1_0 +264 0x5333 //RX_FDDRC_SLANT_1_1 +265 0x5333 //RX_FDDRC_SLANT_1_2 +266 0x5333 //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +286 0x0099 //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 +#VOL 6 +163 0x1000 //RX_TDDRC_ALPHA_UP_1 +164 0x1000 //RX_TDDRC_ALPHA_UP_2 +165 0x1000 //RX_TDDRC_ALPHA_UP_3 +166 0x1000 //RX_TDDRC_ALPHA_UP_4 +184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +190 0x7000 //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +269 0x0000 //RX_TDDRC_THRD_0 +270 0x0000 //RX_TDDRC_THRD_1 +271 0x1800 //RX_TDDRC_THRD_2 +272 0x1800 //RX_TDDRC_THRD_3 +273 0x3000 //RX_TDDRC_SLANT_0 +274 0x6E00 //RX_TDDRC_SLANT_1 +275 0x1000 //RX_TDDRC_ALPHA_UP_0 +276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x199A //RX_TDDRC_HMNC_GAIN +279 0x0001 //RX_TDDRC_SMT_FLAG +280 0x0CCD //RX_TDDRC_SMT_W +281 0x0275 //RX_TDDRC_DRC_GAIN +195 0x0020 //RX_FDEQ_SUBNUM +196 0x4848 //RX_FDEQ_GAIN_0 +197 0x4850 //RX_FDEQ_GAIN_1 +198 0x6478 //RX_FDEQ_GAIN_2 +199 0x8689 //RX_FDEQ_GAIN_3 +200 0x908F //RX_FDEQ_GAIN_4 +201 0x9495 //RX_FDEQ_GAIN_5 +202 0x989D //RX_FDEQ_GAIN_6 +203 0x9DA6 //RX_FDEQ_GAIN_7 +204 0xA895 //RX_FDEQ_GAIN_8 +205 0x8A8A //RX_FDEQ_GAIN_9 +206 0x8E78 //RX_FDEQ_GAIN_10 +207 0x7070 //RX_FDEQ_GAIN_11 +208 0x7680 //RX_FDEQ_GAIN_12 +209 0x787C //RX_FDEQ_GAIN_13 +210 0x8890 //RX_FDEQ_GAIN_14 +211 0x9CAC //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0202 //RX_FDEQ_BIN_0 +221 0x0202 //RX_FDEQ_BIN_1 +222 0x0302 //RX_FDEQ_BIN_2 +223 0x0304 //RX_FDEQ_BIN_3 +224 0x0405 //RX_FDEQ_BIN_4 +225 0x0506 //RX_FDEQ_BIN_5 +226 0x0708 //RX_FDEQ_BIN_6 +227 0x090A //RX_FDEQ_BIN_7 +228 0x0B0C //RX_FDEQ_BIN_8 +229 0x0D0E //RX_FDEQ_BIN_9 +230 0x1013 //RX_FDEQ_BIN_10 +231 0x1719 //RX_FDEQ_BIN_11 +232 0x1B1E //RX_FDEQ_BIN_12 +233 0x1E1E //RX_FDEQ_BIN_13 +234 0x1E28 //RX_FDEQ_BIN_14 +235 0x282C //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x4000 //RX_FDEQ_RESRV_0 +245 0x0320 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0030 //RX_FDDRC_BAND_MARGIN_1 +248 0x0050 //RX_FDDRC_BAND_MARGIN_2 +249 0x0080 //RX_FDDRC_BAND_MARGIN_3 +250 0x0007 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x5000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x6400 //RX_FDDRC_THRD_3_2 +258 0x6400 //RX_FDDRC_THRD_3_3 +259 0x2000 //RX_FDDRC_SLANT_0_0 +260 0x2000 //RX_FDDRC_SLANT_0_1 +261 0x2000 //RX_FDDRC_SLANT_0_2 +262 0x2000 //RX_FDDRC_SLANT_0_3 +263 0x5333 //RX_FDDRC_SLANT_1_0 +264 0x5333 //RX_FDDRC_SLANT_1_1 +265 0x5333 //RX_FDDRC_SLANT_1_2 +266 0x5333 //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +286 0x0100 //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 #CASE_NAME HANDSET-HANDSET-CUSTOM2-FB -#PARAM_TYPE TX+RX -#TOTAL_CUSTOM_STEP 7 +#PARAM_MODE FULL +#PARAM_TYPE TX+2RX +#TOTAL_CUSTOM_STEP 7+7 #TX 0 0x0000 //TX_OPERATION_MODE_0 1 0x0000 //TX_OPERATION_MODE_1 @@ -2011,12 +2929,12 @@ 248 0xF800 //TX_THR_SN_EST_6 249 0xF700 //TX_THR_SN_EST_7 250 0x0000 //TX_DELTA_THR_SN_EST_0 -251 0x0100 //TX_DELTA_THR_SN_EST_1 +251 0x0200 //TX_DELTA_THR_SN_EST_1 252 0x0200 //TX_DELTA_THR_SN_EST_2 253 0x0200 //TX_DELTA_THR_SN_EST_3 -254 0x0200 //TX_DELTA_THR_SN_EST_4 -255 0x0100 //TX_DELTA_THR_SN_EST_5 -256 0x0200 //TX_DELTA_THR_SN_EST_6 +254 0x0100 //TX_DELTA_THR_SN_EST_4 +255 0x0200 //TX_DELTA_THR_SN_EST_5 +256 0x0100 //TX_DELTA_THR_SN_EST_6 257 0x0200 //TX_DELTA_THR_SN_EST_7 258 0x4000 //TX_LAMBDA_NN_EST_0 259 0x4000 //TX_LAMBDA_NN_EST_1 @@ -2044,16 +2962,16 @@ 281 0x0014 //TX_NS_LVL_CTRL_0 282 0x0016 //TX_NS_LVL_CTRL_1 283 0x0016 //TX_NS_LVL_CTRL_2 -284 0x0016 //TX_NS_LVL_CTRL_3 -285 0x0018 //TX_NS_LVL_CTRL_4 -286 0x0016 //TX_NS_LVL_CTRL_5 -287 0x0012 //TX_NS_LVL_CTRL_6 +284 0x0018 //TX_NS_LVL_CTRL_3 +285 0x0016 //TX_NS_LVL_CTRL_4 +286 0x0012 //TX_NS_LVL_CTRL_5 +287 0x0016 //TX_NS_LVL_CTRL_6 288 0x0017 //TX_NS_LVL_CTRL_7 289 0x000E //TX_MIN_GAIN_S_0 -290 0x0012 //TX_MIN_GAIN_S_1 -291 0x0007 //TX_MIN_GAIN_S_2 -292 0x0012 //TX_MIN_GAIN_S_3 -293 0x0010 //TX_MIN_GAIN_S_4 +290 0x0007 //TX_MIN_GAIN_S_1 +291 0x0012 //TX_MIN_GAIN_S_2 +292 0x0010 //TX_MIN_GAIN_S_3 +293 0x0012 //TX_MIN_GAIN_S_4 294 0x0012 //TX_MIN_GAIN_S_5 295 0x0012 //TX_MIN_GAIN_S_6 296 0x0012 //TX_MIN_GAIN_S_7 @@ -2075,29 +2993,29 @@ 312 0x7FFF //TX_A_POST_FILT_0 313 0x2000 //TX_A_POST_FILT_1 314 0x4000 //TX_A_POST_FILT_S_0 -315 0x5000 //TX_A_POST_FILT_S_1 +315 0x4000 //TX_A_POST_FILT_S_1 316 0x4000 //TX_A_POST_FILT_S_2 317 0x4000 //TX_A_POST_FILT_S_3 318 0x4000 //TX_A_POST_FILT_S_4 319 0x4000 //TX_A_POST_FILT_S_5 -320 0x4000 //TX_A_POST_FILT_S_6 +320 0x5000 //TX_A_POST_FILT_S_6 321 0x7000 //TX_A_POST_FILT_S_7 322 0x1000 //TX_B_POST_FILT_0 323 0x2000 //TX_B_POST_FILT_1 -324 0x3000 //TX_B_POST_FILT_2 +324 0x2000 //TX_B_POST_FILT_2 325 0x2000 //TX_B_POST_FILT_3 -326 0x5000 //TX_B_POST_FILT_4 +326 0x2000 //TX_B_POST_FILT_4 327 0x2000 //TX_B_POST_FILT_5 -328 0x6000 //TX_B_POST_FILT_6 +328 0x3000 //TX_B_POST_FILT_6 329 0x3000 //TX_B_POST_FILT_7 330 0x1000 //TX_B_LESSCUT_RTO_S_0 -331 0x6000 //TX_B_LESSCUT_RTO_S_1 -332 0x6000 //TX_B_LESSCUT_RTO_S_2 -333 0x6000 //TX_B_LESSCUT_RTO_S_3 -334 0x6000 //TX_B_LESSCUT_RTO_S_4 -335 0x6000 //TX_B_LESSCUT_RTO_S_5 -336 0x7FFF //TX_B_LESSCUT_RTO_S_6 -337 0x7FFF //TX_B_LESSCUT_RTO_S_7 +331 0x1000 //TX_B_LESSCUT_RTO_S_1 +332 0x1000 //TX_B_LESSCUT_RTO_S_2 +333 0x1000 //TX_B_LESSCUT_RTO_S_3 +334 0x1000 //TX_B_LESSCUT_RTO_S_4 +335 0x1000 //TX_B_LESSCUT_RTO_S_5 +336 0x1000 //TX_B_LESSCUT_RTO_S_6 +337 0x1000 //TX_B_LESSCUT_RTO_S_7 338 0x7E14 //TX_LAMBDA_PFILT 339 0x7C29 //TX_LAMBDA_PFILT_S_0 340 0x7C29 //TX_LAMBDA_PFILT_S_1 @@ -2140,10 +3058,10 @@ 377 0x4E20 //TX_NOISE_TH_5_4 378 0x39DF //TX_NOISE_TH_6 379 0x0014 //TX_MINENOISE_TH -380 0x4000 //TX_MINENOISE_MIC0_TH_MTS -381 0xFFEE //TX_MINENOISE_MIC0_TH_EXP -382 0x6000 //TX_MINENOISE_MIC0_S_TH_MTS -383 0xFFF3 //TX_MINENOISE_MIC0_S_TH_EXP +380 0xD508 //TX_MORENS_TFMASK_TH +381 0x0001 //TX_DRC_QUIET_FLOOR +382 0x6D60 //TX_RATIODTL_CUT_TH +383 0x1482 //TX_DT_CUT_K1 384 0x00A5 //TX_OUT_ENER_S_TH_CLEAN 385 0x00A5 //TX_OUT_ENER_S_TH_LESSCLEAN 386 0x00A5 //TX_OUT_ENER_S_TH_NOISY @@ -2151,15 +3069,15 @@ 388 0x0200 //TX_OUT_ENER_TH_SPEECH 389 0x2000 //TX_SN_NPB_GAIN 390 0x0000 //TX_NN_NPB_GAIN -391 0x0000 //TX_CSX_ALPHA_0 -392 0x0000 //TX_CSX_ALPHA_1 -393 0x0000 //TX_CSX_ALPHA_2 -394 0x0000 //TX_CSX_ALPHA_3 -395 0x0800 //TX_MU_ARSP_EST -396 0x00C8 //TX_P_OUTBEAM_MIN_TH +391 0x3000 //TX_POST_MASK_SUP_HSNE +392 0x07D0 //TX_TAIL_DET_TH +393 0x4000 //TX_B_LESSCUT_RTO_WTA +394 0x0000 //TX_MEL_G_R +395 0x0080 //TX_SUPHIGH_TH +396 0x0000 //TX_MASK_G_R 397 0x0002 //TX_EXTRA_NS_L -398 0x0800 //TX_EXTRA_NS_A -399 0x0005 //TX_VR_NOISE_FLOOR_TH +398 0x1800 //TX_C_POST_FLT_MASK +399 0x7FFF //TX_A_POST_FLT_WNS 400 0x0148 //TX_MIN_G_LOW300HZ 401 0x0004 //TX_MAXLEVEL_CNG 402 0x00B4 //TX_STN_NOISE_TH @@ -2274,16 +3192,16 @@ 511 0x6666 //TX_MIC_TO_BFGAIN 512 0x0000 //TX_MICTOBFGAIN0 513 0x0000 //TX_FASTMUE_TH -514 0x0000 //TX_DERVB_LEN_0 -515 0x0000 //TX_DERVB_LEN_1 -516 0x0000 //TX_RHO_DERVB -517 0x0000 //TX_MIC_INDX_DERVB -518 0x0000 //TX_MU_DERVB -519 0x0000 //TX_DR_RESRV_0 -520 0x0000 //TX_DR_RESRV_1 -521 0x0000 //TX_DR_RESRV_2 -522 0x0000 //TX_DR_RESRV_3 -523 0x0000 //TX_DR_RESRV_4 +514 0x2CCC //TX_DEREVERB_LF_MU +515 0x3200 //TX_DEREVERB_HF_MU +516 0x0007 //TX_DEREVERB_DELAY +517 0x0004 //TX_DEREVERB_COEF_LEN +518 0x0003 //TX_DEREVERB_DNR +519 0x0000 //TX_DEREVERB_ALPHA +520 0x0000 //TX_DEREVERB_BETA +521 0x7FFF //TX_GSC_RTOL_TH +522 0x7FFF //TX_GSC_RTOH_TH +523 0x7E2C //TX_WIDE2_MEANHTH 524 0x0000 //TX_DR_RESRV_5 525 0x0000 //TX_DR_RESRV_6 526 0x0000 //TX_DR_RESRV_7 @@ -2657,6 +3575,71 @@ 894 0xC000 //TX_FASTNS_SSA_THHFL 895 0xCCCC //TX_FASTNS_SSA_THLFH 896 0xD999 //TX_FASTNS_SSA_THHFH +897 0x2339 //TX_SENDFUNC_REG_MICMUTE +898 0x0021 //TX_SENDFUNC_REG_MICMUTE1 +899 0x02BC //TX_MICMUTE_RATIO_THR +900 0x0140 //TX_MICMUTE_AMP_THR +901 0x0004 //TX_MICMUTE_HPF_IND +902 0x00C0 //TX_MICMUTE_LOG_EYR_TH +903 0x0008 //TX_MICMUTE_CVG_TIME +904 0x0008 //TX_MICMUTE_RELEASE_TIME +905 0x01FE //TX_MIC_VOLUME_MIC0MUTE +906 0x0020 //TX_MICMUTE_EPD_OFFSET_0 +907 0x001E //TX_MICMUTE_FRQ_AEC_L +908 0x7999 //TX_MICMUTE_EAD_THR +909 0x7FFF //TX_MICMUTE_LAMBDA_CB_NLE +910 0x7FFF //TX_MICMUTE_LAMBDA_RE_EST +911 0x4000 //TX_DTD_THR1_MICMUTE_0 +912 0x7000 //TX_DTD_THR1_MICMUTE_1 +913 0x7FFF //TX_DTD_THR1_MICMUTE_2 +914 0x7FFF //TX_DTD_THR1_MICMUTE_3 +915 0x6CCC //TX_DTD_THR2_MICMUTE_0 +916 0x0400 //TX_MICMUTE_MIN_EQ_RE_EST_0 +917 0x0400 //TX_MICMUTE_MIN_EQ_RE_EST_1 +918 0x1000 //TX_MICMUTE_MIN_EQ_RE_EST_2 +919 0x7FFF //TX_MICMUTE_MIN_EQ_RE_EST_3 +920 0x7FFF //TX_MICMUTE_MIN_EQ_RE_EST_4 +921 0x4000 //TX_MICMUTE_C_POST_FLT +922 0x03E8 //TX_MICMUTE_DT_CUT_K +923 0x0001 //TX_MICMUTE_DT_CUT_THR +924 0x03E8 //TX_MICMUTE_DT_CUT_K2 +925 0x0001 //TX_MICMUTE_DT_CUT_THR2 +926 0x0064 //TX_MICMUTE_DT2_HOLD_N +927 0x1000 //TX_MICMUTE_RATIODTH_THCUT +928 0x1000 //TX_MICMUTE_B_POST_FLT_ECHOL +929 0x7FFF //TX_MICMUTE_B_POST_FLT_ECHOH +930 0x0400 //TX_MICMUTE_C_POST_FLT_MASK +931 0x7999 //TX_MICMUTE_RATIODTL_CUT_TH +932 0x0258 //TX_MICMUTE_DT_CUT_K1 +933 0x0800 //TX_MICMUTE_N2_SN_EST +934 0xFC00 //TX_MICMUTE_THR_SN_EST_0 +935 0x001C //TX_MICMUTE_MIN_G_CTRL_0 +936 0x6000 //TX_MICMUTE_A_POST_FILT_S_0 +937 0x7000 //TX_MICMUTE_B_POST_FILT_0 +938 0x2710 //TX_MIC1RUB_AMP_THR +939 0x0010 //TX_MIC1MUTE_RATIO_THR +940 0x0450 //TX_MIC1MUTE_AMP_THR +941 0x0008 //TX_MIC1MUTE_CVG_TIME +942 0x0008 //TX_MIC1MUTE_RELEASE_TIME +943 0x0000 //TX_AMS_RESRV_01 +944 0x0000 //TX_AMS_RESRV_02 +945 0x0000 //TX_AMS_RESRV_03 +946 0x0000 //TX_AMS_RESRV_04 +947 0x0000 //TX_AMS_RESRV_05 +948 0x0000 //TX_AMS_RESRV_06 +949 0x0000 //TX_AMS_RESRV_07 +950 0x0000 //TX_AMS_RESRV_08 +951 0x0000 //TX_AMS_RESRV_09 +952 0x0000 //TX_AMS_RESRV_10 +953 0x0000 //TX_AMS_RESRV_11 +954 0x0000 //TX_AMS_RESRV_12 +955 0x0000 //TX_AMS_RESRV_13 +956 0x0000 //TX_AMS_RESRV_14 +957 0x0000 //TX_AMS_RESRV_15 +958 0x0000 //TX_AMS_RESRV_16 +959 0x0000 //TX_AMS_RESRV_17 +960 0x0000 //TX_AMS_RESRV_18 +961 0x0000 //TX_AMS_RESRV_19 #RX 0 0x003C //RX_RECVFUNC_MODE_0 1 0x0000 //RX_RECVFUNC_MODE_1 @@ -3508,10 +4491,862 @@ 110 0x0000 //RX_FDDRC_RESRV_0 129 0x0100 //RX_SPK_VOL 130 0x0000 //RX_VOL_RESRV_0 +#RX 2 +157 0x003C //RX_RECVFUNC_MODE_0 +158 0x0000 //RX_RECVFUNC_MODE_1 +159 0x0004 //RX_SAMPLINGFREQ_SIG +160 0x0004 //RX_SAMPLINGFREQ_PROC +161 0x000A //RX_FRAME_SZ +162 0x0000 //RX_DELAY_OPT +163 0x1000 //RX_TDDRC_ALPHA_UP_1 +164 0x1000 //RX_TDDRC_ALPHA_UP_2 +165 0x1000 //RX_TDDRC_ALPHA_UP_3 +166 0x1000 //RX_TDDRC_ALPHA_UP_4 +167 0x064E //RX_PGA +168 0x7FFF //RX_A_HP +169 0x4000 //RX_B_PE +170 0x5800 //RX_THR_PITCH_DET_0 +171 0x5000 //RX_THR_PITCH_DET_1 +172 0x4000 //RX_THR_PITCH_DET_2 +173 0x0008 //RX_PITCH_BFR_LEN +174 0x0003 //RX_SBD_PITCH_DET +175 0x0100 //RX_PP_RESRV_0 +176 0x0020 //RX_PP_RESRV_1 +177 0x0600 //RX_N_SN_EST +178 0x000C //RX_N2_SN_EST +179 0x000F //RX_NS_LVL_CTRL +180 0xF800 //RX_THR_SN_EST +181 0x7E00 //RX_LAMBDA_PFILT +182 0x000A //RX_FENS_RESRV_0 +183 0x0190 //RX_FENS_RESRV_1 +184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +187 0x0002 //RX_EXTRA_NS_L +188 0x0800 //RX_EXTRA_NS_A +189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +190 0x7000 //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +192 0x199A //RX_A_POST_FLT +193 0x0000 //RX_LMT_THRD +194 0x4000 //RX_LMT_ALPHA +195 0x0020 //RX_FDEQ_SUBNUM +196 0x4848 //RX_FDEQ_GAIN_0 +197 0x4850 //RX_FDEQ_GAIN_1 +198 0x6478 //RX_FDEQ_GAIN_2 +199 0x8689 //RX_FDEQ_GAIN_3 +200 0x908F //RX_FDEQ_GAIN_4 +201 0x9495 //RX_FDEQ_GAIN_5 +202 0x989D //RX_FDEQ_GAIN_6 +203 0x9DA6 //RX_FDEQ_GAIN_7 +204 0xA895 //RX_FDEQ_GAIN_8 +205 0x8A8A //RX_FDEQ_GAIN_9 +206 0x8E78 //RX_FDEQ_GAIN_10 +207 0x7070 //RX_FDEQ_GAIN_11 +208 0x7680 //RX_FDEQ_GAIN_12 +209 0x787C //RX_FDEQ_GAIN_13 +210 0x8890 //RX_FDEQ_GAIN_14 +211 0x9CAC //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0202 //RX_FDEQ_BIN_0 +221 0x0202 //RX_FDEQ_BIN_1 +222 0x0302 //RX_FDEQ_BIN_2 +223 0x0304 //RX_FDEQ_BIN_3 +224 0x0405 //RX_FDEQ_BIN_4 +225 0x0506 //RX_FDEQ_BIN_5 +226 0x0708 //RX_FDEQ_BIN_6 +227 0x090A //RX_FDEQ_BIN_7 +228 0x0B0C //RX_FDEQ_BIN_8 +229 0x0D0E //RX_FDEQ_BIN_9 +230 0x1013 //RX_FDEQ_BIN_10 +231 0x1719 //RX_FDEQ_BIN_11 +232 0x1B1E //RX_FDEQ_BIN_12 +233 0x1E1E //RX_FDEQ_BIN_13 +234 0x1E28 //RX_FDEQ_BIN_14 +235 0x282C //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x4000 //RX_FDEQ_RESRV_0 +245 0x0320 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0030 //RX_FDDRC_BAND_MARGIN_1 +248 0x0050 //RX_FDDRC_BAND_MARGIN_2 +249 0x0080 //RX_FDDRC_BAND_MARGIN_3 +250 0x0007 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x5000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x6400 //RX_FDDRC_THRD_3_2 +258 0x6400 //RX_FDDRC_THRD_3_3 +259 0x2000 //RX_FDDRC_SLANT_0_0 +260 0x2000 //RX_FDDRC_SLANT_0_1 +261 0x2000 //RX_FDDRC_SLANT_0_2 +262 0x2000 //RX_FDDRC_SLANT_0_3 +263 0x5333 //RX_FDDRC_SLANT_1_0 +264 0x5333 //RX_FDDRC_SLANT_1_1 +265 0x5333 //RX_FDDRC_SLANT_1_2 +266 0x5333 //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +268 0x0002 //RX_FILTINDX +269 0x0000 //RX_TDDRC_THRD_0 +270 0x0000 //RX_TDDRC_THRD_1 +271 0x1800 //RX_TDDRC_THRD_2 +272 0x1800 //RX_TDDRC_THRD_3 +273 0x3000 //RX_TDDRC_SLANT_0 +274 0x6E00 //RX_TDDRC_SLANT_1 +275 0x1000 //RX_TDDRC_ALPHA_UP_0 +276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x199A //RX_TDDRC_HMNC_GAIN +279 0x0001 //RX_TDDRC_SMT_FLAG +280 0x0CCD //RX_TDDRC_SMT_W +281 0x0275 //RX_TDDRC_DRC_GAIN +282 0x7C00 //RX_LAMBDA_PKA_FP +283 0x2000 //RX_TPKA_FP +284 0x2000 //RX_MIN_G_FP +285 0x0080 //RX_MAX_G_FP +286 0x000D //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 +288 0x0000 //RX_MAXLEVEL_CNG +289 0x3000 //RX_BWE_UV_TH +290 0x3000 //RX_BWE_UV_TH2 +291 0x1800 //RX_BWE_UV_TH3 +292 0x1000 //RX_BWE_V_TH +293 0x04CD //RX_BWE_GAIN1_V_TH1 +294 0x0F33 //RX_BWE_GAIN1_V_TH2 +295 0x7333 //RX_BWE_UV_EQ +296 0x199A //RX_BWE_V_EQ +297 0x7333 //RX_BWE_TONE_TH +298 0x0004 //RX_BWE_UV_HOLD_T +299 0x6CCD //RX_BWE_GAIN2_ALPHA +300 0x799A //RX_BWE_GAIN3_ALPHA +301 0x001E //RX_BWE_CUTOFF +302 0x3000 //RX_BWE_GAINFILL +303 0x3200 //RX_BWE_MAXTH_TONE +304 0x2000 //RX_BWE_EQ_0 +305 0x2000 //RX_BWE_EQ_1 +306 0x2000 //RX_BWE_EQ_2 +307 0x2000 //RX_BWE_EQ_3 +308 0x2000 //RX_BWE_EQ_4 +309 0x2000 //RX_BWE_EQ_5 +310 0x2000 //RX_BWE_EQ_6 +311 0x0000 //RX_BWE_RESRV_0 +312 0x0000 //RX_BWE_RESRV_1 +313 0x0000 //RX_BWE_RESRV_2 +#VOL 0 +163 0x1000 //RX_TDDRC_ALPHA_UP_1 +164 0x1000 //RX_TDDRC_ALPHA_UP_2 +165 0x1000 //RX_TDDRC_ALPHA_UP_3 +166 0x1000 //RX_TDDRC_ALPHA_UP_4 +184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +190 0x7000 //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +269 0x0000 //RX_TDDRC_THRD_0 +270 0x0000 //RX_TDDRC_THRD_1 +271 0x1800 //RX_TDDRC_THRD_2 +272 0x1800 //RX_TDDRC_THRD_3 +273 0x3000 //RX_TDDRC_SLANT_0 +274 0x6E00 //RX_TDDRC_SLANT_1 +275 0x1000 //RX_TDDRC_ALPHA_UP_0 +276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x199A //RX_TDDRC_HMNC_GAIN +279 0x0001 //RX_TDDRC_SMT_FLAG +280 0x0CCD //RX_TDDRC_SMT_W +281 0x0275 //RX_TDDRC_DRC_GAIN +195 0x0020 //RX_FDEQ_SUBNUM +196 0x4848 //RX_FDEQ_GAIN_0 +197 0x4850 //RX_FDEQ_GAIN_1 +198 0x6478 //RX_FDEQ_GAIN_2 +199 0x8689 //RX_FDEQ_GAIN_3 +200 0x908F //RX_FDEQ_GAIN_4 +201 0x9495 //RX_FDEQ_GAIN_5 +202 0x989D //RX_FDEQ_GAIN_6 +203 0x9DA6 //RX_FDEQ_GAIN_7 +204 0xA895 //RX_FDEQ_GAIN_8 +205 0x8A8A //RX_FDEQ_GAIN_9 +206 0x8E78 //RX_FDEQ_GAIN_10 +207 0x7070 //RX_FDEQ_GAIN_11 +208 0x7680 //RX_FDEQ_GAIN_12 +209 0x787C //RX_FDEQ_GAIN_13 +210 0x8890 //RX_FDEQ_GAIN_14 +211 0x9CAC //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0202 //RX_FDEQ_BIN_0 +221 0x0202 //RX_FDEQ_BIN_1 +222 0x0302 //RX_FDEQ_BIN_2 +223 0x0304 //RX_FDEQ_BIN_3 +224 0x0405 //RX_FDEQ_BIN_4 +225 0x0506 //RX_FDEQ_BIN_5 +226 0x0708 //RX_FDEQ_BIN_6 +227 0x090A //RX_FDEQ_BIN_7 +228 0x0B0C //RX_FDEQ_BIN_8 +229 0x0D0E //RX_FDEQ_BIN_9 +230 0x1013 //RX_FDEQ_BIN_10 +231 0x1719 //RX_FDEQ_BIN_11 +232 0x1B1E //RX_FDEQ_BIN_12 +233 0x1E1E //RX_FDEQ_BIN_13 +234 0x1E28 //RX_FDEQ_BIN_14 +235 0x282C //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x4000 //RX_FDEQ_RESRV_0 +245 0x0320 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0030 //RX_FDDRC_BAND_MARGIN_1 +248 0x0050 //RX_FDDRC_BAND_MARGIN_2 +249 0x0080 //RX_FDDRC_BAND_MARGIN_3 +250 0x0007 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x5000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x6400 //RX_FDDRC_THRD_3_2 +258 0x6400 //RX_FDDRC_THRD_3_3 +259 0x2000 //RX_FDDRC_SLANT_0_0 +260 0x2000 //RX_FDDRC_SLANT_0_1 +261 0x2000 //RX_FDDRC_SLANT_0_2 +262 0x2000 //RX_FDDRC_SLANT_0_3 +263 0x5333 //RX_FDDRC_SLANT_1_0 +264 0x5333 //RX_FDDRC_SLANT_1_1 +265 0x5333 //RX_FDDRC_SLANT_1_2 +266 0x5333 //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +286 0x000D //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 +#VOL 1 +163 0x1000 //RX_TDDRC_ALPHA_UP_1 +164 0x1000 //RX_TDDRC_ALPHA_UP_2 +165 0x1000 //RX_TDDRC_ALPHA_UP_3 +166 0x1000 //RX_TDDRC_ALPHA_UP_4 +184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +190 0x7000 //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +269 0x0000 //RX_TDDRC_THRD_0 +270 0x0000 //RX_TDDRC_THRD_1 +271 0x1800 //RX_TDDRC_THRD_2 +272 0x1800 //RX_TDDRC_THRD_3 +273 0x3000 //RX_TDDRC_SLANT_0 +274 0x6E00 //RX_TDDRC_SLANT_1 +275 0x1000 //RX_TDDRC_ALPHA_UP_0 +276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x199A //RX_TDDRC_HMNC_GAIN +279 0x0001 //RX_TDDRC_SMT_FLAG +280 0x0CCD //RX_TDDRC_SMT_W +281 0x0275 //RX_TDDRC_DRC_GAIN +195 0x0020 //RX_FDEQ_SUBNUM +196 0x4848 //RX_FDEQ_GAIN_0 +197 0x4850 //RX_FDEQ_GAIN_1 +198 0x6478 //RX_FDEQ_GAIN_2 +199 0x8689 //RX_FDEQ_GAIN_3 +200 0x908F //RX_FDEQ_GAIN_4 +201 0x9495 //RX_FDEQ_GAIN_5 +202 0x989D //RX_FDEQ_GAIN_6 +203 0x9DA6 //RX_FDEQ_GAIN_7 +204 0xA895 //RX_FDEQ_GAIN_8 +205 0x8A8A //RX_FDEQ_GAIN_9 +206 0x8E78 //RX_FDEQ_GAIN_10 +207 0x7070 //RX_FDEQ_GAIN_11 +208 0x7680 //RX_FDEQ_GAIN_12 +209 0x787C //RX_FDEQ_GAIN_13 +210 0x8890 //RX_FDEQ_GAIN_14 +211 0x9CAC //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0202 //RX_FDEQ_BIN_0 +221 0x0202 //RX_FDEQ_BIN_1 +222 0x0302 //RX_FDEQ_BIN_2 +223 0x0304 //RX_FDEQ_BIN_3 +224 0x0405 //RX_FDEQ_BIN_4 +225 0x0506 //RX_FDEQ_BIN_5 +226 0x0708 //RX_FDEQ_BIN_6 +227 0x090A //RX_FDEQ_BIN_7 +228 0x0B0C //RX_FDEQ_BIN_8 +229 0x0D0E //RX_FDEQ_BIN_9 +230 0x1013 //RX_FDEQ_BIN_10 +231 0x1719 //RX_FDEQ_BIN_11 +232 0x1B1E //RX_FDEQ_BIN_12 +233 0x1E1E //RX_FDEQ_BIN_13 +234 0x1E28 //RX_FDEQ_BIN_14 +235 0x282C //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x4000 //RX_FDEQ_RESRV_0 +245 0x0320 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0030 //RX_FDDRC_BAND_MARGIN_1 +248 0x0050 //RX_FDDRC_BAND_MARGIN_2 +249 0x0080 //RX_FDDRC_BAND_MARGIN_3 +250 0x0007 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x5000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x6400 //RX_FDDRC_THRD_3_2 +258 0x6400 //RX_FDDRC_THRD_3_3 +259 0x2000 //RX_FDDRC_SLANT_0_0 +260 0x2000 //RX_FDDRC_SLANT_0_1 +261 0x2000 //RX_FDDRC_SLANT_0_2 +262 0x2000 //RX_FDDRC_SLANT_0_3 +263 0x5333 //RX_FDDRC_SLANT_1_0 +264 0x5333 //RX_FDDRC_SLANT_1_1 +265 0x5333 //RX_FDDRC_SLANT_1_2 +266 0x5333 //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +286 0x0016 //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 +#VOL 2 +163 0x1000 //RX_TDDRC_ALPHA_UP_1 +164 0x1000 //RX_TDDRC_ALPHA_UP_2 +165 0x1000 //RX_TDDRC_ALPHA_UP_3 +166 0x1000 //RX_TDDRC_ALPHA_UP_4 +184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +190 0x7000 //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +269 0x0000 //RX_TDDRC_THRD_0 +270 0x0000 //RX_TDDRC_THRD_1 +271 0x1800 //RX_TDDRC_THRD_2 +272 0x1800 //RX_TDDRC_THRD_3 +273 0x3000 //RX_TDDRC_SLANT_0 +274 0x6E00 //RX_TDDRC_SLANT_1 +275 0x1000 //RX_TDDRC_ALPHA_UP_0 +276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x199A //RX_TDDRC_HMNC_GAIN +279 0x0001 //RX_TDDRC_SMT_FLAG +280 0x0CCD //RX_TDDRC_SMT_W +281 0x0275 //RX_TDDRC_DRC_GAIN +195 0x0020 //RX_FDEQ_SUBNUM +196 0x4848 //RX_FDEQ_GAIN_0 +197 0x4850 //RX_FDEQ_GAIN_1 +198 0x6478 //RX_FDEQ_GAIN_2 +199 0x8689 //RX_FDEQ_GAIN_3 +200 0x908F //RX_FDEQ_GAIN_4 +201 0x9495 //RX_FDEQ_GAIN_5 +202 0x989D //RX_FDEQ_GAIN_6 +203 0x9DA6 //RX_FDEQ_GAIN_7 +204 0xA895 //RX_FDEQ_GAIN_8 +205 0x8A8A //RX_FDEQ_GAIN_9 +206 0x8E78 //RX_FDEQ_GAIN_10 +207 0x7070 //RX_FDEQ_GAIN_11 +208 0x7680 //RX_FDEQ_GAIN_12 +209 0x787C //RX_FDEQ_GAIN_13 +210 0x8890 //RX_FDEQ_GAIN_14 +211 0x9CAC //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0202 //RX_FDEQ_BIN_0 +221 0x0202 //RX_FDEQ_BIN_1 +222 0x0302 //RX_FDEQ_BIN_2 +223 0x0304 //RX_FDEQ_BIN_3 +224 0x0405 //RX_FDEQ_BIN_4 +225 0x0506 //RX_FDEQ_BIN_5 +226 0x0708 //RX_FDEQ_BIN_6 +227 0x090A //RX_FDEQ_BIN_7 +228 0x0B0C //RX_FDEQ_BIN_8 +229 0x0D0E //RX_FDEQ_BIN_9 +230 0x1013 //RX_FDEQ_BIN_10 +231 0x1719 //RX_FDEQ_BIN_11 +232 0x1B1E //RX_FDEQ_BIN_12 +233 0x1E1E //RX_FDEQ_BIN_13 +234 0x1E28 //RX_FDEQ_BIN_14 +235 0x282C //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x4000 //RX_FDEQ_RESRV_0 +245 0x0320 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0030 //RX_FDDRC_BAND_MARGIN_1 +248 0x0050 //RX_FDDRC_BAND_MARGIN_2 +249 0x0080 //RX_FDDRC_BAND_MARGIN_3 +250 0x0007 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x5000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x6400 //RX_FDDRC_THRD_3_2 +258 0x6400 //RX_FDDRC_THRD_3_3 +259 0x2000 //RX_FDDRC_SLANT_0_0 +260 0x2000 //RX_FDDRC_SLANT_0_1 +261 0x2000 //RX_FDDRC_SLANT_0_2 +262 0x2000 //RX_FDDRC_SLANT_0_3 +263 0x5333 //RX_FDDRC_SLANT_1_0 +264 0x5333 //RX_FDDRC_SLANT_1_1 +265 0x5333 //RX_FDDRC_SLANT_1_2 +266 0x5333 //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +286 0x0026 //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 +#VOL 3 +163 0x1000 //RX_TDDRC_ALPHA_UP_1 +164 0x1000 //RX_TDDRC_ALPHA_UP_2 +165 0x1000 //RX_TDDRC_ALPHA_UP_3 +166 0x1000 //RX_TDDRC_ALPHA_UP_4 +184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +190 0x7000 //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +269 0x0000 //RX_TDDRC_THRD_0 +270 0x0000 //RX_TDDRC_THRD_1 +271 0x1800 //RX_TDDRC_THRD_2 +272 0x1800 //RX_TDDRC_THRD_3 +273 0x3000 //RX_TDDRC_SLANT_0 +274 0x6E00 //RX_TDDRC_SLANT_1 +275 0x1000 //RX_TDDRC_ALPHA_UP_0 +276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x199A //RX_TDDRC_HMNC_GAIN +279 0x0001 //RX_TDDRC_SMT_FLAG +280 0x0CCD //RX_TDDRC_SMT_W +281 0x0275 //RX_TDDRC_DRC_GAIN +195 0x0020 //RX_FDEQ_SUBNUM +196 0x4848 //RX_FDEQ_GAIN_0 +197 0x4850 //RX_FDEQ_GAIN_1 +198 0x6478 //RX_FDEQ_GAIN_2 +199 0x8689 //RX_FDEQ_GAIN_3 +200 0x908F //RX_FDEQ_GAIN_4 +201 0x9495 //RX_FDEQ_GAIN_5 +202 0x989D //RX_FDEQ_GAIN_6 +203 0x9DA6 //RX_FDEQ_GAIN_7 +204 0xA895 //RX_FDEQ_GAIN_8 +205 0x8A8A //RX_FDEQ_GAIN_9 +206 0x8E78 //RX_FDEQ_GAIN_10 +207 0x7070 //RX_FDEQ_GAIN_11 +208 0x7680 //RX_FDEQ_GAIN_12 +209 0x787C //RX_FDEQ_GAIN_13 +210 0x8890 //RX_FDEQ_GAIN_14 +211 0x9CAC //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0202 //RX_FDEQ_BIN_0 +221 0x0202 //RX_FDEQ_BIN_1 +222 0x0302 //RX_FDEQ_BIN_2 +223 0x0304 //RX_FDEQ_BIN_3 +224 0x0405 //RX_FDEQ_BIN_4 +225 0x0506 //RX_FDEQ_BIN_5 +226 0x0708 //RX_FDEQ_BIN_6 +227 0x090A //RX_FDEQ_BIN_7 +228 0x0B0C //RX_FDEQ_BIN_8 +229 0x0D0E //RX_FDEQ_BIN_9 +230 0x1013 //RX_FDEQ_BIN_10 +231 0x1719 //RX_FDEQ_BIN_11 +232 0x1B1E //RX_FDEQ_BIN_12 +233 0x1E1E //RX_FDEQ_BIN_13 +234 0x1E28 //RX_FDEQ_BIN_14 +235 0x282C //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x4000 //RX_FDEQ_RESRV_0 +245 0x0320 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0030 //RX_FDDRC_BAND_MARGIN_1 +248 0x0050 //RX_FDDRC_BAND_MARGIN_2 +249 0x0080 //RX_FDDRC_BAND_MARGIN_3 +250 0x0007 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x5000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x6400 //RX_FDDRC_THRD_3_2 +258 0x6400 //RX_FDDRC_THRD_3_3 +259 0x2000 //RX_FDDRC_SLANT_0_0 +260 0x2000 //RX_FDDRC_SLANT_0_1 +261 0x2000 //RX_FDDRC_SLANT_0_2 +262 0x2000 //RX_FDDRC_SLANT_0_3 +263 0x5333 //RX_FDDRC_SLANT_1_0 +264 0x5333 //RX_FDDRC_SLANT_1_1 +265 0x5333 //RX_FDDRC_SLANT_1_2 +266 0x5333 //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +286 0x003D //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 +#VOL 4 +163 0x1000 //RX_TDDRC_ALPHA_UP_1 +164 0x1000 //RX_TDDRC_ALPHA_UP_2 +165 0x1000 //RX_TDDRC_ALPHA_UP_3 +166 0x1000 //RX_TDDRC_ALPHA_UP_4 +184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +190 0x7000 //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +269 0x0000 //RX_TDDRC_THRD_0 +270 0x0000 //RX_TDDRC_THRD_1 +271 0x1800 //RX_TDDRC_THRD_2 +272 0x1800 //RX_TDDRC_THRD_3 +273 0x3000 //RX_TDDRC_SLANT_0 +274 0x6E00 //RX_TDDRC_SLANT_1 +275 0x1000 //RX_TDDRC_ALPHA_UP_0 +276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x199A //RX_TDDRC_HMNC_GAIN +279 0x0001 //RX_TDDRC_SMT_FLAG +280 0x0CCD //RX_TDDRC_SMT_W +281 0x0275 //RX_TDDRC_DRC_GAIN +195 0x0020 //RX_FDEQ_SUBNUM +196 0x4848 //RX_FDEQ_GAIN_0 +197 0x4850 //RX_FDEQ_GAIN_1 +198 0x6478 //RX_FDEQ_GAIN_2 +199 0x8689 //RX_FDEQ_GAIN_3 +200 0x908F //RX_FDEQ_GAIN_4 +201 0x9495 //RX_FDEQ_GAIN_5 +202 0x989D //RX_FDEQ_GAIN_6 +203 0x9DA6 //RX_FDEQ_GAIN_7 +204 0xA895 //RX_FDEQ_GAIN_8 +205 0x8A8A //RX_FDEQ_GAIN_9 +206 0x8E78 //RX_FDEQ_GAIN_10 +207 0x7070 //RX_FDEQ_GAIN_11 +208 0x7680 //RX_FDEQ_GAIN_12 +209 0x787C //RX_FDEQ_GAIN_13 +210 0x8890 //RX_FDEQ_GAIN_14 +211 0x9CAC //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0202 //RX_FDEQ_BIN_0 +221 0x0202 //RX_FDEQ_BIN_1 +222 0x0302 //RX_FDEQ_BIN_2 +223 0x0304 //RX_FDEQ_BIN_3 +224 0x0405 //RX_FDEQ_BIN_4 +225 0x0506 //RX_FDEQ_BIN_5 +226 0x0708 //RX_FDEQ_BIN_6 +227 0x090A //RX_FDEQ_BIN_7 +228 0x0B0C //RX_FDEQ_BIN_8 +229 0x0D0E //RX_FDEQ_BIN_9 +230 0x1013 //RX_FDEQ_BIN_10 +231 0x1719 //RX_FDEQ_BIN_11 +232 0x1B1E //RX_FDEQ_BIN_12 +233 0x1E1E //RX_FDEQ_BIN_13 +234 0x1E28 //RX_FDEQ_BIN_14 +235 0x282C //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x4000 //RX_FDEQ_RESRV_0 +245 0x0320 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0030 //RX_FDDRC_BAND_MARGIN_1 +248 0x0050 //RX_FDDRC_BAND_MARGIN_2 +249 0x0080 //RX_FDDRC_BAND_MARGIN_3 +250 0x0007 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x5000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x6400 //RX_FDDRC_THRD_3_2 +258 0x6400 //RX_FDDRC_THRD_3_3 +259 0x2000 //RX_FDDRC_SLANT_0_0 +260 0x2000 //RX_FDDRC_SLANT_0_1 +261 0x2000 //RX_FDDRC_SLANT_0_2 +262 0x2000 //RX_FDDRC_SLANT_0_3 +263 0x5333 //RX_FDDRC_SLANT_1_0 +264 0x5333 //RX_FDDRC_SLANT_1_1 +265 0x5333 //RX_FDDRC_SLANT_1_2 +266 0x5333 //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +286 0x0060 //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 +#VOL 5 +163 0x1000 //RX_TDDRC_ALPHA_UP_1 +164 0x1000 //RX_TDDRC_ALPHA_UP_2 +165 0x1000 //RX_TDDRC_ALPHA_UP_3 +166 0x1000 //RX_TDDRC_ALPHA_UP_4 +184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +190 0x7000 //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +269 0x0000 //RX_TDDRC_THRD_0 +270 0x0000 //RX_TDDRC_THRD_1 +271 0x1800 //RX_TDDRC_THRD_2 +272 0x1800 //RX_TDDRC_THRD_3 +273 0x3000 //RX_TDDRC_SLANT_0 +274 0x6E00 //RX_TDDRC_SLANT_1 +275 0x1000 //RX_TDDRC_ALPHA_UP_0 +276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x199A //RX_TDDRC_HMNC_GAIN +279 0x0001 //RX_TDDRC_SMT_FLAG +280 0x0CCD //RX_TDDRC_SMT_W +281 0x0275 //RX_TDDRC_DRC_GAIN +195 0x0020 //RX_FDEQ_SUBNUM +196 0x4848 //RX_FDEQ_GAIN_0 +197 0x4850 //RX_FDEQ_GAIN_1 +198 0x6478 //RX_FDEQ_GAIN_2 +199 0x8689 //RX_FDEQ_GAIN_3 +200 0x908F //RX_FDEQ_GAIN_4 +201 0x9495 //RX_FDEQ_GAIN_5 +202 0x989D //RX_FDEQ_GAIN_6 +203 0x9DA6 //RX_FDEQ_GAIN_7 +204 0xA895 //RX_FDEQ_GAIN_8 +205 0x8A8A //RX_FDEQ_GAIN_9 +206 0x8E78 //RX_FDEQ_GAIN_10 +207 0x7070 //RX_FDEQ_GAIN_11 +208 0x7680 //RX_FDEQ_GAIN_12 +209 0x787C //RX_FDEQ_GAIN_13 +210 0x8890 //RX_FDEQ_GAIN_14 +211 0x9CAC //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0202 //RX_FDEQ_BIN_0 +221 0x0202 //RX_FDEQ_BIN_1 +222 0x0302 //RX_FDEQ_BIN_2 +223 0x0304 //RX_FDEQ_BIN_3 +224 0x0405 //RX_FDEQ_BIN_4 +225 0x0506 //RX_FDEQ_BIN_5 +226 0x0708 //RX_FDEQ_BIN_6 +227 0x090A //RX_FDEQ_BIN_7 +228 0x0B0C //RX_FDEQ_BIN_8 +229 0x0D0E //RX_FDEQ_BIN_9 +230 0x1013 //RX_FDEQ_BIN_10 +231 0x1719 //RX_FDEQ_BIN_11 +232 0x1B1E //RX_FDEQ_BIN_12 +233 0x1E1E //RX_FDEQ_BIN_13 +234 0x1E28 //RX_FDEQ_BIN_14 +235 0x282C //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x4000 //RX_FDEQ_RESRV_0 +245 0x0320 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0030 //RX_FDDRC_BAND_MARGIN_1 +248 0x0050 //RX_FDDRC_BAND_MARGIN_2 +249 0x0080 //RX_FDDRC_BAND_MARGIN_3 +250 0x0007 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x5000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x6400 //RX_FDDRC_THRD_3_2 +258 0x6400 //RX_FDDRC_THRD_3_3 +259 0x2000 //RX_FDDRC_SLANT_0_0 +260 0x2000 //RX_FDDRC_SLANT_0_1 +261 0x2000 //RX_FDDRC_SLANT_0_2 +262 0x2000 //RX_FDDRC_SLANT_0_3 +263 0x5333 //RX_FDDRC_SLANT_1_0 +264 0x5333 //RX_FDDRC_SLANT_1_1 +265 0x5333 //RX_FDDRC_SLANT_1_2 +266 0x5333 //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +286 0x0099 //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 +#VOL 6 +163 0x1000 //RX_TDDRC_ALPHA_UP_1 +164 0x1000 //RX_TDDRC_ALPHA_UP_2 +165 0x1000 //RX_TDDRC_ALPHA_UP_3 +166 0x1000 //RX_TDDRC_ALPHA_UP_4 +184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +190 0x7000 //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +269 0x0000 //RX_TDDRC_THRD_0 +270 0x0000 //RX_TDDRC_THRD_1 +271 0x1800 //RX_TDDRC_THRD_2 +272 0x1800 //RX_TDDRC_THRD_3 +273 0x3000 //RX_TDDRC_SLANT_0 +274 0x6E00 //RX_TDDRC_SLANT_1 +275 0x1000 //RX_TDDRC_ALPHA_UP_0 +276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x199A //RX_TDDRC_HMNC_GAIN +279 0x0001 //RX_TDDRC_SMT_FLAG +280 0x0CCD //RX_TDDRC_SMT_W +281 0x0275 //RX_TDDRC_DRC_GAIN +195 0x0020 //RX_FDEQ_SUBNUM +196 0x4848 //RX_FDEQ_GAIN_0 +197 0x4850 //RX_FDEQ_GAIN_1 +198 0x6478 //RX_FDEQ_GAIN_2 +199 0x8689 //RX_FDEQ_GAIN_3 +200 0x908F //RX_FDEQ_GAIN_4 +201 0x9495 //RX_FDEQ_GAIN_5 +202 0x989D //RX_FDEQ_GAIN_6 +203 0x9DA6 //RX_FDEQ_GAIN_7 +204 0xA895 //RX_FDEQ_GAIN_8 +205 0x8A8A //RX_FDEQ_GAIN_9 +206 0x8E78 //RX_FDEQ_GAIN_10 +207 0x7070 //RX_FDEQ_GAIN_11 +208 0x7680 //RX_FDEQ_GAIN_12 +209 0x787C //RX_FDEQ_GAIN_13 +210 0x8890 //RX_FDEQ_GAIN_14 +211 0x9CAC //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0202 //RX_FDEQ_BIN_0 +221 0x0202 //RX_FDEQ_BIN_1 +222 0x0302 //RX_FDEQ_BIN_2 +223 0x0304 //RX_FDEQ_BIN_3 +224 0x0405 //RX_FDEQ_BIN_4 +225 0x0506 //RX_FDEQ_BIN_5 +226 0x0708 //RX_FDEQ_BIN_6 +227 0x090A //RX_FDEQ_BIN_7 +228 0x0B0C //RX_FDEQ_BIN_8 +229 0x0D0E //RX_FDEQ_BIN_9 +230 0x1013 //RX_FDEQ_BIN_10 +231 0x1719 //RX_FDEQ_BIN_11 +232 0x1B1E //RX_FDEQ_BIN_12 +233 0x1E1E //RX_FDEQ_BIN_13 +234 0x1E28 //RX_FDEQ_BIN_14 +235 0x282C //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x4000 //RX_FDEQ_RESRV_0 +245 0x0320 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0030 //RX_FDDRC_BAND_MARGIN_1 +248 0x0050 //RX_FDDRC_BAND_MARGIN_2 +249 0x0080 //RX_FDDRC_BAND_MARGIN_3 +250 0x0007 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x5000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x6400 //RX_FDDRC_THRD_3_2 +258 0x6400 //RX_FDDRC_THRD_3_3 +259 0x2000 //RX_FDDRC_SLANT_0_0 +260 0x2000 //RX_FDDRC_SLANT_0_1 +261 0x2000 //RX_FDDRC_SLANT_0_2 +262 0x2000 //RX_FDDRC_SLANT_0_3 +263 0x5333 //RX_FDDRC_SLANT_1_0 +264 0x5333 //RX_FDDRC_SLANT_1_1 +265 0x5333 //RX_FDDRC_SLANT_1_2 +266 0x5333 //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +286 0x0100 //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 #CASE_NAME HANDSET-HANDSET-CUSTOM1-FB -#PARAM_TYPE TX+RX -#TOTAL_CUSTOM_STEP 7 +#PARAM_MODE FULL +#PARAM_TYPE TX+2RX +#TOTAL_CUSTOM_STEP 7+7 #TX 0 0x0000 //TX_OPERATION_MODE_0 1 0x0000 //TX_OPERATION_MODE_1 @@ -3764,12 +5599,12 @@ 248 0xF800 //TX_THR_SN_EST_6 249 0xF700 //TX_THR_SN_EST_7 250 0x0000 //TX_DELTA_THR_SN_EST_0 -251 0x0100 //TX_DELTA_THR_SN_EST_1 +251 0x0200 //TX_DELTA_THR_SN_EST_1 252 0x0200 //TX_DELTA_THR_SN_EST_2 253 0x0200 //TX_DELTA_THR_SN_EST_3 -254 0x0200 //TX_DELTA_THR_SN_EST_4 -255 0x0100 //TX_DELTA_THR_SN_EST_5 -256 0x0200 //TX_DELTA_THR_SN_EST_6 +254 0x0100 //TX_DELTA_THR_SN_EST_4 +255 0x0200 //TX_DELTA_THR_SN_EST_5 +256 0x0100 //TX_DELTA_THR_SN_EST_6 257 0x0200 //TX_DELTA_THR_SN_EST_7 258 0x4000 //TX_LAMBDA_NN_EST_0 259 0x4000 //TX_LAMBDA_NN_EST_1 @@ -3797,16 +5632,16 @@ 281 0x0014 //TX_NS_LVL_CTRL_0 282 0x0016 //TX_NS_LVL_CTRL_1 283 0x0016 //TX_NS_LVL_CTRL_2 -284 0x0016 //TX_NS_LVL_CTRL_3 -285 0x0018 //TX_NS_LVL_CTRL_4 -286 0x0016 //TX_NS_LVL_CTRL_5 -287 0x0012 //TX_NS_LVL_CTRL_6 +284 0x0018 //TX_NS_LVL_CTRL_3 +285 0x0016 //TX_NS_LVL_CTRL_4 +286 0x0012 //TX_NS_LVL_CTRL_5 +287 0x0016 //TX_NS_LVL_CTRL_6 288 0x0017 //TX_NS_LVL_CTRL_7 289 0x000E //TX_MIN_GAIN_S_0 -290 0x0012 //TX_MIN_GAIN_S_1 -291 0x0007 //TX_MIN_GAIN_S_2 -292 0x0012 //TX_MIN_GAIN_S_3 -293 0x0010 //TX_MIN_GAIN_S_4 +290 0x0007 //TX_MIN_GAIN_S_1 +291 0x0012 //TX_MIN_GAIN_S_2 +292 0x0010 //TX_MIN_GAIN_S_3 +293 0x0012 //TX_MIN_GAIN_S_4 294 0x0012 //TX_MIN_GAIN_S_5 295 0x0012 //TX_MIN_GAIN_S_6 296 0x0012 //TX_MIN_GAIN_S_7 @@ -3828,29 +5663,29 @@ 312 0x7FFF //TX_A_POST_FILT_0 313 0x2000 //TX_A_POST_FILT_1 314 0x4000 //TX_A_POST_FILT_S_0 -315 0x5000 //TX_A_POST_FILT_S_1 +315 0x4000 //TX_A_POST_FILT_S_1 316 0x4000 //TX_A_POST_FILT_S_2 317 0x4000 //TX_A_POST_FILT_S_3 318 0x4000 //TX_A_POST_FILT_S_4 319 0x4000 //TX_A_POST_FILT_S_5 -320 0x4000 //TX_A_POST_FILT_S_6 +320 0x5000 //TX_A_POST_FILT_S_6 321 0x7000 //TX_A_POST_FILT_S_7 322 0x1000 //TX_B_POST_FILT_0 323 0x2000 //TX_B_POST_FILT_1 -324 0x3000 //TX_B_POST_FILT_2 +324 0x2000 //TX_B_POST_FILT_2 325 0x2000 //TX_B_POST_FILT_3 -326 0x5000 //TX_B_POST_FILT_4 +326 0x2000 //TX_B_POST_FILT_4 327 0x2000 //TX_B_POST_FILT_5 -328 0x6000 //TX_B_POST_FILT_6 +328 0x3000 //TX_B_POST_FILT_6 329 0x3000 //TX_B_POST_FILT_7 330 0x1000 //TX_B_LESSCUT_RTO_S_0 -331 0x6000 //TX_B_LESSCUT_RTO_S_1 -332 0x6000 //TX_B_LESSCUT_RTO_S_2 -333 0x6000 //TX_B_LESSCUT_RTO_S_3 -334 0x6000 //TX_B_LESSCUT_RTO_S_4 -335 0x6000 //TX_B_LESSCUT_RTO_S_5 -336 0x7FFF //TX_B_LESSCUT_RTO_S_6 -337 0x7FFF //TX_B_LESSCUT_RTO_S_7 +331 0x1000 //TX_B_LESSCUT_RTO_S_1 +332 0x1000 //TX_B_LESSCUT_RTO_S_2 +333 0x1000 //TX_B_LESSCUT_RTO_S_3 +334 0x1000 //TX_B_LESSCUT_RTO_S_4 +335 0x1000 //TX_B_LESSCUT_RTO_S_5 +336 0x1000 //TX_B_LESSCUT_RTO_S_6 +337 0x1000 //TX_B_LESSCUT_RTO_S_7 338 0x7E14 //TX_LAMBDA_PFILT 339 0x7C29 //TX_LAMBDA_PFILT_S_0 340 0x7C29 //TX_LAMBDA_PFILT_S_1 @@ -3893,10 +5728,10 @@ 377 0x4E20 //TX_NOISE_TH_5_4 378 0x39DF //TX_NOISE_TH_6 379 0x0014 //TX_MINENOISE_TH -380 0x4000 //TX_MINENOISE_MIC0_TH_MTS -381 0xFFEE //TX_MINENOISE_MIC0_TH_EXP -382 0x6000 //TX_MINENOISE_MIC0_S_TH_MTS -383 0xFFF3 //TX_MINENOISE_MIC0_S_TH_EXP +380 0xD508 //TX_MORENS_TFMASK_TH +381 0x0001 //TX_DRC_QUIET_FLOOR +382 0x6D60 //TX_RATIODTL_CUT_TH +383 0x1482 //TX_DT_CUT_K1 384 0x00A5 //TX_OUT_ENER_S_TH_CLEAN 385 0x00A5 //TX_OUT_ENER_S_TH_LESSCLEAN 386 0x00A5 //TX_OUT_ENER_S_TH_NOISY @@ -3904,15 +5739,15 @@ 388 0x0200 //TX_OUT_ENER_TH_SPEECH 389 0x2000 //TX_SN_NPB_GAIN 390 0x0000 //TX_NN_NPB_GAIN -391 0x0000 //TX_CSX_ALPHA_0 -392 0x0000 //TX_CSX_ALPHA_1 -393 0x0000 //TX_CSX_ALPHA_2 -394 0x0000 //TX_CSX_ALPHA_3 -395 0x0800 //TX_MU_ARSP_EST -396 0x00C8 //TX_P_OUTBEAM_MIN_TH +391 0x3000 //TX_POST_MASK_SUP_HSNE +392 0x07D0 //TX_TAIL_DET_TH +393 0x4000 //TX_B_LESSCUT_RTO_WTA +394 0x0000 //TX_MEL_G_R +395 0x0080 //TX_SUPHIGH_TH +396 0x0000 //TX_MASK_G_R 397 0x0002 //TX_EXTRA_NS_L -398 0x0800 //TX_EXTRA_NS_A -399 0x0005 //TX_VR_NOISE_FLOOR_TH +398 0x1800 //TX_C_POST_FLT_MASK +399 0x7FFF //TX_A_POST_FLT_WNS 400 0x0148 //TX_MIN_G_LOW300HZ 401 0x0004 //TX_MAXLEVEL_CNG 402 0x00B4 //TX_STN_NOISE_TH @@ -4027,16 +5862,16 @@ 511 0x6666 //TX_MIC_TO_BFGAIN 512 0x0000 //TX_MICTOBFGAIN0 513 0x0000 //TX_FASTMUE_TH -514 0x0000 //TX_DERVB_LEN_0 -515 0x0000 //TX_DERVB_LEN_1 -516 0x0000 //TX_RHO_DERVB -517 0x0000 //TX_MIC_INDX_DERVB -518 0x0000 //TX_MU_DERVB -519 0x0000 //TX_DR_RESRV_0 -520 0x0000 //TX_DR_RESRV_1 -521 0x0000 //TX_DR_RESRV_2 -522 0x0000 //TX_DR_RESRV_3 -523 0x0000 //TX_DR_RESRV_4 +514 0x2CCC //TX_DEREVERB_LF_MU +515 0x3200 //TX_DEREVERB_HF_MU +516 0x0007 //TX_DEREVERB_DELAY +517 0x0004 //TX_DEREVERB_COEF_LEN +518 0x0003 //TX_DEREVERB_DNR +519 0x0000 //TX_DEREVERB_ALPHA +520 0x0000 //TX_DEREVERB_BETA +521 0x7FFF //TX_GSC_RTOL_TH +522 0x7FFF //TX_GSC_RTOH_TH +523 0x7E2C //TX_WIDE2_MEANHTH 524 0x0000 //TX_DR_RESRV_5 525 0x0000 //TX_DR_RESRV_6 526 0x0000 //TX_DR_RESRV_7 @@ -4410,6 +6245,71 @@ 894 0xC000 //TX_FASTNS_SSA_THHFL 895 0xCCCC //TX_FASTNS_SSA_THLFH 896 0xD999 //TX_FASTNS_SSA_THHFH +897 0x2339 //TX_SENDFUNC_REG_MICMUTE +898 0x0021 //TX_SENDFUNC_REG_MICMUTE1 +899 0x02BC //TX_MICMUTE_RATIO_THR +900 0x0140 //TX_MICMUTE_AMP_THR +901 0x0004 //TX_MICMUTE_HPF_IND +902 0x00C0 //TX_MICMUTE_LOG_EYR_TH +903 0x0008 //TX_MICMUTE_CVG_TIME +904 0x0008 //TX_MICMUTE_RELEASE_TIME +905 0x01FE //TX_MIC_VOLUME_MIC0MUTE +906 0x0020 //TX_MICMUTE_EPD_OFFSET_0 +907 0x001E //TX_MICMUTE_FRQ_AEC_L +908 0x7999 //TX_MICMUTE_EAD_THR +909 0x7FFF //TX_MICMUTE_LAMBDA_CB_NLE +910 0x7FFF //TX_MICMUTE_LAMBDA_RE_EST +911 0x4000 //TX_DTD_THR1_MICMUTE_0 +912 0x7000 //TX_DTD_THR1_MICMUTE_1 +913 0x7FFF //TX_DTD_THR1_MICMUTE_2 +914 0x7FFF //TX_DTD_THR1_MICMUTE_3 +915 0x6CCC //TX_DTD_THR2_MICMUTE_0 +916 0x0400 //TX_MICMUTE_MIN_EQ_RE_EST_0 +917 0x0400 //TX_MICMUTE_MIN_EQ_RE_EST_1 +918 0x1000 //TX_MICMUTE_MIN_EQ_RE_EST_2 +919 0x7FFF //TX_MICMUTE_MIN_EQ_RE_EST_3 +920 0x7FFF //TX_MICMUTE_MIN_EQ_RE_EST_4 +921 0x4000 //TX_MICMUTE_C_POST_FLT +922 0x03E8 //TX_MICMUTE_DT_CUT_K +923 0x0001 //TX_MICMUTE_DT_CUT_THR +924 0x03E8 //TX_MICMUTE_DT_CUT_K2 +925 0x0001 //TX_MICMUTE_DT_CUT_THR2 +926 0x0064 //TX_MICMUTE_DT2_HOLD_N +927 0x1000 //TX_MICMUTE_RATIODTH_THCUT +928 0x1000 //TX_MICMUTE_B_POST_FLT_ECHOL +929 0x7FFF //TX_MICMUTE_B_POST_FLT_ECHOH +930 0x0400 //TX_MICMUTE_C_POST_FLT_MASK +931 0x7999 //TX_MICMUTE_RATIODTL_CUT_TH +932 0x0258 //TX_MICMUTE_DT_CUT_K1 +933 0x0800 //TX_MICMUTE_N2_SN_EST +934 0xFC00 //TX_MICMUTE_THR_SN_EST_0 +935 0x001C //TX_MICMUTE_MIN_G_CTRL_0 +936 0x6000 //TX_MICMUTE_A_POST_FILT_S_0 +937 0x7000 //TX_MICMUTE_B_POST_FILT_0 +938 0x2710 //TX_MIC1RUB_AMP_THR +939 0x0010 //TX_MIC1MUTE_RATIO_THR +940 0x0450 //TX_MIC1MUTE_AMP_THR +941 0x0008 //TX_MIC1MUTE_CVG_TIME +942 0x0008 //TX_MIC1MUTE_RELEASE_TIME +943 0x0000 //TX_AMS_RESRV_01 +944 0x0000 //TX_AMS_RESRV_02 +945 0x0000 //TX_AMS_RESRV_03 +946 0x0000 //TX_AMS_RESRV_04 +947 0x0000 //TX_AMS_RESRV_05 +948 0x0000 //TX_AMS_RESRV_06 +949 0x0000 //TX_AMS_RESRV_07 +950 0x0000 //TX_AMS_RESRV_08 +951 0x0000 //TX_AMS_RESRV_09 +952 0x0000 //TX_AMS_RESRV_10 +953 0x0000 //TX_AMS_RESRV_11 +954 0x0000 //TX_AMS_RESRV_12 +955 0x0000 //TX_AMS_RESRV_13 +956 0x0000 //TX_AMS_RESRV_14 +957 0x0000 //TX_AMS_RESRV_15 +958 0x0000 //TX_AMS_RESRV_16 +959 0x0000 //TX_AMS_RESRV_17 +960 0x0000 //TX_AMS_RESRV_18 +961 0x0000 //TX_AMS_RESRV_19 #RX 0 0x003C //RX_RECVFUNC_MODE_0 1 0x0000 //RX_RECVFUNC_MODE_1 @@ -5261,14 +7161,866 @@ 110 0x0000 //RX_FDDRC_RESRV_0 129 0x0100 //RX_SPK_VOL 130 0x0000 //RX_VOL_RESRV_0 +#RX 2 +157 0x003C //RX_RECVFUNC_MODE_0 +158 0x0000 //RX_RECVFUNC_MODE_1 +159 0x0004 //RX_SAMPLINGFREQ_SIG +160 0x0004 //RX_SAMPLINGFREQ_PROC +161 0x000A //RX_FRAME_SZ +162 0x0000 //RX_DELAY_OPT +163 0x1000 //RX_TDDRC_ALPHA_UP_1 +164 0x1000 //RX_TDDRC_ALPHA_UP_2 +165 0x1000 //RX_TDDRC_ALPHA_UP_3 +166 0x1000 //RX_TDDRC_ALPHA_UP_4 +167 0x064E //RX_PGA +168 0x7FFF //RX_A_HP +169 0x4000 //RX_B_PE +170 0x5800 //RX_THR_PITCH_DET_0 +171 0x5000 //RX_THR_PITCH_DET_1 +172 0x4000 //RX_THR_PITCH_DET_2 +173 0x0008 //RX_PITCH_BFR_LEN +174 0x0003 //RX_SBD_PITCH_DET +175 0x0100 //RX_PP_RESRV_0 +176 0x0020 //RX_PP_RESRV_1 +177 0x0600 //RX_N_SN_EST +178 0x000C //RX_N2_SN_EST +179 0x000F //RX_NS_LVL_CTRL +180 0xF800 //RX_THR_SN_EST +181 0x7E00 //RX_LAMBDA_PFILT +182 0x000A //RX_FENS_RESRV_0 +183 0x0190 //RX_FENS_RESRV_1 +184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +187 0x0002 //RX_EXTRA_NS_L +188 0x0800 //RX_EXTRA_NS_A +189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +190 0x7000 //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +192 0x199A //RX_A_POST_FLT +193 0x0000 //RX_LMT_THRD +194 0x4000 //RX_LMT_ALPHA +195 0x0020 //RX_FDEQ_SUBNUM +196 0x4848 //RX_FDEQ_GAIN_0 +197 0x4850 //RX_FDEQ_GAIN_1 +198 0x6478 //RX_FDEQ_GAIN_2 +199 0x8689 //RX_FDEQ_GAIN_3 +200 0x908F //RX_FDEQ_GAIN_4 +201 0x9495 //RX_FDEQ_GAIN_5 +202 0x989D //RX_FDEQ_GAIN_6 +203 0x9DA6 //RX_FDEQ_GAIN_7 +204 0xA895 //RX_FDEQ_GAIN_8 +205 0x8A8A //RX_FDEQ_GAIN_9 +206 0x8E78 //RX_FDEQ_GAIN_10 +207 0x7070 //RX_FDEQ_GAIN_11 +208 0x7680 //RX_FDEQ_GAIN_12 +209 0x787C //RX_FDEQ_GAIN_13 +210 0x8890 //RX_FDEQ_GAIN_14 +211 0x9CAC //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0202 //RX_FDEQ_BIN_0 +221 0x0202 //RX_FDEQ_BIN_1 +222 0x0302 //RX_FDEQ_BIN_2 +223 0x0304 //RX_FDEQ_BIN_3 +224 0x0405 //RX_FDEQ_BIN_4 +225 0x0506 //RX_FDEQ_BIN_5 +226 0x0708 //RX_FDEQ_BIN_6 +227 0x090A //RX_FDEQ_BIN_7 +228 0x0B0C //RX_FDEQ_BIN_8 +229 0x0D0E //RX_FDEQ_BIN_9 +230 0x1013 //RX_FDEQ_BIN_10 +231 0x1719 //RX_FDEQ_BIN_11 +232 0x1B1E //RX_FDEQ_BIN_12 +233 0x1E1E //RX_FDEQ_BIN_13 +234 0x1E28 //RX_FDEQ_BIN_14 +235 0x282C //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x4000 //RX_FDEQ_RESRV_0 +245 0x0320 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0030 //RX_FDDRC_BAND_MARGIN_1 +248 0x0050 //RX_FDDRC_BAND_MARGIN_2 +249 0x0080 //RX_FDDRC_BAND_MARGIN_3 +250 0x0007 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x5000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x6400 //RX_FDDRC_THRD_3_2 +258 0x6400 //RX_FDDRC_THRD_3_3 +259 0x2000 //RX_FDDRC_SLANT_0_0 +260 0x2000 //RX_FDDRC_SLANT_0_1 +261 0x2000 //RX_FDDRC_SLANT_0_2 +262 0x2000 //RX_FDDRC_SLANT_0_3 +263 0x5333 //RX_FDDRC_SLANT_1_0 +264 0x5333 //RX_FDDRC_SLANT_1_1 +265 0x5333 //RX_FDDRC_SLANT_1_2 +266 0x5333 //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +268 0x0002 //RX_FILTINDX +269 0x0000 //RX_TDDRC_THRD_0 +270 0x0000 //RX_TDDRC_THRD_1 +271 0x1800 //RX_TDDRC_THRD_2 +272 0x1800 //RX_TDDRC_THRD_3 +273 0x3000 //RX_TDDRC_SLANT_0 +274 0x6E00 //RX_TDDRC_SLANT_1 +275 0x1000 //RX_TDDRC_ALPHA_UP_0 +276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x199A //RX_TDDRC_HMNC_GAIN +279 0x0001 //RX_TDDRC_SMT_FLAG +280 0x0CCD //RX_TDDRC_SMT_W +281 0x0275 //RX_TDDRC_DRC_GAIN +282 0x7C00 //RX_LAMBDA_PKA_FP +283 0x2000 //RX_TPKA_FP +284 0x2000 //RX_MIN_G_FP +285 0x0080 //RX_MAX_G_FP +286 0x000D //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 +288 0x0000 //RX_MAXLEVEL_CNG +289 0x3000 //RX_BWE_UV_TH +290 0x3000 //RX_BWE_UV_TH2 +291 0x1800 //RX_BWE_UV_TH3 +292 0x1000 //RX_BWE_V_TH +293 0x04CD //RX_BWE_GAIN1_V_TH1 +294 0x0F33 //RX_BWE_GAIN1_V_TH2 +295 0x7333 //RX_BWE_UV_EQ +296 0x199A //RX_BWE_V_EQ +297 0x7333 //RX_BWE_TONE_TH +298 0x0004 //RX_BWE_UV_HOLD_T +299 0x6CCD //RX_BWE_GAIN2_ALPHA +300 0x799A //RX_BWE_GAIN3_ALPHA +301 0x001E //RX_BWE_CUTOFF +302 0x3000 //RX_BWE_GAINFILL +303 0x3200 //RX_BWE_MAXTH_TONE +304 0x2000 //RX_BWE_EQ_0 +305 0x2000 //RX_BWE_EQ_1 +306 0x2000 //RX_BWE_EQ_2 +307 0x2000 //RX_BWE_EQ_3 +308 0x2000 //RX_BWE_EQ_4 +309 0x2000 //RX_BWE_EQ_5 +310 0x2000 //RX_BWE_EQ_6 +311 0x0000 //RX_BWE_RESRV_0 +312 0x0000 //RX_BWE_RESRV_1 +313 0x0000 //RX_BWE_RESRV_2 +#VOL 0 +163 0x1000 //RX_TDDRC_ALPHA_UP_1 +164 0x1000 //RX_TDDRC_ALPHA_UP_2 +165 0x1000 //RX_TDDRC_ALPHA_UP_3 +166 0x1000 //RX_TDDRC_ALPHA_UP_4 +184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +190 0x7000 //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +269 0x0000 //RX_TDDRC_THRD_0 +270 0x0000 //RX_TDDRC_THRD_1 +271 0x1800 //RX_TDDRC_THRD_2 +272 0x1800 //RX_TDDRC_THRD_3 +273 0x3000 //RX_TDDRC_SLANT_0 +274 0x6E00 //RX_TDDRC_SLANT_1 +275 0x1000 //RX_TDDRC_ALPHA_UP_0 +276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x199A //RX_TDDRC_HMNC_GAIN +279 0x0001 //RX_TDDRC_SMT_FLAG +280 0x0CCD //RX_TDDRC_SMT_W +281 0x0275 //RX_TDDRC_DRC_GAIN +195 0x0020 //RX_FDEQ_SUBNUM +196 0x4848 //RX_FDEQ_GAIN_0 +197 0x4850 //RX_FDEQ_GAIN_1 +198 0x6478 //RX_FDEQ_GAIN_2 +199 0x8689 //RX_FDEQ_GAIN_3 +200 0x908F //RX_FDEQ_GAIN_4 +201 0x9495 //RX_FDEQ_GAIN_5 +202 0x989D //RX_FDEQ_GAIN_6 +203 0x9DA6 //RX_FDEQ_GAIN_7 +204 0xA895 //RX_FDEQ_GAIN_8 +205 0x8A8A //RX_FDEQ_GAIN_9 +206 0x8E78 //RX_FDEQ_GAIN_10 +207 0x7070 //RX_FDEQ_GAIN_11 +208 0x7680 //RX_FDEQ_GAIN_12 +209 0x787C //RX_FDEQ_GAIN_13 +210 0x8890 //RX_FDEQ_GAIN_14 +211 0x9CAC //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0202 //RX_FDEQ_BIN_0 +221 0x0202 //RX_FDEQ_BIN_1 +222 0x0302 //RX_FDEQ_BIN_2 +223 0x0304 //RX_FDEQ_BIN_3 +224 0x0405 //RX_FDEQ_BIN_4 +225 0x0506 //RX_FDEQ_BIN_5 +226 0x0708 //RX_FDEQ_BIN_6 +227 0x090A //RX_FDEQ_BIN_7 +228 0x0B0C //RX_FDEQ_BIN_8 +229 0x0D0E //RX_FDEQ_BIN_9 +230 0x1013 //RX_FDEQ_BIN_10 +231 0x1719 //RX_FDEQ_BIN_11 +232 0x1B1E //RX_FDEQ_BIN_12 +233 0x1E1E //RX_FDEQ_BIN_13 +234 0x1E28 //RX_FDEQ_BIN_14 +235 0x282C //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x4000 //RX_FDEQ_RESRV_0 +245 0x0320 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0030 //RX_FDDRC_BAND_MARGIN_1 +248 0x0050 //RX_FDDRC_BAND_MARGIN_2 +249 0x0080 //RX_FDDRC_BAND_MARGIN_3 +250 0x0007 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x5000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x6400 //RX_FDDRC_THRD_3_2 +258 0x6400 //RX_FDDRC_THRD_3_3 +259 0x2000 //RX_FDDRC_SLANT_0_0 +260 0x2000 //RX_FDDRC_SLANT_0_1 +261 0x2000 //RX_FDDRC_SLANT_0_2 +262 0x2000 //RX_FDDRC_SLANT_0_3 +263 0x5333 //RX_FDDRC_SLANT_1_0 +264 0x5333 //RX_FDDRC_SLANT_1_1 +265 0x5333 //RX_FDDRC_SLANT_1_2 +266 0x5333 //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +286 0x000D //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 +#VOL 1 +163 0x1000 //RX_TDDRC_ALPHA_UP_1 +164 0x1000 //RX_TDDRC_ALPHA_UP_2 +165 0x1000 //RX_TDDRC_ALPHA_UP_3 +166 0x1000 //RX_TDDRC_ALPHA_UP_4 +184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +190 0x7000 //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +269 0x0000 //RX_TDDRC_THRD_0 +270 0x0000 //RX_TDDRC_THRD_1 +271 0x1800 //RX_TDDRC_THRD_2 +272 0x1800 //RX_TDDRC_THRD_3 +273 0x3000 //RX_TDDRC_SLANT_0 +274 0x6E00 //RX_TDDRC_SLANT_1 +275 0x1000 //RX_TDDRC_ALPHA_UP_0 +276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x199A //RX_TDDRC_HMNC_GAIN +279 0x0001 //RX_TDDRC_SMT_FLAG +280 0x0CCD //RX_TDDRC_SMT_W +281 0x0275 //RX_TDDRC_DRC_GAIN +195 0x0020 //RX_FDEQ_SUBNUM +196 0x4848 //RX_FDEQ_GAIN_0 +197 0x4850 //RX_FDEQ_GAIN_1 +198 0x6478 //RX_FDEQ_GAIN_2 +199 0x8689 //RX_FDEQ_GAIN_3 +200 0x908F //RX_FDEQ_GAIN_4 +201 0x9495 //RX_FDEQ_GAIN_5 +202 0x989D //RX_FDEQ_GAIN_6 +203 0x9DA6 //RX_FDEQ_GAIN_7 +204 0xA895 //RX_FDEQ_GAIN_8 +205 0x8A8A //RX_FDEQ_GAIN_9 +206 0x8E78 //RX_FDEQ_GAIN_10 +207 0x7070 //RX_FDEQ_GAIN_11 +208 0x7680 //RX_FDEQ_GAIN_12 +209 0x787C //RX_FDEQ_GAIN_13 +210 0x8890 //RX_FDEQ_GAIN_14 +211 0x9CAC //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0202 //RX_FDEQ_BIN_0 +221 0x0202 //RX_FDEQ_BIN_1 +222 0x0302 //RX_FDEQ_BIN_2 +223 0x0304 //RX_FDEQ_BIN_3 +224 0x0405 //RX_FDEQ_BIN_4 +225 0x0506 //RX_FDEQ_BIN_5 +226 0x0708 //RX_FDEQ_BIN_6 +227 0x090A //RX_FDEQ_BIN_7 +228 0x0B0C //RX_FDEQ_BIN_8 +229 0x0D0E //RX_FDEQ_BIN_9 +230 0x1013 //RX_FDEQ_BIN_10 +231 0x1719 //RX_FDEQ_BIN_11 +232 0x1B1E //RX_FDEQ_BIN_12 +233 0x1E1E //RX_FDEQ_BIN_13 +234 0x1E28 //RX_FDEQ_BIN_14 +235 0x282C //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x4000 //RX_FDEQ_RESRV_0 +245 0x0320 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0030 //RX_FDDRC_BAND_MARGIN_1 +248 0x0050 //RX_FDDRC_BAND_MARGIN_2 +249 0x0080 //RX_FDDRC_BAND_MARGIN_3 +250 0x0007 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x5000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x6400 //RX_FDDRC_THRD_3_2 +258 0x6400 //RX_FDDRC_THRD_3_3 +259 0x2000 //RX_FDDRC_SLANT_0_0 +260 0x2000 //RX_FDDRC_SLANT_0_1 +261 0x2000 //RX_FDDRC_SLANT_0_2 +262 0x2000 //RX_FDDRC_SLANT_0_3 +263 0x5333 //RX_FDDRC_SLANT_1_0 +264 0x5333 //RX_FDDRC_SLANT_1_1 +265 0x5333 //RX_FDDRC_SLANT_1_2 +266 0x5333 //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +286 0x0016 //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 +#VOL 2 +163 0x1000 //RX_TDDRC_ALPHA_UP_1 +164 0x1000 //RX_TDDRC_ALPHA_UP_2 +165 0x1000 //RX_TDDRC_ALPHA_UP_3 +166 0x1000 //RX_TDDRC_ALPHA_UP_4 +184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +190 0x7000 //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +269 0x0000 //RX_TDDRC_THRD_0 +270 0x0000 //RX_TDDRC_THRD_1 +271 0x1800 //RX_TDDRC_THRD_2 +272 0x1800 //RX_TDDRC_THRD_3 +273 0x3000 //RX_TDDRC_SLANT_0 +274 0x6E00 //RX_TDDRC_SLANT_1 +275 0x1000 //RX_TDDRC_ALPHA_UP_0 +276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x199A //RX_TDDRC_HMNC_GAIN +279 0x0001 //RX_TDDRC_SMT_FLAG +280 0x0CCD //RX_TDDRC_SMT_W +281 0x0275 //RX_TDDRC_DRC_GAIN +195 0x0020 //RX_FDEQ_SUBNUM +196 0x4848 //RX_FDEQ_GAIN_0 +197 0x4850 //RX_FDEQ_GAIN_1 +198 0x6478 //RX_FDEQ_GAIN_2 +199 0x8689 //RX_FDEQ_GAIN_3 +200 0x908F //RX_FDEQ_GAIN_4 +201 0x9495 //RX_FDEQ_GAIN_5 +202 0x989D //RX_FDEQ_GAIN_6 +203 0x9DA6 //RX_FDEQ_GAIN_7 +204 0xA895 //RX_FDEQ_GAIN_8 +205 0x8A8A //RX_FDEQ_GAIN_9 +206 0x8E78 //RX_FDEQ_GAIN_10 +207 0x7070 //RX_FDEQ_GAIN_11 +208 0x7680 //RX_FDEQ_GAIN_12 +209 0x787C //RX_FDEQ_GAIN_13 +210 0x8890 //RX_FDEQ_GAIN_14 +211 0x9CAC //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0202 //RX_FDEQ_BIN_0 +221 0x0202 //RX_FDEQ_BIN_1 +222 0x0302 //RX_FDEQ_BIN_2 +223 0x0304 //RX_FDEQ_BIN_3 +224 0x0405 //RX_FDEQ_BIN_4 +225 0x0506 //RX_FDEQ_BIN_5 +226 0x0708 //RX_FDEQ_BIN_6 +227 0x090A //RX_FDEQ_BIN_7 +228 0x0B0C //RX_FDEQ_BIN_8 +229 0x0D0E //RX_FDEQ_BIN_9 +230 0x1013 //RX_FDEQ_BIN_10 +231 0x1719 //RX_FDEQ_BIN_11 +232 0x1B1E //RX_FDEQ_BIN_12 +233 0x1E1E //RX_FDEQ_BIN_13 +234 0x1E28 //RX_FDEQ_BIN_14 +235 0x282C //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x4000 //RX_FDEQ_RESRV_0 +245 0x0320 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0030 //RX_FDDRC_BAND_MARGIN_1 +248 0x0050 //RX_FDDRC_BAND_MARGIN_2 +249 0x0080 //RX_FDDRC_BAND_MARGIN_3 +250 0x0007 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x5000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x6400 //RX_FDDRC_THRD_3_2 +258 0x6400 //RX_FDDRC_THRD_3_3 +259 0x2000 //RX_FDDRC_SLANT_0_0 +260 0x2000 //RX_FDDRC_SLANT_0_1 +261 0x2000 //RX_FDDRC_SLANT_0_2 +262 0x2000 //RX_FDDRC_SLANT_0_3 +263 0x5333 //RX_FDDRC_SLANT_1_0 +264 0x5333 //RX_FDDRC_SLANT_1_1 +265 0x5333 //RX_FDDRC_SLANT_1_2 +266 0x5333 //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +286 0x0026 //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 +#VOL 3 +163 0x1000 //RX_TDDRC_ALPHA_UP_1 +164 0x1000 //RX_TDDRC_ALPHA_UP_2 +165 0x1000 //RX_TDDRC_ALPHA_UP_3 +166 0x1000 //RX_TDDRC_ALPHA_UP_4 +184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +190 0x7000 //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +269 0x0000 //RX_TDDRC_THRD_0 +270 0x0000 //RX_TDDRC_THRD_1 +271 0x1800 //RX_TDDRC_THRD_2 +272 0x1800 //RX_TDDRC_THRD_3 +273 0x3000 //RX_TDDRC_SLANT_0 +274 0x6E00 //RX_TDDRC_SLANT_1 +275 0x1000 //RX_TDDRC_ALPHA_UP_0 +276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x199A //RX_TDDRC_HMNC_GAIN +279 0x0001 //RX_TDDRC_SMT_FLAG +280 0x0CCD //RX_TDDRC_SMT_W +281 0x0275 //RX_TDDRC_DRC_GAIN +195 0x0020 //RX_FDEQ_SUBNUM +196 0x4848 //RX_FDEQ_GAIN_0 +197 0x4850 //RX_FDEQ_GAIN_1 +198 0x6478 //RX_FDEQ_GAIN_2 +199 0x8689 //RX_FDEQ_GAIN_3 +200 0x908F //RX_FDEQ_GAIN_4 +201 0x9495 //RX_FDEQ_GAIN_5 +202 0x989D //RX_FDEQ_GAIN_6 +203 0x9DA6 //RX_FDEQ_GAIN_7 +204 0xA895 //RX_FDEQ_GAIN_8 +205 0x8A8A //RX_FDEQ_GAIN_9 +206 0x8E78 //RX_FDEQ_GAIN_10 +207 0x7070 //RX_FDEQ_GAIN_11 +208 0x7680 //RX_FDEQ_GAIN_12 +209 0x787C //RX_FDEQ_GAIN_13 +210 0x8890 //RX_FDEQ_GAIN_14 +211 0x9CAC //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0202 //RX_FDEQ_BIN_0 +221 0x0202 //RX_FDEQ_BIN_1 +222 0x0302 //RX_FDEQ_BIN_2 +223 0x0304 //RX_FDEQ_BIN_3 +224 0x0405 //RX_FDEQ_BIN_4 +225 0x0506 //RX_FDEQ_BIN_5 +226 0x0708 //RX_FDEQ_BIN_6 +227 0x090A //RX_FDEQ_BIN_7 +228 0x0B0C //RX_FDEQ_BIN_8 +229 0x0D0E //RX_FDEQ_BIN_9 +230 0x1013 //RX_FDEQ_BIN_10 +231 0x1719 //RX_FDEQ_BIN_11 +232 0x1B1E //RX_FDEQ_BIN_12 +233 0x1E1E //RX_FDEQ_BIN_13 +234 0x1E28 //RX_FDEQ_BIN_14 +235 0x282C //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x4000 //RX_FDEQ_RESRV_0 +245 0x0320 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0030 //RX_FDDRC_BAND_MARGIN_1 +248 0x0050 //RX_FDDRC_BAND_MARGIN_2 +249 0x0080 //RX_FDDRC_BAND_MARGIN_3 +250 0x0007 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x5000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x6400 //RX_FDDRC_THRD_3_2 +258 0x6400 //RX_FDDRC_THRD_3_3 +259 0x2000 //RX_FDDRC_SLANT_0_0 +260 0x2000 //RX_FDDRC_SLANT_0_1 +261 0x2000 //RX_FDDRC_SLANT_0_2 +262 0x2000 //RX_FDDRC_SLANT_0_3 +263 0x5333 //RX_FDDRC_SLANT_1_0 +264 0x5333 //RX_FDDRC_SLANT_1_1 +265 0x5333 //RX_FDDRC_SLANT_1_2 +266 0x5333 //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +286 0x003D //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 +#VOL 4 +163 0x1000 //RX_TDDRC_ALPHA_UP_1 +164 0x1000 //RX_TDDRC_ALPHA_UP_2 +165 0x1000 //RX_TDDRC_ALPHA_UP_3 +166 0x1000 //RX_TDDRC_ALPHA_UP_4 +184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +190 0x7000 //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +269 0x0000 //RX_TDDRC_THRD_0 +270 0x0000 //RX_TDDRC_THRD_1 +271 0x1800 //RX_TDDRC_THRD_2 +272 0x1800 //RX_TDDRC_THRD_3 +273 0x3000 //RX_TDDRC_SLANT_0 +274 0x6E00 //RX_TDDRC_SLANT_1 +275 0x1000 //RX_TDDRC_ALPHA_UP_0 +276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x199A //RX_TDDRC_HMNC_GAIN +279 0x0001 //RX_TDDRC_SMT_FLAG +280 0x0CCD //RX_TDDRC_SMT_W +281 0x0275 //RX_TDDRC_DRC_GAIN +195 0x0020 //RX_FDEQ_SUBNUM +196 0x4848 //RX_FDEQ_GAIN_0 +197 0x4850 //RX_FDEQ_GAIN_1 +198 0x6478 //RX_FDEQ_GAIN_2 +199 0x8689 //RX_FDEQ_GAIN_3 +200 0x908F //RX_FDEQ_GAIN_4 +201 0x9495 //RX_FDEQ_GAIN_5 +202 0x989D //RX_FDEQ_GAIN_6 +203 0x9DA6 //RX_FDEQ_GAIN_7 +204 0xA895 //RX_FDEQ_GAIN_8 +205 0x8A8A //RX_FDEQ_GAIN_9 +206 0x8E78 //RX_FDEQ_GAIN_10 +207 0x7070 //RX_FDEQ_GAIN_11 +208 0x7680 //RX_FDEQ_GAIN_12 +209 0x787C //RX_FDEQ_GAIN_13 +210 0x8890 //RX_FDEQ_GAIN_14 +211 0x9CAC //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0202 //RX_FDEQ_BIN_0 +221 0x0202 //RX_FDEQ_BIN_1 +222 0x0302 //RX_FDEQ_BIN_2 +223 0x0304 //RX_FDEQ_BIN_3 +224 0x0405 //RX_FDEQ_BIN_4 +225 0x0506 //RX_FDEQ_BIN_5 +226 0x0708 //RX_FDEQ_BIN_6 +227 0x090A //RX_FDEQ_BIN_7 +228 0x0B0C //RX_FDEQ_BIN_8 +229 0x0D0E //RX_FDEQ_BIN_9 +230 0x1013 //RX_FDEQ_BIN_10 +231 0x1719 //RX_FDEQ_BIN_11 +232 0x1B1E //RX_FDEQ_BIN_12 +233 0x1E1E //RX_FDEQ_BIN_13 +234 0x1E28 //RX_FDEQ_BIN_14 +235 0x282C //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x4000 //RX_FDEQ_RESRV_0 +245 0x0320 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0030 //RX_FDDRC_BAND_MARGIN_1 +248 0x0050 //RX_FDDRC_BAND_MARGIN_2 +249 0x0080 //RX_FDDRC_BAND_MARGIN_3 +250 0x0007 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x5000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x6400 //RX_FDDRC_THRD_3_2 +258 0x6400 //RX_FDDRC_THRD_3_3 +259 0x2000 //RX_FDDRC_SLANT_0_0 +260 0x2000 //RX_FDDRC_SLANT_0_1 +261 0x2000 //RX_FDDRC_SLANT_0_2 +262 0x2000 //RX_FDDRC_SLANT_0_3 +263 0x5333 //RX_FDDRC_SLANT_1_0 +264 0x5333 //RX_FDDRC_SLANT_1_1 +265 0x5333 //RX_FDDRC_SLANT_1_2 +266 0x5333 //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +286 0x0060 //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 +#VOL 5 +163 0x1000 //RX_TDDRC_ALPHA_UP_1 +164 0x1000 //RX_TDDRC_ALPHA_UP_2 +165 0x1000 //RX_TDDRC_ALPHA_UP_3 +166 0x1000 //RX_TDDRC_ALPHA_UP_4 +184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +190 0x7000 //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +269 0x0000 //RX_TDDRC_THRD_0 +270 0x0000 //RX_TDDRC_THRD_1 +271 0x1800 //RX_TDDRC_THRD_2 +272 0x1800 //RX_TDDRC_THRD_3 +273 0x3000 //RX_TDDRC_SLANT_0 +274 0x6E00 //RX_TDDRC_SLANT_1 +275 0x1000 //RX_TDDRC_ALPHA_UP_0 +276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x199A //RX_TDDRC_HMNC_GAIN +279 0x0001 //RX_TDDRC_SMT_FLAG +280 0x0CCD //RX_TDDRC_SMT_W +281 0x0275 //RX_TDDRC_DRC_GAIN +195 0x0020 //RX_FDEQ_SUBNUM +196 0x4848 //RX_FDEQ_GAIN_0 +197 0x4850 //RX_FDEQ_GAIN_1 +198 0x6478 //RX_FDEQ_GAIN_2 +199 0x8689 //RX_FDEQ_GAIN_3 +200 0x908F //RX_FDEQ_GAIN_4 +201 0x9495 //RX_FDEQ_GAIN_5 +202 0x989D //RX_FDEQ_GAIN_6 +203 0x9DA6 //RX_FDEQ_GAIN_7 +204 0xA895 //RX_FDEQ_GAIN_8 +205 0x8A8A //RX_FDEQ_GAIN_9 +206 0x8E78 //RX_FDEQ_GAIN_10 +207 0x7070 //RX_FDEQ_GAIN_11 +208 0x7680 //RX_FDEQ_GAIN_12 +209 0x787C //RX_FDEQ_GAIN_13 +210 0x8890 //RX_FDEQ_GAIN_14 +211 0x9CAC //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0202 //RX_FDEQ_BIN_0 +221 0x0202 //RX_FDEQ_BIN_1 +222 0x0302 //RX_FDEQ_BIN_2 +223 0x0304 //RX_FDEQ_BIN_3 +224 0x0405 //RX_FDEQ_BIN_4 +225 0x0506 //RX_FDEQ_BIN_5 +226 0x0708 //RX_FDEQ_BIN_6 +227 0x090A //RX_FDEQ_BIN_7 +228 0x0B0C //RX_FDEQ_BIN_8 +229 0x0D0E //RX_FDEQ_BIN_9 +230 0x1013 //RX_FDEQ_BIN_10 +231 0x1719 //RX_FDEQ_BIN_11 +232 0x1B1E //RX_FDEQ_BIN_12 +233 0x1E1E //RX_FDEQ_BIN_13 +234 0x1E28 //RX_FDEQ_BIN_14 +235 0x282C //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x4000 //RX_FDEQ_RESRV_0 +245 0x0320 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0030 //RX_FDDRC_BAND_MARGIN_1 +248 0x0050 //RX_FDDRC_BAND_MARGIN_2 +249 0x0080 //RX_FDDRC_BAND_MARGIN_3 +250 0x0007 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x5000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x6400 //RX_FDDRC_THRD_3_2 +258 0x6400 //RX_FDDRC_THRD_3_3 +259 0x2000 //RX_FDDRC_SLANT_0_0 +260 0x2000 //RX_FDDRC_SLANT_0_1 +261 0x2000 //RX_FDDRC_SLANT_0_2 +262 0x2000 //RX_FDDRC_SLANT_0_3 +263 0x5333 //RX_FDDRC_SLANT_1_0 +264 0x5333 //RX_FDDRC_SLANT_1_1 +265 0x5333 //RX_FDDRC_SLANT_1_2 +266 0x5333 //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +286 0x0099 //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 +#VOL 6 +163 0x1000 //RX_TDDRC_ALPHA_UP_1 +164 0x1000 //RX_TDDRC_ALPHA_UP_2 +165 0x1000 //RX_TDDRC_ALPHA_UP_3 +166 0x1000 //RX_TDDRC_ALPHA_UP_4 +184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +190 0x7000 //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +269 0x0000 //RX_TDDRC_THRD_0 +270 0x0000 //RX_TDDRC_THRD_1 +271 0x1800 //RX_TDDRC_THRD_2 +272 0x1800 //RX_TDDRC_THRD_3 +273 0x3000 //RX_TDDRC_SLANT_0 +274 0x6E00 //RX_TDDRC_SLANT_1 +275 0x1000 //RX_TDDRC_ALPHA_UP_0 +276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x199A //RX_TDDRC_HMNC_GAIN +279 0x0001 //RX_TDDRC_SMT_FLAG +280 0x0CCD //RX_TDDRC_SMT_W +281 0x0275 //RX_TDDRC_DRC_GAIN +195 0x0020 //RX_FDEQ_SUBNUM +196 0x4848 //RX_FDEQ_GAIN_0 +197 0x4850 //RX_FDEQ_GAIN_1 +198 0x6478 //RX_FDEQ_GAIN_2 +199 0x8689 //RX_FDEQ_GAIN_3 +200 0x908F //RX_FDEQ_GAIN_4 +201 0x9495 //RX_FDEQ_GAIN_5 +202 0x989D //RX_FDEQ_GAIN_6 +203 0x9DA6 //RX_FDEQ_GAIN_7 +204 0xA895 //RX_FDEQ_GAIN_8 +205 0x8A8A //RX_FDEQ_GAIN_9 +206 0x8E78 //RX_FDEQ_GAIN_10 +207 0x7070 //RX_FDEQ_GAIN_11 +208 0x7680 //RX_FDEQ_GAIN_12 +209 0x787C //RX_FDEQ_GAIN_13 +210 0x8890 //RX_FDEQ_GAIN_14 +211 0x9CAC //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0202 //RX_FDEQ_BIN_0 +221 0x0202 //RX_FDEQ_BIN_1 +222 0x0302 //RX_FDEQ_BIN_2 +223 0x0304 //RX_FDEQ_BIN_3 +224 0x0405 //RX_FDEQ_BIN_4 +225 0x0506 //RX_FDEQ_BIN_5 +226 0x0708 //RX_FDEQ_BIN_6 +227 0x090A //RX_FDEQ_BIN_7 +228 0x0B0C //RX_FDEQ_BIN_8 +229 0x0D0E //RX_FDEQ_BIN_9 +230 0x1013 //RX_FDEQ_BIN_10 +231 0x1719 //RX_FDEQ_BIN_11 +232 0x1B1E //RX_FDEQ_BIN_12 +233 0x1E1E //RX_FDEQ_BIN_13 +234 0x1E28 //RX_FDEQ_BIN_14 +235 0x282C //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x4000 //RX_FDEQ_RESRV_0 +245 0x0320 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0030 //RX_FDDRC_BAND_MARGIN_1 +248 0x0050 //RX_FDDRC_BAND_MARGIN_2 +249 0x0080 //RX_FDDRC_BAND_MARGIN_3 +250 0x0007 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x5000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x6400 //RX_FDDRC_THRD_3_2 +258 0x6400 //RX_FDDRC_THRD_3_3 +259 0x2000 //RX_FDDRC_SLANT_0_0 +260 0x2000 //RX_FDDRC_SLANT_0_1 +261 0x2000 //RX_FDDRC_SLANT_0_2 +262 0x2000 //RX_FDDRC_SLANT_0_3 +263 0x5333 //RX_FDDRC_SLANT_1_0 +264 0x5333 //RX_FDDRC_SLANT_1_1 +265 0x5333 //RX_FDDRC_SLANT_1_2 +266 0x5333 //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +286 0x0100 //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 #CASE_NAME HANDSET-HANDSET-VOICE_GENERIC-NB -#PARAM_TYPE TX+RX -#TOTAL_CUSTOM_STEP 7 +#PARAM_MODE Full +#PARAM_TYPE TX+2RX +#TOTAL_CUSTOM_STEP 7+7 #TX 0 0x0000 //TX_OPERATION_MODE_0 1 0x0000 //TX_OPERATION_MODE_1 -2 0x0036 //TX_PATCH_REG +2 0x0076 //TX_PATCH_REG 3 0x6F7E //TX_SENDFUNC_MODE_0 4 0x0001 //TX_SENDFUNC_MODE_1 5 0x0002 //TX_NUM_MIC @@ -5287,7 +8039,7 @@ 18 0x0000 //TX_SYS_RESRV_2 19 0x0000 //TX_SYS_RESRV_3 20 0x0000 //TX_DIST2REF0 -21 0x009D //TX_DIST2REF1 +21 0x009C //TX_DIST2REF1 22 0x0000 //TX_DIST2REF_02 23 0x0000 //TX_DIST2REF_03 24 0x0000 //TX_DIST2REF_04 @@ -5517,19 +8269,19 @@ 248 0xF800 //TX_THR_SN_EST_6 249 0xF700 //TX_THR_SN_EST_7 250 0x0000 //TX_DELTA_THR_SN_EST_0 -251 0x01A0 //TX_DELTA_THR_SN_EST_1 -252 0x0100 //TX_DELTA_THR_SN_EST_2 -253 0x0200 //TX_DELTA_THR_SN_EST_3 -254 0x01A0 //TX_DELTA_THR_SN_EST_4 -255 0x0100 //TX_DELTA_THR_SN_EST_5 -256 0x0000 //TX_DELTA_THR_SN_EST_6 +251 0x0100 //TX_DELTA_THR_SN_EST_1 +252 0x0200 //TX_DELTA_THR_SN_EST_2 +253 0x01A0 //TX_DELTA_THR_SN_EST_3 +254 0x0100 //TX_DELTA_THR_SN_EST_4 +255 0x0000 //TX_DELTA_THR_SN_EST_5 +256 0x01A0 //TX_DELTA_THR_SN_EST_6 257 0x0200 //TX_DELTA_THR_SN_EST_7 258 0x4000 //TX_LAMBDA_NN_EST_0 -259 0x4000 //TX_LAMBDA_NN_EST_1 -260 0x3000 //TX_LAMBDA_NN_EST_2 -261 0x4000 //TX_LAMBDA_NN_EST_3 +259 0x3000 //TX_LAMBDA_NN_EST_1 +260 0x4000 //TX_LAMBDA_NN_EST_2 +261 0x3000 //TX_LAMBDA_NN_EST_3 262 0x3000 //TX_LAMBDA_NN_EST_4 -263 0x3000 //TX_LAMBDA_NN_EST_5 +263 0x4000 //TX_LAMBDA_NN_EST_5 264 0x4000 //TX_LAMBDA_NN_EST_6 265 0x4000 //TX_LAMBDA_NN_EST_7 266 0x0400 //TX_N_SN_EST @@ -5548,20 +8300,20 @@ 279 0x4000 //TX_B_POST_FLT_0 280 0x4000 //TX_B_POST_FLT_1 281 0x0014 //TX_NS_LVL_CTRL_0 -282 0x001B //TX_NS_LVL_CTRL_1 -283 0x0019 //TX_NS_LVL_CTRL_2 +282 0x0019 //TX_NS_LVL_CTRL_1 +283 0x0017 //TX_NS_LVL_CTRL_2 284 0x0017 //TX_NS_LVL_CTRL_3 -285 0x0017 //TX_NS_LVL_CTRL_4 -286 0x0019 //TX_NS_LVL_CTRL_5 -287 0x0014 //TX_NS_LVL_CTRL_6 +285 0x0019 //TX_NS_LVL_CTRL_4 +286 0x0014 //TX_NS_LVL_CTRL_5 +287 0x001B //TX_NS_LVL_CTRL_6 288 0x0010 //TX_NS_LVL_CTRL_7 289 0x0010 //TX_MIN_GAIN_S_0 290 0x000C //TX_MIN_GAIN_S_1 -291 0x000C //TX_MIN_GAIN_S_2 +291 0x0010 //TX_MIN_GAIN_S_2 292 0x0010 //TX_MIN_GAIN_S_3 -293 0x0010 //TX_MIN_GAIN_S_4 -294 0x000C //TX_MIN_GAIN_S_5 -295 0x0014 //TX_MIN_GAIN_S_6 +293 0x000C //TX_MIN_GAIN_S_4 +294 0x0014 //TX_MIN_GAIN_S_5 +295 0x000C //TX_MIN_GAIN_S_6 296 0x0014 //TX_MIN_GAIN_S_7 297 0x5000 //TX_NMOS_SUP 298 0x0000 //TX_NS_MAX_PRI_SNR_TH @@ -5571,8 +8323,8 @@ 302 0x4000 //TX_SNRI_SUP_2 303 0x4000 //TX_SNRI_SUP_3 304 0x4000 //TX_SNRI_SUP_4 -305 0x4000 //TX_SNRI_SUP_5 -306 0x7FFF //TX_SNRI_SUP_6 +305 0x7FFF //TX_SNRI_SUP_5 +306 0x4000 //TX_SNRI_SUP_6 307 0x3000 //TX_SNRI_SUP_7 308 0x3000 //TX_THR_LFNS 309 0x001A //TX_G_LFNS @@ -5581,36 +8333,36 @@ 312 0x7FFF //TX_A_POST_FILT_0 313 0x2000 //TX_A_POST_FILT_1 314 0x2000 //TX_A_POST_FILT_S_0 -315 0x7000 //TX_A_POST_FILT_S_1 -316 0x6000 //TX_A_POST_FILT_S_2 -317 0x5000 //TX_A_POST_FILT_S_3 -318 0x2000 //TX_A_POST_FILT_S_4 -319 0x6000 //TX_A_POST_FILT_S_5 -320 0x2000 //TX_A_POST_FILT_S_6 +315 0x6000 //TX_A_POST_FILT_S_1 +316 0x5000 //TX_A_POST_FILT_S_2 +317 0x2000 //TX_A_POST_FILT_S_3 +318 0x6000 //TX_A_POST_FILT_S_4 +319 0x2000 //TX_A_POST_FILT_S_5 +320 0x7000 //TX_A_POST_FILT_S_6 321 0x7000 //TX_A_POST_FILT_S_7 322 0x4000 //TX_B_POST_FILT_0 323 0x4000 //TX_B_POST_FILT_1 -324 0x7FFF //TX_B_POST_FILT_2 -325 0x5000 //TX_B_POST_FILT_3 -326 0x7FFF //TX_B_POST_FILT_4 -327 0x7FFF //TX_B_POST_FILT_5 +324 0x5000 //TX_B_POST_FILT_2 +325 0x4000 //TX_B_POST_FILT_3 +326 0x4000 //TX_B_POST_FILT_4 +327 0x4000 //TX_B_POST_FILT_5 328 0x4000 //TX_B_POST_FILT_6 329 0x2000 //TX_B_POST_FILT_7 330 0x7FFF //TX_B_LESSCUT_RTO_S_0 -331 0x7FFF //TX_B_LESSCUT_RTO_S_1 -332 0x7FFF //TX_B_LESSCUT_RTO_S_2 -333 0x7FFF //TX_B_LESSCUT_RTO_S_3 -334 0x7FFF //TX_B_LESSCUT_RTO_S_4 -335 0x7FFF //TX_B_LESSCUT_RTO_S_5 -336 0x7FFF //TX_B_LESSCUT_RTO_S_6 -337 0x7FFF //TX_B_LESSCUT_RTO_S_7 +331 0x1000 //TX_B_LESSCUT_RTO_S_1 +332 0x1000 //TX_B_LESSCUT_RTO_S_2 +333 0x1000 //TX_B_LESSCUT_RTO_S_3 +334 0x1000 //TX_B_LESSCUT_RTO_S_4 +335 0x1000 //TX_B_LESSCUT_RTO_S_5 +336 0x1000 //TX_B_LESSCUT_RTO_S_6 +337 0x1000 //TX_B_LESSCUT_RTO_S_7 338 0x7E14 //TX_LAMBDA_PFILT 339 0x7C29 //TX_LAMBDA_PFILT_S_0 -340 0x7C29 //TX_LAMBDA_PFILT_S_1 -341 0x7200 //TX_LAMBDA_PFILT_S_2 -342 0x7900 //TX_LAMBDA_PFILT_S_3 -343 0x7400 //TX_LAMBDA_PFILT_S_4 -344 0x7200 //TX_LAMBDA_PFILT_S_5 +340 0x7200 //TX_LAMBDA_PFILT_S_1 +341 0x7900 //TX_LAMBDA_PFILT_S_2 +342 0x7400 //TX_LAMBDA_PFILT_S_3 +343 0x7200 //TX_LAMBDA_PFILT_S_4 +344 0x7C29 //TX_LAMBDA_PFILT_S_5 345 0x7C29 //TX_LAMBDA_PFILT_S_6 346 0x7C29 //TX_LAMBDA_PFILT_S_7 347 0x0200 //TX_K_PEPPER @@ -5646,10 +8398,10 @@ 377 0x0000 //TX_NOISE_TH_5_4 378 0x07D0 //TX_NOISE_TH_6 379 0x0004 //TX_MINENOISE_TH -380 0x4000 //TX_MINENOISE_MIC0_TH_MTS -381 0xFFEE //TX_MINENOISE_MIC0_TH_EXP -382 0x6000 //TX_MINENOISE_MIC0_S_TH_MTS -383 0xFFF3 //TX_MINENOISE_MIC0_S_TH_EXP +380 0xD508 //TX_MORENS_TFMASK_TH +381 0x0001 //TX_DRC_QUIET_FLOOR +382 0x6D60 //TX_RATIODTL_CUT_TH +383 0x0DAC //TX_DT_CUT_K1 384 0x00A5 //TX_OUT_ENER_S_TH_CLEAN 385 0x00A5 //TX_OUT_ENER_S_TH_LESSCLEAN 386 0x00A5 //TX_OUT_ENER_S_TH_NOISY @@ -5657,15 +8409,15 @@ 388 0x00CE //TX_OUT_ENER_TH_SPEECH 389 0x2000 //TX_SN_NPB_GAIN 390 0x0000 //TX_NN_NPB_GAIN -391 0x0000 //TX_CSX_ALPHA_0 -392 0x0000 //TX_CSX_ALPHA_1 -393 0x0000 //TX_CSX_ALPHA_2 -394 0x0000 //TX_CSX_ALPHA_3 -395 0x0800 //TX_MU_ARSP_EST -396 0x00C8 //TX_P_OUTBEAM_MIN_TH +391 0x3000 //TX_POST_MASK_SUP_HSNE +392 0x07D0 //TX_TAIL_DET_TH +393 0x4000 //TX_B_LESSCUT_RTO_WTA +394 0x0000 //TX_MEL_G_R +395 0x0080 //TX_SUPHIGH_TH +396 0x0000 //TX_MASK_G_R 397 0x0002 //TX_EXTRA_NS_L -398 0x0800 //TX_EXTRA_NS_A -399 0x0005 //TX_VR_NOISE_FLOOR_TH +398 0x1800 //TX_C_POST_FLT_MASK +399 0x7FFF //TX_A_POST_FLT_WNS 400 0x0148 //TX_MIN_G_LOW300HZ 401 0x0001 //TX_MAXLEVEL_CNG 402 0x00B4 //TX_STN_NOISE_TH @@ -5780,16 +8532,16 @@ 511 0x6666 //TX_MIC_TO_BFGAIN 512 0x0000 //TX_MICTOBFGAIN0 513 0x0000 //TX_FASTMUE_TH -514 0x0000 //TX_DERVB_LEN_0 -515 0x0000 //TX_DERVB_LEN_1 -516 0x0000 //TX_RHO_DERVB -517 0x0000 //TX_MIC_INDX_DERVB -518 0x0000 //TX_MU_DERVB -519 0x0000 //TX_DR_RESRV_0 -520 0x0000 //TX_DR_RESRV_1 -521 0x0000 //TX_DR_RESRV_2 -522 0x0000 //TX_DR_RESRV_3 -523 0x0000 //TX_DR_RESRV_4 +514 0x3000 //TX_DEREVERB_LF_MU +515 0x34CD //TX_DEREVERB_HF_MU +516 0x0007 //TX_DEREVERB_DELAY +517 0x0004 //TX_DEREVERB_COEF_LEN +518 0x0003 //TX_DEREVERB_DNR +519 0x0000 //TX_DEREVERB_ALPHA +520 0x0000 //TX_DEREVERB_BETA +521 0x3A98 //TX_GSC_RTOL_TH +522 0x3A98 //TX_GSC_RTOH_TH +523 0x7E2C //TX_WIDE2_MEANHTH 524 0x0000 //TX_DR_RESRV_5 525 0x0000 //TX_DR_RESRV_6 526 0x0000 //TX_DR_RESRV_7 @@ -5837,11 +8589,11 @@ 568 0x584F //TX_FDEQ_GAIN_1 569 0x4F4E //TX_FDEQ_GAIN_2 570 0x474A //TX_FDEQ_GAIN_3 -571 0x473F //TX_FDEQ_GAIN_4 -572 0x4240 //TX_FDEQ_GAIN_5 +571 0x4737 //TX_FDEQ_GAIN_4 +572 0x3A40 //TX_FDEQ_GAIN_5 573 0x4040 //TX_FDEQ_GAIN_6 -574 0x3630 //TX_FDEQ_GAIN_7 -575 0x2620 //TX_FDEQ_GAIN_8 +574 0x3631 //TX_FDEQ_GAIN_7 +575 0x2020 //TX_FDEQ_GAIN_8 576 0x383C //TX_FDEQ_GAIN_9 577 0x4848 //TX_FDEQ_GAIN_10 578 0x4848 //TX_FDEQ_GAIN_11 @@ -5866,7 +8618,7 @@ 597 0x0808 //TX_FDEQ_BIN_6 598 0x050E //TX_FDEQ_BIN_7 599 0x0B0C //TX_FDEQ_BIN_8 -600 0x0F0F //TX_FDEQ_BIN_9 +600 0x0F09 //TX_FDEQ_BIN_9 601 0x0000 //TX_FDEQ_BIN_10 602 0x0000 //TX_FDEQ_BIN_11 603 0x0000 //TX_FDEQ_BIN_12 @@ -5890,9 +8642,9 @@ 621 0x4848 //TX_PREEQ_GAIN_MIC0_4 622 0x4848 //TX_PREEQ_GAIN_MIC0_5 623 0x4848 //TX_PREEQ_GAIN_MIC0_6 -624 0x4846 //TX_PREEQ_GAIN_MIC0_7 -625 0x4544 //TX_PREEQ_GAIN_MIC0_8 -626 0x4241 //TX_PREEQ_GAIN_MIC0_9 +624 0x4848 //TX_PREEQ_GAIN_MIC0_7 +625 0x4848 //TX_PREEQ_GAIN_MIC0_8 +626 0x4848 //TX_PREEQ_GAIN_MIC0_9 627 0x4848 //TX_PREEQ_GAIN_MIC0_10 628 0x4848 //TX_PREEQ_GAIN_MIC0_11 629 0x4848 //TX_PREEQ_GAIN_MIC0_12 @@ -5940,8 +8692,8 @@ 671 0x4848 //TX_PREEQ_GAIN_MIC1_5 672 0x4848 //TX_PREEQ_GAIN_MIC1_6 673 0x4848 //TX_PREEQ_GAIN_MIC1_7 -674 0x4A4C //TX_PREEQ_GAIN_MIC1_8 -675 0x4E50 //TX_PREEQ_GAIN_MIC1_9 +674 0x4849 //TX_PREEQ_GAIN_MIC1_8 +675 0x4A4B //TX_PREEQ_GAIN_MIC1_9 676 0x4848 //TX_PREEQ_GAIN_MIC1_10 677 0x4848 //TX_PREEQ_GAIN_MIC1_11 678 0x4848 //TX_PREEQ_GAIN_MIC1_12 @@ -5956,7 +8708,7 @@ 687 0x4848 //TX_PREEQ_GAIN_MIC1_21 688 0x4848 //TX_PREEQ_GAIN_MIC1_22 689 0x4848 //TX_PREEQ_GAIN_MIC1_23 -690 0x0203 //TX_PREEQ_BIN_MIC1_0 +690 0x0202 //TX_PREEQ_BIN_MIC1_0 691 0x0203 //TX_PREEQ_BIN_MIC1_1 692 0x0303 //TX_PREEQ_BIN_MIC1_2 693 0x0304 //TX_PREEQ_BIN_MIC1_3 @@ -6132,7 +8884,7 @@ 863 0x199A //TX_TDDRC_HMNC_GAIN 864 0x0000 //TX_TDDRC_SMT_FLAG 865 0x0CCD //TX_TDDRC_SMT_W -866 0x0550 //TX_TDDRC_DRC_GAIN +866 0x0504 //TX_TDDRC_DRC_GAIN 867 0x7FFF //TX_TDDRC_LMT_THRD 868 0x0000 //TX_TDDRC_LMT_ALPHA 869 0x0000 //TX_TFMASKLTH @@ -6163,8 +8915,73 @@ 894 0xC000 //TX_FASTNS_SSA_THHFL 895 0xCCCC //TX_FASTNS_SSA_THLFH 896 0xD999 //TX_FASTNS_SSA_THHFH +897 0x2339 //TX_SENDFUNC_REG_MICMUTE +898 0x0021 //TX_SENDFUNC_REG_MICMUTE1 +899 0x02BC //TX_MICMUTE_RATIO_THR +900 0x0140 //TX_MICMUTE_AMP_THR +901 0x0004 //TX_MICMUTE_HPF_IND +902 0x00C0 //TX_MICMUTE_LOG_EYR_TH +903 0x0008 //TX_MICMUTE_CVG_TIME +904 0x0008 //TX_MICMUTE_RELEASE_TIME +905 0x01FE //TX_MIC_VOLUME_MIC0MUTE +906 0x0020 //TX_MICMUTE_EPD_OFFSET_0 +907 0x001E //TX_MICMUTE_FRQ_AEC_L +908 0x7999 //TX_MICMUTE_EAD_THR +909 0x7FFF //TX_MICMUTE_LAMBDA_CB_NLE +910 0x7FFF //TX_MICMUTE_LAMBDA_RE_EST +911 0x4000 //TX_DTD_THR1_MICMUTE_0 +912 0x7000 //TX_DTD_THR1_MICMUTE_1 +913 0x7FFF //TX_DTD_THR1_MICMUTE_2 +914 0x7FFF //TX_DTD_THR1_MICMUTE_3 +915 0x6CCC //TX_DTD_THR2_MICMUTE_0 +916 0x0400 //TX_MICMUTE_MIN_EQ_RE_EST_0 +917 0x0400 //TX_MICMUTE_MIN_EQ_RE_EST_1 +918 0x1000 //TX_MICMUTE_MIN_EQ_RE_EST_2 +919 0x7FFF //TX_MICMUTE_MIN_EQ_RE_EST_3 +920 0x7FFF //TX_MICMUTE_MIN_EQ_RE_EST_4 +921 0x4000 //TX_MICMUTE_C_POST_FLT +922 0x03E8 //TX_MICMUTE_DT_CUT_K +923 0x0001 //TX_MICMUTE_DT_CUT_THR +924 0x03E8 //TX_MICMUTE_DT_CUT_K2 +925 0x0001 //TX_MICMUTE_DT_CUT_THR2 +926 0x0064 //TX_MICMUTE_DT2_HOLD_N +927 0x1000 //TX_MICMUTE_RATIODTH_THCUT +928 0x1000 //TX_MICMUTE_B_POST_FLT_ECHOL +929 0x7FFF //TX_MICMUTE_B_POST_FLT_ECHOH +930 0x0400 //TX_MICMUTE_C_POST_FLT_MASK +931 0x7999 //TX_MICMUTE_RATIODTL_CUT_TH +932 0x0258 //TX_MICMUTE_DT_CUT_K1 +933 0x0800 //TX_MICMUTE_N2_SN_EST +934 0xFC00 //TX_MICMUTE_THR_SN_EST_0 +935 0x001C //TX_MICMUTE_MIN_G_CTRL_0 +936 0x6000 //TX_MICMUTE_A_POST_FILT_S_0 +937 0x7000 //TX_MICMUTE_B_POST_FILT_0 +938 0x2710 //TX_MIC1RUB_AMP_THR +939 0x0010 //TX_MIC1MUTE_RATIO_THR +940 0x0450 //TX_MIC1MUTE_AMP_THR +941 0x0008 //TX_MIC1MUTE_CVG_TIME +942 0x0008 //TX_MIC1MUTE_RELEASE_TIME +943 0x0000 //TX_AMS_RESRV_01 +944 0x0000 //TX_AMS_RESRV_02 +945 0x0000 //TX_AMS_RESRV_03 +946 0x0000 //TX_AMS_RESRV_04 +947 0x0000 //TX_AMS_RESRV_05 +948 0x0000 //TX_AMS_RESRV_06 +949 0x0000 //TX_AMS_RESRV_07 +950 0x0000 //TX_AMS_RESRV_08 +951 0x0000 //TX_AMS_RESRV_09 +952 0x0000 //TX_AMS_RESRV_10 +953 0x0000 //TX_AMS_RESRV_11 +954 0x0000 //TX_AMS_RESRV_12 +955 0x0000 //TX_AMS_RESRV_13 +956 0x0000 //TX_AMS_RESRV_14 +957 0x0000 //TX_AMS_RESRV_15 +958 0x0000 //TX_AMS_RESRV_16 +959 0x0000 //TX_AMS_RESRV_17 +960 0x0000 //TX_AMS_RESRV_18 +961 0x0000 //TX_AMS_RESRV_19 #RX -0 0x003C //RX_RECVFUNC_MODE_0 +0 0x203C //RX_RECVFUNC_MODE_0 1 0x0000 //RX_RECVFUNC_MODE_1 2 0x0000 //RX_SAMPLINGFREQ_SIG 3 0x0000 //RX_SAMPLINGFREQ_PROC @@ -6174,7 +8991,7 @@ 7 0x1000 //RX_TDDRC_ALPHA_UP_2 8 0x1000 //RX_TDDRC_ALPHA_UP_3 9 0x1000 //RX_TDDRC_ALPHA_UP_4 -10 0x0600 //RX_PGA +10 0x050E //RX_PGA 11 0x7FFF //RX_A_HP 12 0x4000 //RX_B_PE 13 0x7800 //RX_THR_PITCH_DET_0 @@ -6203,16 +9020,16 @@ 36 0x0000 //RX_LMT_THRD 37 0x4000 //RX_LMT_ALPHA 38 0x0014 //RX_FDEQ_SUBNUM -39 0x4840 //RX_FDEQ_GAIN_0 -40 0x3E3E //RX_FDEQ_GAIN_1 -41 0x4E62 //RX_FDEQ_GAIN_2 -42 0x6C7A //RX_FDEQ_GAIN_3 -43 0x8690 //RX_FDEQ_GAIN_4 -44 0x867E //RX_FDEQ_GAIN_5 -45 0x7E7E //RX_FDEQ_GAIN_6 -46 0x8080 //RX_FDEQ_GAIN_7 -47 0x8088 //RX_FDEQ_GAIN_8 -48 0x838B //RX_FDEQ_GAIN_9 +39 0x483A //RX_FDEQ_GAIN_0 +40 0x3A3A //RX_FDEQ_GAIN_1 +41 0x4A58 //RX_FDEQ_GAIN_2 +42 0x5E6E //RX_FDEQ_GAIN_3 +43 0x7A84 //RX_FDEQ_GAIN_4 +44 0x7C7A //RX_FDEQ_GAIN_5 +45 0x7C78 //RX_FDEQ_GAIN_6 +46 0x7978 //RX_FDEQ_GAIN_7 +47 0x7A7E //RX_FDEQ_GAIN_8 +48 0x7C80 //RX_FDEQ_GAIN_9 49 0x4848 //RX_FDEQ_GAIN_10 50 0x4848 //RX_FDEQ_GAIN_11 51 0x4848 //RX_FDEQ_GAIN_12 @@ -6228,8 +9045,8 @@ 61 0x4848 //RX_FDEQ_GAIN_22 62 0x4848 //RX_FDEQ_GAIN_23 63 0x0202 //RX_FDEQ_BIN_0 -64 0x0203 //RX_FDEQ_BIN_1 -65 0x0303 //RX_FDEQ_BIN_2 +64 0x0204 //RX_FDEQ_BIN_1 +65 0x0203 //RX_FDEQ_BIN_2 66 0x0304 //RX_FDEQ_BIN_3 67 0x0405 //RX_FDEQ_BIN_4 68 0x0506 //RX_FDEQ_BIN_5 @@ -6280,15 +9097,15 @@ 113 0x0000 //RX_TDDRC_THRD_1 114 0x1800 //RX_TDDRC_THRD_2 115 0x1800 //RX_TDDRC_THRD_3 -116 0x3000 //RX_TDDRC_SLANT_0 -117 0x6E00 //RX_TDDRC_SLANT_1 +116 0x7FFF //RX_TDDRC_SLANT_0 +117 0x7FFF //RX_TDDRC_SLANT_1 118 0x1000 //RX_TDDRC_ALPHA_UP_0 119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 120 0x0000 //RX_TDDRC_HMNC_FLAG 121 0x199A //RX_TDDRC_HMNC_GAIN 122 0x0001 //RX_TDDRC_SMT_FLAG 123 0x0CCD //RX_TDDRC_SMT_W -124 0x05A0 //RX_TDDRC_DRC_GAIN +124 0x06EC //RX_TDDRC_DRC_GAIN 125 0x7C00 //RX_LAMBDA_PKA_FP 126 0x13E0 //RX_TPKA_FP 127 0x0080 //RX_MIN_G_FP @@ -6336,26 +9153,26 @@ 113 0x0000 //RX_TDDRC_THRD_1 114 0x1800 //RX_TDDRC_THRD_2 115 0x1800 //RX_TDDRC_THRD_3 -116 0x3000 //RX_TDDRC_SLANT_0 -117 0x6E00 //RX_TDDRC_SLANT_1 +116 0x7FFF //RX_TDDRC_SLANT_0 +117 0x7FFF //RX_TDDRC_SLANT_1 118 0x1000 //RX_TDDRC_ALPHA_UP_0 119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 120 0x0000 //RX_TDDRC_HMNC_FLAG 121 0x199A //RX_TDDRC_HMNC_GAIN 122 0x0001 //RX_TDDRC_SMT_FLAG 123 0x0CCD //RX_TDDRC_SMT_W -124 0x05A0 //RX_TDDRC_DRC_GAIN +124 0x06EC //RX_TDDRC_DRC_GAIN 38 0x0014 //RX_FDEQ_SUBNUM -39 0x4840 //RX_FDEQ_GAIN_0 -40 0x3E3E //RX_FDEQ_GAIN_1 -41 0x4E62 //RX_FDEQ_GAIN_2 -42 0x6C7A //RX_FDEQ_GAIN_3 -43 0x8690 //RX_FDEQ_GAIN_4 -44 0x867E //RX_FDEQ_GAIN_5 -45 0x7E7E //RX_FDEQ_GAIN_6 -46 0x8080 //RX_FDEQ_GAIN_7 -47 0x8088 //RX_FDEQ_GAIN_8 -48 0x838B //RX_FDEQ_GAIN_9 +39 0x483A //RX_FDEQ_GAIN_0 +40 0x3A3A //RX_FDEQ_GAIN_1 +41 0x4A58 //RX_FDEQ_GAIN_2 +42 0x5E6E //RX_FDEQ_GAIN_3 +43 0x7A84 //RX_FDEQ_GAIN_4 +44 0x7C7A //RX_FDEQ_GAIN_5 +45 0x7C78 //RX_FDEQ_GAIN_6 +46 0x7978 //RX_FDEQ_GAIN_7 +47 0x7A7E //RX_FDEQ_GAIN_8 +48 0x7C80 //RX_FDEQ_GAIN_9 49 0x4848 //RX_FDEQ_GAIN_10 50 0x4848 //RX_FDEQ_GAIN_11 51 0x4848 //RX_FDEQ_GAIN_12 @@ -6371,8 +9188,8 @@ 61 0x4848 //RX_FDEQ_GAIN_22 62 0x4848 //RX_FDEQ_GAIN_23 63 0x0202 //RX_FDEQ_BIN_0 -64 0x0203 //RX_FDEQ_BIN_1 -65 0x0303 //RX_FDEQ_BIN_2 +64 0x0204 //RX_FDEQ_BIN_1 +65 0x0203 //RX_FDEQ_BIN_2 66 0x0304 //RX_FDEQ_BIN_3 67 0x0405 //RX_FDEQ_BIN_4 68 0x0506 //RX_FDEQ_BIN_5 @@ -6435,26 +9252,26 @@ 113 0x0000 //RX_TDDRC_THRD_1 114 0x1800 //RX_TDDRC_THRD_2 115 0x1800 //RX_TDDRC_THRD_3 -116 0x3000 //RX_TDDRC_SLANT_0 -117 0x6E00 //RX_TDDRC_SLANT_1 +116 0x7FFF //RX_TDDRC_SLANT_0 +117 0x7FFF //RX_TDDRC_SLANT_1 118 0x1000 //RX_TDDRC_ALPHA_UP_0 119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 120 0x0000 //RX_TDDRC_HMNC_FLAG 121 0x199A //RX_TDDRC_HMNC_GAIN 122 0x0001 //RX_TDDRC_SMT_FLAG 123 0x0CCD //RX_TDDRC_SMT_W -124 0x055F //RX_TDDRC_DRC_GAIN +124 0x06EC //RX_TDDRC_DRC_GAIN 38 0x0014 //RX_FDEQ_SUBNUM -39 0x4840 //RX_FDEQ_GAIN_0 -40 0x3E3E //RX_FDEQ_GAIN_1 -41 0x4E62 //RX_FDEQ_GAIN_2 -42 0x6C7A //RX_FDEQ_GAIN_3 -43 0x8690 //RX_FDEQ_GAIN_4 -44 0x867E //RX_FDEQ_GAIN_5 -45 0x7E7E //RX_FDEQ_GAIN_6 -46 0x8080 //RX_FDEQ_GAIN_7 -47 0x8088 //RX_FDEQ_GAIN_8 -48 0x838B //RX_FDEQ_GAIN_9 +39 0x483A //RX_FDEQ_GAIN_0 +40 0x3A3A //RX_FDEQ_GAIN_1 +41 0x4A58 //RX_FDEQ_GAIN_2 +42 0x5E6E //RX_FDEQ_GAIN_3 +43 0x7A84 //RX_FDEQ_GAIN_4 +44 0x7C7A //RX_FDEQ_GAIN_5 +45 0x7C78 //RX_FDEQ_GAIN_6 +46 0x7978 //RX_FDEQ_GAIN_7 +47 0x7A7E //RX_FDEQ_GAIN_8 +48 0x7C80 //RX_FDEQ_GAIN_9 49 0x4848 //RX_FDEQ_GAIN_10 50 0x4848 //RX_FDEQ_GAIN_11 51 0x4848 //RX_FDEQ_GAIN_12 @@ -6470,8 +9287,8 @@ 61 0x4848 //RX_FDEQ_GAIN_22 62 0x4848 //RX_FDEQ_GAIN_23 63 0x0202 //RX_FDEQ_BIN_0 -64 0x0203 //RX_FDEQ_BIN_1 -65 0x0303 //RX_FDEQ_BIN_2 +64 0x0204 //RX_FDEQ_BIN_1 +65 0x0203 //RX_FDEQ_BIN_2 66 0x0304 //RX_FDEQ_BIN_3 67 0x0405 //RX_FDEQ_BIN_4 68 0x0506 //RX_FDEQ_BIN_5 @@ -6517,7 +9334,7 @@ 108 0x5333 //RX_FDDRC_SLANT_1_2 109 0x5333 //RX_FDDRC_SLANT_1_3 110 0x0000 //RX_FDDRC_RESRV_0 -129 0x0011 //RX_SPK_VOL +129 0x0010 //RX_SPK_VOL 130 0x0000 //RX_VOL_RESRV_0 #VOL 2 6 0x1000 //RX_TDDRC_ALPHA_UP_1 @@ -6534,26 +9351,26 @@ 113 0x0000 //RX_TDDRC_THRD_1 114 0x1800 //RX_TDDRC_THRD_2 115 0x1800 //RX_TDDRC_THRD_3 -116 0x3000 //RX_TDDRC_SLANT_0 -117 0x6E00 //RX_TDDRC_SLANT_1 +116 0x7FFF //RX_TDDRC_SLANT_0 +117 0x7FFF //RX_TDDRC_SLANT_1 118 0x1000 //RX_TDDRC_ALPHA_UP_0 119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 120 0x0000 //RX_TDDRC_HMNC_FLAG 121 0x199A //RX_TDDRC_HMNC_GAIN 122 0x0001 //RX_TDDRC_SMT_FLAG 123 0x0CCD //RX_TDDRC_SMT_W -124 0x055F //RX_TDDRC_DRC_GAIN +124 0x06EC //RX_TDDRC_DRC_GAIN 38 0x0014 //RX_FDEQ_SUBNUM -39 0x4840 //RX_FDEQ_GAIN_0 -40 0x3E3E //RX_FDEQ_GAIN_1 -41 0x4E62 //RX_FDEQ_GAIN_2 -42 0x6C7A //RX_FDEQ_GAIN_3 -43 0x8690 //RX_FDEQ_GAIN_4 -44 0x867E //RX_FDEQ_GAIN_5 -45 0x7E7E //RX_FDEQ_GAIN_6 -46 0x8080 //RX_FDEQ_GAIN_7 -47 0x8088 //RX_FDEQ_GAIN_8 -48 0x838B //RX_FDEQ_GAIN_9 +39 0x483A //RX_FDEQ_GAIN_0 +40 0x3A3A //RX_FDEQ_GAIN_1 +41 0x4A58 //RX_FDEQ_GAIN_2 +42 0x5E6E //RX_FDEQ_GAIN_3 +43 0x7A84 //RX_FDEQ_GAIN_4 +44 0x7C7A //RX_FDEQ_GAIN_5 +45 0x7C78 //RX_FDEQ_GAIN_6 +46 0x7978 //RX_FDEQ_GAIN_7 +47 0x7A7E //RX_FDEQ_GAIN_8 +48 0x7C80 //RX_FDEQ_GAIN_9 49 0x4848 //RX_FDEQ_GAIN_10 50 0x4848 //RX_FDEQ_GAIN_11 51 0x4848 //RX_FDEQ_GAIN_12 @@ -6569,8 +9386,8 @@ 61 0x4848 //RX_FDEQ_GAIN_22 62 0x4848 //RX_FDEQ_GAIN_23 63 0x0202 //RX_FDEQ_BIN_0 -64 0x0203 //RX_FDEQ_BIN_1 -65 0x0303 //RX_FDEQ_BIN_2 +64 0x0204 //RX_FDEQ_BIN_1 +65 0x0203 //RX_FDEQ_BIN_2 66 0x0304 //RX_FDEQ_BIN_3 67 0x0405 //RX_FDEQ_BIN_4 68 0x0506 //RX_FDEQ_BIN_5 @@ -6616,7 +9433,7 @@ 108 0x5333 //RX_FDDRC_SLANT_1_2 109 0x5333 //RX_FDDRC_SLANT_1_3 110 0x0000 //RX_FDDRC_RESRV_0 -129 0x001C //RX_SPK_VOL +129 0x001A //RX_SPK_VOL 130 0x0000 //RX_VOL_RESRV_0 #VOL 3 6 0x1000 //RX_TDDRC_ALPHA_UP_1 @@ -6633,26 +9450,26 @@ 113 0x0000 //RX_TDDRC_THRD_1 114 0x1800 //RX_TDDRC_THRD_2 115 0x1800 //RX_TDDRC_THRD_3 -116 0x3000 //RX_TDDRC_SLANT_0 -117 0x6E00 //RX_TDDRC_SLANT_1 +116 0x7FFF //RX_TDDRC_SLANT_0 +117 0x7FFF //RX_TDDRC_SLANT_1 118 0x1000 //RX_TDDRC_ALPHA_UP_0 119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 120 0x0000 //RX_TDDRC_HMNC_FLAG 121 0x199A //RX_TDDRC_HMNC_GAIN 122 0x0001 //RX_TDDRC_SMT_FLAG 123 0x0CCD //RX_TDDRC_SMT_W -124 0x055F //RX_TDDRC_DRC_GAIN +124 0x06EC //RX_TDDRC_DRC_GAIN 38 0x0014 //RX_FDEQ_SUBNUM -39 0x4840 //RX_FDEQ_GAIN_0 -40 0x3E3E //RX_FDEQ_GAIN_1 -41 0x4E62 //RX_FDEQ_GAIN_2 -42 0x6C7A //RX_FDEQ_GAIN_3 -43 0x8690 //RX_FDEQ_GAIN_4 -44 0x867E //RX_FDEQ_GAIN_5 -45 0x7E7E //RX_FDEQ_GAIN_6 -46 0x8080 //RX_FDEQ_GAIN_7 -47 0x8088 //RX_FDEQ_GAIN_8 -48 0x838B //RX_FDEQ_GAIN_9 +39 0x483A //RX_FDEQ_GAIN_0 +40 0x3A3A //RX_FDEQ_GAIN_1 +41 0x4A58 //RX_FDEQ_GAIN_2 +42 0x5E6E //RX_FDEQ_GAIN_3 +43 0x7A84 //RX_FDEQ_GAIN_4 +44 0x7C7A //RX_FDEQ_GAIN_5 +45 0x7C78 //RX_FDEQ_GAIN_6 +46 0x7978 //RX_FDEQ_GAIN_7 +47 0x7A7E //RX_FDEQ_GAIN_8 +48 0x7C80 //RX_FDEQ_GAIN_9 49 0x4848 //RX_FDEQ_GAIN_10 50 0x4848 //RX_FDEQ_GAIN_11 51 0x4848 //RX_FDEQ_GAIN_12 @@ -6668,8 +9485,8 @@ 61 0x4848 //RX_FDEQ_GAIN_22 62 0x4848 //RX_FDEQ_GAIN_23 63 0x0202 //RX_FDEQ_BIN_0 -64 0x0203 //RX_FDEQ_BIN_1 -65 0x0303 //RX_FDEQ_BIN_2 +64 0x0204 //RX_FDEQ_BIN_1 +65 0x0203 //RX_FDEQ_BIN_2 66 0x0304 //RX_FDEQ_BIN_3 67 0x0405 //RX_FDEQ_BIN_4 68 0x0506 //RX_FDEQ_BIN_5 @@ -6732,26 +9549,26 @@ 113 0x0000 //RX_TDDRC_THRD_1 114 0x1800 //RX_TDDRC_THRD_2 115 0x1800 //RX_TDDRC_THRD_3 -116 0x3000 //RX_TDDRC_SLANT_0 -117 0x6E00 //RX_TDDRC_SLANT_1 +116 0x7FFF //RX_TDDRC_SLANT_0 +117 0x7FFF //RX_TDDRC_SLANT_1 118 0x1000 //RX_TDDRC_ALPHA_UP_0 119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 120 0x0000 //RX_TDDRC_HMNC_FLAG 121 0x199A //RX_TDDRC_HMNC_GAIN 122 0x0001 //RX_TDDRC_SMT_FLAG 123 0x0CCD //RX_TDDRC_SMT_W -124 0x055F //RX_TDDRC_DRC_GAIN +124 0x06EC //RX_TDDRC_DRC_GAIN 38 0x0014 //RX_FDEQ_SUBNUM -39 0x4840 //RX_FDEQ_GAIN_0 -40 0x3E3E //RX_FDEQ_GAIN_1 -41 0x4E62 //RX_FDEQ_GAIN_2 -42 0x6C7A //RX_FDEQ_GAIN_3 -43 0x8690 //RX_FDEQ_GAIN_4 -44 0x867E //RX_FDEQ_GAIN_5 -45 0x7E7E //RX_FDEQ_GAIN_6 -46 0x8080 //RX_FDEQ_GAIN_7 -47 0x8088 //RX_FDEQ_GAIN_8 -48 0x838B //RX_FDEQ_GAIN_9 +39 0x483A //RX_FDEQ_GAIN_0 +40 0x3A3A //RX_FDEQ_GAIN_1 +41 0x4A58 //RX_FDEQ_GAIN_2 +42 0x5E6E //RX_FDEQ_GAIN_3 +43 0x7A84 //RX_FDEQ_GAIN_4 +44 0x7C7A //RX_FDEQ_GAIN_5 +45 0x7C78 //RX_FDEQ_GAIN_6 +46 0x7978 //RX_FDEQ_GAIN_7 +47 0x7A7E //RX_FDEQ_GAIN_8 +48 0x7C80 //RX_FDEQ_GAIN_9 49 0x4848 //RX_FDEQ_GAIN_10 50 0x4848 //RX_FDEQ_GAIN_11 51 0x4848 //RX_FDEQ_GAIN_12 @@ -6767,8 +9584,8 @@ 61 0x4848 //RX_FDEQ_GAIN_22 62 0x4848 //RX_FDEQ_GAIN_23 63 0x0202 //RX_FDEQ_BIN_0 -64 0x0203 //RX_FDEQ_BIN_1 -65 0x0303 //RX_FDEQ_BIN_2 +64 0x0204 //RX_FDEQ_BIN_1 +65 0x0203 //RX_FDEQ_BIN_2 66 0x0304 //RX_FDEQ_BIN_3 67 0x0405 //RX_FDEQ_BIN_4 68 0x0506 //RX_FDEQ_BIN_5 @@ -6814,7 +9631,7 @@ 108 0x5333 //RX_FDDRC_SLANT_1_2 109 0x5333 //RX_FDDRC_SLANT_1_3 110 0x0000 //RX_FDDRC_RESRV_0 -129 0x004B //RX_SPK_VOL +129 0x0045 //RX_SPK_VOL 130 0x0000 //RX_VOL_RESRV_0 #VOL 5 6 0x1000 //RX_TDDRC_ALPHA_UP_1 @@ -6831,26 +9648,26 @@ 113 0x0000 //RX_TDDRC_THRD_1 114 0x1800 //RX_TDDRC_THRD_2 115 0x1800 //RX_TDDRC_THRD_3 -116 0x3000 //RX_TDDRC_SLANT_0 -117 0x6E00 //RX_TDDRC_SLANT_1 +116 0x7FFF //RX_TDDRC_SLANT_0 +117 0x7FFF //RX_TDDRC_SLANT_1 118 0x1000 //RX_TDDRC_ALPHA_UP_0 119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 120 0x0000 //RX_TDDRC_HMNC_FLAG 121 0x199A //RX_TDDRC_HMNC_GAIN 122 0x0001 //RX_TDDRC_SMT_FLAG 123 0x0CCD //RX_TDDRC_SMT_W -124 0x055F //RX_TDDRC_DRC_GAIN +124 0x06EC //RX_TDDRC_DRC_GAIN 38 0x0014 //RX_FDEQ_SUBNUM -39 0x4840 //RX_FDEQ_GAIN_0 -40 0x3E3E //RX_FDEQ_GAIN_1 -41 0x4E62 //RX_FDEQ_GAIN_2 -42 0x6C7A //RX_FDEQ_GAIN_3 -43 0x8690 //RX_FDEQ_GAIN_4 -44 0x867E //RX_FDEQ_GAIN_5 -45 0x7E7E //RX_FDEQ_GAIN_6 -46 0x8080 //RX_FDEQ_GAIN_7 -47 0x8088 //RX_FDEQ_GAIN_8 -48 0x838B //RX_FDEQ_GAIN_9 +39 0x483A //RX_FDEQ_GAIN_0 +40 0x3A3A //RX_FDEQ_GAIN_1 +41 0x4A58 //RX_FDEQ_GAIN_2 +42 0x5E6E //RX_FDEQ_GAIN_3 +43 0x7A84 //RX_FDEQ_GAIN_4 +44 0x7C7A //RX_FDEQ_GAIN_5 +45 0x7C78 //RX_FDEQ_GAIN_6 +46 0x7978 //RX_FDEQ_GAIN_7 +47 0x7A7E //RX_FDEQ_GAIN_8 +48 0x7C80 //RX_FDEQ_GAIN_9 49 0x4848 //RX_FDEQ_GAIN_10 50 0x4848 //RX_FDEQ_GAIN_11 51 0x4848 //RX_FDEQ_GAIN_12 @@ -6866,8 +9683,8 @@ 61 0x4848 //RX_FDEQ_GAIN_22 62 0x4848 //RX_FDEQ_GAIN_23 63 0x0202 //RX_FDEQ_BIN_0 -64 0x0203 //RX_FDEQ_BIN_1 -65 0x0303 //RX_FDEQ_BIN_2 +64 0x0204 //RX_FDEQ_BIN_1 +65 0x0203 //RX_FDEQ_BIN_2 66 0x0304 //RX_FDEQ_BIN_3 67 0x0405 //RX_FDEQ_BIN_4 68 0x0506 //RX_FDEQ_BIN_5 @@ -6913,7 +9730,7 @@ 108 0x5333 //RX_FDDRC_SLANT_1_2 109 0x5333 //RX_FDDRC_SLANT_1_3 110 0x0000 //RX_FDDRC_RESRV_0 -129 0x007B //RX_SPK_VOL +129 0x0074 //RX_SPK_VOL 130 0x0000 //RX_VOL_RESRV_0 #VOL 6 6 0x1000 //RX_TDDRC_ALPHA_UP_1 @@ -6930,26 +9747,26 @@ 113 0x0000 //RX_TDDRC_THRD_1 114 0x1800 //RX_TDDRC_THRD_2 115 0x1800 //RX_TDDRC_THRD_3 -116 0x3000 //RX_TDDRC_SLANT_0 -117 0x6E00 //RX_TDDRC_SLANT_1 +116 0x7FFF //RX_TDDRC_SLANT_0 +117 0x7FFF //RX_TDDRC_SLANT_1 118 0x1000 //RX_TDDRC_ALPHA_UP_0 119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 120 0x0000 //RX_TDDRC_HMNC_FLAG 121 0x199A //RX_TDDRC_HMNC_GAIN 122 0x0001 //RX_TDDRC_SMT_FLAG 123 0x0CCD //RX_TDDRC_SMT_W -124 0x055F //RX_TDDRC_DRC_GAIN +124 0x06EC //RX_TDDRC_DRC_GAIN 38 0x0014 //RX_FDEQ_SUBNUM -39 0x4840 //RX_FDEQ_GAIN_0 -40 0x3E3E //RX_FDEQ_GAIN_1 -41 0x4E62 //RX_FDEQ_GAIN_2 -42 0x6C7A //RX_FDEQ_GAIN_3 -43 0x8690 //RX_FDEQ_GAIN_4 -44 0x867E //RX_FDEQ_GAIN_5 -45 0x7E7E //RX_FDEQ_GAIN_6 -46 0x8080 //RX_FDEQ_GAIN_7 -47 0x8088 //RX_FDEQ_GAIN_8 -48 0x838B //RX_FDEQ_GAIN_9 +39 0x483A //RX_FDEQ_GAIN_0 +40 0x3A3A //RX_FDEQ_GAIN_1 +41 0x4A58 //RX_FDEQ_GAIN_2 +42 0x5E6E //RX_FDEQ_GAIN_3 +43 0x7A84 //RX_FDEQ_GAIN_4 +44 0x7C7A //RX_FDEQ_GAIN_5 +45 0x7C78 //RX_FDEQ_GAIN_6 +46 0x7978 //RX_FDEQ_GAIN_7 +47 0x7A7E //RX_FDEQ_GAIN_8 +48 0x7C80 //RX_FDEQ_GAIN_9 49 0x4848 //RX_FDEQ_GAIN_10 50 0x4848 //RX_FDEQ_GAIN_11 51 0x4848 //RX_FDEQ_GAIN_12 @@ -6965,8 +9782,8 @@ 61 0x4848 //RX_FDEQ_GAIN_22 62 0x4848 //RX_FDEQ_GAIN_23 63 0x0202 //RX_FDEQ_BIN_0 -64 0x0203 //RX_FDEQ_BIN_1 -65 0x0303 //RX_FDEQ_BIN_2 +64 0x0204 //RX_FDEQ_BIN_1 +65 0x0203 //RX_FDEQ_BIN_2 66 0x0304 //RX_FDEQ_BIN_3 67 0x0405 //RX_FDEQ_BIN_4 68 0x0506 //RX_FDEQ_BIN_5 @@ -7014,10 +9831,862 @@ 110 0x0000 //RX_FDDRC_RESRV_0 129 0x0100 //RX_SPK_VOL 130 0x0000 //RX_VOL_RESRV_0 +#RX 2 +157 0x003C //RX_RECVFUNC_MODE_0 +158 0x0000 //RX_RECVFUNC_MODE_1 +159 0x0000 //RX_SAMPLINGFREQ_SIG +160 0x0000 //RX_SAMPLINGFREQ_PROC +161 0x000A //RX_FRAME_SZ +162 0x0000 //RX_DELAY_OPT +163 0x1000 //RX_TDDRC_ALPHA_UP_1 +164 0x1000 //RX_TDDRC_ALPHA_UP_2 +165 0x1000 //RX_TDDRC_ALPHA_UP_3 +166 0x1000 //RX_TDDRC_ALPHA_UP_4 +167 0x0600 //RX_PGA +168 0x7FFF //RX_A_HP +169 0x4000 //RX_B_PE +170 0x7800 //RX_THR_PITCH_DET_0 +171 0x7000 //RX_THR_PITCH_DET_1 +172 0x6000 //RX_THR_PITCH_DET_2 +173 0x0008 //RX_PITCH_BFR_LEN +174 0x0003 //RX_SBD_PITCH_DET +175 0x0100 //RX_PP_RESRV_0 +176 0x0020 //RX_PP_RESRV_1 +177 0x0400 //RX_N_SN_EST +178 0x000C //RX_N2_SN_EST +179 0x0014 //RX_NS_LVL_CTRL +180 0xF800 //RX_THR_SN_EST +181 0x7E00 //RX_LAMBDA_PFILT +182 0x000A //RX_FENS_RESRV_0 +183 0x0190 //RX_FENS_RESRV_1 +184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +187 0x0002 //RX_EXTRA_NS_L +188 0x0800 //RX_EXTRA_NS_A +189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +190 0x7000 //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +192 0x199A //RX_A_POST_FLT +193 0x0000 //RX_LMT_THRD +194 0x4000 //RX_LMT_ALPHA +195 0x0014 //RX_FDEQ_SUBNUM +196 0x4840 //RX_FDEQ_GAIN_0 +197 0x3E3E //RX_FDEQ_GAIN_1 +198 0x4E62 //RX_FDEQ_GAIN_2 +199 0x6C7A //RX_FDEQ_GAIN_3 +200 0x8690 //RX_FDEQ_GAIN_4 +201 0x867E //RX_FDEQ_GAIN_5 +202 0x7E7E //RX_FDEQ_GAIN_6 +203 0x8080 //RX_FDEQ_GAIN_7 +204 0x8088 //RX_FDEQ_GAIN_8 +205 0x838B //RX_FDEQ_GAIN_9 +206 0x4848 //RX_FDEQ_GAIN_10 +207 0x4848 //RX_FDEQ_GAIN_11 +208 0x4848 //RX_FDEQ_GAIN_12 +209 0x4848 //RX_FDEQ_GAIN_13 +210 0x4848 //RX_FDEQ_GAIN_14 +211 0x4848 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0202 //RX_FDEQ_BIN_0 +221 0x0203 //RX_FDEQ_BIN_1 +222 0x0303 //RX_FDEQ_BIN_2 +223 0x0304 //RX_FDEQ_BIN_3 +224 0x0405 //RX_FDEQ_BIN_4 +225 0x0506 //RX_FDEQ_BIN_5 +226 0x0708 //RX_FDEQ_BIN_6 +227 0x090A //RX_FDEQ_BIN_7 +228 0x0B0C //RX_FDEQ_BIN_8 +229 0x0D08 //RX_FDEQ_BIN_9 +230 0x0000 //RX_FDEQ_BIN_10 +231 0x0000 //RX_FDEQ_BIN_11 +232 0x0000 //RX_FDEQ_BIN_12 +233 0x0000 //RX_FDEQ_BIN_13 +234 0x0000 //RX_FDEQ_BIN_14 +235 0x0000 //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x4000 //RX_FDEQ_RESRV_0 +245 0x0320 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0030 //RX_FDDRC_BAND_MARGIN_1 +248 0x0050 //RX_FDDRC_BAND_MARGIN_2 +249 0x0080 //RX_FDDRC_BAND_MARGIN_3 +250 0x0007 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x5000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x6400 //RX_FDDRC_THRD_3_2 +258 0x6400 //RX_FDDRC_THRD_3_3 +259 0x2000 //RX_FDDRC_SLANT_0_0 +260 0x2000 //RX_FDDRC_SLANT_0_1 +261 0x2000 //RX_FDDRC_SLANT_0_2 +262 0x2000 //RX_FDDRC_SLANT_0_3 +263 0x5333 //RX_FDDRC_SLANT_1_0 +264 0x5333 //RX_FDDRC_SLANT_1_1 +265 0x5333 //RX_FDDRC_SLANT_1_2 +266 0x5333 //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +268 0x0002 //RX_FILTINDX +269 0x0000 //RX_TDDRC_THRD_0 +270 0x0000 //RX_TDDRC_THRD_1 +271 0x1800 //RX_TDDRC_THRD_2 +272 0x1800 //RX_TDDRC_THRD_3 +273 0x3000 //RX_TDDRC_SLANT_0 +274 0x6E00 //RX_TDDRC_SLANT_1 +275 0x1000 //RX_TDDRC_ALPHA_UP_0 +276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x199A //RX_TDDRC_HMNC_GAIN +279 0x0001 //RX_TDDRC_SMT_FLAG +280 0x0CCD //RX_TDDRC_SMT_W +281 0x05A0 //RX_TDDRC_DRC_GAIN +282 0x7C00 //RX_LAMBDA_PKA_FP +283 0x13E0 //RX_TPKA_FP +284 0x0080 //RX_MIN_G_FP +285 0x2000 //RX_MAX_G_FP +286 0x000A //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 +288 0x0000 //RX_MAXLEVEL_CNG +289 0x3000 //RX_BWE_UV_TH +290 0x3000 //RX_BWE_UV_TH2 +291 0x1800 //RX_BWE_UV_TH3 +292 0x1000 //RX_BWE_V_TH +293 0x04CD //RX_BWE_GAIN1_V_TH1 +294 0x0F33 //RX_BWE_GAIN1_V_TH2 +295 0x7333 //RX_BWE_UV_EQ +296 0x199A //RX_BWE_V_EQ +297 0x7333 //RX_BWE_TONE_TH +298 0x0004 //RX_BWE_UV_HOLD_T +299 0x6CCD //RX_BWE_GAIN2_ALPHA +300 0x799A //RX_BWE_GAIN3_ALPHA +301 0x001E //RX_BWE_CUTOFF +302 0x3000 //RX_BWE_GAINFILL +303 0x3200 //RX_BWE_MAXTH_TONE +304 0x2000 //RX_BWE_EQ_0 +305 0x2000 //RX_BWE_EQ_1 +306 0x2000 //RX_BWE_EQ_2 +307 0x2000 //RX_BWE_EQ_3 +308 0x2000 //RX_BWE_EQ_4 +309 0x2000 //RX_BWE_EQ_5 +310 0x2000 //RX_BWE_EQ_6 +311 0x0000 //RX_BWE_RESRV_0 +312 0x0000 //RX_BWE_RESRV_1 +313 0x0000 //RX_BWE_RESRV_2 +#VOL 0 +163 0x1000 //RX_TDDRC_ALPHA_UP_1 +164 0x1000 //RX_TDDRC_ALPHA_UP_2 +165 0x1000 //RX_TDDRC_ALPHA_UP_3 +166 0x1000 //RX_TDDRC_ALPHA_UP_4 +184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +190 0x7000 //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +269 0x0000 //RX_TDDRC_THRD_0 +270 0x0000 //RX_TDDRC_THRD_1 +271 0x1800 //RX_TDDRC_THRD_2 +272 0x1800 //RX_TDDRC_THRD_3 +273 0x3000 //RX_TDDRC_SLANT_0 +274 0x6E00 //RX_TDDRC_SLANT_1 +275 0x1000 //RX_TDDRC_ALPHA_UP_0 +276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x199A //RX_TDDRC_HMNC_GAIN +279 0x0001 //RX_TDDRC_SMT_FLAG +280 0x0CCD //RX_TDDRC_SMT_W +281 0x05A0 //RX_TDDRC_DRC_GAIN +195 0x0014 //RX_FDEQ_SUBNUM +196 0x4840 //RX_FDEQ_GAIN_0 +197 0x3E3E //RX_FDEQ_GAIN_1 +198 0x4E62 //RX_FDEQ_GAIN_2 +199 0x6C7A //RX_FDEQ_GAIN_3 +200 0x8690 //RX_FDEQ_GAIN_4 +201 0x867E //RX_FDEQ_GAIN_5 +202 0x7E7E //RX_FDEQ_GAIN_6 +203 0x8080 //RX_FDEQ_GAIN_7 +204 0x8088 //RX_FDEQ_GAIN_8 +205 0x838B //RX_FDEQ_GAIN_9 +206 0x4848 //RX_FDEQ_GAIN_10 +207 0x4848 //RX_FDEQ_GAIN_11 +208 0x4848 //RX_FDEQ_GAIN_12 +209 0x4848 //RX_FDEQ_GAIN_13 +210 0x4848 //RX_FDEQ_GAIN_14 +211 0x4848 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0202 //RX_FDEQ_BIN_0 +221 0x0203 //RX_FDEQ_BIN_1 +222 0x0303 //RX_FDEQ_BIN_2 +223 0x0304 //RX_FDEQ_BIN_3 +224 0x0405 //RX_FDEQ_BIN_4 +225 0x0506 //RX_FDEQ_BIN_5 +226 0x0708 //RX_FDEQ_BIN_6 +227 0x090A //RX_FDEQ_BIN_7 +228 0x0B0C //RX_FDEQ_BIN_8 +229 0x0D08 //RX_FDEQ_BIN_9 +230 0x0000 //RX_FDEQ_BIN_10 +231 0x0000 //RX_FDEQ_BIN_11 +232 0x0000 //RX_FDEQ_BIN_12 +233 0x0000 //RX_FDEQ_BIN_13 +234 0x0000 //RX_FDEQ_BIN_14 +235 0x0000 //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x4000 //RX_FDEQ_RESRV_0 +245 0x0320 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0030 //RX_FDDRC_BAND_MARGIN_1 +248 0x0050 //RX_FDDRC_BAND_MARGIN_2 +249 0x0080 //RX_FDDRC_BAND_MARGIN_3 +250 0x0007 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x5000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x6400 //RX_FDDRC_THRD_3_2 +258 0x6400 //RX_FDDRC_THRD_3_3 +259 0x2000 //RX_FDDRC_SLANT_0_0 +260 0x2000 //RX_FDDRC_SLANT_0_1 +261 0x2000 //RX_FDDRC_SLANT_0_2 +262 0x2000 //RX_FDDRC_SLANT_0_3 +263 0x5333 //RX_FDDRC_SLANT_1_0 +264 0x5333 //RX_FDDRC_SLANT_1_1 +265 0x5333 //RX_FDDRC_SLANT_1_2 +266 0x5333 //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +286 0x000A //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 +#VOL 1 +163 0x1000 //RX_TDDRC_ALPHA_UP_1 +164 0x1000 //RX_TDDRC_ALPHA_UP_2 +165 0x1000 //RX_TDDRC_ALPHA_UP_3 +166 0x1000 //RX_TDDRC_ALPHA_UP_4 +184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +190 0x7000 //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +269 0x0000 //RX_TDDRC_THRD_0 +270 0x0000 //RX_TDDRC_THRD_1 +271 0x1800 //RX_TDDRC_THRD_2 +272 0x1800 //RX_TDDRC_THRD_3 +273 0x3000 //RX_TDDRC_SLANT_0 +274 0x6E00 //RX_TDDRC_SLANT_1 +275 0x1000 //RX_TDDRC_ALPHA_UP_0 +276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x199A //RX_TDDRC_HMNC_GAIN +279 0x0001 //RX_TDDRC_SMT_FLAG +280 0x0CCD //RX_TDDRC_SMT_W +281 0x055F //RX_TDDRC_DRC_GAIN +195 0x0014 //RX_FDEQ_SUBNUM +196 0x4840 //RX_FDEQ_GAIN_0 +197 0x3E3E //RX_FDEQ_GAIN_1 +198 0x4E62 //RX_FDEQ_GAIN_2 +199 0x6C7A //RX_FDEQ_GAIN_3 +200 0x8690 //RX_FDEQ_GAIN_4 +201 0x867E //RX_FDEQ_GAIN_5 +202 0x7E7E //RX_FDEQ_GAIN_6 +203 0x8080 //RX_FDEQ_GAIN_7 +204 0x8088 //RX_FDEQ_GAIN_8 +205 0x838B //RX_FDEQ_GAIN_9 +206 0x4848 //RX_FDEQ_GAIN_10 +207 0x4848 //RX_FDEQ_GAIN_11 +208 0x4848 //RX_FDEQ_GAIN_12 +209 0x4848 //RX_FDEQ_GAIN_13 +210 0x4848 //RX_FDEQ_GAIN_14 +211 0x4848 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0202 //RX_FDEQ_BIN_0 +221 0x0203 //RX_FDEQ_BIN_1 +222 0x0303 //RX_FDEQ_BIN_2 +223 0x0304 //RX_FDEQ_BIN_3 +224 0x0405 //RX_FDEQ_BIN_4 +225 0x0506 //RX_FDEQ_BIN_5 +226 0x0708 //RX_FDEQ_BIN_6 +227 0x090A //RX_FDEQ_BIN_7 +228 0x0B0C //RX_FDEQ_BIN_8 +229 0x0D08 //RX_FDEQ_BIN_9 +230 0x0000 //RX_FDEQ_BIN_10 +231 0x0000 //RX_FDEQ_BIN_11 +232 0x0000 //RX_FDEQ_BIN_12 +233 0x0000 //RX_FDEQ_BIN_13 +234 0x0000 //RX_FDEQ_BIN_14 +235 0x0000 //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x4000 //RX_FDEQ_RESRV_0 +245 0x0320 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0030 //RX_FDDRC_BAND_MARGIN_1 +248 0x0050 //RX_FDDRC_BAND_MARGIN_2 +249 0x0080 //RX_FDDRC_BAND_MARGIN_3 +250 0x0007 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x5000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x6400 //RX_FDDRC_THRD_3_2 +258 0x6400 //RX_FDDRC_THRD_3_3 +259 0x2000 //RX_FDDRC_SLANT_0_0 +260 0x2000 //RX_FDDRC_SLANT_0_1 +261 0x2000 //RX_FDDRC_SLANT_0_2 +262 0x2000 //RX_FDDRC_SLANT_0_3 +263 0x5333 //RX_FDDRC_SLANT_1_0 +264 0x5333 //RX_FDDRC_SLANT_1_1 +265 0x5333 //RX_FDDRC_SLANT_1_2 +266 0x5333 //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +286 0x0011 //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 +#VOL 2 +163 0x1000 //RX_TDDRC_ALPHA_UP_1 +164 0x1000 //RX_TDDRC_ALPHA_UP_2 +165 0x1000 //RX_TDDRC_ALPHA_UP_3 +166 0x1000 //RX_TDDRC_ALPHA_UP_4 +184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +190 0x7000 //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +269 0x0000 //RX_TDDRC_THRD_0 +270 0x0000 //RX_TDDRC_THRD_1 +271 0x1800 //RX_TDDRC_THRD_2 +272 0x1800 //RX_TDDRC_THRD_3 +273 0x3000 //RX_TDDRC_SLANT_0 +274 0x6E00 //RX_TDDRC_SLANT_1 +275 0x1000 //RX_TDDRC_ALPHA_UP_0 +276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x199A //RX_TDDRC_HMNC_GAIN +279 0x0001 //RX_TDDRC_SMT_FLAG +280 0x0CCD //RX_TDDRC_SMT_W +281 0x055F //RX_TDDRC_DRC_GAIN +195 0x0014 //RX_FDEQ_SUBNUM +196 0x4840 //RX_FDEQ_GAIN_0 +197 0x3E3E //RX_FDEQ_GAIN_1 +198 0x4E62 //RX_FDEQ_GAIN_2 +199 0x6C7A //RX_FDEQ_GAIN_3 +200 0x8690 //RX_FDEQ_GAIN_4 +201 0x867E //RX_FDEQ_GAIN_5 +202 0x7E7E //RX_FDEQ_GAIN_6 +203 0x8080 //RX_FDEQ_GAIN_7 +204 0x8088 //RX_FDEQ_GAIN_8 +205 0x838B //RX_FDEQ_GAIN_9 +206 0x4848 //RX_FDEQ_GAIN_10 +207 0x4848 //RX_FDEQ_GAIN_11 +208 0x4848 //RX_FDEQ_GAIN_12 +209 0x4848 //RX_FDEQ_GAIN_13 +210 0x4848 //RX_FDEQ_GAIN_14 +211 0x4848 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0202 //RX_FDEQ_BIN_0 +221 0x0203 //RX_FDEQ_BIN_1 +222 0x0303 //RX_FDEQ_BIN_2 +223 0x0304 //RX_FDEQ_BIN_3 +224 0x0405 //RX_FDEQ_BIN_4 +225 0x0506 //RX_FDEQ_BIN_5 +226 0x0708 //RX_FDEQ_BIN_6 +227 0x090A //RX_FDEQ_BIN_7 +228 0x0B0C //RX_FDEQ_BIN_8 +229 0x0D08 //RX_FDEQ_BIN_9 +230 0x0000 //RX_FDEQ_BIN_10 +231 0x0000 //RX_FDEQ_BIN_11 +232 0x0000 //RX_FDEQ_BIN_12 +233 0x0000 //RX_FDEQ_BIN_13 +234 0x0000 //RX_FDEQ_BIN_14 +235 0x0000 //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x4000 //RX_FDEQ_RESRV_0 +245 0x0320 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0030 //RX_FDDRC_BAND_MARGIN_1 +248 0x0050 //RX_FDDRC_BAND_MARGIN_2 +249 0x0080 //RX_FDDRC_BAND_MARGIN_3 +250 0x0007 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x5000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x6400 //RX_FDDRC_THRD_3_2 +258 0x6400 //RX_FDDRC_THRD_3_3 +259 0x2000 //RX_FDDRC_SLANT_0_0 +260 0x2000 //RX_FDDRC_SLANT_0_1 +261 0x2000 //RX_FDDRC_SLANT_0_2 +262 0x2000 //RX_FDDRC_SLANT_0_3 +263 0x5333 //RX_FDDRC_SLANT_1_0 +264 0x5333 //RX_FDDRC_SLANT_1_1 +265 0x5333 //RX_FDDRC_SLANT_1_2 +266 0x5333 //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +286 0x001C //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 +#VOL 3 +163 0x1000 //RX_TDDRC_ALPHA_UP_1 +164 0x1000 //RX_TDDRC_ALPHA_UP_2 +165 0x1000 //RX_TDDRC_ALPHA_UP_3 +166 0x1000 //RX_TDDRC_ALPHA_UP_4 +184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +190 0x7000 //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +269 0x0000 //RX_TDDRC_THRD_0 +270 0x0000 //RX_TDDRC_THRD_1 +271 0x1800 //RX_TDDRC_THRD_2 +272 0x1800 //RX_TDDRC_THRD_3 +273 0x3000 //RX_TDDRC_SLANT_0 +274 0x6E00 //RX_TDDRC_SLANT_1 +275 0x1000 //RX_TDDRC_ALPHA_UP_0 +276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x199A //RX_TDDRC_HMNC_GAIN +279 0x0001 //RX_TDDRC_SMT_FLAG +280 0x0CCD //RX_TDDRC_SMT_W +281 0x055F //RX_TDDRC_DRC_GAIN +195 0x0014 //RX_FDEQ_SUBNUM +196 0x4840 //RX_FDEQ_GAIN_0 +197 0x3E3E //RX_FDEQ_GAIN_1 +198 0x4E62 //RX_FDEQ_GAIN_2 +199 0x6C7A //RX_FDEQ_GAIN_3 +200 0x8690 //RX_FDEQ_GAIN_4 +201 0x867E //RX_FDEQ_GAIN_5 +202 0x7E7E //RX_FDEQ_GAIN_6 +203 0x8080 //RX_FDEQ_GAIN_7 +204 0x8088 //RX_FDEQ_GAIN_8 +205 0x838B //RX_FDEQ_GAIN_9 +206 0x4848 //RX_FDEQ_GAIN_10 +207 0x4848 //RX_FDEQ_GAIN_11 +208 0x4848 //RX_FDEQ_GAIN_12 +209 0x4848 //RX_FDEQ_GAIN_13 +210 0x4848 //RX_FDEQ_GAIN_14 +211 0x4848 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0202 //RX_FDEQ_BIN_0 +221 0x0203 //RX_FDEQ_BIN_1 +222 0x0303 //RX_FDEQ_BIN_2 +223 0x0304 //RX_FDEQ_BIN_3 +224 0x0405 //RX_FDEQ_BIN_4 +225 0x0506 //RX_FDEQ_BIN_5 +226 0x0708 //RX_FDEQ_BIN_6 +227 0x090A //RX_FDEQ_BIN_7 +228 0x0B0C //RX_FDEQ_BIN_8 +229 0x0D08 //RX_FDEQ_BIN_9 +230 0x0000 //RX_FDEQ_BIN_10 +231 0x0000 //RX_FDEQ_BIN_11 +232 0x0000 //RX_FDEQ_BIN_12 +233 0x0000 //RX_FDEQ_BIN_13 +234 0x0000 //RX_FDEQ_BIN_14 +235 0x0000 //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x4000 //RX_FDEQ_RESRV_0 +245 0x0320 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0030 //RX_FDDRC_BAND_MARGIN_1 +248 0x0050 //RX_FDDRC_BAND_MARGIN_2 +249 0x0080 //RX_FDDRC_BAND_MARGIN_3 +250 0x0007 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x5000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x6400 //RX_FDDRC_THRD_3_2 +258 0x6400 //RX_FDDRC_THRD_3_3 +259 0x2000 //RX_FDDRC_SLANT_0_0 +260 0x2000 //RX_FDDRC_SLANT_0_1 +261 0x2000 //RX_FDDRC_SLANT_0_2 +262 0x2000 //RX_FDDRC_SLANT_0_3 +263 0x5333 //RX_FDDRC_SLANT_1_0 +264 0x5333 //RX_FDDRC_SLANT_1_1 +265 0x5333 //RX_FDDRC_SLANT_1_2 +266 0x5333 //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +286 0x002E //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 +#VOL 4 +163 0x1000 //RX_TDDRC_ALPHA_UP_1 +164 0x1000 //RX_TDDRC_ALPHA_UP_2 +165 0x1000 //RX_TDDRC_ALPHA_UP_3 +166 0x1000 //RX_TDDRC_ALPHA_UP_4 +184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +190 0x7000 //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +269 0x0000 //RX_TDDRC_THRD_0 +270 0x0000 //RX_TDDRC_THRD_1 +271 0x1800 //RX_TDDRC_THRD_2 +272 0x1800 //RX_TDDRC_THRD_3 +273 0x3000 //RX_TDDRC_SLANT_0 +274 0x6E00 //RX_TDDRC_SLANT_1 +275 0x1000 //RX_TDDRC_ALPHA_UP_0 +276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x199A //RX_TDDRC_HMNC_GAIN +279 0x0001 //RX_TDDRC_SMT_FLAG +280 0x0CCD //RX_TDDRC_SMT_W +281 0x055F //RX_TDDRC_DRC_GAIN +195 0x0014 //RX_FDEQ_SUBNUM +196 0x4840 //RX_FDEQ_GAIN_0 +197 0x3E3E //RX_FDEQ_GAIN_1 +198 0x4E62 //RX_FDEQ_GAIN_2 +199 0x6C7A //RX_FDEQ_GAIN_3 +200 0x8690 //RX_FDEQ_GAIN_4 +201 0x867E //RX_FDEQ_GAIN_5 +202 0x7E7E //RX_FDEQ_GAIN_6 +203 0x8080 //RX_FDEQ_GAIN_7 +204 0x8088 //RX_FDEQ_GAIN_8 +205 0x838B //RX_FDEQ_GAIN_9 +206 0x4848 //RX_FDEQ_GAIN_10 +207 0x4848 //RX_FDEQ_GAIN_11 +208 0x4848 //RX_FDEQ_GAIN_12 +209 0x4848 //RX_FDEQ_GAIN_13 +210 0x4848 //RX_FDEQ_GAIN_14 +211 0x4848 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0202 //RX_FDEQ_BIN_0 +221 0x0203 //RX_FDEQ_BIN_1 +222 0x0303 //RX_FDEQ_BIN_2 +223 0x0304 //RX_FDEQ_BIN_3 +224 0x0405 //RX_FDEQ_BIN_4 +225 0x0506 //RX_FDEQ_BIN_5 +226 0x0708 //RX_FDEQ_BIN_6 +227 0x090A //RX_FDEQ_BIN_7 +228 0x0B0C //RX_FDEQ_BIN_8 +229 0x0D08 //RX_FDEQ_BIN_9 +230 0x0000 //RX_FDEQ_BIN_10 +231 0x0000 //RX_FDEQ_BIN_11 +232 0x0000 //RX_FDEQ_BIN_12 +233 0x0000 //RX_FDEQ_BIN_13 +234 0x0000 //RX_FDEQ_BIN_14 +235 0x0000 //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x4000 //RX_FDEQ_RESRV_0 +245 0x0320 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0030 //RX_FDDRC_BAND_MARGIN_1 +248 0x0050 //RX_FDDRC_BAND_MARGIN_2 +249 0x0080 //RX_FDDRC_BAND_MARGIN_3 +250 0x0007 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x5000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x6400 //RX_FDDRC_THRD_3_2 +258 0x6400 //RX_FDDRC_THRD_3_3 +259 0x2000 //RX_FDDRC_SLANT_0_0 +260 0x2000 //RX_FDDRC_SLANT_0_1 +261 0x2000 //RX_FDDRC_SLANT_0_2 +262 0x2000 //RX_FDDRC_SLANT_0_3 +263 0x5333 //RX_FDDRC_SLANT_1_0 +264 0x5333 //RX_FDDRC_SLANT_1_1 +265 0x5333 //RX_FDDRC_SLANT_1_2 +266 0x5333 //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +286 0x004B //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 +#VOL 5 +163 0x1000 //RX_TDDRC_ALPHA_UP_1 +164 0x1000 //RX_TDDRC_ALPHA_UP_2 +165 0x1000 //RX_TDDRC_ALPHA_UP_3 +166 0x1000 //RX_TDDRC_ALPHA_UP_4 +184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +190 0x7000 //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +269 0x0000 //RX_TDDRC_THRD_0 +270 0x0000 //RX_TDDRC_THRD_1 +271 0x1800 //RX_TDDRC_THRD_2 +272 0x1800 //RX_TDDRC_THRD_3 +273 0x3000 //RX_TDDRC_SLANT_0 +274 0x6E00 //RX_TDDRC_SLANT_1 +275 0x1000 //RX_TDDRC_ALPHA_UP_0 +276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x199A //RX_TDDRC_HMNC_GAIN +279 0x0001 //RX_TDDRC_SMT_FLAG +280 0x0CCD //RX_TDDRC_SMT_W +281 0x055F //RX_TDDRC_DRC_GAIN +195 0x0014 //RX_FDEQ_SUBNUM +196 0x4840 //RX_FDEQ_GAIN_0 +197 0x3E3E //RX_FDEQ_GAIN_1 +198 0x4E62 //RX_FDEQ_GAIN_2 +199 0x6C7A //RX_FDEQ_GAIN_3 +200 0x8690 //RX_FDEQ_GAIN_4 +201 0x867E //RX_FDEQ_GAIN_5 +202 0x7E7E //RX_FDEQ_GAIN_6 +203 0x8080 //RX_FDEQ_GAIN_7 +204 0x8088 //RX_FDEQ_GAIN_8 +205 0x838B //RX_FDEQ_GAIN_9 +206 0x4848 //RX_FDEQ_GAIN_10 +207 0x4848 //RX_FDEQ_GAIN_11 +208 0x4848 //RX_FDEQ_GAIN_12 +209 0x4848 //RX_FDEQ_GAIN_13 +210 0x4848 //RX_FDEQ_GAIN_14 +211 0x4848 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0202 //RX_FDEQ_BIN_0 +221 0x0203 //RX_FDEQ_BIN_1 +222 0x0303 //RX_FDEQ_BIN_2 +223 0x0304 //RX_FDEQ_BIN_3 +224 0x0405 //RX_FDEQ_BIN_4 +225 0x0506 //RX_FDEQ_BIN_5 +226 0x0708 //RX_FDEQ_BIN_6 +227 0x090A //RX_FDEQ_BIN_7 +228 0x0B0C //RX_FDEQ_BIN_8 +229 0x0D08 //RX_FDEQ_BIN_9 +230 0x0000 //RX_FDEQ_BIN_10 +231 0x0000 //RX_FDEQ_BIN_11 +232 0x0000 //RX_FDEQ_BIN_12 +233 0x0000 //RX_FDEQ_BIN_13 +234 0x0000 //RX_FDEQ_BIN_14 +235 0x0000 //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x4000 //RX_FDEQ_RESRV_0 +245 0x0320 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0030 //RX_FDDRC_BAND_MARGIN_1 +248 0x0050 //RX_FDDRC_BAND_MARGIN_2 +249 0x0080 //RX_FDDRC_BAND_MARGIN_3 +250 0x0007 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x5000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x6400 //RX_FDDRC_THRD_3_2 +258 0x6400 //RX_FDDRC_THRD_3_3 +259 0x2000 //RX_FDDRC_SLANT_0_0 +260 0x2000 //RX_FDDRC_SLANT_0_1 +261 0x2000 //RX_FDDRC_SLANT_0_2 +262 0x2000 //RX_FDDRC_SLANT_0_3 +263 0x5333 //RX_FDDRC_SLANT_1_0 +264 0x5333 //RX_FDDRC_SLANT_1_1 +265 0x5333 //RX_FDDRC_SLANT_1_2 +266 0x5333 //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +286 0x007B //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 +#VOL 6 +163 0x1000 //RX_TDDRC_ALPHA_UP_1 +164 0x1000 //RX_TDDRC_ALPHA_UP_2 +165 0x1000 //RX_TDDRC_ALPHA_UP_3 +166 0x1000 //RX_TDDRC_ALPHA_UP_4 +184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +190 0x7000 //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +269 0x0000 //RX_TDDRC_THRD_0 +270 0x0000 //RX_TDDRC_THRD_1 +271 0x1800 //RX_TDDRC_THRD_2 +272 0x1800 //RX_TDDRC_THRD_3 +273 0x3000 //RX_TDDRC_SLANT_0 +274 0x6E00 //RX_TDDRC_SLANT_1 +275 0x1000 //RX_TDDRC_ALPHA_UP_0 +276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x199A //RX_TDDRC_HMNC_GAIN +279 0x0001 //RX_TDDRC_SMT_FLAG +280 0x0CCD //RX_TDDRC_SMT_W +281 0x055F //RX_TDDRC_DRC_GAIN +195 0x0014 //RX_FDEQ_SUBNUM +196 0x4840 //RX_FDEQ_GAIN_0 +197 0x3E3E //RX_FDEQ_GAIN_1 +198 0x4E62 //RX_FDEQ_GAIN_2 +199 0x6C7A //RX_FDEQ_GAIN_3 +200 0x8690 //RX_FDEQ_GAIN_4 +201 0x867E //RX_FDEQ_GAIN_5 +202 0x7E7E //RX_FDEQ_GAIN_6 +203 0x8080 //RX_FDEQ_GAIN_7 +204 0x8088 //RX_FDEQ_GAIN_8 +205 0x838B //RX_FDEQ_GAIN_9 +206 0x4848 //RX_FDEQ_GAIN_10 +207 0x4848 //RX_FDEQ_GAIN_11 +208 0x4848 //RX_FDEQ_GAIN_12 +209 0x4848 //RX_FDEQ_GAIN_13 +210 0x4848 //RX_FDEQ_GAIN_14 +211 0x4848 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0202 //RX_FDEQ_BIN_0 +221 0x0203 //RX_FDEQ_BIN_1 +222 0x0303 //RX_FDEQ_BIN_2 +223 0x0304 //RX_FDEQ_BIN_3 +224 0x0405 //RX_FDEQ_BIN_4 +225 0x0506 //RX_FDEQ_BIN_5 +226 0x0708 //RX_FDEQ_BIN_6 +227 0x090A //RX_FDEQ_BIN_7 +228 0x0B0C //RX_FDEQ_BIN_8 +229 0x0D08 //RX_FDEQ_BIN_9 +230 0x0000 //RX_FDEQ_BIN_10 +231 0x0000 //RX_FDEQ_BIN_11 +232 0x0000 //RX_FDEQ_BIN_12 +233 0x0000 //RX_FDEQ_BIN_13 +234 0x0000 //RX_FDEQ_BIN_14 +235 0x0000 //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x4000 //RX_FDEQ_RESRV_0 +245 0x0320 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0030 //RX_FDDRC_BAND_MARGIN_1 +248 0x0050 //RX_FDDRC_BAND_MARGIN_2 +249 0x0080 //RX_FDDRC_BAND_MARGIN_3 +250 0x0007 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x5000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x6400 //RX_FDDRC_THRD_3_2 +258 0x6400 //RX_FDDRC_THRD_3_3 +259 0x2000 //RX_FDDRC_SLANT_0_0 +260 0x2000 //RX_FDDRC_SLANT_0_1 +261 0x2000 //RX_FDDRC_SLANT_0_2 +262 0x2000 //RX_FDDRC_SLANT_0_3 +263 0x5333 //RX_FDDRC_SLANT_1_0 +264 0x5333 //RX_FDDRC_SLANT_1_1 +265 0x5333 //RX_FDDRC_SLANT_1_2 +266 0x5333 //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +286 0x0100 //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 #CASE_NAME HANDSET-HANDSET-VOICE_GENERIC-WB -#PARAM_TYPE TX+RX -#TOTAL_CUSTOM_STEP 7 +#PARAM_MODE Full +#PARAM_TYPE TX+2RX +#TOTAL_CUSTOM_STEP 7+7 #TX 0 0x0000 //TX_OPERATION_MODE_0 1 0x0000 //TX_OPERATION_MODE_1 @@ -7040,7 +10709,7 @@ 18 0x0000 //TX_SYS_RESRV_2 19 0x0000 //TX_SYS_RESRV_3 20 0x0000 //TX_DIST2REF0 -21 0x009D //TX_DIST2REF1 +21 0x009C //TX_DIST2REF1 22 0x0000 //TX_DIST2REF_02 23 0x0000 //TX_DIST2REF_03 24 0x0000 //TX_DIST2REF_04 @@ -7270,16 +10939,16 @@ 248 0xF800 //TX_THR_SN_EST_6 249 0xF700 //TX_THR_SN_EST_7 250 0x0000 //TX_DELTA_THR_SN_EST_0 -251 0x0100 //TX_DELTA_THR_SN_EST_1 -252 0x01A0 //TX_DELTA_THR_SN_EST_2 +251 0x01A0 //TX_DELTA_THR_SN_EST_1 +252 0x0200 //TX_DELTA_THR_SN_EST_2 253 0x0200 //TX_DELTA_THR_SN_EST_3 -254 0x0200 //TX_DELTA_THR_SN_EST_4 -255 0x0100 //TX_DELTA_THR_SN_EST_5 -256 0x0200 //TX_DELTA_THR_SN_EST_6 +254 0x0100 //TX_DELTA_THR_SN_EST_4 +255 0x0200 //TX_DELTA_THR_SN_EST_5 +256 0x0100 //TX_DELTA_THR_SN_EST_6 257 0x0200 //TX_DELTA_THR_SN_EST_7 258 0x4000 //TX_LAMBDA_NN_EST_0 -259 0x4000 //TX_LAMBDA_NN_EST_1 -260 0x5000 //TX_LAMBDA_NN_EST_2 +259 0x5000 //TX_LAMBDA_NN_EST_1 +260 0x4000 //TX_LAMBDA_NN_EST_2 261 0x4000 //TX_LAMBDA_NN_EST_3 262 0x4000 //TX_LAMBDA_NN_EST_4 263 0x4000 //TX_LAMBDA_NN_EST_5 @@ -7301,18 +10970,18 @@ 279 0x1000 //TX_B_POST_FLT_0 280 0x4000 //TX_B_POST_FLT_1 281 0x0018 //TX_NS_LVL_CTRL_0 -282 0x001C //TX_NS_LVL_CTRL_1 -283 0x0019 //TX_NS_LVL_CTRL_2 -284 0x0018 //TX_NS_LVL_CTRL_3 -285 0x0019 //TX_NS_LVL_CTRL_4 -286 0x001A //TX_NS_LVL_CTRL_5 -287 0x001E //TX_NS_LVL_CTRL_6 +282 0x0019 //TX_NS_LVL_CTRL_1 +283 0x0018 //TX_NS_LVL_CTRL_2 +284 0x0019 //TX_NS_LVL_CTRL_3 +285 0x001A //TX_NS_LVL_CTRL_4 +286 0x001E //TX_NS_LVL_CTRL_5 +287 0x001C //TX_NS_LVL_CTRL_6 288 0x001C //TX_NS_LVL_CTRL_7 289 0x000E //TX_MIN_GAIN_S_0 -290 0x0018 //TX_MIN_GAIN_S_1 +290 0x0012 //TX_MIN_GAIN_S_1 291 0x0012 //TX_MIN_GAIN_S_2 292 0x0012 //TX_MIN_GAIN_S_3 -293 0x0012 //TX_MIN_GAIN_S_4 +293 0x0018 //TX_MIN_GAIN_S_4 294 0x0018 //TX_MIN_GAIN_S_5 295 0x0018 //TX_MIN_GAIN_S_6 296 0x0018 //TX_MIN_GAIN_S_7 @@ -7320,8 +10989,8 @@ 298 0x0000 //TX_NS_MAX_PRI_SNR_TH 299 0x0000 //TX_NMOS_SUP_MENSA 300 0x7FFF //TX_SNRI_SUP_0 -301 0x4000 //TX_SNRI_SUP_1 -302 0x5000 //TX_SNRI_SUP_2 +301 0x5000 //TX_SNRI_SUP_1 +302 0x4000 //TX_SNRI_SUP_2 303 0x4000 //TX_SNRI_SUP_3 304 0x4000 //TX_SNRI_SUP_4 305 0x4000 //TX_SNRI_SUP_5 @@ -7334,28 +11003,28 @@ 312 0x7FFF //TX_A_POST_FILT_0 313 0x2000 //TX_A_POST_FILT_1 314 0x7000 //TX_A_POST_FILT_S_0 -315 0x7000 //TX_A_POST_FILT_S_1 +315 0x3000 //TX_A_POST_FILT_S_1 316 0x3000 //TX_A_POST_FILT_S_2 -317 0x3000 //TX_A_POST_FILT_S_3 -318 0x2000 //TX_A_POST_FILT_S_4 +317 0x2000 //TX_A_POST_FILT_S_3 +318 0x7000 //TX_A_POST_FILT_S_4 319 0x7000 //TX_A_POST_FILT_S_5 320 0x7000 //TX_A_POST_FILT_S_6 321 0x7000 //TX_A_POST_FILT_S_7 322 0x1000 //TX_B_POST_FILT_0 323 0x4000 //TX_B_POST_FILT_1 -324 0x5000 //TX_B_POST_FILT_2 +324 0x4000 //TX_B_POST_FILT_2 325 0x4000 //TX_B_POST_FILT_3 326 0x4000 //TX_B_POST_FILT_4 327 0x4000 //TX_B_POST_FILT_5 -328 0x4000 //TX_B_POST_FILT_6 +328 0x5000 //TX_B_POST_FILT_6 329 0x4000 //TX_B_POST_FILT_7 330 0x4000 //TX_B_LESSCUT_RTO_S_0 331 0x6000 //TX_B_LESSCUT_RTO_S_1 332 0x6000 //TX_B_LESSCUT_RTO_S_2 333 0x6000 //TX_B_LESSCUT_RTO_S_3 -334 0x6000 //TX_B_LESSCUT_RTO_S_4 +334 0x7FFF //TX_B_LESSCUT_RTO_S_4 335 0x6000 //TX_B_LESSCUT_RTO_S_5 -336 0x7FFF //TX_B_LESSCUT_RTO_S_6 +336 0x6000 //TX_B_LESSCUT_RTO_S_6 337 0x7FFF //TX_B_LESSCUT_RTO_S_7 338 0x7C29 //TX_LAMBDA_PFILT 339 0x7C29 //TX_LAMBDA_PFILT_S_0 @@ -7399,10 +11068,10 @@ 377 0x4E20 //TX_NOISE_TH_5_4 378 0x21E8 //TX_NOISE_TH_6 379 0x0014 //TX_MINENOISE_TH -380 0x4000 //TX_MINENOISE_MIC0_TH_MTS -381 0xFFEE //TX_MINENOISE_MIC0_TH_EXP -382 0x6000 //TX_MINENOISE_MIC0_S_TH_MTS -383 0xFFF3 //TX_MINENOISE_MIC0_S_TH_EXP +380 0xD508 //TX_MORENS_TFMASK_TH +381 0x0001 //TX_DRC_QUIET_FLOOR +382 0x6D60 //TX_RATIODTL_CUT_TH +383 0x0DAC //TX_DT_CUT_K1 384 0x00A5 //TX_OUT_ENER_S_TH_CLEAN 385 0x00A5 //TX_OUT_ENER_S_TH_LESSCLEAN 386 0x00A5 //TX_OUT_ENER_S_TH_NOISY @@ -7410,15 +11079,15 @@ 388 0x00CE //TX_OUT_ENER_TH_SPEECH 389 0x2000 //TX_SN_NPB_GAIN 390 0x0000 //TX_NN_NPB_GAIN -391 0x0000 //TX_CSX_ALPHA_0 -392 0x0000 //TX_CSX_ALPHA_1 -393 0x0000 //TX_CSX_ALPHA_2 -394 0x0000 //TX_CSX_ALPHA_3 -395 0x0800 //TX_MU_ARSP_EST -396 0x00C8 //TX_P_OUTBEAM_MIN_TH +391 0x3000 //TX_POST_MASK_SUP_HSNE +392 0x07D0 //TX_TAIL_DET_TH +393 0x4000 //TX_B_LESSCUT_RTO_WTA +394 0x0000 //TX_MEL_G_R +395 0x0080 //TX_SUPHIGH_TH +396 0x4000 //TX_MASK_G_R 397 0x0002 //TX_EXTRA_NS_L -398 0x0800 //TX_EXTRA_NS_A -399 0x0005 //TX_VR_NOISE_FLOOR_TH +398 0x1800 //TX_C_POST_FLT_MASK +399 0x7FFF //TX_A_POST_FLT_WNS 400 0x0148 //TX_MIN_G_LOW300HZ 401 0x0004 //TX_MAXLEVEL_CNG 402 0x00B4 //TX_STN_NOISE_TH @@ -7533,16 +11202,16 @@ 511 0x6666 //TX_MIC_TO_BFGAIN 512 0x0000 //TX_MICTOBFGAIN0 513 0x0000 //TX_FASTMUE_TH -514 0x0000 //TX_DERVB_LEN_0 -515 0x0000 //TX_DERVB_LEN_1 -516 0x0000 //TX_RHO_DERVB -517 0x0000 //TX_MIC_INDX_DERVB -518 0x0000 //TX_MU_DERVB -519 0x0000 //TX_DR_RESRV_0 -520 0x0000 //TX_DR_RESRV_1 -521 0x0000 //TX_DR_RESRV_2 -522 0x0000 //TX_DR_RESRV_3 -523 0x0000 //TX_DR_RESRV_4 +514 0x3000 //TX_DEREVERB_LF_MU +515 0x34CD //TX_DEREVERB_HF_MU +516 0x0007 //TX_DEREVERB_DELAY +517 0x0004 //TX_DEREVERB_COEF_LEN +518 0x0003 //TX_DEREVERB_DNR +519 0x0000 //TX_DEREVERB_ALPHA +520 0x0000 //TX_DEREVERB_BETA +521 0x0000 //TX_GSC_RTOL_TH +522 0x0000 //TX_GSC_RTOH_TH +523 0x7E2C //TX_WIDE2_MEANHTH 524 0x0000 //TX_DR_RESRV_5 525 0x0000 //TX_DR_RESRV_6 526 0x0000 //TX_DR_RESRV_7 @@ -7643,12 +11312,12 @@ 621 0x4848 //TX_PREEQ_GAIN_MIC0_4 622 0x4848 //TX_PREEQ_GAIN_MIC0_5 623 0x4848 //TX_PREEQ_GAIN_MIC0_6 -624 0x4846 //TX_PREEQ_GAIN_MIC0_7 -625 0x4544 //TX_PREEQ_GAIN_MIC0_8 -626 0x4241 //TX_PREEQ_GAIN_MIC0_9 -627 0x403E //TX_PREEQ_GAIN_MIC0_10 -628 0x3D3C //TX_PREEQ_GAIN_MIC0_11 -629 0x3C3C //TX_PREEQ_GAIN_MIC0_12 +624 0x4848 //TX_PREEQ_GAIN_MIC0_7 +625 0x4848 //TX_PREEQ_GAIN_MIC0_8 +626 0x4848 //TX_PREEQ_GAIN_MIC0_9 +627 0x4848 //TX_PREEQ_GAIN_MIC0_10 +628 0x4848 //TX_PREEQ_GAIN_MIC0_11 +629 0x4848 //TX_PREEQ_GAIN_MIC0_12 630 0x4848 //TX_PREEQ_GAIN_MIC0_13 631 0x4848 //TX_PREEQ_GAIN_MIC0_14 632 0x4848 //TX_PREEQ_GAIN_MIC0_15 @@ -7693,11 +11362,11 @@ 671 0x4848 //TX_PREEQ_GAIN_MIC1_5 672 0x4848 //TX_PREEQ_GAIN_MIC1_6 673 0x4848 //TX_PREEQ_GAIN_MIC1_7 -674 0x484A //TX_PREEQ_GAIN_MIC1_8 -675 0x4B4C //TX_PREEQ_GAIN_MIC1_9 +674 0x4848 //TX_PREEQ_GAIN_MIC1_8 +675 0x4A4B //TX_PREEQ_GAIN_MIC1_9 676 0x4B4A //TX_PREEQ_GAIN_MIC1_10 -677 0x4A48 //TX_PREEQ_GAIN_MIC1_11 -678 0x4C4C //TX_PREEQ_GAIN_MIC1_12 +677 0x4848 //TX_PREEQ_GAIN_MIC1_11 +678 0x494C //TX_PREEQ_GAIN_MIC1_12 679 0x4C4C //TX_PREEQ_GAIN_MIC1_13 680 0x4848 //TX_PREEQ_GAIN_MIC1_14 681 0x4848 //TX_PREEQ_GAIN_MIC1_15 @@ -7916,8 +11585,73 @@ 894 0xC000 //TX_FASTNS_SSA_THHFL 895 0xCCCC //TX_FASTNS_SSA_THLFH 896 0xD999 //TX_FASTNS_SSA_THHFH +897 0x2339 //TX_SENDFUNC_REG_MICMUTE +898 0x0021 //TX_SENDFUNC_REG_MICMUTE1 +899 0x02BC //TX_MICMUTE_RATIO_THR +900 0x0140 //TX_MICMUTE_AMP_THR +901 0x0004 //TX_MICMUTE_HPF_IND +902 0x00C0 //TX_MICMUTE_LOG_EYR_TH +903 0x0008 //TX_MICMUTE_CVG_TIME +904 0x0008 //TX_MICMUTE_RELEASE_TIME +905 0x01FE //TX_MIC_VOLUME_MIC0MUTE +906 0x0020 //TX_MICMUTE_EPD_OFFSET_0 +907 0x001E //TX_MICMUTE_FRQ_AEC_L +908 0x7999 //TX_MICMUTE_EAD_THR +909 0x7FFF //TX_MICMUTE_LAMBDA_CB_NLE +910 0x7FFF //TX_MICMUTE_LAMBDA_RE_EST +911 0x4000 //TX_DTD_THR1_MICMUTE_0 +912 0x7000 //TX_DTD_THR1_MICMUTE_1 +913 0x7FFF //TX_DTD_THR1_MICMUTE_2 +914 0x7FFF //TX_DTD_THR1_MICMUTE_3 +915 0x6CCC //TX_DTD_THR2_MICMUTE_0 +916 0x0400 //TX_MICMUTE_MIN_EQ_RE_EST_0 +917 0x0400 //TX_MICMUTE_MIN_EQ_RE_EST_1 +918 0x1000 //TX_MICMUTE_MIN_EQ_RE_EST_2 +919 0x7FFF //TX_MICMUTE_MIN_EQ_RE_EST_3 +920 0x7FFF //TX_MICMUTE_MIN_EQ_RE_EST_4 +921 0x4000 //TX_MICMUTE_C_POST_FLT +922 0x03E8 //TX_MICMUTE_DT_CUT_K +923 0x0001 //TX_MICMUTE_DT_CUT_THR +924 0x03E8 //TX_MICMUTE_DT_CUT_K2 +925 0x0001 //TX_MICMUTE_DT_CUT_THR2 +926 0x0064 //TX_MICMUTE_DT2_HOLD_N +927 0x1000 //TX_MICMUTE_RATIODTH_THCUT +928 0x1000 //TX_MICMUTE_B_POST_FLT_ECHOL +929 0x7FFF //TX_MICMUTE_B_POST_FLT_ECHOH +930 0x0400 //TX_MICMUTE_C_POST_FLT_MASK +931 0x7999 //TX_MICMUTE_RATIODTL_CUT_TH +932 0x0258 //TX_MICMUTE_DT_CUT_K1 +933 0x0800 //TX_MICMUTE_N2_SN_EST +934 0xFC00 //TX_MICMUTE_THR_SN_EST_0 +935 0x001C //TX_MICMUTE_MIN_G_CTRL_0 +936 0x6000 //TX_MICMUTE_A_POST_FILT_S_0 +937 0x7000 //TX_MICMUTE_B_POST_FILT_0 +938 0x2710 //TX_MIC1RUB_AMP_THR +939 0x0010 //TX_MIC1MUTE_RATIO_THR +940 0x0450 //TX_MIC1MUTE_AMP_THR +941 0x0008 //TX_MIC1MUTE_CVG_TIME +942 0x0008 //TX_MIC1MUTE_RELEASE_TIME +943 0x0000 //TX_AMS_RESRV_01 +944 0x0000 //TX_AMS_RESRV_02 +945 0x0000 //TX_AMS_RESRV_03 +946 0x0000 //TX_AMS_RESRV_04 +947 0x0000 //TX_AMS_RESRV_05 +948 0x0000 //TX_AMS_RESRV_06 +949 0x0000 //TX_AMS_RESRV_07 +950 0x0000 //TX_AMS_RESRV_08 +951 0x0000 //TX_AMS_RESRV_09 +952 0x0000 //TX_AMS_RESRV_10 +953 0x0000 //TX_AMS_RESRV_11 +954 0x0000 //TX_AMS_RESRV_12 +955 0x0000 //TX_AMS_RESRV_13 +956 0x0000 //TX_AMS_RESRV_14 +957 0x0000 //TX_AMS_RESRV_15 +958 0x0000 //TX_AMS_RESRV_16 +959 0x0000 //TX_AMS_RESRV_17 +960 0x0000 //TX_AMS_RESRV_18 +961 0x0000 //TX_AMS_RESRV_19 #RX -0 0x003C //RX_RECVFUNC_MODE_0 +0 0x203C //RX_RECVFUNC_MODE_0 1 0x0000 //RX_RECVFUNC_MODE_1 2 0x0001 //RX_SAMPLINGFREQ_SIG 3 0x0001 //RX_SAMPLINGFREQ_PROC @@ -7927,7 +11661,7 @@ 7 0x1000 //RX_TDDRC_ALPHA_UP_2 8 0x1000 //RX_TDDRC_ALPHA_UP_3 9 0x1000 //RX_TDDRC_ALPHA_UP_4 -10 0x0600 //RX_PGA +10 0x0480 //RX_PGA 11 0x7FFF //RX_A_HP 12 0x4000 //RX_B_PE 13 0x7800 //RX_THR_PITCH_DET_0 @@ -7956,19 +11690,19 @@ 36 0x1000 //RX_LMT_THRD 37 0x7FDF //RX_LMT_ALPHA 38 0x001C //RX_FDEQ_SUBNUM -39 0x4840 //RX_FDEQ_GAIN_0 -40 0x4040 //RX_FDEQ_GAIN_1 -41 0x485C //RX_FDEQ_GAIN_2 -42 0x6873 //RX_FDEQ_GAIN_3 -43 0x7F8E //RX_FDEQ_GAIN_4 -44 0x847E //RX_FDEQ_GAIN_5 -45 0x7E80 //RX_FDEQ_GAIN_6 -46 0x8884 //RX_FDEQ_GAIN_7 -47 0x8890 //RX_FDEQ_GAIN_8 -48 0x8E8F //RX_FDEQ_GAIN_9 -49 0x8B77 //RX_FDEQ_GAIN_10 -50 0x6F7F //RX_FDEQ_GAIN_11 -51 0x6568 //RX_FDEQ_GAIN_12 +39 0x4836 //RX_FDEQ_GAIN_0 +40 0x3636 //RX_FDEQ_GAIN_1 +41 0x364C //RX_FDEQ_GAIN_2 +42 0x586E //RX_FDEQ_GAIN_3 +43 0x767A //RX_FDEQ_GAIN_4 +44 0x7978 //RX_FDEQ_GAIN_5 +45 0x7A7C //RX_FDEQ_GAIN_6 +46 0x8280 //RX_FDEQ_GAIN_7 +47 0x848C //RX_FDEQ_GAIN_8 +48 0x8E98 //RX_FDEQ_GAIN_9 +49 0x9E95 //RX_FDEQ_GAIN_10 +50 0x8686 //RX_FDEQ_GAIN_11 +51 0x7868 //RX_FDEQ_GAIN_12 52 0x6050 //RX_FDEQ_GAIN_13 53 0x4848 //RX_FDEQ_GAIN_14 54 0x4848 //RX_FDEQ_GAIN_15 @@ -7991,9 +11725,9 @@ 71 0x0B0C //RX_FDEQ_BIN_8 72 0x0D0E //RX_FDEQ_BIN_9 73 0x0E0F //RX_FDEQ_BIN_10 -74 0x0F10 //RX_FDEQ_BIN_11 -75 0x1011 //RX_FDEQ_BIN_12 -76 0x1104 //RX_FDEQ_BIN_13 +74 0x0F0E //RX_FDEQ_BIN_11 +75 0x100D //RX_FDEQ_BIN_12 +76 0x110A //RX_FDEQ_BIN_13 77 0x0000 //RX_FDEQ_BIN_14 78 0x0000 //RX_FDEQ_BIN_15 79 0x0000 //RX_FDEQ_BIN_16 @@ -8033,20 +11767,20 @@ 113 0x0000 //RX_TDDRC_THRD_1 114 0x1800 //RX_TDDRC_THRD_2 115 0x1800 //RX_TDDRC_THRD_3 -116 0x3000 //RX_TDDRC_SLANT_0 -117 0x6E00 //RX_TDDRC_SLANT_1 +116 0x7FFF //RX_TDDRC_SLANT_0 +117 0x7FFF //RX_TDDRC_SLANT_1 118 0x1000 //RX_TDDRC_ALPHA_UP_0 119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 120 0x0000 //RX_TDDRC_HMNC_FLAG 121 0x199A //RX_TDDRC_HMNC_GAIN 122 0x0001 //RX_TDDRC_SMT_FLAG 123 0x0CCD //RX_TDDRC_SMT_W -124 0x0407 //RX_TDDRC_DRC_GAIN +124 0x0650 //RX_TDDRC_DRC_GAIN 125 0x7C00 //RX_LAMBDA_PKA_FP 126 0x13E0 //RX_TPKA_FP 127 0x0080 //RX_MIN_G_FP 128 0x2000 //RX_MAX_G_FP -129 0x000C //RX_SPK_VOL +129 0x0100 //RX_SPK_VOL 130 0x0000 //RX_VOL_RESRV_0 131 0x0000 //RX_MAXLEVEL_CNG 132 0x3000 //RX_BWE_UV_TH @@ -8089,29 +11823,29 @@ 113 0x0000 //RX_TDDRC_THRD_1 114 0x1800 //RX_TDDRC_THRD_2 115 0x1800 //RX_TDDRC_THRD_3 -116 0x3000 //RX_TDDRC_SLANT_0 -117 0x6E00 //RX_TDDRC_SLANT_1 +116 0x7FFF //RX_TDDRC_SLANT_0 +117 0x7FFF //RX_TDDRC_SLANT_1 118 0x1000 //RX_TDDRC_ALPHA_UP_0 119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 120 0x0000 //RX_TDDRC_HMNC_FLAG 121 0x199A //RX_TDDRC_HMNC_GAIN 122 0x0001 //RX_TDDRC_SMT_FLAG 123 0x0CCD //RX_TDDRC_SMT_W -124 0x0407 //RX_TDDRC_DRC_GAIN +124 0x0650 //RX_TDDRC_DRC_GAIN 38 0x001C //RX_FDEQ_SUBNUM -39 0x4840 //RX_FDEQ_GAIN_0 -40 0x4040 //RX_FDEQ_GAIN_1 -41 0x485C //RX_FDEQ_GAIN_2 -42 0x6873 //RX_FDEQ_GAIN_3 -43 0x7F8E //RX_FDEQ_GAIN_4 -44 0x847E //RX_FDEQ_GAIN_5 -45 0x7E80 //RX_FDEQ_GAIN_6 -46 0x8884 //RX_FDEQ_GAIN_7 -47 0x8890 //RX_FDEQ_GAIN_8 -48 0x8E8F //RX_FDEQ_GAIN_9 -49 0x8B77 //RX_FDEQ_GAIN_10 -50 0x6F7F //RX_FDEQ_GAIN_11 -51 0x6568 //RX_FDEQ_GAIN_12 +39 0x4836 //RX_FDEQ_GAIN_0 +40 0x3636 //RX_FDEQ_GAIN_1 +41 0x364C //RX_FDEQ_GAIN_2 +42 0x586E //RX_FDEQ_GAIN_3 +43 0x767A //RX_FDEQ_GAIN_4 +44 0x7978 //RX_FDEQ_GAIN_5 +45 0x7A7C //RX_FDEQ_GAIN_6 +46 0x8280 //RX_FDEQ_GAIN_7 +47 0x848C //RX_FDEQ_GAIN_8 +48 0x8E98 //RX_FDEQ_GAIN_9 +49 0x9E95 //RX_FDEQ_GAIN_10 +50 0x8686 //RX_FDEQ_GAIN_11 +51 0x7868 //RX_FDEQ_GAIN_12 52 0x6050 //RX_FDEQ_GAIN_13 53 0x4848 //RX_FDEQ_GAIN_14 54 0x4848 //RX_FDEQ_GAIN_15 @@ -8134,9 +11868,9 @@ 71 0x0B0C //RX_FDEQ_BIN_8 72 0x0D0E //RX_FDEQ_BIN_9 73 0x0E0F //RX_FDEQ_BIN_10 -74 0x0F10 //RX_FDEQ_BIN_11 -75 0x1011 //RX_FDEQ_BIN_12 -76 0x1104 //RX_FDEQ_BIN_13 +74 0x0F0E //RX_FDEQ_BIN_11 +75 0x100D //RX_FDEQ_BIN_12 +76 0x110A //RX_FDEQ_BIN_13 77 0x0000 //RX_FDEQ_BIN_14 78 0x0000 //RX_FDEQ_BIN_15 79 0x0000 //RX_FDEQ_BIN_16 @@ -8171,7 +11905,7 @@ 108 0x5333 //RX_FDDRC_SLANT_1_2 109 0x5333 //RX_FDDRC_SLANT_1_3 110 0x0000 //RX_FDDRC_RESRV_0 -129 0x000C //RX_SPK_VOL +129 0x000B //RX_SPK_VOL 130 0x0000 //RX_VOL_RESRV_0 #VOL 1 6 0x1000 //RX_TDDRC_ALPHA_UP_1 @@ -8188,29 +11922,29 @@ 113 0x0000 //RX_TDDRC_THRD_1 114 0x1800 //RX_TDDRC_THRD_2 115 0x1800 //RX_TDDRC_THRD_3 -116 0x3000 //RX_TDDRC_SLANT_0 -117 0x6E00 //RX_TDDRC_SLANT_1 +116 0x7FFF //RX_TDDRC_SLANT_0 +117 0x7FFF //RX_TDDRC_SLANT_1 118 0x1000 //RX_TDDRC_ALPHA_UP_0 119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 120 0x0000 //RX_TDDRC_HMNC_FLAG 121 0x199A //RX_TDDRC_HMNC_GAIN 122 0x0001 //RX_TDDRC_SMT_FLAG 123 0x0CCD //RX_TDDRC_SMT_W -124 0x0407 //RX_TDDRC_DRC_GAIN +124 0x0650 //RX_TDDRC_DRC_GAIN 38 0x001C //RX_FDEQ_SUBNUM -39 0x4840 //RX_FDEQ_GAIN_0 -40 0x4040 //RX_FDEQ_GAIN_1 -41 0x485C //RX_FDEQ_GAIN_2 -42 0x6873 //RX_FDEQ_GAIN_3 -43 0x7F8E //RX_FDEQ_GAIN_4 -44 0x847E //RX_FDEQ_GAIN_5 -45 0x7E80 //RX_FDEQ_GAIN_6 -46 0x8884 //RX_FDEQ_GAIN_7 -47 0x8890 //RX_FDEQ_GAIN_8 -48 0x8E8F //RX_FDEQ_GAIN_9 -49 0x8B77 //RX_FDEQ_GAIN_10 -50 0x6F7F //RX_FDEQ_GAIN_11 -51 0x6568 //RX_FDEQ_GAIN_12 +39 0x4836 //RX_FDEQ_GAIN_0 +40 0x3636 //RX_FDEQ_GAIN_1 +41 0x364C //RX_FDEQ_GAIN_2 +42 0x586E //RX_FDEQ_GAIN_3 +43 0x767A //RX_FDEQ_GAIN_4 +44 0x7978 //RX_FDEQ_GAIN_5 +45 0x7A7C //RX_FDEQ_GAIN_6 +46 0x8280 //RX_FDEQ_GAIN_7 +47 0x848C //RX_FDEQ_GAIN_8 +48 0x8E98 //RX_FDEQ_GAIN_9 +49 0x9E95 //RX_FDEQ_GAIN_10 +50 0x8686 //RX_FDEQ_GAIN_11 +51 0x7868 //RX_FDEQ_GAIN_12 52 0x6050 //RX_FDEQ_GAIN_13 53 0x4848 //RX_FDEQ_GAIN_14 54 0x4848 //RX_FDEQ_GAIN_15 @@ -8233,9 +11967,9 @@ 71 0x0B0C //RX_FDEQ_BIN_8 72 0x0D0E //RX_FDEQ_BIN_9 73 0x0E0F //RX_FDEQ_BIN_10 -74 0x0F10 //RX_FDEQ_BIN_11 -75 0x1011 //RX_FDEQ_BIN_12 -76 0x1104 //RX_FDEQ_BIN_13 +74 0x0F0E //RX_FDEQ_BIN_11 +75 0x100D //RX_FDEQ_BIN_12 +76 0x110A //RX_FDEQ_BIN_13 77 0x0000 //RX_FDEQ_BIN_14 78 0x0000 //RX_FDEQ_BIN_15 79 0x0000 //RX_FDEQ_BIN_16 @@ -8270,7 +12004,7 @@ 108 0x5333 //RX_FDDRC_SLANT_1_2 109 0x5333 //RX_FDDRC_SLANT_1_3 110 0x0000 //RX_FDDRC_RESRV_0 -129 0x0014 //RX_SPK_VOL +129 0x0012 //RX_SPK_VOL 130 0x0000 //RX_VOL_RESRV_0 #VOL 2 6 0x1000 //RX_TDDRC_ALPHA_UP_1 @@ -8287,29 +12021,29 @@ 113 0x0000 //RX_TDDRC_THRD_1 114 0x1800 //RX_TDDRC_THRD_2 115 0x1800 //RX_TDDRC_THRD_3 -116 0x3000 //RX_TDDRC_SLANT_0 -117 0x6E00 //RX_TDDRC_SLANT_1 +116 0x7FFF //RX_TDDRC_SLANT_0 +117 0x7FFF //RX_TDDRC_SLANT_1 118 0x1000 //RX_TDDRC_ALPHA_UP_0 119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 120 0x0000 //RX_TDDRC_HMNC_FLAG 121 0x199A //RX_TDDRC_HMNC_GAIN 122 0x0001 //RX_TDDRC_SMT_FLAG 123 0x0CCD //RX_TDDRC_SMT_W -124 0x0407 //RX_TDDRC_DRC_GAIN +124 0x0650 //RX_TDDRC_DRC_GAIN 38 0x001C //RX_FDEQ_SUBNUM -39 0x4840 //RX_FDEQ_GAIN_0 -40 0x4040 //RX_FDEQ_GAIN_1 -41 0x485C //RX_FDEQ_GAIN_2 -42 0x6873 //RX_FDEQ_GAIN_3 -43 0x7F8E //RX_FDEQ_GAIN_4 -44 0x847E //RX_FDEQ_GAIN_5 -45 0x7E80 //RX_FDEQ_GAIN_6 -46 0x8884 //RX_FDEQ_GAIN_7 -47 0x8890 //RX_FDEQ_GAIN_8 -48 0x8E8F //RX_FDEQ_GAIN_9 -49 0x8B77 //RX_FDEQ_GAIN_10 -50 0x6F7F //RX_FDEQ_GAIN_11 -51 0x6568 //RX_FDEQ_GAIN_12 +39 0x4836 //RX_FDEQ_GAIN_0 +40 0x3636 //RX_FDEQ_GAIN_1 +41 0x364C //RX_FDEQ_GAIN_2 +42 0x586E //RX_FDEQ_GAIN_3 +43 0x767A //RX_FDEQ_GAIN_4 +44 0x7978 //RX_FDEQ_GAIN_5 +45 0x7A7C //RX_FDEQ_GAIN_6 +46 0x8280 //RX_FDEQ_GAIN_7 +47 0x848C //RX_FDEQ_GAIN_8 +48 0x8E98 //RX_FDEQ_GAIN_9 +49 0x9E95 //RX_FDEQ_GAIN_10 +50 0x8686 //RX_FDEQ_GAIN_11 +51 0x7868 //RX_FDEQ_GAIN_12 52 0x6050 //RX_FDEQ_GAIN_13 53 0x4848 //RX_FDEQ_GAIN_14 54 0x4848 //RX_FDEQ_GAIN_15 @@ -8332,9 +12066,9 @@ 71 0x0B0C //RX_FDEQ_BIN_8 72 0x0D0E //RX_FDEQ_BIN_9 73 0x0E0F //RX_FDEQ_BIN_10 -74 0x0F10 //RX_FDEQ_BIN_11 -75 0x1011 //RX_FDEQ_BIN_12 -76 0x1104 //RX_FDEQ_BIN_13 +74 0x0F0E //RX_FDEQ_BIN_11 +75 0x100D //RX_FDEQ_BIN_12 +76 0x110A //RX_FDEQ_BIN_13 77 0x0000 //RX_FDEQ_BIN_14 78 0x0000 //RX_FDEQ_BIN_15 79 0x0000 //RX_FDEQ_BIN_16 @@ -8369,7 +12103,7 @@ 108 0x5333 //RX_FDDRC_SLANT_1_2 109 0x5333 //RX_FDDRC_SLANT_1_3 110 0x0000 //RX_FDDRC_RESRV_0 -129 0x0020 //RX_SPK_VOL +129 0x001E //RX_SPK_VOL 130 0x0000 //RX_VOL_RESRV_0 #VOL 3 6 0x1000 //RX_TDDRC_ALPHA_UP_1 @@ -8386,29 +12120,29 @@ 113 0x0000 //RX_TDDRC_THRD_1 114 0x1800 //RX_TDDRC_THRD_2 115 0x1800 //RX_TDDRC_THRD_3 -116 0x3000 //RX_TDDRC_SLANT_0 -117 0x6E00 //RX_TDDRC_SLANT_1 +116 0x7FFF //RX_TDDRC_SLANT_0 +117 0x7FFF //RX_TDDRC_SLANT_1 118 0x1000 //RX_TDDRC_ALPHA_UP_0 119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 120 0x0000 //RX_TDDRC_HMNC_FLAG 121 0x199A //RX_TDDRC_HMNC_GAIN 122 0x0001 //RX_TDDRC_SMT_FLAG 123 0x0CCD //RX_TDDRC_SMT_W -124 0x0407 //RX_TDDRC_DRC_GAIN +124 0x0650 //RX_TDDRC_DRC_GAIN 38 0x001C //RX_FDEQ_SUBNUM -39 0x4840 //RX_FDEQ_GAIN_0 -40 0x4040 //RX_FDEQ_GAIN_1 -41 0x485C //RX_FDEQ_GAIN_2 -42 0x6873 //RX_FDEQ_GAIN_3 -43 0x7F8E //RX_FDEQ_GAIN_4 -44 0x847E //RX_FDEQ_GAIN_5 -45 0x7E80 //RX_FDEQ_GAIN_6 -46 0x8884 //RX_FDEQ_GAIN_7 -47 0x8890 //RX_FDEQ_GAIN_8 -48 0x8E8F //RX_FDEQ_GAIN_9 -49 0x8B77 //RX_FDEQ_GAIN_10 -50 0x6F7F //RX_FDEQ_GAIN_11 -51 0x6568 //RX_FDEQ_GAIN_12 +39 0x4836 //RX_FDEQ_GAIN_0 +40 0x3636 //RX_FDEQ_GAIN_1 +41 0x364C //RX_FDEQ_GAIN_2 +42 0x586E //RX_FDEQ_GAIN_3 +43 0x767A //RX_FDEQ_GAIN_4 +44 0x7978 //RX_FDEQ_GAIN_5 +45 0x7A7C //RX_FDEQ_GAIN_6 +46 0x8280 //RX_FDEQ_GAIN_7 +47 0x848C //RX_FDEQ_GAIN_8 +48 0x8E98 //RX_FDEQ_GAIN_9 +49 0x9E95 //RX_FDEQ_GAIN_10 +50 0x8686 //RX_FDEQ_GAIN_11 +51 0x7868 //RX_FDEQ_GAIN_12 52 0x6050 //RX_FDEQ_GAIN_13 53 0x4848 //RX_FDEQ_GAIN_14 54 0x4848 //RX_FDEQ_GAIN_15 @@ -8431,9 +12165,9 @@ 71 0x0B0C //RX_FDEQ_BIN_8 72 0x0D0E //RX_FDEQ_BIN_9 73 0x0E0F //RX_FDEQ_BIN_10 -74 0x0F10 //RX_FDEQ_BIN_11 -75 0x1011 //RX_FDEQ_BIN_12 -76 0x1104 //RX_FDEQ_BIN_13 +74 0x0F0E //RX_FDEQ_BIN_11 +75 0x100D //RX_FDEQ_BIN_12 +76 0x110A //RX_FDEQ_BIN_13 77 0x0000 //RX_FDEQ_BIN_14 78 0x0000 //RX_FDEQ_BIN_15 79 0x0000 //RX_FDEQ_BIN_16 @@ -8468,7 +12202,7 @@ 108 0x5333 //RX_FDDRC_SLANT_1_2 109 0x5333 //RX_FDDRC_SLANT_1_3 110 0x0000 //RX_FDDRC_RESRV_0 -129 0x0035 //RX_SPK_VOL +129 0x0026 //RX_SPK_VOL 130 0x0000 //RX_VOL_RESRV_0 #VOL 4 6 0x1000 //RX_TDDRC_ALPHA_UP_1 @@ -8485,29 +12219,29 @@ 113 0x0000 //RX_TDDRC_THRD_1 114 0x1800 //RX_TDDRC_THRD_2 115 0x1800 //RX_TDDRC_THRD_3 -116 0x3000 //RX_TDDRC_SLANT_0 -117 0x6E00 //RX_TDDRC_SLANT_1 +116 0x7FFF //RX_TDDRC_SLANT_0 +117 0x7FFF //RX_TDDRC_SLANT_1 118 0x1000 //RX_TDDRC_ALPHA_UP_0 119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 120 0x0000 //RX_TDDRC_HMNC_FLAG 121 0x199A //RX_TDDRC_HMNC_GAIN 122 0x0001 //RX_TDDRC_SMT_FLAG 123 0x0CCD //RX_TDDRC_SMT_W -124 0x0407 //RX_TDDRC_DRC_GAIN +124 0x0650 //RX_TDDRC_DRC_GAIN 38 0x001C //RX_FDEQ_SUBNUM -39 0x4840 //RX_FDEQ_GAIN_0 -40 0x4040 //RX_FDEQ_GAIN_1 -41 0x485C //RX_FDEQ_GAIN_2 -42 0x6873 //RX_FDEQ_GAIN_3 -43 0x7F8E //RX_FDEQ_GAIN_4 -44 0x847E //RX_FDEQ_GAIN_5 -45 0x7E80 //RX_FDEQ_GAIN_6 -46 0x8884 //RX_FDEQ_GAIN_7 -47 0x8890 //RX_FDEQ_GAIN_8 -48 0x8E8F //RX_FDEQ_GAIN_9 -49 0x8B77 //RX_FDEQ_GAIN_10 -50 0x6F7F //RX_FDEQ_GAIN_11 -51 0x6568 //RX_FDEQ_GAIN_12 +39 0x4836 //RX_FDEQ_GAIN_0 +40 0x3636 //RX_FDEQ_GAIN_1 +41 0x364C //RX_FDEQ_GAIN_2 +42 0x586E //RX_FDEQ_GAIN_3 +43 0x767A //RX_FDEQ_GAIN_4 +44 0x7978 //RX_FDEQ_GAIN_5 +45 0x7A7C //RX_FDEQ_GAIN_6 +46 0x8280 //RX_FDEQ_GAIN_7 +47 0x848C //RX_FDEQ_GAIN_8 +48 0x8E98 //RX_FDEQ_GAIN_9 +49 0x9E95 //RX_FDEQ_GAIN_10 +50 0x8686 //RX_FDEQ_GAIN_11 +51 0x7868 //RX_FDEQ_GAIN_12 52 0x6050 //RX_FDEQ_GAIN_13 53 0x4848 //RX_FDEQ_GAIN_14 54 0x4848 //RX_FDEQ_GAIN_15 @@ -8530,9 +12264,9 @@ 71 0x0B0C //RX_FDEQ_BIN_8 72 0x0D0E //RX_FDEQ_BIN_9 73 0x0E0F //RX_FDEQ_BIN_10 -74 0x0F10 //RX_FDEQ_BIN_11 -75 0x1011 //RX_FDEQ_BIN_12 -76 0x1104 //RX_FDEQ_BIN_13 +74 0x0F0E //RX_FDEQ_BIN_11 +75 0x100D //RX_FDEQ_BIN_12 +76 0x110A //RX_FDEQ_BIN_13 77 0x0000 //RX_FDEQ_BIN_14 78 0x0000 //RX_FDEQ_BIN_15 79 0x0000 //RX_FDEQ_BIN_16 @@ -8567,7 +12301,7 @@ 108 0x5333 //RX_FDDRC_SLANT_1_2 109 0x5333 //RX_FDDRC_SLANT_1_3 110 0x0000 //RX_FDDRC_RESRV_0 -129 0x0057 //RX_SPK_VOL +129 0x0050 //RX_SPK_VOL 130 0x0000 //RX_VOL_RESRV_0 #VOL 5 6 0x1000 //RX_TDDRC_ALPHA_UP_1 @@ -8584,29 +12318,29 @@ 113 0x0000 //RX_TDDRC_THRD_1 114 0x1800 //RX_TDDRC_THRD_2 115 0x1800 //RX_TDDRC_THRD_3 -116 0x3000 //RX_TDDRC_SLANT_0 -117 0x6E00 //RX_TDDRC_SLANT_1 +116 0x7FFF //RX_TDDRC_SLANT_0 +117 0x7FFF //RX_TDDRC_SLANT_1 118 0x1000 //RX_TDDRC_ALPHA_UP_0 119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 120 0x0000 //RX_TDDRC_HMNC_FLAG 121 0x199A //RX_TDDRC_HMNC_GAIN 122 0x0001 //RX_TDDRC_SMT_FLAG 123 0x0CCD //RX_TDDRC_SMT_W -124 0x0407 //RX_TDDRC_DRC_GAIN +124 0x0650 //RX_TDDRC_DRC_GAIN 38 0x001C //RX_FDEQ_SUBNUM -39 0x4840 //RX_FDEQ_GAIN_0 -40 0x4040 //RX_FDEQ_GAIN_1 -41 0x485C //RX_FDEQ_GAIN_2 -42 0x6873 //RX_FDEQ_GAIN_3 -43 0x7F8E //RX_FDEQ_GAIN_4 -44 0x847E //RX_FDEQ_GAIN_5 -45 0x7E80 //RX_FDEQ_GAIN_6 -46 0x8884 //RX_FDEQ_GAIN_7 -47 0x8890 //RX_FDEQ_GAIN_8 -48 0x8E8F //RX_FDEQ_GAIN_9 -49 0x8B77 //RX_FDEQ_GAIN_10 -50 0x6F7F //RX_FDEQ_GAIN_11 -51 0x6568 //RX_FDEQ_GAIN_12 +39 0x4836 //RX_FDEQ_GAIN_0 +40 0x3636 //RX_FDEQ_GAIN_1 +41 0x364C //RX_FDEQ_GAIN_2 +42 0x586E //RX_FDEQ_GAIN_3 +43 0x767A //RX_FDEQ_GAIN_4 +44 0x7978 //RX_FDEQ_GAIN_5 +45 0x7A7C //RX_FDEQ_GAIN_6 +46 0x8280 //RX_FDEQ_GAIN_7 +47 0x848C //RX_FDEQ_GAIN_8 +48 0x8E98 //RX_FDEQ_GAIN_9 +49 0x9E95 //RX_FDEQ_GAIN_10 +50 0x8686 //RX_FDEQ_GAIN_11 +51 0x7868 //RX_FDEQ_GAIN_12 52 0x6050 //RX_FDEQ_GAIN_13 53 0x4848 //RX_FDEQ_GAIN_14 54 0x4848 //RX_FDEQ_GAIN_15 @@ -8629,9 +12363,9 @@ 71 0x0B0C //RX_FDEQ_BIN_8 72 0x0D0E //RX_FDEQ_BIN_9 73 0x0E0F //RX_FDEQ_BIN_10 -74 0x0F10 //RX_FDEQ_BIN_11 -75 0x1011 //RX_FDEQ_BIN_12 -76 0x1104 //RX_FDEQ_BIN_13 +74 0x0F0E //RX_FDEQ_BIN_11 +75 0x100D //RX_FDEQ_BIN_12 +76 0x110A //RX_FDEQ_BIN_13 77 0x0000 //RX_FDEQ_BIN_14 78 0x0000 //RX_FDEQ_BIN_15 79 0x0000 //RX_FDEQ_BIN_16 @@ -8666,7 +12400,7 @@ 108 0x5333 //RX_FDDRC_SLANT_1_2 109 0x5333 //RX_FDDRC_SLANT_1_3 110 0x0000 //RX_FDDRC_RESRV_0 -129 0x008E //RX_SPK_VOL +129 0x0086 //RX_SPK_VOL 130 0x0000 //RX_VOL_RESRV_0 #VOL 6 6 0x1000 //RX_TDDRC_ALPHA_UP_1 @@ -8683,29 +12417,29 @@ 113 0x0000 //RX_TDDRC_THRD_1 114 0x1800 //RX_TDDRC_THRD_2 115 0x1800 //RX_TDDRC_THRD_3 -116 0x3000 //RX_TDDRC_SLANT_0 -117 0x6E00 //RX_TDDRC_SLANT_1 +116 0x7FFF //RX_TDDRC_SLANT_0 +117 0x7FFF //RX_TDDRC_SLANT_1 118 0x1000 //RX_TDDRC_ALPHA_UP_0 119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 120 0x0000 //RX_TDDRC_HMNC_FLAG 121 0x199A //RX_TDDRC_HMNC_GAIN 122 0x0001 //RX_TDDRC_SMT_FLAG 123 0x0CCD //RX_TDDRC_SMT_W -124 0x0407 //RX_TDDRC_DRC_GAIN +124 0x0650 //RX_TDDRC_DRC_GAIN 38 0x001C //RX_FDEQ_SUBNUM -39 0x4840 //RX_FDEQ_GAIN_0 -40 0x4040 //RX_FDEQ_GAIN_1 -41 0x485C //RX_FDEQ_GAIN_2 -42 0x6873 //RX_FDEQ_GAIN_3 -43 0x7F8E //RX_FDEQ_GAIN_4 -44 0x847E //RX_FDEQ_GAIN_5 -45 0x7E80 //RX_FDEQ_GAIN_6 -46 0x8884 //RX_FDEQ_GAIN_7 -47 0x8890 //RX_FDEQ_GAIN_8 -48 0x8E8F //RX_FDEQ_GAIN_9 -49 0x8B77 //RX_FDEQ_GAIN_10 -50 0x6F7F //RX_FDEQ_GAIN_11 -51 0x6568 //RX_FDEQ_GAIN_12 +39 0x4836 //RX_FDEQ_GAIN_0 +40 0x3636 //RX_FDEQ_GAIN_1 +41 0x364C //RX_FDEQ_GAIN_2 +42 0x586E //RX_FDEQ_GAIN_3 +43 0x767A //RX_FDEQ_GAIN_4 +44 0x7978 //RX_FDEQ_GAIN_5 +45 0x7A7C //RX_FDEQ_GAIN_6 +46 0x8280 //RX_FDEQ_GAIN_7 +47 0x848C //RX_FDEQ_GAIN_8 +48 0x8E98 //RX_FDEQ_GAIN_9 +49 0x9E95 //RX_FDEQ_GAIN_10 +50 0x8686 //RX_FDEQ_GAIN_11 +51 0x7868 //RX_FDEQ_GAIN_12 52 0x6050 //RX_FDEQ_GAIN_13 53 0x4848 //RX_FDEQ_GAIN_14 54 0x4848 //RX_FDEQ_GAIN_15 @@ -8728,9 +12462,9 @@ 71 0x0B0C //RX_FDEQ_BIN_8 72 0x0D0E //RX_FDEQ_BIN_9 73 0x0E0F //RX_FDEQ_BIN_10 -74 0x0F10 //RX_FDEQ_BIN_11 -75 0x1011 //RX_FDEQ_BIN_12 -76 0x1104 //RX_FDEQ_BIN_13 +74 0x0F0E //RX_FDEQ_BIN_11 +75 0x100D //RX_FDEQ_BIN_12 +76 0x110A //RX_FDEQ_BIN_13 77 0x0000 //RX_FDEQ_BIN_14 78 0x0000 //RX_FDEQ_BIN_15 79 0x0000 //RX_FDEQ_BIN_16 @@ -8767,14 +12501,866 @@ 110 0x0000 //RX_FDDRC_RESRV_0 129 0x0100 //RX_SPK_VOL 130 0x0000 //RX_VOL_RESRV_0 +#RX 2 +157 0x003C //RX_RECVFUNC_MODE_0 +158 0x0000 //RX_RECVFUNC_MODE_1 +159 0x0001 //RX_SAMPLINGFREQ_SIG +160 0x0001 //RX_SAMPLINGFREQ_PROC +161 0x000A //RX_FRAME_SZ +162 0x0000 //RX_DELAY_OPT +163 0x1000 //RX_TDDRC_ALPHA_UP_1 +164 0x1000 //RX_TDDRC_ALPHA_UP_2 +165 0x1000 //RX_TDDRC_ALPHA_UP_3 +166 0x1000 //RX_TDDRC_ALPHA_UP_4 +167 0x0600 //RX_PGA +168 0x7FFF //RX_A_HP +169 0x4000 //RX_B_PE +170 0x7800 //RX_THR_PITCH_DET_0 +171 0x7000 //RX_THR_PITCH_DET_1 +172 0x6000 //RX_THR_PITCH_DET_2 +173 0x0008 //RX_PITCH_BFR_LEN +174 0x0003 //RX_SBD_PITCH_DET +175 0x0100 //RX_PP_RESRV_0 +176 0x0020 //RX_PP_RESRV_1 +177 0x0400 //RX_N_SN_EST +178 0x000C //RX_N2_SN_EST +179 0x0014 //RX_NS_LVL_CTRL +180 0xF800 //RX_THR_SN_EST +181 0x7E00 //RX_LAMBDA_PFILT +182 0x000A //RX_FENS_RESRV_0 +183 0x0190 //RX_FENS_RESRV_1 +184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +187 0x0002 //RX_EXTRA_NS_L +188 0x0800 //RX_EXTRA_NS_A +189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +190 0x7000 //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +192 0x199A //RX_A_POST_FLT +193 0x1000 //RX_LMT_THRD +194 0x7FDF //RX_LMT_ALPHA +195 0x001C //RX_FDEQ_SUBNUM +196 0x4840 //RX_FDEQ_GAIN_0 +197 0x4040 //RX_FDEQ_GAIN_1 +198 0x485C //RX_FDEQ_GAIN_2 +199 0x6873 //RX_FDEQ_GAIN_3 +200 0x7F8E //RX_FDEQ_GAIN_4 +201 0x847E //RX_FDEQ_GAIN_5 +202 0x7E80 //RX_FDEQ_GAIN_6 +203 0x8884 //RX_FDEQ_GAIN_7 +204 0x8890 //RX_FDEQ_GAIN_8 +205 0x8E8F //RX_FDEQ_GAIN_9 +206 0x8B77 //RX_FDEQ_GAIN_10 +207 0x6F7F //RX_FDEQ_GAIN_11 +208 0x6568 //RX_FDEQ_GAIN_12 +209 0x6050 //RX_FDEQ_GAIN_13 +210 0x4848 //RX_FDEQ_GAIN_14 +211 0x4848 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0202 //RX_FDEQ_BIN_0 +221 0x0203 //RX_FDEQ_BIN_1 +222 0x0303 //RX_FDEQ_BIN_2 +223 0x0304 //RX_FDEQ_BIN_3 +224 0x0405 //RX_FDEQ_BIN_4 +225 0x0506 //RX_FDEQ_BIN_5 +226 0x0708 //RX_FDEQ_BIN_6 +227 0x090A //RX_FDEQ_BIN_7 +228 0x0B0C //RX_FDEQ_BIN_8 +229 0x0D0E //RX_FDEQ_BIN_9 +230 0x0E0F //RX_FDEQ_BIN_10 +231 0x0F10 //RX_FDEQ_BIN_11 +232 0x1011 //RX_FDEQ_BIN_12 +233 0x1104 //RX_FDEQ_BIN_13 +234 0x0000 //RX_FDEQ_BIN_14 +235 0x0000 //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x4000 //RX_FDEQ_RESRV_0 +245 0x0320 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0030 //RX_FDDRC_BAND_MARGIN_1 +248 0x0050 //RX_FDDRC_BAND_MARGIN_2 +249 0x0080 //RX_FDDRC_BAND_MARGIN_3 +250 0x0007 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x5000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x6400 //RX_FDDRC_THRD_3_2 +258 0x6400 //RX_FDDRC_THRD_3_3 +259 0x2000 //RX_FDDRC_SLANT_0_0 +260 0x2000 //RX_FDDRC_SLANT_0_1 +261 0x2000 //RX_FDDRC_SLANT_0_2 +262 0x2000 //RX_FDDRC_SLANT_0_3 +263 0x5333 //RX_FDDRC_SLANT_1_0 +264 0x5333 //RX_FDDRC_SLANT_1_1 +265 0x5333 //RX_FDDRC_SLANT_1_2 +266 0x5333 //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +268 0x0002 //RX_FILTINDX +269 0x0000 //RX_TDDRC_THRD_0 +270 0x0000 //RX_TDDRC_THRD_1 +271 0x1800 //RX_TDDRC_THRD_2 +272 0x1800 //RX_TDDRC_THRD_3 +273 0x3000 //RX_TDDRC_SLANT_0 +274 0x6E00 //RX_TDDRC_SLANT_1 +275 0x1000 //RX_TDDRC_ALPHA_UP_0 +276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x199A //RX_TDDRC_HMNC_GAIN +279 0x0001 //RX_TDDRC_SMT_FLAG +280 0x0CCD //RX_TDDRC_SMT_W +281 0x0407 //RX_TDDRC_DRC_GAIN +282 0x7C00 //RX_LAMBDA_PKA_FP +283 0x13E0 //RX_TPKA_FP +284 0x0080 //RX_MIN_G_FP +285 0x2000 //RX_MAX_G_FP +286 0x000C //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 +288 0x0000 //RX_MAXLEVEL_CNG +289 0x3000 //RX_BWE_UV_TH +290 0x3000 //RX_BWE_UV_TH2 +291 0x1800 //RX_BWE_UV_TH3 +292 0x1000 //RX_BWE_V_TH +293 0x04CD //RX_BWE_GAIN1_V_TH1 +294 0x0F33 //RX_BWE_GAIN1_V_TH2 +295 0x7333 //RX_BWE_UV_EQ +296 0x199A //RX_BWE_V_EQ +297 0x7333 //RX_BWE_TONE_TH +298 0x0004 //RX_BWE_UV_HOLD_T +299 0x6CCD //RX_BWE_GAIN2_ALPHA +300 0x799A //RX_BWE_GAIN3_ALPHA +301 0x001E //RX_BWE_CUTOFF +302 0x3000 //RX_BWE_GAINFILL +303 0x3200 //RX_BWE_MAXTH_TONE +304 0x2000 //RX_BWE_EQ_0 +305 0x2000 //RX_BWE_EQ_1 +306 0x2000 //RX_BWE_EQ_2 +307 0x2000 //RX_BWE_EQ_3 +308 0x2000 //RX_BWE_EQ_4 +309 0x2000 //RX_BWE_EQ_5 +310 0x2000 //RX_BWE_EQ_6 +311 0x0000 //RX_BWE_RESRV_0 +312 0x0000 //RX_BWE_RESRV_1 +313 0x0000 //RX_BWE_RESRV_2 +#VOL 0 +163 0x1000 //RX_TDDRC_ALPHA_UP_1 +164 0x1000 //RX_TDDRC_ALPHA_UP_2 +165 0x1000 //RX_TDDRC_ALPHA_UP_3 +166 0x1000 //RX_TDDRC_ALPHA_UP_4 +184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +190 0x7000 //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +269 0x0000 //RX_TDDRC_THRD_0 +270 0x0000 //RX_TDDRC_THRD_1 +271 0x1800 //RX_TDDRC_THRD_2 +272 0x1800 //RX_TDDRC_THRD_3 +273 0x3000 //RX_TDDRC_SLANT_0 +274 0x6E00 //RX_TDDRC_SLANT_1 +275 0x1000 //RX_TDDRC_ALPHA_UP_0 +276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x199A //RX_TDDRC_HMNC_GAIN +279 0x0001 //RX_TDDRC_SMT_FLAG +280 0x0CCD //RX_TDDRC_SMT_W +281 0x0407 //RX_TDDRC_DRC_GAIN +195 0x001C //RX_FDEQ_SUBNUM +196 0x4840 //RX_FDEQ_GAIN_0 +197 0x4040 //RX_FDEQ_GAIN_1 +198 0x485C //RX_FDEQ_GAIN_2 +199 0x6873 //RX_FDEQ_GAIN_3 +200 0x7F8E //RX_FDEQ_GAIN_4 +201 0x847E //RX_FDEQ_GAIN_5 +202 0x7E80 //RX_FDEQ_GAIN_6 +203 0x8884 //RX_FDEQ_GAIN_7 +204 0x8890 //RX_FDEQ_GAIN_8 +205 0x8E8F //RX_FDEQ_GAIN_9 +206 0x8B77 //RX_FDEQ_GAIN_10 +207 0x6F7F //RX_FDEQ_GAIN_11 +208 0x6568 //RX_FDEQ_GAIN_12 +209 0x6050 //RX_FDEQ_GAIN_13 +210 0x4848 //RX_FDEQ_GAIN_14 +211 0x4848 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0202 //RX_FDEQ_BIN_0 +221 0x0203 //RX_FDEQ_BIN_1 +222 0x0303 //RX_FDEQ_BIN_2 +223 0x0304 //RX_FDEQ_BIN_3 +224 0x0405 //RX_FDEQ_BIN_4 +225 0x0506 //RX_FDEQ_BIN_5 +226 0x0708 //RX_FDEQ_BIN_6 +227 0x090A //RX_FDEQ_BIN_7 +228 0x0B0C //RX_FDEQ_BIN_8 +229 0x0D0E //RX_FDEQ_BIN_9 +230 0x0E0F //RX_FDEQ_BIN_10 +231 0x0F10 //RX_FDEQ_BIN_11 +232 0x1011 //RX_FDEQ_BIN_12 +233 0x1104 //RX_FDEQ_BIN_13 +234 0x0000 //RX_FDEQ_BIN_14 +235 0x0000 //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x4000 //RX_FDEQ_RESRV_0 +245 0x0320 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0030 //RX_FDDRC_BAND_MARGIN_1 +248 0x0050 //RX_FDDRC_BAND_MARGIN_2 +249 0x0080 //RX_FDDRC_BAND_MARGIN_3 +250 0x0007 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x5000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x6400 //RX_FDDRC_THRD_3_2 +258 0x6400 //RX_FDDRC_THRD_3_3 +259 0x2000 //RX_FDDRC_SLANT_0_0 +260 0x2000 //RX_FDDRC_SLANT_0_1 +261 0x2000 //RX_FDDRC_SLANT_0_2 +262 0x2000 //RX_FDDRC_SLANT_0_3 +263 0x5333 //RX_FDDRC_SLANT_1_0 +264 0x5333 //RX_FDDRC_SLANT_1_1 +265 0x5333 //RX_FDDRC_SLANT_1_2 +266 0x5333 //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +286 0x000C //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 +#VOL 1 +163 0x1000 //RX_TDDRC_ALPHA_UP_1 +164 0x1000 //RX_TDDRC_ALPHA_UP_2 +165 0x1000 //RX_TDDRC_ALPHA_UP_3 +166 0x1000 //RX_TDDRC_ALPHA_UP_4 +184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +190 0x7000 //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +269 0x0000 //RX_TDDRC_THRD_0 +270 0x0000 //RX_TDDRC_THRD_1 +271 0x1800 //RX_TDDRC_THRD_2 +272 0x1800 //RX_TDDRC_THRD_3 +273 0x3000 //RX_TDDRC_SLANT_0 +274 0x6E00 //RX_TDDRC_SLANT_1 +275 0x1000 //RX_TDDRC_ALPHA_UP_0 +276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x199A //RX_TDDRC_HMNC_GAIN +279 0x0001 //RX_TDDRC_SMT_FLAG +280 0x0CCD //RX_TDDRC_SMT_W +281 0x0407 //RX_TDDRC_DRC_GAIN +195 0x001C //RX_FDEQ_SUBNUM +196 0x4840 //RX_FDEQ_GAIN_0 +197 0x4040 //RX_FDEQ_GAIN_1 +198 0x485C //RX_FDEQ_GAIN_2 +199 0x6873 //RX_FDEQ_GAIN_3 +200 0x7F8E //RX_FDEQ_GAIN_4 +201 0x847E //RX_FDEQ_GAIN_5 +202 0x7E80 //RX_FDEQ_GAIN_6 +203 0x8884 //RX_FDEQ_GAIN_7 +204 0x8890 //RX_FDEQ_GAIN_8 +205 0x8E8F //RX_FDEQ_GAIN_9 +206 0x8B77 //RX_FDEQ_GAIN_10 +207 0x6F7F //RX_FDEQ_GAIN_11 +208 0x6568 //RX_FDEQ_GAIN_12 +209 0x6050 //RX_FDEQ_GAIN_13 +210 0x4848 //RX_FDEQ_GAIN_14 +211 0x4848 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0202 //RX_FDEQ_BIN_0 +221 0x0203 //RX_FDEQ_BIN_1 +222 0x0303 //RX_FDEQ_BIN_2 +223 0x0304 //RX_FDEQ_BIN_3 +224 0x0405 //RX_FDEQ_BIN_4 +225 0x0506 //RX_FDEQ_BIN_5 +226 0x0708 //RX_FDEQ_BIN_6 +227 0x090A //RX_FDEQ_BIN_7 +228 0x0B0C //RX_FDEQ_BIN_8 +229 0x0D0E //RX_FDEQ_BIN_9 +230 0x0E0F //RX_FDEQ_BIN_10 +231 0x0F10 //RX_FDEQ_BIN_11 +232 0x1011 //RX_FDEQ_BIN_12 +233 0x1104 //RX_FDEQ_BIN_13 +234 0x0000 //RX_FDEQ_BIN_14 +235 0x0000 //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x4000 //RX_FDEQ_RESRV_0 +245 0x0320 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0030 //RX_FDDRC_BAND_MARGIN_1 +248 0x0050 //RX_FDDRC_BAND_MARGIN_2 +249 0x0080 //RX_FDDRC_BAND_MARGIN_3 +250 0x0007 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x5000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x6400 //RX_FDDRC_THRD_3_2 +258 0x6400 //RX_FDDRC_THRD_3_3 +259 0x2000 //RX_FDDRC_SLANT_0_0 +260 0x2000 //RX_FDDRC_SLANT_0_1 +261 0x2000 //RX_FDDRC_SLANT_0_2 +262 0x2000 //RX_FDDRC_SLANT_0_3 +263 0x5333 //RX_FDDRC_SLANT_1_0 +264 0x5333 //RX_FDDRC_SLANT_1_1 +265 0x5333 //RX_FDDRC_SLANT_1_2 +266 0x5333 //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +286 0x0014 //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 +#VOL 2 +163 0x1000 //RX_TDDRC_ALPHA_UP_1 +164 0x1000 //RX_TDDRC_ALPHA_UP_2 +165 0x1000 //RX_TDDRC_ALPHA_UP_3 +166 0x1000 //RX_TDDRC_ALPHA_UP_4 +184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +190 0x7000 //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +269 0x0000 //RX_TDDRC_THRD_0 +270 0x0000 //RX_TDDRC_THRD_1 +271 0x1800 //RX_TDDRC_THRD_2 +272 0x1800 //RX_TDDRC_THRD_3 +273 0x3000 //RX_TDDRC_SLANT_0 +274 0x6E00 //RX_TDDRC_SLANT_1 +275 0x1000 //RX_TDDRC_ALPHA_UP_0 +276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x199A //RX_TDDRC_HMNC_GAIN +279 0x0001 //RX_TDDRC_SMT_FLAG +280 0x0CCD //RX_TDDRC_SMT_W +281 0x0407 //RX_TDDRC_DRC_GAIN +195 0x001C //RX_FDEQ_SUBNUM +196 0x4840 //RX_FDEQ_GAIN_0 +197 0x4040 //RX_FDEQ_GAIN_1 +198 0x485C //RX_FDEQ_GAIN_2 +199 0x6873 //RX_FDEQ_GAIN_3 +200 0x7F8E //RX_FDEQ_GAIN_4 +201 0x847E //RX_FDEQ_GAIN_5 +202 0x7E80 //RX_FDEQ_GAIN_6 +203 0x8884 //RX_FDEQ_GAIN_7 +204 0x8890 //RX_FDEQ_GAIN_8 +205 0x8E8F //RX_FDEQ_GAIN_9 +206 0x8B77 //RX_FDEQ_GAIN_10 +207 0x6F7F //RX_FDEQ_GAIN_11 +208 0x6568 //RX_FDEQ_GAIN_12 +209 0x6050 //RX_FDEQ_GAIN_13 +210 0x4848 //RX_FDEQ_GAIN_14 +211 0x4848 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0202 //RX_FDEQ_BIN_0 +221 0x0203 //RX_FDEQ_BIN_1 +222 0x0303 //RX_FDEQ_BIN_2 +223 0x0304 //RX_FDEQ_BIN_3 +224 0x0405 //RX_FDEQ_BIN_4 +225 0x0506 //RX_FDEQ_BIN_5 +226 0x0708 //RX_FDEQ_BIN_6 +227 0x090A //RX_FDEQ_BIN_7 +228 0x0B0C //RX_FDEQ_BIN_8 +229 0x0D0E //RX_FDEQ_BIN_9 +230 0x0E0F //RX_FDEQ_BIN_10 +231 0x0F10 //RX_FDEQ_BIN_11 +232 0x1011 //RX_FDEQ_BIN_12 +233 0x1104 //RX_FDEQ_BIN_13 +234 0x0000 //RX_FDEQ_BIN_14 +235 0x0000 //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x4000 //RX_FDEQ_RESRV_0 +245 0x0320 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0030 //RX_FDDRC_BAND_MARGIN_1 +248 0x0050 //RX_FDDRC_BAND_MARGIN_2 +249 0x0080 //RX_FDDRC_BAND_MARGIN_3 +250 0x0007 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x5000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x6400 //RX_FDDRC_THRD_3_2 +258 0x6400 //RX_FDDRC_THRD_3_3 +259 0x2000 //RX_FDDRC_SLANT_0_0 +260 0x2000 //RX_FDDRC_SLANT_0_1 +261 0x2000 //RX_FDDRC_SLANT_0_2 +262 0x2000 //RX_FDDRC_SLANT_0_3 +263 0x5333 //RX_FDDRC_SLANT_1_0 +264 0x5333 //RX_FDDRC_SLANT_1_1 +265 0x5333 //RX_FDDRC_SLANT_1_2 +266 0x5333 //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +286 0x0020 //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 +#VOL 3 +163 0x1000 //RX_TDDRC_ALPHA_UP_1 +164 0x1000 //RX_TDDRC_ALPHA_UP_2 +165 0x1000 //RX_TDDRC_ALPHA_UP_3 +166 0x1000 //RX_TDDRC_ALPHA_UP_4 +184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +190 0x7000 //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +269 0x0000 //RX_TDDRC_THRD_0 +270 0x0000 //RX_TDDRC_THRD_1 +271 0x1800 //RX_TDDRC_THRD_2 +272 0x1800 //RX_TDDRC_THRD_3 +273 0x3000 //RX_TDDRC_SLANT_0 +274 0x6E00 //RX_TDDRC_SLANT_1 +275 0x1000 //RX_TDDRC_ALPHA_UP_0 +276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x199A //RX_TDDRC_HMNC_GAIN +279 0x0001 //RX_TDDRC_SMT_FLAG +280 0x0CCD //RX_TDDRC_SMT_W +281 0x0407 //RX_TDDRC_DRC_GAIN +195 0x001C //RX_FDEQ_SUBNUM +196 0x4840 //RX_FDEQ_GAIN_0 +197 0x4040 //RX_FDEQ_GAIN_1 +198 0x485C //RX_FDEQ_GAIN_2 +199 0x6873 //RX_FDEQ_GAIN_3 +200 0x7F8E //RX_FDEQ_GAIN_4 +201 0x847E //RX_FDEQ_GAIN_5 +202 0x7E80 //RX_FDEQ_GAIN_6 +203 0x8884 //RX_FDEQ_GAIN_7 +204 0x8890 //RX_FDEQ_GAIN_8 +205 0x8E8F //RX_FDEQ_GAIN_9 +206 0x8B77 //RX_FDEQ_GAIN_10 +207 0x6F7F //RX_FDEQ_GAIN_11 +208 0x6568 //RX_FDEQ_GAIN_12 +209 0x6050 //RX_FDEQ_GAIN_13 +210 0x4848 //RX_FDEQ_GAIN_14 +211 0x4848 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0202 //RX_FDEQ_BIN_0 +221 0x0203 //RX_FDEQ_BIN_1 +222 0x0303 //RX_FDEQ_BIN_2 +223 0x0304 //RX_FDEQ_BIN_3 +224 0x0405 //RX_FDEQ_BIN_4 +225 0x0506 //RX_FDEQ_BIN_5 +226 0x0708 //RX_FDEQ_BIN_6 +227 0x090A //RX_FDEQ_BIN_7 +228 0x0B0C //RX_FDEQ_BIN_8 +229 0x0D0E //RX_FDEQ_BIN_9 +230 0x0E0F //RX_FDEQ_BIN_10 +231 0x0F10 //RX_FDEQ_BIN_11 +232 0x1011 //RX_FDEQ_BIN_12 +233 0x1104 //RX_FDEQ_BIN_13 +234 0x0000 //RX_FDEQ_BIN_14 +235 0x0000 //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x4000 //RX_FDEQ_RESRV_0 +245 0x0320 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0030 //RX_FDDRC_BAND_MARGIN_1 +248 0x0050 //RX_FDDRC_BAND_MARGIN_2 +249 0x0080 //RX_FDDRC_BAND_MARGIN_3 +250 0x0007 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x5000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x6400 //RX_FDDRC_THRD_3_2 +258 0x6400 //RX_FDDRC_THRD_3_3 +259 0x2000 //RX_FDDRC_SLANT_0_0 +260 0x2000 //RX_FDDRC_SLANT_0_1 +261 0x2000 //RX_FDDRC_SLANT_0_2 +262 0x2000 //RX_FDDRC_SLANT_0_3 +263 0x5333 //RX_FDDRC_SLANT_1_0 +264 0x5333 //RX_FDDRC_SLANT_1_1 +265 0x5333 //RX_FDDRC_SLANT_1_2 +266 0x5333 //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +286 0x0035 //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 +#VOL 4 +163 0x1000 //RX_TDDRC_ALPHA_UP_1 +164 0x1000 //RX_TDDRC_ALPHA_UP_2 +165 0x1000 //RX_TDDRC_ALPHA_UP_3 +166 0x1000 //RX_TDDRC_ALPHA_UP_4 +184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +190 0x7000 //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +269 0x0000 //RX_TDDRC_THRD_0 +270 0x0000 //RX_TDDRC_THRD_1 +271 0x1800 //RX_TDDRC_THRD_2 +272 0x1800 //RX_TDDRC_THRD_3 +273 0x3000 //RX_TDDRC_SLANT_0 +274 0x6E00 //RX_TDDRC_SLANT_1 +275 0x1000 //RX_TDDRC_ALPHA_UP_0 +276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x199A //RX_TDDRC_HMNC_GAIN +279 0x0001 //RX_TDDRC_SMT_FLAG +280 0x0CCD //RX_TDDRC_SMT_W +281 0x0407 //RX_TDDRC_DRC_GAIN +195 0x001C //RX_FDEQ_SUBNUM +196 0x4840 //RX_FDEQ_GAIN_0 +197 0x4040 //RX_FDEQ_GAIN_1 +198 0x485C //RX_FDEQ_GAIN_2 +199 0x6873 //RX_FDEQ_GAIN_3 +200 0x7F8E //RX_FDEQ_GAIN_4 +201 0x847E //RX_FDEQ_GAIN_5 +202 0x7E80 //RX_FDEQ_GAIN_6 +203 0x8884 //RX_FDEQ_GAIN_7 +204 0x8890 //RX_FDEQ_GAIN_8 +205 0x8E8F //RX_FDEQ_GAIN_9 +206 0x8B77 //RX_FDEQ_GAIN_10 +207 0x6F7F //RX_FDEQ_GAIN_11 +208 0x6568 //RX_FDEQ_GAIN_12 +209 0x6050 //RX_FDEQ_GAIN_13 +210 0x4848 //RX_FDEQ_GAIN_14 +211 0x4848 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0202 //RX_FDEQ_BIN_0 +221 0x0203 //RX_FDEQ_BIN_1 +222 0x0303 //RX_FDEQ_BIN_2 +223 0x0304 //RX_FDEQ_BIN_3 +224 0x0405 //RX_FDEQ_BIN_4 +225 0x0506 //RX_FDEQ_BIN_5 +226 0x0708 //RX_FDEQ_BIN_6 +227 0x090A //RX_FDEQ_BIN_7 +228 0x0B0C //RX_FDEQ_BIN_8 +229 0x0D0E //RX_FDEQ_BIN_9 +230 0x0E0F //RX_FDEQ_BIN_10 +231 0x0F10 //RX_FDEQ_BIN_11 +232 0x1011 //RX_FDEQ_BIN_12 +233 0x1104 //RX_FDEQ_BIN_13 +234 0x0000 //RX_FDEQ_BIN_14 +235 0x0000 //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x4000 //RX_FDEQ_RESRV_0 +245 0x0320 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0030 //RX_FDDRC_BAND_MARGIN_1 +248 0x0050 //RX_FDDRC_BAND_MARGIN_2 +249 0x0080 //RX_FDDRC_BAND_MARGIN_3 +250 0x0007 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x5000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x6400 //RX_FDDRC_THRD_3_2 +258 0x6400 //RX_FDDRC_THRD_3_3 +259 0x2000 //RX_FDDRC_SLANT_0_0 +260 0x2000 //RX_FDDRC_SLANT_0_1 +261 0x2000 //RX_FDDRC_SLANT_0_2 +262 0x2000 //RX_FDDRC_SLANT_0_3 +263 0x5333 //RX_FDDRC_SLANT_1_0 +264 0x5333 //RX_FDDRC_SLANT_1_1 +265 0x5333 //RX_FDDRC_SLANT_1_2 +266 0x5333 //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +286 0x0057 //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 +#VOL 5 +163 0x1000 //RX_TDDRC_ALPHA_UP_1 +164 0x1000 //RX_TDDRC_ALPHA_UP_2 +165 0x1000 //RX_TDDRC_ALPHA_UP_3 +166 0x1000 //RX_TDDRC_ALPHA_UP_4 +184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +190 0x7000 //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +269 0x0000 //RX_TDDRC_THRD_0 +270 0x0000 //RX_TDDRC_THRD_1 +271 0x1800 //RX_TDDRC_THRD_2 +272 0x1800 //RX_TDDRC_THRD_3 +273 0x3000 //RX_TDDRC_SLANT_0 +274 0x6E00 //RX_TDDRC_SLANT_1 +275 0x1000 //RX_TDDRC_ALPHA_UP_0 +276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x199A //RX_TDDRC_HMNC_GAIN +279 0x0001 //RX_TDDRC_SMT_FLAG +280 0x0CCD //RX_TDDRC_SMT_W +281 0x0407 //RX_TDDRC_DRC_GAIN +195 0x001C //RX_FDEQ_SUBNUM +196 0x4840 //RX_FDEQ_GAIN_0 +197 0x4040 //RX_FDEQ_GAIN_1 +198 0x485C //RX_FDEQ_GAIN_2 +199 0x6873 //RX_FDEQ_GAIN_3 +200 0x7F8E //RX_FDEQ_GAIN_4 +201 0x847E //RX_FDEQ_GAIN_5 +202 0x7E80 //RX_FDEQ_GAIN_6 +203 0x8884 //RX_FDEQ_GAIN_7 +204 0x8890 //RX_FDEQ_GAIN_8 +205 0x8E8F //RX_FDEQ_GAIN_9 +206 0x8B77 //RX_FDEQ_GAIN_10 +207 0x6F7F //RX_FDEQ_GAIN_11 +208 0x6568 //RX_FDEQ_GAIN_12 +209 0x6050 //RX_FDEQ_GAIN_13 +210 0x4848 //RX_FDEQ_GAIN_14 +211 0x4848 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0202 //RX_FDEQ_BIN_0 +221 0x0203 //RX_FDEQ_BIN_1 +222 0x0303 //RX_FDEQ_BIN_2 +223 0x0304 //RX_FDEQ_BIN_3 +224 0x0405 //RX_FDEQ_BIN_4 +225 0x0506 //RX_FDEQ_BIN_5 +226 0x0708 //RX_FDEQ_BIN_6 +227 0x090A //RX_FDEQ_BIN_7 +228 0x0B0C //RX_FDEQ_BIN_8 +229 0x0D0E //RX_FDEQ_BIN_9 +230 0x0E0F //RX_FDEQ_BIN_10 +231 0x0F10 //RX_FDEQ_BIN_11 +232 0x1011 //RX_FDEQ_BIN_12 +233 0x1104 //RX_FDEQ_BIN_13 +234 0x0000 //RX_FDEQ_BIN_14 +235 0x0000 //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x4000 //RX_FDEQ_RESRV_0 +245 0x0320 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0030 //RX_FDDRC_BAND_MARGIN_1 +248 0x0050 //RX_FDDRC_BAND_MARGIN_2 +249 0x0080 //RX_FDDRC_BAND_MARGIN_3 +250 0x0007 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x5000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x6400 //RX_FDDRC_THRD_3_2 +258 0x6400 //RX_FDDRC_THRD_3_3 +259 0x2000 //RX_FDDRC_SLANT_0_0 +260 0x2000 //RX_FDDRC_SLANT_0_1 +261 0x2000 //RX_FDDRC_SLANT_0_2 +262 0x2000 //RX_FDDRC_SLANT_0_3 +263 0x5333 //RX_FDDRC_SLANT_1_0 +264 0x5333 //RX_FDDRC_SLANT_1_1 +265 0x5333 //RX_FDDRC_SLANT_1_2 +266 0x5333 //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +286 0x008E //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 +#VOL 6 +163 0x1000 //RX_TDDRC_ALPHA_UP_1 +164 0x1000 //RX_TDDRC_ALPHA_UP_2 +165 0x1000 //RX_TDDRC_ALPHA_UP_3 +166 0x1000 //RX_TDDRC_ALPHA_UP_4 +184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +190 0x7000 //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +269 0x0000 //RX_TDDRC_THRD_0 +270 0x0000 //RX_TDDRC_THRD_1 +271 0x1800 //RX_TDDRC_THRD_2 +272 0x1800 //RX_TDDRC_THRD_3 +273 0x3000 //RX_TDDRC_SLANT_0 +274 0x6E00 //RX_TDDRC_SLANT_1 +275 0x1000 //RX_TDDRC_ALPHA_UP_0 +276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x199A //RX_TDDRC_HMNC_GAIN +279 0x0001 //RX_TDDRC_SMT_FLAG +280 0x0CCD //RX_TDDRC_SMT_W +281 0x0407 //RX_TDDRC_DRC_GAIN +195 0x001C //RX_FDEQ_SUBNUM +196 0x4840 //RX_FDEQ_GAIN_0 +197 0x4040 //RX_FDEQ_GAIN_1 +198 0x485C //RX_FDEQ_GAIN_2 +199 0x6873 //RX_FDEQ_GAIN_3 +200 0x7F8E //RX_FDEQ_GAIN_4 +201 0x847E //RX_FDEQ_GAIN_5 +202 0x7E80 //RX_FDEQ_GAIN_6 +203 0x8884 //RX_FDEQ_GAIN_7 +204 0x8890 //RX_FDEQ_GAIN_8 +205 0x8E8F //RX_FDEQ_GAIN_9 +206 0x8B77 //RX_FDEQ_GAIN_10 +207 0x6F7F //RX_FDEQ_GAIN_11 +208 0x6568 //RX_FDEQ_GAIN_12 +209 0x6050 //RX_FDEQ_GAIN_13 +210 0x4848 //RX_FDEQ_GAIN_14 +211 0x4848 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0202 //RX_FDEQ_BIN_0 +221 0x0203 //RX_FDEQ_BIN_1 +222 0x0303 //RX_FDEQ_BIN_2 +223 0x0304 //RX_FDEQ_BIN_3 +224 0x0405 //RX_FDEQ_BIN_4 +225 0x0506 //RX_FDEQ_BIN_5 +226 0x0708 //RX_FDEQ_BIN_6 +227 0x090A //RX_FDEQ_BIN_7 +228 0x0B0C //RX_FDEQ_BIN_8 +229 0x0D0E //RX_FDEQ_BIN_9 +230 0x0E0F //RX_FDEQ_BIN_10 +231 0x0F10 //RX_FDEQ_BIN_11 +232 0x1011 //RX_FDEQ_BIN_12 +233 0x1104 //RX_FDEQ_BIN_13 +234 0x0000 //RX_FDEQ_BIN_14 +235 0x0000 //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x4000 //RX_FDEQ_RESRV_0 +245 0x0320 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0030 //RX_FDDRC_BAND_MARGIN_1 +248 0x0050 //RX_FDDRC_BAND_MARGIN_2 +249 0x0080 //RX_FDDRC_BAND_MARGIN_3 +250 0x0007 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x5000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x6400 //RX_FDDRC_THRD_3_2 +258 0x6400 //RX_FDDRC_THRD_3_3 +259 0x2000 //RX_FDDRC_SLANT_0_0 +260 0x2000 //RX_FDDRC_SLANT_0_1 +261 0x2000 //RX_FDDRC_SLANT_0_2 +262 0x2000 //RX_FDDRC_SLANT_0_3 +263 0x5333 //RX_FDDRC_SLANT_1_0 +264 0x5333 //RX_FDDRC_SLANT_1_1 +265 0x5333 //RX_FDDRC_SLANT_1_2 +266 0x5333 //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +286 0x0100 //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 #CASE_NAME HANDSET-HANDSET-VOICE_GENERIC-SWB -#PARAM_TYPE TX+RX -#TOTAL_CUSTOM_STEP 7 +#PARAM_MODE Full +#PARAM_TYPE TX+2RX +#TOTAL_CUSTOM_STEP 7+7 #TX 0 0x0000 //TX_OPERATION_MODE_0 1 0x0000 //TX_OPERATION_MODE_1 -2 0x0026 //TX_PATCH_REG +2 0x0076 //TX_PATCH_REG 3 0x6F7E //TX_SENDFUNC_MODE_0 4 0x0001 //TX_SENDFUNC_MODE_1 5 0x0002 //TX_NUM_MIC @@ -8793,7 +13379,7 @@ 18 0x0000 //TX_SYS_RESRV_2 19 0x0000 //TX_SYS_RESRV_3 20 0x0000 //TX_DIST2REF0 -21 0x009D //TX_DIST2REF1 +21 0x009C //TX_DIST2REF1 22 0x0000 //TX_DIST2REF_02 23 0x0000 //TX_DIST2REF_03 24 0x0000 //TX_DIST2REF_04 @@ -9023,12 +13609,12 @@ 248 0xF800 //TX_THR_SN_EST_6 249 0xF700 //TX_THR_SN_EST_7 250 0x0000 //TX_DELTA_THR_SN_EST_0 -251 0x0100 //TX_DELTA_THR_SN_EST_1 +251 0x0200 //TX_DELTA_THR_SN_EST_1 252 0x0200 //TX_DELTA_THR_SN_EST_2 253 0x0200 //TX_DELTA_THR_SN_EST_3 -254 0x0200 //TX_DELTA_THR_SN_EST_4 -255 0x0100 //TX_DELTA_THR_SN_EST_5 -256 0x0200 //TX_DELTA_THR_SN_EST_6 +254 0x0100 //TX_DELTA_THR_SN_EST_4 +255 0x0200 //TX_DELTA_THR_SN_EST_5 +256 0x0100 //TX_DELTA_THR_SN_EST_6 257 0x0200 //TX_DELTA_THR_SN_EST_7 258 0x4000 //TX_LAMBDA_NN_EST_0 259 0x4000 //TX_LAMBDA_NN_EST_1 @@ -9054,18 +13640,18 @@ 279 0x1000 //TX_B_POST_FLT_0 280 0x1000 //TX_B_POST_FLT_1 281 0x0014 //TX_NS_LVL_CTRL_0 -282 0x0016 //TX_NS_LVL_CTRL_1 -283 0x002C //TX_NS_LVL_CTRL_2 -284 0x0016 //TX_NS_LVL_CTRL_3 -285 0x0018 //TX_NS_LVL_CTRL_4 -286 0x0016 //TX_NS_LVL_CTRL_5 -287 0x0012 //TX_NS_LVL_CTRL_6 +282 0x002C //TX_NS_LVL_CTRL_1 +283 0x0016 //TX_NS_LVL_CTRL_2 +284 0x0018 //TX_NS_LVL_CTRL_3 +285 0x0016 //TX_NS_LVL_CTRL_4 +286 0x0012 //TX_NS_LVL_CTRL_5 +287 0x0016 //TX_NS_LVL_CTRL_6 288 0x0017 //TX_NS_LVL_CTRL_7 289 0x000E //TX_MIN_GAIN_S_0 -290 0x0012 //TX_MIN_GAIN_S_1 -291 0x000D //TX_MIN_GAIN_S_2 -292 0x0012 //TX_MIN_GAIN_S_3 -293 0x0010 //TX_MIN_GAIN_S_4 +290 0x000D //TX_MIN_GAIN_S_1 +291 0x0012 //TX_MIN_GAIN_S_2 +292 0x0010 //TX_MIN_GAIN_S_3 +293 0x0012 //TX_MIN_GAIN_S_4 294 0x0012 //TX_MIN_GAIN_S_5 295 0x0012 //TX_MIN_GAIN_S_6 296 0x0012 //TX_MIN_GAIN_S_7 @@ -9087,29 +13673,29 @@ 312 0x7FFF //TX_A_POST_FILT_0 313 0x2000 //TX_A_POST_FILT_1 314 0x4000 //TX_A_POST_FILT_S_0 -315 0x5000 //TX_A_POST_FILT_S_1 +315 0x4000 //TX_A_POST_FILT_S_1 316 0x4000 //TX_A_POST_FILT_S_2 317 0x4000 //TX_A_POST_FILT_S_3 318 0x4000 //TX_A_POST_FILT_S_4 319 0x4000 //TX_A_POST_FILT_S_5 -320 0x4000 //TX_A_POST_FILT_S_6 +320 0x5000 //TX_A_POST_FILT_S_6 321 0x7000 //TX_A_POST_FILT_S_7 322 0x1000 //TX_B_POST_FILT_0 323 0x1000 //TX_B_POST_FILT_1 -324 0x3000 //TX_B_POST_FILT_2 -325 0x1000 //TX_B_POST_FILT_3 -326 0x5000 //TX_B_POST_FILT_4 -327 0x2000 //TX_B_POST_FILT_5 -328 0x6000 //TX_B_POST_FILT_6 +324 0x2000 //TX_B_POST_FILT_2 +325 0x2000 //TX_B_POST_FILT_3 +326 0x2000 //TX_B_POST_FILT_4 +327 0x1000 //TX_B_POST_FILT_5 +328 0x3000 //TX_B_POST_FILT_6 329 0x3000 //TX_B_POST_FILT_7 330 0x1000 //TX_B_LESSCUT_RTO_S_0 -331 0x6000 //TX_B_LESSCUT_RTO_S_1 -332 0x6000 //TX_B_LESSCUT_RTO_S_2 -333 0x6000 //TX_B_LESSCUT_RTO_S_3 -334 0x6000 //TX_B_LESSCUT_RTO_S_4 -335 0x6000 //TX_B_LESSCUT_RTO_S_5 -336 0x7FFF //TX_B_LESSCUT_RTO_S_6 -337 0x7FFF //TX_B_LESSCUT_RTO_S_7 +331 0x1000 //TX_B_LESSCUT_RTO_S_1 +332 0x1000 //TX_B_LESSCUT_RTO_S_2 +333 0x1000 //TX_B_LESSCUT_RTO_S_3 +334 0x1000 //TX_B_LESSCUT_RTO_S_4 +335 0x1000 //TX_B_LESSCUT_RTO_S_5 +336 0x1000 //TX_B_LESSCUT_RTO_S_6 +337 0x1000 //TX_B_LESSCUT_RTO_S_7 338 0x7E14 //TX_LAMBDA_PFILT 339 0x7C29 //TX_LAMBDA_PFILT_S_0 340 0x7C29 //TX_LAMBDA_PFILT_S_1 @@ -9152,10 +13738,10 @@ 377 0x4E20 //TX_NOISE_TH_5_4 378 0x1194 //TX_NOISE_TH_6 379 0x0014 //TX_MINENOISE_TH -380 0x4000 //TX_MINENOISE_MIC0_TH_MTS -381 0xFFEE //TX_MINENOISE_MIC0_TH_EXP -382 0x6000 //TX_MINENOISE_MIC0_S_TH_MTS -383 0xFFF3 //TX_MINENOISE_MIC0_S_TH_EXP +380 0xD508 //TX_MORENS_TFMASK_TH +381 0x0001 //TX_DRC_QUIET_FLOOR +382 0x6D60 //TX_RATIODTL_CUT_TH +383 0x0DAC //TX_DT_CUT_K1 384 0x00A5 //TX_OUT_ENER_S_TH_CLEAN 385 0x00A5 //TX_OUT_ENER_S_TH_LESSCLEAN 386 0x00A5 //TX_OUT_ENER_S_TH_NOISY @@ -9163,15 +13749,15 @@ 388 0x0200 //TX_OUT_ENER_TH_SPEECH 389 0x2000 //TX_SN_NPB_GAIN 390 0x0000 //TX_NN_NPB_GAIN -391 0x0000 //TX_CSX_ALPHA_0 -392 0x0000 //TX_CSX_ALPHA_1 -393 0x0000 //TX_CSX_ALPHA_2 -394 0x0000 //TX_CSX_ALPHA_3 -395 0x0800 //TX_MU_ARSP_EST -396 0x00C8 //TX_P_OUTBEAM_MIN_TH +391 0x3000 //TX_POST_MASK_SUP_HSNE +392 0x07D0 //TX_TAIL_DET_TH +393 0x4000 //TX_B_LESSCUT_RTO_WTA +394 0x0000 //TX_MEL_G_R +395 0x0080 //TX_SUPHIGH_TH +396 0x0000 //TX_MASK_G_R 397 0x0002 //TX_EXTRA_NS_L -398 0x0800 //TX_EXTRA_NS_A -399 0x0005 //TX_VR_NOISE_FLOOR_TH +398 0x1800 //TX_C_POST_FLT_MASK +399 0x7FFF //TX_A_POST_FLT_WNS 400 0x0148 //TX_MIN_G_LOW300HZ 401 0x0004 //TX_MAXLEVEL_CNG 402 0x00B4 //TX_STN_NOISE_TH @@ -9286,16 +13872,16 @@ 511 0x6666 //TX_MIC_TO_BFGAIN 512 0x0000 //TX_MICTOBFGAIN0 513 0x0000 //TX_FASTMUE_TH -514 0x0000 //TX_DERVB_LEN_0 -515 0x0000 //TX_DERVB_LEN_1 -516 0x0000 //TX_RHO_DERVB -517 0x0000 //TX_MIC_INDX_DERVB -518 0x0000 //TX_MU_DERVB -519 0x0000 //TX_DR_RESRV_0 -520 0x0000 //TX_DR_RESRV_1 -521 0x0000 //TX_DR_RESRV_2 -522 0x0000 //TX_DR_RESRV_3 -523 0x0000 //TX_DR_RESRV_4 +514 0x2CCC //TX_DEREVERB_LF_MU +515 0x3200 //TX_DEREVERB_HF_MU +516 0x0007 //TX_DEREVERB_DELAY +517 0x0004 //TX_DEREVERB_COEF_LEN +518 0x0003 //TX_DEREVERB_DNR +519 0x0000 //TX_DEREVERB_ALPHA +520 0x0000 //TX_DEREVERB_BETA +521 0x3A98 //TX_GSC_RTOL_TH +522 0x3A98 //TX_GSC_RTOH_TH +523 0x7E2C //TX_WIDE2_MEANHTH 524 0x0000 //TX_DR_RESRV_5 525 0x0000 //TX_DR_RESRV_6 526 0x0000 //TX_DR_RESRV_7 @@ -9343,18 +13929,18 @@ 568 0x5048 //TX_FDEQ_GAIN_1 569 0x4C4C //TX_FDEQ_GAIN_2 570 0x474A //TX_FDEQ_GAIN_3 -571 0x423C //TX_FDEQ_GAIN_4 -572 0x4042 //TX_FDEQ_GAIN_5 -573 0x474F //TX_FDEQ_GAIN_6 -574 0x5444 //TX_FDEQ_GAIN_7 +571 0x4640 //TX_FDEQ_GAIN_4 +572 0x4446 //TX_FDEQ_GAIN_5 +573 0x4B53 //TX_FDEQ_GAIN_6 +574 0x5448 //TX_FDEQ_GAIN_7 575 0x4243 //TX_FDEQ_GAIN_8 -576 0x4344 //TX_FDEQ_GAIN_9 -577 0x414D //TX_FDEQ_GAIN_10 -578 0x4A47 //TX_FDEQ_GAIN_11 -579 0x4346 //TX_FDEQ_GAIN_12 -580 0x4C4F //TX_FDEQ_GAIN_13 -581 0x565B //TX_FDEQ_GAIN_14 -582 0x6448 //TX_FDEQ_GAIN_15 +576 0x434C //TX_FDEQ_GAIN_9 +577 0x484D //TX_FDEQ_GAIN_10 +578 0x4D4D //TX_FDEQ_GAIN_11 +579 0x4B4E //TX_FDEQ_GAIN_12 +580 0x5054 //TX_FDEQ_GAIN_13 +581 0x5D68 //TX_FDEQ_GAIN_14 +582 0x7C6B //TX_FDEQ_GAIN_15 583 0x4848 //TX_FDEQ_GAIN_16 584 0x4848 //TX_FDEQ_GAIN_17 585 0x4848 //TX_FDEQ_GAIN_18 @@ -9397,14 +13983,14 @@ 622 0x4848 //TX_PREEQ_GAIN_MIC0_5 623 0x4848 //TX_PREEQ_GAIN_MIC0_6 624 0x4848 //TX_PREEQ_GAIN_MIC0_7 -625 0x4646 //TX_PREEQ_GAIN_MIC0_8 -626 0x4545 //TX_PREEQ_GAIN_MIC0_9 -627 0x4545 //TX_PREEQ_GAIN_MIC0_10 -628 0x4544 //TX_PREEQ_GAIN_MIC0_11 -629 0x4444 //TX_PREEQ_GAIN_MIC0_12 -630 0x4343 //TX_PREEQ_GAIN_MIC0_13 -631 0x4241 //TX_PREEQ_GAIN_MIC0_14 -632 0x3C3E //TX_PREEQ_GAIN_MIC0_15 +625 0x4848 //TX_PREEQ_GAIN_MIC0_8 +626 0x4848 //TX_PREEQ_GAIN_MIC0_9 +627 0x4848 //TX_PREEQ_GAIN_MIC0_10 +628 0x4848 //TX_PREEQ_GAIN_MIC0_11 +629 0x4848 //TX_PREEQ_GAIN_MIC0_12 +630 0x4848 //TX_PREEQ_GAIN_MIC0_13 +631 0x4848 //TX_PREEQ_GAIN_MIC0_14 +632 0x4848 //TX_PREEQ_GAIN_MIC0_15 633 0x4848 //TX_PREEQ_GAIN_MIC0_16 634 0x4848 //TX_PREEQ_GAIN_MIC0_17 635 0x4848 //TX_PREEQ_GAIN_MIC0_18 @@ -9446,15 +14032,15 @@ 671 0x4848 //TX_PREEQ_GAIN_MIC1_5 672 0x4848 //TX_PREEQ_GAIN_MIC1_6 673 0x4848 //TX_PREEQ_GAIN_MIC1_7 -674 0x484A //TX_PREEQ_GAIN_MIC1_8 -675 0x4B4C //TX_PREEQ_GAIN_MIC1_9 -676 0x4B4A //TX_PREEQ_GAIN_MIC1_10 -677 0x4A48 //TX_PREEQ_GAIN_MIC1_11 -678 0x4C4C //TX_PREEQ_GAIN_MIC1_12 -679 0x4C4C //TX_PREEQ_GAIN_MIC1_13 -680 0x4848 //TX_PREEQ_GAIN_MIC1_14 -681 0x4848 //TX_PREEQ_GAIN_MIC1_15 -682 0x4848 //TX_PREEQ_GAIN_MIC1_16 +674 0x4848 //TX_PREEQ_GAIN_MIC1_8 +675 0x494A //TX_PREEQ_GAIN_MIC1_9 +676 0x4B4B //TX_PREEQ_GAIN_MIC1_10 +677 0x4B4B //TX_PREEQ_GAIN_MIC1_11 +678 0x4D4C //TX_PREEQ_GAIN_MIC1_12 +679 0x4A48 //TX_PREEQ_GAIN_MIC1_13 +680 0x4840 //TX_PREEQ_GAIN_MIC1_14 +681 0x3434 //TX_PREEQ_GAIN_MIC1_15 +682 0x3C48 //TX_PREEQ_GAIN_MIC1_16 683 0x4848 //TX_PREEQ_GAIN_MIC1_17 684 0x4848 //TX_PREEQ_GAIN_MIC1_18 685 0x4848 //TX_PREEQ_GAIN_MIC1_19 @@ -9468,17 +14054,17 @@ 693 0x0304 //TX_PREEQ_BIN_MIC1_3 694 0x0405 //TX_PREEQ_BIN_MIC1_4 695 0x0506 //TX_PREEQ_BIN_MIC1_5 -696 0x0708 //TX_PREEQ_BIN_MIC1_6 -697 0x090A //TX_PREEQ_BIN_MIC1_7 -698 0x0B0C //TX_PREEQ_BIN_MIC1_8 -699 0x0D0E //TX_PREEQ_BIN_MIC1_9 -700 0x0F10 //TX_PREEQ_BIN_MIC1_10 -701 0x1011 //TX_PREEQ_BIN_MIC1_11 -702 0x1112 //TX_PREEQ_BIN_MIC1_12 -703 0x120B //TX_PREEQ_BIN_MIC1_13 -704 0x0000 //TX_PREEQ_BIN_MIC1_14 -705 0x0000 //TX_PREEQ_BIN_MIC1_15 -706 0x0000 //TX_PREEQ_BIN_MIC1_16 +696 0x0808 //TX_PREEQ_BIN_MIC1_6 +697 0x0809 //TX_PREEQ_BIN_MIC1_7 +698 0x0A0A //TX_PREEQ_BIN_MIC1_8 +699 0x0C10 //TX_PREEQ_BIN_MIC1_9 +700 0x1013 //TX_PREEQ_BIN_MIC1_10 +701 0x1414 //TX_PREEQ_BIN_MIC1_11 +702 0x261E //TX_PREEQ_BIN_MIC1_12 +703 0x1E14 //TX_PREEQ_BIN_MIC1_13 +704 0x1414 //TX_PREEQ_BIN_MIC1_14 +705 0x2814 //TX_PREEQ_BIN_MIC1_15 +706 0x401E //TX_PREEQ_BIN_MIC1_16 707 0x0000 //TX_PREEQ_BIN_MIC1_17 708 0x0000 //TX_PREEQ_BIN_MIC1_18 709 0x0000 //TX_PREEQ_BIN_MIC1_19 @@ -9638,7 +14224,7 @@ 863 0x199A //TX_TDDRC_HMNC_GAIN 864 0x0000 //TX_TDDRC_SMT_FLAG 865 0x0CCD //TX_TDDRC_SMT_W -866 0x0550 //TX_TDDRC_DRC_GAIN +866 0x0504 //TX_TDDRC_DRC_GAIN 867 0x7FFF //TX_TDDRC_LMT_THRD 868 0x0000 //TX_TDDRC_LMT_ALPHA 869 0x0000 //TX_TFMASKLTH @@ -9669,8 +14255,73 @@ 894 0xC000 //TX_FASTNS_SSA_THHFL 895 0xCCCC //TX_FASTNS_SSA_THLFH 896 0xD999 //TX_FASTNS_SSA_THHFH +897 0x2339 //TX_SENDFUNC_REG_MICMUTE +898 0x0021 //TX_SENDFUNC_REG_MICMUTE1 +899 0x02BC //TX_MICMUTE_RATIO_THR +900 0x0140 //TX_MICMUTE_AMP_THR +901 0x0004 //TX_MICMUTE_HPF_IND +902 0x00C0 //TX_MICMUTE_LOG_EYR_TH +903 0x0008 //TX_MICMUTE_CVG_TIME +904 0x0008 //TX_MICMUTE_RELEASE_TIME +905 0x01FE //TX_MIC_VOLUME_MIC0MUTE +906 0x0020 //TX_MICMUTE_EPD_OFFSET_0 +907 0x001E //TX_MICMUTE_FRQ_AEC_L +908 0x7999 //TX_MICMUTE_EAD_THR +909 0x7FFF //TX_MICMUTE_LAMBDA_CB_NLE +910 0x7FFF //TX_MICMUTE_LAMBDA_RE_EST +911 0x4000 //TX_DTD_THR1_MICMUTE_0 +912 0x7000 //TX_DTD_THR1_MICMUTE_1 +913 0x7FFF //TX_DTD_THR1_MICMUTE_2 +914 0x7FFF //TX_DTD_THR1_MICMUTE_3 +915 0x6CCC //TX_DTD_THR2_MICMUTE_0 +916 0x0400 //TX_MICMUTE_MIN_EQ_RE_EST_0 +917 0x0400 //TX_MICMUTE_MIN_EQ_RE_EST_1 +918 0x1000 //TX_MICMUTE_MIN_EQ_RE_EST_2 +919 0x7FFF //TX_MICMUTE_MIN_EQ_RE_EST_3 +920 0x7FFF //TX_MICMUTE_MIN_EQ_RE_EST_4 +921 0x4000 //TX_MICMUTE_C_POST_FLT +922 0x03E8 //TX_MICMUTE_DT_CUT_K +923 0x0001 //TX_MICMUTE_DT_CUT_THR +924 0x03E8 //TX_MICMUTE_DT_CUT_K2 +925 0x0001 //TX_MICMUTE_DT_CUT_THR2 +926 0x0064 //TX_MICMUTE_DT2_HOLD_N +927 0x1000 //TX_MICMUTE_RATIODTH_THCUT +928 0x1000 //TX_MICMUTE_B_POST_FLT_ECHOL +929 0x7FFF //TX_MICMUTE_B_POST_FLT_ECHOH +930 0x0400 //TX_MICMUTE_C_POST_FLT_MASK +931 0x7999 //TX_MICMUTE_RATIODTL_CUT_TH +932 0x0258 //TX_MICMUTE_DT_CUT_K1 +933 0x0800 //TX_MICMUTE_N2_SN_EST +934 0xFC00 //TX_MICMUTE_THR_SN_EST_0 +935 0x001C //TX_MICMUTE_MIN_G_CTRL_0 +936 0x6000 //TX_MICMUTE_A_POST_FILT_S_0 +937 0x7000 //TX_MICMUTE_B_POST_FILT_0 +938 0x2710 //TX_MIC1RUB_AMP_THR +939 0x0010 //TX_MIC1MUTE_RATIO_THR +940 0x0450 //TX_MIC1MUTE_AMP_THR +941 0x0008 //TX_MIC1MUTE_CVG_TIME +942 0x0008 //TX_MIC1MUTE_RELEASE_TIME +943 0x0000 //TX_AMS_RESRV_01 +944 0x0000 //TX_AMS_RESRV_02 +945 0x0000 //TX_AMS_RESRV_03 +946 0x0000 //TX_AMS_RESRV_04 +947 0x0000 //TX_AMS_RESRV_05 +948 0x0000 //TX_AMS_RESRV_06 +949 0x0000 //TX_AMS_RESRV_07 +950 0x0000 //TX_AMS_RESRV_08 +951 0x0000 //TX_AMS_RESRV_09 +952 0x0000 //TX_AMS_RESRV_10 +953 0x0000 //TX_AMS_RESRV_11 +954 0x0000 //TX_AMS_RESRV_12 +955 0x0000 //TX_AMS_RESRV_13 +956 0x0000 //TX_AMS_RESRV_14 +957 0x0000 //TX_AMS_RESRV_15 +958 0x0000 //TX_AMS_RESRV_16 +959 0x0000 //TX_AMS_RESRV_17 +960 0x0000 //TX_AMS_RESRV_18 +961 0x0000 //TX_AMS_RESRV_19 #RX -0 0x003C //RX_RECVFUNC_MODE_0 +0 0x203C //RX_RECVFUNC_MODE_0 1 0x0000 //RX_RECVFUNC_MODE_1 2 0x0003 //RX_SAMPLINGFREQ_SIG 3 0x0003 //RX_SAMPLINGFREQ_PROC @@ -9680,7 +14331,7 @@ 7 0x1000 //RX_TDDRC_ALPHA_UP_2 8 0x1000 //RX_TDDRC_ALPHA_UP_3 9 0x1000 //RX_TDDRC_ALPHA_UP_4 -10 0x0600 //RX_PGA +10 0x05AA //RX_PGA 11 0x7FFF //RX_A_HP 12 0x4000 //RX_B_PE 13 0x5800 //RX_THR_PITCH_DET_0 @@ -9709,22 +14360,22 @@ 36 0x0000 //RX_LMT_THRD 37 0x4000 //RX_LMT_ALPHA 38 0x0020 //RX_FDEQ_SUBNUM -39 0x4840 //RX_FDEQ_GAIN_0 -40 0x4040 //RX_FDEQ_GAIN_1 -41 0x4050 //RX_FDEQ_GAIN_2 -42 0x5D6C //RX_FDEQ_GAIN_3 -43 0x7B86 //RX_FDEQ_GAIN_4 -44 0x8186 //RX_FDEQ_GAIN_5 -45 0x8688 //RX_FDEQ_GAIN_6 -46 0x9097 //RX_FDEQ_GAIN_7 -47 0x929F //RX_FDEQ_GAIN_8 -48 0x9CA0 //RX_FDEQ_GAIN_9 -49 0xA391 //RX_FDEQ_GAIN_10 -50 0x8A82 //RX_FDEQ_GAIN_11 -51 0x726E //RX_FDEQ_GAIN_12 -52 0x704E //RX_FDEQ_GAIN_13 -53 0x6565 //RX_FDEQ_GAIN_14 -54 0x698A //RX_FDEQ_GAIN_15 +39 0x483E //RX_FDEQ_GAIN_0 +40 0x3E3E //RX_FDEQ_GAIN_1 +41 0x3E4C //RX_FDEQ_GAIN_2 +42 0x506A //RX_FDEQ_GAIN_3 +43 0x8082 //RX_FDEQ_GAIN_4 +44 0x8982 //RX_FDEQ_GAIN_5 +45 0x8880 //RX_FDEQ_GAIN_6 +46 0x8888 //RX_FDEQ_GAIN_7 +47 0x949C //RX_FDEQ_GAIN_8 +48 0x9AAB //RX_FDEQ_GAIN_9 +49 0xAEA0 //RX_FDEQ_GAIN_10 +50 0x9487 //RX_FDEQ_GAIN_11 +51 0x6F64 //RX_FDEQ_GAIN_12 +52 0x625A //RX_FDEQ_GAIN_13 +53 0x5D70 //RX_FDEQ_GAIN_14 +54 0x7C8C //RX_FDEQ_GAIN_15 55 0x4848 //RX_FDEQ_GAIN_16 56 0x4848 //RX_FDEQ_GAIN_17 57 0x4848 //RX_FDEQ_GAIN_18 @@ -9735,19 +14386,19 @@ 62 0x4848 //RX_FDEQ_GAIN_23 63 0x0202 //RX_FDEQ_BIN_0 64 0x0202 //RX_FDEQ_BIN_1 -65 0x0302 //RX_FDEQ_BIN_2 -66 0x0304 //RX_FDEQ_BIN_3 -67 0x0405 //RX_FDEQ_BIN_4 -68 0x0506 //RX_FDEQ_BIN_5 +65 0x0301 //RX_FDEQ_BIN_2 +66 0x0404 //RX_FDEQ_BIN_3 +67 0x0406 //RX_FDEQ_BIN_4 +68 0x0109 //RX_FDEQ_BIN_5 69 0x0708 //RX_FDEQ_BIN_6 70 0x090A //RX_FDEQ_BIN_7 71 0x0B0C //RX_FDEQ_BIN_8 72 0x0D0E //RX_FDEQ_BIN_9 73 0x1013 //RX_FDEQ_BIN_10 74 0x1719 //RX_FDEQ_BIN_11 -75 0x1B1E //RX_FDEQ_BIN_12 -76 0x1E1E //RX_FDEQ_BIN_13 -77 0x1E28 //RX_FDEQ_BIN_14 +75 0x1B0F //RX_FDEQ_BIN_12 +76 0x141E //RX_FDEQ_BIN_13 +77 0x3728 //RX_FDEQ_BIN_14 78 0x282C //RX_FDEQ_BIN_15 79 0x0000 //RX_FDEQ_BIN_16 80 0x0000 //RX_FDEQ_BIN_17 @@ -9786,20 +14437,20 @@ 113 0x0002 //RX_TDDRC_THRD_1 114 0x1800 //RX_TDDRC_THRD_2 115 0x1800 //RX_TDDRC_THRD_3 -116 0x3000 //RX_TDDRC_SLANT_0 -117 0x6E00 //RX_TDDRC_SLANT_1 +116 0x7FFF //RX_TDDRC_SLANT_0 +117 0x7FFF //RX_TDDRC_SLANT_1 118 0x1000 //RX_TDDRC_ALPHA_UP_0 119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 120 0x0000 //RX_TDDRC_HMNC_FLAG 121 0x199A //RX_TDDRC_HMNC_GAIN 122 0x0001 //RX_TDDRC_SMT_FLAG 123 0x0CCD //RX_TDDRC_SMT_W -124 0x0523 //RX_TDDRC_DRC_GAIN +124 0x0650 //RX_TDDRC_DRC_GAIN 125 0x7C00 //RX_LAMBDA_PKA_FP 126 0x13E0 //RX_TPKA_FP 127 0x0080 //RX_MIN_G_FP 128 0x2000 //RX_MAX_G_FP -129 0x000B //RX_SPK_VOL +129 0x0100 //RX_SPK_VOL 130 0x0000 //RX_VOL_RESRV_0 131 0x0000 //RX_MAXLEVEL_CNG 132 0x3000 //RX_BWE_UV_TH @@ -9842,32 +14493,32 @@ 113 0x0002 //RX_TDDRC_THRD_1 114 0x1800 //RX_TDDRC_THRD_2 115 0x1800 //RX_TDDRC_THRD_3 -116 0x3000 //RX_TDDRC_SLANT_0 -117 0x6E00 //RX_TDDRC_SLANT_1 +116 0x7FFF //RX_TDDRC_SLANT_0 +117 0x7FFF //RX_TDDRC_SLANT_1 118 0x1000 //RX_TDDRC_ALPHA_UP_0 119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 120 0x0000 //RX_TDDRC_HMNC_FLAG 121 0x199A //RX_TDDRC_HMNC_GAIN 122 0x0001 //RX_TDDRC_SMT_FLAG 123 0x0CCD //RX_TDDRC_SMT_W -124 0x0523 //RX_TDDRC_DRC_GAIN +124 0x0650 //RX_TDDRC_DRC_GAIN 38 0x0020 //RX_FDEQ_SUBNUM -39 0x4840 //RX_FDEQ_GAIN_0 -40 0x4040 //RX_FDEQ_GAIN_1 -41 0x4050 //RX_FDEQ_GAIN_2 -42 0x5D6C //RX_FDEQ_GAIN_3 -43 0x7B86 //RX_FDEQ_GAIN_4 -44 0x8186 //RX_FDEQ_GAIN_5 -45 0x8688 //RX_FDEQ_GAIN_6 -46 0x9097 //RX_FDEQ_GAIN_7 -47 0x929F //RX_FDEQ_GAIN_8 -48 0x9CA0 //RX_FDEQ_GAIN_9 -49 0xA391 //RX_FDEQ_GAIN_10 -50 0x8A82 //RX_FDEQ_GAIN_11 -51 0x726E //RX_FDEQ_GAIN_12 -52 0x704E //RX_FDEQ_GAIN_13 -53 0x6565 //RX_FDEQ_GAIN_14 -54 0x698A //RX_FDEQ_GAIN_15 +39 0x483E //RX_FDEQ_GAIN_0 +40 0x3E3E //RX_FDEQ_GAIN_1 +41 0x3E4C //RX_FDEQ_GAIN_2 +42 0x506A //RX_FDEQ_GAIN_3 +43 0x8082 //RX_FDEQ_GAIN_4 +44 0x8982 //RX_FDEQ_GAIN_5 +45 0x8880 //RX_FDEQ_GAIN_6 +46 0x8888 //RX_FDEQ_GAIN_7 +47 0x949C //RX_FDEQ_GAIN_8 +48 0x9AAB //RX_FDEQ_GAIN_9 +49 0xAEA0 //RX_FDEQ_GAIN_10 +50 0x9487 //RX_FDEQ_GAIN_11 +51 0x6F64 //RX_FDEQ_GAIN_12 +52 0x625A //RX_FDEQ_GAIN_13 +53 0x5D70 //RX_FDEQ_GAIN_14 +54 0x7C8C //RX_FDEQ_GAIN_15 55 0x4848 //RX_FDEQ_GAIN_16 56 0x4848 //RX_FDEQ_GAIN_17 57 0x4848 //RX_FDEQ_GAIN_18 @@ -9878,19 +14529,19 @@ 62 0x4848 //RX_FDEQ_GAIN_23 63 0x0202 //RX_FDEQ_BIN_0 64 0x0202 //RX_FDEQ_BIN_1 -65 0x0302 //RX_FDEQ_BIN_2 -66 0x0304 //RX_FDEQ_BIN_3 -67 0x0405 //RX_FDEQ_BIN_4 -68 0x0506 //RX_FDEQ_BIN_5 +65 0x0301 //RX_FDEQ_BIN_2 +66 0x0404 //RX_FDEQ_BIN_3 +67 0x0406 //RX_FDEQ_BIN_4 +68 0x0109 //RX_FDEQ_BIN_5 69 0x0708 //RX_FDEQ_BIN_6 70 0x090A //RX_FDEQ_BIN_7 71 0x0B0C //RX_FDEQ_BIN_8 72 0x0D0E //RX_FDEQ_BIN_9 73 0x1013 //RX_FDEQ_BIN_10 74 0x1719 //RX_FDEQ_BIN_11 -75 0x1B1E //RX_FDEQ_BIN_12 -76 0x1E1E //RX_FDEQ_BIN_13 -77 0x1E28 //RX_FDEQ_BIN_14 +75 0x1B0F //RX_FDEQ_BIN_12 +76 0x141E //RX_FDEQ_BIN_13 +77 0x3728 //RX_FDEQ_BIN_14 78 0x282C //RX_FDEQ_BIN_15 79 0x0000 //RX_FDEQ_BIN_16 80 0x0000 //RX_FDEQ_BIN_17 @@ -9924,7 +14575,7 @@ 108 0x5333 //RX_FDDRC_SLANT_1_2 109 0x5333 //RX_FDDRC_SLANT_1_3 110 0x0000 //RX_FDDRC_RESRV_0 -129 0x000B //RX_SPK_VOL +129 0x000A //RX_SPK_VOL 130 0x0000 //RX_VOL_RESRV_0 #VOL 1 6 0x1000 //RX_TDDRC_ALPHA_UP_1 @@ -9941,32 +14592,32 @@ 113 0x0002 //RX_TDDRC_THRD_1 114 0x1800 //RX_TDDRC_THRD_2 115 0x1800 //RX_TDDRC_THRD_3 -116 0x3000 //RX_TDDRC_SLANT_0 -117 0x6E00 //RX_TDDRC_SLANT_1 +116 0x7FFF //RX_TDDRC_SLANT_0 +117 0x7FFF //RX_TDDRC_SLANT_1 118 0x1000 //RX_TDDRC_ALPHA_UP_0 119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 120 0x0000 //RX_TDDRC_HMNC_FLAG 121 0x199A //RX_TDDRC_HMNC_GAIN 122 0x0001 //RX_TDDRC_SMT_FLAG 123 0x0CCD //RX_TDDRC_SMT_W -124 0x04E6 //RX_TDDRC_DRC_GAIN +124 0x0650 //RX_TDDRC_DRC_GAIN 38 0x0020 //RX_FDEQ_SUBNUM -39 0x4840 //RX_FDEQ_GAIN_0 -40 0x4040 //RX_FDEQ_GAIN_1 -41 0x4050 //RX_FDEQ_GAIN_2 -42 0x5D6C //RX_FDEQ_GAIN_3 -43 0x7B86 //RX_FDEQ_GAIN_4 -44 0x8186 //RX_FDEQ_GAIN_5 -45 0x8688 //RX_FDEQ_GAIN_6 -46 0x9097 //RX_FDEQ_GAIN_7 -47 0x929F //RX_FDEQ_GAIN_8 -48 0x9CA0 //RX_FDEQ_GAIN_9 -49 0xA391 //RX_FDEQ_GAIN_10 -50 0x8A82 //RX_FDEQ_GAIN_11 -51 0x726E //RX_FDEQ_GAIN_12 -52 0x704E //RX_FDEQ_GAIN_13 -53 0x6565 //RX_FDEQ_GAIN_14 -54 0x698A //RX_FDEQ_GAIN_15 +39 0x483E //RX_FDEQ_GAIN_0 +40 0x3E3E //RX_FDEQ_GAIN_1 +41 0x3E4C //RX_FDEQ_GAIN_2 +42 0x506A //RX_FDEQ_GAIN_3 +43 0x8082 //RX_FDEQ_GAIN_4 +44 0x8982 //RX_FDEQ_GAIN_5 +45 0x8880 //RX_FDEQ_GAIN_6 +46 0x8888 //RX_FDEQ_GAIN_7 +47 0x949C //RX_FDEQ_GAIN_8 +48 0x9AAB //RX_FDEQ_GAIN_9 +49 0xAEA0 //RX_FDEQ_GAIN_10 +50 0x9487 //RX_FDEQ_GAIN_11 +51 0x6F64 //RX_FDEQ_GAIN_12 +52 0x625A //RX_FDEQ_GAIN_13 +53 0x5D70 //RX_FDEQ_GAIN_14 +54 0x7C8C //RX_FDEQ_GAIN_15 55 0x4848 //RX_FDEQ_GAIN_16 56 0x4848 //RX_FDEQ_GAIN_17 57 0x4848 //RX_FDEQ_GAIN_18 @@ -9977,19 +14628,19 @@ 62 0x4848 //RX_FDEQ_GAIN_23 63 0x0202 //RX_FDEQ_BIN_0 64 0x0202 //RX_FDEQ_BIN_1 -65 0x0302 //RX_FDEQ_BIN_2 -66 0x0304 //RX_FDEQ_BIN_3 -67 0x0405 //RX_FDEQ_BIN_4 -68 0x0506 //RX_FDEQ_BIN_5 +65 0x0301 //RX_FDEQ_BIN_2 +66 0x0404 //RX_FDEQ_BIN_3 +67 0x0406 //RX_FDEQ_BIN_4 +68 0x0109 //RX_FDEQ_BIN_5 69 0x0708 //RX_FDEQ_BIN_6 70 0x090A //RX_FDEQ_BIN_7 71 0x0B0C //RX_FDEQ_BIN_8 72 0x0D0E //RX_FDEQ_BIN_9 73 0x1013 //RX_FDEQ_BIN_10 74 0x1719 //RX_FDEQ_BIN_11 -75 0x1B1E //RX_FDEQ_BIN_12 -76 0x1E1E //RX_FDEQ_BIN_13 -77 0x1E28 //RX_FDEQ_BIN_14 +75 0x1B0F //RX_FDEQ_BIN_12 +76 0x141E //RX_FDEQ_BIN_13 +77 0x3728 //RX_FDEQ_BIN_14 78 0x282C //RX_FDEQ_BIN_15 79 0x0000 //RX_FDEQ_BIN_16 80 0x0000 //RX_FDEQ_BIN_17 @@ -10023,7 +14674,7 @@ 108 0x5333 //RX_FDDRC_SLANT_1_2 109 0x5333 //RX_FDDRC_SLANT_1_3 110 0x0000 //RX_FDDRC_RESRV_0 -129 0x0013 //RX_SPK_VOL +129 0x0010 //RX_SPK_VOL 130 0x0000 //RX_VOL_RESRV_0 #VOL 2 6 0x1000 //RX_TDDRC_ALPHA_UP_1 @@ -10040,32 +14691,32 @@ 113 0x0002 //RX_TDDRC_THRD_1 114 0x1800 //RX_TDDRC_THRD_2 115 0x1800 //RX_TDDRC_THRD_3 -116 0x3000 //RX_TDDRC_SLANT_0 -117 0x6E00 //RX_TDDRC_SLANT_1 +116 0x7FFF //RX_TDDRC_SLANT_0 +117 0x7FFF //RX_TDDRC_SLANT_1 118 0x1000 //RX_TDDRC_ALPHA_UP_0 119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 120 0x0000 //RX_TDDRC_HMNC_FLAG 121 0x199A //RX_TDDRC_HMNC_GAIN 122 0x0001 //RX_TDDRC_SMT_FLAG 123 0x0CCD //RX_TDDRC_SMT_W -124 0x04E6 //RX_TDDRC_DRC_GAIN +124 0x0650 //RX_TDDRC_DRC_GAIN 38 0x0020 //RX_FDEQ_SUBNUM -39 0x4840 //RX_FDEQ_GAIN_0 -40 0x4040 //RX_FDEQ_GAIN_1 -41 0x4050 //RX_FDEQ_GAIN_2 -42 0x5D6C //RX_FDEQ_GAIN_3 -43 0x7B86 //RX_FDEQ_GAIN_4 -44 0x8186 //RX_FDEQ_GAIN_5 -45 0x8688 //RX_FDEQ_GAIN_6 -46 0x9097 //RX_FDEQ_GAIN_7 -47 0x929F //RX_FDEQ_GAIN_8 -48 0x9CA0 //RX_FDEQ_GAIN_9 -49 0xA391 //RX_FDEQ_GAIN_10 -50 0x8A82 //RX_FDEQ_GAIN_11 -51 0x726E //RX_FDEQ_GAIN_12 -52 0x704E //RX_FDEQ_GAIN_13 -53 0x6565 //RX_FDEQ_GAIN_14 -54 0x698A //RX_FDEQ_GAIN_15 +39 0x483E //RX_FDEQ_GAIN_0 +40 0x3E3E //RX_FDEQ_GAIN_1 +41 0x3E4C //RX_FDEQ_GAIN_2 +42 0x506A //RX_FDEQ_GAIN_3 +43 0x8082 //RX_FDEQ_GAIN_4 +44 0x8982 //RX_FDEQ_GAIN_5 +45 0x8880 //RX_FDEQ_GAIN_6 +46 0x8888 //RX_FDEQ_GAIN_7 +47 0x949C //RX_FDEQ_GAIN_8 +48 0x9AAB //RX_FDEQ_GAIN_9 +49 0xAEA0 //RX_FDEQ_GAIN_10 +50 0x9487 //RX_FDEQ_GAIN_11 +51 0x6F64 //RX_FDEQ_GAIN_12 +52 0x625A //RX_FDEQ_GAIN_13 +53 0x5D70 //RX_FDEQ_GAIN_14 +54 0x7C8C //RX_FDEQ_GAIN_15 55 0x4848 //RX_FDEQ_GAIN_16 56 0x4848 //RX_FDEQ_GAIN_17 57 0x4848 //RX_FDEQ_GAIN_18 @@ -10076,19 +14727,19 @@ 62 0x4848 //RX_FDEQ_GAIN_23 63 0x0202 //RX_FDEQ_BIN_0 64 0x0202 //RX_FDEQ_BIN_1 -65 0x0302 //RX_FDEQ_BIN_2 -66 0x0304 //RX_FDEQ_BIN_3 -67 0x0405 //RX_FDEQ_BIN_4 -68 0x0506 //RX_FDEQ_BIN_5 +65 0x0301 //RX_FDEQ_BIN_2 +66 0x0404 //RX_FDEQ_BIN_3 +67 0x0406 //RX_FDEQ_BIN_4 +68 0x0109 //RX_FDEQ_BIN_5 69 0x0708 //RX_FDEQ_BIN_6 70 0x090A //RX_FDEQ_BIN_7 71 0x0B0C //RX_FDEQ_BIN_8 72 0x0D0E //RX_FDEQ_BIN_9 73 0x1013 //RX_FDEQ_BIN_10 74 0x1719 //RX_FDEQ_BIN_11 -75 0x1B1E //RX_FDEQ_BIN_12 -76 0x1E1E //RX_FDEQ_BIN_13 -77 0x1E28 //RX_FDEQ_BIN_14 +75 0x1B0F //RX_FDEQ_BIN_12 +76 0x141E //RX_FDEQ_BIN_13 +77 0x3728 //RX_FDEQ_BIN_14 78 0x282C //RX_FDEQ_BIN_15 79 0x0000 //RX_FDEQ_BIN_16 80 0x0000 //RX_FDEQ_BIN_17 @@ -10122,7 +14773,7 @@ 108 0x5333 //RX_FDDRC_SLANT_1_2 109 0x5333 //RX_FDDRC_SLANT_1_3 110 0x0000 //RX_FDDRC_RESRV_0 -129 0x001F //RX_SPK_VOL +129 0x001B //RX_SPK_VOL 130 0x0000 //RX_VOL_RESRV_0 #VOL 3 6 0x1000 //RX_TDDRC_ALPHA_UP_1 @@ -10139,32 +14790,32 @@ 113 0x0002 //RX_TDDRC_THRD_1 114 0x1800 //RX_TDDRC_THRD_2 115 0x1800 //RX_TDDRC_THRD_3 -116 0x3000 //RX_TDDRC_SLANT_0 -117 0x6E00 //RX_TDDRC_SLANT_1 +116 0x7FFF //RX_TDDRC_SLANT_0 +117 0x7FFF //RX_TDDRC_SLANT_1 118 0x1000 //RX_TDDRC_ALPHA_UP_0 119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 120 0x0000 //RX_TDDRC_HMNC_FLAG 121 0x199A //RX_TDDRC_HMNC_GAIN 122 0x0001 //RX_TDDRC_SMT_FLAG 123 0x0CCD //RX_TDDRC_SMT_W -124 0x04E6 //RX_TDDRC_DRC_GAIN +124 0x0650 //RX_TDDRC_DRC_GAIN 38 0x0020 //RX_FDEQ_SUBNUM -39 0x4840 //RX_FDEQ_GAIN_0 -40 0x4040 //RX_FDEQ_GAIN_1 -41 0x4050 //RX_FDEQ_GAIN_2 -42 0x5D6C //RX_FDEQ_GAIN_3 -43 0x7B86 //RX_FDEQ_GAIN_4 -44 0x8186 //RX_FDEQ_GAIN_5 -45 0x8688 //RX_FDEQ_GAIN_6 -46 0x9097 //RX_FDEQ_GAIN_7 -47 0x929F //RX_FDEQ_GAIN_8 -48 0x9CA0 //RX_FDEQ_GAIN_9 -49 0xA391 //RX_FDEQ_GAIN_10 -50 0x8A82 //RX_FDEQ_GAIN_11 -51 0x726E //RX_FDEQ_GAIN_12 -52 0x704E //RX_FDEQ_GAIN_13 -53 0x6565 //RX_FDEQ_GAIN_14 -54 0x698A //RX_FDEQ_GAIN_15 +39 0x483E //RX_FDEQ_GAIN_0 +40 0x3E3E //RX_FDEQ_GAIN_1 +41 0x3E4C //RX_FDEQ_GAIN_2 +42 0x506A //RX_FDEQ_GAIN_3 +43 0x8082 //RX_FDEQ_GAIN_4 +44 0x8982 //RX_FDEQ_GAIN_5 +45 0x8880 //RX_FDEQ_GAIN_6 +46 0x8888 //RX_FDEQ_GAIN_7 +47 0x949C //RX_FDEQ_GAIN_8 +48 0x9AAB //RX_FDEQ_GAIN_9 +49 0xAEA0 //RX_FDEQ_GAIN_10 +50 0x9487 //RX_FDEQ_GAIN_11 +51 0x6F64 //RX_FDEQ_GAIN_12 +52 0x625A //RX_FDEQ_GAIN_13 +53 0x5D70 //RX_FDEQ_GAIN_14 +54 0x7C8C //RX_FDEQ_GAIN_15 55 0x4848 //RX_FDEQ_GAIN_16 56 0x4848 //RX_FDEQ_GAIN_17 57 0x4848 //RX_FDEQ_GAIN_18 @@ -10175,19 +14826,19 @@ 62 0x4848 //RX_FDEQ_GAIN_23 63 0x0202 //RX_FDEQ_BIN_0 64 0x0202 //RX_FDEQ_BIN_1 -65 0x0302 //RX_FDEQ_BIN_2 -66 0x0304 //RX_FDEQ_BIN_3 -67 0x0405 //RX_FDEQ_BIN_4 -68 0x0506 //RX_FDEQ_BIN_5 +65 0x0301 //RX_FDEQ_BIN_2 +66 0x0404 //RX_FDEQ_BIN_3 +67 0x0406 //RX_FDEQ_BIN_4 +68 0x0109 //RX_FDEQ_BIN_5 69 0x0708 //RX_FDEQ_BIN_6 70 0x090A //RX_FDEQ_BIN_7 71 0x0B0C //RX_FDEQ_BIN_8 72 0x0D0E //RX_FDEQ_BIN_9 73 0x1013 //RX_FDEQ_BIN_10 74 0x1719 //RX_FDEQ_BIN_11 -75 0x1B1E //RX_FDEQ_BIN_12 -76 0x1E1E //RX_FDEQ_BIN_13 -77 0x1E28 //RX_FDEQ_BIN_14 +75 0x1B0F //RX_FDEQ_BIN_12 +76 0x141E //RX_FDEQ_BIN_13 +77 0x3728 //RX_FDEQ_BIN_14 78 0x282C //RX_FDEQ_BIN_15 79 0x0000 //RX_FDEQ_BIN_16 80 0x0000 //RX_FDEQ_BIN_17 @@ -10221,7 +14872,7 @@ 108 0x5333 //RX_FDDRC_SLANT_1_2 109 0x5333 //RX_FDDRC_SLANT_1_3 110 0x0000 //RX_FDDRC_RESRV_0 -129 0x0032 //RX_SPK_VOL +129 0x002B //RX_SPK_VOL 130 0x0000 //RX_VOL_RESRV_0 #VOL 4 6 0x1000 //RX_TDDRC_ALPHA_UP_1 @@ -10238,32 +14889,32 @@ 113 0x0002 //RX_TDDRC_THRD_1 114 0x1800 //RX_TDDRC_THRD_2 115 0x1800 //RX_TDDRC_THRD_3 -116 0x3000 //RX_TDDRC_SLANT_0 -117 0x6E00 //RX_TDDRC_SLANT_1 +116 0x7FFF //RX_TDDRC_SLANT_0 +117 0x7FFF //RX_TDDRC_SLANT_1 118 0x1000 //RX_TDDRC_ALPHA_UP_0 119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 120 0x0000 //RX_TDDRC_HMNC_FLAG 121 0x199A //RX_TDDRC_HMNC_GAIN 122 0x0001 //RX_TDDRC_SMT_FLAG 123 0x0CCD //RX_TDDRC_SMT_W -124 0x04E6 //RX_TDDRC_DRC_GAIN +124 0x0650 //RX_TDDRC_DRC_GAIN 38 0x0020 //RX_FDEQ_SUBNUM -39 0x4840 //RX_FDEQ_GAIN_0 -40 0x4040 //RX_FDEQ_GAIN_1 -41 0x4050 //RX_FDEQ_GAIN_2 -42 0x5D6C //RX_FDEQ_GAIN_3 -43 0x7B86 //RX_FDEQ_GAIN_4 -44 0x8186 //RX_FDEQ_GAIN_5 -45 0x8688 //RX_FDEQ_GAIN_6 -46 0x9097 //RX_FDEQ_GAIN_7 -47 0x929F //RX_FDEQ_GAIN_8 -48 0x9CA0 //RX_FDEQ_GAIN_9 -49 0xA391 //RX_FDEQ_GAIN_10 -50 0x8A82 //RX_FDEQ_GAIN_11 -51 0x726E //RX_FDEQ_GAIN_12 -52 0x704E //RX_FDEQ_GAIN_13 -53 0x6565 //RX_FDEQ_GAIN_14 -54 0x698A //RX_FDEQ_GAIN_15 +39 0x483E //RX_FDEQ_GAIN_0 +40 0x3E3E //RX_FDEQ_GAIN_1 +41 0x3E4C //RX_FDEQ_GAIN_2 +42 0x506A //RX_FDEQ_GAIN_3 +43 0x8082 //RX_FDEQ_GAIN_4 +44 0x8982 //RX_FDEQ_GAIN_5 +45 0x8880 //RX_FDEQ_GAIN_6 +46 0x8888 //RX_FDEQ_GAIN_7 +47 0x949C //RX_FDEQ_GAIN_8 +48 0x9AAB //RX_FDEQ_GAIN_9 +49 0xAEA0 //RX_FDEQ_GAIN_10 +50 0x9487 //RX_FDEQ_GAIN_11 +51 0x6F64 //RX_FDEQ_GAIN_12 +52 0x625A //RX_FDEQ_GAIN_13 +53 0x5D70 //RX_FDEQ_GAIN_14 +54 0x7C8C //RX_FDEQ_GAIN_15 55 0x4848 //RX_FDEQ_GAIN_16 56 0x4848 //RX_FDEQ_GAIN_17 57 0x4848 //RX_FDEQ_GAIN_18 @@ -10274,19 +14925,19 @@ 62 0x4848 //RX_FDEQ_GAIN_23 63 0x0202 //RX_FDEQ_BIN_0 64 0x0202 //RX_FDEQ_BIN_1 -65 0x0302 //RX_FDEQ_BIN_2 -66 0x0304 //RX_FDEQ_BIN_3 -67 0x0405 //RX_FDEQ_BIN_4 -68 0x0506 //RX_FDEQ_BIN_5 +65 0x0301 //RX_FDEQ_BIN_2 +66 0x0404 //RX_FDEQ_BIN_3 +67 0x0406 //RX_FDEQ_BIN_4 +68 0x0109 //RX_FDEQ_BIN_5 69 0x0708 //RX_FDEQ_BIN_6 70 0x090A //RX_FDEQ_BIN_7 71 0x0B0C //RX_FDEQ_BIN_8 72 0x0D0E //RX_FDEQ_BIN_9 73 0x1013 //RX_FDEQ_BIN_10 74 0x1719 //RX_FDEQ_BIN_11 -75 0x1B1E //RX_FDEQ_BIN_12 -76 0x1E1E //RX_FDEQ_BIN_13 -77 0x1E28 //RX_FDEQ_BIN_14 +75 0x1B0F //RX_FDEQ_BIN_12 +76 0x141E //RX_FDEQ_BIN_13 +77 0x3728 //RX_FDEQ_BIN_14 78 0x282C //RX_FDEQ_BIN_15 79 0x0000 //RX_FDEQ_BIN_16 80 0x0000 //RX_FDEQ_BIN_17 @@ -10320,7 +14971,7 @@ 108 0x5333 //RX_FDDRC_SLANT_1_2 109 0x5333 //RX_FDDRC_SLANT_1_3 110 0x0000 //RX_FDDRC_RESRV_0 -129 0x0052 //RX_SPK_VOL +129 0x0047 //RX_SPK_VOL 130 0x0000 //RX_VOL_RESRV_0 #VOL 5 6 0x1000 //RX_TDDRC_ALPHA_UP_1 @@ -10337,32 +14988,32 @@ 113 0x0002 //RX_TDDRC_THRD_1 114 0x1800 //RX_TDDRC_THRD_2 115 0x1800 //RX_TDDRC_THRD_3 -116 0x3000 //RX_TDDRC_SLANT_0 -117 0x6E00 //RX_TDDRC_SLANT_1 +116 0x7FFF //RX_TDDRC_SLANT_0 +117 0x7FFF //RX_TDDRC_SLANT_1 118 0x1000 //RX_TDDRC_ALPHA_UP_0 119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 120 0x0000 //RX_TDDRC_HMNC_FLAG 121 0x199A //RX_TDDRC_HMNC_GAIN 122 0x0001 //RX_TDDRC_SMT_FLAG 123 0x0CCD //RX_TDDRC_SMT_W -124 0x04E6 //RX_TDDRC_DRC_GAIN +124 0x0650 //RX_TDDRC_DRC_GAIN 38 0x0020 //RX_FDEQ_SUBNUM -39 0x4840 //RX_FDEQ_GAIN_0 -40 0x4040 //RX_FDEQ_GAIN_1 -41 0x4050 //RX_FDEQ_GAIN_2 -42 0x5D6C //RX_FDEQ_GAIN_3 -43 0x7B86 //RX_FDEQ_GAIN_4 -44 0x8186 //RX_FDEQ_GAIN_5 -45 0x8688 //RX_FDEQ_GAIN_6 -46 0x9097 //RX_FDEQ_GAIN_7 -47 0x929F //RX_FDEQ_GAIN_8 -48 0x9CA0 //RX_FDEQ_GAIN_9 -49 0xA391 //RX_FDEQ_GAIN_10 -50 0x8A82 //RX_FDEQ_GAIN_11 -51 0x726E //RX_FDEQ_GAIN_12 -52 0x704E //RX_FDEQ_GAIN_13 -53 0x6565 //RX_FDEQ_GAIN_14 -54 0x698A //RX_FDEQ_GAIN_15 +39 0x483E //RX_FDEQ_GAIN_0 +40 0x3E3E //RX_FDEQ_GAIN_1 +41 0x3E4C //RX_FDEQ_GAIN_2 +42 0x506A //RX_FDEQ_GAIN_3 +43 0x8082 //RX_FDEQ_GAIN_4 +44 0x8982 //RX_FDEQ_GAIN_5 +45 0x8880 //RX_FDEQ_GAIN_6 +46 0x8888 //RX_FDEQ_GAIN_7 +47 0x949C //RX_FDEQ_GAIN_8 +48 0x9AAB //RX_FDEQ_GAIN_9 +49 0xAEA0 //RX_FDEQ_GAIN_10 +50 0x9487 //RX_FDEQ_GAIN_11 +51 0x6F64 //RX_FDEQ_GAIN_12 +52 0x625A //RX_FDEQ_GAIN_13 +53 0x5D70 //RX_FDEQ_GAIN_14 +54 0x7C8C //RX_FDEQ_GAIN_15 55 0x4848 //RX_FDEQ_GAIN_16 56 0x4848 //RX_FDEQ_GAIN_17 57 0x4848 //RX_FDEQ_GAIN_18 @@ -10373,19 +15024,19 @@ 62 0x4848 //RX_FDEQ_GAIN_23 63 0x0202 //RX_FDEQ_BIN_0 64 0x0202 //RX_FDEQ_BIN_1 -65 0x0302 //RX_FDEQ_BIN_2 -66 0x0304 //RX_FDEQ_BIN_3 -67 0x0405 //RX_FDEQ_BIN_4 -68 0x0506 //RX_FDEQ_BIN_5 +65 0x0301 //RX_FDEQ_BIN_2 +66 0x0404 //RX_FDEQ_BIN_3 +67 0x0406 //RX_FDEQ_BIN_4 +68 0x0109 //RX_FDEQ_BIN_5 69 0x0708 //RX_FDEQ_BIN_6 70 0x090A //RX_FDEQ_BIN_7 71 0x0B0C //RX_FDEQ_BIN_8 72 0x0D0E //RX_FDEQ_BIN_9 73 0x1013 //RX_FDEQ_BIN_10 74 0x1719 //RX_FDEQ_BIN_11 -75 0x1B1E //RX_FDEQ_BIN_12 -76 0x1E1E //RX_FDEQ_BIN_13 -77 0x1E28 //RX_FDEQ_BIN_14 +75 0x1B0F //RX_FDEQ_BIN_12 +76 0x141E //RX_FDEQ_BIN_13 +77 0x3728 //RX_FDEQ_BIN_14 78 0x282C //RX_FDEQ_BIN_15 79 0x0000 //RX_FDEQ_BIN_16 80 0x0000 //RX_FDEQ_BIN_17 @@ -10419,7 +15070,7 @@ 108 0x5333 //RX_FDDRC_SLANT_1_2 109 0x5333 //RX_FDDRC_SLANT_1_3 110 0x0000 //RX_FDDRC_RESRV_0 -129 0x0087 //RX_SPK_VOL +129 0x0076 //RX_SPK_VOL 130 0x0000 //RX_VOL_RESRV_0 #VOL 6 6 0x1000 //RX_TDDRC_ALPHA_UP_1 @@ -10436,32 +15087,32 @@ 113 0x0002 //RX_TDDRC_THRD_1 114 0x1800 //RX_TDDRC_THRD_2 115 0x1800 //RX_TDDRC_THRD_3 -116 0x3000 //RX_TDDRC_SLANT_0 -117 0x6E00 //RX_TDDRC_SLANT_1 +116 0x7FFF //RX_TDDRC_SLANT_0 +117 0x7FFF //RX_TDDRC_SLANT_1 118 0x1000 //RX_TDDRC_ALPHA_UP_0 119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 120 0x0000 //RX_TDDRC_HMNC_FLAG 121 0x199A //RX_TDDRC_HMNC_GAIN 122 0x0001 //RX_TDDRC_SMT_FLAG 123 0x0CCD //RX_TDDRC_SMT_W -124 0x04E6 //RX_TDDRC_DRC_GAIN +124 0x0650 //RX_TDDRC_DRC_GAIN 38 0x0020 //RX_FDEQ_SUBNUM -39 0x4840 //RX_FDEQ_GAIN_0 -40 0x4040 //RX_FDEQ_GAIN_1 -41 0x4050 //RX_FDEQ_GAIN_2 -42 0x5D6C //RX_FDEQ_GAIN_3 -43 0x7B86 //RX_FDEQ_GAIN_4 -44 0x8186 //RX_FDEQ_GAIN_5 -45 0x8688 //RX_FDEQ_GAIN_6 -46 0x9097 //RX_FDEQ_GAIN_7 -47 0x929F //RX_FDEQ_GAIN_8 -48 0x9CA0 //RX_FDEQ_GAIN_9 -49 0xA391 //RX_FDEQ_GAIN_10 -50 0x8A82 //RX_FDEQ_GAIN_11 -51 0x726E //RX_FDEQ_GAIN_12 -52 0x704E //RX_FDEQ_GAIN_13 -53 0x6565 //RX_FDEQ_GAIN_14 -54 0x698A //RX_FDEQ_GAIN_15 +39 0x483E //RX_FDEQ_GAIN_0 +40 0x3E3E //RX_FDEQ_GAIN_1 +41 0x3E4C //RX_FDEQ_GAIN_2 +42 0x506A //RX_FDEQ_GAIN_3 +43 0x8082 //RX_FDEQ_GAIN_4 +44 0x8982 //RX_FDEQ_GAIN_5 +45 0x8880 //RX_FDEQ_GAIN_6 +46 0x8888 //RX_FDEQ_GAIN_7 +47 0x949C //RX_FDEQ_GAIN_8 +48 0x9AAB //RX_FDEQ_GAIN_9 +49 0xAEA0 //RX_FDEQ_GAIN_10 +50 0x9487 //RX_FDEQ_GAIN_11 +51 0x6F64 //RX_FDEQ_GAIN_12 +52 0x625A //RX_FDEQ_GAIN_13 +53 0x5D70 //RX_FDEQ_GAIN_14 +54 0x7C8C //RX_FDEQ_GAIN_15 55 0x4848 //RX_FDEQ_GAIN_16 56 0x4848 //RX_FDEQ_GAIN_17 57 0x4848 //RX_FDEQ_GAIN_18 @@ -10472,19 +15123,19 @@ 62 0x4848 //RX_FDEQ_GAIN_23 63 0x0202 //RX_FDEQ_BIN_0 64 0x0202 //RX_FDEQ_BIN_1 -65 0x0302 //RX_FDEQ_BIN_2 -66 0x0304 //RX_FDEQ_BIN_3 -67 0x0405 //RX_FDEQ_BIN_4 -68 0x0506 //RX_FDEQ_BIN_5 +65 0x0301 //RX_FDEQ_BIN_2 +66 0x0404 //RX_FDEQ_BIN_3 +67 0x0406 //RX_FDEQ_BIN_4 +68 0x0109 //RX_FDEQ_BIN_5 69 0x0708 //RX_FDEQ_BIN_6 70 0x090A //RX_FDEQ_BIN_7 71 0x0B0C //RX_FDEQ_BIN_8 72 0x0D0E //RX_FDEQ_BIN_9 73 0x1013 //RX_FDEQ_BIN_10 74 0x1719 //RX_FDEQ_BIN_11 -75 0x1B1E //RX_FDEQ_BIN_12 -76 0x1E1E //RX_FDEQ_BIN_13 -77 0x1E28 //RX_FDEQ_BIN_14 +75 0x1B0F //RX_FDEQ_BIN_12 +76 0x141E //RX_FDEQ_BIN_13 +77 0x3728 //RX_FDEQ_BIN_14 78 0x282C //RX_FDEQ_BIN_15 79 0x0000 //RX_FDEQ_BIN_16 80 0x0000 //RX_FDEQ_BIN_17 @@ -10520,10 +15171,862 @@ 110 0x0000 //RX_FDDRC_RESRV_0 129 0x0100 //RX_SPK_VOL 130 0x0000 //RX_VOL_RESRV_0 +#RX 2 +157 0x003C //RX_RECVFUNC_MODE_0 +158 0x0000 //RX_RECVFUNC_MODE_1 +159 0x0003 //RX_SAMPLINGFREQ_SIG +160 0x0003 //RX_SAMPLINGFREQ_PROC +161 0x000A //RX_FRAME_SZ +162 0x0000 //RX_DELAY_OPT +163 0x1000 //RX_TDDRC_ALPHA_UP_1 +164 0x1000 //RX_TDDRC_ALPHA_UP_2 +165 0x1000 //RX_TDDRC_ALPHA_UP_3 +166 0x1000 //RX_TDDRC_ALPHA_UP_4 +167 0x0600 //RX_PGA +168 0x7FFF //RX_A_HP +169 0x4000 //RX_B_PE +170 0x5800 //RX_THR_PITCH_DET_0 +171 0x5000 //RX_THR_PITCH_DET_1 +172 0x4000 //RX_THR_PITCH_DET_2 +173 0x0008 //RX_PITCH_BFR_LEN +174 0x0003 //RX_SBD_PITCH_DET +175 0x0100 //RX_PP_RESRV_0 +176 0x0020 //RX_PP_RESRV_1 +177 0x0600 //RX_N_SN_EST +178 0x000C //RX_N2_SN_EST +179 0x000F //RX_NS_LVL_CTRL +180 0xF800 //RX_THR_SN_EST +181 0x7E00 //RX_LAMBDA_PFILT +182 0x000A //RX_FENS_RESRV_0 +183 0x0190 //RX_FENS_RESRV_1 +184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +187 0x0002 //RX_EXTRA_NS_L +188 0x0800 //RX_EXTRA_NS_A +189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +190 0x7000 //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +192 0x199A //RX_A_POST_FLT +193 0x0000 //RX_LMT_THRD +194 0x4000 //RX_LMT_ALPHA +195 0x0020 //RX_FDEQ_SUBNUM +196 0x4840 //RX_FDEQ_GAIN_0 +197 0x4040 //RX_FDEQ_GAIN_1 +198 0x4050 //RX_FDEQ_GAIN_2 +199 0x5D6C //RX_FDEQ_GAIN_3 +200 0x7B86 //RX_FDEQ_GAIN_4 +201 0x8186 //RX_FDEQ_GAIN_5 +202 0x8688 //RX_FDEQ_GAIN_6 +203 0x9097 //RX_FDEQ_GAIN_7 +204 0x929F //RX_FDEQ_GAIN_8 +205 0x9CA0 //RX_FDEQ_GAIN_9 +206 0xA391 //RX_FDEQ_GAIN_10 +207 0x8A82 //RX_FDEQ_GAIN_11 +208 0x726E //RX_FDEQ_GAIN_12 +209 0x704E //RX_FDEQ_GAIN_13 +210 0x6565 //RX_FDEQ_GAIN_14 +211 0x698A //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0202 //RX_FDEQ_BIN_0 +221 0x0202 //RX_FDEQ_BIN_1 +222 0x0302 //RX_FDEQ_BIN_2 +223 0x0304 //RX_FDEQ_BIN_3 +224 0x0405 //RX_FDEQ_BIN_4 +225 0x0506 //RX_FDEQ_BIN_5 +226 0x0708 //RX_FDEQ_BIN_6 +227 0x090A //RX_FDEQ_BIN_7 +228 0x0B0C //RX_FDEQ_BIN_8 +229 0x0D0E //RX_FDEQ_BIN_9 +230 0x1013 //RX_FDEQ_BIN_10 +231 0x1719 //RX_FDEQ_BIN_11 +232 0x1B1E //RX_FDEQ_BIN_12 +233 0x1E1E //RX_FDEQ_BIN_13 +234 0x1E28 //RX_FDEQ_BIN_14 +235 0x282C //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x4000 //RX_FDEQ_RESRV_0 +245 0x0320 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0030 //RX_FDDRC_BAND_MARGIN_1 +248 0x0050 //RX_FDDRC_BAND_MARGIN_2 +249 0x0080 //RX_FDDRC_BAND_MARGIN_3 +250 0x0007 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x5000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x6400 //RX_FDDRC_THRD_3_2 +258 0x6400 //RX_FDDRC_THRD_3_3 +259 0x2000 //RX_FDDRC_SLANT_0_0 +260 0x2000 //RX_FDDRC_SLANT_0_1 +261 0x2000 //RX_FDDRC_SLANT_0_2 +262 0x2000 //RX_FDDRC_SLANT_0_3 +263 0x5333 //RX_FDDRC_SLANT_1_0 +264 0x5333 //RX_FDDRC_SLANT_1_1 +265 0x5333 //RX_FDDRC_SLANT_1_2 +266 0x5333 //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +268 0x0002 //RX_FILTINDX +269 0x0001 //RX_TDDRC_THRD_0 +270 0x0002 //RX_TDDRC_THRD_1 +271 0x1800 //RX_TDDRC_THRD_2 +272 0x1800 //RX_TDDRC_THRD_3 +273 0x3000 //RX_TDDRC_SLANT_0 +274 0x6E00 //RX_TDDRC_SLANT_1 +275 0x1000 //RX_TDDRC_ALPHA_UP_0 +276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x199A //RX_TDDRC_HMNC_GAIN +279 0x0001 //RX_TDDRC_SMT_FLAG +280 0x0CCD //RX_TDDRC_SMT_W +281 0x0523 //RX_TDDRC_DRC_GAIN +282 0x7C00 //RX_LAMBDA_PKA_FP +283 0x13E0 //RX_TPKA_FP +284 0x0080 //RX_MIN_G_FP +285 0x2000 //RX_MAX_G_FP +286 0x000B //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 +288 0x0000 //RX_MAXLEVEL_CNG +289 0x3000 //RX_BWE_UV_TH +290 0x3000 //RX_BWE_UV_TH2 +291 0x1800 //RX_BWE_UV_TH3 +292 0x1000 //RX_BWE_V_TH +293 0x04CD //RX_BWE_GAIN1_V_TH1 +294 0x0F33 //RX_BWE_GAIN1_V_TH2 +295 0x7333 //RX_BWE_UV_EQ +296 0x199A //RX_BWE_V_EQ +297 0x7333 //RX_BWE_TONE_TH +298 0x0004 //RX_BWE_UV_HOLD_T +299 0x6CCD //RX_BWE_GAIN2_ALPHA +300 0x799A //RX_BWE_GAIN3_ALPHA +301 0x001E //RX_BWE_CUTOFF +302 0x3000 //RX_BWE_GAINFILL +303 0x3200 //RX_BWE_MAXTH_TONE +304 0x2000 //RX_BWE_EQ_0 +305 0x2000 //RX_BWE_EQ_1 +306 0x2000 //RX_BWE_EQ_2 +307 0x2000 //RX_BWE_EQ_3 +308 0x2000 //RX_BWE_EQ_4 +309 0x2000 //RX_BWE_EQ_5 +310 0x2000 //RX_BWE_EQ_6 +311 0x0000 //RX_BWE_RESRV_0 +312 0x0000 //RX_BWE_RESRV_1 +313 0x0000 //RX_BWE_RESRV_2 +#VOL 0 +163 0x1000 //RX_TDDRC_ALPHA_UP_1 +164 0x1000 //RX_TDDRC_ALPHA_UP_2 +165 0x1000 //RX_TDDRC_ALPHA_UP_3 +166 0x1000 //RX_TDDRC_ALPHA_UP_4 +184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +190 0x7000 //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +269 0x0001 //RX_TDDRC_THRD_0 +270 0x0002 //RX_TDDRC_THRD_1 +271 0x1800 //RX_TDDRC_THRD_2 +272 0x1800 //RX_TDDRC_THRD_3 +273 0x3000 //RX_TDDRC_SLANT_0 +274 0x6E00 //RX_TDDRC_SLANT_1 +275 0x1000 //RX_TDDRC_ALPHA_UP_0 +276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x199A //RX_TDDRC_HMNC_GAIN +279 0x0001 //RX_TDDRC_SMT_FLAG +280 0x0CCD //RX_TDDRC_SMT_W +281 0x0523 //RX_TDDRC_DRC_GAIN +195 0x0020 //RX_FDEQ_SUBNUM +196 0x4840 //RX_FDEQ_GAIN_0 +197 0x4040 //RX_FDEQ_GAIN_1 +198 0x4050 //RX_FDEQ_GAIN_2 +199 0x5D6C //RX_FDEQ_GAIN_3 +200 0x7B86 //RX_FDEQ_GAIN_4 +201 0x8186 //RX_FDEQ_GAIN_5 +202 0x8688 //RX_FDEQ_GAIN_6 +203 0x9097 //RX_FDEQ_GAIN_7 +204 0x929F //RX_FDEQ_GAIN_8 +205 0x9CA0 //RX_FDEQ_GAIN_9 +206 0xA391 //RX_FDEQ_GAIN_10 +207 0x8A82 //RX_FDEQ_GAIN_11 +208 0x726E //RX_FDEQ_GAIN_12 +209 0x704E //RX_FDEQ_GAIN_13 +210 0x6565 //RX_FDEQ_GAIN_14 +211 0x698A //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0202 //RX_FDEQ_BIN_0 +221 0x0202 //RX_FDEQ_BIN_1 +222 0x0302 //RX_FDEQ_BIN_2 +223 0x0304 //RX_FDEQ_BIN_3 +224 0x0405 //RX_FDEQ_BIN_4 +225 0x0506 //RX_FDEQ_BIN_5 +226 0x0708 //RX_FDEQ_BIN_6 +227 0x090A //RX_FDEQ_BIN_7 +228 0x0B0C //RX_FDEQ_BIN_8 +229 0x0D0E //RX_FDEQ_BIN_9 +230 0x1013 //RX_FDEQ_BIN_10 +231 0x1719 //RX_FDEQ_BIN_11 +232 0x1B1E //RX_FDEQ_BIN_12 +233 0x1E1E //RX_FDEQ_BIN_13 +234 0x1E28 //RX_FDEQ_BIN_14 +235 0x282C //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x4000 //RX_FDEQ_RESRV_0 +245 0x0320 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0030 //RX_FDDRC_BAND_MARGIN_1 +248 0x0050 //RX_FDDRC_BAND_MARGIN_2 +249 0x0080 //RX_FDDRC_BAND_MARGIN_3 +250 0x0007 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x5000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x6400 //RX_FDDRC_THRD_3_2 +258 0x6400 //RX_FDDRC_THRD_3_3 +259 0x2000 //RX_FDDRC_SLANT_0_0 +260 0x2000 //RX_FDDRC_SLANT_0_1 +261 0x2000 //RX_FDDRC_SLANT_0_2 +262 0x2000 //RX_FDDRC_SLANT_0_3 +263 0x5333 //RX_FDDRC_SLANT_1_0 +264 0x5333 //RX_FDDRC_SLANT_1_1 +265 0x5333 //RX_FDDRC_SLANT_1_2 +266 0x5333 //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +286 0x000B //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 +#VOL 1 +163 0x1000 //RX_TDDRC_ALPHA_UP_1 +164 0x1000 //RX_TDDRC_ALPHA_UP_2 +165 0x1000 //RX_TDDRC_ALPHA_UP_3 +166 0x1000 //RX_TDDRC_ALPHA_UP_4 +184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +190 0x7000 //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +269 0x0001 //RX_TDDRC_THRD_0 +270 0x0002 //RX_TDDRC_THRD_1 +271 0x1800 //RX_TDDRC_THRD_2 +272 0x1800 //RX_TDDRC_THRD_3 +273 0x3000 //RX_TDDRC_SLANT_0 +274 0x6E00 //RX_TDDRC_SLANT_1 +275 0x1000 //RX_TDDRC_ALPHA_UP_0 +276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x199A //RX_TDDRC_HMNC_GAIN +279 0x0001 //RX_TDDRC_SMT_FLAG +280 0x0CCD //RX_TDDRC_SMT_W +281 0x04E6 //RX_TDDRC_DRC_GAIN +195 0x0020 //RX_FDEQ_SUBNUM +196 0x4840 //RX_FDEQ_GAIN_0 +197 0x4040 //RX_FDEQ_GAIN_1 +198 0x4050 //RX_FDEQ_GAIN_2 +199 0x5D6C //RX_FDEQ_GAIN_3 +200 0x7B86 //RX_FDEQ_GAIN_4 +201 0x8186 //RX_FDEQ_GAIN_5 +202 0x8688 //RX_FDEQ_GAIN_6 +203 0x9097 //RX_FDEQ_GAIN_7 +204 0x929F //RX_FDEQ_GAIN_8 +205 0x9CA0 //RX_FDEQ_GAIN_9 +206 0xA391 //RX_FDEQ_GAIN_10 +207 0x8A82 //RX_FDEQ_GAIN_11 +208 0x726E //RX_FDEQ_GAIN_12 +209 0x704E //RX_FDEQ_GAIN_13 +210 0x6565 //RX_FDEQ_GAIN_14 +211 0x698A //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0202 //RX_FDEQ_BIN_0 +221 0x0202 //RX_FDEQ_BIN_1 +222 0x0302 //RX_FDEQ_BIN_2 +223 0x0304 //RX_FDEQ_BIN_3 +224 0x0405 //RX_FDEQ_BIN_4 +225 0x0506 //RX_FDEQ_BIN_5 +226 0x0708 //RX_FDEQ_BIN_6 +227 0x090A //RX_FDEQ_BIN_7 +228 0x0B0C //RX_FDEQ_BIN_8 +229 0x0D0E //RX_FDEQ_BIN_9 +230 0x1013 //RX_FDEQ_BIN_10 +231 0x1719 //RX_FDEQ_BIN_11 +232 0x1B1E //RX_FDEQ_BIN_12 +233 0x1E1E //RX_FDEQ_BIN_13 +234 0x1E28 //RX_FDEQ_BIN_14 +235 0x282C //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x4000 //RX_FDEQ_RESRV_0 +245 0x0320 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0030 //RX_FDDRC_BAND_MARGIN_1 +248 0x0050 //RX_FDDRC_BAND_MARGIN_2 +249 0x0080 //RX_FDDRC_BAND_MARGIN_3 +250 0x0007 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x5000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x6400 //RX_FDDRC_THRD_3_2 +258 0x6400 //RX_FDDRC_THRD_3_3 +259 0x2000 //RX_FDDRC_SLANT_0_0 +260 0x2000 //RX_FDDRC_SLANT_0_1 +261 0x2000 //RX_FDDRC_SLANT_0_2 +262 0x2000 //RX_FDDRC_SLANT_0_3 +263 0x5333 //RX_FDDRC_SLANT_1_0 +264 0x5333 //RX_FDDRC_SLANT_1_1 +265 0x5333 //RX_FDDRC_SLANT_1_2 +266 0x5333 //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +286 0x0013 //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 +#VOL 2 +163 0x1000 //RX_TDDRC_ALPHA_UP_1 +164 0x1000 //RX_TDDRC_ALPHA_UP_2 +165 0x1000 //RX_TDDRC_ALPHA_UP_3 +166 0x1000 //RX_TDDRC_ALPHA_UP_4 +184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +190 0x7000 //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +269 0x0001 //RX_TDDRC_THRD_0 +270 0x0002 //RX_TDDRC_THRD_1 +271 0x1800 //RX_TDDRC_THRD_2 +272 0x1800 //RX_TDDRC_THRD_3 +273 0x3000 //RX_TDDRC_SLANT_0 +274 0x6E00 //RX_TDDRC_SLANT_1 +275 0x1000 //RX_TDDRC_ALPHA_UP_0 +276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x199A //RX_TDDRC_HMNC_GAIN +279 0x0001 //RX_TDDRC_SMT_FLAG +280 0x0CCD //RX_TDDRC_SMT_W +281 0x04E6 //RX_TDDRC_DRC_GAIN +195 0x0020 //RX_FDEQ_SUBNUM +196 0x4840 //RX_FDEQ_GAIN_0 +197 0x4040 //RX_FDEQ_GAIN_1 +198 0x4050 //RX_FDEQ_GAIN_2 +199 0x5D6C //RX_FDEQ_GAIN_3 +200 0x7B86 //RX_FDEQ_GAIN_4 +201 0x8186 //RX_FDEQ_GAIN_5 +202 0x8688 //RX_FDEQ_GAIN_6 +203 0x9097 //RX_FDEQ_GAIN_7 +204 0x929F //RX_FDEQ_GAIN_8 +205 0x9CA0 //RX_FDEQ_GAIN_9 +206 0xA391 //RX_FDEQ_GAIN_10 +207 0x8A82 //RX_FDEQ_GAIN_11 +208 0x726E //RX_FDEQ_GAIN_12 +209 0x704E //RX_FDEQ_GAIN_13 +210 0x6565 //RX_FDEQ_GAIN_14 +211 0x698A //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0202 //RX_FDEQ_BIN_0 +221 0x0202 //RX_FDEQ_BIN_1 +222 0x0302 //RX_FDEQ_BIN_2 +223 0x0304 //RX_FDEQ_BIN_3 +224 0x0405 //RX_FDEQ_BIN_4 +225 0x0506 //RX_FDEQ_BIN_5 +226 0x0708 //RX_FDEQ_BIN_6 +227 0x090A //RX_FDEQ_BIN_7 +228 0x0B0C //RX_FDEQ_BIN_8 +229 0x0D0E //RX_FDEQ_BIN_9 +230 0x1013 //RX_FDEQ_BIN_10 +231 0x1719 //RX_FDEQ_BIN_11 +232 0x1B1E //RX_FDEQ_BIN_12 +233 0x1E1E //RX_FDEQ_BIN_13 +234 0x1E28 //RX_FDEQ_BIN_14 +235 0x282C //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x4000 //RX_FDEQ_RESRV_0 +245 0x0320 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0030 //RX_FDDRC_BAND_MARGIN_1 +248 0x0050 //RX_FDDRC_BAND_MARGIN_2 +249 0x0080 //RX_FDDRC_BAND_MARGIN_3 +250 0x0007 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x5000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x6400 //RX_FDDRC_THRD_3_2 +258 0x6400 //RX_FDDRC_THRD_3_3 +259 0x2000 //RX_FDDRC_SLANT_0_0 +260 0x2000 //RX_FDDRC_SLANT_0_1 +261 0x2000 //RX_FDDRC_SLANT_0_2 +262 0x2000 //RX_FDDRC_SLANT_0_3 +263 0x5333 //RX_FDDRC_SLANT_1_0 +264 0x5333 //RX_FDDRC_SLANT_1_1 +265 0x5333 //RX_FDDRC_SLANT_1_2 +266 0x5333 //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +286 0x001F //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 +#VOL 3 +163 0x1000 //RX_TDDRC_ALPHA_UP_1 +164 0x1000 //RX_TDDRC_ALPHA_UP_2 +165 0x1000 //RX_TDDRC_ALPHA_UP_3 +166 0x1000 //RX_TDDRC_ALPHA_UP_4 +184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +190 0x7000 //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +269 0x0001 //RX_TDDRC_THRD_0 +270 0x0002 //RX_TDDRC_THRD_1 +271 0x1800 //RX_TDDRC_THRD_2 +272 0x1800 //RX_TDDRC_THRD_3 +273 0x3000 //RX_TDDRC_SLANT_0 +274 0x6E00 //RX_TDDRC_SLANT_1 +275 0x1000 //RX_TDDRC_ALPHA_UP_0 +276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x199A //RX_TDDRC_HMNC_GAIN +279 0x0001 //RX_TDDRC_SMT_FLAG +280 0x0CCD //RX_TDDRC_SMT_W +281 0x04E6 //RX_TDDRC_DRC_GAIN +195 0x0020 //RX_FDEQ_SUBNUM +196 0x4840 //RX_FDEQ_GAIN_0 +197 0x4040 //RX_FDEQ_GAIN_1 +198 0x4050 //RX_FDEQ_GAIN_2 +199 0x5D6C //RX_FDEQ_GAIN_3 +200 0x7B86 //RX_FDEQ_GAIN_4 +201 0x8186 //RX_FDEQ_GAIN_5 +202 0x8688 //RX_FDEQ_GAIN_6 +203 0x9097 //RX_FDEQ_GAIN_7 +204 0x929F //RX_FDEQ_GAIN_8 +205 0x9CA0 //RX_FDEQ_GAIN_9 +206 0xA391 //RX_FDEQ_GAIN_10 +207 0x8A82 //RX_FDEQ_GAIN_11 +208 0x726E //RX_FDEQ_GAIN_12 +209 0x704E //RX_FDEQ_GAIN_13 +210 0x6565 //RX_FDEQ_GAIN_14 +211 0x698A //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0202 //RX_FDEQ_BIN_0 +221 0x0202 //RX_FDEQ_BIN_1 +222 0x0302 //RX_FDEQ_BIN_2 +223 0x0304 //RX_FDEQ_BIN_3 +224 0x0405 //RX_FDEQ_BIN_4 +225 0x0506 //RX_FDEQ_BIN_5 +226 0x0708 //RX_FDEQ_BIN_6 +227 0x090A //RX_FDEQ_BIN_7 +228 0x0B0C //RX_FDEQ_BIN_8 +229 0x0D0E //RX_FDEQ_BIN_9 +230 0x1013 //RX_FDEQ_BIN_10 +231 0x1719 //RX_FDEQ_BIN_11 +232 0x1B1E //RX_FDEQ_BIN_12 +233 0x1E1E //RX_FDEQ_BIN_13 +234 0x1E28 //RX_FDEQ_BIN_14 +235 0x282C //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x4000 //RX_FDEQ_RESRV_0 +245 0x0320 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0030 //RX_FDDRC_BAND_MARGIN_1 +248 0x0050 //RX_FDDRC_BAND_MARGIN_2 +249 0x0080 //RX_FDDRC_BAND_MARGIN_3 +250 0x0007 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x5000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x6400 //RX_FDDRC_THRD_3_2 +258 0x6400 //RX_FDDRC_THRD_3_3 +259 0x2000 //RX_FDDRC_SLANT_0_0 +260 0x2000 //RX_FDDRC_SLANT_0_1 +261 0x2000 //RX_FDDRC_SLANT_0_2 +262 0x2000 //RX_FDDRC_SLANT_0_3 +263 0x5333 //RX_FDDRC_SLANT_1_0 +264 0x5333 //RX_FDDRC_SLANT_1_1 +265 0x5333 //RX_FDDRC_SLANT_1_2 +266 0x5333 //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +286 0x0032 //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 +#VOL 4 +163 0x1000 //RX_TDDRC_ALPHA_UP_1 +164 0x1000 //RX_TDDRC_ALPHA_UP_2 +165 0x1000 //RX_TDDRC_ALPHA_UP_3 +166 0x1000 //RX_TDDRC_ALPHA_UP_4 +184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +190 0x7000 //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +269 0x0001 //RX_TDDRC_THRD_0 +270 0x0002 //RX_TDDRC_THRD_1 +271 0x1800 //RX_TDDRC_THRD_2 +272 0x1800 //RX_TDDRC_THRD_3 +273 0x3000 //RX_TDDRC_SLANT_0 +274 0x6E00 //RX_TDDRC_SLANT_1 +275 0x1000 //RX_TDDRC_ALPHA_UP_0 +276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x199A //RX_TDDRC_HMNC_GAIN +279 0x0001 //RX_TDDRC_SMT_FLAG +280 0x0CCD //RX_TDDRC_SMT_W +281 0x04E6 //RX_TDDRC_DRC_GAIN +195 0x0020 //RX_FDEQ_SUBNUM +196 0x4840 //RX_FDEQ_GAIN_0 +197 0x4040 //RX_FDEQ_GAIN_1 +198 0x4050 //RX_FDEQ_GAIN_2 +199 0x5D6C //RX_FDEQ_GAIN_3 +200 0x7B86 //RX_FDEQ_GAIN_4 +201 0x8186 //RX_FDEQ_GAIN_5 +202 0x8688 //RX_FDEQ_GAIN_6 +203 0x9097 //RX_FDEQ_GAIN_7 +204 0x929F //RX_FDEQ_GAIN_8 +205 0x9CA0 //RX_FDEQ_GAIN_9 +206 0xA391 //RX_FDEQ_GAIN_10 +207 0x8A82 //RX_FDEQ_GAIN_11 +208 0x726E //RX_FDEQ_GAIN_12 +209 0x704E //RX_FDEQ_GAIN_13 +210 0x6565 //RX_FDEQ_GAIN_14 +211 0x698A //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0202 //RX_FDEQ_BIN_0 +221 0x0202 //RX_FDEQ_BIN_1 +222 0x0302 //RX_FDEQ_BIN_2 +223 0x0304 //RX_FDEQ_BIN_3 +224 0x0405 //RX_FDEQ_BIN_4 +225 0x0506 //RX_FDEQ_BIN_5 +226 0x0708 //RX_FDEQ_BIN_6 +227 0x090A //RX_FDEQ_BIN_7 +228 0x0B0C //RX_FDEQ_BIN_8 +229 0x0D0E //RX_FDEQ_BIN_9 +230 0x1013 //RX_FDEQ_BIN_10 +231 0x1719 //RX_FDEQ_BIN_11 +232 0x1B1E //RX_FDEQ_BIN_12 +233 0x1E1E //RX_FDEQ_BIN_13 +234 0x1E28 //RX_FDEQ_BIN_14 +235 0x282C //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x4000 //RX_FDEQ_RESRV_0 +245 0x0320 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0030 //RX_FDDRC_BAND_MARGIN_1 +248 0x0050 //RX_FDDRC_BAND_MARGIN_2 +249 0x0080 //RX_FDDRC_BAND_MARGIN_3 +250 0x0007 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x5000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x6400 //RX_FDDRC_THRD_3_2 +258 0x6400 //RX_FDDRC_THRD_3_3 +259 0x2000 //RX_FDDRC_SLANT_0_0 +260 0x2000 //RX_FDDRC_SLANT_0_1 +261 0x2000 //RX_FDDRC_SLANT_0_2 +262 0x2000 //RX_FDDRC_SLANT_0_3 +263 0x5333 //RX_FDDRC_SLANT_1_0 +264 0x5333 //RX_FDDRC_SLANT_1_1 +265 0x5333 //RX_FDDRC_SLANT_1_2 +266 0x5333 //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +286 0x0052 //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 +#VOL 5 +163 0x1000 //RX_TDDRC_ALPHA_UP_1 +164 0x1000 //RX_TDDRC_ALPHA_UP_2 +165 0x1000 //RX_TDDRC_ALPHA_UP_3 +166 0x1000 //RX_TDDRC_ALPHA_UP_4 +184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +190 0x7000 //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +269 0x0001 //RX_TDDRC_THRD_0 +270 0x0002 //RX_TDDRC_THRD_1 +271 0x1800 //RX_TDDRC_THRD_2 +272 0x1800 //RX_TDDRC_THRD_3 +273 0x3000 //RX_TDDRC_SLANT_0 +274 0x6E00 //RX_TDDRC_SLANT_1 +275 0x1000 //RX_TDDRC_ALPHA_UP_0 +276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x199A //RX_TDDRC_HMNC_GAIN +279 0x0001 //RX_TDDRC_SMT_FLAG +280 0x0CCD //RX_TDDRC_SMT_W +281 0x04E6 //RX_TDDRC_DRC_GAIN +195 0x0020 //RX_FDEQ_SUBNUM +196 0x4840 //RX_FDEQ_GAIN_0 +197 0x4040 //RX_FDEQ_GAIN_1 +198 0x4050 //RX_FDEQ_GAIN_2 +199 0x5D6C //RX_FDEQ_GAIN_3 +200 0x7B86 //RX_FDEQ_GAIN_4 +201 0x8186 //RX_FDEQ_GAIN_5 +202 0x8688 //RX_FDEQ_GAIN_6 +203 0x9097 //RX_FDEQ_GAIN_7 +204 0x929F //RX_FDEQ_GAIN_8 +205 0x9CA0 //RX_FDEQ_GAIN_9 +206 0xA391 //RX_FDEQ_GAIN_10 +207 0x8A82 //RX_FDEQ_GAIN_11 +208 0x726E //RX_FDEQ_GAIN_12 +209 0x704E //RX_FDEQ_GAIN_13 +210 0x6565 //RX_FDEQ_GAIN_14 +211 0x698A //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0202 //RX_FDEQ_BIN_0 +221 0x0202 //RX_FDEQ_BIN_1 +222 0x0302 //RX_FDEQ_BIN_2 +223 0x0304 //RX_FDEQ_BIN_3 +224 0x0405 //RX_FDEQ_BIN_4 +225 0x0506 //RX_FDEQ_BIN_5 +226 0x0708 //RX_FDEQ_BIN_6 +227 0x090A //RX_FDEQ_BIN_7 +228 0x0B0C //RX_FDEQ_BIN_8 +229 0x0D0E //RX_FDEQ_BIN_9 +230 0x1013 //RX_FDEQ_BIN_10 +231 0x1719 //RX_FDEQ_BIN_11 +232 0x1B1E //RX_FDEQ_BIN_12 +233 0x1E1E //RX_FDEQ_BIN_13 +234 0x1E28 //RX_FDEQ_BIN_14 +235 0x282C //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x4000 //RX_FDEQ_RESRV_0 +245 0x0320 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0030 //RX_FDDRC_BAND_MARGIN_1 +248 0x0050 //RX_FDDRC_BAND_MARGIN_2 +249 0x0080 //RX_FDDRC_BAND_MARGIN_3 +250 0x0007 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x5000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x6400 //RX_FDDRC_THRD_3_2 +258 0x6400 //RX_FDDRC_THRD_3_3 +259 0x2000 //RX_FDDRC_SLANT_0_0 +260 0x2000 //RX_FDDRC_SLANT_0_1 +261 0x2000 //RX_FDDRC_SLANT_0_2 +262 0x2000 //RX_FDDRC_SLANT_0_3 +263 0x5333 //RX_FDDRC_SLANT_1_0 +264 0x5333 //RX_FDDRC_SLANT_1_1 +265 0x5333 //RX_FDDRC_SLANT_1_2 +266 0x5333 //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +286 0x0087 //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 +#VOL 6 +163 0x1000 //RX_TDDRC_ALPHA_UP_1 +164 0x1000 //RX_TDDRC_ALPHA_UP_2 +165 0x1000 //RX_TDDRC_ALPHA_UP_3 +166 0x1000 //RX_TDDRC_ALPHA_UP_4 +184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +190 0x7000 //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +269 0x0001 //RX_TDDRC_THRD_0 +270 0x0002 //RX_TDDRC_THRD_1 +271 0x1800 //RX_TDDRC_THRD_2 +272 0x1800 //RX_TDDRC_THRD_3 +273 0x3000 //RX_TDDRC_SLANT_0 +274 0x6E00 //RX_TDDRC_SLANT_1 +275 0x1000 //RX_TDDRC_ALPHA_UP_0 +276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x199A //RX_TDDRC_HMNC_GAIN +279 0x0001 //RX_TDDRC_SMT_FLAG +280 0x0CCD //RX_TDDRC_SMT_W +281 0x04E6 //RX_TDDRC_DRC_GAIN +195 0x0020 //RX_FDEQ_SUBNUM +196 0x4840 //RX_FDEQ_GAIN_0 +197 0x4040 //RX_FDEQ_GAIN_1 +198 0x4050 //RX_FDEQ_GAIN_2 +199 0x5D6C //RX_FDEQ_GAIN_3 +200 0x7B86 //RX_FDEQ_GAIN_4 +201 0x8186 //RX_FDEQ_GAIN_5 +202 0x8688 //RX_FDEQ_GAIN_6 +203 0x9097 //RX_FDEQ_GAIN_7 +204 0x929F //RX_FDEQ_GAIN_8 +205 0x9CA0 //RX_FDEQ_GAIN_9 +206 0xA391 //RX_FDEQ_GAIN_10 +207 0x8A82 //RX_FDEQ_GAIN_11 +208 0x726E //RX_FDEQ_GAIN_12 +209 0x704E //RX_FDEQ_GAIN_13 +210 0x6565 //RX_FDEQ_GAIN_14 +211 0x698A //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0202 //RX_FDEQ_BIN_0 +221 0x0202 //RX_FDEQ_BIN_1 +222 0x0302 //RX_FDEQ_BIN_2 +223 0x0304 //RX_FDEQ_BIN_3 +224 0x0405 //RX_FDEQ_BIN_4 +225 0x0506 //RX_FDEQ_BIN_5 +226 0x0708 //RX_FDEQ_BIN_6 +227 0x090A //RX_FDEQ_BIN_7 +228 0x0B0C //RX_FDEQ_BIN_8 +229 0x0D0E //RX_FDEQ_BIN_9 +230 0x1013 //RX_FDEQ_BIN_10 +231 0x1719 //RX_FDEQ_BIN_11 +232 0x1B1E //RX_FDEQ_BIN_12 +233 0x1E1E //RX_FDEQ_BIN_13 +234 0x1E28 //RX_FDEQ_BIN_14 +235 0x282C //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x4000 //RX_FDEQ_RESRV_0 +245 0x0320 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0030 //RX_FDDRC_BAND_MARGIN_1 +248 0x0050 //RX_FDDRC_BAND_MARGIN_2 +249 0x0080 //RX_FDDRC_BAND_MARGIN_3 +250 0x0007 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x5000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x6400 //RX_FDDRC_THRD_3_2 +258 0x6400 //RX_FDDRC_THRD_3_3 +259 0x2000 //RX_FDDRC_SLANT_0_0 +260 0x2000 //RX_FDDRC_SLANT_0_1 +261 0x2000 //RX_FDDRC_SLANT_0_2 +262 0x2000 //RX_FDDRC_SLANT_0_3 +263 0x5333 //RX_FDDRC_SLANT_1_0 +264 0x5333 //RX_FDDRC_SLANT_1_1 +265 0x5333 //RX_FDDRC_SLANT_1_2 +266 0x5333 //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +286 0x0100 //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 #CASE_NAME HANDSET-HANDSET-VOICE_GENERIC-FB -#PARAM_TYPE TX+RX -#TOTAL_CUSTOM_STEP 7 +#PARAM_MODE Full +#PARAM_TYPE TX+2RX +#TOTAL_CUSTOM_STEP 7+7 #TX 0 0x0000 //TX_OPERATION_MODE_0 1 0x0000 //TX_OPERATION_MODE_1 @@ -10546,7 +16049,7 @@ 18 0x0000 //TX_SYS_RESRV_2 19 0x0000 //TX_SYS_RESRV_3 20 0x0000 //TX_DIST2REF0 -21 0x009D //TX_DIST2REF1 +21 0x009C //TX_DIST2REF1 22 0x0000 //TX_DIST2REF_02 23 0x0000 //TX_DIST2REF_03 24 0x0000 //TX_DIST2REF_04 @@ -10776,12 +16279,12 @@ 248 0xF800 //TX_THR_SN_EST_6 249 0xF700 //TX_THR_SN_EST_7 250 0x0000 //TX_DELTA_THR_SN_EST_0 -251 0x0100 //TX_DELTA_THR_SN_EST_1 +251 0x0200 //TX_DELTA_THR_SN_EST_1 252 0x0200 //TX_DELTA_THR_SN_EST_2 253 0x0200 //TX_DELTA_THR_SN_EST_3 -254 0x0200 //TX_DELTA_THR_SN_EST_4 -255 0x0100 //TX_DELTA_THR_SN_EST_5 -256 0x0200 //TX_DELTA_THR_SN_EST_6 +254 0x0100 //TX_DELTA_THR_SN_EST_4 +255 0x0200 //TX_DELTA_THR_SN_EST_5 +256 0x0100 //TX_DELTA_THR_SN_EST_6 257 0x0200 //TX_DELTA_THR_SN_EST_7 258 0x4000 //TX_LAMBDA_NN_EST_0 259 0x4000 //TX_LAMBDA_NN_EST_1 @@ -10809,16 +16312,16 @@ 281 0x0014 //TX_NS_LVL_CTRL_0 282 0x0016 //TX_NS_LVL_CTRL_1 283 0x0016 //TX_NS_LVL_CTRL_2 -284 0x0016 //TX_NS_LVL_CTRL_3 -285 0x0018 //TX_NS_LVL_CTRL_4 -286 0x0016 //TX_NS_LVL_CTRL_5 -287 0x0012 //TX_NS_LVL_CTRL_6 +284 0x0018 //TX_NS_LVL_CTRL_3 +285 0x0016 //TX_NS_LVL_CTRL_4 +286 0x0012 //TX_NS_LVL_CTRL_5 +287 0x0016 //TX_NS_LVL_CTRL_6 288 0x0017 //TX_NS_LVL_CTRL_7 289 0x000E //TX_MIN_GAIN_S_0 -290 0x0012 //TX_MIN_GAIN_S_1 -291 0x0007 //TX_MIN_GAIN_S_2 -292 0x0012 //TX_MIN_GAIN_S_3 -293 0x0010 //TX_MIN_GAIN_S_4 +290 0x0007 //TX_MIN_GAIN_S_1 +291 0x0012 //TX_MIN_GAIN_S_2 +292 0x0010 //TX_MIN_GAIN_S_3 +293 0x0012 //TX_MIN_GAIN_S_4 294 0x0012 //TX_MIN_GAIN_S_5 295 0x0012 //TX_MIN_GAIN_S_6 296 0x0012 //TX_MIN_GAIN_S_7 @@ -10840,29 +16343,29 @@ 312 0x7FFF //TX_A_POST_FILT_0 313 0x2000 //TX_A_POST_FILT_1 314 0x4000 //TX_A_POST_FILT_S_0 -315 0x5000 //TX_A_POST_FILT_S_1 +315 0x4000 //TX_A_POST_FILT_S_1 316 0x4000 //TX_A_POST_FILT_S_2 317 0x4000 //TX_A_POST_FILT_S_3 318 0x4000 //TX_A_POST_FILT_S_4 319 0x4000 //TX_A_POST_FILT_S_5 -320 0x4000 //TX_A_POST_FILT_S_6 +320 0x5000 //TX_A_POST_FILT_S_6 321 0x7000 //TX_A_POST_FILT_S_7 322 0x1000 //TX_B_POST_FILT_0 323 0x2000 //TX_B_POST_FILT_1 -324 0x3000 //TX_B_POST_FILT_2 +324 0x2000 //TX_B_POST_FILT_2 325 0x2000 //TX_B_POST_FILT_3 -326 0x5000 //TX_B_POST_FILT_4 +326 0x2000 //TX_B_POST_FILT_4 327 0x2000 //TX_B_POST_FILT_5 -328 0x6000 //TX_B_POST_FILT_6 +328 0x3000 //TX_B_POST_FILT_6 329 0x3000 //TX_B_POST_FILT_7 330 0x1000 //TX_B_LESSCUT_RTO_S_0 -331 0x6000 //TX_B_LESSCUT_RTO_S_1 -332 0x6000 //TX_B_LESSCUT_RTO_S_2 -333 0x6000 //TX_B_LESSCUT_RTO_S_3 -334 0x6000 //TX_B_LESSCUT_RTO_S_4 -335 0x6000 //TX_B_LESSCUT_RTO_S_5 -336 0x7FFF //TX_B_LESSCUT_RTO_S_6 -337 0x7FFF //TX_B_LESSCUT_RTO_S_7 +331 0x1000 //TX_B_LESSCUT_RTO_S_1 +332 0x1000 //TX_B_LESSCUT_RTO_S_2 +333 0x1000 //TX_B_LESSCUT_RTO_S_3 +334 0x1000 //TX_B_LESSCUT_RTO_S_4 +335 0x1000 //TX_B_LESSCUT_RTO_S_5 +336 0x1000 //TX_B_LESSCUT_RTO_S_6 +337 0x1000 //TX_B_LESSCUT_RTO_S_7 338 0x7E14 //TX_LAMBDA_PFILT 339 0x7C29 //TX_LAMBDA_PFILT_S_0 340 0x7C29 //TX_LAMBDA_PFILT_S_1 @@ -10905,10 +16408,10 @@ 377 0x4E20 //TX_NOISE_TH_5_4 378 0x39DF //TX_NOISE_TH_6 379 0x0014 //TX_MINENOISE_TH -380 0x4000 //TX_MINENOISE_MIC0_TH_MTS -381 0xFFEE //TX_MINENOISE_MIC0_TH_EXP -382 0x6000 //TX_MINENOISE_MIC0_S_TH_MTS -383 0xFFF3 //TX_MINENOISE_MIC0_S_TH_EXP +380 0xD508 //TX_MORENS_TFMASK_TH +381 0x0001 //TX_DRC_QUIET_FLOOR +382 0x6D60 //TX_RATIODTL_CUT_TH +383 0x1482 //TX_DT_CUT_K1 384 0x00A5 //TX_OUT_ENER_S_TH_CLEAN 385 0x00A5 //TX_OUT_ENER_S_TH_LESSCLEAN 386 0x00A5 //TX_OUT_ENER_S_TH_NOISY @@ -10916,15 +16419,15 @@ 388 0x0200 //TX_OUT_ENER_TH_SPEECH 389 0x2000 //TX_SN_NPB_GAIN 390 0x0000 //TX_NN_NPB_GAIN -391 0x0000 //TX_CSX_ALPHA_0 -392 0x0000 //TX_CSX_ALPHA_1 -393 0x0000 //TX_CSX_ALPHA_2 -394 0x0000 //TX_CSX_ALPHA_3 -395 0x0800 //TX_MU_ARSP_EST -396 0x00C8 //TX_P_OUTBEAM_MIN_TH +391 0x3000 //TX_POST_MASK_SUP_HSNE +392 0x07D0 //TX_TAIL_DET_TH +393 0x4000 //TX_B_LESSCUT_RTO_WTA +394 0x0000 //TX_MEL_G_R +395 0x0080 //TX_SUPHIGH_TH +396 0x0000 //TX_MASK_G_R 397 0x0002 //TX_EXTRA_NS_L -398 0x0800 //TX_EXTRA_NS_A -399 0x0005 //TX_VR_NOISE_FLOOR_TH +398 0x1800 //TX_C_POST_FLT_MASK +399 0x7FFF //TX_A_POST_FLT_WNS 400 0x0148 //TX_MIN_G_LOW300HZ 401 0x0004 //TX_MAXLEVEL_CNG 402 0x00B4 //TX_STN_NOISE_TH @@ -11039,16 +16542,16 @@ 511 0x6666 //TX_MIC_TO_BFGAIN 512 0x0000 //TX_MICTOBFGAIN0 513 0x0000 //TX_FASTMUE_TH -514 0x0000 //TX_DERVB_LEN_0 -515 0x0000 //TX_DERVB_LEN_1 -516 0x0000 //TX_RHO_DERVB -517 0x0000 //TX_MIC_INDX_DERVB -518 0x0000 //TX_MU_DERVB -519 0x0000 //TX_DR_RESRV_0 -520 0x0000 //TX_DR_RESRV_1 -521 0x0000 //TX_DR_RESRV_2 -522 0x0000 //TX_DR_RESRV_3 -523 0x0000 //TX_DR_RESRV_4 +514 0x2CCC //TX_DEREVERB_LF_MU +515 0x3200 //TX_DEREVERB_HF_MU +516 0x0007 //TX_DEREVERB_DELAY +517 0x0004 //TX_DEREVERB_COEF_LEN +518 0x0003 //TX_DEREVERB_DNR +519 0x0000 //TX_DEREVERB_ALPHA +520 0x0000 //TX_DEREVERB_BETA +521 0x7FFF //TX_GSC_RTOL_TH +522 0x7FFF //TX_GSC_RTOH_TH +523 0x7E2C //TX_WIDE2_MEANHTH 524 0x0000 //TX_DR_RESRV_5 525 0x0000 //TX_DR_RESRV_6 526 0x0000 //TX_DR_RESRV_7 @@ -11422,8 +16925,73 @@ 894 0xC000 //TX_FASTNS_SSA_THHFL 895 0xCCCC //TX_FASTNS_SSA_THLFH 896 0xD999 //TX_FASTNS_SSA_THHFH +897 0x2339 //TX_SENDFUNC_REG_MICMUTE +898 0x0021 //TX_SENDFUNC_REG_MICMUTE1 +899 0x02BC //TX_MICMUTE_RATIO_THR +900 0x0140 //TX_MICMUTE_AMP_THR +901 0x0004 //TX_MICMUTE_HPF_IND +902 0x00C0 //TX_MICMUTE_LOG_EYR_TH +903 0x0008 //TX_MICMUTE_CVG_TIME +904 0x0008 //TX_MICMUTE_RELEASE_TIME +905 0x01FE //TX_MIC_VOLUME_MIC0MUTE +906 0x0020 //TX_MICMUTE_EPD_OFFSET_0 +907 0x001E //TX_MICMUTE_FRQ_AEC_L +908 0x7999 //TX_MICMUTE_EAD_THR +909 0x7FFF //TX_MICMUTE_LAMBDA_CB_NLE +910 0x7FFF //TX_MICMUTE_LAMBDA_RE_EST +911 0x4000 //TX_DTD_THR1_MICMUTE_0 +912 0x7000 //TX_DTD_THR1_MICMUTE_1 +913 0x7FFF //TX_DTD_THR1_MICMUTE_2 +914 0x7FFF //TX_DTD_THR1_MICMUTE_3 +915 0x6CCC //TX_DTD_THR2_MICMUTE_0 +916 0x0400 //TX_MICMUTE_MIN_EQ_RE_EST_0 +917 0x0400 //TX_MICMUTE_MIN_EQ_RE_EST_1 +918 0x1000 //TX_MICMUTE_MIN_EQ_RE_EST_2 +919 0x7FFF //TX_MICMUTE_MIN_EQ_RE_EST_3 +920 0x7FFF //TX_MICMUTE_MIN_EQ_RE_EST_4 +921 0x4000 //TX_MICMUTE_C_POST_FLT +922 0x03E8 //TX_MICMUTE_DT_CUT_K +923 0x0001 //TX_MICMUTE_DT_CUT_THR +924 0x03E8 //TX_MICMUTE_DT_CUT_K2 +925 0x0001 //TX_MICMUTE_DT_CUT_THR2 +926 0x0064 //TX_MICMUTE_DT2_HOLD_N +927 0x1000 //TX_MICMUTE_RATIODTH_THCUT +928 0x1000 //TX_MICMUTE_B_POST_FLT_ECHOL +929 0x7FFF //TX_MICMUTE_B_POST_FLT_ECHOH +930 0x0400 //TX_MICMUTE_C_POST_FLT_MASK +931 0x7999 //TX_MICMUTE_RATIODTL_CUT_TH +932 0x0258 //TX_MICMUTE_DT_CUT_K1 +933 0x0800 //TX_MICMUTE_N2_SN_EST +934 0xFC00 //TX_MICMUTE_THR_SN_EST_0 +935 0x001C //TX_MICMUTE_MIN_G_CTRL_0 +936 0x6000 //TX_MICMUTE_A_POST_FILT_S_0 +937 0x7000 //TX_MICMUTE_B_POST_FILT_0 +938 0x2710 //TX_MIC1RUB_AMP_THR +939 0x0010 //TX_MIC1MUTE_RATIO_THR +940 0x0450 //TX_MIC1MUTE_AMP_THR +941 0x0008 //TX_MIC1MUTE_CVG_TIME +942 0x0008 //TX_MIC1MUTE_RELEASE_TIME +943 0x0000 //TX_AMS_RESRV_01 +944 0x0000 //TX_AMS_RESRV_02 +945 0x0000 //TX_AMS_RESRV_03 +946 0x0000 //TX_AMS_RESRV_04 +947 0x0000 //TX_AMS_RESRV_05 +948 0x0000 //TX_AMS_RESRV_06 +949 0x0000 //TX_AMS_RESRV_07 +950 0x0000 //TX_AMS_RESRV_08 +951 0x0000 //TX_AMS_RESRV_09 +952 0x0000 //TX_AMS_RESRV_10 +953 0x0000 //TX_AMS_RESRV_11 +954 0x0000 //TX_AMS_RESRV_12 +955 0x0000 //TX_AMS_RESRV_13 +956 0x0000 //TX_AMS_RESRV_14 +957 0x0000 //TX_AMS_RESRV_15 +958 0x0000 //TX_AMS_RESRV_16 +959 0x0000 //TX_AMS_RESRV_17 +960 0x0000 //TX_AMS_RESRV_18 +961 0x0000 //TX_AMS_RESRV_19 #RX -0 0x002C //RX_RECVFUNC_MODE_0 +0 0x202C //RX_RECVFUNC_MODE_0 1 0x0000 //RX_RECVFUNC_MODE_1 2 0x0004 //RX_SAMPLINGFREQ_SIG 3 0x0004 //RX_SAMPLINGFREQ_PROC @@ -12273,14 +17841,866 @@ 110 0x0000 //RX_FDDRC_RESRV_0 129 0x0100 //RX_SPK_VOL 130 0x0000 //RX_VOL_RESRV_0 +#RX 2 +157 0x002C //RX_RECVFUNC_MODE_0 +158 0x0000 //RX_RECVFUNC_MODE_1 +159 0x0004 //RX_SAMPLINGFREQ_SIG +160 0x0004 //RX_SAMPLINGFREQ_PROC +161 0x000A //RX_FRAME_SZ +162 0x0000 //RX_DELAY_OPT +163 0x1000 //RX_TDDRC_ALPHA_UP_1 +164 0x1000 //RX_TDDRC_ALPHA_UP_2 +165 0x1000 //RX_TDDRC_ALPHA_UP_3 +166 0x1000 //RX_TDDRC_ALPHA_UP_4 +167 0x064E //RX_PGA +168 0x7FFF //RX_A_HP +169 0x4000 //RX_B_PE +170 0x5800 //RX_THR_PITCH_DET_0 +171 0x5000 //RX_THR_PITCH_DET_1 +172 0x4000 //RX_THR_PITCH_DET_2 +173 0x0008 //RX_PITCH_BFR_LEN +174 0x0003 //RX_SBD_PITCH_DET +175 0x0100 //RX_PP_RESRV_0 +176 0x0020 //RX_PP_RESRV_1 +177 0x0600 //RX_N_SN_EST +178 0x000C //RX_N2_SN_EST +179 0x000F //RX_NS_LVL_CTRL +180 0xF800 //RX_THR_SN_EST +181 0x7E00 //RX_LAMBDA_PFILT +182 0x000A //RX_FENS_RESRV_0 +183 0x0190 //RX_FENS_RESRV_1 +184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +187 0x0002 //RX_EXTRA_NS_L +188 0x0800 //RX_EXTRA_NS_A +189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +190 0x7000 //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +192 0x199A //RX_A_POST_FLT +193 0x0000 //RX_LMT_THRD +194 0x4000 //RX_LMT_ALPHA +195 0x0020 //RX_FDEQ_SUBNUM +196 0x4848 //RX_FDEQ_GAIN_0 +197 0x4850 //RX_FDEQ_GAIN_1 +198 0x6478 //RX_FDEQ_GAIN_2 +199 0x8689 //RX_FDEQ_GAIN_3 +200 0x908F //RX_FDEQ_GAIN_4 +201 0x9495 //RX_FDEQ_GAIN_5 +202 0x989D //RX_FDEQ_GAIN_6 +203 0x9DA6 //RX_FDEQ_GAIN_7 +204 0xA895 //RX_FDEQ_GAIN_8 +205 0x8A8A //RX_FDEQ_GAIN_9 +206 0x8E78 //RX_FDEQ_GAIN_10 +207 0x7070 //RX_FDEQ_GAIN_11 +208 0x7680 //RX_FDEQ_GAIN_12 +209 0x787C //RX_FDEQ_GAIN_13 +210 0x8890 //RX_FDEQ_GAIN_14 +211 0x9CAC //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0202 //RX_FDEQ_BIN_0 +221 0x0202 //RX_FDEQ_BIN_1 +222 0x0302 //RX_FDEQ_BIN_2 +223 0x0304 //RX_FDEQ_BIN_3 +224 0x0405 //RX_FDEQ_BIN_4 +225 0x0506 //RX_FDEQ_BIN_5 +226 0x0708 //RX_FDEQ_BIN_6 +227 0x090A //RX_FDEQ_BIN_7 +228 0x0B0C //RX_FDEQ_BIN_8 +229 0x0D0E //RX_FDEQ_BIN_9 +230 0x1013 //RX_FDEQ_BIN_10 +231 0x1719 //RX_FDEQ_BIN_11 +232 0x1B1E //RX_FDEQ_BIN_12 +233 0x1E1E //RX_FDEQ_BIN_13 +234 0x1E28 //RX_FDEQ_BIN_14 +235 0x282C //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x4000 //RX_FDEQ_RESRV_0 +245 0x0320 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0030 //RX_FDDRC_BAND_MARGIN_1 +248 0x0050 //RX_FDDRC_BAND_MARGIN_2 +249 0x0080 //RX_FDDRC_BAND_MARGIN_3 +250 0x0007 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x5000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x6400 //RX_FDDRC_THRD_3_2 +258 0x6400 //RX_FDDRC_THRD_3_3 +259 0x2000 //RX_FDDRC_SLANT_0_0 +260 0x2000 //RX_FDDRC_SLANT_0_1 +261 0x2000 //RX_FDDRC_SLANT_0_2 +262 0x2000 //RX_FDDRC_SLANT_0_3 +263 0x5333 //RX_FDDRC_SLANT_1_0 +264 0x5333 //RX_FDDRC_SLANT_1_1 +265 0x5333 //RX_FDDRC_SLANT_1_2 +266 0x5333 //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +268 0x0002 //RX_FILTINDX +269 0x0000 //RX_TDDRC_THRD_0 +270 0x0000 //RX_TDDRC_THRD_1 +271 0x1800 //RX_TDDRC_THRD_2 +272 0x1800 //RX_TDDRC_THRD_3 +273 0x3000 //RX_TDDRC_SLANT_0 +274 0x6E00 //RX_TDDRC_SLANT_1 +275 0x1000 //RX_TDDRC_ALPHA_UP_0 +276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x199A //RX_TDDRC_HMNC_GAIN +279 0x0001 //RX_TDDRC_SMT_FLAG +280 0x0CCD //RX_TDDRC_SMT_W +281 0x0275 //RX_TDDRC_DRC_GAIN +282 0x7C00 //RX_LAMBDA_PKA_FP +283 0x1964 //RX_TPKA_FP +284 0x0080 //RX_MIN_G_FP +285 0x2000 //RX_MAX_G_FP +286 0x000D //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 +288 0x0000 //RX_MAXLEVEL_CNG +289 0x3000 //RX_BWE_UV_TH +290 0x3000 //RX_BWE_UV_TH2 +291 0x1800 //RX_BWE_UV_TH3 +292 0x1000 //RX_BWE_V_TH +293 0x04CD //RX_BWE_GAIN1_V_TH1 +294 0x0F33 //RX_BWE_GAIN1_V_TH2 +295 0x7333 //RX_BWE_UV_EQ +296 0x199A //RX_BWE_V_EQ +297 0x7333 //RX_BWE_TONE_TH +298 0x0004 //RX_BWE_UV_HOLD_T +299 0x6CCD //RX_BWE_GAIN2_ALPHA +300 0x799A //RX_BWE_GAIN3_ALPHA +301 0x001E //RX_BWE_CUTOFF +302 0x3000 //RX_BWE_GAINFILL +303 0x3200 //RX_BWE_MAXTH_TONE +304 0x2000 //RX_BWE_EQ_0 +305 0x2000 //RX_BWE_EQ_1 +306 0x2000 //RX_BWE_EQ_2 +307 0x2000 //RX_BWE_EQ_3 +308 0x2000 //RX_BWE_EQ_4 +309 0x2000 //RX_BWE_EQ_5 +310 0x2000 //RX_BWE_EQ_6 +311 0x0000 //RX_BWE_RESRV_0 +312 0x0000 //RX_BWE_RESRV_1 +313 0x0000 //RX_BWE_RESRV_2 +#VOL 0 +163 0x1000 //RX_TDDRC_ALPHA_UP_1 +164 0x1000 //RX_TDDRC_ALPHA_UP_2 +165 0x1000 //RX_TDDRC_ALPHA_UP_3 +166 0x1000 //RX_TDDRC_ALPHA_UP_4 +184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +190 0x7000 //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +269 0x0000 //RX_TDDRC_THRD_0 +270 0x0000 //RX_TDDRC_THRD_1 +271 0x1800 //RX_TDDRC_THRD_2 +272 0x1800 //RX_TDDRC_THRD_3 +273 0x3000 //RX_TDDRC_SLANT_0 +274 0x6E00 //RX_TDDRC_SLANT_1 +275 0x1000 //RX_TDDRC_ALPHA_UP_0 +276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x199A //RX_TDDRC_HMNC_GAIN +279 0x0001 //RX_TDDRC_SMT_FLAG +280 0x0CCD //RX_TDDRC_SMT_W +281 0x0275 //RX_TDDRC_DRC_GAIN +195 0x0020 //RX_FDEQ_SUBNUM +196 0x4848 //RX_FDEQ_GAIN_0 +197 0x4850 //RX_FDEQ_GAIN_1 +198 0x6478 //RX_FDEQ_GAIN_2 +199 0x8689 //RX_FDEQ_GAIN_3 +200 0x908F //RX_FDEQ_GAIN_4 +201 0x9495 //RX_FDEQ_GAIN_5 +202 0x989D //RX_FDEQ_GAIN_6 +203 0x9DA6 //RX_FDEQ_GAIN_7 +204 0xA895 //RX_FDEQ_GAIN_8 +205 0x8A8A //RX_FDEQ_GAIN_9 +206 0x8E78 //RX_FDEQ_GAIN_10 +207 0x7070 //RX_FDEQ_GAIN_11 +208 0x7680 //RX_FDEQ_GAIN_12 +209 0x787C //RX_FDEQ_GAIN_13 +210 0x8890 //RX_FDEQ_GAIN_14 +211 0x9CAC //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0202 //RX_FDEQ_BIN_0 +221 0x0202 //RX_FDEQ_BIN_1 +222 0x0302 //RX_FDEQ_BIN_2 +223 0x0304 //RX_FDEQ_BIN_3 +224 0x0405 //RX_FDEQ_BIN_4 +225 0x0506 //RX_FDEQ_BIN_5 +226 0x0708 //RX_FDEQ_BIN_6 +227 0x090A //RX_FDEQ_BIN_7 +228 0x0B0C //RX_FDEQ_BIN_8 +229 0x0D0E //RX_FDEQ_BIN_9 +230 0x1013 //RX_FDEQ_BIN_10 +231 0x1719 //RX_FDEQ_BIN_11 +232 0x1B1E //RX_FDEQ_BIN_12 +233 0x1E1E //RX_FDEQ_BIN_13 +234 0x1E28 //RX_FDEQ_BIN_14 +235 0x282C //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x4000 //RX_FDEQ_RESRV_0 +245 0x0320 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0030 //RX_FDDRC_BAND_MARGIN_1 +248 0x0050 //RX_FDDRC_BAND_MARGIN_2 +249 0x0080 //RX_FDDRC_BAND_MARGIN_3 +250 0x0007 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x5000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x6400 //RX_FDDRC_THRD_3_2 +258 0x6400 //RX_FDDRC_THRD_3_3 +259 0x2000 //RX_FDDRC_SLANT_0_0 +260 0x2000 //RX_FDDRC_SLANT_0_1 +261 0x2000 //RX_FDDRC_SLANT_0_2 +262 0x2000 //RX_FDDRC_SLANT_0_3 +263 0x5333 //RX_FDDRC_SLANT_1_0 +264 0x5333 //RX_FDDRC_SLANT_1_1 +265 0x5333 //RX_FDDRC_SLANT_1_2 +266 0x5333 //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +286 0x000D //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 +#VOL 1 +163 0x1000 //RX_TDDRC_ALPHA_UP_1 +164 0x1000 //RX_TDDRC_ALPHA_UP_2 +165 0x1000 //RX_TDDRC_ALPHA_UP_3 +166 0x1000 //RX_TDDRC_ALPHA_UP_4 +184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +190 0x7000 //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +269 0x0000 //RX_TDDRC_THRD_0 +270 0x0000 //RX_TDDRC_THRD_1 +271 0x1800 //RX_TDDRC_THRD_2 +272 0x1800 //RX_TDDRC_THRD_3 +273 0x3000 //RX_TDDRC_SLANT_0 +274 0x6E00 //RX_TDDRC_SLANT_1 +275 0x1000 //RX_TDDRC_ALPHA_UP_0 +276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x199A //RX_TDDRC_HMNC_GAIN +279 0x0001 //RX_TDDRC_SMT_FLAG +280 0x0CCD //RX_TDDRC_SMT_W +281 0x0275 //RX_TDDRC_DRC_GAIN +195 0x0020 //RX_FDEQ_SUBNUM +196 0x4848 //RX_FDEQ_GAIN_0 +197 0x4850 //RX_FDEQ_GAIN_1 +198 0x6478 //RX_FDEQ_GAIN_2 +199 0x8689 //RX_FDEQ_GAIN_3 +200 0x908F //RX_FDEQ_GAIN_4 +201 0x9495 //RX_FDEQ_GAIN_5 +202 0x989D //RX_FDEQ_GAIN_6 +203 0x9DA6 //RX_FDEQ_GAIN_7 +204 0xA895 //RX_FDEQ_GAIN_8 +205 0x8A8A //RX_FDEQ_GAIN_9 +206 0x8E78 //RX_FDEQ_GAIN_10 +207 0x7070 //RX_FDEQ_GAIN_11 +208 0x7680 //RX_FDEQ_GAIN_12 +209 0x787C //RX_FDEQ_GAIN_13 +210 0x8890 //RX_FDEQ_GAIN_14 +211 0x9CAC //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0202 //RX_FDEQ_BIN_0 +221 0x0202 //RX_FDEQ_BIN_1 +222 0x0302 //RX_FDEQ_BIN_2 +223 0x0304 //RX_FDEQ_BIN_3 +224 0x0405 //RX_FDEQ_BIN_4 +225 0x0506 //RX_FDEQ_BIN_5 +226 0x0708 //RX_FDEQ_BIN_6 +227 0x090A //RX_FDEQ_BIN_7 +228 0x0B0C //RX_FDEQ_BIN_8 +229 0x0D0E //RX_FDEQ_BIN_9 +230 0x1013 //RX_FDEQ_BIN_10 +231 0x1719 //RX_FDEQ_BIN_11 +232 0x1B1E //RX_FDEQ_BIN_12 +233 0x1E1E //RX_FDEQ_BIN_13 +234 0x1E28 //RX_FDEQ_BIN_14 +235 0x282C //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x4000 //RX_FDEQ_RESRV_0 +245 0x0320 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0030 //RX_FDDRC_BAND_MARGIN_1 +248 0x0050 //RX_FDDRC_BAND_MARGIN_2 +249 0x0080 //RX_FDDRC_BAND_MARGIN_3 +250 0x0007 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x5000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x6400 //RX_FDDRC_THRD_3_2 +258 0x6400 //RX_FDDRC_THRD_3_3 +259 0x2000 //RX_FDDRC_SLANT_0_0 +260 0x2000 //RX_FDDRC_SLANT_0_1 +261 0x2000 //RX_FDDRC_SLANT_0_2 +262 0x2000 //RX_FDDRC_SLANT_0_3 +263 0x5333 //RX_FDDRC_SLANT_1_0 +264 0x5333 //RX_FDDRC_SLANT_1_1 +265 0x5333 //RX_FDDRC_SLANT_1_2 +266 0x5333 //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +286 0x0016 //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 +#VOL 2 +163 0x1000 //RX_TDDRC_ALPHA_UP_1 +164 0x1000 //RX_TDDRC_ALPHA_UP_2 +165 0x1000 //RX_TDDRC_ALPHA_UP_3 +166 0x1000 //RX_TDDRC_ALPHA_UP_4 +184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +190 0x7000 //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +269 0x0000 //RX_TDDRC_THRD_0 +270 0x0000 //RX_TDDRC_THRD_1 +271 0x1800 //RX_TDDRC_THRD_2 +272 0x1800 //RX_TDDRC_THRD_3 +273 0x3000 //RX_TDDRC_SLANT_0 +274 0x6E00 //RX_TDDRC_SLANT_1 +275 0x1000 //RX_TDDRC_ALPHA_UP_0 +276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x199A //RX_TDDRC_HMNC_GAIN +279 0x0001 //RX_TDDRC_SMT_FLAG +280 0x0CCD //RX_TDDRC_SMT_W +281 0x0275 //RX_TDDRC_DRC_GAIN +195 0x0020 //RX_FDEQ_SUBNUM +196 0x4848 //RX_FDEQ_GAIN_0 +197 0x4850 //RX_FDEQ_GAIN_1 +198 0x6478 //RX_FDEQ_GAIN_2 +199 0x8689 //RX_FDEQ_GAIN_3 +200 0x908F //RX_FDEQ_GAIN_4 +201 0x9495 //RX_FDEQ_GAIN_5 +202 0x989D //RX_FDEQ_GAIN_6 +203 0x9DA6 //RX_FDEQ_GAIN_7 +204 0xA895 //RX_FDEQ_GAIN_8 +205 0x8A8A //RX_FDEQ_GAIN_9 +206 0x8E78 //RX_FDEQ_GAIN_10 +207 0x7070 //RX_FDEQ_GAIN_11 +208 0x7680 //RX_FDEQ_GAIN_12 +209 0x787C //RX_FDEQ_GAIN_13 +210 0x8890 //RX_FDEQ_GAIN_14 +211 0x9CAC //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0202 //RX_FDEQ_BIN_0 +221 0x0202 //RX_FDEQ_BIN_1 +222 0x0302 //RX_FDEQ_BIN_2 +223 0x0304 //RX_FDEQ_BIN_3 +224 0x0405 //RX_FDEQ_BIN_4 +225 0x0506 //RX_FDEQ_BIN_5 +226 0x0708 //RX_FDEQ_BIN_6 +227 0x090A //RX_FDEQ_BIN_7 +228 0x0B0C //RX_FDEQ_BIN_8 +229 0x0D0E //RX_FDEQ_BIN_9 +230 0x1013 //RX_FDEQ_BIN_10 +231 0x1719 //RX_FDEQ_BIN_11 +232 0x1B1E //RX_FDEQ_BIN_12 +233 0x1E1E //RX_FDEQ_BIN_13 +234 0x1E28 //RX_FDEQ_BIN_14 +235 0x282C //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x4000 //RX_FDEQ_RESRV_0 +245 0x0320 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0030 //RX_FDDRC_BAND_MARGIN_1 +248 0x0050 //RX_FDDRC_BAND_MARGIN_2 +249 0x0080 //RX_FDDRC_BAND_MARGIN_3 +250 0x0007 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x5000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x6400 //RX_FDDRC_THRD_3_2 +258 0x6400 //RX_FDDRC_THRD_3_3 +259 0x2000 //RX_FDDRC_SLANT_0_0 +260 0x2000 //RX_FDDRC_SLANT_0_1 +261 0x2000 //RX_FDDRC_SLANT_0_2 +262 0x2000 //RX_FDDRC_SLANT_0_3 +263 0x5333 //RX_FDDRC_SLANT_1_0 +264 0x5333 //RX_FDDRC_SLANT_1_1 +265 0x5333 //RX_FDDRC_SLANT_1_2 +266 0x5333 //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +286 0x0026 //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 +#VOL 3 +163 0x1000 //RX_TDDRC_ALPHA_UP_1 +164 0x1000 //RX_TDDRC_ALPHA_UP_2 +165 0x1000 //RX_TDDRC_ALPHA_UP_3 +166 0x1000 //RX_TDDRC_ALPHA_UP_4 +184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +190 0x7000 //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +269 0x0000 //RX_TDDRC_THRD_0 +270 0x0000 //RX_TDDRC_THRD_1 +271 0x1800 //RX_TDDRC_THRD_2 +272 0x1800 //RX_TDDRC_THRD_3 +273 0x3000 //RX_TDDRC_SLANT_0 +274 0x6E00 //RX_TDDRC_SLANT_1 +275 0x1000 //RX_TDDRC_ALPHA_UP_0 +276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x199A //RX_TDDRC_HMNC_GAIN +279 0x0001 //RX_TDDRC_SMT_FLAG +280 0x0CCD //RX_TDDRC_SMT_W +281 0x0275 //RX_TDDRC_DRC_GAIN +195 0x0020 //RX_FDEQ_SUBNUM +196 0x4848 //RX_FDEQ_GAIN_0 +197 0x4850 //RX_FDEQ_GAIN_1 +198 0x6478 //RX_FDEQ_GAIN_2 +199 0x8689 //RX_FDEQ_GAIN_3 +200 0x908F //RX_FDEQ_GAIN_4 +201 0x9495 //RX_FDEQ_GAIN_5 +202 0x989D //RX_FDEQ_GAIN_6 +203 0x9DA6 //RX_FDEQ_GAIN_7 +204 0xA895 //RX_FDEQ_GAIN_8 +205 0x8A8A //RX_FDEQ_GAIN_9 +206 0x8E78 //RX_FDEQ_GAIN_10 +207 0x7070 //RX_FDEQ_GAIN_11 +208 0x7680 //RX_FDEQ_GAIN_12 +209 0x787C //RX_FDEQ_GAIN_13 +210 0x8890 //RX_FDEQ_GAIN_14 +211 0x9CAC //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0202 //RX_FDEQ_BIN_0 +221 0x0202 //RX_FDEQ_BIN_1 +222 0x0302 //RX_FDEQ_BIN_2 +223 0x0304 //RX_FDEQ_BIN_3 +224 0x0405 //RX_FDEQ_BIN_4 +225 0x0506 //RX_FDEQ_BIN_5 +226 0x0708 //RX_FDEQ_BIN_6 +227 0x090A //RX_FDEQ_BIN_7 +228 0x0B0C //RX_FDEQ_BIN_8 +229 0x0D0E //RX_FDEQ_BIN_9 +230 0x1013 //RX_FDEQ_BIN_10 +231 0x1719 //RX_FDEQ_BIN_11 +232 0x1B1E //RX_FDEQ_BIN_12 +233 0x1E1E //RX_FDEQ_BIN_13 +234 0x1E28 //RX_FDEQ_BIN_14 +235 0x282C //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x4000 //RX_FDEQ_RESRV_0 +245 0x0320 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0030 //RX_FDDRC_BAND_MARGIN_1 +248 0x0050 //RX_FDDRC_BAND_MARGIN_2 +249 0x0080 //RX_FDDRC_BAND_MARGIN_3 +250 0x0007 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x5000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x6400 //RX_FDDRC_THRD_3_2 +258 0x6400 //RX_FDDRC_THRD_3_3 +259 0x2000 //RX_FDDRC_SLANT_0_0 +260 0x2000 //RX_FDDRC_SLANT_0_1 +261 0x2000 //RX_FDDRC_SLANT_0_2 +262 0x2000 //RX_FDDRC_SLANT_0_3 +263 0x5333 //RX_FDDRC_SLANT_1_0 +264 0x5333 //RX_FDDRC_SLANT_1_1 +265 0x5333 //RX_FDDRC_SLANT_1_2 +266 0x5333 //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +286 0x003D //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 +#VOL 4 +163 0x1000 //RX_TDDRC_ALPHA_UP_1 +164 0x1000 //RX_TDDRC_ALPHA_UP_2 +165 0x1000 //RX_TDDRC_ALPHA_UP_3 +166 0x1000 //RX_TDDRC_ALPHA_UP_4 +184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +190 0x7000 //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +269 0x0000 //RX_TDDRC_THRD_0 +270 0x0000 //RX_TDDRC_THRD_1 +271 0x1800 //RX_TDDRC_THRD_2 +272 0x1800 //RX_TDDRC_THRD_3 +273 0x3000 //RX_TDDRC_SLANT_0 +274 0x6E00 //RX_TDDRC_SLANT_1 +275 0x1000 //RX_TDDRC_ALPHA_UP_0 +276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x199A //RX_TDDRC_HMNC_GAIN +279 0x0001 //RX_TDDRC_SMT_FLAG +280 0x0CCD //RX_TDDRC_SMT_W +281 0x0275 //RX_TDDRC_DRC_GAIN +195 0x0020 //RX_FDEQ_SUBNUM +196 0x4848 //RX_FDEQ_GAIN_0 +197 0x4850 //RX_FDEQ_GAIN_1 +198 0x6478 //RX_FDEQ_GAIN_2 +199 0x8689 //RX_FDEQ_GAIN_3 +200 0x908F //RX_FDEQ_GAIN_4 +201 0x9495 //RX_FDEQ_GAIN_5 +202 0x989D //RX_FDEQ_GAIN_6 +203 0x9DA6 //RX_FDEQ_GAIN_7 +204 0xA895 //RX_FDEQ_GAIN_8 +205 0x8A8A //RX_FDEQ_GAIN_9 +206 0x8E78 //RX_FDEQ_GAIN_10 +207 0x7070 //RX_FDEQ_GAIN_11 +208 0x7680 //RX_FDEQ_GAIN_12 +209 0x787C //RX_FDEQ_GAIN_13 +210 0x8890 //RX_FDEQ_GAIN_14 +211 0x9CAC //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0202 //RX_FDEQ_BIN_0 +221 0x0202 //RX_FDEQ_BIN_1 +222 0x0302 //RX_FDEQ_BIN_2 +223 0x0304 //RX_FDEQ_BIN_3 +224 0x0405 //RX_FDEQ_BIN_4 +225 0x0506 //RX_FDEQ_BIN_5 +226 0x0708 //RX_FDEQ_BIN_6 +227 0x090A //RX_FDEQ_BIN_7 +228 0x0B0C //RX_FDEQ_BIN_8 +229 0x0D0E //RX_FDEQ_BIN_9 +230 0x1013 //RX_FDEQ_BIN_10 +231 0x1719 //RX_FDEQ_BIN_11 +232 0x1B1E //RX_FDEQ_BIN_12 +233 0x1E1E //RX_FDEQ_BIN_13 +234 0x1E28 //RX_FDEQ_BIN_14 +235 0x282C //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x4000 //RX_FDEQ_RESRV_0 +245 0x0320 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0030 //RX_FDDRC_BAND_MARGIN_1 +248 0x0050 //RX_FDDRC_BAND_MARGIN_2 +249 0x0080 //RX_FDDRC_BAND_MARGIN_3 +250 0x0007 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x5000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x6400 //RX_FDDRC_THRD_3_2 +258 0x6400 //RX_FDDRC_THRD_3_3 +259 0x2000 //RX_FDDRC_SLANT_0_0 +260 0x2000 //RX_FDDRC_SLANT_0_1 +261 0x2000 //RX_FDDRC_SLANT_0_2 +262 0x2000 //RX_FDDRC_SLANT_0_3 +263 0x5333 //RX_FDDRC_SLANT_1_0 +264 0x5333 //RX_FDDRC_SLANT_1_1 +265 0x5333 //RX_FDDRC_SLANT_1_2 +266 0x5333 //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +286 0x0060 //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 +#VOL 5 +163 0x1000 //RX_TDDRC_ALPHA_UP_1 +164 0x1000 //RX_TDDRC_ALPHA_UP_2 +165 0x1000 //RX_TDDRC_ALPHA_UP_3 +166 0x1000 //RX_TDDRC_ALPHA_UP_4 +184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +190 0x7000 //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +269 0x0000 //RX_TDDRC_THRD_0 +270 0x0000 //RX_TDDRC_THRD_1 +271 0x1800 //RX_TDDRC_THRD_2 +272 0x1800 //RX_TDDRC_THRD_3 +273 0x3000 //RX_TDDRC_SLANT_0 +274 0x6E00 //RX_TDDRC_SLANT_1 +275 0x1000 //RX_TDDRC_ALPHA_UP_0 +276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x199A //RX_TDDRC_HMNC_GAIN +279 0x0001 //RX_TDDRC_SMT_FLAG +280 0x0CCD //RX_TDDRC_SMT_W +281 0x0275 //RX_TDDRC_DRC_GAIN +195 0x0020 //RX_FDEQ_SUBNUM +196 0x4848 //RX_FDEQ_GAIN_0 +197 0x4850 //RX_FDEQ_GAIN_1 +198 0x6478 //RX_FDEQ_GAIN_2 +199 0x8689 //RX_FDEQ_GAIN_3 +200 0x908F //RX_FDEQ_GAIN_4 +201 0x9495 //RX_FDEQ_GAIN_5 +202 0x989D //RX_FDEQ_GAIN_6 +203 0x9DA6 //RX_FDEQ_GAIN_7 +204 0xA895 //RX_FDEQ_GAIN_8 +205 0x8A8A //RX_FDEQ_GAIN_9 +206 0x8E78 //RX_FDEQ_GAIN_10 +207 0x7070 //RX_FDEQ_GAIN_11 +208 0x7680 //RX_FDEQ_GAIN_12 +209 0x787C //RX_FDEQ_GAIN_13 +210 0x8890 //RX_FDEQ_GAIN_14 +211 0x9CAC //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0202 //RX_FDEQ_BIN_0 +221 0x0202 //RX_FDEQ_BIN_1 +222 0x0302 //RX_FDEQ_BIN_2 +223 0x0304 //RX_FDEQ_BIN_3 +224 0x0405 //RX_FDEQ_BIN_4 +225 0x0506 //RX_FDEQ_BIN_5 +226 0x0708 //RX_FDEQ_BIN_6 +227 0x090A //RX_FDEQ_BIN_7 +228 0x0B0C //RX_FDEQ_BIN_8 +229 0x0D0E //RX_FDEQ_BIN_9 +230 0x1013 //RX_FDEQ_BIN_10 +231 0x1719 //RX_FDEQ_BIN_11 +232 0x1B1E //RX_FDEQ_BIN_12 +233 0x1E1E //RX_FDEQ_BIN_13 +234 0x1E28 //RX_FDEQ_BIN_14 +235 0x282C //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x4000 //RX_FDEQ_RESRV_0 +245 0x0320 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0030 //RX_FDDRC_BAND_MARGIN_1 +248 0x0050 //RX_FDDRC_BAND_MARGIN_2 +249 0x0080 //RX_FDDRC_BAND_MARGIN_3 +250 0x0007 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x5000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x6400 //RX_FDDRC_THRD_3_2 +258 0x6400 //RX_FDDRC_THRD_3_3 +259 0x2000 //RX_FDDRC_SLANT_0_0 +260 0x2000 //RX_FDDRC_SLANT_0_1 +261 0x2000 //RX_FDDRC_SLANT_0_2 +262 0x2000 //RX_FDDRC_SLANT_0_3 +263 0x5333 //RX_FDDRC_SLANT_1_0 +264 0x5333 //RX_FDDRC_SLANT_1_1 +265 0x5333 //RX_FDDRC_SLANT_1_2 +266 0x5333 //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +286 0x0099 //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 +#VOL 6 +163 0x1000 //RX_TDDRC_ALPHA_UP_1 +164 0x1000 //RX_TDDRC_ALPHA_UP_2 +165 0x1000 //RX_TDDRC_ALPHA_UP_3 +166 0x1000 //RX_TDDRC_ALPHA_UP_4 +184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +190 0x7000 //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +269 0x0000 //RX_TDDRC_THRD_0 +270 0x0000 //RX_TDDRC_THRD_1 +271 0x1800 //RX_TDDRC_THRD_2 +272 0x1800 //RX_TDDRC_THRD_3 +273 0x3000 //RX_TDDRC_SLANT_0 +274 0x6E00 //RX_TDDRC_SLANT_1 +275 0x1000 //RX_TDDRC_ALPHA_UP_0 +276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x199A //RX_TDDRC_HMNC_GAIN +279 0x0001 //RX_TDDRC_SMT_FLAG +280 0x0CCD //RX_TDDRC_SMT_W +281 0x0275 //RX_TDDRC_DRC_GAIN +195 0x0020 //RX_FDEQ_SUBNUM +196 0x4848 //RX_FDEQ_GAIN_0 +197 0x4850 //RX_FDEQ_GAIN_1 +198 0x6478 //RX_FDEQ_GAIN_2 +199 0x8689 //RX_FDEQ_GAIN_3 +200 0x908F //RX_FDEQ_GAIN_4 +201 0x9495 //RX_FDEQ_GAIN_5 +202 0x989D //RX_FDEQ_GAIN_6 +203 0x9DA6 //RX_FDEQ_GAIN_7 +204 0xA895 //RX_FDEQ_GAIN_8 +205 0x8A8A //RX_FDEQ_GAIN_9 +206 0x8E78 //RX_FDEQ_GAIN_10 +207 0x7070 //RX_FDEQ_GAIN_11 +208 0x7680 //RX_FDEQ_GAIN_12 +209 0x787C //RX_FDEQ_GAIN_13 +210 0x8890 //RX_FDEQ_GAIN_14 +211 0x9CAC //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0202 //RX_FDEQ_BIN_0 +221 0x0202 //RX_FDEQ_BIN_1 +222 0x0302 //RX_FDEQ_BIN_2 +223 0x0304 //RX_FDEQ_BIN_3 +224 0x0405 //RX_FDEQ_BIN_4 +225 0x0506 //RX_FDEQ_BIN_5 +226 0x0708 //RX_FDEQ_BIN_6 +227 0x090A //RX_FDEQ_BIN_7 +228 0x0B0C //RX_FDEQ_BIN_8 +229 0x0D0E //RX_FDEQ_BIN_9 +230 0x1013 //RX_FDEQ_BIN_10 +231 0x1719 //RX_FDEQ_BIN_11 +232 0x1B1E //RX_FDEQ_BIN_12 +233 0x1E1E //RX_FDEQ_BIN_13 +234 0x1E28 //RX_FDEQ_BIN_14 +235 0x282C //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x4000 //RX_FDEQ_RESRV_0 +245 0x0320 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0030 //RX_FDDRC_BAND_MARGIN_1 +248 0x0050 //RX_FDDRC_BAND_MARGIN_2 +249 0x0080 //RX_FDDRC_BAND_MARGIN_3 +250 0x0007 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x5000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x6400 //RX_FDDRC_THRD_3_2 +258 0x6400 //RX_FDDRC_THRD_3_3 +259 0x2000 //RX_FDDRC_SLANT_0_0 +260 0x2000 //RX_FDDRC_SLANT_0_1 +261 0x2000 //RX_FDDRC_SLANT_0_2 +262 0x2000 //RX_FDDRC_SLANT_0_3 +263 0x5333 //RX_FDDRC_SLANT_1_0 +264 0x5333 //RX_FDDRC_SLANT_1_1 +265 0x5333 //RX_FDDRC_SLANT_1_2 +266 0x5333 //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +286 0x0100 //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 #CASE_NAME HANDSET-HANDSET_HAC-VOICE_GENERIC-NB -#PARAM_TYPE TX+RX -#TOTAL_CUSTOM_STEP 7 +#PARAM_MODE Full +#PARAM_TYPE TX+2RX +#TOTAL_CUSTOM_STEP 7+7 #TX 0 0x0000 //TX_OPERATION_MODE_0 1 0x0000 //TX_OPERATION_MODE_1 -2 0x0036 //TX_PATCH_REG +2 0x0076 //TX_PATCH_REG 3 0x6F7E //TX_SENDFUNC_MODE_0 4 0x0001 //TX_SENDFUNC_MODE_1 5 0x0002 //TX_NUM_MIC @@ -12299,7 +18719,7 @@ 18 0x0000 //TX_SYS_RESRV_2 19 0x0000 //TX_SYS_RESRV_3 20 0x0000 //TX_DIST2REF0 -21 0x009D //TX_DIST2REF1 +21 0x009C //TX_DIST2REF1 22 0x0000 //TX_DIST2REF_02 23 0x0000 //TX_DIST2REF_03 24 0x0000 //TX_DIST2REF_04 @@ -12529,19 +18949,19 @@ 248 0xF800 //TX_THR_SN_EST_6 249 0xF700 //TX_THR_SN_EST_7 250 0x0000 //TX_DELTA_THR_SN_EST_0 -251 0x01A0 //TX_DELTA_THR_SN_EST_1 -252 0x0100 //TX_DELTA_THR_SN_EST_2 -253 0x0200 //TX_DELTA_THR_SN_EST_3 -254 0x01A0 //TX_DELTA_THR_SN_EST_4 -255 0x0100 //TX_DELTA_THR_SN_EST_5 -256 0x0000 //TX_DELTA_THR_SN_EST_6 +251 0x0100 //TX_DELTA_THR_SN_EST_1 +252 0x0200 //TX_DELTA_THR_SN_EST_2 +253 0x01A0 //TX_DELTA_THR_SN_EST_3 +254 0x0100 //TX_DELTA_THR_SN_EST_4 +255 0x0000 //TX_DELTA_THR_SN_EST_5 +256 0x01A0 //TX_DELTA_THR_SN_EST_6 257 0x0200 //TX_DELTA_THR_SN_EST_7 258 0x4000 //TX_LAMBDA_NN_EST_0 -259 0x4000 //TX_LAMBDA_NN_EST_1 -260 0x3000 //TX_LAMBDA_NN_EST_2 -261 0x4000 //TX_LAMBDA_NN_EST_3 +259 0x3000 //TX_LAMBDA_NN_EST_1 +260 0x4000 //TX_LAMBDA_NN_EST_2 +261 0x3000 //TX_LAMBDA_NN_EST_3 262 0x3000 //TX_LAMBDA_NN_EST_4 -263 0x3000 //TX_LAMBDA_NN_EST_5 +263 0x4000 //TX_LAMBDA_NN_EST_5 264 0x4000 //TX_LAMBDA_NN_EST_6 265 0x4000 //TX_LAMBDA_NN_EST_7 266 0x0400 //TX_N_SN_EST @@ -12560,20 +18980,20 @@ 279 0x4000 //TX_B_POST_FLT_0 280 0x4000 //TX_B_POST_FLT_1 281 0x0014 //TX_NS_LVL_CTRL_0 -282 0x001B //TX_NS_LVL_CTRL_1 -283 0x0019 //TX_NS_LVL_CTRL_2 +282 0x0019 //TX_NS_LVL_CTRL_1 +283 0x0017 //TX_NS_LVL_CTRL_2 284 0x0017 //TX_NS_LVL_CTRL_3 -285 0x0017 //TX_NS_LVL_CTRL_4 -286 0x0019 //TX_NS_LVL_CTRL_5 -287 0x0014 //TX_NS_LVL_CTRL_6 +285 0x0019 //TX_NS_LVL_CTRL_4 +286 0x0014 //TX_NS_LVL_CTRL_5 +287 0x001B //TX_NS_LVL_CTRL_6 288 0x0010 //TX_NS_LVL_CTRL_7 289 0x0010 //TX_MIN_GAIN_S_0 290 0x000C //TX_MIN_GAIN_S_1 -291 0x000C //TX_MIN_GAIN_S_2 +291 0x0010 //TX_MIN_GAIN_S_2 292 0x0010 //TX_MIN_GAIN_S_3 -293 0x0010 //TX_MIN_GAIN_S_4 -294 0x000C //TX_MIN_GAIN_S_5 -295 0x0014 //TX_MIN_GAIN_S_6 +293 0x000C //TX_MIN_GAIN_S_4 +294 0x0014 //TX_MIN_GAIN_S_5 +295 0x000C //TX_MIN_GAIN_S_6 296 0x0014 //TX_MIN_GAIN_S_7 297 0x5000 //TX_NMOS_SUP 298 0x0000 //TX_NS_MAX_PRI_SNR_TH @@ -12583,8 +19003,8 @@ 302 0x4000 //TX_SNRI_SUP_2 303 0x4000 //TX_SNRI_SUP_3 304 0x4000 //TX_SNRI_SUP_4 -305 0x4000 //TX_SNRI_SUP_5 -306 0x7FFF //TX_SNRI_SUP_6 +305 0x7FFF //TX_SNRI_SUP_5 +306 0x4000 //TX_SNRI_SUP_6 307 0x3000 //TX_SNRI_SUP_7 308 0x3000 //TX_THR_LFNS 309 0x001A //TX_G_LFNS @@ -12593,36 +19013,36 @@ 312 0x7FFF //TX_A_POST_FILT_0 313 0x2000 //TX_A_POST_FILT_1 314 0x2000 //TX_A_POST_FILT_S_0 -315 0x7000 //TX_A_POST_FILT_S_1 -316 0x6000 //TX_A_POST_FILT_S_2 -317 0x5000 //TX_A_POST_FILT_S_3 -318 0x2000 //TX_A_POST_FILT_S_4 -319 0x6000 //TX_A_POST_FILT_S_5 -320 0x2000 //TX_A_POST_FILT_S_6 +315 0x6000 //TX_A_POST_FILT_S_1 +316 0x5000 //TX_A_POST_FILT_S_2 +317 0x2000 //TX_A_POST_FILT_S_3 +318 0x6000 //TX_A_POST_FILT_S_4 +319 0x2000 //TX_A_POST_FILT_S_5 +320 0x7000 //TX_A_POST_FILT_S_6 321 0x7000 //TX_A_POST_FILT_S_7 322 0x4000 //TX_B_POST_FILT_0 323 0x4000 //TX_B_POST_FILT_1 -324 0x7FFF //TX_B_POST_FILT_2 -325 0x5000 //TX_B_POST_FILT_3 -326 0x7FFF //TX_B_POST_FILT_4 -327 0x7FFF //TX_B_POST_FILT_5 +324 0x5000 //TX_B_POST_FILT_2 +325 0x4000 //TX_B_POST_FILT_3 +326 0x4000 //TX_B_POST_FILT_4 +327 0x4000 //TX_B_POST_FILT_5 328 0x4000 //TX_B_POST_FILT_6 329 0x2000 //TX_B_POST_FILT_7 330 0x7FFF //TX_B_LESSCUT_RTO_S_0 -331 0x7FFF //TX_B_LESSCUT_RTO_S_1 -332 0x7FFF //TX_B_LESSCUT_RTO_S_2 -333 0x7FFF //TX_B_LESSCUT_RTO_S_3 -334 0x7FFF //TX_B_LESSCUT_RTO_S_4 -335 0x7FFF //TX_B_LESSCUT_RTO_S_5 -336 0x7FFF //TX_B_LESSCUT_RTO_S_6 -337 0x7FFF //TX_B_LESSCUT_RTO_S_7 +331 0x1000 //TX_B_LESSCUT_RTO_S_1 +332 0x1000 //TX_B_LESSCUT_RTO_S_2 +333 0x1000 //TX_B_LESSCUT_RTO_S_3 +334 0x1000 //TX_B_LESSCUT_RTO_S_4 +335 0x1000 //TX_B_LESSCUT_RTO_S_5 +336 0x1000 //TX_B_LESSCUT_RTO_S_6 +337 0x1000 //TX_B_LESSCUT_RTO_S_7 338 0x7E14 //TX_LAMBDA_PFILT 339 0x7C29 //TX_LAMBDA_PFILT_S_0 -340 0x7C29 //TX_LAMBDA_PFILT_S_1 -341 0x7200 //TX_LAMBDA_PFILT_S_2 -342 0x7900 //TX_LAMBDA_PFILT_S_3 -343 0x7400 //TX_LAMBDA_PFILT_S_4 -344 0x7200 //TX_LAMBDA_PFILT_S_5 +340 0x7200 //TX_LAMBDA_PFILT_S_1 +341 0x7900 //TX_LAMBDA_PFILT_S_2 +342 0x7400 //TX_LAMBDA_PFILT_S_3 +343 0x7200 //TX_LAMBDA_PFILT_S_4 +344 0x7C29 //TX_LAMBDA_PFILT_S_5 345 0x7C29 //TX_LAMBDA_PFILT_S_6 346 0x7C29 //TX_LAMBDA_PFILT_S_7 347 0x0200 //TX_K_PEPPER @@ -12658,10 +19078,10 @@ 377 0x0000 //TX_NOISE_TH_5_4 378 0x07D0 //TX_NOISE_TH_6 379 0x0004 //TX_MINENOISE_TH -380 0x4000 //TX_MINENOISE_MIC0_TH_MTS -381 0xFFEE //TX_MINENOISE_MIC0_TH_EXP -382 0x6000 //TX_MINENOISE_MIC0_S_TH_MTS -383 0xFFF3 //TX_MINENOISE_MIC0_S_TH_EXP +380 0xD508 //TX_MORENS_TFMASK_TH +381 0x0001 //TX_DRC_QUIET_FLOOR +382 0x6D60 //TX_RATIODTL_CUT_TH +383 0x0DAC //TX_DT_CUT_K1 384 0x00A5 //TX_OUT_ENER_S_TH_CLEAN 385 0x00A5 //TX_OUT_ENER_S_TH_LESSCLEAN 386 0x00A5 //TX_OUT_ENER_S_TH_NOISY @@ -12669,15 +19089,15 @@ 388 0x00CE //TX_OUT_ENER_TH_SPEECH 389 0x2000 //TX_SN_NPB_GAIN 390 0x0000 //TX_NN_NPB_GAIN -391 0x0000 //TX_CSX_ALPHA_0 -392 0x0000 //TX_CSX_ALPHA_1 -393 0x0000 //TX_CSX_ALPHA_2 -394 0x0000 //TX_CSX_ALPHA_3 -395 0x0800 //TX_MU_ARSP_EST -396 0x00C8 //TX_P_OUTBEAM_MIN_TH +391 0x3000 //TX_POST_MASK_SUP_HSNE +392 0x07D0 //TX_TAIL_DET_TH +393 0x4000 //TX_B_LESSCUT_RTO_WTA +394 0x0000 //TX_MEL_G_R +395 0x0080 //TX_SUPHIGH_TH +396 0x0000 //TX_MASK_G_R 397 0x0002 //TX_EXTRA_NS_L -398 0x0800 //TX_EXTRA_NS_A -399 0x0005 //TX_VR_NOISE_FLOOR_TH +398 0x1800 //TX_C_POST_FLT_MASK +399 0x7FFF //TX_A_POST_FLT_WNS 400 0x0148 //TX_MIN_G_LOW300HZ 401 0x0001 //TX_MAXLEVEL_CNG 402 0x00B4 //TX_STN_NOISE_TH @@ -12792,16 +19212,16 @@ 511 0x6666 //TX_MIC_TO_BFGAIN 512 0x0000 //TX_MICTOBFGAIN0 513 0x0000 //TX_FASTMUE_TH -514 0x0000 //TX_DERVB_LEN_0 -515 0x0000 //TX_DERVB_LEN_1 -516 0x0000 //TX_RHO_DERVB -517 0x0000 //TX_MIC_INDX_DERVB -518 0x0000 //TX_MU_DERVB -519 0x0000 //TX_DR_RESRV_0 -520 0x0000 //TX_DR_RESRV_1 -521 0x0000 //TX_DR_RESRV_2 -522 0x0000 //TX_DR_RESRV_3 -523 0x0000 //TX_DR_RESRV_4 +514 0x3000 //TX_DEREVERB_LF_MU +515 0x34CD //TX_DEREVERB_HF_MU +516 0x0007 //TX_DEREVERB_DELAY +517 0x0004 //TX_DEREVERB_COEF_LEN +518 0x0003 //TX_DEREVERB_DNR +519 0x0000 //TX_DEREVERB_ALPHA +520 0x0000 //TX_DEREVERB_BETA +521 0x3A98 //TX_GSC_RTOL_TH +522 0x3A98 //TX_GSC_RTOH_TH +523 0x7E2C //TX_WIDE2_MEANHTH 524 0x0000 //TX_DR_RESRV_5 525 0x0000 //TX_DR_RESRV_6 526 0x0000 //TX_DR_RESRV_7 @@ -12849,11 +19269,11 @@ 568 0x584F //TX_FDEQ_GAIN_1 569 0x4F4E //TX_FDEQ_GAIN_2 570 0x474A //TX_FDEQ_GAIN_3 -571 0x473F //TX_FDEQ_GAIN_4 -572 0x4240 //TX_FDEQ_GAIN_5 +571 0x4737 //TX_FDEQ_GAIN_4 +572 0x3A40 //TX_FDEQ_GAIN_5 573 0x4040 //TX_FDEQ_GAIN_6 -574 0x3630 //TX_FDEQ_GAIN_7 -575 0x2620 //TX_FDEQ_GAIN_8 +574 0x3631 //TX_FDEQ_GAIN_7 +575 0x2020 //TX_FDEQ_GAIN_8 576 0x383C //TX_FDEQ_GAIN_9 577 0x4848 //TX_FDEQ_GAIN_10 578 0x4848 //TX_FDEQ_GAIN_11 @@ -12878,7 +19298,7 @@ 597 0x0808 //TX_FDEQ_BIN_6 598 0x050E //TX_FDEQ_BIN_7 599 0x0B0C //TX_FDEQ_BIN_8 -600 0x0F0F //TX_FDEQ_BIN_9 +600 0x0F09 //TX_FDEQ_BIN_9 601 0x0000 //TX_FDEQ_BIN_10 602 0x0000 //TX_FDEQ_BIN_11 603 0x0000 //TX_FDEQ_BIN_12 @@ -12902,9 +19322,9 @@ 621 0x4848 //TX_PREEQ_GAIN_MIC0_4 622 0x4848 //TX_PREEQ_GAIN_MIC0_5 623 0x4848 //TX_PREEQ_GAIN_MIC0_6 -624 0x4846 //TX_PREEQ_GAIN_MIC0_7 -625 0x4544 //TX_PREEQ_GAIN_MIC0_8 -626 0x4241 //TX_PREEQ_GAIN_MIC0_9 +624 0x4848 //TX_PREEQ_GAIN_MIC0_7 +625 0x4848 //TX_PREEQ_GAIN_MIC0_8 +626 0x4848 //TX_PREEQ_GAIN_MIC0_9 627 0x4848 //TX_PREEQ_GAIN_MIC0_10 628 0x4848 //TX_PREEQ_GAIN_MIC0_11 629 0x4848 //TX_PREEQ_GAIN_MIC0_12 @@ -12952,8 +19372,8 @@ 671 0x4848 //TX_PREEQ_GAIN_MIC1_5 672 0x4848 //TX_PREEQ_GAIN_MIC1_6 673 0x4848 //TX_PREEQ_GAIN_MIC1_7 -674 0x4A4C //TX_PREEQ_GAIN_MIC1_8 -675 0x4E50 //TX_PREEQ_GAIN_MIC1_9 +674 0x4849 //TX_PREEQ_GAIN_MIC1_8 +675 0x4A4B //TX_PREEQ_GAIN_MIC1_9 676 0x4848 //TX_PREEQ_GAIN_MIC1_10 677 0x4848 //TX_PREEQ_GAIN_MIC1_11 678 0x4848 //TX_PREEQ_GAIN_MIC1_12 @@ -12968,7 +19388,7 @@ 687 0x4848 //TX_PREEQ_GAIN_MIC1_21 688 0x4848 //TX_PREEQ_GAIN_MIC1_22 689 0x4848 //TX_PREEQ_GAIN_MIC1_23 -690 0x0203 //TX_PREEQ_BIN_MIC1_0 +690 0x0202 //TX_PREEQ_BIN_MIC1_0 691 0x0203 //TX_PREEQ_BIN_MIC1_1 692 0x0303 //TX_PREEQ_BIN_MIC1_2 693 0x0304 //TX_PREEQ_BIN_MIC1_3 @@ -13054,7 +19474,7 @@ 773 0x0000 //TX_GAIN_LIMIT_0 774 0x0000 //TX_GAIN_LIMIT_1 775 0x0006 //TX_GAIN_LIMIT_2 -776 0x0006 //TX_GAIN_LIMIT_3 +776 0x0007 //TX_GAIN_LIMIT_3 777 0x7F5B //TX_BVE_NOVAD0_ALPHADOWN 778 0x7FDE //TX_BVE_VAD0_ALPHAUP 779 0x7F3A //TX_BVE_VAD0_ALPHADOWN @@ -13144,7 +19564,7 @@ 863 0x199A //TX_TDDRC_HMNC_GAIN 864 0x0000 //TX_TDDRC_SMT_FLAG 865 0x0CCD //TX_TDDRC_SMT_W -866 0x0550 //TX_TDDRC_DRC_GAIN +866 0x0504 //TX_TDDRC_DRC_GAIN 867 0x7FFF //TX_TDDRC_LMT_THRD 868 0x0000 //TX_TDDRC_LMT_ALPHA 869 0x0000 //TX_TFMASKLTH @@ -13175,6 +19595,71 @@ 894 0xC000 //TX_FASTNS_SSA_THHFL 895 0xCCCC //TX_FASTNS_SSA_THLFH 896 0xD999 //TX_FASTNS_SSA_THHFH +897 0x2339 //TX_SENDFUNC_REG_MICMUTE +898 0x0021 //TX_SENDFUNC_REG_MICMUTE1 +899 0x02BC //TX_MICMUTE_RATIO_THR +900 0x0140 //TX_MICMUTE_AMP_THR +901 0x0004 //TX_MICMUTE_HPF_IND +902 0x00C0 //TX_MICMUTE_LOG_EYR_TH +903 0x0008 //TX_MICMUTE_CVG_TIME +904 0x0008 //TX_MICMUTE_RELEASE_TIME +905 0x01FE //TX_MIC_VOLUME_MIC0MUTE +906 0x0020 //TX_MICMUTE_EPD_OFFSET_0 +907 0x001E //TX_MICMUTE_FRQ_AEC_L +908 0x7999 //TX_MICMUTE_EAD_THR +909 0x7FFF //TX_MICMUTE_LAMBDA_CB_NLE +910 0x7FFF //TX_MICMUTE_LAMBDA_RE_EST +911 0x4000 //TX_DTD_THR1_MICMUTE_0 +912 0x7000 //TX_DTD_THR1_MICMUTE_1 +913 0x7FFF //TX_DTD_THR1_MICMUTE_2 +914 0x7FFF //TX_DTD_THR1_MICMUTE_3 +915 0x6CCC //TX_DTD_THR2_MICMUTE_0 +916 0x0400 //TX_MICMUTE_MIN_EQ_RE_EST_0 +917 0x0400 //TX_MICMUTE_MIN_EQ_RE_EST_1 +918 0x1000 //TX_MICMUTE_MIN_EQ_RE_EST_2 +919 0x7FFF //TX_MICMUTE_MIN_EQ_RE_EST_3 +920 0x7FFF //TX_MICMUTE_MIN_EQ_RE_EST_4 +921 0x4000 //TX_MICMUTE_C_POST_FLT +922 0x03E8 //TX_MICMUTE_DT_CUT_K +923 0x0001 //TX_MICMUTE_DT_CUT_THR +924 0x03E8 //TX_MICMUTE_DT_CUT_K2 +925 0x0001 //TX_MICMUTE_DT_CUT_THR2 +926 0x0064 //TX_MICMUTE_DT2_HOLD_N +927 0x1000 //TX_MICMUTE_RATIODTH_THCUT +928 0x1000 //TX_MICMUTE_B_POST_FLT_ECHOL +929 0x7FFF //TX_MICMUTE_B_POST_FLT_ECHOH +930 0x0400 //TX_MICMUTE_C_POST_FLT_MASK +931 0x7999 //TX_MICMUTE_RATIODTL_CUT_TH +932 0x0258 //TX_MICMUTE_DT_CUT_K1 +933 0x0800 //TX_MICMUTE_N2_SN_EST +934 0xFC00 //TX_MICMUTE_THR_SN_EST_0 +935 0x001C //TX_MICMUTE_MIN_G_CTRL_0 +936 0x6000 //TX_MICMUTE_A_POST_FILT_S_0 +937 0x7000 //TX_MICMUTE_B_POST_FILT_0 +938 0x2710 //TX_MIC1RUB_AMP_THR +939 0x0010 //TX_MIC1MUTE_RATIO_THR +940 0x0450 //TX_MIC1MUTE_AMP_THR +941 0x0008 //TX_MIC1MUTE_CVG_TIME +942 0x0008 //TX_MIC1MUTE_RELEASE_TIME +943 0x0000 //TX_AMS_RESRV_01 +944 0x0000 //TX_AMS_RESRV_02 +945 0x0000 //TX_AMS_RESRV_03 +946 0x0000 //TX_AMS_RESRV_04 +947 0x0000 //TX_AMS_RESRV_05 +948 0x0000 //TX_AMS_RESRV_06 +949 0x0000 //TX_AMS_RESRV_07 +950 0x0000 //TX_AMS_RESRV_08 +951 0x0000 //TX_AMS_RESRV_09 +952 0x0000 //TX_AMS_RESRV_10 +953 0x0000 //TX_AMS_RESRV_11 +954 0x0000 //TX_AMS_RESRV_12 +955 0x0000 //TX_AMS_RESRV_13 +956 0x0000 //TX_AMS_RESRV_14 +957 0x0000 //TX_AMS_RESRV_15 +958 0x0000 //TX_AMS_RESRV_16 +959 0x0000 //TX_AMS_RESRV_17 +960 0x0000 //TX_AMS_RESRV_18 +961 0x0000 //TX_AMS_RESRV_19 #RX 0 0x000C //RX_RECVFUNC_MODE_0 1 0x0000 //RX_RECVFUNC_MODE_1 @@ -14026,10 +20511,862 @@ 110 0x0000 //RX_FDDRC_RESRV_0 129 0x0100 //RX_SPK_VOL 130 0x0000 //RX_VOL_RESRV_0 +#RX 2 +157 0x000C //RX_RECVFUNC_MODE_0 +158 0x0000 //RX_RECVFUNC_MODE_1 +159 0x0000 //RX_SAMPLINGFREQ_SIG +160 0x0000 //RX_SAMPLINGFREQ_PROC +161 0x000A //RX_FRAME_SZ +162 0x0000 //RX_DELAY_OPT +163 0x1000 //RX_TDDRC_ALPHA_UP_1 +164 0x1000 //RX_TDDRC_ALPHA_UP_2 +165 0x1000 //RX_TDDRC_ALPHA_UP_3 +166 0x1000 //RX_TDDRC_ALPHA_UP_4 +167 0x0800 //RX_PGA +168 0x7FFF //RX_A_HP +169 0x4000 //RX_B_PE +170 0x7800 //RX_THR_PITCH_DET_0 +171 0x7000 //RX_THR_PITCH_DET_1 +172 0x6000 //RX_THR_PITCH_DET_2 +173 0x0008 //RX_PITCH_BFR_LEN +174 0x0003 //RX_SBD_PITCH_DET +175 0x0100 //RX_PP_RESRV_0 +176 0x0020 //RX_PP_RESRV_1 +177 0x0400 //RX_N_SN_EST +178 0x000C //RX_N2_SN_EST +179 0x0014 //RX_NS_LVL_CTRL +180 0xF800 //RX_THR_SN_EST +181 0x7E00 //RX_LAMBDA_PFILT +182 0x000A //RX_FENS_RESRV_0 +183 0x0190 //RX_FENS_RESRV_1 +184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +187 0x0002 //RX_EXTRA_NS_L +188 0x0800 //RX_EXTRA_NS_A +189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +190 0x7000 //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +192 0x199A //RX_A_POST_FLT +193 0x0000 //RX_LMT_THRD +194 0x4000 //RX_LMT_ALPHA +195 0x0030 //RX_FDEQ_SUBNUM +196 0x4848 //RX_FDEQ_GAIN_0 +197 0x4848 //RX_FDEQ_GAIN_1 +198 0x4844 //RX_FDEQ_GAIN_2 +199 0x4A4C //RX_FDEQ_GAIN_3 +200 0x4E50 //RX_FDEQ_GAIN_4 +201 0x5254 //RX_FDEQ_GAIN_5 +202 0x5658 //RX_FDEQ_GAIN_6 +203 0x5A5C //RX_FDEQ_GAIN_7 +204 0x5C5C //RX_FDEQ_GAIN_8 +205 0x5C5C //RX_FDEQ_GAIN_9 +206 0x5C5C //RX_FDEQ_GAIN_10 +207 0x5C48 //RX_FDEQ_GAIN_11 +208 0x4848 //RX_FDEQ_GAIN_12 +209 0x4848 //RX_FDEQ_GAIN_13 +210 0x4848 //RX_FDEQ_GAIN_14 +211 0x4848 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0202 //RX_FDEQ_BIN_0 +221 0x0203 //RX_FDEQ_BIN_1 +222 0x0402 //RX_FDEQ_BIN_2 +223 0x0303 //RX_FDEQ_BIN_3 +224 0x0303 //RX_FDEQ_BIN_4 +225 0x0303 //RX_FDEQ_BIN_5 +226 0x0303 //RX_FDEQ_BIN_6 +227 0x0303 //RX_FDEQ_BIN_7 +228 0x0A0A //RX_FDEQ_BIN_8 +229 0x0A0E //RX_FDEQ_BIN_9 +230 0x0000 //RX_FDEQ_BIN_10 +231 0x0000 //RX_FDEQ_BIN_11 +232 0x0000 //RX_FDEQ_BIN_12 +233 0x0000 //RX_FDEQ_BIN_13 +234 0x0000 //RX_FDEQ_BIN_14 +235 0x0000 //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x4000 //RX_FDEQ_RESRV_0 +245 0x0320 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0030 //RX_FDDRC_BAND_MARGIN_1 +248 0x0050 //RX_FDDRC_BAND_MARGIN_2 +249 0x0080 //RX_FDDRC_BAND_MARGIN_3 +250 0x0007 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x5000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x6400 //RX_FDDRC_THRD_3_2 +258 0x6400 //RX_FDDRC_THRD_3_3 +259 0x2000 //RX_FDDRC_SLANT_0_0 +260 0x2000 //RX_FDDRC_SLANT_0_1 +261 0x2000 //RX_FDDRC_SLANT_0_2 +262 0x2000 //RX_FDDRC_SLANT_0_3 +263 0x5333 //RX_FDDRC_SLANT_1_0 +264 0x5333 //RX_FDDRC_SLANT_1_1 +265 0x5333 //RX_FDDRC_SLANT_1_2 +266 0x5333 //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +268 0x0002 //RX_FILTINDX +269 0x0000 //RX_TDDRC_THRD_0 +270 0x0000 //RX_TDDRC_THRD_1 +271 0x1800 //RX_TDDRC_THRD_2 +272 0x1800 //RX_TDDRC_THRD_3 +273 0x3000 //RX_TDDRC_SLANT_0 +274 0x6E00 //RX_TDDRC_SLANT_1 +275 0x1000 //RX_TDDRC_ALPHA_UP_0 +276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x199A //RX_TDDRC_HMNC_GAIN +279 0x0001 //RX_TDDRC_SMT_FLAG +280 0x0CCD //RX_TDDRC_SMT_W +281 0x0360 //RX_TDDRC_DRC_GAIN +282 0x7C00 //RX_LAMBDA_PKA_FP +283 0x2000 //RX_TPKA_FP +284 0x2000 //RX_MIN_G_FP +285 0x0080 //RX_MAX_G_FP +286 0x0100 //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 +288 0x0000 //RX_MAXLEVEL_CNG +289 0x3000 //RX_BWE_UV_TH +290 0x3000 //RX_BWE_UV_TH2 +291 0x1800 //RX_BWE_UV_TH3 +292 0x1000 //RX_BWE_V_TH +293 0x04CD //RX_BWE_GAIN1_V_TH1 +294 0x0F33 //RX_BWE_GAIN1_V_TH2 +295 0x7333 //RX_BWE_UV_EQ +296 0x199A //RX_BWE_V_EQ +297 0x7333 //RX_BWE_TONE_TH +298 0x0004 //RX_BWE_UV_HOLD_T +299 0x6CCD //RX_BWE_GAIN2_ALPHA +300 0x799A //RX_BWE_GAIN3_ALPHA +301 0x001E //RX_BWE_CUTOFF +302 0x3000 //RX_BWE_GAINFILL +303 0x3200 //RX_BWE_MAXTH_TONE +304 0x2000 //RX_BWE_EQ_0 +305 0x2000 //RX_BWE_EQ_1 +306 0x2000 //RX_BWE_EQ_2 +307 0x2000 //RX_BWE_EQ_3 +308 0x2000 //RX_BWE_EQ_4 +309 0x2000 //RX_BWE_EQ_5 +310 0x2000 //RX_BWE_EQ_6 +311 0x0000 //RX_BWE_RESRV_0 +312 0x0000 //RX_BWE_RESRV_1 +313 0x0000 //RX_BWE_RESRV_2 +#VOL 0 +163 0x1000 //RX_TDDRC_ALPHA_UP_1 +164 0x1000 //RX_TDDRC_ALPHA_UP_2 +165 0x1000 //RX_TDDRC_ALPHA_UP_3 +166 0x1000 //RX_TDDRC_ALPHA_UP_4 +184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +190 0x7000 //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +269 0x0000 //RX_TDDRC_THRD_0 +270 0x0000 //RX_TDDRC_THRD_1 +271 0x1800 //RX_TDDRC_THRD_2 +272 0x1800 //RX_TDDRC_THRD_3 +273 0x3000 //RX_TDDRC_SLANT_0 +274 0x6E00 //RX_TDDRC_SLANT_1 +275 0x1000 //RX_TDDRC_ALPHA_UP_0 +276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x199A //RX_TDDRC_HMNC_GAIN +279 0x0001 //RX_TDDRC_SMT_FLAG +280 0x0CCD //RX_TDDRC_SMT_W +281 0x0360 //RX_TDDRC_DRC_GAIN +195 0x0030 //RX_FDEQ_SUBNUM +196 0x4848 //RX_FDEQ_GAIN_0 +197 0x4848 //RX_FDEQ_GAIN_1 +198 0x4844 //RX_FDEQ_GAIN_2 +199 0x4A4C //RX_FDEQ_GAIN_3 +200 0x4E50 //RX_FDEQ_GAIN_4 +201 0x5254 //RX_FDEQ_GAIN_5 +202 0x5658 //RX_FDEQ_GAIN_6 +203 0x5A5C //RX_FDEQ_GAIN_7 +204 0x5C5C //RX_FDEQ_GAIN_8 +205 0x5C5C //RX_FDEQ_GAIN_9 +206 0x5C5C //RX_FDEQ_GAIN_10 +207 0x5C48 //RX_FDEQ_GAIN_11 +208 0x4848 //RX_FDEQ_GAIN_12 +209 0x4848 //RX_FDEQ_GAIN_13 +210 0x4848 //RX_FDEQ_GAIN_14 +211 0x4848 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0202 //RX_FDEQ_BIN_0 +221 0x0203 //RX_FDEQ_BIN_1 +222 0x0402 //RX_FDEQ_BIN_2 +223 0x0303 //RX_FDEQ_BIN_3 +224 0x0303 //RX_FDEQ_BIN_4 +225 0x0303 //RX_FDEQ_BIN_5 +226 0x0303 //RX_FDEQ_BIN_6 +227 0x0303 //RX_FDEQ_BIN_7 +228 0x0A0A //RX_FDEQ_BIN_8 +229 0x0A0E //RX_FDEQ_BIN_9 +230 0x0000 //RX_FDEQ_BIN_10 +231 0x0000 //RX_FDEQ_BIN_11 +232 0x0000 //RX_FDEQ_BIN_12 +233 0x0000 //RX_FDEQ_BIN_13 +234 0x0000 //RX_FDEQ_BIN_14 +235 0x0000 //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x4000 //RX_FDEQ_RESRV_0 +245 0x0320 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0030 //RX_FDDRC_BAND_MARGIN_1 +248 0x0050 //RX_FDDRC_BAND_MARGIN_2 +249 0x0080 //RX_FDDRC_BAND_MARGIN_3 +250 0x0007 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x5000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x6400 //RX_FDDRC_THRD_3_2 +258 0x6400 //RX_FDDRC_THRD_3_3 +259 0x2000 //RX_FDDRC_SLANT_0_0 +260 0x2000 //RX_FDDRC_SLANT_0_1 +261 0x2000 //RX_FDDRC_SLANT_0_2 +262 0x2000 //RX_FDDRC_SLANT_0_3 +263 0x5333 //RX_FDDRC_SLANT_1_0 +264 0x5333 //RX_FDDRC_SLANT_1_1 +265 0x5333 //RX_FDDRC_SLANT_1_2 +266 0x5333 //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +286 0x0100 //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 +#VOL 1 +163 0x1000 //RX_TDDRC_ALPHA_UP_1 +164 0x1000 //RX_TDDRC_ALPHA_UP_2 +165 0x1000 //RX_TDDRC_ALPHA_UP_3 +166 0x1000 //RX_TDDRC_ALPHA_UP_4 +184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +190 0x7000 //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +269 0x0000 //RX_TDDRC_THRD_0 +270 0x0000 //RX_TDDRC_THRD_1 +271 0x1800 //RX_TDDRC_THRD_2 +272 0x1800 //RX_TDDRC_THRD_3 +273 0x3000 //RX_TDDRC_SLANT_0 +274 0x6E00 //RX_TDDRC_SLANT_1 +275 0x1000 //RX_TDDRC_ALPHA_UP_0 +276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x199A //RX_TDDRC_HMNC_GAIN +279 0x0001 //RX_TDDRC_SMT_FLAG +280 0x0CCD //RX_TDDRC_SMT_W +281 0x0360 //RX_TDDRC_DRC_GAIN +195 0x0030 //RX_FDEQ_SUBNUM +196 0x4848 //RX_FDEQ_GAIN_0 +197 0x4848 //RX_FDEQ_GAIN_1 +198 0x4844 //RX_FDEQ_GAIN_2 +199 0x4A4C //RX_FDEQ_GAIN_3 +200 0x4E50 //RX_FDEQ_GAIN_4 +201 0x5254 //RX_FDEQ_GAIN_5 +202 0x5658 //RX_FDEQ_GAIN_6 +203 0x5A5C //RX_FDEQ_GAIN_7 +204 0x5C5C //RX_FDEQ_GAIN_8 +205 0x5C5C //RX_FDEQ_GAIN_9 +206 0x5C5C //RX_FDEQ_GAIN_10 +207 0x5C48 //RX_FDEQ_GAIN_11 +208 0x4848 //RX_FDEQ_GAIN_12 +209 0x4848 //RX_FDEQ_GAIN_13 +210 0x4848 //RX_FDEQ_GAIN_14 +211 0x4848 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0202 //RX_FDEQ_BIN_0 +221 0x0203 //RX_FDEQ_BIN_1 +222 0x0402 //RX_FDEQ_BIN_2 +223 0x0303 //RX_FDEQ_BIN_3 +224 0x0303 //RX_FDEQ_BIN_4 +225 0x0303 //RX_FDEQ_BIN_5 +226 0x0303 //RX_FDEQ_BIN_6 +227 0x0303 //RX_FDEQ_BIN_7 +228 0x0A0A //RX_FDEQ_BIN_8 +229 0x0A0E //RX_FDEQ_BIN_9 +230 0x0000 //RX_FDEQ_BIN_10 +231 0x0000 //RX_FDEQ_BIN_11 +232 0x0000 //RX_FDEQ_BIN_12 +233 0x0000 //RX_FDEQ_BIN_13 +234 0x0000 //RX_FDEQ_BIN_14 +235 0x0000 //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x4000 //RX_FDEQ_RESRV_0 +245 0x0320 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0030 //RX_FDDRC_BAND_MARGIN_1 +248 0x0050 //RX_FDDRC_BAND_MARGIN_2 +249 0x0080 //RX_FDDRC_BAND_MARGIN_3 +250 0x0007 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x5000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x6400 //RX_FDDRC_THRD_3_2 +258 0x6400 //RX_FDDRC_THRD_3_3 +259 0x2000 //RX_FDDRC_SLANT_0_0 +260 0x2000 //RX_FDDRC_SLANT_0_1 +261 0x2000 //RX_FDDRC_SLANT_0_2 +262 0x2000 //RX_FDDRC_SLANT_0_3 +263 0x5333 //RX_FDDRC_SLANT_1_0 +264 0x5333 //RX_FDDRC_SLANT_1_1 +265 0x5333 //RX_FDDRC_SLANT_1_2 +266 0x5333 //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +286 0x0100 //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 +#VOL 2 +163 0x1000 //RX_TDDRC_ALPHA_UP_1 +164 0x1000 //RX_TDDRC_ALPHA_UP_2 +165 0x1000 //RX_TDDRC_ALPHA_UP_3 +166 0x1000 //RX_TDDRC_ALPHA_UP_4 +184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +190 0x7000 //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +269 0x0000 //RX_TDDRC_THRD_0 +270 0x0000 //RX_TDDRC_THRD_1 +271 0x1800 //RX_TDDRC_THRD_2 +272 0x1800 //RX_TDDRC_THRD_3 +273 0x3000 //RX_TDDRC_SLANT_0 +274 0x6E00 //RX_TDDRC_SLANT_1 +275 0x1000 //RX_TDDRC_ALPHA_UP_0 +276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x199A //RX_TDDRC_HMNC_GAIN +279 0x0001 //RX_TDDRC_SMT_FLAG +280 0x0CCD //RX_TDDRC_SMT_W +281 0x0360 //RX_TDDRC_DRC_GAIN +195 0x0030 //RX_FDEQ_SUBNUM +196 0x4848 //RX_FDEQ_GAIN_0 +197 0x4848 //RX_FDEQ_GAIN_1 +198 0x4844 //RX_FDEQ_GAIN_2 +199 0x4A4C //RX_FDEQ_GAIN_3 +200 0x4E50 //RX_FDEQ_GAIN_4 +201 0x5254 //RX_FDEQ_GAIN_5 +202 0x5658 //RX_FDEQ_GAIN_6 +203 0x5A5C //RX_FDEQ_GAIN_7 +204 0x5C5C //RX_FDEQ_GAIN_8 +205 0x5C5C //RX_FDEQ_GAIN_9 +206 0x5C5C //RX_FDEQ_GAIN_10 +207 0x5C48 //RX_FDEQ_GAIN_11 +208 0x4848 //RX_FDEQ_GAIN_12 +209 0x4848 //RX_FDEQ_GAIN_13 +210 0x4848 //RX_FDEQ_GAIN_14 +211 0x4848 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0202 //RX_FDEQ_BIN_0 +221 0x0203 //RX_FDEQ_BIN_1 +222 0x0402 //RX_FDEQ_BIN_2 +223 0x0303 //RX_FDEQ_BIN_3 +224 0x0303 //RX_FDEQ_BIN_4 +225 0x0303 //RX_FDEQ_BIN_5 +226 0x0303 //RX_FDEQ_BIN_6 +227 0x0303 //RX_FDEQ_BIN_7 +228 0x0A0A //RX_FDEQ_BIN_8 +229 0x0A0E //RX_FDEQ_BIN_9 +230 0x0000 //RX_FDEQ_BIN_10 +231 0x0000 //RX_FDEQ_BIN_11 +232 0x0000 //RX_FDEQ_BIN_12 +233 0x0000 //RX_FDEQ_BIN_13 +234 0x0000 //RX_FDEQ_BIN_14 +235 0x0000 //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x4000 //RX_FDEQ_RESRV_0 +245 0x0320 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0030 //RX_FDDRC_BAND_MARGIN_1 +248 0x0050 //RX_FDDRC_BAND_MARGIN_2 +249 0x0080 //RX_FDDRC_BAND_MARGIN_3 +250 0x0007 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x5000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x6400 //RX_FDDRC_THRD_3_2 +258 0x6400 //RX_FDDRC_THRD_3_3 +259 0x2000 //RX_FDDRC_SLANT_0_0 +260 0x2000 //RX_FDDRC_SLANT_0_1 +261 0x2000 //RX_FDDRC_SLANT_0_2 +262 0x2000 //RX_FDDRC_SLANT_0_3 +263 0x5333 //RX_FDDRC_SLANT_1_0 +264 0x5333 //RX_FDDRC_SLANT_1_1 +265 0x5333 //RX_FDDRC_SLANT_1_2 +266 0x5333 //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +286 0x0100 //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 +#VOL 3 +163 0x1000 //RX_TDDRC_ALPHA_UP_1 +164 0x1000 //RX_TDDRC_ALPHA_UP_2 +165 0x1000 //RX_TDDRC_ALPHA_UP_3 +166 0x1000 //RX_TDDRC_ALPHA_UP_4 +184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +190 0x7000 //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +269 0x0000 //RX_TDDRC_THRD_0 +270 0x0000 //RX_TDDRC_THRD_1 +271 0x1800 //RX_TDDRC_THRD_2 +272 0x1800 //RX_TDDRC_THRD_3 +273 0x3000 //RX_TDDRC_SLANT_0 +274 0x6E00 //RX_TDDRC_SLANT_1 +275 0x1000 //RX_TDDRC_ALPHA_UP_0 +276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x199A //RX_TDDRC_HMNC_GAIN +279 0x0001 //RX_TDDRC_SMT_FLAG +280 0x0CCD //RX_TDDRC_SMT_W +281 0x0360 //RX_TDDRC_DRC_GAIN +195 0x0030 //RX_FDEQ_SUBNUM +196 0x4848 //RX_FDEQ_GAIN_0 +197 0x4848 //RX_FDEQ_GAIN_1 +198 0x4844 //RX_FDEQ_GAIN_2 +199 0x4A4C //RX_FDEQ_GAIN_3 +200 0x4E50 //RX_FDEQ_GAIN_4 +201 0x5254 //RX_FDEQ_GAIN_5 +202 0x5658 //RX_FDEQ_GAIN_6 +203 0x5A5C //RX_FDEQ_GAIN_7 +204 0x5C5C //RX_FDEQ_GAIN_8 +205 0x5C5C //RX_FDEQ_GAIN_9 +206 0x5C5C //RX_FDEQ_GAIN_10 +207 0x5C48 //RX_FDEQ_GAIN_11 +208 0x4848 //RX_FDEQ_GAIN_12 +209 0x4848 //RX_FDEQ_GAIN_13 +210 0x4848 //RX_FDEQ_GAIN_14 +211 0x4848 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0202 //RX_FDEQ_BIN_0 +221 0x0203 //RX_FDEQ_BIN_1 +222 0x0402 //RX_FDEQ_BIN_2 +223 0x0303 //RX_FDEQ_BIN_3 +224 0x0303 //RX_FDEQ_BIN_4 +225 0x0303 //RX_FDEQ_BIN_5 +226 0x0303 //RX_FDEQ_BIN_6 +227 0x0303 //RX_FDEQ_BIN_7 +228 0x0A0A //RX_FDEQ_BIN_8 +229 0x0A0E //RX_FDEQ_BIN_9 +230 0x0000 //RX_FDEQ_BIN_10 +231 0x0000 //RX_FDEQ_BIN_11 +232 0x0000 //RX_FDEQ_BIN_12 +233 0x0000 //RX_FDEQ_BIN_13 +234 0x0000 //RX_FDEQ_BIN_14 +235 0x0000 //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x4000 //RX_FDEQ_RESRV_0 +245 0x0320 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0030 //RX_FDDRC_BAND_MARGIN_1 +248 0x0050 //RX_FDDRC_BAND_MARGIN_2 +249 0x0080 //RX_FDDRC_BAND_MARGIN_3 +250 0x0007 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x5000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x6400 //RX_FDDRC_THRD_3_2 +258 0x6400 //RX_FDDRC_THRD_3_3 +259 0x2000 //RX_FDDRC_SLANT_0_0 +260 0x2000 //RX_FDDRC_SLANT_0_1 +261 0x2000 //RX_FDDRC_SLANT_0_2 +262 0x2000 //RX_FDDRC_SLANT_0_3 +263 0x5333 //RX_FDDRC_SLANT_1_0 +264 0x5333 //RX_FDDRC_SLANT_1_1 +265 0x5333 //RX_FDDRC_SLANT_1_2 +266 0x5333 //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +286 0x0100 //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 +#VOL 4 +163 0x1000 //RX_TDDRC_ALPHA_UP_1 +164 0x1000 //RX_TDDRC_ALPHA_UP_2 +165 0x1000 //RX_TDDRC_ALPHA_UP_3 +166 0x1000 //RX_TDDRC_ALPHA_UP_4 +184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +190 0x7000 //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +269 0x0000 //RX_TDDRC_THRD_0 +270 0x0000 //RX_TDDRC_THRD_1 +271 0x1800 //RX_TDDRC_THRD_2 +272 0x1800 //RX_TDDRC_THRD_3 +273 0x3000 //RX_TDDRC_SLANT_0 +274 0x6E00 //RX_TDDRC_SLANT_1 +275 0x1000 //RX_TDDRC_ALPHA_UP_0 +276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x199A //RX_TDDRC_HMNC_GAIN +279 0x0001 //RX_TDDRC_SMT_FLAG +280 0x0CCD //RX_TDDRC_SMT_W +281 0x0360 //RX_TDDRC_DRC_GAIN +195 0x0030 //RX_FDEQ_SUBNUM +196 0x4848 //RX_FDEQ_GAIN_0 +197 0x4848 //RX_FDEQ_GAIN_1 +198 0x4844 //RX_FDEQ_GAIN_2 +199 0x4A4C //RX_FDEQ_GAIN_3 +200 0x4E50 //RX_FDEQ_GAIN_4 +201 0x5254 //RX_FDEQ_GAIN_5 +202 0x5658 //RX_FDEQ_GAIN_6 +203 0x5A5C //RX_FDEQ_GAIN_7 +204 0x5C5C //RX_FDEQ_GAIN_8 +205 0x5C5C //RX_FDEQ_GAIN_9 +206 0x5C5C //RX_FDEQ_GAIN_10 +207 0x5C48 //RX_FDEQ_GAIN_11 +208 0x4848 //RX_FDEQ_GAIN_12 +209 0x4848 //RX_FDEQ_GAIN_13 +210 0x4848 //RX_FDEQ_GAIN_14 +211 0x4848 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0202 //RX_FDEQ_BIN_0 +221 0x0203 //RX_FDEQ_BIN_1 +222 0x0402 //RX_FDEQ_BIN_2 +223 0x0303 //RX_FDEQ_BIN_3 +224 0x0303 //RX_FDEQ_BIN_4 +225 0x0303 //RX_FDEQ_BIN_5 +226 0x0303 //RX_FDEQ_BIN_6 +227 0x0303 //RX_FDEQ_BIN_7 +228 0x0A0A //RX_FDEQ_BIN_8 +229 0x0A0E //RX_FDEQ_BIN_9 +230 0x0000 //RX_FDEQ_BIN_10 +231 0x0000 //RX_FDEQ_BIN_11 +232 0x0000 //RX_FDEQ_BIN_12 +233 0x0000 //RX_FDEQ_BIN_13 +234 0x0000 //RX_FDEQ_BIN_14 +235 0x0000 //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x4000 //RX_FDEQ_RESRV_0 +245 0x0320 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0030 //RX_FDDRC_BAND_MARGIN_1 +248 0x0050 //RX_FDDRC_BAND_MARGIN_2 +249 0x0080 //RX_FDDRC_BAND_MARGIN_3 +250 0x0007 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x5000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x6400 //RX_FDDRC_THRD_3_2 +258 0x6400 //RX_FDDRC_THRD_3_3 +259 0x2000 //RX_FDDRC_SLANT_0_0 +260 0x2000 //RX_FDDRC_SLANT_0_1 +261 0x2000 //RX_FDDRC_SLANT_0_2 +262 0x2000 //RX_FDDRC_SLANT_0_3 +263 0x5333 //RX_FDDRC_SLANT_1_0 +264 0x5333 //RX_FDDRC_SLANT_1_1 +265 0x5333 //RX_FDDRC_SLANT_1_2 +266 0x5333 //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +286 0x0100 //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 +#VOL 5 +163 0x1000 //RX_TDDRC_ALPHA_UP_1 +164 0x1000 //RX_TDDRC_ALPHA_UP_2 +165 0x1000 //RX_TDDRC_ALPHA_UP_3 +166 0x1000 //RX_TDDRC_ALPHA_UP_4 +184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +190 0x7000 //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +269 0x0000 //RX_TDDRC_THRD_0 +270 0x0000 //RX_TDDRC_THRD_1 +271 0x1800 //RX_TDDRC_THRD_2 +272 0x1800 //RX_TDDRC_THRD_3 +273 0x3000 //RX_TDDRC_SLANT_0 +274 0x6E00 //RX_TDDRC_SLANT_1 +275 0x1000 //RX_TDDRC_ALPHA_UP_0 +276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x199A //RX_TDDRC_HMNC_GAIN +279 0x0001 //RX_TDDRC_SMT_FLAG +280 0x0CCD //RX_TDDRC_SMT_W +281 0x0360 //RX_TDDRC_DRC_GAIN +195 0x0030 //RX_FDEQ_SUBNUM +196 0x4848 //RX_FDEQ_GAIN_0 +197 0x4848 //RX_FDEQ_GAIN_1 +198 0x4844 //RX_FDEQ_GAIN_2 +199 0x4A4C //RX_FDEQ_GAIN_3 +200 0x4E50 //RX_FDEQ_GAIN_4 +201 0x5254 //RX_FDEQ_GAIN_5 +202 0x5658 //RX_FDEQ_GAIN_6 +203 0x5A5C //RX_FDEQ_GAIN_7 +204 0x5C5C //RX_FDEQ_GAIN_8 +205 0x5C5C //RX_FDEQ_GAIN_9 +206 0x5C5C //RX_FDEQ_GAIN_10 +207 0x5C48 //RX_FDEQ_GAIN_11 +208 0x4848 //RX_FDEQ_GAIN_12 +209 0x4848 //RX_FDEQ_GAIN_13 +210 0x4848 //RX_FDEQ_GAIN_14 +211 0x4848 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0202 //RX_FDEQ_BIN_0 +221 0x0203 //RX_FDEQ_BIN_1 +222 0x0402 //RX_FDEQ_BIN_2 +223 0x0303 //RX_FDEQ_BIN_3 +224 0x0303 //RX_FDEQ_BIN_4 +225 0x0303 //RX_FDEQ_BIN_5 +226 0x0303 //RX_FDEQ_BIN_6 +227 0x0303 //RX_FDEQ_BIN_7 +228 0x0A0A //RX_FDEQ_BIN_8 +229 0x0A0E //RX_FDEQ_BIN_9 +230 0x0000 //RX_FDEQ_BIN_10 +231 0x0000 //RX_FDEQ_BIN_11 +232 0x0000 //RX_FDEQ_BIN_12 +233 0x0000 //RX_FDEQ_BIN_13 +234 0x0000 //RX_FDEQ_BIN_14 +235 0x0000 //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x4000 //RX_FDEQ_RESRV_0 +245 0x0320 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0030 //RX_FDDRC_BAND_MARGIN_1 +248 0x0050 //RX_FDDRC_BAND_MARGIN_2 +249 0x0080 //RX_FDDRC_BAND_MARGIN_3 +250 0x0007 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x5000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x6400 //RX_FDDRC_THRD_3_2 +258 0x6400 //RX_FDDRC_THRD_3_3 +259 0x2000 //RX_FDDRC_SLANT_0_0 +260 0x2000 //RX_FDDRC_SLANT_0_1 +261 0x2000 //RX_FDDRC_SLANT_0_2 +262 0x2000 //RX_FDDRC_SLANT_0_3 +263 0x5333 //RX_FDDRC_SLANT_1_0 +264 0x5333 //RX_FDDRC_SLANT_1_1 +265 0x5333 //RX_FDDRC_SLANT_1_2 +266 0x5333 //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +286 0x0100 //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 +#VOL 6 +163 0x1000 //RX_TDDRC_ALPHA_UP_1 +164 0x1000 //RX_TDDRC_ALPHA_UP_2 +165 0x1000 //RX_TDDRC_ALPHA_UP_3 +166 0x1000 //RX_TDDRC_ALPHA_UP_4 +184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +190 0x7000 //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +269 0x0000 //RX_TDDRC_THRD_0 +270 0x0000 //RX_TDDRC_THRD_1 +271 0x1800 //RX_TDDRC_THRD_2 +272 0x1800 //RX_TDDRC_THRD_3 +273 0x3000 //RX_TDDRC_SLANT_0 +274 0x6E00 //RX_TDDRC_SLANT_1 +275 0x1000 //RX_TDDRC_ALPHA_UP_0 +276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x199A //RX_TDDRC_HMNC_GAIN +279 0x0001 //RX_TDDRC_SMT_FLAG +280 0x0CCD //RX_TDDRC_SMT_W +281 0x0360 //RX_TDDRC_DRC_GAIN +195 0x0030 //RX_FDEQ_SUBNUM +196 0x4848 //RX_FDEQ_GAIN_0 +197 0x4848 //RX_FDEQ_GAIN_1 +198 0x4844 //RX_FDEQ_GAIN_2 +199 0x4A4C //RX_FDEQ_GAIN_3 +200 0x4E50 //RX_FDEQ_GAIN_4 +201 0x5254 //RX_FDEQ_GAIN_5 +202 0x5658 //RX_FDEQ_GAIN_6 +203 0x5A5C //RX_FDEQ_GAIN_7 +204 0x5C5C //RX_FDEQ_GAIN_8 +205 0x5C5C //RX_FDEQ_GAIN_9 +206 0x5C5C //RX_FDEQ_GAIN_10 +207 0x5C48 //RX_FDEQ_GAIN_11 +208 0x4848 //RX_FDEQ_GAIN_12 +209 0x4848 //RX_FDEQ_GAIN_13 +210 0x4848 //RX_FDEQ_GAIN_14 +211 0x4848 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0202 //RX_FDEQ_BIN_0 +221 0x0203 //RX_FDEQ_BIN_1 +222 0x0402 //RX_FDEQ_BIN_2 +223 0x0303 //RX_FDEQ_BIN_3 +224 0x0303 //RX_FDEQ_BIN_4 +225 0x0303 //RX_FDEQ_BIN_5 +226 0x0303 //RX_FDEQ_BIN_6 +227 0x0303 //RX_FDEQ_BIN_7 +228 0x0A0A //RX_FDEQ_BIN_8 +229 0x0A0E //RX_FDEQ_BIN_9 +230 0x0000 //RX_FDEQ_BIN_10 +231 0x0000 //RX_FDEQ_BIN_11 +232 0x0000 //RX_FDEQ_BIN_12 +233 0x0000 //RX_FDEQ_BIN_13 +234 0x0000 //RX_FDEQ_BIN_14 +235 0x0000 //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x4000 //RX_FDEQ_RESRV_0 +245 0x0320 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0030 //RX_FDDRC_BAND_MARGIN_1 +248 0x0050 //RX_FDDRC_BAND_MARGIN_2 +249 0x0080 //RX_FDDRC_BAND_MARGIN_3 +250 0x0007 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x5000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x6400 //RX_FDDRC_THRD_3_2 +258 0x6400 //RX_FDDRC_THRD_3_3 +259 0x2000 //RX_FDDRC_SLANT_0_0 +260 0x2000 //RX_FDDRC_SLANT_0_1 +261 0x2000 //RX_FDDRC_SLANT_0_2 +262 0x2000 //RX_FDDRC_SLANT_0_3 +263 0x5333 //RX_FDDRC_SLANT_1_0 +264 0x5333 //RX_FDDRC_SLANT_1_1 +265 0x5333 //RX_FDDRC_SLANT_1_2 +266 0x5333 //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +286 0x0100 //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 #CASE_NAME HANDSET-HANDSET_HAC-VOICE_GENERIC-WB -#PARAM_TYPE TX+RX -#TOTAL_CUSTOM_STEP 7 +#PARAM_MODE Full +#PARAM_TYPE TX+2RX +#TOTAL_CUSTOM_STEP 7+7 #TX 0 0x0000 //TX_OPERATION_MODE_0 1 0x0000 //TX_OPERATION_MODE_1 @@ -14052,7 +21389,7 @@ 18 0x0000 //TX_SYS_RESRV_2 19 0x0000 //TX_SYS_RESRV_3 20 0x0000 //TX_DIST2REF0 -21 0x009D //TX_DIST2REF1 +21 0x009C //TX_DIST2REF1 22 0x0000 //TX_DIST2REF_02 23 0x0000 //TX_DIST2REF_03 24 0x0000 //TX_DIST2REF_04 @@ -14282,16 +21619,16 @@ 248 0xF800 //TX_THR_SN_EST_6 249 0xF700 //TX_THR_SN_EST_7 250 0x0000 //TX_DELTA_THR_SN_EST_0 -251 0x0100 //TX_DELTA_THR_SN_EST_1 -252 0x01A0 //TX_DELTA_THR_SN_EST_2 +251 0x01A0 //TX_DELTA_THR_SN_EST_1 +252 0x0200 //TX_DELTA_THR_SN_EST_2 253 0x0200 //TX_DELTA_THR_SN_EST_3 -254 0x0200 //TX_DELTA_THR_SN_EST_4 -255 0x0100 //TX_DELTA_THR_SN_EST_5 -256 0x0200 //TX_DELTA_THR_SN_EST_6 +254 0x0100 //TX_DELTA_THR_SN_EST_4 +255 0x0200 //TX_DELTA_THR_SN_EST_5 +256 0x0100 //TX_DELTA_THR_SN_EST_6 257 0x0200 //TX_DELTA_THR_SN_EST_7 258 0x4000 //TX_LAMBDA_NN_EST_0 -259 0x4000 //TX_LAMBDA_NN_EST_1 -260 0x5000 //TX_LAMBDA_NN_EST_2 +259 0x5000 //TX_LAMBDA_NN_EST_1 +260 0x4000 //TX_LAMBDA_NN_EST_2 261 0x4000 //TX_LAMBDA_NN_EST_3 262 0x4000 //TX_LAMBDA_NN_EST_4 263 0x4000 //TX_LAMBDA_NN_EST_5 @@ -14313,18 +21650,18 @@ 279 0x1000 //TX_B_POST_FLT_0 280 0x4000 //TX_B_POST_FLT_1 281 0x0018 //TX_NS_LVL_CTRL_0 -282 0x001C //TX_NS_LVL_CTRL_1 -283 0x0019 //TX_NS_LVL_CTRL_2 -284 0x0018 //TX_NS_LVL_CTRL_3 -285 0x0019 //TX_NS_LVL_CTRL_4 -286 0x001A //TX_NS_LVL_CTRL_5 -287 0x001E //TX_NS_LVL_CTRL_6 +282 0x0019 //TX_NS_LVL_CTRL_1 +283 0x0018 //TX_NS_LVL_CTRL_2 +284 0x0019 //TX_NS_LVL_CTRL_3 +285 0x001A //TX_NS_LVL_CTRL_4 +286 0x001E //TX_NS_LVL_CTRL_5 +287 0x001C //TX_NS_LVL_CTRL_6 288 0x001C //TX_NS_LVL_CTRL_7 289 0x000E //TX_MIN_GAIN_S_0 -290 0x0018 //TX_MIN_GAIN_S_1 +290 0x0012 //TX_MIN_GAIN_S_1 291 0x0012 //TX_MIN_GAIN_S_2 292 0x0012 //TX_MIN_GAIN_S_3 -293 0x0012 //TX_MIN_GAIN_S_4 +293 0x0018 //TX_MIN_GAIN_S_4 294 0x0018 //TX_MIN_GAIN_S_5 295 0x0018 //TX_MIN_GAIN_S_6 296 0x0018 //TX_MIN_GAIN_S_7 @@ -14332,8 +21669,8 @@ 298 0x0000 //TX_NS_MAX_PRI_SNR_TH 299 0x0000 //TX_NMOS_SUP_MENSA 300 0x7FFF //TX_SNRI_SUP_0 -301 0x4000 //TX_SNRI_SUP_1 -302 0x5000 //TX_SNRI_SUP_2 +301 0x5000 //TX_SNRI_SUP_1 +302 0x4000 //TX_SNRI_SUP_2 303 0x4000 //TX_SNRI_SUP_3 304 0x4000 //TX_SNRI_SUP_4 305 0x4000 //TX_SNRI_SUP_5 @@ -14346,28 +21683,28 @@ 312 0x7FFF //TX_A_POST_FILT_0 313 0x2000 //TX_A_POST_FILT_1 314 0x7000 //TX_A_POST_FILT_S_0 -315 0x7000 //TX_A_POST_FILT_S_1 +315 0x3000 //TX_A_POST_FILT_S_1 316 0x3000 //TX_A_POST_FILT_S_2 -317 0x3000 //TX_A_POST_FILT_S_3 -318 0x2000 //TX_A_POST_FILT_S_4 +317 0x2000 //TX_A_POST_FILT_S_3 +318 0x7000 //TX_A_POST_FILT_S_4 319 0x7000 //TX_A_POST_FILT_S_5 320 0x7000 //TX_A_POST_FILT_S_6 321 0x7000 //TX_A_POST_FILT_S_7 322 0x1000 //TX_B_POST_FILT_0 323 0x4000 //TX_B_POST_FILT_1 -324 0x5000 //TX_B_POST_FILT_2 +324 0x4000 //TX_B_POST_FILT_2 325 0x4000 //TX_B_POST_FILT_3 326 0x4000 //TX_B_POST_FILT_4 327 0x4000 //TX_B_POST_FILT_5 -328 0x4000 //TX_B_POST_FILT_6 +328 0x5000 //TX_B_POST_FILT_6 329 0x4000 //TX_B_POST_FILT_7 330 0x4000 //TX_B_LESSCUT_RTO_S_0 331 0x6000 //TX_B_LESSCUT_RTO_S_1 332 0x6000 //TX_B_LESSCUT_RTO_S_2 333 0x6000 //TX_B_LESSCUT_RTO_S_3 -334 0x6000 //TX_B_LESSCUT_RTO_S_4 +334 0x7FFF //TX_B_LESSCUT_RTO_S_4 335 0x6000 //TX_B_LESSCUT_RTO_S_5 -336 0x7FFF //TX_B_LESSCUT_RTO_S_6 +336 0x6000 //TX_B_LESSCUT_RTO_S_6 337 0x7FFF //TX_B_LESSCUT_RTO_S_7 338 0x7C29 //TX_LAMBDA_PFILT 339 0x7C29 //TX_LAMBDA_PFILT_S_0 @@ -14411,10 +21748,10 @@ 377 0x4E20 //TX_NOISE_TH_5_4 378 0x21E8 //TX_NOISE_TH_6 379 0x0014 //TX_MINENOISE_TH -380 0x4000 //TX_MINENOISE_MIC0_TH_MTS -381 0xFFEE //TX_MINENOISE_MIC0_TH_EXP -382 0x6000 //TX_MINENOISE_MIC0_S_TH_MTS -383 0xFFF3 //TX_MINENOISE_MIC0_S_TH_EXP +380 0xD508 //TX_MORENS_TFMASK_TH +381 0x0001 //TX_DRC_QUIET_FLOOR +382 0x6D60 //TX_RATIODTL_CUT_TH +383 0x0DAC //TX_DT_CUT_K1 384 0x00A5 //TX_OUT_ENER_S_TH_CLEAN 385 0x00A5 //TX_OUT_ENER_S_TH_LESSCLEAN 386 0x00A5 //TX_OUT_ENER_S_TH_NOISY @@ -14422,15 +21759,15 @@ 388 0x00CE //TX_OUT_ENER_TH_SPEECH 389 0x2000 //TX_SN_NPB_GAIN 390 0x0000 //TX_NN_NPB_GAIN -391 0x0000 //TX_CSX_ALPHA_0 -392 0x0000 //TX_CSX_ALPHA_1 -393 0x0000 //TX_CSX_ALPHA_2 -394 0x0000 //TX_CSX_ALPHA_3 -395 0x0800 //TX_MU_ARSP_EST -396 0x00C8 //TX_P_OUTBEAM_MIN_TH +391 0x3000 //TX_POST_MASK_SUP_HSNE +392 0x07D0 //TX_TAIL_DET_TH +393 0x4000 //TX_B_LESSCUT_RTO_WTA +394 0x0000 //TX_MEL_G_R +395 0x0080 //TX_SUPHIGH_TH +396 0x4000 //TX_MASK_G_R 397 0x0002 //TX_EXTRA_NS_L -398 0x0800 //TX_EXTRA_NS_A -399 0x0005 //TX_VR_NOISE_FLOOR_TH +398 0x1800 //TX_C_POST_FLT_MASK +399 0x7FFF //TX_A_POST_FLT_WNS 400 0x0148 //TX_MIN_G_LOW300HZ 401 0x0004 //TX_MAXLEVEL_CNG 402 0x00B4 //TX_STN_NOISE_TH @@ -14545,16 +21882,16 @@ 511 0x6666 //TX_MIC_TO_BFGAIN 512 0x0000 //TX_MICTOBFGAIN0 513 0x0000 //TX_FASTMUE_TH -514 0x0000 //TX_DERVB_LEN_0 -515 0x0000 //TX_DERVB_LEN_1 -516 0x0000 //TX_RHO_DERVB -517 0x0000 //TX_MIC_INDX_DERVB -518 0x0000 //TX_MU_DERVB -519 0x0000 //TX_DR_RESRV_0 -520 0x0000 //TX_DR_RESRV_1 -521 0x0000 //TX_DR_RESRV_2 -522 0x0000 //TX_DR_RESRV_3 -523 0x0000 //TX_DR_RESRV_4 +514 0x3000 //TX_DEREVERB_LF_MU +515 0x34CD //TX_DEREVERB_HF_MU +516 0x0007 //TX_DEREVERB_DELAY +517 0x0004 //TX_DEREVERB_COEF_LEN +518 0x0003 //TX_DEREVERB_DNR +519 0x0000 //TX_DEREVERB_ALPHA +520 0x0000 //TX_DEREVERB_BETA +521 0x0000 //TX_GSC_RTOL_TH +522 0x0000 //TX_GSC_RTOH_TH +523 0x7E2C //TX_WIDE2_MEANHTH 524 0x0000 //TX_DR_RESRV_5 525 0x0000 //TX_DR_RESRV_6 526 0x0000 //TX_DR_RESRV_7 @@ -14655,12 +21992,12 @@ 621 0x4848 //TX_PREEQ_GAIN_MIC0_4 622 0x4848 //TX_PREEQ_GAIN_MIC0_5 623 0x4848 //TX_PREEQ_GAIN_MIC0_6 -624 0x4846 //TX_PREEQ_GAIN_MIC0_7 -625 0x4544 //TX_PREEQ_GAIN_MIC0_8 -626 0x4241 //TX_PREEQ_GAIN_MIC0_9 -627 0x403E //TX_PREEQ_GAIN_MIC0_10 -628 0x3D3C //TX_PREEQ_GAIN_MIC0_11 -629 0x3C3C //TX_PREEQ_GAIN_MIC0_12 +624 0x4848 //TX_PREEQ_GAIN_MIC0_7 +625 0x4848 //TX_PREEQ_GAIN_MIC0_8 +626 0x4848 //TX_PREEQ_GAIN_MIC0_9 +627 0x4848 //TX_PREEQ_GAIN_MIC0_10 +628 0x4848 //TX_PREEQ_GAIN_MIC0_11 +629 0x4848 //TX_PREEQ_GAIN_MIC0_12 630 0x4848 //TX_PREEQ_GAIN_MIC0_13 631 0x4848 //TX_PREEQ_GAIN_MIC0_14 632 0x4848 //TX_PREEQ_GAIN_MIC0_15 @@ -14705,11 +22042,11 @@ 671 0x4848 //TX_PREEQ_GAIN_MIC1_5 672 0x4848 //TX_PREEQ_GAIN_MIC1_6 673 0x4848 //TX_PREEQ_GAIN_MIC1_7 -674 0x484A //TX_PREEQ_GAIN_MIC1_8 -675 0x4B4C //TX_PREEQ_GAIN_MIC1_9 +674 0x4848 //TX_PREEQ_GAIN_MIC1_8 +675 0x4A4B //TX_PREEQ_GAIN_MIC1_9 676 0x4B4A //TX_PREEQ_GAIN_MIC1_10 -677 0x4A48 //TX_PREEQ_GAIN_MIC1_11 -678 0x4C4C //TX_PREEQ_GAIN_MIC1_12 +677 0x4848 //TX_PREEQ_GAIN_MIC1_11 +678 0x494C //TX_PREEQ_GAIN_MIC1_12 679 0x4C4C //TX_PREEQ_GAIN_MIC1_13 680 0x4848 //TX_PREEQ_GAIN_MIC1_14 681 0x4848 //TX_PREEQ_GAIN_MIC1_15 @@ -14807,7 +22144,7 @@ 773 0x0000 //TX_GAIN_LIMIT_0 774 0x0000 //TX_GAIN_LIMIT_1 775 0x0006 //TX_GAIN_LIMIT_2 -776 0x0006 //TX_GAIN_LIMIT_3 +776 0x0005 //TX_GAIN_LIMIT_3 777 0x7F5B //TX_BVE_NOVAD0_ALPHADOWN 778 0x7FDE //TX_BVE_VAD0_ALPHAUP 779 0x7F3A //TX_BVE_VAD0_ALPHADOWN @@ -14928,6 +22265,71 @@ 894 0xC000 //TX_FASTNS_SSA_THHFL 895 0xCCCC //TX_FASTNS_SSA_THLFH 896 0xD999 //TX_FASTNS_SSA_THHFH +897 0x2339 //TX_SENDFUNC_REG_MICMUTE +898 0x0021 //TX_SENDFUNC_REG_MICMUTE1 +899 0x02BC //TX_MICMUTE_RATIO_THR +900 0x0140 //TX_MICMUTE_AMP_THR +901 0x0004 //TX_MICMUTE_HPF_IND +902 0x00C0 //TX_MICMUTE_LOG_EYR_TH +903 0x0008 //TX_MICMUTE_CVG_TIME +904 0x0008 //TX_MICMUTE_RELEASE_TIME +905 0x01FE //TX_MIC_VOLUME_MIC0MUTE +906 0x0020 //TX_MICMUTE_EPD_OFFSET_0 +907 0x001E //TX_MICMUTE_FRQ_AEC_L +908 0x7999 //TX_MICMUTE_EAD_THR +909 0x7FFF //TX_MICMUTE_LAMBDA_CB_NLE +910 0x7FFF //TX_MICMUTE_LAMBDA_RE_EST +911 0x4000 //TX_DTD_THR1_MICMUTE_0 +912 0x7000 //TX_DTD_THR1_MICMUTE_1 +913 0x7FFF //TX_DTD_THR1_MICMUTE_2 +914 0x7FFF //TX_DTD_THR1_MICMUTE_3 +915 0x6CCC //TX_DTD_THR2_MICMUTE_0 +916 0x0400 //TX_MICMUTE_MIN_EQ_RE_EST_0 +917 0x0400 //TX_MICMUTE_MIN_EQ_RE_EST_1 +918 0x1000 //TX_MICMUTE_MIN_EQ_RE_EST_2 +919 0x7FFF //TX_MICMUTE_MIN_EQ_RE_EST_3 +920 0x7FFF //TX_MICMUTE_MIN_EQ_RE_EST_4 +921 0x4000 //TX_MICMUTE_C_POST_FLT +922 0x03E8 //TX_MICMUTE_DT_CUT_K +923 0x0001 //TX_MICMUTE_DT_CUT_THR +924 0x03E8 //TX_MICMUTE_DT_CUT_K2 +925 0x0001 //TX_MICMUTE_DT_CUT_THR2 +926 0x0064 //TX_MICMUTE_DT2_HOLD_N +927 0x1000 //TX_MICMUTE_RATIODTH_THCUT +928 0x1000 //TX_MICMUTE_B_POST_FLT_ECHOL +929 0x7FFF //TX_MICMUTE_B_POST_FLT_ECHOH +930 0x0400 //TX_MICMUTE_C_POST_FLT_MASK +931 0x7999 //TX_MICMUTE_RATIODTL_CUT_TH +932 0x0258 //TX_MICMUTE_DT_CUT_K1 +933 0x0800 //TX_MICMUTE_N2_SN_EST +934 0xFC00 //TX_MICMUTE_THR_SN_EST_0 +935 0x001C //TX_MICMUTE_MIN_G_CTRL_0 +936 0x6000 //TX_MICMUTE_A_POST_FILT_S_0 +937 0x7000 //TX_MICMUTE_B_POST_FILT_0 +938 0x2710 //TX_MIC1RUB_AMP_THR +939 0x0010 //TX_MIC1MUTE_RATIO_THR +940 0x0450 //TX_MIC1MUTE_AMP_THR +941 0x0008 //TX_MIC1MUTE_CVG_TIME +942 0x0008 //TX_MIC1MUTE_RELEASE_TIME +943 0x0000 //TX_AMS_RESRV_01 +944 0x0000 //TX_AMS_RESRV_02 +945 0x0000 //TX_AMS_RESRV_03 +946 0x0000 //TX_AMS_RESRV_04 +947 0x0000 //TX_AMS_RESRV_05 +948 0x0000 //TX_AMS_RESRV_06 +949 0x0000 //TX_AMS_RESRV_07 +950 0x0000 //TX_AMS_RESRV_08 +951 0x0000 //TX_AMS_RESRV_09 +952 0x0000 //TX_AMS_RESRV_10 +953 0x0000 //TX_AMS_RESRV_11 +954 0x0000 //TX_AMS_RESRV_12 +955 0x0000 //TX_AMS_RESRV_13 +956 0x0000 //TX_AMS_RESRV_14 +957 0x0000 //TX_AMS_RESRV_15 +958 0x0000 //TX_AMS_RESRV_16 +959 0x0000 //TX_AMS_RESRV_17 +960 0x0000 //TX_AMS_RESRV_18 +961 0x0000 //TX_AMS_RESRV_19 #RX 0 0x000C //RX_RECVFUNC_MODE_0 1 0x0000 //RX_RECVFUNC_MODE_1 @@ -15779,14 +23181,866 @@ 110 0x0000 //RX_FDDRC_RESRV_0 129 0x0100 //RX_SPK_VOL 130 0x0000 //RX_VOL_RESRV_0 +#RX 2 +157 0x000C //RX_RECVFUNC_MODE_0 +158 0x0000 //RX_RECVFUNC_MODE_1 +159 0x0001 //RX_SAMPLINGFREQ_SIG +160 0x0001 //RX_SAMPLINGFREQ_PROC +161 0x000A //RX_FRAME_SZ +162 0x0000 //RX_DELAY_OPT +163 0x1000 //RX_TDDRC_ALPHA_UP_1 +164 0x1000 //RX_TDDRC_ALPHA_UP_2 +165 0x1000 //RX_TDDRC_ALPHA_UP_3 +166 0x1000 //RX_TDDRC_ALPHA_UP_4 +167 0x0800 //RX_PGA +168 0x7FFF //RX_A_HP +169 0x4000 //RX_B_PE +170 0x7800 //RX_THR_PITCH_DET_0 +171 0x7000 //RX_THR_PITCH_DET_1 +172 0x6000 //RX_THR_PITCH_DET_2 +173 0x0008 //RX_PITCH_BFR_LEN +174 0x0003 //RX_SBD_PITCH_DET +175 0x0100 //RX_PP_RESRV_0 +176 0x0020 //RX_PP_RESRV_1 +177 0x0400 //RX_N_SN_EST +178 0x000C //RX_N2_SN_EST +179 0x0014 //RX_NS_LVL_CTRL +180 0xF800 //RX_THR_SN_EST +181 0x7E00 //RX_LAMBDA_PFILT +182 0x000A //RX_FENS_RESRV_0 +183 0x0190 //RX_FENS_RESRV_1 +184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +187 0x0002 //RX_EXTRA_NS_L +188 0x0800 //RX_EXTRA_NS_A +189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +190 0x7000 //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +192 0x199A //RX_A_POST_FLT +193 0x0000 //RX_LMT_THRD +194 0x4000 //RX_LMT_ALPHA +195 0x0030 //RX_FDEQ_SUBNUM +196 0x4848 //RX_FDEQ_GAIN_0 +197 0x4848 //RX_FDEQ_GAIN_1 +198 0x4844 //RX_FDEQ_GAIN_2 +199 0x4A4C //RX_FDEQ_GAIN_3 +200 0x4E50 //RX_FDEQ_GAIN_4 +201 0x5254 //RX_FDEQ_GAIN_5 +202 0x5658 //RX_FDEQ_GAIN_6 +203 0x5A5C //RX_FDEQ_GAIN_7 +204 0x5C5C //RX_FDEQ_GAIN_8 +205 0x5C5C //RX_FDEQ_GAIN_9 +206 0x5C5C //RX_FDEQ_GAIN_10 +207 0x5C5C //RX_FDEQ_GAIN_11 +208 0x5C5C //RX_FDEQ_GAIN_12 +209 0x5C5C //RX_FDEQ_GAIN_13 +210 0x4848 //RX_FDEQ_GAIN_14 +211 0x4848 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0202 //RX_FDEQ_BIN_0 +221 0x0203 //RX_FDEQ_BIN_1 +222 0x0402 //RX_FDEQ_BIN_2 +223 0x0505 //RX_FDEQ_BIN_3 +224 0x0505 //RX_FDEQ_BIN_4 +225 0x0505 //RX_FDEQ_BIN_5 +226 0x0505 //RX_FDEQ_BIN_6 +227 0x0505 //RX_FDEQ_BIN_7 +228 0x160C //RX_FDEQ_BIN_8 +229 0x0D0E //RX_FDEQ_BIN_9 +230 0x0E0F //RX_FDEQ_BIN_10 +231 0x0F10 //RX_FDEQ_BIN_11 +232 0x1011 //RX_FDEQ_BIN_12 +233 0x1104 //RX_FDEQ_BIN_13 +234 0x0000 //RX_FDEQ_BIN_14 +235 0x0000 //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x4000 //RX_FDEQ_RESRV_0 +245 0x0320 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0030 //RX_FDDRC_BAND_MARGIN_1 +248 0x0050 //RX_FDDRC_BAND_MARGIN_2 +249 0x0080 //RX_FDDRC_BAND_MARGIN_3 +250 0x0007 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x5000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x6400 //RX_FDDRC_THRD_3_2 +258 0x6400 //RX_FDDRC_THRD_3_3 +259 0x2000 //RX_FDDRC_SLANT_0_0 +260 0x2000 //RX_FDDRC_SLANT_0_1 +261 0x2000 //RX_FDDRC_SLANT_0_2 +262 0x2000 //RX_FDDRC_SLANT_0_3 +263 0x5333 //RX_FDDRC_SLANT_1_0 +264 0x5333 //RX_FDDRC_SLANT_1_1 +265 0x5333 //RX_FDDRC_SLANT_1_2 +266 0x5333 //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +268 0x0002 //RX_FILTINDX +269 0x0000 //RX_TDDRC_THRD_0 +270 0x0000 //RX_TDDRC_THRD_1 +271 0x1800 //RX_TDDRC_THRD_2 +272 0x1800 //RX_TDDRC_THRD_3 +273 0x3000 //RX_TDDRC_SLANT_0 +274 0x6E00 //RX_TDDRC_SLANT_1 +275 0x1000 //RX_TDDRC_ALPHA_UP_0 +276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x199A //RX_TDDRC_HMNC_GAIN +279 0x0001 //RX_TDDRC_SMT_FLAG +280 0x0CCD //RX_TDDRC_SMT_W +281 0x0400 //RX_TDDRC_DRC_GAIN +282 0x7C00 //RX_LAMBDA_PKA_FP +283 0x2000 //RX_TPKA_FP +284 0x2000 //RX_MIN_G_FP +285 0x0080 //RX_MAX_G_FP +286 0x0100 //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 +288 0x0000 //RX_MAXLEVEL_CNG +289 0x3000 //RX_BWE_UV_TH +290 0x3000 //RX_BWE_UV_TH2 +291 0x1800 //RX_BWE_UV_TH3 +292 0x1000 //RX_BWE_V_TH +293 0x04CD //RX_BWE_GAIN1_V_TH1 +294 0x0F33 //RX_BWE_GAIN1_V_TH2 +295 0x7333 //RX_BWE_UV_EQ +296 0x199A //RX_BWE_V_EQ +297 0x7333 //RX_BWE_TONE_TH +298 0x0004 //RX_BWE_UV_HOLD_T +299 0x6CCD //RX_BWE_GAIN2_ALPHA +300 0x799A //RX_BWE_GAIN3_ALPHA +301 0x001E //RX_BWE_CUTOFF +302 0x3000 //RX_BWE_GAINFILL +303 0x3200 //RX_BWE_MAXTH_TONE +304 0x2000 //RX_BWE_EQ_0 +305 0x2000 //RX_BWE_EQ_1 +306 0x2000 //RX_BWE_EQ_2 +307 0x2000 //RX_BWE_EQ_3 +308 0x2000 //RX_BWE_EQ_4 +309 0x2000 //RX_BWE_EQ_5 +310 0x2000 //RX_BWE_EQ_6 +311 0x0000 //RX_BWE_RESRV_0 +312 0x0000 //RX_BWE_RESRV_1 +313 0x0000 //RX_BWE_RESRV_2 +#VOL 0 +163 0x1000 //RX_TDDRC_ALPHA_UP_1 +164 0x1000 //RX_TDDRC_ALPHA_UP_2 +165 0x1000 //RX_TDDRC_ALPHA_UP_3 +166 0x1000 //RX_TDDRC_ALPHA_UP_4 +184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +190 0x7000 //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +269 0x0000 //RX_TDDRC_THRD_0 +270 0x0000 //RX_TDDRC_THRD_1 +271 0x1800 //RX_TDDRC_THRD_2 +272 0x1800 //RX_TDDRC_THRD_3 +273 0x3000 //RX_TDDRC_SLANT_0 +274 0x6E00 //RX_TDDRC_SLANT_1 +275 0x1000 //RX_TDDRC_ALPHA_UP_0 +276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x199A //RX_TDDRC_HMNC_GAIN +279 0x0001 //RX_TDDRC_SMT_FLAG +280 0x0CCD //RX_TDDRC_SMT_W +281 0x0400 //RX_TDDRC_DRC_GAIN +195 0x0030 //RX_FDEQ_SUBNUM +196 0x4848 //RX_FDEQ_GAIN_0 +197 0x4848 //RX_FDEQ_GAIN_1 +198 0x4844 //RX_FDEQ_GAIN_2 +199 0x4A4C //RX_FDEQ_GAIN_3 +200 0x4E50 //RX_FDEQ_GAIN_4 +201 0x5254 //RX_FDEQ_GAIN_5 +202 0x5658 //RX_FDEQ_GAIN_6 +203 0x5A5C //RX_FDEQ_GAIN_7 +204 0x5C5C //RX_FDEQ_GAIN_8 +205 0x5C5C //RX_FDEQ_GAIN_9 +206 0x5C5C //RX_FDEQ_GAIN_10 +207 0x5C5C //RX_FDEQ_GAIN_11 +208 0x5C5C //RX_FDEQ_GAIN_12 +209 0x5C5C //RX_FDEQ_GAIN_13 +210 0x4848 //RX_FDEQ_GAIN_14 +211 0x4848 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0202 //RX_FDEQ_BIN_0 +221 0x0203 //RX_FDEQ_BIN_1 +222 0x0402 //RX_FDEQ_BIN_2 +223 0x0505 //RX_FDEQ_BIN_3 +224 0x0505 //RX_FDEQ_BIN_4 +225 0x0505 //RX_FDEQ_BIN_5 +226 0x0505 //RX_FDEQ_BIN_6 +227 0x0505 //RX_FDEQ_BIN_7 +228 0x160C //RX_FDEQ_BIN_8 +229 0x0D0E //RX_FDEQ_BIN_9 +230 0x0E0F //RX_FDEQ_BIN_10 +231 0x0F10 //RX_FDEQ_BIN_11 +232 0x1011 //RX_FDEQ_BIN_12 +233 0x1104 //RX_FDEQ_BIN_13 +234 0x0000 //RX_FDEQ_BIN_14 +235 0x0000 //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x4000 //RX_FDEQ_RESRV_0 +245 0x0320 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0030 //RX_FDDRC_BAND_MARGIN_1 +248 0x0050 //RX_FDDRC_BAND_MARGIN_2 +249 0x0080 //RX_FDDRC_BAND_MARGIN_3 +250 0x0007 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x5000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x6400 //RX_FDDRC_THRD_3_2 +258 0x6400 //RX_FDDRC_THRD_3_3 +259 0x2000 //RX_FDDRC_SLANT_0_0 +260 0x2000 //RX_FDDRC_SLANT_0_1 +261 0x2000 //RX_FDDRC_SLANT_0_2 +262 0x2000 //RX_FDDRC_SLANT_0_3 +263 0x5333 //RX_FDDRC_SLANT_1_0 +264 0x5333 //RX_FDDRC_SLANT_1_1 +265 0x5333 //RX_FDDRC_SLANT_1_2 +266 0x5333 //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +286 0x0100 //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 +#VOL 1 +163 0x1000 //RX_TDDRC_ALPHA_UP_1 +164 0x1000 //RX_TDDRC_ALPHA_UP_2 +165 0x1000 //RX_TDDRC_ALPHA_UP_3 +166 0x1000 //RX_TDDRC_ALPHA_UP_4 +184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +190 0x7000 //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +269 0x0000 //RX_TDDRC_THRD_0 +270 0x0000 //RX_TDDRC_THRD_1 +271 0x1800 //RX_TDDRC_THRD_2 +272 0x1800 //RX_TDDRC_THRD_3 +273 0x3000 //RX_TDDRC_SLANT_0 +274 0x6E00 //RX_TDDRC_SLANT_1 +275 0x1000 //RX_TDDRC_ALPHA_UP_0 +276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x199A //RX_TDDRC_HMNC_GAIN +279 0x0001 //RX_TDDRC_SMT_FLAG +280 0x0CCD //RX_TDDRC_SMT_W +281 0x0400 //RX_TDDRC_DRC_GAIN +195 0x0030 //RX_FDEQ_SUBNUM +196 0x4848 //RX_FDEQ_GAIN_0 +197 0x4848 //RX_FDEQ_GAIN_1 +198 0x4844 //RX_FDEQ_GAIN_2 +199 0x4A4C //RX_FDEQ_GAIN_3 +200 0x4E50 //RX_FDEQ_GAIN_4 +201 0x5254 //RX_FDEQ_GAIN_5 +202 0x5658 //RX_FDEQ_GAIN_6 +203 0x5A5C //RX_FDEQ_GAIN_7 +204 0x5C5C //RX_FDEQ_GAIN_8 +205 0x5C5C //RX_FDEQ_GAIN_9 +206 0x5C5C //RX_FDEQ_GAIN_10 +207 0x5C5C //RX_FDEQ_GAIN_11 +208 0x5C5C //RX_FDEQ_GAIN_12 +209 0x5C5C //RX_FDEQ_GAIN_13 +210 0x4848 //RX_FDEQ_GAIN_14 +211 0x4848 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0202 //RX_FDEQ_BIN_0 +221 0x0203 //RX_FDEQ_BIN_1 +222 0x0402 //RX_FDEQ_BIN_2 +223 0x0505 //RX_FDEQ_BIN_3 +224 0x0505 //RX_FDEQ_BIN_4 +225 0x0505 //RX_FDEQ_BIN_5 +226 0x0505 //RX_FDEQ_BIN_6 +227 0x0505 //RX_FDEQ_BIN_7 +228 0x160C //RX_FDEQ_BIN_8 +229 0x0D0E //RX_FDEQ_BIN_9 +230 0x0E0F //RX_FDEQ_BIN_10 +231 0x0F10 //RX_FDEQ_BIN_11 +232 0x1011 //RX_FDEQ_BIN_12 +233 0x1104 //RX_FDEQ_BIN_13 +234 0x0000 //RX_FDEQ_BIN_14 +235 0x0000 //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x4000 //RX_FDEQ_RESRV_0 +245 0x0320 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0030 //RX_FDDRC_BAND_MARGIN_1 +248 0x0050 //RX_FDDRC_BAND_MARGIN_2 +249 0x0080 //RX_FDDRC_BAND_MARGIN_3 +250 0x0007 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x5000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x6400 //RX_FDDRC_THRD_3_2 +258 0x6400 //RX_FDDRC_THRD_3_3 +259 0x2000 //RX_FDDRC_SLANT_0_0 +260 0x2000 //RX_FDDRC_SLANT_0_1 +261 0x2000 //RX_FDDRC_SLANT_0_2 +262 0x2000 //RX_FDDRC_SLANT_0_3 +263 0x5333 //RX_FDDRC_SLANT_1_0 +264 0x5333 //RX_FDDRC_SLANT_1_1 +265 0x5333 //RX_FDDRC_SLANT_1_2 +266 0x5333 //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +286 0x0100 //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 +#VOL 2 +163 0x1000 //RX_TDDRC_ALPHA_UP_1 +164 0x1000 //RX_TDDRC_ALPHA_UP_2 +165 0x1000 //RX_TDDRC_ALPHA_UP_3 +166 0x1000 //RX_TDDRC_ALPHA_UP_4 +184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +190 0x7000 //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +269 0x0000 //RX_TDDRC_THRD_0 +270 0x0000 //RX_TDDRC_THRD_1 +271 0x1800 //RX_TDDRC_THRD_2 +272 0x1800 //RX_TDDRC_THRD_3 +273 0x3000 //RX_TDDRC_SLANT_0 +274 0x6E00 //RX_TDDRC_SLANT_1 +275 0x1000 //RX_TDDRC_ALPHA_UP_0 +276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x199A //RX_TDDRC_HMNC_GAIN +279 0x0001 //RX_TDDRC_SMT_FLAG +280 0x0CCD //RX_TDDRC_SMT_W +281 0x0400 //RX_TDDRC_DRC_GAIN +195 0x0030 //RX_FDEQ_SUBNUM +196 0x4848 //RX_FDEQ_GAIN_0 +197 0x4848 //RX_FDEQ_GAIN_1 +198 0x4844 //RX_FDEQ_GAIN_2 +199 0x4A4C //RX_FDEQ_GAIN_3 +200 0x4E50 //RX_FDEQ_GAIN_4 +201 0x5254 //RX_FDEQ_GAIN_5 +202 0x5658 //RX_FDEQ_GAIN_6 +203 0x5A5C //RX_FDEQ_GAIN_7 +204 0x5C5C //RX_FDEQ_GAIN_8 +205 0x5C5C //RX_FDEQ_GAIN_9 +206 0x5C5C //RX_FDEQ_GAIN_10 +207 0x5C5C //RX_FDEQ_GAIN_11 +208 0x5C5C //RX_FDEQ_GAIN_12 +209 0x5C5C //RX_FDEQ_GAIN_13 +210 0x4848 //RX_FDEQ_GAIN_14 +211 0x4848 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0202 //RX_FDEQ_BIN_0 +221 0x0203 //RX_FDEQ_BIN_1 +222 0x0402 //RX_FDEQ_BIN_2 +223 0x0505 //RX_FDEQ_BIN_3 +224 0x0505 //RX_FDEQ_BIN_4 +225 0x0505 //RX_FDEQ_BIN_5 +226 0x0505 //RX_FDEQ_BIN_6 +227 0x0505 //RX_FDEQ_BIN_7 +228 0x160C //RX_FDEQ_BIN_8 +229 0x0D0E //RX_FDEQ_BIN_9 +230 0x0E0F //RX_FDEQ_BIN_10 +231 0x0F10 //RX_FDEQ_BIN_11 +232 0x1011 //RX_FDEQ_BIN_12 +233 0x1104 //RX_FDEQ_BIN_13 +234 0x0000 //RX_FDEQ_BIN_14 +235 0x0000 //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x4000 //RX_FDEQ_RESRV_0 +245 0x0320 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0030 //RX_FDDRC_BAND_MARGIN_1 +248 0x0050 //RX_FDDRC_BAND_MARGIN_2 +249 0x0080 //RX_FDDRC_BAND_MARGIN_3 +250 0x0007 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x5000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x6400 //RX_FDDRC_THRD_3_2 +258 0x6400 //RX_FDDRC_THRD_3_3 +259 0x2000 //RX_FDDRC_SLANT_0_0 +260 0x2000 //RX_FDDRC_SLANT_0_1 +261 0x2000 //RX_FDDRC_SLANT_0_2 +262 0x2000 //RX_FDDRC_SLANT_0_3 +263 0x5333 //RX_FDDRC_SLANT_1_0 +264 0x5333 //RX_FDDRC_SLANT_1_1 +265 0x5333 //RX_FDDRC_SLANT_1_2 +266 0x5333 //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +286 0x0100 //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 +#VOL 3 +163 0x1000 //RX_TDDRC_ALPHA_UP_1 +164 0x1000 //RX_TDDRC_ALPHA_UP_2 +165 0x1000 //RX_TDDRC_ALPHA_UP_3 +166 0x1000 //RX_TDDRC_ALPHA_UP_4 +184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +190 0x7000 //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +269 0x0000 //RX_TDDRC_THRD_0 +270 0x0000 //RX_TDDRC_THRD_1 +271 0x1800 //RX_TDDRC_THRD_2 +272 0x1800 //RX_TDDRC_THRD_3 +273 0x3000 //RX_TDDRC_SLANT_0 +274 0x6E00 //RX_TDDRC_SLANT_1 +275 0x1000 //RX_TDDRC_ALPHA_UP_0 +276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x199A //RX_TDDRC_HMNC_GAIN +279 0x0001 //RX_TDDRC_SMT_FLAG +280 0x0CCD //RX_TDDRC_SMT_W +281 0x0400 //RX_TDDRC_DRC_GAIN +195 0x0030 //RX_FDEQ_SUBNUM +196 0x4848 //RX_FDEQ_GAIN_0 +197 0x4848 //RX_FDEQ_GAIN_1 +198 0x4844 //RX_FDEQ_GAIN_2 +199 0x4A4C //RX_FDEQ_GAIN_3 +200 0x4E50 //RX_FDEQ_GAIN_4 +201 0x5254 //RX_FDEQ_GAIN_5 +202 0x5658 //RX_FDEQ_GAIN_6 +203 0x5A5C //RX_FDEQ_GAIN_7 +204 0x5C5C //RX_FDEQ_GAIN_8 +205 0x5C5C //RX_FDEQ_GAIN_9 +206 0x5C5C //RX_FDEQ_GAIN_10 +207 0x5C5C //RX_FDEQ_GAIN_11 +208 0x5C5C //RX_FDEQ_GAIN_12 +209 0x5C5C //RX_FDEQ_GAIN_13 +210 0x4848 //RX_FDEQ_GAIN_14 +211 0x4848 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0202 //RX_FDEQ_BIN_0 +221 0x0203 //RX_FDEQ_BIN_1 +222 0x0402 //RX_FDEQ_BIN_2 +223 0x0505 //RX_FDEQ_BIN_3 +224 0x0505 //RX_FDEQ_BIN_4 +225 0x0505 //RX_FDEQ_BIN_5 +226 0x0505 //RX_FDEQ_BIN_6 +227 0x0505 //RX_FDEQ_BIN_7 +228 0x160C //RX_FDEQ_BIN_8 +229 0x0D0E //RX_FDEQ_BIN_9 +230 0x0E0F //RX_FDEQ_BIN_10 +231 0x0F10 //RX_FDEQ_BIN_11 +232 0x1011 //RX_FDEQ_BIN_12 +233 0x1104 //RX_FDEQ_BIN_13 +234 0x0000 //RX_FDEQ_BIN_14 +235 0x0000 //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x4000 //RX_FDEQ_RESRV_0 +245 0x0320 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0030 //RX_FDDRC_BAND_MARGIN_1 +248 0x0050 //RX_FDDRC_BAND_MARGIN_2 +249 0x0080 //RX_FDDRC_BAND_MARGIN_3 +250 0x0007 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x5000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x6400 //RX_FDDRC_THRD_3_2 +258 0x6400 //RX_FDDRC_THRD_3_3 +259 0x2000 //RX_FDDRC_SLANT_0_0 +260 0x2000 //RX_FDDRC_SLANT_0_1 +261 0x2000 //RX_FDDRC_SLANT_0_2 +262 0x2000 //RX_FDDRC_SLANT_0_3 +263 0x5333 //RX_FDDRC_SLANT_1_0 +264 0x5333 //RX_FDDRC_SLANT_1_1 +265 0x5333 //RX_FDDRC_SLANT_1_2 +266 0x5333 //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +286 0x0100 //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 +#VOL 4 +163 0x1000 //RX_TDDRC_ALPHA_UP_1 +164 0x1000 //RX_TDDRC_ALPHA_UP_2 +165 0x1000 //RX_TDDRC_ALPHA_UP_3 +166 0x1000 //RX_TDDRC_ALPHA_UP_4 +184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +190 0x7000 //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +269 0x0000 //RX_TDDRC_THRD_0 +270 0x0000 //RX_TDDRC_THRD_1 +271 0x1800 //RX_TDDRC_THRD_2 +272 0x1800 //RX_TDDRC_THRD_3 +273 0x3000 //RX_TDDRC_SLANT_0 +274 0x6E00 //RX_TDDRC_SLANT_1 +275 0x1000 //RX_TDDRC_ALPHA_UP_0 +276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x199A //RX_TDDRC_HMNC_GAIN +279 0x0001 //RX_TDDRC_SMT_FLAG +280 0x0CCD //RX_TDDRC_SMT_W +281 0x0400 //RX_TDDRC_DRC_GAIN +195 0x0030 //RX_FDEQ_SUBNUM +196 0x4848 //RX_FDEQ_GAIN_0 +197 0x4848 //RX_FDEQ_GAIN_1 +198 0x4844 //RX_FDEQ_GAIN_2 +199 0x4A4C //RX_FDEQ_GAIN_3 +200 0x4E50 //RX_FDEQ_GAIN_4 +201 0x5254 //RX_FDEQ_GAIN_5 +202 0x5658 //RX_FDEQ_GAIN_6 +203 0x5A5C //RX_FDEQ_GAIN_7 +204 0x5C5C //RX_FDEQ_GAIN_8 +205 0x5C5C //RX_FDEQ_GAIN_9 +206 0x5C5C //RX_FDEQ_GAIN_10 +207 0x5C5C //RX_FDEQ_GAIN_11 +208 0x5C5C //RX_FDEQ_GAIN_12 +209 0x5C5C //RX_FDEQ_GAIN_13 +210 0x4848 //RX_FDEQ_GAIN_14 +211 0x4848 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0202 //RX_FDEQ_BIN_0 +221 0x0203 //RX_FDEQ_BIN_1 +222 0x0402 //RX_FDEQ_BIN_2 +223 0x0505 //RX_FDEQ_BIN_3 +224 0x0505 //RX_FDEQ_BIN_4 +225 0x0505 //RX_FDEQ_BIN_5 +226 0x0505 //RX_FDEQ_BIN_6 +227 0x0505 //RX_FDEQ_BIN_7 +228 0x160C //RX_FDEQ_BIN_8 +229 0x0D0E //RX_FDEQ_BIN_9 +230 0x0E0F //RX_FDEQ_BIN_10 +231 0x0F10 //RX_FDEQ_BIN_11 +232 0x1011 //RX_FDEQ_BIN_12 +233 0x1104 //RX_FDEQ_BIN_13 +234 0x0000 //RX_FDEQ_BIN_14 +235 0x0000 //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x4000 //RX_FDEQ_RESRV_0 +245 0x0320 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0030 //RX_FDDRC_BAND_MARGIN_1 +248 0x0050 //RX_FDDRC_BAND_MARGIN_2 +249 0x0080 //RX_FDDRC_BAND_MARGIN_3 +250 0x0007 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x5000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x6400 //RX_FDDRC_THRD_3_2 +258 0x6400 //RX_FDDRC_THRD_3_3 +259 0x2000 //RX_FDDRC_SLANT_0_0 +260 0x2000 //RX_FDDRC_SLANT_0_1 +261 0x2000 //RX_FDDRC_SLANT_0_2 +262 0x2000 //RX_FDDRC_SLANT_0_3 +263 0x5333 //RX_FDDRC_SLANT_1_0 +264 0x5333 //RX_FDDRC_SLANT_1_1 +265 0x5333 //RX_FDDRC_SLANT_1_2 +266 0x5333 //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +286 0x0100 //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 +#VOL 5 +163 0x1000 //RX_TDDRC_ALPHA_UP_1 +164 0x1000 //RX_TDDRC_ALPHA_UP_2 +165 0x1000 //RX_TDDRC_ALPHA_UP_3 +166 0x1000 //RX_TDDRC_ALPHA_UP_4 +184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +190 0x7000 //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +269 0x0000 //RX_TDDRC_THRD_0 +270 0x0000 //RX_TDDRC_THRD_1 +271 0x1800 //RX_TDDRC_THRD_2 +272 0x1800 //RX_TDDRC_THRD_3 +273 0x3000 //RX_TDDRC_SLANT_0 +274 0x6E00 //RX_TDDRC_SLANT_1 +275 0x1000 //RX_TDDRC_ALPHA_UP_0 +276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x199A //RX_TDDRC_HMNC_GAIN +279 0x0001 //RX_TDDRC_SMT_FLAG +280 0x0CCD //RX_TDDRC_SMT_W +281 0x0400 //RX_TDDRC_DRC_GAIN +195 0x0030 //RX_FDEQ_SUBNUM +196 0x4848 //RX_FDEQ_GAIN_0 +197 0x4848 //RX_FDEQ_GAIN_1 +198 0x4844 //RX_FDEQ_GAIN_2 +199 0x4A4C //RX_FDEQ_GAIN_3 +200 0x4E50 //RX_FDEQ_GAIN_4 +201 0x5254 //RX_FDEQ_GAIN_5 +202 0x5658 //RX_FDEQ_GAIN_6 +203 0x5A5C //RX_FDEQ_GAIN_7 +204 0x5C5C //RX_FDEQ_GAIN_8 +205 0x5C5C //RX_FDEQ_GAIN_9 +206 0x5C5C //RX_FDEQ_GAIN_10 +207 0x5C5C //RX_FDEQ_GAIN_11 +208 0x5C5C //RX_FDEQ_GAIN_12 +209 0x5C5C //RX_FDEQ_GAIN_13 +210 0x4848 //RX_FDEQ_GAIN_14 +211 0x4848 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0202 //RX_FDEQ_BIN_0 +221 0x0203 //RX_FDEQ_BIN_1 +222 0x0402 //RX_FDEQ_BIN_2 +223 0x0505 //RX_FDEQ_BIN_3 +224 0x0505 //RX_FDEQ_BIN_4 +225 0x0505 //RX_FDEQ_BIN_5 +226 0x0505 //RX_FDEQ_BIN_6 +227 0x0505 //RX_FDEQ_BIN_7 +228 0x160C //RX_FDEQ_BIN_8 +229 0x0D0E //RX_FDEQ_BIN_9 +230 0x0E0F //RX_FDEQ_BIN_10 +231 0x0F10 //RX_FDEQ_BIN_11 +232 0x1011 //RX_FDEQ_BIN_12 +233 0x1104 //RX_FDEQ_BIN_13 +234 0x0000 //RX_FDEQ_BIN_14 +235 0x0000 //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x4000 //RX_FDEQ_RESRV_0 +245 0x0320 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0030 //RX_FDDRC_BAND_MARGIN_1 +248 0x0050 //RX_FDDRC_BAND_MARGIN_2 +249 0x0080 //RX_FDDRC_BAND_MARGIN_3 +250 0x0007 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x5000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x6400 //RX_FDDRC_THRD_3_2 +258 0x6400 //RX_FDDRC_THRD_3_3 +259 0x2000 //RX_FDDRC_SLANT_0_0 +260 0x2000 //RX_FDDRC_SLANT_0_1 +261 0x2000 //RX_FDDRC_SLANT_0_2 +262 0x2000 //RX_FDDRC_SLANT_0_3 +263 0x5333 //RX_FDDRC_SLANT_1_0 +264 0x5333 //RX_FDDRC_SLANT_1_1 +265 0x5333 //RX_FDDRC_SLANT_1_2 +266 0x5333 //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +286 0x0100 //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 +#VOL 6 +163 0x1000 //RX_TDDRC_ALPHA_UP_1 +164 0x1000 //RX_TDDRC_ALPHA_UP_2 +165 0x1000 //RX_TDDRC_ALPHA_UP_3 +166 0x1000 //RX_TDDRC_ALPHA_UP_4 +184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +190 0x7000 //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +269 0x0000 //RX_TDDRC_THRD_0 +270 0x0000 //RX_TDDRC_THRD_1 +271 0x1800 //RX_TDDRC_THRD_2 +272 0x1800 //RX_TDDRC_THRD_3 +273 0x3000 //RX_TDDRC_SLANT_0 +274 0x6E00 //RX_TDDRC_SLANT_1 +275 0x1000 //RX_TDDRC_ALPHA_UP_0 +276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x199A //RX_TDDRC_HMNC_GAIN +279 0x0001 //RX_TDDRC_SMT_FLAG +280 0x0CCD //RX_TDDRC_SMT_W +281 0x0400 //RX_TDDRC_DRC_GAIN +195 0x0030 //RX_FDEQ_SUBNUM +196 0x4848 //RX_FDEQ_GAIN_0 +197 0x4848 //RX_FDEQ_GAIN_1 +198 0x4844 //RX_FDEQ_GAIN_2 +199 0x4A4C //RX_FDEQ_GAIN_3 +200 0x4E50 //RX_FDEQ_GAIN_4 +201 0x5254 //RX_FDEQ_GAIN_5 +202 0x5658 //RX_FDEQ_GAIN_6 +203 0x5A5C //RX_FDEQ_GAIN_7 +204 0x5C5C //RX_FDEQ_GAIN_8 +205 0x5C5C //RX_FDEQ_GAIN_9 +206 0x5C5C //RX_FDEQ_GAIN_10 +207 0x5C5C //RX_FDEQ_GAIN_11 +208 0x5C5C //RX_FDEQ_GAIN_12 +209 0x5C5C //RX_FDEQ_GAIN_13 +210 0x4848 //RX_FDEQ_GAIN_14 +211 0x4848 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0202 //RX_FDEQ_BIN_0 +221 0x0203 //RX_FDEQ_BIN_1 +222 0x0402 //RX_FDEQ_BIN_2 +223 0x0505 //RX_FDEQ_BIN_3 +224 0x0505 //RX_FDEQ_BIN_4 +225 0x0505 //RX_FDEQ_BIN_5 +226 0x0505 //RX_FDEQ_BIN_6 +227 0x0505 //RX_FDEQ_BIN_7 +228 0x160C //RX_FDEQ_BIN_8 +229 0x0D0E //RX_FDEQ_BIN_9 +230 0x0E0F //RX_FDEQ_BIN_10 +231 0x0F10 //RX_FDEQ_BIN_11 +232 0x1011 //RX_FDEQ_BIN_12 +233 0x1104 //RX_FDEQ_BIN_13 +234 0x0000 //RX_FDEQ_BIN_14 +235 0x0000 //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x4000 //RX_FDEQ_RESRV_0 +245 0x0320 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0030 //RX_FDDRC_BAND_MARGIN_1 +248 0x0050 //RX_FDDRC_BAND_MARGIN_2 +249 0x0080 //RX_FDDRC_BAND_MARGIN_3 +250 0x0007 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x5000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x6400 //RX_FDDRC_THRD_3_2 +258 0x6400 //RX_FDDRC_THRD_3_3 +259 0x2000 //RX_FDDRC_SLANT_0_0 +260 0x2000 //RX_FDDRC_SLANT_0_1 +261 0x2000 //RX_FDDRC_SLANT_0_2 +262 0x2000 //RX_FDDRC_SLANT_0_3 +263 0x5333 //RX_FDDRC_SLANT_1_0 +264 0x5333 //RX_FDDRC_SLANT_1_1 +265 0x5333 //RX_FDDRC_SLANT_1_2 +266 0x5333 //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +286 0x0100 //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 #CASE_NAME HANDSET-HANDSET_HAC-VOICE_GENERIC-SWB -#PARAM_TYPE TX+RX -#TOTAL_CUSTOM_STEP 7 +#PARAM_MODE Full +#PARAM_TYPE TX+2RX +#TOTAL_CUSTOM_STEP 7+7 #TX 0 0x0000 //TX_OPERATION_MODE_0 1 0x0000 //TX_OPERATION_MODE_1 -2 0x0026 //TX_PATCH_REG +2 0x0076 //TX_PATCH_REG 3 0x6F7E //TX_SENDFUNC_MODE_0 4 0x0001 //TX_SENDFUNC_MODE_1 5 0x0002 //TX_NUM_MIC @@ -15805,7 +24059,7 @@ 18 0x0000 //TX_SYS_RESRV_2 19 0x0000 //TX_SYS_RESRV_3 20 0x0000 //TX_DIST2REF0 -21 0x009D //TX_DIST2REF1 +21 0x009C //TX_DIST2REF1 22 0x0000 //TX_DIST2REF_02 23 0x0000 //TX_DIST2REF_03 24 0x0000 //TX_DIST2REF_04 @@ -16035,12 +24289,12 @@ 248 0xF800 //TX_THR_SN_EST_6 249 0xF700 //TX_THR_SN_EST_7 250 0x0000 //TX_DELTA_THR_SN_EST_0 -251 0x0100 //TX_DELTA_THR_SN_EST_1 +251 0x0200 //TX_DELTA_THR_SN_EST_1 252 0x0200 //TX_DELTA_THR_SN_EST_2 253 0x0200 //TX_DELTA_THR_SN_EST_3 -254 0x0200 //TX_DELTA_THR_SN_EST_4 -255 0x0100 //TX_DELTA_THR_SN_EST_5 -256 0x0200 //TX_DELTA_THR_SN_EST_6 +254 0x0100 //TX_DELTA_THR_SN_EST_4 +255 0x0200 //TX_DELTA_THR_SN_EST_5 +256 0x0100 //TX_DELTA_THR_SN_EST_6 257 0x0200 //TX_DELTA_THR_SN_EST_7 258 0x4000 //TX_LAMBDA_NN_EST_0 259 0x4000 //TX_LAMBDA_NN_EST_1 @@ -16066,18 +24320,18 @@ 279 0x1000 //TX_B_POST_FLT_0 280 0x1000 //TX_B_POST_FLT_1 281 0x0014 //TX_NS_LVL_CTRL_0 -282 0x0016 //TX_NS_LVL_CTRL_1 -283 0x002C //TX_NS_LVL_CTRL_2 -284 0x0016 //TX_NS_LVL_CTRL_3 -285 0x0018 //TX_NS_LVL_CTRL_4 -286 0x0016 //TX_NS_LVL_CTRL_5 -287 0x0012 //TX_NS_LVL_CTRL_6 +282 0x002C //TX_NS_LVL_CTRL_1 +283 0x0016 //TX_NS_LVL_CTRL_2 +284 0x0018 //TX_NS_LVL_CTRL_3 +285 0x0016 //TX_NS_LVL_CTRL_4 +286 0x0012 //TX_NS_LVL_CTRL_5 +287 0x0016 //TX_NS_LVL_CTRL_6 288 0x0017 //TX_NS_LVL_CTRL_7 289 0x000E //TX_MIN_GAIN_S_0 -290 0x0012 //TX_MIN_GAIN_S_1 -291 0x000D //TX_MIN_GAIN_S_2 -292 0x0012 //TX_MIN_GAIN_S_3 -293 0x0010 //TX_MIN_GAIN_S_4 +290 0x000D //TX_MIN_GAIN_S_1 +291 0x0012 //TX_MIN_GAIN_S_2 +292 0x0010 //TX_MIN_GAIN_S_3 +293 0x0012 //TX_MIN_GAIN_S_4 294 0x0012 //TX_MIN_GAIN_S_5 295 0x0012 //TX_MIN_GAIN_S_6 296 0x0012 //TX_MIN_GAIN_S_7 @@ -16099,29 +24353,29 @@ 312 0x7FFF //TX_A_POST_FILT_0 313 0x2000 //TX_A_POST_FILT_1 314 0x4000 //TX_A_POST_FILT_S_0 -315 0x5000 //TX_A_POST_FILT_S_1 +315 0x4000 //TX_A_POST_FILT_S_1 316 0x4000 //TX_A_POST_FILT_S_2 317 0x4000 //TX_A_POST_FILT_S_3 318 0x4000 //TX_A_POST_FILT_S_4 319 0x4000 //TX_A_POST_FILT_S_5 -320 0x4000 //TX_A_POST_FILT_S_6 +320 0x5000 //TX_A_POST_FILT_S_6 321 0x7000 //TX_A_POST_FILT_S_7 322 0x1000 //TX_B_POST_FILT_0 323 0x1000 //TX_B_POST_FILT_1 -324 0x3000 //TX_B_POST_FILT_2 -325 0x1000 //TX_B_POST_FILT_3 -326 0x5000 //TX_B_POST_FILT_4 -327 0x2000 //TX_B_POST_FILT_5 -328 0x6000 //TX_B_POST_FILT_6 +324 0x2000 //TX_B_POST_FILT_2 +325 0x2000 //TX_B_POST_FILT_3 +326 0x2000 //TX_B_POST_FILT_4 +327 0x1000 //TX_B_POST_FILT_5 +328 0x3000 //TX_B_POST_FILT_6 329 0x3000 //TX_B_POST_FILT_7 330 0x1000 //TX_B_LESSCUT_RTO_S_0 -331 0x6000 //TX_B_LESSCUT_RTO_S_1 -332 0x6000 //TX_B_LESSCUT_RTO_S_2 -333 0x6000 //TX_B_LESSCUT_RTO_S_3 -334 0x6000 //TX_B_LESSCUT_RTO_S_4 -335 0x6000 //TX_B_LESSCUT_RTO_S_5 -336 0x7FFF //TX_B_LESSCUT_RTO_S_6 -337 0x7FFF //TX_B_LESSCUT_RTO_S_7 +331 0x1000 //TX_B_LESSCUT_RTO_S_1 +332 0x1000 //TX_B_LESSCUT_RTO_S_2 +333 0x1000 //TX_B_LESSCUT_RTO_S_3 +334 0x1000 //TX_B_LESSCUT_RTO_S_4 +335 0x1000 //TX_B_LESSCUT_RTO_S_5 +336 0x1000 //TX_B_LESSCUT_RTO_S_6 +337 0x1000 //TX_B_LESSCUT_RTO_S_7 338 0x7E14 //TX_LAMBDA_PFILT 339 0x7C29 //TX_LAMBDA_PFILT_S_0 340 0x7C29 //TX_LAMBDA_PFILT_S_1 @@ -16164,10 +24418,10 @@ 377 0x4E20 //TX_NOISE_TH_5_4 378 0x1194 //TX_NOISE_TH_6 379 0x0014 //TX_MINENOISE_TH -380 0x4000 //TX_MINENOISE_MIC0_TH_MTS -381 0xFFEE //TX_MINENOISE_MIC0_TH_EXP -382 0x6000 //TX_MINENOISE_MIC0_S_TH_MTS -383 0xFFF3 //TX_MINENOISE_MIC0_S_TH_EXP +380 0xD508 //TX_MORENS_TFMASK_TH +381 0x0001 //TX_DRC_QUIET_FLOOR +382 0x6D60 //TX_RATIODTL_CUT_TH +383 0x0DAC //TX_DT_CUT_K1 384 0x00A5 //TX_OUT_ENER_S_TH_CLEAN 385 0x00A5 //TX_OUT_ENER_S_TH_LESSCLEAN 386 0x00A5 //TX_OUT_ENER_S_TH_NOISY @@ -16175,15 +24429,15 @@ 388 0x0200 //TX_OUT_ENER_TH_SPEECH 389 0x2000 //TX_SN_NPB_GAIN 390 0x0000 //TX_NN_NPB_GAIN -391 0x0000 //TX_CSX_ALPHA_0 -392 0x0000 //TX_CSX_ALPHA_1 -393 0x0000 //TX_CSX_ALPHA_2 -394 0x0000 //TX_CSX_ALPHA_3 -395 0x0800 //TX_MU_ARSP_EST -396 0x00C8 //TX_P_OUTBEAM_MIN_TH +391 0x3000 //TX_POST_MASK_SUP_HSNE +392 0x07D0 //TX_TAIL_DET_TH +393 0x4000 //TX_B_LESSCUT_RTO_WTA +394 0x0000 //TX_MEL_G_R +395 0x0080 //TX_SUPHIGH_TH +396 0x0000 //TX_MASK_G_R 397 0x0002 //TX_EXTRA_NS_L -398 0x0800 //TX_EXTRA_NS_A -399 0x0005 //TX_VR_NOISE_FLOOR_TH +398 0x1800 //TX_C_POST_FLT_MASK +399 0x7FFF //TX_A_POST_FLT_WNS 400 0x0148 //TX_MIN_G_LOW300HZ 401 0x0004 //TX_MAXLEVEL_CNG 402 0x00B4 //TX_STN_NOISE_TH @@ -16298,16 +24552,16 @@ 511 0x6666 //TX_MIC_TO_BFGAIN 512 0x0000 //TX_MICTOBFGAIN0 513 0x0000 //TX_FASTMUE_TH -514 0x0000 //TX_DERVB_LEN_0 -515 0x0000 //TX_DERVB_LEN_1 -516 0x0000 //TX_RHO_DERVB -517 0x0000 //TX_MIC_INDX_DERVB -518 0x0000 //TX_MU_DERVB -519 0x0000 //TX_DR_RESRV_0 -520 0x0000 //TX_DR_RESRV_1 -521 0x0000 //TX_DR_RESRV_2 -522 0x0000 //TX_DR_RESRV_3 -523 0x0000 //TX_DR_RESRV_4 +514 0x2CCC //TX_DEREVERB_LF_MU +515 0x3200 //TX_DEREVERB_HF_MU +516 0x0007 //TX_DEREVERB_DELAY +517 0x0004 //TX_DEREVERB_COEF_LEN +518 0x0003 //TX_DEREVERB_DNR +519 0x0000 //TX_DEREVERB_ALPHA +520 0x0000 //TX_DEREVERB_BETA +521 0x3A98 //TX_GSC_RTOL_TH +522 0x3A98 //TX_GSC_RTOH_TH +523 0x7E2C //TX_WIDE2_MEANHTH 524 0x0000 //TX_DR_RESRV_5 525 0x0000 //TX_DR_RESRV_6 526 0x0000 //TX_DR_RESRV_7 @@ -16355,18 +24609,18 @@ 568 0x5048 //TX_FDEQ_GAIN_1 569 0x4C4C //TX_FDEQ_GAIN_2 570 0x474A //TX_FDEQ_GAIN_3 -571 0x423C //TX_FDEQ_GAIN_4 -572 0x4042 //TX_FDEQ_GAIN_5 -573 0x474F //TX_FDEQ_GAIN_6 -574 0x5444 //TX_FDEQ_GAIN_7 +571 0x4640 //TX_FDEQ_GAIN_4 +572 0x4446 //TX_FDEQ_GAIN_5 +573 0x4B53 //TX_FDEQ_GAIN_6 +574 0x5448 //TX_FDEQ_GAIN_7 575 0x4243 //TX_FDEQ_GAIN_8 -576 0x4344 //TX_FDEQ_GAIN_9 -577 0x414D //TX_FDEQ_GAIN_10 -578 0x4A47 //TX_FDEQ_GAIN_11 -579 0x4346 //TX_FDEQ_GAIN_12 -580 0x4C4F //TX_FDEQ_GAIN_13 -581 0x565B //TX_FDEQ_GAIN_14 -582 0x6448 //TX_FDEQ_GAIN_15 +576 0x434C //TX_FDEQ_GAIN_9 +577 0x484D //TX_FDEQ_GAIN_10 +578 0x4D4D //TX_FDEQ_GAIN_11 +579 0x4B4E //TX_FDEQ_GAIN_12 +580 0x5054 //TX_FDEQ_GAIN_13 +581 0x5D68 //TX_FDEQ_GAIN_14 +582 0x7C6B //TX_FDEQ_GAIN_15 583 0x4848 //TX_FDEQ_GAIN_16 584 0x4848 //TX_FDEQ_GAIN_17 585 0x4848 //TX_FDEQ_GAIN_18 @@ -16409,14 +24663,14 @@ 622 0x4848 //TX_PREEQ_GAIN_MIC0_5 623 0x4848 //TX_PREEQ_GAIN_MIC0_6 624 0x4848 //TX_PREEQ_GAIN_MIC0_7 -625 0x4646 //TX_PREEQ_GAIN_MIC0_8 -626 0x4545 //TX_PREEQ_GAIN_MIC0_9 -627 0x4545 //TX_PREEQ_GAIN_MIC0_10 -628 0x4544 //TX_PREEQ_GAIN_MIC0_11 -629 0x4444 //TX_PREEQ_GAIN_MIC0_12 -630 0x4343 //TX_PREEQ_GAIN_MIC0_13 -631 0x4241 //TX_PREEQ_GAIN_MIC0_14 -632 0x3C3E //TX_PREEQ_GAIN_MIC0_15 +625 0x4848 //TX_PREEQ_GAIN_MIC0_8 +626 0x4848 //TX_PREEQ_GAIN_MIC0_9 +627 0x4848 //TX_PREEQ_GAIN_MIC0_10 +628 0x4848 //TX_PREEQ_GAIN_MIC0_11 +629 0x4848 //TX_PREEQ_GAIN_MIC0_12 +630 0x4848 //TX_PREEQ_GAIN_MIC0_13 +631 0x4848 //TX_PREEQ_GAIN_MIC0_14 +632 0x4848 //TX_PREEQ_GAIN_MIC0_15 633 0x4848 //TX_PREEQ_GAIN_MIC0_16 634 0x4848 //TX_PREEQ_GAIN_MIC0_17 635 0x4848 //TX_PREEQ_GAIN_MIC0_18 @@ -16458,15 +24712,15 @@ 671 0x4848 //TX_PREEQ_GAIN_MIC1_5 672 0x4848 //TX_PREEQ_GAIN_MIC1_6 673 0x4848 //TX_PREEQ_GAIN_MIC1_7 -674 0x484A //TX_PREEQ_GAIN_MIC1_8 -675 0x4B4C //TX_PREEQ_GAIN_MIC1_9 -676 0x4B4A //TX_PREEQ_GAIN_MIC1_10 -677 0x4A48 //TX_PREEQ_GAIN_MIC1_11 -678 0x4C4C //TX_PREEQ_GAIN_MIC1_12 -679 0x4C4C //TX_PREEQ_GAIN_MIC1_13 -680 0x4848 //TX_PREEQ_GAIN_MIC1_14 -681 0x4848 //TX_PREEQ_GAIN_MIC1_15 -682 0x4848 //TX_PREEQ_GAIN_MIC1_16 +674 0x4848 //TX_PREEQ_GAIN_MIC1_8 +675 0x494A //TX_PREEQ_GAIN_MIC1_9 +676 0x4B4B //TX_PREEQ_GAIN_MIC1_10 +677 0x4B4B //TX_PREEQ_GAIN_MIC1_11 +678 0x4D4C //TX_PREEQ_GAIN_MIC1_12 +679 0x4A48 //TX_PREEQ_GAIN_MIC1_13 +680 0x4840 //TX_PREEQ_GAIN_MIC1_14 +681 0x3434 //TX_PREEQ_GAIN_MIC1_15 +682 0x3C48 //TX_PREEQ_GAIN_MIC1_16 683 0x4848 //TX_PREEQ_GAIN_MIC1_17 684 0x4848 //TX_PREEQ_GAIN_MIC1_18 685 0x4848 //TX_PREEQ_GAIN_MIC1_19 @@ -16480,17 +24734,17 @@ 693 0x0304 //TX_PREEQ_BIN_MIC1_3 694 0x0405 //TX_PREEQ_BIN_MIC1_4 695 0x0506 //TX_PREEQ_BIN_MIC1_5 -696 0x0708 //TX_PREEQ_BIN_MIC1_6 -697 0x090A //TX_PREEQ_BIN_MIC1_7 -698 0x0B0C //TX_PREEQ_BIN_MIC1_8 -699 0x0D0E //TX_PREEQ_BIN_MIC1_9 -700 0x0F10 //TX_PREEQ_BIN_MIC1_10 -701 0x1011 //TX_PREEQ_BIN_MIC1_11 -702 0x1112 //TX_PREEQ_BIN_MIC1_12 -703 0x120B //TX_PREEQ_BIN_MIC1_13 -704 0x0000 //TX_PREEQ_BIN_MIC1_14 -705 0x0000 //TX_PREEQ_BIN_MIC1_15 -706 0x0000 //TX_PREEQ_BIN_MIC1_16 +696 0x0808 //TX_PREEQ_BIN_MIC1_6 +697 0x0809 //TX_PREEQ_BIN_MIC1_7 +698 0x0A0A //TX_PREEQ_BIN_MIC1_8 +699 0x0C10 //TX_PREEQ_BIN_MIC1_9 +700 0x1013 //TX_PREEQ_BIN_MIC1_10 +701 0x1414 //TX_PREEQ_BIN_MIC1_11 +702 0x261E //TX_PREEQ_BIN_MIC1_12 +703 0x1E14 //TX_PREEQ_BIN_MIC1_13 +704 0x1414 //TX_PREEQ_BIN_MIC1_14 +705 0x2814 //TX_PREEQ_BIN_MIC1_15 +706 0x401E //TX_PREEQ_BIN_MIC1_16 707 0x0000 //TX_PREEQ_BIN_MIC1_17 708 0x0000 //TX_PREEQ_BIN_MIC1_18 709 0x0000 //TX_PREEQ_BIN_MIC1_19 @@ -16558,7 +24812,7 @@ 771 0x0046 //TX_MIC_PWR_BIAS_2 772 0x0046 //TX_MIC_PWR_BIAS_3 773 0x0000 //TX_GAIN_LIMIT_0 -774 0x0006 //TX_GAIN_LIMIT_1 +774 0x0005 //TX_GAIN_LIMIT_1 775 0x0000 //TX_GAIN_LIMIT_2 776 0x0000 //TX_GAIN_LIMIT_3 777 0x7F5B //TX_BVE_NOVAD0_ALPHADOWN @@ -16650,7 +24904,7 @@ 863 0x199A //TX_TDDRC_HMNC_GAIN 864 0x0000 //TX_TDDRC_SMT_FLAG 865 0x0CCD //TX_TDDRC_SMT_W -866 0x0550 //TX_TDDRC_DRC_GAIN +866 0x0504 //TX_TDDRC_DRC_GAIN 867 0x7FFF //TX_TDDRC_LMT_THRD 868 0x0000 //TX_TDDRC_LMT_ALPHA 869 0x0000 //TX_TFMASKLTH @@ -16681,6 +24935,71 @@ 894 0xC000 //TX_FASTNS_SSA_THHFL 895 0xCCCC //TX_FASTNS_SSA_THLFH 896 0xD999 //TX_FASTNS_SSA_THHFH +897 0x2339 //TX_SENDFUNC_REG_MICMUTE +898 0x0021 //TX_SENDFUNC_REG_MICMUTE1 +899 0x02BC //TX_MICMUTE_RATIO_THR +900 0x0140 //TX_MICMUTE_AMP_THR +901 0x0004 //TX_MICMUTE_HPF_IND +902 0x00C0 //TX_MICMUTE_LOG_EYR_TH +903 0x0008 //TX_MICMUTE_CVG_TIME +904 0x0008 //TX_MICMUTE_RELEASE_TIME +905 0x01FE //TX_MIC_VOLUME_MIC0MUTE +906 0x0020 //TX_MICMUTE_EPD_OFFSET_0 +907 0x001E //TX_MICMUTE_FRQ_AEC_L +908 0x7999 //TX_MICMUTE_EAD_THR +909 0x7FFF //TX_MICMUTE_LAMBDA_CB_NLE +910 0x7FFF //TX_MICMUTE_LAMBDA_RE_EST +911 0x4000 //TX_DTD_THR1_MICMUTE_0 +912 0x7000 //TX_DTD_THR1_MICMUTE_1 +913 0x7FFF //TX_DTD_THR1_MICMUTE_2 +914 0x7FFF //TX_DTD_THR1_MICMUTE_3 +915 0x6CCC //TX_DTD_THR2_MICMUTE_0 +916 0x0400 //TX_MICMUTE_MIN_EQ_RE_EST_0 +917 0x0400 //TX_MICMUTE_MIN_EQ_RE_EST_1 +918 0x1000 //TX_MICMUTE_MIN_EQ_RE_EST_2 +919 0x7FFF //TX_MICMUTE_MIN_EQ_RE_EST_3 +920 0x7FFF //TX_MICMUTE_MIN_EQ_RE_EST_4 +921 0x4000 //TX_MICMUTE_C_POST_FLT +922 0x03E8 //TX_MICMUTE_DT_CUT_K +923 0x0001 //TX_MICMUTE_DT_CUT_THR +924 0x03E8 //TX_MICMUTE_DT_CUT_K2 +925 0x0001 //TX_MICMUTE_DT_CUT_THR2 +926 0x0064 //TX_MICMUTE_DT2_HOLD_N +927 0x1000 //TX_MICMUTE_RATIODTH_THCUT +928 0x1000 //TX_MICMUTE_B_POST_FLT_ECHOL +929 0x7FFF //TX_MICMUTE_B_POST_FLT_ECHOH +930 0x0400 //TX_MICMUTE_C_POST_FLT_MASK +931 0x7999 //TX_MICMUTE_RATIODTL_CUT_TH +932 0x0258 //TX_MICMUTE_DT_CUT_K1 +933 0x0800 //TX_MICMUTE_N2_SN_EST +934 0xFC00 //TX_MICMUTE_THR_SN_EST_0 +935 0x001C //TX_MICMUTE_MIN_G_CTRL_0 +936 0x6000 //TX_MICMUTE_A_POST_FILT_S_0 +937 0x7000 //TX_MICMUTE_B_POST_FILT_0 +938 0x2710 //TX_MIC1RUB_AMP_THR +939 0x0010 //TX_MIC1MUTE_RATIO_THR +940 0x0450 //TX_MIC1MUTE_AMP_THR +941 0x0008 //TX_MIC1MUTE_CVG_TIME +942 0x0008 //TX_MIC1MUTE_RELEASE_TIME +943 0x0000 //TX_AMS_RESRV_01 +944 0x0000 //TX_AMS_RESRV_02 +945 0x0000 //TX_AMS_RESRV_03 +946 0x0000 //TX_AMS_RESRV_04 +947 0x0000 //TX_AMS_RESRV_05 +948 0x0000 //TX_AMS_RESRV_06 +949 0x0000 //TX_AMS_RESRV_07 +950 0x0000 //TX_AMS_RESRV_08 +951 0x0000 //TX_AMS_RESRV_09 +952 0x0000 //TX_AMS_RESRV_10 +953 0x0000 //TX_AMS_RESRV_11 +954 0x0000 //TX_AMS_RESRV_12 +955 0x0000 //TX_AMS_RESRV_13 +956 0x0000 //TX_AMS_RESRV_14 +957 0x0000 //TX_AMS_RESRV_15 +958 0x0000 //TX_AMS_RESRV_16 +959 0x0000 //TX_AMS_RESRV_17 +960 0x0000 //TX_AMS_RESRV_18 +961 0x0000 //TX_AMS_RESRV_19 #RX 0 0x000C //RX_RECVFUNC_MODE_0 1 0x0000 //RX_RECVFUNC_MODE_1 @@ -17532,10 +25851,862 @@ 110 0x0000 //RX_FDDRC_RESRV_0 129 0x0100 //RX_SPK_VOL 130 0x0000 //RX_VOL_RESRV_0 +#RX 2 +157 0x000C //RX_RECVFUNC_MODE_0 +158 0x0000 //RX_RECVFUNC_MODE_1 +159 0x0003 //RX_SAMPLINGFREQ_SIG +160 0x0003 //RX_SAMPLINGFREQ_PROC +161 0x000A //RX_FRAME_SZ +162 0x0000 //RX_DELAY_OPT +163 0x1000 //RX_TDDRC_ALPHA_UP_1 +164 0x1000 //RX_TDDRC_ALPHA_UP_2 +165 0x1000 //RX_TDDRC_ALPHA_UP_3 +166 0x1000 //RX_TDDRC_ALPHA_UP_4 +167 0x0800 //RX_PGA +168 0x7FFF //RX_A_HP +169 0x4000 //RX_B_PE +170 0x5800 //RX_THR_PITCH_DET_0 +171 0x5000 //RX_THR_PITCH_DET_1 +172 0x4000 //RX_THR_PITCH_DET_2 +173 0x0008 //RX_PITCH_BFR_LEN +174 0x0003 //RX_SBD_PITCH_DET +175 0x0100 //RX_PP_RESRV_0 +176 0x0020 //RX_PP_RESRV_1 +177 0x0600 //RX_N_SN_EST +178 0x000C //RX_N2_SN_EST +179 0x000F //RX_NS_LVL_CTRL +180 0xF800 //RX_THR_SN_EST +181 0x7E00 //RX_LAMBDA_PFILT +182 0x000A //RX_FENS_RESRV_0 +183 0x0190 //RX_FENS_RESRV_1 +184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +187 0x0002 //RX_EXTRA_NS_L +188 0x0800 //RX_EXTRA_NS_A +189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +190 0x7000 //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +192 0x199A //RX_A_POST_FLT +193 0x0000 //RX_LMT_THRD +194 0x4000 //RX_LMT_ALPHA +195 0x0030 //RX_FDEQ_SUBNUM +196 0x4848 //RX_FDEQ_GAIN_0 +197 0x4848 //RX_FDEQ_GAIN_1 +198 0x4844 //RX_FDEQ_GAIN_2 +199 0x4B4D //RX_FDEQ_GAIN_3 +200 0x4E50 //RX_FDEQ_GAIN_4 +201 0x5254 //RX_FDEQ_GAIN_5 +202 0x5658 //RX_FDEQ_GAIN_6 +203 0x5C60 //RX_FDEQ_GAIN_7 +204 0x6468 //RX_FDEQ_GAIN_8 +205 0x6C70 //RX_FDEQ_GAIN_9 +206 0x7474 //RX_FDEQ_GAIN_10 +207 0x7474 //RX_FDEQ_GAIN_11 +208 0x7474 //RX_FDEQ_GAIN_12 +209 0x7474 //RX_FDEQ_GAIN_13 +210 0x7474 //RX_FDEQ_GAIN_14 +211 0x7474 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0202 //RX_FDEQ_BIN_0 +221 0x0203 //RX_FDEQ_BIN_1 +222 0x0402 //RX_FDEQ_BIN_2 +223 0x0304 //RX_FDEQ_BIN_3 +224 0x0405 //RX_FDEQ_BIN_4 +225 0x0506 //RX_FDEQ_BIN_5 +226 0x0708 //RX_FDEQ_BIN_6 +227 0x090A //RX_FDEQ_BIN_7 +228 0x0B0C //RX_FDEQ_BIN_8 +229 0x0D0E //RX_FDEQ_BIN_9 +230 0x1214 //RX_FDEQ_BIN_10 +231 0x1E1E //RX_FDEQ_BIN_11 +232 0x1E1E //RX_FDEQ_BIN_12 +233 0x1E1E //RX_FDEQ_BIN_13 +234 0x1E1E //RX_FDEQ_BIN_14 +235 0x202C //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x4000 //RX_FDEQ_RESRV_0 +245 0x0320 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0030 //RX_FDDRC_BAND_MARGIN_1 +248 0x0050 //RX_FDDRC_BAND_MARGIN_2 +249 0x0080 //RX_FDDRC_BAND_MARGIN_3 +250 0x0007 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x5000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x6400 //RX_FDDRC_THRD_3_2 +258 0x6400 //RX_FDDRC_THRD_3_3 +259 0x2000 //RX_FDDRC_SLANT_0_0 +260 0x2000 //RX_FDDRC_SLANT_0_1 +261 0x2000 //RX_FDDRC_SLANT_0_2 +262 0x2000 //RX_FDDRC_SLANT_0_3 +263 0x5333 //RX_FDDRC_SLANT_1_0 +264 0x5333 //RX_FDDRC_SLANT_1_1 +265 0x5333 //RX_FDDRC_SLANT_1_2 +266 0x5333 //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +268 0x0002 //RX_FILTINDX +269 0x0000 //RX_TDDRC_THRD_0 +270 0x0000 //RX_TDDRC_THRD_1 +271 0x1800 //RX_TDDRC_THRD_2 +272 0x1800 //RX_TDDRC_THRD_3 +273 0x3000 //RX_TDDRC_SLANT_0 +274 0x6E00 //RX_TDDRC_SLANT_1 +275 0x1000 //RX_TDDRC_ALPHA_UP_0 +276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x199A //RX_TDDRC_HMNC_GAIN +279 0x0001 //RX_TDDRC_SMT_FLAG +280 0x0CCD //RX_TDDRC_SMT_W +281 0x01E0 //RX_TDDRC_DRC_GAIN +282 0x7C00 //RX_LAMBDA_PKA_FP +283 0x2000 //RX_TPKA_FP +284 0x2000 //RX_MIN_G_FP +285 0x0080 //RX_MAX_G_FP +286 0x0100 //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 +288 0x0000 //RX_MAXLEVEL_CNG +289 0x3000 //RX_BWE_UV_TH +290 0x3000 //RX_BWE_UV_TH2 +291 0x1800 //RX_BWE_UV_TH3 +292 0x1000 //RX_BWE_V_TH +293 0x04CD //RX_BWE_GAIN1_V_TH1 +294 0x0F33 //RX_BWE_GAIN1_V_TH2 +295 0x7333 //RX_BWE_UV_EQ +296 0x199A //RX_BWE_V_EQ +297 0x7333 //RX_BWE_TONE_TH +298 0x0004 //RX_BWE_UV_HOLD_T +299 0x6CCD //RX_BWE_GAIN2_ALPHA +300 0x799A //RX_BWE_GAIN3_ALPHA +301 0x001E //RX_BWE_CUTOFF +302 0x3000 //RX_BWE_GAINFILL +303 0x3200 //RX_BWE_MAXTH_TONE +304 0x2000 //RX_BWE_EQ_0 +305 0x2000 //RX_BWE_EQ_1 +306 0x2000 //RX_BWE_EQ_2 +307 0x2000 //RX_BWE_EQ_3 +308 0x2000 //RX_BWE_EQ_4 +309 0x2000 //RX_BWE_EQ_5 +310 0x2000 //RX_BWE_EQ_6 +311 0x0000 //RX_BWE_RESRV_0 +312 0x0000 //RX_BWE_RESRV_1 +313 0x0000 //RX_BWE_RESRV_2 +#VOL 0 +163 0x1000 //RX_TDDRC_ALPHA_UP_1 +164 0x1000 //RX_TDDRC_ALPHA_UP_2 +165 0x1000 //RX_TDDRC_ALPHA_UP_3 +166 0x1000 //RX_TDDRC_ALPHA_UP_4 +184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +190 0x7000 //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +269 0x0000 //RX_TDDRC_THRD_0 +270 0x0000 //RX_TDDRC_THRD_1 +271 0x1800 //RX_TDDRC_THRD_2 +272 0x1800 //RX_TDDRC_THRD_3 +273 0x3000 //RX_TDDRC_SLANT_0 +274 0x6E00 //RX_TDDRC_SLANT_1 +275 0x1000 //RX_TDDRC_ALPHA_UP_0 +276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x199A //RX_TDDRC_HMNC_GAIN +279 0x0001 //RX_TDDRC_SMT_FLAG +280 0x0CCD //RX_TDDRC_SMT_W +281 0x01E0 //RX_TDDRC_DRC_GAIN +195 0x0030 //RX_FDEQ_SUBNUM +196 0x4848 //RX_FDEQ_GAIN_0 +197 0x4848 //RX_FDEQ_GAIN_1 +198 0x4844 //RX_FDEQ_GAIN_2 +199 0x4B4D //RX_FDEQ_GAIN_3 +200 0x4E50 //RX_FDEQ_GAIN_4 +201 0x5254 //RX_FDEQ_GAIN_5 +202 0x5658 //RX_FDEQ_GAIN_6 +203 0x5C60 //RX_FDEQ_GAIN_7 +204 0x6468 //RX_FDEQ_GAIN_8 +205 0x6C70 //RX_FDEQ_GAIN_9 +206 0x7474 //RX_FDEQ_GAIN_10 +207 0x7474 //RX_FDEQ_GAIN_11 +208 0x7474 //RX_FDEQ_GAIN_12 +209 0x7474 //RX_FDEQ_GAIN_13 +210 0x7474 //RX_FDEQ_GAIN_14 +211 0x7474 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0202 //RX_FDEQ_BIN_0 +221 0x0203 //RX_FDEQ_BIN_1 +222 0x0402 //RX_FDEQ_BIN_2 +223 0x0304 //RX_FDEQ_BIN_3 +224 0x0405 //RX_FDEQ_BIN_4 +225 0x0506 //RX_FDEQ_BIN_5 +226 0x0708 //RX_FDEQ_BIN_6 +227 0x090A //RX_FDEQ_BIN_7 +228 0x0B0C //RX_FDEQ_BIN_8 +229 0x0D0E //RX_FDEQ_BIN_9 +230 0x1214 //RX_FDEQ_BIN_10 +231 0x1E1E //RX_FDEQ_BIN_11 +232 0x1E1E //RX_FDEQ_BIN_12 +233 0x1E1E //RX_FDEQ_BIN_13 +234 0x1E1E //RX_FDEQ_BIN_14 +235 0x202C //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x4000 //RX_FDEQ_RESRV_0 +245 0x0320 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0030 //RX_FDDRC_BAND_MARGIN_1 +248 0x0050 //RX_FDDRC_BAND_MARGIN_2 +249 0x0080 //RX_FDDRC_BAND_MARGIN_3 +250 0x0007 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x5000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x6400 //RX_FDDRC_THRD_3_2 +258 0x6400 //RX_FDDRC_THRD_3_3 +259 0x2000 //RX_FDDRC_SLANT_0_0 +260 0x2000 //RX_FDDRC_SLANT_0_1 +261 0x2000 //RX_FDDRC_SLANT_0_2 +262 0x2000 //RX_FDDRC_SLANT_0_3 +263 0x5333 //RX_FDDRC_SLANT_1_0 +264 0x5333 //RX_FDDRC_SLANT_1_1 +265 0x5333 //RX_FDDRC_SLANT_1_2 +266 0x5333 //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +286 0x0100 //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 +#VOL 1 +163 0x1000 //RX_TDDRC_ALPHA_UP_1 +164 0x1000 //RX_TDDRC_ALPHA_UP_2 +165 0x1000 //RX_TDDRC_ALPHA_UP_3 +166 0x1000 //RX_TDDRC_ALPHA_UP_4 +184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +190 0x7000 //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +269 0x0000 //RX_TDDRC_THRD_0 +270 0x0000 //RX_TDDRC_THRD_1 +271 0x1800 //RX_TDDRC_THRD_2 +272 0x1800 //RX_TDDRC_THRD_3 +273 0x3000 //RX_TDDRC_SLANT_0 +274 0x6E00 //RX_TDDRC_SLANT_1 +275 0x1000 //RX_TDDRC_ALPHA_UP_0 +276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x199A //RX_TDDRC_HMNC_GAIN +279 0x0001 //RX_TDDRC_SMT_FLAG +280 0x0CCD //RX_TDDRC_SMT_W +281 0x01E0 //RX_TDDRC_DRC_GAIN +195 0x0030 //RX_FDEQ_SUBNUM +196 0x4848 //RX_FDEQ_GAIN_0 +197 0x4848 //RX_FDEQ_GAIN_1 +198 0x4844 //RX_FDEQ_GAIN_2 +199 0x4B4D //RX_FDEQ_GAIN_3 +200 0x4E50 //RX_FDEQ_GAIN_4 +201 0x5254 //RX_FDEQ_GAIN_5 +202 0x5658 //RX_FDEQ_GAIN_6 +203 0x5C60 //RX_FDEQ_GAIN_7 +204 0x6468 //RX_FDEQ_GAIN_8 +205 0x6C70 //RX_FDEQ_GAIN_9 +206 0x7474 //RX_FDEQ_GAIN_10 +207 0x7474 //RX_FDEQ_GAIN_11 +208 0x7474 //RX_FDEQ_GAIN_12 +209 0x7474 //RX_FDEQ_GAIN_13 +210 0x7474 //RX_FDEQ_GAIN_14 +211 0x7474 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0202 //RX_FDEQ_BIN_0 +221 0x0203 //RX_FDEQ_BIN_1 +222 0x0402 //RX_FDEQ_BIN_2 +223 0x0304 //RX_FDEQ_BIN_3 +224 0x0405 //RX_FDEQ_BIN_4 +225 0x0506 //RX_FDEQ_BIN_5 +226 0x0708 //RX_FDEQ_BIN_6 +227 0x090A //RX_FDEQ_BIN_7 +228 0x0B0C //RX_FDEQ_BIN_8 +229 0x0D0E //RX_FDEQ_BIN_9 +230 0x1214 //RX_FDEQ_BIN_10 +231 0x1E1E //RX_FDEQ_BIN_11 +232 0x1E1E //RX_FDEQ_BIN_12 +233 0x1E1E //RX_FDEQ_BIN_13 +234 0x1E1E //RX_FDEQ_BIN_14 +235 0x202C //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x4000 //RX_FDEQ_RESRV_0 +245 0x0320 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0030 //RX_FDDRC_BAND_MARGIN_1 +248 0x0050 //RX_FDDRC_BAND_MARGIN_2 +249 0x0080 //RX_FDDRC_BAND_MARGIN_3 +250 0x0007 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x5000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x6400 //RX_FDDRC_THRD_3_2 +258 0x6400 //RX_FDDRC_THRD_3_3 +259 0x2000 //RX_FDDRC_SLANT_0_0 +260 0x2000 //RX_FDDRC_SLANT_0_1 +261 0x2000 //RX_FDDRC_SLANT_0_2 +262 0x2000 //RX_FDDRC_SLANT_0_3 +263 0x5333 //RX_FDDRC_SLANT_1_0 +264 0x5333 //RX_FDDRC_SLANT_1_1 +265 0x5333 //RX_FDDRC_SLANT_1_2 +266 0x5333 //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +286 0x0100 //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 +#VOL 2 +163 0x1000 //RX_TDDRC_ALPHA_UP_1 +164 0x1000 //RX_TDDRC_ALPHA_UP_2 +165 0x1000 //RX_TDDRC_ALPHA_UP_3 +166 0x1000 //RX_TDDRC_ALPHA_UP_4 +184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +190 0x7000 //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +269 0x0000 //RX_TDDRC_THRD_0 +270 0x0000 //RX_TDDRC_THRD_1 +271 0x1800 //RX_TDDRC_THRD_2 +272 0x1800 //RX_TDDRC_THRD_3 +273 0x3000 //RX_TDDRC_SLANT_0 +274 0x6E00 //RX_TDDRC_SLANT_1 +275 0x1000 //RX_TDDRC_ALPHA_UP_0 +276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x199A //RX_TDDRC_HMNC_GAIN +279 0x0001 //RX_TDDRC_SMT_FLAG +280 0x0CCD //RX_TDDRC_SMT_W +281 0x01E0 //RX_TDDRC_DRC_GAIN +195 0x0030 //RX_FDEQ_SUBNUM +196 0x4848 //RX_FDEQ_GAIN_0 +197 0x4848 //RX_FDEQ_GAIN_1 +198 0x4844 //RX_FDEQ_GAIN_2 +199 0x4B4D //RX_FDEQ_GAIN_3 +200 0x4E50 //RX_FDEQ_GAIN_4 +201 0x5254 //RX_FDEQ_GAIN_5 +202 0x5658 //RX_FDEQ_GAIN_6 +203 0x5C60 //RX_FDEQ_GAIN_7 +204 0x6468 //RX_FDEQ_GAIN_8 +205 0x6C70 //RX_FDEQ_GAIN_9 +206 0x7474 //RX_FDEQ_GAIN_10 +207 0x7474 //RX_FDEQ_GAIN_11 +208 0x7474 //RX_FDEQ_GAIN_12 +209 0x7474 //RX_FDEQ_GAIN_13 +210 0x7474 //RX_FDEQ_GAIN_14 +211 0x7474 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0202 //RX_FDEQ_BIN_0 +221 0x0203 //RX_FDEQ_BIN_1 +222 0x0402 //RX_FDEQ_BIN_2 +223 0x0304 //RX_FDEQ_BIN_3 +224 0x0405 //RX_FDEQ_BIN_4 +225 0x0506 //RX_FDEQ_BIN_5 +226 0x0708 //RX_FDEQ_BIN_6 +227 0x090A //RX_FDEQ_BIN_7 +228 0x0B0C //RX_FDEQ_BIN_8 +229 0x0D0E //RX_FDEQ_BIN_9 +230 0x1214 //RX_FDEQ_BIN_10 +231 0x1E1E //RX_FDEQ_BIN_11 +232 0x1E1E //RX_FDEQ_BIN_12 +233 0x1E1E //RX_FDEQ_BIN_13 +234 0x1E1E //RX_FDEQ_BIN_14 +235 0x202C //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x4000 //RX_FDEQ_RESRV_0 +245 0x0320 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0030 //RX_FDDRC_BAND_MARGIN_1 +248 0x0050 //RX_FDDRC_BAND_MARGIN_2 +249 0x0080 //RX_FDDRC_BAND_MARGIN_3 +250 0x0007 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x5000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x6400 //RX_FDDRC_THRD_3_2 +258 0x6400 //RX_FDDRC_THRD_3_3 +259 0x2000 //RX_FDDRC_SLANT_0_0 +260 0x2000 //RX_FDDRC_SLANT_0_1 +261 0x2000 //RX_FDDRC_SLANT_0_2 +262 0x2000 //RX_FDDRC_SLANT_0_3 +263 0x5333 //RX_FDDRC_SLANT_1_0 +264 0x5333 //RX_FDDRC_SLANT_1_1 +265 0x5333 //RX_FDDRC_SLANT_1_2 +266 0x5333 //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +286 0x0100 //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 +#VOL 3 +163 0x1000 //RX_TDDRC_ALPHA_UP_1 +164 0x1000 //RX_TDDRC_ALPHA_UP_2 +165 0x1000 //RX_TDDRC_ALPHA_UP_3 +166 0x1000 //RX_TDDRC_ALPHA_UP_4 +184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +190 0x7000 //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +269 0x0000 //RX_TDDRC_THRD_0 +270 0x0000 //RX_TDDRC_THRD_1 +271 0x1800 //RX_TDDRC_THRD_2 +272 0x1800 //RX_TDDRC_THRD_3 +273 0x3000 //RX_TDDRC_SLANT_0 +274 0x6E00 //RX_TDDRC_SLANT_1 +275 0x1000 //RX_TDDRC_ALPHA_UP_0 +276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x199A //RX_TDDRC_HMNC_GAIN +279 0x0001 //RX_TDDRC_SMT_FLAG +280 0x0CCD //RX_TDDRC_SMT_W +281 0x01E0 //RX_TDDRC_DRC_GAIN +195 0x0030 //RX_FDEQ_SUBNUM +196 0x4848 //RX_FDEQ_GAIN_0 +197 0x4848 //RX_FDEQ_GAIN_1 +198 0x4844 //RX_FDEQ_GAIN_2 +199 0x4B4D //RX_FDEQ_GAIN_3 +200 0x4E50 //RX_FDEQ_GAIN_4 +201 0x5254 //RX_FDEQ_GAIN_5 +202 0x5658 //RX_FDEQ_GAIN_6 +203 0x5C60 //RX_FDEQ_GAIN_7 +204 0x6468 //RX_FDEQ_GAIN_8 +205 0x6C70 //RX_FDEQ_GAIN_9 +206 0x7474 //RX_FDEQ_GAIN_10 +207 0x7474 //RX_FDEQ_GAIN_11 +208 0x7474 //RX_FDEQ_GAIN_12 +209 0x7474 //RX_FDEQ_GAIN_13 +210 0x7474 //RX_FDEQ_GAIN_14 +211 0x7474 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0202 //RX_FDEQ_BIN_0 +221 0x0203 //RX_FDEQ_BIN_1 +222 0x0402 //RX_FDEQ_BIN_2 +223 0x0304 //RX_FDEQ_BIN_3 +224 0x0405 //RX_FDEQ_BIN_4 +225 0x0506 //RX_FDEQ_BIN_5 +226 0x0708 //RX_FDEQ_BIN_6 +227 0x090A //RX_FDEQ_BIN_7 +228 0x0B0C //RX_FDEQ_BIN_8 +229 0x0D0E //RX_FDEQ_BIN_9 +230 0x1214 //RX_FDEQ_BIN_10 +231 0x1E1E //RX_FDEQ_BIN_11 +232 0x1E1E //RX_FDEQ_BIN_12 +233 0x1E1E //RX_FDEQ_BIN_13 +234 0x1E1E //RX_FDEQ_BIN_14 +235 0x202C //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x4000 //RX_FDEQ_RESRV_0 +245 0x0320 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0030 //RX_FDDRC_BAND_MARGIN_1 +248 0x0050 //RX_FDDRC_BAND_MARGIN_2 +249 0x0080 //RX_FDDRC_BAND_MARGIN_3 +250 0x0007 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x5000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x6400 //RX_FDDRC_THRD_3_2 +258 0x6400 //RX_FDDRC_THRD_3_3 +259 0x2000 //RX_FDDRC_SLANT_0_0 +260 0x2000 //RX_FDDRC_SLANT_0_1 +261 0x2000 //RX_FDDRC_SLANT_0_2 +262 0x2000 //RX_FDDRC_SLANT_0_3 +263 0x5333 //RX_FDDRC_SLANT_1_0 +264 0x5333 //RX_FDDRC_SLANT_1_1 +265 0x5333 //RX_FDDRC_SLANT_1_2 +266 0x5333 //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +286 0x0100 //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 +#VOL 4 +163 0x1000 //RX_TDDRC_ALPHA_UP_1 +164 0x1000 //RX_TDDRC_ALPHA_UP_2 +165 0x1000 //RX_TDDRC_ALPHA_UP_3 +166 0x1000 //RX_TDDRC_ALPHA_UP_4 +184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +190 0x7000 //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +269 0x0000 //RX_TDDRC_THRD_0 +270 0x0000 //RX_TDDRC_THRD_1 +271 0x1800 //RX_TDDRC_THRD_2 +272 0x1800 //RX_TDDRC_THRD_3 +273 0x3000 //RX_TDDRC_SLANT_0 +274 0x6E00 //RX_TDDRC_SLANT_1 +275 0x1000 //RX_TDDRC_ALPHA_UP_0 +276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x199A //RX_TDDRC_HMNC_GAIN +279 0x0001 //RX_TDDRC_SMT_FLAG +280 0x0CCD //RX_TDDRC_SMT_W +281 0x01E0 //RX_TDDRC_DRC_GAIN +195 0x0030 //RX_FDEQ_SUBNUM +196 0x4848 //RX_FDEQ_GAIN_0 +197 0x4848 //RX_FDEQ_GAIN_1 +198 0x4844 //RX_FDEQ_GAIN_2 +199 0x4B4D //RX_FDEQ_GAIN_3 +200 0x4E50 //RX_FDEQ_GAIN_4 +201 0x5254 //RX_FDEQ_GAIN_5 +202 0x5658 //RX_FDEQ_GAIN_6 +203 0x5C60 //RX_FDEQ_GAIN_7 +204 0x6468 //RX_FDEQ_GAIN_8 +205 0x6C70 //RX_FDEQ_GAIN_9 +206 0x7474 //RX_FDEQ_GAIN_10 +207 0x7474 //RX_FDEQ_GAIN_11 +208 0x7474 //RX_FDEQ_GAIN_12 +209 0x7474 //RX_FDEQ_GAIN_13 +210 0x7474 //RX_FDEQ_GAIN_14 +211 0x7474 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0202 //RX_FDEQ_BIN_0 +221 0x0203 //RX_FDEQ_BIN_1 +222 0x0402 //RX_FDEQ_BIN_2 +223 0x0304 //RX_FDEQ_BIN_3 +224 0x0405 //RX_FDEQ_BIN_4 +225 0x0506 //RX_FDEQ_BIN_5 +226 0x0708 //RX_FDEQ_BIN_6 +227 0x090A //RX_FDEQ_BIN_7 +228 0x0B0C //RX_FDEQ_BIN_8 +229 0x0D0E //RX_FDEQ_BIN_9 +230 0x1214 //RX_FDEQ_BIN_10 +231 0x1E1E //RX_FDEQ_BIN_11 +232 0x1E1E //RX_FDEQ_BIN_12 +233 0x1E1E //RX_FDEQ_BIN_13 +234 0x1E1E //RX_FDEQ_BIN_14 +235 0x202C //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x4000 //RX_FDEQ_RESRV_0 +245 0x0320 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0030 //RX_FDDRC_BAND_MARGIN_1 +248 0x0050 //RX_FDDRC_BAND_MARGIN_2 +249 0x0080 //RX_FDDRC_BAND_MARGIN_3 +250 0x0007 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x5000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x6400 //RX_FDDRC_THRD_3_2 +258 0x6400 //RX_FDDRC_THRD_3_3 +259 0x2000 //RX_FDDRC_SLANT_0_0 +260 0x2000 //RX_FDDRC_SLANT_0_1 +261 0x2000 //RX_FDDRC_SLANT_0_2 +262 0x2000 //RX_FDDRC_SLANT_0_3 +263 0x5333 //RX_FDDRC_SLANT_1_0 +264 0x5333 //RX_FDDRC_SLANT_1_1 +265 0x5333 //RX_FDDRC_SLANT_1_2 +266 0x5333 //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +286 0x0100 //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 +#VOL 5 +163 0x1000 //RX_TDDRC_ALPHA_UP_1 +164 0x1000 //RX_TDDRC_ALPHA_UP_2 +165 0x1000 //RX_TDDRC_ALPHA_UP_3 +166 0x1000 //RX_TDDRC_ALPHA_UP_4 +184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +190 0x7000 //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +269 0x0000 //RX_TDDRC_THRD_0 +270 0x0000 //RX_TDDRC_THRD_1 +271 0x1800 //RX_TDDRC_THRD_2 +272 0x1800 //RX_TDDRC_THRD_3 +273 0x3000 //RX_TDDRC_SLANT_0 +274 0x6E00 //RX_TDDRC_SLANT_1 +275 0x1000 //RX_TDDRC_ALPHA_UP_0 +276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x199A //RX_TDDRC_HMNC_GAIN +279 0x0001 //RX_TDDRC_SMT_FLAG +280 0x0CCD //RX_TDDRC_SMT_W +281 0x01E0 //RX_TDDRC_DRC_GAIN +195 0x0030 //RX_FDEQ_SUBNUM +196 0x4848 //RX_FDEQ_GAIN_0 +197 0x4848 //RX_FDEQ_GAIN_1 +198 0x4844 //RX_FDEQ_GAIN_2 +199 0x4B4D //RX_FDEQ_GAIN_3 +200 0x4E50 //RX_FDEQ_GAIN_4 +201 0x5254 //RX_FDEQ_GAIN_5 +202 0x5658 //RX_FDEQ_GAIN_6 +203 0x5C60 //RX_FDEQ_GAIN_7 +204 0x6468 //RX_FDEQ_GAIN_8 +205 0x6C70 //RX_FDEQ_GAIN_9 +206 0x7474 //RX_FDEQ_GAIN_10 +207 0x7474 //RX_FDEQ_GAIN_11 +208 0x7474 //RX_FDEQ_GAIN_12 +209 0x7474 //RX_FDEQ_GAIN_13 +210 0x7474 //RX_FDEQ_GAIN_14 +211 0x7474 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0202 //RX_FDEQ_BIN_0 +221 0x0203 //RX_FDEQ_BIN_1 +222 0x0402 //RX_FDEQ_BIN_2 +223 0x0304 //RX_FDEQ_BIN_3 +224 0x0405 //RX_FDEQ_BIN_4 +225 0x0506 //RX_FDEQ_BIN_5 +226 0x0708 //RX_FDEQ_BIN_6 +227 0x090A //RX_FDEQ_BIN_7 +228 0x0B0C //RX_FDEQ_BIN_8 +229 0x0D0E //RX_FDEQ_BIN_9 +230 0x1214 //RX_FDEQ_BIN_10 +231 0x1E1E //RX_FDEQ_BIN_11 +232 0x1E1E //RX_FDEQ_BIN_12 +233 0x1E1E //RX_FDEQ_BIN_13 +234 0x1E1E //RX_FDEQ_BIN_14 +235 0x202C //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x4000 //RX_FDEQ_RESRV_0 +245 0x0320 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0030 //RX_FDDRC_BAND_MARGIN_1 +248 0x0050 //RX_FDDRC_BAND_MARGIN_2 +249 0x0080 //RX_FDDRC_BAND_MARGIN_3 +250 0x0007 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x5000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x6400 //RX_FDDRC_THRD_3_2 +258 0x6400 //RX_FDDRC_THRD_3_3 +259 0x2000 //RX_FDDRC_SLANT_0_0 +260 0x2000 //RX_FDDRC_SLANT_0_1 +261 0x2000 //RX_FDDRC_SLANT_0_2 +262 0x2000 //RX_FDDRC_SLANT_0_3 +263 0x5333 //RX_FDDRC_SLANT_1_0 +264 0x5333 //RX_FDDRC_SLANT_1_1 +265 0x5333 //RX_FDDRC_SLANT_1_2 +266 0x5333 //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +286 0x0100 //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 +#VOL 6 +163 0x1000 //RX_TDDRC_ALPHA_UP_1 +164 0x1000 //RX_TDDRC_ALPHA_UP_2 +165 0x1000 //RX_TDDRC_ALPHA_UP_3 +166 0x1000 //RX_TDDRC_ALPHA_UP_4 +184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +190 0x7000 //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +269 0x0000 //RX_TDDRC_THRD_0 +270 0x0000 //RX_TDDRC_THRD_1 +271 0x1800 //RX_TDDRC_THRD_2 +272 0x1800 //RX_TDDRC_THRD_3 +273 0x3000 //RX_TDDRC_SLANT_0 +274 0x6E00 //RX_TDDRC_SLANT_1 +275 0x1000 //RX_TDDRC_ALPHA_UP_0 +276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x199A //RX_TDDRC_HMNC_GAIN +279 0x0001 //RX_TDDRC_SMT_FLAG +280 0x0CCD //RX_TDDRC_SMT_W +281 0x01E0 //RX_TDDRC_DRC_GAIN +195 0x0030 //RX_FDEQ_SUBNUM +196 0x4848 //RX_FDEQ_GAIN_0 +197 0x4848 //RX_FDEQ_GAIN_1 +198 0x4844 //RX_FDEQ_GAIN_2 +199 0x4B4D //RX_FDEQ_GAIN_3 +200 0x4E50 //RX_FDEQ_GAIN_4 +201 0x5254 //RX_FDEQ_GAIN_5 +202 0x5658 //RX_FDEQ_GAIN_6 +203 0x5C60 //RX_FDEQ_GAIN_7 +204 0x6468 //RX_FDEQ_GAIN_8 +205 0x6C70 //RX_FDEQ_GAIN_9 +206 0x7474 //RX_FDEQ_GAIN_10 +207 0x7474 //RX_FDEQ_GAIN_11 +208 0x7474 //RX_FDEQ_GAIN_12 +209 0x7474 //RX_FDEQ_GAIN_13 +210 0x7474 //RX_FDEQ_GAIN_14 +211 0x7474 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0202 //RX_FDEQ_BIN_0 +221 0x0203 //RX_FDEQ_BIN_1 +222 0x0402 //RX_FDEQ_BIN_2 +223 0x0304 //RX_FDEQ_BIN_3 +224 0x0405 //RX_FDEQ_BIN_4 +225 0x0506 //RX_FDEQ_BIN_5 +226 0x0708 //RX_FDEQ_BIN_6 +227 0x090A //RX_FDEQ_BIN_7 +228 0x0B0C //RX_FDEQ_BIN_8 +229 0x0D0E //RX_FDEQ_BIN_9 +230 0x1214 //RX_FDEQ_BIN_10 +231 0x1E1E //RX_FDEQ_BIN_11 +232 0x1E1E //RX_FDEQ_BIN_12 +233 0x1E1E //RX_FDEQ_BIN_13 +234 0x1E1E //RX_FDEQ_BIN_14 +235 0x202C //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x4000 //RX_FDEQ_RESRV_0 +245 0x0320 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0030 //RX_FDDRC_BAND_MARGIN_1 +248 0x0050 //RX_FDDRC_BAND_MARGIN_2 +249 0x0080 //RX_FDDRC_BAND_MARGIN_3 +250 0x0007 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x5000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x6400 //RX_FDDRC_THRD_3_2 +258 0x6400 //RX_FDDRC_THRD_3_3 +259 0x2000 //RX_FDDRC_SLANT_0_0 +260 0x2000 //RX_FDDRC_SLANT_0_1 +261 0x2000 //RX_FDDRC_SLANT_0_2 +262 0x2000 //RX_FDDRC_SLANT_0_3 +263 0x5333 //RX_FDDRC_SLANT_1_0 +264 0x5333 //RX_FDDRC_SLANT_1_1 +265 0x5333 //RX_FDDRC_SLANT_1_2 +266 0x5333 //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +286 0x0100 //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 #CASE_NAME HANDSET-HANDSET_HAC-VOICE_GENERIC-FB -#PARAM_TYPE TX+RX -#TOTAL_CUSTOM_STEP 7 +#PARAM_MODE Full +#PARAM_TYPE TX+2RX +#TOTAL_CUSTOM_STEP 7+7 #TX 0 0x0000 //TX_OPERATION_MODE_0 1 0x0000 //TX_OPERATION_MODE_1 @@ -17558,7 +26729,7 @@ 18 0x0000 //TX_SYS_RESRV_2 19 0x0000 //TX_SYS_RESRV_3 20 0x0000 //TX_DIST2REF0 -21 0x009D //TX_DIST2REF1 +21 0x009C //TX_DIST2REF1 22 0x0000 //TX_DIST2REF_02 23 0x0000 //TX_DIST2REF_03 24 0x0000 //TX_DIST2REF_04 @@ -17788,12 +26959,12 @@ 248 0xF800 //TX_THR_SN_EST_6 249 0xF700 //TX_THR_SN_EST_7 250 0x0000 //TX_DELTA_THR_SN_EST_0 -251 0x0100 //TX_DELTA_THR_SN_EST_1 +251 0x0200 //TX_DELTA_THR_SN_EST_1 252 0x0200 //TX_DELTA_THR_SN_EST_2 253 0x0200 //TX_DELTA_THR_SN_EST_3 -254 0x0200 //TX_DELTA_THR_SN_EST_4 -255 0x0100 //TX_DELTA_THR_SN_EST_5 -256 0x0200 //TX_DELTA_THR_SN_EST_6 +254 0x0100 //TX_DELTA_THR_SN_EST_4 +255 0x0200 //TX_DELTA_THR_SN_EST_5 +256 0x0100 //TX_DELTA_THR_SN_EST_6 257 0x0200 //TX_DELTA_THR_SN_EST_7 258 0x4000 //TX_LAMBDA_NN_EST_0 259 0x4000 //TX_LAMBDA_NN_EST_1 @@ -17821,16 +26992,16 @@ 281 0x0014 //TX_NS_LVL_CTRL_0 282 0x0016 //TX_NS_LVL_CTRL_1 283 0x0016 //TX_NS_LVL_CTRL_2 -284 0x0016 //TX_NS_LVL_CTRL_3 -285 0x0018 //TX_NS_LVL_CTRL_4 -286 0x0016 //TX_NS_LVL_CTRL_5 -287 0x0012 //TX_NS_LVL_CTRL_6 +284 0x0018 //TX_NS_LVL_CTRL_3 +285 0x0016 //TX_NS_LVL_CTRL_4 +286 0x0012 //TX_NS_LVL_CTRL_5 +287 0x0016 //TX_NS_LVL_CTRL_6 288 0x0017 //TX_NS_LVL_CTRL_7 289 0x000E //TX_MIN_GAIN_S_0 -290 0x0012 //TX_MIN_GAIN_S_1 -291 0x0007 //TX_MIN_GAIN_S_2 -292 0x0012 //TX_MIN_GAIN_S_3 -293 0x0010 //TX_MIN_GAIN_S_4 +290 0x0007 //TX_MIN_GAIN_S_1 +291 0x0012 //TX_MIN_GAIN_S_2 +292 0x0010 //TX_MIN_GAIN_S_3 +293 0x0012 //TX_MIN_GAIN_S_4 294 0x0012 //TX_MIN_GAIN_S_5 295 0x0012 //TX_MIN_GAIN_S_6 296 0x0012 //TX_MIN_GAIN_S_7 @@ -17852,29 +27023,29 @@ 312 0x7FFF //TX_A_POST_FILT_0 313 0x2000 //TX_A_POST_FILT_1 314 0x4000 //TX_A_POST_FILT_S_0 -315 0x5000 //TX_A_POST_FILT_S_1 +315 0x4000 //TX_A_POST_FILT_S_1 316 0x4000 //TX_A_POST_FILT_S_2 317 0x4000 //TX_A_POST_FILT_S_3 318 0x4000 //TX_A_POST_FILT_S_4 319 0x4000 //TX_A_POST_FILT_S_5 -320 0x4000 //TX_A_POST_FILT_S_6 +320 0x5000 //TX_A_POST_FILT_S_6 321 0x7000 //TX_A_POST_FILT_S_7 322 0x1000 //TX_B_POST_FILT_0 323 0x2000 //TX_B_POST_FILT_1 -324 0x3000 //TX_B_POST_FILT_2 +324 0x2000 //TX_B_POST_FILT_2 325 0x2000 //TX_B_POST_FILT_3 -326 0x5000 //TX_B_POST_FILT_4 +326 0x2000 //TX_B_POST_FILT_4 327 0x2000 //TX_B_POST_FILT_5 -328 0x6000 //TX_B_POST_FILT_6 +328 0x3000 //TX_B_POST_FILT_6 329 0x3000 //TX_B_POST_FILT_7 330 0x1000 //TX_B_LESSCUT_RTO_S_0 -331 0x6000 //TX_B_LESSCUT_RTO_S_1 -332 0x6000 //TX_B_LESSCUT_RTO_S_2 -333 0x6000 //TX_B_LESSCUT_RTO_S_3 -334 0x6000 //TX_B_LESSCUT_RTO_S_4 -335 0x6000 //TX_B_LESSCUT_RTO_S_5 -336 0x7FFF //TX_B_LESSCUT_RTO_S_6 -337 0x7FFF //TX_B_LESSCUT_RTO_S_7 +331 0x1000 //TX_B_LESSCUT_RTO_S_1 +332 0x1000 //TX_B_LESSCUT_RTO_S_2 +333 0x1000 //TX_B_LESSCUT_RTO_S_3 +334 0x1000 //TX_B_LESSCUT_RTO_S_4 +335 0x1000 //TX_B_LESSCUT_RTO_S_5 +336 0x1000 //TX_B_LESSCUT_RTO_S_6 +337 0x1000 //TX_B_LESSCUT_RTO_S_7 338 0x7E14 //TX_LAMBDA_PFILT 339 0x7C29 //TX_LAMBDA_PFILT_S_0 340 0x7C29 //TX_LAMBDA_PFILT_S_1 @@ -17917,10 +27088,10 @@ 377 0x4E20 //TX_NOISE_TH_5_4 378 0x39DF //TX_NOISE_TH_6 379 0x0014 //TX_MINENOISE_TH -380 0x4000 //TX_MINENOISE_MIC0_TH_MTS -381 0xFFEE //TX_MINENOISE_MIC0_TH_EXP -382 0x6000 //TX_MINENOISE_MIC0_S_TH_MTS -383 0xFFF3 //TX_MINENOISE_MIC0_S_TH_EXP +380 0xD508 //TX_MORENS_TFMASK_TH +381 0x0001 //TX_DRC_QUIET_FLOOR +382 0x6D60 //TX_RATIODTL_CUT_TH +383 0x1482 //TX_DT_CUT_K1 384 0x00A5 //TX_OUT_ENER_S_TH_CLEAN 385 0x00A5 //TX_OUT_ENER_S_TH_LESSCLEAN 386 0x00A5 //TX_OUT_ENER_S_TH_NOISY @@ -17928,15 +27099,15 @@ 388 0x0200 //TX_OUT_ENER_TH_SPEECH 389 0x2000 //TX_SN_NPB_GAIN 390 0x0000 //TX_NN_NPB_GAIN -391 0x0000 //TX_CSX_ALPHA_0 -392 0x0000 //TX_CSX_ALPHA_1 -393 0x0000 //TX_CSX_ALPHA_2 -394 0x0000 //TX_CSX_ALPHA_3 -395 0x0800 //TX_MU_ARSP_EST -396 0x00C8 //TX_P_OUTBEAM_MIN_TH +391 0x3000 //TX_POST_MASK_SUP_HSNE +392 0x07D0 //TX_TAIL_DET_TH +393 0x4000 //TX_B_LESSCUT_RTO_WTA +394 0x0000 //TX_MEL_G_R +395 0x0080 //TX_SUPHIGH_TH +396 0x0000 //TX_MASK_G_R 397 0x0002 //TX_EXTRA_NS_L -398 0x0800 //TX_EXTRA_NS_A -399 0x0005 //TX_VR_NOISE_FLOOR_TH +398 0x1800 //TX_C_POST_FLT_MASK +399 0x7FFF //TX_A_POST_FLT_WNS 400 0x0148 //TX_MIN_G_LOW300HZ 401 0x0004 //TX_MAXLEVEL_CNG 402 0x00B4 //TX_STN_NOISE_TH @@ -18051,16 +27222,16 @@ 511 0x6666 //TX_MIC_TO_BFGAIN 512 0x0000 //TX_MICTOBFGAIN0 513 0x0000 //TX_FASTMUE_TH -514 0x0000 //TX_DERVB_LEN_0 -515 0x0000 //TX_DERVB_LEN_1 -516 0x0000 //TX_RHO_DERVB -517 0x0000 //TX_MIC_INDX_DERVB -518 0x0000 //TX_MU_DERVB -519 0x0000 //TX_DR_RESRV_0 -520 0x0000 //TX_DR_RESRV_1 -521 0x0000 //TX_DR_RESRV_2 -522 0x0000 //TX_DR_RESRV_3 -523 0x0000 //TX_DR_RESRV_4 +514 0x2CCC //TX_DEREVERB_LF_MU +515 0x3200 //TX_DEREVERB_HF_MU +516 0x0007 //TX_DEREVERB_DELAY +517 0x0004 //TX_DEREVERB_COEF_LEN +518 0x0003 //TX_DEREVERB_DNR +519 0x0000 //TX_DEREVERB_ALPHA +520 0x0000 //TX_DEREVERB_BETA +521 0x7FFF //TX_GSC_RTOL_TH +522 0x7FFF //TX_GSC_RTOH_TH +523 0x7E2C //TX_WIDE2_MEANHTH 524 0x0000 //TX_DR_RESRV_5 525 0x0000 //TX_DR_RESRV_6 526 0x0000 //TX_DR_RESRV_7 @@ -18434,6 +27605,71 @@ 894 0xC000 //TX_FASTNS_SSA_THHFL 895 0xCCCC //TX_FASTNS_SSA_THLFH 896 0xD999 //TX_FASTNS_SSA_THHFH +897 0x2339 //TX_SENDFUNC_REG_MICMUTE +898 0x0021 //TX_SENDFUNC_REG_MICMUTE1 +899 0x02BC //TX_MICMUTE_RATIO_THR +900 0x0140 //TX_MICMUTE_AMP_THR +901 0x0004 //TX_MICMUTE_HPF_IND +902 0x00C0 //TX_MICMUTE_LOG_EYR_TH +903 0x0008 //TX_MICMUTE_CVG_TIME +904 0x0008 //TX_MICMUTE_RELEASE_TIME +905 0x01FE //TX_MIC_VOLUME_MIC0MUTE +906 0x0020 //TX_MICMUTE_EPD_OFFSET_0 +907 0x001E //TX_MICMUTE_FRQ_AEC_L +908 0x7999 //TX_MICMUTE_EAD_THR +909 0x7FFF //TX_MICMUTE_LAMBDA_CB_NLE +910 0x7FFF //TX_MICMUTE_LAMBDA_RE_EST +911 0x4000 //TX_DTD_THR1_MICMUTE_0 +912 0x7000 //TX_DTD_THR1_MICMUTE_1 +913 0x7FFF //TX_DTD_THR1_MICMUTE_2 +914 0x7FFF //TX_DTD_THR1_MICMUTE_3 +915 0x6CCC //TX_DTD_THR2_MICMUTE_0 +916 0x0400 //TX_MICMUTE_MIN_EQ_RE_EST_0 +917 0x0400 //TX_MICMUTE_MIN_EQ_RE_EST_1 +918 0x1000 //TX_MICMUTE_MIN_EQ_RE_EST_2 +919 0x7FFF //TX_MICMUTE_MIN_EQ_RE_EST_3 +920 0x7FFF //TX_MICMUTE_MIN_EQ_RE_EST_4 +921 0x4000 //TX_MICMUTE_C_POST_FLT +922 0x03E8 //TX_MICMUTE_DT_CUT_K +923 0x0001 //TX_MICMUTE_DT_CUT_THR +924 0x03E8 //TX_MICMUTE_DT_CUT_K2 +925 0x0001 //TX_MICMUTE_DT_CUT_THR2 +926 0x0064 //TX_MICMUTE_DT2_HOLD_N +927 0x1000 //TX_MICMUTE_RATIODTH_THCUT +928 0x1000 //TX_MICMUTE_B_POST_FLT_ECHOL +929 0x7FFF //TX_MICMUTE_B_POST_FLT_ECHOH +930 0x0400 //TX_MICMUTE_C_POST_FLT_MASK +931 0x7999 //TX_MICMUTE_RATIODTL_CUT_TH +932 0x0258 //TX_MICMUTE_DT_CUT_K1 +933 0x0800 //TX_MICMUTE_N2_SN_EST +934 0xFC00 //TX_MICMUTE_THR_SN_EST_0 +935 0x001C //TX_MICMUTE_MIN_G_CTRL_0 +936 0x6000 //TX_MICMUTE_A_POST_FILT_S_0 +937 0x7000 //TX_MICMUTE_B_POST_FILT_0 +938 0x2710 //TX_MIC1RUB_AMP_THR +939 0x0010 //TX_MIC1MUTE_RATIO_THR +940 0x0450 //TX_MIC1MUTE_AMP_THR +941 0x0008 //TX_MIC1MUTE_CVG_TIME +942 0x0008 //TX_MIC1MUTE_RELEASE_TIME +943 0x0000 //TX_AMS_RESRV_01 +944 0x0000 //TX_AMS_RESRV_02 +945 0x0000 //TX_AMS_RESRV_03 +946 0x0000 //TX_AMS_RESRV_04 +947 0x0000 //TX_AMS_RESRV_05 +948 0x0000 //TX_AMS_RESRV_06 +949 0x0000 //TX_AMS_RESRV_07 +950 0x0000 //TX_AMS_RESRV_08 +951 0x0000 //TX_AMS_RESRV_09 +952 0x0000 //TX_AMS_RESRV_10 +953 0x0000 //TX_AMS_RESRV_11 +954 0x0000 //TX_AMS_RESRV_12 +955 0x0000 //TX_AMS_RESRV_13 +956 0x0000 //TX_AMS_RESRV_14 +957 0x0000 //TX_AMS_RESRV_15 +958 0x0000 //TX_AMS_RESRV_16 +959 0x0000 //TX_AMS_RESRV_17 +960 0x0000 //TX_AMS_RESRV_18 +961 0x0000 //TX_AMS_RESRV_19 #RX 0 0x000C //RX_RECVFUNC_MODE_0 1 0x0000 //RX_RECVFUNC_MODE_1 @@ -19285,14 +28521,866 @@ 110 0x0000 //RX_FDDRC_RESRV_0 129 0x0100 //RX_SPK_VOL 130 0x0000 //RX_VOL_RESRV_0 +#RX 2 +157 0x000C //RX_RECVFUNC_MODE_0 +158 0x0000 //RX_RECVFUNC_MODE_1 +159 0x0004 //RX_SAMPLINGFREQ_SIG +160 0x0004 //RX_SAMPLINGFREQ_PROC +161 0x000A //RX_FRAME_SZ +162 0x0000 //RX_DELAY_OPT +163 0x1000 //RX_TDDRC_ALPHA_UP_1 +164 0x1000 //RX_TDDRC_ALPHA_UP_2 +165 0x1000 //RX_TDDRC_ALPHA_UP_3 +166 0x1000 //RX_TDDRC_ALPHA_UP_4 +167 0x0800 //RX_PGA +168 0x7FFF //RX_A_HP +169 0x4000 //RX_B_PE +170 0x5800 //RX_THR_PITCH_DET_0 +171 0x5000 //RX_THR_PITCH_DET_1 +172 0x4000 //RX_THR_PITCH_DET_2 +173 0x0008 //RX_PITCH_BFR_LEN +174 0x0003 //RX_SBD_PITCH_DET +175 0x0100 //RX_PP_RESRV_0 +176 0x0020 //RX_PP_RESRV_1 +177 0x0600 //RX_N_SN_EST +178 0x000C //RX_N2_SN_EST +179 0x000F //RX_NS_LVL_CTRL +180 0xF800 //RX_THR_SN_EST +181 0x7E00 //RX_LAMBDA_PFILT +182 0x000A //RX_FENS_RESRV_0 +183 0x0190 //RX_FENS_RESRV_1 +184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +187 0x0002 //RX_EXTRA_NS_L +188 0x0800 //RX_EXTRA_NS_A +189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +190 0x7000 //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +192 0x199A //RX_A_POST_FLT +193 0x0000 //RX_LMT_THRD +194 0x4000 //RX_LMT_ALPHA +195 0x0030 //RX_FDEQ_SUBNUM +196 0x4848 //RX_FDEQ_GAIN_0 +197 0x4848 //RX_FDEQ_GAIN_1 +198 0x4844 //RX_FDEQ_GAIN_2 +199 0x4B4D //RX_FDEQ_GAIN_3 +200 0x4E50 //RX_FDEQ_GAIN_4 +201 0x5254 //RX_FDEQ_GAIN_5 +202 0x5658 //RX_FDEQ_GAIN_6 +203 0x5C60 //RX_FDEQ_GAIN_7 +204 0x6468 //RX_FDEQ_GAIN_8 +205 0x6C70 //RX_FDEQ_GAIN_9 +206 0x7474 //RX_FDEQ_GAIN_10 +207 0x7474 //RX_FDEQ_GAIN_11 +208 0x7474 //RX_FDEQ_GAIN_12 +209 0x7474 //RX_FDEQ_GAIN_13 +210 0x7474 //RX_FDEQ_GAIN_14 +211 0x7474 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0202 //RX_FDEQ_BIN_0 +221 0x0203 //RX_FDEQ_BIN_1 +222 0x0402 //RX_FDEQ_BIN_2 +223 0x0304 //RX_FDEQ_BIN_3 +224 0x0405 //RX_FDEQ_BIN_4 +225 0x0506 //RX_FDEQ_BIN_5 +226 0x0708 //RX_FDEQ_BIN_6 +227 0x090A //RX_FDEQ_BIN_7 +228 0x0B0C //RX_FDEQ_BIN_8 +229 0x0D0E //RX_FDEQ_BIN_9 +230 0x1214 //RX_FDEQ_BIN_10 +231 0x1E1E //RX_FDEQ_BIN_11 +232 0x1E1E //RX_FDEQ_BIN_12 +233 0x1E1E //RX_FDEQ_BIN_13 +234 0x1E1E //RX_FDEQ_BIN_14 +235 0x202C //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x4000 //RX_FDEQ_RESRV_0 +245 0x0320 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0030 //RX_FDDRC_BAND_MARGIN_1 +248 0x0050 //RX_FDDRC_BAND_MARGIN_2 +249 0x0080 //RX_FDDRC_BAND_MARGIN_3 +250 0x0007 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x5000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x6400 //RX_FDDRC_THRD_3_2 +258 0x6400 //RX_FDDRC_THRD_3_3 +259 0x2000 //RX_FDDRC_SLANT_0_0 +260 0x2000 //RX_FDDRC_SLANT_0_1 +261 0x2000 //RX_FDDRC_SLANT_0_2 +262 0x2000 //RX_FDDRC_SLANT_0_3 +263 0x5333 //RX_FDDRC_SLANT_1_0 +264 0x5333 //RX_FDDRC_SLANT_1_1 +265 0x5333 //RX_FDDRC_SLANT_1_2 +266 0x5333 //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +268 0x0002 //RX_FILTINDX +269 0x0000 //RX_TDDRC_THRD_0 +270 0x0000 //RX_TDDRC_THRD_1 +271 0x1800 //RX_TDDRC_THRD_2 +272 0x1800 //RX_TDDRC_THRD_3 +273 0x3000 //RX_TDDRC_SLANT_0 +274 0x6E00 //RX_TDDRC_SLANT_1 +275 0x1000 //RX_TDDRC_ALPHA_UP_0 +276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x199A //RX_TDDRC_HMNC_GAIN +279 0x0001 //RX_TDDRC_SMT_FLAG +280 0x0CCD //RX_TDDRC_SMT_W +281 0x01E0 //RX_TDDRC_DRC_GAIN +282 0x7C00 //RX_LAMBDA_PKA_FP +283 0x2000 //RX_TPKA_FP +284 0x2000 //RX_MIN_G_FP +285 0x0080 //RX_MAX_G_FP +286 0x0100 //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 +288 0x0000 //RX_MAXLEVEL_CNG +289 0x3000 //RX_BWE_UV_TH +290 0x3000 //RX_BWE_UV_TH2 +291 0x1800 //RX_BWE_UV_TH3 +292 0x1000 //RX_BWE_V_TH +293 0x04CD //RX_BWE_GAIN1_V_TH1 +294 0x0F33 //RX_BWE_GAIN1_V_TH2 +295 0x7333 //RX_BWE_UV_EQ +296 0x199A //RX_BWE_V_EQ +297 0x7333 //RX_BWE_TONE_TH +298 0x0004 //RX_BWE_UV_HOLD_T +299 0x6CCD //RX_BWE_GAIN2_ALPHA +300 0x799A //RX_BWE_GAIN3_ALPHA +301 0x001E //RX_BWE_CUTOFF +302 0x3000 //RX_BWE_GAINFILL +303 0x3200 //RX_BWE_MAXTH_TONE +304 0x2000 //RX_BWE_EQ_0 +305 0x2000 //RX_BWE_EQ_1 +306 0x2000 //RX_BWE_EQ_2 +307 0x2000 //RX_BWE_EQ_3 +308 0x2000 //RX_BWE_EQ_4 +309 0x2000 //RX_BWE_EQ_5 +310 0x2000 //RX_BWE_EQ_6 +311 0x0000 //RX_BWE_RESRV_0 +312 0x0000 //RX_BWE_RESRV_1 +313 0x0000 //RX_BWE_RESRV_2 +#VOL 0 +163 0x1000 //RX_TDDRC_ALPHA_UP_1 +164 0x1000 //RX_TDDRC_ALPHA_UP_2 +165 0x1000 //RX_TDDRC_ALPHA_UP_3 +166 0x1000 //RX_TDDRC_ALPHA_UP_4 +184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +190 0x7000 //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +269 0x0000 //RX_TDDRC_THRD_0 +270 0x0000 //RX_TDDRC_THRD_1 +271 0x1800 //RX_TDDRC_THRD_2 +272 0x1800 //RX_TDDRC_THRD_3 +273 0x3000 //RX_TDDRC_SLANT_0 +274 0x6E00 //RX_TDDRC_SLANT_1 +275 0x1000 //RX_TDDRC_ALPHA_UP_0 +276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x199A //RX_TDDRC_HMNC_GAIN +279 0x0001 //RX_TDDRC_SMT_FLAG +280 0x0CCD //RX_TDDRC_SMT_W +281 0x01E0 //RX_TDDRC_DRC_GAIN +195 0x0030 //RX_FDEQ_SUBNUM +196 0x4848 //RX_FDEQ_GAIN_0 +197 0x4848 //RX_FDEQ_GAIN_1 +198 0x4844 //RX_FDEQ_GAIN_2 +199 0x4B4D //RX_FDEQ_GAIN_3 +200 0x4E50 //RX_FDEQ_GAIN_4 +201 0x5254 //RX_FDEQ_GAIN_5 +202 0x5658 //RX_FDEQ_GAIN_6 +203 0x5C60 //RX_FDEQ_GAIN_7 +204 0x6468 //RX_FDEQ_GAIN_8 +205 0x6C70 //RX_FDEQ_GAIN_9 +206 0x7474 //RX_FDEQ_GAIN_10 +207 0x7474 //RX_FDEQ_GAIN_11 +208 0x7474 //RX_FDEQ_GAIN_12 +209 0x7474 //RX_FDEQ_GAIN_13 +210 0x7474 //RX_FDEQ_GAIN_14 +211 0x7474 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0202 //RX_FDEQ_BIN_0 +221 0x0203 //RX_FDEQ_BIN_1 +222 0x0402 //RX_FDEQ_BIN_2 +223 0x0304 //RX_FDEQ_BIN_3 +224 0x0405 //RX_FDEQ_BIN_4 +225 0x0506 //RX_FDEQ_BIN_5 +226 0x0708 //RX_FDEQ_BIN_6 +227 0x090A //RX_FDEQ_BIN_7 +228 0x0B0C //RX_FDEQ_BIN_8 +229 0x0D0E //RX_FDEQ_BIN_9 +230 0x1214 //RX_FDEQ_BIN_10 +231 0x1E1E //RX_FDEQ_BIN_11 +232 0x1E1E //RX_FDEQ_BIN_12 +233 0x1E1E //RX_FDEQ_BIN_13 +234 0x1E1E //RX_FDEQ_BIN_14 +235 0x202C //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x4000 //RX_FDEQ_RESRV_0 +245 0x0320 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0030 //RX_FDDRC_BAND_MARGIN_1 +248 0x0050 //RX_FDDRC_BAND_MARGIN_2 +249 0x0080 //RX_FDDRC_BAND_MARGIN_3 +250 0x0007 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x5000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x6400 //RX_FDDRC_THRD_3_2 +258 0x6400 //RX_FDDRC_THRD_3_3 +259 0x2000 //RX_FDDRC_SLANT_0_0 +260 0x2000 //RX_FDDRC_SLANT_0_1 +261 0x2000 //RX_FDDRC_SLANT_0_2 +262 0x2000 //RX_FDDRC_SLANT_0_3 +263 0x5333 //RX_FDDRC_SLANT_1_0 +264 0x5333 //RX_FDDRC_SLANT_1_1 +265 0x5333 //RX_FDDRC_SLANT_1_2 +266 0x5333 //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +286 0x0100 //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 +#VOL 1 +163 0x1000 //RX_TDDRC_ALPHA_UP_1 +164 0x1000 //RX_TDDRC_ALPHA_UP_2 +165 0x1000 //RX_TDDRC_ALPHA_UP_3 +166 0x1000 //RX_TDDRC_ALPHA_UP_4 +184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +190 0x7000 //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +269 0x0000 //RX_TDDRC_THRD_0 +270 0x0000 //RX_TDDRC_THRD_1 +271 0x1800 //RX_TDDRC_THRD_2 +272 0x1800 //RX_TDDRC_THRD_3 +273 0x3000 //RX_TDDRC_SLANT_0 +274 0x6E00 //RX_TDDRC_SLANT_1 +275 0x1000 //RX_TDDRC_ALPHA_UP_0 +276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x199A //RX_TDDRC_HMNC_GAIN +279 0x0001 //RX_TDDRC_SMT_FLAG +280 0x0CCD //RX_TDDRC_SMT_W +281 0x01E0 //RX_TDDRC_DRC_GAIN +195 0x0030 //RX_FDEQ_SUBNUM +196 0x4848 //RX_FDEQ_GAIN_0 +197 0x4848 //RX_FDEQ_GAIN_1 +198 0x4844 //RX_FDEQ_GAIN_2 +199 0x4B4D //RX_FDEQ_GAIN_3 +200 0x4E50 //RX_FDEQ_GAIN_4 +201 0x5254 //RX_FDEQ_GAIN_5 +202 0x5658 //RX_FDEQ_GAIN_6 +203 0x5C60 //RX_FDEQ_GAIN_7 +204 0x6468 //RX_FDEQ_GAIN_8 +205 0x6C70 //RX_FDEQ_GAIN_9 +206 0x7474 //RX_FDEQ_GAIN_10 +207 0x7474 //RX_FDEQ_GAIN_11 +208 0x7474 //RX_FDEQ_GAIN_12 +209 0x7474 //RX_FDEQ_GAIN_13 +210 0x7474 //RX_FDEQ_GAIN_14 +211 0x7474 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0202 //RX_FDEQ_BIN_0 +221 0x0203 //RX_FDEQ_BIN_1 +222 0x0402 //RX_FDEQ_BIN_2 +223 0x0304 //RX_FDEQ_BIN_3 +224 0x0405 //RX_FDEQ_BIN_4 +225 0x0506 //RX_FDEQ_BIN_5 +226 0x0708 //RX_FDEQ_BIN_6 +227 0x090A //RX_FDEQ_BIN_7 +228 0x0B0C //RX_FDEQ_BIN_8 +229 0x0D0E //RX_FDEQ_BIN_9 +230 0x1214 //RX_FDEQ_BIN_10 +231 0x1E1E //RX_FDEQ_BIN_11 +232 0x1E1E //RX_FDEQ_BIN_12 +233 0x1E1E //RX_FDEQ_BIN_13 +234 0x1E1E //RX_FDEQ_BIN_14 +235 0x202C //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x4000 //RX_FDEQ_RESRV_0 +245 0x0320 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0030 //RX_FDDRC_BAND_MARGIN_1 +248 0x0050 //RX_FDDRC_BAND_MARGIN_2 +249 0x0080 //RX_FDDRC_BAND_MARGIN_3 +250 0x0007 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x5000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x6400 //RX_FDDRC_THRD_3_2 +258 0x6400 //RX_FDDRC_THRD_3_3 +259 0x2000 //RX_FDDRC_SLANT_0_0 +260 0x2000 //RX_FDDRC_SLANT_0_1 +261 0x2000 //RX_FDDRC_SLANT_0_2 +262 0x2000 //RX_FDDRC_SLANT_0_3 +263 0x5333 //RX_FDDRC_SLANT_1_0 +264 0x5333 //RX_FDDRC_SLANT_1_1 +265 0x5333 //RX_FDDRC_SLANT_1_2 +266 0x5333 //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +286 0x0100 //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 +#VOL 2 +163 0x1000 //RX_TDDRC_ALPHA_UP_1 +164 0x1000 //RX_TDDRC_ALPHA_UP_2 +165 0x1000 //RX_TDDRC_ALPHA_UP_3 +166 0x1000 //RX_TDDRC_ALPHA_UP_4 +184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +190 0x7000 //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +269 0x0000 //RX_TDDRC_THRD_0 +270 0x0000 //RX_TDDRC_THRD_1 +271 0x1800 //RX_TDDRC_THRD_2 +272 0x1800 //RX_TDDRC_THRD_3 +273 0x3000 //RX_TDDRC_SLANT_0 +274 0x6E00 //RX_TDDRC_SLANT_1 +275 0x1000 //RX_TDDRC_ALPHA_UP_0 +276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x199A //RX_TDDRC_HMNC_GAIN +279 0x0001 //RX_TDDRC_SMT_FLAG +280 0x0CCD //RX_TDDRC_SMT_W +281 0x01E0 //RX_TDDRC_DRC_GAIN +195 0x0030 //RX_FDEQ_SUBNUM +196 0x4848 //RX_FDEQ_GAIN_0 +197 0x4848 //RX_FDEQ_GAIN_1 +198 0x4844 //RX_FDEQ_GAIN_2 +199 0x4B4D //RX_FDEQ_GAIN_3 +200 0x4E50 //RX_FDEQ_GAIN_4 +201 0x5254 //RX_FDEQ_GAIN_5 +202 0x5658 //RX_FDEQ_GAIN_6 +203 0x5C60 //RX_FDEQ_GAIN_7 +204 0x6468 //RX_FDEQ_GAIN_8 +205 0x6C70 //RX_FDEQ_GAIN_9 +206 0x7474 //RX_FDEQ_GAIN_10 +207 0x7474 //RX_FDEQ_GAIN_11 +208 0x7474 //RX_FDEQ_GAIN_12 +209 0x7474 //RX_FDEQ_GAIN_13 +210 0x7474 //RX_FDEQ_GAIN_14 +211 0x7474 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0202 //RX_FDEQ_BIN_0 +221 0x0203 //RX_FDEQ_BIN_1 +222 0x0402 //RX_FDEQ_BIN_2 +223 0x0304 //RX_FDEQ_BIN_3 +224 0x0405 //RX_FDEQ_BIN_4 +225 0x0506 //RX_FDEQ_BIN_5 +226 0x0708 //RX_FDEQ_BIN_6 +227 0x090A //RX_FDEQ_BIN_7 +228 0x0B0C //RX_FDEQ_BIN_8 +229 0x0D0E //RX_FDEQ_BIN_9 +230 0x1214 //RX_FDEQ_BIN_10 +231 0x1E1E //RX_FDEQ_BIN_11 +232 0x1E1E //RX_FDEQ_BIN_12 +233 0x1E1E //RX_FDEQ_BIN_13 +234 0x1E1E //RX_FDEQ_BIN_14 +235 0x202C //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x4000 //RX_FDEQ_RESRV_0 +245 0x0320 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0030 //RX_FDDRC_BAND_MARGIN_1 +248 0x0050 //RX_FDDRC_BAND_MARGIN_2 +249 0x0080 //RX_FDDRC_BAND_MARGIN_3 +250 0x0007 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x5000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x6400 //RX_FDDRC_THRD_3_2 +258 0x6400 //RX_FDDRC_THRD_3_3 +259 0x2000 //RX_FDDRC_SLANT_0_0 +260 0x2000 //RX_FDDRC_SLANT_0_1 +261 0x2000 //RX_FDDRC_SLANT_0_2 +262 0x2000 //RX_FDDRC_SLANT_0_3 +263 0x5333 //RX_FDDRC_SLANT_1_0 +264 0x5333 //RX_FDDRC_SLANT_1_1 +265 0x5333 //RX_FDDRC_SLANT_1_2 +266 0x5333 //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +286 0x0100 //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 +#VOL 3 +163 0x1000 //RX_TDDRC_ALPHA_UP_1 +164 0x1000 //RX_TDDRC_ALPHA_UP_2 +165 0x1000 //RX_TDDRC_ALPHA_UP_3 +166 0x1000 //RX_TDDRC_ALPHA_UP_4 +184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +190 0x7000 //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +269 0x0000 //RX_TDDRC_THRD_0 +270 0x0000 //RX_TDDRC_THRD_1 +271 0x1800 //RX_TDDRC_THRD_2 +272 0x1800 //RX_TDDRC_THRD_3 +273 0x3000 //RX_TDDRC_SLANT_0 +274 0x6E00 //RX_TDDRC_SLANT_1 +275 0x1000 //RX_TDDRC_ALPHA_UP_0 +276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x199A //RX_TDDRC_HMNC_GAIN +279 0x0001 //RX_TDDRC_SMT_FLAG +280 0x0CCD //RX_TDDRC_SMT_W +281 0x01E0 //RX_TDDRC_DRC_GAIN +195 0x0030 //RX_FDEQ_SUBNUM +196 0x4848 //RX_FDEQ_GAIN_0 +197 0x4848 //RX_FDEQ_GAIN_1 +198 0x4844 //RX_FDEQ_GAIN_2 +199 0x4B4D //RX_FDEQ_GAIN_3 +200 0x4E50 //RX_FDEQ_GAIN_4 +201 0x5254 //RX_FDEQ_GAIN_5 +202 0x5658 //RX_FDEQ_GAIN_6 +203 0x5C60 //RX_FDEQ_GAIN_7 +204 0x6468 //RX_FDEQ_GAIN_8 +205 0x6C70 //RX_FDEQ_GAIN_9 +206 0x7474 //RX_FDEQ_GAIN_10 +207 0x7474 //RX_FDEQ_GAIN_11 +208 0x7474 //RX_FDEQ_GAIN_12 +209 0x7474 //RX_FDEQ_GAIN_13 +210 0x7474 //RX_FDEQ_GAIN_14 +211 0x7474 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0202 //RX_FDEQ_BIN_0 +221 0x0203 //RX_FDEQ_BIN_1 +222 0x0402 //RX_FDEQ_BIN_2 +223 0x0304 //RX_FDEQ_BIN_3 +224 0x0405 //RX_FDEQ_BIN_4 +225 0x0506 //RX_FDEQ_BIN_5 +226 0x0708 //RX_FDEQ_BIN_6 +227 0x090A //RX_FDEQ_BIN_7 +228 0x0B0C //RX_FDEQ_BIN_8 +229 0x0D0E //RX_FDEQ_BIN_9 +230 0x1214 //RX_FDEQ_BIN_10 +231 0x1E1E //RX_FDEQ_BIN_11 +232 0x1E1E //RX_FDEQ_BIN_12 +233 0x1E1E //RX_FDEQ_BIN_13 +234 0x1E1E //RX_FDEQ_BIN_14 +235 0x202C //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x4000 //RX_FDEQ_RESRV_0 +245 0x0320 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0030 //RX_FDDRC_BAND_MARGIN_1 +248 0x0050 //RX_FDDRC_BAND_MARGIN_2 +249 0x0080 //RX_FDDRC_BAND_MARGIN_3 +250 0x0007 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x5000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x6400 //RX_FDDRC_THRD_3_2 +258 0x6400 //RX_FDDRC_THRD_3_3 +259 0x2000 //RX_FDDRC_SLANT_0_0 +260 0x2000 //RX_FDDRC_SLANT_0_1 +261 0x2000 //RX_FDDRC_SLANT_0_2 +262 0x2000 //RX_FDDRC_SLANT_0_3 +263 0x5333 //RX_FDDRC_SLANT_1_0 +264 0x5333 //RX_FDDRC_SLANT_1_1 +265 0x5333 //RX_FDDRC_SLANT_1_2 +266 0x5333 //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +286 0x0100 //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 +#VOL 4 +163 0x1000 //RX_TDDRC_ALPHA_UP_1 +164 0x1000 //RX_TDDRC_ALPHA_UP_2 +165 0x1000 //RX_TDDRC_ALPHA_UP_3 +166 0x1000 //RX_TDDRC_ALPHA_UP_4 +184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +190 0x7000 //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +269 0x0000 //RX_TDDRC_THRD_0 +270 0x0000 //RX_TDDRC_THRD_1 +271 0x1800 //RX_TDDRC_THRD_2 +272 0x1800 //RX_TDDRC_THRD_3 +273 0x3000 //RX_TDDRC_SLANT_0 +274 0x6E00 //RX_TDDRC_SLANT_1 +275 0x1000 //RX_TDDRC_ALPHA_UP_0 +276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x199A //RX_TDDRC_HMNC_GAIN +279 0x0001 //RX_TDDRC_SMT_FLAG +280 0x0CCD //RX_TDDRC_SMT_W +281 0x01E0 //RX_TDDRC_DRC_GAIN +195 0x0030 //RX_FDEQ_SUBNUM +196 0x4848 //RX_FDEQ_GAIN_0 +197 0x4848 //RX_FDEQ_GAIN_1 +198 0x4844 //RX_FDEQ_GAIN_2 +199 0x4B4D //RX_FDEQ_GAIN_3 +200 0x4E50 //RX_FDEQ_GAIN_4 +201 0x5254 //RX_FDEQ_GAIN_5 +202 0x5658 //RX_FDEQ_GAIN_6 +203 0x5C60 //RX_FDEQ_GAIN_7 +204 0x6468 //RX_FDEQ_GAIN_8 +205 0x6C70 //RX_FDEQ_GAIN_9 +206 0x7474 //RX_FDEQ_GAIN_10 +207 0x7474 //RX_FDEQ_GAIN_11 +208 0x7474 //RX_FDEQ_GAIN_12 +209 0x7474 //RX_FDEQ_GAIN_13 +210 0x7474 //RX_FDEQ_GAIN_14 +211 0x7474 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0202 //RX_FDEQ_BIN_0 +221 0x0203 //RX_FDEQ_BIN_1 +222 0x0402 //RX_FDEQ_BIN_2 +223 0x0304 //RX_FDEQ_BIN_3 +224 0x0405 //RX_FDEQ_BIN_4 +225 0x0506 //RX_FDEQ_BIN_5 +226 0x0708 //RX_FDEQ_BIN_6 +227 0x090A //RX_FDEQ_BIN_7 +228 0x0B0C //RX_FDEQ_BIN_8 +229 0x0D0E //RX_FDEQ_BIN_9 +230 0x1214 //RX_FDEQ_BIN_10 +231 0x1E1E //RX_FDEQ_BIN_11 +232 0x1E1E //RX_FDEQ_BIN_12 +233 0x1E1E //RX_FDEQ_BIN_13 +234 0x1E1E //RX_FDEQ_BIN_14 +235 0x202C //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x4000 //RX_FDEQ_RESRV_0 +245 0x0320 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0030 //RX_FDDRC_BAND_MARGIN_1 +248 0x0050 //RX_FDDRC_BAND_MARGIN_2 +249 0x0080 //RX_FDDRC_BAND_MARGIN_3 +250 0x0007 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x5000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x6400 //RX_FDDRC_THRD_3_2 +258 0x6400 //RX_FDDRC_THRD_3_3 +259 0x2000 //RX_FDDRC_SLANT_0_0 +260 0x2000 //RX_FDDRC_SLANT_0_1 +261 0x2000 //RX_FDDRC_SLANT_0_2 +262 0x2000 //RX_FDDRC_SLANT_0_3 +263 0x5333 //RX_FDDRC_SLANT_1_0 +264 0x5333 //RX_FDDRC_SLANT_1_1 +265 0x5333 //RX_FDDRC_SLANT_1_2 +266 0x5333 //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +286 0x0100 //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 +#VOL 5 +163 0x1000 //RX_TDDRC_ALPHA_UP_1 +164 0x1000 //RX_TDDRC_ALPHA_UP_2 +165 0x1000 //RX_TDDRC_ALPHA_UP_3 +166 0x1000 //RX_TDDRC_ALPHA_UP_4 +184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +190 0x7000 //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +269 0x0000 //RX_TDDRC_THRD_0 +270 0x0000 //RX_TDDRC_THRD_1 +271 0x1800 //RX_TDDRC_THRD_2 +272 0x1800 //RX_TDDRC_THRD_3 +273 0x3000 //RX_TDDRC_SLANT_0 +274 0x6E00 //RX_TDDRC_SLANT_1 +275 0x1000 //RX_TDDRC_ALPHA_UP_0 +276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x199A //RX_TDDRC_HMNC_GAIN +279 0x0001 //RX_TDDRC_SMT_FLAG +280 0x0CCD //RX_TDDRC_SMT_W +281 0x01E0 //RX_TDDRC_DRC_GAIN +195 0x0030 //RX_FDEQ_SUBNUM +196 0x4848 //RX_FDEQ_GAIN_0 +197 0x4848 //RX_FDEQ_GAIN_1 +198 0x4844 //RX_FDEQ_GAIN_2 +199 0x4B4D //RX_FDEQ_GAIN_3 +200 0x4E50 //RX_FDEQ_GAIN_4 +201 0x5254 //RX_FDEQ_GAIN_5 +202 0x5658 //RX_FDEQ_GAIN_6 +203 0x5C60 //RX_FDEQ_GAIN_7 +204 0x6468 //RX_FDEQ_GAIN_8 +205 0x6C70 //RX_FDEQ_GAIN_9 +206 0x7474 //RX_FDEQ_GAIN_10 +207 0x7474 //RX_FDEQ_GAIN_11 +208 0x7474 //RX_FDEQ_GAIN_12 +209 0x7474 //RX_FDEQ_GAIN_13 +210 0x7474 //RX_FDEQ_GAIN_14 +211 0x7474 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0202 //RX_FDEQ_BIN_0 +221 0x0203 //RX_FDEQ_BIN_1 +222 0x0402 //RX_FDEQ_BIN_2 +223 0x0304 //RX_FDEQ_BIN_3 +224 0x0405 //RX_FDEQ_BIN_4 +225 0x0506 //RX_FDEQ_BIN_5 +226 0x0708 //RX_FDEQ_BIN_6 +227 0x090A //RX_FDEQ_BIN_7 +228 0x0B0C //RX_FDEQ_BIN_8 +229 0x0D0E //RX_FDEQ_BIN_9 +230 0x1214 //RX_FDEQ_BIN_10 +231 0x1E1E //RX_FDEQ_BIN_11 +232 0x1E1E //RX_FDEQ_BIN_12 +233 0x1E1E //RX_FDEQ_BIN_13 +234 0x1E1E //RX_FDEQ_BIN_14 +235 0x202C //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x4000 //RX_FDEQ_RESRV_0 +245 0x0320 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0030 //RX_FDDRC_BAND_MARGIN_1 +248 0x0050 //RX_FDDRC_BAND_MARGIN_2 +249 0x0080 //RX_FDDRC_BAND_MARGIN_3 +250 0x0007 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x5000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x6400 //RX_FDDRC_THRD_3_2 +258 0x6400 //RX_FDDRC_THRD_3_3 +259 0x2000 //RX_FDDRC_SLANT_0_0 +260 0x2000 //RX_FDDRC_SLANT_0_1 +261 0x2000 //RX_FDDRC_SLANT_0_2 +262 0x2000 //RX_FDDRC_SLANT_0_3 +263 0x5333 //RX_FDDRC_SLANT_1_0 +264 0x5333 //RX_FDDRC_SLANT_1_1 +265 0x5333 //RX_FDDRC_SLANT_1_2 +266 0x5333 //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +286 0x0100 //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 +#VOL 6 +163 0x1000 //RX_TDDRC_ALPHA_UP_1 +164 0x1000 //RX_TDDRC_ALPHA_UP_2 +165 0x1000 //RX_TDDRC_ALPHA_UP_3 +166 0x1000 //RX_TDDRC_ALPHA_UP_4 +184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +190 0x7000 //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +269 0x0000 //RX_TDDRC_THRD_0 +270 0x0000 //RX_TDDRC_THRD_1 +271 0x1800 //RX_TDDRC_THRD_2 +272 0x1800 //RX_TDDRC_THRD_3 +273 0x3000 //RX_TDDRC_SLANT_0 +274 0x6E00 //RX_TDDRC_SLANT_1 +275 0x1000 //RX_TDDRC_ALPHA_UP_0 +276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x199A //RX_TDDRC_HMNC_GAIN +279 0x0001 //RX_TDDRC_SMT_FLAG +280 0x0CCD //RX_TDDRC_SMT_W +281 0x01E0 //RX_TDDRC_DRC_GAIN +195 0x0030 //RX_FDEQ_SUBNUM +196 0x4848 //RX_FDEQ_GAIN_0 +197 0x4848 //RX_FDEQ_GAIN_1 +198 0x4844 //RX_FDEQ_GAIN_2 +199 0x4B4D //RX_FDEQ_GAIN_3 +200 0x4E50 //RX_FDEQ_GAIN_4 +201 0x5254 //RX_FDEQ_GAIN_5 +202 0x5658 //RX_FDEQ_GAIN_6 +203 0x5C60 //RX_FDEQ_GAIN_7 +204 0x6468 //RX_FDEQ_GAIN_8 +205 0x6C70 //RX_FDEQ_GAIN_9 +206 0x7474 //RX_FDEQ_GAIN_10 +207 0x7474 //RX_FDEQ_GAIN_11 +208 0x7474 //RX_FDEQ_GAIN_12 +209 0x7474 //RX_FDEQ_GAIN_13 +210 0x7474 //RX_FDEQ_GAIN_14 +211 0x7474 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0202 //RX_FDEQ_BIN_0 +221 0x0203 //RX_FDEQ_BIN_1 +222 0x0402 //RX_FDEQ_BIN_2 +223 0x0304 //RX_FDEQ_BIN_3 +224 0x0405 //RX_FDEQ_BIN_4 +225 0x0506 //RX_FDEQ_BIN_5 +226 0x0708 //RX_FDEQ_BIN_6 +227 0x090A //RX_FDEQ_BIN_7 +228 0x0B0C //RX_FDEQ_BIN_8 +229 0x0D0E //RX_FDEQ_BIN_9 +230 0x1214 //RX_FDEQ_BIN_10 +231 0x1E1E //RX_FDEQ_BIN_11 +232 0x1E1E //RX_FDEQ_BIN_12 +233 0x1E1E //RX_FDEQ_BIN_13 +234 0x1E1E //RX_FDEQ_BIN_14 +235 0x202C //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x4000 //RX_FDEQ_RESRV_0 +245 0x0320 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0030 //RX_FDDRC_BAND_MARGIN_1 +248 0x0050 //RX_FDDRC_BAND_MARGIN_2 +249 0x0080 //RX_FDDRC_BAND_MARGIN_3 +250 0x0007 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x5000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x6400 //RX_FDDRC_THRD_3_2 +258 0x6400 //RX_FDDRC_THRD_3_3 +259 0x2000 //RX_FDDRC_SLANT_0_0 +260 0x2000 //RX_FDDRC_SLANT_0_1 +261 0x2000 //RX_FDDRC_SLANT_0_2 +262 0x2000 //RX_FDDRC_SLANT_0_3 +263 0x5333 //RX_FDDRC_SLANT_1_0 +264 0x5333 //RX_FDDRC_SLANT_1_1 +265 0x5333 //RX_FDDRC_SLANT_1_2 +266 0x5333 //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +286 0x0100 //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 #CASE_NAME HANDSET-HANDSET-TMOBILE_US-NB -#PARAM_TYPE TX+RX -#TOTAL_CUSTOM_STEP 7 +#PARAM_MODE Full +#PARAM_TYPE TX+2RX +#TOTAL_CUSTOM_STEP 7+7 #TX 0 0x0000 //TX_OPERATION_MODE_0 1 0x0000 //TX_OPERATION_MODE_1 -2 0x0036 //TX_PATCH_REG +2 0x0076 //TX_PATCH_REG 3 0x6F7E //TX_SENDFUNC_MODE_0 4 0x0001 //TX_SENDFUNC_MODE_1 5 0x0002 //TX_NUM_MIC @@ -19311,7 +29399,7 @@ 18 0x0000 //TX_SYS_RESRV_2 19 0x0000 //TX_SYS_RESRV_3 20 0x0000 //TX_DIST2REF0 -21 0x009D //TX_DIST2REF1 +21 0x009C //TX_DIST2REF1 22 0x0000 //TX_DIST2REF_02 23 0x0000 //TX_DIST2REF_03 24 0x0000 //TX_DIST2REF_04 @@ -19541,19 +29629,19 @@ 248 0xF800 //TX_THR_SN_EST_6 249 0xF700 //TX_THR_SN_EST_7 250 0x0000 //TX_DELTA_THR_SN_EST_0 -251 0x01A0 //TX_DELTA_THR_SN_EST_1 -252 0x0100 //TX_DELTA_THR_SN_EST_2 -253 0x0200 //TX_DELTA_THR_SN_EST_3 -254 0x01A0 //TX_DELTA_THR_SN_EST_4 -255 0x0100 //TX_DELTA_THR_SN_EST_5 -256 0x0000 //TX_DELTA_THR_SN_EST_6 +251 0x0100 //TX_DELTA_THR_SN_EST_1 +252 0x0200 //TX_DELTA_THR_SN_EST_2 +253 0x01A0 //TX_DELTA_THR_SN_EST_3 +254 0x0100 //TX_DELTA_THR_SN_EST_4 +255 0x0000 //TX_DELTA_THR_SN_EST_5 +256 0x01A0 //TX_DELTA_THR_SN_EST_6 257 0x0200 //TX_DELTA_THR_SN_EST_7 258 0x4000 //TX_LAMBDA_NN_EST_0 -259 0x4000 //TX_LAMBDA_NN_EST_1 -260 0x3000 //TX_LAMBDA_NN_EST_2 -261 0x4000 //TX_LAMBDA_NN_EST_3 +259 0x3000 //TX_LAMBDA_NN_EST_1 +260 0x4000 //TX_LAMBDA_NN_EST_2 +261 0x3000 //TX_LAMBDA_NN_EST_3 262 0x3000 //TX_LAMBDA_NN_EST_4 -263 0x3000 //TX_LAMBDA_NN_EST_5 +263 0x4000 //TX_LAMBDA_NN_EST_5 264 0x4000 //TX_LAMBDA_NN_EST_6 265 0x4000 //TX_LAMBDA_NN_EST_7 266 0x0400 //TX_N_SN_EST @@ -19572,20 +29660,20 @@ 279 0x4000 //TX_B_POST_FLT_0 280 0x4000 //TX_B_POST_FLT_1 281 0x0014 //TX_NS_LVL_CTRL_0 -282 0x001B //TX_NS_LVL_CTRL_1 -283 0x0019 //TX_NS_LVL_CTRL_2 +282 0x0019 //TX_NS_LVL_CTRL_1 +283 0x0017 //TX_NS_LVL_CTRL_2 284 0x0017 //TX_NS_LVL_CTRL_3 -285 0x0017 //TX_NS_LVL_CTRL_4 -286 0x0019 //TX_NS_LVL_CTRL_5 -287 0x0014 //TX_NS_LVL_CTRL_6 +285 0x0019 //TX_NS_LVL_CTRL_4 +286 0x0014 //TX_NS_LVL_CTRL_5 +287 0x001B //TX_NS_LVL_CTRL_6 288 0x0010 //TX_NS_LVL_CTRL_7 289 0x0010 //TX_MIN_GAIN_S_0 290 0x000C //TX_MIN_GAIN_S_1 -291 0x000C //TX_MIN_GAIN_S_2 +291 0x0010 //TX_MIN_GAIN_S_2 292 0x0010 //TX_MIN_GAIN_S_3 -293 0x0010 //TX_MIN_GAIN_S_4 -294 0x000C //TX_MIN_GAIN_S_5 -295 0x0014 //TX_MIN_GAIN_S_6 +293 0x000C //TX_MIN_GAIN_S_4 +294 0x0014 //TX_MIN_GAIN_S_5 +295 0x000C //TX_MIN_GAIN_S_6 296 0x0014 //TX_MIN_GAIN_S_7 297 0x5000 //TX_NMOS_SUP 298 0x0000 //TX_NS_MAX_PRI_SNR_TH @@ -19595,8 +29683,8 @@ 302 0x4000 //TX_SNRI_SUP_2 303 0x4000 //TX_SNRI_SUP_3 304 0x4000 //TX_SNRI_SUP_4 -305 0x4000 //TX_SNRI_SUP_5 -306 0x7FFF //TX_SNRI_SUP_6 +305 0x7FFF //TX_SNRI_SUP_5 +306 0x4000 //TX_SNRI_SUP_6 307 0x3000 //TX_SNRI_SUP_7 308 0x3000 //TX_THR_LFNS 309 0x001A //TX_G_LFNS @@ -19605,36 +29693,36 @@ 312 0x7FFF //TX_A_POST_FILT_0 313 0x2000 //TX_A_POST_FILT_1 314 0x2000 //TX_A_POST_FILT_S_0 -315 0x7000 //TX_A_POST_FILT_S_1 -316 0x6000 //TX_A_POST_FILT_S_2 -317 0x5000 //TX_A_POST_FILT_S_3 -318 0x2000 //TX_A_POST_FILT_S_4 -319 0x6000 //TX_A_POST_FILT_S_5 -320 0x2000 //TX_A_POST_FILT_S_6 +315 0x6000 //TX_A_POST_FILT_S_1 +316 0x5000 //TX_A_POST_FILT_S_2 +317 0x2000 //TX_A_POST_FILT_S_3 +318 0x6000 //TX_A_POST_FILT_S_4 +319 0x2000 //TX_A_POST_FILT_S_5 +320 0x7000 //TX_A_POST_FILT_S_6 321 0x7000 //TX_A_POST_FILT_S_7 322 0x4000 //TX_B_POST_FILT_0 323 0x4000 //TX_B_POST_FILT_1 -324 0x7FFF //TX_B_POST_FILT_2 -325 0x5000 //TX_B_POST_FILT_3 -326 0x7FFF //TX_B_POST_FILT_4 -327 0x7FFF //TX_B_POST_FILT_5 +324 0x5000 //TX_B_POST_FILT_2 +325 0x4000 //TX_B_POST_FILT_3 +326 0x4000 //TX_B_POST_FILT_4 +327 0x4000 //TX_B_POST_FILT_5 328 0x4000 //TX_B_POST_FILT_6 329 0x2000 //TX_B_POST_FILT_7 330 0x7FFF //TX_B_LESSCUT_RTO_S_0 -331 0x7FFF //TX_B_LESSCUT_RTO_S_1 -332 0x7FFF //TX_B_LESSCUT_RTO_S_2 -333 0x7FFF //TX_B_LESSCUT_RTO_S_3 -334 0x7FFF //TX_B_LESSCUT_RTO_S_4 -335 0x7FFF //TX_B_LESSCUT_RTO_S_5 -336 0x7FFF //TX_B_LESSCUT_RTO_S_6 -337 0x7FFF //TX_B_LESSCUT_RTO_S_7 +331 0x1000 //TX_B_LESSCUT_RTO_S_1 +332 0x1000 //TX_B_LESSCUT_RTO_S_2 +333 0x1000 //TX_B_LESSCUT_RTO_S_3 +334 0x1000 //TX_B_LESSCUT_RTO_S_4 +335 0x1000 //TX_B_LESSCUT_RTO_S_5 +336 0x1000 //TX_B_LESSCUT_RTO_S_6 +337 0x1000 //TX_B_LESSCUT_RTO_S_7 338 0x7E14 //TX_LAMBDA_PFILT 339 0x7C29 //TX_LAMBDA_PFILT_S_0 -340 0x7C29 //TX_LAMBDA_PFILT_S_1 -341 0x7200 //TX_LAMBDA_PFILT_S_2 -342 0x7900 //TX_LAMBDA_PFILT_S_3 -343 0x7400 //TX_LAMBDA_PFILT_S_4 -344 0x7200 //TX_LAMBDA_PFILT_S_5 +340 0x7200 //TX_LAMBDA_PFILT_S_1 +341 0x7900 //TX_LAMBDA_PFILT_S_2 +342 0x7400 //TX_LAMBDA_PFILT_S_3 +343 0x7200 //TX_LAMBDA_PFILT_S_4 +344 0x7C29 //TX_LAMBDA_PFILT_S_5 345 0x7C29 //TX_LAMBDA_PFILT_S_6 346 0x7C29 //TX_LAMBDA_PFILT_S_7 347 0x0200 //TX_K_PEPPER @@ -19670,10 +29758,10 @@ 377 0x0000 //TX_NOISE_TH_5_4 378 0x07D0 //TX_NOISE_TH_6 379 0x0004 //TX_MINENOISE_TH -380 0x4000 //TX_MINENOISE_MIC0_TH_MTS -381 0xFFEE //TX_MINENOISE_MIC0_TH_EXP -382 0x6000 //TX_MINENOISE_MIC0_S_TH_MTS -383 0xFFF3 //TX_MINENOISE_MIC0_S_TH_EXP +380 0xD508 //TX_MORENS_TFMASK_TH +381 0x0001 //TX_DRC_QUIET_FLOOR +382 0x6D60 //TX_RATIODTL_CUT_TH +383 0x0DAC //TX_DT_CUT_K1 384 0x00A5 //TX_OUT_ENER_S_TH_CLEAN 385 0x00A5 //TX_OUT_ENER_S_TH_LESSCLEAN 386 0x00A5 //TX_OUT_ENER_S_TH_NOISY @@ -19681,15 +29769,15 @@ 388 0x00CE //TX_OUT_ENER_TH_SPEECH 389 0x2000 //TX_SN_NPB_GAIN 390 0x0000 //TX_NN_NPB_GAIN -391 0x0000 //TX_CSX_ALPHA_0 -392 0x0000 //TX_CSX_ALPHA_1 -393 0x0000 //TX_CSX_ALPHA_2 -394 0x0000 //TX_CSX_ALPHA_3 -395 0x0800 //TX_MU_ARSP_EST -396 0x00C8 //TX_P_OUTBEAM_MIN_TH +391 0x3000 //TX_POST_MASK_SUP_HSNE +392 0x07D0 //TX_TAIL_DET_TH +393 0x4000 //TX_B_LESSCUT_RTO_WTA +394 0x0000 //TX_MEL_G_R +395 0x0080 //TX_SUPHIGH_TH +396 0x0000 //TX_MASK_G_R 397 0x0002 //TX_EXTRA_NS_L -398 0x0800 //TX_EXTRA_NS_A -399 0x0005 //TX_VR_NOISE_FLOOR_TH +398 0x1800 //TX_C_POST_FLT_MASK +399 0x7FFF //TX_A_POST_FLT_WNS 400 0x0148 //TX_MIN_G_LOW300HZ 401 0x0001 //TX_MAXLEVEL_CNG 402 0x00B4 //TX_STN_NOISE_TH @@ -19804,16 +29892,16 @@ 511 0x6666 //TX_MIC_TO_BFGAIN 512 0x0000 //TX_MICTOBFGAIN0 513 0x0000 //TX_FASTMUE_TH -514 0x0000 //TX_DERVB_LEN_0 -515 0x0000 //TX_DERVB_LEN_1 -516 0x0000 //TX_RHO_DERVB -517 0x0000 //TX_MIC_INDX_DERVB -518 0x0000 //TX_MU_DERVB -519 0x0000 //TX_DR_RESRV_0 -520 0x0000 //TX_DR_RESRV_1 -521 0x0000 //TX_DR_RESRV_2 -522 0x0000 //TX_DR_RESRV_3 -523 0x0000 //TX_DR_RESRV_4 +514 0x3000 //TX_DEREVERB_LF_MU +515 0x34CD //TX_DEREVERB_HF_MU +516 0x0007 //TX_DEREVERB_DELAY +517 0x0004 //TX_DEREVERB_COEF_LEN +518 0x0003 //TX_DEREVERB_DNR +519 0x0000 //TX_DEREVERB_ALPHA +520 0x0000 //TX_DEREVERB_BETA +521 0x3A98 //TX_GSC_RTOL_TH +522 0x3A98 //TX_GSC_RTOH_TH +523 0x7E2C //TX_WIDE2_MEANHTH 524 0x0000 //TX_DR_RESRV_5 525 0x0000 //TX_DR_RESRV_6 526 0x0000 //TX_DR_RESRV_7 @@ -19861,11 +29949,11 @@ 568 0x584F //TX_FDEQ_GAIN_1 569 0x4F4E //TX_FDEQ_GAIN_2 570 0x474A //TX_FDEQ_GAIN_3 -571 0x473F //TX_FDEQ_GAIN_4 -572 0x403B //TX_FDEQ_GAIN_5 -573 0x3933 //TX_FDEQ_GAIN_6 -574 0x302B //TX_FDEQ_GAIN_7 -575 0x2220 //TX_FDEQ_GAIN_8 +571 0x4737 //TX_FDEQ_GAIN_4 +572 0x3A40 //TX_FDEQ_GAIN_5 +573 0x4040 //TX_FDEQ_GAIN_6 +574 0x3631 //TX_FDEQ_GAIN_7 +575 0x2020 //TX_FDEQ_GAIN_8 576 0x383C //TX_FDEQ_GAIN_9 577 0x4848 //TX_FDEQ_GAIN_10 578 0x4848 //TX_FDEQ_GAIN_11 @@ -19890,7 +29978,7 @@ 597 0x0808 //TX_FDEQ_BIN_6 598 0x050E //TX_FDEQ_BIN_7 599 0x0B0C //TX_FDEQ_BIN_8 -600 0x0F0F //TX_FDEQ_BIN_9 +600 0x0F09 //TX_FDEQ_BIN_9 601 0x0000 //TX_FDEQ_BIN_10 602 0x0000 //TX_FDEQ_BIN_11 603 0x0000 //TX_FDEQ_BIN_12 @@ -19914,9 +30002,9 @@ 621 0x4848 //TX_PREEQ_GAIN_MIC0_4 622 0x4848 //TX_PREEQ_GAIN_MIC0_5 623 0x4848 //TX_PREEQ_GAIN_MIC0_6 -624 0x4846 //TX_PREEQ_GAIN_MIC0_7 -625 0x4544 //TX_PREEQ_GAIN_MIC0_8 -626 0x4241 //TX_PREEQ_GAIN_MIC0_9 +624 0x4848 //TX_PREEQ_GAIN_MIC0_7 +625 0x4848 //TX_PREEQ_GAIN_MIC0_8 +626 0x4848 //TX_PREEQ_GAIN_MIC0_9 627 0x4848 //TX_PREEQ_GAIN_MIC0_10 628 0x4848 //TX_PREEQ_GAIN_MIC0_11 629 0x4848 //TX_PREEQ_GAIN_MIC0_12 @@ -19964,8 +30052,8 @@ 671 0x4848 //TX_PREEQ_GAIN_MIC1_5 672 0x4848 //TX_PREEQ_GAIN_MIC1_6 673 0x4848 //TX_PREEQ_GAIN_MIC1_7 -674 0x4A4C //TX_PREEQ_GAIN_MIC1_8 -675 0x4E50 //TX_PREEQ_GAIN_MIC1_9 +674 0x4849 //TX_PREEQ_GAIN_MIC1_8 +675 0x4A4B //TX_PREEQ_GAIN_MIC1_9 676 0x4848 //TX_PREEQ_GAIN_MIC1_10 677 0x4848 //TX_PREEQ_GAIN_MIC1_11 678 0x4848 //TX_PREEQ_GAIN_MIC1_12 @@ -19980,7 +30068,7 @@ 687 0x4848 //TX_PREEQ_GAIN_MIC1_21 688 0x4848 //TX_PREEQ_GAIN_MIC1_22 689 0x4848 //TX_PREEQ_GAIN_MIC1_23 -690 0x0203 //TX_PREEQ_BIN_MIC1_0 +690 0x0202 //TX_PREEQ_BIN_MIC1_0 691 0x0203 //TX_PREEQ_BIN_MIC1_1 692 0x0303 //TX_PREEQ_BIN_MIC1_2 693 0x0304 //TX_PREEQ_BIN_MIC1_3 @@ -20066,7 +30154,7 @@ 773 0x0000 //TX_GAIN_LIMIT_0 774 0x0000 //TX_GAIN_LIMIT_1 775 0x0006 //TX_GAIN_LIMIT_2 -776 0x0006 //TX_GAIN_LIMIT_3 +776 0x0007 //TX_GAIN_LIMIT_3 777 0x7F5B //TX_BVE_NOVAD0_ALPHADOWN 778 0x7FDE //TX_BVE_VAD0_ALPHAUP 779 0x7F3A //TX_BVE_VAD0_ALPHADOWN @@ -20156,7 +30244,7 @@ 863 0x199A //TX_TDDRC_HMNC_GAIN 864 0x0000 //TX_TDDRC_SMT_FLAG 865 0x0CCD //TX_TDDRC_SMT_W -866 0x05A0 //TX_TDDRC_DRC_GAIN +866 0x0504 //TX_TDDRC_DRC_GAIN 867 0x7FFF //TX_TDDRC_LMT_THRD 868 0x0000 //TX_TDDRC_LMT_ALPHA 869 0x0000 //TX_TFMASKLTH @@ -20187,8 +30275,73 @@ 894 0xC000 //TX_FASTNS_SSA_THHFL 895 0xCCCC //TX_FASTNS_SSA_THLFH 896 0xD999 //TX_FASTNS_SSA_THHFH +897 0x2339 //TX_SENDFUNC_REG_MICMUTE +898 0x0021 //TX_SENDFUNC_REG_MICMUTE1 +899 0x02BC //TX_MICMUTE_RATIO_THR +900 0x0140 //TX_MICMUTE_AMP_THR +901 0x0004 //TX_MICMUTE_HPF_IND +902 0x00C0 //TX_MICMUTE_LOG_EYR_TH +903 0x0008 //TX_MICMUTE_CVG_TIME +904 0x0008 //TX_MICMUTE_RELEASE_TIME +905 0x01FE //TX_MIC_VOLUME_MIC0MUTE +906 0x0020 //TX_MICMUTE_EPD_OFFSET_0 +907 0x001E //TX_MICMUTE_FRQ_AEC_L +908 0x7999 //TX_MICMUTE_EAD_THR +909 0x7FFF //TX_MICMUTE_LAMBDA_CB_NLE +910 0x7FFF //TX_MICMUTE_LAMBDA_RE_EST +911 0x4000 //TX_DTD_THR1_MICMUTE_0 +912 0x7000 //TX_DTD_THR1_MICMUTE_1 +913 0x7FFF //TX_DTD_THR1_MICMUTE_2 +914 0x7FFF //TX_DTD_THR1_MICMUTE_3 +915 0x6CCC //TX_DTD_THR2_MICMUTE_0 +916 0x0400 //TX_MICMUTE_MIN_EQ_RE_EST_0 +917 0x0400 //TX_MICMUTE_MIN_EQ_RE_EST_1 +918 0x1000 //TX_MICMUTE_MIN_EQ_RE_EST_2 +919 0x7FFF //TX_MICMUTE_MIN_EQ_RE_EST_3 +920 0x7FFF //TX_MICMUTE_MIN_EQ_RE_EST_4 +921 0x4000 //TX_MICMUTE_C_POST_FLT +922 0x03E8 //TX_MICMUTE_DT_CUT_K +923 0x0001 //TX_MICMUTE_DT_CUT_THR +924 0x03E8 //TX_MICMUTE_DT_CUT_K2 +925 0x0001 //TX_MICMUTE_DT_CUT_THR2 +926 0x0064 //TX_MICMUTE_DT2_HOLD_N +927 0x1000 //TX_MICMUTE_RATIODTH_THCUT +928 0x1000 //TX_MICMUTE_B_POST_FLT_ECHOL +929 0x7FFF //TX_MICMUTE_B_POST_FLT_ECHOH +930 0x0400 //TX_MICMUTE_C_POST_FLT_MASK +931 0x7999 //TX_MICMUTE_RATIODTL_CUT_TH +932 0x0258 //TX_MICMUTE_DT_CUT_K1 +933 0x0800 //TX_MICMUTE_N2_SN_EST +934 0xFC00 //TX_MICMUTE_THR_SN_EST_0 +935 0x001C //TX_MICMUTE_MIN_G_CTRL_0 +936 0x6000 //TX_MICMUTE_A_POST_FILT_S_0 +937 0x7000 //TX_MICMUTE_B_POST_FILT_0 +938 0x2710 //TX_MIC1RUB_AMP_THR +939 0x0010 //TX_MIC1MUTE_RATIO_THR +940 0x0450 //TX_MIC1MUTE_AMP_THR +941 0x0008 //TX_MIC1MUTE_CVG_TIME +942 0x0008 //TX_MIC1MUTE_RELEASE_TIME +943 0x0000 //TX_AMS_RESRV_01 +944 0x0000 //TX_AMS_RESRV_02 +945 0x0000 //TX_AMS_RESRV_03 +946 0x0000 //TX_AMS_RESRV_04 +947 0x0000 //TX_AMS_RESRV_05 +948 0x0000 //TX_AMS_RESRV_06 +949 0x0000 //TX_AMS_RESRV_07 +950 0x0000 //TX_AMS_RESRV_08 +951 0x0000 //TX_AMS_RESRV_09 +952 0x0000 //TX_AMS_RESRV_10 +953 0x0000 //TX_AMS_RESRV_11 +954 0x0000 //TX_AMS_RESRV_12 +955 0x0000 //TX_AMS_RESRV_13 +956 0x0000 //TX_AMS_RESRV_14 +957 0x0000 //TX_AMS_RESRV_15 +958 0x0000 //TX_AMS_RESRV_16 +959 0x0000 //TX_AMS_RESRV_17 +960 0x0000 //TX_AMS_RESRV_18 +961 0x0000 //TX_AMS_RESRV_19 #RX -0 0x003C //RX_RECVFUNC_MODE_0 +0 0x203C //RX_RECVFUNC_MODE_0 1 0x0000 //RX_RECVFUNC_MODE_1 2 0x0000 //RX_SAMPLINGFREQ_SIG 3 0x0000 //RX_SAMPLINGFREQ_PROC @@ -20198,7 +30351,7 @@ 7 0x1000 //RX_TDDRC_ALPHA_UP_2 8 0x1000 //RX_TDDRC_ALPHA_UP_3 9 0x1000 //RX_TDDRC_ALPHA_UP_4 -10 0x0600 //RX_PGA +10 0x050E //RX_PGA 11 0x7FFF //RX_A_HP 12 0x4000 //RX_B_PE 13 0x7800 //RX_THR_PITCH_DET_0 @@ -20227,16 +30380,16 @@ 36 0x0000 //RX_LMT_THRD 37 0x4000 //RX_LMT_ALPHA 38 0x0014 //RX_FDEQ_SUBNUM -39 0x4840 //RX_FDEQ_GAIN_0 -40 0x3E3E //RX_FDEQ_GAIN_1 -41 0x484D //RX_FDEQ_GAIN_2 -42 0x5E72 //RX_FDEQ_GAIN_3 -43 0x818E //RX_FDEQ_GAIN_4 -44 0x7E75 //RX_FDEQ_GAIN_5 -45 0x7067 //RX_FDEQ_GAIN_6 -46 0x6774 //RX_FDEQ_GAIN_7 -47 0x6F72 //RX_FDEQ_GAIN_8 -48 0x7A7E //RX_FDEQ_GAIN_9 +39 0x483A //RX_FDEQ_GAIN_0 +40 0x3A3A //RX_FDEQ_GAIN_1 +41 0x4A58 //RX_FDEQ_GAIN_2 +42 0x5E6E //RX_FDEQ_GAIN_3 +43 0x7A84 //RX_FDEQ_GAIN_4 +44 0x7C7A //RX_FDEQ_GAIN_5 +45 0x7C78 //RX_FDEQ_GAIN_6 +46 0x7978 //RX_FDEQ_GAIN_7 +47 0x7A7E //RX_FDEQ_GAIN_8 +48 0x7C80 //RX_FDEQ_GAIN_9 49 0x4848 //RX_FDEQ_GAIN_10 50 0x4848 //RX_FDEQ_GAIN_11 51 0x4848 //RX_FDEQ_GAIN_12 @@ -20252,8 +30405,8 @@ 61 0x4848 //RX_FDEQ_GAIN_22 62 0x4848 //RX_FDEQ_GAIN_23 63 0x0202 //RX_FDEQ_BIN_0 -64 0x0203 //RX_FDEQ_BIN_1 -65 0x0303 //RX_FDEQ_BIN_2 +64 0x0204 //RX_FDEQ_BIN_1 +65 0x0203 //RX_FDEQ_BIN_2 66 0x0304 //RX_FDEQ_BIN_3 67 0x0405 //RX_FDEQ_BIN_4 68 0x0506 //RX_FDEQ_BIN_5 @@ -20304,20 +30457,20 @@ 113 0x0000 //RX_TDDRC_THRD_1 114 0x1800 //RX_TDDRC_THRD_2 115 0x1800 //RX_TDDRC_THRD_3 -116 0x3000 //RX_TDDRC_SLANT_0 -117 0x6E00 //RX_TDDRC_SLANT_1 +116 0x7FFF //RX_TDDRC_SLANT_0 +117 0x7FFF //RX_TDDRC_SLANT_1 118 0x1000 //RX_TDDRC_ALPHA_UP_0 119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 120 0x0000 //RX_TDDRC_HMNC_FLAG 121 0x199A //RX_TDDRC_HMNC_GAIN 122 0x0001 //RX_TDDRC_SMT_FLAG 123 0x0CCD //RX_TDDRC_SMT_W -124 0x0313 //RX_TDDRC_DRC_GAIN +124 0x06EC //RX_TDDRC_DRC_GAIN 125 0x7C00 //RX_LAMBDA_PKA_FP 126 0x13E0 //RX_TPKA_FP 127 0x0080 //RX_MIN_G_FP 128 0x2000 //RX_MAX_G_FP -129 0x000E //RX_SPK_VOL +129 0x000A //RX_SPK_VOL 130 0x0000 //RX_VOL_RESRV_0 131 0x0000 //RX_MAXLEVEL_CNG 132 0x3000 //RX_BWE_UV_TH @@ -20360,26 +30513,26 @@ 113 0x0000 //RX_TDDRC_THRD_1 114 0x1800 //RX_TDDRC_THRD_2 115 0x1800 //RX_TDDRC_THRD_3 -116 0x3000 //RX_TDDRC_SLANT_0 -117 0x6E00 //RX_TDDRC_SLANT_1 +116 0x7FFF //RX_TDDRC_SLANT_0 +117 0x7FFF //RX_TDDRC_SLANT_1 118 0x1000 //RX_TDDRC_ALPHA_UP_0 119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 120 0x0000 //RX_TDDRC_HMNC_FLAG 121 0x199A //RX_TDDRC_HMNC_GAIN 122 0x0001 //RX_TDDRC_SMT_FLAG 123 0x0CCD //RX_TDDRC_SMT_W -124 0x0313 //RX_TDDRC_DRC_GAIN +124 0x06EC //RX_TDDRC_DRC_GAIN 38 0x0014 //RX_FDEQ_SUBNUM -39 0x4840 //RX_FDEQ_GAIN_0 -40 0x3E3E //RX_FDEQ_GAIN_1 -41 0x484D //RX_FDEQ_GAIN_2 -42 0x5E72 //RX_FDEQ_GAIN_3 -43 0x818E //RX_FDEQ_GAIN_4 -44 0x7E75 //RX_FDEQ_GAIN_5 -45 0x7067 //RX_FDEQ_GAIN_6 -46 0x6774 //RX_FDEQ_GAIN_7 -47 0x6F72 //RX_FDEQ_GAIN_8 -48 0x7A7E //RX_FDEQ_GAIN_9 +39 0x483A //RX_FDEQ_GAIN_0 +40 0x3A3A //RX_FDEQ_GAIN_1 +41 0x4A58 //RX_FDEQ_GAIN_2 +42 0x5E6E //RX_FDEQ_GAIN_3 +43 0x7A84 //RX_FDEQ_GAIN_4 +44 0x7C7A //RX_FDEQ_GAIN_5 +45 0x7C78 //RX_FDEQ_GAIN_6 +46 0x7978 //RX_FDEQ_GAIN_7 +47 0x7A7E //RX_FDEQ_GAIN_8 +48 0x7C80 //RX_FDEQ_GAIN_9 49 0x4848 //RX_FDEQ_GAIN_10 50 0x4848 //RX_FDEQ_GAIN_11 51 0x4848 //RX_FDEQ_GAIN_12 @@ -20395,8 +30548,8 @@ 61 0x4848 //RX_FDEQ_GAIN_22 62 0x4848 //RX_FDEQ_GAIN_23 63 0x0202 //RX_FDEQ_BIN_0 -64 0x0203 //RX_FDEQ_BIN_1 -65 0x0303 //RX_FDEQ_BIN_2 +64 0x0204 //RX_FDEQ_BIN_1 +65 0x0203 //RX_FDEQ_BIN_2 66 0x0304 //RX_FDEQ_BIN_3 67 0x0405 //RX_FDEQ_BIN_4 68 0x0506 //RX_FDEQ_BIN_5 @@ -20442,7 +30595,7 @@ 108 0x5333 //RX_FDDRC_SLANT_1_2 109 0x5333 //RX_FDDRC_SLANT_1_3 110 0x0000 //RX_FDDRC_RESRV_0 -129 0x000E //RX_SPK_VOL +129 0x000A //RX_SPK_VOL 130 0x0000 //RX_VOL_RESRV_0 #VOL 1 6 0x1000 //RX_TDDRC_ALPHA_UP_1 @@ -20459,26 +30612,26 @@ 113 0x0000 //RX_TDDRC_THRD_1 114 0x1800 //RX_TDDRC_THRD_2 115 0x1800 //RX_TDDRC_THRD_3 -116 0x3000 //RX_TDDRC_SLANT_0 -117 0x6E00 //RX_TDDRC_SLANT_1 +116 0x7FFF //RX_TDDRC_SLANT_0 +117 0x7FFF //RX_TDDRC_SLANT_1 118 0x1000 //RX_TDDRC_ALPHA_UP_0 119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 120 0x0000 //RX_TDDRC_HMNC_FLAG 121 0x199A //RX_TDDRC_HMNC_GAIN 122 0x0001 //RX_TDDRC_SMT_FLAG 123 0x0CCD //RX_TDDRC_SMT_W -124 0x02F8 //RX_TDDRC_DRC_GAIN +124 0x06EC //RX_TDDRC_DRC_GAIN 38 0x0014 //RX_FDEQ_SUBNUM -39 0x4840 //RX_FDEQ_GAIN_0 -40 0x3E3E //RX_FDEQ_GAIN_1 -41 0x484D //RX_FDEQ_GAIN_2 -42 0x5E72 //RX_FDEQ_GAIN_3 -43 0x818E //RX_FDEQ_GAIN_4 -44 0x7E75 //RX_FDEQ_GAIN_5 -45 0x7067 //RX_FDEQ_GAIN_6 -46 0x6774 //RX_FDEQ_GAIN_7 -47 0x6F72 //RX_FDEQ_GAIN_8 -48 0x7A7E //RX_FDEQ_GAIN_9 +39 0x483A //RX_FDEQ_GAIN_0 +40 0x3A3A //RX_FDEQ_GAIN_1 +41 0x4A58 //RX_FDEQ_GAIN_2 +42 0x5E6E //RX_FDEQ_GAIN_3 +43 0x7A84 //RX_FDEQ_GAIN_4 +44 0x7C7A //RX_FDEQ_GAIN_5 +45 0x7C78 //RX_FDEQ_GAIN_6 +46 0x7978 //RX_FDEQ_GAIN_7 +47 0x7A7E //RX_FDEQ_GAIN_8 +48 0x7C80 //RX_FDEQ_GAIN_9 49 0x4848 //RX_FDEQ_GAIN_10 50 0x4848 //RX_FDEQ_GAIN_11 51 0x4848 //RX_FDEQ_GAIN_12 @@ -20494,8 +30647,8 @@ 61 0x4848 //RX_FDEQ_GAIN_22 62 0x4848 //RX_FDEQ_GAIN_23 63 0x0202 //RX_FDEQ_BIN_0 -64 0x0203 //RX_FDEQ_BIN_1 -65 0x0303 //RX_FDEQ_BIN_2 +64 0x0204 //RX_FDEQ_BIN_1 +65 0x0203 //RX_FDEQ_BIN_2 66 0x0304 //RX_FDEQ_BIN_3 67 0x0405 //RX_FDEQ_BIN_4 68 0x0506 //RX_FDEQ_BIN_5 @@ -20541,7 +30694,7 @@ 108 0x5333 //RX_FDDRC_SLANT_1_2 109 0x5333 //RX_FDDRC_SLANT_1_3 110 0x0000 //RX_FDDRC_RESRV_0 -129 0x0017 //RX_SPK_VOL +129 0x0010 //RX_SPK_VOL 130 0x0000 //RX_VOL_RESRV_0 #VOL 2 6 0x1000 //RX_TDDRC_ALPHA_UP_1 @@ -20558,26 +30711,26 @@ 113 0x0000 //RX_TDDRC_THRD_1 114 0x1800 //RX_TDDRC_THRD_2 115 0x1800 //RX_TDDRC_THRD_3 -116 0x3000 //RX_TDDRC_SLANT_0 -117 0x6E00 //RX_TDDRC_SLANT_1 +116 0x7FFF //RX_TDDRC_SLANT_0 +117 0x7FFF //RX_TDDRC_SLANT_1 118 0x1000 //RX_TDDRC_ALPHA_UP_0 119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 120 0x0000 //RX_TDDRC_HMNC_FLAG 121 0x199A //RX_TDDRC_HMNC_GAIN 122 0x0001 //RX_TDDRC_SMT_FLAG 123 0x0CCD //RX_TDDRC_SMT_W -124 0x02EC //RX_TDDRC_DRC_GAIN +124 0x06EC //RX_TDDRC_DRC_GAIN 38 0x0014 //RX_FDEQ_SUBNUM -39 0x4840 //RX_FDEQ_GAIN_0 -40 0x3E3E //RX_FDEQ_GAIN_1 -41 0x484D //RX_FDEQ_GAIN_2 -42 0x5E72 //RX_FDEQ_GAIN_3 -43 0x818E //RX_FDEQ_GAIN_4 -44 0x7E75 //RX_FDEQ_GAIN_5 -45 0x7067 //RX_FDEQ_GAIN_6 -46 0x6774 //RX_FDEQ_GAIN_7 -47 0x6F72 //RX_FDEQ_GAIN_8 -48 0x7A7E //RX_FDEQ_GAIN_9 +39 0x483A //RX_FDEQ_GAIN_0 +40 0x3A3A //RX_FDEQ_GAIN_1 +41 0x4A58 //RX_FDEQ_GAIN_2 +42 0x5E6E //RX_FDEQ_GAIN_3 +43 0x7A84 //RX_FDEQ_GAIN_4 +44 0x7C7A //RX_FDEQ_GAIN_5 +45 0x7C78 //RX_FDEQ_GAIN_6 +46 0x7978 //RX_FDEQ_GAIN_7 +47 0x7A7E //RX_FDEQ_GAIN_8 +48 0x7C80 //RX_FDEQ_GAIN_9 49 0x4848 //RX_FDEQ_GAIN_10 50 0x4848 //RX_FDEQ_GAIN_11 51 0x4848 //RX_FDEQ_GAIN_12 @@ -20593,8 +30746,8 @@ 61 0x4848 //RX_FDEQ_GAIN_22 62 0x4848 //RX_FDEQ_GAIN_23 63 0x0202 //RX_FDEQ_BIN_0 -64 0x0203 //RX_FDEQ_BIN_1 -65 0x0303 //RX_FDEQ_BIN_2 +64 0x0204 //RX_FDEQ_BIN_1 +65 0x0203 //RX_FDEQ_BIN_2 66 0x0304 //RX_FDEQ_BIN_3 67 0x0405 //RX_FDEQ_BIN_4 68 0x0506 //RX_FDEQ_BIN_5 @@ -20640,7 +30793,7 @@ 108 0x5333 //RX_FDDRC_SLANT_1_2 109 0x5333 //RX_FDDRC_SLANT_1_3 110 0x0000 //RX_FDDRC_RESRV_0 -129 0x0026 //RX_SPK_VOL +129 0x001A //RX_SPK_VOL 130 0x0000 //RX_VOL_RESRV_0 #VOL 3 6 0x1000 //RX_TDDRC_ALPHA_UP_1 @@ -20657,26 +30810,26 @@ 113 0x0000 //RX_TDDRC_THRD_1 114 0x1800 //RX_TDDRC_THRD_2 115 0x1800 //RX_TDDRC_THRD_3 -116 0x3000 //RX_TDDRC_SLANT_0 -117 0x6E00 //RX_TDDRC_SLANT_1 +116 0x7FFF //RX_TDDRC_SLANT_0 +117 0x7FFF //RX_TDDRC_SLANT_1 118 0x1000 //RX_TDDRC_ALPHA_UP_0 119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 120 0x0000 //RX_TDDRC_HMNC_FLAG 121 0x199A //RX_TDDRC_HMNC_GAIN 122 0x0001 //RX_TDDRC_SMT_FLAG 123 0x0CCD //RX_TDDRC_SMT_W -124 0x02EC //RX_TDDRC_DRC_GAIN +124 0x06EC //RX_TDDRC_DRC_GAIN 38 0x0014 //RX_FDEQ_SUBNUM -39 0x4840 //RX_FDEQ_GAIN_0 -40 0x3E3E //RX_FDEQ_GAIN_1 -41 0x484D //RX_FDEQ_GAIN_2 -42 0x5E72 //RX_FDEQ_GAIN_3 -43 0x818E //RX_FDEQ_GAIN_4 -44 0x7E75 //RX_FDEQ_GAIN_5 -45 0x7067 //RX_FDEQ_GAIN_6 -46 0x6774 //RX_FDEQ_GAIN_7 -47 0x6F72 //RX_FDEQ_GAIN_8 -48 0x7A7E //RX_FDEQ_GAIN_9 +39 0x483A //RX_FDEQ_GAIN_0 +40 0x3A3A //RX_FDEQ_GAIN_1 +41 0x4A58 //RX_FDEQ_GAIN_2 +42 0x5E6E //RX_FDEQ_GAIN_3 +43 0x7A84 //RX_FDEQ_GAIN_4 +44 0x7C7A //RX_FDEQ_GAIN_5 +45 0x7C78 //RX_FDEQ_GAIN_6 +46 0x7978 //RX_FDEQ_GAIN_7 +47 0x7A7E //RX_FDEQ_GAIN_8 +48 0x7C80 //RX_FDEQ_GAIN_9 49 0x4848 //RX_FDEQ_GAIN_10 50 0x4848 //RX_FDEQ_GAIN_11 51 0x4848 //RX_FDEQ_GAIN_12 @@ -20692,8 +30845,8 @@ 61 0x4848 //RX_FDEQ_GAIN_22 62 0x4848 //RX_FDEQ_GAIN_23 63 0x0202 //RX_FDEQ_BIN_0 -64 0x0203 //RX_FDEQ_BIN_1 -65 0x0303 //RX_FDEQ_BIN_2 +64 0x0204 //RX_FDEQ_BIN_1 +65 0x0203 //RX_FDEQ_BIN_2 66 0x0304 //RX_FDEQ_BIN_3 67 0x0405 //RX_FDEQ_BIN_4 68 0x0506 //RX_FDEQ_BIN_5 @@ -20739,7 +30892,7 @@ 108 0x5333 //RX_FDDRC_SLANT_1_2 109 0x5333 //RX_FDDRC_SLANT_1_3 110 0x0000 //RX_FDDRC_RESRV_0 -129 0x003D //RX_SPK_VOL +129 0x002E //RX_SPK_VOL 130 0x0000 //RX_VOL_RESRV_0 #VOL 4 6 0x1000 //RX_TDDRC_ALPHA_UP_1 @@ -20756,26 +30909,26 @@ 113 0x0000 //RX_TDDRC_THRD_1 114 0x1800 //RX_TDDRC_THRD_2 115 0x1800 //RX_TDDRC_THRD_3 -116 0x3000 //RX_TDDRC_SLANT_0 -117 0x6E00 //RX_TDDRC_SLANT_1 +116 0x7FFF //RX_TDDRC_SLANT_0 +117 0x7FFF //RX_TDDRC_SLANT_1 118 0x1000 //RX_TDDRC_ALPHA_UP_0 119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 120 0x0000 //RX_TDDRC_HMNC_FLAG 121 0x199A //RX_TDDRC_HMNC_GAIN 122 0x0001 //RX_TDDRC_SMT_FLAG 123 0x0CCD //RX_TDDRC_SMT_W -124 0x02EC //RX_TDDRC_DRC_GAIN +124 0x06EC //RX_TDDRC_DRC_GAIN 38 0x0014 //RX_FDEQ_SUBNUM -39 0x4840 //RX_FDEQ_GAIN_0 -40 0x3E3E //RX_FDEQ_GAIN_1 -41 0x484D //RX_FDEQ_GAIN_2 -42 0x5E72 //RX_FDEQ_GAIN_3 -43 0x818E //RX_FDEQ_GAIN_4 -44 0x7E75 //RX_FDEQ_GAIN_5 -45 0x7067 //RX_FDEQ_GAIN_6 -46 0x6774 //RX_FDEQ_GAIN_7 -47 0x6F72 //RX_FDEQ_GAIN_8 -48 0x7A7E //RX_FDEQ_GAIN_9 +39 0x483A //RX_FDEQ_GAIN_0 +40 0x3A3A //RX_FDEQ_GAIN_1 +41 0x4A58 //RX_FDEQ_GAIN_2 +42 0x5E6E //RX_FDEQ_GAIN_3 +43 0x7A84 //RX_FDEQ_GAIN_4 +44 0x7C7A //RX_FDEQ_GAIN_5 +45 0x7C78 //RX_FDEQ_GAIN_6 +46 0x7978 //RX_FDEQ_GAIN_7 +47 0x7A7E //RX_FDEQ_GAIN_8 +48 0x7C80 //RX_FDEQ_GAIN_9 49 0x4848 //RX_FDEQ_GAIN_10 50 0x4848 //RX_FDEQ_GAIN_11 51 0x4848 //RX_FDEQ_GAIN_12 @@ -20791,8 +30944,8 @@ 61 0x4848 //RX_FDEQ_GAIN_22 62 0x4848 //RX_FDEQ_GAIN_23 63 0x0202 //RX_FDEQ_BIN_0 -64 0x0203 //RX_FDEQ_BIN_1 -65 0x0303 //RX_FDEQ_BIN_2 +64 0x0204 //RX_FDEQ_BIN_1 +65 0x0203 //RX_FDEQ_BIN_2 66 0x0304 //RX_FDEQ_BIN_3 67 0x0405 //RX_FDEQ_BIN_4 68 0x0506 //RX_FDEQ_BIN_5 @@ -20838,7 +30991,7 @@ 108 0x5333 //RX_FDDRC_SLANT_1_2 109 0x5333 //RX_FDDRC_SLANT_1_3 110 0x0000 //RX_FDDRC_RESRV_0 -129 0x0061 //RX_SPK_VOL +129 0x0045 //RX_SPK_VOL 130 0x0000 //RX_VOL_RESRV_0 #VOL 5 6 0x1000 //RX_TDDRC_ALPHA_UP_1 @@ -20855,26 +31008,26 @@ 113 0x0000 //RX_TDDRC_THRD_1 114 0x1800 //RX_TDDRC_THRD_2 115 0x1800 //RX_TDDRC_THRD_3 -116 0x3000 //RX_TDDRC_SLANT_0 -117 0x6E00 //RX_TDDRC_SLANT_1 +116 0x7FFF //RX_TDDRC_SLANT_0 +117 0x7FFF //RX_TDDRC_SLANT_1 118 0x1000 //RX_TDDRC_ALPHA_UP_0 119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 120 0x0000 //RX_TDDRC_HMNC_FLAG 121 0x199A //RX_TDDRC_HMNC_GAIN 122 0x0001 //RX_TDDRC_SMT_FLAG 123 0x0CCD //RX_TDDRC_SMT_W -124 0x02EC //RX_TDDRC_DRC_GAIN +124 0x06EC //RX_TDDRC_DRC_GAIN 38 0x0014 //RX_FDEQ_SUBNUM -39 0x4840 //RX_FDEQ_GAIN_0 -40 0x3E3E //RX_FDEQ_GAIN_1 -41 0x484D //RX_FDEQ_GAIN_2 -42 0x5E72 //RX_FDEQ_GAIN_3 -43 0x818E //RX_FDEQ_GAIN_4 -44 0x7E75 //RX_FDEQ_GAIN_5 -45 0x7067 //RX_FDEQ_GAIN_6 -46 0x6774 //RX_FDEQ_GAIN_7 -47 0x6F72 //RX_FDEQ_GAIN_8 -48 0x7A7E //RX_FDEQ_GAIN_9 +39 0x483A //RX_FDEQ_GAIN_0 +40 0x3A3A //RX_FDEQ_GAIN_1 +41 0x4A58 //RX_FDEQ_GAIN_2 +42 0x5E6E //RX_FDEQ_GAIN_3 +43 0x7A84 //RX_FDEQ_GAIN_4 +44 0x7C7A //RX_FDEQ_GAIN_5 +45 0x7C78 //RX_FDEQ_GAIN_6 +46 0x7978 //RX_FDEQ_GAIN_7 +47 0x7A7E //RX_FDEQ_GAIN_8 +48 0x7C80 //RX_FDEQ_GAIN_9 49 0x4848 //RX_FDEQ_GAIN_10 50 0x4848 //RX_FDEQ_GAIN_11 51 0x4848 //RX_FDEQ_GAIN_12 @@ -20890,8 +31043,8 @@ 61 0x4848 //RX_FDEQ_GAIN_22 62 0x4848 //RX_FDEQ_GAIN_23 63 0x0202 //RX_FDEQ_BIN_0 -64 0x0203 //RX_FDEQ_BIN_1 -65 0x0303 //RX_FDEQ_BIN_2 +64 0x0204 //RX_FDEQ_BIN_1 +65 0x0203 //RX_FDEQ_BIN_2 66 0x0304 //RX_FDEQ_BIN_3 67 0x0405 //RX_FDEQ_BIN_4 68 0x0506 //RX_FDEQ_BIN_5 @@ -20937,7 +31090,7 @@ 108 0x5333 //RX_FDDRC_SLANT_1_2 109 0x5333 //RX_FDDRC_SLANT_1_3 110 0x0000 //RX_FDDRC_RESRV_0 -129 0x009B //RX_SPK_VOL +129 0x0074 //RX_SPK_VOL 130 0x0000 //RX_VOL_RESRV_0 #VOL 6 6 0x1000 //RX_TDDRC_ALPHA_UP_1 @@ -20954,26 +31107,26 @@ 113 0x0000 //RX_TDDRC_THRD_1 114 0x1800 //RX_TDDRC_THRD_2 115 0x1800 //RX_TDDRC_THRD_3 -116 0x3000 //RX_TDDRC_SLANT_0 -117 0x6E00 //RX_TDDRC_SLANT_1 +116 0x7FFF //RX_TDDRC_SLANT_0 +117 0x7FFF //RX_TDDRC_SLANT_1 118 0x1000 //RX_TDDRC_ALPHA_UP_0 119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 120 0x0000 //RX_TDDRC_HMNC_FLAG 121 0x199A //RX_TDDRC_HMNC_GAIN 122 0x0001 //RX_TDDRC_SMT_FLAG 123 0x0CCD //RX_TDDRC_SMT_W -124 0x02EC //RX_TDDRC_DRC_GAIN +124 0x06EC //RX_TDDRC_DRC_GAIN 38 0x0014 //RX_FDEQ_SUBNUM -39 0x4840 //RX_FDEQ_GAIN_0 -40 0x3E3E //RX_FDEQ_GAIN_1 -41 0x484D //RX_FDEQ_GAIN_2 -42 0x5E72 //RX_FDEQ_GAIN_3 -43 0x818E //RX_FDEQ_GAIN_4 -44 0x7E75 //RX_FDEQ_GAIN_5 -45 0x7067 //RX_FDEQ_GAIN_6 -46 0x6774 //RX_FDEQ_GAIN_7 -47 0x6F72 //RX_FDEQ_GAIN_8 -48 0x7A7E //RX_FDEQ_GAIN_9 +39 0x483A //RX_FDEQ_GAIN_0 +40 0x3A3A //RX_FDEQ_GAIN_1 +41 0x4A58 //RX_FDEQ_GAIN_2 +42 0x5E6E //RX_FDEQ_GAIN_3 +43 0x7A84 //RX_FDEQ_GAIN_4 +44 0x7C7A //RX_FDEQ_GAIN_5 +45 0x7C78 //RX_FDEQ_GAIN_6 +46 0x7978 //RX_FDEQ_GAIN_7 +47 0x7A7E //RX_FDEQ_GAIN_8 +48 0x7C80 //RX_FDEQ_GAIN_9 49 0x4848 //RX_FDEQ_GAIN_10 50 0x4848 //RX_FDEQ_GAIN_11 51 0x4848 //RX_FDEQ_GAIN_12 @@ -20989,8 +31142,8 @@ 61 0x4848 //RX_FDEQ_GAIN_22 62 0x4848 //RX_FDEQ_GAIN_23 63 0x0202 //RX_FDEQ_BIN_0 -64 0x0203 //RX_FDEQ_BIN_1 -65 0x0303 //RX_FDEQ_BIN_2 +64 0x0204 //RX_FDEQ_BIN_1 +65 0x0203 //RX_FDEQ_BIN_2 66 0x0304 //RX_FDEQ_BIN_3 67 0x0405 //RX_FDEQ_BIN_4 68 0x0506 //RX_FDEQ_BIN_5 @@ -21038,10 +31191,862 @@ 110 0x0000 //RX_FDDRC_RESRV_0 129 0x0100 //RX_SPK_VOL 130 0x0000 //RX_VOL_RESRV_0 +#RX 2 +157 0x003C //RX_RECVFUNC_MODE_0 +158 0x0000 //RX_RECVFUNC_MODE_1 +159 0x0000 //RX_SAMPLINGFREQ_SIG +160 0x0000 //RX_SAMPLINGFREQ_PROC +161 0x000A //RX_FRAME_SZ +162 0x0000 //RX_DELAY_OPT +163 0x1000 //RX_TDDRC_ALPHA_UP_1 +164 0x1000 //RX_TDDRC_ALPHA_UP_2 +165 0x1000 //RX_TDDRC_ALPHA_UP_3 +166 0x1000 //RX_TDDRC_ALPHA_UP_4 +167 0x0600 //RX_PGA +168 0x7FFF //RX_A_HP +169 0x4000 //RX_B_PE +170 0x7800 //RX_THR_PITCH_DET_0 +171 0x7000 //RX_THR_PITCH_DET_1 +172 0x6000 //RX_THR_PITCH_DET_2 +173 0x0008 //RX_PITCH_BFR_LEN +174 0x0003 //RX_SBD_PITCH_DET +175 0x0100 //RX_PP_RESRV_0 +176 0x0020 //RX_PP_RESRV_1 +177 0x0400 //RX_N_SN_EST +178 0x000C //RX_N2_SN_EST +179 0x0014 //RX_NS_LVL_CTRL +180 0xF800 //RX_THR_SN_EST +181 0x7E00 //RX_LAMBDA_PFILT +182 0x000A //RX_FENS_RESRV_0 +183 0x0190 //RX_FENS_RESRV_1 +184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +187 0x0002 //RX_EXTRA_NS_L +188 0x0800 //RX_EXTRA_NS_A +189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +190 0x7000 //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +192 0x199A //RX_A_POST_FLT +193 0x0000 //RX_LMT_THRD +194 0x4000 //RX_LMT_ALPHA +195 0x0014 //RX_FDEQ_SUBNUM +196 0x4840 //RX_FDEQ_GAIN_0 +197 0x3E3E //RX_FDEQ_GAIN_1 +198 0x4E62 //RX_FDEQ_GAIN_2 +199 0x6C7A //RX_FDEQ_GAIN_3 +200 0x8690 //RX_FDEQ_GAIN_4 +201 0x867E //RX_FDEQ_GAIN_5 +202 0x7E7E //RX_FDEQ_GAIN_6 +203 0x8080 //RX_FDEQ_GAIN_7 +204 0x8088 //RX_FDEQ_GAIN_8 +205 0x838B //RX_FDEQ_GAIN_9 +206 0x4848 //RX_FDEQ_GAIN_10 +207 0x4848 //RX_FDEQ_GAIN_11 +208 0x4848 //RX_FDEQ_GAIN_12 +209 0x4848 //RX_FDEQ_GAIN_13 +210 0x4848 //RX_FDEQ_GAIN_14 +211 0x4848 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0202 //RX_FDEQ_BIN_0 +221 0x0203 //RX_FDEQ_BIN_1 +222 0x0303 //RX_FDEQ_BIN_2 +223 0x0304 //RX_FDEQ_BIN_3 +224 0x0405 //RX_FDEQ_BIN_4 +225 0x0506 //RX_FDEQ_BIN_5 +226 0x0708 //RX_FDEQ_BIN_6 +227 0x090A //RX_FDEQ_BIN_7 +228 0x0B0C //RX_FDEQ_BIN_8 +229 0x0D08 //RX_FDEQ_BIN_9 +230 0x0000 //RX_FDEQ_BIN_10 +231 0x0000 //RX_FDEQ_BIN_11 +232 0x0000 //RX_FDEQ_BIN_12 +233 0x0000 //RX_FDEQ_BIN_13 +234 0x0000 //RX_FDEQ_BIN_14 +235 0x0000 //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x4000 //RX_FDEQ_RESRV_0 +245 0x0320 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0030 //RX_FDDRC_BAND_MARGIN_1 +248 0x0050 //RX_FDDRC_BAND_MARGIN_2 +249 0x0080 //RX_FDDRC_BAND_MARGIN_3 +250 0x0007 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x5000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x6400 //RX_FDDRC_THRD_3_2 +258 0x6400 //RX_FDDRC_THRD_3_3 +259 0x2000 //RX_FDDRC_SLANT_0_0 +260 0x2000 //RX_FDDRC_SLANT_0_1 +261 0x2000 //RX_FDDRC_SLANT_0_2 +262 0x2000 //RX_FDDRC_SLANT_0_3 +263 0x5333 //RX_FDDRC_SLANT_1_0 +264 0x5333 //RX_FDDRC_SLANT_1_1 +265 0x5333 //RX_FDDRC_SLANT_1_2 +266 0x5333 //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +268 0x0002 //RX_FILTINDX +269 0x0000 //RX_TDDRC_THRD_0 +270 0x0000 //RX_TDDRC_THRD_1 +271 0x1800 //RX_TDDRC_THRD_2 +272 0x1800 //RX_TDDRC_THRD_3 +273 0x3000 //RX_TDDRC_SLANT_0 +274 0x6E00 //RX_TDDRC_SLANT_1 +275 0x1000 //RX_TDDRC_ALPHA_UP_0 +276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x199A //RX_TDDRC_HMNC_GAIN +279 0x0001 //RX_TDDRC_SMT_FLAG +280 0x0CCD //RX_TDDRC_SMT_W +281 0x05A0 //RX_TDDRC_DRC_GAIN +282 0x7C00 //RX_LAMBDA_PKA_FP +283 0x13E0 //RX_TPKA_FP +284 0x0080 //RX_MIN_G_FP +285 0x2000 //RX_MAX_G_FP +286 0x000A //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 +288 0x0000 //RX_MAXLEVEL_CNG +289 0x3000 //RX_BWE_UV_TH +290 0x3000 //RX_BWE_UV_TH2 +291 0x1800 //RX_BWE_UV_TH3 +292 0x1000 //RX_BWE_V_TH +293 0x04CD //RX_BWE_GAIN1_V_TH1 +294 0x0F33 //RX_BWE_GAIN1_V_TH2 +295 0x7333 //RX_BWE_UV_EQ +296 0x199A //RX_BWE_V_EQ +297 0x7333 //RX_BWE_TONE_TH +298 0x0004 //RX_BWE_UV_HOLD_T +299 0x6CCD //RX_BWE_GAIN2_ALPHA +300 0x799A //RX_BWE_GAIN3_ALPHA +301 0x001E //RX_BWE_CUTOFF +302 0x3000 //RX_BWE_GAINFILL +303 0x3200 //RX_BWE_MAXTH_TONE +304 0x2000 //RX_BWE_EQ_0 +305 0x2000 //RX_BWE_EQ_1 +306 0x2000 //RX_BWE_EQ_2 +307 0x2000 //RX_BWE_EQ_3 +308 0x2000 //RX_BWE_EQ_4 +309 0x2000 //RX_BWE_EQ_5 +310 0x2000 //RX_BWE_EQ_6 +311 0x0000 //RX_BWE_RESRV_0 +312 0x0000 //RX_BWE_RESRV_1 +313 0x0000 //RX_BWE_RESRV_2 +#VOL 0 +163 0x1000 //RX_TDDRC_ALPHA_UP_1 +164 0x1000 //RX_TDDRC_ALPHA_UP_2 +165 0x1000 //RX_TDDRC_ALPHA_UP_3 +166 0x1000 //RX_TDDRC_ALPHA_UP_4 +184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +190 0x7000 //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +269 0x0000 //RX_TDDRC_THRD_0 +270 0x0000 //RX_TDDRC_THRD_1 +271 0x1800 //RX_TDDRC_THRD_2 +272 0x1800 //RX_TDDRC_THRD_3 +273 0x3000 //RX_TDDRC_SLANT_0 +274 0x6E00 //RX_TDDRC_SLANT_1 +275 0x1000 //RX_TDDRC_ALPHA_UP_0 +276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x199A //RX_TDDRC_HMNC_GAIN +279 0x0001 //RX_TDDRC_SMT_FLAG +280 0x0CCD //RX_TDDRC_SMT_W +281 0x05A0 //RX_TDDRC_DRC_GAIN +195 0x0014 //RX_FDEQ_SUBNUM +196 0x4840 //RX_FDEQ_GAIN_0 +197 0x3E3E //RX_FDEQ_GAIN_1 +198 0x4E62 //RX_FDEQ_GAIN_2 +199 0x6C7A //RX_FDEQ_GAIN_3 +200 0x8690 //RX_FDEQ_GAIN_4 +201 0x867E //RX_FDEQ_GAIN_5 +202 0x7E7E //RX_FDEQ_GAIN_6 +203 0x8080 //RX_FDEQ_GAIN_7 +204 0x8088 //RX_FDEQ_GAIN_8 +205 0x838B //RX_FDEQ_GAIN_9 +206 0x4848 //RX_FDEQ_GAIN_10 +207 0x4848 //RX_FDEQ_GAIN_11 +208 0x4848 //RX_FDEQ_GAIN_12 +209 0x4848 //RX_FDEQ_GAIN_13 +210 0x4848 //RX_FDEQ_GAIN_14 +211 0x4848 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0202 //RX_FDEQ_BIN_0 +221 0x0203 //RX_FDEQ_BIN_1 +222 0x0303 //RX_FDEQ_BIN_2 +223 0x0304 //RX_FDEQ_BIN_3 +224 0x0405 //RX_FDEQ_BIN_4 +225 0x0506 //RX_FDEQ_BIN_5 +226 0x0708 //RX_FDEQ_BIN_6 +227 0x090A //RX_FDEQ_BIN_7 +228 0x0B0C //RX_FDEQ_BIN_8 +229 0x0D08 //RX_FDEQ_BIN_9 +230 0x0000 //RX_FDEQ_BIN_10 +231 0x0000 //RX_FDEQ_BIN_11 +232 0x0000 //RX_FDEQ_BIN_12 +233 0x0000 //RX_FDEQ_BIN_13 +234 0x0000 //RX_FDEQ_BIN_14 +235 0x0000 //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x4000 //RX_FDEQ_RESRV_0 +245 0x0320 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0030 //RX_FDDRC_BAND_MARGIN_1 +248 0x0050 //RX_FDDRC_BAND_MARGIN_2 +249 0x0080 //RX_FDDRC_BAND_MARGIN_3 +250 0x0007 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x5000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x6400 //RX_FDDRC_THRD_3_2 +258 0x6400 //RX_FDDRC_THRD_3_3 +259 0x2000 //RX_FDDRC_SLANT_0_0 +260 0x2000 //RX_FDDRC_SLANT_0_1 +261 0x2000 //RX_FDDRC_SLANT_0_2 +262 0x2000 //RX_FDDRC_SLANT_0_3 +263 0x5333 //RX_FDDRC_SLANT_1_0 +264 0x5333 //RX_FDDRC_SLANT_1_1 +265 0x5333 //RX_FDDRC_SLANT_1_2 +266 0x5333 //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +286 0x000A //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 +#VOL 1 +163 0x1000 //RX_TDDRC_ALPHA_UP_1 +164 0x1000 //RX_TDDRC_ALPHA_UP_2 +165 0x1000 //RX_TDDRC_ALPHA_UP_3 +166 0x1000 //RX_TDDRC_ALPHA_UP_4 +184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +190 0x7000 //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +269 0x0000 //RX_TDDRC_THRD_0 +270 0x0000 //RX_TDDRC_THRD_1 +271 0x1800 //RX_TDDRC_THRD_2 +272 0x1800 //RX_TDDRC_THRD_3 +273 0x3000 //RX_TDDRC_SLANT_0 +274 0x6E00 //RX_TDDRC_SLANT_1 +275 0x1000 //RX_TDDRC_ALPHA_UP_0 +276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x199A //RX_TDDRC_HMNC_GAIN +279 0x0001 //RX_TDDRC_SMT_FLAG +280 0x0CCD //RX_TDDRC_SMT_W +281 0x055F //RX_TDDRC_DRC_GAIN +195 0x0014 //RX_FDEQ_SUBNUM +196 0x4840 //RX_FDEQ_GAIN_0 +197 0x3E3E //RX_FDEQ_GAIN_1 +198 0x4E62 //RX_FDEQ_GAIN_2 +199 0x6C7A //RX_FDEQ_GAIN_3 +200 0x8690 //RX_FDEQ_GAIN_4 +201 0x867E //RX_FDEQ_GAIN_5 +202 0x7E7E //RX_FDEQ_GAIN_6 +203 0x8080 //RX_FDEQ_GAIN_7 +204 0x8088 //RX_FDEQ_GAIN_8 +205 0x838B //RX_FDEQ_GAIN_9 +206 0x4848 //RX_FDEQ_GAIN_10 +207 0x4848 //RX_FDEQ_GAIN_11 +208 0x4848 //RX_FDEQ_GAIN_12 +209 0x4848 //RX_FDEQ_GAIN_13 +210 0x4848 //RX_FDEQ_GAIN_14 +211 0x4848 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0202 //RX_FDEQ_BIN_0 +221 0x0203 //RX_FDEQ_BIN_1 +222 0x0303 //RX_FDEQ_BIN_2 +223 0x0304 //RX_FDEQ_BIN_3 +224 0x0405 //RX_FDEQ_BIN_4 +225 0x0506 //RX_FDEQ_BIN_5 +226 0x0708 //RX_FDEQ_BIN_6 +227 0x090A //RX_FDEQ_BIN_7 +228 0x0B0C //RX_FDEQ_BIN_8 +229 0x0D08 //RX_FDEQ_BIN_9 +230 0x0000 //RX_FDEQ_BIN_10 +231 0x0000 //RX_FDEQ_BIN_11 +232 0x0000 //RX_FDEQ_BIN_12 +233 0x0000 //RX_FDEQ_BIN_13 +234 0x0000 //RX_FDEQ_BIN_14 +235 0x0000 //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x4000 //RX_FDEQ_RESRV_0 +245 0x0320 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0030 //RX_FDDRC_BAND_MARGIN_1 +248 0x0050 //RX_FDDRC_BAND_MARGIN_2 +249 0x0080 //RX_FDDRC_BAND_MARGIN_3 +250 0x0007 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x5000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x6400 //RX_FDDRC_THRD_3_2 +258 0x6400 //RX_FDDRC_THRD_3_3 +259 0x2000 //RX_FDDRC_SLANT_0_0 +260 0x2000 //RX_FDDRC_SLANT_0_1 +261 0x2000 //RX_FDDRC_SLANT_0_2 +262 0x2000 //RX_FDDRC_SLANT_0_3 +263 0x5333 //RX_FDDRC_SLANT_1_0 +264 0x5333 //RX_FDDRC_SLANT_1_1 +265 0x5333 //RX_FDDRC_SLANT_1_2 +266 0x5333 //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +286 0x0011 //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 +#VOL 2 +163 0x1000 //RX_TDDRC_ALPHA_UP_1 +164 0x1000 //RX_TDDRC_ALPHA_UP_2 +165 0x1000 //RX_TDDRC_ALPHA_UP_3 +166 0x1000 //RX_TDDRC_ALPHA_UP_4 +184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +190 0x7000 //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +269 0x0000 //RX_TDDRC_THRD_0 +270 0x0000 //RX_TDDRC_THRD_1 +271 0x1800 //RX_TDDRC_THRD_2 +272 0x1800 //RX_TDDRC_THRD_3 +273 0x3000 //RX_TDDRC_SLANT_0 +274 0x6E00 //RX_TDDRC_SLANT_1 +275 0x1000 //RX_TDDRC_ALPHA_UP_0 +276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x199A //RX_TDDRC_HMNC_GAIN +279 0x0001 //RX_TDDRC_SMT_FLAG +280 0x0CCD //RX_TDDRC_SMT_W +281 0x055F //RX_TDDRC_DRC_GAIN +195 0x0014 //RX_FDEQ_SUBNUM +196 0x4840 //RX_FDEQ_GAIN_0 +197 0x3E3E //RX_FDEQ_GAIN_1 +198 0x4E62 //RX_FDEQ_GAIN_2 +199 0x6C7A //RX_FDEQ_GAIN_3 +200 0x8690 //RX_FDEQ_GAIN_4 +201 0x867E //RX_FDEQ_GAIN_5 +202 0x7E7E //RX_FDEQ_GAIN_6 +203 0x8080 //RX_FDEQ_GAIN_7 +204 0x8088 //RX_FDEQ_GAIN_8 +205 0x838B //RX_FDEQ_GAIN_9 +206 0x4848 //RX_FDEQ_GAIN_10 +207 0x4848 //RX_FDEQ_GAIN_11 +208 0x4848 //RX_FDEQ_GAIN_12 +209 0x4848 //RX_FDEQ_GAIN_13 +210 0x4848 //RX_FDEQ_GAIN_14 +211 0x4848 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0202 //RX_FDEQ_BIN_0 +221 0x0203 //RX_FDEQ_BIN_1 +222 0x0303 //RX_FDEQ_BIN_2 +223 0x0304 //RX_FDEQ_BIN_3 +224 0x0405 //RX_FDEQ_BIN_4 +225 0x0506 //RX_FDEQ_BIN_5 +226 0x0708 //RX_FDEQ_BIN_6 +227 0x090A //RX_FDEQ_BIN_7 +228 0x0B0C //RX_FDEQ_BIN_8 +229 0x0D08 //RX_FDEQ_BIN_9 +230 0x0000 //RX_FDEQ_BIN_10 +231 0x0000 //RX_FDEQ_BIN_11 +232 0x0000 //RX_FDEQ_BIN_12 +233 0x0000 //RX_FDEQ_BIN_13 +234 0x0000 //RX_FDEQ_BIN_14 +235 0x0000 //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x4000 //RX_FDEQ_RESRV_0 +245 0x0320 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0030 //RX_FDDRC_BAND_MARGIN_1 +248 0x0050 //RX_FDDRC_BAND_MARGIN_2 +249 0x0080 //RX_FDDRC_BAND_MARGIN_3 +250 0x0007 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x5000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x6400 //RX_FDDRC_THRD_3_2 +258 0x6400 //RX_FDDRC_THRD_3_3 +259 0x2000 //RX_FDDRC_SLANT_0_0 +260 0x2000 //RX_FDDRC_SLANT_0_1 +261 0x2000 //RX_FDDRC_SLANT_0_2 +262 0x2000 //RX_FDDRC_SLANT_0_3 +263 0x5333 //RX_FDDRC_SLANT_1_0 +264 0x5333 //RX_FDDRC_SLANT_1_1 +265 0x5333 //RX_FDDRC_SLANT_1_2 +266 0x5333 //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +286 0x001C //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 +#VOL 3 +163 0x1000 //RX_TDDRC_ALPHA_UP_1 +164 0x1000 //RX_TDDRC_ALPHA_UP_2 +165 0x1000 //RX_TDDRC_ALPHA_UP_3 +166 0x1000 //RX_TDDRC_ALPHA_UP_4 +184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +190 0x7000 //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +269 0x0000 //RX_TDDRC_THRD_0 +270 0x0000 //RX_TDDRC_THRD_1 +271 0x1800 //RX_TDDRC_THRD_2 +272 0x1800 //RX_TDDRC_THRD_3 +273 0x3000 //RX_TDDRC_SLANT_0 +274 0x6E00 //RX_TDDRC_SLANT_1 +275 0x1000 //RX_TDDRC_ALPHA_UP_0 +276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x199A //RX_TDDRC_HMNC_GAIN +279 0x0001 //RX_TDDRC_SMT_FLAG +280 0x0CCD //RX_TDDRC_SMT_W +281 0x055F //RX_TDDRC_DRC_GAIN +195 0x0014 //RX_FDEQ_SUBNUM +196 0x4840 //RX_FDEQ_GAIN_0 +197 0x3E3E //RX_FDEQ_GAIN_1 +198 0x4E62 //RX_FDEQ_GAIN_2 +199 0x6C7A //RX_FDEQ_GAIN_3 +200 0x8690 //RX_FDEQ_GAIN_4 +201 0x867E //RX_FDEQ_GAIN_5 +202 0x7E7E //RX_FDEQ_GAIN_6 +203 0x8080 //RX_FDEQ_GAIN_7 +204 0x8088 //RX_FDEQ_GAIN_8 +205 0x838B //RX_FDEQ_GAIN_9 +206 0x4848 //RX_FDEQ_GAIN_10 +207 0x4848 //RX_FDEQ_GAIN_11 +208 0x4848 //RX_FDEQ_GAIN_12 +209 0x4848 //RX_FDEQ_GAIN_13 +210 0x4848 //RX_FDEQ_GAIN_14 +211 0x4848 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0202 //RX_FDEQ_BIN_0 +221 0x0203 //RX_FDEQ_BIN_1 +222 0x0303 //RX_FDEQ_BIN_2 +223 0x0304 //RX_FDEQ_BIN_3 +224 0x0405 //RX_FDEQ_BIN_4 +225 0x0506 //RX_FDEQ_BIN_5 +226 0x0708 //RX_FDEQ_BIN_6 +227 0x090A //RX_FDEQ_BIN_7 +228 0x0B0C //RX_FDEQ_BIN_8 +229 0x0D08 //RX_FDEQ_BIN_9 +230 0x0000 //RX_FDEQ_BIN_10 +231 0x0000 //RX_FDEQ_BIN_11 +232 0x0000 //RX_FDEQ_BIN_12 +233 0x0000 //RX_FDEQ_BIN_13 +234 0x0000 //RX_FDEQ_BIN_14 +235 0x0000 //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x4000 //RX_FDEQ_RESRV_0 +245 0x0320 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0030 //RX_FDDRC_BAND_MARGIN_1 +248 0x0050 //RX_FDDRC_BAND_MARGIN_2 +249 0x0080 //RX_FDDRC_BAND_MARGIN_3 +250 0x0007 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x5000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x6400 //RX_FDDRC_THRD_3_2 +258 0x6400 //RX_FDDRC_THRD_3_3 +259 0x2000 //RX_FDDRC_SLANT_0_0 +260 0x2000 //RX_FDDRC_SLANT_0_1 +261 0x2000 //RX_FDDRC_SLANT_0_2 +262 0x2000 //RX_FDDRC_SLANT_0_3 +263 0x5333 //RX_FDDRC_SLANT_1_0 +264 0x5333 //RX_FDDRC_SLANT_1_1 +265 0x5333 //RX_FDDRC_SLANT_1_2 +266 0x5333 //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +286 0x002E //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 +#VOL 4 +163 0x1000 //RX_TDDRC_ALPHA_UP_1 +164 0x1000 //RX_TDDRC_ALPHA_UP_2 +165 0x1000 //RX_TDDRC_ALPHA_UP_3 +166 0x1000 //RX_TDDRC_ALPHA_UP_4 +184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +190 0x7000 //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +269 0x0000 //RX_TDDRC_THRD_0 +270 0x0000 //RX_TDDRC_THRD_1 +271 0x1800 //RX_TDDRC_THRD_2 +272 0x1800 //RX_TDDRC_THRD_3 +273 0x3000 //RX_TDDRC_SLANT_0 +274 0x6E00 //RX_TDDRC_SLANT_1 +275 0x1000 //RX_TDDRC_ALPHA_UP_0 +276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x199A //RX_TDDRC_HMNC_GAIN +279 0x0001 //RX_TDDRC_SMT_FLAG +280 0x0CCD //RX_TDDRC_SMT_W +281 0x055F //RX_TDDRC_DRC_GAIN +195 0x0014 //RX_FDEQ_SUBNUM +196 0x4840 //RX_FDEQ_GAIN_0 +197 0x3E3E //RX_FDEQ_GAIN_1 +198 0x4E62 //RX_FDEQ_GAIN_2 +199 0x6C7A //RX_FDEQ_GAIN_3 +200 0x8690 //RX_FDEQ_GAIN_4 +201 0x867E //RX_FDEQ_GAIN_5 +202 0x7E7E //RX_FDEQ_GAIN_6 +203 0x8080 //RX_FDEQ_GAIN_7 +204 0x8088 //RX_FDEQ_GAIN_8 +205 0x838B //RX_FDEQ_GAIN_9 +206 0x4848 //RX_FDEQ_GAIN_10 +207 0x4848 //RX_FDEQ_GAIN_11 +208 0x4848 //RX_FDEQ_GAIN_12 +209 0x4848 //RX_FDEQ_GAIN_13 +210 0x4848 //RX_FDEQ_GAIN_14 +211 0x4848 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0202 //RX_FDEQ_BIN_0 +221 0x0203 //RX_FDEQ_BIN_1 +222 0x0303 //RX_FDEQ_BIN_2 +223 0x0304 //RX_FDEQ_BIN_3 +224 0x0405 //RX_FDEQ_BIN_4 +225 0x0506 //RX_FDEQ_BIN_5 +226 0x0708 //RX_FDEQ_BIN_6 +227 0x090A //RX_FDEQ_BIN_7 +228 0x0B0C //RX_FDEQ_BIN_8 +229 0x0D08 //RX_FDEQ_BIN_9 +230 0x0000 //RX_FDEQ_BIN_10 +231 0x0000 //RX_FDEQ_BIN_11 +232 0x0000 //RX_FDEQ_BIN_12 +233 0x0000 //RX_FDEQ_BIN_13 +234 0x0000 //RX_FDEQ_BIN_14 +235 0x0000 //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x4000 //RX_FDEQ_RESRV_0 +245 0x0320 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0030 //RX_FDDRC_BAND_MARGIN_1 +248 0x0050 //RX_FDDRC_BAND_MARGIN_2 +249 0x0080 //RX_FDDRC_BAND_MARGIN_3 +250 0x0007 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x5000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x6400 //RX_FDDRC_THRD_3_2 +258 0x6400 //RX_FDDRC_THRD_3_3 +259 0x2000 //RX_FDDRC_SLANT_0_0 +260 0x2000 //RX_FDDRC_SLANT_0_1 +261 0x2000 //RX_FDDRC_SLANT_0_2 +262 0x2000 //RX_FDDRC_SLANT_0_3 +263 0x5333 //RX_FDDRC_SLANT_1_0 +264 0x5333 //RX_FDDRC_SLANT_1_1 +265 0x5333 //RX_FDDRC_SLANT_1_2 +266 0x5333 //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +286 0x004B //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 +#VOL 5 +163 0x1000 //RX_TDDRC_ALPHA_UP_1 +164 0x1000 //RX_TDDRC_ALPHA_UP_2 +165 0x1000 //RX_TDDRC_ALPHA_UP_3 +166 0x1000 //RX_TDDRC_ALPHA_UP_4 +184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +190 0x7000 //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +269 0x0000 //RX_TDDRC_THRD_0 +270 0x0000 //RX_TDDRC_THRD_1 +271 0x1800 //RX_TDDRC_THRD_2 +272 0x1800 //RX_TDDRC_THRD_3 +273 0x3000 //RX_TDDRC_SLANT_0 +274 0x6E00 //RX_TDDRC_SLANT_1 +275 0x1000 //RX_TDDRC_ALPHA_UP_0 +276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x199A //RX_TDDRC_HMNC_GAIN +279 0x0001 //RX_TDDRC_SMT_FLAG +280 0x0CCD //RX_TDDRC_SMT_W +281 0x055F //RX_TDDRC_DRC_GAIN +195 0x0014 //RX_FDEQ_SUBNUM +196 0x4840 //RX_FDEQ_GAIN_0 +197 0x3E3E //RX_FDEQ_GAIN_1 +198 0x4E62 //RX_FDEQ_GAIN_2 +199 0x6C7A //RX_FDEQ_GAIN_3 +200 0x8690 //RX_FDEQ_GAIN_4 +201 0x867E //RX_FDEQ_GAIN_5 +202 0x7E7E //RX_FDEQ_GAIN_6 +203 0x8080 //RX_FDEQ_GAIN_7 +204 0x8088 //RX_FDEQ_GAIN_8 +205 0x838B //RX_FDEQ_GAIN_9 +206 0x4848 //RX_FDEQ_GAIN_10 +207 0x4848 //RX_FDEQ_GAIN_11 +208 0x4848 //RX_FDEQ_GAIN_12 +209 0x4848 //RX_FDEQ_GAIN_13 +210 0x4848 //RX_FDEQ_GAIN_14 +211 0x4848 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0202 //RX_FDEQ_BIN_0 +221 0x0203 //RX_FDEQ_BIN_1 +222 0x0303 //RX_FDEQ_BIN_2 +223 0x0304 //RX_FDEQ_BIN_3 +224 0x0405 //RX_FDEQ_BIN_4 +225 0x0506 //RX_FDEQ_BIN_5 +226 0x0708 //RX_FDEQ_BIN_6 +227 0x090A //RX_FDEQ_BIN_7 +228 0x0B0C //RX_FDEQ_BIN_8 +229 0x0D08 //RX_FDEQ_BIN_9 +230 0x0000 //RX_FDEQ_BIN_10 +231 0x0000 //RX_FDEQ_BIN_11 +232 0x0000 //RX_FDEQ_BIN_12 +233 0x0000 //RX_FDEQ_BIN_13 +234 0x0000 //RX_FDEQ_BIN_14 +235 0x0000 //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x4000 //RX_FDEQ_RESRV_0 +245 0x0320 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0030 //RX_FDDRC_BAND_MARGIN_1 +248 0x0050 //RX_FDDRC_BAND_MARGIN_2 +249 0x0080 //RX_FDDRC_BAND_MARGIN_3 +250 0x0007 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x5000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x6400 //RX_FDDRC_THRD_3_2 +258 0x6400 //RX_FDDRC_THRD_3_3 +259 0x2000 //RX_FDDRC_SLANT_0_0 +260 0x2000 //RX_FDDRC_SLANT_0_1 +261 0x2000 //RX_FDDRC_SLANT_0_2 +262 0x2000 //RX_FDDRC_SLANT_0_3 +263 0x5333 //RX_FDDRC_SLANT_1_0 +264 0x5333 //RX_FDDRC_SLANT_1_1 +265 0x5333 //RX_FDDRC_SLANT_1_2 +266 0x5333 //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +286 0x007B //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 +#VOL 6 +163 0x1000 //RX_TDDRC_ALPHA_UP_1 +164 0x1000 //RX_TDDRC_ALPHA_UP_2 +165 0x1000 //RX_TDDRC_ALPHA_UP_3 +166 0x1000 //RX_TDDRC_ALPHA_UP_4 +184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +190 0x7000 //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +269 0x0000 //RX_TDDRC_THRD_0 +270 0x0000 //RX_TDDRC_THRD_1 +271 0x1800 //RX_TDDRC_THRD_2 +272 0x1800 //RX_TDDRC_THRD_3 +273 0x3000 //RX_TDDRC_SLANT_0 +274 0x6E00 //RX_TDDRC_SLANT_1 +275 0x1000 //RX_TDDRC_ALPHA_UP_0 +276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x199A //RX_TDDRC_HMNC_GAIN +279 0x0001 //RX_TDDRC_SMT_FLAG +280 0x0CCD //RX_TDDRC_SMT_W +281 0x055F //RX_TDDRC_DRC_GAIN +195 0x0014 //RX_FDEQ_SUBNUM +196 0x4840 //RX_FDEQ_GAIN_0 +197 0x3E3E //RX_FDEQ_GAIN_1 +198 0x4E62 //RX_FDEQ_GAIN_2 +199 0x6C7A //RX_FDEQ_GAIN_3 +200 0x8690 //RX_FDEQ_GAIN_4 +201 0x867E //RX_FDEQ_GAIN_5 +202 0x7E7E //RX_FDEQ_GAIN_6 +203 0x8080 //RX_FDEQ_GAIN_7 +204 0x8088 //RX_FDEQ_GAIN_8 +205 0x838B //RX_FDEQ_GAIN_9 +206 0x4848 //RX_FDEQ_GAIN_10 +207 0x4848 //RX_FDEQ_GAIN_11 +208 0x4848 //RX_FDEQ_GAIN_12 +209 0x4848 //RX_FDEQ_GAIN_13 +210 0x4848 //RX_FDEQ_GAIN_14 +211 0x4848 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0202 //RX_FDEQ_BIN_0 +221 0x0203 //RX_FDEQ_BIN_1 +222 0x0303 //RX_FDEQ_BIN_2 +223 0x0304 //RX_FDEQ_BIN_3 +224 0x0405 //RX_FDEQ_BIN_4 +225 0x0506 //RX_FDEQ_BIN_5 +226 0x0708 //RX_FDEQ_BIN_6 +227 0x090A //RX_FDEQ_BIN_7 +228 0x0B0C //RX_FDEQ_BIN_8 +229 0x0D08 //RX_FDEQ_BIN_9 +230 0x0000 //RX_FDEQ_BIN_10 +231 0x0000 //RX_FDEQ_BIN_11 +232 0x0000 //RX_FDEQ_BIN_12 +233 0x0000 //RX_FDEQ_BIN_13 +234 0x0000 //RX_FDEQ_BIN_14 +235 0x0000 //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x4000 //RX_FDEQ_RESRV_0 +245 0x0320 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0030 //RX_FDDRC_BAND_MARGIN_1 +248 0x0050 //RX_FDDRC_BAND_MARGIN_2 +249 0x0080 //RX_FDDRC_BAND_MARGIN_3 +250 0x0007 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x5000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x6400 //RX_FDDRC_THRD_3_2 +258 0x6400 //RX_FDDRC_THRD_3_3 +259 0x2000 //RX_FDDRC_SLANT_0_0 +260 0x2000 //RX_FDDRC_SLANT_0_1 +261 0x2000 //RX_FDDRC_SLANT_0_2 +262 0x2000 //RX_FDDRC_SLANT_0_3 +263 0x5333 //RX_FDDRC_SLANT_1_0 +264 0x5333 //RX_FDDRC_SLANT_1_1 +265 0x5333 //RX_FDDRC_SLANT_1_2 +266 0x5333 //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +286 0x0100 //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 #CASE_NAME HANDSET-HANDSET-TMOBILE_US-WB -#PARAM_TYPE TX+RX -#TOTAL_CUSTOM_STEP 7 +#PARAM_MODE Full +#PARAM_TYPE TX+2RX +#TOTAL_CUSTOM_STEP 7+7 #TX 0 0x0000 //TX_OPERATION_MODE_0 1 0x0000 //TX_OPERATION_MODE_1 @@ -21064,7 +32069,7 @@ 18 0x0000 //TX_SYS_RESRV_2 19 0x0000 //TX_SYS_RESRV_3 20 0x0000 //TX_DIST2REF0 -21 0x009D //TX_DIST2REF1 +21 0x009C //TX_DIST2REF1 22 0x0000 //TX_DIST2REF_02 23 0x0000 //TX_DIST2REF_03 24 0x0000 //TX_DIST2REF_04 @@ -21294,16 +32299,16 @@ 248 0xF800 //TX_THR_SN_EST_6 249 0xF700 //TX_THR_SN_EST_7 250 0x0000 //TX_DELTA_THR_SN_EST_0 -251 0x0100 //TX_DELTA_THR_SN_EST_1 -252 0x01A0 //TX_DELTA_THR_SN_EST_2 +251 0x01A0 //TX_DELTA_THR_SN_EST_1 +252 0x0200 //TX_DELTA_THR_SN_EST_2 253 0x0200 //TX_DELTA_THR_SN_EST_3 -254 0x0200 //TX_DELTA_THR_SN_EST_4 -255 0x0100 //TX_DELTA_THR_SN_EST_5 -256 0x0200 //TX_DELTA_THR_SN_EST_6 +254 0x0100 //TX_DELTA_THR_SN_EST_4 +255 0x0200 //TX_DELTA_THR_SN_EST_5 +256 0x0100 //TX_DELTA_THR_SN_EST_6 257 0x0200 //TX_DELTA_THR_SN_EST_7 258 0x4000 //TX_LAMBDA_NN_EST_0 -259 0x4000 //TX_LAMBDA_NN_EST_1 -260 0x5000 //TX_LAMBDA_NN_EST_2 +259 0x5000 //TX_LAMBDA_NN_EST_1 +260 0x4000 //TX_LAMBDA_NN_EST_2 261 0x4000 //TX_LAMBDA_NN_EST_3 262 0x4000 //TX_LAMBDA_NN_EST_4 263 0x4000 //TX_LAMBDA_NN_EST_5 @@ -21325,18 +32330,18 @@ 279 0x1000 //TX_B_POST_FLT_0 280 0x4000 //TX_B_POST_FLT_1 281 0x0018 //TX_NS_LVL_CTRL_0 -282 0x001C //TX_NS_LVL_CTRL_1 -283 0x0019 //TX_NS_LVL_CTRL_2 -284 0x0018 //TX_NS_LVL_CTRL_3 -285 0x0019 //TX_NS_LVL_CTRL_4 -286 0x001A //TX_NS_LVL_CTRL_5 -287 0x001E //TX_NS_LVL_CTRL_6 +282 0x0019 //TX_NS_LVL_CTRL_1 +283 0x0018 //TX_NS_LVL_CTRL_2 +284 0x0019 //TX_NS_LVL_CTRL_3 +285 0x001A //TX_NS_LVL_CTRL_4 +286 0x001E //TX_NS_LVL_CTRL_5 +287 0x001C //TX_NS_LVL_CTRL_6 288 0x001C //TX_NS_LVL_CTRL_7 289 0x000E //TX_MIN_GAIN_S_0 -290 0x0018 //TX_MIN_GAIN_S_1 +290 0x0012 //TX_MIN_GAIN_S_1 291 0x0012 //TX_MIN_GAIN_S_2 292 0x0012 //TX_MIN_GAIN_S_3 -293 0x0012 //TX_MIN_GAIN_S_4 +293 0x0018 //TX_MIN_GAIN_S_4 294 0x0018 //TX_MIN_GAIN_S_5 295 0x0018 //TX_MIN_GAIN_S_6 296 0x0018 //TX_MIN_GAIN_S_7 @@ -21344,8 +32349,8 @@ 298 0x0000 //TX_NS_MAX_PRI_SNR_TH 299 0x0000 //TX_NMOS_SUP_MENSA 300 0x7FFF //TX_SNRI_SUP_0 -301 0x4000 //TX_SNRI_SUP_1 -302 0x5000 //TX_SNRI_SUP_2 +301 0x5000 //TX_SNRI_SUP_1 +302 0x4000 //TX_SNRI_SUP_2 303 0x4000 //TX_SNRI_SUP_3 304 0x4000 //TX_SNRI_SUP_4 305 0x4000 //TX_SNRI_SUP_5 @@ -21358,28 +32363,28 @@ 312 0x7FFF //TX_A_POST_FILT_0 313 0x2000 //TX_A_POST_FILT_1 314 0x7000 //TX_A_POST_FILT_S_0 -315 0x7000 //TX_A_POST_FILT_S_1 +315 0x3000 //TX_A_POST_FILT_S_1 316 0x3000 //TX_A_POST_FILT_S_2 -317 0x3000 //TX_A_POST_FILT_S_3 -318 0x2000 //TX_A_POST_FILT_S_4 +317 0x2000 //TX_A_POST_FILT_S_3 +318 0x7000 //TX_A_POST_FILT_S_4 319 0x7000 //TX_A_POST_FILT_S_5 320 0x7000 //TX_A_POST_FILT_S_6 321 0x7000 //TX_A_POST_FILT_S_7 322 0x1000 //TX_B_POST_FILT_0 323 0x4000 //TX_B_POST_FILT_1 -324 0x5000 //TX_B_POST_FILT_2 +324 0x4000 //TX_B_POST_FILT_2 325 0x4000 //TX_B_POST_FILT_3 326 0x4000 //TX_B_POST_FILT_4 327 0x4000 //TX_B_POST_FILT_5 -328 0x4000 //TX_B_POST_FILT_6 +328 0x5000 //TX_B_POST_FILT_6 329 0x4000 //TX_B_POST_FILT_7 330 0x4000 //TX_B_LESSCUT_RTO_S_0 331 0x6000 //TX_B_LESSCUT_RTO_S_1 332 0x6000 //TX_B_LESSCUT_RTO_S_2 333 0x6000 //TX_B_LESSCUT_RTO_S_3 -334 0x6000 //TX_B_LESSCUT_RTO_S_4 +334 0x7FFF //TX_B_LESSCUT_RTO_S_4 335 0x6000 //TX_B_LESSCUT_RTO_S_5 -336 0x7FFF //TX_B_LESSCUT_RTO_S_6 +336 0x6000 //TX_B_LESSCUT_RTO_S_6 337 0x7FFF //TX_B_LESSCUT_RTO_S_7 338 0x7C29 //TX_LAMBDA_PFILT 339 0x7C29 //TX_LAMBDA_PFILT_S_0 @@ -21423,10 +32428,10 @@ 377 0x4E20 //TX_NOISE_TH_5_4 378 0x21E8 //TX_NOISE_TH_6 379 0x0014 //TX_MINENOISE_TH -380 0x4000 //TX_MINENOISE_MIC0_TH_MTS -381 0xFFEE //TX_MINENOISE_MIC0_TH_EXP -382 0x6000 //TX_MINENOISE_MIC0_S_TH_MTS -383 0xFFF3 //TX_MINENOISE_MIC0_S_TH_EXP +380 0xD508 //TX_MORENS_TFMASK_TH +381 0x0001 //TX_DRC_QUIET_FLOOR +382 0x6D60 //TX_RATIODTL_CUT_TH +383 0x0DAC //TX_DT_CUT_K1 384 0x00A5 //TX_OUT_ENER_S_TH_CLEAN 385 0x00A5 //TX_OUT_ENER_S_TH_LESSCLEAN 386 0x00A5 //TX_OUT_ENER_S_TH_NOISY @@ -21434,15 +32439,15 @@ 388 0x00CE //TX_OUT_ENER_TH_SPEECH 389 0x2000 //TX_SN_NPB_GAIN 390 0x0000 //TX_NN_NPB_GAIN -391 0x0000 //TX_CSX_ALPHA_0 -392 0x0000 //TX_CSX_ALPHA_1 -393 0x0000 //TX_CSX_ALPHA_2 -394 0x0000 //TX_CSX_ALPHA_3 -395 0x0800 //TX_MU_ARSP_EST -396 0x00C8 //TX_P_OUTBEAM_MIN_TH +391 0x3000 //TX_POST_MASK_SUP_HSNE +392 0x07D0 //TX_TAIL_DET_TH +393 0x4000 //TX_B_LESSCUT_RTO_WTA +394 0x0000 //TX_MEL_G_R +395 0x0080 //TX_SUPHIGH_TH +396 0x4000 //TX_MASK_G_R 397 0x0002 //TX_EXTRA_NS_L -398 0x0800 //TX_EXTRA_NS_A -399 0x0005 //TX_VR_NOISE_FLOOR_TH +398 0x1800 //TX_C_POST_FLT_MASK +399 0x7FFF //TX_A_POST_FLT_WNS 400 0x0148 //TX_MIN_G_LOW300HZ 401 0x0004 //TX_MAXLEVEL_CNG 402 0x00B4 //TX_STN_NOISE_TH @@ -21557,16 +32562,16 @@ 511 0x6666 //TX_MIC_TO_BFGAIN 512 0x0000 //TX_MICTOBFGAIN0 513 0x0000 //TX_FASTMUE_TH -514 0x0000 //TX_DERVB_LEN_0 -515 0x0000 //TX_DERVB_LEN_1 -516 0x0000 //TX_RHO_DERVB -517 0x0000 //TX_MIC_INDX_DERVB -518 0x0000 //TX_MU_DERVB -519 0x0000 //TX_DR_RESRV_0 -520 0x0000 //TX_DR_RESRV_1 -521 0x0000 //TX_DR_RESRV_2 -522 0x0000 //TX_DR_RESRV_3 -523 0x0000 //TX_DR_RESRV_4 +514 0x3000 //TX_DEREVERB_LF_MU +515 0x34CD //TX_DEREVERB_HF_MU +516 0x0007 //TX_DEREVERB_DELAY +517 0x0004 //TX_DEREVERB_COEF_LEN +518 0x0003 //TX_DEREVERB_DNR +519 0x0000 //TX_DEREVERB_ALPHA +520 0x0000 //TX_DEREVERB_BETA +521 0x0000 //TX_GSC_RTOL_TH +522 0x0000 //TX_GSC_RTOH_TH +523 0x7E2C //TX_WIDE2_MEANHTH 524 0x0000 //TX_DR_RESRV_5 525 0x0000 //TX_DR_RESRV_6 526 0x0000 //TX_DR_RESRV_7 @@ -21614,16 +32619,16 @@ 568 0x5048 //TX_FDEQ_GAIN_1 569 0x4C4C //TX_FDEQ_GAIN_2 570 0x474A //TX_FDEQ_GAIN_3 -571 0x4742 //TX_FDEQ_GAIN_4 -572 0x4241 //TX_FDEQ_GAIN_5 -573 0x403F //TX_FDEQ_GAIN_6 -574 0x433F //TX_FDEQ_GAIN_7 -575 0x3938 //TX_FDEQ_GAIN_8 -576 0x3434 //TX_FDEQ_GAIN_9 -577 0x3530 //TX_FDEQ_GAIN_10 -578 0x3033 //TX_FDEQ_GAIN_11 -579 0x3535 //TX_FDEQ_GAIN_12 -580 0x3D48 //TX_FDEQ_GAIN_13 +571 0x473F //TX_FDEQ_GAIN_4 +572 0x4245 //TX_FDEQ_GAIN_5 +573 0x4B53 //TX_FDEQ_GAIN_6 +574 0x564A //TX_FDEQ_GAIN_7 +575 0x3D3A //TX_FDEQ_GAIN_8 +576 0x3838 //TX_FDEQ_GAIN_9 +577 0x3836 //TX_FDEQ_GAIN_10 +578 0x3633 //TX_FDEQ_GAIN_11 +579 0x3838 //TX_FDEQ_GAIN_12 +580 0x4048 //TX_FDEQ_GAIN_13 581 0x4848 //TX_FDEQ_GAIN_14 582 0x4848 //TX_FDEQ_GAIN_15 583 0x4848 //TX_FDEQ_GAIN_16 @@ -21667,12 +32672,12 @@ 621 0x4848 //TX_PREEQ_GAIN_MIC0_4 622 0x4848 //TX_PREEQ_GAIN_MIC0_5 623 0x4848 //TX_PREEQ_GAIN_MIC0_6 -624 0x4846 //TX_PREEQ_GAIN_MIC0_7 -625 0x4544 //TX_PREEQ_GAIN_MIC0_8 -626 0x4241 //TX_PREEQ_GAIN_MIC0_9 -627 0x403E //TX_PREEQ_GAIN_MIC0_10 -628 0x3D3C //TX_PREEQ_GAIN_MIC0_11 -629 0x3C3C //TX_PREEQ_GAIN_MIC0_12 +624 0x4848 //TX_PREEQ_GAIN_MIC0_7 +625 0x4848 //TX_PREEQ_GAIN_MIC0_8 +626 0x4848 //TX_PREEQ_GAIN_MIC0_9 +627 0x4848 //TX_PREEQ_GAIN_MIC0_10 +628 0x4848 //TX_PREEQ_GAIN_MIC0_11 +629 0x4848 //TX_PREEQ_GAIN_MIC0_12 630 0x4848 //TX_PREEQ_GAIN_MIC0_13 631 0x4848 //TX_PREEQ_GAIN_MIC0_14 632 0x4848 //TX_PREEQ_GAIN_MIC0_15 @@ -21717,11 +32722,11 @@ 671 0x4848 //TX_PREEQ_GAIN_MIC1_5 672 0x4848 //TX_PREEQ_GAIN_MIC1_6 673 0x4848 //TX_PREEQ_GAIN_MIC1_7 -674 0x484A //TX_PREEQ_GAIN_MIC1_8 -675 0x4B4C //TX_PREEQ_GAIN_MIC1_9 +674 0x4848 //TX_PREEQ_GAIN_MIC1_8 +675 0x4A4B //TX_PREEQ_GAIN_MIC1_9 676 0x4B4A //TX_PREEQ_GAIN_MIC1_10 -677 0x4A48 //TX_PREEQ_GAIN_MIC1_11 -678 0x4C4C //TX_PREEQ_GAIN_MIC1_12 +677 0x4848 //TX_PREEQ_GAIN_MIC1_11 +678 0x494C //TX_PREEQ_GAIN_MIC1_12 679 0x4C4C //TX_PREEQ_GAIN_MIC1_13 680 0x4848 //TX_PREEQ_GAIN_MIC1_14 681 0x4848 //TX_PREEQ_GAIN_MIC1_15 @@ -21819,7 +32824,7 @@ 773 0x0000 //TX_GAIN_LIMIT_0 774 0x0000 //TX_GAIN_LIMIT_1 775 0x0006 //TX_GAIN_LIMIT_2 -776 0x0006 //TX_GAIN_LIMIT_3 +776 0x0005 //TX_GAIN_LIMIT_3 777 0x7F5B //TX_BVE_NOVAD0_ALPHADOWN 778 0x7FDE //TX_BVE_VAD0_ALPHAUP 779 0x7F3A //TX_BVE_VAD0_ALPHADOWN @@ -21940,8 +32945,73 @@ 894 0xC000 //TX_FASTNS_SSA_THHFL 895 0xCCCC //TX_FASTNS_SSA_THLFH 896 0xD999 //TX_FASTNS_SSA_THHFH +897 0x2339 //TX_SENDFUNC_REG_MICMUTE +898 0x0021 //TX_SENDFUNC_REG_MICMUTE1 +899 0x02BC //TX_MICMUTE_RATIO_THR +900 0x0140 //TX_MICMUTE_AMP_THR +901 0x0004 //TX_MICMUTE_HPF_IND +902 0x00C0 //TX_MICMUTE_LOG_EYR_TH +903 0x0008 //TX_MICMUTE_CVG_TIME +904 0x0008 //TX_MICMUTE_RELEASE_TIME +905 0x01FE //TX_MIC_VOLUME_MIC0MUTE +906 0x0020 //TX_MICMUTE_EPD_OFFSET_0 +907 0x001E //TX_MICMUTE_FRQ_AEC_L +908 0x7999 //TX_MICMUTE_EAD_THR +909 0x7FFF //TX_MICMUTE_LAMBDA_CB_NLE +910 0x7FFF //TX_MICMUTE_LAMBDA_RE_EST +911 0x4000 //TX_DTD_THR1_MICMUTE_0 +912 0x7000 //TX_DTD_THR1_MICMUTE_1 +913 0x7FFF //TX_DTD_THR1_MICMUTE_2 +914 0x7FFF //TX_DTD_THR1_MICMUTE_3 +915 0x6CCC //TX_DTD_THR2_MICMUTE_0 +916 0x0400 //TX_MICMUTE_MIN_EQ_RE_EST_0 +917 0x0400 //TX_MICMUTE_MIN_EQ_RE_EST_1 +918 0x1000 //TX_MICMUTE_MIN_EQ_RE_EST_2 +919 0x7FFF //TX_MICMUTE_MIN_EQ_RE_EST_3 +920 0x7FFF //TX_MICMUTE_MIN_EQ_RE_EST_4 +921 0x4000 //TX_MICMUTE_C_POST_FLT +922 0x03E8 //TX_MICMUTE_DT_CUT_K +923 0x0001 //TX_MICMUTE_DT_CUT_THR +924 0x03E8 //TX_MICMUTE_DT_CUT_K2 +925 0x0001 //TX_MICMUTE_DT_CUT_THR2 +926 0x0064 //TX_MICMUTE_DT2_HOLD_N +927 0x1000 //TX_MICMUTE_RATIODTH_THCUT +928 0x1000 //TX_MICMUTE_B_POST_FLT_ECHOL +929 0x7FFF //TX_MICMUTE_B_POST_FLT_ECHOH +930 0x0400 //TX_MICMUTE_C_POST_FLT_MASK +931 0x7999 //TX_MICMUTE_RATIODTL_CUT_TH +932 0x0258 //TX_MICMUTE_DT_CUT_K1 +933 0x0800 //TX_MICMUTE_N2_SN_EST +934 0xFC00 //TX_MICMUTE_THR_SN_EST_0 +935 0x001C //TX_MICMUTE_MIN_G_CTRL_0 +936 0x6000 //TX_MICMUTE_A_POST_FILT_S_0 +937 0x7000 //TX_MICMUTE_B_POST_FILT_0 +938 0x2710 //TX_MIC1RUB_AMP_THR +939 0x0010 //TX_MIC1MUTE_RATIO_THR +940 0x0450 //TX_MIC1MUTE_AMP_THR +941 0x0008 //TX_MIC1MUTE_CVG_TIME +942 0x0008 //TX_MIC1MUTE_RELEASE_TIME +943 0x0000 //TX_AMS_RESRV_01 +944 0x0000 //TX_AMS_RESRV_02 +945 0x0000 //TX_AMS_RESRV_03 +946 0x0000 //TX_AMS_RESRV_04 +947 0x0000 //TX_AMS_RESRV_05 +948 0x0000 //TX_AMS_RESRV_06 +949 0x0000 //TX_AMS_RESRV_07 +950 0x0000 //TX_AMS_RESRV_08 +951 0x0000 //TX_AMS_RESRV_09 +952 0x0000 //TX_AMS_RESRV_10 +953 0x0000 //TX_AMS_RESRV_11 +954 0x0000 //TX_AMS_RESRV_12 +955 0x0000 //TX_AMS_RESRV_13 +956 0x0000 //TX_AMS_RESRV_14 +957 0x0000 //TX_AMS_RESRV_15 +958 0x0000 //TX_AMS_RESRV_16 +959 0x0000 //TX_AMS_RESRV_17 +960 0x0000 //TX_AMS_RESRV_18 +961 0x0000 //TX_AMS_RESRV_19 #RX -0 0x003C //RX_RECVFUNC_MODE_0 +0 0x203C //RX_RECVFUNC_MODE_0 1 0x0000 //RX_RECVFUNC_MODE_1 2 0x0001 //RX_SAMPLINGFREQ_SIG 3 0x0001 //RX_SAMPLINGFREQ_PROC @@ -21951,7 +33021,7 @@ 7 0x1000 //RX_TDDRC_ALPHA_UP_2 8 0x1000 //RX_TDDRC_ALPHA_UP_3 9 0x1000 //RX_TDDRC_ALPHA_UP_4 -10 0x0600 //RX_PGA +10 0x0480 //RX_PGA 11 0x7FFF //RX_A_HP 12 0x4000 //RX_B_PE 13 0x7800 //RX_THR_PITCH_DET_0 @@ -21980,20 +33050,20 @@ 36 0x1000 //RX_LMT_THRD 37 0x7FDF //RX_LMT_ALPHA 38 0x001C //RX_FDEQ_SUBNUM -39 0x4840 //RX_FDEQ_GAIN_0 -40 0x4040 //RX_FDEQ_GAIN_1 -41 0x444C //RX_FDEQ_GAIN_2 -42 0x5C6C //RX_FDEQ_GAIN_3 -43 0x828B //RX_FDEQ_GAIN_4 -44 0x8F87 //RX_FDEQ_GAIN_5 -45 0x8481 //RX_FDEQ_GAIN_6 -46 0x8980 //RX_FDEQ_GAIN_7 -47 0x8383 //RX_FDEQ_GAIN_8 -48 0x7F86 //RX_FDEQ_GAIN_9 -49 0x796F //RX_FDEQ_GAIN_10 -50 0x6B66 //RX_FDEQ_GAIN_11 -51 0x625E //RX_FDEQ_GAIN_12 -52 0x5850 //RX_FDEQ_GAIN_13 +39 0x4836 //RX_FDEQ_GAIN_0 +40 0x3636 //RX_FDEQ_GAIN_1 +41 0x364C //RX_FDEQ_GAIN_2 +42 0x586E //RX_FDEQ_GAIN_3 +43 0x767A //RX_FDEQ_GAIN_4 +44 0x7978 //RX_FDEQ_GAIN_5 +45 0x7A7C //RX_FDEQ_GAIN_6 +46 0x8280 //RX_FDEQ_GAIN_7 +47 0x848C //RX_FDEQ_GAIN_8 +48 0x8E98 //RX_FDEQ_GAIN_9 +49 0x9E95 //RX_FDEQ_GAIN_10 +50 0x8686 //RX_FDEQ_GAIN_11 +51 0x7868 //RX_FDEQ_GAIN_12 +52 0x6050 //RX_FDEQ_GAIN_13 53 0x4848 //RX_FDEQ_GAIN_14 54 0x4848 //RX_FDEQ_GAIN_15 55 0x4848 //RX_FDEQ_GAIN_16 @@ -22015,9 +33085,9 @@ 71 0x0B0C //RX_FDEQ_BIN_8 72 0x0D0E //RX_FDEQ_BIN_9 73 0x0E0F //RX_FDEQ_BIN_10 -74 0x0F10 //RX_FDEQ_BIN_11 -75 0x1011 //RX_FDEQ_BIN_12 -76 0x1104 //RX_FDEQ_BIN_13 +74 0x0F0E //RX_FDEQ_BIN_11 +75 0x100D //RX_FDEQ_BIN_12 +76 0x110A //RX_FDEQ_BIN_13 77 0x0000 //RX_FDEQ_BIN_14 78 0x0000 //RX_FDEQ_BIN_15 79 0x0000 //RX_FDEQ_BIN_16 @@ -22057,20 +33127,20 @@ 113 0x0000 //RX_TDDRC_THRD_1 114 0x1800 //RX_TDDRC_THRD_2 115 0x1800 //RX_TDDRC_THRD_3 -116 0x3000 //RX_TDDRC_SLANT_0 -117 0x6E00 //RX_TDDRC_SLANT_1 +116 0x7FFF //RX_TDDRC_SLANT_0 +117 0x7FFF //RX_TDDRC_SLANT_1 118 0x1000 //RX_TDDRC_ALPHA_UP_0 119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 120 0x0000 //RX_TDDRC_HMNC_FLAG 121 0x199A //RX_TDDRC_HMNC_GAIN 122 0x0001 //RX_TDDRC_SMT_FLAG 123 0x0CCD //RX_TDDRC_SMT_W -124 0x0364 //RX_TDDRC_DRC_GAIN +124 0x0650 //RX_TDDRC_DRC_GAIN 125 0x7C00 //RX_LAMBDA_PKA_FP 126 0x13E0 //RX_TPKA_FP 127 0x0080 //RX_MIN_G_FP 128 0x2000 //RX_MAX_G_FP -129 0x000E //RX_SPK_VOL +129 0x0100 //RX_SPK_VOL 130 0x0000 //RX_VOL_RESRV_0 131 0x0000 //RX_MAXLEVEL_CNG 132 0x3000 //RX_BWE_UV_TH @@ -22113,30 +33183,30 @@ 113 0x0000 //RX_TDDRC_THRD_1 114 0x1800 //RX_TDDRC_THRD_2 115 0x1800 //RX_TDDRC_THRD_3 -116 0x3000 //RX_TDDRC_SLANT_0 -117 0x6E00 //RX_TDDRC_SLANT_1 +116 0x7FFF //RX_TDDRC_SLANT_0 +117 0x7FFF //RX_TDDRC_SLANT_1 118 0x1000 //RX_TDDRC_ALPHA_UP_0 119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 120 0x0000 //RX_TDDRC_HMNC_FLAG 121 0x199A //RX_TDDRC_HMNC_GAIN 122 0x0001 //RX_TDDRC_SMT_FLAG 123 0x0CCD //RX_TDDRC_SMT_W -124 0x0364 //RX_TDDRC_DRC_GAIN +124 0x0650 //RX_TDDRC_DRC_GAIN 38 0x001C //RX_FDEQ_SUBNUM -39 0x4840 //RX_FDEQ_GAIN_0 -40 0x4040 //RX_FDEQ_GAIN_1 -41 0x444C //RX_FDEQ_GAIN_2 -42 0x5C6C //RX_FDEQ_GAIN_3 -43 0x828B //RX_FDEQ_GAIN_4 -44 0x8F87 //RX_FDEQ_GAIN_5 -45 0x8481 //RX_FDEQ_GAIN_6 -46 0x8980 //RX_FDEQ_GAIN_7 -47 0x8383 //RX_FDEQ_GAIN_8 -48 0x7F86 //RX_FDEQ_GAIN_9 -49 0x796F //RX_FDEQ_GAIN_10 -50 0x6B66 //RX_FDEQ_GAIN_11 -51 0x625E //RX_FDEQ_GAIN_12 -52 0x5850 //RX_FDEQ_GAIN_13 +39 0x4836 //RX_FDEQ_GAIN_0 +40 0x3636 //RX_FDEQ_GAIN_1 +41 0x364C //RX_FDEQ_GAIN_2 +42 0x586E //RX_FDEQ_GAIN_3 +43 0x767A //RX_FDEQ_GAIN_4 +44 0x7978 //RX_FDEQ_GAIN_5 +45 0x7A7C //RX_FDEQ_GAIN_6 +46 0x8280 //RX_FDEQ_GAIN_7 +47 0x848C //RX_FDEQ_GAIN_8 +48 0x8E98 //RX_FDEQ_GAIN_9 +49 0x9E95 //RX_FDEQ_GAIN_10 +50 0x8686 //RX_FDEQ_GAIN_11 +51 0x7868 //RX_FDEQ_GAIN_12 +52 0x6050 //RX_FDEQ_GAIN_13 53 0x4848 //RX_FDEQ_GAIN_14 54 0x4848 //RX_FDEQ_GAIN_15 55 0x4848 //RX_FDEQ_GAIN_16 @@ -22158,9 +33228,9 @@ 71 0x0B0C //RX_FDEQ_BIN_8 72 0x0D0E //RX_FDEQ_BIN_9 73 0x0E0F //RX_FDEQ_BIN_10 -74 0x0F10 //RX_FDEQ_BIN_11 -75 0x1011 //RX_FDEQ_BIN_12 -76 0x1104 //RX_FDEQ_BIN_13 +74 0x0F0E //RX_FDEQ_BIN_11 +75 0x100D //RX_FDEQ_BIN_12 +76 0x110A //RX_FDEQ_BIN_13 77 0x0000 //RX_FDEQ_BIN_14 78 0x0000 //RX_FDEQ_BIN_15 79 0x0000 //RX_FDEQ_BIN_16 @@ -22195,7 +33265,7 @@ 108 0x5333 //RX_FDDRC_SLANT_1_2 109 0x5333 //RX_FDDRC_SLANT_1_3 110 0x0000 //RX_FDDRC_RESRV_0 -129 0x000E //RX_SPK_VOL +129 0x000B //RX_SPK_VOL 130 0x0000 //RX_VOL_RESRV_0 #VOL 1 6 0x1000 //RX_TDDRC_ALPHA_UP_1 @@ -22212,30 +33282,30 @@ 113 0x0000 //RX_TDDRC_THRD_1 114 0x1800 //RX_TDDRC_THRD_2 115 0x1800 //RX_TDDRC_THRD_3 -116 0x3000 //RX_TDDRC_SLANT_0 -117 0x6E00 //RX_TDDRC_SLANT_1 +116 0x7FFF //RX_TDDRC_SLANT_0 +117 0x7FFF //RX_TDDRC_SLANT_1 118 0x1000 //RX_TDDRC_ALPHA_UP_0 119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 120 0x0000 //RX_TDDRC_HMNC_FLAG 121 0x199A //RX_TDDRC_HMNC_GAIN 122 0x0001 //RX_TDDRC_SMT_FLAG 123 0x0CCD //RX_TDDRC_SMT_W -124 0x036E //RX_TDDRC_DRC_GAIN +124 0x0650 //RX_TDDRC_DRC_GAIN 38 0x001C //RX_FDEQ_SUBNUM -39 0x4840 //RX_FDEQ_GAIN_0 -40 0x4040 //RX_FDEQ_GAIN_1 -41 0x444C //RX_FDEQ_GAIN_2 -42 0x5C6C //RX_FDEQ_GAIN_3 -43 0x828B //RX_FDEQ_GAIN_4 -44 0x8F87 //RX_FDEQ_GAIN_5 -45 0x8481 //RX_FDEQ_GAIN_6 -46 0x8980 //RX_FDEQ_GAIN_7 -47 0x8383 //RX_FDEQ_GAIN_8 -48 0x7F86 //RX_FDEQ_GAIN_9 -49 0x796F //RX_FDEQ_GAIN_10 -50 0x6B66 //RX_FDEQ_GAIN_11 -51 0x625E //RX_FDEQ_GAIN_12 -52 0x5850 //RX_FDEQ_GAIN_13 +39 0x4836 //RX_FDEQ_GAIN_0 +40 0x3636 //RX_FDEQ_GAIN_1 +41 0x364C //RX_FDEQ_GAIN_2 +42 0x586E //RX_FDEQ_GAIN_3 +43 0x767A //RX_FDEQ_GAIN_4 +44 0x7978 //RX_FDEQ_GAIN_5 +45 0x7A7C //RX_FDEQ_GAIN_6 +46 0x8280 //RX_FDEQ_GAIN_7 +47 0x848C //RX_FDEQ_GAIN_8 +48 0x8E98 //RX_FDEQ_GAIN_9 +49 0x9E95 //RX_FDEQ_GAIN_10 +50 0x8686 //RX_FDEQ_GAIN_11 +51 0x7868 //RX_FDEQ_GAIN_12 +52 0x6050 //RX_FDEQ_GAIN_13 53 0x4848 //RX_FDEQ_GAIN_14 54 0x4848 //RX_FDEQ_GAIN_15 55 0x4848 //RX_FDEQ_GAIN_16 @@ -22257,9 +33327,9 @@ 71 0x0B0C //RX_FDEQ_BIN_8 72 0x0D0E //RX_FDEQ_BIN_9 73 0x0E0F //RX_FDEQ_BIN_10 -74 0x0F10 //RX_FDEQ_BIN_11 -75 0x1011 //RX_FDEQ_BIN_12 -76 0x1104 //RX_FDEQ_BIN_13 +74 0x0F0E //RX_FDEQ_BIN_11 +75 0x100D //RX_FDEQ_BIN_12 +76 0x110A //RX_FDEQ_BIN_13 77 0x0000 //RX_FDEQ_BIN_14 78 0x0000 //RX_FDEQ_BIN_15 79 0x0000 //RX_FDEQ_BIN_16 @@ -22294,7 +33364,7 @@ 108 0x5333 //RX_FDDRC_SLANT_1_2 109 0x5333 //RX_FDDRC_SLANT_1_3 110 0x0000 //RX_FDDRC_RESRV_0 -129 0x0016 //RX_SPK_VOL +129 0x0012 //RX_SPK_VOL 130 0x0000 //RX_VOL_RESRV_0 #VOL 2 6 0x1000 //RX_TDDRC_ALPHA_UP_1 @@ -22311,30 +33381,30 @@ 113 0x0000 //RX_TDDRC_THRD_1 114 0x1800 //RX_TDDRC_THRD_2 115 0x1800 //RX_TDDRC_THRD_3 -116 0x3000 //RX_TDDRC_SLANT_0 -117 0x6E00 //RX_TDDRC_SLANT_1 +116 0x7FFF //RX_TDDRC_SLANT_0 +117 0x7FFF //RX_TDDRC_SLANT_1 118 0x1000 //RX_TDDRC_ALPHA_UP_0 119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 120 0x0000 //RX_TDDRC_HMNC_FLAG 121 0x199A //RX_TDDRC_HMNC_GAIN 122 0x0001 //RX_TDDRC_SMT_FLAG 123 0x0CCD //RX_TDDRC_SMT_W -124 0x0364 //RX_TDDRC_DRC_GAIN +124 0x0650 //RX_TDDRC_DRC_GAIN 38 0x001C //RX_FDEQ_SUBNUM -39 0x4840 //RX_FDEQ_GAIN_0 -40 0x4040 //RX_FDEQ_GAIN_1 -41 0x444C //RX_FDEQ_GAIN_2 -42 0x5C6C //RX_FDEQ_GAIN_3 -43 0x828B //RX_FDEQ_GAIN_4 -44 0x8F87 //RX_FDEQ_GAIN_5 -45 0x8481 //RX_FDEQ_GAIN_6 -46 0x8980 //RX_FDEQ_GAIN_7 -47 0x8383 //RX_FDEQ_GAIN_8 -48 0x7F86 //RX_FDEQ_GAIN_9 -49 0x796F //RX_FDEQ_GAIN_10 -50 0x6B66 //RX_FDEQ_GAIN_11 -51 0x625E //RX_FDEQ_GAIN_12 -52 0x5850 //RX_FDEQ_GAIN_13 +39 0x4836 //RX_FDEQ_GAIN_0 +40 0x3636 //RX_FDEQ_GAIN_1 +41 0x364C //RX_FDEQ_GAIN_2 +42 0x586E //RX_FDEQ_GAIN_3 +43 0x767A //RX_FDEQ_GAIN_4 +44 0x7978 //RX_FDEQ_GAIN_5 +45 0x7A7C //RX_FDEQ_GAIN_6 +46 0x8280 //RX_FDEQ_GAIN_7 +47 0x848C //RX_FDEQ_GAIN_8 +48 0x8E98 //RX_FDEQ_GAIN_9 +49 0x9E95 //RX_FDEQ_GAIN_10 +50 0x8686 //RX_FDEQ_GAIN_11 +51 0x7868 //RX_FDEQ_GAIN_12 +52 0x6050 //RX_FDEQ_GAIN_13 53 0x4848 //RX_FDEQ_GAIN_14 54 0x4848 //RX_FDEQ_GAIN_15 55 0x4848 //RX_FDEQ_GAIN_16 @@ -22356,9 +33426,9 @@ 71 0x0B0C //RX_FDEQ_BIN_8 72 0x0D0E //RX_FDEQ_BIN_9 73 0x0E0F //RX_FDEQ_BIN_10 -74 0x0F10 //RX_FDEQ_BIN_11 -75 0x1011 //RX_FDEQ_BIN_12 -76 0x1104 //RX_FDEQ_BIN_13 +74 0x0F0E //RX_FDEQ_BIN_11 +75 0x100D //RX_FDEQ_BIN_12 +76 0x110A //RX_FDEQ_BIN_13 77 0x0000 //RX_FDEQ_BIN_14 78 0x0000 //RX_FDEQ_BIN_15 79 0x0000 //RX_FDEQ_BIN_16 @@ -22393,7 +33463,7 @@ 108 0x5333 //RX_FDDRC_SLANT_1_2 109 0x5333 //RX_FDDRC_SLANT_1_3 110 0x0000 //RX_FDDRC_RESRV_0 -129 0x0024 //RX_SPK_VOL +129 0x001E //RX_SPK_VOL 130 0x0000 //RX_VOL_RESRV_0 #VOL 3 6 0x1000 //RX_TDDRC_ALPHA_UP_1 @@ -22410,30 +33480,30 @@ 113 0x0000 //RX_TDDRC_THRD_1 114 0x1800 //RX_TDDRC_THRD_2 115 0x1800 //RX_TDDRC_THRD_3 -116 0x3000 //RX_TDDRC_SLANT_0 -117 0x6E00 //RX_TDDRC_SLANT_1 +116 0x7FFF //RX_TDDRC_SLANT_0 +117 0x7FFF //RX_TDDRC_SLANT_1 118 0x1000 //RX_TDDRC_ALPHA_UP_0 119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 120 0x0000 //RX_TDDRC_HMNC_FLAG 121 0x199A //RX_TDDRC_HMNC_GAIN 122 0x0001 //RX_TDDRC_SMT_FLAG 123 0x0CCD //RX_TDDRC_SMT_W -124 0x0357 //RX_TDDRC_DRC_GAIN +124 0x0650 //RX_TDDRC_DRC_GAIN 38 0x001C //RX_FDEQ_SUBNUM -39 0x4840 //RX_FDEQ_GAIN_0 -40 0x4040 //RX_FDEQ_GAIN_1 -41 0x444C //RX_FDEQ_GAIN_2 -42 0x5C6C //RX_FDEQ_GAIN_3 -43 0x828B //RX_FDEQ_GAIN_4 -44 0x8F87 //RX_FDEQ_GAIN_5 -45 0x8481 //RX_FDEQ_GAIN_6 -46 0x8980 //RX_FDEQ_GAIN_7 -47 0x8383 //RX_FDEQ_GAIN_8 -48 0x7F86 //RX_FDEQ_GAIN_9 -49 0x796F //RX_FDEQ_GAIN_10 -50 0x6B66 //RX_FDEQ_GAIN_11 -51 0x625E //RX_FDEQ_GAIN_12 -52 0x5850 //RX_FDEQ_GAIN_13 +39 0x4836 //RX_FDEQ_GAIN_0 +40 0x3636 //RX_FDEQ_GAIN_1 +41 0x364C //RX_FDEQ_GAIN_2 +42 0x586E //RX_FDEQ_GAIN_3 +43 0x767A //RX_FDEQ_GAIN_4 +44 0x7978 //RX_FDEQ_GAIN_5 +45 0x7A7C //RX_FDEQ_GAIN_6 +46 0x8280 //RX_FDEQ_GAIN_7 +47 0x848C //RX_FDEQ_GAIN_8 +48 0x8E98 //RX_FDEQ_GAIN_9 +49 0x9E95 //RX_FDEQ_GAIN_10 +50 0x8686 //RX_FDEQ_GAIN_11 +51 0x7868 //RX_FDEQ_GAIN_12 +52 0x6050 //RX_FDEQ_GAIN_13 53 0x4848 //RX_FDEQ_GAIN_14 54 0x4848 //RX_FDEQ_GAIN_15 55 0x4848 //RX_FDEQ_GAIN_16 @@ -22455,9 +33525,9 @@ 71 0x0B0C //RX_FDEQ_BIN_8 72 0x0D0E //RX_FDEQ_BIN_9 73 0x0E0F //RX_FDEQ_BIN_10 -74 0x0F10 //RX_FDEQ_BIN_11 -75 0x1011 //RX_FDEQ_BIN_12 -76 0x1104 //RX_FDEQ_BIN_13 +74 0x0F0E //RX_FDEQ_BIN_11 +75 0x100D //RX_FDEQ_BIN_12 +76 0x110A //RX_FDEQ_BIN_13 77 0x0000 //RX_FDEQ_BIN_14 78 0x0000 //RX_FDEQ_BIN_15 79 0x0000 //RX_FDEQ_BIN_16 @@ -22492,7 +33562,7 @@ 108 0x5333 //RX_FDDRC_SLANT_1_2 109 0x5333 //RX_FDDRC_SLANT_1_3 110 0x0000 //RX_FDDRC_RESRV_0 -129 0x003A //RX_SPK_VOL +129 0x0026 //RX_SPK_VOL 130 0x0000 //RX_VOL_RESRV_0 #VOL 4 6 0x1000 //RX_TDDRC_ALPHA_UP_1 @@ -22509,30 +33579,30 @@ 113 0x0000 //RX_TDDRC_THRD_1 114 0x1800 //RX_TDDRC_THRD_2 115 0x1800 //RX_TDDRC_THRD_3 -116 0x3000 //RX_TDDRC_SLANT_0 -117 0x6E00 //RX_TDDRC_SLANT_1 +116 0x7FFF //RX_TDDRC_SLANT_0 +117 0x7FFF //RX_TDDRC_SLANT_1 118 0x1000 //RX_TDDRC_ALPHA_UP_0 119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 120 0x0000 //RX_TDDRC_HMNC_FLAG 121 0x199A //RX_TDDRC_HMNC_GAIN 122 0x0001 //RX_TDDRC_SMT_FLAG 123 0x0CCD //RX_TDDRC_SMT_W -124 0x0357 //RX_TDDRC_DRC_GAIN +124 0x0650 //RX_TDDRC_DRC_GAIN 38 0x001C //RX_FDEQ_SUBNUM -39 0x4840 //RX_FDEQ_GAIN_0 -40 0x4040 //RX_FDEQ_GAIN_1 -41 0x444C //RX_FDEQ_GAIN_2 -42 0x5C6C //RX_FDEQ_GAIN_3 -43 0x828B //RX_FDEQ_GAIN_4 -44 0x8F87 //RX_FDEQ_GAIN_5 -45 0x8481 //RX_FDEQ_GAIN_6 -46 0x8980 //RX_FDEQ_GAIN_7 -47 0x8383 //RX_FDEQ_GAIN_8 -48 0x7F86 //RX_FDEQ_GAIN_9 -49 0x796F //RX_FDEQ_GAIN_10 -50 0x6B66 //RX_FDEQ_GAIN_11 -51 0x625E //RX_FDEQ_GAIN_12 -52 0x5850 //RX_FDEQ_GAIN_13 +39 0x4836 //RX_FDEQ_GAIN_0 +40 0x3636 //RX_FDEQ_GAIN_1 +41 0x364C //RX_FDEQ_GAIN_2 +42 0x586E //RX_FDEQ_GAIN_3 +43 0x767A //RX_FDEQ_GAIN_4 +44 0x7978 //RX_FDEQ_GAIN_5 +45 0x7A7C //RX_FDEQ_GAIN_6 +46 0x8280 //RX_FDEQ_GAIN_7 +47 0x848C //RX_FDEQ_GAIN_8 +48 0x8E98 //RX_FDEQ_GAIN_9 +49 0x9E95 //RX_FDEQ_GAIN_10 +50 0x8686 //RX_FDEQ_GAIN_11 +51 0x7868 //RX_FDEQ_GAIN_12 +52 0x6050 //RX_FDEQ_GAIN_13 53 0x4848 //RX_FDEQ_GAIN_14 54 0x4848 //RX_FDEQ_GAIN_15 55 0x4848 //RX_FDEQ_GAIN_16 @@ -22554,9 +33624,9 @@ 71 0x0B0C //RX_FDEQ_BIN_8 72 0x0D0E //RX_FDEQ_BIN_9 73 0x0E0F //RX_FDEQ_BIN_10 -74 0x0F10 //RX_FDEQ_BIN_11 -75 0x1011 //RX_FDEQ_BIN_12 -76 0x1104 //RX_FDEQ_BIN_13 +74 0x0F0E //RX_FDEQ_BIN_11 +75 0x100D //RX_FDEQ_BIN_12 +76 0x110A //RX_FDEQ_BIN_13 77 0x0000 //RX_FDEQ_BIN_14 78 0x0000 //RX_FDEQ_BIN_15 79 0x0000 //RX_FDEQ_BIN_16 @@ -22591,7 +33661,7 @@ 108 0x5333 //RX_FDDRC_SLANT_1_2 109 0x5333 //RX_FDDRC_SLANT_1_3 110 0x0000 //RX_FDDRC_RESRV_0 -129 0x005E //RX_SPK_VOL +129 0x0050 //RX_SPK_VOL 130 0x0000 //RX_VOL_RESRV_0 #VOL 5 6 0x1000 //RX_TDDRC_ALPHA_UP_1 @@ -22608,30 +33678,30 @@ 113 0x0000 //RX_TDDRC_THRD_1 114 0x1800 //RX_TDDRC_THRD_2 115 0x1800 //RX_TDDRC_THRD_3 -116 0x3000 //RX_TDDRC_SLANT_0 -117 0x6E00 //RX_TDDRC_SLANT_1 +116 0x7FFF //RX_TDDRC_SLANT_0 +117 0x7FFF //RX_TDDRC_SLANT_1 118 0x1000 //RX_TDDRC_ALPHA_UP_0 119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 120 0x0000 //RX_TDDRC_HMNC_FLAG 121 0x199A //RX_TDDRC_HMNC_GAIN 122 0x0001 //RX_TDDRC_SMT_FLAG 123 0x0CCD //RX_TDDRC_SMT_W -124 0x0357 //RX_TDDRC_DRC_GAIN +124 0x0650 //RX_TDDRC_DRC_GAIN 38 0x001C //RX_FDEQ_SUBNUM -39 0x4840 //RX_FDEQ_GAIN_0 -40 0x4040 //RX_FDEQ_GAIN_1 -41 0x444C //RX_FDEQ_GAIN_2 -42 0x5C6C //RX_FDEQ_GAIN_3 -43 0x828B //RX_FDEQ_GAIN_4 -44 0x8F87 //RX_FDEQ_GAIN_5 -45 0x8481 //RX_FDEQ_GAIN_6 -46 0x8980 //RX_FDEQ_GAIN_7 -47 0x8383 //RX_FDEQ_GAIN_8 -48 0x7F86 //RX_FDEQ_GAIN_9 -49 0x796F //RX_FDEQ_GAIN_10 -50 0x6B66 //RX_FDEQ_GAIN_11 -51 0x625E //RX_FDEQ_GAIN_12 -52 0x5850 //RX_FDEQ_GAIN_13 +39 0x4836 //RX_FDEQ_GAIN_0 +40 0x3636 //RX_FDEQ_GAIN_1 +41 0x364C //RX_FDEQ_GAIN_2 +42 0x586E //RX_FDEQ_GAIN_3 +43 0x767A //RX_FDEQ_GAIN_4 +44 0x7978 //RX_FDEQ_GAIN_5 +45 0x7A7C //RX_FDEQ_GAIN_6 +46 0x8280 //RX_FDEQ_GAIN_7 +47 0x848C //RX_FDEQ_GAIN_8 +48 0x8E98 //RX_FDEQ_GAIN_9 +49 0x9E95 //RX_FDEQ_GAIN_10 +50 0x8686 //RX_FDEQ_GAIN_11 +51 0x7868 //RX_FDEQ_GAIN_12 +52 0x6050 //RX_FDEQ_GAIN_13 53 0x4848 //RX_FDEQ_GAIN_14 54 0x4848 //RX_FDEQ_GAIN_15 55 0x4848 //RX_FDEQ_GAIN_16 @@ -22653,9 +33723,9 @@ 71 0x0B0C //RX_FDEQ_BIN_8 72 0x0D0E //RX_FDEQ_BIN_9 73 0x0E0F //RX_FDEQ_BIN_10 -74 0x0F10 //RX_FDEQ_BIN_11 -75 0x1011 //RX_FDEQ_BIN_12 -76 0x1104 //RX_FDEQ_BIN_13 +74 0x0F0E //RX_FDEQ_BIN_11 +75 0x100D //RX_FDEQ_BIN_12 +76 0x110A //RX_FDEQ_BIN_13 77 0x0000 //RX_FDEQ_BIN_14 78 0x0000 //RX_FDEQ_BIN_15 79 0x0000 //RX_FDEQ_BIN_16 @@ -22690,7 +33760,7 @@ 108 0x5333 //RX_FDDRC_SLANT_1_2 109 0x5333 //RX_FDDRC_SLANT_1_3 110 0x0000 //RX_FDDRC_RESRV_0 -129 0x0097 //RX_SPK_VOL +129 0x0086 //RX_SPK_VOL 130 0x0000 //RX_VOL_RESRV_0 #VOL 6 6 0x1000 //RX_TDDRC_ALPHA_UP_1 @@ -22707,30 +33777,30 @@ 113 0x0000 //RX_TDDRC_THRD_1 114 0x1800 //RX_TDDRC_THRD_2 115 0x1800 //RX_TDDRC_THRD_3 -116 0x3000 //RX_TDDRC_SLANT_0 -117 0x6E00 //RX_TDDRC_SLANT_1 +116 0x7FFF //RX_TDDRC_SLANT_0 +117 0x7FFF //RX_TDDRC_SLANT_1 118 0x1000 //RX_TDDRC_ALPHA_UP_0 119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 120 0x0000 //RX_TDDRC_HMNC_FLAG 121 0x199A //RX_TDDRC_HMNC_GAIN 122 0x0001 //RX_TDDRC_SMT_FLAG 123 0x0CCD //RX_TDDRC_SMT_W -124 0x0357 //RX_TDDRC_DRC_GAIN +124 0x0650 //RX_TDDRC_DRC_GAIN 38 0x001C //RX_FDEQ_SUBNUM -39 0x4840 //RX_FDEQ_GAIN_0 -40 0x4040 //RX_FDEQ_GAIN_1 -41 0x444C //RX_FDEQ_GAIN_2 -42 0x5C6C //RX_FDEQ_GAIN_3 -43 0x828B //RX_FDEQ_GAIN_4 -44 0x8F87 //RX_FDEQ_GAIN_5 -45 0x8481 //RX_FDEQ_GAIN_6 -46 0x8980 //RX_FDEQ_GAIN_7 -47 0x8383 //RX_FDEQ_GAIN_8 -48 0x7F86 //RX_FDEQ_GAIN_9 -49 0x796F //RX_FDEQ_GAIN_10 -50 0x6B66 //RX_FDEQ_GAIN_11 -51 0x625E //RX_FDEQ_GAIN_12 -52 0x5850 //RX_FDEQ_GAIN_13 +39 0x4836 //RX_FDEQ_GAIN_0 +40 0x3636 //RX_FDEQ_GAIN_1 +41 0x364C //RX_FDEQ_GAIN_2 +42 0x586E //RX_FDEQ_GAIN_3 +43 0x767A //RX_FDEQ_GAIN_4 +44 0x7978 //RX_FDEQ_GAIN_5 +45 0x7A7C //RX_FDEQ_GAIN_6 +46 0x8280 //RX_FDEQ_GAIN_7 +47 0x848C //RX_FDEQ_GAIN_8 +48 0x8E98 //RX_FDEQ_GAIN_9 +49 0x9E95 //RX_FDEQ_GAIN_10 +50 0x8686 //RX_FDEQ_GAIN_11 +51 0x7868 //RX_FDEQ_GAIN_12 +52 0x6050 //RX_FDEQ_GAIN_13 53 0x4848 //RX_FDEQ_GAIN_14 54 0x4848 //RX_FDEQ_GAIN_15 55 0x4848 //RX_FDEQ_GAIN_16 @@ -22752,9 +33822,9 @@ 71 0x0B0C //RX_FDEQ_BIN_8 72 0x0D0E //RX_FDEQ_BIN_9 73 0x0E0F //RX_FDEQ_BIN_10 -74 0x0F10 //RX_FDEQ_BIN_11 -75 0x1011 //RX_FDEQ_BIN_12 -76 0x1104 //RX_FDEQ_BIN_13 +74 0x0F0E //RX_FDEQ_BIN_11 +75 0x100D //RX_FDEQ_BIN_12 +76 0x110A //RX_FDEQ_BIN_13 77 0x0000 //RX_FDEQ_BIN_14 78 0x0000 //RX_FDEQ_BIN_15 79 0x0000 //RX_FDEQ_BIN_16 @@ -22791,14 +33861,866 @@ 110 0x0000 //RX_FDDRC_RESRV_0 129 0x0100 //RX_SPK_VOL 130 0x0000 //RX_VOL_RESRV_0 +#RX 2 +157 0x003C //RX_RECVFUNC_MODE_0 +158 0x0000 //RX_RECVFUNC_MODE_1 +159 0x0001 //RX_SAMPLINGFREQ_SIG +160 0x0001 //RX_SAMPLINGFREQ_PROC +161 0x000A //RX_FRAME_SZ +162 0x0000 //RX_DELAY_OPT +163 0x1000 //RX_TDDRC_ALPHA_UP_1 +164 0x1000 //RX_TDDRC_ALPHA_UP_2 +165 0x1000 //RX_TDDRC_ALPHA_UP_3 +166 0x1000 //RX_TDDRC_ALPHA_UP_4 +167 0x0600 //RX_PGA +168 0x7FFF //RX_A_HP +169 0x4000 //RX_B_PE +170 0x7800 //RX_THR_PITCH_DET_0 +171 0x7000 //RX_THR_PITCH_DET_1 +172 0x6000 //RX_THR_PITCH_DET_2 +173 0x0008 //RX_PITCH_BFR_LEN +174 0x0003 //RX_SBD_PITCH_DET +175 0x0100 //RX_PP_RESRV_0 +176 0x0020 //RX_PP_RESRV_1 +177 0x0400 //RX_N_SN_EST +178 0x000C //RX_N2_SN_EST +179 0x0014 //RX_NS_LVL_CTRL +180 0xF800 //RX_THR_SN_EST +181 0x7E00 //RX_LAMBDA_PFILT +182 0x000A //RX_FENS_RESRV_0 +183 0x0190 //RX_FENS_RESRV_1 +184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +187 0x0002 //RX_EXTRA_NS_L +188 0x0800 //RX_EXTRA_NS_A +189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +190 0x7000 //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +192 0x199A //RX_A_POST_FLT +193 0x1000 //RX_LMT_THRD +194 0x7FDF //RX_LMT_ALPHA +195 0x001C //RX_FDEQ_SUBNUM +196 0x4840 //RX_FDEQ_GAIN_0 +197 0x4040 //RX_FDEQ_GAIN_1 +198 0x485C //RX_FDEQ_GAIN_2 +199 0x6873 //RX_FDEQ_GAIN_3 +200 0x7F8E //RX_FDEQ_GAIN_4 +201 0x847E //RX_FDEQ_GAIN_5 +202 0x7E80 //RX_FDEQ_GAIN_6 +203 0x8884 //RX_FDEQ_GAIN_7 +204 0x8890 //RX_FDEQ_GAIN_8 +205 0x8E8F //RX_FDEQ_GAIN_9 +206 0x8B77 //RX_FDEQ_GAIN_10 +207 0x6F7F //RX_FDEQ_GAIN_11 +208 0x6568 //RX_FDEQ_GAIN_12 +209 0x6050 //RX_FDEQ_GAIN_13 +210 0x4848 //RX_FDEQ_GAIN_14 +211 0x4848 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0202 //RX_FDEQ_BIN_0 +221 0x0203 //RX_FDEQ_BIN_1 +222 0x0303 //RX_FDEQ_BIN_2 +223 0x0304 //RX_FDEQ_BIN_3 +224 0x0405 //RX_FDEQ_BIN_4 +225 0x0506 //RX_FDEQ_BIN_5 +226 0x0708 //RX_FDEQ_BIN_6 +227 0x090A //RX_FDEQ_BIN_7 +228 0x0B0C //RX_FDEQ_BIN_8 +229 0x0D0E //RX_FDEQ_BIN_9 +230 0x0E0F //RX_FDEQ_BIN_10 +231 0x0F10 //RX_FDEQ_BIN_11 +232 0x1011 //RX_FDEQ_BIN_12 +233 0x1104 //RX_FDEQ_BIN_13 +234 0x0000 //RX_FDEQ_BIN_14 +235 0x0000 //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x4000 //RX_FDEQ_RESRV_0 +245 0x0320 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0030 //RX_FDDRC_BAND_MARGIN_1 +248 0x0050 //RX_FDDRC_BAND_MARGIN_2 +249 0x0080 //RX_FDDRC_BAND_MARGIN_3 +250 0x0007 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x5000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x6400 //RX_FDDRC_THRD_3_2 +258 0x6400 //RX_FDDRC_THRD_3_3 +259 0x2000 //RX_FDDRC_SLANT_0_0 +260 0x2000 //RX_FDDRC_SLANT_0_1 +261 0x2000 //RX_FDDRC_SLANT_0_2 +262 0x2000 //RX_FDDRC_SLANT_0_3 +263 0x5333 //RX_FDDRC_SLANT_1_0 +264 0x5333 //RX_FDDRC_SLANT_1_1 +265 0x5333 //RX_FDDRC_SLANT_1_2 +266 0x5333 //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +268 0x0002 //RX_FILTINDX +269 0x0000 //RX_TDDRC_THRD_0 +270 0x0000 //RX_TDDRC_THRD_1 +271 0x1800 //RX_TDDRC_THRD_2 +272 0x1800 //RX_TDDRC_THRD_3 +273 0x3000 //RX_TDDRC_SLANT_0 +274 0x6E00 //RX_TDDRC_SLANT_1 +275 0x1000 //RX_TDDRC_ALPHA_UP_0 +276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x199A //RX_TDDRC_HMNC_GAIN +279 0x0001 //RX_TDDRC_SMT_FLAG +280 0x0CCD //RX_TDDRC_SMT_W +281 0x0407 //RX_TDDRC_DRC_GAIN +282 0x7C00 //RX_LAMBDA_PKA_FP +283 0x13E0 //RX_TPKA_FP +284 0x0080 //RX_MIN_G_FP +285 0x2000 //RX_MAX_G_FP +286 0x000C //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 +288 0x0000 //RX_MAXLEVEL_CNG +289 0x3000 //RX_BWE_UV_TH +290 0x3000 //RX_BWE_UV_TH2 +291 0x1800 //RX_BWE_UV_TH3 +292 0x1000 //RX_BWE_V_TH +293 0x04CD //RX_BWE_GAIN1_V_TH1 +294 0x0F33 //RX_BWE_GAIN1_V_TH2 +295 0x7333 //RX_BWE_UV_EQ +296 0x199A //RX_BWE_V_EQ +297 0x7333 //RX_BWE_TONE_TH +298 0x0004 //RX_BWE_UV_HOLD_T +299 0x6CCD //RX_BWE_GAIN2_ALPHA +300 0x799A //RX_BWE_GAIN3_ALPHA +301 0x001E //RX_BWE_CUTOFF +302 0x3000 //RX_BWE_GAINFILL +303 0x3200 //RX_BWE_MAXTH_TONE +304 0x2000 //RX_BWE_EQ_0 +305 0x2000 //RX_BWE_EQ_1 +306 0x2000 //RX_BWE_EQ_2 +307 0x2000 //RX_BWE_EQ_3 +308 0x2000 //RX_BWE_EQ_4 +309 0x2000 //RX_BWE_EQ_5 +310 0x2000 //RX_BWE_EQ_6 +311 0x0000 //RX_BWE_RESRV_0 +312 0x0000 //RX_BWE_RESRV_1 +313 0x0000 //RX_BWE_RESRV_2 +#VOL 0 +163 0x1000 //RX_TDDRC_ALPHA_UP_1 +164 0x1000 //RX_TDDRC_ALPHA_UP_2 +165 0x1000 //RX_TDDRC_ALPHA_UP_3 +166 0x1000 //RX_TDDRC_ALPHA_UP_4 +184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +190 0x7000 //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +269 0x0000 //RX_TDDRC_THRD_0 +270 0x0000 //RX_TDDRC_THRD_1 +271 0x1800 //RX_TDDRC_THRD_2 +272 0x1800 //RX_TDDRC_THRD_3 +273 0x3000 //RX_TDDRC_SLANT_0 +274 0x6E00 //RX_TDDRC_SLANT_1 +275 0x1000 //RX_TDDRC_ALPHA_UP_0 +276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x199A //RX_TDDRC_HMNC_GAIN +279 0x0001 //RX_TDDRC_SMT_FLAG +280 0x0CCD //RX_TDDRC_SMT_W +281 0x0407 //RX_TDDRC_DRC_GAIN +195 0x001C //RX_FDEQ_SUBNUM +196 0x4840 //RX_FDEQ_GAIN_0 +197 0x4040 //RX_FDEQ_GAIN_1 +198 0x485C //RX_FDEQ_GAIN_2 +199 0x6873 //RX_FDEQ_GAIN_3 +200 0x7F8E //RX_FDEQ_GAIN_4 +201 0x847E //RX_FDEQ_GAIN_5 +202 0x7E80 //RX_FDEQ_GAIN_6 +203 0x8884 //RX_FDEQ_GAIN_7 +204 0x8890 //RX_FDEQ_GAIN_8 +205 0x8E8F //RX_FDEQ_GAIN_9 +206 0x8B77 //RX_FDEQ_GAIN_10 +207 0x6F7F //RX_FDEQ_GAIN_11 +208 0x6568 //RX_FDEQ_GAIN_12 +209 0x6050 //RX_FDEQ_GAIN_13 +210 0x4848 //RX_FDEQ_GAIN_14 +211 0x4848 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0202 //RX_FDEQ_BIN_0 +221 0x0203 //RX_FDEQ_BIN_1 +222 0x0303 //RX_FDEQ_BIN_2 +223 0x0304 //RX_FDEQ_BIN_3 +224 0x0405 //RX_FDEQ_BIN_4 +225 0x0506 //RX_FDEQ_BIN_5 +226 0x0708 //RX_FDEQ_BIN_6 +227 0x090A //RX_FDEQ_BIN_7 +228 0x0B0C //RX_FDEQ_BIN_8 +229 0x0D0E //RX_FDEQ_BIN_9 +230 0x0E0F //RX_FDEQ_BIN_10 +231 0x0F10 //RX_FDEQ_BIN_11 +232 0x1011 //RX_FDEQ_BIN_12 +233 0x1104 //RX_FDEQ_BIN_13 +234 0x0000 //RX_FDEQ_BIN_14 +235 0x0000 //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x4000 //RX_FDEQ_RESRV_0 +245 0x0320 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0030 //RX_FDDRC_BAND_MARGIN_1 +248 0x0050 //RX_FDDRC_BAND_MARGIN_2 +249 0x0080 //RX_FDDRC_BAND_MARGIN_3 +250 0x0007 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x5000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x6400 //RX_FDDRC_THRD_3_2 +258 0x6400 //RX_FDDRC_THRD_3_3 +259 0x2000 //RX_FDDRC_SLANT_0_0 +260 0x2000 //RX_FDDRC_SLANT_0_1 +261 0x2000 //RX_FDDRC_SLANT_0_2 +262 0x2000 //RX_FDDRC_SLANT_0_3 +263 0x5333 //RX_FDDRC_SLANT_1_0 +264 0x5333 //RX_FDDRC_SLANT_1_1 +265 0x5333 //RX_FDDRC_SLANT_1_2 +266 0x5333 //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +286 0x000C //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 +#VOL 1 +163 0x1000 //RX_TDDRC_ALPHA_UP_1 +164 0x1000 //RX_TDDRC_ALPHA_UP_2 +165 0x1000 //RX_TDDRC_ALPHA_UP_3 +166 0x1000 //RX_TDDRC_ALPHA_UP_4 +184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +190 0x7000 //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +269 0x0000 //RX_TDDRC_THRD_0 +270 0x0000 //RX_TDDRC_THRD_1 +271 0x1800 //RX_TDDRC_THRD_2 +272 0x1800 //RX_TDDRC_THRD_3 +273 0x3000 //RX_TDDRC_SLANT_0 +274 0x6E00 //RX_TDDRC_SLANT_1 +275 0x1000 //RX_TDDRC_ALPHA_UP_0 +276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x199A //RX_TDDRC_HMNC_GAIN +279 0x0001 //RX_TDDRC_SMT_FLAG +280 0x0CCD //RX_TDDRC_SMT_W +281 0x0407 //RX_TDDRC_DRC_GAIN +195 0x001C //RX_FDEQ_SUBNUM +196 0x4840 //RX_FDEQ_GAIN_0 +197 0x4040 //RX_FDEQ_GAIN_1 +198 0x485C //RX_FDEQ_GAIN_2 +199 0x6873 //RX_FDEQ_GAIN_3 +200 0x7F8E //RX_FDEQ_GAIN_4 +201 0x847E //RX_FDEQ_GAIN_5 +202 0x7E80 //RX_FDEQ_GAIN_6 +203 0x8884 //RX_FDEQ_GAIN_7 +204 0x8890 //RX_FDEQ_GAIN_8 +205 0x8E8F //RX_FDEQ_GAIN_9 +206 0x8B77 //RX_FDEQ_GAIN_10 +207 0x6F7F //RX_FDEQ_GAIN_11 +208 0x6568 //RX_FDEQ_GAIN_12 +209 0x6050 //RX_FDEQ_GAIN_13 +210 0x4848 //RX_FDEQ_GAIN_14 +211 0x4848 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0202 //RX_FDEQ_BIN_0 +221 0x0203 //RX_FDEQ_BIN_1 +222 0x0303 //RX_FDEQ_BIN_2 +223 0x0304 //RX_FDEQ_BIN_3 +224 0x0405 //RX_FDEQ_BIN_4 +225 0x0506 //RX_FDEQ_BIN_5 +226 0x0708 //RX_FDEQ_BIN_6 +227 0x090A //RX_FDEQ_BIN_7 +228 0x0B0C //RX_FDEQ_BIN_8 +229 0x0D0E //RX_FDEQ_BIN_9 +230 0x0E0F //RX_FDEQ_BIN_10 +231 0x0F10 //RX_FDEQ_BIN_11 +232 0x1011 //RX_FDEQ_BIN_12 +233 0x1104 //RX_FDEQ_BIN_13 +234 0x0000 //RX_FDEQ_BIN_14 +235 0x0000 //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x4000 //RX_FDEQ_RESRV_0 +245 0x0320 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0030 //RX_FDDRC_BAND_MARGIN_1 +248 0x0050 //RX_FDDRC_BAND_MARGIN_2 +249 0x0080 //RX_FDDRC_BAND_MARGIN_3 +250 0x0007 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x5000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x6400 //RX_FDDRC_THRD_3_2 +258 0x6400 //RX_FDDRC_THRD_3_3 +259 0x2000 //RX_FDDRC_SLANT_0_0 +260 0x2000 //RX_FDDRC_SLANT_0_1 +261 0x2000 //RX_FDDRC_SLANT_0_2 +262 0x2000 //RX_FDDRC_SLANT_0_3 +263 0x5333 //RX_FDDRC_SLANT_1_0 +264 0x5333 //RX_FDDRC_SLANT_1_1 +265 0x5333 //RX_FDDRC_SLANT_1_2 +266 0x5333 //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +286 0x0014 //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 +#VOL 2 +163 0x1000 //RX_TDDRC_ALPHA_UP_1 +164 0x1000 //RX_TDDRC_ALPHA_UP_2 +165 0x1000 //RX_TDDRC_ALPHA_UP_3 +166 0x1000 //RX_TDDRC_ALPHA_UP_4 +184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +190 0x7000 //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +269 0x0000 //RX_TDDRC_THRD_0 +270 0x0000 //RX_TDDRC_THRD_1 +271 0x1800 //RX_TDDRC_THRD_2 +272 0x1800 //RX_TDDRC_THRD_3 +273 0x3000 //RX_TDDRC_SLANT_0 +274 0x6E00 //RX_TDDRC_SLANT_1 +275 0x1000 //RX_TDDRC_ALPHA_UP_0 +276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x199A //RX_TDDRC_HMNC_GAIN +279 0x0001 //RX_TDDRC_SMT_FLAG +280 0x0CCD //RX_TDDRC_SMT_W +281 0x0407 //RX_TDDRC_DRC_GAIN +195 0x001C //RX_FDEQ_SUBNUM +196 0x4840 //RX_FDEQ_GAIN_0 +197 0x4040 //RX_FDEQ_GAIN_1 +198 0x485C //RX_FDEQ_GAIN_2 +199 0x6873 //RX_FDEQ_GAIN_3 +200 0x7F8E //RX_FDEQ_GAIN_4 +201 0x847E //RX_FDEQ_GAIN_5 +202 0x7E80 //RX_FDEQ_GAIN_6 +203 0x8884 //RX_FDEQ_GAIN_7 +204 0x8890 //RX_FDEQ_GAIN_8 +205 0x8E8F //RX_FDEQ_GAIN_9 +206 0x8B77 //RX_FDEQ_GAIN_10 +207 0x6F7F //RX_FDEQ_GAIN_11 +208 0x6568 //RX_FDEQ_GAIN_12 +209 0x6050 //RX_FDEQ_GAIN_13 +210 0x4848 //RX_FDEQ_GAIN_14 +211 0x4848 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0202 //RX_FDEQ_BIN_0 +221 0x0203 //RX_FDEQ_BIN_1 +222 0x0303 //RX_FDEQ_BIN_2 +223 0x0304 //RX_FDEQ_BIN_3 +224 0x0405 //RX_FDEQ_BIN_4 +225 0x0506 //RX_FDEQ_BIN_5 +226 0x0708 //RX_FDEQ_BIN_6 +227 0x090A //RX_FDEQ_BIN_7 +228 0x0B0C //RX_FDEQ_BIN_8 +229 0x0D0E //RX_FDEQ_BIN_9 +230 0x0E0F //RX_FDEQ_BIN_10 +231 0x0F10 //RX_FDEQ_BIN_11 +232 0x1011 //RX_FDEQ_BIN_12 +233 0x1104 //RX_FDEQ_BIN_13 +234 0x0000 //RX_FDEQ_BIN_14 +235 0x0000 //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x4000 //RX_FDEQ_RESRV_0 +245 0x0320 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0030 //RX_FDDRC_BAND_MARGIN_1 +248 0x0050 //RX_FDDRC_BAND_MARGIN_2 +249 0x0080 //RX_FDDRC_BAND_MARGIN_3 +250 0x0007 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x5000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x6400 //RX_FDDRC_THRD_3_2 +258 0x6400 //RX_FDDRC_THRD_3_3 +259 0x2000 //RX_FDDRC_SLANT_0_0 +260 0x2000 //RX_FDDRC_SLANT_0_1 +261 0x2000 //RX_FDDRC_SLANT_0_2 +262 0x2000 //RX_FDDRC_SLANT_0_3 +263 0x5333 //RX_FDDRC_SLANT_1_0 +264 0x5333 //RX_FDDRC_SLANT_1_1 +265 0x5333 //RX_FDDRC_SLANT_1_2 +266 0x5333 //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +286 0x0020 //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 +#VOL 3 +163 0x1000 //RX_TDDRC_ALPHA_UP_1 +164 0x1000 //RX_TDDRC_ALPHA_UP_2 +165 0x1000 //RX_TDDRC_ALPHA_UP_3 +166 0x1000 //RX_TDDRC_ALPHA_UP_4 +184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +190 0x7000 //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +269 0x0000 //RX_TDDRC_THRD_0 +270 0x0000 //RX_TDDRC_THRD_1 +271 0x1800 //RX_TDDRC_THRD_2 +272 0x1800 //RX_TDDRC_THRD_3 +273 0x3000 //RX_TDDRC_SLANT_0 +274 0x6E00 //RX_TDDRC_SLANT_1 +275 0x1000 //RX_TDDRC_ALPHA_UP_0 +276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x199A //RX_TDDRC_HMNC_GAIN +279 0x0001 //RX_TDDRC_SMT_FLAG +280 0x0CCD //RX_TDDRC_SMT_W +281 0x0407 //RX_TDDRC_DRC_GAIN +195 0x001C //RX_FDEQ_SUBNUM +196 0x4840 //RX_FDEQ_GAIN_0 +197 0x4040 //RX_FDEQ_GAIN_1 +198 0x485C //RX_FDEQ_GAIN_2 +199 0x6873 //RX_FDEQ_GAIN_3 +200 0x7F8E //RX_FDEQ_GAIN_4 +201 0x847E //RX_FDEQ_GAIN_5 +202 0x7E80 //RX_FDEQ_GAIN_6 +203 0x8884 //RX_FDEQ_GAIN_7 +204 0x8890 //RX_FDEQ_GAIN_8 +205 0x8E8F //RX_FDEQ_GAIN_9 +206 0x8B77 //RX_FDEQ_GAIN_10 +207 0x6F7F //RX_FDEQ_GAIN_11 +208 0x6568 //RX_FDEQ_GAIN_12 +209 0x6050 //RX_FDEQ_GAIN_13 +210 0x4848 //RX_FDEQ_GAIN_14 +211 0x4848 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0202 //RX_FDEQ_BIN_0 +221 0x0203 //RX_FDEQ_BIN_1 +222 0x0303 //RX_FDEQ_BIN_2 +223 0x0304 //RX_FDEQ_BIN_3 +224 0x0405 //RX_FDEQ_BIN_4 +225 0x0506 //RX_FDEQ_BIN_5 +226 0x0708 //RX_FDEQ_BIN_6 +227 0x090A //RX_FDEQ_BIN_7 +228 0x0B0C //RX_FDEQ_BIN_8 +229 0x0D0E //RX_FDEQ_BIN_9 +230 0x0E0F //RX_FDEQ_BIN_10 +231 0x0F10 //RX_FDEQ_BIN_11 +232 0x1011 //RX_FDEQ_BIN_12 +233 0x1104 //RX_FDEQ_BIN_13 +234 0x0000 //RX_FDEQ_BIN_14 +235 0x0000 //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x4000 //RX_FDEQ_RESRV_0 +245 0x0320 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0030 //RX_FDDRC_BAND_MARGIN_1 +248 0x0050 //RX_FDDRC_BAND_MARGIN_2 +249 0x0080 //RX_FDDRC_BAND_MARGIN_3 +250 0x0007 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x5000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x6400 //RX_FDDRC_THRD_3_2 +258 0x6400 //RX_FDDRC_THRD_3_3 +259 0x2000 //RX_FDDRC_SLANT_0_0 +260 0x2000 //RX_FDDRC_SLANT_0_1 +261 0x2000 //RX_FDDRC_SLANT_0_2 +262 0x2000 //RX_FDDRC_SLANT_0_3 +263 0x5333 //RX_FDDRC_SLANT_1_0 +264 0x5333 //RX_FDDRC_SLANT_1_1 +265 0x5333 //RX_FDDRC_SLANT_1_2 +266 0x5333 //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +286 0x0035 //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 +#VOL 4 +163 0x1000 //RX_TDDRC_ALPHA_UP_1 +164 0x1000 //RX_TDDRC_ALPHA_UP_2 +165 0x1000 //RX_TDDRC_ALPHA_UP_3 +166 0x1000 //RX_TDDRC_ALPHA_UP_4 +184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +190 0x7000 //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +269 0x0000 //RX_TDDRC_THRD_0 +270 0x0000 //RX_TDDRC_THRD_1 +271 0x1800 //RX_TDDRC_THRD_2 +272 0x1800 //RX_TDDRC_THRD_3 +273 0x3000 //RX_TDDRC_SLANT_0 +274 0x6E00 //RX_TDDRC_SLANT_1 +275 0x1000 //RX_TDDRC_ALPHA_UP_0 +276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x199A //RX_TDDRC_HMNC_GAIN +279 0x0001 //RX_TDDRC_SMT_FLAG +280 0x0CCD //RX_TDDRC_SMT_W +281 0x0407 //RX_TDDRC_DRC_GAIN +195 0x001C //RX_FDEQ_SUBNUM +196 0x4840 //RX_FDEQ_GAIN_0 +197 0x4040 //RX_FDEQ_GAIN_1 +198 0x485C //RX_FDEQ_GAIN_2 +199 0x6873 //RX_FDEQ_GAIN_3 +200 0x7F8E //RX_FDEQ_GAIN_4 +201 0x847E //RX_FDEQ_GAIN_5 +202 0x7E80 //RX_FDEQ_GAIN_6 +203 0x8884 //RX_FDEQ_GAIN_7 +204 0x8890 //RX_FDEQ_GAIN_8 +205 0x8E8F //RX_FDEQ_GAIN_9 +206 0x8B77 //RX_FDEQ_GAIN_10 +207 0x6F7F //RX_FDEQ_GAIN_11 +208 0x6568 //RX_FDEQ_GAIN_12 +209 0x6050 //RX_FDEQ_GAIN_13 +210 0x4848 //RX_FDEQ_GAIN_14 +211 0x4848 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0202 //RX_FDEQ_BIN_0 +221 0x0203 //RX_FDEQ_BIN_1 +222 0x0303 //RX_FDEQ_BIN_2 +223 0x0304 //RX_FDEQ_BIN_3 +224 0x0405 //RX_FDEQ_BIN_4 +225 0x0506 //RX_FDEQ_BIN_5 +226 0x0708 //RX_FDEQ_BIN_6 +227 0x090A //RX_FDEQ_BIN_7 +228 0x0B0C //RX_FDEQ_BIN_8 +229 0x0D0E //RX_FDEQ_BIN_9 +230 0x0E0F //RX_FDEQ_BIN_10 +231 0x0F10 //RX_FDEQ_BIN_11 +232 0x1011 //RX_FDEQ_BIN_12 +233 0x1104 //RX_FDEQ_BIN_13 +234 0x0000 //RX_FDEQ_BIN_14 +235 0x0000 //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x4000 //RX_FDEQ_RESRV_0 +245 0x0320 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0030 //RX_FDDRC_BAND_MARGIN_1 +248 0x0050 //RX_FDDRC_BAND_MARGIN_2 +249 0x0080 //RX_FDDRC_BAND_MARGIN_3 +250 0x0007 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x5000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x6400 //RX_FDDRC_THRD_3_2 +258 0x6400 //RX_FDDRC_THRD_3_3 +259 0x2000 //RX_FDDRC_SLANT_0_0 +260 0x2000 //RX_FDDRC_SLANT_0_1 +261 0x2000 //RX_FDDRC_SLANT_0_2 +262 0x2000 //RX_FDDRC_SLANT_0_3 +263 0x5333 //RX_FDDRC_SLANT_1_0 +264 0x5333 //RX_FDDRC_SLANT_1_1 +265 0x5333 //RX_FDDRC_SLANT_1_2 +266 0x5333 //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +286 0x0057 //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 +#VOL 5 +163 0x1000 //RX_TDDRC_ALPHA_UP_1 +164 0x1000 //RX_TDDRC_ALPHA_UP_2 +165 0x1000 //RX_TDDRC_ALPHA_UP_3 +166 0x1000 //RX_TDDRC_ALPHA_UP_4 +184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +190 0x7000 //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +269 0x0000 //RX_TDDRC_THRD_0 +270 0x0000 //RX_TDDRC_THRD_1 +271 0x1800 //RX_TDDRC_THRD_2 +272 0x1800 //RX_TDDRC_THRD_3 +273 0x3000 //RX_TDDRC_SLANT_0 +274 0x6E00 //RX_TDDRC_SLANT_1 +275 0x1000 //RX_TDDRC_ALPHA_UP_0 +276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x199A //RX_TDDRC_HMNC_GAIN +279 0x0001 //RX_TDDRC_SMT_FLAG +280 0x0CCD //RX_TDDRC_SMT_W +281 0x0407 //RX_TDDRC_DRC_GAIN +195 0x001C //RX_FDEQ_SUBNUM +196 0x4840 //RX_FDEQ_GAIN_0 +197 0x4040 //RX_FDEQ_GAIN_1 +198 0x485C //RX_FDEQ_GAIN_2 +199 0x6873 //RX_FDEQ_GAIN_3 +200 0x7F8E //RX_FDEQ_GAIN_4 +201 0x847E //RX_FDEQ_GAIN_5 +202 0x7E80 //RX_FDEQ_GAIN_6 +203 0x8884 //RX_FDEQ_GAIN_7 +204 0x8890 //RX_FDEQ_GAIN_8 +205 0x8E8F //RX_FDEQ_GAIN_9 +206 0x8B77 //RX_FDEQ_GAIN_10 +207 0x6F7F //RX_FDEQ_GAIN_11 +208 0x6568 //RX_FDEQ_GAIN_12 +209 0x6050 //RX_FDEQ_GAIN_13 +210 0x4848 //RX_FDEQ_GAIN_14 +211 0x4848 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0202 //RX_FDEQ_BIN_0 +221 0x0203 //RX_FDEQ_BIN_1 +222 0x0303 //RX_FDEQ_BIN_2 +223 0x0304 //RX_FDEQ_BIN_3 +224 0x0405 //RX_FDEQ_BIN_4 +225 0x0506 //RX_FDEQ_BIN_5 +226 0x0708 //RX_FDEQ_BIN_6 +227 0x090A //RX_FDEQ_BIN_7 +228 0x0B0C //RX_FDEQ_BIN_8 +229 0x0D0E //RX_FDEQ_BIN_9 +230 0x0E0F //RX_FDEQ_BIN_10 +231 0x0F10 //RX_FDEQ_BIN_11 +232 0x1011 //RX_FDEQ_BIN_12 +233 0x1104 //RX_FDEQ_BIN_13 +234 0x0000 //RX_FDEQ_BIN_14 +235 0x0000 //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x4000 //RX_FDEQ_RESRV_0 +245 0x0320 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0030 //RX_FDDRC_BAND_MARGIN_1 +248 0x0050 //RX_FDDRC_BAND_MARGIN_2 +249 0x0080 //RX_FDDRC_BAND_MARGIN_3 +250 0x0007 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x5000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x6400 //RX_FDDRC_THRD_3_2 +258 0x6400 //RX_FDDRC_THRD_3_3 +259 0x2000 //RX_FDDRC_SLANT_0_0 +260 0x2000 //RX_FDDRC_SLANT_0_1 +261 0x2000 //RX_FDDRC_SLANT_0_2 +262 0x2000 //RX_FDDRC_SLANT_0_3 +263 0x5333 //RX_FDDRC_SLANT_1_0 +264 0x5333 //RX_FDDRC_SLANT_1_1 +265 0x5333 //RX_FDDRC_SLANT_1_2 +266 0x5333 //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +286 0x008E //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 +#VOL 6 +163 0x1000 //RX_TDDRC_ALPHA_UP_1 +164 0x1000 //RX_TDDRC_ALPHA_UP_2 +165 0x1000 //RX_TDDRC_ALPHA_UP_3 +166 0x1000 //RX_TDDRC_ALPHA_UP_4 +184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +190 0x7000 //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +269 0x0000 //RX_TDDRC_THRD_0 +270 0x0000 //RX_TDDRC_THRD_1 +271 0x1800 //RX_TDDRC_THRD_2 +272 0x1800 //RX_TDDRC_THRD_3 +273 0x3000 //RX_TDDRC_SLANT_0 +274 0x6E00 //RX_TDDRC_SLANT_1 +275 0x1000 //RX_TDDRC_ALPHA_UP_0 +276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x199A //RX_TDDRC_HMNC_GAIN +279 0x0001 //RX_TDDRC_SMT_FLAG +280 0x0CCD //RX_TDDRC_SMT_W +281 0x0407 //RX_TDDRC_DRC_GAIN +195 0x001C //RX_FDEQ_SUBNUM +196 0x4840 //RX_FDEQ_GAIN_0 +197 0x4040 //RX_FDEQ_GAIN_1 +198 0x485C //RX_FDEQ_GAIN_2 +199 0x6873 //RX_FDEQ_GAIN_3 +200 0x7F8E //RX_FDEQ_GAIN_4 +201 0x847E //RX_FDEQ_GAIN_5 +202 0x7E80 //RX_FDEQ_GAIN_6 +203 0x8884 //RX_FDEQ_GAIN_7 +204 0x8890 //RX_FDEQ_GAIN_8 +205 0x8E8F //RX_FDEQ_GAIN_9 +206 0x8B77 //RX_FDEQ_GAIN_10 +207 0x6F7F //RX_FDEQ_GAIN_11 +208 0x6568 //RX_FDEQ_GAIN_12 +209 0x6050 //RX_FDEQ_GAIN_13 +210 0x4848 //RX_FDEQ_GAIN_14 +211 0x4848 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0202 //RX_FDEQ_BIN_0 +221 0x0203 //RX_FDEQ_BIN_1 +222 0x0303 //RX_FDEQ_BIN_2 +223 0x0304 //RX_FDEQ_BIN_3 +224 0x0405 //RX_FDEQ_BIN_4 +225 0x0506 //RX_FDEQ_BIN_5 +226 0x0708 //RX_FDEQ_BIN_6 +227 0x090A //RX_FDEQ_BIN_7 +228 0x0B0C //RX_FDEQ_BIN_8 +229 0x0D0E //RX_FDEQ_BIN_9 +230 0x0E0F //RX_FDEQ_BIN_10 +231 0x0F10 //RX_FDEQ_BIN_11 +232 0x1011 //RX_FDEQ_BIN_12 +233 0x1104 //RX_FDEQ_BIN_13 +234 0x0000 //RX_FDEQ_BIN_14 +235 0x0000 //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x4000 //RX_FDEQ_RESRV_0 +245 0x0320 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0030 //RX_FDDRC_BAND_MARGIN_1 +248 0x0050 //RX_FDDRC_BAND_MARGIN_2 +249 0x0080 //RX_FDDRC_BAND_MARGIN_3 +250 0x0007 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x5000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x6400 //RX_FDDRC_THRD_3_2 +258 0x6400 //RX_FDDRC_THRD_3_3 +259 0x2000 //RX_FDDRC_SLANT_0_0 +260 0x2000 //RX_FDDRC_SLANT_0_1 +261 0x2000 //RX_FDDRC_SLANT_0_2 +262 0x2000 //RX_FDDRC_SLANT_0_3 +263 0x5333 //RX_FDDRC_SLANT_1_0 +264 0x5333 //RX_FDDRC_SLANT_1_1 +265 0x5333 //RX_FDDRC_SLANT_1_2 +266 0x5333 //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +286 0x0100 //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 #CASE_NAME HANDSET-HANDSET-TMOBILE_US-SWB -#PARAM_TYPE TX+RX -#TOTAL_CUSTOM_STEP 7 +#PARAM_MODE Full +#PARAM_TYPE TX+2RX +#TOTAL_CUSTOM_STEP 7+7 #TX 0 0x0000 //TX_OPERATION_MODE_0 1 0x0000 //TX_OPERATION_MODE_1 -2 0x0026 //TX_PATCH_REG +2 0x0076 //TX_PATCH_REG 3 0x6F7E //TX_SENDFUNC_MODE_0 4 0x0001 //TX_SENDFUNC_MODE_1 5 0x0002 //TX_NUM_MIC @@ -22817,7 +34739,7 @@ 18 0x0000 //TX_SYS_RESRV_2 19 0x0000 //TX_SYS_RESRV_3 20 0x0000 //TX_DIST2REF0 -21 0x009D //TX_DIST2REF1 +21 0x009C //TX_DIST2REF1 22 0x0000 //TX_DIST2REF_02 23 0x0000 //TX_DIST2REF_03 24 0x0000 //TX_DIST2REF_04 @@ -23047,12 +34969,12 @@ 248 0xF800 //TX_THR_SN_EST_6 249 0xF700 //TX_THR_SN_EST_7 250 0x0000 //TX_DELTA_THR_SN_EST_0 -251 0x0100 //TX_DELTA_THR_SN_EST_1 +251 0x0200 //TX_DELTA_THR_SN_EST_1 252 0x0200 //TX_DELTA_THR_SN_EST_2 253 0x0200 //TX_DELTA_THR_SN_EST_3 -254 0x0200 //TX_DELTA_THR_SN_EST_4 -255 0x0100 //TX_DELTA_THR_SN_EST_5 -256 0x0200 //TX_DELTA_THR_SN_EST_6 +254 0x0100 //TX_DELTA_THR_SN_EST_4 +255 0x0200 //TX_DELTA_THR_SN_EST_5 +256 0x0100 //TX_DELTA_THR_SN_EST_6 257 0x0200 //TX_DELTA_THR_SN_EST_7 258 0x4000 //TX_LAMBDA_NN_EST_0 259 0x4000 //TX_LAMBDA_NN_EST_1 @@ -23078,18 +35000,18 @@ 279 0x1000 //TX_B_POST_FLT_0 280 0x1000 //TX_B_POST_FLT_1 281 0x0014 //TX_NS_LVL_CTRL_0 -282 0x0016 //TX_NS_LVL_CTRL_1 -283 0x002C //TX_NS_LVL_CTRL_2 -284 0x0016 //TX_NS_LVL_CTRL_3 -285 0x0018 //TX_NS_LVL_CTRL_4 -286 0x0016 //TX_NS_LVL_CTRL_5 -287 0x0012 //TX_NS_LVL_CTRL_6 +282 0x002C //TX_NS_LVL_CTRL_1 +283 0x0016 //TX_NS_LVL_CTRL_2 +284 0x0018 //TX_NS_LVL_CTRL_3 +285 0x0016 //TX_NS_LVL_CTRL_4 +286 0x0012 //TX_NS_LVL_CTRL_5 +287 0x0016 //TX_NS_LVL_CTRL_6 288 0x0017 //TX_NS_LVL_CTRL_7 289 0x000E //TX_MIN_GAIN_S_0 -290 0x0012 //TX_MIN_GAIN_S_1 -291 0x000D //TX_MIN_GAIN_S_2 -292 0x0012 //TX_MIN_GAIN_S_3 -293 0x0010 //TX_MIN_GAIN_S_4 +290 0x000D //TX_MIN_GAIN_S_1 +291 0x0012 //TX_MIN_GAIN_S_2 +292 0x0010 //TX_MIN_GAIN_S_3 +293 0x0012 //TX_MIN_GAIN_S_4 294 0x0012 //TX_MIN_GAIN_S_5 295 0x0012 //TX_MIN_GAIN_S_6 296 0x0012 //TX_MIN_GAIN_S_7 @@ -23111,29 +35033,29 @@ 312 0x7FFF //TX_A_POST_FILT_0 313 0x2000 //TX_A_POST_FILT_1 314 0x4000 //TX_A_POST_FILT_S_0 -315 0x5000 //TX_A_POST_FILT_S_1 +315 0x4000 //TX_A_POST_FILT_S_1 316 0x4000 //TX_A_POST_FILT_S_2 317 0x4000 //TX_A_POST_FILT_S_3 318 0x4000 //TX_A_POST_FILT_S_4 319 0x4000 //TX_A_POST_FILT_S_5 -320 0x4000 //TX_A_POST_FILT_S_6 +320 0x5000 //TX_A_POST_FILT_S_6 321 0x7000 //TX_A_POST_FILT_S_7 322 0x1000 //TX_B_POST_FILT_0 323 0x1000 //TX_B_POST_FILT_1 -324 0x3000 //TX_B_POST_FILT_2 -325 0x1000 //TX_B_POST_FILT_3 -326 0x5000 //TX_B_POST_FILT_4 -327 0x2000 //TX_B_POST_FILT_5 -328 0x6000 //TX_B_POST_FILT_6 +324 0x2000 //TX_B_POST_FILT_2 +325 0x2000 //TX_B_POST_FILT_3 +326 0x2000 //TX_B_POST_FILT_4 +327 0x1000 //TX_B_POST_FILT_5 +328 0x3000 //TX_B_POST_FILT_6 329 0x3000 //TX_B_POST_FILT_7 330 0x1000 //TX_B_LESSCUT_RTO_S_0 -331 0x6000 //TX_B_LESSCUT_RTO_S_1 -332 0x6000 //TX_B_LESSCUT_RTO_S_2 -333 0x6000 //TX_B_LESSCUT_RTO_S_3 -334 0x6000 //TX_B_LESSCUT_RTO_S_4 -335 0x6000 //TX_B_LESSCUT_RTO_S_5 -336 0x7FFF //TX_B_LESSCUT_RTO_S_6 -337 0x7FFF //TX_B_LESSCUT_RTO_S_7 +331 0x1000 //TX_B_LESSCUT_RTO_S_1 +332 0x1000 //TX_B_LESSCUT_RTO_S_2 +333 0x1000 //TX_B_LESSCUT_RTO_S_3 +334 0x1000 //TX_B_LESSCUT_RTO_S_4 +335 0x1000 //TX_B_LESSCUT_RTO_S_5 +336 0x1000 //TX_B_LESSCUT_RTO_S_6 +337 0x1000 //TX_B_LESSCUT_RTO_S_7 338 0x7E14 //TX_LAMBDA_PFILT 339 0x7C29 //TX_LAMBDA_PFILT_S_0 340 0x7C29 //TX_LAMBDA_PFILT_S_1 @@ -23176,10 +35098,10 @@ 377 0x4E20 //TX_NOISE_TH_5_4 378 0x1194 //TX_NOISE_TH_6 379 0x0014 //TX_MINENOISE_TH -380 0x4000 //TX_MINENOISE_MIC0_TH_MTS -381 0xFFEE //TX_MINENOISE_MIC0_TH_EXP -382 0x6000 //TX_MINENOISE_MIC0_S_TH_MTS -383 0xFFF3 //TX_MINENOISE_MIC0_S_TH_EXP +380 0xD508 //TX_MORENS_TFMASK_TH +381 0x0001 //TX_DRC_QUIET_FLOOR +382 0x6D60 //TX_RATIODTL_CUT_TH +383 0x0DAC //TX_DT_CUT_K1 384 0x00A5 //TX_OUT_ENER_S_TH_CLEAN 385 0x00A5 //TX_OUT_ENER_S_TH_LESSCLEAN 386 0x00A5 //TX_OUT_ENER_S_TH_NOISY @@ -23187,15 +35109,15 @@ 388 0x0200 //TX_OUT_ENER_TH_SPEECH 389 0x2000 //TX_SN_NPB_GAIN 390 0x0000 //TX_NN_NPB_GAIN -391 0x0000 //TX_CSX_ALPHA_0 -392 0x0000 //TX_CSX_ALPHA_1 -393 0x0000 //TX_CSX_ALPHA_2 -394 0x0000 //TX_CSX_ALPHA_3 -395 0x0800 //TX_MU_ARSP_EST -396 0x00C8 //TX_P_OUTBEAM_MIN_TH +391 0x3000 //TX_POST_MASK_SUP_HSNE +392 0x07D0 //TX_TAIL_DET_TH +393 0x4000 //TX_B_LESSCUT_RTO_WTA +394 0x0000 //TX_MEL_G_R +395 0x0080 //TX_SUPHIGH_TH +396 0x0000 //TX_MASK_G_R 397 0x0002 //TX_EXTRA_NS_L -398 0x0800 //TX_EXTRA_NS_A -399 0x0005 //TX_VR_NOISE_FLOOR_TH +398 0x1800 //TX_C_POST_FLT_MASK +399 0x7FFF //TX_A_POST_FLT_WNS 400 0x0148 //TX_MIN_G_LOW300HZ 401 0x0004 //TX_MAXLEVEL_CNG 402 0x00B4 //TX_STN_NOISE_TH @@ -23310,16 +35232,16 @@ 511 0x6666 //TX_MIC_TO_BFGAIN 512 0x0000 //TX_MICTOBFGAIN0 513 0x0000 //TX_FASTMUE_TH -514 0x0000 //TX_DERVB_LEN_0 -515 0x0000 //TX_DERVB_LEN_1 -516 0x0000 //TX_RHO_DERVB -517 0x0000 //TX_MIC_INDX_DERVB -518 0x0000 //TX_MU_DERVB -519 0x0000 //TX_DR_RESRV_0 -520 0x0000 //TX_DR_RESRV_1 -521 0x0000 //TX_DR_RESRV_2 -522 0x0000 //TX_DR_RESRV_3 -523 0x0000 //TX_DR_RESRV_4 +514 0x2CCC //TX_DEREVERB_LF_MU +515 0x3200 //TX_DEREVERB_HF_MU +516 0x0007 //TX_DEREVERB_DELAY +517 0x0004 //TX_DEREVERB_COEF_LEN +518 0x0003 //TX_DEREVERB_DNR +519 0x0000 //TX_DEREVERB_ALPHA +520 0x0000 //TX_DEREVERB_BETA +521 0x3A98 //TX_GSC_RTOL_TH +522 0x3A98 //TX_GSC_RTOH_TH +523 0x7E2C //TX_WIDE2_MEANHTH 524 0x0000 //TX_DR_RESRV_5 525 0x0000 //TX_DR_RESRV_6 526 0x0000 //TX_DR_RESRV_7 @@ -23366,19 +35288,19 @@ 567 0x5C54 //TX_FDEQ_GAIN_0 568 0x5048 //TX_FDEQ_GAIN_1 569 0x4C4C //TX_FDEQ_GAIN_2 -570 0x474F //TX_FDEQ_GAIN_3 -571 0x4842 //TX_FDEQ_GAIN_4 -572 0x4541 //TX_FDEQ_GAIN_5 -573 0x4247 //TX_FDEQ_GAIN_6 -574 0x4743 //TX_FDEQ_GAIN_7 -575 0x4445 //TX_FDEQ_GAIN_8 -576 0x4750 //TX_FDEQ_GAIN_9 -577 0x3F48 //TX_FDEQ_GAIN_10 -578 0x4844 //TX_FDEQ_GAIN_11 -579 0x3E48 //TX_FDEQ_GAIN_12 -580 0x4E4A //TX_FDEQ_GAIN_13 -581 0x5459 //TX_FDEQ_GAIN_14 -582 0x6448 //TX_FDEQ_GAIN_15 +570 0x474A //TX_FDEQ_GAIN_3 +571 0x4640 //TX_FDEQ_GAIN_4 +572 0x4446 //TX_FDEQ_GAIN_5 +573 0x4B53 //TX_FDEQ_GAIN_6 +574 0x5448 //TX_FDEQ_GAIN_7 +575 0x4243 //TX_FDEQ_GAIN_8 +576 0x434C //TX_FDEQ_GAIN_9 +577 0x484D //TX_FDEQ_GAIN_10 +578 0x4D4D //TX_FDEQ_GAIN_11 +579 0x4B4E //TX_FDEQ_GAIN_12 +580 0x5054 //TX_FDEQ_GAIN_13 +581 0x5D68 //TX_FDEQ_GAIN_14 +582 0x7C6B //TX_FDEQ_GAIN_15 583 0x4848 //TX_FDEQ_GAIN_16 584 0x4848 //TX_FDEQ_GAIN_17 585 0x4848 //TX_FDEQ_GAIN_18 @@ -23421,14 +35343,14 @@ 622 0x4848 //TX_PREEQ_GAIN_MIC0_5 623 0x4848 //TX_PREEQ_GAIN_MIC0_6 624 0x4848 //TX_PREEQ_GAIN_MIC0_7 -625 0x4646 //TX_PREEQ_GAIN_MIC0_8 -626 0x4545 //TX_PREEQ_GAIN_MIC0_9 -627 0x4545 //TX_PREEQ_GAIN_MIC0_10 -628 0x4544 //TX_PREEQ_GAIN_MIC0_11 -629 0x4444 //TX_PREEQ_GAIN_MIC0_12 -630 0x4343 //TX_PREEQ_GAIN_MIC0_13 -631 0x4241 //TX_PREEQ_GAIN_MIC0_14 -632 0x3C3E //TX_PREEQ_GAIN_MIC0_15 +625 0x4848 //TX_PREEQ_GAIN_MIC0_8 +626 0x4848 //TX_PREEQ_GAIN_MIC0_9 +627 0x4848 //TX_PREEQ_GAIN_MIC0_10 +628 0x4848 //TX_PREEQ_GAIN_MIC0_11 +629 0x4848 //TX_PREEQ_GAIN_MIC0_12 +630 0x4848 //TX_PREEQ_GAIN_MIC0_13 +631 0x4848 //TX_PREEQ_GAIN_MIC0_14 +632 0x4848 //TX_PREEQ_GAIN_MIC0_15 633 0x4848 //TX_PREEQ_GAIN_MIC0_16 634 0x4848 //TX_PREEQ_GAIN_MIC0_17 635 0x4848 //TX_PREEQ_GAIN_MIC0_18 @@ -23470,15 +35392,15 @@ 671 0x4848 //TX_PREEQ_GAIN_MIC1_5 672 0x4848 //TX_PREEQ_GAIN_MIC1_6 673 0x4848 //TX_PREEQ_GAIN_MIC1_7 -674 0x484A //TX_PREEQ_GAIN_MIC1_8 -675 0x4B4C //TX_PREEQ_GAIN_MIC1_9 -676 0x4B4A //TX_PREEQ_GAIN_MIC1_10 -677 0x4A48 //TX_PREEQ_GAIN_MIC1_11 -678 0x4C4C //TX_PREEQ_GAIN_MIC1_12 -679 0x4C4C //TX_PREEQ_GAIN_MIC1_13 -680 0x4848 //TX_PREEQ_GAIN_MIC1_14 -681 0x4848 //TX_PREEQ_GAIN_MIC1_15 -682 0x4848 //TX_PREEQ_GAIN_MIC1_16 +674 0x4848 //TX_PREEQ_GAIN_MIC1_8 +675 0x494A //TX_PREEQ_GAIN_MIC1_9 +676 0x4B4B //TX_PREEQ_GAIN_MIC1_10 +677 0x4B4B //TX_PREEQ_GAIN_MIC1_11 +678 0x4D4C //TX_PREEQ_GAIN_MIC1_12 +679 0x4A48 //TX_PREEQ_GAIN_MIC1_13 +680 0x4840 //TX_PREEQ_GAIN_MIC1_14 +681 0x3434 //TX_PREEQ_GAIN_MIC1_15 +682 0x3C48 //TX_PREEQ_GAIN_MIC1_16 683 0x4848 //TX_PREEQ_GAIN_MIC1_17 684 0x4848 //TX_PREEQ_GAIN_MIC1_18 685 0x4848 //TX_PREEQ_GAIN_MIC1_19 @@ -23492,17 +35414,17 @@ 693 0x0304 //TX_PREEQ_BIN_MIC1_3 694 0x0405 //TX_PREEQ_BIN_MIC1_4 695 0x0506 //TX_PREEQ_BIN_MIC1_5 -696 0x0708 //TX_PREEQ_BIN_MIC1_6 -697 0x090A //TX_PREEQ_BIN_MIC1_7 -698 0x0B0C //TX_PREEQ_BIN_MIC1_8 -699 0x0D0E //TX_PREEQ_BIN_MIC1_9 -700 0x0F10 //TX_PREEQ_BIN_MIC1_10 -701 0x1011 //TX_PREEQ_BIN_MIC1_11 -702 0x1112 //TX_PREEQ_BIN_MIC1_12 -703 0x120B //TX_PREEQ_BIN_MIC1_13 -704 0x0000 //TX_PREEQ_BIN_MIC1_14 -705 0x0000 //TX_PREEQ_BIN_MIC1_15 -706 0x0000 //TX_PREEQ_BIN_MIC1_16 +696 0x0808 //TX_PREEQ_BIN_MIC1_6 +697 0x0809 //TX_PREEQ_BIN_MIC1_7 +698 0x0A0A //TX_PREEQ_BIN_MIC1_8 +699 0x0C10 //TX_PREEQ_BIN_MIC1_9 +700 0x1013 //TX_PREEQ_BIN_MIC1_10 +701 0x1414 //TX_PREEQ_BIN_MIC1_11 +702 0x261E //TX_PREEQ_BIN_MIC1_12 +703 0x1E14 //TX_PREEQ_BIN_MIC1_13 +704 0x1414 //TX_PREEQ_BIN_MIC1_14 +705 0x2814 //TX_PREEQ_BIN_MIC1_15 +706 0x401E //TX_PREEQ_BIN_MIC1_16 707 0x0000 //TX_PREEQ_BIN_MIC1_17 708 0x0000 //TX_PREEQ_BIN_MIC1_18 709 0x0000 //TX_PREEQ_BIN_MIC1_19 @@ -23570,7 +35492,7 @@ 771 0x0046 //TX_MIC_PWR_BIAS_2 772 0x0046 //TX_MIC_PWR_BIAS_3 773 0x0000 //TX_GAIN_LIMIT_0 -774 0x0006 //TX_GAIN_LIMIT_1 +774 0x0005 //TX_GAIN_LIMIT_1 775 0x0000 //TX_GAIN_LIMIT_2 776 0x0000 //TX_GAIN_LIMIT_3 777 0x7F5B //TX_BVE_NOVAD0_ALPHADOWN @@ -23662,7 +35584,7 @@ 863 0x199A //TX_TDDRC_HMNC_GAIN 864 0x0000 //TX_TDDRC_SMT_FLAG 865 0x0CCD //TX_TDDRC_SMT_W -866 0x05F7 //TX_TDDRC_DRC_GAIN +866 0x0504 //TX_TDDRC_DRC_GAIN 867 0x7FFF //TX_TDDRC_LMT_THRD 868 0x0000 //TX_TDDRC_LMT_ALPHA 869 0x0000 //TX_TFMASKLTH @@ -23693,8 +35615,73 @@ 894 0xC000 //TX_FASTNS_SSA_THHFL 895 0xCCCC //TX_FASTNS_SSA_THLFH 896 0xD999 //TX_FASTNS_SSA_THHFH +897 0x2339 //TX_SENDFUNC_REG_MICMUTE +898 0x0021 //TX_SENDFUNC_REG_MICMUTE1 +899 0x02BC //TX_MICMUTE_RATIO_THR +900 0x0140 //TX_MICMUTE_AMP_THR +901 0x0004 //TX_MICMUTE_HPF_IND +902 0x00C0 //TX_MICMUTE_LOG_EYR_TH +903 0x0008 //TX_MICMUTE_CVG_TIME +904 0x0008 //TX_MICMUTE_RELEASE_TIME +905 0x01FE //TX_MIC_VOLUME_MIC0MUTE +906 0x0020 //TX_MICMUTE_EPD_OFFSET_0 +907 0x001E //TX_MICMUTE_FRQ_AEC_L +908 0x7999 //TX_MICMUTE_EAD_THR +909 0x7FFF //TX_MICMUTE_LAMBDA_CB_NLE +910 0x7FFF //TX_MICMUTE_LAMBDA_RE_EST +911 0x4000 //TX_DTD_THR1_MICMUTE_0 +912 0x7000 //TX_DTD_THR1_MICMUTE_1 +913 0x7FFF //TX_DTD_THR1_MICMUTE_2 +914 0x7FFF //TX_DTD_THR1_MICMUTE_3 +915 0x6CCC //TX_DTD_THR2_MICMUTE_0 +916 0x0400 //TX_MICMUTE_MIN_EQ_RE_EST_0 +917 0x0400 //TX_MICMUTE_MIN_EQ_RE_EST_1 +918 0x1000 //TX_MICMUTE_MIN_EQ_RE_EST_2 +919 0x7FFF //TX_MICMUTE_MIN_EQ_RE_EST_3 +920 0x7FFF //TX_MICMUTE_MIN_EQ_RE_EST_4 +921 0x4000 //TX_MICMUTE_C_POST_FLT +922 0x03E8 //TX_MICMUTE_DT_CUT_K +923 0x0001 //TX_MICMUTE_DT_CUT_THR +924 0x03E8 //TX_MICMUTE_DT_CUT_K2 +925 0x0001 //TX_MICMUTE_DT_CUT_THR2 +926 0x0064 //TX_MICMUTE_DT2_HOLD_N +927 0x1000 //TX_MICMUTE_RATIODTH_THCUT +928 0x1000 //TX_MICMUTE_B_POST_FLT_ECHOL +929 0x7FFF //TX_MICMUTE_B_POST_FLT_ECHOH +930 0x0400 //TX_MICMUTE_C_POST_FLT_MASK +931 0x7999 //TX_MICMUTE_RATIODTL_CUT_TH +932 0x0258 //TX_MICMUTE_DT_CUT_K1 +933 0x0800 //TX_MICMUTE_N2_SN_EST +934 0xFC00 //TX_MICMUTE_THR_SN_EST_0 +935 0x001C //TX_MICMUTE_MIN_G_CTRL_0 +936 0x6000 //TX_MICMUTE_A_POST_FILT_S_0 +937 0x7000 //TX_MICMUTE_B_POST_FILT_0 +938 0x2710 //TX_MIC1RUB_AMP_THR +939 0x0010 //TX_MIC1MUTE_RATIO_THR +940 0x0450 //TX_MIC1MUTE_AMP_THR +941 0x0008 //TX_MIC1MUTE_CVG_TIME +942 0x0008 //TX_MIC1MUTE_RELEASE_TIME +943 0x0000 //TX_AMS_RESRV_01 +944 0x0000 //TX_AMS_RESRV_02 +945 0x0000 //TX_AMS_RESRV_03 +946 0x0000 //TX_AMS_RESRV_04 +947 0x0000 //TX_AMS_RESRV_05 +948 0x0000 //TX_AMS_RESRV_06 +949 0x0000 //TX_AMS_RESRV_07 +950 0x0000 //TX_AMS_RESRV_08 +951 0x0000 //TX_AMS_RESRV_09 +952 0x0000 //TX_AMS_RESRV_10 +953 0x0000 //TX_AMS_RESRV_11 +954 0x0000 //TX_AMS_RESRV_12 +955 0x0000 //TX_AMS_RESRV_13 +956 0x0000 //TX_AMS_RESRV_14 +957 0x0000 //TX_AMS_RESRV_15 +958 0x0000 //TX_AMS_RESRV_16 +959 0x0000 //TX_AMS_RESRV_17 +960 0x0000 //TX_AMS_RESRV_18 +961 0x0000 //TX_AMS_RESRV_19 #RX -0 0x003C //RX_RECVFUNC_MODE_0 +0 0x203C //RX_RECVFUNC_MODE_0 1 0x0000 //RX_RECVFUNC_MODE_1 2 0x0003 //RX_SAMPLINGFREQ_SIG 3 0x0003 //RX_SAMPLINGFREQ_PROC @@ -23704,7 +35691,7 @@ 7 0x1000 //RX_TDDRC_ALPHA_UP_2 8 0x1000 //RX_TDDRC_ALPHA_UP_3 9 0x1000 //RX_TDDRC_ALPHA_UP_4 -10 0x0600 //RX_PGA +10 0x05AA //RX_PGA 11 0x7FFF //RX_A_HP 12 0x4000 //RX_B_PE 13 0x5800 //RX_THR_PITCH_DET_0 @@ -23733,22 +35720,22 @@ 36 0x0000 //RX_LMT_THRD 37 0x4000 //RX_LMT_ALPHA 38 0x0020 //RX_FDEQ_SUBNUM -39 0x4840 //RX_FDEQ_GAIN_0 -40 0x4040 //RX_FDEQ_GAIN_1 -41 0x4559 //RX_FDEQ_GAIN_2 -42 0x6473 //RX_FDEQ_GAIN_3 -43 0x8690 //RX_FDEQ_GAIN_4 -44 0x8887 //RX_FDEQ_GAIN_5 -45 0x8787 //RX_FDEQ_GAIN_6 -46 0x8E91 //RX_FDEQ_GAIN_7 -47 0x9099 //RX_FDEQ_GAIN_8 -48 0x96A2 //RX_FDEQ_GAIN_9 -49 0xAB9C //RX_FDEQ_GAIN_10 -50 0x9287 //RX_FDEQ_GAIN_11 -51 0x716E //RX_FDEQ_GAIN_12 -52 0x5C54 //RX_FDEQ_GAIN_13 -53 0x5859 //RX_FDEQ_GAIN_14 -54 0x5861 //RX_FDEQ_GAIN_15 +39 0x483E //RX_FDEQ_GAIN_0 +40 0x3E3E //RX_FDEQ_GAIN_1 +41 0x3E4C //RX_FDEQ_GAIN_2 +42 0x506A //RX_FDEQ_GAIN_3 +43 0x8082 //RX_FDEQ_GAIN_4 +44 0x8982 //RX_FDEQ_GAIN_5 +45 0x8880 //RX_FDEQ_GAIN_6 +46 0x8888 //RX_FDEQ_GAIN_7 +47 0x949C //RX_FDEQ_GAIN_8 +48 0x9AAB //RX_FDEQ_GAIN_9 +49 0xAEA0 //RX_FDEQ_GAIN_10 +50 0x9487 //RX_FDEQ_GAIN_11 +51 0x6F64 //RX_FDEQ_GAIN_12 +52 0x625A //RX_FDEQ_GAIN_13 +53 0x5D70 //RX_FDEQ_GAIN_14 +54 0x7C8C //RX_FDEQ_GAIN_15 55 0x4848 //RX_FDEQ_GAIN_16 56 0x4848 //RX_FDEQ_GAIN_17 57 0x4848 //RX_FDEQ_GAIN_18 @@ -23759,19 +35746,19 @@ 62 0x4848 //RX_FDEQ_GAIN_23 63 0x0202 //RX_FDEQ_BIN_0 64 0x0202 //RX_FDEQ_BIN_1 -65 0x0302 //RX_FDEQ_BIN_2 -66 0x0304 //RX_FDEQ_BIN_3 -67 0x0405 //RX_FDEQ_BIN_4 -68 0x0506 //RX_FDEQ_BIN_5 +65 0x0301 //RX_FDEQ_BIN_2 +66 0x0404 //RX_FDEQ_BIN_3 +67 0x0406 //RX_FDEQ_BIN_4 +68 0x0109 //RX_FDEQ_BIN_5 69 0x0708 //RX_FDEQ_BIN_6 70 0x090A //RX_FDEQ_BIN_7 71 0x0B0C //RX_FDEQ_BIN_8 72 0x0D0E //RX_FDEQ_BIN_9 73 0x1013 //RX_FDEQ_BIN_10 74 0x1719 //RX_FDEQ_BIN_11 -75 0x1B1E //RX_FDEQ_BIN_12 -76 0x1E1E //RX_FDEQ_BIN_13 -77 0x1E28 //RX_FDEQ_BIN_14 +75 0x1B0F //RX_FDEQ_BIN_12 +76 0x141E //RX_FDEQ_BIN_13 +77 0x3728 //RX_FDEQ_BIN_14 78 0x282C //RX_FDEQ_BIN_15 79 0x0000 //RX_FDEQ_BIN_16 80 0x0000 //RX_FDEQ_BIN_17 @@ -23810,20 +35797,20 @@ 113 0x0002 //RX_TDDRC_THRD_1 114 0x1800 //RX_TDDRC_THRD_2 115 0x1800 //RX_TDDRC_THRD_3 -116 0x3000 //RX_TDDRC_SLANT_0 -117 0x6E00 //RX_TDDRC_SLANT_1 +116 0x7FFF //RX_TDDRC_SLANT_0 +117 0x7FFF //RX_TDDRC_SLANT_1 118 0x1000 //RX_TDDRC_ALPHA_UP_0 119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 120 0x0000 //RX_TDDRC_HMNC_FLAG 121 0x199A //RX_TDDRC_HMNC_GAIN 122 0x0001 //RX_TDDRC_SMT_FLAG 123 0x0CCD //RX_TDDRC_SMT_W -124 0x0478 //RX_TDDRC_DRC_GAIN +124 0x0650 //RX_TDDRC_DRC_GAIN 125 0x7C00 //RX_LAMBDA_PKA_FP 126 0x13E0 //RX_TPKA_FP 127 0x0080 //RX_MIN_G_FP 128 0x2000 //RX_MAX_G_FP -129 0x000E //RX_SPK_VOL +129 0x0100 //RX_SPK_VOL 130 0x0000 //RX_VOL_RESRV_0 131 0x0000 //RX_MAXLEVEL_CNG 132 0x3000 //RX_BWE_UV_TH @@ -23866,32 +35853,32 @@ 113 0x0002 //RX_TDDRC_THRD_1 114 0x1800 //RX_TDDRC_THRD_2 115 0x1800 //RX_TDDRC_THRD_3 -116 0x3000 //RX_TDDRC_SLANT_0 -117 0x6E00 //RX_TDDRC_SLANT_1 +116 0x7FFF //RX_TDDRC_SLANT_0 +117 0x7FFF //RX_TDDRC_SLANT_1 118 0x1000 //RX_TDDRC_ALPHA_UP_0 119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 120 0x0000 //RX_TDDRC_HMNC_FLAG 121 0x199A //RX_TDDRC_HMNC_GAIN 122 0x0001 //RX_TDDRC_SMT_FLAG 123 0x0CCD //RX_TDDRC_SMT_W -124 0x0478 //RX_TDDRC_DRC_GAIN +124 0x0650 //RX_TDDRC_DRC_GAIN 38 0x0020 //RX_FDEQ_SUBNUM -39 0x4840 //RX_FDEQ_GAIN_0 -40 0x4040 //RX_FDEQ_GAIN_1 -41 0x4559 //RX_FDEQ_GAIN_2 -42 0x6473 //RX_FDEQ_GAIN_3 -43 0x8690 //RX_FDEQ_GAIN_4 -44 0x8887 //RX_FDEQ_GAIN_5 -45 0x8787 //RX_FDEQ_GAIN_6 -46 0x8E91 //RX_FDEQ_GAIN_7 -47 0x9099 //RX_FDEQ_GAIN_8 -48 0x96A2 //RX_FDEQ_GAIN_9 -49 0xAB9C //RX_FDEQ_GAIN_10 -50 0x9287 //RX_FDEQ_GAIN_11 -51 0x716E //RX_FDEQ_GAIN_12 -52 0x5C54 //RX_FDEQ_GAIN_13 -53 0x5859 //RX_FDEQ_GAIN_14 -54 0x5861 //RX_FDEQ_GAIN_15 +39 0x483E //RX_FDEQ_GAIN_0 +40 0x3E3E //RX_FDEQ_GAIN_1 +41 0x3E4C //RX_FDEQ_GAIN_2 +42 0x506A //RX_FDEQ_GAIN_3 +43 0x8082 //RX_FDEQ_GAIN_4 +44 0x8982 //RX_FDEQ_GAIN_5 +45 0x8880 //RX_FDEQ_GAIN_6 +46 0x8888 //RX_FDEQ_GAIN_7 +47 0x949C //RX_FDEQ_GAIN_8 +48 0x9AAB //RX_FDEQ_GAIN_9 +49 0xAEA0 //RX_FDEQ_GAIN_10 +50 0x9487 //RX_FDEQ_GAIN_11 +51 0x6F64 //RX_FDEQ_GAIN_12 +52 0x625A //RX_FDEQ_GAIN_13 +53 0x5D70 //RX_FDEQ_GAIN_14 +54 0x7C8C //RX_FDEQ_GAIN_15 55 0x4848 //RX_FDEQ_GAIN_16 56 0x4848 //RX_FDEQ_GAIN_17 57 0x4848 //RX_FDEQ_GAIN_18 @@ -23902,19 +35889,19 @@ 62 0x4848 //RX_FDEQ_GAIN_23 63 0x0202 //RX_FDEQ_BIN_0 64 0x0202 //RX_FDEQ_BIN_1 -65 0x0302 //RX_FDEQ_BIN_2 -66 0x0304 //RX_FDEQ_BIN_3 -67 0x0405 //RX_FDEQ_BIN_4 -68 0x0506 //RX_FDEQ_BIN_5 +65 0x0301 //RX_FDEQ_BIN_2 +66 0x0404 //RX_FDEQ_BIN_3 +67 0x0406 //RX_FDEQ_BIN_4 +68 0x0109 //RX_FDEQ_BIN_5 69 0x0708 //RX_FDEQ_BIN_6 70 0x090A //RX_FDEQ_BIN_7 71 0x0B0C //RX_FDEQ_BIN_8 72 0x0D0E //RX_FDEQ_BIN_9 73 0x1013 //RX_FDEQ_BIN_10 74 0x1719 //RX_FDEQ_BIN_11 -75 0x1B1E //RX_FDEQ_BIN_12 -76 0x1E1E //RX_FDEQ_BIN_13 -77 0x1E28 //RX_FDEQ_BIN_14 +75 0x1B0F //RX_FDEQ_BIN_12 +76 0x141E //RX_FDEQ_BIN_13 +77 0x3728 //RX_FDEQ_BIN_14 78 0x282C //RX_FDEQ_BIN_15 79 0x0000 //RX_FDEQ_BIN_16 80 0x0000 //RX_FDEQ_BIN_17 @@ -23948,7 +35935,7 @@ 108 0x5333 //RX_FDDRC_SLANT_1_2 109 0x5333 //RX_FDDRC_SLANT_1_3 110 0x0000 //RX_FDDRC_RESRV_0 -129 0x000E //RX_SPK_VOL +129 0x000A //RX_SPK_VOL 130 0x0000 //RX_VOL_RESRV_0 #VOL 1 6 0x1000 //RX_TDDRC_ALPHA_UP_1 @@ -23965,32 +35952,32 @@ 113 0x0002 //RX_TDDRC_THRD_1 114 0x1800 //RX_TDDRC_THRD_2 115 0x1800 //RX_TDDRC_THRD_3 -116 0x3000 //RX_TDDRC_SLANT_0 -117 0x6E00 //RX_TDDRC_SLANT_1 +116 0x7FFF //RX_TDDRC_SLANT_0 +117 0x7FFF //RX_TDDRC_SLANT_1 118 0x1000 //RX_TDDRC_ALPHA_UP_0 119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 120 0x0000 //RX_TDDRC_HMNC_FLAG 121 0x199A //RX_TDDRC_HMNC_GAIN 122 0x0001 //RX_TDDRC_SMT_FLAG 123 0x0CCD //RX_TDDRC_SMT_W -124 0x045E //RX_TDDRC_DRC_GAIN +124 0x0650 //RX_TDDRC_DRC_GAIN 38 0x0020 //RX_FDEQ_SUBNUM -39 0x4840 //RX_FDEQ_GAIN_0 -40 0x4040 //RX_FDEQ_GAIN_1 -41 0x4559 //RX_FDEQ_GAIN_2 -42 0x6473 //RX_FDEQ_GAIN_3 -43 0x8690 //RX_FDEQ_GAIN_4 -44 0x8887 //RX_FDEQ_GAIN_5 -45 0x8787 //RX_FDEQ_GAIN_6 -46 0x8E91 //RX_FDEQ_GAIN_7 -47 0x9099 //RX_FDEQ_GAIN_8 -48 0x96A2 //RX_FDEQ_GAIN_9 -49 0xAB9C //RX_FDEQ_GAIN_10 -50 0x9287 //RX_FDEQ_GAIN_11 -51 0x716E //RX_FDEQ_GAIN_12 -52 0x5C54 //RX_FDEQ_GAIN_13 -53 0x5859 //RX_FDEQ_GAIN_14 -54 0x5861 //RX_FDEQ_GAIN_15 +39 0x483E //RX_FDEQ_GAIN_0 +40 0x3E3E //RX_FDEQ_GAIN_1 +41 0x3E4C //RX_FDEQ_GAIN_2 +42 0x506A //RX_FDEQ_GAIN_3 +43 0x8082 //RX_FDEQ_GAIN_4 +44 0x8982 //RX_FDEQ_GAIN_5 +45 0x8880 //RX_FDEQ_GAIN_6 +46 0x8888 //RX_FDEQ_GAIN_7 +47 0x949C //RX_FDEQ_GAIN_8 +48 0x9AAB //RX_FDEQ_GAIN_9 +49 0xAEA0 //RX_FDEQ_GAIN_10 +50 0x9487 //RX_FDEQ_GAIN_11 +51 0x6F64 //RX_FDEQ_GAIN_12 +52 0x625A //RX_FDEQ_GAIN_13 +53 0x5D70 //RX_FDEQ_GAIN_14 +54 0x7C8C //RX_FDEQ_GAIN_15 55 0x4848 //RX_FDEQ_GAIN_16 56 0x4848 //RX_FDEQ_GAIN_17 57 0x4848 //RX_FDEQ_GAIN_18 @@ -24001,19 +35988,19 @@ 62 0x4848 //RX_FDEQ_GAIN_23 63 0x0202 //RX_FDEQ_BIN_0 64 0x0202 //RX_FDEQ_BIN_1 -65 0x0302 //RX_FDEQ_BIN_2 -66 0x0304 //RX_FDEQ_BIN_3 -67 0x0405 //RX_FDEQ_BIN_4 -68 0x0506 //RX_FDEQ_BIN_5 +65 0x0301 //RX_FDEQ_BIN_2 +66 0x0404 //RX_FDEQ_BIN_3 +67 0x0406 //RX_FDEQ_BIN_4 +68 0x0109 //RX_FDEQ_BIN_5 69 0x0708 //RX_FDEQ_BIN_6 70 0x090A //RX_FDEQ_BIN_7 71 0x0B0C //RX_FDEQ_BIN_8 72 0x0D0E //RX_FDEQ_BIN_9 73 0x1013 //RX_FDEQ_BIN_10 74 0x1719 //RX_FDEQ_BIN_11 -75 0x1B1E //RX_FDEQ_BIN_12 -76 0x1E1E //RX_FDEQ_BIN_13 -77 0x1E28 //RX_FDEQ_BIN_14 +75 0x1B0F //RX_FDEQ_BIN_12 +76 0x141E //RX_FDEQ_BIN_13 +77 0x3728 //RX_FDEQ_BIN_14 78 0x282C //RX_FDEQ_BIN_15 79 0x0000 //RX_FDEQ_BIN_16 80 0x0000 //RX_FDEQ_BIN_17 @@ -24047,7 +36034,7 @@ 108 0x5333 //RX_FDDRC_SLANT_1_2 109 0x5333 //RX_FDDRC_SLANT_1_3 110 0x0000 //RX_FDDRC_RESRV_0 -129 0x0017 //RX_SPK_VOL +129 0x0010 //RX_SPK_VOL 130 0x0000 //RX_VOL_RESRV_0 #VOL 2 6 0x1000 //RX_TDDRC_ALPHA_UP_1 @@ -24064,32 +36051,32 @@ 113 0x0002 //RX_TDDRC_THRD_1 114 0x1800 //RX_TDDRC_THRD_2 115 0x1800 //RX_TDDRC_THRD_3 -116 0x3000 //RX_TDDRC_SLANT_0 -117 0x6E00 //RX_TDDRC_SLANT_1 +116 0x7FFF //RX_TDDRC_SLANT_0 +117 0x7FFF //RX_TDDRC_SLANT_1 118 0x1000 //RX_TDDRC_ALPHA_UP_0 119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 120 0x0000 //RX_TDDRC_HMNC_FLAG 121 0x199A //RX_TDDRC_HMNC_GAIN 122 0x0001 //RX_TDDRC_SMT_FLAG 123 0x0CCD //RX_TDDRC_SMT_W -124 0x0478 //RX_TDDRC_DRC_GAIN +124 0x0650 //RX_TDDRC_DRC_GAIN 38 0x0020 //RX_FDEQ_SUBNUM -39 0x4840 //RX_FDEQ_GAIN_0 -40 0x4040 //RX_FDEQ_GAIN_1 -41 0x4559 //RX_FDEQ_GAIN_2 -42 0x6473 //RX_FDEQ_GAIN_3 -43 0x8690 //RX_FDEQ_GAIN_4 -44 0x8887 //RX_FDEQ_GAIN_5 -45 0x8787 //RX_FDEQ_GAIN_6 -46 0x8E91 //RX_FDEQ_GAIN_7 -47 0x9099 //RX_FDEQ_GAIN_8 -48 0x96A2 //RX_FDEQ_GAIN_9 -49 0xAB9C //RX_FDEQ_GAIN_10 -50 0x9287 //RX_FDEQ_GAIN_11 -51 0x716E //RX_FDEQ_GAIN_12 -52 0x5C54 //RX_FDEQ_GAIN_13 -53 0x5859 //RX_FDEQ_GAIN_14 -54 0x5861 //RX_FDEQ_GAIN_15 +39 0x483E //RX_FDEQ_GAIN_0 +40 0x3E3E //RX_FDEQ_GAIN_1 +41 0x3E4C //RX_FDEQ_GAIN_2 +42 0x506A //RX_FDEQ_GAIN_3 +43 0x8082 //RX_FDEQ_GAIN_4 +44 0x8982 //RX_FDEQ_GAIN_5 +45 0x8880 //RX_FDEQ_GAIN_6 +46 0x8888 //RX_FDEQ_GAIN_7 +47 0x949C //RX_FDEQ_GAIN_8 +48 0x9AAB //RX_FDEQ_GAIN_9 +49 0xAEA0 //RX_FDEQ_GAIN_10 +50 0x9487 //RX_FDEQ_GAIN_11 +51 0x6F64 //RX_FDEQ_GAIN_12 +52 0x625A //RX_FDEQ_GAIN_13 +53 0x5D70 //RX_FDEQ_GAIN_14 +54 0x7C8C //RX_FDEQ_GAIN_15 55 0x4848 //RX_FDEQ_GAIN_16 56 0x4848 //RX_FDEQ_GAIN_17 57 0x4848 //RX_FDEQ_GAIN_18 @@ -24100,19 +36087,19 @@ 62 0x4848 //RX_FDEQ_GAIN_23 63 0x0202 //RX_FDEQ_BIN_0 64 0x0202 //RX_FDEQ_BIN_1 -65 0x0302 //RX_FDEQ_BIN_2 -66 0x0304 //RX_FDEQ_BIN_3 -67 0x0405 //RX_FDEQ_BIN_4 -68 0x0506 //RX_FDEQ_BIN_5 +65 0x0301 //RX_FDEQ_BIN_2 +66 0x0404 //RX_FDEQ_BIN_3 +67 0x0406 //RX_FDEQ_BIN_4 +68 0x0109 //RX_FDEQ_BIN_5 69 0x0708 //RX_FDEQ_BIN_6 70 0x090A //RX_FDEQ_BIN_7 71 0x0B0C //RX_FDEQ_BIN_8 72 0x0D0E //RX_FDEQ_BIN_9 73 0x1013 //RX_FDEQ_BIN_10 74 0x1719 //RX_FDEQ_BIN_11 -75 0x1B1E //RX_FDEQ_BIN_12 -76 0x1E1E //RX_FDEQ_BIN_13 -77 0x1E28 //RX_FDEQ_BIN_14 +75 0x1B0F //RX_FDEQ_BIN_12 +76 0x141E //RX_FDEQ_BIN_13 +77 0x3728 //RX_FDEQ_BIN_14 78 0x282C //RX_FDEQ_BIN_15 79 0x0000 //RX_FDEQ_BIN_16 80 0x0000 //RX_FDEQ_BIN_17 @@ -24146,7 +36133,7 @@ 108 0x5333 //RX_FDDRC_SLANT_1_2 109 0x5333 //RX_FDDRC_SLANT_1_3 110 0x0000 //RX_FDDRC_RESRV_0 -129 0x0024 //RX_SPK_VOL +129 0x001B //RX_SPK_VOL 130 0x0000 //RX_VOL_RESRV_0 #VOL 3 6 0x1000 //RX_TDDRC_ALPHA_UP_1 @@ -24163,32 +36150,32 @@ 113 0x0002 //RX_TDDRC_THRD_1 114 0x1800 //RX_TDDRC_THRD_2 115 0x1800 //RX_TDDRC_THRD_3 -116 0x3000 //RX_TDDRC_SLANT_0 -117 0x6E00 //RX_TDDRC_SLANT_1 +116 0x7FFF //RX_TDDRC_SLANT_0 +117 0x7FFF //RX_TDDRC_SLANT_1 118 0x1000 //RX_TDDRC_ALPHA_UP_0 119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 120 0x0000 //RX_TDDRC_HMNC_FLAG 121 0x199A //RX_TDDRC_HMNC_GAIN 122 0x0001 //RX_TDDRC_SMT_FLAG 123 0x0CCD //RX_TDDRC_SMT_W -124 0x0478 //RX_TDDRC_DRC_GAIN +124 0x0650 //RX_TDDRC_DRC_GAIN 38 0x0020 //RX_FDEQ_SUBNUM -39 0x4840 //RX_FDEQ_GAIN_0 -40 0x4040 //RX_FDEQ_GAIN_1 -41 0x4559 //RX_FDEQ_GAIN_2 -42 0x6473 //RX_FDEQ_GAIN_3 -43 0x8690 //RX_FDEQ_GAIN_4 -44 0x8887 //RX_FDEQ_GAIN_5 -45 0x8787 //RX_FDEQ_GAIN_6 -46 0x8E91 //RX_FDEQ_GAIN_7 -47 0x9099 //RX_FDEQ_GAIN_8 -48 0x96A2 //RX_FDEQ_GAIN_9 -49 0xAB9C //RX_FDEQ_GAIN_10 -50 0x9287 //RX_FDEQ_GAIN_11 -51 0x716E //RX_FDEQ_GAIN_12 -52 0x5C54 //RX_FDEQ_GAIN_13 -53 0x5859 //RX_FDEQ_GAIN_14 -54 0x5861 //RX_FDEQ_GAIN_15 +39 0x483E //RX_FDEQ_GAIN_0 +40 0x3E3E //RX_FDEQ_GAIN_1 +41 0x3E4C //RX_FDEQ_GAIN_2 +42 0x506A //RX_FDEQ_GAIN_3 +43 0x8082 //RX_FDEQ_GAIN_4 +44 0x8982 //RX_FDEQ_GAIN_5 +45 0x8880 //RX_FDEQ_GAIN_6 +46 0x8888 //RX_FDEQ_GAIN_7 +47 0x949C //RX_FDEQ_GAIN_8 +48 0x9AAB //RX_FDEQ_GAIN_9 +49 0xAEA0 //RX_FDEQ_GAIN_10 +50 0x9487 //RX_FDEQ_GAIN_11 +51 0x6F64 //RX_FDEQ_GAIN_12 +52 0x625A //RX_FDEQ_GAIN_13 +53 0x5D70 //RX_FDEQ_GAIN_14 +54 0x7C8C //RX_FDEQ_GAIN_15 55 0x4848 //RX_FDEQ_GAIN_16 56 0x4848 //RX_FDEQ_GAIN_17 57 0x4848 //RX_FDEQ_GAIN_18 @@ -24199,19 +36186,19 @@ 62 0x4848 //RX_FDEQ_GAIN_23 63 0x0202 //RX_FDEQ_BIN_0 64 0x0202 //RX_FDEQ_BIN_1 -65 0x0302 //RX_FDEQ_BIN_2 -66 0x0304 //RX_FDEQ_BIN_3 -67 0x0405 //RX_FDEQ_BIN_4 -68 0x0506 //RX_FDEQ_BIN_5 +65 0x0301 //RX_FDEQ_BIN_2 +66 0x0404 //RX_FDEQ_BIN_3 +67 0x0406 //RX_FDEQ_BIN_4 +68 0x0109 //RX_FDEQ_BIN_5 69 0x0708 //RX_FDEQ_BIN_6 70 0x090A //RX_FDEQ_BIN_7 71 0x0B0C //RX_FDEQ_BIN_8 72 0x0D0E //RX_FDEQ_BIN_9 73 0x1013 //RX_FDEQ_BIN_10 74 0x1719 //RX_FDEQ_BIN_11 -75 0x1B1E //RX_FDEQ_BIN_12 -76 0x1E1E //RX_FDEQ_BIN_13 -77 0x1E28 //RX_FDEQ_BIN_14 +75 0x1B0F //RX_FDEQ_BIN_12 +76 0x141E //RX_FDEQ_BIN_13 +77 0x3728 //RX_FDEQ_BIN_14 78 0x282C //RX_FDEQ_BIN_15 79 0x0000 //RX_FDEQ_BIN_16 80 0x0000 //RX_FDEQ_BIN_17 @@ -24245,7 +36232,7 @@ 108 0x5333 //RX_FDDRC_SLANT_1_2 109 0x5333 //RX_FDDRC_SLANT_1_3 110 0x0000 //RX_FDDRC_RESRV_0 -129 0x0039 //RX_SPK_VOL +129 0x002B //RX_SPK_VOL 130 0x0000 //RX_VOL_RESRV_0 #VOL 4 6 0x1000 //RX_TDDRC_ALPHA_UP_1 @@ -24262,32 +36249,32 @@ 113 0x0002 //RX_TDDRC_THRD_1 114 0x1800 //RX_TDDRC_THRD_2 115 0x1800 //RX_TDDRC_THRD_3 -116 0x3000 //RX_TDDRC_SLANT_0 -117 0x6E00 //RX_TDDRC_SLANT_1 +116 0x7FFF //RX_TDDRC_SLANT_0 +117 0x7FFF //RX_TDDRC_SLANT_1 118 0x1000 //RX_TDDRC_ALPHA_UP_0 119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 120 0x0000 //RX_TDDRC_HMNC_FLAG 121 0x199A //RX_TDDRC_HMNC_GAIN 122 0x0001 //RX_TDDRC_SMT_FLAG 123 0x0CCD //RX_TDDRC_SMT_W -124 0x0478 //RX_TDDRC_DRC_GAIN +124 0x0650 //RX_TDDRC_DRC_GAIN 38 0x0020 //RX_FDEQ_SUBNUM -39 0x4840 //RX_FDEQ_GAIN_0 -40 0x4040 //RX_FDEQ_GAIN_1 -41 0x4559 //RX_FDEQ_GAIN_2 -42 0x6473 //RX_FDEQ_GAIN_3 -43 0x8690 //RX_FDEQ_GAIN_4 -44 0x8887 //RX_FDEQ_GAIN_5 -45 0x8787 //RX_FDEQ_GAIN_6 -46 0x8E91 //RX_FDEQ_GAIN_7 -47 0x9099 //RX_FDEQ_GAIN_8 -48 0x96A2 //RX_FDEQ_GAIN_9 -49 0xAB9C //RX_FDEQ_GAIN_10 -50 0x9287 //RX_FDEQ_GAIN_11 -51 0x716E //RX_FDEQ_GAIN_12 -52 0x5C54 //RX_FDEQ_GAIN_13 -53 0x5859 //RX_FDEQ_GAIN_14 -54 0x5861 //RX_FDEQ_GAIN_15 +39 0x483E //RX_FDEQ_GAIN_0 +40 0x3E3E //RX_FDEQ_GAIN_1 +41 0x3E4C //RX_FDEQ_GAIN_2 +42 0x506A //RX_FDEQ_GAIN_3 +43 0x8082 //RX_FDEQ_GAIN_4 +44 0x8982 //RX_FDEQ_GAIN_5 +45 0x8880 //RX_FDEQ_GAIN_6 +46 0x8888 //RX_FDEQ_GAIN_7 +47 0x949C //RX_FDEQ_GAIN_8 +48 0x9AAB //RX_FDEQ_GAIN_9 +49 0xAEA0 //RX_FDEQ_GAIN_10 +50 0x9487 //RX_FDEQ_GAIN_11 +51 0x6F64 //RX_FDEQ_GAIN_12 +52 0x625A //RX_FDEQ_GAIN_13 +53 0x5D70 //RX_FDEQ_GAIN_14 +54 0x7C8C //RX_FDEQ_GAIN_15 55 0x4848 //RX_FDEQ_GAIN_16 56 0x4848 //RX_FDEQ_GAIN_17 57 0x4848 //RX_FDEQ_GAIN_18 @@ -24298,19 +36285,19 @@ 62 0x4848 //RX_FDEQ_GAIN_23 63 0x0202 //RX_FDEQ_BIN_0 64 0x0202 //RX_FDEQ_BIN_1 -65 0x0302 //RX_FDEQ_BIN_2 -66 0x0304 //RX_FDEQ_BIN_3 -67 0x0405 //RX_FDEQ_BIN_4 -68 0x0506 //RX_FDEQ_BIN_5 +65 0x0301 //RX_FDEQ_BIN_2 +66 0x0404 //RX_FDEQ_BIN_3 +67 0x0406 //RX_FDEQ_BIN_4 +68 0x0109 //RX_FDEQ_BIN_5 69 0x0708 //RX_FDEQ_BIN_6 70 0x090A //RX_FDEQ_BIN_7 71 0x0B0C //RX_FDEQ_BIN_8 72 0x0D0E //RX_FDEQ_BIN_9 73 0x1013 //RX_FDEQ_BIN_10 74 0x1719 //RX_FDEQ_BIN_11 -75 0x1B1E //RX_FDEQ_BIN_12 -76 0x1E1E //RX_FDEQ_BIN_13 -77 0x1E28 //RX_FDEQ_BIN_14 +75 0x1B0F //RX_FDEQ_BIN_12 +76 0x141E //RX_FDEQ_BIN_13 +77 0x3728 //RX_FDEQ_BIN_14 78 0x282C //RX_FDEQ_BIN_15 79 0x0000 //RX_FDEQ_BIN_16 80 0x0000 //RX_FDEQ_BIN_17 @@ -24344,7 +36331,7 @@ 108 0x5333 //RX_FDDRC_SLANT_1_2 109 0x5333 //RX_FDDRC_SLANT_1_3 110 0x0000 //RX_FDDRC_RESRV_0 -129 0x005C //RX_SPK_VOL +129 0x0047 //RX_SPK_VOL 130 0x0000 //RX_VOL_RESRV_0 #VOL 5 6 0x1000 //RX_TDDRC_ALPHA_UP_1 @@ -24361,32 +36348,32 @@ 113 0x0002 //RX_TDDRC_THRD_1 114 0x1800 //RX_TDDRC_THRD_2 115 0x1800 //RX_TDDRC_THRD_3 -116 0x3000 //RX_TDDRC_SLANT_0 -117 0x6E00 //RX_TDDRC_SLANT_1 +116 0x7FFF //RX_TDDRC_SLANT_0 +117 0x7FFF //RX_TDDRC_SLANT_1 118 0x1000 //RX_TDDRC_ALPHA_UP_0 119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 120 0x0000 //RX_TDDRC_HMNC_FLAG 121 0x199A //RX_TDDRC_HMNC_GAIN 122 0x0001 //RX_TDDRC_SMT_FLAG 123 0x0CCD //RX_TDDRC_SMT_W -124 0x0478 //RX_TDDRC_DRC_GAIN +124 0x0650 //RX_TDDRC_DRC_GAIN 38 0x0020 //RX_FDEQ_SUBNUM -39 0x4840 //RX_FDEQ_GAIN_0 -40 0x4040 //RX_FDEQ_GAIN_1 -41 0x4559 //RX_FDEQ_GAIN_2 -42 0x6473 //RX_FDEQ_GAIN_3 -43 0x8690 //RX_FDEQ_GAIN_4 -44 0x8887 //RX_FDEQ_GAIN_5 -45 0x8787 //RX_FDEQ_GAIN_6 -46 0x8E91 //RX_FDEQ_GAIN_7 -47 0x9099 //RX_FDEQ_GAIN_8 -48 0x96A2 //RX_FDEQ_GAIN_9 -49 0xAB9C //RX_FDEQ_GAIN_10 -50 0x9287 //RX_FDEQ_GAIN_11 -51 0x716E //RX_FDEQ_GAIN_12 -52 0x5C54 //RX_FDEQ_GAIN_13 -53 0x5859 //RX_FDEQ_GAIN_14 -54 0x5861 //RX_FDEQ_GAIN_15 +39 0x483E //RX_FDEQ_GAIN_0 +40 0x3E3E //RX_FDEQ_GAIN_1 +41 0x3E4C //RX_FDEQ_GAIN_2 +42 0x506A //RX_FDEQ_GAIN_3 +43 0x8082 //RX_FDEQ_GAIN_4 +44 0x8982 //RX_FDEQ_GAIN_5 +45 0x8880 //RX_FDEQ_GAIN_6 +46 0x8888 //RX_FDEQ_GAIN_7 +47 0x949C //RX_FDEQ_GAIN_8 +48 0x9AAB //RX_FDEQ_GAIN_9 +49 0xAEA0 //RX_FDEQ_GAIN_10 +50 0x9487 //RX_FDEQ_GAIN_11 +51 0x6F64 //RX_FDEQ_GAIN_12 +52 0x625A //RX_FDEQ_GAIN_13 +53 0x5D70 //RX_FDEQ_GAIN_14 +54 0x7C8C //RX_FDEQ_GAIN_15 55 0x4848 //RX_FDEQ_GAIN_16 56 0x4848 //RX_FDEQ_GAIN_17 57 0x4848 //RX_FDEQ_GAIN_18 @@ -24397,19 +36384,19 @@ 62 0x4848 //RX_FDEQ_GAIN_23 63 0x0202 //RX_FDEQ_BIN_0 64 0x0202 //RX_FDEQ_BIN_1 -65 0x0302 //RX_FDEQ_BIN_2 -66 0x0304 //RX_FDEQ_BIN_3 -67 0x0405 //RX_FDEQ_BIN_4 -68 0x0506 //RX_FDEQ_BIN_5 +65 0x0301 //RX_FDEQ_BIN_2 +66 0x0404 //RX_FDEQ_BIN_3 +67 0x0406 //RX_FDEQ_BIN_4 +68 0x0109 //RX_FDEQ_BIN_5 69 0x0708 //RX_FDEQ_BIN_6 70 0x090A //RX_FDEQ_BIN_7 71 0x0B0C //RX_FDEQ_BIN_8 72 0x0D0E //RX_FDEQ_BIN_9 73 0x1013 //RX_FDEQ_BIN_10 74 0x1719 //RX_FDEQ_BIN_11 -75 0x1B1E //RX_FDEQ_BIN_12 -76 0x1E1E //RX_FDEQ_BIN_13 -77 0x1E28 //RX_FDEQ_BIN_14 +75 0x1B0F //RX_FDEQ_BIN_12 +76 0x141E //RX_FDEQ_BIN_13 +77 0x3728 //RX_FDEQ_BIN_14 78 0x282C //RX_FDEQ_BIN_15 79 0x0000 //RX_FDEQ_BIN_16 80 0x0000 //RX_FDEQ_BIN_17 @@ -24443,7 +36430,7 @@ 108 0x5333 //RX_FDDRC_SLANT_1_2 109 0x5333 //RX_FDDRC_SLANT_1_3 110 0x0000 //RX_FDDRC_RESRV_0 -129 0x0096 //RX_SPK_VOL +129 0x0076 //RX_SPK_VOL 130 0x0000 //RX_VOL_RESRV_0 #VOL 6 6 0x1000 //RX_TDDRC_ALPHA_UP_1 @@ -24460,32 +36447,32 @@ 113 0x0002 //RX_TDDRC_THRD_1 114 0x1800 //RX_TDDRC_THRD_2 115 0x1800 //RX_TDDRC_THRD_3 -116 0x3000 //RX_TDDRC_SLANT_0 -117 0x6E00 //RX_TDDRC_SLANT_1 +116 0x7FFF //RX_TDDRC_SLANT_0 +117 0x7FFF //RX_TDDRC_SLANT_1 118 0x1000 //RX_TDDRC_ALPHA_UP_0 119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 120 0x0000 //RX_TDDRC_HMNC_FLAG 121 0x199A //RX_TDDRC_HMNC_GAIN 122 0x0001 //RX_TDDRC_SMT_FLAG 123 0x0CCD //RX_TDDRC_SMT_W -124 0x0478 //RX_TDDRC_DRC_GAIN +124 0x0650 //RX_TDDRC_DRC_GAIN 38 0x0020 //RX_FDEQ_SUBNUM -39 0x4840 //RX_FDEQ_GAIN_0 -40 0x4040 //RX_FDEQ_GAIN_1 -41 0x4559 //RX_FDEQ_GAIN_2 -42 0x6473 //RX_FDEQ_GAIN_3 -43 0x8690 //RX_FDEQ_GAIN_4 -44 0x8887 //RX_FDEQ_GAIN_5 -45 0x8787 //RX_FDEQ_GAIN_6 -46 0x8E91 //RX_FDEQ_GAIN_7 -47 0x9099 //RX_FDEQ_GAIN_8 -48 0x96A2 //RX_FDEQ_GAIN_9 -49 0xAB9C //RX_FDEQ_GAIN_10 -50 0x9287 //RX_FDEQ_GAIN_11 -51 0x716E //RX_FDEQ_GAIN_12 -52 0x5C54 //RX_FDEQ_GAIN_13 -53 0x5859 //RX_FDEQ_GAIN_14 -54 0x5861 //RX_FDEQ_GAIN_15 +39 0x483E //RX_FDEQ_GAIN_0 +40 0x3E3E //RX_FDEQ_GAIN_1 +41 0x3E4C //RX_FDEQ_GAIN_2 +42 0x506A //RX_FDEQ_GAIN_3 +43 0x8082 //RX_FDEQ_GAIN_4 +44 0x8982 //RX_FDEQ_GAIN_5 +45 0x8880 //RX_FDEQ_GAIN_6 +46 0x8888 //RX_FDEQ_GAIN_7 +47 0x949C //RX_FDEQ_GAIN_8 +48 0x9AAB //RX_FDEQ_GAIN_9 +49 0xAEA0 //RX_FDEQ_GAIN_10 +50 0x9487 //RX_FDEQ_GAIN_11 +51 0x6F64 //RX_FDEQ_GAIN_12 +52 0x625A //RX_FDEQ_GAIN_13 +53 0x5D70 //RX_FDEQ_GAIN_14 +54 0x7C8C //RX_FDEQ_GAIN_15 55 0x4848 //RX_FDEQ_GAIN_16 56 0x4848 //RX_FDEQ_GAIN_17 57 0x4848 //RX_FDEQ_GAIN_18 @@ -24496,19 +36483,19 @@ 62 0x4848 //RX_FDEQ_GAIN_23 63 0x0202 //RX_FDEQ_BIN_0 64 0x0202 //RX_FDEQ_BIN_1 -65 0x0302 //RX_FDEQ_BIN_2 -66 0x0304 //RX_FDEQ_BIN_3 -67 0x0405 //RX_FDEQ_BIN_4 -68 0x0506 //RX_FDEQ_BIN_5 +65 0x0301 //RX_FDEQ_BIN_2 +66 0x0404 //RX_FDEQ_BIN_3 +67 0x0406 //RX_FDEQ_BIN_4 +68 0x0109 //RX_FDEQ_BIN_5 69 0x0708 //RX_FDEQ_BIN_6 70 0x090A //RX_FDEQ_BIN_7 71 0x0B0C //RX_FDEQ_BIN_8 72 0x0D0E //RX_FDEQ_BIN_9 73 0x1013 //RX_FDEQ_BIN_10 74 0x1719 //RX_FDEQ_BIN_11 -75 0x1B1E //RX_FDEQ_BIN_12 -76 0x1E1E //RX_FDEQ_BIN_13 -77 0x1E28 //RX_FDEQ_BIN_14 +75 0x1B0F //RX_FDEQ_BIN_12 +76 0x141E //RX_FDEQ_BIN_13 +77 0x3728 //RX_FDEQ_BIN_14 78 0x282C //RX_FDEQ_BIN_15 79 0x0000 //RX_FDEQ_BIN_16 80 0x0000 //RX_FDEQ_BIN_17 @@ -24544,10 +36531,862 @@ 110 0x0000 //RX_FDDRC_RESRV_0 129 0x0100 //RX_SPK_VOL 130 0x0000 //RX_VOL_RESRV_0 +#RX 2 +157 0x003C //RX_RECVFUNC_MODE_0 +158 0x0000 //RX_RECVFUNC_MODE_1 +159 0x0003 //RX_SAMPLINGFREQ_SIG +160 0x0003 //RX_SAMPLINGFREQ_PROC +161 0x000A //RX_FRAME_SZ +162 0x0000 //RX_DELAY_OPT +163 0x1000 //RX_TDDRC_ALPHA_UP_1 +164 0x1000 //RX_TDDRC_ALPHA_UP_2 +165 0x1000 //RX_TDDRC_ALPHA_UP_3 +166 0x1000 //RX_TDDRC_ALPHA_UP_4 +167 0x0600 //RX_PGA +168 0x7FFF //RX_A_HP +169 0x4000 //RX_B_PE +170 0x5800 //RX_THR_PITCH_DET_0 +171 0x5000 //RX_THR_PITCH_DET_1 +172 0x4000 //RX_THR_PITCH_DET_2 +173 0x0008 //RX_PITCH_BFR_LEN +174 0x0003 //RX_SBD_PITCH_DET +175 0x0100 //RX_PP_RESRV_0 +176 0x0020 //RX_PP_RESRV_1 +177 0x0600 //RX_N_SN_EST +178 0x000C //RX_N2_SN_EST +179 0x000F //RX_NS_LVL_CTRL +180 0xF800 //RX_THR_SN_EST +181 0x7E00 //RX_LAMBDA_PFILT +182 0x000A //RX_FENS_RESRV_0 +183 0x0190 //RX_FENS_RESRV_1 +184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +187 0x0002 //RX_EXTRA_NS_L +188 0x0800 //RX_EXTRA_NS_A +189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +190 0x7000 //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +192 0x199A //RX_A_POST_FLT +193 0x0000 //RX_LMT_THRD +194 0x4000 //RX_LMT_ALPHA +195 0x0020 //RX_FDEQ_SUBNUM +196 0x4840 //RX_FDEQ_GAIN_0 +197 0x4040 //RX_FDEQ_GAIN_1 +198 0x4050 //RX_FDEQ_GAIN_2 +199 0x5D6C //RX_FDEQ_GAIN_3 +200 0x7B86 //RX_FDEQ_GAIN_4 +201 0x8186 //RX_FDEQ_GAIN_5 +202 0x8688 //RX_FDEQ_GAIN_6 +203 0x9097 //RX_FDEQ_GAIN_7 +204 0x929F //RX_FDEQ_GAIN_8 +205 0x9CA0 //RX_FDEQ_GAIN_9 +206 0xA391 //RX_FDEQ_GAIN_10 +207 0x8A82 //RX_FDEQ_GAIN_11 +208 0x726E //RX_FDEQ_GAIN_12 +209 0x704E //RX_FDEQ_GAIN_13 +210 0x6565 //RX_FDEQ_GAIN_14 +211 0x698A //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0202 //RX_FDEQ_BIN_0 +221 0x0202 //RX_FDEQ_BIN_1 +222 0x0302 //RX_FDEQ_BIN_2 +223 0x0304 //RX_FDEQ_BIN_3 +224 0x0405 //RX_FDEQ_BIN_4 +225 0x0506 //RX_FDEQ_BIN_5 +226 0x0708 //RX_FDEQ_BIN_6 +227 0x090A //RX_FDEQ_BIN_7 +228 0x0B0C //RX_FDEQ_BIN_8 +229 0x0D0E //RX_FDEQ_BIN_9 +230 0x1013 //RX_FDEQ_BIN_10 +231 0x1719 //RX_FDEQ_BIN_11 +232 0x1B1E //RX_FDEQ_BIN_12 +233 0x1E1E //RX_FDEQ_BIN_13 +234 0x1E28 //RX_FDEQ_BIN_14 +235 0x282C //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x4000 //RX_FDEQ_RESRV_0 +245 0x0320 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0030 //RX_FDDRC_BAND_MARGIN_1 +248 0x0050 //RX_FDDRC_BAND_MARGIN_2 +249 0x0080 //RX_FDDRC_BAND_MARGIN_3 +250 0x0007 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x5000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x6400 //RX_FDDRC_THRD_3_2 +258 0x6400 //RX_FDDRC_THRD_3_3 +259 0x2000 //RX_FDDRC_SLANT_0_0 +260 0x2000 //RX_FDDRC_SLANT_0_1 +261 0x2000 //RX_FDDRC_SLANT_0_2 +262 0x2000 //RX_FDDRC_SLANT_0_3 +263 0x5333 //RX_FDDRC_SLANT_1_0 +264 0x5333 //RX_FDDRC_SLANT_1_1 +265 0x5333 //RX_FDDRC_SLANT_1_2 +266 0x5333 //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +268 0x0002 //RX_FILTINDX +269 0x0001 //RX_TDDRC_THRD_0 +270 0x0002 //RX_TDDRC_THRD_1 +271 0x1800 //RX_TDDRC_THRD_2 +272 0x1800 //RX_TDDRC_THRD_3 +273 0x3000 //RX_TDDRC_SLANT_0 +274 0x6E00 //RX_TDDRC_SLANT_1 +275 0x1000 //RX_TDDRC_ALPHA_UP_0 +276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x199A //RX_TDDRC_HMNC_GAIN +279 0x0001 //RX_TDDRC_SMT_FLAG +280 0x0CCD //RX_TDDRC_SMT_W +281 0x0523 //RX_TDDRC_DRC_GAIN +282 0x7C00 //RX_LAMBDA_PKA_FP +283 0x13E0 //RX_TPKA_FP +284 0x0080 //RX_MIN_G_FP +285 0x2000 //RX_MAX_G_FP +286 0x000B //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 +288 0x0000 //RX_MAXLEVEL_CNG +289 0x3000 //RX_BWE_UV_TH +290 0x3000 //RX_BWE_UV_TH2 +291 0x1800 //RX_BWE_UV_TH3 +292 0x1000 //RX_BWE_V_TH +293 0x04CD //RX_BWE_GAIN1_V_TH1 +294 0x0F33 //RX_BWE_GAIN1_V_TH2 +295 0x7333 //RX_BWE_UV_EQ +296 0x199A //RX_BWE_V_EQ +297 0x7333 //RX_BWE_TONE_TH +298 0x0004 //RX_BWE_UV_HOLD_T +299 0x6CCD //RX_BWE_GAIN2_ALPHA +300 0x799A //RX_BWE_GAIN3_ALPHA +301 0x001E //RX_BWE_CUTOFF +302 0x3000 //RX_BWE_GAINFILL +303 0x3200 //RX_BWE_MAXTH_TONE +304 0x2000 //RX_BWE_EQ_0 +305 0x2000 //RX_BWE_EQ_1 +306 0x2000 //RX_BWE_EQ_2 +307 0x2000 //RX_BWE_EQ_3 +308 0x2000 //RX_BWE_EQ_4 +309 0x2000 //RX_BWE_EQ_5 +310 0x2000 //RX_BWE_EQ_6 +311 0x0000 //RX_BWE_RESRV_0 +312 0x0000 //RX_BWE_RESRV_1 +313 0x0000 //RX_BWE_RESRV_2 +#VOL 0 +163 0x1000 //RX_TDDRC_ALPHA_UP_1 +164 0x1000 //RX_TDDRC_ALPHA_UP_2 +165 0x1000 //RX_TDDRC_ALPHA_UP_3 +166 0x1000 //RX_TDDRC_ALPHA_UP_4 +184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +190 0x7000 //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +269 0x0001 //RX_TDDRC_THRD_0 +270 0x0002 //RX_TDDRC_THRD_1 +271 0x1800 //RX_TDDRC_THRD_2 +272 0x1800 //RX_TDDRC_THRD_3 +273 0x3000 //RX_TDDRC_SLANT_0 +274 0x6E00 //RX_TDDRC_SLANT_1 +275 0x1000 //RX_TDDRC_ALPHA_UP_0 +276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x199A //RX_TDDRC_HMNC_GAIN +279 0x0001 //RX_TDDRC_SMT_FLAG +280 0x0CCD //RX_TDDRC_SMT_W +281 0x0523 //RX_TDDRC_DRC_GAIN +195 0x0020 //RX_FDEQ_SUBNUM +196 0x4840 //RX_FDEQ_GAIN_0 +197 0x4040 //RX_FDEQ_GAIN_1 +198 0x4050 //RX_FDEQ_GAIN_2 +199 0x5D6C //RX_FDEQ_GAIN_3 +200 0x7B86 //RX_FDEQ_GAIN_4 +201 0x8186 //RX_FDEQ_GAIN_5 +202 0x8688 //RX_FDEQ_GAIN_6 +203 0x9097 //RX_FDEQ_GAIN_7 +204 0x929F //RX_FDEQ_GAIN_8 +205 0x9CA0 //RX_FDEQ_GAIN_9 +206 0xA391 //RX_FDEQ_GAIN_10 +207 0x8A82 //RX_FDEQ_GAIN_11 +208 0x726E //RX_FDEQ_GAIN_12 +209 0x704E //RX_FDEQ_GAIN_13 +210 0x6565 //RX_FDEQ_GAIN_14 +211 0x698A //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0202 //RX_FDEQ_BIN_0 +221 0x0202 //RX_FDEQ_BIN_1 +222 0x0302 //RX_FDEQ_BIN_2 +223 0x0304 //RX_FDEQ_BIN_3 +224 0x0405 //RX_FDEQ_BIN_4 +225 0x0506 //RX_FDEQ_BIN_5 +226 0x0708 //RX_FDEQ_BIN_6 +227 0x090A //RX_FDEQ_BIN_7 +228 0x0B0C //RX_FDEQ_BIN_8 +229 0x0D0E //RX_FDEQ_BIN_9 +230 0x1013 //RX_FDEQ_BIN_10 +231 0x1719 //RX_FDEQ_BIN_11 +232 0x1B1E //RX_FDEQ_BIN_12 +233 0x1E1E //RX_FDEQ_BIN_13 +234 0x1E28 //RX_FDEQ_BIN_14 +235 0x282C //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x4000 //RX_FDEQ_RESRV_0 +245 0x0320 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0030 //RX_FDDRC_BAND_MARGIN_1 +248 0x0050 //RX_FDDRC_BAND_MARGIN_2 +249 0x0080 //RX_FDDRC_BAND_MARGIN_3 +250 0x0007 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x5000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x6400 //RX_FDDRC_THRD_3_2 +258 0x6400 //RX_FDDRC_THRD_3_3 +259 0x2000 //RX_FDDRC_SLANT_0_0 +260 0x2000 //RX_FDDRC_SLANT_0_1 +261 0x2000 //RX_FDDRC_SLANT_0_2 +262 0x2000 //RX_FDDRC_SLANT_0_3 +263 0x5333 //RX_FDDRC_SLANT_1_0 +264 0x5333 //RX_FDDRC_SLANT_1_1 +265 0x5333 //RX_FDDRC_SLANT_1_2 +266 0x5333 //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +286 0x000B //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 +#VOL 1 +163 0x1000 //RX_TDDRC_ALPHA_UP_1 +164 0x1000 //RX_TDDRC_ALPHA_UP_2 +165 0x1000 //RX_TDDRC_ALPHA_UP_3 +166 0x1000 //RX_TDDRC_ALPHA_UP_4 +184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +190 0x7000 //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +269 0x0001 //RX_TDDRC_THRD_0 +270 0x0002 //RX_TDDRC_THRD_1 +271 0x1800 //RX_TDDRC_THRD_2 +272 0x1800 //RX_TDDRC_THRD_3 +273 0x3000 //RX_TDDRC_SLANT_0 +274 0x6E00 //RX_TDDRC_SLANT_1 +275 0x1000 //RX_TDDRC_ALPHA_UP_0 +276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x199A //RX_TDDRC_HMNC_GAIN +279 0x0001 //RX_TDDRC_SMT_FLAG +280 0x0CCD //RX_TDDRC_SMT_W +281 0x04E6 //RX_TDDRC_DRC_GAIN +195 0x0020 //RX_FDEQ_SUBNUM +196 0x4840 //RX_FDEQ_GAIN_0 +197 0x4040 //RX_FDEQ_GAIN_1 +198 0x4050 //RX_FDEQ_GAIN_2 +199 0x5D6C //RX_FDEQ_GAIN_3 +200 0x7B86 //RX_FDEQ_GAIN_4 +201 0x8186 //RX_FDEQ_GAIN_5 +202 0x8688 //RX_FDEQ_GAIN_6 +203 0x9097 //RX_FDEQ_GAIN_7 +204 0x929F //RX_FDEQ_GAIN_8 +205 0x9CA0 //RX_FDEQ_GAIN_9 +206 0xA391 //RX_FDEQ_GAIN_10 +207 0x8A82 //RX_FDEQ_GAIN_11 +208 0x726E //RX_FDEQ_GAIN_12 +209 0x704E //RX_FDEQ_GAIN_13 +210 0x6565 //RX_FDEQ_GAIN_14 +211 0x698A //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0202 //RX_FDEQ_BIN_0 +221 0x0202 //RX_FDEQ_BIN_1 +222 0x0302 //RX_FDEQ_BIN_2 +223 0x0304 //RX_FDEQ_BIN_3 +224 0x0405 //RX_FDEQ_BIN_4 +225 0x0506 //RX_FDEQ_BIN_5 +226 0x0708 //RX_FDEQ_BIN_6 +227 0x090A //RX_FDEQ_BIN_7 +228 0x0B0C //RX_FDEQ_BIN_8 +229 0x0D0E //RX_FDEQ_BIN_9 +230 0x1013 //RX_FDEQ_BIN_10 +231 0x1719 //RX_FDEQ_BIN_11 +232 0x1B1E //RX_FDEQ_BIN_12 +233 0x1E1E //RX_FDEQ_BIN_13 +234 0x1E28 //RX_FDEQ_BIN_14 +235 0x282C //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x4000 //RX_FDEQ_RESRV_0 +245 0x0320 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0030 //RX_FDDRC_BAND_MARGIN_1 +248 0x0050 //RX_FDDRC_BAND_MARGIN_2 +249 0x0080 //RX_FDDRC_BAND_MARGIN_3 +250 0x0007 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x5000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x6400 //RX_FDDRC_THRD_3_2 +258 0x6400 //RX_FDDRC_THRD_3_3 +259 0x2000 //RX_FDDRC_SLANT_0_0 +260 0x2000 //RX_FDDRC_SLANT_0_1 +261 0x2000 //RX_FDDRC_SLANT_0_2 +262 0x2000 //RX_FDDRC_SLANT_0_3 +263 0x5333 //RX_FDDRC_SLANT_1_0 +264 0x5333 //RX_FDDRC_SLANT_1_1 +265 0x5333 //RX_FDDRC_SLANT_1_2 +266 0x5333 //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +286 0x0013 //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 +#VOL 2 +163 0x1000 //RX_TDDRC_ALPHA_UP_1 +164 0x1000 //RX_TDDRC_ALPHA_UP_2 +165 0x1000 //RX_TDDRC_ALPHA_UP_3 +166 0x1000 //RX_TDDRC_ALPHA_UP_4 +184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +190 0x7000 //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +269 0x0001 //RX_TDDRC_THRD_0 +270 0x0002 //RX_TDDRC_THRD_1 +271 0x1800 //RX_TDDRC_THRD_2 +272 0x1800 //RX_TDDRC_THRD_3 +273 0x3000 //RX_TDDRC_SLANT_0 +274 0x6E00 //RX_TDDRC_SLANT_1 +275 0x1000 //RX_TDDRC_ALPHA_UP_0 +276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x199A //RX_TDDRC_HMNC_GAIN +279 0x0001 //RX_TDDRC_SMT_FLAG +280 0x0CCD //RX_TDDRC_SMT_W +281 0x04E6 //RX_TDDRC_DRC_GAIN +195 0x0020 //RX_FDEQ_SUBNUM +196 0x4840 //RX_FDEQ_GAIN_0 +197 0x4040 //RX_FDEQ_GAIN_1 +198 0x4050 //RX_FDEQ_GAIN_2 +199 0x5D6C //RX_FDEQ_GAIN_3 +200 0x7B86 //RX_FDEQ_GAIN_4 +201 0x8186 //RX_FDEQ_GAIN_5 +202 0x8688 //RX_FDEQ_GAIN_6 +203 0x9097 //RX_FDEQ_GAIN_7 +204 0x929F //RX_FDEQ_GAIN_8 +205 0x9CA0 //RX_FDEQ_GAIN_9 +206 0xA391 //RX_FDEQ_GAIN_10 +207 0x8A82 //RX_FDEQ_GAIN_11 +208 0x726E //RX_FDEQ_GAIN_12 +209 0x704E //RX_FDEQ_GAIN_13 +210 0x6565 //RX_FDEQ_GAIN_14 +211 0x698A //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0202 //RX_FDEQ_BIN_0 +221 0x0202 //RX_FDEQ_BIN_1 +222 0x0302 //RX_FDEQ_BIN_2 +223 0x0304 //RX_FDEQ_BIN_3 +224 0x0405 //RX_FDEQ_BIN_4 +225 0x0506 //RX_FDEQ_BIN_5 +226 0x0708 //RX_FDEQ_BIN_6 +227 0x090A //RX_FDEQ_BIN_7 +228 0x0B0C //RX_FDEQ_BIN_8 +229 0x0D0E //RX_FDEQ_BIN_9 +230 0x1013 //RX_FDEQ_BIN_10 +231 0x1719 //RX_FDEQ_BIN_11 +232 0x1B1E //RX_FDEQ_BIN_12 +233 0x1E1E //RX_FDEQ_BIN_13 +234 0x1E28 //RX_FDEQ_BIN_14 +235 0x282C //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x4000 //RX_FDEQ_RESRV_0 +245 0x0320 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0030 //RX_FDDRC_BAND_MARGIN_1 +248 0x0050 //RX_FDDRC_BAND_MARGIN_2 +249 0x0080 //RX_FDDRC_BAND_MARGIN_3 +250 0x0007 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x5000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x6400 //RX_FDDRC_THRD_3_2 +258 0x6400 //RX_FDDRC_THRD_3_3 +259 0x2000 //RX_FDDRC_SLANT_0_0 +260 0x2000 //RX_FDDRC_SLANT_0_1 +261 0x2000 //RX_FDDRC_SLANT_0_2 +262 0x2000 //RX_FDDRC_SLANT_0_3 +263 0x5333 //RX_FDDRC_SLANT_1_0 +264 0x5333 //RX_FDDRC_SLANT_1_1 +265 0x5333 //RX_FDDRC_SLANT_1_2 +266 0x5333 //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +286 0x001F //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 +#VOL 3 +163 0x1000 //RX_TDDRC_ALPHA_UP_1 +164 0x1000 //RX_TDDRC_ALPHA_UP_2 +165 0x1000 //RX_TDDRC_ALPHA_UP_3 +166 0x1000 //RX_TDDRC_ALPHA_UP_4 +184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +190 0x7000 //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +269 0x0001 //RX_TDDRC_THRD_0 +270 0x0002 //RX_TDDRC_THRD_1 +271 0x1800 //RX_TDDRC_THRD_2 +272 0x1800 //RX_TDDRC_THRD_3 +273 0x3000 //RX_TDDRC_SLANT_0 +274 0x6E00 //RX_TDDRC_SLANT_1 +275 0x1000 //RX_TDDRC_ALPHA_UP_0 +276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x199A //RX_TDDRC_HMNC_GAIN +279 0x0001 //RX_TDDRC_SMT_FLAG +280 0x0CCD //RX_TDDRC_SMT_W +281 0x04E6 //RX_TDDRC_DRC_GAIN +195 0x0020 //RX_FDEQ_SUBNUM +196 0x4840 //RX_FDEQ_GAIN_0 +197 0x4040 //RX_FDEQ_GAIN_1 +198 0x4050 //RX_FDEQ_GAIN_2 +199 0x5D6C //RX_FDEQ_GAIN_3 +200 0x7B86 //RX_FDEQ_GAIN_4 +201 0x8186 //RX_FDEQ_GAIN_5 +202 0x8688 //RX_FDEQ_GAIN_6 +203 0x9097 //RX_FDEQ_GAIN_7 +204 0x929F //RX_FDEQ_GAIN_8 +205 0x9CA0 //RX_FDEQ_GAIN_9 +206 0xA391 //RX_FDEQ_GAIN_10 +207 0x8A82 //RX_FDEQ_GAIN_11 +208 0x726E //RX_FDEQ_GAIN_12 +209 0x704E //RX_FDEQ_GAIN_13 +210 0x6565 //RX_FDEQ_GAIN_14 +211 0x698A //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0202 //RX_FDEQ_BIN_0 +221 0x0202 //RX_FDEQ_BIN_1 +222 0x0302 //RX_FDEQ_BIN_2 +223 0x0304 //RX_FDEQ_BIN_3 +224 0x0405 //RX_FDEQ_BIN_4 +225 0x0506 //RX_FDEQ_BIN_5 +226 0x0708 //RX_FDEQ_BIN_6 +227 0x090A //RX_FDEQ_BIN_7 +228 0x0B0C //RX_FDEQ_BIN_8 +229 0x0D0E //RX_FDEQ_BIN_9 +230 0x1013 //RX_FDEQ_BIN_10 +231 0x1719 //RX_FDEQ_BIN_11 +232 0x1B1E //RX_FDEQ_BIN_12 +233 0x1E1E //RX_FDEQ_BIN_13 +234 0x1E28 //RX_FDEQ_BIN_14 +235 0x282C //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x4000 //RX_FDEQ_RESRV_0 +245 0x0320 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0030 //RX_FDDRC_BAND_MARGIN_1 +248 0x0050 //RX_FDDRC_BAND_MARGIN_2 +249 0x0080 //RX_FDDRC_BAND_MARGIN_3 +250 0x0007 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x5000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x6400 //RX_FDDRC_THRD_3_2 +258 0x6400 //RX_FDDRC_THRD_3_3 +259 0x2000 //RX_FDDRC_SLANT_0_0 +260 0x2000 //RX_FDDRC_SLANT_0_1 +261 0x2000 //RX_FDDRC_SLANT_0_2 +262 0x2000 //RX_FDDRC_SLANT_0_3 +263 0x5333 //RX_FDDRC_SLANT_1_0 +264 0x5333 //RX_FDDRC_SLANT_1_1 +265 0x5333 //RX_FDDRC_SLANT_1_2 +266 0x5333 //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +286 0x0032 //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 +#VOL 4 +163 0x1000 //RX_TDDRC_ALPHA_UP_1 +164 0x1000 //RX_TDDRC_ALPHA_UP_2 +165 0x1000 //RX_TDDRC_ALPHA_UP_3 +166 0x1000 //RX_TDDRC_ALPHA_UP_4 +184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +190 0x7000 //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +269 0x0001 //RX_TDDRC_THRD_0 +270 0x0002 //RX_TDDRC_THRD_1 +271 0x1800 //RX_TDDRC_THRD_2 +272 0x1800 //RX_TDDRC_THRD_3 +273 0x3000 //RX_TDDRC_SLANT_0 +274 0x6E00 //RX_TDDRC_SLANT_1 +275 0x1000 //RX_TDDRC_ALPHA_UP_0 +276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x199A //RX_TDDRC_HMNC_GAIN +279 0x0001 //RX_TDDRC_SMT_FLAG +280 0x0CCD //RX_TDDRC_SMT_W +281 0x04E6 //RX_TDDRC_DRC_GAIN +195 0x0020 //RX_FDEQ_SUBNUM +196 0x4840 //RX_FDEQ_GAIN_0 +197 0x4040 //RX_FDEQ_GAIN_1 +198 0x4050 //RX_FDEQ_GAIN_2 +199 0x5D6C //RX_FDEQ_GAIN_3 +200 0x7B86 //RX_FDEQ_GAIN_4 +201 0x8186 //RX_FDEQ_GAIN_5 +202 0x8688 //RX_FDEQ_GAIN_6 +203 0x9097 //RX_FDEQ_GAIN_7 +204 0x929F //RX_FDEQ_GAIN_8 +205 0x9CA0 //RX_FDEQ_GAIN_9 +206 0xA391 //RX_FDEQ_GAIN_10 +207 0x8A82 //RX_FDEQ_GAIN_11 +208 0x726E //RX_FDEQ_GAIN_12 +209 0x704E //RX_FDEQ_GAIN_13 +210 0x6565 //RX_FDEQ_GAIN_14 +211 0x698A //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0202 //RX_FDEQ_BIN_0 +221 0x0202 //RX_FDEQ_BIN_1 +222 0x0302 //RX_FDEQ_BIN_2 +223 0x0304 //RX_FDEQ_BIN_3 +224 0x0405 //RX_FDEQ_BIN_4 +225 0x0506 //RX_FDEQ_BIN_5 +226 0x0708 //RX_FDEQ_BIN_6 +227 0x090A //RX_FDEQ_BIN_7 +228 0x0B0C //RX_FDEQ_BIN_8 +229 0x0D0E //RX_FDEQ_BIN_9 +230 0x1013 //RX_FDEQ_BIN_10 +231 0x1719 //RX_FDEQ_BIN_11 +232 0x1B1E //RX_FDEQ_BIN_12 +233 0x1E1E //RX_FDEQ_BIN_13 +234 0x1E28 //RX_FDEQ_BIN_14 +235 0x282C //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x4000 //RX_FDEQ_RESRV_0 +245 0x0320 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0030 //RX_FDDRC_BAND_MARGIN_1 +248 0x0050 //RX_FDDRC_BAND_MARGIN_2 +249 0x0080 //RX_FDDRC_BAND_MARGIN_3 +250 0x0007 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x5000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x6400 //RX_FDDRC_THRD_3_2 +258 0x6400 //RX_FDDRC_THRD_3_3 +259 0x2000 //RX_FDDRC_SLANT_0_0 +260 0x2000 //RX_FDDRC_SLANT_0_1 +261 0x2000 //RX_FDDRC_SLANT_0_2 +262 0x2000 //RX_FDDRC_SLANT_0_3 +263 0x5333 //RX_FDDRC_SLANT_1_0 +264 0x5333 //RX_FDDRC_SLANT_1_1 +265 0x5333 //RX_FDDRC_SLANT_1_2 +266 0x5333 //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +286 0x0052 //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 +#VOL 5 +163 0x1000 //RX_TDDRC_ALPHA_UP_1 +164 0x1000 //RX_TDDRC_ALPHA_UP_2 +165 0x1000 //RX_TDDRC_ALPHA_UP_3 +166 0x1000 //RX_TDDRC_ALPHA_UP_4 +184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +190 0x7000 //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +269 0x0001 //RX_TDDRC_THRD_0 +270 0x0002 //RX_TDDRC_THRD_1 +271 0x1800 //RX_TDDRC_THRD_2 +272 0x1800 //RX_TDDRC_THRD_3 +273 0x3000 //RX_TDDRC_SLANT_0 +274 0x6E00 //RX_TDDRC_SLANT_1 +275 0x1000 //RX_TDDRC_ALPHA_UP_0 +276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x199A //RX_TDDRC_HMNC_GAIN +279 0x0001 //RX_TDDRC_SMT_FLAG +280 0x0CCD //RX_TDDRC_SMT_W +281 0x04E6 //RX_TDDRC_DRC_GAIN +195 0x0020 //RX_FDEQ_SUBNUM +196 0x4840 //RX_FDEQ_GAIN_0 +197 0x4040 //RX_FDEQ_GAIN_1 +198 0x4050 //RX_FDEQ_GAIN_2 +199 0x5D6C //RX_FDEQ_GAIN_3 +200 0x7B86 //RX_FDEQ_GAIN_4 +201 0x8186 //RX_FDEQ_GAIN_5 +202 0x8688 //RX_FDEQ_GAIN_6 +203 0x9097 //RX_FDEQ_GAIN_7 +204 0x929F //RX_FDEQ_GAIN_8 +205 0x9CA0 //RX_FDEQ_GAIN_9 +206 0xA391 //RX_FDEQ_GAIN_10 +207 0x8A82 //RX_FDEQ_GAIN_11 +208 0x726E //RX_FDEQ_GAIN_12 +209 0x704E //RX_FDEQ_GAIN_13 +210 0x6565 //RX_FDEQ_GAIN_14 +211 0x698A //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0202 //RX_FDEQ_BIN_0 +221 0x0202 //RX_FDEQ_BIN_1 +222 0x0302 //RX_FDEQ_BIN_2 +223 0x0304 //RX_FDEQ_BIN_3 +224 0x0405 //RX_FDEQ_BIN_4 +225 0x0506 //RX_FDEQ_BIN_5 +226 0x0708 //RX_FDEQ_BIN_6 +227 0x090A //RX_FDEQ_BIN_7 +228 0x0B0C //RX_FDEQ_BIN_8 +229 0x0D0E //RX_FDEQ_BIN_9 +230 0x1013 //RX_FDEQ_BIN_10 +231 0x1719 //RX_FDEQ_BIN_11 +232 0x1B1E //RX_FDEQ_BIN_12 +233 0x1E1E //RX_FDEQ_BIN_13 +234 0x1E28 //RX_FDEQ_BIN_14 +235 0x282C //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x4000 //RX_FDEQ_RESRV_0 +245 0x0320 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0030 //RX_FDDRC_BAND_MARGIN_1 +248 0x0050 //RX_FDDRC_BAND_MARGIN_2 +249 0x0080 //RX_FDDRC_BAND_MARGIN_3 +250 0x0007 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x5000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x6400 //RX_FDDRC_THRD_3_2 +258 0x6400 //RX_FDDRC_THRD_3_3 +259 0x2000 //RX_FDDRC_SLANT_0_0 +260 0x2000 //RX_FDDRC_SLANT_0_1 +261 0x2000 //RX_FDDRC_SLANT_0_2 +262 0x2000 //RX_FDDRC_SLANT_0_3 +263 0x5333 //RX_FDDRC_SLANT_1_0 +264 0x5333 //RX_FDDRC_SLANT_1_1 +265 0x5333 //RX_FDDRC_SLANT_1_2 +266 0x5333 //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +286 0x0087 //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 +#VOL 6 +163 0x1000 //RX_TDDRC_ALPHA_UP_1 +164 0x1000 //RX_TDDRC_ALPHA_UP_2 +165 0x1000 //RX_TDDRC_ALPHA_UP_3 +166 0x1000 //RX_TDDRC_ALPHA_UP_4 +184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +190 0x7000 //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +269 0x0001 //RX_TDDRC_THRD_0 +270 0x0002 //RX_TDDRC_THRD_1 +271 0x1800 //RX_TDDRC_THRD_2 +272 0x1800 //RX_TDDRC_THRD_3 +273 0x3000 //RX_TDDRC_SLANT_0 +274 0x6E00 //RX_TDDRC_SLANT_1 +275 0x1000 //RX_TDDRC_ALPHA_UP_0 +276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x199A //RX_TDDRC_HMNC_GAIN +279 0x0001 //RX_TDDRC_SMT_FLAG +280 0x0CCD //RX_TDDRC_SMT_W +281 0x04E6 //RX_TDDRC_DRC_GAIN +195 0x0020 //RX_FDEQ_SUBNUM +196 0x4840 //RX_FDEQ_GAIN_0 +197 0x4040 //RX_FDEQ_GAIN_1 +198 0x4050 //RX_FDEQ_GAIN_2 +199 0x5D6C //RX_FDEQ_GAIN_3 +200 0x7B86 //RX_FDEQ_GAIN_4 +201 0x8186 //RX_FDEQ_GAIN_5 +202 0x8688 //RX_FDEQ_GAIN_6 +203 0x9097 //RX_FDEQ_GAIN_7 +204 0x929F //RX_FDEQ_GAIN_8 +205 0x9CA0 //RX_FDEQ_GAIN_9 +206 0xA391 //RX_FDEQ_GAIN_10 +207 0x8A82 //RX_FDEQ_GAIN_11 +208 0x726E //RX_FDEQ_GAIN_12 +209 0x704E //RX_FDEQ_GAIN_13 +210 0x6565 //RX_FDEQ_GAIN_14 +211 0x698A //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0202 //RX_FDEQ_BIN_0 +221 0x0202 //RX_FDEQ_BIN_1 +222 0x0302 //RX_FDEQ_BIN_2 +223 0x0304 //RX_FDEQ_BIN_3 +224 0x0405 //RX_FDEQ_BIN_4 +225 0x0506 //RX_FDEQ_BIN_5 +226 0x0708 //RX_FDEQ_BIN_6 +227 0x090A //RX_FDEQ_BIN_7 +228 0x0B0C //RX_FDEQ_BIN_8 +229 0x0D0E //RX_FDEQ_BIN_9 +230 0x1013 //RX_FDEQ_BIN_10 +231 0x1719 //RX_FDEQ_BIN_11 +232 0x1B1E //RX_FDEQ_BIN_12 +233 0x1E1E //RX_FDEQ_BIN_13 +234 0x1E28 //RX_FDEQ_BIN_14 +235 0x282C //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x4000 //RX_FDEQ_RESRV_0 +245 0x0320 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0030 //RX_FDDRC_BAND_MARGIN_1 +248 0x0050 //RX_FDDRC_BAND_MARGIN_2 +249 0x0080 //RX_FDDRC_BAND_MARGIN_3 +250 0x0007 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x5000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x6400 //RX_FDDRC_THRD_3_2 +258 0x6400 //RX_FDDRC_THRD_3_3 +259 0x2000 //RX_FDDRC_SLANT_0_0 +260 0x2000 //RX_FDDRC_SLANT_0_1 +261 0x2000 //RX_FDDRC_SLANT_0_2 +262 0x2000 //RX_FDDRC_SLANT_0_3 +263 0x5333 //RX_FDDRC_SLANT_1_0 +264 0x5333 //RX_FDDRC_SLANT_1_1 +265 0x5333 //RX_FDDRC_SLANT_1_2 +266 0x5333 //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +286 0x0100 //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 #CASE_NAME HANDSET-HANDSET-TMOBILE_US-FB -#PARAM_TYPE TX+RX -#TOTAL_CUSTOM_STEP 7 +#PARAM_MODE Full +#PARAM_TYPE TX+2RX +#TOTAL_CUSTOM_STEP 7+7 #TX 0 0x0000 //TX_OPERATION_MODE_0 1 0x0000 //TX_OPERATION_MODE_1 @@ -24570,7 +37409,7 @@ 18 0x0000 //TX_SYS_RESRV_2 19 0x0000 //TX_SYS_RESRV_3 20 0x0000 //TX_DIST2REF0 -21 0x009D //TX_DIST2REF1 +21 0x009C //TX_DIST2REF1 22 0x0000 //TX_DIST2REF_02 23 0x0000 //TX_DIST2REF_03 24 0x0000 //TX_DIST2REF_04 @@ -24800,12 +37639,12 @@ 248 0xF800 //TX_THR_SN_EST_6 249 0xF700 //TX_THR_SN_EST_7 250 0x0000 //TX_DELTA_THR_SN_EST_0 -251 0x0100 //TX_DELTA_THR_SN_EST_1 +251 0x0200 //TX_DELTA_THR_SN_EST_1 252 0x0200 //TX_DELTA_THR_SN_EST_2 253 0x0200 //TX_DELTA_THR_SN_EST_3 -254 0x0200 //TX_DELTA_THR_SN_EST_4 -255 0x0100 //TX_DELTA_THR_SN_EST_5 -256 0x0200 //TX_DELTA_THR_SN_EST_6 +254 0x0100 //TX_DELTA_THR_SN_EST_4 +255 0x0200 //TX_DELTA_THR_SN_EST_5 +256 0x0100 //TX_DELTA_THR_SN_EST_6 257 0x0200 //TX_DELTA_THR_SN_EST_7 258 0x4000 //TX_LAMBDA_NN_EST_0 259 0x4000 //TX_LAMBDA_NN_EST_1 @@ -24833,16 +37672,16 @@ 281 0x0014 //TX_NS_LVL_CTRL_0 282 0x0016 //TX_NS_LVL_CTRL_1 283 0x0016 //TX_NS_LVL_CTRL_2 -284 0x0016 //TX_NS_LVL_CTRL_3 -285 0x0018 //TX_NS_LVL_CTRL_4 -286 0x0016 //TX_NS_LVL_CTRL_5 -287 0x0012 //TX_NS_LVL_CTRL_6 +284 0x0018 //TX_NS_LVL_CTRL_3 +285 0x0016 //TX_NS_LVL_CTRL_4 +286 0x0012 //TX_NS_LVL_CTRL_5 +287 0x0016 //TX_NS_LVL_CTRL_6 288 0x0017 //TX_NS_LVL_CTRL_7 289 0x000E //TX_MIN_GAIN_S_0 -290 0x0012 //TX_MIN_GAIN_S_1 -291 0x0007 //TX_MIN_GAIN_S_2 -292 0x0012 //TX_MIN_GAIN_S_3 -293 0x0010 //TX_MIN_GAIN_S_4 +290 0x0007 //TX_MIN_GAIN_S_1 +291 0x0012 //TX_MIN_GAIN_S_2 +292 0x0010 //TX_MIN_GAIN_S_3 +293 0x0012 //TX_MIN_GAIN_S_4 294 0x0012 //TX_MIN_GAIN_S_5 295 0x0012 //TX_MIN_GAIN_S_6 296 0x0012 //TX_MIN_GAIN_S_7 @@ -24864,29 +37703,29 @@ 312 0x7FFF //TX_A_POST_FILT_0 313 0x2000 //TX_A_POST_FILT_1 314 0x4000 //TX_A_POST_FILT_S_0 -315 0x5000 //TX_A_POST_FILT_S_1 +315 0x4000 //TX_A_POST_FILT_S_1 316 0x4000 //TX_A_POST_FILT_S_2 317 0x4000 //TX_A_POST_FILT_S_3 318 0x4000 //TX_A_POST_FILT_S_4 319 0x4000 //TX_A_POST_FILT_S_5 -320 0x4000 //TX_A_POST_FILT_S_6 +320 0x5000 //TX_A_POST_FILT_S_6 321 0x7000 //TX_A_POST_FILT_S_7 322 0x1000 //TX_B_POST_FILT_0 323 0x2000 //TX_B_POST_FILT_1 -324 0x3000 //TX_B_POST_FILT_2 +324 0x2000 //TX_B_POST_FILT_2 325 0x2000 //TX_B_POST_FILT_3 -326 0x5000 //TX_B_POST_FILT_4 +326 0x2000 //TX_B_POST_FILT_4 327 0x2000 //TX_B_POST_FILT_5 -328 0x6000 //TX_B_POST_FILT_6 +328 0x3000 //TX_B_POST_FILT_6 329 0x3000 //TX_B_POST_FILT_7 330 0x1000 //TX_B_LESSCUT_RTO_S_0 -331 0x6000 //TX_B_LESSCUT_RTO_S_1 -332 0x6000 //TX_B_LESSCUT_RTO_S_2 -333 0x6000 //TX_B_LESSCUT_RTO_S_3 -334 0x6000 //TX_B_LESSCUT_RTO_S_4 -335 0x6000 //TX_B_LESSCUT_RTO_S_5 -336 0x7FFF //TX_B_LESSCUT_RTO_S_6 -337 0x7FFF //TX_B_LESSCUT_RTO_S_7 +331 0x1000 //TX_B_LESSCUT_RTO_S_1 +332 0x1000 //TX_B_LESSCUT_RTO_S_2 +333 0x1000 //TX_B_LESSCUT_RTO_S_3 +334 0x1000 //TX_B_LESSCUT_RTO_S_4 +335 0x1000 //TX_B_LESSCUT_RTO_S_5 +336 0x1000 //TX_B_LESSCUT_RTO_S_6 +337 0x1000 //TX_B_LESSCUT_RTO_S_7 338 0x7E14 //TX_LAMBDA_PFILT 339 0x7C29 //TX_LAMBDA_PFILT_S_0 340 0x7C29 //TX_LAMBDA_PFILT_S_1 @@ -24929,10 +37768,10 @@ 377 0x4E20 //TX_NOISE_TH_5_4 378 0x39DF //TX_NOISE_TH_6 379 0x0014 //TX_MINENOISE_TH -380 0x4000 //TX_MINENOISE_MIC0_TH_MTS -381 0xFFEE //TX_MINENOISE_MIC0_TH_EXP -382 0x6000 //TX_MINENOISE_MIC0_S_TH_MTS -383 0xFFF3 //TX_MINENOISE_MIC0_S_TH_EXP +380 0xD508 //TX_MORENS_TFMASK_TH +381 0x0001 //TX_DRC_QUIET_FLOOR +382 0x6D60 //TX_RATIODTL_CUT_TH +383 0x1482 //TX_DT_CUT_K1 384 0x00A5 //TX_OUT_ENER_S_TH_CLEAN 385 0x00A5 //TX_OUT_ENER_S_TH_LESSCLEAN 386 0x00A5 //TX_OUT_ENER_S_TH_NOISY @@ -24940,15 +37779,15 @@ 388 0x0200 //TX_OUT_ENER_TH_SPEECH 389 0x2000 //TX_SN_NPB_GAIN 390 0x0000 //TX_NN_NPB_GAIN -391 0x0000 //TX_CSX_ALPHA_0 -392 0x0000 //TX_CSX_ALPHA_1 -393 0x0000 //TX_CSX_ALPHA_2 -394 0x0000 //TX_CSX_ALPHA_3 -395 0x0800 //TX_MU_ARSP_EST -396 0x00C8 //TX_P_OUTBEAM_MIN_TH +391 0x3000 //TX_POST_MASK_SUP_HSNE +392 0x07D0 //TX_TAIL_DET_TH +393 0x4000 //TX_B_LESSCUT_RTO_WTA +394 0x0000 //TX_MEL_G_R +395 0x0080 //TX_SUPHIGH_TH +396 0x0000 //TX_MASK_G_R 397 0x0002 //TX_EXTRA_NS_L -398 0x0800 //TX_EXTRA_NS_A -399 0x0005 //TX_VR_NOISE_FLOOR_TH +398 0x1800 //TX_C_POST_FLT_MASK +399 0x7FFF //TX_A_POST_FLT_WNS 400 0x0148 //TX_MIN_G_LOW300HZ 401 0x0004 //TX_MAXLEVEL_CNG 402 0x00B4 //TX_STN_NOISE_TH @@ -25063,16 +37902,16 @@ 511 0x6666 //TX_MIC_TO_BFGAIN 512 0x0000 //TX_MICTOBFGAIN0 513 0x0000 //TX_FASTMUE_TH -514 0x0000 //TX_DERVB_LEN_0 -515 0x0000 //TX_DERVB_LEN_1 -516 0x0000 //TX_RHO_DERVB -517 0x0000 //TX_MIC_INDX_DERVB -518 0x0000 //TX_MU_DERVB -519 0x0000 //TX_DR_RESRV_0 -520 0x0000 //TX_DR_RESRV_1 -521 0x0000 //TX_DR_RESRV_2 -522 0x0000 //TX_DR_RESRV_3 -523 0x0000 //TX_DR_RESRV_4 +514 0x2CCC //TX_DEREVERB_LF_MU +515 0x3200 //TX_DEREVERB_HF_MU +516 0x0007 //TX_DEREVERB_DELAY +517 0x0004 //TX_DEREVERB_COEF_LEN +518 0x0003 //TX_DEREVERB_DNR +519 0x0000 //TX_DEREVERB_ALPHA +520 0x0000 //TX_DEREVERB_BETA +521 0x7FFF //TX_GSC_RTOL_TH +522 0x7FFF //TX_GSC_RTOH_TH +523 0x7E2C //TX_WIDE2_MEANHTH 524 0x0000 //TX_DR_RESRV_5 525 0x0000 //TX_DR_RESRV_6 526 0x0000 //TX_DR_RESRV_7 @@ -25446,8 +38285,73 @@ 894 0xC000 //TX_FASTNS_SSA_THHFL 895 0xCCCC //TX_FASTNS_SSA_THLFH 896 0xD999 //TX_FASTNS_SSA_THHFH +897 0x2339 //TX_SENDFUNC_REG_MICMUTE +898 0x0021 //TX_SENDFUNC_REG_MICMUTE1 +899 0x02BC //TX_MICMUTE_RATIO_THR +900 0x0140 //TX_MICMUTE_AMP_THR +901 0x0004 //TX_MICMUTE_HPF_IND +902 0x00C0 //TX_MICMUTE_LOG_EYR_TH +903 0x0008 //TX_MICMUTE_CVG_TIME +904 0x0008 //TX_MICMUTE_RELEASE_TIME +905 0x01FE //TX_MIC_VOLUME_MIC0MUTE +906 0x0020 //TX_MICMUTE_EPD_OFFSET_0 +907 0x001E //TX_MICMUTE_FRQ_AEC_L +908 0x7999 //TX_MICMUTE_EAD_THR +909 0x7FFF //TX_MICMUTE_LAMBDA_CB_NLE +910 0x7FFF //TX_MICMUTE_LAMBDA_RE_EST +911 0x4000 //TX_DTD_THR1_MICMUTE_0 +912 0x7000 //TX_DTD_THR1_MICMUTE_1 +913 0x7FFF //TX_DTD_THR1_MICMUTE_2 +914 0x7FFF //TX_DTD_THR1_MICMUTE_3 +915 0x6CCC //TX_DTD_THR2_MICMUTE_0 +916 0x0400 //TX_MICMUTE_MIN_EQ_RE_EST_0 +917 0x0400 //TX_MICMUTE_MIN_EQ_RE_EST_1 +918 0x1000 //TX_MICMUTE_MIN_EQ_RE_EST_2 +919 0x7FFF //TX_MICMUTE_MIN_EQ_RE_EST_3 +920 0x7FFF //TX_MICMUTE_MIN_EQ_RE_EST_4 +921 0x4000 //TX_MICMUTE_C_POST_FLT +922 0x03E8 //TX_MICMUTE_DT_CUT_K +923 0x0001 //TX_MICMUTE_DT_CUT_THR +924 0x03E8 //TX_MICMUTE_DT_CUT_K2 +925 0x0001 //TX_MICMUTE_DT_CUT_THR2 +926 0x0064 //TX_MICMUTE_DT2_HOLD_N +927 0x1000 //TX_MICMUTE_RATIODTH_THCUT +928 0x1000 //TX_MICMUTE_B_POST_FLT_ECHOL +929 0x7FFF //TX_MICMUTE_B_POST_FLT_ECHOH +930 0x0400 //TX_MICMUTE_C_POST_FLT_MASK +931 0x7999 //TX_MICMUTE_RATIODTL_CUT_TH +932 0x0258 //TX_MICMUTE_DT_CUT_K1 +933 0x0800 //TX_MICMUTE_N2_SN_EST +934 0xFC00 //TX_MICMUTE_THR_SN_EST_0 +935 0x001C //TX_MICMUTE_MIN_G_CTRL_0 +936 0x6000 //TX_MICMUTE_A_POST_FILT_S_0 +937 0x7000 //TX_MICMUTE_B_POST_FILT_0 +938 0x2710 //TX_MIC1RUB_AMP_THR +939 0x0010 //TX_MIC1MUTE_RATIO_THR +940 0x0450 //TX_MIC1MUTE_AMP_THR +941 0x0008 //TX_MIC1MUTE_CVG_TIME +942 0x0008 //TX_MIC1MUTE_RELEASE_TIME +943 0x0000 //TX_AMS_RESRV_01 +944 0x0000 //TX_AMS_RESRV_02 +945 0x0000 //TX_AMS_RESRV_03 +946 0x0000 //TX_AMS_RESRV_04 +947 0x0000 //TX_AMS_RESRV_05 +948 0x0000 //TX_AMS_RESRV_06 +949 0x0000 //TX_AMS_RESRV_07 +950 0x0000 //TX_AMS_RESRV_08 +951 0x0000 //TX_AMS_RESRV_09 +952 0x0000 //TX_AMS_RESRV_10 +953 0x0000 //TX_AMS_RESRV_11 +954 0x0000 //TX_AMS_RESRV_12 +955 0x0000 //TX_AMS_RESRV_13 +956 0x0000 //TX_AMS_RESRV_14 +957 0x0000 //TX_AMS_RESRV_15 +958 0x0000 //TX_AMS_RESRV_16 +959 0x0000 //TX_AMS_RESRV_17 +960 0x0000 //TX_AMS_RESRV_18 +961 0x0000 //TX_AMS_RESRV_19 #RX -0 0x002C //RX_RECVFUNC_MODE_0 +0 0x202C //RX_RECVFUNC_MODE_0 1 0x0000 //RX_RECVFUNC_MODE_1 2 0x0004 //RX_SAMPLINGFREQ_SIG 3 0x0004 //RX_SAMPLINGFREQ_PROC @@ -26297,14 +39201,866 @@ 110 0x0000 //RX_FDDRC_RESRV_0 129 0x0100 //RX_SPK_VOL 130 0x0000 //RX_VOL_RESRV_0 +#RX 2 +157 0x002C //RX_RECVFUNC_MODE_0 +158 0x0000 //RX_RECVFUNC_MODE_1 +159 0x0004 //RX_SAMPLINGFREQ_SIG +160 0x0004 //RX_SAMPLINGFREQ_PROC +161 0x000A //RX_FRAME_SZ +162 0x0000 //RX_DELAY_OPT +163 0x1000 //RX_TDDRC_ALPHA_UP_1 +164 0x1000 //RX_TDDRC_ALPHA_UP_2 +165 0x1000 //RX_TDDRC_ALPHA_UP_3 +166 0x1000 //RX_TDDRC_ALPHA_UP_4 +167 0x064E //RX_PGA +168 0x7FFF //RX_A_HP +169 0x4000 //RX_B_PE +170 0x5800 //RX_THR_PITCH_DET_0 +171 0x5000 //RX_THR_PITCH_DET_1 +172 0x4000 //RX_THR_PITCH_DET_2 +173 0x0008 //RX_PITCH_BFR_LEN +174 0x0003 //RX_SBD_PITCH_DET +175 0x0100 //RX_PP_RESRV_0 +176 0x0020 //RX_PP_RESRV_1 +177 0x0600 //RX_N_SN_EST +178 0x000C //RX_N2_SN_EST +179 0x000F //RX_NS_LVL_CTRL +180 0xF800 //RX_THR_SN_EST +181 0x7E00 //RX_LAMBDA_PFILT +182 0x000A //RX_FENS_RESRV_0 +183 0x0190 //RX_FENS_RESRV_1 +184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +187 0x0002 //RX_EXTRA_NS_L +188 0x0800 //RX_EXTRA_NS_A +189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +190 0x7000 //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +192 0x199A //RX_A_POST_FLT +193 0x0000 //RX_LMT_THRD +194 0x4000 //RX_LMT_ALPHA +195 0x0020 //RX_FDEQ_SUBNUM +196 0x4848 //RX_FDEQ_GAIN_0 +197 0x4850 //RX_FDEQ_GAIN_1 +198 0x6478 //RX_FDEQ_GAIN_2 +199 0x8689 //RX_FDEQ_GAIN_3 +200 0x908F //RX_FDEQ_GAIN_4 +201 0x9495 //RX_FDEQ_GAIN_5 +202 0x989D //RX_FDEQ_GAIN_6 +203 0x9DA6 //RX_FDEQ_GAIN_7 +204 0xA895 //RX_FDEQ_GAIN_8 +205 0x8A8A //RX_FDEQ_GAIN_9 +206 0x8E78 //RX_FDEQ_GAIN_10 +207 0x7070 //RX_FDEQ_GAIN_11 +208 0x7680 //RX_FDEQ_GAIN_12 +209 0x787C //RX_FDEQ_GAIN_13 +210 0x8890 //RX_FDEQ_GAIN_14 +211 0x9CAC //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0202 //RX_FDEQ_BIN_0 +221 0x0202 //RX_FDEQ_BIN_1 +222 0x0302 //RX_FDEQ_BIN_2 +223 0x0304 //RX_FDEQ_BIN_3 +224 0x0405 //RX_FDEQ_BIN_4 +225 0x0506 //RX_FDEQ_BIN_5 +226 0x0708 //RX_FDEQ_BIN_6 +227 0x090A //RX_FDEQ_BIN_7 +228 0x0B0C //RX_FDEQ_BIN_8 +229 0x0D0E //RX_FDEQ_BIN_9 +230 0x1013 //RX_FDEQ_BIN_10 +231 0x1719 //RX_FDEQ_BIN_11 +232 0x1B1E //RX_FDEQ_BIN_12 +233 0x1E1E //RX_FDEQ_BIN_13 +234 0x1E28 //RX_FDEQ_BIN_14 +235 0x282C //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x4000 //RX_FDEQ_RESRV_0 +245 0x0320 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0030 //RX_FDDRC_BAND_MARGIN_1 +248 0x0050 //RX_FDDRC_BAND_MARGIN_2 +249 0x0080 //RX_FDDRC_BAND_MARGIN_3 +250 0x0007 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x5000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x6400 //RX_FDDRC_THRD_3_2 +258 0x6400 //RX_FDDRC_THRD_3_3 +259 0x2000 //RX_FDDRC_SLANT_0_0 +260 0x2000 //RX_FDDRC_SLANT_0_1 +261 0x2000 //RX_FDDRC_SLANT_0_2 +262 0x2000 //RX_FDDRC_SLANT_0_3 +263 0x5333 //RX_FDDRC_SLANT_1_0 +264 0x5333 //RX_FDDRC_SLANT_1_1 +265 0x5333 //RX_FDDRC_SLANT_1_2 +266 0x5333 //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +268 0x0002 //RX_FILTINDX +269 0x0000 //RX_TDDRC_THRD_0 +270 0x0000 //RX_TDDRC_THRD_1 +271 0x1800 //RX_TDDRC_THRD_2 +272 0x1800 //RX_TDDRC_THRD_3 +273 0x3000 //RX_TDDRC_SLANT_0 +274 0x6E00 //RX_TDDRC_SLANT_1 +275 0x1000 //RX_TDDRC_ALPHA_UP_0 +276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x199A //RX_TDDRC_HMNC_GAIN +279 0x0001 //RX_TDDRC_SMT_FLAG +280 0x0CCD //RX_TDDRC_SMT_W +281 0x0275 //RX_TDDRC_DRC_GAIN +282 0x7C00 //RX_LAMBDA_PKA_FP +283 0x1964 //RX_TPKA_FP +284 0x0080 //RX_MIN_G_FP +285 0x2000 //RX_MAX_G_FP +286 0x000D //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 +288 0x0000 //RX_MAXLEVEL_CNG +289 0x3000 //RX_BWE_UV_TH +290 0x3000 //RX_BWE_UV_TH2 +291 0x1800 //RX_BWE_UV_TH3 +292 0x1000 //RX_BWE_V_TH +293 0x04CD //RX_BWE_GAIN1_V_TH1 +294 0x0F33 //RX_BWE_GAIN1_V_TH2 +295 0x7333 //RX_BWE_UV_EQ +296 0x199A //RX_BWE_V_EQ +297 0x7333 //RX_BWE_TONE_TH +298 0x0004 //RX_BWE_UV_HOLD_T +299 0x6CCD //RX_BWE_GAIN2_ALPHA +300 0x799A //RX_BWE_GAIN3_ALPHA +301 0x001E //RX_BWE_CUTOFF +302 0x3000 //RX_BWE_GAINFILL +303 0x3200 //RX_BWE_MAXTH_TONE +304 0x2000 //RX_BWE_EQ_0 +305 0x2000 //RX_BWE_EQ_1 +306 0x2000 //RX_BWE_EQ_2 +307 0x2000 //RX_BWE_EQ_3 +308 0x2000 //RX_BWE_EQ_4 +309 0x2000 //RX_BWE_EQ_5 +310 0x2000 //RX_BWE_EQ_6 +311 0x0000 //RX_BWE_RESRV_0 +312 0x0000 //RX_BWE_RESRV_1 +313 0x0000 //RX_BWE_RESRV_2 +#VOL 0 +163 0x1000 //RX_TDDRC_ALPHA_UP_1 +164 0x1000 //RX_TDDRC_ALPHA_UP_2 +165 0x1000 //RX_TDDRC_ALPHA_UP_3 +166 0x1000 //RX_TDDRC_ALPHA_UP_4 +184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +190 0x7000 //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +269 0x0000 //RX_TDDRC_THRD_0 +270 0x0000 //RX_TDDRC_THRD_1 +271 0x1800 //RX_TDDRC_THRD_2 +272 0x1800 //RX_TDDRC_THRD_3 +273 0x3000 //RX_TDDRC_SLANT_0 +274 0x6E00 //RX_TDDRC_SLANT_1 +275 0x1000 //RX_TDDRC_ALPHA_UP_0 +276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x199A //RX_TDDRC_HMNC_GAIN +279 0x0001 //RX_TDDRC_SMT_FLAG +280 0x0CCD //RX_TDDRC_SMT_W +281 0x0275 //RX_TDDRC_DRC_GAIN +195 0x0020 //RX_FDEQ_SUBNUM +196 0x4848 //RX_FDEQ_GAIN_0 +197 0x4850 //RX_FDEQ_GAIN_1 +198 0x6478 //RX_FDEQ_GAIN_2 +199 0x8689 //RX_FDEQ_GAIN_3 +200 0x908F //RX_FDEQ_GAIN_4 +201 0x9495 //RX_FDEQ_GAIN_5 +202 0x989D //RX_FDEQ_GAIN_6 +203 0x9DA6 //RX_FDEQ_GAIN_7 +204 0xA895 //RX_FDEQ_GAIN_8 +205 0x8A8A //RX_FDEQ_GAIN_9 +206 0x8E78 //RX_FDEQ_GAIN_10 +207 0x7070 //RX_FDEQ_GAIN_11 +208 0x7680 //RX_FDEQ_GAIN_12 +209 0x787C //RX_FDEQ_GAIN_13 +210 0x8890 //RX_FDEQ_GAIN_14 +211 0x9CAC //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0202 //RX_FDEQ_BIN_0 +221 0x0202 //RX_FDEQ_BIN_1 +222 0x0302 //RX_FDEQ_BIN_2 +223 0x0304 //RX_FDEQ_BIN_3 +224 0x0405 //RX_FDEQ_BIN_4 +225 0x0506 //RX_FDEQ_BIN_5 +226 0x0708 //RX_FDEQ_BIN_6 +227 0x090A //RX_FDEQ_BIN_7 +228 0x0B0C //RX_FDEQ_BIN_8 +229 0x0D0E //RX_FDEQ_BIN_9 +230 0x1013 //RX_FDEQ_BIN_10 +231 0x1719 //RX_FDEQ_BIN_11 +232 0x1B1E //RX_FDEQ_BIN_12 +233 0x1E1E //RX_FDEQ_BIN_13 +234 0x1E28 //RX_FDEQ_BIN_14 +235 0x282C //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x4000 //RX_FDEQ_RESRV_0 +245 0x0320 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0030 //RX_FDDRC_BAND_MARGIN_1 +248 0x0050 //RX_FDDRC_BAND_MARGIN_2 +249 0x0080 //RX_FDDRC_BAND_MARGIN_3 +250 0x0007 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x5000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x6400 //RX_FDDRC_THRD_3_2 +258 0x6400 //RX_FDDRC_THRD_3_3 +259 0x2000 //RX_FDDRC_SLANT_0_0 +260 0x2000 //RX_FDDRC_SLANT_0_1 +261 0x2000 //RX_FDDRC_SLANT_0_2 +262 0x2000 //RX_FDDRC_SLANT_0_3 +263 0x5333 //RX_FDDRC_SLANT_1_0 +264 0x5333 //RX_FDDRC_SLANT_1_1 +265 0x5333 //RX_FDDRC_SLANT_1_2 +266 0x5333 //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +286 0x000D //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 +#VOL 1 +163 0x1000 //RX_TDDRC_ALPHA_UP_1 +164 0x1000 //RX_TDDRC_ALPHA_UP_2 +165 0x1000 //RX_TDDRC_ALPHA_UP_3 +166 0x1000 //RX_TDDRC_ALPHA_UP_4 +184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +190 0x7000 //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +269 0x0000 //RX_TDDRC_THRD_0 +270 0x0000 //RX_TDDRC_THRD_1 +271 0x1800 //RX_TDDRC_THRD_2 +272 0x1800 //RX_TDDRC_THRD_3 +273 0x3000 //RX_TDDRC_SLANT_0 +274 0x6E00 //RX_TDDRC_SLANT_1 +275 0x1000 //RX_TDDRC_ALPHA_UP_0 +276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x199A //RX_TDDRC_HMNC_GAIN +279 0x0001 //RX_TDDRC_SMT_FLAG +280 0x0CCD //RX_TDDRC_SMT_W +281 0x0275 //RX_TDDRC_DRC_GAIN +195 0x0020 //RX_FDEQ_SUBNUM +196 0x4848 //RX_FDEQ_GAIN_0 +197 0x4850 //RX_FDEQ_GAIN_1 +198 0x6478 //RX_FDEQ_GAIN_2 +199 0x8689 //RX_FDEQ_GAIN_3 +200 0x908F //RX_FDEQ_GAIN_4 +201 0x9495 //RX_FDEQ_GAIN_5 +202 0x989D //RX_FDEQ_GAIN_6 +203 0x9DA6 //RX_FDEQ_GAIN_7 +204 0xA895 //RX_FDEQ_GAIN_8 +205 0x8A8A //RX_FDEQ_GAIN_9 +206 0x8E78 //RX_FDEQ_GAIN_10 +207 0x7070 //RX_FDEQ_GAIN_11 +208 0x7680 //RX_FDEQ_GAIN_12 +209 0x787C //RX_FDEQ_GAIN_13 +210 0x8890 //RX_FDEQ_GAIN_14 +211 0x9CAC //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0202 //RX_FDEQ_BIN_0 +221 0x0202 //RX_FDEQ_BIN_1 +222 0x0302 //RX_FDEQ_BIN_2 +223 0x0304 //RX_FDEQ_BIN_3 +224 0x0405 //RX_FDEQ_BIN_4 +225 0x0506 //RX_FDEQ_BIN_5 +226 0x0708 //RX_FDEQ_BIN_6 +227 0x090A //RX_FDEQ_BIN_7 +228 0x0B0C //RX_FDEQ_BIN_8 +229 0x0D0E //RX_FDEQ_BIN_9 +230 0x1013 //RX_FDEQ_BIN_10 +231 0x1719 //RX_FDEQ_BIN_11 +232 0x1B1E //RX_FDEQ_BIN_12 +233 0x1E1E //RX_FDEQ_BIN_13 +234 0x1E28 //RX_FDEQ_BIN_14 +235 0x282C //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x4000 //RX_FDEQ_RESRV_0 +245 0x0320 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0030 //RX_FDDRC_BAND_MARGIN_1 +248 0x0050 //RX_FDDRC_BAND_MARGIN_2 +249 0x0080 //RX_FDDRC_BAND_MARGIN_3 +250 0x0007 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x5000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x6400 //RX_FDDRC_THRD_3_2 +258 0x6400 //RX_FDDRC_THRD_3_3 +259 0x2000 //RX_FDDRC_SLANT_0_0 +260 0x2000 //RX_FDDRC_SLANT_0_1 +261 0x2000 //RX_FDDRC_SLANT_0_2 +262 0x2000 //RX_FDDRC_SLANT_0_3 +263 0x5333 //RX_FDDRC_SLANT_1_0 +264 0x5333 //RX_FDDRC_SLANT_1_1 +265 0x5333 //RX_FDDRC_SLANT_1_2 +266 0x5333 //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +286 0x0016 //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 +#VOL 2 +163 0x1000 //RX_TDDRC_ALPHA_UP_1 +164 0x1000 //RX_TDDRC_ALPHA_UP_2 +165 0x1000 //RX_TDDRC_ALPHA_UP_3 +166 0x1000 //RX_TDDRC_ALPHA_UP_4 +184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +190 0x7000 //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +269 0x0000 //RX_TDDRC_THRD_0 +270 0x0000 //RX_TDDRC_THRD_1 +271 0x1800 //RX_TDDRC_THRD_2 +272 0x1800 //RX_TDDRC_THRD_3 +273 0x3000 //RX_TDDRC_SLANT_0 +274 0x6E00 //RX_TDDRC_SLANT_1 +275 0x1000 //RX_TDDRC_ALPHA_UP_0 +276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x199A //RX_TDDRC_HMNC_GAIN +279 0x0001 //RX_TDDRC_SMT_FLAG +280 0x0CCD //RX_TDDRC_SMT_W +281 0x0275 //RX_TDDRC_DRC_GAIN +195 0x0020 //RX_FDEQ_SUBNUM +196 0x4848 //RX_FDEQ_GAIN_0 +197 0x4850 //RX_FDEQ_GAIN_1 +198 0x6478 //RX_FDEQ_GAIN_2 +199 0x8689 //RX_FDEQ_GAIN_3 +200 0x908F //RX_FDEQ_GAIN_4 +201 0x9495 //RX_FDEQ_GAIN_5 +202 0x989D //RX_FDEQ_GAIN_6 +203 0x9DA6 //RX_FDEQ_GAIN_7 +204 0xA895 //RX_FDEQ_GAIN_8 +205 0x8A8A //RX_FDEQ_GAIN_9 +206 0x8E78 //RX_FDEQ_GAIN_10 +207 0x7070 //RX_FDEQ_GAIN_11 +208 0x7680 //RX_FDEQ_GAIN_12 +209 0x787C //RX_FDEQ_GAIN_13 +210 0x8890 //RX_FDEQ_GAIN_14 +211 0x9CAC //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0202 //RX_FDEQ_BIN_0 +221 0x0202 //RX_FDEQ_BIN_1 +222 0x0302 //RX_FDEQ_BIN_2 +223 0x0304 //RX_FDEQ_BIN_3 +224 0x0405 //RX_FDEQ_BIN_4 +225 0x0506 //RX_FDEQ_BIN_5 +226 0x0708 //RX_FDEQ_BIN_6 +227 0x090A //RX_FDEQ_BIN_7 +228 0x0B0C //RX_FDEQ_BIN_8 +229 0x0D0E //RX_FDEQ_BIN_9 +230 0x1013 //RX_FDEQ_BIN_10 +231 0x1719 //RX_FDEQ_BIN_11 +232 0x1B1E //RX_FDEQ_BIN_12 +233 0x1E1E //RX_FDEQ_BIN_13 +234 0x1E28 //RX_FDEQ_BIN_14 +235 0x282C //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x4000 //RX_FDEQ_RESRV_0 +245 0x0320 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0030 //RX_FDDRC_BAND_MARGIN_1 +248 0x0050 //RX_FDDRC_BAND_MARGIN_2 +249 0x0080 //RX_FDDRC_BAND_MARGIN_3 +250 0x0007 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x5000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x6400 //RX_FDDRC_THRD_3_2 +258 0x6400 //RX_FDDRC_THRD_3_3 +259 0x2000 //RX_FDDRC_SLANT_0_0 +260 0x2000 //RX_FDDRC_SLANT_0_1 +261 0x2000 //RX_FDDRC_SLANT_0_2 +262 0x2000 //RX_FDDRC_SLANT_0_3 +263 0x5333 //RX_FDDRC_SLANT_1_0 +264 0x5333 //RX_FDDRC_SLANT_1_1 +265 0x5333 //RX_FDDRC_SLANT_1_2 +266 0x5333 //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +286 0x0026 //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 +#VOL 3 +163 0x1000 //RX_TDDRC_ALPHA_UP_1 +164 0x1000 //RX_TDDRC_ALPHA_UP_2 +165 0x1000 //RX_TDDRC_ALPHA_UP_3 +166 0x1000 //RX_TDDRC_ALPHA_UP_4 +184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +190 0x7000 //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +269 0x0000 //RX_TDDRC_THRD_0 +270 0x0000 //RX_TDDRC_THRD_1 +271 0x1800 //RX_TDDRC_THRD_2 +272 0x1800 //RX_TDDRC_THRD_3 +273 0x3000 //RX_TDDRC_SLANT_0 +274 0x6E00 //RX_TDDRC_SLANT_1 +275 0x1000 //RX_TDDRC_ALPHA_UP_0 +276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x199A //RX_TDDRC_HMNC_GAIN +279 0x0001 //RX_TDDRC_SMT_FLAG +280 0x0CCD //RX_TDDRC_SMT_W +281 0x0275 //RX_TDDRC_DRC_GAIN +195 0x0020 //RX_FDEQ_SUBNUM +196 0x4848 //RX_FDEQ_GAIN_0 +197 0x4850 //RX_FDEQ_GAIN_1 +198 0x6478 //RX_FDEQ_GAIN_2 +199 0x8689 //RX_FDEQ_GAIN_3 +200 0x908F //RX_FDEQ_GAIN_4 +201 0x9495 //RX_FDEQ_GAIN_5 +202 0x989D //RX_FDEQ_GAIN_6 +203 0x9DA6 //RX_FDEQ_GAIN_7 +204 0xA895 //RX_FDEQ_GAIN_8 +205 0x8A8A //RX_FDEQ_GAIN_9 +206 0x8E78 //RX_FDEQ_GAIN_10 +207 0x7070 //RX_FDEQ_GAIN_11 +208 0x7680 //RX_FDEQ_GAIN_12 +209 0x787C //RX_FDEQ_GAIN_13 +210 0x8890 //RX_FDEQ_GAIN_14 +211 0x9CAC //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0202 //RX_FDEQ_BIN_0 +221 0x0202 //RX_FDEQ_BIN_1 +222 0x0302 //RX_FDEQ_BIN_2 +223 0x0304 //RX_FDEQ_BIN_3 +224 0x0405 //RX_FDEQ_BIN_4 +225 0x0506 //RX_FDEQ_BIN_5 +226 0x0708 //RX_FDEQ_BIN_6 +227 0x090A //RX_FDEQ_BIN_7 +228 0x0B0C //RX_FDEQ_BIN_8 +229 0x0D0E //RX_FDEQ_BIN_9 +230 0x1013 //RX_FDEQ_BIN_10 +231 0x1719 //RX_FDEQ_BIN_11 +232 0x1B1E //RX_FDEQ_BIN_12 +233 0x1E1E //RX_FDEQ_BIN_13 +234 0x1E28 //RX_FDEQ_BIN_14 +235 0x282C //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x4000 //RX_FDEQ_RESRV_0 +245 0x0320 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0030 //RX_FDDRC_BAND_MARGIN_1 +248 0x0050 //RX_FDDRC_BAND_MARGIN_2 +249 0x0080 //RX_FDDRC_BAND_MARGIN_3 +250 0x0007 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x5000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x6400 //RX_FDDRC_THRD_3_2 +258 0x6400 //RX_FDDRC_THRD_3_3 +259 0x2000 //RX_FDDRC_SLANT_0_0 +260 0x2000 //RX_FDDRC_SLANT_0_1 +261 0x2000 //RX_FDDRC_SLANT_0_2 +262 0x2000 //RX_FDDRC_SLANT_0_3 +263 0x5333 //RX_FDDRC_SLANT_1_0 +264 0x5333 //RX_FDDRC_SLANT_1_1 +265 0x5333 //RX_FDDRC_SLANT_1_2 +266 0x5333 //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +286 0x003D //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 +#VOL 4 +163 0x1000 //RX_TDDRC_ALPHA_UP_1 +164 0x1000 //RX_TDDRC_ALPHA_UP_2 +165 0x1000 //RX_TDDRC_ALPHA_UP_3 +166 0x1000 //RX_TDDRC_ALPHA_UP_4 +184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +190 0x7000 //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +269 0x0000 //RX_TDDRC_THRD_0 +270 0x0000 //RX_TDDRC_THRD_1 +271 0x1800 //RX_TDDRC_THRD_2 +272 0x1800 //RX_TDDRC_THRD_3 +273 0x3000 //RX_TDDRC_SLANT_0 +274 0x6E00 //RX_TDDRC_SLANT_1 +275 0x1000 //RX_TDDRC_ALPHA_UP_0 +276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x199A //RX_TDDRC_HMNC_GAIN +279 0x0001 //RX_TDDRC_SMT_FLAG +280 0x0CCD //RX_TDDRC_SMT_W +281 0x0275 //RX_TDDRC_DRC_GAIN +195 0x0020 //RX_FDEQ_SUBNUM +196 0x4848 //RX_FDEQ_GAIN_0 +197 0x4850 //RX_FDEQ_GAIN_1 +198 0x6478 //RX_FDEQ_GAIN_2 +199 0x8689 //RX_FDEQ_GAIN_3 +200 0x908F //RX_FDEQ_GAIN_4 +201 0x9495 //RX_FDEQ_GAIN_5 +202 0x989D //RX_FDEQ_GAIN_6 +203 0x9DA6 //RX_FDEQ_GAIN_7 +204 0xA895 //RX_FDEQ_GAIN_8 +205 0x8A8A //RX_FDEQ_GAIN_9 +206 0x8E78 //RX_FDEQ_GAIN_10 +207 0x7070 //RX_FDEQ_GAIN_11 +208 0x7680 //RX_FDEQ_GAIN_12 +209 0x787C //RX_FDEQ_GAIN_13 +210 0x8890 //RX_FDEQ_GAIN_14 +211 0x9CAC //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0202 //RX_FDEQ_BIN_0 +221 0x0202 //RX_FDEQ_BIN_1 +222 0x0302 //RX_FDEQ_BIN_2 +223 0x0304 //RX_FDEQ_BIN_3 +224 0x0405 //RX_FDEQ_BIN_4 +225 0x0506 //RX_FDEQ_BIN_5 +226 0x0708 //RX_FDEQ_BIN_6 +227 0x090A //RX_FDEQ_BIN_7 +228 0x0B0C //RX_FDEQ_BIN_8 +229 0x0D0E //RX_FDEQ_BIN_9 +230 0x1013 //RX_FDEQ_BIN_10 +231 0x1719 //RX_FDEQ_BIN_11 +232 0x1B1E //RX_FDEQ_BIN_12 +233 0x1E1E //RX_FDEQ_BIN_13 +234 0x1E28 //RX_FDEQ_BIN_14 +235 0x282C //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x4000 //RX_FDEQ_RESRV_0 +245 0x0320 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0030 //RX_FDDRC_BAND_MARGIN_1 +248 0x0050 //RX_FDDRC_BAND_MARGIN_2 +249 0x0080 //RX_FDDRC_BAND_MARGIN_3 +250 0x0007 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x5000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x6400 //RX_FDDRC_THRD_3_2 +258 0x6400 //RX_FDDRC_THRD_3_3 +259 0x2000 //RX_FDDRC_SLANT_0_0 +260 0x2000 //RX_FDDRC_SLANT_0_1 +261 0x2000 //RX_FDDRC_SLANT_0_2 +262 0x2000 //RX_FDDRC_SLANT_0_3 +263 0x5333 //RX_FDDRC_SLANT_1_0 +264 0x5333 //RX_FDDRC_SLANT_1_1 +265 0x5333 //RX_FDDRC_SLANT_1_2 +266 0x5333 //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +286 0x0060 //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 +#VOL 5 +163 0x1000 //RX_TDDRC_ALPHA_UP_1 +164 0x1000 //RX_TDDRC_ALPHA_UP_2 +165 0x1000 //RX_TDDRC_ALPHA_UP_3 +166 0x1000 //RX_TDDRC_ALPHA_UP_4 +184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +190 0x7000 //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +269 0x0000 //RX_TDDRC_THRD_0 +270 0x0000 //RX_TDDRC_THRD_1 +271 0x1800 //RX_TDDRC_THRD_2 +272 0x1800 //RX_TDDRC_THRD_3 +273 0x3000 //RX_TDDRC_SLANT_0 +274 0x6E00 //RX_TDDRC_SLANT_1 +275 0x1000 //RX_TDDRC_ALPHA_UP_0 +276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x199A //RX_TDDRC_HMNC_GAIN +279 0x0001 //RX_TDDRC_SMT_FLAG +280 0x0CCD //RX_TDDRC_SMT_W +281 0x0275 //RX_TDDRC_DRC_GAIN +195 0x0020 //RX_FDEQ_SUBNUM +196 0x4848 //RX_FDEQ_GAIN_0 +197 0x4850 //RX_FDEQ_GAIN_1 +198 0x6478 //RX_FDEQ_GAIN_2 +199 0x8689 //RX_FDEQ_GAIN_3 +200 0x908F //RX_FDEQ_GAIN_4 +201 0x9495 //RX_FDEQ_GAIN_5 +202 0x989D //RX_FDEQ_GAIN_6 +203 0x9DA6 //RX_FDEQ_GAIN_7 +204 0xA895 //RX_FDEQ_GAIN_8 +205 0x8A8A //RX_FDEQ_GAIN_9 +206 0x8E78 //RX_FDEQ_GAIN_10 +207 0x7070 //RX_FDEQ_GAIN_11 +208 0x7680 //RX_FDEQ_GAIN_12 +209 0x787C //RX_FDEQ_GAIN_13 +210 0x8890 //RX_FDEQ_GAIN_14 +211 0x9CAC //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0202 //RX_FDEQ_BIN_0 +221 0x0202 //RX_FDEQ_BIN_1 +222 0x0302 //RX_FDEQ_BIN_2 +223 0x0304 //RX_FDEQ_BIN_3 +224 0x0405 //RX_FDEQ_BIN_4 +225 0x0506 //RX_FDEQ_BIN_5 +226 0x0708 //RX_FDEQ_BIN_6 +227 0x090A //RX_FDEQ_BIN_7 +228 0x0B0C //RX_FDEQ_BIN_8 +229 0x0D0E //RX_FDEQ_BIN_9 +230 0x1013 //RX_FDEQ_BIN_10 +231 0x1719 //RX_FDEQ_BIN_11 +232 0x1B1E //RX_FDEQ_BIN_12 +233 0x1E1E //RX_FDEQ_BIN_13 +234 0x1E28 //RX_FDEQ_BIN_14 +235 0x282C //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x4000 //RX_FDEQ_RESRV_0 +245 0x0320 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0030 //RX_FDDRC_BAND_MARGIN_1 +248 0x0050 //RX_FDDRC_BAND_MARGIN_2 +249 0x0080 //RX_FDDRC_BAND_MARGIN_3 +250 0x0007 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x5000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x6400 //RX_FDDRC_THRD_3_2 +258 0x6400 //RX_FDDRC_THRD_3_3 +259 0x2000 //RX_FDDRC_SLANT_0_0 +260 0x2000 //RX_FDDRC_SLANT_0_1 +261 0x2000 //RX_FDDRC_SLANT_0_2 +262 0x2000 //RX_FDDRC_SLANT_0_3 +263 0x5333 //RX_FDDRC_SLANT_1_0 +264 0x5333 //RX_FDDRC_SLANT_1_1 +265 0x5333 //RX_FDDRC_SLANT_1_2 +266 0x5333 //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +286 0x0099 //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 +#VOL 6 +163 0x1000 //RX_TDDRC_ALPHA_UP_1 +164 0x1000 //RX_TDDRC_ALPHA_UP_2 +165 0x1000 //RX_TDDRC_ALPHA_UP_3 +166 0x1000 //RX_TDDRC_ALPHA_UP_4 +184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +190 0x7000 //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +269 0x0000 //RX_TDDRC_THRD_0 +270 0x0000 //RX_TDDRC_THRD_1 +271 0x1800 //RX_TDDRC_THRD_2 +272 0x1800 //RX_TDDRC_THRD_3 +273 0x3000 //RX_TDDRC_SLANT_0 +274 0x6E00 //RX_TDDRC_SLANT_1 +275 0x1000 //RX_TDDRC_ALPHA_UP_0 +276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x199A //RX_TDDRC_HMNC_GAIN +279 0x0001 //RX_TDDRC_SMT_FLAG +280 0x0CCD //RX_TDDRC_SMT_W +281 0x0275 //RX_TDDRC_DRC_GAIN +195 0x0020 //RX_FDEQ_SUBNUM +196 0x4848 //RX_FDEQ_GAIN_0 +197 0x4850 //RX_FDEQ_GAIN_1 +198 0x6478 //RX_FDEQ_GAIN_2 +199 0x8689 //RX_FDEQ_GAIN_3 +200 0x908F //RX_FDEQ_GAIN_4 +201 0x9495 //RX_FDEQ_GAIN_5 +202 0x989D //RX_FDEQ_GAIN_6 +203 0x9DA6 //RX_FDEQ_GAIN_7 +204 0xA895 //RX_FDEQ_GAIN_8 +205 0x8A8A //RX_FDEQ_GAIN_9 +206 0x8E78 //RX_FDEQ_GAIN_10 +207 0x7070 //RX_FDEQ_GAIN_11 +208 0x7680 //RX_FDEQ_GAIN_12 +209 0x787C //RX_FDEQ_GAIN_13 +210 0x8890 //RX_FDEQ_GAIN_14 +211 0x9CAC //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0202 //RX_FDEQ_BIN_0 +221 0x0202 //RX_FDEQ_BIN_1 +222 0x0302 //RX_FDEQ_BIN_2 +223 0x0304 //RX_FDEQ_BIN_3 +224 0x0405 //RX_FDEQ_BIN_4 +225 0x0506 //RX_FDEQ_BIN_5 +226 0x0708 //RX_FDEQ_BIN_6 +227 0x090A //RX_FDEQ_BIN_7 +228 0x0B0C //RX_FDEQ_BIN_8 +229 0x0D0E //RX_FDEQ_BIN_9 +230 0x1013 //RX_FDEQ_BIN_10 +231 0x1719 //RX_FDEQ_BIN_11 +232 0x1B1E //RX_FDEQ_BIN_12 +233 0x1E1E //RX_FDEQ_BIN_13 +234 0x1E28 //RX_FDEQ_BIN_14 +235 0x282C //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x4000 //RX_FDEQ_RESRV_0 +245 0x0320 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0030 //RX_FDDRC_BAND_MARGIN_1 +248 0x0050 //RX_FDDRC_BAND_MARGIN_2 +249 0x0080 //RX_FDDRC_BAND_MARGIN_3 +250 0x0007 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x5000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x6400 //RX_FDDRC_THRD_3_2 +258 0x6400 //RX_FDDRC_THRD_3_3 +259 0x2000 //RX_FDDRC_SLANT_0_0 +260 0x2000 //RX_FDDRC_SLANT_0_1 +261 0x2000 //RX_FDDRC_SLANT_0_2 +262 0x2000 //RX_FDDRC_SLANT_0_3 +263 0x5333 //RX_FDDRC_SLANT_1_0 +264 0x5333 //RX_FDDRC_SLANT_1_1 +265 0x5333 //RX_FDDRC_SLANT_1_2 +266 0x5333 //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +286 0x0100 //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 #CASE_NAME HANDSET-HANDSET_HAC-TMOBILE_US-NB -#PARAM_TYPE TX+RX -#TOTAL_CUSTOM_STEP 7 +#PARAM_MODE Full +#PARAM_TYPE TX+2RX +#TOTAL_CUSTOM_STEP 7+7 #TX 0 0x0000 //TX_OPERATION_MODE_0 1 0x0000 //TX_OPERATION_MODE_1 -2 0x0036 //TX_PATCH_REG +2 0x0076 //TX_PATCH_REG 3 0x6F7E //TX_SENDFUNC_MODE_0 4 0x0001 //TX_SENDFUNC_MODE_1 5 0x0002 //TX_NUM_MIC @@ -26323,7 +40079,7 @@ 18 0x0000 //TX_SYS_RESRV_2 19 0x0000 //TX_SYS_RESRV_3 20 0x0000 //TX_DIST2REF0 -21 0x009D //TX_DIST2REF1 +21 0x009C //TX_DIST2REF1 22 0x0000 //TX_DIST2REF_02 23 0x0000 //TX_DIST2REF_03 24 0x0000 //TX_DIST2REF_04 @@ -26553,19 +40309,19 @@ 248 0xF800 //TX_THR_SN_EST_6 249 0xF700 //TX_THR_SN_EST_7 250 0x0000 //TX_DELTA_THR_SN_EST_0 -251 0x01A0 //TX_DELTA_THR_SN_EST_1 -252 0x0100 //TX_DELTA_THR_SN_EST_2 -253 0x0200 //TX_DELTA_THR_SN_EST_3 -254 0x01A0 //TX_DELTA_THR_SN_EST_4 -255 0x0100 //TX_DELTA_THR_SN_EST_5 -256 0x0000 //TX_DELTA_THR_SN_EST_6 +251 0x0100 //TX_DELTA_THR_SN_EST_1 +252 0x0200 //TX_DELTA_THR_SN_EST_2 +253 0x01A0 //TX_DELTA_THR_SN_EST_3 +254 0x0100 //TX_DELTA_THR_SN_EST_4 +255 0x0000 //TX_DELTA_THR_SN_EST_5 +256 0x01A0 //TX_DELTA_THR_SN_EST_6 257 0x0200 //TX_DELTA_THR_SN_EST_7 258 0x4000 //TX_LAMBDA_NN_EST_0 -259 0x4000 //TX_LAMBDA_NN_EST_1 -260 0x3000 //TX_LAMBDA_NN_EST_2 -261 0x4000 //TX_LAMBDA_NN_EST_3 +259 0x3000 //TX_LAMBDA_NN_EST_1 +260 0x4000 //TX_LAMBDA_NN_EST_2 +261 0x3000 //TX_LAMBDA_NN_EST_3 262 0x3000 //TX_LAMBDA_NN_EST_4 -263 0x3000 //TX_LAMBDA_NN_EST_5 +263 0x4000 //TX_LAMBDA_NN_EST_5 264 0x4000 //TX_LAMBDA_NN_EST_6 265 0x4000 //TX_LAMBDA_NN_EST_7 266 0x0400 //TX_N_SN_EST @@ -26584,20 +40340,20 @@ 279 0x4000 //TX_B_POST_FLT_0 280 0x4000 //TX_B_POST_FLT_1 281 0x0014 //TX_NS_LVL_CTRL_0 -282 0x001B //TX_NS_LVL_CTRL_1 -283 0x0019 //TX_NS_LVL_CTRL_2 +282 0x0019 //TX_NS_LVL_CTRL_1 +283 0x0017 //TX_NS_LVL_CTRL_2 284 0x0017 //TX_NS_LVL_CTRL_3 -285 0x0017 //TX_NS_LVL_CTRL_4 -286 0x0019 //TX_NS_LVL_CTRL_5 -287 0x0014 //TX_NS_LVL_CTRL_6 +285 0x0019 //TX_NS_LVL_CTRL_4 +286 0x0014 //TX_NS_LVL_CTRL_5 +287 0x001B //TX_NS_LVL_CTRL_6 288 0x0010 //TX_NS_LVL_CTRL_7 289 0x0010 //TX_MIN_GAIN_S_0 290 0x000C //TX_MIN_GAIN_S_1 -291 0x000C //TX_MIN_GAIN_S_2 +291 0x0010 //TX_MIN_GAIN_S_2 292 0x0010 //TX_MIN_GAIN_S_3 -293 0x0010 //TX_MIN_GAIN_S_4 -294 0x000C //TX_MIN_GAIN_S_5 -295 0x0014 //TX_MIN_GAIN_S_6 +293 0x000C //TX_MIN_GAIN_S_4 +294 0x0014 //TX_MIN_GAIN_S_5 +295 0x000C //TX_MIN_GAIN_S_6 296 0x0014 //TX_MIN_GAIN_S_7 297 0x5000 //TX_NMOS_SUP 298 0x0000 //TX_NS_MAX_PRI_SNR_TH @@ -26607,8 +40363,8 @@ 302 0x4000 //TX_SNRI_SUP_2 303 0x4000 //TX_SNRI_SUP_3 304 0x4000 //TX_SNRI_SUP_4 -305 0x4000 //TX_SNRI_SUP_5 -306 0x7FFF //TX_SNRI_SUP_6 +305 0x7FFF //TX_SNRI_SUP_5 +306 0x4000 //TX_SNRI_SUP_6 307 0x3000 //TX_SNRI_SUP_7 308 0x3000 //TX_THR_LFNS 309 0x001A //TX_G_LFNS @@ -26617,36 +40373,36 @@ 312 0x7FFF //TX_A_POST_FILT_0 313 0x2000 //TX_A_POST_FILT_1 314 0x2000 //TX_A_POST_FILT_S_0 -315 0x7000 //TX_A_POST_FILT_S_1 -316 0x6000 //TX_A_POST_FILT_S_2 -317 0x5000 //TX_A_POST_FILT_S_3 -318 0x2000 //TX_A_POST_FILT_S_4 -319 0x6000 //TX_A_POST_FILT_S_5 -320 0x2000 //TX_A_POST_FILT_S_6 +315 0x6000 //TX_A_POST_FILT_S_1 +316 0x5000 //TX_A_POST_FILT_S_2 +317 0x2000 //TX_A_POST_FILT_S_3 +318 0x6000 //TX_A_POST_FILT_S_4 +319 0x2000 //TX_A_POST_FILT_S_5 +320 0x7000 //TX_A_POST_FILT_S_6 321 0x7000 //TX_A_POST_FILT_S_7 322 0x4000 //TX_B_POST_FILT_0 323 0x4000 //TX_B_POST_FILT_1 -324 0x7FFF //TX_B_POST_FILT_2 -325 0x5000 //TX_B_POST_FILT_3 -326 0x7FFF //TX_B_POST_FILT_4 -327 0x7FFF //TX_B_POST_FILT_5 +324 0x5000 //TX_B_POST_FILT_2 +325 0x4000 //TX_B_POST_FILT_3 +326 0x4000 //TX_B_POST_FILT_4 +327 0x4000 //TX_B_POST_FILT_5 328 0x4000 //TX_B_POST_FILT_6 329 0x2000 //TX_B_POST_FILT_7 330 0x7FFF //TX_B_LESSCUT_RTO_S_0 -331 0x7FFF //TX_B_LESSCUT_RTO_S_1 -332 0x7FFF //TX_B_LESSCUT_RTO_S_2 -333 0x7FFF //TX_B_LESSCUT_RTO_S_3 -334 0x7FFF //TX_B_LESSCUT_RTO_S_4 -335 0x7FFF //TX_B_LESSCUT_RTO_S_5 -336 0x7FFF //TX_B_LESSCUT_RTO_S_6 -337 0x7FFF //TX_B_LESSCUT_RTO_S_7 +331 0x1000 //TX_B_LESSCUT_RTO_S_1 +332 0x1000 //TX_B_LESSCUT_RTO_S_2 +333 0x1000 //TX_B_LESSCUT_RTO_S_3 +334 0x1000 //TX_B_LESSCUT_RTO_S_4 +335 0x1000 //TX_B_LESSCUT_RTO_S_5 +336 0x1000 //TX_B_LESSCUT_RTO_S_6 +337 0x1000 //TX_B_LESSCUT_RTO_S_7 338 0x7E14 //TX_LAMBDA_PFILT 339 0x7C29 //TX_LAMBDA_PFILT_S_0 -340 0x7C29 //TX_LAMBDA_PFILT_S_1 -341 0x7200 //TX_LAMBDA_PFILT_S_2 -342 0x7900 //TX_LAMBDA_PFILT_S_3 -343 0x7400 //TX_LAMBDA_PFILT_S_4 -344 0x7200 //TX_LAMBDA_PFILT_S_5 +340 0x7200 //TX_LAMBDA_PFILT_S_1 +341 0x7900 //TX_LAMBDA_PFILT_S_2 +342 0x7400 //TX_LAMBDA_PFILT_S_3 +343 0x7200 //TX_LAMBDA_PFILT_S_4 +344 0x7C29 //TX_LAMBDA_PFILT_S_5 345 0x7C29 //TX_LAMBDA_PFILT_S_6 346 0x7C29 //TX_LAMBDA_PFILT_S_7 347 0x0200 //TX_K_PEPPER @@ -26682,10 +40438,10 @@ 377 0x0000 //TX_NOISE_TH_5_4 378 0x07D0 //TX_NOISE_TH_6 379 0x0004 //TX_MINENOISE_TH -380 0x4000 //TX_MINENOISE_MIC0_TH_MTS -381 0xFFEE //TX_MINENOISE_MIC0_TH_EXP -382 0x6000 //TX_MINENOISE_MIC0_S_TH_MTS -383 0xFFF3 //TX_MINENOISE_MIC0_S_TH_EXP +380 0xD508 //TX_MORENS_TFMASK_TH +381 0x0001 //TX_DRC_QUIET_FLOOR +382 0x6D60 //TX_RATIODTL_CUT_TH +383 0x0DAC //TX_DT_CUT_K1 384 0x00A5 //TX_OUT_ENER_S_TH_CLEAN 385 0x00A5 //TX_OUT_ENER_S_TH_LESSCLEAN 386 0x00A5 //TX_OUT_ENER_S_TH_NOISY @@ -26693,15 +40449,15 @@ 388 0x00CE //TX_OUT_ENER_TH_SPEECH 389 0x2000 //TX_SN_NPB_GAIN 390 0x0000 //TX_NN_NPB_GAIN -391 0x0000 //TX_CSX_ALPHA_0 -392 0x0000 //TX_CSX_ALPHA_1 -393 0x0000 //TX_CSX_ALPHA_2 -394 0x0000 //TX_CSX_ALPHA_3 -395 0x0800 //TX_MU_ARSP_EST -396 0x00C8 //TX_P_OUTBEAM_MIN_TH +391 0x3000 //TX_POST_MASK_SUP_HSNE +392 0x07D0 //TX_TAIL_DET_TH +393 0x4000 //TX_B_LESSCUT_RTO_WTA +394 0x0000 //TX_MEL_G_R +395 0x0080 //TX_SUPHIGH_TH +396 0x0000 //TX_MASK_G_R 397 0x0002 //TX_EXTRA_NS_L -398 0x0800 //TX_EXTRA_NS_A -399 0x0005 //TX_VR_NOISE_FLOOR_TH +398 0x1800 //TX_C_POST_FLT_MASK +399 0x7FFF //TX_A_POST_FLT_WNS 400 0x0148 //TX_MIN_G_LOW300HZ 401 0x0001 //TX_MAXLEVEL_CNG 402 0x00B4 //TX_STN_NOISE_TH @@ -26816,16 +40572,16 @@ 511 0x6666 //TX_MIC_TO_BFGAIN 512 0x0000 //TX_MICTOBFGAIN0 513 0x0000 //TX_FASTMUE_TH -514 0x0000 //TX_DERVB_LEN_0 -515 0x0000 //TX_DERVB_LEN_1 -516 0x0000 //TX_RHO_DERVB -517 0x0000 //TX_MIC_INDX_DERVB -518 0x0000 //TX_MU_DERVB -519 0x0000 //TX_DR_RESRV_0 -520 0x0000 //TX_DR_RESRV_1 -521 0x0000 //TX_DR_RESRV_2 -522 0x0000 //TX_DR_RESRV_3 -523 0x0000 //TX_DR_RESRV_4 +514 0x3000 //TX_DEREVERB_LF_MU +515 0x34CD //TX_DEREVERB_HF_MU +516 0x0007 //TX_DEREVERB_DELAY +517 0x0004 //TX_DEREVERB_COEF_LEN +518 0x0003 //TX_DEREVERB_DNR +519 0x0000 //TX_DEREVERB_ALPHA +520 0x0000 //TX_DEREVERB_BETA +521 0x3A98 //TX_GSC_RTOL_TH +522 0x3A98 //TX_GSC_RTOH_TH +523 0x7E2C //TX_WIDE2_MEANHTH 524 0x0000 //TX_DR_RESRV_5 525 0x0000 //TX_DR_RESRV_6 526 0x0000 //TX_DR_RESRV_7 @@ -26873,11 +40629,11 @@ 568 0x584F //TX_FDEQ_GAIN_1 569 0x4F4E //TX_FDEQ_GAIN_2 570 0x474A //TX_FDEQ_GAIN_3 -571 0x473F //TX_FDEQ_GAIN_4 -572 0x403B //TX_FDEQ_GAIN_5 -573 0x3933 //TX_FDEQ_GAIN_6 -574 0x302B //TX_FDEQ_GAIN_7 -575 0x2220 //TX_FDEQ_GAIN_8 +571 0x4737 //TX_FDEQ_GAIN_4 +572 0x3A40 //TX_FDEQ_GAIN_5 +573 0x4040 //TX_FDEQ_GAIN_6 +574 0x3631 //TX_FDEQ_GAIN_7 +575 0x2020 //TX_FDEQ_GAIN_8 576 0x383C //TX_FDEQ_GAIN_9 577 0x4848 //TX_FDEQ_GAIN_10 578 0x4848 //TX_FDEQ_GAIN_11 @@ -26902,7 +40658,7 @@ 597 0x0808 //TX_FDEQ_BIN_6 598 0x050E //TX_FDEQ_BIN_7 599 0x0B0C //TX_FDEQ_BIN_8 -600 0x0F0F //TX_FDEQ_BIN_9 +600 0x0F09 //TX_FDEQ_BIN_9 601 0x0000 //TX_FDEQ_BIN_10 602 0x0000 //TX_FDEQ_BIN_11 603 0x0000 //TX_FDEQ_BIN_12 @@ -26926,9 +40682,9 @@ 621 0x4848 //TX_PREEQ_GAIN_MIC0_4 622 0x4848 //TX_PREEQ_GAIN_MIC0_5 623 0x4848 //TX_PREEQ_GAIN_MIC0_6 -624 0x4846 //TX_PREEQ_GAIN_MIC0_7 -625 0x4544 //TX_PREEQ_GAIN_MIC0_8 -626 0x4241 //TX_PREEQ_GAIN_MIC0_9 +624 0x4848 //TX_PREEQ_GAIN_MIC0_7 +625 0x4848 //TX_PREEQ_GAIN_MIC0_8 +626 0x4848 //TX_PREEQ_GAIN_MIC0_9 627 0x4848 //TX_PREEQ_GAIN_MIC0_10 628 0x4848 //TX_PREEQ_GAIN_MIC0_11 629 0x4848 //TX_PREEQ_GAIN_MIC0_12 @@ -26976,8 +40732,8 @@ 671 0x4848 //TX_PREEQ_GAIN_MIC1_5 672 0x4848 //TX_PREEQ_GAIN_MIC1_6 673 0x4848 //TX_PREEQ_GAIN_MIC1_7 -674 0x4A4C //TX_PREEQ_GAIN_MIC1_8 -675 0x4E50 //TX_PREEQ_GAIN_MIC1_9 +674 0x4849 //TX_PREEQ_GAIN_MIC1_8 +675 0x4A4B //TX_PREEQ_GAIN_MIC1_9 676 0x4848 //TX_PREEQ_GAIN_MIC1_10 677 0x4848 //TX_PREEQ_GAIN_MIC1_11 678 0x4848 //TX_PREEQ_GAIN_MIC1_12 @@ -26992,7 +40748,7 @@ 687 0x4848 //TX_PREEQ_GAIN_MIC1_21 688 0x4848 //TX_PREEQ_GAIN_MIC1_22 689 0x4848 //TX_PREEQ_GAIN_MIC1_23 -690 0x0203 //TX_PREEQ_BIN_MIC1_0 +690 0x0202 //TX_PREEQ_BIN_MIC1_0 691 0x0203 //TX_PREEQ_BIN_MIC1_1 692 0x0303 //TX_PREEQ_BIN_MIC1_2 693 0x0304 //TX_PREEQ_BIN_MIC1_3 @@ -27078,7 +40834,7 @@ 773 0x0000 //TX_GAIN_LIMIT_0 774 0x0000 //TX_GAIN_LIMIT_1 775 0x0006 //TX_GAIN_LIMIT_2 -776 0x0006 //TX_GAIN_LIMIT_3 +776 0x0007 //TX_GAIN_LIMIT_3 777 0x7F5B //TX_BVE_NOVAD0_ALPHADOWN 778 0x7FDE //TX_BVE_VAD0_ALPHAUP 779 0x7F3A //TX_BVE_VAD0_ALPHADOWN @@ -27168,7 +40924,7 @@ 863 0x199A //TX_TDDRC_HMNC_GAIN 864 0x0000 //TX_TDDRC_SMT_FLAG 865 0x0CCD //TX_TDDRC_SMT_W -866 0x05A0 //TX_TDDRC_DRC_GAIN +866 0x0504 //TX_TDDRC_DRC_GAIN 867 0x7FFF //TX_TDDRC_LMT_THRD 868 0x0000 //TX_TDDRC_LMT_ALPHA 869 0x0000 //TX_TFMASKLTH @@ -27199,6 +40955,71 @@ 894 0xC000 //TX_FASTNS_SSA_THHFL 895 0xCCCC //TX_FASTNS_SSA_THLFH 896 0xD999 //TX_FASTNS_SSA_THHFH +897 0x2339 //TX_SENDFUNC_REG_MICMUTE +898 0x0021 //TX_SENDFUNC_REG_MICMUTE1 +899 0x02BC //TX_MICMUTE_RATIO_THR +900 0x0140 //TX_MICMUTE_AMP_THR +901 0x0004 //TX_MICMUTE_HPF_IND +902 0x00C0 //TX_MICMUTE_LOG_EYR_TH +903 0x0008 //TX_MICMUTE_CVG_TIME +904 0x0008 //TX_MICMUTE_RELEASE_TIME +905 0x01FE //TX_MIC_VOLUME_MIC0MUTE +906 0x0020 //TX_MICMUTE_EPD_OFFSET_0 +907 0x001E //TX_MICMUTE_FRQ_AEC_L +908 0x7999 //TX_MICMUTE_EAD_THR +909 0x7FFF //TX_MICMUTE_LAMBDA_CB_NLE +910 0x7FFF //TX_MICMUTE_LAMBDA_RE_EST +911 0x4000 //TX_DTD_THR1_MICMUTE_0 +912 0x7000 //TX_DTD_THR1_MICMUTE_1 +913 0x7FFF //TX_DTD_THR1_MICMUTE_2 +914 0x7FFF //TX_DTD_THR1_MICMUTE_3 +915 0x6CCC //TX_DTD_THR2_MICMUTE_0 +916 0x0400 //TX_MICMUTE_MIN_EQ_RE_EST_0 +917 0x0400 //TX_MICMUTE_MIN_EQ_RE_EST_1 +918 0x1000 //TX_MICMUTE_MIN_EQ_RE_EST_2 +919 0x7FFF //TX_MICMUTE_MIN_EQ_RE_EST_3 +920 0x7FFF //TX_MICMUTE_MIN_EQ_RE_EST_4 +921 0x4000 //TX_MICMUTE_C_POST_FLT +922 0x03E8 //TX_MICMUTE_DT_CUT_K +923 0x0001 //TX_MICMUTE_DT_CUT_THR +924 0x03E8 //TX_MICMUTE_DT_CUT_K2 +925 0x0001 //TX_MICMUTE_DT_CUT_THR2 +926 0x0064 //TX_MICMUTE_DT2_HOLD_N +927 0x1000 //TX_MICMUTE_RATIODTH_THCUT +928 0x1000 //TX_MICMUTE_B_POST_FLT_ECHOL +929 0x7FFF //TX_MICMUTE_B_POST_FLT_ECHOH +930 0x0400 //TX_MICMUTE_C_POST_FLT_MASK +931 0x7999 //TX_MICMUTE_RATIODTL_CUT_TH +932 0x0258 //TX_MICMUTE_DT_CUT_K1 +933 0x0800 //TX_MICMUTE_N2_SN_EST +934 0xFC00 //TX_MICMUTE_THR_SN_EST_0 +935 0x001C //TX_MICMUTE_MIN_G_CTRL_0 +936 0x6000 //TX_MICMUTE_A_POST_FILT_S_0 +937 0x7000 //TX_MICMUTE_B_POST_FILT_0 +938 0x2710 //TX_MIC1RUB_AMP_THR +939 0x0010 //TX_MIC1MUTE_RATIO_THR +940 0x0450 //TX_MIC1MUTE_AMP_THR +941 0x0008 //TX_MIC1MUTE_CVG_TIME +942 0x0008 //TX_MIC1MUTE_RELEASE_TIME +943 0x0000 //TX_AMS_RESRV_01 +944 0x0000 //TX_AMS_RESRV_02 +945 0x0000 //TX_AMS_RESRV_03 +946 0x0000 //TX_AMS_RESRV_04 +947 0x0000 //TX_AMS_RESRV_05 +948 0x0000 //TX_AMS_RESRV_06 +949 0x0000 //TX_AMS_RESRV_07 +950 0x0000 //TX_AMS_RESRV_08 +951 0x0000 //TX_AMS_RESRV_09 +952 0x0000 //TX_AMS_RESRV_10 +953 0x0000 //TX_AMS_RESRV_11 +954 0x0000 //TX_AMS_RESRV_12 +955 0x0000 //TX_AMS_RESRV_13 +956 0x0000 //TX_AMS_RESRV_14 +957 0x0000 //TX_AMS_RESRV_15 +958 0x0000 //TX_AMS_RESRV_16 +959 0x0000 //TX_AMS_RESRV_17 +960 0x0000 //TX_AMS_RESRV_18 +961 0x0000 //TX_AMS_RESRV_19 #RX 0 0x000C //RX_RECVFUNC_MODE_0 1 0x0000 //RX_RECVFUNC_MODE_1 @@ -28050,10 +41871,862 @@ 110 0x0000 //RX_FDDRC_RESRV_0 129 0x0100 //RX_SPK_VOL 130 0x0000 //RX_VOL_RESRV_0 +#RX 2 +157 0x000C //RX_RECVFUNC_MODE_0 +158 0x0000 //RX_RECVFUNC_MODE_1 +159 0x0000 //RX_SAMPLINGFREQ_SIG +160 0x0000 //RX_SAMPLINGFREQ_PROC +161 0x000A //RX_FRAME_SZ +162 0x0000 //RX_DELAY_OPT +163 0x1000 //RX_TDDRC_ALPHA_UP_1 +164 0x1000 //RX_TDDRC_ALPHA_UP_2 +165 0x1000 //RX_TDDRC_ALPHA_UP_3 +166 0x1000 //RX_TDDRC_ALPHA_UP_4 +167 0x0800 //RX_PGA +168 0x7FFF //RX_A_HP +169 0x4000 //RX_B_PE +170 0x7800 //RX_THR_PITCH_DET_0 +171 0x7000 //RX_THR_PITCH_DET_1 +172 0x6000 //RX_THR_PITCH_DET_2 +173 0x0008 //RX_PITCH_BFR_LEN +174 0x0003 //RX_SBD_PITCH_DET +175 0x0100 //RX_PP_RESRV_0 +176 0x0020 //RX_PP_RESRV_1 +177 0x0400 //RX_N_SN_EST +178 0x000C //RX_N2_SN_EST +179 0x0014 //RX_NS_LVL_CTRL +180 0xF800 //RX_THR_SN_EST +181 0x7E00 //RX_LAMBDA_PFILT +182 0x000A //RX_FENS_RESRV_0 +183 0x0190 //RX_FENS_RESRV_1 +184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +187 0x0002 //RX_EXTRA_NS_L +188 0x0800 //RX_EXTRA_NS_A +189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +190 0x7000 //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +192 0x199A //RX_A_POST_FLT +193 0x0000 //RX_LMT_THRD +194 0x4000 //RX_LMT_ALPHA +195 0x0030 //RX_FDEQ_SUBNUM +196 0x4848 //RX_FDEQ_GAIN_0 +197 0x4848 //RX_FDEQ_GAIN_1 +198 0x4844 //RX_FDEQ_GAIN_2 +199 0x4A4C //RX_FDEQ_GAIN_3 +200 0x4E50 //RX_FDEQ_GAIN_4 +201 0x5254 //RX_FDEQ_GAIN_5 +202 0x5658 //RX_FDEQ_GAIN_6 +203 0x5A5C //RX_FDEQ_GAIN_7 +204 0x5C5C //RX_FDEQ_GAIN_8 +205 0x5C5C //RX_FDEQ_GAIN_9 +206 0x5C5C //RX_FDEQ_GAIN_10 +207 0x5C48 //RX_FDEQ_GAIN_11 +208 0x4848 //RX_FDEQ_GAIN_12 +209 0x4848 //RX_FDEQ_GAIN_13 +210 0x4848 //RX_FDEQ_GAIN_14 +211 0x4848 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0202 //RX_FDEQ_BIN_0 +221 0x0203 //RX_FDEQ_BIN_1 +222 0x0402 //RX_FDEQ_BIN_2 +223 0x0303 //RX_FDEQ_BIN_3 +224 0x0303 //RX_FDEQ_BIN_4 +225 0x0303 //RX_FDEQ_BIN_5 +226 0x0303 //RX_FDEQ_BIN_6 +227 0x0303 //RX_FDEQ_BIN_7 +228 0x0A0A //RX_FDEQ_BIN_8 +229 0x0A0E //RX_FDEQ_BIN_9 +230 0x0000 //RX_FDEQ_BIN_10 +231 0x0000 //RX_FDEQ_BIN_11 +232 0x0000 //RX_FDEQ_BIN_12 +233 0x0000 //RX_FDEQ_BIN_13 +234 0x0000 //RX_FDEQ_BIN_14 +235 0x0000 //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x4000 //RX_FDEQ_RESRV_0 +245 0x0320 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0030 //RX_FDDRC_BAND_MARGIN_1 +248 0x0050 //RX_FDDRC_BAND_MARGIN_2 +249 0x0080 //RX_FDDRC_BAND_MARGIN_3 +250 0x0007 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x5000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x6400 //RX_FDDRC_THRD_3_2 +258 0x6400 //RX_FDDRC_THRD_3_3 +259 0x2000 //RX_FDDRC_SLANT_0_0 +260 0x2000 //RX_FDDRC_SLANT_0_1 +261 0x2000 //RX_FDDRC_SLANT_0_2 +262 0x2000 //RX_FDDRC_SLANT_0_3 +263 0x5333 //RX_FDDRC_SLANT_1_0 +264 0x5333 //RX_FDDRC_SLANT_1_1 +265 0x5333 //RX_FDDRC_SLANT_1_2 +266 0x5333 //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +268 0x0002 //RX_FILTINDX +269 0x0000 //RX_TDDRC_THRD_0 +270 0x0000 //RX_TDDRC_THRD_1 +271 0x1800 //RX_TDDRC_THRD_2 +272 0x1800 //RX_TDDRC_THRD_3 +273 0x3000 //RX_TDDRC_SLANT_0 +274 0x6E00 //RX_TDDRC_SLANT_1 +275 0x1000 //RX_TDDRC_ALPHA_UP_0 +276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x199A //RX_TDDRC_HMNC_GAIN +279 0x0001 //RX_TDDRC_SMT_FLAG +280 0x0CCD //RX_TDDRC_SMT_W +281 0x0360 //RX_TDDRC_DRC_GAIN +282 0x7C00 //RX_LAMBDA_PKA_FP +283 0x2000 //RX_TPKA_FP +284 0x2000 //RX_MIN_G_FP +285 0x0080 //RX_MAX_G_FP +286 0x0100 //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 +288 0x0000 //RX_MAXLEVEL_CNG +289 0x3000 //RX_BWE_UV_TH +290 0x3000 //RX_BWE_UV_TH2 +291 0x1800 //RX_BWE_UV_TH3 +292 0x1000 //RX_BWE_V_TH +293 0x04CD //RX_BWE_GAIN1_V_TH1 +294 0x0F33 //RX_BWE_GAIN1_V_TH2 +295 0x7333 //RX_BWE_UV_EQ +296 0x199A //RX_BWE_V_EQ +297 0x7333 //RX_BWE_TONE_TH +298 0x0004 //RX_BWE_UV_HOLD_T +299 0x6CCD //RX_BWE_GAIN2_ALPHA +300 0x799A //RX_BWE_GAIN3_ALPHA +301 0x001E //RX_BWE_CUTOFF +302 0x3000 //RX_BWE_GAINFILL +303 0x3200 //RX_BWE_MAXTH_TONE +304 0x2000 //RX_BWE_EQ_0 +305 0x2000 //RX_BWE_EQ_1 +306 0x2000 //RX_BWE_EQ_2 +307 0x2000 //RX_BWE_EQ_3 +308 0x2000 //RX_BWE_EQ_4 +309 0x2000 //RX_BWE_EQ_5 +310 0x2000 //RX_BWE_EQ_6 +311 0x0000 //RX_BWE_RESRV_0 +312 0x0000 //RX_BWE_RESRV_1 +313 0x0000 //RX_BWE_RESRV_2 +#VOL 0 +163 0x1000 //RX_TDDRC_ALPHA_UP_1 +164 0x1000 //RX_TDDRC_ALPHA_UP_2 +165 0x1000 //RX_TDDRC_ALPHA_UP_3 +166 0x1000 //RX_TDDRC_ALPHA_UP_4 +184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +190 0x7000 //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +269 0x0000 //RX_TDDRC_THRD_0 +270 0x0000 //RX_TDDRC_THRD_1 +271 0x1800 //RX_TDDRC_THRD_2 +272 0x1800 //RX_TDDRC_THRD_3 +273 0x3000 //RX_TDDRC_SLANT_0 +274 0x6E00 //RX_TDDRC_SLANT_1 +275 0x1000 //RX_TDDRC_ALPHA_UP_0 +276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x199A //RX_TDDRC_HMNC_GAIN +279 0x0001 //RX_TDDRC_SMT_FLAG +280 0x0CCD //RX_TDDRC_SMT_W +281 0x0360 //RX_TDDRC_DRC_GAIN +195 0x0030 //RX_FDEQ_SUBNUM +196 0x4848 //RX_FDEQ_GAIN_0 +197 0x4848 //RX_FDEQ_GAIN_1 +198 0x4844 //RX_FDEQ_GAIN_2 +199 0x4A4C //RX_FDEQ_GAIN_3 +200 0x4E50 //RX_FDEQ_GAIN_4 +201 0x5254 //RX_FDEQ_GAIN_5 +202 0x5658 //RX_FDEQ_GAIN_6 +203 0x5A5C //RX_FDEQ_GAIN_7 +204 0x5C5C //RX_FDEQ_GAIN_8 +205 0x5C5C //RX_FDEQ_GAIN_9 +206 0x5C5C //RX_FDEQ_GAIN_10 +207 0x5C48 //RX_FDEQ_GAIN_11 +208 0x4848 //RX_FDEQ_GAIN_12 +209 0x4848 //RX_FDEQ_GAIN_13 +210 0x4848 //RX_FDEQ_GAIN_14 +211 0x4848 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0202 //RX_FDEQ_BIN_0 +221 0x0203 //RX_FDEQ_BIN_1 +222 0x0402 //RX_FDEQ_BIN_2 +223 0x0303 //RX_FDEQ_BIN_3 +224 0x0303 //RX_FDEQ_BIN_4 +225 0x0303 //RX_FDEQ_BIN_5 +226 0x0303 //RX_FDEQ_BIN_6 +227 0x0303 //RX_FDEQ_BIN_7 +228 0x0A0A //RX_FDEQ_BIN_8 +229 0x0A0E //RX_FDEQ_BIN_9 +230 0x0000 //RX_FDEQ_BIN_10 +231 0x0000 //RX_FDEQ_BIN_11 +232 0x0000 //RX_FDEQ_BIN_12 +233 0x0000 //RX_FDEQ_BIN_13 +234 0x0000 //RX_FDEQ_BIN_14 +235 0x0000 //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x4000 //RX_FDEQ_RESRV_0 +245 0x0320 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0030 //RX_FDDRC_BAND_MARGIN_1 +248 0x0050 //RX_FDDRC_BAND_MARGIN_2 +249 0x0080 //RX_FDDRC_BAND_MARGIN_3 +250 0x0007 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x5000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x6400 //RX_FDDRC_THRD_3_2 +258 0x6400 //RX_FDDRC_THRD_3_3 +259 0x2000 //RX_FDDRC_SLANT_0_0 +260 0x2000 //RX_FDDRC_SLANT_0_1 +261 0x2000 //RX_FDDRC_SLANT_0_2 +262 0x2000 //RX_FDDRC_SLANT_0_3 +263 0x5333 //RX_FDDRC_SLANT_1_0 +264 0x5333 //RX_FDDRC_SLANT_1_1 +265 0x5333 //RX_FDDRC_SLANT_1_2 +266 0x5333 //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +286 0x0100 //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 +#VOL 1 +163 0x1000 //RX_TDDRC_ALPHA_UP_1 +164 0x1000 //RX_TDDRC_ALPHA_UP_2 +165 0x1000 //RX_TDDRC_ALPHA_UP_3 +166 0x1000 //RX_TDDRC_ALPHA_UP_4 +184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +190 0x7000 //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +269 0x0000 //RX_TDDRC_THRD_0 +270 0x0000 //RX_TDDRC_THRD_1 +271 0x1800 //RX_TDDRC_THRD_2 +272 0x1800 //RX_TDDRC_THRD_3 +273 0x3000 //RX_TDDRC_SLANT_0 +274 0x6E00 //RX_TDDRC_SLANT_1 +275 0x1000 //RX_TDDRC_ALPHA_UP_0 +276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x199A //RX_TDDRC_HMNC_GAIN +279 0x0001 //RX_TDDRC_SMT_FLAG +280 0x0CCD //RX_TDDRC_SMT_W +281 0x0360 //RX_TDDRC_DRC_GAIN +195 0x0030 //RX_FDEQ_SUBNUM +196 0x4848 //RX_FDEQ_GAIN_0 +197 0x4848 //RX_FDEQ_GAIN_1 +198 0x4844 //RX_FDEQ_GAIN_2 +199 0x4A4C //RX_FDEQ_GAIN_3 +200 0x4E50 //RX_FDEQ_GAIN_4 +201 0x5254 //RX_FDEQ_GAIN_5 +202 0x5658 //RX_FDEQ_GAIN_6 +203 0x5A5C //RX_FDEQ_GAIN_7 +204 0x5C5C //RX_FDEQ_GAIN_8 +205 0x5C5C //RX_FDEQ_GAIN_9 +206 0x5C5C //RX_FDEQ_GAIN_10 +207 0x5C48 //RX_FDEQ_GAIN_11 +208 0x4848 //RX_FDEQ_GAIN_12 +209 0x4848 //RX_FDEQ_GAIN_13 +210 0x4848 //RX_FDEQ_GAIN_14 +211 0x4848 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0202 //RX_FDEQ_BIN_0 +221 0x0203 //RX_FDEQ_BIN_1 +222 0x0402 //RX_FDEQ_BIN_2 +223 0x0303 //RX_FDEQ_BIN_3 +224 0x0303 //RX_FDEQ_BIN_4 +225 0x0303 //RX_FDEQ_BIN_5 +226 0x0303 //RX_FDEQ_BIN_6 +227 0x0303 //RX_FDEQ_BIN_7 +228 0x0A0A //RX_FDEQ_BIN_8 +229 0x0A0E //RX_FDEQ_BIN_9 +230 0x0000 //RX_FDEQ_BIN_10 +231 0x0000 //RX_FDEQ_BIN_11 +232 0x0000 //RX_FDEQ_BIN_12 +233 0x0000 //RX_FDEQ_BIN_13 +234 0x0000 //RX_FDEQ_BIN_14 +235 0x0000 //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x4000 //RX_FDEQ_RESRV_0 +245 0x0320 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0030 //RX_FDDRC_BAND_MARGIN_1 +248 0x0050 //RX_FDDRC_BAND_MARGIN_2 +249 0x0080 //RX_FDDRC_BAND_MARGIN_3 +250 0x0007 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x5000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x6400 //RX_FDDRC_THRD_3_2 +258 0x6400 //RX_FDDRC_THRD_3_3 +259 0x2000 //RX_FDDRC_SLANT_0_0 +260 0x2000 //RX_FDDRC_SLANT_0_1 +261 0x2000 //RX_FDDRC_SLANT_0_2 +262 0x2000 //RX_FDDRC_SLANT_0_3 +263 0x5333 //RX_FDDRC_SLANT_1_0 +264 0x5333 //RX_FDDRC_SLANT_1_1 +265 0x5333 //RX_FDDRC_SLANT_1_2 +266 0x5333 //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +286 0x0100 //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 +#VOL 2 +163 0x1000 //RX_TDDRC_ALPHA_UP_1 +164 0x1000 //RX_TDDRC_ALPHA_UP_2 +165 0x1000 //RX_TDDRC_ALPHA_UP_3 +166 0x1000 //RX_TDDRC_ALPHA_UP_4 +184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +190 0x7000 //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +269 0x0000 //RX_TDDRC_THRD_0 +270 0x0000 //RX_TDDRC_THRD_1 +271 0x1800 //RX_TDDRC_THRD_2 +272 0x1800 //RX_TDDRC_THRD_3 +273 0x3000 //RX_TDDRC_SLANT_0 +274 0x6E00 //RX_TDDRC_SLANT_1 +275 0x1000 //RX_TDDRC_ALPHA_UP_0 +276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x199A //RX_TDDRC_HMNC_GAIN +279 0x0001 //RX_TDDRC_SMT_FLAG +280 0x0CCD //RX_TDDRC_SMT_W +281 0x0360 //RX_TDDRC_DRC_GAIN +195 0x0030 //RX_FDEQ_SUBNUM +196 0x4848 //RX_FDEQ_GAIN_0 +197 0x4848 //RX_FDEQ_GAIN_1 +198 0x4844 //RX_FDEQ_GAIN_2 +199 0x4A4C //RX_FDEQ_GAIN_3 +200 0x4E50 //RX_FDEQ_GAIN_4 +201 0x5254 //RX_FDEQ_GAIN_5 +202 0x5658 //RX_FDEQ_GAIN_6 +203 0x5A5C //RX_FDEQ_GAIN_7 +204 0x5C5C //RX_FDEQ_GAIN_8 +205 0x5C5C //RX_FDEQ_GAIN_9 +206 0x5C5C //RX_FDEQ_GAIN_10 +207 0x5C48 //RX_FDEQ_GAIN_11 +208 0x4848 //RX_FDEQ_GAIN_12 +209 0x4848 //RX_FDEQ_GAIN_13 +210 0x4848 //RX_FDEQ_GAIN_14 +211 0x4848 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0202 //RX_FDEQ_BIN_0 +221 0x0203 //RX_FDEQ_BIN_1 +222 0x0402 //RX_FDEQ_BIN_2 +223 0x0303 //RX_FDEQ_BIN_3 +224 0x0303 //RX_FDEQ_BIN_4 +225 0x0303 //RX_FDEQ_BIN_5 +226 0x0303 //RX_FDEQ_BIN_6 +227 0x0303 //RX_FDEQ_BIN_7 +228 0x0A0A //RX_FDEQ_BIN_8 +229 0x0A0E //RX_FDEQ_BIN_9 +230 0x0000 //RX_FDEQ_BIN_10 +231 0x0000 //RX_FDEQ_BIN_11 +232 0x0000 //RX_FDEQ_BIN_12 +233 0x0000 //RX_FDEQ_BIN_13 +234 0x0000 //RX_FDEQ_BIN_14 +235 0x0000 //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x4000 //RX_FDEQ_RESRV_0 +245 0x0320 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0030 //RX_FDDRC_BAND_MARGIN_1 +248 0x0050 //RX_FDDRC_BAND_MARGIN_2 +249 0x0080 //RX_FDDRC_BAND_MARGIN_3 +250 0x0007 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x5000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x6400 //RX_FDDRC_THRD_3_2 +258 0x6400 //RX_FDDRC_THRD_3_3 +259 0x2000 //RX_FDDRC_SLANT_0_0 +260 0x2000 //RX_FDDRC_SLANT_0_1 +261 0x2000 //RX_FDDRC_SLANT_0_2 +262 0x2000 //RX_FDDRC_SLANT_0_3 +263 0x5333 //RX_FDDRC_SLANT_1_0 +264 0x5333 //RX_FDDRC_SLANT_1_1 +265 0x5333 //RX_FDDRC_SLANT_1_2 +266 0x5333 //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +286 0x0100 //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 +#VOL 3 +163 0x1000 //RX_TDDRC_ALPHA_UP_1 +164 0x1000 //RX_TDDRC_ALPHA_UP_2 +165 0x1000 //RX_TDDRC_ALPHA_UP_3 +166 0x1000 //RX_TDDRC_ALPHA_UP_4 +184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +190 0x7000 //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +269 0x0000 //RX_TDDRC_THRD_0 +270 0x0000 //RX_TDDRC_THRD_1 +271 0x1800 //RX_TDDRC_THRD_2 +272 0x1800 //RX_TDDRC_THRD_3 +273 0x3000 //RX_TDDRC_SLANT_0 +274 0x6E00 //RX_TDDRC_SLANT_1 +275 0x1000 //RX_TDDRC_ALPHA_UP_0 +276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x199A //RX_TDDRC_HMNC_GAIN +279 0x0001 //RX_TDDRC_SMT_FLAG +280 0x0CCD //RX_TDDRC_SMT_W +281 0x0360 //RX_TDDRC_DRC_GAIN +195 0x0030 //RX_FDEQ_SUBNUM +196 0x4848 //RX_FDEQ_GAIN_0 +197 0x4848 //RX_FDEQ_GAIN_1 +198 0x4844 //RX_FDEQ_GAIN_2 +199 0x4A4C //RX_FDEQ_GAIN_3 +200 0x4E50 //RX_FDEQ_GAIN_4 +201 0x5254 //RX_FDEQ_GAIN_5 +202 0x5658 //RX_FDEQ_GAIN_6 +203 0x5A5C //RX_FDEQ_GAIN_7 +204 0x5C5C //RX_FDEQ_GAIN_8 +205 0x5C5C //RX_FDEQ_GAIN_9 +206 0x5C5C //RX_FDEQ_GAIN_10 +207 0x5C48 //RX_FDEQ_GAIN_11 +208 0x4848 //RX_FDEQ_GAIN_12 +209 0x4848 //RX_FDEQ_GAIN_13 +210 0x4848 //RX_FDEQ_GAIN_14 +211 0x4848 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0202 //RX_FDEQ_BIN_0 +221 0x0203 //RX_FDEQ_BIN_1 +222 0x0402 //RX_FDEQ_BIN_2 +223 0x0303 //RX_FDEQ_BIN_3 +224 0x0303 //RX_FDEQ_BIN_4 +225 0x0303 //RX_FDEQ_BIN_5 +226 0x0303 //RX_FDEQ_BIN_6 +227 0x0303 //RX_FDEQ_BIN_7 +228 0x0A0A //RX_FDEQ_BIN_8 +229 0x0A0E //RX_FDEQ_BIN_9 +230 0x0000 //RX_FDEQ_BIN_10 +231 0x0000 //RX_FDEQ_BIN_11 +232 0x0000 //RX_FDEQ_BIN_12 +233 0x0000 //RX_FDEQ_BIN_13 +234 0x0000 //RX_FDEQ_BIN_14 +235 0x0000 //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x4000 //RX_FDEQ_RESRV_0 +245 0x0320 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0030 //RX_FDDRC_BAND_MARGIN_1 +248 0x0050 //RX_FDDRC_BAND_MARGIN_2 +249 0x0080 //RX_FDDRC_BAND_MARGIN_3 +250 0x0007 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x5000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x6400 //RX_FDDRC_THRD_3_2 +258 0x6400 //RX_FDDRC_THRD_3_3 +259 0x2000 //RX_FDDRC_SLANT_0_0 +260 0x2000 //RX_FDDRC_SLANT_0_1 +261 0x2000 //RX_FDDRC_SLANT_0_2 +262 0x2000 //RX_FDDRC_SLANT_0_3 +263 0x5333 //RX_FDDRC_SLANT_1_0 +264 0x5333 //RX_FDDRC_SLANT_1_1 +265 0x5333 //RX_FDDRC_SLANT_1_2 +266 0x5333 //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +286 0x0100 //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 +#VOL 4 +163 0x1000 //RX_TDDRC_ALPHA_UP_1 +164 0x1000 //RX_TDDRC_ALPHA_UP_2 +165 0x1000 //RX_TDDRC_ALPHA_UP_3 +166 0x1000 //RX_TDDRC_ALPHA_UP_4 +184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +190 0x7000 //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +269 0x0000 //RX_TDDRC_THRD_0 +270 0x0000 //RX_TDDRC_THRD_1 +271 0x1800 //RX_TDDRC_THRD_2 +272 0x1800 //RX_TDDRC_THRD_3 +273 0x3000 //RX_TDDRC_SLANT_0 +274 0x6E00 //RX_TDDRC_SLANT_1 +275 0x1000 //RX_TDDRC_ALPHA_UP_0 +276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x199A //RX_TDDRC_HMNC_GAIN +279 0x0001 //RX_TDDRC_SMT_FLAG +280 0x0CCD //RX_TDDRC_SMT_W +281 0x0360 //RX_TDDRC_DRC_GAIN +195 0x0030 //RX_FDEQ_SUBNUM +196 0x4848 //RX_FDEQ_GAIN_0 +197 0x4848 //RX_FDEQ_GAIN_1 +198 0x4844 //RX_FDEQ_GAIN_2 +199 0x4A4C //RX_FDEQ_GAIN_3 +200 0x4E50 //RX_FDEQ_GAIN_4 +201 0x5254 //RX_FDEQ_GAIN_5 +202 0x5658 //RX_FDEQ_GAIN_6 +203 0x5A5C //RX_FDEQ_GAIN_7 +204 0x5C5C //RX_FDEQ_GAIN_8 +205 0x5C5C //RX_FDEQ_GAIN_9 +206 0x5C5C //RX_FDEQ_GAIN_10 +207 0x5C48 //RX_FDEQ_GAIN_11 +208 0x4848 //RX_FDEQ_GAIN_12 +209 0x4848 //RX_FDEQ_GAIN_13 +210 0x4848 //RX_FDEQ_GAIN_14 +211 0x4848 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0202 //RX_FDEQ_BIN_0 +221 0x0203 //RX_FDEQ_BIN_1 +222 0x0402 //RX_FDEQ_BIN_2 +223 0x0303 //RX_FDEQ_BIN_3 +224 0x0303 //RX_FDEQ_BIN_4 +225 0x0303 //RX_FDEQ_BIN_5 +226 0x0303 //RX_FDEQ_BIN_6 +227 0x0303 //RX_FDEQ_BIN_7 +228 0x0A0A //RX_FDEQ_BIN_8 +229 0x0A0E //RX_FDEQ_BIN_9 +230 0x0000 //RX_FDEQ_BIN_10 +231 0x0000 //RX_FDEQ_BIN_11 +232 0x0000 //RX_FDEQ_BIN_12 +233 0x0000 //RX_FDEQ_BIN_13 +234 0x0000 //RX_FDEQ_BIN_14 +235 0x0000 //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x4000 //RX_FDEQ_RESRV_0 +245 0x0320 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0030 //RX_FDDRC_BAND_MARGIN_1 +248 0x0050 //RX_FDDRC_BAND_MARGIN_2 +249 0x0080 //RX_FDDRC_BAND_MARGIN_3 +250 0x0007 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x5000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x6400 //RX_FDDRC_THRD_3_2 +258 0x6400 //RX_FDDRC_THRD_3_3 +259 0x2000 //RX_FDDRC_SLANT_0_0 +260 0x2000 //RX_FDDRC_SLANT_0_1 +261 0x2000 //RX_FDDRC_SLANT_0_2 +262 0x2000 //RX_FDDRC_SLANT_0_3 +263 0x5333 //RX_FDDRC_SLANT_1_0 +264 0x5333 //RX_FDDRC_SLANT_1_1 +265 0x5333 //RX_FDDRC_SLANT_1_2 +266 0x5333 //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +286 0x0100 //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 +#VOL 5 +163 0x1000 //RX_TDDRC_ALPHA_UP_1 +164 0x1000 //RX_TDDRC_ALPHA_UP_2 +165 0x1000 //RX_TDDRC_ALPHA_UP_3 +166 0x1000 //RX_TDDRC_ALPHA_UP_4 +184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +190 0x7000 //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +269 0x0000 //RX_TDDRC_THRD_0 +270 0x0000 //RX_TDDRC_THRD_1 +271 0x1800 //RX_TDDRC_THRD_2 +272 0x1800 //RX_TDDRC_THRD_3 +273 0x3000 //RX_TDDRC_SLANT_0 +274 0x6E00 //RX_TDDRC_SLANT_1 +275 0x1000 //RX_TDDRC_ALPHA_UP_0 +276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x199A //RX_TDDRC_HMNC_GAIN +279 0x0001 //RX_TDDRC_SMT_FLAG +280 0x0CCD //RX_TDDRC_SMT_W +281 0x0360 //RX_TDDRC_DRC_GAIN +195 0x0030 //RX_FDEQ_SUBNUM +196 0x4848 //RX_FDEQ_GAIN_0 +197 0x4848 //RX_FDEQ_GAIN_1 +198 0x4844 //RX_FDEQ_GAIN_2 +199 0x4A4C //RX_FDEQ_GAIN_3 +200 0x4E50 //RX_FDEQ_GAIN_4 +201 0x5254 //RX_FDEQ_GAIN_5 +202 0x5658 //RX_FDEQ_GAIN_6 +203 0x5A5C //RX_FDEQ_GAIN_7 +204 0x5C5C //RX_FDEQ_GAIN_8 +205 0x5C5C //RX_FDEQ_GAIN_9 +206 0x5C5C //RX_FDEQ_GAIN_10 +207 0x5C48 //RX_FDEQ_GAIN_11 +208 0x4848 //RX_FDEQ_GAIN_12 +209 0x4848 //RX_FDEQ_GAIN_13 +210 0x4848 //RX_FDEQ_GAIN_14 +211 0x4848 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0202 //RX_FDEQ_BIN_0 +221 0x0203 //RX_FDEQ_BIN_1 +222 0x0402 //RX_FDEQ_BIN_2 +223 0x0303 //RX_FDEQ_BIN_3 +224 0x0303 //RX_FDEQ_BIN_4 +225 0x0303 //RX_FDEQ_BIN_5 +226 0x0303 //RX_FDEQ_BIN_6 +227 0x0303 //RX_FDEQ_BIN_7 +228 0x0A0A //RX_FDEQ_BIN_8 +229 0x0A0E //RX_FDEQ_BIN_9 +230 0x0000 //RX_FDEQ_BIN_10 +231 0x0000 //RX_FDEQ_BIN_11 +232 0x0000 //RX_FDEQ_BIN_12 +233 0x0000 //RX_FDEQ_BIN_13 +234 0x0000 //RX_FDEQ_BIN_14 +235 0x0000 //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x4000 //RX_FDEQ_RESRV_0 +245 0x0320 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0030 //RX_FDDRC_BAND_MARGIN_1 +248 0x0050 //RX_FDDRC_BAND_MARGIN_2 +249 0x0080 //RX_FDDRC_BAND_MARGIN_3 +250 0x0007 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x5000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x6400 //RX_FDDRC_THRD_3_2 +258 0x6400 //RX_FDDRC_THRD_3_3 +259 0x2000 //RX_FDDRC_SLANT_0_0 +260 0x2000 //RX_FDDRC_SLANT_0_1 +261 0x2000 //RX_FDDRC_SLANT_0_2 +262 0x2000 //RX_FDDRC_SLANT_0_3 +263 0x5333 //RX_FDDRC_SLANT_1_0 +264 0x5333 //RX_FDDRC_SLANT_1_1 +265 0x5333 //RX_FDDRC_SLANT_1_2 +266 0x5333 //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +286 0x0100 //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 +#VOL 6 +163 0x1000 //RX_TDDRC_ALPHA_UP_1 +164 0x1000 //RX_TDDRC_ALPHA_UP_2 +165 0x1000 //RX_TDDRC_ALPHA_UP_3 +166 0x1000 //RX_TDDRC_ALPHA_UP_4 +184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +190 0x7000 //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +269 0x0000 //RX_TDDRC_THRD_0 +270 0x0000 //RX_TDDRC_THRD_1 +271 0x1800 //RX_TDDRC_THRD_2 +272 0x1800 //RX_TDDRC_THRD_3 +273 0x3000 //RX_TDDRC_SLANT_0 +274 0x6E00 //RX_TDDRC_SLANT_1 +275 0x1000 //RX_TDDRC_ALPHA_UP_0 +276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x199A //RX_TDDRC_HMNC_GAIN +279 0x0001 //RX_TDDRC_SMT_FLAG +280 0x0CCD //RX_TDDRC_SMT_W +281 0x0360 //RX_TDDRC_DRC_GAIN +195 0x0030 //RX_FDEQ_SUBNUM +196 0x4848 //RX_FDEQ_GAIN_0 +197 0x4848 //RX_FDEQ_GAIN_1 +198 0x4844 //RX_FDEQ_GAIN_2 +199 0x4A4C //RX_FDEQ_GAIN_3 +200 0x4E50 //RX_FDEQ_GAIN_4 +201 0x5254 //RX_FDEQ_GAIN_5 +202 0x5658 //RX_FDEQ_GAIN_6 +203 0x5A5C //RX_FDEQ_GAIN_7 +204 0x5C5C //RX_FDEQ_GAIN_8 +205 0x5C5C //RX_FDEQ_GAIN_9 +206 0x5C5C //RX_FDEQ_GAIN_10 +207 0x5C48 //RX_FDEQ_GAIN_11 +208 0x4848 //RX_FDEQ_GAIN_12 +209 0x4848 //RX_FDEQ_GAIN_13 +210 0x4848 //RX_FDEQ_GAIN_14 +211 0x4848 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0202 //RX_FDEQ_BIN_0 +221 0x0203 //RX_FDEQ_BIN_1 +222 0x0402 //RX_FDEQ_BIN_2 +223 0x0303 //RX_FDEQ_BIN_3 +224 0x0303 //RX_FDEQ_BIN_4 +225 0x0303 //RX_FDEQ_BIN_5 +226 0x0303 //RX_FDEQ_BIN_6 +227 0x0303 //RX_FDEQ_BIN_7 +228 0x0A0A //RX_FDEQ_BIN_8 +229 0x0A0E //RX_FDEQ_BIN_9 +230 0x0000 //RX_FDEQ_BIN_10 +231 0x0000 //RX_FDEQ_BIN_11 +232 0x0000 //RX_FDEQ_BIN_12 +233 0x0000 //RX_FDEQ_BIN_13 +234 0x0000 //RX_FDEQ_BIN_14 +235 0x0000 //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x4000 //RX_FDEQ_RESRV_0 +245 0x0320 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0030 //RX_FDDRC_BAND_MARGIN_1 +248 0x0050 //RX_FDDRC_BAND_MARGIN_2 +249 0x0080 //RX_FDDRC_BAND_MARGIN_3 +250 0x0007 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x5000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x6400 //RX_FDDRC_THRD_3_2 +258 0x6400 //RX_FDDRC_THRD_3_3 +259 0x2000 //RX_FDDRC_SLANT_0_0 +260 0x2000 //RX_FDDRC_SLANT_0_1 +261 0x2000 //RX_FDDRC_SLANT_0_2 +262 0x2000 //RX_FDDRC_SLANT_0_3 +263 0x5333 //RX_FDDRC_SLANT_1_0 +264 0x5333 //RX_FDDRC_SLANT_1_1 +265 0x5333 //RX_FDDRC_SLANT_1_2 +266 0x5333 //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +286 0x0100 //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 #CASE_NAME HANDSET-HANDSET_HAC-TMOBILE_US-WB -#PARAM_TYPE TX+RX -#TOTAL_CUSTOM_STEP 7 +#PARAM_MODE Full +#PARAM_TYPE TX+2RX +#TOTAL_CUSTOM_STEP 7+7 #TX 0 0x0000 //TX_OPERATION_MODE_0 1 0x0000 //TX_OPERATION_MODE_1 @@ -28076,7 +42749,7 @@ 18 0x0000 //TX_SYS_RESRV_2 19 0x0000 //TX_SYS_RESRV_3 20 0x0000 //TX_DIST2REF0 -21 0x009D //TX_DIST2REF1 +21 0x009C //TX_DIST2REF1 22 0x0000 //TX_DIST2REF_02 23 0x0000 //TX_DIST2REF_03 24 0x0000 //TX_DIST2REF_04 @@ -28306,16 +42979,16 @@ 248 0xF800 //TX_THR_SN_EST_6 249 0xF700 //TX_THR_SN_EST_7 250 0x0000 //TX_DELTA_THR_SN_EST_0 -251 0x0100 //TX_DELTA_THR_SN_EST_1 -252 0x01A0 //TX_DELTA_THR_SN_EST_2 +251 0x01A0 //TX_DELTA_THR_SN_EST_1 +252 0x0200 //TX_DELTA_THR_SN_EST_2 253 0x0200 //TX_DELTA_THR_SN_EST_3 -254 0x0200 //TX_DELTA_THR_SN_EST_4 -255 0x0100 //TX_DELTA_THR_SN_EST_5 -256 0x0200 //TX_DELTA_THR_SN_EST_6 +254 0x0100 //TX_DELTA_THR_SN_EST_4 +255 0x0200 //TX_DELTA_THR_SN_EST_5 +256 0x0100 //TX_DELTA_THR_SN_EST_6 257 0x0200 //TX_DELTA_THR_SN_EST_7 258 0x4000 //TX_LAMBDA_NN_EST_0 -259 0x4000 //TX_LAMBDA_NN_EST_1 -260 0x5000 //TX_LAMBDA_NN_EST_2 +259 0x5000 //TX_LAMBDA_NN_EST_1 +260 0x4000 //TX_LAMBDA_NN_EST_2 261 0x4000 //TX_LAMBDA_NN_EST_3 262 0x4000 //TX_LAMBDA_NN_EST_4 263 0x4000 //TX_LAMBDA_NN_EST_5 @@ -28337,18 +43010,18 @@ 279 0x1000 //TX_B_POST_FLT_0 280 0x4000 //TX_B_POST_FLT_1 281 0x0018 //TX_NS_LVL_CTRL_0 -282 0x001C //TX_NS_LVL_CTRL_1 -283 0x0019 //TX_NS_LVL_CTRL_2 -284 0x0018 //TX_NS_LVL_CTRL_3 -285 0x0019 //TX_NS_LVL_CTRL_4 -286 0x001A //TX_NS_LVL_CTRL_5 -287 0x001E //TX_NS_LVL_CTRL_6 +282 0x0019 //TX_NS_LVL_CTRL_1 +283 0x0018 //TX_NS_LVL_CTRL_2 +284 0x0019 //TX_NS_LVL_CTRL_3 +285 0x001A //TX_NS_LVL_CTRL_4 +286 0x001E //TX_NS_LVL_CTRL_5 +287 0x001C //TX_NS_LVL_CTRL_6 288 0x001C //TX_NS_LVL_CTRL_7 289 0x000E //TX_MIN_GAIN_S_0 -290 0x0018 //TX_MIN_GAIN_S_1 +290 0x0012 //TX_MIN_GAIN_S_1 291 0x0012 //TX_MIN_GAIN_S_2 292 0x0012 //TX_MIN_GAIN_S_3 -293 0x0012 //TX_MIN_GAIN_S_4 +293 0x0018 //TX_MIN_GAIN_S_4 294 0x0018 //TX_MIN_GAIN_S_5 295 0x0018 //TX_MIN_GAIN_S_6 296 0x0018 //TX_MIN_GAIN_S_7 @@ -28356,8 +43029,8 @@ 298 0x0000 //TX_NS_MAX_PRI_SNR_TH 299 0x0000 //TX_NMOS_SUP_MENSA 300 0x7FFF //TX_SNRI_SUP_0 -301 0x4000 //TX_SNRI_SUP_1 -302 0x5000 //TX_SNRI_SUP_2 +301 0x5000 //TX_SNRI_SUP_1 +302 0x4000 //TX_SNRI_SUP_2 303 0x4000 //TX_SNRI_SUP_3 304 0x4000 //TX_SNRI_SUP_4 305 0x4000 //TX_SNRI_SUP_5 @@ -28370,28 +43043,28 @@ 312 0x7FFF //TX_A_POST_FILT_0 313 0x2000 //TX_A_POST_FILT_1 314 0x7000 //TX_A_POST_FILT_S_0 -315 0x7000 //TX_A_POST_FILT_S_1 +315 0x3000 //TX_A_POST_FILT_S_1 316 0x3000 //TX_A_POST_FILT_S_2 -317 0x3000 //TX_A_POST_FILT_S_3 -318 0x2000 //TX_A_POST_FILT_S_4 +317 0x2000 //TX_A_POST_FILT_S_3 +318 0x7000 //TX_A_POST_FILT_S_4 319 0x7000 //TX_A_POST_FILT_S_5 320 0x7000 //TX_A_POST_FILT_S_6 321 0x7000 //TX_A_POST_FILT_S_7 322 0x1000 //TX_B_POST_FILT_0 323 0x4000 //TX_B_POST_FILT_1 -324 0x5000 //TX_B_POST_FILT_2 +324 0x4000 //TX_B_POST_FILT_2 325 0x4000 //TX_B_POST_FILT_3 326 0x4000 //TX_B_POST_FILT_4 327 0x4000 //TX_B_POST_FILT_5 -328 0x4000 //TX_B_POST_FILT_6 +328 0x5000 //TX_B_POST_FILT_6 329 0x4000 //TX_B_POST_FILT_7 330 0x4000 //TX_B_LESSCUT_RTO_S_0 331 0x6000 //TX_B_LESSCUT_RTO_S_1 332 0x6000 //TX_B_LESSCUT_RTO_S_2 333 0x6000 //TX_B_LESSCUT_RTO_S_3 -334 0x6000 //TX_B_LESSCUT_RTO_S_4 +334 0x7FFF //TX_B_LESSCUT_RTO_S_4 335 0x6000 //TX_B_LESSCUT_RTO_S_5 -336 0x7FFF //TX_B_LESSCUT_RTO_S_6 +336 0x6000 //TX_B_LESSCUT_RTO_S_6 337 0x7FFF //TX_B_LESSCUT_RTO_S_7 338 0x7C29 //TX_LAMBDA_PFILT 339 0x7C29 //TX_LAMBDA_PFILT_S_0 @@ -28435,10 +43108,10 @@ 377 0x4E20 //TX_NOISE_TH_5_4 378 0x21E8 //TX_NOISE_TH_6 379 0x0014 //TX_MINENOISE_TH -380 0x4000 //TX_MINENOISE_MIC0_TH_MTS -381 0xFFEE //TX_MINENOISE_MIC0_TH_EXP -382 0x6000 //TX_MINENOISE_MIC0_S_TH_MTS -383 0xFFF3 //TX_MINENOISE_MIC0_S_TH_EXP +380 0xD508 //TX_MORENS_TFMASK_TH +381 0x0001 //TX_DRC_QUIET_FLOOR +382 0x6D60 //TX_RATIODTL_CUT_TH +383 0x0DAC //TX_DT_CUT_K1 384 0x00A5 //TX_OUT_ENER_S_TH_CLEAN 385 0x00A5 //TX_OUT_ENER_S_TH_LESSCLEAN 386 0x00A5 //TX_OUT_ENER_S_TH_NOISY @@ -28446,15 +43119,15 @@ 388 0x00CE //TX_OUT_ENER_TH_SPEECH 389 0x2000 //TX_SN_NPB_GAIN 390 0x0000 //TX_NN_NPB_GAIN -391 0x0000 //TX_CSX_ALPHA_0 -392 0x0000 //TX_CSX_ALPHA_1 -393 0x0000 //TX_CSX_ALPHA_2 -394 0x0000 //TX_CSX_ALPHA_3 -395 0x0800 //TX_MU_ARSP_EST -396 0x00C8 //TX_P_OUTBEAM_MIN_TH +391 0x3000 //TX_POST_MASK_SUP_HSNE +392 0x07D0 //TX_TAIL_DET_TH +393 0x4000 //TX_B_LESSCUT_RTO_WTA +394 0x0000 //TX_MEL_G_R +395 0x0080 //TX_SUPHIGH_TH +396 0x4000 //TX_MASK_G_R 397 0x0002 //TX_EXTRA_NS_L -398 0x0800 //TX_EXTRA_NS_A -399 0x0005 //TX_VR_NOISE_FLOOR_TH +398 0x1800 //TX_C_POST_FLT_MASK +399 0x7FFF //TX_A_POST_FLT_WNS 400 0x0148 //TX_MIN_G_LOW300HZ 401 0x0004 //TX_MAXLEVEL_CNG 402 0x00B4 //TX_STN_NOISE_TH @@ -28569,16 +43242,16 @@ 511 0x6666 //TX_MIC_TO_BFGAIN 512 0x0000 //TX_MICTOBFGAIN0 513 0x0000 //TX_FASTMUE_TH -514 0x0000 //TX_DERVB_LEN_0 -515 0x0000 //TX_DERVB_LEN_1 -516 0x0000 //TX_RHO_DERVB -517 0x0000 //TX_MIC_INDX_DERVB -518 0x0000 //TX_MU_DERVB -519 0x0000 //TX_DR_RESRV_0 -520 0x0000 //TX_DR_RESRV_1 -521 0x0000 //TX_DR_RESRV_2 -522 0x0000 //TX_DR_RESRV_3 -523 0x0000 //TX_DR_RESRV_4 +514 0x3000 //TX_DEREVERB_LF_MU +515 0x34CD //TX_DEREVERB_HF_MU +516 0x0007 //TX_DEREVERB_DELAY +517 0x0004 //TX_DEREVERB_COEF_LEN +518 0x0003 //TX_DEREVERB_DNR +519 0x0000 //TX_DEREVERB_ALPHA +520 0x0000 //TX_DEREVERB_BETA +521 0x0000 //TX_GSC_RTOL_TH +522 0x0000 //TX_GSC_RTOH_TH +523 0x7E2C //TX_WIDE2_MEANHTH 524 0x0000 //TX_DR_RESRV_5 525 0x0000 //TX_DR_RESRV_6 526 0x0000 //TX_DR_RESRV_7 @@ -28626,16 +43299,16 @@ 568 0x5048 //TX_FDEQ_GAIN_1 569 0x4C4C //TX_FDEQ_GAIN_2 570 0x474A //TX_FDEQ_GAIN_3 -571 0x4742 //TX_FDEQ_GAIN_4 -572 0x4241 //TX_FDEQ_GAIN_5 -573 0x403F //TX_FDEQ_GAIN_6 -574 0x433F //TX_FDEQ_GAIN_7 -575 0x3938 //TX_FDEQ_GAIN_8 -576 0x3434 //TX_FDEQ_GAIN_9 -577 0x3530 //TX_FDEQ_GAIN_10 -578 0x3033 //TX_FDEQ_GAIN_11 -579 0x3535 //TX_FDEQ_GAIN_12 -580 0x3D48 //TX_FDEQ_GAIN_13 +571 0x473F //TX_FDEQ_GAIN_4 +572 0x4245 //TX_FDEQ_GAIN_5 +573 0x4B53 //TX_FDEQ_GAIN_6 +574 0x564A //TX_FDEQ_GAIN_7 +575 0x3D3A //TX_FDEQ_GAIN_8 +576 0x3838 //TX_FDEQ_GAIN_9 +577 0x3836 //TX_FDEQ_GAIN_10 +578 0x3633 //TX_FDEQ_GAIN_11 +579 0x3838 //TX_FDEQ_GAIN_12 +580 0x4048 //TX_FDEQ_GAIN_13 581 0x4848 //TX_FDEQ_GAIN_14 582 0x4848 //TX_FDEQ_GAIN_15 583 0x4848 //TX_FDEQ_GAIN_16 @@ -28679,12 +43352,12 @@ 621 0x4848 //TX_PREEQ_GAIN_MIC0_4 622 0x4848 //TX_PREEQ_GAIN_MIC0_5 623 0x4848 //TX_PREEQ_GAIN_MIC0_6 -624 0x4846 //TX_PREEQ_GAIN_MIC0_7 -625 0x4544 //TX_PREEQ_GAIN_MIC0_8 -626 0x4241 //TX_PREEQ_GAIN_MIC0_9 -627 0x403E //TX_PREEQ_GAIN_MIC0_10 -628 0x3D3C //TX_PREEQ_GAIN_MIC0_11 -629 0x3C3C //TX_PREEQ_GAIN_MIC0_12 +624 0x4848 //TX_PREEQ_GAIN_MIC0_7 +625 0x4848 //TX_PREEQ_GAIN_MIC0_8 +626 0x4848 //TX_PREEQ_GAIN_MIC0_9 +627 0x4848 //TX_PREEQ_GAIN_MIC0_10 +628 0x4848 //TX_PREEQ_GAIN_MIC0_11 +629 0x4848 //TX_PREEQ_GAIN_MIC0_12 630 0x4848 //TX_PREEQ_GAIN_MIC0_13 631 0x4848 //TX_PREEQ_GAIN_MIC0_14 632 0x4848 //TX_PREEQ_GAIN_MIC0_15 @@ -28729,11 +43402,11 @@ 671 0x4848 //TX_PREEQ_GAIN_MIC1_5 672 0x4848 //TX_PREEQ_GAIN_MIC1_6 673 0x4848 //TX_PREEQ_GAIN_MIC1_7 -674 0x484A //TX_PREEQ_GAIN_MIC1_8 -675 0x4B4C //TX_PREEQ_GAIN_MIC1_9 +674 0x4848 //TX_PREEQ_GAIN_MIC1_8 +675 0x4A4B //TX_PREEQ_GAIN_MIC1_9 676 0x4B4A //TX_PREEQ_GAIN_MIC1_10 -677 0x4A48 //TX_PREEQ_GAIN_MIC1_11 -678 0x4C4C //TX_PREEQ_GAIN_MIC1_12 +677 0x4848 //TX_PREEQ_GAIN_MIC1_11 +678 0x494C //TX_PREEQ_GAIN_MIC1_12 679 0x4C4C //TX_PREEQ_GAIN_MIC1_13 680 0x4848 //TX_PREEQ_GAIN_MIC1_14 681 0x4848 //TX_PREEQ_GAIN_MIC1_15 @@ -28831,7 +43504,7 @@ 773 0x0000 //TX_GAIN_LIMIT_0 774 0x0000 //TX_GAIN_LIMIT_1 775 0x0006 //TX_GAIN_LIMIT_2 -776 0x0006 //TX_GAIN_LIMIT_3 +776 0x0005 //TX_GAIN_LIMIT_3 777 0x7F5B //TX_BVE_NOVAD0_ALPHADOWN 778 0x7FDE //TX_BVE_VAD0_ALPHAUP 779 0x7F3A //TX_BVE_VAD0_ALPHADOWN @@ -28952,6 +43625,71 @@ 894 0xC000 //TX_FASTNS_SSA_THHFL 895 0xCCCC //TX_FASTNS_SSA_THLFH 896 0xD999 //TX_FASTNS_SSA_THHFH +897 0x2339 //TX_SENDFUNC_REG_MICMUTE +898 0x0021 //TX_SENDFUNC_REG_MICMUTE1 +899 0x02BC //TX_MICMUTE_RATIO_THR +900 0x0140 //TX_MICMUTE_AMP_THR +901 0x0004 //TX_MICMUTE_HPF_IND +902 0x00C0 //TX_MICMUTE_LOG_EYR_TH +903 0x0008 //TX_MICMUTE_CVG_TIME +904 0x0008 //TX_MICMUTE_RELEASE_TIME +905 0x01FE //TX_MIC_VOLUME_MIC0MUTE +906 0x0020 //TX_MICMUTE_EPD_OFFSET_0 +907 0x001E //TX_MICMUTE_FRQ_AEC_L +908 0x7999 //TX_MICMUTE_EAD_THR +909 0x7FFF //TX_MICMUTE_LAMBDA_CB_NLE +910 0x7FFF //TX_MICMUTE_LAMBDA_RE_EST +911 0x4000 //TX_DTD_THR1_MICMUTE_0 +912 0x7000 //TX_DTD_THR1_MICMUTE_1 +913 0x7FFF //TX_DTD_THR1_MICMUTE_2 +914 0x7FFF //TX_DTD_THR1_MICMUTE_3 +915 0x6CCC //TX_DTD_THR2_MICMUTE_0 +916 0x0400 //TX_MICMUTE_MIN_EQ_RE_EST_0 +917 0x0400 //TX_MICMUTE_MIN_EQ_RE_EST_1 +918 0x1000 //TX_MICMUTE_MIN_EQ_RE_EST_2 +919 0x7FFF //TX_MICMUTE_MIN_EQ_RE_EST_3 +920 0x7FFF //TX_MICMUTE_MIN_EQ_RE_EST_4 +921 0x4000 //TX_MICMUTE_C_POST_FLT +922 0x03E8 //TX_MICMUTE_DT_CUT_K +923 0x0001 //TX_MICMUTE_DT_CUT_THR +924 0x03E8 //TX_MICMUTE_DT_CUT_K2 +925 0x0001 //TX_MICMUTE_DT_CUT_THR2 +926 0x0064 //TX_MICMUTE_DT2_HOLD_N +927 0x1000 //TX_MICMUTE_RATIODTH_THCUT +928 0x1000 //TX_MICMUTE_B_POST_FLT_ECHOL +929 0x7FFF //TX_MICMUTE_B_POST_FLT_ECHOH +930 0x0400 //TX_MICMUTE_C_POST_FLT_MASK +931 0x7999 //TX_MICMUTE_RATIODTL_CUT_TH +932 0x0258 //TX_MICMUTE_DT_CUT_K1 +933 0x0800 //TX_MICMUTE_N2_SN_EST +934 0xFC00 //TX_MICMUTE_THR_SN_EST_0 +935 0x001C //TX_MICMUTE_MIN_G_CTRL_0 +936 0x6000 //TX_MICMUTE_A_POST_FILT_S_0 +937 0x7000 //TX_MICMUTE_B_POST_FILT_0 +938 0x2710 //TX_MIC1RUB_AMP_THR +939 0x0010 //TX_MIC1MUTE_RATIO_THR +940 0x0450 //TX_MIC1MUTE_AMP_THR +941 0x0008 //TX_MIC1MUTE_CVG_TIME +942 0x0008 //TX_MIC1MUTE_RELEASE_TIME +943 0x0000 //TX_AMS_RESRV_01 +944 0x0000 //TX_AMS_RESRV_02 +945 0x0000 //TX_AMS_RESRV_03 +946 0x0000 //TX_AMS_RESRV_04 +947 0x0000 //TX_AMS_RESRV_05 +948 0x0000 //TX_AMS_RESRV_06 +949 0x0000 //TX_AMS_RESRV_07 +950 0x0000 //TX_AMS_RESRV_08 +951 0x0000 //TX_AMS_RESRV_09 +952 0x0000 //TX_AMS_RESRV_10 +953 0x0000 //TX_AMS_RESRV_11 +954 0x0000 //TX_AMS_RESRV_12 +955 0x0000 //TX_AMS_RESRV_13 +956 0x0000 //TX_AMS_RESRV_14 +957 0x0000 //TX_AMS_RESRV_15 +958 0x0000 //TX_AMS_RESRV_16 +959 0x0000 //TX_AMS_RESRV_17 +960 0x0000 //TX_AMS_RESRV_18 +961 0x0000 //TX_AMS_RESRV_19 #RX 0 0x000C //RX_RECVFUNC_MODE_0 1 0x0000 //RX_RECVFUNC_MODE_1 @@ -29803,14 +44541,866 @@ 110 0x0000 //RX_FDDRC_RESRV_0 129 0x0100 //RX_SPK_VOL 130 0x0000 //RX_VOL_RESRV_0 +#RX 2 +157 0x000C //RX_RECVFUNC_MODE_0 +158 0x0000 //RX_RECVFUNC_MODE_1 +159 0x0001 //RX_SAMPLINGFREQ_SIG +160 0x0001 //RX_SAMPLINGFREQ_PROC +161 0x000A //RX_FRAME_SZ +162 0x0000 //RX_DELAY_OPT +163 0x1000 //RX_TDDRC_ALPHA_UP_1 +164 0x1000 //RX_TDDRC_ALPHA_UP_2 +165 0x1000 //RX_TDDRC_ALPHA_UP_3 +166 0x1000 //RX_TDDRC_ALPHA_UP_4 +167 0x0800 //RX_PGA +168 0x7FFF //RX_A_HP +169 0x4000 //RX_B_PE +170 0x7800 //RX_THR_PITCH_DET_0 +171 0x7000 //RX_THR_PITCH_DET_1 +172 0x6000 //RX_THR_PITCH_DET_2 +173 0x0008 //RX_PITCH_BFR_LEN +174 0x0003 //RX_SBD_PITCH_DET +175 0x0100 //RX_PP_RESRV_0 +176 0x0020 //RX_PP_RESRV_1 +177 0x0400 //RX_N_SN_EST +178 0x000C //RX_N2_SN_EST +179 0x0014 //RX_NS_LVL_CTRL +180 0xF800 //RX_THR_SN_EST +181 0x7E00 //RX_LAMBDA_PFILT +182 0x000A //RX_FENS_RESRV_0 +183 0x0190 //RX_FENS_RESRV_1 +184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +187 0x0002 //RX_EXTRA_NS_L +188 0x0800 //RX_EXTRA_NS_A +189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +190 0x7000 //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +192 0x199A //RX_A_POST_FLT +193 0x0000 //RX_LMT_THRD +194 0x4000 //RX_LMT_ALPHA +195 0x0030 //RX_FDEQ_SUBNUM +196 0x4848 //RX_FDEQ_GAIN_0 +197 0x4848 //RX_FDEQ_GAIN_1 +198 0x4844 //RX_FDEQ_GAIN_2 +199 0x4A4C //RX_FDEQ_GAIN_3 +200 0x4E50 //RX_FDEQ_GAIN_4 +201 0x5254 //RX_FDEQ_GAIN_5 +202 0x5658 //RX_FDEQ_GAIN_6 +203 0x5A5C //RX_FDEQ_GAIN_7 +204 0x5C5C //RX_FDEQ_GAIN_8 +205 0x5C5C //RX_FDEQ_GAIN_9 +206 0x5C5C //RX_FDEQ_GAIN_10 +207 0x5C5C //RX_FDEQ_GAIN_11 +208 0x5C5C //RX_FDEQ_GAIN_12 +209 0x5C5C //RX_FDEQ_GAIN_13 +210 0x4848 //RX_FDEQ_GAIN_14 +211 0x4848 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0202 //RX_FDEQ_BIN_0 +221 0x0203 //RX_FDEQ_BIN_1 +222 0x0402 //RX_FDEQ_BIN_2 +223 0x0505 //RX_FDEQ_BIN_3 +224 0x0505 //RX_FDEQ_BIN_4 +225 0x0505 //RX_FDEQ_BIN_5 +226 0x0505 //RX_FDEQ_BIN_6 +227 0x0505 //RX_FDEQ_BIN_7 +228 0x160C //RX_FDEQ_BIN_8 +229 0x0D0E //RX_FDEQ_BIN_9 +230 0x0E0F //RX_FDEQ_BIN_10 +231 0x0F10 //RX_FDEQ_BIN_11 +232 0x1011 //RX_FDEQ_BIN_12 +233 0x1104 //RX_FDEQ_BIN_13 +234 0x0000 //RX_FDEQ_BIN_14 +235 0x0000 //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x4000 //RX_FDEQ_RESRV_0 +245 0x0320 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0030 //RX_FDDRC_BAND_MARGIN_1 +248 0x0050 //RX_FDDRC_BAND_MARGIN_2 +249 0x0080 //RX_FDDRC_BAND_MARGIN_3 +250 0x0007 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x5000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x6400 //RX_FDDRC_THRD_3_2 +258 0x6400 //RX_FDDRC_THRD_3_3 +259 0x2000 //RX_FDDRC_SLANT_0_0 +260 0x2000 //RX_FDDRC_SLANT_0_1 +261 0x2000 //RX_FDDRC_SLANT_0_2 +262 0x2000 //RX_FDDRC_SLANT_0_3 +263 0x5333 //RX_FDDRC_SLANT_1_0 +264 0x5333 //RX_FDDRC_SLANT_1_1 +265 0x5333 //RX_FDDRC_SLANT_1_2 +266 0x5333 //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +268 0x0002 //RX_FILTINDX +269 0x0000 //RX_TDDRC_THRD_0 +270 0x0000 //RX_TDDRC_THRD_1 +271 0x1800 //RX_TDDRC_THRD_2 +272 0x1800 //RX_TDDRC_THRD_3 +273 0x3000 //RX_TDDRC_SLANT_0 +274 0x6E00 //RX_TDDRC_SLANT_1 +275 0x1000 //RX_TDDRC_ALPHA_UP_0 +276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x199A //RX_TDDRC_HMNC_GAIN +279 0x0001 //RX_TDDRC_SMT_FLAG +280 0x0CCD //RX_TDDRC_SMT_W +281 0x0400 //RX_TDDRC_DRC_GAIN +282 0x7C00 //RX_LAMBDA_PKA_FP +283 0x2000 //RX_TPKA_FP +284 0x2000 //RX_MIN_G_FP +285 0x0080 //RX_MAX_G_FP +286 0x0100 //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 +288 0x0000 //RX_MAXLEVEL_CNG +289 0x3000 //RX_BWE_UV_TH +290 0x3000 //RX_BWE_UV_TH2 +291 0x1800 //RX_BWE_UV_TH3 +292 0x1000 //RX_BWE_V_TH +293 0x04CD //RX_BWE_GAIN1_V_TH1 +294 0x0F33 //RX_BWE_GAIN1_V_TH2 +295 0x7333 //RX_BWE_UV_EQ +296 0x199A //RX_BWE_V_EQ +297 0x7333 //RX_BWE_TONE_TH +298 0x0004 //RX_BWE_UV_HOLD_T +299 0x6CCD //RX_BWE_GAIN2_ALPHA +300 0x799A //RX_BWE_GAIN3_ALPHA +301 0x001E //RX_BWE_CUTOFF +302 0x3000 //RX_BWE_GAINFILL +303 0x3200 //RX_BWE_MAXTH_TONE +304 0x2000 //RX_BWE_EQ_0 +305 0x2000 //RX_BWE_EQ_1 +306 0x2000 //RX_BWE_EQ_2 +307 0x2000 //RX_BWE_EQ_3 +308 0x2000 //RX_BWE_EQ_4 +309 0x2000 //RX_BWE_EQ_5 +310 0x2000 //RX_BWE_EQ_6 +311 0x0000 //RX_BWE_RESRV_0 +312 0x0000 //RX_BWE_RESRV_1 +313 0x0000 //RX_BWE_RESRV_2 +#VOL 0 +163 0x1000 //RX_TDDRC_ALPHA_UP_1 +164 0x1000 //RX_TDDRC_ALPHA_UP_2 +165 0x1000 //RX_TDDRC_ALPHA_UP_3 +166 0x1000 //RX_TDDRC_ALPHA_UP_4 +184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +190 0x7000 //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +269 0x0000 //RX_TDDRC_THRD_0 +270 0x0000 //RX_TDDRC_THRD_1 +271 0x1800 //RX_TDDRC_THRD_2 +272 0x1800 //RX_TDDRC_THRD_3 +273 0x3000 //RX_TDDRC_SLANT_0 +274 0x6E00 //RX_TDDRC_SLANT_1 +275 0x1000 //RX_TDDRC_ALPHA_UP_0 +276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x199A //RX_TDDRC_HMNC_GAIN +279 0x0001 //RX_TDDRC_SMT_FLAG +280 0x0CCD //RX_TDDRC_SMT_W +281 0x0400 //RX_TDDRC_DRC_GAIN +195 0x0030 //RX_FDEQ_SUBNUM +196 0x4848 //RX_FDEQ_GAIN_0 +197 0x4848 //RX_FDEQ_GAIN_1 +198 0x4844 //RX_FDEQ_GAIN_2 +199 0x4A4C //RX_FDEQ_GAIN_3 +200 0x4E50 //RX_FDEQ_GAIN_4 +201 0x5254 //RX_FDEQ_GAIN_5 +202 0x5658 //RX_FDEQ_GAIN_6 +203 0x5A5C //RX_FDEQ_GAIN_7 +204 0x5C5C //RX_FDEQ_GAIN_8 +205 0x5C5C //RX_FDEQ_GAIN_9 +206 0x5C5C //RX_FDEQ_GAIN_10 +207 0x5C5C //RX_FDEQ_GAIN_11 +208 0x5C5C //RX_FDEQ_GAIN_12 +209 0x5C5C //RX_FDEQ_GAIN_13 +210 0x4848 //RX_FDEQ_GAIN_14 +211 0x4848 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0202 //RX_FDEQ_BIN_0 +221 0x0203 //RX_FDEQ_BIN_1 +222 0x0402 //RX_FDEQ_BIN_2 +223 0x0505 //RX_FDEQ_BIN_3 +224 0x0505 //RX_FDEQ_BIN_4 +225 0x0505 //RX_FDEQ_BIN_5 +226 0x0505 //RX_FDEQ_BIN_6 +227 0x0505 //RX_FDEQ_BIN_7 +228 0x160C //RX_FDEQ_BIN_8 +229 0x0D0E //RX_FDEQ_BIN_9 +230 0x0E0F //RX_FDEQ_BIN_10 +231 0x0F10 //RX_FDEQ_BIN_11 +232 0x1011 //RX_FDEQ_BIN_12 +233 0x1104 //RX_FDEQ_BIN_13 +234 0x0000 //RX_FDEQ_BIN_14 +235 0x0000 //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x4000 //RX_FDEQ_RESRV_0 +245 0x0320 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0030 //RX_FDDRC_BAND_MARGIN_1 +248 0x0050 //RX_FDDRC_BAND_MARGIN_2 +249 0x0080 //RX_FDDRC_BAND_MARGIN_3 +250 0x0007 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x5000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x6400 //RX_FDDRC_THRD_3_2 +258 0x6400 //RX_FDDRC_THRD_3_3 +259 0x2000 //RX_FDDRC_SLANT_0_0 +260 0x2000 //RX_FDDRC_SLANT_0_1 +261 0x2000 //RX_FDDRC_SLANT_0_2 +262 0x2000 //RX_FDDRC_SLANT_0_3 +263 0x5333 //RX_FDDRC_SLANT_1_0 +264 0x5333 //RX_FDDRC_SLANT_1_1 +265 0x5333 //RX_FDDRC_SLANT_1_2 +266 0x5333 //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +286 0x0100 //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 +#VOL 1 +163 0x1000 //RX_TDDRC_ALPHA_UP_1 +164 0x1000 //RX_TDDRC_ALPHA_UP_2 +165 0x1000 //RX_TDDRC_ALPHA_UP_3 +166 0x1000 //RX_TDDRC_ALPHA_UP_4 +184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +190 0x7000 //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +269 0x0000 //RX_TDDRC_THRD_0 +270 0x0000 //RX_TDDRC_THRD_1 +271 0x1800 //RX_TDDRC_THRD_2 +272 0x1800 //RX_TDDRC_THRD_3 +273 0x3000 //RX_TDDRC_SLANT_0 +274 0x6E00 //RX_TDDRC_SLANT_1 +275 0x1000 //RX_TDDRC_ALPHA_UP_0 +276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x199A //RX_TDDRC_HMNC_GAIN +279 0x0001 //RX_TDDRC_SMT_FLAG +280 0x0CCD //RX_TDDRC_SMT_W +281 0x0400 //RX_TDDRC_DRC_GAIN +195 0x0030 //RX_FDEQ_SUBNUM +196 0x4848 //RX_FDEQ_GAIN_0 +197 0x4848 //RX_FDEQ_GAIN_1 +198 0x4844 //RX_FDEQ_GAIN_2 +199 0x4A4C //RX_FDEQ_GAIN_3 +200 0x4E50 //RX_FDEQ_GAIN_4 +201 0x5254 //RX_FDEQ_GAIN_5 +202 0x5658 //RX_FDEQ_GAIN_6 +203 0x5A5C //RX_FDEQ_GAIN_7 +204 0x5C5C //RX_FDEQ_GAIN_8 +205 0x5C5C //RX_FDEQ_GAIN_9 +206 0x5C5C //RX_FDEQ_GAIN_10 +207 0x5C5C //RX_FDEQ_GAIN_11 +208 0x5C5C //RX_FDEQ_GAIN_12 +209 0x5C5C //RX_FDEQ_GAIN_13 +210 0x4848 //RX_FDEQ_GAIN_14 +211 0x4848 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0202 //RX_FDEQ_BIN_0 +221 0x0203 //RX_FDEQ_BIN_1 +222 0x0402 //RX_FDEQ_BIN_2 +223 0x0505 //RX_FDEQ_BIN_3 +224 0x0505 //RX_FDEQ_BIN_4 +225 0x0505 //RX_FDEQ_BIN_5 +226 0x0505 //RX_FDEQ_BIN_6 +227 0x0505 //RX_FDEQ_BIN_7 +228 0x160C //RX_FDEQ_BIN_8 +229 0x0D0E //RX_FDEQ_BIN_9 +230 0x0E0F //RX_FDEQ_BIN_10 +231 0x0F10 //RX_FDEQ_BIN_11 +232 0x1011 //RX_FDEQ_BIN_12 +233 0x1104 //RX_FDEQ_BIN_13 +234 0x0000 //RX_FDEQ_BIN_14 +235 0x0000 //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x4000 //RX_FDEQ_RESRV_0 +245 0x0320 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0030 //RX_FDDRC_BAND_MARGIN_1 +248 0x0050 //RX_FDDRC_BAND_MARGIN_2 +249 0x0080 //RX_FDDRC_BAND_MARGIN_3 +250 0x0007 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x5000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x6400 //RX_FDDRC_THRD_3_2 +258 0x6400 //RX_FDDRC_THRD_3_3 +259 0x2000 //RX_FDDRC_SLANT_0_0 +260 0x2000 //RX_FDDRC_SLANT_0_1 +261 0x2000 //RX_FDDRC_SLANT_0_2 +262 0x2000 //RX_FDDRC_SLANT_0_3 +263 0x5333 //RX_FDDRC_SLANT_1_0 +264 0x5333 //RX_FDDRC_SLANT_1_1 +265 0x5333 //RX_FDDRC_SLANT_1_2 +266 0x5333 //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +286 0x0100 //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 +#VOL 2 +163 0x1000 //RX_TDDRC_ALPHA_UP_1 +164 0x1000 //RX_TDDRC_ALPHA_UP_2 +165 0x1000 //RX_TDDRC_ALPHA_UP_3 +166 0x1000 //RX_TDDRC_ALPHA_UP_4 +184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +190 0x7000 //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +269 0x0000 //RX_TDDRC_THRD_0 +270 0x0000 //RX_TDDRC_THRD_1 +271 0x1800 //RX_TDDRC_THRD_2 +272 0x1800 //RX_TDDRC_THRD_3 +273 0x3000 //RX_TDDRC_SLANT_0 +274 0x6E00 //RX_TDDRC_SLANT_1 +275 0x1000 //RX_TDDRC_ALPHA_UP_0 +276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x199A //RX_TDDRC_HMNC_GAIN +279 0x0001 //RX_TDDRC_SMT_FLAG +280 0x0CCD //RX_TDDRC_SMT_W +281 0x0400 //RX_TDDRC_DRC_GAIN +195 0x0030 //RX_FDEQ_SUBNUM +196 0x4848 //RX_FDEQ_GAIN_0 +197 0x4848 //RX_FDEQ_GAIN_1 +198 0x4844 //RX_FDEQ_GAIN_2 +199 0x4A4C //RX_FDEQ_GAIN_3 +200 0x4E50 //RX_FDEQ_GAIN_4 +201 0x5254 //RX_FDEQ_GAIN_5 +202 0x5658 //RX_FDEQ_GAIN_6 +203 0x5A5C //RX_FDEQ_GAIN_7 +204 0x5C5C //RX_FDEQ_GAIN_8 +205 0x5C5C //RX_FDEQ_GAIN_9 +206 0x5C5C //RX_FDEQ_GAIN_10 +207 0x5C5C //RX_FDEQ_GAIN_11 +208 0x5C5C //RX_FDEQ_GAIN_12 +209 0x5C5C //RX_FDEQ_GAIN_13 +210 0x4848 //RX_FDEQ_GAIN_14 +211 0x4848 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0202 //RX_FDEQ_BIN_0 +221 0x0203 //RX_FDEQ_BIN_1 +222 0x0402 //RX_FDEQ_BIN_2 +223 0x0505 //RX_FDEQ_BIN_3 +224 0x0505 //RX_FDEQ_BIN_4 +225 0x0505 //RX_FDEQ_BIN_5 +226 0x0505 //RX_FDEQ_BIN_6 +227 0x0505 //RX_FDEQ_BIN_7 +228 0x160C //RX_FDEQ_BIN_8 +229 0x0D0E //RX_FDEQ_BIN_9 +230 0x0E0F //RX_FDEQ_BIN_10 +231 0x0F10 //RX_FDEQ_BIN_11 +232 0x1011 //RX_FDEQ_BIN_12 +233 0x1104 //RX_FDEQ_BIN_13 +234 0x0000 //RX_FDEQ_BIN_14 +235 0x0000 //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x4000 //RX_FDEQ_RESRV_0 +245 0x0320 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0030 //RX_FDDRC_BAND_MARGIN_1 +248 0x0050 //RX_FDDRC_BAND_MARGIN_2 +249 0x0080 //RX_FDDRC_BAND_MARGIN_3 +250 0x0007 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x5000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x6400 //RX_FDDRC_THRD_3_2 +258 0x6400 //RX_FDDRC_THRD_3_3 +259 0x2000 //RX_FDDRC_SLANT_0_0 +260 0x2000 //RX_FDDRC_SLANT_0_1 +261 0x2000 //RX_FDDRC_SLANT_0_2 +262 0x2000 //RX_FDDRC_SLANT_0_3 +263 0x5333 //RX_FDDRC_SLANT_1_0 +264 0x5333 //RX_FDDRC_SLANT_1_1 +265 0x5333 //RX_FDDRC_SLANT_1_2 +266 0x5333 //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +286 0x0100 //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 +#VOL 3 +163 0x1000 //RX_TDDRC_ALPHA_UP_1 +164 0x1000 //RX_TDDRC_ALPHA_UP_2 +165 0x1000 //RX_TDDRC_ALPHA_UP_3 +166 0x1000 //RX_TDDRC_ALPHA_UP_4 +184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +190 0x7000 //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +269 0x0000 //RX_TDDRC_THRD_0 +270 0x0000 //RX_TDDRC_THRD_1 +271 0x1800 //RX_TDDRC_THRD_2 +272 0x1800 //RX_TDDRC_THRD_3 +273 0x3000 //RX_TDDRC_SLANT_0 +274 0x6E00 //RX_TDDRC_SLANT_1 +275 0x1000 //RX_TDDRC_ALPHA_UP_0 +276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x199A //RX_TDDRC_HMNC_GAIN +279 0x0001 //RX_TDDRC_SMT_FLAG +280 0x0CCD //RX_TDDRC_SMT_W +281 0x0400 //RX_TDDRC_DRC_GAIN +195 0x0030 //RX_FDEQ_SUBNUM +196 0x4848 //RX_FDEQ_GAIN_0 +197 0x4848 //RX_FDEQ_GAIN_1 +198 0x4844 //RX_FDEQ_GAIN_2 +199 0x4A4C //RX_FDEQ_GAIN_3 +200 0x4E50 //RX_FDEQ_GAIN_4 +201 0x5254 //RX_FDEQ_GAIN_5 +202 0x5658 //RX_FDEQ_GAIN_6 +203 0x5A5C //RX_FDEQ_GAIN_7 +204 0x5C5C //RX_FDEQ_GAIN_8 +205 0x5C5C //RX_FDEQ_GAIN_9 +206 0x5C5C //RX_FDEQ_GAIN_10 +207 0x5C5C //RX_FDEQ_GAIN_11 +208 0x5C5C //RX_FDEQ_GAIN_12 +209 0x5C5C //RX_FDEQ_GAIN_13 +210 0x4848 //RX_FDEQ_GAIN_14 +211 0x4848 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0202 //RX_FDEQ_BIN_0 +221 0x0203 //RX_FDEQ_BIN_1 +222 0x0402 //RX_FDEQ_BIN_2 +223 0x0505 //RX_FDEQ_BIN_3 +224 0x0505 //RX_FDEQ_BIN_4 +225 0x0505 //RX_FDEQ_BIN_5 +226 0x0505 //RX_FDEQ_BIN_6 +227 0x0505 //RX_FDEQ_BIN_7 +228 0x160C //RX_FDEQ_BIN_8 +229 0x0D0E //RX_FDEQ_BIN_9 +230 0x0E0F //RX_FDEQ_BIN_10 +231 0x0F10 //RX_FDEQ_BIN_11 +232 0x1011 //RX_FDEQ_BIN_12 +233 0x1104 //RX_FDEQ_BIN_13 +234 0x0000 //RX_FDEQ_BIN_14 +235 0x0000 //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x4000 //RX_FDEQ_RESRV_0 +245 0x0320 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0030 //RX_FDDRC_BAND_MARGIN_1 +248 0x0050 //RX_FDDRC_BAND_MARGIN_2 +249 0x0080 //RX_FDDRC_BAND_MARGIN_3 +250 0x0007 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x5000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x6400 //RX_FDDRC_THRD_3_2 +258 0x6400 //RX_FDDRC_THRD_3_3 +259 0x2000 //RX_FDDRC_SLANT_0_0 +260 0x2000 //RX_FDDRC_SLANT_0_1 +261 0x2000 //RX_FDDRC_SLANT_0_2 +262 0x2000 //RX_FDDRC_SLANT_0_3 +263 0x5333 //RX_FDDRC_SLANT_1_0 +264 0x5333 //RX_FDDRC_SLANT_1_1 +265 0x5333 //RX_FDDRC_SLANT_1_2 +266 0x5333 //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +286 0x0100 //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 +#VOL 4 +163 0x1000 //RX_TDDRC_ALPHA_UP_1 +164 0x1000 //RX_TDDRC_ALPHA_UP_2 +165 0x1000 //RX_TDDRC_ALPHA_UP_3 +166 0x1000 //RX_TDDRC_ALPHA_UP_4 +184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +190 0x7000 //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +269 0x0000 //RX_TDDRC_THRD_0 +270 0x0000 //RX_TDDRC_THRD_1 +271 0x1800 //RX_TDDRC_THRD_2 +272 0x1800 //RX_TDDRC_THRD_3 +273 0x3000 //RX_TDDRC_SLANT_0 +274 0x6E00 //RX_TDDRC_SLANT_1 +275 0x1000 //RX_TDDRC_ALPHA_UP_0 +276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x199A //RX_TDDRC_HMNC_GAIN +279 0x0001 //RX_TDDRC_SMT_FLAG +280 0x0CCD //RX_TDDRC_SMT_W +281 0x0400 //RX_TDDRC_DRC_GAIN +195 0x0030 //RX_FDEQ_SUBNUM +196 0x4848 //RX_FDEQ_GAIN_0 +197 0x4848 //RX_FDEQ_GAIN_1 +198 0x4844 //RX_FDEQ_GAIN_2 +199 0x4A4C //RX_FDEQ_GAIN_3 +200 0x4E50 //RX_FDEQ_GAIN_4 +201 0x5254 //RX_FDEQ_GAIN_5 +202 0x5658 //RX_FDEQ_GAIN_6 +203 0x5A5C //RX_FDEQ_GAIN_7 +204 0x5C5C //RX_FDEQ_GAIN_8 +205 0x5C5C //RX_FDEQ_GAIN_9 +206 0x5C5C //RX_FDEQ_GAIN_10 +207 0x5C5C //RX_FDEQ_GAIN_11 +208 0x5C5C //RX_FDEQ_GAIN_12 +209 0x5C5C //RX_FDEQ_GAIN_13 +210 0x4848 //RX_FDEQ_GAIN_14 +211 0x4848 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0202 //RX_FDEQ_BIN_0 +221 0x0203 //RX_FDEQ_BIN_1 +222 0x0402 //RX_FDEQ_BIN_2 +223 0x0505 //RX_FDEQ_BIN_3 +224 0x0505 //RX_FDEQ_BIN_4 +225 0x0505 //RX_FDEQ_BIN_5 +226 0x0505 //RX_FDEQ_BIN_6 +227 0x0505 //RX_FDEQ_BIN_7 +228 0x160C //RX_FDEQ_BIN_8 +229 0x0D0E //RX_FDEQ_BIN_9 +230 0x0E0F //RX_FDEQ_BIN_10 +231 0x0F10 //RX_FDEQ_BIN_11 +232 0x1011 //RX_FDEQ_BIN_12 +233 0x1104 //RX_FDEQ_BIN_13 +234 0x0000 //RX_FDEQ_BIN_14 +235 0x0000 //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x4000 //RX_FDEQ_RESRV_0 +245 0x0320 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0030 //RX_FDDRC_BAND_MARGIN_1 +248 0x0050 //RX_FDDRC_BAND_MARGIN_2 +249 0x0080 //RX_FDDRC_BAND_MARGIN_3 +250 0x0007 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x5000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x6400 //RX_FDDRC_THRD_3_2 +258 0x6400 //RX_FDDRC_THRD_3_3 +259 0x2000 //RX_FDDRC_SLANT_0_0 +260 0x2000 //RX_FDDRC_SLANT_0_1 +261 0x2000 //RX_FDDRC_SLANT_0_2 +262 0x2000 //RX_FDDRC_SLANT_0_3 +263 0x5333 //RX_FDDRC_SLANT_1_0 +264 0x5333 //RX_FDDRC_SLANT_1_1 +265 0x5333 //RX_FDDRC_SLANT_1_2 +266 0x5333 //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +286 0x0100 //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 +#VOL 5 +163 0x1000 //RX_TDDRC_ALPHA_UP_1 +164 0x1000 //RX_TDDRC_ALPHA_UP_2 +165 0x1000 //RX_TDDRC_ALPHA_UP_3 +166 0x1000 //RX_TDDRC_ALPHA_UP_4 +184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +190 0x7000 //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +269 0x0000 //RX_TDDRC_THRD_0 +270 0x0000 //RX_TDDRC_THRD_1 +271 0x1800 //RX_TDDRC_THRD_2 +272 0x1800 //RX_TDDRC_THRD_3 +273 0x3000 //RX_TDDRC_SLANT_0 +274 0x6E00 //RX_TDDRC_SLANT_1 +275 0x1000 //RX_TDDRC_ALPHA_UP_0 +276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x199A //RX_TDDRC_HMNC_GAIN +279 0x0001 //RX_TDDRC_SMT_FLAG +280 0x0CCD //RX_TDDRC_SMT_W +281 0x0400 //RX_TDDRC_DRC_GAIN +195 0x0030 //RX_FDEQ_SUBNUM +196 0x4848 //RX_FDEQ_GAIN_0 +197 0x4848 //RX_FDEQ_GAIN_1 +198 0x4844 //RX_FDEQ_GAIN_2 +199 0x4A4C //RX_FDEQ_GAIN_3 +200 0x4E50 //RX_FDEQ_GAIN_4 +201 0x5254 //RX_FDEQ_GAIN_5 +202 0x5658 //RX_FDEQ_GAIN_6 +203 0x5A5C //RX_FDEQ_GAIN_7 +204 0x5C5C //RX_FDEQ_GAIN_8 +205 0x5C5C //RX_FDEQ_GAIN_9 +206 0x5C5C //RX_FDEQ_GAIN_10 +207 0x5C5C //RX_FDEQ_GAIN_11 +208 0x5C5C //RX_FDEQ_GAIN_12 +209 0x5C5C //RX_FDEQ_GAIN_13 +210 0x4848 //RX_FDEQ_GAIN_14 +211 0x4848 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0202 //RX_FDEQ_BIN_0 +221 0x0203 //RX_FDEQ_BIN_1 +222 0x0402 //RX_FDEQ_BIN_2 +223 0x0505 //RX_FDEQ_BIN_3 +224 0x0505 //RX_FDEQ_BIN_4 +225 0x0505 //RX_FDEQ_BIN_5 +226 0x0505 //RX_FDEQ_BIN_6 +227 0x0505 //RX_FDEQ_BIN_7 +228 0x160C //RX_FDEQ_BIN_8 +229 0x0D0E //RX_FDEQ_BIN_9 +230 0x0E0F //RX_FDEQ_BIN_10 +231 0x0F10 //RX_FDEQ_BIN_11 +232 0x1011 //RX_FDEQ_BIN_12 +233 0x1104 //RX_FDEQ_BIN_13 +234 0x0000 //RX_FDEQ_BIN_14 +235 0x0000 //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x4000 //RX_FDEQ_RESRV_0 +245 0x0320 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0030 //RX_FDDRC_BAND_MARGIN_1 +248 0x0050 //RX_FDDRC_BAND_MARGIN_2 +249 0x0080 //RX_FDDRC_BAND_MARGIN_3 +250 0x0007 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x5000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x6400 //RX_FDDRC_THRD_3_2 +258 0x6400 //RX_FDDRC_THRD_3_3 +259 0x2000 //RX_FDDRC_SLANT_0_0 +260 0x2000 //RX_FDDRC_SLANT_0_1 +261 0x2000 //RX_FDDRC_SLANT_0_2 +262 0x2000 //RX_FDDRC_SLANT_0_3 +263 0x5333 //RX_FDDRC_SLANT_1_0 +264 0x5333 //RX_FDDRC_SLANT_1_1 +265 0x5333 //RX_FDDRC_SLANT_1_2 +266 0x5333 //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +286 0x0100 //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 +#VOL 6 +163 0x1000 //RX_TDDRC_ALPHA_UP_1 +164 0x1000 //RX_TDDRC_ALPHA_UP_2 +165 0x1000 //RX_TDDRC_ALPHA_UP_3 +166 0x1000 //RX_TDDRC_ALPHA_UP_4 +184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +190 0x7000 //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +269 0x0000 //RX_TDDRC_THRD_0 +270 0x0000 //RX_TDDRC_THRD_1 +271 0x1800 //RX_TDDRC_THRD_2 +272 0x1800 //RX_TDDRC_THRD_3 +273 0x3000 //RX_TDDRC_SLANT_0 +274 0x6E00 //RX_TDDRC_SLANT_1 +275 0x1000 //RX_TDDRC_ALPHA_UP_0 +276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x199A //RX_TDDRC_HMNC_GAIN +279 0x0001 //RX_TDDRC_SMT_FLAG +280 0x0CCD //RX_TDDRC_SMT_W +281 0x0400 //RX_TDDRC_DRC_GAIN +195 0x0030 //RX_FDEQ_SUBNUM +196 0x4848 //RX_FDEQ_GAIN_0 +197 0x4848 //RX_FDEQ_GAIN_1 +198 0x4844 //RX_FDEQ_GAIN_2 +199 0x4A4C //RX_FDEQ_GAIN_3 +200 0x4E50 //RX_FDEQ_GAIN_4 +201 0x5254 //RX_FDEQ_GAIN_5 +202 0x5658 //RX_FDEQ_GAIN_6 +203 0x5A5C //RX_FDEQ_GAIN_7 +204 0x5C5C //RX_FDEQ_GAIN_8 +205 0x5C5C //RX_FDEQ_GAIN_9 +206 0x5C5C //RX_FDEQ_GAIN_10 +207 0x5C5C //RX_FDEQ_GAIN_11 +208 0x5C5C //RX_FDEQ_GAIN_12 +209 0x5C5C //RX_FDEQ_GAIN_13 +210 0x4848 //RX_FDEQ_GAIN_14 +211 0x4848 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0202 //RX_FDEQ_BIN_0 +221 0x0203 //RX_FDEQ_BIN_1 +222 0x0402 //RX_FDEQ_BIN_2 +223 0x0505 //RX_FDEQ_BIN_3 +224 0x0505 //RX_FDEQ_BIN_4 +225 0x0505 //RX_FDEQ_BIN_5 +226 0x0505 //RX_FDEQ_BIN_6 +227 0x0505 //RX_FDEQ_BIN_7 +228 0x160C //RX_FDEQ_BIN_8 +229 0x0D0E //RX_FDEQ_BIN_9 +230 0x0E0F //RX_FDEQ_BIN_10 +231 0x0F10 //RX_FDEQ_BIN_11 +232 0x1011 //RX_FDEQ_BIN_12 +233 0x1104 //RX_FDEQ_BIN_13 +234 0x0000 //RX_FDEQ_BIN_14 +235 0x0000 //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x4000 //RX_FDEQ_RESRV_0 +245 0x0320 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0030 //RX_FDDRC_BAND_MARGIN_1 +248 0x0050 //RX_FDDRC_BAND_MARGIN_2 +249 0x0080 //RX_FDDRC_BAND_MARGIN_3 +250 0x0007 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x5000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x6400 //RX_FDDRC_THRD_3_2 +258 0x6400 //RX_FDDRC_THRD_3_3 +259 0x2000 //RX_FDDRC_SLANT_0_0 +260 0x2000 //RX_FDDRC_SLANT_0_1 +261 0x2000 //RX_FDDRC_SLANT_0_2 +262 0x2000 //RX_FDDRC_SLANT_0_3 +263 0x5333 //RX_FDDRC_SLANT_1_0 +264 0x5333 //RX_FDDRC_SLANT_1_1 +265 0x5333 //RX_FDDRC_SLANT_1_2 +266 0x5333 //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +286 0x0100 //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 #CASE_NAME HANDSET-HANDSET_HAC-TMOBILE_US-SWB -#PARAM_TYPE TX+RX -#TOTAL_CUSTOM_STEP 7 +#PARAM_MODE Full +#PARAM_TYPE TX+2RX +#TOTAL_CUSTOM_STEP 7+7 #TX 0 0x0000 //TX_OPERATION_MODE_0 1 0x0000 //TX_OPERATION_MODE_1 -2 0x0026 //TX_PATCH_REG +2 0x0076 //TX_PATCH_REG 3 0x6F7E //TX_SENDFUNC_MODE_0 4 0x0001 //TX_SENDFUNC_MODE_1 5 0x0002 //TX_NUM_MIC @@ -29829,7 +45419,7 @@ 18 0x0000 //TX_SYS_RESRV_2 19 0x0000 //TX_SYS_RESRV_3 20 0x0000 //TX_DIST2REF0 -21 0x009D //TX_DIST2REF1 +21 0x009C //TX_DIST2REF1 22 0x0000 //TX_DIST2REF_02 23 0x0000 //TX_DIST2REF_03 24 0x0000 //TX_DIST2REF_04 @@ -30059,12 +45649,12 @@ 248 0xF800 //TX_THR_SN_EST_6 249 0xF700 //TX_THR_SN_EST_7 250 0x0000 //TX_DELTA_THR_SN_EST_0 -251 0x0100 //TX_DELTA_THR_SN_EST_1 +251 0x0200 //TX_DELTA_THR_SN_EST_1 252 0x0200 //TX_DELTA_THR_SN_EST_2 253 0x0200 //TX_DELTA_THR_SN_EST_3 -254 0x0200 //TX_DELTA_THR_SN_EST_4 -255 0x0100 //TX_DELTA_THR_SN_EST_5 -256 0x0200 //TX_DELTA_THR_SN_EST_6 +254 0x0100 //TX_DELTA_THR_SN_EST_4 +255 0x0200 //TX_DELTA_THR_SN_EST_5 +256 0x0100 //TX_DELTA_THR_SN_EST_6 257 0x0200 //TX_DELTA_THR_SN_EST_7 258 0x4000 //TX_LAMBDA_NN_EST_0 259 0x4000 //TX_LAMBDA_NN_EST_1 @@ -30090,18 +45680,18 @@ 279 0x1000 //TX_B_POST_FLT_0 280 0x1000 //TX_B_POST_FLT_1 281 0x0014 //TX_NS_LVL_CTRL_0 -282 0x0016 //TX_NS_LVL_CTRL_1 -283 0x002C //TX_NS_LVL_CTRL_2 -284 0x0016 //TX_NS_LVL_CTRL_3 -285 0x0018 //TX_NS_LVL_CTRL_4 -286 0x0016 //TX_NS_LVL_CTRL_5 -287 0x0012 //TX_NS_LVL_CTRL_6 +282 0x002C //TX_NS_LVL_CTRL_1 +283 0x0016 //TX_NS_LVL_CTRL_2 +284 0x0018 //TX_NS_LVL_CTRL_3 +285 0x0016 //TX_NS_LVL_CTRL_4 +286 0x0012 //TX_NS_LVL_CTRL_5 +287 0x0016 //TX_NS_LVL_CTRL_6 288 0x0017 //TX_NS_LVL_CTRL_7 289 0x000E //TX_MIN_GAIN_S_0 -290 0x0012 //TX_MIN_GAIN_S_1 -291 0x000D //TX_MIN_GAIN_S_2 -292 0x0012 //TX_MIN_GAIN_S_3 -293 0x0010 //TX_MIN_GAIN_S_4 +290 0x000D //TX_MIN_GAIN_S_1 +291 0x0012 //TX_MIN_GAIN_S_2 +292 0x0010 //TX_MIN_GAIN_S_3 +293 0x0012 //TX_MIN_GAIN_S_4 294 0x0012 //TX_MIN_GAIN_S_5 295 0x0012 //TX_MIN_GAIN_S_6 296 0x0012 //TX_MIN_GAIN_S_7 @@ -30123,29 +45713,29 @@ 312 0x7FFF //TX_A_POST_FILT_0 313 0x2000 //TX_A_POST_FILT_1 314 0x4000 //TX_A_POST_FILT_S_0 -315 0x5000 //TX_A_POST_FILT_S_1 +315 0x4000 //TX_A_POST_FILT_S_1 316 0x4000 //TX_A_POST_FILT_S_2 317 0x4000 //TX_A_POST_FILT_S_3 318 0x4000 //TX_A_POST_FILT_S_4 319 0x4000 //TX_A_POST_FILT_S_5 -320 0x4000 //TX_A_POST_FILT_S_6 +320 0x5000 //TX_A_POST_FILT_S_6 321 0x7000 //TX_A_POST_FILT_S_7 322 0x1000 //TX_B_POST_FILT_0 323 0x1000 //TX_B_POST_FILT_1 -324 0x3000 //TX_B_POST_FILT_2 -325 0x1000 //TX_B_POST_FILT_3 -326 0x5000 //TX_B_POST_FILT_4 -327 0x2000 //TX_B_POST_FILT_5 -328 0x6000 //TX_B_POST_FILT_6 +324 0x2000 //TX_B_POST_FILT_2 +325 0x2000 //TX_B_POST_FILT_3 +326 0x2000 //TX_B_POST_FILT_4 +327 0x1000 //TX_B_POST_FILT_5 +328 0x3000 //TX_B_POST_FILT_6 329 0x3000 //TX_B_POST_FILT_7 330 0x1000 //TX_B_LESSCUT_RTO_S_0 -331 0x6000 //TX_B_LESSCUT_RTO_S_1 -332 0x6000 //TX_B_LESSCUT_RTO_S_2 -333 0x6000 //TX_B_LESSCUT_RTO_S_3 -334 0x6000 //TX_B_LESSCUT_RTO_S_4 -335 0x6000 //TX_B_LESSCUT_RTO_S_5 -336 0x7FFF //TX_B_LESSCUT_RTO_S_6 -337 0x7FFF //TX_B_LESSCUT_RTO_S_7 +331 0x1000 //TX_B_LESSCUT_RTO_S_1 +332 0x1000 //TX_B_LESSCUT_RTO_S_2 +333 0x1000 //TX_B_LESSCUT_RTO_S_3 +334 0x1000 //TX_B_LESSCUT_RTO_S_4 +335 0x1000 //TX_B_LESSCUT_RTO_S_5 +336 0x1000 //TX_B_LESSCUT_RTO_S_6 +337 0x1000 //TX_B_LESSCUT_RTO_S_7 338 0x7E14 //TX_LAMBDA_PFILT 339 0x7C29 //TX_LAMBDA_PFILT_S_0 340 0x7C29 //TX_LAMBDA_PFILT_S_1 @@ -30188,10 +45778,10 @@ 377 0x4E20 //TX_NOISE_TH_5_4 378 0x1194 //TX_NOISE_TH_6 379 0x0014 //TX_MINENOISE_TH -380 0x4000 //TX_MINENOISE_MIC0_TH_MTS -381 0xFFEE //TX_MINENOISE_MIC0_TH_EXP -382 0x6000 //TX_MINENOISE_MIC0_S_TH_MTS -383 0xFFF3 //TX_MINENOISE_MIC0_S_TH_EXP +380 0xD508 //TX_MORENS_TFMASK_TH +381 0x0001 //TX_DRC_QUIET_FLOOR +382 0x6D60 //TX_RATIODTL_CUT_TH +383 0x0DAC //TX_DT_CUT_K1 384 0x00A5 //TX_OUT_ENER_S_TH_CLEAN 385 0x00A5 //TX_OUT_ENER_S_TH_LESSCLEAN 386 0x00A5 //TX_OUT_ENER_S_TH_NOISY @@ -30199,15 +45789,15 @@ 388 0x0200 //TX_OUT_ENER_TH_SPEECH 389 0x2000 //TX_SN_NPB_GAIN 390 0x0000 //TX_NN_NPB_GAIN -391 0x0000 //TX_CSX_ALPHA_0 -392 0x0000 //TX_CSX_ALPHA_1 -393 0x0000 //TX_CSX_ALPHA_2 -394 0x0000 //TX_CSX_ALPHA_3 -395 0x0800 //TX_MU_ARSP_EST -396 0x00C8 //TX_P_OUTBEAM_MIN_TH +391 0x3000 //TX_POST_MASK_SUP_HSNE +392 0x07D0 //TX_TAIL_DET_TH +393 0x4000 //TX_B_LESSCUT_RTO_WTA +394 0x0000 //TX_MEL_G_R +395 0x0080 //TX_SUPHIGH_TH +396 0x0000 //TX_MASK_G_R 397 0x0002 //TX_EXTRA_NS_L -398 0x0800 //TX_EXTRA_NS_A -399 0x0005 //TX_VR_NOISE_FLOOR_TH +398 0x1800 //TX_C_POST_FLT_MASK +399 0x7FFF //TX_A_POST_FLT_WNS 400 0x0148 //TX_MIN_G_LOW300HZ 401 0x0004 //TX_MAXLEVEL_CNG 402 0x00B4 //TX_STN_NOISE_TH @@ -30322,16 +45912,16 @@ 511 0x6666 //TX_MIC_TO_BFGAIN 512 0x0000 //TX_MICTOBFGAIN0 513 0x0000 //TX_FASTMUE_TH -514 0x0000 //TX_DERVB_LEN_0 -515 0x0000 //TX_DERVB_LEN_1 -516 0x0000 //TX_RHO_DERVB -517 0x0000 //TX_MIC_INDX_DERVB -518 0x0000 //TX_MU_DERVB -519 0x0000 //TX_DR_RESRV_0 -520 0x0000 //TX_DR_RESRV_1 -521 0x0000 //TX_DR_RESRV_2 -522 0x0000 //TX_DR_RESRV_3 -523 0x0000 //TX_DR_RESRV_4 +514 0x2CCC //TX_DEREVERB_LF_MU +515 0x3200 //TX_DEREVERB_HF_MU +516 0x0007 //TX_DEREVERB_DELAY +517 0x0004 //TX_DEREVERB_COEF_LEN +518 0x0003 //TX_DEREVERB_DNR +519 0x0000 //TX_DEREVERB_ALPHA +520 0x0000 //TX_DEREVERB_BETA +521 0x3A98 //TX_GSC_RTOL_TH +522 0x3A98 //TX_GSC_RTOH_TH +523 0x7E2C //TX_WIDE2_MEANHTH 524 0x0000 //TX_DR_RESRV_5 525 0x0000 //TX_DR_RESRV_6 526 0x0000 //TX_DR_RESRV_7 @@ -30378,19 +45968,19 @@ 567 0x5C54 //TX_FDEQ_GAIN_0 568 0x5048 //TX_FDEQ_GAIN_1 569 0x4C4C //TX_FDEQ_GAIN_2 -570 0x474F //TX_FDEQ_GAIN_3 -571 0x4842 //TX_FDEQ_GAIN_4 -572 0x4541 //TX_FDEQ_GAIN_5 -573 0x4247 //TX_FDEQ_GAIN_6 -574 0x4743 //TX_FDEQ_GAIN_7 -575 0x4445 //TX_FDEQ_GAIN_8 -576 0x4750 //TX_FDEQ_GAIN_9 -577 0x3F48 //TX_FDEQ_GAIN_10 -578 0x4844 //TX_FDEQ_GAIN_11 -579 0x3E48 //TX_FDEQ_GAIN_12 -580 0x4E4A //TX_FDEQ_GAIN_13 -581 0x5459 //TX_FDEQ_GAIN_14 -582 0x6448 //TX_FDEQ_GAIN_15 +570 0x474A //TX_FDEQ_GAIN_3 +571 0x4640 //TX_FDEQ_GAIN_4 +572 0x4446 //TX_FDEQ_GAIN_5 +573 0x4B53 //TX_FDEQ_GAIN_6 +574 0x5448 //TX_FDEQ_GAIN_7 +575 0x4243 //TX_FDEQ_GAIN_8 +576 0x434C //TX_FDEQ_GAIN_9 +577 0x484D //TX_FDEQ_GAIN_10 +578 0x4D4D //TX_FDEQ_GAIN_11 +579 0x4B4E //TX_FDEQ_GAIN_12 +580 0x5054 //TX_FDEQ_GAIN_13 +581 0x5D68 //TX_FDEQ_GAIN_14 +582 0x7C6B //TX_FDEQ_GAIN_15 583 0x4848 //TX_FDEQ_GAIN_16 584 0x4848 //TX_FDEQ_GAIN_17 585 0x4848 //TX_FDEQ_GAIN_18 @@ -30433,14 +46023,14 @@ 622 0x4848 //TX_PREEQ_GAIN_MIC0_5 623 0x4848 //TX_PREEQ_GAIN_MIC0_6 624 0x4848 //TX_PREEQ_GAIN_MIC0_7 -625 0x4646 //TX_PREEQ_GAIN_MIC0_8 -626 0x4545 //TX_PREEQ_GAIN_MIC0_9 -627 0x4545 //TX_PREEQ_GAIN_MIC0_10 -628 0x4544 //TX_PREEQ_GAIN_MIC0_11 -629 0x4444 //TX_PREEQ_GAIN_MIC0_12 -630 0x4343 //TX_PREEQ_GAIN_MIC0_13 -631 0x4241 //TX_PREEQ_GAIN_MIC0_14 -632 0x3C3E //TX_PREEQ_GAIN_MIC0_15 +625 0x4848 //TX_PREEQ_GAIN_MIC0_8 +626 0x4848 //TX_PREEQ_GAIN_MIC0_9 +627 0x4848 //TX_PREEQ_GAIN_MIC0_10 +628 0x4848 //TX_PREEQ_GAIN_MIC0_11 +629 0x4848 //TX_PREEQ_GAIN_MIC0_12 +630 0x4848 //TX_PREEQ_GAIN_MIC0_13 +631 0x4848 //TX_PREEQ_GAIN_MIC0_14 +632 0x4848 //TX_PREEQ_GAIN_MIC0_15 633 0x4848 //TX_PREEQ_GAIN_MIC0_16 634 0x4848 //TX_PREEQ_GAIN_MIC0_17 635 0x4848 //TX_PREEQ_GAIN_MIC0_18 @@ -30482,15 +46072,15 @@ 671 0x4848 //TX_PREEQ_GAIN_MIC1_5 672 0x4848 //TX_PREEQ_GAIN_MIC1_6 673 0x4848 //TX_PREEQ_GAIN_MIC1_7 -674 0x484A //TX_PREEQ_GAIN_MIC1_8 -675 0x4B4C //TX_PREEQ_GAIN_MIC1_9 -676 0x4B4A //TX_PREEQ_GAIN_MIC1_10 -677 0x4A48 //TX_PREEQ_GAIN_MIC1_11 -678 0x4C4C //TX_PREEQ_GAIN_MIC1_12 -679 0x4C4C //TX_PREEQ_GAIN_MIC1_13 -680 0x4848 //TX_PREEQ_GAIN_MIC1_14 -681 0x4848 //TX_PREEQ_GAIN_MIC1_15 -682 0x4848 //TX_PREEQ_GAIN_MIC1_16 +674 0x4848 //TX_PREEQ_GAIN_MIC1_8 +675 0x494A //TX_PREEQ_GAIN_MIC1_9 +676 0x4B4B //TX_PREEQ_GAIN_MIC1_10 +677 0x4B4B //TX_PREEQ_GAIN_MIC1_11 +678 0x4D4C //TX_PREEQ_GAIN_MIC1_12 +679 0x4A48 //TX_PREEQ_GAIN_MIC1_13 +680 0x4840 //TX_PREEQ_GAIN_MIC1_14 +681 0x3434 //TX_PREEQ_GAIN_MIC1_15 +682 0x3C48 //TX_PREEQ_GAIN_MIC1_16 683 0x4848 //TX_PREEQ_GAIN_MIC1_17 684 0x4848 //TX_PREEQ_GAIN_MIC1_18 685 0x4848 //TX_PREEQ_GAIN_MIC1_19 @@ -30504,17 +46094,17 @@ 693 0x0304 //TX_PREEQ_BIN_MIC1_3 694 0x0405 //TX_PREEQ_BIN_MIC1_4 695 0x0506 //TX_PREEQ_BIN_MIC1_5 -696 0x0708 //TX_PREEQ_BIN_MIC1_6 -697 0x090A //TX_PREEQ_BIN_MIC1_7 -698 0x0B0C //TX_PREEQ_BIN_MIC1_8 -699 0x0D0E //TX_PREEQ_BIN_MIC1_9 -700 0x0F10 //TX_PREEQ_BIN_MIC1_10 -701 0x1011 //TX_PREEQ_BIN_MIC1_11 -702 0x1112 //TX_PREEQ_BIN_MIC1_12 -703 0x120B //TX_PREEQ_BIN_MIC1_13 -704 0x0000 //TX_PREEQ_BIN_MIC1_14 -705 0x0000 //TX_PREEQ_BIN_MIC1_15 -706 0x0000 //TX_PREEQ_BIN_MIC1_16 +696 0x0808 //TX_PREEQ_BIN_MIC1_6 +697 0x0809 //TX_PREEQ_BIN_MIC1_7 +698 0x0A0A //TX_PREEQ_BIN_MIC1_8 +699 0x0C10 //TX_PREEQ_BIN_MIC1_9 +700 0x1013 //TX_PREEQ_BIN_MIC1_10 +701 0x1414 //TX_PREEQ_BIN_MIC1_11 +702 0x261E //TX_PREEQ_BIN_MIC1_12 +703 0x1E14 //TX_PREEQ_BIN_MIC1_13 +704 0x1414 //TX_PREEQ_BIN_MIC1_14 +705 0x2814 //TX_PREEQ_BIN_MIC1_15 +706 0x401E //TX_PREEQ_BIN_MIC1_16 707 0x0000 //TX_PREEQ_BIN_MIC1_17 708 0x0000 //TX_PREEQ_BIN_MIC1_18 709 0x0000 //TX_PREEQ_BIN_MIC1_19 @@ -30582,7 +46172,7 @@ 771 0x0046 //TX_MIC_PWR_BIAS_2 772 0x0046 //TX_MIC_PWR_BIAS_3 773 0x0000 //TX_GAIN_LIMIT_0 -774 0x0006 //TX_GAIN_LIMIT_1 +774 0x0005 //TX_GAIN_LIMIT_1 775 0x0000 //TX_GAIN_LIMIT_2 776 0x0000 //TX_GAIN_LIMIT_3 777 0x7F5B //TX_BVE_NOVAD0_ALPHADOWN @@ -30674,7 +46264,7 @@ 863 0x199A //TX_TDDRC_HMNC_GAIN 864 0x0000 //TX_TDDRC_SMT_FLAG 865 0x0CCD //TX_TDDRC_SMT_W -866 0x05F7 //TX_TDDRC_DRC_GAIN +866 0x0504 //TX_TDDRC_DRC_GAIN 867 0x7FFF //TX_TDDRC_LMT_THRD 868 0x0000 //TX_TDDRC_LMT_ALPHA 869 0x0000 //TX_TFMASKLTH @@ -30705,6 +46295,71 @@ 894 0xC000 //TX_FASTNS_SSA_THHFL 895 0xCCCC //TX_FASTNS_SSA_THLFH 896 0xD999 //TX_FASTNS_SSA_THHFH +897 0x2339 //TX_SENDFUNC_REG_MICMUTE +898 0x0021 //TX_SENDFUNC_REG_MICMUTE1 +899 0x02BC //TX_MICMUTE_RATIO_THR +900 0x0140 //TX_MICMUTE_AMP_THR +901 0x0004 //TX_MICMUTE_HPF_IND +902 0x00C0 //TX_MICMUTE_LOG_EYR_TH +903 0x0008 //TX_MICMUTE_CVG_TIME +904 0x0008 //TX_MICMUTE_RELEASE_TIME +905 0x01FE //TX_MIC_VOLUME_MIC0MUTE +906 0x0020 //TX_MICMUTE_EPD_OFFSET_0 +907 0x001E //TX_MICMUTE_FRQ_AEC_L +908 0x7999 //TX_MICMUTE_EAD_THR +909 0x7FFF //TX_MICMUTE_LAMBDA_CB_NLE +910 0x7FFF //TX_MICMUTE_LAMBDA_RE_EST +911 0x4000 //TX_DTD_THR1_MICMUTE_0 +912 0x7000 //TX_DTD_THR1_MICMUTE_1 +913 0x7FFF //TX_DTD_THR1_MICMUTE_2 +914 0x7FFF //TX_DTD_THR1_MICMUTE_3 +915 0x6CCC //TX_DTD_THR2_MICMUTE_0 +916 0x0400 //TX_MICMUTE_MIN_EQ_RE_EST_0 +917 0x0400 //TX_MICMUTE_MIN_EQ_RE_EST_1 +918 0x1000 //TX_MICMUTE_MIN_EQ_RE_EST_2 +919 0x7FFF //TX_MICMUTE_MIN_EQ_RE_EST_3 +920 0x7FFF //TX_MICMUTE_MIN_EQ_RE_EST_4 +921 0x4000 //TX_MICMUTE_C_POST_FLT +922 0x03E8 //TX_MICMUTE_DT_CUT_K +923 0x0001 //TX_MICMUTE_DT_CUT_THR +924 0x03E8 //TX_MICMUTE_DT_CUT_K2 +925 0x0001 //TX_MICMUTE_DT_CUT_THR2 +926 0x0064 //TX_MICMUTE_DT2_HOLD_N +927 0x1000 //TX_MICMUTE_RATIODTH_THCUT +928 0x1000 //TX_MICMUTE_B_POST_FLT_ECHOL +929 0x7FFF //TX_MICMUTE_B_POST_FLT_ECHOH +930 0x0400 //TX_MICMUTE_C_POST_FLT_MASK +931 0x7999 //TX_MICMUTE_RATIODTL_CUT_TH +932 0x0258 //TX_MICMUTE_DT_CUT_K1 +933 0x0800 //TX_MICMUTE_N2_SN_EST +934 0xFC00 //TX_MICMUTE_THR_SN_EST_0 +935 0x001C //TX_MICMUTE_MIN_G_CTRL_0 +936 0x6000 //TX_MICMUTE_A_POST_FILT_S_0 +937 0x7000 //TX_MICMUTE_B_POST_FILT_0 +938 0x2710 //TX_MIC1RUB_AMP_THR +939 0x0010 //TX_MIC1MUTE_RATIO_THR +940 0x0450 //TX_MIC1MUTE_AMP_THR +941 0x0008 //TX_MIC1MUTE_CVG_TIME +942 0x0008 //TX_MIC1MUTE_RELEASE_TIME +943 0x0000 //TX_AMS_RESRV_01 +944 0x0000 //TX_AMS_RESRV_02 +945 0x0000 //TX_AMS_RESRV_03 +946 0x0000 //TX_AMS_RESRV_04 +947 0x0000 //TX_AMS_RESRV_05 +948 0x0000 //TX_AMS_RESRV_06 +949 0x0000 //TX_AMS_RESRV_07 +950 0x0000 //TX_AMS_RESRV_08 +951 0x0000 //TX_AMS_RESRV_09 +952 0x0000 //TX_AMS_RESRV_10 +953 0x0000 //TX_AMS_RESRV_11 +954 0x0000 //TX_AMS_RESRV_12 +955 0x0000 //TX_AMS_RESRV_13 +956 0x0000 //TX_AMS_RESRV_14 +957 0x0000 //TX_AMS_RESRV_15 +958 0x0000 //TX_AMS_RESRV_16 +959 0x0000 //TX_AMS_RESRV_17 +960 0x0000 //TX_AMS_RESRV_18 +961 0x0000 //TX_AMS_RESRV_19 #RX 0 0x000C //RX_RECVFUNC_MODE_0 1 0x0000 //RX_RECVFUNC_MODE_1 @@ -31556,10 +47211,862 @@ 110 0x0000 //RX_FDDRC_RESRV_0 129 0x0100 //RX_SPK_VOL 130 0x0000 //RX_VOL_RESRV_0 +#RX 2 +157 0x000C //RX_RECVFUNC_MODE_0 +158 0x0000 //RX_RECVFUNC_MODE_1 +159 0x0003 //RX_SAMPLINGFREQ_SIG +160 0x0003 //RX_SAMPLINGFREQ_PROC +161 0x000A //RX_FRAME_SZ +162 0x0000 //RX_DELAY_OPT +163 0x1000 //RX_TDDRC_ALPHA_UP_1 +164 0x1000 //RX_TDDRC_ALPHA_UP_2 +165 0x1000 //RX_TDDRC_ALPHA_UP_3 +166 0x1000 //RX_TDDRC_ALPHA_UP_4 +167 0x0800 //RX_PGA +168 0x7FFF //RX_A_HP +169 0x4000 //RX_B_PE +170 0x5800 //RX_THR_PITCH_DET_0 +171 0x5000 //RX_THR_PITCH_DET_1 +172 0x4000 //RX_THR_PITCH_DET_2 +173 0x0008 //RX_PITCH_BFR_LEN +174 0x0003 //RX_SBD_PITCH_DET +175 0x0100 //RX_PP_RESRV_0 +176 0x0020 //RX_PP_RESRV_1 +177 0x0600 //RX_N_SN_EST +178 0x000C //RX_N2_SN_EST +179 0x000F //RX_NS_LVL_CTRL +180 0xF800 //RX_THR_SN_EST +181 0x7E00 //RX_LAMBDA_PFILT +182 0x000A //RX_FENS_RESRV_0 +183 0x0190 //RX_FENS_RESRV_1 +184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +187 0x0002 //RX_EXTRA_NS_L +188 0x0800 //RX_EXTRA_NS_A +189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +190 0x7000 //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +192 0x199A //RX_A_POST_FLT +193 0x0000 //RX_LMT_THRD +194 0x4000 //RX_LMT_ALPHA +195 0x0030 //RX_FDEQ_SUBNUM +196 0x4848 //RX_FDEQ_GAIN_0 +197 0x4848 //RX_FDEQ_GAIN_1 +198 0x4844 //RX_FDEQ_GAIN_2 +199 0x4B4D //RX_FDEQ_GAIN_3 +200 0x4E50 //RX_FDEQ_GAIN_4 +201 0x5254 //RX_FDEQ_GAIN_5 +202 0x5658 //RX_FDEQ_GAIN_6 +203 0x5C60 //RX_FDEQ_GAIN_7 +204 0x6468 //RX_FDEQ_GAIN_8 +205 0x6C70 //RX_FDEQ_GAIN_9 +206 0x7474 //RX_FDEQ_GAIN_10 +207 0x7474 //RX_FDEQ_GAIN_11 +208 0x7474 //RX_FDEQ_GAIN_12 +209 0x7474 //RX_FDEQ_GAIN_13 +210 0x7474 //RX_FDEQ_GAIN_14 +211 0x7474 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0202 //RX_FDEQ_BIN_0 +221 0x0203 //RX_FDEQ_BIN_1 +222 0x0402 //RX_FDEQ_BIN_2 +223 0x0304 //RX_FDEQ_BIN_3 +224 0x0405 //RX_FDEQ_BIN_4 +225 0x0506 //RX_FDEQ_BIN_5 +226 0x0708 //RX_FDEQ_BIN_6 +227 0x090A //RX_FDEQ_BIN_7 +228 0x0B0C //RX_FDEQ_BIN_8 +229 0x0D0E //RX_FDEQ_BIN_9 +230 0x1214 //RX_FDEQ_BIN_10 +231 0x1E1E //RX_FDEQ_BIN_11 +232 0x1E1E //RX_FDEQ_BIN_12 +233 0x1E1E //RX_FDEQ_BIN_13 +234 0x1E1E //RX_FDEQ_BIN_14 +235 0x202C //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x4000 //RX_FDEQ_RESRV_0 +245 0x0320 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0030 //RX_FDDRC_BAND_MARGIN_1 +248 0x0050 //RX_FDDRC_BAND_MARGIN_2 +249 0x0080 //RX_FDDRC_BAND_MARGIN_3 +250 0x0007 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x5000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x6400 //RX_FDDRC_THRD_3_2 +258 0x6400 //RX_FDDRC_THRD_3_3 +259 0x2000 //RX_FDDRC_SLANT_0_0 +260 0x2000 //RX_FDDRC_SLANT_0_1 +261 0x2000 //RX_FDDRC_SLANT_0_2 +262 0x2000 //RX_FDDRC_SLANT_0_3 +263 0x5333 //RX_FDDRC_SLANT_1_0 +264 0x5333 //RX_FDDRC_SLANT_1_1 +265 0x5333 //RX_FDDRC_SLANT_1_2 +266 0x5333 //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +268 0x0002 //RX_FILTINDX +269 0x0000 //RX_TDDRC_THRD_0 +270 0x0000 //RX_TDDRC_THRD_1 +271 0x1800 //RX_TDDRC_THRD_2 +272 0x1800 //RX_TDDRC_THRD_3 +273 0x3000 //RX_TDDRC_SLANT_0 +274 0x6E00 //RX_TDDRC_SLANT_1 +275 0x1000 //RX_TDDRC_ALPHA_UP_0 +276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x199A //RX_TDDRC_HMNC_GAIN +279 0x0001 //RX_TDDRC_SMT_FLAG +280 0x0CCD //RX_TDDRC_SMT_W +281 0x01E0 //RX_TDDRC_DRC_GAIN +282 0x7C00 //RX_LAMBDA_PKA_FP +283 0x2000 //RX_TPKA_FP +284 0x2000 //RX_MIN_G_FP +285 0x0080 //RX_MAX_G_FP +286 0x0100 //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 +288 0x0000 //RX_MAXLEVEL_CNG +289 0x3000 //RX_BWE_UV_TH +290 0x3000 //RX_BWE_UV_TH2 +291 0x1800 //RX_BWE_UV_TH3 +292 0x1000 //RX_BWE_V_TH +293 0x04CD //RX_BWE_GAIN1_V_TH1 +294 0x0F33 //RX_BWE_GAIN1_V_TH2 +295 0x7333 //RX_BWE_UV_EQ +296 0x199A //RX_BWE_V_EQ +297 0x7333 //RX_BWE_TONE_TH +298 0x0004 //RX_BWE_UV_HOLD_T +299 0x6CCD //RX_BWE_GAIN2_ALPHA +300 0x799A //RX_BWE_GAIN3_ALPHA +301 0x001E //RX_BWE_CUTOFF +302 0x3000 //RX_BWE_GAINFILL +303 0x3200 //RX_BWE_MAXTH_TONE +304 0x2000 //RX_BWE_EQ_0 +305 0x2000 //RX_BWE_EQ_1 +306 0x2000 //RX_BWE_EQ_2 +307 0x2000 //RX_BWE_EQ_3 +308 0x2000 //RX_BWE_EQ_4 +309 0x2000 //RX_BWE_EQ_5 +310 0x2000 //RX_BWE_EQ_6 +311 0x0000 //RX_BWE_RESRV_0 +312 0x0000 //RX_BWE_RESRV_1 +313 0x0000 //RX_BWE_RESRV_2 +#VOL 0 +163 0x1000 //RX_TDDRC_ALPHA_UP_1 +164 0x1000 //RX_TDDRC_ALPHA_UP_2 +165 0x1000 //RX_TDDRC_ALPHA_UP_3 +166 0x1000 //RX_TDDRC_ALPHA_UP_4 +184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +190 0x7000 //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +269 0x0000 //RX_TDDRC_THRD_0 +270 0x0000 //RX_TDDRC_THRD_1 +271 0x1800 //RX_TDDRC_THRD_2 +272 0x1800 //RX_TDDRC_THRD_3 +273 0x3000 //RX_TDDRC_SLANT_0 +274 0x6E00 //RX_TDDRC_SLANT_1 +275 0x1000 //RX_TDDRC_ALPHA_UP_0 +276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x199A //RX_TDDRC_HMNC_GAIN +279 0x0001 //RX_TDDRC_SMT_FLAG +280 0x0CCD //RX_TDDRC_SMT_W +281 0x01E0 //RX_TDDRC_DRC_GAIN +195 0x0030 //RX_FDEQ_SUBNUM +196 0x4848 //RX_FDEQ_GAIN_0 +197 0x4848 //RX_FDEQ_GAIN_1 +198 0x4844 //RX_FDEQ_GAIN_2 +199 0x4B4D //RX_FDEQ_GAIN_3 +200 0x4E50 //RX_FDEQ_GAIN_4 +201 0x5254 //RX_FDEQ_GAIN_5 +202 0x5658 //RX_FDEQ_GAIN_6 +203 0x5C60 //RX_FDEQ_GAIN_7 +204 0x6468 //RX_FDEQ_GAIN_8 +205 0x6C70 //RX_FDEQ_GAIN_9 +206 0x7474 //RX_FDEQ_GAIN_10 +207 0x7474 //RX_FDEQ_GAIN_11 +208 0x7474 //RX_FDEQ_GAIN_12 +209 0x7474 //RX_FDEQ_GAIN_13 +210 0x7474 //RX_FDEQ_GAIN_14 +211 0x7474 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0202 //RX_FDEQ_BIN_0 +221 0x0203 //RX_FDEQ_BIN_1 +222 0x0402 //RX_FDEQ_BIN_2 +223 0x0304 //RX_FDEQ_BIN_3 +224 0x0405 //RX_FDEQ_BIN_4 +225 0x0506 //RX_FDEQ_BIN_5 +226 0x0708 //RX_FDEQ_BIN_6 +227 0x090A //RX_FDEQ_BIN_7 +228 0x0B0C //RX_FDEQ_BIN_8 +229 0x0D0E //RX_FDEQ_BIN_9 +230 0x1214 //RX_FDEQ_BIN_10 +231 0x1E1E //RX_FDEQ_BIN_11 +232 0x1E1E //RX_FDEQ_BIN_12 +233 0x1E1E //RX_FDEQ_BIN_13 +234 0x1E1E //RX_FDEQ_BIN_14 +235 0x202C //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x4000 //RX_FDEQ_RESRV_0 +245 0x0320 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0030 //RX_FDDRC_BAND_MARGIN_1 +248 0x0050 //RX_FDDRC_BAND_MARGIN_2 +249 0x0080 //RX_FDDRC_BAND_MARGIN_3 +250 0x0007 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x5000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x6400 //RX_FDDRC_THRD_3_2 +258 0x6400 //RX_FDDRC_THRD_3_3 +259 0x2000 //RX_FDDRC_SLANT_0_0 +260 0x2000 //RX_FDDRC_SLANT_0_1 +261 0x2000 //RX_FDDRC_SLANT_0_2 +262 0x2000 //RX_FDDRC_SLANT_0_3 +263 0x5333 //RX_FDDRC_SLANT_1_0 +264 0x5333 //RX_FDDRC_SLANT_1_1 +265 0x5333 //RX_FDDRC_SLANT_1_2 +266 0x5333 //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +286 0x0100 //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 +#VOL 1 +163 0x1000 //RX_TDDRC_ALPHA_UP_1 +164 0x1000 //RX_TDDRC_ALPHA_UP_2 +165 0x1000 //RX_TDDRC_ALPHA_UP_3 +166 0x1000 //RX_TDDRC_ALPHA_UP_4 +184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +190 0x7000 //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +269 0x0000 //RX_TDDRC_THRD_0 +270 0x0000 //RX_TDDRC_THRD_1 +271 0x1800 //RX_TDDRC_THRD_2 +272 0x1800 //RX_TDDRC_THRD_3 +273 0x3000 //RX_TDDRC_SLANT_0 +274 0x6E00 //RX_TDDRC_SLANT_1 +275 0x1000 //RX_TDDRC_ALPHA_UP_0 +276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x199A //RX_TDDRC_HMNC_GAIN +279 0x0001 //RX_TDDRC_SMT_FLAG +280 0x0CCD //RX_TDDRC_SMT_W +281 0x01E0 //RX_TDDRC_DRC_GAIN +195 0x0030 //RX_FDEQ_SUBNUM +196 0x4848 //RX_FDEQ_GAIN_0 +197 0x4848 //RX_FDEQ_GAIN_1 +198 0x4844 //RX_FDEQ_GAIN_2 +199 0x4B4D //RX_FDEQ_GAIN_3 +200 0x4E50 //RX_FDEQ_GAIN_4 +201 0x5254 //RX_FDEQ_GAIN_5 +202 0x5658 //RX_FDEQ_GAIN_6 +203 0x5C60 //RX_FDEQ_GAIN_7 +204 0x6468 //RX_FDEQ_GAIN_8 +205 0x6C70 //RX_FDEQ_GAIN_9 +206 0x7474 //RX_FDEQ_GAIN_10 +207 0x7474 //RX_FDEQ_GAIN_11 +208 0x7474 //RX_FDEQ_GAIN_12 +209 0x7474 //RX_FDEQ_GAIN_13 +210 0x7474 //RX_FDEQ_GAIN_14 +211 0x7474 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0202 //RX_FDEQ_BIN_0 +221 0x0203 //RX_FDEQ_BIN_1 +222 0x0402 //RX_FDEQ_BIN_2 +223 0x0304 //RX_FDEQ_BIN_3 +224 0x0405 //RX_FDEQ_BIN_4 +225 0x0506 //RX_FDEQ_BIN_5 +226 0x0708 //RX_FDEQ_BIN_6 +227 0x090A //RX_FDEQ_BIN_7 +228 0x0B0C //RX_FDEQ_BIN_8 +229 0x0D0E //RX_FDEQ_BIN_9 +230 0x1214 //RX_FDEQ_BIN_10 +231 0x1E1E //RX_FDEQ_BIN_11 +232 0x1E1E //RX_FDEQ_BIN_12 +233 0x1E1E //RX_FDEQ_BIN_13 +234 0x1E1E //RX_FDEQ_BIN_14 +235 0x202C //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x4000 //RX_FDEQ_RESRV_0 +245 0x0320 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0030 //RX_FDDRC_BAND_MARGIN_1 +248 0x0050 //RX_FDDRC_BAND_MARGIN_2 +249 0x0080 //RX_FDDRC_BAND_MARGIN_3 +250 0x0007 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x5000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x6400 //RX_FDDRC_THRD_3_2 +258 0x6400 //RX_FDDRC_THRD_3_3 +259 0x2000 //RX_FDDRC_SLANT_0_0 +260 0x2000 //RX_FDDRC_SLANT_0_1 +261 0x2000 //RX_FDDRC_SLANT_0_2 +262 0x2000 //RX_FDDRC_SLANT_0_3 +263 0x5333 //RX_FDDRC_SLANT_1_0 +264 0x5333 //RX_FDDRC_SLANT_1_1 +265 0x5333 //RX_FDDRC_SLANT_1_2 +266 0x5333 //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +286 0x0100 //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 +#VOL 2 +163 0x1000 //RX_TDDRC_ALPHA_UP_1 +164 0x1000 //RX_TDDRC_ALPHA_UP_2 +165 0x1000 //RX_TDDRC_ALPHA_UP_3 +166 0x1000 //RX_TDDRC_ALPHA_UP_4 +184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +190 0x7000 //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +269 0x0000 //RX_TDDRC_THRD_0 +270 0x0000 //RX_TDDRC_THRD_1 +271 0x1800 //RX_TDDRC_THRD_2 +272 0x1800 //RX_TDDRC_THRD_3 +273 0x3000 //RX_TDDRC_SLANT_0 +274 0x6E00 //RX_TDDRC_SLANT_1 +275 0x1000 //RX_TDDRC_ALPHA_UP_0 +276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x199A //RX_TDDRC_HMNC_GAIN +279 0x0001 //RX_TDDRC_SMT_FLAG +280 0x0CCD //RX_TDDRC_SMT_W +281 0x01E0 //RX_TDDRC_DRC_GAIN +195 0x0030 //RX_FDEQ_SUBNUM +196 0x4848 //RX_FDEQ_GAIN_0 +197 0x4848 //RX_FDEQ_GAIN_1 +198 0x4844 //RX_FDEQ_GAIN_2 +199 0x4B4D //RX_FDEQ_GAIN_3 +200 0x4E50 //RX_FDEQ_GAIN_4 +201 0x5254 //RX_FDEQ_GAIN_5 +202 0x5658 //RX_FDEQ_GAIN_6 +203 0x5C60 //RX_FDEQ_GAIN_7 +204 0x6468 //RX_FDEQ_GAIN_8 +205 0x6C70 //RX_FDEQ_GAIN_9 +206 0x7474 //RX_FDEQ_GAIN_10 +207 0x7474 //RX_FDEQ_GAIN_11 +208 0x7474 //RX_FDEQ_GAIN_12 +209 0x7474 //RX_FDEQ_GAIN_13 +210 0x7474 //RX_FDEQ_GAIN_14 +211 0x7474 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0202 //RX_FDEQ_BIN_0 +221 0x0203 //RX_FDEQ_BIN_1 +222 0x0402 //RX_FDEQ_BIN_2 +223 0x0304 //RX_FDEQ_BIN_3 +224 0x0405 //RX_FDEQ_BIN_4 +225 0x0506 //RX_FDEQ_BIN_5 +226 0x0708 //RX_FDEQ_BIN_6 +227 0x090A //RX_FDEQ_BIN_7 +228 0x0B0C //RX_FDEQ_BIN_8 +229 0x0D0E //RX_FDEQ_BIN_9 +230 0x1214 //RX_FDEQ_BIN_10 +231 0x1E1E //RX_FDEQ_BIN_11 +232 0x1E1E //RX_FDEQ_BIN_12 +233 0x1E1E //RX_FDEQ_BIN_13 +234 0x1E1E //RX_FDEQ_BIN_14 +235 0x202C //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x4000 //RX_FDEQ_RESRV_0 +245 0x0320 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0030 //RX_FDDRC_BAND_MARGIN_1 +248 0x0050 //RX_FDDRC_BAND_MARGIN_2 +249 0x0080 //RX_FDDRC_BAND_MARGIN_3 +250 0x0007 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x5000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x6400 //RX_FDDRC_THRD_3_2 +258 0x6400 //RX_FDDRC_THRD_3_3 +259 0x2000 //RX_FDDRC_SLANT_0_0 +260 0x2000 //RX_FDDRC_SLANT_0_1 +261 0x2000 //RX_FDDRC_SLANT_0_2 +262 0x2000 //RX_FDDRC_SLANT_0_3 +263 0x5333 //RX_FDDRC_SLANT_1_0 +264 0x5333 //RX_FDDRC_SLANT_1_1 +265 0x5333 //RX_FDDRC_SLANT_1_2 +266 0x5333 //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +286 0x0100 //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 +#VOL 3 +163 0x1000 //RX_TDDRC_ALPHA_UP_1 +164 0x1000 //RX_TDDRC_ALPHA_UP_2 +165 0x1000 //RX_TDDRC_ALPHA_UP_3 +166 0x1000 //RX_TDDRC_ALPHA_UP_4 +184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +190 0x7000 //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +269 0x0000 //RX_TDDRC_THRD_0 +270 0x0000 //RX_TDDRC_THRD_1 +271 0x1800 //RX_TDDRC_THRD_2 +272 0x1800 //RX_TDDRC_THRD_3 +273 0x3000 //RX_TDDRC_SLANT_0 +274 0x6E00 //RX_TDDRC_SLANT_1 +275 0x1000 //RX_TDDRC_ALPHA_UP_0 +276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x199A //RX_TDDRC_HMNC_GAIN +279 0x0001 //RX_TDDRC_SMT_FLAG +280 0x0CCD //RX_TDDRC_SMT_W +281 0x01E0 //RX_TDDRC_DRC_GAIN +195 0x0030 //RX_FDEQ_SUBNUM +196 0x4848 //RX_FDEQ_GAIN_0 +197 0x4848 //RX_FDEQ_GAIN_1 +198 0x4844 //RX_FDEQ_GAIN_2 +199 0x4B4D //RX_FDEQ_GAIN_3 +200 0x4E50 //RX_FDEQ_GAIN_4 +201 0x5254 //RX_FDEQ_GAIN_5 +202 0x5658 //RX_FDEQ_GAIN_6 +203 0x5C60 //RX_FDEQ_GAIN_7 +204 0x6468 //RX_FDEQ_GAIN_8 +205 0x6C70 //RX_FDEQ_GAIN_9 +206 0x7474 //RX_FDEQ_GAIN_10 +207 0x7474 //RX_FDEQ_GAIN_11 +208 0x7474 //RX_FDEQ_GAIN_12 +209 0x7474 //RX_FDEQ_GAIN_13 +210 0x7474 //RX_FDEQ_GAIN_14 +211 0x7474 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0202 //RX_FDEQ_BIN_0 +221 0x0203 //RX_FDEQ_BIN_1 +222 0x0402 //RX_FDEQ_BIN_2 +223 0x0304 //RX_FDEQ_BIN_3 +224 0x0405 //RX_FDEQ_BIN_4 +225 0x0506 //RX_FDEQ_BIN_5 +226 0x0708 //RX_FDEQ_BIN_6 +227 0x090A //RX_FDEQ_BIN_7 +228 0x0B0C //RX_FDEQ_BIN_8 +229 0x0D0E //RX_FDEQ_BIN_9 +230 0x1214 //RX_FDEQ_BIN_10 +231 0x1E1E //RX_FDEQ_BIN_11 +232 0x1E1E //RX_FDEQ_BIN_12 +233 0x1E1E //RX_FDEQ_BIN_13 +234 0x1E1E //RX_FDEQ_BIN_14 +235 0x202C //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x4000 //RX_FDEQ_RESRV_0 +245 0x0320 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0030 //RX_FDDRC_BAND_MARGIN_1 +248 0x0050 //RX_FDDRC_BAND_MARGIN_2 +249 0x0080 //RX_FDDRC_BAND_MARGIN_3 +250 0x0007 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x5000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x6400 //RX_FDDRC_THRD_3_2 +258 0x6400 //RX_FDDRC_THRD_3_3 +259 0x2000 //RX_FDDRC_SLANT_0_0 +260 0x2000 //RX_FDDRC_SLANT_0_1 +261 0x2000 //RX_FDDRC_SLANT_0_2 +262 0x2000 //RX_FDDRC_SLANT_0_3 +263 0x5333 //RX_FDDRC_SLANT_1_0 +264 0x5333 //RX_FDDRC_SLANT_1_1 +265 0x5333 //RX_FDDRC_SLANT_1_2 +266 0x5333 //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +286 0x0100 //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 +#VOL 4 +163 0x1000 //RX_TDDRC_ALPHA_UP_1 +164 0x1000 //RX_TDDRC_ALPHA_UP_2 +165 0x1000 //RX_TDDRC_ALPHA_UP_3 +166 0x1000 //RX_TDDRC_ALPHA_UP_4 +184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +190 0x7000 //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +269 0x0000 //RX_TDDRC_THRD_0 +270 0x0000 //RX_TDDRC_THRD_1 +271 0x1800 //RX_TDDRC_THRD_2 +272 0x1800 //RX_TDDRC_THRD_3 +273 0x3000 //RX_TDDRC_SLANT_0 +274 0x6E00 //RX_TDDRC_SLANT_1 +275 0x1000 //RX_TDDRC_ALPHA_UP_0 +276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x199A //RX_TDDRC_HMNC_GAIN +279 0x0001 //RX_TDDRC_SMT_FLAG +280 0x0CCD //RX_TDDRC_SMT_W +281 0x01E0 //RX_TDDRC_DRC_GAIN +195 0x0030 //RX_FDEQ_SUBNUM +196 0x4848 //RX_FDEQ_GAIN_0 +197 0x4848 //RX_FDEQ_GAIN_1 +198 0x4844 //RX_FDEQ_GAIN_2 +199 0x4B4D //RX_FDEQ_GAIN_3 +200 0x4E50 //RX_FDEQ_GAIN_4 +201 0x5254 //RX_FDEQ_GAIN_5 +202 0x5658 //RX_FDEQ_GAIN_6 +203 0x5C60 //RX_FDEQ_GAIN_7 +204 0x6468 //RX_FDEQ_GAIN_8 +205 0x6C70 //RX_FDEQ_GAIN_9 +206 0x7474 //RX_FDEQ_GAIN_10 +207 0x7474 //RX_FDEQ_GAIN_11 +208 0x7474 //RX_FDEQ_GAIN_12 +209 0x7474 //RX_FDEQ_GAIN_13 +210 0x7474 //RX_FDEQ_GAIN_14 +211 0x7474 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0202 //RX_FDEQ_BIN_0 +221 0x0203 //RX_FDEQ_BIN_1 +222 0x0402 //RX_FDEQ_BIN_2 +223 0x0304 //RX_FDEQ_BIN_3 +224 0x0405 //RX_FDEQ_BIN_4 +225 0x0506 //RX_FDEQ_BIN_5 +226 0x0708 //RX_FDEQ_BIN_6 +227 0x090A //RX_FDEQ_BIN_7 +228 0x0B0C //RX_FDEQ_BIN_8 +229 0x0D0E //RX_FDEQ_BIN_9 +230 0x1214 //RX_FDEQ_BIN_10 +231 0x1E1E //RX_FDEQ_BIN_11 +232 0x1E1E //RX_FDEQ_BIN_12 +233 0x1E1E //RX_FDEQ_BIN_13 +234 0x1E1E //RX_FDEQ_BIN_14 +235 0x202C //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x4000 //RX_FDEQ_RESRV_0 +245 0x0320 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0030 //RX_FDDRC_BAND_MARGIN_1 +248 0x0050 //RX_FDDRC_BAND_MARGIN_2 +249 0x0080 //RX_FDDRC_BAND_MARGIN_3 +250 0x0007 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x5000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x6400 //RX_FDDRC_THRD_3_2 +258 0x6400 //RX_FDDRC_THRD_3_3 +259 0x2000 //RX_FDDRC_SLANT_0_0 +260 0x2000 //RX_FDDRC_SLANT_0_1 +261 0x2000 //RX_FDDRC_SLANT_0_2 +262 0x2000 //RX_FDDRC_SLANT_0_3 +263 0x5333 //RX_FDDRC_SLANT_1_0 +264 0x5333 //RX_FDDRC_SLANT_1_1 +265 0x5333 //RX_FDDRC_SLANT_1_2 +266 0x5333 //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +286 0x0100 //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 +#VOL 5 +163 0x1000 //RX_TDDRC_ALPHA_UP_1 +164 0x1000 //RX_TDDRC_ALPHA_UP_2 +165 0x1000 //RX_TDDRC_ALPHA_UP_3 +166 0x1000 //RX_TDDRC_ALPHA_UP_4 +184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +190 0x7000 //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +269 0x0000 //RX_TDDRC_THRD_0 +270 0x0000 //RX_TDDRC_THRD_1 +271 0x1800 //RX_TDDRC_THRD_2 +272 0x1800 //RX_TDDRC_THRD_3 +273 0x3000 //RX_TDDRC_SLANT_0 +274 0x6E00 //RX_TDDRC_SLANT_1 +275 0x1000 //RX_TDDRC_ALPHA_UP_0 +276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x199A //RX_TDDRC_HMNC_GAIN +279 0x0001 //RX_TDDRC_SMT_FLAG +280 0x0CCD //RX_TDDRC_SMT_W +281 0x01E0 //RX_TDDRC_DRC_GAIN +195 0x0030 //RX_FDEQ_SUBNUM +196 0x4848 //RX_FDEQ_GAIN_0 +197 0x4848 //RX_FDEQ_GAIN_1 +198 0x4844 //RX_FDEQ_GAIN_2 +199 0x4B4D //RX_FDEQ_GAIN_3 +200 0x4E50 //RX_FDEQ_GAIN_4 +201 0x5254 //RX_FDEQ_GAIN_5 +202 0x5658 //RX_FDEQ_GAIN_6 +203 0x5C60 //RX_FDEQ_GAIN_7 +204 0x6468 //RX_FDEQ_GAIN_8 +205 0x6C70 //RX_FDEQ_GAIN_9 +206 0x7474 //RX_FDEQ_GAIN_10 +207 0x7474 //RX_FDEQ_GAIN_11 +208 0x7474 //RX_FDEQ_GAIN_12 +209 0x7474 //RX_FDEQ_GAIN_13 +210 0x7474 //RX_FDEQ_GAIN_14 +211 0x7474 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0202 //RX_FDEQ_BIN_0 +221 0x0203 //RX_FDEQ_BIN_1 +222 0x0402 //RX_FDEQ_BIN_2 +223 0x0304 //RX_FDEQ_BIN_3 +224 0x0405 //RX_FDEQ_BIN_4 +225 0x0506 //RX_FDEQ_BIN_5 +226 0x0708 //RX_FDEQ_BIN_6 +227 0x090A //RX_FDEQ_BIN_7 +228 0x0B0C //RX_FDEQ_BIN_8 +229 0x0D0E //RX_FDEQ_BIN_9 +230 0x1214 //RX_FDEQ_BIN_10 +231 0x1E1E //RX_FDEQ_BIN_11 +232 0x1E1E //RX_FDEQ_BIN_12 +233 0x1E1E //RX_FDEQ_BIN_13 +234 0x1E1E //RX_FDEQ_BIN_14 +235 0x202C //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x4000 //RX_FDEQ_RESRV_0 +245 0x0320 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0030 //RX_FDDRC_BAND_MARGIN_1 +248 0x0050 //RX_FDDRC_BAND_MARGIN_2 +249 0x0080 //RX_FDDRC_BAND_MARGIN_3 +250 0x0007 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x5000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x6400 //RX_FDDRC_THRD_3_2 +258 0x6400 //RX_FDDRC_THRD_3_3 +259 0x2000 //RX_FDDRC_SLANT_0_0 +260 0x2000 //RX_FDDRC_SLANT_0_1 +261 0x2000 //RX_FDDRC_SLANT_0_2 +262 0x2000 //RX_FDDRC_SLANT_0_3 +263 0x5333 //RX_FDDRC_SLANT_1_0 +264 0x5333 //RX_FDDRC_SLANT_1_1 +265 0x5333 //RX_FDDRC_SLANT_1_2 +266 0x5333 //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +286 0x0100 //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 +#VOL 6 +163 0x1000 //RX_TDDRC_ALPHA_UP_1 +164 0x1000 //RX_TDDRC_ALPHA_UP_2 +165 0x1000 //RX_TDDRC_ALPHA_UP_3 +166 0x1000 //RX_TDDRC_ALPHA_UP_4 +184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +190 0x7000 //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +269 0x0000 //RX_TDDRC_THRD_0 +270 0x0000 //RX_TDDRC_THRD_1 +271 0x1800 //RX_TDDRC_THRD_2 +272 0x1800 //RX_TDDRC_THRD_3 +273 0x3000 //RX_TDDRC_SLANT_0 +274 0x6E00 //RX_TDDRC_SLANT_1 +275 0x1000 //RX_TDDRC_ALPHA_UP_0 +276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x199A //RX_TDDRC_HMNC_GAIN +279 0x0001 //RX_TDDRC_SMT_FLAG +280 0x0CCD //RX_TDDRC_SMT_W +281 0x01E0 //RX_TDDRC_DRC_GAIN +195 0x0030 //RX_FDEQ_SUBNUM +196 0x4848 //RX_FDEQ_GAIN_0 +197 0x4848 //RX_FDEQ_GAIN_1 +198 0x4844 //RX_FDEQ_GAIN_2 +199 0x4B4D //RX_FDEQ_GAIN_3 +200 0x4E50 //RX_FDEQ_GAIN_4 +201 0x5254 //RX_FDEQ_GAIN_5 +202 0x5658 //RX_FDEQ_GAIN_6 +203 0x5C60 //RX_FDEQ_GAIN_7 +204 0x6468 //RX_FDEQ_GAIN_8 +205 0x6C70 //RX_FDEQ_GAIN_9 +206 0x7474 //RX_FDEQ_GAIN_10 +207 0x7474 //RX_FDEQ_GAIN_11 +208 0x7474 //RX_FDEQ_GAIN_12 +209 0x7474 //RX_FDEQ_GAIN_13 +210 0x7474 //RX_FDEQ_GAIN_14 +211 0x7474 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0202 //RX_FDEQ_BIN_0 +221 0x0203 //RX_FDEQ_BIN_1 +222 0x0402 //RX_FDEQ_BIN_2 +223 0x0304 //RX_FDEQ_BIN_3 +224 0x0405 //RX_FDEQ_BIN_4 +225 0x0506 //RX_FDEQ_BIN_5 +226 0x0708 //RX_FDEQ_BIN_6 +227 0x090A //RX_FDEQ_BIN_7 +228 0x0B0C //RX_FDEQ_BIN_8 +229 0x0D0E //RX_FDEQ_BIN_9 +230 0x1214 //RX_FDEQ_BIN_10 +231 0x1E1E //RX_FDEQ_BIN_11 +232 0x1E1E //RX_FDEQ_BIN_12 +233 0x1E1E //RX_FDEQ_BIN_13 +234 0x1E1E //RX_FDEQ_BIN_14 +235 0x202C //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x4000 //RX_FDEQ_RESRV_0 +245 0x0320 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0030 //RX_FDDRC_BAND_MARGIN_1 +248 0x0050 //RX_FDDRC_BAND_MARGIN_2 +249 0x0080 //RX_FDDRC_BAND_MARGIN_3 +250 0x0007 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x5000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x6400 //RX_FDDRC_THRD_3_2 +258 0x6400 //RX_FDDRC_THRD_3_3 +259 0x2000 //RX_FDDRC_SLANT_0_0 +260 0x2000 //RX_FDDRC_SLANT_0_1 +261 0x2000 //RX_FDDRC_SLANT_0_2 +262 0x2000 //RX_FDDRC_SLANT_0_3 +263 0x5333 //RX_FDDRC_SLANT_1_0 +264 0x5333 //RX_FDDRC_SLANT_1_1 +265 0x5333 //RX_FDDRC_SLANT_1_2 +266 0x5333 //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +286 0x0100 //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 #CASE_NAME HANDSET-HANDSET_HAC-TMOBILE_US-FB -#PARAM_TYPE TX+RX -#TOTAL_CUSTOM_STEP 7 +#PARAM_MODE Full +#PARAM_TYPE TX+2RX +#TOTAL_CUSTOM_STEP 7+7 #TX 0 0x0000 //TX_OPERATION_MODE_0 1 0x0000 //TX_OPERATION_MODE_1 @@ -31582,7 +48089,7 @@ 18 0x0000 //TX_SYS_RESRV_2 19 0x0000 //TX_SYS_RESRV_3 20 0x0000 //TX_DIST2REF0 -21 0x009D //TX_DIST2REF1 +21 0x009C //TX_DIST2REF1 22 0x0000 //TX_DIST2REF_02 23 0x0000 //TX_DIST2REF_03 24 0x0000 //TX_DIST2REF_04 @@ -31812,12 +48319,12 @@ 248 0xF800 //TX_THR_SN_EST_6 249 0xF700 //TX_THR_SN_EST_7 250 0x0000 //TX_DELTA_THR_SN_EST_0 -251 0x0100 //TX_DELTA_THR_SN_EST_1 +251 0x0200 //TX_DELTA_THR_SN_EST_1 252 0x0200 //TX_DELTA_THR_SN_EST_2 253 0x0200 //TX_DELTA_THR_SN_EST_3 -254 0x0200 //TX_DELTA_THR_SN_EST_4 -255 0x0100 //TX_DELTA_THR_SN_EST_5 -256 0x0200 //TX_DELTA_THR_SN_EST_6 +254 0x0100 //TX_DELTA_THR_SN_EST_4 +255 0x0200 //TX_DELTA_THR_SN_EST_5 +256 0x0100 //TX_DELTA_THR_SN_EST_6 257 0x0200 //TX_DELTA_THR_SN_EST_7 258 0x4000 //TX_LAMBDA_NN_EST_0 259 0x4000 //TX_LAMBDA_NN_EST_1 @@ -31845,16 +48352,16 @@ 281 0x0014 //TX_NS_LVL_CTRL_0 282 0x0016 //TX_NS_LVL_CTRL_1 283 0x0016 //TX_NS_LVL_CTRL_2 -284 0x0016 //TX_NS_LVL_CTRL_3 -285 0x0018 //TX_NS_LVL_CTRL_4 -286 0x0016 //TX_NS_LVL_CTRL_5 -287 0x0012 //TX_NS_LVL_CTRL_6 +284 0x0018 //TX_NS_LVL_CTRL_3 +285 0x0016 //TX_NS_LVL_CTRL_4 +286 0x0012 //TX_NS_LVL_CTRL_5 +287 0x0016 //TX_NS_LVL_CTRL_6 288 0x0017 //TX_NS_LVL_CTRL_7 289 0x000E //TX_MIN_GAIN_S_0 -290 0x0012 //TX_MIN_GAIN_S_1 -291 0x0007 //TX_MIN_GAIN_S_2 -292 0x0012 //TX_MIN_GAIN_S_3 -293 0x0010 //TX_MIN_GAIN_S_4 +290 0x0007 //TX_MIN_GAIN_S_1 +291 0x0012 //TX_MIN_GAIN_S_2 +292 0x0010 //TX_MIN_GAIN_S_3 +293 0x0012 //TX_MIN_GAIN_S_4 294 0x0012 //TX_MIN_GAIN_S_5 295 0x0012 //TX_MIN_GAIN_S_6 296 0x0012 //TX_MIN_GAIN_S_7 @@ -31876,29 +48383,29 @@ 312 0x7FFF //TX_A_POST_FILT_0 313 0x2000 //TX_A_POST_FILT_1 314 0x4000 //TX_A_POST_FILT_S_0 -315 0x5000 //TX_A_POST_FILT_S_1 +315 0x4000 //TX_A_POST_FILT_S_1 316 0x4000 //TX_A_POST_FILT_S_2 317 0x4000 //TX_A_POST_FILT_S_3 318 0x4000 //TX_A_POST_FILT_S_4 319 0x4000 //TX_A_POST_FILT_S_5 -320 0x4000 //TX_A_POST_FILT_S_6 +320 0x5000 //TX_A_POST_FILT_S_6 321 0x7000 //TX_A_POST_FILT_S_7 322 0x1000 //TX_B_POST_FILT_0 323 0x2000 //TX_B_POST_FILT_1 -324 0x3000 //TX_B_POST_FILT_2 +324 0x2000 //TX_B_POST_FILT_2 325 0x2000 //TX_B_POST_FILT_3 -326 0x5000 //TX_B_POST_FILT_4 +326 0x2000 //TX_B_POST_FILT_4 327 0x2000 //TX_B_POST_FILT_5 -328 0x6000 //TX_B_POST_FILT_6 +328 0x3000 //TX_B_POST_FILT_6 329 0x3000 //TX_B_POST_FILT_7 330 0x1000 //TX_B_LESSCUT_RTO_S_0 -331 0x6000 //TX_B_LESSCUT_RTO_S_1 -332 0x6000 //TX_B_LESSCUT_RTO_S_2 -333 0x6000 //TX_B_LESSCUT_RTO_S_3 -334 0x6000 //TX_B_LESSCUT_RTO_S_4 -335 0x6000 //TX_B_LESSCUT_RTO_S_5 -336 0x7FFF //TX_B_LESSCUT_RTO_S_6 -337 0x7FFF //TX_B_LESSCUT_RTO_S_7 +331 0x1000 //TX_B_LESSCUT_RTO_S_1 +332 0x1000 //TX_B_LESSCUT_RTO_S_2 +333 0x1000 //TX_B_LESSCUT_RTO_S_3 +334 0x1000 //TX_B_LESSCUT_RTO_S_4 +335 0x1000 //TX_B_LESSCUT_RTO_S_5 +336 0x1000 //TX_B_LESSCUT_RTO_S_6 +337 0x1000 //TX_B_LESSCUT_RTO_S_7 338 0x7E14 //TX_LAMBDA_PFILT 339 0x7C29 //TX_LAMBDA_PFILT_S_0 340 0x7C29 //TX_LAMBDA_PFILT_S_1 @@ -31941,10 +48448,10 @@ 377 0x4E20 //TX_NOISE_TH_5_4 378 0x39DF //TX_NOISE_TH_6 379 0x0014 //TX_MINENOISE_TH -380 0x4000 //TX_MINENOISE_MIC0_TH_MTS -381 0xFFEE //TX_MINENOISE_MIC0_TH_EXP -382 0x6000 //TX_MINENOISE_MIC0_S_TH_MTS -383 0xFFF3 //TX_MINENOISE_MIC0_S_TH_EXP +380 0xD508 //TX_MORENS_TFMASK_TH +381 0x0001 //TX_DRC_QUIET_FLOOR +382 0x6D60 //TX_RATIODTL_CUT_TH +383 0x1482 //TX_DT_CUT_K1 384 0x00A5 //TX_OUT_ENER_S_TH_CLEAN 385 0x00A5 //TX_OUT_ENER_S_TH_LESSCLEAN 386 0x00A5 //TX_OUT_ENER_S_TH_NOISY @@ -31952,15 +48459,15 @@ 388 0x0200 //TX_OUT_ENER_TH_SPEECH 389 0x2000 //TX_SN_NPB_GAIN 390 0x0000 //TX_NN_NPB_GAIN -391 0x0000 //TX_CSX_ALPHA_0 -392 0x0000 //TX_CSX_ALPHA_1 -393 0x0000 //TX_CSX_ALPHA_2 -394 0x0000 //TX_CSX_ALPHA_3 -395 0x0800 //TX_MU_ARSP_EST -396 0x00C8 //TX_P_OUTBEAM_MIN_TH +391 0x3000 //TX_POST_MASK_SUP_HSNE +392 0x07D0 //TX_TAIL_DET_TH +393 0x4000 //TX_B_LESSCUT_RTO_WTA +394 0x0000 //TX_MEL_G_R +395 0x0080 //TX_SUPHIGH_TH +396 0x0000 //TX_MASK_G_R 397 0x0002 //TX_EXTRA_NS_L -398 0x0800 //TX_EXTRA_NS_A -399 0x0005 //TX_VR_NOISE_FLOOR_TH +398 0x1800 //TX_C_POST_FLT_MASK +399 0x7FFF //TX_A_POST_FLT_WNS 400 0x0148 //TX_MIN_G_LOW300HZ 401 0x0004 //TX_MAXLEVEL_CNG 402 0x00B4 //TX_STN_NOISE_TH @@ -32075,16 +48582,16 @@ 511 0x6666 //TX_MIC_TO_BFGAIN 512 0x0000 //TX_MICTOBFGAIN0 513 0x0000 //TX_FASTMUE_TH -514 0x0000 //TX_DERVB_LEN_0 -515 0x0000 //TX_DERVB_LEN_1 -516 0x0000 //TX_RHO_DERVB -517 0x0000 //TX_MIC_INDX_DERVB -518 0x0000 //TX_MU_DERVB -519 0x0000 //TX_DR_RESRV_0 -520 0x0000 //TX_DR_RESRV_1 -521 0x0000 //TX_DR_RESRV_2 -522 0x0000 //TX_DR_RESRV_3 -523 0x0000 //TX_DR_RESRV_4 +514 0x2CCC //TX_DEREVERB_LF_MU +515 0x3200 //TX_DEREVERB_HF_MU +516 0x0007 //TX_DEREVERB_DELAY +517 0x0004 //TX_DEREVERB_COEF_LEN +518 0x0003 //TX_DEREVERB_DNR +519 0x0000 //TX_DEREVERB_ALPHA +520 0x0000 //TX_DEREVERB_BETA +521 0x7FFF //TX_GSC_RTOL_TH +522 0x7FFF //TX_GSC_RTOH_TH +523 0x7E2C //TX_WIDE2_MEANHTH 524 0x0000 //TX_DR_RESRV_5 525 0x0000 //TX_DR_RESRV_6 526 0x0000 //TX_DR_RESRV_7 @@ -32458,6 +48965,71 @@ 894 0xC000 //TX_FASTNS_SSA_THHFL 895 0xCCCC //TX_FASTNS_SSA_THLFH 896 0xD999 //TX_FASTNS_SSA_THHFH +897 0x2339 //TX_SENDFUNC_REG_MICMUTE +898 0x0021 //TX_SENDFUNC_REG_MICMUTE1 +899 0x02BC //TX_MICMUTE_RATIO_THR +900 0x0140 //TX_MICMUTE_AMP_THR +901 0x0004 //TX_MICMUTE_HPF_IND +902 0x00C0 //TX_MICMUTE_LOG_EYR_TH +903 0x0008 //TX_MICMUTE_CVG_TIME +904 0x0008 //TX_MICMUTE_RELEASE_TIME +905 0x01FE //TX_MIC_VOLUME_MIC0MUTE +906 0x0020 //TX_MICMUTE_EPD_OFFSET_0 +907 0x001E //TX_MICMUTE_FRQ_AEC_L +908 0x7999 //TX_MICMUTE_EAD_THR +909 0x7FFF //TX_MICMUTE_LAMBDA_CB_NLE +910 0x7FFF //TX_MICMUTE_LAMBDA_RE_EST +911 0x4000 //TX_DTD_THR1_MICMUTE_0 +912 0x7000 //TX_DTD_THR1_MICMUTE_1 +913 0x7FFF //TX_DTD_THR1_MICMUTE_2 +914 0x7FFF //TX_DTD_THR1_MICMUTE_3 +915 0x6CCC //TX_DTD_THR2_MICMUTE_0 +916 0x0400 //TX_MICMUTE_MIN_EQ_RE_EST_0 +917 0x0400 //TX_MICMUTE_MIN_EQ_RE_EST_1 +918 0x1000 //TX_MICMUTE_MIN_EQ_RE_EST_2 +919 0x7FFF //TX_MICMUTE_MIN_EQ_RE_EST_3 +920 0x7FFF //TX_MICMUTE_MIN_EQ_RE_EST_4 +921 0x4000 //TX_MICMUTE_C_POST_FLT +922 0x03E8 //TX_MICMUTE_DT_CUT_K +923 0x0001 //TX_MICMUTE_DT_CUT_THR +924 0x03E8 //TX_MICMUTE_DT_CUT_K2 +925 0x0001 //TX_MICMUTE_DT_CUT_THR2 +926 0x0064 //TX_MICMUTE_DT2_HOLD_N +927 0x1000 //TX_MICMUTE_RATIODTH_THCUT +928 0x1000 //TX_MICMUTE_B_POST_FLT_ECHOL +929 0x7FFF //TX_MICMUTE_B_POST_FLT_ECHOH +930 0x0400 //TX_MICMUTE_C_POST_FLT_MASK +931 0x7999 //TX_MICMUTE_RATIODTL_CUT_TH +932 0x0258 //TX_MICMUTE_DT_CUT_K1 +933 0x0800 //TX_MICMUTE_N2_SN_EST +934 0xFC00 //TX_MICMUTE_THR_SN_EST_0 +935 0x001C //TX_MICMUTE_MIN_G_CTRL_0 +936 0x6000 //TX_MICMUTE_A_POST_FILT_S_0 +937 0x7000 //TX_MICMUTE_B_POST_FILT_0 +938 0x2710 //TX_MIC1RUB_AMP_THR +939 0x0010 //TX_MIC1MUTE_RATIO_THR +940 0x0450 //TX_MIC1MUTE_AMP_THR +941 0x0008 //TX_MIC1MUTE_CVG_TIME +942 0x0008 //TX_MIC1MUTE_RELEASE_TIME +943 0x0000 //TX_AMS_RESRV_01 +944 0x0000 //TX_AMS_RESRV_02 +945 0x0000 //TX_AMS_RESRV_03 +946 0x0000 //TX_AMS_RESRV_04 +947 0x0000 //TX_AMS_RESRV_05 +948 0x0000 //TX_AMS_RESRV_06 +949 0x0000 //TX_AMS_RESRV_07 +950 0x0000 //TX_AMS_RESRV_08 +951 0x0000 //TX_AMS_RESRV_09 +952 0x0000 //TX_AMS_RESRV_10 +953 0x0000 //TX_AMS_RESRV_11 +954 0x0000 //TX_AMS_RESRV_12 +955 0x0000 //TX_AMS_RESRV_13 +956 0x0000 //TX_AMS_RESRV_14 +957 0x0000 //TX_AMS_RESRV_15 +958 0x0000 //TX_AMS_RESRV_16 +959 0x0000 //TX_AMS_RESRV_17 +960 0x0000 //TX_AMS_RESRV_18 +961 0x0000 //TX_AMS_RESRV_19 #RX 0 0x000C //RX_RECVFUNC_MODE_0 1 0x0000 //RX_RECVFUNC_MODE_1 @@ -33309,4 +49881,855 @@ 110 0x0000 //RX_FDDRC_RESRV_0 129 0x0100 //RX_SPK_VOL 130 0x0000 //RX_VOL_RESRV_0 +#RX 2 +157 0x000C //RX_RECVFUNC_MODE_0 +158 0x0000 //RX_RECVFUNC_MODE_1 +159 0x0004 //RX_SAMPLINGFREQ_SIG +160 0x0004 //RX_SAMPLINGFREQ_PROC +161 0x000A //RX_FRAME_SZ +162 0x0000 //RX_DELAY_OPT +163 0x1000 //RX_TDDRC_ALPHA_UP_1 +164 0x1000 //RX_TDDRC_ALPHA_UP_2 +165 0x1000 //RX_TDDRC_ALPHA_UP_3 +166 0x1000 //RX_TDDRC_ALPHA_UP_4 +167 0x0800 //RX_PGA +168 0x7FFF //RX_A_HP +169 0x4000 //RX_B_PE +170 0x5800 //RX_THR_PITCH_DET_0 +171 0x5000 //RX_THR_PITCH_DET_1 +172 0x4000 //RX_THR_PITCH_DET_2 +173 0x0008 //RX_PITCH_BFR_LEN +174 0x0003 //RX_SBD_PITCH_DET +175 0x0100 //RX_PP_RESRV_0 +176 0x0020 //RX_PP_RESRV_1 +177 0x0600 //RX_N_SN_EST +178 0x000C //RX_N2_SN_EST +179 0x000F //RX_NS_LVL_CTRL +180 0xF800 //RX_THR_SN_EST +181 0x7E00 //RX_LAMBDA_PFILT +182 0x000A //RX_FENS_RESRV_0 +183 0x0190 //RX_FENS_RESRV_1 +184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +187 0x0002 //RX_EXTRA_NS_L +188 0x0800 //RX_EXTRA_NS_A +189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +190 0x7000 //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +192 0x199A //RX_A_POST_FLT +193 0x0000 //RX_LMT_THRD +194 0x4000 //RX_LMT_ALPHA +195 0x0030 //RX_FDEQ_SUBNUM +196 0x4848 //RX_FDEQ_GAIN_0 +197 0x4848 //RX_FDEQ_GAIN_1 +198 0x4844 //RX_FDEQ_GAIN_2 +199 0x4B4D //RX_FDEQ_GAIN_3 +200 0x4E50 //RX_FDEQ_GAIN_4 +201 0x5254 //RX_FDEQ_GAIN_5 +202 0x5658 //RX_FDEQ_GAIN_6 +203 0x5C60 //RX_FDEQ_GAIN_7 +204 0x6468 //RX_FDEQ_GAIN_8 +205 0x6C70 //RX_FDEQ_GAIN_9 +206 0x7474 //RX_FDEQ_GAIN_10 +207 0x7474 //RX_FDEQ_GAIN_11 +208 0x7474 //RX_FDEQ_GAIN_12 +209 0x7474 //RX_FDEQ_GAIN_13 +210 0x7474 //RX_FDEQ_GAIN_14 +211 0x7474 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0202 //RX_FDEQ_BIN_0 +221 0x0203 //RX_FDEQ_BIN_1 +222 0x0402 //RX_FDEQ_BIN_2 +223 0x0304 //RX_FDEQ_BIN_3 +224 0x0405 //RX_FDEQ_BIN_4 +225 0x0506 //RX_FDEQ_BIN_5 +226 0x0708 //RX_FDEQ_BIN_6 +227 0x090A //RX_FDEQ_BIN_7 +228 0x0B0C //RX_FDEQ_BIN_8 +229 0x0D0E //RX_FDEQ_BIN_9 +230 0x1214 //RX_FDEQ_BIN_10 +231 0x1E1E //RX_FDEQ_BIN_11 +232 0x1E1E //RX_FDEQ_BIN_12 +233 0x1E1E //RX_FDEQ_BIN_13 +234 0x1E1E //RX_FDEQ_BIN_14 +235 0x202C //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x4000 //RX_FDEQ_RESRV_0 +245 0x0320 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0030 //RX_FDDRC_BAND_MARGIN_1 +248 0x0050 //RX_FDDRC_BAND_MARGIN_2 +249 0x0080 //RX_FDDRC_BAND_MARGIN_3 +250 0x0007 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x5000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x6400 //RX_FDDRC_THRD_3_2 +258 0x6400 //RX_FDDRC_THRD_3_3 +259 0x2000 //RX_FDDRC_SLANT_0_0 +260 0x2000 //RX_FDDRC_SLANT_0_1 +261 0x2000 //RX_FDDRC_SLANT_0_2 +262 0x2000 //RX_FDDRC_SLANT_0_3 +263 0x5333 //RX_FDDRC_SLANT_1_0 +264 0x5333 //RX_FDDRC_SLANT_1_1 +265 0x5333 //RX_FDDRC_SLANT_1_2 +266 0x5333 //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +268 0x0002 //RX_FILTINDX +269 0x0000 //RX_TDDRC_THRD_0 +270 0x0000 //RX_TDDRC_THRD_1 +271 0x1800 //RX_TDDRC_THRD_2 +272 0x1800 //RX_TDDRC_THRD_3 +273 0x3000 //RX_TDDRC_SLANT_0 +274 0x6E00 //RX_TDDRC_SLANT_1 +275 0x1000 //RX_TDDRC_ALPHA_UP_0 +276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x199A //RX_TDDRC_HMNC_GAIN +279 0x0001 //RX_TDDRC_SMT_FLAG +280 0x0CCD //RX_TDDRC_SMT_W +281 0x01E0 //RX_TDDRC_DRC_GAIN +282 0x7C00 //RX_LAMBDA_PKA_FP +283 0x2000 //RX_TPKA_FP +284 0x2000 //RX_MIN_G_FP +285 0x0080 //RX_MAX_G_FP +286 0x0100 //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 +288 0x0000 //RX_MAXLEVEL_CNG +289 0x3000 //RX_BWE_UV_TH +290 0x3000 //RX_BWE_UV_TH2 +291 0x1800 //RX_BWE_UV_TH3 +292 0x1000 //RX_BWE_V_TH +293 0x04CD //RX_BWE_GAIN1_V_TH1 +294 0x0F33 //RX_BWE_GAIN1_V_TH2 +295 0x7333 //RX_BWE_UV_EQ +296 0x199A //RX_BWE_V_EQ +297 0x7333 //RX_BWE_TONE_TH +298 0x0004 //RX_BWE_UV_HOLD_T +299 0x6CCD //RX_BWE_GAIN2_ALPHA +300 0x799A //RX_BWE_GAIN3_ALPHA +301 0x001E //RX_BWE_CUTOFF +302 0x3000 //RX_BWE_GAINFILL +303 0x3200 //RX_BWE_MAXTH_TONE +304 0x2000 //RX_BWE_EQ_0 +305 0x2000 //RX_BWE_EQ_1 +306 0x2000 //RX_BWE_EQ_2 +307 0x2000 //RX_BWE_EQ_3 +308 0x2000 //RX_BWE_EQ_4 +309 0x2000 //RX_BWE_EQ_5 +310 0x2000 //RX_BWE_EQ_6 +311 0x0000 //RX_BWE_RESRV_0 +312 0x0000 //RX_BWE_RESRV_1 +313 0x0000 //RX_BWE_RESRV_2 +#VOL 0 +163 0x1000 //RX_TDDRC_ALPHA_UP_1 +164 0x1000 //RX_TDDRC_ALPHA_UP_2 +165 0x1000 //RX_TDDRC_ALPHA_UP_3 +166 0x1000 //RX_TDDRC_ALPHA_UP_4 +184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +190 0x7000 //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +269 0x0000 //RX_TDDRC_THRD_0 +270 0x0000 //RX_TDDRC_THRD_1 +271 0x1800 //RX_TDDRC_THRD_2 +272 0x1800 //RX_TDDRC_THRD_3 +273 0x3000 //RX_TDDRC_SLANT_0 +274 0x6E00 //RX_TDDRC_SLANT_1 +275 0x1000 //RX_TDDRC_ALPHA_UP_0 +276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x199A //RX_TDDRC_HMNC_GAIN +279 0x0001 //RX_TDDRC_SMT_FLAG +280 0x0CCD //RX_TDDRC_SMT_W +281 0x01E0 //RX_TDDRC_DRC_GAIN +195 0x0030 //RX_FDEQ_SUBNUM +196 0x4848 //RX_FDEQ_GAIN_0 +197 0x4848 //RX_FDEQ_GAIN_1 +198 0x4844 //RX_FDEQ_GAIN_2 +199 0x4B4D //RX_FDEQ_GAIN_3 +200 0x4E50 //RX_FDEQ_GAIN_4 +201 0x5254 //RX_FDEQ_GAIN_5 +202 0x5658 //RX_FDEQ_GAIN_6 +203 0x5C60 //RX_FDEQ_GAIN_7 +204 0x6468 //RX_FDEQ_GAIN_8 +205 0x6C70 //RX_FDEQ_GAIN_9 +206 0x7474 //RX_FDEQ_GAIN_10 +207 0x7474 //RX_FDEQ_GAIN_11 +208 0x7474 //RX_FDEQ_GAIN_12 +209 0x7474 //RX_FDEQ_GAIN_13 +210 0x7474 //RX_FDEQ_GAIN_14 +211 0x7474 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0202 //RX_FDEQ_BIN_0 +221 0x0203 //RX_FDEQ_BIN_1 +222 0x0402 //RX_FDEQ_BIN_2 +223 0x0304 //RX_FDEQ_BIN_3 +224 0x0405 //RX_FDEQ_BIN_4 +225 0x0506 //RX_FDEQ_BIN_5 +226 0x0708 //RX_FDEQ_BIN_6 +227 0x090A //RX_FDEQ_BIN_7 +228 0x0B0C //RX_FDEQ_BIN_8 +229 0x0D0E //RX_FDEQ_BIN_9 +230 0x1214 //RX_FDEQ_BIN_10 +231 0x1E1E //RX_FDEQ_BIN_11 +232 0x1E1E //RX_FDEQ_BIN_12 +233 0x1E1E //RX_FDEQ_BIN_13 +234 0x1E1E //RX_FDEQ_BIN_14 +235 0x202C //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x4000 //RX_FDEQ_RESRV_0 +245 0x0320 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0030 //RX_FDDRC_BAND_MARGIN_1 +248 0x0050 //RX_FDDRC_BAND_MARGIN_2 +249 0x0080 //RX_FDDRC_BAND_MARGIN_3 +250 0x0007 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x5000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x6400 //RX_FDDRC_THRD_3_2 +258 0x6400 //RX_FDDRC_THRD_3_3 +259 0x2000 //RX_FDDRC_SLANT_0_0 +260 0x2000 //RX_FDDRC_SLANT_0_1 +261 0x2000 //RX_FDDRC_SLANT_0_2 +262 0x2000 //RX_FDDRC_SLANT_0_3 +263 0x5333 //RX_FDDRC_SLANT_1_0 +264 0x5333 //RX_FDDRC_SLANT_1_1 +265 0x5333 //RX_FDDRC_SLANT_1_2 +266 0x5333 //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +286 0x0100 //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 +#VOL 1 +163 0x1000 //RX_TDDRC_ALPHA_UP_1 +164 0x1000 //RX_TDDRC_ALPHA_UP_2 +165 0x1000 //RX_TDDRC_ALPHA_UP_3 +166 0x1000 //RX_TDDRC_ALPHA_UP_4 +184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +190 0x7000 //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +269 0x0000 //RX_TDDRC_THRD_0 +270 0x0000 //RX_TDDRC_THRD_1 +271 0x1800 //RX_TDDRC_THRD_2 +272 0x1800 //RX_TDDRC_THRD_3 +273 0x3000 //RX_TDDRC_SLANT_0 +274 0x6E00 //RX_TDDRC_SLANT_1 +275 0x1000 //RX_TDDRC_ALPHA_UP_0 +276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x199A //RX_TDDRC_HMNC_GAIN +279 0x0001 //RX_TDDRC_SMT_FLAG +280 0x0CCD //RX_TDDRC_SMT_W +281 0x01E0 //RX_TDDRC_DRC_GAIN +195 0x0030 //RX_FDEQ_SUBNUM +196 0x4848 //RX_FDEQ_GAIN_0 +197 0x4848 //RX_FDEQ_GAIN_1 +198 0x4844 //RX_FDEQ_GAIN_2 +199 0x4B4D //RX_FDEQ_GAIN_3 +200 0x4E50 //RX_FDEQ_GAIN_4 +201 0x5254 //RX_FDEQ_GAIN_5 +202 0x5658 //RX_FDEQ_GAIN_6 +203 0x5C60 //RX_FDEQ_GAIN_7 +204 0x6468 //RX_FDEQ_GAIN_8 +205 0x6C70 //RX_FDEQ_GAIN_9 +206 0x7474 //RX_FDEQ_GAIN_10 +207 0x7474 //RX_FDEQ_GAIN_11 +208 0x7474 //RX_FDEQ_GAIN_12 +209 0x7474 //RX_FDEQ_GAIN_13 +210 0x7474 //RX_FDEQ_GAIN_14 +211 0x7474 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0202 //RX_FDEQ_BIN_0 +221 0x0203 //RX_FDEQ_BIN_1 +222 0x0402 //RX_FDEQ_BIN_2 +223 0x0304 //RX_FDEQ_BIN_3 +224 0x0405 //RX_FDEQ_BIN_4 +225 0x0506 //RX_FDEQ_BIN_5 +226 0x0708 //RX_FDEQ_BIN_6 +227 0x090A //RX_FDEQ_BIN_7 +228 0x0B0C //RX_FDEQ_BIN_8 +229 0x0D0E //RX_FDEQ_BIN_9 +230 0x1214 //RX_FDEQ_BIN_10 +231 0x1E1E //RX_FDEQ_BIN_11 +232 0x1E1E //RX_FDEQ_BIN_12 +233 0x1E1E //RX_FDEQ_BIN_13 +234 0x1E1E //RX_FDEQ_BIN_14 +235 0x202C //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x4000 //RX_FDEQ_RESRV_0 +245 0x0320 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0030 //RX_FDDRC_BAND_MARGIN_1 +248 0x0050 //RX_FDDRC_BAND_MARGIN_2 +249 0x0080 //RX_FDDRC_BAND_MARGIN_3 +250 0x0007 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x5000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x6400 //RX_FDDRC_THRD_3_2 +258 0x6400 //RX_FDDRC_THRD_3_3 +259 0x2000 //RX_FDDRC_SLANT_0_0 +260 0x2000 //RX_FDDRC_SLANT_0_1 +261 0x2000 //RX_FDDRC_SLANT_0_2 +262 0x2000 //RX_FDDRC_SLANT_0_3 +263 0x5333 //RX_FDDRC_SLANT_1_0 +264 0x5333 //RX_FDDRC_SLANT_1_1 +265 0x5333 //RX_FDDRC_SLANT_1_2 +266 0x5333 //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +286 0x0100 //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 +#VOL 2 +163 0x1000 //RX_TDDRC_ALPHA_UP_1 +164 0x1000 //RX_TDDRC_ALPHA_UP_2 +165 0x1000 //RX_TDDRC_ALPHA_UP_3 +166 0x1000 //RX_TDDRC_ALPHA_UP_4 +184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +190 0x7000 //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +269 0x0000 //RX_TDDRC_THRD_0 +270 0x0000 //RX_TDDRC_THRD_1 +271 0x1800 //RX_TDDRC_THRD_2 +272 0x1800 //RX_TDDRC_THRD_3 +273 0x3000 //RX_TDDRC_SLANT_0 +274 0x6E00 //RX_TDDRC_SLANT_1 +275 0x1000 //RX_TDDRC_ALPHA_UP_0 +276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x199A //RX_TDDRC_HMNC_GAIN +279 0x0001 //RX_TDDRC_SMT_FLAG +280 0x0CCD //RX_TDDRC_SMT_W +281 0x01E0 //RX_TDDRC_DRC_GAIN +195 0x0030 //RX_FDEQ_SUBNUM +196 0x4848 //RX_FDEQ_GAIN_0 +197 0x4848 //RX_FDEQ_GAIN_1 +198 0x4844 //RX_FDEQ_GAIN_2 +199 0x4B4D //RX_FDEQ_GAIN_3 +200 0x4E50 //RX_FDEQ_GAIN_4 +201 0x5254 //RX_FDEQ_GAIN_5 +202 0x5658 //RX_FDEQ_GAIN_6 +203 0x5C60 //RX_FDEQ_GAIN_7 +204 0x6468 //RX_FDEQ_GAIN_8 +205 0x6C70 //RX_FDEQ_GAIN_9 +206 0x7474 //RX_FDEQ_GAIN_10 +207 0x7474 //RX_FDEQ_GAIN_11 +208 0x7474 //RX_FDEQ_GAIN_12 +209 0x7474 //RX_FDEQ_GAIN_13 +210 0x7474 //RX_FDEQ_GAIN_14 +211 0x7474 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0202 //RX_FDEQ_BIN_0 +221 0x0203 //RX_FDEQ_BIN_1 +222 0x0402 //RX_FDEQ_BIN_2 +223 0x0304 //RX_FDEQ_BIN_3 +224 0x0405 //RX_FDEQ_BIN_4 +225 0x0506 //RX_FDEQ_BIN_5 +226 0x0708 //RX_FDEQ_BIN_6 +227 0x090A //RX_FDEQ_BIN_7 +228 0x0B0C //RX_FDEQ_BIN_8 +229 0x0D0E //RX_FDEQ_BIN_9 +230 0x1214 //RX_FDEQ_BIN_10 +231 0x1E1E //RX_FDEQ_BIN_11 +232 0x1E1E //RX_FDEQ_BIN_12 +233 0x1E1E //RX_FDEQ_BIN_13 +234 0x1E1E //RX_FDEQ_BIN_14 +235 0x202C //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x4000 //RX_FDEQ_RESRV_0 +245 0x0320 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0030 //RX_FDDRC_BAND_MARGIN_1 +248 0x0050 //RX_FDDRC_BAND_MARGIN_2 +249 0x0080 //RX_FDDRC_BAND_MARGIN_3 +250 0x0007 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x5000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x6400 //RX_FDDRC_THRD_3_2 +258 0x6400 //RX_FDDRC_THRD_3_3 +259 0x2000 //RX_FDDRC_SLANT_0_0 +260 0x2000 //RX_FDDRC_SLANT_0_1 +261 0x2000 //RX_FDDRC_SLANT_0_2 +262 0x2000 //RX_FDDRC_SLANT_0_3 +263 0x5333 //RX_FDDRC_SLANT_1_0 +264 0x5333 //RX_FDDRC_SLANT_1_1 +265 0x5333 //RX_FDDRC_SLANT_1_2 +266 0x5333 //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +286 0x0100 //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 +#VOL 3 +163 0x1000 //RX_TDDRC_ALPHA_UP_1 +164 0x1000 //RX_TDDRC_ALPHA_UP_2 +165 0x1000 //RX_TDDRC_ALPHA_UP_3 +166 0x1000 //RX_TDDRC_ALPHA_UP_4 +184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +190 0x7000 //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +269 0x0000 //RX_TDDRC_THRD_0 +270 0x0000 //RX_TDDRC_THRD_1 +271 0x1800 //RX_TDDRC_THRD_2 +272 0x1800 //RX_TDDRC_THRD_3 +273 0x3000 //RX_TDDRC_SLANT_0 +274 0x6E00 //RX_TDDRC_SLANT_1 +275 0x1000 //RX_TDDRC_ALPHA_UP_0 +276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x199A //RX_TDDRC_HMNC_GAIN +279 0x0001 //RX_TDDRC_SMT_FLAG +280 0x0CCD //RX_TDDRC_SMT_W +281 0x01E0 //RX_TDDRC_DRC_GAIN +195 0x0030 //RX_FDEQ_SUBNUM +196 0x4848 //RX_FDEQ_GAIN_0 +197 0x4848 //RX_FDEQ_GAIN_1 +198 0x4844 //RX_FDEQ_GAIN_2 +199 0x4B4D //RX_FDEQ_GAIN_3 +200 0x4E50 //RX_FDEQ_GAIN_4 +201 0x5254 //RX_FDEQ_GAIN_5 +202 0x5658 //RX_FDEQ_GAIN_6 +203 0x5C60 //RX_FDEQ_GAIN_7 +204 0x6468 //RX_FDEQ_GAIN_8 +205 0x6C70 //RX_FDEQ_GAIN_9 +206 0x7474 //RX_FDEQ_GAIN_10 +207 0x7474 //RX_FDEQ_GAIN_11 +208 0x7474 //RX_FDEQ_GAIN_12 +209 0x7474 //RX_FDEQ_GAIN_13 +210 0x7474 //RX_FDEQ_GAIN_14 +211 0x7474 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0202 //RX_FDEQ_BIN_0 +221 0x0203 //RX_FDEQ_BIN_1 +222 0x0402 //RX_FDEQ_BIN_2 +223 0x0304 //RX_FDEQ_BIN_3 +224 0x0405 //RX_FDEQ_BIN_4 +225 0x0506 //RX_FDEQ_BIN_5 +226 0x0708 //RX_FDEQ_BIN_6 +227 0x090A //RX_FDEQ_BIN_7 +228 0x0B0C //RX_FDEQ_BIN_8 +229 0x0D0E //RX_FDEQ_BIN_9 +230 0x1214 //RX_FDEQ_BIN_10 +231 0x1E1E //RX_FDEQ_BIN_11 +232 0x1E1E //RX_FDEQ_BIN_12 +233 0x1E1E //RX_FDEQ_BIN_13 +234 0x1E1E //RX_FDEQ_BIN_14 +235 0x202C //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x4000 //RX_FDEQ_RESRV_0 +245 0x0320 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0030 //RX_FDDRC_BAND_MARGIN_1 +248 0x0050 //RX_FDDRC_BAND_MARGIN_2 +249 0x0080 //RX_FDDRC_BAND_MARGIN_3 +250 0x0007 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x5000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x6400 //RX_FDDRC_THRD_3_2 +258 0x6400 //RX_FDDRC_THRD_3_3 +259 0x2000 //RX_FDDRC_SLANT_0_0 +260 0x2000 //RX_FDDRC_SLANT_0_1 +261 0x2000 //RX_FDDRC_SLANT_0_2 +262 0x2000 //RX_FDDRC_SLANT_0_3 +263 0x5333 //RX_FDDRC_SLANT_1_0 +264 0x5333 //RX_FDDRC_SLANT_1_1 +265 0x5333 //RX_FDDRC_SLANT_1_2 +266 0x5333 //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +286 0x0100 //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 +#VOL 4 +163 0x1000 //RX_TDDRC_ALPHA_UP_1 +164 0x1000 //RX_TDDRC_ALPHA_UP_2 +165 0x1000 //RX_TDDRC_ALPHA_UP_3 +166 0x1000 //RX_TDDRC_ALPHA_UP_4 +184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +190 0x7000 //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +269 0x0000 //RX_TDDRC_THRD_0 +270 0x0000 //RX_TDDRC_THRD_1 +271 0x1800 //RX_TDDRC_THRD_2 +272 0x1800 //RX_TDDRC_THRD_3 +273 0x3000 //RX_TDDRC_SLANT_0 +274 0x6E00 //RX_TDDRC_SLANT_1 +275 0x1000 //RX_TDDRC_ALPHA_UP_0 +276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x199A //RX_TDDRC_HMNC_GAIN +279 0x0001 //RX_TDDRC_SMT_FLAG +280 0x0CCD //RX_TDDRC_SMT_W +281 0x01E0 //RX_TDDRC_DRC_GAIN +195 0x0030 //RX_FDEQ_SUBNUM +196 0x4848 //RX_FDEQ_GAIN_0 +197 0x4848 //RX_FDEQ_GAIN_1 +198 0x4844 //RX_FDEQ_GAIN_2 +199 0x4B4D //RX_FDEQ_GAIN_3 +200 0x4E50 //RX_FDEQ_GAIN_4 +201 0x5254 //RX_FDEQ_GAIN_5 +202 0x5658 //RX_FDEQ_GAIN_6 +203 0x5C60 //RX_FDEQ_GAIN_7 +204 0x6468 //RX_FDEQ_GAIN_8 +205 0x6C70 //RX_FDEQ_GAIN_9 +206 0x7474 //RX_FDEQ_GAIN_10 +207 0x7474 //RX_FDEQ_GAIN_11 +208 0x7474 //RX_FDEQ_GAIN_12 +209 0x7474 //RX_FDEQ_GAIN_13 +210 0x7474 //RX_FDEQ_GAIN_14 +211 0x7474 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0202 //RX_FDEQ_BIN_0 +221 0x0203 //RX_FDEQ_BIN_1 +222 0x0402 //RX_FDEQ_BIN_2 +223 0x0304 //RX_FDEQ_BIN_3 +224 0x0405 //RX_FDEQ_BIN_4 +225 0x0506 //RX_FDEQ_BIN_5 +226 0x0708 //RX_FDEQ_BIN_6 +227 0x090A //RX_FDEQ_BIN_7 +228 0x0B0C //RX_FDEQ_BIN_8 +229 0x0D0E //RX_FDEQ_BIN_9 +230 0x1214 //RX_FDEQ_BIN_10 +231 0x1E1E //RX_FDEQ_BIN_11 +232 0x1E1E //RX_FDEQ_BIN_12 +233 0x1E1E //RX_FDEQ_BIN_13 +234 0x1E1E //RX_FDEQ_BIN_14 +235 0x202C //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x4000 //RX_FDEQ_RESRV_0 +245 0x0320 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0030 //RX_FDDRC_BAND_MARGIN_1 +248 0x0050 //RX_FDDRC_BAND_MARGIN_2 +249 0x0080 //RX_FDDRC_BAND_MARGIN_3 +250 0x0007 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x5000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x6400 //RX_FDDRC_THRD_3_2 +258 0x6400 //RX_FDDRC_THRD_3_3 +259 0x2000 //RX_FDDRC_SLANT_0_0 +260 0x2000 //RX_FDDRC_SLANT_0_1 +261 0x2000 //RX_FDDRC_SLANT_0_2 +262 0x2000 //RX_FDDRC_SLANT_0_3 +263 0x5333 //RX_FDDRC_SLANT_1_0 +264 0x5333 //RX_FDDRC_SLANT_1_1 +265 0x5333 //RX_FDDRC_SLANT_1_2 +266 0x5333 //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +286 0x0100 //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 +#VOL 5 +163 0x1000 //RX_TDDRC_ALPHA_UP_1 +164 0x1000 //RX_TDDRC_ALPHA_UP_2 +165 0x1000 //RX_TDDRC_ALPHA_UP_3 +166 0x1000 //RX_TDDRC_ALPHA_UP_4 +184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +190 0x7000 //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +269 0x0000 //RX_TDDRC_THRD_0 +270 0x0000 //RX_TDDRC_THRD_1 +271 0x1800 //RX_TDDRC_THRD_2 +272 0x1800 //RX_TDDRC_THRD_3 +273 0x3000 //RX_TDDRC_SLANT_0 +274 0x6E00 //RX_TDDRC_SLANT_1 +275 0x1000 //RX_TDDRC_ALPHA_UP_0 +276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x199A //RX_TDDRC_HMNC_GAIN +279 0x0001 //RX_TDDRC_SMT_FLAG +280 0x0CCD //RX_TDDRC_SMT_W +281 0x01E0 //RX_TDDRC_DRC_GAIN +195 0x0030 //RX_FDEQ_SUBNUM +196 0x4848 //RX_FDEQ_GAIN_0 +197 0x4848 //RX_FDEQ_GAIN_1 +198 0x4844 //RX_FDEQ_GAIN_2 +199 0x4B4D //RX_FDEQ_GAIN_3 +200 0x4E50 //RX_FDEQ_GAIN_4 +201 0x5254 //RX_FDEQ_GAIN_5 +202 0x5658 //RX_FDEQ_GAIN_6 +203 0x5C60 //RX_FDEQ_GAIN_7 +204 0x6468 //RX_FDEQ_GAIN_8 +205 0x6C70 //RX_FDEQ_GAIN_9 +206 0x7474 //RX_FDEQ_GAIN_10 +207 0x7474 //RX_FDEQ_GAIN_11 +208 0x7474 //RX_FDEQ_GAIN_12 +209 0x7474 //RX_FDEQ_GAIN_13 +210 0x7474 //RX_FDEQ_GAIN_14 +211 0x7474 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0202 //RX_FDEQ_BIN_0 +221 0x0203 //RX_FDEQ_BIN_1 +222 0x0402 //RX_FDEQ_BIN_2 +223 0x0304 //RX_FDEQ_BIN_3 +224 0x0405 //RX_FDEQ_BIN_4 +225 0x0506 //RX_FDEQ_BIN_5 +226 0x0708 //RX_FDEQ_BIN_6 +227 0x090A //RX_FDEQ_BIN_7 +228 0x0B0C //RX_FDEQ_BIN_8 +229 0x0D0E //RX_FDEQ_BIN_9 +230 0x1214 //RX_FDEQ_BIN_10 +231 0x1E1E //RX_FDEQ_BIN_11 +232 0x1E1E //RX_FDEQ_BIN_12 +233 0x1E1E //RX_FDEQ_BIN_13 +234 0x1E1E //RX_FDEQ_BIN_14 +235 0x202C //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x4000 //RX_FDEQ_RESRV_0 +245 0x0320 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0030 //RX_FDDRC_BAND_MARGIN_1 +248 0x0050 //RX_FDDRC_BAND_MARGIN_2 +249 0x0080 //RX_FDDRC_BAND_MARGIN_3 +250 0x0007 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x5000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x6400 //RX_FDDRC_THRD_3_2 +258 0x6400 //RX_FDDRC_THRD_3_3 +259 0x2000 //RX_FDDRC_SLANT_0_0 +260 0x2000 //RX_FDDRC_SLANT_0_1 +261 0x2000 //RX_FDDRC_SLANT_0_2 +262 0x2000 //RX_FDDRC_SLANT_0_3 +263 0x5333 //RX_FDDRC_SLANT_1_0 +264 0x5333 //RX_FDDRC_SLANT_1_1 +265 0x5333 //RX_FDDRC_SLANT_1_2 +266 0x5333 //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +286 0x0100 //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 +#VOL 6 +163 0x1000 //RX_TDDRC_ALPHA_UP_1 +164 0x1000 //RX_TDDRC_ALPHA_UP_2 +165 0x1000 //RX_TDDRC_ALPHA_UP_3 +166 0x1000 //RX_TDDRC_ALPHA_UP_4 +184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +190 0x7000 //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +269 0x0000 //RX_TDDRC_THRD_0 +270 0x0000 //RX_TDDRC_THRD_1 +271 0x1800 //RX_TDDRC_THRD_2 +272 0x1800 //RX_TDDRC_THRD_3 +273 0x3000 //RX_TDDRC_SLANT_0 +274 0x6E00 //RX_TDDRC_SLANT_1 +275 0x1000 //RX_TDDRC_ALPHA_UP_0 +276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x199A //RX_TDDRC_HMNC_GAIN +279 0x0001 //RX_TDDRC_SMT_FLAG +280 0x0CCD //RX_TDDRC_SMT_W +281 0x01E0 //RX_TDDRC_DRC_GAIN +195 0x0030 //RX_FDEQ_SUBNUM +196 0x4848 //RX_FDEQ_GAIN_0 +197 0x4848 //RX_FDEQ_GAIN_1 +198 0x4844 //RX_FDEQ_GAIN_2 +199 0x4B4D //RX_FDEQ_GAIN_3 +200 0x4E50 //RX_FDEQ_GAIN_4 +201 0x5254 //RX_FDEQ_GAIN_5 +202 0x5658 //RX_FDEQ_GAIN_6 +203 0x5C60 //RX_FDEQ_GAIN_7 +204 0x6468 //RX_FDEQ_GAIN_8 +205 0x6C70 //RX_FDEQ_GAIN_9 +206 0x7474 //RX_FDEQ_GAIN_10 +207 0x7474 //RX_FDEQ_GAIN_11 +208 0x7474 //RX_FDEQ_GAIN_12 +209 0x7474 //RX_FDEQ_GAIN_13 +210 0x7474 //RX_FDEQ_GAIN_14 +211 0x7474 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0202 //RX_FDEQ_BIN_0 +221 0x0203 //RX_FDEQ_BIN_1 +222 0x0402 //RX_FDEQ_BIN_2 +223 0x0304 //RX_FDEQ_BIN_3 +224 0x0405 //RX_FDEQ_BIN_4 +225 0x0506 //RX_FDEQ_BIN_5 +226 0x0708 //RX_FDEQ_BIN_6 +227 0x090A //RX_FDEQ_BIN_7 +228 0x0B0C //RX_FDEQ_BIN_8 +229 0x0D0E //RX_FDEQ_BIN_9 +230 0x1214 //RX_FDEQ_BIN_10 +231 0x1E1E //RX_FDEQ_BIN_11 +232 0x1E1E //RX_FDEQ_BIN_12 +233 0x1E1E //RX_FDEQ_BIN_13 +234 0x1E1E //RX_FDEQ_BIN_14 +235 0x202C //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x4000 //RX_FDEQ_RESRV_0 +245 0x0320 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0030 //RX_FDDRC_BAND_MARGIN_1 +248 0x0050 //RX_FDDRC_BAND_MARGIN_2 +249 0x0080 //RX_FDDRC_BAND_MARGIN_3 +250 0x0007 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x5000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x6400 //RX_FDDRC_THRD_3_2 +258 0x6400 //RX_FDDRC_THRD_3_3 +259 0x2000 //RX_FDDRC_SLANT_0_0 +260 0x2000 //RX_FDDRC_SLANT_0_1 +261 0x2000 //RX_FDDRC_SLANT_0_2 +262 0x2000 //RX_FDDRC_SLANT_0_3 +263 0x5333 //RX_FDDRC_SLANT_1_0 +264 0x5333 //RX_FDDRC_SLANT_1_1 +265 0x5333 //RX_FDDRC_SLANT_1_2 +266 0x5333 //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +286 0x0100 //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 diff --git a/audio/cloudripper/tuning/fortemedia/HANDSFREE.dat b/audio/cloudripper/tuning/fortemedia/HANDSFREE.dat index 3c14fa7..91b4af9 100644 Binary files a/audio/cloudripper/tuning/fortemedia/HANDSFREE.dat and b/audio/cloudripper/tuning/fortemedia/HANDSFREE.dat differ diff --git a/audio/cloudripper/tuning/fortemedia/HANDSFREE.mods b/audio/cloudripper/tuning/fortemedia/HANDSFREE.mods index b528ddc..acf77bd 100644 --- a/audio/cloudripper/tuning/fortemedia/HANDSFREE.mods +++ b/audio/cloudripper/tuning/fortemedia/HANDSFREE.mods @@ -1,11 +1,12 @@ #PLATFORM_NAME gChip #EXPORT_FLAG HANDSFREE -#SINGLE_API_VER 1.1.6 -#SAVE_TIME 2021-12-20 16:28:16 +#SINGLE_API_VER 1.2.0 +#SAVE_TIME 2022-02-10 16:25:23 -#CASE_NAME HANDSFREE-HANDSFREE-RESERVE1-FB -#PARAM_TYPE TX+RX -#TOTAL_CUSTOM_STEP 7 +#CASE_NAME HANDSFREE-HANDFREE-RESERVE1-FB +#PARAM_MODE FULL +#PARAM_TYPE TX+2RX +#TOTAL_CUSTOM_STEP 7+7 #TX 0 0x0001 //TX_OPERATION_MODE_0 1 0x0001 //TX_OPERATION_MODE_1 @@ -258,11 +259,11 @@ 248 0xF800 //TX_THR_SN_EST_6 249 0xF800 //TX_THR_SN_EST_7 250 0x0100 //TX_DELTA_THR_SN_EST_0 -251 0x0200 //TX_DELTA_THR_SN_EST_1 -252 0x0100 //TX_DELTA_THR_SN_EST_2 -253 0x0200 //TX_DELTA_THR_SN_EST_3 +251 0x0100 //TX_DELTA_THR_SN_EST_1 +252 0x0200 //TX_DELTA_THR_SN_EST_2 +253 0x0100 //TX_DELTA_THR_SN_EST_3 254 0x0100 //TX_DELTA_THR_SN_EST_4 -255 0x0100 //TX_DELTA_THR_SN_EST_5 +255 0x0200 //TX_DELTA_THR_SN_EST_5 256 0x0200 //TX_DELTA_THR_SN_EST_6 257 0x0200 //TX_DELTA_THR_SN_EST_7 258 0x4000 //TX_LAMBDA_NN_EST_0 @@ -290,11 +291,11 @@ 280 0x1000 //TX_B_POST_FLT_1 281 0x0010 //TX_NS_LVL_CTRL_0 282 0x0014 //TX_NS_LVL_CTRL_1 -283 0x0014 //TX_NS_LVL_CTRL_2 -284 0x0018 //TX_NS_LVL_CTRL_3 -285 0x0016 //TX_NS_LVL_CTRL_4 -286 0x0014 //TX_NS_LVL_CTRL_5 -287 0x0011 //TX_NS_LVL_CTRL_6 +283 0x0018 //TX_NS_LVL_CTRL_2 +284 0x0016 //TX_NS_LVL_CTRL_3 +285 0x0014 //TX_NS_LVL_CTRL_4 +286 0x0011 //TX_NS_LVL_CTRL_5 +287 0x0014 //TX_NS_LVL_CTRL_6 288 0x0011 //TX_NS_LVL_CTRL_7 289 0x000F //TX_MIN_GAIN_S_0 290 0x0010 //TX_MIN_GAIN_S_1 @@ -312,8 +313,8 @@ 302 0x4000 //TX_SNRI_SUP_2 303 0x4000 //TX_SNRI_SUP_3 304 0x4000 //TX_SNRI_SUP_4 -305 0x4000 //TX_SNRI_SUP_5 -306 0x50C0 //TX_SNRI_SUP_6 +305 0x50C0 //TX_SNRI_SUP_5 +306 0x4000 //TX_SNRI_SUP_6 307 0x7FFF //TX_SNRI_SUP_7 308 0x7FFF //TX_THR_LFNS 309 0x0018 //TX_G_LFNS @@ -322,19 +323,19 @@ 312 0x7FFF //TX_A_POST_FILT_0 313 0x2000 //TX_A_POST_FILT_1 314 0x5000 //TX_A_POST_FILT_S_0 -315 0x6000 //TX_A_POST_FILT_S_1 -316 0x4C00 //TX_A_POST_FILT_S_2 -317 0x4000 //TX_A_POST_FILT_S_3 -318 0x6000 //TX_A_POST_FILT_S_4 -319 0x4000 //TX_A_POST_FILT_S_5 -320 0x5000 //TX_A_POST_FILT_S_6 +315 0x4C00 //TX_A_POST_FILT_S_1 +316 0x4000 //TX_A_POST_FILT_S_2 +317 0x6000 //TX_A_POST_FILT_S_3 +318 0x4000 //TX_A_POST_FILT_S_4 +319 0x5000 //TX_A_POST_FILT_S_5 +320 0x6000 //TX_A_POST_FILT_S_6 321 0x7000 //TX_A_POST_FILT_S_7 322 0x2000 //TX_B_POST_FILT_0 -323 0x1000 //TX_B_POST_FILT_1 +323 0x2000 //TX_B_POST_FILT_1 324 0x2000 //TX_B_POST_FILT_2 -325 0x2000 //TX_B_POST_FILT_3 +325 0x4000 //TX_B_POST_FILT_3 326 0x4000 //TX_B_POST_FILT_4 -327 0x4000 //TX_B_POST_FILT_5 +327 0x1000 //TX_B_POST_FILT_5 328 0x1000 //TX_B_POST_FILT_6 329 0x2000 //TX_B_POST_FILT_7 330 0x4000 //TX_B_LESSCUT_RTO_S_0 @@ -342,14 +343,14 @@ 332 0x7FFF //TX_B_LESSCUT_RTO_S_2 333 0x7FFF //TX_B_LESSCUT_RTO_S_3 334 0x7FFF //TX_B_LESSCUT_RTO_S_4 -335 0x7FFF //TX_B_LESSCUT_RTO_S_5 -336 0x6000 //TX_B_LESSCUT_RTO_S_6 +335 0x6000 //TX_B_LESSCUT_RTO_S_5 +336 0x7FFF //TX_B_LESSCUT_RTO_S_6 337 0x7FFF //TX_B_LESSCUT_RTO_S_7 338 0x7C00 //TX_LAMBDA_PFILT 339 0x7C00 //TX_LAMBDA_PFILT_S_0 340 0x7C00 //TX_LAMBDA_PFILT_S_1 -341 0x7C00 //TX_LAMBDA_PFILT_S_2 -342 0x7A00 //TX_LAMBDA_PFILT_S_3 +341 0x7A00 //TX_LAMBDA_PFILT_S_2 +342 0x7C00 //TX_LAMBDA_PFILT_S_3 343 0x7C00 //TX_LAMBDA_PFILT_S_4 344 0x7C00 //TX_LAMBDA_PFILT_S_5 345 0x7C00 //TX_LAMBDA_PFILT_S_6 @@ -387,10 +388,10 @@ 377 0x7FFF //TX_NOISE_TH_5_4 378 0x2710 //TX_NOISE_TH_6 379 0x0033 //TX_MINENOISE_TH -380 0x4000 //TX_MINENOISE_MIC0_TH_MTS -381 0xFFEE //TX_MINENOISE_MIC0_TH_EXP -382 0x6000 //TX_MINENOISE_MIC0_S_TH_MTS -383 0xFFF3 //TX_MINENOISE_MIC0_S_TH_EXP +380 0xD508 //TX_MORENS_TFMASK_TH +381 0x0001 //TX_DRC_QUIET_FLOOR +382 0x7999 //TX_RATIODTL_CUT_TH +383 0x0119 //TX_DT_CUT_K1 384 0x0666 //TX_OUT_ENER_S_TH_CLEAN 385 0x0666 //TX_OUT_ENER_S_TH_LESSCLEAN 386 0x0333 //TX_OUT_ENER_S_TH_NOISY @@ -398,15 +399,15 @@ 388 0x0333 //TX_OUT_ENER_TH_SPEECH 389 0x2000 //TX_SN_NPB_GAIN 390 0x0000 //TX_NN_NPB_GAIN -391 0x0000 //TX_CSX_ALPHA_0 -392 0x0000 //TX_CSX_ALPHA_1 -393 0x0000 //TX_CSX_ALPHA_2 -394 0x0000 //TX_CSX_ALPHA_3 -395 0x0800 //TX_MU_ARSP_EST -396 0x00C8 //TX_P_OUTBEAM_MIN_TH +391 0x7FFF //TX_POST_MASK_SUP_HSNE +392 0x1388 //TX_TAIL_DET_TH +393 0x4000 //TX_B_LESSCUT_RTO_WTA +394 0x0000 //TX_MEL_G_R +395 0x0080 //TX_SUPHIGH_TH +396 0x0000 //TX_MASK_G_R 397 0x0002 //TX_EXTRA_NS_L -398 0x0800 //TX_EXTRA_NS_A -399 0x0005 //TX_VR_NOISE_FLOOR_TH +398 0x1800 //TX_C_POST_FLT_MASK +399 0x4000 //TX_A_POST_FLT_WNS 400 0x0148 //TX_MIN_G_LOW300HZ 401 0x0002 //TX_MAXLEVEL_CNG 402 0x00B4 //TX_STN_NOISE_TH @@ -521,16 +522,16 @@ 511 0x6666 //TX_MIC_TO_BFGAIN 512 0x0000 //TX_MICTOBFGAIN0 513 0x0000 //TX_FASTMUE_TH -514 0x0000 //TX_DERVB_LEN_0 -515 0x0000 //TX_DERVB_LEN_1 -516 0x0000 //TX_RHO_DERVB -517 0x0000 //TX_MIC_INDX_DERVB -518 0x0000 //TX_MU_DERVB -519 0x0000 //TX_DR_RESRV_0 -520 0x0000 //TX_DR_RESRV_1 -521 0x0000 //TX_DR_RESRV_2 -522 0x0000 //TX_DR_RESRV_3 -523 0x0000 //TX_DR_RESRV_4 +514 0x3000 //TX_DEREVERB_LF_MU +515 0x34CD //TX_DEREVERB_HF_MU +516 0x0007 //TX_DEREVERB_DELAY +517 0x0004 //TX_DEREVERB_COEF_LEN +518 0x0003 //TX_DEREVERB_DNR +519 0x0000 //TX_DEREVERB_ALPHA +520 0x0000 //TX_DEREVERB_BETA +521 0x3A98 //TX_GSC_RTOL_TH +522 0x3A98 //TX_GSC_RTOH_TH +523 0x7E2C //TX_WIDE2_MEANHTH 524 0x0000 //TX_DR_RESRV_5 525 0x0000 //TX_DR_RESRV_6 526 0x0000 //TX_DR_RESRV_7 @@ -904,6 +905,71 @@ 894 0xC000 //TX_FASTNS_SSA_THHFL 895 0xCCCC //TX_FASTNS_SSA_THLFH 896 0xD999 //TX_FASTNS_SSA_THHFH +897 0x2339 //TX_SENDFUNC_REG_MICMUTE +898 0x0021 //TX_SENDFUNC_REG_MICMUTE1 +899 0x02BC //TX_MICMUTE_RATIO_THR +900 0x0140 //TX_MICMUTE_AMP_THR +901 0x0004 //TX_MICMUTE_HPF_IND +902 0x00C0 //TX_MICMUTE_LOG_EYR_TH +903 0x0008 //TX_MICMUTE_CVG_TIME +904 0x0008 //TX_MICMUTE_RELEASE_TIME +905 0x01FE //TX_MIC_VOLUME_MIC0MUTE +906 0x0020 //TX_MICMUTE_EPD_OFFSET_0 +907 0x001E //TX_MICMUTE_FRQ_AEC_L +908 0x7999 //TX_MICMUTE_EAD_THR +909 0x7FFF //TX_MICMUTE_LAMBDA_CB_NLE +910 0x7FFF //TX_MICMUTE_LAMBDA_RE_EST +911 0x4000 //TX_DTD_THR1_MICMUTE_0 +912 0x7000 //TX_DTD_THR1_MICMUTE_1 +913 0x7FFF //TX_DTD_THR1_MICMUTE_2 +914 0x7FFF //TX_DTD_THR1_MICMUTE_3 +915 0x6CCC //TX_DTD_THR2_MICMUTE_0 +916 0x0400 //TX_MICMUTE_MIN_EQ_RE_EST_0 +917 0x0400 //TX_MICMUTE_MIN_EQ_RE_EST_1 +918 0x1000 //TX_MICMUTE_MIN_EQ_RE_EST_2 +919 0x7FFF //TX_MICMUTE_MIN_EQ_RE_EST_3 +920 0x7FFF //TX_MICMUTE_MIN_EQ_RE_EST_4 +921 0x4000 //TX_MICMUTE_C_POST_FLT +922 0x03E8 //TX_MICMUTE_DT_CUT_K +923 0x0001 //TX_MICMUTE_DT_CUT_THR +924 0x03E8 //TX_MICMUTE_DT_CUT_K2 +925 0x0001 //TX_MICMUTE_DT_CUT_THR2 +926 0x0064 //TX_MICMUTE_DT2_HOLD_N +927 0x1000 //TX_MICMUTE_RATIODTH_THCUT +928 0x1000 //TX_MICMUTE_B_POST_FLT_ECHOL +929 0x7FFF //TX_MICMUTE_B_POST_FLT_ECHOH +930 0x0400 //TX_MICMUTE_C_POST_FLT_MASK +931 0x7999 //TX_MICMUTE_RATIODTL_CUT_TH +932 0x0258 //TX_MICMUTE_DT_CUT_K1 +933 0x0800 //TX_MICMUTE_N2_SN_EST +934 0xFC00 //TX_MICMUTE_THR_SN_EST_0 +935 0x001C //TX_MICMUTE_MIN_G_CTRL_0 +936 0x6000 //TX_MICMUTE_A_POST_FILT_S_0 +937 0x7000 //TX_MICMUTE_B_POST_FILT_0 +938 0x2710 //TX_MIC1RUB_AMP_THR +939 0x0010 //TX_MIC1MUTE_RATIO_THR +940 0x0450 //TX_MIC1MUTE_AMP_THR +941 0x0008 //TX_MIC1MUTE_CVG_TIME +942 0x0008 //TX_MIC1MUTE_RELEASE_TIME +943 0x0000 //TX_AMS_RESRV_01 +944 0x0000 //TX_AMS_RESRV_02 +945 0x0000 //TX_AMS_RESRV_03 +946 0x0000 //TX_AMS_RESRV_04 +947 0x0000 //TX_AMS_RESRV_05 +948 0x0000 //TX_AMS_RESRV_06 +949 0x0000 //TX_AMS_RESRV_07 +950 0x0000 //TX_AMS_RESRV_08 +951 0x0000 //TX_AMS_RESRV_09 +952 0x0000 //TX_AMS_RESRV_10 +953 0x0000 //TX_AMS_RESRV_11 +954 0x0000 //TX_AMS_RESRV_12 +955 0x0000 //TX_AMS_RESRV_13 +956 0x0000 //TX_AMS_RESRV_14 +957 0x0000 //TX_AMS_RESRV_15 +958 0x0000 //TX_AMS_RESRV_16 +959 0x0000 //TX_AMS_RESRV_17 +960 0x0000 //TX_AMS_RESRV_18 +961 0x0000 //TX_AMS_RESRV_19 #RX 0 0x006C //RX_RECVFUNC_MODE_0 1 0x0000 //RX_RECVFUNC_MODE_1 @@ -1755,10 +1821,862 @@ 110 0x0000 //RX_FDDRC_RESRV_0 129 0x0100 //RX_SPK_VOL 130 0x0000 //RX_VOL_RESRV_0 +#RX 2 +157 0x006C //RX_RECVFUNC_MODE_0 +158 0x0000 //RX_RECVFUNC_MODE_1 +159 0x0004 //RX_SAMPLINGFREQ_SIG +160 0x0004 //RX_SAMPLINGFREQ_PROC +161 0x000A //RX_FRAME_SZ +162 0x0000 //RX_DELAY_OPT +163 0x4000 //RX_TDDRC_ALPHA_UP_1 +164 0x4000 //RX_TDDRC_ALPHA_UP_2 +165 0x4000 //RX_TDDRC_ALPHA_UP_3 +166 0x4000 //RX_TDDRC_ALPHA_UP_4 +167 0x065B //RX_PGA +168 0x7E56 //RX_A_HP +169 0x4000 //RX_B_PE +170 0x7800 //RX_THR_PITCH_DET_0 +171 0x7000 //RX_THR_PITCH_DET_1 +172 0x6000 //RX_THR_PITCH_DET_2 +173 0x0008 //RX_PITCH_BFR_LEN +174 0x0003 //RX_SBD_PITCH_DET +175 0x0100 //RX_PP_RESRV_0 +176 0x0020 //RX_PP_RESRV_1 +177 0x0400 //RX_N_SN_EST +178 0x000C //RX_N2_SN_EST +179 0x0014 //RX_NS_LVL_CTRL +180 0xF400 //RX_THR_SN_EST +181 0x7E00 //RX_LAMBDA_PFILT +182 0x00C8 //RX_FENS_RESRV_0 +183 0x0190 //RX_FENS_RESRV_1 +184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +187 0x0002 //RX_EXTRA_NS_L +188 0x0800 //RX_EXTRA_NS_A +189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +190 0x7FFF //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +192 0x199A //RX_A_POST_FLT +193 0x0000 //RX_LMT_THRD +194 0x4000 //RX_LMT_ALPHA +195 0x0020 //RX_FDEQ_SUBNUM +196 0x4848 //RX_FDEQ_GAIN_0 +197 0x4848 //RX_FDEQ_GAIN_1 +198 0x4848 //RX_FDEQ_GAIN_2 +199 0x4870 //RX_FDEQ_GAIN_3 +200 0x4848 //RX_FDEQ_GAIN_4 +201 0x4848 //RX_FDEQ_GAIN_5 +202 0x4850 //RX_FDEQ_GAIN_6 +203 0x485C //RX_FDEQ_GAIN_7 +204 0x5C60 //RX_FDEQ_GAIN_8 +205 0x685C //RX_FDEQ_GAIN_9 +206 0x5640 //RX_FDEQ_GAIN_10 +207 0x4040 //RX_FDEQ_GAIN_11 +208 0x5C58 //RX_FDEQ_GAIN_12 +209 0x5C60 //RX_FDEQ_GAIN_13 +210 0x6060 //RX_FDEQ_GAIN_14 +211 0x6060 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0202 //RX_FDEQ_BIN_0 +221 0x0203 //RX_FDEQ_BIN_1 +222 0x0303 //RX_FDEQ_BIN_2 +223 0x0402 //RX_FDEQ_BIN_3 +224 0x0504 //RX_FDEQ_BIN_4 +225 0x0209 //RX_FDEQ_BIN_5 +226 0x0808 //RX_FDEQ_BIN_6 +227 0x090A //RX_FDEQ_BIN_7 +228 0x0B0C //RX_FDEQ_BIN_8 +229 0x0D0E //RX_FDEQ_BIN_9 +230 0x1013 //RX_FDEQ_BIN_10 +231 0x1719 //RX_FDEQ_BIN_11 +232 0x1B1E //RX_FDEQ_BIN_12 +233 0x1E1E //RX_FDEQ_BIN_13 +234 0x1E28 //RX_FDEQ_BIN_14 +235 0x282C //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x4000 //RX_FDEQ_RESRV_0 +245 0x0320 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0030 //RX_FDDRC_BAND_MARGIN_1 +248 0x0050 //RX_FDDRC_BAND_MARGIN_2 +249 0x0080 //RX_FDDRC_BAND_MARGIN_3 +250 0x0004 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x2000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x2000 //RX_FDDRC_THRD_3_2 +258 0x5000 //RX_FDDRC_THRD_3_3 +259 0x4000 //RX_FDDRC_SLANT_0_0 +260 0x4000 //RX_FDDRC_SLANT_0_1 +261 0x4000 //RX_FDDRC_SLANT_0_2 +262 0x4000 //RX_FDDRC_SLANT_0_3 +263 0x7FFF //RX_FDDRC_SLANT_1_0 +264 0x7FFF //RX_FDDRC_SLANT_1_1 +265 0x7FFF //RX_FDDRC_SLANT_1_2 +266 0x7FFF //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +268 0x0002 //RX_FILTINDX +269 0x0001 //RX_TDDRC_THRD_0 +270 0x0002 //RX_TDDRC_THRD_1 +271 0x1800 //RX_TDDRC_THRD_2 +272 0x1800 //RX_TDDRC_THRD_3 +273 0x6000 //RX_TDDRC_SLANT_0 +274 0x6E00 //RX_TDDRC_SLANT_1 +275 0x4000 //RX_TDDRC_ALPHA_UP_0 +276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x199A //RX_TDDRC_HMNC_GAIN +279 0x0001 //RX_TDDRC_SMT_FLAG +280 0x0CCD //RX_TDDRC_SMT_W +281 0x03C3 //RX_TDDRC_DRC_GAIN +282 0x7C00 //RX_LAMBDA_PKA_FP +283 0x2000 //RX_TPKA_FP +284 0x2000 //RX_MIN_G_FP +285 0x0080 //RX_MAX_G_FP +286 0x0012 //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 +288 0x0000 //RX_MAXLEVEL_CNG +289 0x3000 //RX_BWE_UV_TH +290 0x3000 //RX_BWE_UV_TH2 +291 0x1800 //RX_BWE_UV_TH3 +292 0x1000 //RX_BWE_V_TH +293 0x04CD //RX_BWE_GAIN1_V_TH1 +294 0x0F33 //RX_BWE_GAIN1_V_TH2 +295 0x7333 //RX_BWE_UV_EQ +296 0x199A //RX_BWE_V_EQ +297 0x7333 //RX_BWE_TONE_TH +298 0x0004 //RX_BWE_UV_HOLD_T +299 0x6CCD //RX_BWE_GAIN2_ALPHA +300 0x799A //RX_BWE_GAIN3_ALPHA +301 0x001E //RX_BWE_CUTOFF +302 0x3000 //RX_BWE_GAINFILL +303 0x3200 //RX_BWE_MAXTH_TONE +304 0x2000 //RX_BWE_EQ_0 +305 0x2000 //RX_BWE_EQ_1 +306 0x2000 //RX_BWE_EQ_2 +307 0x2000 //RX_BWE_EQ_3 +308 0x2000 //RX_BWE_EQ_4 +309 0x2000 //RX_BWE_EQ_5 +310 0x2000 //RX_BWE_EQ_6 +311 0x0000 //RX_BWE_RESRV_0 +312 0x0000 //RX_BWE_RESRV_1 +313 0x0000 //RX_BWE_RESRV_2 +#VOL 0 +163 0x4000 //RX_TDDRC_ALPHA_UP_1 +164 0x4000 //RX_TDDRC_ALPHA_UP_2 +165 0x4000 //RX_TDDRC_ALPHA_UP_3 +166 0x4000 //RX_TDDRC_ALPHA_UP_4 +184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +190 0x7FFF //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +269 0x0001 //RX_TDDRC_THRD_0 +270 0x0002 //RX_TDDRC_THRD_1 +271 0x1800 //RX_TDDRC_THRD_2 +272 0x1800 //RX_TDDRC_THRD_3 +273 0x6000 //RX_TDDRC_SLANT_0 +274 0x6E00 //RX_TDDRC_SLANT_1 +275 0x4000 //RX_TDDRC_ALPHA_UP_0 +276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x199A //RX_TDDRC_HMNC_GAIN +279 0x0001 //RX_TDDRC_SMT_FLAG +280 0x0CCD //RX_TDDRC_SMT_W +281 0x03C3 //RX_TDDRC_DRC_GAIN +195 0x0020 //RX_FDEQ_SUBNUM +196 0x4848 //RX_FDEQ_GAIN_0 +197 0x4848 //RX_FDEQ_GAIN_1 +198 0x4848 //RX_FDEQ_GAIN_2 +199 0x4870 //RX_FDEQ_GAIN_3 +200 0x4848 //RX_FDEQ_GAIN_4 +201 0x4848 //RX_FDEQ_GAIN_5 +202 0x4850 //RX_FDEQ_GAIN_6 +203 0x485C //RX_FDEQ_GAIN_7 +204 0x5C60 //RX_FDEQ_GAIN_8 +205 0x685C //RX_FDEQ_GAIN_9 +206 0x5640 //RX_FDEQ_GAIN_10 +207 0x4040 //RX_FDEQ_GAIN_11 +208 0x5C58 //RX_FDEQ_GAIN_12 +209 0x5C60 //RX_FDEQ_GAIN_13 +210 0x6060 //RX_FDEQ_GAIN_14 +211 0x6060 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0202 //RX_FDEQ_BIN_0 +221 0x0203 //RX_FDEQ_BIN_1 +222 0x0303 //RX_FDEQ_BIN_2 +223 0x0402 //RX_FDEQ_BIN_3 +224 0x0504 //RX_FDEQ_BIN_4 +225 0x0209 //RX_FDEQ_BIN_5 +226 0x0808 //RX_FDEQ_BIN_6 +227 0x090A //RX_FDEQ_BIN_7 +228 0x0B0C //RX_FDEQ_BIN_8 +229 0x0D0E //RX_FDEQ_BIN_9 +230 0x1013 //RX_FDEQ_BIN_10 +231 0x1719 //RX_FDEQ_BIN_11 +232 0x1B1E //RX_FDEQ_BIN_12 +233 0x1E1E //RX_FDEQ_BIN_13 +234 0x1E28 //RX_FDEQ_BIN_14 +235 0x282C //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x4000 //RX_FDEQ_RESRV_0 +245 0x0320 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0030 //RX_FDDRC_BAND_MARGIN_1 +248 0x0050 //RX_FDDRC_BAND_MARGIN_2 +249 0x0080 //RX_FDDRC_BAND_MARGIN_3 +250 0x0004 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x2000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x2000 //RX_FDDRC_THRD_3_2 +258 0x5000 //RX_FDDRC_THRD_3_3 +259 0x4000 //RX_FDDRC_SLANT_0_0 +260 0x4000 //RX_FDDRC_SLANT_0_1 +261 0x4000 //RX_FDDRC_SLANT_0_2 +262 0x4000 //RX_FDDRC_SLANT_0_3 +263 0x7FFF //RX_FDDRC_SLANT_1_0 +264 0x7FFF //RX_FDDRC_SLANT_1_1 +265 0x7FFF //RX_FDDRC_SLANT_1_2 +266 0x7FFF //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +286 0x0012 //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 +#VOL 1 +163 0x4000 //RX_TDDRC_ALPHA_UP_1 +164 0x4000 //RX_TDDRC_ALPHA_UP_2 +165 0x4000 //RX_TDDRC_ALPHA_UP_3 +166 0x4000 //RX_TDDRC_ALPHA_UP_4 +184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +190 0x7FFF //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +269 0x0001 //RX_TDDRC_THRD_0 +270 0x0002 //RX_TDDRC_THRD_1 +271 0x1800 //RX_TDDRC_THRD_2 +272 0x1800 //RX_TDDRC_THRD_3 +273 0x6000 //RX_TDDRC_SLANT_0 +274 0x6E00 //RX_TDDRC_SLANT_1 +275 0x4000 //RX_TDDRC_ALPHA_UP_0 +276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x199A //RX_TDDRC_HMNC_GAIN +279 0x0001 //RX_TDDRC_SMT_FLAG +280 0x0CCD //RX_TDDRC_SMT_W +281 0x03C3 //RX_TDDRC_DRC_GAIN +195 0x0020 //RX_FDEQ_SUBNUM +196 0x4848 //RX_FDEQ_GAIN_0 +197 0x4848 //RX_FDEQ_GAIN_1 +198 0x4848 //RX_FDEQ_GAIN_2 +199 0x4870 //RX_FDEQ_GAIN_3 +200 0x4848 //RX_FDEQ_GAIN_4 +201 0x4848 //RX_FDEQ_GAIN_5 +202 0x4850 //RX_FDEQ_GAIN_6 +203 0x485C //RX_FDEQ_GAIN_7 +204 0x5C60 //RX_FDEQ_GAIN_8 +205 0x685C //RX_FDEQ_GAIN_9 +206 0x5640 //RX_FDEQ_GAIN_10 +207 0x4040 //RX_FDEQ_GAIN_11 +208 0x5C58 //RX_FDEQ_GAIN_12 +209 0x5C60 //RX_FDEQ_GAIN_13 +210 0x6060 //RX_FDEQ_GAIN_14 +211 0x6060 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0202 //RX_FDEQ_BIN_0 +221 0x0203 //RX_FDEQ_BIN_1 +222 0x0303 //RX_FDEQ_BIN_2 +223 0x0402 //RX_FDEQ_BIN_3 +224 0x0504 //RX_FDEQ_BIN_4 +225 0x0209 //RX_FDEQ_BIN_5 +226 0x0808 //RX_FDEQ_BIN_6 +227 0x090A //RX_FDEQ_BIN_7 +228 0x0B0C //RX_FDEQ_BIN_8 +229 0x0D0E //RX_FDEQ_BIN_9 +230 0x1013 //RX_FDEQ_BIN_10 +231 0x1719 //RX_FDEQ_BIN_11 +232 0x1B1E //RX_FDEQ_BIN_12 +233 0x1E1E //RX_FDEQ_BIN_13 +234 0x1E28 //RX_FDEQ_BIN_14 +235 0x282C //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x4000 //RX_FDEQ_RESRV_0 +245 0x0320 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0030 //RX_FDDRC_BAND_MARGIN_1 +248 0x0050 //RX_FDDRC_BAND_MARGIN_2 +249 0x0080 //RX_FDDRC_BAND_MARGIN_3 +250 0x0004 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x2000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x2000 //RX_FDDRC_THRD_3_2 +258 0x5000 //RX_FDDRC_THRD_3_3 +259 0x4000 //RX_FDDRC_SLANT_0_0 +260 0x4000 //RX_FDDRC_SLANT_0_1 +261 0x4000 //RX_FDDRC_SLANT_0_2 +262 0x4000 //RX_FDDRC_SLANT_0_3 +263 0x7FFF //RX_FDDRC_SLANT_1_0 +264 0x7FFF //RX_FDDRC_SLANT_1_1 +265 0x7FFF //RX_FDDRC_SLANT_1_2 +266 0x7FFF //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +286 0x001A //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 +#VOL 2 +163 0x4000 //RX_TDDRC_ALPHA_UP_1 +164 0x4000 //RX_TDDRC_ALPHA_UP_2 +165 0x4000 //RX_TDDRC_ALPHA_UP_3 +166 0x4000 //RX_TDDRC_ALPHA_UP_4 +184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +190 0x7FFF //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +269 0x0001 //RX_TDDRC_THRD_0 +270 0x0002 //RX_TDDRC_THRD_1 +271 0x1800 //RX_TDDRC_THRD_2 +272 0x1800 //RX_TDDRC_THRD_3 +273 0x6000 //RX_TDDRC_SLANT_0 +274 0x6E00 //RX_TDDRC_SLANT_1 +275 0x4000 //RX_TDDRC_ALPHA_UP_0 +276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x199A //RX_TDDRC_HMNC_GAIN +279 0x0001 //RX_TDDRC_SMT_FLAG +280 0x0CCD //RX_TDDRC_SMT_W +281 0x03C3 //RX_TDDRC_DRC_GAIN +195 0x0020 //RX_FDEQ_SUBNUM +196 0x4848 //RX_FDEQ_GAIN_0 +197 0x4848 //RX_FDEQ_GAIN_1 +198 0x4848 //RX_FDEQ_GAIN_2 +199 0x4870 //RX_FDEQ_GAIN_3 +200 0x4848 //RX_FDEQ_GAIN_4 +201 0x4848 //RX_FDEQ_GAIN_5 +202 0x4850 //RX_FDEQ_GAIN_6 +203 0x485C //RX_FDEQ_GAIN_7 +204 0x5C60 //RX_FDEQ_GAIN_8 +205 0x685C //RX_FDEQ_GAIN_9 +206 0x5640 //RX_FDEQ_GAIN_10 +207 0x4040 //RX_FDEQ_GAIN_11 +208 0x5C58 //RX_FDEQ_GAIN_12 +209 0x5C60 //RX_FDEQ_GAIN_13 +210 0x6060 //RX_FDEQ_GAIN_14 +211 0x6060 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0202 //RX_FDEQ_BIN_0 +221 0x0203 //RX_FDEQ_BIN_1 +222 0x0303 //RX_FDEQ_BIN_2 +223 0x0402 //RX_FDEQ_BIN_3 +224 0x0504 //RX_FDEQ_BIN_4 +225 0x0209 //RX_FDEQ_BIN_5 +226 0x0808 //RX_FDEQ_BIN_6 +227 0x090A //RX_FDEQ_BIN_7 +228 0x0B0C //RX_FDEQ_BIN_8 +229 0x0D0E //RX_FDEQ_BIN_9 +230 0x1013 //RX_FDEQ_BIN_10 +231 0x1719 //RX_FDEQ_BIN_11 +232 0x1B1E //RX_FDEQ_BIN_12 +233 0x1E1E //RX_FDEQ_BIN_13 +234 0x1E28 //RX_FDEQ_BIN_14 +235 0x282C //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x4000 //RX_FDEQ_RESRV_0 +245 0x0320 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0030 //RX_FDDRC_BAND_MARGIN_1 +248 0x0050 //RX_FDDRC_BAND_MARGIN_2 +249 0x0080 //RX_FDDRC_BAND_MARGIN_3 +250 0x0004 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x2000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x2000 //RX_FDDRC_THRD_3_2 +258 0x5000 //RX_FDDRC_THRD_3_3 +259 0x4000 //RX_FDDRC_SLANT_0_0 +260 0x4000 //RX_FDDRC_SLANT_0_1 +261 0x4000 //RX_FDDRC_SLANT_0_2 +262 0x4000 //RX_FDDRC_SLANT_0_3 +263 0x7FFF //RX_FDDRC_SLANT_1_0 +264 0x7FFF //RX_FDDRC_SLANT_1_1 +265 0x7FFF //RX_FDDRC_SLANT_1_2 +266 0x7FFF //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +286 0x0025 //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 +#VOL 3 +163 0x4000 //RX_TDDRC_ALPHA_UP_1 +164 0x4000 //RX_TDDRC_ALPHA_UP_2 +165 0x4000 //RX_TDDRC_ALPHA_UP_3 +166 0x4000 //RX_TDDRC_ALPHA_UP_4 +184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +190 0x7FFF //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +269 0x0001 //RX_TDDRC_THRD_0 +270 0x0002 //RX_TDDRC_THRD_1 +271 0x1800 //RX_TDDRC_THRD_2 +272 0x1800 //RX_TDDRC_THRD_3 +273 0x6000 //RX_TDDRC_SLANT_0 +274 0x6E00 //RX_TDDRC_SLANT_1 +275 0x4000 //RX_TDDRC_ALPHA_UP_0 +276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x199A //RX_TDDRC_HMNC_GAIN +279 0x0001 //RX_TDDRC_SMT_FLAG +280 0x0CCD //RX_TDDRC_SMT_W +281 0x03C3 //RX_TDDRC_DRC_GAIN +195 0x0020 //RX_FDEQ_SUBNUM +196 0x4848 //RX_FDEQ_GAIN_0 +197 0x4848 //RX_FDEQ_GAIN_1 +198 0x4848 //RX_FDEQ_GAIN_2 +199 0x4870 //RX_FDEQ_GAIN_3 +200 0x4848 //RX_FDEQ_GAIN_4 +201 0x4848 //RX_FDEQ_GAIN_5 +202 0x4850 //RX_FDEQ_GAIN_6 +203 0x485C //RX_FDEQ_GAIN_7 +204 0x5C60 //RX_FDEQ_GAIN_8 +205 0x685C //RX_FDEQ_GAIN_9 +206 0x5640 //RX_FDEQ_GAIN_10 +207 0x4040 //RX_FDEQ_GAIN_11 +208 0x5C58 //RX_FDEQ_GAIN_12 +209 0x5C60 //RX_FDEQ_GAIN_13 +210 0x6060 //RX_FDEQ_GAIN_14 +211 0x6060 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0202 //RX_FDEQ_BIN_0 +221 0x0203 //RX_FDEQ_BIN_1 +222 0x0303 //RX_FDEQ_BIN_2 +223 0x0402 //RX_FDEQ_BIN_3 +224 0x0504 //RX_FDEQ_BIN_4 +225 0x0209 //RX_FDEQ_BIN_5 +226 0x0808 //RX_FDEQ_BIN_6 +227 0x090A //RX_FDEQ_BIN_7 +228 0x0B0C //RX_FDEQ_BIN_8 +229 0x0D0E //RX_FDEQ_BIN_9 +230 0x1013 //RX_FDEQ_BIN_10 +231 0x1719 //RX_FDEQ_BIN_11 +232 0x1B1E //RX_FDEQ_BIN_12 +233 0x1E1E //RX_FDEQ_BIN_13 +234 0x1E28 //RX_FDEQ_BIN_14 +235 0x282C //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x4000 //RX_FDEQ_RESRV_0 +245 0x0320 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0030 //RX_FDDRC_BAND_MARGIN_1 +248 0x0050 //RX_FDDRC_BAND_MARGIN_2 +249 0x0080 //RX_FDDRC_BAND_MARGIN_3 +250 0x0004 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x2000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x2000 //RX_FDDRC_THRD_3_2 +258 0x5000 //RX_FDDRC_THRD_3_3 +259 0x4000 //RX_FDDRC_SLANT_0_0 +260 0x4000 //RX_FDDRC_SLANT_0_1 +261 0x4000 //RX_FDDRC_SLANT_0_2 +262 0x4000 //RX_FDDRC_SLANT_0_3 +263 0x7FFF //RX_FDDRC_SLANT_1_0 +264 0x7FFF //RX_FDDRC_SLANT_1_1 +265 0x7FFF //RX_FDDRC_SLANT_1_2 +266 0x7FFF //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +286 0x0034 //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 +#VOL 4 +163 0x4000 //RX_TDDRC_ALPHA_UP_1 +164 0x4000 //RX_TDDRC_ALPHA_UP_2 +165 0x4000 //RX_TDDRC_ALPHA_UP_3 +166 0x4000 //RX_TDDRC_ALPHA_UP_4 +184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +190 0x7FFF //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +269 0x0001 //RX_TDDRC_THRD_0 +270 0x0002 //RX_TDDRC_THRD_1 +271 0x1800 //RX_TDDRC_THRD_2 +272 0x1800 //RX_TDDRC_THRD_3 +273 0x6000 //RX_TDDRC_SLANT_0 +274 0x6E00 //RX_TDDRC_SLANT_1 +275 0x4000 //RX_TDDRC_ALPHA_UP_0 +276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x199A //RX_TDDRC_HMNC_GAIN +279 0x0001 //RX_TDDRC_SMT_FLAG +280 0x0CCD //RX_TDDRC_SMT_W +281 0x03C3 //RX_TDDRC_DRC_GAIN +195 0x0020 //RX_FDEQ_SUBNUM +196 0x4848 //RX_FDEQ_GAIN_0 +197 0x4848 //RX_FDEQ_GAIN_1 +198 0x4848 //RX_FDEQ_GAIN_2 +199 0x4870 //RX_FDEQ_GAIN_3 +200 0x4848 //RX_FDEQ_GAIN_4 +201 0x4848 //RX_FDEQ_GAIN_5 +202 0x4850 //RX_FDEQ_GAIN_6 +203 0x485C //RX_FDEQ_GAIN_7 +204 0x5C60 //RX_FDEQ_GAIN_8 +205 0x685C //RX_FDEQ_GAIN_9 +206 0x5640 //RX_FDEQ_GAIN_10 +207 0x4040 //RX_FDEQ_GAIN_11 +208 0x5C58 //RX_FDEQ_GAIN_12 +209 0x5C60 //RX_FDEQ_GAIN_13 +210 0x6060 //RX_FDEQ_GAIN_14 +211 0x6060 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0202 //RX_FDEQ_BIN_0 +221 0x0203 //RX_FDEQ_BIN_1 +222 0x0303 //RX_FDEQ_BIN_2 +223 0x0402 //RX_FDEQ_BIN_3 +224 0x0504 //RX_FDEQ_BIN_4 +225 0x0209 //RX_FDEQ_BIN_5 +226 0x0808 //RX_FDEQ_BIN_6 +227 0x090A //RX_FDEQ_BIN_7 +228 0x0B0C //RX_FDEQ_BIN_8 +229 0x0D0E //RX_FDEQ_BIN_9 +230 0x1013 //RX_FDEQ_BIN_10 +231 0x1719 //RX_FDEQ_BIN_11 +232 0x1B1E //RX_FDEQ_BIN_12 +233 0x1E1E //RX_FDEQ_BIN_13 +234 0x1E28 //RX_FDEQ_BIN_14 +235 0x282C //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x4000 //RX_FDEQ_RESRV_0 +245 0x0320 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0030 //RX_FDDRC_BAND_MARGIN_1 +248 0x0050 //RX_FDDRC_BAND_MARGIN_2 +249 0x0080 //RX_FDDRC_BAND_MARGIN_3 +250 0x0004 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x2000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x2000 //RX_FDDRC_THRD_3_2 +258 0x5000 //RX_FDDRC_THRD_3_3 +259 0x4000 //RX_FDDRC_SLANT_0_0 +260 0x4000 //RX_FDDRC_SLANT_0_1 +261 0x4000 //RX_FDDRC_SLANT_0_2 +262 0x4000 //RX_FDDRC_SLANT_0_3 +263 0x7FFF //RX_FDDRC_SLANT_1_0 +264 0x7FFF //RX_FDDRC_SLANT_1_1 +265 0x7FFF //RX_FDDRC_SLANT_1_2 +266 0x7FFF //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +286 0x004D //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 +#VOL 5 +163 0x4000 //RX_TDDRC_ALPHA_UP_1 +164 0x4000 //RX_TDDRC_ALPHA_UP_2 +165 0x4000 //RX_TDDRC_ALPHA_UP_3 +166 0x4000 //RX_TDDRC_ALPHA_UP_4 +184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +190 0x7FFF //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +269 0x0001 //RX_TDDRC_THRD_0 +270 0x0002 //RX_TDDRC_THRD_1 +271 0x1800 //RX_TDDRC_THRD_2 +272 0x1800 //RX_TDDRC_THRD_3 +273 0x6000 //RX_TDDRC_SLANT_0 +274 0x6E00 //RX_TDDRC_SLANT_1 +275 0x4000 //RX_TDDRC_ALPHA_UP_0 +276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x199A //RX_TDDRC_HMNC_GAIN +279 0x0001 //RX_TDDRC_SMT_FLAG +280 0x0CCD //RX_TDDRC_SMT_W +281 0x03C3 //RX_TDDRC_DRC_GAIN +195 0x0020 //RX_FDEQ_SUBNUM +196 0x4848 //RX_FDEQ_GAIN_0 +197 0x4848 //RX_FDEQ_GAIN_1 +198 0x4848 //RX_FDEQ_GAIN_2 +199 0x4870 //RX_FDEQ_GAIN_3 +200 0x4848 //RX_FDEQ_GAIN_4 +201 0x4848 //RX_FDEQ_GAIN_5 +202 0x4850 //RX_FDEQ_GAIN_6 +203 0x485C //RX_FDEQ_GAIN_7 +204 0x5C60 //RX_FDEQ_GAIN_8 +205 0x685C //RX_FDEQ_GAIN_9 +206 0x5640 //RX_FDEQ_GAIN_10 +207 0x4040 //RX_FDEQ_GAIN_11 +208 0x5C58 //RX_FDEQ_GAIN_12 +209 0x5C60 //RX_FDEQ_GAIN_13 +210 0x6060 //RX_FDEQ_GAIN_14 +211 0x6060 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0202 //RX_FDEQ_BIN_0 +221 0x0203 //RX_FDEQ_BIN_1 +222 0x0303 //RX_FDEQ_BIN_2 +223 0x0402 //RX_FDEQ_BIN_3 +224 0x0504 //RX_FDEQ_BIN_4 +225 0x0209 //RX_FDEQ_BIN_5 +226 0x0808 //RX_FDEQ_BIN_6 +227 0x090A //RX_FDEQ_BIN_7 +228 0x0B0C //RX_FDEQ_BIN_8 +229 0x0D0E //RX_FDEQ_BIN_9 +230 0x1013 //RX_FDEQ_BIN_10 +231 0x1719 //RX_FDEQ_BIN_11 +232 0x1B1E //RX_FDEQ_BIN_12 +233 0x1E1E //RX_FDEQ_BIN_13 +234 0x1E28 //RX_FDEQ_BIN_14 +235 0x282C //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x4000 //RX_FDEQ_RESRV_0 +245 0x0320 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0030 //RX_FDDRC_BAND_MARGIN_1 +248 0x0050 //RX_FDDRC_BAND_MARGIN_2 +249 0x0080 //RX_FDDRC_BAND_MARGIN_3 +250 0x0004 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x2000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x2000 //RX_FDDRC_THRD_3_2 +258 0x5000 //RX_FDDRC_THRD_3_3 +259 0x4000 //RX_FDDRC_SLANT_0_0 +260 0x4000 //RX_FDDRC_SLANT_0_1 +261 0x4000 //RX_FDDRC_SLANT_0_2 +262 0x4000 //RX_FDDRC_SLANT_0_3 +263 0x7FFF //RX_FDDRC_SLANT_1_0 +264 0x7FFF //RX_FDDRC_SLANT_1_1 +265 0x7FFF //RX_FDDRC_SLANT_1_2 +266 0x7FFF //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +286 0x0074 //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 +#VOL 6 +163 0x4000 //RX_TDDRC_ALPHA_UP_1 +164 0x4000 //RX_TDDRC_ALPHA_UP_2 +165 0x4000 //RX_TDDRC_ALPHA_UP_3 +166 0x4000 //RX_TDDRC_ALPHA_UP_4 +184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +190 0x7FFF //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +269 0x0001 //RX_TDDRC_THRD_0 +270 0x0002 //RX_TDDRC_THRD_1 +271 0x1800 //RX_TDDRC_THRD_2 +272 0x1800 //RX_TDDRC_THRD_3 +273 0x6000 //RX_TDDRC_SLANT_0 +274 0x6E00 //RX_TDDRC_SLANT_1 +275 0x4000 //RX_TDDRC_ALPHA_UP_0 +276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x199A //RX_TDDRC_HMNC_GAIN +279 0x0001 //RX_TDDRC_SMT_FLAG +280 0x0CCD //RX_TDDRC_SMT_W +281 0x03C3 //RX_TDDRC_DRC_GAIN +195 0x0020 //RX_FDEQ_SUBNUM +196 0x4848 //RX_FDEQ_GAIN_0 +197 0x4848 //RX_FDEQ_GAIN_1 +198 0x4848 //RX_FDEQ_GAIN_2 +199 0x4870 //RX_FDEQ_GAIN_3 +200 0x4848 //RX_FDEQ_GAIN_4 +201 0x4848 //RX_FDEQ_GAIN_5 +202 0x4850 //RX_FDEQ_GAIN_6 +203 0x485C //RX_FDEQ_GAIN_7 +204 0x5C60 //RX_FDEQ_GAIN_8 +205 0x685C //RX_FDEQ_GAIN_9 +206 0x5640 //RX_FDEQ_GAIN_10 +207 0x4040 //RX_FDEQ_GAIN_11 +208 0x5C58 //RX_FDEQ_GAIN_12 +209 0x5C60 //RX_FDEQ_GAIN_13 +210 0x6060 //RX_FDEQ_GAIN_14 +211 0x6060 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0202 //RX_FDEQ_BIN_0 +221 0x0203 //RX_FDEQ_BIN_1 +222 0x0303 //RX_FDEQ_BIN_2 +223 0x0402 //RX_FDEQ_BIN_3 +224 0x0504 //RX_FDEQ_BIN_4 +225 0x0209 //RX_FDEQ_BIN_5 +226 0x0808 //RX_FDEQ_BIN_6 +227 0x090A //RX_FDEQ_BIN_7 +228 0x0B0C //RX_FDEQ_BIN_8 +229 0x0D0E //RX_FDEQ_BIN_9 +230 0x1013 //RX_FDEQ_BIN_10 +231 0x1719 //RX_FDEQ_BIN_11 +232 0x1B1E //RX_FDEQ_BIN_12 +233 0x1E1E //RX_FDEQ_BIN_13 +234 0x1E28 //RX_FDEQ_BIN_14 +235 0x282C //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x4000 //RX_FDEQ_RESRV_0 +245 0x0320 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0030 //RX_FDDRC_BAND_MARGIN_1 +248 0x0050 //RX_FDDRC_BAND_MARGIN_2 +249 0x0080 //RX_FDDRC_BAND_MARGIN_3 +250 0x0004 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x2000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x2000 //RX_FDDRC_THRD_3_2 +258 0x5000 //RX_FDDRC_THRD_3_3 +259 0x4000 //RX_FDDRC_SLANT_0_0 +260 0x4000 //RX_FDDRC_SLANT_0_1 +261 0x4000 //RX_FDDRC_SLANT_0_2 +262 0x4000 //RX_FDDRC_SLANT_0_3 +263 0x7FFF //RX_FDDRC_SLANT_1_0 +264 0x7FFF //RX_FDDRC_SLANT_1_1 +265 0x7FFF //RX_FDDRC_SLANT_1_2 +266 0x7FFF //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +286 0x0100 //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 -#CASE_NAME HANDSFREE-HANDSFREE-CUSTOM2-FB -#PARAM_TYPE TX+RX -#TOTAL_CUSTOM_STEP 7 +#CASE_NAME HANDSFREE-HANDFREE-CUSTOM2-FB +#PARAM_MODE FULL +#PARAM_TYPE TX+2RX +#TOTAL_CUSTOM_STEP 7+7 #TX 0 0x0001 //TX_OPERATION_MODE_0 1 0x0001 //TX_OPERATION_MODE_1 @@ -2011,11 +2929,11 @@ 248 0xF800 //TX_THR_SN_EST_6 249 0xF800 //TX_THR_SN_EST_7 250 0x0100 //TX_DELTA_THR_SN_EST_0 -251 0x0200 //TX_DELTA_THR_SN_EST_1 -252 0x0100 //TX_DELTA_THR_SN_EST_2 -253 0x0200 //TX_DELTA_THR_SN_EST_3 +251 0x0100 //TX_DELTA_THR_SN_EST_1 +252 0x0200 //TX_DELTA_THR_SN_EST_2 +253 0x0100 //TX_DELTA_THR_SN_EST_3 254 0x0100 //TX_DELTA_THR_SN_EST_4 -255 0x0100 //TX_DELTA_THR_SN_EST_5 +255 0x0200 //TX_DELTA_THR_SN_EST_5 256 0x0200 //TX_DELTA_THR_SN_EST_6 257 0x0200 //TX_DELTA_THR_SN_EST_7 258 0x4000 //TX_LAMBDA_NN_EST_0 @@ -2043,11 +2961,11 @@ 280 0x1000 //TX_B_POST_FLT_1 281 0x0010 //TX_NS_LVL_CTRL_0 282 0x0014 //TX_NS_LVL_CTRL_1 -283 0x0014 //TX_NS_LVL_CTRL_2 -284 0x0018 //TX_NS_LVL_CTRL_3 -285 0x0016 //TX_NS_LVL_CTRL_4 -286 0x0014 //TX_NS_LVL_CTRL_5 -287 0x0011 //TX_NS_LVL_CTRL_6 +283 0x0018 //TX_NS_LVL_CTRL_2 +284 0x0016 //TX_NS_LVL_CTRL_3 +285 0x0014 //TX_NS_LVL_CTRL_4 +286 0x0011 //TX_NS_LVL_CTRL_5 +287 0x0014 //TX_NS_LVL_CTRL_6 288 0x0011 //TX_NS_LVL_CTRL_7 289 0x000F //TX_MIN_GAIN_S_0 290 0x0010 //TX_MIN_GAIN_S_1 @@ -2065,8 +2983,8 @@ 302 0x4000 //TX_SNRI_SUP_2 303 0x4000 //TX_SNRI_SUP_3 304 0x4000 //TX_SNRI_SUP_4 -305 0x4000 //TX_SNRI_SUP_5 -306 0x50C0 //TX_SNRI_SUP_6 +305 0x50C0 //TX_SNRI_SUP_5 +306 0x4000 //TX_SNRI_SUP_6 307 0x7FFF //TX_SNRI_SUP_7 308 0x7FFF //TX_THR_LFNS 309 0x0018 //TX_G_LFNS @@ -2075,19 +2993,19 @@ 312 0x7FFF //TX_A_POST_FILT_0 313 0x2000 //TX_A_POST_FILT_1 314 0x5000 //TX_A_POST_FILT_S_0 -315 0x6000 //TX_A_POST_FILT_S_1 -316 0x4C00 //TX_A_POST_FILT_S_2 -317 0x4000 //TX_A_POST_FILT_S_3 -318 0x6000 //TX_A_POST_FILT_S_4 -319 0x4000 //TX_A_POST_FILT_S_5 -320 0x5000 //TX_A_POST_FILT_S_6 +315 0x4C00 //TX_A_POST_FILT_S_1 +316 0x4000 //TX_A_POST_FILT_S_2 +317 0x6000 //TX_A_POST_FILT_S_3 +318 0x4000 //TX_A_POST_FILT_S_4 +319 0x5000 //TX_A_POST_FILT_S_5 +320 0x6000 //TX_A_POST_FILT_S_6 321 0x7000 //TX_A_POST_FILT_S_7 322 0x2000 //TX_B_POST_FILT_0 -323 0x1000 //TX_B_POST_FILT_1 +323 0x2000 //TX_B_POST_FILT_1 324 0x2000 //TX_B_POST_FILT_2 -325 0x2000 //TX_B_POST_FILT_3 +325 0x4000 //TX_B_POST_FILT_3 326 0x4000 //TX_B_POST_FILT_4 -327 0x4000 //TX_B_POST_FILT_5 +327 0x1000 //TX_B_POST_FILT_5 328 0x1000 //TX_B_POST_FILT_6 329 0x2000 //TX_B_POST_FILT_7 330 0x4000 //TX_B_LESSCUT_RTO_S_0 @@ -2095,14 +3013,14 @@ 332 0x7FFF //TX_B_LESSCUT_RTO_S_2 333 0x7FFF //TX_B_LESSCUT_RTO_S_3 334 0x7FFF //TX_B_LESSCUT_RTO_S_4 -335 0x7FFF //TX_B_LESSCUT_RTO_S_5 -336 0x6000 //TX_B_LESSCUT_RTO_S_6 +335 0x6000 //TX_B_LESSCUT_RTO_S_5 +336 0x7FFF //TX_B_LESSCUT_RTO_S_6 337 0x7FFF //TX_B_LESSCUT_RTO_S_7 338 0x7C00 //TX_LAMBDA_PFILT 339 0x7C00 //TX_LAMBDA_PFILT_S_0 340 0x7C00 //TX_LAMBDA_PFILT_S_1 -341 0x7C00 //TX_LAMBDA_PFILT_S_2 -342 0x7A00 //TX_LAMBDA_PFILT_S_3 +341 0x7A00 //TX_LAMBDA_PFILT_S_2 +342 0x7C00 //TX_LAMBDA_PFILT_S_3 343 0x7C00 //TX_LAMBDA_PFILT_S_4 344 0x7C00 //TX_LAMBDA_PFILT_S_5 345 0x7C00 //TX_LAMBDA_PFILT_S_6 @@ -2140,10 +3058,10 @@ 377 0x7FFF //TX_NOISE_TH_5_4 378 0x2710 //TX_NOISE_TH_6 379 0x0033 //TX_MINENOISE_TH -380 0x4000 //TX_MINENOISE_MIC0_TH_MTS -381 0xFFEE //TX_MINENOISE_MIC0_TH_EXP -382 0x6000 //TX_MINENOISE_MIC0_S_TH_MTS -383 0xFFF3 //TX_MINENOISE_MIC0_S_TH_EXP +380 0xD508 //TX_MORENS_TFMASK_TH +381 0x0001 //TX_DRC_QUIET_FLOOR +382 0x7999 //TX_RATIODTL_CUT_TH +383 0x0119 //TX_DT_CUT_K1 384 0x0666 //TX_OUT_ENER_S_TH_CLEAN 385 0x0666 //TX_OUT_ENER_S_TH_LESSCLEAN 386 0x0333 //TX_OUT_ENER_S_TH_NOISY @@ -2151,15 +3069,15 @@ 388 0x0333 //TX_OUT_ENER_TH_SPEECH 389 0x2000 //TX_SN_NPB_GAIN 390 0x0000 //TX_NN_NPB_GAIN -391 0x0000 //TX_CSX_ALPHA_0 -392 0x0000 //TX_CSX_ALPHA_1 -393 0x0000 //TX_CSX_ALPHA_2 -394 0x0000 //TX_CSX_ALPHA_3 -395 0x0800 //TX_MU_ARSP_EST -396 0x00C8 //TX_P_OUTBEAM_MIN_TH +391 0x7FFF //TX_POST_MASK_SUP_HSNE +392 0x1388 //TX_TAIL_DET_TH +393 0x4000 //TX_B_LESSCUT_RTO_WTA +394 0x0000 //TX_MEL_G_R +395 0x0080 //TX_SUPHIGH_TH +396 0x0000 //TX_MASK_G_R 397 0x0002 //TX_EXTRA_NS_L -398 0x0800 //TX_EXTRA_NS_A -399 0x0005 //TX_VR_NOISE_FLOOR_TH +398 0x1800 //TX_C_POST_FLT_MASK +399 0x4000 //TX_A_POST_FLT_WNS 400 0x0148 //TX_MIN_G_LOW300HZ 401 0x0002 //TX_MAXLEVEL_CNG 402 0x00B4 //TX_STN_NOISE_TH @@ -2274,16 +3192,16 @@ 511 0x6666 //TX_MIC_TO_BFGAIN 512 0x0000 //TX_MICTOBFGAIN0 513 0x0000 //TX_FASTMUE_TH -514 0x0000 //TX_DERVB_LEN_0 -515 0x0000 //TX_DERVB_LEN_1 -516 0x0000 //TX_RHO_DERVB -517 0x0000 //TX_MIC_INDX_DERVB -518 0x0000 //TX_MU_DERVB -519 0x0000 //TX_DR_RESRV_0 -520 0x0000 //TX_DR_RESRV_1 -521 0x0000 //TX_DR_RESRV_2 -522 0x0000 //TX_DR_RESRV_3 -523 0x0000 //TX_DR_RESRV_4 +514 0x3000 //TX_DEREVERB_LF_MU +515 0x34CD //TX_DEREVERB_HF_MU +516 0x0007 //TX_DEREVERB_DELAY +517 0x0004 //TX_DEREVERB_COEF_LEN +518 0x0003 //TX_DEREVERB_DNR +519 0x0000 //TX_DEREVERB_ALPHA +520 0x0000 //TX_DEREVERB_BETA +521 0x3A98 //TX_GSC_RTOL_TH +522 0x3A98 //TX_GSC_RTOH_TH +523 0x7E2C //TX_WIDE2_MEANHTH 524 0x0000 //TX_DR_RESRV_5 525 0x0000 //TX_DR_RESRV_6 526 0x0000 //TX_DR_RESRV_7 @@ -2657,6 +3575,71 @@ 894 0xC000 //TX_FASTNS_SSA_THHFL 895 0xCCCC //TX_FASTNS_SSA_THLFH 896 0xD999 //TX_FASTNS_SSA_THHFH +897 0x2339 //TX_SENDFUNC_REG_MICMUTE +898 0x0021 //TX_SENDFUNC_REG_MICMUTE1 +899 0x02BC //TX_MICMUTE_RATIO_THR +900 0x0140 //TX_MICMUTE_AMP_THR +901 0x0004 //TX_MICMUTE_HPF_IND +902 0x00C0 //TX_MICMUTE_LOG_EYR_TH +903 0x0008 //TX_MICMUTE_CVG_TIME +904 0x0008 //TX_MICMUTE_RELEASE_TIME +905 0x01FE //TX_MIC_VOLUME_MIC0MUTE +906 0x0020 //TX_MICMUTE_EPD_OFFSET_0 +907 0x001E //TX_MICMUTE_FRQ_AEC_L +908 0x7999 //TX_MICMUTE_EAD_THR +909 0x7FFF //TX_MICMUTE_LAMBDA_CB_NLE +910 0x7FFF //TX_MICMUTE_LAMBDA_RE_EST +911 0x4000 //TX_DTD_THR1_MICMUTE_0 +912 0x7000 //TX_DTD_THR1_MICMUTE_1 +913 0x7FFF //TX_DTD_THR1_MICMUTE_2 +914 0x7FFF //TX_DTD_THR1_MICMUTE_3 +915 0x6CCC //TX_DTD_THR2_MICMUTE_0 +916 0x0400 //TX_MICMUTE_MIN_EQ_RE_EST_0 +917 0x0400 //TX_MICMUTE_MIN_EQ_RE_EST_1 +918 0x1000 //TX_MICMUTE_MIN_EQ_RE_EST_2 +919 0x7FFF //TX_MICMUTE_MIN_EQ_RE_EST_3 +920 0x7FFF //TX_MICMUTE_MIN_EQ_RE_EST_4 +921 0x4000 //TX_MICMUTE_C_POST_FLT +922 0x03E8 //TX_MICMUTE_DT_CUT_K +923 0x0001 //TX_MICMUTE_DT_CUT_THR +924 0x03E8 //TX_MICMUTE_DT_CUT_K2 +925 0x0001 //TX_MICMUTE_DT_CUT_THR2 +926 0x0064 //TX_MICMUTE_DT2_HOLD_N +927 0x1000 //TX_MICMUTE_RATIODTH_THCUT +928 0x1000 //TX_MICMUTE_B_POST_FLT_ECHOL +929 0x7FFF //TX_MICMUTE_B_POST_FLT_ECHOH +930 0x0400 //TX_MICMUTE_C_POST_FLT_MASK +931 0x7999 //TX_MICMUTE_RATIODTL_CUT_TH +932 0x0258 //TX_MICMUTE_DT_CUT_K1 +933 0x0800 //TX_MICMUTE_N2_SN_EST +934 0xFC00 //TX_MICMUTE_THR_SN_EST_0 +935 0x001C //TX_MICMUTE_MIN_G_CTRL_0 +936 0x6000 //TX_MICMUTE_A_POST_FILT_S_0 +937 0x7000 //TX_MICMUTE_B_POST_FILT_0 +938 0x2710 //TX_MIC1RUB_AMP_THR +939 0x0010 //TX_MIC1MUTE_RATIO_THR +940 0x0450 //TX_MIC1MUTE_AMP_THR +941 0x0008 //TX_MIC1MUTE_CVG_TIME +942 0x0008 //TX_MIC1MUTE_RELEASE_TIME +943 0x0000 //TX_AMS_RESRV_01 +944 0x0000 //TX_AMS_RESRV_02 +945 0x0000 //TX_AMS_RESRV_03 +946 0x0000 //TX_AMS_RESRV_04 +947 0x0000 //TX_AMS_RESRV_05 +948 0x0000 //TX_AMS_RESRV_06 +949 0x0000 //TX_AMS_RESRV_07 +950 0x0000 //TX_AMS_RESRV_08 +951 0x0000 //TX_AMS_RESRV_09 +952 0x0000 //TX_AMS_RESRV_10 +953 0x0000 //TX_AMS_RESRV_11 +954 0x0000 //TX_AMS_RESRV_12 +955 0x0000 //TX_AMS_RESRV_13 +956 0x0000 //TX_AMS_RESRV_14 +957 0x0000 //TX_AMS_RESRV_15 +958 0x0000 //TX_AMS_RESRV_16 +959 0x0000 //TX_AMS_RESRV_17 +960 0x0000 //TX_AMS_RESRV_18 +961 0x0000 //TX_AMS_RESRV_19 #RX 0 0x006C //RX_RECVFUNC_MODE_0 1 0x0000 //RX_RECVFUNC_MODE_1 @@ -3508,10 +4491,862 @@ 110 0x0000 //RX_FDDRC_RESRV_0 129 0x0100 //RX_SPK_VOL 130 0x0000 //RX_VOL_RESRV_0 +#RX 2 +157 0x006C //_ +158 0x0000 //_ +159 0x0004 //_ +160 0x0004 //_ +161 0x000A //_ +162 0x0000 //_ +163 0x4000 //_ +164 0x4000 //_ +165 0x4000 //_ +166 0x4000 //_ +167 0x065B //_ +168 0x7E56 //_ +169 0x4000 //_ +170 0x7800 //_ +171 0x7000 //_ +172 0x6000 //_ +173 0x0008 //_ +174 0x0003 //_ +175 0x0100 //_ +176 0x0020 //_ +177 0x0400 //_ +178 0x000C //_ +179 0x0014 //_ +180 0xF400 //_ +181 0x7E00 //_ +182 0x00C8 //_ +183 0x0190 //_ +184 0x7EB8 //_ +185 0x7EB8 //_ +186 0x7EB8 //_ +187 0x0002 //_ +188 0x0800 //_ +189 0x7EB8 //_ +190 0x7FFF //_ +191 0x0800 //_ +192 0x199A //_ +193 0x0000 //_ +194 0x4000 //_ +195 0x0020 //_ +196 0x4848 //_ +197 0x4848 //_ +198 0x4848 //_ +199 0x4870 //_ +200 0x4848 //_ +201 0x4848 //_ +202 0x4850 //_ +203 0x485C //_ +204 0x5C60 //_ +205 0x685C //_ +206 0x5640 //_ +207 0x4040 //_ +208 0x5C58 //_ +209 0x5C60 //_ +210 0x6060 //_ +211 0x6060 //_ +212 0x4848 //_ +213 0x4848 //_ +214 0x4848 //_ +215 0x4848 //_ +216 0x4848 //_ +217 0x4848 //_ +218 0x4848 //_ +219 0x4848 //_ +220 0x0202 //_ +221 0x0203 //_ +222 0x0303 //_ +223 0x0402 //_ +224 0x0504 //_ +225 0x0209 //_ +226 0x0808 //_ +227 0x090A //_ +228 0x0B0C //_ +229 0x0D0E //_ +230 0x1013 //_ +231 0x1719 //_ +232 0x1B1E //_ +233 0x1E1E //_ +234 0x1E28 //_ +235 0x282C //_ +236 0x0000 //_ +237 0x0000 //_ +238 0x0000 //_ +239 0x0000 //_ +240 0x0000 //_ +241 0x0000 //_ +242 0x0000 //_ +243 0x0000 //_ +244 0x4000 //_ +245 0x0320 //_ +246 0x0018 //_ +247 0x0030 //_ +248 0x0050 //_ +249 0x0080 //_ +250 0x0004 //_ +251 0x5000 //_ +252 0x5000 //_ +253 0x2000 //_ +254 0x5000 //_ +255 0x6400 //_ +256 0x6400 //_ +257 0x2000 //_ +258 0x5000 //_ +259 0x4000 //_ +260 0x4000 //_ +261 0x4000 //_ +262 0x4000 //_ +263 0x7FFF //_ +264 0x7FFF //_ +265 0x7FFF //_ +266 0x7FFF //_ +267 0x0000 //_ +268 0x0002 //_ +269 0x0001 //_ +270 0x0002 //_ +271 0x1800 //_ +272 0x1800 //_ +273 0x6000 //_ +274 0x6E00 //_ +275 0x4000 //_ +276 0x7EB8 //_ +277 0x0000 //_ +278 0x199A //_ +279 0x0001 //_ +280 0x0CCD //_ +281 0x03C3 //_ +282 0x7C00 //_ +283 0x2000 //_ +284 0x2000 //_ +285 0x0080 //_ +286 0x0012 //_ +287 0x0000 //_ +288 0x0000 //_ +289 0x3000 //_ +290 0x3000 //_ +291 0x1800 //_ +292 0x1000 //_ +293 0x04CD //_ +294 0x0F33 //_ +295 0x7333 //_ +296 0x199A //_ +297 0x7333 //_ +298 0x0004 //_ +299 0x6CCD //_ +300 0x799A //_ +301 0x001E //_ +302 0x3000 //_ +303 0x3200 //_ +304 0x2000 //_ +305 0x2000 //_ +306 0x2000 //_ +307 0x2000 //_ +308 0x2000 //_ +309 0x2000 //_ +310 0x2000 //_ +311 0x0000 //_ +312 0x0000 //_ +313 0x0000 //_ +#VOL 0 +163 0x4000 //RX_TDDRC_ALPHA_UP_1 +164 0x4000 //RX_TDDRC_ALPHA_UP_2 +165 0x4000 //RX_TDDRC_ALPHA_UP_3 +166 0x4000 //RX_TDDRC_ALPHA_UP_4 +184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +190 0x7FFF //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +269 0x0001 //RX_TDDRC_THRD_0 +270 0x0002 //RX_TDDRC_THRD_1 +271 0x1800 //RX_TDDRC_THRD_2 +272 0x1800 //RX_TDDRC_THRD_3 +273 0x6000 //RX_TDDRC_SLANT_0 +274 0x6E00 //RX_TDDRC_SLANT_1 +275 0x4000 //RX_TDDRC_ALPHA_UP_0 +276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x199A //RX_TDDRC_HMNC_GAIN +279 0x0001 //RX_TDDRC_SMT_FLAG +280 0x0CCD //RX_TDDRC_SMT_W +281 0x03C3 //RX_TDDRC_DRC_GAIN +195 0x0020 //RX_FDEQ_SUBNUM +196 0x4848 //RX_FDEQ_GAIN_0 +197 0x4848 //RX_FDEQ_GAIN_1 +198 0x4848 //RX_FDEQ_GAIN_2 +199 0x4870 //RX_FDEQ_GAIN_3 +200 0x4848 //RX_FDEQ_GAIN_4 +201 0x4848 //RX_FDEQ_GAIN_5 +202 0x4850 //RX_FDEQ_GAIN_6 +203 0x485C //RX_FDEQ_GAIN_7 +204 0x5C60 //RX_FDEQ_GAIN_8 +205 0x685C //RX_FDEQ_GAIN_9 +206 0x5640 //RX_FDEQ_GAIN_10 +207 0x4040 //RX_FDEQ_GAIN_11 +208 0x5C58 //RX_FDEQ_GAIN_12 +209 0x5C60 //RX_FDEQ_GAIN_13 +210 0x6060 //RX_FDEQ_GAIN_14 +211 0x6060 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0202 //RX_FDEQ_BIN_0 +221 0x0203 //RX_FDEQ_BIN_1 +222 0x0303 //RX_FDEQ_BIN_2 +223 0x0402 //RX_FDEQ_BIN_3 +224 0x0504 //RX_FDEQ_BIN_4 +225 0x0209 //RX_FDEQ_BIN_5 +226 0x0808 //RX_FDEQ_BIN_6 +227 0x090A //RX_FDEQ_BIN_7 +228 0x0B0C //RX_FDEQ_BIN_8 +229 0x0D0E //RX_FDEQ_BIN_9 +230 0x1013 //RX_FDEQ_BIN_10 +231 0x1719 //RX_FDEQ_BIN_11 +232 0x1B1E //RX_FDEQ_BIN_12 +233 0x1E1E //RX_FDEQ_BIN_13 +234 0x1E28 //RX_FDEQ_BIN_14 +235 0x282C //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x4000 //RX_FDEQ_RESRV_0 +245 0x0320 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0030 //RX_FDDRC_BAND_MARGIN_1 +248 0x0050 //RX_FDDRC_BAND_MARGIN_2 +249 0x0080 //RX_FDDRC_BAND_MARGIN_3 +250 0x0004 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x2000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x2000 //RX_FDDRC_THRD_3_2 +258 0x5000 //RX_FDDRC_THRD_3_3 +259 0x4000 //RX_FDDRC_SLANT_0_0 +260 0x4000 //RX_FDDRC_SLANT_0_1 +261 0x4000 //RX_FDDRC_SLANT_0_2 +262 0x4000 //RX_FDDRC_SLANT_0_3 +263 0x7FFF //RX_FDDRC_SLANT_1_0 +264 0x7FFF //RX_FDDRC_SLANT_1_1 +265 0x7FFF //RX_FDDRC_SLANT_1_2 +266 0x7FFF //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +286 0x0012 //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 +#VOL 1 +163 0x4000 //RX_TDDRC_ALPHA_UP_1 +164 0x4000 //RX_TDDRC_ALPHA_UP_2 +165 0x4000 //RX_TDDRC_ALPHA_UP_3 +166 0x4000 //RX_TDDRC_ALPHA_UP_4 +184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +190 0x7FFF //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +269 0x0001 //RX_TDDRC_THRD_0 +270 0x0002 //RX_TDDRC_THRD_1 +271 0x1800 //RX_TDDRC_THRD_2 +272 0x1800 //RX_TDDRC_THRD_3 +273 0x6000 //RX_TDDRC_SLANT_0 +274 0x6E00 //RX_TDDRC_SLANT_1 +275 0x4000 //RX_TDDRC_ALPHA_UP_0 +276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x199A //RX_TDDRC_HMNC_GAIN +279 0x0001 //RX_TDDRC_SMT_FLAG +280 0x0CCD //RX_TDDRC_SMT_W +281 0x03C3 //RX_TDDRC_DRC_GAIN +195 0x0020 //RX_FDEQ_SUBNUM +196 0x4848 //RX_FDEQ_GAIN_0 +197 0x4848 //RX_FDEQ_GAIN_1 +198 0x4848 //RX_FDEQ_GAIN_2 +199 0x4870 //RX_FDEQ_GAIN_3 +200 0x4848 //RX_FDEQ_GAIN_4 +201 0x4848 //RX_FDEQ_GAIN_5 +202 0x4850 //RX_FDEQ_GAIN_6 +203 0x485C //RX_FDEQ_GAIN_7 +204 0x5C60 //RX_FDEQ_GAIN_8 +205 0x685C //RX_FDEQ_GAIN_9 +206 0x5640 //RX_FDEQ_GAIN_10 +207 0x4040 //RX_FDEQ_GAIN_11 +208 0x5C58 //RX_FDEQ_GAIN_12 +209 0x5C60 //RX_FDEQ_GAIN_13 +210 0x6060 //RX_FDEQ_GAIN_14 +211 0x6060 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0202 //RX_FDEQ_BIN_0 +221 0x0203 //RX_FDEQ_BIN_1 +222 0x0303 //RX_FDEQ_BIN_2 +223 0x0402 //RX_FDEQ_BIN_3 +224 0x0504 //RX_FDEQ_BIN_4 +225 0x0209 //RX_FDEQ_BIN_5 +226 0x0808 //RX_FDEQ_BIN_6 +227 0x090A //RX_FDEQ_BIN_7 +228 0x0B0C //RX_FDEQ_BIN_8 +229 0x0D0E //RX_FDEQ_BIN_9 +230 0x1013 //RX_FDEQ_BIN_10 +231 0x1719 //RX_FDEQ_BIN_11 +232 0x1B1E //RX_FDEQ_BIN_12 +233 0x1E1E //RX_FDEQ_BIN_13 +234 0x1E28 //RX_FDEQ_BIN_14 +235 0x282C //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x4000 //RX_FDEQ_RESRV_0 +245 0x0320 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0030 //RX_FDDRC_BAND_MARGIN_1 +248 0x0050 //RX_FDDRC_BAND_MARGIN_2 +249 0x0080 //RX_FDDRC_BAND_MARGIN_3 +250 0x0004 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x2000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x2000 //RX_FDDRC_THRD_3_2 +258 0x5000 //RX_FDDRC_THRD_3_3 +259 0x4000 //RX_FDDRC_SLANT_0_0 +260 0x4000 //RX_FDDRC_SLANT_0_1 +261 0x4000 //RX_FDDRC_SLANT_0_2 +262 0x4000 //RX_FDDRC_SLANT_0_3 +263 0x7FFF //RX_FDDRC_SLANT_1_0 +264 0x7FFF //RX_FDDRC_SLANT_1_1 +265 0x7FFF //RX_FDDRC_SLANT_1_2 +266 0x7FFF //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +286 0x001A //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 +#VOL 2 +163 0x4000 //RX_TDDRC_ALPHA_UP_1 +164 0x4000 //RX_TDDRC_ALPHA_UP_2 +165 0x4000 //RX_TDDRC_ALPHA_UP_3 +166 0x4000 //RX_TDDRC_ALPHA_UP_4 +184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +190 0x7FFF //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +269 0x0001 //RX_TDDRC_THRD_0 +270 0x0002 //RX_TDDRC_THRD_1 +271 0x1800 //RX_TDDRC_THRD_2 +272 0x1800 //RX_TDDRC_THRD_3 +273 0x6000 //RX_TDDRC_SLANT_0 +274 0x6E00 //RX_TDDRC_SLANT_1 +275 0x4000 //RX_TDDRC_ALPHA_UP_0 +276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x199A //RX_TDDRC_HMNC_GAIN +279 0x0001 //RX_TDDRC_SMT_FLAG +280 0x0CCD //RX_TDDRC_SMT_W +281 0x03C3 //RX_TDDRC_DRC_GAIN +195 0x0020 //RX_FDEQ_SUBNUM +196 0x4848 //RX_FDEQ_GAIN_0 +197 0x4848 //RX_FDEQ_GAIN_1 +198 0x4848 //RX_FDEQ_GAIN_2 +199 0x4870 //RX_FDEQ_GAIN_3 +200 0x4848 //RX_FDEQ_GAIN_4 +201 0x4848 //RX_FDEQ_GAIN_5 +202 0x4850 //RX_FDEQ_GAIN_6 +203 0x485C //RX_FDEQ_GAIN_7 +204 0x5C60 //RX_FDEQ_GAIN_8 +205 0x685C //RX_FDEQ_GAIN_9 +206 0x5640 //RX_FDEQ_GAIN_10 +207 0x4040 //RX_FDEQ_GAIN_11 +208 0x5C58 //RX_FDEQ_GAIN_12 +209 0x5C60 //RX_FDEQ_GAIN_13 +210 0x6060 //RX_FDEQ_GAIN_14 +211 0x6060 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0202 //RX_FDEQ_BIN_0 +221 0x0203 //RX_FDEQ_BIN_1 +222 0x0303 //RX_FDEQ_BIN_2 +223 0x0402 //RX_FDEQ_BIN_3 +224 0x0504 //RX_FDEQ_BIN_4 +225 0x0209 //RX_FDEQ_BIN_5 +226 0x0808 //RX_FDEQ_BIN_6 +227 0x090A //RX_FDEQ_BIN_7 +228 0x0B0C //RX_FDEQ_BIN_8 +229 0x0D0E //RX_FDEQ_BIN_9 +230 0x1013 //RX_FDEQ_BIN_10 +231 0x1719 //RX_FDEQ_BIN_11 +232 0x1B1E //RX_FDEQ_BIN_12 +233 0x1E1E //RX_FDEQ_BIN_13 +234 0x1E28 //RX_FDEQ_BIN_14 +235 0x282C //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x4000 //RX_FDEQ_RESRV_0 +245 0x0320 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0030 //RX_FDDRC_BAND_MARGIN_1 +248 0x0050 //RX_FDDRC_BAND_MARGIN_2 +249 0x0080 //RX_FDDRC_BAND_MARGIN_3 +250 0x0004 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x2000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x2000 //RX_FDDRC_THRD_3_2 +258 0x5000 //RX_FDDRC_THRD_3_3 +259 0x4000 //RX_FDDRC_SLANT_0_0 +260 0x4000 //RX_FDDRC_SLANT_0_1 +261 0x4000 //RX_FDDRC_SLANT_0_2 +262 0x4000 //RX_FDDRC_SLANT_0_3 +263 0x7FFF //RX_FDDRC_SLANT_1_0 +264 0x7FFF //RX_FDDRC_SLANT_1_1 +265 0x7FFF //RX_FDDRC_SLANT_1_2 +266 0x7FFF //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +286 0x0025 //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 +#VOL 3 +163 0x4000 //RX_TDDRC_ALPHA_UP_1 +164 0x4000 //RX_TDDRC_ALPHA_UP_2 +165 0x4000 //RX_TDDRC_ALPHA_UP_3 +166 0x4000 //RX_TDDRC_ALPHA_UP_4 +184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +190 0x7FFF //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +269 0x0001 //RX_TDDRC_THRD_0 +270 0x0002 //RX_TDDRC_THRD_1 +271 0x1800 //RX_TDDRC_THRD_2 +272 0x1800 //RX_TDDRC_THRD_3 +273 0x6000 //RX_TDDRC_SLANT_0 +274 0x6E00 //RX_TDDRC_SLANT_1 +275 0x4000 //RX_TDDRC_ALPHA_UP_0 +276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x199A //RX_TDDRC_HMNC_GAIN +279 0x0001 //RX_TDDRC_SMT_FLAG +280 0x0CCD //RX_TDDRC_SMT_W +281 0x03C3 //RX_TDDRC_DRC_GAIN +195 0x0020 //RX_FDEQ_SUBNUM +196 0x4848 //RX_FDEQ_GAIN_0 +197 0x4848 //RX_FDEQ_GAIN_1 +198 0x4848 //RX_FDEQ_GAIN_2 +199 0x4870 //RX_FDEQ_GAIN_3 +200 0x4848 //RX_FDEQ_GAIN_4 +201 0x4848 //RX_FDEQ_GAIN_5 +202 0x4850 //RX_FDEQ_GAIN_6 +203 0x485C //RX_FDEQ_GAIN_7 +204 0x5C60 //RX_FDEQ_GAIN_8 +205 0x685C //RX_FDEQ_GAIN_9 +206 0x5640 //RX_FDEQ_GAIN_10 +207 0x4040 //RX_FDEQ_GAIN_11 +208 0x5C58 //RX_FDEQ_GAIN_12 +209 0x5C60 //RX_FDEQ_GAIN_13 +210 0x6060 //RX_FDEQ_GAIN_14 +211 0x6060 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0202 //RX_FDEQ_BIN_0 +221 0x0203 //RX_FDEQ_BIN_1 +222 0x0303 //RX_FDEQ_BIN_2 +223 0x0402 //RX_FDEQ_BIN_3 +224 0x0504 //RX_FDEQ_BIN_4 +225 0x0209 //RX_FDEQ_BIN_5 +226 0x0808 //RX_FDEQ_BIN_6 +227 0x090A //RX_FDEQ_BIN_7 +228 0x0B0C //RX_FDEQ_BIN_8 +229 0x0D0E //RX_FDEQ_BIN_9 +230 0x1013 //RX_FDEQ_BIN_10 +231 0x1719 //RX_FDEQ_BIN_11 +232 0x1B1E //RX_FDEQ_BIN_12 +233 0x1E1E //RX_FDEQ_BIN_13 +234 0x1E28 //RX_FDEQ_BIN_14 +235 0x282C //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x4000 //RX_FDEQ_RESRV_0 +245 0x0320 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0030 //RX_FDDRC_BAND_MARGIN_1 +248 0x0050 //RX_FDDRC_BAND_MARGIN_2 +249 0x0080 //RX_FDDRC_BAND_MARGIN_3 +250 0x0004 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x2000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x2000 //RX_FDDRC_THRD_3_2 +258 0x5000 //RX_FDDRC_THRD_3_3 +259 0x4000 //RX_FDDRC_SLANT_0_0 +260 0x4000 //RX_FDDRC_SLANT_0_1 +261 0x4000 //RX_FDDRC_SLANT_0_2 +262 0x4000 //RX_FDDRC_SLANT_0_3 +263 0x7FFF //RX_FDDRC_SLANT_1_0 +264 0x7FFF //RX_FDDRC_SLANT_1_1 +265 0x7FFF //RX_FDDRC_SLANT_1_2 +266 0x7FFF //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +286 0x0034 //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 +#VOL 4 +163 0x4000 //RX_TDDRC_ALPHA_UP_1 +164 0x4000 //RX_TDDRC_ALPHA_UP_2 +165 0x4000 //RX_TDDRC_ALPHA_UP_3 +166 0x4000 //RX_TDDRC_ALPHA_UP_4 +184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +190 0x7FFF //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +269 0x0001 //RX_TDDRC_THRD_0 +270 0x0002 //RX_TDDRC_THRD_1 +271 0x1800 //RX_TDDRC_THRD_2 +272 0x1800 //RX_TDDRC_THRD_3 +273 0x6000 //RX_TDDRC_SLANT_0 +274 0x6E00 //RX_TDDRC_SLANT_1 +275 0x4000 //RX_TDDRC_ALPHA_UP_0 +276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x199A //RX_TDDRC_HMNC_GAIN +279 0x0001 //RX_TDDRC_SMT_FLAG +280 0x0CCD //RX_TDDRC_SMT_W +281 0x03C3 //RX_TDDRC_DRC_GAIN +195 0x0020 //RX_FDEQ_SUBNUM +196 0x4848 //RX_FDEQ_GAIN_0 +197 0x4848 //RX_FDEQ_GAIN_1 +198 0x4848 //RX_FDEQ_GAIN_2 +199 0x4870 //RX_FDEQ_GAIN_3 +200 0x4848 //RX_FDEQ_GAIN_4 +201 0x4848 //RX_FDEQ_GAIN_5 +202 0x4850 //RX_FDEQ_GAIN_6 +203 0x485C //RX_FDEQ_GAIN_7 +204 0x5C60 //RX_FDEQ_GAIN_8 +205 0x685C //RX_FDEQ_GAIN_9 +206 0x5640 //RX_FDEQ_GAIN_10 +207 0x4040 //RX_FDEQ_GAIN_11 +208 0x5C58 //RX_FDEQ_GAIN_12 +209 0x5C60 //RX_FDEQ_GAIN_13 +210 0x6060 //RX_FDEQ_GAIN_14 +211 0x6060 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0202 //RX_FDEQ_BIN_0 +221 0x0203 //RX_FDEQ_BIN_1 +222 0x0303 //RX_FDEQ_BIN_2 +223 0x0402 //RX_FDEQ_BIN_3 +224 0x0504 //RX_FDEQ_BIN_4 +225 0x0209 //RX_FDEQ_BIN_5 +226 0x0808 //RX_FDEQ_BIN_6 +227 0x090A //RX_FDEQ_BIN_7 +228 0x0B0C //RX_FDEQ_BIN_8 +229 0x0D0E //RX_FDEQ_BIN_9 +230 0x1013 //RX_FDEQ_BIN_10 +231 0x1719 //RX_FDEQ_BIN_11 +232 0x1B1E //RX_FDEQ_BIN_12 +233 0x1E1E //RX_FDEQ_BIN_13 +234 0x1E28 //RX_FDEQ_BIN_14 +235 0x282C //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x4000 //RX_FDEQ_RESRV_0 +245 0x0320 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0030 //RX_FDDRC_BAND_MARGIN_1 +248 0x0050 //RX_FDDRC_BAND_MARGIN_2 +249 0x0080 //RX_FDDRC_BAND_MARGIN_3 +250 0x0004 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x2000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x2000 //RX_FDDRC_THRD_3_2 +258 0x5000 //RX_FDDRC_THRD_3_3 +259 0x4000 //RX_FDDRC_SLANT_0_0 +260 0x4000 //RX_FDDRC_SLANT_0_1 +261 0x4000 //RX_FDDRC_SLANT_0_2 +262 0x4000 //RX_FDDRC_SLANT_0_3 +263 0x7FFF //RX_FDDRC_SLANT_1_0 +264 0x7FFF //RX_FDDRC_SLANT_1_1 +265 0x7FFF //RX_FDDRC_SLANT_1_2 +266 0x7FFF //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +286 0x004D //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 +#VOL 5 +163 0x4000 //RX_TDDRC_ALPHA_UP_1 +164 0x4000 //RX_TDDRC_ALPHA_UP_2 +165 0x4000 //RX_TDDRC_ALPHA_UP_3 +166 0x4000 //RX_TDDRC_ALPHA_UP_4 +184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +190 0x7FFF //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +269 0x0001 //RX_TDDRC_THRD_0 +270 0x0002 //RX_TDDRC_THRD_1 +271 0x1800 //RX_TDDRC_THRD_2 +272 0x1800 //RX_TDDRC_THRD_3 +273 0x6000 //RX_TDDRC_SLANT_0 +274 0x6E00 //RX_TDDRC_SLANT_1 +275 0x4000 //RX_TDDRC_ALPHA_UP_0 +276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x199A //RX_TDDRC_HMNC_GAIN +279 0x0001 //RX_TDDRC_SMT_FLAG +280 0x0CCD //RX_TDDRC_SMT_W +281 0x03C3 //RX_TDDRC_DRC_GAIN +195 0x0020 //RX_FDEQ_SUBNUM +196 0x4848 //RX_FDEQ_GAIN_0 +197 0x4848 //RX_FDEQ_GAIN_1 +198 0x4848 //RX_FDEQ_GAIN_2 +199 0x4870 //RX_FDEQ_GAIN_3 +200 0x4848 //RX_FDEQ_GAIN_4 +201 0x4848 //RX_FDEQ_GAIN_5 +202 0x4850 //RX_FDEQ_GAIN_6 +203 0x485C //RX_FDEQ_GAIN_7 +204 0x5C60 //RX_FDEQ_GAIN_8 +205 0x685C //RX_FDEQ_GAIN_9 +206 0x5640 //RX_FDEQ_GAIN_10 +207 0x4040 //RX_FDEQ_GAIN_11 +208 0x5C58 //RX_FDEQ_GAIN_12 +209 0x5C60 //RX_FDEQ_GAIN_13 +210 0x6060 //RX_FDEQ_GAIN_14 +211 0x6060 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0202 //RX_FDEQ_BIN_0 +221 0x0203 //RX_FDEQ_BIN_1 +222 0x0303 //RX_FDEQ_BIN_2 +223 0x0402 //RX_FDEQ_BIN_3 +224 0x0504 //RX_FDEQ_BIN_4 +225 0x0209 //RX_FDEQ_BIN_5 +226 0x0808 //RX_FDEQ_BIN_6 +227 0x090A //RX_FDEQ_BIN_7 +228 0x0B0C //RX_FDEQ_BIN_8 +229 0x0D0E //RX_FDEQ_BIN_9 +230 0x1013 //RX_FDEQ_BIN_10 +231 0x1719 //RX_FDEQ_BIN_11 +232 0x1B1E //RX_FDEQ_BIN_12 +233 0x1E1E //RX_FDEQ_BIN_13 +234 0x1E28 //RX_FDEQ_BIN_14 +235 0x282C //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x4000 //RX_FDEQ_RESRV_0 +245 0x0320 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0030 //RX_FDDRC_BAND_MARGIN_1 +248 0x0050 //RX_FDDRC_BAND_MARGIN_2 +249 0x0080 //RX_FDDRC_BAND_MARGIN_3 +250 0x0004 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x2000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x2000 //RX_FDDRC_THRD_3_2 +258 0x5000 //RX_FDDRC_THRD_3_3 +259 0x4000 //RX_FDDRC_SLANT_0_0 +260 0x4000 //RX_FDDRC_SLANT_0_1 +261 0x4000 //RX_FDDRC_SLANT_0_2 +262 0x4000 //RX_FDDRC_SLANT_0_3 +263 0x7FFF //RX_FDDRC_SLANT_1_0 +264 0x7FFF //RX_FDDRC_SLANT_1_1 +265 0x7FFF //RX_FDDRC_SLANT_1_2 +266 0x7FFF //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +286 0x0074 //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 +#VOL 6 +163 0x4000 //RX_TDDRC_ALPHA_UP_1 +164 0x4000 //RX_TDDRC_ALPHA_UP_2 +165 0x4000 //RX_TDDRC_ALPHA_UP_3 +166 0x4000 //RX_TDDRC_ALPHA_UP_4 +184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +190 0x7FFF //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +269 0x0001 //RX_TDDRC_THRD_0 +270 0x0002 //RX_TDDRC_THRD_1 +271 0x1800 //RX_TDDRC_THRD_2 +272 0x1800 //RX_TDDRC_THRD_3 +273 0x6000 //RX_TDDRC_SLANT_0 +274 0x6E00 //RX_TDDRC_SLANT_1 +275 0x4000 //RX_TDDRC_ALPHA_UP_0 +276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x199A //RX_TDDRC_HMNC_GAIN +279 0x0001 //RX_TDDRC_SMT_FLAG +280 0x0CCD //RX_TDDRC_SMT_W +281 0x03C3 //RX_TDDRC_DRC_GAIN +195 0x0020 //RX_FDEQ_SUBNUM +196 0x4848 //RX_FDEQ_GAIN_0 +197 0x4848 //RX_FDEQ_GAIN_1 +198 0x4848 //RX_FDEQ_GAIN_2 +199 0x4870 //RX_FDEQ_GAIN_3 +200 0x4848 //RX_FDEQ_GAIN_4 +201 0x4848 //RX_FDEQ_GAIN_5 +202 0x4850 //RX_FDEQ_GAIN_6 +203 0x485C //RX_FDEQ_GAIN_7 +204 0x5C60 //RX_FDEQ_GAIN_8 +205 0x685C //RX_FDEQ_GAIN_9 +206 0x5640 //RX_FDEQ_GAIN_10 +207 0x4040 //RX_FDEQ_GAIN_11 +208 0x5C58 //RX_FDEQ_GAIN_12 +209 0x5C60 //RX_FDEQ_GAIN_13 +210 0x6060 //RX_FDEQ_GAIN_14 +211 0x6060 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0202 //RX_FDEQ_BIN_0 +221 0x0203 //RX_FDEQ_BIN_1 +222 0x0303 //RX_FDEQ_BIN_2 +223 0x0402 //RX_FDEQ_BIN_3 +224 0x0504 //RX_FDEQ_BIN_4 +225 0x0209 //RX_FDEQ_BIN_5 +226 0x0808 //RX_FDEQ_BIN_6 +227 0x090A //RX_FDEQ_BIN_7 +228 0x0B0C //RX_FDEQ_BIN_8 +229 0x0D0E //RX_FDEQ_BIN_9 +230 0x1013 //RX_FDEQ_BIN_10 +231 0x1719 //RX_FDEQ_BIN_11 +232 0x1B1E //RX_FDEQ_BIN_12 +233 0x1E1E //RX_FDEQ_BIN_13 +234 0x1E28 //RX_FDEQ_BIN_14 +235 0x282C //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x4000 //RX_FDEQ_RESRV_0 +245 0x0320 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0030 //RX_FDDRC_BAND_MARGIN_1 +248 0x0050 //RX_FDDRC_BAND_MARGIN_2 +249 0x0080 //RX_FDDRC_BAND_MARGIN_3 +250 0x0004 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x2000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x2000 //RX_FDDRC_THRD_3_2 +258 0x5000 //RX_FDDRC_THRD_3_3 +259 0x4000 //RX_FDDRC_SLANT_0_0 +260 0x4000 //RX_FDDRC_SLANT_0_1 +261 0x4000 //RX_FDDRC_SLANT_0_2 +262 0x4000 //RX_FDDRC_SLANT_0_3 +263 0x7FFF //RX_FDDRC_SLANT_1_0 +264 0x7FFF //RX_FDDRC_SLANT_1_1 +265 0x7FFF //RX_FDDRC_SLANT_1_2 +266 0x7FFF //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +286 0x0100 //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 -#CASE_NAME HANDSFREE-HANDSFREE-CUSTOM1-FB -#PARAM_TYPE TX+RX -#TOTAL_CUSTOM_STEP 7 +#CASE_NAME HANDSFREE-HANDFREE-CUSTOM1-FB +#PARAM_MODE FULL +#PARAM_TYPE TX+2RX +#TOTAL_CUSTOM_STEP 7+7 #TX 0 0x0001 //TX_OPERATION_MODE_0 1 0x0001 //TX_OPERATION_MODE_1 @@ -3764,11 +5599,11 @@ 248 0xF800 //TX_THR_SN_EST_6 249 0xF800 //TX_THR_SN_EST_7 250 0x0100 //TX_DELTA_THR_SN_EST_0 -251 0x0200 //TX_DELTA_THR_SN_EST_1 -252 0x0100 //TX_DELTA_THR_SN_EST_2 -253 0x0200 //TX_DELTA_THR_SN_EST_3 +251 0x0100 //TX_DELTA_THR_SN_EST_1 +252 0x0200 //TX_DELTA_THR_SN_EST_2 +253 0x0100 //TX_DELTA_THR_SN_EST_3 254 0x0100 //TX_DELTA_THR_SN_EST_4 -255 0x0100 //TX_DELTA_THR_SN_EST_5 +255 0x0200 //TX_DELTA_THR_SN_EST_5 256 0x0200 //TX_DELTA_THR_SN_EST_6 257 0x0200 //TX_DELTA_THR_SN_EST_7 258 0x4000 //TX_LAMBDA_NN_EST_0 @@ -3796,11 +5631,11 @@ 280 0x1000 //TX_B_POST_FLT_1 281 0x0010 //TX_NS_LVL_CTRL_0 282 0x0014 //TX_NS_LVL_CTRL_1 -283 0x0014 //TX_NS_LVL_CTRL_2 -284 0x0018 //TX_NS_LVL_CTRL_3 -285 0x0016 //TX_NS_LVL_CTRL_4 -286 0x0014 //TX_NS_LVL_CTRL_5 -287 0x0011 //TX_NS_LVL_CTRL_6 +283 0x0018 //TX_NS_LVL_CTRL_2 +284 0x0016 //TX_NS_LVL_CTRL_3 +285 0x0014 //TX_NS_LVL_CTRL_4 +286 0x0011 //TX_NS_LVL_CTRL_5 +287 0x0014 //TX_NS_LVL_CTRL_6 288 0x0011 //TX_NS_LVL_CTRL_7 289 0x000F //TX_MIN_GAIN_S_0 290 0x0010 //TX_MIN_GAIN_S_1 @@ -3818,8 +5653,8 @@ 302 0x4000 //TX_SNRI_SUP_2 303 0x4000 //TX_SNRI_SUP_3 304 0x4000 //TX_SNRI_SUP_4 -305 0x4000 //TX_SNRI_SUP_5 -306 0x50C0 //TX_SNRI_SUP_6 +305 0x50C0 //TX_SNRI_SUP_5 +306 0x4000 //TX_SNRI_SUP_6 307 0x7FFF //TX_SNRI_SUP_7 308 0x7FFF //TX_THR_LFNS 309 0x0018 //TX_G_LFNS @@ -3828,19 +5663,19 @@ 312 0x7FFF //TX_A_POST_FILT_0 313 0x2000 //TX_A_POST_FILT_1 314 0x5000 //TX_A_POST_FILT_S_0 -315 0x6000 //TX_A_POST_FILT_S_1 -316 0x4C00 //TX_A_POST_FILT_S_2 -317 0x4000 //TX_A_POST_FILT_S_3 -318 0x6000 //TX_A_POST_FILT_S_4 -319 0x4000 //TX_A_POST_FILT_S_5 -320 0x5000 //TX_A_POST_FILT_S_6 +315 0x4C00 //TX_A_POST_FILT_S_1 +316 0x4000 //TX_A_POST_FILT_S_2 +317 0x6000 //TX_A_POST_FILT_S_3 +318 0x4000 //TX_A_POST_FILT_S_4 +319 0x5000 //TX_A_POST_FILT_S_5 +320 0x6000 //TX_A_POST_FILT_S_6 321 0x7000 //TX_A_POST_FILT_S_7 322 0x2000 //TX_B_POST_FILT_0 -323 0x1000 //TX_B_POST_FILT_1 +323 0x2000 //TX_B_POST_FILT_1 324 0x2000 //TX_B_POST_FILT_2 -325 0x2000 //TX_B_POST_FILT_3 +325 0x4000 //TX_B_POST_FILT_3 326 0x4000 //TX_B_POST_FILT_4 -327 0x4000 //TX_B_POST_FILT_5 +327 0x1000 //TX_B_POST_FILT_5 328 0x1000 //TX_B_POST_FILT_6 329 0x2000 //TX_B_POST_FILT_7 330 0x4000 //TX_B_LESSCUT_RTO_S_0 @@ -3848,14 +5683,14 @@ 332 0x7FFF //TX_B_LESSCUT_RTO_S_2 333 0x7FFF //TX_B_LESSCUT_RTO_S_3 334 0x7FFF //TX_B_LESSCUT_RTO_S_4 -335 0x7FFF //TX_B_LESSCUT_RTO_S_5 -336 0x6000 //TX_B_LESSCUT_RTO_S_6 +335 0x6000 //TX_B_LESSCUT_RTO_S_5 +336 0x7FFF //TX_B_LESSCUT_RTO_S_6 337 0x7FFF //TX_B_LESSCUT_RTO_S_7 338 0x7C00 //TX_LAMBDA_PFILT 339 0x7C00 //TX_LAMBDA_PFILT_S_0 340 0x7C00 //TX_LAMBDA_PFILT_S_1 -341 0x7C00 //TX_LAMBDA_PFILT_S_2 -342 0x7A00 //TX_LAMBDA_PFILT_S_3 +341 0x7A00 //TX_LAMBDA_PFILT_S_2 +342 0x7C00 //TX_LAMBDA_PFILT_S_3 343 0x7C00 //TX_LAMBDA_PFILT_S_4 344 0x7C00 //TX_LAMBDA_PFILT_S_5 345 0x7C00 //TX_LAMBDA_PFILT_S_6 @@ -3893,10 +5728,10 @@ 377 0x7FFF //TX_NOISE_TH_5_4 378 0x2710 //TX_NOISE_TH_6 379 0x0033 //TX_MINENOISE_TH -380 0x4000 //TX_MINENOISE_MIC0_TH_MTS -381 0xFFEE //TX_MINENOISE_MIC0_TH_EXP -382 0x6000 //TX_MINENOISE_MIC0_S_TH_MTS -383 0xFFF3 //TX_MINENOISE_MIC0_S_TH_EXP +380 0xD508 //TX_MORENS_TFMASK_TH +381 0x0001 //TX_DRC_QUIET_FLOOR +382 0x7999 //TX_RATIODTL_CUT_TH +383 0x0119 //TX_DT_CUT_K1 384 0x0666 //TX_OUT_ENER_S_TH_CLEAN 385 0x0666 //TX_OUT_ENER_S_TH_LESSCLEAN 386 0x0333 //TX_OUT_ENER_S_TH_NOISY @@ -3904,15 +5739,15 @@ 388 0x0333 //TX_OUT_ENER_TH_SPEECH 389 0x2000 //TX_SN_NPB_GAIN 390 0x0000 //TX_NN_NPB_GAIN -391 0x0000 //TX_CSX_ALPHA_0 -392 0x0000 //TX_CSX_ALPHA_1 -393 0x0000 //TX_CSX_ALPHA_2 -394 0x0000 //TX_CSX_ALPHA_3 -395 0x0800 //TX_MU_ARSP_EST -396 0x00C8 //TX_P_OUTBEAM_MIN_TH +391 0x7FFF //TX_POST_MASK_SUP_HSNE +392 0x1388 //TX_TAIL_DET_TH +393 0x4000 //TX_B_LESSCUT_RTO_WTA +394 0x0000 //TX_MEL_G_R +395 0x0080 //TX_SUPHIGH_TH +396 0x0000 //TX_MASK_G_R 397 0x0002 //TX_EXTRA_NS_L -398 0x0800 //TX_EXTRA_NS_A -399 0x0005 //TX_VR_NOISE_FLOOR_TH +398 0x1800 //TX_C_POST_FLT_MASK +399 0x4000 //TX_A_POST_FLT_WNS 400 0x0148 //TX_MIN_G_LOW300HZ 401 0x0002 //TX_MAXLEVEL_CNG 402 0x00B4 //TX_STN_NOISE_TH @@ -4027,16 +5862,16 @@ 511 0x6666 //TX_MIC_TO_BFGAIN 512 0x0000 //TX_MICTOBFGAIN0 513 0x0000 //TX_FASTMUE_TH -514 0x0000 //TX_DERVB_LEN_0 -515 0x0000 //TX_DERVB_LEN_1 -516 0x0000 //TX_RHO_DERVB -517 0x0000 //TX_MIC_INDX_DERVB -518 0x0000 //TX_MU_DERVB -519 0x0000 //TX_DR_RESRV_0 -520 0x0000 //TX_DR_RESRV_1 -521 0x0000 //TX_DR_RESRV_2 -522 0x0000 //TX_DR_RESRV_3 -523 0x0000 //TX_DR_RESRV_4 +514 0x3000 //TX_DEREVERB_LF_MU +515 0x34CD //TX_DEREVERB_HF_MU +516 0x0007 //TX_DEREVERB_DELAY +517 0x0004 //TX_DEREVERB_COEF_LEN +518 0x0003 //TX_DEREVERB_DNR +519 0x0000 //TX_DEREVERB_ALPHA +520 0x0000 //TX_DEREVERB_BETA +521 0x3A98 //TX_GSC_RTOL_TH +522 0x3A98 //TX_GSC_RTOH_TH +523 0x7E2C //TX_WIDE2_MEANHTH 524 0x0000 //TX_DR_RESRV_5 525 0x0000 //TX_DR_RESRV_6 526 0x0000 //TX_DR_RESRV_7 @@ -4410,6 +6245,71 @@ 894 0xC000 //TX_FASTNS_SSA_THHFL 895 0xCCCC //TX_FASTNS_SSA_THLFH 896 0xD999 //TX_FASTNS_SSA_THHFH +897 0x2339 //TX_SENDFUNC_REG_MICMUTE +898 0x0021 //TX_SENDFUNC_REG_MICMUTE1 +899 0x02BC //TX_MICMUTE_RATIO_THR +900 0x0140 //TX_MICMUTE_AMP_THR +901 0x0004 //TX_MICMUTE_HPF_IND +902 0x00C0 //TX_MICMUTE_LOG_EYR_TH +903 0x0008 //TX_MICMUTE_CVG_TIME +904 0x0008 //TX_MICMUTE_RELEASE_TIME +905 0x01FE //TX_MIC_VOLUME_MIC0MUTE +906 0x0020 //TX_MICMUTE_EPD_OFFSET_0 +907 0x001E //TX_MICMUTE_FRQ_AEC_L +908 0x7999 //TX_MICMUTE_EAD_THR +909 0x7FFF //TX_MICMUTE_LAMBDA_CB_NLE +910 0x7FFF //TX_MICMUTE_LAMBDA_RE_EST +911 0x4000 //TX_DTD_THR1_MICMUTE_0 +912 0x7000 //TX_DTD_THR1_MICMUTE_1 +913 0x7FFF //TX_DTD_THR1_MICMUTE_2 +914 0x7FFF //TX_DTD_THR1_MICMUTE_3 +915 0x6CCC //TX_DTD_THR2_MICMUTE_0 +916 0x0400 //TX_MICMUTE_MIN_EQ_RE_EST_0 +917 0x0400 //TX_MICMUTE_MIN_EQ_RE_EST_1 +918 0x1000 //TX_MICMUTE_MIN_EQ_RE_EST_2 +919 0x7FFF //TX_MICMUTE_MIN_EQ_RE_EST_3 +920 0x7FFF //TX_MICMUTE_MIN_EQ_RE_EST_4 +921 0x4000 //TX_MICMUTE_C_POST_FLT +922 0x03E8 //TX_MICMUTE_DT_CUT_K +923 0x0001 //TX_MICMUTE_DT_CUT_THR +924 0x03E8 //TX_MICMUTE_DT_CUT_K2 +925 0x0001 //TX_MICMUTE_DT_CUT_THR2 +926 0x0064 //TX_MICMUTE_DT2_HOLD_N +927 0x1000 //TX_MICMUTE_RATIODTH_THCUT +928 0x1000 //TX_MICMUTE_B_POST_FLT_ECHOL +929 0x7FFF //TX_MICMUTE_B_POST_FLT_ECHOH +930 0x0400 //TX_MICMUTE_C_POST_FLT_MASK +931 0x7999 //TX_MICMUTE_RATIODTL_CUT_TH +932 0x0258 //TX_MICMUTE_DT_CUT_K1 +933 0x0800 //TX_MICMUTE_N2_SN_EST +934 0xFC00 //TX_MICMUTE_THR_SN_EST_0 +935 0x001C //TX_MICMUTE_MIN_G_CTRL_0 +936 0x6000 //TX_MICMUTE_A_POST_FILT_S_0 +937 0x7000 //TX_MICMUTE_B_POST_FILT_0 +938 0x2710 //TX_MIC1RUB_AMP_THR +939 0x0010 //TX_MIC1MUTE_RATIO_THR +940 0x0450 //TX_MIC1MUTE_AMP_THR +941 0x0008 //TX_MIC1MUTE_CVG_TIME +942 0x0008 //TX_MIC1MUTE_RELEASE_TIME +943 0x0000 //TX_AMS_RESRV_01 +944 0x0000 //TX_AMS_RESRV_02 +945 0x0000 //TX_AMS_RESRV_03 +946 0x0000 //TX_AMS_RESRV_04 +947 0x0000 //TX_AMS_RESRV_05 +948 0x0000 //TX_AMS_RESRV_06 +949 0x0000 //TX_AMS_RESRV_07 +950 0x0000 //TX_AMS_RESRV_08 +951 0x0000 //TX_AMS_RESRV_09 +952 0x0000 //TX_AMS_RESRV_10 +953 0x0000 //TX_AMS_RESRV_11 +954 0x0000 //TX_AMS_RESRV_12 +955 0x0000 //TX_AMS_RESRV_13 +956 0x0000 //TX_AMS_RESRV_14 +957 0x0000 //TX_AMS_RESRV_15 +958 0x0000 //TX_AMS_RESRV_16 +959 0x0000 //TX_AMS_RESRV_17 +960 0x0000 //TX_AMS_RESRV_18 +961 0x0000 //TX_AMS_RESRV_19 #RX 0 0x006C //RX_RECVFUNC_MODE_0 1 0x0000 //RX_RECVFUNC_MODE_1 @@ -5261,14 +7161,866 @@ 110 0x0000 //RX_FDDRC_RESRV_0 129 0x0100 //RX_SPK_VOL 130 0x0000 //RX_VOL_RESRV_0 +#RX 2 +157 0x006C //_ +158 0x0000 //_ +159 0x0004 //_ +160 0x0004 //_ +161 0x000A //_ +162 0x0000 //_ +163 0x4000 //_ +164 0x4000 //_ +165 0x4000 //_ +166 0x4000 //_ +167 0x065B //_ +168 0x7E56 //_ +169 0x4000 //_ +170 0x7800 //_ +171 0x7000 //_ +172 0x6000 //_ +173 0x0008 //_ +174 0x0003 //_ +175 0x0100 //_ +176 0x0020 //_ +177 0x0400 //_ +178 0x000C //_ +179 0x0014 //_ +180 0xF400 //_ +181 0x7E00 //_ +182 0x00C8 //_ +183 0x0190 //_ +184 0x7EB8 //_ +185 0x7EB8 //_ +186 0x7EB8 //_ +187 0x0002 //_ +188 0x0800 //_ +189 0x7EB8 //_ +190 0x7FFF //_ +191 0x0800 //_ +192 0x199A //_ +193 0x0000 //_ +194 0x4000 //_ +195 0x0020 //_ +196 0x4848 //_ +197 0x4848 //_ +198 0x4848 //_ +199 0x4870 //_ +200 0x4848 //_ +201 0x4848 //_ +202 0x4850 //_ +203 0x485C //_ +204 0x5C60 //_ +205 0x685C //_ +206 0x5640 //_ +207 0x4040 //_ +208 0x5C58 //_ +209 0x5C60 //_ +210 0x6060 //_ +211 0x6060 //_ +212 0x4848 //_ +213 0x4848 //_ +214 0x4848 //_ +215 0x4848 //_ +216 0x4848 //_ +217 0x4848 //_ +218 0x4848 //_ +219 0x4848 //_ +220 0x0202 //_ +221 0x0203 //_ +222 0x0303 //_ +223 0x0402 //_ +224 0x0504 //_ +225 0x0209 //_ +226 0x0808 //_ +227 0x090A //_ +228 0x0B0C //_ +229 0x0D0E //_ +230 0x1013 //_ +231 0x1719 //_ +232 0x1B1E //_ +233 0x1E1E //_ +234 0x1E28 //_ +235 0x282C //_ +236 0x0000 //_ +237 0x0000 //_ +238 0x0000 //_ +239 0x0000 //_ +240 0x0000 //_ +241 0x0000 //_ +242 0x0000 //_ +243 0x0000 //_ +244 0x4000 //_ +245 0x0320 //_ +246 0x0018 //_ +247 0x0030 //_ +248 0x0050 //_ +249 0x0080 //_ +250 0x0004 //_ +251 0x5000 //_ +252 0x5000 //_ +253 0x2000 //_ +254 0x5000 //_ +255 0x6400 //_ +256 0x6400 //_ +257 0x2000 //_ +258 0x5000 //_ +259 0x4000 //_ +260 0x4000 //_ +261 0x4000 //_ +262 0x4000 //_ +263 0x7FFF //_ +264 0x7FFF //_ +265 0x7FFF //_ +266 0x7FFF //_ +267 0x0000 //_ +268 0x0002 //_ +269 0x0001 //_ +270 0x0002 //_ +271 0x1800 //_ +272 0x1800 //_ +273 0x6000 //_ +274 0x6E00 //_ +275 0x4000 //_ +276 0x7EB8 //_ +277 0x0000 //_ +278 0x199A //_ +279 0x0001 //_ +280 0x0CCD //_ +281 0x03C3 //_ +282 0x7C00 //_ +283 0x2000 //_ +284 0x2000 //_ +285 0x0080 //_ +286 0x0012 //_ +287 0x0000 //_ +288 0x0000 //_ +289 0x3000 //_ +290 0x3000 //_ +291 0x1800 //_ +292 0x1000 //_ +293 0x04CD //_ +294 0x0F33 //_ +295 0x7333 //_ +296 0x199A //_ +297 0x7333 //_ +298 0x0004 //_ +299 0x6CCD //_ +300 0x799A //_ +301 0x001E //_ +302 0x3000 //_ +303 0x3200 //_ +304 0x2000 //_ +305 0x2000 //_ +306 0x2000 //_ +307 0x2000 //_ +308 0x2000 //_ +309 0x2000 //_ +310 0x2000 //_ +311 0x0000 //_ +312 0x0000 //_ +313 0x0000 //_ +#VOL 0 +163 0x4000 //RX_TDDRC_ALPHA_UP_1 +164 0x4000 //RX_TDDRC_ALPHA_UP_2 +165 0x4000 //RX_TDDRC_ALPHA_UP_3 +166 0x4000 //RX_TDDRC_ALPHA_UP_4 +184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +190 0x7FFF //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +269 0x0001 //RX_TDDRC_THRD_0 +270 0x0002 //RX_TDDRC_THRD_1 +271 0x1800 //RX_TDDRC_THRD_2 +272 0x1800 //RX_TDDRC_THRD_3 +273 0x6000 //RX_TDDRC_SLANT_0 +274 0x6E00 //RX_TDDRC_SLANT_1 +275 0x4000 //RX_TDDRC_ALPHA_UP_0 +276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x199A //RX_TDDRC_HMNC_GAIN +279 0x0001 //RX_TDDRC_SMT_FLAG +280 0x0CCD //RX_TDDRC_SMT_W +281 0x03C3 //RX_TDDRC_DRC_GAIN +195 0x0020 //RX_FDEQ_SUBNUM +196 0x4848 //RX_FDEQ_GAIN_0 +197 0x4848 //RX_FDEQ_GAIN_1 +198 0x4848 //RX_FDEQ_GAIN_2 +199 0x4870 //RX_FDEQ_GAIN_3 +200 0x4848 //RX_FDEQ_GAIN_4 +201 0x4848 //RX_FDEQ_GAIN_5 +202 0x4850 //RX_FDEQ_GAIN_6 +203 0x485C //RX_FDEQ_GAIN_7 +204 0x5C60 //RX_FDEQ_GAIN_8 +205 0x685C //RX_FDEQ_GAIN_9 +206 0x5640 //RX_FDEQ_GAIN_10 +207 0x4040 //RX_FDEQ_GAIN_11 +208 0x5C58 //RX_FDEQ_GAIN_12 +209 0x5C60 //RX_FDEQ_GAIN_13 +210 0x6060 //RX_FDEQ_GAIN_14 +211 0x6060 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0202 //RX_FDEQ_BIN_0 +221 0x0203 //RX_FDEQ_BIN_1 +222 0x0303 //RX_FDEQ_BIN_2 +223 0x0402 //RX_FDEQ_BIN_3 +224 0x0504 //RX_FDEQ_BIN_4 +225 0x0209 //RX_FDEQ_BIN_5 +226 0x0808 //RX_FDEQ_BIN_6 +227 0x090A //RX_FDEQ_BIN_7 +228 0x0B0C //RX_FDEQ_BIN_8 +229 0x0D0E //RX_FDEQ_BIN_9 +230 0x1013 //RX_FDEQ_BIN_10 +231 0x1719 //RX_FDEQ_BIN_11 +232 0x1B1E //RX_FDEQ_BIN_12 +233 0x1E1E //RX_FDEQ_BIN_13 +234 0x1E28 //RX_FDEQ_BIN_14 +235 0x282C //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x4000 //RX_FDEQ_RESRV_0 +245 0x0320 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0030 //RX_FDDRC_BAND_MARGIN_1 +248 0x0050 //RX_FDDRC_BAND_MARGIN_2 +249 0x0080 //RX_FDDRC_BAND_MARGIN_3 +250 0x0004 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x2000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x2000 //RX_FDDRC_THRD_3_2 +258 0x5000 //RX_FDDRC_THRD_3_3 +259 0x4000 //RX_FDDRC_SLANT_0_0 +260 0x4000 //RX_FDDRC_SLANT_0_1 +261 0x4000 //RX_FDDRC_SLANT_0_2 +262 0x4000 //RX_FDDRC_SLANT_0_3 +263 0x7FFF //RX_FDDRC_SLANT_1_0 +264 0x7FFF //RX_FDDRC_SLANT_1_1 +265 0x7FFF //RX_FDDRC_SLANT_1_2 +266 0x7FFF //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +286 0x0012 //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 +#VOL 1 +163 0x4000 //RX_TDDRC_ALPHA_UP_1 +164 0x4000 //RX_TDDRC_ALPHA_UP_2 +165 0x4000 //RX_TDDRC_ALPHA_UP_3 +166 0x4000 //RX_TDDRC_ALPHA_UP_4 +184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +190 0x7FFF //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +269 0x0001 //RX_TDDRC_THRD_0 +270 0x0002 //RX_TDDRC_THRD_1 +271 0x1800 //RX_TDDRC_THRD_2 +272 0x1800 //RX_TDDRC_THRD_3 +273 0x6000 //RX_TDDRC_SLANT_0 +274 0x6E00 //RX_TDDRC_SLANT_1 +275 0x4000 //RX_TDDRC_ALPHA_UP_0 +276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x199A //RX_TDDRC_HMNC_GAIN +279 0x0001 //RX_TDDRC_SMT_FLAG +280 0x0CCD //RX_TDDRC_SMT_W +281 0x03C3 //RX_TDDRC_DRC_GAIN +195 0x0020 //RX_FDEQ_SUBNUM +196 0x4848 //RX_FDEQ_GAIN_0 +197 0x4848 //RX_FDEQ_GAIN_1 +198 0x4848 //RX_FDEQ_GAIN_2 +199 0x4870 //RX_FDEQ_GAIN_3 +200 0x4848 //RX_FDEQ_GAIN_4 +201 0x4848 //RX_FDEQ_GAIN_5 +202 0x4850 //RX_FDEQ_GAIN_6 +203 0x485C //RX_FDEQ_GAIN_7 +204 0x5C60 //RX_FDEQ_GAIN_8 +205 0x685C //RX_FDEQ_GAIN_9 +206 0x5640 //RX_FDEQ_GAIN_10 +207 0x4040 //RX_FDEQ_GAIN_11 +208 0x5C58 //RX_FDEQ_GAIN_12 +209 0x5C60 //RX_FDEQ_GAIN_13 +210 0x6060 //RX_FDEQ_GAIN_14 +211 0x6060 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0202 //RX_FDEQ_BIN_0 +221 0x0203 //RX_FDEQ_BIN_1 +222 0x0303 //RX_FDEQ_BIN_2 +223 0x0402 //RX_FDEQ_BIN_3 +224 0x0504 //RX_FDEQ_BIN_4 +225 0x0209 //RX_FDEQ_BIN_5 +226 0x0808 //RX_FDEQ_BIN_6 +227 0x090A //RX_FDEQ_BIN_7 +228 0x0B0C //RX_FDEQ_BIN_8 +229 0x0D0E //RX_FDEQ_BIN_9 +230 0x1013 //RX_FDEQ_BIN_10 +231 0x1719 //RX_FDEQ_BIN_11 +232 0x1B1E //RX_FDEQ_BIN_12 +233 0x1E1E //RX_FDEQ_BIN_13 +234 0x1E28 //RX_FDEQ_BIN_14 +235 0x282C //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x4000 //RX_FDEQ_RESRV_0 +245 0x0320 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0030 //RX_FDDRC_BAND_MARGIN_1 +248 0x0050 //RX_FDDRC_BAND_MARGIN_2 +249 0x0080 //RX_FDDRC_BAND_MARGIN_3 +250 0x0004 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x2000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x2000 //RX_FDDRC_THRD_3_2 +258 0x5000 //RX_FDDRC_THRD_3_3 +259 0x4000 //RX_FDDRC_SLANT_0_0 +260 0x4000 //RX_FDDRC_SLANT_0_1 +261 0x4000 //RX_FDDRC_SLANT_0_2 +262 0x4000 //RX_FDDRC_SLANT_0_3 +263 0x7FFF //RX_FDDRC_SLANT_1_0 +264 0x7FFF //RX_FDDRC_SLANT_1_1 +265 0x7FFF //RX_FDDRC_SLANT_1_2 +266 0x7FFF //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +286 0x001A //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 +#VOL 2 +163 0x4000 //RX_TDDRC_ALPHA_UP_1 +164 0x4000 //RX_TDDRC_ALPHA_UP_2 +165 0x4000 //RX_TDDRC_ALPHA_UP_3 +166 0x4000 //RX_TDDRC_ALPHA_UP_4 +184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +190 0x7FFF //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +269 0x0001 //RX_TDDRC_THRD_0 +270 0x0002 //RX_TDDRC_THRD_1 +271 0x1800 //RX_TDDRC_THRD_2 +272 0x1800 //RX_TDDRC_THRD_3 +273 0x6000 //RX_TDDRC_SLANT_0 +274 0x6E00 //RX_TDDRC_SLANT_1 +275 0x4000 //RX_TDDRC_ALPHA_UP_0 +276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x199A //RX_TDDRC_HMNC_GAIN +279 0x0001 //RX_TDDRC_SMT_FLAG +280 0x0CCD //RX_TDDRC_SMT_W +281 0x03C3 //RX_TDDRC_DRC_GAIN +195 0x0020 //RX_FDEQ_SUBNUM +196 0x4848 //RX_FDEQ_GAIN_0 +197 0x4848 //RX_FDEQ_GAIN_1 +198 0x4848 //RX_FDEQ_GAIN_2 +199 0x4870 //RX_FDEQ_GAIN_3 +200 0x4848 //RX_FDEQ_GAIN_4 +201 0x4848 //RX_FDEQ_GAIN_5 +202 0x4850 //RX_FDEQ_GAIN_6 +203 0x485C //RX_FDEQ_GAIN_7 +204 0x5C60 //RX_FDEQ_GAIN_8 +205 0x685C //RX_FDEQ_GAIN_9 +206 0x5640 //RX_FDEQ_GAIN_10 +207 0x4040 //RX_FDEQ_GAIN_11 +208 0x5C58 //RX_FDEQ_GAIN_12 +209 0x5C60 //RX_FDEQ_GAIN_13 +210 0x6060 //RX_FDEQ_GAIN_14 +211 0x6060 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0202 //RX_FDEQ_BIN_0 +221 0x0203 //RX_FDEQ_BIN_1 +222 0x0303 //RX_FDEQ_BIN_2 +223 0x0402 //RX_FDEQ_BIN_3 +224 0x0504 //RX_FDEQ_BIN_4 +225 0x0209 //RX_FDEQ_BIN_5 +226 0x0808 //RX_FDEQ_BIN_6 +227 0x090A //RX_FDEQ_BIN_7 +228 0x0B0C //RX_FDEQ_BIN_8 +229 0x0D0E //RX_FDEQ_BIN_9 +230 0x1013 //RX_FDEQ_BIN_10 +231 0x1719 //RX_FDEQ_BIN_11 +232 0x1B1E //RX_FDEQ_BIN_12 +233 0x1E1E //RX_FDEQ_BIN_13 +234 0x1E28 //RX_FDEQ_BIN_14 +235 0x282C //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x4000 //RX_FDEQ_RESRV_0 +245 0x0320 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0030 //RX_FDDRC_BAND_MARGIN_1 +248 0x0050 //RX_FDDRC_BAND_MARGIN_2 +249 0x0080 //RX_FDDRC_BAND_MARGIN_3 +250 0x0004 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x2000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x2000 //RX_FDDRC_THRD_3_2 +258 0x5000 //RX_FDDRC_THRD_3_3 +259 0x4000 //RX_FDDRC_SLANT_0_0 +260 0x4000 //RX_FDDRC_SLANT_0_1 +261 0x4000 //RX_FDDRC_SLANT_0_2 +262 0x4000 //RX_FDDRC_SLANT_0_3 +263 0x7FFF //RX_FDDRC_SLANT_1_0 +264 0x7FFF //RX_FDDRC_SLANT_1_1 +265 0x7FFF //RX_FDDRC_SLANT_1_2 +266 0x7FFF //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +286 0x0025 //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 +#VOL 3 +163 0x4000 //RX_TDDRC_ALPHA_UP_1 +164 0x4000 //RX_TDDRC_ALPHA_UP_2 +165 0x4000 //RX_TDDRC_ALPHA_UP_3 +166 0x4000 //RX_TDDRC_ALPHA_UP_4 +184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +190 0x7FFF //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +269 0x0001 //RX_TDDRC_THRD_0 +270 0x0002 //RX_TDDRC_THRD_1 +271 0x1800 //RX_TDDRC_THRD_2 +272 0x1800 //RX_TDDRC_THRD_3 +273 0x6000 //RX_TDDRC_SLANT_0 +274 0x6E00 //RX_TDDRC_SLANT_1 +275 0x4000 //RX_TDDRC_ALPHA_UP_0 +276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x199A //RX_TDDRC_HMNC_GAIN +279 0x0001 //RX_TDDRC_SMT_FLAG +280 0x0CCD //RX_TDDRC_SMT_W +281 0x03C3 //RX_TDDRC_DRC_GAIN +195 0x0020 //RX_FDEQ_SUBNUM +196 0x4848 //RX_FDEQ_GAIN_0 +197 0x4848 //RX_FDEQ_GAIN_1 +198 0x4848 //RX_FDEQ_GAIN_2 +199 0x4870 //RX_FDEQ_GAIN_3 +200 0x4848 //RX_FDEQ_GAIN_4 +201 0x4848 //RX_FDEQ_GAIN_5 +202 0x4850 //RX_FDEQ_GAIN_6 +203 0x485C //RX_FDEQ_GAIN_7 +204 0x5C60 //RX_FDEQ_GAIN_8 +205 0x685C //RX_FDEQ_GAIN_9 +206 0x5640 //RX_FDEQ_GAIN_10 +207 0x4040 //RX_FDEQ_GAIN_11 +208 0x5C58 //RX_FDEQ_GAIN_12 +209 0x5C60 //RX_FDEQ_GAIN_13 +210 0x6060 //RX_FDEQ_GAIN_14 +211 0x6060 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0202 //RX_FDEQ_BIN_0 +221 0x0203 //RX_FDEQ_BIN_1 +222 0x0303 //RX_FDEQ_BIN_2 +223 0x0402 //RX_FDEQ_BIN_3 +224 0x0504 //RX_FDEQ_BIN_4 +225 0x0209 //RX_FDEQ_BIN_5 +226 0x0808 //RX_FDEQ_BIN_6 +227 0x090A //RX_FDEQ_BIN_7 +228 0x0B0C //RX_FDEQ_BIN_8 +229 0x0D0E //RX_FDEQ_BIN_9 +230 0x1013 //RX_FDEQ_BIN_10 +231 0x1719 //RX_FDEQ_BIN_11 +232 0x1B1E //RX_FDEQ_BIN_12 +233 0x1E1E //RX_FDEQ_BIN_13 +234 0x1E28 //RX_FDEQ_BIN_14 +235 0x282C //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x4000 //RX_FDEQ_RESRV_0 +245 0x0320 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0030 //RX_FDDRC_BAND_MARGIN_1 +248 0x0050 //RX_FDDRC_BAND_MARGIN_2 +249 0x0080 //RX_FDDRC_BAND_MARGIN_3 +250 0x0004 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x2000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x2000 //RX_FDDRC_THRD_3_2 +258 0x5000 //RX_FDDRC_THRD_3_3 +259 0x4000 //RX_FDDRC_SLANT_0_0 +260 0x4000 //RX_FDDRC_SLANT_0_1 +261 0x4000 //RX_FDDRC_SLANT_0_2 +262 0x4000 //RX_FDDRC_SLANT_0_3 +263 0x7FFF //RX_FDDRC_SLANT_1_0 +264 0x7FFF //RX_FDDRC_SLANT_1_1 +265 0x7FFF //RX_FDDRC_SLANT_1_2 +266 0x7FFF //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +286 0x0034 //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 +#VOL 4 +163 0x4000 //RX_TDDRC_ALPHA_UP_1 +164 0x4000 //RX_TDDRC_ALPHA_UP_2 +165 0x4000 //RX_TDDRC_ALPHA_UP_3 +166 0x4000 //RX_TDDRC_ALPHA_UP_4 +184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +190 0x7FFF //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +269 0x0001 //RX_TDDRC_THRD_0 +270 0x0002 //RX_TDDRC_THRD_1 +271 0x1800 //RX_TDDRC_THRD_2 +272 0x1800 //RX_TDDRC_THRD_3 +273 0x6000 //RX_TDDRC_SLANT_0 +274 0x6E00 //RX_TDDRC_SLANT_1 +275 0x4000 //RX_TDDRC_ALPHA_UP_0 +276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x199A //RX_TDDRC_HMNC_GAIN +279 0x0001 //RX_TDDRC_SMT_FLAG +280 0x0CCD //RX_TDDRC_SMT_W +281 0x03C3 //RX_TDDRC_DRC_GAIN +195 0x0020 //RX_FDEQ_SUBNUM +196 0x4848 //RX_FDEQ_GAIN_0 +197 0x4848 //RX_FDEQ_GAIN_1 +198 0x4848 //RX_FDEQ_GAIN_2 +199 0x4870 //RX_FDEQ_GAIN_3 +200 0x4848 //RX_FDEQ_GAIN_4 +201 0x4848 //RX_FDEQ_GAIN_5 +202 0x4850 //RX_FDEQ_GAIN_6 +203 0x485C //RX_FDEQ_GAIN_7 +204 0x5C60 //RX_FDEQ_GAIN_8 +205 0x685C //RX_FDEQ_GAIN_9 +206 0x5640 //RX_FDEQ_GAIN_10 +207 0x4040 //RX_FDEQ_GAIN_11 +208 0x5C58 //RX_FDEQ_GAIN_12 +209 0x5C60 //RX_FDEQ_GAIN_13 +210 0x6060 //RX_FDEQ_GAIN_14 +211 0x6060 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0202 //RX_FDEQ_BIN_0 +221 0x0203 //RX_FDEQ_BIN_1 +222 0x0303 //RX_FDEQ_BIN_2 +223 0x0402 //RX_FDEQ_BIN_3 +224 0x0504 //RX_FDEQ_BIN_4 +225 0x0209 //RX_FDEQ_BIN_5 +226 0x0808 //RX_FDEQ_BIN_6 +227 0x090A //RX_FDEQ_BIN_7 +228 0x0B0C //RX_FDEQ_BIN_8 +229 0x0D0E //RX_FDEQ_BIN_9 +230 0x1013 //RX_FDEQ_BIN_10 +231 0x1719 //RX_FDEQ_BIN_11 +232 0x1B1E //RX_FDEQ_BIN_12 +233 0x1E1E //RX_FDEQ_BIN_13 +234 0x1E28 //RX_FDEQ_BIN_14 +235 0x282C //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x4000 //RX_FDEQ_RESRV_0 +245 0x0320 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0030 //RX_FDDRC_BAND_MARGIN_1 +248 0x0050 //RX_FDDRC_BAND_MARGIN_2 +249 0x0080 //RX_FDDRC_BAND_MARGIN_3 +250 0x0004 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x2000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x2000 //RX_FDDRC_THRD_3_2 +258 0x5000 //RX_FDDRC_THRD_3_3 +259 0x4000 //RX_FDDRC_SLANT_0_0 +260 0x4000 //RX_FDDRC_SLANT_0_1 +261 0x4000 //RX_FDDRC_SLANT_0_2 +262 0x4000 //RX_FDDRC_SLANT_0_3 +263 0x7FFF //RX_FDDRC_SLANT_1_0 +264 0x7FFF //RX_FDDRC_SLANT_1_1 +265 0x7FFF //RX_FDDRC_SLANT_1_2 +266 0x7FFF //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +286 0x004D //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 +#VOL 5 +163 0x4000 //RX_TDDRC_ALPHA_UP_1 +164 0x4000 //RX_TDDRC_ALPHA_UP_2 +165 0x4000 //RX_TDDRC_ALPHA_UP_3 +166 0x4000 //RX_TDDRC_ALPHA_UP_4 +184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +190 0x7FFF //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +269 0x0001 //RX_TDDRC_THRD_0 +270 0x0002 //RX_TDDRC_THRD_1 +271 0x1800 //RX_TDDRC_THRD_2 +272 0x1800 //RX_TDDRC_THRD_3 +273 0x6000 //RX_TDDRC_SLANT_0 +274 0x6E00 //RX_TDDRC_SLANT_1 +275 0x4000 //RX_TDDRC_ALPHA_UP_0 +276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x199A //RX_TDDRC_HMNC_GAIN +279 0x0001 //RX_TDDRC_SMT_FLAG +280 0x0CCD //RX_TDDRC_SMT_W +281 0x03C3 //RX_TDDRC_DRC_GAIN +195 0x0020 //RX_FDEQ_SUBNUM +196 0x4848 //RX_FDEQ_GAIN_0 +197 0x4848 //RX_FDEQ_GAIN_1 +198 0x4848 //RX_FDEQ_GAIN_2 +199 0x4870 //RX_FDEQ_GAIN_3 +200 0x4848 //RX_FDEQ_GAIN_4 +201 0x4848 //RX_FDEQ_GAIN_5 +202 0x4850 //RX_FDEQ_GAIN_6 +203 0x485C //RX_FDEQ_GAIN_7 +204 0x5C60 //RX_FDEQ_GAIN_8 +205 0x685C //RX_FDEQ_GAIN_9 +206 0x5640 //RX_FDEQ_GAIN_10 +207 0x4040 //RX_FDEQ_GAIN_11 +208 0x5C58 //RX_FDEQ_GAIN_12 +209 0x5C60 //RX_FDEQ_GAIN_13 +210 0x6060 //RX_FDEQ_GAIN_14 +211 0x6060 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0202 //RX_FDEQ_BIN_0 +221 0x0203 //RX_FDEQ_BIN_1 +222 0x0303 //RX_FDEQ_BIN_2 +223 0x0402 //RX_FDEQ_BIN_3 +224 0x0504 //RX_FDEQ_BIN_4 +225 0x0209 //RX_FDEQ_BIN_5 +226 0x0808 //RX_FDEQ_BIN_6 +227 0x090A //RX_FDEQ_BIN_7 +228 0x0B0C //RX_FDEQ_BIN_8 +229 0x0D0E //RX_FDEQ_BIN_9 +230 0x1013 //RX_FDEQ_BIN_10 +231 0x1719 //RX_FDEQ_BIN_11 +232 0x1B1E //RX_FDEQ_BIN_12 +233 0x1E1E //RX_FDEQ_BIN_13 +234 0x1E28 //RX_FDEQ_BIN_14 +235 0x282C //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x4000 //RX_FDEQ_RESRV_0 +245 0x0320 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0030 //RX_FDDRC_BAND_MARGIN_1 +248 0x0050 //RX_FDDRC_BAND_MARGIN_2 +249 0x0080 //RX_FDDRC_BAND_MARGIN_3 +250 0x0004 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x2000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x2000 //RX_FDDRC_THRD_3_2 +258 0x5000 //RX_FDDRC_THRD_3_3 +259 0x4000 //RX_FDDRC_SLANT_0_0 +260 0x4000 //RX_FDDRC_SLANT_0_1 +261 0x4000 //RX_FDDRC_SLANT_0_2 +262 0x4000 //RX_FDDRC_SLANT_0_3 +263 0x7FFF //RX_FDDRC_SLANT_1_0 +264 0x7FFF //RX_FDDRC_SLANT_1_1 +265 0x7FFF //RX_FDDRC_SLANT_1_2 +266 0x7FFF //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +286 0x0074 //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 +#VOL 6 +163 0x4000 //RX_TDDRC_ALPHA_UP_1 +164 0x4000 //RX_TDDRC_ALPHA_UP_2 +165 0x4000 //RX_TDDRC_ALPHA_UP_3 +166 0x4000 //RX_TDDRC_ALPHA_UP_4 +184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +190 0x7FFF //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +269 0x0001 //RX_TDDRC_THRD_0 +270 0x0002 //RX_TDDRC_THRD_1 +271 0x1800 //RX_TDDRC_THRD_2 +272 0x1800 //RX_TDDRC_THRD_3 +273 0x6000 //RX_TDDRC_SLANT_0 +274 0x6E00 //RX_TDDRC_SLANT_1 +275 0x4000 //RX_TDDRC_ALPHA_UP_0 +276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x199A //RX_TDDRC_HMNC_GAIN +279 0x0001 //RX_TDDRC_SMT_FLAG +280 0x0CCD //RX_TDDRC_SMT_W +281 0x03C3 //RX_TDDRC_DRC_GAIN +195 0x0020 //RX_FDEQ_SUBNUM +196 0x4848 //RX_FDEQ_GAIN_0 +197 0x4848 //RX_FDEQ_GAIN_1 +198 0x4848 //RX_FDEQ_GAIN_2 +199 0x4870 //RX_FDEQ_GAIN_3 +200 0x4848 //RX_FDEQ_GAIN_4 +201 0x4848 //RX_FDEQ_GAIN_5 +202 0x4850 //RX_FDEQ_GAIN_6 +203 0x485C //RX_FDEQ_GAIN_7 +204 0x5C60 //RX_FDEQ_GAIN_8 +205 0x685C //RX_FDEQ_GAIN_9 +206 0x5640 //RX_FDEQ_GAIN_10 +207 0x4040 //RX_FDEQ_GAIN_11 +208 0x5C58 //RX_FDEQ_GAIN_12 +209 0x5C60 //RX_FDEQ_GAIN_13 +210 0x6060 //RX_FDEQ_GAIN_14 +211 0x6060 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0202 //RX_FDEQ_BIN_0 +221 0x0203 //RX_FDEQ_BIN_1 +222 0x0303 //RX_FDEQ_BIN_2 +223 0x0402 //RX_FDEQ_BIN_3 +224 0x0504 //RX_FDEQ_BIN_4 +225 0x0209 //RX_FDEQ_BIN_5 +226 0x0808 //RX_FDEQ_BIN_6 +227 0x090A //RX_FDEQ_BIN_7 +228 0x0B0C //RX_FDEQ_BIN_8 +229 0x0D0E //RX_FDEQ_BIN_9 +230 0x1013 //RX_FDEQ_BIN_10 +231 0x1719 //RX_FDEQ_BIN_11 +232 0x1B1E //RX_FDEQ_BIN_12 +233 0x1E1E //RX_FDEQ_BIN_13 +234 0x1E28 //RX_FDEQ_BIN_14 +235 0x282C //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x4000 //RX_FDEQ_RESRV_0 +245 0x0320 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0030 //RX_FDDRC_BAND_MARGIN_1 +248 0x0050 //RX_FDDRC_BAND_MARGIN_2 +249 0x0080 //RX_FDDRC_BAND_MARGIN_3 +250 0x0004 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x2000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x2000 //RX_FDDRC_THRD_3_2 +258 0x5000 //RX_FDDRC_THRD_3_3 +259 0x4000 //RX_FDDRC_SLANT_0_0 +260 0x4000 //RX_FDDRC_SLANT_0_1 +261 0x4000 //RX_FDDRC_SLANT_0_2 +262 0x4000 //RX_FDDRC_SLANT_0_3 +263 0x7FFF //RX_FDDRC_SLANT_1_0 +264 0x7FFF //RX_FDDRC_SLANT_1_1 +265 0x7FFF //RX_FDDRC_SLANT_1_2 +266 0x7FFF //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +286 0x0100 //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 -#CASE_NAME HANDSFREE-HANDSFREE-VOICE_GENERIC-NB -#PARAM_TYPE TX+RX -#TOTAL_CUSTOM_STEP 7 +#CASE_NAME HANDSFREE-HANDFREE-VOICE_GENERIC-NB +#PARAM_MODE FULL +#PARAM_TYPE TX+2RX +#TOTAL_CUSTOM_STEP 7+7 #TX 0 0x0001 //TX_OPERATION_MODE_0 1 0x0001 //TX_OPERATION_MODE_1 -2 0x0033 //TX_PATCH_REG +2 0x0073 //TX_PATCH_REG 3 0x2F7C //TX_SENDFUNC_MODE_0 4 0x0001 //TX_SENDFUNC_MODE_1 5 0x0003 //TX_NUM_MIC @@ -5416,7 +8168,7 @@ 147 0x0100 //TX_AEC_REF_GAIN_0 148 0x0800 //TX_AEC_REF_GAIN_1 149 0x0800 //TX_AEC_REF_GAIN_2 -150 0x7500 //TX_EAD_THR +150 0x7A00 //TX_EAD_THR 151 0x1000 //TX_THR_RE_EST 152 0x0200 //TX_MIN_EQ_RE_EST_0 153 0x0200 //TX_MIN_EQ_RE_EST_1 @@ -5437,7 +8189,7 @@ 168 0x2000 //TX_GAIN_NP 169 0x0180 //TX_SE_HOLD_N 170 0x00C8 //TX_DT_HOLD_N -171 0x05DC //TX_DT2_HOLD_N +171 0x0200 //TX_DT2_HOLD_N 172 0x6666 //TX_AEC_RESRV_0 173 0x0000 //TX_AEC_RESRV_1 174 0x0014 //TX_AEC_RESRV_2 @@ -5463,10 +8215,10 @@ 194 0x0000 //TX_NORMENERTH 195 0x0000 //TX_NORMENERHIGHTH 196 0x0000 //TX_NORMENERHIGHTHL -197 0x6590 //TX_DTD_THR1_0 -198 0x6590 //TX_DTD_THR1_1 -199 0x6590 //TX_DTD_THR1_2 -200 0x7FF0 //TX_DTD_THR1_3 +197 0x7148 //TX_DTD_THR1_0 +198 0x7148 //TX_DTD_THR1_1 +199 0x7148 //TX_DTD_THR1_2 +200 0x5DC0 //TX_DTD_THR1_3 201 0x7FF0 //TX_DTD_THR1_4 202 0x7FF0 //TX_DTD_THR1_5 203 0x7FF0 //TX_DTD_THR1_6 @@ -5494,7 +8246,7 @@ 225 0x1770 //TX_RATIO_DT_L_TH_HIGH 226 0x4E20 //TX_RATIO_DT_H_TH_HIGH 227 0x09C4 //TX_RATIO_DT_L0_TH -228 0x0800 //TX_B_POST_FILT_ECHO_L +228 0x2000 //TX_B_POST_FILT_ECHO_L 229 0x2000 //TX_B_POST_FILT_ECHO_H 230 0x0200 //TX_MIN_G_CTRL_ECHO 231 0x1000 //TX_B_LESSCUT_RTO_ECHO @@ -5517,12 +8269,12 @@ 248 0xF800 //TX_THR_SN_EST_6 249 0xF800 //TX_THR_SN_EST_7 250 0x0050 //TX_DELTA_THR_SN_EST_0 -251 0x01A0 //TX_DELTA_THR_SN_EST_1 +251 0x0200 //TX_DELTA_THR_SN_EST_1 252 0x0200 //TX_DELTA_THR_SN_EST_2 -253 0x0200 //TX_DELTA_THR_SN_EST_3 -254 0x0100 //TX_DELTA_THR_SN_EST_4 +253 0x0100 //TX_DELTA_THR_SN_EST_3 +254 0x0200 //TX_DELTA_THR_SN_EST_4 255 0x0200 //TX_DELTA_THR_SN_EST_5 -256 0x0200 //TX_DELTA_THR_SN_EST_6 +256 0x01A0 //TX_DELTA_THR_SN_EST_6 257 0x0200 //TX_DELTA_THR_SN_EST_7 258 0x4000 //TX_LAMBDA_NN_EST_0 259 0x4000 //TX_LAMBDA_NN_EST_1 @@ -5548,29 +8300,29 @@ 279 0x1000 //TX_B_POST_FLT_0 280 0x1000 //TX_B_POST_FLT_1 281 0x0010 //TX_NS_LVL_CTRL_0 -282 0x0012 //TX_NS_LVL_CTRL_1 -283 0x0017 //TX_NS_LVL_CTRL_2 -284 0x0015 //TX_NS_LVL_CTRL_3 +282 0x0017 //TX_NS_LVL_CTRL_1 +283 0x0015 //TX_NS_LVL_CTRL_2 +284 0x0012 //TX_NS_LVL_CTRL_3 285 0x0012 //TX_NS_LVL_CTRL_4 -286 0x0012 //TX_NS_LVL_CTRL_5 -287 0x0011 //TX_NS_LVL_CTRL_6 +286 0x0011 //TX_NS_LVL_CTRL_5 +287 0x0012 //TX_NS_LVL_CTRL_6 288 0x0011 //TX_NS_LVL_CTRL_7 -289 0x000F //TX_MIN_GAIN_S_0 -290 0x000F //TX_MIN_GAIN_S_1 -291 0x000D //TX_MIN_GAIN_S_2 -292 0x000F //TX_MIN_GAIN_S_3 -293 0x000F //TX_MIN_GAIN_S_4 -294 0x000F //TX_MIN_GAIN_S_5 -295 0x0010 //TX_MIN_GAIN_S_6 -296 0x000F //TX_MIN_GAIN_S_7 +289 0x0018 //TX_MIN_GAIN_S_0 +290 0x0018 //TX_MIN_GAIN_S_1 +291 0x0018 //TX_MIN_GAIN_S_2 +292 0x0018 //TX_MIN_GAIN_S_3 +293 0x0018 //TX_MIN_GAIN_S_4 +294 0x0018 //TX_MIN_GAIN_S_5 +295 0x0018 //TX_MIN_GAIN_S_6 +296 0x0018 //TX_MIN_GAIN_S_7 297 0x4000 //TX_NMOS_SUP 298 0x0000 //TX_NS_MAX_PRI_SNR_TH 299 0x0000 //TX_NMOS_SUP_MENSA 300 0x7FFF //TX_SNRI_SUP_0 -301 0x4000 //TX_SNRI_SUP_1 -302 0x1000 //TX_SNRI_SUP_2 -303 0x4000 //TX_SNRI_SUP_3 -304 0x2400 //TX_SNRI_SUP_4 +301 0x1000 //TX_SNRI_SUP_1 +302 0x4000 //TX_SNRI_SUP_2 +303 0x2400 //TX_SNRI_SUP_3 +304 0x4000 //TX_SNRI_SUP_4 305 0x4000 //TX_SNRI_SUP_5 306 0x4000 //TX_SNRI_SUP_6 307 0x7FFF //TX_SNRI_SUP_7 @@ -5580,20 +8332,20 @@ 311 0x000A //TX_MUSIC_MORENS 312 0x7FFF //TX_A_POST_FILT_0 313 0x2000 //TX_A_POST_FILT_1 -314 0x4000 //TX_A_POST_FILT_S_0 -315 0x5000 //TX_A_POST_FILT_S_1 -316 0x2000 //TX_A_POST_FILT_S_2 -317 0x4000 //TX_A_POST_FILT_S_3 -318 0x1000 //TX_A_POST_FILT_S_4 -319 0x3000 //TX_A_POST_FILT_S_5 -320 0x5000 //TX_A_POST_FILT_S_6 -321 0x7000 //TX_A_POST_FILT_S_7 +314 0x7FFF //TX_A_POST_FILT_S_0 +315 0x7FFF //TX_A_POST_FILT_S_1 +316 0x7FFF //TX_A_POST_FILT_S_2 +317 0x7FFF //TX_A_POST_FILT_S_3 +318 0x7FFF //TX_A_POST_FILT_S_4 +319 0x7FFF //TX_A_POST_FILT_S_5 +320 0x7FFF //TX_A_POST_FILT_S_6 +321 0x7FFF //TX_A_POST_FILT_S_7 322 0x1000 //TX_B_POST_FILT_0 323 0x1000 //TX_B_POST_FILT_1 324 0x1000 //TX_B_POST_FILT_2 -325 0x1000 //TX_B_POST_FILT_3 -326 0x5000 //TX_B_POST_FILT_4 -327 0x3000 //TX_B_POST_FILT_5 +325 0x5000 //TX_B_POST_FILT_3 +326 0x3000 //TX_B_POST_FILT_4 +327 0x1000 //TX_B_POST_FILT_5 328 0x1000 //TX_B_POST_FILT_6 329 0x2000 //TX_B_POST_FILT_7 330 0x4000 //TX_B_LESSCUT_RTO_S_0 @@ -5605,14 +8357,14 @@ 336 0x6000 //TX_B_LESSCUT_RTO_S_6 337 0x7FFF //TX_B_LESSCUT_RTO_S_7 338 0x7E00 //TX_LAMBDA_PFILT -339 0x7D00 //TX_LAMBDA_PFILT_S_0 -340 0x7900 //TX_LAMBDA_PFILT_S_1 -341 0x7400 //TX_LAMBDA_PFILT_S_2 -342 0x7900 //TX_LAMBDA_PFILT_S_3 -343 0x7000 //TX_LAMBDA_PFILT_S_4 -344 0x7D00 //TX_LAMBDA_PFILT_S_5 -345 0x7D00 //TX_LAMBDA_PFILT_S_6 -346 0x7D00 //TX_LAMBDA_PFILT_S_7 +339 0x7E00 //TX_LAMBDA_PFILT_S_0 +340 0x7E00 //TX_LAMBDA_PFILT_S_1 +341 0x7E00 //TX_LAMBDA_PFILT_S_2 +342 0x7E00 //TX_LAMBDA_PFILT_S_3 +343 0x7E00 //TX_LAMBDA_PFILT_S_4 +344 0x7E00 //TX_LAMBDA_PFILT_S_5 +345 0x7E00 //TX_LAMBDA_PFILT_S_6 +346 0x7E00 //TX_LAMBDA_PFILT_S_7 347 0x0200 //TX_K_PEPPER 348 0x0800 //TX_A_PEPPER 349 0x1EAA //TX_K_PEPPER_HF @@ -5646,10 +8398,10 @@ 377 0x7FFF //TX_NOISE_TH_5_4 378 0x0FA0 //TX_NOISE_TH_6 379 0x000A //TX_MINENOISE_TH -380 0x4000 //TX_MINENOISE_MIC0_TH_MTS -381 0xFFEE //TX_MINENOISE_MIC0_TH_EXP -382 0x6000 //TX_MINENOISE_MIC0_S_TH_MTS -383 0xFFF3 //TX_MINENOISE_MIC0_S_TH_EXP +380 0xD508 //TX_MORENS_TFMASK_TH +381 0x0001 //TX_DRC_QUIET_FLOOR +382 0x3A98 //TX_RATIODTL_CUT_TH +383 0x0DAC //TX_DT_CUT_K1 384 0x0666 //TX_OUT_ENER_S_TH_CLEAN 385 0x0666 //TX_OUT_ENER_S_TH_LESSCLEAN 386 0x0333 //TX_OUT_ENER_S_TH_NOISY @@ -5657,15 +8409,15 @@ 388 0x1000 //TX_OUT_ENER_TH_SPEECH 389 0x2000 //TX_SN_NPB_GAIN 390 0x0000 //TX_NN_NPB_GAIN -391 0x0000 //TX_CSX_ALPHA_0 -392 0x0000 //TX_CSX_ALPHA_1 -393 0x0000 //TX_CSX_ALPHA_2 -394 0x0000 //TX_CSX_ALPHA_3 -395 0x0800 //TX_MU_ARSP_EST -396 0x00C8 //TX_P_OUTBEAM_MIN_TH +391 0x7FFF //TX_POST_MASK_SUP_HSNE +392 0x7000 //TX_TAIL_DET_TH +393 0x4000 //TX_B_LESSCUT_RTO_WTA +394 0x0000 //TX_MEL_G_R +395 0x0080 //TX_SUPHIGH_TH +396 0x0000 //TX_MASK_G_R 397 0x0002 //TX_EXTRA_NS_L -398 0x0800 //TX_EXTRA_NS_A -399 0x0005 //TX_VR_NOISE_FLOOR_TH +398 0x1800 //TX_C_POST_FLT_MASK +399 0x7FFF //TX_A_POST_FLT_WNS 400 0x0148 //TX_MIN_G_LOW300HZ 401 0x0001 //TX_MAXLEVEL_CNG 402 0x00B4 //TX_STN_NOISE_TH @@ -5775,21 +8527,21 @@ 506 0x2000 //TX_RADIODTLV 507 0x0320 //TX_POWER_LINEIN_TH 508 0x0014 //TX_FE_VADCOUNT_TH_FC -509 0x0000 //TX_ECHO_SUPP_FC +509 0x000A //TX_ECHO_SUPP_FC 510 0x0C80 //TX_ECHO_TH 511 0x6666 //TX_MIC_TO_BFGAIN 512 0x0000 //TX_MICTOBFGAIN0 513 0x0000 //TX_FASTMUE_TH -514 0x0000 //TX_DERVB_LEN_0 -515 0x0000 //TX_DERVB_LEN_1 -516 0x0000 //TX_RHO_DERVB -517 0x0000 //TX_MIC_INDX_DERVB -518 0x0000 //TX_MU_DERVB -519 0x0000 //TX_DR_RESRV_0 -520 0x0000 //TX_DR_RESRV_1 -521 0x0000 //TX_DR_RESRV_2 -522 0x0000 //TX_DR_RESRV_3 -523 0x0000 //TX_DR_RESRV_4 +514 0x3000 //TX_DEREVERB_LF_MU +515 0x34CD //TX_DEREVERB_HF_MU +516 0x0007 //TX_DEREVERB_DELAY +517 0x0004 //TX_DEREVERB_COEF_LEN +518 0x0003 //TX_DEREVERB_DNR +519 0x0000 //TX_DEREVERB_ALPHA +520 0x0000 //TX_DEREVERB_BETA +521 0x3A98 //TX_GSC_RTOL_TH +522 0x3A98 //TX_GSC_RTOH_TH +523 0x7E2C //TX_WIDE2_MEANHTH 524 0x0000 //TX_DR_RESRV_5 525 0x0000 //TX_DR_RESRV_6 526 0x0000 //TX_DR_RESRV_7 @@ -6157,14 +8909,79 @@ 888 0x0028 //TX_FASTNS_ARSPC_TH 889 0xC000 //TX_FASTNS_MASK5_TH 890 0x4848 //TX_POSTSSA_MIN_G_VR_MASK -891 0x7FFF //TX_A_LESSCUT_RTO_MASK +891 0x1000 //TX_A_LESSCUT_RTO_MASK 892 0x1770 //TX_FASTNS_NOISETH 893 0xC000 //TX_FASTNS_SSA_THLFL 894 0xC000 //TX_FASTNS_SSA_THHFL 895 0xCCCC //TX_FASTNS_SSA_THLFH 896 0xD999 //TX_FASTNS_SSA_THHFH +897 0x2339 //TX_SENDFUNC_REG_MICMUTE +898 0x0021 //TX_SENDFUNC_REG_MICMUTE1 +899 0x02BC //TX_MICMUTE_RATIO_THR +900 0x0140 //TX_MICMUTE_AMP_THR +901 0x0004 //TX_MICMUTE_HPF_IND +902 0x00C0 //TX_MICMUTE_LOG_EYR_TH +903 0x0008 //TX_MICMUTE_CVG_TIME +904 0x0008 //TX_MICMUTE_RELEASE_TIME +905 0x01FE //TX_MIC_VOLUME_MIC0MUTE +906 0x0020 //TX_MICMUTE_EPD_OFFSET_0 +907 0x001E //TX_MICMUTE_FRQ_AEC_L +908 0x7999 //TX_MICMUTE_EAD_THR +909 0x7FFF //TX_MICMUTE_LAMBDA_CB_NLE +910 0x7FFF //TX_MICMUTE_LAMBDA_RE_EST +911 0x4000 //TX_DTD_THR1_MICMUTE_0 +912 0x7000 //TX_DTD_THR1_MICMUTE_1 +913 0x7FFF //TX_DTD_THR1_MICMUTE_2 +914 0x7FFF //TX_DTD_THR1_MICMUTE_3 +915 0x6CCC //TX_DTD_THR2_MICMUTE_0 +916 0x0400 //TX_MICMUTE_MIN_EQ_RE_EST_0 +917 0x0400 //TX_MICMUTE_MIN_EQ_RE_EST_1 +918 0x1000 //TX_MICMUTE_MIN_EQ_RE_EST_2 +919 0x7FFF //TX_MICMUTE_MIN_EQ_RE_EST_3 +920 0x7FFF //TX_MICMUTE_MIN_EQ_RE_EST_4 +921 0x4000 //TX_MICMUTE_C_POST_FLT +922 0x03E8 //TX_MICMUTE_DT_CUT_K +923 0x0001 //TX_MICMUTE_DT_CUT_THR +924 0x03E8 //TX_MICMUTE_DT_CUT_K2 +925 0x0001 //TX_MICMUTE_DT_CUT_THR2 +926 0x0064 //TX_MICMUTE_DT2_HOLD_N +927 0x1000 //TX_MICMUTE_RATIODTH_THCUT +928 0x1000 //TX_MICMUTE_B_POST_FLT_ECHOL +929 0x7FFF //TX_MICMUTE_B_POST_FLT_ECHOH +930 0x0400 //TX_MICMUTE_C_POST_FLT_MASK +931 0x7999 //TX_MICMUTE_RATIODTL_CUT_TH +932 0x0258 //TX_MICMUTE_DT_CUT_K1 +933 0x0800 //TX_MICMUTE_N2_SN_EST +934 0xFC00 //TX_MICMUTE_THR_SN_EST_0 +935 0x001C //TX_MICMUTE_MIN_G_CTRL_0 +936 0x6000 //TX_MICMUTE_A_POST_FILT_S_0 +937 0x7000 //TX_MICMUTE_B_POST_FILT_0 +938 0x2710 //TX_MIC1RUB_AMP_THR +939 0x0010 //TX_MIC1MUTE_RATIO_THR +940 0x0450 //TX_MIC1MUTE_AMP_THR +941 0x0008 //TX_MIC1MUTE_CVG_TIME +942 0x0008 //TX_MIC1MUTE_RELEASE_TIME +943 0x0000 //TX_AMS_RESRV_01 +944 0x0000 //TX_AMS_RESRV_02 +945 0x0000 //TX_AMS_RESRV_03 +946 0x0000 //TX_AMS_RESRV_04 +947 0x0000 //TX_AMS_RESRV_05 +948 0x0000 //TX_AMS_RESRV_06 +949 0x0000 //TX_AMS_RESRV_07 +950 0x0000 //TX_AMS_RESRV_08 +951 0x0000 //TX_AMS_RESRV_09 +952 0x0000 //TX_AMS_RESRV_10 +953 0x0000 //TX_AMS_RESRV_11 +954 0x0000 //TX_AMS_RESRV_12 +955 0x0000 //TX_AMS_RESRV_13 +956 0x0000 //TX_AMS_RESRV_14 +957 0x0000 //TX_AMS_RESRV_15 +958 0x0000 //TX_AMS_RESRV_16 +959 0x0000 //TX_AMS_RESRV_17 +960 0x0000 //TX_AMS_RESRV_18 +961 0x0000 //TX_AMS_RESRV_19 #RX -0 0x027C //RX_RECVFUNC_MODE_0 +0 0x206C //RX_RECVFUNC_MODE_0 1 0x0000 //RX_RECVFUNC_MODE_1 2 0x0000 //RX_SAMPLINGFREQ_SIG 3 0x0000 //RX_SAMPLINGFREQ_PROC @@ -6203,16 +9020,16 @@ 36 0x0000 //RX_LMT_THRD 37 0x4000 //RX_LMT_ALPHA 38 0x0014 //RX_FDEQ_SUBNUM -39 0x8080 //RX_FDEQ_GAIN_0 -40 0x8054 //RX_FDEQ_GAIN_1 -41 0x5050 //RX_FDEQ_GAIN_2 -42 0x5058 //RX_FDEQ_GAIN_3 -43 0x5C70 //RX_FDEQ_GAIN_4 -44 0x4848 //RX_FDEQ_GAIN_5 -45 0x484C //RX_FDEQ_GAIN_6 -46 0x4848 //RX_FDEQ_GAIN_7 -47 0x485A //RX_FDEQ_GAIN_8 -48 0x5A58 //RX_FDEQ_GAIN_9 +39 0x5252 //RX_FDEQ_GAIN_0 +40 0x4E4F //RX_FDEQ_GAIN_1 +41 0x4743 //RX_FDEQ_GAIN_2 +42 0x454C //RX_FDEQ_GAIN_3 +43 0x4C49 //RX_FDEQ_GAIN_4 +44 0x584A //RX_FDEQ_GAIN_5 +45 0x4642 //RX_FDEQ_GAIN_6 +46 0x4043 //RX_FDEQ_GAIN_7 +47 0x454A //RX_FDEQ_GAIN_8 +48 0x4C53 //RX_FDEQ_GAIN_9 49 0x4848 //RX_FDEQ_GAIN_10 50 0x4848 //RX_FDEQ_GAIN_11 51 0x4848 //RX_FDEQ_GAIN_12 @@ -6231,8 +9048,8 @@ 64 0x0203 //RX_FDEQ_BIN_1 65 0x0303 //RX_FDEQ_BIN_2 66 0x0304 //RX_FDEQ_BIN_3 -67 0x0604 //RX_FDEQ_BIN_4 -68 0x0406 //RX_FDEQ_BIN_5 +67 0x0503 //RX_FDEQ_BIN_4 +68 0x0107 //RX_FDEQ_BIN_5 69 0x0708 //RX_FDEQ_BIN_6 70 0x090A //RX_FDEQ_BIN_7 71 0x0B0C //RX_FDEQ_BIN_8 @@ -6288,7 +9105,7 @@ 121 0x199A //RX_TDDRC_HMNC_GAIN 122 0x0001 //RX_TDDRC_SMT_FLAG 123 0x0CCD //RX_TDDRC_SMT_W -124 0x0780 //RX_TDDRC_DRC_GAIN +124 0x02D2 //RX_TDDRC_DRC_GAIN 125 0x7C00 //RX_LAMBDA_PKA_FP 126 0x2000 //RX_TPKA_FP 127 0x2000 //RX_MIN_G_FP @@ -6344,18 +9161,18 @@ 121 0x199A //RX_TDDRC_HMNC_GAIN 122 0x0001 //RX_TDDRC_SMT_FLAG 123 0x0CCD //RX_TDDRC_SMT_W -124 0x0780 //RX_TDDRC_DRC_GAIN +124 0x02D2 //RX_TDDRC_DRC_GAIN 38 0x0014 //RX_FDEQ_SUBNUM -39 0x8080 //RX_FDEQ_GAIN_0 -40 0x8054 //RX_FDEQ_GAIN_1 -41 0x5050 //RX_FDEQ_GAIN_2 -42 0x5058 //RX_FDEQ_GAIN_3 -43 0x5C70 //RX_FDEQ_GAIN_4 -44 0x4848 //RX_FDEQ_GAIN_5 -45 0x484C //RX_FDEQ_GAIN_6 -46 0x4848 //RX_FDEQ_GAIN_7 -47 0x485A //RX_FDEQ_GAIN_8 -48 0x5A58 //RX_FDEQ_GAIN_9 +39 0x5252 //RX_FDEQ_GAIN_0 +40 0x4E4F //RX_FDEQ_GAIN_1 +41 0x4743 //RX_FDEQ_GAIN_2 +42 0x454C //RX_FDEQ_GAIN_3 +43 0x4C49 //RX_FDEQ_GAIN_4 +44 0x584A //RX_FDEQ_GAIN_5 +45 0x4642 //RX_FDEQ_GAIN_6 +46 0x4043 //RX_FDEQ_GAIN_7 +47 0x454A //RX_FDEQ_GAIN_8 +48 0x4C53 //RX_FDEQ_GAIN_9 49 0x4848 //RX_FDEQ_GAIN_10 50 0x4848 //RX_FDEQ_GAIN_11 51 0x4848 //RX_FDEQ_GAIN_12 @@ -6374,8 +9191,8 @@ 64 0x0203 //RX_FDEQ_BIN_1 65 0x0303 //RX_FDEQ_BIN_2 66 0x0304 //RX_FDEQ_BIN_3 -67 0x0604 //RX_FDEQ_BIN_4 -68 0x0406 //RX_FDEQ_BIN_5 +67 0x0503 //RX_FDEQ_BIN_4 +68 0x0107 //RX_FDEQ_BIN_5 69 0x0708 //RX_FDEQ_BIN_6 70 0x090A //RX_FDEQ_BIN_7 71 0x0B0C //RX_FDEQ_BIN_8 @@ -6443,18 +9260,18 @@ 121 0x199A //RX_TDDRC_HMNC_GAIN 122 0x0001 //RX_TDDRC_SMT_FLAG 123 0x0CCD //RX_TDDRC_SMT_W -124 0x0780 //RX_TDDRC_DRC_GAIN +124 0x02D2 //RX_TDDRC_DRC_GAIN 38 0x0014 //RX_FDEQ_SUBNUM -39 0x8080 //RX_FDEQ_GAIN_0 -40 0x8054 //RX_FDEQ_GAIN_1 -41 0x5050 //RX_FDEQ_GAIN_2 -42 0x5058 //RX_FDEQ_GAIN_3 -43 0x5C70 //RX_FDEQ_GAIN_4 -44 0x4848 //RX_FDEQ_GAIN_5 -45 0x484C //RX_FDEQ_GAIN_6 -46 0x4848 //RX_FDEQ_GAIN_7 -47 0x485A //RX_FDEQ_GAIN_8 -48 0x5A58 //RX_FDEQ_GAIN_9 +39 0x5252 //RX_FDEQ_GAIN_0 +40 0x4E4F //RX_FDEQ_GAIN_1 +41 0x4743 //RX_FDEQ_GAIN_2 +42 0x454C //RX_FDEQ_GAIN_3 +43 0x4C49 //RX_FDEQ_GAIN_4 +44 0x584A //RX_FDEQ_GAIN_5 +45 0x4642 //RX_FDEQ_GAIN_6 +46 0x4043 //RX_FDEQ_GAIN_7 +47 0x454A //RX_FDEQ_GAIN_8 +48 0x4C53 //RX_FDEQ_GAIN_9 49 0x4848 //RX_FDEQ_GAIN_10 50 0x4848 //RX_FDEQ_GAIN_11 51 0x4848 //RX_FDEQ_GAIN_12 @@ -6473,8 +9290,8 @@ 64 0x0203 //RX_FDEQ_BIN_1 65 0x0303 //RX_FDEQ_BIN_2 66 0x0304 //RX_FDEQ_BIN_3 -67 0x0604 //RX_FDEQ_BIN_4 -68 0x0406 //RX_FDEQ_BIN_5 +67 0x0503 //RX_FDEQ_BIN_4 +68 0x0107 //RX_FDEQ_BIN_5 69 0x0708 //RX_FDEQ_BIN_6 70 0x090A //RX_FDEQ_BIN_7 71 0x0B0C //RX_FDEQ_BIN_8 @@ -6542,18 +9359,18 @@ 121 0x199A //RX_TDDRC_HMNC_GAIN 122 0x0001 //RX_TDDRC_SMT_FLAG 123 0x0CCD //RX_TDDRC_SMT_W -124 0x0780 //RX_TDDRC_DRC_GAIN +124 0x02D2 //RX_TDDRC_DRC_GAIN 38 0x0014 //RX_FDEQ_SUBNUM -39 0x8080 //RX_FDEQ_GAIN_0 -40 0x8054 //RX_FDEQ_GAIN_1 -41 0x5050 //RX_FDEQ_GAIN_2 -42 0x5058 //RX_FDEQ_GAIN_3 -43 0x5C70 //RX_FDEQ_GAIN_4 -44 0x4848 //RX_FDEQ_GAIN_5 -45 0x484C //RX_FDEQ_GAIN_6 -46 0x4848 //RX_FDEQ_GAIN_7 -47 0x485A //RX_FDEQ_GAIN_8 -48 0x5A58 //RX_FDEQ_GAIN_9 +39 0x5252 //RX_FDEQ_GAIN_0 +40 0x4E4F //RX_FDEQ_GAIN_1 +41 0x4743 //RX_FDEQ_GAIN_2 +42 0x454C //RX_FDEQ_GAIN_3 +43 0x4C49 //RX_FDEQ_GAIN_4 +44 0x584A //RX_FDEQ_GAIN_5 +45 0x4642 //RX_FDEQ_GAIN_6 +46 0x4043 //RX_FDEQ_GAIN_7 +47 0x454A //RX_FDEQ_GAIN_8 +48 0x4C53 //RX_FDEQ_GAIN_9 49 0x4848 //RX_FDEQ_GAIN_10 50 0x4848 //RX_FDEQ_GAIN_11 51 0x4848 //RX_FDEQ_GAIN_12 @@ -6572,8 +9389,8 @@ 64 0x0203 //RX_FDEQ_BIN_1 65 0x0303 //RX_FDEQ_BIN_2 66 0x0304 //RX_FDEQ_BIN_3 -67 0x0604 //RX_FDEQ_BIN_4 -68 0x0406 //RX_FDEQ_BIN_5 +67 0x0503 //RX_FDEQ_BIN_4 +68 0x0107 //RX_FDEQ_BIN_5 69 0x0708 //RX_FDEQ_BIN_6 70 0x090A //RX_FDEQ_BIN_7 71 0x0B0C //RX_FDEQ_BIN_8 @@ -6641,18 +9458,18 @@ 121 0x199A //RX_TDDRC_HMNC_GAIN 122 0x0001 //RX_TDDRC_SMT_FLAG 123 0x0CCD //RX_TDDRC_SMT_W -124 0x0780 //RX_TDDRC_DRC_GAIN +124 0x02D2 //RX_TDDRC_DRC_GAIN 38 0x0014 //RX_FDEQ_SUBNUM -39 0x8080 //RX_FDEQ_GAIN_0 -40 0x8054 //RX_FDEQ_GAIN_1 -41 0x5050 //RX_FDEQ_GAIN_2 -42 0x5058 //RX_FDEQ_GAIN_3 -43 0x5C70 //RX_FDEQ_GAIN_4 -44 0x4848 //RX_FDEQ_GAIN_5 -45 0x484C //RX_FDEQ_GAIN_6 -46 0x4848 //RX_FDEQ_GAIN_7 -47 0x485A //RX_FDEQ_GAIN_8 -48 0x5A58 //RX_FDEQ_GAIN_9 +39 0x5252 //RX_FDEQ_GAIN_0 +40 0x4E4F //RX_FDEQ_GAIN_1 +41 0x4743 //RX_FDEQ_GAIN_2 +42 0x454C //RX_FDEQ_GAIN_3 +43 0x4C49 //RX_FDEQ_GAIN_4 +44 0x584A //RX_FDEQ_GAIN_5 +45 0x4642 //RX_FDEQ_GAIN_6 +46 0x4043 //RX_FDEQ_GAIN_7 +47 0x454A //RX_FDEQ_GAIN_8 +48 0x4C53 //RX_FDEQ_GAIN_9 49 0x4848 //RX_FDEQ_GAIN_10 50 0x4848 //RX_FDEQ_GAIN_11 51 0x4848 //RX_FDEQ_GAIN_12 @@ -6671,8 +9488,8 @@ 64 0x0203 //RX_FDEQ_BIN_1 65 0x0303 //RX_FDEQ_BIN_2 66 0x0304 //RX_FDEQ_BIN_3 -67 0x0604 //RX_FDEQ_BIN_4 -68 0x0406 //RX_FDEQ_BIN_5 +67 0x0503 //RX_FDEQ_BIN_4 +68 0x0107 //RX_FDEQ_BIN_5 69 0x0708 //RX_FDEQ_BIN_6 70 0x090A //RX_FDEQ_BIN_7 71 0x0B0C //RX_FDEQ_BIN_8 @@ -6740,18 +9557,18 @@ 121 0x199A //RX_TDDRC_HMNC_GAIN 122 0x0001 //RX_TDDRC_SMT_FLAG 123 0x0CCD //RX_TDDRC_SMT_W -124 0x0780 //RX_TDDRC_DRC_GAIN +124 0x02D2 //RX_TDDRC_DRC_GAIN 38 0x0014 //RX_FDEQ_SUBNUM -39 0x8080 //RX_FDEQ_GAIN_0 -40 0x8054 //RX_FDEQ_GAIN_1 -41 0x5050 //RX_FDEQ_GAIN_2 -42 0x5058 //RX_FDEQ_GAIN_3 -43 0x5C70 //RX_FDEQ_GAIN_4 -44 0x4848 //RX_FDEQ_GAIN_5 -45 0x484C //RX_FDEQ_GAIN_6 -46 0x4848 //RX_FDEQ_GAIN_7 -47 0x485A //RX_FDEQ_GAIN_8 -48 0x5A58 //RX_FDEQ_GAIN_9 +39 0x5252 //RX_FDEQ_GAIN_0 +40 0x4E4F //RX_FDEQ_GAIN_1 +41 0x4743 //RX_FDEQ_GAIN_2 +42 0x454C //RX_FDEQ_GAIN_3 +43 0x4C49 //RX_FDEQ_GAIN_4 +44 0x584A //RX_FDEQ_GAIN_5 +45 0x4642 //RX_FDEQ_GAIN_6 +46 0x4043 //RX_FDEQ_GAIN_7 +47 0x454A //RX_FDEQ_GAIN_8 +48 0x4C53 //RX_FDEQ_GAIN_9 49 0x4848 //RX_FDEQ_GAIN_10 50 0x4848 //RX_FDEQ_GAIN_11 51 0x4848 //RX_FDEQ_GAIN_12 @@ -6770,8 +9587,8 @@ 64 0x0203 //RX_FDEQ_BIN_1 65 0x0303 //RX_FDEQ_BIN_2 66 0x0304 //RX_FDEQ_BIN_3 -67 0x0604 //RX_FDEQ_BIN_4 -68 0x0406 //RX_FDEQ_BIN_5 +67 0x0503 //RX_FDEQ_BIN_4 +68 0x0107 //RX_FDEQ_BIN_5 69 0x0708 //RX_FDEQ_BIN_6 70 0x090A //RX_FDEQ_BIN_7 71 0x0B0C //RX_FDEQ_BIN_8 @@ -6839,18 +9656,18 @@ 121 0x199A //RX_TDDRC_HMNC_GAIN 122 0x0001 //RX_TDDRC_SMT_FLAG 123 0x0CCD //RX_TDDRC_SMT_W -124 0x0780 //RX_TDDRC_DRC_GAIN +124 0x02D2 //RX_TDDRC_DRC_GAIN 38 0x0014 //RX_FDEQ_SUBNUM -39 0x8080 //RX_FDEQ_GAIN_0 -40 0x8054 //RX_FDEQ_GAIN_1 -41 0x5050 //RX_FDEQ_GAIN_2 -42 0x5058 //RX_FDEQ_GAIN_3 -43 0x5C70 //RX_FDEQ_GAIN_4 -44 0x4848 //RX_FDEQ_GAIN_5 -45 0x484C //RX_FDEQ_GAIN_6 -46 0x4848 //RX_FDEQ_GAIN_7 -47 0x485A //RX_FDEQ_GAIN_8 -48 0x5A58 //RX_FDEQ_GAIN_9 +39 0x5252 //RX_FDEQ_GAIN_0 +40 0x4E4F //RX_FDEQ_GAIN_1 +41 0x4743 //RX_FDEQ_GAIN_2 +42 0x454C //RX_FDEQ_GAIN_3 +43 0x4C49 //RX_FDEQ_GAIN_4 +44 0x584A //RX_FDEQ_GAIN_5 +45 0x4642 //RX_FDEQ_GAIN_6 +46 0x4043 //RX_FDEQ_GAIN_7 +47 0x454A //RX_FDEQ_GAIN_8 +48 0x4C53 //RX_FDEQ_GAIN_9 49 0x4848 //RX_FDEQ_GAIN_10 50 0x4848 //RX_FDEQ_GAIN_11 51 0x4848 //RX_FDEQ_GAIN_12 @@ -6869,8 +9686,8 @@ 64 0x0203 //RX_FDEQ_BIN_1 65 0x0303 //RX_FDEQ_BIN_2 66 0x0304 //RX_FDEQ_BIN_3 -67 0x0604 //RX_FDEQ_BIN_4 -68 0x0406 //RX_FDEQ_BIN_5 +67 0x0503 //RX_FDEQ_BIN_4 +68 0x0107 //RX_FDEQ_BIN_5 69 0x0708 //RX_FDEQ_BIN_6 70 0x090A //RX_FDEQ_BIN_7 71 0x0B0C //RX_FDEQ_BIN_8 @@ -6938,18 +9755,18 @@ 121 0x199A //RX_TDDRC_HMNC_GAIN 122 0x0001 //RX_TDDRC_SMT_FLAG 123 0x0CCD //RX_TDDRC_SMT_W -124 0x0780 //RX_TDDRC_DRC_GAIN +124 0x02D2 //RX_TDDRC_DRC_GAIN 38 0x0014 //RX_FDEQ_SUBNUM -39 0x8080 //RX_FDEQ_GAIN_0 -40 0x8054 //RX_FDEQ_GAIN_1 -41 0x5050 //RX_FDEQ_GAIN_2 -42 0x5058 //RX_FDEQ_GAIN_3 -43 0x5C70 //RX_FDEQ_GAIN_4 -44 0x4848 //RX_FDEQ_GAIN_5 -45 0x484C //RX_FDEQ_GAIN_6 -46 0x4848 //RX_FDEQ_GAIN_7 -47 0x485A //RX_FDEQ_GAIN_8 -48 0x5A58 //RX_FDEQ_GAIN_9 +39 0x5252 //RX_FDEQ_GAIN_0 +40 0x4E4F //RX_FDEQ_GAIN_1 +41 0x4743 //RX_FDEQ_GAIN_2 +42 0x454C //RX_FDEQ_GAIN_3 +43 0x4C49 //RX_FDEQ_GAIN_4 +44 0x584A //RX_FDEQ_GAIN_5 +45 0x4642 //RX_FDEQ_GAIN_6 +46 0x4043 //RX_FDEQ_GAIN_7 +47 0x454A //RX_FDEQ_GAIN_8 +48 0x4C53 //RX_FDEQ_GAIN_9 49 0x4848 //RX_FDEQ_GAIN_10 50 0x4848 //RX_FDEQ_GAIN_11 51 0x4848 //RX_FDEQ_GAIN_12 @@ -6968,8 +9785,8 @@ 64 0x0203 //RX_FDEQ_BIN_1 65 0x0303 //RX_FDEQ_BIN_2 66 0x0304 //RX_FDEQ_BIN_3 -67 0x0604 //RX_FDEQ_BIN_4 -68 0x0406 //RX_FDEQ_BIN_5 +67 0x0503 //RX_FDEQ_BIN_4 +68 0x0107 //RX_FDEQ_BIN_5 69 0x0708 //RX_FDEQ_BIN_6 70 0x090A //RX_FDEQ_BIN_7 71 0x0B0C //RX_FDEQ_BIN_8 @@ -7014,10 +9831,862 @@ 110 0x0000 //RX_FDDRC_RESRV_0 129 0x0100 //RX_SPK_VOL 130 0x0000 //RX_VOL_RESRV_0 +#RX 2 +157 0x027C //RX_RECVFUNC_MODE_0 +158 0x0000 //RX_RECVFUNC_MODE_1 +159 0x0000 //RX_SAMPLINGFREQ_SIG +160 0x0000 //RX_SAMPLINGFREQ_PROC +161 0x000A //RX_FRAME_SZ +162 0x0000 //RX_DELAY_OPT +163 0x1000 //RX_TDDRC_ALPHA_UP_1 +164 0x1000 //RX_TDDRC_ALPHA_UP_2 +165 0x1000 //RX_TDDRC_ALPHA_UP_3 +166 0x1000 //RX_TDDRC_ALPHA_UP_4 +167 0x0800 //RX_PGA +168 0x7652 //RX_A_HP +169 0x4000 //RX_B_PE +170 0x7800 //RX_THR_PITCH_DET_0 +171 0x7000 //RX_THR_PITCH_DET_1 +172 0x6000 //RX_THR_PITCH_DET_2 +173 0x0008 //RX_PITCH_BFR_LEN +174 0x0003 //RX_SBD_PITCH_DET +175 0x0100 //RX_PP_RESRV_0 +176 0x0020 //RX_PP_RESRV_1 +177 0x0400 //RX_N_SN_EST +178 0x000C //RX_N2_SN_EST +179 0x0010 //RX_NS_LVL_CTRL +180 0xF800 //RX_THR_SN_EST +181 0x7E00 //RX_LAMBDA_PFILT +182 0x000A //RX_FENS_RESRV_0 +183 0x0190 //RX_FENS_RESRV_1 +184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +185 0x4000 //RX_TDDRC_ALPHA_DWN_2 +186 0x4000 //RX_TDDRC_ALPHA_DWN_3 +187 0x0002 //RX_EXTRA_NS_L +188 0x0800 //RX_EXTRA_NS_A +189 0x4000 //RX_TDDRC_ALPHA_DWN_4 +190 0x7214 //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +192 0x199A //RX_A_POST_FLT +193 0x0000 //RX_LMT_THRD +194 0x4000 //RX_LMT_ALPHA +195 0x0014 //RX_FDEQ_SUBNUM +196 0x8080 //RX_FDEQ_GAIN_0 +197 0x8054 //RX_FDEQ_GAIN_1 +198 0x5050 //RX_FDEQ_GAIN_2 +199 0x5058 //RX_FDEQ_GAIN_3 +200 0x5C70 //RX_FDEQ_GAIN_4 +201 0x4848 //RX_FDEQ_GAIN_5 +202 0x484C //RX_FDEQ_GAIN_6 +203 0x4848 //RX_FDEQ_GAIN_7 +204 0x485A //RX_FDEQ_GAIN_8 +205 0x5A58 //RX_FDEQ_GAIN_9 +206 0x4848 //RX_FDEQ_GAIN_10 +207 0x4848 //RX_FDEQ_GAIN_11 +208 0x4848 //RX_FDEQ_GAIN_12 +209 0x4848 //RX_FDEQ_GAIN_13 +210 0x4848 //RX_FDEQ_GAIN_14 +211 0x4848 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0202 //RX_FDEQ_BIN_0 +221 0x0203 //RX_FDEQ_BIN_1 +222 0x0303 //RX_FDEQ_BIN_2 +223 0x0304 //RX_FDEQ_BIN_3 +224 0x0604 //RX_FDEQ_BIN_4 +225 0x0406 //RX_FDEQ_BIN_5 +226 0x0708 //RX_FDEQ_BIN_6 +227 0x090A //RX_FDEQ_BIN_7 +228 0x0B0C //RX_FDEQ_BIN_8 +229 0x0D08 //RX_FDEQ_BIN_9 +230 0x0000 //RX_FDEQ_BIN_10 +231 0x0000 //RX_FDEQ_BIN_11 +232 0x0000 //RX_FDEQ_BIN_12 +233 0x0000 //RX_FDEQ_BIN_13 +234 0x0000 //RX_FDEQ_BIN_14 +235 0x0000 //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x4000 //RX_FDEQ_RESRV_0 +245 0x0320 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0035 //RX_FDDRC_BAND_MARGIN_1 +248 0x0060 //RX_FDDRC_BAND_MARGIN_2 +249 0x0080 //RX_FDDRC_BAND_MARGIN_3 +250 0x0004 //RX_FDDRC_BLOCK_EXP +251 0x0600 //RX_FDDRC_THRD_2_0 +252 0x0600 //RX_FDDRC_THRD_2_1 +253 0x0600 //RX_FDDRC_THRD_2_2 +254 0x0600 //RX_FDDRC_THRD_2_3 +255 0x0800 //RX_FDDRC_THRD_3_0 +256 0x0800 //RX_FDDRC_THRD_3_1 +257 0x0800 //RX_FDDRC_THRD_3_2 +258 0x0800 //RX_FDDRC_THRD_3_3 +259 0x0000 //RX_FDDRC_SLANT_0_0 +260 0x0000 //RX_FDDRC_SLANT_0_1 +261 0x0000 //RX_FDDRC_SLANT_0_2 +262 0x0000 //RX_FDDRC_SLANT_0_3 +263 0x7FFF //RX_FDDRC_SLANT_1_0 +264 0x7FFF //RX_FDDRC_SLANT_1_1 +265 0x7FFF //RX_FDDRC_SLANT_1_2 +266 0x7FFF //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +268 0x0005 //RX_FILTINDX +269 0x0002 //RX_TDDRC_THRD_0 +270 0x0004 //RX_TDDRC_THRD_1 +271 0x1A00 //RX_TDDRC_THRD_2 +272 0x1A00 //RX_TDDRC_THRD_3 +273 0x7FFF //RX_TDDRC_SLANT_0 +274 0x7FFF //RX_TDDRC_SLANT_1 +275 0x1000 //RX_TDDRC_ALPHA_UP_0 +276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x199A //RX_TDDRC_HMNC_GAIN +279 0x0001 //RX_TDDRC_SMT_FLAG +280 0x0CCD //RX_TDDRC_SMT_W +281 0x0780 //RX_TDDRC_DRC_GAIN +282 0x7C00 //RX_LAMBDA_PKA_FP +283 0x2000 //RX_TPKA_FP +284 0x2000 //RX_MIN_G_FP +285 0x0080 //RX_MAX_G_FP +286 0x0100 //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 +288 0x0000 //RX_MAXLEVEL_CNG +289 0x3000 //RX_BWE_UV_TH +290 0x3000 //RX_BWE_UV_TH2 +291 0x1800 //RX_BWE_UV_TH3 +292 0x1000 //RX_BWE_V_TH +293 0x04CD //RX_BWE_GAIN1_V_TH1 +294 0x0F33 //RX_BWE_GAIN1_V_TH2 +295 0x7333 //RX_BWE_UV_EQ +296 0x199A //RX_BWE_V_EQ +297 0x7333 //RX_BWE_TONE_TH +298 0x0004 //RX_BWE_UV_HOLD_T +299 0x6CCD //RX_BWE_GAIN2_ALPHA +300 0x799A //RX_BWE_GAIN3_ALPHA +301 0x001E //RX_BWE_CUTOFF +302 0x3000 //RX_BWE_GAINFILL +303 0x3200 //RX_BWE_MAXTH_TONE +304 0x2000 //RX_BWE_EQ_0 +305 0x2000 //RX_BWE_EQ_1 +306 0x2000 //RX_BWE_EQ_2 +307 0x2000 //RX_BWE_EQ_3 +308 0x2000 //RX_BWE_EQ_4 +309 0x2000 //RX_BWE_EQ_5 +310 0x2000 //RX_BWE_EQ_6 +311 0x0000 //RX_BWE_RESRV_0 +312 0x0000 //RX_BWE_RESRV_1 +313 0x0000 //RX_BWE_RESRV_2 +#VOL 0 +163 0x1000 //RX_TDDRC_ALPHA_UP_1 +164 0x1000 //RX_TDDRC_ALPHA_UP_2 +165 0x1000 //RX_TDDRC_ALPHA_UP_3 +166 0x1000 //RX_TDDRC_ALPHA_UP_4 +184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +185 0x4000 //RX_TDDRC_ALPHA_DWN_2 +186 0x4000 //RX_TDDRC_ALPHA_DWN_3 +189 0x4000 //RX_TDDRC_ALPHA_DWN_4 +190 0x7214 //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +269 0x0002 //RX_TDDRC_THRD_0 +270 0x0004 //RX_TDDRC_THRD_1 +271 0x1A00 //RX_TDDRC_THRD_2 +272 0x1A00 //RX_TDDRC_THRD_3 +273 0x7FFF //RX_TDDRC_SLANT_0 +274 0x7FFF //RX_TDDRC_SLANT_1 +275 0x1000 //RX_TDDRC_ALPHA_UP_0 +276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x199A //RX_TDDRC_HMNC_GAIN +279 0x0001 //RX_TDDRC_SMT_FLAG +280 0x0CCD //RX_TDDRC_SMT_W +281 0x0780 //RX_TDDRC_DRC_GAIN +195 0x0014 //RX_FDEQ_SUBNUM +196 0x8080 //RX_FDEQ_GAIN_0 +197 0x8054 //RX_FDEQ_GAIN_1 +198 0x5050 //RX_FDEQ_GAIN_2 +199 0x5058 //RX_FDEQ_GAIN_3 +200 0x5C70 //RX_FDEQ_GAIN_4 +201 0x4848 //RX_FDEQ_GAIN_5 +202 0x484C //RX_FDEQ_GAIN_6 +203 0x4848 //RX_FDEQ_GAIN_7 +204 0x485A //RX_FDEQ_GAIN_8 +205 0x5A58 //RX_FDEQ_GAIN_9 +206 0x4848 //RX_FDEQ_GAIN_10 +207 0x4848 //RX_FDEQ_GAIN_11 +208 0x4848 //RX_FDEQ_GAIN_12 +209 0x4848 //RX_FDEQ_GAIN_13 +210 0x4848 //RX_FDEQ_GAIN_14 +211 0x4848 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0202 //RX_FDEQ_BIN_0 +221 0x0203 //RX_FDEQ_BIN_1 +222 0x0303 //RX_FDEQ_BIN_2 +223 0x0304 //RX_FDEQ_BIN_3 +224 0x0604 //RX_FDEQ_BIN_4 +225 0x0406 //RX_FDEQ_BIN_5 +226 0x0708 //RX_FDEQ_BIN_6 +227 0x090A //RX_FDEQ_BIN_7 +228 0x0B0C //RX_FDEQ_BIN_8 +229 0x0D08 //RX_FDEQ_BIN_9 +230 0x0000 //RX_FDEQ_BIN_10 +231 0x0000 //RX_FDEQ_BIN_11 +232 0x0000 //RX_FDEQ_BIN_12 +233 0x0000 //RX_FDEQ_BIN_13 +234 0x0000 //RX_FDEQ_BIN_14 +235 0x0000 //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x4000 //RX_FDEQ_RESRV_0 +245 0x0320 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0035 //RX_FDDRC_BAND_MARGIN_1 +248 0x0060 //RX_FDDRC_BAND_MARGIN_2 +249 0x0080 //RX_FDDRC_BAND_MARGIN_3 +250 0x0004 //RX_FDDRC_BLOCK_EXP +251 0x0600 //RX_FDDRC_THRD_2_0 +252 0x0600 //RX_FDDRC_THRD_2_1 +253 0x0600 //RX_FDDRC_THRD_2_2 +254 0x0600 //RX_FDDRC_THRD_2_3 +255 0x0800 //RX_FDDRC_THRD_3_0 +256 0x0800 //RX_FDDRC_THRD_3_1 +257 0x0800 //RX_FDDRC_THRD_3_2 +258 0x0800 //RX_FDDRC_THRD_3_3 +259 0x0000 //RX_FDDRC_SLANT_0_0 +260 0x0000 //RX_FDDRC_SLANT_0_1 +261 0x0000 //RX_FDDRC_SLANT_0_2 +262 0x0000 //RX_FDDRC_SLANT_0_3 +263 0x7FFF //RX_FDDRC_SLANT_1_0 +264 0x7FFF //RX_FDDRC_SLANT_1_1 +265 0x7FFF //RX_FDDRC_SLANT_1_2 +266 0x7FFF //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +286 0x0015 //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 +#VOL 1 +163 0x1000 //RX_TDDRC_ALPHA_UP_1 +164 0x1000 //RX_TDDRC_ALPHA_UP_2 +165 0x1000 //RX_TDDRC_ALPHA_UP_3 +166 0x1000 //RX_TDDRC_ALPHA_UP_4 +184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +185 0x4000 //RX_TDDRC_ALPHA_DWN_2 +186 0x4000 //RX_TDDRC_ALPHA_DWN_3 +189 0x4000 //RX_TDDRC_ALPHA_DWN_4 +190 0x7214 //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +269 0x0002 //RX_TDDRC_THRD_0 +270 0x0004 //RX_TDDRC_THRD_1 +271 0x1A00 //RX_TDDRC_THRD_2 +272 0x1A00 //RX_TDDRC_THRD_3 +273 0x7FFF //RX_TDDRC_SLANT_0 +274 0x7FFF //RX_TDDRC_SLANT_1 +275 0x1000 //RX_TDDRC_ALPHA_UP_0 +276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x199A //RX_TDDRC_HMNC_GAIN +279 0x0001 //RX_TDDRC_SMT_FLAG +280 0x0CCD //RX_TDDRC_SMT_W +281 0x0780 //RX_TDDRC_DRC_GAIN +195 0x0014 //RX_FDEQ_SUBNUM +196 0x8080 //RX_FDEQ_GAIN_0 +197 0x8054 //RX_FDEQ_GAIN_1 +198 0x5050 //RX_FDEQ_GAIN_2 +199 0x5058 //RX_FDEQ_GAIN_3 +200 0x5C70 //RX_FDEQ_GAIN_4 +201 0x4848 //RX_FDEQ_GAIN_5 +202 0x484C //RX_FDEQ_GAIN_6 +203 0x4848 //RX_FDEQ_GAIN_7 +204 0x485A //RX_FDEQ_GAIN_8 +205 0x5A58 //RX_FDEQ_GAIN_9 +206 0x4848 //RX_FDEQ_GAIN_10 +207 0x4848 //RX_FDEQ_GAIN_11 +208 0x4848 //RX_FDEQ_GAIN_12 +209 0x4848 //RX_FDEQ_GAIN_13 +210 0x4848 //RX_FDEQ_GAIN_14 +211 0x4848 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0202 //RX_FDEQ_BIN_0 +221 0x0203 //RX_FDEQ_BIN_1 +222 0x0303 //RX_FDEQ_BIN_2 +223 0x0304 //RX_FDEQ_BIN_3 +224 0x0604 //RX_FDEQ_BIN_4 +225 0x0406 //RX_FDEQ_BIN_5 +226 0x0708 //RX_FDEQ_BIN_6 +227 0x090A //RX_FDEQ_BIN_7 +228 0x0B0C //RX_FDEQ_BIN_8 +229 0x0D08 //RX_FDEQ_BIN_9 +230 0x0000 //RX_FDEQ_BIN_10 +231 0x0000 //RX_FDEQ_BIN_11 +232 0x0000 //RX_FDEQ_BIN_12 +233 0x0000 //RX_FDEQ_BIN_13 +234 0x0000 //RX_FDEQ_BIN_14 +235 0x0000 //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x4000 //RX_FDEQ_RESRV_0 +245 0x0320 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0035 //RX_FDDRC_BAND_MARGIN_1 +248 0x0060 //RX_FDDRC_BAND_MARGIN_2 +249 0x0080 //RX_FDDRC_BAND_MARGIN_3 +250 0x0004 //RX_FDDRC_BLOCK_EXP +251 0x0600 //RX_FDDRC_THRD_2_0 +252 0x0600 //RX_FDDRC_THRD_2_1 +253 0x0600 //RX_FDDRC_THRD_2_2 +254 0x0600 //RX_FDDRC_THRD_2_3 +255 0x0800 //RX_FDDRC_THRD_3_0 +256 0x0800 //RX_FDDRC_THRD_3_1 +257 0x0800 //RX_FDDRC_THRD_3_2 +258 0x0800 //RX_FDDRC_THRD_3_3 +259 0x0000 //RX_FDDRC_SLANT_0_0 +260 0x0000 //RX_FDDRC_SLANT_0_1 +261 0x0000 //RX_FDDRC_SLANT_0_2 +262 0x0000 //RX_FDDRC_SLANT_0_3 +263 0x7FFF //RX_FDDRC_SLANT_1_0 +264 0x7FFF //RX_FDDRC_SLANT_1_1 +265 0x7FFF //RX_FDDRC_SLANT_1_2 +266 0x7FFF //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +286 0x001E //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 +#VOL 2 +163 0x1000 //RX_TDDRC_ALPHA_UP_1 +164 0x1000 //RX_TDDRC_ALPHA_UP_2 +165 0x1000 //RX_TDDRC_ALPHA_UP_3 +166 0x1000 //RX_TDDRC_ALPHA_UP_4 +184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +185 0x4000 //RX_TDDRC_ALPHA_DWN_2 +186 0x4000 //RX_TDDRC_ALPHA_DWN_3 +189 0x4000 //RX_TDDRC_ALPHA_DWN_4 +190 0x7214 //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +269 0x0002 //RX_TDDRC_THRD_0 +270 0x0004 //RX_TDDRC_THRD_1 +271 0x1A00 //RX_TDDRC_THRD_2 +272 0x1A00 //RX_TDDRC_THRD_3 +273 0x7FFF //RX_TDDRC_SLANT_0 +274 0x7FFF //RX_TDDRC_SLANT_1 +275 0x1000 //RX_TDDRC_ALPHA_UP_0 +276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x199A //RX_TDDRC_HMNC_GAIN +279 0x0001 //RX_TDDRC_SMT_FLAG +280 0x0CCD //RX_TDDRC_SMT_W +281 0x0780 //RX_TDDRC_DRC_GAIN +195 0x0014 //RX_FDEQ_SUBNUM +196 0x8080 //RX_FDEQ_GAIN_0 +197 0x8054 //RX_FDEQ_GAIN_1 +198 0x5050 //RX_FDEQ_GAIN_2 +199 0x5058 //RX_FDEQ_GAIN_3 +200 0x5C70 //RX_FDEQ_GAIN_4 +201 0x4848 //RX_FDEQ_GAIN_5 +202 0x484C //RX_FDEQ_GAIN_6 +203 0x4848 //RX_FDEQ_GAIN_7 +204 0x485A //RX_FDEQ_GAIN_8 +205 0x5A58 //RX_FDEQ_GAIN_9 +206 0x4848 //RX_FDEQ_GAIN_10 +207 0x4848 //RX_FDEQ_GAIN_11 +208 0x4848 //RX_FDEQ_GAIN_12 +209 0x4848 //RX_FDEQ_GAIN_13 +210 0x4848 //RX_FDEQ_GAIN_14 +211 0x4848 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0202 //RX_FDEQ_BIN_0 +221 0x0203 //RX_FDEQ_BIN_1 +222 0x0303 //RX_FDEQ_BIN_2 +223 0x0304 //RX_FDEQ_BIN_3 +224 0x0604 //RX_FDEQ_BIN_4 +225 0x0406 //RX_FDEQ_BIN_5 +226 0x0708 //RX_FDEQ_BIN_6 +227 0x090A //RX_FDEQ_BIN_7 +228 0x0B0C //RX_FDEQ_BIN_8 +229 0x0D08 //RX_FDEQ_BIN_9 +230 0x0000 //RX_FDEQ_BIN_10 +231 0x0000 //RX_FDEQ_BIN_11 +232 0x0000 //RX_FDEQ_BIN_12 +233 0x0000 //RX_FDEQ_BIN_13 +234 0x0000 //RX_FDEQ_BIN_14 +235 0x0000 //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x4000 //RX_FDEQ_RESRV_0 +245 0x0320 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0035 //RX_FDDRC_BAND_MARGIN_1 +248 0x0060 //RX_FDDRC_BAND_MARGIN_2 +249 0x0080 //RX_FDDRC_BAND_MARGIN_3 +250 0x0004 //RX_FDDRC_BLOCK_EXP +251 0x0600 //RX_FDDRC_THRD_2_0 +252 0x0600 //RX_FDDRC_THRD_2_1 +253 0x0600 //RX_FDDRC_THRD_2_2 +254 0x0600 //RX_FDDRC_THRD_2_3 +255 0x0800 //RX_FDDRC_THRD_3_0 +256 0x0800 //RX_FDDRC_THRD_3_1 +257 0x0800 //RX_FDDRC_THRD_3_2 +258 0x0800 //RX_FDDRC_THRD_3_3 +259 0x0000 //RX_FDDRC_SLANT_0_0 +260 0x0000 //RX_FDDRC_SLANT_0_1 +261 0x0000 //RX_FDDRC_SLANT_0_2 +262 0x0000 //RX_FDDRC_SLANT_0_3 +263 0x7FFF //RX_FDDRC_SLANT_1_0 +264 0x7FFF //RX_FDDRC_SLANT_1_1 +265 0x7FFF //RX_FDDRC_SLANT_1_2 +266 0x7FFF //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +286 0x002A //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 +#VOL 3 +163 0x1000 //RX_TDDRC_ALPHA_UP_1 +164 0x1000 //RX_TDDRC_ALPHA_UP_2 +165 0x1000 //RX_TDDRC_ALPHA_UP_3 +166 0x1000 //RX_TDDRC_ALPHA_UP_4 +184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +185 0x4000 //RX_TDDRC_ALPHA_DWN_2 +186 0x4000 //RX_TDDRC_ALPHA_DWN_3 +189 0x4000 //RX_TDDRC_ALPHA_DWN_4 +190 0x7214 //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +269 0x0002 //RX_TDDRC_THRD_0 +270 0x0004 //RX_TDDRC_THRD_1 +271 0x1A00 //RX_TDDRC_THRD_2 +272 0x1A00 //RX_TDDRC_THRD_3 +273 0x7FFF //RX_TDDRC_SLANT_0 +274 0x7FFF //RX_TDDRC_SLANT_1 +275 0x1000 //RX_TDDRC_ALPHA_UP_0 +276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x199A //RX_TDDRC_HMNC_GAIN +279 0x0001 //RX_TDDRC_SMT_FLAG +280 0x0CCD //RX_TDDRC_SMT_W +281 0x0780 //RX_TDDRC_DRC_GAIN +195 0x0014 //RX_FDEQ_SUBNUM +196 0x8080 //RX_FDEQ_GAIN_0 +197 0x8054 //RX_FDEQ_GAIN_1 +198 0x5050 //RX_FDEQ_GAIN_2 +199 0x5058 //RX_FDEQ_GAIN_3 +200 0x5C70 //RX_FDEQ_GAIN_4 +201 0x4848 //RX_FDEQ_GAIN_5 +202 0x484C //RX_FDEQ_GAIN_6 +203 0x4848 //RX_FDEQ_GAIN_7 +204 0x485A //RX_FDEQ_GAIN_8 +205 0x5A58 //RX_FDEQ_GAIN_9 +206 0x4848 //RX_FDEQ_GAIN_10 +207 0x4848 //RX_FDEQ_GAIN_11 +208 0x4848 //RX_FDEQ_GAIN_12 +209 0x4848 //RX_FDEQ_GAIN_13 +210 0x4848 //RX_FDEQ_GAIN_14 +211 0x4848 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0202 //RX_FDEQ_BIN_0 +221 0x0203 //RX_FDEQ_BIN_1 +222 0x0303 //RX_FDEQ_BIN_2 +223 0x0304 //RX_FDEQ_BIN_3 +224 0x0604 //RX_FDEQ_BIN_4 +225 0x0406 //RX_FDEQ_BIN_5 +226 0x0708 //RX_FDEQ_BIN_6 +227 0x090A //RX_FDEQ_BIN_7 +228 0x0B0C //RX_FDEQ_BIN_8 +229 0x0D08 //RX_FDEQ_BIN_9 +230 0x0000 //RX_FDEQ_BIN_10 +231 0x0000 //RX_FDEQ_BIN_11 +232 0x0000 //RX_FDEQ_BIN_12 +233 0x0000 //RX_FDEQ_BIN_13 +234 0x0000 //RX_FDEQ_BIN_14 +235 0x0000 //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x4000 //RX_FDEQ_RESRV_0 +245 0x0320 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0035 //RX_FDDRC_BAND_MARGIN_1 +248 0x0060 //RX_FDDRC_BAND_MARGIN_2 +249 0x0080 //RX_FDDRC_BAND_MARGIN_3 +250 0x0004 //RX_FDDRC_BLOCK_EXP +251 0x0600 //RX_FDDRC_THRD_2_0 +252 0x0600 //RX_FDDRC_THRD_2_1 +253 0x0600 //RX_FDDRC_THRD_2_2 +254 0x0600 //RX_FDDRC_THRD_2_3 +255 0x0800 //RX_FDDRC_THRD_3_0 +256 0x0800 //RX_FDDRC_THRD_3_1 +257 0x0800 //RX_FDDRC_THRD_3_2 +258 0x0800 //RX_FDDRC_THRD_3_3 +259 0x0000 //RX_FDDRC_SLANT_0_0 +260 0x0000 //RX_FDDRC_SLANT_0_1 +261 0x0000 //RX_FDDRC_SLANT_0_2 +262 0x0000 //RX_FDDRC_SLANT_0_3 +263 0x7FFF //RX_FDDRC_SLANT_1_0 +264 0x7FFF //RX_FDDRC_SLANT_1_1 +265 0x7FFF //RX_FDDRC_SLANT_1_2 +266 0x7FFF //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +286 0x003C //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 +#VOL 4 +163 0x1000 //RX_TDDRC_ALPHA_UP_1 +164 0x1000 //RX_TDDRC_ALPHA_UP_2 +165 0x1000 //RX_TDDRC_ALPHA_UP_3 +166 0x1000 //RX_TDDRC_ALPHA_UP_4 +184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +185 0x4000 //RX_TDDRC_ALPHA_DWN_2 +186 0x4000 //RX_TDDRC_ALPHA_DWN_3 +189 0x4000 //RX_TDDRC_ALPHA_DWN_4 +190 0x7214 //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +269 0x0002 //RX_TDDRC_THRD_0 +270 0x0004 //RX_TDDRC_THRD_1 +271 0x1A00 //RX_TDDRC_THRD_2 +272 0x1A00 //RX_TDDRC_THRD_3 +273 0x7FFF //RX_TDDRC_SLANT_0 +274 0x7FFF //RX_TDDRC_SLANT_1 +275 0x1000 //RX_TDDRC_ALPHA_UP_0 +276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x199A //RX_TDDRC_HMNC_GAIN +279 0x0001 //RX_TDDRC_SMT_FLAG +280 0x0CCD //RX_TDDRC_SMT_W +281 0x0780 //RX_TDDRC_DRC_GAIN +195 0x0014 //RX_FDEQ_SUBNUM +196 0x8080 //RX_FDEQ_GAIN_0 +197 0x8054 //RX_FDEQ_GAIN_1 +198 0x5050 //RX_FDEQ_GAIN_2 +199 0x5058 //RX_FDEQ_GAIN_3 +200 0x5C70 //RX_FDEQ_GAIN_4 +201 0x4848 //RX_FDEQ_GAIN_5 +202 0x484C //RX_FDEQ_GAIN_6 +203 0x4848 //RX_FDEQ_GAIN_7 +204 0x485A //RX_FDEQ_GAIN_8 +205 0x5A58 //RX_FDEQ_GAIN_9 +206 0x4848 //RX_FDEQ_GAIN_10 +207 0x4848 //RX_FDEQ_GAIN_11 +208 0x4848 //RX_FDEQ_GAIN_12 +209 0x4848 //RX_FDEQ_GAIN_13 +210 0x4848 //RX_FDEQ_GAIN_14 +211 0x4848 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0202 //RX_FDEQ_BIN_0 +221 0x0203 //RX_FDEQ_BIN_1 +222 0x0303 //RX_FDEQ_BIN_2 +223 0x0304 //RX_FDEQ_BIN_3 +224 0x0604 //RX_FDEQ_BIN_4 +225 0x0406 //RX_FDEQ_BIN_5 +226 0x0708 //RX_FDEQ_BIN_6 +227 0x090A //RX_FDEQ_BIN_7 +228 0x0B0C //RX_FDEQ_BIN_8 +229 0x0D08 //RX_FDEQ_BIN_9 +230 0x0000 //RX_FDEQ_BIN_10 +231 0x0000 //RX_FDEQ_BIN_11 +232 0x0000 //RX_FDEQ_BIN_12 +233 0x0000 //RX_FDEQ_BIN_13 +234 0x0000 //RX_FDEQ_BIN_14 +235 0x0000 //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x4000 //RX_FDEQ_RESRV_0 +245 0x0320 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0035 //RX_FDDRC_BAND_MARGIN_1 +248 0x0060 //RX_FDDRC_BAND_MARGIN_2 +249 0x0080 //RX_FDDRC_BAND_MARGIN_3 +250 0x0004 //RX_FDDRC_BLOCK_EXP +251 0x0600 //RX_FDDRC_THRD_2_0 +252 0x0600 //RX_FDDRC_THRD_2_1 +253 0x0600 //RX_FDDRC_THRD_2_2 +254 0x0600 //RX_FDDRC_THRD_2_3 +255 0x0800 //RX_FDDRC_THRD_3_0 +256 0x0800 //RX_FDDRC_THRD_3_1 +257 0x0800 //RX_FDDRC_THRD_3_2 +258 0x0800 //RX_FDDRC_THRD_3_3 +259 0x0000 //RX_FDDRC_SLANT_0_0 +260 0x0000 //RX_FDDRC_SLANT_0_1 +261 0x0000 //RX_FDDRC_SLANT_0_2 +262 0x0000 //RX_FDDRC_SLANT_0_3 +263 0x7FFF //RX_FDDRC_SLANT_1_0 +264 0x7FFF //RX_FDDRC_SLANT_1_1 +265 0x7FFF //RX_FDDRC_SLANT_1_2 +266 0x7FFF //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +286 0x0058 //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 +#VOL 5 +163 0x1000 //RX_TDDRC_ALPHA_UP_1 +164 0x1000 //RX_TDDRC_ALPHA_UP_2 +165 0x1000 //RX_TDDRC_ALPHA_UP_3 +166 0x1000 //RX_TDDRC_ALPHA_UP_4 +184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +185 0x4000 //RX_TDDRC_ALPHA_DWN_2 +186 0x4000 //RX_TDDRC_ALPHA_DWN_3 +189 0x4000 //RX_TDDRC_ALPHA_DWN_4 +190 0x7214 //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +269 0x0002 //RX_TDDRC_THRD_0 +270 0x0004 //RX_TDDRC_THRD_1 +271 0x1A00 //RX_TDDRC_THRD_2 +272 0x1A00 //RX_TDDRC_THRD_3 +273 0x7FFF //RX_TDDRC_SLANT_0 +274 0x7FFF //RX_TDDRC_SLANT_1 +275 0x1000 //RX_TDDRC_ALPHA_UP_0 +276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x199A //RX_TDDRC_HMNC_GAIN +279 0x0001 //RX_TDDRC_SMT_FLAG +280 0x0CCD //RX_TDDRC_SMT_W +281 0x0780 //RX_TDDRC_DRC_GAIN +195 0x0014 //RX_FDEQ_SUBNUM +196 0x8080 //RX_FDEQ_GAIN_0 +197 0x8054 //RX_FDEQ_GAIN_1 +198 0x5050 //RX_FDEQ_GAIN_2 +199 0x5058 //RX_FDEQ_GAIN_3 +200 0x5C70 //RX_FDEQ_GAIN_4 +201 0x4848 //RX_FDEQ_GAIN_5 +202 0x484C //RX_FDEQ_GAIN_6 +203 0x4848 //RX_FDEQ_GAIN_7 +204 0x485A //RX_FDEQ_GAIN_8 +205 0x5A58 //RX_FDEQ_GAIN_9 +206 0x4848 //RX_FDEQ_GAIN_10 +207 0x4848 //RX_FDEQ_GAIN_11 +208 0x4848 //RX_FDEQ_GAIN_12 +209 0x4848 //RX_FDEQ_GAIN_13 +210 0x4848 //RX_FDEQ_GAIN_14 +211 0x4848 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0202 //RX_FDEQ_BIN_0 +221 0x0203 //RX_FDEQ_BIN_1 +222 0x0303 //RX_FDEQ_BIN_2 +223 0x0304 //RX_FDEQ_BIN_3 +224 0x0604 //RX_FDEQ_BIN_4 +225 0x0406 //RX_FDEQ_BIN_5 +226 0x0708 //RX_FDEQ_BIN_6 +227 0x090A //RX_FDEQ_BIN_7 +228 0x0B0C //RX_FDEQ_BIN_8 +229 0x0D08 //RX_FDEQ_BIN_9 +230 0x0000 //RX_FDEQ_BIN_10 +231 0x0000 //RX_FDEQ_BIN_11 +232 0x0000 //RX_FDEQ_BIN_12 +233 0x0000 //RX_FDEQ_BIN_13 +234 0x0000 //RX_FDEQ_BIN_14 +235 0x0000 //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x4000 //RX_FDEQ_RESRV_0 +245 0x0320 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0035 //RX_FDDRC_BAND_MARGIN_1 +248 0x0060 //RX_FDDRC_BAND_MARGIN_2 +249 0x0080 //RX_FDDRC_BAND_MARGIN_3 +250 0x0004 //RX_FDDRC_BLOCK_EXP +251 0x0600 //RX_FDDRC_THRD_2_0 +252 0x0600 //RX_FDDRC_THRD_2_1 +253 0x0600 //RX_FDDRC_THRD_2_2 +254 0x0600 //RX_FDDRC_THRD_2_3 +255 0x0800 //RX_FDDRC_THRD_3_0 +256 0x0800 //RX_FDDRC_THRD_3_1 +257 0x0800 //RX_FDDRC_THRD_3_2 +258 0x0800 //RX_FDDRC_THRD_3_3 +259 0x0000 //RX_FDDRC_SLANT_0_0 +260 0x0000 //RX_FDDRC_SLANT_0_1 +261 0x0000 //RX_FDDRC_SLANT_0_2 +262 0x0000 //RX_FDDRC_SLANT_0_3 +263 0x7FFF //RX_FDDRC_SLANT_1_0 +264 0x7FFF //RX_FDDRC_SLANT_1_1 +265 0x7FFF //RX_FDDRC_SLANT_1_2 +266 0x7FFF //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +286 0x0082 //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 +#VOL 6 +163 0x1000 //RX_TDDRC_ALPHA_UP_1 +164 0x1000 //RX_TDDRC_ALPHA_UP_2 +165 0x1000 //RX_TDDRC_ALPHA_UP_3 +166 0x1000 //RX_TDDRC_ALPHA_UP_4 +184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +185 0x4000 //RX_TDDRC_ALPHA_DWN_2 +186 0x4000 //RX_TDDRC_ALPHA_DWN_3 +189 0x4000 //RX_TDDRC_ALPHA_DWN_4 +190 0x7214 //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +269 0x0002 //RX_TDDRC_THRD_0 +270 0x0004 //RX_TDDRC_THRD_1 +271 0x1A00 //RX_TDDRC_THRD_2 +272 0x1A00 //RX_TDDRC_THRD_3 +273 0x7FFF //RX_TDDRC_SLANT_0 +274 0x7FFF //RX_TDDRC_SLANT_1 +275 0x1000 //RX_TDDRC_ALPHA_UP_0 +276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x199A //RX_TDDRC_HMNC_GAIN +279 0x0001 //RX_TDDRC_SMT_FLAG +280 0x0CCD //RX_TDDRC_SMT_W +281 0x0780 //RX_TDDRC_DRC_GAIN +195 0x0014 //RX_FDEQ_SUBNUM +196 0x8080 //RX_FDEQ_GAIN_0 +197 0x8054 //RX_FDEQ_GAIN_1 +198 0x5050 //RX_FDEQ_GAIN_2 +199 0x5058 //RX_FDEQ_GAIN_3 +200 0x5C70 //RX_FDEQ_GAIN_4 +201 0x4848 //RX_FDEQ_GAIN_5 +202 0x484C //RX_FDEQ_GAIN_6 +203 0x4848 //RX_FDEQ_GAIN_7 +204 0x485A //RX_FDEQ_GAIN_8 +205 0x5A58 //RX_FDEQ_GAIN_9 +206 0x4848 //RX_FDEQ_GAIN_10 +207 0x4848 //RX_FDEQ_GAIN_11 +208 0x4848 //RX_FDEQ_GAIN_12 +209 0x4848 //RX_FDEQ_GAIN_13 +210 0x4848 //RX_FDEQ_GAIN_14 +211 0x4848 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0202 //RX_FDEQ_BIN_0 +221 0x0203 //RX_FDEQ_BIN_1 +222 0x0303 //RX_FDEQ_BIN_2 +223 0x0304 //RX_FDEQ_BIN_3 +224 0x0604 //RX_FDEQ_BIN_4 +225 0x0406 //RX_FDEQ_BIN_5 +226 0x0708 //RX_FDEQ_BIN_6 +227 0x090A //RX_FDEQ_BIN_7 +228 0x0B0C //RX_FDEQ_BIN_8 +229 0x0D08 //RX_FDEQ_BIN_9 +230 0x0000 //RX_FDEQ_BIN_10 +231 0x0000 //RX_FDEQ_BIN_11 +232 0x0000 //RX_FDEQ_BIN_12 +233 0x0000 //RX_FDEQ_BIN_13 +234 0x0000 //RX_FDEQ_BIN_14 +235 0x0000 //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x4000 //RX_FDEQ_RESRV_0 +245 0x0320 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0035 //RX_FDDRC_BAND_MARGIN_1 +248 0x0060 //RX_FDDRC_BAND_MARGIN_2 +249 0x0080 //RX_FDDRC_BAND_MARGIN_3 +250 0x0004 //RX_FDDRC_BLOCK_EXP +251 0x0600 //RX_FDDRC_THRD_2_0 +252 0x0600 //RX_FDDRC_THRD_2_1 +253 0x0600 //RX_FDDRC_THRD_2_2 +254 0x0600 //RX_FDDRC_THRD_2_3 +255 0x0800 //RX_FDDRC_THRD_3_0 +256 0x0800 //RX_FDDRC_THRD_3_1 +257 0x0800 //RX_FDDRC_THRD_3_2 +258 0x0800 //RX_FDDRC_THRD_3_3 +259 0x0000 //RX_FDDRC_SLANT_0_0 +260 0x0000 //RX_FDDRC_SLANT_0_1 +261 0x0000 //RX_FDDRC_SLANT_0_2 +262 0x0000 //RX_FDDRC_SLANT_0_3 +263 0x7FFF //RX_FDDRC_SLANT_1_0 +264 0x7FFF //RX_FDDRC_SLANT_1_1 +265 0x7FFF //RX_FDDRC_SLANT_1_2 +266 0x7FFF //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +286 0x0100 //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 -#CASE_NAME HANDSFREE-HANDSFREE-VOICE_GENERIC-WB -#PARAM_TYPE TX+RX -#TOTAL_CUSTOM_STEP 7 +#CASE_NAME HANDSFREE-HANDFREE-VOICE_GENERIC-WB +#PARAM_MODE FULL +#PARAM_TYPE TX+2RX +#TOTAL_CUSTOM_STEP 7+7 #TX 0 0x0001 //TX_OPERATION_MODE_0 1 0x0001 //TX_OPERATION_MODE_1 @@ -7169,7 +10838,7 @@ 147 0x0300 //TX_AEC_REF_GAIN_0 148 0x0800 //TX_AEC_REF_GAIN_1 149 0x0800 //TX_AEC_REF_GAIN_2 -150 0x6800 //TX_EAD_THR +150 0x6C00 //TX_EAD_THR 151 0x1000 //TX_THR_RE_EST 152 0x0200 //TX_MIN_EQ_RE_EST_0 153 0x0100 //TX_MIN_EQ_RE_EST_1 @@ -7242,18 +10911,18 @@ 220 0x0000 //TX_DTD_MIC_BLK 221 0x023E //TX_ADPT_STRICT_L 222 0x023E //TX_ADPT_STRICT_H -223 0x0BB8 //TX_RATIO_DT_L_TH_LOW +223 0x03E8 //TX_RATIO_DT_L_TH_LOW 224 0x3A98 //TX_RATIO_DT_H_TH_LOW -225 0x1770 //TX_RATIO_DT_L_TH_HIGH +225 0x0578 //TX_RATIO_DT_L_TH_HIGH 226 0x4E20 //TX_RATIO_DT_H_TH_HIGH -227 0x09C4 //TX_RATIO_DT_L0_TH -228 0x2000 //TX_B_POST_FILT_ECHO_L +227 0x0001 //TX_RATIO_DT_L0_TH +228 0x7FFF //TX_B_POST_FILT_ECHO_L 229 0x7FFF //TX_B_POST_FILT_ECHO_H 230 0x0200 //TX_MIN_G_CTRL_ECHO 231 0x1000 //TX_B_LESSCUT_RTO_ECHO 232 0x0000 //TX_EPD_OFFSET_00 233 0x0000 //TX_EPD_OFFST_01 -234 0x1388 //TX_RATIO_DT_L0_TH_HIGH +234 0x03E8 //TX_RATIO_DT_L0_TH_HIGH 235 0x7FFF //TX_RATIO_DT_H_TH_CUT 236 0x7FFF //TX_MIN_EQ_RE_EST_13 237 0x0000 //TX_DTD_THR1_7 @@ -7270,11 +10939,11 @@ 248 0xF800 //TX_THR_SN_EST_6 249 0xF800 //TX_THR_SN_EST_7 250 0x0100 //TX_DELTA_THR_SN_EST_0 -251 0x0200 //TX_DELTA_THR_SN_EST_1 -252 0x0100 //TX_DELTA_THR_SN_EST_2 -253 0x0200 //TX_DELTA_THR_SN_EST_3 +251 0x0100 //TX_DELTA_THR_SN_EST_1 +252 0x0200 //TX_DELTA_THR_SN_EST_2 +253 0x0100 //TX_DELTA_THR_SN_EST_3 254 0x0100 //TX_DELTA_THR_SN_EST_4 -255 0x0100 //TX_DELTA_THR_SN_EST_5 +255 0x0200 //TX_DELTA_THR_SN_EST_5 256 0x0200 //TX_DELTA_THR_SN_EST_6 257 0x0200 //TX_DELTA_THR_SN_EST_7 258 0x4000 //TX_LAMBDA_NN_EST_0 @@ -7302,11 +10971,11 @@ 280 0x1000 //TX_B_POST_FLT_1 281 0x0010 //TX_NS_LVL_CTRL_0 282 0x0014 //TX_NS_LVL_CTRL_1 -283 0x0014 //TX_NS_LVL_CTRL_2 -284 0x0018 //TX_NS_LVL_CTRL_3 -285 0x0016 //TX_NS_LVL_CTRL_4 -286 0x0014 //TX_NS_LVL_CTRL_5 -287 0x0011 //TX_NS_LVL_CTRL_6 +283 0x0018 //TX_NS_LVL_CTRL_2 +284 0x0016 //TX_NS_LVL_CTRL_3 +285 0x0014 //TX_NS_LVL_CTRL_4 +286 0x0011 //TX_NS_LVL_CTRL_5 +287 0x0014 //TX_NS_LVL_CTRL_6 288 0x0011 //TX_NS_LVL_CTRL_7 289 0x000F //TX_MIN_GAIN_S_0 290 0x0010 //TX_MIN_GAIN_S_1 @@ -7324,8 +10993,8 @@ 302 0x4000 //TX_SNRI_SUP_2 303 0x4000 //TX_SNRI_SUP_3 304 0x4000 //TX_SNRI_SUP_4 -305 0x4000 //TX_SNRI_SUP_5 -306 0x50C0 //TX_SNRI_SUP_6 +305 0x50C0 //TX_SNRI_SUP_5 +306 0x4000 //TX_SNRI_SUP_6 307 0x7FFF //TX_SNRI_SUP_7 308 0x7FFF //TX_THR_LFNS 309 0x0018 //TX_G_LFNS @@ -7334,19 +11003,19 @@ 312 0x7FFF //TX_A_POST_FILT_0 313 0x2000 //TX_A_POST_FILT_1 314 0x5000 //TX_A_POST_FILT_S_0 -315 0x6000 //TX_A_POST_FILT_S_1 -316 0x4C00 //TX_A_POST_FILT_S_2 -317 0x4000 //TX_A_POST_FILT_S_3 -318 0x6000 //TX_A_POST_FILT_S_4 -319 0x4000 //TX_A_POST_FILT_S_5 -320 0x5000 //TX_A_POST_FILT_S_6 +315 0x4C00 //TX_A_POST_FILT_S_1 +316 0x4000 //TX_A_POST_FILT_S_2 +317 0x6000 //TX_A_POST_FILT_S_3 +318 0x4000 //TX_A_POST_FILT_S_4 +319 0x5000 //TX_A_POST_FILT_S_5 +320 0x6000 //TX_A_POST_FILT_S_6 321 0x7000 //TX_A_POST_FILT_S_7 322 0x2000 //TX_B_POST_FILT_0 -323 0x1000 //TX_B_POST_FILT_1 +323 0x2000 //TX_B_POST_FILT_1 324 0x2000 //TX_B_POST_FILT_2 -325 0x2000 //TX_B_POST_FILT_3 +325 0x4000 //TX_B_POST_FILT_3 326 0x4000 //TX_B_POST_FILT_4 -327 0x4000 //TX_B_POST_FILT_5 +327 0x1000 //TX_B_POST_FILT_5 328 0x1000 //TX_B_POST_FILT_6 329 0x2000 //TX_B_POST_FILT_7 330 0x4000 //TX_B_LESSCUT_RTO_S_0 @@ -7354,14 +11023,14 @@ 332 0x7FFF //TX_B_LESSCUT_RTO_S_2 333 0x7FFF //TX_B_LESSCUT_RTO_S_3 334 0x7FFF //TX_B_LESSCUT_RTO_S_4 -335 0x7FFF //TX_B_LESSCUT_RTO_S_5 -336 0x6000 //TX_B_LESSCUT_RTO_S_6 +335 0x6000 //TX_B_LESSCUT_RTO_S_5 +336 0x7FFF //TX_B_LESSCUT_RTO_S_6 337 0x7FFF //TX_B_LESSCUT_RTO_S_7 338 0x7C00 //TX_LAMBDA_PFILT 339 0x7C00 //TX_LAMBDA_PFILT_S_0 340 0x7C00 //TX_LAMBDA_PFILT_S_1 -341 0x7C00 //TX_LAMBDA_PFILT_S_2 -342 0x7A00 //TX_LAMBDA_PFILT_S_3 +341 0x7A00 //TX_LAMBDA_PFILT_S_2 +342 0x7C00 //TX_LAMBDA_PFILT_S_3 343 0x7C00 //TX_LAMBDA_PFILT_S_4 344 0x7C00 //TX_LAMBDA_PFILT_S_5 345 0x7C00 //TX_LAMBDA_PFILT_S_6 @@ -7399,10 +11068,10 @@ 377 0x7FFF //TX_NOISE_TH_5_4 378 0x0F0A //TX_NOISE_TH_6 379 0x0033 //TX_MINENOISE_TH -380 0x4000 //TX_MINENOISE_MIC0_TH_MTS -381 0xFFEE //TX_MINENOISE_MIC0_TH_EXP -382 0x6000 //TX_MINENOISE_MIC0_S_TH_MTS -383 0xFFF3 //TX_MINENOISE_MIC0_S_TH_EXP +380 0xD508 //TX_MORENS_TFMASK_TH +381 0x0001 //TX_DRC_QUIET_FLOOR +382 0x7999 //TX_RATIODTL_CUT_TH +383 0x0119 //TX_DT_CUT_K1 384 0x0666 //TX_OUT_ENER_S_TH_CLEAN 385 0x0666 //TX_OUT_ENER_S_TH_LESSCLEAN 386 0x0333 //TX_OUT_ENER_S_TH_NOISY @@ -7410,15 +11079,15 @@ 388 0x0333 //TX_OUT_ENER_TH_SPEECH 389 0x2000 //TX_SN_NPB_GAIN 390 0x0000 //TX_NN_NPB_GAIN -391 0x0000 //TX_CSX_ALPHA_0 -392 0x0000 //TX_CSX_ALPHA_1 -393 0x0000 //TX_CSX_ALPHA_2 -394 0x0000 //TX_CSX_ALPHA_3 -395 0x0800 //TX_MU_ARSP_EST -396 0x00C8 //TX_P_OUTBEAM_MIN_TH +391 0x7FFF //TX_POST_MASK_SUP_HSNE +392 0x7FFF //TX_TAIL_DET_TH +393 0x4000 //TX_B_LESSCUT_RTO_WTA +394 0x0000 //TX_MEL_G_R +395 0x0080 //TX_SUPHIGH_TH +396 0x0000 //TX_MASK_G_R 397 0x0002 //TX_EXTRA_NS_L -398 0x0800 //TX_EXTRA_NS_A -399 0x0005 //TX_VR_NOISE_FLOOR_TH +398 0x1800 //TX_C_POST_FLT_MASK +399 0x4000 //TX_A_POST_FLT_WNS 400 0x0148 //TX_MIN_G_LOW300HZ 401 0x0001 //TX_MAXLEVEL_CNG 402 0x00B4 //TX_STN_NOISE_TH @@ -7528,21 +11197,21 @@ 506 0x2000 //TX_RADIODTLV 507 0x0320 //TX_POWER_LINEIN_TH 508 0x0014 //TX_FE_VADCOUNT_TH_FC -509 0x0000 //TX_ECHO_SUPP_FC +509 0x000A //TX_ECHO_SUPP_FC 510 0x0C80 //TX_ECHO_TH 511 0x6666 //TX_MIC_TO_BFGAIN 512 0x0000 //TX_MICTOBFGAIN0 513 0x0000 //TX_FASTMUE_TH -514 0x0000 //TX_DERVB_LEN_0 -515 0x0000 //TX_DERVB_LEN_1 -516 0x0000 //TX_RHO_DERVB -517 0x0000 //TX_MIC_INDX_DERVB -518 0x0000 //TX_MU_DERVB -519 0x0000 //TX_DR_RESRV_0 -520 0x0000 //TX_DR_RESRV_1 -521 0x0000 //TX_DR_RESRV_2 -522 0x0000 //TX_DR_RESRV_3 -523 0x0000 //TX_DR_RESRV_4 +514 0x3000 //TX_DEREVERB_LF_MU +515 0x34CD //TX_DEREVERB_HF_MU +516 0x0007 //TX_DEREVERB_DELAY +517 0x0004 //TX_DEREVERB_COEF_LEN +518 0x0003 //TX_DEREVERB_DNR +519 0x0000 //TX_DEREVERB_ALPHA +520 0x0000 //TX_DEREVERB_BETA +521 0x3A98 //TX_GSC_RTOL_TH +522 0x3A98 //TX_GSC_RTOH_TH +523 0x7E2C //TX_WIDE2_MEANHTH 524 0x0000 //TX_DR_RESRV_5 525 0x0000 //TX_DR_RESRV_6 526 0x0000 //TX_DR_RESRV_7 @@ -7910,14 +11579,79 @@ 888 0x0028 //TX_FASTNS_ARSPC_TH 889 0xC000 //TX_FASTNS_MASK5_TH 890 0x4848 //TX_POSTSSA_MIN_G_VR_MASK -891 0x1000 //TX_A_LESSCUT_RTO_MASK +891 0x4000 //TX_A_LESSCUT_RTO_MASK 892 0x1770 //TX_FASTNS_NOISETH 893 0xC000 //TX_FASTNS_SSA_THLFL 894 0xC000 //TX_FASTNS_SSA_THHFL 895 0xCCCC //TX_FASTNS_SSA_THLFH 896 0xD999 //TX_FASTNS_SSA_THHFH +897 0x2339 //TX_SENDFUNC_REG_MICMUTE +898 0x0021 //TX_SENDFUNC_REG_MICMUTE1 +899 0x02BC //TX_MICMUTE_RATIO_THR +900 0x0140 //TX_MICMUTE_AMP_THR +901 0x0004 //TX_MICMUTE_HPF_IND +902 0x00C0 //TX_MICMUTE_LOG_EYR_TH +903 0x0008 //TX_MICMUTE_CVG_TIME +904 0x0008 //TX_MICMUTE_RELEASE_TIME +905 0x01FE //TX_MIC_VOLUME_MIC0MUTE +906 0x0020 //TX_MICMUTE_EPD_OFFSET_0 +907 0x001E //TX_MICMUTE_FRQ_AEC_L +908 0x7999 //TX_MICMUTE_EAD_THR +909 0x7FFF //TX_MICMUTE_LAMBDA_CB_NLE +910 0x7FFF //TX_MICMUTE_LAMBDA_RE_EST +911 0x4000 //TX_DTD_THR1_MICMUTE_0 +912 0x7000 //TX_DTD_THR1_MICMUTE_1 +913 0x7FFF //TX_DTD_THR1_MICMUTE_2 +914 0x7FFF //TX_DTD_THR1_MICMUTE_3 +915 0x6CCC //TX_DTD_THR2_MICMUTE_0 +916 0x0400 //TX_MICMUTE_MIN_EQ_RE_EST_0 +917 0x0400 //TX_MICMUTE_MIN_EQ_RE_EST_1 +918 0x1000 //TX_MICMUTE_MIN_EQ_RE_EST_2 +919 0x7FFF //TX_MICMUTE_MIN_EQ_RE_EST_3 +920 0x7FFF //TX_MICMUTE_MIN_EQ_RE_EST_4 +921 0x4000 //TX_MICMUTE_C_POST_FLT +922 0x03E8 //TX_MICMUTE_DT_CUT_K +923 0x0001 //TX_MICMUTE_DT_CUT_THR +924 0x03E8 //TX_MICMUTE_DT_CUT_K2 +925 0x0001 //TX_MICMUTE_DT_CUT_THR2 +926 0x0064 //TX_MICMUTE_DT2_HOLD_N +927 0x1000 //TX_MICMUTE_RATIODTH_THCUT +928 0x1000 //TX_MICMUTE_B_POST_FLT_ECHOL +929 0x7FFF //TX_MICMUTE_B_POST_FLT_ECHOH +930 0x0400 //TX_MICMUTE_C_POST_FLT_MASK +931 0x7999 //TX_MICMUTE_RATIODTL_CUT_TH +932 0x0258 //TX_MICMUTE_DT_CUT_K1 +933 0x0800 //TX_MICMUTE_N2_SN_EST +934 0xFC00 //TX_MICMUTE_THR_SN_EST_0 +935 0x001C //TX_MICMUTE_MIN_G_CTRL_0 +936 0x6000 //TX_MICMUTE_A_POST_FILT_S_0 +937 0x7000 //TX_MICMUTE_B_POST_FILT_0 +938 0x2710 //TX_MIC1RUB_AMP_THR +939 0x0010 //TX_MIC1MUTE_RATIO_THR +940 0x0450 //TX_MIC1MUTE_AMP_THR +941 0x0008 //TX_MIC1MUTE_CVG_TIME +942 0x0008 //TX_MIC1MUTE_RELEASE_TIME +943 0x0000 //TX_AMS_RESRV_01 +944 0x0000 //TX_AMS_RESRV_02 +945 0x0000 //TX_AMS_RESRV_03 +946 0x0000 //TX_AMS_RESRV_04 +947 0x0000 //TX_AMS_RESRV_05 +948 0x0000 //TX_AMS_RESRV_06 +949 0x0000 //TX_AMS_RESRV_07 +950 0x0000 //TX_AMS_RESRV_08 +951 0x0000 //TX_AMS_RESRV_09 +952 0x0000 //TX_AMS_RESRV_10 +953 0x0000 //TX_AMS_RESRV_11 +954 0x0000 //TX_AMS_RESRV_12 +955 0x0000 //TX_AMS_RESRV_13 +956 0x0000 //TX_AMS_RESRV_14 +957 0x0000 //TX_AMS_RESRV_15 +958 0x0000 //TX_AMS_RESRV_16 +959 0x0000 //TX_AMS_RESRV_17 +960 0x0000 //TX_AMS_RESRV_18 +961 0x0000 //TX_AMS_RESRV_19 #RX -0 0x027C //RX_RECVFUNC_MODE_0 +0 0x206C //RX_RECVFUNC_MODE_0 1 0x0000 //RX_RECVFUNC_MODE_1 2 0x0001 //RX_SAMPLINGFREQ_SIG 3 0x0001 //RX_SAMPLINGFREQ_PROC @@ -7956,20 +11690,20 @@ 36 0x0000 //RX_LMT_THRD 37 0x4000 //RX_LMT_ALPHA 38 0x001C //RX_FDEQ_SUBNUM -39 0x6868 //RX_FDEQ_GAIN_0 -40 0x6858 //RX_FDEQ_GAIN_1 -41 0x5858 //RX_FDEQ_GAIN_2 -42 0x5858 //RX_FDEQ_GAIN_3 -43 0x5C5C //RX_FDEQ_GAIN_4 -44 0x5C54 //RX_FDEQ_GAIN_5 -45 0x544C //RX_FDEQ_GAIN_6 -46 0x4A48 //RX_FDEQ_GAIN_7 -47 0x4860 //RX_FDEQ_GAIN_8 -48 0x6068 //RX_FDEQ_GAIN_9 -49 0x6C6C //RX_FDEQ_GAIN_10 -50 0x6C68 //RX_FDEQ_GAIN_11 -51 0x5A5A //RX_FDEQ_GAIN_12 -52 0x5A5C //RX_FDEQ_GAIN_13 +39 0x4848 //RX_FDEQ_GAIN_0 +40 0x4844 //RX_FDEQ_GAIN_1 +41 0x3E3B //RX_FDEQ_GAIN_2 +42 0x4143 //RX_FDEQ_GAIN_3 +43 0x4348 //RX_FDEQ_GAIN_4 +44 0x4848 //RX_FDEQ_GAIN_5 +45 0x4848 //RX_FDEQ_GAIN_6 +46 0x4848 //RX_FDEQ_GAIN_7 +47 0x4848 //RX_FDEQ_GAIN_8 +48 0x4848 //RX_FDEQ_GAIN_9 +49 0x4848 //RX_FDEQ_GAIN_10 +50 0x4E56 //RX_FDEQ_GAIN_11 +51 0x595C //RX_FDEQ_GAIN_12 +52 0x5959 //RX_FDEQ_GAIN_13 53 0x4848 //RX_FDEQ_GAIN_14 54 0x4848 //RX_FDEQ_GAIN_15 55 0x4848 //RX_FDEQ_GAIN_16 @@ -8041,12 +11775,12 @@ 121 0x199A //RX_TDDRC_HMNC_GAIN 122 0x0001 //RX_TDDRC_SMT_FLAG 123 0x0CCD //RX_TDDRC_SMT_W -124 0x0715 //RX_TDDRC_DRC_GAIN +124 0x0284 //RX_TDDRC_DRC_GAIN 125 0x7C00 //RX_LAMBDA_PKA_FP 126 0x2000 //RX_TPKA_FP 127 0x2000 //RX_MIN_G_FP 128 0x0080 //RX_MAX_G_FP -129 0x0011 //RX_SPK_VOL +129 0x0100 //RX_SPK_VOL 130 0x0000 //RX_VOL_RESRV_0 131 0x0000 //RX_MAXLEVEL_CNG 132 0x3000 //RX_BWE_UV_TH @@ -8097,22 +11831,22 @@ 121 0x199A //RX_TDDRC_HMNC_GAIN 122 0x0001 //RX_TDDRC_SMT_FLAG 123 0x0CCD //RX_TDDRC_SMT_W -124 0x0715 //RX_TDDRC_DRC_GAIN +124 0x0284 //RX_TDDRC_DRC_GAIN 38 0x001C //RX_FDEQ_SUBNUM -39 0x6868 //RX_FDEQ_GAIN_0 -40 0x6858 //RX_FDEQ_GAIN_1 -41 0x5858 //RX_FDEQ_GAIN_2 -42 0x5858 //RX_FDEQ_GAIN_3 -43 0x5C5C //RX_FDEQ_GAIN_4 -44 0x5C54 //RX_FDEQ_GAIN_5 -45 0x544C //RX_FDEQ_GAIN_6 -46 0x4A48 //RX_FDEQ_GAIN_7 -47 0x4860 //RX_FDEQ_GAIN_8 -48 0x6068 //RX_FDEQ_GAIN_9 -49 0x6C6C //RX_FDEQ_GAIN_10 -50 0x6C68 //RX_FDEQ_GAIN_11 -51 0x5A5A //RX_FDEQ_GAIN_12 -52 0x5A5C //RX_FDEQ_GAIN_13 +39 0x4848 //RX_FDEQ_GAIN_0 +40 0x4844 //RX_FDEQ_GAIN_1 +41 0x3E3B //RX_FDEQ_GAIN_2 +42 0x4143 //RX_FDEQ_GAIN_3 +43 0x4348 //RX_FDEQ_GAIN_4 +44 0x4848 //RX_FDEQ_GAIN_5 +45 0x4848 //RX_FDEQ_GAIN_6 +46 0x4848 //RX_FDEQ_GAIN_7 +47 0x4848 //RX_FDEQ_GAIN_8 +48 0x4848 //RX_FDEQ_GAIN_9 +49 0x4848 //RX_FDEQ_GAIN_10 +50 0x4E56 //RX_FDEQ_GAIN_11 +51 0x595C //RX_FDEQ_GAIN_12 +52 0x5959 //RX_FDEQ_GAIN_13 53 0x4848 //RX_FDEQ_GAIN_14 54 0x4848 //RX_FDEQ_GAIN_15 55 0x4848 //RX_FDEQ_GAIN_16 @@ -8196,22 +11930,22 @@ 121 0x199A //RX_TDDRC_HMNC_GAIN 122 0x0001 //RX_TDDRC_SMT_FLAG 123 0x0CCD //RX_TDDRC_SMT_W -124 0x0715 //RX_TDDRC_DRC_GAIN +124 0x0284 //RX_TDDRC_DRC_GAIN 38 0x001C //RX_FDEQ_SUBNUM -39 0x6868 //RX_FDEQ_GAIN_0 -40 0x6858 //RX_FDEQ_GAIN_1 -41 0x5858 //RX_FDEQ_GAIN_2 -42 0x5858 //RX_FDEQ_GAIN_3 -43 0x5C5C //RX_FDEQ_GAIN_4 -44 0x5C54 //RX_FDEQ_GAIN_5 -45 0x544C //RX_FDEQ_GAIN_6 -46 0x4A48 //RX_FDEQ_GAIN_7 -47 0x4860 //RX_FDEQ_GAIN_8 -48 0x6068 //RX_FDEQ_GAIN_9 -49 0x6C6C //RX_FDEQ_GAIN_10 -50 0x6C68 //RX_FDEQ_GAIN_11 -51 0x5A5A //RX_FDEQ_GAIN_12 -52 0x5A5C //RX_FDEQ_GAIN_13 +39 0x4848 //RX_FDEQ_GAIN_0 +40 0x4844 //RX_FDEQ_GAIN_1 +41 0x3E3B //RX_FDEQ_GAIN_2 +42 0x4143 //RX_FDEQ_GAIN_3 +43 0x4348 //RX_FDEQ_GAIN_4 +44 0x4848 //RX_FDEQ_GAIN_5 +45 0x4848 //RX_FDEQ_GAIN_6 +46 0x4848 //RX_FDEQ_GAIN_7 +47 0x4848 //RX_FDEQ_GAIN_8 +48 0x4848 //RX_FDEQ_GAIN_9 +49 0x4848 //RX_FDEQ_GAIN_10 +50 0x4E56 //RX_FDEQ_GAIN_11 +51 0x595C //RX_FDEQ_GAIN_12 +52 0x5959 //RX_FDEQ_GAIN_13 53 0x4848 //RX_FDEQ_GAIN_14 54 0x4848 //RX_FDEQ_GAIN_15 55 0x4848 //RX_FDEQ_GAIN_16 @@ -8295,22 +12029,22 @@ 121 0x199A //RX_TDDRC_HMNC_GAIN 122 0x0001 //RX_TDDRC_SMT_FLAG 123 0x0CCD //RX_TDDRC_SMT_W -124 0x0715 //RX_TDDRC_DRC_GAIN +124 0x0284 //RX_TDDRC_DRC_GAIN 38 0x001C //RX_FDEQ_SUBNUM -39 0x6868 //RX_FDEQ_GAIN_0 -40 0x6858 //RX_FDEQ_GAIN_1 -41 0x5858 //RX_FDEQ_GAIN_2 -42 0x5858 //RX_FDEQ_GAIN_3 -43 0x5C5C //RX_FDEQ_GAIN_4 -44 0x5C54 //RX_FDEQ_GAIN_5 -45 0x544C //RX_FDEQ_GAIN_6 -46 0x4A48 //RX_FDEQ_GAIN_7 -47 0x4860 //RX_FDEQ_GAIN_8 -48 0x6068 //RX_FDEQ_GAIN_9 -49 0x6C6C //RX_FDEQ_GAIN_10 -50 0x6C68 //RX_FDEQ_GAIN_11 -51 0x5A5A //RX_FDEQ_GAIN_12 -52 0x5A5C //RX_FDEQ_GAIN_13 +39 0x4848 //RX_FDEQ_GAIN_0 +40 0x4844 //RX_FDEQ_GAIN_1 +41 0x3E3B //RX_FDEQ_GAIN_2 +42 0x4143 //RX_FDEQ_GAIN_3 +43 0x4348 //RX_FDEQ_GAIN_4 +44 0x4848 //RX_FDEQ_GAIN_5 +45 0x4848 //RX_FDEQ_GAIN_6 +46 0x4848 //RX_FDEQ_GAIN_7 +47 0x4848 //RX_FDEQ_GAIN_8 +48 0x4848 //RX_FDEQ_GAIN_9 +49 0x4848 //RX_FDEQ_GAIN_10 +50 0x4E56 //RX_FDEQ_GAIN_11 +51 0x595C //RX_FDEQ_GAIN_12 +52 0x5959 //RX_FDEQ_GAIN_13 53 0x4848 //RX_FDEQ_GAIN_14 54 0x4848 //RX_FDEQ_GAIN_15 55 0x4848 //RX_FDEQ_GAIN_16 @@ -8394,22 +12128,22 @@ 121 0x199A //RX_TDDRC_HMNC_GAIN 122 0x0001 //RX_TDDRC_SMT_FLAG 123 0x0CCD //RX_TDDRC_SMT_W -124 0x0715 //RX_TDDRC_DRC_GAIN +124 0x0284 //RX_TDDRC_DRC_GAIN 38 0x001C //RX_FDEQ_SUBNUM -39 0x6868 //RX_FDEQ_GAIN_0 -40 0x6858 //RX_FDEQ_GAIN_1 -41 0x5858 //RX_FDEQ_GAIN_2 -42 0x5858 //RX_FDEQ_GAIN_3 -43 0x5C5C //RX_FDEQ_GAIN_4 -44 0x5C54 //RX_FDEQ_GAIN_5 -45 0x544C //RX_FDEQ_GAIN_6 -46 0x4A48 //RX_FDEQ_GAIN_7 -47 0x4860 //RX_FDEQ_GAIN_8 -48 0x6068 //RX_FDEQ_GAIN_9 -49 0x6C6C //RX_FDEQ_GAIN_10 -50 0x6C68 //RX_FDEQ_GAIN_11 -51 0x5A5A //RX_FDEQ_GAIN_12 -52 0x5A5C //RX_FDEQ_GAIN_13 +39 0x4848 //RX_FDEQ_GAIN_0 +40 0x4844 //RX_FDEQ_GAIN_1 +41 0x3E3B //RX_FDEQ_GAIN_2 +42 0x4143 //RX_FDEQ_GAIN_3 +43 0x4348 //RX_FDEQ_GAIN_4 +44 0x4848 //RX_FDEQ_GAIN_5 +45 0x4848 //RX_FDEQ_GAIN_6 +46 0x4848 //RX_FDEQ_GAIN_7 +47 0x4848 //RX_FDEQ_GAIN_8 +48 0x4848 //RX_FDEQ_GAIN_9 +49 0x4848 //RX_FDEQ_GAIN_10 +50 0x4E56 //RX_FDEQ_GAIN_11 +51 0x595C //RX_FDEQ_GAIN_12 +52 0x5959 //RX_FDEQ_GAIN_13 53 0x4848 //RX_FDEQ_GAIN_14 54 0x4848 //RX_FDEQ_GAIN_15 55 0x4848 //RX_FDEQ_GAIN_16 @@ -8493,22 +12227,22 @@ 121 0x199A //RX_TDDRC_HMNC_GAIN 122 0x0001 //RX_TDDRC_SMT_FLAG 123 0x0CCD //RX_TDDRC_SMT_W -124 0x0715 //RX_TDDRC_DRC_GAIN +124 0x0284 //RX_TDDRC_DRC_GAIN 38 0x001C //RX_FDEQ_SUBNUM -39 0x6868 //RX_FDEQ_GAIN_0 -40 0x6858 //RX_FDEQ_GAIN_1 -41 0x5858 //RX_FDEQ_GAIN_2 -42 0x5858 //RX_FDEQ_GAIN_3 -43 0x5C5C //RX_FDEQ_GAIN_4 -44 0x8854 //RX_FDEQ_GAIN_5 -45 0x5448 //RX_FDEQ_GAIN_6 +39 0x4848 //RX_FDEQ_GAIN_0 +40 0x4844 //RX_FDEQ_GAIN_1 +41 0x3E3B //RX_FDEQ_GAIN_2 +42 0x4143 //RX_FDEQ_GAIN_3 +43 0x4348 //RX_FDEQ_GAIN_4 +44 0x4848 //RX_FDEQ_GAIN_5 +45 0x4848 //RX_FDEQ_GAIN_6 46 0x4848 //RX_FDEQ_GAIN_7 -47 0x4860 //RX_FDEQ_GAIN_8 -48 0x6068 //RX_FDEQ_GAIN_9 -49 0x7070 //RX_FDEQ_GAIN_10 -50 0x8070 //RX_FDEQ_GAIN_11 -51 0x6060 //RX_FDEQ_GAIN_12 -52 0x7070 //RX_FDEQ_GAIN_13 +47 0x4848 //RX_FDEQ_GAIN_8 +48 0x4848 //RX_FDEQ_GAIN_9 +49 0x4848 //RX_FDEQ_GAIN_10 +50 0x4E56 //RX_FDEQ_GAIN_11 +51 0x595C //RX_FDEQ_GAIN_12 +52 0x5959 //RX_FDEQ_GAIN_13 53 0x4848 //RX_FDEQ_GAIN_14 54 0x4848 //RX_FDEQ_GAIN_15 55 0x4848 //RX_FDEQ_GAIN_16 @@ -8592,22 +12326,22 @@ 121 0x199A //RX_TDDRC_HMNC_GAIN 122 0x0001 //RX_TDDRC_SMT_FLAG 123 0x0CCD //RX_TDDRC_SMT_W -124 0x0715 //RX_TDDRC_DRC_GAIN +124 0x0284 //RX_TDDRC_DRC_GAIN 38 0x001C //RX_FDEQ_SUBNUM -39 0x6868 //RX_FDEQ_GAIN_0 -40 0x6858 //RX_FDEQ_GAIN_1 -41 0x5858 //RX_FDEQ_GAIN_2 -42 0x5858 //RX_FDEQ_GAIN_3 -43 0x5C5C //RX_FDEQ_GAIN_4 -44 0x8854 //RX_FDEQ_GAIN_5 -45 0x5448 //RX_FDEQ_GAIN_6 +39 0x4848 //RX_FDEQ_GAIN_0 +40 0x4844 //RX_FDEQ_GAIN_1 +41 0x3E3B //RX_FDEQ_GAIN_2 +42 0x4143 //RX_FDEQ_GAIN_3 +43 0x4348 //RX_FDEQ_GAIN_4 +44 0x4848 //RX_FDEQ_GAIN_5 +45 0x4848 //RX_FDEQ_GAIN_6 46 0x4848 //RX_FDEQ_GAIN_7 -47 0x4860 //RX_FDEQ_GAIN_8 -48 0x6068 //RX_FDEQ_GAIN_9 -49 0x7070 //RX_FDEQ_GAIN_10 -50 0x8070 //RX_FDEQ_GAIN_11 -51 0x6060 //RX_FDEQ_GAIN_12 -52 0x7070 //RX_FDEQ_GAIN_13 +47 0x4848 //RX_FDEQ_GAIN_8 +48 0x4848 //RX_FDEQ_GAIN_9 +49 0x4848 //RX_FDEQ_GAIN_10 +50 0x4E56 //RX_FDEQ_GAIN_11 +51 0x595C //RX_FDEQ_GAIN_12 +52 0x5959 //RX_FDEQ_GAIN_13 53 0x4848 //RX_FDEQ_GAIN_14 54 0x4848 //RX_FDEQ_GAIN_15 55 0x4848 //RX_FDEQ_GAIN_16 @@ -8691,22 +12425,22 @@ 121 0x199A //RX_TDDRC_HMNC_GAIN 122 0x0001 //RX_TDDRC_SMT_FLAG 123 0x0CCD //RX_TDDRC_SMT_W -124 0x0715 //RX_TDDRC_DRC_GAIN +124 0x0284 //RX_TDDRC_DRC_GAIN 38 0x001C //RX_FDEQ_SUBNUM -39 0x6868 //RX_FDEQ_GAIN_0 -40 0x6864 //RX_FDEQ_GAIN_1 -41 0x7070 //RX_FDEQ_GAIN_2 -42 0x6058 //RX_FDEQ_GAIN_3 -43 0x5C5C //RX_FDEQ_GAIN_4 -44 0x8854 //RX_FDEQ_GAIN_5 -45 0x5448 //RX_FDEQ_GAIN_6 +39 0x4848 //RX_FDEQ_GAIN_0 +40 0x4844 //RX_FDEQ_GAIN_1 +41 0x3E3B //RX_FDEQ_GAIN_2 +42 0x4143 //RX_FDEQ_GAIN_3 +43 0x4348 //RX_FDEQ_GAIN_4 +44 0x4848 //RX_FDEQ_GAIN_5 +45 0x4848 //RX_FDEQ_GAIN_6 46 0x4848 //RX_FDEQ_GAIN_7 -47 0x4860 //RX_FDEQ_GAIN_8 -48 0x6068 //RX_FDEQ_GAIN_9 -49 0x7070 //RX_FDEQ_GAIN_10 -50 0x8070 //RX_FDEQ_GAIN_11 -51 0x6060 //RX_FDEQ_GAIN_12 -52 0x7070 //RX_FDEQ_GAIN_13 +47 0x4848 //RX_FDEQ_GAIN_8 +48 0x4848 //RX_FDEQ_GAIN_9 +49 0x4848 //RX_FDEQ_GAIN_10 +50 0x4E56 //RX_FDEQ_GAIN_11 +51 0x595C //RX_FDEQ_GAIN_12 +52 0x5959 //RX_FDEQ_GAIN_13 53 0x4848 //RX_FDEQ_GAIN_14 54 0x4848 //RX_FDEQ_GAIN_15 55 0x4848 //RX_FDEQ_GAIN_16 @@ -8767,14 +12501,866 @@ 110 0x0000 //RX_FDDRC_RESRV_0 129 0x0100 //RX_SPK_VOL 130 0x0000 //RX_VOL_RESRV_0 +#RX 2 +157 0x027C //RX_RECVFUNC_MODE_0 +158 0x0000 //RX_RECVFUNC_MODE_1 +159 0x0001 //RX_SAMPLINGFREQ_SIG +160 0x0001 //RX_SAMPLINGFREQ_PROC +161 0x000A //RX_FRAME_SZ +162 0x0000 //RX_DELAY_OPT +163 0x6000 //RX_TDDRC_ALPHA_UP_1 +164 0x6000 //RX_TDDRC_ALPHA_UP_2 +165 0x6000 //RX_TDDRC_ALPHA_UP_3 +166 0x1000 //RX_TDDRC_ALPHA_UP_4 +167 0x0800 //RX_PGA +168 0x7B02 //RX_A_HP +169 0x4000 //RX_B_PE +170 0x7800 //RX_THR_PITCH_DET_0 +171 0x7000 //RX_THR_PITCH_DET_1 +172 0x6000 //RX_THR_PITCH_DET_2 +173 0x0008 //RX_PITCH_BFR_LEN +174 0x0003 //RX_SBD_PITCH_DET +175 0x0100 //RX_PP_RESRV_0 +176 0x0020 //RX_PP_RESRV_1 +177 0x0400 //RX_N_SN_EST +178 0x000C //RX_N2_SN_EST +179 0x0010 //RX_NS_LVL_CTRL +180 0xF800 //RX_THR_SN_EST +181 0x7E00 //RX_LAMBDA_PFILT +182 0x000A //RX_FENS_RESRV_0 +183 0x0190 //RX_FENS_RESRV_1 +184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +187 0x0002 //RX_EXTRA_NS_L +188 0x0800 //RX_EXTRA_NS_A +189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +190 0x7214 //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +192 0x199A //RX_A_POST_FLT +193 0x0000 //RX_LMT_THRD +194 0x4000 //RX_LMT_ALPHA +195 0x001C //RX_FDEQ_SUBNUM +196 0x6868 //RX_FDEQ_GAIN_0 +197 0x6858 //RX_FDEQ_GAIN_1 +198 0x5858 //RX_FDEQ_GAIN_2 +199 0x5858 //RX_FDEQ_GAIN_3 +200 0x5C5C //RX_FDEQ_GAIN_4 +201 0x5C54 //RX_FDEQ_GAIN_5 +202 0x544C //RX_FDEQ_GAIN_6 +203 0x4A48 //RX_FDEQ_GAIN_7 +204 0x4860 //RX_FDEQ_GAIN_8 +205 0x6068 //RX_FDEQ_GAIN_9 +206 0x6C6C //RX_FDEQ_GAIN_10 +207 0x6C68 //RX_FDEQ_GAIN_11 +208 0x5A5A //RX_FDEQ_GAIN_12 +209 0x5A5C //RX_FDEQ_GAIN_13 +210 0x4848 //RX_FDEQ_GAIN_14 +211 0x4848 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0202 //RX_FDEQ_BIN_0 +221 0x0203 //RX_FDEQ_BIN_1 +222 0x0303 //RX_FDEQ_BIN_2 +223 0x0304 //RX_FDEQ_BIN_3 +224 0x0404 //RX_FDEQ_BIN_4 +225 0x0204 //RX_FDEQ_BIN_5 +226 0x0A0A //RX_FDEQ_BIN_6 +227 0x0A0A //RX_FDEQ_BIN_7 +228 0x0B0C //RX_FDEQ_BIN_8 +229 0x0D0E //RX_FDEQ_BIN_9 +230 0x0E0F //RX_FDEQ_BIN_10 +231 0x0F10 //RX_FDEQ_BIN_11 +232 0x1011 //RX_FDEQ_BIN_12 +233 0x1104 //RX_FDEQ_BIN_13 +234 0x0000 //RX_FDEQ_BIN_14 +235 0x0000 //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x4000 //RX_FDEQ_RESRV_0 +245 0x0320 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0035 //RX_FDDRC_BAND_MARGIN_1 +248 0x00D5 //RX_FDDRC_BAND_MARGIN_2 +249 0x0120 //RX_FDDRC_BAND_MARGIN_3 +250 0x0004 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x2000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x2000 //RX_FDDRC_THRD_3_2 +258 0x5000 //RX_FDDRC_THRD_3_3 +259 0x4000 //RX_FDDRC_SLANT_0_0 +260 0x4000 //RX_FDDRC_SLANT_0_1 +261 0x4000 //RX_FDDRC_SLANT_0_2 +262 0x4000 //RX_FDDRC_SLANT_0_3 +263 0x7FFF //RX_FDDRC_SLANT_1_0 +264 0x7FFF //RX_FDDRC_SLANT_1_1 +265 0x7FFF //RX_FDDRC_SLANT_1_2 +266 0x7FFF //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +268 0x0002 //RX_FILTINDX +269 0x0002 //RX_TDDRC_THRD_0 +270 0x0004 //RX_TDDRC_THRD_1 +271 0x1C00 //RX_TDDRC_THRD_2 +272 0x1C00 //RX_TDDRC_THRD_3 +273 0x7FFF //RX_TDDRC_SLANT_0 +274 0x7FFF //RX_TDDRC_SLANT_1 +275 0x6000 //RX_TDDRC_ALPHA_UP_0 +276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x199A //RX_TDDRC_HMNC_GAIN +279 0x0001 //RX_TDDRC_SMT_FLAG +280 0x0CCD //RX_TDDRC_SMT_W +281 0x0715 //RX_TDDRC_DRC_GAIN +282 0x7C00 //RX_LAMBDA_PKA_FP +283 0x2000 //RX_TPKA_FP +284 0x2000 //RX_MIN_G_FP +285 0x0080 //RX_MAX_G_FP +286 0x0011 //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 +288 0x0000 //RX_MAXLEVEL_CNG +289 0x3000 //RX_BWE_UV_TH +290 0x3000 //RX_BWE_UV_TH2 +291 0x1800 //RX_BWE_UV_TH3 +292 0x1000 //RX_BWE_V_TH +293 0x04CD //RX_BWE_GAIN1_V_TH1 +294 0x0F33 //RX_BWE_GAIN1_V_TH2 +295 0x7333 //RX_BWE_UV_EQ +296 0x199A //RX_BWE_V_EQ +297 0x7333 //RX_BWE_TONE_TH +298 0x0004 //RX_BWE_UV_HOLD_T +299 0x6CCD //RX_BWE_GAIN2_ALPHA +300 0x799A //RX_BWE_GAIN3_ALPHA +301 0x001E //RX_BWE_CUTOFF +302 0x3000 //RX_BWE_GAINFILL +303 0x3200 //RX_BWE_MAXTH_TONE +304 0x2000 //RX_BWE_EQ_0 +305 0x2000 //RX_BWE_EQ_1 +306 0x2000 //RX_BWE_EQ_2 +307 0x2000 //RX_BWE_EQ_3 +308 0x2000 //RX_BWE_EQ_4 +309 0x2000 //RX_BWE_EQ_5 +310 0x2000 //RX_BWE_EQ_6 +311 0x0000 //RX_BWE_RESRV_0 +312 0x0000 //RX_BWE_RESRV_1 +313 0x0000 //RX_BWE_RESRV_2 +#VOL 0 +163 0x6000 //RX_TDDRC_ALPHA_UP_1 +164 0x6000 //RX_TDDRC_ALPHA_UP_2 +165 0x6000 //RX_TDDRC_ALPHA_UP_3 +166 0x1000 //RX_TDDRC_ALPHA_UP_4 +184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +190 0x7214 //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +269 0x0002 //RX_TDDRC_THRD_0 +270 0x0004 //RX_TDDRC_THRD_1 +271 0x1C00 //RX_TDDRC_THRD_2 +272 0x1C00 //RX_TDDRC_THRD_3 +273 0x7FFF //RX_TDDRC_SLANT_0 +274 0x7FFF //RX_TDDRC_SLANT_1 +275 0x6000 //RX_TDDRC_ALPHA_UP_0 +276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x199A //RX_TDDRC_HMNC_GAIN +279 0x0001 //RX_TDDRC_SMT_FLAG +280 0x0CCD //RX_TDDRC_SMT_W +281 0x0715 //RX_TDDRC_DRC_GAIN +195 0x001C //RX_FDEQ_SUBNUM +196 0x6868 //RX_FDEQ_GAIN_0 +197 0x6858 //RX_FDEQ_GAIN_1 +198 0x5858 //RX_FDEQ_GAIN_2 +199 0x5858 //RX_FDEQ_GAIN_3 +200 0x5C5C //RX_FDEQ_GAIN_4 +201 0x5C54 //RX_FDEQ_GAIN_5 +202 0x544C //RX_FDEQ_GAIN_6 +203 0x4A48 //RX_FDEQ_GAIN_7 +204 0x4860 //RX_FDEQ_GAIN_8 +205 0x6068 //RX_FDEQ_GAIN_9 +206 0x6C6C //RX_FDEQ_GAIN_10 +207 0x6C68 //RX_FDEQ_GAIN_11 +208 0x5A5A //RX_FDEQ_GAIN_12 +209 0x5A5C //RX_FDEQ_GAIN_13 +210 0x4848 //RX_FDEQ_GAIN_14 +211 0x4848 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0202 //RX_FDEQ_BIN_0 +221 0x0203 //RX_FDEQ_BIN_1 +222 0x0303 //RX_FDEQ_BIN_2 +223 0x0304 //RX_FDEQ_BIN_3 +224 0x0404 //RX_FDEQ_BIN_4 +225 0x0204 //RX_FDEQ_BIN_5 +226 0x0A0A //RX_FDEQ_BIN_6 +227 0x0A0A //RX_FDEQ_BIN_7 +228 0x0B0C //RX_FDEQ_BIN_8 +229 0x0D0E //RX_FDEQ_BIN_9 +230 0x0E0F //RX_FDEQ_BIN_10 +231 0x0F10 //RX_FDEQ_BIN_11 +232 0x1011 //RX_FDEQ_BIN_12 +233 0x1104 //RX_FDEQ_BIN_13 +234 0x0000 //RX_FDEQ_BIN_14 +235 0x0000 //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x4000 //RX_FDEQ_RESRV_0 +245 0x0320 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0035 //RX_FDDRC_BAND_MARGIN_1 +248 0x00D5 //RX_FDDRC_BAND_MARGIN_2 +249 0x0120 //RX_FDDRC_BAND_MARGIN_3 +250 0x0004 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x2000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x2000 //RX_FDDRC_THRD_3_2 +258 0x5000 //RX_FDDRC_THRD_3_3 +259 0x4000 //RX_FDDRC_SLANT_0_0 +260 0x4000 //RX_FDDRC_SLANT_0_1 +261 0x4000 //RX_FDDRC_SLANT_0_2 +262 0x4000 //RX_FDDRC_SLANT_0_3 +263 0x7FFF //RX_FDDRC_SLANT_1_0 +264 0x7FFF //RX_FDDRC_SLANT_1_1 +265 0x7FFF //RX_FDDRC_SLANT_1_2 +266 0x7FFF //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +286 0x0011 //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 +#VOL 1 +163 0x6000 //RX_TDDRC_ALPHA_UP_1 +164 0x6000 //RX_TDDRC_ALPHA_UP_2 +165 0x6000 //RX_TDDRC_ALPHA_UP_3 +166 0x1000 //RX_TDDRC_ALPHA_UP_4 +184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +190 0x7214 //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +269 0x0002 //RX_TDDRC_THRD_0 +270 0x0004 //RX_TDDRC_THRD_1 +271 0x1C00 //RX_TDDRC_THRD_2 +272 0x1C00 //RX_TDDRC_THRD_3 +273 0x7FFF //RX_TDDRC_SLANT_0 +274 0x7FFF //RX_TDDRC_SLANT_1 +275 0x6000 //RX_TDDRC_ALPHA_UP_0 +276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x199A //RX_TDDRC_HMNC_GAIN +279 0x0001 //RX_TDDRC_SMT_FLAG +280 0x0CCD //RX_TDDRC_SMT_W +281 0x0715 //RX_TDDRC_DRC_GAIN +195 0x001C //RX_FDEQ_SUBNUM +196 0x6868 //RX_FDEQ_GAIN_0 +197 0x6858 //RX_FDEQ_GAIN_1 +198 0x5858 //RX_FDEQ_GAIN_2 +199 0x5858 //RX_FDEQ_GAIN_3 +200 0x5C5C //RX_FDEQ_GAIN_4 +201 0x5C54 //RX_FDEQ_GAIN_5 +202 0x544C //RX_FDEQ_GAIN_6 +203 0x4A48 //RX_FDEQ_GAIN_7 +204 0x4860 //RX_FDEQ_GAIN_8 +205 0x6068 //RX_FDEQ_GAIN_9 +206 0x6C6C //RX_FDEQ_GAIN_10 +207 0x6C68 //RX_FDEQ_GAIN_11 +208 0x5A5A //RX_FDEQ_GAIN_12 +209 0x5A5C //RX_FDEQ_GAIN_13 +210 0x4848 //RX_FDEQ_GAIN_14 +211 0x4848 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0202 //RX_FDEQ_BIN_0 +221 0x0203 //RX_FDEQ_BIN_1 +222 0x0303 //RX_FDEQ_BIN_2 +223 0x0304 //RX_FDEQ_BIN_3 +224 0x0404 //RX_FDEQ_BIN_4 +225 0x0204 //RX_FDEQ_BIN_5 +226 0x0A0A //RX_FDEQ_BIN_6 +227 0x0A0A //RX_FDEQ_BIN_7 +228 0x0B0C //RX_FDEQ_BIN_8 +229 0x0D0E //RX_FDEQ_BIN_9 +230 0x0E0F //RX_FDEQ_BIN_10 +231 0x0F10 //RX_FDEQ_BIN_11 +232 0x1011 //RX_FDEQ_BIN_12 +233 0x1104 //RX_FDEQ_BIN_13 +234 0x0000 //RX_FDEQ_BIN_14 +235 0x0000 //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x4000 //RX_FDEQ_RESRV_0 +245 0x0320 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0035 //RX_FDDRC_BAND_MARGIN_1 +248 0x00D5 //RX_FDDRC_BAND_MARGIN_2 +249 0x0120 //RX_FDDRC_BAND_MARGIN_3 +250 0x0004 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x2000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x2000 //RX_FDDRC_THRD_3_2 +258 0x5000 //RX_FDDRC_THRD_3_3 +259 0x4000 //RX_FDDRC_SLANT_0_0 +260 0x4000 //RX_FDDRC_SLANT_0_1 +261 0x4000 //RX_FDDRC_SLANT_0_2 +262 0x4000 //RX_FDDRC_SLANT_0_3 +263 0x7FFF //RX_FDDRC_SLANT_1_0 +264 0x7FFF //RX_FDDRC_SLANT_1_1 +265 0x7FFF //RX_FDDRC_SLANT_1_2 +266 0x7FFF //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +286 0x0019 //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 +#VOL 2 +163 0x6000 //RX_TDDRC_ALPHA_UP_1 +164 0x6000 //RX_TDDRC_ALPHA_UP_2 +165 0x6000 //RX_TDDRC_ALPHA_UP_3 +166 0x1000 //RX_TDDRC_ALPHA_UP_4 +184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +190 0x7214 //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +269 0x0002 //RX_TDDRC_THRD_0 +270 0x0004 //RX_TDDRC_THRD_1 +271 0x1C00 //RX_TDDRC_THRD_2 +272 0x1C00 //RX_TDDRC_THRD_3 +273 0x7FFF //RX_TDDRC_SLANT_0 +274 0x7FFF //RX_TDDRC_SLANT_1 +275 0x6000 //RX_TDDRC_ALPHA_UP_0 +276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x199A //RX_TDDRC_HMNC_GAIN +279 0x0001 //RX_TDDRC_SMT_FLAG +280 0x0CCD //RX_TDDRC_SMT_W +281 0x0715 //RX_TDDRC_DRC_GAIN +195 0x001C //RX_FDEQ_SUBNUM +196 0x6868 //RX_FDEQ_GAIN_0 +197 0x6858 //RX_FDEQ_GAIN_1 +198 0x5858 //RX_FDEQ_GAIN_2 +199 0x5858 //RX_FDEQ_GAIN_3 +200 0x5C5C //RX_FDEQ_GAIN_4 +201 0x5C54 //RX_FDEQ_GAIN_5 +202 0x544C //RX_FDEQ_GAIN_6 +203 0x4A48 //RX_FDEQ_GAIN_7 +204 0x4860 //RX_FDEQ_GAIN_8 +205 0x6068 //RX_FDEQ_GAIN_9 +206 0x6C6C //RX_FDEQ_GAIN_10 +207 0x6C68 //RX_FDEQ_GAIN_11 +208 0x5A5A //RX_FDEQ_GAIN_12 +209 0x5A5C //RX_FDEQ_GAIN_13 +210 0x4848 //RX_FDEQ_GAIN_14 +211 0x4848 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0202 //RX_FDEQ_BIN_0 +221 0x0203 //RX_FDEQ_BIN_1 +222 0x0303 //RX_FDEQ_BIN_2 +223 0x0304 //RX_FDEQ_BIN_3 +224 0x0404 //RX_FDEQ_BIN_4 +225 0x0204 //RX_FDEQ_BIN_5 +226 0x0A0A //RX_FDEQ_BIN_6 +227 0x0A0A //RX_FDEQ_BIN_7 +228 0x0B0C //RX_FDEQ_BIN_8 +229 0x0D0E //RX_FDEQ_BIN_9 +230 0x0E0F //RX_FDEQ_BIN_10 +231 0x0F10 //RX_FDEQ_BIN_11 +232 0x1011 //RX_FDEQ_BIN_12 +233 0x1104 //RX_FDEQ_BIN_13 +234 0x0000 //RX_FDEQ_BIN_14 +235 0x0000 //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x4000 //RX_FDEQ_RESRV_0 +245 0x0320 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0035 //RX_FDDRC_BAND_MARGIN_1 +248 0x00D5 //RX_FDDRC_BAND_MARGIN_2 +249 0x0120 //RX_FDDRC_BAND_MARGIN_3 +250 0x0004 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x2000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x2000 //RX_FDDRC_THRD_3_2 +258 0x5000 //RX_FDDRC_THRD_3_3 +259 0x4000 //RX_FDDRC_SLANT_0_0 +260 0x4000 //RX_FDDRC_SLANT_0_1 +261 0x4000 //RX_FDDRC_SLANT_0_2 +262 0x4000 //RX_FDDRC_SLANT_0_3 +263 0x7FFF //RX_FDDRC_SLANT_1_0 +264 0x7FFF //RX_FDDRC_SLANT_1_1 +265 0x7FFF //RX_FDDRC_SLANT_1_2 +266 0x7FFF //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +286 0x0024 //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 +#VOL 3 +163 0x6000 //RX_TDDRC_ALPHA_UP_1 +164 0x6000 //RX_TDDRC_ALPHA_UP_2 +165 0x6000 //RX_TDDRC_ALPHA_UP_3 +166 0x1000 //RX_TDDRC_ALPHA_UP_4 +184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +190 0x7214 //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +269 0x0002 //RX_TDDRC_THRD_0 +270 0x0004 //RX_TDDRC_THRD_1 +271 0x1C00 //RX_TDDRC_THRD_2 +272 0x1C00 //RX_TDDRC_THRD_3 +273 0x7FFF //RX_TDDRC_SLANT_0 +274 0x7FFF //RX_TDDRC_SLANT_1 +275 0x6000 //RX_TDDRC_ALPHA_UP_0 +276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x199A //RX_TDDRC_HMNC_GAIN +279 0x0001 //RX_TDDRC_SMT_FLAG +280 0x0CCD //RX_TDDRC_SMT_W +281 0x0715 //RX_TDDRC_DRC_GAIN +195 0x001C //RX_FDEQ_SUBNUM +196 0x6868 //RX_FDEQ_GAIN_0 +197 0x6858 //RX_FDEQ_GAIN_1 +198 0x5858 //RX_FDEQ_GAIN_2 +199 0x5858 //RX_FDEQ_GAIN_3 +200 0x5C5C //RX_FDEQ_GAIN_4 +201 0x5C54 //RX_FDEQ_GAIN_5 +202 0x544C //RX_FDEQ_GAIN_6 +203 0x4A48 //RX_FDEQ_GAIN_7 +204 0x4860 //RX_FDEQ_GAIN_8 +205 0x6068 //RX_FDEQ_GAIN_9 +206 0x6C6C //RX_FDEQ_GAIN_10 +207 0x6C68 //RX_FDEQ_GAIN_11 +208 0x5A5A //RX_FDEQ_GAIN_12 +209 0x5A5C //RX_FDEQ_GAIN_13 +210 0x4848 //RX_FDEQ_GAIN_14 +211 0x4848 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0202 //RX_FDEQ_BIN_0 +221 0x0203 //RX_FDEQ_BIN_1 +222 0x0303 //RX_FDEQ_BIN_2 +223 0x0304 //RX_FDEQ_BIN_3 +224 0x0404 //RX_FDEQ_BIN_4 +225 0x0204 //RX_FDEQ_BIN_5 +226 0x0A0A //RX_FDEQ_BIN_6 +227 0x0A0A //RX_FDEQ_BIN_7 +228 0x0B0C //RX_FDEQ_BIN_8 +229 0x0D0E //RX_FDEQ_BIN_9 +230 0x0E0F //RX_FDEQ_BIN_10 +231 0x0F10 //RX_FDEQ_BIN_11 +232 0x1011 //RX_FDEQ_BIN_12 +233 0x1104 //RX_FDEQ_BIN_13 +234 0x0000 //RX_FDEQ_BIN_14 +235 0x0000 //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x4000 //RX_FDEQ_RESRV_0 +245 0x0320 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0035 //RX_FDDRC_BAND_MARGIN_1 +248 0x00D5 //RX_FDDRC_BAND_MARGIN_2 +249 0x0120 //RX_FDDRC_BAND_MARGIN_3 +250 0x0004 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x2000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x2000 //RX_FDDRC_THRD_3_2 +258 0x5000 //RX_FDDRC_THRD_3_3 +259 0x4000 //RX_FDDRC_SLANT_0_0 +260 0x4000 //RX_FDDRC_SLANT_0_1 +261 0x4000 //RX_FDDRC_SLANT_0_2 +262 0x4000 //RX_FDDRC_SLANT_0_3 +263 0x7FFF //RX_FDDRC_SLANT_1_0 +264 0x7FFF //RX_FDDRC_SLANT_1_1 +265 0x7FFF //RX_FDDRC_SLANT_1_2 +266 0x7FFF //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +286 0x0033 //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 +#VOL 4 +163 0x6000 //RX_TDDRC_ALPHA_UP_1 +164 0x6000 //RX_TDDRC_ALPHA_UP_2 +165 0x6000 //RX_TDDRC_ALPHA_UP_3 +166 0x1000 //RX_TDDRC_ALPHA_UP_4 +184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +190 0x7214 //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +269 0x0002 //RX_TDDRC_THRD_0 +270 0x0004 //RX_TDDRC_THRD_1 +271 0x1C00 //RX_TDDRC_THRD_2 +272 0x1C00 //RX_TDDRC_THRD_3 +273 0x7FFF //RX_TDDRC_SLANT_0 +274 0x7FFF //RX_TDDRC_SLANT_1 +275 0x6000 //RX_TDDRC_ALPHA_UP_0 +276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x199A //RX_TDDRC_HMNC_GAIN +279 0x0001 //RX_TDDRC_SMT_FLAG +280 0x0CCD //RX_TDDRC_SMT_W +281 0x0715 //RX_TDDRC_DRC_GAIN +195 0x001C //RX_FDEQ_SUBNUM +196 0x6868 //RX_FDEQ_GAIN_0 +197 0x6858 //RX_FDEQ_GAIN_1 +198 0x5858 //RX_FDEQ_GAIN_2 +199 0x5858 //RX_FDEQ_GAIN_3 +200 0x5C5C //RX_FDEQ_GAIN_4 +201 0x8854 //RX_FDEQ_GAIN_5 +202 0x5448 //RX_FDEQ_GAIN_6 +203 0x4848 //RX_FDEQ_GAIN_7 +204 0x4860 //RX_FDEQ_GAIN_8 +205 0x6068 //RX_FDEQ_GAIN_9 +206 0x7070 //RX_FDEQ_GAIN_10 +207 0x8070 //RX_FDEQ_GAIN_11 +208 0x6060 //RX_FDEQ_GAIN_12 +209 0x7070 //RX_FDEQ_GAIN_13 +210 0x4848 //RX_FDEQ_GAIN_14 +211 0x4848 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0202 //RX_FDEQ_BIN_0 +221 0x0203 //RX_FDEQ_BIN_1 +222 0x0303 //RX_FDEQ_BIN_2 +223 0x0304 //RX_FDEQ_BIN_3 +224 0x0404 //RX_FDEQ_BIN_4 +225 0x0204 //RX_FDEQ_BIN_5 +226 0x0A0A //RX_FDEQ_BIN_6 +227 0x0A0A //RX_FDEQ_BIN_7 +228 0x0B0C //RX_FDEQ_BIN_8 +229 0x0D0E //RX_FDEQ_BIN_9 +230 0x0E0F //RX_FDEQ_BIN_10 +231 0x0F10 //RX_FDEQ_BIN_11 +232 0x1011 //RX_FDEQ_BIN_12 +233 0x1104 //RX_FDEQ_BIN_13 +234 0x0000 //RX_FDEQ_BIN_14 +235 0x0000 //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x4000 //RX_FDEQ_RESRV_0 +245 0x0320 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0035 //RX_FDDRC_BAND_MARGIN_1 +248 0x00D5 //RX_FDDRC_BAND_MARGIN_2 +249 0x0120 //RX_FDDRC_BAND_MARGIN_3 +250 0x0004 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x2000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x2000 //RX_FDDRC_THRD_3_2 +258 0x5000 //RX_FDDRC_THRD_3_3 +259 0x4000 //RX_FDDRC_SLANT_0_0 +260 0x4000 //RX_FDDRC_SLANT_0_1 +261 0x4000 //RX_FDDRC_SLANT_0_2 +262 0x4000 //RX_FDDRC_SLANT_0_3 +263 0x7FFF //RX_FDDRC_SLANT_1_0 +264 0x7FFF //RX_FDDRC_SLANT_1_1 +265 0x7FFF //RX_FDDRC_SLANT_1_2 +266 0x7FFF //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +286 0x0049 //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 +#VOL 5 +163 0x6000 //RX_TDDRC_ALPHA_UP_1 +164 0x6000 //RX_TDDRC_ALPHA_UP_2 +165 0x6000 //RX_TDDRC_ALPHA_UP_3 +166 0x1000 //RX_TDDRC_ALPHA_UP_4 +184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +190 0x7214 //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +269 0x0002 //RX_TDDRC_THRD_0 +270 0x0004 //RX_TDDRC_THRD_1 +271 0x1C00 //RX_TDDRC_THRD_2 +272 0x1C00 //RX_TDDRC_THRD_3 +273 0x7FFF //RX_TDDRC_SLANT_0 +274 0x7FFF //RX_TDDRC_SLANT_1 +275 0x6000 //RX_TDDRC_ALPHA_UP_0 +276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x199A //RX_TDDRC_HMNC_GAIN +279 0x0001 //RX_TDDRC_SMT_FLAG +280 0x0CCD //RX_TDDRC_SMT_W +281 0x0715 //RX_TDDRC_DRC_GAIN +195 0x001C //RX_FDEQ_SUBNUM +196 0x6868 //RX_FDEQ_GAIN_0 +197 0x6858 //RX_FDEQ_GAIN_1 +198 0x5858 //RX_FDEQ_GAIN_2 +199 0x5858 //RX_FDEQ_GAIN_3 +200 0x5C5C //RX_FDEQ_GAIN_4 +201 0x8854 //RX_FDEQ_GAIN_5 +202 0x5448 //RX_FDEQ_GAIN_6 +203 0x4848 //RX_FDEQ_GAIN_7 +204 0x4860 //RX_FDEQ_GAIN_8 +205 0x6068 //RX_FDEQ_GAIN_9 +206 0x7070 //RX_FDEQ_GAIN_10 +207 0x8070 //RX_FDEQ_GAIN_11 +208 0x6060 //RX_FDEQ_GAIN_12 +209 0x7070 //RX_FDEQ_GAIN_13 +210 0x4848 //RX_FDEQ_GAIN_14 +211 0x4848 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0202 //RX_FDEQ_BIN_0 +221 0x0203 //RX_FDEQ_BIN_1 +222 0x0303 //RX_FDEQ_BIN_2 +223 0x0304 //RX_FDEQ_BIN_3 +224 0x0404 //RX_FDEQ_BIN_4 +225 0x0204 //RX_FDEQ_BIN_5 +226 0x0A0A //RX_FDEQ_BIN_6 +227 0x0A0A //RX_FDEQ_BIN_7 +228 0x0B0C //RX_FDEQ_BIN_8 +229 0x0D0E //RX_FDEQ_BIN_9 +230 0x0E0F //RX_FDEQ_BIN_10 +231 0x0F10 //RX_FDEQ_BIN_11 +232 0x1011 //RX_FDEQ_BIN_12 +233 0x1104 //RX_FDEQ_BIN_13 +234 0x0000 //RX_FDEQ_BIN_14 +235 0x0000 //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x4000 //RX_FDEQ_RESRV_0 +245 0x0320 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0035 //RX_FDDRC_BAND_MARGIN_1 +248 0x00D5 //RX_FDDRC_BAND_MARGIN_2 +249 0x0120 //RX_FDDRC_BAND_MARGIN_3 +250 0x0004 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x2000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x2000 //RX_FDDRC_THRD_3_2 +258 0x5000 //RX_FDDRC_THRD_3_3 +259 0x4000 //RX_FDDRC_SLANT_0_0 +260 0x4000 //RX_FDDRC_SLANT_0_1 +261 0x4000 //RX_FDDRC_SLANT_0_2 +262 0x4000 //RX_FDDRC_SLANT_0_3 +263 0x7FFF //RX_FDDRC_SLANT_1_0 +264 0x7FFF //RX_FDDRC_SLANT_1_1 +265 0x7FFF //RX_FDDRC_SLANT_1_2 +266 0x7FFF //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +286 0x0074 //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 +#VOL 6 +163 0x6000 //RX_TDDRC_ALPHA_UP_1 +164 0x6000 //RX_TDDRC_ALPHA_UP_2 +165 0x6000 //RX_TDDRC_ALPHA_UP_3 +166 0x1000 //RX_TDDRC_ALPHA_UP_4 +184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +190 0x7214 //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +269 0x0002 //RX_TDDRC_THRD_0 +270 0x0004 //RX_TDDRC_THRD_1 +271 0x1C00 //RX_TDDRC_THRD_2 +272 0x1C00 //RX_TDDRC_THRD_3 +273 0x7FFF //RX_TDDRC_SLANT_0 +274 0x7FFF //RX_TDDRC_SLANT_1 +275 0x6000 //RX_TDDRC_ALPHA_UP_0 +276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x199A //RX_TDDRC_HMNC_GAIN +279 0x0001 //RX_TDDRC_SMT_FLAG +280 0x0CCD //RX_TDDRC_SMT_W +281 0x0715 //RX_TDDRC_DRC_GAIN +195 0x001C //RX_FDEQ_SUBNUM +196 0x6868 //RX_FDEQ_GAIN_0 +197 0x6864 //RX_FDEQ_GAIN_1 +198 0x7070 //RX_FDEQ_GAIN_2 +199 0x6058 //RX_FDEQ_GAIN_3 +200 0x5C5C //RX_FDEQ_GAIN_4 +201 0x8854 //RX_FDEQ_GAIN_5 +202 0x5448 //RX_FDEQ_GAIN_6 +203 0x4848 //RX_FDEQ_GAIN_7 +204 0x4860 //RX_FDEQ_GAIN_8 +205 0x6068 //RX_FDEQ_GAIN_9 +206 0x7070 //RX_FDEQ_GAIN_10 +207 0x8070 //RX_FDEQ_GAIN_11 +208 0x6060 //RX_FDEQ_GAIN_12 +209 0x7070 //RX_FDEQ_GAIN_13 +210 0x4848 //RX_FDEQ_GAIN_14 +211 0x4848 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0202 //RX_FDEQ_BIN_0 +221 0x0203 //RX_FDEQ_BIN_1 +222 0x0303 //RX_FDEQ_BIN_2 +223 0x0304 //RX_FDEQ_BIN_3 +224 0x0404 //RX_FDEQ_BIN_4 +225 0x0204 //RX_FDEQ_BIN_5 +226 0x0A0A //RX_FDEQ_BIN_6 +227 0x0A0A //RX_FDEQ_BIN_7 +228 0x0B0C //RX_FDEQ_BIN_8 +229 0x0D0E //RX_FDEQ_BIN_9 +230 0x0E0F //RX_FDEQ_BIN_10 +231 0x0F10 //RX_FDEQ_BIN_11 +232 0x1011 //RX_FDEQ_BIN_12 +233 0x1104 //RX_FDEQ_BIN_13 +234 0x0000 //RX_FDEQ_BIN_14 +235 0x0000 //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x4000 //RX_FDEQ_RESRV_0 +245 0x0320 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0035 //RX_FDDRC_BAND_MARGIN_1 +248 0x00D5 //RX_FDDRC_BAND_MARGIN_2 +249 0x0120 //RX_FDDRC_BAND_MARGIN_3 +250 0x0004 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x2000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x2000 //RX_FDDRC_THRD_3_2 +258 0x5000 //RX_FDDRC_THRD_3_3 +259 0x4000 //RX_FDDRC_SLANT_0_0 +260 0x4000 //RX_FDDRC_SLANT_0_1 +261 0x4000 //RX_FDDRC_SLANT_0_2 +262 0x4000 //RX_FDDRC_SLANT_0_3 +263 0x7FFF //RX_FDDRC_SLANT_1_0 +264 0x7FFF //RX_FDDRC_SLANT_1_1 +265 0x7FFF //RX_FDDRC_SLANT_1_2 +266 0x7FFF //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +286 0x0100 //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 -#CASE_NAME HANDSFREE-HANDSFREE-VOICE_GENERIC-SWB -#PARAM_TYPE TX+RX -#TOTAL_CUSTOM_STEP 7 +#CASE_NAME HANDSFREE-HANDFREE-VOICE_GENERIC-SWB +#PARAM_MODE FULL +#PARAM_TYPE TX+2RX +#TOTAL_CUSTOM_STEP 7+7 #TX 0 0x0001 //TX_OPERATION_MODE_0 1 0x0001 //TX_OPERATION_MODE_1 -2 0x0033 //TX_PATCH_REG +2 0x0073 //TX_PATCH_REG 3 0x2F7C //TX_SENDFUNC_MODE_0 4 0x0001 //TX_SENDFUNC_MODE_1 5 0x0003 //TX_NUM_MIC @@ -8998,10 +13584,10 @@ 223 0x0BB8 //TX_RATIO_DT_L_TH_LOW 224 0x3A98 //TX_RATIO_DT_H_TH_LOW 225 0x1F40 //TX_RATIO_DT_L_TH_HIGH -226 0x6590 //TX_RATIO_DT_H_TH_HIGH +226 0x5014 //TX_RATIO_DT_H_TH_HIGH 227 0x09C4 //TX_RATIO_DT_L0_TH -228 0x2000 //TX_B_POST_FILT_ECHO_L -229 0x1000 //TX_B_POST_FILT_ECHO_H +228 0x7FFF //TX_B_POST_FILT_ECHO_L +229 0x7FFF //TX_B_POST_FILT_ECHO_H 230 0x0200 //TX_MIN_G_CTRL_ECHO 231 0x1000 //TX_B_LESSCUT_RTO_ECHO 232 0x0000 //TX_EPD_OFFSET_00 @@ -9025,10 +13611,10 @@ 250 0x0100 //TX_DELTA_THR_SN_EST_0 251 0x0100 //TX_DELTA_THR_SN_EST_1 252 0x0100 //TX_DELTA_THR_SN_EST_2 -253 0x0100 //TX_DELTA_THR_SN_EST_3 -254 0x0000 //TX_DELTA_THR_SN_EST_4 -255 0x0100 //TX_DELTA_THR_SN_EST_5 -256 0x0200 //TX_DELTA_THR_SN_EST_6 +253 0x0000 //TX_DELTA_THR_SN_EST_3 +254 0x0100 //TX_DELTA_THR_SN_EST_4 +255 0x0200 //TX_DELTA_THR_SN_EST_5 +256 0x0100 //TX_DELTA_THR_SN_EST_6 257 0x0200 //TX_DELTA_THR_SN_EST_7 258 0x4000 //TX_LAMBDA_NN_EST_0 259 0x4000 //TX_LAMBDA_NN_EST_1 @@ -9055,51 +13641,51 @@ 280 0x1000 //TX_B_POST_FLT_1 281 0x0010 //TX_NS_LVL_CTRL_0 282 0x003C //TX_NS_LVL_CTRL_1 -283 0x003C //TX_NS_LVL_CTRL_2 -284 0x0024 //TX_NS_LVL_CTRL_3 -285 0x003C //TX_NS_LVL_CTRL_4 -286 0x0014 //TX_NS_LVL_CTRL_5 -287 0x0011 //TX_NS_LVL_CTRL_6 +283 0x0024 //TX_NS_LVL_CTRL_2 +284 0x003C //TX_NS_LVL_CTRL_3 +285 0x0014 //TX_NS_LVL_CTRL_4 +286 0x0011 //TX_NS_LVL_CTRL_5 +287 0x003C //TX_NS_LVL_CTRL_6 288 0x0011 //TX_NS_LVL_CTRL_7 -289 0x000F //TX_MIN_GAIN_S_0 -290 0x0010 //TX_MIN_GAIN_S_1 -291 0x0010 //TX_MIN_GAIN_S_2 -292 0x0010 //TX_MIN_GAIN_S_3 -293 0x0010 //TX_MIN_GAIN_S_4 -294 0x0010 //TX_MIN_GAIN_S_5 -295 0x0010 //TX_MIN_GAIN_S_6 -296 0x000F //TX_MIN_GAIN_S_7 +289 0x0020 //TX_MIN_GAIN_S_0 +290 0x0020 //TX_MIN_GAIN_S_1 +291 0x0020 //TX_MIN_GAIN_S_2 +292 0x0020 //TX_MIN_GAIN_S_3 +293 0x0020 //TX_MIN_GAIN_S_4 +294 0x0020 //TX_MIN_GAIN_S_5 +295 0x0020 //TX_MIN_GAIN_S_6 +296 0x0020 //TX_MIN_GAIN_S_7 297 0x6000 //TX_NMOS_SUP 298 0x0000 //TX_NS_MAX_PRI_SNR_TH 299 0x0000 //TX_NMOS_SUP_MENSA 300 0x7FFF //TX_SNRI_SUP_0 -301 0x1400 //TX_SNRI_SUP_1 -302 0x1400 //TX_SNRI_SUP_2 -303 0x1400 //TX_SNRI_SUP_3 +301 0x4000 //TX_SNRI_SUP_1 +302 0x4000 //TX_SNRI_SUP_2 +303 0x4000 //TX_SNRI_SUP_3 304 0x4000 //TX_SNRI_SUP_4 305 0x4000 //TX_SNRI_SUP_5 -306 0x50C0 //TX_SNRI_SUP_6 -307 0x7FFF //TX_SNRI_SUP_7 +306 0x4000 //TX_SNRI_SUP_6 +307 0x4000 //TX_SNRI_SUP_7 308 0x7FFF //TX_THR_LFNS 309 0x0018 //TX_G_LFNS 310 0x09C4 //TX_GAIN0_NTH 311 0x000A //TX_MUSIC_MORENS 312 0x7FFF //TX_A_POST_FILT_0 313 0x2000 //TX_A_POST_FILT_1 -314 0x5000 //TX_A_POST_FILT_S_0 -315 0x7C00 //TX_A_POST_FILT_S_1 -316 0x4C00 //TX_A_POST_FILT_S_2 -317 0x4000 //TX_A_POST_FILT_S_3 -318 0x6000 //TX_A_POST_FILT_S_4 -319 0x4000 //TX_A_POST_FILT_S_5 -320 0x5000 //TX_A_POST_FILT_S_6 -321 0x7000 //TX_A_POST_FILT_S_7 +314 0x7FFF //TX_A_POST_FILT_S_0 +315 0x7FFF //TX_A_POST_FILT_S_1 +316 0x7FFF //TX_A_POST_FILT_S_2 +317 0x7FFF //TX_A_POST_FILT_S_3 +318 0x7FFF //TX_A_POST_FILT_S_4 +319 0x7FFF //TX_A_POST_FILT_S_5 +320 0x7FFF //TX_A_POST_FILT_S_6 +321 0x7FFF //TX_A_POST_FILT_S_7 322 0x2000 //TX_B_POST_FILT_0 -323 0x1000 //TX_B_POST_FILT_1 +323 0x6000 //TX_B_POST_FILT_1 324 0x6000 //TX_B_POST_FILT_2 325 0x6000 //TX_B_POST_FILT_3 -326 0x6000 //TX_B_POST_FILT_4 -327 0x4000 //TX_B_POST_FILT_5 +326 0x4000 //TX_B_POST_FILT_4 +327 0x1000 //TX_B_POST_FILT_5 328 0x1000 //TX_B_POST_FILT_6 329 0x2000 //TX_B_POST_FILT_7 330 0x4000 //TX_B_LESSCUT_RTO_S_0 @@ -9107,18 +13693,18 @@ 332 0x7FFF //TX_B_LESSCUT_RTO_S_2 333 0x7FFF //TX_B_LESSCUT_RTO_S_3 334 0x7FFF //TX_B_LESSCUT_RTO_S_4 -335 0x7FFF //TX_B_LESSCUT_RTO_S_5 -336 0x6000 //TX_B_LESSCUT_RTO_S_6 +335 0x6000 //TX_B_LESSCUT_RTO_S_5 +336 0x7FFF //TX_B_LESSCUT_RTO_S_6 337 0x7FFF //TX_B_LESSCUT_RTO_S_7 -338 0x7C00 //TX_LAMBDA_PFILT -339 0x7D00 //TX_LAMBDA_PFILT_S_0 -340 0x7D00 //TX_LAMBDA_PFILT_S_1 -341 0x7D00 //TX_LAMBDA_PFILT_S_2 -342 0x7D00 //TX_LAMBDA_PFILT_S_3 -343 0x7D00 //TX_LAMBDA_PFILT_S_4 -344 0x7D00 //TX_LAMBDA_PFILT_S_5 -345 0x7D00 //TX_LAMBDA_PFILT_S_6 -346 0x7D00 //TX_LAMBDA_PFILT_S_7 +338 0x7F00 //TX_LAMBDA_PFILT +339 0x7F00 //TX_LAMBDA_PFILT_S_0 +340 0x7F00 //TX_LAMBDA_PFILT_S_1 +341 0x7F00 //TX_LAMBDA_PFILT_S_2 +342 0x7F00 //TX_LAMBDA_PFILT_S_3 +343 0x7F00 //TX_LAMBDA_PFILT_S_4 +344 0x7F00 //TX_LAMBDA_PFILT_S_5 +345 0x7F00 //TX_LAMBDA_PFILT_S_6 +346 0x7F00 //TX_LAMBDA_PFILT_S_7 347 0x0200 //TX_K_PEPPER 348 0x0400 //TX_A_PEPPER 349 0x1EAA //TX_K_PEPPER_HF @@ -9152,10 +13738,10 @@ 377 0x7FFF //TX_NOISE_TH_5_4 378 0x0DAC //TX_NOISE_TH_6 379 0x0050 //TX_MINENOISE_TH -380 0x4000 //TX_MINENOISE_MIC0_TH_MTS -381 0xFFEE //TX_MINENOISE_MIC0_TH_EXP -382 0x6000 //TX_MINENOISE_MIC0_S_TH_MTS -383 0xFFF3 //TX_MINENOISE_MIC0_S_TH_EXP +380 0xD508 //TX_MORENS_TFMASK_TH +381 0x0001 //TX_DRC_QUIET_FLOOR +382 0x3A98 //TX_RATIODTL_CUT_TH +383 0x07D0 //TX_DT_CUT_K1 384 0x0666 //TX_OUT_ENER_S_TH_CLEAN 385 0x0666 //TX_OUT_ENER_S_TH_LESSCLEAN 386 0x0333 //TX_OUT_ENER_S_TH_NOISY @@ -9163,15 +13749,15 @@ 388 0x0333 //TX_OUT_ENER_TH_SPEECH 389 0x2000 //TX_SN_NPB_GAIN 390 0x0000 //TX_NN_NPB_GAIN -391 0x0000 //TX_CSX_ALPHA_0 -392 0x0000 //TX_CSX_ALPHA_1 -393 0x0000 //TX_CSX_ALPHA_2 -394 0x0000 //TX_CSX_ALPHA_3 -395 0x0800 //TX_MU_ARSP_EST -396 0x00C8 //TX_P_OUTBEAM_MIN_TH +391 0x7FFF //TX_POST_MASK_SUP_HSNE +392 0x1388 //TX_TAIL_DET_TH +393 0x4000 //TX_B_LESSCUT_RTO_WTA +394 0x0000 //TX_MEL_G_R +395 0x0080 //TX_SUPHIGH_TH +396 0x0000 //TX_MASK_G_R 397 0x0002 //TX_EXTRA_NS_L -398 0x0800 //TX_EXTRA_NS_A -399 0x0005 //TX_VR_NOISE_FLOOR_TH +398 0x1800 //TX_C_POST_FLT_MASK +399 0x7FFF //TX_A_POST_FLT_WNS 400 0x0148 //TX_MIN_G_LOW300HZ 401 0x0001 //TX_MAXLEVEL_CNG 402 0x00B4 //TX_STN_NOISE_TH @@ -9281,21 +13867,21 @@ 506 0x2000 //TX_RADIODTLV 507 0x0320 //TX_POWER_LINEIN_TH 508 0x0014 //TX_FE_VADCOUNT_TH_FC -509 0x0000 //TX_ECHO_SUPP_FC +509 0x000A //TX_ECHO_SUPP_FC 510 0x0C80 //TX_ECHO_TH 511 0x6666 //TX_MIC_TO_BFGAIN 512 0x0000 //TX_MICTOBFGAIN0 513 0x0000 //TX_FASTMUE_TH -514 0x0000 //TX_DERVB_LEN_0 -515 0x0000 //TX_DERVB_LEN_1 -516 0x0000 //TX_RHO_DERVB -517 0x0000 //TX_MIC_INDX_DERVB -518 0x0000 //TX_MU_DERVB -519 0x0000 //TX_DR_RESRV_0 -520 0x0000 //TX_DR_RESRV_1 -521 0x0000 //TX_DR_RESRV_2 -522 0x0000 //TX_DR_RESRV_3 -523 0x0000 //TX_DR_RESRV_4 +514 0x3000 //TX_DEREVERB_LF_MU +515 0x34CD //TX_DEREVERB_HF_MU +516 0x0007 //TX_DEREVERB_DELAY +517 0x0004 //TX_DEREVERB_COEF_LEN +518 0x0003 //TX_DEREVERB_DNR +519 0x0000 //TX_DEREVERB_ALPHA +520 0x0000 //TX_DEREVERB_BETA +521 0x3A98 //TX_GSC_RTOL_TH +522 0x3A98 //TX_GSC_RTOH_TH +523 0x7E2C //TX_WIDE2_MEANHTH 524 0x0000 //TX_DR_RESRV_5 525 0x0000 //TX_DR_RESRV_6 526 0x0000 //TX_DR_RESRV_7 @@ -9669,8 +14255,73 @@ 894 0xC000 //TX_FASTNS_SSA_THHFL 895 0xCCCC //TX_FASTNS_SSA_THLFH 896 0xD999 //TX_FASTNS_SSA_THHFH +897 0x2339 //TX_SENDFUNC_REG_MICMUTE +898 0x0021 //TX_SENDFUNC_REG_MICMUTE1 +899 0x02BC //TX_MICMUTE_RATIO_THR +900 0x0140 //TX_MICMUTE_AMP_THR +901 0x0004 //TX_MICMUTE_HPF_IND +902 0x00C0 //TX_MICMUTE_LOG_EYR_TH +903 0x0008 //TX_MICMUTE_CVG_TIME +904 0x0008 //TX_MICMUTE_RELEASE_TIME +905 0x01FE //TX_MIC_VOLUME_MIC0MUTE +906 0x0020 //TX_MICMUTE_EPD_OFFSET_0 +907 0x001E //TX_MICMUTE_FRQ_AEC_L +908 0x7999 //TX_MICMUTE_EAD_THR +909 0x7FFF //TX_MICMUTE_LAMBDA_CB_NLE +910 0x7FFF //TX_MICMUTE_LAMBDA_RE_EST +911 0x4000 //TX_DTD_THR1_MICMUTE_0 +912 0x7000 //TX_DTD_THR1_MICMUTE_1 +913 0x7FFF //TX_DTD_THR1_MICMUTE_2 +914 0x7FFF //TX_DTD_THR1_MICMUTE_3 +915 0x6CCC //TX_DTD_THR2_MICMUTE_0 +916 0x0400 //TX_MICMUTE_MIN_EQ_RE_EST_0 +917 0x0400 //TX_MICMUTE_MIN_EQ_RE_EST_1 +918 0x1000 //TX_MICMUTE_MIN_EQ_RE_EST_2 +919 0x7FFF //TX_MICMUTE_MIN_EQ_RE_EST_3 +920 0x7FFF //TX_MICMUTE_MIN_EQ_RE_EST_4 +921 0x4000 //TX_MICMUTE_C_POST_FLT +922 0x03E8 //TX_MICMUTE_DT_CUT_K +923 0x0001 //TX_MICMUTE_DT_CUT_THR +924 0x03E8 //TX_MICMUTE_DT_CUT_K2 +925 0x0001 //TX_MICMUTE_DT_CUT_THR2 +926 0x0064 //TX_MICMUTE_DT2_HOLD_N +927 0x1000 //TX_MICMUTE_RATIODTH_THCUT +928 0x1000 //TX_MICMUTE_B_POST_FLT_ECHOL +929 0x7FFF //TX_MICMUTE_B_POST_FLT_ECHOH +930 0x0400 //TX_MICMUTE_C_POST_FLT_MASK +931 0x7999 //TX_MICMUTE_RATIODTL_CUT_TH +932 0x0258 //TX_MICMUTE_DT_CUT_K1 +933 0x0800 //TX_MICMUTE_N2_SN_EST +934 0xFC00 //TX_MICMUTE_THR_SN_EST_0 +935 0x001C //TX_MICMUTE_MIN_G_CTRL_0 +936 0x6000 //TX_MICMUTE_A_POST_FILT_S_0 +937 0x7000 //TX_MICMUTE_B_POST_FILT_0 +938 0x2710 //TX_MIC1RUB_AMP_THR +939 0x0010 //TX_MIC1MUTE_RATIO_THR +940 0x0450 //TX_MIC1MUTE_AMP_THR +941 0x0008 //TX_MIC1MUTE_CVG_TIME +942 0x0008 //TX_MIC1MUTE_RELEASE_TIME +943 0x0000 //TX_AMS_RESRV_01 +944 0x0000 //TX_AMS_RESRV_02 +945 0x0000 //TX_AMS_RESRV_03 +946 0x0000 //TX_AMS_RESRV_04 +947 0x0000 //TX_AMS_RESRV_05 +948 0x0000 //TX_AMS_RESRV_06 +949 0x0000 //TX_AMS_RESRV_07 +950 0x0000 //TX_AMS_RESRV_08 +951 0x0000 //TX_AMS_RESRV_09 +952 0x0000 //TX_AMS_RESRV_10 +953 0x0000 //TX_AMS_RESRV_11 +954 0x0000 //TX_AMS_RESRV_12 +955 0x0000 //TX_AMS_RESRV_13 +956 0x0000 //TX_AMS_RESRV_14 +957 0x0000 //TX_AMS_RESRV_15 +958 0x0000 //TX_AMS_RESRV_16 +959 0x0000 //TX_AMS_RESRV_17 +960 0x0000 //TX_AMS_RESRV_18 +961 0x0000 //TX_AMS_RESRV_19 #RX -0 0x027C //RX_RECVFUNC_MODE_0 +0 0x206C //RX_RECVFUNC_MODE_0 1 0x0000 //RX_RECVFUNC_MODE_1 2 0x0003 //RX_SAMPLINGFREQ_SIG 3 0x0003 //RX_SAMPLINGFREQ_PROC @@ -9710,21 +14361,21 @@ 37 0x4000 //RX_LMT_ALPHA 38 0x0020 //RX_FDEQ_SUBNUM 39 0x4848 //RX_FDEQ_GAIN_0 -40 0x4848 //RX_FDEQ_GAIN_1 -41 0x4848 //RX_FDEQ_GAIN_2 -42 0x4848 //RX_FDEQ_GAIN_3 -43 0x4848 //RX_FDEQ_GAIN_4 -44 0x4848 //RX_FDEQ_GAIN_5 -45 0x4850 //RX_FDEQ_GAIN_6 -46 0x4848 //RX_FDEQ_GAIN_7 -47 0x4860 //RX_FDEQ_GAIN_8 -48 0x7468 //RX_FDEQ_GAIN_9 -49 0x6060 //RX_FDEQ_GAIN_10 -50 0x6060 //RX_FDEQ_GAIN_11 -51 0x5C54 //RX_FDEQ_GAIN_12 -52 0x5450 //RX_FDEQ_GAIN_13 -53 0x5050 //RX_FDEQ_GAIN_14 -54 0x5860 //RX_FDEQ_GAIN_15 +40 0x3B3B //RX_FDEQ_GAIN_1 +41 0x3942 //RX_FDEQ_GAIN_2 +42 0x4645 //RX_FDEQ_GAIN_3 +43 0x494A //RX_FDEQ_GAIN_4 +44 0x5D5A //RX_FDEQ_GAIN_5 +45 0x5B5B //RX_FDEQ_GAIN_6 +46 0x5A51 //RX_FDEQ_GAIN_7 +47 0x514F //RX_FDEQ_GAIN_8 +48 0x5555 //RX_FDEQ_GAIN_9 +49 0x5052 //RX_FDEQ_GAIN_10 +50 0x5453 //RX_FDEQ_GAIN_11 +51 0x514E //RX_FDEQ_GAIN_12 +52 0x4F59 //RX_FDEQ_GAIN_13 +53 0x6C76 //RX_FDEQ_GAIN_14 +54 0x787B //RX_FDEQ_GAIN_15 55 0x4848 //RX_FDEQ_GAIN_16 56 0x4848 //RX_FDEQ_GAIN_17 57 0x4848 //RX_FDEQ_GAIN_18 @@ -9794,12 +14445,12 @@ 121 0x199A //RX_TDDRC_HMNC_GAIN 122 0x0001 //RX_TDDRC_SMT_FLAG 123 0x0CCD //RX_TDDRC_SMT_W -124 0x0550 //RX_TDDRC_DRC_GAIN +124 0x032A //RX_TDDRC_DRC_GAIN 125 0x7C00 //RX_LAMBDA_PKA_FP 126 0x2000 //RX_TPKA_FP 127 0x2000 //RX_MIN_G_FP 128 0x0080 //RX_MAX_G_FP -129 0x0014 //RX_SPK_VOL +129 0x0100 //RX_SPK_VOL 130 0x0000 //RX_VOL_RESRV_0 131 0x0000 //RX_MAXLEVEL_CNG 132 0x3000 //RX_BWE_UV_TH @@ -9850,24 +14501,24 @@ 121 0x199A //RX_TDDRC_HMNC_GAIN 122 0x0001 //RX_TDDRC_SMT_FLAG 123 0x0CCD //RX_TDDRC_SMT_W -124 0x0550 //RX_TDDRC_DRC_GAIN +124 0x032A //RX_TDDRC_DRC_GAIN 38 0x0020 //RX_FDEQ_SUBNUM 39 0x4848 //RX_FDEQ_GAIN_0 -40 0x4848 //RX_FDEQ_GAIN_1 -41 0x4848 //RX_FDEQ_GAIN_2 -42 0x4848 //RX_FDEQ_GAIN_3 -43 0x4848 //RX_FDEQ_GAIN_4 -44 0x4848 //RX_FDEQ_GAIN_5 -45 0x4850 //RX_FDEQ_GAIN_6 -46 0x4848 //RX_FDEQ_GAIN_7 -47 0x4860 //RX_FDEQ_GAIN_8 -48 0x7468 //RX_FDEQ_GAIN_9 -49 0x6060 //RX_FDEQ_GAIN_10 -50 0x6060 //RX_FDEQ_GAIN_11 -51 0x5C54 //RX_FDEQ_GAIN_12 -52 0x5450 //RX_FDEQ_GAIN_13 -53 0x5050 //RX_FDEQ_GAIN_14 -54 0x5860 //RX_FDEQ_GAIN_15 +40 0x3B3B //RX_FDEQ_GAIN_1 +41 0x3942 //RX_FDEQ_GAIN_2 +42 0x4645 //RX_FDEQ_GAIN_3 +43 0x494A //RX_FDEQ_GAIN_4 +44 0x5D5A //RX_FDEQ_GAIN_5 +45 0x5B5B //RX_FDEQ_GAIN_6 +46 0x5A51 //RX_FDEQ_GAIN_7 +47 0x514F //RX_FDEQ_GAIN_8 +48 0x5555 //RX_FDEQ_GAIN_9 +49 0x5052 //RX_FDEQ_GAIN_10 +50 0x5453 //RX_FDEQ_GAIN_11 +51 0x514E //RX_FDEQ_GAIN_12 +52 0x4F59 //RX_FDEQ_GAIN_13 +53 0x6C76 //RX_FDEQ_GAIN_14 +54 0x787B //RX_FDEQ_GAIN_15 55 0x4848 //RX_FDEQ_GAIN_16 56 0x4848 //RX_FDEQ_GAIN_17 57 0x4848 //RX_FDEQ_GAIN_18 @@ -9949,24 +14600,24 @@ 121 0x199A //RX_TDDRC_HMNC_GAIN 122 0x0001 //RX_TDDRC_SMT_FLAG 123 0x0CCD //RX_TDDRC_SMT_W -124 0x0550 //RX_TDDRC_DRC_GAIN +124 0x032A //RX_TDDRC_DRC_GAIN 38 0x0020 //RX_FDEQ_SUBNUM 39 0x4848 //RX_FDEQ_GAIN_0 -40 0x4848 //RX_FDEQ_GAIN_1 -41 0x4848 //RX_FDEQ_GAIN_2 -42 0x4848 //RX_FDEQ_GAIN_3 -43 0x4848 //RX_FDEQ_GAIN_4 -44 0x4848 //RX_FDEQ_GAIN_5 -45 0x4850 //RX_FDEQ_GAIN_6 -46 0x4848 //RX_FDEQ_GAIN_7 -47 0x4860 //RX_FDEQ_GAIN_8 -48 0x7468 //RX_FDEQ_GAIN_9 -49 0x6060 //RX_FDEQ_GAIN_10 -50 0x6060 //RX_FDEQ_GAIN_11 -51 0x5C54 //RX_FDEQ_GAIN_12 -52 0x5450 //RX_FDEQ_GAIN_13 -53 0x5050 //RX_FDEQ_GAIN_14 -54 0x5860 //RX_FDEQ_GAIN_15 +40 0x3B3B //RX_FDEQ_GAIN_1 +41 0x3942 //RX_FDEQ_GAIN_2 +42 0x4645 //RX_FDEQ_GAIN_3 +43 0x494A //RX_FDEQ_GAIN_4 +44 0x5D5A //RX_FDEQ_GAIN_5 +45 0x5B5B //RX_FDEQ_GAIN_6 +46 0x5A51 //RX_FDEQ_GAIN_7 +47 0x514F //RX_FDEQ_GAIN_8 +48 0x5555 //RX_FDEQ_GAIN_9 +49 0x5052 //RX_FDEQ_GAIN_10 +50 0x5453 //RX_FDEQ_GAIN_11 +51 0x514E //RX_FDEQ_GAIN_12 +52 0x4F59 //RX_FDEQ_GAIN_13 +53 0x6C76 //RX_FDEQ_GAIN_14 +54 0x787B //RX_FDEQ_GAIN_15 55 0x4848 //RX_FDEQ_GAIN_16 56 0x4848 //RX_FDEQ_GAIN_17 57 0x4848 //RX_FDEQ_GAIN_18 @@ -10048,24 +14699,24 @@ 121 0x199A //RX_TDDRC_HMNC_GAIN 122 0x0001 //RX_TDDRC_SMT_FLAG 123 0x0CCD //RX_TDDRC_SMT_W -124 0x0550 //RX_TDDRC_DRC_GAIN +124 0x032A //RX_TDDRC_DRC_GAIN 38 0x0020 //RX_FDEQ_SUBNUM 39 0x4848 //RX_FDEQ_GAIN_0 -40 0x4848 //RX_FDEQ_GAIN_1 -41 0x4848 //RX_FDEQ_GAIN_2 -42 0x4848 //RX_FDEQ_GAIN_3 -43 0x4848 //RX_FDEQ_GAIN_4 -44 0x4848 //RX_FDEQ_GAIN_5 -45 0x4850 //RX_FDEQ_GAIN_6 -46 0x4848 //RX_FDEQ_GAIN_7 -47 0x4860 //RX_FDEQ_GAIN_8 -48 0x7468 //RX_FDEQ_GAIN_9 -49 0x6060 //RX_FDEQ_GAIN_10 -50 0x6060 //RX_FDEQ_GAIN_11 -51 0x5C54 //RX_FDEQ_GAIN_12 -52 0x5450 //RX_FDEQ_GAIN_13 -53 0x5050 //RX_FDEQ_GAIN_14 -54 0x5860 //RX_FDEQ_GAIN_15 +40 0x3B3B //RX_FDEQ_GAIN_1 +41 0x3942 //RX_FDEQ_GAIN_2 +42 0x4645 //RX_FDEQ_GAIN_3 +43 0x494A //RX_FDEQ_GAIN_4 +44 0x5D5A //RX_FDEQ_GAIN_5 +45 0x5B5B //RX_FDEQ_GAIN_6 +46 0x5A51 //RX_FDEQ_GAIN_7 +47 0x514F //RX_FDEQ_GAIN_8 +48 0x5555 //RX_FDEQ_GAIN_9 +49 0x5052 //RX_FDEQ_GAIN_10 +50 0x5453 //RX_FDEQ_GAIN_11 +51 0x514E //RX_FDEQ_GAIN_12 +52 0x4F59 //RX_FDEQ_GAIN_13 +53 0x6C76 //RX_FDEQ_GAIN_14 +54 0x787B //RX_FDEQ_GAIN_15 55 0x4848 //RX_FDEQ_GAIN_16 56 0x4848 //RX_FDEQ_GAIN_17 57 0x4848 //RX_FDEQ_GAIN_18 @@ -10147,24 +14798,24 @@ 121 0x199A //RX_TDDRC_HMNC_GAIN 122 0x0001 //RX_TDDRC_SMT_FLAG 123 0x0CCD //RX_TDDRC_SMT_W -124 0x0550 //RX_TDDRC_DRC_GAIN +124 0x032A //RX_TDDRC_DRC_GAIN 38 0x0020 //RX_FDEQ_SUBNUM 39 0x4848 //RX_FDEQ_GAIN_0 -40 0x4848 //RX_FDEQ_GAIN_1 -41 0x4848 //RX_FDEQ_GAIN_2 -42 0x4848 //RX_FDEQ_GAIN_3 -43 0x4848 //RX_FDEQ_GAIN_4 -44 0x4848 //RX_FDEQ_GAIN_5 -45 0x4850 //RX_FDEQ_GAIN_6 -46 0x4848 //RX_FDEQ_GAIN_7 -47 0x4860 //RX_FDEQ_GAIN_8 -48 0x7468 //RX_FDEQ_GAIN_9 -49 0x6060 //RX_FDEQ_GAIN_10 -50 0x6060 //RX_FDEQ_GAIN_11 -51 0x5C54 //RX_FDEQ_GAIN_12 -52 0x5450 //RX_FDEQ_GAIN_13 -53 0x5050 //RX_FDEQ_GAIN_14 -54 0x5860 //RX_FDEQ_GAIN_15 +40 0x3B3B //RX_FDEQ_GAIN_1 +41 0x3942 //RX_FDEQ_GAIN_2 +42 0x4645 //RX_FDEQ_GAIN_3 +43 0x494A //RX_FDEQ_GAIN_4 +44 0x5D5A //RX_FDEQ_GAIN_5 +45 0x5B5B //RX_FDEQ_GAIN_6 +46 0x5A51 //RX_FDEQ_GAIN_7 +47 0x514F //RX_FDEQ_GAIN_8 +48 0x5555 //RX_FDEQ_GAIN_9 +49 0x5052 //RX_FDEQ_GAIN_10 +50 0x5453 //RX_FDEQ_GAIN_11 +51 0x514E //RX_FDEQ_GAIN_12 +52 0x4F59 //RX_FDEQ_GAIN_13 +53 0x6C76 //RX_FDEQ_GAIN_14 +54 0x787B //RX_FDEQ_GAIN_15 55 0x4848 //RX_FDEQ_GAIN_16 56 0x4848 //RX_FDEQ_GAIN_17 57 0x4848 //RX_FDEQ_GAIN_18 @@ -10246,24 +14897,24 @@ 121 0x199A //RX_TDDRC_HMNC_GAIN 122 0x0001 //RX_TDDRC_SMT_FLAG 123 0x0CCD //RX_TDDRC_SMT_W -124 0x0550 //RX_TDDRC_DRC_GAIN +124 0x032A //RX_TDDRC_DRC_GAIN 38 0x0020 //RX_FDEQ_SUBNUM 39 0x4848 //RX_FDEQ_GAIN_0 -40 0x4848 //RX_FDEQ_GAIN_1 -41 0x4848 //RX_FDEQ_GAIN_2 -42 0x4848 //RX_FDEQ_GAIN_3 -43 0x5454 //RX_FDEQ_GAIN_4 -44 0x7C54 //RX_FDEQ_GAIN_5 -45 0x4850 //RX_FDEQ_GAIN_6 -46 0x4848 //RX_FDEQ_GAIN_7 -47 0x4860 //RX_FDEQ_GAIN_8 -48 0x7468 //RX_FDEQ_GAIN_9 -49 0x6060 //RX_FDEQ_GAIN_10 -50 0x6060 //RX_FDEQ_GAIN_11 -51 0x5C54 //RX_FDEQ_GAIN_12 -52 0x5450 //RX_FDEQ_GAIN_13 -53 0x5050 //RX_FDEQ_GAIN_14 -54 0x5860 //RX_FDEQ_GAIN_15 +40 0x3B3B //RX_FDEQ_GAIN_1 +41 0x3942 //RX_FDEQ_GAIN_2 +42 0x4645 //RX_FDEQ_GAIN_3 +43 0x494A //RX_FDEQ_GAIN_4 +44 0x5D5A //RX_FDEQ_GAIN_5 +45 0x5B5B //RX_FDEQ_GAIN_6 +46 0x5A51 //RX_FDEQ_GAIN_7 +47 0x514F //RX_FDEQ_GAIN_8 +48 0x5555 //RX_FDEQ_GAIN_9 +49 0x5052 //RX_FDEQ_GAIN_10 +50 0x5453 //RX_FDEQ_GAIN_11 +51 0x514E //RX_FDEQ_GAIN_12 +52 0x4F59 //RX_FDEQ_GAIN_13 +53 0x6C76 //RX_FDEQ_GAIN_14 +54 0x787B //RX_FDEQ_GAIN_15 55 0x4848 //RX_FDEQ_GAIN_16 56 0x4848 //RX_FDEQ_GAIN_17 57 0x4848 //RX_FDEQ_GAIN_18 @@ -10345,24 +14996,24 @@ 121 0x199A //RX_TDDRC_HMNC_GAIN 122 0x0001 //RX_TDDRC_SMT_FLAG 123 0x0CCD //RX_TDDRC_SMT_W -124 0x0550 //RX_TDDRC_DRC_GAIN +124 0x032A //RX_TDDRC_DRC_GAIN 38 0x0020 //RX_FDEQ_SUBNUM 39 0x4848 //RX_FDEQ_GAIN_0 -40 0x4848 //RX_FDEQ_GAIN_1 -41 0x4848 //RX_FDEQ_GAIN_2 -42 0x4848 //RX_FDEQ_GAIN_3 -43 0x5454 //RX_FDEQ_GAIN_4 -44 0x7C54 //RX_FDEQ_GAIN_5 -45 0x4850 //RX_FDEQ_GAIN_6 -46 0x4848 //RX_FDEQ_GAIN_7 -47 0x4860 //RX_FDEQ_GAIN_8 -48 0x7468 //RX_FDEQ_GAIN_9 -49 0x6060 //RX_FDEQ_GAIN_10 -50 0x6060 //RX_FDEQ_GAIN_11 -51 0x5C54 //RX_FDEQ_GAIN_12 -52 0x5450 //RX_FDEQ_GAIN_13 -53 0x5050 //RX_FDEQ_GAIN_14 -54 0x5860 //RX_FDEQ_GAIN_15 +40 0x3B3B //RX_FDEQ_GAIN_1 +41 0x3942 //RX_FDEQ_GAIN_2 +42 0x4645 //RX_FDEQ_GAIN_3 +43 0x494A //RX_FDEQ_GAIN_4 +44 0x5D5A //RX_FDEQ_GAIN_5 +45 0x5B5B //RX_FDEQ_GAIN_6 +46 0x5A51 //RX_FDEQ_GAIN_7 +47 0x514F //RX_FDEQ_GAIN_8 +48 0x5555 //RX_FDEQ_GAIN_9 +49 0x5052 //RX_FDEQ_GAIN_10 +50 0x5453 //RX_FDEQ_GAIN_11 +51 0x514E //RX_FDEQ_GAIN_12 +52 0x4F59 //RX_FDEQ_GAIN_13 +53 0x6C76 //RX_FDEQ_GAIN_14 +54 0x787B //RX_FDEQ_GAIN_15 55 0x4848 //RX_FDEQ_GAIN_16 56 0x4848 //RX_FDEQ_GAIN_17 57 0x4848 //RX_FDEQ_GAIN_18 @@ -10444,24 +15095,24 @@ 121 0x199A //RX_TDDRC_HMNC_GAIN 122 0x0001 //RX_TDDRC_SMT_FLAG 123 0x0CCD //RX_TDDRC_SMT_W -124 0x0550 //RX_TDDRC_DRC_GAIN +124 0x032A //RX_TDDRC_DRC_GAIN 38 0x0020 //RX_FDEQ_SUBNUM 39 0x4848 //RX_FDEQ_GAIN_0 -40 0x4848 //RX_FDEQ_GAIN_1 -41 0x4848 //RX_FDEQ_GAIN_2 -42 0x4848 //RX_FDEQ_GAIN_3 -43 0x5454 //RX_FDEQ_GAIN_4 -44 0x7C54 //RX_FDEQ_GAIN_5 -45 0x4850 //RX_FDEQ_GAIN_6 -46 0x4848 //RX_FDEQ_GAIN_7 -47 0x4860 //RX_FDEQ_GAIN_8 -48 0x7468 //RX_FDEQ_GAIN_9 -49 0x6060 //RX_FDEQ_GAIN_10 -50 0x6060 //RX_FDEQ_GAIN_11 -51 0x5C54 //RX_FDEQ_GAIN_12 -52 0x5450 //RX_FDEQ_GAIN_13 -53 0x5050 //RX_FDEQ_GAIN_14 -54 0x5860 //RX_FDEQ_GAIN_15 +40 0x3B3B //RX_FDEQ_GAIN_1 +41 0x3942 //RX_FDEQ_GAIN_2 +42 0x4645 //RX_FDEQ_GAIN_3 +43 0x494A //RX_FDEQ_GAIN_4 +44 0x5D5A //RX_FDEQ_GAIN_5 +45 0x5B5B //RX_FDEQ_GAIN_6 +46 0x5A51 //RX_FDEQ_GAIN_7 +47 0x514F //RX_FDEQ_GAIN_8 +48 0x5555 //RX_FDEQ_GAIN_9 +49 0x5052 //RX_FDEQ_GAIN_10 +50 0x5453 //RX_FDEQ_GAIN_11 +51 0x514E //RX_FDEQ_GAIN_12 +52 0x4F59 //RX_FDEQ_GAIN_13 +53 0x6C76 //RX_FDEQ_GAIN_14 +54 0x787B //RX_FDEQ_GAIN_15 55 0x4848 //RX_FDEQ_GAIN_16 56 0x4848 //RX_FDEQ_GAIN_17 57 0x4848 //RX_FDEQ_GAIN_18 @@ -10520,10 +15171,862 @@ 110 0x0000 //RX_FDDRC_RESRV_0 129 0x0100 //RX_SPK_VOL 130 0x0000 //RX_VOL_RESRV_0 +#RX 2 +157 0x027C //RX_RECVFUNC_MODE_0 +158 0x0000 //RX_RECVFUNC_MODE_1 +159 0x0003 //RX_SAMPLINGFREQ_SIG +160 0x0003 //RX_SAMPLINGFREQ_PROC +161 0x000A //RX_FRAME_SZ +162 0x0000 //RX_DELAY_OPT +163 0x6000 //RX_TDDRC_ALPHA_UP_1 +164 0x6000 //RX_TDDRC_ALPHA_UP_2 +165 0x6000 //RX_TDDRC_ALPHA_UP_3 +166 0x1000 //RX_TDDRC_ALPHA_UP_4 +167 0x0800 //RX_PGA +168 0x7652 //RX_A_HP +169 0x4000 //RX_B_PE +170 0x7800 //RX_THR_PITCH_DET_0 +171 0x7000 //RX_THR_PITCH_DET_1 +172 0x6000 //RX_THR_PITCH_DET_2 +173 0x0008 //RX_PITCH_BFR_LEN +174 0x0003 //RX_SBD_PITCH_DET +175 0x0100 //RX_PP_RESRV_0 +176 0x0020 //RX_PP_RESRV_1 +177 0x0400 //RX_N_SN_EST +178 0x000C //RX_N2_SN_EST +179 0x0010 //RX_NS_LVL_CTRL +180 0xF800 //RX_THR_SN_EST +181 0x7E00 //RX_LAMBDA_PFILT +182 0x000A //RX_FENS_RESRV_0 +183 0x0190 //RX_FENS_RESRV_1 +184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +187 0x0002 //RX_EXTRA_NS_L +188 0x0800 //RX_EXTRA_NS_A +189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +190 0x7214 //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +192 0x199A //RX_A_POST_FLT +193 0x0000 //RX_LMT_THRD +194 0x4000 //RX_LMT_ALPHA +195 0x0020 //RX_FDEQ_SUBNUM +196 0x4848 //RX_FDEQ_GAIN_0 +197 0x4848 //RX_FDEQ_GAIN_1 +198 0x4848 //RX_FDEQ_GAIN_2 +199 0x4848 //RX_FDEQ_GAIN_3 +200 0x4848 //RX_FDEQ_GAIN_4 +201 0x4848 //RX_FDEQ_GAIN_5 +202 0x4850 //RX_FDEQ_GAIN_6 +203 0x4848 //RX_FDEQ_GAIN_7 +204 0x4860 //RX_FDEQ_GAIN_8 +205 0x7468 //RX_FDEQ_GAIN_9 +206 0x6060 //RX_FDEQ_GAIN_10 +207 0x6060 //RX_FDEQ_GAIN_11 +208 0x5C54 //RX_FDEQ_GAIN_12 +209 0x5450 //RX_FDEQ_GAIN_13 +210 0x5050 //RX_FDEQ_GAIN_14 +211 0x5860 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0202 //RX_FDEQ_BIN_0 +221 0x0203 //RX_FDEQ_BIN_1 +222 0x0303 //RX_FDEQ_BIN_2 +223 0x0304 //RX_FDEQ_BIN_3 +224 0x0404 //RX_FDEQ_BIN_4 +225 0x0308 //RX_FDEQ_BIN_5 +226 0x0808 //RX_FDEQ_BIN_6 +227 0x090A //RX_FDEQ_BIN_7 +228 0x0B0C //RX_FDEQ_BIN_8 +229 0x0D0E //RX_FDEQ_BIN_9 +230 0x1013 //RX_FDEQ_BIN_10 +231 0x1719 //RX_FDEQ_BIN_11 +232 0x1B1E //RX_FDEQ_BIN_12 +233 0x1E1E //RX_FDEQ_BIN_13 +234 0x1E28 //RX_FDEQ_BIN_14 +235 0x282C //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x4000 //RX_FDEQ_RESRV_0 +245 0x0320 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0035 //RX_FDDRC_BAND_MARGIN_1 +248 0x00D5 //RX_FDDRC_BAND_MARGIN_2 +249 0x0120 //RX_FDDRC_BAND_MARGIN_3 +250 0x0004 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x2000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x2000 //RX_FDDRC_THRD_3_2 +258 0x5000 //RX_FDDRC_THRD_3_3 +259 0x4000 //RX_FDDRC_SLANT_0_0 +260 0x4000 //RX_FDDRC_SLANT_0_1 +261 0x4000 //RX_FDDRC_SLANT_0_2 +262 0x4000 //RX_FDDRC_SLANT_0_3 +263 0x7FFF //RX_FDDRC_SLANT_1_0 +264 0x7FFF //RX_FDDRC_SLANT_1_1 +265 0x7FFF //RX_FDDRC_SLANT_1_2 +266 0x7FFF //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +268 0x0002 //RX_FILTINDX +269 0x0002 //RX_TDDRC_THRD_0 +270 0x0004 //RX_TDDRC_THRD_1 +271 0x1A00 //RX_TDDRC_THRD_2 +272 0x1A00 //RX_TDDRC_THRD_3 +273 0x7EB8 //RX_TDDRC_SLANT_0 +274 0x2500 //RX_TDDRC_SLANT_1 +275 0x6000 //RX_TDDRC_ALPHA_UP_0 +276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x199A //RX_TDDRC_HMNC_GAIN +279 0x0001 //RX_TDDRC_SMT_FLAG +280 0x0CCD //RX_TDDRC_SMT_W +281 0x0550 //RX_TDDRC_DRC_GAIN +282 0x7C00 //RX_LAMBDA_PKA_FP +283 0x2000 //RX_TPKA_FP +284 0x2000 //RX_MIN_G_FP +285 0x0080 //RX_MAX_G_FP +286 0x0014 //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 +288 0x0000 //RX_MAXLEVEL_CNG +289 0x3000 //RX_BWE_UV_TH +290 0x3000 //RX_BWE_UV_TH2 +291 0x1800 //RX_BWE_UV_TH3 +292 0x1000 //RX_BWE_V_TH +293 0x04CD //RX_BWE_GAIN1_V_TH1 +294 0x0F33 //RX_BWE_GAIN1_V_TH2 +295 0x7333 //RX_BWE_UV_EQ +296 0x199A //RX_BWE_V_EQ +297 0x7333 //RX_BWE_TONE_TH +298 0x0004 //RX_BWE_UV_HOLD_T +299 0x6CCD //RX_BWE_GAIN2_ALPHA +300 0x799A //RX_BWE_GAIN3_ALPHA +301 0x001E //RX_BWE_CUTOFF +302 0x3000 //RX_BWE_GAINFILL +303 0x3200 //RX_BWE_MAXTH_TONE +304 0x2000 //RX_BWE_EQ_0 +305 0x2000 //RX_BWE_EQ_1 +306 0x2000 //RX_BWE_EQ_2 +307 0x2000 //RX_BWE_EQ_3 +308 0x2000 //RX_BWE_EQ_4 +309 0x2000 //RX_BWE_EQ_5 +310 0x2000 //RX_BWE_EQ_6 +311 0x0000 //RX_BWE_RESRV_0 +312 0x0000 //RX_BWE_RESRV_1 +313 0x0000 //RX_BWE_RESRV_2 +#VOL 0 +163 0x6000 //RX_TDDRC_ALPHA_UP_1 +164 0x6000 //RX_TDDRC_ALPHA_UP_2 +165 0x6000 //RX_TDDRC_ALPHA_UP_3 +166 0x1000 //RX_TDDRC_ALPHA_UP_4 +184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +190 0x7214 //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +269 0x0002 //RX_TDDRC_THRD_0 +270 0x0004 //RX_TDDRC_THRD_1 +271 0x1A00 //RX_TDDRC_THRD_2 +272 0x1A00 //RX_TDDRC_THRD_3 +273 0x7EB8 //RX_TDDRC_SLANT_0 +274 0x2500 //RX_TDDRC_SLANT_1 +275 0x6000 //RX_TDDRC_ALPHA_UP_0 +276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x199A //RX_TDDRC_HMNC_GAIN +279 0x0001 //RX_TDDRC_SMT_FLAG +280 0x0CCD //RX_TDDRC_SMT_W +281 0x0550 //RX_TDDRC_DRC_GAIN +195 0x0020 //RX_FDEQ_SUBNUM +196 0x4848 //RX_FDEQ_GAIN_0 +197 0x4848 //RX_FDEQ_GAIN_1 +198 0x4848 //RX_FDEQ_GAIN_2 +199 0x4848 //RX_FDEQ_GAIN_3 +200 0x4848 //RX_FDEQ_GAIN_4 +201 0x4848 //RX_FDEQ_GAIN_5 +202 0x4850 //RX_FDEQ_GAIN_6 +203 0x4848 //RX_FDEQ_GAIN_7 +204 0x4860 //RX_FDEQ_GAIN_8 +205 0x7468 //RX_FDEQ_GAIN_9 +206 0x6060 //RX_FDEQ_GAIN_10 +207 0x6060 //RX_FDEQ_GAIN_11 +208 0x5C54 //RX_FDEQ_GAIN_12 +209 0x5450 //RX_FDEQ_GAIN_13 +210 0x5050 //RX_FDEQ_GAIN_14 +211 0x5860 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0202 //RX_FDEQ_BIN_0 +221 0x0203 //RX_FDEQ_BIN_1 +222 0x0303 //RX_FDEQ_BIN_2 +223 0x0304 //RX_FDEQ_BIN_3 +224 0x0404 //RX_FDEQ_BIN_4 +225 0x0308 //RX_FDEQ_BIN_5 +226 0x0808 //RX_FDEQ_BIN_6 +227 0x090A //RX_FDEQ_BIN_7 +228 0x0B0C //RX_FDEQ_BIN_8 +229 0x0D0E //RX_FDEQ_BIN_9 +230 0x1013 //RX_FDEQ_BIN_10 +231 0x1719 //RX_FDEQ_BIN_11 +232 0x1B1E //RX_FDEQ_BIN_12 +233 0x1E1E //RX_FDEQ_BIN_13 +234 0x1E28 //RX_FDEQ_BIN_14 +235 0x282C //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x4000 //RX_FDEQ_RESRV_0 +245 0x0320 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0035 //RX_FDDRC_BAND_MARGIN_1 +248 0x00D5 //RX_FDDRC_BAND_MARGIN_2 +249 0x0120 //RX_FDDRC_BAND_MARGIN_3 +250 0x0004 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x2000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x2000 //RX_FDDRC_THRD_3_2 +258 0x5000 //RX_FDDRC_THRD_3_3 +259 0x4000 //RX_FDDRC_SLANT_0_0 +260 0x4000 //RX_FDDRC_SLANT_0_1 +261 0x4000 //RX_FDDRC_SLANT_0_2 +262 0x4000 //RX_FDDRC_SLANT_0_3 +263 0x7FFF //RX_FDDRC_SLANT_1_0 +264 0x7FFF //RX_FDDRC_SLANT_1_1 +265 0x7FFF //RX_FDDRC_SLANT_1_2 +266 0x7FFF //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +286 0x0014 //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 +#VOL 1 +163 0x6000 //RX_TDDRC_ALPHA_UP_1 +164 0x6000 //RX_TDDRC_ALPHA_UP_2 +165 0x6000 //RX_TDDRC_ALPHA_UP_3 +166 0x1000 //RX_TDDRC_ALPHA_UP_4 +184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +190 0x7214 //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +269 0x0002 //RX_TDDRC_THRD_0 +270 0x0004 //RX_TDDRC_THRD_1 +271 0x1A00 //RX_TDDRC_THRD_2 +272 0x1A00 //RX_TDDRC_THRD_3 +273 0x7EB8 //RX_TDDRC_SLANT_0 +274 0x2500 //RX_TDDRC_SLANT_1 +275 0x6000 //RX_TDDRC_ALPHA_UP_0 +276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x199A //RX_TDDRC_HMNC_GAIN +279 0x0001 //RX_TDDRC_SMT_FLAG +280 0x0CCD //RX_TDDRC_SMT_W +281 0x0550 //RX_TDDRC_DRC_GAIN +195 0x0020 //RX_FDEQ_SUBNUM +196 0x4848 //RX_FDEQ_GAIN_0 +197 0x4848 //RX_FDEQ_GAIN_1 +198 0x4848 //RX_FDEQ_GAIN_2 +199 0x4848 //RX_FDEQ_GAIN_3 +200 0x4848 //RX_FDEQ_GAIN_4 +201 0x4848 //RX_FDEQ_GAIN_5 +202 0x4850 //RX_FDEQ_GAIN_6 +203 0x4848 //RX_FDEQ_GAIN_7 +204 0x4860 //RX_FDEQ_GAIN_8 +205 0x7468 //RX_FDEQ_GAIN_9 +206 0x6060 //RX_FDEQ_GAIN_10 +207 0x6060 //RX_FDEQ_GAIN_11 +208 0x5C54 //RX_FDEQ_GAIN_12 +209 0x5450 //RX_FDEQ_GAIN_13 +210 0x5050 //RX_FDEQ_GAIN_14 +211 0x5860 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0202 //RX_FDEQ_BIN_0 +221 0x0203 //RX_FDEQ_BIN_1 +222 0x0303 //RX_FDEQ_BIN_2 +223 0x0304 //RX_FDEQ_BIN_3 +224 0x0404 //RX_FDEQ_BIN_4 +225 0x0308 //RX_FDEQ_BIN_5 +226 0x0808 //RX_FDEQ_BIN_6 +227 0x090A //RX_FDEQ_BIN_7 +228 0x0B0C //RX_FDEQ_BIN_8 +229 0x0D0E //RX_FDEQ_BIN_9 +230 0x1013 //RX_FDEQ_BIN_10 +231 0x1719 //RX_FDEQ_BIN_11 +232 0x1B1E //RX_FDEQ_BIN_12 +233 0x1E1E //RX_FDEQ_BIN_13 +234 0x1E28 //RX_FDEQ_BIN_14 +235 0x282C //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x4000 //RX_FDEQ_RESRV_0 +245 0x0320 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0035 //RX_FDDRC_BAND_MARGIN_1 +248 0x00D5 //RX_FDDRC_BAND_MARGIN_2 +249 0x0120 //RX_FDDRC_BAND_MARGIN_3 +250 0x0004 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x2000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x2000 //RX_FDDRC_THRD_3_2 +258 0x5000 //RX_FDDRC_THRD_3_3 +259 0x4000 //RX_FDDRC_SLANT_0_0 +260 0x4000 //RX_FDDRC_SLANT_0_1 +261 0x4000 //RX_FDDRC_SLANT_0_2 +262 0x4000 //RX_FDDRC_SLANT_0_3 +263 0x7FFF //RX_FDDRC_SLANT_1_0 +264 0x7FFF //RX_FDDRC_SLANT_1_1 +265 0x7FFF //RX_FDDRC_SLANT_1_2 +266 0x7FFF //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +286 0x001D //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 +#VOL 2 +163 0x6000 //RX_TDDRC_ALPHA_UP_1 +164 0x6000 //RX_TDDRC_ALPHA_UP_2 +165 0x6000 //RX_TDDRC_ALPHA_UP_3 +166 0x1000 //RX_TDDRC_ALPHA_UP_4 +184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +190 0x7214 //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +269 0x0002 //RX_TDDRC_THRD_0 +270 0x0004 //RX_TDDRC_THRD_1 +271 0x1A00 //RX_TDDRC_THRD_2 +272 0x1A00 //RX_TDDRC_THRD_3 +273 0x7EB8 //RX_TDDRC_SLANT_0 +274 0x2500 //RX_TDDRC_SLANT_1 +275 0x6000 //RX_TDDRC_ALPHA_UP_0 +276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x199A //RX_TDDRC_HMNC_GAIN +279 0x0001 //RX_TDDRC_SMT_FLAG +280 0x0CCD //RX_TDDRC_SMT_W +281 0x0550 //RX_TDDRC_DRC_GAIN +195 0x0020 //RX_FDEQ_SUBNUM +196 0x4848 //RX_FDEQ_GAIN_0 +197 0x4848 //RX_FDEQ_GAIN_1 +198 0x4848 //RX_FDEQ_GAIN_2 +199 0x4848 //RX_FDEQ_GAIN_3 +200 0x4848 //RX_FDEQ_GAIN_4 +201 0x4848 //RX_FDEQ_GAIN_5 +202 0x4850 //RX_FDEQ_GAIN_6 +203 0x4848 //RX_FDEQ_GAIN_7 +204 0x4860 //RX_FDEQ_GAIN_8 +205 0x7468 //RX_FDEQ_GAIN_9 +206 0x6060 //RX_FDEQ_GAIN_10 +207 0x6060 //RX_FDEQ_GAIN_11 +208 0x5C54 //RX_FDEQ_GAIN_12 +209 0x5450 //RX_FDEQ_GAIN_13 +210 0x5050 //RX_FDEQ_GAIN_14 +211 0x5860 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0202 //RX_FDEQ_BIN_0 +221 0x0203 //RX_FDEQ_BIN_1 +222 0x0303 //RX_FDEQ_BIN_2 +223 0x0304 //RX_FDEQ_BIN_3 +224 0x0404 //RX_FDEQ_BIN_4 +225 0x0308 //RX_FDEQ_BIN_5 +226 0x0808 //RX_FDEQ_BIN_6 +227 0x090A //RX_FDEQ_BIN_7 +228 0x0B0C //RX_FDEQ_BIN_8 +229 0x0D0E //RX_FDEQ_BIN_9 +230 0x1013 //RX_FDEQ_BIN_10 +231 0x1719 //RX_FDEQ_BIN_11 +232 0x1B1E //RX_FDEQ_BIN_12 +233 0x1E1E //RX_FDEQ_BIN_13 +234 0x1E28 //RX_FDEQ_BIN_14 +235 0x282C //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x4000 //RX_FDEQ_RESRV_0 +245 0x0320 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0035 //RX_FDDRC_BAND_MARGIN_1 +248 0x00D5 //RX_FDDRC_BAND_MARGIN_2 +249 0x0120 //RX_FDDRC_BAND_MARGIN_3 +250 0x0004 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x2000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x2000 //RX_FDDRC_THRD_3_2 +258 0x5000 //RX_FDDRC_THRD_3_3 +259 0x4000 //RX_FDDRC_SLANT_0_0 +260 0x4000 //RX_FDDRC_SLANT_0_1 +261 0x4000 //RX_FDDRC_SLANT_0_2 +262 0x4000 //RX_FDDRC_SLANT_0_3 +263 0x7FFF //RX_FDDRC_SLANT_1_0 +264 0x7FFF //RX_FDDRC_SLANT_1_1 +265 0x7FFF //RX_FDDRC_SLANT_1_2 +266 0x7FFF //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +286 0x0029 //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 +#VOL 3 +163 0x6000 //RX_TDDRC_ALPHA_UP_1 +164 0x6000 //RX_TDDRC_ALPHA_UP_2 +165 0x6000 //RX_TDDRC_ALPHA_UP_3 +166 0x1000 //RX_TDDRC_ALPHA_UP_4 +184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +190 0x7214 //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +269 0x0002 //RX_TDDRC_THRD_0 +270 0x0004 //RX_TDDRC_THRD_1 +271 0x1A00 //RX_TDDRC_THRD_2 +272 0x1A00 //RX_TDDRC_THRD_3 +273 0x7EB8 //RX_TDDRC_SLANT_0 +274 0x2500 //RX_TDDRC_SLANT_1 +275 0x6000 //RX_TDDRC_ALPHA_UP_0 +276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x199A //RX_TDDRC_HMNC_GAIN +279 0x0001 //RX_TDDRC_SMT_FLAG +280 0x0CCD //RX_TDDRC_SMT_W +281 0x0550 //RX_TDDRC_DRC_GAIN +195 0x0020 //RX_FDEQ_SUBNUM +196 0x4848 //RX_FDEQ_GAIN_0 +197 0x4848 //RX_FDEQ_GAIN_1 +198 0x4848 //RX_FDEQ_GAIN_2 +199 0x4848 //RX_FDEQ_GAIN_3 +200 0x4848 //RX_FDEQ_GAIN_4 +201 0x4848 //RX_FDEQ_GAIN_5 +202 0x4850 //RX_FDEQ_GAIN_6 +203 0x4848 //RX_FDEQ_GAIN_7 +204 0x4860 //RX_FDEQ_GAIN_8 +205 0x7468 //RX_FDEQ_GAIN_9 +206 0x6060 //RX_FDEQ_GAIN_10 +207 0x6060 //RX_FDEQ_GAIN_11 +208 0x5C54 //RX_FDEQ_GAIN_12 +209 0x5450 //RX_FDEQ_GAIN_13 +210 0x5050 //RX_FDEQ_GAIN_14 +211 0x5860 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0202 //RX_FDEQ_BIN_0 +221 0x0203 //RX_FDEQ_BIN_1 +222 0x0303 //RX_FDEQ_BIN_2 +223 0x0304 //RX_FDEQ_BIN_3 +224 0x0404 //RX_FDEQ_BIN_4 +225 0x0308 //RX_FDEQ_BIN_5 +226 0x0808 //RX_FDEQ_BIN_6 +227 0x090A //RX_FDEQ_BIN_7 +228 0x0B0C //RX_FDEQ_BIN_8 +229 0x0D0E //RX_FDEQ_BIN_9 +230 0x1013 //RX_FDEQ_BIN_10 +231 0x1719 //RX_FDEQ_BIN_11 +232 0x1B1E //RX_FDEQ_BIN_12 +233 0x1E1E //RX_FDEQ_BIN_13 +234 0x1E28 //RX_FDEQ_BIN_14 +235 0x282C //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x4000 //RX_FDEQ_RESRV_0 +245 0x0320 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0035 //RX_FDDRC_BAND_MARGIN_1 +248 0x00D5 //RX_FDDRC_BAND_MARGIN_2 +249 0x0120 //RX_FDDRC_BAND_MARGIN_3 +250 0x0004 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x2000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x2000 //RX_FDDRC_THRD_3_2 +258 0x5000 //RX_FDDRC_THRD_3_3 +259 0x4000 //RX_FDDRC_SLANT_0_0 +260 0x4000 //RX_FDDRC_SLANT_0_1 +261 0x4000 //RX_FDDRC_SLANT_0_2 +262 0x4000 //RX_FDDRC_SLANT_0_3 +263 0x7FFF //RX_FDDRC_SLANT_1_0 +264 0x7FFF //RX_FDDRC_SLANT_1_1 +265 0x7FFF //RX_FDDRC_SLANT_1_2 +266 0x7FFF //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +286 0x0039 //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 +#VOL 4 +163 0x6000 //RX_TDDRC_ALPHA_UP_1 +164 0x6000 //RX_TDDRC_ALPHA_UP_2 +165 0x6000 //RX_TDDRC_ALPHA_UP_3 +166 0x1000 //RX_TDDRC_ALPHA_UP_4 +184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +190 0x7214 //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +269 0x0002 //RX_TDDRC_THRD_0 +270 0x0004 //RX_TDDRC_THRD_1 +271 0x1A00 //RX_TDDRC_THRD_2 +272 0x1A00 //RX_TDDRC_THRD_3 +273 0x7EB8 //RX_TDDRC_SLANT_0 +274 0x2500 //RX_TDDRC_SLANT_1 +275 0x6000 //RX_TDDRC_ALPHA_UP_0 +276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x199A //RX_TDDRC_HMNC_GAIN +279 0x0001 //RX_TDDRC_SMT_FLAG +280 0x0CCD //RX_TDDRC_SMT_W +281 0x0550 //RX_TDDRC_DRC_GAIN +195 0x0020 //RX_FDEQ_SUBNUM +196 0x4848 //RX_FDEQ_GAIN_0 +197 0x4848 //RX_FDEQ_GAIN_1 +198 0x4848 //RX_FDEQ_GAIN_2 +199 0x4848 //RX_FDEQ_GAIN_3 +200 0x5454 //RX_FDEQ_GAIN_4 +201 0x7C54 //RX_FDEQ_GAIN_5 +202 0x4850 //RX_FDEQ_GAIN_6 +203 0x4848 //RX_FDEQ_GAIN_7 +204 0x4860 //RX_FDEQ_GAIN_8 +205 0x7468 //RX_FDEQ_GAIN_9 +206 0x6060 //RX_FDEQ_GAIN_10 +207 0x6060 //RX_FDEQ_GAIN_11 +208 0x5C54 //RX_FDEQ_GAIN_12 +209 0x5450 //RX_FDEQ_GAIN_13 +210 0x5050 //RX_FDEQ_GAIN_14 +211 0x5860 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0202 //RX_FDEQ_BIN_0 +221 0x0203 //RX_FDEQ_BIN_1 +222 0x0303 //RX_FDEQ_BIN_2 +223 0x0304 //RX_FDEQ_BIN_3 +224 0x0404 //RX_FDEQ_BIN_4 +225 0x0308 //RX_FDEQ_BIN_5 +226 0x0808 //RX_FDEQ_BIN_6 +227 0x090A //RX_FDEQ_BIN_7 +228 0x0B0C //RX_FDEQ_BIN_8 +229 0x0D0E //RX_FDEQ_BIN_9 +230 0x1013 //RX_FDEQ_BIN_10 +231 0x1719 //RX_FDEQ_BIN_11 +232 0x1B1E //RX_FDEQ_BIN_12 +233 0x1E1E //RX_FDEQ_BIN_13 +234 0x1E28 //RX_FDEQ_BIN_14 +235 0x282C //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x4000 //RX_FDEQ_RESRV_0 +245 0x0320 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0035 //RX_FDDRC_BAND_MARGIN_1 +248 0x00D5 //RX_FDDRC_BAND_MARGIN_2 +249 0x0120 //RX_FDDRC_BAND_MARGIN_3 +250 0x0004 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x2000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x2000 //RX_FDDRC_THRD_3_2 +258 0x5000 //RX_FDDRC_THRD_3_3 +259 0x4000 //RX_FDDRC_SLANT_0_0 +260 0x4000 //RX_FDDRC_SLANT_0_1 +261 0x4000 //RX_FDDRC_SLANT_0_2 +262 0x4000 //RX_FDDRC_SLANT_0_3 +263 0x7FFF //RX_FDDRC_SLANT_1_0 +264 0x7FFF //RX_FDDRC_SLANT_1_1 +265 0x7FFF //RX_FDDRC_SLANT_1_2 +266 0x7FFF //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +286 0x005F //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 +#VOL 5 +163 0x6000 //RX_TDDRC_ALPHA_UP_1 +164 0x6000 //RX_TDDRC_ALPHA_UP_2 +165 0x6000 //RX_TDDRC_ALPHA_UP_3 +166 0x1000 //RX_TDDRC_ALPHA_UP_4 +184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +190 0x7214 //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +269 0x0002 //RX_TDDRC_THRD_0 +270 0x0004 //RX_TDDRC_THRD_1 +271 0x1A00 //RX_TDDRC_THRD_2 +272 0x1A00 //RX_TDDRC_THRD_3 +273 0x7EB8 //RX_TDDRC_SLANT_0 +274 0x2500 //RX_TDDRC_SLANT_1 +275 0x6000 //RX_TDDRC_ALPHA_UP_0 +276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x199A //RX_TDDRC_HMNC_GAIN +279 0x0001 //RX_TDDRC_SMT_FLAG +280 0x0CCD //RX_TDDRC_SMT_W +281 0x0550 //RX_TDDRC_DRC_GAIN +195 0x0020 //RX_FDEQ_SUBNUM +196 0x4848 //RX_FDEQ_GAIN_0 +197 0x4848 //RX_FDEQ_GAIN_1 +198 0x4848 //RX_FDEQ_GAIN_2 +199 0x4848 //RX_FDEQ_GAIN_3 +200 0x5454 //RX_FDEQ_GAIN_4 +201 0x7C54 //RX_FDEQ_GAIN_5 +202 0x4850 //RX_FDEQ_GAIN_6 +203 0x4848 //RX_FDEQ_GAIN_7 +204 0x4860 //RX_FDEQ_GAIN_8 +205 0x7468 //RX_FDEQ_GAIN_9 +206 0x6060 //RX_FDEQ_GAIN_10 +207 0x6060 //RX_FDEQ_GAIN_11 +208 0x5C54 //RX_FDEQ_GAIN_12 +209 0x5450 //RX_FDEQ_GAIN_13 +210 0x5050 //RX_FDEQ_GAIN_14 +211 0x5860 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0202 //RX_FDEQ_BIN_0 +221 0x0203 //RX_FDEQ_BIN_1 +222 0x0303 //RX_FDEQ_BIN_2 +223 0x0304 //RX_FDEQ_BIN_3 +224 0x0404 //RX_FDEQ_BIN_4 +225 0x0308 //RX_FDEQ_BIN_5 +226 0x0808 //RX_FDEQ_BIN_6 +227 0x090A //RX_FDEQ_BIN_7 +228 0x0B0C //RX_FDEQ_BIN_8 +229 0x0D0E //RX_FDEQ_BIN_9 +230 0x1013 //RX_FDEQ_BIN_10 +231 0x1719 //RX_FDEQ_BIN_11 +232 0x1B1E //RX_FDEQ_BIN_12 +233 0x1E1E //RX_FDEQ_BIN_13 +234 0x1E28 //RX_FDEQ_BIN_14 +235 0x282C //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x4000 //RX_FDEQ_RESRV_0 +245 0x0320 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0035 //RX_FDDRC_BAND_MARGIN_1 +248 0x00D5 //RX_FDDRC_BAND_MARGIN_2 +249 0x0120 //RX_FDDRC_BAND_MARGIN_3 +250 0x0004 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x2000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x2000 //RX_FDDRC_THRD_3_2 +258 0x5000 //RX_FDDRC_THRD_3_3 +259 0x4000 //RX_FDDRC_SLANT_0_0 +260 0x4000 //RX_FDDRC_SLANT_0_1 +261 0x4000 //RX_FDDRC_SLANT_0_2 +262 0x4000 //RX_FDDRC_SLANT_0_3 +263 0x7FFF //RX_FDDRC_SLANT_1_0 +264 0x7FFF //RX_FDDRC_SLANT_1_1 +265 0x7FFF //RX_FDDRC_SLANT_1_2 +266 0x7FFF //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +286 0x008E //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 +#VOL 6 +163 0x6000 //RX_TDDRC_ALPHA_UP_1 +164 0x6000 //RX_TDDRC_ALPHA_UP_2 +165 0x6000 //RX_TDDRC_ALPHA_UP_3 +166 0x1000 //RX_TDDRC_ALPHA_UP_4 +184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +190 0x7214 //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +269 0x0002 //RX_TDDRC_THRD_0 +270 0x0004 //RX_TDDRC_THRD_1 +271 0x1A00 //RX_TDDRC_THRD_2 +272 0x1A00 //RX_TDDRC_THRD_3 +273 0x7EB8 //RX_TDDRC_SLANT_0 +274 0x2500 //RX_TDDRC_SLANT_1 +275 0x6000 //RX_TDDRC_ALPHA_UP_0 +276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x199A //RX_TDDRC_HMNC_GAIN +279 0x0001 //RX_TDDRC_SMT_FLAG +280 0x0CCD //RX_TDDRC_SMT_W +281 0x0550 //RX_TDDRC_DRC_GAIN +195 0x0020 //RX_FDEQ_SUBNUM +196 0x4848 //RX_FDEQ_GAIN_0 +197 0x4848 //RX_FDEQ_GAIN_1 +198 0x4848 //RX_FDEQ_GAIN_2 +199 0x4848 //RX_FDEQ_GAIN_3 +200 0x5454 //RX_FDEQ_GAIN_4 +201 0x7C54 //RX_FDEQ_GAIN_5 +202 0x4850 //RX_FDEQ_GAIN_6 +203 0x4848 //RX_FDEQ_GAIN_7 +204 0x4860 //RX_FDEQ_GAIN_8 +205 0x7468 //RX_FDEQ_GAIN_9 +206 0x6060 //RX_FDEQ_GAIN_10 +207 0x6060 //RX_FDEQ_GAIN_11 +208 0x5C54 //RX_FDEQ_GAIN_12 +209 0x5450 //RX_FDEQ_GAIN_13 +210 0x5050 //RX_FDEQ_GAIN_14 +211 0x5860 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0202 //RX_FDEQ_BIN_0 +221 0x0203 //RX_FDEQ_BIN_1 +222 0x0303 //RX_FDEQ_BIN_2 +223 0x0304 //RX_FDEQ_BIN_3 +224 0x0404 //RX_FDEQ_BIN_4 +225 0x0308 //RX_FDEQ_BIN_5 +226 0x0808 //RX_FDEQ_BIN_6 +227 0x090A //RX_FDEQ_BIN_7 +228 0x0B0C //RX_FDEQ_BIN_8 +229 0x0D0E //RX_FDEQ_BIN_9 +230 0x1013 //RX_FDEQ_BIN_10 +231 0x1719 //RX_FDEQ_BIN_11 +232 0x1B1E //RX_FDEQ_BIN_12 +233 0x1E1E //RX_FDEQ_BIN_13 +234 0x1E28 //RX_FDEQ_BIN_14 +235 0x282C //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x4000 //RX_FDEQ_RESRV_0 +245 0x0320 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0035 //RX_FDDRC_BAND_MARGIN_1 +248 0x00D5 //RX_FDDRC_BAND_MARGIN_2 +249 0x0120 //RX_FDDRC_BAND_MARGIN_3 +250 0x0004 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x2000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x2000 //RX_FDDRC_THRD_3_2 +258 0x5000 //RX_FDDRC_THRD_3_3 +259 0x4000 //RX_FDDRC_SLANT_0_0 +260 0x4000 //RX_FDDRC_SLANT_0_1 +261 0x4000 //RX_FDDRC_SLANT_0_2 +262 0x4000 //RX_FDDRC_SLANT_0_3 +263 0x7FFF //RX_FDDRC_SLANT_1_0 +264 0x7FFF //RX_FDDRC_SLANT_1_1 +265 0x7FFF //RX_FDDRC_SLANT_1_2 +266 0x7FFF //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +286 0x0100 //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 -#CASE_NAME HANDSFREE-HANDSFREE-VOICE_GENERIC-FB -#PARAM_TYPE TX+RX -#TOTAL_CUSTOM_STEP 7 +#CASE_NAME HANDSFREE-HANDFREE-VOICE_GENERIC-FB +#PARAM_MODE FULL +#PARAM_TYPE TX+2RX +#TOTAL_CUSTOM_STEP 7+7 #TX 0 0x0001 //TX_OPERATION_MODE_0 1 0x0001 //TX_OPERATION_MODE_1 @@ -10776,11 +16279,11 @@ 248 0xF800 //TX_THR_SN_EST_6 249 0xF800 //TX_THR_SN_EST_7 250 0x0100 //TX_DELTA_THR_SN_EST_0 -251 0x0200 //TX_DELTA_THR_SN_EST_1 -252 0x0100 //TX_DELTA_THR_SN_EST_2 -253 0x0200 //TX_DELTA_THR_SN_EST_3 +251 0x0100 //TX_DELTA_THR_SN_EST_1 +252 0x0200 //TX_DELTA_THR_SN_EST_2 +253 0x0100 //TX_DELTA_THR_SN_EST_3 254 0x0100 //TX_DELTA_THR_SN_EST_4 -255 0x0100 //TX_DELTA_THR_SN_EST_5 +255 0x0200 //TX_DELTA_THR_SN_EST_5 256 0x0200 //TX_DELTA_THR_SN_EST_6 257 0x0200 //TX_DELTA_THR_SN_EST_7 258 0x4000 //TX_LAMBDA_NN_EST_0 @@ -10808,11 +16311,11 @@ 280 0x1000 //TX_B_POST_FLT_1 281 0x0010 //TX_NS_LVL_CTRL_0 282 0x0014 //TX_NS_LVL_CTRL_1 -283 0x0014 //TX_NS_LVL_CTRL_2 -284 0x0018 //TX_NS_LVL_CTRL_3 -285 0x0016 //TX_NS_LVL_CTRL_4 -286 0x0014 //TX_NS_LVL_CTRL_5 -287 0x0011 //TX_NS_LVL_CTRL_6 +283 0x0018 //TX_NS_LVL_CTRL_2 +284 0x0016 //TX_NS_LVL_CTRL_3 +285 0x0014 //TX_NS_LVL_CTRL_4 +286 0x0011 //TX_NS_LVL_CTRL_5 +287 0x0014 //TX_NS_LVL_CTRL_6 288 0x0011 //TX_NS_LVL_CTRL_7 289 0x000F //TX_MIN_GAIN_S_0 290 0x0010 //TX_MIN_GAIN_S_1 @@ -10830,8 +16333,8 @@ 302 0x4000 //TX_SNRI_SUP_2 303 0x4000 //TX_SNRI_SUP_3 304 0x4000 //TX_SNRI_SUP_4 -305 0x4000 //TX_SNRI_SUP_5 -306 0x50C0 //TX_SNRI_SUP_6 +305 0x50C0 //TX_SNRI_SUP_5 +306 0x4000 //TX_SNRI_SUP_6 307 0x7FFF //TX_SNRI_SUP_7 308 0x7FFF //TX_THR_LFNS 309 0x0018 //TX_G_LFNS @@ -10840,19 +16343,19 @@ 312 0x7FFF //TX_A_POST_FILT_0 313 0x2000 //TX_A_POST_FILT_1 314 0x5000 //TX_A_POST_FILT_S_0 -315 0x6000 //TX_A_POST_FILT_S_1 -316 0x4C00 //TX_A_POST_FILT_S_2 -317 0x4000 //TX_A_POST_FILT_S_3 -318 0x6000 //TX_A_POST_FILT_S_4 -319 0x4000 //TX_A_POST_FILT_S_5 -320 0x5000 //TX_A_POST_FILT_S_6 +315 0x4C00 //TX_A_POST_FILT_S_1 +316 0x4000 //TX_A_POST_FILT_S_2 +317 0x6000 //TX_A_POST_FILT_S_3 +318 0x4000 //TX_A_POST_FILT_S_4 +319 0x5000 //TX_A_POST_FILT_S_5 +320 0x6000 //TX_A_POST_FILT_S_6 321 0x7000 //TX_A_POST_FILT_S_7 322 0x2000 //TX_B_POST_FILT_0 -323 0x1000 //TX_B_POST_FILT_1 +323 0x2000 //TX_B_POST_FILT_1 324 0x2000 //TX_B_POST_FILT_2 -325 0x2000 //TX_B_POST_FILT_3 +325 0x4000 //TX_B_POST_FILT_3 326 0x4000 //TX_B_POST_FILT_4 -327 0x4000 //TX_B_POST_FILT_5 +327 0x1000 //TX_B_POST_FILT_5 328 0x1000 //TX_B_POST_FILT_6 329 0x2000 //TX_B_POST_FILT_7 330 0x4000 //TX_B_LESSCUT_RTO_S_0 @@ -10860,14 +16363,14 @@ 332 0x7FFF //TX_B_LESSCUT_RTO_S_2 333 0x7FFF //TX_B_LESSCUT_RTO_S_3 334 0x7FFF //TX_B_LESSCUT_RTO_S_4 -335 0x7FFF //TX_B_LESSCUT_RTO_S_5 -336 0x6000 //TX_B_LESSCUT_RTO_S_6 +335 0x6000 //TX_B_LESSCUT_RTO_S_5 +336 0x7FFF //TX_B_LESSCUT_RTO_S_6 337 0x7FFF //TX_B_LESSCUT_RTO_S_7 338 0x7C00 //TX_LAMBDA_PFILT 339 0x7C00 //TX_LAMBDA_PFILT_S_0 340 0x7C00 //TX_LAMBDA_PFILT_S_1 -341 0x7C00 //TX_LAMBDA_PFILT_S_2 -342 0x7A00 //TX_LAMBDA_PFILT_S_3 +341 0x7A00 //TX_LAMBDA_PFILT_S_2 +342 0x7C00 //TX_LAMBDA_PFILT_S_3 343 0x7C00 //TX_LAMBDA_PFILT_S_4 344 0x7C00 //TX_LAMBDA_PFILT_S_5 345 0x7C00 //TX_LAMBDA_PFILT_S_6 @@ -10905,10 +16408,10 @@ 377 0x7FFF //TX_NOISE_TH_5_4 378 0x2710 //TX_NOISE_TH_6 379 0x0033 //TX_MINENOISE_TH -380 0x4000 //TX_MINENOISE_MIC0_TH_MTS -381 0xFFEE //TX_MINENOISE_MIC0_TH_EXP -382 0x6000 //TX_MINENOISE_MIC0_S_TH_MTS -383 0xFFF3 //TX_MINENOISE_MIC0_S_TH_EXP +380 0xD508 //TX_MORENS_TFMASK_TH +381 0x0001 //TX_DRC_QUIET_FLOOR +382 0x7999 //TX_RATIODTL_CUT_TH +383 0x0119 //TX_DT_CUT_K1 384 0x0666 //TX_OUT_ENER_S_TH_CLEAN 385 0x0666 //TX_OUT_ENER_S_TH_LESSCLEAN 386 0x0333 //TX_OUT_ENER_S_TH_NOISY @@ -10916,15 +16419,15 @@ 388 0x0333 //TX_OUT_ENER_TH_SPEECH 389 0x2000 //TX_SN_NPB_GAIN 390 0x0000 //TX_NN_NPB_GAIN -391 0x0000 //TX_CSX_ALPHA_0 -392 0x0000 //TX_CSX_ALPHA_1 -393 0x0000 //TX_CSX_ALPHA_2 -394 0x0000 //TX_CSX_ALPHA_3 -395 0x0800 //TX_MU_ARSP_EST -396 0x00C8 //TX_P_OUTBEAM_MIN_TH +391 0x7FFF //TX_POST_MASK_SUP_HSNE +392 0x1388 //TX_TAIL_DET_TH +393 0x4000 //TX_B_LESSCUT_RTO_WTA +394 0x0000 //TX_MEL_G_R +395 0x0080 //TX_SUPHIGH_TH +396 0x0000 //TX_MASK_G_R 397 0x0002 //TX_EXTRA_NS_L -398 0x0800 //TX_EXTRA_NS_A -399 0x0005 //TX_VR_NOISE_FLOOR_TH +398 0x1800 //TX_C_POST_FLT_MASK +399 0x4000 //TX_A_POST_FLT_WNS 400 0x0148 //TX_MIN_G_LOW300HZ 401 0x0002 //TX_MAXLEVEL_CNG 402 0x00B4 //TX_STN_NOISE_TH @@ -11039,16 +16542,16 @@ 511 0x6666 //TX_MIC_TO_BFGAIN 512 0x0000 //TX_MICTOBFGAIN0 513 0x0000 //TX_FASTMUE_TH -514 0x0000 //TX_DERVB_LEN_0 -515 0x0000 //TX_DERVB_LEN_1 -516 0x0000 //TX_RHO_DERVB -517 0x0000 //TX_MIC_INDX_DERVB -518 0x0000 //TX_MU_DERVB -519 0x0000 //TX_DR_RESRV_0 -520 0x0000 //TX_DR_RESRV_1 -521 0x0000 //TX_DR_RESRV_2 -522 0x0000 //TX_DR_RESRV_3 -523 0x0000 //TX_DR_RESRV_4 +514 0x3000 //TX_DEREVERB_LF_MU +515 0x34CD //TX_DEREVERB_HF_MU +516 0x0007 //TX_DEREVERB_DELAY +517 0x0004 //TX_DEREVERB_COEF_LEN +518 0x0003 //TX_DEREVERB_DNR +519 0x0000 //TX_DEREVERB_ALPHA +520 0x0000 //TX_DEREVERB_BETA +521 0x3A98 //TX_GSC_RTOL_TH +522 0x3A98 //TX_GSC_RTOH_TH +523 0x7E2C //TX_WIDE2_MEANHTH 524 0x0000 //TX_DR_RESRV_5 525 0x0000 //TX_DR_RESRV_6 526 0x0000 //TX_DR_RESRV_7 @@ -11422,6 +16925,71 @@ 894 0xC000 //TX_FASTNS_SSA_THHFL 895 0xCCCC //TX_FASTNS_SSA_THLFH 896 0xD999 //TX_FASTNS_SSA_THHFH +897 0x2339 //TX_SENDFUNC_REG_MICMUTE +898 0x0021 //TX_SENDFUNC_REG_MICMUTE1 +899 0x02BC //TX_MICMUTE_RATIO_THR +900 0x0140 //TX_MICMUTE_AMP_THR +901 0x0004 //TX_MICMUTE_HPF_IND +902 0x00C0 //TX_MICMUTE_LOG_EYR_TH +903 0x0008 //TX_MICMUTE_CVG_TIME +904 0x0008 //TX_MICMUTE_RELEASE_TIME +905 0x01FE //TX_MIC_VOLUME_MIC0MUTE +906 0x0020 //TX_MICMUTE_EPD_OFFSET_0 +907 0x001E //TX_MICMUTE_FRQ_AEC_L +908 0x7999 //TX_MICMUTE_EAD_THR +909 0x7FFF //TX_MICMUTE_LAMBDA_CB_NLE +910 0x7FFF //TX_MICMUTE_LAMBDA_RE_EST +911 0x4000 //TX_DTD_THR1_MICMUTE_0 +912 0x7000 //TX_DTD_THR1_MICMUTE_1 +913 0x7FFF //TX_DTD_THR1_MICMUTE_2 +914 0x7FFF //TX_DTD_THR1_MICMUTE_3 +915 0x6CCC //TX_DTD_THR2_MICMUTE_0 +916 0x0400 //TX_MICMUTE_MIN_EQ_RE_EST_0 +917 0x0400 //TX_MICMUTE_MIN_EQ_RE_EST_1 +918 0x1000 //TX_MICMUTE_MIN_EQ_RE_EST_2 +919 0x7FFF //TX_MICMUTE_MIN_EQ_RE_EST_3 +920 0x7FFF //TX_MICMUTE_MIN_EQ_RE_EST_4 +921 0x4000 //TX_MICMUTE_C_POST_FLT +922 0x03E8 //TX_MICMUTE_DT_CUT_K +923 0x0001 //TX_MICMUTE_DT_CUT_THR +924 0x03E8 //TX_MICMUTE_DT_CUT_K2 +925 0x0001 //TX_MICMUTE_DT_CUT_THR2 +926 0x0064 //TX_MICMUTE_DT2_HOLD_N +927 0x1000 //TX_MICMUTE_RATIODTH_THCUT +928 0x1000 //TX_MICMUTE_B_POST_FLT_ECHOL +929 0x7FFF //TX_MICMUTE_B_POST_FLT_ECHOH +930 0x0400 //TX_MICMUTE_C_POST_FLT_MASK +931 0x7999 //TX_MICMUTE_RATIODTL_CUT_TH +932 0x0258 //TX_MICMUTE_DT_CUT_K1 +933 0x0800 //TX_MICMUTE_N2_SN_EST +934 0xFC00 //TX_MICMUTE_THR_SN_EST_0 +935 0x001C //TX_MICMUTE_MIN_G_CTRL_0 +936 0x6000 //TX_MICMUTE_A_POST_FILT_S_0 +937 0x7000 //TX_MICMUTE_B_POST_FILT_0 +938 0x2710 //TX_MIC1RUB_AMP_THR +939 0x0010 //TX_MIC1MUTE_RATIO_THR +940 0x0450 //TX_MIC1MUTE_AMP_THR +941 0x0008 //TX_MIC1MUTE_CVG_TIME +942 0x0008 //TX_MIC1MUTE_RELEASE_TIME +943 0x0000 //TX_AMS_RESRV_01 +944 0x0000 //TX_AMS_RESRV_02 +945 0x0000 //TX_AMS_RESRV_03 +946 0x0000 //TX_AMS_RESRV_04 +947 0x0000 //TX_AMS_RESRV_05 +948 0x0000 //TX_AMS_RESRV_06 +949 0x0000 //TX_AMS_RESRV_07 +950 0x0000 //TX_AMS_RESRV_08 +951 0x0000 //TX_AMS_RESRV_09 +952 0x0000 //TX_AMS_RESRV_10 +953 0x0000 //TX_AMS_RESRV_11 +954 0x0000 //TX_AMS_RESRV_12 +955 0x0000 //TX_AMS_RESRV_13 +956 0x0000 //TX_AMS_RESRV_14 +957 0x0000 //TX_AMS_RESRV_15 +958 0x0000 //TX_AMS_RESRV_16 +959 0x0000 //TX_AMS_RESRV_17 +960 0x0000 //TX_AMS_RESRV_18 +961 0x0000 //TX_AMS_RESRV_19 #RX 0 0x006C //RX_RECVFUNC_MODE_0 1 0x0000 //RX_RECVFUNC_MODE_1 @@ -12273,4 +17841,855 @@ 110 0x0000 //RX_FDDRC_RESRV_0 129 0x0100 //RX_SPK_VOL 130 0x0000 //RX_VOL_RESRV_0 +#RX 2 +157 0x006C //_ +158 0x0000 //_ +159 0x0004 //_ +160 0x0004 //_ +161 0x000A //_ +162 0x0000 //_ +163 0x4000 //_ +164 0x4000 //_ +165 0x4000 //_ +166 0x4000 //_ +167 0x065B //_ +168 0x7E56 //_ +169 0x4000 //_ +170 0x7800 //_ +171 0x7000 //_ +172 0x6000 //_ +173 0x0008 //_ +174 0x0003 //_ +175 0x0100 //_ +176 0x0020 //_ +177 0x0400 //_ +178 0x000C //_ +179 0x0014 //_ +180 0xF400 //_ +181 0x7E00 //_ +182 0x000A //_ +183 0x0190 //_ +184 0x7EB8 //_ +185 0x7EB8 //_ +186 0x7EB8 //_ +187 0x0002 //_ +188 0x0800 //_ +189 0x7EB8 //_ +190 0x7FFF //_ +191 0x0800 //_ +192 0x199A //_ +193 0x0000 //_ +194 0x4000 //_ +195 0x0020 //_ +196 0x4848 //_ +197 0x4848 //_ +198 0x4848 //_ +199 0x4870 //_ +200 0x4848 //_ +201 0x4848 //_ +202 0x4850 //_ +203 0x485C //_ +204 0x5C60 //_ +205 0x685C //_ +206 0x5640 //_ +207 0x4040 //_ +208 0x5C58 //_ +209 0x5C60 //_ +210 0x6060 //_ +211 0x6060 //_ +212 0x4848 //_ +213 0x4848 //_ +214 0x4848 //_ +215 0x4848 //_ +216 0x4848 //_ +217 0x4848 //_ +218 0x4848 //_ +219 0x4848 //_ +220 0x0202 //_ +221 0x0203 //_ +222 0x0303 //_ +223 0x0402 //_ +224 0x0504 //_ +225 0x0209 //_ +226 0x0808 //_ +227 0x090A //_ +228 0x0B0C //_ +229 0x0D0E //_ +230 0x1013 //_ +231 0x1719 //_ +232 0x1B1E //_ +233 0x1E1E //_ +234 0x1E28 //_ +235 0x282C //_ +236 0x0000 //_ +237 0x0000 //_ +238 0x0000 //_ +239 0x0000 //_ +240 0x0000 //_ +241 0x0000 //_ +242 0x0000 //_ +243 0x0000 //_ +244 0x4000 //_ +245 0x0320 //_ +246 0x0018 //_ +247 0x0030 //_ +248 0x0050 //_ +249 0x0080 //_ +250 0x0004 //_ +251 0x5000 //_ +252 0x5000 //_ +253 0x2000 //_ +254 0x5000 //_ +255 0x6400 //_ +256 0x6400 //_ +257 0x2000 //_ +258 0x5000 //_ +259 0x4000 //_ +260 0x4000 //_ +261 0x4000 //_ +262 0x4000 //_ +263 0x7FFF //_ +264 0x7FFF //_ +265 0x7FFF //_ +266 0x7FFF //_ +267 0x0000 //_ +268 0x0002 //_ +269 0x0001 //_ +270 0x0002 //_ +271 0x1800 //_ +272 0x1800 //_ +273 0x6000 //_ +274 0x6E00 //_ +275 0x4000 //_ +276 0x7EB8 //_ +277 0x0000 //_ +278 0x199A //_ +279 0x0001 //_ +280 0x0CCD //_ +281 0x03C3 //_ +282 0x7C00 //_ +283 0x2000 //_ +284 0x2000 //_ +285 0x0080 //_ +286 0x0012 //_ +287 0x0000 //_ +288 0x0000 //_ +289 0x3000 //_ +290 0x3000 //_ +291 0x1800 //_ +292 0x1000 //_ +293 0x04CD //_ +294 0x0F33 //_ +295 0x7333 //_ +296 0x199A //_ +297 0x7333 //_ +298 0x0004 //_ +299 0x6CCD //_ +300 0x799A //_ +301 0x001E //_ +302 0x3000 //_ +303 0x3200 //_ +304 0x2000 //_ +305 0x2000 //_ +306 0x2000 //_ +307 0x2000 //_ +308 0x2000 //_ +309 0x2000 //_ +310 0x2000 //_ +311 0x0000 //_ +312 0x0000 //_ +313 0x0000 //_ +#VOL 0 +163 0x4000 //RX_TDDRC_ALPHA_UP_1 +164 0x4000 //RX_TDDRC_ALPHA_UP_2 +165 0x4000 //RX_TDDRC_ALPHA_UP_3 +166 0x4000 //RX_TDDRC_ALPHA_UP_4 +184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +190 0x7FFF //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +269 0x0001 //RX_TDDRC_THRD_0 +270 0x0002 //RX_TDDRC_THRD_1 +271 0x1800 //RX_TDDRC_THRD_2 +272 0x1800 //RX_TDDRC_THRD_3 +273 0x6000 //RX_TDDRC_SLANT_0 +274 0x6E00 //RX_TDDRC_SLANT_1 +275 0x4000 //RX_TDDRC_ALPHA_UP_0 +276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x199A //RX_TDDRC_HMNC_GAIN +279 0x0001 //RX_TDDRC_SMT_FLAG +280 0x0CCD //RX_TDDRC_SMT_W +281 0x03C3 //RX_TDDRC_DRC_GAIN +195 0x0020 //RX_FDEQ_SUBNUM +196 0x4848 //RX_FDEQ_GAIN_0 +197 0x4848 //RX_FDEQ_GAIN_1 +198 0x4848 //RX_FDEQ_GAIN_2 +199 0x4870 //RX_FDEQ_GAIN_3 +200 0x4848 //RX_FDEQ_GAIN_4 +201 0x4848 //RX_FDEQ_GAIN_5 +202 0x4850 //RX_FDEQ_GAIN_6 +203 0x485C //RX_FDEQ_GAIN_7 +204 0x5C60 //RX_FDEQ_GAIN_8 +205 0x685C //RX_FDEQ_GAIN_9 +206 0x5640 //RX_FDEQ_GAIN_10 +207 0x4040 //RX_FDEQ_GAIN_11 +208 0x5C58 //RX_FDEQ_GAIN_12 +209 0x5C60 //RX_FDEQ_GAIN_13 +210 0x6060 //RX_FDEQ_GAIN_14 +211 0x6060 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0202 //RX_FDEQ_BIN_0 +221 0x0203 //RX_FDEQ_BIN_1 +222 0x0303 //RX_FDEQ_BIN_2 +223 0x0402 //RX_FDEQ_BIN_3 +224 0x0504 //RX_FDEQ_BIN_4 +225 0x0209 //RX_FDEQ_BIN_5 +226 0x0808 //RX_FDEQ_BIN_6 +227 0x090A //RX_FDEQ_BIN_7 +228 0x0B0C //RX_FDEQ_BIN_8 +229 0x0D0E //RX_FDEQ_BIN_9 +230 0x1013 //RX_FDEQ_BIN_10 +231 0x1719 //RX_FDEQ_BIN_11 +232 0x1B1E //RX_FDEQ_BIN_12 +233 0x1E1E //RX_FDEQ_BIN_13 +234 0x1E28 //RX_FDEQ_BIN_14 +235 0x282C //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x4000 //RX_FDEQ_RESRV_0 +245 0x0320 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0030 //RX_FDDRC_BAND_MARGIN_1 +248 0x0050 //RX_FDDRC_BAND_MARGIN_2 +249 0x0080 //RX_FDDRC_BAND_MARGIN_3 +250 0x0004 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x2000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x2000 //RX_FDDRC_THRD_3_2 +258 0x5000 //RX_FDDRC_THRD_3_3 +259 0x4000 //RX_FDDRC_SLANT_0_0 +260 0x4000 //RX_FDDRC_SLANT_0_1 +261 0x4000 //RX_FDDRC_SLANT_0_2 +262 0x4000 //RX_FDDRC_SLANT_0_3 +263 0x7FFF //RX_FDDRC_SLANT_1_0 +264 0x7FFF //RX_FDDRC_SLANT_1_1 +265 0x7FFF //RX_FDDRC_SLANT_1_2 +266 0x7FFF //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +286 0x0012 //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 +#VOL 1 +163 0x4000 //RX_TDDRC_ALPHA_UP_1 +164 0x4000 //RX_TDDRC_ALPHA_UP_2 +165 0x4000 //RX_TDDRC_ALPHA_UP_3 +166 0x4000 //RX_TDDRC_ALPHA_UP_4 +184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +190 0x7FFF //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +269 0x0001 //RX_TDDRC_THRD_0 +270 0x0002 //RX_TDDRC_THRD_1 +271 0x1800 //RX_TDDRC_THRD_2 +272 0x1800 //RX_TDDRC_THRD_3 +273 0x6000 //RX_TDDRC_SLANT_0 +274 0x6E00 //RX_TDDRC_SLANT_1 +275 0x4000 //RX_TDDRC_ALPHA_UP_0 +276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x199A //RX_TDDRC_HMNC_GAIN +279 0x0001 //RX_TDDRC_SMT_FLAG +280 0x0CCD //RX_TDDRC_SMT_W +281 0x03C3 //RX_TDDRC_DRC_GAIN +195 0x0020 //RX_FDEQ_SUBNUM +196 0x4848 //RX_FDEQ_GAIN_0 +197 0x4848 //RX_FDEQ_GAIN_1 +198 0x4848 //RX_FDEQ_GAIN_2 +199 0x4870 //RX_FDEQ_GAIN_3 +200 0x4848 //RX_FDEQ_GAIN_4 +201 0x4848 //RX_FDEQ_GAIN_5 +202 0x4850 //RX_FDEQ_GAIN_6 +203 0x485C //RX_FDEQ_GAIN_7 +204 0x5C60 //RX_FDEQ_GAIN_8 +205 0x685C //RX_FDEQ_GAIN_9 +206 0x5640 //RX_FDEQ_GAIN_10 +207 0x4040 //RX_FDEQ_GAIN_11 +208 0x5C58 //RX_FDEQ_GAIN_12 +209 0x5C60 //RX_FDEQ_GAIN_13 +210 0x6060 //RX_FDEQ_GAIN_14 +211 0x6060 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0202 //RX_FDEQ_BIN_0 +221 0x0203 //RX_FDEQ_BIN_1 +222 0x0303 //RX_FDEQ_BIN_2 +223 0x0402 //RX_FDEQ_BIN_3 +224 0x0504 //RX_FDEQ_BIN_4 +225 0x0209 //RX_FDEQ_BIN_5 +226 0x0808 //RX_FDEQ_BIN_6 +227 0x090A //RX_FDEQ_BIN_7 +228 0x0B0C //RX_FDEQ_BIN_8 +229 0x0D0E //RX_FDEQ_BIN_9 +230 0x1013 //RX_FDEQ_BIN_10 +231 0x1719 //RX_FDEQ_BIN_11 +232 0x1B1E //RX_FDEQ_BIN_12 +233 0x1E1E //RX_FDEQ_BIN_13 +234 0x1E28 //RX_FDEQ_BIN_14 +235 0x282C //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x4000 //RX_FDEQ_RESRV_0 +245 0x0320 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0030 //RX_FDDRC_BAND_MARGIN_1 +248 0x0050 //RX_FDDRC_BAND_MARGIN_2 +249 0x0080 //RX_FDDRC_BAND_MARGIN_3 +250 0x0004 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x2000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x2000 //RX_FDDRC_THRD_3_2 +258 0x5000 //RX_FDDRC_THRD_3_3 +259 0x4000 //RX_FDDRC_SLANT_0_0 +260 0x4000 //RX_FDDRC_SLANT_0_1 +261 0x4000 //RX_FDDRC_SLANT_0_2 +262 0x4000 //RX_FDDRC_SLANT_0_3 +263 0x7FFF //RX_FDDRC_SLANT_1_0 +264 0x7FFF //RX_FDDRC_SLANT_1_1 +265 0x7FFF //RX_FDDRC_SLANT_1_2 +266 0x7FFF //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +286 0x001A //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 +#VOL 2 +163 0x4000 //RX_TDDRC_ALPHA_UP_1 +164 0x4000 //RX_TDDRC_ALPHA_UP_2 +165 0x4000 //RX_TDDRC_ALPHA_UP_3 +166 0x4000 //RX_TDDRC_ALPHA_UP_4 +184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +190 0x7FFF //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +269 0x0001 //RX_TDDRC_THRD_0 +270 0x0002 //RX_TDDRC_THRD_1 +271 0x1800 //RX_TDDRC_THRD_2 +272 0x1800 //RX_TDDRC_THRD_3 +273 0x6000 //RX_TDDRC_SLANT_0 +274 0x6E00 //RX_TDDRC_SLANT_1 +275 0x4000 //RX_TDDRC_ALPHA_UP_0 +276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x199A //RX_TDDRC_HMNC_GAIN +279 0x0001 //RX_TDDRC_SMT_FLAG +280 0x0CCD //RX_TDDRC_SMT_W +281 0x03C3 //RX_TDDRC_DRC_GAIN +195 0x0020 //RX_FDEQ_SUBNUM +196 0x4848 //RX_FDEQ_GAIN_0 +197 0x4848 //RX_FDEQ_GAIN_1 +198 0x4848 //RX_FDEQ_GAIN_2 +199 0x4870 //RX_FDEQ_GAIN_3 +200 0x4848 //RX_FDEQ_GAIN_4 +201 0x4848 //RX_FDEQ_GAIN_5 +202 0x4850 //RX_FDEQ_GAIN_6 +203 0x485C //RX_FDEQ_GAIN_7 +204 0x5C60 //RX_FDEQ_GAIN_8 +205 0x685C //RX_FDEQ_GAIN_9 +206 0x5640 //RX_FDEQ_GAIN_10 +207 0x4040 //RX_FDEQ_GAIN_11 +208 0x5C58 //RX_FDEQ_GAIN_12 +209 0x5C60 //RX_FDEQ_GAIN_13 +210 0x6060 //RX_FDEQ_GAIN_14 +211 0x6060 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0202 //RX_FDEQ_BIN_0 +221 0x0203 //RX_FDEQ_BIN_1 +222 0x0303 //RX_FDEQ_BIN_2 +223 0x0402 //RX_FDEQ_BIN_3 +224 0x0504 //RX_FDEQ_BIN_4 +225 0x0209 //RX_FDEQ_BIN_5 +226 0x0808 //RX_FDEQ_BIN_6 +227 0x090A //RX_FDEQ_BIN_7 +228 0x0B0C //RX_FDEQ_BIN_8 +229 0x0D0E //RX_FDEQ_BIN_9 +230 0x1013 //RX_FDEQ_BIN_10 +231 0x1719 //RX_FDEQ_BIN_11 +232 0x1B1E //RX_FDEQ_BIN_12 +233 0x1E1E //RX_FDEQ_BIN_13 +234 0x1E28 //RX_FDEQ_BIN_14 +235 0x282C //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x4000 //RX_FDEQ_RESRV_0 +245 0x0320 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0030 //RX_FDDRC_BAND_MARGIN_1 +248 0x0050 //RX_FDDRC_BAND_MARGIN_2 +249 0x0080 //RX_FDDRC_BAND_MARGIN_3 +250 0x0004 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x2000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x2000 //RX_FDDRC_THRD_3_2 +258 0x5000 //RX_FDDRC_THRD_3_3 +259 0x4000 //RX_FDDRC_SLANT_0_0 +260 0x4000 //RX_FDDRC_SLANT_0_1 +261 0x4000 //RX_FDDRC_SLANT_0_2 +262 0x4000 //RX_FDDRC_SLANT_0_3 +263 0x7FFF //RX_FDDRC_SLANT_1_0 +264 0x7FFF //RX_FDDRC_SLANT_1_1 +265 0x7FFF //RX_FDDRC_SLANT_1_2 +266 0x7FFF //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +286 0x0025 //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 +#VOL 3 +163 0x4000 //RX_TDDRC_ALPHA_UP_1 +164 0x4000 //RX_TDDRC_ALPHA_UP_2 +165 0x4000 //RX_TDDRC_ALPHA_UP_3 +166 0x4000 //RX_TDDRC_ALPHA_UP_4 +184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +190 0x7FFF //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +269 0x0001 //RX_TDDRC_THRD_0 +270 0x0002 //RX_TDDRC_THRD_1 +271 0x1800 //RX_TDDRC_THRD_2 +272 0x1800 //RX_TDDRC_THRD_3 +273 0x6000 //RX_TDDRC_SLANT_0 +274 0x6E00 //RX_TDDRC_SLANT_1 +275 0x4000 //RX_TDDRC_ALPHA_UP_0 +276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x199A //RX_TDDRC_HMNC_GAIN +279 0x0001 //RX_TDDRC_SMT_FLAG +280 0x0CCD //RX_TDDRC_SMT_W +281 0x03C3 //RX_TDDRC_DRC_GAIN +195 0x0020 //RX_FDEQ_SUBNUM +196 0x4848 //RX_FDEQ_GAIN_0 +197 0x4848 //RX_FDEQ_GAIN_1 +198 0x4848 //RX_FDEQ_GAIN_2 +199 0x4870 //RX_FDEQ_GAIN_3 +200 0x4848 //RX_FDEQ_GAIN_4 +201 0x4848 //RX_FDEQ_GAIN_5 +202 0x4850 //RX_FDEQ_GAIN_6 +203 0x485C //RX_FDEQ_GAIN_7 +204 0x5C60 //RX_FDEQ_GAIN_8 +205 0x685C //RX_FDEQ_GAIN_9 +206 0x5640 //RX_FDEQ_GAIN_10 +207 0x4040 //RX_FDEQ_GAIN_11 +208 0x5C58 //RX_FDEQ_GAIN_12 +209 0x5C60 //RX_FDEQ_GAIN_13 +210 0x6060 //RX_FDEQ_GAIN_14 +211 0x6060 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0202 //RX_FDEQ_BIN_0 +221 0x0203 //RX_FDEQ_BIN_1 +222 0x0303 //RX_FDEQ_BIN_2 +223 0x0402 //RX_FDEQ_BIN_3 +224 0x0504 //RX_FDEQ_BIN_4 +225 0x0209 //RX_FDEQ_BIN_5 +226 0x0808 //RX_FDEQ_BIN_6 +227 0x090A //RX_FDEQ_BIN_7 +228 0x0B0C //RX_FDEQ_BIN_8 +229 0x0D0E //RX_FDEQ_BIN_9 +230 0x1013 //RX_FDEQ_BIN_10 +231 0x1719 //RX_FDEQ_BIN_11 +232 0x1B1E //RX_FDEQ_BIN_12 +233 0x1E1E //RX_FDEQ_BIN_13 +234 0x1E28 //RX_FDEQ_BIN_14 +235 0x282C //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x4000 //RX_FDEQ_RESRV_0 +245 0x0320 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0030 //RX_FDDRC_BAND_MARGIN_1 +248 0x0050 //RX_FDDRC_BAND_MARGIN_2 +249 0x0080 //RX_FDDRC_BAND_MARGIN_3 +250 0x0004 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x2000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x2000 //RX_FDDRC_THRD_3_2 +258 0x5000 //RX_FDDRC_THRD_3_3 +259 0x4000 //RX_FDDRC_SLANT_0_0 +260 0x4000 //RX_FDDRC_SLANT_0_1 +261 0x4000 //RX_FDDRC_SLANT_0_2 +262 0x4000 //RX_FDDRC_SLANT_0_3 +263 0x7FFF //RX_FDDRC_SLANT_1_0 +264 0x7FFF //RX_FDDRC_SLANT_1_1 +265 0x7FFF //RX_FDDRC_SLANT_1_2 +266 0x7FFF //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +286 0x0034 //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 +#VOL 4 +163 0x4000 //RX_TDDRC_ALPHA_UP_1 +164 0x4000 //RX_TDDRC_ALPHA_UP_2 +165 0x4000 //RX_TDDRC_ALPHA_UP_3 +166 0x4000 //RX_TDDRC_ALPHA_UP_4 +184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +190 0x7FFF //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +269 0x0001 //RX_TDDRC_THRD_0 +270 0x0002 //RX_TDDRC_THRD_1 +271 0x1800 //RX_TDDRC_THRD_2 +272 0x1800 //RX_TDDRC_THRD_3 +273 0x6000 //RX_TDDRC_SLANT_0 +274 0x6E00 //RX_TDDRC_SLANT_1 +275 0x4000 //RX_TDDRC_ALPHA_UP_0 +276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x199A //RX_TDDRC_HMNC_GAIN +279 0x0001 //RX_TDDRC_SMT_FLAG +280 0x0CCD //RX_TDDRC_SMT_W +281 0x03C3 //RX_TDDRC_DRC_GAIN +195 0x0020 //RX_FDEQ_SUBNUM +196 0x4848 //RX_FDEQ_GAIN_0 +197 0x4848 //RX_FDEQ_GAIN_1 +198 0x4848 //RX_FDEQ_GAIN_2 +199 0x4870 //RX_FDEQ_GAIN_3 +200 0x4848 //RX_FDEQ_GAIN_4 +201 0x4848 //RX_FDEQ_GAIN_5 +202 0x4850 //RX_FDEQ_GAIN_6 +203 0x485C //RX_FDEQ_GAIN_7 +204 0x5C60 //RX_FDEQ_GAIN_8 +205 0x685C //RX_FDEQ_GAIN_9 +206 0x5640 //RX_FDEQ_GAIN_10 +207 0x4040 //RX_FDEQ_GAIN_11 +208 0x5C58 //RX_FDEQ_GAIN_12 +209 0x5C60 //RX_FDEQ_GAIN_13 +210 0x6060 //RX_FDEQ_GAIN_14 +211 0x6060 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0202 //RX_FDEQ_BIN_0 +221 0x0203 //RX_FDEQ_BIN_1 +222 0x0303 //RX_FDEQ_BIN_2 +223 0x0402 //RX_FDEQ_BIN_3 +224 0x0504 //RX_FDEQ_BIN_4 +225 0x0209 //RX_FDEQ_BIN_5 +226 0x0808 //RX_FDEQ_BIN_6 +227 0x090A //RX_FDEQ_BIN_7 +228 0x0B0C //RX_FDEQ_BIN_8 +229 0x0D0E //RX_FDEQ_BIN_9 +230 0x1013 //RX_FDEQ_BIN_10 +231 0x1719 //RX_FDEQ_BIN_11 +232 0x1B1E //RX_FDEQ_BIN_12 +233 0x1E1E //RX_FDEQ_BIN_13 +234 0x1E28 //RX_FDEQ_BIN_14 +235 0x282C //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x4000 //RX_FDEQ_RESRV_0 +245 0x0320 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0030 //RX_FDDRC_BAND_MARGIN_1 +248 0x0050 //RX_FDDRC_BAND_MARGIN_2 +249 0x0080 //RX_FDDRC_BAND_MARGIN_3 +250 0x0004 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x2000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x2000 //RX_FDDRC_THRD_3_2 +258 0x5000 //RX_FDDRC_THRD_3_3 +259 0x4000 //RX_FDDRC_SLANT_0_0 +260 0x4000 //RX_FDDRC_SLANT_0_1 +261 0x4000 //RX_FDDRC_SLANT_0_2 +262 0x4000 //RX_FDDRC_SLANT_0_3 +263 0x7FFF //RX_FDDRC_SLANT_1_0 +264 0x7FFF //RX_FDDRC_SLANT_1_1 +265 0x7FFF //RX_FDDRC_SLANT_1_2 +266 0x7FFF //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +286 0x004D //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 +#VOL 5 +163 0x4000 //RX_TDDRC_ALPHA_UP_1 +164 0x4000 //RX_TDDRC_ALPHA_UP_2 +165 0x4000 //RX_TDDRC_ALPHA_UP_3 +166 0x4000 //RX_TDDRC_ALPHA_UP_4 +184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +190 0x7FFF //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +269 0x0001 //RX_TDDRC_THRD_0 +270 0x0002 //RX_TDDRC_THRD_1 +271 0x1800 //RX_TDDRC_THRD_2 +272 0x1800 //RX_TDDRC_THRD_3 +273 0x6000 //RX_TDDRC_SLANT_0 +274 0x6E00 //RX_TDDRC_SLANT_1 +275 0x4000 //RX_TDDRC_ALPHA_UP_0 +276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x199A //RX_TDDRC_HMNC_GAIN +279 0x0001 //RX_TDDRC_SMT_FLAG +280 0x0CCD //RX_TDDRC_SMT_W +281 0x03C3 //RX_TDDRC_DRC_GAIN +195 0x0020 //RX_FDEQ_SUBNUM +196 0x4848 //RX_FDEQ_GAIN_0 +197 0x4848 //RX_FDEQ_GAIN_1 +198 0x4848 //RX_FDEQ_GAIN_2 +199 0x4870 //RX_FDEQ_GAIN_3 +200 0x4848 //RX_FDEQ_GAIN_4 +201 0x4848 //RX_FDEQ_GAIN_5 +202 0x4850 //RX_FDEQ_GAIN_6 +203 0x485C //RX_FDEQ_GAIN_7 +204 0x5C60 //RX_FDEQ_GAIN_8 +205 0x685C //RX_FDEQ_GAIN_9 +206 0x5640 //RX_FDEQ_GAIN_10 +207 0x4040 //RX_FDEQ_GAIN_11 +208 0x5C58 //RX_FDEQ_GAIN_12 +209 0x5C60 //RX_FDEQ_GAIN_13 +210 0x6060 //RX_FDEQ_GAIN_14 +211 0x6060 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0202 //RX_FDEQ_BIN_0 +221 0x0203 //RX_FDEQ_BIN_1 +222 0x0303 //RX_FDEQ_BIN_2 +223 0x0402 //RX_FDEQ_BIN_3 +224 0x0504 //RX_FDEQ_BIN_4 +225 0x0209 //RX_FDEQ_BIN_5 +226 0x0808 //RX_FDEQ_BIN_6 +227 0x090A //RX_FDEQ_BIN_7 +228 0x0B0C //RX_FDEQ_BIN_8 +229 0x0D0E //RX_FDEQ_BIN_9 +230 0x1013 //RX_FDEQ_BIN_10 +231 0x1719 //RX_FDEQ_BIN_11 +232 0x1B1E //RX_FDEQ_BIN_12 +233 0x1E1E //RX_FDEQ_BIN_13 +234 0x1E28 //RX_FDEQ_BIN_14 +235 0x282C //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x4000 //RX_FDEQ_RESRV_0 +245 0x0320 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0030 //RX_FDDRC_BAND_MARGIN_1 +248 0x0050 //RX_FDDRC_BAND_MARGIN_2 +249 0x0080 //RX_FDDRC_BAND_MARGIN_3 +250 0x0004 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x2000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x2000 //RX_FDDRC_THRD_3_2 +258 0x5000 //RX_FDDRC_THRD_3_3 +259 0x4000 //RX_FDDRC_SLANT_0_0 +260 0x4000 //RX_FDDRC_SLANT_0_1 +261 0x4000 //RX_FDDRC_SLANT_0_2 +262 0x4000 //RX_FDDRC_SLANT_0_3 +263 0x7FFF //RX_FDDRC_SLANT_1_0 +264 0x7FFF //RX_FDDRC_SLANT_1_1 +265 0x7FFF //RX_FDDRC_SLANT_1_2 +266 0x7FFF //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +286 0x0074 //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 +#VOL 6 +163 0x4000 //RX_TDDRC_ALPHA_UP_1 +164 0x4000 //RX_TDDRC_ALPHA_UP_2 +165 0x4000 //RX_TDDRC_ALPHA_UP_3 +166 0x4000 //RX_TDDRC_ALPHA_UP_4 +184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +190 0x7FFF //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +269 0x0001 //RX_TDDRC_THRD_0 +270 0x0002 //RX_TDDRC_THRD_1 +271 0x1800 //RX_TDDRC_THRD_2 +272 0x1800 //RX_TDDRC_THRD_3 +273 0x6000 //RX_TDDRC_SLANT_0 +274 0x6E00 //RX_TDDRC_SLANT_1 +275 0x4000 //RX_TDDRC_ALPHA_UP_0 +276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x199A //RX_TDDRC_HMNC_GAIN +279 0x0001 //RX_TDDRC_SMT_FLAG +280 0x0CCD //RX_TDDRC_SMT_W +281 0x03C3 //RX_TDDRC_DRC_GAIN +195 0x0020 //RX_FDEQ_SUBNUM +196 0x4848 //RX_FDEQ_GAIN_0 +197 0x4848 //RX_FDEQ_GAIN_1 +198 0x4848 //RX_FDEQ_GAIN_2 +199 0x4870 //RX_FDEQ_GAIN_3 +200 0x4848 //RX_FDEQ_GAIN_4 +201 0x4848 //RX_FDEQ_GAIN_5 +202 0x4850 //RX_FDEQ_GAIN_6 +203 0x485C //RX_FDEQ_GAIN_7 +204 0x5C60 //RX_FDEQ_GAIN_8 +205 0x685C //RX_FDEQ_GAIN_9 +206 0x5640 //RX_FDEQ_GAIN_10 +207 0x4040 //RX_FDEQ_GAIN_11 +208 0x5C58 //RX_FDEQ_GAIN_12 +209 0x5C60 //RX_FDEQ_GAIN_13 +210 0x6060 //RX_FDEQ_GAIN_14 +211 0x6060 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0202 //RX_FDEQ_BIN_0 +221 0x0203 //RX_FDEQ_BIN_1 +222 0x0303 //RX_FDEQ_BIN_2 +223 0x0402 //RX_FDEQ_BIN_3 +224 0x0504 //RX_FDEQ_BIN_4 +225 0x0209 //RX_FDEQ_BIN_5 +226 0x0808 //RX_FDEQ_BIN_6 +227 0x090A //RX_FDEQ_BIN_7 +228 0x0B0C //RX_FDEQ_BIN_8 +229 0x0D0E //RX_FDEQ_BIN_9 +230 0x1013 //RX_FDEQ_BIN_10 +231 0x1719 //RX_FDEQ_BIN_11 +232 0x1B1E //RX_FDEQ_BIN_12 +233 0x1E1E //RX_FDEQ_BIN_13 +234 0x1E28 //RX_FDEQ_BIN_14 +235 0x282C //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x4000 //RX_FDEQ_RESRV_0 +245 0x0320 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0030 //RX_FDDRC_BAND_MARGIN_1 +248 0x0050 //RX_FDDRC_BAND_MARGIN_2 +249 0x0080 //RX_FDDRC_BAND_MARGIN_3 +250 0x0004 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x2000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x2000 //RX_FDDRC_THRD_3_2 +258 0x5000 //RX_FDDRC_THRD_3_3 +259 0x4000 //RX_FDDRC_SLANT_0_0 +260 0x4000 //RX_FDDRC_SLANT_0_1 +261 0x4000 //RX_FDDRC_SLANT_0_2 +262 0x4000 //RX_FDDRC_SLANT_0_3 +263 0x7FFF //RX_FDDRC_SLANT_1_0 +264 0x7FFF //RX_FDDRC_SLANT_1_1 +265 0x7FFF //RX_FDDRC_SLANT_1_2 +266 0x7FFF //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +286 0x0100 //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 diff --git a/audio/cloudripper/tuning/fortemedia/HEADSET.dat b/audio/cloudripper/tuning/fortemedia/HEADSET.dat index 99a8c1c..22e3e30 100644 Binary files a/audio/cloudripper/tuning/fortemedia/HEADSET.dat and b/audio/cloudripper/tuning/fortemedia/HEADSET.dat differ diff --git a/audio/cloudripper/tuning/fortemedia/HEADSET.mods b/audio/cloudripper/tuning/fortemedia/HEADSET.mods index 59f0067..ac10ce5 100644 --- a/audio/cloudripper/tuning/fortemedia/HEADSET.mods +++ b/audio/cloudripper/tuning/fortemedia/HEADSET.mods @@ -1,12 +1,12 @@ #PLATFORM_NAME gChip #EXPORT_FLAG HEADSET -#SINGLE_API_VER 1.1.6 -#SAVE_TIME 2022-01-04 15:20:23 +#SINGLE_API_VER 1.2.0 +#SAVE_TIME 2022-02-11 16:30:04 #CASE_NAME HEADSET-USB_BLACKBIRD-VOICE_GENERIC-NB #PARAM_MODE FULL -#PARAM_TYPE TX+RX -#TOTAL_CUSTOM_STEP 7 +#PARAM_TYPE TX+2RX +#TOTAL_CUSTOM_STEP 7+7 #TX 0 0x0009 //TX_OPERATION_MODE_0 1 0x0009 //TX_OPERATION_MODE_1 @@ -259,12 +259,12 @@ 248 0xFA00 //TX_THR_SN_EST_6 249 0xFA00 //TX_THR_SN_EST_7 250 0x0000 //TX_DELTA_THR_SN_EST_0 -251 0x0100 //TX_DELTA_THR_SN_EST_1 -252 0x0000 //TX_DELTA_THR_SN_EST_2 -253 0x0400 //TX_DELTA_THR_SN_EST_3 +251 0x0000 //TX_DELTA_THR_SN_EST_1 +252 0x0400 //TX_DELTA_THR_SN_EST_2 +253 0x0000 //TX_DELTA_THR_SN_EST_3 254 0x0000 //TX_DELTA_THR_SN_EST_4 255 0x0000 //TX_DELTA_THR_SN_EST_5 -256 0x0000 //TX_DELTA_THR_SN_EST_6 +256 0x0100 //TX_DELTA_THR_SN_EST_6 257 0x0000 //TX_DELTA_THR_SN_EST_7 258 0x4000 //TX_LAMBDA_NN_EST_0 259 0x4000 //TX_LAMBDA_NN_EST_1 @@ -291,28 +291,28 @@ 280 0x0400 //TX_B_POST_FLT_1 281 0x0010 //TX_NS_LVL_CTRL_0 282 0x0014 //TX_NS_LVL_CTRL_1 -283 0x0014 //TX_NS_LVL_CTRL_2 -284 0x0016 //TX_NS_LVL_CTRL_3 -285 0x0014 //TX_NS_LVL_CTRL_4 +283 0x0016 //TX_NS_LVL_CTRL_2 +284 0x0014 //TX_NS_LVL_CTRL_3 +285 0x0010 //TX_NS_LVL_CTRL_4 286 0x0010 //TX_NS_LVL_CTRL_5 -287 0x0010 //TX_NS_LVL_CTRL_6 +287 0x0014 //TX_NS_LVL_CTRL_6 288 0x0010 //TX_NS_LVL_CTRL_7 289 0x000D //TX_MIN_GAIN_S_0 290 0x0012 //TX_MIN_GAIN_S_1 291 0x0012 //TX_MIN_GAIN_S_2 292 0x0012 //TX_MIN_GAIN_S_3 -293 0x0012 //TX_MIN_GAIN_S_4 +293 0x000D //TX_MIN_GAIN_S_4 294 0x000D //TX_MIN_GAIN_S_5 -295 0x000D //TX_MIN_GAIN_S_6 +295 0x0012 //TX_MIN_GAIN_S_6 296 0x000D //TX_MIN_GAIN_S_7 297 0x7FFF //TX_NMOS_SUP 298 0x0000 //TX_NS_MAX_PRI_SNR_TH 299 0x0000 //TX_NMOS_SUP_MENSA 300 0x7FFF //TX_SNRI_SUP_0 -301 0x7FFF //TX_SNRI_SUP_1 +301 0x5000 //TX_SNRI_SUP_1 302 0x5000 //TX_SNRI_SUP_2 -303 0x5000 //TX_SNRI_SUP_3 -304 0x6000 //TX_SNRI_SUP_4 +303 0x6000 //TX_SNRI_SUP_3 +304 0x7FFF //TX_SNRI_SUP_4 305 0x7FFF //TX_SNRI_SUP_5 306 0x7FFF //TX_SNRI_SUP_6 307 0x7FFF //TX_SNRI_SUP_7 @@ -323,20 +323,20 @@ 312 0x7FFF //TX_A_POST_FILT_0 313 0x2000 //TX_A_POST_FILT_1 314 0x4000 //TX_A_POST_FILT_S_0 -315 0x7FFF //TX_A_POST_FILT_S_1 -316 0x1000 //TX_A_POST_FILT_S_2 -317 0x7000 //TX_A_POST_FILT_S_3 +315 0x1000 //TX_A_POST_FILT_S_1 +316 0x7000 //TX_A_POST_FILT_S_2 +317 0x4000 //TX_A_POST_FILT_S_3 318 0x4000 //TX_A_POST_FILT_S_4 319 0x4000 //TX_A_POST_FILT_S_5 -320 0x4000 //TX_A_POST_FILT_S_6 +320 0x7FFF //TX_A_POST_FILT_S_6 321 0x4000 //TX_A_POST_FILT_S_7 322 0x0400 //TX_B_POST_FILT_0 -323 0x0400 //TX_B_POST_FILT_1 +323 0x2000 //TX_B_POST_FILT_1 324 0x2000 //TX_B_POST_FILT_2 -325 0x2000 //TX_B_POST_FILT_3 -326 0x4000 //TX_B_POST_FILT_4 +325 0x4000 //TX_B_POST_FILT_3 +326 0x2000 //TX_B_POST_FILT_4 327 0x2000 //TX_B_POST_FILT_5 -328 0x2000 //TX_B_POST_FILT_6 +328 0x0400 //TX_B_POST_FILT_6 329 0x2000 //TX_B_POST_FILT_7 330 0x7FFF //TX_B_LESSCUT_RTO_S_0 331 0x7FFF //TX_B_LESSCUT_RTO_S_1 @@ -348,12 +348,12 @@ 337 0x7FFF //TX_B_LESSCUT_RTO_S_7 338 0x7E14 //TX_LAMBDA_PFILT 339 0x7C29 //TX_LAMBDA_PFILT_S_0 -340 0x7F00 //TX_LAMBDA_PFILT_S_1 -341 0x7C29 //TX_LAMBDA_PFILT_S_2 -342 0x6000 //TX_LAMBDA_PFILT_S_3 +340 0x7C29 //TX_LAMBDA_PFILT_S_1 +341 0x6000 //TX_LAMBDA_PFILT_S_2 +342 0x7C29 //TX_LAMBDA_PFILT_S_3 343 0x7C29 //TX_LAMBDA_PFILT_S_4 344 0x7C29 //TX_LAMBDA_PFILT_S_5 -345 0x7C29 //TX_LAMBDA_PFILT_S_6 +345 0x7F00 //TX_LAMBDA_PFILT_S_6 346 0x7C29 //TX_LAMBDA_PFILT_S_7 347 0x0200 //TX_K_PEPPER 348 0x0400 //TX_A_PEPPER @@ -375,7 +375,7 @@ 364 0x0000 //TX_K_APT 365 0x0001 //TX_NOISEDET 366 0x0190 //TX_NDETCT -367 0x0029 //TX_NOISE_TH_0 +367 0x003B //TX_NOISE_TH_0 368 0x7FFF //TX_NOISE_TH_0_2 369 0x7FFF //TX_NOISE_TH_0_3 370 0x0900 //TX_NOISE_TH_1 @@ -387,11 +387,11 @@ 376 0x0000 //TX_NOISE_TH_5_3 377 0x0000 //TX_NOISE_TH_5_4 378 0x00C8 //TX_NOISE_TH_6 -379 0x0014 //TX_MINENOISE_TH -380 0x4000 //TX_MINENOISE_MIC0_TH_MTS -381 0xFFEE //TX_MINENOISE_MIC0_TH_EXP -382 0x6000 //TX_MINENOISE_MIC0_S_TH_MTS -383 0xFFF3 //TX_MINENOISE_MIC0_S_TH_EXP +379 0x00C8 //TX_MINENOISE_TH +380 0xD508 //TX_MORENS_TFMASK_TH +381 0x0001 //TX_DRC_QUIET_FLOOR +382 0x3A98 //TX_RATIODTL_CUT_TH +383 0x0DAC //TX_DT_CUT_K1 384 0x00A5 //TX_OUT_ENER_S_TH_CLEAN 385 0x00A5 //TX_OUT_ENER_S_TH_LESSCLEAN 386 0x00A5 //TX_OUT_ENER_S_TH_NOISY @@ -399,22 +399,22 @@ 388 0x00CE //TX_OUT_ENER_TH_SPEECH 389 0x2000 //TX_SN_NPB_GAIN 390 0x0000 //TX_NN_NPB_GAIN -391 0x0000 //TX_CSX_ALPHA_0 -392 0x0000 //TX_CSX_ALPHA_1 -393 0x0000 //TX_CSX_ALPHA_2 -394 0x0000 //TX_CSX_ALPHA_3 -395 0x0800 //TX_MU_ARSP_EST -396 0x00C8 //TX_P_OUTBEAM_MIN_TH +391 0x7FFF //TX_POST_MASK_SUP_HSNE +392 0x1388 //TX_TAIL_DET_TH +393 0x4000 //TX_B_LESSCUT_RTO_WTA +394 0x0000 //TX_MEL_G_R +395 0x0080 //TX_SUPHIGH_TH +396 0x0000 //TX_MASK_G_R 397 0x0002 //TX_EXTRA_NS_L -398 0x0800 //TX_EXTRA_NS_A -399 0x0005 //TX_VR_NOISE_FLOOR_TH +398 0x1800 //TX_C_POST_FLT_MASK +399 0x7FFF //TX_A_POST_FLT_WNS 400 0x0148 //TX_MIN_G_LOW300HZ 401 0x0002 //TX_MAXLEVEL_CNG 402 0x00B4 //TX_STN_NOISE_TH 403 0x4000 //TX_POST_MASK_SUP 404 0x7FFF //TX_POST_MASK_ADJUST 405 0x00C8 //TX_NS_ENOISE_MIC0_TH -406 0x0014 //TX_MINENOISE_MIC0_TH +406 0x0032 //TX_MINENOISE_MIC0_TH 407 0x012C //TX_MINENOISE_MIC0_S_TH 408 0x7FFF //TX_MIN_G_CTRL_SSNS 409 0x0000 //TX_METAL_RTO_THR @@ -522,16 +522,16 @@ 511 0x6666 //TX_MIC_TO_BFGAIN 512 0x0000 //TX_MICTOBFGAIN0 513 0x0000 //TX_FASTMUE_TH -514 0x0000 //TX_DERVB_LEN_0 -515 0x0000 //TX_DERVB_LEN_1 -516 0x0000 //TX_RHO_DERVB -517 0x0000 //TX_MIC_INDX_DERVB -518 0x0000 //TX_MU_DERVB -519 0x0000 //TX_DR_RESRV_0 -520 0x0000 //TX_DR_RESRV_1 -521 0x0000 //TX_DR_RESRV_2 -522 0x0000 //TX_DR_RESRV_3 -523 0x0000 //TX_DR_RESRV_4 +514 0xC000 //TX_DEREVERB_LF_MU +515 0xC000 //TX_DEREVERB_HF_MU +516 0xCCCC //TX_DEREVERB_DELAY +517 0xD999 //TX_DEREVERB_COEF_LEN +518 0x1F40 //TX_DEREVERB_DNR +519 0x0000 //TX_DEREVERB_ALPHA +520 0x0000 //TX_DEREVERB_BETA +521 0x0000 //TX_GSC_RTOL_TH +522 0x7000 //TX_GSC_RTOH_TH +523 0x0064 //TX_WIDE2_MEANHTH 524 0x0000 //TX_DR_RESRV_5 525 0x0000 //TX_DR_RESRV_6 526 0x0000 //TX_DR_RESRV_7 @@ -897,16 +897,81 @@ 886 0x0CCD //TX_FASTNS_TFMASKBIN_TH2 887 0x0CCD //TX_FASTNS_TFMASKBIN_TH3 888 0x0028 //TX_FASTNS_ARSPC_TH -889 0x2000 //TX_FASTNS_MASK5_TH +889 0xC000 //TX_FASTNS_MASK5_TH 890 0x4848 //TX_POSTSSA_MIN_G_VR_MASK -891 0x1000 //TX_A_LESSCUT_RTO_MASK +891 0x4000 //TX_A_LESSCUT_RTO_MASK 892 0x1770 //TX_FASTNS_NOISETH 893 0xC000 //TX_FASTNS_SSA_THLFL 894 0xC000 //TX_FASTNS_SSA_THHFL 895 0xCCCC //TX_FASTNS_SSA_THLFH 896 0xD999 //TX_FASTNS_SSA_THHFH +897 0x2339 //TX_SENDFUNC_REG_MICMUTE +898 0x0021 //TX_SENDFUNC_REG_MICMUTE1 +899 0x02BC //TX_MICMUTE_RATIO_THR +900 0x0140 //TX_MICMUTE_AMP_THR +901 0x0004 //TX_MICMUTE_HPF_IND +902 0x00C0 //TX_MICMUTE_LOG_EYR_TH +903 0x0008 //TX_MICMUTE_CVG_TIME +904 0x0008 //TX_MICMUTE_RELEASE_TIME +905 0x01FE //TX_MIC_VOLUME_MIC0MUTE +906 0x0020 //TX_MICMUTE_EPD_OFFSET_0 +907 0x001E //TX_MICMUTE_FRQ_AEC_L +908 0x7999 //TX_MICMUTE_EAD_THR +909 0x7FFF //TX_MICMUTE_LAMBDA_CB_NLE +910 0x7FFF //TX_MICMUTE_LAMBDA_RE_EST +911 0x4000 //TX_DTD_THR1_MICMUTE_0 +912 0x7000 //TX_DTD_THR1_MICMUTE_1 +913 0x7FFF //TX_DTD_THR1_MICMUTE_2 +914 0x7FFF //TX_DTD_THR1_MICMUTE_3 +915 0x6CCC //TX_DTD_THR2_MICMUTE_0 +916 0x0400 //TX_MICMUTE_MIN_EQ_RE_EST_0 +917 0x0400 //TX_MICMUTE_MIN_EQ_RE_EST_1 +918 0x1000 //TX_MICMUTE_MIN_EQ_RE_EST_2 +919 0x7FFF //TX_MICMUTE_MIN_EQ_RE_EST_3 +920 0x7FFF //TX_MICMUTE_MIN_EQ_RE_EST_4 +921 0x4000 //TX_MICMUTE_C_POST_FLT +922 0x03E8 //TX_MICMUTE_DT_CUT_K +923 0x0001 //TX_MICMUTE_DT_CUT_THR +924 0x03E8 //TX_MICMUTE_DT_CUT_K2 +925 0x0001 //TX_MICMUTE_DT_CUT_THR2 +926 0x0064 //TX_MICMUTE_DT2_HOLD_N +927 0x1000 //TX_MICMUTE_RATIODTH_THCUT +928 0x1000 //TX_MICMUTE_B_POST_FLT_ECHOL +929 0x7FFF //TX_MICMUTE_B_POST_FLT_ECHOH +930 0x0400 //TX_MICMUTE_C_POST_FLT_MASK +931 0x7999 //TX_MICMUTE_RATIODTL_CUT_TH +932 0x0258 //TX_MICMUTE_DT_CUT_K1 +933 0x0800 //TX_MICMUTE_N2_SN_EST +934 0xFC00 //TX_MICMUTE_THR_SN_EST_0 +935 0x001C //TX_MICMUTE_MIN_G_CTRL_0 +936 0x6000 //TX_MICMUTE_A_POST_FILT_S_0 +937 0x7000 //TX_MICMUTE_B_POST_FILT_0 +938 0x2710 //TX_MIC1RUB_AMP_THR +939 0x0010 //TX_MIC1MUTE_RATIO_THR +940 0x0450 //TX_MIC1MUTE_AMP_THR +941 0x0008 //TX_MIC1MUTE_CVG_TIME +942 0x0008 //TX_MIC1MUTE_RELEASE_TIME +943 0x0000 //TX_AMS_RESRV_01 +944 0x0000 //TX_AMS_RESRV_02 +945 0x0000 //TX_AMS_RESRV_03 +946 0x0000 //TX_AMS_RESRV_04 +947 0x0000 //TX_AMS_RESRV_05 +948 0x0000 //TX_AMS_RESRV_06 +949 0x0000 //TX_AMS_RESRV_07 +950 0x0000 //TX_AMS_RESRV_08 +951 0x0000 //TX_AMS_RESRV_09 +952 0x0000 //TX_AMS_RESRV_10 +953 0x0000 //TX_AMS_RESRV_11 +954 0x0000 //TX_AMS_RESRV_12 +955 0x0000 //TX_AMS_RESRV_13 +956 0x0000 //TX_AMS_RESRV_14 +957 0x0000 //TX_AMS_RESRV_15 +958 0x0000 //TX_AMS_RESRV_16 +959 0x0000 //TX_AMS_RESRV_17 +960 0x0000 //TX_AMS_RESRV_18 +961 0x0000 //TX_AMS_RESRV_19 #RX -0 0x042C //RX_RECVFUNC_MODE_0 +0 0x242C //RX_RECVFUNC_MODE_0 1 0x0000 //RX_RECVFUNC_MODE_1 2 0x0000 //RX_SAMPLINGFREQ_SIG 3 0x0000 //RX_SAMPLINGFREQ_PROC @@ -939,7 +1004,7 @@ 30 0x0002 //RX_EXTRA_NS_L 31 0x0800 //RX_EXTRA_NS_A 32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 -33 0x5FFC //RX_TDDRC_LIMITER_THRD +33 0x7220 //RX_TDDRC_LIMITER_THRD 34 0x0800 //RX_TDDRC_LIMITER_GAIN 35 0x199A //RX_A_POST_FLT 36 0x0000 //RX_LMT_THRD @@ -1020,22 +1085,22 @@ 111 0x0002 //RX_FILTINDX 112 0x0000 //RX_TDDRC_THRD_0 113 0x0000 //RX_TDDRC_THRD_1 -114 0x1C00 //RX_TDDRC_THRD_2 -115 0x1D00 //RX_TDDRC_THRD_3 -116 0x3000 //RX_TDDRC_SLANT_0 -117 0x7EB8 //RX_TDDRC_SLANT_1 +114 0x1800 //RX_TDDRC_THRD_2 +115 0x1800 //RX_TDDRC_THRD_3 +116 0x7FFF //RX_TDDRC_SLANT_0 +117 0x7FFF //RX_TDDRC_SLANT_1 118 0x3000 //RX_TDDRC_ALPHA_UP_0 119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 120 0x0000 //RX_TDDRC_HMNC_FLAG 121 0x199A //RX_TDDRC_HMNC_GAIN 122 0x0001 //RX_TDDRC_SMT_FLAG 123 0x0CCD //RX_TDDRC_SMT_W -124 0x01F4 //RX_TDDRC_DRC_GAIN +124 0x0211 //RX_TDDRC_DRC_GAIN 125 0x7C00 //RX_LAMBDA_PKA_FP 126 0x280A //RX_TPKA_FP 127 0x032D //RX_MIN_G_FP 128 0x0A00 //RX_MAX_G_FP -129 0x000A //RX_SPK_VOL +129 0x0009 //RX_SPK_VOL 130 0x0000 //RX_VOL_RESRV_0 131 0x0000 //RX_MAXLEVEL_CNG 132 0x3000 //RX_BWE_UV_TH @@ -1756,11 +1821,862 @@ 110 0x0000 //RX_FDDRC_RESRV_0 129 0x0100 //RX_SPK_VOL 130 0x0000 //RX_VOL_RESRV_0 +#RX 2 +157 0x242C //RX_RECVFUNC_MODE_0 +158 0x0000 //RX_RECVFUNC_MODE_1 +159 0x0000 //RX_SAMPLINGFREQ_SIG +160 0x0000 //RX_SAMPLINGFREQ_PROC +161 0x000A //RX_FRAME_SZ +162 0x0000 //RX_DELAY_OPT +163 0x3000 //RX_TDDRC_ALPHA_UP_1 +164 0x3000 //RX_TDDRC_ALPHA_UP_2 +165 0x3000 //RX_TDDRC_ALPHA_UP_3 +166 0x3000 //RX_TDDRC_ALPHA_UP_4 +167 0x0800 //RX_PGA +168 0x7FFF //RX_A_HP +169 0x0000 //RX_B_PE +170 0x3800 //RX_THR_PITCH_DET_0 +171 0x3000 //RX_THR_PITCH_DET_1 +172 0x2800 //RX_THR_PITCH_DET_2 +173 0x0008 //RX_PITCH_BFR_LEN +174 0x0003 //RX_SBD_PITCH_DET +175 0x0100 //RX_PP_RESRV_0 +176 0x0020 //RX_PP_RESRV_1 +177 0x0600 //RX_N_SN_EST +178 0x000C //RX_N2_SN_EST +179 0x0010 //RX_NS_LVL_CTRL +180 0xF800 //RX_THR_SN_EST +181 0x7CCD //RX_LAMBDA_PFILT +182 0x000A //RX_FENS_RESRV_0 +183 0x0190 //RX_FENS_RESRV_1 +184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +187 0x0002 //RX_EXTRA_NS_L +188 0x0800 //RX_EXTRA_NS_A +189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +190 0x7220 //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +192 0x199A //RX_A_POST_FLT +193 0x0000 //RX_LMT_THRD +194 0x4000 //RX_LMT_ALPHA +195 0x0014 //RX_FDEQ_SUBNUM +196 0x4848 //RX_FDEQ_GAIN_0 +197 0x4848 //RX_FDEQ_GAIN_1 +198 0x4848 //RX_FDEQ_GAIN_2 +199 0x4848 //RX_FDEQ_GAIN_3 +200 0x4848 //RX_FDEQ_GAIN_4 +201 0x4848 //RX_FDEQ_GAIN_5 +202 0x4848 //RX_FDEQ_GAIN_6 +203 0x4848 //RX_FDEQ_GAIN_7 +204 0x4848 //RX_FDEQ_GAIN_8 +205 0x4848 //RX_FDEQ_GAIN_9 +206 0x4848 //RX_FDEQ_GAIN_10 +207 0x4848 //RX_FDEQ_GAIN_11 +208 0x4848 //RX_FDEQ_GAIN_12 +209 0x4848 //RX_FDEQ_GAIN_13 +210 0x4848 //RX_FDEQ_GAIN_14 +211 0x4848 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0202 //RX_FDEQ_BIN_0 +221 0x0203 //RX_FDEQ_BIN_1 +222 0x0303 //RX_FDEQ_BIN_2 +223 0x0304 //RX_FDEQ_BIN_3 +224 0x0405 //RX_FDEQ_BIN_4 +225 0x0506 //RX_FDEQ_BIN_5 +226 0x0708 //RX_FDEQ_BIN_6 +227 0x090A //RX_FDEQ_BIN_7 +228 0x0B0C //RX_FDEQ_BIN_8 +229 0x0D08 //RX_FDEQ_BIN_9 +230 0x0000 //RX_FDEQ_BIN_10 +231 0x0000 //RX_FDEQ_BIN_11 +232 0x0000 //RX_FDEQ_BIN_12 +233 0x0000 //RX_FDEQ_BIN_13 +234 0x0000 //RX_FDEQ_BIN_14 +235 0x0000 //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x4000 //RX_FDEQ_RESRV_0 +245 0x0320 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0030 //RX_FDDRC_BAND_MARGIN_1 +248 0x0050 //RX_FDDRC_BAND_MARGIN_2 +249 0x0080 //RX_FDDRC_BAND_MARGIN_3 +250 0x0007 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x5000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x6400 //RX_FDDRC_THRD_3_2 +258 0x6400 //RX_FDDRC_THRD_3_3 +259 0x2000 //RX_FDDRC_SLANT_0_0 +260 0x2000 //RX_FDDRC_SLANT_0_1 +261 0x2000 //RX_FDDRC_SLANT_0_2 +262 0x2000 //RX_FDDRC_SLANT_0_3 +263 0x5333 //RX_FDDRC_SLANT_1_0 +264 0x5333 //RX_FDDRC_SLANT_1_1 +265 0x5333 //RX_FDDRC_SLANT_1_2 +266 0x5333 //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +268 0x0002 //RX_FILTINDX +269 0x0000 //RX_TDDRC_THRD_0 +270 0x0000 //RX_TDDRC_THRD_1 +271 0x1800 //RX_TDDRC_THRD_2 +272 0x1800 //RX_TDDRC_THRD_3 +273 0x7FFF //RX_TDDRC_SLANT_0 +274 0x7FFF //RX_TDDRC_SLANT_1 +275 0x3000 //RX_TDDRC_ALPHA_UP_0 +276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x199A //RX_TDDRC_HMNC_GAIN +279 0x0001 //RX_TDDRC_SMT_FLAG +280 0x0CCD //RX_TDDRC_SMT_W +281 0x0211 //RX_TDDRC_DRC_GAIN +282 0x7C00 //RX_LAMBDA_PKA_FP +283 0x280A //RX_TPKA_FP +284 0x032D //RX_MIN_G_FP +285 0x0A00 //RX_MAX_G_FP +286 0x0009 //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 +288 0x0000 //RX_MAXLEVEL_CNG +289 0x3000 //RX_BWE_UV_TH +290 0x3000 //RX_BWE_UV_TH2 +291 0x1800 //RX_BWE_UV_TH3 +292 0x1000 //RX_BWE_V_TH +293 0x04CD //RX_BWE_GAIN1_V_TH1 +294 0x0F33 //RX_BWE_GAIN1_V_TH2 +295 0x7333 //RX_BWE_UV_EQ +296 0x199A //RX_BWE_V_EQ +297 0x7333 //RX_BWE_TONE_TH +298 0x0004 //RX_BWE_UV_HOLD_T +299 0x6CCD //RX_BWE_GAIN2_ALPHA +300 0x799A //RX_BWE_GAIN3_ALPHA +301 0x001E //RX_BWE_CUTOFF +302 0x3000 //RX_BWE_GAINFILL +303 0x3200 //RX_BWE_MAXTH_TONE +304 0x2000 //RX_BWE_EQ_0 +305 0x2000 //RX_BWE_EQ_1 +306 0x2000 //RX_BWE_EQ_2 +307 0x2000 //RX_BWE_EQ_3 +308 0x2000 //RX_BWE_EQ_4 +309 0x2000 //RX_BWE_EQ_5 +310 0x2000 //RX_BWE_EQ_6 +311 0x0000 //RX_BWE_RESRV_0 +312 0x0000 //RX_BWE_RESRV_1 +313 0x0000 //RX_BWE_RESRV_2 +#VOL 0 +163 0x3000 //RX_TDDRC_ALPHA_UP_1 +164 0x3000 //RX_TDDRC_ALPHA_UP_2 +165 0x3000 //RX_TDDRC_ALPHA_UP_3 +166 0x3000 //RX_TDDRC_ALPHA_UP_4 +184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +190 0x7220 //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +269 0x0000 //RX_TDDRC_THRD_0 +270 0x0000 //RX_TDDRC_THRD_1 +271 0x1800 //RX_TDDRC_THRD_2 +272 0x1800 //RX_TDDRC_THRD_3 +273 0x7FFF //RX_TDDRC_SLANT_0 +274 0x7FFF //RX_TDDRC_SLANT_1 +275 0x3000 //RX_TDDRC_ALPHA_UP_0 +276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x199A //RX_TDDRC_HMNC_GAIN +279 0x0001 //RX_TDDRC_SMT_FLAG +280 0x0CCD //RX_TDDRC_SMT_W +281 0x0211 //RX_TDDRC_DRC_GAIN +195 0x0014 //RX_FDEQ_SUBNUM +196 0x4848 //RX_FDEQ_GAIN_0 +197 0x4848 //RX_FDEQ_GAIN_1 +198 0x4848 //RX_FDEQ_GAIN_2 +199 0x4848 //RX_FDEQ_GAIN_3 +200 0x4848 //RX_FDEQ_GAIN_4 +201 0x4848 //RX_FDEQ_GAIN_5 +202 0x4848 //RX_FDEQ_GAIN_6 +203 0x4848 //RX_FDEQ_GAIN_7 +204 0x4848 //RX_FDEQ_GAIN_8 +205 0x4848 //RX_FDEQ_GAIN_9 +206 0x4848 //RX_FDEQ_GAIN_10 +207 0x4848 //RX_FDEQ_GAIN_11 +208 0x4848 //RX_FDEQ_GAIN_12 +209 0x4848 //RX_FDEQ_GAIN_13 +210 0x4848 //RX_FDEQ_GAIN_14 +211 0x4848 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0202 //RX_FDEQ_BIN_0 +221 0x0203 //RX_FDEQ_BIN_1 +222 0x0303 //RX_FDEQ_BIN_2 +223 0x0304 //RX_FDEQ_BIN_3 +224 0x0405 //RX_FDEQ_BIN_4 +225 0x0506 //RX_FDEQ_BIN_5 +226 0x0708 //RX_FDEQ_BIN_6 +227 0x090A //RX_FDEQ_BIN_7 +228 0x0B0C //RX_FDEQ_BIN_8 +229 0x0D08 //RX_FDEQ_BIN_9 +230 0x0000 //RX_FDEQ_BIN_10 +231 0x0000 //RX_FDEQ_BIN_11 +232 0x0000 //RX_FDEQ_BIN_12 +233 0x0000 //RX_FDEQ_BIN_13 +234 0x0000 //RX_FDEQ_BIN_14 +235 0x0000 //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x4000 //RX_FDEQ_RESRV_0 +245 0x0320 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0030 //RX_FDDRC_BAND_MARGIN_1 +248 0x0050 //RX_FDDRC_BAND_MARGIN_2 +249 0x0080 //RX_FDDRC_BAND_MARGIN_3 +250 0x0007 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x5000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x6400 //RX_FDDRC_THRD_3_2 +258 0x6400 //RX_FDDRC_THRD_3_3 +259 0x2000 //RX_FDDRC_SLANT_0_0 +260 0x2000 //RX_FDDRC_SLANT_0_1 +261 0x2000 //RX_FDDRC_SLANT_0_2 +262 0x2000 //RX_FDDRC_SLANT_0_3 +263 0x5333 //RX_FDDRC_SLANT_1_0 +264 0x5333 //RX_FDDRC_SLANT_1_1 +265 0x5333 //RX_FDDRC_SLANT_1_2 +266 0x5333 //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +286 0x0009 //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 +#VOL 1 +163 0x3000 //RX_TDDRC_ALPHA_UP_1 +164 0x3000 //RX_TDDRC_ALPHA_UP_2 +165 0x3000 //RX_TDDRC_ALPHA_UP_3 +166 0x3000 //RX_TDDRC_ALPHA_UP_4 +184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +190 0x7220 //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +269 0x0000 //RX_TDDRC_THRD_0 +270 0x0000 //RX_TDDRC_THRD_1 +271 0x1800 //RX_TDDRC_THRD_2 +272 0x1800 //RX_TDDRC_THRD_3 +273 0x7FFF //RX_TDDRC_SLANT_0 +274 0x7FFF //RX_TDDRC_SLANT_1 +275 0x3000 //RX_TDDRC_ALPHA_UP_0 +276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x199A //RX_TDDRC_HMNC_GAIN +279 0x0001 //RX_TDDRC_SMT_FLAG +280 0x0CCD //RX_TDDRC_SMT_W +281 0x0211 //RX_TDDRC_DRC_GAIN +195 0x0014 //RX_FDEQ_SUBNUM +196 0x4848 //RX_FDEQ_GAIN_0 +197 0x4848 //RX_FDEQ_GAIN_1 +198 0x4848 //RX_FDEQ_GAIN_2 +199 0x4848 //RX_FDEQ_GAIN_3 +200 0x4848 //RX_FDEQ_GAIN_4 +201 0x4848 //RX_FDEQ_GAIN_5 +202 0x4848 //RX_FDEQ_GAIN_6 +203 0x4848 //RX_FDEQ_GAIN_7 +204 0x4848 //RX_FDEQ_GAIN_8 +205 0x4848 //RX_FDEQ_GAIN_9 +206 0x4848 //RX_FDEQ_GAIN_10 +207 0x4848 //RX_FDEQ_GAIN_11 +208 0x4848 //RX_FDEQ_GAIN_12 +209 0x4848 //RX_FDEQ_GAIN_13 +210 0x4848 //RX_FDEQ_GAIN_14 +211 0x4848 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0202 //RX_FDEQ_BIN_0 +221 0x0203 //RX_FDEQ_BIN_1 +222 0x0303 //RX_FDEQ_BIN_2 +223 0x0304 //RX_FDEQ_BIN_3 +224 0x0405 //RX_FDEQ_BIN_4 +225 0x0506 //RX_FDEQ_BIN_5 +226 0x0708 //RX_FDEQ_BIN_6 +227 0x090A //RX_FDEQ_BIN_7 +228 0x0B0C //RX_FDEQ_BIN_8 +229 0x0D08 //RX_FDEQ_BIN_9 +230 0x0000 //RX_FDEQ_BIN_10 +231 0x0000 //RX_FDEQ_BIN_11 +232 0x0000 //RX_FDEQ_BIN_12 +233 0x0000 //RX_FDEQ_BIN_13 +234 0x0000 //RX_FDEQ_BIN_14 +235 0x0000 //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x4000 //RX_FDEQ_RESRV_0 +245 0x0320 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0030 //RX_FDDRC_BAND_MARGIN_1 +248 0x0050 //RX_FDDRC_BAND_MARGIN_2 +249 0x0080 //RX_FDDRC_BAND_MARGIN_3 +250 0x0007 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x5000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x6400 //RX_FDDRC_THRD_3_2 +258 0x6400 //RX_FDDRC_THRD_3_3 +259 0x2000 //RX_FDDRC_SLANT_0_0 +260 0x2000 //RX_FDDRC_SLANT_0_1 +261 0x2000 //RX_FDDRC_SLANT_0_2 +262 0x2000 //RX_FDDRC_SLANT_0_3 +263 0x5333 //RX_FDDRC_SLANT_1_0 +264 0x5333 //RX_FDDRC_SLANT_1_1 +265 0x5333 //RX_FDDRC_SLANT_1_2 +266 0x5333 //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +286 0x000F //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 +#VOL 2 +163 0x3000 //RX_TDDRC_ALPHA_UP_1 +164 0x3000 //RX_TDDRC_ALPHA_UP_2 +165 0x3000 //RX_TDDRC_ALPHA_UP_3 +166 0x3000 //RX_TDDRC_ALPHA_UP_4 +184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +190 0x7220 //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +269 0x0000 //RX_TDDRC_THRD_0 +270 0x0000 //RX_TDDRC_THRD_1 +271 0x1800 //RX_TDDRC_THRD_2 +272 0x1800 //RX_TDDRC_THRD_3 +273 0x7FFF //RX_TDDRC_SLANT_0 +274 0x7FFF //RX_TDDRC_SLANT_1 +275 0x3000 //RX_TDDRC_ALPHA_UP_0 +276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x199A //RX_TDDRC_HMNC_GAIN +279 0x0001 //RX_TDDRC_SMT_FLAG +280 0x0CCD //RX_TDDRC_SMT_W +281 0x0211 //RX_TDDRC_DRC_GAIN +195 0x0014 //RX_FDEQ_SUBNUM +196 0x4848 //RX_FDEQ_GAIN_0 +197 0x4848 //RX_FDEQ_GAIN_1 +198 0x4848 //RX_FDEQ_GAIN_2 +199 0x4848 //RX_FDEQ_GAIN_3 +200 0x4848 //RX_FDEQ_GAIN_4 +201 0x4848 //RX_FDEQ_GAIN_5 +202 0x4848 //RX_FDEQ_GAIN_6 +203 0x4848 //RX_FDEQ_GAIN_7 +204 0x4848 //RX_FDEQ_GAIN_8 +205 0x4848 //RX_FDEQ_GAIN_9 +206 0x4848 //RX_FDEQ_GAIN_10 +207 0x4848 //RX_FDEQ_GAIN_11 +208 0x4848 //RX_FDEQ_GAIN_12 +209 0x4848 //RX_FDEQ_GAIN_13 +210 0x4848 //RX_FDEQ_GAIN_14 +211 0x4848 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0202 //RX_FDEQ_BIN_0 +221 0x0203 //RX_FDEQ_BIN_1 +222 0x0303 //RX_FDEQ_BIN_2 +223 0x0304 //RX_FDEQ_BIN_3 +224 0x0405 //RX_FDEQ_BIN_4 +225 0x0506 //RX_FDEQ_BIN_5 +226 0x0708 //RX_FDEQ_BIN_6 +227 0x090A //RX_FDEQ_BIN_7 +228 0x0B0C //RX_FDEQ_BIN_8 +229 0x0D08 //RX_FDEQ_BIN_9 +230 0x0000 //RX_FDEQ_BIN_10 +231 0x0000 //RX_FDEQ_BIN_11 +232 0x0000 //RX_FDEQ_BIN_12 +233 0x0000 //RX_FDEQ_BIN_13 +234 0x0000 //RX_FDEQ_BIN_14 +235 0x0000 //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x4000 //RX_FDEQ_RESRV_0 +245 0x0320 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0030 //RX_FDDRC_BAND_MARGIN_1 +248 0x0050 //RX_FDDRC_BAND_MARGIN_2 +249 0x0080 //RX_FDDRC_BAND_MARGIN_3 +250 0x0007 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x5000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x6400 //RX_FDDRC_THRD_3_2 +258 0x6400 //RX_FDDRC_THRD_3_3 +259 0x2000 //RX_FDDRC_SLANT_0_0 +260 0x2000 //RX_FDDRC_SLANT_0_1 +261 0x2000 //RX_FDDRC_SLANT_0_2 +262 0x2000 //RX_FDDRC_SLANT_0_3 +263 0x5333 //RX_FDDRC_SLANT_1_0 +264 0x5333 //RX_FDDRC_SLANT_1_1 +265 0x5333 //RX_FDDRC_SLANT_1_2 +266 0x5333 //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +286 0x0019 //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 +#VOL 3 +163 0x3000 //RX_TDDRC_ALPHA_UP_1 +164 0x3000 //RX_TDDRC_ALPHA_UP_2 +165 0x3000 //RX_TDDRC_ALPHA_UP_3 +166 0x3000 //RX_TDDRC_ALPHA_UP_4 +184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +190 0x7220 //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +269 0x0000 //RX_TDDRC_THRD_0 +270 0x0000 //RX_TDDRC_THRD_1 +271 0x1800 //RX_TDDRC_THRD_2 +272 0x1800 //RX_TDDRC_THRD_3 +273 0x7FFF //RX_TDDRC_SLANT_0 +274 0x7FFF //RX_TDDRC_SLANT_1 +275 0x3000 //RX_TDDRC_ALPHA_UP_0 +276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x199A //RX_TDDRC_HMNC_GAIN +279 0x0001 //RX_TDDRC_SMT_FLAG +280 0x0CCD //RX_TDDRC_SMT_W +281 0x0211 //RX_TDDRC_DRC_GAIN +195 0x0014 //RX_FDEQ_SUBNUM +196 0x4848 //RX_FDEQ_GAIN_0 +197 0x4848 //RX_FDEQ_GAIN_1 +198 0x4848 //RX_FDEQ_GAIN_2 +199 0x4848 //RX_FDEQ_GAIN_3 +200 0x4848 //RX_FDEQ_GAIN_4 +201 0x4848 //RX_FDEQ_GAIN_5 +202 0x4848 //RX_FDEQ_GAIN_6 +203 0x4848 //RX_FDEQ_GAIN_7 +204 0x4848 //RX_FDEQ_GAIN_8 +205 0x4848 //RX_FDEQ_GAIN_9 +206 0x4848 //RX_FDEQ_GAIN_10 +207 0x4848 //RX_FDEQ_GAIN_11 +208 0x4848 //RX_FDEQ_GAIN_12 +209 0x4848 //RX_FDEQ_GAIN_13 +210 0x4848 //RX_FDEQ_GAIN_14 +211 0x4848 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0202 //RX_FDEQ_BIN_0 +221 0x0203 //RX_FDEQ_BIN_1 +222 0x0303 //RX_FDEQ_BIN_2 +223 0x0304 //RX_FDEQ_BIN_3 +224 0x0405 //RX_FDEQ_BIN_4 +225 0x0506 //RX_FDEQ_BIN_5 +226 0x0708 //RX_FDEQ_BIN_6 +227 0x090A //RX_FDEQ_BIN_7 +228 0x0B0C //RX_FDEQ_BIN_8 +229 0x0D08 //RX_FDEQ_BIN_9 +230 0x0000 //RX_FDEQ_BIN_10 +231 0x0000 //RX_FDEQ_BIN_11 +232 0x0000 //RX_FDEQ_BIN_12 +233 0x0000 //RX_FDEQ_BIN_13 +234 0x0000 //RX_FDEQ_BIN_14 +235 0x0000 //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x4000 //RX_FDEQ_RESRV_0 +245 0x0320 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0030 //RX_FDDRC_BAND_MARGIN_1 +248 0x0050 //RX_FDDRC_BAND_MARGIN_2 +249 0x0080 //RX_FDDRC_BAND_MARGIN_3 +250 0x0007 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x5000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x6400 //RX_FDDRC_THRD_3_2 +258 0x6400 //RX_FDDRC_THRD_3_3 +259 0x2000 //RX_FDDRC_SLANT_0_0 +260 0x2000 //RX_FDDRC_SLANT_0_1 +261 0x2000 //RX_FDDRC_SLANT_0_2 +262 0x2000 //RX_FDDRC_SLANT_0_3 +263 0x5333 //RX_FDDRC_SLANT_1_0 +264 0x5333 //RX_FDDRC_SLANT_1_1 +265 0x5333 //RX_FDDRC_SLANT_1_2 +266 0x5333 //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +286 0x002B //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 +#VOL 4 +163 0x3000 //RX_TDDRC_ALPHA_UP_1 +164 0x3000 //RX_TDDRC_ALPHA_UP_2 +165 0x3000 //RX_TDDRC_ALPHA_UP_3 +166 0x3000 //RX_TDDRC_ALPHA_UP_4 +184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +190 0x7220 //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +269 0x0000 //RX_TDDRC_THRD_0 +270 0x0000 //RX_TDDRC_THRD_1 +271 0x1800 //RX_TDDRC_THRD_2 +272 0x1800 //RX_TDDRC_THRD_3 +273 0x7FFF //RX_TDDRC_SLANT_0 +274 0x7FFF //RX_TDDRC_SLANT_1 +275 0x3000 //RX_TDDRC_ALPHA_UP_0 +276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x199A //RX_TDDRC_HMNC_GAIN +279 0x0001 //RX_TDDRC_SMT_FLAG +280 0x0CCD //RX_TDDRC_SMT_W +281 0x0211 //RX_TDDRC_DRC_GAIN +195 0x0014 //RX_FDEQ_SUBNUM +196 0x4848 //RX_FDEQ_GAIN_0 +197 0x4848 //RX_FDEQ_GAIN_1 +198 0x4848 //RX_FDEQ_GAIN_2 +199 0x4848 //RX_FDEQ_GAIN_3 +200 0x4848 //RX_FDEQ_GAIN_4 +201 0x4848 //RX_FDEQ_GAIN_5 +202 0x4848 //RX_FDEQ_GAIN_6 +203 0x4848 //RX_FDEQ_GAIN_7 +204 0x4848 //RX_FDEQ_GAIN_8 +205 0x4848 //RX_FDEQ_GAIN_9 +206 0x4848 //RX_FDEQ_GAIN_10 +207 0x4848 //RX_FDEQ_GAIN_11 +208 0x4848 //RX_FDEQ_GAIN_12 +209 0x4848 //RX_FDEQ_GAIN_13 +210 0x4848 //RX_FDEQ_GAIN_14 +211 0x4848 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0202 //RX_FDEQ_BIN_0 +221 0x0203 //RX_FDEQ_BIN_1 +222 0x0303 //RX_FDEQ_BIN_2 +223 0x0304 //RX_FDEQ_BIN_3 +224 0x0405 //RX_FDEQ_BIN_4 +225 0x0506 //RX_FDEQ_BIN_5 +226 0x0708 //RX_FDEQ_BIN_6 +227 0x090A //RX_FDEQ_BIN_7 +228 0x0B0C //RX_FDEQ_BIN_8 +229 0x0D08 //RX_FDEQ_BIN_9 +230 0x0000 //RX_FDEQ_BIN_10 +231 0x0000 //RX_FDEQ_BIN_11 +232 0x0000 //RX_FDEQ_BIN_12 +233 0x0000 //RX_FDEQ_BIN_13 +234 0x0000 //RX_FDEQ_BIN_14 +235 0x0000 //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x4000 //RX_FDEQ_RESRV_0 +245 0x0320 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0030 //RX_FDDRC_BAND_MARGIN_1 +248 0x0050 //RX_FDDRC_BAND_MARGIN_2 +249 0x0080 //RX_FDDRC_BAND_MARGIN_3 +250 0x0007 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x5000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x6400 //RX_FDDRC_THRD_3_2 +258 0x6400 //RX_FDDRC_THRD_3_3 +259 0x2000 //RX_FDDRC_SLANT_0_0 +260 0x2000 //RX_FDDRC_SLANT_0_1 +261 0x2000 //RX_FDDRC_SLANT_0_2 +262 0x2000 //RX_FDDRC_SLANT_0_3 +263 0x5333 //RX_FDDRC_SLANT_1_0 +264 0x5333 //RX_FDDRC_SLANT_1_1 +265 0x5333 //RX_FDDRC_SLANT_1_2 +266 0x5333 //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +286 0x0048 //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 +#VOL 5 +163 0x3000 //RX_TDDRC_ALPHA_UP_1 +164 0x3000 //RX_TDDRC_ALPHA_UP_2 +165 0x3000 //RX_TDDRC_ALPHA_UP_3 +166 0x3000 //RX_TDDRC_ALPHA_UP_4 +184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +190 0x7220 //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +269 0x0000 //RX_TDDRC_THRD_0 +270 0x0000 //RX_TDDRC_THRD_1 +271 0x1800 //RX_TDDRC_THRD_2 +272 0x1800 //RX_TDDRC_THRD_3 +273 0x7FFF //RX_TDDRC_SLANT_0 +274 0x7FFF //RX_TDDRC_SLANT_1 +275 0x3000 //RX_TDDRC_ALPHA_UP_0 +276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x199A //RX_TDDRC_HMNC_GAIN +279 0x0001 //RX_TDDRC_SMT_FLAG +280 0x0CCD //RX_TDDRC_SMT_W +281 0x0211 //RX_TDDRC_DRC_GAIN +195 0x0014 //RX_FDEQ_SUBNUM +196 0x4848 //RX_FDEQ_GAIN_0 +197 0x4848 //RX_FDEQ_GAIN_1 +198 0x4848 //RX_FDEQ_GAIN_2 +199 0x4848 //RX_FDEQ_GAIN_3 +200 0x4848 //RX_FDEQ_GAIN_4 +201 0x4848 //RX_FDEQ_GAIN_5 +202 0x4848 //RX_FDEQ_GAIN_6 +203 0x4848 //RX_FDEQ_GAIN_7 +204 0x4848 //RX_FDEQ_GAIN_8 +205 0x4848 //RX_FDEQ_GAIN_9 +206 0x4848 //RX_FDEQ_GAIN_10 +207 0x4848 //RX_FDEQ_GAIN_11 +208 0x4848 //RX_FDEQ_GAIN_12 +209 0x4848 //RX_FDEQ_GAIN_13 +210 0x4848 //RX_FDEQ_GAIN_14 +211 0x4848 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0202 //RX_FDEQ_BIN_0 +221 0x0203 //RX_FDEQ_BIN_1 +222 0x0303 //RX_FDEQ_BIN_2 +223 0x0304 //RX_FDEQ_BIN_3 +224 0x0405 //RX_FDEQ_BIN_4 +225 0x0506 //RX_FDEQ_BIN_5 +226 0x0708 //RX_FDEQ_BIN_6 +227 0x090A //RX_FDEQ_BIN_7 +228 0x0B0C //RX_FDEQ_BIN_8 +229 0x0D08 //RX_FDEQ_BIN_9 +230 0x0000 //RX_FDEQ_BIN_10 +231 0x0000 //RX_FDEQ_BIN_11 +232 0x0000 //RX_FDEQ_BIN_12 +233 0x0000 //RX_FDEQ_BIN_13 +234 0x0000 //RX_FDEQ_BIN_14 +235 0x0000 //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x4000 //RX_FDEQ_RESRV_0 +245 0x0320 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0030 //RX_FDDRC_BAND_MARGIN_1 +248 0x0050 //RX_FDDRC_BAND_MARGIN_2 +249 0x0080 //RX_FDDRC_BAND_MARGIN_3 +250 0x0007 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x5000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x6400 //RX_FDDRC_THRD_3_2 +258 0x6400 //RX_FDDRC_THRD_3_3 +259 0x2000 //RX_FDDRC_SLANT_0_0 +260 0x2000 //RX_FDDRC_SLANT_0_1 +261 0x2000 //RX_FDDRC_SLANT_0_2 +262 0x2000 //RX_FDDRC_SLANT_0_3 +263 0x5333 //RX_FDDRC_SLANT_1_0 +264 0x5333 //RX_FDDRC_SLANT_1_1 +265 0x5333 //RX_FDDRC_SLANT_1_2 +266 0x5333 //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +286 0x007A //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 +#VOL 6 +163 0x3000 //RX_TDDRC_ALPHA_UP_1 +164 0x3000 //RX_TDDRC_ALPHA_UP_2 +165 0x3000 //RX_TDDRC_ALPHA_UP_3 +166 0x3000 //RX_TDDRC_ALPHA_UP_4 +184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +190 0x7220 //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +269 0x0000 //RX_TDDRC_THRD_0 +270 0x0000 //RX_TDDRC_THRD_1 +271 0x1800 //RX_TDDRC_THRD_2 +272 0x1800 //RX_TDDRC_THRD_3 +273 0x7FFF //RX_TDDRC_SLANT_0 +274 0x7FFF //RX_TDDRC_SLANT_1 +275 0x3000 //RX_TDDRC_ALPHA_UP_0 +276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x199A //RX_TDDRC_HMNC_GAIN +279 0x0001 //RX_TDDRC_SMT_FLAG +280 0x0CCD //RX_TDDRC_SMT_W +281 0x0211 //RX_TDDRC_DRC_GAIN +195 0x0014 //RX_FDEQ_SUBNUM +196 0x4848 //RX_FDEQ_GAIN_0 +197 0x4848 //RX_FDEQ_GAIN_1 +198 0x4848 //RX_FDEQ_GAIN_2 +199 0x4848 //RX_FDEQ_GAIN_3 +200 0x4848 //RX_FDEQ_GAIN_4 +201 0x4848 //RX_FDEQ_GAIN_5 +202 0x4848 //RX_FDEQ_GAIN_6 +203 0x4848 //RX_FDEQ_GAIN_7 +204 0x4848 //RX_FDEQ_GAIN_8 +205 0x4848 //RX_FDEQ_GAIN_9 +206 0x4848 //RX_FDEQ_GAIN_10 +207 0x4848 //RX_FDEQ_GAIN_11 +208 0x4848 //RX_FDEQ_GAIN_12 +209 0x4848 //RX_FDEQ_GAIN_13 +210 0x4848 //RX_FDEQ_GAIN_14 +211 0x4848 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0202 //RX_FDEQ_BIN_0 +221 0x0203 //RX_FDEQ_BIN_1 +222 0x0303 //RX_FDEQ_BIN_2 +223 0x0304 //RX_FDEQ_BIN_3 +224 0x0405 //RX_FDEQ_BIN_4 +225 0x0506 //RX_FDEQ_BIN_5 +226 0x0708 //RX_FDEQ_BIN_6 +227 0x090A //RX_FDEQ_BIN_7 +228 0x0B0C //RX_FDEQ_BIN_8 +229 0x0D08 //RX_FDEQ_BIN_9 +230 0x0000 //RX_FDEQ_BIN_10 +231 0x0000 //RX_FDEQ_BIN_11 +232 0x0000 //RX_FDEQ_BIN_12 +233 0x0000 //RX_FDEQ_BIN_13 +234 0x0000 //RX_FDEQ_BIN_14 +235 0x0000 //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x4000 //RX_FDEQ_RESRV_0 +245 0x0320 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0030 //RX_FDDRC_BAND_MARGIN_1 +248 0x0050 //RX_FDDRC_BAND_MARGIN_2 +249 0x0080 //RX_FDDRC_BAND_MARGIN_3 +250 0x0007 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x5000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x6400 //RX_FDDRC_THRD_3_2 +258 0x6400 //RX_FDDRC_THRD_3_3 +259 0x2000 //RX_FDDRC_SLANT_0_0 +260 0x2000 //RX_FDDRC_SLANT_0_1 +261 0x2000 //RX_FDDRC_SLANT_0_2 +262 0x2000 //RX_FDDRC_SLANT_0_3 +263 0x5333 //RX_FDDRC_SLANT_1_0 +264 0x5333 //RX_FDDRC_SLANT_1_1 +265 0x5333 //RX_FDDRC_SLANT_1_2 +266 0x5333 //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +286 0x0100 //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 #CASE_NAME HEADSET-USB_BLACKBIRD-VOICE_GENERIC-WB #PARAM_MODE FULL -#PARAM_TYPE TX+RX -#TOTAL_CUSTOM_STEP 7 +#PARAM_TYPE TX+2RX +#TOTAL_CUSTOM_STEP 7+7 #TX 0 0x0009 //TX_OPERATION_MODE_0 1 0x0009 //TX_OPERATION_MODE_1 @@ -2004,7 +2920,7 @@ 239 0x0800 //TX_DT_RESRV_7 240 0x0800 //TX_DT_RESRV_8 241 0x0000 //TX_DT_RESRV_9 -242 0xF400 //TX_THR_SN_EST_0 +242 0xFA00 //TX_THR_SN_EST_0 243 0xFA00 //TX_THR_SN_EST_1 244 0xF700 //TX_THR_SN_EST_2 245 0xFC00 //TX_THR_SN_EST_3 @@ -2013,20 +2929,20 @@ 248 0xF400 //TX_THR_SN_EST_6 249 0xF600 //TX_THR_SN_EST_7 250 0x0000 //TX_DELTA_THR_SN_EST_0 -251 0x0100 //TX_DELTA_THR_SN_EST_1 +251 0x0200 //TX_DELTA_THR_SN_EST_1 252 0x0200 //TX_DELTA_THR_SN_EST_2 -253 0x0200 //TX_DELTA_THR_SN_EST_3 -254 0x0100 //TX_DELTA_THR_SN_EST_4 +253 0x0100 //TX_DELTA_THR_SN_EST_3 +254 0x0200 //TX_DELTA_THR_SN_EST_4 255 0x0200 //TX_DELTA_THR_SN_EST_5 -256 0x0200 //TX_DELTA_THR_SN_EST_6 +256 0x0100 //TX_DELTA_THR_SN_EST_6 257 0x0200 //TX_DELTA_THR_SN_EST_7 258 0x6000 //TX_LAMBDA_NN_EST_0 -259 0x6000 //TX_LAMBDA_NN_EST_1 +259 0x4000 //TX_LAMBDA_NN_EST_1 260 0x4000 //TX_LAMBDA_NN_EST_2 261 0x4000 //TX_LAMBDA_NN_EST_3 262 0x4000 //TX_LAMBDA_NN_EST_4 263 0x4000 //TX_LAMBDA_NN_EST_5 -264 0x4000 //TX_LAMBDA_NN_EST_6 +264 0x6000 //TX_LAMBDA_NN_EST_6 265 0x4000 //TX_LAMBDA_NN_EST_7 266 0x0400 //TX_N_SN_EST 267 0x001E //TX_INBEAM_T @@ -2044,18 +2960,18 @@ 279 0x1000 //TX_B_POST_FLT_0 280 0x1000 //TX_B_POST_FLT_1 281 0x000F //TX_NS_LVL_CTRL_0 -282 0x0018 //TX_NS_LVL_CTRL_1 -283 0x0014 //TX_NS_LVL_CTRL_2 -284 0x001C //TX_NS_LVL_CTRL_3 -285 0x0012 //TX_NS_LVL_CTRL_4 +282 0x0014 //TX_NS_LVL_CTRL_1 +283 0x001C //TX_NS_LVL_CTRL_2 +284 0x0012 //TX_NS_LVL_CTRL_3 +285 0x000F //TX_NS_LVL_CTRL_4 286 0x000F //TX_NS_LVL_CTRL_5 -287 0x000F //TX_NS_LVL_CTRL_6 +287 0x0018 //TX_NS_LVL_CTRL_6 288 0x0011 //TX_NS_LVL_CTRL_7 289 0x000C //TX_MIN_GAIN_S_0 -290 0x000C //TX_MIN_GAIN_S_1 -291 0x000F //TX_MIN_GAIN_S_2 -292 0x000C //TX_MIN_GAIN_S_3 -293 0x0009 //TX_MIN_GAIN_S_4 +290 0x000F //TX_MIN_GAIN_S_1 +291 0x000C //TX_MIN_GAIN_S_2 +292 0x0009 //TX_MIN_GAIN_S_3 +293 0x000C //TX_MIN_GAIN_S_4 294 0x000C //TX_MIN_GAIN_S_5 295 0x000C //TX_MIN_GAIN_S_6 296 0x000F //TX_MIN_GAIN_S_7 @@ -2063,10 +2979,10 @@ 298 0x0000 //TX_NS_MAX_PRI_SNR_TH 299 0x0000 //TX_NMOS_SUP_MENSA 300 0x7FFF //TX_SNRI_SUP_0 -301 0x7FFF //TX_SNRI_SUP_1 -302 0x6000 //TX_SNRI_SUP_2 -303 0x2000 //TX_SNRI_SUP_3 -304 0x6000 //TX_SNRI_SUP_4 +301 0x6000 //TX_SNRI_SUP_1 +302 0x2000 //TX_SNRI_SUP_2 +303 0x6000 //TX_SNRI_SUP_3 +304 0x7FFF //TX_SNRI_SUP_4 305 0x7FFF //TX_SNRI_SUP_5 306 0x7FFF //TX_SNRI_SUP_6 307 0x7FFF //TX_SNRI_SUP_7 @@ -2077,17 +2993,17 @@ 312 0x7FFF //TX_A_POST_FILT_0 313 0x2000 //TX_A_POST_FILT_1 314 0x4000 //TX_A_POST_FILT_S_0 -315 0x4000 //TX_A_POST_FILT_S_1 +315 0x5000 //TX_A_POST_FILT_S_1 316 0x5000 //TX_A_POST_FILT_S_2 317 0x5000 //TX_A_POST_FILT_S_3 318 0x5000 //TX_A_POST_FILT_S_4 319 0x5000 //TX_A_POST_FILT_S_5 -320 0x5000 //TX_A_POST_FILT_S_6 +320 0x4000 //TX_A_POST_FILT_S_6 321 0x5000 //TX_A_POST_FILT_S_7 322 0x1000 //TX_B_POST_FILT_0 323 0x1000 //TX_B_POST_FILT_1 -324 0x1000 //TX_B_POST_FILT_2 -325 0x3000 //TX_B_POST_FILT_3 +324 0x3000 //TX_B_POST_FILT_2 +325 0x1000 //TX_B_POST_FILT_3 326 0x1000 //TX_B_POST_FILT_4 327 0x1000 //TX_B_POST_FILT_5 328 0x1000 //TX_B_POST_FILT_6 @@ -2102,12 +3018,12 @@ 337 0x7FFF //TX_B_LESSCUT_RTO_S_7 338 0x7CCD //TX_LAMBDA_PFILT 339 0x7B00 //TX_LAMBDA_PFILT_S_0 -340 0x7F00 //TX_LAMBDA_PFILT_S_1 +340 0x7B00 //TX_LAMBDA_PFILT_S_1 341 0x7B00 //TX_LAMBDA_PFILT_S_2 342 0x7B00 //TX_LAMBDA_PFILT_S_3 343 0x7B00 //TX_LAMBDA_PFILT_S_4 344 0x7B00 //TX_LAMBDA_PFILT_S_5 -345 0x7B00 //TX_LAMBDA_PFILT_S_6 +345 0x7F00 //TX_LAMBDA_PFILT_S_6 346 0x7B00 //TX_LAMBDA_PFILT_S_7 347 0x0200 //TX_K_PEPPER 348 0x0400 //TX_A_PEPPER @@ -2129,7 +3045,7 @@ 364 0x0000 //TX_K_APT 365 0x0001 //TX_NOISEDET 366 0x0190 //TX_NDETCT -367 0x0065 //TX_NOISE_TH_0 +367 0x0102 //TX_NOISE_TH_0 368 0x7FFF //TX_NOISE_TH_0_2 369 0x7FFF //TX_NOISE_TH_0_3 370 0x0900 //TX_NOISE_TH_1 @@ -2141,11 +3057,11 @@ 376 0x7FFF //TX_NOISE_TH_5_3 377 0x7FFF //TX_NOISE_TH_5_4 378 0x00FB //TX_NOISE_TH_6 -379 0x0029 //TX_MINENOISE_TH -380 0x4000 //TX_MINENOISE_MIC0_TH_MTS -381 0xFFEE //TX_MINENOISE_MIC0_TH_EXP -382 0x6000 //TX_MINENOISE_MIC0_S_TH_MTS -383 0xFFF3 //TX_MINENOISE_MIC0_S_TH_EXP +379 0x00F8 //TX_MINENOISE_TH +380 0xD508 //TX_MORENS_TFMASK_TH +381 0x0001 //TX_DRC_QUIET_FLOOR +382 0x3A98 //TX_RATIODTL_CUT_TH +383 0x0DAC //TX_DT_CUT_K1 384 0x0666 //TX_OUT_ENER_S_TH_CLEAN 385 0x0666 //TX_OUT_ENER_S_TH_LESSCLEAN 386 0x0333 //TX_OUT_ENER_S_TH_NOISY @@ -2153,22 +3069,22 @@ 388 0x0333 //TX_OUT_ENER_TH_SPEECH 389 0x2000 //TX_SN_NPB_GAIN 390 0x0000 //TX_NN_NPB_GAIN -391 0x0000 //TX_CSX_ALPHA_0 -392 0x0000 //TX_CSX_ALPHA_1 -393 0x0000 //TX_CSX_ALPHA_2 -394 0x0000 //TX_CSX_ALPHA_3 -395 0x0800 //TX_MU_ARSP_EST -396 0x00C8 //TX_P_OUTBEAM_MIN_TH +391 0x7FFF //TX_POST_MASK_SUP_HSNE +392 0x1388 //TX_TAIL_DET_TH +393 0x4000 //TX_B_LESSCUT_RTO_WTA +394 0x0000 //TX_MEL_G_R +395 0x0080 //TX_SUPHIGH_TH +396 0x0000 //TX_MASK_G_R 397 0x0002 //TX_EXTRA_NS_L -398 0x0800 //TX_EXTRA_NS_A -399 0x0005 //TX_VR_NOISE_FLOOR_TH +398 0x1800 //TX_C_POST_FLT_MASK +399 0x7FFF //TX_A_POST_FLT_WNS 400 0x0148 //TX_MIN_G_LOW300HZ 401 0x0002 //TX_MAXLEVEL_CNG 402 0x00B4 //TX_STN_NOISE_TH 403 0x4000 //TX_POST_MASK_SUP 404 0x7FFF //TX_POST_MASK_ADJUST 405 0x00C8 //TX_NS_ENOISE_MIC0_TH -406 0x0029 //TX_MINENOISE_MIC0_TH +406 0x00DC //TX_MINENOISE_MIC0_TH 407 0x012C //TX_MINENOISE_MIC0_S_TH 408 0x7FFF //TX_MIN_G_CTRL_SSNS 409 0x0800 //TX_METAL_RTO_THR @@ -2276,16 +3192,16 @@ 511 0x6666 //TX_MIC_TO_BFGAIN 512 0x0000 //TX_MICTOBFGAIN0 513 0x0000 //TX_FASTMUE_TH -514 0x0000 //TX_DERVB_LEN_0 -515 0x0000 //TX_DERVB_LEN_1 -516 0x0000 //TX_RHO_DERVB -517 0x0000 //TX_MIC_INDX_DERVB -518 0x0000 //TX_MU_DERVB -519 0x0000 //TX_DR_RESRV_0 -520 0x0000 //TX_DR_RESRV_1 -521 0x0000 //TX_DR_RESRV_2 -522 0x0000 //TX_DR_RESRV_3 -523 0x0000 //TX_DR_RESRV_4 +514 0xC000 //TX_DEREVERB_LF_MU +515 0xC000 //TX_DEREVERB_HF_MU +516 0xCCCC //TX_DEREVERB_DELAY +517 0xD999 //TX_DEREVERB_COEF_LEN +518 0x1F40 //TX_DEREVERB_DNR +519 0x0000 //TX_DEREVERB_ALPHA +520 0x0000 //TX_DEREVERB_BETA +521 0x0000 //TX_GSC_RTOL_TH +522 0x7000 //TX_GSC_RTOH_TH +523 0x0064 //TX_WIDE2_MEANHTH 524 0x0000 //TX_DR_RESRV_5 525 0x0000 //TX_DR_RESRV_6 526 0x0000 //TX_DR_RESRV_7 @@ -2659,8 +3575,73 @@ 894 0xC000 //TX_FASTNS_SSA_THHFL 895 0xCCCC //TX_FASTNS_SSA_THLFH 896 0xD999 //TX_FASTNS_SSA_THHFH +897 0x2339 //TX_SENDFUNC_REG_MICMUTE +898 0x0021 //TX_SENDFUNC_REG_MICMUTE1 +899 0x02BC //TX_MICMUTE_RATIO_THR +900 0x0140 //TX_MICMUTE_AMP_THR +901 0x0004 //TX_MICMUTE_HPF_IND +902 0x00C0 //TX_MICMUTE_LOG_EYR_TH +903 0x0008 //TX_MICMUTE_CVG_TIME +904 0x0008 //TX_MICMUTE_RELEASE_TIME +905 0x01FE //TX_MIC_VOLUME_MIC0MUTE +906 0x0020 //TX_MICMUTE_EPD_OFFSET_0 +907 0x001E //TX_MICMUTE_FRQ_AEC_L +908 0x7999 //TX_MICMUTE_EAD_THR +909 0x7FFF //TX_MICMUTE_LAMBDA_CB_NLE +910 0x7FFF //TX_MICMUTE_LAMBDA_RE_EST +911 0x4000 //TX_DTD_THR1_MICMUTE_0 +912 0x7000 //TX_DTD_THR1_MICMUTE_1 +913 0x7FFF //TX_DTD_THR1_MICMUTE_2 +914 0x7FFF //TX_DTD_THR1_MICMUTE_3 +915 0x6CCC //TX_DTD_THR2_MICMUTE_0 +916 0x0400 //TX_MICMUTE_MIN_EQ_RE_EST_0 +917 0x0400 //TX_MICMUTE_MIN_EQ_RE_EST_1 +918 0x1000 //TX_MICMUTE_MIN_EQ_RE_EST_2 +919 0x7FFF //TX_MICMUTE_MIN_EQ_RE_EST_3 +920 0x7FFF //TX_MICMUTE_MIN_EQ_RE_EST_4 +921 0x4000 //TX_MICMUTE_C_POST_FLT +922 0x03E8 //TX_MICMUTE_DT_CUT_K +923 0x0001 //TX_MICMUTE_DT_CUT_THR +924 0x03E8 //TX_MICMUTE_DT_CUT_K2 +925 0x0001 //TX_MICMUTE_DT_CUT_THR2 +926 0x0064 //TX_MICMUTE_DT2_HOLD_N +927 0x1000 //TX_MICMUTE_RATIODTH_THCUT +928 0x1000 //TX_MICMUTE_B_POST_FLT_ECHOL +929 0x7FFF //TX_MICMUTE_B_POST_FLT_ECHOH +930 0x0400 //TX_MICMUTE_C_POST_FLT_MASK +931 0x7999 //TX_MICMUTE_RATIODTL_CUT_TH +932 0x0258 //TX_MICMUTE_DT_CUT_K1 +933 0x0800 //TX_MICMUTE_N2_SN_EST +934 0xFC00 //TX_MICMUTE_THR_SN_EST_0 +935 0x001C //TX_MICMUTE_MIN_G_CTRL_0 +936 0x6000 //TX_MICMUTE_A_POST_FILT_S_0 +937 0x7000 //TX_MICMUTE_B_POST_FILT_0 +938 0x2710 //TX_MIC1RUB_AMP_THR +939 0x0010 //TX_MIC1MUTE_RATIO_THR +940 0x0450 //TX_MIC1MUTE_AMP_THR +941 0x0008 //TX_MIC1MUTE_CVG_TIME +942 0x0008 //TX_MIC1MUTE_RELEASE_TIME +943 0x0000 //TX_AMS_RESRV_01 +944 0x0000 //TX_AMS_RESRV_02 +945 0x0000 //TX_AMS_RESRV_03 +946 0x0000 //TX_AMS_RESRV_04 +947 0x0000 //TX_AMS_RESRV_05 +948 0x0000 //TX_AMS_RESRV_06 +949 0x0000 //TX_AMS_RESRV_07 +950 0x0000 //TX_AMS_RESRV_08 +951 0x0000 //TX_AMS_RESRV_09 +952 0x0000 //TX_AMS_RESRV_10 +953 0x0000 //TX_AMS_RESRV_11 +954 0x0000 //TX_AMS_RESRV_12 +955 0x0000 //TX_AMS_RESRV_13 +956 0x0000 //TX_AMS_RESRV_14 +957 0x0000 //TX_AMS_RESRV_15 +958 0x0000 //TX_AMS_RESRV_16 +959 0x0000 //TX_AMS_RESRV_17 +960 0x0000 //TX_AMS_RESRV_18 +961 0x0000 //TX_AMS_RESRV_19 #RX -0 0x042C //RX_RECVFUNC_MODE_0 +0 0x242C //RX_RECVFUNC_MODE_0 1 0x0000 //RX_RECVFUNC_MODE_1 2 0x0001 //RX_SAMPLINGFREQ_SIG 3 0x0001 //RX_SAMPLINGFREQ_PROC @@ -3510,11 +4491,862 @@ 110 0x0000 //RX_FDDRC_RESRV_0 129 0x0100 //RX_SPK_VOL 130 0x0000 //RX_VOL_RESRV_0 +#RX 2 +157 0x242C //RX_RECVFUNC_MODE_0 +158 0x0000 //RX_RECVFUNC_MODE_1 +159 0x0001 //RX_SAMPLINGFREQ_SIG +160 0x0001 //RX_SAMPLINGFREQ_PROC +161 0x000A //RX_FRAME_SZ +162 0x0000 //RX_DELAY_OPT +163 0x1000 //RX_TDDRC_ALPHA_UP_1 +164 0x1000 //RX_TDDRC_ALPHA_UP_2 +165 0x1000 //RX_TDDRC_ALPHA_UP_3 +166 0x1000 //RX_TDDRC_ALPHA_UP_4 +167 0x0800 //RX_PGA +168 0x7FFF //RX_A_HP +169 0x4000 //RX_B_PE +170 0x3800 //RX_THR_PITCH_DET_0 +171 0x3000 //RX_THR_PITCH_DET_1 +172 0x2800 //RX_THR_PITCH_DET_2 +173 0x0008 //RX_PITCH_BFR_LEN +174 0x0003 //RX_SBD_PITCH_DET +175 0x0100 //RX_PP_RESRV_0 +176 0x0020 //RX_PP_RESRV_1 +177 0x0600 //RX_N_SN_EST +178 0x000C //RX_N2_SN_EST +179 0x0010 //RX_NS_LVL_CTRL +180 0xF800 //RX_THR_SN_EST +181 0x7CCD //RX_LAMBDA_PFILT +182 0x000A //RX_FENS_RESRV_0 +183 0x0190 //RX_FENS_RESRV_1 +184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +187 0x0002 //RX_EXTRA_NS_L +188 0x0800 //RX_EXTRA_NS_A +189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +190 0x7FFF //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +192 0x199A //RX_A_POST_FLT +193 0x0000 //RX_LMT_THRD +194 0x4000 //RX_LMT_ALPHA +195 0x001C //RX_FDEQ_SUBNUM +196 0x4848 //RX_FDEQ_GAIN_0 +197 0x4848 //RX_FDEQ_GAIN_1 +198 0x4848 //RX_FDEQ_GAIN_2 +199 0x4848 //RX_FDEQ_GAIN_3 +200 0x4848 //RX_FDEQ_GAIN_4 +201 0x4848 //RX_FDEQ_GAIN_5 +202 0x484B //RX_FDEQ_GAIN_6 +203 0x4B48 //RX_FDEQ_GAIN_7 +204 0x4848 //RX_FDEQ_GAIN_8 +205 0x4848 //RX_FDEQ_GAIN_9 +206 0x4846 //RX_FDEQ_GAIN_10 +207 0x403F //RX_FDEQ_GAIN_11 +208 0x3F40 //RX_FDEQ_GAIN_12 +209 0x4248 //RX_FDEQ_GAIN_13 +210 0x4848 //RX_FDEQ_GAIN_14 +211 0x4848 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0202 //RX_FDEQ_BIN_0 +221 0x0203 //RX_FDEQ_BIN_1 +222 0x0303 //RX_FDEQ_BIN_2 +223 0x0304 //RX_FDEQ_BIN_3 +224 0x0405 //RX_FDEQ_BIN_4 +225 0x0506 //RX_FDEQ_BIN_5 +226 0x0708 //RX_FDEQ_BIN_6 +227 0x090A //RX_FDEQ_BIN_7 +228 0x0B0C //RX_FDEQ_BIN_8 +229 0x0D0E //RX_FDEQ_BIN_9 +230 0x0E0F //RX_FDEQ_BIN_10 +231 0x0F10 //RX_FDEQ_BIN_11 +232 0x1011 //RX_FDEQ_BIN_12 +233 0x1104 //RX_FDEQ_BIN_13 +234 0x0000 //RX_FDEQ_BIN_14 +235 0x0000 //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x4000 //RX_FDEQ_RESRV_0 +245 0x0320 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0030 //RX_FDDRC_BAND_MARGIN_1 +248 0x0050 //RX_FDDRC_BAND_MARGIN_2 +249 0x0080 //RX_FDDRC_BAND_MARGIN_3 +250 0x0007 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x5000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x6400 //RX_FDDRC_THRD_3_2 +258 0x6400 //RX_FDDRC_THRD_3_3 +259 0x2000 //RX_FDDRC_SLANT_0_0 +260 0x2000 //RX_FDDRC_SLANT_0_1 +261 0x2000 //RX_FDDRC_SLANT_0_2 +262 0x2000 //RX_FDDRC_SLANT_0_3 +263 0x5333 //RX_FDDRC_SLANT_1_0 +264 0x5333 //RX_FDDRC_SLANT_1_1 +265 0x5333 //RX_FDDRC_SLANT_1_2 +266 0x5333 //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +268 0x0002 //RX_FILTINDX +269 0x0000 //RX_TDDRC_THRD_0 +270 0x0000 //RX_TDDRC_THRD_1 +271 0x1C00 //RX_TDDRC_THRD_2 +272 0x1D00 //RX_TDDRC_THRD_3 +273 0x3000 //RX_TDDRC_SLANT_0 +274 0x7FFF //RX_TDDRC_SLANT_1 +275 0x1000 //RX_TDDRC_ALPHA_UP_0 +276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x199A //RX_TDDRC_HMNC_GAIN +279 0x0001 //RX_TDDRC_SMT_FLAG +280 0x0CCD //RX_TDDRC_SMT_W +281 0x01AE //RX_TDDRC_DRC_GAIN +282 0x7C00 //RX_LAMBDA_PKA_FP +283 0x280A //RX_TPKA_FP +284 0x032D //RX_MIN_G_FP +285 0x0A00 //RX_MAX_G_FP +286 0x000B //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 +288 0x0000 //RX_MAXLEVEL_CNG +289 0x3000 //RX_BWE_UV_TH +290 0x3000 //RX_BWE_UV_TH2 +291 0x1800 //RX_BWE_UV_TH3 +292 0x1000 //RX_BWE_V_TH +293 0x04CD //RX_BWE_GAIN1_V_TH1 +294 0x0F33 //RX_BWE_GAIN1_V_TH2 +295 0x7333 //RX_BWE_UV_EQ +296 0x199A //RX_BWE_V_EQ +297 0x7333 //RX_BWE_TONE_TH +298 0x0004 //RX_BWE_UV_HOLD_T +299 0x6CCD //RX_BWE_GAIN2_ALPHA +300 0x799A //RX_BWE_GAIN3_ALPHA +301 0x001E //RX_BWE_CUTOFF +302 0x3000 //RX_BWE_GAINFILL +303 0x3200 //RX_BWE_MAXTH_TONE +304 0x2000 //RX_BWE_EQ_0 +305 0x2000 //RX_BWE_EQ_1 +306 0x2000 //RX_BWE_EQ_2 +307 0x2000 //RX_BWE_EQ_3 +308 0x2000 //RX_BWE_EQ_4 +309 0x2000 //RX_BWE_EQ_5 +310 0x2000 //RX_BWE_EQ_6 +311 0x0000 //RX_BWE_RESRV_0 +312 0x0000 //RX_BWE_RESRV_1 +313 0x0000 //RX_BWE_RESRV_2 +#VOL 0 +163 0x1000 //RX_TDDRC_ALPHA_UP_1 +164 0x1000 //RX_TDDRC_ALPHA_UP_2 +165 0x1000 //RX_TDDRC_ALPHA_UP_3 +166 0x1000 //RX_TDDRC_ALPHA_UP_4 +184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +190 0x7220 //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +269 0x0000 //RX_TDDRC_THRD_0 +270 0x0000 //RX_TDDRC_THRD_1 +271 0x1800 //RX_TDDRC_THRD_2 +272 0x1800 //RX_TDDRC_THRD_3 +273 0x7FFF //RX_TDDRC_SLANT_0 +274 0x7FFF //RX_TDDRC_SLANT_1 +275 0x1000 //RX_TDDRC_ALPHA_UP_0 +276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x199A //RX_TDDRC_HMNC_GAIN +279 0x0001 //RX_TDDRC_SMT_FLAG +280 0x0CCD //RX_TDDRC_SMT_W +281 0x01A0 //RX_TDDRC_DRC_GAIN +195 0x001C //RX_FDEQ_SUBNUM +196 0x4848 //RX_FDEQ_GAIN_0 +197 0x4848 //RX_FDEQ_GAIN_1 +198 0x4848 //RX_FDEQ_GAIN_2 +199 0x4848 //RX_FDEQ_GAIN_3 +200 0x4848 //RX_FDEQ_GAIN_4 +201 0x4848 //RX_FDEQ_GAIN_5 +202 0x484B //RX_FDEQ_GAIN_6 +203 0x4B48 //RX_FDEQ_GAIN_7 +204 0x4848 //RX_FDEQ_GAIN_8 +205 0x4848 //RX_FDEQ_GAIN_9 +206 0x4846 //RX_FDEQ_GAIN_10 +207 0x403F //RX_FDEQ_GAIN_11 +208 0x3F40 //RX_FDEQ_GAIN_12 +209 0x4248 //RX_FDEQ_GAIN_13 +210 0x4848 //RX_FDEQ_GAIN_14 +211 0x4848 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0202 //RX_FDEQ_BIN_0 +221 0x0203 //RX_FDEQ_BIN_1 +222 0x0303 //RX_FDEQ_BIN_2 +223 0x0304 //RX_FDEQ_BIN_3 +224 0x0405 //RX_FDEQ_BIN_4 +225 0x0506 //RX_FDEQ_BIN_5 +226 0x0708 //RX_FDEQ_BIN_6 +227 0x090A //RX_FDEQ_BIN_7 +228 0x0B0C //RX_FDEQ_BIN_8 +229 0x0D0E //RX_FDEQ_BIN_9 +230 0x0E0F //RX_FDEQ_BIN_10 +231 0x0F10 //RX_FDEQ_BIN_11 +232 0x1011 //RX_FDEQ_BIN_12 +233 0x1104 //RX_FDEQ_BIN_13 +234 0x0000 //RX_FDEQ_BIN_14 +235 0x0000 //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x4000 //RX_FDEQ_RESRV_0 +245 0x0320 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0030 //RX_FDDRC_BAND_MARGIN_1 +248 0x0050 //RX_FDDRC_BAND_MARGIN_2 +249 0x0080 //RX_FDDRC_BAND_MARGIN_3 +250 0x0007 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x5000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x6400 //RX_FDDRC_THRD_3_2 +258 0x6400 //RX_FDDRC_THRD_3_3 +259 0x2000 //RX_FDDRC_SLANT_0_0 +260 0x2000 //RX_FDDRC_SLANT_0_1 +261 0x2000 //RX_FDDRC_SLANT_0_2 +262 0x2000 //RX_FDDRC_SLANT_0_3 +263 0x5333 //RX_FDDRC_SLANT_1_0 +264 0x5333 //RX_FDDRC_SLANT_1_1 +265 0x5333 //RX_FDDRC_SLANT_1_2 +266 0x5333 //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +286 0x000A //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 +#VOL 1 +163 0x1000 //RX_TDDRC_ALPHA_UP_1 +164 0x1000 //RX_TDDRC_ALPHA_UP_2 +165 0x1000 //RX_TDDRC_ALPHA_UP_3 +166 0x1000 //RX_TDDRC_ALPHA_UP_4 +184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +190 0x7220 //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +269 0x0000 //RX_TDDRC_THRD_0 +270 0x0000 //RX_TDDRC_THRD_1 +271 0x1800 //RX_TDDRC_THRD_2 +272 0x1800 //RX_TDDRC_THRD_3 +273 0x7FFF //RX_TDDRC_SLANT_0 +274 0x7FFF //RX_TDDRC_SLANT_1 +275 0x1000 //RX_TDDRC_ALPHA_UP_0 +276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x199A //RX_TDDRC_HMNC_GAIN +279 0x0001 //RX_TDDRC_SMT_FLAG +280 0x0CCD //RX_TDDRC_SMT_W +281 0x01A0 //RX_TDDRC_DRC_GAIN +195 0x001C //RX_FDEQ_SUBNUM +196 0x4848 //RX_FDEQ_GAIN_0 +197 0x4848 //RX_FDEQ_GAIN_1 +198 0x4848 //RX_FDEQ_GAIN_2 +199 0x4848 //RX_FDEQ_GAIN_3 +200 0x4848 //RX_FDEQ_GAIN_4 +201 0x4848 //RX_FDEQ_GAIN_5 +202 0x484B //RX_FDEQ_GAIN_6 +203 0x4B48 //RX_FDEQ_GAIN_7 +204 0x4848 //RX_FDEQ_GAIN_8 +205 0x4848 //RX_FDEQ_GAIN_9 +206 0x4846 //RX_FDEQ_GAIN_10 +207 0x403F //RX_FDEQ_GAIN_11 +208 0x3F40 //RX_FDEQ_GAIN_12 +209 0x4248 //RX_FDEQ_GAIN_13 +210 0x4848 //RX_FDEQ_GAIN_14 +211 0x4848 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0202 //RX_FDEQ_BIN_0 +221 0x0203 //RX_FDEQ_BIN_1 +222 0x0303 //RX_FDEQ_BIN_2 +223 0x0304 //RX_FDEQ_BIN_3 +224 0x0405 //RX_FDEQ_BIN_4 +225 0x0506 //RX_FDEQ_BIN_5 +226 0x0708 //RX_FDEQ_BIN_6 +227 0x090A //RX_FDEQ_BIN_7 +228 0x0B0C //RX_FDEQ_BIN_8 +229 0x0D0E //RX_FDEQ_BIN_9 +230 0x0E0F //RX_FDEQ_BIN_10 +231 0x0F10 //RX_FDEQ_BIN_11 +232 0x1011 //RX_FDEQ_BIN_12 +233 0x1104 //RX_FDEQ_BIN_13 +234 0x0000 //RX_FDEQ_BIN_14 +235 0x0000 //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x4000 //RX_FDEQ_RESRV_0 +245 0x0320 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0030 //RX_FDDRC_BAND_MARGIN_1 +248 0x0050 //RX_FDDRC_BAND_MARGIN_2 +249 0x0080 //RX_FDDRC_BAND_MARGIN_3 +250 0x0007 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x5000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x6400 //RX_FDDRC_THRD_3_2 +258 0x6400 //RX_FDDRC_THRD_3_3 +259 0x2000 //RX_FDDRC_SLANT_0_0 +260 0x2000 //RX_FDDRC_SLANT_0_1 +261 0x2000 //RX_FDDRC_SLANT_0_2 +262 0x2000 //RX_FDDRC_SLANT_0_3 +263 0x5333 //RX_FDDRC_SLANT_1_0 +264 0x5333 //RX_FDDRC_SLANT_1_1 +265 0x5333 //RX_FDDRC_SLANT_1_2 +266 0x5333 //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +286 0x0011 //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 +#VOL 2 +163 0x1000 //RX_TDDRC_ALPHA_UP_1 +164 0x1000 //RX_TDDRC_ALPHA_UP_2 +165 0x1000 //RX_TDDRC_ALPHA_UP_3 +166 0x1000 //RX_TDDRC_ALPHA_UP_4 +184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +190 0x7220 //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +269 0x0000 //RX_TDDRC_THRD_0 +270 0x0000 //RX_TDDRC_THRD_1 +271 0x1800 //RX_TDDRC_THRD_2 +272 0x1800 //RX_TDDRC_THRD_3 +273 0x7FFF //RX_TDDRC_SLANT_0 +274 0x7FFF //RX_TDDRC_SLANT_1 +275 0x1000 //RX_TDDRC_ALPHA_UP_0 +276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x199A //RX_TDDRC_HMNC_GAIN +279 0x0001 //RX_TDDRC_SMT_FLAG +280 0x0CCD //RX_TDDRC_SMT_W +281 0x01A0 //RX_TDDRC_DRC_GAIN +195 0x001C //RX_FDEQ_SUBNUM +196 0x4848 //RX_FDEQ_GAIN_0 +197 0x4848 //RX_FDEQ_GAIN_1 +198 0x4848 //RX_FDEQ_GAIN_2 +199 0x4848 //RX_FDEQ_GAIN_3 +200 0x4848 //RX_FDEQ_GAIN_4 +201 0x4848 //RX_FDEQ_GAIN_5 +202 0x484B //RX_FDEQ_GAIN_6 +203 0x4B48 //RX_FDEQ_GAIN_7 +204 0x4848 //RX_FDEQ_GAIN_8 +205 0x4848 //RX_FDEQ_GAIN_9 +206 0x4846 //RX_FDEQ_GAIN_10 +207 0x403F //RX_FDEQ_GAIN_11 +208 0x3F40 //RX_FDEQ_GAIN_12 +209 0x4248 //RX_FDEQ_GAIN_13 +210 0x4848 //RX_FDEQ_GAIN_14 +211 0x4848 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0202 //RX_FDEQ_BIN_0 +221 0x0203 //RX_FDEQ_BIN_1 +222 0x0303 //RX_FDEQ_BIN_2 +223 0x0304 //RX_FDEQ_BIN_3 +224 0x0405 //RX_FDEQ_BIN_4 +225 0x0506 //RX_FDEQ_BIN_5 +226 0x0708 //RX_FDEQ_BIN_6 +227 0x090A //RX_FDEQ_BIN_7 +228 0x0B0C //RX_FDEQ_BIN_8 +229 0x0D0E //RX_FDEQ_BIN_9 +230 0x0E0F //RX_FDEQ_BIN_10 +231 0x0F10 //RX_FDEQ_BIN_11 +232 0x1011 //RX_FDEQ_BIN_12 +233 0x1104 //RX_FDEQ_BIN_13 +234 0x0000 //RX_FDEQ_BIN_14 +235 0x0000 //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x4000 //RX_FDEQ_RESRV_0 +245 0x0320 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0030 //RX_FDDRC_BAND_MARGIN_1 +248 0x0050 //RX_FDDRC_BAND_MARGIN_2 +249 0x0080 //RX_FDDRC_BAND_MARGIN_3 +250 0x0007 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x5000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x6400 //RX_FDDRC_THRD_3_2 +258 0x6400 //RX_FDDRC_THRD_3_3 +259 0x2000 //RX_FDDRC_SLANT_0_0 +260 0x2000 //RX_FDDRC_SLANT_0_1 +261 0x2000 //RX_FDDRC_SLANT_0_2 +262 0x2000 //RX_FDDRC_SLANT_0_3 +263 0x5333 //RX_FDDRC_SLANT_1_0 +264 0x5333 //RX_FDDRC_SLANT_1_1 +265 0x5333 //RX_FDDRC_SLANT_1_2 +266 0x5333 //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +286 0x001D //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 +#VOL 3 +163 0x1000 //RX_TDDRC_ALPHA_UP_1 +164 0x1000 //RX_TDDRC_ALPHA_UP_2 +165 0x1000 //RX_TDDRC_ALPHA_UP_3 +166 0x1000 //RX_TDDRC_ALPHA_UP_4 +184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +190 0x7220 //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +269 0x0000 //RX_TDDRC_THRD_0 +270 0x0000 //RX_TDDRC_THRD_1 +271 0x1800 //RX_TDDRC_THRD_2 +272 0x1800 //RX_TDDRC_THRD_3 +273 0x7FFF //RX_TDDRC_SLANT_0 +274 0x7FFF //RX_TDDRC_SLANT_1 +275 0x1000 //RX_TDDRC_ALPHA_UP_0 +276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x199A //RX_TDDRC_HMNC_GAIN +279 0x0001 //RX_TDDRC_SMT_FLAG +280 0x0CCD //RX_TDDRC_SMT_W +281 0x01A0 //RX_TDDRC_DRC_GAIN +195 0x001C //RX_FDEQ_SUBNUM +196 0x4848 //RX_FDEQ_GAIN_0 +197 0x4848 //RX_FDEQ_GAIN_1 +198 0x4848 //RX_FDEQ_GAIN_2 +199 0x4848 //RX_FDEQ_GAIN_3 +200 0x4848 //RX_FDEQ_GAIN_4 +201 0x4848 //RX_FDEQ_GAIN_5 +202 0x484B //RX_FDEQ_GAIN_6 +203 0x4B48 //RX_FDEQ_GAIN_7 +204 0x4848 //RX_FDEQ_GAIN_8 +205 0x4848 //RX_FDEQ_GAIN_9 +206 0x4846 //RX_FDEQ_GAIN_10 +207 0x403F //RX_FDEQ_GAIN_11 +208 0x3F40 //RX_FDEQ_GAIN_12 +209 0x4248 //RX_FDEQ_GAIN_13 +210 0x4848 //RX_FDEQ_GAIN_14 +211 0x4848 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0202 //RX_FDEQ_BIN_0 +221 0x0203 //RX_FDEQ_BIN_1 +222 0x0303 //RX_FDEQ_BIN_2 +223 0x0304 //RX_FDEQ_BIN_3 +224 0x0405 //RX_FDEQ_BIN_4 +225 0x0506 //RX_FDEQ_BIN_5 +226 0x0708 //RX_FDEQ_BIN_6 +227 0x090A //RX_FDEQ_BIN_7 +228 0x0B0C //RX_FDEQ_BIN_8 +229 0x0D0E //RX_FDEQ_BIN_9 +230 0x0E0F //RX_FDEQ_BIN_10 +231 0x0F10 //RX_FDEQ_BIN_11 +232 0x1011 //RX_FDEQ_BIN_12 +233 0x1104 //RX_FDEQ_BIN_13 +234 0x0000 //RX_FDEQ_BIN_14 +235 0x0000 //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x4000 //RX_FDEQ_RESRV_0 +245 0x0320 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0030 //RX_FDDRC_BAND_MARGIN_1 +248 0x0050 //RX_FDDRC_BAND_MARGIN_2 +249 0x0080 //RX_FDDRC_BAND_MARGIN_3 +250 0x0007 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x5000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x6400 //RX_FDDRC_THRD_3_2 +258 0x6400 //RX_FDDRC_THRD_3_3 +259 0x2000 //RX_FDDRC_SLANT_0_0 +260 0x2000 //RX_FDDRC_SLANT_0_1 +261 0x2000 //RX_FDDRC_SLANT_0_2 +262 0x2000 //RX_FDDRC_SLANT_0_3 +263 0x5333 //RX_FDDRC_SLANT_1_0 +264 0x5333 //RX_FDDRC_SLANT_1_1 +265 0x5333 //RX_FDDRC_SLANT_1_2 +266 0x5333 //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +286 0x0030 //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 +#VOL 4 +163 0x1000 //RX_TDDRC_ALPHA_UP_1 +164 0x1000 //RX_TDDRC_ALPHA_UP_2 +165 0x1000 //RX_TDDRC_ALPHA_UP_3 +166 0x1000 //RX_TDDRC_ALPHA_UP_4 +184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +190 0x7220 //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +269 0x0000 //RX_TDDRC_THRD_0 +270 0x0000 //RX_TDDRC_THRD_1 +271 0x1800 //RX_TDDRC_THRD_2 +272 0x1800 //RX_TDDRC_THRD_3 +273 0x7FFF //RX_TDDRC_SLANT_0 +274 0x7FFF //RX_TDDRC_SLANT_1 +275 0x1000 //RX_TDDRC_ALPHA_UP_0 +276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x199A //RX_TDDRC_HMNC_GAIN +279 0x0001 //RX_TDDRC_SMT_FLAG +280 0x0CCD //RX_TDDRC_SMT_W +281 0x01A0 //RX_TDDRC_DRC_GAIN +195 0x001C //RX_FDEQ_SUBNUM +196 0x4848 //RX_FDEQ_GAIN_0 +197 0x4848 //RX_FDEQ_GAIN_1 +198 0x4848 //RX_FDEQ_GAIN_2 +199 0x4848 //RX_FDEQ_GAIN_3 +200 0x4848 //RX_FDEQ_GAIN_4 +201 0x4848 //RX_FDEQ_GAIN_5 +202 0x484B //RX_FDEQ_GAIN_6 +203 0x4B48 //RX_FDEQ_GAIN_7 +204 0x4848 //RX_FDEQ_GAIN_8 +205 0x4848 //RX_FDEQ_GAIN_9 +206 0x4846 //RX_FDEQ_GAIN_10 +207 0x403F //RX_FDEQ_GAIN_11 +208 0x3F40 //RX_FDEQ_GAIN_12 +209 0x4248 //RX_FDEQ_GAIN_13 +210 0x4848 //RX_FDEQ_GAIN_14 +211 0x4848 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0202 //RX_FDEQ_BIN_0 +221 0x0203 //RX_FDEQ_BIN_1 +222 0x0303 //RX_FDEQ_BIN_2 +223 0x0304 //RX_FDEQ_BIN_3 +224 0x0405 //RX_FDEQ_BIN_4 +225 0x0506 //RX_FDEQ_BIN_5 +226 0x0708 //RX_FDEQ_BIN_6 +227 0x090A //RX_FDEQ_BIN_7 +228 0x0B0C //RX_FDEQ_BIN_8 +229 0x0D0E //RX_FDEQ_BIN_9 +230 0x0E0F //RX_FDEQ_BIN_10 +231 0x0F10 //RX_FDEQ_BIN_11 +232 0x1011 //RX_FDEQ_BIN_12 +233 0x1104 //RX_FDEQ_BIN_13 +234 0x0000 //RX_FDEQ_BIN_14 +235 0x0000 //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x4000 //RX_FDEQ_RESRV_0 +245 0x0320 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0030 //RX_FDDRC_BAND_MARGIN_1 +248 0x0050 //RX_FDDRC_BAND_MARGIN_2 +249 0x0080 //RX_FDDRC_BAND_MARGIN_3 +250 0x0007 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x5000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x6400 //RX_FDDRC_THRD_3_2 +258 0x6400 //RX_FDDRC_THRD_3_3 +259 0x2000 //RX_FDDRC_SLANT_0_0 +260 0x2000 //RX_FDDRC_SLANT_0_1 +261 0x2000 //RX_FDDRC_SLANT_0_2 +262 0x2000 //RX_FDDRC_SLANT_0_3 +263 0x5333 //RX_FDDRC_SLANT_1_0 +264 0x5333 //RX_FDDRC_SLANT_1_1 +265 0x5333 //RX_FDDRC_SLANT_1_2 +266 0x5333 //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +286 0x0050 //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 +#VOL 5 +163 0x1000 //RX_TDDRC_ALPHA_UP_1 +164 0x1000 //RX_TDDRC_ALPHA_UP_2 +165 0x1000 //RX_TDDRC_ALPHA_UP_3 +166 0x1000 //RX_TDDRC_ALPHA_UP_4 +184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +190 0x7220 //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +269 0x0000 //RX_TDDRC_THRD_0 +270 0x0000 //RX_TDDRC_THRD_1 +271 0x1800 //RX_TDDRC_THRD_2 +272 0x1800 //RX_TDDRC_THRD_3 +273 0x7FFF //RX_TDDRC_SLANT_0 +274 0x7FFF //RX_TDDRC_SLANT_1 +275 0x1000 //RX_TDDRC_ALPHA_UP_0 +276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x199A //RX_TDDRC_HMNC_GAIN +279 0x0001 //RX_TDDRC_SMT_FLAG +280 0x0CCD //RX_TDDRC_SMT_W +281 0x01A0 //RX_TDDRC_DRC_GAIN +195 0x001C //RX_FDEQ_SUBNUM +196 0x4848 //RX_FDEQ_GAIN_0 +197 0x4848 //RX_FDEQ_GAIN_1 +198 0x4848 //RX_FDEQ_GAIN_2 +199 0x4848 //RX_FDEQ_GAIN_3 +200 0x4848 //RX_FDEQ_GAIN_4 +201 0x4848 //RX_FDEQ_GAIN_5 +202 0x484B //RX_FDEQ_GAIN_6 +203 0x4B48 //RX_FDEQ_GAIN_7 +204 0x4848 //RX_FDEQ_GAIN_8 +205 0x4848 //RX_FDEQ_GAIN_9 +206 0x4846 //RX_FDEQ_GAIN_10 +207 0x403F //RX_FDEQ_GAIN_11 +208 0x3F40 //RX_FDEQ_GAIN_12 +209 0x4248 //RX_FDEQ_GAIN_13 +210 0x4848 //RX_FDEQ_GAIN_14 +211 0x4848 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0202 //RX_FDEQ_BIN_0 +221 0x0203 //RX_FDEQ_BIN_1 +222 0x0303 //RX_FDEQ_BIN_2 +223 0x0304 //RX_FDEQ_BIN_3 +224 0x0405 //RX_FDEQ_BIN_4 +225 0x0506 //RX_FDEQ_BIN_5 +226 0x0708 //RX_FDEQ_BIN_6 +227 0x090A //RX_FDEQ_BIN_7 +228 0x0B0C //RX_FDEQ_BIN_8 +229 0x0D0E //RX_FDEQ_BIN_9 +230 0x0E0F //RX_FDEQ_BIN_10 +231 0x0F10 //RX_FDEQ_BIN_11 +232 0x1011 //RX_FDEQ_BIN_12 +233 0x1104 //RX_FDEQ_BIN_13 +234 0x0000 //RX_FDEQ_BIN_14 +235 0x0000 //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x4000 //RX_FDEQ_RESRV_0 +245 0x0320 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0030 //RX_FDDRC_BAND_MARGIN_1 +248 0x0050 //RX_FDDRC_BAND_MARGIN_2 +249 0x0080 //RX_FDDRC_BAND_MARGIN_3 +250 0x0007 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x5000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x6400 //RX_FDDRC_THRD_3_2 +258 0x6400 //RX_FDDRC_THRD_3_3 +259 0x2000 //RX_FDDRC_SLANT_0_0 +260 0x2000 //RX_FDDRC_SLANT_0_1 +261 0x2000 //RX_FDDRC_SLANT_0_2 +262 0x2000 //RX_FDDRC_SLANT_0_3 +263 0x5333 //RX_FDDRC_SLANT_1_0 +264 0x5333 //RX_FDDRC_SLANT_1_1 +265 0x5333 //RX_FDDRC_SLANT_1_2 +266 0x5333 //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +286 0x0087 //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 +#VOL 6 +163 0x1000 //RX_TDDRC_ALPHA_UP_1 +164 0x1000 //RX_TDDRC_ALPHA_UP_2 +165 0x1000 //RX_TDDRC_ALPHA_UP_3 +166 0x1000 //RX_TDDRC_ALPHA_UP_4 +184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +190 0x7220 //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +269 0x0000 //RX_TDDRC_THRD_0 +270 0x0000 //RX_TDDRC_THRD_1 +271 0x1800 //RX_TDDRC_THRD_2 +272 0x1800 //RX_TDDRC_THRD_3 +273 0x7FFF //RX_TDDRC_SLANT_0 +274 0x7FFF //RX_TDDRC_SLANT_1 +275 0x1000 //RX_TDDRC_ALPHA_UP_0 +276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x199A //RX_TDDRC_HMNC_GAIN +279 0x0001 //RX_TDDRC_SMT_FLAG +280 0x0CCD //RX_TDDRC_SMT_W +281 0x01A0 //RX_TDDRC_DRC_GAIN +195 0x001C //RX_FDEQ_SUBNUM +196 0x4848 //RX_FDEQ_GAIN_0 +197 0x4848 //RX_FDEQ_GAIN_1 +198 0x4848 //RX_FDEQ_GAIN_2 +199 0x4848 //RX_FDEQ_GAIN_3 +200 0x4848 //RX_FDEQ_GAIN_4 +201 0x4848 //RX_FDEQ_GAIN_5 +202 0x484B //RX_FDEQ_GAIN_6 +203 0x4B48 //RX_FDEQ_GAIN_7 +204 0x4848 //RX_FDEQ_GAIN_8 +205 0x4848 //RX_FDEQ_GAIN_9 +206 0x4846 //RX_FDEQ_GAIN_10 +207 0x403F //RX_FDEQ_GAIN_11 +208 0x3F40 //RX_FDEQ_GAIN_12 +209 0x4248 //RX_FDEQ_GAIN_13 +210 0x4848 //RX_FDEQ_GAIN_14 +211 0x4848 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0202 //RX_FDEQ_BIN_0 +221 0x0203 //RX_FDEQ_BIN_1 +222 0x0303 //RX_FDEQ_BIN_2 +223 0x0304 //RX_FDEQ_BIN_3 +224 0x0405 //RX_FDEQ_BIN_4 +225 0x0506 //RX_FDEQ_BIN_5 +226 0x0708 //RX_FDEQ_BIN_6 +227 0x090A //RX_FDEQ_BIN_7 +228 0x0B0C //RX_FDEQ_BIN_8 +229 0x0D0E //RX_FDEQ_BIN_9 +230 0x0E0F //RX_FDEQ_BIN_10 +231 0x0F10 //RX_FDEQ_BIN_11 +232 0x1011 //RX_FDEQ_BIN_12 +233 0x1104 //RX_FDEQ_BIN_13 +234 0x0000 //RX_FDEQ_BIN_14 +235 0x0000 //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x4000 //RX_FDEQ_RESRV_0 +245 0x0320 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0030 //RX_FDDRC_BAND_MARGIN_1 +248 0x0050 //RX_FDDRC_BAND_MARGIN_2 +249 0x0080 //RX_FDDRC_BAND_MARGIN_3 +250 0x0007 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x5000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x6400 //RX_FDDRC_THRD_3_2 +258 0x6400 //RX_FDDRC_THRD_3_3 +259 0x2000 //RX_FDDRC_SLANT_0_0 +260 0x2000 //RX_FDDRC_SLANT_0_1 +261 0x2000 //RX_FDDRC_SLANT_0_2 +262 0x2000 //RX_FDDRC_SLANT_0_3 +263 0x5333 //RX_FDDRC_SLANT_1_0 +264 0x5333 //RX_FDDRC_SLANT_1_1 +265 0x5333 //RX_FDDRC_SLANT_1_2 +266 0x5333 //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +286 0x0100 //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 #CASE_NAME HEADSET-USB_BLACKBIRD-VOICE_GENERIC-SWB -#PARAM_MODE FULL -#PARAM_TYPE TX+RX -#TOTAL_CUSTOM_STEP 7 +#PARAM_MODE Full +#PARAM_TYPE TX+2RX +#TOTAL_CUSTOM_STEP 7+7 #TX 0 0x0009 //TX_OPERATION_MODE_0 1 0x0001 //TX_OPERATION_MODE_1 @@ -3758,7 +5590,7 @@ 239 0x0800 //TX_DT_RESRV_7 240 0x0800 //TX_DT_RESRV_8 241 0x0000 //TX_DT_RESRV_9 -242 0xF400 //TX_THR_SN_EST_0 +242 0xFA00 //TX_THR_SN_EST_0 243 0xFA00 //TX_THR_SN_EST_1 244 0xF700 //TX_THR_SN_EST_2 245 0xFA00 //TX_THR_SN_EST_3 @@ -3767,20 +5599,20 @@ 248 0xF400 //TX_THR_SN_EST_6 249 0xF600 //TX_THR_SN_EST_7 250 0x0000 //TX_DELTA_THR_SN_EST_0 -251 0x0100 //TX_DELTA_THR_SN_EST_1 +251 0x0200 //TX_DELTA_THR_SN_EST_1 252 0x0200 //TX_DELTA_THR_SN_EST_2 -253 0x0200 //TX_DELTA_THR_SN_EST_3 -254 0x0100 //TX_DELTA_THR_SN_EST_4 +253 0x0100 //TX_DELTA_THR_SN_EST_3 +254 0x0200 //TX_DELTA_THR_SN_EST_4 255 0x0200 //TX_DELTA_THR_SN_EST_5 -256 0x0200 //TX_DELTA_THR_SN_EST_6 +256 0x0100 //TX_DELTA_THR_SN_EST_6 257 0x0200 //TX_DELTA_THR_SN_EST_7 258 0x6000 //TX_LAMBDA_NN_EST_0 -259 0x6000 //TX_LAMBDA_NN_EST_1 +259 0x4000 //TX_LAMBDA_NN_EST_1 260 0x4000 //TX_LAMBDA_NN_EST_2 261 0x4000 //TX_LAMBDA_NN_EST_3 262 0x4000 //TX_LAMBDA_NN_EST_4 263 0x4000 //TX_LAMBDA_NN_EST_5 -264 0x4000 //TX_LAMBDA_NN_EST_6 +264 0x6000 //TX_LAMBDA_NN_EST_6 265 0x4000 //TX_LAMBDA_NN_EST_7 266 0x0400 //TX_N_SN_EST 267 0x001E //TX_INBEAM_T @@ -3798,18 +5630,18 @@ 279 0x1000 //TX_B_POST_FLT_0 280 0x1000 //TX_B_POST_FLT_1 281 0x000F //TX_NS_LVL_CTRL_0 -282 0x0018 //TX_NS_LVL_CTRL_1 -283 0x0014 //TX_NS_LVL_CTRL_2 -284 0x0018 //TX_NS_LVL_CTRL_3 -285 0x0012 //TX_NS_LVL_CTRL_4 +282 0x0014 //TX_NS_LVL_CTRL_1 +283 0x0018 //TX_NS_LVL_CTRL_2 +284 0x0012 //TX_NS_LVL_CTRL_3 +285 0x000F //TX_NS_LVL_CTRL_4 286 0x000F //TX_NS_LVL_CTRL_5 -287 0x000F //TX_NS_LVL_CTRL_6 +287 0x0018 //TX_NS_LVL_CTRL_6 288 0x0011 //TX_NS_LVL_CTRL_7 289 0x000C //TX_MIN_GAIN_S_0 -290 0x000C //TX_MIN_GAIN_S_1 -291 0x000F //TX_MIN_GAIN_S_2 -292 0x000C //TX_MIN_GAIN_S_3 -293 0x0009 //TX_MIN_GAIN_S_4 +290 0x000F //TX_MIN_GAIN_S_1 +291 0x000C //TX_MIN_GAIN_S_2 +292 0x0009 //TX_MIN_GAIN_S_3 +293 0x000C //TX_MIN_GAIN_S_4 294 0x000C //TX_MIN_GAIN_S_5 295 0x000C //TX_MIN_GAIN_S_6 296 0x000F //TX_MIN_GAIN_S_7 @@ -3817,10 +5649,10 @@ 298 0x0000 //TX_NS_MAX_PRI_SNR_TH 299 0x0000 //TX_NMOS_SUP_MENSA 300 0x7FFF //TX_SNRI_SUP_0 -301 0x7FFF //TX_SNRI_SUP_1 -302 0x6000 //TX_SNRI_SUP_2 -303 0x5000 //TX_SNRI_SUP_3 -304 0x6000 //TX_SNRI_SUP_4 +301 0x6000 //TX_SNRI_SUP_1 +302 0x5000 //TX_SNRI_SUP_2 +303 0x6000 //TX_SNRI_SUP_3 +304 0x7FFF //TX_SNRI_SUP_4 305 0x7FFF //TX_SNRI_SUP_5 306 0x7FFF //TX_SNRI_SUP_6 307 0x7FFF //TX_SNRI_SUP_7 @@ -3831,17 +5663,17 @@ 312 0x7FFF //TX_A_POST_FILT_0 313 0x2000 //TX_A_POST_FILT_1 314 0x4000 //TX_A_POST_FILT_S_0 -315 0x4000 //TX_A_POST_FILT_S_1 +315 0x5000 //TX_A_POST_FILT_S_1 316 0x5000 //TX_A_POST_FILT_S_2 317 0x5000 //TX_A_POST_FILT_S_3 318 0x5000 //TX_A_POST_FILT_S_4 319 0x5000 //TX_A_POST_FILT_S_5 -320 0x5000 //TX_A_POST_FILT_S_6 +320 0x4000 //TX_A_POST_FILT_S_6 321 0x5000 //TX_A_POST_FILT_S_7 322 0x1000 //TX_B_POST_FILT_0 323 0x1000 //TX_B_POST_FILT_1 -324 0x1000 //TX_B_POST_FILT_2 -325 0x3000 //TX_B_POST_FILT_3 +324 0x3000 //TX_B_POST_FILT_2 +325 0x1000 //TX_B_POST_FILT_3 326 0x1000 //TX_B_POST_FILT_4 327 0x1000 //TX_B_POST_FILT_5 328 0x1000 //TX_B_POST_FILT_6 @@ -3856,12 +5688,12 @@ 337 0x7FFF //TX_B_LESSCUT_RTO_S_7 338 0x7CCD //TX_LAMBDA_PFILT 339 0x7B00 //TX_LAMBDA_PFILT_S_0 -340 0x7F00 //TX_LAMBDA_PFILT_S_1 -341 0x7B00 //TX_LAMBDA_PFILT_S_2 -342 0x7000 //TX_LAMBDA_PFILT_S_3 +340 0x7B00 //TX_LAMBDA_PFILT_S_1 +341 0x7000 //TX_LAMBDA_PFILT_S_2 +342 0x7B00 //TX_LAMBDA_PFILT_S_3 343 0x7B00 //TX_LAMBDA_PFILT_S_4 344 0x7B00 //TX_LAMBDA_PFILT_S_5 -345 0x7B00 //TX_LAMBDA_PFILT_S_6 +345 0x7F00 //TX_LAMBDA_PFILT_S_6 346 0x7B00 //TX_LAMBDA_PFILT_S_7 347 0x0200 //TX_K_PEPPER 348 0x0400 //TX_A_PEPPER @@ -3883,7 +5715,7 @@ 364 0x0000 //TX_K_APT 365 0x0001 //TX_NOISEDET 366 0x0190 //TX_NDETCT -367 0x0050 //TX_NOISE_TH_0 +367 0x0383 //TX_NOISE_TH_0 368 0x7FFF //TX_NOISE_TH_0_2 369 0x7FFF //TX_NOISE_TH_0_3 370 0x07D0 //TX_NOISE_TH_1 @@ -3895,11 +5727,11 @@ 376 0x7FFF //TX_NOISE_TH_5_3 377 0x7FFF //TX_NOISE_TH_5_4 378 0x044C //TX_NOISE_TH_6 -379 0x0014 //TX_MINENOISE_TH -380 0x4000 //TX_MINENOISE_MIC0_TH_MTS -381 0xFFEE //TX_MINENOISE_MIC0_TH_EXP -382 0x6000 //TX_MINENOISE_MIC0_S_TH_MTS -383 0xFFF3 //TX_MINENOISE_MIC0_S_TH_EXP +379 0x044C //TX_MINENOISE_TH +380 0xD508 //TX_MORENS_TFMASK_TH +381 0x0001 //TX_DRC_QUIET_FLOOR +382 0x3A98 //TX_RATIODTL_CUT_TH +383 0x0DAC //TX_DT_CUT_K1 384 0x0666 //TX_OUT_ENER_S_TH_CLEAN 385 0x0666 //TX_OUT_ENER_S_TH_LESSCLEAN 386 0x0333 //TX_OUT_ENER_S_TH_NOISY @@ -3907,22 +5739,22 @@ 388 0x0333 //TX_OUT_ENER_TH_SPEECH 389 0x2000 //TX_SN_NPB_GAIN 390 0x0000 //TX_NN_NPB_GAIN -391 0x0000 //TX_CSX_ALPHA_0 -392 0x0000 //TX_CSX_ALPHA_1 -393 0x0000 //TX_CSX_ALPHA_2 -394 0x0000 //TX_CSX_ALPHA_3 -395 0x0800 //TX_MU_ARSP_EST -396 0x00C8 //TX_P_OUTBEAM_MIN_TH +391 0x7FFF //TX_POST_MASK_SUP_HSNE +392 0x1388 //TX_TAIL_DET_TH +393 0x4000 //TX_B_LESSCUT_RTO_WTA +394 0x0000 //TX_MEL_G_R +395 0x0080 //TX_SUPHIGH_TH +396 0x0000 //TX_MASK_G_R 397 0x0002 //TX_EXTRA_NS_L -398 0x0800 //TX_EXTRA_NS_A -399 0x0005 //TX_VR_NOISE_FLOOR_TH +398 0x1800 //TX_C_POST_FLT_MASK +399 0x7FFF //TX_A_POST_FLT_WNS 400 0x0148 //TX_MIN_G_LOW300HZ 401 0x0004 //TX_MAXLEVEL_CNG 402 0x00B4 //TX_STN_NOISE_TH 403 0x4000 //TX_POST_MASK_SUP 404 0x7FFF //TX_POST_MASK_ADJUST 405 0x00C8 //TX_NS_ENOISE_MIC0_TH -406 0x0014 //TX_MINENOISE_MIC0_TH +406 0x02F3 //TX_MINENOISE_MIC0_TH 407 0x012C //TX_MINENOISE_MIC0_S_TH 408 0x7FFF //TX_MIN_G_CTRL_SSNS 409 0x0800 //TX_METAL_RTO_THR @@ -4030,16 +5862,16 @@ 511 0x6666 //TX_MIC_TO_BFGAIN 512 0x0000 //TX_MICTOBFGAIN0 513 0x0000 //TX_FASTMUE_TH -514 0x0000 //TX_DERVB_LEN_0 -515 0x0000 //TX_DERVB_LEN_1 -516 0x0000 //TX_RHO_DERVB -517 0x0000 //TX_MIC_INDX_DERVB -518 0x0000 //TX_MU_DERVB -519 0x0000 //TX_DR_RESRV_0 -520 0x0000 //TX_DR_RESRV_1 -521 0x0000 //TX_DR_RESRV_2 -522 0x0000 //TX_DR_RESRV_3 -523 0x0000 //TX_DR_RESRV_4 +514 0xC000 //TX_DEREVERB_LF_MU +515 0xC000 //TX_DEREVERB_HF_MU +516 0xCCCC //TX_DEREVERB_DELAY +517 0xD999 //TX_DEREVERB_COEF_LEN +518 0x1F40 //TX_DEREVERB_DNR +519 0x0000 //TX_DEREVERB_ALPHA +520 0x0000 //TX_DEREVERB_BETA +521 0x0000 //TX_GSC_RTOL_TH +522 0x7000 //TX_GSC_RTOH_TH +523 0x0064 //TX_WIDE2_MEANHTH 524 0x0000 //TX_DR_RESRV_5 525 0x0000 //TX_DR_RESRV_6 526 0x0000 //TX_DR_RESRV_7 @@ -4405,7 +6237,7 @@ 886 0x0CCD //TX_FASTNS_TFMASKBIN_TH2 887 0x0CCD //TX_FASTNS_TFMASKBIN_TH3 888 0x00C8 //TX_FASTNS_ARSPC_TH -889 0xC000 //TX_FASTNS_MASK5_TH +889 0x8000 //TX_FASTNS_MASK5_TH 890 0x4848 //TX_POSTSSA_MIN_G_VR_MASK 891 0x4000 //TX_A_LESSCUT_RTO_MASK 892 0x1770 //TX_FASTNS_NOISETH @@ -4413,8 +6245,73 @@ 894 0xC000 //TX_FASTNS_SSA_THHFL 895 0xCCCC //TX_FASTNS_SSA_THLFH 896 0xD999 //TX_FASTNS_SSA_THHFH +897 0x2339 //TX_SENDFUNC_REG_MICMUTE +898 0x0021 //TX_SENDFUNC_REG_MICMUTE1 +899 0x02BC //TX_MICMUTE_RATIO_THR +900 0x0140 //TX_MICMUTE_AMP_THR +901 0x0004 //TX_MICMUTE_HPF_IND +902 0x00C0 //TX_MICMUTE_LOG_EYR_TH +903 0x0008 //TX_MICMUTE_CVG_TIME +904 0x0008 //TX_MICMUTE_RELEASE_TIME +905 0x01FE //TX_MIC_VOLUME_MIC0MUTE +906 0x0020 //TX_MICMUTE_EPD_OFFSET_0 +907 0x001E //TX_MICMUTE_FRQ_AEC_L +908 0x7999 //TX_MICMUTE_EAD_THR +909 0x7FFF //TX_MICMUTE_LAMBDA_CB_NLE +910 0x7FFF //TX_MICMUTE_LAMBDA_RE_EST +911 0x4000 //TX_DTD_THR1_MICMUTE_0 +912 0x7000 //TX_DTD_THR1_MICMUTE_1 +913 0x7FFF //TX_DTD_THR1_MICMUTE_2 +914 0x7FFF //TX_DTD_THR1_MICMUTE_3 +915 0x6CCC //TX_DTD_THR2_MICMUTE_0 +916 0x0400 //TX_MICMUTE_MIN_EQ_RE_EST_0 +917 0x0400 //TX_MICMUTE_MIN_EQ_RE_EST_1 +918 0x1000 //TX_MICMUTE_MIN_EQ_RE_EST_2 +919 0x7FFF //TX_MICMUTE_MIN_EQ_RE_EST_3 +920 0x7FFF //TX_MICMUTE_MIN_EQ_RE_EST_4 +921 0x4000 //TX_MICMUTE_C_POST_FLT +922 0x03E8 //TX_MICMUTE_DT_CUT_K +923 0x0001 //TX_MICMUTE_DT_CUT_THR +924 0x03E8 //TX_MICMUTE_DT_CUT_K2 +925 0x0001 //TX_MICMUTE_DT_CUT_THR2 +926 0x0064 //TX_MICMUTE_DT2_HOLD_N +927 0x1000 //TX_MICMUTE_RATIODTH_THCUT +928 0x1000 //TX_MICMUTE_B_POST_FLT_ECHOL +929 0x7FFF //TX_MICMUTE_B_POST_FLT_ECHOH +930 0x0400 //TX_MICMUTE_C_POST_FLT_MASK +931 0x7999 //TX_MICMUTE_RATIODTL_CUT_TH +932 0x0258 //TX_MICMUTE_DT_CUT_K1 +933 0x0800 //TX_MICMUTE_N2_SN_EST +934 0xFC00 //TX_MICMUTE_THR_SN_EST_0 +935 0x001C //TX_MICMUTE_MIN_G_CTRL_0 +936 0x6000 //TX_MICMUTE_A_POST_FILT_S_0 +937 0x7000 //TX_MICMUTE_B_POST_FILT_0 +938 0x2710 //TX_MIC1RUB_AMP_THR +939 0x0010 //TX_MIC1MUTE_RATIO_THR +940 0x0450 //TX_MIC1MUTE_AMP_THR +941 0x0008 //TX_MIC1MUTE_CVG_TIME +942 0x0008 //TX_MIC1MUTE_RELEASE_TIME +943 0x0000 //TX_AMS_RESRV_01 +944 0x0000 //TX_AMS_RESRV_02 +945 0x0000 //TX_AMS_RESRV_03 +946 0x0000 //TX_AMS_RESRV_04 +947 0x0000 //TX_AMS_RESRV_05 +948 0x0000 //TX_AMS_RESRV_06 +949 0x0000 //TX_AMS_RESRV_07 +950 0x0000 //TX_AMS_RESRV_08 +951 0x0000 //TX_AMS_RESRV_09 +952 0x0000 //TX_AMS_RESRV_10 +953 0x0000 //TX_AMS_RESRV_11 +954 0x0000 //TX_AMS_RESRV_12 +955 0x0000 //TX_AMS_RESRV_13 +956 0x0000 //TX_AMS_RESRV_14 +957 0x0000 //TX_AMS_RESRV_15 +958 0x0000 //TX_AMS_RESRV_16 +959 0x0000 //TX_AMS_RESRV_17 +960 0x0000 //TX_AMS_RESRV_18 +961 0x0000 //TX_AMS_RESRV_19 #RX -0 0x042C //RX_RECVFUNC_MODE_0 +0 0x242C //RX_RECVFUNC_MODE_0 1 0x0000 //RX_RECVFUNC_MODE_1 2 0x0003 //RX_SAMPLINGFREQ_SIG 3 0x0003 //RX_SAMPLINGFREQ_PROC @@ -5264,11 +7161,862 @@ 110 0x0000 //RX_FDDRC_RESRV_0 129 0x0100 //RX_SPK_VOL 130 0x0000 //RX_VOL_RESRV_0 +#RX 2 +157 0x242C //RX_RECVFUNC_MODE_0 +158 0x0000 //RX_RECVFUNC_MODE_1 +159 0x0003 //RX_SAMPLINGFREQ_SIG +160 0x0003 //RX_SAMPLINGFREQ_PROC +161 0x000A //RX_FRAME_SZ +162 0x0000 //RX_DELAY_OPT +163 0x5000 //RX_TDDRC_ALPHA_UP_1 +164 0x5000 //RX_TDDRC_ALPHA_UP_2 +165 0x5000 //RX_TDDRC_ALPHA_UP_3 +166 0x2000 //RX_TDDRC_ALPHA_UP_4 +167 0x0800 //RX_PGA +168 0x7FFF //RX_A_HP +169 0x0000 //RX_B_PE +170 0x1800 //RX_THR_PITCH_DET_0 +171 0x1000 //RX_THR_PITCH_DET_1 +172 0x0800 //RX_THR_PITCH_DET_2 +173 0x0008 //RX_PITCH_BFR_LEN +174 0x0003 //RX_SBD_PITCH_DET +175 0x0100 //RX_PP_RESRV_0 +176 0x0020 //RX_PP_RESRV_1 +177 0x0400 //RX_N_SN_EST +178 0x000C //RX_N2_SN_EST +179 0x0003 //RX_NS_LVL_CTRL +180 0x9000 //RX_THR_SN_EST +181 0x7CCD //RX_LAMBDA_PFILT +182 0x000A //RX_FENS_RESRV_0 +183 0x0190 //RX_FENS_RESRV_1 +184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +187 0x0002 //RX_EXTRA_NS_L +188 0x0800 //RX_EXTRA_NS_A +189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +190 0x65AD //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +192 0x199A //RX_A_POST_FLT +193 0x0000 //RX_LMT_THRD +194 0x4000 //RX_LMT_ALPHA +195 0x0020 //RX_FDEQ_SUBNUM +196 0x4E52 //RX_FDEQ_GAIN_0 +197 0x5252 //RX_FDEQ_GAIN_1 +198 0x5252 //RX_FDEQ_GAIN_2 +199 0x5250 //RX_FDEQ_GAIN_3 +200 0x4C46 //RX_FDEQ_GAIN_4 +201 0x4748 //RX_FDEQ_GAIN_5 +202 0x5768 //RX_FDEQ_GAIN_6 +203 0x6162 //RX_FDEQ_GAIN_7 +204 0x5252 //RX_FDEQ_GAIN_8 +205 0x5256 //RX_FDEQ_GAIN_9 +206 0x5248 //RX_FDEQ_GAIN_10 +207 0x3434 //RX_FDEQ_GAIN_11 +208 0x3436 //RX_FDEQ_GAIN_12 +209 0x2A18 //RX_FDEQ_GAIN_13 +210 0x1830 //RX_FDEQ_GAIN_14 +211 0x3648 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0202 //RX_FDEQ_BIN_0 +221 0x0203 //RX_FDEQ_BIN_1 +222 0x0303 //RX_FDEQ_BIN_2 +223 0x0304 //RX_FDEQ_BIN_3 +224 0x0405 //RX_FDEQ_BIN_4 +225 0x0506 //RX_FDEQ_BIN_5 +226 0x0708 //RX_FDEQ_BIN_6 +227 0x090A //RX_FDEQ_BIN_7 +228 0x0B0C //RX_FDEQ_BIN_8 +229 0x0D0E //RX_FDEQ_BIN_9 +230 0x1013 //RX_FDEQ_BIN_10 +231 0x1719 //RX_FDEQ_BIN_11 +232 0x1B1E //RX_FDEQ_BIN_12 +233 0x1E1E //RX_FDEQ_BIN_13 +234 0x1E28 //RX_FDEQ_BIN_14 +235 0x284A //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x4000 //RX_FDEQ_RESRV_0 +245 0x0320 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0030 //RX_FDDRC_BAND_MARGIN_1 +248 0x0050 //RX_FDDRC_BAND_MARGIN_2 +249 0x0080 //RX_FDDRC_BAND_MARGIN_3 +250 0x0007 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x5000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x6400 //RX_FDDRC_THRD_3_2 +258 0x6400 //RX_FDDRC_THRD_3_3 +259 0x2000 //RX_FDDRC_SLANT_0_0 +260 0x2000 //RX_FDDRC_SLANT_0_1 +261 0x2000 //RX_FDDRC_SLANT_0_2 +262 0x2000 //RX_FDDRC_SLANT_0_3 +263 0x5333 //RX_FDDRC_SLANT_1_0 +264 0x5333 //RX_FDDRC_SLANT_1_1 +265 0x5333 //RX_FDDRC_SLANT_1_2 +266 0x5333 //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +268 0x0002 //RX_FILTINDX +269 0x0000 //RX_TDDRC_THRD_0 +270 0x0000 //RX_TDDRC_THRD_1 +271 0x1A00 //RX_TDDRC_THRD_2 +272 0x1A00 //RX_TDDRC_THRD_3 +273 0x3000 //RX_TDDRC_SLANT_0 +274 0x7EB8 //RX_TDDRC_SLANT_1 +275 0x5000 //RX_TDDRC_ALPHA_UP_0 +276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x199A //RX_TDDRC_HMNC_GAIN +279 0x0001 //RX_TDDRC_SMT_FLAG +280 0x0CCD //RX_TDDRC_SMT_W +281 0x023E //RX_TDDRC_DRC_GAIN +282 0x7C00 //RX_LAMBDA_PKA_FP +283 0x280A //RX_TPKA_FP +284 0x032D //RX_MIN_G_FP +285 0x0A00 //RX_MAX_G_FP +286 0x000B //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 +288 0x0000 //RX_MAXLEVEL_CNG +289 0x3000 //RX_BWE_UV_TH +290 0x3000 //RX_BWE_UV_TH2 +291 0x1800 //RX_BWE_UV_TH3 +292 0x1000 //RX_BWE_V_TH +293 0x04CD //RX_BWE_GAIN1_V_TH1 +294 0x0F33 //RX_BWE_GAIN1_V_TH2 +295 0x7333 //RX_BWE_UV_EQ +296 0x199A //RX_BWE_V_EQ +297 0x7333 //RX_BWE_TONE_TH +298 0x0004 //RX_BWE_UV_HOLD_T +299 0x6CCD //RX_BWE_GAIN2_ALPHA +300 0x799A //RX_BWE_GAIN3_ALPHA +301 0x001E //RX_BWE_CUTOFF +302 0x3000 //RX_BWE_GAINFILL +303 0x3200 //RX_BWE_MAXTH_TONE +304 0x2000 //RX_BWE_EQ_0 +305 0x2000 //RX_BWE_EQ_1 +306 0x2000 //RX_BWE_EQ_2 +307 0x2000 //RX_BWE_EQ_3 +308 0x2000 //RX_BWE_EQ_4 +309 0x2000 //RX_BWE_EQ_5 +310 0x2000 //RX_BWE_EQ_6 +311 0x0000 //RX_BWE_RESRV_0 +312 0x0000 //RX_BWE_RESRV_1 +313 0x0000 //RX_BWE_RESRV_2 +#VOL 0 +163 0x5000 //RX_TDDRC_ALPHA_UP_1 +164 0x5000 //RX_TDDRC_ALPHA_UP_2 +165 0x5000 //RX_TDDRC_ALPHA_UP_3 +166 0x2000 //RX_TDDRC_ALPHA_UP_4 +184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +190 0x7220 //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +269 0x0000 //RX_TDDRC_THRD_0 +270 0x0000 //RX_TDDRC_THRD_1 +271 0x1800 //RX_TDDRC_THRD_2 +272 0x1800 //RX_TDDRC_THRD_3 +273 0x7FFF //RX_TDDRC_SLANT_0 +274 0x7FFF //RX_TDDRC_SLANT_1 +275 0x5000 //RX_TDDRC_ALPHA_UP_0 +276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x199A //RX_TDDRC_HMNC_GAIN +279 0x0001 //RX_TDDRC_SMT_FLAG +280 0x0CCD //RX_TDDRC_SMT_W +281 0x0214 //RX_TDDRC_DRC_GAIN +195 0x0020 //RX_FDEQ_SUBNUM +196 0x6270 //RX_FDEQ_GAIN_0 +197 0x7A70 //RX_FDEQ_GAIN_1 +198 0x7270 //RX_FDEQ_GAIN_2 +199 0x6A70 //RX_FDEQ_GAIN_3 +200 0x645A //RX_FDEQ_GAIN_4 +201 0x5A5E //RX_FDEQ_GAIN_5 +202 0x6E72 //RX_FDEQ_GAIN_6 +203 0x7268 //RX_FDEQ_GAIN_7 +204 0x665A //RX_FDEQ_GAIN_8 +205 0x5A5A //RX_FDEQ_GAIN_9 +206 0x5A64 //RX_FDEQ_GAIN_10 +207 0x6448 //RX_FDEQ_GAIN_11 +208 0x4949 //RX_FDEQ_GAIN_12 +209 0x4848 //RX_FDEQ_GAIN_13 +210 0x4848 //RX_FDEQ_GAIN_14 +211 0x4848 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0202 //RX_FDEQ_BIN_0 +221 0x0203 //RX_FDEQ_BIN_1 +222 0x0303 //RX_FDEQ_BIN_2 +223 0x0304 //RX_FDEQ_BIN_3 +224 0x0405 //RX_FDEQ_BIN_4 +225 0x0506 //RX_FDEQ_BIN_5 +226 0x0708 //RX_FDEQ_BIN_6 +227 0x090A //RX_FDEQ_BIN_7 +228 0x0B0C //RX_FDEQ_BIN_8 +229 0x0D0E //RX_FDEQ_BIN_9 +230 0x1013 //RX_FDEQ_BIN_10 +231 0x1719 //RX_FDEQ_BIN_11 +232 0x1B1E //RX_FDEQ_BIN_12 +233 0x1E1E //RX_FDEQ_BIN_13 +234 0x1E28 //RX_FDEQ_BIN_14 +235 0x284A //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x4000 //RX_FDEQ_RESRV_0 +245 0x0320 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0030 //RX_FDDRC_BAND_MARGIN_1 +248 0x0050 //RX_FDDRC_BAND_MARGIN_2 +249 0x0080 //RX_FDDRC_BAND_MARGIN_3 +250 0x0007 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x5000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x6400 //RX_FDDRC_THRD_3_2 +258 0x6400 //RX_FDDRC_THRD_3_3 +259 0x2000 //RX_FDDRC_SLANT_0_0 +260 0x2000 //RX_FDDRC_SLANT_0_1 +261 0x2000 //RX_FDDRC_SLANT_0_2 +262 0x2000 //RX_FDDRC_SLANT_0_3 +263 0x5333 //RX_FDDRC_SLANT_1_0 +264 0x5333 //RX_FDDRC_SLANT_1_1 +265 0x5333 //RX_FDDRC_SLANT_1_2 +266 0x5333 //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +286 0x000A //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 +#VOL 1 +163 0x5000 //RX_TDDRC_ALPHA_UP_1 +164 0x5000 //RX_TDDRC_ALPHA_UP_2 +165 0x5000 //RX_TDDRC_ALPHA_UP_3 +166 0x2000 //RX_TDDRC_ALPHA_UP_4 +184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +190 0x7220 //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +269 0x0000 //RX_TDDRC_THRD_0 +270 0x0000 //RX_TDDRC_THRD_1 +271 0x1800 //RX_TDDRC_THRD_2 +272 0x1800 //RX_TDDRC_THRD_3 +273 0x7FFF //RX_TDDRC_SLANT_0 +274 0x7FFF //RX_TDDRC_SLANT_1 +275 0x5000 //RX_TDDRC_ALPHA_UP_0 +276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x199A //RX_TDDRC_HMNC_GAIN +279 0x0001 //RX_TDDRC_SMT_FLAG +280 0x0CCD //RX_TDDRC_SMT_W +281 0x0214 //RX_TDDRC_DRC_GAIN +195 0x0020 //RX_FDEQ_SUBNUM +196 0x6270 //RX_FDEQ_GAIN_0 +197 0x7A70 //RX_FDEQ_GAIN_1 +198 0x7270 //RX_FDEQ_GAIN_2 +199 0x6A70 //RX_FDEQ_GAIN_3 +200 0x645A //RX_FDEQ_GAIN_4 +201 0x5A5E //RX_FDEQ_GAIN_5 +202 0x6E72 //RX_FDEQ_GAIN_6 +203 0x7268 //RX_FDEQ_GAIN_7 +204 0x665A //RX_FDEQ_GAIN_8 +205 0x5A5A //RX_FDEQ_GAIN_9 +206 0x5A64 //RX_FDEQ_GAIN_10 +207 0x6448 //RX_FDEQ_GAIN_11 +208 0x4949 //RX_FDEQ_GAIN_12 +209 0x4848 //RX_FDEQ_GAIN_13 +210 0x4848 //RX_FDEQ_GAIN_14 +211 0x4848 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0202 //RX_FDEQ_BIN_0 +221 0x0203 //RX_FDEQ_BIN_1 +222 0x0303 //RX_FDEQ_BIN_2 +223 0x0304 //RX_FDEQ_BIN_3 +224 0x0405 //RX_FDEQ_BIN_4 +225 0x0506 //RX_FDEQ_BIN_5 +226 0x0708 //RX_FDEQ_BIN_6 +227 0x090A //RX_FDEQ_BIN_7 +228 0x0B0C //RX_FDEQ_BIN_8 +229 0x0D0E //RX_FDEQ_BIN_9 +230 0x1013 //RX_FDEQ_BIN_10 +231 0x1719 //RX_FDEQ_BIN_11 +232 0x1B1E //RX_FDEQ_BIN_12 +233 0x1E1E //RX_FDEQ_BIN_13 +234 0x1E28 //RX_FDEQ_BIN_14 +235 0x284A //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x4000 //RX_FDEQ_RESRV_0 +245 0x0320 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0030 //RX_FDDRC_BAND_MARGIN_1 +248 0x0050 //RX_FDDRC_BAND_MARGIN_2 +249 0x0080 //RX_FDDRC_BAND_MARGIN_3 +250 0x0007 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x5000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x6400 //RX_FDDRC_THRD_3_2 +258 0x6400 //RX_FDDRC_THRD_3_3 +259 0x2000 //RX_FDDRC_SLANT_0_0 +260 0x2000 //RX_FDDRC_SLANT_0_1 +261 0x2000 //RX_FDDRC_SLANT_0_2 +262 0x2000 //RX_FDDRC_SLANT_0_3 +263 0x5333 //RX_FDDRC_SLANT_1_0 +264 0x5333 //RX_FDDRC_SLANT_1_1 +265 0x5333 //RX_FDDRC_SLANT_1_2 +266 0x5333 //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +286 0x0011 //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 +#VOL 2 +163 0x5000 //RX_TDDRC_ALPHA_UP_1 +164 0x5000 //RX_TDDRC_ALPHA_UP_2 +165 0x5000 //RX_TDDRC_ALPHA_UP_3 +166 0x2000 //RX_TDDRC_ALPHA_UP_4 +184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +190 0x7220 //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +269 0x0000 //RX_TDDRC_THRD_0 +270 0x0000 //RX_TDDRC_THRD_1 +271 0x1800 //RX_TDDRC_THRD_2 +272 0x1800 //RX_TDDRC_THRD_3 +273 0x7FFF //RX_TDDRC_SLANT_0 +274 0x7FFF //RX_TDDRC_SLANT_1 +275 0x5000 //RX_TDDRC_ALPHA_UP_0 +276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x199A //RX_TDDRC_HMNC_GAIN +279 0x0001 //RX_TDDRC_SMT_FLAG +280 0x0CCD //RX_TDDRC_SMT_W +281 0x0214 //RX_TDDRC_DRC_GAIN +195 0x0020 //RX_FDEQ_SUBNUM +196 0x6270 //RX_FDEQ_GAIN_0 +197 0x7A70 //RX_FDEQ_GAIN_1 +198 0x7270 //RX_FDEQ_GAIN_2 +199 0x6A70 //RX_FDEQ_GAIN_3 +200 0x645A //RX_FDEQ_GAIN_4 +201 0x5A5E //RX_FDEQ_GAIN_5 +202 0x6E72 //RX_FDEQ_GAIN_6 +203 0x7268 //RX_FDEQ_GAIN_7 +204 0x665A //RX_FDEQ_GAIN_8 +205 0x5A5A //RX_FDEQ_GAIN_9 +206 0x5A64 //RX_FDEQ_GAIN_10 +207 0x6448 //RX_FDEQ_GAIN_11 +208 0x4949 //RX_FDEQ_GAIN_12 +209 0x4848 //RX_FDEQ_GAIN_13 +210 0x4848 //RX_FDEQ_GAIN_14 +211 0x4848 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0202 //RX_FDEQ_BIN_0 +221 0x0203 //RX_FDEQ_BIN_1 +222 0x0303 //RX_FDEQ_BIN_2 +223 0x0304 //RX_FDEQ_BIN_3 +224 0x0405 //RX_FDEQ_BIN_4 +225 0x0506 //RX_FDEQ_BIN_5 +226 0x0708 //RX_FDEQ_BIN_6 +227 0x090A //RX_FDEQ_BIN_7 +228 0x0B0C //RX_FDEQ_BIN_8 +229 0x0D0E //RX_FDEQ_BIN_9 +230 0x1013 //RX_FDEQ_BIN_10 +231 0x1719 //RX_FDEQ_BIN_11 +232 0x1B1E //RX_FDEQ_BIN_12 +233 0x1E1E //RX_FDEQ_BIN_13 +234 0x1E28 //RX_FDEQ_BIN_14 +235 0x284A //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x4000 //RX_FDEQ_RESRV_0 +245 0x0320 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0030 //RX_FDDRC_BAND_MARGIN_1 +248 0x0050 //RX_FDDRC_BAND_MARGIN_2 +249 0x0080 //RX_FDDRC_BAND_MARGIN_3 +250 0x0007 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x5000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x6400 //RX_FDDRC_THRD_3_2 +258 0x6400 //RX_FDDRC_THRD_3_3 +259 0x2000 //RX_FDDRC_SLANT_0_0 +260 0x2000 //RX_FDDRC_SLANT_0_1 +261 0x2000 //RX_FDDRC_SLANT_0_2 +262 0x2000 //RX_FDDRC_SLANT_0_3 +263 0x5333 //RX_FDDRC_SLANT_1_0 +264 0x5333 //RX_FDDRC_SLANT_1_1 +265 0x5333 //RX_FDDRC_SLANT_1_2 +266 0x5333 //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +286 0x001C //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 +#VOL 3 +163 0x5000 //RX_TDDRC_ALPHA_UP_1 +164 0x5000 //RX_TDDRC_ALPHA_UP_2 +165 0x5000 //RX_TDDRC_ALPHA_UP_3 +166 0x2000 //RX_TDDRC_ALPHA_UP_4 +184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +190 0x7220 //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +269 0x0000 //RX_TDDRC_THRD_0 +270 0x0000 //RX_TDDRC_THRD_1 +271 0x1800 //RX_TDDRC_THRD_2 +272 0x1800 //RX_TDDRC_THRD_3 +273 0x7FFF //RX_TDDRC_SLANT_0 +274 0x7FFF //RX_TDDRC_SLANT_1 +275 0x5000 //RX_TDDRC_ALPHA_UP_0 +276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x199A //RX_TDDRC_HMNC_GAIN +279 0x0001 //RX_TDDRC_SMT_FLAG +280 0x0CCD //RX_TDDRC_SMT_W +281 0x0214 //RX_TDDRC_DRC_GAIN +195 0x0020 //RX_FDEQ_SUBNUM +196 0x6270 //RX_FDEQ_GAIN_0 +197 0x7A70 //RX_FDEQ_GAIN_1 +198 0x7270 //RX_FDEQ_GAIN_2 +199 0x6A70 //RX_FDEQ_GAIN_3 +200 0x645A //RX_FDEQ_GAIN_4 +201 0x5A5E //RX_FDEQ_GAIN_5 +202 0x6E72 //RX_FDEQ_GAIN_6 +203 0x7268 //RX_FDEQ_GAIN_7 +204 0x665A //RX_FDEQ_GAIN_8 +205 0x5A5A //RX_FDEQ_GAIN_9 +206 0x5A64 //RX_FDEQ_GAIN_10 +207 0x6448 //RX_FDEQ_GAIN_11 +208 0x4949 //RX_FDEQ_GAIN_12 +209 0x4848 //RX_FDEQ_GAIN_13 +210 0x4848 //RX_FDEQ_GAIN_14 +211 0x4848 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0202 //RX_FDEQ_BIN_0 +221 0x0203 //RX_FDEQ_BIN_1 +222 0x0303 //RX_FDEQ_BIN_2 +223 0x0304 //RX_FDEQ_BIN_3 +224 0x0405 //RX_FDEQ_BIN_4 +225 0x0506 //RX_FDEQ_BIN_5 +226 0x0708 //RX_FDEQ_BIN_6 +227 0x090A //RX_FDEQ_BIN_7 +228 0x0B0C //RX_FDEQ_BIN_8 +229 0x0D0E //RX_FDEQ_BIN_9 +230 0x1013 //RX_FDEQ_BIN_10 +231 0x1719 //RX_FDEQ_BIN_11 +232 0x1B1E //RX_FDEQ_BIN_12 +233 0x1E1E //RX_FDEQ_BIN_13 +234 0x1E28 //RX_FDEQ_BIN_14 +235 0x284A //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x4000 //RX_FDEQ_RESRV_0 +245 0x0320 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0030 //RX_FDDRC_BAND_MARGIN_1 +248 0x0050 //RX_FDDRC_BAND_MARGIN_2 +249 0x0080 //RX_FDDRC_BAND_MARGIN_3 +250 0x0007 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x5000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x6400 //RX_FDDRC_THRD_3_2 +258 0x6400 //RX_FDDRC_THRD_3_3 +259 0x2000 //RX_FDDRC_SLANT_0_0 +260 0x2000 //RX_FDDRC_SLANT_0_1 +261 0x2000 //RX_FDDRC_SLANT_0_2 +262 0x2000 //RX_FDDRC_SLANT_0_3 +263 0x5333 //RX_FDDRC_SLANT_1_0 +264 0x5333 //RX_FDDRC_SLANT_1_1 +265 0x5333 //RX_FDDRC_SLANT_1_2 +266 0x5333 //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +286 0x002F //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 +#VOL 4 +163 0x5000 //RX_TDDRC_ALPHA_UP_1 +164 0x5000 //RX_TDDRC_ALPHA_UP_2 +165 0x5000 //RX_TDDRC_ALPHA_UP_3 +166 0x2000 //RX_TDDRC_ALPHA_UP_4 +184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +190 0x7220 //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +269 0x0000 //RX_TDDRC_THRD_0 +270 0x0000 //RX_TDDRC_THRD_1 +271 0x1800 //RX_TDDRC_THRD_2 +272 0x1800 //RX_TDDRC_THRD_3 +273 0x7FFF //RX_TDDRC_SLANT_0 +274 0x7FFF //RX_TDDRC_SLANT_1 +275 0x5000 //RX_TDDRC_ALPHA_UP_0 +276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x199A //RX_TDDRC_HMNC_GAIN +279 0x0001 //RX_TDDRC_SMT_FLAG +280 0x0CCD //RX_TDDRC_SMT_W +281 0x0214 //RX_TDDRC_DRC_GAIN +195 0x0020 //RX_FDEQ_SUBNUM +196 0x6270 //RX_FDEQ_GAIN_0 +197 0x7A70 //RX_FDEQ_GAIN_1 +198 0x7270 //RX_FDEQ_GAIN_2 +199 0x6A70 //RX_FDEQ_GAIN_3 +200 0x645A //RX_FDEQ_GAIN_4 +201 0x5A5E //RX_FDEQ_GAIN_5 +202 0x6E72 //RX_FDEQ_GAIN_6 +203 0x7268 //RX_FDEQ_GAIN_7 +204 0x665A //RX_FDEQ_GAIN_8 +205 0x5A5A //RX_FDEQ_GAIN_9 +206 0x5A64 //RX_FDEQ_GAIN_10 +207 0x6448 //RX_FDEQ_GAIN_11 +208 0x4949 //RX_FDEQ_GAIN_12 +209 0x4848 //RX_FDEQ_GAIN_13 +210 0x4848 //RX_FDEQ_GAIN_14 +211 0x4848 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0202 //RX_FDEQ_BIN_0 +221 0x0203 //RX_FDEQ_BIN_1 +222 0x0303 //RX_FDEQ_BIN_2 +223 0x0304 //RX_FDEQ_BIN_3 +224 0x0405 //RX_FDEQ_BIN_4 +225 0x0506 //RX_FDEQ_BIN_5 +226 0x0708 //RX_FDEQ_BIN_6 +227 0x090A //RX_FDEQ_BIN_7 +228 0x0B0C //RX_FDEQ_BIN_8 +229 0x0D0E //RX_FDEQ_BIN_9 +230 0x1013 //RX_FDEQ_BIN_10 +231 0x1719 //RX_FDEQ_BIN_11 +232 0x1B1E //RX_FDEQ_BIN_12 +233 0x1E1E //RX_FDEQ_BIN_13 +234 0x1E28 //RX_FDEQ_BIN_14 +235 0x284A //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x4000 //RX_FDEQ_RESRV_0 +245 0x0320 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0030 //RX_FDDRC_BAND_MARGIN_1 +248 0x0050 //RX_FDDRC_BAND_MARGIN_2 +249 0x0080 //RX_FDDRC_BAND_MARGIN_3 +250 0x0007 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x5000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x6400 //RX_FDDRC_THRD_3_2 +258 0x6400 //RX_FDDRC_THRD_3_3 +259 0x2000 //RX_FDDRC_SLANT_0_0 +260 0x2000 //RX_FDDRC_SLANT_0_1 +261 0x2000 //RX_FDDRC_SLANT_0_2 +262 0x2000 //RX_FDDRC_SLANT_0_3 +263 0x5333 //RX_FDDRC_SLANT_1_0 +264 0x5333 //RX_FDDRC_SLANT_1_1 +265 0x5333 //RX_FDDRC_SLANT_1_2 +266 0x5333 //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +286 0x004F //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 +#VOL 5 +163 0x5000 //RX_TDDRC_ALPHA_UP_1 +164 0x5000 //RX_TDDRC_ALPHA_UP_2 +165 0x5000 //RX_TDDRC_ALPHA_UP_3 +166 0x2000 //RX_TDDRC_ALPHA_UP_4 +184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +190 0x7220 //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +269 0x0000 //RX_TDDRC_THRD_0 +270 0x0000 //RX_TDDRC_THRD_1 +271 0x1800 //RX_TDDRC_THRD_2 +272 0x1800 //RX_TDDRC_THRD_3 +273 0x7FFF //RX_TDDRC_SLANT_0 +274 0x7FFF //RX_TDDRC_SLANT_1 +275 0x5000 //RX_TDDRC_ALPHA_UP_0 +276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x199A //RX_TDDRC_HMNC_GAIN +279 0x0001 //RX_TDDRC_SMT_FLAG +280 0x0CCD //RX_TDDRC_SMT_W +281 0x0214 //RX_TDDRC_DRC_GAIN +195 0x0020 //RX_FDEQ_SUBNUM +196 0x6270 //RX_FDEQ_GAIN_0 +197 0x7A70 //RX_FDEQ_GAIN_1 +198 0x7270 //RX_FDEQ_GAIN_2 +199 0x6A70 //RX_FDEQ_GAIN_3 +200 0x645A //RX_FDEQ_GAIN_4 +201 0x5A5E //RX_FDEQ_GAIN_5 +202 0x6E72 //RX_FDEQ_GAIN_6 +203 0x7268 //RX_FDEQ_GAIN_7 +204 0x665A //RX_FDEQ_GAIN_8 +205 0x5A5A //RX_FDEQ_GAIN_9 +206 0x5A64 //RX_FDEQ_GAIN_10 +207 0x6448 //RX_FDEQ_GAIN_11 +208 0x4949 //RX_FDEQ_GAIN_12 +209 0x4848 //RX_FDEQ_GAIN_13 +210 0x4848 //RX_FDEQ_GAIN_14 +211 0x4848 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0202 //RX_FDEQ_BIN_0 +221 0x0203 //RX_FDEQ_BIN_1 +222 0x0303 //RX_FDEQ_BIN_2 +223 0x0304 //RX_FDEQ_BIN_3 +224 0x0405 //RX_FDEQ_BIN_4 +225 0x0506 //RX_FDEQ_BIN_5 +226 0x0708 //RX_FDEQ_BIN_6 +227 0x090A //RX_FDEQ_BIN_7 +228 0x0B0C //RX_FDEQ_BIN_8 +229 0x0D0E //RX_FDEQ_BIN_9 +230 0x1013 //RX_FDEQ_BIN_10 +231 0x1719 //RX_FDEQ_BIN_11 +232 0x1B1E //RX_FDEQ_BIN_12 +233 0x1E1E //RX_FDEQ_BIN_13 +234 0x1E28 //RX_FDEQ_BIN_14 +235 0x284A //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x4000 //RX_FDEQ_RESRV_0 +245 0x0320 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0030 //RX_FDDRC_BAND_MARGIN_1 +248 0x0050 //RX_FDDRC_BAND_MARGIN_2 +249 0x0080 //RX_FDDRC_BAND_MARGIN_3 +250 0x0007 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x5000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x6400 //RX_FDDRC_THRD_3_2 +258 0x6400 //RX_FDDRC_THRD_3_3 +259 0x2000 //RX_FDDRC_SLANT_0_0 +260 0x2000 //RX_FDDRC_SLANT_0_1 +261 0x2000 //RX_FDDRC_SLANT_0_2 +262 0x2000 //RX_FDDRC_SLANT_0_3 +263 0x5333 //RX_FDDRC_SLANT_1_0 +264 0x5333 //RX_FDDRC_SLANT_1_1 +265 0x5333 //RX_FDDRC_SLANT_1_2 +266 0x5333 //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +286 0x0086 //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 +#VOL 6 +163 0x5000 //RX_TDDRC_ALPHA_UP_1 +164 0x5000 //RX_TDDRC_ALPHA_UP_2 +165 0x5000 //RX_TDDRC_ALPHA_UP_3 +166 0x2000 //RX_TDDRC_ALPHA_UP_4 +184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +190 0x7220 //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +269 0x0000 //RX_TDDRC_THRD_0 +270 0x0000 //RX_TDDRC_THRD_1 +271 0x1800 //RX_TDDRC_THRD_2 +272 0x1800 //RX_TDDRC_THRD_3 +273 0x7FFF //RX_TDDRC_SLANT_0 +274 0x7FFF //RX_TDDRC_SLANT_1 +275 0x5000 //RX_TDDRC_ALPHA_UP_0 +276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x199A //RX_TDDRC_HMNC_GAIN +279 0x0001 //RX_TDDRC_SMT_FLAG +280 0x0CCD //RX_TDDRC_SMT_W +281 0x0214 //RX_TDDRC_DRC_GAIN +195 0x0020 //RX_FDEQ_SUBNUM +196 0x6270 //RX_FDEQ_GAIN_0 +197 0x7A70 //RX_FDEQ_GAIN_1 +198 0x7270 //RX_FDEQ_GAIN_2 +199 0x6A70 //RX_FDEQ_GAIN_3 +200 0x645A //RX_FDEQ_GAIN_4 +201 0x5A5E //RX_FDEQ_GAIN_5 +202 0x6E72 //RX_FDEQ_GAIN_6 +203 0x7268 //RX_FDEQ_GAIN_7 +204 0x665A //RX_FDEQ_GAIN_8 +205 0x5A5A //RX_FDEQ_GAIN_9 +206 0x5A64 //RX_FDEQ_GAIN_10 +207 0x6448 //RX_FDEQ_GAIN_11 +208 0x4949 //RX_FDEQ_GAIN_12 +209 0x4848 //RX_FDEQ_GAIN_13 +210 0x4848 //RX_FDEQ_GAIN_14 +211 0x4848 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0202 //RX_FDEQ_BIN_0 +221 0x0203 //RX_FDEQ_BIN_1 +222 0x0303 //RX_FDEQ_BIN_2 +223 0x0304 //RX_FDEQ_BIN_3 +224 0x0405 //RX_FDEQ_BIN_4 +225 0x0506 //RX_FDEQ_BIN_5 +226 0x0708 //RX_FDEQ_BIN_6 +227 0x090A //RX_FDEQ_BIN_7 +228 0x0B0C //RX_FDEQ_BIN_8 +229 0x0D0E //RX_FDEQ_BIN_9 +230 0x1013 //RX_FDEQ_BIN_10 +231 0x1719 //RX_FDEQ_BIN_11 +232 0x1B1E //RX_FDEQ_BIN_12 +233 0x1E1E //RX_FDEQ_BIN_13 +234 0x1E28 //RX_FDEQ_BIN_14 +235 0x284A //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x4000 //RX_FDEQ_RESRV_0 +245 0x0320 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0030 //RX_FDDRC_BAND_MARGIN_1 +248 0x0050 //RX_FDDRC_BAND_MARGIN_2 +249 0x0080 //RX_FDDRC_BAND_MARGIN_3 +250 0x0007 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x5000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x6400 //RX_FDDRC_THRD_3_2 +258 0x6400 //RX_FDDRC_THRD_3_3 +259 0x2000 //RX_FDDRC_SLANT_0_0 +260 0x2000 //RX_FDDRC_SLANT_0_1 +261 0x2000 //RX_FDDRC_SLANT_0_2 +262 0x2000 //RX_FDDRC_SLANT_0_3 +263 0x5333 //RX_FDDRC_SLANT_1_0 +264 0x5333 //RX_FDDRC_SLANT_1_1 +265 0x5333 //RX_FDDRC_SLANT_1_2 +266 0x5333 //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +286 0x0100 //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 #CASE_NAME HEADSET-USB_BLACKBIRD-VOICE_GENERIC-FB -#PARAM_MODE FULL -#PARAM_TYPE TX+RX -#TOTAL_CUSTOM_STEP 7 +#PARAM_MODE Full +#PARAM_TYPE TX+2RX +#TOTAL_CUSTOM_STEP 7+7 #TX 0 0x0009 //TX_OPERATION_MODE_0 1 0x0009 //TX_OPERATION_MODE_1 @@ -5521,10 +8269,10 @@ 248 0xF600 //TX_THR_SN_EST_6 249 0xF600 //TX_THR_SN_EST_7 250 0x0200 //TX_DELTA_THR_SN_EST_0 -251 0x0200 //TX_DELTA_THR_SN_EST_1 -252 0x0400 //TX_DELTA_THR_SN_EST_2 -253 0x0300 //TX_DELTA_THR_SN_EST_3 -254 0x0600 //TX_DELTA_THR_SN_EST_4 +251 0x0400 //TX_DELTA_THR_SN_EST_1 +252 0x0300 //TX_DELTA_THR_SN_EST_2 +253 0x0600 //TX_DELTA_THR_SN_EST_3 +254 0x0200 //TX_DELTA_THR_SN_EST_4 255 0x0200 //TX_DELTA_THR_SN_EST_5 256 0x0200 //TX_DELTA_THR_SN_EST_6 257 0x0200 //TX_DELTA_THR_SN_EST_7 @@ -5552,31 +8300,31 @@ 279 0x2000 //TX_B_POST_FLT_0 280 0x2000 //TX_B_POST_FLT_1 281 0x0012 //TX_NS_LVL_CTRL_0 -282 0x0019 //TX_NS_LVL_CTRL_1 -283 0x0020 //TX_NS_LVL_CTRL_2 -284 0x0016 //TX_NS_LVL_CTRL_3 -285 0x0019 //TX_NS_LVL_CTRL_4 +282 0x0020 //TX_NS_LVL_CTRL_1 +283 0x0016 //TX_NS_LVL_CTRL_2 +284 0x0019 //TX_NS_LVL_CTRL_3 +285 0x0010 //TX_NS_LVL_CTRL_4 286 0x0010 //TX_NS_LVL_CTRL_5 -287 0x0010 //TX_NS_LVL_CTRL_6 +287 0x0019 //TX_NS_LVL_CTRL_6 288 0x0010 //TX_NS_LVL_CTRL_7 289 0x000C //TX_MIN_GAIN_S_0 -290 0x0011 //TX_MIN_GAIN_S_1 +290 0x000C //TX_MIN_GAIN_S_1 291 0x000C //TX_MIN_GAIN_S_2 -292 0x000C //TX_MIN_GAIN_S_3 -293 0x000F //TX_MIN_GAIN_S_4 +292 0x000F //TX_MIN_GAIN_S_3 +293 0x000C //TX_MIN_GAIN_S_4 294 0x000C //TX_MIN_GAIN_S_5 -295 0x000C //TX_MIN_GAIN_S_6 +295 0x0011 //TX_MIN_GAIN_S_6 296 0x000C //TX_MIN_GAIN_S_7 297 0x0800 //TX_NMOS_SUP 298 0x0000 //TX_NS_MAX_PRI_SNR_TH 299 0x0000 //TX_NMOS_SUP_MENSA 300 0x7000 //TX_SNRI_SUP_0 -301 0x6000 //TX_SNRI_SUP_1 -302 0x1000 //TX_SNRI_SUP_2 -303 0x7000 //TX_SNRI_SUP_3 -304 0x6000 //TX_SNRI_SUP_4 +301 0x1000 //TX_SNRI_SUP_1 +302 0x7000 //TX_SNRI_SUP_2 +303 0x6000 //TX_SNRI_SUP_3 +304 0x7FFF //TX_SNRI_SUP_4 305 0x7FFF //TX_SNRI_SUP_5 -306 0x7FFF //TX_SNRI_SUP_6 +306 0x6000 //TX_SNRI_SUP_6 307 0x7FFF //TX_SNRI_SUP_7 308 0x7FFF //TX_THR_LFNS 309 0x0016 //TX_G_LFNS @@ -5593,8 +8341,8 @@ 320 0x6000 //TX_A_POST_FILT_S_6 321 0x6000 //TX_A_POST_FILT_S_7 322 0x2000 //TX_B_POST_FILT_0 -323 0x2000 //TX_B_POST_FILT_1 -324 0x4000 //TX_B_POST_FILT_2 +323 0x4000 //TX_B_POST_FILT_1 +324 0x2000 //TX_B_POST_FILT_2 325 0x2000 //TX_B_POST_FILT_3 326 0x2000 //TX_B_POST_FILT_4 327 0x2000 //TX_B_POST_FILT_5 @@ -5637,7 +8385,7 @@ 364 0x0000 //TX_K_APT 365 0x0001 //TX_NOISEDET 366 0x0190 //TX_NDETCT -367 0x0020 //TX_NOISE_TH_0 +367 0x04E8 //TX_NOISE_TH_0 368 0x7FFF //TX_NOISE_TH_0_2 369 0x7FFF //TX_NOISE_TH_0_3 370 0x02A6 //TX_NOISE_TH_1 @@ -5649,11 +8397,11 @@ 376 0x0001 //TX_NOISE_TH_5_3 377 0x0000 //TX_NOISE_TH_5_4 378 0x02BC //TX_NOISE_TH_6 -379 0x0020 //TX_MINENOISE_TH -380 0x4000 //TX_MINENOISE_MIC0_TH_MTS -381 0xFFEE //TX_MINENOISE_MIC0_TH_EXP -382 0x6000 //TX_MINENOISE_MIC0_S_TH_MTS -383 0xFFF3 //TX_MINENOISE_MIC0_S_TH_EXP +379 0x02BC //TX_MINENOISE_TH +380 0xD508 //TX_MORENS_TFMASK_TH +381 0x0001 //TX_DRC_QUIET_FLOOR +382 0x3A98 //TX_RATIODTL_CUT_TH +383 0x1482 //TX_DT_CUT_K1 384 0x0666 //TX_OUT_ENER_S_TH_CLEAN 385 0x0666 //TX_OUT_ENER_S_TH_LESSCLEAN 386 0x0333 //TX_OUT_ENER_S_TH_NOISY @@ -5661,22 +8409,22 @@ 388 0x0333 //TX_OUT_ENER_TH_SPEECH 389 0x2000 //TX_SN_NPB_GAIN 390 0x0000 //TX_NN_NPB_GAIN -391 0x0000 //TX_CSX_ALPHA_0 -392 0x0000 //TX_CSX_ALPHA_1 -393 0x0000 //TX_CSX_ALPHA_2 -394 0x0000 //TX_CSX_ALPHA_3 -395 0x0800 //TX_MU_ARSP_EST -396 0x00C8 //TX_P_OUTBEAM_MIN_TH +391 0x7FFF //TX_POST_MASK_SUP_HSNE +392 0x1388 //TX_TAIL_DET_TH +393 0x4000 //TX_B_LESSCUT_RTO_WTA +394 0x0000 //TX_MEL_G_R +395 0x0080 //TX_SUPHIGH_TH +396 0x0000 //TX_MASK_G_R 397 0x0002 //TX_EXTRA_NS_L -398 0x0800 //TX_EXTRA_NS_A -399 0x0005 //TX_VR_NOISE_FLOOR_TH +398 0x1800 //TX_C_POST_FLT_MASK +399 0x7FFF //TX_A_POST_FLT_WNS 400 0x0148 //TX_MIN_G_LOW300HZ 401 0x0004 //TX_MAXLEVEL_CNG 402 0x00B4 //TX_STN_NOISE_TH 403 0x4000 //TX_POST_MASK_SUP 404 0x7FFF //TX_POST_MASK_ADJUST 405 0x00C8 //TX_NS_ENOISE_MIC0_TH -406 0x0020 //TX_MINENOISE_MIC0_TH +406 0x04E7 //TX_MINENOISE_MIC0_TH 407 0x012C //TX_MINENOISE_MIC0_S_TH 408 0x2900 //TX_MIN_G_CTRL_SSNS 409 0x0800 //TX_METAL_RTO_THR @@ -5784,16 +8532,16 @@ 511 0x6666 //TX_MIC_TO_BFGAIN 512 0x0000 //TX_MICTOBFGAIN0 513 0x0000 //TX_FASTMUE_TH -514 0x0000 //TX_DERVB_LEN_0 -515 0x0000 //TX_DERVB_LEN_1 -516 0x0000 //TX_RHO_DERVB -517 0x0000 //TX_MIC_INDX_DERVB -518 0x0000 //TX_MU_DERVB -519 0x0000 //TX_DR_RESRV_0 -520 0x0000 //TX_DR_RESRV_1 -521 0x0000 //TX_DR_RESRV_2 -522 0x0000 //TX_DR_RESRV_3 -523 0x0000 //TX_DR_RESRV_4 +514 0xC000 //TX_DEREVERB_LF_MU +515 0xC000 //TX_DEREVERB_HF_MU +516 0xCCCC //TX_DEREVERB_DELAY +517 0xD999 //TX_DEREVERB_COEF_LEN +518 0x1F40 //TX_DEREVERB_DNR +519 0x0000 //TX_DEREVERB_ALPHA +520 0x0000 //TX_DEREVERB_BETA +521 0x0000 //TX_GSC_RTOL_TH +522 0x7000 //TX_GSC_RTOH_TH +523 0x0064 //TX_WIDE2_MEANHTH 524 0x0000 //TX_DR_RESRV_5 525 0x0000 //TX_DR_RESRV_6 526 0x0000 //TX_DR_RESRV_7 @@ -6167,8 +8915,73 @@ 894 0xC000 //TX_FASTNS_SSA_THHFL 895 0xCCCC //TX_FASTNS_SSA_THLFH 896 0xD999 //TX_FASTNS_SSA_THHFH +897 0x2339 //TX_SENDFUNC_REG_MICMUTE +898 0x0021 //TX_SENDFUNC_REG_MICMUTE1 +899 0x02BC //TX_MICMUTE_RATIO_THR +900 0x0140 //TX_MICMUTE_AMP_THR +901 0x0004 //TX_MICMUTE_HPF_IND +902 0x00C0 //TX_MICMUTE_LOG_EYR_TH +903 0x0008 //TX_MICMUTE_CVG_TIME +904 0x0008 //TX_MICMUTE_RELEASE_TIME +905 0x01FE //TX_MIC_VOLUME_MIC0MUTE +906 0x0020 //TX_MICMUTE_EPD_OFFSET_0 +907 0x001E //TX_MICMUTE_FRQ_AEC_L +908 0x7999 //TX_MICMUTE_EAD_THR +909 0x7FFF //TX_MICMUTE_LAMBDA_CB_NLE +910 0x7FFF //TX_MICMUTE_LAMBDA_RE_EST +911 0x4000 //TX_DTD_THR1_MICMUTE_0 +912 0x7000 //TX_DTD_THR1_MICMUTE_1 +913 0x7FFF //TX_DTD_THR1_MICMUTE_2 +914 0x7FFF //TX_DTD_THR1_MICMUTE_3 +915 0x6CCC //TX_DTD_THR2_MICMUTE_0 +916 0x0400 //TX_MICMUTE_MIN_EQ_RE_EST_0 +917 0x0400 //TX_MICMUTE_MIN_EQ_RE_EST_1 +918 0x1000 //TX_MICMUTE_MIN_EQ_RE_EST_2 +919 0x7FFF //TX_MICMUTE_MIN_EQ_RE_EST_3 +920 0x7FFF //TX_MICMUTE_MIN_EQ_RE_EST_4 +921 0x4000 //TX_MICMUTE_C_POST_FLT +922 0x03E8 //TX_MICMUTE_DT_CUT_K +923 0x0001 //TX_MICMUTE_DT_CUT_THR +924 0x03E8 //TX_MICMUTE_DT_CUT_K2 +925 0x0001 //TX_MICMUTE_DT_CUT_THR2 +926 0x0064 //TX_MICMUTE_DT2_HOLD_N +927 0x1000 //TX_MICMUTE_RATIODTH_THCUT +928 0x1000 //TX_MICMUTE_B_POST_FLT_ECHOL +929 0x7FFF //TX_MICMUTE_B_POST_FLT_ECHOH +930 0x0400 //TX_MICMUTE_C_POST_FLT_MASK +931 0x7999 //TX_MICMUTE_RATIODTL_CUT_TH +932 0x0258 //TX_MICMUTE_DT_CUT_K1 +933 0x0800 //TX_MICMUTE_N2_SN_EST +934 0xFC00 //TX_MICMUTE_THR_SN_EST_0 +935 0x001C //TX_MICMUTE_MIN_G_CTRL_0 +936 0x6000 //TX_MICMUTE_A_POST_FILT_S_0 +937 0x7000 //TX_MICMUTE_B_POST_FILT_0 +938 0x2710 //TX_MIC1RUB_AMP_THR +939 0x0010 //TX_MIC1MUTE_RATIO_THR +940 0x0450 //TX_MIC1MUTE_AMP_THR +941 0x0008 //TX_MIC1MUTE_CVG_TIME +942 0x0008 //TX_MIC1MUTE_RELEASE_TIME +943 0x0000 //TX_AMS_RESRV_01 +944 0x0000 //TX_AMS_RESRV_02 +945 0x0000 //TX_AMS_RESRV_03 +946 0x0000 //TX_AMS_RESRV_04 +947 0x0000 //TX_AMS_RESRV_05 +948 0x0000 //TX_AMS_RESRV_06 +949 0x0000 //TX_AMS_RESRV_07 +950 0x0000 //TX_AMS_RESRV_08 +951 0x0000 //TX_AMS_RESRV_09 +952 0x0000 //TX_AMS_RESRV_10 +953 0x0000 //TX_AMS_RESRV_11 +954 0x0000 //TX_AMS_RESRV_12 +955 0x0000 //TX_AMS_RESRV_13 +956 0x0000 //TX_AMS_RESRV_14 +957 0x0000 //TX_AMS_RESRV_15 +958 0x0000 //TX_AMS_RESRV_16 +959 0x0000 //TX_AMS_RESRV_17 +960 0x0000 //TX_AMS_RESRV_18 +961 0x0000 //TX_AMS_RESRV_19 #RX -0 0x042C //RX_RECVFUNC_MODE_0 +0 0x242C //RX_RECVFUNC_MODE_0 1 0x0000 //RX_RECVFUNC_MODE_1 2 0x0004 //RX_SAMPLINGFREQ_SIG 3 0x0004 //RX_SAMPLINGFREQ_PROC @@ -6201,25 +9014,25 @@ 30 0x0002 //RX_EXTRA_NS_L 31 0x0800 //RX_EXTRA_NS_A 32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 -33 0x7FFF //RX_TDDRC_LIMITER_THRD +33 0x7220 //RX_TDDRC_LIMITER_THRD 34 0x0800 //RX_TDDRC_LIMITER_GAIN 35 0x199A //RX_A_POST_FLT 36 0x0000 //RX_LMT_THRD 37 0x4000 //RX_LMT_ALPHA 38 0x0020 //RX_FDEQ_SUBNUM -39 0x4852 //RX_FDEQ_GAIN_0 -40 0x5858 //RX_FDEQ_GAIN_1 -41 0x5C5A //RX_FDEQ_GAIN_2 -42 0x4F50 //RX_FDEQ_GAIN_3 -43 0x5A61 //RX_FDEQ_GAIN_4 -44 0x605B //RX_FDEQ_GAIN_5 -45 0x5050 //RX_FDEQ_GAIN_6 -46 0x5050 //RX_FDEQ_GAIN_7 -47 0x5044 //RX_FDEQ_GAIN_8 -48 0x3633 //RX_FDEQ_GAIN_9 -49 0x3424 //RX_FDEQ_GAIN_10 -50 0x1A24 //RX_FDEQ_GAIN_11 -51 0x2B37 //RX_FDEQ_GAIN_12 +39 0x4858 //RX_FDEQ_GAIN_0 +40 0x6265 //RX_FDEQ_GAIN_1 +41 0x6568 //RX_FDEQ_GAIN_2 +42 0x5654 //RX_FDEQ_GAIN_3 +43 0x676E //RX_FDEQ_GAIN_4 +44 0x6E6B //RX_FDEQ_GAIN_5 +45 0x5B5F //RX_FDEQ_GAIN_6 +46 0x5864 //RX_FDEQ_GAIN_7 +47 0x6548 //RX_FDEQ_GAIN_8 +48 0x4848 //RX_FDEQ_GAIN_9 +49 0x4848 //RX_FDEQ_GAIN_10 +50 0x4848 //RX_FDEQ_GAIN_11 +51 0x4848 //RX_FDEQ_GAIN_12 52 0x4848 //RX_FDEQ_GAIN_13 53 0x4848 //RX_FDEQ_GAIN_14 54 0x4848 //RX_FDEQ_GAIN_15 @@ -6282,22 +9095,22 @@ 111 0x0002 //RX_FILTINDX 112 0x0000 //RX_TDDRC_THRD_0 113 0x0000 //RX_TDDRC_THRD_1 -114 0x1200 //RX_TDDRC_THRD_2 -115 0x1900 //RX_TDDRC_THRD_3 -116 0x3000 //RX_TDDRC_SLANT_0 -117 0x6E00 //RX_TDDRC_SLANT_1 +114 0x1800 //RX_TDDRC_THRD_2 +115 0x1800 //RX_TDDRC_THRD_3 +116 0x7FFF //RX_TDDRC_SLANT_0 +117 0x7FFF //RX_TDDRC_SLANT_1 118 0x1000 //RX_TDDRC_ALPHA_UP_0 119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 120 0x0000 //RX_TDDRC_HMNC_FLAG 121 0x199A //RX_TDDRC_HMNC_GAIN 122 0x0001 //RX_TDDRC_SMT_FLAG 123 0x0CCD //RX_TDDRC_SMT_W -124 0x0240 //RX_TDDRC_DRC_GAIN +124 0x0231 //RX_TDDRC_DRC_GAIN 125 0x7C00 //RX_LAMBDA_PKA_FP 126 0x280A //RX_TPKA_FP 127 0x032D //RX_MIN_G_FP 128 0x0A00 //RX_MAX_G_FP -129 0x000A //RX_SPK_VOL +129 0x000B //RX_SPK_VOL 130 0x0000 //RX_VOL_RESRV_0 131 0x0000 //RX_MAXLEVEL_CNG 132 0x3000 //RX_BWE_UV_TH @@ -7018,11 +9831,862 @@ 110 0x0000 //RX_FDDRC_RESRV_0 129 0x0100 //RX_SPK_VOL 130 0x0000 //RX_VOL_RESRV_0 +#RX 2 +157 0x242C //RX_RECVFUNC_MODE_0 +158 0x0000 //RX_RECVFUNC_MODE_1 +159 0x0004 //RX_SAMPLINGFREQ_SIG +160 0x0004 //RX_SAMPLINGFREQ_PROC +161 0x000A //RX_FRAME_SZ +162 0x0000 //RX_DELAY_OPT +163 0x1000 //RX_TDDRC_ALPHA_UP_1 +164 0x1000 //RX_TDDRC_ALPHA_UP_2 +165 0x1000 //RX_TDDRC_ALPHA_UP_3 +166 0x1000 //RX_TDDRC_ALPHA_UP_4 +167 0x0800 //RX_PGA +168 0x7B02 //RX_A_HP +169 0x4000 //RX_B_PE +170 0x7800 //RX_THR_PITCH_DET_0 +171 0x7000 //RX_THR_PITCH_DET_1 +172 0x6000 //RX_THR_PITCH_DET_2 +173 0x0008 //RX_PITCH_BFR_LEN +174 0x0003 //RX_SBD_PITCH_DET +175 0x0100 //RX_PP_RESRV_0 +176 0x0020 //RX_PP_RESRV_1 +177 0x0500 //RX_N_SN_EST +178 0x000C //RX_N2_SN_EST +179 0x000A //RX_NS_LVL_CTRL +180 0xF600 //RX_THR_SN_EST +181 0x7000 //RX_LAMBDA_PFILT +182 0x000A //RX_FENS_RESRV_0 +183 0x0190 //RX_FENS_RESRV_1 +184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +187 0x0002 //RX_EXTRA_NS_L +188 0x0800 //RX_EXTRA_NS_A +189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +190 0x7220 //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +192 0x199A //RX_A_POST_FLT +193 0x0000 //RX_LMT_THRD +194 0x4000 //RX_LMT_ALPHA +195 0x0020 //RX_FDEQ_SUBNUM +196 0x4858 //RX_FDEQ_GAIN_0 +197 0x6265 //RX_FDEQ_GAIN_1 +198 0x6568 //RX_FDEQ_GAIN_2 +199 0x5654 //RX_FDEQ_GAIN_3 +200 0x676E //RX_FDEQ_GAIN_4 +201 0x6E6B //RX_FDEQ_GAIN_5 +202 0x5B5F //RX_FDEQ_GAIN_6 +203 0x5864 //RX_FDEQ_GAIN_7 +204 0x6548 //RX_FDEQ_GAIN_8 +205 0x4848 //RX_FDEQ_GAIN_9 +206 0x4848 //RX_FDEQ_GAIN_10 +207 0x4848 //RX_FDEQ_GAIN_11 +208 0x4848 //RX_FDEQ_GAIN_12 +209 0x4848 //RX_FDEQ_GAIN_13 +210 0x4848 //RX_FDEQ_GAIN_14 +211 0x4848 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0202 //RX_FDEQ_BIN_0 +221 0x0203 //RX_FDEQ_BIN_1 +222 0x0304 //RX_FDEQ_BIN_2 +223 0x0405 //RX_FDEQ_BIN_3 +224 0x0607 //RX_FDEQ_BIN_4 +225 0x0809 //RX_FDEQ_BIN_5 +226 0x0A0B //RX_FDEQ_BIN_6 +227 0x0C0D //RX_FDEQ_BIN_7 +228 0x0E0F //RX_FDEQ_BIN_8 +229 0x1011 //RX_FDEQ_BIN_9 +230 0x1214 //RX_FDEQ_BIN_10 +231 0x1618 //RX_FDEQ_BIN_11 +232 0x1C1C //RX_FDEQ_BIN_12 +233 0x2020 //RX_FDEQ_BIN_13 +234 0x2020 //RX_FDEQ_BIN_14 +235 0x2011 //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x4000 //RX_FDEQ_RESRV_0 +245 0x0320 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0030 //RX_FDDRC_BAND_MARGIN_1 +248 0x0050 //RX_FDDRC_BAND_MARGIN_2 +249 0x0080 //RX_FDDRC_BAND_MARGIN_3 +250 0x0007 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x5000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x6400 //RX_FDDRC_THRD_3_2 +258 0x6400 //RX_FDDRC_THRD_3_3 +259 0x2000 //RX_FDDRC_SLANT_0_0 +260 0x2000 //RX_FDDRC_SLANT_0_1 +261 0x2000 //RX_FDDRC_SLANT_0_2 +262 0x2000 //RX_FDDRC_SLANT_0_3 +263 0x5333 //RX_FDDRC_SLANT_1_0 +264 0x5333 //RX_FDDRC_SLANT_1_1 +265 0x5333 //RX_FDDRC_SLANT_1_2 +266 0x5333 //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +268 0x0002 //RX_FILTINDX +269 0x0000 //RX_TDDRC_THRD_0 +270 0x0000 //RX_TDDRC_THRD_1 +271 0x1800 //RX_TDDRC_THRD_2 +272 0x1800 //RX_TDDRC_THRD_3 +273 0x7FFF //RX_TDDRC_SLANT_0 +274 0x7FFF //RX_TDDRC_SLANT_1 +275 0x1000 //RX_TDDRC_ALPHA_UP_0 +276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x199A //RX_TDDRC_HMNC_GAIN +279 0x0001 //RX_TDDRC_SMT_FLAG +280 0x0CCD //RX_TDDRC_SMT_W +281 0x0231 //RX_TDDRC_DRC_GAIN +282 0x7C00 //RX_LAMBDA_PKA_FP +283 0x280A //RX_TPKA_FP +284 0x032D //RX_MIN_G_FP +285 0x0A00 //RX_MAX_G_FP +286 0x000B //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 +288 0x0000 //RX_MAXLEVEL_CNG +289 0x3000 //RX_BWE_UV_TH +290 0x3000 //RX_BWE_UV_TH2 +291 0x1800 //RX_BWE_UV_TH3 +292 0x1000 //RX_BWE_V_TH +293 0x04CD //RX_BWE_GAIN1_V_TH1 +294 0x0F33 //RX_BWE_GAIN1_V_TH2 +295 0x7333 //RX_BWE_UV_EQ +296 0x199A //RX_BWE_V_EQ +297 0x7333 //RX_BWE_TONE_TH +298 0x0004 //RX_BWE_UV_HOLD_T +299 0x6CCD //RX_BWE_GAIN2_ALPHA +300 0x799A //RX_BWE_GAIN3_ALPHA +301 0x001E //RX_BWE_CUTOFF +302 0x3000 //RX_BWE_GAINFILL +303 0x3200 //RX_BWE_MAXTH_TONE +304 0x2000 //RX_BWE_EQ_0 +305 0x2000 //RX_BWE_EQ_1 +306 0x2000 //RX_BWE_EQ_2 +307 0x2000 //RX_BWE_EQ_3 +308 0x2000 //RX_BWE_EQ_4 +309 0x2000 //RX_BWE_EQ_5 +310 0x2000 //RX_BWE_EQ_6 +311 0x0000 //RX_BWE_RESRV_0 +312 0x0000 //RX_BWE_RESRV_1 +313 0x0000 //RX_BWE_RESRV_2 +#VOL 0 +163 0x1000 //RX_TDDRC_ALPHA_UP_1 +164 0x1000 //RX_TDDRC_ALPHA_UP_2 +165 0x1000 //RX_TDDRC_ALPHA_UP_3 +166 0x1000 //RX_TDDRC_ALPHA_UP_4 +184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +190 0x7220 //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +269 0x0000 //RX_TDDRC_THRD_0 +270 0x0000 //RX_TDDRC_THRD_1 +271 0x1800 //RX_TDDRC_THRD_2 +272 0x1800 //RX_TDDRC_THRD_3 +273 0x7FFF //RX_TDDRC_SLANT_0 +274 0x7FFF //RX_TDDRC_SLANT_1 +275 0x1000 //RX_TDDRC_ALPHA_UP_0 +276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x199A //RX_TDDRC_HMNC_GAIN +279 0x0001 //RX_TDDRC_SMT_FLAG +280 0x0CCD //RX_TDDRC_SMT_W +281 0x0231 //RX_TDDRC_DRC_GAIN +195 0x0020 //RX_FDEQ_SUBNUM +196 0x4858 //RX_FDEQ_GAIN_0 +197 0x6265 //RX_FDEQ_GAIN_1 +198 0x6568 //RX_FDEQ_GAIN_2 +199 0x5654 //RX_FDEQ_GAIN_3 +200 0x676E //RX_FDEQ_GAIN_4 +201 0x6E6B //RX_FDEQ_GAIN_5 +202 0x5B5F //RX_FDEQ_GAIN_6 +203 0x5864 //RX_FDEQ_GAIN_7 +204 0x6548 //RX_FDEQ_GAIN_8 +205 0x4848 //RX_FDEQ_GAIN_9 +206 0x4848 //RX_FDEQ_GAIN_10 +207 0x4848 //RX_FDEQ_GAIN_11 +208 0x4848 //RX_FDEQ_GAIN_12 +209 0x4848 //RX_FDEQ_GAIN_13 +210 0x4848 //RX_FDEQ_GAIN_14 +211 0x4848 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0202 //RX_FDEQ_BIN_0 +221 0x0203 //RX_FDEQ_BIN_1 +222 0x0304 //RX_FDEQ_BIN_2 +223 0x0405 //RX_FDEQ_BIN_3 +224 0x0607 //RX_FDEQ_BIN_4 +225 0x0809 //RX_FDEQ_BIN_5 +226 0x0A0B //RX_FDEQ_BIN_6 +227 0x0C0D //RX_FDEQ_BIN_7 +228 0x0E0F //RX_FDEQ_BIN_8 +229 0x1011 //RX_FDEQ_BIN_9 +230 0x1214 //RX_FDEQ_BIN_10 +231 0x1618 //RX_FDEQ_BIN_11 +232 0x1C1C //RX_FDEQ_BIN_12 +233 0x2020 //RX_FDEQ_BIN_13 +234 0x2020 //RX_FDEQ_BIN_14 +235 0x2011 //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x4000 //RX_FDEQ_RESRV_0 +245 0x0320 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0030 //RX_FDDRC_BAND_MARGIN_1 +248 0x0050 //RX_FDDRC_BAND_MARGIN_2 +249 0x0080 //RX_FDDRC_BAND_MARGIN_3 +250 0x0007 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x5000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x6400 //RX_FDDRC_THRD_3_2 +258 0x6400 //RX_FDDRC_THRD_3_3 +259 0x2000 //RX_FDDRC_SLANT_0_0 +260 0x2000 //RX_FDDRC_SLANT_0_1 +261 0x2000 //RX_FDDRC_SLANT_0_2 +262 0x2000 //RX_FDDRC_SLANT_0_3 +263 0x5333 //RX_FDDRC_SLANT_1_0 +264 0x5333 //RX_FDDRC_SLANT_1_1 +265 0x5333 //RX_FDDRC_SLANT_1_2 +266 0x5333 //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +286 0x000B //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 +#VOL 1 +163 0x1000 //RX_TDDRC_ALPHA_UP_1 +164 0x1000 //RX_TDDRC_ALPHA_UP_2 +165 0x1000 //RX_TDDRC_ALPHA_UP_3 +166 0x1000 //RX_TDDRC_ALPHA_UP_4 +184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +190 0x7220 //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +269 0x0000 //RX_TDDRC_THRD_0 +270 0x0000 //RX_TDDRC_THRD_1 +271 0x1800 //RX_TDDRC_THRD_2 +272 0x1800 //RX_TDDRC_THRD_3 +273 0x7FFF //RX_TDDRC_SLANT_0 +274 0x7FFF //RX_TDDRC_SLANT_1 +275 0x1000 //RX_TDDRC_ALPHA_UP_0 +276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x199A //RX_TDDRC_HMNC_GAIN +279 0x0001 //RX_TDDRC_SMT_FLAG +280 0x0CCD //RX_TDDRC_SMT_W +281 0x0231 //RX_TDDRC_DRC_GAIN +195 0x0020 //RX_FDEQ_SUBNUM +196 0x4858 //RX_FDEQ_GAIN_0 +197 0x6265 //RX_FDEQ_GAIN_1 +198 0x6568 //RX_FDEQ_GAIN_2 +199 0x5654 //RX_FDEQ_GAIN_3 +200 0x676E //RX_FDEQ_GAIN_4 +201 0x6E6B //RX_FDEQ_GAIN_5 +202 0x5B5F //RX_FDEQ_GAIN_6 +203 0x5864 //RX_FDEQ_GAIN_7 +204 0x6548 //RX_FDEQ_GAIN_8 +205 0x4848 //RX_FDEQ_GAIN_9 +206 0x4848 //RX_FDEQ_GAIN_10 +207 0x4848 //RX_FDEQ_GAIN_11 +208 0x4848 //RX_FDEQ_GAIN_12 +209 0x4848 //RX_FDEQ_GAIN_13 +210 0x4848 //RX_FDEQ_GAIN_14 +211 0x4848 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0202 //RX_FDEQ_BIN_0 +221 0x0203 //RX_FDEQ_BIN_1 +222 0x0304 //RX_FDEQ_BIN_2 +223 0x0405 //RX_FDEQ_BIN_3 +224 0x0607 //RX_FDEQ_BIN_4 +225 0x0809 //RX_FDEQ_BIN_5 +226 0x0A0B //RX_FDEQ_BIN_6 +227 0x0C0D //RX_FDEQ_BIN_7 +228 0x0E0F //RX_FDEQ_BIN_8 +229 0x1011 //RX_FDEQ_BIN_9 +230 0x1214 //RX_FDEQ_BIN_10 +231 0x1618 //RX_FDEQ_BIN_11 +232 0x1C1C //RX_FDEQ_BIN_12 +233 0x2020 //RX_FDEQ_BIN_13 +234 0x2020 //RX_FDEQ_BIN_14 +235 0x2011 //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x4000 //RX_FDEQ_RESRV_0 +245 0x0320 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0030 //RX_FDDRC_BAND_MARGIN_1 +248 0x0050 //RX_FDDRC_BAND_MARGIN_2 +249 0x0080 //RX_FDDRC_BAND_MARGIN_3 +250 0x0007 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x5000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x6400 //RX_FDDRC_THRD_3_2 +258 0x6400 //RX_FDDRC_THRD_3_3 +259 0x2000 //RX_FDDRC_SLANT_0_0 +260 0x2000 //RX_FDDRC_SLANT_0_1 +261 0x2000 //RX_FDDRC_SLANT_0_2 +262 0x2000 //RX_FDDRC_SLANT_0_3 +263 0x5333 //RX_FDDRC_SLANT_1_0 +264 0x5333 //RX_FDDRC_SLANT_1_1 +265 0x5333 //RX_FDDRC_SLANT_1_2 +266 0x5333 //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +286 0x0012 //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 +#VOL 2 +163 0x1000 //RX_TDDRC_ALPHA_UP_1 +164 0x1000 //RX_TDDRC_ALPHA_UP_2 +165 0x1000 //RX_TDDRC_ALPHA_UP_3 +166 0x1000 //RX_TDDRC_ALPHA_UP_4 +184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +190 0x7220 //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +269 0x0000 //RX_TDDRC_THRD_0 +270 0x0000 //RX_TDDRC_THRD_1 +271 0x1800 //RX_TDDRC_THRD_2 +272 0x1800 //RX_TDDRC_THRD_3 +273 0x7FFF //RX_TDDRC_SLANT_0 +274 0x7FFF //RX_TDDRC_SLANT_1 +275 0x1000 //RX_TDDRC_ALPHA_UP_0 +276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x199A //RX_TDDRC_HMNC_GAIN +279 0x0001 //RX_TDDRC_SMT_FLAG +280 0x0CCD //RX_TDDRC_SMT_W +281 0x0231 //RX_TDDRC_DRC_GAIN +195 0x0020 //RX_FDEQ_SUBNUM +196 0x4858 //RX_FDEQ_GAIN_0 +197 0x6265 //RX_FDEQ_GAIN_1 +198 0x6568 //RX_FDEQ_GAIN_2 +199 0x5654 //RX_FDEQ_GAIN_3 +200 0x676E //RX_FDEQ_GAIN_4 +201 0x6E6B //RX_FDEQ_GAIN_5 +202 0x5B5F //RX_FDEQ_GAIN_6 +203 0x5864 //RX_FDEQ_GAIN_7 +204 0x6548 //RX_FDEQ_GAIN_8 +205 0x4848 //RX_FDEQ_GAIN_9 +206 0x4848 //RX_FDEQ_GAIN_10 +207 0x4848 //RX_FDEQ_GAIN_11 +208 0x4848 //RX_FDEQ_GAIN_12 +209 0x4848 //RX_FDEQ_GAIN_13 +210 0x4848 //RX_FDEQ_GAIN_14 +211 0x4848 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0202 //RX_FDEQ_BIN_0 +221 0x0203 //RX_FDEQ_BIN_1 +222 0x0304 //RX_FDEQ_BIN_2 +223 0x0405 //RX_FDEQ_BIN_3 +224 0x0607 //RX_FDEQ_BIN_4 +225 0x0809 //RX_FDEQ_BIN_5 +226 0x0A0B //RX_FDEQ_BIN_6 +227 0x0C0D //RX_FDEQ_BIN_7 +228 0x0E0F //RX_FDEQ_BIN_8 +229 0x1011 //RX_FDEQ_BIN_9 +230 0x1214 //RX_FDEQ_BIN_10 +231 0x1618 //RX_FDEQ_BIN_11 +232 0x1C1C //RX_FDEQ_BIN_12 +233 0x2020 //RX_FDEQ_BIN_13 +234 0x2020 //RX_FDEQ_BIN_14 +235 0x2011 //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x4000 //RX_FDEQ_RESRV_0 +245 0x0320 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0030 //RX_FDDRC_BAND_MARGIN_1 +248 0x0050 //RX_FDDRC_BAND_MARGIN_2 +249 0x0080 //RX_FDDRC_BAND_MARGIN_3 +250 0x0007 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x5000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x6400 //RX_FDDRC_THRD_3_2 +258 0x6400 //RX_FDDRC_THRD_3_3 +259 0x2000 //RX_FDDRC_SLANT_0_0 +260 0x2000 //RX_FDDRC_SLANT_0_1 +261 0x2000 //RX_FDDRC_SLANT_0_2 +262 0x2000 //RX_FDDRC_SLANT_0_3 +263 0x5333 //RX_FDDRC_SLANT_1_0 +264 0x5333 //RX_FDDRC_SLANT_1_1 +265 0x5333 //RX_FDDRC_SLANT_1_2 +266 0x5333 //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +286 0x001F //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 +#VOL 3 +163 0x1000 //RX_TDDRC_ALPHA_UP_1 +164 0x1000 //RX_TDDRC_ALPHA_UP_2 +165 0x1000 //RX_TDDRC_ALPHA_UP_3 +166 0x1000 //RX_TDDRC_ALPHA_UP_4 +184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +190 0x7220 //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +269 0x0000 //RX_TDDRC_THRD_0 +270 0x0000 //RX_TDDRC_THRD_1 +271 0x1800 //RX_TDDRC_THRD_2 +272 0x1800 //RX_TDDRC_THRD_3 +273 0x7FFF //RX_TDDRC_SLANT_0 +274 0x7FFF //RX_TDDRC_SLANT_1 +275 0x1000 //RX_TDDRC_ALPHA_UP_0 +276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x199A //RX_TDDRC_HMNC_GAIN +279 0x0001 //RX_TDDRC_SMT_FLAG +280 0x0CCD //RX_TDDRC_SMT_W +281 0x0231 //RX_TDDRC_DRC_GAIN +195 0x0020 //RX_FDEQ_SUBNUM +196 0x4858 //RX_FDEQ_GAIN_0 +197 0x6265 //RX_FDEQ_GAIN_1 +198 0x6568 //RX_FDEQ_GAIN_2 +199 0x5654 //RX_FDEQ_GAIN_3 +200 0x676E //RX_FDEQ_GAIN_4 +201 0x6E6B //RX_FDEQ_GAIN_5 +202 0x5B5F //RX_FDEQ_GAIN_6 +203 0x5864 //RX_FDEQ_GAIN_7 +204 0x6548 //RX_FDEQ_GAIN_8 +205 0x4848 //RX_FDEQ_GAIN_9 +206 0x4848 //RX_FDEQ_GAIN_10 +207 0x4848 //RX_FDEQ_GAIN_11 +208 0x4848 //RX_FDEQ_GAIN_12 +209 0x4848 //RX_FDEQ_GAIN_13 +210 0x4848 //RX_FDEQ_GAIN_14 +211 0x4848 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0202 //RX_FDEQ_BIN_0 +221 0x0203 //RX_FDEQ_BIN_1 +222 0x0304 //RX_FDEQ_BIN_2 +223 0x0405 //RX_FDEQ_BIN_3 +224 0x0607 //RX_FDEQ_BIN_4 +225 0x0809 //RX_FDEQ_BIN_5 +226 0x0A0B //RX_FDEQ_BIN_6 +227 0x0C0D //RX_FDEQ_BIN_7 +228 0x0E0F //RX_FDEQ_BIN_8 +229 0x1011 //RX_FDEQ_BIN_9 +230 0x1214 //RX_FDEQ_BIN_10 +231 0x1618 //RX_FDEQ_BIN_11 +232 0x1C1C //RX_FDEQ_BIN_12 +233 0x2020 //RX_FDEQ_BIN_13 +234 0x2020 //RX_FDEQ_BIN_14 +235 0x2011 //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x4000 //RX_FDEQ_RESRV_0 +245 0x0320 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0030 //RX_FDDRC_BAND_MARGIN_1 +248 0x0050 //RX_FDDRC_BAND_MARGIN_2 +249 0x0080 //RX_FDDRC_BAND_MARGIN_3 +250 0x0007 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x5000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x6400 //RX_FDDRC_THRD_3_2 +258 0x6400 //RX_FDDRC_THRD_3_3 +259 0x2000 //RX_FDDRC_SLANT_0_0 +260 0x2000 //RX_FDDRC_SLANT_0_1 +261 0x2000 //RX_FDDRC_SLANT_0_2 +262 0x2000 //RX_FDDRC_SLANT_0_3 +263 0x5333 //RX_FDDRC_SLANT_1_0 +264 0x5333 //RX_FDDRC_SLANT_1_1 +265 0x5333 //RX_FDDRC_SLANT_1_2 +266 0x5333 //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +286 0x0034 //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 +#VOL 4 +163 0x1000 //RX_TDDRC_ALPHA_UP_1 +164 0x1000 //RX_TDDRC_ALPHA_UP_2 +165 0x1000 //RX_TDDRC_ALPHA_UP_3 +166 0x1000 //RX_TDDRC_ALPHA_UP_4 +184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +190 0x7220 //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +269 0x0000 //RX_TDDRC_THRD_0 +270 0x0000 //RX_TDDRC_THRD_1 +271 0x1800 //RX_TDDRC_THRD_2 +272 0x1800 //RX_TDDRC_THRD_3 +273 0x7FFF //RX_TDDRC_SLANT_0 +274 0x7FFF //RX_TDDRC_SLANT_1 +275 0x1000 //RX_TDDRC_ALPHA_UP_0 +276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x199A //RX_TDDRC_HMNC_GAIN +279 0x0001 //RX_TDDRC_SMT_FLAG +280 0x0CCD //RX_TDDRC_SMT_W +281 0x0231 //RX_TDDRC_DRC_GAIN +195 0x0020 //RX_FDEQ_SUBNUM +196 0x4858 //RX_FDEQ_GAIN_0 +197 0x6265 //RX_FDEQ_GAIN_1 +198 0x6568 //RX_FDEQ_GAIN_2 +199 0x5654 //RX_FDEQ_GAIN_3 +200 0x676E //RX_FDEQ_GAIN_4 +201 0x6E6B //RX_FDEQ_GAIN_5 +202 0x5B5F //RX_FDEQ_GAIN_6 +203 0x5864 //RX_FDEQ_GAIN_7 +204 0x6548 //RX_FDEQ_GAIN_8 +205 0x4848 //RX_FDEQ_GAIN_9 +206 0x4848 //RX_FDEQ_GAIN_10 +207 0x4848 //RX_FDEQ_GAIN_11 +208 0x4848 //RX_FDEQ_GAIN_12 +209 0x4848 //RX_FDEQ_GAIN_13 +210 0x4848 //RX_FDEQ_GAIN_14 +211 0x4848 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0202 //RX_FDEQ_BIN_0 +221 0x0203 //RX_FDEQ_BIN_1 +222 0x0304 //RX_FDEQ_BIN_2 +223 0x0405 //RX_FDEQ_BIN_3 +224 0x0607 //RX_FDEQ_BIN_4 +225 0x0809 //RX_FDEQ_BIN_5 +226 0x0A0B //RX_FDEQ_BIN_6 +227 0x0C0D //RX_FDEQ_BIN_7 +228 0x0E0F //RX_FDEQ_BIN_8 +229 0x1011 //RX_FDEQ_BIN_9 +230 0x1214 //RX_FDEQ_BIN_10 +231 0x1618 //RX_FDEQ_BIN_11 +232 0x1C1C //RX_FDEQ_BIN_12 +233 0x2020 //RX_FDEQ_BIN_13 +234 0x2020 //RX_FDEQ_BIN_14 +235 0x2011 //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x4000 //RX_FDEQ_RESRV_0 +245 0x0320 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0030 //RX_FDDRC_BAND_MARGIN_1 +248 0x0050 //RX_FDDRC_BAND_MARGIN_2 +249 0x0080 //RX_FDDRC_BAND_MARGIN_3 +250 0x0007 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x5000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x6400 //RX_FDDRC_THRD_3_2 +258 0x6400 //RX_FDDRC_THRD_3_3 +259 0x2000 //RX_FDDRC_SLANT_0_0 +260 0x2000 //RX_FDDRC_SLANT_0_1 +261 0x2000 //RX_FDDRC_SLANT_0_2 +262 0x2000 //RX_FDDRC_SLANT_0_3 +263 0x5333 //RX_FDDRC_SLANT_1_0 +264 0x5333 //RX_FDDRC_SLANT_1_1 +265 0x5333 //RX_FDDRC_SLANT_1_2 +266 0x5333 //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +286 0x0056 //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 +#VOL 5 +163 0x1000 //RX_TDDRC_ALPHA_UP_1 +164 0x1000 //RX_TDDRC_ALPHA_UP_2 +165 0x1000 //RX_TDDRC_ALPHA_UP_3 +166 0x1000 //RX_TDDRC_ALPHA_UP_4 +184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +190 0x7220 //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +269 0x0000 //RX_TDDRC_THRD_0 +270 0x0000 //RX_TDDRC_THRD_1 +271 0x1800 //RX_TDDRC_THRD_2 +272 0x1800 //RX_TDDRC_THRD_3 +273 0x7FFF //RX_TDDRC_SLANT_0 +274 0x7FFF //RX_TDDRC_SLANT_1 +275 0x1000 //RX_TDDRC_ALPHA_UP_0 +276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x199A //RX_TDDRC_HMNC_GAIN +279 0x0001 //RX_TDDRC_SMT_FLAG +280 0x0CCD //RX_TDDRC_SMT_W +281 0x0231 //RX_TDDRC_DRC_GAIN +195 0x0020 //RX_FDEQ_SUBNUM +196 0x4858 //RX_FDEQ_GAIN_0 +197 0x6265 //RX_FDEQ_GAIN_1 +198 0x6568 //RX_FDEQ_GAIN_2 +199 0x5654 //RX_FDEQ_GAIN_3 +200 0x676E //RX_FDEQ_GAIN_4 +201 0x6E6B //RX_FDEQ_GAIN_5 +202 0x5B5F //RX_FDEQ_GAIN_6 +203 0x5864 //RX_FDEQ_GAIN_7 +204 0x6548 //RX_FDEQ_GAIN_8 +205 0x4848 //RX_FDEQ_GAIN_9 +206 0x4848 //RX_FDEQ_GAIN_10 +207 0x4848 //RX_FDEQ_GAIN_11 +208 0x4848 //RX_FDEQ_GAIN_12 +209 0x4848 //RX_FDEQ_GAIN_13 +210 0x4848 //RX_FDEQ_GAIN_14 +211 0x4848 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0202 //RX_FDEQ_BIN_0 +221 0x0203 //RX_FDEQ_BIN_1 +222 0x0304 //RX_FDEQ_BIN_2 +223 0x0405 //RX_FDEQ_BIN_3 +224 0x0607 //RX_FDEQ_BIN_4 +225 0x0809 //RX_FDEQ_BIN_5 +226 0x0A0B //RX_FDEQ_BIN_6 +227 0x0C0D //RX_FDEQ_BIN_7 +228 0x0E0F //RX_FDEQ_BIN_8 +229 0x1011 //RX_FDEQ_BIN_9 +230 0x1214 //RX_FDEQ_BIN_10 +231 0x1618 //RX_FDEQ_BIN_11 +232 0x1C1C //RX_FDEQ_BIN_12 +233 0x2020 //RX_FDEQ_BIN_13 +234 0x2020 //RX_FDEQ_BIN_14 +235 0x2011 //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x4000 //RX_FDEQ_RESRV_0 +245 0x0320 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0030 //RX_FDDRC_BAND_MARGIN_1 +248 0x0050 //RX_FDDRC_BAND_MARGIN_2 +249 0x0080 //RX_FDDRC_BAND_MARGIN_3 +250 0x0007 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x5000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x6400 //RX_FDDRC_THRD_3_2 +258 0x6400 //RX_FDDRC_THRD_3_3 +259 0x2000 //RX_FDDRC_SLANT_0_0 +260 0x2000 //RX_FDDRC_SLANT_0_1 +261 0x2000 //RX_FDDRC_SLANT_0_2 +262 0x2000 //RX_FDDRC_SLANT_0_3 +263 0x5333 //RX_FDDRC_SLANT_1_0 +264 0x5333 //RX_FDDRC_SLANT_1_1 +265 0x5333 //RX_FDDRC_SLANT_1_2 +266 0x5333 //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +286 0x0090 //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 +#VOL 6 +163 0x1000 //RX_TDDRC_ALPHA_UP_1 +164 0x1000 //RX_TDDRC_ALPHA_UP_2 +165 0x1000 //RX_TDDRC_ALPHA_UP_3 +166 0x1000 //RX_TDDRC_ALPHA_UP_4 +184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +190 0x7220 //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +269 0x0000 //RX_TDDRC_THRD_0 +270 0x0000 //RX_TDDRC_THRD_1 +271 0x1800 //RX_TDDRC_THRD_2 +272 0x1800 //RX_TDDRC_THRD_3 +273 0x7FFF //RX_TDDRC_SLANT_0 +274 0x7FFF //RX_TDDRC_SLANT_1 +275 0x1000 //RX_TDDRC_ALPHA_UP_0 +276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x199A //RX_TDDRC_HMNC_GAIN +279 0x0001 //RX_TDDRC_SMT_FLAG +280 0x0CCD //RX_TDDRC_SMT_W +281 0x0231 //RX_TDDRC_DRC_GAIN +195 0x0020 //RX_FDEQ_SUBNUM +196 0x4858 //RX_FDEQ_GAIN_0 +197 0x6265 //RX_FDEQ_GAIN_1 +198 0x6568 //RX_FDEQ_GAIN_2 +199 0x5654 //RX_FDEQ_GAIN_3 +200 0x676E //RX_FDEQ_GAIN_4 +201 0x6E6B //RX_FDEQ_GAIN_5 +202 0x5B5F //RX_FDEQ_GAIN_6 +203 0x5864 //RX_FDEQ_GAIN_7 +204 0x6548 //RX_FDEQ_GAIN_8 +205 0x4848 //RX_FDEQ_GAIN_9 +206 0x4848 //RX_FDEQ_GAIN_10 +207 0x4848 //RX_FDEQ_GAIN_11 +208 0x4848 //RX_FDEQ_GAIN_12 +209 0x4848 //RX_FDEQ_GAIN_13 +210 0x4848 //RX_FDEQ_GAIN_14 +211 0x4848 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0202 //RX_FDEQ_BIN_0 +221 0x0203 //RX_FDEQ_BIN_1 +222 0x0304 //RX_FDEQ_BIN_2 +223 0x0405 //RX_FDEQ_BIN_3 +224 0x0607 //RX_FDEQ_BIN_4 +225 0x0809 //RX_FDEQ_BIN_5 +226 0x0A0B //RX_FDEQ_BIN_6 +227 0x0C0D //RX_FDEQ_BIN_7 +228 0x0E0F //RX_FDEQ_BIN_8 +229 0x1011 //RX_FDEQ_BIN_9 +230 0x1214 //RX_FDEQ_BIN_10 +231 0x1618 //RX_FDEQ_BIN_11 +232 0x1C1C //RX_FDEQ_BIN_12 +233 0x2020 //RX_FDEQ_BIN_13 +234 0x2020 //RX_FDEQ_BIN_14 +235 0x2011 //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x4000 //RX_FDEQ_RESRV_0 +245 0x0320 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0030 //RX_FDDRC_BAND_MARGIN_1 +248 0x0050 //RX_FDDRC_BAND_MARGIN_2 +249 0x0080 //RX_FDDRC_BAND_MARGIN_3 +250 0x0007 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x5000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x6400 //RX_FDDRC_THRD_3_2 +258 0x6400 //RX_FDDRC_THRD_3_3 +259 0x2000 //RX_FDDRC_SLANT_0_0 +260 0x2000 //RX_FDDRC_SLANT_0_1 +261 0x2000 //RX_FDDRC_SLANT_0_2 +262 0x2000 //RX_FDDRC_SLANT_0_3 +263 0x5333 //RX_FDDRC_SLANT_1_0 +264 0x5333 //RX_FDDRC_SLANT_1_1 +265 0x5333 //RX_FDDRC_SLANT_1_2 +266 0x5333 //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +286 0x0100 //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 #CASE_NAME HEADSET-GOOGLE_CONDOR-VOICE_GENERIC-NB -#PARAM_MODE FULL -#PARAM_TYPE TX+RX -#TOTAL_CUSTOM_STEP 7 +#PARAM_MODE Full +#PARAM_TYPE TX+2RX +#TOTAL_CUSTOM_STEP 7+7 #TX 0 0x0009 //TX_OPERATION_MODE_0 1 0x0008 //TX_OPERATION_MODE_1 @@ -7339,20 +11003,20 @@ 312 0x7FFF //TX_A_POST_FILT_0 313 0x2000 //TX_A_POST_FILT_1 314 0x4000 //TX_A_POST_FILT_S_0 -315 0x4000 //TX_A_POST_FILT_S_1 -316 0x1000 //TX_A_POST_FILT_S_2 +315 0x1000 //TX_A_POST_FILT_S_1 +316 0x4000 //TX_A_POST_FILT_S_2 317 0x4000 //TX_A_POST_FILT_S_3 318 0x4000 //TX_A_POST_FILT_S_4 319 0x4000 //TX_A_POST_FILT_S_5 320 0x4000 //TX_A_POST_FILT_S_6 321 0x4000 //TX_A_POST_FILT_S_7 322 0x0400 //TX_B_POST_FILT_0 -323 0x0400 //TX_B_POST_FILT_1 +323 0x2000 //TX_B_POST_FILT_1 324 0x2000 //TX_B_POST_FILT_2 325 0x2000 //TX_B_POST_FILT_3 326 0x2000 //TX_B_POST_FILT_4 327 0x2000 //TX_B_POST_FILT_5 -328 0x2000 //TX_B_POST_FILT_6 +328 0x0400 //TX_B_POST_FILT_6 329 0x2000 //TX_B_POST_FILT_7 330 0x7FFF //TX_B_LESSCUT_RTO_S_0 331 0x7FFF //TX_B_LESSCUT_RTO_S_1 @@ -7391,7 +11055,7 @@ 364 0x0000 //TX_K_APT 365 0x0001 //TX_NOISEDET 366 0x0190 //TX_NDETCT -367 0x000A //TX_NOISE_TH_0 +367 0x003B //TX_NOISE_TH_0 368 0x1B58 //TX_NOISE_TH_0_2 369 0x2134 //TX_NOISE_TH_0_3 370 0x02BC //TX_NOISE_TH_1 @@ -7403,11 +11067,11 @@ 376 0x0000 //TX_NOISE_TH_5_3 377 0x0000 //TX_NOISE_TH_5_4 378 0x0032 //TX_NOISE_TH_6 -379 0x0014 //TX_MINENOISE_TH -380 0x4000 //TX_MINENOISE_MIC0_TH_MTS -381 0xFFEE //TX_MINENOISE_MIC0_TH_EXP -382 0x6000 //TX_MINENOISE_MIC0_S_TH_MTS -383 0xFFF3 //TX_MINENOISE_MIC0_S_TH_EXP +379 0x00C8 //TX_MINENOISE_TH +380 0xD508 //TX_MORENS_TFMASK_TH +381 0x0001 //TX_DRC_QUIET_FLOOR +382 0x3A98 //TX_RATIODTL_CUT_TH +383 0x0DAC //TX_DT_CUT_K1 384 0x00A5 //TX_OUT_ENER_S_TH_CLEAN 385 0x00A5 //TX_OUT_ENER_S_TH_LESSCLEAN 386 0x00A5 //TX_OUT_ENER_S_TH_NOISY @@ -7415,22 +11079,22 @@ 388 0x00CE //TX_OUT_ENER_TH_SPEECH 389 0x2000 //TX_SN_NPB_GAIN 390 0x0000 //TX_NN_NPB_GAIN -391 0x0000 //TX_CSX_ALPHA_0 -392 0x0000 //TX_CSX_ALPHA_1 -393 0x0000 //TX_CSX_ALPHA_2 -394 0x0000 //TX_CSX_ALPHA_3 -395 0x0800 //TX_MU_ARSP_EST -396 0x00C8 //TX_P_OUTBEAM_MIN_TH +391 0x7FFF //TX_POST_MASK_SUP_HSNE +392 0x1388 //TX_TAIL_DET_TH +393 0x4000 //TX_B_LESSCUT_RTO_WTA +394 0x0000 //TX_MEL_G_R +395 0x0080 //TX_SUPHIGH_TH +396 0x0000 //TX_MASK_G_R 397 0x0002 //TX_EXTRA_NS_L -398 0x0800 //TX_EXTRA_NS_A -399 0x0005 //TX_VR_NOISE_FLOOR_TH +398 0x1800 //TX_C_POST_FLT_MASK +399 0x7FFF //TX_A_POST_FLT_WNS 400 0x0148 //TX_MIN_G_LOW300HZ 401 0x0002 //TX_MAXLEVEL_CNG 402 0x00B4 //TX_STN_NOISE_TH 403 0x4000 //TX_POST_MASK_SUP 404 0x7FFF //TX_POST_MASK_ADJUST 405 0x00C8 //TX_NS_ENOISE_MIC0_TH -406 0x0014 //TX_MINENOISE_MIC0_TH +406 0x0032 //TX_MINENOISE_MIC0_TH 407 0x012C //TX_MINENOISE_MIC0_S_TH 408 0x7FFF //TX_MIN_G_CTRL_SSNS 409 0x0000 //TX_METAL_RTO_THR @@ -7538,16 +11202,16 @@ 511 0x6666 //TX_MIC_TO_BFGAIN 512 0x0000 //TX_MICTOBFGAIN0 513 0x0000 //TX_FASTMUE_TH -514 0x0000 //TX_DERVB_LEN_0 -515 0x0000 //TX_DERVB_LEN_1 -516 0x0000 //TX_RHO_DERVB -517 0x0000 //TX_MIC_INDX_DERVB -518 0x0000 //TX_MU_DERVB -519 0x0000 //TX_DR_RESRV_0 -520 0x0000 //TX_DR_RESRV_1 -521 0x0000 //TX_DR_RESRV_2 -522 0x0000 //TX_DR_RESRV_3 -523 0x0000 //TX_DR_RESRV_4 +514 0xC000 //TX_DEREVERB_LF_MU +515 0xC000 //TX_DEREVERB_HF_MU +516 0xCCCC //TX_DEREVERB_DELAY +517 0xD999 //TX_DEREVERB_COEF_LEN +518 0x1F40 //TX_DEREVERB_DNR +519 0x0000 //TX_DEREVERB_ALPHA +520 0x0000 //TX_DEREVERB_BETA +521 0x0000 //TX_GSC_RTOL_TH +522 0x7000 //TX_GSC_RTOH_TH +523 0x0064 //TX_WIDE2_MEANHTH 524 0x0000 //TX_DR_RESRV_5 525 0x0000 //TX_DR_RESRV_6 526 0x0000 //TX_DR_RESRV_7 @@ -7915,14 +11579,79 @@ 888 0x00C8 //TX_FASTNS_ARSPC_TH 889 0xC000 //TX_FASTNS_MASK5_TH 890 0x4848 //TX_POSTSSA_MIN_G_VR_MASK -891 0x7FFF //TX_A_LESSCUT_RTO_MASK +891 0x4000 //TX_A_LESSCUT_RTO_MASK 892 0x1770 //TX_FASTNS_NOISETH 893 0xC000 //TX_FASTNS_SSA_THLFL 894 0xC000 //TX_FASTNS_SSA_THHFL 895 0xCCCC //TX_FASTNS_SSA_THLFH 896 0xD999 //TX_FASTNS_SSA_THHFH +897 0x2339 //TX_SENDFUNC_REG_MICMUTE +898 0x0021 //TX_SENDFUNC_REG_MICMUTE1 +899 0x02BC //TX_MICMUTE_RATIO_THR +900 0x0140 //TX_MICMUTE_AMP_THR +901 0x0004 //TX_MICMUTE_HPF_IND +902 0x00C0 //TX_MICMUTE_LOG_EYR_TH +903 0x0008 //TX_MICMUTE_CVG_TIME +904 0x0008 //TX_MICMUTE_RELEASE_TIME +905 0x01FE //TX_MIC_VOLUME_MIC0MUTE +906 0x0020 //TX_MICMUTE_EPD_OFFSET_0 +907 0x001E //TX_MICMUTE_FRQ_AEC_L +908 0x7999 //TX_MICMUTE_EAD_THR +909 0x7FFF //TX_MICMUTE_LAMBDA_CB_NLE +910 0x7FFF //TX_MICMUTE_LAMBDA_RE_EST +911 0x4000 //TX_DTD_THR1_MICMUTE_0 +912 0x7000 //TX_DTD_THR1_MICMUTE_1 +913 0x7FFF //TX_DTD_THR1_MICMUTE_2 +914 0x7FFF //TX_DTD_THR1_MICMUTE_3 +915 0x6CCC //TX_DTD_THR2_MICMUTE_0 +916 0x0400 //TX_MICMUTE_MIN_EQ_RE_EST_0 +917 0x0400 //TX_MICMUTE_MIN_EQ_RE_EST_1 +918 0x1000 //TX_MICMUTE_MIN_EQ_RE_EST_2 +919 0x7FFF //TX_MICMUTE_MIN_EQ_RE_EST_3 +920 0x7FFF //TX_MICMUTE_MIN_EQ_RE_EST_4 +921 0x4000 //TX_MICMUTE_C_POST_FLT +922 0x03E8 //TX_MICMUTE_DT_CUT_K +923 0x0001 //TX_MICMUTE_DT_CUT_THR +924 0x03E8 //TX_MICMUTE_DT_CUT_K2 +925 0x0001 //TX_MICMUTE_DT_CUT_THR2 +926 0x0064 //TX_MICMUTE_DT2_HOLD_N +927 0x1000 //TX_MICMUTE_RATIODTH_THCUT +928 0x1000 //TX_MICMUTE_B_POST_FLT_ECHOL +929 0x7FFF //TX_MICMUTE_B_POST_FLT_ECHOH +930 0x0400 //TX_MICMUTE_C_POST_FLT_MASK +931 0x7999 //TX_MICMUTE_RATIODTL_CUT_TH +932 0x0258 //TX_MICMUTE_DT_CUT_K1 +933 0x0800 //TX_MICMUTE_N2_SN_EST +934 0xFC00 //TX_MICMUTE_THR_SN_EST_0 +935 0x001C //TX_MICMUTE_MIN_G_CTRL_0 +936 0x6000 //TX_MICMUTE_A_POST_FILT_S_0 +937 0x7000 //TX_MICMUTE_B_POST_FILT_0 +938 0x2710 //TX_MIC1RUB_AMP_THR +939 0x0010 //TX_MIC1MUTE_RATIO_THR +940 0x0450 //TX_MIC1MUTE_AMP_THR +941 0x0008 //TX_MIC1MUTE_CVG_TIME +942 0x0008 //TX_MIC1MUTE_RELEASE_TIME +943 0x0000 //TX_AMS_RESRV_01 +944 0x0000 //TX_AMS_RESRV_02 +945 0x0000 //TX_AMS_RESRV_03 +946 0x0000 //TX_AMS_RESRV_04 +947 0x0000 //TX_AMS_RESRV_05 +948 0x0000 //TX_AMS_RESRV_06 +949 0x0000 //TX_AMS_RESRV_07 +950 0x0000 //TX_AMS_RESRV_08 +951 0x0000 //TX_AMS_RESRV_09 +952 0x0000 //TX_AMS_RESRV_10 +953 0x0000 //TX_AMS_RESRV_11 +954 0x0000 //TX_AMS_RESRV_12 +955 0x0000 //TX_AMS_RESRV_13 +956 0x0000 //TX_AMS_RESRV_14 +957 0x0000 //TX_AMS_RESRV_15 +958 0x0000 //TX_AMS_RESRV_16 +959 0x0000 //TX_AMS_RESRV_17 +960 0x0000 //TX_AMS_RESRV_18 +961 0x0000 //TX_AMS_RESRV_19 #RX -0 0x002C //RX_RECVFUNC_MODE_0 +0 0x202C //RX_RECVFUNC_MODE_0 1 0x0000 //RX_RECVFUNC_MODE_1 2 0x0000 //RX_SAMPLINGFREQ_SIG 3 0x0000 //RX_SAMPLINGFREQ_PROC @@ -8772,11 +12501,862 @@ 110 0x0000 //RX_FDDRC_RESRV_0 129 0x0100 //RX_SPK_VOL 130 0x0000 //RX_VOL_RESRV_0 +#RX 2 +157 0x202C //RX_RECVFUNC_MODE_0 +158 0x0000 //RX_RECVFUNC_MODE_1 +159 0x0000 //RX_SAMPLINGFREQ_SIG +160 0x0000 //RX_SAMPLINGFREQ_PROC +161 0x000A //RX_FRAME_SZ +162 0x0000 //RX_DELAY_OPT +163 0x3000 //RX_TDDRC_ALPHA_UP_1 +164 0x3000 //RX_TDDRC_ALPHA_UP_2 +165 0x3000 //RX_TDDRC_ALPHA_UP_3 +166 0x3000 //RX_TDDRC_ALPHA_UP_4 +167 0x0800 //RX_PGA +168 0x7FFF //RX_A_HP +169 0x0000 //RX_B_PE +170 0x3800 //RX_THR_PITCH_DET_0 +171 0x3000 //RX_THR_PITCH_DET_1 +172 0x2800 //RX_THR_PITCH_DET_2 +173 0x0008 //RX_PITCH_BFR_LEN +174 0x0003 //RX_SBD_PITCH_DET +175 0x0100 //RX_PP_RESRV_0 +176 0x0020 //RX_PP_RESRV_1 +177 0x0600 //RX_N_SN_EST +178 0x000C //RX_N2_SN_EST +179 0x0010 //RX_NS_LVL_CTRL +180 0xF800 //RX_THR_SN_EST +181 0x7CCD //RX_LAMBDA_PFILT +182 0x000A //RX_FENS_RESRV_0 +183 0x0190 //RX_FENS_RESRV_1 +184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +187 0x0002 //RX_EXTRA_NS_L +188 0x0800 //RX_EXTRA_NS_A +189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +190 0x7FFF //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +192 0x199A //RX_A_POST_FLT +193 0x0000 //RX_LMT_THRD +194 0x4000 //RX_LMT_ALPHA +195 0x0014 //RX_FDEQ_SUBNUM +196 0x4848 //RX_FDEQ_GAIN_0 +197 0x4848 //RX_FDEQ_GAIN_1 +198 0x4848 //RX_FDEQ_GAIN_2 +199 0x4848 //RX_FDEQ_GAIN_3 +200 0x4848 //RX_FDEQ_GAIN_4 +201 0x4848 //RX_FDEQ_GAIN_5 +202 0x4848 //RX_FDEQ_GAIN_6 +203 0x4848 //RX_FDEQ_GAIN_7 +204 0x4848 //RX_FDEQ_GAIN_8 +205 0x4848 //RX_FDEQ_GAIN_9 +206 0x4848 //RX_FDEQ_GAIN_10 +207 0x4848 //RX_FDEQ_GAIN_11 +208 0x4848 //RX_FDEQ_GAIN_12 +209 0x4848 //RX_FDEQ_GAIN_13 +210 0x4848 //RX_FDEQ_GAIN_14 +211 0x4848 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0202 //RX_FDEQ_BIN_0 +221 0x0203 //RX_FDEQ_BIN_1 +222 0x0303 //RX_FDEQ_BIN_2 +223 0x0304 //RX_FDEQ_BIN_3 +224 0x0405 //RX_FDEQ_BIN_4 +225 0x0506 //RX_FDEQ_BIN_5 +226 0x0708 //RX_FDEQ_BIN_6 +227 0x090A //RX_FDEQ_BIN_7 +228 0x0B0C //RX_FDEQ_BIN_8 +229 0x0D08 //RX_FDEQ_BIN_9 +230 0x0000 //RX_FDEQ_BIN_10 +231 0x0000 //RX_FDEQ_BIN_11 +232 0x0000 //RX_FDEQ_BIN_12 +233 0x0000 //RX_FDEQ_BIN_13 +234 0x0000 //RX_FDEQ_BIN_14 +235 0x0000 //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x4000 //RX_FDEQ_RESRV_0 +245 0x0320 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0030 //RX_FDDRC_BAND_MARGIN_1 +248 0x0050 //RX_FDDRC_BAND_MARGIN_2 +249 0x0080 //RX_FDDRC_BAND_MARGIN_3 +250 0x0007 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x5000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x6400 //RX_FDDRC_THRD_3_2 +258 0x6400 //RX_FDDRC_THRD_3_3 +259 0x2000 //RX_FDDRC_SLANT_0_0 +260 0x2000 //RX_FDDRC_SLANT_0_1 +261 0x2000 //RX_FDDRC_SLANT_0_2 +262 0x2000 //RX_FDDRC_SLANT_0_3 +263 0x5333 //RX_FDDRC_SLANT_1_0 +264 0x5333 //RX_FDDRC_SLANT_1_1 +265 0x5333 //RX_FDDRC_SLANT_1_2 +266 0x5333 //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +268 0x0002 //RX_FILTINDX +269 0x0000 //RX_TDDRC_THRD_0 +270 0x0000 //RX_TDDRC_THRD_1 +271 0x2000 //RX_TDDRC_THRD_2 +272 0x3000 //RX_TDDRC_THRD_3 +273 0x0800 //RX_TDDRC_SLANT_0 +274 0x7EB8 //RX_TDDRC_SLANT_1 +275 0x3000 //RX_TDDRC_ALPHA_UP_0 +276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x199A //RX_TDDRC_HMNC_GAIN +279 0x0001 //RX_TDDRC_SMT_FLAG +280 0x0CCD //RX_TDDRC_SMT_W +281 0x0200 //RX_TDDRC_DRC_GAIN +282 0x7C00 //RX_LAMBDA_PKA_FP +283 0x2000 //RX_TPKA_FP +284 0x2000 //RX_MIN_G_FP +285 0x0080 //RX_MAX_G_FP +286 0x000B //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 +288 0x0000 //RX_MAXLEVEL_CNG +289 0x3000 //RX_BWE_UV_TH +290 0x3000 //RX_BWE_UV_TH2 +291 0x1800 //RX_BWE_UV_TH3 +292 0x1000 //RX_BWE_V_TH +293 0x04CD //RX_BWE_GAIN1_V_TH1 +294 0x0F33 //RX_BWE_GAIN1_V_TH2 +295 0x7333 //RX_BWE_UV_EQ +296 0x199A //RX_BWE_V_EQ +297 0x7333 //RX_BWE_TONE_TH +298 0x0004 //RX_BWE_UV_HOLD_T +299 0x6CCD //RX_BWE_GAIN2_ALPHA +300 0x799A //RX_BWE_GAIN3_ALPHA +301 0x001E //RX_BWE_CUTOFF +302 0x3000 //RX_BWE_GAINFILL +303 0x3200 //RX_BWE_MAXTH_TONE +304 0x2000 //RX_BWE_EQ_0 +305 0x2000 //RX_BWE_EQ_1 +306 0x2000 //RX_BWE_EQ_2 +307 0x2000 //RX_BWE_EQ_3 +308 0x2000 //RX_BWE_EQ_4 +309 0x2000 //RX_BWE_EQ_5 +310 0x2000 //RX_BWE_EQ_6 +311 0x0000 //RX_BWE_RESRV_0 +312 0x0000 //RX_BWE_RESRV_1 +313 0x0000 //RX_BWE_RESRV_2 +#VOL 0 +163 0x3000 //RX_TDDRC_ALPHA_UP_1 +164 0x3000 //RX_TDDRC_ALPHA_UP_2 +165 0x3000 //RX_TDDRC_ALPHA_UP_3 +166 0x3000 //RX_TDDRC_ALPHA_UP_4 +184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +190 0x7FFF //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +269 0x0000 //RX_TDDRC_THRD_0 +270 0x0000 //RX_TDDRC_THRD_1 +271 0x2000 //RX_TDDRC_THRD_2 +272 0x3000 //RX_TDDRC_THRD_3 +273 0x0800 //RX_TDDRC_SLANT_0 +274 0x7EB8 //RX_TDDRC_SLANT_1 +275 0x3000 //RX_TDDRC_ALPHA_UP_0 +276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x199A //RX_TDDRC_HMNC_GAIN +279 0x0001 //RX_TDDRC_SMT_FLAG +280 0x0CCD //RX_TDDRC_SMT_W +281 0x0200 //RX_TDDRC_DRC_GAIN +195 0x0014 //RX_FDEQ_SUBNUM +196 0x4848 //RX_FDEQ_GAIN_0 +197 0x4848 //RX_FDEQ_GAIN_1 +198 0x4848 //RX_FDEQ_GAIN_2 +199 0x4848 //RX_FDEQ_GAIN_3 +200 0x4848 //RX_FDEQ_GAIN_4 +201 0x4848 //RX_FDEQ_GAIN_5 +202 0x4848 //RX_FDEQ_GAIN_6 +203 0x4848 //RX_FDEQ_GAIN_7 +204 0x4848 //RX_FDEQ_GAIN_8 +205 0x4848 //RX_FDEQ_GAIN_9 +206 0x4848 //RX_FDEQ_GAIN_10 +207 0x4848 //RX_FDEQ_GAIN_11 +208 0x4848 //RX_FDEQ_GAIN_12 +209 0x4848 //RX_FDEQ_GAIN_13 +210 0x4848 //RX_FDEQ_GAIN_14 +211 0x4848 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0202 //RX_FDEQ_BIN_0 +221 0x0203 //RX_FDEQ_BIN_1 +222 0x0303 //RX_FDEQ_BIN_2 +223 0x0304 //RX_FDEQ_BIN_3 +224 0x0405 //RX_FDEQ_BIN_4 +225 0x0506 //RX_FDEQ_BIN_5 +226 0x0708 //RX_FDEQ_BIN_6 +227 0x090A //RX_FDEQ_BIN_7 +228 0x0B0C //RX_FDEQ_BIN_8 +229 0x0D08 //RX_FDEQ_BIN_9 +230 0x0000 //RX_FDEQ_BIN_10 +231 0x0000 //RX_FDEQ_BIN_11 +232 0x0000 //RX_FDEQ_BIN_12 +233 0x0000 //RX_FDEQ_BIN_13 +234 0x0000 //RX_FDEQ_BIN_14 +235 0x0000 //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x4000 //RX_FDEQ_RESRV_0 +245 0x0320 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0030 //RX_FDDRC_BAND_MARGIN_1 +248 0x0050 //RX_FDDRC_BAND_MARGIN_2 +249 0x0080 //RX_FDDRC_BAND_MARGIN_3 +250 0x0007 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x5000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x6400 //RX_FDDRC_THRD_3_2 +258 0x6400 //RX_FDDRC_THRD_3_3 +259 0x2000 //RX_FDDRC_SLANT_0_0 +260 0x2000 //RX_FDDRC_SLANT_0_1 +261 0x2000 //RX_FDDRC_SLANT_0_2 +262 0x2000 //RX_FDDRC_SLANT_0_3 +263 0x5333 //RX_FDDRC_SLANT_1_0 +264 0x5333 //RX_FDDRC_SLANT_1_1 +265 0x5333 //RX_FDDRC_SLANT_1_2 +266 0x5333 //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +286 0x000B //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 +#VOL 1 +163 0x3000 //RX_TDDRC_ALPHA_UP_1 +164 0x3000 //RX_TDDRC_ALPHA_UP_2 +165 0x3000 //RX_TDDRC_ALPHA_UP_3 +166 0x3000 //RX_TDDRC_ALPHA_UP_4 +184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +190 0x7FFF //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +269 0x0000 //RX_TDDRC_THRD_0 +270 0x0000 //RX_TDDRC_THRD_1 +271 0x2000 //RX_TDDRC_THRD_2 +272 0x3000 //RX_TDDRC_THRD_3 +273 0x0800 //RX_TDDRC_SLANT_0 +274 0x7EB8 //RX_TDDRC_SLANT_1 +275 0x3000 //RX_TDDRC_ALPHA_UP_0 +276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x199A //RX_TDDRC_HMNC_GAIN +279 0x0001 //RX_TDDRC_SMT_FLAG +280 0x0CCD //RX_TDDRC_SMT_W +281 0x0200 //RX_TDDRC_DRC_GAIN +195 0x0014 //RX_FDEQ_SUBNUM +196 0x4848 //RX_FDEQ_GAIN_0 +197 0x4848 //RX_FDEQ_GAIN_1 +198 0x4848 //RX_FDEQ_GAIN_2 +199 0x4848 //RX_FDEQ_GAIN_3 +200 0x4848 //RX_FDEQ_GAIN_4 +201 0x4848 //RX_FDEQ_GAIN_5 +202 0x4848 //RX_FDEQ_GAIN_6 +203 0x4848 //RX_FDEQ_GAIN_7 +204 0x4848 //RX_FDEQ_GAIN_8 +205 0x4848 //RX_FDEQ_GAIN_9 +206 0x4848 //RX_FDEQ_GAIN_10 +207 0x4848 //RX_FDEQ_GAIN_11 +208 0x4848 //RX_FDEQ_GAIN_12 +209 0x4848 //RX_FDEQ_GAIN_13 +210 0x4848 //RX_FDEQ_GAIN_14 +211 0x4848 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0202 //RX_FDEQ_BIN_0 +221 0x0203 //RX_FDEQ_BIN_1 +222 0x0303 //RX_FDEQ_BIN_2 +223 0x0304 //RX_FDEQ_BIN_3 +224 0x0405 //RX_FDEQ_BIN_4 +225 0x0506 //RX_FDEQ_BIN_5 +226 0x0708 //RX_FDEQ_BIN_6 +227 0x090A //RX_FDEQ_BIN_7 +228 0x0B0C //RX_FDEQ_BIN_8 +229 0x0D08 //RX_FDEQ_BIN_9 +230 0x0000 //RX_FDEQ_BIN_10 +231 0x0000 //RX_FDEQ_BIN_11 +232 0x0000 //RX_FDEQ_BIN_12 +233 0x0000 //RX_FDEQ_BIN_13 +234 0x0000 //RX_FDEQ_BIN_14 +235 0x0000 //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x4000 //RX_FDEQ_RESRV_0 +245 0x0320 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0030 //RX_FDDRC_BAND_MARGIN_1 +248 0x0050 //RX_FDDRC_BAND_MARGIN_2 +249 0x0080 //RX_FDDRC_BAND_MARGIN_3 +250 0x0007 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x5000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x6400 //RX_FDDRC_THRD_3_2 +258 0x6400 //RX_FDDRC_THRD_3_3 +259 0x2000 //RX_FDDRC_SLANT_0_0 +260 0x2000 //RX_FDDRC_SLANT_0_1 +261 0x2000 //RX_FDDRC_SLANT_0_2 +262 0x2000 //RX_FDDRC_SLANT_0_3 +263 0x5333 //RX_FDDRC_SLANT_1_0 +264 0x5333 //RX_FDDRC_SLANT_1_1 +265 0x5333 //RX_FDDRC_SLANT_1_2 +266 0x5333 //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +286 0x0013 //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 +#VOL 2 +163 0x3000 //RX_TDDRC_ALPHA_UP_1 +164 0x3000 //RX_TDDRC_ALPHA_UP_2 +165 0x3000 //RX_TDDRC_ALPHA_UP_3 +166 0x3000 //RX_TDDRC_ALPHA_UP_4 +184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +190 0x7FFF //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +269 0x0000 //RX_TDDRC_THRD_0 +270 0x0000 //RX_TDDRC_THRD_1 +271 0x2000 //RX_TDDRC_THRD_2 +272 0x3000 //RX_TDDRC_THRD_3 +273 0x0800 //RX_TDDRC_SLANT_0 +274 0x7EB8 //RX_TDDRC_SLANT_1 +275 0x3000 //RX_TDDRC_ALPHA_UP_0 +276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x199A //RX_TDDRC_HMNC_GAIN +279 0x0001 //RX_TDDRC_SMT_FLAG +280 0x0CCD //RX_TDDRC_SMT_W +281 0x0200 //RX_TDDRC_DRC_GAIN +195 0x0014 //RX_FDEQ_SUBNUM +196 0x4848 //RX_FDEQ_GAIN_0 +197 0x4848 //RX_FDEQ_GAIN_1 +198 0x4848 //RX_FDEQ_GAIN_2 +199 0x4848 //RX_FDEQ_GAIN_3 +200 0x4848 //RX_FDEQ_GAIN_4 +201 0x4848 //RX_FDEQ_GAIN_5 +202 0x4848 //RX_FDEQ_GAIN_6 +203 0x4848 //RX_FDEQ_GAIN_7 +204 0x4848 //RX_FDEQ_GAIN_8 +205 0x4848 //RX_FDEQ_GAIN_9 +206 0x4848 //RX_FDEQ_GAIN_10 +207 0x4848 //RX_FDEQ_GAIN_11 +208 0x4848 //RX_FDEQ_GAIN_12 +209 0x4848 //RX_FDEQ_GAIN_13 +210 0x4848 //RX_FDEQ_GAIN_14 +211 0x4848 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0202 //RX_FDEQ_BIN_0 +221 0x0203 //RX_FDEQ_BIN_1 +222 0x0303 //RX_FDEQ_BIN_2 +223 0x0304 //RX_FDEQ_BIN_3 +224 0x0405 //RX_FDEQ_BIN_4 +225 0x0506 //RX_FDEQ_BIN_5 +226 0x0708 //RX_FDEQ_BIN_6 +227 0x090A //RX_FDEQ_BIN_7 +228 0x0B0C //RX_FDEQ_BIN_8 +229 0x0D08 //RX_FDEQ_BIN_9 +230 0x0000 //RX_FDEQ_BIN_10 +231 0x0000 //RX_FDEQ_BIN_11 +232 0x0000 //RX_FDEQ_BIN_12 +233 0x0000 //RX_FDEQ_BIN_13 +234 0x0000 //RX_FDEQ_BIN_14 +235 0x0000 //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x4000 //RX_FDEQ_RESRV_0 +245 0x0320 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0030 //RX_FDDRC_BAND_MARGIN_1 +248 0x0050 //RX_FDDRC_BAND_MARGIN_2 +249 0x0080 //RX_FDDRC_BAND_MARGIN_3 +250 0x0007 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x5000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x6400 //RX_FDDRC_THRD_3_2 +258 0x6400 //RX_FDDRC_THRD_3_3 +259 0x2000 //RX_FDDRC_SLANT_0_0 +260 0x2000 //RX_FDDRC_SLANT_0_1 +261 0x2000 //RX_FDDRC_SLANT_0_2 +262 0x2000 //RX_FDDRC_SLANT_0_3 +263 0x5333 //RX_FDDRC_SLANT_1_0 +264 0x5333 //RX_FDDRC_SLANT_1_1 +265 0x5333 //RX_FDDRC_SLANT_1_2 +266 0x5333 //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +286 0x0020 //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 +#VOL 3 +163 0x3000 //RX_TDDRC_ALPHA_UP_1 +164 0x3000 //RX_TDDRC_ALPHA_UP_2 +165 0x3000 //RX_TDDRC_ALPHA_UP_3 +166 0x3000 //RX_TDDRC_ALPHA_UP_4 +184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +190 0x7FFF //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +269 0x0000 //RX_TDDRC_THRD_0 +270 0x0000 //RX_TDDRC_THRD_1 +271 0x2000 //RX_TDDRC_THRD_2 +272 0x3000 //RX_TDDRC_THRD_3 +273 0x0800 //RX_TDDRC_SLANT_0 +274 0x7EB8 //RX_TDDRC_SLANT_1 +275 0x3000 //RX_TDDRC_ALPHA_UP_0 +276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x199A //RX_TDDRC_HMNC_GAIN +279 0x0001 //RX_TDDRC_SMT_FLAG +280 0x0CCD //RX_TDDRC_SMT_W +281 0x0200 //RX_TDDRC_DRC_GAIN +195 0x0014 //RX_FDEQ_SUBNUM +196 0x4848 //RX_FDEQ_GAIN_0 +197 0x4848 //RX_FDEQ_GAIN_1 +198 0x4848 //RX_FDEQ_GAIN_2 +199 0x4848 //RX_FDEQ_GAIN_3 +200 0x4848 //RX_FDEQ_GAIN_4 +201 0x4848 //RX_FDEQ_GAIN_5 +202 0x4848 //RX_FDEQ_GAIN_6 +203 0x4848 //RX_FDEQ_GAIN_7 +204 0x4848 //RX_FDEQ_GAIN_8 +205 0x4848 //RX_FDEQ_GAIN_9 +206 0x4848 //RX_FDEQ_GAIN_10 +207 0x4848 //RX_FDEQ_GAIN_11 +208 0x4848 //RX_FDEQ_GAIN_12 +209 0x4848 //RX_FDEQ_GAIN_13 +210 0x4848 //RX_FDEQ_GAIN_14 +211 0x4848 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0202 //RX_FDEQ_BIN_0 +221 0x0203 //RX_FDEQ_BIN_1 +222 0x0303 //RX_FDEQ_BIN_2 +223 0x0304 //RX_FDEQ_BIN_3 +224 0x0405 //RX_FDEQ_BIN_4 +225 0x0506 //RX_FDEQ_BIN_5 +226 0x0708 //RX_FDEQ_BIN_6 +227 0x090A //RX_FDEQ_BIN_7 +228 0x0B0C //RX_FDEQ_BIN_8 +229 0x0D08 //RX_FDEQ_BIN_9 +230 0x0000 //RX_FDEQ_BIN_10 +231 0x0000 //RX_FDEQ_BIN_11 +232 0x0000 //RX_FDEQ_BIN_12 +233 0x0000 //RX_FDEQ_BIN_13 +234 0x0000 //RX_FDEQ_BIN_14 +235 0x0000 //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x4000 //RX_FDEQ_RESRV_0 +245 0x0320 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0030 //RX_FDDRC_BAND_MARGIN_1 +248 0x0050 //RX_FDDRC_BAND_MARGIN_2 +249 0x0080 //RX_FDDRC_BAND_MARGIN_3 +250 0x0007 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x5000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x6400 //RX_FDDRC_THRD_3_2 +258 0x6400 //RX_FDDRC_THRD_3_3 +259 0x2000 //RX_FDDRC_SLANT_0_0 +260 0x2000 //RX_FDDRC_SLANT_0_1 +261 0x2000 //RX_FDDRC_SLANT_0_2 +262 0x2000 //RX_FDDRC_SLANT_0_3 +263 0x5333 //RX_FDDRC_SLANT_1_0 +264 0x5333 //RX_FDDRC_SLANT_1_1 +265 0x5333 //RX_FDDRC_SLANT_1_2 +266 0x5333 //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +286 0x0036 //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 +#VOL 4 +163 0x3000 //RX_TDDRC_ALPHA_UP_1 +164 0x3000 //RX_TDDRC_ALPHA_UP_2 +165 0x3000 //RX_TDDRC_ALPHA_UP_3 +166 0x3000 //RX_TDDRC_ALPHA_UP_4 +184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +190 0x7FFF //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +269 0x0000 //RX_TDDRC_THRD_0 +270 0x0000 //RX_TDDRC_THRD_1 +271 0x2000 //RX_TDDRC_THRD_2 +272 0x3000 //RX_TDDRC_THRD_3 +273 0x0800 //RX_TDDRC_SLANT_0 +274 0x7EB8 //RX_TDDRC_SLANT_1 +275 0x3000 //RX_TDDRC_ALPHA_UP_0 +276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x199A //RX_TDDRC_HMNC_GAIN +279 0x0001 //RX_TDDRC_SMT_FLAG +280 0x0CCD //RX_TDDRC_SMT_W +281 0x0200 //RX_TDDRC_DRC_GAIN +195 0x0014 //RX_FDEQ_SUBNUM +196 0x4848 //RX_FDEQ_GAIN_0 +197 0x4848 //RX_FDEQ_GAIN_1 +198 0x4848 //RX_FDEQ_GAIN_2 +199 0x4848 //RX_FDEQ_GAIN_3 +200 0x4848 //RX_FDEQ_GAIN_4 +201 0x4848 //RX_FDEQ_GAIN_5 +202 0x4848 //RX_FDEQ_GAIN_6 +203 0x4848 //RX_FDEQ_GAIN_7 +204 0x4848 //RX_FDEQ_GAIN_8 +205 0x4848 //RX_FDEQ_GAIN_9 +206 0x4848 //RX_FDEQ_GAIN_10 +207 0x4848 //RX_FDEQ_GAIN_11 +208 0x4848 //RX_FDEQ_GAIN_12 +209 0x4848 //RX_FDEQ_GAIN_13 +210 0x4848 //RX_FDEQ_GAIN_14 +211 0x4848 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0202 //RX_FDEQ_BIN_0 +221 0x0203 //RX_FDEQ_BIN_1 +222 0x0303 //RX_FDEQ_BIN_2 +223 0x0304 //RX_FDEQ_BIN_3 +224 0x0405 //RX_FDEQ_BIN_4 +225 0x0506 //RX_FDEQ_BIN_5 +226 0x0708 //RX_FDEQ_BIN_6 +227 0x090A //RX_FDEQ_BIN_7 +228 0x0B0C //RX_FDEQ_BIN_8 +229 0x0D08 //RX_FDEQ_BIN_9 +230 0x0000 //RX_FDEQ_BIN_10 +231 0x0000 //RX_FDEQ_BIN_11 +232 0x0000 //RX_FDEQ_BIN_12 +233 0x0000 //RX_FDEQ_BIN_13 +234 0x0000 //RX_FDEQ_BIN_14 +235 0x0000 //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x4000 //RX_FDEQ_RESRV_0 +245 0x0320 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0030 //RX_FDDRC_BAND_MARGIN_1 +248 0x0050 //RX_FDDRC_BAND_MARGIN_2 +249 0x0080 //RX_FDDRC_BAND_MARGIN_3 +250 0x0007 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x5000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x6400 //RX_FDDRC_THRD_3_2 +258 0x6400 //RX_FDDRC_THRD_3_3 +259 0x2000 //RX_FDDRC_SLANT_0_0 +260 0x2000 //RX_FDDRC_SLANT_0_1 +261 0x2000 //RX_FDDRC_SLANT_0_2 +262 0x2000 //RX_FDDRC_SLANT_0_3 +263 0x5333 //RX_FDDRC_SLANT_1_0 +264 0x5333 //RX_FDDRC_SLANT_1_1 +265 0x5333 //RX_FDDRC_SLANT_1_2 +266 0x5333 //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +286 0x005B //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 +#VOL 5 +163 0x3000 //RX_TDDRC_ALPHA_UP_1 +164 0x3000 //RX_TDDRC_ALPHA_UP_2 +165 0x3000 //RX_TDDRC_ALPHA_UP_3 +166 0x3000 //RX_TDDRC_ALPHA_UP_4 +184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +190 0x7FFF //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +269 0x0000 //RX_TDDRC_THRD_0 +270 0x0000 //RX_TDDRC_THRD_1 +271 0x2000 //RX_TDDRC_THRD_2 +272 0x3000 //RX_TDDRC_THRD_3 +273 0x0800 //RX_TDDRC_SLANT_0 +274 0x7EB8 //RX_TDDRC_SLANT_1 +275 0x3000 //RX_TDDRC_ALPHA_UP_0 +276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x199A //RX_TDDRC_HMNC_GAIN +279 0x0001 //RX_TDDRC_SMT_FLAG +280 0x0CCD //RX_TDDRC_SMT_W +281 0x0200 //RX_TDDRC_DRC_GAIN +195 0x0014 //RX_FDEQ_SUBNUM +196 0x4848 //RX_FDEQ_GAIN_0 +197 0x4848 //RX_FDEQ_GAIN_1 +198 0x4848 //RX_FDEQ_GAIN_2 +199 0x4848 //RX_FDEQ_GAIN_3 +200 0x4848 //RX_FDEQ_GAIN_4 +201 0x4848 //RX_FDEQ_GAIN_5 +202 0x4848 //RX_FDEQ_GAIN_6 +203 0x4848 //RX_FDEQ_GAIN_7 +204 0x4848 //RX_FDEQ_GAIN_8 +205 0x4848 //RX_FDEQ_GAIN_9 +206 0x4848 //RX_FDEQ_GAIN_10 +207 0x4848 //RX_FDEQ_GAIN_11 +208 0x4848 //RX_FDEQ_GAIN_12 +209 0x4848 //RX_FDEQ_GAIN_13 +210 0x4848 //RX_FDEQ_GAIN_14 +211 0x4848 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0202 //RX_FDEQ_BIN_0 +221 0x0203 //RX_FDEQ_BIN_1 +222 0x0303 //RX_FDEQ_BIN_2 +223 0x0304 //RX_FDEQ_BIN_3 +224 0x0405 //RX_FDEQ_BIN_4 +225 0x0506 //RX_FDEQ_BIN_5 +226 0x0708 //RX_FDEQ_BIN_6 +227 0x090A //RX_FDEQ_BIN_7 +228 0x0B0C //RX_FDEQ_BIN_8 +229 0x0D08 //RX_FDEQ_BIN_9 +230 0x0000 //RX_FDEQ_BIN_10 +231 0x0000 //RX_FDEQ_BIN_11 +232 0x0000 //RX_FDEQ_BIN_12 +233 0x0000 //RX_FDEQ_BIN_13 +234 0x0000 //RX_FDEQ_BIN_14 +235 0x0000 //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x4000 //RX_FDEQ_RESRV_0 +245 0x0320 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0030 //RX_FDDRC_BAND_MARGIN_1 +248 0x0050 //RX_FDDRC_BAND_MARGIN_2 +249 0x0080 //RX_FDDRC_BAND_MARGIN_3 +250 0x0007 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x5000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x6400 //RX_FDDRC_THRD_3_2 +258 0x6400 //RX_FDDRC_THRD_3_3 +259 0x2000 //RX_FDDRC_SLANT_0_0 +260 0x2000 //RX_FDDRC_SLANT_0_1 +261 0x2000 //RX_FDDRC_SLANT_0_2 +262 0x2000 //RX_FDDRC_SLANT_0_3 +263 0x5333 //RX_FDDRC_SLANT_1_0 +264 0x5333 //RX_FDDRC_SLANT_1_1 +265 0x5333 //RX_FDDRC_SLANT_1_2 +266 0x5333 //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +286 0x0099 //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 +#VOL 6 +163 0x3000 //RX_TDDRC_ALPHA_UP_1 +164 0x3000 //RX_TDDRC_ALPHA_UP_2 +165 0x3000 //RX_TDDRC_ALPHA_UP_3 +166 0x3000 //RX_TDDRC_ALPHA_UP_4 +184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +190 0x7FFF //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +269 0x0000 //RX_TDDRC_THRD_0 +270 0x0000 //RX_TDDRC_THRD_1 +271 0x2000 //RX_TDDRC_THRD_2 +272 0x3000 //RX_TDDRC_THRD_3 +273 0x0800 //RX_TDDRC_SLANT_0 +274 0x7EB8 //RX_TDDRC_SLANT_1 +275 0x3000 //RX_TDDRC_ALPHA_UP_0 +276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x199A //RX_TDDRC_HMNC_GAIN +279 0x0001 //RX_TDDRC_SMT_FLAG +280 0x0CCD //RX_TDDRC_SMT_W +281 0x0200 //RX_TDDRC_DRC_GAIN +195 0x0014 //RX_FDEQ_SUBNUM +196 0x4848 //RX_FDEQ_GAIN_0 +197 0x4848 //RX_FDEQ_GAIN_1 +198 0x4848 //RX_FDEQ_GAIN_2 +199 0x4848 //RX_FDEQ_GAIN_3 +200 0x4848 //RX_FDEQ_GAIN_4 +201 0x4848 //RX_FDEQ_GAIN_5 +202 0x4848 //RX_FDEQ_GAIN_6 +203 0x4848 //RX_FDEQ_GAIN_7 +204 0x4848 //RX_FDEQ_GAIN_8 +205 0x4848 //RX_FDEQ_GAIN_9 +206 0x4848 //RX_FDEQ_GAIN_10 +207 0x4848 //RX_FDEQ_GAIN_11 +208 0x4848 //RX_FDEQ_GAIN_12 +209 0x4848 //RX_FDEQ_GAIN_13 +210 0x4848 //RX_FDEQ_GAIN_14 +211 0x4848 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0202 //RX_FDEQ_BIN_0 +221 0x0203 //RX_FDEQ_BIN_1 +222 0x0303 //RX_FDEQ_BIN_2 +223 0x0304 //RX_FDEQ_BIN_3 +224 0x0405 //RX_FDEQ_BIN_4 +225 0x0506 //RX_FDEQ_BIN_5 +226 0x0708 //RX_FDEQ_BIN_6 +227 0x090A //RX_FDEQ_BIN_7 +228 0x0B0C //RX_FDEQ_BIN_8 +229 0x0D08 //RX_FDEQ_BIN_9 +230 0x0000 //RX_FDEQ_BIN_10 +231 0x0000 //RX_FDEQ_BIN_11 +232 0x0000 //RX_FDEQ_BIN_12 +233 0x0000 //RX_FDEQ_BIN_13 +234 0x0000 //RX_FDEQ_BIN_14 +235 0x0000 //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x4000 //RX_FDEQ_RESRV_0 +245 0x0320 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0030 //RX_FDDRC_BAND_MARGIN_1 +248 0x0050 //RX_FDDRC_BAND_MARGIN_2 +249 0x0080 //RX_FDDRC_BAND_MARGIN_3 +250 0x0007 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x5000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x6400 //RX_FDDRC_THRD_3_2 +258 0x6400 //RX_FDDRC_THRD_3_3 +259 0x2000 //RX_FDDRC_SLANT_0_0 +260 0x2000 //RX_FDDRC_SLANT_0_1 +261 0x2000 //RX_FDDRC_SLANT_0_2 +262 0x2000 //RX_FDDRC_SLANT_0_3 +263 0x5333 //RX_FDDRC_SLANT_1_0 +264 0x5333 //RX_FDDRC_SLANT_1_1 +265 0x5333 //RX_FDDRC_SLANT_1_2 +266 0x5333 //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +286 0x0100 //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 #CASE_NAME HEADSET-GOOGLE_CONDOR-VOICE_GENERIC-WB -#PARAM_MODE FULL -#PARAM_TYPE TX+RX -#TOTAL_CUSTOM_STEP 7 +#PARAM_MODE Full +#PARAM_TYPE TX+2RX +#TOTAL_CUSTOM_STEP 7+7 #TX 0 0x0009 //TX_OPERATION_MODE_0 1 0x0008 //TX_OPERATION_MODE_1 @@ -9020,7 +13600,7 @@ 239 0x0800 //TX_DT_RESRV_7 240 0x0800 //TX_DT_RESRV_8 241 0x0000 //TX_DT_RESRV_9 -242 0xF400 //TX_THR_SN_EST_0 +242 0xFA00 //TX_THR_SN_EST_0 243 0xF400 //TX_THR_SN_EST_1 244 0xF600 //TX_THR_SN_EST_2 245 0xF400 //TX_THR_SN_EST_3 @@ -9029,20 +13609,20 @@ 248 0xF400 //TX_THR_SN_EST_6 249 0xF600 //TX_THR_SN_EST_7 250 0x0000 //TX_DELTA_THR_SN_EST_0 -251 0x0000 //TX_DELTA_THR_SN_EST_1 +251 0x0200 //TX_DELTA_THR_SN_EST_1 252 0x0200 //TX_DELTA_THR_SN_EST_2 253 0x0200 //TX_DELTA_THR_SN_EST_3 254 0x0200 //TX_DELTA_THR_SN_EST_4 255 0x0200 //TX_DELTA_THR_SN_EST_5 -256 0x0200 //TX_DELTA_THR_SN_EST_6 +256 0x0000 //TX_DELTA_THR_SN_EST_6 257 0x0200 //TX_DELTA_THR_SN_EST_7 258 0x6000 //TX_LAMBDA_NN_EST_0 -259 0x6000 //TX_LAMBDA_NN_EST_1 +259 0x4000 //TX_LAMBDA_NN_EST_1 260 0x4000 //TX_LAMBDA_NN_EST_2 261 0x4000 //TX_LAMBDA_NN_EST_3 262 0x4000 //TX_LAMBDA_NN_EST_4 263 0x4000 //TX_LAMBDA_NN_EST_5 -264 0x4000 //TX_LAMBDA_NN_EST_6 +264 0x6000 //TX_LAMBDA_NN_EST_6 265 0x4000 //TX_LAMBDA_NN_EST_7 266 0x0400 //TX_N_SN_EST 267 0x001E //TX_INBEAM_T @@ -9060,16 +13640,16 @@ 279 0x1000 //TX_B_POST_FLT_0 280 0x1000 //TX_B_POST_FLT_1 281 0x000F //TX_NS_LVL_CTRL_0 -282 0x000F //TX_NS_LVL_CTRL_1 -283 0x0011 //TX_NS_LVL_CTRL_2 +282 0x0011 //TX_NS_LVL_CTRL_1 +283 0x000F //TX_NS_LVL_CTRL_2 284 0x000F //TX_NS_LVL_CTRL_3 285 0x000F //TX_NS_LVL_CTRL_4 286 0x000F //TX_NS_LVL_CTRL_5 287 0x000F //TX_NS_LVL_CTRL_6 288 0x0011 //TX_NS_LVL_CTRL_7 289 0x000C //TX_MIN_GAIN_S_0 -290 0x000C //TX_MIN_GAIN_S_1 -291 0x000F //TX_MIN_GAIN_S_2 +290 0x000F //TX_MIN_GAIN_S_1 +291 0x000C //TX_MIN_GAIN_S_2 292 0x000C //TX_MIN_GAIN_S_3 293 0x000C //TX_MIN_GAIN_S_4 294 0x000C //TX_MIN_GAIN_S_5 @@ -9093,12 +13673,12 @@ 312 0x7FFF //TX_A_POST_FILT_0 313 0x2000 //TX_A_POST_FILT_1 314 0x4000 //TX_A_POST_FILT_S_0 -315 0x4000 //TX_A_POST_FILT_S_1 +315 0x5000 //TX_A_POST_FILT_S_1 316 0x5000 //TX_A_POST_FILT_S_2 317 0x5000 //TX_A_POST_FILT_S_3 318 0x5000 //TX_A_POST_FILT_S_4 319 0x5000 //TX_A_POST_FILT_S_5 -320 0x5000 //TX_A_POST_FILT_S_6 +320 0x4000 //TX_A_POST_FILT_S_6 321 0x5000 //TX_A_POST_FILT_S_7 322 0x1000 //TX_B_POST_FILT_0 323 0x1000 //TX_B_POST_FILT_1 @@ -9145,7 +13725,7 @@ 364 0x0000 //TX_K_APT 365 0x0001 //TX_NOISEDET 366 0x0190 //TX_NDETCT -367 0x0050 //TX_NOISE_TH_0 +367 0x0102 //TX_NOISE_TH_0 368 0x7FFF //TX_NOISE_TH_0_2 369 0x7FFF //TX_NOISE_TH_0_3 370 0x07D0 //TX_NOISE_TH_1 @@ -9157,11 +13737,11 @@ 376 0x7FFF //TX_NOISE_TH_5_3 377 0x7FFF //TX_NOISE_TH_5_4 378 0x044C //TX_NOISE_TH_6 -379 0x0014 //TX_MINENOISE_TH -380 0x4000 //TX_MINENOISE_MIC0_TH_MTS -381 0xFFEE //TX_MINENOISE_MIC0_TH_EXP -382 0x6000 //TX_MINENOISE_MIC0_S_TH_MTS -383 0xFFF3 //TX_MINENOISE_MIC0_S_TH_EXP +379 0x00F8 //TX_MINENOISE_TH +380 0xD508 //TX_MORENS_TFMASK_TH +381 0x0001 //TX_DRC_QUIET_FLOOR +382 0x3A98 //TX_RATIODTL_CUT_TH +383 0x0DAC //TX_DT_CUT_K1 384 0x0666 //TX_OUT_ENER_S_TH_CLEAN 385 0x0666 //TX_OUT_ENER_S_TH_LESSCLEAN 386 0x0333 //TX_OUT_ENER_S_TH_NOISY @@ -9169,22 +13749,22 @@ 388 0x0333 //TX_OUT_ENER_TH_SPEECH 389 0x2000 //TX_SN_NPB_GAIN 390 0x0000 //TX_NN_NPB_GAIN -391 0x0000 //TX_CSX_ALPHA_0 -392 0x0000 //TX_CSX_ALPHA_1 -393 0x0000 //TX_CSX_ALPHA_2 -394 0x0000 //TX_CSX_ALPHA_3 -395 0x0800 //TX_MU_ARSP_EST -396 0x00C8 //TX_P_OUTBEAM_MIN_TH +391 0x7FFF //TX_POST_MASK_SUP_HSNE +392 0x1388 //TX_TAIL_DET_TH +393 0x4000 //TX_B_LESSCUT_RTO_WTA +394 0x0000 //TX_MEL_G_R +395 0x0080 //TX_SUPHIGH_TH +396 0x0000 //TX_MASK_G_R 397 0x0002 //TX_EXTRA_NS_L -398 0x0800 //TX_EXTRA_NS_A -399 0x0005 //TX_VR_NOISE_FLOOR_TH +398 0x1800 //TX_C_POST_FLT_MASK +399 0x7FFF //TX_A_POST_FLT_WNS 400 0x0148 //TX_MIN_G_LOW300HZ 401 0x0002 //TX_MAXLEVEL_CNG 402 0x00B4 //TX_STN_NOISE_TH 403 0x4000 //TX_POST_MASK_SUP 404 0x7FFF //TX_POST_MASK_ADJUST 405 0x00C8 //TX_NS_ENOISE_MIC0_TH -406 0x0014 //TX_MINENOISE_MIC0_TH +406 0x00DC //TX_MINENOISE_MIC0_TH 407 0x012C //TX_MINENOISE_MIC0_S_TH 408 0x7FFF //TX_MIN_G_CTRL_SSNS 409 0x0000 //TX_METAL_RTO_THR @@ -9292,16 +13872,16 @@ 511 0x6666 //TX_MIC_TO_BFGAIN 512 0x0000 //TX_MICTOBFGAIN0 513 0x0000 //TX_FASTMUE_TH -514 0x0000 //TX_DERVB_LEN_0 -515 0x0000 //TX_DERVB_LEN_1 -516 0x0000 //TX_RHO_DERVB -517 0x0000 //TX_MIC_INDX_DERVB -518 0x0000 //TX_MU_DERVB -519 0x0000 //TX_DR_RESRV_0 -520 0x0000 //TX_DR_RESRV_1 -521 0x0000 //TX_DR_RESRV_2 -522 0x0000 //TX_DR_RESRV_3 -523 0x0000 //TX_DR_RESRV_4 +514 0xC000 //TX_DEREVERB_LF_MU +515 0xC000 //TX_DEREVERB_HF_MU +516 0xCCCC //TX_DEREVERB_DELAY +517 0xD999 //TX_DEREVERB_COEF_LEN +518 0x1F40 //TX_DEREVERB_DNR +519 0x0000 //TX_DEREVERB_ALPHA +520 0x0000 //TX_DEREVERB_BETA +521 0x0000 //TX_GSC_RTOL_TH +522 0x7000 //TX_GSC_RTOH_TH +523 0x0064 //TX_WIDE2_MEANHTH 524 0x0000 //TX_DR_RESRV_5 525 0x0000 //TX_DR_RESRV_6 526 0x0000 //TX_DR_RESRV_7 @@ -9669,14 +14249,79 @@ 888 0x00C8 //TX_FASTNS_ARSPC_TH 889 0xC000 //TX_FASTNS_MASK5_TH 890 0x4848 //TX_POSTSSA_MIN_G_VR_MASK -891 0x7FFF //TX_A_LESSCUT_RTO_MASK +891 0x4000 //TX_A_LESSCUT_RTO_MASK 892 0x1770 //TX_FASTNS_NOISETH 893 0xC000 //TX_FASTNS_SSA_THLFL 894 0xC000 //TX_FASTNS_SSA_THHFL 895 0xCCCC //TX_FASTNS_SSA_THLFH 896 0xD999 //TX_FASTNS_SSA_THHFH +897 0x2339 //TX_SENDFUNC_REG_MICMUTE +898 0x0021 //TX_SENDFUNC_REG_MICMUTE1 +899 0x02BC //TX_MICMUTE_RATIO_THR +900 0x0140 //TX_MICMUTE_AMP_THR +901 0x0004 //TX_MICMUTE_HPF_IND +902 0x00C0 //TX_MICMUTE_LOG_EYR_TH +903 0x0008 //TX_MICMUTE_CVG_TIME +904 0x0008 //TX_MICMUTE_RELEASE_TIME +905 0x01FE //TX_MIC_VOLUME_MIC0MUTE +906 0x0020 //TX_MICMUTE_EPD_OFFSET_0 +907 0x001E //TX_MICMUTE_FRQ_AEC_L +908 0x7999 //TX_MICMUTE_EAD_THR +909 0x7FFF //TX_MICMUTE_LAMBDA_CB_NLE +910 0x7FFF //TX_MICMUTE_LAMBDA_RE_EST +911 0x4000 //TX_DTD_THR1_MICMUTE_0 +912 0x7000 //TX_DTD_THR1_MICMUTE_1 +913 0x7FFF //TX_DTD_THR1_MICMUTE_2 +914 0x7FFF //TX_DTD_THR1_MICMUTE_3 +915 0x6CCC //TX_DTD_THR2_MICMUTE_0 +916 0x0400 //TX_MICMUTE_MIN_EQ_RE_EST_0 +917 0x0400 //TX_MICMUTE_MIN_EQ_RE_EST_1 +918 0x1000 //TX_MICMUTE_MIN_EQ_RE_EST_2 +919 0x7FFF //TX_MICMUTE_MIN_EQ_RE_EST_3 +920 0x7FFF //TX_MICMUTE_MIN_EQ_RE_EST_4 +921 0x4000 //TX_MICMUTE_C_POST_FLT +922 0x03E8 //TX_MICMUTE_DT_CUT_K +923 0x0001 //TX_MICMUTE_DT_CUT_THR +924 0x03E8 //TX_MICMUTE_DT_CUT_K2 +925 0x0001 //TX_MICMUTE_DT_CUT_THR2 +926 0x0064 //TX_MICMUTE_DT2_HOLD_N +927 0x1000 //TX_MICMUTE_RATIODTH_THCUT +928 0x1000 //TX_MICMUTE_B_POST_FLT_ECHOL +929 0x7FFF //TX_MICMUTE_B_POST_FLT_ECHOH +930 0x0400 //TX_MICMUTE_C_POST_FLT_MASK +931 0x7999 //TX_MICMUTE_RATIODTL_CUT_TH +932 0x0258 //TX_MICMUTE_DT_CUT_K1 +933 0x0800 //TX_MICMUTE_N2_SN_EST +934 0xFC00 //TX_MICMUTE_THR_SN_EST_0 +935 0x001C //TX_MICMUTE_MIN_G_CTRL_0 +936 0x6000 //TX_MICMUTE_A_POST_FILT_S_0 +937 0x7000 //TX_MICMUTE_B_POST_FILT_0 +938 0x2710 //TX_MIC1RUB_AMP_THR +939 0x0010 //TX_MIC1MUTE_RATIO_THR +940 0x0450 //TX_MIC1MUTE_AMP_THR +941 0x0008 //TX_MIC1MUTE_CVG_TIME +942 0x0008 //TX_MIC1MUTE_RELEASE_TIME +943 0x0000 //TX_AMS_RESRV_01 +944 0x0000 //TX_AMS_RESRV_02 +945 0x0000 //TX_AMS_RESRV_03 +946 0x0000 //TX_AMS_RESRV_04 +947 0x0000 //TX_AMS_RESRV_05 +948 0x0000 //TX_AMS_RESRV_06 +949 0x0000 //TX_AMS_RESRV_07 +950 0x0000 //TX_AMS_RESRV_08 +951 0x0000 //TX_AMS_RESRV_09 +952 0x0000 //TX_AMS_RESRV_10 +953 0x0000 //TX_AMS_RESRV_11 +954 0x0000 //TX_AMS_RESRV_12 +955 0x0000 //TX_AMS_RESRV_13 +956 0x0000 //TX_AMS_RESRV_14 +957 0x0000 //TX_AMS_RESRV_15 +958 0x0000 //TX_AMS_RESRV_16 +959 0x0000 //TX_AMS_RESRV_17 +960 0x0000 //TX_AMS_RESRV_18 +961 0x0000 //TX_AMS_RESRV_19 #RX -0 0x002C //RX_RECVFUNC_MODE_0 +0 0x202C //RX_RECVFUNC_MODE_0 1 0x0000 //RX_RECVFUNC_MODE_1 2 0x0001 //RX_SAMPLINGFREQ_SIG 3 0x0001 //RX_SAMPLINGFREQ_PROC @@ -10526,11 +15171,862 @@ 110 0x0000 //RX_FDDRC_RESRV_0 129 0x0100 //RX_SPK_VOL 130 0x0000 //RX_VOL_RESRV_0 +#RX 2 +157 0x202C //RX_RECVFUNC_MODE_0 +158 0x0000 //RX_RECVFUNC_MODE_1 +159 0x0001 //RX_SAMPLINGFREQ_SIG +160 0x0001 //RX_SAMPLINGFREQ_PROC +161 0x000A //RX_FRAME_SZ +162 0x0000 //RX_DELAY_OPT +163 0x3000 //RX_TDDRC_ALPHA_UP_1 +164 0x3000 //RX_TDDRC_ALPHA_UP_2 +165 0x3000 //RX_TDDRC_ALPHA_UP_3 +166 0x3000 //RX_TDDRC_ALPHA_UP_4 +167 0x0800 //RX_PGA +168 0x7FFF //RX_A_HP +169 0x4000 //RX_B_PE +170 0x3800 //RX_THR_PITCH_DET_0 +171 0x3000 //RX_THR_PITCH_DET_1 +172 0x2800 //RX_THR_PITCH_DET_2 +173 0x0008 //RX_PITCH_BFR_LEN +174 0x0003 //RX_SBD_PITCH_DET +175 0x0100 //RX_PP_RESRV_0 +176 0x0020 //RX_PP_RESRV_1 +177 0x0600 //RX_N_SN_EST +178 0x000C //RX_N2_SN_EST +179 0x0010 //RX_NS_LVL_CTRL +180 0xF800 //RX_THR_SN_EST +181 0x7CCD //RX_LAMBDA_PFILT +182 0x000A //RX_FENS_RESRV_0 +183 0x0190 //RX_FENS_RESRV_1 +184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +187 0x0002 //RX_EXTRA_NS_L +188 0x0800 //RX_EXTRA_NS_A +189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +190 0x7FFF //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +192 0x199A //RX_A_POST_FLT +193 0x0000 //RX_LMT_THRD +194 0x4000 //RX_LMT_ALPHA +195 0x001C //RX_FDEQ_SUBNUM +196 0x4848 //RX_FDEQ_GAIN_0 +197 0x4848 //RX_FDEQ_GAIN_1 +198 0x4848 //RX_FDEQ_GAIN_2 +199 0x4848 //RX_FDEQ_GAIN_3 +200 0x4848 //RX_FDEQ_GAIN_4 +201 0x4848 //RX_FDEQ_GAIN_5 +202 0x4848 //RX_FDEQ_GAIN_6 +203 0x4848 //RX_FDEQ_GAIN_7 +204 0x4848 //RX_FDEQ_GAIN_8 +205 0x4848 //RX_FDEQ_GAIN_9 +206 0x4848 //RX_FDEQ_GAIN_10 +207 0x4848 //RX_FDEQ_GAIN_11 +208 0x4848 //RX_FDEQ_GAIN_12 +209 0x4848 //RX_FDEQ_GAIN_13 +210 0x4848 //RX_FDEQ_GAIN_14 +211 0x4848 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0202 //RX_FDEQ_BIN_0 +221 0x0203 //RX_FDEQ_BIN_1 +222 0x0303 //RX_FDEQ_BIN_2 +223 0x0304 //RX_FDEQ_BIN_3 +224 0x0405 //RX_FDEQ_BIN_4 +225 0x0506 //RX_FDEQ_BIN_5 +226 0x0708 //RX_FDEQ_BIN_6 +227 0x090A //RX_FDEQ_BIN_7 +228 0x0B0C //RX_FDEQ_BIN_8 +229 0x0D0E //RX_FDEQ_BIN_9 +230 0x0E0F //RX_FDEQ_BIN_10 +231 0x0F10 //RX_FDEQ_BIN_11 +232 0x1011 //RX_FDEQ_BIN_12 +233 0x1104 //RX_FDEQ_BIN_13 +234 0x0000 //RX_FDEQ_BIN_14 +235 0x0000 //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x4000 //RX_FDEQ_RESRV_0 +245 0x0320 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0030 //RX_FDDRC_BAND_MARGIN_1 +248 0x0050 //RX_FDDRC_BAND_MARGIN_2 +249 0x0080 //RX_FDDRC_BAND_MARGIN_3 +250 0x0007 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x5000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x6400 //RX_FDDRC_THRD_3_2 +258 0x6400 //RX_FDDRC_THRD_3_3 +259 0x2000 //RX_FDDRC_SLANT_0_0 +260 0x2000 //RX_FDDRC_SLANT_0_1 +261 0x2000 //RX_FDDRC_SLANT_0_2 +262 0x2000 //RX_FDDRC_SLANT_0_3 +263 0x5333 //RX_FDDRC_SLANT_1_0 +264 0x5333 //RX_FDDRC_SLANT_1_1 +265 0x5333 //RX_FDDRC_SLANT_1_2 +266 0x5333 //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +268 0x0002 //RX_FILTINDX +269 0x0000 //RX_TDDRC_THRD_0 +270 0x0000 //RX_TDDRC_THRD_1 +271 0x2000 //RX_TDDRC_THRD_2 +272 0x3000 //RX_TDDRC_THRD_3 +273 0x0800 //RX_TDDRC_SLANT_0 +274 0x7EB8 //RX_TDDRC_SLANT_1 +275 0x3000 //RX_TDDRC_ALPHA_UP_0 +276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x199A //RX_TDDRC_HMNC_GAIN +279 0x0001 //RX_TDDRC_SMT_FLAG +280 0x0CCD //RX_TDDRC_SMT_W +281 0x0196 //RX_TDDRC_DRC_GAIN +282 0x7C00 //RX_LAMBDA_PKA_FP +283 0x2000 //RX_TPKA_FP +284 0x2000 //RX_MIN_G_FP +285 0x0080 //RX_MAX_G_FP +286 0x000B //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 +288 0x0000 //RX_MAXLEVEL_CNG +289 0x3000 //RX_BWE_UV_TH +290 0x3000 //RX_BWE_UV_TH2 +291 0x1800 //RX_BWE_UV_TH3 +292 0x1000 //RX_BWE_V_TH +293 0x04CD //RX_BWE_GAIN1_V_TH1 +294 0x0F33 //RX_BWE_GAIN1_V_TH2 +295 0x7333 //RX_BWE_UV_EQ +296 0x199A //RX_BWE_V_EQ +297 0x7333 //RX_BWE_TONE_TH +298 0x0004 //RX_BWE_UV_HOLD_T +299 0x6CCD //RX_BWE_GAIN2_ALPHA +300 0x799A //RX_BWE_GAIN3_ALPHA +301 0x001E //RX_BWE_CUTOFF +302 0x3000 //RX_BWE_GAINFILL +303 0x3200 //RX_BWE_MAXTH_TONE +304 0x2000 //RX_BWE_EQ_0 +305 0x2000 //RX_BWE_EQ_1 +306 0x2000 //RX_BWE_EQ_2 +307 0x2000 //RX_BWE_EQ_3 +308 0x2000 //RX_BWE_EQ_4 +309 0x2000 //RX_BWE_EQ_5 +310 0x2000 //RX_BWE_EQ_6 +311 0x0000 //RX_BWE_RESRV_0 +312 0x0000 //RX_BWE_RESRV_1 +313 0x0000 //RX_BWE_RESRV_2 +#VOL 0 +163 0x3000 //RX_TDDRC_ALPHA_UP_1 +164 0x3000 //RX_TDDRC_ALPHA_UP_2 +165 0x3000 //RX_TDDRC_ALPHA_UP_3 +166 0x3000 //RX_TDDRC_ALPHA_UP_4 +184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +190 0x7FFF //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +269 0x0000 //RX_TDDRC_THRD_0 +270 0x0000 //RX_TDDRC_THRD_1 +271 0x2000 //RX_TDDRC_THRD_2 +272 0x3000 //RX_TDDRC_THRD_3 +273 0x0800 //RX_TDDRC_SLANT_0 +274 0x7EB8 //RX_TDDRC_SLANT_1 +275 0x3000 //RX_TDDRC_ALPHA_UP_0 +276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x199A //RX_TDDRC_HMNC_GAIN +279 0x0001 //RX_TDDRC_SMT_FLAG +280 0x0CCD //RX_TDDRC_SMT_W +281 0x0196 //RX_TDDRC_DRC_GAIN +195 0x001C //RX_FDEQ_SUBNUM +196 0x4848 //RX_FDEQ_GAIN_0 +197 0x4848 //RX_FDEQ_GAIN_1 +198 0x4848 //RX_FDEQ_GAIN_2 +199 0x4848 //RX_FDEQ_GAIN_3 +200 0x4848 //RX_FDEQ_GAIN_4 +201 0x4848 //RX_FDEQ_GAIN_5 +202 0x4848 //RX_FDEQ_GAIN_6 +203 0x4848 //RX_FDEQ_GAIN_7 +204 0x4848 //RX_FDEQ_GAIN_8 +205 0x4848 //RX_FDEQ_GAIN_9 +206 0x4848 //RX_FDEQ_GAIN_10 +207 0x4848 //RX_FDEQ_GAIN_11 +208 0x4848 //RX_FDEQ_GAIN_12 +209 0x4848 //RX_FDEQ_GAIN_13 +210 0x4848 //RX_FDEQ_GAIN_14 +211 0x4848 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0202 //RX_FDEQ_BIN_0 +221 0x0203 //RX_FDEQ_BIN_1 +222 0x0303 //RX_FDEQ_BIN_2 +223 0x0304 //RX_FDEQ_BIN_3 +224 0x0405 //RX_FDEQ_BIN_4 +225 0x0506 //RX_FDEQ_BIN_5 +226 0x0708 //RX_FDEQ_BIN_6 +227 0x090A //RX_FDEQ_BIN_7 +228 0x0B0C //RX_FDEQ_BIN_8 +229 0x0D0E //RX_FDEQ_BIN_9 +230 0x0E0F //RX_FDEQ_BIN_10 +231 0x0F10 //RX_FDEQ_BIN_11 +232 0x1011 //RX_FDEQ_BIN_12 +233 0x1104 //RX_FDEQ_BIN_13 +234 0x0000 //RX_FDEQ_BIN_14 +235 0x0000 //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x4000 //RX_FDEQ_RESRV_0 +245 0x0320 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0030 //RX_FDDRC_BAND_MARGIN_1 +248 0x0050 //RX_FDDRC_BAND_MARGIN_2 +249 0x0080 //RX_FDDRC_BAND_MARGIN_3 +250 0x0007 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x5000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x6400 //RX_FDDRC_THRD_3_2 +258 0x6400 //RX_FDDRC_THRD_3_3 +259 0x2000 //RX_FDDRC_SLANT_0_0 +260 0x2000 //RX_FDDRC_SLANT_0_1 +261 0x2000 //RX_FDDRC_SLANT_0_2 +262 0x2000 //RX_FDDRC_SLANT_0_3 +263 0x5333 //RX_FDDRC_SLANT_1_0 +264 0x5333 //RX_FDDRC_SLANT_1_1 +265 0x5333 //RX_FDDRC_SLANT_1_2 +266 0x5333 //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +286 0x000B //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 +#VOL 1 +163 0x3000 //RX_TDDRC_ALPHA_UP_1 +164 0x3000 //RX_TDDRC_ALPHA_UP_2 +165 0x3000 //RX_TDDRC_ALPHA_UP_3 +166 0x3000 //RX_TDDRC_ALPHA_UP_4 +184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +190 0x7FFF //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +269 0x0000 //RX_TDDRC_THRD_0 +270 0x0000 //RX_TDDRC_THRD_1 +271 0x2000 //RX_TDDRC_THRD_2 +272 0x3000 //RX_TDDRC_THRD_3 +273 0x0800 //RX_TDDRC_SLANT_0 +274 0x7EB8 //RX_TDDRC_SLANT_1 +275 0x3000 //RX_TDDRC_ALPHA_UP_0 +276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x199A //RX_TDDRC_HMNC_GAIN +279 0x0001 //RX_TDDRC_SMT_FLAG +280 0x0CCD //RX_TDDRC_SMT_W +281 0x0196 //RX_TDDRC_DRC_GAIN +195 0x001C //RX_FDEQ_SUBNUM +196 0x4848 //RX_FDEQ_GAIN_0 +197 0x4848 //RX_FDEQ_GAIN_1 +198 0x4848 //RX_FDEQ_GAIN_2 +199 0x4848 //RX_FDEQ_GAIN_3 +200 0x4848 //RX_FDEQ_GAIN_4 +201 0x4848 //RX_FDEQ_GAIN_5 +202 0x4848 //RX_FDEQ_GAIN_6 +203 0x4848 //RX_FDEQ_GAIN_7 +204 0x4848 //RX_FDEQ_GAIN_8 +205 0x4848 //RX_FDEQ_GAIN_9 +206 0x4848 //RX_FDEQ_GAIN_10 +207 0x4848 //RX_FDEQ_GAIN_11 +208 0x4848 //RX_FDEQ_GAIN_12 +209 0x4848 //RX_FDEQ_GAIN_13 +210 0x4848 //RX_FDEQ_GAIN_14 +211 0x4848 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0202 //RX_FDEQ_BIN_0 +221 0x0203 //RX_FDEQ_BIN_1 +222 0x0303 //RX_FDEQ_BIN_2 +223 0x0304 //RX_FDEQ_BIN_3 +224 0x0405 //RX_FDEQ_BIN_4 +225 0x0506 //RX_FDEQ_BIN_5 +226 0x0708 //RX_FDEQ_BIN_6 +227 0x090A //RX_FDEQ_BIN_7 +228 0x0B0C //RX_FDEQ_BIN_8 +229 0x0D0E //RX_FDEQ_BIN_9 +230 0x0E0F //RX_FDEQ_BIN_10 +231 0x0F10 //RX_FDEQ_BIN_11 +232 0x1011 //RX_FDEQ_BIN_12 +233 0x1104 //RX_FDEQ_BIN_13 +234 0x0000 //RX_FDEQ_BIN_14 +235 0x0000 //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x4000 //RX_FDEQ_RESRV_0 +245 0x0320 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0030 //RX_FDDRC_BAND_MARGIN_1 +248 0x0050 //RX_FDDRC_BAND_MARGIN_2 +249 0x0080 //RX_FDDRC_BAND_MARGIN_3 +250 0x0007 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x5000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x6400 //RX_FDDRC_THRD_3_2 +258 0x6400 //RX_FDDRC_THRD_3_3 +259 0x2000 //RX_FDDRC_SLANT_0_0 +260 0x2000 //RX_FDDRC_SLANT_0_1 +261 0x2000 //RX_FDDRC_SLANT_0_2 +262 0x2000 //RX_FDDRC_SLANT_0_3 +263 0x5333 //RX_FDDRC_SLANT_1_0 +264 0x5333 //RX_FDDRC_SLANT_1_1 +265 0x5333 //RX_FDDRC_SLANT_1_2 +266 0x5333 //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +286 0x0013 //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 +#VOL 2 +163 0x3000 //RX_TDDRC_ALPHA_UP_1 +164 0x3000 //RX_TDDRC_ALPHA_UP_2 +165 0x3000 //RX_TDDRC_ALPHA_UP_3 +166 0x3000 //RX_TDDRC_ALPHA_UP_4 +184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +190 0x7FFF //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +269 0x0000 //RX_TDDRC_THRD_0 +270 0x0000 //RX_TDDRC_THRD_1 +271 0x2000 //RX_TDDRC_THRD_2 +272 0x3000 //RX_TDDRC_THRD_3 +273 0x0800 //RX_TDDRC_SLANT_0 +274 0x7EB8 //RX_TDDRC_SLANT_1 +275 0x3000 //RX_TDDRC_ALPHA_UP_0 +276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x199A //RX_TDDRC_HMNC_GAIN +279 0x0001 //RX_TDDRC_SMT_FLAG +280 0x0CCD //RX_TDDRC_SMT_W +281 0x0196 //RX_TDDRC_DRC_GAIN +195 0x001C //RX_FDEQ_SUBNUM +196 0x4848 //RX_FDEQ_GAIN_0 +197 0x4848 //RX_FDEQ_GAIN_1 +198 0x4848 //RX_FDEQ_GAIN_2 +199 0x4848 //RX_FDEQ_GAIN_3 +200 0x4848 //RX_FDEQ_GAIN_4 +201 0x4848 //RX_FDEQ_GAIN_5 +202 0x4848 //RX_FDEQ_GAIN_6 +203 0x4848 //RX_FDEQ_GAIN_7 +204 0x4848 //RX_FDEQ_GAIN_8 +205 0x4848 //RX_FDEQ_GAIN_9 +206 0x4848 //RX_FDEQ_GAIN_10 +207 0x4848 //RX_FDEQ_GAIN_11 +208 0x4848 //RX_FDEQ_GAIN_12 +209 0x4848 //RX_FDEQ_GAIN_13 +210 0x4848 //RX_FDEQ_GAIN_14 +211 0x4848 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0202 //RX_FDEQ_BIN_0 +221 0x0203 //RX_FDEQ_BIN_1 +222 0x0303 //RX_FDEQ_BIN_2 +223 0x0304 //RX_FDEQ_BIN_3 +224 0x0405 //RX_FDEQ_BIN_4 +225 0x0506 //RX_FDEQ_BIN_5 +226 0x0708 //RX_FDEQ_BIN_6 +227 0x090A //RX_FDEQ_BIN_7 +228 0x0B0C //RX_FDEQ_BIN_8 +229 0x0D0E //RX_FDEQ_BIN_9 +230 0x0E0F //RX_FDEQ_BIN_10 +231 0x0F10 //RX_FDEQ_BIN_11 +232 0x1011 //RX_FDEQ_BIN_12 +233 0x1104 //RX_FDEQ_BIN_13 +234 0x0000 //RX_FDEQ_BIN_14 +235 0x0000 //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x4000 //RX_FDEQ_RESRV_0 +245 0x0320 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0030 //RX_FDDRC_BAND_MARGIN_1 +248 0x0050 //RX_FDDRC_BAND_MARGIN_2 +249 0x0080 //RX_FDDRC_BAND_MARGIN_3 +250 0x0007 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x5000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x6400 //RX_FDDRC_THRD_3_2 +258 0x6400 //RX_FDDRC_THRD_3_3 +259 0x2000 //RX_FDDRC_SLANT_0_0 +260 0x2000 //RX_FDDRC_SLANT_0_1 +261 0x2000 //RX_FDDRC_SLANT_0_2 +262 0x2000 //RX_FDDRC_SLANT_0_3 +263 0x5333 //RX_FDDRC_SLANT_1_0 +264 0x5333 //RX_FDDRC_SLANT_1_1 +265 0x5333 //RX_FDDRC_SLANT_1_2 +266 0x5333 //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +286 0x0020 //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 +#VOL 3 +163 0x3000 //RX_TDDRC_ALPHA_UP_1 +164 0x3000 //RX_TDDRC_ALPHA_UP_2 +165 0x3000 //RX_TDDRC_ALPHA_UP_3 +166 0x3000 //RX_TDDRC_ALPHA_UP_4 +184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +190 0x7FFF //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +269 0x0000 //RX_TDDRC_THRD_0 +270 0x0000 //RX_TDDRC_THRD_1 +271 0x2000 //RX_TDDRC_THRD_2 +272 0x3000 //RX_TDDRC_THRD_3 +273 0x0800 //RX_TDDRC_SLANT_0 +274 0x7EB8 //RX_TDDRC_SLANT_1 +275 0x3000 //RX_TDDRC_ALPHA_UP_0 +276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x199A //RX_TDDRC_HMNC_GAIN +279 0x0001 //RX_TDDRC_SMT_FLAG +280 0x0CCD //RX_TDDRC_SMT_W +281 0x0196 //RX_TDDRC_DRC_GAIN +195 0x001C //RX_FDEQ_SUBNUM +196 0x4848 //RX_FDEQ_GAIN_0 +197 0x4848 //RX_FDEQ_GAIN_1 +198 0x4848 //RX_FDEQ_GAIN_2 +199 0x4848 //RX_FDEQ_GAIN_3 +200 0x4848 //RX_FDEQ_GAIN_4 +201 0x4848 //RX_FDEQ_GAIN_5 +202 0x4848 //RX_FDEQ_GAIN_6 +203 0x4848 //RX_FDEQ_GAIN_7 +204 0x4848 //RX_FDEQ_GAIN_8 +205 0x4848 //RX_FDEQ_GAIN_9 +206 0x4848 //RX_FDEQ_GAIN_10 +207 0x4848 //RX_FDEQ_GAIN_11 +208 0x4848 //RX_FDEQ_GAIN_12 +209 0x4848 //RX_FDEQ_GAIN_13 +210 0x4848 //RX_FDEQ_GAIN_14 +211 0x4848 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0202 //RX_FDEQ_BIN_0 +221 0x0203 //RX_FDEQ_BIN_1 +222 0x0303 //RX_FDEQ_BIN_2 +223 0x0304 //RX_FDEQ_BIN_3 +224 0x0405 //RX_FDEQ_BIN_4 +225 0x0506 //RX_FDEQ_BIN_5 +226 0x0708 //RX_FDEQ_BIN_6 +227 0x090A //RX_FDEQ_BIN_7 +228 0x0B0C //RX_FDEQ_BIN_8 +229 0x0D0E //RX_FDEQ_BIN_9 +230 0x0E0F //RX_FDEQ_BIN_10 +231 0x0F10 //RX_FDEQ_BIN_11 +232 0x1011 //RX_FDEQ_BIN_12 +233 0x1104 //RX_FDEQ_BIN_13 +234 0x0000 //RX_FDEQ_BIN_14 +235 0x0000 //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x4000 //RX_FDEQ_RESRV_0 +245 0x0320 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0030 //RX_FDDRC_BAND_MARGIN_1 +248 0x0050 //RX_FDDRC_BAND_MARGIN_2 +249 0x0080 //RX_FDDRC_BAND_MARGIN_3 +250 0x0007 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x5000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x6400 //RX_FDDRC_THRD_3_2 +258 0x6400 //RX_FDDRC_THRD_3_3 +259 0x2000 //RX_FDDRC_SLANT_0_0 +260 0x2000 //RX_FDDRC_SLANT_0_1 +261 0x2000 //RX_FDDRC_SLANT_0_2 +262 0x2000 //RX_FDDRC_SLANT_0_3 +263 0x5333 //RX_FDDRC_SLANT_1_0 +264 0x5333 //RX_FDDRC_SLANT_1_1 +265 0x5333 //RX_FDDRC_SLANT_1_2 +266 0x5333 //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +286 0x0036 //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 +#VOL 4 +163 0x3000 //RX_TDDRC_ALPHA_UP_1 +164 0x3000 //RX_TDDRC_ALPHA_UP_2 +165 0x3000 //RX_TDDRC_ALPHA_UP_3 +166 0x3000 //RX_TDDRC_ALPHA_UP_4 +184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +190 0x7FFF //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +269 0x0000 //RX_TDDRC_THRD_0 +270 0x0000 //RX_TDDRC_THRD_1 +271 0x2000 //RX_TDDRC_THRD_2 +272 0x3000 //RX_TDDRC_THRD_3 +273 0x0800 //RX_TDDRC_SLANT_0 +274 0x7EB8 //RX_TDDRC_SLANT_1 +275 0x3000 //RX_TDDRC_ALPHA_UP_0 +276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x199A //RX_TDDRC_HMNC_GAIN +279 0x0001 //RX_TDDRC_SMT_FLAG +280 0x0CCD //RX_TDDRC_SMT_W +281 0x0196 //RX_TDDRC_DRC_GAIN +195 0x001C //RX_FDEQ_SUBNUM +196 0x4848 //RX_FDEQ_GAIN_0 +197 0x4848 //RX_FDEQ_GAIN_1 +198 0x4848 //RX_FDEQ_GAIN_2 +199 0x4848 //RX_FDEQ_GAIN_3 +200 0x4848 //RX_FDEQ_GAIN_4 +201 0x4848 //RX_FDEQ_GAIN_5 +202 0x4848 //RX_FDEQ_GAIN_6 +203 0x4848 //RX_FDEQ_GAIN_7 +204 0x4848 //RX_FDEQ_GAIN_8 +205 0x4848 //RX_FDEQ_GAIN_9 +206 0x4848 //RX_FDEQ_GAIN_10 +207 0x4848 //RX_FDEQ_GAIN_11 +208 0x4848 //RX_FDEQ_GAIN_12 +209 0x4848 //RX_FDEQ_GAIN_13 +210 0x4848 //RX_FDEQ_GAIN_14 +211 0x4848 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0202 //RX_FDEQ_BIN_0 +221 0x0203 //RX_FDEQ_BIN_1 +222 0x0303 //RX_FDEQ_BIN_2 +223 0x0304 //RX_FDEQ_BIN_3 +224 0x0405 //RX_FDEQ_BIN_4 +225 0x0506 //RX_FDEQ_BIN_5 +226 0x0708 //RX_FDEQ_BIN_6 +227 0x090A //RX_FDEQ_BIN_7 +228 0x0B0C //RX_FDEQ_BIN_8 +229 0x0D0E //RX_FDEQ_BIN_9 +230 0x0E0F //RX_FDEQ_BIN_10 +231 0x0F10 //RX_FDEQ_BIN_11 +232 0x1011 //RX_FDEQ_BIN_12 +233 0x1104 //RX_FDEQ_BIN_13 +234 0x0000 //RX_FDEQ_BIN_14 +235 0x0000 //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x4000 //RX_FDEQ_RESRV_0 +245 0x0320 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0030 //RX_FDDRC_BAND_MARGIN_1 +248 0x0050 //RX_FDDRC_BAND_MARGIN_2 +249 0x0080 //RX_FDDRC_BAND_MARGIN_3 +250 0x0007 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x5000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x6400 //RX_FDDRC_THRD_3_2 +258 0x6400 //RX_FDDRC_THRD_3_3 +259 0x2000 //RX_FDDRC_SLANT_0_0 +260 0x2000 //RX_FDDRC_SLANT_0_1 +261 0x2000 //RX_FDDRC_SLANT_0_2 +262 0x2000 //RX_FDDRC_SLANT_0_3 +263 0x5333 //RX_FDDRC_SLANT_1_0 +264 0x5333 //RX_FDDRC_SLANT_1_1 +265 0x5333 //RX_FDDRC_SLANT_1_2 +266 0x5333 //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +286 0x005B //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 +#VOL 5 +163 0x3000 //RX_TDDRC_ALPHA_UP_1 +164 0x3000 //RX_TDDRC_ALPHA_UP_2 +165 0x3000 //RX_TDDRC_ALPHA_UP_3 +166 0x3000 //RX_TDDRC_ALPHA_UP_4 +184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +190 0x7FFF //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +269 0x0000 //RX_TDDRC_THRD_0 +270 0x0000 //RX_TDDRC_THRD_1 +271 0x2000 //RX_TDDRC_THRD_2 +272 0x3000 //RX_TDDRC_THRD_3 +273 0x0800 //RX_TDDRC_SLANT_0 +274 0x7EB8 //RX_TDDRC_SLANT_1 +275 0x3000 //RX_TDDRC_ALPHA_UP_0 +276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x199A //RX_TDDRC_HMNC_GAIN +279 0x0001 //RX_TDDRC_SMT_FLAG +280 0x0CCD //RX_TDDRC_SMT_W +281 0x0196 //RX_TDDRC_DRC_GAIN +195 0x001C //RX_FDEQ_SUBNUM +196 0x4848 //RX_FDEQ_GAIN_0 +197 0x4848 //RX_FDEQ_GAIN_1 +198 0x4848 //RX_FDEQ_GAIN_2 +199 0x4848 //RX_FDEQ_GAIN_3 +200 0x4848 //RX_FDEQ_GAIN_4 +201 0x4848 //RX_FDEQ_GAIN_5 +202 0x4848 //RX_FDEQ_GAIN_6 +203 0x4848 //RX_FDEQ_GAIN_7 +204 0x4848 //RX_FDEQ_GAIN_8 +205 0x4848 //RX_FDEQ_GAIN_9 +206 0x4848 //RX_FDEQ_GAIN_10 +207 0x4848 //RX_FDEQ_GAIN_11 +208 0x4848 //RX_FDEQ_GAIN_12 +209 0x4848 //RX_FDEQ_GAIN_13 +210 0x4848 //RX_FDEQ_GAIN_14 +211 0x4848 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0202 //RX_FDEQ_BIN_0 +221 0x0203 //RX_FDEQ_BIN_1 +222 0x0303 //RX_FDEQ_BIN_2 +223 0x0304 //RX_FDEQ_BIN_3 +224 0x0405 //RX_FDEQ_BIN_4 +225 0x0506 //RX_FDEQ_BIN_5 +226 0x0708 //RX_FDEQ_BIN_6 +227 0x090A //RX_FDEQ_BIN_7 +228 0x0B0C //RX_FDEQ_BIN_8 +229 0x0D0E //RX_FDEQ_BIN_9 +230 0x0E0F //RX_FDEQ_BIN_10 +231 0x0F10 //RX_FDEQ_BIN_11 +232 0x1011 //RX_FDEQ_BIN_12 +233 0x1104 //RX_FDEQ_BIN_13 +234 0x0000 //RX_FDEQ_BIN_14 +235 0x0000 //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x4000 //RX_FDEQ_RESRV_0 +245 0x0320 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0030 //RX_FDDRC_BAND_MARGIN_1 +248 0x0050 //RX_FDDRC_BAND_MARGIN_2 +249 0x0080 //RX_FDDRC_BAND_MARGIN_3 +250 0x0007 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x5000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x6400 //RX_FDDRC_THRD_3_2 +258 0x6400 //RX_FDDRC_THRD_3_3 +259 0x2000 //RX_FDDRC_SLANT_0_0 +260 0x2000 //RX_FDDRC_SLANT_0_1 +261 0x2000 //RX_FDDRC_SLANT_0_2 +262 0x2000 //RX_FDDRC_SLANT_0_3 +263 0x5333 //RX_FDDRC_SLANT_1_0 +264 0x5333 //RX_FDDRC_SLANT_1_1 +265 0x5333 //RX_FDDRC_SLANT_1_2 +266 0x5333 //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +286 0x0099 //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 +#VOL 6 +163 0x3000 //RX_TDDRC_ALPHA_UP_1 +164 0x3000 //RX_TDDRC_ALPHA_UP_2 +165 0x3000 //RX_TDDRC_ALPHA_UP_3 +166 0x3000 //RX_TDDRC_ALPHA_UP_4 +184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +190 0x7FFF //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +269 0x0000 //RX_TDDRC_THRD_0 +270 0x0000 //RX_TDDRC_THRD_1 +271 0x2000 //RX_TDDRC_THRD_2 +272 0x3000 //RX_TDDRC_THRD_3 +273 0x0800 //RX_TDDRC_SLANT_0 +274 0x7EB8 //RX_TDDRC_SLANT_1 +275 0x3000 //RX_TDDRC_ALPHA_UP_0 +276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x199A //RX_TDDRC_HMNC_GAIN +279 0x0001 //RX_TDDRC_SMT_FLAG +280 0x0CCD //RX_TDDRC_SMT_W +281 0x0196 //RX_TDDRC_DRC_GAIN +195 0x001C //RX_FDEQ_SUBNUM +196 0x4848 //RX_FDEQ_GAIN_0 +197 0x4848 //RX_FDEQ_GAIN_1 +198 0x4848 //RX_FDEQ_GAIN_2 +199 0x4848 //RX_FDEQ_GAIN_3 +200 0x4848 //RX_FDEQ_GAIN_4 +201 0x4848 //RX_FDEQ_GAIN_5 +202 0x4848 //RX_FDEQ_GAIN_6 +203 0x4848 //RX_FDEQ_GAIN_7 +204 0x4848 //RX_FDEQ_GAIN_8 +205 0x4848 //RX_FDEQ_GAIN_9 +206 0x4848 //RX_FDEQ_GAIN_10 +207 0x4848 //RX_FDEQ_GAIN_11 +208 0x4848 //RX_FDEQ_GAIN_12 +209 0x4848 //RX_FDEQ_GAIN_13 +210 0x4848 //RX_FDEQ_GAIN_14 +211 0x4848 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0202 //RX_FDEQ_BIN_0 +221 0x0203 //RX_FDEQ_BIN_1 +222 0x0303 //RX_FDEQ_BIN_2 +223 0x0304 //RX_FDEQ_BIN_3 +224 0x0405 //RX_FDEQ_BIN_4 +225 0x0506 //RX_FDEQ_BIN_5 +226 0x0708 //RX_FDEQ_BIN_6 +227 0x090A //RX_FDEQ_BIN_7 +228 0x0B0C //RX_FDEQ_BIN_8 +229 0x0D0E //RX_FDEQ_BIN_9 +230 0x0E0F //RX_FDEQ_BIN_10 +231 0x0F10 //RX_FDEQ_BIN_11 +232 0x1011 //RX_FDEQ_BIN_12 +233 0x1104 //RX_FDEQ_BIN_13 +234 0x0000 //RX_FDEQ_BIN_14 +235 0x0000 //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x4000 //RX_FDEQ_RESRV_0 +245 0x0320 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0030 //RX_FDDRC_BAND_MARGIN_1 +248 0x0050 //RX_FDDRC_BAND_MARGIN_2 +249 0x0080 //RX_FDDRC_BAND_MARGIN_3 +250 0x0007 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x5000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x6400 //RX_FDDRC_THRD_3_2 +258 0x6400 //RX_FDDRC_THRD_3_3 +259 0x2000 //RX_FDDRC_SLANT_0_0 +260 0x2000 //RX_FDDRC_SLANT_0_1 +261 0x2000 //RX_FDDRC_SLANT_0_2 +262 0x2000 //RX_FDDRC_SLANT_0_3 +263 0x5333 //RX_FDDRC_SLANT_1_0 +264 0x5333 //RX_FDDRC_SLANT_1_1 +265 0x5333 //RX_FDDRC_SLANT_1_2 +266 0x5333 //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +286 0x0100 //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 #CASE_NAME HEADSET-GOOGLE_CONDOR-VOICE_GENERIC-SWB -#PARAM_MODE FULL -#PARAM_TYPE TX+RX -#TOTAL_CUSTOM_STEP 7 +#PARAM_MODE Full +#PARAM_TYPE TX+2RX +#TOTAL_CUSTOM_STEP 7+7 #TX 0 0x0009 //TX_OPERATION_MODE_0 1 0x0001 //TX_OPERATION_MODE_1 @@ -10774,7 +16270,7 @@ 239 0x0800 //TX_DT_RESRV_7 240 0x0800 //TX_DT_RESRV_8 241 0x0000 //TX_DT_RESRV_9 -242 0xF400 //TX_THR_SN_EST_0 +242 0xFA00 //TX_THR_SN_EST_0 243 0xF400 //TX_THR_SN_EST_1 244 0xF600 //TX_THR_SN_EST_2 245 0xF400 //TX_THR_SN_EST_3 @@ -10783,20 +16279,20 @@ 248 0xF400 //TX_THR_SN_EST_6 249 0xF600 //TX_THR_SN_EST_7 250 0x0000 //TX_DELTA_THR_SN_EST_0 -251 0x0000 //TX_DELTA_THR_SN_EST_1 +251 0x0200 //TX_DELTA_THR_SN_EST_1 252 0x0200 //TX_DELTA_THR_SN_EST_2 253 0x0200 //TX_DELTA_THR_SN_EST_3 254 0x0200 //TX_DELTA_THR_SN_EST_4 255 0x0200 //TX_DELTA_THR_SN_EST_5 -256 0x0200 //TX_DELTA_THR_SN_EST_6 +256 0x0000 //TX_DELTA_THR_SN_EST_6 257 0x0200 //TX_DELTA_THR_SN_EST_7 258 0x6000 //TX_LAMBDA_NN_EST_0 -259 0x6000 //TX_LAMBDA_NN_EST_1 +259 0x4000 //TX_LAMBDA_NN_EST_1 260 0x4000 //TX_LAMBDA_NN_EST_2 261 0x4000 //TX_LAMBDA_NN_EST_3 262 0x4000 //TX_LAMBDA_NN_EST_4 263 0x4000 //TX_LAMBDA_NN_EST_5 -264 0x4000 //TX_LAMBDA_NN_EST_6 +264 0x6000 //TX_LAMBDA_NN_EST_6 265 0x4000 //TX_LAMBDA_NN_EST_7 266 0x0400 //TX_N_SN_EST 267 0x001E //TX_INBEAM_T @@ -10814,16 +16310,16 @@ 279 0x1000 //TX_B_POST_FLT_0 280 0x1000 //TX_B_POST_FLT_1 281 0x000B //TX_NS_LVL_CTRL_0 -282 0x000F //TX_NS_LVL_CTRL_1 -283 0x0011 //TX_NS_LVL_CTRL_2 +282 0x0011 //TX_NS_LVL_CTRL_1 +283 0x000F //TX_NS_LVL_CTRL_2 284 0x000F //TX_NS_LVL_CTRL_3 285 0x000F //TX_NS_LVL_CTRL_4 286 0x000F //TX_NS_LVL_CTRL_5 287 0x000F //TX_NS_LVL_CTRL_6 288 0x0011 //TX_NS_LVL_CTRL_7 289 0x000C //TX_MIN_GAIN_S_0 -290 0x000C //TX_MIN_GAIN_S_1 -291 0x000F //TX_MIN_GAIN_S_2 +290 0x000F //TX_MIN_GAIN_S_1 +291 0x000C //TX_MIN_GAIN_S_2 292 0x000C //TX_MIN_GAIN_S_3 293 0x000C //TX_MIN_GAIN_S_4 294 0x000C //TX_MIN_GAIN_S_5 @@ -10847,12 +16343,12 @@ 312 0x7FFF //TX_A_POST_FILT_0 313 0x2000 //TX_A_POST_FILT_1 314 0x2000 //TX_A_POST_FILT_S_0 -315 0x4000 //TX_A_POST_FILT_S_1 +315 0x5000 //TX_A_POST_FILT_S_1 316 0x5000 //TX_A_POST_FILT_S_2 317 0x5000 //TX_A_POST_FILT_S_3 318 0x5000 //TX_A_POST_FILT_S_4 319 0x5000 //TX_A_POST_FILT_S_5 -320 0x5000 //TX_A_POST_FILT_S_6 +320 0x4000 //TX_A_POST_FILT_S_6 321 0x5000 //TX_A_POST_FILT_S_7 322 0x1000 //TX_B_POST_FILT_0 323 0x1000 //TX_B_POST_FILT_1 @@ -10899,7 +16395,7 @@ 364 0x0000 //TX_K_APT 365 0x0001 //TX_NOISEDET 366 0x0190 //TX_NDETCT -367 0x0050 //TX_NOISE_TH_0 +367 0x0383 //TX_NOISE_TH_0 368 0x7FFF //TX_NOISE_TH_0_2 369 0x7FFF //TX_NOISE_TH_0_3 370 0x07D0 //TX_NOISE_TH_1 @@ -10911,11 +16407,11 @@ 376 0x7FFF //TX_NOISE_TH_5_3 377 0x7FFF //TX_NOISE_TH_5_4 378 0x044C //TX_NOISE_TH_6 -379 0x0014 //TX_MINENOISE_TH -380 0x4000 //TX_MINENOISE_MIC0_TH_MTS -381 0xFFEE //TX_MINENOISE_MIC0_TH_EXP -382 0x6000 //TX_MINENOISE_MIC0_S_TH_MTS -383 0xFFF3 //TX_MINENOISE_MIC0_S_TH_EXP +379 0x044C //TX_MINENOISE_TH +380 0xD508 //TX_MORENS_TFMASK_TH +381 0x0001 //TX_DRC_QUIET_FLOOR +382 0x3A98 //TX_RATIODTL_CUT_TH +383 0x0DAC //TX_DT_CUT_K1 384 0x0666 //TX_OUT_ENER_S_TH_CLEAN 385 0x0666 //TX_OUT_ENER_S_TH_LESSCLEAN 386 0x0333 //TX_OUT_ENER_S_TH_NOISY @@ -10923,22 +16419,22 @@ 388 0x0333 //TX_OUT_ENER_TH_SPEECH 389 0x2000 //TX_SN_NPB_GAIN 390 0x0000 //TX_NN_NPB_GAIN -391 0x0000 //TX_CSX_ALPHA_0 -392 0x0000 //TX_CSX_ALPHA_1 -393 0x0000 //TX_CSX_ALPHA_2 -394 0x0000 //TX_CSX_ALPHA_3 -395 0x0800 //TX_MU_ARSP_EST -396 0x00C8 //TX_P_OUTBEAM_MIN_TH +391 0x7FFF //TX_POST_MASK_SUP_HSNE +392 0x1388 //TX_TAIL_DET_TH +393 0x4000 //TX_B_LESSCUT_RTO_WTA +394 0x0000 //TX_MEL_G_R +395 0x0080 //TX_SUPHIGH_TH +396 0x0000 //TX_MASK_G_R 397 0x0002 //TX_EXTRA_NS_L -398 0x0800 //TX_EXTRA_NS_A -399 0x0005 //TX_VR_NOISE_FLOOR_TH +398 0x1800 //TX_C_POST_FLT_MASK +399 0x7FFF //TX_A_POST_FLT_WNS 400 0x0148 //TX_MIN_G_LOW300HZ 401 0x0002 //TX_MAXLEVEL_CNG 402 0x00B4 //TX_STN_NOISE_TH 403 0x4000 //TX_POST_MASK_SUP 404 0x7FFF //TX_POST_MASK_ADJUST 405 0x00C8 //TX_NS_ENOISE_MIC0_TH -406 0x0014 //TX_MINENOISE_MIC0_TH +406 0x02F3 //TX_MINENOISE_MIC0_TH 407 0x012C //TX_MINENOISE_MIC0_S_TH 408 0x2900 //TX_MIN_G_CTRL_SSNS 409 0x0800 //TX_METAL_RTO_THR @@ -11046,16 +16542,16 @@ 511 0x6666 //TX_MIC_TO_BFGAIN 512 0x0000 //TX_MICTOBFGAIN0 513 0x0000 //TX_FASTMUE_TH -514 0x0000 //TX_DERVB_LEN_0 -515 0x0000 //TX_DERVB_LEN_1 -516 0x0000 //TX_RHO_DERVB -517 0x0000 //TX_MIC_INDX_DERVB -518 0x0000 //TX_MU_DERVB -519 0x0000 //TX_DR_RESRV_0 -520 0x0000 //TX_DR_RESRV_1 -521 0x0000 //TX_DR_RESRV_2 -522 0x0000 //TX_DR_RESRV_3 -523 0x0000 //TX_DR_RESRV_4 +514 0xC000 //TX_DEREVERB_LF_MU +515 0xC000 //TX_DEREVERB_HF_MU +516 0xCCCC //TX_DEREVERB_DELAY +517 0xD999 //TX_DEREVERB_COEF_LEN +518 0x1F40 //TX_DEREVERB_DNR +519 0x0000 //TX_DEREVERB_ALPHA +520 0x0000 //TX_DEREVERB_BETA +521 0x0000 //TX_GSC_RTOL_TH +522 0x7000 //TX_GSC_RTOH_TH +523 0x0064 //TX_WIDE2_MEANHTH 524 0x0000 //TX_DR_RESRV_5 525 0x0000 //TX_DR_RESRV_6 526 0x0000 //TX_DR_RESRV_7 @@ -11421,16 +16917,81 @@ 886 0x0CCD //TX_FASTNS_TFMASKBIN_TH2 887 0x0CCD //TX_FASTNS_TFMASKBIN_TH3 888 0x0028 //TX_FASTNS_ARSPC_TH -889 0xC000 //TX_FASTNS_MASK5_TH +889 0x8000 //TX_FASTNS_MASK5_TH 890 0x4848 //TX_POSTSSA_MIN_G_VR_MASK -891 0x1000 //TX_A_LESSCUT_RTO_MASK +891 0x4000 //TX_A_LESSCUT_RTO_MASK 892 0x1770 //TX_FASTNS_NOISETH 893 0xC000 //TX_FASTNS_SSA_THLFL 894 0xC000 //TX_FASTNS_SSA_THHFL 895 0xCCCC //TX_FASTNS_SSA_THLFH 896 0xD999 //TX_FASTNS_SSA_THHFH +897 0x2339 //TX_SENDFUNC_REG_MICMUTE +898 0x0021 //TX_SENDFUNC_REG_MICMUTE1 +899 0x02BC //TX_MICMUTE_RATIO_THR +900 0x0140 //TX_MICMUTE_AMP_THR +901 0x0004 //TX_MICMUTE_HPF_IND +902 0x00C0 //TX_MICMUTE_LOG_EYR_TH +903 0x0008 //TX_MICMUTE_CVG_TIME +904 0x0008 //TX_MICMUTE_RELEASE_TIME +905 0x01FE //TX_MIC_VOLUME_MIC0MUTE +906 0x0020 //TX_MICMUTE_EPD_OFFSET_0 +907 0x001E //TX_MICMUTE_FRQ_AEC_L +908 0x7999 //TX_MICMUTE_EAD_THR +909 0x7FFF //TX_MICMUTE_LAMBDA_CB_NLE +910 0x7FFF //TX_MICMUTE_LAMBDA_RE_EST +911 0x4000 //TX_DTD_THR1_MICMUTE_0 +912 0x7000 //TX_DTD_THR1_MICMUTE_1 +913 0x7FFF //TX_DTD_THR1_MICMUTE_2 +914 0x7FFF //TX_DTD_THR1_MICMUTE_3 +915 0x6CCC //TX_DTD_THR2_MICMUTE_0 +916 0x0400 //TX_MICMUTE_MIN_EQ_RE_EST_0 +917 0x0400 //TX_MICMUTE_MIN_EQ_RE_EST_1 +918 0x1000 //TX_MICMUTE_MIN_EQ_RE_EST_2 +919 0x7FFF //TX_MICMUTE_MIN_EQ_RE_EST_3 +920 0x7FFF //TX_MICMUTE_MIN_EQ_RE_EST_4 +921 0x4000 //TX_MICMUTE_C_POST_FLT +922 0x03E8 //TX_MICMUTE_DT_CUT_K +923 0x0001 //TX_MICMUTE_DT_CUT_THR +924 0x03E8 //TX_MICMUTE_DT_CUT_K2 +925 0x0001 //TX_MICMUTE_DT_CUT_THR2 +926 0x0064 //TX_MICMUTE_DT2_HOLD_N +927 0x1000 //TX_MICMUTE_RATIODTH_THCUT +928 0x1000 //TX_MICMUTE_B_POST_FLT_ECHOL +929 0x7FFF //TX_MICMUTE_B_POST_FLT_ECHOH +930 0x0400 //TX_MICMUTE_C_POST_FLT_MASK +931 0x7999 //TX_MICMUTE_RATIODTL_CUT_TH +932 0x0258 //TX_MICMUTE_DT_CUT_K1 +933 0x0800 //TX_MICMUTE_N2_SN_EST +934 0xFC00 //TX_MICMUTE_THR_SN_EST_0 +935 0x001C //TX_MICMUTE_MIN_G_CTRL_0 +936 0x6000 //TX_MICMUTE_A_POST_FILT_S_0 +937 0x7000 //TX_MICMUTE_B_POST_FILT_0 +938 0x2710 //TX_MIC1RUB_AMP_THR +939 0x0010 //TX_MIC1MUTE_RATIO_THR +940 0x0450 //TX_MIC1MUTE_AMP_THR +941 0x0008 //TX_MIC1MUTE_CVG_TIME +942 0x0008 //TX_MIC1MUTE_RELEASE_TIME +943 0x0000 //TX_AMS_RESRV_01 +944 0x0000 //TX_AMS_RESRV_02 +945 0x0000 //TX_AMS_RESRV_03 +946 0x0000 //TX_AMS_RESRV_04 +947 0x0000 //TX_AMS_RESRV_05 +948 0x0000 //TX_AMS_RESRV_06 +949 0x0000 //TX_AMS_RESRV_07 +950 0x0000 //TX_AMS_RESRV_08 +951 0x0000 //TX_AMS_RESRV_09 +952 0x0000 //TX_AMS_RESRV_10 +953 0x0000 //TX_AMS_RESRV_11 +954 0x0000 //TX_AMS_RESRV_12 +955 0x0000 //TX_AMS_RESRV_13 +956 0x0000 //TX_AMS_RESRV_14 +957 0x0000 //TX_AMS_RESRV_15 +958 0x0000 //TX_AMS_RESRV_16 +959 0x0000 //TX_AMS_RESRV_17 +960 0x0000 //TX_AMS_RESRV_18 +961 0x0000 //TX_AMS_RESRV_19 #RX -0 0x002C //RX_RECVFUNC_MODE_0 +0 0x202C //RX_RECVFUNC_MODE_0 1 0x0000 //RX_RECVFUNC_MODE_1 2 0x0003 //RX_SAMPLINGFREQ_SIG 3 0x0003 //RX_SAMPLINGFREQ_PROC @@ -12280,11 +17841,862 @@ 110 0x0000 //RX_FDDRC_RESRV_0 129 0x0100 //RX_SPK_VOL 130 0x0000 //RX_VOL_RESRV_0 +#RX 2 +157 0x202C //RX_RECVFUNC_MODE_0 +158 0x0000 //RX_RECVFUNC_MODE_1 +159 0x0003 //RX_SAMPLINGFREQ_SIG +160 0x0003 //RX_SAMPLINGFREQ_PROC +161 0x000A //RX_FRAME_SZ +162 0x0000 //RX_DELAY_OPT +163 0x5000 //RX_TDDRC_ALPHA_UP_1 +164 0x5000 //RX_TDDRC_ALPHA_UP_2 +165 0x5000 //RX_TDDRC_ALPHA_UP_3 +166 0x2000 //RX_TDDRC_ALPHA_UP_4 +167 0x0800 //RX_PGA +168 0x7FFF //RX_A_HP +169 0x0000 //RX_B_PE +170 0x1800 //RX_THR_PITCH_DET_0 +171 0x1000 //RX_THR_PITCH_DET_1 +172 0x0800 //RX_THR_PITCH_DET_2 +173 0x0008 //RX_PITCH_BFR_LEN +174 0x0003 //RX_SBD_PITCH_DET +175 0x0100 //RX_PP_RESRV_0 +176 0x0020 //RX_PP_RESRV_1 +177 0x0400 //RX_N_SN_EST +178 0x000C //RX_N2_SN_EST +179 0x0003 //RX_NS_LVL_CTRL +180 0x9000 //RX_THR_SN_EST +181 0x7CCD //RX_LAMBDA_PFILT +182 0x000A //RX_FENS_RESRV_0 +183 0x0190 //RX_FENS_RESRV_1 +184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +187 0x0002 //RX_EXTRA_NS_L +188 0x0800 //RX_EXTRA_NS_A +189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +190 0x65AD //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +192 0x199A //RX_A_POST_FLT +193 0x0000 //RX_LMT_THRD +194 0x4000 //RX_LMT_ALPHA +195 0x0020 //RX_FDEQ_SUBNUM +196 0x4848 //RX_FDEQ_GAIN_0 +197 0x4848 //RX_FDEQ_GAIN_1 +198 0x4848 //RX_FDEQ_GAIN_2 +199 0x4848 //RX_FDEQ_GAIN_3 +200 0x4848 //RX_FDEQ_GAIN_4 +201 0x4848 //RX_FDEQ_GAIN_5 +202 0x4848 //RX_FDEQ_GAIN_6 +203 0x4848 //RX_FDEQ_GAIN_7 +204 0x4848 //RX_FDEQ_GAIN_8 +205 0x4848 //RX_FDEQ_GAIN_9 +206 0x4848 //RX_FDEQ_GAIN_10 +207 0x4848 //RX_FDEQ_GAIN_11 +208 0x4848 //RX_FDEQ_GAIN_12 +209 0x4848 //RX_FDEQ_GAIN_13 +210 0x4848 //RX_FDEQ_GAIN_14 +211 0x4848 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0202 //RX_FDEQ_BIN_0 +221 0x0203 //RX_FDEQ_BIN_1 +222 0x0303 //RX_FDEQ_BIN_2 +223 0x0304 //RX_FDEQ_BIN_3 +224 0x0405 //RX_FDEQ_BIN_4 +225 0x0506 //RX_FDEQ_BIN_5 +226 0x0708 //RX_FDEQ_BIN_6 +227 0x090A //RX_FDEQ_BIN_7 +228 0x0B0C //RX_FDEQ_BIN_8 +229 0x0D0E //RX_FDEQ_BIN_9 +230 0x1013 //RX_FDEQ_BIN_10 +231 0x1719 //RX_FDEQ_BIN_11 +232 0x1B1E //RX_FDEQ_BIN_12 +233 0x1E1E //RX_FDEQ_BIN_13 +234 0x1E28 //RX_FDEQ_BIN_14 +235 0x282C //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x4000 //RX_FDEQ_RESRV_0 +245 0x0320 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0030 //RX_FDDRC_BAND_MARGIN_1 +248 0x0050 //RX_FDDRC_BAND_MARGIN_2 +249 0x0080 //RX_FDDRC_BAND_MARGIN_3 +250 0x0007 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x5000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x6400 //RX_FDDRC_THRD_3_2 +258 0x6400 //RX_FDDRC_THRD_3_3 +259 0x2000 //RX_FDDRC_SLANT_0_0 +260 0x2000 //RX_FDDRC_SLANT_0_1 +261 0x2000 //RX_FDDRC_SLANT_0_2 +262 0x2000 //RX_FDDRC_SLANT_0_3 +263 0x5333 //RX_FDDRC_SLANT_1_0 +264 0x5333 //RX_FDDRC_SLANT_1_1 +265 0x5333 //RX_FDDRC_SLANT_1_2 +266 0x5333 //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +268 0x0002 //RX_FILTINDX +269 0x0000 //RX_TDDRC_THRD_0 +270 0x0000 //RX_TDDRC_THRD_1 +271 0x1A00 //RX_TDDRC_THRD_2 +272 0x1A00 //RX_TDDRC_THRD_3 +273 0x3000 //RX_TDDRC_SLANT_0 +274 0x7EB8 //RX_TDDRC_SLANT_1 +275 0x5000 //RX_TDDRC_ALPHA_UP_0 +276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x199A //RX_TDDRC_HMNC_GAIN +279 0x0001 //RX_TDDRC_SMT_FLAG +280 0x0CCD //RX_TDDRC_SMT_W +281 0x01C8 //RX_TDDRC_DRC_GAIN +282 0x7C00 //RX_LAMBDA_PKA_FP +283 0x2000 //RX_TPKA_FP +284 0x2000 //RX_MIN_G_FP +285 0x0080 //RX_MAX_G_FP +286 0x000B //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 +288 0x0000 //RX_MAXLEVEL_CNG +289 0x3000 //RX_BWE_UV_TH +290 0x3000 //RX_BWE_UV_TH2 +291 0x1800 //RX_BWE_UV_TH3 +292 0x1000 //RX_BWE_V_TH +293 0x04CD //RX_BWE_GAIN1_V_TH1 +294 0x0F33 //RX_BWE_GAIN1_V_TH2 +295 0x7333 //RX_BWE_UV_EQ +296 0x199A //RX_BWE_V_EQ +297 0x7333 //RX_BWE_TONE_TH +298 0x0004 //RX_BWE_UV_HOLD_T +299 0x6CCD //RX_BWE_GAIN2_ALPHA +300 0x799A //RX_BWE_GAIN3_ALPHA +301 0x001E //RX_BWE_CUTOFF +302 0x3000 //RX_BWE_GAINFILL +303 0x3200 //RX_BWE_MAXTH_TONE +304 0x2000 //RX_BWE_EQ_0 +305 0x2000 //RX_BWE_EQ_1 +306 0x2000 //RX_BWE_EQ_2 +307 0x2000 //RX_BWE_EQ_3 +308 0x2000 //RX_BWE_EQ_4 +309 0x2000 //RX_BWE_EQ_5 +310 0x2000 //RX_BWE_EQ_6 +311 0x0000 //RX_BWE_RESRV_0 +312 0x0000 //RX_BWE_RESRV_1 +313 0x0000 //RX_BWE_RESRV_2 +#VOL 0 +163 0x5000 //RX_TDDRC_ALPHA_UP_1 +164 0x5000 //RX_TDDRC_ALPHA_UP_2 +165 0x5000 //RX_TDDRC_ALPHA_UP_3 +166 0x2000 //RX_TDDRC_ALPHA_UP_4 +184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +190 0x65AD //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +269 0x0000 //RX_TDDRC_THRD_0 +270 0x0000 //RX_TDDRC_THRD_1 +271 0x1A00 //RX_TDDRC_THRD_2 +272 0x1A00 //RX_TDDRC_THRD_3 +273 0x3000 //RX_TDDRC_SLANT_0 +274 0x7EB8 //RX_TDDRC_SLANT_1 +275 0x5000 //RX_TDDRC_ALPHA_UP_0 +276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x199A //RX_TDDRC_HMNC_GAIN +279 0x0001 //RX_TDDRC_SMT_FLAG +280 0x0CCD //RX_TDDRC_SMT_W +281 0x01C8 //RX_TDDRC_DRC_GAIN +195 0x0020 //RX_FDEQ_SUBNUM +196 0x4848 //RX_FDEQ_GAIN_0 +197 0x4848 //RX_FDEQ_GAIN_1 +198 0x4848 //RX_FDEQ_GAIN_2 +199 0x4848 //RX_FDEQ_GAIN_3 +200 0x4848 //RX_FDEQ_GAIN_4 +201 0x4848 //RX_FDEQ_GAIN_5 +202 0x4848 //RX_FDEQ_GAIN_6 +203 0x4848 //RX_FDEQ_GAIN_7 +204 0x4848 //RX_FDEQ_GAIN_8 +205 0x4848 //RX_FDEQ_GAIN_9 +206 0x4848 //RX_FDEQ_GAIN_10 +207 0x4848 //RX_FDEQ_GAIN_11 +208 0x4848 //RX_FDEQ_GAIN_12 +209 0x4848 //RX_FDEQ_GAIN_13 +210 0x4848 //RX_FDEQ_GAIN_14 +211 0x4848 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0202 //RX_FDEQ_BIN_0 +221 0x0203 //RX_FDEQ_BIN_1 +222 0x0303 //RX_FDEQ_BIN_2 +223 0x0304 //RX_FDEQ_BIN_3 +224 0x0405 //RX_FDEQ_BIN_4 +225 0x0506 //RX_FDEQ_BIN_5 +226 0x0708 //RX_FDEQ_BIN_6 +227 0x090A //RX_FDEQ_BIN_7 +228 0x0B0C //RX_FDEQ_BIN_8 +229 0x0D0E //RX_FDEQ_BIN_9 +230 0x1013 //RX_FDEQ_BIN_10 +231 0x1719 //RX_FDEQ_BIN_11 +232 0x1B1E //RX_FDEQ_BIN_12 +233 0x1E1E //RX_FDEQ_BIN_13 +234 0x1E28 //RX_FDEQ_BIN_14 +235 0x282C //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x4000 //RX_FDEQ_RESRV_0 +245 0x0320 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0030 //RX_FDDRC_BAND_MARGIN_1 +248 0x0050 //RX_FDDRC_BAND_MARGIN_2 +249 0x0080 //RX_FDDRC_BAND_MARGIN_3 +250 0x0007 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x5000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x6400 //RX_FDDRC_THRD_3_2 +258 0x6400 //RX_FDDRC_THRD_3_3 +259 0x2000 //RX_FDDRC_SLANT_0_0 +260 0x2000 //RX_FDDRC_SLANT_0_1 +261 0x2000 //RX_FDDRC_SLANT_0_2 +262 0x2000 //RX_FDDRC_SLANT_0_3 +263 0x5333 //RX_FDDRC_SLANT_1_0 +264 0x5333 //RX_FDDRC_SLANT_1_1 +265 0x5333 //RX_FDDRC_SLANT_1_2 +266 0x5333 //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +286 0x000B //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 +#VOL 1 +163 0x5000 //RX_TDDRC_ALPHA_UP_1 +164 0x5000 //RX_TDDRC_ALPHA_UP_2 +165 0x5000 //RX_TDDRC_ALPHA_UP_3 +166 0x2000 //RX_TDDRC_ALPHA_UP_4 +184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +190 0x65AD //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +269 0x0000 //RX_TDDRC_THRD_0 +270 0x0000 //RX_TDDRC_THRD_1 +271 0x1A00 //RX_TDDRC_THRD_2 +272 0x1A00 //RX_TDDRC_THRD_3 +273 0x3000 //RX_TDDRC_SLANT_0 +274 0x7EB8 //RX_TDDRC_SLANT_1 +275 0x5000 //RX_TDDRC_ALPHA_UP_0 +276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x199A //RX_TDDRC_HMNC_GAIN +279 0x0001 //RX_TDDRC_SMT_FLAG +280 0x0CCD //RX_TDDRC_SMT_W +281 0x01C8 //RX_TDDRC_DRC_GAIN +195 0x0020 //RX_FDEQ_SUBNUM +196 0x4848 //RX_FDEQ_GAIN_0 +197 0x4848 //RX_FDEQ_GAIN_1 +198 0x4848 //RX_FDEQ_GAIN_2 +199 0x4848 //RX_FDEQ_GAIN_3 +200 0x4848 //RX_FDEQ_GAIN_4 +201 0x4848 //RX_FDEQ_GAIN_5 +202 0x4848 //RX_FDEQ_GAIN_6 +203 0x4848 //RX_FDEQ_GAIN_7 +204 0x4848 //RX_FDEQ_GAIN_8 +205 0x4848 //RX_FDEQ_GAIN_9 +206 0x4848 //RX_FDEQ_GAIN_10 +207 0x4848 //RX_FDEQ_GAIN_11 +208 0x4848 //RX_FDEQ_GAIN_12 +209 0x4848 //RX_FDEQ_GAIN_13 +210 0x4848 //RX_FDEQ_GAIN_14 +211 0x4848 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0202 //RX_FDEQ_BIN_0 +221 0x0203 //RX_FDEQ_BIN_1 +222 0x0303 //RX_FDEQ_BIN_2 +223 0x0304 //RX_FDEQ_BIN_3 +224 0x0405 //RX_FDEQ_BIN_4 +225 0x0506 //RX_FDEQ_BIN_5 +226 0x0708 //RX_FDEQ_BIN_6 +227 0x090A //RX_FDEQ_BIN_7 +228 0x0B0C //RX_FDEQ_BIN_8 +229 0x0D0E //RX_FDEQ_BIN_9 +230 0x1013 //RX_FDEQ_BIN_10 +231 0x1719 //RX_FDEQ_BIN_11 +232 0x1B1E //RX_FDEQ_BIN_12 +233 0x1E1E //RX_FDEQ_BIN_13 +234 0x1E28 //RX_FDEQ_BIN_14 +235 0x282C //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x4000 //RX_FDEQ_RESRV_0 +245 0x0320 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0030 //RX_FDDRC_BAND_MARGIN_1 +248 0x0050 //RX_FDDRC_BAND_MARGIN_2 +249 0x0080 //RX_FDDRC_BAND_MARGIN_3 +250 0x0007 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x5000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x6400 //RX_FDDRC_THRD_3_2 +258 0x6400 //RX_FDDRC_THRD_3_3 +259 0x2000 //RX_FDDRC_SLANT_0_0 +260 0x2000 //RX_FDDRC_SLANT_0_1 +261 0x2000 //RX_FDDRC_SLANT_0_2 +262 0x2000 //RX_FDDRC_SLANT_0_3 +263 0x5333 //RX_FDDRC_SLANT_1_0 +264 0x5333 //RX_FDDRC_SLANT_1_1 +265 0x5333 //RX_FDDRC_SLANT_1_2 +266 0x5333 //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +286 0x0013 //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 +#VOL 2 +163 0x5000 //RX_TDDRC_ALPHA_UP_1 +164 0x5000 //RX_TDDRC_ALPHA_UP_2 +165 0x5000 //RX_TDDRC_ALPHA_UP_3 +166 0x2000 //RX_TDDRC_ALPHA_UP_4 +184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +190 0x65AD //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +269 0x0000 //RX_TDDRC_THRD_0 +270 0x0000 //RX_TDDRC_THRD_1 +271 0x1A00 //RX_TDDRC_THRD_2 +272 0x1A00 //RX_TDDRC_THRD_3 +273 0x3000 //RX_TDDRC_SLANT_0 +274 0x7EB8 //RX_TDDRC_SLANT_1 +275 0x5000 //RX_TDDRC_ALPHA_UP_0 +276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x199A //RX_TDDRC_HMNC_GAIN +279 0x0001 //RX_TDDRC_SMT_FLAG +280 0x0CCD //RX_TDDRC_SMT_W +281 0x01C8 //RX_TDDRC_DRC_GAIN +195 0x0020 //RX_FDEQ_SUBNUM +196 0x4848 //RX_FDEQ_GAIN_0 +197 0x4848 //RX_FDEQ_GAIN_1 +198 0x4848 //RX_FDEQ_GAIN_2 +199 0x4848 //RX_FDEQ_GAIN_3 +200 0x4848 //RX_FDEQ_GAIN_4 +201 0x4848 //RX_FDEQ_GAIN_5 +202 0x4848 //RX_FDEQ_GAIN_6 +203 0x4848 //RX_FDEQ_GAIN_7 +204 0x4848 //RX_FDEQ_GAIN_8 +205 0x4848 //RX_FDEQ_GAIN_9 +206 0x4848 //RX_FDEQ_GAIN_10 +207 0x4848 //RX_FDEQ_GAIN_11 +208 0x4848 //RX_FDEQ_GAIN_12 +209 0x4848 //RX_FDEQ_GAIN_13 +210 0x4848 //RX_FDEQ_GAIN_14 +211 0x4848 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0202 //RX_FDEQ_BIN_0 +221 0x0203 //RX_FDEQ_BIN_1 +222 0x0303 //RX_FDEQ_BIN_2 +223 0x0304 //RX_FDEQ_BIN_3 +224 0x0405 //RX_FDEQ_BIN_4 +225 0x0506 //RX_FDEQ_BIN_5 +226 0x0708 //RX_FDEQ_BIN_6 +227 0x090A //RX_FDEQ_BIN_7 +228 0x0B0C //RX_FDEQ_BIN_8 +229 0x0D0E //RX_FDEQ_BIN_9 +230 0x1013 //RX_FDEQ_BIN_10 +231 0x1719 //RX_FDEQ_BIN_11 +232 0x1B1E //RX_FDEQ_BIN_12 +233 0x1E1E //RX_FDEQ_BIN_13 +234 0x1E28 //RX_FDEQ_BIN_14 +235 0x282C //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x4000 //RX_FDEQ_RESRV_0 +245 0x0320 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0030 //RX_FDDRC_BAND_MARGIN_1 +248 0x0050 //RX_FDDRC_BAND_MARGIN_2 +249 0x0080 //RX_FDDRC_BAND_MARGIN_3 +250 0x0007 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x5000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x6400 //RX_FDDRC_THRD_3_2 +258 0x6400 //RX_FDDRC_THRD_3_3 +259 0x2000 //RX_FDDRC_SLANT_0_0 +260 0x2000 //RX_FDDRC_SLANT_0_1 +261 0x2000 //RX_FDDRC_SLANT_0_2 +262 0x2000 //RX_FDDRC_SLANT_0_3 +263 0x5333 //RX_FDDRC_SLANT_1_0 +264 0x5333 //RX_FDDRC_SLANT_1_1 +265 0x5333 //RX_FDDRC_SLANT_1_2 +266 0x5333 //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +286 0x0020 //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 +#VOL 3 +163 0x5000 //RX_TDDRC_ALPHA_UP_1 +164 0x5000 //RX_TDDRC_ALPHA_UP_2 +165 0x5000 //RX_TDDRC_ALPHA_UP_3 +166 0x2000 //RX_TDDRC_ALPHA_UP_4 +184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +190 0x65AD //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +269 0x0000 //RX_TDDRC_THRD_0 +270 0x0000 //RX_TDDRC_THRD_1 +271 0x1A00 //RX_TDDRC_THRD_2 +272 0x1A00 //RX_TDDRC_THRD_3 +273 0x3000 //RX_TDDRC_SLANT_0 +274 0x7EB8 //RX_TDDRC_SLANT_1 +275 0x5000 //RX_TDDRC_ALPHA_UP_0 +276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x199A //RX_TDDRC_HMNC_GAIN +279 0x0001 //RX_TDDRC_SMT_FLAG +280 0x0CCD //RX_TDDRC_SMT_W +281 0x01C8 //RX_TDDRC_DRC_GAIN +195 0x0020 //RX_FDEQ_SUBNUM +196 0x4848 //RX_FDEQ_GAIN_0 +197 0x4848 //RX_FDEQ_GAIN_1 +198 0x4848 //RX_FDEQ_GAIN_2 +199 0x4848 //RX_FDEQ_GAIN_3 +200 0x4848 //RX_FDEQ_GAIN_4 +201 0x4848 //RX_FDEQ_GAIN_5 +202 0x4848 //RX_FDEQ_GAIN_6 +203 0x4848 //RX_FDEQ_GAIN_7 +204 0x4848 //RX_FDEQ_GAIN_8 +205 0x4848 //RX_FDEQ_GAIN_9 +206 0x4848 //RX_FDEQ_GAIN_10 +207 0x4848 //RX_FDEQ_GAIN_11 +208 0x4848 //RX_FDEQ_GAIN_12 +209 0x4848 //RX_FDEQ_GAIN_13 +210 0x4848 //RX_FDEQ_GAIN_14 +211 0x4848 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0202 //RX_FDEQ_BIN_0 +221 0x0203 //RX_FDEQ_BIN_1 +222 0x0303 //RX_FDEQ_BIN_2 +223 0x0304 //RX_FDEQ_BIN_3 +224 0x0405 //RX_FDEQ_BIN_4 +225 0x0506 //RX_FDEQ_BIN_5 +226 0x0708 //RX_FDEQ_BIN_6 +227 0x090A //RX_FDEQ_BIN_7 +228 0x0B0C //RX_FDEQ_BIN_8 +229 0x0D0E //RX_FDEQ_BIN_9 +230 0x1013 //RX_FDEQ_BIN_10 +231 0x1719 //RX_FDEQ_BIN_11 +232 0x1B1E //RX_FDEQ_BIN_12 +233 0x1E1E //RX_FDEQ_BIN_13 +234 0x1E28 //RX_FDEQ_BIN_14 +235 0x282C //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x4000 //RX_FDEQ_RESRV_0 +245 0x0320 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0030 //RX_FDDRC_BAND_MARGIN_1 +248 0x0050 //RX_FDDRC_BAND_MARGIN_2 +249 0x0080 //RX_FDDRC_BAND_MARGIN_3 +250 0x0007 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x5000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x6400 //RX_FDDRC_THRD_3_2 +258 0x6400 //RX_FDDRC_THRD_3_3 +259 0x2000 //RX_FDDRC_SLANT_0_0 +260 0x2000 //RX_FDDRC_SLANT_0_1 +261 0x2000 //RX_FDDRC_SLANT_0_2 +262 0x2000 //RX_FDDRC_SLANT_0_3 +263 0x5333 //RX_FDDRC_SLANT_1_0 +264 0x5333 //RX_FDDRC_SLANT_1_1 +265 0x5333 //RX_FDDRC_SLANT_1_2 +266 0x5333 //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +286 0x0036 //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 +#VOL 4 +163 0x5000 //RX_TDDRC_ALPHA_UP_1 +164 0x5000 //RX_TDDRC_ALPHA_UP_2 +165 0x5000 //RX_TDDRC_ALPHA_UP_3 +166 0x2000 //RX_TDDRC_ALPHA_UP_4 +184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +190 0x65AD //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +269 0x0000 //RX_TDDRC_THRD_0 +270 0x0000 //RX_TDDRC_THRD_1 +271 0x1A00 //RX_TDDRC_THRD_2 +272 0x1A00 //RX_TDDRC_THRD_3 +273 0x3000 //RX_TDDRC_SLANT_0 +274 0x7EB8 //RX_TDDRC_SLANT_1 +275 0x5000 //RX_TDDRC_ALPHA_UP_0 +276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x199A //RX_TDDRC_HMNC_GAIN +279 0x0001 //RX_TDDRC_SMT_FLAG +280 0x0CCD //RX_TDDRC_SMT_W +281 0x01C8 //RX_TDDRC_DRC_GAIN +195 0x0020 //RX_FDEQ_SUBNUM +196 0x4848 //RX_FDEQ_GAIN_0 +197 0x4848 //RX_FDEQ_GAIN_1 +198 0x4848 //RX_FDEQ_GAIN_2 +199 0x4848 //RX_FDEQ_GAIN_3 +200 0x4848 //RX_FDEQ_GAIN_4 +201 0x4848 //RX_FDEQ_GAIN_5 +202 0x4848 //RX_FDEQ_GAIN_6 +203 0x4848 //RX_FDEQ_GAIN_7 +204 0x4848 //RX_FDEQ_GAIN_8 +205 0x4848 //RX_FDEQ_GAIN_9 +206 0x4848 //RX_FDEQ_GAIN_10 +207 0x4848 //RX_FDEQ_GAIN_11 +208 0x4848 //RX_FDEQ_GAIN_12 +209 0x4848 //RX_FDEQ_GAIN_13 +210 0x4848 //RX_FDEQ_GAIN_14 +211 0x4848 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0202 //RX_FDEQ_BIN_0 +221 0x0203 //RX_FDEQ_BIN_1 +222 0x0303 //RX_FDEQ_BIN_2 +223 0x0304 //RX_FDEQ_BIN_3 +224 0x0405 //RX_FDEQ_BIN_4 +225 0x0506 //RX_FDEQ_BIN_5 +226 0x0708 //RX_FDEQ_BIN_6 +227 0x090A //RX_FDEQ_BIN_7 +228 0x0B0C //RX_FDEQ_BIN_8 +229 0x0D0E //RX_FDEQ_BIN_9 +230 0x1013 //RX_FDEQ_BIN_10 +231 0x1719 //RX_FDEQ_BIN_11 +232 0x1B1E //RX_FDEQ_BIN_12 +233 0x1E1E //RX_FDEQ_BIN_13 +234 0x1E28 //RX_FDEQ_BIN_14 +235 0x282C //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x4000 //RX_FDEQ_RESRV_0 +245 0x0320 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0030 //RX_FDDRC_BAND_MARGIN_1 +248 0x0050 //RX_FDDRC_BAND_MARGIN_2 +249 0x0080 //RX_FDDRC_BAND_MARGIN_3 +250 0x0007 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x5000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x6400 //RX_FDDRC_THRD_3_2 +258 0x6400 //RX_FDDRC_THRD_3_3 +259 0x2000 //RX_FDDRC_SLANT_0_0 +260 0x2000 //RX_FDDRC_SLANT_0_1 +261 0x2000 //RX_FDDRC_SLANT_0_2 +262 0x2000 //RX_FDDRC_SLANT_0_3 +263 0x5333 //RX_FDDRC_SLANT_1_0 +264 0x5333 //RX_FDDRC_SLANT_1_1 +265 0x5333 //RX_FDDRC_SLANT_1_2 +266 0x5333 //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +286 0x005B //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 +#VOL 5 +163 0x5000 //RX_TDDRC_ALPHA_UP_1 +164 0x5000 //RX_TDDRC_ALPHA_UP_2 +165 0x5000 //RX_TDDRC_ALPHA_UP_3 +166 0x2000 //RX_TDDRC_ALPHA_UP_4 +184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +190 0x65AD //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +269 0x0000 //RX_TDDRC_THRD_0 +270 0x0000 //RX_TDDRC_THRD_1 +271 0x1A00 //RX_TDDRC_THRD_2 +272 0x1A00 //RX_TDDRC_THRD_3 +273 0x3000 //RX_TDDRC_SLANT_0 +274 0x7EB8 //RX_TDDRC_SLANT_1 +275 0x5000 //RX_TDDRC_ALPHA_UP_0 +276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x199A //RX_TDDRC_HMNC_GAIN +279 0x0001 //RX_TDDRC_SMT_FLAG +280 0x0CCD //RX_TDDRC_SMT_W +281 0x01C8 //RX_TDDRC_DRC_GAIN +195 0x0020 //RX_FDEQ_SUBNUM +196 0x4848 //RX_FDEQ_GAIN_0 +197 0x4848 //RX_FDEQ_GAIN_1 +198 0x4848 //RX_FDEQ_GAIN_2 +199 0x4848 //RX_FDEQ_GAIN_3 +200 0x4848 //RX_FDEQ_GAIN_4 +201 0x4848 //RX_FDEQ_GAIN_5 +202 0x4848 //RX_FDEQ_GAIN_6 +203 0x4848 //RX_FDEQ_GAIN_7 +204 0x4848 //RX_FDEQ_GAIN_8 +205 0x4848 //RX_FDEQ_GAIN_9 +206 0x4848 //RX_FDEQ_GAIN_10 +207 0x4848 //RX_FDEQ_GAIN_11 +208 0x4848 //RX_FDEQ_GAIN_12 +209 0x4848 //RX_FDEQ_GAIN_13 +210 0x4848 //RX_FDEQ_GAIN_14 +211 0x4848 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0202 //RX_FDEQ_BIN_0 +221 0x0203 //RX_FDEQ_BIN_1 +222 0x0303 //RX_FDEQ_BIN_2 +223 0x0304 //RX_FDEQ_BIN_3 +224 0x0405 //RX_FDEQ_BIN_4 +225 0x0506 //RX_FDEQ_BIN_5 +226 0x0708 //RX_FDEQ_BIN_6 +227 0x090A //RX_FDEQ_BIN_7 +228 0x0B0C //RX_FDEQ_BIN_8 +229 0x0D0E //RX_FDEQ_BIN_9 +230 0x1013 //RX_FDEQ_BIN_10 +231 0x1719 //RX_FDEQ_BIN_11 +232 0x1B1E //RX_FDEQ_BIN_12 +233 0x1E1E //RX_FDEQ_BIN_13 +234 0x1E28 //RX_FDEQ_BIN_14 +235 0x282C //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x4000 //RX_FDEQ_RESRV_0 +245 0x0320 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0030 //RX_FDDRC_BAND_MARGIN_1 +248 0x0050 //RX_FDDRC_BAND_MARGIN_2 +249 0x0080 //RX_FDDRC_BAND_MARGIN_3 +250 0x0007 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x5000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x6400 //RX_FDDRC_THRD_3_2 +258 0x6400 //RX_FDDRC_THRD_3_3 +259 0x2000 //RX_FDDRC_SLANT_0_0 +260 0x2000 //RX_FDDRC_SLANT_0_1 +261 0x2000 //RX_FDDRC_SLANT_0_2 +262 0x2000 //RX_FDDRC_SLANT_0_3 +263 0x5333 //RX_FDDRC_SLANT_1_0 +264 0x5333 //RX_FDDRC_SLANT_1_1 +265 0x5333 //RX_FDDRC_SLANT_1_2 +266 0x5333 //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +286 0x0099 //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 +#VOL 6 +163 0x5000 //RX_TDDRC_ALPHA_UP_1 +164 0x5000 //RX_TDDRC_ALPHA_UP_2 +165 0x5000 //RX_TDDRC_ALPHA_UP_3 +166 0x2000 //RX_TDDRC_ALPHA_UP_4 +184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +190 0x65AD //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +269 0x0000 //RX_TDDRC_THRD_0 +270 0x0000 //RX_TDDRC_THRD_1 +271 0x1A00 //RX_TDDRC_THRD_2 +272 0x1A00 //RX_TDDRC_THRD_3 +273 0x3000 //RX_TDDRC_SLANT_0 +274 0x7EB8 //RX_TDDRC_SLANT_1 +275 0x5000 //RX_TDDRC_ALPHA_UP_0 +276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x199A //RX_TDDRC_HMNC_GAIN +279 0x0001 //RX_TDDRC_SMT_FLAG +280 0x0CCD //RX_TDDRC_SMT_W +281 0x01C8 //RX_TDDRC_DRC_GAIN +195 0x0020 //RX_FDEQ_SUBNUM +196 0x4848 //RX_FDEQ_GAIN_0 +197 0x4848 //RX_FDEQ_GAIN_1 +198 0x4848 //RX_FDEQ_GAIN_2 +199 0x4848 //RX_FDEQ_GAIN_3 +200 0x4848 //RX_FDEQ_GAIN_4 +201 0x4848 //RX_FDEQ_GAIN_5 +202 0x4848 //RX_FDEQ_GAIN_6 +203 0x4848 //RX_FDEQ_GAIN_7 +204 0x4848 //RX_FDEQ_GAIN_8 +205 0x4848 //RX_FDEQ_GAIN_9 +206 0x4848 //RX_FDEQ_GAIN_10 +207 0x4848 //RX_FDEQ_GAIN_11 +208 0x4848 //RX_FDEQ_GAIN_12 +209 0x4848 //RX_FDEQ_GAIN_13 +210 0x4848 //RX_FDEQ_GAIN_14 +211 0x4848 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0202 //RX_FDEQ_BIN_0 +221 0x0203 //RX_FDEQ_BIN_1 +222 0x0303 //RX_FDEQ_BIN_2 +223 0x0304 //RX_FDEQ_BIN_3 +224 0x0405 //RX_FDEQ_BIN_4 +225 0x0506 //RX_FDEQ_BIN_5 +226 0x0708 //RX_FDEQ_BIN_6 +227 0x090A //RX_FDEQ_BIN_7 +228 0x0B0C //RX_FDEQ_BIN_8 +229 0x0D0E //RX_FDEQ_BIN_9 +230 0x1013 //RX_FDEQ_BIN_10 +231 0x1719 //RX_FDEQ_BIN_11 +232 0x1B1E //RX_FDEQ_BIN_12 +233 0x1E1E //RX_FDEQ_BIN_13 +234 0x1E28 //RX_FDEQ_BIN_14 +235 0x282C //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x4000 //RX_FDEQ_RESRV_0 +245 0x0320 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0030 //RX_FDDRC_BAND_MARGIN_1 +248 0x0050 //RX_FDDRC_BAND_MARGIN_2 +249 0x0080 //RX_FDDRC_BAND_MARGIN_3 +250 0x0007 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x5000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x6400 //RX_FDDRC_THRD_3_2 +258 0x6400 //RX_FDDRC_THRD_3_3 +259 0x2000 //RX_FDDRC_SLANT_0_0 +260 0x2000 //RX_FDDRC_SLANT_0_1 +261 0x2000 //RX_FDDRC_SLANT_0_2 +262 0x2000 //RX_FDDRC_SLANT_0_3 +263 0x5333 //RX_FDDRC_SLANT_1_0 +264 0x5333 //RX_FDDRC_SLANT_1_1 +265 0x5333 //RX_FDDRC_SLANT_1_2 +266 0x5333 //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +286 0x0100 //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 #CASE_NAME HEADSET-GOOGLE_CONDOR-VOICE_GENERIC-FB -#PARAM_MODE FULL -#PARAM_TYPE TX+RX -#TOTAL_CUSTOM_STEP 7 +#PARAM_MODE Full +#PARAM_TYPE TX+2RX +#TOTAL_CUSTOM_STEP 7+7 #TX 0 0x0009 //TX_OPERATION_MODE_0 1 0x0009 //TX_OPERATION_MODE_1 @@ -12537,10 +18949,10 @@ 248 0xF600 //TX_THR_SN_EST_6 249 0xF600 //TX_THR_SN_EST_7 250 0x0200 //TX_DELTA_THR_SN_EST_0 -251 0x0200 //TX_DELTA_THR_SN_EST_1 -252 0x0400 //TX_DELTA_THR_SN_EST_2 -253 0x0300 //TX_DELTA_THR_SN_EST_3 -254 0x0600 //TX_DELTA_THR_SN_EST_4 +251 0x0400 //TX_DELTA_THR_SN_EST_1 +252 0x0300 //TX_DELTA_THR_SN_EST_2 +253 0x0600 //TX_DELTA_THR_SN_EST_3 +254 0x0200 //TX_DELTA_THR_SN_EST_4 255 0x0200 //TX_DELTA_THR_SN_EST_5 256 0x0200 //TX_DELTA_THR_SN_EST_6 257 0x0200 //TX_DELTA_THR_SN_EST_7 @@ -12568,31 +18980,31 @@ 279 0x2000 //TX_B_POST_FLT_0 280 0x2000 //TX_B_POST_FLT_1 281 0x0012 //TX_NS_LVL_CTRL_0 -282 0x0019 //TX_NS_LVL_CTRL_1 +282 0x0016 //TX_NS_LVL_CTRL_1 283 0x0016 //TX_NS_LVL_CTRL_2 -284 0x0016 //TX_NS_LVL_CTRL_3 -285 0x0019 //TX_NS_LVL_CTRL_4 +284 0x0019 //TX_NS_LVL_CTRL_3 +285 0x0010 //TX_NS_LVL_CTRL_4 286 0x0010 //TX_NS_LVL_CTRL_5 -287 0x0010 //TX_NS_LVL_CTRL_6 +287 0x0019 //TX_NS_LVL_CTRL_6 288 0x0010 //TX_NS_LVL_CTRL_7 289 0x000C //TX_MIN_GAIN_S_0 -290 0x0011 //TX_MIN_GAIN_S_1 +290 0x000C //TX_MIN_GAIN_S_1 291 0x000C //TX_MIN_GAIN_S_2 -292 0x000C //TX_MIN_GAIN_S_3 -293 0x000F //TX_MIN_GAIN_S_4 +292 0x000F //TX_MIN_GAIN_S_3 +293 0x000C //TX_MIN_GAIN_S_4 294 0x000C //TX_MIN_GAIN_S_5 -295 0x000C //TX_MIN_GAIN_S_6 +295 0x0011 //TX_MIN_GAIN_S_6 296 0x000C //TX_MIN_GAIN_S_7 297 0x7FFF //TX_NMOS_SUP 298 0x0000 //TX_NS_MAX_PRI_SNR_TH 299 0x0000 //TX_NMOS_SUP_MENSA 300 0x7000 //TX_SNRI_SUP_0 -301 0x6000 //TX_SNRI_SUP_1 +301 0x7000 //TX_SNRI_SUP_1 302 0x7000 //TX_SNRI_SUP_2 -303 0x7000 //TX_SNRI_SUP_3 -304 0x6000 //TX_SNRI_SUP_4 +303 0x6000 //TX_SNRI_SUP_3 +304 0x7FFF //TX_SNRI_SUP_4 305 0x7FFF //TX_SNRI_SUP_5 -306 0x7FFF //TX_SNRI_SUP_6 +306 0x6000 //TX_SNRI_SUP_6 307 0x7FFF //TX_SNRI_SUP_7 308 0x7FFF //TX_THR_LFNS 309 0x0016 //TX_G_LFNS @@ -12609,8 +19021,8 @@ 320 0x6000 //TX_A_POST_FILT_S_6 321 0x6000 //TX_A_POST_FILT_S_7 322 0x2000 //TX_B_POST_FILT_0 -323 0x2000 //TX_B_POST_FILT_1 -324 0x4000 //TX_B_POST_FILT_2 +323 0x4000 //TX_B_POST_FILT_1 +324 0x2000 //TX_B_POST_FILT_2 325 0x2000 //TX_B_POST_FILT_3 326 0x2000 //TX_B_POST_FILT_4 327 0x2000 //TX_B_POST_FILT_5 @@ -12653,7 +19065,7 @@ 364 0x0000 //TX_K_APT 365 0x0001 //TX_NOISEDET 366 0x0190 //TX_NDETCT -367 0x0020 //TX_NOISE_TH_0 +367 0x04E8 //TX_NOISE_TH_0 368 0x7FFF //TX_NOISE_TH_0_2 369 0x7FFF //TX_NOISE_TH_0_3 370 0x02A6 //TX_NOISE_TH_1 @@ -12665,11 +19077,11 @@ 376 0x0001 //TX_NOISE_TH_5_3 377 0x0000 //TX_NOISE_TH_5_4 378 0x02BC //TX_NOISE_TH_6 -379 0x0020 //TX_MINENOISE_TH -380 0x4000 //TX_MINENOISE_MIC0_TH_MTS -381 0xFFEE //TX_MINENOISE_MIC0_TH_EXP -382 0x6000 //TX_MINENOISE_MIC0_S_TH_MTS -383 0xFFF3 //TX_MINENOISE_MIC0_S_TH_EXP +379 0x02BC //TX_MINENOISE_TH +380 0xD508 //TX_MORENS_TFMASK_TH +381 0x0001 //TX_DRC_QUIET_FLOOR +382 0x3A98 //TX_RATIODTL_CUT_TH +383 0x1482 //TX_DT_CUT_K1 384 0x0666 //TX_OUT_ENER_S_TH_CLEAN 385 0x0666 //TX_OUT_ENER_S_TH_LESSCLEAN 386 0x0333 //TX_OUT_ENER_S_TH_NOISY @@ -12677,22 +19089,22 @@ 388 0x0333 //TX_OUT_ENER_TH_SPEECH 389 0x2000 //TX_SN_NPB_GAIN 390 0x0000 //TX_NN_NPB_GAIN -391 0x0000 //TX_CSX_ALPHA_0 -392 0x0000 //TX_CSX_ALPHA_1 -393 0x0000 //TX_CSX_ALPHA_2 -394 0x0000 //TX_CSX_ALPHA_3 -395 0x0800 //TX_MU_ARSP_EST -396 0x00C8 //TX_P_OUTBEAM_MIN_TH +391 0x7FFF //TX_POST_MASK_SUP_HSNE +392 0x1388 //TX_TAIL_DET_TH +393 0x4000 //TX_B_LESSCUT_RTO_WTA +394 0x0000 //TX_MEL_G_R +395 0x0080 //TX_SUPHIGH_TH +396 0x0000 //TX_MASK_G_R 397 0x0002 //TX_EXTRA_NS_L -398 0x0800 //TX_EXTRA_NS_A -399 0x0005 //TX_VR_NOISE_FLOOR_TH +398 0x1800 //TX_C_POST_FLT_MASK +399 0x7FFF //TX_A_POST_FLT_WNS 400 0x0148 //TX_MIN_G_LOW300HZ 401 0x0004 //TX_MAXLEVEL_CNG 402 0x00B4 //TX_STN_NOISE_TH 403 0x4000 //TX_POST_MASK_SUP 404 0x7FFF //TX_POST_MASK_ADJUST 405 0x00C8 //TX_NS_ENOISE_MIC0_TH -406 0x0020 //TX_MINENOISE_MIC0_TH +406 0x04E7 //TX_MINENOISE_MIC0_TH 407 0x012C //TX_MINENOISE_MIC0_S_TH 408 0x2900 //TX_MIN_G_CTRL_SSNS 409 0x0800 //TX_METAL_RTO_THR @@ -12800,16 +19212,16 @@ 511 0x6666 //TX_MIC_TO_BFGAIN 512 0x0000 //TX_MICTOBFGAIN0 513 0x0000 //TX_FASTMUE_TH -514 0x0000 //TX_DERVB_LEN_0 -515 0x0000 //TX_DERVB_LEN_1 -516 0x0000 //TX_RHO_DERVB -517 0x0000 //TX_MIC_INDX_DERVB -518 0x0000 //TX_MU_DERVB -519 0x0000 //TX_DR_RESRV_0 -520 0x0000 //TX_DR_RESRV_1 -521 0x0000 //TX_DR_RESRV_2 -522 0x0000 //TX_DR_RESRV_3 -523 0x0000 //TX_DR_RESRV_4 +514 0xC000 //TX_DEREVERB_LF_MU +515 0xC000 //TX_DEREVERB_HF_MU +516 0xCCCC //TX_DEREVERB_DELAY +517 0xD999 //TX_DEREVERB_COEF_LEN +518 0x1F40 //TX_DEREVERB_DNR +519 0x0000 //TX_DEREVERB_ALPHA +520 0x0000 //TX_DEREVERB_BETA +521 0x0000 //TX_GSC_RTOL_TH +522 0x7000 //TX_GSC_RTOH_TH +523 0x0064 //TX_WIDE2_MEANHTH 524 0x0000 //TX_DR_RESRV_5 525 0x0000 //TX_DR_RESRV_6 526 0x0000 //TX_DR_RESRV_7 @@ -13183,8 +19595,73 @@ 894 0xC000 //TX_FASTNS_SSA_THHFL 895 0xCCCC //TX_FASTNS_SSA_THLFH 896 0xD999 //TX_FASTNS_SSA_THHFH +897 0x2339 //TX_SENDFUNC_REG_MICMUTE +898 0x0021 //TX_SENDFUNC_REG_MICMUTE1 +899 0x02BC //TX_MICMUTE_RATIO_THR +900 0x0140 //TX_MICMUTE_AMP_THR +901 0x0004 //TX_MICMUTE_HPF_IND +902 0x00C0 //TX_MICMUTE_LOG_EYR_TH +903 0x0008 //TX_MICMUTE_CVG_TIME +904 0x0008 //TX_MICMUTE_RELEASE_TIME +905 0x01FE //TX_MIC_VOLUME_MIC0MUTE +906 0x0020 //TX_MICMUTE_EPD_OFFSET_0 +907 0x001E //TX_MICMUTE_FRQ_AEC_L +908 0x7999 //TX_MICMUTE_EAD_THR +909 0x7FFF //TX_MICMUTE_LAMBDA_CB_NLE +910 0x7FFF //TX_MICMUTE_LAMBDA_RE_EST +911 0x4000 //TX_DTD_THR1_MICMUTE_0 +912 0x7000 //TX_DTD_THR1_MICMUTE_1 +913 0x7FFF //TX_DTD_THR1_MICMUTE_2 +914 0x7FFF //TX_DTD_THR1_MICMUTE_3 +915 0x6CCC //TX_DTD_THR2_MICMUTE_0 +916 0x0400 //TX_MICMUTE_MIN_EQ_RE_EST_0 +917 0x0400 //TX_MICMUTE_MIN_EQ_RE_EST_1 +918 0x1000 //TX_MICMUTE_MIN_EQ_RE_EST_2 +919 0x7FFF //TX_MICMUTE_MIN_EQ_RE_EST_3 +920 0x7FFF //TX_MICMUTE_MIN_EQ_RE_EST_4 +921 0x4000 //TX_MICMUTE_C_POST_FLT +922 0x03E8 //TX_MICMUTE_DT_CUT_K +923 0x0001 //TX_MICMUTE_DT_CUT_THR +924 0x03E8 //TX_MICMUTE_DT_CUT_K2 +925 0x0001 //TX_MICMUTE_DT_CUT_THR2 +926 0x0064 //TX_MICMUTE_DT2_HOLD_N +927 0x1000 //TX_MICMUTE_RATIODTH_THCUT +928 0x1000 //TX_MICMUTE_B_POST_FLT_ECHOL +929 0x7FFF //TX_MICMUTE_B_POST_FLT_ECHOH +930 0x0400 //TX_MICMUTE_C_POST_FLT_MASK +931 0x7999 //TX_MICMUTE_RATIODTL_CUT_TH +932 0x0258 //TX_MICMUTE_DT_CUT_K1 +933 0x0800 //TX_MICMUTE_N2_SN_EST +934 0xFC00 //TX_MICMUTE_THR_SN_EST_0 +935 0x001C //TX_MICMUTE_MIN_G_CTRL_0 +936 0x6000 //TX_MICMUTE_A_POST_FILT_S_0 +937 0x7000 //TX_MICMUTE_B_POST_FILT_0 +938 0x2710 //TX_MIC1RUB_AMP_THR +939 0x0010 //TX_MIC1MUTE_RATIO_THR +940 0x0450 //TX_MIC1MUTE_AMP_THR +941 0x0008 //TX_MIC1MUTE_CVG_TIME +942 0x0008 //TX_MIC1MUTE_RELEASE_TIME +943 0x0000 //TX_AMS_RESRV_01 +944 0x0000 //TX_AMS_RESRV_02 +945 0x0000 //TX_AMS_RESRV_03 +946 0x0000 //TX_AMS_RESRV_04 +947 0x0000 //TX_AMS_RESRV_05 +948 0x0000 //TX_AMS_RESRV_06 +949 0x0000 //TX_AMS_RESRV_07 +950 0x0000 //TX_AMS_RESRV_08 +951 0x0000 //TX_AMS_RESRV_09 +952 0x0000 //TX_AMS_RESRV_10 +953 0x0000 //TX_AMS_RESRV_11 +954 0x0000 //TX_AMS_RESRV_12 +955 0x0000 //TX_AMS_RESRV_13 +956 0x0000 //TX_AMS_RESRV_14 +957 0x0000 //TX_AMS_RESRV_15 +958 0x0000 //TX_AMS_RESRV_16 +959 0x0000 //TX_AMS_RESRV_17 +960 0x0000 //TX_AMS_RESRV_18 +961 0x0000 //TX_AMS_RESRV_19 #RX -0 0x002C //RX_RECVFUNC_MODE_0 +0 0x202C //RX_RECVFUNC_MODE_0 1 0x0000 //RX_RECVFUNC_MODE_1 2 0x0004 //RX_SAMPLINGFREQ_SIG 3 0x0004 //RX_SAMPLINGFREQ_PROC @@ -14034,11 +20511,862 @@ 110 0x0000 //RX_FDDRC_RESRV_0 129 0x0100 //RX_SPK_VOL 130 0x0000 //RX_VOL_RESRV_0 +#RX 2 +157 0x202C //RX_RECVFUNC_MODE_0 +158 0x0000 //RX_RECVFUNC_MODE_1 +159 0x0004 //RX_SAMPLINGFREQ_SIG +160 0x0004 //RX_SAMPLINGFREQ_PROC +161 0x000A //RX_FRAME_SZ +162 0x0000 //RX_DELAY_OPT +163 0x1000 //RX_TDDRC_ALPHA_UP_1 +164 0x1000 //RX_TDDRC_ALPHA_UP_2 +165 0x1000 //RX_TDDRC_ALPHA_UP_3 +166 0x1000 //RX_TDDRC_ALPHA_UP_4 +167 0x0800 //RX_PGA +168 0x7B02 //RX_A_HP +169 0x4000 //RX_B_PE +170 0x7800 //RX_THR_PITCH_DET_0 +171 0x7000 //RX_THR_PITCH_DET_1 +172 0x6000 //RX_THR_PITCH_DET_2 +173 0x0008 //RX_PITCH_BFR_LEN +174 0x0003 //RX_SBD_PITCH_DET +175 0x0100 //RX_PP_RESRV_0 +176 0x0020 //RX_PP_RESRV_1 +177 0x0500 //RX_N_SN_EST +178 0x000C //RX_N2_SN_EST +179 0x000A //RX_NS_LVL_CTRL +180 0xF600 //RX_THR_SN_EST +181 0x7000 //RX_LAMBDA_PFILT +182 0x000A //RX_FENS_RESRV_0 +183 0x0190 //RX_FENS_RESRV_1 +184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +187 0x0002 //RX_EXTRA_NS_L +188 0x0800 //RX_EXTRA_NS_A +189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +190 0x7FFF //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +192 0x199A //RX_A_POST_FLT +193 0x0000 //RX_LMT_THRD +194 0x4000 //RX_LMT_ALPHA +195 0x0020 //RX_FDEQ_SUBNUM +196 0x4848 //RX_FDEQ_GAIN_0 +197 0x4848 //RX_FDEQ_GAIN_1 +198 0x4848 //RX_FDEQ_GAIN_2 +199 0x4848 //RX_FDEQ_GAIN_3 +200 0x4848 //RX_FDEQ_GAIN_4 +201 0x4848 //RX_FDEQ_GAIN_5 +202 0x4848 //RX_FDEQ_GAIN_6 +203 0x4848 //RX_FDEQ_GAIN_7 +204 0x4848 //RX_FDEQ_GAIN_8 +205 0x4848 //RX_FDEQ_GAIN_9 +206 0x4848 //RX_FDEQ_GAIN_10 +207 0x4848 //RX_FDEQ_GAIN_11 +208 0x4848 //RX_FDEQ_GAIN_12 +209 0x4848 //RX_FDEQ_GAIN_13 +210 0x4848 //RX_FDEQ_GAIN_14 +211 0x4848 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0202 //RX_FDEQ_BIN_0 +221 0x0203 //RX_FDEQ_BIN_1 +222 0x0304 //RX_FDEQ_BIN_2 +223 0x0405 //RX_FDEQ_BIN_3 +224 0x0607 //RX_FDEQ_BIN_4 +225 0x0809 //RX_FDEQ_BIN_5 +226 0x0A0B //RX_FDEQ_BIN_6 +227 0x0C0D //RX_FDEQ_BIN_7 +228 0x0E0F //RX_FDEQ_BIN_8 +229 0x1011 //RX_FDEQ_BIN_9 +230 0x1214 //RX_FDEQ_BIN_10 +231 0x1618 //RX_FDEQ_BIN_11 +232 0x1C1C //RX_FDEQ_BIN_12 +233 0x2020 //RX_FDEQ_BIN_13 +234 0x2020 //RX_FDEQ_BIN_14 +235 0x2011 //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x4000 //RX_FDEQ_RESRV_0 +245 0x0320 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0030 //RX_FDDRC_BAND_MARGIN_1 +248 0x0050 //RX_FDDRC_BAND_MARGIN_2 +249 0x0080 //RX_FDDRC_BAND_MARGIN_3 +250 0x0007 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x5000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x6400 //RX_FDDRC_THRD_3_2 +258 0x6400 //RX_FDDRC_THRD_3_3 +259 0x2000 //RX_FDDRC_SLANT_0_0 +260 0x2000 //RX_FDDRC_SLANT_0_1 +261 0x2000 //RX_FDDRC_SLANT_0_2 +262 0x2000 //RX_FDDRC_SLANT_0_3 +263 0x5333 //RX_FDDRC_SLANT_1_0 +264 0x5333 //RX_FDDRC_SLANT_1_1 +265 0x5333 //RX_FDDRC_SLANT_1_2 +266 0x5333 //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +268 0x0002 //RX_FILTINDX +269 0x0000 //RX_TDDRC_THRD_0 +270 0x0000 //RX_TDDRC_THRD_1 +271 0x1200 //RX_TDDRC_THRD_2 +272 0x1900 //RX_TDDRC_THRD_3 +273 0x3000 //RX_TDDRC_SLANT_0 +274 0x6E00 //RX_TDDRC_SLANT_1 +275 0x1000 //RX_TDDRC_ALPHA_UP_0 +276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x199A //RX_TDDRC_HMNC_GAIN +279 0x0001 //RX_TDDRC_SMT_FLAG +280 0x0CCD //RX_TDDRC_SMT_W +281 0x0240 //RX_TDDRC_DRC_GAIN +282 0x7C00 //RX_LAMBDA_PKA_FP +283 0x2000 //RX_TPKA_FP +284 0x2000 //RX_MIN_G_FP +285 0x0080 //RX_MAX_G_FP +286 0x000B //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 +288 0x0000 //RX_MAXLEVEL_CNG +289 0x3000 //RX_BWE_UV_TH +290 0x3000 //RX_BWE_UV_TH2 +291 0x1800 //RX_BWE_UV_TH3 +292 0x1000 //RX_BWE_V_TH +293 0x04CD //RX_BWE_GAIN1_V_TH1 +294 0x0F33 //RX_BWE_GAIN1_V_TH2 +295 0x7333 //RX_BWE_UV_EQ +296 0x199A //RX_BWE_V_EQ +297 0x7333 //RX_BWE_TONE_TH +298 0x0004 //RX_BWE_UV_HOLD_T +299 0x6CCD //RX_BWE_GAIN2_ALPHA +300 0x799A //RX_BWE_GAIN3_ALPHA +301 0x001E //RX_BWE_CUTOFF +302 0x3000 //RX_BWE_GAINFILL +303 0x3200 //RX_BWE_MAXTH_TONE +304 0x2000 //RX_BWE_EQ_0 +305 0x2000 //RX_BWE_EQ_1 +306 0x2000 //RX_BWE_EQ_2 +307 0x2000 //RX_BWE_EQ_3 +308 0x2000 //RX_BWE_EQ_4 +309 0x2000 //RX_BWE_EQ_5 +310 0x2000 //RX_BWE_EQ_6 +311 0x0000 //RX_BWE_RESRV_0 +312 0x0000 //RX_BWE_RESRV_1 +313 0x0000 //RX_BWE_RESRV_2 +#VOL 0 +163 0x1000 //RX_TDDRC_ALPHA_UP_1 +164 0x1000 //RX_TDDRC_ALPHA_UP_2 +165 0x1000 //RX_TDDRC_ALPHA_UP_3 +166 0x1000 //RX_TDDRC_ALPHA_UP_4 +184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +190 0x7FFF //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +269 0x0000 //RX_TDDRC_THRD_0 +270 0x0000 //RX_TDDRC_THRD_1 +271 0x1200 //RX_TDDRC_THRD_2 +272 0x1900 //RX_TDDRC_THRD_3 +273 0x3000 //RX_TDDRC_SLANT_0 +274 0x6E00 //RX_TDDRC_SLANT_1 +275 0x1000 //RX_TDDRC_ALPHA_UP_0 +276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x199A //RX_TDDRC_HMNC_GAIN +279 0x0001 //RX_TDDRC_SMT_FLAG +280 0x0CCD //RX_TDDRC_SMT_W +281 0x0240 //RX_TDDRC_DRC_GAIN +195 0x0020 //RX_FDEQ_SUBNUM +196 0x4848 //RX_FDEQ_GAIN_0 +197 0x4848 //RX_FDEQ_GAIN_1 +198 0x4848 //RX_FDEQ_GAIN_2 +199 0x4848 //RX_FDEQ_GAIN_3 +200 0x4848 //RX_FDEQ_GAIN_4 +201 0x4848 //RX_FDEQ_GAIN_5 +202 0x4848 //RX_FDEQ_GAIN_6 +203 0x4848 //RX_FDEQ_GAIN_7 +204 0x4848 //RX_FDEQ_GAIN_8 +205 0x4848 //RX_FDEQ_GAIN_9 +206 0x4848 //RX_FDEQ_GAIN_10 +207 0x4848 //RX_FDEQ_GAIN_11 +208 0x4848 //RX_FDEQ_GAIN_12 +209 0x4848 //RX_FDEQ_GAIN_13 +210 0x4848 //RX_FDEQ_GAIN_14 +211 0x4848 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0202 //RX_FDEQ_BIN_0 +221 0x0203 //RX_FDEQ_BIN_1 +222 0x0304 //RX_FDEQ_BIN_2 +223 0x0405 //RX_FDEQ_BIN_3 +224 0x0607 //RX_FDEQ_BIN_4 +225 0x0809 //RX_FDEQ_BIN_5 +226 0x0A0B //RX_FDEQ_BIN_6 +227 0x0C0D //RX_FDEQ_BIN_7 +228 0x0E0F //RX_FDEQ_BIN_8 +229 0x1011 //RX_FDEQ_BIN_9 +230 0x1214 //RX_FDEQ_BIN_10 +231 0x1618 //RX_FDEQ_BIN_11 +232 0x1C1C //RX_FDEQ_BIN_12 +233 0x2020 //RX_FDEQ_BIN_13 +234 0x2020 //RX_FDEQ_BIN_14 +235 0x2011 //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x4000 //RX_FDEQ_RESRV_0 +245 0x0320 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0030 //RX_FDDRC_BAND_MARGIN_1 +248 0x0050 //RX_FDDRC_BAND_MARGIN_2 +249 0x0080 //RX_FDDRC_BAND_MARGIN_3 +250 0x0007 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x5000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x6400 //RX_FDDRC_THRD_3_2 +258 0x6400 //RX_FDDRC_THRD_3_3 +259 0x2000 //RX_FDDRC_SLANT_0_0 +260 0x2000 //RX_FDDRC_SLANT_0_1 +261 0x2000 //RX_FDDRC_SLANT_0_2 +262 0x2000 //RX_FDDRC_SLANT_0_3 +263 0x5333 //RX_FDDRC_SLANT_1_0 +264 0x5333 //RX_FDDRC_SLANT_1_1 +265 0x5333 //RX_FDDRC_SLANT_1_2 +266 0x5333 //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +286 0x000B //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 +#VOL 1 +163 0x1000 //RX_TDDRC_ALPHA_UP_1 +164 0x1000 //RX_TDDRC_ALPHA_UP_2 +165 0x1000 //RX_TDDRC_ALPHA_UP_3 +166 0x1000 //RX_TDDRC_ALPHA_UP_4 +184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +190 0x7FFF //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +269 0x0000 //RX_TDDRC_THRD_0 +270 0x0000 //RX_TDDRC_THRD_1 +271 0x1200 //RX_TDDRC_THRD_2 +272 0x1900 //RX_TDDRC_THRD_3 +273 0x3000 //RX_TDDRC_SLANT_0 +274 0x6E00 //RX_TDDRC_SLANT_1 +275 0x1000 //RX_TDDRC_ALPHA_UP_0 +276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x199A //RX_TDDRC_HMNC_GAIN +279 0x0001 //RX_TDDRC_SMT_FLAG +280 0x0CCD //RX_TDDRC_SMT_W +281 0x0240 //RX_TDDRC_DRC_GAIN +195 0x0020 //RX_FDEQ_SUBNUM +196 0x4848 //RX_FDEQ_GAIN_0 +197 0x4848 //RX_FDEQ_GAIN_1 +198 0x4848 //RX_FDEQ_GAIN_2 +199 0x4848 //RX_FDEQ_GAIN_3 +200 0x4848 //RX_FDEQ_GAIN_4 +201 0x4848 //RX_FDEQ_GAIN_5 +202 0x4848 //RX_FDEQ_GAIN_6 +203 0x4848 //RX_FDEQ_GAIN_7 +204 0x4848 //RX_FDEQ_GAIN_8 +205 0x4848 //RX_FDEQ_GAIN_9 +206 0x4848 //RX_FDEQ_GAIN_10 +207 0x4848 //RX_FDEQ_GAIN_11 +208 0x4848 //RX_FDEQ_GAIN_12 +209 0x4848 //RX_FDEQ_GAIN_13 +210 0x4848 //RX_FDEQ_GAIN_14 +211 0x4848 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0202 //RX_FDEQ_BIN_0 +221 0x0203 //RX_FDEQ_BIN_1 +222 0x0304 //RX_FDEQ_BIN_2 +223 0x0405 //RX_FDEQ_BIN_3 +224 0x0607 //RX_FDEQ_BIN_4 +225 0x0809 //RX_FDEQ_BIN_5 +226 0x0A0B //RX_FDEQ_BIN_6 +227 0x0C0D //RX_FDEQ_BIN_7 +228 0x0E0F //RX_FDEQ_BIN_8 +229 0x1011 //RX_FDEQ_BIN_9 +230 0x1214 //RX_FDEQ_BIN_10 +231 0x1618 //RX_FDEQ_BIN_11 +232 0x1C1C //RX_FDEQ_BIN_12 +233 0x2020 //RX_FDEQ_BIN_13 +234 0x2020 //RX_FDEQ_BIN_14 +235 0x2011 //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x4000 //RX_FDEQ_RESRV_0 +245 0x0320 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0030 //RX_FDDRC_BAND_MARGIN_1 +248 0x0050 //RX_FDDRC_BAND_MARGIN_2 +249 0x0080 //RX_FDDRC_BAND_MARGIN_3 +250 0x0007 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x5000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x6400 //RX_FDDRC_THRD_3_2 +258 0x6400 //RX_FDDRC_THRD_3_3 +259 0x2000 //RX_FDDRC_SLANT_0_0 +260 0x2000 //RX_FDDRC_SLANT_0_1 +261 0x2000 //RX_FDDRC_SLANT_0_2 +262 0x2000 //RX_FDDRC_SLANT_0_3 +263 0x5333 //RX_FDDRC_SLANT_1_0 +264 0x5333 //RX_FDDRC_SLANT_1_1 +265 0x5333 //RX_FDDRC_SLANT_1_2 +266 0x5333 //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +286 0x0013 //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 +#VOL 2 +163 0x1000 //RX_TDDRC_ALPHA_UP_1 +164 0x1000 //RX_TDDRC_ALPHA_UP_2 +165 0x1000 //RX_TDDRC_ALPHA_UP_3 +166 0x1000 //RX_TDDRC_ALPHA_UP_4 +184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +190 0x7FFF //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +269 0x0000 //RX_TDDRC_THRD_0 +270 0x0000 //RX_TDDRC_THRD_1 +271 0x1200 //RX_TDDRC_THRD_2 +272 0x1900 //RX_TDDRC_THRD_3 +273 0x3000 //RX_TDDRC_SLANT_0 +274 0x6E00 //RX_TDDRC_SLANT_1 +275 0x1000 //RX_TDDRC_ALPHA_UP_0 +276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x199A //RX_TDDRC_HMNC_GAIN +279 0x0001 //RX_TDDRC_SMT_FLAG +280 0x0CCD //RX_TDDRC_SMT_W +281 0x0240 //RX_TDDRC_DRC_GAIN +195 0x0020 //RX_FDEQ_SUBNUM +196 0x4848 //RX_FDEQ_GAIN_0 +197 0x4848 //RX_FDEQ_GAIN_1 +198 0x4848 //RX_FDEQ_GAIN_2 +199 0x4848 //RX_FDEQ_GAIN_3 +200 0x4848 //RX_FDEQ_GAIN_4 +201 0x4848 //RX_FDEQ_GAIN_5 +202 0x4848 //RX_FDEQ_GAIN_6 +203 0x4848 //RX_FDEQ_GAIN_7 +204 0x4848 //RX_FDEQ_GAIN_8 +205 0x4848 //RX_FDEQ_GAIN_9 +206 0x4848 //RX_FDEQ_GAIN_10 +207 0x4848 //RX_FDEQ_GAIN_11 +208 0x4848 //RX_FDEQ_GAIN_12 +209 0x4848 //RX_FDEQ_GAIN_13 +210 0x4848 //RX_FDEQ_GAIN_14 +211 0x4848 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0202 //RX_FDEQ_BIN_0 +221 0x0203 //RX_FDEQ_BIN_1 +222 0x0304 //RX_FDEQ_BIN_2 +223 0x0405 //RX_FDEQ_BIN_3 +224 0x0607 //RX_FDEQ_BIN_4 +225 0x0809 //RX_FDEQ_BIN_5 +226 0x0A0B //RX_FDEQ_BIN_6 +227 0x0C0D //RX_FDEQ_BIN_7 +228 0x0E0F //RX_FDEQ_BIN_8 +229 0x1011 //RX_FDEQ_BIN_9 +230 0x1214 //RX_FDEQ_BIN_10 +231 0x1618 //RX_FDEQ_BIN_11 +232 0x1C1C //RX_FDEQ_BIN_12 +233 0x2020 //RX_FDEQ_BIN_13 +234 0x2020 //RX_FDEQ_BIN_14 +235 0x2011 //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x4000 //RX_FDEQ_RESRV_0 +245 0x0320 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0030 //RX_FDDRC_BAND_MARGIN_1 +248 0x0050 //RX_FDDRC_BAND_MARGIN_2 +249 0x0080 //RX_FDDRC_BAND_MARGIN_3 +250 0x0007 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x5000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x6400 //RX_FDDRC_THRD_3_2 +258 0x6400 //RX_FDDRC_THRD_3_3 +259 0x2000 //RX_FDDRC_SLANT_0_0 +260 0x2000 //RX_FDDRC_SLANT_0_1 +261 0x2000 //RX_FDDRC_SLANT_0_2 +262 0x2000 //RX_FDDRC_SLANT_0_3 +263 0x5333 //RX_FDDRC_SLANT_1_0 +264 0x5333 //RX_FDDRC_SLANT_1_1 +265 0x5333 //RX_FDDRC_SLANT_1_2 +266 0x5333 //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +286 0x0020 //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 +#VOL 3 +163 0x1000 //RX_TDDRC_ALPHA_UP_1 +164 0x1000 //RX_TDDRC_ALPHA_UP_2 +165 0x1000 //RX_TDDRC_ALPHA_UP_3 +166 0x1000 //RX_TDDRC_ALPHA_UP_4 +184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +190 0x7FFF //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +269 0x0000 //RX_TDDRC_THRD_0 +270 0x0000 //RX_TDDRC_THRD_1 +271 0x1200 //RX_TDDRC_THRD_2 +272 0x1900 //RX_TDDRC_THRD_3 +273 0x3000 //RX_TDDRC_SLANT_0 +274 0x6E00 //RX_TDDRC_SLANT_1 +275 0x1000 //RX_TDDRC_ALPHA_UP_0 +276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x199A //RX_TDDRC_HMNC_GAIN +279 0x0001 //RX_TDDRC_SMT_FLAG +280 0x0CCD //RX_TDDRC_SMT_W +281 0x0240 //RX_TDDRC_DRC_GAIN +195 0x0020 //RX_FDEQ_SUBNUM +196 0x4848 //RX_FDEQ_GAIN_0 +197 0x4848 //RX_FDEQ_GAIN_1 +198 0x4848 //RX_FDEQ_GAIN_2 +199 0x4848 //RX_FDEQ_GAIN_3 +200 0x4848 //RX_FDEQ_GAIN_4 +201 0x4848 //RX_FDEQ_GAIN_5 +202 0x4848 //RX_FDEQ_GAIN_6 +203 0x4848 //RX_FDEQ_GAIN_7 +204 0x4848 //RX_FDEQ_GAIN_8 +205 0x4848 //RX_FDEQ_GAIN_9 +206 0x4848 //RX_FDEQ_GAIN_10 +207 0x4848 //RX_FDEQ_GAIN_11 +208 0x4848 //RX_FDEQ_GAIN_12 +209 0x4848 //RX_FDEQ_GAIN_13 +210 0x4848 //RX_FDEQ_GAIN_14 +211 0x4848 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0202 //RX_FDEQ_BIN_0 +221 0x0203 //RX_FDEQ_BIN_1 +222 0x0304 //RX_FDEQ_BIN_2 +223 0x0405 //RX_FDEQ_BIN_3 +224 0x0607 //RX_FDEQ_BIN_4 +225 0x0809 //RX_FDEQ_BIN_5 +226 0x0A0B //RX_FDEQ_BIN_6 +227 0x0C0D //RX_FDEQ_BIN_7 +228 0x0E0F //RX_FDEQ_BIN_8 +229 0x1011 //RX_FDEQ_BIN_9 +230 0x1214 //RX_FDEQ_BIN_10 +231 0x1618 //RX_FDEQ_BIN_11 +232 0x1C1C //RX_FDEQ_BIN_12 +233 0x2020 //RX_FDEQ_BIN_13 +234 0x2020 //RX_FDEQ_BIN_14 +235 0x2011 //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x4000 //RX_FDEQ_RESRV_0 +245 0x0320 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0030 //RX_FDDRC_BAND_MARGIN_1 +248 0x0050 //RX_FDDRC_BAND_MARGIN_2 +249 0x0080 //RX_FDDRC_BAND_MARGIN_3 +250 0x0007 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x5000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x6400 //RX_FDDRC_THRD_3_2 +258 0x6400 //RX_FDDRC_THRD_3_3 +259 0x2000 //RX_FDDRC_SLANT_0_0 +260 0x2000 //RX_FDDRC_SLANT_0_1 +261 0x2000 //RX_FDDRC_SLANT_0_2 +262 0x2000 //RX_FDDRC_SLANT_0_3 +263 0x5333 //RX_FDDRC_SLANT_1_0 +264 0x5333 //RX_FDDRC_SLANT_1_1 +265 0x5333 //RX_FDDRC_SLANT_1_2 +266 0x5333 //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +286 0x0036 //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 +#VOL 4 +163 0x1000 //RX_TDDRC_ALPHA_UP_1 +164 0x1000 //RX_TDDRC_ALPHA_UP_2 +165 0x1000 //RX_TDDRC_ALPHA_UP_3 +166 0x1000 //RX_TDDRC_ALPHA_UP_4 +184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +190 0x7FFF //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +269 0x0000 //RX_TDDRC_THRD_0 +270 0x0000 //RX_TDDRC_THRD_1 +271 0x1200 //RX_TDDRC_THRD_2 +272 0x1900 //RX_TDDRC_THRD_3 +273 0x3000 //RX_TDDRC_SLANT_0 +274 0x6E00 //RX_TDDRC_SLANT_1 +275 0x1000 //RX_TDDRC_ALPHA_UP_0 +276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x199A //RX_TDDRC_HMNC_GAIN +279 0x0001 //RX_TDDRC_SMT_FLAG +280 0x0CCD //RX_TDDRC_SMT_W +281 0x0240 //RX_TDDRC_DRC_GAIN +195 0x0020 //RX_FDEQ_SUBNUM +196 0x4848 //RX_FDEQ_GAIN_0 +197 0x4848 //RX_FDEQ_GAIN_1 +198 0x4848 //RX_FDEQ_GAIN_2 +199 0x4848 //RX_FDEQ_GAIN_3 +200 0x4848 //RX_FDEQ_GAIN_4 +201 0x4848 //RX_FDEQ_GAIN_5 +202 0x4848 //RX_FDEQ_GAIN_6 +203 0x4848 //RX_FDEQ_GAIN_7 +204 0x4848 //RX_FDEQ_GAIN_8 +205 0x4848 //RX_FDEQ_GAIN_9 +206 0x4848 //RX_FDEQ_GAIN_10 +207 0x4848 //RX_FDEQ_GAIN_11 +208 0x4848 //RX_FDEQ_GAIN_12 +209 0x4848 //RX_FDEQ_GAIN_13 +210 0x4848 //RX_FDEQ_GAIN_14 +211 0x4848 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0202 //RX_FDEQ_BIN_0 +221 0x0203 //RX_FDEQ_BIN_1 +222 0x0304 //RX_FDEQ_BIN_2 +223 0x0405 //RX_FDEQ_BIN_3 +224 0x0607 //RX_FDEQ_BIN_4 +225 0x0809 //RX_FDEQ_BIN_5 +226 0x0A0B //RX_FDEQ_BIN_6 +227 0x0C0D //RX_FDEQ_BIN_7 +228 0x0E0F //RX_FDEQ_BIN_8 +229 0x1011 //RX_FDEQ_BIN_9 +230 0x1214 //RX_FDEQ_BIN_10 +231 0x1618 //RX_FDEQ_BIN_11 +232 0x1C1C //RX_FDEQ_BIN_12 +233 0x2020 //RX_FDEQ_BIN_13 +234 0x2020 //RX_FDEQ_BIN_14 +235 0x2011 //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x4000 //RX_FDEQ_RESRV_0 +245 0x0320 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0030 //RX_FDDRC_BAND_MARGIN_1 +248 0x0050 //RX_FDDRC_BAND_MARGIN_2 +249 0x0080 //RX_FDDRC_BAND_MARGIN_3 +250 0x0007 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x5000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x6400 //RX_FDDRC_THRD_3_2 +258 0x6400 //RX_FDDRC_THRD_3_3 +259 0x2000 //RX_FDDRC_SLANT_0_0 +260 0x2000 //RX_FDDRC_SLANT_0_1 +261 0x2000 //RX_FDDRC_SLANT_0_2 +262 0x2000 //RX_FDDRC_SLANT_0_3 +263 0x5333 //RX_FDDRC_SLANT_1_0 +264 0x5333 //RX_FDDRC_SLANT_1_1 +265 0x5333 //RX_FDDRC_SLANT_1_2 +266 0x5333 //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +286 0x005B //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 +#VOL 5 +163 0x1000 //RX_TDDRC_ALPHA_UP_1 +164 0x1000 //RX_TDDRC_ALPHA_UP_2 +165 0x1000 //RX_TDDRC_ALPHA_UP_3 +166 0x1000 //RX_TDDRC_ALPHA_UP_4 +184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +190 0x7FFF //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +269 0x0000 //RX_TDDRC_THRD_0 +270 0x0000 //RX_TDDRC_THRD_1 +271 0x1200 //RX_TDDRC_THRD_2 +272 0x1900 //RX_TDDRC_THRD_3 +273 0x3000 //RX_TDDRC_SLANT_0 +274 0x6E00 //RX_TDDRC_SLANT_1 +275 0x1000 //RX_TDDRC_ALPHA_UP_0 +276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x199A //RX_TDDRC_HMNC_GAIN +279 0x0001 //RX_TDDRC_SMT_FLAG +280 0x0CCD //RX_TDDRC_SMT_W +281 0x0240 //RX_TDDRC_DRC_GAIN +195 0x0020 //RX_FDEQ_SUBNUM +196 0x4848 //RX_FDEQ_GAIN_0 +197 0x4848 //RX_FDEQ_GAIN_1 +198 0x4848 //RX_FDEQ_GAIN_2 +199 0x4848 //RX_FDEQ_GAIN_3 +200 0x4848 //RX_FDEQ_GAIN_4 +201 0x4848 //RX_FDEQ_GAIN_5 +202 0x4848 //RX_FDEQ_GAIN_6 +203 0x4848 //RX_FDEQ_GAIN_7 +204 0x4848 //RX_FDEQ_GAIN_8 +205 0x4848 //RX_FDEQ_GAIN_9 +206 0x4848 //RX_FDEQ_GAIN_10 +207 0x4848 //RX_FDEQ_GAIN_11 +208 0x4848 //RX_FDEQ_GAIN_12 +209 0x4848 //RX_FDEQ_GAIN_13 +210 0x4848 //RX_FDEQ_GAIN_14 +211 0x4848 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0202 //RX_FDEQ_BIN_0 +221 0x0203 //RX_FDEQ_BIN_1 +222 0x0304 //RX_FDEQ_BIN_2 +223 0x0405 //RX_FDEQ_BIN_3 +224 0x0607 //RX_FDEQ_BIN_4 +225 0x0809 //RX_FDEQ_BIN_5 +226 0x0A0B //RX_FDEQ_BIN_6 +227 0x0C0D //RX_FDEQ_BIN_7 +228 0x0E0F //RX_FDEQ_BIN_8 +229 0x1011 //RX_FDEQ_BIN_9 +230 0x1214 //RX_FDEQ_BIN_10 +231 0x1618 //RX_FDEQ_BIN_11 +232 0x1C1C //RX_FDEQ_BIN_12 +233 0x2020 //RX_FDEQ_BIN_13 +234 0x2020 //RX_FDEQ_BIN_14 +235 0x2011 //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x4000 //RX_FDEQ_RESRV_0 +245 0x0320 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0030 //RX_FDDRC_BAND_MARGIN_1 +248 0x0050 //RX_FDDRC_BAND_MARGIN_2 +249 0x0080 //RX_FDDRC_BAND_MARGIN_3 +250 0x0007 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x5000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x6400 //RX_FDDRC_THRD_3_2 +258 0x6400 //RX_FDDRC_THRD_3_3 +259 0x2000 //RX_FDDRC_SLANT_0_0 +260 0x2000 //RX_FDDRC_SLANT_0_1 +261 0x2000 //RX_FDDRC_SLANT_0_2 +262 0x2000 //RX_FDDRC_SLANT_0_3 +263 0x5333 //RX_FDDRC_SLANT_1_0 +264 0x5333 //RX_FDDRC_SLANT_1_1 +265 0x5333 //RX_FDDRC_SLANT_1_2 +266 0x5333 //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +286 0x0099 //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 +#VOL 6 +163 0x1000 //RX_TDDRC_ALPHA_UP_1 +164 0x1000 //RX_TDDRC_ALPHA_UP_2 +165 0x1000 //RX_TDDRC_ALPHA_UP_3 +166 0x1000 //RX_TDDRC_ALPHA_UP_4 +184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +190 0x7FFF //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +269 0x0000 //RX_TDDRC_THRD_0 +270 0x0000 //RX_TDDRC_THRD_1 +271 0x1200 //RX_TDDRC_THRD_2 +272 0x1900 //RX_TDDRC_THRD_3 +273 0x3000 //RX_TDDRC_SLANT_0 +274 0x6E00 //RX_TDDRC_SLANT_1 +275 0x1000 //RX_TDDRC_ALPHA_UP_0 +276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x199A //RX_TDDRC_HMNC_GAIN +279 0x0001 //RX_TDDRC_SMT_FLAG +280 0x0CCD //RX_TDDRC_SMT_W +281 0x0240 //RX_TDDRC_DRC_GAIN +195 0x0020 //RX_FDEQ_SUBNUM +196 0x4848 //RX_FDEQ_GAIN_0 +197 0x4848 //RX_FDEQ_GAIN_1 +198 0x4848 //RX_FDEQ_GAIN_2 +199 0x4848 //RX_FDEQ_GAIN_3 +200 0x4848 //RX_FDEQ_GAIN_4 +201 0x4848 //RX_FDEQ_GAIN_5 +202 0x4848 //RX_FDEQ_GAIN_6 +203 0x4848 //RX_FDEQ_GAIN_7 +204 0x4848 //RX_FDEQ_GAIN_8 +205 0x4848 //RX_FDEQ_GAIN_9 +206 0x4848 //RX_FDEQ_GAIN_10 +207 0x4848 //RX_FDEQ_GAIN_11 +208 0x4848 //RX_FDEQ_GAIN_12 +209 0x4848 //RX_FDEQ_GAIN_13 +210 0x4848 //RX_FDEQ_GAIN_14 +211 0x4848 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0202 //RX_FDEQ_BIN_0 +221 0x0203 //RX_FDEQ_BIN_1 +222 0x0304 //RX_FDEQ_BIN_2 +223 0x0405 //RX_FDEQ_BIN_3 +224 0x0607 //RX_FDEQ_BIN_4 +225 0x0809 //RX_FDEQ_BIN_5 +226 0x0A0B //RX_FDEQ_BIN_6 +227 0x0C0D //RX_FDEQ_BIN_7 +228 0x0E0F //RX_FDEQ_BIN_8 +229 0x1011 //RX_FDEQ_BIN_9 +230 0x1214 //RX_FDEQ_BIN_10 +231 0x1618 //RX_FDEQ_BIN_11 +232 0x1C1C //RX_FDEQ_BIN_12 +233 0x2020 //RX_FDEQ_BIN_13 +234 0x2020 //RX_FDEQ_BIN_14 +235 0x2011 //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x4000 //RX_FDEQ_RESRV_0 +245 0x0320 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0030 //RX_FDDRC_BAND_MARGIN_1 +248 0x0050 //RX_FDDRC_BAND_MARGIN_2 +249 0x0080 //RX_FDDRC_BAND_MARGIN_3 +250 0x0007 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x5000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x6400 //RX_FDDRC_THRD_3_2 +258 0x6400 //RX_FDDRC_THRD_3_3 +259 0x2000 //RX_FDDRC_SLANT_0_0 +260 0x2000 //RX_FDDRC_SLANT_0_1 +261 0x2000 //RX_FDDRC_SLANT_0_2 +262 0x2000 //RX_FDDRC_SLANT_0_3 +263 0x5333 //RX_FDDRC_SLANT_1_0 +264 0x5333 //RX_FDDRC_SLANT_1_1 +265 0x5333 //RX_FDDRC_SLANT_1_2 +266 0x5333 //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +286 0x0100 //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 #CASE_NAME HEADSET-RESERVE1-VOICE_GENERIC-NB -#PARAM_MODE FULL -#PARAM_TYPE TX+RX -#TOTAL_CUSTOM_STEP 7 +#PARAM_MODE Full +#PARAM_TYPE TX+2RX +#TOTAL_CUSTOM_STEP 7+7 #TX 0 0x0009 //TX_OPERATION_MODE_0 1 0x0008 //TX_OPERATION_MODE_1 @@ -14355,20 +21683,20 @@ 312 0x7FFF //TX_A_POST_FILT_0 313 0x2000 //TX_A_POST_FILT_1 314 0x4000 //TX_A_POST_FILT_S_0 -315 0x4000 //TX_A_POST_FILT_S_1 -316 0x1000 //TX_A_POST_FILT_S_2 +315 0x1000 //TX_A_POST_FILT_S_1 +316 0x4000 //TX_A_POST_FILT_S_2 317 0x4000 //TX_A_POST_FILT_S_3 318 0x4000 //TX_A_POST_FILT_S_4 319 0x4000 //TX_A_POST_FILT_S_5 320 0x4000 //TX_A_POST_FILT_S_6 321 0x4000 //TX_A_POST_FILT_S_7 322 0x0400 //TX_B_POST_FILT_0 -323 0x0400 //TX_B_POST_FILT_1 +323 0x2000 //TX_B_POST_FILT_1 324 0x2000 //TX_B_POST_FILT_2 325 0x2000 //TX_B_POST_FILT_3 326 0x2000 //TX_B_POST_FILT_4 327 0x2000 //TX_B_POST_FILT_5 -328 0x2000 //TX_B_POST_FILT_6 +328 0x0400 //TX_B_POST_FILT_6 329 0x2000 //TX_B_POST_FILT_7 330 0x7FFF //TX_B_LESSCUT_RTO_S_0 331 0x7FFF //TX_B_LESSCUT_RTO_S_1 @@ -14407,7 +21735,7 @@ 364 0x0000 //TX_K_APT 365 0x0001 //TX_NOISEDET 366 0x0190 //TX_NDETCT -367 0x000A //TX_NOISE_TH_0 +367 0x003B //TX_NOISE_TH_0 368 0x1B58 //TX_NOISE_TH_0_2 369 0x2134 //TX_NOISE_TH_0_3 370 0x02BC //TX_NOISE_TH_1 @@ -14419,11 +21747,11 @@ 376 0x0000 //TX_NOISE_TH_5_3 377 0x0000 //TX_NOISE_TH_5_4 378 0x0032 //TX_NOISE_TH_6 -379 0x0014 //TX_MINENOISE_TH -380 0x4000 //TX_MINENOISE_MIC0_TH_MTS -381 0xFFEE //TX_MINENOISE_MIC0_TH_EXP -382 0x6000 //TX_MINENOISE_MIC0_S_TH_MTS -383 0xFFF3 //TX_MINENOISE_MIC0_S_TH_EXP +379 0x00C8 //TX_MINENOISE_TH +380 0xD508 //TX_MORENS_TFMASK_TH +381 0x0001 //TX_DRC_QUIET_FLOOR +382 0x3A98 //TX_RATIODTL_CUT_TH +383 0x0DAC //TX_DT_CUT_K1 384 0x00A5 //TX_OUT_ENER_S_TH_CLEAN 385 0x00A5 //TX_OUT_ENER_S_TH_LESSCLEAN 386 0x00A5 //TX_OUT_ENER_S_TH_NOISY @@ -14431,22 +21759,22 @@ 388 0x00CE //TX_OUT_ENER_TH_SPEECH 389 0x2000 //TX_SN_NPB_GAIN 390 0x0000 //TX_NN_NPB_GAIN -391 0x0000 //TX_CSX_ALPHA_0 -392 0x0000 //TX_CSX_ALPHA_1 -393 0x0000 //TX_CSX_ALPHA_2 -394 0x0000 //TX_CSX_ALPHA_3 -395 0x0800 //TX_MU_ARSP_EST -396 0x00C8 //TX_P_OUTBEAM_MIN_TH +391 0x7FFF //TX_POST_MASK_SUP_HSNE +392 0x1388 //TX_TAIL_DET_TH +393 0x4000 //TX_B_LESSCUT_RTO_WTA +394 0x0000 //TX_MEL_G_R +395 0x0080 //TX_SUPHIGH_TH +396 0x0000 //TX_MASK_G_R 397 0x0002 //TX_EXTRA_NS_L -398 0x0800 //TX_EXTRA_NS_A -399 0x0005 //TX_VR_NOISE_FLOOR_TH +398 0x1800 //TX_C_POST_FLT_MASK +399 0x7FFF //TX_A_POST_FLT_WNS 400 0x0148 //TX_MIN_G_LOW300HZ 401 0x0002 //TX_MAXLEVEL_CNG 402 0x00B4 //TX_STN_NOISE_TH 403 0x4000 //TX_POST_MASK_SUP 404 0x7FFF //TX_POST_MASK_ADJUST 405 0x00C8 //TX_NS_ENOISE_MIC0_TH -406 0x0014 //TX_MINENOISE_MIC0_TH +406 0x0032 //TX_MINENOISE_MIC0_TH 407 0x012C //TX_MINENOISE_MIC0_S_TH 408 0x7FFF //TX_MIN_G_CTRL_SSNS 409 0x0000 //TX_METAL_RTO_THR @@ -14554,16 +21882,16 @@ 511 0x6666 //TX_MIC_TO_BFGAIN 512 0x0000 //TX_MICTOBFGAIN0 513 0x0000 //TX_FASTMUE_TH -514 0x0000 //TX_DERVB_LEN_0 -515 0x0000 //TX_DERVB_LEN_1 -516 0x0000 //TX_RHO_DERVB -517 0x0000 //TX_MIC_INDX_DERVB -518 0x0000 //TX_MU_DERVB -519 0x0000 //TX_DR_RESRV_0 -520 0x0000 //TX_DR_RESRV_1 -521 0x0000 //TX_DR_RESRV_2 -522 0x0000 //TX_DR_RESRV_3 -523 0x0000 //TX_DR_RESRV_4 +514 0xC000 //TX_DEREVERB_LF_MU +515 0xC000 //TX_DEREVERB_HF_MU +516 0xCCCC //TX_DEREVERB_DELAY +517 0xD999 //TX_DEREVERB_COEF_LEN +518 0x1F40 //TX_DEREVERB_DNR +519 0x0000 //TX_DEREVERB_ALPHA +520 0x0000 //TX_DEREVERB_BETA +521 0x0000 //TX_GSC_RTOL_TH +522 0x7000 //TX_GSC_RTOH_TH +523 0x0064 //TX_WIDE2_MEANHTH 524 0x0000 //TX_DR_RESRV_5 525 0x0000 //TX_DR_RESRV_6 526 0x0000 //TX_DR_RESRV_7 @@ -14931,14 +22259,79 @@ 888 0x00C8 //TX_FASTNS_ARSPC_TH 889 0xC000 //TX_FASTNS_MASK5_TH 890 0x4848 //TX_POSTSSA_MIN_G_VR_MASK -891 0x7FFF //TX_A_LESSCUT_RTO_MASK +891 0x4000 //TX_A_LESSCUT_RTO_MASK 892 0x1770 //TX_FASTNS_NOISETH 893 0xC000 //TX_FASTNS_SSA_THLFL 894 0xC000 //TX_FASTNS_SSA_THHFL 895 0xCCCC //TX_FASTNS_SSA_THLFH 896 0xD999 //TX_FASTNS_SSA_THHFH +897 0x2339 //TX_SENDFUNC_REG_MICMUTE +898 0x0021 //TX_SENDFUNC_REG_MICMUTE1 +899 0x02BC //TX_MICMUTE_RATIO_THR +900 0x0140 //TX_MICMUTE_AMP_THR +901 0x0004 //TX_MICMUTE_HPF_IND +902 0x00C0 //TX_MICMUTE_LOG_EYR_TH +903 0x0008 //TX_MICMUTE_CVG_TIME +904 0x0008 //TX_MICMUTE_RELEASE_TIME +905 0x01FE //TX_MIC_VOLUME_MIC0MUTE +906 0x0020 //TX_MICMUTE_EPD_OFFSET_0 +907 0x001E //TX_MICMUTE_FRQ_AEC_L +908 0x7999 //TX_MICMUTE_EAD_THR +909 0x7FFF //TX_MICMUTE_LAMBDA_CB_NLE +910 0x7FFF //TX_MICMUTE_LAMBDA_RE_EST +911 0x4000 //TX_DTD_THR1_MICMUTE_0 +912 0x7000 //TX_DTD_THR1_MICMUTE_1 +913 0x7FFF //TX_DTD_THR1_MICMUTE_2 +914 0x7FFF //TX_DTD_THR1_MICMUTE_3 +915 0x6CCC //TX_DTD_THR2_MICMUTE_0 +916 0x0400 //TX_MICMUTE_MIN_EQ_RE_EST_0 +917 0x0400 //TX_MICMUTE_MIN_EQ_RE_EST_1 +918 0x1000 //TX_MICMUTE_MIN_EQ_RE_EST_2 +919 0x7FFF //TX_MICMUTE_MIN_EQ_RE_EST_3 +920 0x7FFF //TX_MICMUTE_MIN_EQ_RE_EST_4 +921 0x4000 //TX_MICMUTE_C_POST_FLT +922 0x03E8 //TX_MICMUTE_DT_CUT_K +923 0x0001 //TX_MICMUTE_DT_CUT_THR +924 0x03E8 //TX_MICMUTE_DT_CUT_K2 +925 0x0001 //TX_MICMUTE_DT_CUT_THR2 +926 0x0064 //TX_MICMUTE_DT2_HOLD_N +927 0x1000 //TX_MICMUTE_RATIODTH_THCUT +928 0x1000 //TX_MICMUTE_B_POST_FLT_ECHOL +929 0x7FFF //TX_MICMUTE_B_POST_FLT_ECHOH +930 0x0400 //TX_MICMUTE_C_POST_FLT_MASK +931 0x7999 //TX_MICMUTE_RATIODTL_CUT_TH +932 0x0258 //TX_MICMUTE_DT_CUT_K1 +933 0x0800 //TX_MICMUTE_N2_SN_EST +934 0xFC00 //TX_MICMUTE_THR_SN_EST_0 +935 0x001C //TX_MICMUTE_MIN_G_CTRL_0 +936 0x6000 //TX_MICMUTE_A_POST_FILT_S_0 +937 0x7000 //TX_MICMUTE_B_POST_FILT_0 +938 0x2710 //TX_MIC1RUB_AMP_THR +939 0x0010 //TX_MIC1MUTE_RATIO_THR +940 0x0450 //TX_MIC1MUTE_AMP_THR +941 0x0008 //TX_MIC1MUTE_CVG_TIME +942 0x0008 //TX_MIC1MUTE_RELEASE_TIME +943 0x0000 //TX_AMS_RESRV_01 +944 0x0000 //TX_AMS_RESRV_02 +945 0x0000 //TX_AMS_RESRV_03 +946 0x0000 //TX_AMS_RESRV_04 +947 0x0000 //TX_AMS_RESRV_05 +948 0x0000 //TX_AMS_RESRV_06 +949 0x0000 //TX_AMS_RESRV_07 +950 0x0000 //TX_AMS_RESRV_08 +951 0x0000 //TX_AMS_RESRV_09 +952 0x0000 //TX_AMS_RESRV_10 +953 0x0000 //TX_AMS_RESRV_11 +954 0x0000 //TX_AMS_RESRV_12 +955 0x0000 //TX_AMS_RESRV_13 +956 0x0000 //TX_AMS_RESRV_14 +957 0x0000 //TX_AMS_RESRV_15 +958 0x0000 //TX_AMS_RESRV_16 +959 0x0000 //TX_AMS_RESRV_17 +960 0x0000 //TX_AMS_RESRV_18 +961 0x0000 //TX_AMS_RESRV_19 #RX -0 0x002C //RX_RECVFUNC_MODE_0 +0 0x202C //RX_RECVFUNC_MODE_0 1 0x0000 //RX_RECVFUNC_MODE_1 2 0x0000 //RX_SAMPLINGFREQ_SIG 3 0x0000 //RX_SAMPLINGFREQ_PROC @@ -15788,11 +23181,862 @@ 110 0x0000 //RX_FDDRC_RESRV_0 129 0x0100 //RX_SPK_VOL 130 0x0000 //RX_VOL_RESRV_0 +#RX 2 +157 0x202C //RX_RECVFUNC_MODE_0 +158 0x0000 //RX_RECVFUNC_MODE_1 +159 0x0000 //RX_SAMPLINGFREQ_SIG +160 0x0000 //RX_SAMPLINGFREQ_PROC +161 0x000A //RX_FRAME_SZ +162 0x0000 //RX_DELAY_OPT +163 0x3000 //RX_TDDRC_ALPHA_UP_1 +164 0x3000 //RX_TDDRC_ALPHA_UP_2 +165 0x3000 //RX_TDDRC_ALPHA_UP_3 +166 0x3000 //RX_TDDRC_ALPHA_UP_4 +167 0x0800 //RX_PGA +168 0x7FFF //RX_A_HP +169 0x0000 //RX_B_PE +170 0x3800 //RX_THR_PITCH_DET_0 +171 0x3000 //RX_THR_PITCH_DET_1 +172 0x2800 //RX_THR_PITCH_DET_2 +173 0x0008 //RX_PITCH_BFR_LEN +174 0x0003 //RX_SBD_PITCH_DET +175 0x0100 //RX_PP_RESRV_0 +176 0x0020 //RX_PP_RESRV_1 +177 0x0600 //RX_N_SN_EST +178 0x000C //RX_N2_SN_EST +179 0x0010 //RX_NS_LVL_CTRL +180 0xF800 //RX_THR_SN_EST +181 0x7CCD //RX_LAMBDA_PFILT +182 0x000A //RX_FENS_RESRV_0 +183 0x0190 //RX_FENS_RESRV_1 +184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +187 0x0002 //RX_EXTRA_NS_L +188 0x0800 //RX_EXTRA_NS_A +189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +190 0x7FFF //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +192 0x199A //RX_A_POST_FLT +193 0x0000 //RX_LMT_THRD +194 0x4000 //RX_LMT_ALPHA +195 0x0014 //RX_FDEQ_SUBNUM +196 0x4848 //RX_FDEQ_GAIN_0 +197 0x4848 //RX_FDEQ_GAIN_1 +198 0x4848 //RX_FDEQ_GAIN_2 +199 0x4848 //RX_FDEQ_GAIN_3 +200 0x4848 //RX_FDEQ_GAIN_4 +201 0x4848 //RX_FDEQ_GAIN_5 +202 0x4848 //RX_FDEQ_GAIN_6 +203 0x4848 //RX_FDEQ_GAIN_7 +204 0x4848 //RX_FDEQ_GAIN_8 +205 0x4848 //RX_FDEQ_GAIN_9 +206 0x4848 //RX_FDEQ_GAIN_10 +207 0x4848 //RX_FDEQ_GAIN_11 +208 0x4848 //RX_FDEQ_GAIN_12 +209 0x4848 //RX_FDEQ_GAIN_13 +210 0x4848 //RX_FDEQ_GAIN_14 +211 0x4848 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0202 //RX_FDEQ_BIN_0 +221 0x0203 //RX_FDEQ_BIN_1 +222 0x0303 //RX_FDEQ_BIN_2 +223 0x0304 //RX_FDEQ_BIN_3 +224 0x0405 //RX_FDEQ_BIN_4 +225 0x0506 //RX_FDEQ_BIN_5 +226 0x0708 //RX_FDEQ_BIN_6 +227 0x090A //RX_FDEQ_BIN_7 +228 0x0B0C //RX_FDEQ_BIN_8 +229 0x0D08 //RX_FDEQ_BIN_9 +230 0x0000 //RX_FDEQ_BIN_10 +231 0x0000 //RX_FDEQ_BIN_11 +232 0x0000 //RX_FDEQ_BIN_12 +233 0x0000 //RX_FDEQ_BIN_13 +234 0x0000 //RX_FDEQ_BIN_14 +235 0x0000 //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x4000 //RX_FDEQ_RESRV_0 +245 0x0320 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0030 //RX_FDDRC_BAND_MARGIN_1 +248 0x0050 //RX_FDDRC_BAND_MARGIN_2 +249 0x0080 //RX_FDDRC_BAND_MARGIN_3 +250 0x0007 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x5000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x6400 //RX_FDDRC_THRD_3_2 +258 0x6400 //RX_FDDRC_THRD_3_3 +259 0x2000 //RX_FDDRC_SLANT_0_0 +260 0x2000 //RX_FDDRC_SLANT_0_1 +261 0x2000 //RX_FDDRC_SLANT_0_2 +262 0x2000 //RX_FDDRC_SLANT_0_3 +263 0x5333 //RX_FDDRC_SLANT_1_0 +264 0x5333 //RX_FDDRC_SLANT_1_1 +265 0x5333 //RX_FDDRC_SLANT_1_2 +266 0x5333 //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +268 0x0002 //RX_FILTINDX +269 0x0000 //RX_TDDRC_THRD_0 +270 0x0000 //RX_TDDRC_THRD_1 +271 0x2000 //RX_TDDRC_THRD_2 +272 0x3000 //RX_TDDRC_THRD_3 +273 0x0800 //RX_TDDRC_SLANT_0 +274 0x7EB8 //RX_TDDRC_SLANT_1 +275 0x3000 //RX_TDDRC_ALPHA_UP_0 +276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x199A //RX_TDDRC_HMNC_GAIN +279 0x0001 //RX_TDDRC_SMT_FLAG +280 0x0CCD //RX_TDDRC_SMT_W +281 0x0200 //RX_TDDRC_DRC_GAIN +282 0x7C00 //RX_LAMBDA_PKA_FP +283 0x2000 //RX_TPKA_FP +284 0x2000 //RX_MIN_G_FP +285 0x0080 //RX_MAX_G_FP +286 0x000B //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 +288 0x0000 //RX_MAXLEVEL_CNG +289 0x3000 //RX_BWE_UV_TH +290 0x3000 //RX_BWE_UV_TH2 +291 0x1800 //RX_BWE_UV_TH3 +292 0x1000 //RX_BWE_V_TH +293 0x04CD //RX_BWE_GAIN1_V_TH1 +294 0x0F33 //RX_BWE_GAIN1_V_TH2 +295 0x7333 //RX_BWE_UV_EQ +296 0x199A //RX_BWE_V_EQ +297 0x7333 //RX_BWE_TONE_TH +298 0x0004 //RX_BWE_UV_HOLD_T +299 0x6CCD //RX_BWE_GAIN2_ALPHA +300 0x799A //RX_BWE_GAIN3_ALPHA +301 0x001E //RX_BWE_CUTOFF +302 0x3000 //RX_BWE_GAINFILL +303 0x3200 //RX_BWE_MAXTH_TONE +304 0x2000 //RX_BWE_EQ_0 +305 0x2000 //RX_BWE_EQ_1 +306 0x2000 //RX_BWE_EQ_2 +307 0x2000 //RX_BWE_EQ_3 +308 0x2000 //RX_BWE_EQ_4 +309 0x2000 //RX_BWE_EQ_5 +310 0x2000 //RX_BWE_EQ_6 +311 0x0000 //RX_BWE_RESRV_0 +312 0x0000 //RX_BWE_RESRV_1 +313 0x0000 //RX_BWE_RESRV_2 +#VOL 0 +163 0x3000 //RX_TDDRC_ALPHA_UP_1 +164 0x3000 //RX_TDDRC_ALPHA_UP_2 +165 0x3000 //RX_TDDRC_ALPHA_UP_3 +166 0x3000 //RX_TDDRC_ALPHA_UP_4 +184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +190 0x7FFF //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +269 0x0000 //RX_TDDRC_THRD_0 +270 0x0000 //RX_TDDRC_THRD_1 +271 0x2000 //RX_TDDRC_THRD_2 +272 0x3000 //RX_TDDRC_THRD_3 +273 0x0800 //RX_TDDRC_SLANT_0 +274 0x7EB8 //RX_TDDRC_SLANT_1 +275 0x3000 //RX_TDDRC_ALPHA_UP_0 +276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x199A //RX_TDDRC_HMNC_GAIN +279 0x0001 //RX_TDDRC_SMT_FLAG +280 0x0CCD //RX_TDDRC_SMT_W +281 0x0200 //RX_TDDRC_DRC_GAIN +195 0x0014 //RX_FDEQ_SUBNUM +196 0x4848 //RX_FDEQ_GAIN_0 +197 0x4848 //RX_FDEQ_GAIN_1 +198 0x4848 //RX_FDEQ_GAIN_2 +199 0x4848 //RX_FDEQ_GAIN_3 +200 0x4848 //RX_FDEQ_GAIN_4 +201 0x4848 //RX_FDEQ_GAIN_5 +202 0x4848 //RX_FDEQ_GAIN_6 +203 0x4848 //RX_FDEQ_GAIN_7 +204 0x4848 //RX_FDEQ_GAIN_8 +205 0x4848 //RX_FDEQ_GAIN_9 +206 0x4848 //RX_FDEQ_GAIN_10 +207 0x4848 //RX_FDEQ_GAIN_11 +208 0x4848 //RX_FDEQ_GAIN_12 +209 0x4848 //RX_FDEQ_GAIN_13 +210 0x4848 //RX_FDEQ_GAIN_14 +211 0x4848 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0202 //RX_FDEQ_BIN_0 +221 0x0203 //RX_FDEQ_BIN_1 +222 0x0303 //RX_FDEQ_BIN_2 +223 0x0304 //RX_FDEQ_BIN_3 +224 0x0405 //RX_FDEQ_BIN_4 +225 0x0506 //RX_FDEQ_BIN_5 +226 0x0708 //RX_FDEQ_BIN_6 +227 0x090A //RX_FDEQ_BIN_7 +228 0x0B0C //RX_FDEQ_BIN_8 +229 0x0D08 //RX_FDEQ_BIN_9 +230 0x0000 //RX_FDEQ_BIN_10 +231 0x0000 //RX_FDEQ_BIN_11 +232 0x0000 //RX_FDEQ_BIN_12 +233 0x0000 //RX_FDEQ_BIN_13 +234 0x0000 //RX_FDEQ_BIN_14 +235 0x0000 //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x4000 //RX_FDEQ_RESRV_0 +245 0x0320 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0030 //RX_FDDRC_BAND_MARGIN_1 +248 0x0050 //RX_FDDRC_BAND_MARGIN_2 +249 0x0080 //RX_FDDRC_BAND_MARGIN_3 +250 0x0007 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x5000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x6400 //RX_FDDRC_THRD_3_2 +258 0x6400 //RX_FDDRC_THRD_3_3 +259 0x2000 //RX_FDDRC_SLANT_0_0 +260 0x2000 //RX_FDDRC_SLANT_0_1 +261 0x2000 //RX_FDDRC_SLANT_0_2 +262 0x2000 //RX_FDDRC_SLANT_0_3 +263 0x5333 //RX_FDDRC_SLANT_1_0 +264 0x5333 //RX_FDDRC_SLANT_1_1 +265 0x5333 //RX_FDDRC_SLANT_1_2 +266 0x5333 //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +286 0x000B //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 +#VOL 1 +163 0x3000 //RX_TDDRC_ALPHA_UP_1 +164 0x3000 //RX_TDDRC_ALPHA_UP_2 +165 0x3000 //RX_TDDRC_ALPHA_UP_3 +166 0x3000 //RX_TDDRC_ALPHA_UP_4 +184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +190 0x7FFF //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +269 0x0000 //RX_TDDRC_THRD_0 +270 0x0000 //RX_TDDRC_THRD_1 +271 0x2000 //RX_TDDRC_THRD_2 +272 0x3000 //RX_TDDRC_THRD_3 +273 0x0800 //RX_TDDRC_SLANT_0 +274 0x7EB8 //RX_TDDRC_SLANT_1 +275 0x3000 //RX_TDDRC_ALPHA_UP_0 +276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x199A //RX_TDDRC_HMNC_GAIN +279 0x0001 //RX_TDDRC_SMT_FLAG +280 0x0CCD //RX_TDDRC_SMT_W +281 0x0200 //RX_TDDRC_DRC_GAIN +195 0x0014 //RX_FDEQ_SUBNUM +196 0x4848 //RX_FDEQ_GAIN_0 +197 0x4848 //RX_FDEQ_GAIN_1 +198 0x4848 //RX_FDEQ_GAIN_2 +199 0x4848 //RX_FDEQ_GAIN_3 +200 0x4848 //RX_FDEQ_GAIN_4 +201 0x4848 //RX_FDEQ_GAIN_5 +202 0x4848 //RX_FDEQ_GAIN_6 +203 0x4848 //RX_FDEQ_GAIN_7 +204 0x4848 //RX_FDEQ_GAIN_8 +205 0x4848 //RX_FDEQ_GAIN_9 +206 0x4848 //RX_FDEQ_GAIN_10 +207 0x4848 //RX_FDEQ_GAIN_11 +208 0x4848 //RX_FDEQ_GAIN_12 +209 0x4848 //RX_FDEQ_GAIN_13 +210 0x4848 //RX_FDEQ_GAIN_14 +211 0x4848 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0202 //RX_FDEQ_BIN_0 +221 0x0203 //RX_FDEQ_BIN_1 +222 0x0303 //RX_FDEQ_BIN_2 +223 0x0304 //RX_FDEQ_BIN_3 +224 0x0405 //RX_FDEQ_BIN_4 +225 0x0506 //RX_FDEQ_BIN_5 +226 0x0708 //RX_FDEQ_BIN_6 +227 0x090A //RX_FDEQ_BIN_7 +228 0x0B0C //RX_FDEQ_BIN_8 +229 0x0D08 //RX_FDEQ_BIN_9 +230 0x0000 //RX_FDEQ_BIN_10 +231 0x0000 //RX_FDEQ_BIN_11 +232 0x0000 //RX_FDEQ_BIN_12 +233 0x0000 //RX_FDEQ_BIN_13 +234 0x0000 //RX_FDEQ_BIN_14 +235 0x0000 //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x4000 //RX_FDEQ_RESRV_0 +245 0x0320 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0030 //RX_FDDRC_BAND_MARGIN_1 +248 0x0050 //RX_FDDRC_BAND_MARGIN_2 +249 0x0080 //RX_FDDRC_BAND_MARGIN_3 +250 0x0007 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x5000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x6400 //RX_FDDRC_THRD_3_2 +258 0x6400 //RX_FDDRC_THRD_3_3 +259 0x2000 //RX_FDDRC_SLANT_0_0 +260 0x2000 //RX_FDDRC_SLANT_0_1 +261 0x2000 //RX_FDDRC_SLANT_0_2 +262 0x2000 //RX_FDDRC_SLANT_0_3 +263 0x5333 //RX_FDDRC_SLANT_1_0 +264 0x5333 //RX_FDDRC_SLANT_1_1 +265 0x5333 //RX_FDDRC_SLANT_1_2 +266 0x5333 //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +286 0x0013 //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 +#VOL 2 +163 0x3000 //RX_TDDRC_ALPHA_UP_1 +164 0x3000 //RX_TDDRC_ALPHA_UP_2 +165 0x3000 //RX_TDDRC_ALPHA_UP_3 +166 0x3000 //RX_TDDRC_ALPHA_UP_4 +184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +190 0x7FFF //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +269 0x0000 //RX_TDDRC_THRD_0 +270 0x0000 //RX_TDDRC_THRD_1 +271 0x2000 //RX_TDDRC_THRD_2 +272 0x3000 //RX_TDDRC_THRD_3 +273 0x0800 //RX_TDDRC_SLANT_0 +274 0x7EB8 //RX_TDDRC_SLANT_1 +275 0x3000 //RX_TDDRC_ALPHA_UP_0 +276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x199A //RX_TDDRC_HMNC_GAIN +279 0x0001 //RX_TDDRC_SMT_FLAG +280 0x0CCD //RX_TDDRC_SMT_W +281 0x0200 //RX_TDDRC_DRC_GAIN +195 0x0014 //RX_FDEQ_SUBNUM +196 0x4848 //RX_FDEQ_GAIN_0 +197 0x4848 //RX_FDEQ_GAIN_1 +198 0x4848 //RX_FDEQ_GAIN_2 +199 0x4848 //RX_FDEQ_GAIN_3 +200 0x4848 //RX_FDEQ_GAIN_4 +201 0x4848 //RX_FDEQ_GAIN_5 +202 0x4848 //RX_FDEQ_GAIN_6 +203 0x4848 //RX_FDEQ_GAIN_7 +204 0x4848 //RX_FDEQ_GAIN_8 +205 0x4848 //RX_FDEQ_GAIN_9 +206 0x4848 //RX_FDEQ_GAIN_10 +207 0x4848 //RX_FDEQ_GAIN_11 +208 0x4848 //RX_FDEQ_GAIN_12 +209 0x4848 //RX_FDEQ_GAIN_13 +210 0x4848 //RX_FDEQ_GAIN_14 +211 0x4848 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0202 //RX_FDEQ_BIN_0 +221 0x0203 //RX_FDEQ_BIN_1 +222 0x0303 //RX_FDEQ_BIN_2 +223 0x0304 //RX_FDEQ_BIN_3 +224 0x0405 //RX_FDEQ_BIN_4 +225 0x0506 //RX_FDEQ_BIN_5 +226 0x0708 //RX_FDEQ_BIN_6 +227 0x090A //RX_FDEQ_BIN_7 +228 0x0B0C //RX_FDEQ_BIN_8 +229 0x0D08 //RX_FDEQ_BIN_9 +230 0x0000 //RX_FDEQ_BIN_10 +231 0x0000 //RX_FDEQ_BIN_11 +232 0x0000 //RX_FDEQ_BIN_12 +233 0x0000 //RX_FDEQ_BIN_13 +234 0x0000 //RX_FDEQ_BIN_14 +235 0x0000 //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x4000 //RX_FDEQ_RESRV_0 +245 0x0320 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0030 //RX_FDDRC_BAND_MARGIN_1 +248 0x0050 //RX_FDDRC_BAND_MARGIN_2 +249 0x0080 //RX_FDDRC_BAND_MARGIN_3 +250 0x0007 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x5000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x6400 //RX_FDDRC_THRD_3_2 +258 0x6400 //RX_FDDRC_THRD_3_3 +259 0x2000 //RX_FDDRC_SLANT_0_0 +260 0x2000 //RX_FDDRC_SLANT_0_1 +261 0x2000 //RX_FDDRC_SLANT_0_2 +262 0x2000 //RX_FDDRC_SLANT_0_3 +263 0x5333 //RX_FDDRC_SLANT_1_0 +264 0x5333 //RX_FDDRC_SLANT_1_1 +265 0x5333 //RX_FDDRC_SLANT_1_2 +266 0x5333 //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +286 0x0020 //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 +#VOL 3 +163 0x3000 //RX_TDDRC_ALPHA_UP_1 +164 0x3000 //RX_TDDRC_ALPHA_UP_2 +165 0x3000 //RX_TDDRC_ALPHA_UP_3 +166 0x3000 //RX_TDDRC_ALPHA_UP_4 +184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +190 0x7FFF //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +269 0x0000 //RX_TDDRC_THRD_0 +270 0x0000 //RX_TDDRC_THRD_1 +271 0x2000 //RX_TDDRC_THRD_2 +272 0x3000 //RX_TDDRC_THRD_3 +273 0x0800 //RX_TDDRC_SLANT_0 +274 0x7EB8 //RX_TDDRC_SLANT_1 +275 0x3000 //RX_TDDRC_ALPHA_UP_0 +276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x199A //RX_TDDRC_HMNC_GAIN +279 0x0001 //RX_TDDRC_SMT_FLAG +280 0x0CCD //RX_TDDRC_SMT_W +281 0x0200 //RX_TDDRC_DRC_GAIN +195 0x0014 //RX_FDEQ_SUBNUM +196 0x4848 //RX_FDEQ_GAIN_0 +197 0x4848 //RX_FDEQ_GAIN_1 +198 0x4848 //RX_FDEQ_GAIN_2 +199 0x4848 //RX_FDEQ_GAIN_3 +200 0x4848 //RX_FDEQ_GAIN_4 +201 0x4848 //RX_FDEQ_GAIN_5 +202 0x4848 //RX_FDEQ_GAIN_6 +203 0x4848 //RX_FDEQ_GAIN_7 +204 0x4848 //RX_FDEQ_GAIN_8 +205 0x4848 //RX_FDEQ_GAIN_9 +206 0x4848 //RX_FDEQ_GAIN_10 +207 0x4848 //RX_FDEQ_GAIN_11 +208 0x4848 //RX_FDEQ_GAIN_12 +209 0x4848 //RX_FDEQ_GAIN_13 +210 0x4848 //RX_FDEQ_GAIN_14 +211 0x4848 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0202 //RX_FDEQ_BIN_0 +221 0x0203 //RX_FDEQ_BIN_1 +222 0x0303 //RX_FDEQ_BIN_2 +223 0x0304 //RX_FDEQ_BIN_3 +224 0x0405 //RX_FDEQ_BIN_4 +225 0x0506 //RX_FDEQ_BIN_5 +226 0x0708 //RX_FDEQ_BIN_6 +227 0x090A //RX_FDEQ_BIN_7 +228 0x0B0C //RX_FDEQ_BIN_8 +229 0x0D08 //RX_FDEQ_BIN_9 +230 0x0000 //RX_FDEQ_BIN_10 +231 0x0000 //RX_FDEQ_BIN_11 +232 0x0000 //RX_FDEQ_BIN_12 +233 0x0000 //RX_FDEQ_BIN_13 +234 0x0000 //RX_FDEQ_BIN_14 +235 0x0000 //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x4000 //RX_FDEQ_RESRV_0 +245 0x0320 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0030 //RX_FDDRC_BAND_MARGIN_1 +248 0x0050 //RX_FDDRC_BAND_MARGIN_2 +249 0x0080 //RX_FDDRC_BAND_MARGIN_3 +250 0x0007 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x5000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x6400 //RX_FDDRC_THRD_3_2 +258 0x6400 //RX_FDDRC_THRD_3_3 +259 0x2000 //RX_FDDRC_SLANT_0_0 +260 0x2000 //RX_FDDRC_SLANT_0_1 +261 0x2000 //RX_FDDRC_SLANT_0_2 +262 0x2000 //RX_FDDRC_SLANT_0_3 +263 0x5333 //RX_FDDRC_SLANT_1_0 +264 0x5333 //RX_FDDRC_SLANT_1_1 +265 0x5333 //RX_FDDRC_SLANT_1_2 +266 0x5333 //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +286 0x0036 //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 +#VOL 4 +163 0x3000 //RX_TDDRC_ALPHA_UP_1 +164 0x3000 //RX_TDDRC_ALPHA_UP_2 +165 0x3000 //RX_TDDRC_ALPHA_UP_3 +166 0x3000 //RX_TDDRC_ALPHA_UP_4 +184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +190 0x7FFF //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +269 0x0000 //RX_TDDRC_THRD_0 +270 0x0000 //RX_TDDRC_THRD_1 +271 0x2000 //RX_TDDRC_THRD_2 +272 0x3000 //RX_TDDRC_THRD_3 +273 0x0800 //RX_TDDRC_SLANT_0 +274 0x7EB8 //RX_TDDRC_SLANT_1 +275 0x3000 //RX_TDDRC_ALPHA_UP_0 +276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x199A //RX_TDDRC_HMNC_GAIN +279 0x0001 //RX_TDDRC_SMT_FLAG +280 0x0CCD //RX_TDDRC_SMT_W +281 0x0200 //RX_TDDRC_DRC_GAIN +195 0x0014 //RX_FDEQ_SUBNUM +196 0x4848 //RX_FDEQ_GAIN_0 +197 0x4848 //RX_FDEQ_GAIN_1 +198 0x4848 //RX_FDEQ_GAIN_2 +199 0x4848 //RX_FDEQ_GAIN_3 +200 0x4848 //RX_FDEQ_GAIN_4 +201 0x4848 //RX_FDEQ_GAIN_5 +202 0x4848 //RX_FDEQ_GAIN_6 +203 0x4848 //RX_FDEQ_GAIN_7 +204 0x4848 //RX_FDEQ_GAIN_8 +205 0x4848 //RX_FDEQ_GAIN_9 +206 0x4848 //RX_FDEQ_GAIN_10 +207 0x4848 //RX_FDEQ_GAIN_11 +208 0x4848 //RX_FDEQ_GAIN_12 +209 0x4848 //RX_FDEQ_GAIN_13 +210 0x4848 //RX_FDEQ_GAIN_14 +211 0x4848 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0202 //RX_FDEQ_BIN_0 +221 0x0203 //RX_FDEQ_BIN_1 +222 0x0303 //RX_FDEQ_BIN_2 +223 0x0304 //RX_FDEQ_BIN_3 +224 0x0405 //RX_FDEQ_BIN_4 +225 0x0506 //RX_FDEQ_BIN_5 +226 0x0708 //RX_FDEQ_BIN_6 +227 0x090A //RX_FDEQ_BIN_7 +228 0x0B0C //RX_FDEQ_BIN_8 +229 0x0D08 //RX_FDEQ_BIN_9 +230 0x0000 //RX_FDEQ_BIN_10 +231 0x0000 //RX_FDEQ_BIN_11 +232 0x0000 //RX_FDEQ_BIN_12 +233 0x0000 //RX_FDEQ_BIN_13 +234 0x0000 //RX_FDEQ_BIN_14 +235 0x0000 //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x4000 //RX_FDEQ_RESRV_0 +245 0x0320 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0030 //RX_FDDRC_BAND_MARGIN_1 +248 0x0050 //RX_FDDRC_BAND_MARGIN_2 +249 0x0080 //RX_FDDRC_BAND_MARGIN_3 +250 0x0007 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x5000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x6400 //RX_FDDRC_THRD_3_2 +258 0x6400 //RX_FDDRC_THRD_3_3 +259 0x2000 //RX_FDDRC_SLANT_0_0 +260 0x2000 //RX_FDDRC_SLANT_0_1 +261 0x2000 //RX_FDDRC_SLANT_0_2 +262 0x2000 //RX_FDDRC_SLANT_0_3 +263 0x5333 //RX_FDDRC_SLANT_1_0 +264 0x5333 //RX_FDDRC_SLANT_1_1 +265 0x5333 //RX_FDDRC_SLANT_1_2 +266 0x5333 //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +286 0x005B //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 +#VOL 5 +163 0x3000 //RX_TDDRC_ALPHA_UP_1 +164 0x3000 //RX_TDDRC_ALPHA_UP_2 +165 0x3000 //RX_TDDRC_ALPHA_UP_3 +166 0x3000 //RX_TDDRC_ALPHA_UP_4 +184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +190 0x7FFF //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +269 0x0000 //RX_TDDRC_THRD_0 +270 0x0000 //RX_TDDRC_THRD_1 +271 0x2000 //RX_TDDRC_THRD_2 +272 0x3000 //RX_TDDRC_THRD_3 +273 0x0800 //RX_TDDRC_SLANT_0 +274 0x7EB8 //RX_TDDRC_SLANT_1 +275 0x3000 //RX_TDDRC_ALPHA_UP_0 +276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x199A //RX_TDDRC_HMNC_GAIN +279 0x0001 //RX_TDDRC_SMT_FLAG +280 0x0CCD //RX_TDDRC_SMT_W +281 0x0200 //RX_TDDRC_DRC_GAIN +195 0x0014 //RX_FDEQ_SUBNUM +196 0x4848 //RX_FDEQ_GAIN_0 +197 0x4848 //RX_FDEQ_GAIN_1 +198 0x4848 //RX_FDEQ_GAIN_2 +199 0x4848 //RX_FDEQ_GAIN_3 +200 0x4848 //RX_FDEQ_GAIN_4 +201 0x4848 //RX_FDEQ_GAIN_5 +202 0x4848 //RX_FDEQ_GAIN_6 +203 0x4848 //RX_FDEQ_GAIN_7 +204 0x4848 //RX_FDEQ_GAIN_8 +205 0x4848 //RX_FDEQ_GAIN_9 +206 0x4848 //RX_FDEQ_GAIN_10 +207 0x4848 //RX_FDEQ_GAIN_11 +208 0x4848 //RX_FDEQ_GAIN_12 +209 0x4848 //RX_FDEQ_GAIN_13 +210 0x4848 //RX_FDEQ_GAIN_14 +211 0x4848 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0202 //RX_FDEQ_BIN_0 +221 0x0203 //RX_FDEQ_BIN_1 +222 0x0303 //RX_FDEQ_BIN_2 +223 0x0304 //RX_FDEQ_BIN_3 +224 0x0405 //RX_FDEQ_BIN_4 +225 0x0506 //RX_FDEQ_BIN_5 +226 0x0708 //RX_FDEQ_BIN_6 +227 0x090A //RX_FDEQ_BIN_7 +228 0x0B0C //RX_FDEQ_BIN_8 +229 0x0D08 //RX_FDEQ_BIN_9 +230 0x0000 //RX_FDEQ_BIN_10 +231 0x0000 //RX_FDEQ_BIN_11 +232 0x0000 //RX_FDEQ_BIN_12 +233 0x0000 //RX_FDEQ_BIN_13 +234 0x0000 //RX_FDEQ_BIN_14 +235 0x0000 //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x4000 //RX_FDEQ_RESRV_0 +245 0x0320 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0030 //RX_FDDRC_BAND_MARGIN_1 +248 0x0050 //RX_FDDRC_BAND_MARGIN_2 +249 0x0080 //RX_FDDRC_BAND_MARGIN_3 +250 0x0007 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x5000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x6400 //RX_FDDRC_THRD_3_2 +258 0x6400 //RX_FDDRC_THRD_3_3 +259 0x2000 //RX_FDDRC_SLANT_0_0 +260 0x2000 //RX_FDDRC_SLANT_0_1 +261 0x2000 //RX_FDDRC_SLANT_0_2 +262 0x2000 //RX_FDDRC_SLANT_0_3 +263 0x5333 //RX_FDDRC_SLANT_1_0 +264 0x5333 //RX_FDDRC_SLANT_1_1 +265 0x5333 //RX_FDDRC_SLANT_1_2 +266 0x5333 //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +286 0x0099 //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 +#VOL 6 +163 0x3000 //RX_TDDRC_ALPHA_UP_1 +164 0x3000 //RX_TDDRC_ALPHA_UP_2 +165 0x3000 //RX_TDDRC_ALPHA_UP_3 +166 0x3000 //RX_TDDRC_ALPHA_UP_4 +184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +190 0x7FFF //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +269 0x0000 //RX_TDDRC_THRD_0 +270 0x0000 //RX_TDDRC_THRD_1 +271 0x2000 //RX_TDDRC_THRD_2 +272 0x3000 //RX_TDDRC_THRD_3 +273 0x0800 //RX_TDDRC_SLANT_0 +274 0x7EB8 //RX_TDDRC_SLANT_1 +275 0x3000 //RX_TDDRC_ALPHA_UP_0 +276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x199A //RX_TDDRC_HMNC_GAIN +279 0x0001 //RX_TDDRC_SMT_FLAG +280 0x0CCD //RX_TDDRC_SMT_W +281 0x0200 //RX_TDDRC_DRC_GAIN +195 0x0014 //RX_FDEQ_SUBNUM +196 0x4848 //RX_FDEQ_GAIN_0 +197 0x4848 //RX_FDEQ_GAIN_1 +198 0x4848 //RX_FDEQ_GAIN_2 +199 0x4848 //RX_FDEQ_GAIN_3 +200 0x4848 //RX_FDEQ_GAIN_4 +201 0x4848 //RX_FDEQ_GAIN_5 +202 0x4848 //RX_FDEQ_GAIN_6 +203 0x4848 //RX_FDEQ_GAIN_7 +204 0x4848 //RX_FDEQ_GAIN_8 +205 0x4848 //RX_FDEQ_GAIN_9 +206 0x4848 //RX_FDEQ_GAIN_10 +207 0x4848 //RX_FDEQ_GAIN_11 +208 0x4848 //RX_FDEQ_GAIN_12 +209 0x4848 //RX_FDEQ_GAIN_13 +210 0x4848 //RX_FDEQ_GAIN_14 +211 0x4848 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0202 //RX_FDEQ_BIN_0 +221 0x0203 //RX_FDEQ_BIN_1 +222 0x0303 //RX_FDEQ_BIN_2 +223 0x0304 //RX_FDEQ_BIN_3 +224 0x0405 //RX_FDEQ_BIN_4 +225 0x0506 //RX_FDEQ_BIN_5 +226 0x0708 //RX_FDEQ_BIN_6 +227 0x090A //RX_FDEQ_BIN_7 +228 0x0B0C //RX_FDEQ_BIN_8 +229 0x0D08 //RX_FDEQ_BIN_9 +230 0x0000 //RX_FDEQ_BIN_10 +231 0x0000 //RX_FDEQ_BIN_11 +232 0x0000 //RX_FDEQ_BIN_12 +233 0x0000 //RX_FDEQ_BIN_13 +234 0x0000 //RX_FDEQ_BIN_14 +235 0x0000 //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x4000 //RX_FDEQ_RESRV_0 +245 0x0320 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0030 //RX_FDDRC_BAND_MARGIN_1 +248 0x0050 //RX_FDDRC_BAND_MARGIN_2 +249 0x0080 //RX_FDDRC_BAND_MARGIN_3 +250 0x0007 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x5000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x6400 //RX_FDDRC_THRD_3_2 +258 0x6400 //RX_FDDRC_THRD_3_3 +259 0x2000 //RX_FDDRC_SLANT_0_0 +260 0x2000 //RX_FDDRC_SLANT_0_1 +261 0x2000 //RX_FDDRC_SLANT_0_2 +262 0x2000 //RX_FDDRC_SLANT_0_3 +263 0x5333 //RX_FDDRC_SLANT_1_0 +264 0x5333 //RX_FDDRC_SLANT_1_1 +265 0x5333 //RX_FDDRC_SLANT_1_2 +266 0x5333 //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +286 0x0100 //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 #CASE_NAME HEADSET-RESERVE1-VOICE_GENERIC-WB -#PARAM_MODE FULL -#PARAM_TYPE TX+RX -#TOTAL_CUSTOM_STEP 7 +#PARAM_MODE Full +#PARAM_TYPE TX+2RX +#TOTAL_CUSTOM_STEP 7+7 #TX 0 0x0009 //TX_OPERATION_MODE_0 1 0x0008 //TX_OPERATION_MODE_1 @@ -16036,7 +24280,7 @@ 239 0x0800 //TX_DT_RESRV_7 240 0x0800 //TX_DT_RESRV_8 241 0x0000 //TX_DT_RESRV_9 -242 0xF400 //TX_THR_SN_EST_0 +242 0xFA00 //TX_THR_SN_EST_0 243 0xF400 //TX_THR_SN_EST_1 244 0xF600 //TX_THR_SN_EST_2 245 0xF400 //TX_THR_SN_EST_3 @@ -16045,20 +24289,20 @@ 248 0xF400 //TX_THR_SN_EST_6 249 0xF600 //TX_THR_SN_EST_7 250 0x0000 //TX_DELTA_THR_SN_EST_0 -251 0x0000 //TX_DELTA_THR_SN_EST_1 +251 0x0200 //TX_DELTA_THR_SN_EST_1 252 0x0200 //TX_DELTA_THR_SN_EST_2 253 0x0200 //TX_DELTA_THR_SN_EST_3 254 0x0200 //TX_DELTA_THR_SN_EST_4 255 0x0200 //TX_DELTA_THR_SN_EST_5 -256 0x0200 //TX_DELTA_THR_SN_EST_6 +256 0x0000 //TX_DELTA_THR_SN_EST_6 257 0x0200 //TX_DELTA_THR_SN_EST_7 258 0x6000 //TX_LAMBDA_NN_EST_0 -259 0x6000 //TX_LAMBDA_NN_EST_1 +259 0x4000 //TX_LAMBDA_NN_EST_1 260 0x4000 //TX_LAMBDA_NN_EST_2 261 0x4000 //TX_LAMBDA_NN_EST_3 262 0x4000 //TX_LAMBDA_NN_EST_4 263 0x4000 //TX_LAMBDA_NN_EST_5 -264 0x4000 //TX_LAMBDA_NN_EST_6 +264 0x6000 //TX_LAMBDA_NN_EST_6 265 0x4000 //TX_LAMBDA_NN_EST_7 266 0x0400 //TX_N_SN_EST 267 0x001E //TX_INBEAM_T @@ -16076,16 +24320,16 @@ 279 0x1000 //TX_B_POST_FLT_0 280 0x1000 //TX_B_POST_FLT_1 281 0x000F //TX_NS_LVL_CTRL_0 -282 0x000F //TX_NS_LVL_CTRL_1 -283 0x0011 //TX_NS_LVL_CTRL_2 +282 0x0011 //TX_NS_LVL_CTRL_1 +283 0x000F //TX_NS_LVL_CTRL_2 284 0x000F //TX_NS_LVL_CTRL_3 285 0x000F //TX_NS_LVL_CTRL_4 286 0x000F //TX_NS_LVL_CTRL_5 287 0x000F //TX_NS_LVL_CTRL_6 288 0x0011 //TX_NS_LVL_CTRL_7 289 0x000C //TX_MIN_GAIN_S_0 -290 0x000C //TX_MIN_GAIN_S_1 -291 0x000F //TX_MIN_GAIN_S_2 +290 0x000F //TX_MIN_GAIN_S_1 +291 0x000C //TX_MIN_GAIN_S_2 292 0x000C //TX_MIN_GAIN_S_3 293 0x000C //TX_MIN_GAIN_S_4 294 0x000C //TX_MIN_GAIN_S_5 @@ -16109,12 +24353,12 @@ 312 0x7FFF //TX_A_POST_FILT_0 313 0x2000 //TX_A_POST_FILT_1 314 0x4000 //TX_A_POST_FILT_S_0 -315 0x4000 //TX_A_POST_FILT_S_1 +315 0x5000 //TX_A_POST_FILT_S_1 316 0x5000 //TX_A_POST_FILT_S_2 317 0x5000 //TX_A_POST_FILT_S_3 318 0x5000 //TX_A_POST_FILT_S_4 319 0x5000 //TX_A_POST_FILT_S_5 -320 0x5000 //TX_A_POST_FILT_S_6 +320 0x4000 //TX_A_POST_FILT_S_6 321 0x5000 //TX_A_POST_FILT_S_7 322 0x1000 //TX_B_POST_FILT_0 323 0x1000 //TX_B_POST_FILT_1 @@ -16161,7 +24405,7 @@ 364 0x0000 //TX_K_APT 365 0x0001 //TX_NOISEDET 366 0x0190 //TX_NDETCT -367 0x0050 //TX_NOISE_TH_0 +367 0x0102 //TX_NOISE_TH_0 368 0x7FFF //TX_NOISE_TH_0_2 369 0x7FFF //TX_NOISE_TH_0_3 370 0x07D0 //TX_NOISE_TH_1 @@ -16173,11 +24417,11 @@ 376 0x7FFF //TX_NOISE_TH_5_3 377 0x7FFF //TX_NOISE_TH_5_4 378 0x044C //TX_NOISE_TH_6 -379 0x0014 //TX_MINENOISE_TH -380 0x4000 //TX_MINENOISE_MIC0_TH_MTS -381 0xFFEE //TX_MINENOISE_MIC0_TH_EXP -382 0x6000 //TX_MINENOISE_MIC0_S_TH_MTS -383 0xFFF3 //TX_MINENOISE_MIC0_S_TH_EXP +379 0x00F8 //TX_MINENOISE_TH +380 0xD508 //TX_MORENS_TFMASK_TH +381 0x0001 //TX_DRC_QUIET_FLOOR +382 0x3A98 //TX_RATIODTL_CUT_TH +383 0x0DAC //TX_DT_CUT_K1 384 0x0666 //TX_OUT_ENER_S_TH_CLEAN 385 0x0666 //TX_OUT_ENER_S_TH_LESSCLEAN 386 0x0333 //TX_OUT_ENER_S_TH_NOISY @@ -16185,22 +24429,22 @@ 388 0x0333 //TX_OUT_ENER_TH_SPEECH 389 0x2000 //TX_SN_NPB_GAIN 390 0x0000 //TX_NN_NPB_GAIN -391 0x0000 //TX_CSX_ALPHA_0 -392 0x0000 //TX_CSX_ALPHA_1 -393 0x0000 //TX_CSX_ALPHA_2 -394 0x0000 //TX_CSX_ALPHA_3 -395 0x0800 //TX_MU_ARSP_EST -396 0x00C8 //TX_P_OUTBEAM_MIN_TH +391 0x7FFF //TX_POST_MASK_SUP_HSNE +392 0x1388 //TX_TAIL_DET_TH +393 0x4000 //TX_B_LESSCUT_RTO_WTA +394 0x0000 //TX_MEL_G_R +395 0x0080 //TX_SUPHIGH_TH +396 0x0000 //TX_MASK_G_R 397 0x0002 //TX_EXTRA_NS_L -398 0x0800 //TX_EXTRA_NS_A -399 0x0005 //TX_VR_NOISE_FLOOR_TH +398 0x1800 //TX_C_POST_FLT_MASK +399 0x7FFF //TX_A_POST_FLT_WNS 400 0x0148 //TX_MIN_G_LOW300HZ 401 0x0002 //TX_MAXLEVEL_CNG 402 0x00B4 //TX_STN_NOISE_TH 403 0x4000 //TX_POST_MASK_SUP 404 0x7FFF //TX_POST_MASK_ADJUST 405 0x00C8 //TX_NS_ENOISE_MIC0_TH -406 0x0014 //TX_MINENOISE_MIC0_TH +406 0x00DC //TX_MINENOISE_MIC0_TH 407 0x012C //TX_MINENOISE_MIC0_S_TH 408 0x7FFF //TX_MIN_G_CTRL_SSNS 409 0x0000 //TX_METAL_RTO_THR @@ -16308,16 +24552,16 @@ 511 0x6666 //TX_MIC_TO_BFGAIN 512 0x0000 //TX_MICTOBFGAIN0 513 0x0000 //TX_FASTMUE_TH -514 0x0000 //TX_DERVB_LEN_0 -515 0x0000 //TX_DERVB_LEN_1 -516 0x0000 //TX_RHO_DERVB -517 0x0000 //TX_MIC_INDX_DERVB -518 0x0000 //TX_MU_DERVB -519 0x0000 //TX_DR_RESRV_0 -520 0x0000 //TX_DR_RESRV_1 -521 0x0000 //TX_DR_RESRV_2 -522 0x0000 //TX_DR_RESRV_3 -523 0x0000 //TX_DR_RESRV_4 +514 0xC000 //TX_DEREVERB_LF_MU +515 0xC000 //TX_DEREVERB_HF_MU +516 0xCCCC //TX_DEREVERB_DELAY +517 0xD999 //TX_DEREVERB_COEF_LEN +518 0x1F40 //TX_DEREVERB_DNR +519 0x0000 //TX_DEREVERB_ALPHA +520 0x0000 //TX_DEREVERB_BETA +521 0x0000 //TX_GSC_RTOL_TH +522 0x7000 //TX_GSC_RTOH_TH +523 0x0064 //TX_WIDE2_MEANHTH 524 0x0000 //TX_DR_RESRV_5 525 0x0000 //TX_DR_RESRV_6 526 0x0000 //TX_DR_RESRV_7 @@ -16685,14 +24929,79 @@ 888 0x00C8 //TX_FASTNS_ARSPC_TH 889 0xC000 //TX_FASTNS_MASK5_TH 890 0x4848 //TX_POSTSSA_MIN_G_VR_MASK -891 0x7FFF //TX_A_LESSCUT_RTO_MASK +891 0x4000 //TX_A_LESSCUT_RTO_MASK 892 0x1770 //TX_FASTNS_NOISETH 893 0xC000 //TX_FASTNS_SSA_THLFL 894 0xC000 //TX_FASTNS_SSA_THHFL 895 0xCCCC //TX_FASTNS_SSA_THLFH 896 0xD999 //TX_FASTNS_SSA_THHFH +897 0x2339 //TX_SENDFUNC_REG_MICMUTE +898 0x0021 //TX_SENDFUNC_REG_MICMUTE1 +899 0x02BC //TX_MICMUTE_RATIO_THR +900 0x0140 //TX_MICMUTE_AMP_THR +901 0x0004 //TX_MICMUTE_HPF_IND +902 0x00C0 //TX_MICMUTE_LOG_EYR_TH +903 0x0008 //TX_MICMUTE_CVG_TIME +904 0x0008 //TX_MICMUTE_RELEASE_TIME +905 0x01FE //TX_MIC_VOLUME_MIC0MUTE +906 0x0020 //TX_MICMUTE_EPD_OFFSET_0 +907 0x001E //TX_MICMUTE_FRQ_AEC_L +908 0x7999 //TX_MICMUTE_EAD_THR +909 0x7FFF //TX_MICMUTE_LAMBDA_CB_NLE +910 0x7FFF //TX_MICMUTE_LAMBDA_RE_EST +911 0x4000 //TX_DTD_THR1_MICMUTE_0 +912 0x7000 //TX_DTD_THR1_MICMUTE_1 +913 0x7FFF //TX_DTD_THR1_MICMUTE_2 +914 0x7FFF //TX_DTD_THR1_MICMUTE_3 +915 0x6CCC //TX_DTD_THR2_MICMUTE_0 +916 0x0400 //TX_MICMUTE_MIN_EQ_RE_EST_0 +917 0x0400 //TX_MICMUTE_MIN_EQ_RE_EST_1 +918 0x1000 //TX_MICMUTE_MIN_EQ_RE_EST_2 +919 0x7FFF //TX_MICMUTE_MIN_EQ_RE_EST_3 +920 0x7FFF //TX_MICMUTE_MIN_EQ_RE_EST_4 +921 0x4000 //TX_MICMUTE_C_POST_FLT +922 0x03E8 //TX_MICMUTE_DT_CUT_K +923 0x0001 //TX_MICMUTE_DT_CUT_THR +924 0x03E8 //TX_MICMUTE_DT_CUT_K2 +925 0x0001 //TX_MICMUTE_DT_CUT_THR2 +926 0x0064 //TX_MICMUTE_DT2_HOLD_N +927 0x1000 //TX_MICMUTE_RATIODTH_THCUT +928 0x1000 //TX_MICMUTE_B_POST_FLT_ECHOL +929 0x7FFF //TX_MICMUTE_B_POST_FLT_ECHOH +930 0x0400 //TX_MICMUTE_C_POST_FLT_MASK +931 0x7999 //TX_MICMUTE_RATIODTL_CUT_TH +932 0x0258 //TX_MICMUTE_DT_CUT_K1 +933 0x0800 //TX_MICMUTE_N2_SN_EST +934 0xFC00 //TX_MICMUTE_THR_SN_EST_0 +935 0x001C //TX_MICMUTE_MIN_G_CTRL_0 +936 0x6000 //TX_MICMUTE_A_POST_FILT_S_0 +937 0x7000 //TX_MICMUTE_B_POST_FILT_0 +938 0x2710 //TX_MIC1RUB_AMP_THR +939 0x0010 //TX_MIC1MUTE_RATIO_THR +940 0x0450 //TX_MIC1MUTE_AMP_THR +941 0x0008 //TX_MIC1MUTE_CVG_TIME +942 0x0008 //TX_MIC1MUTE_RELEASE_TIME +943 0x0000 //TX_AMS_RESRV_01 +944 0x0000 //TX_AMS_RESRV_02 +945 0x0000 //TX_AMS_RESRV_03 +946 0x0000 //TX_AMS_RESRV_04 +947 0x0000 //TX_AMS_RESRV_05 +948 0x0000 //TX_AMS_RESRV_06 +949 0x0000 //TX_AMS_RESRV_07 +950 0x0000 //TX_AMS_RESRV_08 +951 0x0000 //TX_AMS_RESRV_09 +952 0x0000 //TX_AMS_RESRV_10 +953 0x0000 //TX_AMS_RESRV_11 +954 0x0000 //TX_AMS_RESRV_12 +955 0x0000 //TX_AMS_RESRV_13 +956 0x0000 //TX_AMS_RESRV_14 +957 0x0000 //TX_AMS_RESRV_15 +958 0x0000 //TX_AMS_RESRV_16 +959 0x0000 //TX_AMS_RESRV_17 +960 0x0000 //TX_AMS_RESRV_18 +961 0x0000 //TX_AMS_RESRV_19 #RX -0 0x002C //RX_RECVFUNC_MODE_0 +0 0x202C //RX_RECVFUNC_MODE_0 1 0x0000 //RX_RECVFUNC_MODE_1 2 0x0001 //RX_SAMPLINGFREQ_SIG 3 0x0001 //RX_SAMPLINGFREQ_PROC @@ -17542,11 +25851,862 @@ 110 0x0000 //RX_FDDRC_RESRV_0 129 0x0100 //RX_SPK_VOL 130 0x0000 //RX_VOL_RESRV_0 +#RX 2 +157 0x202C //RX_RECVFUNC_MODE_0 +158 0x0000 //RX_RECVFUNC_MODE_1 +159 0x0001 //RX_SAMPLINGFREQ_SIG +160 0x0001 //RX_SAMPLINGFREQ_PROC +161 0x000A //RX_FRAME_SZ +162 0x0000 //RX_DELAY_OPT +163 0x3000 //RX_TDDRC_ALPHA_UP_1 +164 0x3000 //RX_TDDRC_ALPHA_UP_2 +165 0x3000 //RX_TDDRC_ALPHA_UP_3 +166 0x3000 //RX_TDDRC_ALPHA_UP_4 +167 0x0800 //RX_PGA +168 0x7FFF //RX_A_HP +169 0x4000 //RX_B_PE +170 0x3800 //RX_THR_PITCH_DET_0 +171 0x3000 //RX_THR_PITCH_DET_1 +172 0x2800 //RX_THR_PITCH_DET_2 +173 0x0008 //RX_PITCH_BFR_LEN +174 0x0003 //RX_SBD_PITCH_DET +175 0x0100 //RX_PP_RESRV_0 +176 0x0020 //RX_PP_RESRV_1 +177 0x0600 //RX_N_SN_EST +178 0x000C //RX_N2_SN_EST +179 0x0010 //RX_NS_LVL_CTRL +180 0xF800 //RX_THR_SN_EST +181 0x7CCD //RX_LAMBDA_PFILT +182 0x000A //RX_FENS_RESRV_0 +183 0x0190 //RX_FENS_RESRV_1 +184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +187 0x0002 //RX_EXTRA_NS_L +188 0x0800 //RX_EXTRA_NS_A +189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +190 0x7FFF //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +192 0x199A //RX_A_POST_FLT +193 0x0000 //RX_LMT_THRD +194 0x4000 //RX_LMT_ALPHA +195 0x001C //RX_FDEQ_SUBNUM +196 0x4848 //RX_FDEQ_GAIN_0 +197 0x4848 //RX_FDEQ_GAIN_1 +198 0x4848 //RX_FDEQ_GAIN_2 +199 0x4848 //RX_FDEQ_GAIN_3 +200 0x4848 //RX_FDEQ_GAIN_4 +201 0x4848 //RX_FDEQ_GAIN_5 +202 0x4848 //RX_FDEQ_GAIN_6 +203 0x4848 //RX_FDEQ_GAIN_7 +204 0x4848 //RX_FDEQ_GAIN_8 +205 0x4848 //RX_FDEQ_GAIN_9 +206 0x4848 //RX_FDEQ_GAIN_10 +207 0x4848 //RX_FDEQ_GAIN_11 +208 0x4848 //RX_FDEQ_GAIN_12 +209 0x4848 //RX_FDEQ_GAIN_13 +210 0x4848 //RX_FDEQ_GAIN_14 +211 0x4848 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0202 //RX_FDEQ_BIN_0 +221 0x0203 //RX_FDEQ_BIN_1 +222 0x0303 //RX_FDEQ_BIN_2 +223 0x0304 //RX_FDEQ_BIN_3 +224 0x0405 //RX_FDEQ_BIN_4 +225 0x0506 //RX_FDEQ_BIN_5 +226 0x0708 //RX_FDEQ_BIN_6 +227 0x090A //RX_FDEQ_BIN_7 +228 0x0B0C //RX_FDEQ_BIN_8 +229 0x0D0E //RX_FDEQ_BIN_9 +230 0x0E0F //RX_FDEQ_BIN_10 +231 0x0F10 //RX_FDEQ_BIN_11 +232 0x1011 //RX_FDEQ_BIN_12 +233 0x1104 //RX_FDEQ_BIN_13 +234 0x0000 //RX_FDEQ_BIN_14 +235 0x0000 //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x4000 //RX_FDEQ_RESRV_0 +245 0x0320 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0030 //RX_FDDRC_BAND_MARGIN_1 +248 0x0050 //RX_FDDRC_BAND_MARGIN_2 +249 0x0080 //RX_FDDRC_BAND_MARGIN_3 +250 0x0007 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x5000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x6400 //RX_FDDRC_THRD_3_2 +258 0x6400 //RX_FDDRC_THRD_3_3 +259 0x2000 //RX_FDDRC_SLANT_0_0 +260 0x2000 //RX_FDDRC_SLANT_0_1 +261 0x2000 //RX_FDDRC_SLANT_0_2 +262 0x2000 //RX_FDDRC_SLANT_0_3 +263 0x5333 //RX_FDDRC_SLANT_1_0 +264 0x5333 //RX_FDDRC_SLANT_1_1 +265 0x5333 //RX_FDDRC_SLANT_1_2 +266 0x5333 //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +268 0x0002 //RX_FILTINDX +269 0x0000 //RX_TDDRC_THRD_0 +270 0x0000 //RX_TDDRC_THRD_1 +271 0x2000 //RX_TDDRC_THRD_2 +272 0x3000 //RX_TDDRC_THRD_3 +273 0x0800 //RX_TDDRC_SLANT_0 +274 0x7EB8 //RX_TDDRC_SLANT_1 +275 0x3000 //RX_TDDRC_ALPHA_UP_0 +276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x199A //RX_TDDRC_HMNC_GAIN +279 0x0001 //RX_TDDRC_SMT_FLAG +280 0x0CCD //RX_TDDRC_SMT_W +281 0x0196 //RX_TDDRC_DRC_GAIN +282 0x7C00 //RX_LAMBDA_PKA_FP +283 0x2000 //RX_TPKA_FP +284 0x2000 //RX_MIN_G_FP +285 0x0080 //RX_MAX_G_FP +286 0x000B //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 +288 0x0000 //RX_MAXLEVEL_CNG +289 0x3000 //RX_BWE_UV_TH +290 0x3000 //RX_BWE_UV_TH2 +291 0x1800 //RX_BWE_UV_TH3 +292 0x1000 //RX_BWE_V_TH +293 0x04CD //RX_BWE_GAIN1_V_TH1 +294 0x0F33 //RX_BWE_GAIN1_V_TH2 +295 0x7333 //RX_BWE_UV_EQ +296 0x199A //RX_BWE_V_EQ +297 0x7333 //RX_BWE_TONE_TH +298 0x0004 //RX_BWE_UV_HOLD_T +299 0x6CCD //RX_BWE_GAIN2_ALPHA +300 0x799A //RX_BWE_GAIN3_ALPHA +301 0x001E //RX_BWE_CUTOFF +302 0x3000 //RX_BWE_GAINFILL +303 0x3200 //RX_BWE_MAXTH_TONE +304 0x2000 //RX_BWE_EQ_0 +305 0x2000 //RX_BWE_EQ_1 +306 0x2000 //RX_BWE_EQ_2 +307 0x2000 //RX_BWE_EQ_3 +308 0x2000 //RX_BWE_EQ_4 +309 0x2000 //RX_BWE_EQ_5 +310 0x2000 //RX_BWE_EQ_6 +311 0x0000 //RX_BWE_RESRV_0 +312 0x0000 //RX_BWE_RESRV_1 +313 0x0000 //RX_BWE_RESRV_2 +#VOL 0 +163 0x3000 //RX_TDDRC_ALPHA_UP_1 +164 0x3000 //RX_TDDRC_ALPHA_UP_2 +165 0x3000 //RX_TDDRC_ALPHA_UP_3 +166 0x3000 //RX_TDDRC_ALPHA_UP_4 +184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +190 0x7FFF //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +269 0x0000 //RX_TDDRC_THRD_0 +270 0x0000 //RX_TDDRC_THRD_1 +271 0x2000 //RX_TDDRC_THRD_2 +272 0x3000 //RX_TDDRC_THRD_3 +273 0x0800 //RX_TDDRC_SLANT_0 +274 0x7EB8 //RX_TDDRC_SLANT_1 +275 0x3000 //RX_TDDRC_ALPHA_UP_0 +276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x199A //RX_TDDRC_HMNC_GAIN +279 0x0001 //RX_TDDRC_SMT_FLAG +280 0x0CCD //RX_TDDRC_SMT_W +281 0x0196 //RX_TDDRC_DRC_GAIN +195 0x001C //RX_FDEQ_SUBNUM +196 0x4848 //RX_FDEQ_GAIN_0 +197 0x4848 //RX_FDEQ_GAIN_1 +198 0x4848 //RX_FDEQ_GAIN_2 +199 0x4848 //RX_FDEQ_GAIN_3 +200 0x4848 //RX_FDEQ_GAIN_4 +201 0x4848 //RX_FDEQ_GAIN_5 +202 0x4848 //RX_FDEQ_GAIN_6 +203 0x4848 //RX_FDEQ_GAIN_7 +204 0x4848 //RX_FDEQ_GAIN_8 +205 0x4848 //RX_FDEQ_GAIN_9 +206 0x4848 //RX_FDEQ_GAIN_10 +207 0x4848 //RX_FDEQ_GAIN_11 +208 0x4848 //RX_FDEQ_GAIN_12 +209 0x4848 //RX_FDEQ_GAIN_13 +210 0x4848 //RX_FDEQ_GAIN_14 +211 0x4848 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0202 //RX_FDEQ_BIN_0 +221 0x0203 //RX_FDEQ_BIN_1 +222 0x0303 //RX_FDEQ_BIN_2 +223 0x0304 //RX_FDEQ_BIN_3 +224 0x0405 //RX_FDEQ_BIN_4 +225 0x0506 //RX_FDEQ_BIN_5 +226 0x0708 //RX_FDEQ_BIN_6 +227 0x090A //RX_FDEQ_BIN_7 +228 0x0B0C //RX_FDEQ_BIN_8 +229 0x0D0E //RX_FDEQ_BIN_9 +230 0x0E0F //RX_FDEQ_BIN_10 +231 0x0F10 //RX_FDEQ_BIN_11 +232 0x1011 //RX_FDEQ_BIN_12 +233 0x1104 //RX_FDEQ_BIN_13 +234 0x0000 //RX_FDEQ_BIN_14 +235 0x0000 //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x4000 //RX_FDEQ_RESRV_0 +245 0x0320 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0030 //RX_FDDRC_BAND_MARGIN_1 +248 0x0050 //RX_FDDRC_BAND_MARGIN_2 +249 0x0080 //RX_FDDRC_BAND_MARGIN_3 +250 0x0007 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x5000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x6400 //RX_FDDRC_THRD_3_2 +258 0x6400 //RX_FDDRC_THRD_3_3 +259 0x2000 //RX_FDDRC_SLANT_0_0 +260 0x2000 //RX_FDDRC_SLANT_0_1 +261 0x2000 //RX_FDDRC_SLANT_0_2 +262 0x2000 //RX_FDDRC_SLANT_0_3 +263 0x5333 //RX_FDDRC_SLANT_1_0 +264 0x5333 //RX_FDDRC_SLANT_1_1 +265 0x5333 //RX_FDDRC_SLANT_1_2 +266 0x5333 //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +286 0x000B //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 +#VOL 1 +163 0x3000 //RX_TDDRC_ALPHA_UP_1 +164 0x3000 //RX_TDDRC_ALPHA_UP_2 +165 0x3000 //RX_TDDRC_ALPHA_UP_3 +166 0x3000 //RX_TDDRC_ALPHA_UP_4 +184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +190 0x7FFF //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +269 0x0000 //RX_TDDRC_THRD_0 +270 0x0000 //RX_TDDRC_THRD_1 +271 0x2000 //RX_TDDRC_THRD_2 +272 0x3000 //RX_TDDRC_THRD_3 +273 0x0800 //RX_TDDRC_SLANT_0 +274 0x7EB8 //RX_TDDRC_SLANT_1 +275 0x3000 //RX_TDDRC_ALPHA_UP_0 +276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x199A //RX_TDDRC_HMNC_GAIN +279 0x0001 //RX_TDDRC_SMT_FLAG +280 0x0CCD //RX_TDDRC_SMT_W +281 0x0196 //RX_TDDRC_DRC_GAIN +195 0x001C //RX_FDEQ_SUBNUM +196 0x4848 //RX_FDEQ_GAIN_0 +197 0x4848 //RX_FDEQ_GAIN_1 +198 0x4848 //RX_FDEQ_GAIN_2 +199 0x4848 //RX_FDEQ_GAIN_3 +200 0x4848 //RX_FDEQ_GAIN_4 +201 0x4848 //RX_FDEQ_GAIN_5 +202 0x4848 //RX_FDEQ_GAIN_6 +203 0x4848 //RX_FDEQ_GAIN_7 +204 0x4848 //RX_FDEQ_GAIN_8 +205 0x4848 //RX_FDEQ_GAIN_9 +206 0x4848 //RX_FDEQ_GAIN_10 +207 0x4848 //RX_FDEQ_GAIN_11 +208 0x4848 //RX_FDEQ_GAIN_12 +209 0x4848 //RX_FDEQ_GAIN_13 +210 0x4848 //RX_FDEQ_GAIN_14 +211 0x4848 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0202 //RX_FDEQ_BIN_0 +221 0x0203 //RX_FDEQ_BIN_1 +222 0x0303 //RX_FDEQ_BIN_2 +223 0x0304 //RX_FDEQ_BIN_3 +224 0x0405 //RX_FDEQ_BIN_4 +225 0x0506 //RX_FDEQ_BIN_5 +226 0x0708 //RX_FDEQ_BIN_6 +227 0x090A //RX_FDEQ_BIN_7 +228 0x0B0C //RX_FDEQ_BIN_8 +229 0x0D0E //RX_FDEQ_BIN_9 +230 0x0E0F //RX_FDEQ_BIN_10 +231 0x0F10 //RX_FDEQ_BIN_11 +232 0x1011 //RX_FDEQ_BIN_12 +233 0x1104 //RX_FDEQ_BIN_13 +234 0x0000 //RX_FDEQ_BIN_14 +235 0x0000 //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x4000 //RX_FDEQ_RESRV_0 +245 0x0320 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0030 //RX_FDDRC_BAND_MARGIN_1 +248 0x0050 //RX_FDDRC_BAND_MARGIN_2 +249 0x0080 //RX_FDDRC_BAND_MARGIN_3 +250 0x0007 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x5000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x6400 //RX_FDDRC_THRD_3_2 +258 0x6400 //RX_FDDRC_THRD_3_3 +259 0x2000 //RX_FDDRC_SLANT_0_0 +260 0x2000 //RX_FDDRC_SLANT_0_1 +261 0x2000 //RX_FDDRC_SLANT_0_2 +262 0x2000 //RX_FDDRC_SLANT_0_3 +263 0x5333 //RX_FDDRC_SLANT_1_0 +264 0x5333 //RX_FDDRC_SLANT_1_1 +265 0x5333 //RX_FDDRC_SLANT_1_2 +266 0x5333 //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +286 0x0013 //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 +#VOL 2 +163 0x3000 //RX_TDDRC_ALPHA_UP_1 +164 0x3000 //RX_TDDRC_ALPHA_UP_2 +165 0x3000 //RX_TDDRC_ALPHA_UP_3 +166 0x3000 //RX_TDDRC_ALPHA_UP_4 +184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +190 0x7FFF //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +269 0x0000 //RX_TDDRC_THRD_0 +270 0x0000 //RX_TDDRC_THRD_1 +271 0x2000 //RX_TDDRC_THRD_2 +272 0x3000 //RX_TDDRC_THRD_3 +273 0x0800 //RX_TDDRC_SLANT_0 +274 0x7EB8 //RX_TDDRC_SLANT_1 +275 0x3000 //RX_TDDRC_ALPHA_UP_0 +276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x199A //RX_TDDRC_HMNC_GAIN +279 0x0001 //RX_TDDRC_SMT_FLAG +280 0x0CCD //RX_TDDRC_SMT_W +281 0x0196 //RX_TDDRC_DRC_GAIN +195 0x001C //RX_FDEQ_SUBNUM +196 0x4848 //RX_FDEQ_GAIN_0 +197 0x4848 //RX_FDEQ_GAIN_1 +198 0x4848 //RX_FDEQ_GAIN_2 +199 0x4848 //RX_FDEQ_GAIN_3 +200 0x4848 //RX_FDEQ_GAIN_4 +201 0x4848 //RX_FDEQ_GAIN_5 +202 0x4848 //RX_FDEQ_GAIN_6 +203 0x4848 //RX_FDEQ_GAIN_7 +204 0x4848 //RX_FDEQ_GAIN_8 +205 0x4848 //RX_FDEQ_GAIN_9 +206 0x4848 //RX_FDEQ_GAIN_10 +207 0x4848 //RX_FDEQ_GAIN_11 +208 0x4848 //RX_FDEQ_GAIN_12 +209 0x4848 //RX_FDEQ_GAIN_13 +210 0x4848 //RX_FDEQ_GAIN_14 +211 0x4848 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0202 //RX_FDEQ_BIN_0 +221 0x0203 //RX_FDEQ_BIN_1 +222 0x0303 //RX_FDEQ_BIN_2 +223 0x0304 //RX_FDEQ_BIN_3 +224 0x0405 //RX_FDEQ_BIN_4 +225 0x0506 //RX_FDEQ_BIN_5 +226 0x0708 //RX_FDEQ_BIN_6 +227 0x090A //RX_FDEQ_BIN_7 +228 0x0B0C //RX_FDEQ_BIN_8 +229 0x0D0E //RX_FDEQ_BIN_9 +230 0x0E0F //RX_FDEQ_BIN_10 +231 0x0F10 //RX_FDEQ_BIN_11 +232 0x1011 //RX_FDEQ_BIN_12 +233 0x1104 //RX_FDEQ_BIN_13 +234 0x0000 //RX_FDEQ_BIN_14 +235 0x0000 //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x4000 //RX_FDEQ_RESRV_0 +245 0x0320 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0030 //RX_FDDRC_BAND_MARGIN_1 +248 0x0050 //RX_FDDRC_BAND_MARGIN_2 +249 0x0080 //RX_FDDRC_BAND_MARGIN_3 +250 0x0007 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x5000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x6400 //RX_FDDRC_THRD_3_2 +258 0x6400 //RX_FDDRC_THRD_3_3 +259 0x2000 //RX_FDDRC_SLANT_0_0 +260 0x2000 //RX_FDDRC_SLANT_0_1 +261 0x2000 //RX_FDDRC_SLANT_0_2 +262 0x2000 //RX_FDDRC_SLANT_0_3 +263 0x5333 //RX_FDDRC_SLANT_1_0 +264 0x5333 //RX_FDDRC_SLANT_1_1 +265 0x5333 //RX_FDDRC_SLANT_1_2 +266 0x5333 //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +286 0x0020 //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 +#VOL 3 +163 0x3000 //RX_TDDRC_ALPHA_UP_1 +164 0x3000 //RX_TDDRC_ALPHA_UP_2 +165 0x3000 //RX_TDDRC_ALPHA_UP_3 +166 0x3000 //RX_TDDRC_ALPHA_UP_4 +184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +190 0x7FFF //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +269 0x0000 //RX_TDDRC_THRD_0 +270 0x0000 //RX_TDDRC_THRD_1 +271 0x2000 //RX_TDDRC_THRD_2 +272 0x3000 //RX_TDDRC_THRD_3 +273 0x0800 //RX_TDDRC_SLANT_0 +274 0x7EB8 //RX_TDDRC_SLANT_1 +275 0x3000 //RX_TDDRC_ALPHA_UP_0 +276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x199A //RX_TDDRC_HMNC_GAIN +279 0x0001 //RX_TDDRC_SMT_FLAG +280 0x0CCD //RX_TDDRC_SMT_W +281 0x0196 //RX_TDDRC_DRC_GAIN +195 0x001C //RX_FDEQ_SUBNUM +196 0x4848 //RX_FDEQ_GAIN_0 +197 0x4848 //RX_FDEQ_GAIN_1 +198 0x4848 //RX_FDEQ_GAIN_2 +199 0x4848 //RX_FDEQ_GAIN_3 +200 0x4848 //RX_FDEQ_GAIN_4 +201 0x4848 //RX_FDEQ_GAIN_5 +202 0x4848 //RX_FDEQ_GAIN_6 +203 0x4848 //RX_FDEQ_GAIN_7 +204 0x4848 //RX_FDEQ_GAIN_8 +205 0x4848 //RX_FDEQ_GAIN_9 +206 0x4848 //RX_FDEQ_GAIN_10 +207 0x4848 //RX_FDEQ_GAIN_11 +208 0x4848 //RX_FDEQ_GAIN_12 +209 0x4848 //RX_FDEQ_GAIN_13 +210 0x4848 //RX_FDEQ_GAIN_14 +211 0x4848 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0202 //RX_FDEQ_BIN_0 +221 0x0203 //RX_FDEQ_BIN_1 +222 0x0303 //RX_FDEQ_BIN_2 +223 0x0304 //RX_FDEQ_BIN_3 +224 0x0405 //RX_FDEQ_BIN_4 +225 0x0506 //RX_FDEQ_BIN_5 +226 0x0708 //RX_FDEQ_BIN_6 +227 0x090A //RX_FDEQ_BIN_7 +228 0x0B0C //RX_FDEQ_BIN_8 +229 0x0D0E //RX_FDEQ_BIN_9 +230 0x0E0F //RX_FDEQ_BIN_10 +231 0x0F10 //RX_FDEQ_BIN_11 +232 0x1011 //RX_FDEQ_BIN_12 +233 0x1104 //RX_FDEQ_BIN_13 +234 0x0000 //RX_FDEQ_BIN_14 +235 0x0000 //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x4000 //RX_FDEQ_RESRV_0 +245 0x0320 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0030 //RX_FDDRC_BAND_MARGIN_1 +248 0x0050 //RX_FDDRC_BAND_MARGIN_2 +249 0x0080 //RX_FDDRC_BAND_MARGIN_3 +250 0x0007 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x5000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x6400 //RX_FDDRC_THRD_3_2 +258 0x6400 //RX_FDDRC_THRD_3_3 +259 0x2000 //RX_FDDRC_SLANT_0_0 +260 0x2000 //RX_FDDRC_SLANT_0_1 +261 0x2000 //RX_FDDRC_SLANT_0_2 +262 0x2000 //RX_FDDRC_SLANT_0_3 +263 0x5333 //RX_FDDRC_SLANT_1_0 +264 0x5333 //RX_FDDRC_SLANT_1_1 +265 0x5333 //RX_FDDRC_SLANT_1_2 +266 0x5333 //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +286 0x0036 //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 +#VOL 4 +163 0x3000 //RX_TDDRC_ALPHA_UP_1 +164 0x3000 //RX_TDDRC_ALPHA_UP_2 +165 0x3000 //RX_TDDRC_ALPHA_UP_3 +166 0x3000 //RX_TDDRC_ALPHA_UP_4 +184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +190 0x7FFF //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +269 0x0000 //RX_TDDRC_THRD_0 +270 0x0000 //RX_TDDRC_THRD_1 +271 0x2000 //RX_TDDRC_THRD_2 +272 0x3000 //RX_TDDRC_THRD_3 +273 0x0800 //RX_TDDRC_SLANT_0 +274 0x7EB8 //RX_TDDRC_SLANT_1 +275 0x3000 //RX_TDDRC_ALPHA_UP_0 +276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x199A //RX_TDDRC_HMNC_GAIN +279 0x0001 //RX_TDDRC_SMT_FLAG +280 0x0CCD //RX_TDDRC_SMT_W +281 0x0196 //RX_TDDRC_DRC_GAIN +195 0x001C //RX_FDEQ_SUBNUM +196 0x4848 //RX_FDEQ_GAIN_0 +197 0x4848 //RX_FDEQ_GAIN_1 +198 0x4848 //RX_FDEQ_GAIN_2 +199 0x4848 //RX_FDEQ_GAIN_3 +200 0x4848 //RX_FDEQ_GAIN_4 +201 0x4848 //RX_FDEQ_GAIN_5 +202 0x4848 //RX_FDEQ_GAIN_6 +203 0x4848 //RX_FDEQ_GAIN_7 +204 0x4848 //RX_FDEQ_GAIN_8 +205 0x4848 //RX_FDEQ_GAIN_9 +206 0x4848 //RX_FDEQ_GAIN_10 +207 0x4848 //RX_FDEQ_GAIN_11 +208 0x4848 //RX_FDEQ_GAIN_12 +209 0x4848 //RX_FDEQ_GAIN_13 +210 0x4848 //RX_FDEQ_GAIN_14 +211 0x4848 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0202 //RX_FDEQ_BIN_0 +221 0x0203 //RX_FDEQ_BIN_1 +222 0x0303 //RX_FDEQ_BIN_2 +223 0x0304 //RX_FDEQ_BIN_3 +224 0x0405 //RX_FDEQ_BIN_4 +225 0x0506 //RX_FDEQ_BIN_5 +226 0x0708 //RX_FDEQ_BIN_6 +227 0x090A //RX_FDEQ_BIN_7 +228 0x0B0C //RX_FDEQ_BIN_8 +229 0x0D0E //RX_FDEQ_BIN_9 +230 0x0E0F //RX_FDEQ_BIN_10 +231 0x0F10 //RX_FDEQ_BIN_11 +232 0x1011 //RX_FDEQ_BIN_12 +233 0x1104 //RX_FDEQ_BIN_13 +234 0x0000 //RX_FDEQ_BIN_14 +235 0x0000 //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x4000 //RX_FDEQ_RESRV_0 +245 0x0320 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0030 //RX_FDDRC_BAND_MARGIN_1 +248 0x0050 //RX_FDDRC_BAND_MARGIN_2 +249 0x0080 //RX_FDDRC_BAND_MARGIN_3 +250 0x0007 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x5000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x6400 //RX_FDDRC_THRD_3_2 +258 0x6400 //RX_FDDRC_THRD_3_3 +259 0x2000 //RX_FDDRC_SLANT_0_0 +260 0x2000 //RX_FDDRC_SLANT_0_1 +261 0x2000 //RX_FDDRC_SLANT_0_2 +262 0x2000 //RX_FDDRC_SLANT_0_3 +263 0x5333 //RX_FDDRC_SLANT_1_0 +264 0x5333 //RX_FDDRC_SLANT_1_1 +265 0x5333 //RX_FDDRC_SLANT_1_2 +266 0x5333 //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +286 0x005B //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 +#VOL 5 +163 0x3000 //RX_TDDRC_ALPHA_UP_1 +164 0x3000 //RX_TDDRC_ALPHA_UP_2 +165 0x3000 //RX_TDDRC_ALPHA_UP_3 +166 0x3000 //RX_TDDRC_ALPHA_UP_4 +184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +190 0x7FFF //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +269 0x0000 //RX_TDDRC_THRD_0 +270 0x0000 //RX_TDDRC_THRD_1 +271 0x2000 //RX_TDDRC_THRD_2 +272 0x3000 //RX_TDDRC_THRD_3 +273 0x0800 //RX_TDDRC_SLANT_0 +274 0x7EB8 //RX_TDDRC_SLANT_1 +275 0x3000 //RX_TDDRC_ALPHA_UP_0 +276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x199A //RX_TDDRC_HMNC_GAIN +279 0x0001 //RX_TDDRC_SMT_FLAG +280 0x0CCD //RX_TDDRC_SMT_W +281 0x0196 //RX_TDDRC_DRC_GAIN +195 0x001C //RX_FDEQ_SUBNUM +196 0x4848 //RX_FDEQ_GAIN_0 +197 0x4848 //RX_FDEQ_GAIN_1 +198 0x4848 //RX_FDEQ_GAIN_2 +199 0x4848 //RX_FDEQ_GAIN_3 +200 0x4848 //RX_FDEQ_GAIN_4 +201 0x4848 //RX_FDEQ_GAIN_5 +202 0x4848 //RX_FDEQ_GAIN_6 +203 0x4848 //RX_FDEQ_GAIN_7 +204 0x4848 //RX_FDEQ_GAIN_8 +205 0x4848 //RX_FDEQ_GAIN_9 +206 0x4848 //RX_FDEQ_GAIN_10 +207 0x4848 //RX_FDEQ_GAIN_11 +208 0x4848 //RX_FDEQ_GAIN_12 +209 0x4848 //RX_FDEQ_GAIN_13 +210 0x4848 //RX_FDEQ_GAIN_14 +211 0x4848 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0202 //RX_FDEQ_BIN_0 +221 0x0203 //RX_FDEQ_BIN_1 +222 0x0303 //RX_FDEQ_BIN_2 +223 0x0304 //RX_FDEQ_BIN_3 +224 0x0405 //RX_FDEQ_BIN_4 +225 0x0506 //RX_FDEQ_BIN_5 +226 0x0708 //RX_FDEQ_BIN_6 +227 0x090A //RX_FDEQ_BIN_7 +228 0x0B0C //RX_FDEQ_BIN_8 +229 0x0D0E //RX_FDEQ_BIN_9 +230 0x0E0F //RX_FDEQ_BIN_10 +231 0x0F10 //RX_FDEQ_BIN_11 +232 0x1011 //RX_FDEQ_BIN_12 +233 0x1104 //RX_FDEQ_BIN_13 +234 0x0000 //RX_FDEQ_BIN_14 +235 0x0000 //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x4000 //RX_FDEQ_RESRV_0 +245 0x0320 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0030 //RX_FDDRC_BAND_MARGIN_1 +248 0x0050 //RX_FDDRC_BAND_MARGIN_2 +249 0x0080 //RX_FDDRC_BAND_MARGIN_3 +250 0x0007 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x5000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x6400 //RX_FDDRC_THRD_3_2 +258 0x6400 //RX_FDDRC_THRD_3_3 +259 0x2000 //RX_FDDRC_SLANT_0_0 +260 0x2000 //RX_FDDRC_SLANT_0_1 +261 0x2000 //RX_FDDRC_SLANT_0_2 +262 0x2000 //RX_FDDRC_SLANT_0_3 +263 0x5333 //RX_FDDRC_SLANT_1_0 +264 0x5333 //RX_FDDRC_SLANT_1_1 +265 0x5333 //RX_FDDRC_SLANT_1_2 +266 0x5333 //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +286 0x0099 //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 +#VOL 6 +163 0x3000 //RX_TDDRC_ALPHA_UP_1 +164 0x3000 //RX_TDDRC_ALPHA_UP_2 +165 0x3000 //RX_TDDRC_ALPHA_UP_3 +166 0x3000 //RX_TDDRC_ALPHA_UP_4 +184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +190 0x7FFF //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +269 0x0000 //RX_TDDRC_THRD_0 +270 0x0000 //RX_TDDRC_THRD_1 +271 0x2000 //RX_TDDRC_THRD_2 +272 0x3000 //RX_TDDRC_THRD_3 +273 0x0800 //RX_TDDRC_SLANT_0 +274 0x7EB8 //RX_TDDRC_SLANT_1 +275 0x3000 //RX_TDDRC_ALPHA_UP_0 +276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x199A //RX_TDDRC_HMNC_GAIN +279 0x0001 //RX_TDDRC_SMT_FLAG +280 0x0CCD //RX_TDDRC_SMT_W +281 0x0196 //RX_TDDRC_DRC_GAIN +195 0x001C //RX_FDEQ_SUBNUM +196 0x4848 //RX_FDEQ_GAIN_0 +197 0x4848 //RX_FDEQ_GAIN_1 +198 0x4848 //RX_FDEQ_GAIN_2 +199 0x4848 //RX_FDEQ_GAIN_3 +200 0x4848 //RX_FDEQ_GAIN_4 +201 0x4848 //RX_FDEQ_GAIN_5 +202 0x4848 //RX_FDEQ_GAIN_6 +203 0x4848 //RX_FDEQ_GAIN_7 +204 0x4848 //RX_FDEQ_GAIN_8 +205 0x4848 //RX_FDEQ_GAIN_9 +206 0x4848 //RX_FDEQ_GAIN_10 +207 0x4848 //RX_FDEQ_GAIN_11 +208 0x4848 //RX_FDEQ_GAIN_12 +209 0x4848 //RX_FDEQ_GAIN_13 +210 0x4848 //RX_FDEQ_GAIN_14 +211 0x4848 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0202 //RX_FDEQ_BIN_0 +221 0x0203 //RX_FDEQ_BIN_1 +222 0x0303 //RX_FDEQ_BIN_2 +223 0x0304 //RX_FDEQ_BIN_3 +224 0x0405 //RX_FDEQ_BIN_4 +225 0x0506 //RX_FDEQ_BIN_5 +226 0x0708 //RX_FDEQ_BIN_6 +227 0x090A //RX_FDEQ_BIN_7 +228 0x0B0C //RX_FDEQ_BIN_8 +229 0x0D0E //RX_FDEQ_BIN_9 +230 0x0E0F //RX_FDEQ_BIN_10 +231 0x0F10 //RX_FDEQ_BIN_11 +232 0x1011 //RX_FDEQ_BIN_12 +233 0x1104 //RX_FDEQ_BIN_13 +234 0x0000 //RX_FDEQ_BIN_14 +235 0x0000 //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x4000 //RX_FDEQ_RESRV_0 +245 0x0320 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0030 //RX_FDDRC_BAND_MARGIN_1 +248 0x0050 //RX_FDDRC_BAND_MARGIN_2 +249 0x0080 //RX_FDDRC_BAND_MARGIN_3 +250 0x0007 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x5000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x6400 //RX_FDDRC_THRD_3_2 +258 0x6400 //RX_FDDRC_THRD_3_3 +259 0x2000 //RX_FDDRC_SLANT_0_0 +260 0x2000 //RX_FDDRC_SLANT_0_1 +261 0x2000 //RX_FDDRC_SLANT_0_2 +262 0x2000 //RX_FDDRC_SLANT_0_3 +263 0x5333 //RX_FDDRC_SLANT_1_0 +264 0x5333 //RX_FDDRC_SLANT_1_1 +265 0x5333 //RX_FDDRC_SLANT_1_2 +266 0x5333 //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +286 0x0100 //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 #CASE_NAME HEADSET-RESERVE1-VOICE_GENERIC-SWB -#PARAM_MODE FULL -#PARAM_TYPE TX+RX -#TOTAL_CUSTOM_STEP 7 +#PARAM_MODE Full +#PARAM_TYPE TX+2RX +#TOTAL_CUSTOM_STEP 7+7 #TX 0 0x0009 //TX_OPERATION_MODE_0 1 0x0001 //TX_OPERATION_MODE_1 @@ -17790,7 +26950,7 @@ 239 0x0800 //TX_DT_RESRV_7 240 0x0800 //TX_DT_RESRV_8 241 0x0000 //TX_DT_RESRV_9 -242 0xF400 //TX_THR_SN_EST_0 +242 0xFA00 //TX_THR_SN_EST_0 243 0xF400 //TX_THR_SN_EST_1 244 0xF600 //TX_THR_SN_EST_2 245 0xF400 //TX_THR_SN_EST_3 @@ -17799,20 +26959,20 @@ 248 0xF400 //TX_THR_SN_EST_6 249 0xF600 //TX_THR_SN_EST_7 250 0x0000 //TX_DELTA_THR_SN_EST_0 -251 0x0000 //TX_DELTA_THR_SN_EST_1 +251 0x0200 //TX_DELTA_THR_SN_EST_1 252 0x0200 //TX_DELTA_THR_SN_EST_2 253 0x0200 //TX_DELTA_THR_SN_EST_3 254 0x0200 //TX_DELTA_THR_SN_EST_4 255 0x0200 //TX_DELTA_THR_SN_EST_5 -256 0x0200 //TX_DELTA_THR_SN_EST_6 +256 0x0000 //TX_DELTA_THR_SN_EST_6 257 0x0200 //TX_DELTA_THR_SN_EST_7 258 0x6000 //TX_LAMBDA_NN_EST_0 -259 0x6000 //TX_LAMBDA_NN_EST_1 +259 0x4000 //TX_LAMBDA_NN_EST_1 260 0x4000 //TX_LAMBDA_NN_EST_2 261 0x4000 //TX_LAMBDA_NN_EST_3 262 0x4000 //TX_LAMBDA_NN_EST_4 263 0x4000 //TX_LAMBDA_NN_EST_5 -264 0x4000 //TX_LAMBDA_NN_EST_6 +264 0x6000 //TX_LAMBDA_NN_EST_6 265 0x4000 //TX_LAMBDA_NN_EST_7 266 0x0400 //TX_N_SN_EST 267 0x001E //TX_INBEAM_T @@ -17830,16 +26990,16 @@ 279 0x1000 //TX_B_POST_FLT_0 280 0x1000 //TX_B_POST_FLT_1 281 0x000B //TX_NS_LVL_CTRL_0 -282 0x000F //TX_NS_LVL_CTRL_1 -283 0x0011 //TX_NS_LVL_CTRL_2 +282 0x0011 //TX_NS_LVL_CTRL_1 +283 0x000F //TX_NS_LVL_CTRL_2 284 0x000F //TX_NS_LVL_CTRL_3 285 0x000F //TX_NS_LVL_CTRL_4 286 0x000F //TX_NS_LVL_CTRL_5 287 0x000F //TX_NS_LVL_CTRL_6 288 0x0011 //TX_NS_LVL_CTRL_7 289 0x000C //TX_MIN_GAIN_S_0 -290 0x000C //TX_MIN_GAIN_S_1 -291 0x000F //TX_MIN_GAIN_S_2 +290 0x000F //TX_MIN_GAIN_S_1 +291 0x000C //TX_MIN_GAIN_S_2 292 0x000C //TX_MIN_GAIN_S_3 293 0x000C //TX_MIN_GAIN_S_4 294 0x000C //TX_MIN_GAIN_S_5 @@ -17863,12 +27023,12 @@ 312 0x7FFF //TX_A_POST_FILT_0 313 0x2000 //TX_A_POST_FILT_1 314 0x2000 //TX_A_POST_FILT_S_0 -315 0x4000 //TX_A_POST_FILT_S_1 +315 0x5000 //TX_A_POST_FILT_S_1 316 0x5000 //TX_A_POST_FILT_S_2 317 0x5000 //TX_A_POST_FILT_S_3 318 0x5000 //TX_A_POST_FILT_S_4 319 0x5000 //TX_A_POST_FILT_S_5 -320 0x5000 //TX_A_POST_FILT_S_6 +320 0x4000 //TX_A_POST_FILT_S_6 321 0x5000 //TX_A_POST_FILT_S_7 322 0x1000 //TX_B_POST_FILT_0 323 0x1000 //TX_B_POST_FILT_1 @@ -17915,7 +27075,7 @@ 364 0x0000 //TX_K_APT 365 0x0001 //TX_NOISEDET 366 0x0190 //TX_NDETCT -367 0x0050 //TX_NOISE_TH_0 +367 0x0383 //TX_NOISE_TH_0 368 0x7FFF //TX_NOISE_TH_0_2 369 0x7FFF //TX_NOISE_TH_0_3 370 0x07D0 //TX_NOISE_TH_1 @@ -17927,11 +27087,11 @@ 376 0x7FFF //TX_NOISE_TH_5_3 377 0x7FFF //TX_NOISE_TH_5_4 378 0x044C //TX_NOISE_TH_6 -379 0x0014 //TX_MINENOISE_TH -380 0x4000 //TX_MINENOISE_MIC0_TH_MTS -381 0xFFEE //TX_MINENOISE_MIC0_TH_EXP -382 0x6000 //TX_MINENOISE_MIC0_S_TH_MTS -383 0xFFF3 //TX_MINENOISE_MIC0_S_TH_EXP +379 0x044C //TX_MINENOISE_TH +380 0xD508 //TX_MORENS_TFMASK_TH +381 0x0001 //TX_DRC_QUIET_FLOOR +382 0x3A98 //TX_RATIODTL_CUT_TH +383 0x0DAC //TX_DT_CUT_K1 384 0x0666 //TX_OUT_ENER_S_TH_CLEAN 385 0x0666 //TX_OUT_ENER_S_TH_LESSCLEAN 386 0x0333 //TX_OUT_ENER_S_TH_NOISY @@ -17939,22 +27099,22 @@ 388 0x0333 //TX_OUT_ENER_TH_SPEECH 389 0x2000 //TX_SN_NPB_GAIN 390 0x0000 //TX_NN_NPB_GAIN -391 0x0000 //TX_CSX_ALPHA_0 -392 0x0000 //TX_CSX_ALPHA_1 -393 0x0000 //TX_CSX_ALPHA_2 -394 0x0000 //TX_CSX_ALPHA_3 -395 0x0800 //TX_MU_ARSP_EST -396 0x00C8 //TX_P_OUTBEAM_MIN_TH +391 0x7FFF //TX_POST_MASK_SUP_HSNE +392 0x1388 //TX_TAIL_DET_TH +393 0x4000 //TX_B_LESSCUT_RTO_WTA +394 0x0000 //TX_MEL_G_R +395 0x0080 //TX_SUPHIGH_TH +396 0x0000 //TX_MASK_G_R 397 0x0002 //TX_EXTRA_NS_L -398 0x0800 //TX_EXTRA_NS_A -399 0x0005 //TX_VR_NOISE_FLOOR_TH +398 0x1800 //TX_C_POST_FLT_MASK +399 0x7FFF //TX_A_POST_FLT_WNS 400 0x0148 //TX_MIN_G_LOW300HZ 401 0x0002 //TX_MAXLEVEL_CNG 402 0x00B4 //TX_STN_NOISE_TH 403 0x4000 //TX_POST_MASK_SUP 404 0x7FFF //TX_POST_MASK_ADJUST 405 0x00C8 //TX_NS_ENOISE_MIC0_TH -406 0x0014 //TX_MINENOISE_MIC0_TH +406 0x02F3 //TX_MINENOISE_MIC0_TH 407 0x012C //TX_MINENOISE_MIC0_S_TH 408 0x2900 //TX_MIN_G_CTRL_SSNS 409 0x0800 //TX_METAL_RTO_THR @@ -18062,16 +27222,16 @@ 511 0x6666 //TX_MIC_TO_BFGAIN 512 0x0000 //TX_MICTOBFGAIN0 513 0x0000 //TX_FASTMUE_TH -514 0x0000 //TX_DERVB_LEN_0 -515 0x0000 //TX_DERVB_LEN_1 -516 0x0000 //TX_RHO_DERVB -517 0x0000 //TX_MIC_INDX_DERVB -518 0x0000 //TX_MU_DERVB -519 0x0000 //TX_DR_RESRV_0 -520 0x0000 //TX_DR_RESRV_1 -521 0x0000 //TX_DR_RESRV_2 -522 0x0000 //TX_DR_RESRV_3 -523 0x0000 //TX_DR_RESRV_4 +514 0xC000 //TX_DEREVERB_LF_MU +515 0xC000 //TX_DEREVERB_HF_MU +516 0xCCCC //TX_DEREVERB_DELAY +517 0xD999 //TX_DEREVERB_COEF_LEN +518 0x1F40 //TX_DEREVERB_DNR +519 0x0000 //TX_DEREVERB_ALPHA +520 0x0000 //TX_DEREVERB_BETA +521 0x0000 //TX_GSC_RTOL_TH +522 0x7000 //TX_GSC_RTOH_TH +523 0x0064 //TX_WIDE2_MEANHTH 524 0x0000 //TX_DR_RESRV_5 525 0x0000 //TX_DR_RESRV_6 526 0x0000 //TX_DR_RESRV_7 @@ -18437,16 +27597,81 @@ 886 0x0CCD //TX_FASTNS_TFMASKBIN_TH2 887 0x0CCD //TX_FASTNS_TFMASKBIN_TH3 888 0x0028 //TX_FASTNS_ARSPC_TH -889 0xC000 //TX_FASTNS_MASK5_TH +889 0x8000 //TX_FASTNS_MASK5_TH 890 0x4848 //TX_POSTSSA_MIN_G_VR_MASK -891 0x1000 //TX_A_LESSCUT_RTO_MASK +891 0x4000 //TX_A_LESSCUT_RTO_MASK 892 0x1770 //TX_FASTNS_NOISETH 893 0xC000 //TX_FASTNS_SSA_THLFL 894 0xC000 //TX_FASTNS_SSA_THHFL 895 0xCCCC //TX_FASTNS_SSA_THLFH 896 0xD999 //TX_FASTNS_SSA_THHFH +897 0x2339 //TX_SENDFUNC_REG_MICMUTE +898 0x0021 //TX_SENDFUNC_REG_MICMUTE1 +899 0x02BC //TX_MICMUTE_RATIO_THR +900 0x0140 //TX_MICMUTE_AMP_THR +901 0x0004 //TX_MICMUTE_HPF_IND +902 0x00C0 //TX_MICMUTE_LOG_EYR_TH +903 0x0008 //TX_MICMUTE_CVG_TIME +904 0x0008 //TX_MICMUTE_RELEASE_TIME +905 0x01FE //TX_MIC_VOLUME_MIC0MUTE +906 0x0020 //TX_MICMUTE_EPD_OFFSET_0 +907 0x001E //TX_MICMUTE_FRQ_AEC_L +908 0x7999 //TX_MICMUTE_EAD_THR +909 0x7FFF //TX_MICMUTE_LAMBDA_CB_NLE +910 0x7FFF //TX_MICMUTE_LAMBDA_RE_EST +911 0x4000 //TX_DTD_THR1_MICMUTE_0 +912 0x7000 //TX_DTD_THR1_MICMUTE_1 +913 0x7FFF //TX_DTD_THR1_MICMUTE_2 +914 0x7FFF //TX_DTD_THR1_MICMUTE_3 +915 0x6CCC //TX_DTD_THR2_MICMUTE_0 +916 0x0400 //TX_MICMUTE_MIN_EQ_RE_EST_0 +917 0x0400 //TX_MICMUTE_MIN_EQ_RE_EST_1 +918 0x1000 //TX_MICMUTE_MIN_EQ_RE_EST_2 +919 0x7FFF //TX_MICMUTE_MIN_EQ_RE_EST_3 +920 0x7FFF //TX_MICMUTE_MIN_EQ_RE_EST_4 +921 0x4000 //TX_MICMUTE_C_POST_FLT +922 0x03E8 //TX_MICMUTE_DT_CUT_K +923 0x0001 //TX_MICMUTE_DT_CUT_THR +924 0x03E8 //TX_MICMUTE_DT_CUT_K2 +925 0x0001 //TX_MICMUTE_DT_CUT_THR2 +926 0x0064 //TX_MICMUTE_DT2_HOLD_N +927 0x1000 //TX_MICMUTE_RATIODTH_THCUT +928 0x1000 //TX_MICMUTE_B_POST_FLT_ECHOL +929 0x7FFF //TX_MICMUTE_B_POST_FLT_ECHOH +930 0x0400 //TX_MICMUTE_C_POST_FLT_MASK +931 0x7999 //TX_MICMUTE_RATIODTL_CUT_TH +932 0x0258 //TX_MICMUTE_DT_CUT_K1 +933 0x0800 //TX_MICMUTE_N2_SN_EST +934 0xFC00 //TX_MICMUTE_THR_SN_EST_0 +935 0x001C //TX_MICMUTE_MIN_G_CTRL_0 +936 0x6000 //TX_MICMUTE_A_POST_FILT_S_0 +937 0x7000 //TX_MICMUTE_B_POST_FILT_0 +938 0x2710 //TX_MIC1RUB_AMP_THR +939 0x0010 //TX_MIC1MUTE_RATIO_THR +940 0x0450 //TX_MIC1MUTE_AMP_THR +941 0x0008 //TX_MIC1MUTE_CVG_TIME +942 0x0008 //TX_MIC1MUTE_RELEASE_TIME +943 0x0000 //TX_AMS_RESRV_01 +944 0x0000 //TX_AMS_RESRV_02 +945 0x0000 //TX_AMS_RESRV_03 +946 0x0000 //TX_AMS_RESRV_04 +947 0x0000 //TX_AMS_RESRV_05 +948 0x0000 //TX_AMS_RESRV_06 +949 0x0000 //TX_AMS_RESRV_07 +950 0x0000 //TX_AMS_RESRV_08 +951 0x0000 //TX_AMS_RESRV_09 +952 0x0000 //TX_AMS_RESRV_10 +953 0x0000 //TX_AMS_RESRV_11 +954 0x0000 //TX_AMS_RESRV_12 +955 0x0000 //TX_AMS_RESRV_13 +956 0x0000 //TX_AMS_RESRV_14 +957 0x0000 //TX_AMS_RESRV_15 +958 0x0000 //TX_AMS_RESRV_16 +959 0x0000 //TX_AMS_RESRV_17 +960 0x0000 //TX_AMS_RESRV_18 +961 0x0000 //TX_AMS_RESRV_19 #RX -0 0x002C //RX_RECVFUNC_MODE_0 +0 0x202C //RX_RECVFUNC_MODE_0 1 0x0000 //RX_RECVFUNC_MODE_1 2 0x0003 //RX_SAMPLINGFREQ_SIG 3 0x0003 //RX_SAMPLINGFREQ_PROC @@ -19296,11 +28521,862 @@ 110 0x0000 //RX_FDDRC_RESRV_0 129 0x0100 //RX_SPK_VOL 130 0x0000 //RX_VOL_RESRV_0 +#RX 2 +157 0x202C //RX_RECVFUNC_MODE_0 +158 0x0000 //RX_RECVFUNC_MODE_1 +159 0x0003 //RX_SAMPLINGFREQ_SIG +160 0x0003 //RX_SAMPLINGFREQ_PROC +161 0x000A //RX_FRAME_SZ +162 0x0000 //RX_DELAY_OPT +163 0x5000 //RX_TDDRC_ALPHA_UP_1 +164 0x5000 //RX_TDDRC_ALPHA_UP_2 +165 0x5000 //RX_TDDRC_ALPHA_UP_3 +166 0x2000 //RX_TDDRC_ALPHA_UP_4 +167 0x0800 //RX_PGA +168 0x7FFF //RX_A_HP +169 0x0000 //RX_B_PE +170 0x1800 //RX_THR_PITCH_DET_0 +171 0x1000 //RX_THR_PITCH_DET_1 +172 0x0800 //RX_THR_PITCH_DET_2 +173 0x0008 //RX_PITCH_BFR_LEN +174 0x0003 //RX_SBD_PITCH_DET +175 0x0100 //RX_PP_RESRV_0 +176 0x0020 //RX_PP_RESRV_1 +177 0x0400 //RX_N_SN_EST +178 0x000C //RX_N2_SN_EST +179 0x0003 //RX_NS_LVL_CTRL +180 0x9000 //RX_THR_SN_EST +181 0x7CCD //RX_LAMBDA_PFILT +182 0x000A //RX_FENS_RESRV_0 +183 0x0190 //RX_FENS_RESRV_1 +184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +187 0x0002 //RX_EXTRA_NS_L +188 0x0800 //RX_EXTRA_NS_A +189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +190 0x65AD //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +192 0x199A //RX_A_POST_FLT +193 0x0000 //RX_LMT_THRD +194 0x4000 //RX_LMT_ALPHA +195 0x0020 //RX_FDEQ_SUBNUM +196 0x4848 //RX_FDEQ_GAIN_0 +197 0x4848 //RX_FDEQ_GAIN_1 +198 0x4848 //RX_FDEQ_GAIN_2 +199 0x4848 //RX_FDEQ_GAIN_3 +200 0x4848 //RX_FDEQ_GAIN_4 +201 0x4848 //RX_FDEQ_GAIN_5 +202 0x4848 //RX_FDEQ_GAIN_6 +203 0x4848 //RX_FDEQ_GAIN_7 +204 0x4848 //RX_FDEQ_GAIN_8 +205 0x4848 //RX_FDEQ_GAIN_9 +206 0x4848 //RX_FDEQ_GAIN_10 +207 0x4848 //RX_FDEQ_GAIN_11 +208 0x4848 //RX_FDEQ_GAIN_12 +209 0x4848 //RX_FDEQ_GAIN_13 +210 0x4848 //RX_FDEQ_GAIN_14 +211 0x4848 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0202 //RX_FDEQ_BIN_0 +221 0x0203 //RX_FDEQ_BIN_1 +222 0x0303 //RX_FDEQ_BIN_2 +223 0x0304 //RX_FDEQ_BIN_3 +224 0x0405 //RX_FDEQ_BIN_4 +225 0x0506 //RX_FDEQ_BIN_5 +226 0x0708 //RX_FDEQ_BIN_6 +227 0x090A //RX_FDEQ_BIN_7 +228 0x0B0C //RX_FDEQ_BIN_8 +229 0x0D0E //RX_FDEQ_BIN_9 +230 0x1013 //RX_FDEQ_BIN_10 +231 0x1719 //RX_FDEQ_BIN_11 +232 0x1B1E //RX_FDEQ_BIN_12 +233 0x1E1E //RX_FDEQ_BIN_13 +234 0x1E28 //RX_FDEQ_BIN_14 +235 0x282C //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x4000 //RX_FDEQ_RESRV_0 +245 0x0320 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0030 //RX_FDDRC_BAND_MARGIN_1 +248 0x0050 //RX_FDDRC_BAND_MARGIN_2 +249 0x0080 //RX_FDDRC_BAND_MARGIN_3 +250 0x0007 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x5000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x6400 //RX_FDDRC_THRD_3_2 +258 0x6400 //RX_FDDRC_THRD_3_3 +259 0x2000 //RX_FDDRC_SLANT_0_0 +260 0x2000 //RX_FDDRC_SLANT_0_1 +261 0x2000 //RX_FDDRC_SLANT_0_2 +262 0x2000 //RX_FDDRC_SLANT_0_3 +263 0x5333 //RX_FDDRC_SLANT_1_0 +264 0x5333 //RX_FDDRC_SLANT_1_1 +265 0x5333 //RX_FDDRC_SLANT_1_2 +266 0x5333 //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +268 0x0002 //RX_FILTINDX +269 0x0000 //RX_TDDRC_THRD_0 +270 0x0000 //RX_TDDRC_THRD_1 +271 0x1A00 //RX_TDDRC_THRD_2 +272 0x1A00 //RX_TDDRC_THRD_3 +273 0x3000 //RX_TDDRC_SLANT_0 +274 0x7EB8 //RX_TDDRC_SLANT_1 +275 0x5000 //RX_TDDRC_ALPHA_UP_0 +276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x199A //RX_TDDRC_HMNC_GAIN +279 0x0001 //RX_TDDRC_SMT_FLAG +280 0x0CCD //RX_TDDRC_SMT_W +281 0x01C8 //RX_TDDRC_DRC_GAIN +282 0x7C00 //RX_LAMBDA_PKA_FP +283 0x2000 //RX_TPKA_FP +284 0x2000 //RX_MIN_G_FP +285 0x0080 //RX_MAX_G_FP +286 0x000B //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 +288 0x0000 //RX_MAXLEVEL_CNG +289 0x3000 //RX_BWE_UV_TH +290 0x3000 //RX_BWE_UV_TH2 +291 0x1800 //RX_BWE_UV_TH3 +292 0x1000 //RX_BWE_V_TH +293 0x04CD //RX_BWE_GAIN1_V_TH1 +294 0x0F33 //RX_BWE_GAIN1_V_TH2 +295 0x7333 //RX_BWE_UV_EQ +296 0x199A //RX_BWE_V_EQ +297 0x7333 //RX_BWE_TONE_TH +298 0x0004 //RX_BWE_UV_HOLD_T +299 0x6CCD //RX_BWE_GAIN2_ALPHA +300 0x799A //RX_BWE_GAIN3_ALPHA +301 0x001E //RX_BWE_CUTOFF +302 0x3000 //RX_BWE_GAINFILL +303 0x3200 //RX_BWE_MAXTH_TONE +304 0x2000 //RX_BWE_EQ_0 +305 0x2000 //RX_BWE_EQ_1 +306 0x2000 //RX_BWE_EQ_2 +307 0x2000 //RX_BWE_EQ_3 +308 0x2000 //RX_BWE_EQ_4 +309 0x2000 //RX_BWE_EQ_5 +310 0x2000 //RX_BWE_EQ_6 +311 0x0000 //RX_BWE_RESRV_0 +312 0x0000 //RX_BWE_RESRV_1 +313 0x0000 //RX_BWE_RESRV_2 +#VOL 0 +163 0x5000 //RX_TDDRC_ALPHA_UP_1 +164 0x5000 //RX_TDDRC_ALPHA_UP_2 +165 0x5000 //RX_TDDRC_ALPHA_UP_3 +166 0x2000 //RX_TDDRC_ALPHA_UP_4 +184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +190 0x65AD //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +269 0x0000 //RX_TDDRC_THRD_0 +270 0x0000 //RX_TDDRC_THRD_1 +271 0x1A00 //RX_TDDRC_THRD_2 +272 0x1A00 //RX_TDDRC_THRD_3 +273 0x3000 //RX_TDDRC_SLANT_0 +274 0x7EB8 //RX_TDDRC_SLANT_1 +275 0x5000 //RX_TDDRC_ALPHA_UP_0 +276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x199A //RX_TDDRC_HMNC_GAIN +279 0x0001 //RX_TDDRC_SMT_FLAG +280 0x0CCD //RX_TDDRC_SMT_W +281 0x01C8 //RX_TDDRC_DRC_GAIN +195 0x0020 //RX_FDEQ_SUBNUM +196 0x4848 //RX_FDEQ_GAIN_0 +197 0x4848 //RX_FDEQ_GAIN_1 +198 0x4848 //RX_FDEQ_GAIN_2 +199 0x4848 //RX_FDEQ_GAIN_3 +200 0x4848 //RX_FDEQ_GAIN_4 +201 0x4848 //RX_FDEQ_GAIN_5 +202 0x4848 //RX_FDEQ_GAIN_6 +203 0x4848 //RX_FDEQ_GAIN_7 +204 0x4848 //RX_FDEQ_GAIN_8 +205 0x4848 //RX_FDEQ_GAIN_9 +206 0x4848 //RX_FDEQ_GAIN_10 +207 0x4848 //RX_FDEQ_GAIN_11 +208 0x4848 //RX_FDEQ_GAIN_12 +209 0x4848 //RX_FDEQ_GAIN_13 +210 0x4848 //RX_FDEQ_GAIN_14 +211 0x4848 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0202 //RX_FDEQ_BIN_0 +221 0x0203 //RX_FDEQ_BIN_1 +222 0x0303 //RX_FDEQ_BIN_2 +223 0x0304 //RX_FDEQ_BIN_3 +224 0x0405 //RX_FDEQ_BIN_4 +225 0x0506 //RX_FDEQ_BIN_5 +226 0x0708 //RX_FDEQ_BIN_6 +227 0x090A //RX_FDEQ_BIN_7 +228 0x0B0C //RX_FDEQ_BIN_8 +229 0x0D0E //RX_FDEQ_BIN_9 +230 0x1013 //RX_FDEQ_BIN_10 +231 0x1719 //RX_FDEQ_BIN_11 +232 0x1B1E //RX_FDEQ_BIN_12 +233 0x1E1E //RX_FDEQ_BIN_13 +234 0x1E28 //RX_FDEQ_BIN_14 +235 0x282C //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x4000 //RX_FDEQ_RESRV_0 +245 0x0320 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0030 //RX_FDDRC_BAND_MARGIN_1 +248 0x0050 //RX_FDDRC_BAND_MARGIN_2 +249 0x0080 //RX_FDDRC_BAND_MARGIN_3 +250 0x0007 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x5000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x6400 //RX_FDDRC_THRD_3_2 +258 0x6400 //RX_FDDRC_THRD_3_3 +259 0x2000 //RX_FDDRC_SLANT_0_0 +260 0x2000 //RX_FDDRC_SLANT_0_1 +261 0x2000 //RX_FDDRC_SLANT_0_2 +262 0x2000 //RX_FDDRC_SLANT_0_3 +263 0x5333 //RX_FDDRC_SLANT_1_0 +264 0x5333 //RX_FDDRC_SLANT_1_1 +265 0x5333 //RX_FDDRC_SLANT_1_2 +266 0x5333 //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +286 0x000B //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 +#VOL 1 +163 0x5000 //RX_TDDRC_ALPHA_UP_1 +164 0x5000 //RX_TDDRC_ALPHA_UP_2 +165 0x5000 //RX_TDDRC_ALPHA_UP_3 +166 0x2000 //RX_TDDRC_ALPHA_UP_4 +184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +190 0x65AD //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +269 0x0000 //RX_TDDRC_THRD_0 +270 0x0000 //RX_TDDRC_THRD_1 +271 0x1A00 //RX_TDDRC_THRD_2 +272 0x1A00 //RX_TDDRC_THRD_3 +273 0x3000 //RX_TDDRC_SLANT_0 +274 0x7EB8 //RX_TDDRC_SLANT_1 +275 0x5000 //RX_TDDRC_ALPHA_UP_0 +276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x199A //RX_TDDRC_HMNC_GAIN +279 0x0001 //RX_TDDRC_SMT_FLAG +280 0x0CCD //RX_TDDRC_SMT_W +281 0x01C8 //RX_TDDRC_DRC_GAIN +195 0x0020 //RX_FDEQ_SUBNUM +196 0x4848 //RX_FDEQ_GAIN_0 +197 0x4848 //RX_FDEQ_GAIN_1 +198 0x4848 //RX_FDEQ_GAIN_2 +199 0x4848 //RX_FDEQ_GAIN_3 +200 0x4848 //RX_FDEQ_GAIN_4 +201 0x4848 //RX_FDEQ_GAIN_5 +202 0x4848 //RX_FDEQ_GAIN_6 +203 0x4848 //RX_FDEQ_GAIN_7 +204 0x4848 //RX_FDEQ_GAIN_8 +205 0x4848 //RX_FDEQ_GAIN_9 +206 0x4848 //RX_FDEQ_GAIN_10 +207 0x4848 //RX_FDEQ_GAIN_11 +208 0x4848 //RX_FDEQ_GAIN_12 +209 0x4848 //RX_FDEQ_GAIN_13 +210 0x4848 //RX_FDEQ_GAIN_14 +211 0x4848 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0202 //RX_FDEQ_BIN_0 +221 0x0203 //RX_FDEQ_BIN_1 +222 0x0303 //RX_FDEQ_BIN_2 +223 0x0304 //RX_FDEQ_BIN_3 +224 0x0405 //RX_FDEQ_BIN_4 +225 0x0506 //RX_FDEQ_BIN_5 +226 0x0708 //RX_FDEQ_BIN_6 +227 0x090A //RX_FDEQ_BIN_7 +228 0x0B0C //RX_FDEQ_BIN_8 +229 0x0D0E //RX_FDEQ_BIN_9 +230 0x1013 //RX_FDEQ_BIN_10 +231 0x1719 //RX_FDEQ_BIN_11 +232 0x1B1E //RX_FDEQ_BIN_12 +233 0x1E1E //RX_FDEQ_BIN_13 +234 0x1E28 //RX_FDEQ_BIN_14 +235 0x282C //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x4000 //RX_FDEQ_RESRV_0 +245 0x0320 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0030 //RX_FDDRC_BAND_MARGIN_1 +248 0x0050 //RX_FDDRC_BAND_MARGIN_2 +249 0x0080 //RX_FDDRC_BAND_MARGIN_3 +250 0x0007 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x5000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x6400 //RX_FDDRC_THRD_3_2 +258 0x6400 //RX_FDDRC_THRD_3_3 +259 0x2000 //RX_FDDRC_SLANT_0_0 +260 0x2000 //RX_FDDRC_SLANT_0_1 +261 0x2000 //RX_FDDRC_SLANT_0_2 +262 0x2000 //RX_FDDRC_SLANT_0_3 +263 0x5333 //RX_FDDRC_SLANT_1_0 +264 0x5333 //RX_FDDRC_SLANT_1_1 +265 0x5333 //RX_FDDRC_SLANT_1_2 +266 0x5333 //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +286 0x0013 //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 +#VOL 2 +163 0x5000 //RX_TDDRC_ALPHA_UP_1 +164 0x5000 //RX_TDDRC_ALPHA_UP_2 +165 0x5000 //RX_TDDRC_ALPHA_UP_3 +166 0x2000 //RX_TDDRC_ALPHA_UP_4 +184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +190 0x65AD //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +269 0x0000 //RX_TDDRC_THRD_0 +270 0x0000 //RX_TDDRC_THRD_1 +271 0x1A00 //RX_TDDRC_THRD_2 +272 0x1A00 //RX_TDDRC_THRD_3 +273 0x3000 //RX_TDDRC_SLANT_0 +274 0x7EB8 //RX_TDDRC_SLANT_1 +275 0x5000 //RX_TDDRC_ALPHA_UP_0 +276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x199A //RX_TDDRC_HMNC_GAIN +279 0x0001 //RX_TDDRC_SMT_FLAG +280 0x0CCD //RX_TDDRC_SMT_W +281 0x01C8 //RX_TDDRC_DRC_GAIN +195 0x0020 //RX_FDEQ_SUBNUM +196 0x4848 //RX_FDEQ_GAIN_0 +197 0x4848 //RX_FDEQ_GAIN_1 +198 0x4848 //RX_FDEQ_GAIN_2 +199 0x4848 //RX_FDEQ_GAIN_3 +200 0x4848 //RX_FDEQ_GAIN_4 +201 0x4848 //RX_FDEQ_GAIN_5 +202 0x4848 //RX_FDEQ_GAIN_6 +203 0x4848 //RX_FDEQ_GAIN_7 +204 0x4848 //RX_FDEQ_GAIN_8 +205 0x4848 //RX_FDEQ_GAIN_9 +206 0x4848 //RX_FDEQ_GAIN_10 +207 0x4848 //RX_FDEQ_GAIN_11 +208 0x4848 //RX_FDEQ_GAIN_12 +209 0x4848 //RX_FDEQ_GAIN_13 +210 0x4848 //RX_FDEQ_GAIN_14 +211 0x4848 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0202 //RX_FDEQ_BIN_0 +221 0x0203 //RX_FDEQ_BIN_1 +222 0x0303 //RX_FDEQ_BIN_2 +223 0x0304 //RX_FDEQ_BIN_3 +224 0x0405 //RX_FDEQ_BIN_4 +225 0x0506 //RX_FDEQ_BIN_5 +226 0x0708 //RX_FDEQ_BIN_6 +227 0x090A //RX_FDEQ_BIN_7 +228 0x0B0C //RX_FDEQ_BIN_8 +229 0x0D0E //RX_FDEQ_BIN_9 +230 0x1013 //RX_FDEQ_BIN_10 +231 0x1719 //RX_FDEQ_BIN_11 +232 0x1B1E //RX_FDEQ_BIN_12 +233 0x1E1E //RX_FDEQ_BIN_13 +234 0x1E28 //RX_FDEQ_BIN_14 +235 0x282C //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x4000 //RX_FDEQ_RESRV_0 +245 0x0320 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0030 //RX_FDDRC_BAND_MARGIN_1 +248 0x0050 //RX_FDDRC_BAND_MARGIN_2 +249 0x0080 //RX_FDDRC_BAND_MARGIN_3 +250 0x0007 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x5000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x6400 //RX_FDDRC_THRD_3_2 +258 0x6400 //RX_FDDRC_THRD_3_3 +259 0x2000 //RX_FDDRC_SLANT_0_0 +260 0x2000 //RX_FDDRC_SLANT_0_1 +261 0x2000 //RX_FDDRC_SLANT_0_2 +262 0x2000 //RX_FDDRC_SLANT_0_3 +263 0x5333 //RX_FDDRC_SLANT_1_0 +264 0x5333 //RX_FDDRC_SLANT_1_1 +265 0x5333 //RX_FDDRC_SLANT_1_2 +266 0x5333 //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +286 0x0020 //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 +#VOL 3 +163 0x5000 //RX_TDDRC_ALPHA_UP_1 +164 0x5000 //RX_TDDRC_ALPHA_UP_2 +165 0x5000 //RX_TDDRC_ALPHA_UP_3 +166 0x2000 //RX_TDDRC_ALPHA_UP_4 +184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +190 0x65AD //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +269 0x0000 //RX_TDDRC_THRD_0 +270 0x0000 //RX_TDDRC_THRD_1 +271 0x1A00 //RX_TDDRC_THRD_2 +272 0x1A00 //RX_TDDRC_THRD_3 +273 0x3000 //RX_TDDRC_SLANT_0 +274 0x7EB8 //RX_TDDRC_SLANT_1 +275 0x5000 //RX_TDDRC_ALPHA_UP_0 +276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x199A //RX_TDDRC_HMNC_GAIN +279 0x0001 //RX_TDDRC_SMT_FLAG +280 0x0CCD //RX_TDDRC_SMT_W +281 0x01C8 //RX_TDDRC_DRC_GAIN +195 0x0020 //RX_FDEQ_SUBNUM +196 0x4848 //RX_FDEQ_GAIN_0 +197 0x4848 //RX_FDEQ_GAIN_1 +198 0x4848 //RX_FDEQ_GAIN_2 +199 0x4848 //RX_FDEQ_GAIN_3 +200 0x4848 //RX_FDEQ_GAIN_4 +201 0x4848 //RX_FDEQ_GAIN_5 +202 0x4848 //RX_FDEQ_GAIN_6 +203 0x4848 //RX_FDEQ_GAIN_7 +204 0x4848 //RX_FDEQ_GAIN_8 +205 0x4848 //RX_FDEQ_GAIN_9 +206 0x4848 //RX_FDEQ_GAIN_10 +207 0x4848 //RX_FDEQ_GAIN_11 +208 0x4848 //RX_FDEQ_GAIN_12 +209 0x4848 //RX_FDEQ_GAIN_13 +210 0x4848 //RX_FDEQ_GAIN_14 +211 0x4848 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0202 //RX_FDEQ_BIN_0 +221 0x0203 //RX_FDEQ_BIN_1 +222 0x0303 //RX_FDEQ_BIN_2 +223 0x0304 //RX_FDEQ_BIN_3 +224 0x0405 //RX_FDEQ_BIN_4 +225 0x0506 //RX_FDEQ_BIN_5 +226 0x0708 //RX_FDEQ_BIN_6 +227 0x090A //RX_FDEQ_BIN_7 +228 0x0B0C //RX_FDEQ_BIN_8 +229 0x0D0E //RX_FDEQ_BIN_9 +230 0x1013 //RX_FDEQ_BIN_10 +231 0x1719 //RX_FDEQ_BIN_11 +232 0x1B1E //RX_FDEQ_BIN_12 +233 0x1E1E //RX_FDEQ_BIN_13 +234 0x1E28 //RX_FDEQ_BIN_14 +235 0x282C //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x4000 //RX_FDEQ_RESRV_0 +245 0x0320 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0030 //RX_FDDRC_BAND_MARGIN_1 +248 0x0050 //RX_FDDRC_BAND_MARGIN_2 +249 0x0080 //RX_FDDRC_BAND_MARGIN_3 +250 0x0007 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x5000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x6400 //RX_FDDRC_THRD_3_2 +258 0x6400 //RX_FDDRC_THRD_3_3 +259 0x2000 //RX_FDDRC_SLANT_0_0 +260 0x2000 //RX_FDDRC_SLANT_0_1 +261 0x2000 //RX_FDDRC_SLANT_0_2 +262 0x2000 //RX_FDDRC_SLANT_0_3 +263 0x5333 //RX_FDDRC_SLANT_1_0 +264 0x5333 //RX_FDDRC_SLANT_1_1 +265 0x5333 //RX_FDDRC_SLANT_1_2 +266 0x5333 //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +286 0x0036 //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 +#VOL 4 +163 0x5000 //RX_TDDRC_ALPHA_UP_1 +164 0x5000 //RX_TDDRC_ALPHA_UP_2 +165 0x5000 //RX_TDDRC_ALPHA_UP_3 +166 0x2000 //RX_TDDRC_ALPHA_UP_4 +184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +190 0x65AD //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +269 0x0000 //RX_TDDRC_THRD_0 +270 0x0000 //RX_TDDRC_THRD_1 +271 0x1A00 //RX_TDDRC_THRD_2 +272 0x1A00 //RX_TDDRC_THRD_3 +273 0x3000 //RX_TDDRC_SLANT_0 +274 0x7EB8 //RX_TDDRC_SLANT_1 +275 0x5000 //RX_TDDRC_ALPHA_UP_0 +276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x199A //RX_TDDRC_HMNC_GAIN +279 0x0001 //RX_TDDRC_SMT_FLAG +280 0x0CCD //RX_TDDRC_SMT_W +281 0x01C8 //RX_TDDRC_DRC_GAIN +195 0x0020 //RX_FDEQ_SUBNUM +196 0x4848 //RX_FDEQ_GAIN_0 +197 0x4848 //RX_FDEQ_GAIN_1 +198 0x4848 //RX_FDEQ_GAIN_2 +199 0x4848 //RX_FDEQ_GAIN_3 +200 0x4848 //RX_FDEQ_GAIN_4 +201 0x4848 //RX_FDEQ_GAIN_5 +202 0x4848 //RX_FDEQ_GAIN_6 +203 0x4848 //RX_FDEQ_GAIN_7 +204 0x4848 //RX_FDEQ_GAIN_8 +205 0x4848 //RX_FDEQ_GAIN_9 +206 0x4848 //RX_FDEQ_GAIN_10 +207 0x4848 //RX_FDEQ_GAIN_11 +208 0x4848 //RX_FDEQ_GAIN_12 +209 0x4848 //RX_FDEQ_GAIN_13 +210 0x4848 //RX_FDEQ_GAIN_14 +211 0x4848 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0202 //RX_FDEQ_BIN_0 +221 0x0203 //RX_FDEQ_BIN_1 +222 0x0303 //RX_FDEQ_BIN_2 +223 0x0304 //RX_FDEQ_BIN_3 +224 0x0405 //RX_FDEQ_BIN_4 +225 0x0506 //RX_FDEQ_BIN_5 +226 0x0708 //RX_FDEQ_BIN_6 +227 0x090A //RX_FDEQ_BIN_7 +228 0x0B0C //RX_FDEQ_BIN_8 +229 0x0D0E //RX_FDEQ_BIN_9 +230 0x1013 //RX_FDEQ_BIN_10 +231 0x1719 //RX_FDEQ_BIN_11 +232 0x1B1E //RX_FDEQ_BIN_12 +233 0x1E1E //RX_FDEQ_BIN_13 +234 0x1E28 //RX_FDEQ_BIN_14 +235 0x282C //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x4000 //RX_FDEQ_RESRV_0 +245 0x0320 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0030 //RX_FDDRC_BAND_MARGIN_1 +248 0x0050 //RX_FDDRC_BAND_MARGIN_2 +249 0x0080 //RX_FDDRC_BAND_MARGIN_3 +250 0x0007 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x5000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x6400 //RX_FDDRC_THRD_3_2 +258 0x6400 //RX_FDDRC_THRD_3_3 +259 0x2000 //RX_FDDRC_SLANT_0_0 +260 0x2000 //RX_FDDRC_SLANT_0_1 +261 0x2000 //RX_FDDRC_SLANT_0_2 +262 0x2000 //RX_FDDRC_SLANT_0_3 +263 0x5333 //RX_FDDRC_SLANT_1_0 +264 0x5333 //RX_FDDRC_SLANT_1_1 +265 0x5333 //RX_FDDRC_SLANT_1_2 +266 0x5333 //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +286 0x005B //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 +#VOL 5 +163 0x5000 //RX_TDDRC_ALPHA_UP_1 +164 0x5000 //RX_TDDRC_ALPHA_UP_2 +165 0x5000 //RX_TDDRC_ALPHA_UP_3 +166 0x2000 //RX_TDDRC_ALPHA_UP_4 +184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +190 0x65AD //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +269 0x0000 //RX_TDDRC_THRD_0 +270 0x0000 //RX_TDDRC_THRD_1 +271 0x1A00 //RX_TDDRC_THRD_2 +272 0x1A00 //RX_TDDRC_THRD_3 +273 0x3000 //RX_TDDRC_SLANT_0 +274 0x7EB8 //RX_TDDRC_SLANT_1 +275 0x5000 //RX_TDDRC_ALPHA_UP_0 +276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x199A //RX_TDDRC_HMNC_GAIN +279 0x0001 //RX_TDDRC_SMT_FLAG +280 0x0CCD //RX_TDDRC_SMT_W +281 0x01C8 //RX_TDDRC_DRC_GAIN +195 0x0020 //RX_FDEQ_SUBNUM +196 0x4848 //RX_FDEQ_GAIN_0 +197 0x4848 //RX_FDEQ_GAIN_1 +198 0x4848 //RX_FDEQ_GAIN_2 +199 0x4848 //RX_FDEQ_GAIN_3 +200 0x4848 //RX_FDEQ_GAIN_4 +201 0x4848 //RX_FDEQ_GAIN_5 +202 0x4848 //RX_FDEQ_GAIN_6 +203 0x4848 //RX_FDEQ_GAIN_7 +204 0x4848 //RX_FDEQ_GAIN_8 +205 0x4848 //RX_FDEQ_GAIN_9 +206 0x4848 //RX_FDEQ_GAIN_10 +207 0x4848 //RX_FDEQ_GAIN_11 +208 0x4848 //RX_FDEQ_GAIN_12 +209 0x4848 //RX_FDEQ_GAIN_13 +210 0x4848 //RX_FDEQ_GAIN_14 +211 0x4848 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0202 //RX_FDEQ_BIN_0 +221 0x0203 //RX_FDEQ_BIN_1 +222 0x0303 //RX_FDEQ_BIN_2 +223 0x0304 //RX_FDEQ_BIN_3 +224 0x0405 //RX_FDEQ_BIN_4 +225 0x0506 //RX_FDEQ_BIN_5 +226 0x0708 //RX_FDEQ_BIN_6 +227 0x090A //RX_FDEQ_BIN_7 +228 0x0B0C //RX_FDEQ_BIN_8 +229 0x0D0E //RX_FDEQ_BIN_9 +230 0x1013 //RX_FDEQ_BIN_10 +231 0x1719 //RX_FDEQ_BIN_11 +232 0x1B1E //RX_FDEQ_BIN_12 +233 0x1E1E //RX_FDEQ_BIN_13 +234 0x1E28 //RX_FDEQ_BIN_14 +235 0x282C //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x4000 //RX_FDEQ_RESRV_0 +245 0x0320 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0030 //RX_FDDRC_BAND_MARGIN_1 +248 0x0050 //RX_FDDRC_BAND_MARGIN_2 +249 0x0080 //RX_FDDRC_BAND_MARGIN_3 +250 0x0007 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x5000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x6400 //RX_FDDRC_THRD_3_2 +258 0x6400 //RX_FDDRC_THRD_3_3 +259 0x2000 //RX_FDDRC_SLANT_0_0 +260 0x2000 //RX_FDDRC_SLANT_0_1 +261 0x2000 //RX_FDDRC_SLANT_0_2 +262 0x2000 //RX_FDDRC_SLANT_0_3 +263 0x5333 //RX_FDDRC_SLANT_1_0 +264 0x5333 //RX_FDDRC_SLANT_1_1 +265 0x5333 //RX_FDDRC_SLANT_1_2 +266 0x5333 //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +286 0x0099 //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 +#VOL 6 +163 0x5000 //RX_TDDRC_ALPHA_UP_1 +164 0x5000 //RX_TDDRC_ALPHA_UP_2 +165 0x5000 //RX_TDDRC_ALPHA_UP_3 +166 0x2000 //RX_TDDRC_ALPHA_UP_4 +184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +190 0x65AD //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +269 0x0000 //RX_TDDRC_THRD_0 +270 0x0000 //RX_TDDRC_THRD_1 +271 0x1A00 //RX_TDDRC_THRD_2 +272 0x1A00 //RX_TDDRC_THRD_3 +273 0x3000 //RX_TDDRC_SLANT_0 +274 0x7EB8 //RX_TDDRC_SLANT_1 +275 0x5000 //RX_TDDRC_ALPHA_UP_0 +276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x199A //RX_TDDRC_HMNC_GAIN +279 0x0001 //RX_TDDRC_SMT_FLAG +280 0x0CCD //RX_TDDRC_SMT_W +281 0x01C8 //RX_TDDRC_DRC_GAIN +195 0x0020 //RX_FDEQ_SUBNUM +196 0x4848 //RX_FDEQ_GAIN_0 +197 0x4848 //RX_FDEQ_GAIN_1 +198 0x4848 //RX_FDEQ_GAIN_2 +199 0x4848 //RX_FDEQ_GAIN_3 +200 0x4848 //RX_FDEQ_GAIN_4 +201 0x4848 //RX_FDEQ_GAIN_5 +202 0x4848 //RX_FDEQ_GAIN_6 +203 0x4848 //RX_FDEQ_GAIN_7 +204 0x4848 //RX_FDEQ_GAIN_8 +205 0x4848 //RX_FDEQ_GAIN_9 +206 0x4848 //RX_FDEQ_GAIN_10 +207 0x4848 //RX_FDEQ_GAIN_11 +208 0x4848 //RX_FDEQ_GAIN_12 +209 0x4848 //RX_FDEQ_GAIN_13 +210 0x4848 //RX_FDEQ_GAIN_14 +211 0x4848 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0202 //RX_FDEQ_BIN_0 +221 0x0203 //RX_FDEQ_BIN_1 +222 0x0303 //RX_FDEQ_BIN_2 +223 0x0304 //RX_FDEQ_BIN_3 +224 0x0405 //RX_FDEQ_BIN_4 +225 0x0506 //RX_FDEQ_BIN_5 +226 0x0708 //RX_FDEQ_BIN_6 +227 0x090A //RX_FDEQ_BIN_7 +228 0x0B0C //RX_FDEQ_BIN_8 +229 0x0D0E //RX_FDEQ_BIN_9 +230 0x1013 //RX_FDEQ_BIN_10 +231 0x1719 //RX_FDEQ_BIN_11 +232 0x1B1E //RX_FDEQ_BIN_12 +233 0x1E1E //RX_FDEQ_BIN_13 +234 0x1E28 //RX_FDEQ_BIN_14 +235 0x282C //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x4000 //RX_FDEQ_RESRV_0 +245 0x0320 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0030 //RX_FDDRC_BAND_MARGIN_1 +248 0x0050 //RX_FDDRC_BAND_MARGIN_2 +249 0x0080 //RX_FDDRC_BAND_MARGIN_3 +250 0x0007 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x5000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x6400 //RX_FDDRC_THRD_3_2 +258 0x6400 //RX_FDDRC_THRD_3_3 +259 0x2000 //RX_FDDRC_SLANT_0_0 +260 0x2000 //RX_FDDRC_SLANT_0_1 +261 0x2000 //RX_FDDRC_SLANT_0_2 +262 0x2000 //RX_FDDRC_SLANT_0_3 +263 0x5333 //RX_FDDRC_SLANT_1_0 +264 0x5333 //RX_FDDRC_SLANT_1_1 +265 0x5333 //RX_FDDRC_SLANT_1_2 +266 0x5333 //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +286 0x0100 //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 #CASE_NAME HEADSET-RESERVE1-VOICE_GENERIC-FB -#PARAM_MODE FULL -#PARAM_TYPE TX+RX -#TOTAL_CUSTOM_STEP 7 +#PARAM_MODE Full +#PARAM_TYPE TX+2RX +#TOTAL_CUSTOM_STEP 7+7 #TX 0 0x0009 //TX_OPERATION_MODE_0 1 0x0009 //TX_OPERATION_MODE_1 @@ -19553,10 +29629,10 @@ 248 0xF600 //TX_THR_SN_EST_6 249 0xF600 //TX_THR_SN_EST_7 250 0x0200 //TX_DELTA_THR_SN_EST_0 -251 0x0200 //TX_DELTA_THR_SN_EST_1 -252 0x0400 //TX_DELTA_THR_SN_EST_2 -253 0x0300 //TX_DELTA_THR_SN_EST_3 -254 0x0600 //TX_DELTA_THR_SN_EST_4 +251 0x0400 //TX_DELTA_THR_SN_EST_1 +252 0x0300 //TX_DELTA_THR_SN_EST_2 +253 0x0600 //TX_DELTA_THR_SN_EST_3 +254 0x0200 //TX_DELTA_THR_SN_EST_4 255 0x0200 //TX_DELTA_THR_SN_EST_5 256 0x0200 //TX_DELTA_THR_SN_EST_6 257 0x0200 //TX_DELTA_THR_SN_EST_7 @@ -19584,31 +29660,31 @@ 279 0x2000 //TX_B_POST_FLT_0 280 0x2000 //TX_B_POST_FLT_1 281 0x0012 //TX_NS_LVL_CTRL_0 -282 0x0019 //TX_NS_LVL_CTRL_1 +282 0x0016 //TX_NS_LVL_CTRL_1 283 0x0016 //TX_NS_LVL_CTRL_2 -284 0x0016 //TX_NS_LVL_CTRL_3 -285 0x0019 //TX_NS_LVL_CTRL_4 +284 0x0019 //TX_NS_LVL_CTRL_3 +285 0x0010 //TX_NS_LVL_CTRL_4 286 0x0010 //TX_NS_LVL_CTRL_5 -287 0x0010 //TX_NS_LVL_CTRL_6 +287 0x0019 //TX_NS_LVL_CTRL_6 288 0x0010 //TX_NS_LVL_CTRL_7 289 0x000C //TX_MIN_GAIN_S_0 -290 0x0011 //TX_MIN_GAIN_S_1 +290 0x000C //TX_MIN_GAIN_S_1 291 0x000C //TX_MIN_GAIN_S_2 -292 0x000C //TX_MIN_GAIN_S_3 -293 0x000F //TX_MIN_GAIN_S_4 +292 0x000F //TX_MIN_GAIN_S_3 +293 0x000C //TX_MIN_GAIN_S_4 294 0x000C //TX_MIN_GAIN_S_5 -295 0x000C //TX_MIN_GAIN_S_6 +295 0x0011 //TX_MIN_GAIN_S_6 296 0x000C //TX_MIN_GAIN_S_7 297 0x7FFF //TX_NMOS_SUP 298 0x0000 //TX_NS_MAX_PRI_SNR_TH 299 0x0000 //TX_NMOS_SUP_MENSA 300 0x7000 //TX_SNRI_SUP_0 -301 0x6000 //TX_SNRI_SUP_1 +301 0x7000 //TX_SNRI_SUP_1 302 0x7000 //TX_SNRI_SUP_2 -303 0x7000 //TX_SNRI_SUP_3 -304 0x6000 //TX_SNRI_SUP_4 +303 0x6000 //TX_SNRI_SUP_3 +304 0x7FFF //TX_SNRI_SUP_4 305 0x7FFF //TX_SNRI_SUP_5 -306 0x7FFF //TX_SNRI_SUP_6 +306 0x6000 //TX_SNRI_SUP_6 307 0x7FFF //TX_SNRI_SUP_7 308 0x7FFF //TX_THR_LFNS 309 0x0016 //TX_G_LFNS @@ -19625,8 +29701,8 @@ 320 0x6000 //TX_A_POST_FILT_S_6 321 0x6000 //TX_A_POST_FILT_S_7 322 0x2000 //TX_B_POST_FILT_0 -323 0x2000 //TX_B_POST_FILT_1 -324 0x4000 //TX_B_POST_FILT_2 +323 0x4000 //TX_B_POST_FILT_1 +324 0x2000 //TX_B_POST_FILT_2 325 0x2000 //TX_B_POST_FILT_3 326 0x2000 //TX_B_POST_FILT_4 327 0x2000 //TX_B_POST_FILT_5 @@ -19669,7 +29745,7 @@ 364 0x0000 //TX_K_APT 365 0x0001 //TX_NOISEDET 366 0x0190 //TX_NDETCT -367 0x0020 //TX_NOISE_TH_0 +367 0x04E8 //TX_NOISE_TH_0 368 0x7FFF //TX_NOISE_TH_0_2 369 0x7FFF //TX_NOISE_TH_0_3 370 0x02A6 //TX_NOISE_TH_1 @@ -19681,11 +29757,11 @@ 376 0x0001 //TX_NOISE_TH_5_3 377 0x0000 //TX_NOISE_TH_5_4 378 0x02BC //TX_NOISE_TH_6 -379 0x0020 //TX_MINENOISE_TH -380 0x4000 //TX_MINENOISE_MIC0_TH_MTS -381 0xFFEE //TX_MINENOISE_MIC0_TH_EXP -382 0x6000 //TX_MINENOISE_MIC0_S_TH_MTS -383 0xFFF3 //TX_MINENOISE_MIC0_S_TH_EXP +379 0x02BC //TX_MINENOISE_TH +380 0xD508 //TX_MORENS_TFMASK_TH +381 0x0001 //TX_DRC_QUIET_FLOOR +382 0x3A98 //TX_RATIODTL_CUT_TH +383 0x1482 //TX_DT_CUT_K1 384 0x0666 //TX_OUT_ENER_S_TH_CLEAN 385 0x0666 //TX_OUT_ENER_S_TH_LESSCLEAN 386 0x0333 //TX_OUT_ENER_S_TH_NOISY @@ -19693,22 +29769,22 @@ 388 0x0333 //TX_OUT_ENER_TH_SPEECH 389 0x2000 //TX_SN_NPB_GAIN 390 0x0000 //TX_NN_NPB_GAIN -391 0x0000 //TX_CSX_ALPHA_0 -392 0x0000 //TX_CSX_ALPHA_1 -393 0x0000 //TX_CSX_ALPHA_2 -394 0x0000 //TX_CSX_ALPHA_3 -395 0x0800 //TX_MU_ARSP_EST -396 0x00C8 //TX_P_OUTBEAM_MIN_TH +391 0x7FFF //TX_POST_MASK_SUP_HSNE +392 0x1388 //TX_TAIL_DET_TH +393 0x4000 //TX_B_LESSCUT_RTO_WTA +394 0x0000 //TX_MEL_G_R +395 0x0080 //TX_SUPHIGH_TH +396 0x0000 //TX_MASK_G_R 397 0x0002 //TX_EXTRA_NS_L -398 0x0800 //TX_EXTRA_NS_A -399 0x0005 //TX_VR_NOISE_FLOOR_TH +398 0x1800 //TX_C_POST_FLT_MASK +399 0x7FFF //TX_A_POST_FLT_WNS 400 0x0148 //TX_MIN_G_LOW300HZ 401 0x0004 //TX_MAXLEVEL_CNG 402 0x00B4 //TX_STN_NOISE_TH 403 0x4000 //TX_POST_MASK_SUP 404 0x7FFF //TX_POST_MASK_ADJUST 405 0x00C8 //TX_NS_ENOISE_MIC0_TH -406 0x0020 //TX_MINENOISE_MIC0_TH +406 0x04E7 //TX_MINENOISE_MIC0_TH 407 0x012C //TX_MINENOISE_MIC0_S_TH 408 0x2900 //TX_MIN_G_CTRL_SSNS 409 0x0800 //TX_METAL_RTO_THR @@ -19816,16 +29892,16 @@ 511 0x6666 //TX_MIC_TO_BFGAIN 512 0x0000 //TX_MICTOBFGAIN0 513 0x0000 //TX_FASTMUE_TH -514 0x0000 //TX_DERVB_LEN_0 -515 0x0000 //TX_DERVB_LEN_1 -516 0x0000 //TX_RHO_DERVB -517 0x0000 //TX_MIC_INDX_DERVB -518 0x0000 //TX_MU_DERVB -519 0x0000 //TX_DR_RESRV_0 -520 0x0000 //TX_DR_RESRV_1 -521 0x0000 //TX_DR_RESRV_2 -522 0x0000 //TX_DR_RESRV_3 -523 0x0000 //TX_DR_RESRV_4 +514 0xC000 //TX_DEREVERB_LF_MU +515 0xC000 //TX_DEREVERB_HF_MU +516 0xCCCC //TX_DEREVERB_DELAY +517 0xD999 //TX_DEREVERB_COEF_LEN +518 0x1F40 //TX_DEREVERB_DNR +519 0x0000 //TX_DEREVERB_ALPHA +520 0x0000 //TX_DEREVERB_BETA +521 0x0000 //TX_GSC_RTOL_TH +522 0x7000 //TX_GSC_RTOH_TH +523 0x0064 //TX_WIDE2_MEANHTH 524 0x0000 //TX_DR_RESRV_5 525 0x0000 //TX_DR_RESRV_6 526 0x0000 //TX_DR_RESRV_7 @@ -20199,8 +30275,73 @@ 894 0xC000 //TX_FASTNS_SSA_THHFL 895 0xCCCC //TX_FASTNS_SSA_THLFH 896 0xD999 //TX_FASTNS_SSA_THHFH +897 0x2339 //TX_SENDFUNC_REG_MICMUTE +898 0x0021 //TX_SENDFUNC_REG_MICMUTE1 +899 0x02BC //TX_MICMUTE_RATIO_THR +900 0x0140 //TX_MICMUTE_AMP_THR +901 0x0004 //TX_MICMUTE_HPF_IND +902 0x00C0 //TX_MICMUTE_LOG_EYR_TH +903 0x0008 //TX_MICMUTE_CVG_TIME +904 0x0008 //TX_MICMUTE_RELEASE_TIME +905 0x01FE //TX_MIC_VOLUME_MIC0MUTE +906 0x0020 //TX_MICMUTE_EPD_OFFSET_0 +907 0x001E //TX_MICMUTE_FRQ_AEC_L +908 0x7999 //TX_MICMUTE_EAD_THR +909 0x7FFF //TX_MICMUTE_LAMBDA_CB_NLE +910 0x7FFF //TX_MICMUTE_LAMBDA_RE_EST +911 0x4000 //TX_DTD_THR1_MICMUTE_0 +912 0x7000 //TX_DTD_THR1_MICMUTE_1 +913 0x7FFF //TX_DTD_THR1_MICMUTE_2 +914 0x7FFF //TX_DTD_THR1_MICMUTE_3 +915 0x6CCC //TX_DTD_THR2_MICMUTE_0 +916 0x0400 //TX_MICMUTE_MIN_EQ_RE_EST_0 +917 0x0400 //TX_MICMUTE_MIN_EQ_RE_EST_1 +918 0x1000 //TX_MICMUTE_MIN_EQ_RE_EST_2 +919 0x7FFF //TX_MICMUTE_MIN_EQ_RE_EST_3 +920 0x7FFF //TX_MICMUTE_MIN_EQ_RE_EST_4 +921 0x4000 //TX_MICMUTE_C_POST_FLT +922 0x03E8 //TX_MICMUTE_DT_CUT_K +923 0x0001 //TX_MICMUTE_DT_CUT_THR +924 0x03E8 //TX_MICMUTE_DT_CUT_K2 +925 0x0001 //TX_MICMUTE_DT_CUT_THR2 +926 0x0064 //TX_MICMUTE_DT2_HOLD_N +927 0x1000 //TX_MICMUTE_RATIODTH_THCUT +928 0x1000 //TX_MICMUTE_B_POST_FLT_ECHOL +929 0x7FFF //TX_MICMUTE_B_POST_FLT_ECHOH +930 0x0400 //TX_MICMUTE_C_POST_FLT_MASK +931 0x7999 //TX_MICMUTE_RATIODTL_CUT_TH +932 0x0258 //TX_MICMUTE_DT_CUT_K1 +933 0x0800 //TX_MICMUTE_N2_SN_EST +934 0xFC00 //TX_MICMUTE_THR_SN_EST_0 +935 0x001C //TX_MICMUTE_MIN_G_CTRL_0 +936 0x6000 //TX_MICMUTE_A_POST_FILT_S_0 +937 0x7000 //TX_MICMUTE_B_POST_FILT_0 +938 0x2710 //TX_MIC1RUB_AMP_THR +939 0x0010 //TX_MIC1MUTE_RATIO_THR +940 0x0450 //TX_MIC1MUTE_AMP_THR +941 0x0008 //TX_MIC1MUTE_CVG_TIME +942 0x0008 //TX_MIC1MUTE_RELEASE_TIME +943 0x0000 //TX_AMS_RESRV_01 +944 0x0000 //TX_AMS_RESRV_02 +945 0x0000 //TX_AMS_RESRV_03 +946 0x0000 //TX_AMS_RESRV_04 +947 0x0000 //TX_AMS_RESRV_05 +948 0x0000 //TX_AMS_RESRV_06 +949 0x0000 //TX_AMS_RESRV_07 +950 0x0000 //TX_AMS_RESRV_08 +951 0x0000 //TX_AMS_RESRV_09 +952 0x0000 //TX_AMS_RESRV_10 +953 0x0000 //TX_AMS_RESRV_11 +954 0x0000 //TX_AMS_RESRV_12 +955 0x0000 //TX_AMS_RESRV_13 +956 0x0000 //TX_AMS_RESRV_14 +957 0x0000 //TX_AMS_RESRV_15 +958 0x0000 //TX_AMS_RESRV_16 +959 0x0000 //TX_AMS_RESRV_17 +960 0x0000 //TX_AMS_RESRV_18 +961 0x0000 //TX_AMS_RESRV_19 #RX -0 0x002C //RX_RECVFUNC_MODE_0 +0 0x202C //RX_RECVFUNC_MODE_0 1 0x0000 //RX_RECVFUNC_MODE_1 2 0x0004 //RX_SAMPLINGFREQ_SIG 3 0x0004 //RX_SAMPLINGFREQ_PROC @@ -21050,18 +31191,869 @@ 110 0x0000 //RX_FDDRC_RESRV_0 129 0x0100 //RX_SPK_VOL 130 0x0000 //RX_VOL_RESRV_0 +#RX 2 +157 0x202C //RX_RECVFUNC_MODE_0 +158 0x0000 //RX_RECVFUNC_MODE_1 +159 0x0004 //RX_SAMPLINGFREQ_SIG +160 0x0004 //RX_SAMPLINGFREQ_PROC +161 0x000A //RX_FRAME_SZ +162 0x0000 //RX_DELAY_OPT +163 0x1000 //RX_TDDRC_ALPHA_UP_1 +164 0x1000 //RX_TDDRC_ALPHA_UP_2 +165 0x1000 //RX_TDDRC_ALPHA_UP_3 +166 0x1000 //RX_TDDRC_ALPHA_UP_4 +167 0x0800 //RX_PGA +168 0x7B02 //RX_A_HP +169 0x4000 //RX_B_PE +170 0x7800 //RX_THR_PITCH_DET_0 +171 0x7000 //RX_THR_PITCH_DET_1 +172 0x6000 //RX_THR_PITCH_DET_2 +173 0x0008 //RX_PITCH_BFR_LEN +174 0x0003 //RX_SBD_PITCH_DET +175 0x0100 //RX_PP_RESRV_0 +176 0x0020 //RX_PP_RESRV_1 +177 0x0500 //RX_N_SN_EST +178 0x000C //RX_N2_SN_EST +179 0x000A //RX_NS_LVL_CTRL +180 0xF600 //RX_THR_SN_EST +181 0x7000 //RX_LAMBDA_PFILT +182 0x000A //RX_FENS_RESRV_0 +183 0x0190 //RX_FENS_RESRV_1 +184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +187 0x0002 //RX_EXTRA_NS_L +188 0x0800 //RX_EXTRA_NS_A +189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +190 0x7FFF //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +192 0x199A //RX_A_POST_FLT +193 0x0000 //RX_LMT_THRD +194 0x4000 //RX_LMT_ALPHA +195 0x0020 //RX_FDEQ_SUBNUM +196 0x4848 //RX_FDEQ_GAIN_0 +197 0x4848 //RX_FDEQ_GAIN_1 +198 0x4848 //RX_FDEQ_GAIN_2 +199 0x4848 //RX_FDEQ_GAIN_3 +200 0x4848 //RX_FDEQ_GAIN_4 +201 0x4848 //RX_FDEQ_GAIN_5 +202 0x4848 //RX_FDEQ_GAIN_6 +203 0x4848 //RX_FDEQ_GAIN_7 +204 0x4848 //RX_FDEQ_GAIN_8 +205 0x4848 //RX_FDEQ_GAIN_9 +206 0x4848 //RX_FDEQ_GAIN_10 +207 0x4848 //RX_FDEQ_GAIN_11 +208 0x4848 //RX_FDEQ_GAIN_12 +209 0x4848 //RX_FDEQ_GAIN_13 +210 0x4848 //RX_FDEQ_GAIN_14 +211 0x4848 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0202 //RX_FDEQ_BIN_0 +221 0x0203 //RX_FDEQ_BIN_1 +222 0x0304 //RX_FDEQ_BIN_2 +223 0x0405 //RX_FDEQ_BIN_3 +224 0x0607 //RX_FDEQ_BIN_4 +225 0x0809 //RX_FDEQ_BIN_5 +226 0x0A0B //RX_FDEQ_BIN_6 +227 0x0C0D //RX_FDEQ_BIN_7 +228 0x0E0F //RX_FDEQ_BIN_8 +229 0x1011 //RX_FDEQ_BIN_9 +230 0x1214 //RX_FDEQ_BIN_10 +231 0x1618 //RX_FDEQ_BIN_11 +232 0x1C1C //RX_FDEQ_BIN_12 +233 0x2020 //RX_FDEQ_BIN_13 +234 0x2020 //RX_FDEQ_BIN_14 +235 0x2011 //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x4000 //RX_FDEQ_RESRV_0 +245 0x0320 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0030 //RX_FDDRC_BAND_MARGIN_1 +248 0x0050 //RX_FDDRC_BAND_MARGIN_2 +249 0x0080 //RX_FDDRC_BAND_MARGIN_3 +250 0x0007 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x5000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x6400 //RX_FDDRC_THRD_3_2 +258 0x6400 //RX_FDDRC_THRD_3_3 +259 0x2000 //RX_FDDRC_SLANT_0_0 +260 0x2000 //RX_FDDRC_SLANT_0_1 +261 0x2000 //RX_FDDRC_SLANT_0_2 +262 0x2000 //RX_FDDRC_SLANT_0_3 +263 0x5333 //RX_FDDRC_SLANT_1_0 +264 0x5333 //RX_FDDRC_SLANT_1_1 +265 0x5333 //RX_FDDRC_SLANT_1_2 +266 0x5333 //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +268 0x0002 //RX_FILTINDX +269 0x0000 //RX_TDDRC_THRD_0 +270 0x0000 //RX_TDDRC_THRD_1 +271 0x1200 //RX_TDDRC_THRD_2 +272 0x1900 //RX_TDDRC_THRD_3 +273 0x3000 //RX_TDDRC_SLANT_0 +274 0x6E00 //RX_TDDRC_SLANT_1 +275 0x1000 //RX_TDDRC_ALPHA_UP_0 +276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x199A //RX_TDDRC_HMNC_GAIN +279 0x0001 //RX_TDDRC_SMT_FLAG +280 0x0CCD //RX_TDDRC_SMT_W +281 0x0240 //RX_TDDRC_DRC_GAIN +282 0x7C00 //RX_LAMBDA_PKA_FP +283 0x2000 //RX_TPKA_FP +284 0x2000 //RX_MIN_G_FP +285 0x0080 //RX_MAX_G_FP +286 0x000B //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 +288 0x0000 //RX_MAXLEVEL_CNG +289 0x3000 //RX_BWE_UV_TH +290 0x3000 //RX_BWE_UV_TH2 +291 0x1800 //RX_BWE_UV_TH3 +292 0x1000 //RX_BWE_V_TH +293 0x04CD //RX_BWE_GAIN1_V_TH1 +294 0x0F33 //RX_BWE_GAIN1_V_TH2 +295 0x7333 //RX_BWE_UV_EQ +296 0x199A //RX_BWE_V_EQ +297 0x7333 //RX_BWE_TONE_TH +298 0x0004 //RX_BWE_UV_HOLD_T +299 0x6CCD //RX_BWE_GAIN2_ALPHA +300 0x799A //RX_BWE_GAIN3_ALPHA +301 0x001E //RX_BWE_CUTOFF +302 0x3000 //RX_BWE_GAINFILL +303 0x3200 //RX_BWE_MAXTH_TONE +304 0x2000 //RX_BWE_EQ_0 +305 0x2000 //RX_BWE_EQ_1 +306 0x2000 //RX_BWE_EQ_2 +307 0x2000 //RX_BWE_EQ_3 +308 0x2000 //RX_BWE_EQ_4 +309 0x2000 //RX_BWE_EQ_5 +310 0x2000 //RX_BWE_EQ_6 +311 0x0000 //RX_BWE_RESRV_0 +312 0x0000 //RX_BWE_RESRV_1 +313 0x0000 //RX_BWE_RESRV_2 +#VOL 0 +163 0x1000 //RX_TDDRC_ALPHA_UP_1 +164 0x1000 //RX_TDDRC_ALPHA_UP_2 +165 0x1000 //RX_TDDRC_ALPHA_UP_3 +166 0x1000 //RX_TDDRC_ALPHA_UP_4 +184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +190 0x7FFF //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +269 0x0000 //RX_TDDRC_THRD_0 +270 0x0000 //RX_TDDRC_THRD_1 +271 0x1200 //RX_TDDRC_THRD_2 +272 0x1900 //RX_TDDRC_THRD_3 +273 0x3000 //RX_TDDRC_SLANT_0 +274 0x6E00 //RX_TDDRC_SLANT_1 +275 0x1000 //RX_TDDRC_ALPHA_UP_0 +276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x199A //RX_TDDRC_HMNC_GAIN +279 0x0001 //RX_TDDRC_SMT_FLAG +280 0x0CCD //RX_TDDRC_SMT_W +281 0x0240 //RX_TDDRC_DRC_GAIN +195 0x0020 //RX_FDEQ_SUBNUM +196 0x4848 //RX_FDEQ_GAIN_0 +197 0x4848 //RX_FDEQ_GAIN_1 +198 0x4848 //RX_FDEQ_GAIN_2 +199 0x4848 //RX_FDEQ_GAIN_3 +200 0x4848 //RX_FDEQ_GAIN_4 +201 0x4848 //RX_FDEQ_GAIN_5 +202 0x4848 //RX_FDEQ_GAIN_6 +203 0x4848 //RX_FDEQ_GAIN_7 +204 0x4848 //RX_FDEQ_GAIN_8 +205 0x4848 //RX_FDEQ_GAIN_9 +206 0x4848 //RX_FDEQ_GAIN_10 +207 0x4848 //RX_FDEQ_GAIN_11 +208 0x4848 //RX_FDEQ_GAIN_12 +209 0x4848 //RX_FDEQ_GAIN_13 +210 0x4848 //RX_FDEQ_GAIN_14 +211 0x4848 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0202 //RX_FDEQ_BIN_0 +221 0x0203 //RX_FDEQ_BIN_1 +222 0x0304 //RX_FDEQ_BIN_2 +223 0x0405 //RX_FDEQ_BIN_3 +224 0x0607 //RX_FDEQ_BIN_4 +225 0x0809 //RX_FDEQ_BIN_5 +226 0x0A0B //RX_FDEQ_BIN_6 +227 0x0C0D //RX_FDEQ_BIN_7 +228 0x0E0F //RX_FDEQ_BIN_8 +229 0x1011 //RX_FDEQ_BIN_9 +230 0x1214 //RX_FDEQ_BIN_10 +231 0x1618 //RX_FDEQ_BIN_11 +232 0x1C1C //RX_FDEQ_BIN_12 +233 0x2020 //RX_FDEQ_BIN_13 +234 0x2020 //RX_FDEQ_BIN_14 +235 0x2011 //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x4000 //RX_FDEQ_RESRV_0 +245 0x0320 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0030 //RX_FDDRC_BAND_MARGIN_1 +248 0x0050 //RX_FDDRC_BAND_MARGIN_2 +249 0x0080 //RX_FDDRC_BAND_MARGIN_3 +250 0x0007 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x5000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x6400 //RX_FDDRC_THRD_3_2 +258 0x6400 //RX_FDDRC_THRD_3_3 +259 0x2000 //RX_FDDRC_SLANT_0_0 +260 0x2000 //RX_FDDRC_SLANT_0_1 +261 0x2000 //RX_FDDRC_SLANT_0_2 +262 0x2000 //RX_FDDRC_SLANT_0_3 +263 0x5333 //RX_FDDRC_SLANT_1_0 +264 0x5333 //RX_FDDRC_SLANT_1_1 +265 0x5333 //RX_FDDRC_SLANT_1_2 +266 0x5333 //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +286 0x000B //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 +#VOL 1 +163 0x1000 //RX_TDDRC_ALPHA_UP_1 +164 0x1000 //RX_TDDRC_ALPHA_UP_2 +165 0x1000 //RX_TDDRC_ALPHA_UP_3 +166 0x1000 //RX_TDDRC_ALPHA_UP_4 +184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +190 0x7FFF //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +269 0x0000 //RX_TDDRC_THRD_0 +270 0x0000 //RX_TDDRC_THRD_1 +271 0x1200 //RX_TDDRC_THRD_2 +272 0x1900 //RX_TDDRC_THRD_3 +273 0x3000 //RX_TDDRC_SLANT_0 +274 0x6E00 //RX_TDDRC_SLANT_1 +275 0x1000 //RX_TDDRC_ALPHA_UP_0 +276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x199A //RX_TDDRC_HMNC_GAIN +279 0x0001 //RX_TDDRC_SMT_FLAG +280 0x0CCD //RX_TDDRC_SMT_W +281 0x0240 //RX_TDDRC_DRC_GAIN +195 0x0020 //RX_FDEQ_SUBNUM +196 0x4848 //RX_FDEQ_GAIN_0 +197 0x4848 //RX_FDEQ_GAIN_1 +198 0x4848 //RX_FDEQ_GAIN_2 +199 0x4848 //RX_FDEQ_GAIN_3 +200 0x4848 //RX_FDEQ_GAIN_4 +201 0x4848 //RX_FDEQ_GAIN_5 +202 0x4848 //RX_FDEQ_GAIN_6 +203 0x4848 //RX_FDEQ_GAIN_7 +204 0x4848 //RX_FDEQ_GAIN_8 +205 0x4848 //RX_FDEQ_GAIN_9 +206 0x4848 //RX_FDEQ_GAIN_10 +207 0x4848 //RX_FDEQ_GAIN_11 +208 0x4848 //RX_FDEQ_GAIN_12 +209 0x4848 //RX_FDEQ_GAIN_13 +210 0x4848 //RX_FDEQ_GAIN_14 +211 0x4848 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0202 //RX_FDEQ_BIN_0 +221 0x0203 //RX_FDEQ_BIN_1 +222 0x0304 //RX_FDEQ_BIN_2 +223 0x0405 //RX_FDEQ_BIN_3 +224 0x0607 //RX_FDEQ_BIN_4 +225 0x0809 //RX_FDEQ_BIN_5 +226 0x0A0B //RX_FDEQ_BIN_6 +227 0x0C0D //RX_FDEQ_BIN_7 +228 0x0E0F //RX_FDEQ_BIN_8 +229 0x1011 //RX_FDEQ_BIN_9 +230 0x1214 //RX_FDEQ_BIN_10 +231 0x1618 //RX_FDEQ_BIN_11 +232 0x1C1C //RX_FDEQ_BIN_12 +233 0x2020 //RX_FDEQ_BIN_13 +234 0x2020 //RX_FDEQ_BIN_14 +235 0x2011 //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x4000 //RX_FDEQ_RESRV_0 +245 0x0320 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0030 //RX_FDDRC_BAND_MARGIN_1 +248 0x0050 //RX_FDDRC_BAND_MARGIN_2 +249 0x0080 //RX_FDDRC_BAND_MARGIN_3 +250 0x0007 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x5000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x6400 //RX_FDDRC_THRD_3_2 +258 0x6400 //RX_FDDRC_THRD_3_3 +259 0x2000 //RX_FDDRC_SLANT_0_0 +260 0x2000 //RX_FDDRC_SLANT_0_1 +261 0x2000 //RX_FDDRC_SLANT_0_2 +262 0x2000 //RX_FDDRC_SLANT_0_3 +263 0x5333 //RX_FDDRC_SLANT_1_0 +264 0x5333 //RX_FDDRC_SLANT_1_1 +265 0x5333 //RX_FDDRC_SLANT_1_2 +266 0x5333 //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +286 0x0013 //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 +#VOL 2 +163 0x1000 //RX_TDDRC_ALPHA_UP_1 +164 0x1000 //RX_TDDRC_ALPHA_UP_2 +165 0x1000 //RX_TDDRC_ALPHA_UP_3 +166 0x1000 //RX_TDDRC_ALPHA_UP_4 +184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +190 0x7FFF //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +269 0x0000 //RX_TDDRC_THRD_0 +270 0x0000 //RX_TDDRC_THRD_1 +271 0x1200 //RX_TDDRC_THRD_2 +272 0x1900 //RX_TDDRC_THRD_3 +273 0x3000 //RX_TDDRC_SLANT_0 +274 0x6E00 //RX_TDDRC_SLANT_1 +275 0x1000 //RX_TDDRC_ALPHA_UP_0 +276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x199A //RX_TDDRC_HMNC_GAIN +279 0x0001 //RX_TDDRC_SMT_FLAG +280 0x0CCD //RX_TDDRC_SMT_W +281 0x0240 //RX_TDDRC_DRC_GAIN +195 0x0020 //RX_FDEQ_SUBNUM +196 0x4848 //RX_FDEQ_GAIN_0 +197 0x4848 //RX_FDEQ_GAIN_1 +198 0x4848 //RX_FDEQ_GAIN_2 +199 0x4848 //RX_FDEQ_GAIN_3 +200 0x4848 //RX_FDEQ_GAIN_4 +201 0x4848 //RX_FDEQ_GAIN_5 +202 0x4848 //RX_FDEQ_GAIN_6 +203 0x4848 //RX_FDEQ_GAIN_7 +204 0x4848 //RX_FDEQ_GAIN_8 +205 0x4848 //RX_FDEQ_GAIN_9 +206 0x4848 //RX_FDEQ_GAIN_10 +207 0x4848 //RX_FDEQ_GAIN_11 +208 0x4848 //RX_FDEQ_GAIN_12 +209 0x4848 //RX_FDEQ_GAIN_13 +210 0x4848 //RX_FDEQ_GAIN_14 +211 0x4848 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0202 //RX_FDEQ_BIN_0 +221 0x0203 //RX_FDEQ_BIN_1 +222 0x0304 //RX_FDEQ_BIN_2 +223 0x0405 //RX_FDEQ_BIN_3 +224 0x0607 //RX_FDEQ_BIN_4 +225 0x0809 //RX_FDEQ_BIN_5 +226 0x0A0B //RX_FDEQ_BIN_6 +227 0x0C0D //RX_FDEQ_BIN_7 +228 0x0E0F //RX_FDEQ_BIN_8 +229 0x1011 //RX_FDEQ_BIN_9 +230 0x1214 //RX_FDEQ_BIN_10 +231 0x1618 //RX_FDEQ_BIN_11 +232 0x1C1C //RX_FDEQ_BIN_12 +233 0x2020 //RX_FDEQ_BIN_13 +234 0x2020 //RX_FDEQ_BIN_14 +235 0x2011 //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x4000 //RX_FDEQ_RESRV_0 +245 0x0320 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0030 //RX_FDDRC_BAND_MARGIN_1 +248 0x0050 //RX_FDDRC_BAND_MARGIN_2 +249 0x0080 //RX_FDDRC_BAND_MARGIN_3 +250 0x0007 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x5000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x6400 //RX_FDDRC_THRD_3_2 +258 0x6400 //RX_FDDRC_THRD_3_3 +259 0x2000 //RX_FDDRC_SLANT_0_0 +260 0x2000 //RX_FDDRC_SLANT_0_1 +261 0x2000 //RX_FDDRC_SLANT_0_2 +262 0x2000 //RX_FDDRC_SLANT_0_3 +263 0x5333 //RX_FDDRC_SLANT_1_0 +264 0x5333 //RX_FDDRC_SLANT_1_1 +265 0x5333 //RX_FDDRC_SLANT_1_2 +266 0x5333 //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +286 0x0020 //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 +#VOL 3 +163 0x1000 //RX_TDDRC_ALPHA_UP_1 +164 0x1000 //RX_TDDRC_ALPHA_UP_2 +165 0x1000 //RX_TDDRC_ALPHA_UP_3 +166 0x1000 //RX_TDDRC_ALPHA_UP_4 +184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +190 0x7FFF //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +269 0x0000 //RX_TDDRC_THRD_0 +270 0x0000 //RX_TDDRC_THRD_1 +271 0x1200 //RX_TDDRC_THRD_2 +272 0x1900 //RX_TDDRC_THRD_3 +273 0x3000 //RX_TDDRC_SLANT_0 +274 0x6E00 //RX_TDDRC_SLANT_1 +275 0x1000 //RX_TDDRC_ALPHA_UP_0 +276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x199A //RX_TDDRC_HMNC_GAIN +279 0x0001 //RX_TDDRC_SMT_FLAG +280 0x0CCD //RX_TDDRC_SMT_W +281 0x0240 //RX_TDDRC_DRC_GAIN +195 0x0020 //RX_FDEQ_SUBNUM +196 0x4848 //RX_FDEQ_GAIN_0 +197 0x4848 //RX_FDEQ_GAIN_1 +198 0x4848 //RX_FDEQ_GAIN_2 +199 0x4848 //RX_FDEQ_GAIN_3 +200 0x4848 //RX_FDEQ_GAIN_4 +201 0x4848 //RX_FDEQ_GAIN_5 +202 0x4848 //RX_FDEQ_GAIN_6 +203 0x4848 //RX_FDEQ_GAIN_7 +204 0x4848 //RX_FDEQ_GAIN_8 +205 0x4848 //RX_FDEQ_GAIN_9 +206 0x4848 //RX_FDEQ_GAIN_10 +207 0x4848 //RX_FDEQ_GAIN_11 +208 0x4848 //RX_FDEQ_GAIN_12 +209 0x4848 //RX_FDEQ_GAIN_13 +210 0x4848 //RX_FDEQ_GAIN_14 +211 0x4848 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0202 //RX_FDEQ_BIN_0 +221 0x0203 //RX_FDEQ_BIN_1 +222 0x0304 //RX_FDEQ_BIN_2 +223 0x0405 //RX_FDEQ_BIN_3 +224 0x0607 //RX_FDEQ_BIN_4 +225 0x0809 //RX_FDEQ_BIN_5 +226 0x0A0B //RX_FDEQ_BIN_6 +227 0x0C0D //RX_FDEQ_BIN_7 +228 0x0E0F //RX_FDEQ_BIN_8 +229 0x1011 //RX_FDEQ_BIN_9 +230 0x1214 //RX_FDEQ_BIN_10 +231 0x1618 //RX_FDEQ_BIN_11 +232 0x1C1C //RX_FDEQ_BIN_12 +233 0x2020 //RX_FDEQ_BIN_13 +234 0x2020 //RX_FDEQ_BIN_14 +235 0x2011 //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x4000 //RX_FDEQ_RESRV_0 +245 0x0320 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0030 //RX_FDDRC_BAND_MARGIN_1 +248 0x0050 //RX_FDDRC_BAND_MARGIN_2 +249 0x0080 //RX_FDDRC_BAND_MARGIN_3 +250 0x0007 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x5000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x6400 //RX_FDDRC_THRD_3_2 +258 0x6400 //RX_FDDRC_THRD_3_3 +259 0x2000 //RX_FDDRC_SLANT_0_0 +260 0x2000 //RX_FDDRC_SLANT_0_1 +261 0x2000 //RX_FDDRC_SLANT_0_2 +262 0x2000 //RX_FDDRC_SLANT_0_3 +263 0x5333 //RX_FDDRC_SLANT_1_0 +264 0x5333 //RX_FDDRC_SLANT_1_1 +265 0x5333 //RX_FDDRC_SLANT_1_2 +266 0x5333 //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +286 0x0036 //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 +#VOL 4 +163 0x1000 //RX_TDDRC_ALPHA_UP_1 +164 0x1000 //RX_TDDRC_ALPHA_UP_2 +165 0x1000 //RX_TDDRC_ALPHA_UP_3 +166 0x1000 //RX_TDDRC_ALPHA_UP_4 +184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +190 0x7FFF //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +269 0x0000 //RX_TDDRC_THRD_0 +270 0x0000 //RX_TDDRC_THRD_1 +271 0x1200 //RX_TDDRC_THRD_2 +272 0x1900 //RX_TDDRC_THRD_3 +273 0x3000 //RX_TDDRC_SLANT_0 +274 0x6E00 //RX_TDDRC_SLANT_1 +275 0x1000 //RX_TDDRC_ALPHA_UP_0 +276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x199A //RX_TDDRC_HMNC_GAIN +279 0x0001 //RX_TDDRC_SMT_FLAG +280 0x0CCD //RX_TDDRC_SMT_W +281 0x0240 //RX_TDDRC_DRC_GAIN +195 0x0020 //RX_FDEQ_SUBNUM +196 0x4848 //RX_FDEQ_GAIN_0 +197 0x4848 //RX_FDEQ_GAIN_1 +198 0x4848 //RX_FDEQ_GAIN_2 +199 0x4848 //RX_FDEQ_GAIN_3 +200 0x4848 //RX_FDEQ_GAIN_4 +201 0x4848 //RX_FDEQ_GAIN_5 +202 0x4848 //RX_FDEQ_GAIN_6 +203 0x4848 //RX_FDEQ_GAIN_7 +204 0x4848 //RX_FDEQ_GAIN_8 +205 0x4848 //RX_FDEQ_GAIN_9 +206 0x4848 //RX_FDEQ_GAIN_10 +207 0x4848 //RX_FDEQ_GAIN_11 +208 0x4848 //RX_FDEQ_GAIN_12 +209 0x4848 //RX_FDEQ_GAIN_13 +210 0x4848 //RX_FDEQ_GAIN_14 +211 0x4848 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0202 //RX_FDEQ_BIN_0 +221 0x0203 //RX_FDEQ_BIN_1 +222 0x0304 //RX_FDEQ_BIN_2 +223 0x0405 //RX_FDEQ_BIN_3 +224 0x0607 //RX_FDEQ_BIN_4 +225 0x0809 //RX_FDEQ_BIN_5 +226 0x0A0B //RX_FDEQ_BIN_6 +227 0x0C0D //RX_FDEQ_BIN_7 +228 0x0E0F //RX_FDEQ_BIN_8 +229 0x1011 //RX_FDEQ_BIN_9 +230 0x1214 //RX_FDEQ_BIN_10 +231 0x1618 //RX_FDEQ_BIN_11 +232 0x1C1C //RX_FDEQ_BIN_12 +233 0x2020 //RX_FDEQ_BIN_13 +234 0x2020 //RX_FDEQ_BIN_14 +235 0x2011 //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x4000 //RX_FDEQ_RESRV_0 +245 0x0320 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0030 //RX_FDDRC_BAND_MARGIN_1 +248 0x0050 //RX_FDDRC_BAND_MARGIN_2 +249 0x0080 //RX_FDDRC_BAND_MARGIN_3 +250 0x0007 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x5000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x6400 //RX_FDDRC_THRD_3_2 +258 0x6400 //RX_FDDRC_THRD_3_3 +259 0x2000 //RX_FDDRC_SLANT_0_0 +260 0x2000 //RX_FDDRC_SLANT_0_1 +261 0x2000 //RX_FDDRC_SLANT_0_2 +262 0x2000 //RX_FDDRC_SLANT_0_3 +263 0x5333 //RX_FDDRC_SLANT_1_0 +264 0x5333 //RX_FDDRC_SLANT_1_1 +265 0x5333 //RX_FDDRC_SLANT_1_2 +266 0x5333 //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +286 0x005B //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 +#VOL 5 +163 0x1000 //RX_TDDRC_ALPHA_UP_1 +164 0x1000 //RX_TDDRC_ALPHA_UP_2 +165 0x1000 //RX_TDDRC_ALPHA_UP_3 +166 0x1000 //RX_TDDRC_ALPHA_UP_4 +184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +190 0x7FFF //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +269 0x0000 //RX_TDDRC_THRD_0 +270 0x0000 //RX_TDDRC_THRD_1 +271 0x1200 //RX_TDDRC_THRD_2 +272 0x1900 //RX_TDDRC_THRD_3 +273 0x3000 //RX_TDDRC_SLANT_0 +274 0x6E00 //RX_TDDRC_SLANT_1 +275 0x1000 //RX_TDDRC_ALPHA_UP_0 +276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x199A //RX_TDDRC_HMNC_GAIN +279 0x0001 //RX_TDDRC_SMT_FLAG +280 0x0CCD //RX_TDDRC_SMT_W +281 0x0240 //RX_TDDRC_DRC_GAIN +195 0x0020 //RX_FDEQ_SUBNUM +196 0x4848 //RX_FDEQ_GAIN_0 +197 0x4848 //RX_FDEQ_GAIN_1 +198 0x4848 //RX_FDEQ_GAIN_2 +199 0x4848 //RX_FDEQ_GAIN_3 +200 0x4848 //RX_FDEQ_GAIN_4 +201 0x4848 //RX_FDEQ_GAIN_5 +202 0x4848 //RX_FDEQ_GAIN_6 +203 0x4848 //RX_FDEQ_GAIN_7 +204 0x4848 //RX_FDEQ_GAIN_8 +205 0x4848 //RX_FDEQ_GAIN_9 +206 0x4848 //RX_FDEQ_GAIN_10 +207 0x4848 //RX_FDEQ_GAIN_11 +208 0x4848 //RX_FDEQ_GAIN_12 +209 0x4848 //RX_FDEQ_GAIN_13 +210 0x4848 //RX_FDEQ_GAIN_14 +211 0x4848 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0202 //RX_FDEQ_BIN_0 +221 0x0203 //RX_FDEQ_BIN_1 +222 0x0304 //RX_FDEQ_BIN_2 +223 0x0405 //RX_FDEQ_BIN_3 +224 0x0607 //RX_FDEQ_BIN_4 +225 0x0809 //RX_FDEQ_BIN_5 +226 0x0A0B //RX_FDEQ_BIN_6 +227 0x0C0D //RX_FDEQ_BIN_7 +228 0x0E0F //RX_FDEQ_BIN_8 +229 0x1011 //RX_FDEQ_BIN_9 +230 0x1214 //RX_FDEQ_BIN_10 +231 0x1618 //RX_FDEQ_BIN_11 +232 0x1C1C //RX_FDEQ_BIN_12 +233 0x2020 //RX_FDEQ_BIN_13 +234 0x2020 //RX_FDEQ_BIN_14 +235 0x2011 //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x4000 //RX_FDEQ_RESRV_0 +245 0x0320 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0030 //RX_FDDRC_BAND_MARGIN_1 +248 0x0050 //RX_FDDRC_BAND_MARGIN_2 +249 0x0080 //RX_FDDRC_BAND_MARGIN_3 +250 0x0007 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x5000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x6400 //RX_FDDRC_THRD_3_2 +258 0x6400 //RX_FDDRC_THRD_3_3 +259 0x2000 //RX_FDDRC_SLANT_0_0 +260 0x2000 //RX_FDDRC_SLANT_0_1 +261 0x2000 //RX_FDDRC_SLANT_0_2 +262 0x2000 //RX_FDDRC_SLANT_0_3 +263 0x5333 //RX_FDDRC_SLANT_1_0 +264 0x5333 //RX_FDDRC_SLANT_1_1 +265 0x5333 //RX_FDDRC_SLANT_1_2 +266 0x5333 //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +286 0x0099 //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 +#VOL 6 +163 0x1000 //RX_TDDRC_ALPHA_UP_1 +164 0x1000 //RX_TDDRC_ALPHA_UP_2 +165 0x1000 //RX_TDDRC_ALPHA_UP_3 +166 0x1000 //RX_TDDRC_ALPHA_UP_4 +184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +190 0x7FFF //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +269 0x0000 //RX_TDDRC_THRD_0 +270 0x0000 //RX_TDDRC_THRD_1 +271 0x1200 //RX_TDDRC_THRD_2 +272 0x1900 //RX_TDDRC_THRD_3 +273 0x3000 //RX_TDDRC_SLANT_0 +274 0x6E00 //RX_TDDRC_SLANT_1 +275 0x1000 //RX_TDDRC_ALPHA_UP_0 +276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x199A //RX_TDDRC_HMNC_GAIN +279 0x0001 //RX_TDDRC_SMT_FLAG +280 0x0CCD //RX_TDDRC_SMT_W +281 0x0240 //RX_TDDRC_DRC_GAIN +195 0x0020 //RX_FDEQ_SUBNUM +196 0x4848 //RX_FDEQ_GAIN_0 +197 0x4848 //RX_FDEQ_GAIN_1 +198 0x4848 //RX_FDEQ_GAIN_2 +199 0x4848 //RX_FDEQ_GAIN_3 +200 0x4848 //RX_FDEQ_GAIN_4 +201 0x4848 //RX_FDEQ_GAIN_5 +202 0x4848 //RX_FDEQ_GAIN_6 +203 0x4848 //RX_FDEQ_GAIN_7 +204 0x4848 //RX_FDEQ_GAIN_8 +205 0x4848 //RX_FDEQ_GAIN_9 +206 0x4848 //RX_FDEQ_GAIN_10 +207 0x4848 //RX_FDEQ_GAIN_11 +208 0x4848 //RX_FDEQ_GAIN_12 +209 0x4848 //RX_FDEQ_GAIN_13 +210 0x4848 //RX_FDEQ_GAIN_14 +211 0x4848 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0202 //RX_FDEQ_BIN_0 +221 0x0203 //RX_FDEQ_BIN_1 +222 0x0304 //RX_FDEQ_BIN_2 +223 0x0405 //RX_FDEQ_BIN_3 +224 0x0607 //RX_FDEQ_BIN_4 +225 0x0809 //RX_FDEQ_BIN_5 +226 0x0A0B //RX_FDEQ_BIN_6 +227 0x0C0D //RX_FDEQ_BIN_7 +228 0x0E0F //RX_FDEQ_BIN_8 +229 0x1011 //RX_FDEQ_BIN_9 +230 0x1214 //RX_FDEQ_BIN_10 +231 0x1618 //RX_FDEQ_BIN_11 +232 0x1C1C //RX_FDEQ_BIN_12 +233 0x2020 //RX_FDEQ_BIN_13 +234 0x2020 //RX_FDEQ_BIN_14 +235 0x2011 //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x4000 //RX_FDEQ_RESRV_0 +245 0x0320 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0030 //RX_FDDRC_BAND_MARGIN_1 +248 0x0050 //RX_FDDRC_BAND_MARGIN_2 +249 0x0080 //RX_FDDRC_BAND_MARGIN_3 +250 0x0007 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x5000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x6400 //RX_FDDRC_THRD_3_2 +258 0x6400 //RX_FDDRC_THRD_3_3 +259 0x2000 //RX_FDDRC_SLANT_0_0 +260 0x2000 //RX_FDDRC_SLANT_0_1 +261 0x2000 //RX_FDDRC_SLANT_0_2 +262 0x2000 //RX_FDDRC_SLANT_0_3 +263 0x5333 //RX_FDDRC_SLANT_1_0 +264 0x5333 //RX_FDDRC_SLANT_1_1 +265 0x5333 //RX_FDDRC_SLANT_1_2 +266 0x5333 //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +286 0x0100 //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 #CASE_NAME HEADSET-GOOGLE_CONDOR_HEADPHONE-VOICE_GENERIC-NB -#PARAM_MODE FULL -#PARAM_TYPE TX+RX -#TOTAL_CUSTOM_STEP 7 +#PARAM_MODE Full +#PARAM_TYPE TX+2RX +#TOTAL_CUSTOM_STEP 7+7 #TX 0 0x0001 //TX_OPERATION_MODE_0 1 0x0001 //TX_OPERATION_MODE_1 2 0x0033 //TX_PATCH_REG -3 0x2F7C //TX_SENDFUNC_MODE_0 +3 0x6F7C //TX_SENDFUNC_MODE_0 4 0x0001 //TX_SENDFUNC_MODE_1 -5 0x0003 //TX_NUM_MIC +5 0x0002 //TX_NUM_MIC 6 0x0000 //TX_SAMPLINGFREQ_SIG 7 0x0000 //TX_SAMPLINGFREQ_PROC 8 0x000A //TX_FRAME_SZ_SIG @@ -21077,8 +32069,8 @@ 18 0x0000 //TX_SYS_RESRV_2 19 0x0000 //TX_SYS_RESRV_3 20 0x0000 //TX_DIST2REF0 -21 0x00A4 //TX_DIST2REF1 -22 0x0017 //TX_DIST2REF_02 +21 0x009D //TX_DIST2REF1 +22 0x0010 //TX_DIST2REF_02 23 0x0000 //TX_DIST2REF_03 24 0x0000 //TX_DIST2REF_04 25 0x0000 //TX_DIST2REF_05 @@ -21184,7 +32176,7 @@ 125 0x6000 //TX_C_POST_FLT_MIC_MAINBLK 126 0x6000 //TX_C_POST_FLT_MIC_REFBLK 127 0x0010 //TX_MIC_BLOCK_N -128 0x7652 //TX_A_HP +128 0x7646 //TX_A_HP 129 0x4000 //TX_B_PE 130 0x5000 //TX_THR_PITCH_DET_0 131 0x4800 //TX_THR_PITCH_DET_1 @@ -21223,7 +32215,7 @@ 164 0x7FFF //TX_MIN_EQ_RE_EST_12 165 0x2000 //TX_LAMBDA_RE_EST 166 0x0000 //TX_LAMBDA_CB_NLE -167 0x7FFF //TX_C_POST_FLT +167 0x4000 //TX_C_POST_FLT 168 0x2000 //TX_GAIN_NP 169 0x0180 //TX_SE_HOLD_N 170 0x00C8 //TX_DT_HOLD_N @@ -21253,14 +32245,14 @@ 194 0x0000 //TX_NORMENERTH 195 0x0000 //TX_NORMENERHIGHTH 196 0x0000 //TX_NORMENERHIGHTHL -197 0x6590 //TX_DTD_THR1_0 -198 0x6590 //TX_DTD_THR1_1 -199 0x6590 //TX_DTD_THR1_2 +197 0x7FF0 //TX_DTD_THR1_0 +198 0x7FF0 //TX_DTD_THR1_1 +199 0x7FF0 //TX_DTD_THR1_2 200 0x7FF0 //TX_DTD_THR1_3 201 0x7FF0 //TX_DTD_THR1_4 202 0x7FF0 //TX_DTD_THR1_5 203 0x7FF0 //TX_DTD_THR1_6 -204 0x0CCD //TX_DTD_THR2_0 +204 0x7E00 //TX_DTD_THR2_0 205 0x0CCD //TX_DTD_THR2_1 206 0x0CCD //TX_DTD_THR2_2 207 0x0CCD //TX_DTD_THR2_3 @@ -21269,7 +32261,7 @@ 210 0x0CCD //TX_DTD_THR2_6 211 0x7FFF //TX_DTD_THR3 212 0x0000 //TX_SPK_CUT_K -213 0x157C //TX_DT_CUT_K +213 0x1F40 //TX_DT_CUT_K 214 0x0100 //TX_DT_CUT_THR 215 0x04EB //TX_COMFORT_G 216 0x01F4 //TX_POWER_YOUT_TH @@ -21279,18 +32271,18 @@ 220 0x0000 //TX_DTD_MIC_BLK 221 0x1000 //TX_ADPT_STRICT_L 222 0x1000 //TX_ADPT_STRICT_H -223 0x0BB8 //TX_RATIO_DT_L_TH_LOW +223 0x0001 //TX_RATIO_DT_L_TH_LOW 224 0x3A98 //TX_RATIO_DT_H_TH_LOW -225 0x1770 //TX_RATIO_DT_L_TH_HIGH +225 0x0640 //TX_RATIO_DT_L_TH_HIGH 226 0x4E20 //TX_RATIO_DT_H_TH_HIGH -227 0x09C4 //TX_RATIO_DT_L0_TH -228 0x0800 //TX_B_POST_FILT_ECHO_L +227 0x0001 //TX_RATIO_DT_L0_TH +228 0x7FFF //TX_B_POST_FILT_ECHO_L 229 0x2000 //TX_B_POST_FILT_ECHO_H 230 0x0200 //TX_MIN_G_CTRL_ECHO 231 0x1000 //TX_B_LESSCUT_RTO_ECHO 232 0x0000 //TX_EPD_OFFSET_00 233 0x0000 //TX_EPD_OFFST_01 -234 0x1388 //TX_RATIO_DT_L0_TH_HIGH +234 0x05DC //TX_RATIO_DT_L0_TH_HIGH 235 0x3A98 //TX_RATIO_DT_H_TH_CUT 236 0x7FFF //TX_MIN_EQ_RE_EST_13 237 0x0000 //TX_DTD_THR1_7 @@ -21298,7 +32290,7 @@ 239 0x0800 //TX_DT_RESRV_7 240 0x0800 //TX_DT_RESRV_8 241 0x0000 //TX_DT_RESRV_9 -242 0xF800 //TX_THR_SN_EST_0 +242 0xFA00 //TX_THR_SN_EST_0 243 0xFA00 //TX_THR_SN_EST_1 244 0xFA00 //TX_THR_SN_EST_2 245 0xF900 //TX_THR_SN_EST_3 @@ -21307,12 +32299,12 @@ 248 0xF800 //TX_THR_SN_EST_6 249 0xF800 //TX_THR_SN_EST_7 250 0x0050 //TX_DELTA_THR_SN_EST_0 -251 0x01A0 //TX_DELTA_THR_SN_EST_1 +251 0x0200 //TX_DELTA_THR_SN_EST_1 252 0x0200 //TX_DELTA_THR_SN_EST_2 -253 0x0200 //TX_DELTA_THR_SN_EST_3 -254 0x0100 //TX_DELTA_THR_SN_EST_4 +253 0x0100 //TX_DELTA_THR_SN_EST_3 +254 0x0200 //TX_DELTA_THR_SN_EST_4 255 0x0200 //TX_DELTA_THR_SN_EST_5 -256 0x0200 //TX_DELTA_THR_SN_EST_6 +256 0x01A0 //TX_DELTA_THR_SN_EST_6 257 0x0200 //TX_DELTA_THR_SN_EST_7 258 0x4000 //TX_LAMBDA_NN_EST_0 259 0x4000 //TX_LAMBDA_NN_EST_1 @@ -21339,28 +32331,28 @@ 280 0x1000 //TX_B_POST_FLT_1 281 0x0010 //TX_NS_LVL_CTRL_0 282 0x0012 //TX_NS_LVL_CTRL_1 -283 0x0017 //TX_NS_LVL_CTRL_2 -284 0x0015 //TX_NS_LVL_CTRL_3 +283 0x0015 //TX_NS_LVL_CTRL_2 +284 0x0012 //TX_NS_LVL_CTRL_3 285 0x0012 //TX_NS_LVL_CTRL_4 -286 0x0012 //TX_NS_LVL_CTRL_5 -287 0x0011 //TX_NS_LVL_CTRL_6 +286 0x0011 //TX_NS_LVL_CTRL_5 +287 0x0012 //TX_NS_LVL_CTRL_6 288 0x0011 //TX_NS_LVL_CTRL_7 289 0x000F //TX_MIN_GAIN_S_0 -290 0x000F //TX_MIN_GAIN_S_1 -291 0x000D //TX_MIN_GAIN_S_2 +290 0x000D //TX_MIN_GAIN_S_1 +291 0x000F //TX_MIN_GAIN_S_2 292 0x000F //TX_MIN_GAIN_S_3 293 0x000F //TX_MIN_GAIN_S_4 -294 0x000F //TX_MIN_GAIN_S_5 -295 0x0010 //TX_MIN_GAIN_S_6 +294 0x0010 //TX_MIN_GAIN_S_5 +295 0x000F //TX_MIN_GAIN_S_6 296 0x000F //TX_MIN_GAIN_S_7 297 0x4000 //TX_NMOS_SUP 298 0x0000 //TX_NS_MAX_PRI_SNR_TH 299 0x0000 //TX_NMOS_SUP_MENSA 300 0x7FFF //TX_SNRI_SUP_0 -301 0x4000 //TX_SNRI_SUP_1 -302 0x1000 //TX_SNRI_SUP_2 -303 0x4000 //TX_SNRI_SUP_3 -304 0x2400 //TX_SNRI_SUP_4 +301 0x3000 //TX_SNRI_SUP_1 +302 0x4000 //TX_SNRI_SUP_2 +303 0x2400 //TX_SNRI_SUP_3 +304 0x4000 //TX_SNRI_SUP_4 305 0x4000 //TX_SNRI_SUP_5 306 0x4000 //TX_SNRI_SUP_6 307 0x7FFF //TX_SNRI_SUP_7 @@ -21371,19 +32363,19 @@ 312 0x7FFF //TX_A_POST_FILT_0 313 0x2000 //TX_A_POST_FILT_1 314 0x4000 //TX_A_POST_FILT_S_0 -315 0x5000 //TX_A_POST_FILT_S_1 -316 0x2000 //TX_A_POST_FILT_S_2 -317 0x4000 //TX_A_POST_FILT_S_3 -318 0x1000 //TX_A_POST_FILT_S_4 -319 0x3000 //TX_A_POST_FILT_S_5 +315 0x2000 //TX_A_POST_FILT_S_1 +316 0x4000 //TX_A_POST_FILT_S_2 +317 0x1000 //TX_A_POST_FILT_S_3 +318 0x3000 //TX_A_POST_FILT_S_4 +319 0x5000 //TX_A_POST_FILT_S_5 320 0x5000 //TX_A_POST_FILT_S_6 321 0x7000 //TX_A_POST_FILT_S_7 322 0x1000 //TX_B_POST_FILT_0 323 0x1000 //TX_B_POST_FILT_1 324 0x1000 //TX_B_POST_FILT_2 -325 0x1000 //TX_B_POST_FILT_3 -326 0x5000 //TX_B_POST_FILT_4 -327 0x3000 //TX_B_POST_FILT_5 +325 0x5000 //TX_B_POST_FILT_3 +326 0x3000 //TX_B_POST_FILT_4 +327 0x1000 //TX_B_POST_FILT_5 328 0x1000 //TX_B_POST_FILT_6 329 0x2000 //TX_B_POST_FILT_7 330 0x4000 //TX_B_LESSCUT_RTO_S_0 @@ -21396,12 +32388,12 @@ 337 0x7FFF //TX_B_LESSCUT_RTO_S_7 338 0x7E00 //TX_LAMBDA_PFILT 339 0x7D00 //TX_LAMBDA_PFILT_S_0 -340 0x7900 //TX_LAMBDA_PFILT_S_1 -341 0x7400 //TX_LAMBDA_PFILT_S_2 -342 0x7900 //TX_LAMBDA_PFILT_S_3 -343 0x7000 //TX_LAMBDA_PFILT_S_4 +340 0x7C00 //TX_LAMBDA_PFILT_S_1 +341 0x7900 //TX_LAMBDA_PFILT_S_2 +342 0x7000 //TX_LAMBDA_PFILT_S_3 +343 0x7D00 //TX_LAMBDA_PFILT_S_4 344 0x7D00 //TX_LAMBDA_PFILT_S_5 -345 0x7D00 //TX_LAMBDA_PFILT_S_6 +345 0x7900 //TX_LAMBDA_PFILT_S_6 346 0x7D00 //TX_LAMBDA_PFILT_S_7 347 0x0200 //TX_K_PEPPER 348 0x0800 //TX_A_PEPPER @@ -21410,20 +32402,20 @@ 351 0x0001 //TX_HMNC_BST_FLG 352 0x0200 //TX_HMNC_BST_THR 353 0x0800 //TX_DT_BINVAD_TH_0 -354 0x0800 //TX_DT_BINVAD_TH_1 -355 0x0800 //TX_DT_BINVAD_TH_2 +354 0x0100 //TX_DT_BINVAD_TH_1 +355 0x0100 //TX_DT_BINVAD_TH_2 356 0x0800 //TX_DT_BINVAD_TH_3 357 0x0FA0 //TX_DT_BINVAD_ENDF -358 0x0400 //TX_C_POST_FLT_DT +358 0x7000 //TX_C_POST_FLT_DT 359 0x4000 //TX_NS_B_POST_FLT_LESSCUT -360 0x0100 //TX_DT_BOOST +360 0x01B0 //TX_DT_BOOST 361 0x0000 //TX_BF_SGRAD_FLG 362 0x0005 //TX_BF_DVG_TH 363 0x001E //TX_SN_C_F 364 0x0000 //TX_K_APT 365 0x0001 //TX_NOISEDET 366 0x0064 //TX_NDETCT -367 0x0050 //TX_NOISE_TH_0 +367 0x003B //TX_NOISE_TH_0 368 0x7FFF //TX_NOISE_TH_0_2 369 0x7FFF //TX_NOISE_TH_0_3 370 0x07D0 //TX_NOISE_TH_1 @@ -21435,11 +32427,11 @@ 376 0x0000 //TX_NOISE_TH_5_3 377 0x7FFF //TX_NOISE_TH_5_4 378 0x0FA0 //TX_NOISE_TH_6 -379 0x000A //TX_MINENOISE_TH -380 0x4000 //TX_MINENOISE_MIC0_TH_MTS -381 0xFFEE //TX_MINENOISE_MIC0_TH_EXP -382 0x6000 //TX_MINENOISE_MIC0_S_TH_MTS -383 0xFFF3 //TX_MINENOISE_MIC0_S_TH_EXP +379 0x00C8 //TX_MINENOISE_TH +380 0xD508 //TX_MORENS_TFMASK_TH +381 0x0001 //TX_DRC_QUIET_FLOOR +382 0x3A98 //TX_RATIODTL_CUT_TH +383 0x0DAC //TX_DT_CUT_K1 384 0x0666 //TX_OUT_ENER_S_TH_CLEAN 385 0x0666 //TX_OUT_ENER_S_TH_LESSCLEAN 386 0x0333 //TX_OUT_ENER_S_TH_NOISY @@ -21447,22 +32439,22 @@ 388 0x1000 //TX_OUT_ENER_TH_SPEECH 389 0x2000 //TX_SN_NPB_GAIN 390 0x0000 //TX_NN_NPB_GAIN -391 0x0000 //TX_CSX_ALPHA_0 -392 0x0000 //TX_CSX_ALPHA_1 -393 0x0000 //TX_CSX_ALPHA_2 -394 0x0000 //TX_CSX_ALPHA_3 -395 0x0800 //TX_MU_ARSP_EST -396 0x00C8 //TX_P_OUTBEAM_MIN_TH +391 0x7FFF //TX_POST_MASK_SUP_HSNE +392 0x1388 //TX_TAIL_DET_TH +393 0x4000 //TX_B_LESSCUT_RTO_WTA +394 0x0000 //TX_MEL_G_R +395 0x0080 //TX_SUPHIGH_TH +396 0x0000 //TX_MASK_G_R 397 0x0002 //TX_EXTRA_NS_L -398 0x0800 //TX_EXTRA_NS_A -399 0x0005 //TX_VR_NOISE_FLOOR_TH +398 0x1800 //TX_C_POST_FLT_MASK +399 0x7FFF //TX_A_POST_FLT_WNS 400 0x0148 //TX_MIN_G_LOW300HZ -401 0x0001 //TX_MAXLEVEL_CNG +401 0x0004 //TX_MAXLEVEL_CNG 402 0x00B4 //TX_STN_NOISE_TH 403 0x4000 //TX_POST_MASK_SUP 404 0x7FFF //TX_POST_MASK_ADJUST 405 0x00C8 //TX_NS_ENOISE_MIC0_TH -406 0x000A //TX_MINENOISE_MIC0_TH +406 0x0032 //TX_MINENOISE_MIC0_TH 407 0x012C //TX_MINENOISE_MIC0_S_TH 408 0x7FFF //TX_MIN_G_CTRL_SSNS 409 0x0000 //TX_METAL_RTO_THR @@ -21570,16 +32562,16 @@ 511 0x6666 //TX_MIC_TO_BFGAIN 512 0x0000 //TX_MICTOBFGAIN0 513 0x0000 //TX_FASTMUE_TH -514 0x0000 //TX_DERVB_LEN_0 -515 0x0000 //TX_DERVB_LEN_1 -516 0x0000 //TX_RHO_DERVB -517 0x0000 //TX_MIC_INDX_DERVB -518 0x0000 //TX_MU_DERVB -519 0x0000 //TX_DR_RESRV_0 -520 0x0000 //TX_DR_RESRV_1 -521 0x0000 //TX_DR_RESRV_2 -522 0x0000 //TX_DR_RESRV_3 -523 0x0000 //TX_DR_RESRV_4 +514 0xC000 //TX_DEREVERB_LF_MU +515 0xC000 //TX_DEREVERB_HF_MU +516 0xCCCC //TX_DEREVERB_DELAY +517 0xD999 //TX_DEREVERB_COEF_LEN +518 0x1F40 //TX_DEREVERB_DNR +519 0x0000 //TX_DEREVERB_ALPHA +520 0x0000 //TX_DEREVERB_BETA +521 0x0000 //TX_GSC_RTOL_TH +522 0x7000 //TX_GSC_RTOH_TH +523 0x0064 //TX_WIDE2_MEANHTH 524 0x0000 //TX_DR_RESRV_5 525 0x0000 //TX_DR_RESRV_6 526 0x0000 //TX_DR_RESRV_7 @@ -21623,16 +32615,16 @@ 564 0x0000 //TX_PB_RESRV_0 565 0x0000 //TX_PB_RESRV_1 566 0x0014 //TX_FDEQ_SUBNUM -567 0x5858 //TX_FDEQ_GAIN_0 -568 0x5850 //TX_FDEQ_GAIN_1 -569 0x5050 //TX_FDEQ_GAIN_2 -570 0x5048 //TX_FDEQ_GAIN_3 -571 0x3C48 //TX_FDEQ_GAIN_4 -572 0x3C48 //TX_FDEQ_GAIN_5 -573 0x4848 //TX_FDEQ_GAIN_6 -574 0x4842 //TX_FDEQ_GAIN_7 -575 0x3030 //TX_FDEQ_GAIN_8 -576 0x3030 //TX_FDEQ_GAIN_9 +567 0x5050 //TX_FDEQ_GAIN_0 +568 0x5048 //TX_FDEQ_GAIN_1 +569 0x4848 //TX_FDEQ_GAIN_2 +570 0x483C //TX_FDEQ_GAIN_3 +571 0x3034 //TX_FDEQ_GAIN_4 +572 0x3048 //TX_FDEQ_GAIN_5 +573 0x4840 //TX_FDEQ_GAIN_6 +574 0x403C //TX_FDEQ_GAIN_7 +575 0x262C //TX_FDEQ_GAIN_8 +576 0x3A3C //TX_FDEQ_GAIN_9 577 0x4848 //TX_FDEQ_GAIN_10 578 0x4848 //TX_FDEQ_GAIN_11 579 0x4848 //TX_FDEQ_GAIN_12 @@ -21656,7 +32648,7 @@ 597 0x0708 //TX_FDEQ_BIN_6 598 0x090A //TX_FDEQ_BIN_7 599 0x0B0C //TX_FDEQ_BIN_8 -600 0x0D08 //TX_FDEQ_BIN_9 +600 0x0D0E //TX_FDEQ_BIN_9 601 0x0000 //TX_FDEQ_BIN_10 602 0x0000 //TX_FDEQ_BIN_11 603 0x0000 //TX_FDEQ_BIN_12 @@ -21680,9 +32672,9 @@ 621 0x4848 //TX_PREEQ_GAIN_MIC0_4 622 0x4848 //TX_PREEQ_GAIN_MIC0_5 623 0x4848 //TX_PREEQ_GAIN_MIC0_6 -624 0x484A //TX_PREEQ_GAIN_MIC0_7 -625 0x4B4E //TX_PREEQ_GAIN_MIC0_8 -626 0x5054 //TX_PREEQ_GAIN_MIC0_9 +624 0x4848 //TX_PREEQ_GAIN_MIC0_7 +625 0x4A4C //TX_PREEQ_GAIN_MIC0_8 +626 0x4E50 //TX_PREEQ_GAIN_MIC0_9 627 0x4848 //TX_PREEQ_GAIN_MIC0_10 628 0x4848 //TX_PREEQ_GAIN_MIC0_11 629 0x4848 //TX_PREEQ_GAIN_MIC0_12 @@ -21706,7 +32698,7 @@ 647 0x0708 //TX_PREEQ_BIN_MIC0_6 648 0x090A //TX_PREEQ_BIN_MIC0_7 649 0x0B0C //TX_PREEQ_BIN_MIC0_8 -650 0x0D08 //TX_PREEQ_BIN_MIC0_9 +650 0x0D0E //TX_PREEQ_BIN_MIC0_9 651 0x0000 //TX_PREEQ_BIN_MIC0_10 652 0x0000 //TX_PREEQ_BIN_MIC0_11 653 0x0000 //TX_PREEQ_BIN_MIC0_12 @@ -21729,9 +32721,9 @@ 670 0x4848 //TX_PREEQ_GAIN_MIC1_4 671 0x4848 //TX_PREEQ_GAIN_MIC1_5 672 0x4848 //TX_PREEQ_GAIN_MIC1_6 -673 0x4848 //TX_PREEQ_GAIN_MIC1_7 -674 0x4848 //TX_PREEQ_GAIN_MIC1_8 -675 0x4848 //TX_PREEQ_GAIN_MIC1_9 +673 0x4846 //TX_PREEQ_GAIN_MIC1_7 +674 0x4544 //TX_PREEQ_GAIN_MIC1_8 +675 0x4241 //TX_PREEQ_GAIN_MIC1_9 676 0x4848 //TX_PREEQ_GAIN_MIC1_10 677 0x4848 //TX_PREEQ_GAIN_MIC1_11 678 0x4848 //TX_PREEQ_GAIN_MIC1_12 @@ -21746,16 +32738,16 @@ 687 0x4848 //TX_PREEQ_GAIN_MIC1_21 688 0x4848 //TX_PREEQ_GAIN_MIC1_22 689 0x4848 //TX_PREEQ_GAIN_MIC1_23 -690 0x251A //TX_PREEQ_BIN_MIC1_0 -691 0x0F0F //TX_PREEQ_BIN_MIC1_1 -692 0x0C08 //TX_PREEQ_BIN_MIC1_2 -693 0x0700 //TX_PREEQ_BIN_MIC1_3 -694 0x0000 //TX_PREEQ_BIN_MIC1_4 -695 0x0000 //TX_PREEQ_BIN_MIC1_5 -696 0x0000 //TX_PREEQ_BIN_MIC1_6 -697 0x0000 //TX_PREEQ_BIN_MIC1_7 -698 0x0000 //TX_PREEQ_BIN_MIC1_8 -699 0x0000 //TX_PREEQ_BIN_MIC1_9 +690 0x0202 //TX_PREEQ_BIN_MIC1_0 +691 0x0203 //TX_PREEQ_BIN_MIC1_1 +692 0x0303 //TX_PREEQ_BIN_MIC1_2 +693 0x0304 //TX_PREEQ_BIN_MIC1_3 +694 0x0405 //TX_PREEQ_BIN_MIC1_4 +695 0x0506 //TX_PREEQ_BIN_MIC1_5 +696 0x0708 //TX_PREEQ_BIN_MIC1_6 +697 0x090A //TX_PREEQ_BIN_MIC1_7 +698 0x0B0C //TX_PREEQ_BIN_MIC1_8 +699 0x0D0E //TX_PREEQ_BIN_MIC1_9 700 0x0000 //TX_PREEQ_BIN_MIC1_10 701 0x0000 //TX_PREEQ_BIN_MIC1_11 702 0x0000 //TX_PREEQ_BIN_MIC1_12 @@ -21795,7 +32787,7 @@ 736 0x4848 //TX_PREEQ_GAIN_MIC2_21 737 0x4848 //TX_PREEQ_GAIN_MIC2_22 738 0x4848 //TX_PREEQ_GAIN_MIC2_23 -739 0x7800 //TX_PREEQ_BIN_MIC2_0 +739 0x0000 //TX_PREEQ_BIN_MIC2_0 740 0x0000 //TX_PREEQ_BIN_MIC2_1 741 0x0000 //TX_PREEQ_BIN_MIC2_2 742 0x0000 //TX_PREEQ_BIN_MIC2_3 @@ -21847,7 +32839,7 @@ 788 0x7EB8 //TX_TDDRC_ALPHA_DWN_02 789 0x7EB8 //TX_TDDRC_ALPHA_DWN_03 790 0x7EB8 //TX_TDDRC_ALPHA_DWN_04 -791 0x7FFF //TX_TDDRC_TD_DRC_LIMIT +791 0x7214 //TX_TDDRC_TD_DRC_LIMIT 792 0x0800 //TX_TDDRC_POST_LIMIT_GAIN 793 0x0000 //TX_TDDRC_RESRV_0 794 0x0000 //TX_TDDRC_RESRV_1 @@ -21914,15 +32906,15 @@ 855 0x0010 //TX_TDDRC_THRD_1 856 0x1800 //TX_TDDRC_THRD_2 857 0x1800 //TX_TDDRC_THRD_3 -858 0x6000 //TX_TDDRC_SLANT_0 -859 0x6000 //TX_TDDRC_SLANT_1 +858 0x7FFF //TX_TDDRC_SLANT_0 +859 0x7FFF //TX_TDDRC_SLANT_1 860 0x4000 //TX_TDDRC_ALPHA_UP_00 861 0x6000 //TX_TDDRC_ALPHA_DWN_00 862 0x0000 //TX_TDDRC_HMNC_FLAG 863 0x199A //TX_TDDRC_HMNC_GAIN 864 0x0000 //TX_TDDRC_SMT_FLAG 865 0x0CCD //TX_TDDRC_SMT_W -866 0x0BE3 //TX_TDDRC_DRC_GAIN +866 0x0A00 //TX_TDDRC_DRC_GAIN 867 0x7FFF //TX_TDDRC_LMT_THRD 868 0x0000 //TX_TDDRC_LMT_ALPHA 869 0x0000 //TX_TFMASKLTH @@ -21947,14 +32939,79 @@ 888 0x0028 //TX_FASTNS_ARSPC_TH 889 0xC000 //TX_FASTNS_MASK5_TH 890 0x4848 //TX_POSTSSA_MIN_G_VR_MASK -891 0x7FFF //TX_A_LESSCUT_RTO_MASK +891 0x4000 //TX_A_LESSCUT_RTO_MASK 892 0x1770 //TX_FASTNS_NOISETH 893 0xC000 //TX_FASTNS_SSA_THLFL 894 0xC000 //TX_FASTNS_SSA_THHFL 895 0xCCCC //TX_FASTNS_SSA_THLFH 896 0xD999 //TX_FASTNS_SSA_THHFH +897 0x2339 //TX_SENDFUNC_REG_MICMUTE +898 0x0021 //TX_SENDFUNC_REG_MICMUTE1 +899 0x02BC //TX_MICMUTE_RATIO_THR +900 0x0140 //TX_MICMUTE_AMP_THR +901 0x0004 //TX_MICMUTE_HPF_IND +902 0x00C0 //TX_MICMUTE_LOG_EYR_TH +903 0x0008 //TX_MICMUTE_CVG_TIME +904 0x0008 //TX_MICMUTE_RELEASE_TIME +905 0x01FE //TX_MIC_VOLUME_MIC0MUTE +906 0x0020 //TX_MICMUTE_EPD_OFFSET_0 +907 0x001E //TX_MICMUTE_FRQ_AEC_L +908 0x7999 //TX_MICMUTE_EAD_THR +909 0x7FFF //TX_MICMUTE_LAMBDA_CB_NLE +910 0x7FFF //TX_MICMUTE_LAMBDA_RE_EST +911 0x4000 //TX_DTD_THR1_MICMUTE_0 +912 0x7000 //TX_DTD_THR1_MICMUTE_1 +913 0x7FFF //TX_DTD_THR1_MICMUTE_2 +914 0x7FFF //TX_DTD_THR1_MICMUTE_3 +915 0x6CCC //TX_DTD_THR2_MICMUTE_0 +916 0x0400 //TX_MICMUTE_MIN_EQ_RE_EST_0 +917 0x0400 //TX_MICMUTE_MIN_EQ_RE_EST_1 +918 0x1000 //TX_MICMUTE_MIN_EQ_RE_EST_2 +919 0x7FFF //TX_MICMUTE_MIN_EQ_RE_EST_3 +920 0x7FFF //TX_MICMUTE_MIN_EQ_RE_EST_4 +921 0x4000 //TX_MICMUTE_C_POST_FLT +922 0x03E8 //TX_MICMUTE_DT_CUT_K +923 0x0001 //TX_MICMUTE_DT_CUT_THR +924 0x03E8 //TX_MICMUTE_DT_CUT_K2 +925 0x0001 //TX_MICMUTE_DT_CUT_THR2 +926 0x0064 //TX_MICMUTE_DT2_HOLD_N +927 0x1000 //TX_MICMUTE_RATIODTH_THCUT +928 0x1000 //TX_MICMUTE_B_POST_FLT_ECHOL +929 0x7FFF //TX_MICMUTE_B_POST_FLT_ECHOH +930 0x0400 //TX_MICMUTE_C_POST_FLT_MASK +931 0x7999 //TX_MICMUTE_RATIODTL_CUT_TH +932 0x0258 //TX_MICMUTE_DT_CUT_K1 +933 0x0800 //TX_MICMUTE_N2_SN_EST +934 0xFC00 //TX_MICMUTE_THR_SN_EST_0 +935 0x001C //TX_MICMUTE_MIN_G_CTRL_0 +936 0x6000 //TX_MICMUTE_A_POST_FILT_S_0 +937 0x7000 //TX_MICMUTE_B_POST_FILT_0 +938 0x2710 //TX_MIC1RUB_AMP_THR +939 0x0010 //TX_MIC1MUTE_RATIO_THR +940 0x0450 //TX_MIC1MUTE_AMP_THR +941 0x0008 //TX_MIC1MUTE_CVG_TIME +942 0x0008 //TX_MIC1MUTE_RELEASE_TIME +943 0x0000 //TX_AMS_RESRV_01 +944 0x0000 //TX_AMS_RESRV_02 +945 0x0000 //TX_AMS_RESRV_03 +946 0x0000 //TX_AMS_RESRV_04 +947 0x0000 //TX_AMS_RESRV_05 +948 0x0000 //TX_AMS_RESRV_06 +949 0x0000 //TX_AMS_RESRV_07 +950 0x0000 //TX_AMS_RESRV_08 +951 0x0000 //TX_AMS_RESRV_09 +952 0x0000 //TX_AMS_RESRV_10 +953 0x0000 //TX_AMS_RESRV_11 +954 0x0000 //TX_AMS_RESRV_12 +955 0x0000 //TX_AMS_RESRV_13 +956 0x0000 //TX_AMS_RESRV_14 +957 0x0000 //TX_AMS_RESRV_15 +958 0x0000 //TX_AMS_RESRV_16 +959 0x0000 //TX_AMS_RESRV_17 +960 0x0000 //TX_AMS_RESRV_18 +961 0x0000 //TX_AMS_RESRV_19 #RX -0 0x002C //RX_RECVFUNC_MODE_0 +0 0x202C //RX_RECVFUNC_MODE_0 1 0x0000 //RX_RECVFUNC_MODE_1 2 0x0000 //RX_SAMPLINGFREQ_SIG 3 0x0000 //RX_SAMPLINGFREQ_PROC @@ -22804,18 +33861,869 @@ 110 0x0000 //RX_FDDRC_RESRV_0 129 0x0100 //RX_SPK_VOL 130 0x0000 //RX_VOL_RESRV_0 +#RX 2 +157 0x202C //RX_RECVFUNC_MODE_0 +158 0x0000 //RX_RECVFUNC_MODE_1 +159 0x0000 //RX_SAMPLINGFREQ_SIG +160 0x0000 //RX_SAMPLINGFREQ_PROC +161 0x000A //RX_FRAME_SZ +162 0x0000 //RX_DELAY_OPT +163 0x3000 //RX_TDDRC_ALPHA_UP_1 +164 0x3000 //RX_TDDRC_ALPHA_UP_2 +165 0x3000 //RX_TDDRC_ALPHA_UP_3 +166 0x3000 //RX_TDDRC_ALPHA_UP_4 +167 0x0800 //RX_PGA +168 0x7FFF //RX_A_HP +169 0x0000 //RX_B_PE +170 0x3800 //RX_THR_PITCH_DET_0 +171 0x3000 //RX_THR_PITCH_DET_1 +172 0x2800 //RX_THR_PITCH_DET_2 +173 0x0008 //RX_PITCH_BFR_LEN +174 0x0003 //RX_SBD_PITCH_DET +175 0x0100 //RX_PP_RESRV_0 +176 0x0020 //RX_PP_RESRV_1 +177 0x0600 //RX_N_SN_EST +178 0x000C //RX_N2_SN_EST +179 0x0010 //RX_NS_LVL_CTRL +180 0xF800 //RX_THR_SN_EST +181 0x7CCD //RX_LAMBDA_PFILT +182 0x000A //RX_FENS_RESRV_0 +183 0x0190 //RX_FENS_RESRV_1 +184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +187 0x0002 //RX_EXTRA_NS_L +188 0x0800 //RX_EXTRA_NS_A +189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +190 0x7FFF //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +192 0x199A //RX_A_POST_FLT +193 0x0000 //RX_LMT_THRD +194 0x4000 //RX_LMT_ALPHA +195 0x0014 //RX_FDEQ_SUBNUM +196 0x4848 //RX_FDEQ_GAIN_0 +197 0x4848 //RX_FDEQ_GAIN_1 +198 0x4848 //RX_FDEQ_GAIN_2 +199 0x4848 //RX_FDEQ_GAIN_3 +200 0x4848 //RX_FDEQ_GAIN_4 +201 0x4848 //RX_FDEQ_GAIN_5 +202 0x4848 //RX_FDEQ_GAIN_6 +203 0x4848 //RX_FDEQ_GAIN_7 +204 0x4848 //RX_FDEQ_GAIN_8 +205 0x4848 //RX_FDEQ_GAIN_9 +206 0x4848 //RX_FDEQ_GAIN_10 +207 0x4848 //RX_FDEQ_GAIN_11 +208 0x4848 //RX_FDEQ_GAIN_12 +209 0x4848 //RX_FDEQ_GAIN_13 +210 0x4848 //RX_FDEQ_GAIN_14 +211 0x4848 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0202 //RX_FDEQ_BIN_0 +221 0x0203 //RX_FDEQ_BIN_1 +222 0x0303 //RX_FDEQ_BIN_2 +223 0x0304 //RX_FDEQ_BIN_3 +224 0x0405 //RX_FDEQ_BIN_4 +225 0x0506 //RX_FDEQ_BIN_5 +226 0x0708 //RX_FDEQ_BIN_6 +227 0x090A //RX_FDEQ_BIN_7 +228 0x0B0C //RX_FDEQ_BIN_8 +229 0x0D08 //RX_FDEQ_BIN_9 +230 0x0000 //RX_FDEQ_BIN_10 +231 0x0000 //RX_FDEQ_BIN_11 +232 0x0000 //RX_FDEQ_BIN_12 +233 0x0000 //RX_FDEQ_BIN_13 +234 0x0000 //RX_FDEQ_BIN_14 +235 0x0000 //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x4000 //RX_FDEQ_RESRV_0 +245 0x0320 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0030 //RX_FDDRC_BAND_MARGIN_1 +248 0x0050 //RX_FDDRC_BAND_MARGIN_2 +249 0x0080 //RX_FDDRC_BAND_MARGIN_3 +250 0x0007 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x5000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x6400 //RX_FDDRC_THRD_3_2 +258 0x6400 //RX_FDDRC_THRD_3_3 +259 0x2000 //RX_FDDRC_SLANT_0_0 +260 0x2000 //RX_FDDRC_SLANT_0_1 +261 0x2000 //RX_FDDRC_SLANT_0_2 +262 0x2000 //RX_FDDRC_SLANT_0_3 +263 0x5333 //RX_FDDRC_SLANT_1_0 +264 0x5333 //RX_FDDRC_SLANT_1_1 +265 0x5333 //RX_FDDRC_SLANT_1_2 +266 0x5333 //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +268 0x0002 //RX_FILTINDX +269 0x0000 //RX_TDDRC_THRD_0 +270 0x0000 //RX_TDDRC_THRD_1 +271 0x2000 //RX_TDDRC_THRD_2 +272 0x3000 //RX_TDDRC_THRD_3 +273 0x0800 //RX_TDDRC_SLANT_0 +274 0x7EB8 //RX_TDDRC_SLANT_1 +275 0x3000 //RX_TDDRC_ALPHA_UP_0 +276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x199A //RX_TDDRC_HMNC_GAIN +279 0x0001 //RX_TDDRC_SMT_FLAG +280 0x0CCD //RX_TDDRC_SMT_W +281 0x0200 //RX_TDDRC_DRC_GAIN +282 0x7C00 //RX_LAMBDA_PKA_FP +283 0x2000 //RX_TPKA_FP +284 0x2000 //RX_MIN_G_FP +285 0x0080 //RX_MAX_G_FP +286 0x000B //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 +288 0x0000 //RX_MAXLEVEL_CNG +289 0x3000 //RX_BWE_UV_TH +290 0x3000 //RX_BWE_UV_TH2 +291 0x1800 //RX_BWE_UV_TH3 +292 0x1000 //RX_BWE_V_TH +293 0x04CD //RX_BWE_GAIN1_V_TH1 +294 0x0F33 //RX_BWE_GAIN1_V_TH2 +295 0x7333 //RX_BWE_UV_EQ +296 0x199A //RX_BWE_V_EQ +297 0x7333 //RX_BWE_TONE_TH +298 0x0004 //RX_BWE_UV_HOLD_T +299 0x6CCD //RX_BWE_GAIN2_ALPHA +300 0x799A //RX_BWE_GAIN3_ALPHA +301 0x001E //RX_BWE_CUTOFF +302 0x3000 //RX_BWE_GAINFILL +303 0x3200 //RX_BWE_MAXTH_TONE +304 0x2000 //RX_BWE_EQ_0 +305 0x2000 //RX_BWE_EQ_1 +306 0x2000 //RX_BWE_EQ_2 +307 0x2000 //RX_BWE_EQ_3 +308 0x2000 //RX_BWE_EQ_4 +309 0x2000 //RX_BWE_EQ_5 +310 0x2000 //RX_BWE_EQ_6 +311 0x0000 //RX_BWE_RESRV_0 +312 0x0000 //RX_BWE_RESRV_1 +313 0x0000 //RX_BWE_RESRV_2 +#VOL 0 +163 0x3000 //RX_TDDRC_ALPHA_UP_1 +164 0x3000 //RX_TDDRC_ALPHA_UP_2 +165 0x3000 //RX_TDDRC_ALPHA_UP_3 +166 0x3000 //RX_TDDRC_ALPHA_UP_4 +184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +190 0x7FFF //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +269 0x0000 //RX_TDDRC_THRD_0 +270 0x0000 //RX_TDDRC_THRD_1 +271 0x2000 //RX_TDDRC_THRD_2 +272 0x3000 //RX_TDDRC_THRD_3 +273 0x0800 //RX_TDDRC_SLANT_0 +274 0x7EB8 //RX_TDDRC_SLANT_1 +275 0x3000 //RX_TDDRC_ALPHA_UP_0 +276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x199A //RX_TDDRC_HMNC_GAIN +279 0x0001 //RX_TDDRC_SMT_FLAG +280 0x0CCD //RX_TDDRC_SMT_W +281 0x0200 //RX_TDDRC_DRC_GAIN +195 0x0014 //RX_FDEQ_SUBNUM +196 0x4848 //RX_FDEQ_GAIN_0 +197 0x4848 //RX_FDEQ_GAIN_1 +198 0x4848 //RX_FDEQ_GAIN_2 +199 0x4848 //RX_FDEQ_GAIN_3 +200 0x4848 //RX_FDEQ_GAIN_4 +201 0x4848 //RX_FDEQ_GAIN_5 +202 0x4848 //RX_FDEQ_GAIN_6 +203 0x4848 //RX_FDEQ_GAIN_7 +204 0x4848 //RX_FDEQ_GAIN_8 +205 0x4848 //RX_FDEQ_GAIN_9 +206 0x4848 //RX_FDEQ_GAIN_10 +207 0x4848 //RX_FDEQ_GAIN_11 +208 0x4848 //RX_FDEQ_GAIN_12 +209 0x4848 //RX_FDEQ_GAIN_13 +210 0x4848 //RX_FDEQ_GAIN_14 +211 0x4848 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0202 //RX_FDEQ_BIN_0 +221 0x0203 //RX_FDEQ_BIN_1 +222 0x0303 //RX_FDEQ_BIN_2 +223 0x0304 //RX_FDEQ_BIN_3 +224 0x0405 //RX_FDEQ_BIN_4 +225 0x0506 //RX_FDEQ_BIN_5 +226 0x0708 //RX_FDEQ_BIN_6 +227 0x090A //RX_FDEQ_BIN_7 +228 0x0B0C //RX_FDEQ_BIN_8 +229 0x0D08 //RX_FDEQ_BIN_9 +230 0x0000 //RX_FDEQ_BIN_10 +231 0x0000 //RX_FDEQ_BIN_11 +232 0x0000 //RX_FDEQ_BIN_12 +233 0x0000 //RX_FDEQ_BIN_13 +234 0x0000 //RX_FDEQ_BIN_14 +235 0x0000 //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x4000 //RX_FDEQ_RESRV_0 +245 0x0320 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0030 //RX_FDDRC_BAND_MARGIN_1 +248 0x0050 //RX_FDDRC_BAND_MARGIN_2 +249 0x0080 //RX_FDDRC_BAND_MARGIN_3 +250 0x0007 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x5000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x6400 //RX_FDDRC_THRD_3_2 +258 0x6400 //RX_FDDRC_THRD_3_3 +259 0x2000 //RX_FDDRC_SLANT_0_0 +260 0x2000 //RX_FDDRC_SLANT_0_1 +261 0x2000 //RX_FDDRC_SLANT_0_2 +262 0x2000 //RX_FDDRC_SLANT_0_3 +263 0x5333 //RX_FDDRC_SLANT_1_0 +264 0x5333 //RX_FDDRC_SLANT_1_1 +265 0x5333 //RX_FDDRC_SLANT_1_2 +266 0x5333 //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +286 0x000B //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 +#VOL 1 +163 0x3000 //RX_TDDRC_ALPHA_UP_1 +164 0x3000 //RX_TDDRC_ALPHA_UP_2 +165 0x3000 //RX_TDDRC_ALPHA_UP_3 +166 0x3000 //RX_TDDRC_ALPHA_UP_4 +184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +190 0x7FFF //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +269 0x0000 //RX_TDDRC_THRD_0 +270 0x0000 //RX_TDDRC_THRD_1 +271 0x2000 //RX_TDDRC_THRD_2 +272 0x3000 //RX_TDDRC_THRD_3 +273 0x0800 //RX_TDDRC_SLANT_0 +274 0x7EB8 //RX_TDDRC_SLANT_1 +275 0x3000 //RX_TDDRC_ALPHA_UP_0 +276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x199A //RX_TDDRC_HMNC_GAIN +279 0x0001 //RX_TDDRC_SMT_FLAG +280 0x0CCD //RX_TDDRC_SMT_W +281 0x0200 //RX_TDDRC_DRC_GAIN +195 0x0014 //RX_FDEQ_SUBNUM +196 0x4848 //RX_FDEQ_GAIN_0 +197 0x4848 //RX_FDEQ_GAIN_1 +198 0x4848 //RX_FDEQ_GAIN_2 +199 0x4848 //RX_FDEQ_GAIN_3 +200 0x4848 //RX_FDEQ_GAIN_4 +201 0x4848 //RX_FDEQ_GAIN_5 +202 0x4848 //RX_FDEQ_GAIN_6 +203 0x4848 //RX_FDEQ_GAIN_7 +204 0x4848 //RX_FDEQ_GAIN_8 +205 0x4848 //RX_FDEQ_GAIN_9 +206 0x4848 //RX_FDEQ_GAIN_10 +207 0x4848 //RX_FDEQ_GAIN_11 +208 0x4848 //RX_FDEQ_GAIN_12 +209 0x4848 //RX_FDEQ_GAIN_13 +210 0x4848 //RX_FDEQ_GAIN_14 +211 0x4848 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0202 //RX_FDEQ_BIN_0 +221 0x0203 //RX_FDEQ_BIN_1 +222 0x0303 //RX_FDEQ_BIN_2 +223 0x0304 //RX_FDEQ_BIN_3 +224 0x0405 //RX_FDEQ_BIN_4 +225 0x0506 //RX_FDEQ_BIN_5 +226 0x0708 //RX_FDEQ_BIN_6 +227 0x090A //RX_FDEQ_BIN_7 +228 0x0B0C //RX_FDEQ_BIN_8 +229 0x0D08 //RX_FDEQ_BIN_9 +230 0x0000 //RX_FDEQ_BIN_10 +231 0x0000 //RX_FDEQ_BIN_11 +232 0x0000 //RX_FDEQ_BIN_12 +233 0x0000 //RX_FDEQ_BIN_13 +234 0x0000 //RX_FDEQ_BIN_14 +235 0x0000 //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x4000 //RX_FDEQ_RESRV_0 +245 0x0320 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0030 //RX_FDDRC_BAND_MARGIN_1 +248 0x0050 //RX_FDDRC_BAND_MARGIN_2 +249 0x0080 //RX_FDDRC_BAND_MARGIN_3 +250 0x0007 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x5000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x6400 //RX_FDDRC_THRD_3_2 +258 0x6400 //RX_FDDRC_THRD_3_3 +259 0x2000 //RX_FDDRC_SLANT_0_0 +260 0x2000 //RX_FDDRC_SLANT_0_1 +261 0x2000 //RX_FDDRC_SLANT_0_2 +262 0x2000 //RX_FDDRC_SLANT_0_3 +263 0x5333 //RX_FDDRC_SLANT_1_0 +264 0x5333 //RX_FDDRC_SLANT_1_1 +265 0x5333 //RX_FDDRC_SLANT_1_2 +266 0x5333 //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +286 0x0013 //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 +#VOL 2 +163 0x3000 //RX_TDDRC_ALPHA_UP_1 +164 0x3000 //RX_TDDRC_ALPHA_UP_2 +165 0x3000 //RX_TDDRC_ALPHA_UP_3 +166 0x3000 //RX_TDDRC_ALPHA_UP_4 +184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +190 0x7FFF //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +269 0x0000 //RX_TDDRC_THRD_0 +270 0x0000 //RX_TDDRC_THRD_1 +271 0x2000 //RX_TDDRC_THRD_2 +272 0x3000 //RX_TDDRC_THRD_3 +273 0x0800 //RX_TDDRC_SLANT_0 +274 0x7EB8 //RX_TDDRC_SLANT_1 +275 0x3000 //RX_TDDRC_ALPHA_UP_0 +276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x199A //RX_TDDRC_HMNC_GAIN +279 0x0001 //RX_TDDRC_SMT_FLAG +280 0x0CCD //RX_TDDRC_SMT_W +281 0x0200 //RX_TDDRC_DRC_GAIN +195 0x0014 //RX_FDEQ_SUBNUM +196 0x4848 //RX_FDEQ_GAIN_0 +197 0x4848 //RX_FDEQ_GAIN_1 +198 0x4848 //RX_FDEQ_GAIN_2 +199 0x4848 //RX_FDEQ_GAIN_3 +200 0x4848 //RX_FDEQ_GAIN_4 +201 0x4848 //RX_FDEQ_GAIN_5 +202 0x4848 //RX_FDEQ_GAIN_6 +203 0x4848 //RX_FDEQ_GAIN_7 +204 0x4848 //RX_FDEQ_GAIN_8 +205 0x4848 //RX_FDEQ_GAIN_9 +206 0x4848 //RX_FDEQ_GAIN_10 +207 0x4848 //RX_FDEQ_GAIN_11 +208 0x4848 //RX_FDEQ_GAIN_12 +209 0x4848 //RX_FDEQ_GAIN_13 +210 0x4848 //RX_FDEQ_GAIN_14 +211 0x4848 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0202 //RX_FDEQ_BIN_0 +221 0x0203 //RX_FDEQ_BIN_1 +222 0x0303 //RX_FDEQ_BIN_2 +223 0x0304 //RX_FDEQ_BIN_3 +224 0x0405 //RX_FDEQ_BIN_4 +225 0x0506 //RX_FDEQ_BIN_5 +226 0x0708 //RX_FDEQ_BIN_6 +227 0x090A //RX_FDEQ_BIN_7 +228 0x0B0C //RX_FDEQ_BIN_8 +229 0x0D08 //RX_FDEQ_BIN_9 +230 0x0000 //RX_FDEQ_BIN_10 +231 0x0000 //RX_FDEQ_BIN_11 +232 0x0000 //RX_FDEQ_BIN_12 +233 0x0000 //RX_FDEQ_BIN_13 +234 0x0000 //RX_FDEQ_BIN_14 +235 0x0000 //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x4000 //RX_FDEQ_RESRV_0 +245 0x0320 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0030 //RX_FDDRC_BAND_MARGIN_1 +248 0x0050 //RX_FDDRC_BAND_MARGIN_2 +249 0x0080 //RX_FDDRC_BAND_MARGIN_3 +250 0x0007 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x5000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x6400 //RX_FDDRC_THRD_3_2 +258 0x6400 //RX_FDDRC_THRD_3_3 +259 0x2000 //RX_FDDRC_SLANT_0_0 +260 0x2000 //RX_FDDRC_SLANT_0_1 +261 0x2000 //RX_FDDRC_SLANT_0_2 +262 0x2000 //RX_FDDRC_SLANT_0_3 +263 0x5333 //RX_FDDRC_SLANT_1_0 +264 0x5333 //RX_FDDRC_SLANT_1_1 +265 0x5333 //RX_FDDRC_SLANT_1_2 +266 0x5333 //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +286 0x0020 //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 +#VOL 3 +163 0x3000 //RX_TDDRC_ALPHA_UP_1 +164 0x3000 //RX_TDDRC_ALPHA_UP_2 +165 0x3000 //RX_TDDRC_ALPHA_UP_3 +166 0x3000 //RX_TDDRC_ALPHA_UP_4 +184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +190 0x7FFF //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +269 0x0000 //RX_TDDRC_THRD_0 +270 0x0000 //RX_TDDRC_THRD_1 +271 0x2000 //RX_TDDRC_THRD_2 +272 0x3000 //RX_TDDRC_THRD_3 +273 0x0800 //RX_TDDRC_SLANT_0 +274 0x7EB8 //RX_TDDRC_SLANT_1 +275 0x3000 //RX_TDDRC_ALPHA_UP_0 +276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x199A //RX_TDDRC_HMNC_GAIN +279 0x0001 //RX_TDDRC_SMT_FLAG +280 0x0CCD //RX_TDDRC_SMT_W +281 0x0200 //RX_TDDRC_DRC_GAIN +195 0x0014 //RX_FDEQ_SUBNUM +196 0x4848 //RX_FDEQ_GAIN_0 +197 0x4848 //RX_FDEQ_GAIN_1 +198 0x4848 //RX_FDEQ_GAIN_2 +199 0x4848 //RX_FDEQ_GAIN_3 +200 0x4848 //RX_FDEQ_GAIN_4 +201 0x4848 //RX_FDEQ_GAIN_5 +202 0x4848 //RX_FDEQ_GAIN_6 +203 0x4848 //RX_FDEQ_GAIN_7 +204 0x4848 //RX_FDEQ_GAIN_8 +205 0x4848 //RX_FDEQ_GAIN_9 +206 0x4848 //RX_FDEQ_GAIN_10 +207 0x4848 //RX_FDEQ_GAIN_11 +208 0x4848 //RX_FDEQ_GAIN_12 +209 0x4848 //RX_FDEQ_GAIN_13 +210 0x4848 //RX_FDEQ_GAIN_14 +211 0x4848 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0202 //RX_FDEQ_BIN_0 +221 0x0203 //RX_FDEQ_BIN_1 +222 0x0303 //RX_FDEQ_BIN_2 +223 0x0304 //RX_FDEQ_BIN_3 +224 0x0405 //RX_FDEQ_BIN_4 +225 0x0506 //RX_FDEQ_BIN_5 +226 0x0708 //RX_FDEQ_BIN_6 +227 0x090A //RX_FDEQ_BIN_7 +228 0x0B0C //RX_FDEQ_BIN_8 +229 0x0D08 //RX_FDEQ_BIN_9 +230 0x0000 //RX_FDEQ_BIN_10 +231 0x0000 //RX_FDEQ_BIN_11 +232 0x0000 //RX_FDEQ_BIN_12 +233 0x0000 //RX_FDEQ_BIN_13 +234 0x0000 //RX_FDEQ_BIN_14 +235 0x0000 //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x4000 //RX_FDEQ_RESRV_0 +245 0x0320 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0030 //RX_FDDRC_BAND_MARGIN_1 +248 0x0050 //RX_FDDRC_BAND_MARGIN_2 +249 0x0080 //RX_FDDRC_BAND_MARGIN_3 +250 0x0007 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x5000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x6400 //RX_FDDRC_THRD_3_2 +258 0x6400 //RX_FDDRC_THRD_3_3 +259 0x2000 //RX_FDDRC_SLANT_0_0 +260 0x2000 //RX_FDDRC_SLANT_0_1 +261 0x2000 //RX_FDDRC_SLANT_0_2 +262 0x2000 //RX_FDDRC_SLANT_0_3 +263 0x5333 //RX_FDDRC_SLANT_1_0 +264 0x5333 //RX_FDDRC_SLANT_1_1 +265 0x5333 //RX_FDDRC_SLANT_1_2 +266 0x5333 //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +286 0x0036 //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 +#VOL 4 +163 0x3000 //RX_TDDRC_ALPHA_UP_1 +164 0x3000 //RX_TDDRC_ALPHA_UP_2 +165 0x3000 //RX_TDDRC_ALPHA_UP_3 +166 0x3000 //RX_TDDRC_ALPHA_UP_4 +184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +190 0x7FFF //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +269 0x0000 //RX_TDDRC_THRD_0 +270 0x0000 //RX_TDDRC_THRD_1 +271 0x2000 //RX_TDDRC_THRD_2 +272 0x3000 //RX_TDDRC_THRD_3 +273 0x0800 //RX_TDDRC_SLANT_0 +274 0x7EB8 //RX_TDDRC_SLANT_1 +275 0x3000 //RX_TDDRC_ALPHA_UP_0 +276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x199A //RX_TDDRC_HMNC_GAIN +279 0x0001 //RX_TDDRC_SMT_FLAG +280 0x0CCD //RX_TDDRC_SMT_W +281 0x0200 //RX_TDDRC_DRC_GAIN +195 0x0014 //RX_FDEQ_SUBNUM +196 0x4848 //RX_FDEQ_GAIN_0 +197 0x4848 //RX_FDEQ_GAIN_1 +198 0x4848 //RX_FDEQ_GAIN_2 +199 0x4848 //RX_FDEQ_GAIN_3 +200 0x4848 //RX_FDEQ_GAIN_4 +201 0x4848 //RX_FDEQ_GAIN_5 +202 0x4848 //RX_FDEQ_GAIN_6 +203 0x4848 //RX_FDEQ_GAIN_7 +204 0x4848 //RX_FDEQ_GAIN_8 +205 0x4848 //RX_FDEQ_GAIN_9 +206 0x4848 //RX_FDEQ_GAIN_10 +207 0x4848 //RX_FDEQ_GAIN_11 +208 0x4848 //RX_FDEQ_GAIN_12 +209 0x4848 //RX_FDEQ_GAIN_13 +210 0x4848 //RX_FDEQ_GAIN_14 +211 0x4848 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0202 //RX_FDEQ_BIN_0 +221 0x0203 //RX_FDEQ_BIN_1 +222 0x0303 //RX_FDEQ_BIN_2 +223 0x0304 //RX_FDEQ_BIN_3 +224 0x0405 //RX_FDEQ_BIN_4 +225 0x0506 //RX_FDEQ_BIN_5 +226 0x0708 //RX_FDEQ_BIN_6 +227 0x090A //RX_FDEQ_BIN_7 +228 0x0B0C //RX_FDEQ_BIN_8 +229 0x0D08 //RX_FDEQ_BIN_9 +230 0x0000 //RX_FDEQ_BIN_10 +231 0x0000 //RX_FDEQ_BIN_11 +232 0x0000 //RX_FDEQ_BIN_12 +233 0x0000 //RX_FDEQ_BIN_13 +234 0x0000 //RX_FDEQ_BIN_14 +235 0x0000 //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x4000 //RX_FDEQ_RESRV_0 +245 0x0320 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0030 //RX_FDDRC_BAND_MARGIN_1 +248 0x0050 //RX_FDDRC_BAND_MARGIN_2 +249 0x0080 //RX_FDDRC_BAND_MARGIN_3 +250 0x0007 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x5000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x6400 //RX_FDDRC_THRD_3_2 +258 0x6400 //RX_FDDRC_THRD_3_3 +259 0x2000 //RX_FDDRC_SLANT_0_0 +260 0x2000 //RX_FDDRC_SLANT_0_1 +261 0x2000 //RX_FDDRC_SLANT_0_2 +262 0x2000 //RX_FDDRC_SLANT_0_3 +263 0x5333 //RX_FDDRC_SLANT_1_0 +264 0x5333 //RX_FDDRC_SLANT_1_1 +265 0x5333 //RX_FDDRC_SLANT_1_2 +266 0x5333 //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +286 0x005B //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 +#VOL 5 +163 0x3000 //RX_TDDRC_ALPHA_UP_1 +164 0x3000 //RX_TDDRC_ALPHA_UP_2 +165 0x3000 //RX_TDDRC_ALPHA_UP_3 +166 0x3000 //RX_TDDRC_ALPHA_UP_4 +184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +190 0x7FFF //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +269 0x0000 //RX_TDDRC_THRD_0 +270 0x0000 //RX_TDDRC_THRD_1 +271 0x2000 //RX_TDDRC_THRD_2 +272 0x3000 //RX_TDDRC_THRD_3 +273 0x0800 //RX_TDDRC_SLANT_0 +274 0x7EB8 //RX_TDDRC_SLANT_1 +275 0x3000 //RX_TDDRC_ALPHA_UP_0 +276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x199A //RX_TDDRC_HMNC_GAIN +279 0x0001 //RX_TDDRC_SMT_FLAG +280 0x0CCD //RX_TDDRC_SMT_W +281 0x0200 //RX_TDDRC_DRC_GAIN +195 0x0014 //RX_FDEQ_SUBNUM +196 0x4848 //RX_FDEQ_GAIN_0 +197 0x4848 //RX_FDEQ_GAIN_1 +198 0x4848 //RX_FDEQ_GAIN_2 +199 0x4848 //RX_FDEQ_GAIN_3 +200 0x4848 //RX_FDEQ_GAIN_4 +201 0x4848 //RX_FDEQ_GAIN_5 +202 0x4848 //RX_FDEQ_GAIN_6 +203 0x4848 //RX_FDEQ_GAIN_7 +204 0x4848 //RX_FDEQ_GAIN_8 +205 0x4848 //RX_FDEQ_GAIN_9 +206 0x4848 //RX_FDEQ_GAIN_10 +207 0x4848 //RX_FDEQ_GAIN_11 +208 0x4848 //RX_FDEQ_GAIN_12 +209 0x4848 //RX_FDEQ_GAIN_13 +210 0x4848 //RX_FDEQ_GAIN_14 +211 0x4848 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0202 //RX_FDEQ_BIN_0 +221 0x0203 //RX_FDEQ_BIN_1 +222 0x0303 //RX_FDEQ_BIN_2 +223 0x0304 //RX_FDEQ_BIN_3 +224 0x0405 //RX_FDEQ_BIN_4 +225 0x0506 //RX_FDEQ_BIN_5 +226 0x0708 //RX_FDEQ_BIN_6 +227 0x090A //RX_FDEQ_BIN_7 +228 0x0B0C //RX_FDEQ_BIN_8 +229 0x0D08 //RX_FDEQ_BIN_9 +230 0x0000 //RX_FDEQ_BIN_10 +231 0x0000 //RX_FDEQ_BIN_11 +232 0x0000 //RX_FDEQ_BIN_12 +233 0x0000 //RX_FDEQ_BIN_13 +234 0x0000 //RX_FDEQ_BIN_14 +235 0x0000 //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x4000 //RX_FDEQ_RESRV_0 +245 0x0320 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0030 //RX_FDDRC_BAND_MARGIN_1 +248 0x0050 //RX_FDDRC_BAND_MARGIN_2 +249 0x0080 //RX_FDDRC_BAND_MARGIN_3 +250 0x0007 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x5000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x6400 //RX_FDDRC_THRD_3_2 +258 0x6400 //RX_FDDRC_THRD_3_3 +259 0x2000 //RX_FDDRC_SLANT_0_0 +260 0x2000 //RX_FDDRC_SLANT_0_1 +261 0x2000 //RX_FDDRC_SLANT_0_2 +262 0x2000 //RX_FDDRC_SLANT_0_3 +263 0x5333 //RX_FDDRC_SLANT_1_0 +264 0x5333 //RX_FDDRC_SLANT_1_1 +265 0x5333 //RX_FDDRC_SLANT_1_2 +266 0x5333 //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +286 0x0099 //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 +#VOL 6 +163 0x3000 //RX_TDDRC_ALPHA_UP_1 +164 0x3000 //RX_TDDRC_ALPHA_UP_2 +165 0x3000 //RX_TDDRC_ALPHA_UP_3 +166 0x3000 //RX_TDDRC_ALPHA_UP_4 +184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +190 0x7FFF //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +269 0x0000 //RX_TDDRC_THRD_0 +270 0x0000 //RX_TDDRC_THRD_1 +271 0x2000 //RX_TDDRC_THRD_2 +272 0x3000 //RX_TDDRC_THRD_3 +273 0x0800 //RX_TDDRC_SLANT_0 +274 0x7EB8 //RX_TDDRC_SLANT_1 +275 0x3000 //RX_TDDRC_ALPHA_UP_0 +276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x199A //RX_TDDRC_HMNC_GAIN +279 0x0001 //RX_TDDRC_SMT_FLAG +280 0x0CCD //RX_TDDRC_SMT_W +281 0x0200 //RX_TDDRC_DRC_GAIN +195 0x0014 //RX_FDEQ_SUBNUM +196 0x4848 //RX_FDEQ_GAIN_0 +197 0x4848 //RX_FDEQ_GAIN_1 +198 0x4848 //RX_FDEQ_GAIN_2 +199 0x4848 //RX_FDEQ_GAIN_3 +200 0x4848 //RX_FDEQ_GAIN_4 +201 0x4848 //RX_FDEQ_GAIN_5 +202 0x4848 //RX_FDEQ_GAIN_6 +203 0x4848 //RX_FDEQ_GAIN_7 +204 0x4848 //RX_FDEQ_GAIN_8 +205 0x4848 //RX_FDEQ_GAIN_9 +206 0x4848 //RX_FDEQ_GAIN_10 +207 0x4848 //RX_FDEQ_GAIN_11 +208 0x4848 //RX_FDEQ_GAIN_12 +209 0x4848 //RX_FDEQ_GAIN_13 +210 0x4848 //RX_FDEQ_GAIN_14 +211 0x4848 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0202 //RX_FDEQ_BIN_0 +221 0x0203 //RX_FDEQ_BIN_1 +222 0x0303 //RX_FDEQ_BIN_2 +223 0x0304 //RX_FDEQ_BIN_3 +224 0x0405 //RX_FDEQ_BIN_4 +225 0x0506 //RX_FDEQ_BIN_5 +226 0x0708 //RX_FDEQ_BIN_6 +227 0x090A //RX_FDEQ_BIN_7 +228 0x0B0C //RX_FDEQ_BIN_8 +229 0x0D08 //RX_FDEQ_BIN_9 +230 0x0000 //RX_FDEQ_BIN_10 +231 0x0000 //RX_FDEQ_BIN_11 +232 0x0000 //RX_FDEQ_BIN_12 +233 0x0000 //RX_FDEQ_BIN_13 +234 0x0000 //RX_FDEQ_BIN_14 +235 0x0000 //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x4000 //RX_FDEQ_RESRV_0 +245 0x0320 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0030 //RX_FDDRC_BAND_MARGIN_1 +248 0x0050 //RX_FDDRC_BAND_MARGIN_2 +249 0x0080 //RX_FDDRC_BAND_MARGIN_3 +250 0x0007 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x5000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x6400 //RX_FDDRC_THRD_3_2 +258 0x6400 //RX_FDDRC_THRD_3_3 +259 0x2000 //RX_FDDRC_SLANT_0_0 +260 0x2000 //RX_FDDRC_SLANT_0_1 +261 0x2000 //RX_FDDRC_SLANT_0_2 +262 0x2000 //RX_FDDRC_SLANT_0_3 +263 0x5333 //RX_FDDRC_SLANT_1_0 +264 0x5333 //RX_FDDRC_SLANT_1_1 +265 0x5333 //RX_FDDRC_SLANT_1_2 +266 0x5333 //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +286 0x0100 //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 #CASE_NAME HEADSET-GOOGLE_CONDOR_HEADPHONE-VOICE_GENERIC-WB -#PARAM_MODE FULL -#PARAM_TYPE TX+RX -#TOTAL_CUSTOM_STEP 7 +#PARAM_MODE Full +#PARAM_TYPE TX+2RX +#TOTAL_CUSTOM_STEP 7+7 #TX 0 0x0001 //TX_OPERATION_MODE_0 1 0x0001 //TX_OPERATION_MODE_1 2 0x0033 //TX_PATCH_REG -3 0x2F7C //TX_SENDFUNC_MODE_0 +3 0x6F7C //TX_SENDFUNC_MODE_0 4 0x0001 //TX_SENDFUNC_MODE_1 -5 0x0003 //TX_NUM_MIC +5 0x0002 //TX_NUM_MIC 6 0x0001 //TX_SAMPLINGFREQ_SIG 7 0x0001 //TX_SAMPLINGFREQ_PROC 8 0x000A //TX_FRAME_SZ_SIG @@ -22831,8 +34739,8 @@ 18 0x0000 //TX_SYS_RESRV_2 19 0x0000 //TX_SYS_RESRV_3 20 0x0000 //TX_DIST2REF0 -21 0x00A4 //TX_DIST2REF1 -22 0x0017 //TX_DIST2REF_02 +21 0x009D //TX_DIST2REF1 +22 0x0010 //TX_DIST2REF_02 23 0x0000 //TX_DIST2REF_03 24 0x0000 //TX_DIST2REF_04 25 0x0000 //TX_DIST2REF_05 @@ -22923,8 +34831,8 @@ 110 0x0000 //TX_ADCS_MASK 111 0x04D0 //TX_ADCS_GAIN 112 0x4000 //TX_NFC_GAINFAC -113 0x0000 //TX_MAINMIC_BLKFACTOR -114 0x0000 //TX_REFMIC_BLKFACTOR +113 0x0004 //TX_MAINMIC_BLKFACTOR +114 0x0004 //TX_REFMIC_BLKFACTOR 115 0x0000 //TX_BLMIC_BLKFACTOR 116 0x0000 //TX_BRMIC_BLKFACTOR 117 0x0031 //TX_MICBLK_START_BIN @@ -22962,7 +34870,7 @@ 149 0x0800 //TX_AEC_REF_GAIN_2 150 0x6800 //TX_EAD_THR 151 0x1000 //TX_THR_RE_EST -152 0x0200 //TX_MIN_EQ_RE_EST_0 +152 0x3000 //TX_MIN_EQ_RE_EST_0 153 0x0100 //TX_MIN_EQ_RE_EST_1 154 0x0200 //TX_MIN_EQ_RE_EST_2 155 0x0200 //TX_MIN_EQ_RE_EST_3 @@ -22975,13 +34883,13 @@ 162 0x1000 //TX_MIN_EQ_RE_EST_10 163 0x1000 //TX_MIN_EQ_RE_EST_11 164 0x1000 //TX_MIN_EQ_RE_EST_12 -165 0x4000 //TX_LAMBDA_RE_EST +165 0x1B00 //TX_LAMBDA_RE_EST 166 0x4000 //TX_LAMBDA_CB_NLE 167 0x7FFF //TX_C_POST_FLT 168 0x5000 //TX_GAIN_NP 169 0x0180 //TX_SE_HOLD_N 170 0x00C8 //TX_DT_HOLD_N -171 0x05DC //TX_DT2_HOLD_N +171 0x0020 //TX_DT2_HOLD_N 172 0x6666 //TX_AEC_RESRV_0 173 0x0000 //TX_AEC_RESRV_1 174 0x0014 //TX_AEC_RESRV_2 @@ -23007,15 +34915,15 @@ 194 0x0000 //TX_NORMENERTH 195 0x0000 //TX_NORMENERHIGHTH 196 0x0000 //TX_NORMENERHIGHTHL -197 0x6590 //TX_DTD_THR1_0 -198 0x6590 //TX_DTD_THR1_1 -199 0x6590 //TX_DTD_THR1_2 +197 0x76D0 //TX_DTD_THR1_0 +198 0x76D0 //TX_DTD_THR1_1 +199 0x76D0 //TX_DTD_THR1_2 200 0x7FF0 //TX_DTD_THR1_3 201 0x7FF0 //TX_DTD_THR1_4 202 0x7FF0 //TX_DTD_THR1_5 203 0x7FF0 //TX_DTD_THR1_6 -204 0x5000 //TX_DTD_THR2_0 -205 0x5000 //TX_DTD_THR2_1 +204 0x7E00 //TX_DTD_THR2_0 +205 0x7E00 //TX_DTD_THR2_1 206 0x5000 //TX_DTD_THR2_2 207 0x5000 //TX_DTD_THR2_3 208 0x5000 //TX_DTD_THR2_4 @@ -23023,8 +34931,8 @@ 210 0x5000 //TX_DTD_THR2_6 211 0x7FFF //TX_DTD_THR3 212 0x0000 //TX_SPK_CUT_K -213 0x07D0 //TX_DT_CUT_K -214 0x0100 //TX_DT_CUT_THR +213 0x03E8 //TX_DT_CUT_K +214 0x0010 //TX_DT_CUT_THR 215 0x04EB //TX_COMFORT_G 216 0x01F4 //TX_POWER_YOUT_TH 217 0x4000 //TX_FDPFGAINECHO @@ -23035,16 +34943,16 @@ 222 0x023E //TX_ADPT_STRICT_H 223 0x0BB8 //TX_RATIO_DT_L_TH_LOW 224 0x3A98 //TX_RATIO_DT_H_TH_LOW -225 0x1770 //TX_RATIO_DT_L_TH_HIGH -226 0x4E20 //TX_RATIO_DT_H_TH_HIGH -227 0x09C4 //TX_RATIO_DT_L0_TH -228 0x2000 //TX_B_POST_FILT_ECHO_L +225 0x044C //TX_RATIO_DT_L_TH_HIGH +226 0x7800 //TX_RATIO_DT_H_TH_HIGH +227 0x0001 //TX_RATIO_DT_L0_TH +228 0x7FFF //TX_B_POST_FILT_ECHO_L 229 0x7FFF //TX_B_POST_FILT_ECHO_H 230 0x0200 //TX_MIN_G_CTRL_ECHO 231 0x1000 //TX_B_LESSCUT_RTO_ECHO 232 0x0000 //TX_EPD_OFFSET_00 233 0x0000 //TX_EPD_OFFST_01 -234 0x1388 //TX_RATIO_DT_L0_TH_HIGH +234 0x03E8 //TX_RATIO_DT_L0_TH_HIGH 235 0x7FFF //TX_RATIO_DT_H_TH_CUT 236 0x7FFF //TX_MIN_EQ_RE_EST_13 237 0x0000 //TX_DTD_THR1_7 @@ -23052,7 +34960,7 @@ 239 0x0800 //TX_DT_RESRV_7 240 0x0800 //TX_DT_RESRV_8 241 0x0000 //TX_DT_RESRV_9 -242 0xF800 //TX_THR_SN_EST_0 +242 0xFA00 //TX_THR_SN_EST_0 243 0xFA00 //TX_THR_SN_EST_1 244 0xFA00 //TX_THR_SN_EST_2 245 0xFB00 //TX_THR_SN_EST_3 @@ -23061,11 +34969,11 @@ 248 0xF800 //TX_THR_SN_EST_6 249 0xF800 //TX_THR_SN_EST_7 250 0x0100 //TX_DELTA_THR_SN_EST_0 -251 0x0200 //TX_DELTA_THR_SN_EST_1 -252 0x0100 //TX_DELTA_THR_SN_EST_2 -253 0x0200 //TX_DELTA_THR_SN_EST_3 +251 0x0100 //TX_DELTA_THR_SN_EST_1 +252 0x0200 //TX_DELTA_THR_SN_EST_2 +253 0x0100 //TX_DELTA_THR_SN_EST_3 254 0x0100 //TX_DELTA_THR_SN_EST_4 -255 0x0100 //TX_DELTA_THR_SN_EST_5 +255 0x0200 //TX_DELTA_THR_SN_EST_5 256 0x0200 //TX_DELTA_THR_SN_EST_6 257 0x0200 //TX_DELTA_THR_SN_EST_7 258 0x4000 //TX_LAMBDA_NN_EST_0 @@ -23093,11 +35001,11 @@ 280 0x1000 //TX_B_POST_FLT_1 281 0x0010 //TX_NS_LVL_CTRL_0 282 0x0014 //TX_NS_LVL_CTRL_1 -283 0x0014 //TX_NS_LVL_CTRL_2 -284 0x0018 //TX_NS_LVL_CTRL_3 -285 0x0016 //TX_NS_LVL_CTRL_4 -286 0x0014 //TX_NS_LVL_CTRL_5 -287 0x0011 //TX_NS_LVL_CTRL_6 +283 0x0018 //TX_NS_LVL_CTRL_2 +284 0x0016 //TX_NS_LVL_CTRL_3 +285 0x0014 //TX_NS_LVL_CTRL_4 +286 0x0011 //TX_NS_LVL_CTRL_5 +287 0x0014 //TX_NS_LVL_CTRL_6 288 0x0011 //TX_NS_LVL_CTRL_7 289 0x000F //TX_MIN_GAIN_S_0 290 0x0010 //TX_MIN_GAIN_S_1 @@ -23115,8 +35023,8 @@ 302 0x4000 //TX_SNRI_SUP_2 303 0x4000 //TX_SNRI_SUP_3 304 0x4000 //TX_SNRI_SUP_4 -305 0x4000 //TX_SNRI_SUP_5 -306 0x50C0 //TX_SNRI_SUP_6 +305 0x50C0 //TX_SNRI_SUP_5 +306 0x4000 //TX_SNRI_SUP_6 307 0x7FFF //TX_SNRI_SUP_7 308 0x7FFF //TX_THR_LFNS 309 0x0018 //TX_G_LFNS @@ -23125,19 +35033,19 @@ 312 0x7FFF //TX_A_POST_FILT_0 313 0x2000 //TX_A_POST_FILT_1 314 0x5000 //TX_A_POST_FILT_S_0 -315 0x6000 //TX_A_POST_FILT_S_1 -316 0x4C00 //TX_A_POST_FILT_S_2 -317 0x4000 //TX_A_POST_FILT_S_3 -318 0x6000 //TX_A_POST_FILT_S_4 -319 0x4000 //TX_A_POST_FILT_S_5 -320 0x5000 //TX_A_POST_FILT_S_6 +315 0x4C00 //TX_A_POST_FILT_S_1 +316 0x4000 //TX_A_POST_FILT_S_2 +317 0x6000 //TX_A_POST_FILT_S_3 +318 0x4000 //TX_A_POST_FILT_S_4 +319 0x5000 //TX_A_POST_FILT_S_5 +320 0x6000 //TX_A_POST_FILT_S_6 321 0x7000 //TX_A_POST_FILT_S_7 322 0x2000 //TX_B_POST_FILT_0 -323 0x1000 //TX_B_POST_FILT_1 +323 0x2000 //TX_B_POST_FILT_1 324 0x2000 //TX_B_POST_FILT_2 -325 0x2000 //TX_B_POST_FILT_3 +325 0x4000 //TX_B_POST_FILT_3 326 0x4000 //TX_B_POST_FILT_4 -327 0x4000 //TX_B_POST_FILT_5 +327 0x1000 //TX_B_POST_FILT_5 328 0x1000 //TX_B_POST_FILT_6 329 0x2000 //TX_B_POST_FILT_7 330 0x4000 //TX_B_LESSCUT_RTO_S_0 @@ -23145,14 +35053,14 @@ 332 0x7FFF //TX_B_LESSCUT_RTO_S_2 333 0x7FFF //TX_B_LESSCUT_RTO_S_3 334 0x7FFF //TX_B_LESSCUT_RTO_S_4 -335 0x7FFF //TX_B_LESSCUT_RTO_S_5 -336 0x6000 //TX_B_LESSCUT_RTO_S_6 +335 0x6000 //TX_B_LESSCUT_RTO_S_5 +336 0x7FFF //TX_B_LESSCUT_RTO_S_6 337 0x7FFF //TX_B_LESSCUT_RTO_S_7 338 0x7C00 //TX_LAMBDA_PFILT 339 0x7C00 //TX_LAMBDA_PFILT_S_0 340 0x7C00 //TX_LAMBDA_PFILT_S_1 -341 0x7C00 //TX_LAMBDA_PFILT_S_2 -342 0x7A00 //TX_LAMBDA_PFILT_S_3 +341 0x7A00 //TX_LAMBDA_PFILT_S_2 +342 0x7C00 //TX_LAMBDA_PFILT_S_3 343 0x7C00 //TX_LAMBDA_PFILT_S_4 344 0x7C00 //TX_LAMBDA_PFILT_S_5 345 0x7C00 //TX_LAMBDA_PFILT_S_6 @@ -23163,10 +35071,10 @@ 350 0x0600 //TX_A_PEPPER_HF 351 0x0001 //TX_HMNC_BST_FLG 352 0x0200 //TX_HMNC_BST_THR -353 0x0200 //TX_DT_BINVAD_TH_0 -354 0x0200 //TX_DT_BINVAD_TH_1 -355 0x0200 //TX_DT_BINVAD_TH_2 -356 0x0200 //TX_DT_BINVAD_TH_3 +353 0x0800 //TX_DT_BINVAD_TH_0 +354 0x0800 //TX_DT_BINVAD_TH_1 +355 0x0800 //TX_DT_BINVAD_TH_2 +356 0x0800 //TX_DT_BINVAD_TH_3 357 0x1D4C //TX_DT_BINVAD_ENDF 358 0x0800 //TX_C_POST_FLT_DT 359 0x0CCD //TX_NS_B_POST_FLT_LESSCUT @@ -23177,7 +35085,7 @@ 364 0x0000 //TX_K_APT 365 0x0001 //TX_NOISEDET 366 0x0064 //TX_NDETCT -367 0x0032 //TX_NOISE_TH_0 +367 0x0102 //TX_NOISE_TH_0 368 0x7FFF //TX_NOISE_TH_0_2 369 0x7FFF //TX_NOISE_TH_0_3 370 0x017E //TX_NOISE_TH_1 @@ -23189,11 +35097,11 @@ 376 0x0001 //TX_NOISE_TH_5_3 377 0x7FFF //TX_NOISE_TH_5_4 378 0x0F0A //TX_NOISE_TH_6 -379 0x0033 //TX_MINENOISE_TH -380 0x4000 //TX_MINENOISE_MIC0_TH_MTS -381 0xFFEE //TX_MINENOISE_MIC0_TH_EXP -382 0x6000 //TX_MINENOISE_MIC0_S_TH_MTS -383 0xFFF3 //TX_MINENOISE_MIC0_S_TH_EXP +379 0x00F8 //TX_MINENOISE_TH +380 0xD508 //TX_MORENS_TFMASK_TH +381 0x0001 //TX_DRC_QUIET_FLOOR +382 0x3A98 //TX_RATIODTL_CUT_TH +383 0x0DAC //TX_DT_CUT_K1 384 0x0666 //TX_OUT_ENER_S_TH_CLEAN 385 0x0666 //TX_OUT_ENER_S_TH_LESSCLEAN 386 0x0333 //TX_OUT_ENER_S_TH_NOISY @@ -23201,22 +35109,22 @@ 388 0x0333 //TX_OUT_ENER_TH_SPEECH 389 0x2000 //TX_SN_NPB_GAIN 390 0x0000 //TX_NN_NPB_GAIN -391 0x0000 //TX_CSX_ALPHA_0 -392 0x0000 //TX_CSX_ALPHA_1 -393 0x0000 //TX_CSX_ALPHA_2 -394 0x0000 //TX_CSX_ALPHA_3 -395 0x0800 //TX_MU_ARSP_EST -396 0x00C8 //TX_P_OUTBEAM_MIN_TH +391 0x7FFF //TX_POST_MASK_SUP_HSNE +392 0x1388 //TX_TAIL_DET_TH +393 0x4000 //TX_B_LESSCUT_RTO_WTA +394 0x0000 //TX_MEL_G_R +395 0x0080 //TX_SUPHIGH_TH +396 0x0000 //TX_MASK_G_R 397 0x0002 //TX_EXTRA_NS_L -398 0x0800 //TX_EXTRA_NS_A -399 0x0005 //TX_VR_NOISE_FLOOR_TH +398 0x1800 //TX_C_POST_FLT_MASK +399 0x7FFF //TX_A_POST_FLT_WNS 400 0x0148 //TX_MIN_G_LOW300HZ -401 0x0001 //TX_MAXLEVEL_CNG +401 0x0004 //TX_MAXLEVEL_CNG 402 0x00B4 //TX_STN_NOISE_TH 403 0x4000 //TX_POST_MASK_SUP 404 0x7FFF //TX_POST_MASK_ADJUST 405 0x00C8 //TX_NS_ENOISE_MIC0_TH -406 0x0033 //TX_MINENOISE_MIC0_TH +406 0x00DC //TX_MINENOISE_MIC0_TH 407 0x012C //TX_MINENOISE_MIC0_S_TH 408 0x7FFF //TX_MIN_G_CTRL_SSNS 409 0x0000 //TX_METAL_RTO_THR @@ -23324,16 +35232,16 @@ 511 0x6666 //TX_MIC_TO_BFGAIN 512 0x0000 //TX_MICTOBFGAIN0 513 0x0000 //TX_FASTMUE_TH -514 0x0000 //TX_DERVB_LEN_0 -515 0x0000 //TX_DERVB_LEN_1 -516 0x0000 //TX_RHO_DERVB -517 0x0000 //TX_MIC_INDX_DERVB -518 0x0000 //TX_MU_DERVB -519 0x0000 //TX_DR_RESRV_0 -520 0x0000 //TX_DR_RESRV_1 -521 0x0000 //TX_DR_RESRV_2 -522 0x0000 //TX_DR_RESRV_3 -523 0x0000 //TX_DR_RESRV_4 +514 0xC000 //TX_DEREVERB_LF_MU +515 0xC000 //TX_DEREVERB_HF_MU +516 0xCCCC //TX_DEREVERB_DELAY +517 0xD999 //TX_DEREVERB_COEF_LEN +518 0x1F40 //TX_DEREVERB_DNR +519 0x0000 //TX_DEREVERB_ALPHA +520 0x0000 //TX_DEREVERB_BETA +521 0x0000 //TX_GSC_RTOL_TH +522 0x7000 //TX_GSC_RTOH_TH +523 0x0064 //TX_WIDE2_MEANHTH 524 0x0000 //TX_DR_RESRV_5 525 0x0000 //TX_DR_RESRV_6 526 0x0000 //TX_DR_RESRV_7 @@ -23376,19 +35284,19 @@ 563 0x0000 //TX_SAM_MARK 564 0x0000 //TX_PB_RESRV_0 565 0x0000 //TX_PB_RESRV_1 -566 0x001C //TX_FDEQ_SUBNUM -567 0x5050 //TX_FDEQ_GAIN_0 -568 0x5048 //TX_FDEQ_GAIN_1 +566 0x0020 //TX_FDEQ_SUBNUM +567 0x5454 //TX_FDEQ_GAIN_0 +568 0x5448 //TX_FDEQ_GAIN_1 569 0x4848 //TX_FDEQ_GAIN_2 570 0x4848 //TX_FDEQ_GAIN_3 571 0x4848 //TX_FDEQ_GAIN_4 572 0x4850 //TX_FDEQ_GAIN_5 573 0x5050 //TX_FDEQ_GAIN_6 -574 0x5048 //TX_FDEQ_GAIN_7 -575 0x4848 //TX_FDEQ_GAIN_8 -576 0x4844 //TX_FDEQ_GAIN_9 -577 0x3C36 //TX_FDEQ_GAIN_10 -578 0x3A3A //TX_FDEQ_GAIN_11 +574 0x5448 //TX_FDEQ_GAIN_7 +575 0x464C //TX_FDEQ_GAIN_8 +576 0x5050 //TX_FDEQ_GAIN_9 +577 0x4848 //TX_FDEQ_GAIN_10 +578 0x4848 //TX_FDEQ_GAIN_11 579 0x4848 //TX_FDEQ_GAIN_12 580 0x4848 //TX_FDEQ_GAIN_13 581 0x4848 //TX_FDEQ_GAIN_14 @@ -23411,10 +35319,10 @@ 598 0x090A //TX_FDEQ_BIN_7 599 0x0B0C //TX_FDEQ_BIN_8 600 0x0D0E //TX_FDEQ_BIN_9 -601 0x0E0F //TX_FDEQ_BIN_10 -602 0x0F10 //TX_FDEQ_BIN_11 -603 0x1011 //TX_FDEQ_BIN_12 -604 0x1104 //TX_FDEQ_BIN_13 +601 0x0F10 //TX_FDEQ_BIN_10 +602 0x1011 //TX_FDEQ_BIN_11 +603 0x1112 //TX_FDEQ_BIN_12 +604 0x120B //TX_FDEQ_BIN_13 605 0x0000 //TX_FDEQ_BIN_14 606 0x0000 //TX_FDEQ_BIN_15 607 0x0000 //TX_FDEQ_BIN_16 @@ -23434,13 +35342,13 @@ 621 0x4848 //TX_PREEQ_GAIN_MIC0_4 622 0x4848 //TX_PREEQ_GAIN_MIC0_5 623 0x4848 //TX_PREEQ_GAIN_MIC0_6 -624 0x484A //TX_PREEQ_GAIN_MIC0_7 -625 0x4C4E //TX_PREEQ_GAIN_MIC0_8 -626 0x5054 //TX_PREEQ_GAIN_MIC0_9 -627 0x5658 //TX_PREEQ_GAIN_MIC0_10 -628 0x5C5C //TX_PREEQ_GAIN_MIC0_11 -629 0x5E64 //TX_PREEQ_GAIN_MIC0_12 -630 0x6464 //TX_PREEQ_GAIN_MIC0_13 +624 0x4848 //TX_PREEQ_GAIN_MIC0_7 +625 0x484A //TX_PREEQ_GAIN_MIC0_8 +626 0x4B4C //TX_PREEQ_GAIN_MIC0_9 +627 0x4B4A //TX_PREEQ_GAIN_MIC0_10 +628 0x4A48 //TX_PREEQ_GAIN_MIC0_11 +629 0x4C4C //TX_PREEQ_GAIN_MIC0_12 +630 0x4C4C //TX_PREEQ_GAIN_MIC0_13 631 0x4848 //TX_PREEQ_GAIN_MIC0_14 632 0x4848 //TX_PREEQ_GAIN_MIC0_15 633 0x4848 //TX_PREEQ_GAIN_MIC0_16 @@ -23463,8 +35371,8 @@ 650 0x0D0E //TX_PREEQ_BIN_MIC0_9 651 0x0F10 //TX_PREEQ_BIN_MIC0_10 652 0x1011 //TX_PREEQ_BIN_MIC0_11 -653 0x1104 //TX_PREEQ_BIN_MIC0_12 -654 0x1010 //TX_PREEQ_BIN_MIC0_13 +653 0x1112 //TX_PREEQ_BIN_MIC0_12 +654 0x120B //TX_PREEQ_BIN_MIC0_13 655 0x0000 //TX_PREEQ_BIN_MIC0_14 656 0x0000 //TX_PREEQ_BIN_MIC0_15 657 0x0000 //TX_PREEQ_BIN_MIC0_16 @@ -23483,12 +35391,12 @@ 670 0x4848 //TX_PREEQ_GAIN_MIC1_4 671 0x4848 //TX_PREEQ_GAIN_MIC1_5 672 0x4848 //TX_PREEQ_GAIN_MIC1_6 -673 0x4848 //TX_PREEQ_GAIN_MIC1_7 -674 0x4848 //TX_PREEQ_GAIN_MIC1_8 -675 0x4848 //TX_PREEQ_GAIN_MIC1_9 -676 0x4848 //TX_PREEQ_GAIN_MIC1_10 -677 0x4848 //TX_PREEQ_GAIN_MIC1_11 -678 0x4848 //TX_PREEQ_GAIN_MIC1_12 +673 0x4846 //TX_PREEQ_GAIN_MIC1_7 +674 0x4544 //TX_PREEQ_GAIN_MIC1_8 +675 0x4241 //TX_PREEQ_GAIN_MIC1_9 +676 0x403E //TX_PREEQ_GAIN_MIC1_10 +677 0x3D3C //TX_PREEQ_GAIN_MIC1_11 +678 0x3C3C //TX_PREEQ_GAIN_MIC1_12 679 0x4848 //TX_PREEQ_GAIN_MIC1_13 680 0x4848 //TX_PREEQ_GAIN_MIC1_14 681 0x4848 //TX_PREEQ_GAIN_MIC1_15 @@ -23500,19 +35408,19 @@ 687 0x4848 //TX_PREEQ_GAIN_MIC1_21 688 0x4848 //TX_PREEQ_GAIN_MIC1_22 689 0x4848 //TX_PREEQ_GAIN_MIC1_23 -690 0x251A //TX_PREEQ_BIN_MIC1_0 -691 0x0F0F //TX_PREEQ_BIN_MIC1_1 -692 0x0C0C //TX_PREEQ_BIN_MIC1_2 -693 0x0C0F //TX_PREEQ_BIN_MIC1_3 -694 0x0F0F //TX_PREEQ_BIN_MIC1_4 -695 0x0F09 //TX_PREEQ_BIN_MIC1_5 -696 0x0909 //TX_PREEQ_BIN_MIC1_6 -697 0x0908 //TX_PREEQ_BIN_MIC1_7 -698 0x0700 //TX_PREEQ_BIN_MIC1_8 -699 0x0000 //TX_PREEQ_BIN_MIC1_9 -700 0x0000 //TX_PREEQ_BIN_MIC1_10 -701 0x0000 //TX_PREEQ_BIN_MIC1_11 -702 0x0000 //TX_PREEQ_BIN_MIC1_12 +690 0x0202 //TX_PREEQ_BIN_MIC1_0 +691 0x0203 //TX_PREEQ_BIN_MIC1_1 +692 0x0303 //TX_PREEQ_BIN_MIC1_2 +693 0x0304 //TX_PREEQ_BIN_MIC1_3 +694 0x0405 //TX_PREEQ_BIN_MIC1_4 +695 0x0506 //TX_PREEQ_BIN_MIC1_5 +696 0x0708 //TX_PREEQ_BIN_MIC1_6 +697 0x090A //TX_PREEQ_BIN_MIC1_7 +698 0x0B0C //TX_PREEQ_BIN_MIC1_8 +699 0x0F10 //TX_PREEQ_BIN_MIC1_9 +700 0x1011 //TX_PREEQ_BIN_MIC1_10 +701 0x1112 //TX_PREEQ_BIN_MIC1_11 +702 0x1208 //TX_PREEQ_BIN_MIC1_12 703 0x0000 //TX_PREEQ_BIN_MIC1_13 704 0x0000 //TX_PREEQ_BIN_MIC1_14 705 0x0000 //TX_PREEQ_BIN_MIC1_15 @@ -23601,7 +35509,7 @@ 788 0x7EB8 //TX_TDDRC_ALPHA_DWN_02 789 0x7EB8 //TX_TDDRC_ALPHA_DWN_03 790 0x7EB8 //TX_TDDRC_ALPHA_DWN_04 -791 0x7FFF //TX_TDDRC_TD_DRC_LIMIT +791 0x7214 //TX_TDDRC_TD_DRC_LIMIT 792 0x0800 //TX_TDDRC_POST_LIMIT_GAIN 793 0x0000 //TX_TDDRC_RESRV_0 794 0x0000 //TX_TDDRC_RESRV_1 @@ -23668,15 +35576,15 @@ 855 0x0002 //TX_TDDRC_THRD_1 856 0x1800 //TX_TDDRC_THRD_2 857 0x1800 //TX_TDDRC_THRD_3 -858 0x6000 //TX_TDDRC_SLANT_0 -859 0x6000 //TX_TDDRC_SLANT_1 +858 0x7FFF //TX_TDDRC_SLANT_0 +859 0x7FFF //TX_TDDRC_SLANT_1 860 0x0800 //TX_TDDRC_ALPHA_UP_00 861 0x7EB8 //TX_TDDRC_ALPHA_DWN_00 862 0x0000 //TX_TDDRC_HMNC_FLAG 863 0x199A //TX_TDDRC_HMNC_GAIN 864 0x0000 //TX_TDDRC_SMT_FLAG 865 0x0CCD //TX_TDDRC_SMT_W -866 0x0BE3 //TX_TDDRC_DRC_GAIN +866 0x0C97 //TX_TDDRC_DRC_GAIN 867 0x7FFF //TX_TDDRC_LMT_THRD 868 0x0000 //TX_TDDRC_LMT_ALPHA 869 0x0000 //TX_TFMASKLTH @@ -23701,14 +35609,79 @@ 888 0x0028 //TX_FASTNS_ARSPC_TH 889 0xC000 //TX_FASTNS_MASK5_TH 890 0x4848 //TX_POSTSSA_MIN_G_VR_MASK -891 0x1000 //TX_A_LESSCUT_RTO_MASK +891 0x4000 //TX_A_LESSCUT_RTO_MASK 892 0x1770 //TX_FASTNS_NOISETH 893 0xC000 //TX_FASTNS_SSA_THLFL 894 0xC000 //TX_FASTNS_SSA_THHFL 895 0xCCCC //TX_FASTNS_SSA_THLFH 896 0xD999 //TX_FASTNS_SSA_THHFH +897 0x2339 //TX_SENDFUNC_REG_MICMUTE +898 0x0021 //TX_SENDFUNC_REG_MICMUTE1 +899 0x02BC //TX_MICMUTE_RATIO_THR +900 0x0140 //TX_MICMUTE_AMP_THR +901 0x0004 //TX_MICMUTE_HPF_IND +902 0x00C0 //TX_MICMUTE_LOG_EYR_TH +903 0x0008 //TX_MICMUTE_CVG_TIME +904 0x0008 //TX_MICMUTE_RELEASE_TIME +905 0x01FE //TX_MIC_VOLUME_MIC0MUTE +906 0x0020 //TX_MICMUTE_EPD_OFFSET_0 +907 0x001E //TX_MICMUTE_FRQ_AEC_L +908 0x7999 //TX_MICMUTE_EAD_THR +909 0x7FFF //TX_MICMUTE_LAMBDA_CB_NLE +910 0x7FFF //TX_MICMUTE_LAMBDA_RE_EST +911 0x4000 //TX_DTD_THR1_MICMUTE_0 +912 0x7000 //TX_DTD_THR1_MICMUTE_1 +913 0x7FFF //TX_DTD_THR1_MICMUTE_2 +914 0x7FFF //TX_DTD_THR1_MICMUTE_3 +915 0x6CCC //TX_DTD_THR2_MICMUTE_0 +916 0x0400 //TX_MICMUTE_MIN_EQ_RE_EST_0 +917 0x0400 //TX_MICMUTE_MIN_EQ_RE_EST_1 +918 0x1000 //TX_MICMUTE_MIN_EQ_RE_EST_2 +919 0x7FFF //TX_MICMUTE_MIN_EQ_RE_EST_3 +920 0x7FFF //TX_MICMUTE_MIN_EQ_RE_EST_4 +921 0x4000 //TX_MICMUTE_C_POST_FLT +922 0x03E8 //TX_MICMUTE_DT_CUT_K +923 0x0001 //TX_MICMUTE_DT_CUT_THR +924 0x03E8 //TX_MICMUTE_DT_CUT_K2 +925 0x0001 //TX_MICMUTE_DT_CUT_THR2 +926 0x0064 //TX_MICMUTE_DT2_HOLD_N +927 0x1000 //TX_MICMUTE_RATIODTH_THCUT +928 0x1000 //TX_MICMUTE_B_POST_FLT_ECHOL +929 0x7FFF //TX_MICMUTE_B_POST_FLT_ECHOH +930 0x0400 //TX_MICMUTE_C_POST_FLT_MASK +931 0x7999 //TX_MICMUTE_RATIODTL_CUT_TH +932 0x0258 //TX_MICMUTE_DT_CUT_K1 +933 0x0800 //TX_MICMUTE_N2_SN_EST +934 0xFC00 //TX_MICMUTE_THR_SN_EST_0 +935 0x001C //TX_MICMUTE_MIN_G_CTRL_0 +936 0x6000 //TX_MICMUTE_A_POST_FILT_S_0 +937 0x7000 //TX_MICMUTE_B_POST_FILT_0 +938 0x2710 //TX_MIC1RUB_AMP_THR +939 0x0010 //TX_MIC1MUTE_RATIO_THR +940 0x0450 //TX_MIC1MUTE_AMP_THR +941 0x0008 //TX_MIC1MUTE_CVG_TIME +942 0x0008 //TX_MIC1MUTE_RELEASE_TIME +943 0x0000 //TX_AMS_RESRV_01 +944 0x0000 //TX_AMS_RESRV_02 +945 0x0000 //TX_AMS_RESRV_03 +946 0x0000 //TX_AMS_RESRV_04 +947 0x0000 //TX_AMS_RESRV_05 +948 0x0000 //TX_AMS_RESRV_06 +949 0x0000 //TX_AMS_RESRV_07 +950 0x0000 //TX_AMS_RESRV_08 +951 0x0000 //TX_AMS_RESRV_09 +952 0x0000 //TX_AMS_RESRV_10 +953 0x0000 //TX_AMS_RESRV_11 +954 0x0000 //TX_AMS_RESRV_12 +955 0x0000 //TX_AMS_RESRV_13 +956 0x0000 //TX_AMS_RESRV_14 +957 0x0000 //TX_AMS_RESRV_15 +958 0x0000 //TX_AMS_RESRV_16 +959 0x0000 //TX_AMS_RESRV_17 +960 0x0000 //TX_AMS_RESRV_18 +961 0x0000 //TX_AMS_RESRV_19 #RX -0 0x002C //RX_RECVFUNC_MODE_0 +0 0x202C //RX_RECVFUNC_MODE_0 1 0x0000 //RX_RECVFUNC_MODE_1 2 0x0001 //RX_SAMPLINGFREQ_SIG 3 0x0001 //RX_SAMPLINGFREQ_PROC @@ -24558,18 +36531,869 @@ 110 0x0000 //RX_FDDRC_RESRV_0 129 0x0100 //RX_SPK_VOL 130 0x0000 //RX_VOL_RESRV_0 +#RX 2 +157 0x202C //RX_RECVFUNC_MODE_0 +158 0x0000 //RX_RECVFUNC_MODE_1 +159 0x0001 //RX_SAMPLINGFREQ_SIG +160 0x0001 //RX_SAMPLINGFREQ_PROC +161 0x000A //RX_FRAME_SZ +162 0x0000 //RX_DELAY_OPT +163 0x3000 //RX_TDDRC_ALPHA_UP_1 +164 0x3000 //RX_TDDRC_ALPHA_UP_2 +165 0x3000 //RX_TDDRC_ALPHA_UP_3 +166 0x3000 //RX_TDDRC_ALPHA_UP_4 +167 0x0800 //RX_PGA +168 0x7FFF //RX_A_HP +169 0x4000 //RX_B_PE +170 0x3800 //RX_THR_PITCH_DET_0 +171 0x3000 //RX_THR_PITCH_DET_1 +172 0x2800 //RX_THR_PITCH_DET_2 +173 0x0008 //RX_PITCH_BFR_LEN +174 0x0003 //RX_SBD_PITCH_DET +175 0x0100 //RX_PP_RESRV_0 +176 0x0020 //RX_PP_RESRV_1 +177 0x0600 //RX_N_SN_EST +178 0x000C //RX_N2_SN_EST +179 0x0010 //RX_NS_LVL_CTRL +180 0xF800 //RX_THR_SN_EST +181 0x7CCD //RX_LAMBDA_PFILT +182 0x000A //RX_FENS_RESRV_0 +183 0x0190 //RX_FENS_RESRV_1 +184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +187 0x0002 //RX_EXTRA_NS_L +188 0x0800 //RX_EXTRA_NS_A +189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +190 0x7FFF //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +192 0x199A //RX_A_POST_FLT +193 0x0000 //RX_LMT_THRD +194 0x4000 //RX_LMT_ALPHA +195 0x001C //RX_FDEQ_SUBNUM +196 0x4848 //RX_FDEQ_GAIN_0 +197 0x4848 //RX_FDEQ_GAIN_1 +198 0x4848 //RX_FDEQ_GAIN_2 +199 0x4848 //RX_FDEQ_GAIN_3 +200 0x4848 //RX_FDEQ_GAIN_4 +201 0x4848 //RX_FDEQ_GAIN_5 +202 0x4848 //RX_FDEQ_GAIN_6 +203 0x4848 //RX_FDEQ_GAIN_7 +204 0x4848 //RX_FDEQ_GAIN_8 +205 0x4848 //RX_FDEQ_GAIN_9 +206 0x4848 //RX_FDEQ_GAIN_10 +207 0x4848 //RX_FDEQ_GAIN_11 +208 0x4848 //RX_FDEQ_GAIN_12 +209 0x4848 //RX_FDEQ_GAIN_13 +210 0x4848 //RX_FDEQ_GAIN_14 +211 0x4848 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0202 //RX_FDEQ_BIN_0 +221 0x0203 //RX_FDEQ_BIN_1 +222 0x0303 //RX_FDEQ_BIN_2 +223 0x0304 //RX_FDEQ_BIN_3 +224 0x0405 //RX_FDEQ_BIN_4 +225 0x0506 //RX_FDEQ_BIN_5 +226 0x0708 //RX_FDEQ_BIN_6 +227 0x090A //RX_FDEQ_BIN_7 +228 0x0B0C //RX_FDEQ_BIN_8 +229 0x0D0E //RX_FDEQ_BIN_9 +230 0x0E0F //RX_FDEQ_BIN_10 +231 0x0F10 //RX_FDEQ_BIN_11 +232 0x1011 //RX_FDEQ_BIN_12 +233 0x1104 //RX_FDEQ_BIN_13 +234 0x0000 //RX_FDEQ_BIN_14 +235 0x0000 //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x4000 //RX_FDEQ_RESRV_0 +245 0x0320 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0030 //RX_FDDRC_BAND_MARGIN_1 +248 0x0050 //RX_FDDRC_BAND_MARGIN_2 +249 0x0080 //RX_FDDRC_BAND_MARGIN_3 +250 0x0007 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x5000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x6400 //RX_FDDRC_THRD_3_2 +258 0x6400 //RX_FDDRC_THRD_3_3 +259 0x2000 //RX_FDDRC_SLANT_0_0 +260 0x2000 //RX_FDDRC_SLANT_0_1 +261 0x2000 //RX_FDDRC_SLANT_0_2 +262 0x2000 //RX_FDDRC_SLANT_0_3 +263 0x5333 //RX_FDDRC_SLANT_1_0 +264 0x5333 //RX_FDDRC_SLANT_1_1 +265 0x5333 //RX_FDDRC_SLANT_1_2 +266 0x5333 //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +268 0x0002 //RX_FILTINDX +269 0x0000 //RX_TDDRC_THRD_0 +270 0x0000 //RX_TDDRC_THRD_1 +271 0x2000 //RX_TDDRC_THRD_2 +272 0x3000 //RX_TDDRC_THRD_3 +273 0x0800 //RX_TDDRC_SLANT_0 +274 0x7EB8 //RX_TDDRC_SLANT_1 +275 0x3000 //RX_TDDRC_ALPHA_UP_0 +276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x199A //RX_TDDRC_HMNC_GAIN +279 0x0001 //RX_TDDRC_SMT_FLAG +280 0x0CCD //RX_TDDRC_SMT_W +281 0x0196 //RX_TDDRC_DRC_GAIN +282 0x7C00 //RX_LAMBDA_PKA_FP +283 0x2000 //RX_TPKA_FP +284 0x2000 //RX_MIN_G_FP +285 0x0080 //RX_MAX_G_FP +286 0x000B //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 +288 0x0000 //RX_MAXLEVEL_CNG +289 0x3000 //RX_BWE_UV_TH +290 0x3000 //RX_BWE_UV_TH2 +291 0x1800 //RX_BWE_UV_TH3 +292 0x1000 //RX_BWE_V_TH +293 0x04CD //RX_BWE_GAIN1_V_TH1 +294 0x0F33 //RX_BWE_GAIN1_V_TH2 +295 0x7333 //RX_BWE_UV_EQ +296 0x199A //RX_BWE_V_EQ +297 0x7333 //RX_BWE_TONE_TH +298 0x0004 //RX_BWE_UV_HOLD_T +299 0x6CCD //RX_BWE_GAIN2_ALPHA +300 0x799A //RX_BWE_GAIN3_ALPHA +301 0x001E //RX_BWE_CUTOFF +302 0x3000 //RX_BWE_GAINFILL +303 0x3200 //RX_BWE_MAXTH_TONE +304 0x2000 //RX_BWE_EQ_0 +305 0x2000 //RX_BWE_EQ_1 +306 0x2000 //RX_BWE_EQ_2 +307 0x2000 //RX_BWE_EQ_3 +308 0x2000 //RX_BWE_EQ_4 +309 0x2000 //RX_BWE_EQ_5 +310 0x2000 //RX_BWE_EQ_6 +311 0x0000 //RX_BWE_RESRV_0 +312 0x0000 //RX_BWE_RESRV_1 +313 0x0000 //RX_BWE_RESRV_2 +#VOL 0 +163 0x3000 //RX_TDDRC_ALPHA_UP_1 +164 0x3000 //RX_TDDRC_ALPHA_UP_2 +165 0x3000 //RX_TDDRC_ALPHA_UP_3 +166 0x3000 //RX_TDDRC_ALPHA_UP_4 +184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +190 0x7FFF //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +269 0x0000 //RX_TDDRC_THRD_0 +270 0x0000 //RX_TDDRC_THRD_1 +271 0x2000 //RX_TDDRC_THRD_2 +272 0x3000 //RX_TDDRC_THRD_3 +273 0x0800 //RX_TDDRC_SLANT_0 +274 0x7EB8 //RX_TDDRC_SLANT_1 +275 0x3000 //RX_TDDRC_ALPHA_UP_0 +276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x199A //RX_TDDRC_HMNC_GAIN +279 0x0001 //RX_TDDRC_SMT_FLAG +280 0x0CCD //RX_TDDRC_SMT_W +281 0x0196 //RX_TDDRC_DRC_GAIN +195 0x001C //RX_FDEQ_SUBNUM +196 0x4848 //RX_FDEQ_GAIN_0 +197 0x4848 //RX_FDEQ_GAIN_1 +198 0x4848 //RX_FDEQ_GAIN_2 +199 0x4848 //RX_FDEQ_GAIN_3 +200 0x4848 //RX_FDEQ_GAIN_4 +201 0x4848 //RX_FDEQ_GAIN_5 +202 0x4848 //RX_FDEQ_GAIN_6 +203 0x4848 //RX_FDEQ_GAIN_7 +204 0x4848 //RX_FDEQ_GAIN_8 +205 0x4848 //RX_FDEQ_GAIN_9 +206 0x4848 //RX_FDEQ_GAIN_10 +207 0x4848 //RX_FDEQ_GAIN_11 +208 0x4848 //RX_FDEQ_GAIN_12 +209 0x4848 //RX_FDEQ_GAIN_13 +210 0x4848 //RX_FDEQ_GAIN_14 +211 0x4848 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0202 //RX_FDEQ_BIN_0 +221 0x0203 //RX_FDEQ_BIN_1 +222 0x0303 //RX_FDEQ_BIN_2 +223 0x0304 //RX_FDEQ_BIN_3 +224 0x0405 //RX_FDEQ_BIN_4 +225 0x0506 //RX_FDEQ_BIN_5 +226 0x0708 //RX_FDEQ_BIN_6 +227 0x090A //RX_FDEQ_BIN_7 +228 0x0B0C //RX_FDEQ_BIN_8 +229 0x0D0E //RX_FDEQ_BIN_9 +230 0x0E0F //RX_FDEQ_BIN_10 +231 0x0F10 //RX_FDEQ_BIN_11 +232 0x1011 //RX_FDEQ_BIN_12 +233 0x1104 //RX_FDEQ_BIN_13 +234 0x0000 //RX_FDEQ_BIN_14 +235 0x0000 //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x4000 //RX_FDEQ_RESRV_0 +245 0x0320 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0030 //RX_FDDRC_BAND_MARGIN_1 +248 0x0050 //RX_FDDRC_BAND_MARGIN_2 +249 0x0080 //RX_FDDRC_BAND_MARGIN_3 +250 0x0007 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x5000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x6400 //RX_FDDRC_THRD_3_2 +258 0x6400 //RX_FDDRC_THRD_3_3 +259 0x2000 //RX_FDDRC_SLANT_0_0 +260 0x2000 //RX_FDDRC_SLANT_0_1 +261 0x2000 //RX_FDDRC_SLANT_0_2 +262 0x2000 //RX_FDDRC_SLANT_0_3 +263 0x5333 //RX_FDDRC_SLANT_1_0 +264 0x5333 //RX_FDDRC_SLANT_1_1 +265 0x5333 //RX_FDDRC_SLANT_1_2 +266 0x5333 //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +286 0x000B //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 +#VOL 1 +163 0x3000 //RX_TDDRC_ALPHA_UP_1 +164 0x3000 //RX_TDDRC_ALPHA_UP_2 +165 0x3000 //RX_TDDRC_ALPHA_UP_3 +166 0x3000 //RX_TDDRC_ALPHA_UP_4 +184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +190 0x7FFF //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +269 0x0000 //RX_TDDRC_THRD_0 +270 0x0000 //RX_TDDRC_THRD_1 +271 0x2000 //RX_TDDRC_THRD_2 +272 0x3000 //RX_TDDRC_THRD_3 +273 0x0800 //RX_TDDRC_SLANT_0 +274 0x7EB8 //RX_TDDRC_SLANT_1 +275 0x3000 //RX_TDDRC_ALPHA_UP_0 +276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x199A //RX_TDDRC_HMNC_GAIN +279 0x0001 //RX_TDDRC_SMT_FLAG +280 0x0CCD //RX_TDDRC_SMT_W +281 0x0196 //RX_TDDRC_DRC_GAIN +195 0x001C //RX_FDEQ_SUBNUM +196 0x4848 //RX_FDEQ_GAIN_0 +197 0x4848 //RX_FDEQ_GAIN_1 +198 0x4848 //RX_FDEQ_GAIN_2 +199 0x4848 //RX_FDEQ_GAIN_3 +200 0x4848 //RX_FDEQ_GAIN_4 +201 0x4848 //RX_FDEQ_GAIN_5 +202 0x4848 //RX_FDEQ_GAIN_6 +203 0x4848 //RX_FDEQ_GAIN_7 +204 0x4848 //RX_FDEQ_GAIN_8 +205 0x4848 //RX_FDEQ_GAIN_9 +206 0x4848 //RX_FDEQ_GAIN_10 +207 0x4848 //RX_FDEQ_GAIN_11 +208 0x4848 //RX_FDEQ_GAIN_12 +209 0x4848 //RX_FDEQ_GAIN_13 +210 0x4848 //RX_FDEQ_GAIN_14 +211 0x4848 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0202 //RX_FDEQ_BIN_0 +221 0x0203 //RX_FDEQ_BIN_1 +222 0x0303 //RX_FDEQ_BIN_2 +223 0x0304 //RX_FDEQ_BIN_3 +224 0x0405 //RX_FDEQ_BIN_4 +225 0x0506 //RX_FDEQ_BIN_5 +226 0x0708 //RX_FDEQ_BIN_6 +227 0x090A //RX_FDEQ_BIN_7 +228 0x0B0C //RX_FDEQ_BIN_8 +229 0x0D0E //RX_FDEQ_BIN_9 +230 0x0E0F //RX_FDEQ_BIN_10 +231 0x0F10 //RX_FDEQ_BIN_11 +232 0x1011 //RX_FDEQ_BIN_12 +233 0x1104 //RX_FDEQ_BIN_13 +234 0x0000 //RX_FDEQ_BIN_14 +235 0x0000 //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x4000 //RX_FDEQ_RESRV_0 +245 0x0320 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0030 //RX_FDDRC_BAND_MARGIN_1 +248 0x0050 //RX_FDDRC_BAND_MARGIN_2 +249 0x0080 //RX_FDDRC_BAND_MARGIN_3 +250 0x0007 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x5000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x6400 //RX_FDDRC_THRD_3_2 +258 0x6400 //RX_FDDRC_THRD_3_3 +259 0x2000 //RX_FDDRC_SLANT_0_0 +260 0x2000 //RX_FDDRC_SLANT_0_1 +261 0x2000 //RX_FDDRC_SLANT_0_2 +262 0x2000 //RX_FDDRC_SLANT_0_3 +263 0x5333 //RX_FDDRC_SLANT_1_0 +264 0x5333 //RX_FDDRC_SLANT_1_1 +265 0x5333 //RX_FDDRC_SLANT_1_2 +266 0x5333 //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +286 0x0013 //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 +#VOL 2 +163 0x3000 //RX_TDDRC_ALPHA_UP_1 +164 0x3000 //RX_TDDRC_ALPHA_UP_2 +165 0x3000 //RX_TDDRC_ALPHA_UP_3 +166 0x3000 //RX_TDDRC_ALPHA_UP_4 +184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +190 0x7FFF //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +269 0x0000 //RX_TDDRC_THRD_0 +270 0x0000 //RX_TDDRC_THRD_1 +271 0x2000 //RX_TDDRC_THRD_2 +272 0x3000 //RX_TDDRC_THRD_3 +273 0x0800 //RX_TDDRC_SLANT_0 +274 0x7EB8 //RX_TDDRC_SLANT_1 +275 0x3000 //RX_TDDRC_ALPHA_UP_0 +276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x199A //RX_TDDRC_HMNC_GAIN +279 0x0001 //RX_TDDRC_SMT_FLAG +280 0x0CCD //RX_TDDRC_SMT_W +281 0x0196 //RX_TDDRC_DRC_GAIN +195 0x001C //RX_FDEQ_SUBNUM +196 0x4848 //RX_FDEQ_GAIN_0 +197 0x4848 //RX_FDEQ_GAIN_1 +198 0x4848 //RX_FDEQ_GAIN_2 +199 0x4848 //RX_FDEQ_GAIN_3 +200 0x4848 //RX_FDEQ_GAIN_4 +201 0x4848 //RX_FDEQ_GAIN_5 +202 0x4848 //RX_FDEQ_GAIN_6 +203 0x4848 //RX_FDEQ_GAIN_7 +204 0x4848 //RX_FDEQ_GAIN_8 +205 0x4848 //RX_FDEQ_GAIN_9 +206 0x4848 //RX_FDEQ_GAIN_10 +207 0x4848 //RX_FDEQ_GAIN_11 +208 0x4848 //RX_FDEQ_GAIN_12 +209 0x4848 //RX_FDEQ_GAIN_13 +210 0x4848 //RX_FDEQ_GAIN_14 +211 0x4848 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0202 //RX_FDEQ_BIN_0 +221 0x0203 //RX_FDEQ_BIN_1 +222 0x0303 //RX_FDEQ_BIN_2 +223 0x0304 //RX_FDEQ_BIN_3 +224 0x0405 //RX_FDEQ_BIN_4 +225 0x0506 //RX_FDEQ_BIN_5 +226 0x0708 //RX_FDEQ_BIN_6 +227 0x090A //RX_FDEQ_BIN_7 +228 0x0B0C //RX_FDEQ_BIN_8 +229 0x0D0E //RX_FDEQ_BIN_9 +230 0x0E0F //RX_FDEQ_BIN_10 +231 0x0F10 //RX_FDEQ_BIN_11 +232 0x1011 //RX_FDEQ_BIN_12 +233 0x1104 //RX_FDEQ_BIN_13 +234 0x0000 //RX_FDEQ_BIN_14 +235 0x0000 //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x4000 //RX_FDEQ_RESRV_0 +245 0x0320 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0030 //RX_FDDRC_BAND_MARGIN_1 +248 0x0050 //RX_FDDRC_BAND_MARGIN_2 +249 0x0080 //RX_FDDRC_BAND_MARGIN_3 +250 0x0007 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x5000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x6400 //RX_FDDRC_THRD_3_2 +258 0x6400 //RX_FDDRC_THRD_3_3 +259 0x2000 //RX_FDDRC_SLANT_0_0 +260 0x2000 //RX_FDDRC_SLANT_0_1 +261 0x2000 //RX_FDDRC_SLANT_0_2 +262 0x2000 //RX_FDDRC_SLANT_0_3 +263 0x5333 //RX_FDDRC_SLANT_1_0 +264 0x5333 //RX_FDDRC_SLANT_1_1 +265 0x5333 //RX_FDDRC_SLANT_1_2 +266 0x5333 //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +286 0x0020 //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 +#VOL 3 +163 0x3000 //RX_TDDRC_ALPHA_UP_1 +164 0x3000 //RX_TDDRC_ALPHA_UP_2 +165 0x3000 //RX_TDDRC_ALPHA_UP_3 +166 0x3000 //RX_TDDRC_ALPHA_UP_4 +184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +190 0x7FFF //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +269 0x0000 //RX_TDDRC_THRD_0 +270 0x0000 //RX_TDDRC_THRD_1 +271 0x2000 //RX_TDDRC_THRD_2 +272 0x3000 //RX_TDDRC_THRD_3 +273 0x0800 //RX_TDDRC_SLANT_0 +274 0x7EB8 //RX_TDDRC_SLANT_1 +275 0x3000 //RX_TDDRC_ALPHA_UP_0 +276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x199A //RX_TDDRC_HMNC_GAIN +279 0x0001 //RX_TDDRC_SMT_FLAG +280 0x0CCD //RX_TDDRC_SMT_W +281 0x0196 //RX_TDDRC_DRC_GAIN +195 0x001C //RX_FDEQ_SUBNUM +196 0x4848 //RX_FDEQ_GAIN_0 +197 0x4848 //RX_FDEQ_GAIN_1 +198 0x4848 //RX_FDEQ_GAIN_2 +199 0x4848 //RX_FDEQ_GAIN_3 +200 0x4848 //RX_FDEQ_GAIN_4 +201 0x4848 //RX_FDEQ_GAIN_5 +202 0x4848 //RX_FDEQ_GAIN_6 +203 0x4848 //RX_FDEQ_GAIN_7 +204 0x4848 //RX_FDEQ_GAIN_8 +205 0x4848 //RX_FDEQ_GAIN_9 +206 0x4848 //RX_FDEQ_GAIN_10 +207 0x4848 //RX_FDEQ_GAIN_11 +208 0x4848 //RX_FDEQ_GAIN_12 +209 0x4848 //RX_FDEQ_GAIN_13 +210 0x4848 //RX_FDEQ_GAIN_14 +211 0x4848 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0202 //RX_FDEQ_BIN_0 +221 0x0203 //RX_FDEQ_BIN_1 +222 0x0303 //RX_FDEQ_BIN_2 +223 0x0304 //RX_FDEQ_BIN_3 +224 0x0405 //RX_FDEQ_BIN_4 +225 0x0506 //RX_FDEQ_BIN_5 +226 0x0708 //RX_FDEQ_BIN_6 +227 0x090A //RX_FDEQ_BIN_7 +228 0x0B0C //RX_FDEQ_BIN_8 +229 0x0D0E //RX_FDEQ_BIN_9 +230 0x0E0F //RX_FDEQ_BIN_10 +231 0x0F10 //RX_FDEQ_BIN_11 +232 0x1011 //RX_FDEQ_BIN_12 +233 0x1104 //RX_FDEQ_BIN_13 +234 0x0000 //RX_FDEQ_BIN_14 +235 0x0000 //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x4000 //RX_FDEQ_RESRV_0 +245 0x0320 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0030 //RX_FDDRC_BAND_MARGIN_1 +248 0x0050 //RX_FDDRC_BAND_MARGIN_2 +249 0x0080 //RX_FDDRC_BAND_MARGIN_3 +250 0x0007 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x5000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x6400 //RX_FDDRC_THRD_3_2 +258 0x6400 //RX_FDDRC_THRD_3_3 +259 0x2000 //RX_FDDRC_SLANT_0_0 +260 0x2000 //RX_FDDRC_SLANT_0_1 +261 0x2000 //RX_FDDRC_SLANT_0_2 +262 0x2000 //RX_FDDRC_SLANT_0_3 +263 0x5333 //RX_FDDRC_SLANT_1_0 +264 0x5333 //RX_FDDRC_SLANT_1_1 +265 0x5333 //RX_FDDRC_SLANT_1_2 +266 0x5333 //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +286 0x0036 //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 +#VOL 4 +163 0x3000 //RX_TDDRC_ALPHA_UP_1 +164 0x3000 //RX_TDDRC_ALPHA_UP_2 +165 0x3000 //RX_TDDRC_ALPHA_UP_3 +166 0x3000 //RX_TDDRC_ALPHA_UP_4 +184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +190 0x7FFF //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +269 0x0000 //RX_TDDRC_THRD_0 +270 0x0000 //RX_TDDRC_THRD_1 +271 0x2000 //RX_TDDRC_THRD_2 +272 0x3000 //RX_TDDRC_THRD_3 +273 0x0800 //RX_TDDRC_SLANT_0 +274 0x7EB8 //RX_TDDRC_SLANT_1 +275 0x3000 //RX_TDDRC_ALPHA_UP_0 +276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x199A //RX_TDDRC_HMNC_GAIN +279 0x0001 //RX_TDDRC_SMT_FLAG +280 0x0CCD //RX_TDDRC_SMT_W +281 0x0196 //RX_TDDRC_DRC_GAIN +195 0x001C //RX_FDEQ_SUBNUM +196 0x4848 //RX_FDEQ_GAIN_0 +197 0x4848 //RX_FDEQ_GAIN_1 +198 0x4848 //RX_FDEQ_GAIN_2 +199 0x4848 //RX_FDEQ_GAIN_3 +200 0x4848 //RX_FDEQ_GAIN_4 +201 0x4848 //RX_FDEQ_GAIN_5 +202 0x4848 //RX_FDEQ_GAIN_6 +203 0x4848 //RX_FDEQ_GAIN_7 +204 0x4848 //RX_FDEQ_GAIN_8 +205 0x4848 //RX_FDEQ_GAIN_9 +206 0x4848 //RX_FDEQ_GAIN_10 +207 0x4848 //RX_FDEQ_GAIN_11 +208 0x4848 //RX_FDEQ_GAIN_12 +209 0x4848 //RX_FDEQ_GAIN_13 +210 0x4848 //RX_FDEQ_GAIN_14 +211 0x4848 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0202 //RX_FDEQ_BIN_0 +221 0x0203 //RX_FDEQ_BIN_1 +222 0x0303 //RX_FDEQ_BIN_2 +223 0x0304 //RX_FDEQ_BIN_3 +224 0x0405 //RX_FDEQ_BIN_4 +225 0x0506 //RX_FDEQ_BIN_5 +226 0x0708 //RX_FDEQ_BIN_6 +227 0x090A //RX_FDEQ_BIN_7 +228 0x0B0C //RX_FDEQ_BIN_8 +229 0x0D0E //RX_FDEQ_BIN_9 +230 0x0E0F //RX_FDEQ_BIN_10 +231 0x0F10 //RX_FDEQ_BIN_11 +232 0x1011 //RX_FDEQ_BIN_12 +233 0x1104 //RX_FDEQ_BIN_13 +234 0x0000 //RX_FDEQ_BIN_14 +235 0x0000 //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x4000 //RX_FDEQ_RESRV_0 +245 0x0320 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0030 //RX_FDDRC_BAND_MARGIN_1 +248 0x0050 //RX_FDDRC_BAND_MARGIN_2 +249 0x0080 //RX_FDDRC_BAND_MARGIN_3 +250 0x0007 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x5000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x6400 //RX_FDDRC_THRD_3_2 +258 0x6400 //RX_FDDRC_THRD_3_3 +259 0x2000 //RX_FDDRC_SLANT_0_0 +260 0x2000 //RX_FDDRC_SLANT_0_1 +261 0x2000 //RX_FDDRC_SLANT_0_2 +262 0x2000 //RX_FDDRC_SLANT_0_3 +263 0x5333 //RX_FDDRC_SLANT_1_0 +264 0x5333 //RX_FDDRC_SLANT_1_1 +265 0x5333 //RX_FDDRC_SLANT_1_2 +266 0x5333 //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +286 0x005B //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 +#VOL 5 +163 0x3000 //RX_TDDRC_ALPHA_UP_1 +164 0x3000 //RX_TDDRC_ALPHA_UP_2 +165 0x3000 //RX_TDDRC_ALPHA_UP_3 +166 0x3000 //RX_TDDRC_ALPHA_UP_4 +184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +190 0x7FFF //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +269 0x0000 //RX_TDDRC_THRD_0 +270 0x0000 //RX_TDDRC_THRD_1 +271 0x2000 //RX_TDDRC_THRD_2 +272 0x3000 //RX_TDDRC_THRD_3 +273 0x0800 //RX_TDDRC_SLANT_0 +274 0x7EB8 //RX_TDDRC_SLANT_1 +275 0x3000 //RX_TDDRC_ALPHA_UP_0 +276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x199A //RX_TDDRC_HMNC_GAIN +279 0x0001 //RX_TDDRC_SMT_FLAG +280 0x0CCD //RX_TDDRC_SMT_W +281 0x0196 //RX_TDDRC_DRC_GAIN +195 0x001C //RX_FDEQ_SUBNUM +196 0x4848 //RX_FDEQ_GAIN_0 +197 0x4848 //RX_FDEQ_GAIN_1 +198 0x4848 //RX_FDEQ_GAIN_2 +199 0x4848 //RX_FDEQ_GAIN_3 +200 0x4848 //RX_FDEQ_GAIN_4 +201 0x4848 //RX_FDEQ_GAIN_5 +202 0x4848 //RX_FDEQ_GAIN_6 +203 0x4848 //RX_FDEQ_GAIN_7 +204 0x4848 //RX_FDEQ_GAIN_8 +205 0x4848 //RX_FDEQ_GAIN_9 +206 0x4848 //RX_FDEQ_GAIN_10 +207 0x4848 //RX_FDEQ_GAIN_11 +208 0x4848 //RX_FDEQ_GAIN_12 +209 0x4848 //RX_FDEQ_GAIN_13 +210 0x4848 //RX_FDEQ_GAIN_14 +211 0x4848 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0202 //RX_FDEQ_BIN_0 +221 0x0203 //RX_FDEQ_BIN_1 +222 0x0303 //RX_FDEQ_BIN_2 +223 0x0304 //RX_FDEQ_BIN_3 +224 0x0405 //RX_FDEQ_BIN_4 +225 0x0506 //RX_FDEQ_BIN_5 +226 0x0708 //RX_FDEQ_BIN_6 +227 0x090A //RX_FDEQ_BIN_7 +228 0x0B0C //RX_FDEQ_BIN_8 +229 0x0D0E //RX_FDEQ_BIN_9 +230 0x0E0F //RX_FDEQ_BIN_10 +231 0x0F10 //RX_FDEQ_BIN_11 +232 0x1011 //RX_FDEQ_BIN_12 +233 0x1104 //RX_FDEQ_BIN_13 +234 0x0000 //RX_FDEQ_BIN_14 +235 0x0000 //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x4000 //RX_FDEQ_RESRV_0 +245 0x0320 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0030 //RX_FDDRC_BAND_MARGIN_1 +248 0x0050 //RX_FDDRC_BAND_MARGIN_2 +249 0x0080 //RX_FDDRC_BAND_MARGIN_3 +250 0x0007 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x5000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x6400 //RX_FDDRC_THRD_3_2 +258 0x6400 //RX_FDDRC_THRD_3_3 +259 0x2000 //RX_FDDRC_SLANT_0_0 +260 0x2000 //RX_FDDRC_SLANT_0_1 +261 0x2000 //RX_FDDRC_SLANT_0_2 +262 0x2000 //RX_FDDRC_SLANT_0_3 +263 0x5333 //RX_FDDRC_SLANT_1_0 +264 0x5333 //RX_FDDRC_SLANT_1_1 +265 0x5333 //RX_FDDRC_SLANT_1_2 +266 0x5333 //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +286 0x0099 //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 +#VOL 6 +163 0x3000 //RX_TDDRC_ALPHA_UP_1 +164 0x3000 //RX_TDDRC_ALPHA_UP_2 +165 0x3000 //RX_TDDRC_ALPHA_UP_3 +166 0x3000 //RX_TDDRC_ALPHA_UP_4 +184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +190 0x7FFF //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +269 0x0000 //RX_TDDRC_THRD_0 +270 0x0000 //RX_TDDRC_THRD_1 +271 0x2000 //RX_TDDRC_THRD_2 +272 0x3000 //RX_TDDRC_THRD_3 +273 0x0800 //RX_TDDRC_SLANT_0 +274 0x7EB8 //RX_TDDRC_SLANT_1 +275 0x3000 //RX_TDDRC_ALPHA_UP_0 +276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x199A //RX_TDDRC_HMNC_GAIN +279 0x0001 //RX_TDDRC_SMT_FLAG +280 0x0CCD //RX_TDDRC_SMT_W +281 0x0196 //RX_TDDRC_DRC_GAIN +195 0x001C //RX_FDEQ_SUBNUM +196 0x4848 //RX_FDEQ_GAIN_0 +197 0x4848 //RX_FDEQ_GAIN_1 +198 0x4848 //RX_FDEQ_GAIN_2 +199 0x4848 //RX_FDEQ_GAIN_3 +200 0x4848 //RX_FDEQ_GAIN_4 +201 0x4848 //RX_FDEQ_GAIN_5 +202 0x4848 //RX_FDEQ_GAIN_6 +203 0x4848 //RX_FDEQ_GAIN_7 +204 0x4848 //RX_FDEQ_GAIN_8 +205 0x4848 //RX_FDEQ_GAIN_9 +206 0x4848 //RX_FDEQ_GAIN_10 +207 0x4848 //RX_FDEQ_GAIN_11 +208 0x4848 //RX_FDEQ_GAIN_12 +209 0x4848 //RX_FDEQ_GAIN_13 +210 0x4848 //RX_FDEQ_GAIN_14 +211 0x4848 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0202 //RX_FDEQ_BIN_0 +221 0x0203 //RX_FDEQ_BIN_1 +222 0x0303 //RX_FDEQ_BIN_2 +223 0x0304 //RX_FDEQ_BIN_3 +224 0x0405 //RX_FDEQ_BIN_4 +225 0x0506 //RX_FDEQ_BIN_5 +226 0x0708 //RX_FDEQ_BIN_6 +227 0x090A //RX_FDEQ_BIN_7 +228 0x0B0C //RX_FDEQ_BIN_8 +229 0x0D0E //RX_FDEQ_BIN_9 +230 0x0E0F //RX_FDEQ_BIN_10 +231 0x0F10 //RX_FDEQ_BIN_11 +232 0x1011 //RX_FDEQ_BIN_12 +233 0x1104 //RX_FDEQ_BIN_13 +234 0x0000 //RX_FDEQ_BIN_14 +235 0x0000 //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x4000 //RX_FDEQ_RESRV_0 +245 0x0320 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0030 //RX_FDDRC_BAND_MARGIN_1 +248 0x0050 //RX_FDDRC_BAND_MARGIN_2 +249 0x0080 //RX_FDDRC_BAND_MARGIN_3 +250 0x0007 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x5000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x6400 //RX_FDDRC_THRD_3_2 +258 0x6400 //RX_FDDRC_THRD_3_3 +259 0x2000 //RX_FDDRC_SLANT_0_0 +260 0x2000 //RX_FDDRC_SLANT_0_1 +261 0x2000 //RX_FDDRC_SLANT_0_2 +262 0x2000 //RX_FDDRC_SLANT_0_3 +263 0x5333 //RX_FDDRC_SLANT_1_0 +264 0x5333 //RX_FDDRC_SLANT_1_1 +265 0x5333 //RX_FDDRC_SLANT_1_2 +266 0x5333 //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +286 0x0100 //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 #CASE_NAME HEADSET-GOOGLE_CONDOR_HEADPHONE-VOICE_GENERIC-SWB -#PARAM_MODE FULL -#PARAM_TYPE TX+RX -#TOTAL_CUSTOM_STEP 7 +#PARAM_MODE Full +#PARAM_TYPE TX+2RX +#TOTAL_CUSTOM_STEP 7+7 #TX 0 0x0001 //TX_OPERATION_MODE_0 1 0x0001 //TX_OPERATION_MODE_1 2 0x0033 //TX_PATCH_REG -3 0x2F7C //TX_SENDFUNC_MODE_0 +3 0x6F7C //TX_SENDFUNC_MODE_0 4 0x0001 //TX_SENDFUNC_MODE_1 -5 0x0003 //TX_NUM_MIC +5 0x0002 //TX_NUM_MIC 6 0x0003 //TX_SAMPLINGFREQ_SIG 7 0x0003 //TX_SAMPLINGFREQ_PROC 8 0x000A //TX_FRAME_SZ_SIG @@ -24585,8 +37409,8 @@ 18 0x0000 //TX_SYS_RESRV_2 19 0x0000 //TX_SYS_RESRV_3 20 0x0000 //TX_DIST2REF0 -21 0x00A4 //TX_DIST2REF1 -22 0x0017 //TX_DIST2REF_02 +21 0x009D //TX_DIST2REF1 +22 0x0010 //TX_DIST2REF_02 23 0x0000 //TX_DIST2REF_03 24 0x0000 //TX_DIST2REF_04 25 0x0000 //TX_DIST2REF_05 @@ -24692,7 +37516,7 @@ 125 0x6000 //TX_C_POST_FLT_MIC_MAINBLK 126 0x6000 //TX_C_POST_FLT_MIC_REFBLK 127 0x0010 //TX_MIC_BLOCK_N -128 0x7B02 //TX_A_HP +128 0x7D83 //TX_A_HP 129 0x4000 //TX_B_PE 130 0x5000 //TX_THR_PITCH_DET_0 131 0x4800 //TX_THR_PITCH_DET_1 @@ -24729,8 +37553,8 @@ 162 0x7800 //TX_MIN_EQ_RE_EST_10 163 0x7800 //TX_MIN_EQ_RE_EST_11 164 0x7800 //TX_MIN_EQ_RE_EST_12 -165 0x4000 //TX_LAMBDA_RE_EST -166 0x3000 //TX_LAMBDA_CB_NLE +165 0x0880 //TX_LAMBDA_RE_EST +166 0x7FFF //TX_LAMBDA_CB_NLE 167 0x7FFF //TX_C_POST_FLT 168 0x4000 //TX_GAIN_NP 169 0x0180 //TX_SE_HOLD_N @@ -24789,16 +37613,16 @@ 222 0x023E //TX_ADPT_STRICT_H 223 0x0BB8 //TX_RATIO_DT_L_TH_LOW 224 0x3A98 //TX_RATIO_DT_H_TH_LOW -225 0x1F40 //TX_RATIO_DT_L_TH_HIGH -226 0x6590 //TX_RATIO_DT_H_TH_HIGH +225 0x1770 //TX_RATIO_DT_L_TH_HIGH +226 0x733C //TX_RATIO_DT_H_TH_HIGH 227 0x09C4 //TX_RATIO_DT_L0_TH -228 0x2000 //TX_B_POST_FILT_ECHO_L -229 0x1000 //TX_B_POST_FILT_ECHO_H +228 0x7FFF //TX_B_POST_FILT_ECHO_L +229 0x7FFF //TX_B_POST_FILT_ECHO_H 230 0x0200 //TX_MIN_G_CTRL_ECHO 231 0x1000 //TX_B_LESSCUT_RTO_ECHO 232 0x0000 //TX_EPD_OFFSET_00 233 0x0000 //TX_EPD_OFFST_01 -234 0x2328 //TX_RATIO_DT_L0_TH_HIGH +234 0x3A98 //TX_RATIO_DT_L0_TH_HIGH 235 0x7FFF //TX_RATIO_DT_H_TH_CUT 236 0x7FFF //TX_MIN_EQ_RE_EST_13 237 0x0000 //TX_DTD_THR1_7 @@ -24806,7 +37630,7 @@ 239 0x0800 //TX_DT_RESRV_7 240 0x0800 //TX_DT_RESRV_8 241 0x0000 //TX_DT_RESRV_9 -242 0xF800 //TX_THR_SN_EST_0 +242 0xFA00 //TX_THR_SN_EST_0 243 0xFA00 //TX_THR_SN_EST_1 244 0xFA00 //TX_THR_SN_EST_2 245 0xFA00 //TX_THR_SN_EST_3 @@ -24817,10 +37641,10 @@ 250 0x0100 //TX_DELTA_THR_SN_EST_0 251 0x0100 //TX_DELTA_THR_SN_EST_1 252 0x0100 //TX_DELTA_THR_SN_EST_2 -253 0x0100 //TX_DELTA_THR_SN_EST_3 -254 0x0000 //TX_DELTA_THR_SN_EST_4 -255 0x0100 //TX_DELTA_THR_SN_EST_5 -256 0x0200 //TX_DELTA_THR_SN_EST_6 +253 0x0000 //TX_DELTA_THR_SN_EST_3 +254 0x0100 //TX_DELTA_THR_SN_EST_4 +255 0x0200 //TX_DELTA_THR_SN_EST_5 +256 0x0100 //TX_DELTA_THR_SN_EST_6 257 0x0200 //TX_DELTA_THR_SN_EST_7 258 0x4000 //TX_LAMBDA_NN_EST_0 259 0x4000 //TX_LAMBDA_NN_EST_1 @@ -24847,11 +37671,11 @@ 280 0x1000 //TX_B_POST_FLT_1 281 0x0010 //TX_NS_LVL_CTRL_0 282 0x003C //TX_NS_LVL_CTRL_1 -283 0x003C //TX_NS_LVL_CTRL_2 -284 0x0024 //TX_NS_LVL_CTRL_3 -285 0x003C //TX_NS_LVL_CTRL_4 -286 0x0014 //TX_NS_LVL_CTRL_5 -287 0x0011 //TX_NS_LVL_CTRL_6 +283 0x0024 //TX_NS_LVL_CTRL_2 +284 0x003C //TX_NS_LVL_CTRL_3 +285 0x0014 //TX_NS_LVL_CTRL_4 +286 0x0011 //TX_NS_LVL_CTRL_5 +287 0x003C //TX_NS_LVL_CTRL_6 288 0x0011 //TX_NS_LVL_CTRL_7 289 0x000F //TX_MIN_GAIN_S_0 290 0x0010 //TX_MIN_GAIN_S_1 @@ -24867,10 +37691,10 @@ 300 0x7FFF //TX_SNRI_SUP_0 301 0x1400 //TX_SNRI_SUP_1 302 0x1400 //TX_SNRI_SUP_2 -303 0x1400 //TX_SNRI_SUP_3 +303 0x4000 //TX_SNRI_SUP_3 304 0x4000 //TX_SNRI_SUP_4 -305 0x4000 //TX_SNRI_SUP_5 -306 0x50C0 //TX_SNRI_SUP_6 +305 0x50C0 //TX_SNRI_SUP_5 +306 0x1400 //TX_SNRI_SUP_6 307 0x7FFF //TX_SNRI_SUP_7 308 0x7FFF //TX_THR_LFNS 309 0x0018 //TX_G_LFNS @@ -24879,19 +37703,19 @@ 312 0x7FFF //TX_A_POST_FILT_0 313 0x2000 //TX_A_POST_FILT_1 314 0x5000 //TX_A_POST_FILT_S_0 -315 0x7C00 //TX_A_POST_FILT_S_1 -316 0x4C00 //TX_A_POST_FILT_S_2 -317 0x4000 //TX_A_POST_FILT_S_3 -318 0x6000 //TX_A_POST_FILT_S_4 -319 0x4000 //TX_A_POST_FILT_S_5 -320 0x5000 //TX_A_POST_FILT_S_6 +315 0x4C00 //TX_A_POST_FILT_S_1 +316 0x4000 //TX_A_POST_FILT_S_2 +317 0x6000 //TX_A_POST_FILT_S_3 +318 0x4000 //TX_A_POST_FILT_S_4 +319 0x5000 //TX_A_POST_FILT_S_5 +320 0x7C00 //TX_A_POST_FILT_S_6 321 0x7000 //TX_A_POST_FILT_S_7 322 0x2000 //TX_B_POST_FILT_0 -323 0x1000 //TX_B_POST_FILT_1 +323 0x6000 //TX_B_POST_FILT_1 324 0x6000 //TX_B_POST_FILT_2 325 0x6000 //TX_B_POST_FILT_3 -326 0x6000 //TX_B_POST_FILT_4 -327 0x4000 //TX_B_POST_FILT_5 +326 0x4000 //TX_B_POST_FILT_4 +327 0x1000 //TX_B_POST_FILT_5 328 0x1000 //TX_B_POST_FILT_6 329 0x2000 //TX_B_POST_FILT_7 330 0x4000 //TX_B_LESSCUT_RTO_S_0 @@ -24899,8 +37723,8 @@ 332 0x7FFF //TX_B_LESSCUT_RTO_S_2 333 0x7FFF //TX_B_LESSCUT_RTO_S_3 334 0x7FFF //TX_B_LESSCUT_RTO_S_4 -335 0x7FFF //TX_B_LESSCUT_RTO_S_5 -336 0x6000 //TX_B_LESSCUT_RTO_S_6 +335 0x6000 //TX_B_LESSCUT_RTO_S_5 +336 0x7FFF //TX_B_LESSCUT_RTO_S_6 337 0x7FFF //TX_B_LESSCUT_RTO_S_7 338 0x7C00 //TX_LAMBDA_PFILT 339 0x7D00 //TX_LAMBDA_PFILT_S_0 @@ -24931,7 +37755,7 @@ 364 0x0000 //TX_K_APT 365 0x0001 //TX_NOISEDET 366 0x0064 //TX_NDETCT -367 0x0050 //TX_NOISE_TH_0 +367 0x0383 //TX_NOISE_TH_0 368 0x7FFF //TX_NOISE_TH_0_2 369 0x7FFF //TX_NOISE_TH_0_3 370 0x07D0 //TX_NOISE_TH_1 @@ -24943,11 +37767,11 @@ 376 0x0000 //TX_NOISE_TH_5_3 377 0x7FFF //TX_NOISE_TH_5_4 378 0x0DAC //TX_NOISE_TH_6 -379 0x0050 //TX_MINENOISE_TH -380 0x4000 //TX_MINENOISE_MIC0_TH_MTS -381 0xFFEE //TX_MINENOISE_MIC0_TH_EXP -382 0x6000 //TX_MINENOISE_MIC0_S_TH_MTS -383 0xFFF3 //TX_MINENOISE_MIC0_S_TH_EXP +379 0x044C //TX_MINENOISE_TH +380 0xD508 //TX_MORENS_TFMASK_TH +381 0x0001 //TX_DRC_QUIET_FLOOR +382 0x3A98 //TX_RATIODTL_CUT_TH +383 0x0DAC //TX_DT_CUT_K1 384 0x0666 //TX_OUT_ENER_S_TH_CLEAN 385 0x0666 //TX_OUT_ENER_S_TH_LESSCLEAN 386 0x0333 //TX_OUT_ENER_S_TH_NOISY @@ -24955,22 +37779,22 @@ 388 0x0333 //TX_OUT_ENER_TH_SPEECH 389 0x2000 //TX_SN_NPB_GAIN 390 0x0000 //TX_NN_NPB_GAIN -391 0x0000 //TX_CSX_ALPHA_0 -392 0x0000 //TX_CSX_ALPHA_1 -393 0x0000 //TX_CSX_ALPHA_2 -394 0x0000 //TX_CSX_ALPHA_3 -395 0x0800 //TX_MU_ARSP_EST -396 0x00C8 //TX_P_OUTBEAM_MIN_TH +391 0x7FFF //TX_POST_MASK_SUP_HSNE +392 0x1388 //TX_TAIL_DET_TH +393 0x4000 //TX_B_LESSCUT_RTO_WTA +394 0x0000 //TX_MEL_G_R +395 0x0080 //TX_SUPHIGH_TH +396 0x0000 //TX_MASK_G_R 397 0x0002 //TX_EXTRA_NS_L -398 0x0800 //TX_EXTRA_NS_A -399 0x0005 //TX_VR_NOISE_FLOOR_TH +398 0x1800 //TX_C_POST_FLT_MASK +399 0x7FFF //TX_A_POST_FLT_WNS 400 0x0148 //TX_MIN_G_LOW300HZ -401 0x0001 //TX_MAXLEVEL_CNG +401 0x0004 //TX_MAXLEVEL_CNG 402 0x00B4 //TX_STN_NOISE_TH 403 0x4000 //TX_POST_MASK_SUP 404 0x7FFF //TX_POST_MASK_ADJUST 405 0x00C8 //TX_NS_ENOISE_MIC0_TH -406 0x0050 //TX_MINENOISE_MIC0_TH +406 0x02F3 //TX_MINENOISE_MIC0_TH 407 0x012C //TX_MINENOISE_MIC0_S_TH 408 0x4000 //TX_MIN_G_CTRL_SSNS 409 0x0000 //TX_METAL_RTO_THR @@ -25078,16 +37902,16 @@ 511 0x6666 //TX_MIC_TO_BFGAIN 512 0x0000 //TX_MICTOBFGAIN0 513 0x0000 //TX_FASTMUE_TH -514 0x0000 //TX_DERVB_LEN_0 -515 0x0000 //TX_DERVB_LEN_1 -516 0x0000 //TX_RHO_DERVB -517 0x0000 //TX_MIC_INDX_DERVB -518 0x0000 //TX_MU_DERVB -519 0x0000 //TX_DR_RESRV_0 -520 0x0000 //TX_DR_RESRV_1 -521 0x0000 //TX_DR_RESRV_2 -522 0x0000 //TX_DR_RESRV_3 -523 0x0000 //TX_DR_RESRV_4 +514 0xC000 //TX_DEREVERB_LF_MU +515 0xC000 //TX_DEREVERB_HF_MU +516 0xCCCC //TX_DEREVERB_DELAY +517 0xD999 //TX_DEREVERB_COEF_LEN +518 0x1F40 //TX_DEREVERB_DNR +519 0x0000 //TX_DEREVERB_ALPHA +520 0x0000 //TX_DEREVERB_BETA +521 0x0000 //TX_GSC_RTOL_TH +522 0x7000 //TX_GSC_RTOH_TH +523 0x0064 //TX_WIDE2_MEANHTH 524 0x0000 //TX_DR_RESRV_5 525 0x0000 //TX_DR_RESRV_6 526 0x0000 //TX_DR_RESRV_7 @@ -25131,22 +37955,22 @@ 564 0x0000 //TX_PB_RESRV_0 565 0x0000 //TX_PB_RESRV_1 566 0x0020 //TX_FDEQ_SUBNUM -567 0x4848 //TX_FDEQ_GAIN_0 -568 0x4848 //TX_FDEQ_GAIN_1 +567 0x5450 //TX_FDEQ_GAIN_0 +568 0x4C48 //TX_FDEQ_GAIN_1 569 0x4850 //TX_FDEQ_GAIN_2 570 0x5050 //TX_FDEQ_GAIN_3 571 0x4848 //TX_FDEQ_GAIN_4 -572 0x484A //TX_FDEQ_GAIN_5 +572 0x484E //TX_FDEQ_GAIN_5 573 0x4E5E //TX_FDEQ_GAIN_6 -574 0x5C4C //TX_FDEQ_GAIN_7 +574 0x584E //TX_FDEQ_GAIN_7 575 0x4C4E //TX_FDEQ_GAIN_8 -576 0x4844 //TX_FDEQ_GAIN_9 -577 0x4448 //TX_FDEQ_GAIN_10 -578 0x4850 //TX_FDEQ_GAIN_11 -579 0x5C6A //TX_FDEQ_GAIN_12 -580 0x5A84 //TX_FDEQ_GAIN_13 -581 0x7880 //TX_FDEQ_GAIN_14 -582 0x7F7F //TX_FDEQ_GAIN_15 +576 0x564E //TX_FDEQ_GAIN_9 +577 0x5058 //TX_FDEQ_GAIN_10 +578 0x625C //TX_FDEQ_GAIN_11 +579 0x6C6C //TX_FDEQ_GAIN_12 +580 0x7086 //TX_FDEQ_GAIN_13 +581 0x869C //TX_FDEQ_GAIN_14 +582 0xB0B0 //TX_FDEQ_GAIN_15 583 0x4848 //TX_FDEQ_GAIN_16 584 0x4848 //TX_FDEQ_GAIN_17 585 0x4848 //TX_FDEQ_GAIN_18 @@ -25170,7 +37994,7 @@ 603 0x1B1E //TX_FDEQ_BIN_12 604 0x1E1E //TX_FDEQ_BIN_13 605 0x1E28 //TX_FDEQ_BIN_14 -606 0x282C //TX_FDEQ_BIN_15 +606 0x284A //TX_FDEQ_BIN_15 607 0x0000 //TX_FDEQ_BIN_16 608 0x0000 //TX_FDEQ_BIN_17 609 0x0000 //TX_FDEQ_BIN_18 @@ -25188,15 +38012,15 @@ 621 0x4848 //TX_PREEQ_GAIN_MIC0_4 622 0x4848 //TX_PREEQ_GAIN_MIC0_5 623 0x4848 //TX_PREEQ_GAIN_MIC0_6 -624 0x484A //TX_PREEQ_GAIN_MIC0_7 -625 0x4C4E //TX_PREEQ_GAIN_MIC0_8 -626 0x5054 //TX_PREEQ_GAIN_MIC0_9 -627 0x5658 //TX_PREEQ_GAIN_MIC0_10 -628 0x5C5C //TX_PREEQ_GAIN_MIC0_11 -629 0x6474 //TX_PREEQ_GAIN_MIC0_12 -630 0x7870 //TX_PREEQ_GAIN_MIC0_13 -631 0x5C48 //TX_PREEQ_GAIN_MIC0_14 -632 0x383C //TX_PREEQ_GAIN_MIC0_15 +624 0x4848 //TX_PREEQ_GAIN_MIC0_7 +625 0x494A //TX_PREEQ_GAIN_MIC0_8 +626 0x4B4C //TX_PREEQ_GAIN_MIC0_9 +627 0x4B4A //TX_PREEQ_GAIN_MIC0_10 +628 0x484B //TX_PREEQ_GAIN_MIC0_11 +629 0x4C4C //TX_PREEQ_GAIN_MIC0_12 +630 0x4B48 //TX_PREEQ_GAIN_MIC0_13 +631 0x3838 //TX_PREEQ_GAIN_MIC0_14 +632 0x3835 //TX_PREEQ_GAIN_MIC0_15 633 0x4848 //TX_PREEQ_GAIN_MIC0_16 634 0x4848 //TX_PREEQ_GAIN_MIC0_17 635 0x4848 //TX_PREEQ_GAIN_MIC0_18 @@ -25237,15 +38061,15 @@ 670 0x4848 //TX_PREEQ_GAIN_MIC1_4 671 0x4848 //TX_PREEQ_GAIN_MIC1_5 672 0x4848 //TX_PREEQ_GAIN_MIC1_6 -673 0x4848 //TX_PREEQ_GAIN_MIC1_7 -674 0x4848 //TX_PREEQ_GAIN_MIC1_8 -675 0x4848 //TX_PREEQ_GAIN_MIC1_9 -676 0x4848 //TX_PREEQ_GAIN_MIC1_10 -677 0x4848 //TX_PREEQ_GAIN_MIC1_11 -678 0x4848 //TX_PREEQ_GAIN_MIC1_12 -679 0x4848 //TX_PREEQ_GAIN_MIC1_13 -680 0x4848 //TX_PREEQ_GAIN_MIC1_14 -681 0x4848 //TX_PREEQ_GAIN_MIC1_15 +673 0x4846 //TX_PREEQ_GAIN_MIC1_7 +674 0x4544 //TX_PREEQ_GAIN_MIC1_8 +675 0x4241 //TX_PREEQ_GAIN_MIC1_9 +676 0x403E //TX_PREEQ_GAIN_MIC1_10 +677 0x3D3C //TX_PREEQ_GAIN_MIC1_11 +678 0x3C3C //TX_PREEQ_GAIN_MIC1_12 +679 0x3C39 //TX_PREEQ_GAIN_MIC1_13 +680 0x3838 //TX_PREEQ_GAIN_MIC1_14 +681 0x3A3C //TX_PREEQ_GAIN_MIC1_15 682 0x4848 //TX_PREEQ_GAIN_MIC1_16 683 0x4848 //TX_PREEQ_GAIN_MIC1_17 684 0x4848 //TX_PREEQ_GAIN_MIC1_18 @@ -25254,22 +38078,22 @@ 687 0x4848 //TX_PREEQ_GAIN_MIC1_21 688 0x4848 //TX_PREEQ_GAIN_MIC1_22 689 0x4848 //TX_PREEQ_GAIN_MIC1_23 -690 0x251A //TX_PREEQ_BIN_MIC1_0 -691 0x0F0F //TX_PREEQ_BIN_MIC1_1 -692 0x0C0C //TX_PREEQ_BIN_MIC1_2 -693 0x0C0F //TX_PREEQ_BIN_MIC1_3 -694 0x0F0F //TX_PREEQ_BIN_MIC1_4 -695 0x0F09 //TX_PREEQ_BIN_MIC1_5 -696 0x0909 //TX_PREEQ_BIN_MIC1_6 -697 0x0908 //TX_PREEQ_BIN_MIC1_7 -698 0x070F //TX_PREEQ_BIN_MIC1_8 -699 0x1F08 //TX_PREEQ_BIN_MIC1_9 -700 0x0808 //TX_PREEQ_BIN_MIC1_10 -701 0x0920 //TX_PREEQ_BIN_MIC1_11 -702 0x2020 //TX_PREEQ_BIN_MIC1_12 -703 0x2021 //TX_PREEQ_BIN_MIC1_13 -704 0x0000 //TX_PREEQ_BIN_MIC1_14 -705 0x0000 //TX_PREEQ_BIN_MIC1_15 +690 0x0202 //TX_PREEQ_BIN_MIC1_0 +691 0x0203 //TX_PREEQ_BIN_MIC1_1 +692 0x0303 //TX_PREEQ_BIN_MIC1_2 +693 0x0304 //TX_PREEQ_BIN_MIC1_3 +694 0x0405 //TX_PREEQ_BIN_MIC1_4 +695 0x0506 //TX_PREEQ_BIN_MIC1_5 +696 0x0708 //TX_PREEQ_BIN_MIC1_6 +697 0x090A //TX_PREEQ_BIN_MIC1_7 +698 0x0B0C //TX_PREEQ_BIN_MIC1_8 +699 0x0D0E //TX_PREEQ_BIN_MIC1_9 +700 0x1013 //TX_PREEQ_BIN_MIC1_10 +701 0x1719 //TX_PREEQ_BIN_MIC1_11 +702 0x1B1E //TX_PREEQ_BIN_MIC1_12 +703 0x1E1E //TX_PREEQ_BIN_MIC1_13 +704 0x1E28 //TX_PREEQ_BIN_MIC1_14 +705 0x282C //TX_PREEQ_BIN_MIC1_15 706 0x0000 //TX_PREEQ_BIN_MIC1_16 707 0x0000 //TX_PREEQ_BIN_MIC1_17 708 0x0000 //TX_PREEQ_BIN_MIC1_18 @@ -25355,7 +38179,7 @@ 788 0x7EB8 //TX_TDDRC_ALPHA_DWN_02 789 0x7EB8 //TX_TDDRC_ALPHA_DWN_03 790 0x7EB8 //TX_TDDRC_ALPHA_DWN_04 -791 0x7FFF //TX_TDDRC_TD_DRC_LIMIT +791 0x7214 //TX_TDDRC_TD_DRC_LIMIT 792 0x0800 //TX_TDDRC_POST_LIMIT_GAIN 793 0x0000 //TX_TDDRC_RESRV_0 794 0x0000 //TX_TDDRC_RESRV_1 @@ -25418,12 +38242,12 @@ 851 0x0000 //TX_FFP_RESRV_5 852 0x0000 //TX_FFP_RESRV_6 853 0x0002 //TX_FILTINDX -854 0x0001 //TX_TDDRC_THRD_0 -855 0x0002 //TX_TDDRC_THRD_1 -856 0x1000 //TX_TDDRC_THRD_2 -857 0x1000 //TX_TDDRC_THRD_3 -858 0x6000 //TX_TDDRC_SLANT_0 -859 0x6000 //TX_TDDRC_SLANT_1 +854 0x0003 //TX_TDDRC_THRD_0 +855 0x0004 //TX_TDDRC_THRD_1 +856 0x1800 //TX_TDDRC_THRD_2 +857 0x1800 //TX_TDDRC_THRD_3 +858 0x7FFF //TX_TDDRC_SLANT_0 +859 0x7FFF //TX_TDDRC_SLANT_1 860 0x0800 //TX_TDDRC_ALPHA_UP_00 861 0x7EB8 //TX_TDDRC_ALPHA_DWN_00 862 0x0000 //TX_TDDRC_HMNC_FLAG @@ -25453,7 +38277,7 @@ 886 0x0CCD //TX_FASTNS_TFMASKBIN_TH2 887 0x0CCD //TX_FASTNS_TFMASKBIN_TH3 888 0x00C8 //TX_FASTNS_ARSPC_TH -889 0xC000 //TX_FASTNS_MASK5_TH +889 0x8000 //TX_FASTNS_MASK5_TH 890 0x4848 //TX_POSTSSA_MIN_G_VR_MASK 891 0x4000 //TX_A_LESSCUT_RTO_MASK 892 0x1770 //TX_FASTNS_NOISETH @@ -25461,8 +38285,73 @@ 894 0xC000 //TX_FASTNS_SSA_THHFL 895 0xCCCC //TX_FASTNS_SSA_THLFH 896 0xD999 //TX_FASTNS_SSA_THHFH +897 0x2339 //TX_SENDFUNC_REG_MICMUTE +898 0x0021 //TX_SENDFUNC_REG_MICMUTE1 +899 0x02BC //TX_MICMUTE_RATIO_THR +900 0x0140 //TX_MICMUTE_AMP_THR +901 0x0004 //TX_MICMUTE_HPF_IND +902 0x00C0 //TX_MICMUTE_LOG_EYR_TH +903 0x0008 //TX_MICMUTE_CVG_TIME +904 0x0008 //TX_MICMUTE_RELEASE_TIME +905 0x01FE //TX_MIC_VOLUME_MIC0MUTE +906 0x0020 //TX_MICMUTE_EPD_OFFSET_0 +907 0x001E //TX_MICMUTE_FRQ_AEC_L +908 0x7999 //TX_MICMUTE_EAD_THR +909 0x7FFF //TX_MICMUTE_LAMBDA_CB_NLE +910 0x7FFF //TX_MICMUTE_LAMBDA_RE_EST +911 0x4000 //TX_DTD_THR1_MICMUTE_0 +912 0x7000 //TX_DTD_THR1_MICMUTE_1 +913 0x7FFF //TX_DTD_THR1_MICMUTE_2 +914 0x7FFF //TX_DTD_THR1_MICMUTE_3 +915 0x6CCC //TX_DTD_THR2_MICMUTE_0 +916 0x0400 //TX_MICMUTE_MIN_EQ_RE_EST_0 +917 0x0400 //TX_MICMUTE_MIN_EQ_RE_EST_1 +918 0x1000 //TX_MICMUTE_MIN_EQ_RE_EST_2 +919 0x7FFF //TX_MICMUTE_MIN_EQ_RE_EST_3 +920 0x7FFF //TX_MICMUTE_MIN_EQ_RE_EST_4 +921 0x4000 //TX_MICMUTE_C_POST_FLT +922 0x03E8 //TX_MICMUTE_DT_CUT_K +923 0x0001 //TX_MICMUTE_DT_CUT_THR +924 0x03E8 //TX_MICMUTE_DT_CUT_K2 +925 0x0001 //TX_MICMUTE_DT_CUT_THR2 +926 0x0064 //TX_MICMUTE_DT2_HOLD_N +927 0x1000 //TX_MICMUTE_RATIODTH_THCUT +928 0x1000 //TX_MICMUTE_B_POST_FLT_ECHOL +929 0x7FFF //TX_MICMUTE_B_POST_FLT_ECHOH +930 0x0400 //TX_MICMUTE_C_POST_FLT_MASK +931 0x7999 //TX_MICMUTE_RATIODTL_CUT_TH +932 0x0258 //TX_MICMUTE_DT_CUT_K1 +933 0x0800 //TX_MICMUTE_N2_SN_EST +934 0xFC00 //TX_MICMUTE_THR_SN_EST_0 +935 0x001C //TX_MICMUTE_MIN_G_CTRL_0 +936 0x6000 //TX_MICMUTE_A_POST_FILT_S_0 +937 0x7000 //TX_MICMUTE_B_POST_FILT_0 +938 0x2710 //TX_MIC1RUB_AMP_THR +939 0x0010 //TX_MIC1MUTE_RATIO_THR +940 0x0450 //TX_MIC1MUTE_AMP_THR +941 0x0008 //TX_MIC1MUTE_CVG_TIME +942 0x0008 //TX_MIC1MUTE_RELEASE_TIME +943 0x0000 //TX_AMS_RESRV_01 +944 0x0000 //TX_AMS_RESRV_02 +945 0x0000 //TX_AMS_RESRV_03 +946 0x0000 //TX_AMS_RESRV_04 +947 0x0000 //TX_AMS_RESRV_05 +948 0x0000 //TX_AMS_RESRV_06 +949 0x0000 //TX_AMS_RESRV_07 +950 0x0000 //TX_AMS_RESRV_08 +951 0x0000 //TX_AMS_RESRV_09 +952 0x0000 //TX_AMS_RESRV_10 +953 0x0000 //TX_AMS_RESRV_11 +954 0x0000 //TX_AMS_RESRV_12 +955 0x0000 //TX_AMS_RESRV_13 +956 0x0000 //TX_AMS_RESRV_14 +957 0x0000 //TX_AMS_RESRV_15 +958 0x0000 //TX_AMS_RESRV_16 +959 0x0000 //TX_AMS_RESRV_17 +960 0x0000 //TX_AMS_RESRV_18 +961 0x0000 //TX_AMS_RESRV_19 #RX -0 0x002C //RX_RECVFUNC_MODE_0 +0 0x202C //RX_RECVFUNC_MODE_0 1 0x0000 //RX_RECVFUNC_MODE_1 2 0x0003 //RX_SAMPLINGFREQ_SIG 3 0x0003 //RX_SAMPLINGFREQ_PROC @@ -26312,18 +39201,869 @@ 110 0x0000 //RX_FDDRC_RESRV_0 129 0x0100 //RX_SPK_VOL 130 0x0000 //RX_VOL_RESRV_0 +#RX 2 +157 0x202C //RX_RECVFUNC_MODE_0 +158 0x0000 //RX_RECVFUNC_MODE_1 +159 0x0003 //RX_SAMPLINGFREQ_SIG +160 0x0003 //RX_SAMPLINGFREQ_PROC +161 0x000A //RX_FRAME_SZ +162 0x0000 //RX_DELAY_OPT +163 0x5000 //RX_TDDRC_ALPHA_UP_1 +164 0x5000 //RX_TDDRC_ALPHA_UP_2 +165 0x5000 //RX_TDDRC_ALPHA_UP_3 +166 0x2000 //RX_TDDRC_ALPHA_UP_4 +167 0x0800 //RX_PGA +168 0x7FFF //RX_A_HP +169 0x0000 //RX_B_PE +170 0x1800 //RX_THR_PITCH_DET_0 +171 0x1000 //RX_THR_PITCH_DET_1 +172 0x0800 //RX_THR_PITCH_DET_2 +173 0x0008 //RX_PITCH_BFR_LEN +174 0x0003 //RX_SBD_PITCH_DET +175 0x0100 //RX_PP_RESRV_0 +176 0x0020 //RX_PP_RESRV_1 +177 0x0400 //RX_N_SN_EST +178 0x000C //RX_N2_SN_EST +179 0x0003 //RX_NS_LVL_CTRL +180 0x9000 //RX_THR_SN_EST +181 0x7CCD //RX_LAMBDA_PFILT +182 0x000A //RX_FENS_RESRV_0 +183 0x0190 //RX_FENS_RESRV_1 +184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +187 0x0002 //RX_EXTRA_NS_L +188 0x0800 //RX_EXTRA_NS_A +189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +190 0x65AD //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +192 0x199A //RX_A_POST_FLT +193 0x0000 //RX_LMT_THRD +194 0x4000 //RX_LMT_ALPHA +195 0x0020 //RX_FDEQ_SUBNUM +196 0x4848 //RX_FDEQ_GAIN_0 +197 0x4848 //RX_FDEQ_GAIN_1 +198 0x4848 //RX_FDEQ_GAIN_2 +199 0x4848 //RX_FDEQ_GAIN_3 +200 0x4848 //RX_FDEQ_GAIN_4 +201 0x4848 //RX_FDEQ_GAIN_5 +202 0x4848 //RX_FDEQ_GAIN_6 +203 0x4848 //RX_FDEQ_GAIN_7 +204 0x4848 //RX_FDEQ_GAIN_8 +205 0x4848 //RX_FDEQ_GAIN_9 +206 0x4848 //RX_FDEQ_GAIN_10 +207 0x4848 //RX_FDEQ_GAIN_11 +208 0x4848 //RX_FDEQ_GAIN_12 +209 0x4848 //RX_FDEQ_GAIN_13 +210 0x4848 //RX_FDEQ_GAIN_14 +211 0x4848 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0202 //RX_FDEQ_BIN_0 +221 0x0203 //RX_FDEQ_BIN_1 +222 0x0303 //RX_FDEQ_BIN_2 +223 0x0304 //RX_FDEQ_BIN_3 +224 0x0405 //RX_FDEQ_BIN_4 +225 0x0506 //RX_FDEQ_BIN_5 +226 0x0708 //RX_FDEQ_BIN_6 +227 0x090A //RX_FDEQ_BIN_7 +228 0x0B0C //RX_FDEQ_BIN_8 +229 0x0D0E //RX_FDEQ_BIN_9 +230 0x1013 //RX_FDEQ_BIN_10 +231 0x1719 //RX_FDEQ_BIN_11 +232 0x1B1E //RX_FDEQ_BIN_12 +233 0x1E1E //RX_FDEQ_BIN_13 +234 0x1E28 //RX_FDEQ_BIN_14 +235 0x282C //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x4000 //RX_FDEQ_RESRV_0 +245 0x0320 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0030 //RX_FDDRC_BAND_MARGIN_1 +248 0x0050 //RX_FDDRC_BAND_MARGIN_2 +249 0x0080 //RX_FDDRC_BAND_MARGIN_3 +250 0x0007 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x5000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x6400 //RX_FDDRC_THRD_3_2 +258 0x6400 //RX_FDDRC_THRD_3_3 +259 0x2000 //RX_FDDRC_SLANT_0_0 +260 0x2000 //RX_FDDRC_SLANT_0_1 +261 0x2000 //RX_FDDRC_SLANT_0_2 +262 0x2000 //RX_FDDRC_SLANT_0_3 +263 0x5333 //RX_FDDRC_SLANT_1_0 +264 0x5333 //RX_FDDRC_SLANT_1_1 +265 0x5333 //RX_FDDRC_SLANT_1_2 +266 0x5333 //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +268 0x0002 //RX_FILTINDX +269 0x0000 //RX_TDDRC_THRD_0 +270 0x0000 //RX_TDDRC_THRD_1 +271 0x1A00 //RX_TDDRC_THRD_2 +272 0x1A00 //RX_TDDRC_THRD_3 +273 0x3000 //RX_TDDRC_SLANT_0 +274 0x7EB8 //RX_TDDRC_SLANT_1 +275 0x5000 //RX_TDDRC_ALPHA_UP_0 +276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x199A //RX_TDDRC_HMNC_GAIN +279 0x0001 //RX_TDDRC_SMT_FLAG +280 0x0CCD //RX_TDDRC_SMT_W +281 0x01C8 //RX_TDDRC_DRC_GAIN +282 0x7C00 //RX_LAMBDA_PKA_FP +283 0x2000 //RX_TPKA_FP +284 0x2000 //RX_MIN_G_FP +285 0x0080 //RX_MAX_G_FP +286 0x000B //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 +288 0x0000 //RX_MAXLEVEL_CNG +289 0x3000 //RX_BWE_UV_TH +290 0x3000 //RX_BWE_UV_TH2 +291 0x1800 //RX_BWE_UV_TH3 +292 0x1000 //RX_BWE_V_TH +293 0x04CD //RX_BWE_GAIN1_V_TH1 +294 0x0F33 //RX_BWE_GAIN1_V_TH2 +295 0x7333 //RX_BWE_UV_EQ +296 0x199A //RX_BWE_V_EQ +297 0x7333 //RX_BWE_TONE_TH +298 0x0004 //RX_BWE_UV_HOLD_T +299 0x6CCD //RX_BWE_GAIN2_ALPHA +300 0x799A //RX_BWE_GAIN3_ALPHA +301 0x001E //RX_BWE_CUTOFF +302 0x3000 //RX_BWE_GAINFILL +303 0x3200 //RX_BWE_MAXTH_TONE +304 0x2000 //RX_BWE_EQ_0 +305 0x2000 //RX_BWE_EQ_1 +306 0x2000 //RX_BWE_EQ_2 +307 0x2000 //RX_BWE_EQ_3 +308 0x2000 //RX_BWE_EQ_4 +309 0x2000 //RX_BWE_EQ_5 +310 0x2000 //RX_BWE_EQ_6 +311 0x0000 //RX_BWE_RESRV_0 +312 0x0000 //RX_BWE_RESRV_1 +313 0x0000 //RX_BWE_RESRV_2 +#VOL 0 +163 0x5000 //RX_TDDRC_ALPHA_UP_1 +164 0x5000 //RX_TDDRC_ALPHA_UP_2 +165 0x5000 //RX_TDDRC_ALPHA_UP_3 +166 0x2000 //RX_TDDRC_ALPHA_UP_4 +184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +190 0x65AD //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +269 0x0000 //RX_TDDRC_THRD_0 +270 0x0000 //RX_TDDRC_THRD_1 +271 0x1A00 //RX_TDDRC_THRD_2 +272 0x1A00 //RX_TDDRC_THRD_3 +273 0x3000 //RX_TDDRC_SLANT_0 +274 0x7EB8 //RX_TDDRC_SLANT_1 +275 0x5000 //RX_TDDRC_ALPHA_UP_0 +276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x199A //RX_TDDRC_HMNC_GAIN +279 0x0001 //RX_TDDRC_SMT_FLAG +280 0x0CCD //RX_TDDRC_SMT_W +281 0x01C8 //RX_TDDRC_DRC_GAIN +195 0x0020 //RX_FDEQ_SUBNUM +196 0x4848 //RX_FDEQ_GAIN_0 +197 0x4848 //RX_FDEQ_GAIN_1 +198 0x4848 //RX_FDEQ_GAIN_2 +199 0x4848 //RX_FDEQ_GAIN_3 +200 0x4848 //RX_FDEQ_GAIN_4 +201 0x4848 //RX_FDEQ_GAIN_5 +202 0x4848 //RX_FDEQ_GAIN_6 +203 0x4848 //RX_FDEQ_GAIN_7 +204 0x4848 //RX_FDEQ_GAIN_8 +205 0x4848 //RX_FDEQ_GAIN_9 +206 0x4848 //RX_FDEQ_GAIN_10 +207 0x4848 //RX_FDEQ_GAIN_11 +208 0x4848 //RX_FDEQ_GAIN_12 +209 0x4848 //RX_FDEQ_GAIN_13 +210 0x4848 //RX_FDEQ_GAIN_14 +211 0x4848 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0202 //RX_FDEQ_BIN_0 +221 0x0203 //RX_FDEQ_BIN_1 +222 0x0303 //RX_FDEQ_BIN_2 +223 0x0304 //RX_FDEQ_BIN_3 +224 0x0405 //RX_FDEQ_BIN_4 +225 0x0506 //RX_FDEQ_BIN_5 +226 0x0708 //RX_FDEQ_BIN_6 +227 0x090A //RX_FDEQ_BIN_7 +228 0x0B0C //RX_FDEQ_BIN_8 +229 0x0D0E //RX_FDEQ_BIN_9 +230 0x1013 //RX_FDEQ_BIN_10 +231 0x1719 //RX_FDEQ_BIN_11 +232 0x1B1E //RX_FDEQ_BIN_12 +233 0x1E1E //RX_FDEQ_BIN_13 +234 0x1E28 //RX_FDEQ_BIN_14 +235 0x282C //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x4000 //RX_FDEQ_RESRV_0 +245 0x0320 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0030 //RX_FDDRC_BAND_MARGIN_1 +248 0x0050 //RX_FDDRC_BAND_MARGIN_2 +249 0x0080 //RX_FDDRC_BAND_MARGIN_3 +250 0x0007 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x5000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x6400 //RX_FDDRC_THRD_3_2 +258 0x6400 //RX_FDDRC_THRD_3_3 +259 0x2000 //RX_FDDRC_SLANT_0_0 +260 0x2000 //RX_FDDRC_SLANT_0_1 +261 0x2000 //RX_FDDRC_SLANT_0_2 +262 0x2000 //RX_FDDRC_SLANT_0_3 +263 0x5333 //RX_FDDRC_SLANT_1_0 +264 0x5333 //RX_FDDRC_SLANT_1_1 +265 0x5333 //RX_FDDRC_SLANT_1_2 +266 0x5333 //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +286 0x000B //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 +#VOL 1 +163 0x5000 //RX_TDDRC_ALPHA_UP_1 +164 0x5000 //RX_TDDRC_ALPHA_UP_2 +165 0x5000 //RX_TDDRC_ALPHA_UP_3 +166 0x2000 //RX_TDDRC_ALPHA_UP_4 +184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +190 0x65AD //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +269 0x0000 //RX_TDDRC_THRD_0 +270 0x0000 //RX_TDDRC_THRD_1 +271 0x1A00 //RX_TDDRC_THRD_2 +272 0x1A00 //RX_TDDRC_THRD_3 +273 0x3000 //RX_TDDRC_SLANT_0 +274 0x7EB8 //RX_TDDRC_SLANT_1 +275 0x5000 //RX_TDDRC_ALPHA_UP_0 +276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x199A //RX_TDDRC_HMNC_GAIN +279 0x0001 //RX_TDDRC_SMT_FLAG +280 0x0CCD //RX_TDDRC_SMT_W +281 0x01C8 //RX_TDDRC_DRC_GAIN +195 0x0020 //RX_FDEQ_SUBNUM +196 0x4848 //RX_FDEQ_GAIN_0 +197 0x4848 //RX_FDEQ_GAIN_1 +198 0x4848 //RX_FDEQ_GAIN_2 +199 0x4848 //RX_FDEQ_GAIN_3 +200 0x4848 //RX_FDEQ_GAIN_4 +201 0x4848 //RX_FDEQ_GAIN_5 +202 0x4848 //RX_FDEQ_GAIN_6 +203 0x4848 //RX_FDEQ_GAIN_7 +204 0x4848 //RX_FDEQ_GAIN_8 +205 0x4848 //RX_FDEQ_GAIN_9 +206 0x4848 //RX_FDEQ_GAIN_10 +207 0x4848 //RX_FDEQ_GAIN_11 +208 0x4848 //RX_FDEQ_GAIN_12 +209 0x4848 //RX_FDEQ_GAIN_13 +210 0x4848 //RX_FDEQ_GAIN_14 +211 0x4848 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0202 //RX_FDEQ_BIN_0 +221 0x0203 //RX_FDEQ_BIN_1 +222 0x0303 //RX_FDEQ_BIN_2 +223 0x0304 //RX_FDEQ_BIN_3 +224 0x0405 //RX_FDEQ_BIN_4 +225 0x0506 //RX_FDEQ_BIN_5 +226 0x0708 //RX_FDEQ_BIN_6 +227 0x090A //RX_FDEQ_BIN_7 +228 0x0B0C //RX_FDEQ_BIN_8 +229 0x0D0E //RX_FDEQ_BIN_9 +230 0x1013 //RX_FDEQ_BIN_10 +231 0x1719 //RX_FDEQ_BIN_11 +232 0x1B1E //RX_FDEQ_BIN_12 +233 0x1E1E //RX_FDEQ_BIN_13 +234 0x1E28 //RX_FDEQ_BIN_14 +235 0x282C //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x4000 //RX_FDEQ_RESRV_0 +245 0x0320 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0030 //RX_FDDRC_BAND_MARGIN_1 +248 0x0050 //RX_FDDRC_BAND_MARGIN_2 +249 0x0080 //RX_FDDRC_BAND_MARGIN_3 +250 0x0007 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x5000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x6400 //RX_FDDRC_THRD_3_2 +258 0x6400 //RX_FDDRC_THRD_3_3 +259 0x2000 //RX_FDDRC_SLANT_0_0 +260 0x2000 //RX_FDDRC_SLANT_0_1 +261 0x2000 //RX_FDDRC_SLANT_0_2 +262 0x2000 //RX_FDDRC_SLANT_0_3 +263 0x5333 //RX_FDDRC_SLANT_1_0 +264 0x5333 //RX_FDDRC_SLANT_1_1 +265 0x5333 //RX_FDDRC_SLANT_1_2 +266 0x5333 //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +286 0x0013 //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 +#VOL 2 +163 0x5000 //RX_TDDRC_ALPHA_UP_1 +164 0x5000 //RX_TDDRC_ALPHA_UP_2 +165 0x5000 //RX_TDDRC_ALPHA_UP_3 +166 0x2000 //RX_TDDRC_ALPHA_UP_4 +184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +190 0x65AD //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +269 0x0000 //RX_TDDRC_THRD_0 +270 0x0000 //RX_TDDRC_THRD_1 +271 0x1A00 //RX_TDDRC_THRD_2 +272 0x1A00 //RX_TDDRC_THRD_3 +273 0x3000 //RX_TDDRC_SLANT_0 +274 0x7EB8 //RX_TDDRC_SLANT_1 +275 0x5000 //RX_TDDRC_ALPHA_UP_0 +276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x199A //RX_TDDRC_HMNC_GAIN +279 0x0001 //RX_TDDRC_SMT_FLAG +280 0x0CCD //RX_TDDRC_SMT_W +281 0x01C8 //RX_TDDRC_DRC_GAIN +195 0x0020 //RX_FDEQ_SUBNUM +196 0x4848 //RX_FDEQ_GAIN_0 +197 0x4848 //RX_FDEQ_GAIN_1 +198 0x4848 //RX_FDEQ_GAIN_2 +199 0x4848 //RX_FDEQ_GAIN_3 +200 0x4848 //RX_FDEQ_GAIN_4 +201 0x4848 //RX_FDEQ_GAIN_5 +202 0x4848 //RX_FDEQ_GAIN_6 +203 0x4848 //RX_FDEQ_GAIN_7 +204 0x4848 //RX_FDEQ_GAIN_8 +205 0x4848 //RX_FDEQ_GAIN_9 +206 0x4848 //RX_FDEQ_GAIN_10 +207 0x4848 //RX_FDEQ_GAIN_11 +208 0x4848 //RX_FDEQ_GAIN_12 +209 0x4848 //RX_FDEQ_GAIN_13 +210 0x4848 //RX_FDEQ_GAIN_14 +211 0x4848 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0202 //RX_FDEQ_BIN_0 +221 0x0203 //RX_FDEQ_BIN_1 +222 0x0303 //RX_FDEQ_BIN_2 +223 0x0304 //RX_FDEQ_BIN_3 +224 0x0405 //RX_FDEQ_BIN_4 +225 0x0506 //RX_FDEQ_BIN_5 +226 0x0708 //RX_FDEQ_BIN_6 +227 0x090A //RX_FDEQ_BIN_7 +228 0x0B0C //RX_FDEQ_BIN_8 +229 0x0D0E //RX_FDEQ_BIN_9 +230 0x1013 //RX_FDEQ_BIN_10 +231 0x1719 //RX_FDEQ_BIN_11 +232 0x1B1E //RX_FDEQ_BIN_12 +233 0x1E1E //RX_FDEQ_BIN_13 +234 0x1E28 //RX_FDEQ_BIN_14 +235 0x282C //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x4000 //RX_FDEQ_RESRV_0 +245 0x0320 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0030 //RX_FDDRC_BAND_MARGIN_1 +248 0x0050 //RX_FDDRC_BAND_MARGIN_2 +249 0x0080 //RX_FDDRC_BAND_MARGIN_3 +250 0x0007 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x5000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x6400 //RX_FDDRC_THRD_3_2 +258 0x6400 //RX_FDDRC_THRD_3_3 +259 0x2000 //RX_FDDRC_SLANT_0_0 +260 0x2000 //RX_FDDRC_SLANT_0_1 +261 0x2000 //RX_FDDRC_SLANT_0_2 +262 0x2000 //RX_FDDRC_SLANT_0_3 +263 0x5333 //RX_FDDRC_SLANT_1_0 +264 0x5333 //RX_FDDRC_SLANT_1_1 +265 0x5333 //RX_FDDRC_SLANT_1_2 +266 0x5333 //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +286 0x0020 //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 +#VOL 3 +163 0x5000 //RX_TDDRC_ALPHA_UP_1 +164 0x5000 //RX_TDDRC_ALPHA_UP_2 +165 0x5000 //RX_TDDRC_ALPHA_UP_3 +166 0x2000 //RX_TDDRC_ALPHA_UP_4 +184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +190 0x65AD //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +269 0x0000 //RX_TDDRC_THRD_0 +270 0x0000 //RX_TDDRC_THRD_1 +271 0x1A00 //RX_TDDRC_THRD_2 +272 0x1A00 //RX_TDDRC_THRD_3 +273 0x3000 //RX_TDDRC_SLANT_0 +274 0x7EB8 //RX_TDDRC_SLANT_1 +275 0x5000 //RX_TDDRC_ALPHA_UP_0 +276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x199A //RX_TDDRC_HMNC_GAIN +279 0x0001 //RX_TDDRC_SMT_FLAG +280 0x0CCD //RX_TDDRC_SMT_W +281 0x01C8 //RX_TDDRC_DRC_GAIN +195 0x0020 //RX_FDEQ_SUBNUM +196 0x4848 //RX_FDEQ_GAIN_0 +197 0x4848 //RX_FDEQ_GAIN_1 +198 0x4848 //RX_FDEQ_GAIN_2 +199 0x4848 //RX_FDEQ_GAIN_3 +200 0x4848 //RX_FDEQ_GAIN_4 +201 0x4848 //RX_FDEQ_GAIN_5 +202 0x4848 //RX_FDEQ_GAIN_6 +203 0x4848 //RX_FDEQ_GAIN_7 +204 0x4848 //RX_FDEQ_GAIN_8 +205 0x4848 //RX_FDEQ_GAIN_9 +206 0x4848 //RX_FDEQ_GAIN_10 +207 0x4848 //RX_FDEQ_GAIN_11 +208 0x4848 //RX_FDEQ_GAIN_12 +209 0x4848 //RX_FDEQ_GAIN_13 +210 0x4848 //RX_FDEQ_GAIN_14 +211 0x4848 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0202 //RX_FDEQ_BIN_0 +221 0x0203 //RX_FDEQ_BIN_1 +222 0x0303 //RX_FDEQ_BIN_2 +223 0x0304 //RX_FDEQ_BIN_3 +224 0x0405 //RX_FDEQ_BIN_4 +225 0x0506 //RX_FDEQ_BIN_5 +226 0x0708 //RX_FDEQ_BIN_6 +227 0x090A //RX_FDEQ_BIN_7 +228 0x0B0C //RX_FDEQ_BIN_8 +229 0x0D0E //RX_FDEQ_BIN_9 +230 0x1013 //RX_FDEQ_BIN_10 +231 0x1719 //RX_FDEQ_BIN_11 +232 0x1B1E //RX_FDEQ_BIN_12 +233 0x1E1E //RX_FDEQ_BIN_13 +234 0x1E28 //RX_FDEQ_BIN_14 +235 0x282C //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x4000 //RX_FDEQ_RESRV_0 +245 0x0320 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0030 //RX_FDDRC_BAND_MARGIN_1 +248 0x0050 //RX_FDDRC_BAND_MARGIN_2 +249 0x0080 //RX_FDDRC_BAND_MARGIN_3 +250 0x0007 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x5000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x6400 //RX_FDDRC_THRD_3_2 +258 0x6400 //RX_FDDRC_THRD_3_3 +259 0x2000 //RX_FDDRC_SLANT_0_0 +260 0x2000 //RX_FDDRC_SLANT_0_1 +261 0x2000 //RX_FDDRC_SLANT_0_2 +262 0x2000 //RX_FDDRC_SLANT_0_3 +263 0x5333 //RX_FDDRC_SLANT_1_0 +264 0x5333 //RX_FDDRC_SLANT_1_1 +265 0x5333 //RX_FDDRC_SLANT_1_2 +266 0x5333 //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +286 0x0036 //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 +#VOL 4 +163 0x5000 //RX_TDDRC_ALPHA_UP_1 +164 0x5000 //RX_TDDRC_ALPHA_UP_2 +165 0x5000 //RX_TDDRC_ALPHA_UP_3 +166 0x2000 //RX_TDDRC_ALPHA_UP_4 +184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +190 0x65AD //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +269 0x0000 //RX_TDDRC_THRD_0 +270 0x0000 //RX_TDDRC_THRD_1 +271 0x1A00 //RX_TDDRC_THRD_2 +272 0x1A00 //RX_TDDRC_THRD_3 +273 0x3000 //RX_TDDRC_SLANT_0 +274 0x7EB8 //RX_TDDRC_SLANT_1 +275 0x5000 //RX_TDDRC_ALPHA_UP_0 +276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x199A //RX_TDDRC_HMNC_GAIN +279 0x0001 //RX_TDDRC_SMT_FLAG +280 0x0CCD //RX_TDDRC_SMT_W +281 0x01C8 //RX_TDDRC_DRC_GAIN +195 0x0020 //RX_FDEQ_SUBNUM +196 0x4848 //RX_FDEQ_GAIN_0 +197 0x4848 //RX_FDEQ_GAIN_1 +198 0x4848 //RX_FDEQ_GAIN_2 +199 0x4848 //RX_FDEQ_GAIN_3 +200 0x4848 //RX_FDEQ_GAIN_4 +201 0x4848 //RX_FDEQ_GAIN_5 +202 0x4848 //RX_FDEQ_GAIN_6 +203 0x4848 //RX_FDEQ_GAIN_7 +204 0x4848 //RX_FDEQ_GAIN_8 +205 0x4848 //RX_FDEQ_GAIN_9 +206 0x4848 //RX_FDEQ_GAIN_10 +207 0x4848 //RX_FDEQ_GAIN_11 +208 0x4848 //RX_FDEQ_GAIN_12 +209 0x4848 //RX_FDEQ_GAIN_13 +210 0x4848 //RX_FDEQ_GAIN_14 +211 0x4848 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0202 //RX_FDEQ_BIN_0 +221 0x0203 //RX_FDEQ_BIN_1 +222 0x0303 //RX_FDEQ_BIN_2 +223 0x0304 //RX_FDEQ_BIN_3 +224 0x0405 //RX_FDEQ_BIN_4 +225 0x0506 //RX_FDEQ_BIN_5 +226 0x0708 //RX_FDEQ_BIN_6 +227 0x090A //RX_FDEQ_BIN_7 +228 0x0B0C //RX_FDEQ_BIN_8 +229 0x0D0E //RX_FDEQ_BIN_9 +230 0x1013 //RX_FDEQ_BIN_10 +231 0x1719 //RX_FDEQ_BIN_11 +232 0x1B1E //RX_FDEQ_BIN_12 +233 0x1E1E //RX_FDEQ_BIN_13 +234 0x1E28 //RX_FDEQ_BIN_14 +235 0x282C //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x4000 //RX_FDEQ_RESRV_0 +245 0x0320 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0030 //RX_FDDRC_BAND_MARGIN_1 +248 0x0050 //RX_FDDRC_BAND_MARGIN_2 +249 0x0080 //RX_FDDRC_BAND_MARGIN_3 +250 0x0007 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x5000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x6400 //RX_FDDRC_THRD_3_2 +258 0x6400 //RX_FDDRC_THRD_3_3 +259 0x2000 //RX_FDDRC_SLANT_0_0 +260 0x2000 //RX_FDDRC_SLANT_0_1 +261 0x2000 //RX_FDDRC_SLANT_0_2 +262 0x2000 //RX_FDDRC_SLANT_0_3 +263 0x5333 //RX_FDDRC_SLANT_1_0 +264 0x5333 //RX_FDDRC_SLANT_1_1 +265 0x5333 //RX_FDDRC_SLANT_1_2 +266 0x5333 //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +286 0x005B //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 +#VOL 5 +163 0x5000 //RX_TDDRC_ALPHA_UP_1 +164 0x5000 //RX_TDDRC_ALPHA_UP_2 +165 0x5000 //RX_TDDRC_ALPHA_UP_3 +166 0x2000 //RX_TDDRC_ALPHA_UP_4 +184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +190 0x65AD //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +269 0x0000 //RX_TDDRC_THRD_0 +270 0x0000 //RX_TDDRC_THRD_1 +271 0x1A00 //RX_TDDRC_THRD_2 +272 0x1A00 //RX_TDDRC_THRD_3 +273 0x3000 //RX_TDDRC_SLANT_0 +274 0x7EB8 //RX_TDDRC_SLANT_1 +275 0x5000 //RX_TDDRC_ALPHA_UP_0 +276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x199A //RX_TDDRC_HMNC_GAIN +279 0x0001 //RX_TDDRC_SMT_FLAG +280 0x0CCD //RX_TDDRC_SMT_W +281 0x01C8 //RX_TDDRC_DRC_GAIN +195 0x0020 //RX_FDEQ_SUBNUM +196 0x4848 //RX_FDEQ_GAIN_0 +197 0x4848 //RX_FDEQ_GAIN_1 +198 0x4848 //RX_FDEQ_GAIN_2 +199 0x4848 //RX_FDEQ_GAIN_3 +200 0x4848 //RX_FDEQ_GAIN_4 +201 0x4848 //RX_FDEQ_GAIN_5 +202 0x4848 //RX_FDEQ_GAIN_6 +203 0x4848 //RX_FDEQ_GAIN_7 +204 0x4848 //RX_FDEQ_GAIN_8 +205 0x4848 //RX_FDEQ_GAIN_9 +206 0x4848 //RX_FDEQ_GAIN_10 +207 0x4848 //RX_FDEQ_GAIN_11 +208 0x4848 //RX_FDEQ_GAIN_12 +209 0x4848 //RX_FDEQ_GAIN_13 +210 0x4848 //RX_FDEQ_GAIN_14 +211 0x4848 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0202 //RX_FDEQ_BIN_0 +221 0x0203 //RX_FDEQ_BIN_1 +222 0x0303 //RX_FDEQ_BIN_2 +223 0x0304 //RX_FDEQ_BIN_3 +224 0x0405 //RX_FDEQ_BIN_4 +225 0x0506 //RX_FDEQ_BIN_5 +226 0x0708 //RX_FDEQ_BIN_6 +227 0x090A //RX_FDEQ_BIN_7 +228 0x0B0C //RX_FDEQ_BIN_8 +229 0x0D0E //RX_FDEQ_BIN_9 +230 0x1013 //RX_FDEQ_BIN_10 +231 0x1719 //RX_FDEQ_BIN_11 +232 0x1B1E //RX_FDEQ_BIN_12 +233 0x1E1E //RX_FDEQ_BIN_13 +234 0x1E28 //RX_FDEQ_BIN_14 +235 0x282C //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x4000 //RX_FDEQ_RESRV_0 +245 0x0320 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0030 //RX_FDDRC_BAND_MARGIN_1 +248 0x0050 //RX_FDDRC_BAND_MARGIN_2 +249 0x0080 //RX_FDDRC_BAND_MARGIN_3 +250 0x0007 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x5000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x6400 //RX_FDDRC_THRD_3_2 +258 0x6400 //RX_FDDRC_THRD_3_3 +259 0x2000 //RX_FDDRC_SLANT_0_0 +260 0x2000 //RX_FDDRC_SLANT_0_1 +261 0x2000 //RX_FDDRC_SLANT_0_2 +262 0x2000 //RX_FDDRC_SLANT_0_3 +263 0x5333 //RX_FDDRC_SLANT_1_0 +264 0x5333 //RX_FDDRC_SLANT_1_1 +265 0x5333 //RX_FDDRC_SLANT_1_2 +266 0x5333 //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +286 0x0099 //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 +#VOL 6 +163 0x5000 //RX_TDDRC_ALPHA_UP_1 +164 0x5000 //RX_TDDRC_ALPHA_UP_2 +165 0x5000 //RX_TDDRC_ALPHA_UP_3 +166 0x2000 //RX_TDDRC_ALPHA_UP_4 +184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +190 0x65AD //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +269 0x0000 //RX_TDDRC_THRD_0 +270 0x0000 //RX_TDDRC_THRD_1 +271 0x1A00 //RX_TDDRC_THRD_2 +272 0x1A00 //RX_TDDRC_THRD_3 +273 0x3000 //RX_TDDRC_SLANT_0 +274 0x7EB8 //RX_TDDRC_SLANT_1 +275 0x5000 //RX_TDDRC_ALPHA_UP_0 +276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x199A //RX_TDDRC_HMNC_GAIN +279 0x0001 //RX_TDDRC_SMT_FLAG +280 0x0CCD //RX_TDDRC_SMT_W +281 0x01C8 //RX_TDDRC_DRC_GAIN +195 0x0020 //RX_FDEQ_SUBNUM +196 0x4848 //RX_FDEQ_GAIN_0 +197 0x4848 //RX_FDEQ_GAIN_1 +198 0x4848 //RX_FDEQ_GAIN_2 +199 0x4848 //RX_FDEQ_GAIN_3 +200 0x4848 //RX_FDEQ_GAIN_4 +201 0x4848 //RX_FDEQ_GAIN_5 +202 0x4848 //RX_FDEQ_GAIN_6 +203 0x4848 //RX_FDEQ_GAIN_7 +204 0x4848 //RX_FDEQ_GAIN_8 +205 0x4848 //RX_FDEQ_GAIN_9 +206 0x4848 //RX_FDEQ_GAIN_10 +207 0x4848 //RX_FDEQ_GAIN_11 +208 0x4848 //RX_FDEQ_GAIN_12 +209 0x4848 //RX_FDEQ_GAIN_13 +210 0x4848 //RX_FDEQ_GAIN_14 +211 0x4848 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0202 //RX_FDEQ_BIN_0 +221 0x0203 //RX_FDEQ_BIN_1 +222 0x0303 //RX_FDEQ_BIN_2 +223 0x0304 //RX_FDEQ_BIN_3 +224 0x0405 //RX_FDEQ_BIN_4 +225 0x0506 //RX_FDEQ_BIN_5 +226 0x0708 //RX_FDEQ_BIN_6 +227 0x090A //RX_FDEQ_BIN_7 +228 0x0B0C //RX_FDEQ_BIN_8 +229 0x0D0E //RX_FDEQ_BIN_9 +230 0x1013 //RX_FDEQ_BIN_10 +231 0x1719 //RX_FDEQ_BIN_11 +232 0x1B1E //RX_FDEQ_BIN_12 +233 0x1E1E //RX_FDEQ_BIN_13 +234 0x1E28 //RX_FDEQ_BIN_14 +235 0x282C //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x4000 //RX_FDEQ_RESRV_0 +245 0x0320 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0030 //RX_FDDRC_BAND_MARGIN_1 +248 0x0050 //RX_FDDRC_BAND_MARGIN_2 +249 0x0080 //RX_FDDRC_BAND_MARGIN_3 +250 0x0007 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x5000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x6400 //RX_FDDRC_THRD_3_2 +258 0x6400 //RX_FDDRC_THRD_3_3 +259 0x2000 //RX_FDDRC_SLANT_0_0 +260 0x2000 //RX_FDDRC_SLANT_0_1 +261 0x2000 //RX_FDDRC_SLANT_0_2 +262 0x2000 //RX_FDDRC_SLANT_0_3 +263 0x5333 //RX_FDDRC_SLANT_1_0 +264 0x5333 //RX_FDDRC_SLANT_1_1 +265 0x5333 //RX_FDDRC_SLANT_1_2 +266 0x5333 //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +286 0x0100 //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 #CASE_NAME HEADSET-GOOGLE_CONDOR_HEADPHONE-VOICE_GENERIC-FB -#PARAM_MODE FULL -#PARAM_TYPE TX+RX -#TOTAL_CUSTOM_STEP 7 +#PARAM_MODE Full +#PARAM_TYPE TX+2RX +#TOTAL_CUSTOM_STEP 7+7 #TX 0 0x0001 //TX_OPERATION_MODE_0 1 0x0001 //TX_OPERATION_MODE_1 2 0x0033 //TX_PATCH_REG -3 0x4B7C //TX_SENDFUNC_MODE_0 +3 0x6B7C //TX_SENDFUNC_MODE_0 4 0x0001 //TX_SENDFUNC_MODE_1 -5 0x0003 //TX_NUM_MIC +5 0x0002 //TX_NUM_MIC 6 0x0004 //TX_SAMPLINGFREQ_SIG 7 0x0004 //TX_SAMPLINGFREQ_PROC 8 0x000A //TX_FRAME_SZ_SIG @@ -26339,15 +40079,15 @@ 18 0x0000 //TX_SYS_RESRV_2 19 0x0000 //TX_SYS_RESRV_3 20 0x0000 //TX_DIST2REF0 -21 0x00A4 //TX_DIST2REF1 -22 0x0017 //TX_DIST2REF_02 +21 0x009D //TX_DIST2REF1 +22 0x0010 //TX_DIST2REF_02 23 0x0000 //TX_DIST2REF_03 24 0x0000 //TX_DIST2REF_04 25 0x0000 //TX_DIST2REF_05 26 0x0000 //TX_MMIC -27 0x0FF7 //TX_PGA_0 -28 0x0FF7 //TX_PGA_1 -29 0x0FF7 //TX_PGA_2 +27 0x1000 //TX_PGA_0 +28 0x1000 //TX_PGA_1 +29 0x1000 //TX_PGA_2 30 0x0000 //TX_PGA_3 31 0x0000 //TX_PGA_4 32 0x0000 //TX_PGA_5 @@ -26483,7 +40223,7 @@ 162 0x7FFF //TX_MIN_EQ_RE_EST_10 163 0x7FFF //TX_MIN_EQ_RE_EST_11 164 0x7FFF //TX_MIN_EQ_RE_EST_12 -165 0x4000 //TX_LAMBDA_RE_EST +165 0x0700 //TX_LAMBDA_RE_EST 166 0x0CCD //TX_LAMBDA_CB_NLE 167 0x2000 //TX_C_POST_FLT 168 0x7FFF //TX_GAIN_NP @@ -26543,16 +40283,16 @@ 222 0x023E //TX_ADPT_STRICT_H 223 0x0BB8 //TX_RATIO_DT_L_TH_LOW 224 0x3A98 //TX_RATIO_DT_H_TH_LOW -225 0x1770 //TX_RATIO_DT_L_TH_HIGH +225 0x1194 //TX_RATIO_DT_L_TH_HIGH 226 0x4E20 //TX_RATIO_DT_H_TH_HIGH 227 0x09C4 //TX_RATIO_DT_L0_TH -228 0x2000 //TX_B_POST_FILT_ECHO_L +228 0x7FFF //TX_B_POST_FILT_ECHO_L 229 0x2000 //TX_B_POST_FILT_ECHO_H 230 0x0200 //TX_MIN_G_CTRL_ECHO 231 0x1000 //TX_B_LESSCUT_RTO_ECHO -232 0x0000 //TX_EPD_OFFSET_00 +232 0x0063 //TX_EPD_OFFSET_00 233 0x0000 //TX_EPD_OFFST_01 -234 0x1388 //TX_RATIO_DT_L0_TH_HIGH +234 0x0A28 //TX_RATIO_DT_L0_TH_HIGH 235 0x3A98 //TX_RATIO_DT_H_TH_CUT 236 0x7FFF //TX_MIN_EQ_RE_EST_13 237 0x0000 //TX_DTD_THR1_7 @@ -26560,7 +40300,7 @@ 239 0x0800 //TX_DT_RESRV_7 240 0x0800 //TX_DT_RESRV_8 241 0x0000 //TX_DT_RESRV_9 -242 0xF800 //TX_THR_SN_EST_0 +242 0xF700 //TX_THR_SN_EST_0 243 0xFA00 //TX_THR_SN_EST_1 244 0xFA00 //TX_THR_SN_EST_2 245 0xFB00 //TX_THR_SN_EST_3 @@ -26569,11 +40309,11 @@ 248 0xF800 //TX_THR_SN_EST_6 249 0xF800 //TX_THR_SN_EST_7 250 0x0100 //TX_DELTA_THR_SN_EST_0 -251 0x0200 //TX_DELTA_THR_SN_EST_1 -252 0x0100 //TX_DELTA_THR_SN_EST_2 -253 0x0200 //TX_DELTA_THR_SN_EST_3 +251 0x0100 //TX_DELTA_THR_SN_EST_1 +252 0x0200 //TX_DELTA_THR_SN_EST_2 +253 0x0100 //TX_DELTA_THR_SN_EST_3 254 0x0100 //TX_DELTA_THR_SN_EST_4 -255 0x0100 //TX_DELTA_THR_SN_EST_5 +255 0x0200 //TX_DELTA_THR_SN_EST_5 256 0x0200 //TX_DELTA_THR_SN_EST_6 257 0x0200 //TX_DELTA_THR_SN_EST_7 258 0x4000 //TX_LAMBDA_NN_EST_0 @@ -26601,11 +40341,11 @@ 280 0x1000 //TX_B_POST_FLT_1 281 0x0010 //TX_NS_LVL_CTRL_0 282 0x0014 //TX_NS_LVL_CTRL_1 -283 0x0014 //TX_NS_LVL_CTRL_2 -284 0x0018 //TX_NS_LVL_CTRL_3 -285 0x0016 //TX_NS_LVL_CTRL_4 -286 0x0014 //TX_NS_LVL_CTRL_5 -287 0x0011 //TX_NS_LVL_CTRL_6 +283 0x0018 //TX_NS_LVL_CTRL_2 +284 0x0016 //TX_NS_LVL_CTRL_3 +285 0x0014 //TX_NS_LVL_CTRL_4 +286 0x0011 //TX_NS_LVL_CTRL_5 +287 0x0014 //TX_NS_LVL_CTRL_6 288 0x0011 //TX_NS_LVL_CTRL_7 289 0x000F //TX_MIN_GAIN_S_0 290 0x0010 //TX_MIN_GAIN_S_1 @@ -26623,8 +40363,8 @@ 302 0x4000 //TX_SNRI_SUP_2 303 0x4000 //TX_SNRI_SUP_3 304 0x4000 //TX_SNRI_SUP_4 -305 0x4000 //TX_SNRI_SUP_5 -306 0x50C0 //TX_SNRI_SUP_6 +305 0x50C0 //TX_SNRI_SUP_5 +306 0x4000 //TX_SNRI_SUP_6 307 0x7FFF //TX_SNRI_SUP_7 308 0x7FFF //TX_THR_LFNS 309 0x0018 //TX_G_LFNS @@ -26633,19 +40373,19 @@ 312 0x7FFF //TX_A_POST_FILT_0 313 0x2000 //TX_A_POST_FILT_1 314 0x5000 //TX_A_POST_FILT_S_0 -315 0x6000 //TX_A_POST_FILT_S_1 -316 0x4C00 //TX_A_POST_FILT_S_2 -317 0x4000 //TX_A_POST_FILT_S_3 -318 0x6000 //TX_A_POST_FILT_S_4 -319 0x4000 //TX_A_POST_FILT_S_5 -320 0x5000 //TX_A_POST_FILT_S_6 +315 0x4C00 //TX_A_POST_FILT_S_1 +316 0x4000 //TX_A_POST_FILT_S_2 +317 0x6000 //TX_A_POST_FILT_S_3 +318 0x4000 //TX_A_POST_FILT_S_4 +319 0x5000 //TX_A_POST_FILT_S_5 +320 0x6000 //TX_A_POST_FILT_S_6 321 0x7000 //TX_A_POST_FILT_S_7 322 0x2000 //TX_B_POST_FILT_0 -323 0x1000 //TX_B_POST_FILT_1 +323 0x2000 //TX_B_POST_FILT_1 324 0x2000 //TX_B_POST_FILT_2 -325 0x2000 //TX_B_POST_FILT_3 +325 0x4000 //TX_B_POST_FILT_3 326 0x4000 //TX_B_POST_FILT_4 -327 0x4000 //TX_B_POST_FILT_5 +327 0x1000 //TX_B_POST_FILT_5 328 0x1000 //TX_B_POST_FILT_6 329 0x2000 //TX_B_POST_FILT_7 330 0x4000 //TX_B_LESSCUT_RTO_S_0 @@ -26653,26 +40393,26 @@ 332 0x7FFF //TX_B_LESSCUT_RTO_S_2 333 0x7FFF //TX_B_LESSCUT_RTO_S_3 334 0x7FFF //TX_B_LESSCUT_RTO_S_4 -335 0x7FFF //TX_B_LESSCUT_RTO_S_5 -336 0x6000 //TX_B_LESSCUT_RTO_S_6 +335 0x6000 //TX_B_LESSCUT_RTO_S_5 +336 0x7FFF //TX_B_LESSCUT_RTO_S_6 337 0x7FFF //TX_B_LESSCUT_RTO_S_7 338 0x7C00 //TX_LAMBDA_PFILT 339 0x7C00 //TX_LAMBDA_PFILT_S_0 340 0x7C00 //TX_LAMBDA_PFILT_S_1 -341 0x7C00 //TX_LAMBDA_PFILT_S_2 -342 0x7A00 //TX_LAMBDA_PFILT_S_3 +341 0x7A00 //TX_LAMBDA_PFILT_S_2 +342 0x7C00 //TX_LAMBDA_PFILT_S_3 343 0x7C00 //TX_LAMBDA_PFILT_S_4 344 0x7C00 //TX_LAMBDA_PFILT_S_5 345 0x7C00 //TX_LAMBDA_PFILT_S_6 346 0x7C00 //TX_LAMBDA_PFILT_S_7 -347 0x0000 //TX_K_PEPPER +347 0x0180 //TX_K_PEPPER 348 0x0800 //TX_A_PEPPER 349 0x1EAA //TX_K_PEPPER_HF 350 0x0600 //TX_A_PEPPER_HF 351 0x0001 //TX_HMNC_BST_FLG 352 0x0200 //TX_HMNC_BST_THR -353 0x0200 //TX_DT_BINVAD_TH_0 -354 0x0200 //TX_DT_BINVAD_TH_1 +353 0x2000 //TX_DT_BINVAD_TH_0 +354 0x0800 //TX_DT_BINVAD_TH_1 355 0x0200 //TX_DT_BINVAD_TH_2 356 0x0200 //TX_DT_BINVAD_TH_3 357 0x1F40 //TX_DT_BINVAD_ENDF @@ -26685,7 +40425,7 @@ 364 0x0000 //TX_K_APT 365 0x0001 //TX_NOISEDET 366 0x0064 //TX_NDETCT -367 0x0050 //TX_NOISE_TH_0 +367 0x04E8 //TX_NOISE_TH_0 368 0x7FFF //TX_NOISE_TH_0_2 369 0x7FFF //TX_NOISE_TH_0_3 370 0x07D0 //TX_NOISE_TH_1 @@ -26697,11 +40437,11 @@ 376 0x0000 //TX_NOISE_TH_5_3 377 0x7FFF //TX_NOISE_TH_5_4 378 0x2710 //TX_NOISE_TH_6 -379 0x0033 //TX_MINENOISE_TH -380 0x4000 //TX_MINENOISE_MIC0_TH_MTS -381 0xFFEE //TX_MINENOISE_MIC0_TH_EXP -382 0x6000 //TX_MINENOISE_MIC0_S_TH_MTS -383 0xFFF3 //TX_MINENOISE_MIC0_S_TH_EXP +379 0x02BC //TX_MINENOISE_TH +380 0xD508 //TX_MORENS_TFMASK_TH +381 0x0001 //TX_DRC_QUIET_FLOOR +382 0x3A98 //TX_RATIODTL_CUT_TH +383 0x1482 //TX_DT_CUT_K1 384 0x0666 //TX_OUT_ENER_S_TH_CLEAN 385 0x0666 //TX_OUT_ENER_S_TH_LESSCLEAN 386 0x0333 //TX_OUT_ENER_S_TH_NOISY @@ -26709,22 +40449,22 @@ 388 0x0333 //TX_OUT_ENER_TH_SPEECH 389 0x2000 //TX_SN_NPB_GAIN 390 0x0000 //TX_NN_NPB_GAIN -391 0x0000 //TX_CSX_ALPHA_0 -392 0x0000 //TX_CSX_ALPHA_1 -393 0x0000 //TX_CSX_ALPHA_2 -394 0x0000 //TX_CSX_ALPHA_3 -395 0x0800 //TX_MU_ARSP_EST -396 0x00C8 //TX_P_OUTBEAM_MIN_TH +391 0x7FFF //TX_POST_MASK_SUP_HSNE +392 0x1388 //TX_TAIL_DET_TH +393 0x4000 //TX_B_LESSCUT_RTO_WTA +394 0x0000 //TX_MEL_G_R +395 0x0080 //TX_SUPHIGH_TH +396 0x0000 //TX_MASK_G_R 397 0x0002 //TX_EXTRA_NS_L -398 0x0800 //TX_EXTRA_NS_A -399 0x0005 //TX_VR_NOISE_FLOOR_TH +398 0x1800 //TX_C_POST_FLT_MASK +399 0x7FFF //TX_A_POST_FLT_WNS 400 0x0148 //TX_MIN_G_LOW300HZ -401 0x0002 //TX_MAXLEVEL_CNG +401 0x0004 //TX_MAXLEVEL_CNG 402 0x00B4 //TX_STN_NOISE_TH 403 0x4000 //TX_POST_MASK_SUP 404 0x7FFF //TX_POST_MASK_ADJUST 405 0x00C8 //TX_NS_ENOISE_MIC0_TH -406 0x0033 //TX_MINENOISE_MIC0_TH +406 0x04E7 //TX_MINENOISE_MIC0_TH 407 0x012C //TX_MINENOISE_MIC0_S_TH 408 0x7FFF //TX_MIN_G_CTRL_SSNS 409 0x0000 //TX_METAL_RTO_THR @@ -26832,16 +40572,16 @@ 511 0x6666 //TX_MIC_TO_BFGAIN 512 0x0000 //TX_MICTOBFGAIN0 513 0x0000 //TX_FASTMUE_TH -514 0x0000 //TX_DERVB_LEN_0 -515 0x0000 //TX_DERVB_LEN_1 -516 0x0000 //TX_RHO_DERVB -517 0x0000 //TX_MIC_INDX_DERVB -518 0x0000 //TX_MU_DERVB -519 0x0000 //TX_DR_RESRV_0 -520 0x0000 //TX_DR_RESRV_1 -521 0x0000 //TX_DR_RESRV_2 -522 0x0000 //TX_DR_RESRV_3 -523 0x0000 //TX_DR_RESRV_4 +514 0xC000 //TX_DEREVERB_LF_MU +515 0xC000 //TX_DEREVERB_HF_MU +516 0xCCCC //TX_DEREVERB_DELAY +517 0xD999 //TX_DEREVERB_COEF_LEN +518 0x1F40 //TX_DEREVERB_DNR +519 0x0000 //TX_DEREVERB_ALPHA +520 0x0000 //TX_DEREVERB_BETA +521 0x0000 //TX_GSC_RTOL_TH +522 0x7000 //TX_GSC_RTOH_TH +523 0x0064 //TX_WIDE2_MEANHTH 524 0x0000 //TX_DR_RESRV_5 525 0x0000 //TX_DR_RESRV_6 526 0x0000 //TX_DR_RESRV_7 @@ -26888,19 +40628,19 @@ 567 0x4848 //TX_FDEQ_GAIN_0 568 0x4848 //TX_FDEQ_GAIN_1 569 0x4848 //TX_FDEQ_GAIN_2 -570 0x4848 //TX_FDEQ_GAIN_3 -571 0x4848 //TX_FDEQ_GAIN_4 -572 0x4848 //TX_FDEQ_GAIN_5 -573 0x4848 //TX_FDEQ_GAIN_6 -574 0x4848 //TX_FDEQ_GAIN_7 -575 0x4848 //TX_FDEQ_GAIN_8 -576 0x4853 //TX_FDEQ_GAIN_9 -577 0x5450 //TX_FDEQ_GAIN_10 -578 0x7465 //TX_FDEQ_GAIN_11 -579 0x807F //TX_FDEQ_GAIN_12 -580 0x82C4 //TX_FDEQ_GAIN_13 -581 0xC4C4 //TX_FDEQ_GAIN_14 -582 0xC4C4 //TX_FDEQ_GAIN_15 +570 0x484C //TX_FDEQ_GAIN_3 +571 0x4C4C //TX_FDEQ_GAIN_4 +572 0x544C //TX_FDEQ_GAIN_5 +573 0x5454 //TX_FDEQ_GAIN_6 +574 0x5454 //TX_FDEQ_GAIN_7 +575 0x585A //TX_FDEQ_GAIN_8 +576 0x5C5C //TX_FDEQ_GAIN_9 +577 0x6068 //TX_FDEQ_GAIN_10 +578 0x8894 //TX_FDEQ_GAIN_11 +579 0x94B4 //TX_FDEQ_GAIN_12 +580 0xB4C7 //TX_FDEQ_GAIN_13 +581 0xC7C6 //TX_FDEQ_GAIN_14 +582 0xC6C6 //TX_FDEQ_GAIN_15 583 0x4848 //TX_FDEQ_GAIN_16 584 0x4848 //TX_FDEQ_GAIN_17 585 0x4848 //TX_FDEQ_GAIN_18 @@ -26934,24 +40674,24 @@ 613 0x0000 //TX_FDEQ_BIN_22 614 0x0000 //TX_FDEQ_BIN_23 615 0x0000 //TX_FDEQ_PADDING -616 0x0020 //TX_PREEQ_SUBNUM_MIC0 +616 0x0030 //TX_PREEQ_SUBNUM_MIC0 617 0x4848 //TX_PREEQ_GAIN_MIC0_0 618 0x4848 //TX_PREEQ_GAIN_MIC0_1 619 0x4848 //TX_PREEQ_GAIN_MIC0_2 620 0x4848 //TX_PREEQ_GAIN_MIC0_3 621 0x4848 //TX_PREEQ_GAIN_MIC0_4 622 0x4848 //TX_PREEQ_GAIN_MIC0_5 -623 0x4A4C //TX_PREEQ_GAIN_MIC0_6 -624 0x4E50 //TX_PREEQ_GAIN_MIC0_7 -625 0x5456 //TX_PREEQ_GAIN_MIC0_8 -626 0x585C //TX_PREEQ_GAIN_MIC0_9 -627 0x5C64 //TX_PREEQ_GAIN_MIC0_10 -628 0x7478 //TX_PREEQ_GAIN_MIC0_11 -629 0x705C //TX_PREEQ_GAIN_MIC0_12 -630 0x4838 //TX_PREEQ_GAIN_MIC0_13 -631 0x3C70 //TX_PREEQ_GAIN_MIC0_14 -632 0x4848 //TX_PREEQ_GAIN_MIC0_15 -633 0x4848 //TX_PREEQ_GAIN_MIC0_16 +623 0x4849 //TX_PREEQ_GAIN_MIC0_6 +624 0x4A4B //TX_PREEQ_GAIN_MIC0_7 +625 0x4C4B //TX_PREEQ_GAIN_MIC0_8 +626 0x4A48 //TX_PREEQ_GAIN_MIC0_9 +627 0x4B4C //TX_PREEQ_GAIN_MIC0_10 +628 0x4C4B //TX_PREEQ_GAIN_MIC0_11 +629 0x4838 //TX_PREEQ_GAIN_MIC0_12 +630 0x3858 //TX_PREEQ_GAIN_MIC0_13 +631 0x7060 //TX_PREEQ_GAIN_MIC0_14 +632 0x9870 //TX_PREEQ_GAIN_MIC0_15 +633 0x5848 //TX_PREEQ_GAIN_MIC0_16 634 0x4848 //TX_PREEQ_GAIN_MIC0_17 635 0x4848 //TX_PREEQ_GAIN_MIC0_18 636 0x4848 //TX_PREEQ_GAIN_MIC0_19 @@ -26965,17 +40705,17 @@ 644 0x0304 //TX_PREEQ_BIN_MIC0_3 645 0x0405 //TX_PREEQ_BIN_MIC0_4 646 0x0506 //TX_PREEQ_BIN_MIC0_5 -647 0x0708 //TX_PREEQ_BIN_MIC0_6 -648 0x0909 //TX_PREEQ_BIN_MIC0_7 -649 0x090B //TX_PREEQ_BIN_MIC0_8 +647 0x0808 //TX_PREEQ_BIN_MIC0_6 +648 0x0809 //TX_PREEQ_BIN_MIC0_7 +649 0x0A0A //TX_PREEQ_BIN_MIC0_8 650 0x0C10 //TX_PREEQ_BIN_MIC0_9 651 0x1013 //TX_PREEQ_BIN_MIC0_10 652 0x1414 //TX_PREEQ_BIN_MIC0_11 -653 0x1414 //TX_PREEQ_BIN_MIC0_12 -654 0x1C1E //TX_PREEQ_BIN_MIC0_13 -655 0x1E28 //TX_PREEQ_BIN_MIC0_14 -656 0x462C //TX_PREEQ_BIN_MIC0_15 -657 0x0000 //TX_PREEQ_BIN_MIC0_16 +653 0x261E //TX_PREEQ_BIN_MIC0_12 +654 0x1E14 //TX_PREEQ_BIN_MIC0_13 +655 0x1414 //TX_PREEQ_BIN_MIC0_14 +656 0x2814 //TX_PREEQ_BIN_MIC0_15 +657 0x4000 //TX_PREEQ_BIN_MIC0_16 658 0x0000 //TX_PREEQ_BIN_MIC0_17 659 0x0000 //TX_PREEQ_BIN_MIC0_18 660 0x0000 //TX_PREEQ_BIN_MIC0_19 @@ -26990,15 +40730,15 @@ 669 0x4848 //TX_PREEQ_GAIN_MIC1_3 670 0x4848 //TX_PREEQ_GAIN_MIC1_4 671 0x4848 //TX_PREEQ_GAIN_MIC1_5 -672 0x4848 //TX_PREEQ_GAIN_MIC1_6 -673 0x4848 //TX_PREEQ_GAIN_MIC1_7 -674 0x4848 //TX_PREEQ_GAIN_MIC1_8 -675 0x4848 //TX_PREEQ_GAIN_MIC1_9 -676 0x4848 //TX_PREEQ_GAIN_MIC1_10 -677 0x4848 //TX_PREEQ_GAIN_MIC1_11 -678 0x4848 //TX_PREEQ_GAIN_MIC1_12 -679 0x4848 //TX_PREEQ_GAIN_MIC1_13 -680 0x4848 //TX_PREEQ_GAIN_MIC1_14 +672 0x4645 //TX_PREEQ_GAIN_MIC1_6 +673 0x4442 //TX_PREEQ_GAIN_MIC1_7 +674 0x4140 //TX_PREEQ_GAIN_MIC1_8 +675 0x3E3D //TX_PREEQ_GAIN_MIC1_9 +676 0x3C3C //TX_PREEQ_GAIN_MIC1_10 +677 0x3C3C //TX_PREEQ_GAIN_MIC1_11 +678 0x3938 //TX_PREEQ_GAIN_MIC1_12 +679 0x3A3C //TX_PREEQ_GAIN_MIC1_13 +680 0x3C3E //TX_PREEQ_GAIN_MIC1_14 681 0x4848 //TX_PREEQ_GAIN_MIC1_15 682 0x4848 //TX_PREEQ_GAIN_MIC1_16 683 0x4848 //TX_PREEQ_GAIN_MIC1_17 @@ -27008,23 +40748,23 @@ 687 0x4848 //TX_PREEQ_GAIN_MIC1_21 688 0x4848 //TX_PREEQ_GAIN_MIC1_22 689 0x4848 //TX_PREEQ_GAIN_MIC1_23 -690 0x1812 //TX_PREEQ_BIN_MIC1_0 -691 0x0A0A //TX_PREEQ_BIN_MIC1_1 -692 0x0808 //TX_PREEQ_BIN_MIC1_2 -693 0x080A //TX_PREEQ_BIN_MIC1_3 -694 0x0B09 //TX_PREEQ_BIN_MIC1_4 -695 0x0A06 //TX_PREEQ_BIN_MIC1_5 -696 0x0606 //TX_PREEQ_BIN_MIC1_6 -697 0x0605 //TX_PREEQ_BIN_MIC1_7 -698 0x050A //TX_PREEQ_BIN_MIC1_8 -699 0x1505 //TX_PREEQ_BIN_MIC1_9 -700 0x0506 //TX_PREEQ_BIN_MIC1_10 -701 0x0615 //TX_PREEQ_BIN_MIC1_11 -702 0x1516 //TX_PREEQ_BIN_MIC1_12 -703 0x2021 //TX_PREEQ_BIN_MIC1_13 -704 0x2021 //TX_PREEQ_BIN_MIC1_14 -705 0x2021 //TX_PREEQ_BIN_MIC1_15 -706 0x0800 //TX_PREEQ_BIN_MIC1_16 +690 0x0202 //TX_PREEQ_BIN_MIC1_0 +691 0x0203 //TX_PREEQ_BIN_MIC1_1 +692 0x0303 //TX_PREEQ_BIN_MIC1_2 +693 0x0304 //TX_PREEQ_BIN_MIC1_3 +694 0x0405 //TX_PREEQ_BIN_MIC1_4 +695 0x0506 //TX_PREEQ_BIN_MIC1_5 +696 0x0808 //TX_PREEQ_BIN_MIC1_6 +697 0x0809 //TX_PREEQ_BIN_MIC1_7 +698 0x0A0A //TX_PREEQ_BIN_MIC1_8 +699 0x0C10 //TX_PREEQ_BIN_MIC1_9 +700 0x1013 //TX_PREEQ_BIN_MIC1_10 +701 0x1414 //TX_PREEQ_BIN_MIC1_11 +702 0x261E //TX_PREEQ_BIN_MIC1_12 +703 0x1E14 //TX_PREEQ_BIN_MIC1_13 +704 0x1414 //TX_PREEQ_BIN_MIC1_14 +705 0x2814 //TX_PREEQ_BIN_MIC1_15 +706 0x4000 //TX_PREEQ_BIN_MIC1_16 707 0x0000 //TX_PREEQ_BIN_MIC1_17 708 0x0000 //TX_PREEQ_BIN_MIC1_18 709 0x0000 //TX_PREEQ_BIN_MIC1_19 @@ -27109,7 +40849,7 @@ 788 0x7EB8 //TX_TDDRC_ALPHA_DWN_02 789 0x7EB8 //TX_TDDRC_ALPHA_DWN_03 790 0x7EB8 //TX_TDDRC_ALPHA_DWN_04 -791 0x7FFF //TX_TDDRC_TD_DRC_LIMIT +791 0x7214 //TX_TDDRC_TD_DRC_LIMIT 792 0x0800 //TX_TDDRC_POST_LIMIT_GAIN 793 0x0000 //TX_TDDRC_RESRV_0 794 0x0000 //TX_TDDRC_RESRV_1 @@ -27171,20 +40911,20 @@ 850 0x0000 //TX_FFP_RESRV_4 851 0x0000 //TX_FFP_RESRV_5 852 0x0000 //TX_FFP_RESRV_6 -853 0x0004 //TX_FILTINDX +853 0x0002 //TX_FILTINDX 854 0x0004 //TX_TDDRC_THRD_0 855 0x0016 //TX_TDDRC_THRD_1 -856 0x1900 //TX_TDDRC_THRD_2 -857 0x1900 //TX_TDDRC_THRD_3 -858 0x3000 //TX_TDDRC_SLANT_0 -859 0x7B00 //TX_TDDRC_SLANT_1 +856 0x1800 //TX_TDDRC_THRD_2 +857 0x1800 //TX_TDDRC_THRD_3 +858 0x7FFF //TX_TDDRC_SLANT_0 +859 0x7FFF //TX_TDDRC_SLANT_1 860 0x0C00 //TX_TDDRC_ALPHA_UP_00 861 0x7EB8 //TX_TDDRC_ALPHA_DWN_00 862 0x0000 //TX_TDDRC_HMNC_FLAG 863 0x199A //TX_TDDRC_HMNC_GAIN 864 0x0000 //TX_TDDRC_SMT_FLAG 865 0x0CCD //TX_TDDRC_SMT_W -866 0x0A98 //TX_TDDRC_DRC_GAIN +866 0x0B39 //TX_TDDRC_DRC_GAIN 867 0x7FFF //TX_TDDRC_LMT_THRD 868 0x0000 //TX_TDDRC_LMT_ALPHA 869 0x0000 //TX_TFMASKLTH @@ -27209,14 +40949,79 @@ 888 0x0028 //TX_FASTNS_ARSPC_TH 889 0xC000 //TX_FASTNS_MASK5_TH 890 0x4848 //TX_POSTSSA_MIN_G_VR_MASK -891 0x1000 //TX_A_LESSCUT_RTO_MASK +891 0x7000 //TX_A_LESSCUT_RTO_MASK 892 0x1770 //TX_FASTNS_NOISETH 893 0xC000 //TX_FASTNS_SSA_THLFL 894 0xC000 //TX_FASTNS_SSA_THHFL 895 0xCCCC //TX_FASTNS_SSA_THLFH 896 0xD999 //TX_FASTNS_SSA_THHFH +897 0x2339 //TX_SENDFUNC_REG_MICMUTE +898 0x0021 //TX_SENDFUNC_REG_MICMUTE1 +899 0x02BC //TX_MICMUTE_RATIO_THR +900 0x0140 //TX_MICMUTE_AMP_THR +901 0x0004 //TX_MICMUTE_HPF_IND +902 0x00C0 //TX_MICMUTE_LOG_EYR_TH +903 0x0008 //TX_MICMUTE_CVG_TIME +904 0x0008 //TX_MICMUTE_RELEASE_TIME +905 0x01FE //TX_MIC_VOLUME_MIC0MUTE +906 0x0020 //TX_MICMUTE_EPD_OFFSET_0 +907 0x001E //TX_MICMUTE_FRQ_AEC_L +908 0x7999 //TX_MICMUTE_EAD_THR +909 0x7FFF //TX_MICMUTE_LAMBDA_CB_NLE +910 0x7FFF //TX_MICMUTE_LAMBDA_RE_EST +911 0x4000 //TX_DTD_THR1_MICMUTE_0 +912 0x7000 //TX_DTD_THR1_MICMUTE_1 +913 0x7FFF //TX_DTD_THR1_MICMUTE_2 +914 0x7FFF //TX_DTD_THR1_MICMUTE_3 +915 0x6CCC //TX_DTD_THR2_MICMUTE_0 +916 0x0400 //TX_MICMUTE_MIN_EQ_RE_EST_0 +917 0x0400 //TX_MICMUTE_MIN_EQ_RE_EST_1 +918 0x1000 //TX_MICMUTE_MIN_EQ_RE_EST_2 +919 0x7FFF //TX_MICMUTE_MIN_EQ_RE_EST_3 +920 0x7FFF //TX_MICMUTE_MIN_EQ_RE_EST_4 +921 0x4000 //TX_MICMUTE_C_POST_FLT +922 0x03E8 //TX_MICMUTE_DT_CUT_K +923 0x0001 //TX_MICMUTE_DT_CUT_THR +924 0x03E8 //TX_MICMUTE_DT_CUT_K2 +925 0x0001 //TX_MICMUTE_DT_CUT_THR2 +926 0x0064 //TX_MICMUTE_DT2_HOLD_N +927 0x1000 //TX_MICMUTE_RATIODTH_THCUT +928 0x1000 //TX_MICMUTE_B_POST_FLT_ECHOL +929 0x7FFF //TX_MICMUTE_B_POST_FLT_ECHOH +930 0x0400 //TX_MICMUTE_C_POST_FLT_MASK +931 0x7999 //TX_MICMUTE_RATIODTL_CUT_TH +932 0x0258 //TX_MICMUTE_DT_CUT_K1 +933 0x0800 //TX_MICMUTE_N2_SN_EST +934 0xFC00 //TX_MICMUTE_THR_SN_EST_0 +935 0x001C //TX_MICMUTE_MIN_G_CTRL_0 +936 0x6000 //TX_MICMUTE_A_POST_FILT_S_0 +937 0x7000 //TX_MICMUTE_B_POST_FILT_0 +938 0x2710 //TX_MIC1RUB_AMP_THR +939 0x0010 //TX_MIC1MUTE_RATIO_THR +940 0x0450 //TX_MIC1MUTE_AMP_THR +941 0x0008 //TX_MIC1MUTE_CVG_TIME +942 0x0008 //TX_MIC1MUTE_RELEASE_TIME +943 0x0000 //TX_AMS_RESRV_01 +944 0x0000 //TX_AMS_RESRV_02 +945 0x0000 //TX_AMS_RESRV_03 +946 0x0000 //TX_AMS_RESRV_04 +947 0x0000 //TX_AMS_RESRV_05 +948 0x0000 //TX_AMS_RESRV_06 +949 0x0000 //TX_AMS_RESRV_07 +950 0x0000 //TX_AMS_RESRV_08 +951 0x0000 //TX_AMS_RESRV_09 +952 0x0000 //TX_AMS_RESRV_10 +953 0x0000 //TX_AMS_RESRV_11 +954 0x0000 //TX_AMS_RESRV_12 +955 0x0000 //TX_AMS_RESRV_13 +956 0x0000 //TX_AMS_RESRV_14 +957 0x0000 //TX_AMS_RESRV_15 +958 0x0000 //TX_AMS_RESRV_16 +959 0x0000 //TX_AMS_RESRV_17 +960 0x0000 //TX_AMS_RESRV_18 +961 0x0000 //TX_AMS_RESRV_19 #RX -0 0x002C //RX_RECVFUNC_MODE_0 +0 0x202C //RX_RECVFUNC_MODE_0 1 0x0000 //RX_RECVFUNC_MODE_1 2 0x0004 //RX_SAMPLINGFREQ_SIG 3 0x0004 //RX_SAMPLINGFREQ_PROC @@ -28066,11 +41871,862 @@ 110 0x0000 //RX_FDDRC_RESRV_0 129 0x0100 //RX_SPK_VOL 130 0x0000 //RX_VOL_RESRV_0 +#RX 2 +157 0x202C //RX_RECVFUNC_MODE_0 +158 0x0000 //RX_RECVFUNC_MODE_1 +159 0x0004 //RX_SAMPLINGFREQ_SIG +160 0x0004 //RX_SAMPLINGFREQ_PROC +161 0x000A //RX_FRAME_SZ +162 0x0000 //RX_DELAY_OPT +163 0x1000 //RX_TDDRC_ALPHA_UP_1 +164 0x1000 //RX_TDDRC_ALPHA_UP_2 +165 0x1000 //RX_TDDRC_ALPHA_UP_3 +166 0x1000 //RX_TDDRC_ALPHA_UP_4 +167 0x0800 //RX_PGA +168 0x7B02 //RX_A_HP +169 0x4000 //RX_B_PE +170 0x7800 //RX_THR_PITCH_DET_0 +171 0x7000 //RX_THR_PITCH_DET_1 +172 0x6000 //RX_THR_PITCH_DET_2 +173 0x0008 //RX_PITCH_BFR_LEN +174 0x0003 //RX_SBD_PITCH_DET +175 0x0100 //RX_PP_RESRV_0 +176 0x0020 //RX_PP_RESRV_1 +177 0x0500 //RX_N_SN_EST +178 0x000C //RX_N2_SN_EST +179 0x000A //RX_NS_LVL_CTRL +180 0xF600 //RX_THR_SN_EST +181 0x7000 //RX_LAMBDA_PFILT +182 0x000A //RX_FENS_RESRV_0 +183 0x0190 //RX_FENS_RESRV_1 +184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +187 0x0002 //RX_EXTRA_NS_L +188 0x0800 //RX_EXTRA_NS_A +189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +190 0x7FFF //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +192 0x199A //RX_A_POST_FLT +193 0x0000 //RX_LMT_THRD +194 0x4000 //RX_LMT_ALPHA +195 0x0020 //RX_FDEQ_SUBNUM +196 0x4848 //RX_FDEQ_GAIN_0 +197 0x4848 //RX_FDEQ_GAIN_1 +198 0x4848 //RX_FDEQ_GAIN_2 +199 0x4848 //RX_FDEQ_GAIN_3 +200 0x4848 //RX_FDEQ_GAIN_4 +201 0x4848 //RX_FDEQ_GAIN_5 +202 0x4848 //RX_FDEQ_GAIN_6 +203 0x4848 //RX_FDEQ_GAIN_7 +204 0x4848 //RX_FDEQ_GAIN_8 +205 0x4848 //RX_FDEQ_GAIN_9 +206 0x4848 //RX_FDEQ_GAIN_10 +207 0x4848 //RX_FDEQ_GAIN_11 +208 0x4848 //RX_FDEQ_GAIN_12 +209 0x4848 //RX_FDEQ_GAIN_13 +210 0x4848 //RX_FDEQ_GAIN_14 +211 0x4848 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0202 //RX_FDEQ_BIN_0 +221 0x0203 //RX_FDEQ_BIN_1 +222 0x0304 //RX_FDEQ_BIN_2 +223 0x0405 //RX_FDEQ_BIN_3 +224 0x0607 //RX_FDEQ_BIN_4 +225 0x0809 //RX_FDEQ_BIN_5 +226 0x0A0B //RX_FDEQ_BIN_6 +227 0x0C0D //RX_FDEQ_BIN_7 +228 0x0E0F //RX_FDEQ_BIN_8 +229 0x1011 //RX_FDEQ_BIN_9 +230 0x1214 //RX_FDEQ_BIN_10 +231 0x1618 //RX_FDEQ_BIN_11 +232 0x1C1C //RX_FDEQ_BIN_12 +233 0x2020 //RX_FDEQ_BIN_13 +234 0x2020 //RX_FDEQ_BIN_14 +235 0x2011 //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x4000 //RX_FDEQ_RESRV_0 +245 0x0320 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0030 //RX_FDDRC_BAND_MARGIN_1 +248 0x0050 //RX_FDDRC_BAND_MARGIN_2 +249 0x0080 //RX_FDDRC_BAND_MARGIN_3 +250 0x0007 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x5000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x6400 //RX_FDDRC_THRD_3_2 +258 0x6400 //RX_FDDRC_THRD_3_3 +259 0x2000 //RX_FDDRC_SLANT_0_0 +260 0x2000 //RX_FDDRC_SLANT_0_1 +261 0x2000 //RX_FDDRC_SLANT_0_2 +262 0x2000 //RX_FDDRC_SLANT_0_3 +263 0x5333 //RX_FDDRC_SLANT_1_0 +264 0x5333 //RX_FDDRC_SLANT_1_1 +265 0x5333 //RX_FDDRC_SLANT_1_2 +266 0x5333 //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +268 0x0002 //RX_FILTINDX +269 0x0000 //RX_TDDRC_THRD_0 +270 0x0000 //RX_TDDRC_THRD_1 +271 0x1200 //RX_TDDRC_THRD_2 +272 0x1900 //RX_TDDRC_THRD_3 +273 0x3000 //RX_TDDRC_SLANT_0 +274 0x6E00 //RX_TDDRC_SLANT_1 +275 0x1000 //RX_TDDRC_ALPHA_UP_0 +276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x199A //RX_TDDRC_HMNC_GAIN +279 0x0001 //RX_TDDRC_SMT_FLAG +280 0x0CCD //RX_TDDRC_SMT_W +281 0x0240 //RX_TDDRC_DRC_GAIN +282 0x7C00 //RX_LAMBDA_PKA_FP +283 0x2000 //RX_TPKA_FP +284 0x2000 //RX_MIN_G_FP +285 0x0080 //RX_MAX_G_FP +286 0x000B //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 +288 0x0000 //RX_MAXLEVEL_CNG +289 0x3000 //RX_BWE_UV_TH +290 0x3000 //RX_BWE_UV_TH2 +291 0x1800 //RX_BWE_UV_TH3 +292 0x1000 //RX_BWE_V_TH +293 0x04CD //RX_BWE_GAIN1_V_TH1 +294 0x0F33 //RX_BWE_GAIN1_V_TH2 +295 0x7333 //RX_BWE_UV_EQ +296 0x199A //RX_BWE_V_EQ +297 0x7333 //RX_BWE_TONE_TH +298 0x0004 //RX_BWE_UV_HOLD_T +299 0x6CCD //RX_BWE_GAIN2_ALPHA +300 0x799A //RX_BWE_GAIN3_ALPHA +301 0x001E //RX_BWE_CUTOFF +302 0x3000 //RX_BWE_GAINFILL +303 0x3200 //RX_BWE_MAXTH_TONE +304 0x2000 //RX_BWE_EQ_0 +305 0x2000 //RX_BWE_EQ_1 +306 0x2000 //RX_BWE_EQ_2 +307 0x2000 //RX_BWE_EQ_3 +308 0x2000 //RX_BWE_EQ_4 +309 0x2000 //RX_BWE_EQ_5 +310 0x2000 //RX_BWE_EQ_6 +311 0x0000 //RX_BWE_RESRV_0 +312 0x0000 //RX_BWE_RESRV_1 +313 0x0000 //RX_BWE_RESRV_2 +#VOL 0 +163 0x1000 //RX_TDDRC_ALPHA_UP_1 +164 0x1000 //RX_TDDRC_ALPHA_UP_2 +165 0x1000 //RX_TDDRC_ALPHA_UP_3 +166 0x1000 //RX_TDDRC_ALPHA_UP_4 +184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +190 0x7FFF //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +269 0x0000 //RX_TDDRC_THRD_0 +270 0x0000 //RX_TDDRC_THRD_1 +271 0x1200 //RX_TDDRC_THRD_2 +272 0x1900 //RX_TDDRC_THRD_3 +273 0x3000 //RX_TDDRC_SLANT_0 +274 0x6E00 //RX_TDDRC_SLANT_1 +275 0x1000 //RX_TDDRC_ALPHA_UP_0 +276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x199A //RX_TDDRC_HMNC_GAIN +279 0x0001 //RX_TDDRC_SMT_FLAG +280 0x0CCD //RX_TDDRC_SMT_W +281 0x0240 //RX_TDDRC_DRC_GAIN +195 0x0020 //RX_FDEQ_SUBNUM +196 0x4848 //RX_FDEQ_GAIN_0 +197 0x4848 //RX_FDEQ_GAIN_1 +198 0x4848 //RX_FDEQ_GAIN_2 +199 0x4848 //RX_FDEQ_GAIN_3 +200 0x4848 //RX_FDEQ_GAIN_4 +201 0x4848 //RX_FDEQ_GAIN_5 +202 0x4848 //RX_FDEQ_GAIN_6 +203 0x4848 //RX_FDEQ_GAIN_7 +204 0x4848 //RX_FDEQ_GAIN_8 +205 0x4848 //RX_FDEQ_GAIN_9 +206 0x4848 //RX_FDEQ_GAIN_10 +207 0x4848 //RX_FDEQ_GAIN_11 +208 0x4848 //RX_FDEQ_GAIN_12 +209 0x4848 //RX_FDEQ_GAIN_13 +210 0x4848 //RX_FDEQ_GAIN_14 +211 0x4848 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0202 //RX_FDEQ_BIN_0 +221 0x0203 //RX_FDEQ_BIN_1 +222 0x0304 //RX_FDEQ_BIN_2 +223 0x0405 //RX_FDEQ_BIN_3 +224 0x0607 //RX_FDEQ_BIN_4 +225 0x0809 //RX_FDEQ_BIN_5 +226 0x0A0B //RX_FDEQ_BIN_6 +227 0x0C0D //RX_FDEQ_BIN_7 +228 0x0E0F //RX_FDEQ_BIN_8 +229 0x1011 //RX_FDEQ_BIN_9 +230 0x1214 //RX_FDEQ_BIN_10 +231 0x1618 //RX_FDEQ_BIN_11 +232 0x1C1C //RX_FDEQ_BIN_12 +233 0x2020 //RX_FDEQ_BIN_13 +234 0x2020 //RX_FDEQ_BIN_14 +235 0x2011 //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x4000 //RX_FDEQ_RESRV_0 +245 0x0320 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0030 //RX_FDDRC_BAND_MARGIN_1 +248 0x0050 //RX_FDDRC_BAND_MARGIN_2 +249 0x0080 //RX_FDDRC_BAND_MARGIN_3 +250 0x0007 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x5000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x6400 //RX_FDDRC_THRD_3_2 +258 0x6400 //RX_FDDRC_THRD_3_3 +259 0x2000 //RX_FDDRC_SLANT_0_0 +260 0x2000 //RX_FDDRC_SLANT_0_1 +261 0x2000 //RX_FDDRC_SLANT_0_2 +262 0x2000 //RX_FDDRC_SLANT_0_3 +263 0x5333 //RX_FDDRC_SLANT_1_0 +264 0x5333 //RX_FDDRC_SLANT_1_1 +265 0x5333 //RX_FDDRC_SLANT_1_2 +266 0x5333 //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +286 0x000B //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 +#VOL 1 +163 0x1000 //RX_TDDRC_ALPHA_UP_1 +164 0x1000 //RX_TDDRC_ALPHA_UP_2 +165 0x1000 //RX_TDDRC_ALPHA_UP_3 +166 0x1000 //RX_TDDRC_ALPHA_UP_4 +184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +190 0x7FFF //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +269 0x0000 //RX_TDDRC_THRD_0 +270 0x0000 //RX_TDDRC_THRD_1 +271 0x1200 //RX_TDDRC_THRD_2 +272 0x1900 //RX_TDDRC_THRD_3 +273 0x3000 //RX_TDDRC_SLANT_0 +274 0x6E00 //RX_TDDRC_SLANT_1 +275 0x1000 //RX_TDDRC_ALPHA_UP_0 +276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x199A //RX_TDDRC_HMNC_GAIN +279 0x0001 //RX_TDDRC_SMT_FLAG +280 0x0CCD //RX_TDDRC_SMT_W +281 0x0240 //RX_TDDRC_DRC_GAIN +195 0x0020 //RX_FDEQ_SUBNUM +196 0x4848 //RX_FDEQ_GAIN_0 +197 0x4848 //RX_FDEQ_GAIN_1 +198 0x4848 //RX_FDEQ_GAIN_2 +199 0x4848 //RX_FDEQ_GAIN_3 +200 0x4848 //RX_FDEQ_GAIN_4 +201 0x4848 //RX_FDEQ_GAIN_5 +202 0x4848 //RX_FDEQ_GAIN_6 +203 0x4848 //RX_FDEQ_GAIN_7 +204 0x4848 //RX_FDEQ_GAIN_8 +205 0x4848 //RX_FDEQ_GAIN_9 +206 0x4848 //RX_FDEQ_GAIN_10 +207 0x4848 //RX_FDEQ_GAIN_11 +208 0x4848 //RX_FDEQ_GAIN_12 +209 0x4848 //RX_FDEQ_GAIN_13 +210 0x4848 //RX_FDEQ_GAIN_14 +211 0x4848 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0202 //RX_FDEQ_BIN_0 +221 0x0203 //RX_FDEQ_BIN_1 +222 0x0304 //RX_FDEQ_BIN_2 +223 0x0405 //RX_FDEQ_BIN_3 +224 0x0607 //RX_FDEQ_BIN_4 +225 0x0809 //RX_FDEQ_BIN_5 +226 0x0A0B //RX_FDEQ_BIN_6 +227 0x0C0D //RX_FDEQ_BIN_7 +228 0x0E0F //RX_FDEQ_BIN_8 +229 0x1011 //RX_FDEQ_BIN_9 +230 0x1214 //RX_FDEQ_BIN_10 +231 0x1618 //RX_FDEQ_BIN_11 +232 0x1C1C //RX_FDEQ_BIN_12 +233 0x2020 //RX_FDEQ_BIN_13 +234 0x2020 //RX_FDEQ_BIN_14 +235 0x2011 //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x4000 //RX_FDEQ_RESRV_0 +245 0x0320 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0030 //RX_FDDRC_BAND_MARGIN_1 +248 0x0050 //RX_FDDRC_BAND_MARGIN_2 +249 0x0080 //RX_FDDRC_BAND_MARGIN_3 +250 0x0007 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x5000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x6400 //RX_FDDRC_THRD_3_2 +258 0x6400 //RX_FDDRC_THRD_3_3 +259 0x2000 //RX_FDDRC_SLANT_0_0 +260 0x2000 //RX_FDDRC_SLANT_0_1 +261 0x2000 //RX_FDDRC_SLANT_0_2 +262 0x2000 //RX_FDDRC_SLANT_0_3 +263 0x5333 //RX_FDDRC_SLANT_1_0 +264 0x5333 //RX_FDDRC_SLANT_1_1 +265 0x5333 //RX_FDDRC_SLANT_1_2 +266 0x5333 //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +286 0x0013 //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 +#VOL 2 +163 0x1000 //RX_TDDRC_ALPHA_UP_1 +164 0x1000 //RX_TDDRC_ALPHA_UP_2 +165 0x1000 //RX_TDDRC_ALPHA_UP_3 +166 0x1000 //RX_TDDRC_ALPHA_UP_4 +184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +190 0x7FFF //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +269 0x0000 //RX_TDDRC_THRD_0 +270 0x0000 //RX_TDDRC_THRD_1 +271 0x1200 //RX_TDDRC_THRD_2 +272 0x1900 //RX_TDDRC_THRD_3 +273 0x3000 //RX_TDDRC_SLANT_0 +274 0x6E00 //RX_TDDRC_SLANT_1 +275 0x1000 //RX_TDDRC_ALPHA_UP_0 +276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x199A //RX_TDDRC_HMNC_GAIN +279 0x0001 //RX_TDDRC_SMT_FLAG +280 0x0CCD //RX_TDDRC_SMT_W +281 0x0240 //RX_TDDRC_DRC_GAIN +195 0x0020 //RX_FDEQ_SUBNUM +196 0x4848 //RX_FDEQ_GAIN_0 +197 0x4848 //RX_FDEQ_GAIN_1 +198 0x4848 //RX_FDEQ_GAIN_2 +199 0x4848 //RX_FDEQ_GAIN_3 +200 0x4848 //RX_FDEQ_GAIN_4 +201 0x4848 //RX_FDEQ_GAIN_5 +202 0x4848 //RX_FDEQ_GAIN_6 +203 0x4848 //RX_FDEQ_GAIN_7 +204 0x4848 //RX_FDEQ_GAIN_8 +205 0x4848 //RX_FDEQ_GAIN_9 +206 0x4848 //RX_FDEQ_GAIN_10 +207 0x4848 //RX_FDEQ_GAIN_11 +208 0x4848 //RX_FDEQ_GAIN_12 +209 0x4848 //RX_FDEQ_GAIN_13 +210 0x4848 //RX_FDEQ_GAIN_14 +211 0x4848 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0202 //RX_FDEQ_BIN_0 +221 0x0203 //RX_FDEQ_BIN_1 +222 0x0304 //RX_FDEQ_BIN_2 +223 0x0405 //RX_FDEQ_BIN_3 +224 0x0607 //RX_FDEQ_BIN_4 +225 0x0809 //RX_FDEQ_BIN_5 +226 0x0A0B //RX_FDEQ_BIN_6 +227 0x0C0D //RX_FDEQ_BIN_7 +228 0x0E0F //RX_FDEQ_BIN_8 +229 0x1011 //RX_FDEQ_BIN_9 +230 0x1214 //RX_FDEQ_BIN_10 +231 0x1618 //RX_FDEQ_BIN_11 +232 0x1C1C //RX_FDEQ_BIN_12 +233 0x2020 //RX_FDEQ_BIN_13 +234 0x2020 //RX_FDEQ_BIN_14 +235 0x2011 //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x4000 //RX_FDEQ_RESRV_0 +245 0x0320 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0030 //RX_FDDRC_BAND_MARGIN_1 +248 0x0050 //RX_FDDRC_BAND_MARGIN_2 +249 0x0080 //RX_FDDRC_BAND_MARGIN_3 +250 0x0007 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x5000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x6400 //RX_FDDRC_THRD_3_2 +258 0x6400 //RX_FDDRC_THRD_3_3 +259 0x2000 //RX_FDDRC_SLANT_0_0 +260 0x2000 //RX_FDDRC_SLANT_0_1 +261 0x2000 //RX_FDDRC_SLANT_0_2 +262 0x2000 //RX_FDDRC_SLANT_0_3 +263 0x5333 //RX_FDDRC_SLANT_1_0 +264 0x5333 //RX_FDDRC_SLANT_1_1 +265 0x5333 //RX_FDDRC_SLANT_1_2 +266 0x5333 //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +286 0x0020 //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 +#VOL 3 +163 0x1000 //RX_TDDRC_ALPHA_UP_1 +164 0x1000 //RX_TDDRC_ALPHA_UP_2 +165 0x1000 //RX_TDDRC_ALPHA_UP_3 +166 0x1000 //RX_TDDRC_ALPHA_UP_4 +184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +190 0x7FFF //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +269 0x0000 //RX_TDDRC_THRD_0 +270 0x0000 //RX_TDDRC_THRD_1 +271 0x1200 //RX_TDDRC_THRD_2 +272 0x1900 //RX_TDDRC_THRD_3 +273 0x3000 //RX_TDDRC_SLANT_0 +274 0x6E00 //RX_TDDRC_SLANT_1 +275 0x1000 //RX_TDDRC_ALPHA_UP_0 +276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x199A //RX_TDDRC_HMNC_GAIN +279 0x0001 //RX_TDDRC_SMT_FLAG +280 0x0CCD //RX_TDDRC_SMT_W +281 0x0240 //RX_TDDRC_DRC_GAIN +195 0x0020 //RX_FDEQ_SUBNUM +196 0x4848 //RX_FDEQ_GAIN_0 +197 0x4848 //RX_FDEQ_GAIN_1 +198 0x4848 //RX_FDEQ_GAIN_2 +199 0x4848 //RX_FDEQ_GAIN_3 +200 0x4848 //RX_FDEQ_GAIN_4 +201 0x4848 //RX_FDEQ_GAIN_5 +202 0x4848 //RX_FDEQ_GAIN_6 +203 0x4848 //RX_FDEQ_GAIN_7 +204 0x4848 //RX_FDEQ_GAIN_8 +205 0x4848 //RX_FDEQ_GAIN_9 +206 0x4848 //RX_FDEQ_GAIN_10 +207 0x4848 //RX_FDEQ_GAIN_11 +208 0x4848 //RX_FDEQ_GAIN_12 +209 0x4848 //RX_FDEQ_GAIN_13 +210 0x4848 //RX_FDEQ_GAIN_14 +211 0x4848 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0202 //RX_FDEQ_BIN_0 +221 0x0203 //RX_FDEQ_BIN_1 +222 0x0304 //RX_FDEQ_BIN_2 +223 0x0405 //RX_FDEQ_BIN_3 +224 0x0607 //RX_FDEQ_BIN_4 +225 0x0809 //RX_FDEQ_BIN_5 +226 0x0A0B //RX_FDEQ_BIN_6 +227 0x0C0D //RX_FDEQ_BIN_7 +228 0x0E0F //RX_FDEQ_BIN_8 +229 0x1011 //RX_FDEQ_BIN_9 +230 0x1214 //RX_FDEQ_BIN_10 +231 0x1618 //RX_FDEQ_BIN_11 +232 0x1C1C //RX_FDEQ_BIN_12 +233 0x2020 //RX_FDEQ_BIN_13 +234 0x2020 //RX_FDEQ_BIN_14 +235 0x2011 //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x4000 //RX_FDEQ_RESRV_0 +245 0x0320 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0030 //RX_FDDRC_BAND_MARGIN_1 +248 0x0050 //RX_FDDRC_BAND_MARGIN_2 +249 0x0080 //RX_FDDRC_BAND_MARGIN_3 +250 0x0007 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x5000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x6400 //RX_FDDRC_THRD_3_2 +258 0x6400 //RX_FDDRC_THRD_3_3 +259 0x2000 //RX_FDDRC_SLANT_0_0 +260 0x2000 //RX_FDDRC_SLANT_0_1 +261 0x2000 //RX_FDDRC_SLANT_0_2 +262 0x2000 //RX_FDDRC_SLANT_0_3 +263 0x5333 //RX_FDDRC_SLANT_1_0 +264 0x5333 //RX_FDDRC_SLANT_1_1 +265 0x5333 //RX_FDDRC_SLANT_1_2 +266 0x5333 //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +286 0x0036 //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 +#VOL 4 +163 0x1000 //RX_TDDRC_ALPHA_UP_1 +164 0x1000 //RX_TDDRC_ALPHA_UP_2 +165 0x1000 //RX_TDDRC_ALPHA_UP_3 +166 0x1000 //RX_TDDRC_ALPHA_UP_4 +184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +190 0x7FFF //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +269 0x0000 //RX_TDDRC_THRD_0 +270 0x0000 //RX_TDDRC_THRD_1 +271 0x1200 //RX_TDDRC_THRD_2 +272 0x1900 //RX_TDDRC_THRD_3 +273 0x3000 //RX_TDDRC_SLANT_0 +274 0x6E00 //RX_TDDRC_SLANT_1 +275 0x1000 //RX_TDDRC_ALPHA_UP_0 +276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x199A //RX_TDDRC_HMNC_GAIN +279 0x0001 //RX_TDDRC_SMT_FLAG +280 0x0CCD //RX_TDDRC_SMT_W +281 0x0240 //RX_TDDRC_DRC_GAIN +195 0x0020 //RX_FDEQ_SUBNUM +196 0x4848 //RX_FDEQ_GAIN_0 +197 0x4848 //RX_FDEQ_GAIN_1 +198 0x4848 //RX_FDEQ_GAIN_2 +199 0x4848 //RX_FDEQ_GAIN_3 +200 0x4848 //RX_FDEQ_GAIN_4 +201 0x4848 //RX_FDEQ_GAIN_5 +202 0x4848 //RX_FDEQ_GAIN_6 +203 0x4848 //RX_FDEQ_GAIN_7 +204 0x4848 //RX_FDEQ_GAIN_8 +205 0x4848 //RX_FDEQ_GAIN_9 +206 0x4848 //RX_FDEQ_GAIN_10 +207 0x4848 //RX_FDEQ_GAIN_11 +208 0x4848 //RX_FDEQ_GAIN_12 +209 0x4848 //RX_FDEQ_GAIN_13 +210 0x4848 //RX_FDEQ_GAIN_14 +211 0x4848 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0202 //RX_FDEQ_BIN_0 +221 0x0203 //RX_FDEQ_BIN_1 +222 0x0304 //RX_FDEQ_BIN_2 +223 0x0405 //RX_FDEQ_BIN_3 +224 0x0607 //RX_FDEQ_BIN_4 +225 0x0809 //RX_FDEQ_BIN_5 +226 0x0A0B //RX_FDEQ_BIN_6 +227 0x0C0D //RX_FDEQ_BIN_7 +228 0x0E0F //RX_FDEQ_BIN_8 +229 0x1011 //RX_FDEQ_BIN_9 +230 0x1214 //RX_FDEQ_BIN_10 +231 0x1618 //RX_FDEQ_BIN_11 +232 0x1C1C //RX_FDEQ_BIN_12 +233 0x2020 //RX_FDEQ_BIN_13 +234 0x2020 //RX_FDEQ_BIN_14 +235 0x2011 //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x4000 //RX_FDEQ_RESRV_0 +245 0x0320 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0030 //RX_FDDRC_BAND_MARGIN_1 +248 0x0050 //RX_FDDRC_BAND_MARGIN_2 +249 0x0080 //RX_FDDRC_BAND_MARGIN_3 +250 0x0007 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x5000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x6400 //RX_FDDRC_THRD_3_2 +258 0x6400 //RX_FDDRC_THRD_3_3 +259 0x2000 //RX_FDDRC_SLANT_0_0 +260 0x2000 //RX_FDDRC_SLANT_0_1 +261 0x2000 //RX_FDDRC_SLANT_0_2 +262 0x2000 //RX_FDDRC_SLANT_0_3 +263 0x5333 //RX_FDDRC_SLANT_1_0 +264 0x5333 //RX_FDDRC_SLANT_1_1 +265 0x5333 //RX_FDDRC_SLANT_1_2 +266 0x5333 //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +286 0x005B //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 +#VOL 5 +163 0x1000 //RX_TDDRC_ALPHA_UP_1 +164 0x1000 //RX_TDDRC_ALPHA_UP_2 +165 0x1000 //RX_TDDRC_ALPHA_UP_3 +166 0x1000 //RX_TDDRC_ALPHA_UP_4 +184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +190 0x7FFF //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +269 0x0000 //RX_TDDRC_THRD_0 +270 0x0000 //RX_TDDRC_THRD_1 +271 0x1200 //RX_TDDRC_THRD_2 +272 0x1900 //RX_TDDRC_THRD_3 +273 0x3000 //RX_TDDRC_SLANT_0 +274 0x6E00 //RX_TDDRC_SLANT_1 +275 0x1000 //RX_TDDRC_ALPHA_UP_0 +276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x199A //RX_TDDRC_HMNC_GAIN +279 0x0001 //RX_TDDRC_SMT_FLAG +280 0x0CCD //RX_TDDRC_SMT_W +281 0x0240 //RX_TDDRC_DRC_GAIN +195 0x0020 //RX_FDEQ_SUBNUM +196 0x4848 //RX_FDEQ_GAIN_0 +197 0x4848 //RX_FDEQ_GAIN_1 +198 0x4848 //RX_FDEQ_GAIN_2 +199 0x4848 //RX_FDEQ_GAIN_3 +200 0x4848 //RX_FDEQ_GAIN_4 +201 0x4848 //RX_FDEQ_GAIN_5 +202 0x4848 //RX_FDEQ_GAIN_6 +203 0x4848 //RX_FDEQ_GAIN_7 +204 0x4848 //RX_FDEQ_GAIN_8 +205 0x4848 //RX_FDEQ_GAIN_9 +206 0x4848 //RX_FDEQ_GAIN_10 +207 0x4848 //RX_FDEQ_GAIN_11 +208 0x4848 //RX_FDEQ_GAIN_12 +209 0x4848 //RX_FDEQ_GAIN_13 +210 0x4848 //RX_FDEQ_GAIN_14 +211 0x4848 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0202 //RX_FDEQ_BIN_0 +221 0x0203 //RX_FDEQ_BIN_1 +222 0x0304 //RX_FDEQ_BIN_2 +223 0x0405 //RX_FDEQ_BIN_3 +224 0x0607 //RX_FDEQ_BIN_4 +225 0x0809 //RX_FDEQ_BIN_5 +226 0x0A0B //RX_FDEQ_BIN_6 +227 0x0C0D //RX_FDEQ_BIN_7 +228 0x0E0F //RX_FDEQ_BIN_8 +229 0x1011 //RX_FDEQ_BIN_9 +230 0x1214 //RX_FDEQ_BIN_10 +231 0x1618 //RX_FDEQ_BIN_11 +232 0x1C1C //RX_FDEQ_BIN_12 +233 0x2020 //RX_FDEQ_BIN_13 +234 0x2020 //RX_FDEQ_BIN_14 +235 0x2011 //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x4000 //RX_FDEQ_RESRV_0 +245 0x0320 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0030 //RX_FDDRC_BAND_MARGIN_1 +248 0x0050 //RX_FDDRC_BAND_MARGIN_2 +249 0x0080 //RX_FDDRC_BAND_MARGIN_3 +250 0x0007 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x5000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x6400 //RX_FDDRC_THRD_3_2 +258 0x6400 //RX_FDDRC_THRD_3_3 +259 0x2000 //RX_FDDRC_SLANT_0_0 +260 0x2000 //RX_FDDRC_SLANT_0_1 +261 0x2000 //RX_FDDRC_SLANT_0_2 +262 0x2000 //RX_FDDRC_SLANT_0_3 +263 0x5333 //RX_FDDRC_SLANT_1_0 +264 0x5333 //RX_FDDRC_SLANT_1_1 +265 0x5333 //RX_FDDRC_SLANT_1_2 +266 0x5333 //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +286 0x0099 //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 +#VOL 6 +163 0x1000 //RX_TDDRC_ALPHA_UP_1 +164 0x1000 //RX_TDDRC_ALPHA_UP_2 +165 0x1000 //RX_TDDRC_ALPHA_UP_3 +166 0x1000 //RX_TDDRC_ALPHA_UP_4 +184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +190 0x7FFF //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +269 0x0000 //RX_TDDRC_THRD_0 +270 0x0000 //RX_TDDRC_THRD_1 +271 0x1200 //RX_TDDRC_THRD_2 +272 0x1900 //RX_TDDRC_THRD_3 +273 0x3000 //RX_TDDRC_SLANT_0 +274 0x6E00 //RX_TDDRC_SLANT_1 +275 0x1000 //RX_TDDRC_ALPHA_UP_0 +276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x199A //RX_TDDRC_HMNC_GAIN +279 0x0001 //RX_TDDRC_SMT_FLAG +280 0x0CCD //RX_TDDRC_SMT_W +281 0x0240 //RX_TDDRC_DRC_GAIN +195 0x0020 //RX_FDEQ_SUBNUM +196 0x4848 //RX_FDEQ_GAIN_0 +197 0x4848 //RX_FDEQ_GAIN_1 +198 0x4848 //RX_FDEQ_GAIN_2 +199 0x4848 //RX_FDEQ_GAIN_3 +200 0x4848 //RX_FDEQ_GAIN_4 +201 0x4848 //RX_FDEQ_GAIN_5 +202 0x4848 //RX_FDEQ_GAIN_6 +203 0x4848 //RX_FDEQ_GAIN_7 +204 0x4848 //RX_FDEQ_GAIN_8 +205 0x4848 //RX_FDEQ_GAIN_9 +206 0x4848 //RX_FDEQ_GAIN_10 +207 0x4848 //RX_FDEQ_GAIN_11 +208 0x4848 //RX_FDEQ_GAIN_12 +209 0x4848 //RX_FDEQ_GAIN_13 +210 0x4848 //RX_FDEQ_GAIN_14 +211 0x4848 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0202 //RX_FDEQ_BIN_0 +221 0x0203 //RX_FDEQ_BIN_1 +222 0x0304 //RX_FDEQ_BIN_2 +223 0x0405 //RX_FDEQ_BIN_3 +224 0x0607 //RX_FDEQ_BIN_4 +225 0x0809 //RX_FDEQ_BIN_5 +226 0x0A0B //RX_FDEQ_BIN_6 +227 0x0C0D //RX_FDEQ_BIN_7 +228 0x0E0F //RX_FDEQ_BIN_8 +229 0x1011 //RX_FDEQ_BIN_9 +230 0x1214 //RX_FDEQ_BIN_10 +231 0x1618 //RX_FDEQ_BIN_11 +232 0x1C1C //RX_FDEQ_BIN_12 +233 0x2020 //RX_FDEQ_BIN_13 +234 0x2020 //RX_FDEQ_BIN_14 +235 0x2011 //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x4000 //RX_FDEQ_RESRV_0 +245 0x0320 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0030 //RX_FDDRC_BAND_MARGIN_1 +248 0x0050 //RX_FDDRC_BAND_MARGIN_2 +249 0x0080 //RX_FDDRC_BAND_MARGIN_3 +250 0x0007 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x5000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x6400 //RX_FDDRC_THRD_3_2 +258 0x6400 //RX_FDDRC_THRD_3_3 +259 0x2000 //RX_FDDRC_SLANT_0_0 +260 0x2000 //RX_FDDRC_SLANT_0_1 +261 0x2000 //RX_FDDRC_SLANT_0_2 +262 0x2000 //RX_FDDRC_SLANT_0_3 +263 0x5333 //RX_FDDRC_SLANT_1_0 +264 0x5333 //RX_FDDRC_SLANT_1_1 +265 0x5333 //RX_FDDRC_SLANT_1_2 +266 0x5333 //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +286 0x0100 //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 #CASE_NAME HEADSET-GOOGLE_CONDOR_CERTIFICATION1-VOICE_GENERIC-NB -#PARAM_MODE FULL -#PARAM_TYPE TX+RX -#TOTAL_CUSTOM_STEP 7 +#PARAM_MODE Full +#PARAM_TYPE TX+2RX +#TOTAL_CUSTOM_STEP 7+7 #TX 0 0x0009 //TX_OPERATION_MODE_0 1 0x0008 //TX_OPERATION_MODE_1 @@ -28387,20 +43043,20 @@ 312 0x7FFF //TX_A_POST_FILT_0 313 0x2000 //TX_A_POST_FILT_1 314 0x4000 //TX_A_POST_FILT_S_0 -315 0x4000 //TX_A_POST_FILT_S_1 -316 0x1000 //TX_A_POST_FILT_S_2 +315 0x1000 //TX_A_POST_FILT_S_1 +316 0x4000 //TX_A_POST_FILT_S_2 317 0x4000 //TX_A_POST_FILT_S_3 318 0x4000 //TX_A_POST_FILT_S_4 319 0x4000 //TX_A_POST_FILT_S_5 320 0x4000 //TX_A_POST_FILT_S_6 321 0x4000 //TX_A_POST_FILT_S_7 322 0x0400 //TX_B_POST_FILT_0 -323 0x0400 //TX_B_POST_FILT_1 +323 0x2000 //TX_B_POST_FILT_1 324 0x2000 //TX_B_POST_FILT_2 325 0x2000 //TX_B_POST_FILT_3 326 0x2000 //TX_B_POST_FILT_4 327 0x2000 //TX_B_POST_FILT_5 -328 0x2000 //TX_B_POST_FILT_6 +328 0x0400 //TX_B_POST_FILT_6 329 0x2000 //TX_B_POST_FILT_7 330 0x7FFF //TX_B_LESSCUT_RTO_S_0 331 0x7FFF //TX_B_LESSCUT_RTO_S_1 @@ -28439,7 +43095,7 @@ 364 0x0000 //TX_K_APT 365 0x0001 //TX_NOISEDET 366 0x0190 //TX_NDETCT -367 0x000A //TX_NOISE_TH_0 +367 0x003B //TX_NOISE_TH_0 368 0x1B58 //TX_NOISE_TH_0_2 369 0x2134 //TX_NOISE_TH_0_3 370 0x02BC //TX_NOISE_TH_1 @@ -28451,11 +43107,11 @@ 376 0x0000 //TX_NOISE_TH_5_3 377 0x0000 //TX_NOISE_TH_5_4 378 0x0032 //TX_NOISE_TH_6 -379 0x0014 //TX_MINENOISE_TH -380 0x4000 //TX_MINENOISE_MIC0_TH_MTS -381 0xFFEE //TX_MINENOISE_MIC0_TH_EXP -382 0x6000 //TX_MINENOISE_MIC0_S_TH_MTS -383 0xFFF3 //TX_MINENOISE_MIC0_S_TH_EXP +379 0x00C8 //TX_MINENOISE_TH +380 0xD508 //TX_MORENS_TFMASK_TH +381 0x0001 //TX_DRC_QUIET_FLOOR +382 0x3A98 //TX_RATIODTL_CUT_TH +383 0x0DAC //TX_DT_CUT_K1 384 0x00A5 //TX_OUT_ENER_S_TH_CLEAN 385 0x00A5 //TX_OUT_ENER_S_TH_LESSCLEAN 386 0x00A5 //TX_OUT_ENER_S_TH_NOISY @@ -28463,22 +43119,22 @@ 388 0x00CE //TX_OUT_ENER_TH_SPEECH 389 0x2000 //TX_SN_NPB_GAIN 390 0x0000 //TX_NN_NPB_GAIN -391 0x0000 //TX_CSX_ALPHA_0 -392 0x0000 //TX_CSX_ALPHA_1 -393 0x0000 //TX_CSX_ALPHA_2 -394 0x0000 //TX_CSX_ALPHA_3 -395 0x0800 //TX_MU_ARSP_EST -396 0x00C8 //TX_P_OUTBEAM_MIN_TH +391 0x7FFF //TX_POST_MASK_SUP_HSNE +392 0x1388 //TX_TAIL_DET_TH +393 0x4000 //TX_B_LESSCUT_RTO_WTA +394 0x0000 //TX_MEL_G_R +395 0x0080 //TX_SUPHIGH_TH +396 0x0000 //TX_MASK_G_R 397 0x0002 //TX_EXTRA_NS_L -398 0x0800 //TX_EXTRA_NS_A -399 0x0005 //TX_VR_NOISE_FLOOR_TH +398 0x1800 //TX_C_POST_FLT_MASK +399 0x7FFF //TX_A_POST_FLT_WNS 400 0x0148 //TX_MIN_G_LOW300HZ 401 0x0002 //TX_MAXLEVEL_CNG 402 0x00B4 //TX_STN_NOISE_TH 403 0x4000 //TX_POST_MASK_SUP 404 0x7FFF //TX_POST_MASK_ADJUST 405 0x00C8 //TX_NS_ENOISE_MIC0_TH -406 0x0014 //TX_MINENOISE_MIC0_TH +406 0x0032 //TX_MINENOISE_MIC0_TH 407 0x012C //TX_MINENOISE_MIC0_S_TH 408 0x7FFF //TX_MIN_G_CTRL_SSNS 409 0x0000 //TX_METAL_RTO_THR @@ -28586,16 +43242,16 @@ 511 0x6666 //TX_MIC_TO_BFGAIN 512 0x0000 //TX_MICTOBFGAIN0 513 0x0000 //TX_FASTMUE_TH -514 0x0000 //TX_DERVB_LEN_0 -515 0x0000 //TX_DERVB_LEN_1 -516 0x0000 //TX_RHO_DERVB -517 0x0000 //TX_MIC_INDX_DERVB -518 0x0000 //TX_MU_DERVB -519 0x0000 //TX_DR_RESRV_0 -520 0x0000 //TX_DR_RESRV_1 -521 0x0000 //TX_DR_RESRV_2 -522 0x0000 //TX_DR_RESRV_3 -523 0x0000 //TX_DR_RESRV_4 +514 0xC000 //TX_DEREVERB_LF_MU +515 0xC000 //TX_DEREVERB_HF_MU +516 0xCCCC //TX_DEREVERB_DELAY +517 0xD999 //TX_DEREVERB_COEF_LEN +518 0x1F40 //TX_DEREVERB_DNR +519 0x0000 //TX_DEREVERB_ALPHA +520 0x0000 //TX_DEREVERB_BETA +521 0x0000 //TX_GSC_RTOL_TH +522 0x7000 //TX_GSC_RTOH_TH +523 0x0064 //TX_WIDE2_MEANHTH 524 0x0000 //TX_DR_RESRV_5 525 0x0000 //TX_DR_RESRV_6 526 0x0000 //TX_DR_RESRV_7 @@ -28963,14 +43619,79 @@ 888 0x00C8 //TX_FASTNS_ARSPC_TH 889 0xC000 //TX_FASTNS_MASK5_TH 890 0x4848 //TX_POSTSSA_MIN_G_VR_MASK -891 0x7FFF //TX_A_LESSCUT_RTO_MASK +891 0x4000 //TX_A_LESSCUT_RTO_MASK 892 0x1770 //TX_FASTNS_NOISETH 893 0xC000 //TX_FASTNS_SSA_THLFL 894 0xC000 //TX_FASTNS_SSA_THHFL 895 0xCCCC //TX_FASTNS_SSA_THLFH 896 0xD999 //TX_FASTNS_SSA_THHFH +897 0x2339 //TX_SENDFUNC_REG_MICMUTE +898 0x0021 //TX_SENDFUNC_REG_MICMUTE1 +899 0x02BC //TX_MICMUTE_RATIO_THR +900 0x0140 //TX_MICMUTE_AMP_THR +901 0x0004 //TX_MICMUTE_HPF_IND +902 0x00C0 //TX_MICMUTE_LOG_EYR_TH +903 0x0008 //TX_MICMUTE_CVG_TIME +904 0x0008 //TX_MICMUTE_RELEASE_TIME +905 0x01FE //TX_MIC_VOLUME_MIC0MUTE +906 0x0020 //TX_MICMUTE_EPD_OFFSET_0 +907 0x001E //TX_MICMUTE_FRQ_AEC_L +908 0x7999 //TX_MICMUTE_EAD_THR +909 0x7FFF //TX_MICMUTE_LAMBDA_CB_NLE +910 0x7FFF //TX_MICMUTE_LAMBDA_RE_EST +911 0x4000 //TX_DTD_THR1_MICMUTE_0 +912 0x7000 //TX_DTD_THR1_MICMUTE_1 +913 0x7FFF //TX_DTD_THR1_MICMUTE_2 +914 0x7FFF //TX_DTD_THR1_MICMUTE_3 +915 0x6CCC //TX_DTD_THR2_MICMUTE_0 +916 0x0400 //TX_MICMUTE_MIN_EQ_RE_EST_0 +917 0x0400 //TX_MICMUTE_MIN_EQ_RE_EST_1 +918 0x1000 //TX_MICMUTE_MIN_EQ_RE_EST_2 +919 0x7FFF //TX_MICMUTE_MIN_EQ_RE_EST_3 +920 0x7FFF //TX_MICMUTE_MIN_EQ_RE_EST_4 +921 0x4000 //TX_MICMUTE_C_POST_FLT +922 0x03E8 //TX_MICMUTE_DT_CUT_K +923 0x0001 //TX_MICMUTE_DT_CUT_THR +924 0x03E8 //TX_MICMUTE_DT_CUT_K2 +925 0x0001 //TX_MICMUTE_DT_CUT_THR2 +926 0x0064 //TX_MICMUTE_DT2_HOLD_N +927 0x1000 //TX_MICMUTE_RATIODTH_THCUT +928 0x1000 //TX_MICMUTE_B_POST_FLT_ECHOL +929 0x7FFF //TX_MICMUTE_B_POST_FLT_ECHOH +930 0x0400 //TX_MICMUTE_C_POST_FLT_MASK +931 0x7999 //TX_MICMUTE_RATIODTL_CUT_TH +932 0x0258 //TX_MICMUTE_DT_CUT_K1 +933 0x0800 //TX_MICMUTE_N2_SN_EST +934 0xFC00 //TX_MICMUTE_THR_SN_EST_0 +935 0x001C //TX_MICMUTE_MIN_G_CTRL_0 +936 0x6000 //TX_MICMUTE_A_POST_FILT_S_0 +937 0x7000 //TX_MICMUTE_B_POST_FILT_0 +938 0x2710 //TX_MIC1RUB_AMP_THR +939 0x0010 //TX_MIC1MUTE_RATIO_THR +940 0x0450 //TX_MIC1MUTE_AMP_THR +941 0x0008 //TX_MIC1MUTE_CVG_TIME +942 0x0008 //TX_MIC1MUTE_RELEASE_TIME +943 0x0000 //TX_AMS_RESRV_01 +944 0x0000 //TX_AMS_RESRV_02 +945 0x0000 //TX_AMS_RESRV_03 +946 0x0000 //TX_AMS_RESRV_04 +947 0x0000 //TX_AMS_RESRV_05 +948 0x0000 //TX_AMS_RESRV_06 +949 0x0000 //TX_AMS_RESRV_07 +950 0x0000 //TX_AMS_RESRV_08 +951 0x0000 //TX_AMS_RESRV_09 +952 0x0000 //TX_AMS_RESRV_10 +953 0x0000 //TX_AMS_RESRV_11 +954 0x0000 //TX_AMS_RESRV_12 +955 0x0000 //TX_AMS_RESRV_13 +956 0x0000 //TX_AMS_RESRV_14 +957 0x0000 //TX_AMS_RESRV_15 +958 0x0000 //TX_AMS_RESRV_16 +959 0x0000 //TX_AMS_RESRV_17 +960 0x0000 //TX_AMS_RESRV_18 +961 0x0000 //TX_AMS_RESRV_19 #RX -0 0x0024 //RX_RECVFUNC_MODE_0 +0 0x2024 //RX_RECVFUNC_MODE_0 1 0x0000 //RX_RECVFUNC_MODE_1 2 0x0000 //RX_SAMPLINGFREQ_SIG 3 0x0000 //RX_SAMPLINGFREQ_PROC @@ -29820,11 +44541,862 @@ 110 0x0000 //RX_FDDRC_RESRV_0 129 0x0100 //RX_SPK_VOL 130 0x0000 //RX_VOL_RESRV_0 +#RX 2 +157 0x2024 //RX_RECVFUNC_MODE_0 +158 0x0000 //RX_RECVFUNC_MODE_1 +159 0x0000 //RX_SAMPLINGFREQ_SIG +160 0x0000 //RX_SAMPLINGFREQ_PROC +161 0x000A //RX_FRAME_SZ +162 0x0000 //RX_DELAY_OPT +163 0x3000 //RX_TDDRC_ALPHA_UP_1 +164 0x3000 //RX_TDDRC_ALPHA_UP_2 +165 0x3000 //RX_TDDRC_ALPHA_UP_3 +166 0x3000 //RX_TDDRC_ALPHA_UP_4 +167 0x0800 //RX_PGA +168 0x7FFF //RX_A_HP +169 0x0000 //RX_B_PE +170 0x3800 //RX_THR_PITCH_DET_0 +171 0x3000 //RX_THR_PITCH_DET_1 +172 0x2800 //RX_THR_PITCH_DET_2 +173 0x0008 //RX_PITCH_BFR_LEN +174 0x0003 //RX_SBD_PITCH_DET +175 0x0100 //RX_PP_RESRV_0 +176 0x0020 //RX_PP_RESRV_1 +177 0x0600 //RX_N_SN_EST +178 0x000C //RX_N2_SN_EST +179 0x0010 //RX_NS_LVL_CTRL +180 0xF800 //RX_THR_SN_EST +181 0x7CCD //RX_LAMBDA_PFILT +182 0x000A //RX_FENS_RESRV_0 +183 0x0190 //RX_FENS_RESRV_1 +184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +187 0x0002 //RX_EXTRA_NS_L +188 0x0800 //RX_EXTRA_NS_A +189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +190 0x7FFF //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +192 0x199A //RX_A_POST_FLT +193 0x0000 //RX_LMT_THRD +194 0x4000 //RX_LMT_ALPHA +195 0x0014 //RX_FDEQ_SUBNUM +196 0x4848 //RX_FDEQ_GAIN_0 +197 0x4848 //RX_FDEQ_GAIN_1 +198 0x4848 //RX_FDEQ_GAIN_2 +199 0x4848 //RX_FDEQ_GAIN_3 +200 0x4848 //RX_FDEQ_GAIN_4 +201 0x4848 //RX_FDEQ_GAIN_5 +202 0x4848 //RX_FDEQ_GAIN_6 +203 0x4848 //RX_FDEQ_GAIN_7 +204 0x4848 //RX_FDEQ_GAIN_8 +205 0x4848 //RX_FDEQ_GAIN_9 +206 0x4848 //RX_FDEQ_GAIN_10 +207 0x4848 //RX_FDEQ_GAIN_11 +208 0x4848 //RX_FDEQ_GAIN_12 +209 0x4848 //RX_FDEQ_GAIN_13 +210 0x4848 //RX_FDEQ_GAIN_14 +211 0x4848 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0202 //RX_FDEQ_BIN_0 +221 0x0203 //RX_FDEQ_BIN_1 +222 0x0303 //RX_FDEQ_BIN_2 +223 0x0304 //RX_FDEQ_BIN_3 +224 0x0405 //RX_FDEQ_BIN_4 +225 0x0506 //RX_FDEQ_BIN_5 +226 0x0708 //RX_FDEQ_BIN_6 +227 0x090A //RX_FDEQ_BIN_7 +228 0x0B0C //RX_FDEQ_BIN_8 +229 0x0D08 //RX_FDEQ_BIN_9 +230 0x0000 //RX_FDEQ_BIN_10 +231 0x0000 //RX_FDEQ_BIN_11 +232 0x0000 //RX_FDEQ_BIN_12 +233 0x0000 //RX_FDEQ_BIN_13 +234 0x0000 //RX_FDEQ_BIN_14 +235 0x0000 //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x4000 //RX_FDEQ_RESRV_0 +245 0x0320 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0030 //RX_FDDRC_BAND_MARGIN_1 +248 0x0050 //RX_FDDRC_BAND_MARGIN_2 +249 0x0080 //RX_FDDRC_BAND_MARGIN_3 +250 0x0007 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x5000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x6400 //RX_FDDRC_THRD_3_2 +258 0x6400 //RX_FDDRC_THRD_3_3 +259 0x2000 //RX_FDDRC_SLANT_0_0 +260 0x2000 //RX_FDDRC_SLANT_0_1 +261 0x2000 //RX_FDDRC_SLANT_0_2 +262 0x2000 //RX_FDDRC_SLANT_0_3 +263 0x5333 //RX_FDDRC_SLANT_1_0 +264 0x5333 //RX_FDDRC_SLANT_1_1 +265 0x5333 //RX_FDDRC_SLANT_1_2 +266 0x5333 //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +268 0x0002 //RX_FILTINDX +269 0x0000 //RX_TDDRC_THRD_0 +270 0x0000 //RX_TDDRC_THRD_1 +271 0x2030 //RX_TDDRC_THRD_2 +272 0x2030 //RX_TDDRC_THRD_3 +273 0x0800 //RX_TDDRC_SLANT_0 +274 0x7EB8 //RX_TDDRC_SLANT_1 +275 0x3000 //RX_TDDRC_ALPHA_UP_0 +276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x199A //RX_TDDRC_HMNC_GAIN +279 0x0001 //RX_TDDRC_SMT_FLAG +280 0x0CCD //RX_TDDRC_SMT_W +281 0x0478 //RX_TDDRC_DRC_GAIN +282 0x7C00 //RX_LAMBDA_PKA_FP +283 0x2000 //RX_TPKA_FP +284 0x2000 //RX_MIN_G_FP +285 0x0080 //RX_MAX_G_FP +286 0x000C //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 +288 0x0000 //RX_MAXLEVEL_CNG +289 0x3000 //RX_BWE_UV_TH +290 0x3000 //RX_BWE_UV_TH2 +291 0x1800 //RX_BWE_UV_TH3 +292 0x1000 //RX_BWE_V_TH +293 0x04CD //RX_BWE_GAIN1_V_TH1 +294 0x0F33 //RX_BWE_GAIN1_V_TH2 +295 0x7333 //RX_BWE_UV_EQ +296 0x199A //RX_BWE_V_EQ +297 0x7333 //RX_BWE_TONE_TH +298 0x0004 //RX_BWE_UV_HOLD_T +299 0x6CCD //RX_BWE_GAIN2_ALPHA +300 0x799A //RX_BWE_GAIN3_ALPHA +301 0x001E //RX_BWE_CUTOFF +302 0x3000 //RX_BWE_GAINFILL +303 0x3200 //RX_BWE_MAXTH_TONE +304 0x2000 //RX_BWE_EQ_0 +305 0x2000 //RX_BWE_EQ_1 +306 0x2000 //RX_BWE_EQ_2 +307 0x2000 //RX_BWE_EQ_3 +308 0x2000 //RX_BWE_EQ_4 +309 0x2000 //RX_BWE_EQ_5 +310 0x2000 //RX_BWE_EQ_6 +311 0x0000 //RX_BWE_RESRV_0 +312 0x0000 //RX_BWE_RESRV_1 +313 0x0000 //RX_BWE_RESRV_2 +#VOL 0 +163 0x3000 //RX_TDDRC_ALPHA_UP_1 +164 0x3000 //RX_TDDRC_ALPHA_UP_2 +165 0x3000 //RX_TDDRC_ALPHA_UP_3 +166 0x3000 //RX_TDDRC_ALPHA_UP_4 +184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +190 0x7FFF //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +269 0x0000 //RX_TDDRC_THRD_0 +270 0x0000 //RX_TDDRC_THRD_1 +271 0x2030 //RX_TDDRC_THRD_2 +272 0x2030 //RX_TDDRC_THRD_3 +273 0x0800 //RX_TDDRC_SLANT_0 +274 0x7EB8 //RX_TDDRC_SLANT_1 +275 0x3000 //RX_TDDRC_ALPHA_UP_0 +276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x199A //RX_TDDRC_HMNC_GAIN +279 0x0001 //RX_TDDRC_SMT_FLAG +280 0x0CCD //RX_TDDRC_SMT_W +281 0x0478 //RX_TDDRC_DRC_GAIN +195 0x0014 //RX_FDEQ_SUBNUM +196 0x4848 //RX_FDEQ_GAIN_0 +197 0x4848 //RX_FDEQ_GAIN_1 +198 0x4848 //RX_FDEQ_GAIN_2 +199 0x4848 //RX_FDEQ_GAIN_3 +200 0x4848 //RX_FDEQ_GAIN_4 +201 0x4848 //RX_FDEQ_GAIN_5 +202 0x4848 //RX_FDEQ_GAIN_6 +203 0x4848 //RX_FDEQ_GAIN_7 +204 0x4848 //RX_FDEQ_GAIN_8 +205 0x4848 //RX_FDEQ_GAIN_9 +206 0x4848 //RX_FDEQ_GAIN_10 +207 0x4848 //RX_FDEQ_GAIN_11 +208 0x4848 //RX_FDEQ_GAIN_12 +209 0x4848 //RX_FDEQ_GAIN_13 +210 0x4848 //RX_FDEQ_GAIN_14 +211 0x4848 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0202 //RX_FDEQ_BIN_0 +221 0x0203 //RX_FDEQ_BIN_1 +222 0x0303 //RX_FDEQ_BIN_2 +223 0x0304 //RX_FDEQ_BIN_3 +224 0x0405 //RX_FDEQ_BIN_4 +225 0x0506 //RX_FDEQ_BIN_5 +226 0x0708 //RX_FDEQ_BIN_6 +227 0x090A //RX_FDEQ_BIN_7 +228 0x0B0C //RX_FDEQ_BIN_8 +229 0x0D08 //RX_FDEQ_BIN_9 +230 0x0000 //RX_FDEQ_BIN_10 +231 0x0000 //RX_FDEQ_BIN_11 +232 0x0000 //RX_FDEQ_BIN_12 +233 0x0000 //RX_FDEQ_BIN_13 +234 0x0000 //RX_FDEQ_BIN_14 +235 0x0000 //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x4000 //RX_FDEQ_RESRV_0 +245 0x0320 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0030 //RX_FDDRC_BAND_MARGIN_1 +248 0x0050 //RX_FDDRC_BAND_MARGIN_2 +249 0x0080 //RX_FDDRC_BAND_MARGIN_3 +250 0x0007 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x5000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x6400 //RX_FDDRC_THRD_3_2 +258 0x6400 //RX_FDDRC_THRD_3_3 +259 0x2000 //RX_FDDRC_SLANT_0_0 +260 0x2000 //RX_FDDRC_SLANT_0_1 +261 0x2000 //RX_FDDRC_SLANT_0_2 +262 0x2000 //RX_FDDRC_SLANT_0_3 +263 0x5333 //RX_FDDRC_SLANT_1_0 +264 0x5333 //RX_FDDRC_SLANT_1_1 +265 0x5333 //RX_FDDRC_SLANT_1_2 +266 0x5333 //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +286 0x000C //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 +#VOL 1 +163 0x3000 //RX_TDDRC_ALPHA_UP_1 +164 0x3000 //RX_TDDRC_ALPHA_UP_2 +165 0x3000 //RX_TDDRC_ALPHA_UP_3 +166 0x3000 //RX_TDDRC_ALPHA_UP_4 +184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +190 0x7FFF //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +269 0x0000 //RX_TDDRC_THRD_0 +270 0x0000 //RX_TDDRC_THRD_1 +271 0x2030 //RX_TDDRC_THRD_2 +272 0x2030 //RX_TDDRC_THRD_3 +273 0x0800 //RX_TDDRC_SLANT_0 +274 0x7EB8 //RX_TDDRC_SLANT_1 +275 0x3000 //RX_TDDRC_ALPHA_UP_0 +276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x199A //RX_TDDRC_HMNC_GAIN +279 0x0001 //RX_TDDRC_SMT_FLAG +280 0x0CCD //RX_TDDRC_SMT_W +281 0x0478 //RX_TDDRC_DRC_GAIN +195 0x0014 //RX_FDEQ_SUBNUM +196 0x4848 //RX_FDEQ_GAIN_0 +197 0x4848 //RX_FDEQ_GAIN_1 +198 0x4848 //RX_FDEQ_GAIN_2 +199 0x4848 //RX_FDEQ_GAIN_3 +200 0x4848 //RX_FDEQ_GAIN_4 +201 0x4848 //RX_FDEQ_GAIN_5 +202 0x4848 //RX_FDEQ_GAIN_6 +203 0x4848 //RX_FDEQ_GAIN_7 +204 0x4848 //RX_FDEQ_GAIN_8 +205 0x4848 //RX_FDEQ_GAIN_9 +206 0x4848 //RX_FDEQ_GAIN_10 +207 0x4848 //RX_FDEQ_GAIN_11 +208 0x4848 //RX_FDEQ_GAIN_12 +209 0x4848 //RX_FDEQ_GAIN_13 +210 0x4848 //RX_FDEQ_GAIN_14 +211 0x4848 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0202 //RX_FDEQ_BIN_0 +221 0x0203 //RX_FDEQ_BIN_1 +222 0x0303 //RX_FDEQ_BIN_2 +223 0x0304 //RX_FDEQ_BIN_3 +224 0x0405 //RX_FDEQ_BIN_4 +225 0x0506 //RX_FDEQ_BIN_5 +226 0x0708 //RX_FDEQ_BIN_6 +227 0x090A //RX_FDEQ_BIN_7 +228 0x0B0C //RX_FDEQ_BIN_8 +229 0x0D08 //RX_FDEQ_BIN_9 +230 0x0000 //RX_FDEQ_BIN_10 +231 0x0000 //RX_FDEQ_BIN_11 +232 0x0000 //RX_FDEQ_BIN_12 +233 0x0000 //RX_FDEQ_BIN_13 +234 0x0000 //RX_FDEQ_BIN_14 +235 0x0000 //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x4000 //RX_FDEQ_RESRV_0 +245 0x0320 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0030 //RX_FDDRC_BAND_MARGIN_1 +248 0x0050 //RX_FDDRC_BAND_MARGIN_2 +249 0x0080 //RX_FDDRC_BAND_MARGIN_3 +250 0x0007 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x5000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x6400 //RX_FDDRC_THRD_3_2 +258 0x6400 //RX_FDDRC_THRD_3_3 +259 0x2000 //RX_FDDRC_SLANT_0_0 +260 0x2000 //RX_FDDRC_SLANT_0_1 +261 0x2000 //RX_FDDRC_SLANT_0_2 +262 0x2000 //RX_FDDRC_SLANT_0_3 +263 0x5333 //RX_FDDRC_SLANT_1_0 +264 0x5333 //RX_FDDRC_SLANT_1_1 +265 0x5333 //RX_FDDRC_SLANT_1_2 +266 0x5333 //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +286 0x0014 //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 +#VOL 2 +163 0x3000 //RX_TDDRC_ALPHA_UP_1 +164 0x3000 //RX_TDDRC_ALPHA_UP_2 +165 0x3000 //RX_TDDRC_ALPHA_UP_3 +166 0x3000 //RX_TDDRC_ALPHA_UP_4 +184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +190 0x7FFF //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +269 0x0000 //RX_TDDRC_THRD_0 +270 0x0000 //RX_TDDRC_THRD_1 +271 0x2030 //RX_TDDRC_THRD_2 +272 0x2030 //RX_TDDRC_THRD_3 +273 0x0800 //RX_TDDRC_SLANT_0 +274 0x7EB8 //RX_TDDRC_SLANT_1 +275 0x3000 //RX_TDDRC_ALPHA_UP_0 +276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x199A //RX_TDDRC_HMNC_GAIN +279 0x0001 //RX_TDDRC_SMT_FLAG +280 0x0CCD //RX_TDDRC_SMT_W +281 0x0478 //RX_TDDRC_DRC_GAIN +195 0x0014 //RX_FDEQ_SUBNUM +196 0x4848 //RX_FDEQ_GAIN_0 +197 0x4848 //RX_FDEQ_GAIN_1 +198 0x4848 //RX_FDEQ_GAIN_2 +199 0x4848 //RX_FDEQ_GAIN_3 +200 0x4848 //RX_FDEQ_GAIN_4 +201 0x4848 //RX_FDEQ_GAIN_5 +202 0x4848 //RX_FDEQ_GAIN_6 +203 0x4848 //RX_FDEQ_GAIN_7 +204 0x4848 //RX_FDEQ_GAIN_8 +205 0x4848 //RX_FDEQ_GAIN_9 +206 0x4848 //RX_FDEQ_GAIN_10 +207 0x4848 //RX_FDEQ_GAIN_11 +208 0x4848 //RX_FDEQ_GAIN_12 +209 0x4848 //RX_FDEQ_GAIN_13 +210 0x4848 //RX_FDEQ_GAIN_14 +211 0x4848 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0202 //RX_FDEQ_BIN_0 +221 0x0203 //RX_FDEQ_BIN_1 +222 0x0303 //RX_FDEQ_BIN_2 +223 0x0304 //RX_FDEQ_BIN_3 +224 0x0405 //RX_FDEQ_BIN_4 +225 0x0506 //RX_FDEQ_BIN_5 +226 0x0708 //RX_FDEQ_BIN_6 +227 0x090A //RX_FDEQ_BIN_7 +228 0x0B0C //RX_FDEQ_BIN_8 +229 0x0D08 //RX_FDEQ_BIN_9 +230 0x0000 //RX_FDEQ_BIN_10 +231 0x0000 //RX_FDEQ_BIN_11 +232 0x0000 //RX_FDEQ_BIN_12 +233 0x0000 //RX_FDEQ_BIN_13 +234 0x0000 //RX_FDEQ_BIN_14 +235 0x0000 //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x4000 //RX_FDEQ_RESRV_0 +245 0x0320 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0030 //RX_FDDRC_BAND_MARGIN_1 +248 0x0050 //RX_FDDRC_BAND_MARGIN_2 +249 0x0080 //RX_FDDRC_BAND_MARGIN_3 +250 0x0007 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x5000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x6400 //RX_FDDRC_THRD_3_2 +258 0x6400 //RX_FDDRC_THRD_3_3 +259 0x2000 //RX_FDDRC_SLANT_0_0 +260 0x2000 //RX_FDDRC_SLANT_0_1 +261 0x2000 //RX_FDDRC_SLANT_0_2 +262 0x2000 //RX_FDDRC_SLANT_0_3 +263 0x5333 //RX_FDDRC_SLANT_1_0 +264 0x5333 //RX_FDDRC_SLANT_1_1 +265 0x5333 //RX_FDDRC_SLANT_1_2 +266 0x5333 //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +286 0x0021 //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 +#VOL 3 +163 0x3000 //RX_TDDRC_ALPHA_UP_1 +164 0x3000 //RX_TDDRC_ALPHA_UP_2 +165 0x3000 //RX_TDDRC_ALPHA_UP_3 +166 0x3000 //RX_TDDRC_ALPHA_UP_4 +184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +190 0x7FFF //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +269 0x0000 //RX_TDDRC_THRD_0 +270 0x0000 //RX_TDDRC_THRD_1 +271 0x2030 //RX_TDDRC_THRD_2 +272 0x2030 //RX_TDDRC_THRD_3 +273 0x0800 //RX_TDDRC_SLANT_0 +274 0x7EB8 //RX_TDDRC_SLANT_1 +275 0x3000 //RX_TDDRC_ALPHA_UP_0 +276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x199A //RX_TDDRC_HMNC_GAIN +279 0x0001 //RX_TDDRC_SMT_FLAG +280 0x0CCD //RX_TDDRC_SMT_W +281 0x0478 //RX_TDDRC_DRC_GAIN +195 0x0014 //RX_FDEQ_SUBNUM +196 0x4848 //RX_FDEQ_GAIN_0 +197 0x4848 //RX_FDEQ_GAIN_1 +198 0x4848 //RX_FDEQ_GAIN_2 +199 0x4848 //RX_FDEQ_GAIN_3 +200 0x4848 //RX_FDEQ_GAIN_4 +201 0x4848 //RX_FDEQ_GAIN_5 +202 0x4848 //RX_FDEQ_GAIN_6 +203 0x4848 //RX_FDEQ_GAIN_7 +204 0x4848 //RX_FDEQ_GAIN_8 +205 0x4848 //RX_FDEQ_GAIN_9 +206 0x4848 //RX_FDEQ_GAIN_10 +207 0x4848 //RX_FDEQ_GAIN_11 +208 0x4848 //RX_FDEQ_GAIN_12 +209 0x4848 //RX_FDEQ_GAIN_13 +210 0x4848 //RX_FDEQ_GAIN_14 +211 0x4848 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0202 //RX_FDEQ_BIN_0 +221 0x0203 //RX_FDEQ_BIN_1 +222 0x0303 //RX_FDEQ_BIN_2 +223 0x0304 //RX_FDEQ_BIN_3 +224 0x0405 //RX_FDEQ_BIN_4 +225 0x0506 //RX_FDEQ_BIN_5 +226 0x0708 //RX_FDEQ_BIN_6 +227 0x090A //RX_FDEQ_BIN_7 +228 0x0B0C //RX_FDEQ_BIN_8 +229 0x0D08 //RX_FDEQ_BIN_9 +230 0x0000 //RX_FDEQ_BIN_10 +231 0x0000 //RX_FDEQ_BIN_11 +232 0x0000 //RX_FDEQ_BIN_12 +233 0x0000 //RX_FDEQ_BIN_13 +234 0x0000 //RX_FDEQ_BIN_14 +235 0x0000 //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x4000 //RX_FDEQ_RESRV_0 +245 0x0320 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0030 //RX_FDDRC_BAND_MARGIN_1 +248 0x0050 //RX_FDDRC_BAND_MARGIN_2 +249 0x0080 //RX_FDDRC_BAND_MARGIN_3 +250 0x0007 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x5000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x6400 //RX_FDDRC_THRD_3_2 +258 0x6400 //RX_FDDRC_THRD_3_3 +259 0x2000 //RX_FDDRC_SLANT_0_0 +260 0x2000 //RX_FDDRC_SLANT_0_1 +261 0x2000 //RX_FDDRC_SLANT_0_2 +262 0x2000 //RX_FDDRC_SLANT_0_3 +263 0x5333 //RX_FDDRC_SLANT_1_0 +264 0x5333 //RX_FDDRC_SLANT_1_1 +265 0x5333 //RX_FDDRC_SLANT_1_2 +266 0x5333 //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +286 0x0037 //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 +#VOL 4 +163 0x3000 //RX_TDDRC_ALPHA_UP_1 +164 0x3000 //RX_TDDRC_ALPHA_UP_2 +165 0x3000 //RX_TDDRC_ALPHA_UP_3 +166 0x3000 //RX_TDDRC_ALPHA_UP_4 +184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +190 0x7FFF //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +269 0x0000 //RX_TDDRC_THRD_0 +270 0x0000 //RX_TDDRC_THRD_1 +271 0x2030 //RX_TDDRC_THRD_2 +272 0x2030 //RX_TDDRC_THRD_3 +273 0x0800 //RX_TDDRC_SLANT_0 +274 0x7EB8 //RX_TDDRC_SLANT_1 +275 0x3000 //RX_TDDRC_ALPHA_UP_0 +276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x199A //RX_TDDRC_HMNC_GAIN +279 0x0001 //RX_TDDRC_SMT_FLAG +280 0x0CCD //RX_TDDRC_SMT_W +281 0x0478 //RX_TDDRC_DRC_GAIN +195 0x0014 //RX_FDEQ_SUBNUM +196 0x4848 //RX_FDEQ_GAIN_0 +197 0x4848 //RX_FDEQ_GAIN_1 +198 0x4848 //RX_FDEQ_GAIN_2 +199 0x4848 //RX_FDEQ_GAIN_3 +200 0x4848 //RX_FDEQ_GAIN_4 +201 0x4848 //RX_FDEQ_GAIN_5 +202 0x4848 //RX_FDEQ_GAIN_6 +203 0x4848 //RX_FDEQ_GAIN_7 +204 0x4848 //RX_FDEQ_GAIN_8 +205 0x4848 //RX_FDEQ_GAIN_9 +206 0x4848 //RX_FDEQ_GAIN_10 +207 0x4848 //RX_FDEQ_GAIN_11 +208 0x4848 //RX_FDEQ_GAIN_12 +209 0x4848 //RX_FDEQ_GAIN_13 +210 0x4848 //RX_FDEQ_GAIN_14 +211 0x4848 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0202 //RX_FDEQ_BIN_0 +221 0x0203 //RX_FDEQ_BIN_1 +222 0x0303 //RX_FDEQ_BIN_2 +223 0x0304 //RX_FDEQ_BIN_3 +224 0x0405 //RX_FDEQ_BIN_4 +225 0x0506 //RX_FDEQ_BIN_5 +226 0x0708 //RX_FDEQ_BIN_6 +227 0x090A //RX_FDEQ_BIN_7 +228 0x0B0C //RX_FDEQ_BIN_8 +229 0x0D08 //RX_FDEQ_BIN_9 +230 0x0000 //RX_FDEQ_BIN_10 +231 0x0000 //RX_FDEQ_BIN_11 +232 0x0000 //RX_FDEQ_BIN_12 +233 0x0000 //RX_FDEQ_BIN_13 +234 0x0000 //RX_FDEQ_BIN_14 +235 0x0000 //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x4000 //RX_FDEQ_RESRV_0 +245 0x0320 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0030 //RX_FDDRC_BAND_MARGIN_1 +248 0x0050 //RX_FDDRC_BAND_MARGIN_2 +249 0x0080 //RX_FDDRC_BAND_MARGIN_3 +250 0x0007 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x5000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x6400 //RX_FDDRC_THRD_3_2 +258 0x6400 //RX_FDDRC_THRD_3_3 +259 0x2000 //RX_FDDRC_SLANT_0_0 +260 0x2000 //RX_FDDRC_SLANT_0_1 +261 0x2000 //RX_FDDRC_SLANT_0_2 +262 0x2000 //RX_FDDRC_SLANT_0_3 +263 0x5333 //RX_FDDRC_SLANT_1_0 +264 0x5333 //RX_FDDRC_SLANT_1_1 +265 0x5333 //RX_FDDRC_SLANT_1_2 +266 0x5333 //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +286 0x005B //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 +#VOL 5 +163 0x3000 //RX_TDDRC_ALPHA_UP_1 +164 0x3000 //RX_TDDRC_ALPHA_UP_2 +165 0x3000 //RX_TDDRC_ALPHA_UP_3 +166 0x3000 //RX_TDDRC_ALPHA_UP_4 +184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +190 0x7FFF //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +269 0x0000 //RX_TDDRC_THRD_0 +270 0x0000 //RX_TDDRC_THRD_1 +271 0x2030 //RX_TDDRC_THRD_2 +272 0x2030 //RX_TDDRC_THRD_3 +273 0x0800 //RX_TDDRC_SLANT_0 +274 0x7EB8 //RX_TDDRC_SLANT_1 +275 0x3000 //RX_TDDRC_ALPHA_UP_0 +276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x199A //RX_TDDRC_HMNC_GAIN +279 0x0001 //RX_TDDRC_SMT_FLAG +280 0x0CCD //RX_TDDRC_SMT_W +281 0x0478 //RX_TDDRC_DRC_GAIN +195 0x0014 //RX_FDEQ_SUBNUM +196 0x4848 //RX_FDEQ_GAIN_0 +197 0x4848 //RX_FDEQ_GAIN_1 +198 0x4848 //RX_FDEQ_GAIN_2 +199 0x4848 //RX_FDEQ_GAIN_3 +200 0x4848 //RX_FDEQ_GAIN_4 +201 0x4848 //RX_FDEQ_GAIN_5 +202 0x4848 //RX_FDEQ_GAIN_6 +203 0x4848 //RX_FDEQ_GAIN_7 +204 0x4848 //RX_FDEQ_GAIN_8 +205 0x4848 //RX_FDEQ_GAIN_9 +206 0x4848 //RX_FDEQ_GAIN_10 +207 0x4848 //RX_FDEQ_GAIN_11 +208 0x4848 //RX_FDEQ_GAIN_12 +209 0x4848 //RX_FDEQ_GAIN_13 +210 0x4848 //RX_FDEQ_GAIN_14 +211 0x4848 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0202 //RX_FDEQ_BIN_0 +221 0x0203 //RX_FDEQ_BIN_1 +222 0x0303 //RX_FDEQ_BIN_2 +223 0x0304 //RX_FDEQ_BIN_3 +224 0x0405 //RX_FDEQ_BIN_4 +225 0x0506 //RX_FDEQ_BIN_5 +226 0x0708 //RX_FDEQ_BIN_6 +227 0x090A //RX_FDEQ_BIN_7 +228 0x0B0C //RX_FDEQ_BIN_8 +229 0x0D08 //RX_FDEQ_BIN_9 +230 0x0000 //RX_FDEQ_BIN_10 +231 0x0000 //RX_FDEQ_BIN_11 +232 0x0000 //RX_FDEQ_BIN_12 +233 0x0000 //RX_FDEQ_BIN_13 +234 0x0000 //RX_FDEQ_BIN_14 +235 0x0000 //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x4000 //RX_FDEQ_RESRV_0 +245 0x0320 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0030 //RX_FDDRC_BAND_MARGIN_1 +248 0x0050 //RX_FDDRC_BAND_MARGIN_2 +249 0x0080 //RX_FDDRC_BAND_MARGIN_3 +250 0x0007 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x5000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x6400 //RX_FDDRC_THRD_3_2 +258 0x6400 //RX_FDDRC_THRD_3_3 +259 0x2000 //RX_FDDRC_SLANT_0_0 +260 0x2000 //RX_FDDRC_SLANT_0_1 +261 0x2000 //RX_FDDRC_SLANT_0_2 +262 0x2000 //RX_FDDRC_SLANT_0_3 +263 0x5333 //RX_FDDRC_SLANT_1_0 +264 0x5333 //RX_FDDRC_SLANT_1_1 +265 0x5333 //RX_FDDRC_SLANT_1_2 +266 0x5333 //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +286 0x0099 //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 +#VOL 6 +163 0x3000 //RX_TDDRC_ALPHA_UP_1 +164 0x3000 //RX_TDDRC_ALPHA_UP_2 +165 0x3000 //RX_TDDRC_ALPHA_UP_3 +166 0x3000 //RX_TDDRC_ALPHA_UP_4 +184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +190 0x7FFF //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +269 0x0000 //RX_TDDRC_THRD_0 +270 0x0000 //RX_TDDRC_THRD_1 +271 0x2030 //RX_TDDRC_THRD_2 +272 0x2030 //RX_TDDRC_THRD_3 +273 0x0800 //RX_TDDRC_SLANT_0 +274 0x7EB8 //RX_TDDRC_SLANT_1 +275 0x3000 //RX_TDDRC_ALPHA_UP_0 +276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x199A //RX_TDDRC_HMNC_GAIN +279 0x0001 //RX_TDDRC_SMT_FLAG +280 0x0CCD //RX_TDDRC_SMT_W +281 0x0478 //RX_TDDRC_DRC_GAIN +195 0x0014 //RX_FDEQ_SUBNUM +196 0x4848 //RX_FDEQ_GAIN_0 +197 0x4848 //RX_FDEQ_GAIN_1 +198 0x4848 //RX_FDEQ_GAIN_2 +199 0x4848 //RX_FDEQ_GAIN_3 +200 0x4848 //RX_FDEQ_GAIN_4 +201 0x4848 //RX_FDEQ_GAIN_5 +202 0x4848 //RX_FDEQ_GAIN_6 +203 0x4848 //RX_FDEQ_GAIN_7 +204 0x4848 //RX_FDEQ_GAIN_8 +205 0x4848 //RX_FDEQ_GAIN_9 +206 0x4848 //RX_FDEQ_GAIN_10 +207 0x4848 //RX_FDEQ_GAIN_11 +208 0x4848 //RX_FDEQ_GAIN_12 +209 0x4848 //RX_FDEQ_GAIN_13 +210 0x4848 //RX_FDEQ_GAIN_14 +211 0x4848 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0202 //RX_FDEQ_BIN_0 +221 0x0203 //RX_FDEQ_BIN_1 +222 0x0303 //RX_FDEQ_BIN_2 +223 0x0304 //RX_FDEQ_BIN_3 +224 0x0405 //RX_FDEQ_BIN_4 +225 0x0506 //RX_FDEQ_BIN_5 +226 0x0708 //RX_FDEQ_BIN_6 +227 0x090A //RX_FDEQ_BIN_7 +228 0x0B0C //RX_FDEQ_BIN_8 +229 0x0D08 //RX_FDEQ_BIN_9 +230 0x0000 //RX_FDEQ_BIN_10 +231 0x0000 //RX_FDEQ_BIN_11 +232 0x0000 //RX_FDEQ_BIN_12 +233 0x0000 //RX_FDEQ_BIN_13 +234 0x0000 //RX_FDEQ_BIN_14 +235 0x0000 //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x4000 //RX_FDEQ_RESRV_0 +245 0x0320 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0030 //RX_FDDRC_BAND_MARGIN_1 +248 0x0050 //RX_FDDRC_BAND_MARGIN_2 +249 0x0080 //RX_FDDRC_BAND_MARGIN_3 +250 0x0007 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x5000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x6400 //RX_FDDRC_THRD_3_2 +258 0x6400 //RX_FDDRC_THRD_3_3 +259 0x2000 //RX_FDDRC_SLANT_0_0 +260 0x2000 //RX_FDDRC_SLANT_0_1 +261 0x2000 //RX_FDDRC_SLANT_0_2 +262 0x2000 //RX_FDDRC_SLANT_0_3 +263 0x5333 //RX_FDDRC_SLANT_1_0 +264 0x5333 //RX_FDDRC_SLANT_1_1 +265 0x5333 //RX_FDDRC_SLANT_1_2 +266 0x5333 //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +286 0x0100 //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 #CASE_NAME HEADSET-GOOGLE_CONDOR_CERTIFICATION1-VOICE_GENERIC-WB -#PARAM_MODE FULL -#PARAM_TYPE TX+RX -#TOTAL_CUSTOM_STEP 7 +#PARAM_MODE Full +#PARAM_TYPE TX+2RX +#TOTAL_CUSTOM_STEP 7+7 #TX 0 0x0009 //TX_OPERATION_MODE_0 1 0x0008 //TX_OPERATION_MODE_1 @@ -30068,7 +45640,7 @@ 239 0x0800 //TX_DT_RESRV_7 240 0x0800 //TX_DT_RESRV_8 241 0x0000 //TX_DT_RESRV_9 -242 0xF400 //TX_THR_SN_EST_0 +242 0xFA00 //TX_THR_SN_EST_0 243 0xF400 //TX_THR_SN_EST_1 244 0xF600 //TX_THR_SN_EST_2 245 0xF400 //TX_THR_SN_EST_3 @@ -30077,20 +45649,20 @@ 248 0xF400 //TX_THR_SN_EST_6 249 0xF600 //TX_THR_SN_EST_7 250 0x0000 //TX_DELTA_THR_SN_EST_0 -251 0x0000 //TX_DELTA_THR_SN_EST_1 +251 0x0200 //TX_DELTA_THR_SN_EST_1 252 0x0200 //TX_DELTA_THR_SN_EST_2 253 0x0200 //TX_DELTA_THR_SN_EST_3 254 0x0200 //TX_DELTA_THR_SN_EST_4 255 0x0200 //TX_DELTA_THR_SN_EST_5 -256 0x0200 //TX_DELTA_THR_SN_EST_6 +256 0x0000 //TX_DELTA_THR_SN_EST_6 257 0x0200 //TX_DELTA_THR_SN_EST_7 258 0x6000 //TX_LAMBDA_NN_EST_0 -259 0x6000 //TX_LAMBDA_NN_EST_1 +259 0x4000 //TX_LAMBDA_NN_EST_1 260 0x4000 //TX_LAMBDA_NN_EST_2 261 0x4000 //TX_LAMBDA_NN_EST_3 262 0x4000 //TX_LAMBDA_NN_EST_4 263 0x4000 //TX_LAMBDA_NN_EST_5 -264 0x4000 //TX_LAMBDA_NN_EST_6 +264 0x6000 //TX_LAMBDA_NN_EST_6 265 0x4000 //TX_LAMBDA_NN_EST_7 266 0x0400 //TX_N_SN_EST 267 0x001E //TX_INBEAM_T @@ -30108,16 +45680,16 @@ 279 0x1000 //TX_B_POST_FLT_0 280 0x1000 //TX_B_POST_FLT_1 281 0x000F //TX_NS_LVL_CTRL_0 -282 0x000F //TX_NS_LVL_CTRL_1 -283 0x0011 //TX_NS_LVL_CTRL_2 +282 0x0011 //TX_NS_LVL_CTRL_1 +283 0x000F //TX_NS_LVL_CTRL_2 284 0x000F //TX_NS_LVL_CTRL_3 285 0x000F //TX_NS_LVL_CTRL_4 286 0x000F //TX_NS_LVL_CTRL_5 287 0x000F //TX_NS_LVL_CTRL_6 288 0x0011 //TX_NS_LVL_CTRL_7 289 0x000C //TX_MIN_GAIN_S_0 -290 0x000C //TX_MIN_GAIN_S_1 -291 0x000F //TX_MIN_GAIN_S_2 +290 0x000F //TX_MIN_GAIN_S_1 +291 0x000C //TX_MIN_GAIN_S_2 292 0x000C //TX_MIN_GAIN_S_3 293 0x000C //TX_MIN_GAIN_S_4 294 0x000C //TX_MIN_GAIN_S_5 @@ -30141,12 +45713,12 @@ 312 0x7FFF //TX_A_POST_FILT_0 313 0x2000 //TX_A_POST_FILT_1 314 0x4000 //TX_A_POST_FILT_S_0 -315 0x4000 //TX_A_POST_FILT_S_1 +315 0x5000 //TX_A_POST_FILT_S_1 316 0x5000 //TX_A_POST_FILT_S_2 317 0x5000 //TX_A_POST_FILT_S_3 318 0x5000 //TX_A_POST_FILT_S_4 319 0x5000 //TX_A_POST_FILT_S_5 -320 0x5000 //TX_A_POST_FILT_S_6 +320 0x4000 //TX_A_POST_FILT_S_6 321 0x5000 //TX_A_POST_FILT_S_7 322 0x1000 //TX_B_POST_FILT_0 323 0x1000 //TX_B_POST_FILT_1 @@ -30193,7 +45765,7 @@ 364 0x0000 //TX_K_APT 365 0x0001 //TX_NOISEDET 366 0x0190 //TX_NDETCT -367 0x0050 //TX_NOISE_TH_0 +367 0x0102 //TX_NOISE_TH_0 368 0x7FFF //TX_NOISE_TH_0_2 369 0x7FFF //TX_NOISE_TH_0_3 370 0x07D0 //TX_NOISE_TH_1 @@ -30205,11 +45777,11 @@ 376 0x7FFF //TX_NOISE_TH_5_3 377 0x7FFF //TX_NOISE_TH_5_4 378 0x044C //TX_NOISE_TH_6 -379 0x0014 //TX_MINENOISE_TH -380 0x4000 //TX_MINENOISE_MIC0_TH_MTS -381 0xFFEE //TX_MINENOISE_MIC0_TH_EXP -382 0x6000 //TX_MINENOISE_MIC0_S_TH_MTS -383 0xFFF3 //TX_MINENOISE_MIC0_S_TH_EXP +379 0x00F8 //TX_MINENOISE_TH +380 0xD508 //TX_MORENS_TFMASK_TH +381 0x0001 //TX_DRC_QUIET_FLOOR +382 0x3A98 //TX_RATIODTL_CUT_TH +383 0x0DAC //TX_DT_CUT_K1 384 0x0666 //TX_OUT_ENER_S_TH_CLEAN 385 0x0666 //TX_OUT_ENER_S_TH_LESSCLEAN 386 0x0333 //TX_OUT_ENER_S_TH_NOISY @@ -30217,22 +45789,22 @@ 388 0x0333 //TX_OUT_ENER_TH_SPEECH 389 0x2000 //TX_SN_NPB_GAIN 390 0x0000 //TX_NN_NPB_GAIN -391 0x0000 //TX_CSX_ALPHA_0 -392 0x0000 //TX_CSX_ALPHA_1 -393 0x0000 //TX_CSX_ALPHA_2 -394 0x0000 //TX_CSX_ALPHA_3 -395 0x0800 //TX_MU_ARSP_EST -396 0x00C8 //TX_P_OUTBEAM_MIN_TH +391 0x7FFF //TX_POST_MASK_SUP_HSNE +392 0x1388 //TX_TAIL_DET_TH +393 0x4000 //TX_B_LESSCUT_RTO_WTA +394 0x0000 //TX_MEL_G_R +395 0x0080 //TX_SUPHIGH_TH +396 0x0000 //TX_MASK_G_R 397 0x0002 //TX_EXTRA_NS_L -398 0x0800 //TX_EXTRA_NS_A -399 0x0005 //TX_VR_NOISE_FLOOR_TH +398 0x1800 //TX_C_POST_FLT_MASK +399 0x7FFF //TX_A_POST_FLT_WNS 400 0x0148 //TX_MIN_G_LOW300HZ 401 0x0002 //TX_MAXLEVEL_CNG 402 0x00B4 //TX_STN_NOISE_TH 403 0x4000 //TX_POST_MASK_SUP 404 0x7FFF //TX_POST_MASK_ADJUST 405 0x00C8 //TX_NS_ENOISE_MIC0_TH -406 0x0014 //TX_MINENOISE_MIC0_TH +406 0x00DC //TX_MINENOISE_MIC0_TH 407 0x012C //TX_MINENOISE_MIC0_S_TH 408 0x7FFF //TX_MIN_G_CTRL_SSNS 409 0x0000 //TX_METAL_RTO_THR @@ -30340,16 +45912,16 @@ 511 0x6666 //TX_MIC_TO_BFGAIN 512 0x0000 //TX_MICTOBFGAIN0 513 0x0000 //TX_FASTMUE_TH -514 0x0000 //TX_DERVB_LEN_0 -515 0x0000 //TX_DERVB_LEN_1 -516 0x0000 //TX_RHO_DERVB -517 0x0000 //TX_MIC_INDX_DERVB -518 0x0000 //TX_MU_DERVB -519 0x0000 //TX_DR_RESRV_0 -520 0x0000 //TX_DR_RESRV_1 -521 0x0000 //TX_DR_RESRV_2 -522 0x0000 //TX_DR_RESRV_3 -523 0x0000 //TX_DR_RESRV_4 +514 0xC000 //TX_DEREVERB_LF_MU +515 0xC000 //TX_DEREVERB_HF_MU +516 0xCCCC //TX_DEREVERB_DELAY +517 0xD999 //TX_DEREVERB_COEF_LEN +518 0x1F40 //TX_DEREVERB_DNR +519 0x0000 //TX_DEREVERB_ALPHA +520 0x0000 //TX_DEREVERB_BETA +521 0x0000 //TX_GSC_RTOL_TH +522 0x7000 //TX_GSC_RTOH_TH +523 0x0064 //TX_WIDE2_MEANHTH 524 0x0000 //TX_DR_RESRV_5 525 0x0000 //TX_DR_RESRV_6 526 0x0000 //TX_DR_RESRV_7 @@ -30717,14 +46289,79 @@ 888 0x00C8 //TX_FASTNS_ARSPC_TH 889 0xC000 //TX_FASTNS_MASK5_TH 890 0x4848 //TX_POSTSSA_MIN_G_VR_MASK -891 0x7FFF //TX_A_LESSCUT_RTO_MASK +891 0x4000 //TX_A_LESSCUT_RTO_MASK 892 0x1770 //TX_FASTNS_NOISETH 893 0xC000 //TX_FASTNS_SSA_THLFL 894 0xC000 //TX_FASTNS_SSA_THHFL 895 0xCCCC //TX_FASTNS_SSA_THLFH 896 0xD999 //TX_FASTNS_SSA_THHFH +897 0x2339 //TX_SENDFUNC_REG_MICMUTE +898 0x0021 //TX_SENDFUNC_REG_MICMUTE1 +899 0x02BC //TX_MICMUTE_RATIO_THR +900 0x0140 //TX_MICMUTE_AMP_THR +901 0x0004 //TX_MICMUTE_HPF_IND +902 0x00C0 //TX_MICMUTE_LOG_EYR_TH +903 0x0008 //TX_MICMUTE_CVG_TIME +904 0x0008 //TX_MICMUTE_RELEASE_TIME +905 0x01FE //TX_MIC_VOLUME_MIC0MUTE +906 0x0020 //TX_MICMUTE_EPD_OFFSET_0 +907 0x001E //TX_MICMUTE_FRQ_AEC_L +908 0x7999 //TX_MICMUTE_EAD_THR +909 0x7FFF //TX_MICMUTE_LAMBDA_CB_NLE +910 0x7FFF //TX_MICMUTE_LAMBDA_RE_EST +911 0x4000 //TX_DTD_THR1_MICMUTE_0 +912 0x7000 //TX_DTD_THR1_MICMUTE_1 +913 0x7FFF //TX_DTD_THR1_MICMUTE_2 +914 0x7FFF //TX_DTD_THR1_MICMUTE_3 +915 0x6CCC //TX_DTD_THR2_MICMUTE_0 +916 0x0400 //TX_MICMUTE_MIN_EQ_RE_EST_0 +917 0x0400 //TX_MICMUTE_MIN_EQ_RE_EST_1 +918 0x1000 //TX_MICMUTE_MIN_EQ_RE_EST_2 +919 0x7FFF //TX_MICMUTE_MIN_EQ_RE_EST_3 +920 0x7FFF //TX_MICMUTE_MIN_EQ_RE_EST_4 +921 0x4000 //TX_MICMUTE_C_POST_FLT +922 0x03E8 //TX_MICMUTE_DT_CUT_K +923 0x0001 //TX_MICMUTE_DT_CUT_THR +924 0x03E8 //TX_MICMUTE_DT_CUT_K2 +925 0x0001 //TX_MICMUTE_DT_CUT_THR2 +926 0x0064 //TX_MICMUTE_DT2_HOLD_N +927 0x1000 //TX_MICMUTE_RATIODTH_THCUT +928 0x1000 //TX_MICMUTE_B_POST_FLT_ECHOL +929 0x7FFF //TX_MICMUTE_B_POST_FLT_ECHOH +930 0x0400 //TX_MICMUTE_C_POST_FLT_MASK +931 0x7999 //TX_MICMUTE_RATIODTL_CUT_TH +932 0x0258 //TX_MICMUTE_DT_CUT_K1 +933 0x0800 //TX_MICMUTE_N2_SN_EST +934 0xFC00 //TX_MICMUTE_THR_SN_EST_0 +935 0x001C //TX_MICMUTE_MIN_G_CTRL_0 +936 0x6000 //TX_MICMUTE_A_POST_FILT_S_0 +937 0x7000 //TX_MICMUTE_B_POST_FILT_0 +938 0x2710 //TX_MIC1RUB_AMP_THR +939 0x0010 //TX_MIC1MUTE_RATIO_THR +940 0x0450 //TX_MIC1MUTE_AMP_THR +941 0x0008 //TX_MIC1MUTE_CVG_TIME +942 0x0008 //TX_MIC1MUTE_RELEASE_TIME +943 0x0000 //TX_AMS_RESRV_01 +944 0x0000 //TX_AMS_RESRV_02 +945 0x0000 //TX_AMS_RESRV_03 +946 0x0000 //TX_AMS_RESRV_04 +947 0x0000 //TX_AMS_RESRV_05 +948 0x0000 //TX_AMS_RESRV_06 +949 0x0000 //TX_AMS_RESRV_07 +950 0x0000 //TX_AMS_RESRV_08 +951 0x0000 //TX_AMS_RESRV_09 +952 0x0000 //TX_AMS_RESRV_10 +953 0x0000 //TX_AMS_RESRV_11 +954 0x0000 //TX_AMS_RESRV_12 +955 0x0000 //TX_AMS_RESRV_13 +956 0x0000 //TX_AMS_RESRV_14 +957 0x0000 //TX_AMS_RESRV_15 +958 0x0000 //TX_AMS_RESRV_16 +959 0x0000 //TX_AMS_RESRV_17 +960 0x0000 //TX_AMS_RESRV_18 +961 0x0000 //TX_AMS_RESRV_19 #RX -0 0x0024 //RX_RECVFUNC_MODE_0 +0 0x2024 //RX_RECVFUNC_MODE_0 1 0x0000 //RX_RECVFUNC_MODE_1 2 0x0001 //RX_SAMPLINGFREQ_SIG 3 0x0001 //RX_SAMPLINGFREQ_PROC @@ -31574,11 +47211,862 @@ 110 0x0000 //RX_FDDRC_RESRV_0 129 0x0100 //RX_SPK_VOL 130 0x0000 //RX_VOL_RESRV_0 +#RX 2 +157 0x2024 //RX_RECVFUNC_MODE_0 +158 0x0000 //RX_RECVFUNC_MODE_1 +159 0x0001 //RX_SAMPLINGFREQ_SIG +160 0x0001 //RX_SAMPLINGFREQ_PROC +161 0x000A //RX_FRAME_SZ +162 0x0000 //RX_DELAY_OPT +163 0x3000 //RX_TDDRC_ALPHA_UP_1 +164 0x3000 //RX_TDDRC_ALPHA_UP_2 +165 0x3000 //RX_TDDRC_ALPHA_UP_3 +166 0x3000 //RX_TDDRC_ALPHA_UP_4 +167 0x0800 //RX_PGA +168 0x7FFF //RX_A_HP +169 0x4000 //RX_B_PE +170 0x3800 //RX_THR_PITCH_DET_0 +171 0x3000 //RX_THR_PITCH_DET_1 +172 0x2800 //RX_THR_PITCH_DET_2 +173 0x0008 //RX_PITCH_BFR_LEN +174 0x0003 //RX_SBD_PITCH_DET +175 0x0100 //RX_PP_RESRV_0 +176 0x0020 //RX_PP_RESRV_1 +177 0x0600 //RX_N_SN_EST +178 0x000C //RX_N2_SN_EST +179 0x0010 //RX_NS_LVL_CTRL +180 0xF800 //RX_THR_SN_EST +181 0x7CCD //RX_LAMBDA_PFILT +182 0x000A //RX_FENS_RESRV_0 +183 0x0190 //RX_FENS_RESRV_1 +184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +187 0x0002 //RX_EXTRA_NS_L +188 0x0800 //RX_EXTRA_NS_A +189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +190 0x7FFF //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +192 0x199A //RX_A_POST_FLT +193 0x0000 //RX_LMT_THRD +194 0x4000 //RX_LMT_ALPHA +195 0x001C //RX_FDEQ_SUBNUM +196 0x4848 //RX_FDEQ_GAIN_0 +197 0x4848 //RX_FDEQ_GAIN_1 +198 0x4848 //RX_FDEQ_GAIN_2 +199 0x4848 //RX_FDEQ_GAIN_3 +200 0x4848 //RX_FDEQ_GAIN_4 +201 0x4848 //RX_FDEQ_GAIN_5 +202 0x4848 //RX_FDEQ_GAIN_6 +203 0x4848 //RX_FDEQ_GAIN_7 +204 0x4848 //RX_FDEQ_GAIN_8 +205 0x4848 //RX_FDEQ_GAIN_9 +206 0x4848 //RX_FDEQ_GAIN_10 +207 0x4848 //RX_FDEQ_GAIN_11 +208 0x4848 //RX_FDEQ_GAIN_12 +209 0x4848 //RX_FDEQ_GAIN_13 +210 0x4848 //RX_FDEQ_GAIN_14 +211 0x4848 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0202 //RX_FDEQ_BIN_0 +221 0x0203 //RX_FDEQ_BIN_1 +222 0x0303 //RX_FDEQ_BIN_2 +223 0x0304 //RX_FDEQ_BIN_3 +224 0x0405 //RX_FDEQ_BIN_4 +225 0x0506 //RX_FDEQ_BIN_5 +226 0x0708 //RX_FDEQ_BIN_6 +227 0x090A //RX_FDEQ_BIN_7 +228 0x0B0C //RX_FDEQ_BIN_8 +229 0x0D0E //RX_FDEQ_BIN_9 +230 0x0E0F //RX_FDEQ_BIN_10 +231 0x0F10 //RX_FDEQ_BIN_11 +232 0x1011 //RX_FDEQ_BIN_12 +233 0x1104 //RX_FDEQ_BIN_13 +234 0x0000 //RX_FDEQ_BIN_14 +235 0x0000 //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x4000 //RX_FDEQ_RESRV_0 +245 0x0320 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0030 //RX_FDDRC_BAND_MARGIN_1 +248 0x0050 //RX_FDDRC_BAND_MARGIN_2 +249 0x0080 //RX_FDDRC_BAND_MARGIN_3 +250 0x0007 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x5000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x6400 //RX_FDDRC_THRD_3_2 +258 0x6400 //RX_FDDRC_THRD_3_3 +259 0x2000 //RX_FDDRC_SLANT_0_0 +260 0x2000 //RX_FDDRC_SLANT_0_1 +261 0x2000 //RX_FDDRC_SLANT_0_2 +262 0x2000 //RX_FDDRC_SLANT_0_3 +263 0x5333 //RX_FDDRC_SLANT_1_0 +264 0x5333 //RX_FDDRC_SLANT_1_1 +265 0x5333 //RX_FDDRC_SLANT_1_2 +266 0x5333 //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +268 0x0002 //RX_FILTINDX +269 0x0000 //RX_TDDRC_THRD_0 +270 0x0000 //RX_TDDRC_THRD_1 +271 0x2000 //RX_TDDRC_THRD_2 +272 0x3000 //RX_TDDRC_THRD_3 +273 0x0800 //RX_TDDRC_SLANT_0 +274 0x7EB8 //RX_TDDRC_SLANT_1 +275 0x3000 //RX_TDDRC_ALPHA_UP_0 +276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x199A //RX_TDDRC_HMNC_GAIN +279 0x0001 //RX_TDDRC_SMT_FLAG +280 0x0CCD //RX_TDDRC_SMT_W +281 0x0196 //RX_TDDRC_DRC_GAIN +282 0x7C00 //RX_LAMBDA_PKA_FP +283 0x2000 //RX_TPKA_FP +284 0x2000 //RX_MIN_G_FP +285 0x0080 //RX_MAX_G_FP +286 0x000C //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 +288 0x0000 //RX_MAXLEVEL_CNG +289 0x3000 //RX_BWE_UV_TH +290 0x3000 //RX_BWE_UV_TH2 +291 0x1800 //RX_BWE_UV_TH3 +292 0x1000 //RX_BWE_V_TH +293 0x04CD //RX_BWE_GAIN1_V_TH1 +294 0x0F33 //RX_BWE_GAIN1_V_TH2 +295 0x7333 //RX_BWE_UV_EQ +296 0x199A //RX_BWE_V_EQ +297 0x7333 //RX_BWE_TONE_TH +298 0x0004 //RX_BWE_UV_HOLD_T +299 0x6CCD //RX_BWE_GAIN2_ALPHA +300 0x799A //RX_BWE_GAIN3_ALPHA +301 0x001E //RX_BWE_CUTOFF +302 0x3000 //RX_BWE_GAINFILL +303 0x3200 //RX_BWE_MAXTH_TONE +304 0x2000 //RX_BWE_EQ_0 +305 0x2000 //RX_BWE_EQ_1 +306 0x2000 //RX_BWE_EQ_2 +307 0x2000 //RX_BWE_EQ_3 +308 0x2000 //RX_BWE_EQ_4 +309 0x2000 //RX_BWE_EQ_5 +310 0x2000 //RX_BWE_EQ_6 +311 0x0000 //RX_BWE_RESRV_0 +312 0x0000 //RX_BWE_RESRV_1 +313 0x0000 //RX_BWE_RESRV_2 +#VOL 0 +163 0x3000 //RX_TDDRC_ALPHA_UP_1 +164 0x3000 //RX_TDDRC_ALPHA_UP_2 +165 0x3000 //RX_TDDRC_ALPHA_UP_3 +166 0x3000 //RX_TDDRC_ALPHA_UP_4 +184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +190 0x7FFF //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +269 0x0000 //RX_TDDRC_THRD_0 +270 0x0000 //RX_TDDRC_THRD_1 +271 0x2000 //RX_TDDRC_THRD_2 +272 0x3000 //RX_TDDRC_THRD_3 +273 0x0800 //RX_TDDRC_SLANT_0 +274 0x7EB8 //RX_TDDRC_SLANT_1 +275 0x3000 //RX_TDDRC_ALPHA_UP_0 +276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x199A //RX_TDDRC_HMNC_GAIN +279 0x0001 //RX_TDDRC_SMT_FLAG +280 0x0CCD //RX_TDDRC_SMT_W +281 0x0196 //RX_TDDRC_DRC_GAIN +195 0x001C //RX_FDEQ_SUBNUM +196 0x4848 //RX_FDEQ_GAIN_0 +197 0x4848 //RX_FDEQ_GAIN_1 +198 0x4848 //RX_FDEQ_GAIN_2 +199 0x4848 //RX_FDEQ_GAIN_3 +200 0x4848 //RX_FDEQ_GAIN_4 +201 0x4848 //RX_FDEQ_GAIN_5 +202 0x4848 //RX_FDEQ_GAIN_6 +203 0x4848 //RX_FDEQ_GAIN_7 +204 0x4848 //RX_FDEQ_GAIN_8 +205 0x4848 //RX_FDEQ_GAIN_9 +206 0x4848 //RX_FDEQ_GAIN_10 +207 0x4848 //RX_FDEQ_GAIN_11 +208 0x4848 //RX_FDEQ_GAIN_12 +209 0x4848 //RX_FDEQ_GAIN_13 +210 0x4848 //RX_FDEQ_GAIN_14 +211 0x4848 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0202 //RX_FDEQ_BIN_0 +221 0x0203 //RX_FDEQ_BIN_1 +222 0x0303 //RX_FDEQ_BIN_2 +223 0x0304 //RX_FDEQ_BIN_3 +224 0x0405 //RX_FDEQ_BIN_4 +225 0x0506 //RX_FDEQ_BIN_5 +226 0x0708 //RX_FDEQ_BIN_6 +227 0x090A //RX_FDEQ_BIN_7 +228 0x0B0C //RX_FDEQ_BIN_8 +229 0x0D0E //RX_FDEQ_BIN_9 +230 0x0E0F //RX_FDEQ_BIN_10 +231 0x0F10 //RX_FDEQ_BIN_11 +232 0x1011 //RX_FDEQ_BIN_12 +233 0x1104 //RX_FDEQ_BIN_13 +234 0x0000 //RX_FDEQ_BIN_14 +235 0x0000 //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x4000 //RX_FDEQ_RESRV_0 +245 0x0320 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0030 //RX_FDDRC_BAND_MARGIN_1 +248 0x0050 //RX_FDDRC_BAND_MARGIN_2 +249 0x0080 //RX_FDDRC_BAND_MARGIN_3 +250 0x0007 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x5000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x6400 //RX_FDDRC_THRD_3_2 +258 0x6400 //RX_FDDRC_THRD_3_3 +259 0x2000 //RX_FDDRC_SLANT_0_0 +260 0x2000 //RX_FDDRC_SLANT_0_1 +261 0x2000 //RX_FDDRC_SLANT_0_2 +262 0x2000 //RX_FDDRC_SLANT_0_3 +263 0x5333 //RX_FDDRC_SLANT_1_0 +264 0x5333 //RX_FDDRC_SLANT_1_1 +265 0x5333 //RX_FDDRC_SLANT_1_2 +266 0x5333 //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +286 0x000C //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 +#VOL 1 +163 0x3000 //RX_TDDRC_ALPHA_UP_1 +164 0x3000 //RX_TDDRC_ALPHA_UP_2 +165 0x3000 //RX_TDDRC_ALPHA_UP_3 +166 0x3000 //RX_TDDRC_ALPHA_UP_4 +184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +190 0x7FFF //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +269 0x0000 //RX_TDDRC_THRD_0 +270 0x0000 //RX_TDDRC_THRD_1 +271 0x2000 //RX_TDDRC_THRD_2 +272 0x3000 //RX_TDDRC_THRD_3 +273 0x0800 //RX_TDDRC_SLANT_0 +274 0x7EB8 //RX_TDDRC_SLANT_1 +275 0x3000 //RX_TDDRC_ALPHA_UP_0 +276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x199A //RX_TDDRC_HMNC_GAIN +279 0x0001 //RX_TDDRC_SMT_FLAG +280 0x0CCD //RX_TDDRC_SMT_W +281 0x0196 //RX_TDDRC_DRC_GAIN +195 0x001C //RX_FDEQ_SUBNUM +196 0x4848 //RX_FDEQ_GAIN_0 +197 0x4848 //RX_FDEQ_GAIN_1 +198 0x4848 //RX_FDEQ_GAIN_2 +199 0x4848 //RX_FDEQ_GAIN_3 +200 0x4848 //RX_FDEQ_GAIN_4 +201 0x4848 //RX_FDEQ_GAIN_5 +202 0x4848 //RX_FDEQ_GAIN_6 +203 0x4848 //RX_FDEQ_GAIN_7 +204 0x4848 //RX_FDEQ_GAIN_8 +205 0x4848 //RX_FDEQ_GAIN_9 +206 0x4848 //RX_FDEQ_GAIN_10 +207 0x4848 //RX_FDEQ_GAIN_11 +208 0x4848 //RX_FDEQ_GAIN_12 +209 0x4848 //RX_FDEQ_GAIN_13 +210 0x4848 //RX_FDEQ_GAIN_14 +211 0x4848 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0202 //RX_FDEQ_BIN_0 +221 0x0203 //RX_FDEQ_BIN_1 +222 0x0303 //RX_FDEQ_BIN_2 +223 0x0304 //RX_FDEQ_BIN_3 +224 0x0405 //RX_FDEQ_BIN_4 +225 0x0506 //RX_FDEQ_BIN_5 +226 0x0708 //RX_FDEQ_BIN_6 +227 0x090A //RX_FDEQ_BIN_7 +228 0x0B0C //RX_FDEQ_BIN_8 +229 0x0D0E //RX_FDEQ_BIN_9 +230 0x0E0F //RX_FDEQ_BIN_10 +231 0x0F10 //RX_FDEQ_BIN_11 +232 0x1011 //RX_FDEQ_BIN_12 +233 0x1104 //RX_FDEQ_BIN_13 +234 0x0000 //RX_FDEQ_BIN_14 +235 0x0000 //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x4000 //RX_FDEQ_RESRV_0 +245 0x0320 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0030 //RX_FDDRC_BAND_MARGIN_1 +248 0x0050 //RX_FDDRC_BAND_MARGIN_2 +249 0x0080 //RX_FDDRC_BAND_MARGIN_3 +250 0x0007 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x5000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x6400 //RX_FDDRC_THRD_3_2 +258 0x6400 //RX_FDDRC_THRD_3_3 +259 0x2000 //RX_FDDRC_SLANT_0_0 +260 0x2000 //RX_FDDRC_SLANT_0_1 +261 0x2000 //RX_FDDRC_SLANT_0_2 +262 0x2000 //RX_FDDRC_SLANT_0_3 +263 0x5333 //RX_FDDRC_SLANT_1_0 +264 0x5333 //RX_FDDRC_SLANT_1_1 +265 0x5333 //RX_FDDRC_SLANT_1_2 +266 0x5333 //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +286 0x0014 //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 +#VOL 2 +163 0x3000 //RX_TDDRC_ALPHA_UP_1 +164 0x3000 //RX_TDDRC_ALPHA_UP_2 +165 0x3000 //RX_TDDRC_ALPHA_UP_3 +166 0x3000 //RX_TDDRC_ALPHA_UP_4 +184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +190 0x7FFF //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +269 0x0000 //RX_TDDRC_THRD_0 +270 0x0000 //RX_TDDRC_THRD_1 +271 0x2000 //RX_TDDRC_THRD_2 +272 0x3000 //RX_TDDRC_THRD_3 +273 0x0800 //RX_TDDRC_SLANT_0 +274 0x7EB8 //RX_TDDRC_SLANT_1 +275 0x3000 //RX_TDDRC_ALPHA_UP_0 +276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x199A //RX_TDDRC_HMNC_GAIN +279 0x0001 //RX_TDDRC_SMT_FLAG +280 0x0CCD //RX_TDDRC_SMT_W +281 0x0196 //RX_TDDRC_DRC_GAIN +195 0x001C //RX_FDEQ_SUBNUM +196 0x4848 //RX_FDEQ_GAIN_0 +197 0x4848 //RX_FDEQ_GAIN_1 +198 0x4848 //RX_FDEQ_GAIN_2 +199 0x4848 //RX_FDEQ_GAIN_3 +200 0x4848 //RX_FDEQ_GAIN_4 +201 0x4848 //RX_FDEQ_GAIN_5 +202 0x4848 //RX_FDEQ_GAIN_6 +203 0x4848 //RX_FDEQ_GAIN_7 +204 0x4848 //RX_FDEQ_GAIN_8 +205 0x4848 //RX_FDEQ_GAIN_9 +206 0x4848 //RX_FDEQ_GAIN_10 +207 0x4848 //RX_FDEQ_GAIN_11 +208 0x4848 //RX_FDEQ_GAIN_12 +209 0x4848 //RX_FDEQ_GAIN_13 +210 0x4848 //RX_FDEQ_GAIN_14 +211 0x4848 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0202 //RX_FDEQ_BIN_0 +221 0x0203 //RX_FDEQ_BIN_1 +222 0x0303 //RX_FDEQ_BIN_2 +223 0x0304 //RX_FDEQ_BIN_3 +224 0x0405 //RX_FDEQ_BIN_4 +225 0x0506 //RX_FDEQ_BIN_5 +226 0x0708 //RX_FDEQ_BIN_6 +227 0x090A //RX_FDEQ_BIN_7 +228 0x0B0C //RX_FDEQ_BIN_8 +229 0x0D0E //RX_FDEQ_BIN_9 +230 0x0E0F //RX_FDEQ_BIN_10 +231 0x0F10 //RX_FDEQ_BIN_11 +232 0x1011 //RX_FDEQ_BIN_12 +233 0x1104 //RX_FDEQ_BIN_13 +234 0x0000 //RX_FDEQ_BIN_14 +235 0x0000 //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x4000 //RX_FDEQ_RESRV_0 +245 0x0320 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0030 //RX_FDDRC_BAND_MARGIN_1 +248 0x0050 //RX_FDDRC_BAND_MARGIN_2 +249 0x0080 //RX_FDDRC_BAND_MARGIN_3 +250 0x0007 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x5000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x6400 //RX_FDDRC_THRD_3_2 +258 0x6400 //RX_FDDRC_THRD_3_3 +259 0x2000 //RX_FDDRC_SLANT_0_0 +260 0x2000 //RX_FDDRC_SLANT_0_1 +261 0x2000 //RX_FDDRC_SLANT_0_2 +262 0x2000 //RX_FDDRC_SLANT_0_3 +263 0x5333 //RX_FDDRC_SLANT_1_0 +264 0x5333 //RX_FDDRC_SLANT_1_1 +265 0x5333 //RX_FDDRC_SLANT_1_2 +266 0x5333 //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +286 0x0021 //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 +#VOL 3 +163 0x3000 //RX_TDDRC_ALPHA_UP_1 +164 0x3000 //RX_TDDRC_ALPHA_UP_2 +165 0x3000 //RX_TDDRC_ALPHA_UP_3 +166 0x3000 //RX_TDDRC_ALPHA_UP_4 +184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +190 0x7FFF //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +269 0x0000 //RX_TDDRC_THRD_0 +270 0x0000 //RX_TDDRC_THRD_1 +271 0x2000 //RX_TDDRC_THRD_2 +272 0x3000 //RX_TDDRC_THRD_3 +273 0x0800 //RX_TDDRC_SLANT_0 +274 0x7EB8 //RX_TDDRC_SLANT_1 +275 0x3000 //RX_TDDRC_ALPHA_UP_0 +276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x199A //RX_TDDRC_HMNC_GAIN +279 0x0001 //RX_TDDRC_SMT_FLAG +280 0x0CCD //RX_TDDRC_SMT_W +281 0x0196 //RX_TDDRC_DRC_GAIN +195 0x001C //RX_FDEQ_SUBNUM +196 0x4848 //RX_FDEQ_GAIN_0 +197 0x4848 //RX_FDEQ_GAIN_1 +198 0x4848 //RX_FDEQ_GAIN_2 +199 0x4848 //RX_FDEQ_GAIN_3 +200 0x4848 //RX_FDEQ_GAIN_4 +201 0x4848 //RX_FDEQ_GAIN_5 +202 0x4848 //RX_FDEQ_GAIN_6 +203 0x4848 //RX_FDEQ_GAIN_7 +204 0x4848 //RX_FDEQ_GAIN_8 +205 0x4848 //RX_FDEQ_GAIN_9 +206 0x4848 //RX_FDEQ_GAIN_10 +207 0x4848 //RX_FDEQ_GAIN_11 +208 0x4848 //RX_FDEQ_GAIN_12 +209 0x4848 //RX_FDEQ_GAIN_13 +210 0x4848 //RX_FDEQ_GAIN_14 +211 0x4848 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0202 //RX_FDEQ_BIN_0 +221 0x0203 //RX_FDEQ_BIN_1 +222 0x0303 //RX_FDEQ_BIN_2 +223 0x0304 //RX_FDEQ_BIN_3 +224 0x0405 //RX_FDEQ_BIN_4 +225 0x0506 //RX_FDEQ_BIN_5 +226 0x0708 //RX_FDEQ_BIN_6 +227 0x090A //RX_FDEQ_BIN_7 +228 0x0B0C //RX_FDEQ_BIN_8 +229 0x0D0E //RX_FDEQ_BIN_9 +230 0x0E0F //RX_FDEQ_BIN_10 +231 0x0F10 //RX_FDEQ_BIN_11 +232 0x1011 //RX_FDEQ_BIN_12 +233 0x1104 //RX_FDEQ_BIN_13 +234 0x0000 //RX_FDEQ_BIN_14 +235 0x0000 //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x4000 //RX_FDEQ_RESRV_0 +245 0x0320 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0030 //RX_FDDRC_BAND_MARGIN_1 +248 0x0050 //RX_FDDRC_BAND_MARGIN_2 +249 0x0080 //RX_FDDRC_BAND_MARGIN_3 +250 0x0007 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x5000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x6400 //RX_FDDRC_THRD_3_2 +258 0x6400 //RX_FDDRC_THRD_3_3 +259 0x2000 //RX_FDDRC_SLANT_0_0 +260 0x2000 //RX_FDDRC_SLANT_0_1 +261 0x2000 //RX_FDDRC_SLANT_0_2 +262 0x2000 //RX_FDDRC_SLANT_0_3 +263 0x5333 //RX_FDDRC_SLANT_1_0 +264 0x5333 //RX_FDDRC_SLANT_1_1 +265 0x5333 //RX_FDDRC_SLANT_1_2 +266 0x5333 //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +286 0x0037 //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 +#VOL 4 +163 0x3000 //RX_TDDRC_ALPHA_UP_1 +164 0x3000 //RX_TDDRC_ALPHA_UP_2 +165 0x3000 //RX_TDDRC_ALPHA_UP_3 +166 0x3000 //RX_TDDRC_ALPHA_UP_4 +184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +190 0x7FFF //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +269 0x0000 //RX_TDDRC_THRD_0 +270 0x0000 //RX_TDDRC_THRD_1 +271 0x2000 //RX_TDDRC_THRD_2 +272 0x3000 //RX_TDDRC_THRD_3 +273 0x0800 //RX_TDDRC_SLANT_0 +274 0x7EB8 //RX_TDDRC_SLANT_1 +275 0x3000 //RX_TDDRC_ALPHA_UP_0 +276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x199A //RX_TDDRC_HMNC_GAIN +279 0x0001 //RX_TDDRC_SMT_FLAG +280 0x0CCD //RX_TDDRC_SMT_W +281 0x0196 //RX_TDDRC_DRC_GAIN +195 0x001C //RX_FDEQ_SUBNUM +196 0x4848 //RX_FDEQ_GAIN_0 +197 0x4848 //RX_FDEQ_GAIN_1 +198 0x4848 //RX_FDEQ_GAIN_2 +199 0x4848 //RX_FDEQ_GAIN_3 +200 0x4848 //RX_FDEQ_GAIN_4 +201 0x4848 //RX_FDEQ_GAIN_5 +202 0x4848 //RX_FDEQ_GAIN_6 +203 0x4848 //RX_FDEQ_GAIN_7 +204 0x4848 //RX_FDEQ_GAIN_8 +205 0x4848 //RX_FDEQ_GAIN_9 +206 0x4848 //RX_FDEQ_GAIN_10 +207 0x4848 //RX_FDEQ_GAIN_11 +208 0x4848 //RX_FDEQ_GAIN_12 +209 0x4848 //RX_FDEQ_GAIN_13 +210 0x4848 //RX_FDEQ_GAIN_14 +211 0x4848 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0202 //RX_FDEQ_BIN_0 +221 0x0203 //RX_FDEQ_BIN_1 +222 0x0303 //RX_FDEQ_BIN_2 +223 0x0304 //RX_FDEQ_BIN_3 +224 0x0405 //RX_FDEQ_BIN_4 +225 0x0506 //RX_FDEQ_BIN_5 +226 0x0708 //RX_FDEQ_BIN_6 +227 0x090A //RX_FDEQ_BIN_7 +228 0x0B0C //RX_FDEQ_BIN_8 +229 0x0D0E //RX_FDEQ_BIN_9 +230 0x0E0F //RX_FDEQ_BIN_10 +231 0x0F10 //RX_FDEQ_BIN_11 +232 0x1011 //RX_FDEQ_BIN_12 +233 0x1104 //RX_FDEQ_BIN_13 +234 0x0000 //RX_FDEQ_BIN_14 +235 0x0000 //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x4000 //RX_FDEQ_RESRV_0 +245 0x0320 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0030 //RX_FDDRC_BAND_MARGIN_1 +248 0x0050 //RX_FDDRC_BAND_MARGIN_2 +249 0x0080 //RX_FDDRC_BAND_MARGIN_3 +250 0x0007 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x5000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x6400 //RX_FDDRC_THRD_3_2 +258 0x6400 //RX_FDDRC_THRD_3_3 +259 0x2000 //RX_FDDRC_SLANT_0_0 +260 0x2000 //RX_FDDRC_SLANT_0_1 +261 0x2000 //RX_FDDRC_SLANT_0_2 +262 0x2000 //RX_FDDRC_SLANT_0_3 +263 0x5333 //RX_FDDRC_SLANT_1_0 +264 0x5333 //RX_FDDRC_SLANT_1_1 +265 0x5333 //RX_FDDRC_SLANT_1_2 +266 0x5333 //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +286 0x005B //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 +#VOL 5 +163 0x3000 //RX_TDDRC_ALPHA_UP_1 +164 0x3000 //RX_TDDRC_ALPHA_UP_2 +165 0x3000 //RX_TDDRC_ALPHA_UP_3 +166 0x3000 //RX_TDDRC_ALPHA_UP_4 +184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +190 0x7FFF //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +269 0x0000 //RX_TDDRC_THRD_0 +270 0x0000 //RX_TDDRC_THRD_1 +271 0x2000 //RX_TDDRC_THRD_2 +272 0x3000 //RX_TDDRC_THRD_3 +273 0x0800 //RX_TDDRC_SLANT_0 +274 0x7EB8 //RX_TDDRC_SLANT_1 +275 0x3000 //RX_TDDRC_ALPHA_UP_0 +276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x199A //RX_TDDRC_HMNC_GAIN +279 0x0001 //RX_TDDRC_SMT_FLAG +280 0x0CCD //RX_TDDRC_SMT_W +281 0x0196 //RX_TDDRC_DRC_GAIN +195 0x001C //RX_FDEQ_SUBNUM +196 0x4848 //RX_FDEQ_GAIN_0 +197 0x4848 //RX_FDEQ_GAIN_1 +198 0x4848 //RX_FDEQ_GAIN_2 +199 0x4848 //RX_FDEQ_GAIN_3 +200 0x4848 //RX_FDEQ_GAIN_4 +201 0x4848 //RX_FDEQ_GAIN_5 +202 0x4848 //RX_FDEQ_GAIN_6 +203 0x4848 //RX_FDEQ_GAIN_7 +204 0x4848 //RX_FDEQ_GAIN_8 +205 0x4848 //RX_FDEQ_GAIN_9 +206 0x4848 //RX_FDEQ_GAIN_10 +207 0x4848 //RX_FDEQ_GAIN_11 +208 0x4848 //RX_FDEQ_GAIN_12 +209 0x4848 //RX_FDEQ_GAIN_13 +210 0x4848 //RX_FDEQ_GAIN_14 +211 0x4848 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0202 //RX_FDEQ_BIN_0 +221 0x0203 //RX_FDEQ_BIN_1 +222 0x0303 //RX_FDEQ_BIN_2 +223 0x0304 //RX_FDEQ_BIN_3 +224 0x0405 //RX_FDEQ_BIN_4 +225 0x0506 //RX_FDEQ_BIN_5 +226 0x0708 //RX_FDEQ_BIN_6 +227 0x090A //RX_FDEQ_BIN_7 +228 0x0B0C //RX_FDEQ_BIN_8 +229 0x0D0E //RX_FDEQ_BIN_9 +230 0x0E0F //RX_FDEQ_BIN_10 +231 0x0F10 //RX_FDEQ_BIN_11 +232 0x1011 //RX_FDEQ_BIN_12 +233 0x1104 //RX_FDEQ_BIN_13 +234 0x0000 //RX_FDEQ_BIN_14 +235 0x0000 //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x4000 //RX_FDEQ_RESRV_0 +245 0x0320 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0030 //RX_FDDRC_BAND_MARGIN_1 +248 0x0050 //RX_FDDRC_BAND_MARGIN_2 +249 0x0080 //RX_FDDRC_BAND_MARGIN_3 +250 0x0007 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x5000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x6400 //RX_FDDRC_THRD_3_2 +258 0x6400 //RX_FDDRC_THRD_3_3 +259 0x2000 //RX_FDDRC_SLANT_0_0 +260 0x2000 //RX_FDDRC_SLANT_0_1 +261 0x2000 //RX_FDDRC_SLANT_0_2 +262 0x2000 //RX_FDDRC_SLANT_0_3 +263 0x5333 //RX_FDDRC_SLANT_1_0 +264 0x5333 //RX_FDDRC_SLANT_1_1 +265 0x5333 //RX_FDDRC_SLANT_1_2 +266 0x5333 //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +286 0x0099 //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 +#VOL 6 +163 0x3000 //RX_TDDRC_ALPHA_UP_1 +164 0x3000 //RX_TDDRC_ALPHA_UP_2 +165 0x3000 //RX_TDDRC_ALPHA_UP_3 +166 0x3000 //RX_TDDRC_ALPHA_UP_4 +184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +190 0x7FFF //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +269 0x0000 //RX_TDDRC_THRD_0 +270 0x0000 //RX_TDDRC_THRD_1 +271 0x2000 //RX_TDDRC_THRD_2 +272 0x3000 //RX_TDDRC_THRD_3 +273 0x0800 //RX_TDDRC_SLANT_0 +274 0x7EB8 //RX_TDDRC_SLANT_1 +275 0x3000 //RX_TDDRC_ALPHA_UP_0 +276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x199A //RX_TDDRC_HMNC_GAIN +279 0x0001 //RX_TDDRC_SMT_FLAG +280 0x0CCD //RX_TDDRC_SMT_W +281 0x0196 //RX_TDDRC_DRC_GAIN +195 0x001C //RX_FDEQ_SUBNUM +196 0x4848 //RX_FDEQ_GAIN_0 +197 0x4848 //RX_FDEQ_GAIN_1 +198 0x4848 //RX_FDEQ_GAIN_2 +199 0x4848 //RX_FDEQ_GAIN_3 +200 0x4848 //RX_FDEQ_GAIN_4 +201 0x4848 //RX_FDEQ_GAIN_5 +202 0x4848 //RX_FDEQ_GAIN_6 +203 0x4848 //RX_FDEQ_GAIN_7 +204 0x4848 //RX_FDEQ_GAIN_8 +205 0x4848 //RX_FDEQ_GAIN_9 +206 0x4848 //RX_FDEQ_GAIN_10 +207 0x4848 //RX_FDEQ_GAIN_11 +208 0x4848 //RX_FDEQ_GAIN_12 +209 0x4848 //RX_FDEQ_GAIN_13 +210 0x4848 //RX_FDEQ_GAIN_14 +211 0x4848 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0202 //RX_FDEQ_BIN_0 +221 0x0203 //RX_FDEQ_BIN_1 +222 0x0303 //RX_FDEQ_BIN_2 +223 0x0304 //RX_FDEQ_BIN_3 +224 0x0405 //RX_FDEQ_BIN_4 +225 0x0506 //RX_FDEQ_BIN_5 +226 0x0708 //RX_FDEQ_BIN_6 +227 0x090A //RX_FDEQ_BIN_7 +228 0x0B0C //RX_FDEQ_BIN_8 +229 0x0D0E //RX_FDEQ_BIN_9 +230 0x0E0F //RX_FDEQ_BIN_10 +231 0x0F10 //RX_FDEQ_BIN_11 +232 0x1011 //RX_FDEQ_BIN_12 +233 0x1104 //RX_FDEQ_BIN_13 +234 0x0000 //RX_FDEQ_BIN_14 +235 0x0000 //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x4000 //RX_FDEQ_RESRV_0 +245 0x0320 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0030 //RX_FDDRC_BAND_MARGIN_1 +248 0x0050 //RX_FDDRC_BAND_MARGIN_2 +249 0x0080 //RX_FDDRC_BAND_MARGIN_3 +250 0x0007 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x5000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x6400 //RX_FDDRC_THRD_3_2 +258 0x6400 //RX_FDDRC_THRD_3_3 +259 0x2000 //RX_FDDRC_SLANT_0_0 +260 0x2000 //RX_FDDRC_SLANT_0_1 +261 0x2000 //RX_FDDRC_SLANT_0_2 +262 0x2000 //RX_FDDRC_SLANT_0_3 +263 0x5333 //RX_FDDRC_SLANT_1_0 +264 0x5333 //RX_FDDRC_SLANT_1_1 +265 0x5333 //RX_FDDRC_SLANT_1_2 +266 0x5333 //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +286 0x0100 //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 #CASE_NAME HEADSET-GOOGLE_CONDOR_CERTIFICATION1-VOICE_GENERIC-SWB -#PARAM_MODE FULL -#PARAM_TYPE TX+RX -#TOTAL_CUSTOM_STEP 7 +#PARAM_MODE Full +#PARAM_TYPE TX+2RX +#TOTAL_CUSTOM_STEP 7+7 #TX 0 0x0009 //TX_OPERATION_MODE_0 1 0x0001 //TX_OPERATION_MODE_1 @@ -31822,7 +48310,7 @@ 239 0x0800 //TX_DT_RESRV_7 240 0x0800 //TX_DT_RESRV_8 241 0x0000 //TX_DT_RESRV_9 -242 0xF400 //TX_THR_SN_EST_0 +242 0xFA00 //TX_THR_SN_EST_0 243 0xF400 //TX_THR_SN_EST_1 244 0xF600 //TX_THR_SN_EST_2 245 0xF400 //TX_THR_SN_EST_3 @@ -31831,20 +48319,20 @@ 248 0xF400 //TX_THR_SN_EST_6 249 0xF600 //TX_THR_SN_EST_7 250 0x0000 //TX_DELTA_THR_SN_EST_0 -251 0x0000 //TX_DELTA_THR_SN_EST_1 +251 0x0200 //TX_DELTA_THR_SN_EST_1 252 0x0200 //TX_DELTA_THR_SN_EST_2 253 0x0200 //TX_DELTA_THR_SN_EST_3 254 0x0200 //TX_DELTA_THR_SN_EST_4 255 0x0200 //TX_DELTA_THR_SN_EST_5 -256 0x0200 //TX_DELTA_THR_SN_EST_6 +256 0x0000 //TX_DELTA_THR_SN_EST_6 257 0x0200 //TX_DELTA_THR_SN_EST_7 258 0x6000 //TX_LAMBDA_NN_EST_0 -259 0x6000 //TX_LAMBDA_NN_EST_1 +259 0x4000 //TX_LAMBDA_NN_EST_1 260 0x4000 //TX_LAMBDA_NN_EST_2 261 0x4000 //TX_LAMBDA_NN_EST_3 262 0x4000 //TX_LAMBDA_NN_EST_4 263 0x4000 //TX_LAMBDA_NN_EST_5 -264 0x4000 //TX_LAMBDA_NN_EST_6 +264 0x6000 //TX_LAMBDA_NN_EST_6 265 0x4000 //TX_LAMBDA_NN_EST_7 266 0x0400 //TX_N_SN_EST 267 0x001E //TX_INBEAM_T @@ -31862,16 +48350,16 @@ 279 0x1000 //TX_B_POST_FLT_0 280 0x1000 //TX_B_POST_FLT_1 281 0x000B //TX_NS_LVL_CTRL_0 -282 0x000F //TX_NS_LVL_CTRL_1 -283 0x0011 //TX_NS_LVL_CTRL_2 +282 0x0011 //TX_NS_LVL_CTRL_1 +283 0x000F //TX_NS_LVL_CTRL_2 284 0x000F //TX_NS_LVL_CTRL_3 285 0x000F //TX_NS_LVL_CTRL_4 286 0x000F //TX_NS_LVL_CTRL_5 287 0x000F //TX_NS_LVL_CTRL_6 288 0x0011 //TX_NS_LVL_CTRL_7 289 0x000C //TX_MIN_GAIN_S_0 -290 0x000C //TX_MIN_GAIN_S_1 -291 0x000F //TX_MIN_GAIN_S_2 +290 0x000F //TX_MIN_GAIN_S_1 +291 0x000C //TX_MIN_GAIN_S_2 292 0x000C //TX_MIN_GAIN_S_3 293 0x000C //TX_MIN_GAIN_S_4 294 0x000C //TX_MIN_GAIN_S_5 @@ -31895,12 +48383,12 @@ 312 0x7FFF //TX_A_POST_FILT_0 313 0x2000 //TX_A_POST_FILT_1 314 0x2000 //TX_A_POST_FILT_S_0 -315 0x4000 //TX_A_POST_FILT_S_1 +315 0x5000 //TX_A_POST_FILT_S_1 316 0x5000 //TX_A_POST_FILT_S_2 317 0x5000 //TX_A_POST_FILT_S_3 318 0x5000 //TX_A_POST_FILT_S_4 319 0x5000 //TX_A_POST_FILT_S_5 -320 0x5000 //TX_A_POST_FILT_S_6 +320 0x4000 //TX_A_POST_FILT_S_6 321 0x5000 //TX_A_POST_FILT_S_7 322 0x1000 //TX_B_POST_FILT_0 323 0x1000 //TX_B_POST_FILT_1 @@ -31947,7 +48435,7 @@ 364 0x0000 //TX_K_APT 365 0x0001 //TX_NOISEDET 366 0x0190 //TX_NDETCT -367 0x0050 //TX_NOISE_TH_0 +367 0x0383 //TX_NOISE_TH_0 368 0x7FFF //TX_NOISE_TH_0_2 369 0x7FFF //TX_NOISE_TH_0_3 370 0x07D0 //TX_NOISE_TH_1 @@ -31959,11 +48447,11 @@ 376 0x7FFF //TX_NOISE_TH_5_3 377 0x7FFF //TX_NOISE_TH_5_4 378 0x044C //TX_NOISE_TH_6 -379 0x0014 //TX_MINENOISE_TH -380 0x4000 //TX_MINENOISE_MIC0_TH_MTS -381 0xFFEE //TX_MINENOISE_MIC0_TH_EXP -382 0x6000 //TX_MINENOISE_MIC0_S_TH_MTS -383 0xFFF3 //TX_MINENOISE_MIC0_S_TH_EXP +379 0x044C //TX_MINENOISE_TH +380 0xD508 //TX_MORENS_TFMASK_TH +381 0x0001 //TX_DRC_QUIET_FLOOR +382 0x3A98 //TX_RATIODTL_CUT_TH +383 0x0DAC //TX_DT_CUT_K1 384 0x0666 //TX_OUT_ENER_S_TH_CLEAN 385 0x0666 //TX_OUT_ENER_S_TH_LESSCLEAN 386 0x0333 //TX_OUT_ENER_S_TH_NOISY @@ -31971,22 +48459,22 @@ 388 0x0333 //TX_OUT_ENER_TH_SPEECH 389 0x2000 //TX_SN_NPB_GAIN 390 0x0000 //TX_NN_NPB_GAIN -391 0x0000 //TX_CSX_ALPHA_0 -392 0x0000 //TX_CSX_ALPHA_1 -393 0x0000 //TX_CSX_ALPHA_2 -394 0x0000 //TX_CSX_ALPHA_3 -395 0x0800 //TX_MU_ARSP_EST -396 0x00C8 //TX_P_OUTBEAM_MIN_TH +391 0x7FFF //TX_POST_MASK_SUP_HSNE +392 0x1388 //TX_TAIL_DET_TH +393 0x4000 //TX_B_LESSCUT_RTO_WTA +394 0x0000 //TX_MEL_G_R +395 0x0080 //TX_SUPHIGH_TH +396 0x0000 //TX_MASK_G_R 397 0x0002 //TX_EXTRA_NS_L -398 0x0800 //TX_EXTRA_NS_A -399 0x0005 //TX_VR_NOISE_FLOOR_TH +398 0x1800 //TX_C_POST_FLT_MASK +399 0x7FFF //TX_A_POST_FLT_WNS 400 0x0148 //TX_MIN_G_LOW300HZ 401 0x0002 //TX_MAXLEVEL_CNG 402 0x00B4 //TX_STN_NOISE_TH 403 0x4000 //TX_POST_MASK_SUP 404 0x7FFF //TX_POST_MASK_ADJUST 405 0x00C8 //TX_NS_ENOISE_MIC0_TH -406 0x0014 //TX_MINENOISE_MIC0_TH +406 0x02F3 //TX_MINENOISE_MIC0_TH 407 0x012C //TX_MINENOISE_MIC0_S_TH 408 0x2900 //TX_MIN_G_CTRL_SSNS 409 0x0800 //TX_METAL_RTO_THR @@ -32094,16 +48582,16 @@ 511 0x6666 //TX_MIC_TO_BFGAIN 512 0x0000 //TX_MICTOBFGAIN0 513 0x0000 //TX_FASTMUE_TH -514 0x0000 //TX_DERVB_LEN_0 -515 0x0000 //TX_DERVB_LEN_1 -516 0x0000 //TX_RHO_DERVB -517 0x0000 //TX_MIC_INDX_DERVB -518 0x0000 //TX_MU_DERVB -519 0x0000 //TX_DR_RESRV_0 -520 0x0000 //TX_DR_RESRV_1 -521 0x0000 //TX_DR_RESRV_2 -522 0x0000 //TX_DR_RESRV_3 -523 0x0000 //TX_DR_RESRV_4 +514 0xC000 //TX_DEREVERB_LF_MU +515 0xC000 //TX_DEREVERB_HF_MU +516 0xCCCC //TX_DEREVERB_DELAY +517 0xD999 //TX_DEREVERB_COEF_LEN +518 0x1F40 //TX_DEREVERB_DNR +519 0x0000 //TX_DEREVERB_ALPHA +520 0x0000 //TX_DEREVERB_BETA +521 0x0000 //TX_GSC_RTOL_TH +522 0x7000 //TX_GSC_RTOH_TH +523 0x0064 //TX_WIDE2_MEANHTH 524 0x0000 //TX_DR_RESRV_5 525 0x0000 //TX_DR_RESRV_6 526 0x0000 //TX_DR_RESRV_7 @@ -32469,16 +48957,81 @@ 886 0x0CCD //TX_FASTNS_TFMASKBIN_TH2 887 0x0CCD //TX_FASTNS_TFMASKBIN_TH3 888 0x0028 //TX_FASTNS_ARSPC_TH -889 0xC000 //TX_FASTNS_MASK5_TH +889 0x8000 //TX_FASTNS_MASK5_TH 890 0x4848 //TX_POSTSSA_MIN_G_VR_MASK -891 0x1000 //TX_A_LESSCUT_RTO_MASK +891 0x4000 //TX_A_LESSCUT_RTO_MASK 892 0x1770 //TX_FASTNS_NOISETH 893 0xC000 //TX_FASTNS_SSA_THLFL 894 0xC000 //TX_FASTNS_SSA_THHFL 895 0xCCCC //TX_FASTNS_SSA_THLFH 896 0xD999 //TX_FASTNS_SSA_THHFH +897 0x2339 //TX_SENDFUNC_REG_MICMUTE +898 0x0021 //TX_SENDFUNC_REG_MICMUTE1 +899 0x02BC //TX_MICMUTE_RATIO_THR +900 0x0140 //TX_MICMUTE_AMP_THR +901 0x0004 //TX_MICMUTE_HPF_IND +902 0x00C0 //TX_MICMUTE_LOG_EYR_TH +903 0x0008 //TX_MICMUTE_CVG_TIME +904 0x0008 //TX_MICMUTE_RELEASE_TIME +905 0x01FE //TX_MIC_VOLUME_MIC0MUTE +906 0x0020 //TX_MICMUTE_EPD_OFFSET_0 +907 0x001E //TX_MICMUTE_FRQ_AEC_L +908 0x7999 //TX_MICMUTE_EAD_THR +909 0x7FFF //TX_MICMUTE_LAMBDA_CB_NLE +910 0x7FFF //TX_MICMUTE_LAMBDA_RE_EST +911 0x4000 //TX_DTD_THR1_MICMUTE_0 +912 0x7000 //TX_DTD_THR1_MICMUTE_1 +913 0x7FFF //TX_DTD_THR1_MICMUTE_2 +914 0x7FFF //TX_DTD_THR1_MICMUTE_3 +915 0x6CCC //TX_DTD_THR2_MICMUTE_0 +916 0x0400 //TX_MICMUTE_MIN_EQ_RE_EST_0 +917 0x0400 //TX_MICMUTE_MIN_EQ_RE_EST_1 +918 0x1000 //TX_MICMUTE_MIN_EQ_RE_EST_2 +919 0x7FFF //TX_MICMUTE_MIN_EQ_RE_EST_3 +920 0x7FFF //TX_MICMUTE_MIN_EQ_RE_EST_4 +921 0x4000 //TX_MICMUTE_C_POST_FLT +922 0x03E8 //TX_MICMUTE_DT_CUT_K +923 0x0001 //TX_MICMUTE_DT_CUT_THR +924 0x03E8 //TX_MICMUTE_DT_CUT_K2 +925 0x0001 //TX_MICMUTE_DT_CUT_THR2 +926 0x0064 //TX_MICMUTE_DT2_HOLD_N +927 0x1000 //TX_MICMUTE_RATIODTH_THCUT +928 0x1000 //TX_MICMUTE_B_POST_FLT_ECHOL +929 0x7FFF //TX_MICMUTE_B_POST_FLT_ECHOH +930 0x0400 //TX_MICMUTE_C_POST_FLT_MASK +931 0x7999 //TX_MICMUTE_RATIODTL_CUT_TH +932 0x0258 //TX_MICMUTE_DT_CUT_K1 +933 0x0800 //TX_MICMUTE_N2_SN_EST +934 0xFC00 //TX_MICMUTE_THR_SN_EST_0 +935 0x001C //TX_MICMUTE_MIN_G_CTRL_0 +936 0x6000 //TX_MICMUTE_A_POST_FILT_S_0 +937 0x7000 //TX_MICMUTE_B_POST_FILT_0 +938 0x2710 //TX_MIC1RUB_AMP_THR +939 0x0010 //TX_MIC1MUTE_RATIO_THR +940 0x0450 //TX_MIC1MUTE_AMP_THR +941 0x0008 //TX_MIC1MUTE_CVG_TIME +942 0x0008 //TX_MIC1MUTE_RELEASE_TIME +943 0x0000 //TX_AMS_RESRV_01 +944 0x0000 //TX_AMS_RESRV_02 +945 0x0000 //TX_AMS_RESRV_03 +946 0x0000 //TX_AMS_RESRV_04 +947 0x0000 //TX_AMS_RESRV_05 +948 0x0000 //TX_AMS_RESRV_06 +949 0x0000 //TX_AMS_RESRV_07 +950 0x0000 //TX_AMS_RESRV_08 +951 0x0000 //TX_AMS_RESRV_09 +952 0x0000 //TX_AMS_RESRV_10 +953 0x0000 //TX_AMS_RESRV_11 +954 0x0000 //TX_AMS_RESRV_12 +955 0x0000 //TX_AMS_RESRV_13 +956 0x0000 //TX_AMS_RESRV_14 +957 0x0000 //TX_AMS_RESRV_15 +958 0x0000 //TX_AMS_RESRV_16 +959 0x0000 //TX_AMS_RESRV_17 +960 0x0000 //TX_AMS_RESRV_18 +961 0x0000 //TX_AMS_RESRV_19 #RX -0 0x0024 //RX_RECVFUNC_MODE_0 +0 0x2024 //RX_RECVFUNC_MODE_0 1 0x0000 //RX_RECVFUNC_MODE_1 2 0x0003 //RX_SAMPLINGFREQ_SIG 3 0x0003 //RX_SAMPLINGFREQ_PROC @@ -33328,11 +49881,862 @@ 110 0x0000 //RX_FDDRC_RESRV_0 129 0x0100 //RX_SPK_VOL 130 0x0000 //RX_VOL_RESRV_0 +#RX 2 +157 0x2024 //RX_RECVFUNC_MODE_0 +158 0x0000 //RX_RECVFUNC_MODE_1 +159 0x0003 //RX_SAMPLINGFREQ_SIG +160 0x0003 //RX_SAMPLINGFREQ_PROC +161 0x000A //RX_FRAME_SZ +162 0x0000 //RX_DELAY_OPT +163 0x5000 //RX_TDDRC_ALPHA_UP_1 +164 0x5000 //RX_TDDRC_ALPHA_UP_2 +165 0x5000 //RX_TDDRC_ALPHA_UP_3 +166 0x2000 //RX_TDDRC_ALPHA_UP_4 +167 0x0800 //RX_PGA +168 0x7FFF //RX_A_HP +169 0x0000 //RX_B_PE +170 0x1800 //RX_THR_PITCH_DET_0 +171 0x1000 //RX_THR_PITCH_DET_1 +172 0x0800 //RX_THR_PITCH_DET_2 +173 0x0008 //RX_PITCH_BFR_LEN +174 0x0003 //RX_SBD_PITCH_DET +175 0x0100 //RX_PP_RESRV_0 +176 0x0020 //RX_PP_RESRV_1 +177 0x0400 //RX_N_SN_EST +178 0x000C //RX_N2_SN_EST +179 0x0003 //RX_NS_LVL_CTRL +180 0x9000 //RX_THR_SN_EST +181 0x7CCD //RX_LAMBDA_PFILT +182 0x000A //RX_FENS_RESRV_0 +183 0x0190 //RX_FENS_RESRV_1 +184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +187 0x0002 //RX_EXTRA_NS_L +188 0x0800 //RX_EXTRA_NS_A +189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +190 0x65AD //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +192 0x199A //RX_A_POST_FLT +193 0x0000 //RX_LMT_THRD +194 0x4000 //RX_LMT_ALPHA +195 0x0020 //RX_FDEQ_SUBNUM +196 0x4848 //RX_FDEQ_GAIN_0 +197 0x4848 //RX_FDEQ_GAIN_1 +198 0x4848 //RX_FDEQ_GAIN_2 +199 0x4848 //RX_FDEQ_GAIN_3 +200 0x4848 //RX_FDEQ_GAIN_4 +201 0x4848 //RX_FDEQ_GAIN_5 +202 0x4848 //RX_FDEQ_GAIN_6 +203 0x4848 //RX_FDEQ_GAIN_7 +204 0x4848 //RX_FDEQ_GAIN_8 +205 0x4848 //RX_FDEQ_GAIN_9 +206 0x4848 //RX_FDEQ_GAIN_10 +207 0x4848 //RX_FDEQ_GAIN_11 +208 0x4848 //RX_FDEQ_GAIN_12 +209 0x4848 //RX_FDEQ_GAIN_13 +210 0x4848 //RX_FDEQ_GAIN_14 +211 0x4848 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0202 //RX_FDEQ_BIN_0 +221 0x0203 //RX_FDEQ_BIN_1 +222 0x0303 //RX_FDEQ_BIN_2 +223 0x0304 //RX_FDEQ_BIN_3 +224 0x0405 //RX_FDEQ_BIN_4 +225 0x0506 //RX_FDEQ_BIN_5 +226 0x0708 //RX_FDEQ_BIN_6 +227 0x090A //RX_FDEQ_BIN_7 +228 0x0B0C //RX_FDEQ_BIN_8 +229 0x0D0E //RX_FDEQ_BIN_9 +230 0x1013 //RX_FDEQ_BIN_10 +231 0x1719 //RX_FDEQ_BIN_11 +232 0x1B1E //RX_FDEQ_BIN_12 +233 0x1E1E //RX_FDEQ_BIN_13 +234 0x1E28 //RX_FDEQ_BIN_14 +235 0x282C //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x4000 //RX_FDEQ_RESRV_0 +245 0x0320 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0030 //RX_FDDRC_BAND_MARGIN_1 +248 0x0050 //RX_FDDRC_BAND_MARGIN_2 +249 0x0080 //RX_FDDRC_BAND_MARGIN_3 +250 0x0007 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x5000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x6400 //RX_FDDRC_THRD_3_2 +258 0x6400 //RX_FDDRC_THRD_3_3 +259 0x2000 //RX_FDDRC_SLANT_0_0 +260 0x2000 //RX_FDDRC_SLANT_0_1 +261 0x2000 //RX_FDDRC_SLANT_0_2 +262 0x2000 //RX_FDDRC_SLANT_0_3 +263 0x5333 //RX_FDDRC_SLANT_1_0 +264 0x5333 //RX_FDDRC_SLANT_1_1 +265 0x5333 //RX_FDDRC_SLANT_1_2 +266 0x5333 //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +268 0x0002 //RX_FILTINDX +269 0x0000 //RX_TDDRC_THRD_0 +270 0x0000 //RX_TDDRC_THRD_1 +271 0x1A00 //RX_TDDRC_THRD_2 +272 0x1A00 //RX_TDDRC_THRD_3 +273 0x3000 //RX_TDDRC_SLANT_0 +274 0x7EB8 //RX_TDDRC_SLANT_1 +275 0x5000 //RX_TDDRC_ALPHA_UP_0 +276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x199A //RX_TDDRC_HMNC_GAIN +279 0x0001 //RX_TDDRC_SMT_FLAG +280 0x0CCD //RX_TDDRC_SMT_W +281 0x01C8 //RX_TDDRC_DRC_GAIN +282 0x7C00 //RX_LAMBDA_PKA_FP +283 0x2000 //RX_TPKA_FP +284 0x2000 //RX_MIN_G_FP +285 0x0080 //RX_MAX_G_FP +286 0x000C //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 +288 0x0000 //RX_MAXLEVEL_CNG +289 0x3000 //RX_BWE_UV_TH +290 0x3000 //RX_BWE_UV_TH2 +291 0x1800 //RX_BWE_UV_TH3 +292 0x1000 //RX_BWE_V_TH +293 0x04CD //RX_BWE_GAIN1_V_TH1 +294 0x0F33 //RX_BWE_GAIN1_V_TH2 +295 0x7333 //RX_BWE_UV_EQ +296 0x199A //RX_BWE_V_EQ +297 0x7333 //RX_BWE_TONE_TH +298 0x0004 //RX_BWE_UV_HOLD_T +299 0x6CCD //RX_BWE_GAIN2_ALPHA +300 0x799A //RX_BWE_GAIN3_ALPHA +301 0x001E //RX_BWE_CUTOFF +302 0x3000 //RX_BWE_GAINFILL +303 0x3200 //RX_BWE_MAXTH_TONE +304 0x2000 //RX_BWE_EQ_0 +305 0x2000 //RX_BWE_EQ_1 +306 0x2000 //RX_BWE_EQ_2 +307 0x2000 //RX_BWE_EQ_3 +308 0x2000 //RX_BWE_EQ_4 +309 0x2000 //RX_BWE_EQ_5 +310 0x2000 //RX_BWE_EQ_6 +311 0x0000 //RX_BWE_RESRV_0 +312 0x0000 //RX_BWE_RESRV_1 +313 0x0000 //RX_BWE_RESRV_2 +#VOL 0 +163 0x5000 //RX_TDDRC_ALPHA_UP_1 +164 0x5000 //RX_TDDRC_ALPHA_UP_2 +165 0x5000 //RX_TDDRC_ALPHA_UP_3 +166 0x2000 //RX_TDDRC_ALPHA_UP_4 +184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +190 0x65AD //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +269 0x0000 //RX_TDDRC_THRD_0 +270 0x0000 //RX_TDDRC_THRD_1 +271 0x1A00 //RX_TDDRC_THRD_2 +272 0x1A00 //RX_TDDRC_THRD_3 +273 0x3000 //RX_TDDRC_SLANT_0 +274 0x7EB8 //RX_TDDRC_SLANT_1 +275 0x5000 //RX_TDDRC_ALPHA_UP_0 +276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x199A //RX_TDDRC_HMNC_GAIN +279 0x0001 //RX_TDDRC_SMT_FLAG +280 0x0CCD //RX_TDDRC_SMT_W +281 0x01C8 //RX_TDDRC_DRC_GAIN +195 0x0020 //RX_FDEQ_SUBNUM +196 0x4848 //RX_FDEQ_GAIN_0 +197 0x4848 //RX_FDEQ_GAIN_1 +198 0x4848 //RX_FDEQ_GAIN_2 +199 0x4848 //RX_FDEQ_GAIN_3 +200 0x4848 //RX_FDEQ_GAIN_4 +201 0x4848 //RX_FDEQ_GAIN_5 +202 0x4848 //RX_FDEQ_GAIN_6 +203 0x4848 //RX_FDEQ_GAIN_7 +204 0x4848 //RX_FDEQ_GAIN_8 +205 0x4848 //RX_FDEQ_GAIN_9 +206 0x4848 //RX_FDEQ_GAIN_10 +207 0x4848 //RX_FDEQ_GAIN_11 +208 0x4848 //RX_FDEQ_GAIN_12 +209 0x4848 //RX_FDEQ_GAIN_13 +210 0x4848 //RX_FDEQ_GAIN_14 +211 0x4848 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0202 //RX_FDEQ_BIN_0 +221 0x0203 //RX_FDEQ_BIN_1 +222 0x0303 //RX_FDEQ_BIN_2 +223 0x0304 //RX_FDEQ_BIN_3 +224 0x0405 //RX_FDEQ_BIN_4 +225 0x0506 //RX_FDEQ_BIN_5 +226 0x0708 //RX_FDEQ_BIN_6 +227 0x090A //RX_FDEQ_BIN_7 +228 0x0B0C //RX_FDEQ_BIN_8 +229 0x0D0E //RX_FDEQ_BIN_9 +230 0x1013 //RX_FDEQ_BIN_10 +231 0x1719 //RX_FDEQ_BIN_11 +232 0x1B1E //RX_FDEQ_BIN_12 +233 0x1E1E //RX_FDEQ_BIN_13 +234 0x1E28 //RX_FDEQ_BIN_14 +235 0x282C //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x4000 //RX_FDEQ_RESRV_0 +245 0x0320 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0030 //RX_FDDRC_BAND_MARGIN_1 +248 0x0050 //RX_FDDRC_BAND_MARGIN_2 +249 0x0080 //RX_FDDRC_BAND_MARGIN_3 +250 0x0007 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x5000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x6400 //RX_FDDRC_THRD_3_2 +258 0x6400 //RX_FDDRC_THRD_3_3 +259 0x2000 //RX_FDDRC_SLANT_0_0 +260 0x2000 //RX_FDDRC_SLANT_0_1 +261 0x2000 //RX_FDDRC_SLANT_0_2 +262 0x2000 //RX_FDDRC_SLANT_0_3 +263 0x5333 //RX_FDDRC_SLANT_1_0 +264 0x5333 //RX_FDDRC_SLANT_1_1 +265 0x5333 //RX_FDDRC_SLANT_1_2 +266 0x5333 //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +286 0x000C //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 +#VOL 1 +163 0x5000 //RX_TDDRC_ALPHA_UP_1 +164 0x5000 //RX_TDDRC_ALPHA_UP_2 +165 0x5000 //RX_TDDRC_ALPHA_UP_3 +166 0x2000 //RX_TDDRC_ALPHA_UP_4 +184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +190 0x65AD //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +269 0x0000 //RX_TDDRC_THRD_0 +270 0x0000 //RX_TDDRC_THRD_1 +271 0x1A00 //RX_TDDRC_THRD_2 +272 0x1A00 //RX_TDDRC_THRD_3 +273 0x3000 //RX_TDDRC_SLANT_0 +274 0x7EB8 //RX_TDDRC_SLANT_1 +275 0x5000 //RX_TDDRC_ALPHA_UP_0 +276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x199A //RX_TDDRC_HMNC_GAIN +279 0x0001 //RX_TDDRC_SMT_FLAG +280 0x0CCD //RX_TDDRC_SMT_W +281 0x01C8 //RX_TDDRC_DRC_GAIN +195 0x0020 //RX_FDEQ_SUBNUM +196 0x4848 //RX_FDEQ_GAIN_0 +197 0x4848 //RX_FDEQ_GAIN_1 +198 0x4848 //RX_FDEQ_GAIN_2 +199 0x4848 //RX_FDEQ_GAIN_3 +200 0x4848 //RX_FDEQ_GAIN_4 +201 0x4848 //RX_FDEQ_GAIN_5 +202 0x4848 //RX_FDEQ_GAIN_6 +203 0x4848 //RX_FDEQ_GAIN_7 +204 0x4848 //RX_FDEQ_GAIN_8 +205 0x4848 //RX_FDEQ_GAIN_9 +206 0x4848 //RX_FDEQ_GAIN_10 +207 0x4848 //RX_FDEQ_GAIN_11 +208 0x4848 //RX_FDEQ_GAIN_12 +209 0x4848 //RX_FDEQ_GAIN_13 +210 0x4848 //RX_FDEQ_GAIN_14 +211 0x4848 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0202 //RX_FDEQ_BIN_0 +221 0x0203 //RX_FDEQ_BIN_1 +222 0x0303 //RX_FDEQ_BIN_2 +223 0x0304 //RX_FDEQ_BIN_3 +224 0x0405 //RX_FDEQ_BIN_4 +225 0x0506 //RX_FDEQ_BIN_5 +226 0x0708 //RX_FDEQ_BIN_6 +227 0x090A //RX_FDEQ_BIN_7 +228 0x0B0C //RX_FDEQ_BIN_8 +229 0x0D0E //RX_FDEQ_BIN_9 +230 0x1013 //RX_FDEQ_BIN_10 +231 0x1719 //RX_FDEQ_BIN_11 +232 0x1B1E //RX_FDEQ_BIN_12 +233 0x1E1E //RX_FDEQ_BIN_13 +234 0x1E28 //RX_FDEQ_BIN_14 +235 0x282C //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x4000 //RX_FDEQ_RESRV_0 +245 0x0320 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0030 //RX_FDDRC_BAND_MARGIN_1 +248 0x0050 //RX_FDDRC_BAND_MARGIN_2 +249 0x0080 //RX_FDDRC_BAND_MARGIN_3 +250 0x0007 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x5000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x6400 //RX_FDDRC_THRD_3_2 +258 0x6400 //RX_FDDRC_THRD_3_3 +259 0x2000 //RX_FDDRC_SLANT_0_0 +260 0x2000 //RX_FDDRC_SLANT_0_1 +261 0x2000 //RX_FDDRC_SLANT_0_2 +262 0x2000 //RX_FDDRC_SLANT_0_3 +263 0x5333 //RX_FDDRC_SLANT_1_0 +264 0x5333 //RX_FDDRC_SLANT_1_1 +265 0x5333 //RX_FDDRC_SLANT_1_2 +266 0x5333 //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +286 0x0014 //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 +#VOL 2 +163 0x5000 //RX_TDDRC_ALPHA_UP_1 +164 0x5000 //RX_TDDRC_ALPHA_UP_2 +165 0x5000 //RX_TDDRC_ALPHA_UP_3 +166 0x2000 //RX_TDDRC_ALPHA_UP_4 +184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +190 0x65AD //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +269 0x0000 //RX_TDDRC_THRD_0 +270 0x0000 //RX_TDDRC_THRD_1 +271 0x1A00 //RX_TDDRC_THRD_2 +272 0x1A00 //RX_TDDRC_THRD_3 +273 0x3000 //RX_TDDRC_SLANT_0 +274 0x7EB8 //RX_TDDRC_SLANT_1 +275 0x5000 //RX_TDDRC_ALPHA_UP_0 +276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x199A //RX_TDDRC_HMNC_GAIN +279 0x0001 //RX_TDDRC_SMT_FLAG +280 0x0CCD //RX_TDDRC_SMT_W +281 0x01C8 //RX_TDDRC_DRC_GAIN +195 0x0020 //RX_FDEQ_SUBNUM +196 0x4848 //RX_FDEQ_GAIN_0 +197 0x4848 //RX_FDEQ_GAIN_1 +198 0x4848 //RX_FDEQ_GAIN_2 +199 0x4848 //RX_FDEQ_GAIN_3 +200 0x4848 //RX_FDEQ_GAIN_4 +201 0x4848 //RX_FDEQ_GAIN_5 +202 0x4848 //RX_FDEQ_GAIN_6 +203 0x4848 //RX_FDEQ_GAIN_7 +204 0x4848 //RX_FDEQ_GAIN_8 +205 0x4848 //RX_FDEQ_GAIN_9 +206 0x4848 //RX_FDEQ_GAIN_10 +207 0x4848 //RX_FDEQ_GAIN_11 +208 0x4848 //RX_FDEQ_GAIN_12 +209 0x4848 //RX_FDEQ_GAIN_13 +210 0x4848 //RX_FDEQ_GAIN_14 +211 0x4848 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0202 //RX_FDEQ_BIN_0 +221 0x0203 //RX_FDEQ_BIN_1 +222 0x0303 //RX_FDEQ_BIN_2 +223 0x0304 //RX_FDEQ_BIN_3 +224 0x0405 //RX_FDEQ_BIN_4 +225 0x0506 //RX_FDEQ_BIN_5 +226 0x0708 //RX_FDEQ_BIN_6 +227 0x090A //RX_FDEQ_BIN_7 +228 0x0B0C //RX_FDEQ_BIN_8 +229 0x0D0E //RX_FDEQ_BIN_9 +230 0x1013 //RX_FDEQ_BIN_10 +231 0x1719 //RX_FDEQ_BIN_11 +232 0x1B1E //RX_FDEQ_BIN_12 +233 0x1E1E //RX_FDEQ_BIN_13 +234 0x1E28 //RX_FDEQ_BIN_14 +235 0x282C //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x4000 //RX_FDEQ_RESRV_0 +245 0x0320 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0030 //RX_FDDRC_BAND_MARGIN_1 +248 0x0050 //RX_FDDRC_BAND_MARGIN_2 +249 0x0080 //RX_FDDRC_BAND_MARGIN_3 +250 0x0007 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x5000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x6400 //RX_FDDRC_THRD_3_2 +258 0x6400 //RX_FDDRC_THRD_3_3 +259 0x2000 //RX_FDDRC_SLANT_0_0 +260 0x2000 //RX_FDDRC_SLANT_0_1 +261 0x2000 //RX_FDDRC_SLANT_0_2 +262 0x2000 //RX_FDDRC_SLANT_0_3 +263 0x5333 //RX_FDDRC_SLANT_1_0 +264 0x5333 //RX_FDDRC_SLANT_1_1 +265 0x5333 //RX_FDDRC_SLANT_1_2 +266 0x5333 //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +286 0x0021 //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 +#VOL 3 +163 0x5000 //RX_TDDRC_ALPHA_UP_1 +164 0x5000 //RX_TDDRC_ALPHA_UP_2 +165 0x5000 //RX_TDDRC_ALPHA_UP_3 +166 0x2000 //RX_TDDRC_ALPHA_UP_4 +184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +190 0x65AD //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +269 0x0000 //RX_TDDRC_THRD_0 +270 0x0000 //RX_TDDRC_THRD_1 +271 0x1A00 //RX_TDDRC_THRD_2 +272 0x1A00 //RX_TDDRC_THRD_3 +273 0x3000 //RX_TDDRC_SLANT_0 +274 0x7EB8 //RX_TDDRC_SLANT_1 +275 0x5000 //RX_TDDRC_ALPHA_UP_0 +276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x199A //RX_TDDRC_HMNC_GAIN +279 0x0001 //RX_TDDRC_SMT_FLAG +280 0x0CCD //RX_TDDRC_SMT_W +281 0x01C8 //RX_TDDRC_DRC_GAIN +195 0x0020 //RX_FDEQ_SUBNUM +196 0x4848 //RX_FDEQ_GAIN_0 +197 0x4848 //RX_FDEQ_GAIN_1 +198 0x4848 //RX_FDEQ_GAIN_2 +199 0x4848 //RX_FDEQ_GAIN_3 +200 0x4848 //RX_FDEQ_GAIN_4 +201 0x4848 //RX_FDEQ_GAIN_5 +202 0x4848 //RX_FDEQ_GAIN_6 +203 0x4848 //RX_FDEQ_GAIN_7 +204 0x4848 //RX_FDEQ_GAIN_8 +205 0x4848 //RX_FDEQ_GAIN_9 +206 0x4848 //RX_FDEQ_GAIN_10 +207 0x4848 //RX_FDEQ_GAIN_11 +208 0x4848 //RX_FDEQ_GAIN_12 +209 0x4848 //RX_FDEQ_GAIN_13 +210 0x4848 //RX_FDEQ_GAIN_14 +211 0x4848 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0202 //RX_FDEQ_BIN_0 +221 0x0203 //RX_FDEQ_BIN_1 +222 0x0303 //RX_FDEQ_BIN_2 +223 0x0304 //RX_FDEQ_BIN_3 +224 0x0405 //RX_FDEQ_BIN_4 +225 0x0506 //RX_FDEQ_BIN_5 +226 0x0708 //RX_FDEQ_BIN_6 +227 0x090A //RX_FDEQ_BIN_7 +228 0x0B0C //RX_FDEQ_BIN_8 +229 0x0D0E //RX_FDEQ_BIN_9 +230 0x1013 //RX_FDEQ_BIN_10 +231 0x1719 //RX_FDEQ_BIN_11 +232 0x1B1E //RX_FDEQ_BIN_12 +233 0x1E1E //RX_FDEQ_BIN_13 +234 0x1E28 //RX_FDEQ_BIN_14 +235 0x282C //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x4000 //RX_FDEQ_RESRV_0 +245 0x0320 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0030 //RX_FDDRC_BAND_MARGIN_1 +248 0x0050 //RX_FDDRC_BAND_MARGIN_2 +249 0x0080 //RX_FDDRC_BAND_MARGIN_3 +250 0x0007 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x5000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x6400 //RX_FDDRC_THRD_3_2 +258 0x6400 //RX_FDDRC_THRD_3_3 +259 0x2000 //RX_FDDRC_SLANT_0_0 +260 0x2000 //RX_FDDRC_SLANT_0_1 +261 0x2000 //RX_FDDRC_SLANT_0_2 +262 0x2000 //RX_FDDRC_SLANT_0_3 +263 0x5333 //RX_FDDRC_SLANT_1_0 +264 0x5333 //RX_FDDRC_SLANT_1_1 +265 0x5333 //RX_FDDRC_SLANT_1_2 +266 0x5333 //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +286 0x0037 //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 +#VOL 4 +163 0x5000 //RX_TDDRC_ALPHA_UP_1 +164 0x5000 //RX_TDDRC_ALPHA_UP_2 +165 0x5000 //RX_TDDRC_ALPHA_UP_3 +166 0x2000 //RX_TDDRC_ALPHA_UP_4 +184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +190 0x65AD //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +269 0x0000 //RX_TDDRC_THRD_0 +270 0x0000 //RX_TDDRC_THRD_1 +271 0x1A00 //RX_TDDRC_THRD_2 +272 0x1A00 //RX_TDDRC_THRD_3 +273 0x3000 //RX_TDDRC_SLANT_0 +274 0x7EB8 //RX_TDDRC_SLANT_1 +275 0x5000 //RX_TDDRC_ALPHA_UP_0 +276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x199A //RX_TDDRC_HMNC_GAIN +279 0x0001 //RX_TDDRC_SMT_FLAG +280 0x0CCD //RX_TDDRC_SMT_W +281 0x01C8 //RX_TDDRC_DRC_GAIN +195 0x0020 //RX_FDEQ_SUBNUM +196 0x4848 //RX_FDEQ_GAIN_0 +197 0x4848 //RX_FDEQ_GAIN_1 +198 0x4848 //RX_FDEQ_GAIN_2 +199 0x4848 //RX_FDEQ_GAIN_3 +200 0x4848 //RX_FDEQ_GAIN_4 +201 0x4848 //RX_FDEQ_GAIN_5 +202 0x4848 //RX_FDEQ_GAIN_6 +203 0x4848 //RX_FDEQ_GAIN_7 +204 0x4848 //RX_FDEQ_GAIN_8 +205 0x4848 //RX_FDEQ_GAIN_9 +206 0x4848 //RX_FDEQ_GAIN_10 +207 0x4848 //RX_FDEQ_GAIN_11 +208 0x4848 //RX_FDEQ_GAIN_12 +209 0x4848 //RX_FDEQ_GAIN_13 +210 0x4848 //RX_FDEQ_GAIN_14 +211 0x4848 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0202 //RX_FDEQ_BIN_0 +221 0x0203 //RX_FDEQ_BIN_1 +222 0x0303 //RX_FDEQ_BIN_2 +223 0x0304 //RX_FDEQ_BIN_3 +224 0x0405 //RX_FDEQ_BIN_4 +225 0x0506 //RX_FDEQ_BIN_5 +226 0x0708 //RX_FDEQ_BIN_6 +227 0x090A //RX_FDEQ_BIN_7 +228 0x0B0C //RX_FDEQ_BIN_8 +229 0x0D0E //RX_FDEQ_BIN_9 +230 0x1013 //RX_FDEQ_BIN_10 +231 0x1719 //RX_FDEQ_BIN_11 +232 0x1B1E //RX_FDEQ_BIN_12 +233 0x1E1E //RX_FDEQ_BIN_13 +234 0x1E28 //RX_FDEQ_BIN_14 +235 0x282C //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x4000 //RX_FDEQ_RESRV_0 +245 0x0320 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0030 //RX_FDDRC_BAND_MARGIN_1 +248 0x0050 //RX_FDDRC_BAND_MARGIN_2 +249 0x0080 //RX_FDDRC_BAND_MARGIN_3 +250 0x0007 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x5000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x6400 //RX_FDDRC_THRD_3_2 +258 0x6400 //RX_FDDRC_THRD_3_3 +259 0x2000 //RX_FDDRC_SLANT_0_0 +260 0x2000 //RX_FDDRC_SLANT_0_1 +261 0x2000 //RX_FDDRC_SLANT_0_2 +262 0x2000 //RX_FDDRC_SLANT_0_3 +263 0x5333 //RX_FDDRC_SLANT_1_0 +264 0x5333 //RX_FDDRC_SLANT_1_1 +265 0x5333 //RX_FDDRC_SLANT_1_2 +266 0x5333 //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +286 0x005B //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 +#VOL 5 +163 0x5000 //RX_TDDRC_ALPHA_UP_1 +164 0x5000 //RX_TDDRC_ALPHA_UP_2 +165 0x5000 //RX_TDDRC_ALPHA_UP_3 +166 0x2000 //RX_TDDRC_ALPHA_UP_4 +184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +190 0x65AD //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +269 0x0000 //RX_TDDRC_THRD_0 +270 0x0000 //RX_TDDRC_THRD_1 +271 0x1A00 //RX_TDDRC_THRD_2 +272 0x1A00 //RX_TDDRC_THRD_3 +273 0x3000 //RX_TDDRC_SLANT_0 +274 0x7EB8 //RX_TDDRC_SLANT_1 +275 0x5000 //RX_TDDRC_ALPHA_UP_0 +276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x199A //RX_TDDRC_HMNC_GAIN +279 0x0001 //RX_TDDRC_SMT_FLAG +280 0x0CCD //RX_TDDRC_SMT_W +281 0x01C8 //RX_TDDRC_DRC_GAIN +195 0x0020 //RX_FDEQ_SUBNUM +196 0x4848 //RX_FDEQ_GAIN_0 +197 0x4848 //RX_FDEQ_GAIN_1 +198 0x4848 //RX_FDEQ_GAIN_2 +199 0x4848 //RX_FDEQ_GAIN_3 +200 0x4848 //RX_FDEQ_GAIN_4 +201 0x4848 //RX_FDEQ_GAIN_5 +202 0x4848 //RX_FDEQ_GAIN_6 +203 0x4848 //RX_FDEQ_GAIN_7 +204 0x4848 //RX_FDEQ_GAIN_8 +205 0x4848 //RX_FDEQ_GAIN_9 +206 0x4848 //RX_FDEQ_GAIN_10 +207 0x4848 //RX_FDEQ_GAIN_11 +208 0x4848 //RX_FDEQ_GAIN_12 +209 0x4848 //RX_FDEQ_GAIN_13 +210 0x4848 //RX_FDEQ_GAIN_14 +211 0x4848 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0202 //RX_FDEQ_BIN_0 +221 0x0203 //RX_FDEQ_BIN_1 +222 0x0303 //RX_FDEQ_BIN_2 +223 0x0304 //RX_FDEQ_BIN_3 +224 0x0405 //RX_FDEQ_BIN_4 +225 0x0506 //RX_FDEQ_BIN_5 +226 0x0708 //RX_FDEQ_BIN_6 +227 0x090A //RX_FDEQ_BIN_7 +228 0x0B0C //RX_FDEQ_BIN_8 +229 0x0D0E //RX_FDEQ_BIN_9 +230 0x1013 //RX_FDEQ_BIN_10 +231 0x1719 //RX_FDEQ_BIN_11 +232 0x1B1E //RX_FDEQ_BIN_12 +233 0x1E1E //RX_FDEQ_BIN_13 +234 0x1E28 //RX_FDEQ_BIN_14 +235 0x282C //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x4000 //RX_FDEQ_RESRV_0 +245 0x0320 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0030 //RX_FDDRC_BAND_MARGIN_1 +248 0x0050 //RX_FDDRC_BAND_MARGIN_2 +249 0x0080 //RX_FDDRC_BAND_MARGIN_3 +250 0x0007 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x5000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x6400 //RX_FDDRC_THRD_3_2 +258 0x6400 //RX_FDDRC_THRD_3_3 +259 0x2000 //RX_FDDRC_SLANT_0_0 +260 0x2000 //RX_FDDRC_SLANT_0_1 +261 0x2000 //RX_FDDRC_SLANT_0_2 +262 0x2000 //RX_FDDRC_SLANT_0_3 +263 0x5333 //RX_FDDRC_SLANT_1_0 +264 0x5333 //RX_FDDRC_SLANT_1_1 +265 0x5333 //RX_FDDRC_SLANT_1_2 +266 0x5333 //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +286 0x0099 //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 +#VOL 6 +163 0x5000 //RX_TDDRC_ALPHA_UP_1 +164 0x5000 //RX_TDDRC_ALPHA_UP_2 +165 0x5000 //RX_TDDRC_ALPHA_UP_3 +166 0x2000 //RX_TDDRC_ALPHA_UP_4 +184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +190 0x65AD //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +269 0x0000 //RX_TDDRC_THRD_0 +270 0x0000 //RX_TDDRC_THRD_1 +271 0x1A00 //RX_TDDRC_THRD_2 +272 0x1A00 //RX_TDDRC_THRD_3 +273 0x3000 //RX_TDDRC_SLANT_0 +274 0x7EB8 //RX_TDDRC_SLANT_1 +275 0x5000 //RX_TDDRC_ALPHA_UP_0 +276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x199A //RX_TDDRC_HMNC_GAIN +279 0x0001 //RX_TDDRC_SMT_FLAG +280 0x0CCD //RX_TDDRC_SMT_W +281 0x01C8 //RX_TDDRC_DRC_GAIN +195 0x0020 //RX_FDEQ_SUBNUM +196 0x4848 //RX_FDEQ_GAIN_0 +197 0x4848 //RX_FDEQ_GAIN_1 +198 0x4848 //RX_FDEQ_GAIN_2 +199 0x4848 //RX_FDEQ_GAIN_3 +200 0x4848 //RX_FDEQ_GAIN_4 +201 0x4848 //RX_FDEQ_GAIN_5 +202 0x4848 //RX_FDEQ_GAIN_6 +203 0x4848 //RX_FDEQ_GAIN_7 +204 0x4848 //RX_FDEQ_GAIN_8 +205 0x4848 //RX_FDEQ_GAIN_9 +206 0x4848 //RX_FDEQ_GAIN_10 +207 0x4848 //RX_FDEQ_GAIN_11 +208 0x4848 //RX_FDEQ_GAIN_12 +209 0x4848 //RX_FDEQ_GAIN_13 +210 0x4848 //RX_FDEQ_GAIN_14 +211 0x4848 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0202 //RX_FDEQ_BIN_0 +221 0x0203 //RX_FDEQ_BIN_1 +222 0x0303 //RX_FDEQ_BIN_2 +223 0x0304 //RX_FDEQ_BIN_3 +224 0x0405 //RX_FDEQ_BIN_4 +225 0x0506 //RX_FDEQ_BIN_5 +226 0x0708 //RX_FDEQ_BIN_6 +227 0x090A //RX_FDEQ_BIN_7 +228 0x0B0C //RX_FDEQ_BIN_8 +229 0x0D0E //RX_FDEQ_BIN_9 +230 0x1013 //RX_FDEQ_BIN_10 +231 0x1719 //RX_FDEQ_BIN_11 +232 0x1B1E //RX_FDEQ_BIN_12 +233 0x1E1E //RX_FDEQ_BIN_13 +234 0x1E28 //RX_FDEQ_BIN_14 +235 0x282C //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x4000 //RX_FDEQ_RESRV_0 +245 0x0320 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0030 //RX_FDDRC_BAND_MARGIN_1 +248 0x0050 //RX_FDDRC_BAND_MARGIN_2 +249 0x0080 //RX_FDDRC_BAND_MARGIN_3 +250 0x0007 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x5000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x6400 //RX_FDDRC_THRD_3_2 +258 0x6400 //RX_FDDRC_THRD_3_3 +259 0x2000 //RX_FDDRC_SLANT_0_0 +260 0x2000 //RX_FDDRC_SLANT_0_1 +261 0x2000 //RX_FDDRC_SLANT_0_2 +262 0x2000 //RX_FDDRC_SLANT_0_3 +263 0x5333 //RX_FDDRC_SLANT_1_0 +264 0x5333 //RX_FDDRC_SLANT_1_1 +265 0x5333 //RX_FDDRC_SLANT_1_2 +266 0x5333 //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +286 0x0100 //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 #CASE_NAME HEADSET-GOOGLE_CONDOR_CERTIFICATION1-VOICE_GENERIC-FB -#PARAM_MODE FULL -#PARAM_TYPE TX+RX -#TOTAL_CUSTOM_STEP 7 +#PARAM_MODE Full +#PARAM_TYPE TX+2RX +#TOTAL_CUSTOM_STEP 7+7 #TX 0 0x0009 //TX_OPERATION_MODE_0 1 0x0009 //TX_OPERATION_MODE_1 @@ -33585,10 +50989,10 @@ 248 0xF600 //TX_THR_SN_EST_6 249 0xF600 //TX_THR_SN_EST_7 250 0x0200 //TX_DELTA_THR_SN_EST_0 -251 0x0200 //TX_DELTA_THR_SN_EST_1 -252 0x0400 //TX_DELTA_THR_SN_EST_2 -253 0x0300 //TX_DELTA_THR_SN_EST_3 -254 0x0600 //TX_DELTA_THR_SN_EST_4 +251 0x0400 //TX_DELTA_THR_SN_EST_1 +252 0x0300 //TX_DELTA_THR_SN_EST_2 +253 0x0600 //TX_DELTA_THR_SN_EST_3 +254 0x0200 //TX_DELTA_THR_SN_EST_4 255 0x0200 //TX_DELTA_THR_SN_EST_5 256 0x0200 //TX_DELTA_THR_SN_EST_6 257 0x0200 //TX_DELTA_THR_SN_EST_7 @@ -33616,31 +51020,31 @@ 279 0x2000 //TX_B_POST_FLT_0 280 0x2000 //TX_B_POST_FLT_1 281 0x0012 //TX_NS_LVL_CTRL_0 -282 0x0019 //TX_NS_LVL_CTRL_1 +282 0x0016 //TX_NS_LVL_CTRL_1 283 0x0016 //TX_NS_LVL_CTRL_2 -284 0x0016 //TX_NS_LVL_CTRL_3 -285 0x0019 //TX_NS_LVL_CTRL_4 +284 0x0019 //TX_NS_LVL_CTRL_3 +285 0x0010 //TX_NS_LVL_CTRL_4 286 0x0010 //TX_NS_LVL_CTRL_5 -287 0x0010 //TX_NS_LVL_CTRL_6 +287 0x0019 //TX_NS_LVL_CTRL_6 288 0x0010 //TX_NS_LVL_CTRL_7 289 0x000C //TX_MIN_GAIN_S_0 -290 0x0011 //TX_MIN_GAIN_S_1 +290 0x000C //TX_MIN_GAIN_S_1 291 0x000C //TX_MIN_GAIN_S_2 -292 0x000C //TX_MIN_GAIN_S_3 -293 0x000F //TX_MIN_GAIN_S_4 +292 0x000F //TX_MIN_GAIN_S_3 +293 0x000C //TX_MIN_GAIN_S_4 294 0x000C //TX_MIN_GAIN_S_5 -295 0x000C //TX_MIN_GAIN_S_6 +295 0x0011 //TX_MIN_GAIN_S_6 296 0x000C //TX_MIN_GAIN_S_7 297 0x7FFF //TX_NMOS_SUP 298 0x0000 //TX_NS_MAX_PRI_SNR_TH 299 0x0000 //TX_NMOS_SUP_MENSA 300 0x7000 //TX_SNRI_SUP_0 -301 0x6000 //TX_SNRI_SUP_1 +301 0x7000 //TX_SNRI_SUP_1 302 0x7000 //TX_SNRI_SUP_2 -303 0x7000 //TX_SNRI_SUP_3 -304 0x6000 //TX_SNRI_SUP_4 +303 0x6000 //TX_SNRI_SUP_3 +304 0x7FFF //TX_SNRI_SUP_4 305 0x7FFF //TX_SNRI_SUP_5 -306 0x7FFF //TX_SNRI_SUP_6 +306 0x6000 //TX_SNRI_SUP_6 307 0x7FFF //TX_SNRI_SUP_7 308 0x7FFF //TX_THR_LFNS 309 0x0016 //TX_G_LFNS @@ -33657,8 +51061,8 @@ 320 0x6000 //TX_A_POST_FILT_S_6 321 0x6000 //TX_A_POST_FILT_S_7 322 0x2000 //TX_B_POST_FILT_0 -323 0x2000 //TX_B_POST_FILT_1 -324 0x4000 //TX_B_POST_FILT_2 +323 0x4000 //TX_B_POST_FILT_1 +324 0x2000 //TX_B_POST_FILT_2 325 0x2000 //TX_B_POST_FILT_3 326 0x2000 //TX_B_POST_FILT_4 327 0x2000 //TX_B_POST_FILT_5 @@ -33701,7 +51105,7 @@ 364 0x0000 //TX_K_APT 365 0x0001 //TX_NOISEDET 366 0x0190 //TX_NDETCT -367 0x0020 //TX_NOISE_TH_0 +367 0x04E8 //TX_NOISE_TH_0 368 0x7FFF //TX_NOISE_TH_0_2 369 0x7FFF //TX_NOISE_TH_0_3 370 0x02A6 //TX_NOISE_TH_1 @@ -33713,11 +51117,11 @@ 376 0x0001 //TX_NOISE_TH_5_3 377 0x0000 //TX_NOISE_TH_5_4 378 0x02BC //TX_NOISE_TH_6 -379 0x0020 //TX_MINENOISE_TH -380 0x4000 //TX_MINENOISE_MIC0_TH_MTS -381 0xFFEE //TX_MINENOISE_MIC0_TH_EXP -382 0x6000 //TX_MINENOISE_MIC0_S_TH_MTS -383 0xFFF3 //TX_MINENOISE_MIC0_S_TH_EXP +379 0x02BC //TX_MINENOISE_TH +380 0xD508 //TX_MORENS_TFMASK_TH +381 0x0001 //TX_DRC_QUIET_FLOOR +382 0x3A98 //TX_RATIODTL_CUT_TH +383 0x1482 //TX_DT_CUT_K1 384 0x0666 //TX_OUT_ENER_S_TH_CLEAN 385 0x0666 //TX_OUT_ENER_S_TH_LESSCLEAN 386 0x0333 //TX_OUT_ENER_S_TH_NOISY @@ -33725,22 +51129,22 @@ 388 0x0333 //TX_OUT_ENER_TH_SPEECH 389 0x2000 //TX_SN_NPB_GAIN 390 0x0000 //TX_NN_NPB_GAIN -391 0x0000 //TX_CSX_ALPHA_0 -392 0x0000 //TX_CSX_ALPHA_1 -393 0x0000 //TX_CSX_ALPHA_2 -394 0x0000 //TX_CSX_ALPHA_3 -395 0x0800 //TX_MU_ARSP_EST -396 0x00C8 //TX_P_OUTBEAM_MIN_TH +391 0x7FFF //TX_POST_MASK_SUP_HSNE +392 0x1388 //TX_TAIL_DET_TH +393 0x4000 //TX_B_LESSCUT_RTO_WTA +394 0x0000 //TX_MEL_G_R +395 0x0080 //TX_SUPHIGH_TH +396 0x0000 //TX_MASK_G_R 397 0x0002 //TX_EXTRA_NS_L -398 0x0800 //TX_EXTRA_NS_A -399 0x0005 //TX_VR_NOISE_FLOOR_TH +398 0x1800 //TX_C_POST_FLT_MASK +399 0x7FFF //TX_A_POST_FLT_WNS 400 0x0148 //TX_MIN_G_LOW300HZ 401 0x0004 //TX_MAXLEVEL_CNG 402 0x00B4 //TX_STN_NOISE_TH 403 0x4000 //TX_POST_MASK_SUP 404 0x7FFF //TX_POST_MASK_ADJUST 405 0x00C8 //TX_NS_ENOISE_MIC0_TH -406 0x0020 //TX_MINENOISE_MIC0_TH +406 0x04E7 //TX_MINENOISE_MIC0_TH 407 0x012C //TX_MINENOISE_MIC0_S_TH 408 0x2900 //TX_MIN_G_CTRL_SSNS 409 0x0800 //TX_METAL_RTO_THR @@ -33848,16 +51252,16 @@ 511 0x6666 //TX_MIC_TO_BFGAIN 512 0x0000 //TX_MICTOBFGAIN0 513 0x0000 //TX_FASTMUE_TH -514 0x0000 //TX_DERVB_LEN_0 -515 0x0000 //TX_DERVB_LEN_1 -516 0x0000 //TX_RHO_DERVB -517 0x0000 //TX_MIC_INDX_DERVB -518 0x0000 //TX_MU_DERVB -519 0x0000 //TX_DR_RESRV_0 -520 0x0000 //TX_DR_RESRV_1 -521 0x0000 //TX_DR_RESRV_2 -522 0x0000 //TX_DR_RESRV_3 -523 0x0000 //TX_DR_RESRV_4 +514 0xC000 //TX_DEREVERB_LF_MU +515 0xC000 //TX_DEREVERB_HF_MU +516 0xCCCC //TX_DEREVERB_DELAY +517 0xD999 //TX_DEREVERB_COEF_LEN +518 0x1F40 //TX_DEREVERB_DNR +519 0x0000 //TX_DEREVERB_ALPHA +520 0x0000 //TX_DEREVERB_BETA +521 0x0000 //TX_GSC_RTOL_TH +522 0x7000 //TX_GSC_RTOH_TH +523 0x0064 //TX_WIDE2_MEANHTH 524 0x0000 //TX_DR_RESRV_5 525 0x0000 //TX_DR_RESRV_6 526 0x0000 //TX_DR_RESRV_7 @@ -34231,8 +51635,73 @@ 894 0xC000 //TX_FASTNS_SSA_THHFL 895 0xCCCC //TX_FASTNS_SSA_THLFH 896 0xD999 //TX_FASTNS_SSA_THHFH +897 0x2339 //TX_SENDFUNC_REG_MICMUTE +898 0x0021 //TX_SENDFUNC_REG_MICMUTE1 +899 0x02BC //TX_MICMUTE_RATIO_THR +900 0x0140 //TX_MICMUTE_AMP_THR +901 0x0004 //TX_MICMUTE_HPF_IND +902 0x00C0 //TX_MICMUTE_LOG_EYR_TH +903 0x0008 //TX_MICMUTE_CVG_TIME +904 0x0008 //TX_MICMUTE_RELEASE_TIME +905 0x01FE //TX_MIC_VOLUME_MIC0MUTE +906 0x0020 //TX_MICMUTE_EPD_OFFSET_0 +907 0x001E //TX_MICMUTE_FRQ_AEC_L +908 0x7999 //TX_MICMUTE_EAD_THR +909 0x7FFF //TX_MICMUTE_LAMBDA_CB_NLE +910 0x7FFF //TX_MICMUTE_LAMBDA_RE_EST +911 0x4000 //TX_DTD_THR1_MICMUTE_0 +912 0x7000 //TX_DTD_THR1_MICMUTE_1 +913 0x7FFF //TX_DTD_THR1_MICMUTE_2 +914 0x7FFF //TX_DTD_THR1_MICMUTE_3 +915 0x6CCC //TX_DTD_THR2_MICMUTE_0 +916 0x0400 //TX_MICMUTE_MIN_EQ_RE_EST_0 +917 0x0400 //TX_MICMUTE_MIN_EQ_RE_EST_1 +918 0x1000 //TX_MICMUTE_MIN_EQ_RE_EST_2 +919 0x7FFF //TX_MICMUTE_MIN_EQ_RE_EST_3 +920 0x7FFF //TX_MICMUTE_MIN_EQ_RE_EST_4 +921 0x4000 //TX_MICMUTE_C_POST_FLT +922 0x03E8 //TX_MICMUTE_DT_CUT_K +923 0x0001 //TX_MICMUTE_DT_CUT_THR +924 0x03E8 //TX_MICMUTE_DT_CUT_K2 +925 0x0001 //TX_MICMUTE_DT_CUT_THR2 +926 0x0064 //TX_MICMUTE_DT2_HOLD_N +927 0x1000 //TX_MICMUTE_RATIODTH_THCUT +928 0x1000 //TX_MICMUTE_B_POST_FLT_ECHOL +929 0x7FFF //TX_MICMUTE_B_POST_FLT_ECHOH +930 0x0400 //TX_MICMUTE_C_POST_FLT_MASK +931 0x7999 //TX_MICMUTE_RATIODTL_CUT_TH +932 0x0258 //TX_MICMUTE_DT_CUT_K1 +933 0x0800 //TX_MICMUTE_N2_SN_EST +934 0xFC00 //TX_MICMUTE_THR_SN_EST_0 +935 0x001C //TX_MICMUTE_MIN_G_CTRL_0 +936 0x6000 //TX_MICMUTE_A_POST_FILT_S_0 +937 0x7000 //TX_MICMUTE_B_POST_FILT_0 +938 0x2710 //TX_MIC1RUB_AMP_THR +939 0x0010 //TX_MIC1MUTE_RATIO_THR +940 0x0450 //TX_MIC1MUTE_AMP_THR +941 0x0008 //TX_MIC1MUTE_CVG_TIME +942 0x0008 //TX_MIC1MUTE_RELEASE_TIME +943 0x0000 //TX_AMS_RESRV_01 +944 0x0000 //TX_AMS_RESRV_02 +945 0x0000 //TX_AMS_RESRV_03 +946 0x0000 //TX_AMS_RESRV_04 +947 0x0000 //TX_AMS_RESRV_05 +948 0x0000 //TX_AMS_RESRV_06 +949 0x0000 //TX_AMS_RESRV_07 +950 0x0000 //TX_AMS_RESRV_08 +951 0x0000 //TX_AMS_RESRV_09 +952 0x0000 //TX_AMS_RESRV_10 +953 0x0000 //TX_AMS_RESRV_11 +954 0x0000 //TX_AMS_RESRV_12 +955 0x0000 //TX_AMS_RESRV_13 +956 0x0000 //TX_AMS_RESRV_14 +957 0x0000 //TX_AMS_RESRV_15 +958 0x0000 //TX_AMS_RESRV_16 +959 0x0000 //TX_AMS_RESRV_17 +960 0x0000 //TX_AMS_RESRV_18 +961 0x0000 //TX_AMS_RESRV_19 #RX -0 0x002C //RX_RECVFUNC_MODE_0 +0 0x202C //RX_RECVFUNC_MODE_0 1 0x0000 //RX_RECVFUNC_MODE_1 2 0x0004 //RX_SAMPLINGFREQ_SIG 3 0x0004 //RX_SAMPLINGFREQ_PROC @@ -35082,11 +52551,862 @@ 110 0x0000 //RX_FDDRC_RESRV_0 129 0x0100 //RX_SPK_VOL 130 0x0000 //RX_VOL_RESRV_0 +#RX 2 +157 0x202C //RX_RECVFUNC_MODE_0 +158 0x0000 //RX_RECVFUNC_MODE_1 +159 0x0004 //RX_SAMPLINGFREQ_SIG +160 0x0004 //RX_SAMPLINGFREQ_PROC +161 0x000A //RX_FRAME_SZ +162 0x0000 //RX_DELAY_OPT +163 0x1000 //RX_TDDRC_ALPHA_UP_1 +164 0x1000 //RX_TDDRC_ALPHA_UP_2 +165 0x1000 //RX_TDDRC_ALPHA_UP_3 +166 0x1000 //RX_TDDRC_ALPHA_UP_4 +167 0x0800 //RX_PGA +168 0x7B02 //RX_A_HP +169 0x4000 //RX_B_PE +170 0x7800 //RX_THR_PITCH_DET_0 +171 0x7000 //RX_THR_PITCH_DET_1 +172 0x6000 //RX_THR_PITCH_DET_2 +173 0x0008 //RX_PITCH_BFR_LEN +174 0x0003 //RX_SBD_PITCH_DET +175 0x0100 //RX_PP_RESRV_0 +176 0x0020 //RX_PP_RESRV_1 +177 0x0500 //RX_N_SN_EST +178 0x000C //RX_N2_SN_EST +179 0x000A //RX_NS_LVL_CTRL +180 0xF600 //RX_THR_SN_EST +181 0x7000 //RX_LAMBDA_PFILT +182 0x000A //RX_FENS_RESRV_0 +183 0x0190 //RX_FENS_RESRV_1 +184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +187 0x0002 //RX_EXTRA_NS_L +188 0x0800 //RX_EXTRA_NS_A +189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +190 0x7FFF //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +192 0x199A //RX_A_POST_FLT +193 0x0000 //RX_LMT_THRD +194 0x4000 //RX_LMT_ALPHA +195 0x0020 //RX_FDEQ_SUBNUM +196 0x4848 //RX_FDEQ_GAIN_0 +197 0x4848 //RX_FDEQ_GAIN_1 +198 0x4848 //RX_FDEQ_GAIN_2 +199 0x4848 //RX_FDEQ_GAIN_3 +200 0x4848 //RX_FDEQ_GAIN_4 +201 0x4848 //RX_FDEQ_GAIN_5 +202 0x4848 //RX_FDEQ_GAIN_6 +203 0x4848 //RX_FDEQ_GAIN_7 +204 0x4848 //RX_FDEQ_GAIN_8 +205 0x4848 //RX_FDEQ_GAIN_9 +206 0x4848 //RX_FDEQ_GAIN_10 +207 0x4848 //RX_FDEQ_GAIN_11 +208 0x4848 //RX_FDEQ_GAIN_12 +209 0x4848 //RX_FDEQ_GAIN_13 +210 0x4848 //RX_FDEQ_GAIN_14 +211 0x4848 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0202 //RX_FDEQ_BIN_0 +221 0x0203 //RX_FDEQ_BIN_1 +222 0x0304 //RX_FDEQ_BIN_2 +223 0x0405 //RX_FDEQ_BIN_3 +224 0x0607 //RX_FDEQ_BIN_4 +225 0x0809 //RX_FDEQ_BIN_5 +226 0x0A0B //RX_FDEQ_BIN_6 +227 0x0C0D //RX_FDEQ_BIN_7 +228 0x0E0F //RX_FDEQ_BIN_8 +229 0x1011 //RX_FDEQ_BIN_9 +230 0x1214 //RX_FDEQ_BIN_10 +231 0x1618 //RX_FDEQ_BIN_11 +232 0x1C1C //RX_FDEQ_BIN_12 +233 0x2020 //RX_FDEQ_BIN_13 +234 0x2020 //RX_FDEQ_BIN_14 +235 0x2011 //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x4000 //RX_FDEQ_RESRV_0 +245 0x0320 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0030 //RX_FDDRC_BAND_MARGIN_1 +248 0x0050 //RX_FDDRC_BAND_MARGIN_2 +249 0x0080 //RX_FDDRC_BAND_MARGIN_3 +250 0x0007 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x5000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x6400 //RX_FDDRC_THRD_3_2 +258 0x6400 //RX_FDDRC_THRD_3_3 +259 0x2000 //RX_FDDRC_SLANT_0_0 +260 0x2000 //RX_FDDRC_SLANT_0_1 +261 0x2000 //RX_FDDRC_SLANT_0_2 +262 0x2000 //RX_FDDRC_SLANT_0_3 +263 0x5333 //RX_FDDRC_SLANT_1_0 +264 0x5333 //RX_FDDRC_SLANT_1_1 +265 0x5333 //RX_FDDRC_SLANT_1_2 +266 0x5333 //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +268 0x0002 //RX_FILTINDX +269 0x0000 //RX_TDDRC_THRD_0 +270 0x0000 //RX_TDDRC_THRD_1 +271 0x1200 //RX_TDDRC_THRD_2 +272 0x1900 //RX_TDDRC_THRD_3 +273 0x3000 //RX_TDDRC_SLANT_0 +274 0x6E00 //RX_TDDRC_SLANT_1 +275 0x1000 //RX_TDDRC_ALPHA_UP_0 +276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x199A //RX_TDDRC_HMNC_GAIN +279 0x0001 //RX_TDDRC_SMT_FLAG +280 0x0CCD //RX_TDDRC_SMT_W +281 0x0240 //RX_TDDRC_DRC_GAIN +282 0x7C00 //RX_LAMBDA_PKA_FP +283 0x2000 //RX_TPKA_FP +284 0x2000 //RX_MIN_G_FP +285 0x0080 //RX_MAX_G_FP +286 0x000B //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 +288 0x0000 //RX_MAXLEVEL_CNG +289 0x3000 //RX_BWE_UV_TH +290 0x3000 //RX_BWE_UV_TH2 +291 0x1800 //RX_BWE_UV_TH3 +292 0x1000 //RX_BWE_V_TH +293 0x04CD //RX_BWE_GAIN1_V_TH1 +294 0x0F33 //RX_BWE_GAIN1_V_TH2 +295 0x7333 //RX_BWE_UV_EQ +296 0x199A //RX_BWE_V_EQ +297 0x7333 //RX_BWE_TONE_TH +298 0x0004 //RX_BWE_UV_HOLD_T +299 0x6CCD //RX_BWE_GAIN2_ALPHA +300 0x799A //RX_BWE_GAIN3_ALPHA +301 0x001E //RX_BWE_CUTOFF +302 0x3000 //RX_BWE_GAINFILL +303 0x3200 //RX_BWE_MAXTH_TONE +304 0x2000 //RX_BWE_EQ_0 +305 0x2000 //RX_BWE_EQ_1 +306 0x2000 //RX_BWE_EQ_2 +307 0x2000 //RX_BWE_EQ_3 +308 0x2000 //RX_BWE_EQ_4 +309 0x2000 //RX_BWE_EQ_5 +310 0x2000 //RX_BWE_EQ_6 +311 0x0000 //RX_BWE_RESRV_0 +312 0x0000 //RX_BWE_RESRV_1 +313 0x0000 //RX_BWE_RESRV_2 +#VOL 0 +163 0x1000 //RX_TDDRC_ALPHA_UP_1 +164 0x1000 //RX_TDDRC_ALPHA_UP_2 +165 0x1000 //RX_TDDRC_ALPHA_UP_3 +166 0x1000 //RX_TDDRC_ALPHA_UP_4 +184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +190 0x7FFF //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +269 0x0000 //RX_TDDRC_THRD_0 +270 0x0000 //RX_TDDRC_THRD_1 +271 0x1200 //RX_TDDRC_THRD_2 +272 0x1900 //RX_TDDRC_THRD_3 +273 0x3000 //RX_TDDRC_SLANT_0 +274 0x6E00 //RX_TDDRC_SLANT_1 +275 0x1000 //RX_TDDRC_ALPHA_UP_0 +276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x199A //RX_TDDRC_HMNC_GAIN +279 0x0001 //RX_TDDRC_SMT_FLAG +280 0x0CCD //RX_TDDRC_SMT_W +281 0x0240 //RX_TDDRC_DRC_GAIN +195 0x0020 //RX_FDEQ_SUBNUM +196 0x4848 //RX_FDEQ_GAIN_0 +197 0x4848 //RX_FDEQ_GAIN_1 +198 0x4848 //RX_FDEQ_GAIN_2 +199 0x4848 //RX_FDEQ_GAIN_3 +200 0x4848 //RX_FDEQ_GAIN_4 +201 0x4848 //RX_FDEQ_GAIN_5 +202 0x4848 //RX_FDEQ_GAIN_6 +203 0x4848 //RX_FDEQ_GAIN_7 +204 0x4848 //RX_FDEQ_GAIN_8 +205 0x4848 //RX_FDEQ_GAIN_9 +206 0x4848 //RX_FDEQ_GAIN_10 +207 0x4848 //RX_FDEQ_GAIN_11 +208 0x4848 //RX_FDEQ_GAIN_12 +209 0x4848 //RX_FDEQ_GAIN_13 +210 0x4848 //RX_FDEQ_GAIN_14 +211 0x4848 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0202 //RX_FDEQ_BIN_0 +221 0x0203 //RX_FDEQ_BIN_1 +222 0x0304 //RX_FDEQ_BIN_2 +223 0x0405 //RX_FDEQ_BIN_3 +224 0x0607 //RX_FDEQ_BIN_4 +225 0x0809 //RX_FDEQ_BIN_5 +226 0x0A0B //RX_FDEQ_BIN_6 +227 0x0C0D //RX_FDEQ_BIN_7 +228 0x0E0F //RX_FDEQ_BIN_8 +229 0x1011 //RX_FDEQ_BIN_9 +230 0x1214 //RX_FDEQ_BIN_10 +231 0x1618 //RX_FDEQ_BIN_11 +232 0x1C1C //RX_FDEQ_BIN_12 +233 0x2020 //RX_FDEQ_BIN_13 +234 0x2020 //RX_FDEQ_BIN_14 +235 0x2011 //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x4000 //RX_FDEQ_RESRV_0 +245 0x0320 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0030 //RX_FDDRC_BAND_MARGIN_1 +248 0x0050 //RX_FDDRC_BAND_MARGIN_2 +249 0x0080 //RX_FDDRC_BAND_MARGIN_3 +250 0x0007 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x5000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x6400 //RX_FDDRC_THRD_3_2 +258 0x6400 //RX_FDDRC_THRD_3_3 +259 0x2000 //RX_FDDRC_SLANT_0_0 +260 0x2000 //RX_FDDRC_SLANT_0_1 +261 0x2000 //RX_FDDRC_SLANT_0_2 +262 0x2000 //RX_FDDRC_SLANT_0_3 +263 0x5333 //RX_FDDRC_SLANT_1_0 +264 0x5333 //RX_FDDRC_SLANT_1_1 +265 0x5333 //RX_FDDRC_SLANT_1_2 +266 0x5333 //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +286 0x000B //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 +#VOL 1 +163 0x1000 //RX_TDDRC_ALPHA_UP_1 +164 0x1000 //RX_TDDRC_ALPHA_UP_2 +165 0x1000 //RX_TDDRC_ALPHA_UP_3 +166 0x1000 //RX_TDDRC_ALPHA_UP_4 +184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +190 0x7FFF //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +269 0x0000 //RX_TDDRC_THRD_0 +270 0x0000 //RX_TDDRC_THRD_1 +271 0x1200 //RX_TDDRC_THRD_2 +272 0x1900 //RX_TDDRC_THRD_3 +273 0x3000 //RX_TDDRC_SLANT_0 +274 0x6E00 //RX_TDDRC_SLANT_1 +275 0x1000 //RX_TDDRC_ALPHA_UP_0 +276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x199A //RX_TDDRC_HMNC_GAIN +279 0x0001 //RX_TDDRC_SMT_FLAG +280 0x0CCD //RX_TDDRC_SMT_W +281 0x0240 //RX_TDDRC_DRC_GAIN +195 0x0020 //RX_FDEQ_SUBNUM +196 0x4848 //RX_FDEQ_GAIN_0 +197 0x4848 //RX_FDEQ_GAIN_1 +198 0x4848 //RX_FDEQ_GAIN_2 +199 0x4848 //RX_FDEQ_GAIN_3 +200 0x4848 //RX_FDEQ_GAIN_4 +201 0x4848 //RX_FDEQ_GAIN_5 +202 0x4848 //RX_FDEQ_GAIN_6 +203 0x4848 //RX_FDEQ_GAIN_7 +204 0x4848 //RX_FDEQ_GAIN_8 +205 0x4848 //RX_FDEQ_GAIN_9 +206 0x4848 //RX_FDEQ_GAIN_10 +207 0x4848 //RX_FDEQ_GAIN_11 +208 0x4848 //RX_FDEQ_GAIN_12 +209 0x4848 //RX_FDEQ_GAIN_13 +210 0x4848 //RX_FDEQ_GAIN_14 +211 0x4848 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0202 //RX_FDEQ_BIN_0 +221 0x0203 //RX_FDEQ_BIN_1 +222 0x0304 //RX_FDEQ_BIN_2 +223 0x0405 //RX_FDEQ_BIN_3 +224 0x0607 //RX_FDEQ_BIN_4 +225 0x0809 //RX_FDEQ_BIN_5 +226 0x0A0B //RX_FDEQ_BIN_6 +227 0x0C0D //RX_FDEQ_BIN_7 +228 0x0E0F //RX_FDEQ_BIN_8 +229 0x1011 //RX_FDEQ_BIN_9 +230 0x1214 //RX_FDEQ_BIN_10 +231 0x1618 //RX_FDEQ_BIN_11 +232 0x1C1C //RX_FDEQ_BIN_12 +233 0x2020 //RX_FDEQ_BIN_13 +234 0x2020 //RX_FDEQ_BIN_14 +235 0x2011 //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x4000 //RX_FDEQ_RESRV_0 +245 0x0320 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0030 //RX_FDDRC_BAND_MARGIN_1 +248 0x0050 //RX_FDDRC_BAND_MARGIN_2 +249 0x0080 //RX_FDDRC_BAND_MARGIN_3 +250 0x0007 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x5000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x6400 //RX_FDDRC_THRD_3_2 +258 0x6400 //RX_FDDRC_THRD_3_3 +259 0x2000 //RX_FDDRC_SLANT_0_0 +260 0x2000 //RX_FDDRC_SLANT_0_1 +261 0x2000 //RX_FDDRC_SLANT_0_2 +262 0x2000 //RX_FDDRC_SLANT_0_3 +263 0x5333 //RX_FDDRC_SLANT_1_0 +264 0x5333 //RX_FDDRC_SLANT_1_1 +265 0x5333 //RX_FDDRC_SLANT_1_2 +266 0x5333 //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +286 0x0013 //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 +#VOL 2 +163 0x1000 //RX_TDDRC_ALPHA_UP_1 +164 0x1000 //RX_TDDRC_ALPHA_UP_2 +165 0x1000 //RX_TDDRC_ALPHA_UP_3 +166 0x1000 //RX_TDDRC_ALPHA_UP_4 +184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +190 0x7FFF //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +269 0x0000 //RX_TDDRC_THRD_0 +270 0x0000 //RX_TDDRC_THRD_1 +271 0x1200 //RX_TDDRC_THRD_2 +272 0x1900 //RX_TDDRC_THRD_3 +273 0x3000 //RX_TDDRC_SLANT_0 +274 0x6E00 //RX_TDDRC_SLANT_1 +275 0x1000 //RX_TDDRC_ALPHA_UP_0 +276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x199A //RX_TDDRC_HMNC_GAIN +279 0x0001 //RX_TDDRC_SMT_FLAG +280 0x0CCD //RX_TDDRC_SMT_W +281 0x0240 //RX_TDDRC_DRC_GAIN +195 0x0020 //RX_FDEQ_SUBNUM +196 0x4848 //RX_FDEQ_GAIN_0 +197 0x4848 //RX_FDEQ_GAIN_1 +198 0x4848 //RX_FDEQ_GAIN_2 +199 0x4848 //RX_FDEQ_GAIN_3 +200 0x4848 //RX_FDEQ_GAIN_4 +201 0x4848 //RX_FDEQ_GAIN_5 +202 0x4848 //RX_FDEQ_GAIN_6 +203 0x4848 //RX_FDEQ_GAIN_7 +204 0x4848 //RX_FDEQ_GAIN_8 +205 0x4848 //RX_FDEQ_GAIN_9 +206 0x4848 //RX_FDEQ_GAIN_10 +207 0x4848 //RX_FDEQ_GAIN_11 +208 0x4848 //RX_FDEQ_GAIN_12 +209 0x4848 //RX_FDEQ_GAIN_13 +210 0x4848 //RX_FDEQ_GAIN_14 +211 0x4848 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0202 //RX_FDEQ_BIN_0 +221 0x0203 //RX_FDEQ_BIN_1 +222 0x0304 //RX_FDEQ_BIN_2 +223 0x0405 //RX_FDEQ_BIN_3 +224 0x0607 //RX_FDEQ_BIN_4 +225 0x0809 //RX_FDEQ_BIN_5 +226 0x0A0B //RX_FDEQ_BIN_6 +227 0x0C0D //RX_FDEQ_BIN_7 +228 0x0E0F //RX_FDEQ_BIN_8 +229 0x1011 //RX_FDEQ_BIN_9 +230 0x1214 //RX_FDEQ_BIN_10 +231 0x1618 //RX_FDEQ_BIN_11 +232 0x1C1C //RX_FDEQ_BIN_12 +233 0x2020 //RX_FDEQ_BIN_13 +234 0x2020 //RX_FDEQ_BIN_14 +235 0x2011 //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x4000 //RX_FDEQ_RESRV_0 +245 0x0320 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0030 //RX_FDDRC_BAND_MARGIN_1 +248 0x0050 //RX_FDDRC_BAND_MARGIN_2 +249 0x0080 //RX_FDDRC_BAND_MARGIN_3 +250 0x0007 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x5000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x6400 //RX_FDDRC_THRD_3_2 +258 0x6400 //RX_FDDRC_THRD_3_3 +259 0x2000 //RX_FDDRC_SLANT_0_0 +260 0x2000 //RX_FDDRC_SLANT_0_1 +261 0x2000 //RX_FDDRC_SLANT_0_2 +262 0x2000 //RX_FDDRC_SLANT_0_3 +263 0x5333 //RX_FDDRC_SLANT_1_0 +264 0x5333 //RX_FDDRC_SLANT_1_1 +265 0x5333 //RX_FDDRC_SLANT_1_2 +266 0x5333 //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +286 0x0020 //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 +#VOL 3 +163 0x1000 //RX_TDDRC_ALPHA_UP_1 +164 0x1000 //RX_TDDRC_ALPHA_UP_2 +165 0x1000 //RX_TDDRC_ALPHA_UP_3 +166 0x1000 //RX_TDDRC_ALPHA_UP_4 +184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +190 0x7FFF //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +269 0x0000 //RX_TDDRC_THRD_0 +270 0x0000 //RX_TDDRC_THRD_1 +271 0x1200 //RX_TDDRC_THRD_2 +272 0x1900 //RX_TDDRC_THRD_3 +273 0x3000 //RX_TDDRC_SLANT_0 +274 0x6E00 //RX_TDDRC_SLANT_1 +275 0x1000 //RX_TDDRC_ALPHA_UP_0 +276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x199A //RX_TDDRC_HMNC_GAIN +279 0x0001 //RX_TDDRC_SMT_FLAG +280 0x0CCD //RX_TDDRC_SMT_W +281 0x0240 //RX_TDDRC_DRC_GAIN +195 0x0020 //RX_FDEQ_SUBNUM +196 0x4848 //RX_FDEQ_GAIN_0 +197 0x4848 //RX_FDEQ_GAIN_1 +198 0x4848 //RX_FDEQ_GAIN_2 +199 0x4848 //RX_FDEQ_GAIN_3 +200 0x4848 //RX_FDEQ_GAIN_4 +201 0x4848 //RX_FDEQ_GAIN_5 +202 0x4848 //RX_FDEQ_GAIN_6 +203 0x4848 //RX_FDEQ_GAIN_7 +204 0x4848 //RX_FDEQ_GAIN_8 +205 0x4848 //RX_FDEQ_GAIN_9 +206 0x4848 //RX_FDEQ_GAIN_10 +207 0x4848 //RX_FDEQ_GAIN_11 +208 0x4848 //RX_FDEQ_GAIN_12 +209 0x4848 //RX_FDEQ_GAIN_13 +210 0x4848 //RX_FDEQ_GAIN_14 +211 0x4848 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0202 //RX_FDEQ_BIN_0 +221 0x0203 //RX_FDEQ_BIN_1 +222 0x0304 //RX_FDEQ_BIN_2 +223 0x0405 //RX_FDEQ_BIN_3 +224 0x0607 //RX_FDEQ_BIN_4 +225 0x0809 //RX_FDEQ_BIN_5 +226 0x0A0B //RX_FDEQ_BIN_6 +227 0x0C0D //RX_FDEQ_BIN_7 +228 0x0E0F //RX_FDEQ_BIN_8 +229 0x1011 //RX_FDEQ_BIN_9 +230 0x1214 //RX_FDEQ_BIN_10 +231 0x1618 //RX_FDEQ_BIN_11 +232 0x1C1C //RX_FDEQ_BIN_12 +233 0x2020 //RX_FDEQ_BIN_13 +234 0x2020 //RX_FDEQ_BIN_14 +235 0x2011 //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x4000 //RX_FDEQ_RESRV_0 +245 0x0320 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0030 //RX_FDDRC_BAND_MARGIN_1 +248 0x0050 //RX_FDDRC_BAND_MARGIN_2 +249 0x0080 //RX_FDDRC_BAND_MARGIN_3 +250 0x0007 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x5000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x6400 //RX_FDDRC_THRD_3_2 +258 0x6400 //RX_FDDRC_THRD_3_3 +259 0x2000 //RX_FDDRC_SLANT_0_0 +260 0x2000 //RX_FDDRC_SLANT_0_1 +261 0x2000 //RX_FDDRC_SLANT_0_2 +262 0x2000 //RX_FDDRC_SLANT_0_3 +263 0x5333 //RX_FDDRC_SLANT_1_0 +264 0x5333 //RX_FDDRC_SLANT_1_1 +265 0x5333 //RX_FDDRC_SLANT_1_2 +266 0x5333 //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +286 0x0036 //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 +#VOL 4 +163 0x1000 //RX_TDDRC_ALPHA_UP_1 +164 0x1000 //RX_TDDRC_ALPHA_UP_2 +165 0x1000 //RX_TDDRC_ALPHA_UP_3 +166 0x1000 //RX_TDDRC_ALPHA_UP_4 +184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +190 0x7FFF //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +269 0x0000 //RX_TDDRC_THRD_0 +270 0x0000 //RX_TDDRC_THRD_1 +271 0x1200 //RX_TDDRC_THRD_2 +272 0x1900 //RX_TDDRC_THRD_3 +273 0x3000 //RX_TDDRC_SLANT_0 +274 0x6E00 //RX_TDDRC_SLANT_1 +275 0x1000 //RX_TDDRC_ALPHA_UP_0 +276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x199A //RX_TDDRC_HMNC_GAIN +279 0x0001 //RX_TDDRC_SMT_FLAG +280 0x0CCD //RX_TDDRC_SMT_W +281 0x0240 //RX_TDDRC_DRC_GAIN +195 0x0020 //RX_FDEQ_SUBNUM +196 0x4848 //RX_FDEQ_GAIN_0 +197 0x4848 //RX_FDEQ_GAIN_1 +198 0x4848 //RX_FDEQ_GAIN_2 +199 0x4848 //RX_FDEQ_GAIN_3 +200 0x4848 //RX_FDEQ_GAIN_4 +201 0x4848 //RX_FDEQ_GAIN_5 +202 0x4848 //RX_FDEQ_GAIN_6 +203 0x4848 //RX_FDEQ_GAIN_7 +204 0x4848 //RX_FDEQ_GAIN_8 +205 0x4848 //RX_FDEQ_GAIN_9 +206 0x4848 //RX_FDEQ_GAIN_10 +207 0x4848 //RX_FDEQ_GAIN_11 +208 0x4848 //RX_FDEQ_GAIN_12 +209 0x4848 //RX_FDEQ_GAIN_13 +210 0x4848 //RX_FDEQ_GAIN_14 +211 0x4848 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0202 //RX_FDEQ_BIN_0 +221 0x0203 //RX_FDEQ_BIN_1 +222 0x0304 //RX_FDEQ_BIN_2 +223 0x0405 //RX_FDEQ_BIN_3 +224 0x0607 //RX_FDEQ_BIN_4 +225 0x0809 //RX_FDEQ_BIN_5 +226 0x0A0B //RX_FDEQ_BIN_6 +227 0x0C0D //RX_FDEQ_BIN_7 +228 0x0E0F //RX_FDEQ_BIN_8 +229 0x1011 //RX_FDEQ_BIN_9 +230 0x1214 //RX_FDEQ_BIN_10 +231 0x1618 //RX_FDEQ_BIN_11 +232 0x1C1C //RX_FDEQ_BIN_12 +233 0x2020 //RX_FDEQ_BIN_13 +234 0x2020 //RX_FDEQ_BIN_14 +235 0x2011 //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x4000 //RX_FDEQ_RESRV_0 +245 0x0320 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0030 //RX_FDDRC_BAND_MARGIN_1 +248 0x0050 //RX_FDDRC_BAND_MARGIN_2 +249 0x0080 //RX_FDDRC_BAND_MARGIN_3 +250 0x0007 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x5000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x6400 //RX_FDDRC_THRD_3_2 +258 0x6400 //RX_FDDRC_THRD_3_3 +259 0x2000 //RX_FDDRC_SLANT_0_0 +260 0x2000 //RX_FDDRC_SLANT_0_1 +261 0x2000 //RX_FDDRC_SLANT_0_2 +262 0x2000 //RX_FDDRC_SLANT_0_3 +263 0x5333 //RX_FDDRC_SLANT_1_0 +264 0x5333 //RX_FDDRC_SLANT_1_1 +265 0x5333 //RX_FDDRC_SLANT_1_2 +266 0x5333 //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +286 0x005B //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 +#VOL 5 +163 0x1000 //RX_TDDRC_ALPHA_UP_1 +164 0x1000 //RX_TDDRC_ALPHA_UP_2 +165 0x1000 //RX_TDDRC_ALPHA_UP_3 +166 0x1000 //RX_TDDRC_ALPHA_UP_4 +184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +190 0x7FFF //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +269 0x0000 //RX_TDDRC_THRD_0 +270 0x0000 //RX_TDDRC_THRD_1 +271 0x1200 //RX_TDDRC_THRD_2 +272 0x1900 //RX_TDDRC_THRD_3 +273 0x3000 //RX_TDDRC_SLANT_0 +274 0x6E00 //RX_TDDRC_SLANT_1 +275 0x1000 //RX_TDDRC_ALPHA_UP_0 +276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x199A //RX_TDDRC_HMNC_GAIN +279 0x0001 //RX_TDDRC_SMT_FLAG +280 0x0CCD //RX_TDDRC_SMT_W +281 0x0240 //RX_TDDRC_DRC_GAIN +195 0x0020 //RX_FDEQ_SUBNUM +196 0x4848 //RX_FDEQ_GAIN_0 +197 0x4848 //RX_FDEQ_GAIN_1 +198 0x4848 //RX_FDEQ_GAIN_2 +199 0x4848 //RX_FDEQ_GAIN_3 +200 0x4848 //RX_FDEQ_GAIN_4 +201 0x4848 //RX_FDEQ_GAIN_5 +202 0x4848 //RX_FDEQ_GAIN_6 +203 0x4848 //RX_FDEQ_GAIN_7 +204 0x4848 //RX_FDEQ_GAIN_8 +205 0x4848 //RX_FDEQ_GAIN_9 +206 0x4848 //RX_FDEQ_GAIN_10 +207 0x4848 //RX_FDEQ_GAIN_11 +208 0x4848 //RX_FDEQ_GAIN_12 +209 0x4848 //RX_FDEQ_GAIN_13 +210 0x4848 //RX_FDEQ_GAIN_14 +211 0x4848 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0202 //RX_FDEQ_BIN_0 +221 0x0203 //RX_FDEQ_BIN_1 +222 0x0304 //RX_FDEQ_BIN_2 +223 0x0405 //RX_FDEQ_BIN_3 +224 0x0607 //RX_FDEQ_BIN_4 +225 0x0809 //RX_FDEQ_BIN_5 +226 0x0A0B //RX_FDEQ_BIN_6 +227 0x0C0D //RX_FDEQ_BIN_7 +228 0x0E0F //RX_FDEQ_BIN_8 +229 0x1011 //RX_FDEQ_BIN_9 +230 0x1214 //RX_FDEQ_BIN_10 +231 0x1618 //RX_FDEQ_BIN_11 +232 0x1C1C //RX_FDEQ_BIN_12 +233 0x2020 //RX_FDEQ_BIN_13 +234 0x2020 //RX_FDEQ_BIN_14 +235 0x2011 //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x4000 //RX_FDEQ_RESRV_0 +245 0x0320 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0030 //RX_FDDRC_BAND_MARGIN_1 +248 0x0050 //RX_FDDRC_BAND_MARGIN_2 +249 0x0080 //RX_FDDRC_BAND_MARGIN_3 +250 0x0007 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x5000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x6400 //RX_FDDRC_THRD_3_2 +258 0x6400 //RX_FDDRC_THRD_3_3 +259 0x2000 //RX_FDDRC_SLANT_0_0 +260 0x2000 //RX_FDDRC_SLANT_0_1 +261 0x2000 //RX_FDDRC_SLANT_0_2 +262 0x2000 //RX_FDDRC_SLANT_0_3 +263 0x5333 //RX_FDDRC_SLANT_1_0 +264 0x5333 //RX_FDDRC_SLANT_1_1 +265 0x5333 //RX_FDDRC_SLANT_1_2 +266 0x5333 //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +286 0x0099 //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 +#VOL 6 +163 0x1000 //RX_TDDRC_ALPHA_UP_1 +164 0x1000 //RX_TDDRC_ALPHA_UP_2 +165 0x1000 //RX_TDDRC_ALPHA_UP_3 +166 0x1000 //RX_TDDRC_ALPHA_UP_4 +184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +190 0x7FFF //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +269 0x0000 //RX_TDDRC_THRD_0 +270 0x0000 //RX_TDDRC_THRD_1 +271 0x1200 //RX_TDDRC_THRD_2 +272 0x1900 //RX_TDDRC_THRD_3 +273 0x3000 //RX_TDDRC_SLANT_0 +274 0x6E00 //RX_TDDRC_SLANT_1 +275 0x1000 //RX_TDDRC_ALPHA_UP_0 +276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x199A //RX_TDDRC_HMNC_GAIN +279 0x0001 //RX_TDDRC_SMT_FLAG +280 0x0CCD //RX_TDDRC_SMT_W +281 0x0240 //RX_TDDRC_DRC_GAIN +195 0x0020 //RX_FDEQ_SUBNUM +196 0x4848 //RX_FDEQ_GAIN_0 +197 0x4848 //RX_FDEQ_GAIN_1 +198 0x4848 //RX_FDEQ_GAIN_2 +199 0x4848 //RX_FDEQ_GAIN_3 +200 0x4848 //RX_FDEQ_GAIN_4 +201 0x4848 //RX_FDEQ_GAIN_5 +202 0x4848 //RX_FDEQ_GAIN_6 +203 0x4848 //RX_FDEQ_GAIN_7 +204 0x4848 //RX_FDEQ_GAIN_8 +205 0x4848 //RX_FDEQ_GAIN_9 +206 0x4848 //RX_FDEQ_GAIN_10 +207 0x4848 //RX_FDEQ_GAIN_11 +208 0x4848 //RX_FDEQ_GAIN_12 +209 0x4848 //RX_FDEQ_GAIN_13 +210 0x4848 //RX_FDEQ_GAIN_14 +211 0x4848 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0202 //RX_FDEQ_BIN_0 +221 0x0203 //RX_FDEQ_BIN_1 +222 0x0304 //RX_FDEQ_BIN_2 +223 0x0405 //RX_FDEQ_BIN_3 +224 0x0607 //RX_FDEQ_BIN_4 +225 0x0809 //RX_FDEQ_BIN_5 +226 0x0A0B //RX_FDEQ_BIN_6 +227 0x0C0D //RX_FDEQ_BIN_7 +228 0x0E0F //RX_FDEQ_BIN_8 +229 0x1011 //RX_FDEQ_BIN_9 +230 0x1214 //RX_FDEQ_BIN_10 +231 0x1618 //RX_FDEQ_BIN_11 +232 0x1C1C //RX_FDEQ_BIN_12 +233 0x2020 //RX_FDEQ_BIN_13 +234 0x2020 //RX_FDEQ_BIN_14 +235 0x2011 //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x4000 //RX_FDEQ_RESRV_0 +245 0x0320 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0030 //RX_FDDRC_BAND_MARGIN_1 +248 0x0050 //RX_FDDRC_BAND_MARGIN_2 +249 0x0080 //RX_FDDRC_BAND_MARGIN_3 +250 0x0007 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x5000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x6400 //RX_FDDRC_THRD_3_2 +258 0x6400 //RX_FDDRC_THRD_3_3 +259 0x2000 //RX_FDDRC_SLANT_0_0 +260 0x2000 //RX_FDDRC_SLANT_0_1 +261 0x2000 //RX_FDDRC_SLANT_0_2 +262 0x2000 //RX_FDDRC_SLANT_0_3 +263 0x5333 //RX_FDDRC_SLANT_1_0 +264 0x5333 //RX_FDDRC_SLANT_1_1 +265 0x5333 //RX_FDDRC_SLANT_1_2 +266 0x5333 //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +286 0x0100 //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 #CASE_NAME HEADSET-TTY_HCO-VOICE_GENERIC-NB -#PARAM_MODE FULL -#PARAM_TYPE TX+RX -#TOTAL_CUSTOM_STEP 7 +#PARAM_MODE Full +#PARAM_TYPE TX+2RX +#TOTAL_CUSTOM_STEP 7+7 #TX 0 0x0001 //TX_OPERATION_MODE_0 1 0x0000 //TX_OPERATION_MODE_1 @@ -35330,7 +53650,7 @@ 239 0x0000 //TX_DT_RESRV_7 240 0x0000 //TX_DT_RESRV_8 241 0x0000 //TX_DT_RESRV_9 -242 0xF200 //TX_THR_SN_EST_0 +242 0xFA00 //TX_THR_SN_EST_0 243 0xF400 //TX_THR_SN_EST_1 244 0xF800 //TX_THR_SN_EST_2 245 0xF600 //TX_THR_SN_EST_3 @@ -35339,12 +53659,12 @@ 248 0xF800 //TX_THR_SN_EST_6 249 0xF800 //TX_THR_SN_EST_7 250 0x0100 //TX_DELTA_THR_SN_EST_0 -251 0x0000 //TX_DELTA_THR_SN_EST_1 +251 0x0100 //TX_DELTA_THR_SN_EST_1 252 0x0100 //TX_DELTA_THR_SN_EST_2 -253 0x0100 //TX_DELTA_THR_SN_EST_3 +253 0x0200 //TX_DELTA_THR_SN_EST_3 254 0x0200 //TX_DELTA_THR_SN_EST_4 255 0x0200 //TX_DELTA_THR_SN_EST_5 -256 0x0200 //TX_DELTA_THR_SN_EST_6 +256 0x0000 //TX_DELTA_THR_SN_EST_6 257 0x0200 //TX_DELTA_THR_SN_EST_7 258 0x4000 //TX_LAMBDA_NN_EST_0 259 0x4000 //TX_LAMBDA_NN_EST_1 @@ -35370,12 +53690,12 @@ 279 0x0000 //TX_B_POST_FLT_0 280 0x0000 //TX_B_POST_FLT_1 281 0x001A //TX_NS_LVL_CTRL_0 -282 0x001A //TX_NS_LVL_CTRL_1 +282 0x0014 //TX_NS_LVL_CTRL_1 283 0x0014 //TX_NS_LVL_CTRL_2 -284 0x0014 //TX_NS_LVL_CTRL_3 +284 0x000C //TX_NS_LVL_CTRL_3 285 0x000C //TX_NS_LVL_CTRL_4 286 0x000C //TX_NS_LVL_CTRL_5 -287 0x000C //TX_NS_LVL_CTRL_6 +287 0x001A //TX_NS_LVL_CTRL_6 288 0x000C //TX_NS_LVL_CTRL_7 289 0x000E //TX_MIN_GAIN_S_0 290 0x0014 //TX_MIN_GAIN_S_1 @@ -35391,10 +53711,10 @@ 300 0x7FFF //TX_SNRI_SUP_0 301 0x7FFF //TX_SNRI_SUP_1 302 0x7FFF //TX_SNRI_SUP_2 -303 0x7FFF //TX_SNRI_SUP_3 +303 0x4000 //TX_SNRI_SUP_3 304 0x4000 //TX_SNRI_SUP_4 305 0x4000 //TX_SNRI_SUP_5 -306 0x4000 //TX_SNRI_SUP_6 +306 0x7FFF //TX_SNRI_SUP_6 307 0x4000 //TX_SNRI_SUP_7 308 0x1200 //TX_THR_LFNS 309 0x0147 //TX_G_LFNS @@ -35403,12 +53723,12 @@ 312 0x7FFF //TX_A_POST_FILT_0 313 0x7FFF //TX_A_POST_FILT_1 314 0x4000 //TX_A_POST_FILT_S_0 -315 0x199A //TX_A_POST_FILT_S_1 +315 0x1000 //TX_A_POST_FILT_S_1 316 0x1000 //TX_A_POST_FILT_S_2 -317 0x1000 //TX_A_POST_FILT_S_3 +317 0x6666 //TX_A_POST_FILT_S_3 318 0x6666 //TX_A_POST_FILT_S_4 319 0x6666 //TX_A_POST_FILT_S_5 -320 0x6666 //TX_A_POST_FILT_S_6 +320 0x199A //TX_A_POST_FILT_S_6 321 0x6666 //TX_A_POST_FILT_S_7 322 0x2000 //TX_B_POST_FILT_0 323 0x2000 //TX_B_POST_FILT_1 @@ -35455,7 +53775,7 @@ 364 0x0000 //TX_K_APT 365 0x0001 //TX_NOISEDET 366 0x05A0 //TX_NDETCT -367 0x000A //TX_NOISE_TH_0 +367 0x003B //TX_NOISE_TH_0 368 0x1388 //TX_NOISE_TH_0_2 369 0x3A98 //TX_NOISE_TH_0_3 370 0x0C80 //TX_NOISE_TH_1 @@ -35467,11 +53787,11 @@ 376 0x7FFF //TX_NOISE_TH_5_3 377 0x7FFF //TX_NOISE_TH_5_4 378 0x00C8 //TX_NOISE_TH_6 -379 0x000A //TX_MINENOISE_TH -380 0x0000 //TX_MINENOISE_MIC0_TH_MTS -381 0x0000 //TX_MINENOISE_MIC0_TH_EXP -382 0x0000 //TX_MINENOISE_MIC0_S_TH_MTS -383 0x0000 //TX_MINENOISE_MIC0_S_TH_EXP +379 0x00C8 //TX_MINENOISE_TH +380 0xD508 //TX_MORENS_TFMASK_TH +381 0x0001 //TX_DRC_QUIET_FLOOR +382 0x3A98 //TX_RATIODTL_CUT_TH +383 0x0DAC //TX_DT_CUT_K1 384 0x6400 //TX_OUT_ENER_S_TH_CLEAN 385 0x6400 //TX_OUT_ENER_S_TH_LESSCLEAN 386 0x6400 //TX_OUT_ENER_S_TH_NOISY @@ -35479,22 +53799,22 @@ 388 0x7D00 //TX_OUT_ENER_TH_SPEECH 389 0x0000 //TX_SN_NPB_GAIN 390 0x0000 //TX_NN_NPB_GAIN -391 0x0000 //TX_CSX_ALPHA_0 -392 0x0000 //TX_CSX_ALPHA_1 -393 0x0000 //TX_CSX_ALPHA_2 -394 0x0000 //TX_CSX_ALPHA_3 -395 0x0000 //TX_MU_ARSP_EST -396 0x0000 //TX_P_OUTBEAM_MIN_TH +391 0x7FFF //TX_POST_MASK_SUP_HSNE +392 0x1388 //TX_TAIL_DET_TH +393 0x4000 //TX_B_LESSCUT_RTO_WTA +394 0x0000 //TX_MEL_G_R +395 0x0080 //TX_SUPHIGH_TH +396 0x0000 //TX_MASK_G_R 397 0x0000 //TX_EXTRA_NS_L -398 0x0000 //TX_EXTRA_NS_A -399 0x0000 //TX_VR_NOISE_FLOOR_TH +398 0x1800 //TX_C_POST_FLT_MASK +399 0x7FFF //TX_A_POST_FLT_WNS 400 0x0000 //TX_MIN_G_LOW300HZ 401 0x0010 //TX_MAXLEVEL_CNG 402 0x0000 //TX_STN_NOISE_TH 403 0x0000 //TX_POST_MASK_SUP 404 0x0000 //TX_POST_MASK_ADJUST 405 0x0014 //TX_NS_ENOISE_MIC0_TH -406 0x0014 //TX_MINENOISE_MIC0_TH +406 0x0032 //TX_MINENOISE_MIC0_TH 407 0x0226 //TX_MINENOISE_MIC0_S_TH 408 0x2879 //TX_MIN_G_CTRL_SSNS 409 0x0400 //TX_METAL_RTO_THR @@ -35602,16 +53922,16 @@ 511 0x6666 //TX_MIC_TO_BFGAIN 512 0x6666 //TX_MICTOBFGAIN0 513 0x0014 //TX_FASTMUE_TH -514 0x0000 //TX_DERVB_LEN_0 -515 0x0000 //TX_DERVB_LEN_1 -516 0x0000 //TX_RHO_DERVB -517 0x0000 //TX_MIC_INDX_DERVB -518 0x0000 //TX_MU_DERVB -519 0x0000 //TX_DR_RESRV_0 -520 0x0000 //TX_DR_RESRV_1 -521 0x0000 //TX_DR_RESRV_2 -522 0x0000 //TX_DR_RESRV_3 -523 0x0000 //TX_DR_RESRV_4 +514 0xC000 //TX_DEREVERB_LF_MU +515 0xC000 //TX_DEREVERB_HF_MU +516 0xCCCC //TX_DEREVERB_DELAY +517 0xD999 //TX_DEREVERB_COEF_LEN +518 0x1F40 //TX_DEREVERB_DNR +519 0x0000 //TX_DEREVERB_ALPHA +520 0x0000 //TX_DEREVERB_BETA +521 0x0000 //TX_GSC_RTOL_TH +522 0x7000 //TX_GSC_RTOH_TH +523 0x0064 //TX_WIDE2_MEANHTH 524 0x0000 //TX_DR_RESRV_5 525 0x0000 //TX_DR_RESRV_6 526 0x0000 //TX_DR_RESRV_7 @@ -35977,16 +54297,81 @@ 886 0x0000 //TX_FASTNS_TFMASKBIN_TH2 887 0x0000 //TX_FASTNS_TFMASKBIN_TH3 888 0x00C8 //TX_FASTNS_ARSPC_TH -889 0xD99A //TX_FASTNS_MASK5_TH +889 0xC000 //TX_FASTNS_MASK5_TH 890 0x051F //TX_POSTSSA_MIN_G_VR_MASK -891 0x7FFF //TX_A_LESSCUT_RTO_MASK +891 0x4000 //TX_A_LESSCUT_RTO_MASK 892 0x1770 //TX_FASTNS_NOISETH 893 0xC000 //TX_FASTNS_SSA_THLFL 894 0xC000 //TX_FASTNS_SSA_THHFL 895 0xCCCC //TX_FASTNS_SSA_THLFH 896 0xD999 //TX_FASTNS_SSA_THHFH +897 0x2339 //TX_SENDFUNC_REG_MICMUTE +898 0x0021 //TX_SENDFUNC_REG_MICMUTE1 +899 0x02BC //TX_MICMUTE_RATIO_THR +900 0x0140 //TX_MICMUTE_AMP_THR +901 0x0004 //TX_MICMUTE_HPF_IND +902 0x00C0 //TX_MICMUTE_LOG_EYR_TH +903 0x0008 //TX_MICMUTE_CVG_TIME +904 0x0008 //TX_MICMUTE_RELEASE_TIME +905 0x01FE //TX_MIC_VOLUME_MIC0MUTE +906 0x0020 //TX_MICMUTE_EPD_OFFSET_0 +907 0x001E //TX_MICMUTE_FRQ_AEC_L +908 0x7999 //TX_MICMUTE_EAD_THR +909 0x7FFF //TX_MICMUTE_LAMBDA_CB_NLE +910 0x7FFF //TX_MICMUTE_LAMBDA_RE_EST +911 0x4000 //TX_DTD_THR1_MICMUTE_0 +912 0x7000 //TX_DTD_THR1_MICMUTE_1 +913 0x7FFF //TX_DTD_THR1_MICMUTE_2 +914 0x7FFF //TX_DTD_THR1_MICMUTE_3 +915 0x6CCC //TX_DTD_THR2_MICMUTE_0 +916 0x0400 //TX_MICMUTE_MIN_EQ_RE_EST_0 +917 0x0400 //TX_MICMUTE_MIN_EQ_RE_EST_1 +918 0x1000 //TX_MICMUTE_MIN_EQ_RE_EST_2 +919 0x7FFF //TX_MICMUTE_MIN_EQ_RE_EST_3 +920 0x7FFF //TX_MICMUTE_MIN_EQ_RE_EST_4 +921 0x4000 //TX_MICMUTE_C_POST_FLT +922 0x03E8 //TX_MICMUTE_DT_CUT_K +923 0x0001 //TX_MICMUTE_DT_CUT_THR +924 0x03E8 //TX_MICMUTE_DT_CUT_K2 +925 0x0001 //TX_MICMUTE_DT_CUT_THR2 +926 0x0064 //TX_MICMUTE_DT2_HOLD_N +927 0x1000 //TX_MICMUTE_RATIODTH_THCUT +928 0x1000 //TX_MICMUTE_B_POST_FLT_ECHOL +929 0x7FFF //TX_MICMUTE_B_POST_FLT_ECHOH +930 0x0400 //TX_MICMUTE_C_POST_FLT_MASK +931 0x7999 //TX_MICMUTE_RATIODTL_CUT_TH +932 0x0258 //TX_MICMUTE_DT_CUT_K1 +933 0x0800 //TX_MICMUTE_N2_SN_EST +934 0xFC00 //TX_MICMUTE_THR_SN_EST_0 +935 0x001C //TX_MICMUTE_MIN_G_CTRL_0 +936 0x6000 //TX_MICMUTE_A_POST_FILT_S_0 +937 0x7000 //TX_MICMUTE_B_POST_FILT_0 +938 0x2710 //TX_MIC1RUB_AMP_THR +939 0x0010 //TX_MIC1MUTE_RATIO_THR +940 0x0450 //TX_MIC1MUTE_AMP_THR +941 0x0008 //TX_MIC1MUTE_CVG_TIME +942 0x0008 //TX_MIC1MUTE_RELEASE_TIME +943 0x0000 //TX_AMS_RESRV_01 +944 0x0000 //TX_AMS_RESRV_02 +945 0x0000 //TX_AMS_RESRV_03 +946 0x0000 //TX_AMS_RESRV_04 +947 0x0000 //TX_AMS_RESRV_05 +948 0x0000 //TX_AMS_RESRV_06 +949 0x0000 //TX_AMS_RESRV_07 +950 0x0000 //TX_AMS_RESRV_08 +951 0x0000 //TX_AMS_RESRV_09 +952 0x0000 //TX_AMS_RESRV_10 +953 0x0000 //TX_AMS_RESRV_11 +954 0x0000 //TX_AMS_RESRV_12 +955 0x0000 //TX_AMS_RESRV_13 +956 0x0000 //TX_AMS_RESRV_14 +957 0x0000 //TX_AMS_RESRV_15 +958 0x0000 //TX_AMS_RESRV_16 +959 0x0000 //TX_AMS_RESRV_17 +960 0x0000 //TX_AMS_RESRV_18 +961 0x0000 //TX_AMS_RESRV_19 #RX -0 0x027C //RX_RECVFUNC_MODE_0 +0 0x243C //RX_RECVFUNC_MODE_0 1 0x0000 //RX_RECVFUNC_MODE_1 2 0x0000 //RX_SAMPLINGFREQ_SIG 3 0x0000 //RX_SAMPLINGFREQ_PROC @@ -35996,8 +54381,8 @@ 7 0x1000 //RX_TDDRC_ALPHA_UP_2 8 0x1000 //RX_TDDRC_ALPHA_UP_3 9 0x1000 //RX_TDDRC_ALPHA_UP_4 -10 0x0800 //RX_PGA -11 0x7652 //RX_A_HP +10 0x0403 //RX_PGA +11 0x7646 //RX_A_HP 12 0x4000 //RX_B_PE 13 0x7800 //RX_THR_PITCH_DET_0 14 0x7000 //RX_THR_PITCH_DET_1 @@ -36026,12 +54411,12 @@ 37 0x4000 //RX_LMT_ALPHA 38 0x0014 //RX_FDEQ_SUBNUM 39 0x8080 //RX_FDEQ_GAIN_0 -40 0x8058 //RX_FDEQ_GAIN_1 -41 0x5454 //RX_FDEQ_GAIN_2 -42 0x545C //RX_FDEQ_GAIN_3 -43 0x6448 //RX_FDEQ_GAIN_4 +40 0x8054 //RX_FDEQ_GAIN_1 +41 0x5050 //RX_FDEQ_GAIN_2 +42 0x5058 //RX_FDEQ_GAIN_3 +43 0x5C70 //RX_FDEQ_GAIN_4 44 0x4848 //RX_FDEQ_GAIN_5 -45 0x5848 //RX_FDEQ_GAIN_6 +45 0x484C //RX_FDEQ_GAIN_6 46 0x4848 //RX_FDEQ_GAIN_7 47 0x485A //RX_FDEQ_GAIN_8 48 0x5A58 //RX_FDEQ_GAIN_9 @@ -36053,8 +54438,8 @@ 64 0x0203 //RX_FDEQ_BIN_1 65 0x0303 //RX_FDEQ_BIN_2 66 0x0304 //RX_FDEQ_BIN_3 -67 0x0405 //RX_FDEQ_BIN_4 -68 0x0506 //RX_FDEQ_BIN_5 +67 0x0604 //RX_FDEQ_BIN_4 +68 0x0406 //RX_FDEQ_BIN_5 69 0x0708 //RX_FDEQ_BIN_6 70 0x090A //RX_FDEQ_BIN_7 71 0x0B0C //RX_FDEQ_BIN_8 @@ -36110,12 +54495,12 @@ 121 0x199A //RX_TDDRC_HMNC_GAIN 122 0x0001 //RX_TDDRC_SMT_FLAG 123 0x0CCD //RX_TDDRC_SMT_W -124 0x0700 //RX_TDDRC_DRC_GAIN +124 0x0780 //RX_TDDRC_DRC_GAIN 125 0x7C00 //RX_LAMBDA_PKA_FP -126 0x2000 //RX_TPKA_FP -127 0x2000 //RX_MIN_G_FP -128 0x0080 //RX_MAX_G_FP -129 0x0016 //RX_SPK_VOL +126 0x1194 //RX_TPKA_FP +127 0x0400 //RX_MIN_G_FP +128 0x0800 //RX_MAX_G_FP +129 0x0015 //RX_SPK_VOL 130 0x0000 //RX_VOL_RESRV_0 131 0x0000 //RX_MAXLEVEL_CNG 132 0x3000 //RX_BWE_UV_TH @@ -36156,8 +54541,8 @@ 34 0x0800 //RX_TDDRC_LIMITER_GAIN 112 0x0002 //RX_TDDRC_THRD_0 113 0x0004 //RX_TDDRC_THRD_1 -114 0x1A00 //RX_TDDRC_THRD_2 -115 0x1A00 //RX_TDDRC_THRD_3 +114 0x1800 //RX_TDDRC_THRD_2 +115 0x1800 //RX_TDDRC_THRD_3 116 0x7FFF //RX_TDDRC_SLANT_0 117 0x7FFF //RX_TDDRC_SLANT_1 118 0x1000 //RX_TDDRC_ALPHA_UP_0 @@ -36166,18 +54551,18 @@ 121 0x199A //RX_TDDRC_HMNC_GAIN 122 0x0001 //RX_TDDRC_SMT_FLAG 123 0x0CCD //RX_TDDRC_SMT_W -124 0x0700 //RX_TDDRC_DRC_GAIN +124 0x0780 //RX_TDDRC_DRC_GAIN 38 0x0014 //RX_FDEQ_SUBNUM 39 0x8080 //RX_FDEQ_GAIN_0 -40 0x8058 //RX_FDEQ_GAIN_1 -41 0x5454 //RX_FDEQ_GAIN_2 -42 0x545C //RX_FDEQ_GAIN_3 -43 0x6448 //RX_FDEQ_GAIN_4 -44 0x4848 //RX_FDEQ_GAIN_5 -45 0x5848 //RX_FDEQ_GAIN_6 -46 0x4848 //RX_FDEQ_GAIN_7 -47 0x485A //RX_FDEQ_GAIN_8 -48 0x5A58 //RX_FDEQ_GAIN_9 +40 0x8050 //RX_FDEQ_GAIN_1 +41 0x4840 //RX_FDEQ_GAIN_2 +42 0x4040 //RX_FDEQ_GAIN_3 +43 0x4C68 //RX_FDEQ_GAIN_4 +44 0x403C //RX_FDEQ_GAIN_5 +45 0x3C38 //RX_FDEQ_GAIN_6 +46 0x3430 //RX_FDEQ_GAIN_7 +47 0x303C //RX_FDEQ_GAIN_8 +48 0x4C50 //RX_FDEQ_GAIN_9 49 0x4848 //RX_FDEQ_GAIN_10 50 0x4848 //RX_FDEQ_GAIN_11 51 0x4848 //RX_FDEQ_GAIN_12 @@ -36196,8 +54581,8 @@ 64 0x0203 //RX_FDEQ_BIN_1 65 0x0303 //RX_FDEQ_BIN_2 66 0x0304 //RX_FDEQ_BIN_3 -67 0x0405 //RX_FDEQ_BIN_4 -68 0x0506 //RX_FDEQ_BIN_5 +67 0x0703 //RX_FDEQ_BIN_4 +68 0x0406 //RX_FDEQ_BIN_5 69 0x0708 //RX_FDEQ_BIN_6 70 0x090A //RX_FDEQ_BIN_7 71 0x0B0C //RX_FDEQ_BIN_8 @@ -36240,7 +54625,7 @@ 108 0x7FFF //RX_FDDRC_SLANT_1_2 109 0x7FFF //RX_FDDRC_SLANT_1_3 110 0x0000 //RX_FDDRC_RESRV_0 -129 0x0016 //RX_SPK_VOL +129 0x0012 //RX_SPK_VOL 130 0x0000 //RX_VOL_RESRV_0 #VOL 1 6 0x1000 //RX_TDDRC_ALPHA_UP_1 @@ -36255,8 +54640,8 @@ 34 0x0800 //RX_TDDRC_LIMITER_GAIN 112 0x0002 //RX_TDDRC_THRD_0 113 0x0004 //RX_TDDRC_THRD_1 -114 0x1A00 //RX_TDDRC_THRD_2 -115 0x1A00 //RX_TDDRC_THRD_3 +114 0x1800 //RX_TDDRC_THRD_2 +115 0x1800 //RX_TDDRC_THRD_3 116 0x7FFF //RX_TDDRC_SLANT_0 117 0x7FFF //RX_TDDRC_SLANT_1 118 0x1000 //RX_TDDRC_ALPHA_UP_0 @@ -36265,18 +54650,18 @@ 121 0x199A //RX_TDDRC_HMNC_GAIN 122 0x0001 //RX_TDDRC_SMT_FLAG 123 0x0CCD //RX_TDDRC_SMT_W -124 0x0700 //RX_TDDRC_DRC_GAIN +124 0x0780 //RX_TDDRC_DRC_GAIN 38 0x0014 //RX_FDEQ_SUBNUM 39 0x8080 //RX_FDEQ_GAIN_0 -40 0x8058 //RX_FDEQ_GAIN_1 -41 0x5454 //RX_FDEQ_GAIN_2 -42 0x545C //RX_FDEQ_GAIN_3 -43 0x6448 //RX_FDEQ_GAIN_4 -44 0x4848 //RX_FDEQ_GAIN_5 -45 0x5848 //RX_FDEQ_GAIN_6 -46 0x4848 //RX_FDEQ_GAIN_7 -47 0x485A //RX_FDEQ_GAIN_8 -48 0x5A58 //RX_FDEQ_GAIN_9 +40 0x8050 //RX_FDEQ_GAIN_1 +41 0x4840 //RX_FDEQ_GAIN_2 +42 0x4040 //RX_FDEQ_GAIN_3 +43 0x4C68 //RX_FDEQ_GAIN_4 +44 0x403C //RX_FDEQ_GAIN_5 +45 0x3C38 //RX_FDEQ_GAIN_6 +46 0x3430 //RX_FDEQ_GAIN_7 +47 0x303C //RX_FDEQ_GAIN_8 +48 0x4C50 //RX_FDEQ_GAIN_9 49 0x4848 //RX_FDEQ_GAIN_10 50 0x4848 //RX_FDEQ_GAIN_11 51 0x4848 //RX_FDEQ_GAIN_12 @@ -36295,8 +54680,8 @@ 64 0x0203 //RX_FDEQ_BIN_1 65 0x0303 //RX_FDEQ_BIN_2 66 0x0304 //RX_FDEQ_BIN_3 -67 0x0405 //RX_FDEQ_BIN_4 -68 0x0506 //RX_FDEQ_BIN_5 +67 0x0703 //RX_FDEQ_BIN_4 +68 0x0406 //RX_FDEQ_BIN_5 69 0x0708 //RX_FDEQ_BIN_6 70 0x090A //RX_FDEQ_BIN_7 71 0x0B0C //RX_FDEQ_BIN_8 @@ -36339,7 +54724,7 @@ 108 0x7FFF //RX_FDDRC_SLANT_1_2 109 0x7FFF //RX_FDDRC_SLANT_1_3 110 0x0000 //RX_FDDRC_RESRV_0 -129 0x0020 //RX_SPK_VOL +129 0x001B //RX_SPK_VOL 130 0x0000 //RX_VOL_RESRV_0 #VOL 2 6 0x1000 //RX_TDDRC_ALPHA_UP_1 @@ -36354,8 +54739,8 @@ 34 0x0800 //RX_TDDRC_LIMITER_GAIN 112 0x0002 //RX_TDDRC_THRD_0 113 0x0004 //RX_TDDRC_THRD_1 -114 0x1A00 //RX_TDDRC_THRD_2 -115 0x1A00 //RX_TDDRC_THRD_3 +114 0x1800 //RX_TDDRC_THRD_2 +115 0x1800 //RX_TDDRC_THRD_3 116 0x7FFF //RX_TDDRC_SLANT_0 117 0x7FFF //RX_TDDRC_SLANT_1 118 0x1000 //RX_TDDRC_ALPHA_UP_0 @@ -36364,18 +54749,18 @@ 121 0x199A //RX_TDDRC_HMNC_GAIN 122 0x0001 //RX_TDDRC_SMT_FLAG 123 0x0CCD //RX_TDDRC_SMT_W -124 0x0700 //RX_TDDRC_DRC_GAIN +124 0x0780 //RX_TDDRC_DRC_GAIN 38 0x0014 //RX_FDEQ_SUBNUM 39 0x8080 //RX_FDEQ_GAIN_0 -40 0x8058 //RX_FDEQ_GAIN_1 -41 0x5454 //RX_FDEQ_GAIN_2 -42 0x545C //RX_FDEQ_GAIN_3 -43 0x6448 //RX_FDEQ_GAIN_4 -44 0x4848 //RX_FDEQ_GAIN_5 -45 0x5848 //RX_FDEQ_GAIN_6 -46 0x4848 //RX_FDEQ_GAIN_7 -47 0x485A //RX_FDEQ_GAIN_8 -48 0x5A58 //RX_FDEQ_GAIN_9 +40 0x8050 //RX_FDEQ_GAIN_1 +41 0x4840 //RX_FDEQ_GAIN_2 +42 0x4040 //RX_FDEQ_GAIN_3 +43 0x4C68 //RX_FDEQ_GAIN_4 +44 0x403C //RX_FDEQ_GAIN_5 +45 0x3C38 //RX_FDEQ_GAIN_6 +46 0x3430 //RX_FDEQ_GAIN_7 +47 0x303C //RX_FDEQ_GAIN_8 +48 0x4C50 //RX_FDEQ_GAIN_9 49 0x4848 //RX_FDEQ_GAIN_10 50 0x4848 //RX_FDEQ_GAIN_11 51 0x4848 //RX_FDEQ_GAIN_12 @@ -36394,8 +54779,8 @@ 64 0x0203 //RX_FDEQ_BIN_1 65 0x0303 //RX_FDEQ_BIN_2 66 0x0304 //RX_FDEQ_BIN_3 -67 0x0405 //RX_FDEQ_BIN_4 -68 0x0506 //RX_FDEQ_BIN_5 +67 0x0703 //RX_FDEQ_BIN_4 +68 0x0406 //RX_FDEQ_BIN_5 69 0x0708 //RX_FDEQ_BIN_6 70 0x090A //RX_FDEQ_BIN_7 71 0x0B0C //RX_FDEQ_BIN_8 @@ -36438,7 +54823,7 @@ 108 0x7FFF //RX_FDDRC_SLANT_1_2 109 0x7FFF //RX_FDDRC_SLANT_1_3 110 0x0000 //RX_FDDRC_RESRV_0 -129 0x002E //RX_SPK_VOL +129 0x0026 //RX_SPK_VOL 130 0x0000 //RX_VOL_RESRV_0 #VOL 3 6 0x1000 //RX_TDDRC_ALPHA_UP_1 @@ -36453,8 +54838,8 @@ 34 0x0800 //RX_TDDRC_LIMITER_GAIN 112 0x0002 //RX_TDDRC_THRD_0 113 0x0004 //RX_TDDRC_THRD_1 -114 0x1A00 //RX_TDDRC_THRD_2 -115 0x1A00 //RX_TDDRC_THRD_3 +114 0x1800 //RX_TDDRC_THRD_2 +115 0x1800 //RX_TDDRC_THRD_3 116 0x7FFF //RX_TDDRC_SLANT_0 117 0x7FFF //RX_TDDRC_SLANT_1 118 0x1000 //RX_TDDRC_ALPHA_UP_0 @@ -36463,18 +54848,18 @@ 121 0x199A //RX_TDDRC_HMNC_GAIN 122 0x0001 //RX_TDDRC_SMT_FLAG 123 0x0CCD //RX_TDDRC_SMT_W -124 0x0700 //RX_TDDRC_DRC_GAIN +124 0x0780 //RX_TDDRC_DRC_GAIN 38 0x0014 //RX_FDEQ_SUBNUM 39 0x8080 //RX_FDEQ_GAIN_0 -40 0x8058 //RX_FDEQ_GAIN_1 -41 0x5454 //RX_FDEQ_GAIN_2 -42 0x545C //RX_FDEQ_GAIN_3 -43 0x6448 //RX_FDEQ_GAIN_4 -44 0x4848 //RX_FDEQ_GAIN_5 -45 0x5848 //RX_FDEQ_GAIN_6 -46 0x4848 //RX_FDEQ_GAIN_7 -47 0x485A //RX_FDEQ_GAIN_8 -48 0x5A58 //RX_FDEQ_GAIN_9 +40 0x8050 //RX_FDEQ_GAIN_1 +41 0x4840 //RX_FDEQ_GAIN_2 +42 0x4040 //RX_FDEQ_GAIN_3 +43 0x4C68 //RX_FDEQ_GAIN_4 +44 0x403C //RX_FDEQ_GAIN_5 +45 0x3C38 //RX_FDEQ_GAIN_6 +46 0x3430 //RX_FDEQ_GAIN_7 +47 0x303C //RX_FDEQ_GAIN_8 +48 0x4C50 //RX_FDEQ_GAIN_9 49 0x4848 //RX_FDEQ_GAIN_10 50 0x4848 //RX_FDEQ_GAIN_11 51 0x4848 //RX_FDEQ_GAIN_12 @@ -36493,8 +54878,8 @@ 64 0x0203 //RX_FDEQ_BIN_1 65 0x0303 //RX_FDEQ_BIN_2 66 0x0304 //RX_FDEQ_BIN_3 -67 0x0405 //RX_FDEQ_BIN_4 -68 0x0506 //RX_FDEQ_BIN_5 +67 0x0703 //RX_FDEQ_BIN_4 +68 0x0406 //RX_FDEQ_BIN_5 69 0x0708 //RX_FDEQ_BIN_6 70 0x090A //RX_FDEQ_BIN_7 71 0x0B0C //RX_FDEQ_BIN_8 @@ -36537,7 +54922,7 @@ 108 0x7FFF //RX_FDDRC_SLANT_1_2 109 0x7FFF //RX_FDDRC_SLANT_1_3 110 0x0000 //RX_FDDRC_RESRV_0 -129 0x0041 //RX_SPK_VOL +129 0x0037 //RX_SPK_VOL 130 0x0000 //RX_VOL_RESRV_0 #VOL 4 6 0x1000 //RX_TDDRC_ALPHA_UP_1 @@ -36552,8 +54937,8 @@ 34 0x0800 //RX_TDDRC_LIMITER_GAIN 112 0x0002 //RX_TDDRC_THRD_0 113 0x0004 //RX_TDDRC_THRD_1 -114 0x1A00 //RX_TDDRC_THRD_2 -115 0x1A00 //RX_TDDRC_THRD_3 +114 0x1800 //RX_TDDRC_THRD_2 +115 0x1800 //RX_TDDRC_THRD_3 116 0x7FFF //RX_TDDRC_SLANT_0 117 0x7FFF //RX_TDDRC_SLANT_1 118 0x1000 //RX_TDDRC_ALPHA_UP_0 @@ -36562,18 +54947,18 @@ 121 0x199A //RX_TDDRC_HMNC_GAIN 122 0x0001 //RX_TDDRC_SMT_FLAG 123 0x0CCD //RX_TDDRC_SMT_W -124 0x0700 //RX_TDDRC_DRC_GAIN +124 0x0D56 //RX_TDDRC_DRC_GAIN 38 0x0014 //RX_FDEQ_SUBNUM 39 0x8080 //RX_FDEQ_GAIN_0 -40 0x8058 //RX_FDEQ_GAIN_1 -41 0x5454 //RX_FDEQ_GAIN_2 -42 0x545C //RX_FDEQ_GAIN_3 -43 0x6448 //RX_FDEQ_GAIN_4 -44 0x4848 //RX_FDEQ_GAIN_5 -45 0x5848 //RX_FDEQ_GAIN_6 -46 0x4848 //RX_FDEQ_GAIN_7 -47 0x485A //RX_FDEQ_GAIN_8 -48 0x5A58 //RX_FDEQ_GAIN_9 +40 0x8050 //RX_FDEQ_GAIN_1 +41 0x4840 //RX_FDEQ_GAIN_2 +42 0x4040 //RX_FDEQ_GAIN_3 +43 0x4470 //RX_FDEQ_GAIN_4 +44 0x383C //RX_FDEQ_GAIN_5 +45 0x3C3C //RX_FDEQ_GAIN_6 +46 0x3434 //RX_FDEQ_GAIN_7 +47 0x344C //RX_FDEQ_GAIN_8 +48 0x585C //RX_FDEQ_GAIN_9 49 0x4848 //RX_FDEQ_GAIN_10 50 0x4848 //RX_FDEQ_GAIN_11 51 0x4848 //RX_FDEQ_GAIN_12 @@ -36592,8 +54977,8 @@ 64 0x0203 //RX_FDEQ_BIN_1 65 0x0303 //RX_FDEQ_BIN_2 66 0x0304 //RX_FDEQ_BIN_3 -67 0x0405 //RX_FDEQ_BIN_4 -68 0x0506 //RX_FDEQ_BIN_5 +67 0x0703 //RX_FDEQ_BIN_4 +68 0x0406 //RX_FDEQ_BIN_5 69 0x0708 //RX_FDEQ_BIN_6 70 0x090A //RX_FDEQ_BIN_7 71 0x0B0C //RX_FDEQ_BIN_8 @@ -36636,7 +55021,7 @@ 108 0x7FFF //RX_FDDRC_SLANT_1_2 109 0x7FFF //RX_FDDRC_SLANT_1_3 110 0x0000 //RX_FDDRC_RESRV_0 -129 0x005C //RX_SPK_VOL +129 0x002C //RX_SPK_VOL 130 0x0000 //RX_VOL_RESRV_0 #VOL 5 6 0x1000 //RX_TDDRC_ALPHA_UP_1 @@ -36651,8 +55036,8 @@ 34 0x0800 //RX_TDDRC_LIMITER_GAIN 112 0x0002 //RX_TDDRC_THRD_0 113 0x0004 //RX_TDDRC_THRD_1 -114 0x1A00 //RX_TDDRC_THRD_2 -115 0x1A00 //RX_TDDRC_THRD_3 +114 0x1800 //RX_TDDRC_THRD_2 +115 0x1800 //RX_TDDRC_THRD_3 116 0x7FFF //RX_TDDRC_SLANT_0 117 0x7FFF //RX_TDDRC_SLANT_1 118 0x1000 //RX_TDDRC_ALPHA_UP_0 @@ -36661,18 +55046,18 @@ 121 0x199A //RX_TDDRC_HMNC_GAIN 122 0x0001 //RX_TDDRC_SMT_FLAG 123 0x0CCD //RX_TDDRC_SMT_W -124 0x0700 //RX_TDDRC_DRC_GAIN +124 0x0D56 //RX_TDDRC_DRC_GAIN 38 0x0014 //RX_FDEQ_SUBNUM 39 0x8080 //RX_FDEQ_GAIN_0 -40 0x8058 //RX_FDEQ_GAIN_1 -41 0x5454 //RX_FDEQ_GAIN_2 -42 0x545C //RX_FDEQ_GAIN_3 -43 0x6448 //RX_FDEQ_GAIN_4 -44 0x4848 //RX_FDEQ_GAIN_5 -45 0x5848 //RX_FDEQ_GAIN_6 -46 0x4848 //RX_FDEQ_GAIN_7 -47 0x485A //RX_FDEQ_GAIN_8 -48 0x5A58 //RX_FDEQ_GAIN_9 +40 0x8050 //RX_FDEQ_GAIN_1 +41 0x4840 //RX_FDEQ_GAIN_2 +42 0x4040 //RX_FDEQ_GAIN_3 +43 0x4470 //RX_FDEQ_GAIN_4 +44 0x383C //RX_FDEQ_GAIN_5 +45 0x3C3C //RX_FDEQ_GAIN_6 +46 0x3434 //RX_FDEQ_GAIN_7 +47 0x344C //RX_FDEQ_GAIN_8 +48 0x585C //RX_FDEQ_GAIN_9 49 0x4848 //RX_FDEQ_GAIN_10 50 0x4848 //RX_FDEQ_GAIN_11 51 0x4848 //RX_FDEQ_GAIN_12 @@ -36691,8 +55076,8 @@ 64 0x0203 //RX_FDEQ_BIN_1 65 0x0303 //RX_FDEQ_BIN_2 66 0x0304 //RX_FDEQ_BIN_3 -67 0x0405 //RX_FDEQ_BIN_4 -68 0x0506 //RX_FDEQ_BIN_5 +67 0x0703 //RX_FDEQ_BIN_4 +68 0x0406 //RX_FDEQ_BIN_5 69 0x0708 //RX_FDEQ_BIN_6 70 0x090A //RX_FDEQ_BIN_7 71 0x0B0C //RX_FDEQ_BIN_8 @@ -36735,7 +55120,7 @@ 108 0x7FFF //RX_FDDRC_SLANT_1_2 109 0x7FFF //RX_FDDRC_SLANT_1_3 110 0x0000 //RX_FDDRC_RESRV_0 -129 0x008A //RX_SPK_VOL +129 0x0051 //RX_SPK_VOL 130 0x0000 //RX_VOL_RESRV_0 #VOL 6 6 0x1000 //RX_TDDRC_ALPHA_UP_1 @@ -36750,8 +55135,8 @@ 34 0x0800 //RX_TDDRC_LIMITER_GAIN 112 0x0002 //RX_TDDRC_THRD_0 113 0x0004 //RX_TDDRC_THRD_1 -114 0x1A00 //RX_TDDRC_THRD_2 -115 0x1A00 //RX_TDDRC_THRD_3 +114 0x1800 //RX_TDDRC_THRD_2 +115 0x1800 //RX_TDDRC_THRD_3 116 0x7FFF //RX_TDDRC_SLANT_0 117 0x7FFF //RX_TDDRC_SLANT_1 118 0x1000 //RX_TDDRC_ALPHA_UP_0 @@ -36760,18 +55145,18 @@ 121 0x199A //RX_TDDRC_HMNC_GAIN 122 0x0001 //RX_TDDRC_SMT_FLAG 123 0x0CCD //RX_TDDRC_SMT_W -124 0x0700 //RX_TDDRC_DRC_GAIN +124 0x0D56 //RX_TDDRC_DRC_GAIN 38 0x0014 //RX_FDEQ_SUBNUM 39 0x8080 //RX_FDEQ_GAIN_0 -40 0x8058 //RX_FDEQ_GAIN_1 -41 0x5454 //RX_FDEQ_GAIN_2 -42 0x545C //RX_FDEQ_GAIN_3 -43 0x6448 //RX_FDEQ_GAIN_4 -44 0x4848 //RX_FDEQ_GAIN_5 -45 0x5848 //RX_FDEQ_GAIN_6 -46 0x4848 //RX_FDEQ_GAIN_7 -47 0x485A //RX_FDEQ_GAIN_8 -48 0x5A58 //RX_FDEQ_GAIN_9 +40 0x8050 //RX_FDEQ_GAIN_1 +41 0x4840 //RX_FDEQ_GAIN_2 +42 0x4040 //RX_FDEQ_GAIN_3 +43 0x4470 //RX_FDEQ_GAIN_4 +44 0x383C //RX_FDEQ_GAIN_5 +45 0x3C3C //RX_FDEQ_GAIN_6 +46 0x3434 //RX_FDEQ_GAIN_7 +47 0x344C //RX_FDEQ_GAIN_8 +48 0x585C //RX_FDEQ_GAIN_9 49 0x4848 //RX_FDEQ_GAIN_10 50 0x4848 //RX_FDEQ_GAIN_11 51 0x4848 //RX_FDEQ_GAIN_12 @@ -36790,8 +55175,8 @@ 64 0x0203 //RX_FDEQ_BIN_1 65 0x0303 //RX_FDEQ_BIN_2 66 0x0304 //RX_FDEQ_BIN_3 -67 0x0405 //RX_FDEQ_BIN_4 -68 0x0506 //RX_FDEQ_BIN_5 +67 0x0703 //RX_FDEQ_BIN_4 +68 0x0406 //RX_FDEQ_BIN_5 69 0x0708 //RX_FDEQ_BIN_6 70 0x090A //RX_FDEQ_BIN_7 71 0x0B0C //RX_FDEQ_BIN_8 @@ -36836,11 +55221,862 @@ 110 0x0000 //RX_FDDRC_RESRV_0 129 0x0100 //RX_SPK_VOL 130 0x0000 //RX_VOL_RESRV_0 +#RX 2 +157 0x243C //RX_RECVFUNC_MODE_0 +158 0x0000 //RX_RECVFUNC_MODE_1 +159 0x0000 //RX_SAMPLINGFREQ_SIG +160 0x0000 //RX_SAMPLINGFREQ_PROC +161 0x000A //RX_FRAME_SZ +162 0x0000 //RX_DELAY_OPT +163 0x1000 //RX_TDDRC_ALPHA_UP_1 +164 0x1000 //RX_TDDRC_ALPHA_UP_2 +165 0x1000 //RX_TDDRC_ALPHA_UP_3 +166 0x1000 //RX_TDDRC_ALPHA_UP_4 +167 0x0403 //RX_PGA +168 0x7646 //RX_A_HP +169 0x4000 //RX_B_PE +170 0x7800 //RX_THR_PITCH_DET_0 +171 0x7000 //RX_THR_PITCH_DET_1 +172 0x6000 //RX_THR_PITCH_DET_2 +173 0x0008 //RX_PITCH_BFR_LEN +174 0x0003 //RX_SBD_PITCH_DET +175 0x0100 //RX_PP_RESRV_0 +176 0x0020 //RX_PP_RESRV_1 +177 0x0400 //RX_N_SN_EST +178 0x000C //RX_N2_SN_EST +179 0x0010 //RX_NS_LVL_CTRL +180 0xF800 //RX_THR_SN_EST +181 0x7E00 //RX_LAMBDA_PFILT +182 0x000A //RX_FENS_RESRV_0 +183 0x0190 //RX_FENS_RESRV_1 +184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +185 0x4000 //RX_TDDRC_ALPHA_DWN_2 +186 0x4000 //RX_TDDRC_ALPHA_DWN_3 +187 0x0002 //RX_EXTRA_NS_L +188 0x0800 //RX_EXTRA_NS_A +189 0x4000 //RX_TDDRC_ALPHA_DWN_4 +190 0x7214 //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +192 0x199A //RX_A_POST_FLT +193 0x0000 //RX_LMT_THRD +194 0x4000 //RX_LMT_ALPHA +195 0x0014 //RX_FDEQ_SUBNUM +196 0x8080 //RX_FDEQ_GAIN_0 +197 0x8054 //RX_FDEQ_GAIN_1 +198 0x5050 //RX_FDEQ_GAIN_2 +199 0x5058 //RX_FDEQ_GAIN_3 +200 0x5C70 //RX_FDEQ_GAIN_4 +201 0x4848 //RX_FDEQ_GAIN_5 +202 0x484C //RX_FDEQ_GAIN_6 +203 0x4848 //RX_FDEQ_GAIN_7 +204 0x485A //RX_FDEQ_GAIN_8 +205 0x5A58 //RX_FDEQ_GAIN_9 +206 0x4848 //RX_FDEQ_GAIN_10 +207 0x4848 //RX_FDEQ_GAIN_11 +208 0x4848 //RX_FDEQ_GAIN_12 +209 0x4848 //RX_FDEQ_GAIN_13 +210 0x4848 //RX_FDEQ_GAIN_14 +211 0x4848 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0202 //RX_FDEQ_BIN_0 +221 0x0203 //RX_FDEQ_BIN_1 +222 0x0303 //RX_FDEQ_BIN_2 +223 0x0304 //RX_FDEQ_BIN_3 +224 0x0604 //RX_FDEQ_BIN_4 +225 0x0406 //RX_FDEQ_BIN_5 +226 0x0708 //RX_FDEQ_BIN_6 +227 0x090A //RX_FDEQ_BIN_7 +228 0x0B0C //RX_FDEQ_BIN_8 +229 0x0D08 //RX_FDEQ_BIN_9 +230 0x0000 //RX_FDEQ_BIN_10 +231 0x0000 //RX_FDEQ_BIN_11 +232 0x0000 //RX_FDEQ_BIN_12 +233 0x0000 //RX_FDEQ_BIN_13 +234 0x0000 //RX_FDEQ_BIN_14 +235 0x0000 //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x4000 //RX_FDEQ_RESRV_0 +245 0x0320 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0035 //RX_FDDRC_BAND_MARGIN_1 +248 0x0060 //RX_FDDRC_BAND_MARGIN_2 +249 0x0080 //RX_FDDRC_BAND_MARGIN_3 +250 0x0004 //RX_FDDRC_BLOCK_EXP +251 0x0600 //RX_FDDRC_THRD_2_0 +252 0x0600 //RX_FDDRC_THRD_2_1 +253 0x0600 //RX_FDDRC_THRD_2_2 +254 0x0600 //RX_FDDRC_THRD_2_3 +255 0x0800 //RX_FDDRC_THRD_3_0 +256 0x0800 //RX_FDDRC_THRD_3_1 +257 0x0800 //RX_FDDRC_THRD_3_2 +258 0x0800 //RX_FDDRC_THRD_3_3 +259 0x0000 //RX_FDDRC_SLANT_0_0 +260 0x0000 //RX_FDDRC_SLANT_0_1 +261 0x0000 //RX_FDDRC_SLANT_0_2 +262 0x0000 //RX_FDDRC_SLANT_0_3 +263 0x7FFF //RX_FDDRC_SLANT_1_0 +264 0x7FFF //RX_FDDRC_SLANT_1_1 +265 0x7FFF //RX_FDDRC_SLANT_1_2 +266 0x7FFF //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +268 0x0005 //RX_FILTINDX +269 0x0002 //RX_TDDRC_THRD_0 +270 0x0004 //RX_TDDRC_THRD_1 +271 0x1A00 //RX_TDDRC_THRD_2 +272 0x1A00 //RX_TDDRC_THRD_3 +273 0x7FFF //RX_TDDRC_SLANT_0 +274 0x7FFF //RX_TDDRC_SLANT_1 +275 0x1000 //RX_TDDRC_ALPHA_UP_0 +276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x199A //RX_TDDRC_HMNC_GAIN +279 0x0001 //RX_TDDRC_SMT_FLAG +280 0x0CCD //RX_TDDRC_SMT_W +281 0x0780 //RX_TDDRC_DRC_GAIN +282 0x7C00 //RX_LAMBDA_PKA_FP +283 0x1194 //RX_TPKA_FP +284 0x0400 //RX_MIN_G_FP +285 0x0800 //RX_MAX_G_FP +286 0x0015 //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 +288 0x0000 //RX_MAXLEVEL_CNG +289 0x3000 //RX_BWE_UV_TH +290 0x3000 //RX_BWE_UV_TH2 +291 0x1800 //RX_BWE_UV_TH3 +292 0x1000 //RX_BWE_V_TH +293 0x04CD //RX_BWE_GAIN1_V_TH1 +294 0x0F33 //RX_BWE_GAIN1_V_TH2 +295 0x7333 //RX_BWE_UV_EQ +296 0x199A //RX_BWE_V_EQ +297 0x7333 //RX_BWE_TONE_TH +298 0x0004 //RX_BWE_UV_HOLD_T +299 0x6CCD //RX_BWE_GAIN2_ALPHA +300 0x799A //RX_BWE_GAIN3_ALPHA +301 0x001E //RX_BWE_CUTOFF +302 0x3000 //RX_BWE_GAINFILL +303 0x3200 //RX_BWE_MAXTH_TONE +304 0x2000 //RX_BWE_EQ_0 +305 0x2000 //RX_BWE_EQ_1 +306 0x2000 //RX_BWE_EQ_2 +307 0x2000 //RX_BWE_EQ_3 +308 0x2000 //RX_BWE_EQ_4 +309 0x2000 //RX_BWE_EQ_5 +310 0x2000 //RX_BWE_EQ_6 +311 0x0000 //RX_BWE_RESRV_0 +312 0x0000 //RX_BWE_RESRV_1 +313 0x0000 //RX_BWE_RESRV_2 +#VOL 0 +163 0x1000 //RX_TDDRC_ALPHA_UP_1 +164 0x1000 //RX_TDDRC_ALPHA_UP_2 +165 0x1000 //RX_TDDRC_ALPHA_UP_3 +166 0x1000 //RX_TDDRC_ALPHA_UP_4 +184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +185 0x4000 //RX_TDDRC_ALPHA_DWN_2 +186 0x4000 //RX_TDDRC_ALPHA_DWN_3 +189 0x4000 //RX_TDDRC_ALPHA_DWN_4 +190 0x7214 //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +269 0x0002 //RX_TDDRC_THRD_0 +270 0x0004 //RX_TDDRC_THRD_1 +271 0x1800 //RX_TDDRC_THRD_2 +272 0x1800 //RX_TDDRC_THRD_3 +273 0x7FFF //RX_TDDRC_SLANT_0 +274 0x7FFF //RX_TDDRC_SLANT_1 +275 0x1000 //RX_TDDRC_ALPHA_UP_0 +276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x199A //RX_TDDRC_HMNC_GAIN +279 0x0001 //RX_TDDRC_SMT_FLAG +280 0x0CCD //RX_TDDRC_SMT_W +281 0x0780 //RX_TDDRC_DRC_GAIN +195 0x0014 //RX_FDEQ_SUBNUM +196 0x8080 //RX_FDEQ_GAIN_0 +197 0x8050 //RX_FDEQ_GAIN_1 +198 0x4840 //RX_FDEQ_GAIN_2 +199 0x4040 //RX_FDEQ_GAIN_3 +200 0x4C68 //RX_FDEQ_GAIN_4 +201 0x403C //RX_FDEQ_GAIN_5 +202 0x3C38 //RX_FDEQ_GAIN_6 +203 0x3430 //RX_FDEQ_GAIN_7 +204 0x303C //RX_FDEQ_GAIN_8 +205 0x4C50 //RX_FDEQ_GAIN_9 +206 0x4848 //RX_FDEQ_GAIN_10 +207 0x4848 //RX_FDEQ_GAIN_11 +208 0x4848 //RX_FDEQ_GAIN_12 +209 0x4848 //RX_FDEQ_GAIN_13 +210 0x4848 //RX_FDEQ_GAIN_14 +211 0x4848 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0202 //RX_FDEQ_BIN_0 +221 0x0203 //RX_FDEQ_BIN_1 +222 0x0303 //RX_FDEQ_BIN_2 +223 0x0304 //RX_FDEQ_BIN_3 +224 0x0703 //RX_FDEQ_BIN_4 +225 0x0406 //RX_FDEQ_BIN_5 +226 0x0708 //RX_FDEQ_BIN_6 +227 0x090A //RX_FDEQ_BIN_7 +228 0x0B0C //RX_FDEQ_BIN_8 +229 0x0D08 //RX_FDEQ_BIN_9 +230 0x0000 //RX_FDEQ_BIN_10 +231 0x0000 //RX_FDEQ_BIN_11 +232 0x0000 //RX_FDEQ_BIN_12 +233 0x0000 //RX_FDEQ_BIN_13 +234 0x0000 //RX_FDEQ_BIN_14 +235 0x0000 //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x4000 //RX_FDEQ_RESRV_0 +245 0x0320 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0035 //RX_FDDRC_BAND_MARGIN_1 +248 0x0060 //RX_FDDRC_BAND_MARGIN_2 +249 0x0080 //RX_FDDRC_BAND_MARGIN_3 +250 0x0004 //RX_FDDRC_BLOCK_EXP +251 0x0600 //RX_FDDRC_THRD_2_0 +252 0x0600 //RX_FDDRC_THRD_2_1 +253 0x0600 //RX_FDDRC_THRD_2_2 +254 0x0600 //RX_FDDRC_THRD_2_3 +255 0x0800 //RX_FDDRC_THRD_3_0 +256 0x0800 //RX_FDDRC_THRD_3_1 +257 0x0800 //RX_FDDRC_THRD_3_2 +258 0x0800 //RX_FDDRC_THRD_3_3 +259 0x0000 //RX_FDDRC_SLANT_0_0 +260 0x0000 //RX_FDDRC_SLANT_0_1 +261 0x0000 //RX_FDDRC_SLANT_0_2 +262 0x0000 //RX_FDDRC_SLANT_0_3 +263 0x7FFF //RX_FDDRC_SLANT_1_0 +264 0x7FFF //RX_FDDRC_SLANT_1_1 +265 0x7FFF //RX_FDDRC_SLANT_1_2 +266 0x7FFF //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +286 0x0012 //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 +#VOL 1 +163 0x1000 //RX_TDDRC_ALPHA_UP_1 +164 0x1000 //RX_TDDRC_ALPHA_UP_2 +165 0x1000 //RX_TDDRC_ALPHA_UP_3 +166 0x1000 //RX_TDDRC_ALPHA_UP_4 +184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +185 0x4000 //RX_TDDRC_ALPHA_DWN_2 +186 0x4000 //RX_TDDRC_ALPHA_DWN_3 +189 0x4000 //RX_TDDRC_ALPHA_DWN_4 +190 0x7214 //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +269 0x0002 //RX_TDDRC_THRD_0 +270 0x0004 //RX_TDDRC_THRD_1 +271 0x1800 //RX_TDDRC_THRD_2 +272 0x1800 //RX_TDDRC_THRD_3 +273 0x7FFF //RX_TDDRC_SLANT_0 +274 0x7FFF //RX_TDDRC_SLANT_1 +275 0x1000 //RX_TDDRC_ALPHA_UP_0 +276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x199A //RX_TDDRC_HMNC_GAIN +279 0x0001 //RX_TDDRC_SMT_FLAG +280 0x0CCD //RX_TDDRC_SMT_W +281 0x0780 //RX_TDDRC_DRC_GAIN +195 0x0014 //RX_FDEQ_SUBNUM +196 0x8080 //RX_FDEQ_GAIN_0 +197 0x8050 //RX_FDEQ_GAIN_1 +198 0x4840 //RX_FDEQ_GAIN_2 +199 0x4040 //RX_FDEQ_GAIN_3 +200 0x4C68 //RX_FDEQ_GAIN_4 +201 0x403C //RX_FDEQ_GAIN_5 +202 0x3C38 //RX_FDEQ_GAIN_6 +203 0x3430 //RX_FDEQ_GAIN_7 +204 0x303C //RX_FDEQ_GAIN_8 +205 0x4C50 //RX_FDEQ_GAIN_9 +206 0x4848 //RX_FDEQ_GAIN_10 +207 0x4848 //RX_FDEQ_GAIN_11 +208 0x4848 //RX_FDEQ_GAIN_12 +209 0x4848 //RX_FDEQ_GAIN_13 +210 0x4848 //RX_FDEQ_GAIN_14 +211 0x4848 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0202 //RX_FDEQ_BIN_0 +221 0x0203 //RX_FDEQ_BIN_1 +222 0x0303 //RX_FDEQ_BIN_2 +223 0x0304 //RX_FDEQ_BIN_3 +224 0x0703 //RX_FDEQ_BIN_4 +225 0x0406 //RX_FDEQ_BIN_5 +226 0x0708 //RX_FDEQ_BIN_6 +227 0x090A //RX_FDEQ_BIN_7 +228 0x0B0C //RX_FDEQ_BIN_8 +229 0x0D08 //RX_FDEQ_BIN_9 +230 0x0000 //RX_FDEQ_BIN_10 +231 0x0000 //RX_FDEQ_BIN_11 +232 0x0000 //RX_FDEQ_BIN_12 +233 0x0000 //RX_FDEQ_BIN_13 +234 0x0000 //RX_FDEQ_BIN_14 +235 0x0000 //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x4000 //RX_FDEQ_RESRV_0 +245 0x0320 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0035 //RX_FDDRC_BAND_MARGIN_1 +248 0x0060 //RX_FDDRC_BAND_MARGIN_2 +249 0x0080 //RX_FDDRC_BAND_MARGIN_3 +250 0x0004 //RX_FDDRC_BLOCK_EXP +251 0x0600 //RX_FDDRC_THRD_2_0 +252 0x0600 //RX_FDDRC_THRD_2_1 +253 0x0600 //RX_FDDRC_THRD_2_2 +254 0x0600 //RX_FDDRC_THRD_2_3 +255 0x0800 //RX_FDDRC_THRD_3_0 +256 0x0800 //RX_FDDRC_THRD_3_1 +257 0x0800 //RX_FDDRC_THRD_3_2 +258 0x0800 //RX_FDDRC_THRD_3_3 +259 0x0000 //RX_FDDRC_SLANT_0_0 +260 0x0000 //RX_FDDRC_SLANT_0_1 +261 0x0000 //RX_FDDRC_SLANT_0_2 +262 0x0000 //RX_FDDRC_SLANT_0_3 +263 0x7FFF //RX_FDDRC_SLANT_1_0 +264 0x7FFF //RX_FDDRC_SLANT_1_1 +265 0x7FFF //RX_FDDRC_SLANT_1_2 +266 0x7FFF //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +286 0x001B //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 +#VOL 2 +163 0x1000 //RX_TDDRC_ALPHA_UP_1 +164 0x1000 //RX_TDDRC_ALPHA_UP_2 +165 0x1000 //RX_TDDRC_ALPHA_UP_3 +166 0x1000 //RX_TDDRC_ALPHA_UP_4 +184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +185 0x4000 //RX_TDDRC_ALPHA_DWN_2 +186 0x4000 //RX_TDDRC_ALPHA_DWN_3 +189 0x4000 //RX_TDDRC_ALPHA_DWN_4 +190 0x7214 //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +269 0x0002 //RX_TDDRC_THRD_0 +270 0x0004 //RX_TDDRC_THRD_1 +271 0x1800 //RX_TDDRC_THRD_2 +272 0x1800 //RX_TDDRC_THRD_3 +273 0x7FFF //RX_TDDRC_SLANT_0 +274 0x7FFF //RX_TDDRC_SLANT_1 +275 0x1000 //RX_TDDRC_ALPHA_UP_0 +276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x199A //RX_TDDRC_HMNC_GAIN +279 0x0001 //RX_TDDRC_SMT_FLAG +280 0x0CCD //RX_TDDRC_SMT_W +281 0x0780 //RX_TDDRC_DRC_GAIN +195 0x0014 //RX_FDEQ_SUBNUM +196 0x8080 //RX_FDEQ_GAIN_0 +197 0x8050 //RX_FDEQ_GAIN_1 +198 0x4840 //RX_FDEQ_GAIN_2 +199 0x4040 //RX_FDEQ_GAIN_3 +200 0x4C68 //RX_FDEQ_GAIN_4 +201 0x403C //RX_FDEQ_GAIN_5 +202 0x3C38 //RX_FDEQ_GAIN_6 +203 0x3430 //RX_FDEQ_GAIN_7 +204 0x303C //RX_FDEQ_GAIN_8 +205 0x4C50 //RX_FDEQ_GAIN_9 +206 0x4848 //RX_FDEQ_GAIN_10 +207 0x4848 //RX_FDEQ_GAIN_11 +208 0x4848 //RX_FDEQ_GAIN_12 +209 0x4848 //RX_FDEQ_GAIN_13 +210 0x4848 //RX_FDEQ_GAIN_14 +211 0x4848 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0202 //RX_FDEQ_BIN_0 +221 0x0203 //RX_FDEQ_BIN_1 +222 0x0303 //RX_FDEQ_BIN_2 +223 0x0304 //RX_FDEQ_BIN_3 +224 0x0703 //RX_FDEQ_BIN_4 +225 0x0406 //RX_FDEQ_BIN_5 +226 0x0708 //RX_FDEQ_BIN_6 +227 0x090A //RX_FDEQ_BIN_7 +228 0x0B0C //RX_FDEQ_BIN_8 +229 0x0D08 //RX_FDEQ_BIN_9 +230 0x0000 //RX_FDEQ_BIN_10 +231 0x0000 //RX_FDEQ_BIN_11 +232 0x0000 //RX_FDEQ_BIN_12 +233 0x0000 //RX_FDEQ_BIN_13 +234 0x0000 //RX_FDEQ_BIN_14 +235 0x0000 //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x4000 //RX_FDEQ_RESRV_0 +245 0x0320 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0035 //RX_FDDRC_BAND_MARGIN_1 +248 0x0060 //RX_FDDRC_BAND_MARGIN_2 +249 0x0080 //RX_FDDRC_BAND_MARGIN_3 +250 0x0004 //RX_FDDRC_BLOCK_EXP +251 0x0600 //RX_FDDRC_THRD_2_0 +252 0x0600 //RX_FDDRC_THRD_2_1 +253 0x0600 //RX_FDDRC_THRD_2_2 +254 0x0600 //RX_FDDRC_THRD_2_3 +255 0x0800 //RX_FDDRC_THRD_3_0 +256 0x0800 //RX_FDDRC_THRD_3_1 +257 0x0800 //RX_FDDRC_THRD_3_2 +258 0x0800 //RX_FDDRC_THRD_3_3 +259 0x0000 //RX_FDDRC_SLANT_0_0 +260 0x0000 //RX_FDDRC_SLANT_0_1 +261 0x0000 //RX_FDDRC_SLANT_0_2 +262 0x0000 //RX_FDDRC_SLANT_0_3 +263 0x7FFF //RX_FDDRC_SLANT_1_0 +264 0x7FFF //RX_FDDRC_SLANT_1_1 +265 0x7FFF //RX_FDDRC_SLANT_1_2 +266 0x7FFF //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +286 0x0026 //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 +#VOL 3 +163 0x1000 //RX_TDDRC_ALPHA_UP_1 +164 0x1000 //RX_TDDRC_ALPHA_UP_2 +165 0x1000 //RX_TDDRC_ALPHA_UP_3 +166 0x1000 //RX_TDDRC_ALPHA_UP_4 +184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +185 0x4000 //RX_TDDRC_ALPHA_DWN_2 +186 0x4000 //RX_TDDRC_ALPHA_DWN_3 +189 0x4000 //RX_TDDRC_ALPHA_DWN_4 +190 0x7214 //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +269 0x0002 //RX_TDDRC_THRD_0 +270 0x0004 //RX_TDDRC_THRD_1 +271 0x1800 //RX_TDDRC_THRD_2 +272 0x1800 //RX_TDDRC_THRD_3 +273 0x7FFF //RX_TDDRC_SLANT_0 +274 0x7FFF //RX_TDDRC_SLANT_1 +275 0x1000 //RX_TDDRC_ALPHA_UP_0 +276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x199A //RX_TDDRC_HMNC_GAIN +279 0x0001 //RX_TDDRC_SMT_FLAG +280 0x0CCD //RX_TDDRC_SMT_W +281 0x0780 //RX_TDDRC_DRC_GAIN +195 0x0014 //RX_FDEQ_SUBNUM +196 0x8080 //RX_FDEQ_GAIN_0 +197 0x8050 //RX_FDEQ_GAIN_1 +198 0x4840 //RX_FDEQ_GAIN_2 +199 0x4040 //RX_FDEQ_GAIN_3 +200 0x4C68 //RX_FDEQ_GAIN_4 +201 0x403C //RX_FDEQ_GAIN_5 +202 0x3C38 //RX_FDEQ_GAIN_6 +203 0x3430 //RX_FDEQ_GAIN_7 +204 0x303C //RX_FDEQ_GAIN_8 +205 0x4C50 //RX_FDEQ_GAIN_9 +206 0x4848 //RX_FDEQ_GAIN_10 +207 0x4848 //RX_FDEQ_GAIN_11 +208 0x4848 //RX_FDEQ_GAIN_12 +209 0x4848 //RX_FDEQ_GAIN_13 +210 0x4848 //RX_FDEQ_GAIN_14 +211 0x4848 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0202 //RX_FDEQ_BIN_0 +221 0x0203 //RX_FDEQ_BIN_1 +222 0x0303 //RX_FDEQ_BIN_2 +223 0x0304 //RX_FDEQ_BIN_3 +224 0x0703 //RX_FDEQ_BIN_4 +225 0x0406 //RX_FDEQ_BIN_5 +226 0x0708 //RX_FDEQ_BIN_6 +227 0x090A //RX_FDEQ_BIN_7 +228 0x0B0C //RX_FDEQ_BIN_8 +229 0x0D08 //RX_FDEQ_BIN_9 +230 0x0000 //RX_FDEQ_BIN_10 +231 0x0000 //RX_FDEQ_BIN_11 +232 0x0000 //RX_FDEQ_BIN_12 +233 0x0000 //RX_FDEQ_BIN_13 +234 0x0000 //RX_FDEQ_BIN_14 +235 0x0000 //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x4000 //RX_FDEQ_RESRV_0 +245 0x0320 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0035 //RX_FDDRC_BAND_MARGIN_1 +248 0x0060 //RX_FDDRC_BAND_MARGIN_2 +249 0x0080 //RX_FDDRC_BAND_MARGIN_3 +250 0x0004 //RX_FDDRC_BLOCK_EXP +251 0x0600 //RX_FDDRC_THRD_2_0 +252 0x0600 //RX_FDDRC_THRD_2_1 +253 0x0600 //RX_FDDRC_THRD_2_2 +254 0x0600 //RX_FDDRC_THRD_2_3 +255 0x0800 //RX_FDDRC_THRD_3_0 +256 0x0800 //RX_FDDRC_THRD_3_1 +257 0x0800 //RX_FDDRC_THRD_3_2 +258 0x0800 //RX_FDDRC_THRD_3_3 +259 0x0000 //RX_FDDRC_SLANT_0_0 +260 0x0000 //RX_FDDRC_SLANT_0_1 +261 0x0000 //RX_FDDRC_SLANT_0_2 +262 0x0000 //RX_FDDRC_SLANT_0_3 +263 0x7FFF //RX_FDDRC_SLANT_1_0 +264 0x7FFF //RX_FDDRC_SLANT_1_1 +265 0x7FFF //RX_FDDRC_SLANT_1_2 +266 0x7FFF //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +286 0x0037 //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 +#VOL 4 +163 0x1000 //RX_TDDRC_ALPHA_UP_1 +164 0x1000 //RX_TDDRC_ALPHA_UP_2 +165 0x1000 //RX_TDDRC_ALPHA_UP_3 +166 0x1000 //RX_TDDRC_ALPHA_UP_4 +184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +185 0x4000 //RX_TDDRC_ALPHA_DWN_2 +186 0x4000 //RX_TDDRC_ALPHA_DWN_3 +189 0x4000 //RX_TDDRC_ALPHA_DWN_4 +190 0x7214 //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +269 0x0002 //RX_TDDRC_THRD_0 +270 0x0004 //RX_TDDRC_THRD_1 +271 0x1800 //RX_TDDRC_THRD_2 +272 0x1800 //RX_TDDRC_THRD_3 +273 0x7FFF //RX_TDDRC_SLANT_0 +274 0x7FFF //RX_TDDRC_SLANT_1 +275 0x1000 //RX_TDDRC_ALPHA_UP_0 +276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x199A //RX_TDDRC_HMNC_GAIN +279 0x0001 //RX_TDDRC_SMT_FLAG +280 0x0CCD //RX_TDDRC_SMT_W +281 0x0D56 //RX_TDDRC_DRC_GAIN +195 0x0014 //RX_FDEQ_SUBNUM +196 0x8080 //RX_FDEQ_GAIN_0 +197 0x8050 //RX_FDEQ_GAIN_1 +198 0x4840 //RX_FDEQ_GAIN_2 +199 0x4040 //RX_FDEQ_GAIN_3 +200 0x4470 //RX_FDEQ_GAIN_4 +201 0x383C //RX_FDEQ_GAIN_5 +202 0x3C3C //RX_FDEQ_GAIN_6 +203 0x3434 //RX_FDEQ_GAIN_7 +204 0x344C //RX_FDEQ_GAIN_8 +205 0x585C //RX_FDEQ_GAIN_9 +206 0x4848 //RX_FDEQ_GAIN_10 +207 0x4848 //RX_FDEQ_GAIN_11 +208 0x4848 //RX_FDEQ_GAIN_12 +209 0x4848 //RX_FDEQ_GAIN_13 +210 0x4848 //RX_FDEQ_GAIN_14 +211 0x4848 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0202 //RX_FDEQ_BIN_0 +221 0x0203 //RX_FDEQ_BIN_1 +222 0x0303 //RX_FDEQ_BIN_2 +223 0x0304 //RX_FDEQ_BIN_3 +224 0x0703 //RX_FDEQ_BIN_4 +225 0x0406 //RX_FDEQ_BIN_5 +226 0x0708 //RX_FDEQ_BIN_6 +227 0x090A //RX_FDEQ_BIN_7 +228 0x0B0C //RX_FDEQ_BIN_8 +229 0x0D08 //RX_FDEQ_BIN_9 +230 0x0000 //RX_FDEQ_BIN_10 +231 0x0000 //RX_FDEQ_BIN_11 +232 0x0000 //RX_FDEQ_BIN_12 +233 0x0000 //RX_FDEQ_BIN_13 +234 0x0000 //RX_FDEQ_BIN_14 +235 0x0000 //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x4000 //RX_FDEQ_RESRV_0 +245 0x0320 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0035 //RX_FDDRC_BAND_MARGIN_1 +248 0x0060 //RX_FDDRC_BAND_MARGIN_2 +249 0x0080 //RX_FDDRC_BAND_MARGIN_3 +250 0x0004 //RX_FDDRC_BLOCK_EXP +251 0x0600 //RX_FDDRC_THRD_2_0 +252 0x0600 //RX_FDDRC_THRD_2_1 +253 0x0600 //RX_FDDRC_THRD_2_2 +254 0x0600 //RX_FDDRC_THRD_2_3 +255 0x0800 //RX_FDDRC_THRD_3_0 +256 0x0800 //RX_FDDRC_THRD_3_1 +257 0x0800 //RX_FDDRC_THRD_3_2 +258 0x0800 //RX_FDDRC_THRD_3_3 +259 0x0000 //RX_FDDRC_SLANT_0_0 +260 0x0000 //RX_FDDRC_SLANT_0_1 +261 0x0000 //RX_FDDRC_SLANT_0_2 +262 0x0000 //RX_FDDRC_SLANT_0_3 +263 0x7FFF //RX_FDDRC_SLANT_1_0 +264 0x7FFF //RX_FDDRC_SLANT_1_1 +265 0x7FFF //RX_FDDRC_SLANT_1_2 +266 0x7FFF //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +286 0x002C //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 +#VOL 5 +163 0x1000 //RX_TDDRC_ALPHA_UP_1 +164 0x1000 //RX_TDDRC_ALPHA_UP_2 +165 0x1000 //RX_TDDRC_ALPHA_UP_3 +166 0x1000 //RX_TDDRC_ALPHA_UP_4 +184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +185 0x4000 //RX_TDDRC_ALPHA_DWN_2 +186 0x4000 //RX_TDDRC_ALPHA_DWN_3 +189 0x4000 //RX_TDDRC_ALPHA_DWN_4 +190 0x7214 //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +269 0x0002 //RX_TDDRC_THRD_0 +270 0x0004 //RX_TDDRC_THRD_1 +271 0x1800 //RX_TDDRC_THRD_2 +272 0x1800 //RX_TDDRC_THRD_3 +273 0x7FFF //RX_TDDRC_SLANT_0 +274 0x7FFF //RX_TDDRC_SLANT_1 +275 0x1000 //RX_TDDRC_ALPHA_UP_0 +276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x199A //RX_TDDRC_HMNC_GAIN +279 0x0001 //RX_TDDRC_SMT_FLAG +280 0x0CCD //RX_TDDRC_SMT_W +281 0x0D56 //RX_TDDRC_DRC_GAIN +195 0x0014 //RX_FDEQ_SUBNUM +196 0x8080 //RX_FDEQ_GAIN_0 +197 0x8050 //RX_FDEQ_GAIN_1 +198 0x4840 //RX_FDEQ_GAIN_2 +199 0x4040 //RX_FDEQ_GAIN_3 +200 0x4470 //RX_FDEQ_GAIN_4 +201 0x383C //RX_FDEQ_GAIN_5 +202 0x3C3C //RX_FDEQ_GAIN_6 +203 0x3434 //RX_FDEQ_GAIN_7 +204 0x344C //RX_FDEQ_GAIN_8 +205 0x585C //RX_FDEQ_GAIN_9 +206 0x4848 //RX_FDEQ_GAIN_10 +207 0x4848 //RX_FDEQ_GAIN_11 +208 0x4848 //RX_FDEQ_GAIN_12 +209 0x4848 //RX_FDEQ_GAIN_13 +210 0x4848 //RX_FDEQ_GAIN_14 +211 0x4848 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0202 //RX_FDEQ_BIN_0 +221 0x0203 //RX_FDEQ_BIN_1 +222 0x0303 //RX_FDEQ_BIN_2 +223 0x0304 //RX_FDEQ_BIN_3 +224 0x0703 //RX_FDEQ_BIN_4 +225 0x0406 //RX_FDEQ_BIN_5 +226 0x0708 //RX_FDEQ_BIN_6 +227 0x090A //RX_FDEQ_BIN_7 +228 0x0B0C //RX_FDEQ_BIN_8 +229 0x0D08 //RX_FDEQ_BIN_9 +230 0x0000 //RX_FDEQ_BIN_10 +231 0x0000 //RX_FDEQ_BIN_11 +232 0x0000 //RX_FDEQ_BIN_12 +233 0x0000 //RX_FDEQ_BIN_13 +234 0x0000 //RX_FDEQ_BIN_14 +235 0x0000 //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x4000 //RX_FDEQ_RESRV_0 +245 0x0320 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0035 //RX_FDDRC_BAND_MARGIN_1 +248 0x0060 //RX_FDDRC_BAND_MARGIN_2 +249 0x0080 //RX_FDDRC_BAND_MARGIN_3 +250 0x0004 //RX_FDDRC_BLOCK_EXP +251 0x0600 //RX_FDDRC_THRD_2_0 +252 0x0600 //RX_FDDRC_THRD_2_1 +253 0x0600 //RX_FDDRC_THRD_2_2 +254 0x0600 //RX_FDDRC_THRD_2_3 +255 0x0800 //RX_FDDRC_THRD_3_0 +256 0x0800 //RX_FDDRC_THRD_3_1 +257 0x0800 //RX_FDDRC_THRD_3_2 +258 0x0800 //RX_FDDRC_THRD_3_3 +259 0x0000 //RX_FDDRC_SLANT_0_0 +260 0x0000 //RX_FDDRC_SLANT_0_1 +261 0x0000 //RX_FDDRC_SLANT_0_2 +262 0x0000 //RX_FDDRC_SLANT_0_3 +263 0x7FFF //RX_FDDRC_SLANT_1_0 +264 0x7FFF //RX_FDDRC_SLANT_1_1 +265 0x7FFF //RX_FDDRC_SLANT_1_2 +266 0x7FFF //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +286 0x0051 //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 +#VOL 6 +163 0x1000 //RX_TDDRC_ALPHA_UP_1 +164 0x1000 //RX_TDDRC_ALPHA_UP_2 +165 0x1000 //RX_TDDRC_ALPHA_UP_3 +166 0x1000 //RX_TDDRC_ALPHA_UP_4 +184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +185 0x4000 //RX_TDDRC_ALPHA_DWN_2 +186 0x4000 //RX_TDDRC_ALPHA_DWN_3 +189 0x4000 //RX_TDDRC_ALPHA_DWN_4 +190 0x7214 //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +269 0x0002 //RX_TDDRC_THRD_0 +270 0x0004 //RX_TDDRC_THRD_1 +271 0x1800 //RX_TDDRC_THRD_2 +272 0x1800 //RX_TDDRC_THRD_3 +273 0x7FFF //RX_TDDRC_SLANT_0 +274 0x7FFF //RX_TDDRC_SLANT_1 +275 0x1000 //RX_TDDRC_ALPHA_UP_0 +276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x199A //RX_TDDRC_HMNC_GAIN +279 0x0001 //RX_TDDRC_SMT_FLAG +280 0x0CCD //RX_TDDRC_SMT_W +281 0x0D56 //RX_TDDRC_DRC_GAIN +195 0x0014 //RX_FDEQ_SUBNUM +196 0x8080 //RX_FDEQ_GAIN_0 +197 0x8050 //RX_FDEQ_GAIN_1 +198 0x4840 //RX_FDEQ_GAIN_2 +199 0x4040 //RX_FDEQ_GAIN_3 +200 0x4470 //RX_FDEQ_GAIN_4 +201 0x383C //RX_FDEQ_GAIN_5 +202 0x3C3C //RX_FDEQ_GAIN_6 +203 0x3434 //RX_FDEQ_GAIN_7 +204 0x344C //RX_FDEQ_GAIN_8 +205 0x585C //RX_FDEQ_GAIN_9 +206 0x4848 //RX_FDEQ_GAIN_10 +207 0x4848 //RX_FDEQ_GAIN_11 +208 0x4848 //RX_FDEQ_GAIN_12 +209 0x4848 //RX_FDEQ_GAIN_13 +210 0x4848 //RX_FDEQ_GAIN_14 +211 0x4848 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0202 //RX_FDEQ_BIN_0 +221 0x0203 //RX_FDEQ_BIN_1 +222 0x0303 //RX_FDEQ_BIN_2 +223 0x0304 //RX_FDEQ_BIN_3 +224 0x0703 //RX_FDEQ_BIN_4 +225 0x0406 //RX_FDEQ_BIN_5 +226 0x0708 //RX_FDEQ_BIN_6 +227 0x090A //RX_FDEQ_BIN_7 +228 0x0B0C //RX_FDEQ_BIN_8 +229 0x0D08 //RX_FDEQ_BIN_9 +230 0x0000 //RX_FDEQ_BIN_10 +231 0x0000 //RX_FDEQ_BIN_11 +232 0x0000 //RX_FDEQ_BIN_12 +233 0x0000 //RX_FDEQ_BIN_13 +234 0x0000 //RX_FDEQ_BIN_14 +235 0x0000 //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x4000 //RX_FDEQ_RESRV_0 +245 0x0320 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0035 //RX_FDDRC_BAND_MARGIN_1 +248 0x0060 //RX_FDDRC_BAND_MARGIN_2 +249 0x0080 //RX_FDDRC_BAND_MARGIN_3 +250 0x0004 //RX_FDDRC_BLOCK_EXP +251 0x0600 //RX_FDDRC_THRD_2_0 +252 0x0600 //RX_FDDRC_THRD_2_1 +253 0x0600 //RX_FDDRC_THRD_2_2 +254 0x0600 //RX_FDDRC_THRD_2_3 +255 0x0800 //RX_FDDRC_THRD_3_0 +256 0x0800 //RX_FDDRC_THRD_3_1 +257 0x0800 //RX_FDDRC_THRD_3_2 +258 0x0800 //RX_FDDRC_THRD_3_3 +259 0x0000 //RX_FDDRC_SLANT_0_0 +260 0x0000 //RX_FDDRC_SLANT_0_1 +261 0x0000 //RX_FDDRC_SLANT_0_2 +262 0x0000 //RX_FDDRC_SLANT_0_3 +263 0x7FFF //RX_FDDRC_SLANT_1_0 +264 0x7FFF //RX_FDDRC_SLANT_1_1 +265 0x7FFF //RX_FDDRC_SLANT_1_2 +266 0x7FFF //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +286 0x0100 //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 #CASE_NAME HEADSET-TTY_HCO-VOICE_GENERIC-WB -#PARAM_MODE FULL -#PARAM_TYPE TX+RX -#TOTAL_CUSTOM_STEP 7 +#PARAM_MODE Full +#PARAM_TYPE TX+2RX +#TOTAL_CUSTOM_STEP 7+7 #TX 0 0x0001 //TX_OPERATION_MODE_0 1 0x0000 //TX_OPERATION_MODE_1 @@ -37084,7 +56320,7 @@ 239 0x0000 //TX_DT_RESRV_7 240 0x0000 //TX_DT_RESRV_8 241 0x0000 //TX_DT_RESRV_9 -242 0xF200 //TX_THR_SN_EST_0 +242 0xFA00 //TX_THR_SN_EST_0 243 0xF400 //TX_THR_SN_EST_1 244 0xF800 //TX_THR_SN_EST_2 245 0xF600 //TX_THR_SN_EST_3 @@ -37093,12 +56329,12 @@ 248 0xF800 //TX_THR_SN_EST_6 249 0xF800 //TX_THR_SN_EST_7 250 0x0100 //TX_DELTA_THR_SN_EST_0 -251 0x0000 //TX_DELTA_THR_SN_EST_1 +251 0x0100 //TX_DELTA_THR_SN_EST_1 252 0x0100 //TX_DELTA_THR_SN_EST_2 -253 0x0100 //TX_DELTA_THR_SN_EST_3 +253 0x0200 //TX_DELTA_THR_SN_EST_3 254 0x0200 //TX_DELTA_THR_SN_EST_4 255 0x0200 //TX_DELTA_THR_SN_EST_5 -256 0x0200 //TX_DELTA_THR_SN_EST_6 +256 0x0000 //TX_DELTA_THR_SN_EST_6 257 0x0200 //TX_DELTA_THR_SN_EST_7 258 0x4000 //TX_LAMBDA_NN_EST_0 259 0x4000 //TX_LAMBDA_NN_EST_1 @@ -37124,12 +56360,12 @@ 279 0x0000 //TX_B_POST_FLT_0 280 0x0000 //TX_B_POST_FLT_1 281 0x001A //TX_NS_LVL_CTRL_0 -282 0x001A //TX_NS_LVL_CTRL_1 +282 0x0014 //TX_NS_LVL_CTRL_1 283 0x0014 //TX_NS_LVL_CTRL_2 -284 0x0014 //TX_NS_LVL_CTRL_3 +284 0x000C //TX_NS_LVL_CTRL_3 285 0x000C //TX_NS_LVL_CTRL_4 286 0x000C //TX_NS_LVL_CTRL_5 -287 0x000C //TX_NS_LVL_CTRL_6 +287 0x001A //TX_NS_LVL_CTRL_6 288 0x000C //TX_NS_LVL_CTRL_7 289 0x000E //TX_MIN_GAIN_S_0 290 0x0014 //TX_MIN_GAIN_S_1 @@ -37145,10 +56381,10 @@ 300 0x7FFF //TX_SNRI_SUP_0 301 0x7FFF //TX_SNRI_SUP_1 302 0x7FFF //TX_SNRI_SUP_2 -303 0x7FFF //TX_SNRI_SUP_3 +303 0x4000 //TX_SNRI_SUP_3 304 0x4000 //TX_SNRI_SUP_4 305 0x4000 //TX_SNRI_SUP_5 -306 0x4000 //TX_SNRI_SUP_6 +306 0x7FFF //TX_SNRI_SUP_6 307 0x4000 //TX_SNRI_SUP_7 308 0x1200 //TX_THR_LFNS 309 0x0147 //TX_G_LFNS @@ -37157,12 +56393,12 @@ 312 0x7FFF //TX_A_POST_FILT_0 313 0x7FFF //TX_A_POST_FILT_1 314 0x4000 //TX_A_POST_FILT_S_0 -315 0x199A //TX_A_POST_FILT_S_1 +315 0x1000 //TX_A_POST_FILT_S_1 316 0x1000 //TX_A_POST_FILT_S_2 -317 0x1000 //TX_A_POST_FILT_S_3 +317 0x6666 //TX_A_POST_FILT_S_3 318 0x6666 //TX_A_POST_FILT_S_4 319 0x6666 //TX_A_POST_FILT_S_5 -320 0x6666 //TX_A_POST_FILT_S_6 +320 0x199A //TX_A_POST_FILT_S_6 321 0x6666 //TX_A_POST_FILT_S_7 322 0x2000 //TX_B_POST_FILT_0 323 0x2000 //TX_B_POST_FILT_1 @@ -37209,7 +56445,7 @@ 364 0x0000 //TX_K_APT 365 0x0001 //TX_NOISEDET 366 0x05A0 //TX_NDETCT -367 0x000A //TX_NOISE_TH_0 +367 0x0102 //TX_NOISE_TH_0 368 0x1388 //TX_NOISE_TH_0_2 369 0x3A98 //TX_NOISE_TH_0_3 370 0x0C80 //TX_NOISE_TH_1 @@ -37221,11 +56457,11 @@ 376 0x7FFF //TX_NOISE_TH_5_3 377 0x7FFF //TX_NOISE_TH_5_4 378 0x00C8 //TX_NOISE_TH_6 -379 0x000A //TX_MINENOISE_TH -380 0x0000 //TX_MINENOISE_MIC0_TH_MTS -381 0x0000 //TX_MINENOISE_MIC0_TH_EXP -382 0x0000 //TX_MINENOISE_MIC0_S_TH_MTS -383 0x0000 //TX_MINENOISE_MIC0_S_TH_EXP +379 0x00F8 //TX_MINENOISE_TH +380 0xD508 //TX_MORENS_TFMASK_TH +381 0x0001 //TX_DRC_QUIET_FLOOR +382 0x3A98 //TX_RATIODTL_CUT_TH +383 0x0DAC //TX_DT_CUT_K1 384 0x6400 //TX_OUT_ENER_S_TH_CLEAN 385 0x6400 //TX_OUT_ENER_S_TH_LESSCLEAN 386 0x6400 //TX_OUT_ENER_S_TH_NOISY @@ -37233,22 +56469,22 @@ 388 0x7D00 //TX_OUT_ENER_TH_SPEECH 389 0x0000 //TX_SN_NPB_GAIN 390 0x0000 //TX_NN_NPB_GAIN -391 0x0000 //TX_CSX_ALPHA_0 -392 0x0000 //TX_CSX_ALPHA_1 -393 0x0000 //TX_CSX_ALPHA_2 -394 0x0000 //TX_CSX_ALPHA_3 -395 0x0000 //TX_MU_ARSP_EST -396 0x0000 //TX_P_OUTBEAM_MIN_TH +391 0x7FFF //TX_POST_MASK_SUP_HSNE +392 0x1388 //TX_TAIL_DET_TH +393 0x4000 //TX_B_LESSCUT_RTO_WTA +394 0x0000 //TX_MEL_G_R +395 0x0080 //TX_SUPHIGH_TH +396 0x0000 //TX_MASK_G_R 397 0x0000 //TX_EXTRA_NS_L -398 0x0000 //TX_EXTRA_NS_A -399 0x0000 //TX_VR_NOISE_FLOOR_TH +398 0x1800 //TX_C_POST_FLT_MASK +399 0x7FFF //TX_A_POST_FLT_WNS 400 0x0000 //TX_MIN_G_LOW300HZ 401 0x0010 //TX_MAXLEVEL_CNG 402 0x0000 //TX_STN_NOISE_TH 403 0x0000 //TX_POST_MASK_SUP 404 0x0000 //TX_POST_MASK_ADJUST 405 0x0014 //TX_NS_ENOISE_MIC0_TH -406 0x0014 //TX_MINENOISE_MIC0_TH +406 0x00DC //TX_MINENOISE_MIC0_TH 407 0x0226 //TX_MINENOISE_MIC0_S_TH 408 0x2879 //TX_MIN_G_CTRL_SSNS 409 0x0400 //TX_METAL_RTO_THR @@ -37356,16 +56592,16 @@ 511 0x6666 //TX_MIC_TO_BFGAIN 512 0x6666 //TX_MICTOBFGAIN0 513 0x0014 //TX_FASTMUE_TH -514 0x0000 //TX_DERVB_LEN_0 -515 0x0000 //TX_DERVB_LEN_1 -516 0x0000 //TX_RHO_DERVB -517 0x0000 //TX_MIC_INDX_DERVB -518 0x0000 //TX_MU_DERVB -519 0x0000 //TX_DR_RESRV_0 -520 0x0000 //TX_DR_RESRV_1 -521 0x0000 //TX_DR_RESRV_2 -522 0x0000 //TX_DR_RESRV_3 -523 0x0000 //TX_DR_RESRV_4 +514 0xC000 //TX_DEREVERB_LF_MU +515 0xC000 //TX_DEREVERB_HF_MU +516 0xCCCC //TX_DEREVERB_DELAY +517 0xD999 //TX_DEREVERB_COEF_LEN +518 0x1F40 //TX_DEREVERB_DNR +519 0x0000 //TX_DEREVERB_ALPHA +520 0x0000 //TX_DEREVERB_BETA +521 0x0000 //TX_GSC_RTOL_TH +522 0x7000 //TX_GSC_RTOH_TH +523 0x0064 //TX_WIDE2_MEANHTH 524 0x0000 //TX_DR_RESRV_5 525 0x0000 //TX_DR_RESRV_6 526 0x0000 //TX_DR_RESRV_7 @@ -37731,16 +56967,81 @@ 886 0x0000 //TX_FASTNS_TFMASKBIN_TH2 887 0x0000 //TX_FASTNS_TFMASKBIN_TH3 888 0x00C8 //TX_FASTNS_ARSPC_TH -889 0xD99A //TX_FASTNS_MASK5_TH +889 0xC000 //TX_FASTNS_MASK5_TH 890 0x051F //TX_POSTSSA_MIN_G_VR_MASK -891 0x7FFF //TX_A_LESSCUT_RTO_MASK +891 0x4000 //TX_A_LESSCUT_RTO_MASK 892 0x1770 //TX_FASTNS_NOISETH 893 0xC000 //TX_FASTNS_SSA_THLFL 894 0xC000 //TX_FASTNS_SSA_THHFL 895 0xCCCC //TX_FASTNS_SSA_THLFH 896 0xD999 //TX_FASTNS_SSA_THHFH +897 0x2339 //TX_SENDFUNC_REG_MICMUTE +898 0x0021 //TX_SENDFUNC_REG_MICMUTE1 +899 0x02BC //TX_MICMUTE_RATIO_THR +900 0x0140 //TX_MICMUTE_AMP_THR +901 0x0004 //TX_MICMUTE_HPF_IND +902 0x00C0 //TX_MICMUTE_LOG_EYR_TH +903 0x0008 //TX_MICMUTE_CVG_TIME +904 0x0008 //TX_MICMUTE_RELEASE_TIME +905 0x01FE //TX_MIC_VOLUME_MIC0MUTE +906 0x0020 //TX_MICMUTE_EPD_OFFSET_0 +907 0x001E //TX_MICMUTE_FRQ_AEC_L +908 0x7999 //TX_MICMUTE_EAD_THR +909 0x7FFF //TX_MICMUTE_LAMBDA_CB_NLE +910 0x7FFF //TX_MICMUTE_LAMBDA_RE_EST +911 0x4000 //TX_DTD_THR1_MICMUTE_0 +912 0x7000 //TX_DTD_THR1_MICMUTE_1 +913 0x7FFF //TX_DTD_THR1_MICMUTE_2 +914 0x7FFF //TX_DTD_THR1_MICMUTE_3 +915 0x6CCC //TX_DTD_THR2_MICMUTE_0 +916 0x0400 //TX_MICMUTE_MIN_EQ_RE_EST_0 +917 0x0400 //TX_MICMUTE_MIN_EQ_RE_EST_1 +918 0x1000 //TX_MICMUTE_MIN_EQ_RE_EST_2 +919 0x7FFF //TX_MICMUTE_MIN_EQ_RE_EST_3 +920 0x7FFF //TX_MICMUTE_MIN_EQ_RE_EST_4 +921 0x4000 //TX_MICMUTE_C_POST_FLT +922 0x03E8 //TX_MICMUTE_DT_CUT_K +923 0x0001 //TX_MICMUTE_DT_CUT_THR +924 0x03E8 //TX_MICMUTE_DT_CUT_K2 +925 0x0001 //TX_MICMUTE_DT_CUT_THR2 +926 0x0064 //TX_MICMUTE_DT2_HOLD_N +927 0x1000 //TX_MICMUTE_RATIODTH_THCUT +928 0x1000 //TX_MICMUTE_B_POST_FLT_ECHOL +929 0x7FFF //TX_MICMUTE_B_POST_FLT_ECHOH +930 0x0400 //TX_MICMUTE_C_POST_FLT_MASK +931 0x7999 //TX_MICMUTE_RATIODTL_CUT_TH +932 0x0258 //TX_MICMUTE_DT_CUT_K1 +933 0x0800 //TX_MICMUTE_N2_SN_EST +934 0xFC00 //TX_MICMUTE_THR_SN_EST_0 +935 0x001C //TX_MICMUTE_MIN_G_CTRL_0 +936 0x6000 //TX_MICMUTE_A_POST_FILT_S_0 +937 0x7000 //TX_MICMUTE_B_POST_FILT_0 +938 0x2710 //TX_MIC1RUB_AMP_THR +939 0x0010 //TX_MIC1MUTE_RATIO_THR +940 0x0450 //TX_MIC1MUTE_AMP_THR +941 0x0008 //TX_MIC1MUTE_CVG_TIME +942 0x0008 //TX_MIC1MUTE_RELEASE_TIME +943 0x0000 //TX_AMS_RESRV_01 +944 0x0000 //TX_AMS_RESRV_02 +945 0x0000 //TX_AMS_RESRV_03 +946 0x0000 //TX_AMS_RESRV_04 +947 0x0000 //TX_AMS_RESRV_05 +948 0x0000 //TX_AMS_RESRV_06 +949 0x0000 //TX_AMS_RESRV_07 +950 0x0000 //TX_AMS_RESRV_08 +951 0x0000 //TX_AMS_RESRV_09 +952 0x0000 //TX_AMS_RESRV_10 +953 0x0000 //TX_AMS_RESRV_11 +954 0x0000 //TX_AMS_RESRV_12 +955 0x0000 //TX_AMS_RESRV_13 +956 0x0000 //TX_AMS_RESRV_14 +957 0x0000 //TX_AMS_RESRV_15 +958 0x0000 //TX_AMS_RESRV_16 +959 0x0000 //TX_AMS_RESRV_17 +960 0x0000 //TX_AMS_RESRV_18 +961 0x0000 //TX_AMS_RESRV_19 #RX -0 0x027C //RX_RECVFUNC_MODE_0 +0 0x243C //RX_RECVFUNC_MODE_0 1 0x0000 //RX_RECVFUNC_MODE_1 2 0x0001 //RX_SAMPLINGFREQ_SIG 3 0x0001 //RX_SAMPLINGFREQ_PROC @@ -37750,7 +57051,7 @@ 7 0x6000 //RX_TDDRC_ALPHA_UP_2 8 0x6000 //RX_TDDRC_ALPHA_UP_3 9 0x1000 //RX_TDDRC_ALPHA_UP_4 -10 0x0800 //RX_PGA +10 0x0403 //RX_PGA 11 0x7B02 //RX_A_HP 12 0x4000 //RX_B_PE 13 0x7800 //RX_THR_PITCH_DET_0 @@ -37780,14 +57081,14 @@ 37 0x4000 //RX_LMT_ALPHA 38 0x001C //RX_FDEQ_SUBNUM 39 0x6868 //RX_FDEQ_GAIN_0 -40 0x6858 //RX_FDEQ_GAIN_1 -41 0x5858 //RX_FDEQ_GAIN_2 -42 0x5858 //RX_FDEQ_GAIN_3 +40 0x6864 //RX_FDEQ_GAIN_1 +41 0x7070 //RX_FDEQ_GAIN_2 +42 0x6058 //RX_FDEQ_GAIN_3 43 0x5C5C //RX_FDEQ_GAIN_4 -44 0x5854 //RX_FDEQ_GAIN_5 -45 0x544C //RX_FDEQ_GAIN_6 -46 0x4C4C //RX_FDEQ_GAIN_7 -47 0x4C60 //RX_FDEQ_GAIN_8 +44 0x8854 //RX_FDEQ_GAIN_5 +45 0x5448 //RX_FDEQ_GAIN_6 +46 0x4848 //RX_FDEQ_GAIN_7 +47 0x4860 //RX_FDEQ_GAIN_8 48 0x6068 //RX_FDEQ_GAIN_9 49 0x7070 //RX_FDEQ_GAIN_10 50 0x8070 //RX_FDEQ_GAIN_11 @@ -37864,12 +57165,12 @@ 121 0x199A //RX_TDDRC_HMNC_GAIN 122 0x0001 //RX_TDDRC_SMT_FLAG 123 0x0CCD //RX_TDDRC_SMT_W -124 0x06AF //RX_TDDRC_DRC_GAIN +124 0x0715 //RX_TDDRC_DRC_GAIN 125 0x7C00 //RX_LAMBDA_PKA_FP -126 0x2000 //RX_TPKA_FP -127 0x2000 //RX_MIN_G_FP -128 0x0080 //RX_MAX_G_FP -129 0x0014 //RX_SPK_VOL +126 0x157C //RX_TPKA_FP +127 0x0400 //RX_MIN_G_FP +128 0x0800 //RX_MAX_G_FP +129 0x0100 //RX_SPK_VOL 130 0x0000 //RX_VOL_RESRV_0 131 0x0000 //RX_MAXLEVEL_CNG 132 0x3000 //RX_BWE_UV_TH @@ -37903,15 +57204,15 @@ 8 0x6000 //RX_TDDRC_ALPHA_UP_3 9 0x1000 //RX_TDDRC_ALPHA_UP_4 27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 -28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 -29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 -32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +28 0x4000 //RX_TDDRC_ALPHA_DWN_2 +29 0x4000 //RX_TDDRC_ALPHA_DWN_3 +32 0x4000 //RX_TDDRC_ALPHA_DWN_4 33 0x7214 //RX_TDDRC_LIMITER_THRD 34 0x0800 //RX_TDDRC_LIMITER_GAIN 112 0x0002 //RX_TDDRC_THRD_0 113 0x0004 //RX_TDDRC_THRD_1 -114 0x1C00 //RX_TDDRC_THRD_2 -115 0x1C00 //RX_TDDRC_THRD_3 +114 0x1800 //RX_TDDRC_THRD_2 +115 0x1800 //RX_TDDRC_THRD_3 116 0x7FFF //RX_TDDRC_SLANT_0 117 0x7FFF //RX_TDDRC_SLANT_1 118 0x6000 //RX_TDDRC_ALPHA_UP_0 @@ -37920,22 +57221,22 @@ 121 0x199A //RX_TDDRC_HMNC_GAIN 122 0x0001 //RX_TDDRC_SMT_FLAG 123 0x0CCD //RX_TDDRC_SMT_W -124 0x06AF //RX_TDDRC_DRC_GAIN +124 0x0780 //RX_TDDRC_DRC_GAIN 38 0x001C //RX_FDEQ_SUBNUM -39 0x6868 //RX_FDEQ_GAIN_0 -40 0x6858 //RX_FDEQ_GAIN_1 -41 0x5858 //RX_FDEQ_GAIN_2 -42 0x5858 //RX_FDEQ_GAIN_3 -43 0x5C5C //RX_FDEQ_GAIN_4 -44 0x5854 //RX_FDEQ_GAIN_5 -45 0x544C //RX_FDEQ_GAIN_6 -46 0x4C4C //RX_FDEQ_GAIN_7 -47 0x4C60 //RX_FDEQ_GAIN_8 -48 0x6068 //RX_FDEQ_GAIN_9 -49 0x7070 //RX_FDEQ_GAIN_10 -50 0x8070 //RX_FDEQ_GAIN_11 -51 0x6060 //RX_FDEQ_GAIN_12 -52 0x7070 //RX_FDEQ_GAIN_13 +39 0x5C5C //RX_FDEQ_GAIN_0 +40 0x5448 //RX_FDEQ_GAIN_1 +41 0x4848 //RX_FDEQ_GAIN_2 +42 0x4840 //RX_FDEQ_GAIN_3 +43 0x4848 //RX_FDEQ_GAIN_4 +44 0x6048 //RX_FDEQ_GAIN_5 +45 0x4C40 //RX_FDEQ_GAIN_6 +46 0x4038 //RX_FDEQ_GAIN_7 +47 0x3C48 //RX_FDEQ_GAIN_8 +48 0x545C //RX_FDEQ_GAIN_9 +49 0x6864 //RX_FDEQ_GAIN_10 +50 0x7058 //RX_FDEQ_GAIN_11 +51 0x443C //RX_FDEQ_GAIN_12 +52 0x3838 //RX_FDEQ_GAIN_13 53 0x4848 //RX_FDEQ_GAIN_14 54 0x4848 //RX_FDEQ_GAIN_15 55 0x4848 //RX_FDEQ_GAIN_16 @@ -37994,7 +57295,7 @@ 108 0x7FFF //RX_FDDRC_SLANT_1_2 109 0x7FFF //RX_FDDRC_SLANT_1_3 110 0x0000 //RX_FDDRC_RESRV_0 -129 0x0014 //RX_SPK_VOL +129 0x0011 //RX_SPK_VOL 130 0x0000 //RX_VOL_RESRV_0 #VOL 1 6 0x6000 //RX_TDDRC_ALPHA_UP_1 @@ -38002,15 +57303,15 @@ 8 0x6000 //RX_TDDRC_ALPHA_UP_3 9 0x1000 //RX_TDDRC_ALPHA_UP_4 27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 -28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 -29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 -32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +28 0x4000 //RX_TDDRC_ALPHA_DWN_2 +29 0x4000 //RX_TDDRC_ALPHA_DWN_3 +32 0x4000 //RX_TDDRC_ALPHA_DWN_4 33 0x7214 //RX_TDDRC_LIMITER_THRD 34 0x0800 //RX_TDDRC_LIMITER_GAIN 112 0x0002 //RX_TDDRC_THRD_0 113 0x0004 //RX_TDDRC_THRD_1 -114 0x1C00 //RX_TDDRC_THRD_2 -115 0x1C00 //RX_TDDRC_THRD_3 +114 0x1800 //RX_TDDRC_THRD_2 +115 0x1800 //RX_TDDRC_THRD_3 116 0x7FFF //RX_TDDRC_SLANT_0 117 0x7FFF //RX_TDDRC_SLANT_1 118 0x6000 //RX_TDDRC_ALPHA_UP_0 @@ -38019,22 +57320,22 @@ 121 0x199A //RX_TDDRC_HMNC_GAIN 122 0x0001 //RX_TDDRC_SMT_FLAG 123 0x0CCD //RX_TDDRC_SMT_W -124 0x06AF //RX_TDDRC_DRC_GAIN +124 0x0780 //RX_TDDRC_DRC_GAIN 38 0x001C //RX_FDEQ_SUBNUM -39 0x6868 //RX_FDEQ_GAIN_0 -40 0x6858 //RX_FDEQ_GAIN_1 -41 0x5858 //RX_FDEQ_GAIN_2 -42 0x5858 //RX_FDEQ_GAIN_3 -43 0x5C5C //RX_FDEQ_GAIN_4 -44 0x5854 //RX_FDEQ_GAIN_5 -45 0x544C //RX_FDEQ_GAIN_6 -46 0x4C4C //RX_FDEQ_GAIN_7 -47 0x4C60 //RX_FDEQ_GAIN_8 -48 0x6068 //RX_FDEQ_GAIN_9 -49 0x7070 //RX_FDEQ_GAIN_10 -50 0x8070 //RX_FDEQ_GAIN_11 -51 0x6060 //RX_FDEQ_GAIN_12 -52 0x7070 //RX_FDEQ_GAIN_13 +39 0x5C5C //RX_FDEQ_GAIN_0 +40 0x5448 //RX_FDEQ_GAIN_1 +41 0x4848 //RX_FDEQ_GAIN_2 +42 0x4840 //RX_FDEQ_GAIN_3 +43 0x4848 //RX_FDEQ_GAIN_4 +44 0x6048 //RX_FDEQ_GAIN_5 +45 0x4C40 //RX_FDEQ_GAIN_6 +46 0x4038 //RX_FDEQ_GAIN_7 +47 0x3C48 //RX_FDEQ_GAIN_8 +48 0x545C //RX_FDEQ_GAIN_9 +49 0x6864 //RX_FDEQ_GAIN_10 +50 0x7058 //RX_FDEQ_GAIN_11 +51 0x443C //RX_FDEQ_GAIN_12 +52 0x3838 //RX_FDEQ_GAIN_13 53 0x4848 //RX_FDEQ_GAIN_14 54 0x4848 //RX_FDEQ_GAIN_15 55 0x4848 //RX_FDEQ_GAIN_16 @@ -38093,7 +57394,7 @@ 108 0x7FFF //RX_FDDRC_SLANT_1_2 109 0x7FFF //RX_FDDRC_SLANT_1_3 110 0x0000 //RX_FDDRC_RESRV_0 -129 0x001A //RX_SPK_VOL +129 0x0019 //RX_SPK_VOL 130 0x0000 //RX_VOL_RESRV_0 #VOL 2 6 0x6000 //RX_TDDRC_ALPHA_UP_1 @@ -38101,15 +57402,15 @@ 8 0x6000 //RX_TDDRC_ALPHA_UP_3 9 0x1000 //RX_TDDRC_ALPHA_UP_4 27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 -28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 -29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 -32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +28 0x4000 //RX_TDDRC_ALPHA_DWN_2 +29 0x4000 //RX_TDDRC_ALPHA_DWN_3 +32 0x4000 //RX_TDDRC_ALPHA_DWN_4 33 0x7214 //RX_TDDRC_LIMITER_THRD 34 0x0800 //RX_TDDRC_LIMITER_GAIN 112 0x0002 //RX_TDDRC_THRD_0 113 0x0004 //RX_TDDRC_THRD_1 -114 0x1C00 //RX_TDDRC_THRD_2 -115 0x1C00 //RX_TDDRC_THRD_3 +114 0x1800 //RX_TDDRC_THRD_2 +115 0x1800 //RX_TDDRC_THRD_3 116 0x7FFF //RX_TDDRC_SLANT_0 117 0x7FFF //RX_TDDRC_SLANT_1 118 0x6000 //RX_TDDRC_ALPHA_UP_0 @@ -38118,22 +57419,22 @@ 121 0x199A //RX_TDDRC_HMNC_GAIN 122 0x0001 //RX_TDDRC_SMT_FLAG 123 0x0CCD //RX_TDDRC_SMT_W -124 0x06AF //RX_TDDRC_DRC_GAIN +124 0x0780 //RX_TDDRC_DRC_GAIN 38 0x001C //RX_FDEQ_SUBNUM -39 0x6868 //RX_FDEQ_GAIN_0 -40 0x6858 //RX_FDEQ_GAIN_1 -41 0x5858 //RX_FDEQ_GAIN_2 -42 0x5858 //RX_FDEQ_GAIN_3 -43 0x5C5C //RX_FDEQ_GAIN_4 -44 0x5854 //RX_FDEQ_GAIN_5 -45 0x544C //RX_FDEQ_GAIN_6 -46 0x4C4C //RX_FDEQ_GAIN_7 -47 0x4C60 //RX_FDEQ_GAIN_8 -48 0x6068 //RX_FDEQ_GAIN_9 -49 0x7070 //RX_FDEQ_GAIN_10 -50 0x8070 //RX_FDEQ_GAIN_11 -51 0x6060 //RX_FDEQ_GAIN_12 -52 0x7070 //RX_FDEQ_GAIN_13 +39 0x5C5C //RX_FDEQ_GAIN_0 +40 0x5448 //RX_FDEQ_GAIN_1 +41 0x4848 //RX_FDEQ_GAIN_2 +42 0x4840 //RX_FDEQ_GAIN_3 +43 0x4848 //RX_FDEQ_GAIN_4 +44 0x6048 //RX_FDEQ_GAIN_5 +45 0x4C40 //RX_FDEQ_GAIN_6 +46 0x4038 //RX_FDEQ_GAIN_7 +47 0x3C48 //RX_FDEQ_GAIN_8 +48 0x545C //RX_FDEQ_GAIN_9 +49 0x6864 //RX_FDEQ_GAIN_10 +50 0x7058 //RX_FDEQ_GAIN_11 +51 0x443C //RX_FDEQ_GAIN_12 +52 0x3838 //RX_FDEQ_GAIN_13 53 0x4848 //RX_FDEQ_GAIN_14 54 0x4848 //RX_FDEQ_GAIN_15 55 0x4848 //RX_FDEQ_GAIN_16 @@ -38192,7 +57493,7 @@ 108 0x7FFF //RX_FDDRC_SLANT_1_2 109 0x7FFF //RX_FDDRC_SLANT_1_3 110 0x0000 //RX_FDDRC_RESRV_0 -129 0x0026 //RX_SPK_VOL +129 0x0024 //RX_SPK_VOL 130 0x0000 //RX_VOL_RESRV_0 #VOL 3 6 0x6000 //RX_TDDRC_ALPHA_UP_1 @@ -38200,15 +57501,15 @@ 8 0x6000 //RX_TDDRC_ALPHA_UP_3 9 0x1000 //RX_TDDRC_ALPHA_UP_4 27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 -28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 -29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 -32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +28 0x4000 //RX_TDDRC_ALPHA_DWN_2 +29 0x4000 //RX_TDDRC_ALPHA_DWN_3 +32 0x4000 //RX_TDDRC_ALPHA_DWN_4 33 0x7214 //RX_TDDRC_LIMITER_THRD 34 0x0800 //RX_TDDRC_LIMITER_GAIN 112 0x0002 //RX_TDDRC_THRD_0 113 0x0004 //RX_TDDRC_THRD_1 -114 0x1C00 //RX_TDDRC_THRD_2 -115 0x1C00 //RX_TDDRC_THRD_3 +114 0x1800 //RX_TDDRC_THRD_2 +115 0x1800 //RX_TDDRC_THRD_3 116 0x7FFF //RX_TDDRC_SLANT_0 117 0x7FFF //RX_TDDRC_SLANT_1 118 0x6000 //RX_TDDRC_ALPHA_UP_0 @@ -38217,22 +57518,22 @@ 121 0x199A //RX_TDDRC_HMNC_GAIN 122 0x0001 //RX_TDDRC_SMT_FLAG 123 0x0CCD //RX_TDDRC_SMT_W -124 0x06AF //RX_TDDRC_DRC_GAIN +124 0x0780 //RX_TDDRC_DRC_GAIN 38 0x001C //RX_FDEQ_SUBNUM -39 0x6868 //RX_FDEQ_GAIN_0 -40 0x6858 //RX_FDEQ_GAIN_1 -41 0x5858 //RX_FDEQ_GAIN_2 -42 0x5858 //RX_FDEQ_GAIN_3 -43 0x5C5C //RX_FDEQ_GAIN_4 -44 0x5854 //RX_FDEQ_GAIN_5 -45 0x544C //RX_FDEQ_GAIN_6 -46 0x4C4C //RX_FDEQ_GAIN_7 -47 0x4C60 //RX_FDEQ_GAIN_8 -48 0x6068 //RX_FDEQ_GAIN_9 -49 0x7070 //RX_FDEQ_GAIN_10 -50 0x8070 //RX_FDEQ_GAIN_11 -51 0x6060 //RX_FDEQ_GAIN_12 -52 0x7070 //RX_FDEQ_GAIN_13 +39 0x5C5C //RX_FDEQ_GAIN_0 +40 0x5448 //RX_FDEQ_GAIN_1 +41 0x4848 //RX_FDEQ_GAIN_2 +42 0x4840 //RX_FDEQ_GAIN_3 +43 0x4848 //RX_FDEQ_GAIN_4 +44 0x6048 //RX_FDEQ_GAIN_5 +45 0x4C40 //RX_FDEQ_GAIN_6 +46 0x4038 //RX_FDEQ_GAIN_7 +47 0x3C48 //RX_FDEQ_GAIN_8 +48 0x545C //RX_FDEQ_GAIN_9 +49 0x6864 //RX_FDEQ_GAIN_10 +50 0x7058 //RX_FDEQ_GAIN_11 +51 0x443C //RX_FDEQ_GAIN_12 +52 0x3838 //RX_FDEQ_GAIN_13 53 0x4848 //RX_FDEQ_GAIN_14 54 0x4848 //RX_FDEQ_GAIN_15 55 0x4848 //RX_FDEQ_GAIN_16 @@ -38291,7 +57592,7 @@ 108 0x7FFF //RX_FDDRC_SLANT_1_2 109 0x7FFF //RX_FDDRC_SLANT_1_3 110 0x0000 //RX_FDDRC_RESRV_0 -129 0x0035 //RX_SPK_VOL +129 0x0034 //RX_SPK_VOL 130 0x0000 //RX_VOL_RESRV_0 #VOL 4 6 0x6000 //RX_TDDRC_ALPHA_UP_1 @@ -38299,15 +57600,15 @@ 8 0x6000 //RX_TDDRC_ALPHA_UP_3 9 0x1000 //RX_TDDRC_ALPHA_UP_4 27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 -28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 -29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 -32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +28 0x4000 //RX_TDDRC_ALPHA_DWN_2 +29 0x4000 //RX_TDDRC_ALPHA_DWN_3 +32 0x4000 //RX_TDDRC_ALPHA_DWN_4 33 0x7214 //RX_TDDRC_LIMITER_THRD 34 0x0800 //RX_TDDRC_LIMITER_GAIN 112 0x0002 //RX_TDDRC_THRD_0 113 0x0004 //RX_TDDRC_THRD_1 -114 0x1C00 //RX_TDDRC_THRD_2 -115 0x1C00 //RX_TDDRC_THRD_3 +114 0x1800 //RX_TDDRC_THRD_2 +115 0x1800 //RX_TDDRC_THRD_3 116 0x7FFF //RX_TDDRC_SLANT_0 117 0x7FFF //RX_TDDRC_SLANT_1 118 0x6000 //RX_TDDRC_ALPHA_UP_0 @@ -38316,22 +57617,22 @@ 121 0x199A //RX_TDDRC_HMNC_GAIN 122 0x0001 //RX_TDDRC_SMT_FLAG 123 0x0CCD //RX_TDDRC_SMT_W -124 0x06AF //RX_TDDRC_DRC_GAIN +124 0x0B39 //RX_TDDRC_DRC_GAIN 38 0x001C //RX_FDEQ_SUBNUM -39 0x7878 //RX_FDEQ_GAIN_0 -40 0x786C //RX_FDEQ_GAIN_1 -41 0x6C6C //RX_FDEQ_GAIN_2 -42 0x6262 //RX_FDEQ_GAIN_3 -43 0x5A60 //RX_FDEQ_GAIN_4 -44 0x7A54 //RX_FDEQ_GAIN_5 -45 0x5448 //RX_FDEQ_GAIN_6 -46 0x4848 //RX_FDEQ_GAIN_7 -47 0x4860 //RX_FDEQ_GAIN_8 +39 0x6868 //RX_FDEQ_GAIN_0 +40 0x685C //RX_FDEQ_GAIN_1 +41 0x6868 //RX_FDEQ_GAIN_2 +42 0x544C //RX_FDEQ_GAIN_3 +43 0x4C54 //RX_FDEQ_GAIN_4 +44 0x704C //RX_FDEQ_GAIN_5 +45 0x4C40 //RX_FDEQ_GAIN_6 +46 0x4040 //RX_FDEQ_GAIN_7 +47 0x445C //RX_FDEQ_GAIN_8 48 0x6068 //RX_FDEQ_GAIN_9 49 0x7070 //RX_FDEQ_GAIN_10 -50 0x8070 //RX_FDEQ_GAIN_11 +50 0x7C74 //RX_FDEQ_GAIN_11 51 0x6060 //RX_FDEQ_GAIN_12 -52 0x7070 //RX_FDEQ_GAIN_13 +52 0x6C6C //RX_FDEQ_GAIN_13 53 0x4848 //RX_FDEQ_GAIN_14 54 0x4848 //RX_FDEQ_GAIN_15 55 0x4848 //RX_FDEQ_GAIN_16 @@ -38390,7 +57691,7 @@ 108 0x7FFF //RX_FDDRC_SLANT_1_2 109 0x7FFF //RX_FDDRC_SLANT_1_3 110 0x0000 //RX_FDDRC_RESRV_0 -129 0x0058 //RX_SPK_VOL +129 0x0038 //RX_SPK_VOL 130 0x0000 //RX_VOL_RESRV_0 #VOL 5 6 0x6000 //RX_TDDRC_ALPHA_UP_1 @@ -38398,15 +57699,15 @@ 8 0x6000 //RX_TDDRC_ALPHA_UP_3 9 0x1000 //RX_TDDRC_ALPHA_UP_4 27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 -28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 -29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 -32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +28 0x4000 //RX_TDDRC_ALPHA_DWN_2 +29 0x4000 //RX_TDDRC_ALPHA_DWN_3 +32 0x4000 //RX_TDDRC_ALPHA_DWN_4 33 0x7214 //RX_TDDRC_LIMITER_THRD 34 0x0800 //RX_TDDRC_LIMITER_GAIN 112 0x0002 //RX_TDDRC_THRD_0 113 0x0004 //RX_TDDRC_THRD_1 -114 0x1C00 //RX_TDDRC_THRD_2 -115 0x1C00 //RX_TDDRC_THRD_3 +114 0x1800 //RX_TDDRC_THRD_2 +115 0x1800 //RX_TDDRC_THRD_3 116 0x7FFF //RX_TDDRC_SLANT_0 117 0x7FFF //RX_TDDRC_SLANT_1 118 0x6000 //RX_TDDRC_ALPHA_UP_0 @@ -38415,22 +57716,22 @@ 121 0x199A //RX_TDDRC_HMNC_GAIN 122 0x0001 //RX_TDDRC_SMT_FLAG 123 0x0CCD //RX_TDDRC_SMT_W -124 0x06AF //RX_TDDRC_DRC_GAIN +124 0x0B39 //RX_TDDRC_DRC_GAIN 38 0x001C //RX_FDEQ_SUBNUM -39 0x7878 //RX_FDEQ_GAIN_0 -40 0x786C //RX_FDEQ_GAIN_1 -41 0x6C6C //RX_FDEQ_GAIN_2 -42 0x6262 //RX_FDEQ_GAIN_3 -43 0x5A60 //RX_FDEQ_GAIN_4 -44 0x7A54 //RX_FDEQ_GAIN_5 -45 0x5448 //RX_FDEQ_GAIN_6 -46 0x4848 //RX_FDEQ_GAIN_7 -47 0x4860 //RX_FDEQ_GAIN_8 +39 0x6868 //RX_FDEQ_GAIN_0 +40 0x685C //RX_FDEQ_GAIN_1 +41 0x6868 //RX_FDEQ_GAIN_2 +42 0x544C //RX_FDEQ_GAIN_3 +43 0x4C54 //RX_FDEQ_GAIN_4 +44 0x704C //RX_FDEQ_GAIN_5 +45 0x4C40 //RX_FDEQ_GAIN_6 +46 0x4040 //RX_FDEQ_GAIN_7 +47 0x445C //RX_FDEQ_GAIN_8 48 0x6068 //RX_FDEQ_GAIN_9 49 0x7070 //RX_FDEQ_GAIN_10 -50 0x8070 //RX_FDEQ_GAIN_11 +50 0x7C74 //RX_FDEQ_GAIN_11 51 0x6060 //RX_FDEQ_GAIN_12 -52 0x7070 //RX_FDEQ_GAIN_13 +52 0x6C6C //RX_FDEQ_GAIN_13 53 0x4848 //RX_FDEQ_GAIN_14 54 0x4848 //RX_FDEQ_GAIN_15 55 0x4848 //RX_FDEQ_GAIN_16 @@ -38489,7 +57790,7 @@ 108 0x7FFF //RX_FDDRC_SLANT_1_2 109 0x7FFF //RX_FDDRC_SLANT_1_3 110 0x0000 //RX_FDDRC_RESRV_0 -129 0x0085 //RX_SPK_VOL +129 0x0060 //RX_SPK_VOL 130 0x0000 //RX_VOL_RESRV_0 #VOL 6 6 0x6000 //RX_TDDRC_ALPHA_UP_1 @@ -38497,15 +57798,15 @@ 8 0x6000 //RX_TDDRC_ALPHA_UP_3 9 0x1000 //RX_TDDRC_ALPHA_UP_4 27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 -28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 -29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 -32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +28 0x4000 //RX_TDDRC_ALPHA_DWN_2 +29 0x4000 //RX_TDDRC_ALPHA_DWN_3 +32 0x4000 //RX_TDDRC_ALPHA_DWN_4 33 0x7214 //RX_TDDRC_LIMITER_THRD 34 0x0800 //RX_TDDRC_LIMITER_GAIN 112 0x0002 //RX_TDDRC_THRD_0 113 0x0004 //RX_TDDRC_THRD_1 -114 0x1C00 //RX_TDDRC_THRD_2 -115 0x1C00 //RX_TDDRC_THRD_3 +114 0x1800 //RX_TDDRC_THRD_2 +115 0x1800 //RX_TDDRC_THRD_3 116 0x7FFF //RX_TDDRC_SLANT_0 117 0x7FFF //RX_TDDRC_SLANT_1 118 0x6000 //RX_TDDRC_ALPHA_UP_0 @@ -38514,22 +57815,22 @@ 121 0x199A //RX_TDDRC_HMNC_GAIN 122 0x0001 //RX_TDDRC_SMT_FLAG 123 0x0CCD //RX_TDDRC_SMT_W -124 0x06AF //RX_TDDRC_DRC_GAIN +124 0x0B39 //RX_TDDRC_DRC_GAIN 38 0x001C //RX_FDEQ_SUBNUM -39 0x7878 //RX_FDEQ_GAIN_0 -40 0x786C //RX_FDEQ_GAIN_1 -41 0x6C6C //RX_FDEQ_GAIN_2 -42 0x6262 //RX_FDEQ_GAIN_3 -43 0x5A60 //RX_FDEQ_GAIN_4 -44 0x7A54 //RX_FDEQ_GAIN_5 -45 0x5448 //RX_FDEQ_GAIN_6 -46 0x4848 //RX_FDEQ_GAIN_7 -47 0x4860 //RX_FDEQ_GAIN_8 +39 0x6868 //RX_FDEQ_GAIN_0 +40 0x685C //RX_FDEQ_GAIN_1 +41 0x6868 //RX_FDEQ_GAIN_2 +42 0x544C //RX_FDEQ_GAIN_3 +43 0x4C54 //RX_FDEQ_GAIN_4 +44 0x704C //RX_FDEQ_GAIN_5 +45 0x4C40 //RX_FDEQ_GAIN_6 +46 0x4040 //RX_FDEQ_GAIN_7 +47 0x445C //RX_FDEQ_GAIN_8 48 0x6068 //RX_FDEQ_GAIN_9 49 0x7070 //RX_FDEQ_GAIN_10 -50 0x8070 //RX_FDEQ_GAIN_11 +50 0x7C74 //RX_FDEQ_GAIN_11 51 0x6060 //RX_FDEQ_GAIN_12 -52 0x7070 //RX_FDEQ_GAIN_13 +52 0x6C6C //RX_FDEQ_GAIN_13 53 0x4848 //RX_FDEQ_GAIN_14 54 0x4848 //RX_FDEQ_GAIN_15 55 0x4848 //RX_FDEQ_GAIN_16 @@ -38590,11 +57891,862 @@ 110 0x0000 //RX_FDDRC_RESRV_0 129 0x0100 //RX_SPK_VOL 130 0x0000 //RX_VOL_RESRV_0 +#RX 2 +157 0x243C //RX_RECVFUNC_MODE_0 +158 0x0000 //RX_RECVFUNC_MODE_1 +159 0x0001 //RX_SAMPLINGFREQ_SIG +160 0x0001 //RX_SAMPLINGFREQ_PROC +161 0x000A //RX_FRAME_SZ +162 0x0000 //RX_DELAY_OPT +163 0x6000 //RX_TDDRC_ALPHA_UP_1 +164 0x6000 //RX_TDDRC_ALPHA_UP_2 +165 0x6000 //RX_TDDRC_ALPHA_UP_3 +166 0x1000 //RX_TDDRC_ALPHA_UP_4 +167 0x0403 //RX_PGA +168 0x7B02 //RX_A_HP +169 0x4000 //RX_B_PE +170 0x7800 //RX_THR_PITCH_DET_0 +171 0x7000 //RX_THR_PITCH_DET_1 +172 0x6000 //RX_THR_PITCH_DET_2 +173 0x0008 //RX_PITCH_BFR_LEN +174 0x0003 //RX_SBD_PITCH_DET +175 0x0100 //RX_PP_RESRV_0 +176 0x0020 //RX_PP_RESRV_1 +177 0x0400 //RX_N_SN_EST +178 0x000C //RX_N2_SN_EST +179 0x0010 //RX_NS_LVL_CTRL +180 0xF800 //RX_THR_SN_EST +181 0x7E00 //RX_LAMBDA_PFILT +182 0x000A //RX_FENS_RESRV_0 +183 0x0190 //RX_FENS_RESRV_1 +184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +187 0x0002 //RX_EXTRA_NS_L +188 0x0800 //RX_EXTRA_NS_A +189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +190 0x7214 //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +192 0x199A //RX_A_POST_FLT +193 0x0000 //RX_LMT_THRD +194 0x4000 //RX_LMT_ALPHA +195 0x001C //RX_FDEQ_SUBNUM +196 0x6868 //RX_FDEQ_GAIN_0 +197 0x6864 //RX_FDEQ_GAIN_1 +198 0x7070 //RX_FDEQ_GAIN_2 +199 0x6058 //RX_FDEQ_GAIN_3 +200 0x5C5C //RX_FDEQ_GAIN_4 +201 0x8854 //RX_FDEQ_GAIN_5 +202 0x5448 //RX_FDEQ_GAIN_6 +203 0x4848 //RX_FDEQ_GAIN_7 +204 0x4860 //RX_FDEQ_GAIN_8 +205 0x6068 //RX_FDEQ_GAIN_9 +206 0x7070 //RX_FDEQ_GAIN_10 +207 0x8070 //RX_FDEQ_GAIN_11 +208 0x6060 //RX_FDEQ_GAIN_12 +209 0x7070 //RX_FDEQ_GAIN_13 +210 0x4848 //RX_FDEQ_GAIN_14 +211 0x4848 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0202 //RX_FDEQ_BIN_0 +221 0x0203 //RX_FDEQ_BIN_1 +222 0x0303 //RX_FDEQ_BIN_2 +223 0x0304 //RX_FDEQ_BIN_3 +224 0x0404 //RX_FDEQ_BIN_4 +225 0x0204 //RX_FDEQ_BIN_5 +226 0x0A0A //RX_FDEQ_BIN_6 +227 0x0A0A //RX_FDEQ_BIN_7 +228 0x0B0C //RX_FDEQ_BIN_8 +229 0x0D0E //RX_FDEQ_BIN_9 +230 0x0E0F //RX_FDEQ_BIN_10 +231 0x0F10 //RX_FDEQ_BIN_11 +232 0x1011 //RX_FDEQ_BIN_12 +233 0x1104 //RX_FDEQ_BIN_13 +234 0x0000 //RX_FDEQ_BIN_14 +235 0x0000 //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x4000 //RX_FDEQ_RESRV_0 +245 0x0320 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0035 //RX_FDDRC_BAND_MARGIN_1 +248 0x00D5 //RX_FDDRC_BAND_MARGIN_2 +249 0x0120 //RX_FDDRC_BAND_MARGIN_3 +250 0x0004 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x2000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x2000 //RX_FDDRC_THRD_3_2 +258 0x5000 //RX_FDDRC_THRD_3_3 +259 0x4000 //RX_FDDRC_SLANT_0_0 +260 0x4000 //RX_FDDRC_SLANT_0_1 +261 0x4000 //RX_FDDRC_SLANT_0_2 +262 0x4000 //RX_FDDRC_SLANT_0_3 +263 0x7FFF //RX_FDDRC_SLANT_1_0 +264 0x7FFF //RX_FDDRC_SLANT_1_1 +265 0x7FFF //RX_FDDRC_SLANT_1_2 +266 0x7FFF //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +268 0x0002 //RX_FILTINDX +269 0x0002 //RX_TDDRC_THRD_0 +270 0x0004 //RX_TDDRC_THRD_1 +271 0x1C00 //RX_TDDRC_THRD_2 +272 0x1C00 //RX_TDDRC_THRD_3 +273 0x7FFF //RX_TDDRC_SLANT_0 +274 0x7FFF //RX_TDDRC_SLANT_1 +275 0x6000 //RX_TDDRC_ALPHA_UP_0 +276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x199A //RX_TDDRC_HMNC_GAIN +279 0x0001 //RX_TDDRC_SMT_FLAG +280 0x0CCD //RX_TDDRC_SMT_W +281 0x0715 //RX_TDDRC_DRC_GAIN +282 0x7C00 //RX_LAMBDA_PKA_FP +283 0x157C //RX_TPKA_FP +284 0x0400 //RX_MIN_G_FP +285 0x0800 //RX_MAX_G_FP +286 0x0100 //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 +288 0x0000 //RX_MAXLEVEL_CNG +289 0x3000 //RX_BWE_UV_TH +290 0x3000 //RX_BWE_UV_TH2 +291 0x1800 //RX_BWE_UV_TH3 +292 0x1000 //RX_BWE_V_TH +293 0x04CD //RX_BWE_GAIN1_V_TH1 +294 0x0F33 //RX_BWE_GAIN1_V_TH2 +295 0x7333 //RX_BWE_UV_EQ +296 0x199A //RX_BWE_V_EQ +297 0x7333 //RX_BWE_TONE_TH +298 0x0004 //RX_BWE_UV_HOLD_T +299 0x6CCD //RX_BWE_GAIN2_ALPHA +300 0x799A //RX_BWE_GAIN3_ALPHA +301 0x001E //RX_BWE_CUTOFF +302 0x3000 //RX_BWE_GAINFILL +303 0x3200 //RX_BWE_MAXTH_TONE +304 0x2000 //RX_BWE_EQ_0 +305 0x2000 //RX_BWE_EQ_1 +306 0x2000 //RX_BWE_EQ_2 +307 0x2000 //RX_BWE_EQ_3 +308 0x2000 //RX_BWE_EQ_4 +309 0x2000 //RX_BWE_EQ_5 +310 0x2000 //RX_BWE_EQ_6 +311 0x0000 //RX_BWE_RESRV_0 +312 0x0000 //RX_BWE_RESRV_1 +313 0x0000 //RX_BWE_RESRV_2 +#VOL 0 +163 0x6000 //RX_TDDRC_ALPHA_UP_1 +164 0x6000 //RX_TDDRC_ALPHA_UP_2 +165 0x6000 //RX_TDDRC_ALPHA_UP_3 +166 0x1000 //RX_TDDRC_ALPHA_UP_4 +184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +185 0x4000 //RX_TDDRC_ALPHA_DWN_2 +186 0x4000 //RX_TDDRC_ALPHA_DWN_3 +189 0x4000 //RX_TDDRC_ALPHA_DWN_4 +190 0x7214 //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +269 0x0002 //RX_TDDRC_THRD_0 +270 0x0004 //RX_TDDRC_THRD_1 +271 0x1800 //RX_TDDRC_THRD_2 +272 0x1800 //RX_TDDRC_THRD_3 +273 0x7FFF //RX_TDDRC_SLANT_0 +274 0x7FFF //RX_TDDRC_SLANT_1 +275 0x6000 //RX_TDDRC_ALPHA_UP_0 +276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x199A //RX_TDDRC_HMNC_GAIN +279 0x0001 //RX_TDDRC_SMT_FLAG +280 0x0CCD //RX_TDDRC_SMT_W +281 0x0780 //RX_TDDRC_DRC_GAIN +195 0x001C //RX_FDEQ_SUBNUM +196 0x5C5C //RX_FDEQ_GAIN_0 +197 0x5448 //RX_FDEQ_GAIN_1 +198 0x4848 //RX_FDEQ_GAIN_2 +199 0x4840 //RX_FDEQ_GAIN_3 +200 0x4848 //RX_FDEQ_GAIN_4 +201 0x6048 //RX_FDEQ_GAIN_5 +202 0x4C40 //RX_FDEQ_GAIN_6 +203 0x4038 //RX_FDEQ_GAIN_7 +204 0x3C48 //RX_FDEQ_GAIN_8 +205 0x545C //RX_FDEQ_GAIN_9 +206 0x6864 //RX_FDEQ_GAIN_10 +207 0x7058 //RX_FDEQ_GAIN_11 +208 0x443C //RX_FDEQ_GAIN_12 +209 0x3838 //RX_FDEQ_GAIN_13 +210 0x4848 //RX_FDEQ_GAIN_14 +211 0x4848 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0202 //RX_FDEQ_BIN_0 +221 0x0203 //RX_FDEQ_BIN_1 +222 0x0303 //RX_FDEQ_BIN_2 +223 0x0304 //RX_FDEQ_BIN_3 +224 0x0404 //RX_FDEQ_BIN_4 +225 0x0204 //RX_FDEQ_BIN_5 +226 0x0A0A //RX_FDEQ_BIN_6 +227 0x0A0A //RX_FDEQ_BIN_7 +228 0x0B0C //RX_FDEQ_BIN_8 +229 0x0D0E //RX_FDEQ_BIN_9 +230 0x0E0F //RX_FDEQ_BIN_10 +231 0x0F10 //RX_FDEQ_BIN_11 +232 0x1011 //RX_FDEQ_BIN_12 +233 0x1104 //RX_FDEQ_BIN_13 +234 0x0000 //RX_FDEQ_BIN_14 +235 0x0000 //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x4000 //RX_FDEQ_RESRV_0 +245 0x0320 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0035 //RX_FDDRC_BAND_MARGIN_1 +248 0x00D5 //RX_FDDRC_BAND_MARGIN_2 +249 0x0120 //RX_FDDRC_BAND_MARGIN_3 +250 0x0004 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x2000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x2000 //RX_FDDRC_THRD_3_2 +258 0x5000 //RX_FDDRC_THRD_3_3 +259 0x4000 //RX_FDDRC_SLANT_0_0 +260 0x4000 //RX_FDDRC_SLANT_0_1 +261 0x4000 //RX_FDDRC_SLANT_0_2 +262 0x4000 //RX_FDDRC_SLANT_0_3 +263 0x7FFF //RX_FDDRC_SLANT_1_0 +264 0x7FFF //RX_FDDRC_SLANT_1_1 +265 0x7FFF //RX_FDDRC_SLANT_1_2 +266 0x7FFF //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +286 0x0011 //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 +#VOL 1 +163 0x6000 //RX_TDDRC_ALPHA_UP_1 +164 0x6000 //RX_TDDRC_ALPHA_UP_2 +165 0x6000 //RX_TDDRC_ALPHA_UP_3 +166 0x1000 //RX_TDDRC_ALPHA_UP_4 +184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +185 0x4000 //RX_TDDRC_ALPHA_DWN_2 +186 0x4000 //RX_TDDRC_ALPHA_DWN_3 +189 0x4000 //RX_TDDRC_ALPHA_DWN_4 +190 0x7214 //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +269 0x0002 //RX_TDDRC_THRD_0 +270 0x0004 //RX_TDDRC_THRD_1 +271 0x1800 //RX_TDDRC_THRD_2 +272 0x1800 //RX_TDDRC_THRD_3 +273 0x7FFF //RX_TDDRC_SLANT_0 +274 0x7FFF //RX_TDDRC_SLANT_1 +275 0x6000 //RX_TDDRC_ALPHA_UP_0 +276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x199A //RX_TDDRC_HMNC_GAIN +279 0x0001 //RX_TDDRC_SMT_FLAG +280 0x0CCD //RX_TDDRC_SMT_W +281 0x0780 //RX_TDDRC_DRC_GAIN +195 0x001C //RX_FDEQ_SUBNUM +196 0x5C5C //RX_FDEQ_GAIN_0 +197 0x5448 //RX_FDEQ_GAIN_1 +198 0x4848 //RX_FDEQ_GAIN_2 +199 0x4840 //RX_FDEQ_GAIN_3 +200 0x4848 //RX_FDEQ_GAIN_4 +201 0x6048 //RX_FDEQ_GAIN_5 +202 0x4C40 //RX_FDEQ_GAIN_6 +203 0x4038 //RX_FDEQ_GAIN_7 +204 0x3C48 //RX_FDEQ_GAIN_8 +205 0x545C //RX_FDEQ_GAIN_9 +206 0x6864 //RX_FDEQ_GAIN_10 +207 0x7058 //RX_FDEQ_GAIN_11 +208 0x443C //RX_FDEQ_GAIN_12 +209 0x3838 //RX_FDEQ_GAIN_13 +210 0x4848 //RX_FDEQ_GAIN_14 +211 0x4848 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0202 //RX_FDEQ_BIN_0 +221 0x0203 //RX_FDEQ_BIN_1 +222 0x0303 //RX_FDEQ_BIN_2 +223 0x0304 //RX_FDEQ_BIN_3 +224 0x0404 //RX_FDEQ_BIN_4 +225 0x0204 //RX_FDEQ_BIN_5 +226 0x0A0A //RX_FDEQ_BIN_6 +227 0x0A0A //RX_FDEQ_BIN_7 +228 0x0B0C //RX_FDEQ_BIN_8 +229 0x0D0E //RX_FDEQ_BIN_9 +230 0x0E0F //RX_FDEQ_BIN_10 +231 0x0F10 //RX_FDEQ_BIN_11 +232 0x1011 //RX_FDEQ_BIN_12 +233 0x1104 //RX_FDEQ_BIN_13 +234 0x0000 //RX_FDEQ_BIN_14 +235 0x0000 //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x4000 //RX_FDEQ_RESRV_0 +245 0x0320 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0035 //RX_FDDRC_BAND_MARGIN_1 +248 0x00D5 //RX_FDDRC_BAND_MARGIN_2 +249 0x0120 //RX_FDDRC_BAND_MARGIN_3 +250 0x0004 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x2000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x2000 //RX_FDDRC_THRD_3_2 +258 0x5000 //RX_FDDRC_THRD_3_3 +259 0x4000 //RX_FDDRC_SLANT_0_0 +260 0x4000 //RX_FDDRC_SLANT_0_1 +261 0x4000 //RX_FDDRC_SLANT_0_2 +262 0x4000 //RX_FDDRC_SLANT_0_3 +263 0x7FFF //RX_FDDRC_SLANT_1_0 +264 0x7FFF //RX_FDDRC_SLANT_1_1 +265 0x7FFF //RX_FDDRC_SLANT_1_2 +266 0x7FFF //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +286 0x0019 //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 +#VOL 2 +163 0x6000 //RX_TDDRC_ALPHA_UP_1 +164 0x6000 //RX_TDDRC_ALPHA_UP_2 +165 0x6000 //RX_TDDRC_ALPHA_UP_3 +166 0x1000 //RX_TDDRC_ALPHA_UP_4 +184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +185 0x4000 //RX_TDDRC_ALPHA_DWN_2 +186 0x4000 //RX_TDDRC_ALPHA_DWN_3 +189 0x4000 //RX_TDDRC_ALPHA_DWN_4 +190 0x7214 //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +269 0x0002 //RX_TDDRC_THRD_0 +270 0x0004 //RX_TDDRC_THRD_1 +271 0x1800 //RX_TDDRC_THRD_2 +272 0x1800 //RX_TDDRC_THRD_3 +273 0x7FFF //RX_TDDRC_SLANT_0 +274 0x7FFF //RX_TDDRC_SLANT_1 +275 0x6000 //RX_TDDRC_ALPHA_UP_0 +276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x199A //RX_TDDRC_HMNC_GAIN +279 0x0001 //RX_TDDRC_SMT_FLAG +280 0x0CCD //RX_TDDRC_SMT_W +281 0x0780 //RX_TDDRC_DRC_GAIN +195 0x001C //RX_FDEQ_SUBNUM +196 0x5C5C //RX_FDEQ_GAIN_0 +197 0x5448 //RX_FDEQ_GAIN_1 +198 0x4848 //RX_FDEQ_GAIN_2 +199 0x4840 //RX_FDEQ_GAIN_3 +200 0x4848 //RX_FDEQ_GAIN_4 +201 0x6048 //RX_FDEQ_GAIN_5 +202 0x4C40 //RX_FDEQ_GAIN_6 +203 0x4038 //RX_FDEQ_GAIN_7 +204 0x3C48 //RX_FDEQ_GAIN_8 +205 0x545C //RX_FDEQ_GAIN_9 +206 0x6864 //RX_FDEQ_GAIN_10 +207 0x7058 //RX_FDEQ_GAIN_11 +208 0x443C //RX_FDEQ_GAIN_12 +209 0x3838 //RX_FDEQ_GAIN_13 +210 0x4848 //RX_FDEQ_GAIN_14 +211 0x4848 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0202 //RX_FDEQ_BIN_0 +221 0x0203 //RX_FDEQ_BIN_1 +222 0x0303 //RX_FDEQ_BIN_2 +223 0x0304 //RX_FDEQ_BIN_3 +224 0x0404 //RX_FDEQ_BIN_4 +225 0x0204 //RX_FDEQ_BIN_5 +226 0x0A0A //RX_FDEQ_BIN_6 +227 0x0A0A //RX_FDEQ_BIN_7 +228 0x0B0C //RX_FDEQ_BIN_8 +229 0x0D0E //RX_FDEQ_BIN_9 +230 0x0E0F //RX_FDEQ_BIN_10 +231 0x0F10 //RX_FDEQ_BIN_11 +232 0x1011 //RX_FDEQ_BIN_12 +233 0x1104 //RX_FDEQ_BIN_13 +234 0x0000 //RX_FDEQ_BIN_14 +235 0x0000 //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x4000 //RX_FDEQ_RESRV_0 +245 0x0320 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0035 //RX_FDDRC_BAND_MARGIN_1 +248 0x00D5 //RX_FDDRC_BAND_MARGIN_2 +249 0x0120 //RX_FDDRC_BAND_MARGIN_3 +250 0x0004 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x2000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x2000 //RX_FDDRC_THRD_3_2 +258 0x5000 //RX_FDDRC_THRD_3_3 +259 0x4000 //RX_FDDRC_SLANT_0_0 +260 0x4000 //RX_FDDRC_SLANT_0_1 +261 0x4000 //RX_FDDRC_SLANT_0_2 +262 0x4000 //RX_FDDRC_SLANT_0_3 +263 0x7FFF //RX_FDDRC_SLANT_1_0 +264 0x7FFF //RX_FDDRC_SLANT_1_1 +265 0x7FFF //RX_FDDRC_SLANT_1_2 +266 0x7FFF //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +286 0x0024 //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 +#VOL 3 +163 0x6000 //RX_TDDRC_ALPHA_UP_1 +164 0x6000 //RX_TDDRC_ALPHA_UP_2 +165 0x6000 //RX_TDDRC_ALPHA_UP_3 +166 0x1000 //RX_TDDRC_ALPHA_UP_4 +184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +185 0x4000 //RX_TDDRC_ALPHA_DWN_2 +186 0x4000 //RX_TDDRC_ALPHA_DWN_3 +189 0x4000 //RX_TDDRC_ALPHA_DWN_4 +190 0x7214 //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +269 0x0002 //RX_TDDRC_THRD_0 +270 0x0004 //RX_TDDRC_THRD_1 +271 0x1800 //RX_TDDRC_THRD_2 +272 0x1800 //RX_TDDRC_THRD_3 +273 0x7FFF //RX_TDDRC_SLANT_0 +274 0x7FFF //RX_TDDRC_SLANT_1 +275 0x6000 //RX_TDDRC_ALPHA_UP_0 +276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x199A //RX_TDDRC_HMNC_GAIN +279 0x0001 //RX_TDDRC_SMT_FLAG +280 0x0CCD //RX_TDDRC_SMT_W +281 0x0780 //RX_TDDRC_DRC_GAIN +195 0x001C //RX_FDEQ_SUBNUM +196 0x5C5C //RX_FDEQ_GAIN_0 +197 0x5448 //RX_FDEQ_GAIN_1 +198 0x4848 //RX_FDEQ_GAIN_2 +199 0x4840 //RX_FDEQ_GAIN_3 +200 0x4848 //RX_FDEQ_GAIN_4 +201 0x6048 //RX_FDEQ_GAIN_5 +202 0x4C40 //RX_FDEQ_GAIN_6 +203 0x4038 //RX_FDEQ_GAIN_7 +204 0x3C48 //RX_FDEQ_GAIN_8 +205 0x545C //RX_FDEQ_GAIN_9 +206 0x6864 //RX_FDEQ_GAIN_10 +207 0x7058 //RX_FDEQ_GAIN_11 +208 0x443C //RX_FDEQ_GAIN_12 +209 0x3838 //RX_FDEQ_GAIN_13 +210 0x4848 //RX_FDEQ_GAIN_14 +211 0x4848 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0202 //RX_FDEQ_BIN_0 +221 0x0203 //RX_FDEQ_BIN_1 +222 0x0303 //RX_FDEQ_BIN_2 +223 0x0304 //RX_FDEQ_BIN_3 +224 0x0404 //RX_FDEQ_BIN_4 +225 0x0204 //RX_FDEQ_BIN_5 +226 0x0A0A //RX_FDEQ_BIN_6 +227 0x0A0A //RX_FDEQ_BIN_7 +228 0x0B0C //RX_FDEQ_BIN_8 +229 0x0D0E //RX_FDEQ_BIN_9 +230 0x0E0F //RX_FDEQ_BIN_10 +231 0x0F10 //RX_FDEQ_BIN_11 +232 0x1011 //RX_FDEQ_BIN_12 +233 0x1104 //RX_FDEQ_BIN_13 +234 0x0000 //RX_FDEQ_BIN_14 +235 0x0000 //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x4000 //RX_FDEQ_RESRV_0 +245 0x0320 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0035 //RX_FDDRC_BAND_MARGIN_1 +248 0x00D5 //RX_FDDRC_BAND_MARGIN_2 +249 0x0120 //RX_FDDRC_BAND_MARGIN_3 +250 0x0004 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x2000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x2000 //RX_FDDRC_THRD_3_2 +258 0x5000 //RX_FDDRC_THRD_3_3 +259 0x4000 //RX_FDDRC_SLANT_0_0 +260 0x4000 //RX_FDDRC_SLANT_0_1 +261 0x4000 //RX_FDDRC_SLANT_0_2 +262 0x4000 //RX_FDDRC_SLANT_0_3 +263 0x7FFF //RX_FDDRC_SLANT_1_0 +264 0x7FFF //RX_FDDRC_SLANT_1_1 +265 0x7FFF //RX_FDDRC_SLANT_1_2 +266 0x7FFF //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +286 0x0034 //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 +#VOL 4 +163 0x6000 //RX_TDDRC_ALPHA_UP_1 +164 0x6000 //RX_TDDRC_ALPHA_UP_2 +165 0x6000 //RX_TDDRC_ALPHA_UP_3 +166 0x1000 //RX_TDDRC_ALPHA_UP_4 +184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +185 0x4000 //RX_TDDRC_ALPHA_DWN_2 +186 0x4000 //RX_TDDRC_ALPHA_DWN_3 +189 0x4000 //RX_TDDRC_ALPHA_DWN_4 +190 0x7214 //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +269 0x0002 //RX_TDDRC_THRD_0 +270 0x0004 //RX_TDDRC_THRD_1 +271 0x1800 //RX_TDDRC_THRD_2 +272 0x1800 //RX_TDDRC_THRD_3 +273 0x7FFF //RX_TDDRC_SLANT_0 +274 0x7FFF //RX_TDDRC_SLANT_1 +275 0x6000 //RX_TDDRC_ALPHA_UP_0 +276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x199A //RX_TDDRC_HMNC_GAIN +279 0x0001 //RX_TDDRC_SMT_FLAG +280 0x0CCD //RX_TDDRC_SMT_W +281 0x0B39 //RX_TDDRC_DRC_GAIN +195 0x001C //RX_FDEQ_SUBNUM +196 0x6868 //RX_FDEQ_GAIN_0 +197 0x685C //RX_FDEQ_GAIN_1 +198 0x6868 //RX_FDEQ_GAIN_2 +199 0x544C //RX_FDEQ_GAIN_3 +200 0x4C54 //RX_FDEQ_GAIN_4 +201 0x704C //RX_FDEQ_GAIN_5 +202 0x4C40 //RX_FDEQ_GAIN_6 +203 0x4040 //RX_FDEQ_GAIN_7 +204 0x445C //RX_FDEQ_GAIN_8 +205 0x6068 //RX_FDEQ_GAIN_9 +206 0x7070 //RX_FDEQ_GAIN_10 +207 0x7C74 //RX_FDEQ_GAIN_11 +208 0x6060 //RX_FDEQ_GAIN_12 +209 0x6C6C //RX_FDEQ_GAIN_13 +210 0x4848 //RX_FDEQ_GAIN_14 +211 0x4848 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0202 //RX_FDEQ_BIN_0 +221 0x0203 //RX_FDEQ_BIN_1 +222 0x0303 //RX_FDEQ_BIN_2 +223 0x0304 //RX_FDEQ_BIN_3 +224 0x0404 //RX_FDEQ_BIN_4 +225 0x0204 //RX_FDEQ_BIN_5 +226 0x0A0A //RX_FDEQ_BIN_6 +227 0x0A0A //RX_FDEQ_BIN_7 +228 0x0B0C //RX_FDEQ_BIN_8 +229 0x0D0E //RX_FDEQ_BIN_9 +230 0x0E0F //RX_FDEQ_BIN_10 +231 0x0F10 //RX_FDEQ_BIN_11 +232 0x1011 //RX_FDEQ_BIN_12 +233 0x1104 //RX_FDEQ_BIN_13 +234 0x0000 //RX_FDEQ_BIN_14 +235 0x0000 //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x4000 //RX_FDEQ_RESRV_0 +245 0x0320 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0035 //RX_FDDRC_BAND_MARGIN_1 +248 0x00D5 //RX_FDDRC_BAND_MARGIN_2 +249 0x0120 //RX_FDDRC_BAND_MARGIN_3 +250 0x0004 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x2000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x2000 //RX_FDDRC_THRD_3_2 +258 0x5000 //RX_FDDRC_THRD_3_3 +259 0x4000 //RX_FDDRC_SLANT_0_0 +260 0x4000 //RX_FDDRC_SLANT_0_1 +261 0x4000 //RX_FDDRC_SLANT_0_2 +262 0x4000 //RX_FDDRC_SLANT_0_3 +263 0x7FFF //RX_FDDRC_SLANT_1_0 +264 0x7FFF //RX_FDDRC_SLANT_1_1 +265 0x7FFF //RX_FDDRC_SLANT_1_2 +266 0x7FFF //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +286 0x0038 //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 +#VOL 5 +163 0x6000 //RX_TDDRC_ALPHA_UP_1 +164 0x6000 //RX_TDDRC_ALPHA_UP_2 +165 0x6000 //RX_TDDRC_ALPHA_UP_3 +166 0x1000 //RX_TDDRC_ALPHA_UP_4 +184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +185 0x4000 //RX_TDDRC_ALPHA_DWN_2 +186 0x4000 //RX_TDDRC_ALPHA_DWN_3 +189 0x4000 //RX_TDDRC_ALPHA_DWN_4 +190 0x7214 //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +269 0x0002 //RX_TDDRC_THRD_0 +270 0x0004 //RX_TDDRC_THRD_1 +271 0x1800 //RX_TDDRC_THRD_2 +272 0x1800 //RX_TDDRC_THRD_3 +273 0x7FFF //RX_TDDRC_SLANT_0 +274 0x7FFF //RX_TDDRC_SLANT_1 +275 0x6000 //RX_TDDRC_ALPHA_UP_0 +276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x199A //RX_TDDRC_HMNC_GAIN +279 0x0001 //RX_TDDRC_SMT_FLAG +280 0x0CCD //RX_TDDRC_SMT_W +281 0x0B39 //RX_TDDRC_DRC_GAIN +195 0x001C //RX_FDEQ_SUBNUM +196 0x6868 //RX_FDEQ_GAIN_0 +197 0x685C //RX_FDEQ_GAIN_1 +198 0x6868 //RX_FDEQ_GAIN_2 +199 0x544C //RX_FDEQ_GAIN_3 +200 0x4C54 //RX_FDEQ_GAIN_4 +201 0x704C //RX_FDEQ_GAIN_5 +202 0x4C40 //RX_FDEQ_GAIN_6 +203 0x4040 //RX_FDEQ_GAIN_7 +204 0x445C //RX_FDEQ_GAIN_8 +205 0x6068 //RX_FDEQ_GAIN_9 +206 0x7070 //RX_FDEQ_GAIN_10 +207 0x7C74 //RX_FDEQ_GAIN_11 +208 0x6060 //RX_FDEQ_GAIN_12 +209 0x6C6C //RX_FDEQ_GAIN_13 +210 0x4848 //RX_FDEQ_GAIN_14 +211 0x4848 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0202 //RX_FDEQ_BIN_0 +221 0x0203 //RX_FDEQ_BIN_1 +222 0x0303 //RX_FDEQ_BIN_2 +223 0x0304 //RX_FDEQ_BIN_3 +224 0x0404 //RX_FDEQ_BIN_4 +225 0x0204 //RX_FDEQ_BIN_5 +226 0x0A0A //RX_FDEQ_BIN_6 +227 0x0A0A //RX_FDEQ_BIN_7 +228 0x0B0C //RX_FDEQ_BIN_8 +229 0x0D0E //RX_FDEQ_BIN_9 +230 0x0E0F //RX_FDEQ_BIN_10 +231 0x0F10 //RX_FDEQ_BIN_11 +232 0x1011 //RX_FDEQ_BIN_12 +233 0x1104 //RX_FDEQ_BIN_13 +234 0x0000 //RX_FDEQ_BIN_14 +235 0x0000 //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x4000 //RX_FDEQ_RESRV_0 +245 0x0320 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0035 //RX_FDDRC_BAND_MARGIN_1 +248 0x00D5 //RX_FDDRC_BAND_MARGIN_2 +249 0x0120 //RX_FDDRC_BAND_MARGIN_3 +250 0x0004 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x2000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x2000 //RX_FDDRC_THRD_3_2 +258 0x5000 //RX_FDDRC_THRD_3_3 +259 0x4000 //RX_FDDRC_SLANT_0_0 +260 0x4000 //RX_FDDRC_SLANT_0_1 +261 0x4000 //RX_FDDRC_SLANT_0_2 +262 0x4000 //RX_FDDRC_SLANT_0_3 +263 0x7FFF //RX_FDDRC_SLANT_1_0 +264 0x7FFF //RX_FDDRC_SLANT_1_1 +265 0x7FFF //RX_FDDRC_SLANT_1_2 +266 0x7FFF //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +286 0x0060 //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 +#VOL 6 +163 0x6000 //RX_TDDRC_ALPHA_UP_1 +164 0x6000 //RX_TDDRC_ALPHA_UP_2 +165 0x6000 //RX_TDDRC_ALPHA_UP_3 +166 0x1000 //RX_TDDRC_ALPHA_UP_4 +184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +185 0x4000 //RX_TDDRC_ALPHA_DWN_2 +186 0x4000 //RX_TDDRC_ALPHA_DWN_3 +189 0x4000 //RX_TDDRC_ALPHA_DWN_4 +190 0x7214 //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +269 0x0002 //RX_TDDRC_THRD_0 +270 0x0004 //RX_TDDRC_THRD_1 +271 0x1800 //RX_TDDRC_THRD_2 +272 0x1800 //RX_TDDRC_THRD_3 +273 0x7FFF //RX_TDDRC_SLANT_0 +274 0x7FFF //RX_TDDRC_SLANT_1 +275 0x6000 //RX_TDDRC_ALPHA_UP_0 +276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x199A //RX_TDDRC_HMNC_GAIN +279 0x0001 //RX_TDDRC_SMT_FLAG +280 0x0CCD //RX_TDDRC_SMT_W +281 0x0B39 //RX_TDDRC_DRC_GAIN +195 0x001C //RX_FDEQ_SUBNUM +196 0x6868 //RX_FDEQ_GAIN_0 +197 0x685C //RX_FDEQ_GAIN_1 +198 0x6868 //RX_FDEQ_GAIN_2 +199 0x544C //RX_FDEQ_GAIN_3 +200 0x4C54 //RX_FDEQ_GAIN_4 +201 0x704C //RX_FDEQ_GAIN_5 +202 0x4C40 //RX_FDEQ_GAIN_6 +203 0x4040 //RX_FDEQ_GAIN_7 +204 0x445C //RX_FDEQ_GAIN_8 +205 0x6068 //RX_FDEQ_GAIN_9 +206 0x7070 //RX_FDEQ_GAIN_10 +207 0x7C74 //RX_FDEQ_GAIN_11 +208 0x6060 //RX_FDEQ_GAIN_12 +209 0x6C6C //RX_FDEQ_GAIN_13 +210 0x4848 //RX_FDEQ_GAIN_14 +211 0x4848 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0202 //RX_FDEQ_BIN_0 +221 0x0203 //RX_FDEQ_BIN_1 +222 0x0303 //RX_FDEQ_BIN_2 +223 0x0304 //RX_FDEQ_BIN_3 +224 0x0404 //RX_FDEQ_BIN_4 +225 0x0204 //RX_FDEQ_BIN_5 +226 0x0A0A //RX_FDEQ_BIN_6 +227 0x0A0A //RX_FDEQ_BIN_7 +228 0x0B0C //RX_FDEQ_BIN_8 +229 0x0D0E //RX_FDEQ_BIN_9 +230 0x0E0F //RX_FDEQ_BIN_10 +231 0x0F10 //RX_FDEQ_BIN_11 +232 0x1011 //RX_FDEQ_BIN_12 +233 0x1104 //RX_FDEQ_BIN_13 +234 0x0000 //RX_FDEQ_BIN_14 +235 0x0000 //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x4000 //RX_FDEQ_RESRV_0 +245 0x0320 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0035 //RX_FDDRC_BAND_MARGIN_1 +248 0x00D5 //RX_FDDRC_BAND_MARGIN_2 +249 0x0120 //RX_FDDRC_BAND_MARGIN_3 +250 0x0004 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x2000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x2000 //RX_FDDRC_THRD_3_2 +258 0x5000 //RX_FDDRC_THRD_3_3 +259 0x4000 //RX_FDDRC_SLANT_0_0 +260 0x4000 //RX_FDDRC_SLANT_0_1 +261 0x4000 //RX_FDDRC_SLANT_0_2 +262 0x4000 //RX_FDDRC_SLANT_0_3 +263 0x7FFF //RX_FDDRC_SLANT_1_0 +264 0x7FFF //RX_FDDRC_SLANT_1_1 +265 0x7FFF //RX_FDDRC_SLANT_1_2 +266 0x7FFF //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +286 0x0100 //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 #CASE_NAME HEADSET-TTY_HCO-VOICE_GENERIC-SWB -#PARAM_MODE FULL -#PARAM_TYPE TX+RX -#TOTAL_CUSTOM_STEP 7 +#PARAM_MODE Full +#PARAM_TYPE TX+2RX +#TOTAL_CUSTOM_STEP 7+7 #TX 0 0x0001 //TX_OPERATION_MODE_0 1 0x0000 //TX_OPERATION_MODE_1 @@ -38838,7 +58990,7 @@ 239 0x0000 //TX_DT_RESRV_7 240 0x0000 //TX_DT_RESRV_8 241 0x0000 //TX_DT_RESRV_9 -242 0xF200 //TX_THR_SN_EST_0 +242 0xFA00 //TX_THR_SN_EST_0 243 0xF400 //TX_THR_SN_EST_1 244 0xF800 //TX_THR_SN_EST_2 245 0xF600 //TX_THR_SN_EST_3 @@ -38847,12 +58999,12 @@ 248 0xF800 //TX_THR_SN_EST_6 249 0xF800 //TX_THR_SN_EST_7 250 0x0100 //TX_DELTA_THR_SN_EST_0 -251 0x0000 //TX_DELTA_THR_SN_EST_1 +251 0x0100 //TX_DELTA_THR_SN_EST_1 252 0x0100 //TX_DELTA_THR_SN_EST_2 -253 0x0100 //TX_DELTA_THR_SN_EST_3 +253 0x0200 //TX_DELTA_THR_SN_EST_3 254 0x0200 //TX_DELTA_THR_SN_EST_4 255 0x0200 //TX_DELTA_THR_SN_EST_5 -256 0x0200 //TX_DELTA_THR_SN_EST_6 +256 0x0000 //TX_DELTA_THR_SN_EST_6 257 0x0200 //TX_DELTA_THR_SN_EST_7 258 0x4000 //TX_LAMBDA_NN_EST_0 259 0x4000 //TX_LAMBDA_NN_EST_1 @@ -38878,12 +59030,12 @@ 279 0x0000 //TX_B_POST_FLT_0 280 0x0000 //TX_B_POST_FLT_1 281 0x001A //TX_NS_LVL_CTRL_0 -282 0x001A //TX_NS_LVL_CTRL_1 +282 0x0014 //TX_NS_LVL_CTRL_1 283 0x0014 //TX_NS_LVL_CTRL_2 -284 0x0014 //TX_NS_LVL_CTRL_3 +284 0x000C //TX_NS_LVL_CTRL_3 285 0x000C //TX_NS_LVL_CTRL_4 286 0x000C //TX_NS_LVL_CTRL_5 -287 0x000C //TX_NS_LVL_CTRL_6 +287 0x001A //TX_NS_LVL_CTRL_6 288 0x000C //TX_NS_LVL_CTRL_7 289 0x000E //TX_MIN_GAIN_S_0 290 0x0014 //TX_MIN_GAIN_S_1 @@ -38899,10 +59051,10 @@ 300 0x7FFF //TX_SNRI_SUP_0 301 0x7FFF //TX_SNRI_SUP_1 302 0x7FFF //TX_SNRI_SUP_2 -303 0x7FFF //TX_SNRI_SUP_3 +303 0x4000 //TX_SNRI_SUP_3 304 0x4000 //TX_SNRI_SUP_4 305 0x4000 //TX_SNRI_SUP_5 -306 0x4000 //TX_SNRI_SUP_6 +306 0x7FFF //TX_SNRI_SUP_6 307 0x4000 //TX_SNRI_SUP_7 308 0x1200 //TX_THR_LFNS 309 0x0147 //TX_G_LFNS @@ -38911,12 +59063,12 @@ 312 0x7FFF //TX_A_POST_FILT_0 313 0x7FFF //TX_A_POST_FILT_1 314 0x4000 //TX_A_POST_FILT_S_0 -315 0x199A //TX_A_POST_FILT_S_1 +315 0x1000 //TX_A_POST_FILT_S_1 316 0x1000 //TX_A_POST_FILT_S_2 -317 0x1000 //TX_A_POST_FILT_S_3 +317 0x6666 //TX_A_POST_FILT_S_3 318 0x6666 //TX_A_POST_FILT_S_4 319 0x6666 //TX_A_POST_FILT_S_5 -320 0x6666 //TX_A_POST_FILT_S_6 +320 0x199A //TX_A_POST_FILT_S_6 321 0x6666 //TX_A_POST_FILT_S_7 322 0x2000 //TX_B_POST_FILT_0 323 0x2000 //TX_B_POST_FILT_1 @@ -38963,7 +59115,7 @@ 364 0x0000 //TX_K_APT 365 0x0001 //TX_NOISEDET 366 0x05A0 //TX_NDETCT -367 0x000A //TX_NOISE_TH_0 +367 0x0383 //TX_NOISE_TH_0 368 0x1388 //TX_NOISE_TH_0_2 369 0x3A98 //TX_NOISE_TH_0_3 370 0x0C80 //TX_NOISE_TH_1 @@ -38975,11 +59127,11 @@ 376 0x7FFF //TX_NOISE_TH_5_3 377 0x7FFF //TX_NOISE_TH_5_4 378 0x00C8 //TX_NOISE_TH_6 -379 0x000A //TX_MINENOISE_TH -380 0x0000 //TX_MINENOISE_MIC0_TH_MTS -381 0x0000 //TX_MINENOISE_MIC0_TH_EXP -382 0x0000 //TX_MINENOISE_MIC0_S_TH_MTS -383 0x0000 //TX_MINENOISE_MIC0_S_TH_EXP +379 0x044C //TX_MINENOISE_TH +380 0xD508 //TX_MORENS_TFMASK_TH +381 0x0001 //TX_DRC_QUIET_FLOOR +382 0x3A98 //TX_RATIODTL_CUT_TH +383 0x0DAC //TX_DT_CUT_K1 384 0x6400 //TX_OUT_ENER_S_TH_CLEAN 385 0x6400 //TX_OUT_ENER_S_TH_LESSCLEAN 386 0x6400 //TX_OUT_ENER_S_TH_NOISY @@ -38987,22 +59139,22 @@ 388 0x7D00 //TX_OUT_ENER_TH_SPEECH 389 0x0000 //TX_SN_NPB_GAIN 390 0x0000 //TX_NN_NPB_GAIN -391 0x0000 //TX_CSX_ALPHA_0 -392 0x0000 //TX_CSX_ALPHA_1 -393 0x0000 //TX_CSX_ALPHA_2 -394 0x0000 //TX_CSX_ALPHA_3 -395 0x0000 //TX_MU_ARSP_EST -396 0x0000 //TX_P_OUTBEAM_MIN_TH +391 0x7FFF //TX_POST_MASK_SUP_HSNE +392 0x1388 //TX_TAIL_DET_TH +393 0x4000 //TX_B_LESSCUT_RTO_WTA +394 0x0000 //TX_MEL_G_R +395 0x0080 //TX_SUPHIGH_TH +396 0x0000 //TX_MASK_G_R 397 0x0000 //TX_EXTRA_NS_L -398 0x0000 //TX_EXTRA_NS_A -399 0x0000 //TX_VR_NOISE_FLOOR_TH +398 0x1800 //TX_C_POST_FLT_MASK +399 0x7FFF //TX_A_POST_FLT_WNS 400 0x0000 //TX_MIN_G_LOW300HZ 401 0x0010 //TX_MAXLEVEL_CNG 402 0x0000 //TX_STN_NOISE_TH 403 0x0000 //TX_POST_MASK_SUP 404 0x0000 //TX_POST_MASK_ADJUST 405 0x0014 //TX_NS_ENOISE_MIC0_TH -406 0x0014 //TX_MINENOISE_MIC0_TH +406 0x02F3 //TX_MINENOISE_MIC0_TH 407 0x0226 //TX_MINENOISE_MIC0_S_TH 408 0x2879 //TX_MIN_G_CTRL_SSNS 409 0x0400 //TX_METAL_RTO_THR @@ -39110,16 +59262,16 @@ 511 0x6666 //TX_MIC_TO_BFGAIN 512 0x6666 //TX_MICTOBFGAIN0 513 0x0014 //TX_FASTMUE_TH -514 0x0000 //TX_DERVB_LEN_0 -515 0x0000 //TX_DERVB_LEN_1 -516 0x0000 //TX_RHO_DERVB -517 0x0000 //TX_MIC_INDX_DERVB -518 0x0000 //TX_MU_DERVB -519 0x0000 //TX_DR_RESRV_0 -520 0x0000 //TX_DR_RESRV_1 -521 0x0000 //TX_DR_RESRV_2 -522 0x0000 //TX_DR_RESRV_3 -523 0x0000 //TX_DR_RESRV_4 +514 0xC000 //TX_DEREVERB_LF_MU +515 0xC000 //TX_DEREVERB_HF_MU +516 0xCCCC //TX_DEREVERB_DELAY +517 0xD999 //TX_DEREVERB_COEF_LEN +518 0x1F40 //TX_DEREVERB_DNR +519 0x0000 //TX_DEREVERB_ALPHA +520 0x0000 //TX_DEREVERB_BETA +521 0x0000 //TX_GSC_RTOL_TH +522 0x7000 //TX_GSC_RTOH_TH +523 0x0064 //TX_WIDE2_MEANHTH 524 0x0000 //TX_DR_RESRV_5 525 0x0000 //TX_DR_RESRV_6 526 0x0000 //TX_DR_RESRV_7 @@ -39485,16 +59637,81 @@ 886 0x0000 //TX_FASTNS_TFMASKBIN_TH2 887 0x0000 //TX_FASTNS_TFMASKBIN_TH3 888 0x00C8 //TX_FASTNS_ARSPC_TH -889 0xD99A //TX_FASTNS_MASK5_TH +889 0x8000 //TX_FASTNS_MASK5_TH 890 0x051F //TX_POSTSSA_MIN_G_VR_MASK -891 0x7FFF //TX_A_LESSCUT_RTO_MASK +891 0x4000 //TX_A_LESSCUT_RTO_MASK 892 0x1770 //TX_FASTNS_NOISETH 893 0xC000 //TX_FASTNS_SSA_THLFL 894 0xC000 //TX_FASTNS_SSA_THHFL 895 0xCCCC //TX_FASTNS_SSA_THLFH 896 0xD999 //TX_FASTNS_SSA_THHFH +897 0x2339 //TX_SENDFUNC_REG_MICMUTE +898 0x0021 //TX_SENDFUNC_REG_MICMUTE1 +899 0x02BC //TX_MICMUTE_RATIO_THR +900 0x0140 //TX_MICMUTE_AMP_THR +901 0x0004 //TX_MICMUTE_HPF_IND +902 0x00C0 //TX_MICMUTE_LOG_EYR_TH +903 0x0008 //TX_MICMUTE_CVG_TIME +904 0x0008 //TX_MICMUTE_RELEASE_TIME +905 0x01FE //TX_MIC_VOLUME_MIC0MUTE +906 0x0020 //TX_MICMUTE_EPD_OFFSET_0 +907 0x001E //TX_MICMUTE_FRQ_AEC_L +908 0x7999 //TX_MICMUTE_EAD_THR +909 0x7FFF //TX_MICMUTE_LAMBDA_CB_NLE +910 0x7FFF //TX_MICMUTE_LAMBDA_RE_EST +911 0x4000 //TX_DTD_THR1_MICMUTE_0 +912 0x7000 //TX_DTD_THR1_MICMUTE_1 +913 0x7FFF //TX_DTD_THR1_MICMUTE_2 +914 0x7FFF //TX_DTD_THR1_MICMUTE_3 +915 0x6CCC //TX_DTD_THR2_MICMUTE_0 +916 0x0400 //TX_MICMUTE_MIN_EQ_RE_EST_0 +917 0x0400 //TX_MICMUTE_MIN_EQ_RE_EST_1 +918 0x1000 //TX_MICMUTE_MIN_EQ_RE_EST_2 +919 0x7FFF //TX_MICMUTE_MIN_EQ_RE_EST_3 +920 0x7FFF //TX_MICMUTE_MIN_EQ_RE_EST_4 +921 0x4000 //TX_MICMUTE_C_POST_FLT +922 0x03E8 //TX_MICMUTE_DT_CUT_K +923 0x0001 //TX_MICMUTE_DT_CUT_THR +924 0x03E8 //TX_MICMUTE_DT_CUT_K2 +925 0x0001 //TX_MICMUTE_DT_CUT_THR2 +926 0x0064 //TX_MICMUTE_DT2_HOLD_N +927 0x1000 //TX_MICMUTE_RATIODTH_THCUT +928 0x1000 //TX_MICMUTE_B_POST_FLT_ECHOL +929 0x7FFF //TX_MICMUTE_B_POST_FLT_ECHOH +930 0x0400 //TX_MICMUTE_C_POST_FLT_MASK +931 0x7999 //TX_MICMUTE_RATIODTL_CUT_TH +932 0x0258 //TX_MICMUTE_DT_CUT_K1 +933 0x0800 //TX_MICMUTE_N2_SN_EST +934 0xFC00 //TX_MICMUTE_THR_SN_EST_0 +935 0x001C //TX_MICMUTE_MIN_G_CTRL_0 +936 0x6000 //TX_MICMUTE_A_POST_FILT_S_0 +937 0x7000 //TX_MICMUTE_B_POST_FILT_0 +938 0x2710 //TX_MIC1RUB_AMP_THR +939 0x0010 //TX_MIC1MUTE_RATIO_THR +940 0x0450 //TX_MIC1MUTE_AMP_THR +941 0x0008 //TX_MIC1MUTE_CVG_TIME +942 0x0008 //TX_MIC1MUTE_RELEASE_TIME +943 0x0000 //TX_AMS_RESRV_01 +944 0x0000 //TX_AMS_RESRV_02 +945 0x0000 //TX_AMS_RESRV_03 +946 0x0000 //TX_AMS_RESRV_04 +947 0x0000 //TX_AMS_RESRV_05 +948 0x0000 //TX_AMS_RESRV_06 +949 0x0000 //TX_AMS_RESRV_07 +950 0x0000 //TX_AMS_RESRV_08 +951 0x0000 //TX_AMS_RESRV_09 +952 0x0000 //TX_AMS_RESRV_10 +953 0x0000 //TX_AMS_RESRV_11 +954 0x0000 //TX_AMS_RESRV_12 +955 0x0000 //TX_AMS_RESRV_13 +956 0x0000 //TX_AMS_RESRV_14 +957 0x0000 //TX_AMS_RESRV_15 +958 0x0000 //TX_AMS_RESRV_16 +959 0x0000 //TX_AMS_RESRV_17 +960 0x0000 //TX_AMS_RESRV_18 +961 0x0000 //TX_AMS_RESRV_19 #RX -0 0x027C //RX_RECVFUNC_MODE_0 +0 0x243C //RX_RECVFUNC_MODE_0 1 0x0000 //RX_RECVFUNC_MODE_1 2 0x0003 //RX_SAMPLINGFREQ_SIG 3 0x0003 //RX_SAMPLINGFREQ_PROC @@ -39504,8 +59721,8 @@ 7 0x6000 //RX_TDDRC_ALPHA_UP_2 8 0x6000 //RX_TDDRC_ALPHA_UP_3 9 0x1000 //RX_TDDRC_ALPHA_UP_4 -10 0x0800 //RX_PGA -11 0x7652 //RX_A_HP +10 0x0403 //RX_PGA +11 0x7D83 //RX_A_HP 12 0x4000 //RX_B_PE 13 0x7800 //RX_THR_PITCH_DET_0 14 0x7000 //RX_THR_PITCH_DET_1 @@ -39533,22 +59750,22 @@ 36 0x0000 //RX_LMT_THRD 37 0x4000 //RX_LMT_ALPHA 38 0x0020 //RX_FDEQ_SUBNUM -39 0x484E //RX_FDEQ_GAIN_0 -40 0x4E4E //RX_FDEQ_GAIN_1 -41 0x4E4E //RX_FDEQ_GAIN_2 +39 0x4848 //RX_FDEQ_GAIN_0 +40 0x4848 //RX_FDEQ_GAIN_1 +41 0x4848 //RX_FDEQ_GAIN_2 42 0x4848 //RX_FDEQ_GAIN_3 -43 0x484E //RX_FDEQ_GAIN_4 -44 0x6E4E //RX_FDEQ_GAIN_5 -45 0x4850 //RX_FDEQ_GAIN_6 +43 0x4848 //RX_FDEQ_GAIN_4 +44 0x7C48 //RX_FDEQ_GAIN_5 +45 0x4848 //RX_FDEQ_GAIN_6 46 0x4848 //RX_FDEQ_GAIN_7 47 0x4860 //RX_FDEQ_GAIN_8 48 0x7468 //RX_FDEQ_GAIN_9 -49 0x6060 //RX_FDEQ_GAIN_10 -50 0x6666 //RX_FDEQ_GAIN_11 -51 0x6666 //RX_FDEQ_GAIN_12 -52 0x6666 //RX_FDEQ_GAIN_13 -53 0x6060 //RX_FDEQ_GAIN_14 -54 0x6060 //RX_FDEQ_GAIN_15 +49 0x5858 //RX_FDEQ_GAIN_10 +50 0x5858 //RX_FDEQ_GAIN_11 +51 0x5C54 //RX_FDEQ_GAIN_12 +52 0x5448 //RX_FDEQ_GAIN_13 +53 0x4848 //RX_FDEQ_GAIN_14 +54 0x5858 //RX_FDEQ_GAIN_15 55 0x4848 //RX_FDEQ_GAIN_16 56 0x4848 //RX_FDEQ_GAIN_17 57 0x4848 //RX_FDEQ_GAIN_18 @@ -39562,7 +59779,7 @@ 65 0x0303 //RX_FDEQ_BIN_2 66 0x0304 //RX_FDEQ_BIN_3 67 0x0404 //RX_FDEQ_BIN_4 -68 0x0209 //RX_FDEQ_BIN_5 +68 0x0308 //RX_FDEQ_BIN_5 69 0x0808 //RX_FDEQ_BIN_6 70 0x090A //RX_FDEQ_BIN_7 71 0x0B0C //RX_FDEQ_BIN_8 @@ -39618,12 +59835,12 @@ 121 0x199A //RX_TDDRC_HMNC_GAIN 122 0x0001 //RX_TDDRC_SMT_FLAG 123 0x0CCD //RX_TDDRC_SMT_W -124 0x04BC //RX_TDDRC_DRC_GAIN +124 0x0550 //RX_TDDRC_DRC_GAIN 125 0x7C00 //RX_LAMBDA_PKA_FP -126 0x2000 //RX_TPKA_FP -127 0x2000 //RX_MIN_G_FP -128 0x0080 //RX_MAX_G_FP -129 0x0019 //RX_SPK_VOL +126 0x0FA0 //RX_TPKA_FP +127 0x0400 //RX_MIN_G_FP +128 0x0800 //RX_MAX_G_FP +129 0x0014 //RX_SPK_VOL 130 0x0000 //RX_VOL_RESRV_0 131 0x0000 //RX_MAXLEVEL_CNG 132 0x3000 //RX_BWE_UV_TH @@ -39657,41 +59874,41 @@ 8 0x6000 //RX_TDDRC_ALPHA_UP_3 9 0x1000 //RX_TDDRC_ALPHA_UP_4 27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 -28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 -29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 -32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +28 0x4000 //RX_TDDRC_ALPHA_DWN_2 +29 0x4000 //RX_TDDRC_ALPHA_DWN_3 +32 0x4000 //RX_TDDRC_ALPHA_DWN_4 33 0x7214 //RX_TDDRC_LIMITER_THRD 34 0x0800 //RX_TDDRC_LIMITER_GAIN 112 0x0002 //RX_TDDRC_THRD_0 113 0x0004 //RX_TDDRC_THRD_1 -114 0x1A00 //RX_TDDRC_THRD_2 -115 0x1A00 //RX_TDDRC_THRD_3 -116 0x7EB8 //RX_TDDRC_SLANT_0 -117 0x2500 //RX_TDDRC_SLANT_1 +114 0x1800 //RX_TDDRC_THRD_2 +115 0x1800 //RX_TDDRC_THRD_3 +116 0x7FFF //RX_TDDRC_SLANT_0 +117 0x7FFF //RX_TDDRC_SLANT_1 118 0x6000 //RX_TDDRC_ALPHA_UP_0 119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 120 0x0000 //RX_TDDRC_HMNC_FLAG 121 0x199A //RX_TDDRC_HMNC_GAIN 122 0x0001 //RX_TDDRC_SMT_FLAG 123 0x0CCD //RX_TDDRC_SMT_W -124 0x04BC //RX_TDDRC_DRC_GAIN +124 0x0780 //RX_TDDRC_DRC_GAIN 38 0x0020 //RX_FDEQ_SUBNUM -39 0x484E //RX_FDEQ_GAIN_0 -40 0x4E4E //RX_FDEQ_GAIN_1 -41 0x4E4E //RX_FDEQ_GAIN_2 -42 0x4848 //RX_FDEQ_GAIN_3 -43 0x484E //RX_FDEQ_GAIN_4 -44 0x6E4E //RX_FDEQ_GAIN_5 -45 0x4850 //RX_FDEQ_GAIN_6 -46 0x4848 //RX_FDEQ_GAIN_7 -47 0x4860 //RX_FDEQ_GAIN_8 -48 0x7468 //RX_FDEQ_GAIN_9 -49 0x6060 //RX_FDEQ_GAIN_10 -50 0x6666 //RX_FDEQ_GAIN_11 -51 0x6666 //RX_FDEQ_GAIN_12 -52 0x6666 //RX_FDEQ_GAIN_13 -53 0x6060 //RX_FDEQ_GAIN_14 -54 0x6060 //RX_FDEQ_GAIN_15 +39 0x6868 //RX_FDEQ_GAIN_0 +40 0x6848 //RX_FDEQ_GAIN_1 +41 0x4848 //RX_FDEQ_GAIN_2 +42 0x3434 //RX_FDEQ_GAIN_3 +43 0x3840 //RX_FDEQ_GAIN_4 +44 0x4838 //RX_FDEQ_GAIN_5 +45 0x5444 //RX_FDEQ_GAIN_6 +46 0x443C //RX_FDEQ_GAIN_7 +47 0x3C60 //RX_FDEQ_GAIN_8 +48 0x6460 //RX_FDEQ_GAIN_9 +49 0x6064 //RX_FDEQ_GAIN_10 +50 0x5C5C //RX_FDEQ_GAIN_11 +51 0x5440 //RX_FDEQ_GAIN_12 +52 0x4040 //RX_FDEQ_GAIN_13 +53 0x4040 //RX_FDEQ_GAIN_14 +54 0x5858 //RX_FDEQ_GAIN_15 55 0x4848 //RX_FDEQ_GAIN_16 56 0x4848 //RX_FDEQ_GAIN_17 57 0x4848 //RX_FDEQ_GAIN_18 @@ -39705,7 +59922,106 @@ 65 0x0303 //RX_FDEQ_BIN_2 66 0x0304 //RX_FDEQ_BIN_3 67 0x0404 //RX_FDEQ_BIN_4 -68 0x0209 //RX_FDEQ_BIN_5 +68 0x0308 //RX_FDEQ_BIN_5 +69 0x0808 //RX_FDEQ_BIN_6 +70 0x090A //RX_FDEQ_BIN_7 +71 0x0B0C //RX_FDEQ_BIN_8 +72 0x0D0E //RX_FDEQ_BIN_9 +73 0x1013 //RX_FDEQ_BIN_10 +74 0x1719 //RX_FDEQ_BIN_11 +75 0x1B1E //RX_FDEQ_BIN_12 +76 0x1E1E //RX_FDEQ_BIN_13 +77 0x1E28 //RX_FDEQ_BIN_14 +78 0x282C //RX_FDEQ_BIN_15 +79 0x0000 //RX_FDEQ_BIN_16 +80 0x0000 //RX_FDEQ_BIN_17 +81 0x0000 //RX_FDEQ_BIN_18 +82 0x0000 //RX_FDEQ_BIN_19 +83 0x0000 //RX_FDEQ_BIN_20 +84 0x0000 //RX_FDEQ_BIN_21 +85 0x0000 //RX_FDEQ_BIN_22 +86 0x0000 //RX_FDEQ_BIN_23 +87 0x4000 //RX_FDEQ_RESRV_0 +88 0x0320 //RX_FDEQ_RESRV_1 +89 0x0018 //RX_FDDRC_BAND_MARGIN_0 +90 0x0035 //RX_FDDRC_BAND_MARGIN_1 +91 0x00D5 //RX_FDDRC_BAND_MARGIN_2 +92 0x0120 //RX_FDDRC_BAND_MARGIN_3 +93 0x0004 //RX_FDDRC_BLOCK_EXP +94 0x5000 //RX_FDDRC_THRD_2_0 +95 0x5000 //RX_FDDRC_THRD_2_1 +96 0x2000 //RX_FDDRC_THRD_2_2 +97 0x5000 //RX_FDDRC_THRD_2_3 +98 0x6400 //RX_FDDRC_THRD_3_0 +99 0x6400 //RX_FDDRC_THRD_3_1 +100 0x2000 //RX_FDDRC_THRD_3_2 +101 0x5000 //RX_FDDRC_THRD_3_3 +102 0x4000 //RX_FDDRC_SLANT_0_0 +103 0x4000 //RX_FDDRC_SLANT_0_1 +104 0x4000 //RX_FDDRC_SLANT_0_2 +105 0x4000 //RX_FDDRC_SLANT_0_3 +106 0x7FFF //RX_FDDRC_SLANT_1_0 +107 0x7FFF //RX_FDDRC_SLANT_1_1 +108 0x7FFF //RX_FDDRC_SLANT_1_2 +109 0x7FFF //RX_FDDRC_SLANT_1_3 +110 0x0000 //RX_FDDRC_RESRV_0 +129 0x0011 //RX_SPK_VOL +130 0x0000 //RX_VOL_RESRV_0 +#VOL 1 +6 0x6000 //RX_TDDRC_ALPHA_UP_1 +7 0x6000 //RX_TDDRC_ALPHA_UP_2 +8 0x6000 //RX_TDDRC_ALPHA_UP_3 +9 0x1000 //RX_TDDRC_ALPHA_UP_4 +27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +28 0x4000 //RX_TDDRC_ALPHA_DWN_2 +29 0x4000 //RX_TDDRC_ALPHA_DWN_3 +32 0x4000 //RX_TDDRC_ALPHA_DWN_4 +33 0x7214 //RX_TDDRC_LIMITER_THRD +34 0x0800 //RX_TDDRC_LIMITER_GAIN +112 0x0002 //RX_TDDRC_THRD_0 +113 0x0004 //RX_TDDRC_THRD_1 +114 0x1800 //RX_TDDRC_THRD_2 +115 0x1800 //RX_TDDRC_THRD_3 +116 0x7FFF //RX_TDDRC_SLANT_0 +117 0x7FFF //RX_TDDRC_SLANT_1 +118 0x6000 //RX_TDDRC_ALPHA_UP_0 +119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +120 0x0000 //RX_TDDRC_HMNC_FLAG +121 0x199A //RX_TDDRC_HMNC_GAIN +122 0x0001 //RX_TDDRC_SMT_FLAG +123 0x0CCD //RX_TDDRC_SMT_W +124 0x0780 //RX_TDDRC_DRC_GAIN +38 0x0020 //RX_FDEQ_SUBNUM +39 0x6868 //RX_FDEQ_GAIN_0 +40 0x6848 //RX_FDEQ_GAIN_1 +41 0x4848 //RX_FDEQ_GAIN_2 +42 0x3434 //RX_FDEQ_GAIN_3 +43 0x3840 //RX_FDEQ_GAIN_4 +44 0x4838 //RX_FDEQ_GAIN_5 +45 0x5444 //RX_FDEQ_GAIN_6 +46 0x443C //RX_FDEQ_GAIN_7 +47 0x3C60 //RX_FDEQ_GAIN_8 +48 0x6460 //RX_FDEQ_GAIN_9 +49 0x6064 //RX_FDEQ_GAIN_10 +50 0x5C5C //RX_FDEQ_GAIN_11 +51 0x5440 //RX_FDEQ_GAIN_12 +52 0x4040 //RX_FDEQ_GAIN_13 +53 0x4040 //RX_FDEQ_GAIN_14 +54 0x5858 //RX_FDEQ_GAIN_15 +55 0x4848 //RX_FDEQ_GAIN_16 +56 0x4848 //RX_FDEQ_GAIN_17 +57 0x4848 //RX_FDEQ_GAIN_18 +58 0x4848 //RX_FDEQ_GAIN_19 +59 0x4848 //RX_FDEQ_GAIN_20 +60 0x4848 //RX_FDEQ_GAIN_21 +61 0x4848 //RX_FDEQ_GAIN_22 +62 0x4848 //RX_FDEQ_GAIN_23 +63 0x0202 //RX_FDEQ_BIN_0 +64 0x0203 //RX_FDEQ_BIN_1 +65 0x0303 //RX_FDEQ_BIN_2 +66 0x0304 //RX_FDEQ_BIN_3 +67 0x0404 //RX_FDEQ_BIN_4 +68 0x0308 //RX_FDEQ_BIN_5 69 0x0808 //RX_FDEQ_BIN_6 70 0x090A //RX_FDEQ_BIN_7 71 0x0B0C //RX_FDEQ_BIN_8 @@ -39750,146 +60066,47 @@ 110 0x0000 //RX_FDDRC_RESRV_0 129 0x0019 //RX_SPK_VOL 130 0x0000 //RX_VOL_RESRV_0 -#VOL 1 -6 0x6000 //RX_TDDRC_ALPHA_UP_1 -7 0x6000 //RX_TDDRC_ALPHA_UP_2 -8 0x6000 //RX_TDDRC_ALPHA_UP_3 -9 0x1000 //RX_TDDRC_ALPHA_UP_4 -27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 -28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 -29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 -32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 -33 0x7214 //RX_TDDRC_LIMITER_THRD -34 0x0800 //RX_TDDRC_LIMITER_GAIN -112 0x0002 //RX_TDDRC_THRD_0 -113 0x0004 //RX_TDDRC_THRD_1 -114 0x1A00 //RX_TDDRC_THRD_2 -115 0x1A00 //RX_TDDRC_THRD_3 -116 0x7EB8 //RX_TDDRC_SLANT_0 -117 0x2500 //RX_TDDRC_SLANT_1 -118 0x6000 //RX_TDDRC_ALPHA_UP_0 -119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 -120 0x0000 //RX_TDDRC_HMNC_FLAG -121 0x199A //RX_TDDRC_HMNC_GAIN -122 0x0001 //RX_TDDRC_SMT_FLAG -123 0x0CCD //RX_TDDRC_SMT_W -124 0x04BC //RX_TDDRC_DRC_GAIN -38 0x0020 //RX_FDEQ_SUBNUM -39 0x484E //RX_FDEQ_GAIN_0 -40 0x4E4E //RX_FDEQ_GAIN_1 -41 0x4E4E //RX_FDEQ_GAIN_2 -42 0x4848 //RX_FDEQ_GAIN_3 -43 0x484E //RX_FDEQ_GAIN_4 -44 0x6E4E //RX_FDEQ_GAIN_5 -45 0x4850 //RX_FDEQ_GAIN_6 -46 0x4848 //RX_FDEQ_GAIN_7 -47 0x4860 //RX_FDEQ_GAIN_8 -48 0x7468 //RX_FDEQ_GAIN_9 -49 0x6060 //RX_FDEQ_GAIN_10 -50 0x6666 //RX_FDEQ_GAIN_11 -51 0x6666 //RX_FDEQ_GAIN_12 -52 0x6666 //RX_FDEQ_GAIN_13 -53 0x6060 //RX_FDEQ_GAIN_14 -54 0x6060 //RX_FDEQ_GAIN_15 -55 0x4848 //RX_FDEQ_GAIN_16 -56 0x4848 //RX_FDEQ_GAIN_17 -57 0x4848 //RX_FDEQ_GAIN_18 -58 0x4848 //RX_FDEQ_GAIN_19 -59 0x4848 //RX_FDEQ_GAIN_20 -60 0x4848 //RX_FDEQ_GAIN_21 -61 0x4848 //RX_FDEQ_GAIN_22 -62 0x4848 //RX_FDEQ_GAIN_23 -63 0x0202 //RX_FDEQ_BIN_0 -64 0x0203 //RX_FDEQ_BIN_1 -65 0x0303 //RX_FDEQ_BIN_2 -66 0x0304 //RX_FDEQ_BIN_3 -67 0x0404 //RX_FDEQ_BIN_4 -68 0x0209 //RX_FDEQ_BIN_5 -69 0x0808 //RX_FDEQ_BIN_6 -70 0x090A //RX_FDEQ_BIN_7 -71 0x0B0C //RX_FDEQ_BIN_8 -72 0x0D0E //RX_FDEQ_BIN_9 -73 0x1013 //RX_FDEQ_BIN_10 -74 0x1719 //RX_FDEQ_BIN_11 -75 0x1B1E //RX_FDEQ_BIN_12 -76 0x1E1E //RX_FDEQ_BIN_13 -77 0x1E28 //RX_FDEQ_BIN_14 -78 0x282C //RX_FDEQ_BIN_15 -79 0x0000 //RX_FDEQ_BIN_16 -80 0x0000 //RX_FDEQ_BIN_17 -81 0x0000 //RX_FDEQ_BIN_18 -82 0x0000 //RX_FDEQ_BIN_19 -83 0x0000 //RX_FDEQ_BIN_20 -84 0x0000 //RX_FDEQ_BIN_21 -85 0x0000 //RX_FDEQ_BIN_22 -86 0x0000 //RX_FDEQ_BIN_23 -87 0x4000 //RX_FDEQ_RESRV_0 -88 0x0320 //RX_FDEQ_RESRV_1 -89 0x0018 //RX_FDDRC_BAND_MARGIN_0 -90 0x0035 //RX_FDDRC_BAND_MARGIN_1 -91 0x00D5 //RX_FDDRC_BAND_MARGIN_2 -92 0x0120 //RX_FDDRC_BAND_MARGIN_3 -93 0x0004 //RX_FDDRC_BLOCK_EXP -94 0x5000 //RX_FDDRC_THRD_2_0 -95 0x5000 //RX_FDDRC_THRD_2_1 -96 0x2000 //RX_FDDRC_THRD_2_2 -97 0x5000 //RX_FDDRC_THRD_2_3 -98 0x6400 //RX_FDDRC_THRD_3_0 -99 0x6400 //RX_FDDRC_THRD_3_1 -100 0x2000 //RX_FDDRC_THRD_3_2 -101 0x5000 //RX_FDDRC_THRD_3_3 -102 0x4000 //RX_FDDRC_SLANT_0_0 -103 0x4000 //RX_FDDRC_SLANT_0_1 -104 0x4000 //RX_FDDRC_SLANT_0_2 -105 0x4000 //RX_FDDRC_SLANT_0_3 -106 0x7FFF //RX_FDDRC_SLANT_1_0 -107 0x7FFF //RX_FDDRC_SLANT_1_1 -108 0x7FFF //RX_FDDRC_SLANT_1_2 -109 0x7FFF //RX_FDDRC_SLANT_1_3 -110 0x0000 //RX_FDDRC_RESRV_0 -129 0x0023 //RX_SPK_VOL -130 0x0000 //RX_VOL_RESRV_0 #VOL 2 6 0x6000 //RX_TDDRC_ALPHA_UP_1 7 0x6000 //RX_TDDRC_ALPHA_UP_2 8 0x6000 //RX_TDDRC_ALPHA_UP_3 9 0x1000 //RX_TDDRC_ALPHA_UP_4 27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 -28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 -29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 -32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +28 0x4000 //RX_TDDRC_ALPHA_DWN_2 +29 0x4000 //RX_TDDRC_ALPHA_DWN_3 +32 0x4000 //RX_TDDRC_ALPHA_DWN_4 33 0x7214 //RX_TDDRC_LIMITER_THRD 34 0x0800 //RX_TDDRC_LIMITER_GAIN 112 0x0002 //RX_TDDRC_THRD_0 113 0x0004 //RX_TDDRC_THRD_1 -114 0x1A00 //RX_TDDRC_THRD_2 -115 0x1A00 //RX_TDDRC_THRD_3 -116 0x7EB8 //RX_TDDRC_SLANT_0 -117 0x2500 //RX_TDDRC_SLANT_1 +114 0x1800 //RX_TDDRC_THRD_2 +115 0x1800 //RX_TDDRC_THRD_3 +116 0x7FFF //RX_TDDRC_SLANT_0 +117 0x7FFF //RX_TDDRC_SLANT_1 118 0x6000 //RX_TDDRC_ALPHA_UP_0 119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 120 0x0000 //RX_TDDRC_HMNC_FLAG 121 0x199A //RX_TDDRC_HMNC_GAIN 122 0x0001 //RX_TDDRC_SMT_FLAG 123 0x0CCD //RX_TDDRC_SMT_W -124 0x04BC //RX_TDDRC_DRC_GAIN +124 0x0780 //RX_TDDRC_DRC_GAIN 38 0x0020 //RX_FDEQ_SUBNUM -39 0x484E //RX_FDEQ_GAIN_0 -40 0x4E4E //RX_FDEQ_GAIN_1 -41 0x4E4E //RX_FDEQ_GAIN_2 -42 0x4848 //RX_FDEQ_GAIN_3 -43 0x484E //RX_FDEQ_GAIN_4 -44 0x6E4E //RX_FDEQ_GAIN_5 -45 0x4850 //RX_FDEQ_GAIN_6 -46 0x4848 //RX_FDEQ_GAIN_7 -47 0x4860 //RX_FDEQ_GAIN_8 -48 0x7468 //RX_FDEQ_GAIN_9 -49 0x6060 //RX_FDEQ_GAIN_10 -50 0x6666 //RX_FDEQ_GAIN_11 -51 0x6666 //RX_FDEQ_GAIN_12 -52 0x6666 //RX_FDEQ_GAIN_13 -53 0x6060 //RX_FDEQ_GAIN_14 -54 0x6060 //RX_FDEQ_GAIN_15 +39 0x6868 //RX_FDEQ_GAIN_0 +40 0x6848 //RX_FDEQ_GAIN_1 +41 0x4848 //RX_FDEQ_GAIN_2 +42 0x3434 //RX_FDEQ_GAIN_3 +43 0x3840 //RX_FDEQ_GAIN_4 +44 0x4838 //RX_FDEQ_GAIN_5 +45 0x5444 //RX_FDEQ_GAIN_6 +46 0x443C //RX_FDEQ_GAIN_7 +47 0x3C60 //RX_FDEQ_GAIN_8 +48 0x6460 //RX_FDEQ_GAIN_9 +49 0x6064 //RX_FDEQ_GAIN_10 +50 0x5C5C //RX_FDEQ_GAIN_11 +51 0x5440 //RX_FDEQ_GAIN_12 +52 0x4040 //RX_FDEQ_GAIN_13 +53 0x4040 //RX_FDEQ_GAIN_14 +54 0x5858 //RX_FDEQ_GAIN_15 55 0x4848 //RX_FDEQ_GAIN_16 56 0x4848 //RX_FDEQ_GAIN_17 57 0x4848 //RX_FDEQ_GAIN_18 @@ -39903,7 +60120,7 @@ 65 0x0303 //RX_FDEQ_BIN_2 66 0x0304 //RX_FDEQ_BIN_3 67 0x0404 //RX_FDEQ_BIN_4 -68 0x0209 //RX_FDEQ_BIN_5 +68 0x0308 //RX_FDEQ_BIN_5 69 0x0808 //RX_FDEQ_BIN_6 70 0x090A //RX_FDEQ_BIN_7 71 0x0B0C //RX_FDEQ_BIN_8 @@ -39946,7 +60163,7 @@ 108 0x7FFF //RX_FDDRC_SLANT_1_2 109 0x7FFF //RX_FDDRC_SLANT_1_3 110 0x0000 //RX_FDDRC_RESRV_0 -129 0x0032 //RX_SPK_VOL +129 0x0025 //RX_SPK_VOL 130 0x0000 //RX_VOL_RESRV_0 #VOL 3 6 0x6000 //RX_TDDRC_ALPHA_UP_1 @@ -39954,41 +60171,41 @@ 8 0x6000 //RX_TDDRC_ALPHA_UP_3 9 0x1000 //RX_TDDRC_ALPHA_UP_4 27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 -28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 -29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 -32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +28 0x4000 //RX_TDDRC_ALPHA_DWN_2 +29 0x4000 //RX_TDDRC_ALPHA_DWN_3 +32 0x4000 //RX_TDDRC_ALPHA_DWN_4 33 0x7214 //RX_TDDRC_LIMITER_THRD 34 0x0800 //RX_TDDRC_LIMITER_GAIN 112 0x0002 //RX_TDDRC_THRD_0 113 0x0004 //RX_TDDRC_THRD_1 -114 0x1A00 //RX_TDDRC_THRD_2 -115 0x1A00 //RX_TDDRC_THRD_3 -116 0x7EB8 //RX_TDDRC_SLANT_0 -117 0x2500 //RX_TDDRC_SLANT_1 +114 0x1800 //RX_TDDRC_THRD_2 +115 0x1800 //RX_TDDRC_THRD_3 +116 0x7FFF //RX_TDDRC_SLANT_0 +117 0x7FFF //RX_TDDRC_SLANT_1 118 0x6000 //RX_TDDRC_ALPHA_UP_0 119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 120 0x0000 //RX_TDDRC_HMNC_FLAG 121 0x199A //RX_TDDRC_HMNC_GAIN 122 0x0001 //RX_TDDRC_SMT_FLAG 123 0x0CCD //RX_TDDRC_SMT_W -124 0x04BC //RX_TDDRC_DRC_GAIN +124 0x0780 //RX_TDDRC_DRC_GAIN 38 0x0020 //RX_FDEQ_SUBNUM -39 0x484E //RX_FDEQ_GAIN_0 -40 0x4E4E //RX_FDEQ_GAIN_1 -41 0x4E4E //RX_FDEQ_GAIN_2 -42 0x4848 //RX_FDEQ_GAIN_3 -43 0x484E //RX_FDEQ_GAIN_4 -44 0x6E4E //RX_FDEQ_GAIN_5 -45 0x4850 //RX_FDEQ_GAIN_6 -46 0x4848 //RX_FDEQ_GAIN_7 -47 0x4860 //RX_FDEQ_GAIN_8 -48 0x7468 //RX_FDEQ_GAIN_9 -49 0x6060 //RX_FDEQ_GAIN_10 -50 0x6666 //RX_FDEQ_GAIN_11 -51 0x6666 //RX_FDEQ_GAIN_12 -52 0x6666 //RX_FDEQ_GAIN_13 -53 0x6060 //RX_FDEQ_GAIN_14 -54 0x6060 //RX_FDEQ_GAIN_15 +39 0x6868 //RX_FDEQ_GAIN_0 +40 0x6848 //RX_FDEQ_GAIN_1 +41 0x4848 //RX_FDEQ_GAIN_2 +42 0x3434 //RX_FDEQ_GAIN_3 +43 0x3840 //RX_FDEQ_GAIN_4 +44 0x4838 //RX_FDEQ_GAIN_5 +45 0x5444 //RX_FDEQ_GAIN_6 +46 0x443C //RX_FDEQ_GAIN_7 +47 0x3C60 //RX_FDEQ_GAIN_8 +48 0x6460 //RX_FDEQ_GAIN_9 +49 0x6064 //RX_FDEQ_GAIN_10 +50 0x5C5C //RX_FDEQ_GAIN_11 +51 0x5440 //RX_FDEQ_GAIN_12 +52 0x4040 //RX_FDEQ_GAIN_13 +53 0x4040 //RX_FDEQ_GAIN_14 +54 0x5858 //RX_FDEQ_GAIN_15 55 0x4848 //RX_FDEQ_GAIN_16 56 0x4848 //RX_FDEQ_GAIN_17 57 0x4848 //RX_FDEQ_GAIN_18 @@ -40002,7 +60219,7 @@ 65 0x0303 //RX_FDEQ_BIN_2 66 0x0304 //RX_FDEQ_BIN_3 67 0x0404 //RX_FDEQ_BIN_4 -68 0x0209 //RX_FDEQ_BIN_5 +68 0x0308 //RX_FDEQ_BIN_5 69 0x0808 //RX_FDEQ_BIN_6 70 0x090A //RX_FDEQ_BIN_7 71 0x0B0C //RX_FDEQ_BIN_8 @@ -40045,7 +60262,7 @@ 108 0x7FFF //RX_FDDRC_SLANT_1_2 109 0x7FFF //RX_FDDRC_SLANT_1_3 110 0x0000 //RX_FDDRC_RESRV_0 -129 0x0048 //RX_SPK_VOL +129 0x0036 //RX_SPK_VOL 130 0x0000 //RX_VOL_RESRV_0 #VOL 4 6 0x6000 //RX_TDDRC_ALPHA_UP_1 @@ -40053,41 +60270,41 @@ 8 0x6000 //RX_TDDRC_ALPHA_UP_3 9 0x1000 //RX_TDDRC_ALPHA_UP_4 27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 -28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 -29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 -32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +28 0x4000 //RX_TDDRC_ALPHA_DWN_2 +29 0x4000 //RX_TDDRC_ALPHA_DWN_3 +32 0x4000 //RX_TDDRC_ALPHA_DWN_4 33 0x7214 //RX_TDDRC_LIMITER_THRD 34 0x0800 //RX_TDDRC_LIMITER_GAIN 112 0x0002 //RX_TDDRC_THRD_0 113 0x0004 //RX_TDDRC_THRD_1 -114 0x1A00 //RX_TDDRC_THRD_2 -115 0x1A00 //RX_TDDRC_THRD_3 -116 0x7EB8 //RX_TDDRC_SLANT_0 -117 0x2500 //RX_TDDRC_SLANT_1 +114 0x1800 //RX_TDDRC_THRD_2 +115 0x1800 //RX_TDDRC_THRD_3 +116 0x7FFF //RX_TDDRC_SLANT_0 +117 0x7FFF //RX_TDDRC_SLANT_1 118 0x6000 //RX_TDDRC_ALPHA_UP_0 119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 120 0x0000 //RX_TDDRC_HMNC_FLAG 121 0x199A //RX_TDDRC_HMNC_GAIN 122 0x0001 //RX_TDDRC_SMT_FLAG 123 0x0CCD //RX_TDDRC_SMT_W -124 0x04BC //RX_TDDRC_DRC_GAIN +124 0x0D56 //RX_TDDRC_DRC_GAIN 38 0x0020 //RX_FDEQ_SUBNUM -39 0x484E //RX_FDEQ_GAIN_0 -40 0x4E4E //RX_FDEQ_GAIN_1 -41 0x4E4E //RX_FDEQ_GAIN_2 -42 0x4848 //RX_FDEQ_GAIN_3 -43 0x484E //RX_FDEQ_GAIN_4 -44 0x6E4E //RX_FDEQ_GAIN_5 -45 0x4850 //RX_FDEQ_GAIN_6 -46 0x4848 //RX_FDEQ_GAIN_7 -47 0x4860 //RX_FDEQ_GAIN_8 -48 0x7468 //RX_FDEQ_GAIN_9 -49 0x6060 //RX_FDEQ_GAIN_10 -50 0x6666 //RX_FDEQ_GAIN_11 -51 0x6666 //RX_FDEQ_GAIN_12 -52 0x6666 //RX_FDEQ_GAIN_13 -53 0x6060 //RX_FDEQ_GAIN_14 -54 0x6060 //RX_FDEQ_GAIN_15 +39 0x6868 //RX_FDEQ_GAIN_0 +40 0x6850 //RX_FDEQ_GAIN_1 +41 0x5048 //RX_FDEQ_GAIN_2 +42 0x383C //RX_FDEQ_GAIN_3 +43 0x4048 //RX_FDEQ_GAIN_4 +44 0x7040 //RX_FDEQ_GAIN_5 +45 0x4C44 //RX_FDEQ_GAIN_6 +46 0x4448 //RX_FDEQ_GAIN_7 +47 0x4868 //RX_FDEQ_GAIN_8 +48 0x7C70 //RX_FDEQ_GAIN_9 +49 0x707C //RX_FDEQ_GAIN_10 +50 0x786C //RX_FDEQ_GAIN_11 +51 0x6454 //RX_FDEQ_GAIN_12 +52 0x604C //RX_FDEQ_GAIN_13 +53 0x585C //RX_FDEQ_GAIN_14 +54 0x7480 //RX_FDEQ_GAIN_15 55 0x4848 //RX_FDEQ_GAIN_16 56 0x4848 //RX_FDEQ_GAIN_17 57 0x4848 //RX_FDEQ_GAIN_18 @@ -40101,7 +60318,7 @@ 65 0x0303 //RX_FDEQ_BIN_2 66 0x0304 //RX_FDEQ_BIN_3 67 0x0404 //RX_FDEQ_BIN_4 -68 0x0209 //RX_FDEQ_BIN_5 +68 0x0308 //RX_FDEQ_BIN_5 69 0x0808 //RX_FDEQ_BIN_6 70 0x090A //RX_FDEQ_BIN_7 71 0x0B0C //RX_FDEQ_BIN_8 @@ -40144,7 +60361,7 @@ 108 0x7FFF //RX_FDDRC_SLANT_1_2 109 0x7FFF //RX_FDDRC_SLANT_1_3 110 0x0000 //RX_FDDRC_RESRV_0 -129 0x0068 //RX_SPK_VOL +129 0x0034 //RX_SPK_VOL 130 0x0000 //RX_VOL_RESRV_0 #VOL 5 6 0x6000 //RX_TDDRC_ALPHA_UP_1 @@ -40152,41 +60369,41 @@ 8 0x6000 //RX_TDDRC_ALPHA_UP_3 9 0x1000 //RX_TDDRC_ALPHA_UP_4 27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 -28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 -29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 -32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +28 0x4000 //RX_TDDRC_ALPHA_DWN_2 +29 0x4000 //RX_TDDRC_ALPHA_DWN_3 +32 0x4000 //RX_TDDRC_ALPHA_DWN_4 33 0x7214 //RX_TDDRC_LIMITER_THRD 34 0x0800 //RX_TDDRC_LIMITER_GAIN 112 0x0002 //RX_TDDRC_THRD_0 113 0x0004 //RX_TDDRC_THRD_1 -114 0x1A00 //RX_TDDRC_THRD_2 -115 0x1A00 //RX_TDDRC_THRD_3 -116 0x7EB8 //RX_TDDRC_SLANT_0 -117 0x2500 //RX_TDDRC_SLANT_1 +114 0x1800 //RX_TDDRC_THRD_2 +115 0x1800 //RX_TDDRC_THRD_3 +116 0x7FFF //RX_TDDRC_SLANT_0 +117 0x7FFF //RX_TDDRC_SLANT_1 118 0x6000 //RX_TDDRC_ALPHA_UP_0 119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 120 0x0000 //RX_TDDRC_HMNC_FLAG 121 0x199A //RX_TDDRC_HMNC_GAIN 122 0x0001 //RX_TDDRC_SMT_FLAG 123 0x0CCD //RX_TDDRC_SMT_W -124 0x04BC //RX_TDDRC_DRC_GAIN +124 0x0D56 //RX_TDDRC_DRC_GAIN 38 0x0020 //RX_FDEQ_SUBNUM -39 0x484E //RX_FDEQ_GAIN_0 -40 0x4E4E //RX_FDEQ_GAIN_1 -41 0x4E4E //RX_FDEQ_GAIN_2 -42 0x4848 //RX_FDEQ_GAIN_3 -43 0x484E //RX_FDEQ_GAIN_4 -44 0x6E4E //RX_FDEQ_GAIN_5 -45 0x4850 //RX_FDEQ_GAIN_6 -46 0x4848 //RX_FDEQ_GAIN_7 -47 0x4860 //RX_FDEQ_GAIN_8 -48 0x7468 //RX_FDEQ_GAIN_9 -49 0x6060 //RX_FDEQ_GAIN_10 -50 0x6666 //RX_FDEQ_GAIN_11 -51 0x6666 //RX_FDEQ_GAIN_12 -52 0x6666 //RX_FDEQ_GAIN_13 -53 0x6060 //RX_FDEQ_GAIN_14 -54 0x6060 //RX_FDEQ_GAIN_15 +39 0x6868 //RX_FDEQ_GAIN_0 +40 0x6850 //RX_FDEQ_GAIN_1 +41 0x5048 //RX_FDEQ_GAIN_2 +42 0x383C //RX_FDEQ_GAIN_3 +43 0x4048 //RX_FDEQ_GAIN_4 +44 0x7040 //RX_FDEQ_GAIN_5 +45 0x4C44 //RX_FDEQ_GAIN_6 +46 0x4448 //RX_FDEQ_GAIN_7 +47 0x4868 //RX_FDEQ_GAIN_8 +48 0x7C70 //RX_FDEQ_GAIN_9 +49 0x707C //RX_FDEQ_GAIN_10 +50 0x786C //RX_FDEQ_GAIN_11 +51 0x6454 //RX_FDEQ_GAIN_12 +52 0x604C //RX_FDEQ_GAIN_13 +53 0x585C //RX_FDEQ_GAIN_14 +54 0x7480 //RX_FDEQ_GAIN_15 55 0x4848 //RX_FDEQ_GAIN_16 56 0x4848 //RX_FDEQ_GAIN_17 57 0x4848 //RX_FDEQ_GAIN_18 @@ -40200,7 +60417,7 @@ 65 0x0303 //RX_FDEQ_BIN_2 66 0x0304 //RX_FDEQ_BIN_3 67 0x0404 //RX_FDEQ_BIN_4 -68 0x0209 //RX_FDEQ_BIN_5 +68 0x0308 //RX_FDEQ_BIN_5 69 0x0808 //RX_FDEQ_BIN_6 70 0x090A //RX_FDEQ_BIN_7 71 0x0B0C //RX_FDEQ_BIN_8 @@ -40243,7 +60460,7 @@ 108 0x7FFF //RX_FDDRC_SLANT_1_2 109 0x7FFF //RX_FDDRC_SLANT_1_3 110 0x0000 //RX_FDDRC_RESRV_0 -129 0x0097 //RX_SPK_VOL +129 0x0059 //RX_SPK_VOL 130 0x0000 //RX_VOL_RESRV_0 #VOL 6 6 0x6000 //RX_TDDRC_ALPHA_UP_1 @@ -40251,41 +60468,41 @@ 8 0x6000 //RX_TDDRC_ALPHA_UP_3 9 0x1000 //RX_TDDRC_ALPHA_UP_4 27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 -28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 -29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 -32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +28 0x4000 //RX_TDDRC_ALPHA_DWN_2 +29 0x4000 //RX_TDDRC_ALPHA_DWN_3 +32 0x4000 //RX_TDDRC_ALPHA_DWN_4 33 0x7214 //RX_TDDRC_LIMITER_THRD 34 0x0800 //RX_TDDRC_LIMITER_GAIN 112 0x0002 //RX_TDDRC_THRD_0 113 0x0004 //RX_TDDRC_THRD_1 -114 0x1A00 //RX_TDDRC_THRD_2 -115 0x1A00 //RX_TDDRC_THRD_3 -116 0x7EB8 //RX_TDDRC_SLANT_0 -117 0x2500 //RX_TDDRC_SLANT_1 +114 0x1800 //RX_TDDRC_THRD_2 +115 0x1800 //RX_TDDRC_THRD_3 +116 0x7FFF //RX_TDDRC_SLANT_0 +117 0x7FFF //RX_TDDRC_SLANT_1 118 0x6000 //RX_TDDRC_ALPHA_UP_0 119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 120 0x0000 //RX_TDDRC_HMNC_FLAG 121 0x199A //RX_TDDRC_HMNC_GAIN 122 0x0001 //RX_TDDRC_SMT_FLAG 123 0x0CCD //RX_TDDRC_SMT_W -124 0x04BC //RX_TDDRC_DRC_GAIN +124 0x0D56 //RX_TDDRC_DRC_GAIN 38 0x0020 //RX_FDEQ_SUBNUM -39 0x484E //RX_FDEQ_GAIN_0 -40 0x4E4E //RX_FDEQ_GAIN_1 -41 0x4E4E //RX_FDEQ_GAIN_2 -42 0x4848 //RX_FDEQ_GAIN_3 -43 0x484E //RX_FDEQ_GAIN_4 -44 0x6E4E //RX_FDEQ_GAIN_5 -45 0x4850 //RX_FDEQ_GAIN_6 -46 0x4848 //RX_FDEQ_GAIN_7 -47 0x4860 //RX_FDEQ_GAIN_8 -48 0x7468 //RX_FDEQ_GAIN_9 -49 0x6060 //RX_FDEQ_GAIN_10 -50 0x6666 //RX_FDEQ_GAIN_11 -51 0x6666 //RX_FDEQ_GAIN_12 -52 0x6666 //RX_FDEQ_GAIN_13 -53 0x6060 //RX_FDEQ_GAIN_14 -54 0x6060 //RX_FDEQ_GAIN_15 +39 0x6868 //RX_FDEQ_GAIN_0 +40 0x6850 //RX_FDEQ_GAIN_1 +41 0x5048 //RX_FDEQ_GAIN_2 +42 0x383C //RX_FDEQ_GAIN_3 +43 0x4048 //RX_FDEQ_GAIN_4 +44 0x7040 //RX_FDEQ_GAIN_5 +45 0x4C44 //RX_FDEQ_GAIN_6 +46 0x4448 //RX_FDEQ_GAIN_7 +47 0x4868 //RX_FDEQ_GAIN_8 +48 0x7C70 //RX_FDEQ_GAIN_9 +49 0x707C //RX_FDEQ_GAIN_10 +50 0x786C //RX_FDEQ_GAIN_11 +51 0x6454 //RX_FDEQ_GAIN_12 +52 0x604C //RX_FDEQ_GAIN_13 +53 0x585C //RX_FDEQ_GAIN_14 +54 0x7480 //RX_FDEQ_GAIN_15 55 0x4848 //RX_FDEQ_GAIN_16 56 0x4848 //RX_FDEQ_GAIN_17 57 0x4848 //RX_FDEQ_GAIN_18 @@ -40299,7 +60516,7 @@ 65 0x0303 //RX_FDEQ_BIN_2 66 0x0304 //RX_FDEQ_BIN_3 67 0x0404 //RX_FDEQ_BIN_4 -68 0x0209 //RX_FDEQ_BIN_5 +68 0x0308 //RX_FDEQ_BIN_5 69 0x0808 //RX_FDEQ_BIN_6 70 0x090A //RX_FDEQ_BIN_7 71 0x0B0C //RX_FDEQ_BIN_8 @@ -40344,11 +60561,862 @@ 110 0x0000 //RX_FDDRC_RESRV_0 129 0x0100 //RX_SPK_VOL 130 0x0000 //RX_VOL_RESRV_0 +#RX 2 +157 0x243C //RX_RECVFUNC_MODE_0 +158 0x0000 //RX_RECVFUNC_MODE_1 +159 0x0003 //RX_SAMPLINGFREQ_SIG +160 0x0003 //RX_SAMPLINGFREQ_PROC +161 0x000A //RX_FRAME_SZ +162 0x0000 //RX_DELAY_OPT +163 0x6000 //RX_TDDRC_ALPHA_UP_1 +164 0x6000 //RX_TDDRC_ALPHA_UP_2 +165 0x6000 //RX_TDDRC_ALPHA_UP_3 +166 0x1000 //RX_TDDRC_ALPHA_UP_4 +167 0x0403 //RX_PGA +168 0x7D83 //RX_A_HP +169 0x4000 //RX_B_PE +170 0x7800 //RX_THR_PITCH_DET_0 +171 0x7000 //RX_THR_PITCH_DET_1 +172 0x6000 //RX_THR_PITCH_DET_2 +173 0x0008 //RX_PITCH_BFR_LEN +174 0x0003 //RX_SBD_PITCH_DET +175 0x0100 //RX_PP_RESRV_0 +176 0x0020 //RX_PP_RESRV_1 +177 0x0400 //RX_N_SN_EST +178 0x000C //RX_N2_SN_EST +179 0x0010 //RX_NS_LVL_CTRL +180 0xF800 //RX_THR_SN_EST +181 0x7E00 //RX_LAMBDA_PFILT +182 0x000A //RX_FENS_RESRV_0 +183 0x0190 //RX_FENS_RESRV_1 +184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +187 0x0002 //RX_EXTRA_NS_L +188 0x0800 //RX_EXTRA_NS_A +189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +190 0x7214 //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +192 0x199A //RX_A_POST_FLT +193 0x0000 //RX_LMT_THRD +194 0x4000 //RX_LMT_ALPHA +195 0x0020 //RX_FDEQ_SUBNUM +196 0x4848 //RX_FDEQ_GAIN_0 +197 0x4848 //RX_FDEQ_GAIN_1 +198 0x4848 //RX_FDEQ_GAIN_2 +199 0x4848 //RX_FDEQ_GAIN_3 +200 0x4848 //RX_FDEQ_GAIN_4 +201 0x7C48 //RX_FDEQ_GAIN_5 +202 0x4848 //RX_FDEQ_GAIN_6 +203 0x4848 //RX_FDEQ_GAIN_7 +204 0x4860 //RX_FDEQ_GAIN_8 +205 0x7468 //RX_FDEQ_GAIN_9 +206 0x5858 //RX_FDEQ_GAIN_10 +207 0x5858 //RX_FDEQ_GAIN_11 +208 0x5C54 //RX_FDEQ_GAIN_12 +209 0x5448 //RX_FDEQ_GAIN_13 +210 0x4848 //RX_FDEQ_GAIN_14 +211 0x5858 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0202 //RX_FDEQ_BIN_0 +221 0x0203 //RX_FDEQ_BIN_1 +222 0x0303 //RX_FDEQ_BIN_2 +223 0x0304 //RX_FDEQ_BIN_3 +224 0x0404 //RX_FDEQ_BIN_4 +225 0x0308 //RX_FDEQ_BIN_5 +226 0x0808 //RX_FDEQ_BIN_6 +227 0x090A //RX_FDEQ_BIN_7 +228 0x0B0C //RX_FDEQ_BIN_8 +229 0x0D0E //RX_FDEQ_BIN_9 +230 0x1013 //RX_FDEQ_BIN_10 +231 0x1719 //RX_FDEQ_BIN_11 +232 0x1B1E //RX_FDEQ_BIN_12 +233 0x1E1E //RX_FDEQ_BIN_13 +234 0x1E28 //RX_FDEQ_BIN_14 +235 0x282C //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x4000 //RX_FDEQ_RESRV_0 +245 0x0320 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0035 //RX_FDDRC_BAND_MARGIN_1 +248 0x00D5 //RX_FDDRC_BAND_MARGIN_2 +249 0x0120 //RX_FDDRC_BAND_MARGIN_3 +250 0x0004 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x2000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x2000 //RX_FDDRC_THRD_3_2 +258 0x5000 //RX_FDDRC_THRD_3_3 +259 0x4000 //RX_FDDRC_SLANT_0_0 +260 0x4000 //RX_FDDRC_SLANT_0_1 +261 0x4000 //RX_FDDRC_SLANT_0_2 +262 0x4000 //RX_FDDRC_SLANT_0_3 +263 0x7FFF //RX_FDDRC_SLANT_1_0 +264 0x7FFF //RX_FDDRC_SLANT_1_1 +265 0x7FFF //RX_FDDRC_SLANT_1_2 +266 0x7FFF //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +268 0x0002 //RX_FILTINDX +269 0x0002 //RX_TDDRC_THRD_0 +270 0x0004 //RX_TDDRC_THRD_1 +271 0x1A00 //RX_TDDRC_THRD_2 +272 0x1A00 //RX_TDDRC_THRD_3 +273 0x7EB8 //RX_TDDRC_SLANT_0 +274 0x2500 //RX_TDDRC_SLANT_1 +275 0x6000 //RX_TDDRC_ALPHA_UP_0 +276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x199A //RX_TDDRC_HMNC_GAIN +279 0x0001 //RX_TDDRC_SMT_FLAG +280 0x0CCD //RX_TDDRC_SMT_W +281 0x0550 //RX_TDDRC_DRC_GAIN +282 0x7C00 //RX_LAMBDA_PKA_FP +283 0x0FA0 //RX_TPKA_FP +284 0x0400 //RX_MIN_G_FP +285 0x0800 //RX_MAX_G_FP +286 0x0014 //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 +288 0x0000 //RX_MAXLEVEL_CNG +289 0x3000 //RX_BWE_UV_TH +290 0x3000 //RX_BWE_UV_TH2 +291 0x1800 //RX_BWE_UV_TH3 +292 0x1000 //RX_BWE_V_TH +293 0x04CD //RX_BWE_GAIN1_V_TH1 +294 0x0F33 //RX_BWE_GAIN1_V_TH2 +295 0x7333 //RX_BWE_UV_EQ +296 0x199A //RX_BWE_V_EQ +297 0x7333 //RX_BWE_TONE_TH +298 0x0004 //RX_BWE_UV_HOLD_T +299 0x6CCD //RX_BWE_GAIN2_ALPHA +300 0x799A //RX_BWE_GAIN3_ALPHA +301 0x001E //RX_BWE_CUTOFF +302 0x3000 //RX_BWE_GAINFILL +303 0x3200 //RX_BWE_MAXTH_TONE +304 0x2000 //RX_BWE_EQ_0 +305 0x2000 //RX_BWE_EQ_1 +306 0x2000 //RX_BWE_EQ_2 +307 0x2000 //RX_BWE_EQ_3 +308 0x2000 //RX_BWE_EQ_4 +309 0x2000 //RX_BWE_EQ_5 +310 0x2000 //RX_BWE_EQ_6 +311 0x0000 //RX_BWE_RESRV_0 +312 0x0000 //RX_BWE_RESRV_1 +313 0x0000 //RX_BWE_RESRV_2 +#VOL 0 +163 0x6000 //RX_TDDRC_ALPHA_UP_1 +164 0x6000 //RX_TDDRC_ALPHA_UP_2 +165 0x6000 //RX_TDDRC_ALPHA_UP_3 +166 0x1000 //RX_TDDRC_ALPHA_UP_4 +184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +185 0x4000 //RX_TDDRC_ALPHA_DWN_2 +186 0x4000 //RX_TDDRC_ALPHA_DWN_3 +189 0x4000 //RX_TDDRC_ALPHA_DWN_4 +190 0x7214 //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +269 0x0002 //RX_TDDRC_THRD_0 +270 0x0004 //RX_TDDRC_THRD_1 +271 0x1800 //RX_TDDRC_THRD_2 +272 0x1800 //RX_TDDRC_THRD_3 +273 0x7FFF //RX_TDDRC_SLANT_0 +274 0x7FFF //RX_TDDRC_SLANT_1 +275 0x6000 //RX_TDDRC_ALPHA_UP_0 +276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x199A //RX_TDDRC_HMNC_GAIN +279 0x0001 //RX_TDDRC_SMT_FLAG +280 0x0CCD //RX_TDDRC_SMT_W +281 0x0780 //RX_TDDRC_DRC_GAIN +195 0x0020 //RX_FDEQ_SUBNUM +196 0x6868 //RX_FDEQ_GAIN_0 +197 0x6848 //RX_FDEQ_GAIN_1 +198 0x4848 //RX_FDEQ_GAIN_2 +199 0x3434 //RX_FDEQ_GAIN_3 +200 0x3840 //RX_FDEQ_GAIN_4 +201 0x4838 //RX_FDEQ_GAIN_5 +202 0x5444 //RX_FDEQ_GAIN_6 +203 0x443C //RX_FDEQ_GAIN_7 +204 0x3C60 //RX_FDEQ_GAIN_8 +205 0x6460 //RX_FDEQ_GAIN_9 +206 0x6064 //RX_FDEQ_GAIN_10 +207 0x5C5C //RX_FDEQ_GAIN_11 +208 0x5440 //RX_FDEQ_GAIN_12 +209 0x4040 //RX_FDEQ_GAIN_13 +210 0x4040 //RX_FDEQ_GAIN_14 +211 0x5858 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0202 //RX_FDEQ_BIN_0 +221 0x0203 //RX_FDEQ_BIN_1 +222 0x0303 //RX_FDEQ_BIN_2 +223 0x0304 //RX_FDEQ_BIN_3 +224 0x0404 //RX_FDEQ_BIN_4 +225 0x0308 //RX_FDEQ_BIN_5 +226 0x0808 //RX_FDEQ_BIN_6 +227 0x090A //RX_FDEQ_BIN_7 +228 0x0B0C //RX_FDEQ_BIN_8 +229 0x0D0E //RX_FDEQ_BIN_9 +230 0x1013 //RX_FDEQ_BIN_10 +231 0x1719 //RX_FDEQ_BIN_11 +232 0x1B1E //RX_FDEQ_BIN_12 +233 0x1E1E //RX_FDEQ_BIN_13 +234 0x1E28 //RX_FDEQ_BIN_14 +235 0x282C //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x4000 //RX_FDEQ_RESRV_0 +245 0x0320 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0035 //RX_FDDRC_BAND_MARGIN_1 +248 0x00D5 //RX_FDDRC_BAND_MARGIN_2 +249 0x0120 //RX_FDDRC_BAND_MARGIN_3 +250 0x0004 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x2000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x2000 //RX_FDDRC_THRD_3_2 +258 0x5000 //RX_FDDRC_THRD_3_3 +259 0x4000 //RX_FDDRC_SLANT_0_0 +260 0x4000 //RX_FDDRC_SLANT_0_1 +261 0x4000 //RX_FDDRC_SLANT_0_2 +262 0x4000 //RX_FDDRC_SLANT_0_3 +263 0x7FFF //RX_FDDRC_SLANT_1_0 +264 0x7FFF //RX_FDDRC_SLANT_1_1 +265 0x7FFF //RX_FDDRC_SLANT_1_2 +266 0x7FFF //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +286 0x0011 //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 +#VOL 1 +163 0x6000 //RX_TDDRC_ALPHA_UP_1 +164 0x6000 //RX_TDDRC_ALPHA_UP_2 +165 0x6000 //RX_TDDRC_ALPHA_UP_3 +166 0x1000 //RX_TDDRC_ALPHA_UP_4 +184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +185 0x4000 //RX_TDDRC_ALPHA_DWN_2 +186 0x4000 //RX_TDDRC_ALPHA_DWN_3 +189 0x4000 //RX_TDDRC_ALPHA_DWN_4 +190 0x7214 //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +269 0x0002 //RX_TDDRC_THRD_0 +270 0x0004 //RX_TDDRC_THRD_1 +271 0x1800 //RX_TDDRC_THRD_2 +272 0x1800 //RX_TDDRC_THRD_3 +273 0x7FFF //RX_TDDRC_SLANT_0 +274 0x7FFF //RX_TDDRC_SLANT_1 +275 0x6000 //RX_TDDRC_ALPHA_UP_0 +276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x199A //RX_TDDRC_HMNC_GAIN +279 0x0001 //RX_TDDRC_SMT_FLAG +280 0x0CCD //RX_TDDRC_SMT_W +281 0x0780 //RX_TDDRC_DRC_GAIN +195 0x0020 //RX_FDEQ_SUBNUM +196 0x6868 //RX_FDEQ_GAIN_0 +197 0x6848 //RX_FDEQ_GAIN_1 +198 0x4848 //RX_FDEQ_GAIN_2 +199 0x3434 //RX_FDEQ_GAIN_3 +200 0x3840 //RX_FDEQ_GAIN_4 +201 0x4838 //RX_FDEQ_GAIN_5 +202 0x5444 //RX_FDEQ_GAIN_6 +203 0x443C //RX_FDEQ_GAIN_7 +204 0x3C60 //RX_FDEQ_GAIN_8 +205 0x6460 //RX_FDEQ_GAIN_9 +206 0x6064 //RX_FDEQ_GAIN_10 +207 0x5C5C //RX_FDEQ_GAIN_11 +208 0x5440 //RX_FDEQ_GAIN_12 +209 0x4040 //RX_FDEQ_GAIN_13 +210 0x4040 //RX_FDEQ_GAIN_14 +211 0x5858 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0202 //RX_FDEQ_BIN_0 +221 0x0203 //RX_FDEQ_BIN_1 +222 0x0303 //RX_FDEQ_BIN_2 +223 0x0304 //RX_FDEQ_BIN_3 +224 0x0404 //RX_FDEQ_BIN_4 +225 0x0308 //RX_FDEQ_BIN_5 +226 0x0808 //RX_FDEQ_BIN_6 +227 0x090A //RX_FDEQ_BIN_7 +228 0x0B0C //RX_FDEQ_BIN_8 +229 0x0D0E //RX_FDEQ_BIN_9 +230 0x1013 //RX_FDEQ_BIN_10 +231 0x1719 //RX_FDEQ_BIN_11 +232 0x1B1E //RX_FDEQ_BIN_12 +233 0x1E1E //RX_FDEQ_BIN_13 +234 0x1E28 //RX_FDEQ_BIN_14 +235 0x282C //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x4000 //RX_FDEQ_RESRV_0 +245 0x0320 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0035 //RX_FDDRC_BAND_MARGIN_1 +248 0x00D5 //RX_FDDRC_BAND_MARGIN_2 +249 0x0120 //RX_FDDRC_BAND_MARGIN_3 +250 0x0004 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x2000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x2000 //RX_FDDRC_THRD_3_2 +258 0x5000 //RX_FDDRC_THRD_3_3 +259 0x4000 //RX_FDDRC_SLANT_0_0 +260 0x4000 //RX_FDDRC_SLANT_0_1 +261 0x4000 //RX_FDDRC_SLANT_0_2 +262 0x4000 //RX_FDDRC_SLANT_0_3 +263 0x7FFF //RX_FDDRC_SLANT_1_0 +264 0x7FFF //RX_FDDRC_SLANT_1_1 +265 0x7FFF //RX_FDDRC_SLANT_1_2 +266 0x7FFF //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +286 0x0019 //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 +#VOL 2 +163 0x6000 //RX_TDDRC_ALPHA_UP_1 +164 0x6000 //RX_TDDRC_ALPHA_UP_2 +165 0x6000 //RX_TDDRC_ALPHA_UP_3 +166 0x1000 //RX_TDDRC_ALPHA_UP_4 +184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +185 0x4000 //RX_TDDRC_ALPHA_DWN_2 +186 0x4000 //RX_TDDRC_ALPHA_DWN_3 +189 0x4000 //RX_TDDRC_ALPHA_DWN_4 +190 0x7214 //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +269 0x0002 //RX_TDDRC_THRD_0 +270 0x0004 //RX_TDDRC_THRD_1 +271 0x1800 //RX_TDDRC_THRD_2 +272 0x1800 //RX_TDDRC_THRD_3 +273 0x7FFF //RX_TDDRC_SLANT_0 +274 0x7FFF //RX_TDDRC_SLANT_1 +275 0x6000 //RX_TDDRC_ALPHA_UP_0 +276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x199A //RX_TDDRC_HMNC_GAIN +279 0x0001 //RX_TDDRC_SMT_FLAG +280 0x0CCD //RX_TDDRC_SMT_W +281 0x0780 //RX_TDDRC_DRC_GAIN +195 0x0020 //RX_FDEQ_SUBNUM +196 0x6868 //RX_FDEQ_GAIN_0 +197 0x6848 //RX_FDEQ_GAIN_1 +198 0x4848 //RX_FDEQ_GAIN_2 +199 0x3434 //RX_FDEQ_GAIN_3 +200 0x3840 //RX_FDEQ_GAIN_4 +201 0x4838 //RX_FDEQ_GAIN_5 +202 0x5444 //RX_FDEQ_GAIN_6 +203 0x443C //RX_FDEQ_GAIN_7 +204 0x3C60 //RX_FDEQ_GAIN_8 +205 0x6460 //RX_FDEQ_GAIN_9 +206 0x6064 //RX_FDEQ_GAIN_10 +207 0x5C5C //RX_FDEQ_GAIN_11 +208 0x5440 //RX_FDEQ_GAIN_12 +209 0x4040 //RX_FDEQ_GAIN_13 +210 0x4040 //RX_FDEQ_GAIN_14 +211 0x5858 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0202 //RX_FDEQ_BIN_0 +221 0x0203 //RX_FDEQ_BIN_1 +222 0x0303 //RX_FDEQ_BIN_2 +223 0x0304 //RX_FDEQ_BIN_3 +224 0x0404 //RX_FDEQ_BIN_4 +225 0x0308 //RX_FDEQ_BIN_5 +226 0x0808 //RX_FDEQ_BIN_6 +227 0x090A //RX_FDEQ_BIN_7 +228 0x0B0C //RX_FDEQ_BIN_8 +229 0x0D0E //RX_FDEQ_BIN_9 +230 0x1013 //RX_FDEQ_BIN_10 +231 0x1719 //RX_FDEQ_BIN_11 +232 0x1B1E //RX_FDEQ_BIN_12 +233 0x1E1E //RX_FDEQ_BIN_13 +234 0x1E28 //RX_FDEQ_BIN_14 +235 0x282C //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x4000 //RX_FDEQ_RESRV_0 +245 0x0320 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0035 //RX_FDDRC_BAND_MARGIN_1 +248 0x00D5 //RX_FDDRC_BAND_MARGIN_2 +249 0x0120 //RX_FDDRC_BAND_MARGIN_3 +250 0x0004 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x2000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x2000 //RX_FDDRC_THRD_3_2 +258 0x5000 //RX_FDDRC_THRD_3_3 +259 0x4000 //RX_FDDRC_SLANT_0_0 +260 0x4000 //RX_FDDRC_SLANT_0_1 +261 0x4000 //RX_FDDRC_SLANT_0_2 +262 0x4000 //RX_FDDRC_SLANT_0_3 +263 0x7FFF //RX_FDDRC_SLANT_1_0 +264 0x7FFF //RX_FDDRC_SLANT_1_1 +265 0x7FFF //RX_FDDRC_SLANT_1_2 +266 0x7FFF //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +286 0x0025 //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 +#VOL 3 +163 0x6000 //RX_TDDRC_ALPHA_UP_1 +164 0x6000 //RX_TDDRC_ALPHA_UP_2 +165 0x6000 //RX_TDDRC_ALPHA_UP_3 +166 0x1000 //RX_TDDRC_ALPHA_UP_4 +184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +185 0x4000 //RX_TDDRC_ALPHA_DWN_2 +186 0x4000 //RX_TDDRC_ALPHA_DWN_3 +189 0x4000 //RX_TDDRC_ALPHA_DWN_4 +190 0x7214 //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +269 0x0002 //RX_TDDRC_THRD_0 +270 0x0004 //RX_TDDRC_THRD_1 +271 0x1800 //RX_TDDRC_THRD_2 +272 0x1800 //RX_TDDRC_THRD_3 +273 0x7FFF //RX_TDDRC_SLANT_0 +274 0x7FFF //RX_TDDRC_SLANT_1 +275 0x6000 //RX_TDDRC_ALPHA_UP_0 +276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x199A //RX_TDDRC_HMNC_GAIN +279 0x0001 //RX_TDDRC_SMT_FLAG +280 0x0CCD //RX_TDDRC_SMT_W +281 0x0780 //RX_TDDRC_DRC_GAIN +195 0x0020 //RX_FDEQ_SUBNUM +196 0x6868 //RX_FDEQ_GAIN_0 +197 0x6848 //RX_FDEQ_GAIN_1 +198 0x4848 //RX_FDEQ_GAIN_2 +199 0x3434 //RX_FDEQ_GAIN_3 +200 0x3840 //RX_FDEQ_GAIN_4 +201 0x4838 //RX_FDEQ_GAIN_5 +202 0x5444 //RX_FDEQ_GAIN_6 +203 0x443C //RX_FDEQ_GAIN_7 +204 0x3C60 //RX_FDEQ_GAIN_8 +205 0x6460 //RX_FDEQ_GAIN_9 +206 0x6064 //RX_FDEQ_GAIN_10 +207 0x5C5C //RX_FDEQ_GAIN_11 +208 0x5440 //RX_FDEQ_GAIN_12 +209 0x4040 //RX_FDEQ_GAIN_13 +210 0x4040 //RX_FDEQ_GAIN_14 +211 0x5858 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0202 //RX_FDEQ_BIN_0 +221 0x0203 //RX_FDEQ_BIN_1 +222 0x0303 //RX_FDEQ_BIN_2 +223 0x0304 //RX_FDEQ_BIN_3 +224 0x0404 //RX_FDEQ_BIN_4 +225 0x0308 //RX_FDEQ_BIN_5 +226 0x0808 //RX_FDEQ_BIN_6 +227 0x090A //RX_FDEQ_BIN_7 +228 0x0B0C //RX_FDEQ_BIN_8 +229 0x0D0E //RX_FDEQ_BIN_9 +230 0x1013 //RX_FDEQ_BIN_10 +231 0x1719 //RX_FDEQ_BIN_11 +232 0x1B1E //RX_FDEQ_BIN_12 +233 0x1E1E //RX_FDEQ_BIN_13 +234 0x1E28 //RX_FDEQ_BIN_14 +235 0x282C //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x4000 //RX_FDEQ_RESRV_0 +245 0x0320 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0035 //RX_FDDRC_BAND_MARGIN_1 +248 0x00D5 //RX_FDDRC_BAND_MARGIN_2 +249 0x0120 //RX_FDDRC_BAND_MARGIN_3 +250 0x0004 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x2000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x2000 //RX_FDDRC_THRD_3_2 +258 0x5000 //RX_FDDRC_THRD_3_3 +259 0x4000 //RX_FDDRC_SLANT_0_0 +260 0x4000 //RX_FDDRC_SLANT_0_1 +261 0x4000 //RX_FDDRC_SLANT_0_2 +262 0x4000 //RX_FDDRC_SLANT_0_3 +263 0x7FFF //RX_FDDRC_SLANT_1_0 +264 0x7FFF //RX_FDDRC_SLANT_1_1 +265 0x7FFF //RX_FDDRC_SLANT_1_2 +266 0x7FFF //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +286 0x0036 //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 +#VOL 4 +163 0x6000 //RX_TDDRC_ALPHA_UP_1 +164 0x6000 //RX_TDDRC_ALPHA_UP_2 +165 0x6000 //RX_TDDRC_ALPHA_UP_3 +166 0x1000 //RX_TDDRC_ALPHA_UP_4 +184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +185 0x4000 //RX_TDDRC_ALPHA_DWN_2 +186 0x4000 //RX_TDDRC_ALPHA_DWN_3 +189 0x4000 //RX_TDDRC_ALPHA_DWN_4 +190 0x7214 //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +269 0x0002 //RX_TDDRC_THRD_0 +270 0x0004 //RX_TDDRC_THRD_1 +271 0x1800 //RX_TDDRC_THRD_2 +272 0x1800 //RX_TDDRC_THRD_3 +273 0x7FFF //RX_TDDRC_SLANT_0 +274 0x7FFF //RX_TDDRC_SLANT_1 +275 0x6000 //RX_TDDRC_ALPHA_UP_0 +276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x199A //RX_TDDRC_HMNC_GAIN +279 0x0001 //RX_TDDRC_SMT_FLAG +280 0x0CCD //RX_TDDRC_SMT_W +281 0x0D56 //RX_TDDRC_DRC_GAIN +195 0x0020 //RX_FDEQ_SUBNUM +196 0x6868 //RX_FDEQ_GAIN_0 +197 0x6850 //RX_FDEQ_GAIN_1 +198 0x5048 //RX_FDEQ_GAIN_2 +199 0x383C //RX_FDEQ_GAIN_3 +200 0x4048 //RX_FDEQ_GAIN_4 +201 0x7040 //RX_FDEQ_GAIN_5 +202 0x4C44 //RX_FDEQ_GAIN_6 +203 0x4448 //RX_FDEQ_GAIN_7 +204 0x4868 //RX_FDEQ_GAIN_8 +205 0x7C70 //RX_FDEQ_GAIN_9 +206 0x707C //RX_FDEQ_GAIN_10 +207 0x786C //RX_FDEQ_GAIN_11 +208 0x6454 //RX_FDEQ_GAIN_12 +209 0x604C //RX_FDEQ_GAIN_13 +210 0x585C //RX_FDEQ_GAIN_14 +211 0x7480 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0202 //RX_FDEQ_BIN_0 +221 0x0203 //RX_FDEQ_BIN_1 +222 0x0303 //RX_FDEQ_BIN_2 +223 0x0304 //RX_FDEQ_BIN_3 +224 0x0404 //RX_FDEQ_BIN_4 +225 0x0308 //RX_FDEQ_BIN_5 +226 0x0808 //RX_FDEQ_BIN_6 +227 0x090A //RX_FDEQ_BIN_7 +228 0x0B0C //RX_FDEQ_BIN_8 +229 0x0D0E //RX_FDEQ_BIN_9 +230 0x1013 //RX_FDEQ_BIN_10 +231 0x1719 //RX_FDEQ_BIN_11 +232 0x1B1E //RX_FDEQ_BIN_12 +233 0x1E1E //RX_FDEQ_BIN_13 +234 0x1E28 //RX_FDEQ_BIN_14 +235 0x282C //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x4000 //RX_FDEQ_RESRV_0 +245 0x0320 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0035 //RX_FDDRC_BAND_MARGIN_1 +248 0x00D5 //RX_FDDRC_BAND_MARGIN_2 +249 0x0120 //RX_FDDRC_BAND_MARGIN_3 +250 0x0004 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x2000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x2000 //RX_FDDRC_THRD_3_2 +258 0x5000 //RX_FDDRC_THRD_3_3 +259 0x4000 //RX_FDDRC_SLANT_0_0 +260 0x4000 //RX_FDDRC_SLANT_0_1 +261 0x4000 //RX_FDDRC_SLANT_0_2 +262 0x4000 //RX_FDDRC_SLANT_0_3 +263 0x7FFF //RX_FDDRC_SLANT_1_0 +264 0x7FFF //RX_FDDRC_SLANT_1_1 +265 0x7FFF //RX_FDDRC_SLANT_1_2 +266 0x7FFF //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +286 0x0034 //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 +#VOL 5 +163 0x6000 //RX_TDDRC_ALPHA_UP_1 +164 0x6000 //RX_TDDRC_ALPHA_UP_2 +165 0x6000 //RX_TDDRC_ALPHA_UP_3 +166 0x1000 //RX_TDDRC_ALPHA_UP_4 +184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +185 0x4000 //RX_TDDRC_ALPHA_DWN_2 +186 0x4000 //RX_TDDRC_ALPHA_DWN_3 +189 0x4000 //RX_TDDRC_ALPHA_DWN_4 +190 0x7214 //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +269 0x0002 //RX_TDDRC_THRD_0 +270 0x0004 //RX_TDDRC_THRD_1 +271 0x1800 //RX_TDDRC_THRD_2 +272 0x1800 //RX_TDDRC_THRD_3 +273 0x7FFF //RX_TDDRC_SLANT_0 +274 0x7FFF //RX_TDDRC_SLANT_1 +275 0x6000 //RX_TDDRC_ALPHA_UP_0 +276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x199A //RX_TDDRC_HMNC_GAIN +279 0x0001 //RX_TDDRC_SMT_FLAG +280 0x0CCD //RX_TDDRC_SMT_W +281 0x0D56 //RX_TDDRC_DRC_GAIN +195 0x0020 //RX_FDEQ_SUBNUM +196 0x6868 //RX_FDEQ_GAIN_0 +197 0x6850 //RX_FDEQ_GAIN_1 +198 0x5048 //RX_FDEQ_GAIN_2 +199 0x383C //RX_FDEQ_GAIN_3 +200 0x4048 //RX_FDEQ_GAIN_4 +201 0x7040 //RX_FDEQ_GAIN_5 +202 0x4C44 //RX_FDEQ_GAIN_6 +203 0x4448 //RX_FDEQ_GAIN_7 +204 0x4868 //RX_FDEQ_GAIN_8 +205 0x7C70 //RX_FDEQ_GAIN_9 +206 0x707C //RX_FDEQ_GAIN_10 +207 0x786C //RX_FDEQ_GAIN_11 +208 0x6454 //RX_FDEQ_GAIN_12 +209 0x604C //RX_FDEQ_GAIN_13 +210 0x585C //RX_FDEQ_GAIN_14 +211 0x7480 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0202 //RX_FDEQ_BIN_0 +221 0x0203 //RX_FDEQ_BIN_1 +222 0x0303 //RX_FDEQ_BIN_2 +223 0x0304 //RX_FDEQ_BIN_3 +224 0x0404 //RX_FDEQ_BIN_4 +225 0x0308 //RX_FDEQ_BIN_5 +226 0x0808 //RX_FDEQ_BIN_6 +227 0x090A //RX_FDEQ_BIN_7 +228 0x0B0C //RX_FDEQ_BIN_8 +229 0x0D0E //RX_FDEQ_BIN_9 +230 0x1013 //RX_FDEQ_BIN_10 +231 0x1719 //RX_FDEQ_BIN_11 +232 0x1B1E //RX_FDEQ_BIN_12 +233 0x1E1E //RX_FDEQ_BIN_13 +234 0x1E28 //RX_FDEQ_BIN_14 +235 0x282C //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x4000 //RX_FDEQ_RESRV_0 +245 0x0320 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0035 //RX_FDDRC_BAND_MARGIN_1 +248 0x00D5 //RX_FDDRC_BAND_MARGIN_2 +249 0x0120 //RX_FDDRC_BAND_MARGIN_3 +250 0x0004 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x2000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x2000 //RX_FDDRC_THRD_3_2 +258 0x5000 //RX_FDDRC_THRD_3_3 +259 0x4000 //RX_FDDRC_SLANT_0_0 +260 0x4000 //RX_FDDRC_SLANT_0_1 +261 0x4000 //RX_FDDRC_SLANT_0_2 +262 0x4000 //RX_FDDRC_SLANT_0_3 +263 0x7FFF //RX_FDDRC_SLANT_1_0 +264 0x7FFF //RX_FDDRC_SLANT_1_1 +265 0x7FFF //RX_FDDRC_SLANT_1_2 +266 0x7FFF //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +286 0x0059 //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 +#VOL 6 +163 0x6000 //RX_TDDRC_ALPHA_UP_1 +164 0x6000 //RX_TDDRC_ALPHA_UP_2 +165 0x6000 //RX_TDDRC_ALPHA_UP_3 +166 0x1000 //RX_TDDRC_ALPHA_UP_4 +184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +185 0x4000 //RX_TDDRC_ALPHA_DWN_2 +186 0x4000 //RX_TDDRC_ALPHA_DWN_3 +189 0x4000 //RX_TDDRC_ALPHA_DWN_4 +190 0x7214 //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +269 0x0002 //RX_TDDRC_THRD_0 +270 0x0004 //RX_TDDRC_THRD_1 +271 0x1800 //RX_TDDRC_THRD_2 +272 0x1800 //RX_TDDRC_THRD_3 +273 0x7FFF //RX_TDDRC_SLANT_0 +274 0x7FFF //RX_TDDRC_SLANT_1 +275 0x6000 //RX_TDDRC_ALPHA_UP_0 +276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x199A //RX_TDDRC_HMNC_GAIN +279 0x0001 //RX_TDDRC_SMT_FLAG +280 0x0CCD //RX_TDDRC_SMT_W +281 0x0D56 //RX_TDDRC_DRC_GAIN +195 0x0020 //RX_FDEQ_SUBNUM +196 0x6868 //RX_FDEQ_GAIN_0 +197 0x6850 //RX_FDEQ_GAIN_1 +198 0x5048 //RX_FDEQ_GAIN_2 +199 0x383C //RX_FDEQ_GAIN_3 +200 0x4048 //RX_FDEQ_GAIN_4 +201 0x7040 //RX_FDEQ_GAIN_5 +202 0x4C44 //RX_FDEQ_GAIN_6 +203 0x4448 //RX_FDEQ_GAIN_7 +204 0x4868 //RX_FDEQ_GAIN_8 +205 0x7C70 //RX_FDEQ_GAIN_9 +206 0x707C //RX_FDEQ_GAIN_10 +207 0x786C //RX_FDEQ_GAIN_11 +208 0x6454 //RX_FDEQ_GAIN_12 +209 0x604C //RX_FDEQ_GAIN_13 +210 0x585C //RX_FDEQ_GAIN_14 +211 0x7480 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0202 //RX_FDEQ_BIN_0 +221 0x0203 //RX_FDEQ_BIN_1 +222 0x0303 //RX_FDEQ_BIN_2 +223 0x0304 //RX_FDEQ_BIN_3 +224 0x0404 //RX_FDEQ_BIN_4 +225 0x0308 //RX_FDEQ_BIN_5 +226 0x0808 //RX_FDEQ_BIN_6 +227 0x090A //RX_FDEQ_BIN_7 +228 0x0B0C //RX_FDEQ_BIN_8 +229 0x0D0E //RX_FDEQ_BIN_9 +230 0x1013 //RX_FDEQ_BIN_10 +231 0x1719 //RX_FDEQ_BIN_11 +232 0x1B1E //RX_FDEQ_BIN_12 +233 0x1E1E //RX_FDEQ_BIN_13 +234 0x1E28 //RX_FDEQ_BIN_14 +235 0x282C //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x4000 //RX_FDEQ_RESRV_0 +245 0x0320 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0035 //RX_FDDRC_BAND_MARGIN_1 +248 0x00D5 //RX_FDDRC_BAND_MARGIN_2 +249 0x0120 //RX_FDDRC_BAND_MARGIN_3 +250 0x0004 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x2000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x2000 //RX_FDDRC_THRD_3_2 +258 0x5000 //RX_FDDRC_THRD_3_3 +259 0x4000 //RX_FDDRC_SLANT_0_0 +260 0x4000 //RX_FDDRC_SLANT_0_1 +261 0x4000 //RX_FDDRC_SLANT_0_2 +262 0x4000 //RX_FDDRC_SLANT_0_3 +263 0x7FFF //RX_FDDRC_SLANT_1_0 +264 0x7FFF //RX_FDDRC_SLANT_1_1 +265 0x7FFF //RX_FDDRC_SLANT_1_2 +266 0x7FFF //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +286 0x0100 //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 #CASE_NAME HEADSET-TTY_HCO-VOICE_GENERIC-FB -#PARAM_MODE FULL -#PARAM_TYPE TX+RX -#TOTAL_CUSTOM_STEP 7 +#PARAM_MODE Full +#PARAM_TYPE TX+2RX +#TOTAL_CUSTOM_STEP 7+7 #TX 0 0x0001 //TX_OPERATION_MODE_0 1 0x0000 //TX_OPERATION_MODE_1 @@ -40592,7 +61660,7 @@ 239 0x0000 //TX_DT_RESRV_7 240 0x0000 //TX_DT_RESRV_8 241 0x0000 //TX_DT_RESRV_9 -242 0xF200 //TX_THR_SN_EST_0 +242 0xF700 //TX_THR_SN_EST_0 243 0xF400 //TX_THR_SN_EST_1 244 0xF800 //TX_THR_SN_EST_2 245 0xF600 //TX_THR_SN_EST_3 @@ -40601,12 +61669,12 @@ 248 0xF800 //TX_THR_SN_EST_6 249 0xF800 //TX_THR_SN_EST_7 250 0x0100 //TX_DELTA_THR_SN_EST_0 -251 0x0000 //TX_DELTA_THR_SN_EST_1 +251 0x0100 //TX_DELTA_THR_SN_EST_1 252 0x0100 //TX_DELTA_THR_SN_EST_2 -253 0x0100 //TX_DELTA_THR_SN_EST_3 +253 0x0200 //TX_DELTA_THR_SN_EST_3 254 0x0200 //TX_DELTA_THR_SN_EST_4 255 0x0200 //TX_DELTA_THR_SN_EST_5 -256 0x0200 //TX_DELTA_THR_SN_EST_6 +256 0x0000 //TX_DELTA_THR_SN_EST_6 257 0x0200 //TX_DELTA_THR_SN_EST_7 258 0x4000 //TX_LAMBDA_NN_EST_0 259 0x4000 //TX_LAMBDA_NN_EST_1 @@ -40632,12 +61700,12 @@ 279 0x0000 //TX_B_POST_FLT_0 280 0x0000 //TX_B_POST_FLT_1 281 0x001A //TX_NS_LVL_CTRL_0 -282 0x001A //TX_NS_LVL_CTRL_1 +282 0x0014 //TX_NS_LVL_CTRL_1 283 0x0014 //TX_NS_LVL_CTRL_2 -284 0x0014 //TX_NS_LVL_CTRL_3 +284 0x000C //TX_NS_LVL_CTRL_3 285 0x000C //TX_NS_LVL_CTRL_4 286 0x000C //TX_NS_LVL_CTRL_5 -287 0x000C //TX_NS_LVL_CTRL_6 +287 0x001A //TX_NS_LVL_CTRL_6 288 0x000C //TX_NS_LVL_CTRL_7 289 0x000E //TX_MIN_GAIN_S_0 290 0x0014 //TX_MIN_GAIN_S_1 @@ -40653,10 +61721,10 @@ 300 0x7FFF //TX_SNRI_SUP_0 301 0x7FFF //TX_SNRI_SUP_1 302 0x7FFF //TX_SNRI_SUP_2 -303 0x7FFF //TX_SNRI_SUP_3 +303 0x4000 //TX_SNRI_SUP_3 304 0x4000 //TX_SNRI_SUP_4 305 0x4000 //TX_SNRI_SUP_5 -306 0x4000 //TX_SNRI_SUP_6 +306 0x7FFF //TX_SNRI_SUP_6 307 0x4000 //TX_SNRI_SUP_7 308 0x1200 //TX_THR_LFNS 309 0x0147 //TX_G_LFNS @@ -40665,12 +61733,12 @@ 312 0x7FFF //TX_A_POST_FILT_0 313 0x7FFF //TX_A_POST_FILT_1 314 0x4000 //TX_A_POST_FILT_S_0 -315 0x199A //TX_A_POST_FILT_S_1 +315 0x1000 //TX_A_POST_FILT_S_1 316 0x1000 //TX_A_POST_FILT_S_2 -317 0x1000 //TX_A_POST_FILT_S_3 +317 0x6666 //TX_A_POST_FILT_S_3 318 0x6666 //TX_A_POST_FILT_S_4 319 0x6666 //TX_A_POST_FILT_S_5 -320 0x6666 //TX_A_POST_FILT_S_6 +320 0x199A //TX_A_POST_FILT_S_6 321 0x6666 //TX_A_POST_FILT_S_7 322 0x2000 //TX_B_POST_FILT_0 323 0x2000 //TX_B_POST_FILT_1 @@ -40717,7 +61785,7 @@ 364 0x0000 //TX_K_APT 365 0x0001 //TX_NOISEDET 366 0x05A0 //TX_NDETCT -367 0x000A //TX_NOISE_TH_0 +367 0x04E8 //TX_NOISE_TH_0 368 0x1388 //TX_NOISE_TH_0_2 369 0x3A98 //TX_NOISE_TH_0_3 370 0x0C80 //TX_NOISE_TH_1 @@ -40729,11 +61797,11 @@ 376 0x7FFF //TX_NOISE_TH_5_3 377 0x7FFF //TX_NOISE_TH_5_4 378 0x00C8 //TX_NOISE_TH_6 -379 0x000A //TX_MINENOISE_TH -380 0x0000 //TX_MINENOISE_MIC0_TH_MTS -381 0x0000 //TX_MINENOISE_MIC0_TH_EXP -382 0x0000 //TX_MINENOISE_MIC0_S_TH_MTS -383 0x0000 //TX_MINENOISE_MIC0_S_TH_EXP +379 0x02BC //TX_MINENOISE_TH +380 0xD508 //TX_MORENS_TFMASK_TH +381 0x0001 //TX_DRC_QUIET_FLOOR +382 0x3A98 //TX_RATIODTL_CUT_TH +383 0x1482 //TX_DT_CUT_K1 384 0x6400 //TX_OUT_ENER_S_TH_CLEAN 385 0x6400 //TX_OUT_ENER_S_TH_LESSCLEAN 386 0x6400 //TX_OUT_ENER_S_TH_NOISY @@ -40741,22 +61809,22 @@ 388 0x7D00 //TX_OUT_ENER_TH_SPEECH 389 0x0000 //TX_SN_NPB_GAIN 390 0x0000 //TX_NN_NPB_GAIN -391 0x0000 //TX_CSX_ALPHA_0 -392 0x0000 //TX_CSX_ALPHA_1 -393 0x0000 //TX_CSX_ALPHA_2 -394 0x0000 //TX_CSX_ALPHA_3 -395 0x0000 //TX_MU_ARSP_EST -396 0x0000 //TX_P_OUTBEAM_MIN_TH +391 0x7FFF //TX_POST_MASK_SUP_HSNE +392 0x1388 //TX_TAIL_DET_TH +393 0x4000 //TX_B_LESSCUT_RTO_WTA +394 0x0000 //TX_MEL_G_R +395 0x0080 //TX_SUPHIGH_TH +396 0x0000 //TX_MASK_G_R 397 0x0000 //TX_EXTRA_NS_L -398 0x0000 //TX_EXTRA_NS_A -399 0x0000 //TX_VR_NOISE_FLOOR_TH +398 0x1800 //TX_C_POST_FLT_MASK +399 0x7FFF //TX_A_POST_FLT_WNS 400 0x0000 //TX_MIN_G_LOW300HZ 401 0x0010 //TX_MAXLEVEL_CNG 402 0x0000 //TX_STN_NOISE_TH 403 0x0000 //TX_POST_MASK_SUP 404 0x0000 //TX_POST_MASK_ADJUST 405 0x0014 //TX_NS_ENOISE_MIC0_TH -406 0x0014 //TX_MINENOISE_MIC0_TH +406 0x04E7 //TX_MINENOISE_MIC0_TH 407 0x0226 //TX_MINENOISE_MIC0_S_TH 408 0x2879 //TX_MIN_G_CTRL_SSNS 409 0x0400 //TX_METAL_RTO_THR @@ -40864,16 +61932,16 @@ 511 0x6666 //TX_MIC_TO_BFGAIN 512 0x6666 //TX_MICTOBFGAIN0 513 0x0014 //TX_FASTMUE_TH -514 0x0000 //TX_DERVB_LEN_0 -515 0x0000 //TX_DERVB_LEN_1 -516 0x0000 //TX_RHO_DERVB -517 0x0000 //TX_MIC_INDX_DERVB -518 0x0000 //TX_MU_DERVB -519 0x0000 //TX_DR_RESRV_0 -520 0x0000 //TX_DR_RESRV_1 -521 0x0000 //TX_DR_RESRV_2 -522 0x0000 //TX_DR_RESRV_3 -523 0x0000 //TX_DR_RESRV_4 +514 0xC000 //TX_DEREVERB_LF_MU +515 0xC000 //TX_DEREVERB_HF_MU +516 0xCCCC //TX_DEREVERB_DELAY +517 0xD999 //TX_DEREVERB_COEF_LEN +518 0x1F40 //TX_DEREVERB_DNR +519 0x0000 //TX_DEREVERB_ALPHA +520 0x0000 //TX_DEREVERB_BETA +521 0x0000 //TX_GSC_RTOL_TH +522 0x7000 //TX_GSC_RTOH_TH +523 0x0064 //TX_WIDE2_MEANHTH 524 0x0000 //TX_DR_RESRV_5 525 0x0000 //TX_DR_RESRV_6 526 0x0000 //TX_DR_RESRV_7 @@ -41239,16 +62307,81 @@ 886 0x0000 //TX_FASTNS_TFMASKBIN_TH2 887 0x0000 //TX_FASTNS_TFMASKBIN_TH3 888 0x00C8 //TX_FASTNS_ARSPC_TH -889 0xD99A //TX_FASTNS_MASK5_TH +889 0xC000 //TX_FASTNS_MASK5_TH 890 0x051F //TX_POSTSSA_MIN_G_VR_MASK -891 0x7FFF //TX_A_LESSCUT_RTO_MASK +891 0x7000 //TX_A_LESSCUT_RTO_MASK 892 0x1770 //TX_FASTNS_NOISETH 893 0xC000 //TX_FASTNS_SSA_THLFL 894 0xC000 //TX_FASTNS_SSA_THHFL 895 0xCCCC //TX_FASTNS_SSA_THLFH 896 0xD999 //TX_FASTNS_SSA_THHFH +897 0x2339 //TX_SENDFUNC_REG_MICMUTE +898 0x0021 //TX_SENDFUNC_REG_MICMUTE1 +899 0x02BC //TX_MICMUTE_RATIO_THR +900 0x0140 //TX_MICMUTE_AMP_THR +901 0x0004 //TX_MICMUTE_HPF_IND +902 0x00C0 //TX_MICMUTE_LOG_EYR_TH +903 0x0008 //TX_MICMUTE_CVG_TIME +904 0x0008 //TX_MICMUTE_RELEASE_TIME +905 0x01FE //TX_MIC_VOLUME_MIC0MUTE +906 0x0020 //TX_MICMUTE_EPD_OFFSET_0 +907 0x001E //TX_MICMUTE_FRQ_AEC_L +908 0x7999 //TX_MICMUTE_EAD_THR +909 0x7FFF //TX_MICMUTE_LAMBDA_CB_NLE +910 0x7FFF //TX_MICMUTE_LAMBDA_RE_EST +911 0x4000 //TX_DTD_THR1_MICMUTE_0 +912 0x7000 //TX_DTD_THR1_MICMUTE_1 +913 0x7FFF //TX_DTD_THR1_MICMUTE_2 +914 0x7FFF //TX_DTD_THR1_MICMUTE_3 +915 0x6CCC //TX_DTD_THR2_MICMUTE_0 +916 0x0400 //TX_MICMUTE_MIN_EQ_RE_EST_0 +917 0x0400 //TX_MICMUTE_MIN_EQ_RE_EST_1 +918 0x1000 //TX_MICMUTE_MIN_EQ_RE_EST_2 +919 0x7FFF //TX_MICMUTE_MIN_EQ_RE_EST_3 +920 0x7FFF //TX_MICMUTE_MIN_EQ_RE_EST_4 +921 0x4000 //TX_MICMUTE_C_POST_FLT +922 0x03E8 //TX_MICMUTE_DT_CUT_K +923 0x0001 //TX_MICMUTE_DT_CUT_THR +924 0x03E8 //TX_MICMUTE_DT_CUT_K2 +925 0x0001 //TX_MICMUTE_DT_CUT_THR2 +926 0x0064 //TX_MICMUTE_DT2_HOLD_N +927 0x1000 //TX_MICMUTE_RATIODTH_THCUT +928 0x1000 //TX_MICMUTE_B_POST_FLT_ECHOL +929 0x7FFF //TX_MICMUTE_B_POST_FLT_ECHOH +930 0x0400 //TX_MICMUTE_C_POST_FLT_MASK +931 0x7999 //TX_MICMUTE_RATIODTL_CUT_TH +932 0x0258 //TX_MICMUTE_DT_CUT_K1 +933 0x0800 //TX_MICMUTE_N2_SN_EST +934 0xFC00 //TX_MICMUTE_THR_SN_EST_0 +935 0x001C //TX_MICMUTE_MIN_G_CTRL_0 +936 0x6000 //TX_MICMUTE_A_POST_FILT_S_0 +937 0x7000 //TX_MICMUTE_B_POST_FILT_0 +938 0x2710 //TX_MIC1RUB_AMP_THR +939 0x0010 //TX_MIC1MUTE_RATIO_THR +940 0x0450 //TX_MIC1MUTE_AMP_THR +941 0x0008 //TX_MIC1MUTE_CVG_TIME +942 0x0008 //TX_MIC1MUTE_RELEASE_TIME +943 0x0000 //TX_AMS_RESRV_01 +944 0x0000 //TX_AMS_RESRV_02 +945 0x0000 //TX_AMS_RESRV_03 +946 0x0000 //TX_AMS_RESRV_04 +947 0x0000 //TX_AMS_RESRV_05 +948 0x0000 //TX_AMS_RESRV_06 +949 0x0000 //TX_AMS_RESRV_07 +950 0x0000 //TX_AMS_RESRV_08 +951 0x0000 //TX_AMS_RESRV_09 +952 0x0000 //TX_AMS_RESRV_10 +953 0x0000 //TX_AMS_RESRV_11 +954 0x0000 //TX_AMS_RESRV_12 +955 0x0000 //TX_AMS_RESRV_13 +956 0x0000 //TX_AMS_RESRV_14 +957 0x0000 //TX_AMS_RESRV_15 +958 0x0000 //TX_AMS_RESRV_16 +959 0x0000 //TX_AMS_RESRV_17 +960 0x0000 //TX_AMS_RESRV_18 +961 0x0000 //TX_AMS_RESRV_19 #RX -0 0x006C //RX_RECVFUNC_MODE_0 +0 0x242C //RX_RECVFUNC_MODE_0 1 0x0000 //RX_RECVFUNC_MODE_1 2 0x0004 //RX_SAMPLINGFREQ_SIG 3 0x0004 //RX_SAMPLINGFREQ_PROC @@ -41258,7 +62391,7 @@ 7 0x4000 //RX_TDDRC_ALPHA_UP_2 8 0x4000 //RX_TDDRC_ALPHA_UP_3 9 0x4000 //RX_TDDRC_ALPHA_UP_4 -10 0x0800 //RX_PGA +10 0x0403 //RX_PGA 11 0x7E56 //RX_A_HP 12 0x4000 //RX_B_PE 13 0x7800 //RX_THR_PITCH_DET_0 @@ -41276,32 +62409,32 @@ 25 0x000A //RX_FENS_RESRV_0 26 0x0190 //RX_FENS_RESRV_1 27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 -28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 -29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +28 0x4000 //RX_TDDRC_ALPHA_DWN_2 +29 0x4000 //RX_TDDRC_ALPHA_DWN_3 30 0x0002 //RX_EXTRA_NS_L 31 0x0800 //RX_EXTRA_NS_A -32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 -33 0x7FFF //RX_TDDRC_LIMITER_THRD +32 0x4000 //RX_TDDRC_ALPHA_DWN_4 +33 0x7214 //RX_TDDRC_LIMITER_THRD 34 0x0800 //RX_TDDRC_LIMITER_GAIN 35 0x199A //RX_A_POST_FLT 36 0x0000 //RX_LMT_THRD 37 0x4000 //RX_LMT_ALPHA 38 0x0020 //RX_FDEQ_SUBNUM 39 0x4848 //RX_FDEQ_GAIN_0 -40 0x4848 //RX_FDEQ_GAIN_1 -41 0x4848 //RX_FDEQ_GAIN_2 -42 0x4850 //RX_FDEQ_GAIN_3 -43 0x4848 //RX_FDEQ_GAIN_4 -44 0x4848 //RX_FDEQ_GAIN_5 -45 0x4568 //RX_FDEQ_GAIN_6 -46 0x485C //RX_FDEQ_GAIN_7 -47 0x5C60 //RX_FDEQ_GAIN_8 -48 0x685C //RX_FDEQ_GAIN_9 -49 0x5648 //RX_FDEQ_GAIN_10 -50 0x484C //RX_FDEQ_GAIN_11 -51 0x706C //RX_FDEQ_GAIN_12 -52 0x7070 //RX_FDEQ_GAIN_13 -53 0x6868 //RX_FDEQ_GAIN_14 +40 0x4040 //RX_FDEQ_GAIN_1 +41 0x3838 //RX_FDEQ_GAIN_2 +42 0x3448 //RX_FDEQ_GAIN_3 +43 0x343C //RX_FDEQ_GAIN_4 +44 0x4040 //RX_FDEQ_GAIN_5 +45 0x4048 //RX_FDEQ_GAIN_6 +46 0x384C //RX_FDEQ_GAIN_7 +47 0x4C54 //RX_FDEQ_GAIN_8 +48 0x5C54 //RX_FDEQ_GAIN_9 +49 0x4E38 //RX_FDEQ_GAIN_10 +50 0x303C //RX_FDEQ_GAIN_11 +51 0x5450 //RX_FDEQ_GAIN_12 +52 0x4860 //RX_FDEQ_GAIN_13 +53 0x6060 //RX_FDEQ_GAIN_14 54 0x6060 //RX_FDEQ_GAIN_15 55 0x4848 //RX_FDEQ_GAIN_16 56 0x4848 //RX_FDEQ_GAIN_17 @@ -41364,20 +62497,20 @@ 113 0x0002 //RX_TDDRC_THRD_1 114 0x1800 //RX_TDDRC_THRD_2 115 0x1800 //RX_TDDRC_THRD_3 -116 0x6000 //RX_TDDRC_SLANT_0 -117 0x6E00 //RX_TDDRC_SLANT_1 +116 0x7FFF //RX_TDDRC_SLANT_0 +117 0x7FFF //RX_TDDRC_SLANT_1 118 0x4000 //RX_TDDRC_ALPHA_UP_0 119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 120 0x0000 //RX_TDDRC_HMNC_FLAG 121 0x199A //RX_TDDRC_HMNC_GAIN 122 0x0001 //RX_TDDRC_SMT_FLAG 123 0x0CCD //RX_TDDRC_SMT_W -124 0x02D2 //RX_TDDRC_DRC_GAIN +124 0x0439 //RX_TDDRC_DRC_GAIN 125 0x7C00 //RX_LAMBDA_PKA_FP -126 0x2000 //RX_TPKA_FP -127 0x2000 //RX_MIN_G_FP -128 0x0080 //RX_MAX_G_FP -129 0x0013 //RX_SPK_VOL +126 0x1B58 //RX_TPKA_FP +127 0x0400 //RX_MIN_G_FP +128 0x0800 //RX_MAX_G_FP +129 0x0100 //RX_SPK_VOL 130 0x0000 //RX_VOL_RESRV_0 131 0x0000 //RX_MAXLEVEL_CNG 132 0x3000 //RX_BWE_UV_TH @@ -41411,40 +62544,40 @@ 8 0x4000 //RX_TDDRC_ALPHA_UP_3 9 0x4000 //RX_TDDRC_ALPHA_UP_4 27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 -28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 -29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 -32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 -33 0x7FFF //RX_TDDRC_LIMITER_THRD +28 0x4000 //RX_TDDRC_ALPHA_DWN_2 +29 0x4000 //RX_TDDRC_ALPHA_DWN_3 +32 0x4000 //RX_TDDRC_ALPHA_DWN_4 +33 0x7214 //RX_TDDRC_LIMITER_THRD 34 0x0800 //RX_TDDRC_LIMITER_GAIN 112 0x0001 //RX_TDDRC_THRD_0 113 0x0002 //RX_TDDRC_THRD_1 114 0x1800 //RX_TDDRC_THRD_2 115 0x1800 //RX_TDDRC_THRD_3 -116 0x6000 //RX_TDDRC_SLANT_0 -117 0x6E00 //RX_TDDRC_SLANT_1 +116 0x7FFF //RX_TDDRC_SLANT_0 +117 0x7FFF //RX_TDDRC_SLANT_1 118 0x4000 //RX_TDDRC_ALPHA_UP_0 119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 120 0x0000 //RX_TDDRC_HMNC_FLAG 121 0x199A //RX_TDDRC_HMNC_GAIN 122 0x0001 //RX_TDDRC_SMT_FLAG 123 0x0CCD //RX_TDDRC_SMT_W -124 0x02D2 //RX_TDDRC_DRC_GAIN +124 0x0439 //RX_TDDRC_DRC_GAIN 38 0x0020 //RX_FDEQ_SUBNUM 39 0x4848 //RX_FDEQ_GAIN_0 -40 0x4848 //RX_FDEQ_GAIN_1 -41 0x4848 //RX_FDEQ_GAIN_2 -42 0x4850 //RX_FDEQ_GAIN_3 -43 0x4848 //RX_FDEQ_GAIN_4 -44 0x4848 //RX_FDEQ_GAIN_5 -45 0x4568 //RX_FDEQ_GAIN_6 -46 0x485C //RX_FDEQ_GAIN_7 -47 0x5C60 //RX_FDEQ_GAIN_8 -48 0x685C //RX_FDEQ_GAIN_9 -49 0x5648 //RX_FDEQ_GAIN_10 -50 0x484C //RX_FDEQ_GAIN_11 -51 0x706C //RX_FDEQ_GAIN_12 -52 0x7070 //RX_FDEQ_GAIN_13 -53 0x6868 //RX_FDEQ_GAIN_14 +40 0x4040 //RX_FDEQ_GAIN_1 +41 0x3838 //RX_FDEQ_GAIN_2 +42 0x3448 //RX_FDEQ_GAIN_3 +43 0x343C //RX_FDEQ_GAIN_4 +44 0x4040 //RX_FDEQ_GAIN_5 +45 0x4048 //RX_FDEQ_GAIN_6 +46 0x384C //RX_FDEQ_GAIN_7 +47 0x4C54 //RX_FDEQ_GAIN_8 +48 0x5C54 //RX_FDEQ_GAIN_9 +49 0x4E38 //RX_FDEQ_GAIN_10 +50 0x303C //RX_FDEQ_GAIN_11 +51 0x5450 //RX_FDEQ_GAIN_12 +52 0x4860 //RX_FDEQ_GAIN_13 +53 0x6060 //RX_FDEQ_GAIN_14 54 0x6060 //RX_FDEQ_GAIN_15 55 0x4848 //RX_FDEQ_GAIN_16 56 0x4848 //RX_FDEQ_GAIN_17 @@ -41502,7 +62635,7 @@ 108 0x7FFF //RX_FDDRC_SLANT_1_2 109 0x7FFF //RX_FDDRC_SLANT_1_3 110 0x0000 //RX_FDDRC_RESRV_0 -129 0x0013 //RX_SPK_VOL +129 0x0012 //RX_SPK_VOL 130 0x0000 //RX_VOL_RESRV_0 #VOL 1 6 0x4000 //RX_TDDRC_ALPHA_UP_1 @@ -41510,40 +62643,40 @@ 8 0x4000 //RX_TDDRC_ALPHA_UP_3 9 0x4000 //RX_TDDRC_ALPHA_UP_4 27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 -28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 -29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 -32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 -33 0x7FFF //RX_TDDRC_LIMITER_THRD +28 0x4000 //RX_TDDRC_ALPHA_DWN_2 +29 0x4000 //RX_TDDRC_ALPHA_DWN_3 +32 0x4000 //RX_TDDRC_ALPHA_DWN_4 +33 0x7214 //RX_TDDRC_LIMITER_THRD 34 0x0800 //RX_TDDRC_LIMITER_GAIN 112 0x0001 //RX_TDDRC_THRD_0 113 0x0002 //RX_TDDRC_THRD_1 114 0x1800 //RX_TDDRC_THRD_2 115 0x1800 //RX_TDDRC_THRD_3 -116 0x6000 //RX_TDDRC_SLANT_0 -117 0x6E00 //RX_TDDRC_SLANT_1 +116 0x7FFF //RX_TDDRC_SLANT_0 +117 0x7FFF //RX_TDDRC_SLANT_1 118 0x4000 //RX_TDDRC_ALPHA_UP_0 119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 120 0x0000 //RX_TDDRC_HMNC_FLAG 121 0x199A //RX_TDDRC_HMNC_GAIN 122 0x0001 //RX_TDDRC_SMT_FLAG 123 0x0CCD //RX_TDDRC_SMT_W -124 0x02D2 //RX_TDDRC_DRC_GAIN +124 0x0439 //RX_TDDRC_DRC_GAIN 38 0x0020 //RX_FDEQ_SUBNUM 39 0x4848 //RX_FDEQ_GAIN_0 -40 0x4848 //RX_FDEQ_GAIN_1 -41 0x4848 //RX_FDEQ_GAIN_2 -42 0x4850 //RX_FDEQ_GAIN_3 -43 0x4848 //RX_FDEQ_GAIN_4 -44 0x4848 //RX_FDEQ_GAIN_5 -45 0x4568 //RX_FDEQ_GAIN_6 -46 0x485C //RX_FDEQ_GAIN_7 -47 0x5C60 //RX_FDEQ_GAIN_8 -48 0x685C //RX_FDEQ_GAIN_9 -49 0x5648 //RX_FDEQ_GAIN_10 -50 0x484C //RX_FDEQ_GAIN_11 -51 0x706C //RX_FDEQ_GAIN_12 -52 0x7070 //RX_FDEQ_GAIN_13 -53 0x6868 //RX_FDEQ_GAIN_14 +40 0x4040 //RX_FDEQ_GAIN_1 +41 0x3838 //RX_FDEQ_GAIN_2 +42 0x3448 //RX_FDEQ_GAIN_3 +43 0x343C //RX_FDEQ_GAIN_4 +44 0x4040 //RX_FDEQ_GAIN_5 +45 0x4048 //RX_FDEQ_GAIN_6 +46 0x384C //RX_FDEQ_GAIN_7 +47 0x4C54 //RX_FDEQ_GAIN_8 +48 0x5C54 //RX_FDEQ_GAIN_9 +49 0x4E38 //RX_FDEQ_GAIN_10 +50 0x303C //RX_FDEQ_GAIN_11 +51 0x5450 //RX_FDEQ_GAIN_12 +52 0x4860 //RX_FDEQ_GAIN_13 +53 0x6060 //RX_FDEQ_GAIN_14 54 0x6060 //RX_FDEQ_GAIN_15 55 0x4848 //RX_FDEQ_GAIN_16 56 0x4848 //RX_FDEQ_GAIN_17 @@ -41601,7 +62734,7 @@ 108 0x7FFF //RX_FDDRC_SLANT_1_2 109 0x7FFF //RX_FDDRC_SLANT_1_3 110 0x0000 //RX_FDDRC_RESRV_0 -129 0x001C //RX_SPK_VOL +129 0x001A //RX_SPK_VOL 130 0x0000 //RX_VOL_RESRV_0 #VOL 2 6 0x4000 //RX_TDDRC_ALPHA_UP_1 @@ -41609,40 +62742,40 @@ 8 0x4000 //RX_TDDRC_ALPHA_UP_3 9 0x4000 //RX_TDDRC_ALPHA_UP_4 27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 -28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 -29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 -32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 -33 0x7FFF //RX_TDDRC_LIMITER_THRD +28 0x4000 //RX_TDDRC_ALPHA_DWN_2 +29 0x4000 //RX_TDDRC_ALPHA_DWN_3 +32 0x4000 //RX_TDDRC_ALPHA_DWN_4 +33 0x7214 //RX_TDDRC_LIMITER_THRD 34 0x0800 //RX_TDDRC_LIMITER_GAIN 112 0x0001 //RX_TDDRC_THRD_0 113 0x0002 //RX_TDDRC_THRD_1 114 0x1800 //RX_TDDRC_THRD_2 115 0x1800 //RX_TDDRC_THRD_3 -116 0x6000 //RX_TDDRC_SLANT_0 -117 0x6E00 //RX_TDDRC_SLANT_1 +116 0x7FFF //RX_TDDRC_SLANT_0 +117 0x7FFF //RX_TDDRC_SLANT_1 118 0x4000 //RX_TDDRC_ALPHA_UP_0 119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 120 0x0000 //RX_TDDRC_HMNC_FLAG 121 0x199A //RX_TDDRC_HMNC_GAIN 122 0x0001 //RX_TDDRC_SMT_FLAG 123 0x0CCD //RX_TDDRC_SMT_W -124 0x02D2 //RX_TDDRC_DRC_GAIN +124 0x0439 //RX_TDDRC_DRC_GAIN 38 0x0020 //RX_FDEQ_SUBNUM 39 0x4848 //RX_FDEQ_GAIN_0 -40 0x4848 //RX_FDEQ_GAIN_1 -41 0x4848 //RX_FDEQ_GAIN_2 -42 0x4850 //RX_FDEQ_GAIN_3 -43 0x4848 //RX_FDEQ_GAIN_4 -44 0x4848 //RX_FDEQ_GAIN_5 -45 0x4568 //RX_FDEQ_GAIN_6 -46 0x485C //RX_FDEQ_GAIN_7 -47 0x5C60 //RX_FDEQ_GAIN_8 -48 0x685C //RX_FDEQ_GAIN_9 -49 0x5648 //RX_FDEQ_GAIN_10 -50 0x484C //RX_FDEQ_GAIN_11 -51 0x706C //RX_FDEQ_GAIN_12 -52 0x7070 //RX_FDEQ_GAIN_13 -53 0x6868 //RX_FDEQ_GAIN_14 +40 0x4040 //RX_FDEQ_GAIN_1 +41 0x3838 //RX_FDEQ_GAIN_2 +42 0x3448 //RX_FDEQ_GAIN_3 +43 0x343C //RX_FDEQ_GAIN_4 +44 0x4040 //RX_FDEQ_GAIN_5 +45 0x4048 //RX_FDEQ_GAIN_6 +46 0x384C //RX_FDEQ_GAIN_7 +47 0x4C54 //RX_FDEQ_GAIN_8 +48 0x5C54 //RX_FDEQ_GAIN_9 +49 0x4E38 //RX_FDEQ_GAIN_10 +50 0x303C //RX_FDEQ_GAIN_11 +51 0x5450 //RX_FDEQ_GAIN_12 +52 0x4860 //RX_FDEQ_GAIN_13 +53 0x6060 //RX_FDEQ_GAIN_14 54 0x6060 //RX_FDEQ_GAIN_15 55 0x4848 //RX_FDEQ_GAIN_16 56 0x4848 //RX_FDEQ_GAIN_17 @@ -41700,7 +62833,7 @@ 108 0x7FFF //RX_FDDRC_SLANT_1_2 109 0x7FFF //RX_FDDRC_SLANT_1_3 110 0x0000 //RX_FDDRC_RESRV_0 -129 0x0028 //RX_SPK_VOL +129 0x0025 //RX_SPK_VOL 130 0x0000 //RX_VOL_RESRV_0 #VOL 3 6 0x4000 //RX_TDDRC_ALPHA_UP_1 @@ -41708,40 +62841,40 @@ 8 0x4000 //RX_TDDRC_ALPHA_UP_3 9 0x4000 //RX_TDDRC_ALPHA_UP_4 27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 -28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 -29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 -32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 -33 0x7FFF //RX_TDDRC_LIMITER_THRD +28 0x4000 //RX_TDDRC_ALPHA_DWN_2 +29 0x4000 //RX_TDDRC_ALPHA_DWN_3 +32 0x4000 //RX_TDDRC_ALPHA_DWN_4 +33 0x7214 //RX_TDDRC_LIMITER_THRD 34 0x0800 //RX_TDDRC_LIMITER_GAIN 112 0x0001 //RX_TDDRC_THRD_0 113 0x0002 //RX_TDDRC_THRD_1 114 0x1800 //RX_TDDRC_THRD_2 115 0x1800 //RX_TDDRC_THRD_3 -116 0x6000 //RX_TDDRC_SLANT_0 -117 0x6E00 //RX_TDDRC_SLANT_1 +116 0x7FFF //RX_TDDRC_SLANT_0 +117 0x7FFF //RX_TDDRC_SLANT_1 118 0x4000 //RX_TDDRC_ALPHA_UP_0 119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 120 0x0000 //RX_TDDRC_HMNC_FLAG 121 0x199A //RX_TDDRC_HMNC_GAIN 122 0x0001 //RX_TDDRC_SMT_FLAG 123 0x0CCD //RX_TDDRC_SMT_W -124 0x02D2 //RX_TDDRC_DRC_GAIN +124 0x0439 //RX_TDDRC_DRC_GAIN 38 0x0020 //RX_FDEQ_SUBNUM 39 0x4848 //RX_FDEQ_GAIN_0 -40 0x4848 //RX_FDEQ_GAIN_1 -41 0x4848 //RX_FDEQ_GAIN_2 -42 0x4850 //RX_FDEQ_GAIN_3 -43 0x4848 //RX_FDEQ_GAIN_4 -44 0x4848 //RX_FDEQ_GAIN_5 -45 0x4568 //RX_FDEQ_GAIN_6 -46 0x485C //RX_FDEQ_GAIN_7 -47 0x5C60 //RX_FDEQ_GAIN_8 -48 0x685C //RX_FDEQ_GAIN_9 -49 0x5648 //RX_FDEQ_GAIN_10 -50 0x484C //RX_FDEQ_GAIN_11 -51 0x706C //RX_FDEQ_GAIN_12 -52 0x7070 //RX_FDEQ_GAIN_13 -53 0x6868 //RX_FDEQ_GAIN_14 +40 0x4040 //RX_FDEQ_GAIN_1 +41 0x3838 //RX_FDEQ_GAIN_2 +42 0x3448 //RX_FDEQ_GAIN_3 +43 0x343C //RX_FDEQ_GAIN_4 +44 0x4040 //RX_FDEQ_GAIN_5 +45 0x4048 //RX_FDEQ_GAIN_6 +46 0x384C //RX_FDEQ_GAIN_7 +47 0x4C54 //RX_FDEQ_GAIN_8 +48 0x5C54 //RX_FDEQ_GAIN_9 +49 0x4E38 //RX_FDEQ_GAIN_10 +50 0x303C //RX_FDEQ_GAIN_11 +51 0x5450 //RX_FDEQ_GAIN_12 +52 0x4860 //RX_FDEQ_GAIN_13 +53 0x6060 //RX_FDEQ_GAIN_14 54 0x6060 //RX_FDEQ_GAIN_15 55 0x4848 //RX_FDEQ_GAIN_16 56 0x4848 //RX_FDEQ_GAIN_17 @@ -41807,40 +62940,40 @@ 8 0x4000 //RX_TDDRC_ALPHA_UP_3 9 0x4000 //RX_TDDRC_ALPHA_UP_4 27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 -28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 -29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 -32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 -33 0x7FFF //RX_TDDRC_LIMITER_THRD +28 0x4000 //RX_TDDRC_ALPHA_DWN_2 +29 0x4000 //RX_TDDRC_ALPHA_DWN_3 +32 0x4000 //RX_TDDRC_ALPHA_DWN_4 +33 0x7214 //RX_TDDRC_LIMITER_THRD 34 0x0800 //RX_TDDRC_LIMITER_GAIN 112 0x0001 //RX_TDDRC_THRD_0 113 0x0002 //RX_TDDRC_THRD_1 114 0x1800 //RX_TDDRC_THRD_2 115 0x1800 //RX_TDDRC_THRD_3 -116 0x6000 //RX_TDDRC_SLANT_0 -117 0x6E00 //RX_TDDRC_SLANT_1 +116 0x7FFF //RX_TDDRC_SLANT_0 +117 0x7FFF //RX_TDDRC_SLANT_1 118 0x4000 //RX_TDDRC_ALPHA_UP_0 119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 120 0x0000 //RX_TDDRC_HMNC_FLAG 121 0x199A //RX_TDDRC_HMNC_GAIN 122 0x0001 //RX_TDDRC_SMT_FLAG 123 0x0CCD //RX_TDDRC_SMT_W -124 0x02D2 //RX_TDDRC_DRC_GAIN +124 0x0439 //RX_TDDRC_DRC_GAIN 38 0x0020 //RX_FDEQ_SUBNUM -39 0x4C4C //RX_FDEQ_GAIN_0 -40 0x4C4C //RX_FDEQ_GAIN_1 -41 0x4C48 //RX_FDEQ_GAIN_2 -42 0x4870 //RX_FDEQ_GAIN_3 -43 0x4848 //RX_FDEQ_GAIN_4 -44 0x4848 //RX_FDEQ_GAIN_5 -45 0x4568 //RX_FDEQ_GAIN_6 -46 0x485C //RX_FDEQ_GAIN_7 -47 0x5C60 //RX_FDEQ_GAIN_8 -48 0x685C //RX_FDEQ_GAIN_9 -49 0x5648 //RX_FDEQ_GAIN_10 -50 0x484C //RX_FDEQ_GAIN_11 -51 0x706C //RX_FDEQ_GAIN_12 -52 0x7070 //RX_FDEQ_GAIN_13 -53 0x6868 //RX_FDEQ_GAIN_14 +39 0x4848 //RX_FDEQ_GAIN_0 +40 0x4040 //RX_FDEQ_GAIN_1 +41 0x3838 //RX_FDEQ_GAIN_2 +42 0x3448 //RX_FDEQ_GAIN_3 +43 0x343C //RX_FDEQ_GAIN_4 +44 0x4040 //RX_FDEQ_GAIN_5 +45 0x4048 //RX_FDEQ_GAIN_6 +46 0x384C //RX_FDEQ_GAIN_7 +47 0x4C54 //RX_FDEQ_GAIN_8 +48 0x5C54 //RX_FDEQ_GAIN_9 +49 0x4E38 //RX_FDEQ_GAIN_10 +50 0x303C //RX_FDEQ_GAIN_11 +51 0x5450 //RX_FDEQ_GAIN_12 +52 0x4860 //RX_FDEQ_GAIN_13 +53 0x6060 //RX_FDEQ_GAIN_14 54 0x6060 //RX_FDEQ_GAIN_15 55 0x4848 //RX_FDEQ_GAIN_16 56 0x4848 //RX_FDEQ_GAIN_17 @@ -41898,7 +63031,7 @@ 108 0x7FFF //RX_FDDRC_SLANT_1_2 109 0x7FFF //RX_FDDRC_SLANT_1_3 110 0x0000 //RX_FDDRC_RESRV_0 -129 0x0052 //RX_SPK_VOL +129 0x004D //RX_SPK_VOL 130 0x0000 //RX_VOL_RESRV_0 #VOL 5 6 0x4000 //RX_TDDRC_ALPHA_UP_1 @@ -41906,40 +63039,40 @@ 8 0x4000 //RX_TDDRC_ALPHA_UP_3 9 0x4000 //RX_TDDRC_ALPHA_UP_4 27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 -28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 -29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 -32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 -33 0x7FFF //RX_TDDRC_LIMITER_THRD +28 0x4000 //RX_TDDRC_ALPHA_DWN_2 +29 0x4000 //RX_TDDRC_ALPHA_DWN_3 +32 0x4000 //RX_TDDRC_ALPHA_DWN_4 +33 0x7214 //RX_TDDRC_LIMITER_THRD 34 0x0800 //RX_TDDRC_LIMITER_GAIN 112 0x0001 //RX_TDDRC_THRD_0 113 0x0002 //RX_TDDRC_THRD_1 114 0x1800 //RX_TDDRC_THRD_2 115 0x1800 //RX_TDDRC_THRD_3 -116 0x6000 //RX_TDDRC_SLANT_0 -117 0x6E00 //RX_TDDRC_SLANT_1 +116 0x7FFF //RX_TDDRC_SLANT_0 +117 0x7FFF //RX_TDDRC_SLANT_1 118 0x4000 //RX_TDDRC_ALPHA_UP_0 119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 120 0x0000 //RX_TDDRC_HMNC_FLAG 121 0x199A //RX_TDDRC_HMNC_GAIN 122 0x0001 //RX_TDDRC_SMT_FLAG 123 0x0CCD //RX_TDDRC_SMT_W -124 0x02D2 //RX_TDDRC_DRC_GAIN +124 0x0439 //RX_TDDRC_DRC_GAIN 38 0x0020 //RX_FDEQ_SUBNUM -39 0x4C4C //RX_FDEQ_GAIN_0 -40 0x4C4C //RX_FDEQ_GAIN_1 -41 0x4C48 //RX_FDEQ_GAIN_2 -42 0x4870 //RX_FDEQ_GAIN_3 -43 0x4848 //RX_FDEQ_GAIN_4 -44 0x4848 //RX_FDEQ_GAIN_5 -45 0x4568 //RX_FDEQ_GAIN_6 -46 0x485C //RX_FDEQ_GAIN_7 -47 0x5C60 //RX_FDEQ_GAIN_8 -48 0x685C //RX_FDEQ_GAIN_9 -49 0x5648 //RX_FDEQ_GAIN_10 -50 0x484C //RX_FDEQ_GAIN_11 -51 0x706C //RX_FDEQ_GAIN_12 -52 0x7070 //RX_FDEQ_GAIN_13 -53 0x6868 //RX_FDEQ_GAIN_14 +39 0x4848 //RX_FDEQ_GAIN_0 +40 0x4040 //RX_FDEQ_GAIN_1 +41 0x3838 //RX_FDEQ_GAIN_2 +42 0x3448 //RX_FDEQ_GAIN_3 +43 0x343C //RX_FDEQ_GAIN_4 +44 0x4040 //RX_FDEQ_GAIN_5 +45 0x4048 //RX_FDEQ_GAIN_6 +46 0x384C //RX_FDEQ_GAIN_7 +47 0x4C54 //RX_FDEQ_GAIN_8 +48 0x5C54 //RX_FDEQ_GAIN_9 +49 0x4E38 //RX_FDEQ_GAIN_10 +50 0x303C //RX_FDEQ_GAIN_11 +51 0x5450 //RX_FDEQ_GAIN_12 +52 0x4860 //RX_FDEQ_GAIN_13 +53 0x6060 //RX_FDEQ_GAIN_14 54 0x6060 //RX_FDEQ_GAIN_15 55 0x4848 //RX_FDEQ_GAIN_16 56 0x4848 //RX_FDEQ_GAIN_17 @@ -41997,7 +63130,7 @@ 108 0x7FFF //RX_FDDRC_SLANT_1_2 109 0x7FFF //RX_FDDRC_SLANT_1_3 110 0x0000 //RX_FDDRC_RESRV_0 -129 0x0078 //RX_SPK_VOL +129 0x0074 //RX_SPK_VOL 130 0x0000 //RX_VOL_RESRV_0 #VOL 6 6 0x4000 //RX_TDDRC_ALPHA_UP_1 @@ -42005,40 +63138,40 @@ 8 0x4000 //RX_TDDRC_ALPHA_UP_3 9 0x4000 //RX_TDDRC_ALPHA_UP_4 27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 -28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 -29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 -32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 -33 0x7FFF //RX_TDDRC_LIMITER_THRD +28 0x4000 //RX_TDDRC_ALPHA_DWN_2 +29 0x4000 //RX_TDDRC_ALPHA_DWN_3 +32 0x4000 //RX_TDDRC_ALPHA_DWN_4 +33 0x7214 //RX_TDDRC_LIMITER_THRD 34 0x0800 //RX_TDDRC_LIMITER_GAIN 112 0x0001 //RX_TDDRC_THRD_0 113 0x0002 //RX_TDDRC_THRD_1 114 0x1800 //RX_TDDRC_THRD_2 115 0x1800 //RX_TDDRC_THRD_3 -116 0x6000 //RX_TDDRC_SLANT_0 -117 0x6E00 //RX_TDDRC_SLANT_1 +116 0x7FFF //RX_TDDRC_SLANT_0 +117 0x7FFF //RX_TDDRC_SLANT_1 118 0x4000 //RX_TDDRC_ALPHA_UP_0 119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 120 0x0000 //RX_TDDRC_HMNC_FLAG 121 0x199A //RX_TDDRC_HMNC_GAIN 122 0x0001 //RX_TDDRC_SMT_FLAG 123 0x0CCD //RX_TDDRC_SMT_W -124 0x02D2 //RX_TDDRC_DRC_GAIN +124 0x0439 //RX_TDDRC_DRC_GAIN 38 0x0020 //RX_FDEQ_SUBNUM -39 0x4C4C //RX_FDEQ_GAIN_0 -40 0x4C4C //RX_FDEQ_GAIN_1 -41 0x4C48 //RX_FDEQ_GAIN_2 -42 0x4870 //RX_FDEQ_GAIN_3 -43 0x4848 //RX_FDEQ_GAIN_4 -44 0x4848 //RX_FDEQ_GAIN_5 -45 0x4568 //RX_FDEQ_GAIN_6 -46 0x485C //RX_FDEQ_GAIN_7 -47 0x5C60 //RX_FDEQ_GAIN_8 -48 0x685C //RX_FDEQ_GAIN_9 -49 0x5648 //RX_FDEQ_GAIN_10 -50 0x484C //RX_FDEQ_GAIN_11 -51 0x706C //RX_FDEQ_GAIN_12 -52 0x7070 //RX_FDEQ_GAIN_13 -53 0x6868 //RX_FDEQ_GAIN_14 +39 0x4848 //RX_FDEQ_GAIN_0 +40 0x4040 //RX_FDEQ_GAIN_1 +41 0x3838 //RX_FDEQ_GAIN_2 +42 0x3448 //RX_FDEQ_GAIN_3 +43 0x343C //RX_FDEQ_GAIN_4 +44 0x4040 //RX_FDEQ_GAIN_5 +45 0x4048 //RX_FDEQ_GAIN_6 +46 0x384C //RX_FDEQ_GAIN_7 +47 0x4C54 //RX_FDEQ_GAIN_8 +48 0x5C54 //RX_FDEQ_GAIN_9 +49 0x4E38 //RX_FDEQ_GAIN_10 +50 0x303C //RX_FDEQ_GAIN_11 +51 0x5450 //RX_FDEQ_GAIN_12 +52 0x4860 //RX_FDEQ_GAIN_13 +53 0x6060 //RX_FDEQ_GAIN_14 54 0x6060 //RX_FDEQ_GAIN_15 55 0x4848 //RX_FDEQ_GAIN_16 56 0x4848 //RX_FDEQ_GAIN_17 @@ -42098,18 +63231,869 @@ 110 0x0000 //RX_FDDRC_RESRV_0 129 0x0100 //RX_SPK_VOL 130 0x0000 //RX_VOL_RESRV_0 +#RX 2 +157 0x242C //RX_RECVFUNC_MODE_0 +158 0x0000 //RX_RECVFUNC_MODE_1 +159 0x0004 //RX_SAMPLINGFREQ_SIG +160 0x0004 //RX_SAMPLINGFREQ_PROC +161 0x000A //RX_FRAME_SZ +162 0x0000 //RX_DELAY_OPT +163 0x4000 //RX_TDDRC_ALPHA_UP_1 +164 0x4000 //RX_TDDRC_ALPHA_UP_2 +165 0x4000 //RX_TDDRC_ALPHA_UP_3 +166 0x4000 //RX_TDDRC_ALPHA_UP_4 +167 0x0403 //RX_PGA +168 0x7E56 //RX_A_HP +169 0x4000 //RX_B_PE +170 0x7800 //RX_THR_PITCH_DET_0 +171 0x7000 //RX_THR_PITCH_DET_1 +172 0x6000 //RX_THR_PITCH_DET_2 +173 0x0008 //RX_PITCH_BFR_LEN +174 0x0003 //RX_SBD_PITCH_DET +175 0x0100 //RX_PP_RESRV_0 +176 0x0020 //RX_PP_RESRV_1 +177 0x0400 //RX_N_SN_EST +178 0x000C //RX_N2_SN_EST +179 0x0014 //RX_NS_LVL_CTRL +180 0xF400 //RX_THR_SN_EST +181 0x7E00 //RX_LAMBDA_PFILT +182 0x000A //RX_FENS_RESRV_0 +183 0x0190 //RX_FENS_RESRV_1 +184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +185 0x4000 //RX_TDDRC_ALPHA_DWN_2 +186 0x4000 //RX_TDDRC_ALPHA_DWN_3 +187 0x0002 //RX_EXTRA_NS_L +188 0x0800 //RX_EXTRA_NS_A +189 0x4000 //RX_TDDRC_ALPHA_DWN_4 +190 0x7214 //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +192 0x199A //RX_A_POST_FLT +193 0x0000 //RX_LMT_THRD +194 0x4000 //RX_LMT_ALPHA +195 0x0020 //RX_FDEQ_SUBNUM +196 0x4848 //RX_FDEQ_GAIN_0 +197 0x4040 //RX_FDEQ_GAIN_1 +198 0x3838 //RX_FDEQ_GAIN_2 +199 0x3448 //RX_FDEQ_GAIN_3 +200 0x343C //RX_FDEQ_GAIN_4 +201 0x4040 //RX_FDEQ_GAIN_5 +202 0x4048 //RX_FDEQ_GAIN_6 +203 0x384C //RX_FDEQ_GAIN_7 +204 0x4C54 //RX_FDEQ_GAIN_8 +205 0x5C54 //RX_FDEQ_GAIN_9 +206 0x4E38 //RX_FDEQ_GAIN_10 +207 0x303C //RX_FDEQ_GAIN_11 +208 0x5450 //RX_FDEQ_GAIN_12 +209 0x4860 //RX_FDEQ_GAIN_13 +210 0x6060 //RX_FDEQ_GAIN_14 +211 0x6060 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0202 //RX_FDEQ_BIN_0 +221 0x0203 //RX_FDEQ_BIN_1 +222 0x0303 //RX_FDEQ_BIN_2 +223 0x0402 //RX_FDEQ_BIN_3 +224 0x0504 //RX_FDEQ_BIN_4 +225 0x0209 //RX_FDEQ_BIN_5 +226 0x0808 //RX_FDEQ_BIN_6 +227 0x090A //RX_FDEQ_BIN_7 +228 0x0B0C //RX_FDEQ_BIN_8 +229 0x0D0E //RX_FDEQ_BIN_9 +230 0x1013 //RX_FDEQ_BIN_10 +231 0x1719 //RX_FDEQ_BIN_11 +232 0x1B1E //RX_FDEQ_BIN_12 +233 0x1E1E //RX_FDEQ_BIN_13 +234 0x1E28 //RX_FDEQ_BIN_14 +235 0x282C //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x4000 //RX_FDEQ_RESRV_0 +245 0x0320 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0030 //RX_FDDRC_BAND_MARGIN_1 +248 0x0050 //RX_FDDRC_BAND_MARGIN_2 +249 0x0080 //RX_FDDRC_BAND_MARGIN_3 +250 0x0004 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x2000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x2000 //RX_FDDRC_THRD_3_2 +258 0x5000 //RX_FDDRC_THRD_3_3 +259 0x4000 //RX_FDDRC_SLANT_0_0 +260 0x4000 //RX_FDDRC_SLANT_0_1 +261 0x4000 //RX_FDDRC_SLANT_0_2 +262 0x4000 //RX_FDDRC_SLANT_0_3 +263 0x7FFF //RX_FDDRC_SLANT_1_0 +264 0x7FFF //RX_FDDRC_SLANT_1_1 +265 0x7FFF //RX_FDDRC_SLANT_1_2 +266 0x7FFF //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +268 0x0002 //RX_FILTINDX +269 0x0001 //RX_TDDRC_THRD_0 +270 0x0002 //RX_TDDRC_THRD_1 +271 0x1800 //RX_TDDRC_THRD_2 +272 0x1800 //RX_TDDRC_THRD_3 +273 0x7FFF //RX_TDDRC_SLANT_0 +274 0x7FFF //RX_TDDRC_SLANT_1 +275 0x4000 //RX_TDDRC_ALPHA_UP_0 +276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x199A //RX_TDDRC_HMNC_GAIN +279 0x0001 //RX_TDDRC_SMT_FLAG +280 0x0CCD //RX_TDDRC_SMT_W +281 0x0439 //RX_TDDRC_DRC_GAIN +282 0x7C00 //RX_LAMBDA_PKA_FP +283 0x1B58 //RX_TPKA_FP +284 0x0400 //RX_MIN_G_FP +285 0x0800 //RX_MAX_G_FP +286 0x0100 //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 +288 0x0000 //RX_MAXLEVEL_CNG +289 0x3000 //RX_BWE_UV_TH +290 0x3000 //RX_BWE_UV_TH2 +291 0x1800 //RX_BWE_UV_TH3 +292 0x1000 //RX_BWE_V_TH +293 0x04CD //RX_BWE_GAIN1_V_TH1 +294 0x0F33 //RX_BWE_GAIN1_V_TH2 +295 0x7333 //RX_BWE_UV_EQ +296 0x199A //RX_BWE_V_EQ +297 0x7333 //RX_BWE_TONE_TH +298 0x0004 //RX_BWE_UV_HOLD_T +299 0x6CCD //RX_BWE_GAIN2_ALPHA +300 0x799A //RX_BWE_GAIN3_ALPHA +301 0x001E //RX_BWE_CUTOFF +302 0x3000 //RX_BWE_GAINFILL +303 0x3200 //RX_BWE_MAXTH_TONE +304 0x2000 //RX_BWE_EQ_0 +305 0x2000 //RX_BWE_EQ_1 +306 0x2000 //RX_BWE_EQ_2 +307 0x2000 //RX_BWE_EQ_3 +308 0x2000 //RX_BWE_EQ_4 +309 0x2000 //RX_BWE_EQ_5 +310 0x2000 //RX_BWE_EQ_6 +311 0x0000 //RX_BWE_RESRV_0 +312 0x0000 //RX_BWE_RESRV_1 +313 0x0000 //RX_BWE_RESRV_2 +#VOL 0 +163 0x4000 //RX_TDDRC_ALPHA_UP_1 +164 0x4000 //RX_TDDRC_ALPHA_UP_2 +165 0x4000 //RX_TDDRC_ALPHA_UP_3 +166 0x4000 //RX_TDDRC_ALPHA_UP_4 +184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +185 0x4000 //RX_TDDRC_ALPHA_DWN_2 +186 0x4000 //RX_TDDRC_ALPHA_DWN_3 +189 0x4000 //RX_TDDRC_ALPHA_DWN_4 +190 0x7214 //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +269 0x0001 //RX_TDDRC_THRD_0 +270 0x0002 //RX_TDDRC_THRD_1 +271 0x1800 //RX_TDDRC_THRD_2 +272 0x1800 //RX_TDDRC_THRD_3 +273 0x7FFF //RX_TDDRC_SLANT_0 +274 0x7FFF //RX_TDDRC_SLANT_1 +275 0x4000 //RX_TDDRC_ALPHA_UP_0 +276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x199A //RX_TDDRC_HMNC_GAIN +279 0x0001 //RX_TDDRC_SMT_FLAG +280 0x0CCD //RX_TDDRC_SMT_W +281 0x0439 //RX_TDDRC_DRC_GAIN +195 0x0020 //RX_FDEQ_SUBNUM +196 0x4848 //RX_FDEQ_GAIN_0 +197 0x4040 //RX_FDEQ_GAIN_1 +198 0x3838 //RX_FDEQ_GAIN_2 +199 0x3448 //RX_FDEQ_GAIN_3 +200 0x343C //RX_FDEQ_GAIN_4 +201 0x4040 //RX_FDEQ_GAIN_5 +202 0x4048 //RX_FDEQ_GAIN_6 +203 0x384C //RX_FDEQ_GAIN_7 +204 0x4C54 //RX_FDEQ_GAIN_8 +205 0x5C54 //RX_FDEQ_GAIN_9 +206 0x4E38 //RX_FDEQ_GAIN_10 +207 0x303C //RX_FDEQ_GAIN_11 +208 0x5450 //RX_FDEQ_GAIN_12 +209 0x4860 //RX_FDEQ_GAIN_13 +210 0x6060 //RX_FDEQ_GAIN_14 +211 0x6060 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0202 //RX_FDEQ_BIN_0 +221 0x0203 //RX_FDEQ_BIN_1 +222 0x0303 //RX_FDEQ_BIN_2 +223 0x0402 //RX_FDEQ_BIN_3 +224 0x0504 //RX_FDEQ_BIN_4 +225 0x0209 //RX_FDEQ_BIN_5 +226 0x0808 //RX_FDEQ_BIN_6 +227 0x090A //RX_FDEQ_BIN_7 +228 0x0B0C //RX_FDEQ_BIN_8 +229 0x0D0E //RX_FDEQ_BIN_9 +230 0x1013 //RX_FDEQ_BIN_10 +231 0x1719 //RX_FDEQ_BIN_11 +232 0x1B1E //RX_FDEQ_BIN_12 +233 0x1E1E //RX_FDEQ_BIN_13 +234 0x1E28 //RX_FDEQ_BIN_14 +235 0x282C //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x4000 //RX_FDEQ_RESRV_0 +245 0x0320 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0030 //RX_FDDRC_BAND_MARGIN_1 +248 0x0050 //RX_FDDRC_BAND_MARGIN_2 +249 0x0080 //RX_FDDRC_BAND_MARGIN_3 +250 0x0004 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x2000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x2000 //RX_FDDRC_THRD_3_2 +258 0x5000 //RX_FDDRC_THRD_3_3 +259 0x4000 //RX_FDDRC_SLANT_0_0 +260 0x4000 //RX_FDDRC_SLANT_0_1 +261 0x4000 //RX_FDDRC_SLANT_0_2 +262 0x4000 //RX_FDDRC_SLANT_0_3 +263 0x7FFF //RX_FDDRC_SLANT_1_0 +264 0x7FFF //RX_FDDRC_SLANT_1_1 +265 0x7FFF //RX_FDDRC_SLANT_1_2 +266 0x7FFF //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +286 0x0012 //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 +#VOL 1 +163 0x4000 //RX_TDDRC_ALPHA_UP_1 +164 0x4000 //RX_TDDRC_ALPHA_UP_2 +165 0x4000 //RX_TDDRC_ALPHA_UP_3 +166 0x4000 //RX_TDDRC_ALPHA_UP_4 +184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +185 0x4000 //RX_TDDRC_ALPHA_DWN_2 +186 0x4000 //RX_TDDRC_ALPHA_DWN_3 +189 0x4000 //RX_TDDRC_ALPHA_DWN_4 +190 0x7214 //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +269 0x0001 //RX_TDDRC_THRD_0 +270 0x0002 //RX_TDDRC_THRD_1 +271 0x1800 //RX_TDDRC_THRD_2 +272 0x1800 //RX_TDDRC_THRD_3 +273 0x7FFF //RX_TDDRC_SLANT_0 +274 0x7FFF //RX_TDDRC_SLANT_1 +275 0x4000 //RX_TDDRC_ALPHA_UP_0 +276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x199A //RX_TDDRC_HMNC_GAIN +279 0x0001 //RX_TDDRC_SMT_FLAG +280 0x0CCD //RX_TDDRC_SMT_W +281 0x0439 //RX_TDDRC_DRC_GAIN +195 0x0020 //RX_FDEQ_SUBNUM +196 0x4848 //RX_FDEQ_GAIN_0 +197 0x4040 //RX_FDEQ_GAIN_1 +198 0x3838 //RX_FDEQ_GAIN_2 +199 0x3448 //RX_FDEQ_GAIN_3 +200 0x343C //RX_FDEQ_GAIN_4 +201 0x4040 //RX_FDEQ_GAIN_5 +202 0x4048 //RX_FDEQ_GAIN_6 +203 0x384C //RX_FDEQ_GAIN_7 +204 0x4C54 //RX_FDEQ_GAIN_8 +205 0x5C54 //RX_FDEQ_GAIN_9 +206 0x4E38 //RX_FDEQ_GAIN_10 +207 0x303C //RX_FDEQ_GAIN_11 +208 0x5450 //RX_FDEQ_GAIN_12 +209 0x4860 //RX_FDEQ_GAIN_13 +210 0x6060 //RX_FDEQ_GAIN_14 +211 0x6060 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0202 //RX_FDEQ_BIN_0 +221 0x0203 //RX_FDEQ_BIN_1 +222 0x0303 //RX_FDEQ_BIN_2 +223 0x0402 //RX_FDEQ_BIN_3 +224 0x0504 //RX_FDEQ_BIN_4 +225 0x0209 //RX_FDEQ_BIN_5 +226 0x0808 //RX_FDEQ_BIN_6 +227 0x090A //RX_FDEQ_BIN_7 +228 0x0B0C //RX_FDEQ_BIN_8 +229 0x0D0E //RX_FDEQ_BIN_9 +230 0x1013 //RX_FDEQ_BIN_10 +231 0x1719 //RX_FDEQ_BIN_11 +232 0x1B1E //RX_FDEQ_BIN_12 +233 0x1E1E //RX_FDEQ_BIN_13 +234 0x1E28 //RX_FDEQ_BIN_14 +235 0x282C //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x4000 //RX_FDEQ_RESRV_0 +245 0x0320 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0030 //RX_FDDRC_BAND_MARGIN_1 +248 0x0050 //RX_FDDRC_BAND_MARGIN_2 +249 0x0080 //RX_FDDRC_BAND_MARGIN_3 +250 0x0004 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x2000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x2000 //RX_FDDRC_THRD_3_2 +258 0x5000 //RX_FDDRC_THRD_3_3 +259 0x4000 //RX_FDDRC_SLANT_0_0 +260 0x4000 //RX_FDDRC_SLANT_0_1 +261 0x4000 //RX_FDDRC_SLANT_0_2 +262 0x4000 //RX_FDDRC_SLANT_0_3 +263 0x7FFF //RX_FDDRC_SLANT_1_0 +264 0x7FFF //RX_FDDRC_SLANT_1_1 +265 0x7FFF //RX_FDDRC_SLANT_1_2 +266 0x7FFF //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +286 0x001A //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 +#VOL 2 +163 0x4000 //RX_TDDRC_ALPHA_UP_1 +164 0x4000 //RX_TDDRC_ALPHA_UP_2 +165 0x4000 //RX_TDDRC_ALPHA_UP_3 +166 0x4000 //RX_TDDRC_ALPHA_UP_4 +184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +185 0x4000 //RX_TDDRC_ALPHA_DWN_2 +186 0x4000 //RX_TDDRC_ALPHA_DWN_3 +189 0x4000 //RX_TDDRC_ALPHA_DWN_4 +190 0x7214 //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +269 0x0001 //RX_TDDRC_THRD_0 +270 0x0002 //RX_TDDRC_THRD_1 +271 0x1800 //RX_TDDRC_THRD_2 +272 0x1800 //RX_TDDRC_THRD_3 +273 0x7FFF //RX_TDDRC_SLANT_0 +274 0x7FFF //RX_TDDRC_SLANT_1 +275 0x4000 //RX_TDDRC_ALPHA_UP_0 +276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x199A //RX_TDDRC_HMNC_GAIN +279 0x0001 //RX_TDDRC_SMT_FLAG +280 0x0CCD //RX_TDDRC_SMT_W +281 0x0439 //RX_TDDRC_DRC_GAIN +195 0x0020 //RX_FDEQ_SUBNUM +196 0x4848 //RX_FDEQ_GAIN_0 +197 0x4040 //RX_FDEQ_GAIN_1 +198 0x3838 //RX_FDEQ_GAIN_2 +199 0x3448 //RX_FDEQ_GAIN_3 +200 0x343C //RX_FDEQ_GAIN_4 +201 0x4040 //RX_FDEQ_GAIN_5 +202 0x4048 //RX_FDEQ_GAIN_6 +203 0x384C //RX_FDEQ_GAIN_7 +204 0x4C54 //RX_FDEQ_GAIN_8 +205 0x5C54 //RX_FDEQ_GAIN_9 +206 0x4E38 //RX_FDEQ_GAIN_10 +207 0x303C //RX_FDEQ_GAIN_11 +208 0x5450 //RX_FDEQ_GAIN_12 +209 0x4860 //RX_FDEQ_GAIN_13 +210 0x6060 //RX_FDEQ_GAIN_14 +211 0x6060 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0202 //RX_FDEQ_BIN_0 +221 0x0203 //RX_FDEQ_BIN_1 +222 0x0303 //RX_FDEQ_BIN_2 +223 0x0402 //RX_FDEQ_BIN_3 +224 0x0504 //RX_FDEQ_BIN_4 +225 0x0209 //RX_FDEQ_BIN_5 +226 0x0808 //RX_FDEQ_BIN_6 +227 0x090A //RX_FDEQ_BIN_7 +228 0x0B0C //RX_FDEQ_BIN_8 +229 0x0D0E //RX_FDEQ_BIN_9 +230 0x1013 //RX_FDEQ_BIN_10 +231 0x1719 //RX_FDEQ_BIN_11 +232 0x1B1E //RX_FDEQ_BIN_12 +233 0x1E1E //RX_FDEQ_BIN_13 +234 0x1E28 //RX_FDEQ_BIN_14 +235 0x282C //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x4000 //RX_FDEQ_RESRV_0 +245 0x0320 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0030 //RX_FDDRC_BAND_MARGIN_1 +248 0x0050 //RX_FDDRC_BAND_MARGIN_2 +249 0x0080 //RX_FDDRC_BAND_MARGIN_3 +250 0x0004 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x2000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x2000 //RX_FDDRC_THRD_3_2 +258 0x5000 //RX_FDDRC_THRD_3_3 +259 0x4000 //RX_FDDRC_SLANT_0_0 +260 0x4000 //RX_FDDRC_SLANT_0_1 +261 0x4000 //RX_FDDRC_SLANT_0_2 +262 0x4000 //RX_FDDRC_SLANT_0_3 +263 0x7FFF //RX_FDDRC_SLANT_1_0 +264 0x7FFF //RX_FDDRC_SLANT_1_1 +265 0x7FFF //RX_FDDRC_SLANT_1_2 +266 0x7FFF //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +286 0x0025 //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 +#VOL 3 +163 0x4000 //RX_TDDRC_ALPHA_UP_1 +164 0x4000 //RX_TDDRC_ALPHA_UP_2 +165 0x4000 //RX_TDDRC_ALPHA_UP_3 +166 0x4000 //RX_TDDRC_ALPHA_UP_4 +184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +185 0x4000 //RX_TDDRC_ALPHA_DWN_2 +186 0x4000 //RX_TDDRC_ALPHA_DWN_3 +189 0x4000 //RX_TDDRC_ALPHA_DWN_4 +190 0x7214 //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +269 0x0001 //RX_TDDRC_THRD_0 +270 0x0002 //RX_TDDRC_THRD_1 +271 0x1800 //RX_TDDRC_THRD_2 +272 0x1800 //RX_TDDRC_THRD_3 +273 0x7FFF //RX_TDDRC_SLANT_0 +274 0x7FFF //RX_TDDRC_SLANT_1 +275 0x4000 //RX_TDDRC_ALPHA_UP_0 +276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x199A //RX_TDDRC_HMNC_GAIN +279 0x0001 //RX_TDDRC_SMT_FLAG +280 0x0CCD //RX_TDDRC_SMT_W +281 0x0439 //RX_TDDRC_DRC_GAIN +195 0x0020 //RX_FDEQ_SUBNUM +196 0x4848 //RX_FDEQ_GAIN_0 +197 0x4040 //RX_FDEQ_GAIN_1 +198 0x3838 //RX_FDEQ_GAIN_2 +199 0x3448 //RX_FDEQ_GAIN_3 +200 0x343C //RX_FDEQ_GAIN_4 +201 0x4040 //RX_FDEQ_GAIN_5 +202 0x4048 //RX_FDEQ_GAIN_6 +203 0x384C //RX_FDEQ_GAIN_7 +204 0x4C54 //RX_FDEQ_GAIN_8 +205 0x5C54 //RX_FDEQ_GAIN_9 +206 0x4E38 //RX_FDEQ_GAIN_10 +207 0x303C //RX_FDEQ_GAIN_11 +208 0x5450 //RX_FDEQ_GAIN_12 +209 0x4860 //RX_FDEQ_GAIN_13 +210 0x6060 //RX_FDEQ_GAIN_14 +211 0x6060 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0202 //RX_FDEQ_BIN_0 +221 0x0203 //RX_FDEQ_BIN_1 +222 0x0303 //RX_FDEQ_BIN_2 +223 0x0402 //RX_FDEQ_BIN_3 +224 0x0504 //RX_FDEQ_BIN_4 +225 0x0209 //RX_FDEQ_BIN_5 +226 0x0808 //RX_FDEQ_BIN_6 +227 0x090A //RX_FDEQ_BIN_7 +228 0x0B0C //RX_FDEQ_BIN_8 +229 0x0D0E //RX_FDEQ_BIN_9 +230 0x1013 //RX_FDEQ_BIN_10 +231 0x1719 //RX_FDEQ_BIN_11 +232 0x1B1E //RX_FDEQ_BIN_12 +233 0x1E1E //RX_FDEQ_BIN_13 +234 0x1E28 //RX_FDEQ_BIN_14 +235 0x282C //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x4000 //RX_FDEQ_RESRV_0 +245 0x0320 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0030 //RX_FDDRC_BAND_MARGIN_1 +248 0x0050 //RX_FDDRC_BAND_MARGIN_2 +249 0x0080 //RX_FDDRC_BAND_MARGIN_3 +250 0x0004 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x2000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x2000 //RX_FDDRC_THRD_3_2 +258 0x5000 //RX_FDDRC_THRD_3_3 +259 0x4000 //RX_FDDRC_SLANT_0_0 +260 0x4000 //RX_FDDRC_SLANT_0_1 +261 0x4000 //RX_FDDRC_SLANT_0_2 +262 0x4000 //RX_FDDRC_SLANT_0_3 +263 0x7FFF //RX_FDDRC_SLANT_1_0 +264 0x7FFF //RX_FDDRC_SLANT_1_1 +265 0x7FFF //RX_FDDRC_SLANT_1_2 +266 0x7FFF //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +286 0x0035 //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 +#VOL 4 +163 0x4000 //RX_TDDRC_ALPHA_UP_1 +164 0x4000 //RX_TDDRC_ALPHA_UP_2 +165 0x4000 //RX_TDDRC_ALPHA_UP_3 +166 0x4000 //RX_TDDRC_ALPHA_UP_4 +184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +185 0x4000 //RX_TDDRC_ALPHA_DWN_2 +186 0x4000 //RX_TDDRC_ALPHA_DWN_3 +189 0x4000 //RX_TDDRC_ALPHA_DWN_4 +190 0x7214 //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +269 0x0001 //RX_TDDRC_THRD_0 +270 0x0002 //RX_TDDRC_THRD_1 +271 0x1800 //RX_TDDRC_THRD_2 +272 0x1800 //RX_TDDRC_THRD_3 +273 0x7FFF //RX_TDDRC_SLANT_0 +274 0x7FFF //RX_TDDRC_SLANT_1 +275 0x4000 //RX_TDDRC_ALPHA_UP_0 +276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x199A //RX_TDDRC_HMNC_GAIN +279 0x0001 //RX_TDDRC_SMT_FLAG +280 0x0CCD //RX_TDDRC_SMT_W +281 0x0439 //RX_TDDRC_DRC_GAIN +195 0x0020 //RX_FDEQ_SUBNUM +196 0x4848 //RX_FDEQ_GAIN_0 +197 0x4040 //RX_FDEQ_GAIN_1 +198 0x3838 //RX_FDEQ_GAIN_2 +199 0x3448 //RX_FDEQ_GAIN_3 +200 0x343C //RX_FDEQ_GAIN_4 +201 0x4040 //RX_FDEQ_GAIN_5 +202 0x4048 //RX_FDEQ_GAIN_6 +203 0x384C //RX_FDEQ_GAIN_7 +204 0x4C54 //RX_FDEQ_GAIN_8 +205 0x5C54 //RX_FDEQ_GAIN_9 +206 0x4E38 //RX_FDEQ_GAIN_10 +207 0x303C //RX_FDEQ_GAIN_11 +208 0x5450 //RX_FDEQ_GAIN_12 +209 0x4860 //RX_FDEQ_GAIN_13 +210 0x6060 //RX_FDEQ_GAIN_14 +211 0x6060 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0202 //RX_FDEQ_BIN_0 +221 0x0203 //RX_FDEQ_BIN_1 +222 0x0303 //RX_FDEQ_BIN_2 +223 0x0402 //RX_FDEQ_BIN_3 +224 0x0504 //RX_FDEQ_BIN_4 +225 0x0209 //RX_FDEQ_BIN_5 +226 0x0808 //RX_FDEQ_BIN_6 +227 0x090A //RX_FDEQ_BIN_7 +228 0x0B0C //RX_FDEQ_BIN_8 +229 0x0D0E //RX_FDEQ_BIN_9 +230 0x1013 //RX_FDEQ_BIN_10 +231 0x1719 //RX_FDEQ_BIN_11 +232 0x1B1E //RX_FDEQ_BIN_12 +233 0x1E1E //RX_FDEQ_BIN_13 +234 0x1E28 //RX_FDEQ_BIN_14 +235 0x282C //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x4000 //RX_FDEQ_RESRV_0 +245 0x0320 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0030 //RX_FDDRC_BAND_MARGIN_1 +248 0x0050 //RX_FDDRC_BAND_MARGIN_2 +249 0x0080 //RX_FDDRC_BAND_MARGIN_3 +250 0x0004 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x2000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x2000 //RX_FDDRC_THRD_3_2 +258 0x5000 //RX_FDDRC_THRD_3_3 +259 0x4000 //RX_FDDRC_SLANT_0_0 +260 0x4000 //RX_FDDRC_SLANT_0_1 +261 0x4000 //RX_FDDRC_SLANT_0_2 +262 0x4000 //RX_FDDRC_SLANT_0_3 +263 0x7FFF //RX_FDDRC_SLANT_1_0 +264 0x7FFF //RX_FDDRC_SLANT_1_1 +265 0x7FFF //RX_FDDRC_SLANT_1_2 +266 0x7FFF //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +286 0x004D //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 +#VOL 5 +163 0x4000 //RX_TDDRC_ALPHA_UP_1 +164 0x4000 //RX_TDDRC_ALPHA_UP_2 +165 0x4000 //RX_TDDRC_ALPHA_UP_3 +166 0x4000 //RX_TDDRC_ALPHA_UP_4 +184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +185 0x4000 //RX_TDDRC_ALPHA_DWN_2 +186 0x4000 //RX_TDDRC_ALPHA_DWN_3 +189 0x4000 //RX_TDDRC_ALPHA_DWN_4 +190 0x7214 //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +269 0x0001 //RX_TDDRC_THRD_0 +270 0x0002 //RX_TDDRC_THRD_1 +271 0x1800 //RX_TDDRC_THRD_2 +272 0x1800 //RX_TDDRC_THRD_3 +273 0x7FFF //RX_TDDRC_SLANT_0 +274 0x7FFF //RX_TDDRC_SLANT_1 +275 0x4000 //RX_TDDRC_ALPHA_UP_0 +276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x199A //RX_TDDRC_HMNC_GAIN +279 0x0001 //RX_TDDRC_SMT_FLAG +280 0x0CCD //RX_TDDRC_SMT_W +281 0x0439 //RX_TDDRC_DRC_GAIN +195 0x0020 //RX_FDEQ_SUBNUM +196 0x4848 //RX_FDEQ_GAIN_0 +197 0x4040 //RX_FDEQ_GAIN_1 +198 0x3838 //RX_FDEQ_GAIN_2 +199 0x3448 //RX_FDEQ_GAIN_3 +200 0x343C //RX_FDEQ_GAIN_4 +201 0x4040 //RX_FDEQ_GAIN_5 +202 0x4048 //RX_FDEQ_GAIN_6 +203 0x384C //RX_FDEQ_GAIN_7 +204 0x4C54 //RX_FDEQ_GAIN_8 +205 0x5C54 //RX_FDEQ_GAIN_9 +206 0x4E38 //RX_FDEQ_GAIN_10 +207 0x303C //RX_FDEQ_GAIN_11 +208 0x5450 //RX_FDEQ_GAIN_12 +209 0x4860 //RX_FDEQ_GAIN_13 +210 0x6060 //RX_FDEQ_GAIN_14 +211 0x6060 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0202 //RX_FDEQ_BIN_0 +221 0x0203 //RX_FDEQ_BIN_1 +222 0x0303 //RX_FDEQ_BIN_2 +223 0x0402 //RX_FDEQ_BIN_3 +224 0x0504 //RX_FDEQ_BIN_4 +225 0x0209 //RX_FDEQ_BIN_5 +226 0x0808 //RX_FDEQ_BIN_6 +227 0x090A //RX_FDEQ_BIN_7 +228 0x0B0C //RX_FDEQ_BIN_8 +229 0x0D0E //RX_FDEQ_BIN_9 +230 0x1013 //RX_FDEQ_BIN_10 +231 0x1719 //RX_FDEQ_BIN_11 +232 0x1B1E //RX_FDEQ_BIN_12 +233 0x1E1E //RX_FDEQ_BIN_13 +234 0x1E28 //RX_FDEQ_BIN_14 +235 0x282C //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x4000 //RX_FDEQ_RESRV_0 +245 0x0320 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0030 //RX_FDDRC_BAND_MARGIN_1 +248 0x0050 //RX_FDDRC_BAND_MARGIN_2 +249 0x0080 //RX_FDDRC_BAND_MARGIN_3 +250 0x0004 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x2000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x2000 //RX_FDDRC_THRD_3_2 +258 0x5000 //RX_FDDRC_THRD_3_3 +259 0x4000 //RX_FDDRC_SLANT_0_0 +260 0x4000 //RX_FDDRC_SLANT_0_1 +261 0x4000 //RX_FDDRC_SLANT_0_2 +262 0x4000 //RX_FDDRC_SLANT_0_3 +263 0x7FFF //RX_FDDRC_SLANT_1_0 +264 0x7FFF //RX_FDDRC_SLANT_1_1 +265 0x7FFF //RX_FDDRC_SLANT_1_2 +266 0x7FFF //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +286 0x0074 //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 +#VOL 6 +163 0x4000 //RX_TDDRC_ALPHA_UP_1 +164 0x4000 //RX_TDDRC_ALPHA_UP_2 +165 0x4000 //RX_TDDRC_ALPHA_UP_3 +166 0x4000 //RX_TDDRC_ALPHA_UP_4 +184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +185 0x4000 //RX_TDDRC_ALPHA_DWN_2 +186 0x4000 //RX_TDDRC_ALPHA_DWN_3 +189 0x4000 //RX_TDDRC_ALPHA_DWN_4 +190 0x7214 //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +269 0x0001 //RX_TDDRC_THRD_0 +270 0x0002 //RX_TDDRC_THRD_1 +271 0x1800 //RX_TDDRC_THRD_2 +272 0x1800 //RX_TDDRC_THRD_3 +273 0x7FFF //RX_TDDRC_SLANT_0 +274 0x7FFF //RX_TDDRC_SLANT_1 +275 0x4000 //RX_TDDRC_ALPHA_UP_0 +276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x199A //RX_TDDRC_HMNC_GAIN +279 0x0001 //RX_TDDRC_SMT_FLAG +280 0x0CCD //RX_TDDRC_SMT_W +281 0x0439 //RX_TDDRC_DRC_GAIN +195 0x0020 //RX_FDEQ_SUBNUM +196 0x4848 //RX_FDEQ_GAIN_0 +197 0x4040 //RX_FDEQ_GAIN_1 +198 0x3838 //RX_FDEQ_GAIN_2 +199 0x3448 //RX_FDEQ_GAIN_3 +200 0x343C //RX_FDEQ_GAIN_4 +201 0x4040 //RX_FDEQ_GAIN_5 +202 0x4048 //RX_FDEQ_GAIN_6 +203 0x384C //RX_FDEQ_GAIN_7 +204 0x4C54 //RX_FDEQ_GAIN_8 +205 0x5C54 //RX_FDEQ_GAIN_9 +206 0x4E38 //RX_FDEQ_GAIN_10 +207 0x303C //RX_FDEQ_GAIN_11 +208 0x5450 //RX_FDEQ_GAIN_12 +209 0x4860 //RX_FDEQ_GAIN_13 +210 0x6060 //RX_FDEQ_GAIN_14 +211 0x6060 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0202 //RX_FDEQ_BIN_0 +221 0x0203 //RX_FDEQ_BIN_1 +222 0x0303 //RX_FDEQ_BIN_2 +223 0x0402 //RX_FDEQ_BIN_3 +224 0x0504 //RX_FDEQ_BIN_4 +225 0x0209 //RX_FDEQ_BIN_5 +226 0x0808 //RX_FDEQ_BIN_6 +227 0x090A //RX_FDEQ_BIN_7 +228 0x0B0C //RX_FDEQ_BIN_8 +229 0x0D0E //RX_FDEQ_BIN_9 +230 0x1013 //RX_FDEQ_BIN_10 +231 0x1719 //RX_FDEQ_BIN_11 +232 0x1B1E //RX_FDEQ_BIN_12 +233 0x1E1E //RX_FDEQ_BIN_13 +234 0x1E28 //RX_FDEQ_BIN_14 +235 0x282C //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x4000 //RX_FDEQ_RESRV_0 +245 0x0320 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0030 //RX_FDDRC_BAND_MARGIN_1 +248 0x0050 //RX_FDDRC_BAND_MARGIN_2 +249 0x0080 //RX_FDDRC_BAND_MARGIN_3 +250 0x0004 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x2000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x2000 //RX_FDDRC_THRD_3_2 +258 0x5000 //RX_FDDRC_THRD_3_3 +259 0x4000 //RX_FDDRC_SLANT_0_0 +260 0x4000 //RX_FDDRC_SLANT_0_1 +261 0x4000 //RX_FDDRC_SLANT_0_2 +262 0x4000 //RX_FDDRC_SLANT_0_3 +263 0x7FFF //RX_FDDRC_SLANT_1_0 +264 0x7FFF //RX_FDDRC_SLANT_1_1 +265 0x7FFF //RX_FDDRC_SLANT_1_2 +266 0x7FFF //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +286 0x0100 //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 #CASE_NAME HEADSET-TTY_VCO-VOICE_GENERIC-NB -#PARAM_MODE FULL -#PARAM_TYPE TX+RX -#TOTAL_CUSTOM_STEP 7 +#PARAM_MODE Full +#PARAM_TYPE TX+2RX +#TOTAL_CUSTOM_STEP 7+7 #TX 0 0x0001 //TX_OPERATION_MODE_0 1 0x0001 //TX_OPERATION_MODE_1 2 0x0033 //TX_PATCH_REG -3 0x2F7C //TX_SENDFUNC_MODE_0 +3 0x6F7C //TX_SENDFUNC_MODE_0 4 0x0001 //TX_SENDFUNC_MODE_1 -5 0x0003 //TX_NUM_MIC +5 0x0002 //TX_NUM_MIC 6 0x0000 //TX_SAMPLINGFREQ_SIG 7 0x0000 //TX_SAMPLINGFREQ_PROC 8 0x000A //TX_FRAME_SZ_SIG @@ -42125,8 +64109,8 @@ 18 0x0000 //TX_SYS_RESRV_2 19 0x0000 //TX_SYS_RESRV_3 20 0x0000 //TX_DIST2REF0 -21 0x00A4 //TX_DIST2REF1 -22 0x0017 //TX_DIST2REF_02 +21 0x009D //TX_DIST2REF1 +22 0x0010 //TX_DIST2REF_02 23 0x0000 //TX_DIST2REF_03 24 0x0000 //TX_DIST2REF_04 25 0x0000 //TX_DIST2REF_05 @@ -42232,7 +64216,7 @@ 125 0x6000 //TX_C_POST_FLT_MIC_MAINBLK 126 0x6000 //TX_C_POST_FLT_MIC_REFBLK 127 0x0010 //TX_MIC_BLOCK_N -128 0x7652 //TX_A_HP +128 0x7646 //TX_A_HP 129 0x4000 //TX_B_PE 130 0x5000 //TX_THR_PITCH_DET_0 131 0x4800 //TX_THR_PITCH_DET_1 @@ -42271,7 +64255,7 @@ 164 0x7FFF //TX_MIN_EQ_RE_EST_12 165 0x2000 //TX_LAMBDA_RE_EST 166 0x0000 //TX_LAMBDA_CB_NLE -167 0x7FFF //TX_C_POST_FLT +167 0x4000 //TX_C_POST_FLT 168 0x2000 //TX_GAIN_NP 169 0x0180 //TX_SE_HOLD_N 170 0x00C8 //TX_DT_HOLD_N @@ -42301,14 +64285,14 @@ 194 0x0000 //TX_NORMENERTH 195 0x0000 //TX_NORMENERHIGHTH 196 0x0000 //TX_NORMENERHIGHTHL -197 0x6590 //TX_DTD_THR1_0 -198 0x6590 //TX_DTD_THR1_1 -199 0x6590 //TX_DTD_THR1_2 +197 0x7FF0 //TX_DTD_THR1_0 +198 0x7FF0 //TX_DTD_THR1_1 +199 0x7FF0 //TX_DTD_THR1_2 200 0x7FF0 //TX_DTD_THR1_3 201 0x7FF0 //TX_DTD_THR1_4 202 0x7FF0 //TX_DTD_THR1_5 203 0x7FF0 //TX_DTD_THR1_6 -204 0x0CCD //TX_DTD_THR2_0 +204 0x7E00 //TX_DTD_THR2_0 205 0x0CCD //TX_DTD_THR2_1 206 0x0CCD //TX_DTD_THR2_2 207 0x0CCD //TX_DTD_THR2_3 @@ -42317,7 +64301,7 @@ 210 0x0CCD //TX_DTD_THR2_6 211 0x7FFF //TX_DTD_THR3 212 0x0000 //TX_SPK_CUT_K -213 0x157C //TX_DT_CUT_K +213 0x1F40 //TX_DT_CUT_K 214 0x0100 //TX_DT_CUT_THR 215 0x04EB //TX_COMFORT_G 216 0x01F4 //TX_POWER_YOUT_TH @@ -42327,18 +64311,18 @@ 220 0x0000 //TX_DTD_MIC_BLK 221 0x1000 //TX_ADPT_STRICT_L 222 0x1000 //TX_ADPT_STRICT_H -223 0x0BB8 //TX_RATIO_DT_L_TH_LOW +223 0x0001 //TX_RATIO_DT_L_TH_LOW 224 0x3A98 //TX_RATIO_DT_H_TH_LOW -225 0x1770 //TX_RATIO_DT_L_TH_HIGH +225 0x0640 //TX_RATIO_DT_L_TH_HIGH 226 0x4E20 //TX_RATIO_DT_H_TH_HIGH -227 0x09C4 //TX_RATIO_DT_L0_TH -228 0x0800 //TX_B_POST_FILT_ECHO_L +227 0x0001 //TX_RATIO_DT_L0_TH +228 0x7FFF //TX_B_POST_FILT_ECHO_L 229 0x2000 //TX_B_POST_FILT_ECHO_H 230 0x0200 //TX_MIN_G_CTRL_ECHO 231 0x1000 //TX_B_LESSCUT_RTO_ECHO 232 0x0000 //TX_EPD_OFFSET_00 233 0x0000 //TX_EPD_OFFST_01 -234 0x1388 //TX_RATIO_DT_L0_TH_HIGH +234 0x05DC //TX_RATIO_DT_L0_TH_HIGH 235 0x3A98 //TX_RATIO_DT_H_TH_CUT 236 0x7FFF //TX_MIN_EQ_RE_EST_13 237 0x0000 //TX_DTD_THR1_7 @@ -42346,7 +64330,7 @@ 239 0x0800 //TX_DT_RESRV_7 240 0x0800 //TX_DT_RESRV_8 241 0x0000 //TX_DT_RESRV_9 -242 0xF800 //TX_THR_SN_EST_0 +242 0xFA00 //TX_THR_SN_EST_0 243 0xFA00 //TX_THR_SN_EST_1 244 0xFA00 //TX_THR_SN_EST_2 245 0xF900 //TX_THR_SN_EST_3 @@ -42355,12 +64339,12 @@ 248 0xF800 //TX_THR_SN_EST_6 249 0xF800 //TX_THR_SN_EST_7 250 0x0050 //TX_DELTA_THR_SN_EST_0 -251 0x01A0 //TX_DELTA_THR_SN_EST_1 +251 0x0200 //TX_DELTA_THR_SN_EST_1 252 0x0200 //TX_DELTA_THR_SN_EST_2 -253 0x0200 //TX_DELTA_THR_SN_EST_3 -254 0x0100 //TX_DELTA_THR_SN_EST_4 +253 0x0100 //TX_DELTA_THR_SN_EST_3 +254 0x0200 //TX_DELTA_THR_SN_EST_4 255 0x0200 //TX_DELTA_THR_SN_EST_5 -256 0x0200 //TX_DELTA_THR_SN_EST_6 +256 0x01A0 //TX_DELTA_THR_SN_EST_6 257 0x0200 //TX_DELTA_THR_SN_EST_7 258 0x4000 //TX_LAMBDA_NN_EST_0 259 0x4000 //TX_LAMBDA_NN_EST_1 @@ -42387,28 +64371,28 @@ 280 0x1000 //TX_B_POST_FLT_1 281 0x0010 //TX_NS_LVL_CTRL_0 282 0x0012 //TX_NS_LVL_CTRL_1 -283 0x0017 //TX_NS_LVL_CTRL_2 -284 0x0015 //TX_NS_LVL_CTRL_3 +283 0x0015 //TX_NS_LVL_CTRL_2 +284 0x0012 //TX_NS_LVL_CTRL_3 285 0x0012 //TX_NS_LVL_CTRL_4 -286 0x0012 //TX_NS_LVL_CTRL_5 -287 0x0011 //TX_NS_LVL_CTRL_6 +286 0x0011 //TX_NS_LVL_CTRL_5 +287 0x0012 //TX_NS_LVL_CTRL_6 288 0x0011 //TX_NS_LVL_CTRL_7 289 0x000F //TX_MIN_GAIN_S_0 -290 0x000F //TX_MIN_GAIN_S_1 -291 0x000D //TX_MIN_GAIN_S_2 +290 0x000D //TX_MIN_GAIN_S_1 +291 0x000F //TX_MIN_GAIN_S_2 292 0x000F //TX_MIN_GAIN_S_3 293 0x000F //TX_MIN_GAIN_S_4 -294 0x000F //TX_MIN_GAIN_S_5 -295 0x0010 //TX_MIN_GAIN_S_6 +294 0x0010 //TX_MIN_GAIN_S_5 +295 0x000F //TX_MIN_GAIN_S_6 296 0x000F //TX_MIN_GAIN_S_7 297 0x4000 //TX_NMOS_SUP 298 0x0000 //TX_NS_MAX_PRI_SNR_TH 299 0x0000 //TX_NMOS_SUP_MENSA 300 0x7FFF //TX_SNRI_SUP_0 -301 0x4000 //TX_SNRI_SUP_1 -302 0x1000 //TX_SNRI_SUP_2 -303 0x4000 //TX_SNRI_SUP_3 -304 0x2400 //TX_SNRI_SUP_4 +301 0x3000 //TX_SNRI_SUP_1 +302 0x4000 //TX_SNRI_SUP_2 +303 0x2400 //TX_SNRI_SUP_3 +304 0x4000 //TX_SNRI_SUP_4 305 0x4000 //TX_SNRI_SUP_5 306 0x4000 //TX_SNRI_SUP_6 307 0x7FFF //TX_SNRI_SUP_7 @@ -42419,19 +64403,19 @@ 312 0x7FFF //TX_A_POST_FILT_0 313 0x2000 //TX_A_POST_FILT_1 314 0x4000 //TX_A_POST_FILT_S_0 -315 0x5000 //TX_A_POST_FILT_S_1 -316 0x2000 //TX_A_POST_FILT_S_2 -317 0x4000 //TX_A_POST_FILT_S_3 -318 0x1000 //TX_A_POST_FILT_S_4 -319 0x3000 //TX_A_POST_FILT_S_5 +315 0x2000 //TX_A_POST_FILT_S_1 +316 0x4000 //TX_A_POST_FILT_S_2 +317 0x1000 //TX_A_POST_FILT_S_3 +318 0x3000 //TX_A_POST_FILT_S_4 +319 0x5000 //TX_A_POST_FILT_S_5 320 0x5000 //TX_A_POST_FILT_S_6 321 0x7000 //TX_A_POST_FILT_S_7 322 0x1000 //TX_B_POST_FILT_0 323 0x1000 //TX_B_POST_FILT_1 324 0x1000 //TX_B_POST_FILT_2 -325 0x1000 //TX_B_POST_FILT_3 -326 0x5000 //TX_B_POST_FILT_4 -327 0x3000 //TX_B_POST_FILT_5 +325 0x5000 //TX_B_POST_FILT_3 +326 0x3000 //TX_B_POST_FILT_4 +327 0x1000 //TX_B_POST_FILT_5 328 0x1000 //TX_B_POST_FILT_6 329 0x2000 //TX_B_POST_FILT_7 330 0x4000 //TX_B_LESSCUT_RTO_S_0 @@ -42444,12 +64428,12 @@ 337 0x7FFF //TX_B_LESSCUT_RTO_S_7 338 0x7E00 //TX_LAMBDA_PFILT 339 0x7D00 //TX_LAMBDA_PFILT_S_0 -340 0x7900 //TX_LAMBDA_PFILT_S_1 -341 0x7400 //TX_LAMBDA_PFILT_S_2 -342 0x7900 //TX_LAMBDA_PFILT_S_3 -343 0x7000 //TX_LAMBDA_PFILT_S_4 +340 0x7C00 //TX_LAMBDA_PFILT_S_1 +341 0x7900 //TX_LAMBDA_PFILT_S_2 +342 0x7000 //TX_LAMBDA_PFILT_S_3 +343 0x7D00 //TX_LAMBDA_PFILT_S_4 344 0x7D00 //TX_LAMBDA_PFILT_S_5 -345 0x7D00 //TX_LAMBDA_PFILT_S_6 +345 0x7900 //TX_LAMBDA_PFILT_S_6 346 0x7D00 //TX_LAMBDA_PFILT_S_7 347 0x0200 //TX_K_PEPPER 348 0x0800 //TX_A_PEPPER @@ -42458,20 +64442,20 @@ 351 0x0001 //TX_HMNC_BST_FLG 352 0x0200 //TX_HMNC_BST_THR 353 0x0800 //TX_DT_BINVAD_TH_0 -354 0x0800 //TX_DT_BINVAD_TH_1 -355 0x0800 //TX_DT_BINVAD_TH_2 +354 0x0100 //TX_DT_BINVAD_TH_1 +355 0x0100 //TX_DT_BINVAD_TH_2 356 0x0800 //TX_DT_BINVAD_TH_3 357 0x0FA0 //TX_DT_BINVAD_ENDF -358 0x0400 //TX_C_POST_FLT_DT +358 0x7000 //TX_C_POST_FLT_DT 359 0x4000 //TX_NS_B_POST_FLT_LESSCUT -360 0x0100 //TX_DT_BOOST +360 0x01B0 //TX_DT_BOOST 361 0x0000 //TX_BF_SGRAD_FLG 362 0x0005 //TX_BF_DVG_TH 363 0x001E //TX_SN_C_F 364 0x0000 //TX_K_APT 365 0x0001 //TX_NOISEDET 366 0x0064 //TX_NDETCT -367 0x0050 //TX_NOISE_TH_0 +367 0x003B //TX_NOISE_TH_0 368 0x7FFF //TX_NOISE_TH_0_2 369 0x7FFF //TX_NOISE_TH_0_3 370 0x07D0 //TX_NOISE_TH_1 @@ -42483,11 +64467,11 @@ 376 0x0000 //TX_NOISE_TH_5_3 377 0x7FFF //TX_NOISE_TH_5_4 378 0x0FA0 //TX_NOISE_TH_6 -379 0x000A //TX_MINENOISE_TH -380 0x4000 //TX_MINENOISE_MIC0_TH_MTS -381 0xFFEE //TX_MINENOISE_MIC0_TH_EXP -382 0x6000 //TX_MINENOISE_MIC0_S_TH_MTS -383 0xFFF3 //TX_MINENOISE_MIC0_S_TH_EXP +379 0x00C8 //TX_MINENOISE_TH +380 0xD508 //TX_MORENS_TFMASK_TH +381 0x0001 //TX_DRC_QUIET_FLOOR +382 0x3A98 //TX_RATIODTL_CUT_TH +383 0x0DAC //TX_DT_CUT_K1 384 0x0666 //TX_OUT_ENER_S_TH_CLEAN 385 0x0666 //TX_OUT_ENER_S_TH_LESSCLEAN 386 0x0333 //TX_OUT_ENER_S_TH_NOISY @@ -42495,22 +64479,22 @@ 388 0x1000 //TX_OUT_ENER_TH_SPEECH 389 0x2000 //TX_SN_NPB_GAIN 390 0x0000 //TX_NN_NPB_GAIN -391 0x0000 //TX_CSX_ALPHA_0 -392 0x0000 //TX_CSX_ALPHA_1 -393 0x0000 //TX_CSX_ALPHA_2 -394 0x0000 //TX_CSX_ALPHA_3 -395 0x0800 //TX_MU_ARSP_EST -396 0x00C8 //TX_P_OUTBEAM_MIN_TH +391 0x7FFF //TX_POST_MASK_SUP_HSNE +392 0x1388 //TX_TAIL_DET_TH +393 0x4000 //TX_B_LESSCUT_RTO_WTA +394 0x0000 //TX_MEL_G_R +395 0x0080 //TX_SUPHIGH_TH +396 0x0000 //TX_MASK_G_R 397 0x0002 //TX_EXTRA_NS_L -398 0x0800 //TX_EXTRA_NS_A -399 0x0005 //TX_VR_NOISE_FLOOR_TH +398 0x1800 //TX_C_POST_FLT_MASK +399 0x7FFF //TX_A_POST_FLT_WNS 400 0x0148 //TX_MIN_G_LOW300HZ -401 0x0001 //TX_MAXLEVEL_CNG +401 0x0004 //TX_MAXLEVEL_CNG 402 0x00B4 //TX_STN_NOISE_TH 403 0x4000 //TX_POST_MASK_SUP 404 0x7FFF //TX_POST_MASK_ADJUST 405 0x00C8 //TX_NS_ENOISE_MIC0_TH -406 0x000A //TX_MINENOISE_MIC0_TH +406 0x0032 //TX_MINENOISE_MIC0_TH 407 0x012C //TX_MINENOISE_MIC0_S_TH 408 0x7FFF //TX_MIN_G_CTRL_SSNS 409 0x0000 //TX_METAL_RTO_THR @@ -42618,16 +64602,16 @@ 511 0x6666 //TX_MIC_TO_BFGAIN 512 0x0000 //TX_MICTOBFGAIN0 513 0x0000 //TX_FASTMUE_TH -514 0x0000 //TX_DERVB_LEN_0 -515 0x0000 //TX_DERVB_LEN_1 -516 0x0000 //TX_RHO_DERVB -517 0x0000 //TX_MIC_INDX_DERVB -518 0x0000 //TX_MU_DERVB -519 0x0000 //TX_DR_RESRV_0 -520 0x0000 //TX_DR_RESRV_1 -521 0x0000 //TX_DR_RESRV_2 -522 0x0000 //TX_DR_RESRV_3 -523 0x0000 //TX_DR_RESRV_4 +514 0xC000 //TX_DEREVERB_LF_MU +515 0xC000 //TX_DEREVERB_HF_MU +516 0xCCCC //TX_DEREVERB_DELAY +517 0xD999 //TX_DEREVERB_COEF_LEN +518 0x1F40 //TX_DEREVERB_DNR +519 0x0000 //TX_DEREVERB_ALPHA +520 0x0000 //TX_DEREVERB_BETA +521 0x0000 //TX_GSC_RTOL_TH +522 0x7000 //TX_GSC_RTOH_TH +523 0x0064 //TX_WIDE2_MEANHTH 524 0x0000 //TX_DR_RESRV_5 525 0x0000 //TX_DR_RESRV_6 526 0x0000 //TX_DR_RESRV_7 @@ -42671,16 +64655,16 @@ 564 0x0000 //TX_PB_RESRV_0 565 0x0000 //TX_PB_RESRV_1 566 0x0014 //TX_FDEQ_SUBNUM -567 0x5858 //TX_FDEQ_GAIN_0 -568 0x5850 //TX_FDEQ_GAIN_1 -569 0x5050 //TX_FDEQ_GAIN_2 -570 0x5048 //TX_FDEQ_GAIN_3 -571 0x3C48 //TX_FDEQ_GAIN_4 -572 0x3C48 //TX_FDEQ_GAIN_5 -573 0x4848 //TX_FDEQ_GAIN_6 -574 0x4842 //TX_FDEQ_GAIN_7 -575 0x3030 //TX_FDEQ_GAIN_8 -576 0x3030 //TX_FDEQ_GAIN_9 +567 0x5050 //TX_FDEQ_GAIN_0 +568 0x5048 //TX_FDEQ_GAIN_1 +569 0x4848 //TX_FDEQ_GAIN_2 +570 0x483C //TX_FDEQ_GAIN_3 +571 0x3034 //TX_FDEQ_GAIN_4 +572 0x3048 //TX_FDEQ_GAIN_5 +573 0x4840 //TX_FDEQ_GAIN_6 +574 0x403C //TX_FDEQ_GAIN_7 +575 0x262C //TX_FDEQ_GAIN_8 +576 0x3A3C //TX_FDEQ_GAIN_9 577 0x4848 //TX_FDEQ_GAIN_10 578 0x4848 //TX_FDEQ_GAIN_11 579 0x4848 //TX_FDEQ_GAIN_12 @@ -42704,7 +64688,7 @@ 597 0x0708 //TX_FDEQ_BIN_6 598 0x090A //TX_FDEQ_BIN_7 599 0x0B0C //TX_FDEQ_BIN_8 -600 0x0D08 //TX_FDEQ_BIN_9 +600 0x0D0E //TX_FDEQ_BIN_9 601 0x0000 //TX_FDEQ_BIN_10 602 0x0000 //TX_FDEQ_BIN_11 603 0x0000 //TX_FDEQ_BIN_12 @@ -42728,9 +64712,9 @@ 621 0x4848 //TX_PREEQ_GAIN_MIC0_4 622 0x4848 //TX_PREEQ_GAIN_MIC0_5 623 0x4848 //TX_PREEQ_GAIN_MIC0_6 -624 0x484A //TX_PREEQ_GAIN_MIC0_7 -625 0x4B4E //TX_PREEQ_GAIN_MIC0_8 -626 0x5054 //TX_PREEQ_GAIN_MIC0_9 +624 0x4848 //TX_PREEQ_GAIN_MIC0_7 +625 0x4A4C //TX_PREEQ_GAIN_MIC0_8 +626 0x4E50 //TX_PREEQ_GAIN_MIC0_9 627 0x4848 //TX_PREEQ_GAIN_MIC0_10 628 0x4848 //TX_PREEQ_GAIN_MIC0_11 629 0x4848 //TX_PREEQ_GAIN_MIC0_12 @@ -42754,7 +64738,7 @@ 647 0x0708 //TX_PREEQ_BIN_MIC0_6 648 0x090A //TX_PREEQ_BIN_MIC0_7 649 0x0B0C //TX_PREEQ_BIN_MIC0_8 -650 0x0D08 //TX_PREEQ_BIN_MIC0_9 +650 0x0D0E //TX_PREEQ_BIN_MIC0_9 651 0x0000 //TX_PREEQ_BIN_MIC0_10 652 0x0000 //TX_PREEQ_BIN_MIC0_11 653 0x0000 //TX_PREEQ_BIN_MIC0_12 @@ -42777,9 +64761,9 @@ 670 0x4848 //TX_PREEQ_GAIN_MIC1_4 671 0x4848 //TX_PREEQ_GAIN_MIC1_5 672 0x4848 //TX_PREEQ_GAIN_MIC1_6 -673 0x4848 //TX_PREEQ_GAIN_MIC1_7 -674 0x4848 //TX_PREEQ_GAIN_MIC1_8 -675 0x4848 //TX_PREEQ_GAIN_MIC1_9 +673 0x4846 //TX_PREEQ_GAIN_MIC1_7 +674 0x4544 //TX_PREEQ_GAIN_MIC1_8 +675 0x4241 //TX_PREEQ_GAIN_MIC1_9 676 0x4848 //TX_PREEQ_GAIN_MIC1_10 677 0x4848 //TX_PREEQ_GAIN_MIC1_11 678 0x4848 //TX_PREEQ_GAIN_MIC1_12 @@ -42794,16 +64778,16 @@ 687 0x4848 //TX_PREEQ_GAIN_MIC1_21 688 0x4848 //TX_PREEQ_GAIN_MIC1_22 689 0x4848 //TX_PREEQ_GAIN_MIC1_23 -690 0x251A //TX_PREEQ_BIN_MIC1_0 -691 0x0F0F //TX_PREEQ_BIN_MIC1_1 -692 0x0C08 //TX_PREEQ_BIN_MIC1_2 -693 0x0700 //TX_PREEQ_BIN_MIC1_3 -694 0x0000 //TX_PREEQ_BIN_MIC1_4 -695 0x0000 //TX_PREEQ_BIN_MIC1_5 -696 0x0000 //TX_PREEQ_BIN_MIC1_6 -697 0x0000 //TX_PREEQ_BIN_MIC1_7 -698 0x0000 //TX_PREEQ_BIN_MIC1_8 -699 0x0000 //TX_PREEQ_BIN_MIC1_9 +690 0x0202 //TX_PREEQ_BIN_MIC1_0 +691 0x0203 //TX_PREEQ_BIN_MIC1_1 +692 0x0303 //TX_PREEQ_BIN_MIC1_2 +693 0x0304 //TX_PREEQ_BIN_MIC1_3 +694 0x0405 //TX_PREEQ_BIN_MIC1_4 +695 0x0506 //TX_PREEQ_BIN_MIC1_5 +696 0x0708 //TX_PREEQ_BIN_MIC1_6 +697 0x090A //TX_PREEQ_BIN_MIC1_7 +698 0x0B0C //TX_PREEQ_BIN_MIC1_8 +699 0x0D0E //TX_PREEQ_BIN_MIC1_9 700 0x0000 //TX_PREEQ_BIN_MIC1_10 701 0x0000 //TX_PREEQ_BIN_MIC1_11 702 0x0000 //TX_PREEQ_BIN_MIC1_12 @@ -42843,7 +64827,7 @@ 736 0x4848 //TX_PREEQ_GAIN_MIC2_21 737 0x4848 //TX_PREEQ_GAIN_MIC2_22 738 0x4848 //TX_PREEQ_GAIN_MIC2_23 -739 0x7800 //TX_PREEQ_BIN_MIC2_0 +739 0x0000 //TX_PREEQ_BIN_MIC2_0 740 0x0000 //TX_PREEQ_BIN_MIC2_1 741 0x0000 //TX_PREEQ_BIN_MIC2_2 742 0x0000 //TX_PREEQ_BIN_MIC2_3 @@ -42895,7 +64879,7 @@ 788 0x7EB8 //TX_TDDRC_ALPHA_DWN_02 789 0x7EB8 //TX_TDDRC_ALPHA_DWN_03 790 0x7EB8 //TX_TDDRC_ALPHA_DWN_04 -791 0x7FFF //TX_TDDRC_TD_DRC_LIMIT +791 0x7214 //TX_TDDRC_TD_DRC_LIMIT 792 0x0800 //TX_TDDRC_POST_LIMIT_GAIN 793 0x0000 //TX_TDDRC_RESRV_0 794 0x0000 //TX_TDDRC_RESRV_1 @@ -42962,15 +64946,15 @@ 855 0x0010 //TX_TDDRC_THRD_1 856 0x1800 //TX_TDDRC_THRD_2 857 0x1800 //TX_TDDRC_THRD_3 -858 0x6000 //TX_TDDRC_SLANT_0 -859 0x6000 //TX_TDDRC_SLANT_1 +858 0x7FFF //TX_TDDRC_SLANT_0 +859 0x7FFF //TX_TDDRC_SLANT_1 860 0x4000 //TX_TDDRC_ALPHA_UP_00 861 0x6000 //TX_TDDRC_ALPHA_DWN_00 862 0x0000 //TX_TDDRC_HMNC_FLAG 863 0x199A //TX_TDDRC_HMNC_GAIN 864 0x0000 //TX_TDDRC_SMT_FLAG 865 0x0CCD //TX_TDDRC_SMT_W -866 0x0BE3 //TX_TDDRC_DRC_GAIN +866 0x0A00 //TX_TDDRC_DRC_GAIN 867 0x7FFF //TX_TDDRC_LMT_THRD 868 0x0000 //TX_TDDRC_LMT_ALPHA 869 0x0000 //TX_TFMASKLTH @@ -42995,14 +64979,79 @@ 888 0x0028 //TX_FASTNS_ARSPC_TH 889 0xC000 //TX_FASTNS_MASK5_TH 890 0x4848 //TX_POSTSSA_MIN_G_VR_MASK -891 0x7FFF //TX_A_LESSCUT_RTO_MASK +891 0x4000 //TX_A_LESSCUT_RTO_MASK 892 0x1770 //TX_FASTNS_NOISETH 893 0xC000 //TX_FASTNS_SSA_THLFL 894 0xC000 //TX_FASTNS_SSA_THHFL 895 0xCCCC //TX_FASTNS_SSA_THLFH 896 0xD999 //TX_FASTNS_SSA_THHFH +897 0x2339 //TX_SENDFUNC_REG_MICMUTE +898 0x0021 //TX_SENDFUNC_REG_MICMUTE1 +899 0x02BC //TX_MICMUTE_RATIO_THR +900 0x0140 //TX_MICMUTE_AMP_THR +901 0x0004 //TX_MICMUTE_HPF_IND +902 0x00C0 //TX_MICMUTE_LOG_EYR_TH +903 0x0008 //TX_MICMUTE_CVG_TIME +904 0x0008 //TX_MICMUTE_RELEASE_TIME +905 0x01FE //TX_MIC_VOLUME_MIC0MUTE +906 0x0020 //TX_MICMUTE_EPD_OFFSET_0 +907 0x001E //TX_MICMUTE_FRQ_AEC_L +908 0x7999 //TX_MICMUTE_EAD_THR +909 0x7FFF //TX_MICMUTE_LAMBDA_CB_NLE +910 0x7FFF //TX_MICMUTE_LAMBDA_RE_EST +911 0x4000 //TX_DTD_THR1_MICMUTE_0 +912 0x7000 //TX_DTD_THR1_MICMUTE_1 +913 0x7FFF //TX_DTD_THR1_MICMUTE_2 +914 0x7FFF //TX_DTD_THR1_MICMUTE_3 +915 0x6CCC //TX_DTD_THR2_MICMUTE_0 +916 0x0400 //TX_MICMUTE_MIN_EQ_RE_EST_0 +917 0x0400 //TX_MICMUTE_MIN_EQ_RE_EST_1 +918 0x1000 //TX_MICMUTE_MIN_EQ_RE_EST_2 +919 0x7FFF //TX_MICMUTE_MIN_EQ_RE_EST_3 +920 0x7FFF //TX_MICMUTE_MIN_EQ_RE_EST_4 +921 0x4000 //TX_MICMUTE_C_POST_FLT +922 0x03E8 //TX_MICMUTE_DT_CUT_K +923 0x0001 //TX_MICMUTE_DT_CUT_THR +924 0x03E8 //TX_MICMUTE_DT_CUT_K2 +925 0x0001 //TX_MICMUTE_DT_CUT_THR2 +926 0x0064 //TX_MICMUTE_DT2_HOLD_N +927 0x1000 //TX_MICMUTE_RATIODTH_THCUT +928 0x1000 //TX_MICMUTE_B_POST_FLT_ECHOL +929 0x7FFF //TX_MICMUTE_B_POST_FLT_ECHOH +930 0x0400 //TX_MICMUTE_C_POST_FLT_MASK +931 0x7999 //TX_MICMUTE_RATIODTL_CUT_TH +932 0x0258 //TX_MICMUTE_DT_CUT_K1 +933 0x0800 //TX_MICMUTE_N2_SN_EST +934 0xFC00 //TX_MICMUTE_THR_SN_EST_0 +935 0x001C //TX_MICMUTE_MIN_G_CTRL_0 +936 0x6000 //TX_MICMUTE_A_POST_FILT_S_0 +937 0x7000 //TX_MICMUTE_B_POST_FILT_0 +938 0x2710 //TX_MIC1RUB_AMP_THR +939 0x0010 //TX_MIC1MUTE_RATIO_THR +940 0x0450 //TX_MIC1MUTE_AMP_THR +941 0x0008 //TX_MIC1MUTE_CVG_TIME +942 0x0008 //TX_MIC1MUTE_RELEASE_TIME +943 0x0000 //TX_AMS_RESRV_01 +944 0x0000 //TX_AMS_RESRV_02 +945 0x0000 //TX_AMS_RESRV_03 +946 0x0000 //TX_AMS_RESRV_04 +947 0x0000 //TX_AMS_RESRV_05 +948 0x0000 //TX_AMS_RESRV_06 +949 0x0000 //TX_AMS_RESRV_07 +950 0x0000 //TX_AMS_RESRV_08 +951 0x0000 //TX_AMS_RESRV_09 +952 0x0000 //TX_AMS_RESRV_10 +953 0x0000 //TX_AMS_RESRV_11 +954 0x0000 //TX_AMS_RESRV_12 +955 0x0000 //TX_AMS_RESRV_13 +956 0x0000 //TX_AMS_RESRV_14 +957 0x0000 //TX_AMS_RESRV_15 +958 0x0000 //TX_AMS_RESRV_16 +959 0x0000 //TX_AMS_RESRV_17 +960 0x0000 //TX_AMS_RESRV_18 +961 0x0000 //TX_AMS_RESRV_19 #RX -0 0x0040 //RX_RECVFUNC_MODE_0 +0 0x2040 //RX_RECVFUNC_MODE_0 1 0x0000 //RX_RECVFUNC_MODE_1 2 0x0000 //RX_SAMPLINGFREQ_SIG 3 0x0000 //RX_SAMPLINGFREQ_PROC @@ -43852,18 +65901,869 @@ 110 0x0000 //RX_FDDRC_RESRV_0 129 0x0100 //RX_SPK_VOL 130 0x0000 //RX_VOL_RESRV_0 +#RX 2 +157 0x2040 //RX_RECVFUNC_MODE_0 +158 0x0000 //RX_RECVFUNC_MODE_1 +159 0x0000 //RX_SAMPLINGFREQ_SIG +160 0x0000 //RX_SAMPLINGFREQ_PROC +161 0x000A //RX_FRAME_SZ +162 0x0000 //RX_DELAY_OPT +163 0x3000 //RX_TDDRC_ALPHA_UP_1 +164 0x3000 //RX_TDDRC_ALPHA_UP_2 +165 0x3000 //RX_TDDRC_ALPHA_UP_3 +166 0x3000 //RX_TDDRC_ALPHA_UP_4 +167 0x050D //RX_PGA +168 0x7652 //RX_A_HP +169 0x4000 //RX_B_PE +170 0x7800 //RX_THR_PITCH_DET_0 +171 0x7000 //RX_THR_PITCH_DET_1 +172 0x6000 //RX_THR_PITCH_DET_2 +173 0x0000 //RX_PITCH_BFR_LEN +174 0x0000 //RX_SBD_PITCH_DET +175 0x0000 //RX_PP_RESRV_0 +176 0x0000 //RX_PP_RESRV_1 +177 0xF800 //RX_N_SN_EST +178 0x0000 //RX_N2_SN_EST +179 0x000F //RX_NS_LVL_CTRL +180 0xF800 //RX_THR_SN_EST +181 0x7E00 //RX_LAMBDA_PFILT +182 0x000A //RX_FENS_RESRV_0 +183 0x0000 //RX_FENS_RESRV_1 +184 0x7FB0 //RX_TDDRC_ALPHA_DWN_1 +185 0x7FB0 //RX_TDDRC_ALPHA_DWN_2 +186 0x7FB0 //RX_TDDRC_ALPHA_DWN_3 +187 0x0000 //RX_EXTRA_NS_L +188 0x0000 //RX_EXTRA_NS_A +189 0x7FB0 //RX_TDDRC_ALPHA_DWN_4 +190 0xDA9E //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +192 0x0000 //RX_A_POST_FLT +193 0x0000 //RX_LMT_THRD +194 0x4000 //RX_LMT_ALPHA +195 0x0020 //RX_FDEQ_SUBNUM +196 0x4848 //RX_FDEQ_GAIN_0 +197 0x4848 //RX_FDEQ_GAIN_1 +198 0x4848 //RX_FDEQ_GAIN_2 +199 0x4848 //RX_FDEQ_GAIN_3 +200 0x4848 //RX_FDEQ_GAIN_4 +201 0x4848 //RX_FDEQ_GAIN_5 +202 0x4848 //RX_FDEQ_GAIN_6 +203 0x4848 //RX_FDEQ_GAIN_7 +204 0x4848 //RX_FDEQ_GAIN_8 +205 0x4848 //RX_FDEQ_GAIN_9 +206 0x4848 //RX_FDEQ_GAIN_10 +207 0x4848 //RX_FDEQ_GAIN_11 +208 0x4848 //RX_FDEQ_GAIN_12 +209 0x4848 //RX_FDEQ_GAIN_13 +210 0x4848 //RX_FDEQ_GAIN_14 +211 0x4848 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0000 //RX_FDEQ_BIN_0 +221 0x0000 //RX_FDEQ_BIN_1 +222 0x0000 //RX_FDEQ_BIN_2 +223 0x0000 //RX_FDEQ_BIN_3 +224 0x0000 //RX_FDEQ_BIN_4 +225 0x0000 //RX_FDEQ_BIN_5 +226 0x0000 //RX_FDEQ_BIN_6 +227 0x0000 //RX_FDEQ_BIN_7 +228 0x0000 //RX_FDEQ_BIN_8 +229 0x0000 //RX_FDEQ_BIN_9 +230 0x0000 //RX_FDEQ_BIN_10 +231 0x0000 //RX_FDEQ_BIN_11 +232 0x0000 //RX_FDEQ_BIN_12 +233 0x0000 //RX_FDEQ_BIN_13 +234 0x0000 //RX_FDEQ_BIN_14 +235 0x0000 //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x0000 //RX_FDEQ_RESRV_0 +245 0x0000 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0030 //RX_FDDRC_BAND_MARGIN_1 +248 0x0050 //RX_FDDRC_BAND_MARGIN_2 +249 0x0080 //RX_FDDRC_BAND_MARGIN_3 +250 0x0004 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x5000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x6400 //RX_FDDRC_THRD_3_2 +258 0x6400 //RX_FDDRC_THRD_3_3 +259 0x2000 //RX_FDDRC_SLANT_0_0 +260 0x2000 //RX_FDDRC_SLANT_0_1 +261 0x2000 //RX_FDDRC_SLANT_0_2 +262 0x2000 //RX_FDDRC_SLANT_0_3 +263 0x2000 //RX_FDDRC_SLANT_1_0 +264 0x2000 //RX_FDDRC_SLANT_1_1 +265 0x2000 //RX_FDDRC_SLANT_1_2 +266 0x2000 //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +268 0x0003 //RX_FILTINDX +269 0x0000 //RX_TDDRC_THRD_0 +270 0x0000 //RX_TDDRC_THRD_1 +271 0x0E80 //RX_TDDRC_THRD_2 +272 0x3800 //RX_TDDRC_THRD_3 +273 0x2A00 //RX_TDDRC_SLANT_0 +274 0x6E00 //RX_TDDRC_SLANT_1 +275 0x3000 //RX_TDDRC_ALPHA_UP_0 +276 0x7FB0 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x0000 //RX_TDDRC_HMNC_GAIN +279 0x0000 //RX_TDDRC_SMT_FLAG +280 0x0000 //RX_TDDRC_SMT_W +281 0x0100 //RX_TDDRC_DRC_GAIN +282 0x7C00 //RX_LAMBDA_PKA_FP +283 0x2000 //RX_TPKA_FP +284 0x0080 //RX_MIN_G_FP +285 0x2000 //RX_MAX_G_FP +286 0x0100 //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 +288 0x0010 //RX_MAXLEVEL_CNG +289 0x0000 //RX_BWE_UV_TH +290 0x0000 //RX_BWE_UV_TH2 +291 0x0000 //RX_BWE_UV_TH3 +292 0x0000 //RX_BWE_V_TH +293 0x0000 //RX_BWE_GAIN1_V_TH1 +294 0x0000 //RX_BWE_GAIN1_V_TH2 +295 0x0000 //RX_BWE_UV_EQ +296 0x0000 //RX_BWE_V_EQ +297 0x0000 //RX_BWE_TONE_TH +298 0x0000 //RX_BWE_UV_HOLD_T +299 0x0000 //RX_BWE_GAIN2_ALPHA +300 0x0000 //RX_BWE_GAIN3_ALPHA +301 0x0000 //RX_BWE_CUTOFF +302 0x0000 //RX_BWE_GAINFILL +303 0x0000 //RX_BWE_MAXTH_TONE +304 0x0000 //RX_BWE_EQ_0 +305 0x0000 //RX_BWE_EQ_1 +306 0x0000 //RX_BWE_EQ_2 +307 0x0000 //RX_BWE_EQ_3 +308 0x0000 //RX_BWE_EQ_4 +309 0x0000 //RX_BWE_EQ_5 +310 0x0000 //RX_BWE_EQ_6 +311 0x0000 //RX_BWE_RESRV_0 +312 0x0000 //RX_BWE_RESRV_1 +313 0x0000 //RX_BWE_RESRV_2 +#VOL 0 +163 0x3000 //RX_TDDRC_ALPHA_UP_1 +164 0x3000 //RX_TDDRC_ALPHA_UP_2 +165 0x3000 //RX_TDDRC_ALPHA_UP_3 +166 0x3000 //RX_TDDRC_ALPHA_UP_4 +184 0x7FB0 //RX_TDDRC_ALPHA_DWN_1 +185 0x7FB0 //RX_TDDRC_ALPHA_DWN_2 +186 0x7FB0 //RX_TDDRC_ALPHA_DWN_3 +189 0x7FB0 //RX_TDDRC_ALPHA_DWN_4 +190 0xDA9E //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +269 0x0000 //RX_TDDRC_THRD_0 +270 0x0000 //RX_TDDRC_THRD_1 +271 0x0E80 //RX_TDDRC_THRD_2 +272 0x3800 //RX_TDDRC_THRD_3 +273 0x2A00 //RX_TDDRC_SLANT_0 +274 0x6E00 //RX_TDDRC_SLANT_1 +275 0x3000 //RX_TDDRC_ALPHA_UP_0 +276 0x7FB0 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x0000 //RX_TDDRC_HMNC_GAIN +279 0x0000 //RX_TDDRC_SMT_FLAG +280 0x0000 //RX_TDDRC_SMT_W +281 0x0100 //RX_TDDRC_DRC_GAIN +195 0x0020 //RX_FDEQ_SUBNUM +196 0x4848 //RX_FDEQ_GAIN_0 +197 0x4848 //RX_FDEQ_GAIN_1 +198 0x4848 //RX_FDEQ_GAIN_2 +199 0x4848 //RX_FDEQ_GAIN_3 +200 0x4848 //RX_FDEQ_GAIN_4 +201 0x4848 //RX_FDEQ_GAIN_5 +202 0x4848 //RX_FDEQ_GAIN_6 +203 0x4848 //RX_FDEQ_GAIN_7 +204 0x4848 //RX_FDEQ_GAIN_8 +205 0x4848 //RX_FDEQ_GAIN_9 +206 0x4848 //RX_FDEQ_GAIN_10 +207 0x4848 //RX_FDEQ_GAIN_11 +208 0x4848 //RX_FDEQ_GAIN_12 +209 0x4848 //RX_FDEQ_GAIN_13 +210 0x4848 //RX_FDEQ_GAIN_14 +211 0x4848 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0000 //RX_FDEQ_BIN_0 +221 0x0000 //RX_FDEQ_BIN_1 +222 0x0000 //RX_FDEQ_BIN_2 +223 0x0000 //RX_FDEQ_BIN_3 +224 0x0000 //RX_FDEQ_BIN_4 +225 0x0000 //RX_FDEQ_BIN_5 +226 0x0000 //RX_FDEQ_BIN_6 +227 0x0000 //RX_FDEQ_BIN_7 +228 0x0000 //RX_FDEQ_BIN_8 +229 0x0000 //RX_FDEQ_BIN_9 +230 0x0000 //RX_FDEQ_BIN_10 +231 0x0000 //RX_FDEQ_BIN_11 +232 0x0000 //RX_FDEQ_BIN_12 +233 0x0000 //RX_FDEQ_BIN_13 +234 0x0000 //RX_FDEQ_BIN_14 +235 0x0000 //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x0000 //RX_FDEQ_RESRV_0 +245 0x0000 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0030 //RX_FDDRC_BAND_MARGIN_1 +248 0x0050 //RX_FDDRC_BAND_MARGIN_2 +249 0x0080 //RX_FDDRC_BAND_MARGIN_3 +250 0x0004 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x5000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x6400 //RX_FDDRC_THRD_3_2 +258 0x6400 //RX_FDDRC_THRD_3_3 +259 0x2000 //RX_FDDRC_SLANT_0_0 +260 0x2000 //RX_FDDRC_SLANT_0_1 +261 0x2000 //RX_FDDRC_SLANT_0_2 +262 0x2000 //RX_FDDRC_SLANT_0_3 +263 0x2000 //RX_FDDRC_SLANT_1_0 +264 0x2000 //RX_FDDRC_SLANT_1_1 +265 0x2000 //RX_FDDRC_SLANT_1_2 +266 0x2000 //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +286 0x0100 //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 +#VOL 1 +163 0x3000 //RX_TDDRC_ALPHA_UP_1 +164 0x3000 //RX_TDDRC_ALPHA_UP_2 +165 0x3000 //RX_TDDRC_ALPHA_UP_3 +166 0x3000 //RX_TDDRC_ALPHA_UP_4 +184 0x7FB0 //RX_TDDRC_ALPHA_DWN_1 +185 0x7FB0 //RX_TDDRC_ALPHA_DWN_2 +186 0x7FB0 //RX_TDDRC_ALPHA_DWN_3 +189 0x7FB0 //RX_TDDRC_ALPHA_DWN_4 +190 0xDA9E //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +269 0x0000 //RX_TDDRC_THRD_0 +270 0x0000 //RX_TDDRC_THRD_1 +271 0x0E80 //RX_TDDRC_THRD_2 +272 0x3800 //RX_TDDRC_THRD_3 +273 0x2A00 //RX_TDDRC_SLANT_0 +274 0x6E00 //RX_TDDRC_SLANT_1 +275 0x3000 //RX_TDDRC_ALPHA_UP_0 +276 0x7FB0 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x0000 //RX_TDDRC_HMNC_GAIN +279 0x0000 //RX_TDDRC_SMT_FLAG +280 0x0000 //RX_TDDRC_SMT_W +281 0x0100 //RX_TDDRC_DRC_GAIN +195 0x0020 //RX_FDEQ_SUBNUM +196 0x4848 //RX_FDEQ_GAIN_0 +197 0x4848 //RX_FDEQ_GAIN_1 +198 0x4848 //RX_FDEQ_GAIN_2 +199 0x4848 //RX_FDEQ_GAIN_3 +200 0x4848 //RX_FDEQ_GAIN_4 +201 0x4848 //RX_FDEQ_GAIN_5 +202 0x4848 //RX_FDEQ_GAIN_6 +203 0x4848 //RX_FDEQ_GAIN_7 +204 0x4848 //RX_FDEQ_GAIN_8 +205 0x4848 //RX_FDEQ_GAIN_9 +206 0x4848 //RX_FDEQ_GAIN_10 +207 0x4848 //RX_FDEQ_GAIN_11 +208 0x4848 //RX_FDEQ_GAIN_12 +209 0x4848 //RX_FDEQ_GAIN_13 +210 0x4848 //RX_FDEQ_GAIN_14 +211 0x4848 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0000 //RX_FDEQ_BIN_0 +221 0x0000 //RX_FDEQ_BIN_1 +222 0x0000 //RX_FDEQ_BIN_2 +223 0x0000 //RX_FDEQ_BIN_3 +224 0x0000 //RX_FDEQ_BIN_4 +225 0x0000 //RX_FDEQ_BIN_5 +226 0x0000 //RX_FDEQ_BIN_6 +227 0x0000 //RX_FDEQ_BIN_7 +228 0x0000 //RX_FDEQ_BIN_8 +229 0x0000 //RX_FDEQ_BIN_9 +230 0x0000 //RX_FDEQ_BIN_10 +231 0x0000 //RX_FDEQ_BIN_11 +232 0x0000 //RX_FDEQ_BIN_12 +233 0x0000 //RX_FDEQ_BIN_13 +234 0x0000 //RX_FDEQ_BIN_14 +235 0x0000 //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x0000 //RX_FDEQ_RESRV_0 +245 0x0000 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0030 //RX_FDDRC_BAND_MARGIN_1 +248 0x0050 //RX_FDDRC_BAND_MARGIN_2 +249 0x0080 //RX_FDDRC_BAND_MARGIN_3 +250 0x0004 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x5000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x6400 //RX_FDDRC_THRD_3_2 +258 0x6400 //RX_FDDRC_THRD_3_3 +259 0x2000 //RX_FDDRC_SLANT_0_0 +260 0x2000 //RX_FDDRC_SLANT_0_1 +261 0x2000 //RX_FDDRC_SLANT_0_2 +262 0x2000 //RX_FDDRC_SLANT_0_3 +263 0x2000 //RX_FDDRC_SLANT_1_0 +264 0x2000 //RX_FDDRC_SLANT_1_1 +265 0x2000 //RX_FDDRC_SLANT_1_2 +266 0x2000 //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +286 0x0100 //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 +#VOL 2 +163 0x3000 //RX_TDDRC_ALPHA_UP_1 +164 0x3000 //RX_TDDRC_ALPHA_UP_2 +165 0x3000 //RX_TDDRC_ALPHA_UP_3 +166 0x3000 //RX_TDDRC_ALPHA_UP_4 +184 0x7FB0 //RX_TDDRC_ALPHA_DWN_1 +185 0x7FB0 //RX_TDDRC_ALPHA_DWN_2 +186 0x7FB0 //RX_TDDRC_ALPHA_DWN_3 +189 0x7FB0 //RX_TDDRC_ALPHA_DWN_4 +190 0xDA9E //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +269 0x0000 //RX_TDDRC_THRD_0 +270 0x0000 //RX_TDDRC_THRD_1 +271 0x0E80 //RX_TDDRC_THRD_2 +272 0x3800 //RX_TDDRC_THRD_3 +273 0x2A00 //RX_TDDRC_SLANT_0 +274 0x6E00 //RX_TDDRC_SLANT_1 +275 0x3000 //RX_TDDRC_ALPHA_UP_0 +276 0x7FB0 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x0000 //RX_TDDRC_HMNC_GAIN +279 0x0000 //RX_TDDRC_SMT_FLAG +280 0x0000 //RX_TDDRC_SMT_W +281 0x0100 //RX_TDDRC_DRC_GAIN +195 0x0020 //RX_FDEQ_SUBNUM +196 0x4848 //RX_FDEQ_GAIN_0 +197 0x4848 //RX_FDEQ_GAIN_1 +198 0x4848 //RX_FDEQ_GAIN_2 +199 0x4848 //RX_FDEQ_GAIN_3 +200 0x4848 //RX_FDEQ_GAIN_4 +201 0x4848 //RX_FDEQ_GAIN_5 +202 0x4848 //RX_FDEQ_GAIN_6 +203 0x4848 //RX_FDEQ_GAIN_7 +204 0x4848 //RX_FDEQ_GAIN_8 +205 0x4848 //RX_FDEQ_GAIN_9 +206 0x4848 //RX_FDEQ_GAIN_10 +207 0x4848 //RX_FDEQ_GAIN_11 +208 0x4848 //RX_FDEQ_GAIN_12 +209 0x4848 //RX_FDEQ_GAIN_13 +210 0x4848 //RX_FDEQ_GAIN_14 +211 0x4848 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0000 //RX_FDEQ_BIN_0 +221 0x0000 //RX_FDEQ_BIN_1 +222 0x0000 //RX_FDEQ_BIN_2 +223 0x0000 //RX_FDEQ_BIN_3 +224 0x0000 //RX_FDEQ_BIN_4 +225 0x0000 //RX_FDEQ_BIN_5 +226 0x0000 //RX_FDEQ_BIN_6 +227 0x0000 //RX_FDEQ_BIN_7 +228 0x0000 //RX_FDEQ_BIN_8 +229 0x0000 //RX_FDEQ_BIN_9 +230 0x0000 //RX_FDEQ_BIN_10 +231 0x0000 //RX_FDEQ_BIN_11 +232 0x0000 //RX_FDEQ_BIN_12 +233 0x0000 //RX_FDEQ_BIN_13 +234 0x0000 //RX_FDEQ_BIN_14 +235 0x0000 //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x0000 //RX_FDEQ_RESRV_0 +245 0x0000 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0030 //RX_FDDRC_BAND_MARGIN_1 +248 0x0050 //RX_FDDRC_BAND_MARGIN_2 +249 0x0080 //RX_FDDRC_BAND_MARGIN_3 +250 0x0004 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x5000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x6400 //RX_FDDRC_THRD_3_2 +258 0x6400 //RX_FDDRC_THRD_3_3 +259 0x2000 //RX_FDDRC_SLANT_0_0 +260 0x2000 //RX_FDDRC_SLANT_0_1 +261 0x2000 //RX_FDDRC_SLANT_0_2 +262 0x2000 //RX_FDDRC_SLANT_0_3 +263 0x2000 //RX_FDDRC_SLANT_1_0 +264 0x2000 //RX_FDDRC_SLANT_1_1 +265 0x2000 //RX_FDDRC_SLANT_1_2 +266 0x2000 //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +286 0x0100 //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 +#VOL 3 +163 0x3000 //RX_TDDRC_ALPHA_UP_1 +164 0x3000 //RX_TDDRC_ALPHA_UP_2 +165 0x3000 //RX_TDDRC_ALPHA_UP_3 +166 0x3000 //RX_TDDRC_ALPHA_UP_4 +184 0x7FB0 //RX_TDDRC_ALPHA_DWN_1 +185 0x7FB0 //RX_TDDRC_ALPHA_DWN_2 +186 0x7FB0 //RX_TDDRC_ALPHA_DWN_3 +189 0x7FB0 //RX_TDDRC_ALPHA_DWN_4 +190 0xDA9E //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +269 0x0000 //RX_TDDRC_THRD_0 +270 0x0000 //RX_TDDRC_THRD_1 +271 0x0E80 //RX_TDDRC_THRD_2 +272 0x3800 //RX_TDDRC_THRD_3 +273 0x2A00 //RX_TDDRC_SLANT_0 +274 0x6E00 //RX_TDDRC_SLANT_1 +275 0x3000 //RX_TDDRC_ALPHA_UP_0 +276 0x7FB0 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x0000 //RX_TDDRC_HMNC_GAIN +279 0x0000 //RX_TDDRC_SMT_FLAG +280 0x0000 //RX_TDDRC_SMT_W +281 0x0100 //RX_TDDRC_DRC_GAIN +195 0x0020 //RX_FDEQ_SUBNUM +196 0x4848 //RX_FDEQ_GAIN_0 +197 0x4848 //RX_FDEQ_GAIN_1 +198 0x4848 //RX_FDEQ_GAIN_2 +199 0x4848 //RX_FDEQ_GAIN_3 +200 0x4848 //RX_FDEQ_GAIN_4 +201 0x4848 //RX_FDEQ_GAIN_5 +202 0x4848 //RX_FDEQ_GAIN_6 +203 0x4848 //RX_FDEQ_GAIN_7 +204 0x4848 //RX_FDEQ_GAIN_8 +205 0x4848 //RX_FDEQ_GAIN_9 +206 0x4848 //RX_FDEQ_GAIN_10 +207 0x4848 //RX_FDEQ_GAIN_11 +208 0x4848 //RX_FDEQ_GAIN_12 +209 0x4848 //RX_FDEQ_GAIN_13 +210 0x4848 //RX_FDEQ_GAIN_14 +211 0x4848 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0000 //RX_FDEQ_BIN_0 +221 0x0000 //RX_FDEQ_BIN_1 +222 0x0000 //RX_FDEQ_BIN_2 +223 0x0000 //RX_FDEQ_BIN_3 +224 0x0000 //RX_FDEQ_BIN_4 +225 0x0000 //RX_FDEQ_BIN_5 +226 0x0000 //RX_FDEQ_BIN_6 +227 0x0000 //RX_FDEQ_BIN_7 +228 0x0000 //RX_FDEQ_BIN_8 +229 0x0000 //RX_FDEQ_BIN_9 +230 0x0000 //RX_FDEQ_BIN_10 +231 0x0000 //RX_FDEQ_BIN_11 +232 0x0000 //RX_FDEQ_BIN_12 +233 0x0000 //RX_FDEQ_BIN_13 +234 0x0000 //RX_FDEQ_BIN_14 +235 0x0000 //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x0000 //RX_FDEQ_RESRV_0 +245 0x0000 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0030 //RX_FDDRC_BAND_MARGIN_1 +248 0x0050 //RX_FDDRC_BAND_MARGIN_2 +249 0x0080 //RX_FDDRC_BAND_MARGIN_3 +250 0x0004 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x5000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x6400 //RX_FDDRC_THRD_3_2 +258 0x6400 //RX_FDDRC_THRD_3_3 +259 0x2000 //RX_FDDRC_SLANT_0_0 +260 0x2000 //RX_FDDRC_SLANT_0_1 +261 0x2000 //RX_FDDRC_SLANT_0_2 +262 0x2000 //RX_FDDRC_SLANT_0_3 +263 0x2000 //RX_FDDRC_SLANT_1_0 +264 0x2000 //RX_FDDRC_SLANT_1_1 +265 0x2000 //RX_FDDRC_SLANT_1_2 +266 0x2000 //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +286 0x0100 //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 +#VOL 4 +163 0x3000 //RX_TDDRC_ALPHA_UP_1 +164 0x3000 //RX_TDDRC_ALPHA_UP_2 +165 0x3000 //RX_TDDRC_ALPHA_UP_3 +166 0x3000 //RX_TDDRC_ALPHA_UP_4 +184 0x7FB0 //RX_TDDRC_ALPHA_DWN_1 +185 0x7FB0 //RX_TDDRC_ALPHA_DWN_2 +186 0x7FB0 //RX_TDDRC_ALPHA_DWN_3 +189 0x7FB0 //RX_TDDRC_ALPHA_DWN_4 +190 0xDA9E //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +269 0x0000 //RX_TDDRC_THRD_0 +270 0x0000 //RX_TDDRC_THRD_1 +271 0x0E80 //RX_TDDRC_THRD_2 +272 0x3800 //RX_TDDRC_THRD_3 +273 0x2A00 //RX_TDDRC_SLANT_0 +274 0x6E00 //RX_TDDRC_SLANT_1 +275 0x3000 //RX_TDDRC_ALPHA_UP_0 +276 0x7FB0 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x0000 //RX_TDDRC_HMNC_GAIN +279 0x0000 //RX_TDDRC_SMT_FLAG +280 0x0000 //RX_TDDRC_SMT_W +281 0x0100 //RX_TDDRC_DRC_GAIN +195 0x0020 //RX_FDEQ_SUBNUM +196 0x4848 //RX_FDEQ_GAIN_0 +197 0x4848 //RX_FDEQ_GAIN_1 +198 0x4848 //RX_FDEQ_GAIN_2 +199 0x4848 //RX_FDEQ_GAIN_3 +200 0x4848 //RX_FDEQ_GAIN_4 +201 0x4848 //RX_FDEQ_GAIN_5 +202 0x4848 //RX_FDEQ_GAIN_6 +203 0x4848 //RX_FDEQ_GAIN_7 +204 0x4848 //RX_FDEQ_GAIN_8 +205 0x4848 //RX_FDEQ_GAIN_9 +206 0x4848 //RX_FDEQ_GAIN_10 +207 0x4848 //RX_FDEQ_GAIN_11 +208 0x4848 //RX_FDEQ_GAIN_12 +209 0x4848 //RX_FDEQ_GAIN_13 +210 0x4848 //RX_FDEQ_GAIN_14 +211 0x4848 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0000 //RX_FDEQ_BIN_0 +221 0x0000 //RX_FDEQ_BIN_1 +222 0x0000 //RX_FDEQ_BIN_2 +223 0x0000 //RX_FDEQ_BIN_3 +224 0x0000 //RX_FDEQ_BIN_4 +225 0x0000 //RX_FDEQ_BIN_5 +226 0x0000 //RX_FDEQ_BIN_6 +227 0x0000 //RX_FDEQ_BIN_7 +228 0x0000 //RX_FDEQ_BIN_8 +229 0x0000 //RX_FDEQ_BIN_9 +230 0x0000 //RX_FDEQ_BIN_10 +231 0x0000 //RX_FDEQ_BIN_11 +232 0x0000 //RX_FDEQ_BIN_12 +233 0x0000 //RX_FDEQ_BIN_13 +234 0x0000 //RX_FDEQ_BIN_14 +235 0x0000 //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x0000 //RX_FDEQ_RESRV_0 +245 0x0000 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0030 //RX_FDDRC_BAND_MARGIN_1 +248 0x0050 //RX_FDDRC_BAND_MARGIN_2 +249 0x0080 //RX_FDDRC_BAND_MARGIN_3 +250 0x0004 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x5000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x6400 //RX_FDDRC_THRD_3_2 +258 0x6400 //RX_FDDRC_THRD_3_3 +259 0x2000 //RX_FDDRC_SLANT_0_0 +260 0x2000 //RX_FDDRC_SLANT_0_1 +261 0x2000 //RX_FDDRC_SLANT_0_2 +262 0x2000 //RX_FDDRC_SLANT_0_3 +263 0x2000 //RX_FDDRC_SLANT_1_0 +264 0x2000 //RX_FDDRC_SLANT_1_1 +265 0x2000 //RX_FDDRC_SLANT_1_2 +266 0x2000 //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +286 0x0100 //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 +#VOL 5 +163 0x3000 //RX_TDDRC_ALPHA_UP_1 +164 0x3000 //RX_TDDRC_ALPHA_UP_2 +165 0x3000 //RX_TDDRC_ALPHA_UP_3 +166 0x3000 //RX_TDDRC_ALPHA_UP_4 +184 0x7FB0 //RX_TDDRC_ALPHA_DWN_1 +185 0x7FB0 //RX_TDDRC_ALPHA_DWN_2 +186 0x7FB0 //RX_TDDRC_ALPHA_DWN_3 +189 0x7FB0 //RX_TDDRC_ALPHA_DWN_4 +190 0xDA9E //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +269 0x0000 //RX_TDDRC_THRD_0 +270 0x0000 //RX_TDDRC_THRD_1 +271 0x0E80 //RX_TDDRC_THRD_2 +272 0x3800 //RX_TDDRC_THRD_3 +273 0x2A00 //RX_TDDRC_SLANT_0 +274 0x6E00 //RX_TDDRC_SLANT_1 +275 0x3000 //RX_TDDRC_ALPHA_UP_0 +276 0x7FB0 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x0000 //RX_TDDRC_HMNC_GAIN +279 0x0000 //RX_TDDRC_SMT_FLAG +280 0x0000 //RX_TDDRC_SMT_W +281 0x0100 //RX_TDDRC_DRC_GAIN +195 0x0020 //RX_FDEQ_SUBNUM +196 0x4848 //RX_FDEQ_GAIN_0 +197 0x4848 //RX_FDEQ_GAIN_1 +198 0x4848 //RX_FDEQ_GAIN_2 +199 0x4848 //RX_FDEQ_GAIN_3 +200 0x4848 //RX_FDEQ_GAIN_4 +201 0x4848 //RX_FDEQ_GAIN_5 +202 0x4848 //RX_FDEQ_GAIN_6 +203 0x4848 //RX_FDEQ_GAIN_7 +204 0x4848 //RX_FDEQ_GAIN_8 +205 0x4848 //RX_FDEQ_GAIN_9 +206 0x4848 //RX_FDEQ_GAIN_10 +207 0x4848 //RX_FDEQ_GAIN_11 +208 0x4848 //RX_FDEQ_GAIN_12 +209 0x4848 //RX_FDEQ_GAIN_13 +210 0x4848 //RX_FDEQ_GAIN_14 +211 0x4848 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0000 //RX_FDEQ_BIN_0 +221 0x0000 //RX_FDEQ_BIN_1 +222 0x0000 //RX_FDEQ_BIN_2 +223 0x0000 //RX_FDEQ_BIN_3 +224 0x0000 //RX_FDEQ_BIN_4 +225 0x0000 //RX_FDEQ_BIN_5 +226 0x0000 //RX_FDEQ_BIN_6 +227 0x0000 //RX_FDEQ_BIN_7 +228 0x0000 //RX_FDEQ_BIN_8 +229 0x0000 //RX_FDEQ_BIN_9 +230 0x0000 //RX_FDEQ_BIN_10 +231 0x0000 //RX_FDEQ_BIN_11 +232 0x0000 //RX_FDEQ_BIN_12 +233 0x0000 //RX_FDEQ_BIN_13 +234 0x0000 //RX_FDEQ_BIN_14 +235 0x0000 //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x0000 //RX_FDEQ_RESRV_0 +245 0x0000 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0030 //RX_FDDRC_BAND_MARGIN_1 +248 0x0050 //RX_FDDRC_BAND_MARGIN_2 +249 0x0080 //RX_FDDRC_BAND_MARGIN_3 +250 0x0004 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x5000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x6400 //RX_FDDRC_THRD_3_2 +258 0x6400 //RX_FDDRC_THRD_3_3 +259 0x2000 //RX_FDDRC_SLANT_0_0 +260 0x2000 //RX_FDDRC_SLANT_0_1 +261 0x2000 //RX_FDDRC_SLANT_0_2 +262 0x2000 //RX_FDDRC_SLANT_0_3 +263 0x2000 //RX_FDDRC_SLANT_1_0 +264 0x2000 //RX_FDDRC_SLANT_1_1 +265 0x2000 //RX_FDDRC_SLANT_1_2 +266 0x2000 //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +286 0x0100 //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 +#VOL 6 +163 0x3000 //RX_TDDRC_ALPHA_UP_1 +164 0x3000 //RX_TDDRC_ALPHA_UP_2 +165 0x3000 //RX_TDDRC_ALPHA_UP_3 +166 0x3000 //RX_TDDRC_ALPHA_UP_4 +184 0x7FB0 //RX_TDDRC_ALPHA_DWN_1 +185 0x7FB0 //RX_TDDRC_ALPHA_DWN_2 +186 0x7FB0 //RX_TDDRC_ALPHA_DWN_3 +189 0x7FB0 //RX_TDDRC_ALPHA_DWN_4 +190 0xDA9E //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +269 0x0000 //RX_TDDRC_THRD_0 +270 0x0000 //RX_TDDRC_THRD_1 +271 0x0E80 //RX_TDDRC_THRD_2 +272 0x3800 //RX_TDDRC_THRD_3 +273 0x2A00 //RX_TDDRC_SLANT_0 +274 0x6E00 //RX_TDDRC_SLANT_1 +275 0x3000 //RX_TDDRC_ALPHA_UP_0 +276 0x7FB0 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x0000 //RX_TDDRC_HMNC_GAIN +279 0x0000 //RX_TDDRC_SMT_FLAG +280 0x0000 //RX_TDDRC_SMT_W +281 0x0100 //RX_TDDRC_DRC_GAIN +195 0x0020 //RX_FDEQ_SUBNUM +196 0x4848 //RX_FDEQ_GAIN_0 +197 0x4848 //RX_FDEQ_GAIN_1 +198 0x4848 //RX_FDEQ_GAIN_2 +199 0x4848 //RX_FDEQ_GAIN_3 +200 0x4848 //RX_FDEQ_GAIN_4 +201 0x4848 //RX_FDEQ_GAIN_5 +202 0x4848 //RX_FDEQ_GAIN_6 +203 0x4848 //RX_FDEQ_GAIN_7 +204 0x4848 //RX_FDEQ_GAIN_8 +205 0x4848 //RX_FDEQ_GAIN_9 +206 0x4848 //RX_FDEQ_GAIN_10 +207 0x4848 //RX_FDEQ_GAIN_11 +208 0x4848 //RX_FDEQ_GAIN_12 +209 0x4848 //RX_FDEQ_GAIN_13 +210 0x4848 //RX_FDEQ_GAIN_14 +211 0x4848 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0000 //RX_FDEQ_BIN_0 +221 0x0000 //RX_FDEQ_BIN_1 +222 0x0000 //RX_FDEQ_BIN_2 +223 0x0000 //RX_FDEQ_BIN_3 +224 0x0000 //RX_FDEQ_BIN_4 +225 0x0000 //RX_FDEQ_BIN_5 +226 0x0000 //RX_FDEQ_BIN_6 +227 0x0000 //RX_FDEQ_BIN_7 +228 0x0000 //RX_FDEQ_BIN_8 +229 0x0000 //RX_FDEQ_BIN_9 +230 0x0000 //RX_FDEQ_BIN_10 +231 0x0000 //RX_FDEQ_BIN_11 +232 0x0000 //RX_FDEQ_BIN_12 +233 0x0000 //RX_FDEQ_BIN_13 +234 0x0000 //RX_FDEQ_BIN_14 +235 0x0000 //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x0000 //RX_FDEQ_RESRV_0 +245 0x0000 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0030 //RX_FDDRC_BAND_MARGIN_1 +248 0x0050 //RX_FDDRC_BAND_MARGIN_2 +249 0x0080 //RX_FDDRC_BAND_MARGIN_3 +250 0x0004 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x5000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x6400 //RX_FDDRC_THRD_3_2 +258 0x6400 //RX_FDDRC_THRD_3_3 +259 0x2000 //RX_FDDRC_SLANT_0_0 +260 0x2000 //RX_FDDRC_SLANT_0_1 +261 0x2000 //RX_FDDRC_SLANT_0_2 +262 0x2000 //RX_FDDRC_SLANT_0_3 +263 0x2000 //RX_FDDRC_SLANT_1_0 +264 0x2000 //RX_FDDRC_SLANT_1_1 +265 0x2000 //RX_FDDRC_SLANT_1_2 +266 0x2000 //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +286 0x0100 //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 #CASE_NAME HEADSET-TTY_VCO-VOICE_GENERIC-WB -#PARAM_MODE FULL -#PARAM_TYPE TX+RX -#TOTAL_CUSTOM_STEP 7 +#PARAM_MODE Full +#PARAM_TYPE TX+2RX +#TOTAL_CUSTOM_STEP 7+7 #TX 0 0x0001 //TX_OPERATION_MODE_0 1 0x0001 //TX_OPERATION_MODE_1 2 0x0033 //TX_PATCH_REG -3 0x2F7C //TX_SENDFUNC_MODE_0 +3 0x6F7C //TX_SENDFUNC_MODE_0 4 0x0001 //TX_SENDFUNC_MODE_1 -5 0x0003 //TX_NUM_MIC +5 0x0002 //TX_NUM_MIC 6 0x0001 //TX_SAMPLINGFREQ_SIG 7 0x0001 //TX_SAMPLINGFREQ_PROC 8 0x000A //TX_FRAME_SZ_SIG @@ -43879,8 +66779,8 @@ 18 0x0000 //TX_SYS_RESRV_2 19 0x0000 //TX_SYS_RESRV_3 20 0x0000 //TX_DIST2REF0 -21 0x00A4 //TX_DIST2REF1 -22 0x0017 //TX_DIST2REF_02 +21 0x009D //TX_DIST2REF1 +22 0x0010 //TX_DIST2REF_02 23 0x0000 //TX_DIST2REF_03 24 0x0000 //TX_DIST2REF_04 25 0x0000 //TX_DIST2REF_05 @@ -43971,8 +66871,8 @@ 110 0x0000 //TX_ADCS_MASK 111 0x04D0 //TX_ADCS_GAIN 112 0x4000 //TX_NFC_GAINFAC -113 0x0000 //TX_MAINMIC_BLKFACTOR -114 0x0000 //TX_REFMIC_BLKFACTOR +113 0x0004 //TX_MAINMIC_BLKFACTOR +114 0x0004 //TX_REFMIC_BLKFACTOR 115 0x0000 //TX_BLMIC_BLKFACTOR 116 0x0000 //TX_BRMIC_BLKFACTOR 117 0x0031 //TX_MICBLK_START_BIN @@ -44010,7 +66910,7 @@ 149 0x0800 //TX_AEC_REF_GAIN_2 150 0x6800 //TX_EAD_THR 151 0x1000 //TX_THR_RE_EST -152 0x0200 //TX_MIN_EQ_RE_EST_0 +152 0x3000 //TX_MIN_EQ_RE_EST_0 153 0x0100 //TX_MIN_EQ_RE_EST_1 154 0x0200 //TX_MIN_EQ_RE_EST_2 155 0x0200 //TX_MIN_EQ_RE_EST_3 @@ -44023,13 +66923,13 @@ 162 0x1000 //TX_MIN_EQ_RE_EST_10 163 0x1000 //TX_MIN_EQ_RE_EST_11 164 0x1000 //TX_MIN_EQ_RE_EST_12 -165 0x4000 //TX_LAMBDA_RE_EST +165 0x1B00 //TX_LAMBDA_RE_EST 166 0x4000 //TX_LAMBDA_CB_NLE 167 0x7FFF //TX_C_POST_FLT 168 0x5000 //TX_GAIN_NP 169 0x0180 //TX_SE_HOLD_N 170 0x00C8 //TX_DT_HOLD_N -171 0x05DC //TX_DT2_HOLD_N +171 0x0020 //TX_DT2_HOLD_N 172 0x6666 //TX_AEC_RESRV_0 173 0x0000 //TX_AEC_RESRV_1 174 0x0014 //TX_AEC_RESRV_2 @@ -44055,15 +66955,15 @@ 194 0x0000 //TX_NORMENERTH 195 0x0000 //TX_NORMENERHIGHTH 196 0x0000 //TX_NORMENERHIGHTHL -197 0x6590 //TX_DTD_THR1_0 -198 0x6590 //TX_DTD_THR1_1 -199 0x6590 //TX_DTD_THR1_2 +197 0x76D0 //TX_DTD_THR1_0 +198 0x76D0 //TX_DTD_THR1_1 +199 0x76D0 //TX_DTD_THR1_2 200 0x7FF0 //TX_DTD_THR1_3 201 0x7FF0 //TX_DTD_THR1_4 202 0x7FF0 //TX_DTD_THR1_5 203 0x7FF0 //TX_DTD_THR1_6 -204 0x5000 //TX_DTD_THR2_0 -205 0x5000 //TX_DTD_THR2_1 +204 0x7E00 //TX_DTD_THR2_0 +205 0x7E00 //TX_DTD_THR2_1 206 0x5000 //TX_DTD_THR2_2 207 0x5000 //TX_DTD_THR2_3 208 0x5000 //TX_DTD_THR2_4 @@ -44071,8 +66971,8 @@ 210 0x5000 //TX_DTD_THR2_6 211 0x7FFF //TX_DTD_THR3 212 0x0000 //TX_SPK_CUT_K -213 0x07D0 //TX_DT_CUT_K -214 0x0100 //TX_DT_CUT_THR +213 0x03E8 //TX_DT_CUT_K +214 0x0010 //TX_DT_CUT_THR 215 0x04EB //TX_COMFORT_G 216 0x01F4 //TX_POWER_YOUT_TH 217 0x4000 //TX_FDPFGAINECHO @@ -44083,16 +66983,16 @@ 222 0x023E //TX_ADPT_STRICT_H 223 0x0BB8 //TX_RATIO_DT_L_TH_LOW 224 0x3A98 //TX_RATIO_DT_H_TH_LOW -225 0x1770 //TX_RATIO_DT_L_TH_HIGH -226 0x4E20 //TX_RATIO_DT_H_TH_HIGH -227 0x09C4 //TX_RATIO_DT_L0_TH -228 0x2000 //TX_B_POST_FILT_ECHO_L +225 0x044C //TX_RATIO_DT_L_TH_HIGH +226 0x7800 //TX_RATIO_DT_H_TH_HIGH +227 0x0001 //TX_RATIO_DT_L0_TH +228 0x7FFF //TX_B_POST_FILT_ECHO_L 229 0x7FFF //TX_B_POST_FILT_ECHO_H 230 0x0200 //TX_MIN_G_CTRL_ECHO 231 0x1000 //TX_B_LESSCUT_RTO_ECHO 232 0x0000 //TX_EPD_OFFSET_00 233 0x0000 //TX_EPD_OFFST_01 -234 0x1388 //TX_RATIO_DT_L0_TH_HIGH +234 0x03E8 //TX_RATIO_DT_L0_TH_HIGH 235 0x7FFF //TX_RATIO_DT_H_TH_CUT 236 0x7FFF //TX_MIN_EQ_RE_EST_13 237 0x0000 //TX_DTD_THR1_7 @@ -44100,7 +67000,7 @@ 239 0x0800 //TX_DT_RESRV_7 240 0x0800 //TX_DT_RESRV_8 241 0x0000 //TX_DT_RESRV_9 -242 0xF800 //TX_THR_SN_EST_0 +242 0xFA00 //TX_THR_SN_EST_0 243 0xFA00 //TX_THR_SN_EST_1 244 0xFA00 //TX_THR_SN_EST_2 245 0xFB00 //TX_THR_SN_EST_3 @@ -44109,11 +67009,11 @@ 248 0xF800 //TX_THR_SN_EST_6 249 0xF800 //TX_THR_SN_EST_7 250 0x0100 //TX_DELTA_THR_SN_EST_0 -251 0x0200 //TX_DELTA_THR_SN_EST_1 -252 0x0100 //TX_DELTA_THR_SN_EST_2 -253 0x0200 //TX_DELTA_THR_SN_EST_3 +251 0x0100 //TX_DELTA_THR_SN_EST_1 +252 0x0200 //TX_DELTA_THR_SN_EST_2 +253 0x0100 //TX_DELTA_THR_SN_EST_3 254 0x0100 //TX_DELTA_THR_SN_EST_4 -255 0x0100 //TX_DELTA_THR_SN_EST_5 +255 0x0200 //TX_DELTA_THR_SN_EST_5 256 0x0200 //TX_DELTA_THR_SN_EST_6 257 0x0200 //TX_DELTA_THR_SN_EST_7 258 0x4000 //TX_LAMBDA_NN_EST_0 @@ -44141,11 +67041,11 @@ 280 0x1000 //TX_B_POST_FLT_1 281 0x0010 //TX_NS_LVL_CTRL_0 282 0x0014 //TX_NS_LVL_CTRL_1 -283 0x0014 //TX_NS_LVL_CTRL_2 -284 0x0018 //TX_NS_LVL_CTRL_3 -285 0x0016 //TX_NS_LVL_CTRL_4 -286 0x0014 //TX_NS_LVL_CTRL_5 -287 0x0011 //TX_NS_LVL_CTRL_6 +283 0x0018 //TX_NS_LVL_CTRL_2 +284 0x0016 //TX_NS_LVL_CTRL_3 +285 0x0014 //TX_NS_LVL_CTRL_4 +286 0x0011 //TX_NS_LVL_CTRL_5 +287 0x0014 //TX_NS_LVL_CTRL_6 288 0x0011 //TX_NS_LVL_CTRL_7 289 0x000F //TX_MIN_GAIN_S_0 290 0x0010 //TX_MIN_GAIN_S_1 @@ -44163,8 +67063,8 @@ 302 0x4000 //TX_SNRI_SUP_2 303 0x4000 //TX_SNRI_SUP_3 304 0x4000 //TX_SNRI_SUP_4 -305 0x4000 //TX_SNRI_SUP_5 -306 0x50C0 //TX_SNRI_SUP_6 +305 0x50C0 //TX_SNRI_SUP_5 +306 0x4000 //TX_SNRI_SUP_6 307 0x7FFF //TX_SNRI_SUP_7 308 0x7FFF //TX_THR_LFNS 309 0x0018 //TX_G_LFNS @@ -44173,19 +67073,19 @@ 312 0x7FFF //TX_A_POST_FILT_0 313 0x2000 //TX_A_POST_FILT_1 314 0x5000 //TX_A_POST_FILT_S_0 -315 0x6000 //TX_A_POST_FILT_S_1 -316 0x4C00 //TX_A_POST_FILT_S_2 -317 0x4000 //TX_A_POST_FILT_S_3 -318 0x6000 //TX_A_POST_FILT_S_4 -319 0x4000 //TX_A_POST_FILT_S_5 -320 0x5000 //TX_A_POST_FILT_S_6 +315 0x4C00 //TX_A_POST_FILT_S_1 +316 0x4000 //TX_A_POST_FILT_S_2 +317 0x6000 //TX_A_POST_FILT_S_3 +318 0x4000 //TX_A_POST_FILT_S_4 +319 0x5000 //TX_A_POST_FILT_S_5 +320 0x6000 //TX_A_POST_FILT_S_6 321 0x7000 //TX_A_POST_FILT_S_7 322 0x2000 //TX_B_POST_FILT_0 -323 0x1000 //TX_B_POST_FILT_1 +323 0x2000 //TX_B_POST_FILT_1 324 0x2000 //TX_B_POST_FILT_2 -325 0x2000 //TX_B_POST_FILT_3 +325 0x4000 //TX_B_POST_FILT_3 326 0x4000 //TX_B_POST_FILT_4 -327 0x4000 //TX_B_POST_FILT_5 +327 0x1000 //TX_B_POST_FILT_5 328 0x1000 //TX_B_POST_FILT_6 329 0x2000 //TX_B_POST_FILT_7 330 0x4000 //TX_B_LESSCUT_RTO_S_0 @@ -44193,14 +67093,14 @@ 332 0x7FFF //TX_B_LESSCUT_RTO_S_2 333 0x7FFF //TX_B_LESSCUT_RTO_S_3 334 0x7FFF //TX_B_LESSCUT_RTO_S_4 -335 0x7FFF //TX_B_LESSCUT_RTO_S_5 -336 0x6000 //TX_B_LESSCUT_RTO_S_6 +335 0x6000 //TX_B_LESSCUT_RTO_S_5 +336 0x7FFF //TX_B_LESSCUT_RTO_S_6 337 0x7FFF //TX_B_LESSCUT_RTO_S_7 338 0x7C00 //TX_LAMBDA_PFILT 339 0x7C00 //TX_LAMBDA_PFILT_S_0 340 0x7C00 //TX_LAMBDA_PFILT_S_1 -341 0x7C00 //TX_LAMBDA_PFILT_S_2 -342 0x7A00 //TX_LAMBDA_PFILT_S_3 +341 0x7A00 //TX_LAMBDA_PFILT_S_2 +342 0x7C00 //TX_LAMBDA_PFILT_S_3 343 0x7C00 //TX_LAMBDA_PFILT_S_4 344 0x7C00 //TX_LAMBDA_PFILT_S_5 345 0x7C00 //TX_LAMBDA_PFILT_S_6 @@ -44211,10 +67111,10 @@ 350 0x0600 //TX_A_PEPPER_HF 351 0x0001 //TX_HMNC_BST_FLG 352 0x0200 //TX_HMNC_BST_THR -353 0x0200 //TX_DT_BINVAD_TH_0 -354 0x0200 //TX_DT_BINVAD_TH_1 -355 0x0200 //TX_DT_BINVAD_TH_2 -356 0x0200 //TX_DT_BINVAD_TH_3 +353 0x0800 //TX_DT_BINVAD_TH_0 +354 0x0800 //TX_DT_BINVAD_TH_1 +355 0x0800 //TX_DT_BINVAD_TH_2 +356 0x0800 //TX_DT_BINVAD_TH_3 357 0x1D4C //TX_DT_BINVAD_ENDF 358 0x0800 //TX_C_POST_FLT_DT 359 0x0CCD //TX_NS_B_POST_FLT_LESSCUT @@ -44225,7 +67125,7 @@ 364 0x0000 //TX_K_APT 365 0x0001 //TX_NOISEDET 366 0x0064 //TX_NDETCT -367 0x0032 //TX_NOISE_TH_0 +367 0x0102 //TX_NOISE_TH_0 368 0x7FFF //TX_NOISE_TH_0_2 369 0x7FFF //TX_NOISE_TH_0_3 370 0x017E //TX_NOISE_TH_1 @@ -44237,11 +67137,11 @@ 376 0x0001 //TX_NOISE_TH_5_3 377 0x7FFF //TX_NOISE_TH_5_4 378 0x0F0A //TX_NOISE_TH_6 -379 0x0033 //TX_MINENOISE_TH -380 0x4000 //TX_MINENOISE_MIC0_TH_MTS -381 0xFFEE //TX_MINENOISE_MIC0_TH_EXP -382 0x6000 //TX_MINENOISE_MIC0_S_TH_MTS -383 0xFFF3 //TX_MINENOISE_MIC0_S_TH_EXP +379 0x00F8 //TX_MINENOISE_TH +380 0xD508 //TX_MORENS_TFMASK_TH +381 0x0001 //TX_DRC_QUIET_FLOOR +382 0x3A98 //TX_RATIODTL_CUT_TH +383 0x0DAC //TX_DT_CUT_K1 384 0x0666 //TX_OUT_ENER_S_TH_CLEAN 385 0x0666 //TX_OUT_ENER_S_TH_LESSCLEAN 386 0x0333 //TX_OUT_ENER_S_TH_NOISY @@ -44249,22 +67149,22 @@ 388 0x0333 //TX_OUT_ENER_TH_SPEECH 389 0x2000 //TX_SN_NPB_GAIN 390 0x0000 //TX_NN_NPB_GAIN -391 0x0000 //TX_CSX_ALPHA_0 -392 0x0000 //TX_CSX_ALPHA_1 -393 0x0000 //TX_CSX_ALPHA_2 -394 0x0000 //TX_CSX_ALPHA_3 -395 0x0800 //TX_MU_ARSP_EST -396 0x00C8 //TX_P_OUTBEAM_MIN_TH +391 0x7FFF //TX_POST_MASK_SUP_HSNE +392 0x1388 //TX_TAIL_DET_TH +393 0x4000 //TX_B_LESSCUT_RTO_WTA +394 0x0000 //TX_MEL_G_R +395 0x0080 //TX_SUPHIGH_TH +396 0x0000 //TX_MASK_G_R 397 0x0002 //TX_EXTRA_NS_L -398 0x0800 //TX_EXTRA_NS_A -399 0x0005 //TX_VR_NOISE_FLOOR_TH +398 0x1800 //TX_C_POST_FLT_MASK +399 0x7FFF //TX_A_POST_FLT_WNS 400 0x0148 //TX_MIN_G_LOW300HZ -401 0x0001 //TX_MAXLEVEL_CNG +401 0x0004 //TX_MAXLEVEL_CNG 402 0x00B4 //TX_STN_NOISE_TH 403 0x4000 //TX_POST_MASK_SUP 404 0x7FFF //TX_POST_MASK_ADJUST 405 0x00C8 //TX_NS_ENOISE_MIC0_TH -406 0x0033 //TX_MINENOISE_MIC0_TH +406 0x00DC //TX_MINENOISE_MIC0_TH 407 0x012C //TX_MINENOISE_MIC0_S_TH 408 0x7FFF //TX_MIN_G_CTRL_SSNS 409 0x0000 //TX_METAL_RTO_THR @@ -44372,16 +67272,16 @@ 511 0x6666 //TX_MIC_TO_BFGAIN 512 0x0000 //TX_MICTOBFGAIN0 513 0x0000 //TX_FASTMUE_TH -514 0x0000 //TX_DERVB_LEN_0 -515 0x0000 //TX_DERVB_LEN_1 -516 0x0000 //TX_RHO_DERVB -517 0x0000 //TX_MIC_INDX_DERVB -518 0x0000 //TX_MU_DERVB -519 0x0000 //TX_DR_RESRV_0 -520 0x0000 //TX_DR_RESRV_1 -521 0x0000 //TX_DR_RESRV_2 -522 0x0000 //TX_DR_RESRV_3 -523 0x0000 //TX_DR_RESRV_4 +514 0xC000 //TX_DEREVERB_LF_MU +515 0xC000 //TX_DEREVERB_HF_MU +516 0xCCCC //TX_DEREVERB_DELAY +517 0xD999 //TX_DEREVERB_COEF_LEN +518 0x1F40 //TX_DEREVERB_DNR +519 0x0000 //TX_DEREVERB_ALPHA +520 0x0000 //TX_DEREVERB_BETA +521 0x0000 //TX_GSC_RTOL_TH +522 0x7000 //TX_GSC_RTOH_TH +523 0x0064 //TX_WIDE2_MEANHTH 524 0x0000 //TX_DR_RESRV_5 525 0x0000 //TX_DR_RESRV_6 526 0x0000 //TX_DR_RESRV_7 @@ -44424,19 +67324,19 @@ 563 0x0000 //TX_SAM_MARK 564 0x0000 //TX_PB_RESRV_0 565 0x0000 //TX_PB_RESRV_1 -566 0x001C //TX_FDEQ_SUBNUM -567 0x5050 //TX_FDEQ_GAIN_0 -568 0x5048 //TX_FDEQ_GAIN_1 +566 0x0020 //TX_FDEQ_SUBNUM +567 0x5454 //TX_FDEQ_GAIN_0 +568 0x5448 //TX_FDEQ_GAIN_1 569 0x4848 //TX_FDEQ_GAIN_2 570 0x4848 //TX_FDEQ_GAIN_3 571 0x4848 //TX_FDEQ_GAIN_4 572 0x4850 //TX_FDEQ_GAIN_5 573 0x5050 //TX_FDEQ_GAIN_6 -574 0x5048 //TX_FDEQ_GAIN_7 -575 0x4848 //TX_FDEQ_GAIN_8 -576 0x4844 //TX_FDEQ_GAIN_9 -577 0x3C36 //TX_FDEQ_GAIN_10 -578 0x3A3A //TX_FDEQ_GAIN_11 +574 0x5448 //TX_FDEQ_GAIN_7 +575 0x464C //TX_FDEQ_GAIN_8 +576 0x5050 //TX_FDEQ_GAIN_9 +577 0x4848 //TX_FDEQ_GAIN_10 +578 0x4848 //TX_FDEQ_GAIN_11 579 0x4848 //TX_FDEQ_GAIN_12 580 0x4848 //TX_FDEQ_GAIN_13 581 0x4848 //TX_FDEQ_GAIN_14 @@ -44459,10 +67359,10 @@ 598 0x090A //TX_FDEQ_BIN_7 599 0x0B0C //TX_FDEQ_BIN_8 600 0x0D0E //TX_FDEQ_BIN_9 -601 0x0E0F //TX_FDEQ_BIN_10 -602 0x0F10 //TX_FDEQ_BIN_11 -603 0x1011 //TX_FDEQ_BIN_12 -604 0x1104 //TX_FDEQ_BIN_13 +601 0x0F10 //TX_FDEQ_BIN_10 +602 0x1011 //TX_FDEQ_BIN_11 +603 0x1112 //TX_FDEQ_BIN_12 +604 0x120B //TX_FDEQ_BIN_13 605 0x0000 //TX_FDEQ_BIN_14 606 0x0000 //TX_FDEQ_BIN_15 607 0x0000 //TX_FDEQ_BIN_16 @@ -44482,13 +67382,13 @@ 621 0x4848 //TX_PREEQ_GAIN_MIC0_4 622 0x4848 //TX_PREEQ_GAIN_MIC0_5 623 0x4848 //TX_PREEQ_GAIN_MIC0_6 -624 0x484A //TX_PREEQ_GAIN_MIC0_7 -625 0x4C4E //TX_PREEQ_GAIN_MIC0_8 -626 0x5054 //TX_PREEQ_GAIN_MIC0_9 -627 0x5658 //TX_PREEQ_GAIN_MIC0_10 -628 0x5C5C //TX_PREEQ_GAIN_MIC0_11 -629 0x5E64 //TX_PREEQ_GAIN_MIC0_12 -630 0x6464 //TX_PREEQ_GAIN_MIC0_13 +624 0x4848 //TX_PREEQ_GAIN_MIC0_7 +625 0x484A //TX_PREEQ_GAIN_MIC0_8 +626 0x4B4C //TX_PREEQ_GAIN_MIC0_9 +627 0x4B4A //TX_PREEQ_GAIN_MIC0_10 +628 0x4A48 //TX_PREEQ_GAIN_MIC0_11 +629 0x4C4C //TX_PREEQ_GAIN_MIC0_12 +630 0x4C4C //TX_PREEQ_GAIN_MIC0_13 631 0x4848 //TX_PREEQ_GAIN_MIC0_14 632 0x4848 //TX_PREEQ_GAIN_MIC0_15 633 0x4848 //TX_PREEQ_GAIN_MIC0_16 @@ -44511,8 +67411,8 @@ 650 0x0D0E //TX_PREEQ_BIN_MIC0_9 651 0x0F10 //TX_PREEQ_BIN_MIC0_10 652 0x1011 //TX_PREEQ_BIN_MIC0_11 -653 0x1104 //TX_PREEQ_BIN_MIC0_12 -654 0x1010 //TX_PREEQ_BIN_MIC0_13 +653 0x1112 //TX_PREEQ_BIN_MIC0_12 +654 0x120B //TX_PREEQ_BIN_MIC0_13 655 0x0000 //TX_PREEQ_BIN_MIC0_14 656 0x0000 //TX_PREEQ_BIN_MIC0_15 657 0x0000 //TX_PREEQ_BIN_MIC0_16 @@ -44531,12 +67431,12 @@ 670 0x4848 //TX_PREEQ_GAIN_MIC1_4 671 0x4848 //TX_PREEQ_GAIN_MIC1_5 672 0x4848 //TX_PREEQ_GAIN_MIC1_6 -673 0x4848 //TX_PREEQ_GAIN_MIC1_7 -674 0x4848 //TX_PREEQ_GAIN_MIC1_8 -675 0x4848 //TX_PREEQ_GAIN_MIC1_9 -676 0x4848 //TX_PREEQ_GAIN_MIC1_10 -677 0x4848 //TX_PREEQ_GAIN_MIC1_11 -678 0x4848 //TX_PREEQ_GAIN_MIC1_12 +673 0x4846 //TX_PREEQ_GAIN_MIC1_7 +674 0x4544 //TX_PREEQ_GAIN_MIC1_8 +675 0x4241 //TX_PREEQ_GAIN_MIC1_9 +676 0x403E //TX_PREEQ_GAIN_MIC1_10 +677 0x3D3C //TX_PREEQ_GAIN_MIC1_11 +678 0x3C3C //TX_PREEQ_GAIN_MIC1_12 679 0x4848 //TX_PREEQ_GAIN_MIC1_13 680 0x4848 //TX_PREEQ_GAIN_MIC1_14 681 0x4848 //TX_PREEQ_GAIN_MIC1_15 @@ -44548,19 +67448,19 @@ 687 0x4848 //TX_PREEQ_GAIN_MIC1_21 688 0x4848 //TX_PREEQ_GAIN_MIC1_22 689 0x4848 //TX_PREEQ_GAIN_MIC1_23 -690 0x251A //TX_PREEQ_BIN_MIC1_0 -691 0x0F0F //TX_PREEQ_BIN_MIC1_1 -692 0x0C0C //TX_PREEQ_BIN_MIC1_2 -693 0x0C0F //TX_PREEQ_BIN_MIC1_3 -694 0x0F0F //TX_PREEQ_BIN_MIC1_4 -695 0x0F09 //TX_PREEQ_BIN_MIC1_5 -696 0x0909 //TX_PREEQ_BIN_MIC1_6 -697 0x0908 //TX_PREEQ_BIN_MIC1_7 -698 0x0700 //TX_PREEQ_BIN_MIC1_8 -699 0x0000 //TX_PREEQ_BIN_MIC1_9 -700 0x0000 //TX_PREEQ_BIN_MIC1_10 -701 0x0000 //TX_PREEQ_BIN_MIC1_11 -702 0x0000 //TX_PREEQ_BIN_MIC1_12 +690 0x0202 //TX_PREEQ_BIN_MIC1_0 +691 0x0203 //TX_PREEQ_BIN_MIC1_1 +692 0x0303 //TX_PREEQ_BIN_MIC1_2 +693 0x0304 //TX_PREEQ_BIN_MIC1_3 +694 0x0405 //TX_PREEQ_BIN_MIC1_4 +695 0x0506 //TX_PREEQ_BIN_MIC1_5 +696 0x0708 //TX_PREEQ_BIN_MIC1_6 +697 0x090A //TX_PREEQ_BIN_MIC1_7 +698 0x0B0C //TX_PREEQ_BIN_MIC1_8 +699 0x0F10 //TX_PREEQ_BIN_MIC1_9 +700 0x1011 //TX_PREEQ_BIN_MIC1_10 +701 0x1112 //TX_PREEQ_BIN_MIC1_11 +702 0x1208 //TX_PREEQ_BIN_MIC1_12 703 0x0000 //TX_PREEQ_BIN_MIC1_13 704 0x0000 //TX_PREEQ_BIN_MIC1_14 705 0x0000 //TX_PREEQ_BIN_MIC1_15 @@ -44649,7 +67549,7 @@ 788 0x7EB8 //TX_TDDRC_ALPHA_DWN_02 789 0x7EB8 //TX_TDDRC_ALPHA_DWN_03 790 0x7EB8 //TX_TDDRC_ALPHA_DWN_04 -791 0x7FFF //TX_TDDRC_TD_DRC_LIMIT +791 0x7214 //TX_TDDRC_TD_DRC_LIMIT 792 0x0800 //TX_TDDRC_POST_LIMIT_GAIN 793 0x0000 //TX_TDDRC_RESRV_0 794 0x0000 //TX_TDDRC_RESRV_1 @@ -44716,15 +67616,15 @@ 855 0x0002 //TX_TDDRC_THRD_1 856 0x1800 //TX_TDDRC_THRD_2 857 0x1800 //TX_TDDRC_THRD_3 -858 0x6000 //TX_TDDRC_SLANT_0 -859 0x6000 //TX_TDDRC_SLANT_1 +858 0x7FFF //TX_TDDRC_SLANT_0 +859 0x7FFF //TX_TDDRC_SLANT_1 860 0x0800 //TX_TDDRC_ALPHA_UP_00 861 0x7EB8 //TX_TDDRC_ALPHA_DWN_00 862 0x0000 //TX_TDDRC_HMNC_FLAG 863 0x199A //TX_TDDRC_HMNC_GAIN 864 0x0000 //TX_TDDRC_SMT_FLAG 865 0x0CCD //TX_TDDRC_SMT_W -866 0x0BE3 //TX_TDDRC_DRC_GAIN +866 0x0C97 //TX_TDDRC_DRC_GAIN 867 0x7FFF //TX_TDDRC_LMT_THRD 868 0x0000 //TX_TDDRC_LMT_ALPHA 869 0x0000 //TX_TFMASKLTH @@ -44749,14 +67649,79 @@ 888 0x0028 //TX_FASTNS_ARSPC_TH 889 0xC000 //TX_FASTNS_MASK5_TH 890 0x4848 //TX_POSTSSA_MIN_G_VR_MASK -891 0x1000 //TX_A_LESSCUT_RTO_MASK +891 0x4000 //TX_A_LESSCUT_RTO_MASK 892 0x1770 //TX_FASTNS_NOISETH 893 0xC000 //TX_FASTNS_SSA_THLFL 894 0xC000 //TX_FASTNS_SSA_THHFL 895 0xCCCC //TX_FASTNS_SSA_THLFH 896 0xD999 //TX_FASTNS_SSA_THHFH +897 0x2339 //TX_SENDFUNC_REG_MICMUTE +898 0x0021 //TX_SENDFUNC_REG_MICMUTE1 +899 0x02BC //TX_MICMUTE_RATIO_THR +900 0x0140 //TX_MICMUTE_AMP_THR +901 0x0004 //TX_MICMUTE_HPF_IND +902 0x00C0 //TX_MICMUTE_LOG_EYR_TH +903 0x0008 //TX_MICMUTE_CVG_TIME +904 0x0008 //TX_MICMUTE_RELEASE_TIME +905 0x01FE //TX_MIC_VOLUME_MIC0MUTE +906 0x0020 //TX_MICMUTE_EPD_OFFSET_0 +907 0x001E //TX_MICMUTE_FRQ_AEC_L +908 0x7999 //TX_MICMUTE_EAD_THR +909 0x7FFF //TX_MICMUTE_LAMBDA_CB_NLE +910 0x7FFF //TX_MICMUTE_LAMBDA_RE_EST +911 0x4000 //TX_DTD_THR1_MICMUTE_0 +912 0x7000 //TX_DTD_THR1_MICMUTE_1 +913 0x7FFF //TX_DTD_THR1_MICMUTE_2 +914 0x7FFF //TX_DTD_THR1_MICMUTE_3 +915 0x6CCC //TX_DTD_THR2_MICMUTE_0 +916 0x0400 //TX_MICMUTE_MIN_EQ_RE_EST_0 +917 0x0400 //TX_MICMUTE_MIN_EQ_RE_EST_1 +918 0x1000 //TX_MICMUTE_MIN_EQ_RE_EST_2 +919 0x7FFF //TX_MICMUTE_MIN_EQ_RE_EST_3 +920 0x7FFF //TX_MICMUTE_MIN_EQ_RE_EST_4 +921 0x4000 //TX_MICMUTE_C_POST_FLT +922 0x03E8 //TX_MICMUTE_DT_CUT_K +923 0x0001 //TX_MICMUTE_DT_CUT_THR +924 0x03E8 //TX_MICMUTE_DT_CUT_K2 +925 0x0001 //TX_MICMUTE_DT_CUT_THR2 +926 0x0064 //TX_MICMUTE_DT2_HOLD_N +927 0x1000 //TX_MICMUTE_RATIODTH_THCUT +928 0x1000 //TX_MICMUTE_B_POST_FLT_ECHOL +929 0x7FFF //TX_MICMUTE_B_POST_FLT_ECHOH +930 0x0400 //TX_MICMUTE_C_POST_FLT_MASK +931 0x7999 //TX_MICMUTE_RATIODTL_CUT_TH +932 0x0258 //TX_MICMUTE_DT_CUT_K1 +933 0x0800 //TX_MICMUTE_N2_SN_EST +934 0xFC00 //TX_MICMUTE_THR_SN_EST_0 +935 0x001C //TX_MICMUTE_MIN_G_CTRL_0 +936 0x6000 //TX_MICMUTE_A_POST_FILT_S_0 +937 0x7000 //TX_MICMUTE_B_POST_FILT_0 +938 0x2710 //TX_MIC1RUB_AMP_THR +939 0x0010 //TX_MIC1MUTE_RATIO_THR +940 0x0450 //TX_MIC1MUTE_AMP_THR +941 0x0008 //TX_MIC1MUTE_CVG_TIME +942 0x0008 //TX_MIC1MUTE_RELEASE_TIME +943 0x0000 //TX_AMS_RESRV_01 +944 0x0000 //TX_AMS_RESRV_02 +945 0x0000 //TX_AMS_RESRV_03 +946 0x0000 //TX_AMS_RESRV_04 +947 0x0000 //TX_AMS_RESRV_05 +948 0x0000 //TX_AMS_RESRV_06 +949 0x0000 //TX_AMS_RESRV_07 +950 0x0000 //TX_AMS_RESRV_08 +951 0x0000 //TX_AMS_RESRV_09 +952 0x0000 //TX_AMS_RESRV_10 +953 0x0000 //TX_AMS_RESRV_11 +954 0x0000 //TX_AMS_RESRV_12 +955 0x0000 //TX_AMS_RESRV_13 +956 0x0000 //TX_AMS_RESRV_14 +957 0x0000 //TX_AMS_RESRV_15 +958 0x0000 //TX_AMS_RESRV_16 +959 0x0000 //TX_AMS_RESRV_17 +960 0x0000 //TX_AMS_RESRV_18 +961 0x0000 //TX_AMS_RESRV_19 #RX -0 0x0040 //RX_RECVFUNC_MODE_0 +0 0x2040 //RX_RECVFUNC_MODE_0 1 0x0000 //RX_RECVFUNC_MODE_1 2 0x0000 //RX_SAMPLINGFREQ_SIG 3 0x0000 //RX_SAMPLINGFREQ_PROC @@ -45606,18 +68571,869 @@ 110 0x0000 //RX_FDDRC_RESRV_0 129 0x0100 //RX_SPK_VOL 130 0x0000 //RX_VOL_RESRV_0 +#RX 2 +157 0x2040 //RX_RECVFUNC_MODE_0 +158 0x0000 //RX_RECVFUNC_MODE_1 +159 0x0000 //RX_SAMPLINGFREQ_SIG +160 0x0000 //RX_SAMPLINGFREQ_PROC +161 0x000A //RX_FRAME_SZ +162 0x0000 //RX_DELAY_OPT +163 0x3000 //RX_TDDRC_ALPHA_UP_1 +164 0x3000 //RX_TDDRC_ALPHA_UP_2 +165 0x3000 //RX_TDDRC_ALPHA_UP_3 +166 0x3000 //RX_TDDRC_ALPHA_UP_4 +167 0x050D //RX_PGA +168 0x7652 //RX_A_HP +169 0x4000 //RX_B_PE +170 0x7800 //RX_THR_PITCH_DET_0 +171 0x7000 //RX_THR_PITCH_DET_1 +172 0x6000 //RX_THR_PITCH_DET_2 +173 0x0000 //RX_PITCH_BFR_LEN +174 0x0000 //RX_SBD_PITCH_DET +175 0x0000 //RX_PP_RESRV_0 +176 0x0000 //RX_PP_RESRV_1 +177 0xF800 //RX_N_SN_EST +178 0x0000 //RX_N2_SN_EST +179 0x000F //RX_NS_LVL_CTRL +180 0xF800 //RX_THR_SN_EST +181 0x7E00 //RX_LAMBDA_PFILT +182 0x000A //RX_FENS_RESRV_0 +183 0x0000 //RX_FENS_RESRV_1 +184 0x7FB0 //RX_TDDRC_ALPHA_DWN_1 +185 0x7FB0 //RX_TDDRC_ALPHA_DWN_2 +186 0x7FB0 //RX_TDDRC_ALPHA_DWN_3 +187 0x0000 //RX_EXTRA_NS_L +188 0x0000 //RX_EXTRA_NS_A +189 0x7FB0 //RX_TDDRC_ALPHA_DWN_4 +190 0xDA9E //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +192 0x0000 //RX_A_POST_FLT +193 0x0000 //RX_LMT_THRD +194 0x4000 //RX_LMT_ALPHA +195 0x0020 //RX_FDEQ_SUBNUM +196 0x4848 //RX_FDEQ_GAIN_0 +197 0x4848 //RX_FDEQ_GAIN_1 +198 0x4848 //RX_FDEQ_GAIN_2 +199 0x4848 //RX_FDEQ_GAIN_3 +200 0x4848 //RX_FDEQ_GAIN_4 +201 0x4848 //RX_FDEQ_GAIN_5 +202 0x4848 //RX_FDEQ_GAIN_6 +203 0x4848 //RX_FDEQ_GAIN_7 +204 0x4848 //RX_FDEQ_GAIN_8 +205 0x4848 //RX_FDEQ_GAIN_9 +206 0x4848 //RX_FDEQ_GAIN_10 +207 0x4848 //RX_FDEQ_GAIN_11 +208 0x4848 //RX_FDEQ_GAIN_12 +209 0x4848 //RX_FDEQ_GAIN_13 +210 0x4848 //RX_FDEQ_GAIN_14 +211 0x4848 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0000 //RX_FDEQ_BIN_0 +221 0x0000 //RX_FDEQ_BIN_1 +222 0x0000 //RX_FDEQ_BIN_2 +223 0x0000 //RX_FDEQ_BIN_3 +224 0x0000 //RX_FDEQ_BIN_4 +225 0x0000 //RX_FDEQ_BIN_5 +226 0x0000 //RX_FDEQ_BIN_6 +227 0x0000 //RX_FDEQ_BIN_7 +228 0x0000 //RX_FDEQ_BIN_8 +229 0x0000 //RX_FDEQ_BIN_9 +230 0x0000 //RX_FDEQ_BIN_10 +231 0x0000 //RX_FDEQ_BIN_11 +232 0x0000 //RX_FDEQ_BIN_12 +233 0x0000 //RX_FDEQ_BIN_13 +234 0x0000 //RX_FDEQ_BIN_14 +235 0x0000 //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x0000 //RX_FDEQ_RESRV_0 +245 0x0000 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0030 //RX_FDDRC_BAND_MARGIN_1 +248 0x0050 //RX_FDDRC_BAND_MARGIN_2 +249 0x0080 //RX_FDDRC_BAND_MARGIN_3 +250 0x0004 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x5000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x6400 //RX_FDDRC_THRD_3_2 +258 0x6400 //RX_FDDRC_THRD_3_3 +259 0x2000 //RX_FDDRC_SLANT_0_0 +260 0x2000 //RX_FDDRC_SLANT_0_1 +261 0x2000 //RX_FDDRC_SLANT_0_2 +262 0x2000 //RX_FDDRC_SLANT_0_3 +263 0x2000 //RX_FDDRC_SLANT_1_0 +264 0x2000 //RX_FDDRC_SLANT_1_1 +265 0x2000 //RX_FDDRC_SLANT_1_2 +266 0x2000 //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +268 0x0003 //RX_FILTINDX +269 0x0000 //RX_TDDRC_THRD_0 +270 0x0000 //RX_TDDRC_THRD_1 +271 0x0E80 //RX_TDDRC_THRD_2 +272 0x3800 //RX_TDDRC_THRD_3 +273 0x2A00 //RX_TDDRC_SLANT_0 +274 0x6E00 //RX_TDDRC_SLANT_1 +275 0x3000 //RX_TDDRC_ALPHA_UP_0 +276 0x7FB0 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x0000 //RX_TDDRC_HMNC_GAIN +279 0x0000 //RX_TDDRC_SMT_FLAG +280 0x0000 //RX_TDDRC_SMT_W +281 0x0100 //RX_TDDRC_DRC_GAIN +282 0x7C00 //RX_LAMBDA_PKA_FP +283 0x2000 //RX_TPKA_FP +284 0x0080 //RX_MIN_G_FP +285 0x2000 //RX_MAX_G_FP +286 0x0100 //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 +288 0x0010 //RX_MAXLEVEL_CNG +289 0x0000 //RX_BWE_UV_TH +290 0x0000 //RX_BWE_UV_TH2 +291 0x0000 //RX_BWE_UV_TH3 +292 0x0000 //RX_BWE_V_TH +293 0x0000 //RX_BWE_GAIN1_V_TH1 +294 0x0000 //RX_BWE_GAIN1_V_TH2 +295 0x0000 //RX_BWE_UV_EQ +296 0x0000 //RX_BWE_V_EQ +297 0x0000 //RX_BWE_TONE_TH +298 0x0000 //RX_BWE_UV_HOLD_T +299 0x0000 //RX_BWE_GAIN2_ALPHA +300 0x0000 //RX_BWE_GAIN3_ALPHA +301 0x0000 //RX_BWE_CUTOFF +302 0x0000 //RX_BWE_GAINFILL +303 0x0000 //RX_BWE_MAXTH_TONE +304 0x0000 //RX_BWE_EQ_0 +305 0x0000 //RX_BWE_EQ_1 +306 0x0000 //RX_BWE_EQ_2 +307 0x0000 //RX_BWE_EQ_3 +308 0x0000 //RX_BWE_EQ_4 +309 0x0000 //RX_BWE_EQ_5 +310 0x0000 //RX_BWE_EQ_6 +311 0x0000 //RX_BWE_RESRV_0 +312 0x0000 //RX_BWE_RESRV_1 +313 0x0000 //RX_BWE_RESRV_2 +#VOL 0 +163 0x3000 //RX_TDDRC_ALPHA_UP_1 +164 0x3000 //RX_TDDRC_ALPHA_UP_2 +165 0x3000 //RX_TDDRC_ALPHA_UP_3 +166 0x3000 //RX_TDDRC_ALPHA_UP_4 +184 0x7FB0 //RX_TDDRC_ALPHA_DWN_1 +185 0x7FB0 //RX_TDDRC_ALPHA_DWN_2 +186 0x7FB0 //RX_TDDRC_ALPHA_DWN_3 +189 0x7FB0 //RX_TDDRC_ALPHA_DWN_4 +190 0xDA9E //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +269 0x0000 //RX_TDDRC_THRD_0 +270 0x0000 //RX_TDDRC_THRD_1 +271 0x0E80 //RX_TDDRC_THRD_2 +272 0x3800 //RX_TDDRC_THRD_3 +273 0x2A00 //RX_TDDRC_SLANT_0 +274 0x6E00 //RX_TDDRC_SLANT_1 +275 0x3000 //RX_TDDRC_ALPHA_UP_0 +276 0x7FB0 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x0000 //RX_TDDRC_HMNC_GAIN +279 0x0000 //RX_TDDRC_SMT_FLAG +280 0x0000 //RX_TDDRC_SMT_W +281 0x0100 //RX_TDDRC_DRC_GAIN +195 0x0020 //RX_FDEQ_SUBNUM +196 0x4848 //RX_FDEQ_GAIN_0 +197 0x4848 //RX_FDEQ_GAIN_1 +198 0x4848 //RX_FDEQ_GAIN_2 +199 0x4848 //RX_FDEQ_GAIN_3 +200 0x4848 //RX_FDEQ_GAIN_4 +201 0x4848 //RX_FDEQ_GAIN_5 +202 0x4848 //RX_FDEQ_GAIN_6 +203 0x4848 //RX_FDEQ_GAIN_7 +204 0x4848 //RX_FDEQ_GAIN_8 +205 0x4848 //RX_FDEQ_GAIN_9 +206 0x4848 //RX_FDEQ_GAIN_10 +207 0x4848 //RX_FDEQ_GAIN_11 +208 0x4848 //RX_FDEQ_GAIN_12 +209 0x4848 //RX_FDEQ_GAIN_13 +210 0x4848 //RX_FDEQ_GAIN_14 +211 0x4848 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0000 //RX_FDEQ_BIN_0 +221 0x0000 //RX_FDEQ_BIN_1 +222 0x0000 //RX_FDEQ_BIN_2 +223 0x0000 //RX_FDEQ_BIN_3 +224 0x0000 //RX_FDEQ_BIN_4 +225 0x0000 //RX_FDEQ_BIN_5 +226 0x0000 //RX_FDEQ_BIN_6 +227 0x0000 //RX_FDEQ_BIN_7 +228 0x0000 //RX_FDEQ_BIN_8 +229 0x0000 //RX_FDEQ_BIN_9 +230 0x0000 //RX_FDEQ_BIN_10 +231 0x0000 //RX_FDEQ_BIN_11 +232 0x0000 //RX_FDEQ_BIN_12 +233 0x0000 //RX_FDEQ_BIN_13 +234 0x0000 //RX_FDEQ_BIN_14 +235 0x0000 //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x0000 //RX_FDEQ_RESRV_0 +245 0x0000 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0030 //RX_FDDRC_BAND_MARGIN_1 +248 0x0050 //RX_FDDRC_BAND_MARGIN_2 +249 0x0080 //RX_FDDRC_BAND_MARGIN_3 +250 0x0004 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x5000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x6400 //RX_FDDRC_THRD_3_2 +258 0x6400 //RX_FDDRC_THRD_3_3 +259 0x2000 //RX_FDDRC_SLANT_0_0 +260 0x2000 //RX_FDDRC_SLANT_0_1 +261 0x2000 //RX_FDDRC_SLANT_0_2 +262 0x2000 //RX_FDDRC_SLANT_0_3 +263 0x2000 //RX_FDDRC_SLANT_1_0 +264 0x2000 //RX_FDDRC_SLANT_1_1 +265 0x2000 //RX_FDDRC_SLANT_1_2 +266 0x2000 //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +286 0x0100 //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 +#VOL 1 +163 0x3000 //RX_TDDRC_ALPHA_UP_1 +164 0x3000 //RX_TDDRC_ALPHA_UP_2 +165 0x3000 //RX_TDDRC_ALPHA_UP_3 +166 0x3000 //RX_TDDRC_ALPHA_UP_4 +184 0x7FB0 //RX_TDDRC_ALPHA_DWN_1 +185 0x7FB0 //RX_TDDRC_ALPHA_DWN_2 +186 0x7FB0 //RX_TDDRC_ALPHA_DWN_3 +189 0x7FB0 //RX_TDDRC_ALPHA_DWN_4 +190 0xDA9E //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +269 0x0000 //RX_TDDRC_THRD_0 +270 0x0000 //RX_TDDRC_THRD_1 +271 0x0E80 //RX_TDDRC_THRD_2 +272 0x3800 //RX_TDDRC_THRD_3 +273 0x2A00 //RX_TDDRC_SLANT_0 +274 0x6E00 //RX_TDDRC_SLANT_1 +275 0x3000 //RX_TDDRC_ALPHA_UP_0 +276 0x7FB0 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x0000 //RX_TDDRC_HMNC_GAIN +279 0x0000 //RX_TDDRC_SMT_FLAG +280 0x0000 //RX_TDDRC_SMT_W +281 0x0100 //RX_TDDRC_DRC_GAIN +195 0x0020 //RX_FDEQ_SUBNUM +196 0x4848 //RX_FDEQ_GAIN_0 +197 0x4848 //RX_FDEQ_GAIN_1 +198 0x4848 //RX_FDEQ_GAIN_2 +199 0x4848 //RX_FDEQ_GAIN_3 +200 0x4848 //RX_FDEQ_GAIN_4 +201 0x4848 //RX_FDEQ_GAIN_5 +202 0x4848 //RX_FDEQ_GAIN_6 +203 0x4848 //RX_FDEQ_GAIN_7 +204 0x4848 //RX_FDEQ_GAIN_8 +205 0x4848 //RX_FDEQ_GAIN_9 +206 0x4848 //RX_FDEQ_GAIN_10 +207 0x4848 //RX_FDEQ_GAIN_11 +208 0x4848 //RX_FDEQ_GAIN_12 +209 0x4848 //RX_FDEQ_GAIN_13 +210 0x4848 //RX_FDEQ_GAIN_14 +211 0x4848 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0000 //RX_FDEQ_BIN_0 +221 0x0000 //RX_FDEQ_BIN_1 +222 0x0000 //RX_FDEQ_BIN_2 +223 0x0000 //RX_FDEQ_BIN_3 +224 0x0000 //RX_FDEQ_BIN_4 +225 0x0000 //RX_FDEQ_BIN_5 +226 0x0000 //RX_FDEQ_BIN_6 +227 0x0000 //RX_FDEQ_BIN_7 +228 0x0000 //RX_FDEQ_BIN_8 +229 0x0000 //RX_FDEQ_BIN_9 +230 0x0000 //RX_FDEQ_BIN_10 +231 0x0000 //RX_FDEQ_BIN_11 +232 0x0000 //RX_FDEQ_BIN_12 +233 0x0000 //RX_FDEQ_BIN_13 +234 0x0000 //RX_FDEQ_BIN_14 +235 0x0000 //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x0000 //RX_FDEQ_RESRV_0 +245 0x0000 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0030 //RX_FDDRC_BAND_MARGIN_1 +248 0x0050 //RX_FDDRC_BAND_MARGIN_2 +249 0x0080 //RX_FDDRC_BAND_MARGIN_3 +250 0x0004 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x5000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x6400 //RX_FDDRC_THRD_3_2 +258 0x6400 //RX_FDDRC_THRD_3_3 +259 0x2000 //RX_FDDRC_SLANT_0_0 +260 0x2000 //RX_FDDRC_SLANT_0_1 +261 0x2000 //RX_FDDRC_SLANT_0_2 +262 0x2000 //RX_FDDRC_SLANT_0_3 +263 0x2000 //RX_FDDRC_SLANT_1_0 +264 0x2000 //RX_FDDRC_SLANT_1_1 +265 0x2000 //RX_FDDRC_SLANT_1_2 +266 0x2000 //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +286 0x0100 //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 +#VOL 2 +163 0x3000 //RX_TDDRC_ALPHA_UP_1 +164 0x3000 //RX_TDDRC_ALPHA_UP_2 +165 0x3000 //RX_TDDRC_ALPHA_UP_3 +166 0x3000 //RX_TDDRC_ALPHA_UP_4 +184 0x7FB0 //RX_TDDRC_ALPHA_DWN_1 +185 0x7FB0 //RX_TDDRC_ALPHA_DWN_2 +186 0x7FB0 //RX_TDDRC_ALPHA_DWN_3 +189 0x7FB0 //RX_TDDRC_ALPHA_DWN_4 +190 0xDA9E //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +269 0x0000 //RX_TDDRC_THRD_0 +270 0x0000 //RX_TDDRC_THRD_1 +271 0x0E80 //RX_TDDRC_THRD_2 +272 0x3800 //RX_TDDRC_THRD_3 +273 0x2A00 //RX_TDDRC_SLANT_0 +274 0x6E00 //RX_TDDRC_SLANT_1 +275 0x3000 //RX_TDDRC_ALPHA_UP_0 +276 0x7FB0 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x0000 //RX_TDDRC_HMNC_GAIN +279 0x0000 //RX_TDDRC_SMT_FLAG +280 0x0000 //RX_TDDRC_SMT_W +281 0x0100 //RX_TDDRC_DRC_GAIN +195 0x0020 //RX_FDEQ_SUBNUM +196 0x4848 //RX_FDEQ_GAIN_0 +197 0x4848 //RX_FDEQ_GAIN_1 +198 0x4848 //RX_FDEQ_GAIN_2 +199 0x4848 //RX_FDEQ_GAIN_3 +200 0x4848 //RX_FDEQ_GAIN_4 +201 0x4848 //RX_FDEQ_GAIN_5 +202 0x4848 //RX_FDEQ_GAIN_6 +203 0x4848 //RX_FDEQ_GAIN_7 +204 0x4848 //RX_FDEQ_GAIN_8 +205 0x4848 //RX_FDEQ_GAIN_9 +206 0x4848 //RX_FDEQ_GAIN_10 +207 0x4848 //RX_FDEQ_GAIN_11 +208 0x4848 //RX_FDEQ_GAIN_12 +209 0x4848 //RX_FDEQ_GAIN_13 +210 0x4848 //RX_FDEQ_GAIN_14 +211 0x4848 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0000 //RX_FDEQ_BIN_0 +221 0x0000 //RX_FDEQ_BIN_1 +222 0x0000 //RX_FDEQ_BIN_2 +223 0x0000 //RX_FDEQ_BIN_3 +224 0x0000 //RX_FDEQ_BIN_4 +225 0x0000 //RX_FDEQ_BIN_5 +226 0x0000 //RX_FDEQ_BIN_6 +227 0x0000 //RX_FDEQ_BIN_7 +228 0x0000 //RX_FDEQ_BIN_8 +229 0x0000 //RX_FDEQ_BIN_9 +230 0x0000 //RX_FDEQ_BIN_10 +231 0x0000 //RX_FDEQ_BIN_11 +232 0x0000 //RX_FDEQ_BIN_12 +233 0x0000 //RX_FDEQ_BIN_13 +234 0x0000 //RX_FDEQ_BIN_14 +235 0x0000 //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x0000 //RX_FDEQ_RESRV_0 +245 0x0000 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0030 //RX_FDDRC_BAND_MARGIN_1 +248 0x0050 //RX_FDDRC_BAND_MARGIN_2 +249 0x0080 //RX_FDDRC_BAND_MARGIN_3 +250 0x0004 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x5000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x6400 //RX_FDDRC_THRD_3_2 +258 0x6400 //RX_FDDRC_THRD_3_3 +259 0x2000 //RX_FDDRC_SLANT_0_0 +260 0x2000 //RX_FDDRC_SLANT_0_1 +261 0x2000 //RX_FDDRC_SLANT_0_2 +262 0x2000 //RX_FDDRC_SLANT_0_3 +263 0x2000 //RX_FDDRC_SLANT_1_0 +264 0x2000 //RX_FDDRC_SLANT_1_1 +265 0x2000 //RX_FDDRC_SLANT_1_2 +266 0x2000 //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +286 0x0100 //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 +#VOL 3 +163 0x3000 //RX_TDDRC_ALPHA_UP_1 +164 0x3000 //RX_TDDRC_ALPHA_UP_2 +165 0x3000 //RX_TDDRC_ALPHA_UP_3 +166 0x3000 //RX_TDDRC_ALPHA_UP_4 +184 0x7FB0 //RX_TDDRC_ALPHA_DWN_1 +185 0x7FB0 //RX_TDDRC_ALPHA_DWN_2 +186 0x7FB0 //RX_TDDRC_ALPHA_DWN_3 +189 0x7FB0 //RX_TDDRC_ALPHA_DWN_4 +190 0xDA9E //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +269 0x0000 //RX_TDDRC_THRD_0 +270 0x0000 //RX_TDDRC_THRD_1 +271 0x0E80 //RX_TDDRC_THRD_2 +272 0x3800 //RX_TDDRC_THRD_3 +273 0x2A00 //RX_TDDRC_SLANT_0 +274 0x6E00 //RX_TDDRC_SLANT_1 +275 0x3000 //RX_TDDRC_ALPHA_UP_0 +276 0x7FB0 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x0000 //RX_TDDRC_HMNC_GAIN +279 0x0000 //RX_TDDRC_SMT_FLAG +280 0x0000 //RX_TDDRC_SMT_W +281 0x0100 //RX_TDDRC_DRC_GAIN +195 0x0020 //RX_FDEQ_SUBNUM +196 0x4848 //RX_FDEQ_GAIN_0 +197 0x4848 //RX_FDEQ_GAIN_1 +198 0x4848 //RX_FDEQ_GAIN_2 +199 0x4848 //RX_FDEQ_GAIN_3 +200 0x4848 //RX_FDEQ_GAIN_4 +201 0x4848 //RX_FDEQ_GAIN_5 +202 0x4848 //RX_FDEQ_GAIN_6 +203 0x4848 //RX_FDEQ_GAIN_7 +204 0x4848 //RX_FDEQ_GAIN_8 +205 0x4848 //RX_FDEQ_GAIN_9 +206 0x4848 //RX_FDEQ_GAIN_10 +207 0x4848 //RX_FDEQ_GAIN_11 +208 0x4848 //RX_FDEQ_GAIN_12 +209 0x4848 //RX_FDEQ_GAIN_13 +210 0x4848 //RX_FDEQ_GAIN_14 +211 0x4848 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0000 //RX_FDEQ_BIN_0 +221 0x0000 //RX_FDEQ_BIN_1 +222 0x0000 //RX_FDEQ_BIN_2 +223 0x0000 //RX_FDEQ_BIN_3 +224 0x0000 //RX_FDEQ_BIN_4 +225 0x0000 //RX_FDEQ_BIN_5 +226 0x0000 //RX_FDEQ_BIN_6 +227 0x0000 //RX_FDEQ_BIN_7 +228 0x0000 //RX_FDEQ_BIN_8 +229 0x0000 //RX_FDEQ_BIN_9 +230 0x0000 //RX_FDEQ_BIN_10 +231 0x0000 //RX_FDEQ_BIN_11 +232 0x0000 //RX_FDEQ_BIN_12 +233 0x0000 //RX_FDEQ_BIN_13 +234 0x0000 //RX_FDEQ_BIN_14 +235 0x0000 //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x0000 //RX_FDEQ_RESRV_0 +245 0x0000 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0030 //RX_FDDRC_BAND_MARGIN_1 +248 0x0050 //RX_FDDRC_BAND_MARGIN_2 +249 0x0080 //RX_FDDRC_BAND_MARGIN_3 +250 0x0004 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x5000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x6400 //RX_FDDRC_THRD_3_2 +258 0x6400 //RX_FDDRC_THRD_3_3 +259 0x2000 //RX_FDDRC_SLANT_0_0 +260 0x2000 //RX_FDDRC_SLANT_0_1 +261 0x2000 //RX_FDDRC_SLANT_0_2 +262 0x2000 //RX_FDDRC_SLANT_0_3 +263 0x2000 //RX_FDDRC_SLANT_1_0 +264 0x2000 //RX_FDDRC_SLANT_1_1 +265 0x2000 //RX_FDDRC_SLANT_1_2 +266 0x2000 //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +286 0x0100 //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 +#VOL 4 +163 0x3000 //RX_TDDRC_ALPHA_UP_1 +164 0x3000 //RX_TDDRC_ALPHA_UP_2 +165 0x3000 //RX_TDDRC_ALPHA_UP_3 +166 0x3000 //RX_TDDRC_ALPHA_UP_4 +184 0x7FB0 //RX_TDDRC_ALPHA_DWN_1 +185 0x7FB0 //RX_TDDRC_ALPHA_DWN_2 +186 0x7FB0 //RX_TDDRC_ALPHA_DWN_3 +189 0x7FB0 //RX_TDDRC_ALPHA_DWN_4 +190 0xDA9E //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +269 0x0000 //RX_TDDRC_THRD_0 +270 0x0000 //RX_TDDRC_THRD_1 +271 0x0E80 //RX_TDDRC_THRD_2 +272 0x3800 //RX_TDDRC_THRD_3 +273 0x2A00 //RX_TDDRC_SLANT_0 +274 0x6E00 //RX_TDDRC_SLANT_1 +275 0x3000 //RX_TDDRC_ALPHA_UP_0 +276 0x7FB0 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x0000 //RX_TDDRC_HMNC_GAIN +279 0x0000 //RX_TDDRC_SMT_FLAG +280 0x0000 //RX_TDDRC_SMT_W +281 0x0100 //RX_TDDRC_DRC_GAIN +195 0x0020 //RX_FDEQ_SUBNUM +196 0x4848 //RX_FDEQ_GAIN_0 +197 0x4848 //RX_FDEQ_GAIN_1 +198 0x4848 //RX_FDEQ_GAIN_2 +199 0x4848 //RX_FDEQ_GAIN_3 +200 0x4848 //RX_FDEQ_GAIN_4 +201 0x4848 //RX_FDEQ_GAIN_5 +202 0x4848 //RX_FDEQ_GAIN_6 +203 0x4848 //RX_FDEQ_GAIN_7 +204 0x4848 //RX_FDEQ_GAIN_8 +205 0x4848 //RX_FDEQ_GAIN_9 +206 0x4848 //RX_FDEQ_GAIN_10 +207 0x4848 //RX_FDEQ_GAIN_11 +208 0x4848 //RX_FDEQ_GAIN_12 +209 0x4848 //RX_FDEQ_GAIN_13 +210 0x4848 //RX_FDEQ_GAIN_14 +211 0x4848 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0000 //RX_FDEQ_BIN_0 +221 0x0000 //RX_FDEQ_BIN_1 +222 0x0000 //RX_FDEQ_BIN_2 +223 0x0000 //RX_FDEQ_BIN_3 +224 0x0000 //RX_FDEQ_BIN_4 +225 0x0000 //RX_FDEQ_BIN_5 +226 0x0000 //RX_FDEQ_BIN_6 +227 0x0000 //RX_FDEQ_BIN_7 +228 0x0000 //RX_FDEQ_BIN_8 +229 0x0000 //RX_FDEQ_BIN_9 +230 0x0000 //RX_FDEQ_BIN_10 +231 0x0000 //RX_FDEQ_BIN_11 +232 0x0000 //RX_FDEQ_BIN_12 +233 0x0000 //RX_FDEQ_BIN_13 +234 0x0000 //RX_FDEQ_BIN_14 +235 0x0000 //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x0000 //RX_FDEQ_RESRV_0 +245 0x0000 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0030 //RX_FDDRC_BAND_MARGIN_1 +248 0x0050 //RX_FDDRC_BAND_MARGIN_2 +249 0x0080 //RX_FDDRC_BAND_MARGIN_3 +250 0x0004 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x5000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x6400 //RX_FDDRC_THRD_3_2 +258 0x6400 //RX_FDDRC_THRD_3_3 +259 0x2000 //RX_FDDRC_SLANT_0_0 +260 0x2000 //RX_FDDRC_SLANT_0_1 +261 0x2000 //RX_FDDRC_SLANT_0_2 +262 0x2000 //RX_FDDRC_SLANT_0_3 +263 0x2000 //RX_FDDRC_SLANT_1_0 +264 0x2000 //RX_FDDRC_SLANT_1_1 +265 0x2000 //RX_FDDRC_SLANT_1_2 +266 0x2000 //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +286 0x0100 //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 +#VOL 5 +163 0x3000 //RX_TDDRC_ALPHA_UP_1 +164 0x3000 //RX_TDDRC_ALPHA_UP_2 +165 0x3000 //RX_TDDRC_ALPHA_UP_3 +166 0x3000 //RX_TDDRC_ALPHA_UP_4 +184 0x7FB0 //RX_TDDRC_ALPHA_DWN_1 +185 0x7FB0 //RX_TDDRC_ALPHA_DWN_2 +186 0x7FB0 //RX_TDDRC_ALPHA_DWN_3 +189 0x7FB0 //RX_TDDRC_ALPHA_DWN_4 +190 0xDA9E //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +269 0x0000 //RX_TDDRC_THRD_0 +270 0x0000 //RX_TDDRC_THRD_1 +271 0x0E80 //RX_TDDRC_THRD_2 +272 0x3800 //RX_TDDRC_THRD_3 +273 0x2A00 //RX_TDDRC_SLANT_0 +274 0x6E00 //RX_TDDRC_SLANT_1 +275 0x3000 //RX_TDDRC_ALPHA_UP_0 +276 0x7FB0 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x0000 //RX_TDDRC_HMNC_GAIN +279 0x0000 //RX_TDDRC_SMT_FLAG +280 0x0000 //RX_TDDRC_SMT_W +281 0x0100 //RX_TDDRC_DRC_GAIN +195 0x0020 //RX_FDEQ_SUBNUM +196 0x4848 //RX_FDEQ_GAIN_0 +197 0x4848 //RX_FDEQ_GAIN_1 +198 0x4848 //RX_FDEQ_GAIN_2 +199 0x4848 //RX_FDEQ_GAIN_3 +200 0x4848 //RX_FDEQ_GAIN_4 +201 0x4848 //RX_FDEQ_GAIN_5 +202 0x4848 //RX_FDEQ_GAIN_6 +203 0x4848 //RX_FDEQ_GAIN_7 +204 0x4848 //RX_FDEQ_GAIN_8 +205 0x4848 //RX_FDEQ_GAIN_9 +206 0x4848 //RX_FDEQ_GAIN_10 +207 0x4848 //RX_FDEQ_GAIN_11 +208 0x4848 //RX_FDEQ_GAIN_12 +209 0x4848 //RX_FDEQ_GAIN_13 +210 0x4848 //RX_FDEQ_GAIN_14 +211 0x4848 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0000 //RX_FDEQ_BIN_0 +221 0x0000 //RX_FDEQ_BIN_1 +222 0x0000 //RX_FDEQ_BIN_2 +223 0x0000 //RX_FDEQ_BIN_3 +224 0x0000 //RX_FDEQ_BIN_4 +225 0x0000 //RX_FDEQ_BIN_5 +226 0x0000 //RX_FDEQ_BIN_6 +227 0x0000 //RX_FDEQ_BIN_7 +228 0x0000 //RX_FDEQ_BIN_8 +229 0x0000 //RX_FDEQ_BIN_9 +230 0x0000 //RX_FDEQ_BIN_10 +231 0x0000 //RX_FDEQ_BIN_11 +232 0x0000 //RX_FDEQ_BIN_12 +233 0x0000 //RX_FDEQ_BIN_13 +234 0x0000 //RX_FDEQ_BIN_14 +235 0x0000 //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x0000 //RX_FDEQ_RESRV_0 +245 0x0000 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0030 //RX_FDDRC_BAND_MARGIN_1 +248 0x0050 //RX_FDDRC_BAND_MARGIN_2 +249 0x0080 //RX_FDDRC_BAND_MARGIN_3 +250 0x0004 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x5000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x6400 //RX_FDDRC_THRD_3_2 +258 0x6400 //RX_FDDRC_THRD_3_3 +259 0x2000 //RX_FDDRC_SLANT_0_0 +260 0x2000 //RX_FDDRC_SLANT_0_1 +261 0x2000 //RX_FDDRC_SLANT_0_2 +262 0x2000 //RX_FDDRC_SLANT_0_3 +263 0x2000 //RX_FDDRC_SLANT_1_0 +264 0x2000 //RX_FDDRC_SLANT_1_1 +265 0x2000 //RX_FDDRC_SLANT_1_2 +266 0x2000 //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +286 0x0100 //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 +#VOL 6 +163 0x3000 //RX_TDDRC_ALPHA_UP_1 +164 0x3000 //RX_TDDRC_ALPHA_UP_2 +165 0x3000 //RX_TDDRC_ALPHA_UP_3 +166 0x3000 //RX_TDDRC_ALPHA_UP_4 +184 0x7FB0 //RX_TDDRC_ALPHA_DWN_1 +185 0x7FB0 //RX_TDDRC_ALPHA_DWN_2 +186 0x7FB0 //RX_TDDRC_ALPHA_DWN_3 +189 0x7FB0 //RX_TDDRC_ALPHA_DWN_4 +190 0xDA9E //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +269 0x0000 //RX_TDDRC_THRD_0 +270 0x0000 //RX_TDDRC_THRD_1 +271 0x0E80 //RX_TDDRC_THRD_2 +272 0x3800 //RX_TDDRC_THRD_3 +273 0x2A00 //RX_TDDRC_SLANT_0 +274 0x6E00 //RX_TDDRC_SLANT_1 +275 0x3000 //RX_TDDRC_ALPHA_UP_0 +276 0x7FB0 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x0000 //RX_TDDRC_HMNC_GAIN +279 0x0000 //RX_TDDRC_SMT_FLAG +280 0x0000 //RX_TDDRC_SMT_W +281 0x0100 //RX_TDDRC_DRC_GAIN +195 0x0020 //RX_FDEQ_SUBNUM +196 0x4848 //RX_FDEQ_GAIN_0 +197 0x4848 //RX_FDEQ_GAIN_1 +198 0x4848 //RX_FDEQ_GAIN_2 +199 0x4848 //RX_FDEQ_GAIN_3 +200 0x4848 //RX_FDEQ_GAIN_4 +201 0x4848 //RX_FDEQ_GAIN_5 +202 0x4848 //RX_FDEQ_GAIN_6 +203 0x4848 //RX_FDEQ_GAIN_7 +204 0x4848 //RX_FDEQ_GAIN_8 +205 0x4848 //RX_FDEQ_GAIN_9 +206 0x4848 //RX_FDEQ_GAIN_10 +207 0x4848 //RX_FDEQ_GAIN_11 +208 0x4848 //RX_FDEQ_GAIN_12 +209 0x4848 //RX_FDEQ_GAIN_13 +210 0x4848 //RX_FDEQ_GAIN_14 +211 0x4848 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0000 //RX_FDEQ_BIN_0 +221 0x0000 //RX_FDEQ_BIN_1 +222 0x0000 //RX_FDEQ_BIN_2 +223 0x0000 //RX_FDEQ_BIN_3 +224 0x0000 //RX_FDEQ_BIN_4 +225 0x0000 //RX_FDEQ_BIN_5 +226 0x0000 //RX_FDEQ_BIN_6 +227 0x0000 //RX_FDEQ_BIN_7 +228 0x0000 //RX_FDEQ_BIN_8 +229 0x0000 //RX_FDEQ_BIN_9 +230 0x0000 //RX_FDEQ_BIN_10 +231 0x0000 //RX_FDEQ_BIN_11 +232 0x0000 //RX_FDEQ_BIN_12 +233 0x0000 //RX_FDEQ_BIN_13 +234 0x0000 //RX_FDEQ_BIN_14 +235 0x0000 //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x0000 //RX_FDEQ_RESRV_0 +245 0x0000 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0030 //RX_FDDRC_BAND_MARGIN_1 +248 0x0050 //RX_FDDRC_BAND_MARGIN_2 +249 0x0080 //RX_FDDRC_BAND_MARGIN_3 +250 0x0004 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x5000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x6400 //RX_FDDRC_THRD_3_2 +258 0x6400 //RX_FDDRC_THRD_3_3 +259 0x2000 //RX_FDDRC_SLANT_0_0 +260 0x2000 //RX_FDDRC_SLANT_0_1 +261 0x2000 //RX_FDDRC_SLANT_0_2 +262 0x2000 //RX_FDDRC_SLANT_0_3 +263 0x2000 //RX_FDDRC_SLANT_1_0 +264 0x2000 //RX_FDDRC_SLANT_1_1 +265 0x2000 //RX_FDDRC_SLANT_1_2 +266 0x2000 //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +286 0x0100 //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 #CASE_NAME HEADSET-TTY_VCO-VOICE_GENERIC-SWB -#PARAM_MODE FULL -#PARAM_TYPE TX+RX -#TOTAL_CUSTOM_STEP 7 +#PARAM_MODE Full +#PARAM_TYPE TX+2RX +#TOTAL_CUSTOM_STEP 7+7 #TX 0 0x0001 //TX_OPERATION_MODE_0 1 0x0001 //TX_OPERATION_MODE_1 2 0x0033 //TX_PATCH_REG -3 0x2F7C //TX_SENDFUNC_MODE_0 +3 0x6F7C //TX_SENDFUNC_MODE_0 4 0x0001 //TX_SENDFUNC_MODE_1 -5 0x0003 //TX_NUM_MIC +5 0x0002 //TX_NUM_MIC 6 0x0003 //TX_SAMPLINGFREQ_SIG 7 0x0003 //TX_SAMPLINGFREQ_PROC 8 0x000A //TX_FRAME_SZ_SIG @@ -45633,8 +69449,8 @@ 18 0x0000 //TX_SYS_RESRV_2 19 0x0000 //TX_SYS_RESRV_3 20 0x0000 //TX_DIST2REF0 -21 0x00A4 //TX_DIST2REF1 -22 0x0017 //TX_DIST2REF_02 +21 0x009D //TX_DIST2REF1 +22 0x0010 //TX_DIST2REF_02 23 0x0000 //TX_DIST2REF_03 24 0x0000 //TX_DIST2REF_04 25 0x0000 //TX_DIST2REF_05 @@ -45740,7 +69556,7 @@ 125 0x6000 //TX_C_POST_FLT_MIC_MAINBLK 126 0x6000 //TX_C_POST_FLT_MIC_REFBLK 127 0x0010 //TX_MIC_BLOCK_N -128 0x7B02 //TX_A_HP +128 0x7D83 //TX_A_HP 129 0x4000 //TX_B_PE 130 0x5000 //TX_THR_PITCH_DET_0 131 0x4800 //TX_THR_PITCH_DET_1 @@ -45777,8 +69593,8 @@ 162 0x7800 //TX_MIN_EQ_RE_EST_10 163 0x7800 //TX_MIN_EQ_RE_EST_11 164 0x7800 //TX_MIN_EQ_RE_EST_12 -165 0x4000 //TX_LAMBDA_RE_EST -166 0x3000 //TX_LAMBDA_CB_NLE +165 0x0880 //TX_LAMBDA_RE_EST +166 0x7FFF //TX_LAMBDA_CB_NLE 167 0x7FFF //TX_C_POST_FLT 168 0x4000 //TX_GAIN_NP 169 0x0180 //TX_SE_HOLD_N @@ -45837,16 +69653,16 @@ 222 0x023E //TX_ADPT_STRICT_H 223 0x0BB8 //TX_RATIO_DT_L_TH_LOW 224 0x3A98 //TX_RATIO_DT_H_TH_LOW -225 0x1F40 //TX_RATIO_DT_L_TH_HIGH -226 0x6590 //TX_RATIO_DT_H_TH_HIGH +225 0x1770 //TX_RATIO_DT_L_TH_HIGH +226 0x733C //TX_RATIO_DT_H_TH_HIGH 227 0x09C4 //TX_RATIO_DT_L0_TH -228 0x2000 //TX_B_POST_FILT_ECHO_L -229 0x1000 //TX_B_POST_FILT_ECHO_H +228 0x7FFF //TX_B_POST_FILT_ECHO_L +229 0x7FFF //TX_B_POST_FILT_ECHO_H 230 0x0200 //TX_MIN_G_CTRL_ECHO 231 0x1000 //TX_B_LESSCUT_RTO_ECHO 232 0x0000 //TX_EPD_OFFSET_00 233 0x0000 //TX_EPD_OFFST_01 -234 0x2328 //TX_RATIO_DT_L0_TH_HIGH +234 0x3A98 //TX_RATIO_DT_L0_TH_HIGH 235 0x7FFF //TX_RATIO_DT_H_TH_CUT 236 0x7FFF //TX_MIN_EQ_RE_EST_13 237 0x0000 //TX_DTD_THR1_7 @@ -45854,7 +69670,7 @@ 239 0x0800 //TX_DT_RESRV_7 240 0x0800 //TX_DT_RESRV_8 241 0x0000 //TX_DT_RESRV_9 -242 0xF800 //TX_THR_SN_EST_0 +242 0xFA00 //TX_THR_SN_EST_0 243 0xFA00 //TX_THR_SN_EST_1 244 0xFA00 //TX_THR_SN_EST_2 245 0xFA00 //TX_THR_SN_EST_3 @@ -45865,10 +69681,10 @@ 250 0x0100 //TX_DELTA_THR_SN_EST_0 251 0x0100 //TX_DELTA_THR_SN_EST_1 252 0x0100 //TX_DELTA_THR_SN_EST_2 -253 0x0100 //TX_DELTA_THR_SN_EST_3 -254 0x0000 //TX_DELTA_THR_SN_EST_4 -255 0x0100 //TX_DELTA_THR_SN_EST_5 -256 0x0200 //TX_DELTA_THR_SN_EST_6 +253 0x0000 //TX_DELTA_THR_SN_EST_3 +254 0x0100 //TX_DELTA_THR_SN_EST_4 +255 0x0200 //TX_DELTA_THR_SN_EST_5 +256 0x0100 //TX_DELTA_THR_SN_EST_6 257 0x0200 //TX_DELTA_THR_SN_EST_7 258 0x4000 //TX_LAMBDA_NN_EST_0 259 0x4000 //TX_LAMBDA_NN_EST_1 @@ -45895,11 +69711,11 @@ 280 0x1000 //TX_B_POST_FLT_1 281 0x0010 //TX_NS_LVL_CTRL_0 282 0x003C //TX_NS_LVL_CTRL_1 -283 0x003C //TX_NS_LVL_CTRL_2 -284 0x0024 //TX_NS_LVL_CTRL_3 -285 0x003C //TX_NS_LVL_CTRL_4 -286 0x0014 //TX_NS_LVL_CTRL_5 -287 0x0011 //TX_NS_LVL_CTRL_6 +283 0x0024 //TX_NS_LVL_CTRL_2 +284 0x003C //TX_NS_LVL_CTRL_3 +285 0x0014 //TX_NS_LVL_CTRL_4 +286 0x0011 //TX_NS_LVL_CTRL_5 +287 0x003C //TX_NS_LVL_CTRL_6 288 0x0011 //TX_NS_LVL_CTRL_7 289 0x000F //TX_MIN_GAIN_S_0 290 0x0010 //TX_MIN_GAIN_S_1 @@ -45915,10 +69731,10 @@ 300 0x7FFF //TX_SNRI_SUP_0 301 0x1400 //TX_SNRI_SUP_1 302 0x1400 //TX_SNRI_SUP_2 -303 0x1400 //TX_SNRI_SUP_3 +303 0x4000 //TX_SNRI_SUP_3 304 0x4000 //TX_SNRI_SUP_4 -305 0x4000 //TX_SNRI_SUP_5 -306 0x50C0 //TX_SNRI_SUP_6 +305 0x50C0 //TX_SNRI_SUP_5 +306 0x1400 //TX_SNRI_SUP_6 307 0x7FFF //TX_SNRI_SUP_7 308 0x7FFF //TX_THR_LFNS 309 0x0018 //TX_G_LFNS @@ -45927,19 +69743,19 @@ 312 0x7FFF //TX_A_POST_FILT_0 313 0x2000 //TX_A_POST_FILT_1 314 0x5000 //TX_A_POST_FILT_S_0 -315 0x7C00 //TX_A_POST_FILT_S_1 -316 0x4C00 //TX_A_POST_FILT_S_2 -317 0x4000 //TX_A_POST_FILT_S_3 -318 0x6000 //TX_A_POST_FILT_S_4 -319 0x4000 //TX_A_POST_FILT_S_5 -320 0x5000 //TX_A_POST_FILT_S_6 +315 0x4C00 //TX_A_POST_FILT_S_1 +316 0x4000 //TX_A_POST_FILT_S_2 +317 0x6000 //TX_A_POST_FILT_S_3 +318 0x4000 //TX_A_POST_FILT_S_4 +319 0x5000 //TX_A_POST_FILT_S_5 +320 0x7C00 //TX_A_POST_FILT_S_6 321 0x7000 //TX_A_POST_FILT_S_7 322 0x2000 //TX_B_POST_FILT_0 -323 0x1000 //TX_B_POST_FILT_1 +323 0x6000 //TX_B_POST_FILT_1 324 0x6000 //TX_B_POST_FILT_2 325 0x6000 //TX_B_POST_FILT_3 -326 0x6000 //TX_B_POST_FILT_4 -327 0x4000 //TX_B_POST_FILT_5 +326 0x4000 //TX_B_POST_FILT_4 +327 0x1000 //TX_B_POST_FILT_5 328 0x1000 //TX_B_POST_FILT_6 329 0x2000 //TX_B_POST_FILT_7 330 0x4000 //TX_B_LESSCUT_RTO_S_0 @@ -45947,8 +69763,8 @@ 332 0x7FFF //TX_B_LESSCUT_RTO_S_2 333 0x7FFF //TX_B_LESSCUT_RTO_S_3 334 0x7FFF //TX_B_LESSCUT_RTO_S_4 -335 0x7FFF //TX_B_LESSCUT_RTO_S_5 -336 0x6000 //TX_B_LESSCUT_RTO_S_6 +335 0x6000 //TX_B_LESSCUT_RTO_S_5 +336 0x7FFF //TX_B_LESSCUT_RTO_S_6 337 0x7FFF //TX_B_LESSCUT_RTO_S_7 338 0x7C00 //TX_LAMBDA_PFILT 339 0x7D00 //TX_LAMBDA_PFILT_S_0 @@ -45979,7 +69795,7 @@ 364 0x0000 //TX_K_APT 365 0x0001 //TX_NOISEDET 366 0x0064 //TX_NDETCT -367 0x0050 //TX_NOISE_TH_0 +367 0x0383 //TX_NOISE_TH_0 368 0x7FFF //TX_NOISE_TH_0_2 369 0x7FFF //TX_NOISE_TH_0_3 370 0x07D0 //TX_NOISE_TH_1 @@ -45991,11 +69807,11 @@ 376 0x0000 //TX_NOISE_TH_5_3 377 0x7FFF //TX_NOISE_TH_5_4 378 0x0DAC //TX_NOISE_TH_6 -379 0x0050 //TX_MINENOISE_TH -380 0x4000 //TX_MINENOISE_MIC0_TH_MTS -381 0xFFEE //TX_MINENOISE_MIC0_TH_EXP -382 0x6000 //TX_MINENOISE_MIC0_S_TH_MTS -383 0xFFF3 //TX_MINENOISE_MIC0_S_TH_EXP +379 0x044C //TX_MINENOISE_TH +380 0xD508 //TX_MORENS_TFMASK_TH +381 0x0001 //TX_DRC_QUIET_FLOOR +382 0x3A98 //TX_RATIODTL_CUT_TH +383 0x0DAC //TX_DT_CUT_K1 384 0x0666 //TX_OUT_ENER_S_TH_CLEAN 385 0x0666 //TX_OUT_ENER_S_TH_LESSCLEAN 386 0x0333 //TX_OUT_ENER_S_TH_NOISY @@ -46003,22 +69819,22 @@ 388 0x0333 //TX_OUT_ENER_TH_SPEECH 389 0x2000 //TX_SN_NPB_GAIN 390 0x0000 //TX_NN_NPB_GAIN -391 0x0000 //TX_CSX_ALPHA_0 -392 0x0000 //TX_CSX_ALPHA_1 -393 0x0000 //TX_CSX_ALPHA_2 -394 0x0000 //TX_CSX_ALPHA_3 -395 0x0800 //TX_MU_ARSP_EST -396 0x00C8 //TX_P_OUTBEAM_MIN_TH +391 0x7FFF //TX_POST_MASK_SUP_HSNE +392 0x1388 //TX_TAIL_DET_TH +393 0x4000 //TX_B_LESSCUT_RTO_WTA +394 0x0000 //TX_MEL_G_R +395 0x0080 //TX_SUPHIGH_TH +396 0x0000 //TX_MASK_G_R 397 0x0002 //TX_EXTRA_NS_L -398 0x0800 //TX_EXTRA_NS_A -399 0x0005 //TX_VR_NOISE_FLOOR_TH +398 0x1800 //TX_C_POST_FLT_MASK +399 0x7FFF //TX_A_POST_FLT_WNS 400 0x0148 //TX_MIN_G_LOW300HZ -401 0x0001 //TX_MAXLEVEL_CNG +401 0x0004 //TX_MAXLEVEL_CNG 402 0x00B4 //TX_STN_NOISE_TH 403 0x4000 //TX_POST_MASK_SUP 404 0x7FFF //TX_POST_MASK_ADJUST 405 0x00C8 //TX_NS_ENOISE_MIC0_TH -406 0x0050 //TX_MINENOISE_MIC0_TH +406 0x02F3 //TX_MINENOISE_MIC0_TH 407 0x012C //TX_MINENOISE_MIC0_S_TH 408 0x4000 //TX_MIN_G_CTRL_SSNS 409 0x0000 //TX_METAL_RTO_THR @@ -46126,16 +69942,16 @@ 511 0x6666 //TX_MIC_TO_BFGAIN 512 0x0000 //TX_MICTOBFGAIN0 513 0x0000 //TX_FASTMUE_TH -514 0x0000 //TX_DERVB_LEN_0 -515 0x0000 //TX_DERVB_LEN_1 -516 0x0000 //TX_RHO_DERVB -517 0x0000 //TX_MIC_INDX_DERVB -518 0x0000 //TX_MU_DERVB -519 0x0000 //TX_DR_RESRV_0 -520 0x0000 //TX_DR_RESRV_1 -521 0x0000 //TX_DR_RESRV_2 -522 0x0000 //TX_DR_RESRV_3 -523 0x0000 //TX_DR_RESRV_4 +514 0xC000 //TX_DEREVERB_LF_MU +515 0xC000 //TX_DEREVERB_HF_MU +516 0xCCCC //TX_DEREVERB_DELAY +517 0xD999 //TX_DEREVERB_COEF_LEN +518 0x1F40 //TX_DEREVERB_DNR +519 0x0000 //TX_DEREVERB_ALPHA +520 0x0000 //TX_DEREVERB_BETA +521 0x0000 //TX_GSC_RTOL_TH +522 0x7000 //TX_GSC_RTOH_TH +523 0x0064 //TX_WIDE2_MEANHTH 524 0x0000 //TX_DR_RESRV_5 525 0x0000 //TX_DR_RESRV_6 526 0x0000 //TX_DR_RESRV_7 @@ -46179,22 +69995,22 @@ 564 0x0000 //TX_PB_RESRV_0 565 0x0000 //TX_PB_RESRV_1 566 0x0020 //TX_FDEQ_SUBNUM -567 0x4848 //TX_FDEQ_GAIN_0 -568 0x4848 //TX_FDEQ_GAIN_1 +567 0x5450 //TX_FDEQ_GAIN_0 +568 0x4C48 //TX_FDEQ_GAIN_1 569 0x4850 //TX_FDEQ_GAIN_2 570 0x5050 //TX_FDEQ_GAIN_3 571 0x4848 //TX_FDEQ_GAIN_4 -572 0x484A //TX_FDEQ_GAIN_5 +572 0x484E //TX_FDEQ_GAIN_5 573 0x4E5E //TX_FDEQ_GAIN_6 -574 0x5C4C //TX_FDEQ_GAIN_7 +574 0x584E //TX_FDEQ_GAIN_7 575 0x4C4E //TX_FDEQ_GAIN_8 -576 0x4844 //TX_FDEQ_GAIN_9 -577 0x4448 //TX_FDEQ_GAIN_10 -578 0x4850 //TX_FDEQ_GAIN_11 -579 0x5C6A //TX_FDEQ_GAIN_12 -580 0x5A84 //TX_FDEQ_GAIN_13 -581 0x7880 //TX_FDEQ_GAIN_14 -582 0x7F7F //TX_FDEQ_GAIN_15 +576 0x564E //TX_FDEQ_GAIN_9 +577 0x5058 //TX_FDEQ_GAIN_10 +578 0x625C //TX_FDEQ_GAIN_11 +579 0x6C6C //TX_FDEQ_GAIN_12 +580 0x7086 //TX_FDEQ_GAIN_13 +581 0x869C //TX_FDEQ_GAIN_14 +582 0xB0B0 //TX_FDEQ_GAIN_15 583 0x4848 //TX_FDEQ_GAIN_16 584 0x4848 //TX_FDEQ_GAIN_17 585 0x4848 //TX_FDEQ_GAIN_18 @@ -46218,7 +70034,7 @@ 603 0x1B1E //TX_FDEQ_BIN_12 604 0x1E1E //TX_FDEQ_BIN_13 605 0x1E28 //TX_FDEQ_BIN_14 -606 0x282C //TX_FDEQ_BIN_15 +606 0x284A //TX_FDEQ_BIN_15 607 0x0000 //TX_FDEQ_BIN_16 608 0x0000 //TX_FDEQ_BIN_17 609 0x0000 //TX_FDEQ_BIN_18 @@ -46236,15 +70052,15 @@ 621 0x4848 //TX_PREEQ_GAIN_MIC0_4 622 0x4848 //TX_PREEQ_GAIN_MIC0_5 623 0x4848 //TX_PREEQ_GAIN_MIC0_6 -624 0x484A //TX_PREEQ_GAIN_MIC0_7 -625 0x4C4E //TX_PREEQ_GAIN_MIC0_8 -626 0x5054 //TX_PREEQ_GAIN_MIC0_9 -627 0x5658 //TX_PREEQ_GAIN_MIC0_10 -628 0x5C5C //TX_PREEQ_GAIN_MIC0_11 -629 0x6474 //TX_PREEQ_GAIN_MIC0_12 -630 0x7870 //TX_PREEQ_GAIN_MIC0_13 -631 0x5C48 //TX_PREEQ_GAIN_MIC0_14 -632 0x383C //TX_PREEQ_GAIN_MIC0_15 +624 0x4848 //TX_PREEQ_GAIN_MIC0_7 +625 0x494A //TX_PREEQ_GAIN_MIC0_8 +626 0x4B4C //TX_PREEQ_GAIN_MIC0_9 +627 0x4B4A //TX_PREEQ_GAIN_MIC0_10 +628 0x484B //TX_PREEQ_GAIN_MIC0_11 +629 0x4C4C //TX_PREEQ_GAIN_MIC0_12 +630 0x4B48 //TX_PREEQ_GAIN_MIC0_13 +631 0x3838 //TX_PREEQ_GAIN_MIC0_14 +632 0x3835 //TX_PREEQ_GAIN_MIC0_15 633 0x4848 //TX_PREEQ_GAIN_MIC0_16 634 0x4848 //TX_PREEQ_GAIN_MIC0_17 635 0x4848 //TX_PREEQ_GAIN_MIC0_18 @@ -46285,15 +70101,15 @@ 670 0x4848 //TX_PREEQ_GAIN_MIC1_4 671 0x4848 //TX_PREEQ_GAIN_MIC1_5 672 0x4848 //TX_PREEQ_GAIN_MIC1_6 -673 0x4848 //TX_PREEQ_GAIN_MIC1_7 -674 0x4848 //TX_PREEQ_GAIN_MIC1_8 -675 0x4848 //TX_PREEQ_GAIN_MIC1_9 -676 0x4848 //TX_PREEQ_GAIN_MIC1_10 -677 0x4848 //TX_PREEQ_GAIN_MIC1_11 -678 0x4848 //TX_PREEQ_GAIN_MIC1_12 -679 0x4848 //TX_PREEQ_GAIN_MIC1_13 -680 0x4848 //TX_PREEQ_GAIN_MIC1_14 -681 0x4848 //TX_PREEQ_GAIN_MIC1_15 +673 0x4846 //TX_PREEQ_GAIN_MIC1_7 +674 0x4544 //TX_PREEQ_GAIN_MIC1_8 +675 0x4241 //TX_PREEQ_GAIN_MIC1_9 +676 0x403E //TX_PREEQ_GAIN_MIC1_10 +677 0x3D3C //TX_PREEQ_GAIN_MIC1_11 +678 0x3C3C //TX_PREEQ_GAIN_MIC1_12 +679 0x3C39 //TX_PREEQ_GAIN_MIC1_13 +680 0x3838 //TX_PREEQ_GAIN_MIC1_14 +681 0x3A3C //TX_PREEQ_GAIN_MIC1_15 682 0x4848 //TX_PREEQ_GAIN_MIC1_16 683 0x4848 //TX_PREEQ_GAIN_MIC1_17 684 0x4848 //TX_PREEQ_GAIN_MIC1_18 @@ -46302,22 +70118,22 @@ 687 0x4848 //TX_PREEQ_GAIN_MIC1_21 688 0x4848 //TX_PREEQ_GAIN_MIC1_22 689 0x4848 //TX_PREEQ_GAIN_MIC1_23 -690 0x251A //TX_PREEQ_BIN_MIC1_0 -691 0x0F0F //TX_PREEQ_BIN_MIC1_1 -692 0x0C0C //TX_PREEQ_BIN_MIC1_2 -693 0x0C0F //TX_PREEQ_BIN_MIC1_3 -694 0x0F0F //TX_PREEQ_BIN_MIC1_4 -695 0x0F09 //TX_PREEQ_BIN_MIC1_5 -696 0x0909 //TX_PREEQ_BIN_MIC1_6 -697 0x0908 //TX_PREEQ_BIN_MIC1_7 -698 0x070F //TX_PREEQ_BIN_MIC1_8 -699 0x1F08 //TX_PREEQ_BIN_MIC1_9 -700 0x0808 //TX_PREEQ_BIN_MIC1_10 -701 0x0920 //TX_PREEQ_BIN_MIC1_11 -702 0x2020 //TX_PREEQ_BIN_MIC1_12 -703 0x2021 //TX_PREEQ_BIN_MIC1_13 -704 0x0000 //TX_PREEQ_BIN_MIC1_14 -705 0x0000 //TX_PREEQ_BIN_MIC1_15 +690 0x0202 //TX_PREEQ_BIN_MIC1_0 +691 0x0203 //TX_PREEQ_BIN_MIC1_1 +692 0x0303 //TX_PREEQ_BIN_MIC1_2 +693 0x0304 //TX_PREEQ_BIN_MIC1_3 +694 0x0405 //TX_PREEQ_BIN_MIC1_4 +695 0x0506 //TX_PREEQ_BIN_MIC1_5 +696 0x0708 //TX_PREEQ_BIN_MIC1_6 +697 0x090A //TX_PREEQ_BIN_MIC1_7 +698 0x0B0C //TX_PREEQ_BIN_MIC1_8 +699 0x0D0E //TX_PREEQ_BIN_MIC1_9 +700 0x1013 //TX_PREEQ_BIN_MIC1_10 +701 0x1719 //TX_PREEQ_BIN_MIC1_11 +702 0x1B1E //TX_PREEQ_BIN_MIC1_12 +703 0x1E1E //TX_PREEQ_BIN_MIC1_13 +704 0x1E28 //TX_PREEQ_BIN_MIC1_14 +705 0x282C //TX_PREEQ_BIN_MIC1_15 706 0x0000 //TX_PREEQ_BIN_MIC1_16 707 0x0000 //TX_PREEQ_BIN_MIC1_17 708 0x0000 //TX_PREEQ_BIN_MIC1_18 @@ -46403,7 +70219,7 @@ 788 0x7EB8 //TX_TDDRC_ALPHA_DWN_02 789 0x7EB8 //TX_TDDRC_ALPHA_DWN_03 790 0x7EB8 //TX_TDDRC_ALPHA_DWN_04 -791 0x7FFF //TX_TDDRC_TD_DRC_LIMIT +791 0x7214 //TX_TDDRC_TD_DRC_LIMIT 792 0x0800 //TX_TDDRC_POST_LIMIT_GAIN 793 0x0000 //TX_TDDRC_RESRV_0 794 0x0000 //TX_TDDRC_RESRV_1 @@ -46466,12 +70282,12 @@ 851 0x0000 //TX_FFP_RESRV_5 852 0x0000 //TX_FFP_RESRV_6 853 0x0002 //TX_FILTINDX -854 0x0001 //TX_TDDRC_THRD_0 -855 0x0002 //TX_TDDRC_THRD_1 -856 0x1000 //TX_TDDRC_THRD_2 -857 0x1000 //TX_TDDRC_THRD_3 -858 0x6000 //TX_TDDRC_SLANT_0 -859 0x6000 //TX_TDDRC_SLANT_1 +854 0x0003 //TX_TDDRC_THRD_0 +855 0x0004 //TX_TDDRC_THRD_1 +856 0x1800 //TX_TDDRC_THRD_2 +857 0x1800 //TX_TDDRC_THRD_3 +858 0x7FFF //TX_TDDRC_SLANT_0 +859 0x7FFF //TX_TDDRC_SLANT_1 860 0x0800 //TX_TDDRC_ALPHA_UP_00 861 0x7EB8 //TX_TDDRC_ALPHA_DWN_00 862 0x0000 //TX_TDDRC_HMNC_FLAG @@ -46501,7 +70317,7 @@ 886 0x0CCD //TX_FASTNS_TFMASKBIN_TH2 887 0x0CCD //TX_FASTNS_TFMASKBIN_TH3 888 0x00C8 //TX_FASTNS_ARSPC_TH -889 0xC000 //TX_FASTNS_MASK5_TH +889 0x8000 //TX_FASTNS_MASK5_TH 890 0x4848 //TX_POSTSSA_MIN_G_VR_MASK 891 0x4000 //TX_A_LESSCUT_RTO_MASK 892 0x1770 //TX_FASTNS_NOISETH @@ -46509,8 +70325,73 @@ 894 0xC000 //TX_FASTNS_SSA_THHFL 895 0xCCCC //TX_FASTNS_SSA_THLFH 896 0xD999 //TX_FASTNS_SSA_THHFH +897 0x2339 //TX_SENDFUNC_REG_MICMUTE +898 0x0021 //TX_SENDFUNC_REG_MICMUTE1 +899 0x02BC //TX_MICMUTE_RATIO_THR +900 0x0140 //TX_MICMUTE_AMP_THR +901 0x0004 //TX_MICMUTE_HPF_IND +902 0x00C0 //TX_MICMUTE_LOG_EYR_TH +903 0x0008 //TX_MICMUTE_CVG_TIME +904 0x0008 //TX_MICMUTE_RELEASE_TIME +905 0x01FE //TX_MIC_VOLUME_MIC0MUTE +906 0x0020 //TX_MICMUTE_EPD_OFFSET_0 +907 0x001E //TX_MICMUTE_FRQ_AEC_L +908 0x7999 //TX_MICMUTE_EAD_THR +909 0x7FFF //TX_MICMUTE_LAMBDA_CB_NLE +910 0x7FFF //TX_MICMUTE_LAMBDA_RE_EST +911 0x4000 //TX_DTD_THR1_MICMUTE_0 +912 0x7000 //TX_DTD_THR1_MICMUTE_1 +913 0x7FFF //TX_DTD_THR1_MICMUTE_2 +914 0x7FFF //TX_DTD_THR1_MICMUTE_3 +915 0x6CCC //TX_DTD_THR2_MICMUTE_0 +916 0x0400 //TX_MICMUTE_MIN_EQ_RE_EST_0 +917 0x0400 //TX_MICMUTE_MIN_EQ_RE_EST_1 +918 0x1000 //TX_MICMUTE_MIN_EQ_RE_EST_2 +919 0x7FFF //TX_MICMUTE_MIN_EQ_RE_EST_3 +920 0x7FFF //TX_MICMUTE_MIN_EQ_RE_EST_4 +921 0x4000 //TX_MICMUTE_C_POST_FLT +922 0x03E8 //TX_MICMUTE_DT_CUT_K +923 0x0001 //TX_MICMUTE_DT_CUT_THR +924 0x03E8 //TX_MICMUTE_DT_CUT_K2 +925 0x0001 //TX_MICMUTE_DT_CUT_THR2 +926 0x0064 //TX_MICMUTE_DT2_HOLD_N +927 0x1000 //TX_MICMUTE_RATIODTH_THCUT +928 0x1000 //TX_MICMUTE_B_POST_FLT_ECHOL +929 0x7FFF //TX_MICMUTE_B_POST_FLT_ECHOH +930 0x0400 //TX_MICMUTE_C_POST_FLT_MASK +931 0x7999 //TX_MICMUTE_RATIODTL_CUT_TH +932 0x0258 //TX_MICMUTE_DT_CUT_K1 +933 0x0800 //TX_MICMUTE_N2_SN_EST +934 0xFC00 //TX_MICMUTE_THR_SN_EST_0 +935 0x001C //TX_MICMUTE_MIN_G_CTRL_0 +936 0x6000 //TX_MICMUTE_A_POST_FILT_S_0 +937 0x7000 //TX_MICMUTE_B_POST_FILT_0 +938 0x2710 //TX_MIC1RUB_AMP_THR +939 0x0010 //TX_MIC1MUTE_RATIO_THR +940 0x0450 //TX_MIC1MUTE_AMP_THR +941 0x0008 //TX_MIC1MUTE_CVG_TIME +942 0x0008 //TX_MIC1MUTE_RELEASE_TIME +943 0x0000 //TX_AMS_RESRV_01 +944 0x0000 //TX_AMS_RESRV_02 +945 0x0000 //TX_AMS_RESRV_03 +946 0x0000 //TX_AMS_RESRV_04 +947 0x0000 //TX_AMS_RESRV_05 +948 0x0000 //TX_AMS_RESRV_06 +949 0x0000 //TX_AMS_RESRV_07 +950 0x0000 //TX_AMS_RESRV_08 +951 0x0000 //TX_AMS_RESRV_09 +952 0x0000 //TX_AMS_RESRV_10 +953 0x0000 //TX_AMS_RESRV_11 +954 0x0000 //TX_AMS_RESRV_12 +955 0x0000 //TX_AMS_RESRV_13 +956 0x0000 //TX_AMS_RESRV_14 +957 0x0000 //TX_AMS_RESRV_15 +958 0x0000 //TX_AMS_RESRV_16 +959 0x0000 //TX_AMS_RESRV_17 +960 0x0000 //TX_AMS_RESRV_18 +961 0x0000 //TX_AMS_RESRV_19 #RX -0 0x0040 //RX_RECVFUNC_MODE_0 +0 0x2040 //RX_RECVFUNC_MODE_0 1 0x0000 //RX_RECVFUNC_MODE_1 2 0x0000 //RX_SAMPLINGFREQ_SIG 3 0x0000 //RX_SAMPLINGFREQ_PROC @@ -47360,18 +71241,869 @@ 110 0x0000 //RX_FDDRC_RESRV_0 129 0x0100 //RX_SPK_VOL 130 0x0000 //RX_VOL_RESRV_0 +#RX 2 +157 0x2040 //RX_RECVFUNC_MODE_0 +158 0x0000 //RX_RECVFUNC_MODE_1 +159 0x0000 //RX_SAMPLINGFREQ_SIG +160 0x0000 //RX_SAMPLINGFREQ_PROC +161 0x000A //RX_FRAME_SZ +162 0x0000 //RX_DELAY_OPT +163 0x3000 //RX_TDDRC_ALPHA_UP_1 +164 0x3000 //RX_TDDRC_ALPHA_UP_2 +165 0x3000 //RX_TDDRC_ALPHA_UP_3 +166 0x3000 //RX_TDDRC_ALPHA_UP_4 +167 0x050D //RX_PGA +168 0x7652 //RX_A_HP +169 0x4000 //RX_B_PE +170 0x7800 //RX_THR_PITCH_DET_0 +171 0x7000 //RX_THR_PITCH_DET_1 +172 0x6000 //RX_THR_PITCH_DET_2 +173 0x0000 //RX_PITCH_BFR_LEN +174 0x0000 //RX_SBD_PITCH_DET +175 0x0000 //RX_PP_RESRV_0 +176 0x0000 //RX_PP_RESRV_1 +177 0xF800 //RX_N_SN_EST +178 0x0000 //RX_N2_SN_EST +179 0x000F //RX_NS_LVL_CTRL +180 0xF800 //RX_THR_SN_EST +181 0x7E00 //RX_LAMBDA_PFILT +182 0x000A //RX_FENS_RESRV_0 +183 0x0000 //RX_FENS_RESRV_1 +184 0x7FB0 //RX_TDDRC_ALPHA_DWN_1 +185 0x7FB0 //RX_TDDRC_ALPHA_DWN_2 +186 0x7FB0 //RX_TDDRC_ALPHA_DWN_3 +187 0x0000 //RX_EXTRA_NS_L +188 0x0000 //RX_EXTRA_NS_A +189 0x7FB0 //RX_TDDRC_ALPHA_DWN_4 +190 0xDA9E //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +192 0x0000 //RX_A_POST_FLT +193 0x0000 //RX_LMT_THRD +194 0x4000 //RX_LMT_ALPHA +195 0x0020 //RX_FDEQ_SUBNUM +196 0x4848 //RX_FDEQ_GAIN_0 +197 0x4848 //RX_FDEQ_GAIN_1 +198 0x4848 //RX_FDEQ_GAIN_2 +199 0x4848 //RX_FDEQ_GAIN_3 +200 0x4848 //RX_FDEQ_GAIN_4 +201 0x4848 //RX_FDEQ_GAIN_5 +202 0x4848 //RX_FDEQ_GAIN_6 +203 0x4848 //RX_FDEQ_GAIN_7 +204 0x4848 //RX_FDEQ_GAIN_8 +205 0x4848 //RX_FDEQ_GAIN_9 +206 0x4848 //RX_FDEQ_GAIN_10 +207 0x4848 //RX_FDEQ_GAIN_11 +208 0x4848 //RX_FDEQ_GAIN_12 +209 0x4848 //RX_FDEQ_GAIN_13 +210 0x4848 //RX_FDEQ_GAIN_14 +211 0x4848 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0000 //RX_FDEQ_BIN_0 +221 0x0000 //RX_FDEQ_BIN_1 +222 0x0000 //RX_FDEQ_BIN_2 +223 0x0000 //RX_FDEQ_BIN_3 +224 0x0000 //RX_FDEQ_BIN_4 +225 0x0000 //RX_FDEQ_BIN_5 +226 0x0000 //RX_FDEQ_BIN_6 +227 0x0000 //RX_FDEQ_BIN_7 +228 0x0000 //RX_FDEQ_BIN_8 +229 0x0000 //RX_FDEQ_BIN_9 +230 0x0000 //RX_FDEQ_BIN_10 +231 0x0000 //RX_FDEQ_BIN_11 +232 0x0000 //RX_FDEQ_BIN_12 +233 0x0000 //RX_FDEQ_BIN_13 +234 0x0000 //RX_FDEQ_BIN_14 +235 0x0000 //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x0000 //RX_FDEQ_RESRV_0 +245 0x0000 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0030 //RX_FDDRC_BAND_MARGIN_1 +248 0x0050 //RX_FDDRC_BAND_MARGIN_2 +249 0x0080 //RX_FDDRC_BAND_MARGIN_3 +250 0x0004 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x5000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x6400 //RX_FDDRC_THRD_3_2 +258 0x6400 //RX_FDDRC_THRD_3_3 +259 0x2000 //RX_FDDRC_SLANT_0_0 +260 0x2000 //RX_FDDRC_SLANT_0_1 +261 0x2000 //RX_FDDRC_SLANT_0_2 +262 0x2000 //RX_FDDRC_SLANT_0_3 +263 0x2000 //RX_FDDRC_SLANT_1_0 +264 0x2000 //RX_FDDRC_SLANT_1_1 +265 0x2000 //RX_FDDRC_SLANT_1_2 +266 0x2000 //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +268 0x0003 //RX_FILTINDX +269 0x0000 //RX_TDDRC_THRD_0 +270 0x0000 //RX_TDDRC_THRD_1 +271 0x0E80 //RX_TDDRC_THRD_2 +272 0x3800 //RX_TDDRC_THRD_3 +273 0x2A00 //RX_TDDRC_SLANT_0 +274 0x6E00 //RX_TDDRC_SLANT_1 +275 0x3000 //RX_TDDRC_ALPHA_UP_0 +276 0x7FB0 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x0000 //RX_TDDRC_HMNC_GAIN +279 0x0000 //RX_TDDRC_SMT_FLAG +280 0x0000 //RX_TDDRC_SMT_W +281 0x0100 //RX_TDDRC_DRC_GAIN +282 0x7C00 //RX_LAMBDA_PKA_FP +283 0x2000 //RX_TPKA_FP +284 0x0080 //RX_MIN_G_FP +285 0x2000 //RX_MAX_G_FP +286 0x0100 //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 +288 0x0010 //RX_MAXLEVEL_CNG +289 0x0000 //RX_BWE_UV_TH +290 0x0000 //RX_BWE_UV_TH2 +291 0x0000 //RX_BWE_UV_TH3 +292 0x0000 //RX_BWE_V_TH +293 0x0000 //RX_BWE_GAIN1_V_TH1 +294 0x0000 //RX_BWE_GAIN1_V_TH2 +295 0x0000 //RX_BWE_UV_EQ +296 0x0000 //RX_BWE_V_EQ +297 0x0000 //RX_BWE_TONE_TH +298 0x0000 //RX_BWE_UV_HOLD_T +299 0x0000 //RX_BWE_GAIN2_ALPHA +300 0x0000 //RX_BWE_GAIN3_ALPHA +301 0x0000 //RX_BWE_CUTOFF +302 0x0000 //RX_BWE_GAINFILL +303 0x0000 //RX_BWE_MAXTH_TONE +304 0x0000 //RX_BWE_EQ_0 +305 0x0000 //RX_BWE_EQ_1 +306 0x0000 //RX_BWE_EQ_2 +307 0x0000 //RX_BWE_EQ_3 +308 0x0000 //RX_BWE_EQ_4 +309 0x0000 //RX_BWE_EQ_5 +310 0x0000 //RX_BWE_EQ_6 +311 0x0000 //RX_BWE_RESRV_0 +312 0x0000 //RX_BWE_RESRV_1 +313 0x0000 //RX_BWE_RESRV_2 +#VOL 0 +163 0x3000 //RX_TDDRC_ALPHA_UP_1 +164 0x3000 //RX_TDDRC_ALPHA_UP_2 +165 0x3000 //RX_TDDRC_ALPHA_UP_3 +166 0x3000 //RX_TDDRC_ALPHA_UP_4 +184 0x7FB0 //RX_TDDRC_ALPHA_DWN_1 +185 0x7FB0 //RX_TDDRC_ALPHA_DWN_2 +186 0x7FB0 //RX_TDDRC_ALPHA_DWN_3 +189 0x7FB0 //RX_TDDRC_ALPHA_DWN_4 +190 0xDA9E //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +269 0x0000 //RX_TDDRC_THRD_0 +270 0x0000 //RX_TDDRC_THRD_1 +271 0x0E80 //RX_TDDRC_THRD_2 +272 0x3800 //RX_TDDRC_THRD_3 +273 0x2A00 //RX_TDDRC_SLANT_0 +274 0x6E00 //RX_TDDRC_SLANT_1 +275 0x3000 //RX_TDDRC_ALPHA_UP_0 +276 0x7FB0 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x0000 //RX_TDDRC_HMNC_GAIN +279 0x0000 //RX_TDDRC_SMT_FLAG +280 0x0000 //RX_TDDRC_SMT_W +281 0x0100 //RX_TDDRC_DRC_GAIN +195 0x0020 //RX_FDEQ_SUBNUM +196 0x4848 //RX_FDEQ_GAIN_0 +197 0x4848 //RX_FDEQ_GAIN_1 +198 0x4848 //RX_FDEQ_GAIN_2 +199 0x4848 //RX_FDEQ_GAIN_3 +200 0x4848 //RX_FDEQ_GAIN_4 +201 0x4848 //RX_FDEQ_GAIN_5 +202 0x4848 //RX_FDEQ_GAIN_6 +203 0x4848 //RX_FDEQ_GAIN_7 +204 0x4848 //RX_FDEQ_GAIN_8 +205 0x4848 //RX_FDEQ_GAIN_9 +206 0x4848 //RX_FDEQ_GAIN_10 +207 0x4848 //RX_FDEQ_GAIN_11 +208 0x4848 //RX_FDEQ_GAIN_12 +209 0x4848 //RX_FDEQ_GAIN_13 +210 0x4848 //RX_FDEQ_GAIN_14 +211 0x4848 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0000 //RX_FDEQ_BIN_0 +221 0x0000 //RX_FDEQ_BIN_1 +222 0x0000 //RX_FDEQ_BIN_2 +223 0x0000 //RX_FDEQ_BIN_3 +224 0x0000 //RX_FDEQ_BIN_4 +225 0x0000 //RX_FDEQ_BIN_5 +226 0x0000 //RX_FDEQ_BIN_6 +227 0x0000 //RX_FDEQ_BIN_7 +228 0x0000 //RX_FDEQ_BIN_8 +229 0x0000 //RX_FDEQ_BIN_9 +230 0x0000 //RX_FDEQ_BIN_10 +231 0x0000 //RX_FDEQ_BIN_11 +232 0x0000 //RX_FDEQ_BIN_12 +233 0x0000 //RX_FDEQ_BIN_13 +234 0x0000 //RX_FDEQ_BIN_14 +235 0x0000 //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x0000 //RX_FDEQ_RESRV_0 +245 0x0000 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0030 //RX_FDDRC_BAND_MARGIN_1 +248 0x0050 //RX_FDDRC_BAND_MARGIN_2 +249 0x0080 //RX_FDDRC_BAND_MARGIN_3 +250 0x0004 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x5000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x6400 //RX_FDDRC_THRD_3_2 +258 0x6400 //RX_FDDRC_THRD_3_3 +259 0x2000 //RX_FDDRC_SLANT_0_0 +260 0x2000 //RX_FDDRC_SLANT_0_1 +261 0x2000 //RX_FDDRC_SLANT_0_2 +262 0x2000 //RX_FDDRC_SLANT_0_3 +263 0x2000 //RX_FDDRC_SLANT_1_0 +264 0x2000 //RX_FDDRC_SLANT_1_1 +265 0x2000 //RX_FDDRC_SLANT_1_2 +266 0x2000 //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +286 0x0100 //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 +#VOL 1 +163 0x3000 //RX_TDDRC_ALPHA_UP_1 +164 0x3000 //RX_TDDRC_ALPHA_UP_2 +165 0x3000 //RX_TDDRC_ALPHA_UP_3 +166 0x3000 //RX_TDDRC_ALPHA_UP_4 +184 0x7FB0 //RX_TDDRC_ALPHA_DWN_1 +185 0x7FB0 //RX_TDDRC_ALPHA_DWN_2 +186 0x7FB0 //RX_TDDRC_ALPHA_DWN_3 +189 0x7FB0 //RX_TDDRC_ALPHA_DWN_4 +190 0xDA9E //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +269 0x0000 //RX_TDDRC_THRD_0 +270 0x0000 //RX_TDDRC_THRD_1 +271 0x0E80 //RX_TDDRC_THRD_2 +272 0x3800 //RX_TDDRC_THRD_3 +273 0x2A00 //RX_TDDRC_SLANT_0 +274 0x6E00 //RX_TDDRC_SLANT_1 +275 0x3000 //RX_TDDRC_ALPHA_UP_0 +276 0x7FB0 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x0000 //RX_TDDRC_HMNC_GAIN +279 0x0000 //RX_TDDRC_SMT_FLAG +280 0x0000 //RX_TDDRC_SMT_W +281 0x0100 //RX_TDDRC_DRC_GAIN +195 0x0020 //RX_FDEQ_SUBNUM +196 0x4848 //RX_FDEQ_GAIN_0 +197 0x4848 //RX_FDEQ_GAIN_1 +198 0x4848 //RX_FDEQ_GAIN_2 +199 0x4848 //RX_FDEQ_GAIN_3 +200 0x4848 //RX_FDEQ_GAIN_4 +201 0x4848 //RX_FDEQ_GAIN_5 +202 0x4848 //RX_FDEQ_GAIN_6 +203 0x4848 //RX_FDEQ_GAIN_7 +204 0x4848 //RX_FDEQ_GAIN_8 +205 0x4848 //RX_FDEQ_GAIN_9 +206 0x4848 //RX_FDEQ_GAIN_10 +207 0x4848 //RX_FDEQ_GAIN_11 +208 0x4848 //RX_FDEQ_GAIN_12 +209 0x4848 //RX_FDEQ_GAIN_13 +210 0x4848 //RX_FDEQ_GAIN_14 +211 0x4848 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0000 //RX_FDEQ_BIN_0 +221 0x0000 //RX_FDEQ_BIN_1 +222 0x0000 //RX_FDEQ_BIN_2 +223 0x0000 //RX_FDEQ_BIN_3 +224 0x0000 //RX_FDEQ_BIN_4 +225 0x0000 //RX_FDEQ_BIN_5 +226 0x0000 //RX_FDEQ_BIN_6 +227 0x0000 //RX_FDEQ_BIN_7 +228 0x0000 //RX_FDEQ_BIN_8 +229 0x0000 //RX_FDEQ_BIN_9 +230 0x0000 //RX_FDEQ_BIN_10 +231 0x0000 //RX_FDEQ_BIN_11 +232 0x0000 //RX_FDEQ_BIN_12 +233 0x0000 //RX_FDEQ_BIN_13 +234 0x0000 //RX_FDEQ_BIN_14 +235 0x0000 //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x0000 //RX_FDEQ_RESRV_0 +245 0x0000 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0030 //RX_FDDRC_BAND_MARGIN_1 +248 0x0050 //RX_FDDRC_BAND_MARGIN_2 +249 0x0080 //RX_FDDRC_BAND_MARGIN_3 +250 0x0004 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x5000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x6400 //RX_FDDRC_THRD_3_2 +258 0x6400 //RX_FDDRC_THRD_3_3 +259 0x2000 //RX_FDDRC_SLANT_0_0 +260 0x2000 //RX_FDDRC_SLANT_0_1 +261 0x2000 //RX_FDDRC_SLANT_0_2 +262 0x2000 //RX_FDDRC_SLANT_0_3 +263 0x2000 //RX_FDDRC_SLANT_1_0 +264 0x2000 //RX_FDDRC_SLANT_1_1 +265 0x2000 //RX_FDDRC_SLANT_1_2 +266 0x2000 //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +286 0x0100 //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 +#VOL 2 +163 0x3000 //RX_TDDRC_ALPHA_UP_1 +164 0x3000 //RX_TDDRC_ALPHA_UP_2 +165 0x3000 //RX_TDDRC_ALPHA_UP_3 +166 0x3000 //RX_TDDRC_ALPHA_UP_4 +184 0x7FB0 //RX_TDDRC_ALPHA_DWN_1 +185 0x7FB0 //RX_TDDRC_ALPHA_DWN_2 +186 0x7FB0 //RX_TDDRC_ALPHA_DWN_3 +189 0x7FB0 //RX_TDDRC_ALPHA_DWN_4 +190 0xDA9E //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +269 0x0000 //RX_TDDRC_THRD_0 +270 0x0000 //RX_TDDRC_THRD_1 +271 0x0E80 //RX_TDDRC_THRD_2 +272 0x3800 //RX_TDDRC_THRD_3 +273 0x2A00 //RX_TDDRC_SLANT_0 +274 0x6E00 //RX_TDDRC_SLANT_1 +275 0x3000 //RX_TDDRC_ALPHA_UP_0 +276 0x7FB0 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x0000 //RX_TDDRC_HMNC_GAIN +279 0x0000 //RX_TDDRC_SMT_FLAG +280 0x0000 //RX_TDDRC_SMT_W +281 0x0100 //RX_TDDRC_DRC_GAIN +195 0x0020 //RX_FDEQ_SUBNUM +196 0x4848 //RX_FDEQ_GAIN_0 +197 0x4848 //RX_FDEQ_GAIN_1 +198 0x4848 //RX_FDEQ_GAIN_2 +199 0x4848 //RX_FDEQ_GAIN_3 +200 0x4848 //RX_FDEQ_GAIN_4 +201 0x4848 //RX_FDEQ_GAIN_5 +202 0x4848 //RX_FDEQ_GAIN_6 +203 0x4848 //RX_FDEQ_GAIN_7 +204 0x4848 //RX_FDEQ_GAIN_8 +205 0x4848 //RX_FDEQ_GAIN_9 +206 0x4848 //RX_FDEQ_GAIN_10 +207 0x4848 //RX_FDEQ_GAIN_11 +208 0x4848 //RX_FDEQ_GAIN_12 +209 0x4848 //RX_FDEQ_GAIN_13 +210 0x4848 //RX_FDEQ_GAIN_14 +211 0x4848 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0000 //RX_FDEQ_BIN_0 +221 0x0000 //RX_FDEQ_BIN_1 +222 0x0000 //RX_FDEQ_BIN_2 +223 0x0000 //RX_FDEQ_BIN_3 +224 0x0000 //RX_FDEQ_BIN_4 +225 0x0000 //RX_FDEQ_BIN_5 +226 0x0000 //RX_FDEQ_BIN_6 +227 0x0000 //RX_FDEQ_BIN_7 +228 0x0000 //RX_FDEQ_BIN_8 +229 0x0000 //RX_FDEQ_BIN_9 +230 0x0000 //RX_FDEQ_BIN_10 +231 0x0000 //RX_FDEQ_BIN_11 +232 0x0000 //RX_FDEQ_BIN_12 +233 0x0000 //RX_FDEQ_BIN_13 +234 0x0000 //RX_FDEQ_BIN_14 +235 0x0000 //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x0000 //RX_FDEQ_RESRV_0 +245 0x0000 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0030 //RX_FDDRC_BAND_MARGIN_1 +248 0x0050 //RX_FDDRC_BAND_MARGIN_2 +249 0x0080 //RX_FDDRC_BAND_MARGIN_3 +250 0x0004 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x5000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x6400 //RX_FDDRC_THRD_3_2 +258 0x6400 //RX_FDDRC_THRD_3_3 +259 0x2000 //RX_FDDRC_SLANT_0_0 +260 0x2000 //RX_FDDRC_SLANT_0_1 +261 0x2000 //RX_FDDRC_SLANT_0_2 +262 0x2000 //RX_FDDRC_SLANT_0_3 +263 0x2000 //RX_FDDRC_SLANT_1_0 +264 0x2000 //RX_FDDRC_SLANT_1_1 +265 0x2000 //RX_FDDRC_SLANT_1_2 +266 0x2000 //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +286 0x0100 //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 +#VOL 3 +163 0x3000 //RX_TDDRC_ALPHA_UP_1 +164 0x3000 //RX_TDDRC_ALPHA_UP_2 +165 0x3000 //RX_TDDRC_ALPHA_UP_3 +166 0x3000 //RX_TDDRC_ALPHA_UP_4 +184 0x7FB0 //RX_TDDRC_ALPHA_DWN_1 +185 0x7FB0 //RX_TDDRC_ALPHA_DWN_2 +186 0x7FB0 //RX_TDDRC_ALPHA_DWN_3 +189 0x7FB0 //RX_TDDRC_ALPHA_DWN_4 +190 0xDA9E //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +269 0x0000 //RX_TDDRC_THRD_0 +270 0x0000 //RX_TDDRC_THRD_1 +271 0x0E80 //RX_TDDRC_THRD_2 +272 0x3800 //RX_TDDRC_THRD_3 +273 0x2A00 //RX_TDDRC_SLANT_0 +274 0x6E00 //RX_TDDRC_SLANT_1 +275 0x3000 //RX_TDDRC_ALPHA_UP_0 +276 0x7FB0 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x0000 //RX_TDDRC_HMNC_GAIN +279 0x0000 //RX_TDDRC_SMT_FLAG +280 0x0000 //RX_TDDRC_SMT_W +281 0x0100 //RX_TDDRC_DRC_GAIN +195 0x0020 //RX_FDEQ_SUBNUM +196 0x4848 //RX_FDEQ_GAIN_0 +197 0x4848 //RX_FDEQ_GAIN_1 +198 0x4848 //RX_FDEQ_GAIN_2 +199 0x4848 //RX_FDEQ_GAIN_3 +200 0x4848 //RX_FDEQ_GAIN_4 +201 0x4848 //RX_FDEQ_GAIN_5 +202 0x4848 //RX_FDEQ_GAIN_6 +203 0x4848 //RX_FDEQ_GAIN_7 +204 0x4848 //RX_FDEQ_GAIN_8 +205 0x4848 //RX_FDEQ_GAIN_9 +206 0x4848 //RX_FDEQ_GAIN_10 +207 0x4848 //RX_FDEQ_GAIN_11 +208 0x4848 //RX_FDEQ_GAIN_12 +209 0x4848 //RX_FDEQ_GAIN_13 +210 0x4848 //RX_FDEQ_GAIN_14 +211 0x4848 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0000 //RX_FDEQ_BIN_0 +221 0x0000 //RX_FDEQ_BIN_1 +222 0x0000 //RX_FDEQ_BIN_2 +223 0x0000 //RX_FDEQ_BIN_3 +224 0x0000 //RX_FDEQ_BIN_4 +225 0x0000 //RX_FDEQ_BIN_5 +226 0x0000 //RX_FDEQ_BIN_6 +227 0x0000 //RX_FDEQ_BIN_7 +228 0x0000 //RX_FDEQ_BIN_8 +229 0x0000 //RX_FDEQ_BIN_9 +230 0x0000 //RX_FDEQ_BIN_10 +231 0x0000 //RX_FDEQ_BIN_11 +232 0x0000 //RX_FDEQ_BIN_12 +233 0x0000 //RX_FDEQ_BIN_13 +234 0x0000 //RX_FDEQ_BIN_14 +235 0x0000 //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x0000 //RX_FDEQ_RESRV_0 +245 0x0000 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0030 //RX_FDDRC_BAND_MARGIN_1 +248 0x0050 //RX_FDDRC_BAND_MARGIN_2 +249 0x0080 //RX_FDDRC_BAND_MARGIN_3 +250 0x0004 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x5000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x6400 //RX_FDDRC_THRD_3_2 +258 0x6400 //RX_FDDRC_THRD_3_3 +259 0x2000 //RX_FDDRC_SLANT_0_0 +260 0x2000 //RX_FDDRC_SLANT_0_1 +261 0x2000 //RX_FDDRC_SLANT_0_2 +262 0x2000 //RX_FDDRC_SLANT_0_3 +263 0x2000 //RX_FDDRC_SLANT_1_0 +264 0x2000 //RX_FDDRC_SLANT_1_1 +265 0x2000 //RX_FDDRC_SLANT_1_2 +266 0x2000 //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +286 0x0100 //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 +#VOL 4 +163 0x3000 //RX_TDDRC_ALPHA_UP_1 +164 0x3000 //RX_TDDRC_ALPHA_UP_2 +165 0x3000 //RX_TDDRC_ALPHA_UP_3 +166 0x3000 //RX_TDDRC_ALPHA_UP_4 +184 0x7FB0 //RX_TDDRC_ALPHA_DWN_1 +185 0x7FB0 //RX_TDDRC_ALPHA_DWN_2 +186 0x7FB0 //RX_TDDRC_ALPHA_DWN_3 +189 0x7FB0 //RX_TDDRC_ALPHA_DWN_4 +190 0xDA9E //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +269 0x0000 //RX_TDDRC_THRD_0 +270 0x0000 //RX_TDDRC_THRD_1 +271 0x0E80 //RX_TDDRC_THRD_2 +272 0x3800 //RX_TDDRC_THRD_3 +273 0x2A00 //RX_TDDRC_SLANT_0 +274 0x6E00 //RX_TDDRC_SLANT_1 +275 0x3000 //RX_TDDRC_ALPHA_UP_0 +276 0x7FB0 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x0000 //RX_TDDRC_HMNC_GAIN +279 0x0000 //RX_TDDRC_SMT_FLAG +280 0x0000 //RX_TDDRC_SMT_W +281 0x0100 //RX_TDDRC_DRC_GAIN +195 0x0020 //RX_FDEQ_SUBNUM +196 0x4848 //RX_FDEQ_GAIN_0 +197 0x4848 //RX_FDEQ_GAIN_1 +198 0x4848 //RX_FDEQ_GAIN_2 +199 0x4848 //RX_FDEQ_GAIN_3 +200 0x4848 //RX_FDEQ_GAIN_4 +201 0x4848 //RX_FDEQ_GAIN_5 +202 0x4848 //RX_FDEQ_GAIN_6 +203 0x4848 //RX_FDEQ_GAIN_7 +204 0x4848 //RX_FDEQ_GAIN_8 +205 0x4848 //RX_FDEQ_GAIN_9 +206 0x4848 //RX_FDEQ_GAIN_10 +207 0x4848 //RX_FDEQ_GAIN_11 +208 0x4848 //RX_FDEQ_GAIN_12 +209 0x4848 //RX_FDEQ_GAIN_13 +210 0x4848 //RX_FDEQ_GAIN_14 +211 0x4848 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0000 //RX_FDEQ_BIN_0 +221 0x0000 //RX_FDEQ_BIN_1 +222 0x0000 //RX_FDEQ_BIN_2 +223 0x0000 //RX_FDEQ_BIN_3 +224 0x0000 //RX_FDEQ_BIN_4 +225 0x0000 //RX_FDEQ_BIN_5 +226 0x0000 //RX_FDEQ_BIN_6 +227 0x0000 //RX_FDEQ_BIN_7 +228 0x0000 //RX_FDEQ_BIN_8 +229 0x0000 //RX_FDEQ_BIN_9 +230 0x0000 //RX_FDEQ_BIN_10 +231 0x0000 //RX_FDEQ_BIN_11 +232 0x0000 //RX_FDEQ_BIN_12 +233 0x0000 //RX_FDEQ_BIN_13 +234 0x0000 //RX_FDEQ_BIN_14 +235 0x0000 //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x0000 //RX_FDEQ_RESRV_0 +245 0x0000 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0030 //RX_FDDRC_BAND_MARGIN_1 +248 0x0050 //RX_FDDRC_BAND_MARGIN_2 +249 0x0080 //RX_FDDRC_BAND_MARGIN_3 +250 0x0004 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x5000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x6400 //RX_FDDRC_THRD_3_2 +258 0x6400 //RX_FDDRC_THRD_3_3 +259 0x2000 //RX_FDDRC_SLANT_0_0 +260 0x2000 //RX_FDDRC_SLANT_0_1 +261 0x2000 //RX_FDDRC_SLANT_0_2 +262 0x2000 //RX_FDDRC_SLANT_0_3 +263 0x2000 //RX_FDDRC_SLANT_1_0 +264 0x2000 //RX_FDDRC_SLANT_1_1 +265 0x2000 //RX_FDDRC_SLANT_1_2 +266 0x2000 //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +286 0x0100 //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 +#VOL 5 +163 0x3000 //RX_TDDRC_ALPHA_UP_1 +164 0x3000 //RX_TDDRC_ALPHA_UP_2 +165 0x3000 //RX_TDDRC_ALPHA_UP_3 +166 0x3000 //RX_TDDRC_ALPHA_UP_4 +184 0x7FB0 //RX_TDDRC_ALPHA_DWN_1 +185 0x7FB0 //RX_TDDRC_ALPHA_DWN_2 +186 0x7FB0 //RX_TDDRC_ALPHA_DWN_3 +189 0x7FB0 //RX_TDDRC_ALPHA_DWN_4 +190 0xDA9E //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +269 0x0000 //RX_TDDRC_THRD_0 +270 0x0000 //RX_TDDRC_THRD_1 +271 0x0E80 //RX_TDDRC_THRD_2 +272 0x3800 //RX_TDDRC_THRD_3 +273 0x2A00 //RX_TDDRC_SLANT_0 +274 0x6E00 //RX_TDDRC_SLANT_1 +275 0x3000 //RX_TDDRC_ALPHA_UP_0 +276 0x7FB0 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x0000 //RX_TDDRC_HMNC_GAIN +279 0x0000 //RX_TDDRC_SMT_FLAG +280 0x0000 //RX_TDDRC_SMT_W +281 0x0100 //RX_TDDRC_DRC_GAIN +195 0x0020 //RX_FDEQ_SUBNUM +196 0x4848 //RX_FDEQ_GAIN_0 +197 0x4848 //RX_FDEQ_GAIN_1 +198 0x4848 //RX_FDEQ_GAIN_2 +199 0x4848 //RX_FDEQ_GAIN_3 +200 0x4848 //RX_FDEQ_GAIN_4 +201 0x4848 //RX_FDEQ_GAIN_5 +202 0x4848 //RX_FDEQ_GAIN_6 +203 0x4848 //RX_FDEQ_GAIN_7 +204 0x4848 //RX_FDEQ_GAIN_8 +205 0x4848 //RX_FDEQ_GAIN_9 +206 0x4848 //RX_FDEQ_GAIN_10 +207 0x4848 //RX_FDEQ_GAIN_11 +208 0x4848 //RX_FDEQ_GAIN_12 +209 0x4848 //RX_FDEQ_GAIN_13 +210 0x4848 //RX_FDEQ_GAIN_14 +211 0x4848 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0000 //RX_FDEQ_BIN_0 +221 0x0000 //RX_FDEQ_BIN_1 +222 0x0000 //RX_FDEQ_BIN_2 +223 0x0000 //RX_FDEQ_BIN_3 +224 0x0000 //RX_FDEQ_BIN_4 +225 0x0000 //RX_FDEQ_BIN_5 +226 0x0000 //RX_FDEQ_BIN_6 +227 0x0000 //RX_FDEQ_BIN_7 +228 0x0000 //RX_FDEQ_BIN_8 +229 0x0000 //RX_FDEQ_BIN_9 +230 0x0000 //RX_FDEQ_BIN_10 +231 0x0000 //RX_FDEQ_BIN_11 +232 0x0000 //RX_FDEQ_BIN_12 +233 0x0000 //RX_FDEQ_BIN_13 +234 0x0000 //RX_FDEQ_BIN_14 +235 0x0000 //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x0000 //RX_FDEQ_RESRV_0 +245 0x0000 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0030 //RX_FDDRC_BAND_MARGIN_1 +248 0x0050 //RX_FDDRC_BAND_MARGIN_2 +249 0x0080 //RX_FDDRC_BAND_MARGIN_3 +250 0x0004 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x5000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x6400 //RX_FDDRC_THRD_3_2 +258 0x6400 //RX_FDDRC_THRD_3_3 +259 0x2000 //RX_FDDRC_SLANT_0_0 +260 0x2000 //RX_FDDRC_SLANT_0_1 +261 0x2000 //RX_FDDRC_SLANT_0_2 +262 0x2000 //RX_FDDRC_SLANT_0_3 +263 0x2000 //RX_FDDRC_SLANT_1_0 +264 0x2000 //RX_FDDRC_SLANT_1_1 +265 0x2000 //RX_FDDRC_SLANT_1_2 +266 0x2000 //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +286 0x0100 //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 +#VOL 6 +163 0x3000 //RX_TDDRC_ALPHA_UP_1 +164 0x3000 //RX_TDDRC_ALPHA_UP_2 +165 0x3000 //RX_TDDRC_ALPHA_UP_3 +166 0x3000 //RX_TDDRC_ALPHA_UP_4 +184 0x7FB0 //RX_TDDRC_ALPHA_DWN_1 +185 0x7FB0 //RX_TDDRC_ALPHA_DWN_2 +186 0x7FB0 //RX_TDDRC_ALPHA_DWN_3 +189 0x7FB0 //RX_TDDRC_ALPHA_DWN_4 +190 0xDA9E //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +269 0x0000 //RX_TDDRC_THRD_0 +270 0x0000 //RX_TDDRC_THRD_1 +271 0x0E80 //RX_TDDRC_THRD_2 +272 0x3800 //RX_TDDRC_THRD_3 +273 0x2A00 //RX_TDDRC_SLANT_0 +274 0x6E00 //RX_TDDRC_SLANT_1 +275 0x3000 //RX_TDDRC_ALPHA_UP_0 +276 0x7FB0 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x0000 //RX_TDDRC_HMNC_GAIN +279 0x0000 //RX_TDDRC_SMT_FLAG +280 0x0000 //RX_TDDRC_SMT_W +281 0x0100 //RX_TDDRC_DRC_GAIN +195 0x0020 //RX_FDEQ_SUBNUM +196 0x4848 //RX_FDEQ_GAIN_0 +197 0x4848 //RX_FDEQ_GAIN_1 +198 0x4848 //RX_FDEQ_GAIN_2 +199 0x4848 //RX_FDEQ_GAIN_3 +200 0x4848 //RX_FDEQ_GAIN_4 +201 0x4848 //RX_FDEQ_GAIN_5 +202 0x4848 //RX_FDEQ_GAIN_6 +203 0x4848 //RX_FDEQ_GAIN_7 +204 0x4848 //RX_FDEQ_GAIN_8 +205 0x4848 //RX_FDEQ_GAIN_9 +206 0x4848 //RX_FDEQ_GAIN_10 +207 0x4848 //RX_FDEQ_GAIN_11 +208 0x4848 //RX_FDEQ_GAIN_12 +209 0x4848 //RX_FDEQ_GAIN_13 +210 0x4848 //RX_FDEQ_GAIN_14 +211 0x4848 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0000 //RX_FDEQ_BIN_0 +221 0x0000 //RX_FDEQ_BIN_1 +222 0x0000 //RX_FDEQ_BIN_2 +223 0x0000 //RX_FDEQ_BIN_3 +224 0x0000 //RX_FDEQ_BIN_4 +225 0x0000 //RX_FDEQ_BIN_5 +226 0x0000 //RX_FDEQ_BIN_6 +227 0x0000 //RX_FDEQ_BIN_7 +228 0x0000 //RX_FDEQ_BIN_8 +229 0x0000 //RX_FDEQ_BIN_9 +230 0x0000 //RX_FDEQ_BIN_10 +231 0x0000 //RX_FDEQ_BIN_11 +232 0x0000 //RX_FDEQ_BIN_12 +233 0x0000 //RX_FDEQ_BIN_13 +234 0x0000 //RX_FDEQ_BIN_14 +235 0x0000 //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x0000 //RX_FDEQ_RESRV_0 +245 0x0000 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0030 //RX_FDDRC_BAND_MARGIN_1 +248 0x0050 //RX_FDDRC_BAND_MARGIN_2 +249 0x0080 //RX_FDDRC_BAND_MARGIN_3 +250 0x0004 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x5000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x6400 //RX_FDDRC_THRD_3_2 +258 0x6400 //RX_FDDRC_THRD_3_3 +259 0x2000 //RX_FDDRC_SLANT_0_0 +260 0x2000 //RX_FDDRC_SLANT_0_1 +261 0x2000 //RX_FDDRC_SLANT_0_2 +262 0x2000 //RX_FDDRC_SLANT_0_3 +263 0x2000 //RX_FDDRC_SLANT_1_0 +264 0x2000 //RX_FDDRC_SLANT_1_1 +265 0x2000 //RX_FDDRC_SLANT_1_2 +266 0x2000 //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +286 0x0100 //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 #CASE_NAME HEADSET-TTY_VCO-VOICE_GENERIC-FB -#PARAM_MODE FULL -#PARAM_TYPE TX+RX -#TOTAL_CUSTOM_STEP 7 +#PARAM_MODE Full +#PARAM_TYPE TX+2RX +#TOTAL_CUSTOM_STEP 7+7 #TX 0 0x0001 //TX_OPERATION_MODE_0 1 0x0001 //TX_OPERATION_MODE_1 2 0x0033 //TX_PATCH_REG -3 0x4B7C //TX_SENDFUNC_MODE_0 +3 0x6B7C //TX_SENDFUNC_MODE_0 4 0x0001 //TX_SENDFUNC_MODE_1 -5 0x0003 //TX_NUM_MIC +5 0x0002 //TX_NUM_MIC 6 0x0004 //TX_SAMPLINGFREQ_SIG 7 0x0004 //TX_SAMPLINGFREQ_PROC 8 0x000A //TX_FRAME_SZ_SIG @@ -47387,15 +72119,15 @@ 18 0x0000 //TX_SYS_RESRV_2 19 0x0000 //TX_SYS_RESRV_3 20 0x0000 //TX_DIST2REF0 -21 0x00A4 //TX_DIST2REF1 -22 0x0017 //TX_DIST2REF_02 +21 0x009D //TX_DIST2REF1 +22 0x0010 //TX_DIST2REF_02 23 0x0000 //TX_DIST2REF_03 24 0x0000 //TX_DIST2REF_04 25 0x0000 //TX_DIST2REF_05 26 0x0000 //TX_MMIC -27 0x0FF7 //TX_PGA_0 -28 0x0FF7 //TX_PGA_1 -29 0x0FF7 //TX_PGA_2 +27 0x1000 //TX_PGA_0 +28 0x1000 //TX_PGA_1 +29 0x1000 //TX_PGA_2 30 0x0000 //TX_PGA_3 31 0x0000 //TX_PGA_4 32 0x0000 //TX_PGA_5 @@ -47531,7 +72263,7 @@ 162 0x7FFF //TX_MIN_EQ_RE_EST_10 163 0x7FFF //TX_MIN_EQ_RE_EST_11 164 0x7FFF //TX_MIN_EQ_RE_EST_12 -165 0x4000 //TX_LAMBDA_RE_EST +165 0x0700 //TX_LAMBDA_RE_EST 166 0x0CCD //TX_LAMBDA_CB_NLE 167 0x2000 //TX_C_POST_FLT 168 0x7FFF //TX_GAIN_NP @@ -47591,16 +72323,16 @@ 222 0x023E //TX_ADPT_STRICT_H 223 0x0BB8 //TX_RATIO_DT_L_TH_LOW 224 0x3A98 //TX_RATIO_DT_H_TH_LOW -225 0x1770 //TX_RATIO_DT_L_TH_HIGH +225 0x1194 //TX_RATIO_DT_L_TH_HIGH 226 0x4E20 //TX_RATIO_DT_H_TH_HIGH 227 0x09C4 //TX_RATIO_DT_L0_TH -228 0x2000 //TX_B_POST_FILT_ECHO_L +228 0x7FFF //TX_B_POST_FILT_ECHO_L 229 0x2000 //TX_B_POST_FILT_ECHO_H 230 0x0200 //TX_MIN_G_CTRL_ECHO 231 0x1000 //TX_B_LESSCUT_RTO_ECHO -232 0x0000 //TX_EPD_OFFSET_00 +232 0x0063 //TX_EPD_OFFSET_00 233 0x0000 //TX_EPD_OFFST_01 -234 0x1388 //TX_RATIO_DT_L0_TH_HIGH +234 0x0A28 //TX_RATIO_DT_L0_TH_HIGH 235 0x3A98 //TX_RATIO_DT_H_TH_CUT 236 0x7FFF //TX_MIN_EQ_RE_EST_13 237 0x0000 //TX_DTD_THR1_7 @@ -47608,7 +72340,7 @@ 239 0x0800 //TX_DT_RESRV_7 240 0x0800 //TX_DT_RESRV_8 241 0x0000 //TX_DT_RESRV_9 -242 0xF800 //TX_THR_SN_EST_0 +242 0xF700 //TX_THR_SN_EST_0 243 0xFA00 //TX_THR_SN_EST_1 244 0xFA00 //TX_THR_SN_EST_2 245 0xFB00 //TX_THR_SN_EST_3 @@ -47617,11 +72349,11 @@ 248 0xF800 //TX_THR_SN_EST_6 249 0xF800 //TX_THR_SN_EST_7 250 0x0100 //TX_DELTA_THR_SN_EST_0 -251 0x0200 //TX_DELTA_THR_SN_EST_1 -252 0x0100 //TX_DELTA_THR_SN_EST_2 -253 0x0200 //TX_DELTA_THR_SN_EST_3 +251 0x0100 //TX_DELTA_THR_SN_EST_1 +252 0x0200 //TX_DELTA_THR_SN_EST_2 +253 0x0100 //TX_DELTA_THR_SN_EST_3 254 0x0100 //TX_DELTA_THR_SN_EST_4 -255 0x0100 //TX_DELTA_THR_SN_EST_5 +255 0x0200 //TX_DELTA_THR_SN_EST_5 256 0x0200 //TX_DELTA_THR_SN_EST_6 257 0x0200 //TX_DELTA_THR_SN_EST_7 258 0x4000 //TX_LAMBDA_NN_EST_0 @@ -47649,11 +72381,11 @@ 280 0x1000 //TX_B_POST_FLT_1 281 0x0010 //TX_NS_LVL_CTRL_0 282 0x0014 //TX_NS_LVL_CTRL_1 -283 0x0014 //TX_NS_LVL_CTRL_2 -284 0x0018 //TX_NS_LVL_CTRL_3 -285 0x0016 //TX_NS_LVL_CTRL_4 -286 0x0014 //TX_NS_LVL_CTRL_5 -287 0x0011 //TX_NS_LVL_CTRL_6 +283 0x0018 //TX_NS_LVL_CTRL_2 +284 0x0016 //TX_NS_LVL_CTRL_3 +285 0x0014 //TX_NS_LVL_CTRL_4 +286 0x0011 //TX_NS_LVL_CTRL_5 +287 0x0014 //TX_NS_LVL_CTRL_6 288 0x0011 //TX_NS_LVL_CTRL_7 289 0x000F //TX_MIN_GAIN_S_0 290 0x0010 //TX_MIN_GAIN_S_1 @@ -47671,8 +72403,8 @@ 302 0x4000 //TX_SNRI_SUP_2 303 0x4000 //TX_SNRI_SUP_3 304 0x4000 //TX_SNRI_SUP_4 -305 0x4000 //TX_SNRI_SUP_5 -306 0x50C0 //TX_SNRI_SUP_6 +305 0x50C0 //TX_SNRI_SUP_5 +306 0x4000 //TX_SNRI_SUP_6 307 0x7FFF //TX_SNRI_SUP_7 308 0x7FFF //TX_THR_LFNS 309 0x0018 //TX_G_LFNS @@ -47681,19 +72413,19 @@ 312 0x7FFF //TX_A_POST_FILT_0 313 0x2000 //TX_A_POST_FILT_1 314 0x5000 //TX_A_POST_FILT_S_0 -315 0x6000 //TX_A_POST_FILT_S_1 -316 0x4C00 //TX_A_POST_FILT_S_2 -317 0x4000 //TX_A_POST_FILT_S_3 -318 0x6000 //TX_A_POST_FILT_S_4 -319 0x4000 //TX_A_POST_FILT_S_5 -320 0x5000 //TX_A_POST_FILT_S_6 +315 0x4C00 //TX_A_POST_FILT_S_1 +316 0x4000 //TX_A_POST_FILT_S_2 +317 0x6000 //TX_A_POST_FILT_S_3 +318 0x4000 //TX_A_POST_FILT_S_4 +319 0x5000 //TX_A_POST_FILT_S_5 +320 0x6000 //TX_A_POST_FILT_S_6 321 0x7000 //TX_A_POST_FILT_S_7 322 0x2000 //TX_B_POST_FILT_0 -323 0x1000 //TX_B_POST_FILT_1 +323 0x2000 //TX_B_POST_FILT_1 324 0x2000 //TX_B_POST_FILT_2 -325 0x2000 //TX_B_POST_FILT_3 +325 0x4000 //TX_B_POST_FILT_3 326 0x4000 //TX_B_POST_FILT_4 -327 0x4000 //TX_B_POST_FILT_5 +327 0x1000 //TX_B_POST_FILT_5 328 0x1000 //TX_B_POST_FILT_6 329 0x2000 //TX_B_POST_FILT_7 330 0x4000 //TX_B_LESSCUT_RTO_S_0 @@ -47701,26 +72433,26 @@ 332 0x7FFF //TX_B_LESSCUT_RTO_S_2 333 0x7FFF //TX_B_LESSCUT_RTO_S_3 334 0x7FFF //TX_B_LESSCUT_RTO_S_4 -335 0x7FFF //TX_B_LESSCUT_RTO_S_5 -336 0x6000 //TX_B_LESSCUT_RTO_S_6 +335 0x6000 //TX_B_LESSCUT_RTO_S_5 +336 0x7FFF //TX_B_LESSCUT_RTO_S_6 337 0x7FFF //TX_B_LESSCUT_RTO_S_7 338 0x7C00 //TX_LAMBDA_PFILT 339 0x7C00 //TX_LAMBDA_PFILT_S_0 340 0x7C00 //TX_LAMBDA_PFILT_S_1 -341 0x7C00 //TX_LAMBDA_PFILT_S_2 -342 0x7A00 //TX_LAMBDA_PFILT_S_3 +341 0x7A00 //TX_LAMBDA_PFILT_S_2 +342 0x7C00 //TX_LAMBDA_PFILT_S_3 343 0x7C00 //TX_LAMBDA_PFILT_S_4 344 0x7C00 //TX_LAMBDA_PFILT_S_5 345 0x7C00 //TX_LAMBDA_PFILT_S_6 346 0x7C00 //TX_LAMBDA_PFILT_S_7 -347 0x0000 //TX_K_PEPPER +347 0x0180 //TX_K_PEPPER 348 0x0800 //TX_A_PEPPER 349 0x1EAA //TX_K_PEPPER_HF 350 0x0600 //TX_A_PEPPER_HF 351 0x0001 //TX_HMNC_BST_FLG 352 0x0200 //TX_HMNC_BST_THR -353 0x0200 //TX_DT_BINVAD_TH_0 -354 0x0200 //TX_DT_BINVAD_TH_1 +353 0x2000 //TX_DT_BINVAD_TH_0 +354 0x0800 //TX_DT_BINVAD_TH_1 355 0x0200 //TX_DT_BINVAD_TH_2 356 0x0200 //TX_DT_BINVAD_TH_3 357 0x1F40 //TX_DT_BINVAD_ENDF @@ -47733,7 +72465,7 @@ 364 0x0000 //TX_K_APT 365 0x0001 //TX_NOISEDET 366 0x0064 //TX_NDETCT -367 0x0050 //TX_NOISE_TH_0 +367 0x04E8 //TX_NOISE_TH_0 368 0x7FFF //TX_NOISE_TH_0_2 369 0x7FFF //TX_NOISE_TH_0_3 370 0x07D0 //TX_NOISE_TH_1 @@ -47745,11 +72477,11 @@ 376 0x0000 //TX_NOISE_TH_5_3 377 0x7FFF //TX_NOISE_TH_5_4 378 0x2710 //TX_NOISE_TH_6 -379 0x0033 //TX_MINENOISE_TH -380 0x4000 //TX_MINENOISE_MIC0_TH_MTS -381 0xFFEE //TX_MINENOISE_MIC0_TH_EXP -382 0x6000 //TX_MINENOISE_MIC0_S_TH_MTS -383 0xFFF3 //TX_MINENOISE_MIC0_S_TH_EXP +379 0x02BC //TX_MINENOISE_TH +380 0xD508 //TX_MORENS_TFMASK_TH +381 0x0001 //TX_DRC_QUIET_FLOOR +382 0x3A98 //TX_RATIODTL_CUT_TH +383 0x1482 //TX_DT_CUT_K1 384 0x0666 //TX_OUT_ENER_S_TH_CLEAN 385 0x0666 //TX_OUT_ENER_S_TH_LESSCLEAN 386 0x0333 //TX_OUT_ENER_S_TH_NOISY @@ -47757,22 +72489,22 @@ 388 0x0333 //TX_OUT_ENER_TH_SPEECH 389 0x2000 //TX_SN_NPB_GAIN 390 0x0000 //TX_NN_NPB_GAIN -391 0x0000 //TX_CSX_ALPHA_0 -392 0x0000 //TX_CSX_ALPHA_1 -393 0x0000 //TX_CSX_ALPHA_2 -394 0x0000 //TX_CSX_ALPHA_3 -395 0x0800 //TX_MU_ARSP_EST -396 0x00C8 //TX_P_OUTBEAM_MIN_TH +391 0x7FFF //TX_POST_MASK_SUP_HSNE +392 0x1388 //TX_TAIL_DET_TH +393 0x4000 //TX_B_LESSCUT_RTO_WTA +394 0x0000 //TX_MEL_G_R +395 0x0080 //TX_SUPHIGH_TH +396 0x0000 //TX_MASK_G_R 397 0x0002 //TX_EXTRA_NS_L -398 0x0800 //TX_EXTRA_NS_A -399 0x0005 //TX_VR_NOISE_FLOOR_TH +398 0x1800 //TX_C_POST_FLT_MASK +399 0x7FFF //TX_A_POST_FLT_WNS 400 0x0148 //TX_MIN_G_LOW300HZ -401 0x0002 //TX_MAXLEVEL_CNG +401 0x0004 //TX_MAXLEVEL_CNG 402 0x00B4 //TX_STN_NOISE_TH 403 0x4000 //TX_POST_MASK_SUP 404 0x7FFF //TX_POST_MASK_ADJUST 405 0x00C8 //TX_NS_ENOISE_MIC0_TH -406 0x0033 //TX_MINENOISE_MIC0_TH +406 0x04E7 //TX_MINENOISE_MIC0_TH 407 0x012C //TX_MINENOISE_MIC0_S_TH 408 0x7FFF //TX_MIN_G_CTRL_SSNS 409 0x0000 //TX_METAL_RTO_THR @@ -47880,16 +72612,16 @@ 511 0x6666 //TX_MIC_TO_BFGAIN 512 0x0000 //TX_MICTOBFGAIN0 513 0x0000 //TX_FASTMUE_TH -514 0x0000 //TX_DERVB_LEN_0 -515 0x0000 //TX_DERVB_LEN_1 -516 0x0000 //TX_RHO_DERVB -517 0x0000 //TX_MIC_INDX_DERVB -518 0x0000 //TX_MU_DERVB -519 0x0000 //TX_DR_RESRV_0 -520 0x0000 //TX_DR_RESRV_1 -521 0x0000 //TX_DR_RESRV_2 -522 0x0000 //TX_DR_RESRV_3 -523 0x0000 //TX_DR_RESRV_4 +514 0xC000 //TX_DEREVERB_LF_MU +515 0xC000 //TX_DEREVERB_HF_MU +516 0xCCCC //TX_DEREVERB_DELAY +517 0xD999 //TX_DEREVERB_COEF_LEN +518 0x1F40 //TX_DEREVERB_DNR +519 0x0000 //TX_DEREVERB_ALPHA +520 0x0000 //TX_DEREVERB_BETA +521 0x0000 //TX_GSC_RTOL_TH +522 0x7000 //TX_GSC_RTOH_TH +523 0x0064 //TX_WIDE2_MEANHTH 524 0x0000 //TX_DR_RESRV_5 525 0x0000 //TX_DR_RESRV_6 526 0x0000 //TX_DR_RESRV_7 @@ -47936,19 +72668,19 @@ 567 0x4848 //TX_FDEQ_GAIN_0 568 0x4848 //TX_FDEQ_GAIN_1 569 0x4848 //TX_FDEQ_GAIN_2 -570 0x4848 //TX_FDEQ_GAIN_3 -571 0x4848 //TX_FDEQ_GAIN_4 -572 0x4848 //TX_FDEQ_GAIN_5 -573 0x4848 //TX_FDEQ_GAIN_6 -574 0x4848 //TX_FDEQ_GAIN_7 -575 0x4848 //TX_FDEQ_GAIN_8 -576 0x4853 //TX_FDEQ_GAIN_9 -577 0x5450 //TX_FDEQ_GAIN_10 -578 0x7465 //TX_FDEQ_GAIN_11 -579 0x807F //TX_FDEQ_GAIN_12 -580 0x82C4 //TX_FDEQ_GAIN_13 -581 0xC4C4 //TX_FDEQ_GAIN_14 -582 0xC4C4 //TX_FDEQ_GAIN_15 +570 0x484C //TX_FDEQ_GAIN_3 +571 0x4C4C //TX_FDEQ_GAIN_4 +572 0x544C //TX_FDEQ_GAIN_5 +573 0x5454 //TX_FDEQ_GAIN_6 +574 0x5454 //TX_FDEQ_GAIN_7 +575 0x585A //TX_FDEQ_GAIN_8 +576 0x5C5C //TX_FDEQ_GAIN_9 +577 0x6068 //TX_FDEQ_GAIN_10 +578 0x8894 //TX_FDEQ_GAIN_11 +579 0x94B4 //TX_FDEQ_GAIN_12 +580 0xB4C7 //TX_FDEQ_GAIN_13 +581 0xC7C6 //TX_FDEQ_GAIN_14 +582 0xC6C6 //TX_FDEQ_GAIN_15 583 0x4848 //TX_FDEQ_GAIN_16 584 0x4848 //TX_FDEQ_GAIN_17 585 0x4848 //TX_FDEQ_GAIN_18 @@ -47982,24 +72714,24 @@ 613 0x0000 //TX_FDEQ_BIN_22 614 0x0000 //TX_FDEQ_BIN_23 615 0x0000 //TX_FDEQ_PADDING -616 0x0020 //TX_PREEQ_SUBNUM_MIC0 +616 0x0030 //TX_PREEQ_SUBNUM_MIC0 617 0x4848 //TX_PREEQ_GAIN_MIC0_0 618 0x4848 //TX_PREEQ_GAIN_MIC0_1 619 0x4848 //TX_PREEQ_GAIN_MIC0_2 620 0x4848 //TX_PREEQ_GAIN_MIC0_3 621 0x4848 //TX_PREEQ_GAIN_MIC0_4 622 0x4848 //TX_PREEQ_GAIN_MIC0_5 -623 0x4A4C //TX_PREEQ_GAIN_MIC0_6 -624 0x4E50 //TX_PREEQ_GAIN_MIC0_7 -625 0x5456 //TX_PREEQ_GAIN_MIC0_8 -626 0x585C //TX_PREEQ_GAIN_MIC0_9 -627 0x5C64 //TX_PREEQ_GAIN_MIC0_10 -628 0x7478 //TX_PREEQ_GAIN_MIC0_11 -629 0x705C //TX_PREEQ_GAIN_MIC0_12 -630 0x4838 //TX_PREEQ_GAIN_MIC0_13 -631 0x3C70 //TX_PREEQ_GAIN_MIC0_14 -632 0x4848 //TX_PREEQ_GAIN_MIC0_15 -633 0x4848 //TX_PREEQ_GAIN_MIC0_16 +623 0x4849 //TX_PREEQ_GAIN_MIC0_6 +624 0x4A4B //TX_PREEQ_GAIN_MIC0_7 +625 0x4C4B //TX_PREEQ_GAIN_MIC0_8 +626 0x4A48 //TX_PREEQ_GAIN_MIC0_9 +627 0x4B4C //TX_PREEQ_GAIN_MIC0_10 +628 0x4C4B //TX_PREEQ_GAIN_MIC0_11 +629 0x4838 //TX_PREEQ_GAIN_MIC0_12 +630 0x3858 //TX_PREEQ_GAIN_MIC0_13 +631 0x7060 //TX_PREEQ_GAIN_MIC0_14 +632 0x9870 //TX_PREEQ_GAIN_MIC0_15 +633 0x5848 //TX_PREEQ_GAIN_MIC0_16 634 0x4848 //TX_PREEQ_GAIN_MIC0_17 635 0x4848 //TX_PREEQ_GAIN_MIC0_18 636 0x4848 //TX_PREEQ_GAIN_MIC0_19 @@ -48013,17 +72745,17 @@ 644 0x0304 //TX_PREEQ_BIN_MIC0_3 645 0x0405 //TX_PREEQ_BIN_MIC0_4 646 0x0506 //TX_PREEQ_BIN_MIC0_5 -647 0x0708 //TX_PREEQ_BIN_MIC0_6 -648 0x0909 //TX_PREEQ_BIN_MIC0_7 -649 0x090B //TX_PREEQ_BIN_MIC0_8 +647 0x0808 //TX_PREEQ_BIN_MIC0_6 +648 0x0809 //TX_PREEQ_BIN_MIC0_7 +649 0x0A0A //TX_PREEQ_BIN_MIC0_8 650 0x0C10 //TX_PREEQ_BIN_MIC0_9 651 0x1013 //TX_PREEQ_BIN_MIC0_10 652 0x1414 //TX_PREEQ_BIN_MIC0_11 -653 0x1414 //TX_PREEQ_BIN_MIC0_12 -654 0x1C1E //TX_PREEQ_BIN_MIC0_13 -655 0x1E28 //TX_PREEQ_BIN_MIC0_14 -656 0x462C //TX_PREEQ_BIN_MIC0_15 -657 0x0000 //TX_PREEQ_BIN_MIC0_16 +653 0x261E //TX_PREEQ_BIN_MIC0_12 +654 0x1E14 //TX_PREEQ_BIN_MIC0_13 +655 0x1414 //TX_PREEQ_BIN_MIC0_14 +656 0x2814 //TX_PREEQ_BIN_MIC0_15 +657 0x4000 //TX_PREEQ_BIN_MIC0_16 658 0x0000 //TX_PREEQ_BIN_MIC0_17 659 0x0000 //TX_PREEQ_BIN_MIC0_18 660 0x0000 //TX_PREEQ_BIN_MIC0_19 @@ -48038,15 +72770,15 @@ 669 0x4848 //TX_PREEQ_GAIN_MIC1_3 670 0x4848 //TX_PREEQ_GAIN_MIC1_4 671 0x4848 //TX_PREEQ_GAIN_MIC1_5 -672 0x4848 //TX_PREEQ_GAIN_MIC1_6 -673 0x4848 //TX_PREEQ_GAIN_MIC1_7 -674 0x4848 //TX_PREEQ_GAIN_MIC1_8 -675 0x4848 //TX_PREEQ_GAIN_MIC1_9 -676 0x4848 //TX_PREEQ_GAIN_MIC1_10 -677 0x4848 //TX_PREEQ_GAIN_MIC1_11 -678 0x4848 //TX_PREEQ_GAIN_MIC1_12 -679 0x4848 //TX_PREEQ_GAIN_MIC1_13 -680 0x4848 //TX_PREEQ_GAIN_MIC1_14 +672 0x4645 //TX_PREEQ_GAIN_MIC1_6 +673 0x4442 //TX_PREEQ_GAIN_MIC1_7 +674 0x4140 //TX_PREEQ_GAIN_MIC1_8 +675 0x3E3D //TX_PREEQ_GAIN_MIC1_9 +676 0x3C3C //TX_PREEQ_GAIN_MIC1_10 +677 0x3C3C //TX_PREEQ_GAIN_MIC1_11 +678 0x3938 //TX_PREEQ_GAIN_MIC1_12 +679 0x3A3C //TX_PREEQ_GAIN_MIC1_13 +680 0x3C3E //TX_PREEQ_GAIN_MIC1_14 681 0x4848 //TX_PREEQ_GAIN_MIC1_15 682 0x4848 //TX_PREEQ_GAIN_MIC1_16 683 0x4848 //TX_PREEQ_GAIN_MIC1_17 @@ -48056,23 +72788,23 @@ 687 0x4848 //TX_PREEQ_GAIN_MIC1_21 688 0x4848 //TX_PREEQ_GAIN_MIC1_22 689 0x4848 //TX_PREEQ_GAIN_MIC1_23 -690 0x1812 //TX_PREEQ_BIN_MIC1_0 -691 0x0A0A //TX_PREEQ_BIN_MIC1_1 -692 0x0808 //TX_PREEQ_BIN_MIC1_2 -693 0x080A //TX_PREEQ_BIN_MIC1_3 -694 0x0B09 //TX_PREEQ_BIN_MIC1_4 -695 0x0A06 //TX_PREEQ_BIN_MIC1_5 -696 0x0606 //TX_PREEQ_BIN_MIC1_6 -697 0x0605 //TX_PREEQ_BIN_MIC1_7 -698 0x050A //TX_PREEQ_BIN_MIC1_8 -699 0x1505 //TX_PREEQ_BIN_MIC1_9 -700 0x0506 //TX_PREEQ_BIN_MIC1_10 -701 0x0615 //TX_PREEQ_BIN_MIC1_11 -702 0x1516 //TX_PREEQ_BIN_MIC1_12 -703 0x2021 //TX_PREEQ_BIN_MIC1_13 -704 0x2021 //TX_PREEQ_BIN_MIC1_14 -705 0x2021 //TX_PREEQ_BIN_MIC1_15 -706 0x0800 //TX_PREEQ_BIN_MIC1_16 +690 0x0202 //TX_PREEQ_BIN_MIC1_0 +691 0x0203 //TX_PREEQ_BIN_MIC1_1 +692 0x0303 //TX_PREEQ_BIN_MIC1_2 +693 0x0304 //TX_PREEQ_BIN_MIC1_3 +694 0x0405 //TX_PREEQ_BIN_MIC1_4 +695 0x0506 //TX_PREEQ_BIN_MIC1_5 +696 0x0808 //TX_PREEQ_BIN_MIC1_6 +697 0x0809 //TX_PREEQ_BIN_MIC1_7 +698 0x0A0A //TX_PREEQ_BIN_MIC1_8 +699 0x0C10 //TX_PREEQ_BIN_MIC1_9 +700 0x1013 //TX_PREEQ_BIN_MIC1_10 +701 0x1414 //TX_PREEQ_BIN_MIC1_11 +702 0x261E //TX_PREEQ_BIN_MIC1_12 +703 0x1E14 //TX_PREEQ_BIN_MIC1_13 +704 0x1414 //TX_PREEQ_BIN_MIC1_14 +705 0x2814 //TX_PREEQ_BIN_MIC1_15 +706 0x4000 //TX_PREEQ_BIN_MIC1_16 707 0x0000 //TX_PREEQ_BIN_MIC1_17 708 0x0000 //TX_PREEQ_BIN_MIC1_18 709 0x0000 //TX_PREEQ_BIN_MIC1_19 @@ -48157,7 +72889,7 @@ 788 0x7EB8 //TX_TDDRC_ALPHA_DWN_02 789 0x7EB8 //TX_TDDRC_ALPHA_DWN_03 790 0x7EB8 //TX_TDDRC_ALPHA_DWN_04 -791 0x7FFF //TX_TDDRC_TD_DRC_LIMIT +791 0x7214 //TX_TDDRC_TD_DRC_LIMIT 792 0x0800 //TX_TDDRC_POST_LIMIT_GAIN 793 0x0000 //TX_TDDRC_RESRV_0 794 0x0000 //TX_TDDRC_RESRV_1 @@ -48219,20 +72951,20 @@ 850 0x0000 //TX_FFP_RESRV_4 851 0x0000 //TX_FFP_RESRV_5 852 0x0000 //TX_FFP_RESRV_6 -853 0x0004 //TX_FILTINDX +853 0x0002 //TX_FILTINDX 854 0x0004 //TX_TDDRC_THRD_0 855 0x0016 //TX_TDDRC_THRD_1 -856 0x1900 //TX_TDDRC_THRD_2 -857 0x1900 //TX_TDDRC_THRD_3 -858 0x3000 //TX_TDDRC_SLANT_0 -859 0x7B00 //TX_TDDRC_SLANT_1 +856 0x1800 //TX_TDDRC_THRD_2 +857 0x1800 //TX_TDDRC_THRD_3 +858 0x7FFF //TX_TDDRC_SLANT_0 +859 0x7FFF //TX_TDDRC_SLANT_1 860 0x0C00 //TX_TDDRC_ALPHA_UP_00 861 0x7EB8 //TX_TDDRC_ALPHA_DWN_00 862 0x0000 //TX_TDDRC_HMNC_FLAG 863 0x199A //TX_TDDRC_HMNC_GAIN 864 0x0000 //TX_TDDRC_SMT_FLAG 865 0x0CCD //TX_TDDRC_SMT_W -866 0x0A98 //TX_TDDRC_DRC_GAIN +866 0x0B39 //TX_TDDRC_DRC_GAIN 867 0x7FFF //TX_TDDRC_LMT_THRD 868 0x0000 //TX_TDDRC_LMT_ALPHA 869 0x0000 //TX_TFMASKLTH @@ -48257,14 +72989,79 @@ 888 0x0028 //TX_FASTNS_ARSPC_TH 889 0xC000 //TX_FASTNS_MASK5_TH 890 0x4848 //TX_POSTSSA_MIN_G_VR_MASK -891 0x1000 //TX_A_LESSCUT_RTO_MASK +891 0x7000 //TX_A_LESSCUT_RTO_MASK 892 0x1770 //TX_FASTNS_NOISETH 893 0xC000 //TX_FASTNS_SSA_THLFL 894 0xC000 //TX_FASTNS_SSA_THHFL 895 0xCCCC //TX_FASTNS_SSA_THLFH 896 0xD999 //TX_FASTNS_SSA_THHFH +897 0x2339 //TX_SENDFUNC_REG_MICMUTE +898 0x0021 //TX_SENDFUNC_REG_MICMUTE1 +899 0x02BC //TX_MICMUTE_RATIO_THR +900 0x0140 //TX_MICMUTE_AMP_THR +901 0x0004 //TX_MICMUTE_HPF_IND +902 0x00C0 //TX_MICMUTE_LOG_EYR_TH +903 0x0008 //TX_MICMUTE_CVG_TIME +904 0x0008 //TX_MICMUTE_RELEASE_TIME +905 0x01FE //TX_MIC_VOLUME_MIC0MUTE +906 0x0020 //TX_MICMUTE_EPD_OFFSET_0 +907 0x001E //TX_MICMUTE_FRQ_AEC_L +908 0x7999 //TX_MICMUTE_EAD_THR +909 0x7FFF //TX_MICMUTE_LAMBDA_CB_NLE +910 0x7FFF //TX_MICMUTE_LAMBDA_RE_EST +911 0x4000 //TX_DTD_THR1_MICMUTE_0 +912 0x7000 //TX_DTD_THR1_MICMUTE_1 +913 0x7FFF //TX_DTD_THR1_MICMUTE_2 +914 0x7FFF //TX_DTD_THR1_MICMUTE_3 +915 0x6CCC //TX_DTD_THR2_MICMUTE_0 +916 0x0400 //TX_MICMUTE_MIN_EQ_RE_EST_0 +917 0x0400 //TX_MICMUTE_MIN_EQ_RE_EST_1 +918 0x1000 //TX_MICMUTE_MIN_EQ_RE_EST_2 +919 0x7FFF //TX_MICMUTE_MIN_EQ_RE_EST_3 +920 0x7FFF //TX_MICMUTE_MIN_EQ_RE_EST_4 +921 0x4000 //TX_MICMUTE_C_POST_FLT +922 0x03E8 //TX_MICMUTE_DT_CUT_K +923 0x0001 //TX_MICMUTE_DT_CUT_THR +924 0x03E8 //TX_MICMUTE_DT_CUT_K2 +925 0x0001 //TX_MICMUTE_DT_CUT_THR2 +926 0x0064 //TX_MICMUTE_DT2_HOLD_N +927 0x1000 //TX_MICMUTE_RATIODTH_THCUT +928 0x1000 //TX_MICMUTE_B_POST_FLT_ECHOL +929 0x7FFF //TX_MICMUTE_B_POST_FLT_ECHOH +930 0x0400 //TX_MICMUTE_C_POST_FLT_MASK +931 0x7999 //TX_MICMUTE_RATIODTL_CUT_TH +932 0x0258 //TX_MICMUTE_DT_CUT_K1 +933 0x0800 //TX_MICMUTE_N2_SN_EST +934 0xFC00 //TX_MICMUTE_THR_SN_EST_0 +935 0x001C //TX_MICMUTE_MIN_G_CTRL_0 +936 0x6000 //TX_MICMUTE_A_POST_FILT_S_0 +937 0x7000 //TX_MICMUTE_B_POST_FILT_0 +938 0x2710 //TX_MIC1RUB_AMP_THR +939 0x0010 //TX_MIC1MUTE_RATIO_THR +940 0x0450 //TX_MIC1MUTE_AMP_THR +941 0x0008 //TX_MIC1MUTE_CVG_TIME +942 0x0008 //TX_MIC1MUTE_RELEASE_TIME +943 0x0000 //TX_AMS_RESRV_01 +944 0x0000 //TX_AMS_RESRV_02 +945 0x0000 //TX_AMS_RESRV_03 +946 0x0000 //TX_AMS_RESRV_04 +947 0x0000 //TX_AMS_RESRV_05 +948 0x0000 //TX_AMS_RESRV_06 +949 0x0000 //TX_AMS_RESRV_07 +950 0x0000 //TX_AMS_RESRV_08 +951 0x0000 //TX_AMS_RESRV_09 +952 0x0000 //TX_AMS_RESRV_10 +953 0x0000 //TX_AMS_RESRV_11 +954 0x0000 //TX_AMS_RESRV_12 +955 0x0000 //TX_AMS_RESRV_13 +956 0x0000 //TX_AMS_RESRV_14 +957 0x0000 //TX_AMS_RESRV_15 +958 0x0000 //TX_AMS_RESRV_16 +959 0x0000 //TX_AMS_RESRV_17 +960 0x0000 //TX_AMS_RESRV_18 +961 0x0000 //TX_AMS_RESRV_19 #RX -0 0x0040 //RX_RECVFUNC_MODE_0 +0 0x2040 //RX_RECVFUNC_MODE_0 1 0x0000 //RX_RECVFUNC_MODE_1 2 0x0000 //RX_SAMPLINGFREQ_SIG 3 0x0000 //RX_SAMPLINGFREQ_PROC @@ -49114,11 +73911,862 @@ 110 0x0000 //RX_FDDRC_RESRV_0 129 0x0100 //RX_SPK_VOL 130 0x0000 //RX_VOL_RESRV_0 +#RX 2 +157 0x2040 //RX_RECVFUNC_MODE_0 +158 0x0000 //RX_RECVFUNC_MODE_1 +159 0x0000 //RX_SAMPLINGFREQ_SIG +160 0x0000 //RX_SAMPLINGFREQ_PROC +161 0x000A //RX_FRAME_SZ +162 0x0000 //RX_DELAY_OPT +163 0x3000 //RX_TDDRC_ALPHA_UP_1 +164 0x3000 //RX_TDDRC_ALPHA_UP_2 +165 0x3000 //RX_TDDRC_ALPHA_UP_3 +166 0x3000 //RX_TDDRC_ALPHA_UP_4 +167 0x050D //RX_PGA +168 0x7652 //RX_A_HP +169 0x4000 //RX_B_PE +170 0x7800 //RX_THR_PITCH_DET_0 +171 0x7000 //RX_THR_PITCH_DET_1 +172 0x6000 //RX_THR_PITCH_DET_2 +173 0x0000 //RX_PITCH_BFR_LEN +174 0x0000 //RX_SBD_PITCH_DET +175 0x0000 //RX_PP_RESRV_0 +176 0x0000 //RX_PP_RESRV_1 +177 0xF800 //RX_N_SN_EST +178 0x0000 //RX_N2_SN_EST +179 0x000F //RX_NS_LVL_CTRL +180 0xF800 //RX_THR_SN_EST +181 0x7E00 //RX_LAMBDA_PFILT +182 0x000A //RX_FENS_RESRV_0 +183 0x0000 //RX_FENS_RESRV_1 +184 0x7FB0 //RX_TDDRC_ALPHA_DWN_1 +185 0x7FB0 //RX_TDDRC_ALPHA_DWN_2 +186 0x7FB0 //RX_TDDRC_ALPHA_DWN_3 +187 0x0000 //RX_EXTRA_NS_L +188 0x0000 //RX_EXTRA_NS_A +189 0x7FB0 //RX_TDDRC_ALPHA_DWN_4 +190 0xDA9E //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +192 0x0000 //RX_A_POST_FLT +193 0x0000 //RX_LMT_THRD +194 0x4000 //RX_LMT_ALPHA +195 0x0020 //RX_FDEQ_SUBNUM +196 0x4848 //RX_FDEQ_GAIN_0 +197 0x4848 //RX_FDEQ_GAIN_1 +198 0x4848 //RX_FDEQ_GAIN_2 +199 0x4848 //RX_FDEQ_GAIN_3 +200 0x4848 //RX_FDEQ_GAIN_4 +201 0x4848 //RX_FDEQ_GAIN_5 +202 0x4848 //RX_FDEQ_GAIN_6 +203 0x4848 //RX_FDEQ_GAIN_7 +204 0x4848 //RX_FDEQ_GAIN_8 +205 0x4848 //RX_FDEQ_GAIN_9 +206 0x4848 //RX_FDEQ_GAIN_10 +207 0x4848 //RX_FDEQ_GAIN_11 +208 0x4848 //RX_FDEQ_GAIN_12 +209 0x4848 //RX_FDEQ_GAIN_13 +210 0x4848 //RX_FDEQ_GAIN_14 +211 0x4848 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0000 //RX_FDEQ_BIN_0 +221 0x0000 //RX_FDEQ_BIN_1 +222 0x0000 //RX_FDEQ_BIN_2 +223 0x0000 //RX_FDEQ_BIN_3 +224 0x0000 //RX_FDEQ_BIN_4 +225 0x0000 //RX_FDEQ_BIN_5 +226 0x0000 //RX_FDEQ_BIN_6 +227 0x0000 //RX_FDEQ_BIN_7 +228 0x0000 //RX_FDEQ_BIN_8 +229 0x0000 //RX_FDEQ_BIN_9 +230 0x0000 //RX_FDEQ_BIN_10 +231 0x0000 //RX_FDEQ_BIN_11 +232 0x0000 //RX_FDEQ_BIN_12 +233 0x0000 //RX_FDEQ_BIN_13 +234 0x0000 //RX_FDEQ_BIN_14 +235 0x0000 //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x0000 //RX_FDEQ_RESRV_0 +245 0x0000 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0030 //RX_FDDRC_BAND_MARGIN_1 +248 0x0050 //RX_FDDRC_BAND_MARGIN_2 +249 0x0080 //RX_FDDRC_BAND_MARGIN_3 +250 0x0004 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x5000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x6400 //RX_FDDRC_THRD_3_2 +258 0x6400 //RX_FDDRC_THRD_3_3 +259 0x2000 //RX_FDDRC_SLANT_0_0 +260 0x2000 //RX_FDDRC_SLANT_0_1 +261 0x2000 //RX_FDDRC_SLANT_0_2 +262 0x2000 //RX_FDDRC_SLANT_0_3 +263 0x2000 //RX_FDDRC_SLANT_1_0 +264 0x2000 //RX_FDDRC_SLANT_1_1 +265 0x2000 //RX_FDDRC_SLANT_1_2 +266 0x2000 //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +268 0x0003 //RX_FILTINDX +269 0x0000 //RX_TDDRC_THRD_0 +270 0x0000 //RX_TDDRC_THRD_1 +271 0x0E80 //RX_TDDRC_THRD_2 +272 0x3800 //RX_TDDRC_THRD_3 +273 0x2A00 //RX_TDDRC_SLANT_0 +274 0x6E00 //RX_TDDRC_SLANT_1 +275 0x3000 //RX_TDDRC_ALPHA_UP_0 +276 0x7FB0 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x0000 //RX_TDDRC_HMNC_GAIN +279 0x0000 //RX_TDDRC_SMT_FLAG +280 0x0000 //RX_TDDRC_SMT_W +281 0x0100 //RX_TDDRC_DRC_GAIN +282 0x7C00 //RX_LAMBDA_PKA_FP +283 0x2000 //RX_TPKA_FP +284 0x0080 //RX_MIN_G_FP +285 0x2000 //RX_MAX_G_FP +286 0x0100 //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 +288 0x0010 //RX_MAXLEVEL_CNG +289 0x0000 //RX_BWE_UV_TH +290 0x0000 //RX_BWE_UV_TH2 +291 0x0000 //RX_BWE_UV_TH3 +292 0x0000 //RX_BWE_V_TH +293 0x0000 //RX_BWE_GAIN1_V_TH1 +294 0x0000 //RX_BWE_GAIN1_V_TH2 +295 0x0000 //RX_BWE_UV_EQ +296 0x0000 //RX_BWE_V_EQ +297 0x0000 //RX_BWE_TONE_TH +298 0x0000 //RX_BWE_UV_HOLD_T +299 0x0000 //RX_BWE_GAIN2_ALPHA +300 0x0000 //RX_BWE_GAIN3_ALPHA +301 0x0000 //RX_BWE_CUTOFF +302 0x0000 //RX_BWE_GAINFILL +303 0x0000 //RX_BWE_MAXTH_TONE +304 0x0000 //RX_BWE_EQ_0 +305 0x0000 //RX_BWE_EQ_1 +306 0x0000 //RX_BWE_EQ_2 +307 0x0000 //RX_BWE_EQ_3 +308 0x0000 //RX_BWE_EQ_4 +309 0x0000 //RX_BWE_EQ_5 +310 0x0000 //RX_BWE_EQ_6 +311 0x0000 //RX_BWE_RESRV_0 +312 0x0000 //RX_BWE_RESRV_1 +313 0x0000 //RX_BWE_RESRV_2 +#VOL 0 +163 0x3000 //RX_TDDRC_ALPHA_UP_1 +164 0x3000 //RX_TDDRC_ALPHA_UP_2 +165 0x3000 //RX_TDDRC_ALPHA_UP_3 +166 0x3000 //RX_TDDRC_ALPHA_UP_4 +184 0x7FB0 //RX_TDDRC_ALPHA_DWN_1 +185 0x7FB0 //RX_TDDRC_ALPHA_DWN_2 +186 0x7FB0 //RX_TDDRC_ALPHA_DWN_3 +189 0x7FB0 //RX_TDDRC_ALPHA_DWN_4 +190 0xDA9E //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +269 0x0000 //RX_TDDRC_THRD_0 +270 0x0000 //RX_TDDRC_THRD_1 +271 0x0E80 //RX_TDDRC_THRD_2 +272 0x3800 //RX_TDDRC_THRD_3 +273 0x2A00 //RX_TDDRC_SLANT_0 +274 0x6E00 //RX_TDDRC_SLANT_1 +275 0x3000 //RX_TDDRC_ALPHA_UP_0 +276 0x7FB0 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x0000 //RX_TDDRC_HMNC_GAIN +279 0x0000 //RX_TDDRC_SMT_FLAG +280 0x0000 //RX_TDDRC_SMT_W +281 0x0100 //RX_TDDRC_DRC_GAIN +195 0x0020 //RX_FDEQ_SUBNUM +196 0x4848 //RX_FDEQ_GAIN_0 +197 0x4848 //RX_FDEQ_GAIN_1 +198 0x4848 //RX_FDEQ_GAIN_2 +199 0x4848 //RX_FDEQ_GAIN_3 +200 0x4848 //RX_FDEQ_GAIN_4 +201 0x4848 //RX_FDEQ_GAIN_5 +202 0x4848 //RX_FDEQ_GAIN_6 +203 0x4848 //RX_FDEQ_GAIN_7 +204 0x4848 //RX_FDEQ_GAIN_8 +205 0x4848 //RX_FDEQ_GAIN_9 +206 0x4848 //RX_FDEQ_GAIN_10 +207 0x4848 //RX_FDEQ_GAIN_11 +208 0x4848 //RX_FDEQ_GAIN_12 +209 0x4848 //RX_FDEQ_GAIN_13 +210 0x4848 //RX_FDEQ_GAIN_14 +211 0x4848 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0000 //RX_FDEQ_BIN_0 +221 0x0000 //RX_FDEQ_BIN_1 +222 0x0000 //RX_FDEQ_BIN_2 +223 0x0000 //RX_FDEQ_BIN_3 +224 0x0000 //RX_FDEQ_BIN_4 +225 0x0000 //RX_FDEQ_BIN_5 +226 0x0000 //RX_FDEQ_BIN_6 +227 0x0000 //RX_FDEQ_BIN_7 +228 0x0000 //RX_FDEQ_BIN_8 +229 0x0000 //RX_FDEQ_BIN_9 +230 0x0000 //RX_FDEQ_BIN_10 +231 0x0000 //RX_FDEQ_BIN_11 +232 0x0000 //RX_FDEQ_BIN_12 +233 0x0000 //RX_FDEQ_BIN_13 +234 0x0000 //RX_FDEQ_BIN_14 +235 0x0000 //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x0000 //RX_FDEQ_RESRV_0 +245 0x0000 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0030 //RX_FDDRC_BAND_MARGIN_1 +248 0x0050 //RX_FDDRC_BAND_MARGIN_2 +249 0x0080 //RX_FDDRC_BAND_MARGIN_3 +250 0x0004 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x5000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x6400 //RX_FDDRC_THRD_3_2 +258 0x6400 //RX_FDDRC_THRD_3_3 +259 0x2000 //RX_FDDRC_SLANT_0_0 +260 0x2000 //RX_FDDRC_SLANT_0_1 +261 0x2000 //RX_FDDRC_SLANT_0_2 +262 0x2000 //RX_FDDRC_SLANT_0_3 +263 0x2000 //RX_FDDRC_SLANT_1_0 +264 0x2000 //RX_FDDRC_SLANT_1_1 +265 0x2000 //RX_FDDRC_SLANT_1_2 +266 0x2000 //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +286 0x0100 //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 +#VOL 1 +163 0x3000 //RX_TDDRC_ALPHA_UP_1 +164 0x3000 //RX_TDDRC_ALPHA_UP_2 +165 0x3000 //RX_TDDRC_ALPHA_UP_3 +166 0x3000 //RX_TDDRC_ALPHA_UP_4 +184 0x7FB0 //RX_TDDRC_ALPHA_DWN_1 +185 0x7FB0 //RX_TDDRC_ALPHA_DWN_2 +186 0x7FB0 //RX_TDDRC_ALPHA_DWN_3 +189 0x7FB0 //RX_TDDRC_ALPHA_DWN_4 +190 0xDA9E //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +269 0x0000 //RX_TDDRC_THRD_0 +270 0x0000 //RX_TDDRC_THRD_1 +271 0x0E80 //RX_TDDRC_THRD_2 +272 0x3800 //RX_TDDRC_THRD_3 +273 0x2A00 //RX_TDDRC_SLANT_0 +274 0x6E00 //RX_TDDRC_SLANT_1 +275 0x3000 //RX_TDDRC_ALPHA_UP_0 +276 0x7FB0 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x0000 //RX_TDDRC_HMNC_GAIN +279 0x0000 //RX_TDDRC_SMT_FLAG +280 0x0000 //RX_TDDRC_SMT_W +281 0x0100 //RX_TDDRC_DRC_GAIN +195 0x0020 //RX_FDEQ_SUBNUM +196 0x4848 //RX_FDEQ_GAIN_0 +197 0x4848 //RX_FDEQ_GAIN_1 +198 0x4848 //RX_FDEQ_GAIN_2 +199 0x4848 //RX_FDEQ_GAIN_3 +200 0x4848 //RX_FDEQ_GAIN_4 +201 0x4848 //RX_FDEQ_GAIN_5 +202 0x4848 //RX_FDEQ_GAIN_6 +203 0x4848 //RX_FDEQ_GAIN_7 +204 0x4848 //RX_FDEQ_GAIN_8 +205 0x4848 //RX_FDEQ_GAIN_9 +206 0x4848 //RX_FDEQ_GAIN_10 +207 0x4848 //RX_FDEQ_GAIN_11 +208 0x4848 //RX_FDEQ_GAIN_12 +209 0x4848 //RX_FDEQ_GAIN_13 +210 0x4848 //RX_FDEQ_GAIN_14 +211 0x4848 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0000 //RX_FDEQ_BIN_0 +221 0x0000 //RX_FDEQ_BIN_1 +222 0x0000 //RX_FDEQ_BIN_2 +223 0x0000 //RX_FDEQ_BIN_3 +224 0x0000 //RX_FDEQ_BIN_4 +225 0x0000 //RX_FDEQ_BIN_5 +226 0x0000 //RX_FDEQ_BIN_6 +227 0x0000 //RX_FDEQ_BIN_7 +228 0x0000 //RX_FDEQ_BIN_8 +229 0x0000 //RX_FDEQ_BIN_9 +230 0x0000 //RX_FDEQ_BIN_10 +231 0x0000 //RX_FDEQ_BIN_11 +232 0x0000 //RX_FDEQ_BIN_12 +233 0x0000 //RX_FDEQ_BIN_13 +234 0x0000 //RX_FDEQ_BIN_14 +235 0x0000 //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x0000 //RX_FDEQ_RESRV_0 +245 0x0000 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0030 //RX_FDDRC_BAND_MARGIN_1 +248 0x0050 //RX_FDDRC_BAND_MARGIN_2 +249 0x0080 //RX_FDDRC_BAND_MARGIN_3 +250 0x0004 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x5000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x6400 //RX_FDDRC_THRD_3_2 +258 0x6400 //RX_FDDRC_THRD_3_3 +259 0x2000 //RX_FDDRC_SLANT_0_0 +260 0x2000 //RX_FDDRC_SLANT_0_1 +261 0x2000 //RX_FDDRC_SLANT_0_2 +262 0x2000 //RX_FDDRC_SLANT_0_3 +263 0x2000 //RX_FDDRC_SLANT_1_0 +264 0x2000 //RX_FDDRC_SLANT_1_1 +265 0x2000 //RX_FDDRC_SLANT_1_2 +266 0x2000 //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +286 0x0100 //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 +#VOL 2 +163 0x3000 //RX_TDDRC_ALPHA_UP_1 +164 0x3000 //RX_TDDRC_ALPHA_UP_2 +165 0x3000 //RX_TDDRC_ALPHA_UP_3 +166 0x3000 //RX_TDDRC_ALPHA_UP_4 +184 0x7FB0 //RX_TDDRC_ALPHA_DWN_1 +185 0x7FB0 //RX_TDDRC_ALPHA_DWN_2 +186 0x7FB0 //RX_TDDRC_ALPHA_DWN_3 +189 0x7FB0 //RX_TDDRC_ALPHA_DWN_4 +190 0xDA9E //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +269 0x0000 //RX_TDDRC_THRD_0 +270 0x0000 //RX_TDDRC_THRD_1 +271 0x0E80 //RX_TDDRC_THRD_2 +272 0x3800 //RX_TDDRC_THRD_3 +273 0x2A00 //RX_TDDRC_SLANT_0 +274 0x6E00 //RX_TDDRC_SLANT_1 +275 0x3000 //RX_TDDRC_ALPHA_UP_0 +276 0x7FB0 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x0000 //RX_TDDRC_HMNC_GAIN +279 0x0000 //RX_TDDRC_SMT_FLAG +280 0x0000 //RX_TDDRC_SMT_W +281 0x0100 //RX_TDDRC_DRC_GAIN +195 0x0020 //RX_FDEQ_SUBNUM +196 0x4848 //RX_FDEQ_GAIN_0 +197 0x4848 //RX_FDEQ_GAIN_1 +198 0x4848 //RX_FDEQ_GAIN_2 +199 0x4848 //RX_FDEQ_GAIN_3 +200 0x4848 //RX_FDEQ_GAIN_4 +201 0x4848 //RX_FDEQ_GAIN_5 +202 0x4848 //RX_FDEQ_GAIN_6 +203 0x4848 //RX_FDEQ_GAIN_7 +204 0x4848 //RX_FDEQ_GAIN_8 +205 0x4848 //RX_FDEQ_GAIN_9 +206 0x4848 //RX_FDEQ_GAIN_10 +207 0x4848 //RX_FDEQ_GAIN_11 +208 0x4848 //RX_FDEQ_GAIN_12 +209 0x4848 //RX_FDEQ_GAIN_13 +210 0x4848 //RX_FDEQ_GAIN_14 +211 0x4848 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0000 //RX_FDEQ_BIN_0 +221 0x0000 //RX_FDEQ_BIN_1 +222 0x0000 //RX_FDEQ_BIN_2 +223 0x0000 //RX_FDEQ_BIN_3 +224 0x0000 //RX_FDEQ_BIN_4 +225 0x0000 //RX_FDEQ_BIN_5 +226 0x0000 //RX_FDEQ_BIN_6 +227 0x0000 //RX_FDEQ_BIN_7 +228 0x0000 //RX_FDEQ_BIN_8 +229 0x0000 //RX_FDEQ_BIN_9 +230 0x0000 //RX_FDEQ_BIN_10 +231 0x0000 //RX_FDEQ_BIN_11 +232 0x0000 //RX_FDEQ_BIN_12 +233 0x0000 //RX_FDEQ_BIN_13 +234 0x0000 //RX_FDEQ_BIN_14 +235 0x0000 //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x0000 //RX_FDEQ_RESRV_0 +245 0x0000 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0030 //RX_FDDRC_BAND_MARGIN_1 +248 0x0050 //RX_FDDRC_BAND_MARGIN_2 +249 0x0080 //RX_FDDRC_BAND_MARGIN_3 +250 0x0004 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x5000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x6400 //RX_FDDRC_THRD_3_2 +258 0x6400 //RX_FDDRC_THRD_3_3 +259 0x2000 //RX_FDDRC_SLANT_0_0 +260 0x2000 //RX_FDDRC_SLANT_0_1 +261 0x2000 //RX_FDDRC_SLANT_0_2 +262 0x2000 //RX_FDDRC_SLANT_0_3 +263 0x2000 //RX_FDDRC_SLANT_1_0 +264 0x2000 //RX_FDDRC_SLANT_1_1 +265 0x2000 //RX_FDDRC_SLANT_1_2 +266 0x2000 //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +286 0x0100 //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 +#VOL 3 +163 0x3000 //RX_TDDRC_ALPHA_UP_1 +164 0x3000 //RX_TDDRC_ALPHA_UP_2 +165 0x3000 //RX_TDDRC_ALPHA_UP_3 +166 0x3000 //RX_TDDRC_ALPHA_UP_4 +184 0x7FB0 //RX_TDDRC_ALPHA_DWN_1 +185 0x7FB0 //RX_TDDRC_ALPHA_DWN_2 +186 0x7FB0 //RX_TDDRC_ALPHA_DWN_3 +189 0x7FB0 //RX_TDDRC_ALPHA_DWN_4 +190 0xDA9E //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +269 0x0000 //RX_TDDRC_THRD_0 +270 0x0000 //RX_TDDRC_THRD_1 +271 0x0E80 //RX_TDDRC_THRD_2 +272 0x3800 //RX_TDDRC_THRD_3 +273 0x2A00 //RX_TDDRC_SLANT_0 +274 0x6E00 //RX_TDDRC_SLANT_1 +275 0x3000 //RX_TDDRC_ALPHA_UP_0 +276 0x7FB0 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x0000 //RX_TDDRC_HMNC_GAIN +279 0x0000 //RX_TDDRC_SMT_FLAG +280 0x0000 //RX_TDDRC_SMT_W +281 0x0100 //RX_TDDRC_DRC_GAIN +195 0x0020 //RX_FDEQ_SUBNUM +196 0x4848 //RX_FDEQ_GAIN_0 +197 0x4848 //RX_FDEQ_GAIN_1 +198 0x4848 //RX_FDEQ_GAIN_2 +199 0x4848 //RX_FDEQ_GAIN_3 +200 0x4848 //RX_FDEQ_GAIN_4 +201 0x4848 //RX_FDEQ_GAIN_5 +202 0x4848 //RX_FDEQ_GAIN_6 +203 0x4848 //RX_FDEQ_GAIN_7 +204 0x4848 //RX_FDEQ_GAIN_8 +205 0x4848 //RX_FDEQ_GAIN_9 +206 0x4848 //RX_FDEQ_GAIN_10 +207 0x4848 //RX_FDEQ_GAIN_11 +208 0x4848 //RX_FDEQ_GAIN_12 +209 0x4848 //RX_FDEQ_GAIN_13 +210 0x4848 //RX_FDEQ_GAIN_14 +211 0x4848 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0000 //RX_FDEQ_BIN_0 +221 0x0000 //RX_FDEQ_BIN_1 +222 0x0000 //RX_FDEQ_BIN_2 +223 0x0000 //RX_FDEQ_BIN_3 +224 0x0000 //RX_FDEQ_BIN_4 +225 0x0000 //RX_FDEQ_BIN_5 +226 0x0000 //RX_FDEQ_BIN_6 +227 0x0000 //RX_FDEQ_BIN_7 +228 0x0000 //RX_FDEQ_BIN_8 +229 0x0000 //RX_FDEQ_BIN_9 +230 0x0000 //RX_FDEQ_BIN_10 +231 0x0000 //RX_FDEQ_BIN_11 +232 0x0000 //RX_FDEQ_BIN_12 +233 0x0000 //RX_FDEQ_BIN_13 +234 0x0000 //RX_FDEQ_BIN_14 +235 0x0000 //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x0000 //RX_FDEQ_RESRV_0 +245 0x0000 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0030 //RX_FDDRC_BAND_MARGIN_1 +248 0x0050 //RX_FDDRC_BAND_MARGIN_2 +249 0x0080 //RX_FDDRC_BAND_MARGIN_3 +250 0x0004 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x5000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x6400 //RX_FDDRC_THRD_3_2 +258 0x6400 //RX_FDDRC_THRD_3_3 +259 0x2000 //RX_FDDRC_SLANT_0_0 +260 0x2000 //RX_FDDRC_SLANT_0_1 +261 0x2000 //RX_FDDRC_SLANT_0_2 +262 0x2000 //RX_FDDRC_SLANT_0_3 +263 0x2000 //RX_FDDRC_SLANT_1_0 +264 0x2000 //RX_FDDRC_SLANT_1_1 +265 0x2000 //RX_FDDRC_SLANT_1_2 +266 0x2000 //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +286 0x0100 //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 +#VOL 4 +163 0x3000 //RX_TDDRC_ALPHA_UP_1 +164 0x3000 //RX_TDDRC_ALPHA_UP_2 +165 0x3000 //RX_TDDRC_ALPHA_UP_3 +166 0x3000 //RX_TDDRC_ALPHA_UP_4 +184 0x7FB0 //RX_TDDRC_ALPHA_DWN_1 +185 0x7FB0 //RX_TDDRC_ALPHA_DWN_2 +186 0x7FB0 //RX_TDDRC_ALPHA_DWN_3 +189 0x7FB0 //RX_TDDRC_ALPHA_DWN_4 +190 0xDA9E //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +269 0x0000 //RX_TDDRC_THRD_0 +270 0x0000 //RX_TDDRC_THRD_1 +271 0x0E80 //RX_TDDRC_THRD_2 +272 0x3800 //RX_TDDRC_THRD_3 +273 0x2A00 //RX_TDDRC_SLANT_0 +274 0x6E00 //RX_TDDRC_SLANT_1 +275 0x3000 //RX_TDDRC_ALPHA_UP_0 +276 0x7FB0 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x0000 //RX_TDDRC_HMNC_GAIN +279 0x0000 //RX_TDDRC_SMT_FLAG +280 0x0000 //RX_TDDRC_SMT_W +281 0x0100 //RX_TDDRC_DRC_GAIN +195 0x0020 //RX_FDEQ_SUBNUM +196 0x4848 //RX_FDEQ_GAIN_0 +197 0x4848 //RX_FDEQ_GAIN_1 +198 0x4848 //RX_FDEQ_GAIN_2 +199 0x4848 //RX_FDEQ_GAIN_3 +200 0x4848 //RX_FDEQ_GAIN_4 +201 0x4848 //RX_FDEQ_GAIN_5 +202 0x4848 //RX_FDEQ_GAIN_6 +203 0x4848 //RX_FDEQ_GAIN_7 +204 0x4848 //RX_FDEQ_GAIN_8 +205 0x4848 //RX_FDEQ_GAIN_9 +206 0x4848 //RX_FDEQ_GAIN_10 +207 0x4848 //RX_FDEQ_GAIN_11 +208 0x4848 //RX_FDEQ_GAIN_12 +209 0x4848 //RX_FDEQ_GAIN_13 +210 0x4848 //RX_FDEQ_GAIN_14 +211 0x4848 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0000 //RX_FDEQ_BIN_0 +221 0x0000 //RX_FDEQ_BIN_1 +222 0x0000 //RX_FDEQ_BIN_2 +223 0x0000 //RX_FDEQ_BIN_3 +224 0x0000 //RX_FDEQ_BIN_4 +225 0x0000 //RX_FDEQ_BIN_5 +226 0x0000 //RX_FDEQ_BIN_6 +227 0x0000 //RX_FDEQ_BIN_7 +228 0x0000 //RX_FDEQ_BIN_8 +229 0x0000 //RX_FDEQ_BIN_9 +230 0x0000 //RX_FDEQ_BIN_10 +231 0x0000 //RX_FDEQ_BIN_11 +232 0x0000 //RX_FDEQ_BIN_12 +233 0x0000 //RX_FDEQ_BIN_13 +234 0x0000 //RX_FDEQ_BIN_14 +235 0x0000 //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x0000 //RX_FDEQ_RESRV_0 +245 0x0000 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0030 //RX_FDDRC_BAND_MARGIN_1 +248 0x0050 //RX_FDDRC_BAND_MARGIN_2 +249 0x0080 //RX_FDDRC_BAND_MARGIN_3 +250 0x0004 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x5000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x6400 //RX_FDDRC_THRD_3_2 +258 0x6400 //RX_FDDRC_THRD_3_3 +259 0x2000 //RX_FDDRC_SLANT_0_0 +260 0x2000 //RX_FDDRC_SLANT_0_1 +261 0x2000 //RX_FDDRC_SLANT_0_2 +262 0x2000 //RX_FDDRC_SLANT_0_3 +263 0x2000 //RX_FDDRC_SLANT_1_0 +264 0x2000 //RX_FDDRC_SLANT_1_1 +265 0x2000 //RX_FDDRC_SLANT_1_2 +266 0x2000 //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +286 0x0100 //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 +#VOL 5 +163 0x3000 //RX_TDDRC_ALPHA_UP_1 +164 0x3000 //RX_TDDRC_ALPHA_UP_2 +165 0x3000 //RX_TDDRC_ALPHA_UP_3 +166 0x3000 //RX_TDDRC_ALPHA_UP_4 +184 0x7FB0 //RX_TDDRC_ALPHA_DWN_1 +185 0x7FB0 //RX_TDDRC_ALPHA_DWN_2 +186 0x7FB0 //RX_TDDRC_ALPHA_DWN_3 +189 0x7FB0 //RX_TDDRC_ALPHA_DWN_4 +190 0xDA9E //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +269 0x0000 //RX_TDDRC_THRD_0 +270 0x0000 //RX_TDDRC_THRD_1 +271 0x0E80 //RX_TDDRC_THRD_2 +272 0x3800 //RX_TDDRC_THRD_3 +273 0x2A00 //RX_TDDRC_SLANT_0 +274 0x6E00 //RX_TDDRC_SLANT_1 +275 0x3000 //RX_TDDRC_ALPHA_UP_0 +276 0x7FB0 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x0000 //RX_TDDRC_HMNC_GAIN +279 0x0000 //RX_TDDRC_SMT_FLAG +280 0x0000 //RX_TDDRC_SMT_W +281 0x0100 //RX_TDDRC_DRC_GAIN +195 0x0020 //RX_FDEQ_SUBNUM +196 0x4848 //RX_FDEQ_GAIN_0 +197 0x4848 //RX_FDEQ_GAIN_1 +198 0x4848 //RX_FDEQ_GAIN_2 +199 0x4848 //RX_FDEQ_GAIN_3 +200 0x4848 //RX_FDEQ_GAIN_4 +201 0x4848 //RX_FDEQ_GAIN_5 +202 0x4848 //RX_FDEQ_GAIN_6 +203 0x4848 //RX_FDEQ_GAIN_7 +204 0x4848 //RX_FDEQ_GAIN_8 +205 0x4848 //RX_FDEQ_GAIN_9 +206 0x4848 //RX_FDEQ_GAIN_10 +207 0x4848 //RX_FDEQ_GAIN_11 +208 0x4848 //RX_FDEQ_GAIN_12 +209 0x4848 //RX_FDEQ_GAIN_13 +210 0x4848 //RX_FDEQ_GAIN_14 +211 0x4848 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0000 //RX_FDEQ_BIN_0 +221 0x0000 //RX_FDEQ_BIN_1 +222 0x0000 //RX_FDEQ_BIN_2 +223 0x0000 //RX_FDEQ_BIN_3 +224 0x0000 //RX_FDEQ_BIN_4 +225 0x0000 //RX_FDEQ_BIN_5 +226 0x0000 //RX_FDEQ_BIN_6 +227 0x0000 //RX_FDEQ_BIN_7 +228 0x0000 //RX_FDEQ_BIN_8 +229 0x0000 //RX_FDEQ_BIN_9 +230 0x0000 //RX_FDEQ_BIN_10 +231 0x0000 //RX_FDEQ_BIN_11 +232 0x0000 //RX_FDEQ_BIN_12 +233 0x0000 //RX_FDEQ_BIN_13 +234 0x0000 //RX_FDEQ_BIN_14 +235 0x0000 //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x0000 //RX_FDEQ_RESRV_0 +245 0x0000 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0030 //RX_FDDRC_BAND_MARGIN_1 +248 0x0050 //RX_FDDRC_BAND_MARGIN_2 +249 0x0080 //RX_FDDRC_BAND_MARGIN_3 +250 0x0004 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x5000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x6400 //RX_FDDRC_THRD_3_2 +258 0x6400 //RX_FDDRC_THRD_3_3 +259 0x2000 //RX_FDDRC_SLANT_0_0 +260 0x2000 //RX_FDDRC_SLANT_0_1 +261 0x2000 //RX_FDDRC_SLANT_0_2 +262 0x2000 //RX_FDDRC_SLANT_0_3 +263 0x2000 //RX_FDDRC_SLANT_1_0 +264 0x2000 //RX_FDDRC_SLANT_1_1 +265 0x2000 //RX_FDDRC_SLANT_1_2 +266 0x2000 //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +286 0x0100 //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 +#VOL 6 +163 0x3000 //RX_TDDRC_ALPHA_UP_1 +164 0x3000 //RX_TDDRC_ALPHA_UP_2 +165 0x3000 //RX_TDDRC_ALPHA_UP_3 +166 0x3000 //RX_TDDRC_ALPHA_UP_4 +184 0x7FB0 //RX_TDDRC_ALPHA_DWN_1 +185 0x7FB0 //RX_TDDRC_ALPHA_DWN_2 +186 0x7FB0 //RX_TDDRC_ALPHA_DWN_3 +189 0x7FB0 //RX_TDDRC_ALPHA_DWN_4 +190 0xDA9E //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +269 0x0000 //RX_TDDRC_THRD_0 +270 0x0000 //RX_TDDRC_THRD_1 +271 0x0E80 //RX_TDDRC_THRD_2 +272 0x3800 //RX_TDDRC_THRD_3 +273 0x2A00 //RX_TDDRC_SLANT_0 +274 0x6E00 //RX_TDDRC_SLANT_1 +275 0x3000 //RX_TDDRC_ALPHA_UP_0 +276 0x7FB0 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x0000 //RX_TDDRC_HMNC_GAIN +279 0x0000 //RX_TDDRC_SMT_FLAG +280 0x0000 //RX_TDDRC_SMT_W +281 0x0100 //RX_TDDRC_DRC_GAIN +195 0x0020 //RX_FDEQ_SUBNUM +196 0x4848 //RX_FDEQ_GAIN_0 +197 0x4848 //RX_FDEQ_GAIN_1 +198 0x4848 //RX_FDEQ_GAIN_2 +199 0x4848 //RX_FDEQ_GAIN_3 +200 0x4848 //RX_FDEQ_GAIN_4 +201 0x4848 //RX_FDEQ_GAIN_5 +202 0x4848 //RX_FDEQ_GAIN_6 +203 0x4848 //RX_FDEQ_GAIN_7 +204 0x4848 //RX_FDEQ_GAIN_8 +205 0x4848 //RX_FDEQ_GAIN_9 +206 0x4848 //RX_FDEQ_GAIN_10 +207 0x4848 //RX_FDEQ_GAIN_11 +208 0x4848 //RX_FDEQ_GAIN_12 +209 0x4848 //RX_FDEQ_GAIN_13 +210 0x4848 //RX_FDEQ_GAIN_14 +211 0x4848 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0000 //RX_FDEQ_BIN_0 +221 0x0000 //RX_FDEQ_BIN_1 +222 0x0000 //RX_FDEQ_BIN_2 +223 0x0000 //RX_FDEQ_BIN_3 +224 0x0000 //RX_FDEQ_BIN_4 +225 0x0000 //RX_FDEQ_BIN_5 +226 0x0000 //RX_FDEQ_BIN_6 +227 0x0000 //RX_FDEQ_BIN_7 +228 0x0000 //RX_FDEQ_BIN_8 +229 0x0000 //RX_FDEQ_BIN_9 +230 0x0000 //RX_FDEQ_BIN_10 +231 0x0000 //RX_FDEQ_BIN_11 +232 0x0000 //RX_FDEQ_BIN_12 +233 0x0000 //RX_FDEQ_BIN_13 +234 0x0000 //RX_FDEQ_BIN_14 +235 0x0000 //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x0000 //RX_FDEQ_RESRV_0 +245 0x0000 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0030 //RX_FDDRC_BAND_MARGIN_1 +248 0x0050 //RX_FDDRC_BAND_MARGIN_2 +249 0x0080 //RX_FDDRC_BAND_MARGIN_3 +250 0x0004 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x5000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x6400 //RX_FDDRC_THRD_3_2 +258 0x6400 //RX_FDDRC_THRD_3_3 +259 0x2000 //RX_FDDRC_SLANT_0_0 +260 0x2000 //RX_FDDRC_SLANT_0_1 +261 0x2000 //RX_FDDRC_SLANT_0_2 +262 0x2000 //RX_FDDRC_SLANT_0_3 +263 0x2000 //RX_FDDRC_SLANT_1_0 +264 0x2000 //RX_FDDRC_SLANT_1_1 +265 0x2000 //RX_FDDRC_SLANT_1_2 +266 0x2000 //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +286 0x0100 //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 #CASE_NAME HEADSET-TTY_FULL-VOICE_GENERIC-NB -#PARAM_MODE FULL -#PARAM_TYPE TX+RX -#TOTAL_CUSTOM_STEP 7 +#PARAM_MODE Full +#PARAM_TYPE TX+2RX +#TOTAL_CUSTOM_STEP 7+7 #TX 0 0x0001 //TX_OPERATION_MODE_0 1 0x0000 //TX_OPERATION_MODE_1 @@ -49362,7 +75010,7 @@ 239 0x0000 //TX_DT_RESRV_7 240 0x0000 //TX_DT_RESRV_8 241 0x0000 //TX_DT_RESRV_9 -242 0xF200 //TX_THR_SN_EST_0 +242 0xFA00 //TX_THR_SN_EST_0 243 0xF400 //TX_THR_SN_EST_1 244 0xF800 //TX_THR_SN_EST_2 245 0xF600 //TX_THR_SN_EST_3 @@ -49371,12 +75019,12 @@ 248 0xF800 //TX_THR_SN_EST_6 249 0xF800 //TX_THR_SN_EST_7 250 0x0100 //TX_DELTA_THR_SN_EST_0 -251 0x0000 //TX_DELTA_THR_SN_EST_1 +251 0x0100 //TX_DELTA_THR_SN_EST_1 252 0x0100 //TX_DELTA_THR_SN_EST_2 -253 0x0100 //TX_DELTA_THR_SN_EST_3 +253 0x0200 //TX_DELTA_THR_SN_EST_3 254 0x0200 //TX_DELTA_THR_SN_EST_4 255 0x0200 //TX_DELTA_THR_SN_EST_5 -256 0x0200 //TX_DELTA_THR_SN_EST_6 +256 0x0000 //TX_DELTA_THR_SN_EST_6 257 0x0200 //TX_DELTA_THR_SN_EST_7 258 0x4000 //TX_LAMBDA_NN_EST_0 259 0x4000 //TX_LAMBDA_NN_EST_1 @@ -49402,12 +75050,12 @@ 279 0x0000 //TX_B_POST_FLT_0 280 0x0000 //TX_B_POST_FLT_1 281 0x001A //TX_NS_LVL_CTRL_0 -282 0x001A //TX_NS_LVL_CTRL_1 +282 0x0014 //TX_NS_LVL_CTRL_1 283 0x0014 //TX_NS_LVL_CTRL_2 -284 0x0014 //TX_NS_LVL_CTRL_3 +284 0x000C //TX_NS_LVL_CTRL_3 285 0x000C //TX_NS_LVL_CTRL_4 286 0x000C //TX_NS_LVL_CTRL_5 -287 0x000C //TX_NS_LVL_CTRL_6 +287 0x001A //TX_NS_LVL_CTRL_6 288 0x000C //TX_NS_LVL_CTRL_7 289 0x000E //TX_MIN_GAIN_S_0 290 0x0014 //TX_MIN_GAIN_S_1 @@ -49423,10 +75071,10 @@ 300 0x7FFF //TX_SNRI_SUP_0 301 0x7FFF //TX_SNRI_SUP_1 302 0x7FFF //TX_SNRI_SUP_2 -303 0x7FFF //TX_SNRI_SUP_3 +303 0x4000 //TX_SNRI_SUP_3 304 0x4000 //TX_SNRI_SUP_4 305 0x4000 //TX_SNRI_SUP_5 -306 0x4000 //TX_SNRI_SUP_6 +306 0x7FFF //TX_SNRI_SUP_6 307 0x4000 //TX_SNRI_SUP_7 308 0x1200 //TX_THR_LFNS 309 0x0147 //TX_G_LFNS @@ -49435,12 +75083,12 @@ 312 0x7FFF //TX_A_POST_FILT_0 313 0x7FFF //TX_A_POST_FILT_1 314 0x4000 //TX_A_POST_FILT_S_0 -315 0x199A //TX_A_POST_FILT_S_1 +315 0x1000 //TX_A_POST_FILT_S_1 316 0x1000 //TX_A_POST_FILT_S_2 -317 0x1000 //TX_A_POST_FILT_S_3 +317 0x6666 //TX_A_POST_FILT_S_3 318 0x6666 //TX_A_POST_FILT_S_4 319 0x6666 //TX_A_POST_FILT_S_5 -320 0x6666 //TX_A_POST_FILT_S_6 +320 0x199A //TX_A_POST_FILT_S_6 321 0x6666 //TX_A_POST_FILT_S_7 322 0x2000 //TX_B_POST_FILT_0 323 0x2000 //TX_B_POST_FILT_1 @@ -49487,7 +75135,7 @@ 364 0x0000 //TX_K_APT 365 0x0001 //TX_NOISEDET 366 0x05A0 //TX_NDETCT -367 0x000A //TX_NOISE_TH_0 +367 0x003B //TX_NOISE_TH_0 368 0x1388 //TX_NOISE_TH_0_2 369 0x3A98 //TX_NOISE_TH_0_3 370 0x0C80 //TX_NOISE_TH_1 @@ -49499,11 +75147,11 @@ 376 0x7FFF //TX_NOISE_TH_5_3 377 0x7FFF //TX_NOISE_TH_5_4 378 0x00C8 //TX_NOISE_TH_6 -379 0x000A //TX_MINENOISE_TH -380 0x0000 //TX_MINENOISE_MIC0_TH_MTS -381 0x0000 //TX_MINENOISE_MIC0_TH_EXP -382 0x0000 //TX_MINENOISE_MIC0_S_TH_MTS -383 0x0000 //TX_MINENOISE_MIC0_S_TH_EXP +379 0x00C8 //TX_MINENOISE_TH +380 0xD508 //TX_MORENS_TFMASK_TH +381 0x0001 //TX_DRC_QUIET_FLOOR +382 0x3A98 //TX_RATIODTL_CUT_TH +383 0x0DAC //TX_DT_CUT_K1 384 0x6400 //TX_OUT_ENER_S_TH_CLEAN 385 0x6400 //TX_OUT_ENER_S_TH_LESSCLEAN 386 0x6400 //TX_OUT_ENER_S_TH_NOISY @@ -49511,22 +75159,22 @@ 388 0x7D00 //TX_OUT_ENER_TH_SPEECH 389 0x0000 //TX_SN_NPB_GAIN 390 0x0000 //TX_NN_NPB_GAIN -391 0x0000 //TX_CSX_ALPHA_0 -392 0x0000 //TX_CSX_ALPHA_1 -393 0x0000 //TX_CSX_ALPHA_2 -394 0x0000 //TX_CSX_ALPHA_3 -395 0x0000 //TX_MU_ARSP_EST -396 0x0000 //TX_P_OUTBEAM_MIN_TH +391 0x7FFF //TX_POST_MASK_SUP_HSNE +392 0x1388 //TX_TAIL_DET_TH +393 0x4000 //TX_B_LESSCUT_RTO_WTA +394 0x0000 //TX_MEL_G_R +395 0x0080 //TX_SUPHIGH_TH +396 0x0000 //TX_MASK_G_R 397 0x0000 //TX_EXTRA_NS_L -398 0x0000 //TX_EXTRA_NS_A -399 0x0000 //TX_VR_NOISE_FLOOR_TH +398 0x1800 //TX_C_POST_FLT_MASK +399 0x7FFF //TX_A_POST_FLT_WNS 400 0x0000 //TX_MIN_G_LOW300HZ 401 0x0010 //TX_MAXLEVEL_CNG 402 0x0000 //TX_STN_NOISE_TH 403 0x0000 //TX_POST_MASK_SUP 404 0x0000 //TX_POST_MASK_ADJUST 405 0x0014 //TX_NS_ENOISE_MIC0_TH -406 0x0014 //TX_MINENOISE_MIC0_TH +406 0x0032 //TX_MINENOISE_MIC0_TH 407 0x0226 //TX_MINENOISE_MIC0_S_TH 408 0x2879 //TX_MIN_G_CTRL_SSNS 409 0x0400 //TX_METAL_RTO_THR @@ -49634,16 +75282,16 @@ 511 0x6666 //TX_MIC_TO_BFGAIN 512 0x6666 //TX_MICTOBFGAIN0 513 0x0014 //TX_FASTMUE_TH -514 0x0000 //TX_DERVB_LEN_0 -515 0x0000 //TX_DERVB_LEN_1 -516 0x0000 //TX_RHO_DERVB -517 0x0000 //TX_MIC_INDX_DERVB -518 0x0000 //TX_MU_DERVB -519 0x0000 //TX_DR_RESRV_0 -520 0x0000 //TX_DR_RESRV_1 -521 0x0000 //TX_DR_RESRV_2 -522 0x0000 //TX_DR_RESRV_3 -523 0x0000 //TX_DR_RESRV_4 +514 0xC000 //TX_DEREVERB_LF_MU +515 0xC000 //TX_DEREVERB_HF_MU +516 0xCCCC //TX_DEREVERB_DELAY +517 0xD999 //TX_DEREVERB_COEF_LEN +518 0x1F40 //TX_DEREVERB_DNR +519 0x0000 //TX_DEREVERB_ALPHA +520 0x0000 //TX_DEREVERB_BETA +521 0x0000 //TX_GSC_RTOL_TH +522 0x7000 //TX_GSC_RTOH_TH +523 0x0064 //TX_WIDE2_MEANHTH 524 0x0000 //TX_DR_RESRV_5 525 0x0000 //TX_DR_RESRV_6 526 0x0000 //TX_DR_RESRV_7 @@ -50009,16 +75657,81 @@ 886 0x0000 //TX_FASTNS_TFMASKBIN_TH2 887 0x0000 //TX_FASTNS_TFMASKBIN_TH3 888 0x00C8 //TX_FASTNS_ARSPC_TH -889 0xD99A //TX_FASTNS_MASK5_TH +889 0xC000 //TX_FASTNS_MASK5_TH 890 0x051F //TX_POSTSSA_MIN_G_VR_MASK -891 0x7FFF //TX_A_LESSCUT_RTO_MASK +891 0x4000 //TX_A_LESSCUT_RTO_MASK 892 0x1770 //TX_FASTNS_NOISETH 893 0xC000 //TX_FASTNS_SSA_THLFL 894 0xC000 //TX_FASTNS_SSA_THHFL 895 0xCCCC //TX_FASTNS_SSA_THLFH 896 0xD999 //TX_FASTNS_SSA_THHFH +897 0x2339 //TX_SENDFUNC_REG_MICMUTE +898 0x0021 //TX_SENDFUNC_REG_MICMUTE1 +899 0x02BC //TX_MICMUTE_RATIO_THR +900 0x0140 //TX_MICMUTE_AMP_THR +901 0x0004 //TX_MICMUTE_HPF_IND +902 0x00C0 //TX_MICMUTE_LOG_EYR_TH +903 0x0008 //TX_MICMUTE_CVG_TIME +904 0x0008 //TX_MICMUTE_RELEASE_TIME +905 0x01FE //TX_MIC_VOLUME_MIC0MUTE +906 0x0020 //TX_MICMUTE_EPD_OFFSET_0 +907 0x001E //TX_MICMUTE_FRQ_AEC_L +908 0x7999 //TX_MICMUTE_EAD_THR +909 0x7FFF //TX_MICMUTE_LAMBDA_CB_NLE +910 0x7FFF //TX_MICMUTE_LAMBDA_RE_EST +911 0x4000 //TX_DTD_THR1_MICMUTE_0 +912 0x7000 //TX_DTD_THR1_MICMUTE_1 +913 0x7FFF //TX_DTD_THR1_MICMUTE_2 +914 0x7FFF //TX_DTD_THR1_MICMUTE_3 +915 0x6CCC //TX_DTD_THR2_MICMUTE_0 +916 0x0400 //TX_MICMUTE_MIN_EQ_RE_EST_0 +917 0x0400 //TX_MICMUTE_MIN_EQ_RE_EST_1 +918 0x1000 //TX_MICMUTE_MIN_EQ_RE_EST_2 +919 0x7FFF //TX_MICMUTE_MIN_EQ_RE_EST_3 +920 0x7FFF //TX_MICMUTE_MIN_EQ_RE_EST_4 +921 0x4000 //TX_MICMUTE_C_POST_FLT +922 0x03E8 //TX_MICMUTE_DT_CUT_K +923 0x0001 //TX_MICMUTE_DT_CUT_THR +924 0x03E8 //TX_MICMUTE_DT_CUT_K2 +925 0x0001 //TX_MICMUTE_DT_CUT_THR2 +926 0x0064 //TX_MICMUTE_DT2_HOLD_N +927 0x1000 //TX_MICMUTE_RATIODTH_THCUT +928 0x1000 //TX_MICMUTE_B_POST_FLT_ECHOL +929 0x7FFF //TX_MICMUTE_B_POST_FLT_ECHOH +930 0x0400 //TX_MICMUTE_C_POST_FLT_MASK +931 0x7999 //TX_MICMUTE_RATIODTL_CUT_TH +932 0x0258 //TX_MICMUTE_DT_CUT_K1 +933 0x0800 //TX_MICMUTE_N2_SN_EST +934 0xFC00 //TX_MICMUTE_THR_SN_EST_0 +935 0x001C //TX_MICMUTE_MIN_G_CTRL_0 +936 0x6000 //TX_MICMUTE_A_POST_FILT_S_0 +937 0x7000 //TX_MICMUTE_B_POST_FILT_0 +938 0x2710 //TX_MIC1RUB_AMP_THR +939 0x0010 //TX_MIC1MUTE_RATIO_THR +940 0x0450 //TX_MIC1MUTE_AMP_THR +941 0x0008 //TX_MIC1MUTE_CVG_TIME +942 0x0008 //TX_MIC1MUTE_RELEASE_TIME +943 0x0000 //TX_AMS_RESRV_01 +944 0x0000 //TX_AMS_RESRV_02 +945 0x0000 //TX_AMS_RESRV_03 +946 0x0000 //TX_AMS_RESRV_04 +947 0x0000 //TX_AMS_RESRV_05 +948 0x0000 //TX_AMS_RESRV_06 +949 0x0000 //TX_AMS_RESRV_07 +950 0x0000 //TX_AMS_RESRV_08 +951 0x0000 //TX_AMS_RESRV_09 +952 0x0000 //TX_AMS_RESRV_10 +953 0x0000 //TX_AMS_RESRV_11 +954 0x0000 //TX_AMS_RESRV_12 +955 0x0000 //TX_AMS_RESRV_13 +956 0x0000 //TX_AMS_RESRV_14 +957 0x0000 //TX_AMS_RESRV_15 +958 0x0000 //TX_AMS_RESRV_16 +959 0x0000 //TX_AMS_RESRV_17 +960 0x0000 //TX_AMS_RESRV_18 +961 0x0000 //TX_AMS_RESRV_19 #RX -0 0x0040 //RX_RECVFUNC_MODE_0 +0 0x2040 //RX_RECVFUNC_MODE_0 1 0x0000 //RX_RECVFUNC_MODE_1 2 0x0000 //RX_SAMPLINGFREQ_SIG 3 0x0000 //RX_SAMPLINGFREQ_PROC @@ -50868,11 +76581,862 @@ 110 0x0000 //RX_FDDRC_RESRV_0 129 0x0100 //RX_SPK_VOL 130 0x0000 //RX_VOL_RESRV_0 +#RX 2 +157 0x2040 //RX_RECVFUNC_MODE_0 +158 0x0000 //RX_RECVFUNC_MODE_1 +159 0x0000 //RX_SAMPLINGFREQ_SIG +160 0x0000 //RX_SAMPLINGFREQ_PROC +161 0x000A //RX_FRAME_SZ +162 0x0000 //RX_DELAY_OPT +163 0x3000 //RX_TDDRC_ALPHA_UP_1 +164 0x3000 //RX_TDDRC_ALPHA_UP_2 +165 0x3000 //RX_TDDRC_ALPHA_UP_3 +166 0x3000 //RX_TDDRC_ALPHA_UP_4 +167 0x050D //RX_PGA +168 0x7652 //RX_A_HP +169 0x4000 //RX_B_PE +170 0x7800 //RX_THR_PITCH_DET_0 +171 0x7000 //RX_THR_PITCH_DET_1 +172 0x6000 //RX_THR_PITCH_DET_2 +173 0x0000 //RX_PITCH_BFR_LEN +174 0x0000 //RX_SBD_PITCH_DET +175 0x0000 //RX_PP_RESRV_0 +176 0x0000 //RX_PP_RESRV_1 +177 0xF800 //RX_N_SN_EST +178 0x0000 //RX_N2_SN_EST +179 0x000F //RX_NS_LVL_CTRL +180 0xF800 //RX_THR_SN_EST +181 0x7E00 //RX_LAMBDA_PFILT +182 0x000A //RX_FENS_RESRV_0 +183 0x0000 //RX_FENS_RESRV_1 +184 0x7FB0 //RX_TDDRC_ALPHA_DWN_1 +185 0x7FB0 //RX_TDDRC_ALPHA_DWN_2 +186 0x7FB0 //RX_TDDRC_ALPHA_DWN_3 +187 0x0000 //RX_EXTRA_NS_L +188 0x0000 //RX_EXTRA_NS_A +189 0x7FB0 //RX_TDDRC_ALPHA_DWN_4 +190 0xDA9E //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +192 0x0000 //RX_A_POST_FLT +193 0x0000 //RX_LMT_THRD +194 0x4000 //RX_LMT_ALPHA +195 0x0020 //RX_FDEQ_SUBNUM +196 0x4848 //RX_FDEQ_GAIN_0 +197 0x4848 //RX_FDEQ_GAIN_1 +198 0x4848 //RX_FDEQ_GAIN_2 +199 0x4848 //RX_FDEQ_GAIN_3 +200 0x4848 //RX_FDEQ_GAIN_4 +201 0x4848 //RX_FDEQ_GAIN_5 +202 0x4848 //RX_FDEQ_GAIN_6 +203 0x4848 //RX_FDEQ_GAIN_7 +204 0x4848 //RX_FDEQ_GAIN_8 +205 0x4848 //RX_FDEQ_GAIN_9 +206 0x4848 //RX_FDEQ_GAIN_10 +207 0x4848 //RX_FDEQ_GAIN_11 +208 0x4848 //RX_FDEQ_GAIN_12 +209 0x4848 //RX_FDEQ_GAIN_13 +210 0x4848 //RX_FDEQ_GAIN_14 +211 0x4848 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0000 //RX_FDEQ_BIN_0 +221 0x0000 //RX_FDEQ_BIN_1 +222 0x0000 //RX_FDEQ_BIN_2 +223 0x0000 //RX_FDEQ_BIN_3 +224 0x0000 //RX_FDEQ_BIN_4 +225 0x0000 //RX_FDEQ_BIN_5 +226 0x0000 //RX_FDEQ_BIN_6 +227 0x0000 //RX_FDEQ_BIN_7 +228 0x0000 //RX_FDEQ_BIN_8 +229 0x0000 //RX_FDEQ_BIN_9 +230 0x0000 //RX_FDEQ_BIN_10 +231 0x0000 //RX_FDEQ_BIN_11 +232 0x0000 //RX_FDEQ_BIN_12 +233 0x0000 //RX_FDEQ_BIN_13 +234 0x0000 //RX_FDEQ_BIN_14 +235 0x0000 //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x0000 //RX_FDEQ_RESRV_0 +245 0x0000 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0030 //RX_FDDRC_BAND_MARGIN_1 +248 0x0050 //RX_FDDRC_BAND_MARGIN_2 +249 0x0080 //RX_FDDRC_BAND_MARGIN_3 +250 0x0004 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x5000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x6400 //RX_FDDRC_THRD_3_2 +258 0x6400 //RX_FDDRC_THRD_3_3 +259 0x2000 //RX_FDDRC_SLANT_0_0 +260 0x2000 //RX_FDDRC_SLANT_0_1 +261 0x2000 //RX_FDDRC_SLANT_0_2 +262 0x2000 //RX_FDDRC_SLANT_0_3 +263 0x2000 //RX_FDDRC_SLANT_1_0 +264 0x2000 //RX_FDDRC_SLANT_1_1 +265 0x2000 //RX_FDDRC_SLANT_1_2 +266 0x2000 //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +268 0x0003 //RX_FILTINDX +269 0x0000 //RX_TDDRC_THRD_0 +270 0x0000 //RX_TDDRC_THRD_1 +271 0x0E80 //RX_TDDRC_THRD_2 +272 0x3800 //RX_TDDRC_THRD_3 +273 0x2A00 //RX_TDDRC_SLANT_0 +274 0x6E00 //RX_TDDRC_SLANT_1 +275 0x3000 //RX_TDDRC_ALPHA_UP_0 +276 0x7FB0 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x0000 //RX_TDDRC_HMNC_GAIN +279 0x0000 //RX_TDDRC_SMT_FLAG +280 0x0000 //RX_TDDRC_SMT_W +281 0x0100 //RX_TDDRC_DRC_GAIN +282 0x7C00 //RX_LAMBDA_PKA_FP +283 0x2000 //RX_TPKA_FP +284 0x0080 //RX_MIN_G_FP +285 0x2000 //RX_MAX_G_FP +286 0x0100 //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 +288 0x0010 //RX_MAXLEVEL_CNG +289 0x0000 //RX_BWE_UV_TH +290 0x0000 //RX_BWE_UV_TH2 +291 0x0000 //RX_BWE_UV_TH3 +292 0x0000 //RX_BWE_V_TH +293 0x0000 //RX_BWE_GAIN1_V_TH1 +294 0x0000 //RX_BWE_GAIN1_V_TH2 +295 0x0000 //RX_BWE_UV_EQ +296 0x0000 //RX_BWE_V_EQ +297 0x0000 //RX_BWE_TONE_TH +298 0x0000 //RX_BWE_UV_HOLD_T +299 0x0000 //RX_BWE_GAIN2_ALPHA +300 0x0000 //RX_BWE_GAIN3_ALPHA +301 0x0000 //RX_BWE_CUTOFF +302 0x0000 //RX_BWE_GAINFILL +303 0x0000 //RX_BWE_MAXTH_TONE +304 0x0000 //RX_BWE_EQ_0 +305 0x0000 //RX_BWE_EQ_1 +306 0x0000 //RX_BWE_EQ_2 +307 0x0000 //RX_BWE_EQ_3 +308 0x0000 //RX_BWE_EQ_4 +309 0x0000 //RX_BWE_EQ_5 +310 0x0000 //RX_BWE_EQ_6 +311 0x0000 //RX_BWE_RESRV_0 +312 0x0000 //RX_BWE_RESRV_1 +313 0x0000 //RX_BWE_RESRV_2 +#VOL 0 +163 0x3000 //RX_TDDRC_ALPHA_UP_1 +164 0x3000 //RX_TDDRC_ALPHA_UP_2 +165 0x3000 //RX_TDDRC_ALPHA_UP_3 +166 0x3000 //RX_TDDRC_ALPHA_UP_4 +184 0x7FB0 //RX_TDDRC_ALPHA_DWN_1 +185 0x7FB0 //RX_TDDRC_ALPHA_DWN_2 +186 0x7FB0 //RX_TDDRC_ALPHA_DWN_3 +189 0x7FB0 //RX_TDDRC_ALPHA_DWN_4 +190 0xDA9E //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +269 0x0000 //RX_TDDRC_THRD_0 +270 0x0000 //RX_TDDRC_THRD_1 +271 0x0E80 //RX_TDDRC_THRD_2 +272 0x3800 //RX_TDDRC_THRD_3 +273 0x2A00 //RX_TDDRC_SLANT_0 +274 0x6E00 //RX_TDDRC_SLANT_1 +275 0x3000 //RX_TDDRC_ALPHA_UP_0 +276 0x7FB0 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x0000 //RX_TDDRC_HMNC_GAIN +279 0x0000 //RX_TDDRC_SMT_FLAG +280 0x0000 //RX_TDDRC_SMT_W +281 0x0100 //RX_TDDRC_DRC_GAIN +195 0x0020 //RX_FDEQ_SUBNUM +196 0x4848 //RX_FDEQ_GAIN_0 +197 0x4848 //RX_FDEQ_GAIN_1 +198 0x4848 //RX_FDEQ_GAIN_2 +199 0x4848 //RX_FDEQ_GAIN_3 +200 0x4848 //RX_FDEQ_GAIN_4 +201 0x4848 //RX_FDEQ_GAIN_5 +202 0x4848 //RX_FDEQ_GAIN_6 +203 0x4848 //RX_FDEQ_GAIN_7 +204 0x4848 //RX_FDEQ_GAIN_8 +205 0x4848 //RX_FDEQ_GAIN_9 +206 0x4848 //RX_FDEQ_GAIN_10 +207 0x4848 //RX_FDEQ_GAIN_11 +208 0x4848 //RX_FDEQ_GAIN_12 +209 0x4848 //RX_FDEQ_GAIN_13 +210 0x4848 //RX_FDEQ_GAIN_14 +211 0x4848 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0000 //RX_FDEQ_BIN_0 +221 0x0000 //RX_FDEQ_BIN_1 +222 0x0000 //RX_FDEQ_BIN_2 +223 0x0000 //RX_FDEQ_BIN_3 +224 0x0000 //RX_FDEQ_BIN_4 +225 0x0000 //RX_FDEQ_BIN_5 +226 0x0000 //RX_FDEQ_BIN_6 +227 0x0000 //RX_FDEQ_BIN_7 +228 0x0000 //RX_FDEQ_BIN_8 +229 0x0000 //RX_FDEQ_BIN_9 +230 0x0000 //RX_FDEQ_BIN_10 +231 0x0000 //RX_FDEQ_BIN_11 +232 0x0000 //RX_FDEQ_BIN_12 +233 0x0000 //RX_FDEQ_BIN_13 +234 0x0000 //RX_FDEQ_BIN_14 +235 0x0000 //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x0000 //RX_FDEQ_RESRV_0 +245 0x0000 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0030 //RX_FDDRC_BAND_MARGIN_1 +248 0x0050 //RX_FDDRC_BAND_MARGIN_2 +249 0x0080 //RX_FDDRC_BAND_MARGIN_3 +250 0x0004 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x5000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x6400 //RX_FDDRC_THRD_3_2 +258 0x6400 //RX_FDDRC_THRD_3_3 +259 0x2000 //RX_FDDRC_SLANT_0_0 +260 0x2000 //RX_FDDRC_SLANT_0_1 +261 0x2000 //RX_FDDRC_SLANT_0_2 +262 0x2000 //RX_FDDRC_SLANT_0_3 +263 0x2000 //RX_FDDRC_SLANT_1_0 +264 0x2000 //RX_FDDRC_SLANT_1_1 +265 0x2000 //RX_FDDRC_SLANT_1_2 +266 0x2000 //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +286 0x0100 //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 +#VOL 1 +163 0x3000 //RX_TDDRC_ALPHA_UP_1 +164 0x3000 //RX_TDDRC_ALPHA_UP_2 +165 0x3000 //RX_TDDRC_ALPHA_UP_3 +166 0x3000 //RX_TDDRC_ALPHA_UP_4 +184 0x7FB0 //RX_TDDRC_ALPHA_DWN_1 +185 0x7FB0 //RX_TDDRC_ALPHA_DWN_2 +186 0x7FB0 //RX_TDDRC_ALPHA_DWN_3 +189 0x7FB0 //RX_TDDRC_ALPHA_DWN_4 +190 0xDA9E //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +269 0x0000 //RX_TDDRC_THRD_0 +270 0x0000 //RX_TDDRC_THRD_1 +271 0x0E80 //RX_TDDRC_THRD_2 +272 0x3800 //RX_TDDRC_THRD_3 +273 0x2A00 //RX_TDDRC_SLANT_0 +274 0x6E00 //RX_TDDRC_SLANT_1 +275 0x3000 //RX_TDDRC_ALPHA_UP_0 +276 0x7FB0 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x0000 //RX_TDDRC_HMNC_GAIN +279 0x0000 //RX_TDDRC_SMT_FLAG +280 0x0000 //RX_TDDRC_SMT_W +281 0x0100 //RX_TDDRC_DRC_GAIN +195 0x0020 //RX_FDEQ_SUBNUM +196 0x4848 //RX_FDEQ_GAIN_0 +197 0x4848 //RX_FDEQ_GAIN_1 +198 0x4848 //RX_FDEQ_GAIN_2 +199 0x4848 //RX_FDEQ_GAIN_3 +200 0x4848 //RX_FDEQ_GAIN_4 +201 0x4848 //RX_FDEQ_GAIN_5 +202 0x4848 //RX_FDEQ_GAIN_6 +203 0x4848 //RX_FDEQ_GAIN_7 +204 0x4848 //RX_FDEQ_GAIN_8 +205 0x4848 //RX_FDEQ_GAIN_9 +206 0x4848 //RX_FDEQ_GAIN_10 +207 0x4848 //RX_FDEQ_GAIN_11 +208 0x4848 //RX_FDEQ_GAIN_12 +209 0x4848 //RX_FDEQ_GAIN_13 +210 0x4848 //RX_FDEQ_GAIN_14 +211 0x4848 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0000 //RX_FDEQ_BIN_0 +221 0x0000 //RX_FDEQ_BIN_1 +222 0x0000 //RX_FDEQ_BIN_2 +223 0x0000 //RX_FDEQ_BIN_3 +224 0x0000 //RX_FDEQ_BIN_4 +225 0x0000 //RX_FDEQ_BIN_5 +226 0x0000 //RX_FDEQ_BIN_6 +227 0x0000 //RX_FDEQ_BIN_7 +228 0x0000 //RX_FDEQ_BIN_8 +229 0x0000 //RX_FDEQ_BIN_9 +230 0x0000 //RX_FDEQ_BIN_10 +231 0x0000 //RX_FDEQ_BIN_11 +232 0x0000 //RX_FDEQ_BIN_12 +233 0x0000 //RX_FDEQ_BIN_13 +234 0x0000 //RX_FDEQ_BIN_14 +235 0x0000 //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x0000 //RX_FDEQ_RESRV_0 +245 0x0000 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0030 //RX_FDDRC_BAND_MARGIN_1 +248 0x0050 //RX_FDDRC_BAND_MARGIN_2 +249 0x0080 //RX_FDDRC_BAND_MARGIN_3 +250 0x0004 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x5000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x6400 //RX_FDDRC_THRD_3_2 +258 0x6400 //RX_FDDRC_THRD_3_3 +259 0x2000 //RX_FDDRC_SLANT_0_0 +260 0x2000 //RX_FDDRC_SLANT_0_1 +261 0x2000 //RX_FDDRC_SLANT_0_2 +262 0x2000 //RX_FDDRC_SLANT_0_3 +263 0x2000 //RX_FDDRC_SLANT_1_0 +264 0x2000 //RX_FDDRC_SLANT_1_1 +265 0x2000 //RX_FDDRC_SLANT_1_2 +266 0x2000 //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +286 0x0100 //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 +#VOL 2 +163 0x3000 //RX_TDDRC_ALPHA_UP_1 +164 0x3000 //RX_TDDRC_ALPHA_UP_2 +165 0x3000 //RX_TDDRC_ALPHA_UP_3 +166 0x3000 //RX_TDDRC_ALPHA_UP_4 +184 0x7FB0 //RX_TDDRC_ALPHA_DWN_1 +185 0x7FB0 //RX_TDDRC_ALPHA_DWN_2 +186 0x7FB0 //RX_TDDRC_ALPHA_DWN_3 +189 0x7FB0 //RX_TDDRC_ALPHA_DWN_4 +190 0xDA9E //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +269 0x0000 //RX_TDDRC_THRD_0 +270 0x0000 //RX_TDDRC_THRD_1 +271 0x0E80 //RX_TDDRC_THRD_2 +272 0x3800 //RX_TDDRC_THRD_3 +273 0x2A00 //RX_TDDRC_SLANT_0 +274 0x6E00 //RX_TDDRC_SLANT_1 +275 0x3000 //RX_TDDRC_ALPHA_UP_0 +276 0x7FB0 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x0000 //RX_TDDRC_HMNC_GAIN +279 0x0000 //RX_TDDRC_SMT_FLAG +280 0x0000 //RX_TDDRC_SMT_W +281 0x0100 //RX_TDDRC_DRC_GAIN +195 0x0020 //RX_FDEQ_SUBNUM +196 0x4848 //RX_FDEQ_GAIN_0 +197 0x4848 //RX_FDEQ_GAIN_1 +198 0x4848 //RX_FDEQ_GAIN_2 +199 0x4848 //RX_FDEQ_GAIN_3 +200 0x4848 //RX_FDEQ_GAIN_4 +201 0x4848 //RX_FDEQ_GAIN_5 +202 0x4848 //RX_FDEQ_GAIN_6 +203 0x4848 //RX_FDEQ_GAIN_7 +204 0x4848 //RX_FDEQ_GAIN_8 +205 0x4848 //RX_FDEQ_GAIN_9 +206 0x4848 //RX_FDEQ_GAIN_10 +207 0x4848 //RX_FDEQ_GAIN_11 +208 0x4848 //RX_FDEQ_GAIN_12 +209 0x4848 //RX_FDEQ_GAIN_13 +210 0x4848 //RX_FDEQ_GAIN_14 +211 0x4848 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0000 //RX_FDEQ_BIN_0 +221 0x0000 //RX_FDEQ_BIN_1 +222 0x0000 //RX_FDEQ_BIN_2 +223 0x0000 //RX_FDEQ_BIN_3 +224 0x0000 //RX_FDEQ_BIN_4 +225 0x0000 //RX_FDEQ_BIN_5 +226 0x0000 //RX_FDEQ_BIN_6 +227 0x0000 //RX_FDEQ_BIN_7 +228 0x0000 //RX_FDEQ_BIN_8 +229 0x0000 //RX_FDEQ_BIN_9 +230 0x0000 //RX_FDEQ_BIN_10 +231 0x0000 //RX_FDEQ_BIN_11 +232 0x0000 //RX_FDEQ_BIN_12 +233 0x0000 //RX_FDEQ_BIN_13 +234 0x0000 //RX_FDEQ_BIN_14 +235 0x0000 //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x0000 //RX_FDEQ_RESRV_0 +245 0x0000 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0030 //RX_FDDRC_BAND_MARGIN_1 +248 0x0050 //RX_FDDRC_BAND_MARGIN_2 +249 0x0080 //RX_FDDRC_BAND_MARGIN_3 +250 0x0004 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x5000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x6400 //RX_FDDRC_THRD_3_2 +258 0x6400 //RX_FDDRC_THRD_3_3 +259 0x2000 //RX_FDDRC_SLANT_0_0 +260 0x2000 //RX_FDDRC_SLANT_0_1 +261 0x2000 //RX_FDDRC_SLANT_0_2 +262 0x2000 //RX_FDDRC_SLANT_0_3 +263 0x2000 //RX_FDDRC_SLANT_1_0 +264 0x2000 //RX_FDDRC_SLANT_1_1 +265 0x2000 //RX_FDDRC_SLANT_1_2 +266 0x2000 //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +286 0x0100 //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 +#VOL 3 +163 0x3000 //RX_TDDRC_ALPHA_UP_1 +164 0x3000 //RX_TDDRC_ALPHA_UP_2 +165 0x3000 //RX_TDDRC_ALPHA_UP_3 +166 0x3000 //RX_TDDRC_ALPHA_UP_4 +184 0x7FB0 //RX_TDDRC_ALPHA_DWN_1 +185 0x7FB0 //RX_TDDRC_ALPHA_DWN_2 +186 0x7FB0 //RX_TDDRC_ALPHA_DWN_3 +189 0x7FB0 //RX_TDDRC_ALPHA_DWN_4 +190 0xDA9E //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +269 0x0000 //RX_TDDRC_THRD_0 +270 0x0000 //RX_TDDRC_THRD_1 +271 0x0E80 //RX_TDDRC_THRD_2 +272 0x3800 //RX_TDDRC_THRD_3 +273 0x2A00 //RX_TDDRC_SLANT_0 +274 0x6E00 //RX_TDDRC_SLANT_1 +275 0x3000 //RX_TDDRC_ALPHA_UP_0 +276 0x7FB0 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x0000 //RX_TDDRC_HMNC_GAIN +279 0x0000 //RX_TDDRC_SMT_FLAG +280 0x0000 //RX_TDDRC_SMT_W +281 0x0100 //RX_TDDRC_DRC_GAIN +195 0x0020 //RX_FDEQ_SUBNUM +196 0x4848 //RX_FDEQ_GAIN_0 +197 0x4848 //RX_FDEQ_GAIN_1 +198 0x4848 //RX_FDEQ_GAIN_2 +199 0x4848 //RX_FDEQ_GAIN_3 +200 0x4848 //RX_FDEQ_GAIN_4 +201 0x4848 //RX_FDEQ_GAIN_5 +202 0x4848 //RX_FDEQ_GAIN_6 +203 0x4848 //RX_FDEQ_GAIN_7 +204 0x4848 //RX_FDEQ_GAIN_8 +205 0x4848 //RX_FDEQ_GAIN_9 +206 0x4848 //RX_FDEQ_GAIN_10 +207 0x4848 //RX_FDEQ_GAIN_11 +208 0x4848 //RX_FDEQ_GAIN_12 +209 0x4848 //RX_FDEQ_GAIN_13 +210 0x4848 //RX_FDEQ_GAIN_14 +211 0x4848 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0000 //RX_FDEQ_BIN_0 +221 0x0000 //RX_FDEQ_BIN_1 +222 0x0000 //RX_FDEQ_BIN_2 +223 0x0000 //RX_FDEQ_BIN_3 +224 0x0000 //RX_FDEQ_BIN_4 +225 0x0000 //RX_FDEQ_BIN_5 +226 0x0000 //RX_FDEQ_BIN_6 +227 0x0000 //RX_FDEQ_BIN_7 +228 0x0000 //RX_FDEQ_BIN_8 +229 0x0000 //RX_FDEQ_BIN_9 +230 0x0000 //RX_FDEQ_BIN_10 +231 0x0000 //RX_FDEQ_BIN_11 +232 0x0000 //RX_FDEQ_BIN_12 +233 0x0000 //RX_FDEQ_BIN_13 +234 0x0000 //RX_FDEQ_BIN_14 +235 0x0000 //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x0000 //RX_FDEQ_RESRV_0 +245 0x0000 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0030 //RX_FDDRC_BAND_MARGIN_1 +248 0x0050 //RX_FDDRC_BAND_MARGIN_2 +249 0x0080 //RX_FDDRC_BAND_MARGIN_3 +250 0x0004 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x5000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x6400 //RX_FDDRC_THRD_3_2 +258 0x6400 //RX_FDDRC_THRD_3_3 +259 0x2000 //RX_FDDRC_SLANT_0_0 +260 0x2000 //RX_FDDRC_SLANT_0_1 +261 0x2000 //RX_FDDRC_SLANT_0_2 +262 0x2000 //RX_FDDRC_SLANT_0_3 +263 0x2000 //RX_FDDRC_SLANT_1_0 +264 0x2000 //RX_FDDRC_SLANT_1_1 +265 0x2000 //RX_FDDRC_SLANT_1_2 +266 0x2000 //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +286 0x0100 //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 +#VOL 4 +163 0x3000 //RX_TDDRC_ALPHA_UP_1 +164 0x3000 //RX_TDDRC_ALPHA_UP_2 +165 0x3000 //RX_TDDRC_ALPHA_UP_3 +166 0x3000 //RX_TDDRC_ALPHA_UP_4 +184 0x7FB0 //RX_TDDRC_ALPHA_DWN_1 +185 0x7FB0 //RX_TDDRC_ALPHA_DWN_2 +186 0x7FB0 //RX_TDDRC_ALPHA_DWN_3 +189 0x7FB0 //RX_TDDRC_ALPHA_DWN_4 +190 0xDA9E //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +269 0x0000 //RX_TDDRC_THRD_0 +270 0x0000 //RX_TDDRC_THRD_1 +271 0x0E80 //RX_TDDRC_THRD_2 +272 0x3800 //RX_TDDRC_THRD_3 +273 0x2A00 //RX_TDDRC_SLANT_0 +274 0x6E00 //RX_TDDRC_SLANT_1 +275 0x3000 //RX_TDDRC_ALPHA_UP_0 +276 0x7FB0 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x0000 //RX_TDDRC_HMNC_GAIN +279 0x0000 //RX_TDDRC_SMT_FLAG +280 0x0000 //RX_TDDRC_SMT_W +281 0x0100 //RX_TDDRC_DRC_GAIN +195 0x0020 //RX_FDEQ_SUBNUM +196 0x4848 //RX_FDEQ_GAIN_0 +197 0x4848 //RX_FDEQ_GAIN_1 +198 0x4848 //RX_FDEQ_GAIN_2 +199 0x4848 //RX_FDEQ_GAIN_3 +200 0x4848 //RX_FDEQ_GAIN_4 +201 0x4848 //RX_FDEQ_GAIN_5 +202 0x4848 //RX_FDEQ_GAIN_6 +203 0x4848 //RX_FDEQ_GAIN_7 +204 0x4848 //RX_FDEQ_GAIN_8 +205 0x4848 //RX_FDEQ_GAIN_9 +206 0x4848 //RX_FDEQ_GAIN_10 +207 0x4848 //RX_FDEQ_GAIN_11 +208 0x4848 //RX_FDEQ_GAIN_12 +209 0x4848 //RX_FDEQ_GAIN_13 +210 0x4848 //RX_FDEQ_GAIN_14 +211 0x4848 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0000 //RX_FDEQ_BIN_0 +221 0x0000 //RX_FDEQ_BIN_1 +222 0x0000 //RX_FDEQ_BIN_2 +223 0x0000 //RX_FDEQ_BIN_3 +224 0x0000 //RX_FDEQ_BIN_4 +225 0x0000 //RX_FDEQ_BIN_5 +226 0x0000 //RX_FDEQ_BIN_6 +227 0x0000 //RX_FDEQ_BIN_7 +228 0x0000 //RX_FDEQ_BIN_8 +229 0x0000 //RX_FDEQ_BIN_9 +230 0x0000 //RX_FDEQ_BIN_10 +231 0x0000 //RX_FDEQ_BIN_11 +232 0x0000 //RX_FDEQ_BIN_12 +233 0x0000 //RX_FDEQ_BIN_13 +234 0x0000 //RX_FDEQ_BIN_14 +235 0x0000 //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x0000 //RX_FDEQ_RESRV_0 +245 0x0000 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0030 //RX_FDDRC_BAND_MARGIN_1 +248 0x0050 //RX_FDDRC_BAND_MARGIN_2 +249 0x0080 //RX_FDDRC_BAND_MARGIN_3 +250 0x0004 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x5000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x6400 //RX_FDDRC_THRD_3_2 +258 0x6400 //RX_FDDRC_THRD_3_3 +259 0x2000 //RX_FDDRC_SLANT_0_0 +260 0x2000 //RX_FDDRC_SLANT_0_1 +261 0x2000 //RX_FDDRC_SLANT_0_2 +262 0x2000 //RX_FDDRC_SLANT_0_3 +263 0x2000 //RX_FDDRC_SLANT_1_0 +264 0x2000 //RX_FDDRC_SLANT_1_1 +265 0x2000 //RX_FDDRC_SLANT_1_2 +266 0x2000 //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +286 0x0100 //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 +#VOL 5 +163 0x3000 //RX_TDDRC_ALPHA_UP_1 +164 0x3000 //RX_TDDRC_ALPHA_UP_2 +165 0x3000 //RX_TDDRC_ALPHA_UP_3 +166 0x3000 //RX_TDDRC_ALPHA_UP_4 +184 0x7FB0 //RX_TDDRC_ALPHA_DWN_1 +185 0x7FB0 //RX_TDDRC_ALPHA_DWN_2 +186 0x7FB0 //RX_TDDRC_ALPHA_DWN_3 +189 0x7FB0 //RX_TDDRC_ALPHA_DWN_4 +190 0xDA9E //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +269 0x0000 //RX_TDDRC_THRD_0 +270 0x0000 //RX_TDDRC_THRD_1 +271 0x0E80 //RX_TDDRC_THRD_2 +272 0x3800 //RX_TDDRC_THRD_3 +273 0x2A00 //RX_TDDRC_SLANT_0 +274 0x6E00 //RX_TDDRC_SLANT_1 +275 0x3000 //RX_TDDRC_ALPHA_UP_0 +276 0x7FB0 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x0000 //RX_TDDRC_HMNC_GAIN +279 0x0000 //RX_TDDRC_SMT_FLAG +280 0x0000 //RX_TDDRC_SMT_W +281 0x0100 //RX_TDDRC_DRC_GAIN +195 0x0020 //RX_FDEQ_SUBNUM +196 0x4848 //RX_FDEQ_GAIN_0 +197 0x4848 //RX_FDEQ_GAIN_1 +198 0x4848 //RX_FDEQ_GAIN_2 +199 0x4848 //RX_FDEQ_GAIN_3 +200 0x4848 //RX_FDEQ_GAIN_4 +201 0x4848 //RX_FDEQ_GAIN_5 +202 0x4848 //RX_FDEQ_GAIN_6 +203 0x4848 //RX_FDEQ_GAIN_7 +204 0x4848 //RX_FDEQ_GAIN_8 +205 0x4848 //RX_FDEQ_GAIN_9 +206 0x4848 //RX_FDEQ_GAIN_10 +207 0x4848 //RX_FDEQ_GAIN_11 +208 0x4848 //RX_FDEQ_GAIN_12 +209 0x4848 //RX_FDEQ_GAIN_13 +210 0x4848 //RX_FDEQ_GAIN_14 +211 0x4848 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0000 //RX_FDEQ_BIN_0 +221 0x0000 //RX_FDEQ_BIN_1 +222 0x0000 //RX_FDEQ_BIN_2 +223 0x0000 //RX_FDEQ_BIN_3 +224 0x0000 //RX_FDEQ_BIN_4 +225 0x0000 //RX_FDEQ_BIN_5 +226 0x0000 //RX_FDEQ_BIN_6 +227 0x0000 //RX_FDEQ_BIN_7 +228 0x0000 //RX_FDEQ_BIN_8 +229 0x0000 //RX_FDEQ_BIN_9 +230 0x0000 //RX_FDEQ_BIN_10 +231 0x0000 //RX_FDEQ_BIN_11 +232 0x0000 //RX_FDEQ_BIN_12 +233 0x0000 //RX_FDEQ_BIN_13 +234 0x0000 //RX_FDEQ_BIN_14 +235 0x0000 //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x0000 //RX_FDEQ_RESRV_0 +245 0x0000 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0030 //RX_FDDRC_BAND_MARGIN_1 +248 0x0050 //RX_FDDRC_BAND_MARGIN_2 +249 0x0080 //RX_FDDRC_BAND_MARGIN_3 +250 0x0004 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x5000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x6400 //RX_FDDRC_THRD_3_2 +258 0x6400 //RX_FDDRC_THRD_3_3 +259 0x2000 //RX_FDDRC_SLANT_0_0 +260 0x2000 //RX_FDDRC_SLANT_0_1 +261 0x2000 //RX_FDDRC_SLANT_0_2 +262 0x2000 //RX_FDDRC_SLANT_0_3 +263 0x2000 //RX_FDDRC_SLANT_1_0 +264 0x2000 //RX_FDDRC_SLANT_1_1 +265 0x2000 //RX_FDDRC_SLANT_1_2 +266 0x2000 //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +286 0x0100 //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 +#VOL 6 +163 0x3000 //RX_TDDRC_ALPHA_UP_1 +164 0x3000 //RX_TDDRC_ALPHA_UP_2 +165 0x3000 //RX_TDDRC_ALPHA_UP_3 +166 0x3000 //RX_TDDRC_ALPHA_UP_4 +184 0x7FB0 //RX_TDDRC_ALPHA_DWN_1 +185 0x7FB0 //RX_TDDRC_ALPHA_DWN_2 +186 0x7FB0 //RX_TDDRC_ALPHA_DWN_3 +189 0x7FB0 //RX_TDDRC_ALPHA_DWN_4 +190 0xDA9E //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +269 0x0000 //RX_TDDRC_THRD_0 +270 0x0000 //RX_TDDRC_THRD_1 +271 0x0E80 //RX_TDDRC_THRD_2 +272 0x3800 //RX_TDDRC_THRD_3 +273 0x2A00 //RX_TDDRC_SLANT_0 +274 0x6E00 //RX_TDDRC_SLANT_1 +275 0x3000 //RX_TDDRC_ALPHA_UP_0 +276 0x7FB0 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x0000 //RX_TDDRC_HMNC_GAIN +279 0x0000 //RX_TDDRC_SMT_FLAG +280 0x0000 //RX_TDDRC_SMT_W +281 0x0100 //RX_TDDRC_DRC_GAIN +195 0x0020 //RX_FDEQ_SUBNUM +196 0x4848 //RX_FDEQ_GAIN_0 +197 0x4848 //RX_FDEQ_GAIN_1 +198 0x4848 //RX_FDEQ_GAIN_2 +199 0x4848 //RX_FDEQ_GAIN_3 +200 0x4848 //RX_FDEQ_GAIN_4 +201 0x4848 //RX_FDEQ_GAIN_5 +202 0x4848 //RX_FDEQ_GAIN_6 +203 0x4848 //RX_FDEQ_GAIN_7 +204 0x4848 //RX_FDEQ_GAIN_8 +205 0x4848 //RX_FDEQ_GAIN_9 +206 0x4848 //RX_FDEQ_GAIN_10 +207 0x4848 //RX_FDEQ_GAIN_11 +208 0x4848 //RX_FDEQ_GAIN_12 +209 0x4848 //RX_FDEQ_GAIN_13 +210 0x4848 //RX_FDEQ_GAIN_14 +211 0x4848 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0000 //RX_FDEQ_BIN_0 +221 0x0000 //RX_FDEQ_BIN_1 +222 0x0000 //RX_FDEQ_BIN_2 +223 0x0000 //RX_FDEQ_BIN_3 +224 0x0000 //RX_FDEQ_BIN_4 +225 0x0000 //RX_FDEQ_BIN_5 +226 0x0000 //RX_FDEQ_BIN_6 +227 0x0000 //RX_FDEQ_BIN_7 +228 0x0000 //RX_FDEQ_BIN_8 +229 0x0000 //RX_FDEQ_BIN_9 +230 0x0000 //RX_FDEQ_BIN_10 +231 0x0000 //RX_FDEQ_BIN_11 +232 0x0000 //RX_FDEQ_BIN_12 +233 0x0000 //RX_FDEQ_BIN_13 +234 0x0000 //RX_FDEQ_BIN_14 +235 0x0000 //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x0000 //RX_FDEQ_RESRV_0 +245 0x0000 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0030 //RX_FDDRC_BAND_MARGIN_1 +248 0x0050 //RX_FDDRC_BAND_MARGIN_2 +249 0x0080 //RX_FDDRC_BAND_MARGIN_3 +250 0x0004 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x5000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x6400 //RX_FDDRC_THRD_3_2 +258 0x6400 //RX_FDDRC_THRD_3_3 +259 0x2000 //RX_FDDRC_SLANT_0_0 +260 0x2000 //RX_FDDRC_SLANT_0_1 +261 0x2000 //RX_FDDRC_SLANT_0_2 +262 0x2000 //RX_FDDRC_SLANT_0_3 +263 0x2000 //RX_FDDRC_SLANT_1_0 +264 0x2000 //RX_FDDRC_SLANT_1_1 +265 0x2000 //RX_FDDRC_SLANT_1_2 +266 0x2000 //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +286 0x0100 //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 #CASE_NAME HEADSET-TTY_FULL-VOICE_GENERIC-WB -#PARAM_MODE FULL -#PARAM_TYPE TX+RX -#TOTAL_CUSTOM_STEP 7 +#PARAM_MODE Full +#PARAM_TYPE TX+2RX +#TOTAL_CUSTOM_STEP 7+7 #TX 0 0x0001 //TX_OPERATION_MODE_0 1 0x0000 //TX_OPERATION_MODE_1 @@ -51116,7 +77680,7 @@ 239 0x0000 //TX_DT_RESRV_7 240 0x0000 //TX_DT_RESRV_8 241 0x0000 //TX_DT_RESRV_9 -242 0xF200 //TX_THR_SN_EST_0 +242 0xFA00 //TX_THR_SN_EST_0 243 0xF400 //TX_THR_SN_EST_1 244 0xF800 //TX_THR_SN_EST_2 245 0xF600 //TX_THR_SN_EST_3 @@ -51125,12 +77689,12 @@ 248 0xF800 //TX_THR_SN_EST_6 249 0xF800 //TX_THR_SN_EST_7 250 0x0100 //TX_DELTA_THR_SN_EST_0 -251 0x0000 //TX_DELTA_THR_SN_EST_1 +251 0x0100 //TX_DELTA_THR_SN_EST_1 252 0x0100 //TX_DELTA_THR_SN_EST_2 -253 0x0100 //TX_DELTA_THR_SN_EST_3 +253 0x0200 //TX_DELTA_THR_SN_EST_3 254 0x0200 //TX_DELTA_THR_SN_EST_4 255 0x0200 //TX_DELTA_THR_SN_EST_5 -256 0x0200 //TX_DELTA_THR_SN_EST_6 +256 0x0000 //TX_DELTA_THR_SN_EST_6 257 0x0200 //TX_DELTA_THR_SN_EST_7 258 0x4000 //TX_LAMBDA_NN_EST_0 259 0x4000 //TX_LAMBDA_NN_EST_1 @@ -51156,12 +77720,12 @@ 279 0x0000 //TX_B_POST_FLT_0 280 0x0000 //TX_B_POST_FLT_1 281 0x001A //TX_NS_LVL_CTRL_0 -282 0x001A //TX_NS_LVL_CTRL_1 +282 0x0014 //TX_NS_LVL_CTRL_1 283 0x0014 //TX_NS_LVL_CTRL_2 -284 0x0014 //TX_NS_LVL_CTRL_3 +284 0x000C //TX_NS_LVL_CTRL_3 285 0x000C //TX_NS_LVL_CTRL_4 286 0x000C //TX_NS_LVL_CTRL_5 -287 0x000C //TX_NS_LVL_CTRL_6 +287 0x001A //TX_NS_LVL_CTRL_6 288 0x000C //TX_NS_LVL_CTRL_7 289 0x000E //TX_MIN_GAIN_S_0 290 0x0014 //TX_MIN_GAIN_S_1 @@ -51177,10 +77741,10 @@ 300 0x7FFF //TX_SNRI_SUP_0 301 0x7FFF //TX_SNRI_SUP_1 302 0x7FFF //TX_SNRI_SUP_2 -303 0x7FFF //TX_SNRI_SUP_3 +303 0x4000 //TX_SNRI_SUP_3 304 0x4000 //TX_SNRI_SUP_4 305 0x4000 //TX_SNRI_SUP_5 -306 0x4000 //TX_SNRI_SUP_6 +306 0x7FFF //TX_SNRI_SUP_6 307 0x4000 //TX_SNRI_SUP_7 308 0x1200 //TX_THR_LFNS 309 0x0147 //TX_G_LFNS @@ -51189,12 +77753,12 @@ 312 0x7FFF //TX_A_POST_FILT_0 313 0x7FFF //TX_A_POST_FILT_1 314 0x4000 //TX_A_POST_FILT_S_0 -315 0x199A //TX_A_POST_FILT_S_1 +315 0x1000 //TX_A_POST_FILT_S_1 316 0x1000 //TX_A_POST_FILT_S_2 -317 0x1000 //TX_A_POST_FILT_S_3 +317 0x6666 //TX_A_POST_FILT_S_3 318 0x6666 //TX_A_POST_FILT_S_4 319 0x6666 //TX_A_POST_FILT_S_5 -320 0x6666 //TX_A_POST_FILT_S_6 +320 0x199A //TX_A_POST_FILT_S_6 321 0x6666 //TX_A_POST_FILT_S_7 322 0x2000 //TX_B_POST_FILT_0 323 0x2000 //TX_B_POST_FILT_1 @@ -51241,7 +77805,7 @@ 364 0x0000 //TX_K_APT 365 0x0001 //TX_NOISEDET 366 0x05A0 //TX_NDETCT -367 0x000A //TX_NOISE_TH_0 +367 0x0102 //TX_NOISE_TH_0 368 0x1388 //TX_NOISE_TH_0_2 369 0x3A98 //TX_NOISE_TH_0_3 370 0x0C80 //TX_NOISE_TH_1 @@ -51253,11 +77817,11 @@ 376 0x7FFF //TX_NOISE_TH_5_3 377 0x7FFF //TX_NOISE_TH_5_4 378 0x00C8 //TX_NOISE_TH_6 -379 0x000A //TX_MINENOISE_TH -380 0x0000 //TX_MINENOISE_MIC0_TH_MTS -381 0x0000 //TX_MINENOISE_MIC0_TH_EXP -382 0x0000 //TX_MINENOISE_MIC0_S_TH_MTS -383 0x0000 //TX_MINENOISE_MIC0_S_TH_EXP +379 0x00F8 //TX_MINENOISE_TH +380 0xD508 //TX_MORENS_TFMASK_TH +381 0x0001 //TX_DRC_QUIET_FLOOR +382 0x3A98 //TX_RATIODTL_CUT_TH +383 0x0DAC //TX_DT_CUT_K1 384 0x6400 //TX_OUT_ENER_S_TH_CLEAN 385 0x6400 //TX_OUT_ENER_S_TH_LESSCLEAN 386 0x6400 //TX_OUT_ENER_S_TH_NOISY @@ -51265,22 +77829,22 @@ 388 0x7D00 //TX_OUT_ENER_TH_SPEECH 389 0x0000 //TX_SN_NPB_GAIN 390 0x0000 //TX_NN_NPB_GAIN -391 0x0000 //TX_CSX_ALPHA_0 -392 0x0000 //TX_CSX_ALPHA_1 -393 0x0000 //TX_CSX_ALPHA_2 -394 0x0000 //TX_CSX_ALPHA_3 -395 0x0000 //TX_MU_ARSP_EST -396 0x0000 //TX_P_OUTBEAM_MIN_TH +391 0x7FFF //TX_POST_MASK_SUP_HSNE +392 0x1388 //TX_TAIL_DET_TH +393 0x4000 //TX_B_LESSCUT_RTO_WTA +394 0x0000 //TX_MEL_G_R +395 0x0080 //TX_SUPHIGH_TH +396 0x0000 //TX_MASK_G_R 397 0x0000 //TX_EXTRA_NS_L -398 0x0000 //TX_EXTRA_NS_A -399 0x0000 //TX_VR_NOISE_FLOOR_TH +398 0x1800 //TX_C_POST_FLT_MASK +399 0x7FFF //TX_A_POST_FLT_WNS 400 0x0000 //TX_MIN_G_LOW300HZ 401 0x0010 //TX_MAXLEVEL_CNG 402 0x0000 //TX_STN_NOISE_TH 403 0x0000 //TX_POST_MASK_SUP 404 0x0000 //TX_POST_MASK_ADJUST 405 0x0014 //TX_NS_ENOISE_MIC0_TH -406 0x0014 //TX_MINENOISE_MIC0_TH +406 0x00DC //TX_MINENOISE_MIC0_TH 407 0x0226 //TX_MINENOISE_MIC0_S_TH 408 0x2879 //TX_MIN_G_CTRL_SSNS 409 0x0400 //TX_METAL_RTO_THR @@ -51388,16 +77952,16 @@ 511 0x6666 //TX_MIC_TO_BFGAIN 512 0x6666 //TX_MICTOBFGAIN0 513 0x0014 //TX_FASTMUE_TH -514 0x0000 //TX_DERVB_LEN_0 -515 0x0000 //TX_DERVB_LEN_1 -516 0x0000 //TX_RHO_DERVB -517 0x0000 //TX_MIC_INDX_DERVB -518 0x0000 //TX_MU_DERVB -519 0x0000 //TX_DR_RESRV_0 -520 0x0000 //TX_DR_RESRV_1 -521 0x0000 //TX_DR_RESRV_2 -522 0x0000 //TX_DR_RESRV_3 -523 0x0000 //TX_DR_RESRV_4 +514 0xC000 //TX_DEREVERB_LF_MU +515 0xC000 //TX_DEREVERB_HF_MU +516 0xCCCC //TX_DEREVERB_DELAY +517 0xD999 //TX_DEREVERB_COEF_LEN +518 0x1F40 //TX_DEREVERB_DNR +519 0x0000 //TX_DEREVERB_ALPHA +520 0x0000 //TX_DEREVERB_BETA +521 0x0000 //TX_GSC_RTOL_TH +522 0x7000 //TX_GSC_RTOH_TH +523 0x0064 //TX_WIDE2_MEANHTH 524 0x0000 //TX_DR_RESRV_5 525 0x0000 //TX_DR_RESRV_6 526 0x0000 //TX_DR_RESRV_7 @@ -51763,16 +78327,81 @@ 886 0x0000 //TX_FASTNS_TFMASKBIN_TH2 887 0x0000 //TX_FASTNS_TFMASKBIN_TH3 888 0x00C8 //TX_FASTNS_ARSPC_TH -889 0xD99A //TX_FASTNS_MASK5_TH +889 0xC000 //TX_FASTNS_MASK5_TH 890 0x051F //TX_POSTSSA_MIN_G_VR_MASK -891 0x7FFF //TX_A_LESSCUT_RTO_MASK +891 0x4000 //TX_A_LESSCUT_RTO_MASK 892 0x1770 //TX_FASTNS_NOISETH 893 0xC000 //TX_FASTNS_SSA_THLFL 894 0xC000 //TX_FASTNS_SSA_THHFL 895 0xCCCC //TX_FASTNS_SSA_THLFH 896 0xD999 //TX_FASTNS_SSA_THHFH +897 0x2339 //TX_SENDFUNC_REG_MICMUTE +898 0x0021 //TX_SENDFUNC_REG_MICMUTE1 +899 0x02BC //TX_MICMUTE_RATIO_THR +900 0x0140 //TX_MICMUTE_AMP_THR +901 0x0004 //TX_MICMUTE_HPF_IND +902 0x00C0 //TX_MICMUTE_LOG_EYR_TH +903 0x0008 //TX_MICMUTE_CVG_TIME +904 0x0008 //TX_MICMUTE_RELEASE_TIME +905 0x01FE //TX_MIC_VOLUME_MIC0MUTE +906 0x0020 //TX_MICMUTE_EPD_OFFSET_0 +907 0x001E //TX_MICMUTE_FRQ_AEC_L +908 0x7999 //TX_MICMUTE_EAD_THR +909 0x7FFF //TX_MICMUTE_LAMBDA_CB_NLE +910 0x7FFF //TX_MICMUTE_LAMBDA_RE_EST +911 0x4000 //TX_DTD_THR1_MICMUTE_0 +912 0x7000 //TX_DTD_THR1_MICMUTE_1 +913 0x7FFF //TX_DTD_THR1_MICMUTE_2 +914 0x7FFF //TX_DTD_THR1_MICMUTE_3 +915 0x6CCC //TX_DTD_THR2_MICMUTE_0 +916 0x0400 //TX_MICMUTE_MIN_EQ_RE_EST_0 +917 0x0400 //TX_MICMUTE_MIN_EQ_RE_EST_1 +918 0x1000 //TX_MICMUTE_MIN_EQ_RE_EST_2 +919 0x7FFF //TX_MICMUTE_MIN_EQ_RE_EST_3 +920 0x7FFF //TX_MICMUTE_MIN_EQ_RE_EST_4 +921 0x4000 //TX_MICMUTE_C_POST_FLT +922 0x03E8 //TX_MICMUTE_DT_CUT_K +923 0x0001 //TX_MICMUTE_DT_CUT_THR +924 0x03E8 //TX_MICMUTE_DT_CUT_K2 +925 0x0001 //TX_MICMUTE_DT_CUT_THR2 +926 0x0064 //TX_MICMUTE_DT2_HOLD_N +927 0x1000 //TX_MICMUTE_RATIODTH_THCUT +928 0x1000 //TX_MICMUTE_B_POST_FLT_ECHOL +929 0x7FFF //TX_MICMUTE_B_POST_FLT_ECHOH +930 0x0400 //TX_MICMUTE_C_POST_FLT_MASK +931 0x7999 //TX_MICMUTE_RATIODTL_CUT_TH +932 0x0258 //TX_MICMUTE_DT_CUT_K1 +933 0x0800 //TX_MICMUTE_N2_SN_EST +934 0xFC00 //TX_MICMUTE_THR_SN_EST_0 +935 0x001C //TX_MICMUTE_MIN_G_CTRL_0 +936 0x6000 //TX_MICMUTE_A_POST_FILT_S_0 +937 0x7000 //TX_MICMUTE_B_POST_FILT_0 +938 0x2710 //TX_MIC1RUB_AMP_THR +939 0x0010 //TX_MIC1MUTE_RATIO_THR +940 0x0450 //TX_MIC1MUTE_AMP_THR +941 0x0008 //TX_MIC1MUTE_CVG_TIME +942 0x0008 //TX_MIC1MUTE_RELEASE_TIME +943 0x0000 //TX_AMS_RESRV_01 +944 0x0000 //TX_AMS_RESRV_02 +945 0x0000 //TX_AMS_RESRV_03 +946 0x0000 //TX_AMS_RESRV_04 +947 0x0000 //TX_AMS_RESRV_05 +948 0x0000 //TX_AMS_RESRV_06 +949 0x0000 //TX_AMS_RESRV_07 +950 0x0000 //TX_AMS_RESRV_08 +951 0x0000 //TX_AMS_RESRV_09 +952 0x0000 //TX_AMS_RESRV_10 +953 0x0000 //TX_AMS_RESRV_11 +954 0x0000 //TX_AMS_RESRV_12 +955 0x0000 //TX_AMS_RESRV_13 +956 0x0000 //TX_AMS_RESRV_14 +957 0x0000 //TX_AMS_RESRV_15 +958 0x0000 //TX_AMS_RESRV_16 +959 0x0000 //TX_AMS_RESRV_17 +960 0x0000 //TX_AMS_RESRV_18 +961 0x0000 //TX_AMS_RESRV_19 #RX -0 0x0040 //RX_RECVFUNC_MODE_0 +0 0x2040 //RX_RECVFUNC_MODE_0 1 0x0000 //RX_RECVFUNC_MODE_1 2 0x0000 //RX_SAMPLINGFREQ_SIG 3 0x0000 //RX_SAMPLINGFREQ_PROC @@ -52622,11 +79251,862 @@ 110 0x0000 //RX_FDDRC_RESRV_0 129 0x0100 //RX_SPK_VOL 130 0x0000 //RX_VOL_RESRV_0 +#RX 2 +157 0x2040 //RX_RECVFUNC_MODE_0 +158 0x0000 //RX_RECVFUNC_MODE_1 +159 0x0000 //RX_SAMPLINGFREQ_SIG +160 0x0000 //RX_SAMPLINGFREQ_PROC +161 0x000A //RX_FRAME_SZ +162 0x0000 //RX_DELAY_OPT +163 0x3000 //RX_TDDRC_ALPHA_UP_1 +164 0x3000 //RX_TDDRC_ALPHA_UP_2 +165 0x3000 //RX_TDDRC_ALPHA_UP_3 +166 0x3000 //RX_TDDRC_ALPHA_UP_4 +167 0x050D //RX_PGA +168 0x7652 //RX_A_HP +169 0x4000 //RX_B_PE +170 0x7800 //RX_THR_PITCH_DET_0 +171 0x7000 //RX_THR_PITCH_DET_1 +172 0x6000 //RX_THR_PITCH_DET_2 +173 0x0000 //RX_PITCH_BFR_LEN +174 0x0000 //RX_SBD_PITCH_DET +175 0x0000 //RX_PP_RESRV_0 +176 0x0000 //RX_PP_RESRV_1 +177 0xF800 //RX_N_SN_EST +178 0x0000 //RX_N2_SN_EST +179 0x000F //RX_NS_LVL_CTRL +180 0xF800 //RX_THR_SN_EST +181 0x7E00 //RX_LAMBDA_PFILT +182 0x000A //RX_FENS_RESRV_0 +183 0x0000 //RX_FENS_RESRV_1 +184 0x7FB0 //RX_TDDRC_ALPHA_DWN_1 +185 0x7FB0 //RX_TDDRC_ALPHA_DWN_2 +186 0x7FB0 //RX_TDDRC_ALPHA_DWN_3 +187 0x0000 //RX_EXTRA_NS_L +188 0x0000 //RX_EXTRA_NS_A +189 0x7FB0 //RX_TDDRC_ALPHA_DWN_4 +190 0xDA9E //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +192 0x0000 //RX_A_POST_FLT +193 0x0000 //RX_LMT_THRD +194 0x4000 //RX_LMT_ALPHA +195 0x0020 //RX_FDEQ_SUBNUM +196 0x4848 //RX_FDEQ_GAIN_0 +197 0x4848 //RX_FDEQ_GAIN_1 +198 0x4848 //RX_FDEQ_GAIN_2 +199 0x4848 //RX_FDEQ_GAIN_3 +200 0x4848 //RX_FDEQ_GAIN_4 +201 0x4848 //RX_FDEQ_GAIN_5 +202 0x4848 //RX_FDEQ_GAIN_6 +203 0x4848 //RX_FDEQ_GAIN_7 +204 0x4848 //RX_FDEQ_GAIN_8 +205 0x4848 //RX_FDEQ_GAIN_9 +206 0x4848 //RX_FDEQ_GAIN_10 +207 0x4848 //RX_FDEQ_GAIN_11 +208 0x4848 //RX_FDEQ_GAIN_12 +209 0x4848 //RX_FDEQ_GAIN_13 +210 0x4848 //RX_FDEQ_GAIN_14 +211 0x4848 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0000 //RX_FDEQ_BIN_0 +221 0x0000 //RX_FDEQ_BIN_1 +222 0x0000 //RX_FDEQ_BIN_2 +223 0x0000 //RX_FDEQ_BIN_3 +224 0x0000 //RX_FDEQ_BIN_4 +225 0x0000 //RX_FDEQ_BIN_5 +226 0x0000 //RX_FDEQ_BIN_6 +227 0x0000 //RX_FDEQ_BIN_7 +228 0x0000 //RX_FDEQ_BIN_8 +229 0x0000 //RX_FDEQ_BIN_9 +230 0x0000 //RX_FDEQ_BIN_10 +231 0x0000 //RX_FDEQ_BIN_11 +232 0x0000 //RX_FDEQ_BIN_12 +233 0x0000 //RX_FDEQ_BIN_13 +234 0x0000 //RX_FDEQ_BIN_14 +235 0x0000 //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x0000 //RX_FDEQ_RESRV_0 +245 0x0000 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0030 //RX_FDDRC_BAND_MARGIN_1 +248 0x0050 //RX_FDDRC_BAND_MARGIN_2 +249 0x0080 //RX_FDDRC_BAND_MARGIN_3 +250 0x0004 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x5000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x6400 //RX_FDDRC_THRD_3_2 +258 0x6400 //RX_FDDRC_THRD_3_3 +259 0x2000 //RX_FDDRC_SLANT_0_0 +260 0x2000 //RX_FDDRC_SLANT_0_1 +261 0x2000 //RX_FDDRC_SLANT_0_2 +262 0x2000 //RX_FDDRC_SLANT_0_3 +263 0x2000 //RX_FDDRC_SLANT_1_0 +264 0x2000 //RX_FDDRC_SLANT_1_1 +265 0x2000 //RX_FDDRC_SLANT_1_2 +266 0x2000 //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +268 0x0003 //RX_FILTINDX +269 0x0000 //RX_TDDRC_THRD_0 +270 0x0000 //RX_TDDRC_THRD_1 +271 0x0E80 //RX_TDDRC_THRD_2 +272 0x3800 //RX_TDDRC_THRD_3 +273 0x2A00 //RX_TDDRC_SLANT_0 +274 0x6E00 //RX_TDDRC_SLANT_1 +275 0x3000 //RX_TDDRC_ALPHA_UP_0 +276 0x7FB0 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x0000 //RX_TDDRC_HMNC_GAIN +279 0x0000 //RX_TDDRC_SMT_FLAG +280 0x0000 //RX_TDDRC_SMT_W +281 0x0100 //RX_TDDRC_DRC_GAIN +282 0x7C00 //RX_LAMBDA_PKA_FP +283 0x2000 //RX_TPKA_FP +284 0x0080 //RX_MIN_G_FP +285 0x2000 //RX_MAX_G_FP +286 0x0100 //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 +288 0x0010 //RX_MAXLEVEL_CNG +289 0x0000 //RX_BWE_UV_TH +290 0x0000 //RX_BWE_UV_TH2 +291 0x0000 //RX_BWE_UV_TH3 +292 0x0000 //RX_BWE_V_TH +293 0x0000 //RX_BWE_GAIN1_V_TH1 +294 0x0000 //RX_BWE_GAIN1_V_TH2 +295 0x0000 //RX_BWE_UV_EQ +296 0x0000 //RX_BWE_V_EQ +297 0x0000 //RX_BWE_TONE_TH +298 0x0000 //RX_BWE_UV_HOLD_T +299 0x0000 //RX_BWE_GAIN2_ALPHA +300 0x0000 //RX_BWE_GAIN3_ALPHA +301 0x0000 //RX_BWE_CUTOFF +302 0x0000 //RX_BWE_GAINFILL +303 0x0000 //RX_BWE_MAXTH_TONE +304 0x0000 //RX_BWE_EQ_0 +305 0x0000 //RX_BWE_EQ_1 +306 0x0000 //RX_BWE_EQ_2 +307 0x0000 //RX_BWE_EQ_3 +308 0x0000 //RX_BWE_EQ_4 +309 0x0000 //RX_BWE_EQ_5 +310 0x0000 //RX_BWE_EQ_6 +311 0x0000 //RX_BWE_RESRV_0 +312 0x0000 //RX_BWE_RESRV_1 +313 0x0000 //RX_BWE_RESRV_2 +#VOL 0 +163 0x3000 //RX_TDDRC_ALPHA_UP_1 +164 0x3000 //RX_TDDRC_ALPHA_UP_2 +165 0x3000 //RX_TDDRC_ALPHA_UP_3 +166 0x3000 //RX_TDDRC_ALPHA_UP_4 +184 0x7FB0 //RX_TDDRC_ALPHA_DWN_1 +185 0x7FB0 //RX_TDDRC_ALPHA_DWN_2 +186 0x7FB0 //RX_TDDRC_ALPHA_DWN_3 +189 0x7FB0 //RX_TDDRC_ALPHA_DWN_4 +190 0xDA9E //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +269 0x0000 //RX_TDDRC_THRD_0 +270 0x0000 //RX_TDDRC_THRD_1 +271 0x0E80 //RX_TDDRC_THRD_2 +272 0x3800 //RX_TDDRC_THRD_3 +273 0x2A00 //RX_TDDRC_SLANT_0 +274 0x6E00 //RX_TDDRC_SLANT_1 +275 0x3000 //RX_TDDRC_ALPHA_UP_0 +276 0x7FB0 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x0000 //RX_TDDRC_HMNC_GAIN +279 0x0000 //RX_TDDRC_SMT_FLAG +280 0x0000 //RX_TDDRC_SMT_W +281 0x0100 //RX_TDDRC_DRC_GAIN +195 0x0020 //RX_FDEQ_SUBNUM +196 0x4848 //RX_FDEQ_GAIN_0 +197 0x4848 //RX_FDEQ_GAIN_1 +198 0x4848 //RX_FDEQ_GAIN_2 +199 0x4848 //RX_FDEQ_GAIN_3 +200 0x4848 //RX_FDEQ_GAIN_4 +201 0x4848 //RX_FDEQ_GAIN_5 +202 0x4848 //RX_FDEQ_GAIN_6 +203 0x4848 //RX_FDEQ_GAIN_7 +204 0x4848 //RX_FDEQ_GAIN_8 +205 0x4848 //RX_FDEQ_GAIN_9 +206 0x4848 //RX_FDEQ_GAIN_10 +207 0x4848 //RX_FDEQ_GAIN_11 +208 0x4848 //RX_FDEQ_GAIN_12 +209 0x4848 //RX_FDEQ_GAIN_13 +210 0x4848 //RX_FDEQ_GAIN_14 +211 0x4848 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0000 //RX_FDEQ_BIN_0 +221 0x0000 //RX_FDEQ_BIN_1 +222 0x0000 //RX_FDEQ_BIN_2 +223 0x0000 //RX_FDEQ_BIN_3 +224 0x0000 //RX_FDEQ_BIN_4 +225 0x0000 //RX_FDEQ_BIN_5 +226 0x0000 //RX_FDEQ_BIN_6 +227 0x0000 //RX_FDEQ_BIN_7 +228 0x0000 //RX_FDEQ_BIN_8 +229 0x0000 //RX_FDEQ_BIN_9 +230 0x0000 //RX_FDEQ_BIN_10 +231 0x0000 //RX_FDEQ_BIN_11 +232 0x0000 //RX_FDEQ_BIN_12 +233 0x0000 //RX_FDEQ_BIN_13 +234 0x0000 //RX_FDEQ_BIN_14 +235 0x0000 //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x0000 //RX_FDEQ_RESRV_0 +245 0x0000 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0030 //RX_FDDRC_BAND_MARGIN_1 +248 0x0050 //RX_FDDRC_BAND_MARGIN_2 +249 0x0080 //RX_FDDRC_BAND_MARGIN_3 +250 0x0004 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x5000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x6400 //RX_FDDRC_THRD_3_2 +258 0x6400 //RX_FDDRC_THRD_3_3 +259 0x2000 //RX_FDDRC_SLANT_0_0 +260 0x2000 //RX_FDDRC_SLANT_0_1 +261 0x2000 //RX_FDDRC_SLANT_0_2 +262 0x2000 //RX_FDDRC_SLANT_0_3 +263 0x2000 //RX_FDDRC_SLANT_1_0 +264 0x2000 //RX_FDDRC_SLANT_1_1 +265 0x2000 //RX_FDDRC_SLANT_1_2 +266 0x2000 //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +286 0x0100 //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 +#VOL 1 +163 0x3000 //RX_TDDRC_ALPHA_UP_1 +164 0x3000 //RX_TDDRC_ALPHA_UP_2 +165 0x3000 //RX_TDDRC_ALPHA_UP_3 +166 0x3000 //RX_TDDRC_ALPHA_UP_4 +184 0x7FB0 //RX_TDDRC_ALPHA_DWN_1 +185 0x7FB0 //RX_TDDRC_ALPHA_DWN_2 +186 0x7FB0 //RX_TDDRC_ALPHA_DWN_3 +189 0x7FB0 //RX_TDDRC_ALPHA_DWN_4 +190 0xDA9E //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +269 0x0000 //RX_TDDRC_THRD_0 +270 0x0000 //RX_TDDRC_THRD_1 +271 0x0E80 //RX_TDDRC_THRD_2 +272 0x3800 //RX_TDDRC_THRD_3 +273 0x2A00 //RX_TDDRC_SLANT_0 +274 0x6E00 //RX_TDDRC_SLANT_1 +275 0x3000 //RX_TDDRC_ALPHA_UP_0 +276 0x7FB0 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x0000 //RX_TDDRC_HMNC_GAIN +279 0x0000 //RX_TDDRC_SMT_FLAG +280 0x0000 //RX_TDDRC_SMT_W +281 0x0100 //RX_TDDRC_DRC_GAIN +195 0x0020 //RX_FDEQ_SUBNUM +196 0x4848 //RX_FDEQ_GAIN_0 +197 0x4848 //RX_FDEQ_GAIN_1 +198 0x4848 //RX_FDEQ_GAIN_2 +199 0x4848 //RX_FDEQ_GAIN_3 +200 0x4848 //RX_FDEQ_GAIN_4 +201 0x4848 //RX_FDEQ_GAIN_5 +202 0x4848 //RX_FDEQ_GAIN_6 +203 0x4848 //RX_FDEQ_GAIN_7 +204 0x4848 //RX_FDEQ_GAIN_8 +205 0x4848 //RX_FDEQ_GAIN_9 +206 0x4848 //RX_FDEQ_GAIN_10 +207 0x4848 //RX_FDEQ_GAIN_11 +208 0x4848 //RX_FDEQ_GAIN_12 +209 0x4848 //RX_FDEQ_GAIN_13 +210 0x4848 //RX_FDEQ_GAIN_14 +211 0x4848 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0000 //RX_FDEQ_BIN_0 +221 0x0000 //RX_FDEQ_BIN_1 +222 0x0000 //RX_FDEQ_BIN_2 +223 0x0000 //RX_FDEQ_BIN_3 +224 0x0000 //RX_FDEQ_BIN_4 +225 0x0000 //RX_FDEQ_BIN_5 +226 0x0000 //RX_FDEQ_BIN_6 +227 0x0000 //RX_FDEQ_BIN_7 +228 0x0000 //RX_FDEQ_BIN_8 +229 0x0000 //RX_FDEQ_BIN_9 +230 0x0000 //RX_FDEQ_BIN_10 +231 0x0000 //RX_FDEQ_BIN_11 +232 0x0000 //RX_FDEQ_BIN_12 +233 0x0000 //RX_FDEQ_BIN_13 +234 0x0000 //RX_FDEQ_BIN_14 +235 0x0000 //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x0000 //RX_FDEQ_RESRV_0 +245 0x0000 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0030 //RX_FDDRC_BAND_MARGIN_1 +248 0x0050 //RX_FDDRC_BAND_MARGIN_2 +249 0x0080 //RX_FDDRC_BAND_MARGIN_3 +250 0x0004 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x5000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x6400 //RX_FDDRC_THRD_3_2 +258 0x6400 //RX_FDDRC_THRD_3_3 +259 0x2000 //RX_FDDRC_SLANT_0_0 +260 0x2000 //RX_FDDRC_SLANT_0_1 +261 0x2000 //RX_FDDRC_SLANT_0_2 +262 0x2000 //RX_FDDRC_SLANT_0_3 +263 0x2000 //RX_FDDRC_SLANT_1_0 +264 0x2000 //RX_FDDRC_SLANT_1_1 +265 0x2000 //RX_FDDRC_SLANT_1_2 +266 0x2000 //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +286 0x0100 //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 +#VOL 2 +163 0x3000 //RX_TDDRC_ALPHA_UP_1 +164 0x3000 //RX_TDDRC_ALPHA_UP_2 +165 0x3000 //RX_TDDRC_ALPHA_UP_3 +166 0x3000 //RX_TDDRC_ALPHA_UP_4 +184 0x7FB0 //RX_TDDRC_ALPHA_DWN_1 +185 0x7FB0 //RX_TDDRC_ALPHA_DWN_2 +186 0x7FB0 //RX_TDDRC_ALPHA_DWN_3 +189 0x7FB0 //RX_TDDRC_ALPHA_DWN_4 +190 0xDA9E //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +269 0x0000 //RX_TDDRC_THRD_0 +270 0x0000 //RX_TDDRC_THRD_1 +271 0x0E80 //RX_TDDRC_THRD_2 +272 0x3800 //RX_TDDRC_THRD_3 +273 0x2A00 //RX_TDDRC_SLANT_0 +274 0x6E00 //RX_TDDRC_SLANT_1 +275 0x3000 //RX_TDDRC_ALPHA_UP_0 +276 0x7FB0 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x0000 //RX_TDDRC_HMNC_GAIN +279 0x0000 //RX_TDDRC_SMT_FLAG +280 0x0000 //RX_TDDRC_SMT_W +281 0x0100 //RX_TDDRC_DRC_GAIN +195 0x0020 //RX_FDEQ_SUBNUM +196 0x4848 //RX_FDEQ_GAIN_0 +197 0x4848 //RX_FDEQ_GAIN_1 +198 0x4848 //RX_FDEQ_GAIN_2 +199 0x4848 //RX_FDEQ_GAIN_3 +200 0x4848 //RX_FDEQ_GAIN_4 +201 0x4848 //RX_FDEQ_GAIN_5 +202 0x4848 //RX_FDEQ_GAIN_6 +203 0x4848 //RX_FDEQ_GAIN_7 +204 0x4848 //RX_FDEQ_GAIN_8 +205 0x4848 //RX_FDEQ_GAIN_9 +206 0x4848 //RX_FDEQ_GAIN_10 +207 0x4848 //RX_FDEQ_GAIN_11 +208 0x4848 //RX_FDEQ_GAIN_12 +209 0x4848 //RX_FDEQ_GAIN_13 +210 0x4848 //RX_FDEQ_GAIN_14 +211 0x4848 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0000 //RX_FDEQ_BIN_0 +221 0x0000 //RX_FDEQ_BIN_1 +222 0x0000 //RX_FDEQ_BIN_2 +223 0x0000 //RX_FDEQ_BIN_3 +224 0x0000 //RX_FDEQ_BIN_4 +225 0x0000 //RX_FDEQ_BIN_5 +226 0x0000 //RX_FDEQ_BIN_6 +227 0x0000 //RX_FDEQ_BIN_7 +228 0x0000 //RX_FDEQ_BIN_8 +229 0x0000 //RX_FDEQ_BIN_9 +230 0x0000 //RX_FDEQ_BIN_10 +231 0x0000 //RX_FDEQ_BIN_11 +232 0x0000 //RX_FDEQ_BIN_12 +233 0x0000 //RX_FDEQ_BIN_13 +234 0x0000 //RX_FDEQ_BIN_14 +235 0x0000 //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x0000 //RX_FDEQ_RESRV_0 +245 0x0000 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0030 //RX_FDDRC_BAND_MARGIN_1 +248 0x0050 //RX_FDDRC_BAND_MARGIN_2 +249 0x0080 //RX_FDDRC_BAND_MARGIN_3 +250 0x0004 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x5000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x6400 //RX_FDDRC_THRD_3_2 +258 0x6400 //RX_FDDRC_THRD_3_3 +259 0x2000 //RX_FDDRC_SLANT_0_0 +260 0x2000 //RX_FDDRC_SLANT_0_1 +261 0x2000 //RX_FDDRC_SLANT_0_2 +262 0x2000 //RX_FDDRC_SLANT_0_3 +263 0x2000 //RX_FDDRC_SLANT_1_0 +264 0x2000 //RX_FDDRC_SLANT_1_1 +265 0x2000 //RX_FDDRC_SLANT_1_2 +266 0x2000 //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +286 0x0100 //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 +#VOL 3 +163 0x3000 //RX_TDDRC_ALPHA_UP_1 +164 0x3000 //RX_TDDRC_ALPHA_UP_2 +165 0x3000 //RX_TDDRC_ALPHA_UP_3 +166 0x3000 //RX_TDDRC_ALPHA_UP_4 +184 0x7FB0 //RX_TDDRC_ALPHA_DWN_1 +185 0x7FB0 //RX_TDDRC_ALPHA_DWN_2 +186 0x7FB0 //RX_TDDRC_ALPHA_DWN_3 +189 0x7FB0 //RX_TDDRC_ALPHA_DWN_4 +190 0xDA9E //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +269 0x0000 //RX_TDDRC_THRD_0 +270 0x0000 //RX_TDDRC_THRD_1 +271 0x0E80 //RX_TDDRC_THRD_2 +272 0x3800 //RX_TDDRC_THRD_3 +273 0x2A00 //RX_TDDRC_SLANT_0 +274 0x6E00 //RX_TDDRC_SLANT_1 +275 0x3000 //RX_TDDRC_ALPHA_UP_0 +276 0x7FB0 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x0000 //RX_TDDRC_HMNC_GAIN +279 0x0000 //RX_TDDRC_SMT_FLAG +280 0x0000 //RX_TDDRC_SMT_W +281 0x0100 //RX_TDDRC_DRC_GAIN +195 0x0020 //RX_FDEQ_SUBNUM +196 0x4848 //RX_FDEQ_GAIN_0 +197 0x4848 //RX_FDEQ_GAIN_1 +198 0x4848 //RX_FDEQ_GAIN_2 +199 0x4848 //RX_FDEQ_GAIN_3 +200 0x4848 //RX_FDEQ_GAIN_4 +201 0x4848 //RX_FDEQ_GAIN_5 +202 0x4848 //RX_FDEQ_GAIN_6 +203 0x4848 //RX_FDEQ_GAIN_7 +204 0x4848 //RX_FDEQ_GAIN_8 +205 0x4848 //RX_FDEQ_GAIN_9 +206 0x4848 //RX_FDEQ_GAIN_10 +207 0x4848 //RX_FDEQ_GAIN_11 +208 0x4848 //RX_FDEQ_GAIN_12 +209 0x4848 //RX_FDEQ_GAIN_13 +210 0x4848 //RX_FDEQ_GAIN_14 +211 0x4848 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0000 //RX_FDEQ_BIN_0 +221 0x0000 //RX_FDEQ_BIN_1 +222 0x0000 //RX_FDEQ_BIN_2 +223 0x0000 //RX_FDEQ_BIN_3 +224 0x0000 //RX_FDEQ_BIN_4 +225 0x0000 //RX_FDEQ_BIN_5 +226 0x0000 //RX_FDEQ_BIN_6 +227 0x0000 //RX_FDEQ_BIN_7 +228 0x0000 //RX_FDEQ_BIN_8 +229 0x0000 //RX_FDEQ_BIN_9 +230 0x0000 //RX_FDEQ_BIN_10 +231 0x0000 //RX_FDEQ_BIN_11 +232 0x0000 //RX_FDEQ_BIN_12 +233 0x0000 //RX_FDEQ_BIN_13 +234 0x0000 //RX_FDEQ_BIN_14 +235 0x0000 //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x0000 //RX_FDEQ_RESRV_0 +245 0x0000 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0030 //RX_FDDRC_BAND_MARGIN_1 +248 0x0050 //RX_FDDRC_BAND_MARGIN_2 +249 0x0080 //RX_FDDRC_BAND_MARGIN_3 +250 0x0004 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x5000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x6400 //RX_FDDRC_THRD_3_2 +258 0x6400 //RX_FDDRC_THRD_3_3 +259 0x2000 //RX_FDDRC_SLANT_0_0 +260 0x2000 //RX_FDDRC_SLANT_0_1 +261 0x2000 //RX_FDDRC_SLANT_0_2 +262 0x2000 //RX_FDDRC_SLANT_0_3 +263 0x2000 //RX_FDDRC_SLANT_1_0 +264 0x2000 //RX_FDDRC_SLANT_1_1 +265 0x2000 //RX_FDDRC_SLANT_1_2 +266 0x2000 //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +286 0x0100 //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 +#VOL 4 +163 0x3000 //RX_TDDRC_ALPHA_UP_1 +164 0x3000 //RX_TDDRC_ALPHA_UP_2 +165 0x3000 //RX_TDDRC_ALPHA_UP_3 +166 0x3000 //RX_TDDRC_ALPHA_UP_4 +184 0x7FB0 //RX_TDDRC_ALPHA_DWN_1 +185 0x7FB0 //RX_TDDRC_ALPHA_DWN_2 +186 0x7FB0 //RX_TDDRC_ALPHA_DWN_3 +189 0x7FB0 //RX_TDDRC_ALPHA_DWN_4 +190 0xDA9E //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +269 0x0000 //RX_TDDRC_THRD_0 +270 0x0000 //RX_TDDRC_THRD_1 +271 0x0E80 //RX_TDDRC_THRD_2 +272 0x3800 //RX_TDDRC_THRD_3 +273 0x2A00 //RX_TDDRC_SLANT_0 +274 0x6E00 //RX_TDDRC_SLANT_1 +275 0x3000 //RX_TDDRC_ALPHA_UP_0 +276 0x7FB0 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x0000 //RX_TDDRC_HMNC_GAIN +279 0x0000 //RX_TDDRC_SMT_FLAG +280 0x0000 //RX_TDDRC_SMT_W +281 0x0100 //RX_TDDRC_DRC_GAIN +195 0x0020 //RX_FDEQ_SUBNUM +196 0x4848 //RX_FDEQ_GAIN_0 +197 0x4848 //RX_FDEQ_GAIN_1 +198 0x4848 //RX_FDEQ_GAIN_2 +199 0x4848 //RX_FDEQ_GAIN_3 +200 0x4848 //RX_FDEQ_GAIN_4 +201 0x4848 //RX_FDEQ_GAIN_5 +202 0x4848 //RX_FDEQ_GAIN_6 +203 0x4848 //RX_FDEQ_GAIN_7 +204 0x4848 //RX_FDEQ_GAIN_8 +205 0x4848 //RX_FDEQ_GAIN_9 +206 0x4848 //RX_FDEQ_GAIN_10 +207 0x4848 //RX_FDEQ_GAIN_11 +208 0x4848 //RX_FDEQ_GAIN_12 +209 0x4848 //RX_FDEQ_GAIN_13 +210 0x4848 //RX_FDEQ_GAIN_14 +211 0x4848 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0000 //RX_FDEQ_BIN_0 +221 0x0000 //RX_FDEQ_BIN_1 +222 0x0000 //RX_FDEQ_BIN_2 +223 0x0000 //RX_FDEQ_BIN_3 +224 0x0000 //RX_FDEQ_BIN_4 +225 0x0000 //RX_FDEQ_BIN_5 +226 0x0000 //RX_FDEQ_BIN_6 +227 0x0000 //RX_FDEQ_BIN_7 +228 0x0000 //RX_FDEQ_BIN_8 +229 0x0000 //RX_FDEQ_BIN_9 +230 0x0000 //RX_FDEQ_BIN_10 +231 0x0000 //RX_FDEQ_BIN_11 +232 0x0000 //RX_FDEQ_BIN_12 +233 0x0000 //RX_FDEQ_BIN_13 +234 0x0000 //RX_FDEQ_BIN_14 +235 0x0000 //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x0000 //RX_FDEQ_RESRV_0 +245 0x0000 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0030 //RX_FDDRC_BAND_MARGIN_1 +248 0x0050 //RX_FDDRC_BAND_MARGIN_2 +249 0x0080 //RX_FDDRC_BAND_MARGIN_3 +250 0x0004 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x5000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x6400 //RX_FDDRC_THRD_3_2 +258 0x6400 //RX_FDDRC_THRD_3_3 +259 0x2000 //RX_FDDRC_SLANT_0_0 +260 0x2000 //RX_FDDRC_SLANT_0_1 +261 0x2000 //RX_FDDRC_SLANT_0_2 +262 0x2000 //RX_FDDRC_SLANT_0_3 +263 0x2000 //RX_FDDRC_SLANT_1_0 +264 0x2000 //RX_FDDRC_SLANT_1_1 +265 0x2000 //RX_FDDRC_SLANT_1_2 +266 0x2000 //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +286 0x0100 //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 +#VOL 5 +163 0x3000 //RX_TDDRC_ALPHA_UP_1 +164 0x3000 //RX_TDDRC_ALPHA_UP_2 +165 0x3000 //RX_TDDRC_ALPHA_UP_3 +166 0x3000 //RX_TDDRC_ALPHA_UP_4 +184 0x7FB0 //RX_TDDRC_ALPHA_DWN_1 +185 0x7FB0 //RX_TDDRC_ALPHA_DWN_2 +186 0x7FB0 //RX_TDDRC_ALPHA_DWN_3 +189 0x7FB0 //RX_TDDRC_ALPHA_DWN_4 +190 0xDA9E //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +269 0x0000 //RX_TDDRC_THRD_0 +270 0x0000 //RX_TDDRC_THRD_1 +271 0x0E80 //RX_TDDRC_THRD_2 +272 0x3800 //RX_TDDRC_THRD_3 +273 0x2A00 //RX_TDDRC_SLANT_0 +274 0x6E00 //RX_TDDRC_SLANT_1 +275 0x3000 //RX_TDDRC_ALPHA_UP_0 +276 0x7FB0 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x0000 //RX_TDDRC_HMNC_GAIN +279 0x0000 //RX_TDDRC_SMT_FLAG +280 0x0000 //RX_TDDRC_SMT_W +281 0x0100 //RX_TDDRC_DRC_GAIN +195 0x0020 //RX_FDEQ_SUBNUM +196 0x4848 //RX_FDEQ_GAIN_0 +197 0x4848 //RX_FDEQ_GAIN_1 +198 0x4848 //RX_FDEQ_GAIN_2 +199 0x4848 //RX_FDEQ_GAIN_3 +200 0x4848 //RX_FDEQ_GAIN_4 +201 0x4848 //RX_FDEQ_GAIN_5 +202 0x4848 //RX_FDEQ_GAIN_6 +203 0x4848 //RX_FDEQ_GAIN_7 +204 0x4848 //RX_FDEQ_GAIN_8 +205 0x4848 //RX_FDEQ_GAIN_9 +206 0x4848 //RX_FDEQ_GAIN_10 +207 0x4848 //RX_FDEQ_GAIN_11 +208 0x4848 //RX_FDEQ_GAIN_12 +209 0x4848 //RX_FDEQ_GAIN_13 +210 0x4848 //RX_FDEQ_GAIN_14 +211 0x4848 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0000 //RX_FDEQ_BIN_0 +221 0x0000 //RX_FDEQ_BIN_1 +222 0x0000 //RX_FDEQ_BIN_2 +223 0x0000 //RX_FDEQ_BIN_3 +224 0x0000 //RX_FDEQ_BIN_4 +225 0x0000 //RX_FDEQ_BIN_5 +226 0x0000 //RX_FDEQ_BIN_6 +227 0x0000 //RX_FDEQ_BIN_7 +228 0x0000 //RX_FDEQ_BIN_8 +229 0x0000 //RX_FDEQ_BIN_9 +230 0x0000 //RX_FDEQ_BIN_10 +231 0x0000 //RX_FDEQ_BIN_11 +232 0x0000 //RX_FDEQ_BIN_12 +233 0x0000 //RX_FDEQ_BIN_13 +234 0x0000 //RX_FDEQ_BIN_14 +235 0x0000 //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x0000 //RX_FDEQ_RESRV_0 +245 0x0000 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0030 //RX_FDDRC_BAND_MARGIN_1 +248 0x0050 //RX_FDDRC_BAND_MARGIN_2 +249 0x0080 //RX_FDDRC_BAND_MARGIN_3 +250 0x0004 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x5000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x6400 //RX_FDDRC_THRD_3_2 +258 0x6400 //RX_FDDRC_THRD_3_3 +259 0x2000 //RX_FDDRC_SLANT_0_0 +260 0x2000 //RX_FDDRC_SLANT_0_1 +261 0x2000 //RX_FDDRC_SLANT_0_2 +262 0x2000 //RX_FDDRC_SLANT_0_3 +263 0x2000 //RX_FDDRC_SLANT_1_0 +264 0x2000 //RX_FDDRC_SLANT_1_1 +265 0x2000 //RX_FDDRC_SLANT_1_2 +266 0x2000 //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +286 0x0100 //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 +#VOL 6 +163 0x3000 //RX_TDDRC_ALPHA_UP_1 +164 0x3000 //RX_TDDRC_ALPHA_UP_2 +165 0x3000 //RX_TDDRC_ALPHA_UP_3 +166 0x3000 //RX_TDDRC_ALPHA_UP_4 +184 0x7FB0 //RX_TDDRC_ALPHA_DWN_1 +185 0x7FB0 //RX_TDDRC_ALPHA_DWN_2 +186 0x7FB0 //RX_TDDRC_ALPHA_DWN_3 +189 0x7FB0 //RX_TDDRC_ALPHA_DWN_4 +190 0xDA9E //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +269 0x0000 //RX_TDDRC_THRD_0 +270 0x0000 //RX_TDDRC_THRD_1 +271 0x0E80 //RX_TDDRC_THRD_2 +272 0x3800 //RX_TDDRC_THRD_3 +273 0x2A00 //RX_TDDRC_SLANT_0 +274 0x6E00 //RX_TDDRC_SLANT_1 +275 0x3000 //RX_TDDRC_ALPHA_UP_0 +276 0x7FB0 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x0000 //RX_TDDRC_HMNC_GAIN +279 0x0000 //RX_TDDRC_SMT_FLAG +280 0x0000 //RX_TDDRC_SMT_W +281 0x0100 //RX_TDDRC_DRC_GAIN +195 0x0020 //RX_FDEQ_SUBNUM +196 0x4848 //RX_FDEQ_GAIN_0 +197 0x4848 //RX_FDEQ_GAIN_1 +198 0x4848 //RX_FDEQ_GAIN_2 +199 0x4848 //RX_FDEQ_GAIN_3 +200 0x4848 //RX_FDEQ_GAIN_4 +201 0x4848 //RX_FDEQ_GAIN_5 +202 0x4848 //RX_FDEQ_GAIN_6 +203 0x4848 //RX_FDEQ_GAIN_7 +204 0x4848 //RX_FDEQ_GAIN_8 +205 0x4848 //RX_FDEQ_GAIN_9 +206 0x4848 //RX_FDEQ_GAIN_10 +207 0x4848 //RX_FDEQ_GAIN_11 +208 0x4848 //RX_FDEQ_GAIN_12 +209 0x4848 //RX_FDEQ_GAIN_13 +210 0x4848 //RX_FDEQ_GAIN_14 +211 0x4848 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0000 //RX_FDEQ_BIN_0 +221 0x0000 //RX_FDEQ_BIN_1 +222 0x0000 //RX_FDEQ_BIN_2 +223 0x0000 //RX_FDEQ_BIN_3 +224 0x0000 //RX_FDEQ_BIN_4 +225 0x0000 //RX_FDEQ_BIN_5 +226 0x0000 //RX_FDEQ_BIN_6 +227 0x0000 //RX_FDEQ_BIN_7 +228 0x0000 //RX_FDEQ_BIN_8 +229 0x0000 //RX_FDEQ_BIN_9 +230 0x0000 //RX_FDEQ_BIN_10 +231 0x0000 //RX_FDEQ_BIN_11 +232 0x0000 //RX_FDEQ_BIN_12 +233 0x0000 //RX_FDEQ_BIN_13 +234 0x0000 //RX_FDEQ_BIN_14 +235 0x0000 //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x0000 //RX_FDEQ_RESRV_0 +245 0x0000 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0030 //RX_FDDRC_BAND_MARGIN_1 +248 0x0050 //RX_FDDRC_BAND_MARGIN_2 +249 0x0080 //RX_FDDRC_BAND_MARGIN_3 +250 0x0004 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x5000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x6400 //RX_FDDRC_THRD_3_2 +258 0x6400 //RX_FDDRC_THRD_3_3 +259 0x2000 //RX_FDDRC_SLANT_0_0 +260 0x2000 //RX_FDDRC_SLANT_0_1 +261 0x2000 //RX_FDDRC_SLANT_0_2 +262 0x2000 //RX_FDDRC_SLANT_0_3 +263 0x2000 //RX_FDDRC_SLANT_1_0 +264 0x2000 //RX_FDDRC_SLANT_1_1 +265 0x2000 //RX_FDDRC_SLANT_1_2 +266 0x2000 //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +286 0x0100 //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 #CASE_NAME HEADSET-TTY_FULL-VOICE_GENERIC-SWB -#PARAM_MODE FULL -#PARAM_TYPE TX+RX -#TOTAL_CUSTOM_STEP 7 +#PARAM_MODE Full +#PARAM_TYPE TX+2RX +#TOTAL_CUSTOM_STEP 7+7 #TX 0 0x0001 //TX_OPERATION_MODE_0 1 0x0000 //TX_OPERATION_MODE_1 @@ -52870,7 +80350,7 @@ 239 0x0000 //TX_DT_RESRV_7 240 0x0000 //TX_DT_RESRV_8 241 0x0000 //TX_DT_RESRV_9 -242 0xF200 //TX_THR_SN_EST_0 +242 0xFA00 //TX_THR_SN_EST_0 243 0xF400 //TX_THR_SN_EST_1 244 0xF800 //TX_THR_SN_EST_2 245 0xF600 //TX_THR_SN_EST_3 @@ -52879,12 +80359,12 @@ 248 0xF800 //TX_THR_SN_EST_6 249 0xF800 //TX_THR_SN_EST_7 250 0x0100 //TX_DELTA_THR_SN_EST_0 -251 0x0000 //TX_DELTA_THR_SN_EST_1 +251 0x0100 //TX_DELTA_THR_SN_EST_1 252 0x0100 //TX_DELTA_THR_SN_EST_2 -253 0x0100 //TX_DELTA_THR_SN_EST_3 +253 0x0200 //TX_DELTA_THR_SN_EST_3 254 0x0200 //TX_DELTA_THR_SN_EST_4 255 0x0200 //TX_DELTA_THR_SN_EST_5 -256 0x0200 //TX_DELTA_THR_SN_EST_6 +256 0x0000 //TX_DELTA_THR_SN_EST_6 257 0x0200 //TX_DELTA_THR_SN_EST_7 258 0x4000 //TX_LAMBDA_NN_EST_0 259 0x4000 //TX_LAMBDA_NN_EST_1 @@ -52910,12 +80390,12 @@ 279 0x0000 //TX_B_POST_FLT_0 280 0x0000 //TX_B_POST_FLT_1 281 0x001A //TX_NS_LVL_CTRL_0 -282 0x001A //TX_NS_LVL_CTRL_1 +282 0x0014 //TX_NS_LVL_CTRL_1 283 0x0014 //TX_NS_LVL_CTRL_2 -284 0x0014 //TX_NS_LVL_CTRL_3 +284 0x000C //TX_NS_LVL_CTRL_3 285 0x000C //TX_NS_LVL_CTRL_4 286 0x000C //TX_NS_LVL_CTRL_5 -287 0x000C //TX_NS_LVL_CTRL_6 +287 0x001A //TX_NS_LVL_CTRL_6 288 0x000C //TX_NS_LVL_CTRL_7 289 0x000E //TX_MIN_GAIN_S_0 290 0x0014 //TX_MIN_GAIN_S_1 @@ -52931,10 +80411,10 @@ 300 0x7FFF //TX_SNRI_SUP_0 301 0x7FFF //TX_SNRI_SUP_1 302 0x7FFF //TX_SNRI_SUP_2 -303 0x7FFF //TX_SNRI_SUP_3 +303 0x4000 //TX_SNRI_SUP_3 304 0x4000 //TX_SNRI_SUP_4 305 0x4000 //TX_SNRI_SUP_5 -306 0x4000 //TX_SNRI_SUP_6 +306 0x7FFF //TX_SNRI_SUP_6 307 0x4000 //TX_SNRI_SUP_7 308 0x1200 //TX_THR_LFNS 309 0x0147 //TX_G_LFNS @@ -52943,12 +80423,12 @@ 312 0x7FFF //TX_A_POST_FILT_0 313 0x7FFF //TX_A_POST_FILT_1 314 0x4000 //TX_A_POST_FILT_S_0 -315 0x199A //TX_A_POST_FILT_S_1 +315 0x1000 //TX_A_POST_FILT_S_1 316 0x1000 //TX_A_POST_FILT_S_2 -317 0x1000 //TX_A_POST_FILT_S_3 +317 0x6666 //TX_A_POST_FILT_S_3 318 0x6666 //TX_A_POST_FILT_S_4 319 0x6666 //TX_A_POST_FILT_S_5 -320 0x6666 //TX_A_POST_FILT_S_6 +320 0x199A //TX_A_POST_FILT_S_6 321 0x6666 //TX_A_POST_FILT_S_7 322 0x2000 //TX_B_POST_FILT_0 323 0x2000 //TX_B_POST_FILT_1 @@ -52995,7 +80475,7 @@ 364 0x0000 //TX_K_APT 365 0x0001 //TX_NOISEDET 366 0x05A0 //TX_NDETCT -367 0x000A //TX_NOISE_TH_0 +367 0x0383 //TX_NOISE_TH_0 368 0x1388 //TX_NOISE_TH_0_2 369 0x3A98 //TX_NOISE_TH_0_3 370 0x0C80 //TX_NOISE_TH_1 @@ -53007,11 +80487,11 @@ 376 0x7FFF //TX_NOISE_TH_5_3 377 0x7FFF //TX_NOISE_TH_5_4 378 0x00C8 //TX_NOISE_TH_6 -379 0x000A //TX_MINENOISE_TH -380 0x0000 //TX_MINENOISE_MIC0_TH_MTS -381 0x0000 //TX_MINENOISE_MIC0_TH_EXP -382 0x0000 //TX_MINENOISE_MIC0_S_TH_MTS -383 0x0000 //TX_MINENOISE_MIC0_S_TH_EXP +379 0x044C //TX_MINENOISE_TH +380 0xD508 //TX_MORENS_TFMASK_TH +381 0x0001 //TX_DRC_QUIET_FLOOR +382 0x3A98 //TX_RATIODTL_CUT_TH +383 0x0DAC //TX_DT_CUT_K1 384 0x6400 //TX_OUT_ENER_S_TH_CLEAN 385 0x6400 //TX_OUT_ENER_S_TH_LESSCLEAN 386 0x6400 //TX_OUT_ENER_S_TH_NOISY @@ -53019,22 +80499,22 @@ 388 0x7D00 //TX_OUT_ENER_TH_SPEECH 389 0x0000 //TX_SN_NPB_GAIN 390 0x0000 //TX_NN_NPB_GAIN -391 0x0000 //TX_CSX_ALPHA_0 -392 0x0000 //TX_CSX_ALPHA_1 -393 0x0000 //TX_CSX_ALPHA_2 -394 0x0000 //TX_CSX_ALPHA_3 -395 0x0000 //TX_MU_ARSP_EST -396 0x0000 //TX_P_OUTBEAM_MIN_TH +391 0x7FFF //TX_POST_MASK_SUP_HSNE +392 0x1388 //TX_TAIL_DET_TH +393 0x4000 //TX_B_LESSCUT_RTO_WTA +394 0x0000 //TX_MEL_G_R +395 0x0080 //TX_SUPHIGH_TH +396 0x0000 //TX_MASK_G_R 397 0x0000 //TX_EXTRA_NS_L -398 0x0000 //TX_EXTRA_NS_A -399 0x0000 //TX_VR_NOISE_FLOOR_TH +398 0x1800 //TX_C_POST_FLT_MASK +399 0x7FFF //TX_A_POST_FLT_WNS 400 0x0000 //TX_MIN_G_LOW300HZ 401 0x0010 //TX_MAXLEVEL_CNG 402 0x0000 //TX_STN_NOISE_TH 403 0x0000 //TX_POST_MASK_SUP 404 0x0000 //TX_POST_MASK_ADJUST 405 0x0014 //TX_NS_ENOISE_MIC0_TH -406 0x0014 //TX_MINENOISE_MIC0_TH +406 0x02F3 //TX_MINENOISE_MIC0_TH 407 0x0226 //TX_MINENOISE_MIC0_S_TH 408 0x2879 //TX_MIN_G_CTRL_SSNS 409 0x0400 //TX_METAL_RTO_THR @@ -53142,16 +80622,16 @@ 511 0x6666 //TX_MIC_TO_BFGAIN 512 0x6666 //TX_MICTOBFGAIN0 513 0x0014 //TX_FASTMUE_TH -514 0x0000 //TX_DERVB_LEN_0 -515 0x0000 //TX_DERVB_LEN_1 -516 0x0000 //TX_RHO_DERVB -517 0x0000 //TX_MIC_INDX_DERVB -518 0x0000 //TX_MU_DERVB -519 0x0000 //TX_DR_RESRV_0 -520 0x0000 //TX_DR_RESRV_1 -521 0x0000 //TX_DR_RESRV_2 -522 0x0000 //TX_DR_RESRV_3 -523 0x0000 //TX_DR_RESRV_4 +514 0xC000 //TX_DEREVERB_LF_MU +515 0xC000 //TX_DEREVERB_HF_MU +516 0xCCCC //TX_DEREVERB_DELAY +517 0xD999 //TX_DEREVERB_COEF_LEN +518 0x1F40 //TX_DEREVERB_DNR +519 0x0000 //TX_DEREVERB_ALPHA +520 0x0000 //TX_DEREVERB_BETA +521 0x0000 //TX_GSC_RTOL_TH +522 0x7000 //TX_GSC_RTOH_TH +523 0x0064 //TX_WIDE2_MEANHTH 524 0x0000 //TX_DR_RESRV_5 525 0x0000 //TX_DR_RESRV_6 526 0x0000 //TX_DR_RESRV_7 @@ -53517,16 +80997,81 @@ 886 0x0000 //TX_FASTNS_TFMASKBIN_TH2 887 0x0000 //TX_FASTNS_TFMASKBIN_TH3 888 0x00C8 //TX_FASTNS_ARSPC_TH -889 0xD99A //TX_FASTNS_MASK5_TH +889 0x8000 //TX_FASTNS_MASK5_TH 890 0x051F //TX_POSTSSA_MIN_G_VR_MASK -891 0x7FFF //TX_A_LESSCUT_RTO_MASK +891 0x4000 //TX_A_LESSCUT_RTO_MASK 892 0x1770 //TX_FASTNS_NOISETH 893 0xC000 //TX_FASTNS_SSA_THLFL 894 0xC000 //TX_FASTNS_SSA_THHFL 895 0xCCCC //TX_FASTNS_SSA_THLFH 896 0xD999 //TX_FASTNS_SSA_THHFH +897 0x2339 //TX_SENDFUNC_REG_MICMUTE +898 0x0021 //TX_SENDFUNC_REG_MICMUTE1 +899 0x02BC //TX_MICMUTE_RATIO_THR +900 0x0140 //TX_MICMUTE_AMP_THR +901 0x0004 //TX_MICMUTE_HPF_IND +902 0x00C0 //TX_MICMUTE_LOG_EYR_TH +903 0x0008 //TX_MICMUTE_CVG_TIME +904 0x0008 //TX_MICMUTE_RELEASE_TIME +905 0x01FE //TX_MIC_VOLUME_MIC0MUTE +906 0x0020 //TX_MICMUTE_EPD_OFFSET_0 +907 0x001E //TX_MICMUTE_FRQ_AEC_L +908 0x7999 //TX_MICMUTE_EAD_THR +909 0x7FFF //TX_MICMUTE_LAMBDA_CB_NLE +910 0x7FFF //TX_MICMUTE_LAMBDA_RE_EST +911 0x4000 //TX_DTD_THR1_MICMUTE_0 +912 0x7000 //TX_DTD_THR1_MICMUTE_1 +913 0x7FFF //TX_DTD_THR1_MICMUTE_2 +914 0x7FFF //TX_DTD_THR1_MICMUTE_3 +915 0x6CCC //TX_DTD_THR2_MICMUTE_0 +916 0x0400 //TX_MICMUTE_MIN_EQ_RE_EST_0 +917 0x0400 //TX_MICMUTE_MIN_EQ_RE_EST_1 +918 0x1000 //TX_MICMUTE_MIN_EQ_RE_EST_2 +919 0x7FFF //TX_MICMUTE_MIN_EQ_RE_EST_3 +920 0x7FFF //TX_MICMUTE_MIN_EQ_RE_EST_4 +921 0x4000 //TX_MICMUTE_C_POST_FLT +922 0x03E8 //TX_MICMUTE_DT_CUT_K +923 0x0001 //TX_MICMUTE_DT_CUT_THR +924 0x03E8 //TX_MICMUTE_DT_CUT_K2 +925 0x0001 //TX_MICMUTE_DT_CUT_THR2 +926 0x0064 //TX_MICMUTE_DT2_HOLD_N +927 0x1000 //TX_MICMUTE_RATIODTH_THCUT +928 0x1000 //TX_MICMUTE_B_POST_FLT_ECHOL +929 0x7FFF //TX_MICMUTE_B_POST_FLT_ECHOH +930 0x0400 //TX_MICMUTE_C_POST_FLT_MASK +931 0x7999 //TX_MICMUTE_RATIODTL_CUT_TH +932 0x0258 //TX_MICMUTE_DT_CUT_K1 +933 0x0800 //TX_MICMUTE_N2_SN_EST +934 0xFC00 //TX_MICMUTE_THR_SN_EST_0 +935 0x001C //TX_MICMUTE_MIN_G_CTRL_0 +936 0x6000 //TX_MICMUTE_A_POST_FILT_S_0 +937 0x7000 //TX_MICMUTE_B_POST_FILT_0 +938 0x2710 //TX_MIC1RUB_AMP_THR +939 0x0010 //TX_MIC1MUTE_RATIO_THR +940 0x0450 //TX_MIC1MUTE_AMP_THR +941 0x0008 //TX_MIC1MUTE_CVG_TIME +942 0x0008 //TX_MIC1MUTE_RELEASE_TIME +943 0x0000 //TX_AMS_RESRV_01 +944 0x0000 //TX_AMS_RESRV_02 +945 0x0000 //TX_AMS_RESRV_03 +946 0x0000 //TX_AMS_RESRV_04 +947 0x0000 //TX_AMS_RESRV_05 +948 0x0000 //TX_AMS_RESRV_06 +949 0x0000 //TX_AMS_RESRV_07 +950 0x0000 //TX_AMS_RESRV_08 +951 0x0000 //TX_AMS_RESRV_09 +952 0x0000 //TX_AMS_RESRV_10 +953 0x0000 //TX_AMS_RESRV_11 +954 0x0000 //TX_AMS_RESRV_12 +955 0x0000 //TX_AMS_RESRV_13 +956 0x0000 //TX_AMS_RESRV_14 +957 0x0000 //TX_AMS_RESRV_15 +958 0x0000 //TX_AMS_RESRV_16 +959 0x0000 //TX_AMS_RESRV_17 +960 0x0000 //TX_AMS_RESRV_18 +961 0x0000 //TX_AMS_RESRV_19 #RX -0 0x0040 //RX_RECVFUNC_MODE_0 +0 0x2040 //RX_RECVFUNC_MODE_0 1 0x0000 //RX_RECVFUNC_MODE_1 2 0x0000 //RX_SAMPLINGFREQ_SIG 3 0x0000 //RX_SAMPLINGFREQ_PROC @@ -54376,11 +81921,862 @@ 110 0x0000 //RX_FDDRC_RESRV_0 129 0x0100 //RX_SPK_VOL 130 0x0000 //RX_VOL_RESRV_0 +#RX 2 +157 0x2040 //RX_RECVFUNC_MODE_0 +158 0x0000 //RX_RECVFUNC_MODE_1 +159 0x0000 //RX_SAMPLINGFREQ_SIG +160 0x0000 //RX_SAMPLINGFREQ_PROC +161 0x000A //RX_FRAME_SZ +162 0x0000 //RX_DELAY_OPT +163 0x3000 //RX_TDDRC_ALPHA_UP_1 +164 0x3000 //RX_TDDRC_ALPHA_UP_2 +165 0x3000 //RX_TDDRC_ALPHA_UP_3 +166 0x3000 //RX_TDDRC_ALPHA_UP_4 +167 0x050D //RX_PGA +168 0x7652 //RX_A_HP +169 0x4000 //RX_B_PE +170 0x7800 //RX_THR_PITCH_DET_0 +171 0x7000 //RX_THR_PITCH_DET_1 +172 0x6000 //RX_THR_PITCH_DET_2 +173 0x0000 //RX_PITCH_BFR_LEN +174 0x0000 //RX_SBD_PITCH_DET +175 0x0000 //RX_PP_RESRV_0 +176 0x0000 //RX_PP_RESRV_1 +177 0xF800 //RX_N_SN_EST +178 0x0000 //RX_N2_SN_EST +179 0x000F //RX_NS_LVL_CTRL +180 0xF800 //RX_THR_SN_EST +181 0x7E00 //RX_LAMBDA_PFILT +182 0x000A //RX_FENS_RESRV_0 +183 0x0000 //RX_FENS_RESRV_1 +184 0x7FB0 //RX_TDDRC_ALPHA_DWN_1 +185 0x7FB0 //RX_TDDRC_ALPHA_DWN_2 +186 0x7FB0 //RX_TDDRC_ALPHA_DWN_3 +187 0x0000 //RX_EXTRA_NS_L +188 0x0000 //RX_EXTRA_NS_A +189 0x7FB0 //RX_TDDRC_ALPHA_DWN_4 +190 0xDA9E //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +192 0x0000 //RX_A_POST_FLT +193 0x0000 //RX_LMT_THRD +194 0x4000 //RX_LMT_ALPHA +195 0x0020 //RX_FDEQ_SUBNUM +196 0x4848 //RX_FDEQ_GAIN_0 +197 0x4848 //RX_FDEQ_GAIN_1 +198 0x4848 //RX_FDEQ_GAIN_2 +199 0x4848 //RX_FDEQ_GAIN_3 +200 0x4848 //RX_FDEQ_GAIN_4 +201 0x4848 //RX_FDEQ_GAIN_5 +202 0x4848 //RX_FDEQ_GAIN_6 +203 0x4848 //RX_FDEQ_GAIN_7 +204 0x4848 //RX_FDEQ_GAIN_8 +205 0x4848 //RX_FDEQ_GAIN_9 +206 0x4848 //RX_FDEQ_GAIN_10 +207 0x4848 //RX_FDEQ_GAIN_11 +208 0x4848 //RX_FDEQ_GAIN_12 +209 0x4848 //RX_FDEQ_GAIN_13 +210 0x4848 //RX_FDEQ_GAIN_14 +211 0x4848 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0000 //RX_FDEQ_BIN_0 +221 0x0000 //RX_FDEQ_BIN_1 +222 0x0000 //RX_FDEQ_BIN_2 +223 0x0000 //RX_FDEQ_BIN_3 +224 0x0000 //RX_FDEQ_BIN_4 +225 0x0000 //RX_FDEQ_BIN_5 +226 0x0000 //RX_FDEQ_BIN_6 +227 0x0000 //RX_FDEQ_BIN_7 +228 0x0000 //RX_FDEQ_BIN_8 +229 0x0000 //RX_FDEQ_BIN_9 +230 0x0000 //RX_FDEQ_BIN_10 +231 0x0000 //RX_FDEQ_BIN_11 +232 0x0000 //RX_FDEQ_BIN_12 +233 0x0000 //RX_FDEQ_BIN_13 +234 0x0000 //RX_FDEQ_BIN_14 +235 0x0000 //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x0000 //RX_FDEQ_RESRV_0 +245 0x0000 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0030 //RX_FDDRC_BAND_MARGIN_1 +248 0x0050 //RX_FDDRC_BAND_MARGIN_2 +249 0x0080 //RX_FDDRC_BAND_MARGIN_3 +250 0x0004 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x5000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x6400 //RX_FDDRC_THRD_3_2 +258 0x6400 //RX_FDDRC_THRD_3_3 +259 0x2000 //RX_FDDRC_SLANT_0_0 +260 0x2000 //RX_FDDRC_SLANT_0_1 +261 0x2000 //RX_FDDRC_SLANT_0_2 +262 0x2000 //RX_FDDRC_SLANT_0_3 +263 0x2000 //RX_FDDRC_SLANT_1_0 +264 0x2000 //RX_FDDRC_SLANT_1_1 +265 0x2000 //RX_FDDRC_SLANT_1_2 +266 0x2000 //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +268 0x0003 //RX_FILTINDX +269 0x0000 //RX_TDDRC_THRD_0 +270 0x0000 //RX_TDDRC_THRD_1 +271 0x0E80 //RX_TDDRC_THRD_2 +272 0x3800 //RX_TDDRC_THRD_3 +273 0x2A00 //RX_TDDRC_SLANT_0 +274 0x6E00 //RX_TDDRC_SLANT_1 +275 0x3000 //RX_TDDRC_ALPHA_UP_0 +276 0x7FB0 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x0000 //RX_TDDRC_HMNC_GAIN +279 0x0000 //RX_TDDRC_SMT_FLAG +280 0x0000 //RX_TDDRC_SMT_W +281 0x0100 //RX_TDDRC_DRC_GAIN +282 0x7C00 //RX_LAMBDA_PKA_FP +283 0x2000 //RX_TPKA_FP +284 0x0080 //RX_MIN_G_FP +285 0x2000 //RX_MAX_G_FP +286 0x0100 //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 +288 0x0010 //RX_MAXLEVEL_CNG +289 0x0000 //RX_BWE_UV_TH +290 0x0000 //RX_BWE_UV_TH2 +291 0x0000 //RX_BWE_UV_TH3 +292 0x0000 //RX_BWE_V_TH +293 0x0000 //RX_BWE_GAIN1_V_TH1 +294 0x0000 //RX_BWE_GAIN1_V_TH2 +295 0x0000 //RX_BWE_UV_EQ +296 0x0000 //RX_BWE_V_EQ +297 0x0000 //RX_BWE_TONE_TH +298 0x0000 //RX_BWE_UV_HOLD_T +299 0x0000 //RX_BWE_GAIN2_ALPHA +300 0x0000 //RX_BWE_GAIN3_ALPHA +301 0x0000 //RX_BWE_CUTOFF +302 0x0000 //RX_BWE_GAINFILL +303 0x0000 //RX_BWE_MAXTH_TONE +304 0x0000 //RX_BWE_EQ_0 +305 0x0000 //RX_BWE_EQ_1 +306 0x0000 //RX_BWE_EQ_2 +307 0x0000 //RX_BWE_EQ_3 +308 0x0000 //RX_BWE_EQ_4 +309 0x0000 //RX_BWE_EQ_5 +310 0x0000 //RX_BWE_EQ_6 +311 0x0000 //RX_BWE_RESRV_0 +312 0x0000 //RX_BWE_RESRV_1 +313 0x0000 //RX_BWE_RESRV_2 +#VOL 0 +163 0x3000 //RX_TDDRC_ALPHA_UP_1 +164 0x3000 //RX_TDDRC_ALPHA_UP_2 +165 0x3000 //RX_TDDRC_ALPHA_UP_3 +166 0x3000 //RX_TDDRC_ALPHA_UP_4 +184 0x7FB0 //RX_TDDRC_ALPHA_DWN_1 +185 0x7FB0 //RX_TDDRC_ALPHA_DWN_2 +186 0x7FB0 //RX_TDDRC_ALPHA_DWN_3 +189 0x7FB0 //RX_TDDRC_ALPHA_DWN_4 +190 0xDA9E //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +269 0x0000 //RX_TDDRC_THRD_0 +270 0x0000 //RX_TDDRC_THRD_1 +271 0x0E80 //RX_TDDRC_THRD_2 +272 0x3800 //RX_TDDRC_THRD_3 +273 0x2A00 //RX_TDDRC_SLANT_0 +274 0x6E00 //RX_TDDRC_SLANT_1 +275 0x3000 //RX_TDDRC_ALPHA_UP_0 +276 0x7FB0 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x0000 //RX_TDDRC_HMNC_GAIN +279 0x0000 //RX_TDDRC_SMT_FLAG +280 0x0000 //RX_TDDRC_SMT_W +281 0x0100 //RX_TDDRC_DRC_GAIN +195 0x0020 //RX_FDEQ_SUBNUM +196 0x4848 //RX_FDEQ_GAIN_0 +197 0x4848 //RX_FDEQ_GAIN_1 +198 0x4848 //RX_FDEQ_GAIN_2 +199 0x4848 //RX_FDEQ_GAIN_3 +200 0x4848 //RX_FDEQ_GAIN_4 +201 0x4848 //RX_FDEQ_GAIN_5 +202 0x4848 //RX_FDEQ_GAIN_6 +203 0x4848 //RX_FDEQ_GAIN_7 +204 0x4848 //RX_FDEQ_GAIN_8 +205 0x4848 //RX_FDEQ_GAIN_9 +206 0x4848 //RX_FDEQ_GAIN_10 +207 0x4848 //RX_FDEQ_GAIN_11 +208 0x4848 //RX_FDEQ_GAIN_12 +209 0x4848 //RX_FDEQ_GAIN_13 +210 0x4848 //RX_FDEQ_GAIN_14 +211 0x4848 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0000 //RX_FDEQ_BIN_0 +221 0x0000 //RX_FDEQ_BIN_1 +222 0x0000 //RX_FDEQ_BIN_2 +223 0x0000 //RX_FDEQ_BIN_3 +224 0x0000 //RX_FDEQ_BIN_4 +225 0x0000 //RX_FDEQ_BIN_5 +226 0x0000 //RX_FDEQ_BIN_6 +227 0x0000 //RX_FDEQ_BIN_7 +228 0x0000 //RX_FDEQ_BIN_8 +229 0x0000 //RX_FDEQ_BIN_9 +230 0x0000 //RX_FDEQ_BIN_10 +231 0x0000 //RX_FDEQ_BIN_11 +232 0x0000 //RX_FDEQ_BIN_12 +233 0x0000 //RX_FDEQ_BIN_13 +234 0x0000 //RX_FDEQ_BIN_14 +235 0x0000 //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x0000 //RX_FDEQ_RESRV_0 +245 0x0000 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0030 //RX_FDDRC_BAND_MARGIN_1 +248 0x0050 //RX_FDDRC_BAND_MARGIN_2 +249 0x0080 //RX_FDDRC_BAND_MARGIN_3 +250 0x0004 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x5000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x6400 //RX_FDDRC_THRD_3_2 +258 0x6400 //RX_FDDRC_THRD_3_3 +259 0x2000 //RX_FDDRC_SLANT_0_0 +260 0x2000 //RX_FDDRC_SLANT_0_1 +261 0x2000 //RX_FDDRC_SLANT_0_2 +262 0x2000 //RX_FDDRC_SLANT_0_3 +263 0x2000 //RX_FDDRC_SLANT_1_0 +264 0x2000 //RX_FDDRC_SLANT_1_1 +265 0x2000 //RX_FDDRC_SLANT_1_2 +266 0x2000 //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +286 0x0100 //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 +#VOL 1 +163 0x3000 //RX_TDDRC_ALPHA_UP_1 +164 0x3000 //RX_TDDRC_ALPHA_UP_2 +165 0x3000 //RX_TDDRC_ALPHA_UP_3 +166 0x3000 //RX_TDDRC_ALPHA_UP_4 +184 0x7FB0 //RX_TDDRC_ALPHA_DWN_1 +185 0x7FB0 //RX_TDDRC_ALPHA_DWN_2 +186 0x7FB0 //RX_TDDRC_ALPHA_DWN_3 +189 0x7FB0 //RX_TDDRC_ALPHA_DWN_4 +190 0xDA9E //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +269 0x0000 //RX_TDDRC_THRD_0 +270 0x0000 //RX_TDDRC_THRD_1 +271 0x0E80 //RX_TDDRC_THRD_2 +272 0x3800 //RX_TDDRC_THRD_3 +273 0x2A00 //RX_TDDRC_SLANT_0 +274 0x6E00 //RX_TDDRC_SLANT_1 +275 0x3000 //RX_TDDRC_ALPHA_UP_0 +276 0x7FB0 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x0000 //RX_TDDRC_HMNC_GAIN +279 0x0000 //RX_TDDRC_SMT_FLAG +280 0x0000 //RX_TDDRC_SMT_W +281 0x0100 //RX_TDDRC_DRC_GAIN +195 0x0020 //RX_FDEQ_SUBNUM +196 0x4848 //RX_FDEQ_GAIN_0 +197 0x4848 //RX_FDEQ_GAIN_1 +198 0x4848 //RX_FDEQ_GAIN_2 +199 0x4848 //RX_FDEQ_GAIN_3 +200 0x4848 //RX_FDEQ_GAIN_4 +201 0x4848 //RX_FDEQ_GAIN_5 +202 0x4848 //RX_FDEQ_GAIN_6 +203 0x4848 //RX_FDEQ_GAIN_7 +204 0x4848 //RX_FDEQ_GAIN_8 +205 0x4848 //RX_FDEQ_GAIN_9 +206 0x4848 //RX_FDEQ_GAIN_10 +207 0x4848 //RX_FDEQ_GAIN_11 +208 0x4848 //RX_FDEQ_GAIN_12 +209 0x4848 //RX_FDEQ_GAIN_13 +210 0x4848 //RX_FDEQ_GAIN_14 +211 0x4848 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0000 //RX_FDEQ_BIN_0 +221 0x0000 //RX_FDEQ_BIN_1 +222 0x0000 //RX_FDEQ_BIN_2 +223 0x0000 //RX_FDEQ_BIN_3 +224 0x0000 //RX_FDEQ_BIN_4 +225 0x0000 //RX_FDEQ_BIN_5 +226 0x0000 //RX_FDEQ_BIN_6 +227 0x0000 //RX_FDEQ_BIN_7 +228 0x0000 //RX_FDEQ_BIN_8 +229 0x0000 //RX_FDEQ_BIN_9 +230 0x0000 //RX_FDEQ_BIN_10 +231 0x0000 //RX_FDEQ_BIN_11 +232 0x0000 //RX_FDEQ_BIN_12 +233 0x0000 //RX_FDEQ_BIN_13 +234 0x0000 //RX_FDEQ_BIN_14 +235 0x0000 //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x0000 //RX_FDEQ_RESRV_0 +245 0x0000 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0030 //RX_FDDRC_BAND_MARGIN_1 +248 0x0050 //RX_FDDRC_BAND_MARGIN_2 +249 0x0080 //RX_FDDRC_BAND_MARGIN_3 +250 0x0004 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x5000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x6400 //RX_FDDRC_THRD_3_2 +258 0x6400 //RX_FDDRC_THRD_3_3 +259 0x2000 //RX_FDDRC_SLANT_0_0 +260 0x2000 //RX_FDDRC_SLANT_0_1 +261 0x2000 //RX_FDDRC_SLANT_0_2 +262 0x2000 //RX_FDDRC_SLANT_0_3 +263 0x2000 //RX_FDDRC_SLANT_1_0 +264 0x2000 //RX_FDDRC_SLANT_1_1 +265 0x2000 //RX_FDDRC_SLANT_1_2 +266 0x2000 //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +286 0x0100 //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 +#VOL 2 +163 0x3000 //RX_TDDRC_ALPHA_UP_1 +164 0x3000 //RX_TDDRC_ALPHA_UP_2 +165 0x3000 //RX_TDDRC_ALPHA_UP_3 +166 0x3000 //RX_TDDRC_ALPHA_UP_4 +184 0x7FB0 //RX_TDDRC_ALPHA_DWN_1 +185 0x7FB0 //RX_TDDRC_ALPHA_DWN_2 +186 0x7FB0 //RX_TDDRC_ALPHA_DWN_3 +189 0x7FB0 //RX_TDDRC_ALPHA_DWN_4 +190 0xDA9E //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +269 0x0000 //RX_TDDRC_THRD_0 +270 0x0000 //RX_TDDRC_THRD_1 +271 0x0E80 //RX_TDDRC_THRD_2 +272 0x3800 //RX_TDDRC_THRD_3 +273 0x2A00 //RX_TDDRC_SLANT_0 +274 0x6E00 //RX_TDDRC_SLANT_1 +275 0x3000 //RX_TDDRC_ALPHA_UP_0 +276 0x7FB0 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x0000 //RX_TDDRC_HMNC_GAIN +279 0x0000 //RX_TDDRC_SMT_FLAG +280 0x0000 //RX_TDDRC_SMT_W +281 0x0100 //RX_TDDRC_DRC_GAIN +195 0x0020 //RX_FDEQ_SUBNUM +196 0x4848 //RX_FDEQ_GAIN_0 +197 0x4848 //RX_FDEQ_GAIN_1 +198 0x4848 //RX_FDEQ_GAIN_2 +199 0x4848 //RX_FDEQ_GAIN_3 +200 0x4848 //RX_FDEQ_GAIN_4 +201 0x4848 //RX_FDEQ_GAIN_5 +202 0x4848 //RX_FDEQ_GAIN_6 +203 0x4848 //RX_FDEQ_GAIN_7 +204 0x4848 //RX_FDEQ_GAIN_8 +205 0x4848 //RX_FDEQ_GAIN_9 +206 0x4848 //RX_FDEQ_GAIN_10 +207 0x4848 //RX_FDEQ_GAIN_11 +208 0x4848 //RX_FDEQ_GAIN_12 +209 0x4848 //RX_FDEQ_GAIN_13 +210 0x4848 //RX_FDEQ_GAIN_14 +211 0x4848 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0000 //RX_FDEQ_BIN_0 +221 0x0000 //RX_FDEQ_BIN_1 +222 0x0000 //RX_FDEQ_BIN_2 +223 0x0000 //RX_FDEQ_BIN_3 +224 0x0000 //RX_FDEQ_BIN_4 +225 0x0000 //RX_FDEQ_BIN_5 +226 0x0000 //RX_FDEQ_BIN_6 +227 0x0000 //RX_FDEQ_BIN_7 +228 0x0000 //RX_FDEQ_BIN_8 +229 0x0000 //RX_FDEQ_BIN_9 +230 0x0000 //RX_FDEQ_BIN_10 +231 0x0000 //RX_FDEQ_BIN_11 +232 0x0000 //RX_FDEQ_BIN_12 +233 0x0000 //RX_FDEQ_BIN_13 +234 0x0000 //RX_FDEQ_BIN_14 +235 0x0000 //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x0000 //RX_FDEQ_RESRV_0 +245 0x0000 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0030 //RX_FDDRC_BAND_MARGIN_1 +248 0x0050 //RX_FDDRC_BAND_MARGIN_2 +249 0x0080 //RX_FDDRC_BAND_MARGIN_3 +250 0x0004 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x5000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x6400 //RX_FDDRC_THRD_3_2 +258 0x6400 //RX_FDDRC_THRD_3_3 +259 0x2000 //RX_FDDRC_SLANT_0_0 +260 0x2000 //RX_FDDRC_SLANT_0_1 +261 0x2000 //RX_FDDRC_SLANT_0_2 +262 0x2000 //RX_FDDRC_SLANT_0_3 +263 0x2000 //RX_FDDRC_SLANT_1_0 +264 0x2000 //RX_FDDRC_SLANT_1_1 +265 0x2000 //RX_FDDRC_SLANT_1_2 +266 0x2000 //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +286 0x0100 //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 +#VOL 3 +163 0x3000 //RX_TDDRC_ALPHA_UP_1 +164 0x3000 //RX_TDDRC_ALPHA_UP_2 +165 0x3000 //RX_TDDRC_ALPHA_UP_3 +166 0x3000 //RX_TDDRC_ALPHA_UP_4 +184 0x7FB0 //RX_TDDRC_ALPHA_DWN_1 +185 0x7FB0 //RX_TDDRC_ALPHA_DWN_2 +186 0x7FB0 //RX_TDDRC_ALPHA_DWN_3 +189 0x7FB0 //RX_TDDRC_ALPHA_DWN_4 +190 0xDA9E //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +269 0x0000 //RX_TDDRC_THRD_0 +270 0x0000 //RX_TDDRC_THRD_1 +271 0x0E80 //RX_TDDRC_THRD_2 +272 0x3800 //RX_TDDRC_THRD_3 +273 0x2A00 //RX_TDDRC_SLANT_0 +274 0x6E00 //RX_TDDRC_SLANT_1 +275 0x3000 //RX_TDDRC_ALPHA_UP_0 +276 0x7FB0 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x0000 //RX_TDDRC_HMNC_GAIN +279 0x0000 //RX_TDDRC_SMT_FLAG +280 0x0000 //RX_TDDRC_SMT_W +281 0x0100 //RX_TDDRC_DRC_GAIN +195 0x0020 //RX_FDEQ_SUBNUM +196 0x4848 //RX_FDEQ_GAIN_0 +197 0x4848 //RX_FDEQ_GAIN_1 +198 0x4848 //RX_FDEQ_GAIN_2 +199 0x4848 //RX_FDEQ_GAIN_3 +200 0x4848 //RX_FDEQ_GAIN_4 +201 0x4848 //RX_FDEQ_GAIN_5 +202 0x4848 //RX_FDEQ_GAIN_6 +203 0x4848 //RX_FDEQ_GAIN_7 +204 0x4848 //RX_FDEQ_GAIN_8 +205 0x4848 //RX_FDEQ_GAIN_9 +206 0x4848 //RX_FDEQ_GAIN_10 +207 0x4848 //RX_FDEQ_GAIN_11 +208 0x4848 //RX_FDEQ_GAIN_12 +209 0x4848 //RX_FDEQ_GAIN_13 +210 0x4848 //RX_FDEQ_GAIN_14 +211 0x4848 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0000 //RX_FDEQ_BIN_0 +221 0x0000 //RX_FDEQ_BIN_1 +222 0x0000 //RX_FDEQ_BIN_2 +223 0x0000 //RX_FDEQ_BIN_3 +224 0x0000 //RX_FDEQ_BIN_4 +225 0x0000 //RX_FDEQ_BIN_5 +226 0x0000 //RX_FDEQ_BIN_6 +227 0x0000 //RX_FDEQ_BIN_7 +228 0x0000 //RX_FDEQ_BIN_8 +229 0x0000 //RX_FDEQ_BIN_9 +230 0x0000 //RX_FDEQ_BIN_10 +231 0x0000 //RX_FDEQ_BIN_11 +232 0x0000 //RX_FDEQ_BIN_12 +233 0x0000 //RX_FDEQ_BIN_13 +234 0x0000 //RX_FDEQ_BIN_14 +235 0x0000 //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x0000 //RX_FDEQ_RESRV_0 +245 0x0000 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0030 //RX_FDDRC_BAND_MARGIN_1 +248 0x0050 //RX_FDDRC_BAND_MARGIN_2 +249 0x0080 //RX_FDDRC_BAND_MARGIN_3 +250 0x0004 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x5000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x6400 //RX_FDDRC_THRD_3_2 +258 0x6400 //RX_FDDRC_THRD_3_3 +259 0x2000 //RX_FDDRC_SLANT_0_0 +260 0x2000 //RX_FDDRC_SLANT_0_1 +261 0x2000 //RX_FDDRC_SLANT_0_2 +262 0x2000 //RX_FDDRC_SLANT_0_3 +263 0x2000 //RX_FDDRC_SLANT_1_0 +264 0x2000 //RX_FDDRC_SLANT_1_1 +265 0x2000 //RX_FDDRC_SLANT_1_2 +266 0x2000 //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +286 0x0100 //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 +#VOL 4 +163 0x3000 //RX_TDDRC_ALPHA_UP_1 +164 0x3000 //RX_TDDRC_ALPHA_UP_2 +165 0x3000 //RX_TDDRC_ALPHA_UP_3 +166 0x3000 //RX_TDDRC_ALPHA_UP_4 +184 0x7FB0 //RX_TDDRC_ALPHA_DWN_1 +185 0x7FB0 //RX_TDDRC_ALPHA_DWN_2 +186 0x7FB0 //RX_TDDRC_ALPHA_DWN_3 +189 0x7FB0 //RX_TDDRC_ALPHA_DWN_4 +190 0xDA9E //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +269 0x0000 //RX_TDDRC_THRD_0 +270 0x0000 //RX_TDDRC_THRD_1 +271 0x0E80 //RX_TDDRC_THRD_2 +272 0x3800 //RX_TDDRC_THRD_3 +273 0x2A00 //RX_TDDRC_SLANT_0 +274 0x6E00 //RX_TDDRC_SLANT_1 +275 0x3000 //RX_TDDRC_ALPHA_UP_0 +276 0x7FB0 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x0000 //RX_TDDRC_HMNC_GAIN +279 0x0000 //RX_TDDRC_SMT_FLAG +280 0x0000 //RX_TDDRC_SMT_W +281 0x0100 //RX_TDDRC_DRC_GAIN +195 0x0020 //RX_FDEQ_SUBNUM +196 0x4848 //RX_FDEQ_GAIN_0 +197 0x4848 //RX_FDEQ_GAIN_1 +198 0x4848 //RX_FDEQ_GAIN_2 +199 0x4848 //RX_FDEQ_GAIN_3 +200 0x4848 //RX_FDEQ_GAIN_4 +201 0x4848 //RX_FDEQ_GAIN_5 +202 0x4848 //RX_FDEQ_GAIN_6 +203 0x4848 //RX_FDEQ_GAIN_7 +204 0x4848 //RX_FDEQ_GAIN_8 +205 0x4848 //RX_FDEQ_GAIN_9 +206 0x4848 //RX_FDEQ_GAIN_10 +207 0x4848 //RX_FDEQ_GAIN_11 +208 0x4848 //RX_FDEQ_GAIN_12 +209 0x4848 //RX_FDEQ_GAIN_13 +210 0x4848 //RX_FDEQ_GAIN_14 +211 0x4848 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0000 //RX_FDEQ_BIN_0 +221 0x0000 //RX_FDEQ_BIN_1 +222 0x0000 //RX_FDEQ_BIN_2 +223 0x0000 //RX_FDEQ_BIN_3 +224 0x0000 //RX_FDEQ_BIN_4 +225 0x0000 //RX_FDEQ_BIN_5 +226 0x0000 //RX_FDEQ_BIN_6 +227 0x0000 //RX_FDEQ_BIN_7 +228 0x0000 //RX_FDEQ_BIN_8 +229 0x0000 //RX_FDEQ_BIN_9 +230 0x0000 //RX_FDEQ_BIN_10 +231 0x0000 //RX_FDEQ_BIN_11 +232 0x0000 //RX_FDEQ_BIN_12 +233 0x0000 //RX_FDEQ_BIN_13 +234 0x0000 //RX_FDEQ_BIN_14 +235 0x0000 //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x0000 //RX_FDEQ_RESRV_0 +245 0x0000 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0030 //RX_FDDRC_BAND_MARGIN_1 +248 0x0050 //RX_FDDRC_BAND_MARGIN_2 +249 0x0080 //RX_FDDRC_BAND_MARGIN_3 +250 0x0004 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x5000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x6400 //RX_FDDRC_THRD_3_2 +258 0x6400 //RX_FDDRC_THRD_3_3 +259 0x2000 //RX_FDDRC_SLANT_0_0 +260 0x2000 //RX_FDDRC_SLANT_0_1 +261 0x2000 //RX_FDDRC_SLANT_0_2 +262 0x2000 //RX_FDDRC_SLANT_0_3 +263 0x2000 //RX_FDDRC_SLANT_1_0 +264 0x2000 //RX_FDDRC_SLANT_1_1 +265 0x2000 //RX_FDDRC_SLANT_1_2 +266 0x2000 //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +286 0x0100 //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 +#VOL 5 +163 0x3000 //RX_TDDRC_ALPHA_UP_1 +164 0x3000 //RX_TDDRC_ALPHA_UP_2 +165 0x3000 //RX_TDDRC_ALPHA_UP_3 +166 0x3000 //RX_TDDRC_ALPHA_UP_4 +184 0x7FB0 //RX_TDDRC_ALPHA_DWN_1 +185 0x7FB0 //RX_TDDRC_ALPHA_DWN_2 +186 0x7FB0 //RX_TDDRC_ALPHA_DWN_3 +189 0x7FB0 //RX_TDDRC_ALPHA_DWN_4 +190 0xDA9E //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +269 0x0000 //RX_TDDRC_THRD_0 +270 0x0000 //RX_TDDRC_THRD_1 +271 0x0E80 //RX_TDDRC_THRD_2 +272 0x3800 //RX_TDDRC_THRD_3 +273 0x2A00 //RX_TDDRC_SLANT_0 +274 0x6E00 //RX_TDDRC_SLANT_1 +275 0x3000 //RX_TDDRC_ALPHA_UP_0 +276 0x7FB0 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x0000 //RX_TDDRC_HMNC_GAIN +279 0x0000 //RX_TDDRC_SMT_FLAG +280 0x0000 //RX_TDDRC_SMT_W +281 0x0100 //RX_TDDRC_DRC_GAIN +195 0x0020 //RX_FDEQ_SUBNUM +196 0x4848 //RX_FDEQ_GAIN_0 +197 0x4848 //RX_FDEQ_GAIN_1 +198 0x4848 //RX_FDEQ_GAIN_2 +199 0x4848 //RX_FDEQ_GAIN_3 +200 0x4848 //RX_FDEQ_GAIN_4 +201 0x4848 //RX_FDEQ_GAIN_5 +202 0x4848 //RX_FDEQ_GAIN_6 +203 0x4848 //RX_FDEQ_GAIN_7 +204 0x4848 //RX_FDEQ_GAIN_8 +205 0x4848 //RX_FDEQ_GAIN_9 +206 0x4848 //RX_FDEQ_GAIN_10 +207 0x4848 //RX_FDEQ_GAIN_11 +208 0x4848 //RX_FDEQ_GAIN_12 +209 0x4848 //RX_FDEQ_GAIN_13 +210 0x4848 //RX_FDEQ_GAIN_14 +211 0x4848 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0000 //RX_FDEQ_BIN_0 +221 0x0000 //RX_FDEQ_BIN_1 +222 0x0000 //RX_FDEQ_BIN_2 +223 0x0000 //RX_FDEQ_BIN_3 +224 0x0000 //RX_FDEQ_BIN_4 +225 0x0000 //RX_FDEQ_BIN_5 +226 0x0000 //RX_FDEQ_BIN_6 +227 0x0000 //RX_FDEQ_BIN_7 +228 0x0000 //RX_FDEQ_BIN_8 +229 0x0000 //RX_FDEQ_BIN_9 +230 0x0000 //RX_FDEQ_BIN_10 +231 0x0000 //RX_FDEQ_BIN_11 +232 0x0000 //RX_FDEQ_BIN_12 +233 0x0000 //RX_FDEQ_BIN_13 +234 0x0000 //RX_FDEQ_BIN_14 +235 0x0000 //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x0000 //RX_FDEQ_RESRV_0 +245 0x0000 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0030 //RX_FDDRC_BAND_MARGIN_1 +248 0x0050 //RX_FDDRC_BAND_MARGIN_2 +249 0x0080 //RX_FDDRC_BAND_MARGIN_3 +250 0x0004 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x5000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x6400 //RX_FDDRC_THRD_3_2 +258 0x6400 //RX_FDDRC_THRD_3_3 +259 0x2000 //RX_FDDRC_SLANT_0_0 +260 0x2000 //RX_FDDRC_SLANT_0_1 +261 0x2000 //RX_FDDRC_SLANT_0_2 +262 0x2000 //RX_FDDRC_SLANT_0_3 +263 0x2000 //RX_FDDRC_SLANT_1_0 +264 0x2000 //RX_FDDRC_SLANT_1_1 +265 0x2000 //RX_FDDRC_SLANT_1_2 +266 0x2000 //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +286 0x0100 //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 +#VOL 6 +163 0x3000 //RX_TDDRC_ALPHA_UP_1 +164 0x3000 //RX_TDDRC_ALPHA_UP_2 +165 0x3000 //RX_TDDRC_ALPHA_UP_3 +166 0x3000 //RX_TDDRC_ALPHA_UP_4 +184 0x7FB0 //RX_TDDRC_ALPHA_DWN_1 +185 0x7FB0 //RX_TDDRC_ALPHA_DWN_2 +186 0x7FB0 //RX_TDDRC_ALPHA_DWN_3 +189 0x7FB0 //RX_TDDRC_ALPHA_DWN_4 +190 0xDA9E //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +269 0x0000 //RX_TDDRC_THRD_0 +270 0x0000 //RX_TDDRC_THRD_1 +271 0x0E80 //RX_TDDRC_THRD_2 +272 0x3800 //RX_TDDRC_THRD_3 +273 0x2A00 //RX_TDDRC_SLANT_0 +274 0x6E00 //RX_TDDRC_SLANT_1 +275 0x3000 //RX_TDDRC_ALPHA_UP_0 +276 0x7FB0 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x0000 //RX_TDDRC_HMNC_GAIN +279 0x0000 //RX_TDDRC_SMT_FLAG +280 0x0000 //RX_TDDRC_SMT_W +281 0x0100 //RX_TDDRC_DRC_GAIN +195 0x0020 //RX_FDEQ_SUBNUM +196 0x4848 //RX_FDEQ_GAIN_0 +197 0x4848 //RX_FDEQ_GAIN_1 +198 0x4848 //RX_FDEQ_GAIN_2 +199 0x4848 //RX_FDEQ_GAIN_3 +200 0x4848 //RX_FDEQ_GAIN_4 +201 0x4848 //RX_FDEQ_GAIN_5 +202 0x4848 //RX_FDEQ_GAIN_6 +203 0x4848 //RX_FDEQ_GAIN_7 +204 0x4848 //RX_FDEQ_GAIN_8 +205 0x4848 //RX_FDEQ_GAIN_9 +206 0x4848 //RX_FDEQ_GAIN_10 +207 0x4848 //RX_FDEQ_GAIN_11 +208 0x4848 //RX_FDEQ_GAIN_12 +209 0x4848 //RX_FDEQ_GAIN_13 +210 0x4848 //RX_FDEQ_GAIN_14 +211 0x4848 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0000 //RX_FDEQ_BIN_0 +221 0x0000 //RX_FDEQ_BIN_1 +222 0x0000 //RX_FDEQ_BIN_2 +223 0x0000 //RX_FDEQ_BIN_3 +224 0x0000 //RX_FDEQ_BIN_4 +225 0x0000 //RX_FDEQ_BIN_5 +226 0x0000 //RX_FDEQ_BIN_6 +227 0x0000 //RX_FDEQ_BIN_7 +228 0x0000 //RX_FDEQ_BIN_8 +229 0x0000 //RX_FDEQ_BIN_9 +230 0x0000 //RX_FDEQ_BIN_10 +231 0x0000 //RX_FDEQ_BIN_11 +232 0x0000 //RX_FDEQ_BIN_12 +233 0x0000 //RX_FDEQ_BIN_13 +234 0x0000 //RX_FDEQ_BIN_14 +235 0x0000 //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x0000 //RX_FDEQ_RESRV_0 +245 0x0000 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0030 //RX_FDDRC_BAND_MARGIN_1 +248 0x0050 //RX_FDDRC_BAND_MARGIN_2 +249 0x0080 //RX_FDDRC_BAND_MARGIN_3 +250 0x0004 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x5000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x6400 //RX_FDDRC_THRD_3_2 +258 0x6400 //RX_FDDRC_THRD_3_3 +259 0x2000 //RX_FDDRC_SLANT_0_0 +260 0x2000 //RX_FDDRC_SLANT_0_1 +261 0x2000 //RX_FDDRC_SLANT_0_2 +262 0x2000 //RX_FDDRC_SLANT_0_3 +263 0x2000 //RX_FDDRC_SLANT_1_0 +264 0x2000 //RX_FDDRC_SLANT_1_1 +265 0x2000 //RX_FDDRC_SLANT_1_2 +266 0x2000 //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +286 0x0100 //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 #CASE_NAME HEADSET-TTY_FULL-VOICE_GENERIC-FB -#PARAM_MODE FULL -#PARAM_TYPE TX+RX -#TOTAL_CUSTOM_STEP 7 +#PARAM_MODE Full +#PARAM_TYPE TX+2RX +#TOTAL_CUSTOM_STEP 7+7 #TX 0 0x0001 //TX_OPERATION_MODE_0 1 0x0000 //TX_OPERATION_MODE_1 @@ -54624,7 +83020,7 @@ 239 0x0000 //TX_DT_RESRV_7 240 0x0000 //TX_DT_RESRV_8 241 0x0000 //TX_DT_RESRV_9 -242 0xF200 //TX_THR_SN_EST_0 +242 0xF700 //TX_THR_SN_EST_0 243 0xF400 //TX_THR_SN_EST_1 244 0xF800 //TX_THR_SN_EST_2 245 0xF600 //TX_THR_SN_EST_3 @@ -54633,12 +83029,12 @@ 248 0xF800 //TX_THR_SN_EST_6 249 0xF800 //TX_THR_SN_EST_7 250 0x0100 //TX_DELTA_THR_SN_EST_0 -251 0x0000 //TX_DELTA_THR_SN_EST_1 +251 0x0100 //TX_DELTA_THR_SN_EST_1 252 0x0100 //TX_DELTA_THR_SN_EST_2 -253 0x0100 //TX_DELTA_THR_SN_EST_3 +253 0x0200 //TX_DELTA_THR_SN_EST_3 254 0x0200 //TX_DELTA_THR_SN_EST_4 255 0x0200 //TX_DELTA_THR_SN_EST_5 -256 0x0200 //TX_DELTA_THR_SN_EST_6 +256 0x0000 //TX_DELTA_THR_SN_EST_6 257 0x0200 //TX_DELTA_THR_SN_EST_7 258 0x4000 //TX_LAMBDA_NN_EST_0 259 0x4000 //TX_LAMBDA_NN_EST_1 @@ -54664,12 +83060,12 @@ 279 0x0000 //TX_B_POST_FLT_0 280 0x0000 //TX_B_POST_FLT_1 281 0x001A //TX_NS_LVL_CTRL_0 -282 0x001A //TX_NS_LVL_CTRL_1 +282 0x0014 //TX_NS_LVL_CTRL_1 283 0x0014 //TX_NS_LVL_CTRL_2 -284 0x0014 //TX_NS_LVL_CTRL_3 +284 0x000C //TX_NS_LVL_CTRL_3 285 0x000C //TX_NS_LVL_CTRL_4 286 0x000C //TX_NS_LVL_CTRL_5 -287 0x000C //TX_NS_LVL_CTRL_6 +287 0x001A //TX_NS_LVL_CTRL_6 288 0x000C //TX_NS_LVL_CTRL_7 289 0x000E //TX_MIN_GAIN_S_0 290 0x0014 //TX_MIN_GAIN_S_1 @@ -54685,10 +83081,10 @@ 300 0x7FFF //TX_SNRI_SUP_0 301 0x7FFF //TX_SNRI_SUP_1 302 0x7FFF //TX_SNRI_SUP_2 -303 0x7FFF //TX_SNRI_SUP_3 +303 0x4000 //TX_SNRI_SUP_3 304 0x4000 //TX_SNRI_SUP_4 305 0x4000 //TX_SNRI_SUP_5 -306 0x4000 //TX_SNRI_SUP_6 +306 0x7FFF //TX_SNRI_SUP_6 307 0x4000 //TX_SNRI_SUP_7 308 0x1200 //TX_THR_LFNS 309 0x0147 //TX_G_LFNS @@ -54697,12 +83093,12 @@ 312 0x7FFF //TX_A_POST_FILT_0 313 0x7FFF //TX_A_POST_FILT_1 314 0x4000 //TX_A_POST_FILT_S_0 -315 0x199A //TX_A_POST_FILT_S_1 +315 0x1000 //TX_A_POST_FILT_S_1 316 0x1000 //TX_A_POST_FILT_S_2 -317 0x1000 //TX_A_POST_FILT_S_3 +317 0x6666 //TX_A_POST_FILT_S_3 318 0x6666 //TX_A_POST_FILT_S_4 319 0x6666 //TX_A_POST_FILT_S_5 -320 0x6666 //TX_A_POST_FILT_S_6 +320 0x199A //TX_A_POST_FILT_S_6 321 0x6666 //TX_A_POST_FILT_S_7 322 0x2000 //TX_B_POST_FILT_0 323 0x2000 //TX_B_POST_FILT_1 @@ -54749,7 +83145,7 @@ 364 0x0000 //TX_K_APT 365 0x0001 //TX_NOISEDET 366 0x05A0 //TX_NDETCT -367 0x000A //TX_NOISE_TH_0 +367 0x04E8 //TX_NOISE_TH_0 368 0x1388 //TX_NOISE_TH_0_2 369 0x3A98 //TX_NOISE_TH_0_3 370 0x0C80 //TX_NOISE_TH_1 @@ -54761,11 +83157,11 @@ 376 0x7FFF //TX_NOISE_TH_5_3 377 0x7FFF //TX_NOISE_TH_5_4 378 0x00C8 //TX_NOISE_TH_6 -379 0x000A //TX_MINENOISE_TH -380 0x0000 //TX_MINENOISE_MIC0_TH_MTS -381 0x0000 //TX_MINENOISE_MIC0_TH_EXP -382 0x0000 //TX_MINENOISE_MIC0_S_TH_MTS -383 0x0000 //TX_MINENOISE_MIC0_S_TH_EXP +379 0x02BC //TX_MINENOISE_TH +380 0xD508 //TX_MORENS_TFMASK_TH +381 0x0001 //TX_DRC_QUIET_FLOOR +382 0x3A98 //TX_RATIODTL_CUT_TH +383 0x1482 //TX_DT_CUT_K1 384 0x6400 //TX_OUT_ENER_S_TH_CLEAN 385 0x6400 //TX_OUT_ENER_S_TH_LESSCLEAN 386 0x6400 //TX_OUT_ENER_S_TH_NOISY @@ -54773,22 +83169,22 @@ 388 0x7D00 //TX_OUT_ENER_TH_SPEECH 389 0x0000 //TX_SN_NPB_GAIN 390 0x0000 //TX_NN_NPB_GAIN -391 0x0000 //TX_CSX_ALPHA_0 -392 0x0000 //TX_CSX_ALPHA_1 -393 0x0000 //TX_CSX_ALPHA_2 -394 0x0000 //TX_CSX_ALPHA_3 -395 0x0000 //TX_MU_ARSP_EST -396 0x0000 //TX_P_OUTBEAM_MIN_TH +391 0x7FFF //TX_POST_MASK_SUP_HSNE +392 0x1388 //TX_TAIL_DET_TH +393 0x4000 //TX_B_LESSCUT_RTO_WTA +394 0x0000 //TX_MEL_G_R +395 0x0080 //TX_SUPHIGH_TH +396 0x0000 //TX_MASK_G_R 397 0x0000 //TX_EXTRA_NS_L -398 0x0000 //TX_EXTRA_NS_A -399 0x0000 //TX_VR_NOISE_FLOOR_TH +398 0x1800 //TX_C_POST_FLT_MASK +399 0x7FFF //TX_A_POST_FLT_WNS 400 0x0000 //TX_MIN_G_LOW300HZ 401 0x0010 //TX_MAXLEVEL_CNG 402 0x0000 //TX_STN_NOISE_TH 403 0x0000 //TX_POST_MASK_SUP 404 0x0000 //TX_POST_MASK_ADJUST 405 0x0014 //TX_NS_ENOISE_MIC0_TH -406 0x0014 //TX_MINENOISE_MIC0_TH +406 0x04E7 //TX_MINENOISE_MIC0_TH 407 0x0226 //TX_MINENOISE_MIC0_S_TH 408 0x2879 //TX_MIN_G_CTRL_SSNS 409 0x0400 //TX_METAL_RTO_THR @@ -54896,16 +83292,16 @@ 511 0x6666 //TX_MIC_TO_BFGAIN 512 0x6666 //TX_MICTOBFGAIN0 513 0x0014 //TX_FASTMUE_TH -514 0x0000 //TX_DERVB_LEN_0 -515 0x0000 //TX_DERVB_LEN_1 -516 0x0000 //TX_RHO_DERVB -517 0x0000 //TX_MIC_INDX_DERVB -518 0x0000 //TX_MU_DERVB -519 0x0000 //TX_DR_RESRV_0 -520 0x0000 //TX_DR_RESRV_1 -521 0x0000 //TX_DR_RESRV_2 -522 0x0000 //TX_DR_RESRV_3 -523 0x0000 //TX_DR_RESRV_4 +514 0xC000 //TX_DEREVERB_LF_MU +515 0xC000 //TX_DEREVERB_HF_MU +516 0xCCCC //TX_DEREVERB_DELAY +517 0xD999 //TX_DEREVERB_COEF_LEN +518 0x1F40 //TX_DEREVERB_DNR +519 0x0000 //TX_DEREVERB_ALPHA +520 0x0000 //TX_DEREVERB_BETA +521 0x0000 //TX_GSC_RTOL_TH +522 0x7000 //TX_GSC_RTOH_TH +523 0x0064 //TX_WIDE2_MEANHTH 524 0x0000 //TX_DR_RESRV_5 525 0x0000 //TX_DR_RESRV_6 526 0x0000 //TX_DR_RESRV_7 @@ -55271,16 +83667,81 @@ 886 0x0000 //TX_FASTNS_TFMASKBIN_TH2 887 0x0000 //TX_FASTNS_TFMASKBIN_TH3 888 0x00C8 //TX_FASTNS_ARSPC_TH -889 0xD99A //TX_FASTNS_MASK5_TH +889 0xC000 //TX_FASTNS_MASK5_TH 890 0x051F //TX_POSTSSA_MIN_G_VR_MASK -891 0x7FFF //TX_A_LESSCUT_RTO_MASK +891 0x7000 //TX_A_LESSCUT_RTO_MASK 892 0x1770 //TX_FASTNS_NOISETH 893 0xC000 //TX_FASTNS_SSA_THLFL 894 0xC000 //TX_FASTNS_SSA_THHFL 895 0xCCCC //TX_FASTNS_SSA_THLFH 896 0xD999 //TX_FASTNS_SSA_THHFH +897 0x2339 //TX_SENDFUNC_REG_MICMUTE +898 0x0021 //TX_SENDFUNC_REG_MICMUTE1 +899 0x02BC //TX_MICMUTE_RATIO_THR +900 0x0140 //TX_MICMUTE_AMP_THR +901 0x0004 //TX_MICMUTE_HPF_IND +902 0x00C0 //TX_MICMUTE_LOG_EYR_TH +903 0x0008 //TX_MICMUTE_CVG_TIME +904 0x0008 //TX_MICMUTE_RELEASE_TIME +905 0x01FE //TX_MIC_VOLUME_MIC0MUTE +906 0x0020 //TX_MICMUTE_EPD_OFFSET_0 +907 0x001E //TX_MICMUTE_FRQ_AEC_L +908 0x7999 //TX_MICMUTE_EAD_THR +909 0x7FFF //TX_MICMUTE_LAMBDA_CB_NLE +910 0x7FFF //TX_MICMUTE_LAMBDA_RE_EST +911 0x4000 //TX_DTD_THR1_MICMUTE_0 +912 0x7000 //TX_DTD_THR1_MICMUTE_1 +913 0x7FFF //TX_DTD_THR1_MICMUTE_2 +914 0x7FFF //TX_DTD_THR1_MICMUTE_3 +915 0x6CCC //TX_DTD_THR2_MICMUTE_0 +916 0x0400 //TX_MICMUTE_MIN_EQ_RE_EST_0 +917 0x0400 //TX_MICMUTE_MIN_EQ_RE_EST_1 +918 0x1000 //TX_MICMUTE_MIN_EQ_RE_EST_2 +919 0x7FFF //TX_MICMUTE_MIN_EQ_RE_EST_3 +920 0x7FFF //TX_MICMUTE_MIN_EQ_RE_EST_4 +921 0x4000 //TX_MICMUTE_C_POST_FLT +922 0x03E8 //TX_MICMUTE_DT_CUT_K +923 0x0001 //TX_MICMUTE_DT_CUT_THR +924 0x03E8 //TX_MICMUTE_DT_CUT_K2 +925 0x0001 //TX_MICMUTE_DT_CUT_THR2 +926 0x0064 //TX_MICMUTE_DT2_HOLD_N +927 0x1000 //TX_MICMUTE_RATIODTH_THCUT +928 0x1000 //TX_MICMUTE_B_POST_FLT_ECHOL +929 0x7FFF //TX_MICMUTE_B_POST_FLT_ECHOH +930 0x0400 //TX_MICMUTE_C_POST_FLT_MASK +931 0x7999 //TX_MICMUTE_RATIODTL_CUT_TH +932 0x0258 //TX_MICMUTE_DT_CUT_K1 +933 0x0800 //TX_MICMUTE_N2_SN_EST +934 0xFC00 //TX_MICMUTE_THR_SN_EST_0 +935 0x001C //TX_MICMUTE_MIN_G_CTRL_0 +936 0x6000 //TX_MICMUTE_A_POST_FILT_S_0 +937 0x7000 //TX_MICMUTE_B_POST_FILT_0 +938 0x2710 //TX_MIC1RUB_AMP_THR +939 0x0010 //TX_MIC1MUTE_RATIO_THR +940 0x0450 //TX_MIC1MUTE_AMP_THR +941 0x0008 //TX_MIC1MUTE_CVG_TIME +942 0x0008 //TX_MIC1MUTE_RELEASE_TIME +943 0x0000 //TX_AMS_RESRV_01 +944 0x0000 //TX_AMS_RESRV_02 +945 0x0000 //TX_AMS_RESRV_03 +946 0x0000 //TX_AMS_RESRV_04 +947 0x0000 //TX_AMS_RESRV_05 +948 0x0000 //TX_AMS_RESRV_06 +949 0x0000 //TX_AMS_RESRV_07 +950 0x0000 //TX_AMS_RESRV_08 +951 0x0000 //TX_AMS_RESRV_09 +952 0x0000 //TX_AMS_RESRV_10 +953 0x0000 //TX_AMS_RESRV_11 +954 0x0000 //TX_AMS_RESRV_12 +955 0x0000 //TX_AMS_RESRV_13 +956 0x0000 //TX_AMS_RESRV_14 +957 0x0000 //TX_AMS_RESRV_15 +958 0x0000 //TX_AMS_RESRV_16 +959 0x0000 //TX_AMS_RESRV_17 +960 0x0000 //TX_AMS_RESRV_18 +961 0x0000 //TX_AMS_RESRV_19 #RX -0 0x0040 //RX_RECVFUNC_MODE_0 +0 0x2040 //RX_RECVFUNC_MODE_0 1 0x0000 //RX_RECVFUNC_MODE_1 2 0x0000 //RX_SAMPLINGFREQ_SIG 3 0x0000 //RX_SAMPLINGFREQ_PROC @@ -56130,4 +84591,855 @@ 110 0x0000 //RX_FDDRC_RESRV_0 129 0x0100 //RX_SPK_VOL 130 0x0000 //RX_VOL_RESRV_0 +#RX 2 +157 0x2040 //RX_RECVFUNC_MODE_0 +158 0x0000 //RX_RECVFUNC_MODE_1 +159 0x0000 //RX_SAMPLINGFREQ_SIG +160 0x0000 //RX_SAMPLINGFREQ_PROC +161 0x000A //RX_FRAME_SZ +162 0x0000 //RX_DELAY_OPT +163 0x3000 //RX_TDDRC_ALPHA_UP_1 +164 0x3000 //RX_TDDRC_ALPHA_UP_2 +165 0x3000 //RX_TDDRC_ALPHA_UP_3 +166 0x3000 //RX_TDDRC_ALPHA_UP_4 +167 0x050D //RX_PGA +168 0x7652 //RX_A_HP +169 0x4000 //RX_B_PE +170 0x7800 //RX_THR_PITCH_DET_0 +171 0x7000 //RX_THR_PITCH_DET_1 +172 0x6000 //RX_THR_PITCH_DET_2 +173 0x0000 //RX_PITCH_BFR_LEN +174 0x0000 //RX_SBD_PITCH_DET +175 0x0000 //RX_PP_RESRV_0 +176 0x0000 //RX_PP_RESRV_1 +177 0xF800 //RX_N_SN_EST +178 0x0000 //RX_N2_SN_EST +179 0x000F //RX_NS_LVL_CTRL +180 0xF800 //RX_THR_SN_EST +181 0x7E00 //RX_LAMBDA_PFILT +182 0x000A //RX_FENS_RESRV_0 +183 0x0000 //RX_FENS_RESRV_1 +184 0x7FB0 //RX_TDDRC_ALPHA_DWN_1 +185 0x7FB0 //RX_TDDRC_ALPHA_DWN_2 +186 0x7FB0 //RX_TDDRC_ALPHA_DWN_3 +187 0x0000 //RX_EXTRA_NS_L +188 0x0000 //RX_EXTRA_NS_A +189 0x7FB0 //RX_TDDRC_ALPHA_DWN_4 +190 0xDA9E //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +192 0x0000 //RX_A_POST_FLT +193 0x0000 //RX_LMT_THRD +194 0x4000 //RX_LMT_ALPHA +195 0x0020 //RX_FDEQ_SUBNUM +196 0x4848 //RX_FDEQ_GAIN_0 +197 0x4848 //RX_FDEQ_GAIN_1 +198 0x4848 //RX_FDEQ_GAIN_2 +199 0x4848 //RX_FDEQ_GAIN_3 +200 0x4848 //RX_FDEQ_GAIN_4 +201 0x4848 //RX_FDEQ_GAIN_5 +202 0x4848 //RX_FDEQ_GAIN_6 +203 0x4848 //RX_FDEQ_GAIN_7 +204 0x4848 //RX_FDEQ_GAIN_8 +205 0x4848 //RX_FDEQ_GAIN_9 +206 0x4848 //RX_FDEQ_GAIN_10 +207 0x4848 //RX_FDEQ_GAIN_11 +208 0x4848 //RX_FDEQ_GAIN_12 +209 0x4848 //RX_FDEQ_GAIN_13 +210 0x4848 //RX_FDEQ_GAIN_14 +211 0x4848 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0000 //RX_FDEQ_BIN_0 +221 0x0000 //RX_FDEQ_BIN_1 +222 0x0000 //RX_FDEQ_BIN_2 +223 0x0000 //RX_FDEQ_BIN_3 +224 0x0000 //RX_FDEQ_BIN_4 +225 0x0000 //RX_FDEQ_BIN_5 +226 0x0000 //RX_FDEQ_BIN_6 +227 0x0000 //RX_FDEQ_BIN_7 +228 0x0000 //RX_FDEQ_BIN_8 +229 0x0000 //RX_FDEQ_BIN_9 +230 0x0000 //RX_FDEQ_BIN_10 +231 0x0000 //RX_FDEQ_BIN_11 +232 0x0000 //RX_FDEQ_BIN_12 +233 0x0000 //RX_FDEQ_BIN_13 +234 0x0000 //RX_FDEQ_BIN_14 +235 0x0000 //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x0000 //RX_FDEQ_RESRV_0 +245 0x0000 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0030 //RX_FDDRC_BAND_MARGIN_1 +248 0x0050 //RX_FDDRC_BAND_MARGIN_2 +249 0x0080 //RX_FDDRC_BAND_MARGIN_3 +250 0x0004 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x5000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x6400 //RX_FDDRC_THRD_3_2 +258 0x6400 //RX_FDDRC_THRD_3_3 +259 0x2000 //RX_FDDRC_SLANT_0_0 +260 0x2000 //RX_FDDRC_SLANT_0_1 +261 0x2000 //RX_FDDRC_SLANT_0_2 +262 0x2000 //RX_FDDRC_SLANT_0_3 +263 0x2000 //RX_FDDRC_SLANT_1_0 +264 0x2000 //RX_FDDRC_SLANT_1_1 +265 0x2000 //RX_FDDRC_SLANT_1_2 +266 0x2000 //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +268 0x0003 //RX_FILTINDX +269 0x0000 //RX_TDDRC_THRD_0 +270 0x0000 //RX_TDDRC_THRD_1 +271 0x0E80 //RX_TDDRC_THRD_2 +272 0x3800 //RX_TDDRC_THRD_3 +273 0x2A00 //RX_TDDRC_SLANT_0 +274 0x6E00 //RX_TDDRC_SLANT_1 +275 0x3000 //RX_TDDRC_ALPHA_UP_0 +276 0x7FB0 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x0000 //RX_TDDRC_HMNC_GAIN +279 0x0000 //RX_TDDRC_SMT_FLAG +280 0x0000 //RX_TDDRC_SMT_W +281 0x0100 //RX_TDDRC_DRC_GAIN +282 0x7C00 //RX_LAMBDA_PKA_FP +283 0x2000 //RX_TPKA_FP +284 0x0080 //RX_MIN_G_FP +285 0x2000 //RX_MAX_G_FP +286 0x0100 //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 +288 0x0010 //RX_MAXLEVEL_CNG +289 0x0000 //RX_BWE_UV_TH +290 0x0000 //RX_BWE_UV_TH2 +291 0x0000 //RX_BWE_UV_TH3 +292 0x0000 //RX_BWE_V_TH +293 0x0000 //RX_BWE_GAIN1_V_TH1 +294 0x0000 //RX_BWE_GAIN1_V_TH2 +295 0x0000 //RX_BWE_UV_EQ +296 0x0000 //RX_BWE_V_EQ +297 0x0000 //RX_BWE_TONE_TH +298 0x0000 //RX_BWE_UV_HOLD_T +299 0x0000 //RX_BWE_GAIN2_ALPHA +300 0x0000 //RX_BWE_GAIN3_ALPHA +301 0x0000 //RX_BWE_CUTOFF +302 0x0000 //RX_BWE_GAINFILL +303 0x0000 //RX_BWE_MAXTH_TONE +304 0x0000 //RX_BWE_EQ_0 +305 0x0000 //RX_BWE_EQ_1 +306 0x0000 //RX_BWE_EQ_2 +307 0x0000 //RX_BWE_EQ_3 +308 0x0000 //RX_BWE_EQ_4 +309 0x0000 //RX_BWE_EQ_5 +310 0x0000 //RX_BWE_EQ_6 +311 0x0000 //RX_BWE_RESRV_0 +312 0x0000 //RX_BWE_RESRV_1 +313 0x0000 //RX_BWE_RESRV_2 +#VOL 0 +163 0x3000 //RX_TDDRC_ALPHA_UP_1 +164 0x3000 //RX_TDDRC_ALPHA_UP_2 +165 0x3000 //RX_TDDRC_ALPHA_UP_3 +166 0x3000 //RX_TDDRC_ALPHA_UP_4 +184 0x7FB0 //RX_TDDRC_ALPHA_DWN_1 +185 0x7FB0 //RX_TDDRC_ALPHA_DWN_2 +186 0x7FB0 //RX_TDDRC_ALPHA_DWN_3 +189 0x7FB0 //RX_TDDRC_ALPHA_DWN_4 +190 0xDA9E //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +269 0x0000 //RX_TDDRC_THRD_0 +270 0x0000 //RX_TDDRC_THRD_1 +271 0x0E80 //RX_TDDRC_THRD_2 +272 0x3800 //RX_TDDRC_THRD_3 +273 0x2A00 //RX_TDDRC_SLANT_0 +274 0x6E00 //RX_TDDRC_SLANT_1 +275 0x3000 //RX_TDDRC_ALPHA_UP_0 +276 0x7FB0 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x0000 //RX_TDDRC_HMNC_GAIN +279 0x0000 //RX_TDDRC_SMT_FLAG +280 0x0000 //RX_TDDRC_SMT_W +281 0x0100 //RX_TDDRC_DRC_GAIN +195 0x0020 //RX_FDEQ_SUBNUM +196 0x4848 //RX_FDEQ_GAIN_0 +197 0x4848 //RX_FDEQ_GAIN_1 +198 0x4848 //RX_FDEQ_GAIN_2 +199 0x4848 //RX_FDEQ_GAIN_3 +200 0x4848 //RX_FDEQ_GAIN_4 +201 0x4848 //RX_FDEQ_GAIN_5 +202 0x4848 //RX_FDEQ_GAIN_6 +203 0x4848 //RX_FDEQ_GAIN_7 +204 0x4848 //RX_FDEQ_GAIN_8 +205 0x4848 //RX_FDEQ_GAIN_9 +206 0x4848 //RX_FDEQ_GAIN_10 +207 0x4848 //RX_FDEQ_GAIN_11 +208 0x4848 //RX_FDEQ_GAIN_12 +209 0x4848 //RX_FDEQ_GAIN_13 +210 0x4848 //RX_FDEQ_GAIN_14 +211 0x4848 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0000 //RX_FDEQ_BIN_0 +221 0x0000 //RX_FDEQ_BIN_1 +222 0x0000 //RX_FDEQ_BIN_2 +223 0x0000 //RX_FDEQ_BIN_3 +224 0x0000 //RX_FDEQ_BIN_4 +225 0x0000 //RX_FDEQ_BIN_5 +226 0x0000 //RX_FDEQ_BIN_6 +227 0x0000 //RX_FDEQ_BIN_7 +228 0x0000 //RX_FDEQ_BIN_8 +229 0x0000 //RX_FDEQ_BIN_9 +230 0x0000 //RX_FDEQ_BIN_10 +231 0x0000 //RX_FDEQ_BIN_11 +232 0x0000 //RX_FDEQ_BIN_12 +233 0x0000 //RX_FDEQ_BIN_13 +234 0x0000 //RX_FDEQ_BIN_14 +235 0x0000 //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x0000 //RX_FDEQ_RESRV_0 +245 0x0000 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0030 //RX_FDDRC_BAND_MARGIN_1 +248 0x0050 //RX_FDDRC_BAND_MARGIN_2 +249 0x0080 //RX_FDDRC_BAND_MARGIN_3 +250 0x0004 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x5000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x6400 //RX_FDDRC_THRD_3_2 +258 0x6400 //RX_FDDRC_THRD_3_3 +259 0x2000 //RX_FDDRC_SLANT_0_0 +260 0x2000 //RX_FDDRC_SLANT_0_1 +261 0x2000 //RX_FDDRC_SLANT_0_2 +262 0x2000 //RX_FDDRC_SLANT_0_3 +263 0x2000 //RX_FDDRC_SLANT_1_0 +264 0x2000 //RX_FDDRC_SLANT_1_1 +265 0x2000 //RX_FDDRC_SLANT_1_2 +266 0x2000 //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +286 0x0100 //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 +#VOL 1 +163 0x3000 //RX_TDDRC_ALPHA_UP_1 +164 0x3000 //RX_TDDRC_ALPHA_UP_2 +165 0x3000 //RX_TDDRC_ALPHA_UP_3 +166 0x3000 //RX_TDDRC_ALPHA_UP_4 +184 0x7FB0 //RX_TDDRC_ALPHA_DWN_1 +185 0x7FB0 //RX_TDDRC_ALPHA_DWN_2 +186 0x7FB0 //RX_TDDRC_ALPHA_DWN_3 +189 0x7FB0 //RX_TDDRC_ALPHA_DWN_4 +190 0xDA9E //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +269 0x0000 //RX_TDDRC_THRD_0 +270 0x0000 //RX_TDDRC_THRD_1 +271 0x0E80 //RX_TDDRC_THRD_2 +272 0x3800 //RX_TDDRC_THRD_3 +273 0x2A00 //RX_TDDRC_SLANT_0 +274 0x6E00 //RX_TDDRC_SLANT_1 +275 0x3000 //RX_TDDRC_ALPHA_UP_0 +276 0x7FB0 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x0000 //RX_TDDRC_HMNC_GAIN +279 0x0000 //RX_TDDRC_SMT_FLAG +280 0x0000 //RX_TDDRC_SMT_W +281 0x0100 //RX_TDDRC_DRC_GAIN +195 0x0020 //RX_FDEQ_SUBNUM +196 0x4848 //RX_FDEQ_GAIN_0 +197 0x4848 //RX_FDEQ_GAIN_1 +198 0x4848 //RX_FDEQ_GAIN_2 +199 0x4848 //RX_FDEQ_GAIN_3 +200 0x4848 //RX_FDEQ_GAIN_4 +201 0x4848 //RX_FDEQ_GAIN_5 +202 0x4848 //RX_FDEQ_GAIN_6 +203 0x4848 //RX_FDEQ_GAIN_7 +204 0x4848 //RX_FDEQ_GAIN_8 +205 0x4848 //RX_FDEQ_GAIN_9 +206 0x4848 //RX_FDEQ_GAIN_10 +207 0x4848 //RX_FDEQ_GAIN_11 +208 0x4848 //RX_FDEQ_GAIN_12 +209 0x4848 //RX_FDEQ_GAIN_13 +210 0x4848 //RX_FDEQ_GAIN_14 +211 0x4848 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0000 //RX_FDEQ_BIN_0 +221 0x0000 //RX_FDEQ_BIN_1 +222 0x0000 //RX_FDEQ_BIN_2 +223 0x0000 //RX_FDEQ_BIN_3 +224 0x0000 //RX_FDEQ_BIN_4 +225 0x0000 //RX_FDEQ_BIN_5 +226 0x0000 //RX_FDEQ_BIN_6 +227 0x0000 //RX_FDEQ_BIN_7 +228 0x0000 //RX_FDEQ_BIN_8 +229 0x0000 //RX_FDEQ_BIN_9 +230 0x0000 //RX_FDEQ_BIN_10 +231 0x0000 //RX_FDEQ_BIN_11 +232 0x0000 //RX_FDEQ_BIN_12 +233 0x0000 //RX_FDEQ_BIN_13 +234 0x0000 //RX_FDEQ_BIN_14 +235 0x0000 //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x0000 //RX_FDEQ_RESRV_0 +245 0x0000 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0030 //RX_FDDRC_BAND_MARGIN_1 +248 0x0050 //RX_FDDRC_BAND_MARGIN_2 +249 0x0080 //RX_FDDRC_BAND_MARGIN_3 +250 0x0004 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x5000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x6400 //RX_FDDRC_THRD_3_2 +258 0x6400 //RX_FDDRC_THRD_3_3 +259 0x2000 //RX_FDDRC_SLANT_0_0 +260 0x2000 //RX_FDDRC_SLANT_0_1 +261 0x2000 //RX_FDDRC_SLANT_0_2 +262 0x2000 //RX_FDDRC_SLANT_0_3 +263 0x2000 //RX_FDDRC_SLANT_1_0 +264 0x2000 //RX_FDDRC_SLANT_1_1 +265 0x2000 //RX_FDDRC_SLANT_1_2 +266 0x2000 //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +286 0x0100 //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 +#VOL 2 +163 0x3000 //RX_TDDRC_ALPHA_UP_1 +164 0x3000 //RX_TDDRC_ALPHA_UP_2 +165 0x3000 //RX_TDDRC_ALPHA_UP_3 +166 0x3000 //RX_TDDRC_ALPHA_UP_4 +184 0x7FB0 //RX_TDDRC_ALPHA_DWN_1 +185 0x7FB0 //RX_TDDRC_ALPHA_DWN_2 +186 0x7FB0 //RX_TDDRC_ALPHA_DWN_3 +189 0x7FB0 //RX_TDDRC_ALPHA_DWN_4 +190 0xDA9E //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +269 0x0000 //RX_TDDRC_THRD_0 +270 0x0000 //RX_TDDRC_THRD_1 +271 0x0E80 //RX_TDDRC_THRD_2 +272 0x3800 //RX_TDDRC_THRD_3 +273 0x2A00 //RX_TDDRC_SLANT_0 +274 0x6E00 //RX_TDDRC_SLANT_1 +275 0x3000 //RX_TDDRC_ALPHA_UP_0 +276 0x7FB0 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x0000 //RX_TDDRC_HMNC_GAIN +279 0x0000 //RX_TDDRC_SMT_FLAG +280 0x0000 //RX_TDDRC_SMT_W +281 0x0100 //RX_TDDRC_DRC_GAIN +195 0x0020 //RX_FDEQ_SUBNUM +196 0x4848 //RX_FDEQ_GAIN_0 +197 0x4848 //RX_FDEQ_GAIN_1 +198 0x4848 //RX_FDEQ_GAIN_2 +199 0x4848 //RX_FDEQ_GAIN_3 +200 0x4848 //RX_FDEQ_GAIN_4 +201 0x4848 //RX_FDEQ_GAIN_5 +202 0x4848 //RX_FDEQ_GAIN_6 +203 0x4848 //RX_FDEQ_GAIN_7 +204 0x4848 //RX_FDEQ_GAIN_8 +205 0x4848 //RX_FDEQ_GAIN_9 +206 0x4848 //RX_FDEQ_GAIN_10 +207 0x4848 //RX_FDEQ_GAIN_11 +208 0x4848 //RX_FDEQ_GAIN_12 +209 0x4848 //RX_FDEQ_GAIN_13 +210 0x4848 //RX_FDEQ_GAIN_14 +211 0x4848 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0000 //RX_FDEQ_BIN_0 +221 0x0000 //RX_FDEQ_BIN_1 +222 0x0000 //RX_FDEQ_BIN_2 +223 0x0000 //RX_FDEQ_BIN_3 +224 0x0000 //RX_FDEQ_BIN_4 +225 0x0000 //RX_FDEQ_BIN_5 +226 0x0000 //RX_FDEQ_BIN_6 +227 0x0000 //RX_FDEQ_BIN_7 +228 0x0000 //RX_FDEQ_BIN_8 +229 0x0000 //RX_FDEQ_BIN_9 +230 0x0000 //RX_FDEQ_BIN_10 +231 0x0000 //RX_FDEQ_BIN_11 +232 0x0000 //RX_FDEQ_BIN_12 +233 0x0000 //RX_FDEQ_BIN_13 +234 0x0000 //RX_FDEQ_BIN_14 +235 0x0000 //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x0000 //RX_FDEQ_RESRV_0 +245 0x0000 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0030 //RX_FDDRC_BAND_MARGIN_1 +248 0x0050 //RX_FDDRC_BAND_MARGIN_2 +249 0x0080 //RX_FDDRC_BAND_MARGIN_3 +250 0x0004 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x5000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x6400 //RX_FDDRC_THRD_3_2 +258 0x6400 //RX_FDDRC_THRD_3_3 +259 0x2000 //RX_FDDRC_SLANT_0_0 +260 0x2000 //RX_FDDRC_SLANT_0_1 +261 0x2000 //RX_FDDRC_SLANT_0_2 +262 0x2000 //RX_FDDRC_SLANT_0_3 +263 0x2000 //RX_FDDRC_SLANT_1_0 +264 0x2000 //RX_FDDRC_SLANT_1_1 +265 0x2000 //RX_FDDRC_SLANT_1_2 +266 0x2000 //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +286 0x0100 //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 +#VOL 3 +163 0x3000 //RX_TDDRC_ALPHA_UP_1 +164 0x3000 //RX_TDDRC_ALPHA_UP_2 +165 0x3000 //RX_TDDRC_ALPHA_UP_3 +166 0x3000 //RX_TDDRC_ALPHA_UP_4 +184 0x7FB0 //RX_TDDRC_ALPHA_DWN_1 +185 0x7FB0 //RX_TDDRC_ALPHA_DWN_2 +186 0x7FB0 //RX_TDDRC_ALPHA_DWN_3 +189 0x7FB0 //RX_TDDRC_ALPHA_DWN_4 +190 0xDA9E //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +269 0x0000 //RX_TDDRC_THRD_0 +270 0x0000 //RX_TDDRC_THRD_1 +271 0x0E80 //RX_TDDRC_THRD_2 +272 0x3800 //RX_TDDRC_THRD_3 +273 0x2A00 //RX_TDDRC_SLANT_0 +274 0x6E00 //RX_TDDRC_SLANT_1 +275 0x3000 //RX_TDDRC_ALPHA_UP_0 +276 0x7FB0 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x0000 //RX_TDDRC_HMNC_GAIN +279 0x0000 //RX_TDDRC_SMT_FLAG +280 0x0000 //RX_TDDRC_SMT_W +281 0x0100 //RX_TDDRC_DRC_GAIN +195 0x0020 //RX_FDEQ_SUBNUM +196 0x4848 //RX_FDEQ_GAIN_0 +197 0x4848 //RX_FDEQ_GAIN_1 +198 0x4848 //RX_FDEQ_GAIN_2 +199 0x4848 //RX_FDEQ_GAIN_3 +200 0x4848 //RX_FDEQ_GAIN_4 +201 0x4848 //RX_FDEQ_GAIN_5 +202 0x4848 //RX_FDEQ_GAIN_6 +203 0x4848 //RX_FDEQ_GAIN_7 +204 0x4848 //RX_FDEQ_GAIN_8 +205 0x4848 //RX_FDEQ_GAIN_9 +206 0x4848 //RX_FDEQ_GAIN_10 +207 0x4848 //RX_FDEQ_GAIN_11 +208 0x4848 //RX_FDEQ_GAIN_12 +209 0x4848 //RX_FDEQ_GAIN_13 +210 0x4848 //RX_FDEQ_GAIN_14 +211 0x4848 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0000 //RX_FDEQ_BIN_0 +221 0x0000 //RX_FDEQ_BIN_1 +222 0x0000 //RX_FDEQ_BIN_2 +223 0x0000 //RX_FDEQ_BIN_3 +224 0x0000 //RX_FDEQ_BIN_4 +225 0x0000 //RX_FDEQ_BIN_5 +226 0x0000 //RX_FDEQ_BIN_6 +227 0x0000 //RX_FDEQ_BIN_7 +228 0x0000 //RX_FDEQ_BIN_8 +229 0x0000 //RX_FDEQ_BIN_9 +230 0x0000 //RX_FDEQ_BIN_10 +231 0x0000 //RX_FDEQ_BIN_11 +232 0x0000 //RX_FDEQ_BIN_12 +233 0x0000 //RX_FDEQ_BIN_13 +234 0x0000 //RX_FDEQ_BIN_14 +235 0x0000 //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x0000 //RX_FDEQ_RESRV_0 +245 0x0000 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0030 //RX_FDDRC_BAND_MARGIN_1 +248 0x0050 //RX_FDDRC_BAND_MARGIN_2 +249 0x0080 //RX_FDDRC_BAND_MARGIN_3 +250 0x0004 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x5000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x6400 //RX_FDDRC_THRD_3_2 +258 0x6400 //RX_FDDRC_THRD_3_3 +259 0x2000 //RX_FDDRC_SLANT_0_0 +260 0x2000 //RX_FDDRC_SLANT_0_1 +261 0x2000 //RX_FDDRC_SLANT_0_2 +262 0x2000 //RX_FDDRC_SLANT_0_3 +263 0x2000 //RX_FDDRC_SLANT_1_0 +264 0x2000 //RX_FDDRC_SLANT_1_1 +265 0x2000 //RX_FDDRC_SLANT_1_2 +266 0x2000 //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +286 0x0100 //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 +#VOL 4 +163 0x3000 //RX_TDDRC_ALPHA_UP_1 +164 0x3000 //RX_TDDRC_ALPHA_UP_2 +165 0x3000 //RX_TDDRC_ALPHA_UP_3 +166 0x3000 //RX_TDDRC_ALPHA_UP_4 +184 0x7FB0 //RX_TDDRC_ALPHA_DWN_1 +185 0x7FB0 //RX_TDDRC_ALPHA_DWN_2 +186 0x7FB0 //RX_TDDRC_ALPHA_DWN_3 +189 0x7FB0 //RX_TDDRC_ALPHA_DWN_4 +190 0xDA9E //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +269 0x0000 //RX_TDDRC_THRD_0 +270 0x0000 //RX_TDDRC_THRD_1 +271 0x0E80 //RX_TDDRC_THRD_2 +272 0x3800 //RX_TDDRC_THRD_3 +273 0x2A00 //RX_TDDRC_SLANT_0 +274 0x6E00 //RX_TDDRC_SLANT_1 +275 0x3000 //RX_TDDRC_ALPHA_UP_0 +276 0x7FB0 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x0000 //RX_TDDRC_HMNC_GAIN +279 0x0000 //RX_TDDRC_SMT_FLAG +280 0x0000 //RX_TDDRC_SMT_W +281 0x0100 //RX_TDDRC_DRC_GAIN +195 0x0020 //RX_FDEQ_SUBNUM +196 0x4848 //RX_FDEQ_GAIN_0 +197 0x4848 //RX_FDEQ_GAIN_1 +198 0x4848 //RX_FDEQ_GAIN_2 +199 0x4848 //RX_FDEQ_GAIN_3 +200 0x4848 //RX_FDEQ_GAIN_4 +201 0x4848 //RX_FDEQ_GAIN_5 +202 0x4848 //RX_FDEQ_GAIN_6 +203 0x4848 //RX_FDEQ_GAIN_7 +204 0x4848 //RX_FDEQ_GAIN_8 +205 0x4848 //RX_FDEQ_GAIN_9 +206 0x4848 //RX_FDEQ_GAIN_10 +207 0x4848 //RX_FDEQ_GAIN_11 +208 0x4848 //RX_FDEQ_GAIN_12 +209 0x4848 //RX_FDEQ_GAIN_13 +210 0x4848 //RX_FDEQ_GAIN_14 +211 0x4848 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0000 //RX_FDEQ_BIN_0 +221 0x0000 //RX_FDEQ_BIN_1 +222 0x0000 //RX_FDEQ_BIN_2 +223 0x0000 //RX_FDEQ_BIN_3 +224 0x0000 //RX_FDEQ_BIN_4 +225 0x0000 //RX_FDEQ_BIN_5 +226 0x0000 //RX_FDEQ_BIN_6 +227 0x0000 //RX_FDEQ_BIN_7 +228 0x0000 //RX_FDEQ_BIN_8 +229 0x0000 //RX_FDEQ_BIN_9 +230 0x0000 //RX_FDEQ_BIN_10 +231 0x0000 //RX_FDEQ_BIN_11 +232 0x0000 //RX_FDEQ_BIN_12 +233 0x0000 //RX_FDEQ_BIN_13 +234 0x0000 //RX_FDEQ_BIN_14 +235 0x0000 //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x0000 //RX_FDEQ_RESRV_0 +245 0x0000 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0030 //RX_FDDRC_BAND_MARGIN_1 +248 0x0050 //RX_FDDRC_BAND_MARGIN_2 +249 0x0080 //RX_FDDRC_BAND_MARGIN_3 +250 0x0004 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x5000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x6400 //RX_FDDRC_THRD_3_2 +258 0x6400 //RX_FDDRC_THRD_3_3 +259 0x2000 //RX_FDDRC_SLANT_0_0 +260 0x2000 //RX_FDDRC_SLANT_0_1 +261 0x2000 //RX_FDDRC_SLANT_0_2 +262 0x2000 //RX_FDDRC_SLANT_0_3 +263 0x2000 //RX_FDDRC_SLANT_1_0 +264 0x2000 //RX_FDDRC_SLANT_1_1 +265 0x2000 //RX_FDDRC_SLANT_1_2 +266 0x2000 //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +286 0x0100 //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 +#VOL 5 +163 0x3000 //RX_TDDRC_ALPHA_UP_1 +164 0x3000 //RX_TDDRC_ALPHA_UP_2 +165 0x3000 //RX_TDDRC_ALPHA_UP_3 +166 0x3000 //RX_TDDRC_ALPHA_UP_4 +184 0x7FB0 //RX_TDDRC_ALPHA_DWN_1 +185 0x7FB0 //RX_TDDRC_ALPHA_DWN_2 +186 0x7FB0 //RX_TDDRC_ALPHA_DWN_3 +189 0x7FB0 //RX_TDDRC_ALPHA_DWN_4 +190 0xDA9E //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +269 0x0000 //RX_TDDRC_THRD_0 +270 0x0000 //RX_TDDRC_THRD_1 +271 0x0E80 //RX_TDDRC_THRD_2 +272 0x3800 //RX_TDDRC_THRD_3 +273 0x2A00 //RX_TDDRC_SLANT_0 +274 0x6E00 //RX_TDDRC_SLANT_1 +275 0x3000 //RX_TDDRC_ALPHA_UP_0 +276 0x7FB0 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x0000 //RX_TDDRC_HMNC_GAIN +279 0x0000 //RX_TDDRC_SMT_FLAG +280 0x0000 //RX_TDDRC_SMT_W +281 0x0100 //RX_TDDRC_DRC_GAIN +195 0x0020 //RX_FDEQ_SUBNUM +196 0x4848 //RX_FDEQ_GAIN_0 +197 0x4848 //RX_FDEQ_GAIN_1 +198 0x4848 //RX_FDEQ_GAIN_2 +199 0x4848 //RX_FDEQ_GAIN_3 +200 0x4848 //RX_FDEQ_GAIN_4 +201 0x4848 //RX_FDEQ_GAIN_5 +202 0x4848 //RX_FDEQ_GAIN_6 +203 0x4848 //RX_FDEQ_GAIN_7 +204 0x4848 //RX_FDEQ_GAIN_8 +205 0x4848 //RX_FDEQ_GAIN_9 +206 0x4848 //RX_FDEQ_GAIN_10 +207 0x4848 //RX_FDEQ_GAIN_11 +208 0x4848 //RX_FDEQ_GAIN_12 +209 0x4848 //RX_FDEQ_GAIN_13 +210 0x4848 //RX_FDEQ_GAIN_14 +211 0x4848 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0000 //RX_FDEQ_BIN_0 +221 0x0000 //RX_FDEQ_BIN_1 +222 0x0000 //RX_FDEQ_BIN_2 +223 0x0000 //RX_FDEQ_BIN_3 +224 0x0000 //RX_FDEQ_BIN_4 +225 0x0000 //RX_FDEQ_BIN_5 +226 0x0000 //RX_FDEQ_BIN_6 +227 0x0000 //RX_FDEQ_BIN_7 +228 0x0000 //RX_FDEQ_BIN_8 +229 0x0000 //RX_FDEQ_BIN_9 +230 0x0000 //RX_FDEQ_BIN_10 +231 0x0000 //RX_FDEQ_BIN_11 +232 0x0000 //RX_FDEQ_BIN_12 +233 0x0000 //RX_FDEQ_BIN_13 +234 0x0000 //RX_FDEQ_BIN_14 +235 0x0000 //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x0000 //RX_FDEQ_RESRV_0 +245 0x0000 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0030 //RX_FDDRC_BAND_MARGIN_1 +248 0x0050 //RX_FDDRC_BAND_MARGIN_2 +249 0x0080 //RX_FDDRC_BAND_MARGIN_3 +250 0x0004 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x5000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x6400 //RX_FDDRC_THRD_3_2 +258 0x6400 //RX_FDDRC_THRD_3_3 +259 0x2000 //RX_FDDRC_SLANT_0_0 +260 0x2000 //RX_FDDRC_SLANT_0_1 +261 0x2000 //RX_FDDRC_SLANT_0_2 +262 0x2000 //RX_FDDRC_SLANT_0_3 +263 0x2000 //RX_FDDRC_SLANT_1_0 +264 0x2000 //RX_FDDRC_SLANT_1_1 +265 0x2000 //RX_FDDRC_SLANT_1_2 +266 0x2000 //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +286 0x0100 //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 +#VOL 6 +163 0x3000 //RX_TDDRC_ALPHA_UP_1 +164 0x3000 //RX_TDDRC_ALPHA_UP_2 +165 0x3000 //RX_TDDRC_ALPHA_UP_3 +166 0x3000 //RX_TDDRC_ALPHA_UP_4 +184 0x7FB0 //RX_TDDRC_ALPHA_DWN_1 +185 0x7FB0 //RX_TDDRC_ALPHA_DWN_2 +186 0x7FB0 //RX_TDDRC_ALPHA_DWN_3 +189 0x7FB0 //RX_TDDRC_ALPHA_DWN_4 +190 0xDA9E //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +269 0x0000 //RX_TDDRC_THRD_0 +270 0x0000 //RX_TDDRC_THRD_1 +271 0x0E80 //RX_TDDRC_THRD_2 +272 0x3800 //RX_TDDRC_THRD_3 +273 0x2A00 //RX_TDDRC_SLANT_0 +274 0x6E00 //RX_TDDRC_SLANT_1 +275 0x3000 //RX_TDDRC_ALPHA_UP_0 +276 0x7FB0 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x0000 //RX_TDDRC_HMNC_GAIN +279 0x0000 //RX_TDDRC_SMT_FLAG +280 0x0000 //RX_TDDRC_SMT_W +281 0x0100 //RX_TDDRC_DRC_GAIN +195 0x0020 //RX_FDEQ_SUBNUM +196 0x4848 //RX_FDEQ_GAIN_0 +197 0x4848 //RX_FDEQ_GAIN_1 +198 0x4848 //RX_FDEQ_GAIN_2 +199 0x4848 //RX_FDEQ_GAIN_3 +200 0x4848 //RX_FDEQ_GAIN_4 +201 0x4848 //RX_FDEQ_GAIN_5 +202 0x4848 //RX_FDEQ_GAIN_6 +203 0x4848 //RX_FDEQ_GAIN_7 +204 0x4848 //RX_FDEQ_GAIN_8 +205 0x4848 //RX_FDEQ_GAIN_9 +206 0x4848 //RX_FDEQ_GAIN_10 +207 0x4848 //RX_FDEQ_GAIN_11 +208 0x4848 //RX_FDEQ_GAIN_12 +209 0x4848 //RX_FDEQ_GAIN_13 +210 0x4848 //RX_FDEQ_GAIN_14 +211 0x4848 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0000 //RX_FDEQ_BIN_0 +221 0x0000 //RX_FDEQ_BIN_1 +222 0x0000 //RX_FDEQ_BIN_2 +223 0x0000 //RX_FDEQ_BIN_3 +224 0x0000 //RX_FDEQ_BIN_4 +225 0x0000 //RX_FDEQ_BIN_5 +226 0x0000 //RX_FDEQ_BIN_6 +227 0x0000 //RX_FDEQ_BIN_7 +228 0x0000 //RX_FDEQ_BIN_8 +229 0x0000 //RX_FDEQ_BIN_9 +230 0x0000 //RX_FDEQ_BIN_10 +231 0x0000 //RX_FDEQ_BIN_11 +232 0x0000 //RX_FDEQ_BIN_12 +233 0x0000 //RX_FDEQ_BIN_13 +234 0x0000 //RX_FDEQ_BIN_14 +235 0x0000 //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x0000 //RX_FDEQ_RESRV_0 +245 0x0000 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0030 //RX_FDDRC_BAND_MARGIN_1 +248 0x0050 //RX_FDDRC_BAND_MARGIN_2 +249 0x0080 //RX_FDDRC_BAND_MARGIN_3 +250 0x0004 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x5000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x6400 //RX_FDDRC_THRD_3_2 +258 0x6400 //RX_FDDRC_THRD_3_3 +259 0x2000 //RX_FDDRC_SLANT_0_0 +260 0x2000 //RX_FDDRC_SLANT_0_1 +261 0x2000 //RX_FDDRC_SLANT_0_2 +262 0x2000 //RX_FDDRC_SLANT_0_3 +263 0x2000 //RX_FDDRC_SLANT_1_0 +264 0x2000 //RX_FDDRC_SLANT_1_1 +265 0x2000 //RX_FDDRC_SLANT_1_2 +266 0x2000 //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +286 0x0100 //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 diff --git a/audio/panther/config/audio_platform_configuration.xml b/audio/panther/config/audio_platform_configuration.xml index b7f4265..0b204f6 100644 --- a/audio/panther/config/audio_platform_configuration.xml +++ b/audio/panther/config/audio_platform_configuration.xml @@ -187,7 +187,7 @@ - + @@ -286,7 +286,7 @@ - + diff --git a/audio/panther/config/mixer_paths.xml b/audio/panther/config/mixer_paths.xml index 43e9034..0063f1d 100644 --- a/audio/panther/config/mixer_paths.xml +++ b/audio/panther/config/mixer_paths.xml @@ -604,7 +604,7 @@ - + @@ -634,6 +634,10 @@ + + + + diff --git a/audio/panther/tuning/fortemedia/BLUETOOTH.dat b/audio/panther/tuning/fortemedia/BLUETOOTH.dat index 722b835..04a8e1b 100644 Binary files a/audio/panther/tuning/fortemedia/BLUETOOTH.dat and b/audio/panther/tuning/fortemedia/BLUETOOTH.dat differ diff --git a/audio/panther/tuning/fortemedia/BLUETOOTH.mods b/audio/panther/tuning/fortemedia/BLUETOOTH.mods index 21cd874..c2f94a8 100644 --- a/audio/panther/tuning/fortemedia/BLUETOOTH.mods +++ b/audio/panther/tuning/fortemedia/BLUETOOTH.mods @@ -1,11 +1,12 @@ #PLATFORM_NAME gChip #EXPORT_FLAG BLUETOOTH -#SINGLE_API_VER 1.1.6 -#SAVE_TIME 2021-08-20 16:32:53 +#SINGLE_API_VER 1.2.0 +#SAVE_TIME 2022-02-11 16:24:43 #CASE_NAME BLUETOOTH-RESERVE1-VOICE_GENERIC-FB -#PARAM_TYPE TX+RX -#TOTAL_CUSTOM_STEP 7 +#PARAM_MODE FULL +#PARAM_TYPE TX+2RX +#TOTAL_CUSTOM_STEP 7+7 #TX 0 0x0001 //TX_OPERATION_MODE_0 1 0x0000 //TX_OPERATION_MODE_1 @@ -258,12 +259,12 @@ 248 0xF800 //TX_THR_SN_EST_6 249 0xF800 //TX_THR_SN_EST_7 250 0x0100 //TX_DELTA_THR_SN_EST_0 -251 0x0000 //TX_DELTA_THR_SN_EST_1 +251 0x0100 //TX_DELTA_THR_SN_EST_1 252 0x0100 //TX_DELTA_THR_SN_EST_2 -253 0x0100 //TX_DELTA_THR_SN_EST_3 +253 0x0200 //TX_DELTA_THR_SN_EST_3 254 0x0200 //TX_DELTA_THR_SN_EST_4 255 0x0200 //TX_DELTA_THR_SN_EST_5 -256 0x0200 //TX_DELTA_THR_SN_EST_6 +256 0x0000 //TX_DELTA_THR_SN_EST_6 257 0x0200 //TX_DELTA_THR_SN_EST_7 258 0x4000 //TX_LAMBDA_NN_EST_0 259 0x4000 //TX_LAMBDA_NN_EST_1 @@ -289,12 +290,12 @@ 279 0x0000 //TX_B_POST_FLT_0 280 0x0000 //TX_B_POST_FLT_1 281 0x001A //TX_NS_LVL_CTRL_0 -282 0x001A //TX_NS_LVL_CTRL_1 +282 0x0014 //TX_NS_LVL_CTRL_1 283 0x0014 //TX_NS_LVL_CTRL_2 -284 0x0014 //TX_NS_LVL_CTRL_3 +284 0x000C //TX_NS_LVL_CTRL_3 285 0x000C //TX_NS_LVL_CTRL_4 286 0x000C //TX_NS_LVL_CTRL_5 -287 0x000C //TX_NS_LVL_CTRL_6 +287 0x001A //TX_NS_LVL_CTRL_6 288 0x000C //TX_NS_LVL_CTRL_7 289 0x000E //TX_MIN_GAIN_S_0 290 0x0014 //TX_MIN_GAIN_S_1 @@ -310,10 +311,10 @@ 300 0x7FFF //TX_SNRI_SUP_0 301 0x7FFF //TX_SNRI_SUP_1 302 0x7FFF //TX_SNRI_SUP_2 -303 0x7FFF //TX_SNRI_SUP_3 +303 0x4000 //TX_SNRI_SUP_3 304 0x4000 //TX_SNRI_SUP_4 305 0x4000 //TX_SNRI_SUP_5 -306 0x4000 //TX_SNRI_SUP_6 +306 0x7FFF //TX_SNRI_SUP_6 307 0x4000 //TX_SNRI_SUP_7 308 0x1200 //TX_THR_LFNS 309 0x0028 //TX_G_LFNS @@ -322,12 +323,12 @@ 312 0x7FFF //TX_A_POST_FILT_0 313 0x7FFF //TX_A_POST_FILT_1 314 0x4000 //TX_A_POST_FILT_S_0 -315 0x199A //TX_A_POST_FILT_S_1 +315 0x1000 //TX_A_POST_FILT_S_1 316 0x1000 //TX_A_POST_FILT_S_2 -317 0x1000 //TX_A_POST_FILT_S_3 +317 0x6666 //TX_A_POST_FILT_S_3 318 0x6666 //TX_A_POST_FILT_S_4 319 0x6666 //TX_A_POST_FILT_S_5 -320 0x6666 //TX_A_POST_FILT_S_6 +320 0x199A //TX_A_POST_FILT_S_6 321 0x6666 //TX_A_POST_FILT_S_7 322 0x2000 //TX_B_POST_FILT_0 323 0x2000 //TX_B_POST_FILT_1 @@ -387,10 +388,10 @@ 377 0x7FFF //TX_NOISE_TH_5_4 378 0x00C8 //TX_NOISE_TH_6 379 0x000A //TX_MINENOISE_TH -380 0x0000 //TX_MINENOISE_MIC0_TH_MTS -381 0x0000 //TX_MINENOISE_MIC0_TH_EXP -382 0x0000 //TX_MINENOISE_MIC0_S_TH_MTS -383 0x0000 //TX_MINENOISE_MIC0_S_TH_EXP +380 0x0000 //TX_MORENS_TFMASK_TH +381 0x0000 //TX_DRC_QUIET_FLOOR +382 0x0000 //TX_RATIODTL_CUT_TH +383 0x0000 //TX_DT_CUT_K1 384 0x0640 //TX_OUT_ENER_S_TH_CLEAN 385 0x0640 //TX_OUT_ENER_S_TH_LESSCLEAN 386 0x0640 //TX_OUT_ENER_S_TH_NOISY @@ -398,15 +399,15 @@ 388 0x07D0 //TX_OUT_ENER_TH_SPEECH 389 0x0000 //TX_SN_NPB_GAIN 390 0x0000 //TX_NN_NPB_GAIN -391 0x0000 //TX_CSX_ALPHA_0 -392 0x0000 //TX_CSX_ALPHA_1 -393 0x0000 //TX_CSX_ALPHA_2 -394 0x0000 //TX_CSX_ALPHA_3 -395 0x0000 //TX_MU_ARSP_EST -396 0x0000 //TX_P_OUTBEAM_MIN_TH +391 0x0000 //TX_POST_MASK_SUP_HSNE +392 0x0000 //TX_TAIL_DET_TH +393 0x0000 //TX_B_LESSCUT_RTO_WTA +394 0x0000 //TX_MEL_G_R +395 0x0000 //TX_SUPHIGH_TH +396 0x0000 //TX_MASK_G_R 397 0x0000 //TX_EXTRA_NS_L -398 0x0000 //TX_EXTRA_NS_A -399 0x0000 //TX_VR_NOISE_FLOOR_TH +398 0x0000 //TX_C_POST_FLT_MASK +399 0x0000 //TX_A_POST_FLT_WNS 400 0x0000 //TX_MIN_G_LOW300HZ 401 0x0010 //TX_MAXLEVEL_CNG 402 0x0000 //TX_STN_NOISE_TH @@ -521,16 +522,16 @@ 511 0x6666 //TX_MIC_TO_BFGAIN 512 0x6666 //TX_MICTOBFGAIN0 513 0x0014 //TX_FASTMUE_TH -514 0x0000 //TX_DERVB_LEN_0 -515 0x0000 //TX_DERVB_LEN_1 -516 0x0000 //TX_RHO_DERVB -517 0x0000 //TX_MIC_INDX_DERVB -518 0x0000 //TX_MU_DERVB -519 0x0000 //TX_DR_RESRV_0 -520 0x0000 //TX_DR_RESRV_1 -521 0x0000 //TX_DR_RESRV_2 -522 0x0000 //TX_DR_RESRV_3 -523 0x0000 //TX_DR_RESRV_4 +514 0x0000 //TX_DEREVERB_LF_MU +515 0x0000 //TX_DEREVERB_HF_MU +516 0x0000 //TX_DEREVERB_DELAY +517 0x0000 //TX_DEREVERB_COEF_LEN +518 0x0000 //TX_DEREVERB_DNR +519 0x0000 //TX_DEREVERB_ALPHA +520 0x0000 //TX_DEREVERB_BETA +521 0x0000 //TX_GSC_RTOL_TH +522 0x0000 //TX_GSC_RTOH_TH +523 0x0000 //TX_WIDE2_MEANHTH 524 0x0000 //TX_DR_RESRV_5 525 0x0000 //TX_DR_RESRV_6 526 0x0000 //TX_DR_RESRV_7 @@ -904,6 +905,71 @@ 894 0xC000 //TX_FASTNS_SSA_THHFL 895 0xCCCC //TX_FASTNS_SSA_THLFH 896 0xD999 //TX_FASTNS_SSA_THHFH +897 0x0000 //TX_SENDFUNC_REG_MICMUTE +898 0x0000 //TX_SENDFUNC_REG_MICMUTE1 +899 0x0000 //TX_MICMUTE_RATIO_THR +900 0x0000 //TX_MICMUTE_AMP_THR +901 0x0000 //TX_MICMUTE_HPF_IND +902 0x0000 //TX_MICMUTE_LOG_EYR_TH +903 0x0000 //TX_MICMUTE_CVG_TIME +904 0x0000 //TX_MICMUTE_RELEASE_TIME +905 0x0000 //TX_MIC_VOLUME_MIC0MUTE +906 0x0000 //TX_MICMUTE_EPD_OFFSET_0 +907 0x0000 //TX_MICMUTE_FRQ_AEC_L +908 0x0000 //TX_MICMUTE_EAD_THR +909 0x0000 //TX_MICMUTE_LAMBDA_CB_NLE +910 0x0000 //TX_MICMUTE_LAMBDA_RE_EST +911 0x0000 //TX_DTD_THR1_MICMUTE_0 +912 0x0000 //TX_DTD_THR1_MICMUTE_1 +913 0x0000 //TX_DTD_THR1_MICMUTE_2 +914 0x0000 //TX_DTD_THR1_MICMUTE_3 +915 0x0000 //TX_DTD_THR2_MICMUTE_0 +916 0x0000 //TX_MICMUTE_MIN_EQ_RE_EST_0 +917 0x0000 //TX_MICMUTE_MIN_EQ_RE_EST_1 +918 0x0000 //TX_MICMUTE_MIN_EQ_RE_EST_2 +919 0x0000 //TX_MICMUTE_MIN_EQ_RE_EST_3 +920 0x0000 //TX_MICMUTE_MIN_EQ_RE_EST_4 +921 0x0000 //TX_MICMUTE_C_POST_FLT +922 0x0000 //TX_MICMUTE_DT_CUT_K +923 0x0000 //TX_MICMUTE_DT_CUT_THR +924 0x0000 //TX_MICMUTE_DT_CUT_K2 +925 0x0000 //TX_MICMUTE_DT_CUT_THR2 +926 0x0000 //TX_MICMUTE_DT2_HOLD_N +927 0x0000 //TX_MICMUTE_RATIODTH_THCUT +928 0x0000 //TX_MICMUTE_B_POST_FLT_ECHOL +929 0x0000 //TX_MICMUTE_B_POST_FLT_ECHOH +930 0x0000 //TX_MICMUTE_C_POST_FLT_MASK +931 0x0000 //TX_MICMUTE_RATIODTL_CUT_TH +932 0x0000 //TX_MICMUTE_DT_CUT_K1 +933 0x0000 //TX_MICMUTE_N2_SN_EST +934 0x0000 //TX_MICMUTE_THR_SN_EST_0 +935 0x0000 //TX_MICMUTE_MIN_G_CTRL_0 +936 0x0000 //TX_MICMUTE_A_POST_FILT_S_0 +937 0x0000 //TX_MICMUTE_B_POST_FILT_0 +938 0x0000 //TX_MIC1RUB_AMP_THR +939 0x0000 //TX_MIC1MUTE_RATIO_THR +940 0x0000 //TX_MIC1MUTE_AMP_THR +941 0x0000 //TX_MIC1MUTE_CVG_TIME +942 0x0000 //TX_MIC1MUTE_RELEASE_TIME +943 0x0000 //TX_AMS_RESRV_01 +944 0x0000 //TX_AMS_RESRV_02 +945 0x0000 //TX_AMS_RESRV_03 +946 0x0000 //TX_AMS_RESRV_04 +947 0x0000 //TX_AMS_RESRV_05 +948 0x0000 //TX_AMS_RESRV_06 +949 0x0000 //TX_AMS_RESRV_07 +950 0x0000 //TX_AMS_RESRV_08 +951 0x0000 //TX_AMS_RESRV_09 +952 0x0000 //TX_AMS_RESRV_10 +953 0x0000 //TX_AMS_RESRV_11 +954 0x0000 //TX_AMS_RESRV_12 +955 0x0000 //TX_AMS_RESRV_13 +956 0x0000 //TX_AMS_RESRV_14 +957 0x0000 //TX_AMS_RESRV_15 +958 0x0000 //TX_AMS_RESRV_16 +959 0x0000 //TX_AMS_RESRV_17 +960 0x0000 //TX_AMS_RESRV_18 +961 0x0000 //TX_AMS_RESRV_19 #RX 0 0x0000 //RX_RECVFUNC_MODE_0 1 0x0000 //RX_RECVFUNC_MODE_1 @@ -1755,10 +1821,862 @@ 110 0x0000 //RX_FDDRC_RESRV_0 129 0x0100 //RX_SPK_VOL 130 0x0000 //RX_VOL_RESRV_0 +#RX 2 +157 0x0000 //RX_RECVFUNC_MODE_0 +158 0x0000 //RX_RECVFUNC_MODE_1 +159 0x0000 //RX_SAMPLINGFREQ_SIG +160 0x0000 //RX_SAMPLINGFREQ_PROC +161 0x000A //RX_FRAME_SZ +162 0x0000 //RX_DELAY_OPT +163 0x3000 //RX_TDDRC_ALPHA_UP_1 +164 0x3000 //RX_TDDRC_ALPHA_UP_2 +165 0x3000 //RX_TDDRC_ALPHA_UP_3 +166 0x3000 //RX_TDDRC_ALPHA_UP_4 +167 0x0800 //RX_PGA +168 0x7652 //RX_A_HP +169 0x4000 //RX_B_PE +170 0x7800 //RX_THR_PITCH_DET_0 +171 0x7000 //RX_THR_PITCH_DET_1 +172 0x6000 //RX_THR_PITCH_DET_2 +173 0x0000 //RX_PITCH_BFR_LEN +174 0x0000 //RX_SBD_PITCH_DET +175 0x0000 //RX_PP_RESRV_0 +176 0x0000 //RX_PP_RESRV_1 +177 0xF800 //RX_N_SN_EST +178 0x0000 //RX_N2_SN_EST +179 0x000F //RX_NS_LVL_CTRL +180 0xF800 //RX_THR_SN_EST +181 0x7E00 //RX_LAMBDA_PFILT +182 0x000A //RX_FENS_RESRV_0 +183 0x0000 //RX_FENS_RESRV_1 +184 0x7FB0 //RX_TDDRC_ALPHA_DWN_1 +185 0x7FB0 //RX_TDDRC_ALPHA_DWN_2 +186 0x7FB0 //RX_TDDRC_ALPHA_DWN_3 +187 0x0000 //RX_EXTRA_NS_L +188 0x0000 //RX_EXTRA_NS_A +189 0x7FB0 //RX_TDDRC_ALPHA_DWN_4 +190 0x65AD //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +192 0x0000 //RX_A_POST_FLT +193 0x0000 //RX_LMT_THRD +194 0x4000 //RX_LMT_ALPHA +195 0x0020 //RX_FDEQ_SUBNUM +196 0x4848 //RX_FDEQ_GAIN_0 +197 0x4848 //RX_FDEQ_GAIN_1 +198 0x4848 //RX_FDEQ_GAIN_2 +199 0x4848 //RX_FDEQ_GAIN_3 +200 0x4848 //RX_FDEQ_GAIN_4 +201 0x4848 //RX_FDEQ_GAIN_5 +202 0x4848 //RX_FDEQ_GAIN_6 +203 0x4848 //RX_FDEQ_GAIN_7 +204 0x4848 //RX_FDEQ_GAIN_8 +205 0x4848 //RX_FDEQ_GAIN_9 +206 0x4848 //RX_FDEQ_GAIN_10 +207 0x4848 //RX_FDEQ_GAIN_11 +208 0x4848 //RX_FDEQ_GAIN_12 +209 0x4848 //RX_FDEQ_GAIN_13 +210 0x4848 //RX_FDEQ_GAIN_14 +211 0x4848 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0000 //RX_FDEQ_BIN_0 +221 0x0000 //RX_FDEQ_BIN_1 +222 0x0000 //RX_FDEQ_BIN_2 +223 0x0000 //RX_FDEQ_BIN_3 +224 0x0000 //RX_FDEQ_BIN_4 +225 0x0000 //RX_FDEQ_BIN_5 +226 0x0000 //RX_FDEQ_BIN_6 +227 0x0000 //RX_FDEQ_BIN_7 +228 0x0000 //RX_FDEQ_BIN_8 +229 0x0000 //RX_FDEQ_BIN_9 +230 0x0000 //RX_FDEQ_BIN_10 +231 0x0000 //RX_FDEQ_BIN_11 +232 0x0000 //RX_FDEQ_BIN_12 +233 0x0000 //RX_FDEQ_BIN_13 +234 0x0000 //RX_FDEQ_BIN_14 +235 0x0000 //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x0000 //RX_FDEQ_RESRV_0 +245 0x0000 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0030 //RX_FDDRC_BAND_MARGIN_1 +248 0x0050 //RX_FDDRC_BAND_MARGIN_2 +249 0x0080 //RX_FDDRC_BAND_MARGIN_3 +250 0x0004 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x5000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x6400 //RX_FDDRC_THRD_3_2 +258 0x6400 //RX_FDDRC_THRD_3_3 +259 0x2000 //RX_FDDRC_SLANT_0_0 +260 0x2000 //RX_FDDRC_SLANT_0_1 +261 0x2000 //RX_FDDRC_SLANT_0_2 +262 0x2000 //RX_FDDRC_SLANT_0_3 +263 0x2000 //RX_FDDRC_SLANT_1_0 +264 0x2000 //RX_FDDRC_SLANT_1_1 +265 0x2000 //RX_FDDRC_SLANT_1_2 +266 0x2000 //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +268 0x0000 //RX_FILTINDX +269 0x0000 //RX_TDDRC_THRD_0 +270 0x0000 //RX_TDDRC_THRD_1 +271 0x0E80 //RX_TDDRC_THRD_2 +272 0x3800 //RX_TDDRC_THRD_3 +273 0x2A00 //RX_TDDRC_SLANT_0 +274 0x6E00 //RX_TDDRC_SLANT_1 +275 0x3000 //RX_TDDRC_ALPHA_UP_0 +276 0x7FB0 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x0000 //RX_TDDRC_HMNC_GAIN +279 0x0000 //RX_TDDRC_SMT_FLAG +280 0x0000 //RX_TDDRC_SMT_W +281 0x0100 //RX_TDDRC_DRC_GAIN +282 0x7C00 //RX_LAMBDA_PKA_FP +283 0x2000 //RX_TPKA_FP +284 0x0080 //RX_MIN_G_FP +285 0x2000 //RX_MAX_G_FP +286 0x000C //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 +288 0x0010 //RX_MAXLEVEL_CNG +289 0x0000 //RX_BWE_UV_TH +290 0x0000 //RX_BWE_UV_TH2 +291 0x0000 //RX_BWE_UV_TH3 +292 0x0000 //RX_BWE_V_TH +293 0x0000 //RX_BWE_GAIN1_V_TH1 +294 0x0000 //RX_BWE_GAIN1_V_TH2 +295 0x0000 //RX_BWE_UV_EQ +296 0x0000 //RX_BWE_V_EQ +297 0x0000 //RX_BWE_TONE_TH +298 0x0000 //RX_BWE_UV_HOLD_T +299 0x0000 //RX_BWE_GAIN2_ALPHA +300 0x0000 //RX_BWE_GAIN3_ALPHA +301 0x0000 //RX_BWE_CUTOFF +302 0x0000 //RX_BWE_GAINFILL +303 0x0000 //RX_BWE_MAXTH_TONE +304 0x0000 //RX_BWE_EQ_0 +305 0x0000 //RX_BWE_EQ_1 +306 0x0000 //RX_BWE_EQ_2 +307 0x0000 //RX_BWE_EQ_3 +308 0x0000 //RX_BWE_EQ_4 +309 0x0000 //RX_BWE_EQ_5 +310 0x0000 //RX_BWE_EQ_6 +311 0x0000 //RX_BWE_RESRV_0 +312 0x0000 //RX_BWE_RESRV_1 +313 0x0000 //RX_BWE_RESRV_2 +#VOL 0 +163 0x3000 //RX_TDDRC_ALPHA_UP_1 +164 0x3000 //RX_TDDRC_ALPHA_UP_2 +165 0x3000 //RX_TDDRC_ALPHA_UP_3 +166 0x3000 //RX_TDDRC_ALPHA_UP_4 +184 0x7FB0 //RX_TDDRC_ALPHA_DWN_1 +185 0x7FB0 //RX_TDDRC_ALPHA_DWN_2 +186 0x7FB0 //RX_TDDRC_ALPHA_DWN_3 +189 0x7FB0 //RX_TDDRC_ALPHA_DWN_4 +190 0x65AD //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +269 0x0000 //RX_TDDRC_THRD_0 +270 0x0000 //RX_TDDRC_THRD_1 +271 0x0E80 //RX_TDDRC_THRD_2 +272 0x3800 //RX_TDDRC_THRD_3 +273 0x2A00 //RX_TDDRC_SLANT_0 +274 0x6E00 //RX_TDDRC_SLANT_1 +275 0x3000 //RX_TDDRC_ALPHA_UP_0 +276 0x7FB0 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x0000 //RX_TDDRC_HMNC_GAIN +279 0x0000 //RX_TDDRC_SMT_FLAG +280 0x0000 //RX_TDDRC_SMT_W +281 0x0100 //RX_TDDRC_DRC_GAIN +195 0x0020 //RX_FDEQ_SUBNUM +196 0x4848 //RX_FDEQ_GAIN_0 +197 0x4848 //RX_FDEQ_GAIN_1 +198 0x4848 //RX_FDEQ_GAIN_2 +199 0x4848 //RX_FDEQ_GAIN_3 +200 0x4848 //RX_FDEQ_GAIN_4 +201 0x4848 //RX_FDEQ_GAIN_5 +202 0x4848 //RX_FDEQ_GAIN_6 +203 0x4848 //RX_FDEQ_GAIN_7 +204 0x4848 //RX_FDEQ_GAIN_8 +205 0x4848 //RX_FDEQ_GAIN_9 +206 0x4848 //RX_FDEQ_GAIN_10 +207 0x4848 //RX_FDEQ_GAIN_11 +208 0x4848 //RX_FDEQ_GAIN_12 +209 0x4848 //RX_FDEQ_GAIN_13 +210 0x4848 //RX_FDEQ_GAIN_14 +211 0x4848 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0000 //RX_FDEQ_BIN_0 +221 0x0000 //RX_FDEQ_BIN_1 +222 0x0000 //RX_FDEQ_BIN_2 +223 0x0000 //RX_FDEQ_BIN_3 +224 0x0000 //RX_FDEQ_BIN_4 +225 0x0000 //RX_FDEQ_BIN_5 +226 0x0000 //RX_FDEQ_BIN_6 +227 0x0000 //RX_FDEQ_BIN_7 +228 0x0000 //RX_FDEQ_BIN_8 +229 0x0000 //RX_FDEQ_BIN_9 +230 0x0000 //RX_FDEQ_BIN_10 +231 0x0000 //RX_FDEQ_BIN_11 +232 0x0000 //RX_FDEQ_BIN_12 +233 0x0000 //RX_FDEQ_BIN_13 +234 0x0000 //RX_FDEQ_BIN_14 +235 0x0000 //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x0000 //RX_FDEQ_RESRV_0 +245 0x0000 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0030 //RX_FDDRC_BAND_MARGIN_1 +248 0x0050 //RX_FDDRC_BAND_MARGIN_2 +249 0x0080 //RX_FDDRC_BAND_MARGIN_3 +250 0x0004 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x5000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x6400 //RX_FDDRC_THRD_3_2 +258 0x6400 //RX_FDDRC_THRD_3_3 +259 0x2000 //RX_FDDRC_SLANT_0_0 +260 0x2000 //RX_FDDRC_SLANT_0_1 +261 0x2000 //RX_FDDRC_SLANT_0_2 +262 0x2000 //RX_FDDRC_SLANT_0_3 +263 0x2000 //RX_FDDRC_SLANT_1_0 +264 0x2000 //RX_FDDRC_SLANT_1_1 +265 0x2000 //RX_FDDRC_SLANT_1_2 +266 0x2000 //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +286 0x000C //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 +#VOL 1 +163 0x3000 //RX_TDDRC_ALPHA_UP_1 +164 0x3000 //RX_TDDRC_ALPHA_UP_2 +165 0x3000 //RX_TDDRC_ALPHA_UP_3 +166 0x3000 //RX_TDDRC_ALPHA_UP_4 +184 0x7FB0 //RX_TDDRC_ALPHA_DWN_1 +185 0x7FB0 //RX_TDDRC_ALPHA_DWN_2 +186 0x7FB0 //RX_TDDRC_ALPHA_DWN_3 +189 0x7FB0 //RX_TDDRC_ALPHA_DWN_4 +190 0x65AD //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +269 0x0000 //RX_TDDRC_THRD_0 +270 0x0000 //RX_TDDRC_THRD_1 +271 0x0E80 //RX_TDDRC_THRD_2 +272 0x3800 //RX_TDDRC_THRD_3 +273 0x2A00 //RX_TDDRC_SLANT_0 +274 0x6E00 //RX_TDDRC_SLANT_1 +275 0x3000 //RX_TDDRC_ALPHA_UP_0 +276 0x7FB0 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x0000 //RX_TDDRC_HMNC_GAIN +279 0x0000 //RX_TDDRC_SMT_FLAG +280 0x0000 //RX_TDDRC_SMT_W +281 0x0100 //RX_TDDRC_DRC_GAIN +195 0x0020 //RX_FDEQ_SUBNUM +196 0x4848 //RX_FDEQ_GAIN_0 +197 0x4848 //RX_FDEQ_GAIN_1 +198 0x4848 //RX_FDEQ_GAIN_2 +199 0x4848 //RX_FDEQ_GAIN_3 +200 0x4848 //RX_FDEQ_GAIN_4 +201 0x4848 //RX_FDEQ_GAIN_5 +202 0x4848 //RX_FDEQ_GAIN_6 +203 0x4848 //RX_FDEQ_GAIN_7 +204 0x4848 //RX_FDEQ_GAIN_8 +205 0x4848 //RX_FDEQ_GAIN_9 +206 0x4848 //RX_FDEQ_GAIN_10 +207 0x4848 //RX_FDEQ_GAIN_11 +208 0x4848 //RX_FDEQ_GAIN_12 +209 0x4848 //RX_FDEQ_GAIN_13 +210 0x4848 //RX_FDEQ_GAIN_14 +211 0x4848 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0000 //RX_FDEQ_BIN_0 +221 0x0000 //RX_FDEQ_BIN_1 +222 0x0000 //RX_FDEQ_BIN_2 +223 0x0000 //RX_FDEQ_BIN_3 +224 0x0000 //RX_FDEQ_BIN_4 +225 0x0000 //RX_FDEQ_BIN_5 +226 0x0000 //RX_FDEQ_BIN_6 +227 0x0000 //RX_FDEQ_BIN_7 +228 0x0000 //RX_FDEQ_BIN_8 +229 0x0000 //RX_FDEQ_BIN_9 +230 0x0000 //RX_FDEQ_BIN_10 +231 0x0000 //RX_FDEQ_BIN_11 +232 0x0000 //RX_FDEQ_BIN_12 +233 0x0000 //RX_FDEQ_BIN_13 +234 0x0000 //RX_FDEQ_BIN_14 +235 0x0000 //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x0000 //RX_FDEQ_RESRV_0 +245 0x0000 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0030 //RX_FDDRC_BAND_MARGIN_1 +248 0x0050 //RX_FDDRC_BAND_MARGIN_2 +249 0x0080 //RX_FDDRC_BAND_MARGIN_3 +250 0x0004 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x5000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x6400 //RX_FDDRC_THRD_3_2 +258 0x6400 //RX_FDDRC_THRD_3_3 +259 0x2000 //RX_FDDRC_SLANT_0_0 +260 0x2000 //RX_FDDRC_SLANT_0_1 +261 0x2000 //RX_FDDRC_SLANT_0_2 +262 0x2000 //RX_FDDRC_SLANT_0_3 +263 0x2000 //RX_FDDRC_SLANT_1_0 +264 0x2000 //RX_FDDRC_SLANT_1_1 +265 0x2000 //RX_FDDRC_SLANT_1_2 +266 0x2000 //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +286 0x0014 //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 +#VOL 2 +163 0x3000 //RX_TDDRC_ALPHA_UP_1 +164 0x3000 //RX_TDDRC_ALPHA_UP_2 +165 0x3000 //RX_TDDRC_ALPHA_UP_3 +166 0x3000 //RX_TDDRC_ALPHA_UP_4 +184 0x7FB0 //RX_TDDRC_ALPHA_DWN_1 +185 0x7FB0 //RX_TDDRC_ALPHA_DWN_2 +186 0x7FB0 //RX_TDDRC_ALPHA_DWN_3 +189 0x7FB0 //RX_TDDRC_ALPHA_DWN_4 +190 0x65AD //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +269 0x0000 //RX_TDDRC_THRD_0 +270 0x0000 //RX_TDDRC_THRD_1 +271 0x0E80 //RX_TDDRC_THRD_2 +272 0x3800 //RX_TDDRC_THRD_3 +273 0x2A00 //RX_TDDRC_SLANT_0 +274 0x6E00 //RX_TDDRC_SLANT_1 +275 0x3000 //RX_TDDRC_ALPHA_UP_0 +276 0x7FB0 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x0000 //RX_TDDRC_HMNC_GAIN +279 0x0000 //RX_TDDRC_SMT_FLAG +280 0x0000 //RX_TDDRC_SMT_W +281 0x0100 //RX_TDDRC_DRC_GAIN +195 0x0020 //RX_FDEQ_SUBNUM +196 0x4848 //RX_FDEQ_GAIN_0 +197 0x4848 //RX_FDEQ_GAIN_1 +198 0x4848 //RX_FDEQ_GAIN_2 +199 0x4848 //RX_FDEQ_GAIN_3 +200 0x4848 //RX_FDEQ_GAIN_4 +201 0x4848 //RX_FDEQ_GAIN_5 +202 0x4848 //RX_FDEQ_GAIN_6 +203 0x4848 //RX_FDEQ_GAIN_7 +204 0x4848 //RX_FDEQ_GAIN_8 +205 0x4848 //RX_FDEQ_GAIN_9 +206 0x4848 //RX_FDEQ_GAIN_10 +207 0x4848 //RX_FDEQ_GAIN_11 +208 0x4848 //RX_FDEQ_GAIN_12 +209 0x4848 //RX_FDEQ_GAIN_13 +210 0x4848 //RX_FDEQ_GAIN_14 +211 0x4848 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0000 //RX_FDEQ_BIN_0 +221 0x0000 //RX_FDEQ_BIN_1 +222 0x0000 //RX_FDEQ_BIN_2 +223 0x0000 //RX_FDEQ_BIN_3 +224 0x0000 //RX_FDEQ_BIN_4 +225 0x0000 //RX_FDEQ_BIN_5 +226 0x0000 //RX_FDEQ_BIN_6 +227 0x0000 //RX_FDEQ_BIN_7 +228 0x0000 //RX_FDEQ_BIN_8 +229 0x0000 //RX_FDEQ_BIN_9 +230 0x0000 //RX_FDEQ_BIN_10 +231 0x0000 //RX_FDEQ_BIN_11 +232 0x0000 //RX_FDEQ_BIN_12 +233 0x0000 //RX_FDEQ_BIN_13 +234 0x0000 //RX_FDEQ_BIN_14 +235 0x0000 //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x0000 //RX_FDEQ_RESRV_0 +245 0x0000 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0030 //RX_FDDRC_BAND_MARGIN_1 +248 0x0050 //RX_FDDRC_BAND_MARGIN_2 +249 0x0080 //RX_FDDRC_BAND_MARGIN_3 +250 0x0004 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x5000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x6400 //RX_FDDRC_THRD_3_2 +258 0x6400 //RX_FDDRC_THRD_3_3 +259 0x2000 //RX_FDDRC_SLANT_0_0 +260 0x2000 //RX_FDDRC_SLANT_0_1 +261 0x2000 //RX_FDDRC_SLANT_0_2 +262 0x2000 //RX_FDDRC_SLANT_0_3 +263 0x2000 //RX_FDDRC_SLANT_1_0 +264 0x2000 //RX_FDDRC_SLANT_1_1 +265 0x2000 //RX_FDDRC_SLANT_1_2 +266 0x2000 //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +286 0x0021 //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 +#VOL 3 +163 0x3000 //RX_TDDRC_ALPHA_UP_1 +164 0x3000 //RX_TDDRC_ALPHA_UP_2 +165 0x3000 //RX_TDDRC_ALPHA_UP_3 +166 0x3000 //RX_TDDRC_ALPHA_UP_4 +184 0x7FB0 //RX_TDDRC_ALPHA_DWN_1 +185 0x7FB0 //RX_TDDRC_ALPHA_DWN_2 +186 0x7FB0 //RX_TDDRC_ALPHA_DWN_3 +189 0x7FB0 //RX_TDDRC_ALPHA_DWN_4 +190 0x65AD //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +269 0x0000 //RX_TDDRC_THRD_0 +270 0x0000 //RX_TDDRC_THRD_1 +271 0x0E80 //RX_TDDRC_THRD_2 +272 0x3800 //RX_TDDRC_THRD_3 +273 0x2A00 //RX_TDDRC_SLANT_0 +274 0x6E00 //RX_TDDRC_SLANT_1 +275 0x3000 //RX_TDDRC_ALPHA_UP_0 +276 0x7FB0 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x0000 //RX_TDDRC_HMNC_GAIN +279 0x0000 //RX_TDDRC_SMT_FLAG +280 0x0000 //RX_TDDRC_SMT_W +281 0x0100 //RX_TDDRC_DRC_GAIN +195 0x0020 //RX_FDEQ_SUBNUM +196 0x4848 //RX_FDEQ_GAIN_0 +197 0x4848 //RX_FDEQ_GAIN_1 +198 0x4848 //RX_FDEQ_GAIN_2 +199 0x4848 //RX_FDEQ_GAIN_3 +200 0x4848 //RX_FDEQ_GAIN_4 +201 0x4848 //RX_FDEQ_GAIN_5 +202 0x4848 //RX_FDEQ_GAIN_6 +203 0x4848 //RX_FDEQ_GAIN_7 +204 0x4848 //RX_FDEQ_GAIN_8 +205 0x4848 //RX_FDEQ_GAIN_9 +206 0x4848 //RX_FDEQ_GAIN_10 +207 0x4848 //RX_FDEQ_GAIN_11 +208 0x4848 //RX_FDEQ_GAIN_12 +209 0x4848 //RX_FDEQ_GAIN_13 +210 0x4848 //RX_FDEQ_GAIN_14 +211 0x4848 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0000 //RX_FDEQ_BIN_0 +221 0x0000 //RX_FDEQ_BIN_1 +222 0x0000 //RX_FDEQ_BIN_2 +223 0x0000 //RX_FDEQ_BIN_3 +224 0x0000 //RX_FDEQ_BIN_4 +225 0x0000 //RX_FDEQ_BIN_5 +226 0x0000 //RX_FDEQ_BIN_6 +227 0x0000 //RX_FDEQ_BIN_7 +228 0x0000 //RX_FDEQ_BIN_8 +229 0x0000 //RX_FDEQ_BIN_9 +230 0x0000 //RX_FDEQ_BIN_10 +231 0x0000 //RX_FDEQ_BIN_11 +232 0x0000 //RX_FDEQ_BIN_12 +233 0x0000 //RX_FDEQ_BIN_13 +234 0x0000 //RX_FDEQ_BIN_14 +235 0x0000 //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x0000 //RX_FDEQ_RESRV_0 +245 0x0000 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0030 //RX_FDDRC_BAND_MARGIN_1 +248 0x0050 //RX_FDDRC_BAND_MARGIN_2 +249 0x0080 //RX_FDDRC_BAND_MARGIN_3 +250 0x0004 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x5000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x6400 //RX_FDDRC_THRD_3_2 +258 0x6400 //RX_FDDRC_THRD_3_3 +259 0x2000 //RX_FDDRC_SLANT_0_0 +260 0x2000 //RX_FDDRC_SLANT_0_1 +261 0x2000 //RX_FDDRC_SLANT_0_2 +262 0x2000 //RX_FDDRC_SLANT_0_3 +263 0x2000 //RX_FDDRC_SLANT_1_0 +264 0x2000 //RX_FDDRC_SLANT_1_1 +265 0x2000 //RX_FDDRC_SLANT_1_2 +266 0x2000 //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +286 0x0037 //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 +#VOL 4 +163 0x3000 //RX_TDDRC_ALPHA_UP_1 +164 0x3000 //RX_TDDRC_ALPHA_UP_2 +165 0x3000 //RX_TDDRC_ALPHA_UP_3 +166 0x3000 //RX_TDDRC_ALPHA_UP_4 +184 0x7FB0 //RX_TDDRC_ALPHA_DWN_1 +185 0x7FB0 //RX_TDDRC_ALPHA_DWN_2 +186 0x7FB0 //RX_TDDRC_ALPHA_DWN_3 +189 0x7FB0 //RX_TDDRC_ALPHA_DWN_4 +190 0x65AD //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +269 0x0000 //RX_TDDRC_THRD_0 +270 0x0000 //RX_TDDRC_THRD_1 +271 0x0E80 //RX_TDDRC_THRD_2 +272 0x3800 //RX_TDDRC_THRD_3 +273 0x2A00 //RX_TDDRC_SLANT_0 +274 0x6E00 //RX_TDDRC_SLANT_1 +275 0x3000 //RX_TDDRC_ALPHA_UP_0 +276 0x7FB0 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x0000 //RX_TDDRC_HMNC_GAIN +279 0x0000 //RX_TDDRC_SMT_FLAG +280 0x0000 //RX_TDDRC_SMT_W +281 0x0100 //RX_TDDRC_DRC_GAIN +195 0x0020 //RX_FDEQ_SUBNUM +196 0x4848 //RX_FDEQ_GAIN_0 +197 0x4848 //RX_FDEQ_GAIN_1 +198 0x4848 //RX_FDEQ_GAIN_2 +199 0x4848 //RX_FDEQ_GAIN_3 +200 0x4848 //RX_FDEQ_GAIN_4 +201 0x4848 //RX_FDEQ_GAIN_5 +202 0x4848 //RX_FDEQ_GAIN_6 +203 0x4848 //RX_FDEQ_GAIN_7 +204 0x4848 //RX_FDEQ_GAIN_8 +205 0x4848 //RX_FDEQ_GAIN_9 +206 0x4848 //RX_FDEQ_GAIN_10 +207 0x4848 //RX_FDEQ_GAIN_11 +208 0x4848 //RX_FDEQ_GAIN_12 +209 0x4848 //RX_FDEQ_GAIN_13 +210 0x4848 //RX_FDEQ_GAIN_14 +211 0x4848 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0000 //RX_FDEQ_BIN_0 +221 0x0000 //RX_FDEQ_BIN_1 +222 0x0000 //RX_FDEQ_BIN_2 +223 0x0000 //RX_FDEQ_BIN_3 +224 0x0000 //RX_FDEQ_BIN_4 +225 0x0000 //RX_FDEQ_BIN_5 +226 0x0000 //RX_FDEQ_BIN_6 +227 0x0000 //RX_FDEQ_BIN_7 +228 0x0000 //RX_FDEQ_BIN_8 +229 0x0000 //RX_FDEQ_BIN_9 +230 0x0000 //RX_FDEQ_BIN_10 +231 0x0000 //RX_FDEQ_BIN_11 +232 0x0000 //RX_FDEQ_BIN_12 +233 0x0000 //RX_FDEQ_BIN_13 +234 0x0000 //RX_FDEQ_BIN_14 +235 0x0000 //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x0000 //RX_FDEQ_RESRV_0 +245 0x0000 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0030 //RX_FDDRC_BAND_MARGIN_1 +248 0x0050 //RX_FDDRC_BAND_MARGIN_2 +249 0x0080 //RX_FDDRC_BAND_MARGIN_3 +250 0x0004 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x5000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x6400 //RX_FDDRC_THRD_3_2 +258 0x6400 //RX_FDDRC_THRD_3_3 +259 0x2000 //RX_FDDRC_SLANT_0_0 +260 0x2000 //RX_FDDRC_SLANT_0_1 +261 0x2000 //RX_FDDRC_SLANT_0_2 +262 0x2000 //RX_FDDRC_SLANT_0_3 +263 0x2000 //RX_FDDRC_SLANT_1_0 +264 0x2000 //RX_FDDRC_SLANT_1_1 +265 0x2000 //RX_FDDRC_SLANT_1_2 +266 0x2000 //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +286 0x005B //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 +#VOL 5 +163 0x3000 //RX_TDDRC_ALPHA_UP_1 +164 0x3000 //RX_TDDRC_ALPHA_UP_2 +165 0x3000 //RX_TDDRC_ALPHA_UP_3 +166 0x3000 //RX_TDDRC_ALPHA_UP_4 +184 0x7FB0 //RX_TDDRC_ALPHA_DWN_1 +185 0x7FB0 //RX_TDDRC_ALPHA_DWN_2 +186 0x7FB0 //RX_TDDRC_ALPHA_DWN_3 +189 0x7FB0 //RX_TDDRC_ALPHA_DWN_4 +190 0x65AD //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +269 0x0000 //RX_TDDRC_THRD_0 +270 0x0000 //RX_TDDRC_THRD_1 +271 0x0E80 //RX_TDDRC_THRD_2 +272 0x3800 //RX_TDDRC_THRD_3 +273 0x2A00 //RX_TDDRC_SLANT_0 +274 0x6E00 //RX_TDDRC_SLANT_1 +275 0x3000 //RX_TDDRC_ALPHA_UP_0 +276 0x7FB0 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x0000 //RX_TDDRC_HMNC_GAIN +279 0x0000 //RX_TDDRC_SMT_FLAG +280 0x0000 //RX_TDDRC_SMT_W +281 0x0100 //RX_TDDRC_DRC_GAIN +195 0x0020 //RX_FDEQ_SUBNUM +196 0x4848 //RX_FDEQ_GAIN_0 +197 0x4848 //RX_FDEQ_GAIN_1 +198 0x4848 //RX_FDEQ_GAIN_2 +199 0x4848 //RX_FDEQ_GAIN_3 +200 0x4848 //RX_FDEQ_GAIN_4 +201 0x4848 //RX_FDEQ_GAIN_5 +202 0x4848 //RX_FDEQ_GAIN_6 +203 0x4848 //RX_FDEQ_GAIN_7 +204 0x4848 //RX_FDEQ_GAIN_8 +205 0x4848 //RX_FDEQ_GAIN_9 +206 0x4848 //RX_FDEQ_GAIN_10 +207 0x4848 //RX_FDEQ_GAIN_11 +208 0x4848 //RX_FDEQ_GAIN_12 +209 0x4848 //RX_FDEQ_GAIN_13 +210 0x4848 //RX_FDEQ_GAIN_14 +211 0x4848 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0000 //RX_FDEQ_BIN_0 +221 0x0000 //RX_FDEQ_BIN_1 +222 0x0000 //RX_FDEQ_BIN_2 +223 0x0000 //RX_FDEQ_BIN_3 +224 0x0000 //RX_FDEQ_BIN_4 +225 0x0000 //RX_FDEQ_BIN_5 +226 0x0000 //RX_FDEQ_BIN_6 +227 0x0000 //RX_FDEQ_BIN_7 +228 0x0000 //RX_FDEQ_BIN_8 +229 0x0000 //RX_FDEQ_BIN_9 +230 0x0000 //RX_FDEQ_BIN_10 +231 0x0000 //RX_FDEQ_BIN_11 +232 0x0000 //RX_FDEQ_BIN_12 +233 0x0000 //RX_FDEQ_BIN_13 +234 0x0000 //RX_FDEQ_BIN_14 +235 0x0000 //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x0000 //RX_FDEQ_RESRV_0 +245 0x0000 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0030 //RX_FDDRC_BAND_MARGIN_1 +248 0x0050 //RX_FDDRC_BAND_MARGIN_2 +249 0x0080 //RX_FDDRC_BAND_MARGIN_3 +250 0x0004 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x5000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x6400 //RX_FDDRC_THRD_3_2 +258 0x6400 //RX_FDDRC_THRD_3_3 +259 0x2000 //RX_FDDRC_SLANT_0_0 +260 0x2000 //RX_FDDRC_SLANT_0_1 +261 0x2000 //RX_FDDRC_SLANT_0_2 +262 0x2000 //RX_FDDRC_SLANT_0_3 +263 0x2000 //RX_FDDRC_SLANT_1_0 +264 0x2000 //RX_FDDRC_SLANT_1_1 +265 0x2000 //RX_FDDRC_SLANT_1_2 +266 0x2000 //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +286 0x0099 //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 +#VOL 6 +163 0x3000 //RX_TDDRC_ALPHA_UP_1 +164 0x3000 //RX_TDDRC_ALPHA_UP_2 +165 0x3000 //RX_TDDRC_ALPHA_UP_3 +166 0x3000 //RX_TDDRC_ALPHA_UP_4 +184 0x7FB0 //RX_TDDRC_ALPHA_DWN_1 +185 0x7FB0 //RX_TDDRC_ALPHA_DWN_2 +186 0x7FB0 //RX_TDDRC_ALPHA_DWN_3 +189 0x7FB0 //RX_TDDRC_ALPHA_DWN_4 +190 0x65AD //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +269 0x0000 //RX_TDDRC_THRD_0 +270 0x0000 //RX_TDDRC_THRD_1 +271 0x0E80 //RX_TDDRC_THRD_2 +272 0x3800 //RX_TDDRC_THRD_3 +273 0x2A00 //RX_TDDRC_SLANT_0 +274 0x6E00 //RX_TDDRC_SLANT_1 +275 0x3000 //RX_TDDRC_ALPHA_UP_0 +276 0x7FB0 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x0000 //RX_TDDRC_HMNC_GAIN +279 0x0000 //RX_TDDRC_SMT_FLAG +280 0x0000 //RX_TDDRC_SMT_W +281 0x0100 //RX_TDDRC_DRC_GAIN +195 0x0020 //RX_FDEQ_SUBNUM +196 0x4848 //RX_FDEQ_GAIN_0 +197 0x4848 //RX_FDEQ_GAIN_1 +198 0x4848 //RX_FDEQ_GAIN_2 +199 0x4848 //RX_FDEQ_GAIN_3 +200 0x4848 //RX_FDEQ_GAIN_4 +201 0x4848 //RX_FDEQ_GAIN_5 +202 0x4848 //RX_FDEQ_GAIN_6 +203 0x4848 //RX_FDEQ_GAIN_7 +204 0x4848 //RX_FDEQ_GAIN_8 +205 0x4848 //RX_FDEQ_GAIN_9 +206 0x4848 //RX_FDEQ_GAIN_10 +207 0x4848 //RX_FDEQ_GAIN_11 +208 0x4848 //RX_FDEQ_GAIN_12 +209 0x4848 //RX_FDEQ_GAIN_13 +210 0x4848 //RX_FDEQ_GAIN_14 +211 0x4848 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0000 //RX_FDEQ_BIN_0 +221 0x0000 //RX_FDEQ_BIN_1 +222 0x0000 //RX_FDEQ_BIN_2 +223 0x0000 //RX_FDEQ_BIN_3 +224 0x0000 //RX_FDEQ_BIN_4 +225 0x0000 //RX_FDEQ_BIN_5 +226 0x0000 //RX_FDEQ_BIN_6 +227 0x0000 //RX_FDEQ_BIN_7 +228 0x0000 //RX_FDEQ_BIN_8 +229 0x0000 //RX_FDEQ_BIN_9 +230 0x0000 //RX_FDEQ_BIN_10 +231 0x0000 //RX_FDEQ_BIN_11 +232 0x0000 //RX_FDEQ_BIN_12 +233 0x0000 //RX_FDEQ_BIN_13 +234 0x0000 //RX_FDEQ_BIN_14 +235 0x0000 //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x0000 //RX_FDEQ_RESRV_0 +245 0x0000 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0030 //RX_FDDRC_BAND_MARGIN_1 +248 0x0050 //RX_FDDRC_BAND_MARGIN_2 +249 0x0080 //RX_FDDRC_BAND_MARGIN_3 +250 0x0004 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x5000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x6400 //RX_FDDRC_THRD_3_2 +258 0x6400 //RX_FDDRC_THRD_3_3 +259 0x2000 //RX_FDDRC_SLANT_0_0 +260 0x2000 //RX_FDDRC_SLANT_0_1 +261 0x2000 //RX_FDDRC_SLANT_0_2 +262 0x2000 //RX_FDDRC_SLANT_0_3 +263 0x2000 //RX_FDDRC_SLANT_1_0 +264 0x2000 //RX_FDDRC_SLANT_1_1 +265 0x2000 //RX_FDDRC_SLANT_1_2 +266 0x2000 //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +286 0x0100 //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 #CASE_NAME BLUETOOTH-BT_HAC-VOICE_GENERIC-NB -#PARAM_TYPE TX+RX -#TOTAL_CUSTOM_STEP 7 +#PARAM_MODE FULL +#PARAM_TYPE TX+2RX +#TOTAL_CUSTOM_STEP 7+7 #TX 0 0x0001 //TX_OPERATION_MODE_0 1 0x0001 //TX_OPERATION_MODE_1 @@ -2011,12 +2929,12 @@ 248 0xF800 //TX_THR_SN_EST_6 249 0xF800 //TX_THR_SN_EST_7 250 0x0050 //TX_DELTA_THR_SN_EST_0 -251 0x01A0 //TX_DELTA_THR_SN_EST_1 +251 0x0200 //TX_DELTA_THR_SN_EST_1 252 0x0200 //TX_DELTA_THR_SN_EST_2 -253 0x0200 //TX_DELTA_THR_SN_EST_3 -254 0x0100 //TX_DELTA_THR_SN_EST_4 +253 0x0100 //TX_DELTA_THR_SN_EST_3 +254 0x0200 //TX_DELTA_THR_SN_EST_4 255 0x0200 //TX_DELTA_THR_SN_EST_5 -256 0x0200 //TX_DELTA_THR_SN_EST_6 +256 0x01A0 //TX_DELTA_THR_SN_EST_6 257 0x0200 //TX_DELTA_THR_SN_EST_7 258 0x4000 //TX_LAMBDA_NN_EST_0 259 0x4000 //TX_LAMBDA_NN_EST_1 @@ -2042,29 +2960,29 @@ 279 0x1000 //TX_B_POST_FLT_0 280 0x1000 //TX_B_POST_FLT_1 281 0x0010 //TX_NS_LVL_CTRL_0 -282 0x0012 //TX_NS_LVL_CTRL_1 -283 0x0017 //TX_NS_LVL_CTRL_2 -284 0x0015 //TX_NS_LVL_CTRL_3 +282 0x0017 //TX_NS_LVL_CTRL_1 +283 0x0015 //TX_NS_LVL_CTRL_2 +284 0x0012 //TX_NS_LVL_CTRL_3 285 0x0012 //TX_NS_LVL_CTRL_4 -286 0x0012 //TX_NS_LVL_CTRL_5 -287 0x0011 //TX_NS_LVL_CTRL_6 +286 0x0011 //TX_NS_LVL_CTRL_5 +287 0x0012 //TX_NS_LVL_CTRL_6 288 0x0011 //TX_NS_LVL_CTRL_7 289 0x000F //TX_MIN_GAIN_S_0 -290 0x000F //TX_MIN_GAIN_S_1 -291 0x000D //TX_MIN_GAIN_S_2 +290 0x000D //TX_MIN_GAIN_S_1 +291 0x000F //TX_MIN_GAIN_S_2 292 0x000F //TX_MIN_GAIN_S_3 293 0x000F //TX_MIN_GAIN_S_4 -294 0x000F //TX_MIN_GAIN_S_5 -295 0x0010 //TX_MIN_GAIN_S_6 +294 0x0010 //TX_MIN_GAIN_S_5 +295 0x000F //TX_MIN_GAIN_S_6 296 0x000F //TX_MIN_GAIN_S_7 297 0x4000 //TX_NMOS_SUP 298 0x0000 //TX_NS_MAX_PRI_SNR_TH 299 0x0000 //TX_NMOS_SUP_MENSA 300 0x7FFF //TX_SNRI_SUP_0 -301 0x4000 //TX_SNRI_SUP_1 -302 0x1000 //TX_SNRI_SUP_2 -303 0x4000 //TX_SNRI_SUP_3 -304 0x2400 //TX_SNRI_SUP_4 +301 0x1000 //TX_SNRI_SUP_1 +302 0x4000 //TX_SNRI_SUP_2 +303 0x2400 //TX_SNRI_SUP_3 +304 0x4000 //TX_SNRI_SUP_4 305 0x4000 //TX_SNRI_SUP_5 306 0x4000 //TX_SNRI_SUP_6 307 0x7FFF //TX_SNRI_SUP_7 @@ -2075,19 +2993,19 @@ 312 0x7FFF //TX_A_POST_FILT_0 313 0x2000 //TX_A_POST_FILT_1 314 0x4000 //TX_A_POST_FILT_S_0 -315 0x5000 //TX_A_POST_FILT_S_1 -316 0x2000 //TX_A_POST_FILT_S_2 -317 0x4000 //TX_A_POST_FILT_S_3 -318 0x1000 //TX_A_POST_FILT_S_4 -319 0x3000 //TX_A_POST_FILT_S_5 +315 0x2000 //TX_A_POST_FILT_S_1 +316 0x4000 //TX_A_POST_FILT_S_2 +317 0x1000 //TX_A_POST_FILT_S_3 +318 0x3000 //TX_A_POST_FILT_S_4 +319 0x5000 //TX_A_POST_FILT_S_5 320 0x5000 //TX_A_POST_FILT_S_6 321 0x7000 //TX_A_POST_FILT_S_7 322 0x1000 //TX_B_POST_FILT_0 323 0x1000 //TX_B_POST_FILT_1 324 0x1000 //TX_B_POST_FILT_2 -325 0x1000 //TX_B_POST_FILT_3 -326 0x5000 //TX_B_POST_FILT_4 -327 0x3000 //TX_B_POST_FILT_5 +325 0x5000 //TX_B_POST_FILT_3 +326 0x3000 //TX_B_POST_FILT_4 +327 0x1000 //TX_B_POST_FILT_5 328 0x1000 //TX_B_POST_FILT_6 329 0x2000 //TX_B_POST_FILT_7 330 0x4000 //TX_B_LESSCUT_RTO_S_0 @@ -2100,12 +3018,12 @@ 337 0x7FFF //TX_B_LESSCUT_RTO_S_7 338 0x7E00 //TX_LAMBDA_PFILT 339 0x7D00 //TX_LAMBDA_PFILT_S_0 -340 0x7900 //TX_LAMBDA_PFILT_S_1 -341 0x7400 //TX_LAMBDA_PFILT_S_2 -342 0x7900 //TX_LAMBDA_PFILT_S_3 -343 0x7000 //TX_LAMBDA_PFILT_S_4 +340 0x7400 //TX_LAMBDA_PFILT_S_1 +341 0x7900 //TX_LAMBDA_PFILT_S_2 +342 0x7000 //TX_LAMBDA_PFILT_S_3 +343 0x7D00 //TX_LAMBDA_PFILT_S_4 344 0x7D00 //TX_LAMBDA_PFILT_S_5 -345 0x7D00 //TX_LAMBDA_PFILT_S_6 +345 0x7900 //TX_LAMBDA_PFILT_S_6 346 0x7D00 //TX_LAMBDA_PFILT_S_7 347 0x0200 //TX_K_PEPPER 348 0x0800 //TX_A_PEPPER @@ -2140,10 +3058,10 @@ 377 0x7FFF //TX_NOISE_TH_5_4 378 0x0FA0 //TX_NOISE_TH_6 379 0x000A //TX_MINENOISE_TH -380 0x4000 //TX_MINENOISE_MIC0_TH_MTS -381 0xFFEE //TX_MINENOISE_MIC0_TH_EXP -382 0x6000 //TX_MINENOISE_MIC0_S_TH_MTS -383 0xFFF3 //TX_MINENOISE_MIC0_S_TH_EXP +380 0x4000 //TX_MORENS_TFMASK_TH +381 0xFFEE //TX_DRC_QUIET_FLOOR +382 0x6000 //TX_RATIODTL_CUT_TH +383 0xFFF3 //TX_DT_CUT_K1 384 0x0666 //TX_OUT_ENER_S_TH_CLEAN 385 0x0666 //TX_OUT_ENER_S_TH_LESSCLEAN 386 0x0333 //TX_OUT_ENER_S_TH_NOISY @@ -2151,15 +3069,15 @@ 388 0x1000 //TX_OUT_ENER_TH_SPEECH 389 0x2000 //TX_SN_NPB_GAIN 390 0x0000 //TX_NN_NPB_GAIN -391 0x0000 //TX_CSX_ALPHA_0 -392 0x0000 //TX_CSX_ALPHA_1 -393 0x0000 //TX_CSX_ALPHA_2 -394 0x0000 //TX_CSX_ALPHA_3 -395 0x0800 //TX_MU_ARSP_EST -396 0x00C8 //TX_P_OUTBEAM_MIN_TH +391 0x0000 //TX_POST_MASK_SUP_HSNE +392 0x0000 //TX_TAIL_DET_TH +393 0x0000 //TX_B_LESSCUT_RTO_WTA +394 0x0000 //TX_MEL_G_R +395 0x0800 //TX_SUPHIGH_TH +396 0x00C8 //TX_MASK_G_R 397 0x0002 //TX_EXTRA_NS_L -398 0x0800 //TX_EXTRA_NS_A -399 0x0005 //TX_VR_NOISE_FLOOR_TH +398 0x0800 //TX_C_POST_FLT_MASK +399 0x0005 //TX_A_POST_FLT_WNS 400 0x0148 //TX_MIN_G_LOW300HZ 401 0x0001 //TX_MAXLEVEL_CNG 402 0x00B4 //TX_STN_NOISE_TH @@ -2274,16 +3192,16 @@ 511 0x6666 //TX_MIC_TO_BFGAIN 512 0x0000 //TX_MICTOBFGAIN0 513 0x0000 //TX_FASTMUE_TH -514 0x0000 //TX_DERVB_LEN_0 -515 0x0000 //TX_DERVB_LEN_1 -516 0x0000 //TX_RHO_DERVB -517 0x0000 //TX_MIC_INDX_DERVB -518 0x0000 //TX_MU_DERVB -519 0x0000 //TX_DR_RESRV_0 -520 0x0000 //TX_DR_RESRV_1 -521 0x0000 //TX_DR_RESRV_2 -522 0x0000 //TX_DR_RESRV_3 -523 0x0000 //TX_DR_RESRV_4 +514 0x0000 //TX_DEREVERB_LF_MU +515 0x0000 //TX_DEREVERB_HF_MU +516 0x0000 //TX_DEREVERB_DELAY +517 0x0000 //TX_DEREVERB_COEF_LEN +518 0x0000 //TX_DEREVERB_DNR +519 0x0000 //TX_DEREVERB_ALPHA +520 0x0000 //TX_DEREVERB_BETA +521 0x0000 //TX_GSC_RTOL_TH +522 0x0000 //TX_GSC_RTOH_TH +523 0x0000 //TX_WIDE2_MEANHTH 524 0x0000 //TX_DR_RESRV_5 525 0x0000 //TX_DR_RESRV_6 526 0x0000 //TX_DR_RESRV_7 @@ -2657,8 +3575,73 @@ 894 0xC000 //TX_FASTNS_SSA_THHFL 895 0xCCCC //TX_FASTNS_SSA_THLFH 896 0xD999 //TX_FASTNS_SSA_THHFH +897 0x0000 //TX_SENDFUNC_REG_MICMUTE +898 0x0000 //TX_SENDFUNC_REG_MICMUTE1 +899 0x0000 //TX_MICMUTE_RATIO_THR +900 0x0000 //TX_MICMUTE_AMP_THR +901 0x0000 //TX_MICMUTE_HPF_IND +902 0x0000 //TX_MICMUTE_LOG_EYR_TH +903 0x0000 //TX_MICMUTE_CVG_TIME +904 0x0000 //TX_MICMUTE_RELEASE_TIME +905 0x0000 //TX_MIC_VOLUME_MIC0MUTE +906 0x0000 //TX_MICMUTE_EPD_OFFSET_0 +907 0x0000 //TX_MICMUTE_FRQ_AEC_L +908 0x0000 //TX_MICMUTE_EAD_THR +909 0x0000 //TX_MICMUTE_LAMBDA_CB_NLE +910 0x0000 //TX_MICMUTE_LAMBDA_RE_EST +911 0x0000 //TX_DTD_THR1_MICMUTE_0 +912 0x0000 //TX_DTD_THR1_MICMUTE_1 +913 0x0000 //TX_DTD_THR1_MICMUTE_2 +914 0x0000 //TX_DTD_THR1_MICMUTE_3 +915 0x0000 //TX_DTD_THR2_MICMUTE_0 +916 0x0000 //TX_MICMUTE_MIN_EQ_RE_EST_0 +917 0x0000 //TX_MICMUTE_MIN_EQ_RE_EST_1 +918 0x0000 //TX_MICMUTE_MIN_EQ_RE_EST_2 +919 0x0000 //TX_MICMUTE_MIN_EQ_RE_EST_3 +920 0x0000 //TX_MICMUTE_MIN_EQ_RE_EST_4 +921 0x0000 //TX_MICMUTE_C_POST_FLT +922 0x0000 //TX_MICMUTE_DT_CUT_K +923 0x0000 //TX_MICMUTE_DT_CUT_THR +924 0x0000 //TX_MICMUTE_DT_CUT_K2 +925 0x0000 //TX_MICMUTE_DT_CUT_THR2 +926 0x0000 //TX_MICMUTE_DT2_HOLD_N +927 0x0000 //TX_MICMUTE_RATIODTH_THCUT +928 0x0000 //TX_MICMUTE_B_POST_FLT_ECHOL +929 0x0000 //TX_MICMUTE_B_POST_FLT_ECHOH +930 0x0000 //TX_MICMUTE_C_POST_FLT_MASK +931 0x0000 //TX_MICMUTE_RATIODTL_CUT_TH +932 0x0000 //TX_MICMUTE_DT_CUT_K1 +933 0x0000 //TX_MICMUTE_N2_SN_EST +934 0x0000 //TX_MICMUTE_THR_SN_EST_0 +935 0x0000 //TX_MICMUTE_MIN_G_CTRL_0 +936 0x0000 //TX_MICMUTE_A_POST_FILT_S_0 +937 0x0000 //TX_MICMUTE_B_POST_FILT_0 +938 0x0000 //TX_MIC1RUB_AMP_THR +939 0x0000 //TX_MIC1MUTE_RATIO_THR +940 0x0000 //TX_MIC1MUTE_AMP_THR +941 0x0000 //TX_MIC1MUTE_CVG_TIME +942 0x0000 //TX_MIC1MUTE_RELEASE_TIME +943 0x0000 //TX_AMS_RESRV_01 +944 0x0000 //TX_AMS_RESRV_02 +945 0x0000 //TX_AMS_RESRV_03 +946 0x0000 //TX_AMS_RESRV_04 +947 0x0000 //TX_AMS_RESRV_05 +948 0x0000 //TX_AMS_RESRV_06 +949 0x0000 //TX_AMS_RESRV_07 +950 0x0000 //TX_AMS_RESRV_08 +951 0x0000 //TX_AMS_RESRV_09 +952 0x0000 //TX_AMS_RESRV_10 +953 0x0000 //TX_AMS_RESRV_11 +954 0x0000 //TX_AMS_RESRV_12 +955 0x0000 //TX_AMS_RESRV_13 +956 0x0000 //TX_AMS_RESRV_14 +957 0x0000 //TX_AMS_RESRV_15 +958 0x0000 //TX_AMS_RESRV_16 +959 0x0000 //TX_AMS_RESRV_17 +960 0x0000 //TX_AMS_RESRV_18 +961 0x0000 //TX_AMS_RESRV_19 #RX -0 0x006C //RX_RECVFUNC_MODE_0 +0 0x206C //RX_RECVFUNC_MODE_0 1 0x0000 //RX_RECVFUNC_MODE_1 2 0x0000 //RX_SAMPLINGFREQ_SIG 3 0x0000 //RX_SAMPLINGFREQ_PROC @@ -3508,10 +4491,862 @@ 110 0x0000 //RX_FDDRC_RESRV_0 129 0x0100 //RX_SPK_VOL 130 0x0000 //RX_VOL_RESRV_0 +#RX 2 +157 0x206C //RX_RECVFUNC_MODE_0 +158 0x0000 //RX_RECVFUNC_MODE_1 +159 0x0000 //RX_SAMPLINGFREQ_SIG +160 0x0000 //RX_SAMPLINGFREQ_PROC +161 0x000A //RX_FRAME_SZ +162 0x0000 //RX_DELAY_OPT +163 0x3000 //RX_TDDRC_ALPHA_UP_1 +164 0x3000 //RX_TDDRC_ALPHA_UP_2 +165 0x3000 //RX_TDDRC_ALPHA_UP_3 +166 0x3000 //RX_TDDRC_ALPHA_UP_4 +167 0x0800 //RX_PGA +168 0x7FFF //RX_A_HP +169 0x0000 //RX_B_PE +170 0x3800 //RX_THR_PITCH_DET_0 +171 0x3000 //RX_THR_PITCH_DET_1 +172 0x2800 //RX_THR_PITCH_DET_2 +173 0x0008 //RX_PITCH_BFR_LEN +174 0x0003 //RX_SBD_PITCH_DET +175 0x0100 //RX_PP_RESRV_0 +176 0x0020 //RX_PP_RESRV_1 +177 0x0600 //RX_N_SN_EST +178 0x000C //RX_N2_SN_EST +179 0x0010 //RX_NS_LVL_CTRL +180 0xF800 //RX_THR_SN_EST +181 0x7CCD //RX_LAMBDA_PFILT +182 0x000A //RX_FENS_RESRV_0 +183 0x0190 //RX_FENS_RESRV_1 +184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +187 0x0002 //RX_EXTRA_NS_L +188 0x0800 //RX_EXTRA_NS_A +189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +190 0x7FFF //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +192 0x199A //RX_A_POST_FLT +193 0x0000 //RX_LMT_THRD +194 0x4000 //RX_LMT_ALPHA +195 0x0014 //RX_FDEQ_SUBNUM +196 0x4848 //RX_FDEQ_GAIN_0 +197 0x4848 //RX_FDEQ_GAIN_1 +198 0x4848 //RX_FDEQ_GAIN_2 +199 0x4848 //RX_FDEQ_GAIN_3 +200 0x4848 //RX_FDEQ_GAIN_4 +201 0x4848 //RX_FDEQ_GAIN_5 +202 0x4444 //RX_FDEQ_GAIN_6 +203 0x4040 //RX_FDEQ_GAIN_7 +204 0x4040 //RX_FDEQ_GAIN_8 +205 0x4040 //RX_FDEQ_GAIN_9 +206 0x4848 //RX_FDEQ_GAIN_10 +207 0x4848 //RX_FDEQ_GAIN_11 +208 0x4848 //RX_FDEQ_GAIN_12 +209 0x4848 //RX_FDEQ_GAIN_13 +210 0x4848 //RX_FDEQ_GAIN_14 +211 0x4848 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0202 //RX_FDEQ_BIN_0 +221 0x0203 //RX_FDEQ_BIN_1 +222 0x0303 //RX_FDEQ_BIN_2 +223 0x0304 //RX_FDEQ_BIN_3 +224 0x0405 //RX_FDEQ_BIN_4 +225 0x0506 //RX_FDEQ_BIN_5 +226 0x0708 //RX_FDEQ_BIN_6 +227 0x090A //RX_FDEQ_BIN_7 +228 0x0B0C //RX_FDEQ_BIN_8 +229 0x0D0E //RX_FDEQ_BIN_9 +230 0x0000 //RX_FDEQ_BIN_10 +231 0x0000 //RX_FDEQ_BIN_11 +232 0x0000 //RX_FDEQ_BIN_12 +233 0x0000 //RX_FDEQ_BIN_13 +234 0x0000 //RX_FDEQ_BIN_14 +235 0x0000 //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x4000 //RX_FDEQ_RESRV_0 +245 0x0320 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0030 //RX_FDDRC_BAND_MARGIN_1 +248 0x0050 //RX_FDDRC_BAND_MARGIN_2 +249 0x0080 //RX_FDDRC_BAND_MARGIN_3 +250 0x0007 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x5000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x6400 //RX_FDDRC_THRD_3_2 +258 0x6400 //RX_FDDRC_THRD_3_3 +259 0x2000 //RX_FDDRC_SLANT_0_0 +260 0x2000 //RX_FDDRC_SLANT_0_1 +261 0x2000 //RX_FDDRC_SLANT_0_2 +262 0x2000 //RX_FDDRC_SLANT_0_3 +263 0x5333 //RX_FDDRC_SLANT_1_0 +264 0x5333 //RX_FDDRC_SLANT_1_1 +265 0x5333 //RX_FDDRC_SLANT_1_2 +266 0x5333 //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +268 0x0000 //RX_FILTINDX +269 0x0000 //RX_TDDRC_THRD_0 +270 0x0000 //RX_TDDRC_THRD_1 +271 0x7FFF //RX_TDDRC_THRD_2 +272 0x7FFF //RX_TDDRC_THRD_3 +273 0x7FFF //RX_TDDRC_SLANT_0 +274 0x7EB8 //RX_TDDRC_SLANT_1 +275 0x3000 //RX_TDDRC_ALPHA_UP_0 +276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x199A //RX_TDDRC_HMNC_GAIN +279 0x0001 //RX_TDDRC_SMT_FLAG +280 0x0CCD //RX_TDDRC_SMT_W +281 0x017F //RX_TDDRC_DRC_GAIN +282 0x7C00 //RX_LAMBDA_PKA_FP +283 0x2000 //RX_TPKA_FP +284 0x2000 //RX_MIN_G_FP +285 0x0080 //RX_MAX_G_FP +286 0x0100 //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 +288 0x0000 //RX_MAXLEVEL_CNG +289 0x3000 //RX_BWE_UV_TH +290 0x3000 //RX_BWE_UV_TH2 +291 0x1800 //RX_BWE_UV_TH3 +292 0x1000 //RX_BWE_V_TH +293 0x04CD //RX_BWE_GAIN1_V_TH1 +294 0x0F33 //RX_BWE_GAIN1_V_TH2 +295 0x7333 //RX_BWE_UV_EQ +296 0x199A //RX_BWE_V_EQ +297 0x7333 //RX_BWE_TONE_TH +298 0x0004 //RX_BWE_UV_HOLD_T +299 0x6CCD //RX_BWE_GAIN2_ALPHA +300 0x799A //RX_BWE_GAIN3_ALPHA +301 0x001E //RX_BWE_CUTOFF +302 0x3000 //RX_BWE_GAINFILL +303 0x3200 //RX_BWE_MAXTH_TONE +304 0x2000 //RX_BWE_EQ_0 +305 0x2000 //RX_BWE_EQ_1 +306 0x2000 //RX_BWE_EQ_2 +307 0x2000 //RX_BWE_EQ_3 +308 0x2000 //RX_BWE_EQ_4 +309 0x2000 //RX_BWE_EQ_5 +310 0x2000 //RX_BWE_EQ_6 +311 0x0000 //RX_BWE_RESRV_0 +312 0x0000 //RX_BWE_RESRV_1 +313 0x0000 //RX_BWE_RESRV_2 +#VOL 0 +163 0x3000 //RX_TDDRC_ALPHA_UP_1 +164 0x3000 //RX_TDDRC_ALPHA_UP_2 +165 0x3000 //RX_TDDRC_ALPHA_UP_3 +166 0x3000 //RX_TDDRC_ALPHA_UP_4 +184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +190 0x7FFF //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +269 0x0000 //RX_TDDRC_THRD_0 +270 0x0000 //RX_TDDRC_THRD_1 +271 0x7FFF //RX_TDDRC_THRD_2 +272 0x7FFF //RX_TDDRC_THRD_3 +273 0x7FFF //RX_TDDRC_SLANT_0 +274 0x7EB8 //RX_TDDRC_SLANT_1 +275 0x3000 //RX_TDDRC_ALPHA_UP_0 +276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x199A //RX_TDDRC_HMNC_GAIN +279 0x0001 //RX_TDDRC_SMT_FLAG +280 0x0CCD //RX_TDDRC_SMT_W +281 0x017F //RX_TDDRC_DRC_GAIN +195 0x0014 //RX_FDEQ_SUBNUM +196 0x4848 //RX_FDEQ_GAIN_0 +197 0x4848 //RX_FDEQ_GAIN_1 +198 0x4848 //RX_FDEQ_GAIN_2 +199 0x4848 //RX_FDEQ_GAIN_3 +200 0x4848 //RX_FDEQ_GAIN_4 +201 0x4848 //RX_FDEQ_GAIN_5 +202 0x4444 //RX_FDEQ_GAIN_6 +203 0x4040 //RX_FDEQ_GAIN_7 +204 0x4040 //RX_FDEQ_GAIN_8 +205 0x4040 //RX_FDEQ_GAIN_9 +206 0x4848 //RX_FDEQ_GAIN_10 +207 0x4848 //RX_FDEQ_GAIN_11 +208 0x4848 //RX_FDEQ_GAIN_12 +209 0x4848 //RX_FDEQ_GAIN_13 +210 0x4848 //RX_FDEQ_GAIN_14 +211 0x4848 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0202 //RX_FDEQ_BIN_0 +221 0x0203 //RX_FDEQ_BIN_1 +222 0x0303 //RX_FDEQ_BIN_2 +223 0x0304 //RX_FDEQ_BIN_3 +224 0x0405 //RX_FDEQ_BIN_4 +225 0x0506 //RX_FDEQ_BIN_5 +226 0x0708 //RX_FDEQ_BIN_6 +227 0x090A //RX_FDEQ_BIN_7 +228 0x0B0C //RX_FDEQ_BIN_8 +229 0x0D0E //RX_FDEQ_BIN_9 +230 0x0000 //RX_FDEQ_BIN_10 +231 0x0000 //RX_FDEQ_BIN_11 +232 0x0000 //RX_FDEQ_BIN_12 +233 0x0000 //RX_FDEQ_BIN_13 +234 0x0000 //RX_FDEQ_BIN_14 +235 0x0000 //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x4000 //RX_FDEQ_RESRV_0 +245 0x0320 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0030 //RX_FDDRC_BAND_MARGIN_1 +248 0x0050 //RX_FDDRC_BAND_MARGIN_2 +249 0x0080 //RX_FDDRC_BAND_MARGIN_3 +250 0x0007 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x5000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x6400 //RX_FDDRC_THRD_3_2 +258 0x6400 //RX_FDDRC_THRD_3_3 +259 0x2000 //RX_FDDRC_SLANT_0_0 +260 0x2000 //RX_FDDRC_SLANT_0_1 +261 0x2000 //RX_FDDRC_SLANT_0_2 +262 0x2000 //RX_FDDRC_SLANT_0_3 +263 0x5333 //RX_FDDRC_SLANT_1_0 +264 0x5333 //RX_FDDRC_SLANT_1_1 +265 0x5333 //RX_FDDRC_SLANT_1_2 +266 0x5333 //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +286 0x0100 //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 +#VOL 1 +163 0x3000 //RX_TDDRC_ALPHA_UP_1 +164 0x3000 //RX_TDDRC_ALPHA_UP_2 +165 0x3000 //RX_TDDRC_ALPHA_UP_3 +166 0x3000 //RX_TDDRC_ALPHA_UP_4 +184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +190 0x7FFF //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +269 0x0000 //RX_TDDRC_THRD_0 +270 0x0000 //RX_TDDRC_THRD_1 +271 0x7FFF //RX_TDDRC_THRD_2 +272 0x7FFF //RX_TDDRC_THRD_3 +273 0x7FFF //RX_TDDRC_SLANT_0 +274 0x7EB8 //RX_TDDRC_SLANT_1 +275 0x3000 //RX_TDDRC_ALPHA_UP_0 +276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x199A //RX_TDDRC_HMNC_GAIN +279 0x0001 //RX_TDDRC_SMT_FLAG +280 0x0CCD //RX_TDDRC_SMT_W +281 0x017F //RX_TDDRC_DRC_GAIN +195 0x0014 //RX_FDEQ_SUBNUM +196 0x4848 //RX_FDEQ_GAIN_0 +197 0x4848 //RX_FDEQ_GAIN_1 +198 0x4848 //RX_FDEQ_GAIN_2 +199 0x4848 //RX_FDEQ_GAIN_3 +200 0x4848 //RX_FDEQ_GAIN_4 +201 0x4848 //RX_FDEQ_GAIN_5 +202 0x4444 //RX_FDEQ_GAIN_6 +203 0x4040 //RX_FDEQ_GAIN_7 +204 0x4040 //RX_FDEQ_GAIN_8 +205 0x4040 //RX_FDEQ_GAIN_9 +206 0x4848 //RX_FDEQ_GAIN_10 +207 0x4848 //RX_FDEQ_GAIN_11 +208 0x4848 //RX_FDEQ_GAIN_12 +209 0x4848 //RX_FDEQ_GAIN_13 +210 0x4848 //RX_FDEQ_GAIN_14 +211 0x4848 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0202 //RX_FDEQ_BIN_0 +221 0x0203 //RX_FDEQ_BIN_1 +222 0x0303 //RX_FDEQ_BIN_2 +223 0x0304 //RX_FDEQ_BIN_3 +224 0x0405 //RX_FDEQ_BIN_4 +225 0x0506 //RX_FDEQ_BIN_5 +226 0x0708 //RX_FDEQ_BIN_6 +227 0x090A //RX_FDEQ_BIN_7 +228 0x0B0C //RX_FDEQ_BIN_8 +229 0x0D0E //RX_FDEQ_BIN_9 +230 0x0000 //RX_FDEQ_BIN_10 +231 0x0000 //RX_FDEQ_BIN_11 +232 0x0000 //RX_FDEQ_BIN_12 +233 0x0000 //RX_FDEQ_BIN_13 +234 0x0000 //RX_FDEQ_BIN_14 +235 0x0000 //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x4000 //RX_FDEQ_RESRV_0 +245 0x0320 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0030 //RX_FDDRC_BAND_MARGIN_1 +248 0x0050 //RX_FDDRC_BAND_MARGIN_2 +249 0x0080 //RX_FDDRC_BAND_MARGIN_3 +250 0x0007 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x5000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x6400 //RX_FDDRC_THRD_3_2 +258 0x6400 //RX_FDDRC_THRD_3_3 +259 0x2000 //RX_FDDRC_SLANT_0_0 +260 0x2000 //RX_FDDRC_SLANT_0_1 +261 0x2000 //RX_FDDRC_SLANT_0_2 +262 0x2000 //RX_FDDRC_SLANT_0_3 +263 0x5333 //RX_FDDRC_SLANT_1_0 +264 0x5333 //RX_FDDRC_SLANT_1_1 +265 0x5333 //RX_FDDRC_SLANT_1_2 +266 0x5333 //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +286 0x0100 //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 +#VOL 2 +163 0x3000 //RX_TDDRC_ALPHA_UP_1 +164 0x3000 //RX_TDDRC_ALPHA_UP_2 +165 0x3000 //RX_TDDRC_ALPHA_UP_3 +166 0x3000 //RX_TDDRC_ALPHA_UP_4 +184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +190 0x7FFF //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +269 0x0000 //RX_TDDRC_THRD_0 +270 0x0000 //RX_TDDRC_THRD_1 +271 0x7FFF //RX_TDDRC_THRD_2 +272 0x7FFF //RX_TDDRC_THRD_3 +273 0x7FFF //RX_TDDRC_SLANT_0 +274 0x7EB8 //RX_TDDRC_SLANT_1 +275 0x3000 //RX_TDDRC_ALPHA_UP_0 +276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x199A //RX_TDDRC_HMNC_GAIN +279 0x0001 //RX_TDDRC_SMT_FLAG +280 0x0CCD //RX_TDDRC_SMT_W +281 0x017F //RX_TDDRC_DRC_GAIN +195 0x0014 //RX_FDEQ_SUBNUM +196 0x4848 //RX_FDEQ_GAIN_0 +197 0x4848 //RX_FDEQ_GAIN_1 +198 0x4848 //RX_FDEQ_GAIN_2 +199 0x4848 //RX_FDEQ_GAIN_3 +200 0x4848 //RX_FDEQ_GAIN_4 +201 0x4848 //RX_FDEQ_GAIN_5 +202 0x4444 //RX_FDEQ_GAIN_6 +203 0x4040 //RX_FDEQ_GAIN_7 +204 0x4040 //RX_FDEQ_GAIN_8 +205 0x4040 //RX_FDEQ_GAIN_9 +206 0x4848 //RX_FDEQ_GAIN_10 +207 0x4848 //RX_FDEQ_GAIN_11 +208 0x4848 //RX_FDEQ_GAIN_12 +209 0x4848 //RX_FDEQ_GAIN_13 +210 0x4848 //RX_FDEQ_GAIN_14 +211 0x4848 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0202 //RX_FDEQ_BIN_0 +221 0x0203 //RX_FDEQ_BIN_1 +222 0x0303 //RX_FDEQ_BIN_2 +223 0x0304 //RX_FDEQ_BIN_3 +224 0x0405 //RX_FDEQ_BIN_4 +225 0x0506 //RX_FDEQ_BIN_5 +226 0x0708 //RX_FDEQ_BIN_6 +227 0x090A //RX_FDEQ_BIN_7 +228 0x0B0C //RX_FDEQ_BIN_8 +229 0x0D0E //RX_FDEQ_BIN_9 +230 0x0000 //RX_FDEQ_BIN_10 +231 0x0000 //RX_FDEQ_BIN_11 +232 0x0000 //RX_FDEQ_BIN_12 +233 0x0000 //RX_FDEQ_BIN_13 +234 0x0000 //RX_FDEQ_BIN_14 +235 0x0000 //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x4000 //RX_FDEQ_RESRV_0 +245 0x0320 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0030 //RX_FDDRC_BAND_MARGIN_1 +248 0x0050 //RX_FDDRC_BAND_MARGIN_2 +249 0x0080 //RX_FDDRC_BAND_MARGIN_3 +250 0x0007 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x5000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x6400 //RX_FDDRC_THRD_3_2 +258 0x6400 //RX_FDDRC_THRD_3_3 +259 0x2000 //RX_FDDRC_SLANT_0_0 +260 0x2000 //RX_FDDRC_SLANT_0_1 +261 0x2000 //RX_FDDRC_SLANT_0_2 +262 0x2000 //RX_FDDRC_SLANT_0_3 +263 0x5333 //RX_FDDRC_SLANT_1_0 +264 0x5333 //RX_FDDRC_SLANT_1_1 +265 0x5333 //RX_FDDRC_SLANT_1_2 +266 0x5333 //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +286 0x0100 //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 +#VOL 3 +163 0x3000 //RX_TDDRC_ALPHA_UP_1 +164 0x3000 //RX_TDDRC_ALPHA_UP_2 +165 0x3000 //RX_TDDRC_ALPHA_UP_3 +166 0x3000 //RX_TDDRC_ALPHA_UP_4 +184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +190 0x7FFF //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +269 0x0000 //RX_TDDRC_THRD_0 +270 0x0000 //RX_TDDRC_THRD_1 +271 0x7FFF //RX_TDDRC_THRD_2 +272 0x7FFF //RX_TDDRC_THRD_3 +273 0x7FFF //RX_TDDRC_SLANT_0 +274 0x7EB8 //RX_TDDRC_SLANT_1 +275 0x3000 //RX_TDDRC_ALPHA_UP_0 +276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x199A //RX_TDDRC_HMNC_GAIN +279 0x0001 //RX_TDDRC_SMT_FLAG +280 0x0CCD //RX_TDDRC_SMT_W +281 0x017F //RX_TDDRC_DRC_GAIN +195 0x0014 //RX_FDEQ_SUBNUM +196 0x4848 //RX_FDEQ_GAIN_0 +197 0x4848 //RX_FDEQ_GAIN_1 +198 0x4848 //RX_FDEQ_GAIN_2 +199 0x4848 //RX_FDEQ_GAIN_3 +200 0x4848 //RX_FDEQ_GAIN_4 +201 0x4848 //RX_FDEQ_GAIN_5 +202 0x4444 //RX_FDEQ_GAIN_6 +203 0x4040 //RX_FDEQ_GAIN_7 +204 0x4040 //RX_FDEQ_GAIN_8 +205 0x4040 //RX_FDEQ_GAIN_9 +206 0x4848 //RX_FDEQ_GAIN_10 +207 0x4848 //RX_FDEQ_GAIN_11 +208 0x4848 //RX_FDEQ_GAIN_12 +209 0x4848 //RX_FDEQ_GAIN_13 +210 0x4848 //RX_FDEQ_GAIN_14 +211 0x4848 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0202 //RX_FDEQ_BIN_0 +221 0x0203 //RX_FDEQ_BIN_1 +222 0x0303 //RX_FDEQ_BIN_2 +223 0x0304 //RX_FDEQ_BIN_3 +224 0x0405 //RX_FDEQ_BIN_4 +225 0x0506 //RX_FDEQ_BIN_5 +226 0x0708 //RX_FDEQ_BIN_6 +227 0x090A //RX_FDEQ_BIN_7 +228 0x0B0C //RX_FDEQ_BIN_8 +229 0x0D0E //RX_FDEQ_BIN_9 +230 0x0000 //RX_FDEQ_BIN_10 +231 0x0000 //RX_FDEQ_BIN_11 +232 0x0000 //RX_FDEQ_BIN_12 +233 0x0000 //RX_FDEQ_BIN_13 +234 0x0000 //RX_FDEQ_BIN_14 +235 0x0000 //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x4000 //RX_FDEQ_RESRV_0 +245 0x0320 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0030 //RX_FDDRC_BAND_MARGIN_1 +248 0x0050 //RX_FDDRC_BAND_MARGIN_2 +249 0x0080 //RX_FDDRC_BAND_MARGIN_3 +250 0x0007 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x5000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x6400 //RX_FDDRC_THRD_3_2 +258 0x6400 //RX_FDDRC_THRD_3_3 +259 0x2000 //RX_FDDRC_SLANT_0_0 +260 0x2000 //RX_FDDRC_SLANT_0_1 +261 0x2000 //RX_FDDRC_SLANT_0_2 +262 0x2000 //RX_FDDRC_SLANT_0_3 +263 0x5333 //RX_FDDRC_SLANT_1_0 +264 0x5333 //RX_FDDRC_SLANT_1_1 +265 0x5333 //RX_FDDRC_SLANT_1_2 +266 0x5333 //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +286 0x0100 //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 +#VOL 4 +163 0x3000 //RX_TDDRC_ALPHA_UP_1 +164 0x3000 //RX_TDDRC_ALPHA_UP_2 +165 0x3000 //RX_TDDRC_ALPHA_UP_3 +166 0x3000 //RX_TDDRC_ALPHA_UP_4 +184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +190 0x7FFF //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +269 0x0000 //RX_TDDRC_THRD_0 +270 0x0000 //RX_TDDRC_THRD_1 +271 0x7FFF //RX_TDDRC_THRD_2 +272 0x7FFF //RX_TDDRC_THRD_3 +273 0x7FFF //RX_TDDRC_SLANT_0 +274 0x7EB8 //RX_TDDRC_SLANT_1 +275 0x3000 //RX_TDDRC_ALPHA_UP_0 +276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x199A //RX_TDDRC_HMNC_GAIN +279 0x0001 //RX_TDDRC_SMT_FLAG +280 0x0CCD //RX_TDDRC_SMT_W +281 0x017F //RX_TDDRC_DRC_GAIN +195 0x0014 //RX_FDEQ_SUBNUM +196 0x4848 //RX_FDEQ_GAIN_0 +197 0x4848 //RX_FDEQ_GAIN_1 +198 0x4848 //RX_FDEQ_GAIN_2 +199 0x4848 //RX_FDEQ_GAIN_3 +200 0x4848 //RX_FDEQ_GAIN_4 +201 0x4848 //RX_FDEQ_GAIN_5 +202 0x4444 //RX_FDEQ_GAIN_6 +203 0x4040 //RX_FDEQ_GAIN_7 +204 0x4040 //RX_FDEQ_GAIN_8 +205 0x4040 //RX_FDEQ_GAIN_9 +206 0x4848 //RX_FDEQ_GAIN_10 +207 0x4848 //RX_FDEQ_GAIN_11 +208 0x4848 //RX_FDEQ_GAIN_12 +209 0x4848 //RX_FDEQ_GAIN_13 +210 0x4848 //RX_FDEQ_GAIN_14 +211 0x4848 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0202 //RX_FDEQ_BIN_0 +221 0x0203 //RX_FDEQ_BIN_1 +222 0x0303 //RX_FDEQ_BIN_2 +223 0x0304 //RX_FDEQ_BIN_3 +224 0x0405 //RX_FDEQ_BIN_4 +225 0x0506 //RX_FDEQ_BIN_5 +226 0x0708 //RX_FDEQ_BIN_6 +227 0x090A //RX_FDEQ_BIN_7 +228 0x0B0C //RX_FDEQ_BIN_8 +229 0x0D0E //RX_FDEQ_BIN_9 +230 0x0000 //RX_FDEQ_BIN_10 +231 0x0000 //RX_FDEQ_BIN_11 +232 0x0000 //RX_FDEQ_BIN_12 +233 0x0000 //RX_FDEQ_BIN_13 +234 0x0000 //RX_FDEQ_BIN_14 +235 0x0000 //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x4000 //RX_FDEQ_RESRV_0 +245 0x0320 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0030 //RX_FDDRC_BAND_MARGIN_1 +248 0x0050 //RX_FDDRC_BAND_MARGIN_2 +249 0x0080 //RX_FDDRC_BAND_MARGIN_3 +250 0x0007 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x5000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x6400 //RX_FDDRC_THRD_3_2 +258 0x6400 //RX_FDDRC_THRD_3_3 +259 0x2000 //RX_FDDRC_SLANT_0_0 +260 0x2000 //RX_FDDRC_SLANT_0_1 +261 0x2000 //RX_FDDRC_SLANT_0_2 +262 0x2000 //RX_FDDRC_SLANT_0_3 +263 0x5333 //RX_FDDRC_SLANT_1_0 +264 0x5333 //RX_FDDRC_SLANT_1_1 +265 0x5333 //RX_FDDRC_SLANT_1_2 +266 0x5333 //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +286 0x0100 //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 +#VOL 5 +163 0x3000 //RX_TDDRC_ALPHA_UP_1 +164 0x3000 //RX_TDDRC_ALPHA_UP_2 +165 0x3000 //RX_TDDRC_ALPHA_UP_3 +166 0x3000 //RX_TDDRC_ALPHA_UP_4 +184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +190 0x7FFF //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +269 0x0000 //RX_TDDRC_THRD_0 +270 0x0000 //RX_TDDRC_THRD_1 +271 0x7FFF //RX_TDDRC_THRD_2 +272 0x7FFF //RX_TDDRC_THRD_3 +273 0x7FFF //RX_TDDRC_SLANT_0 +274 0x7EB8 //RX_TDDRC_SLANT_1 +275 0x3000 //RX_TDDRC_ALPHA_UP_0 +276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x199A //RX_TDDRC_HMNC_GAIN +279 0x0001 //RX_TDDRC_SMT_FLAG +280 0x0CCD //RX_TDDRC_SMT_W +281 0x017F //RX_TDDRC_DRC_GAIN +195 0x0014 //RX_FDEQ_SUBNUM +196 0x4848 //RX_FDEQ_GAIN_0 +197 0x4848 //RX_FDEQ_GAIN_1 +198 0x4848 //RX_FDEQ_GAIN_2 +199 0x4848 //RX_FDEQ_GAIN_3 +200 0x4848 //RX_FDEQ_GAIN_4 +201 0x4848 //RX_FDEQ_GAIN_5 +202 0x4444 //RX_FDEQ_GAIN_6 +203 0x4040 //RX_FDEQ_GAIN_7 +204 0x4040 //RX_FDEQ_GAIN_8 +205 0x4040 //RX_FDEQ_GAIN_9 +206 0x4848 //RX_FDEQ_GAIN_10 +207 0x4848 //RX_FDEQ_GAIN_11 +208 0x4848 //RX_FDEQ_GAIN_12 +209 0x4848 //RX_FDEQ_GAIN_13 +210 0x4848 //RX_FDEQ_GAIN_14 +211 0x4848 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0202 //RX_FDEQ_BIN_0 +221 0x0203 //RX_FDEQ_BIN_1 +222 0x0303 //RX_FDEQ_BIN_2 +223 0x0304 //RX_FDEQ_BIN_3 +224 0x0405 //RX_FDEQ_BIN_4 +225 0x0506 //RX_FDEQ_BIN_5 +226 0x0708 //RX_FDEQ_BIN_6 +227 0x090A //RX_FDEQ_BIN_7 +228 0x0B0C //RX_FDEQ_BIN_8 +229 0x0D0E //RX_FDEQ_BIN_9 +230 0x0000 //RX_FDEQ_BIN_10 +231 0x0000 //RX_FDEQ_BIN_11 +232 0x0000 //RX_FDEQ_BIN_12 +233 0x0000 //RX_FDEQ_BIN_13 +234 0x0000 //RX_FDEQ_BIN_14 +235 0x0000 //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x4000 //RX_FDEQ_RESRV_0 +245 0x0320 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0030 //RX_FDDRC_BAND_MARGIN_1 +248 0x0050 //RX_FDDRC_BAND_MARGIN_2 +249 0x0080 //RX_FDDRC_BAND_MARGIN_3 +250 0x0007 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x5000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x6400 //RX_FDDRC_THRD_3_2 +258 0x6400 //RX_FDDRC_THRD_3_3 +259 0x2000 //RX_FDDRC_SLANT_0_0 +260 0x2000 //RX_FDDRC_SLANT_0_1 +261 0x2000 //RX_FDDRC_SLANT_0_2 +262 0x2000 //RX_FDDRC_SLANT_0_3 +263 0x5333 //RX_FDDRC_SLANT_1_0 +264 0x5333 //RX_FDDRC_SLANT_1_1 +265 0x5333 //RX_FDDRC_SLANT_1_2 +266 0x5333 //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +286 0x0100 //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 +#VOL 6 +163 0x3000 //RX_TDDRC_ALPHA_UP_1 +164 0x3000 //RX_TDDRC_ALPHA_UP_2 +165 0x3000 //RX_TDDRC_ALPHA_UP_3 +166 0x3000 //RX_TDDRC_ALPHA_UP_4 +184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +190 0x7FFF //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +269 0x0000 //RX_TDDRC_THRD_0 +270 0x0000 //RX_TDDRC_THRD_1 +271 0x7FFF //RX_TDDRC_THRD_2 +272 0x7FFF //RX_TDDRC_THRD_3 +273 0x7FFF //RX_TDDRC_SLANT_0 +274 0x7EB8 //RX_TDDRC_SLANT_1 +275 0x3000 //RX_TDDRC_ALPHA_UP_0 +276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x199A //RX_TDDRC_HMNC_GAIN +279 0x0001 //RX_TDDRC_SMT_FLAG +280 0x0CCD //RX_TDDRC_SMT_W +281 0x017F //RX_TDDRC_DRC_GAIN +195 0x0014 //RX_FDEQ_SUBNUM +196 0x4848 //RX_FDEQ_GAIN_0 +197 0x4848 //RX_FDEQ_GAIN_1 +198 0x4848 //RX_FDEQ_GAIN_2 +199 0x4848 //RX_FDEQ_GAIN_3 +200 0x4848 //RX_FDEQ_GAIN_4 +201 0x4848 //RX_FDEQ_GAIN_5 +202 0x4444 //RX_FDEQ_GAIN_6 +203 0x4040 //RX_FDEQ_GAIN_7 +204 0x4040 //RX_FDEQ_GAIN_8 +205 0x4040 //RX_FDEQ_GAIN_9 +206 0x4848 //RX_FDEQ_GAIN_10 +207 0x4848 //RX_FDEQ_GAIN_11 +208 0x4848 //RX_FDEQ_GAIN_12 +209 0x4848 //RX_FDEQ_GAIN_13 +210 0x4848 //RX_FDEQ_GAIN_14 +211 0x4848 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0202 //RX_FDEQ_BIN_0 +221 0x0203 //RX_FDEQ_BIN_1 +222 0x0303 //RX_FDEQ_BIN_2 +223 0x0304 //RX_FDEQ_BIN_3 +224 0x0405 //RX_FDEQ_BIN_4 +225 0x0506 //RX_FDEQ_BIN_5 +226 0x0708 //RX_FDEQ_BIN_6 +227 0x090A //RX_FDEQ_BIN_7 +228 0x0B0C //RX_FDEQ_BIN_8 +229 0x0D0E //RX_FDEQ_BIN_9 +230 0x0000 //RX_FDEQ_BIN_10 +231 0x0000 //RX_FDEQ_BIN_11 +232 0x0000 //RX_FDEQ_BIN_12 +233 0x0000 //RX_FDEQ_BIN_13 +234 0x0000 //RX_FDEQ_BIN_14 +235 0x0000 //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x4000 //RX_FDEQ_RESRV_0 +245 0x0320 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0030 //RX_FDDRC_BAND_MARGIN_1 +248 0x0050 //RX_FDDRC_BAND_MARGIN_2 +249 0x0080 //RX_FDDRC_BAND_MARGIN_3 +250 0x0007 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x5000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x6400 //RX_FDDRC_THRD_3_2 +258 0x6400 //RX_FDDRC_THRD_3_3 +259 0x2000 //RX_FDDRC_SLANT_0_0 +260 0x2000 //RX_FDDRC_SLANT_0_1 +261 0x2000 //RX_FDDRC_SLANT_0_2 +262 0x2000 //RX_FDDRC_SLANT_0_3 +263 0x5333 //RX_FDDRC_SLANT_1_0 +264 0x5333 //RX_FDDRC_SLANT_1_1 +265 0x5333 //RX_FDDRC_SLANT_1_2 +266 0x5333 //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +286 0x0100 //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 #CASE_NAME BLUETOOTH-BT_HAC-VOICE_GENERIC-WB -#PARAM_TYPE TX+RX -#TOTAL_CUSTOM_STEP 7 +#PARAM_MODE FULL +#PARAM_TYPE TX+2RX +#TOTAL_CUSTOM_STEP 7+7 #TX 0 0x0001 //TX_OPERATION_MODE_0 1 0x0001 //TX_OPERATION_MODE_1 @@ -3764,11 +5599,11 @@ 248 0xF800 //TX_THR_SN_EST_6 249 0xF800 //TX_THR_SN_EST_7 250 0x0100 //TX_DELTA_THR_SN_EST_0 -251 0x0200 //TX_DELTA_THR_SN_EST_1 -252 0x0100 //TX_DELTA_THR_SN_EST_2 -253 0x0200 //TX_DELTA_THR_SN_EST_3 +251 0x0100 //TX_DELTA_THR_SN_EST_1 +252 0x0200 //TX_DELTA_THR_SN_EST_2 +253 0x0100 //TX_DELTA_THR_SN_EST_3 254 0x0100 //TX_DELTA_THR_SN_EST_4 -255 0x0100 //TX_DELTA_THR_SN_EST_5 +255 0x0200 //TX_DELTA_THR_SN_EST_5 256 0x0200 //TX_DELTA_THR_SN_EST_6 257 0x0200 //TX_DELTA_THR_SN_EST_7 258 0x4000 //TX_LAMBDA_NN_EST_0 @@ -3796,11 +5631,11 @@ 280 0x1000 //TX_B_POST_FLT_1 281 0x0010 //TX_NS_LVL_CTRL_0 282 0x0014 //TX_NS_LVL_CTRL_1 -283 0x0014 //TX_NS_LVL_CTRL_2 -284 0x0018 //TX_NS_LVL_CTRL_3 -285 0x0016 //TX_NS_LVL_CTRL_4 -286 0x0014 //TX_NS_LVL_CTRL_5 -287 0x0011 //TX_NS_LVL_CTRL_6 +283 0x0018 //TX_NS_LVL_CTRL_2 +284 0x0016 //TX_NS_LVL_CTRL_3 +285 0x0014 //TX_NS_LVL_CTRL_4 +286 0x0011 //TX_NS_LVL_CTRL_5 +287 0x0014 //TX_NS_LVL_CTRL_6 288 0x0011 //TX_NS_LVL_CTRL_7 289 0x000F //TX_MIN_GAIN_S_0 290 0x0010 //TX_MIN_GAIN_S_1 @@ -3818,8 +5653,8 @@ 302 0x4000 //TX_SNRI_SUP_2 303 0x4000 //TX_SNRI_SUP_3 304 0x4000 //TX_SNRI_SUP_4 -305 0x4000 //TX_SNRI_SUP_5 -306 0x50C0 //TX_SNRI_SUP_6 +305 0x50C0 //TX_SNRI_SUP_5 +306 0x4000 //TX_SNRI_SUP_6 307 0x7FFF //TX_SNRI_SUP_7 308 0x7FFF //TX_THR_LFNS 309 0x0018 //TX_G_LFNS @@ -3828,19 +5663,19 @@ 312 0x7FFF //TX_A_POST_FILT_0 313 0x2000 //TX_A_POST_FILT_1 314 0x5000 //TX_A_POST_FILT_S_0 -315 0x6000 //TX_A_POST_FILT_S_1 -316 0x4C00 //TX_A_POST_FILT_S_2 -317 0x4000 //TX_A_POST_FILT_S_3 -318 0x6000 //TX_A_POST_FILT_S_4 -319 0x4000 //TX_A_POST_FILT_S_5 -320 0x5000 //TX_A_POST_FILT_S_6 +315 0x4C00 //TX_A_POST_FILT_S_1 +316 0x4000 //TX_A_POST_FILT_S_2 +317 0x6000 //TX_A_POST_FILT_S_3 +318 0x4000 //TX_A_POST_FILT_S_4 +319 0x5000 //TX_A_POST_FILT_S_5 +320 0x6000 //TX_A_POST_FILT_S_6 321 0x7000 //TX_A_POST_FILT_S_7 322 0x2000 //TX_B_POST_FILT_0 -323 0x1000 //TX_B_POST_FILT_1 +323 0x2000 //TX_B_POST_FILT_1 324 0x2000 //TX_B_POST_FILT_2 -325 0x2000 //TX_B_POST_FILT_3 +325 0x4000 //TX_B_POST_FILT_3 326 0x4000 //TX_B_POST_FILT_4 -327 0x4000 //TX_B_POST_FILT_5 +327 0x1000 //TX_B_POST_FILT_5 328 0x1000 //TX_B_POST_FILT_6 329 0x2000 //TX_B_POST_FILT_7 330 0x4000 //TX_B_LESSCUT_RTO_S_0 @@ -3848,14 +5683,14 @@ 332 0x7FFF //TX_B_LESSCUT_RTO_S_2 333 0x7FFF //TX_B_LESSCUT_RTO_S_3 334 0x7FFF //TX_B_LESSCUT_RTO_S_4 -335 0x7FFF //TX_B_LESSCUT_RTO_S_5 -336 0x6000 //TX_B_LESSCUT_RTO_S_6 +335 0x6000 //TX_B_LESSCUT_RTO_S_5 +336 0x7FFF //TX_B_LESSCUT_RTO_S_6 337 0x7FFF //TX_B_LESSCUT_RTO_S_7 338 0x7C00 //TX_LAMBDA_PFILT 339 0x7C00 //TX_LAMBDA_PFILT_S_0 340 0x7C00 //TX_LAMBDA_PFILT_S_1 -341 0x7C00 //TX_LAMBDA_PFILT_S_2 -342 0x7A00 //TX_LAMBDA_PFILT_S_3 +341 0x7A00 //TX_LAMBDA_PFILT_S_2 +342 0x7C00 //TX_LAMBDA_PFILT_S_3 343 0x7C00 //TX_LAMBDA_PFILT_S_4 344 0x7C00 //TX_LAMBDA_PFILT_S_5 345 0x7C00 //TX_LAMBDA_PFILT_S_6 @@ -3893,10 +5728,10 @@ 377 0x7FFF //TX_NOISE_TH_5_4 378 0x0F0A //TX_NOISE_TH_6 379 0x0033 //TX_MINENOISE_TH -380 0x4000 //TX_MINENOISE_MIC0_TH_MTS -381 0xFFEE //TX_MINENOISE_MIC0_TH_EXP -382 0x6000 //TX_MINENOISE_MIC0_S_TH_MTS -383 0xFFF3 //TX_MINENOISE_MIC0_S_TH_EXP +380 0x4000 //TX_MORENS_TFMASK_TH +381 0xFFEE //TX_DRC_QUIET_FLOOR +382 0x6000 //TX_RATIODTL_CUT_TH +383 0xFFF3 //TX_DT_CUT_K1 384 0x0666 //TX_OUT_ENER_S_TH_CLEAN 385 0x0666 //TX_OUT_ENER_S_TH_LESSCLEAN 386 0x0333 //TX_OUT_ENER_S_TH_NOISY @@ -3904,15 +5739,15 @@ 388 0x0333 //TX_OUT_ENER_TH_SPEECH 389 0x2000 //TX_SN_NPB_GAIN 390 0x0000 //TX_NN_NPB_GAIN -391 0x0000 //TX_CSX_ALPHA_0 -392 0x0000 //TX_CSX_ALPHA_1 -393 0x0000 //TX_CSX_ALPHA_2 -394 0x0000 //TX_CSX_ALPHA_3 -395 0x0800 //TX_MU_ARSP_EST -396 0x00C8 //TX_P_OUTBEAM_MIN_TH +391 0x0000 //TX_POST_MASK_SUP_HSNE +392 0x0000 //TX_TAIL_DET_TH +393 0x0000 //TX_B_LESSCUT_RTO_WTA +394 0x0000 //TX_MEL_G_R +395 0x0800 //TX_SUPHIGH_TH +396 0x00C8 //TX_MASK_G_R 397 0x0002 //TX_EXTRA_NS_L -398 0x0800 //TX_EXTRA_NS_A -399 0x0005 //TX_VR_NOISE_FLOOR_TH +398 0x0800 //TX_C_POST_FLT_MASK +399 0x0005 //TX_A_POST_FLT_WNS 400 0x0148 //TX_MIN_G_LOW300HZ 401 0x0001 //TX_MAXLEVEL_CNG 402 0x00B4 //TX_STN_NOISE_TH @@ -4027,16 +5862,16 @@ 511 0x6666 //TX_MIC_TO_BFGAIN 512 0x0000 //TX_MICTOBFGAIN0 513 0x0000 //TX_FASTMUE_TH -514 0x0000 //TX_DERVB_LEN_0 -515 0x0000 //TX_DERVB_LEN_1 -516 0x0000 //TX_RHO_DERVB -517 0x0000 //TX_MIC_INDX_DERVB -518 0x0000 //TX_MU_DERVB -519 0x0000 //TX_DR_RESRV_0 -520 0x0000 //TX_DR_RESRV_1 -521 0x0000 //TX_DR_RESRV_2 -522 0x0000 //TX_DR_RESRV_3 -523 0x0000 //TX_DR_RESRV_4 +514 0x0000 //TX_DEREVERB_LF_MU +515 0x0000 //TX_DEREVERB_HF_MU +516 0x0000 //TX_DEREVERB_DELAY +517 0x0000 //TX_DEREVERB_COEF_LEN +518 0x0000 //TX_DEREVERB_DNR +519 0x0000 //TX_DEREVERB_ALPHA +520 0x0000 //TX_DEREVERB_BETA +521 0x0000 //TX_GSC_RTOL_TH +522 0x0000 //TX_GSC_RTOH_TH +523 0x0000 //TX_WIDE2_MEANHTH 524 0x0000 //TX_DR_RESRV_5 525 0x0000 //TX_DR_RESRV_6 526 0x0000 //TX_DR_RESRV_7 @@ -4410,8 +6245,73 @@ 894 0xC000 //TX_FASTNS_SSA_THHFL 895 0xCCCC //TX_FASTNS_SSA_THLFH 896 0xD999 //TX_FASTNS_SSA_THHFH +897 0x0000 //TX_SENDFUNC_REG_MICMUTE +898 0x0000 //TX_SENDFUNC_REG_MICMUTE1 +899 0x0000 //TX_MICMUTE_RATIO_THR +900 0x0000 //TX_MICMUTE_AMP_THR +901 0x0000 //TX_MICMUTE_HPF_IND +902 0x0000 //TX_MICMUTE_LOG_EYR_TH +903 0x0000 //TX_MICMUTE_CVG_TIME +904 0x0000 //TX_MICMUTE_RELEASE_TIME +905 0x0000 //TX_MIC_VOLUME_MIC0MUTE +906 0x0000 //TX_MICMUTE_EPD_OFFSET_0 +907 0x0000 //TX_MICMUTE_FRQ_AEC_L +908 0x0000 //TX_MICMUTE_EAD_THR +909 0x0000 //TX_MICMUTE_LAMBDA_CB_NLE +910 0x0000 //TX_MICMUTE_LAMBDA_RE_EST +911 0x0000 //TX_DTD_THR1_MICMUTE_0 +912 0x0000 //TX_DTD_THR1_MICMUTE_1 +913 0x0000 //TX_DTD_THR1_MICMUTE_2 +914 0x0000 //TX_DTD_THR1_MICMUTE_3 +915 0x0000 //TX_DTD_THR2_MICMUTE_0 +916 0x0000 //TX_MICMUTE_MIN_EQ_RE_EST_0 +917 0x0000 //TX_MICMUTE_MIN_EQ_RE_EST_1 +918 0x0000 //TX_MICMUTE_MIN_EQ_RE_EST_2 +919 0x0000 //TX_MICMUTE_MIN_EQ_RE_EST_3 +920 0x0000 //TX_MICMUTE_MIN_EQ_RE_EST_4 +921 0x0000 //TX_MICMUTE_C_POST_FLT +922 0x0000 //TX_MICMUTE_DT_CUT_K +923 0x0000 //TX_MICMUTE_DT_CUT_THR +924 0x0000 //TX_MICMUTE_DT_CUT_K2 +925 0x0000 //TX_MICMUTE_DT_CUT_THR2 +926 0x0000 //TX_MICMUTE_DT2_HOLD_N +927 0x0000 //TX_MICMUTE_RATIODTH_THCUT +928 0x0000 //TX_MICMUTE_B_POST_FLT_ECHOL +929 0x0000 //TX_MICMUTE_B_POST_FLT_ECHOH +930 0x0000 //TX_MICMUTE_C_POST_FLT_MASK +931 0x0000 //TX_MICMUTE_RATIODTL_CUT_TH +932 0x0000 //TX_MICMUTE_DT_CUT_K1 +933 0x0000 //TX_MICMUTE_N2_SN_EST +934 0x0000 //TX_MICMUTE_THR_SN_EST_0 +935 0x0000 //TX_MICMUTE_MIN_G_CTRL_0 +936 0x0000 //TX_MICMUTE_A_POST_FILT_S_0 +937 0x0000 //TX_MICMUTE_B_POST_FILT_0 +938 0x0000 //TX_MIC1RUB_AMP_THR +939 0x0000 //TX_MIC1MUTE_RATIO_THR +940 0x0000 //TX_MIC1MUTE_AMP_THR +941 0x0000 //TX_MIC1MUTE_CVG_TIME +942 0x0000 //TX_MIC1MUTE_RELEASE_TIME +943 0x0000 //TX_AMS_RESRV_01 +944 0x0000 //TX_AMS_RESRV_02 +945 0x0000 //TX_AMS_RESRV_03 +946 0x0000 //TX_AMS_RESRV_04 +947 0x0000 //TX_AMS_RESRV_05 +948 0x0000 //TX_AMS_RESRV_06 +949 0x0000 //TX_AMS_RESRV_07 +950 0x0000 //TX_AMS_RESRV_08 +951 0x0000 //TX_AMS_RESRV_09 +952 0x0000 //TX_AMS_RESRV_10 +953 0x0000 //TX_AMS_RESRV_11 +954 0x0000 //TX_AMS_RESRV_12 +955 0x0000 //TX_AMS_RESRV_13 +956 0x0000 //TX_AMS_RESRV_14 +957 0x0000 //TX_AMS_RESRV_15 +958 0x0000 //TX_AMS_RESRV_16 +959 0x0000 //TX_AMS_RESRV_17 +960 0x0000 //TX_AMS_RESRV_18 +961 0x0000 //TX_AMS_RESRV_19 #RX -0 0x006C //RX_RECVFUNC_MODE_0 +0 0x206C //RX_RECVFUNC_MODE_0 1 0x0000 //RX_RECVFUNC_MODE_1 2 0x0001 //RX_SAMPLINGFREQ_SIG 3 0x0001 //RX_SAMPLINGFREQ_PROC @@ -5261,10 +7161,862 @@ 110 0x0000 //RX_FDDRC_RESRV_0 129 0x0100 //RX_SPK_VOL 130 0x0000 //RX_VOL_RESRV_0 +#RX 2 +157 0x206C //RX_RECVFUNC_MODE_0 +158 0x0000 //RX_RECVFUNC_MODE_1 +159 0x0001 //RX_SAMPLINGFREQ_SIG +160 0x0001 //RX_SAMPLINGFREQ_PROC +161 0x000A //RX_FRAME_SZ +162 0x0000 //RX_DELAY_OPT +163 0x1000 //RX_TDDRC_ALPHA_UP_1 +164 0x1000 //RX_TDDRC_ALPHA_UP_2 +165 0x1000 //RX_TDDRC_ALPHA_UP_3 +166 0x1000 //RX_TDDRC_ALPHA_UP_4 +167 0x0800 //RX_PGA +168 0x7FFF //RX_A_HP +169 0x4000 //RX_B_PE +170 0x3800 //RX_THR_PITCH_DET_0 +171 0x3000 //RX_THR_PITCH_DET_1 +172 0x2800 //RX_THR_PITCH_DET_2 +173 0x0008 //RX_PITCH_BFR_LEN +174 0x0003 //RX_SBD_PITCH_DET +175 0x0100 //RX_PP_RESRV_0 +176 0x0020 //RX_PP_RESRV_1 +177 0x0600 //RX_N_SN_EST +178 0x000C //RX_N2_SN_EST +179 0x0010 //RX_NS_LVL_CTRL +180 0xF800 //RX_THR_SN_EST +181 0x7CCD //RX_LAMBDA_PFILT +182 0x000A //RX_FENS_RESRV_0 +183 0x0190 //RX_FENS_RESRV_1 +184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +187 0x0002 //RX_EXTRA_NS_L +188 0x0800 //RX_EXTRA_NS_A +189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +190 0x7FFF //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +192 0x199A //RX_A_POST_FLT +193 0x0000 //RX_LMT_THRD +194 0x4000 //RX_LMT_ALPHA +195 0x001C //RX_FDEQ_SUBNUM +196 0x4848 //RX_FDEQ_GAIN_0 +197 0x4848 //RX_FDEQ_GAIN_1 +198 0x4848 //RX_FDEQ_GAIN_2 +199 0x4848 //RX_FDEQ_GAIN_3 +200 0x4848 //RX_FDEQ_GAIN_4 +201 0x4848 //RX_FDEQ_GAIN_5 +202 0x4848 //RX_FDEQ_GAIN_6 +203 0x4848 //RX_FDEQ_GAIN_7 +204 0x4848 //RX_FDEQ_GAIN_8 +205 0x3C3C //RX_FDEQ_GAIN_9 +206 0x3C3C //RX_FDEQ_GAIN_10 +207 0x3838 //RX_FDEQ_GAIN_11 +208 0x3838 //RX_FDEQ_GAIN_12 +209 0x3030 //RX_FDEQ_GAIN_13 +210 0x4848 //RX_FDEQ_GAIN_14 +211 0x4848 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0202 //RX_FDEQ_BIN_0 +221 0x0203 //RX_FDEQ_BIN_1 +222 0x0303 //RX_FDEQ_BIN_2 +223 0x0304 //RX_FDEQ_BIN_3 +224 0x0405 //RX_FDEQ_BIN_4 +225 0x0506 //RX_FDEQ_BIN_5 +226 0x0708 //RX_FDEQ_BIN_6 +227 0x090A //RX_FDEQ_BIN_7 +228 0x0B0C //RX_FDEQ_BIN_8 +229 0x0D0E //RX_FDEQ_BIN_9 +230 0x0E0F //RX_FDEQ_BIN_10 +231 0x0F10 //RX_FDEQ_BIN_11 +232 0x1011 //RX_FDEQ_BIN_12 +233 0x1112 //RX_FDEQ_BIN_13 +234 0x0000 //RX_FDEQ_BIN_14 +235 0x0000 //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x4000 //RX_FDEQ_RESRV_0 +245 0x0320 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0030 //RX_FDDRC_BAND_MARGIN_1 +248 0x0050 //RX_FDDRC_BAND_MARGIN_2 +249 0x0080 //RX_FDDRC_BAND_MARGIN_3 +250 0x0007 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x5000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x6400 //RX_FDDRC_THRD_3_2 +258 0x6400 //RX_FDDRC_THRD_3_3 +259 0x2000 //RX_FDDRC_SLANT_0_0 +260 0x2000 //RX_FDDRC_SLANT_0_1 +261 0x2000 //RX_FDDRC_SLANT_0_2 +262 0x2000 //RX_FDDRC_SLANT_0_3 +263 0x5333 //RX_FDDRC_SLANT_1_0 +264 0x5333 //RX_FDDRC_SLANT_1_1 +265 0x5333 //RX_FDDRC_SLANT_1_2 +266 0x5333 //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +268 0x0000 //RX_FILTINDX +269 0x0000 //RX_TDDRC_THRD_0 +270 0x0000 //RX_TDDRC_THRD_1 +271 0x7FFF //RX_TDDRC_THRD_2 +272 0x7FFF //RX_TDDRC_THRD_3 +273 0x7E70 //RX_TDDRC_SLANT_0 +274 0x7FFF //RX_TDDRC_SLANT_1 +275 0x1000 //RX_TDDRC_ALPHA_UP_0 +276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x199A //RX_TDDRC_HMNC_GAIN +279 0x0001 //RX_TDDRC_SMT_FLAG +280 0x0CCD //RX_TDDRC_SMT_W +281 0x0155 //RX_TDDRC_DRC_GAIN +282 0x7C00 //RX_LAMBDA_PKA_FP +283 0x2000 //RX_TPKA_FP +284 0x2000 //RX_MIN_G_FP +285 0x0080 //RX_MAX_G_FP +286 0x0100 //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 +288 0x0000 //RX_MAXLEVEL_CNG +289 0x3000 //RX_BWE_UV_TH +290 0x3000 //RX_BWE_UV_TH2 +291 0x1800 //RX_BWE_UV_TH3 +292 0x1000 //RX_BWE_V_TH +293 0x04CD //RX_BWE_GAIN1_V_TH1 +294 0x0F33 //RX_BWE_GAIN1_V_TH2 +295 0x7333 //RX_BWE_UV_EQ +296 0x199A //RX_BWE_V_EQ +297 0x7333 //RX_BWE_TONE_TH +298 0x0004 //RX_BWE_UV_HOLD_T +299 0x6CCD //RX_BWE_GAIN2_ALPHA +300 0x799A //RX_BWE_GAIN3_ALPHA +301 0x001E //RX_BWE_CUTOFF +302 0x3000 //RX_BWE_GAINFILL +303 0x3200 //RX_BWE_MAXTH_TONE +304 0x2000 //RX_BWE_EQ_0 +305 0x2000 //RX_BWE_EQ_1 +306 0x2000 //RX_BWE_EQ_2 +307 0x2000 //RX_BWE_EQ_3 +308 0x2000 //RX_BWE_EQ_4 +309 0x2000 //RX_BWE_EQ_5 +310 0x2000 //RX_BWE_EQ_6 +311 0x0000 //RX_BWE_RESRV_0 +312 0x0000 //RX_BWE_RESRV_1 +313 0x0000 //RX_BWE_RESRV_2 +#VOL 0 +163 0x1000 //RX_TDDRC_ALPHA_UP_1 +164 0x1000 //RX_TDDRC_ALPHA_UP_2 +165 0x1000 //RX_TDDRC_ALPHA_UP_3 +166 0x1000 //RX_TDDRC_ALPHA_UP_4 +184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +190 0x7FFF //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +269 0x0000 //RX_TDDRC_THRD_0 +270 0x0000 //RX_TDDRC_THRD_1 +271 0x7FFF //RX_TDDRC_THRD_2 +272 0x7FFF //RX_TDDRC_THRD_3 +273 0x7E70 //RX_TDDRC_SLANT_0 +274 0x7FFF //RX_TDDRC_SLANT_1 +275 0x1000 //RX_TDDRC_ALPHA_UP_0 +276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x199A //RX_TDDRC_HMNC_GAIN +279 0x0001 //RX_TDDRC_SMT_FLAG +280 0x0CCD //RX_TDDRC_SMT_W +281 0x0155 //RX_TDDRC_DRC_GAIN +195 0x001C //RX_FDEQ_SUBNUM +196 0x4848 //RX_FDEQ_GAIN_0 +197 0x4848 //RX_FDEQ_GAIN_1 +198 0x4848 //RX_FDEQ_GAIN_2 +199 0x4848 //RX_FDEQ_GAIN_3 +200 0x4848 //RX_FDEQ_GAIN_4 +201 0x4848 //RX_FDEQ_GAIN_5 +202 0x4848 //RX_FDEQ_GAIN_6 +203 0x4848 //RX_FDEQ_GAIN_7 +204 0x4848 //RX_FDEQ_GAIN_8 +205 0x3C3C //RX_FDEQ_GAIN_9 +206 0x3C3C //RX_FDEQ_GAIN_10 +207 0x3838 //RX_FDEQ_GAIN_11 +208 0x3838 //RX_FDEQ_GAIN_12 +209 0x3030 //RX_FDEQ_GAIN_13 +210 0x4848 //RX_FDEQ_GAIN_14 +211 0x4848 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0202 //RX_FDEQ_BIN_0 +221 0x0203 //RX_FDEQ_BIN_1 +222 0x0303 //RX_FDEQ_BIN_2 +223 0x0304 //RX_FDEQ_BIN_3 +224 0x0405 //RX_FDEQ_BIN_4 +225 0x0506 //RX_FDEQ_BIN_5 +226 0x0708 //RX_FDEQ_BIN_6 +227 0x090A //RX_FDEQ_BIN_7 +228 0x0B0C //RX_FDEQ_BIN_8 +229 0x0D0E //RX_FDEQ_BIN_9 +230 0x0E0F //RX_FDEQ_BIN_10 +231 0x0F10 //RX_FDEQ_BIN_11 +232 0x1011 //RX_FDEQ_BIN_12 +233 0x1112 //RX_FDEQ_BIN_13 +234 0x0000 //RX_FDEQ_BIN_14 +235 0x0000 //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x4000 //RX_FDEQ_RESRV_0 +245 0x0320 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0030 //RX_FDDRC_BAND_MARGIN_1 +248 0x0050 //RX_FDDRC_BAND_MARGIN_2 +249 0x0080 //RX_FDDRC_BAND_MARGIN_3 +250 0x0007 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x5000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x6400 //RX_FDDRC_THRD_3_2 +258 0x6400 //RX_FDDRC_THRD_3_3 +259 0x2000 //RX_FDDRC_SLANT_0_0 +260 0x2000 //RX_FDDRC_SLANT_0_1 +261 0x2000 //RX_FDDRC_SLANT_0_2 +262 0x2000 //RX_FDDRC_SLANT_0_3 +263 0x5333 //RX_FDDRC_SLANT_1_0 +264 0x5333 //RX_FDDRC_SLANT_1_1 +265 0x5333 //RX_FDDRC_SLANT_1_2 +266 0x5333 //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +286 0x0100 //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 +#VOL 1 +163 0x1000 //RX_TDDRC_ALPHA_UP_1 +164 0x1000 //RX_TDDRC_ALPHA_UP_2 +165 0x1000 //RX_TDDRC_ALPHA_UP_3 +166 0x1000 //RX_TDDRC_ALPHA_UP_4 +184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +190 0x7FFF //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +269 0x0000 //RX_TDDRC_THRD_0 +270 0x0000 //RX_TDDRC_THRD_1 +271 0x7FFF //RX_TDDRC_THRD_2 +272 0x7FFF //RX_TDDRC_THRD_3 +273 0x7E70 //RX_TDDRC_SLANT_0 +274 0x7FFF //RX_TDDRC_SLANT_1 +275 0x1000 //RX_TDDRC_ALPHA_UP_0 +276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x199A //RX_TDDRC_HMNC_GAIN +279 0x0001 //RX_TDDRC_SMT_FLAG +280 0x0CCD //RX_TDDRC_SMT_W +281 0x0155 //RX_TDDRC_DRC_GAIN +195 0x001C //RX_FDEQ_SUBNUM +196 0x4848 //RX_FDEQ_GAIN_0 +197 0x4848 //RX_FDEQ_GAIN_1 +198 0x4848 //RX_FDEQ_GAIN_2 +199 0x4848 //RX_FDEQ_GAIN_3 +200 0x4848 //RX_FDEQ_GAIN_4 +201 0x4848 //RX_FDEQ_GAIN_5 +202 0x4848 //RX_FDEQ_GAIN_6 +203 0x4848 //RX_FDEQ_GAIN_7 +204 0x4848 //RX_FDEQ_GAIN_8 +205 0x3C3C //RX_FDEQ_GAIN_9 +206 0x3C3C //RX_FDEQ_GAIN_10 +207 0x3838 //RX_FDEQ_GAIN_11 +208 0x3838 //RX_FDEQ_GAIN_12 +209 0x3030 //RX_FDEQ_GAIN_13 +210 0x4848 //RX_FDEQ_GAIN_14 +211 0x4848 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0202 //RX_FDEQ_BIN_0 +221 0x0203 //RX_FDEQ_BIN_1 +222 0x0303 //RX_FDEQ_BIN_2 +223 0x0304 //RX_FDEQ_BIN_3 +224 0x0405 //RX_FDEQ_BIN_4 +225 0x0506 //RX_FDEQ_BIN_5 +226 0x0708 //RX_FDEQ_BIN_6 +227 0x090A //RX_FDEQ_BIN_7 +228 0x0B0C //RX_FDEQ_BIN_8 +229 0x0D0E //RX_FDEQ_BIN_9 +230 0x0E0F //RX_FDEQ_BIN_10 +231 0x0F10 //RX_FDEQ_BIN_11 +232 0x1011 //RX_FDEQ_BIN_12 +233 0x1112 //RX_FDEQ_BIN_13 +234 0x0000 //RX_FDEQ_BIN_14 +235 0x0000 //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x4000 //RX_FDEQ_RESRV_0 +245 0x0320 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0030 //RX_FDDRC_BAND_MARGIN_1 +248 0x0050 //RX_FDDRC_BAND_MARGIN_2 +249 0x0080 //RX_FDDRC_BAND_MARGIN_3 +250 0x0007 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x5000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x6400 //RX_FDDRC_THRD_3_2 +258 0x6400 //RX_FDDRC_THRD_3_3 +259 0x2000 //RX_FDDRC_SLANT_0_0 +260 0x2000 //RX_FDDRC_SLANT_0_1 +261 0x2000 //RX_FDDRC_SLANT_0_2 +262 0x2000 //RX_FDDRC_SLANT_0_3 +263 0x5333 //RX_FDDRC_SLANT_1_0 +264 0x5333 //RX_FDDRC_SLANT_1_1 +265 0x5333 //RX_FDDRC_SLANT_1_2 +266 0x5333 //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +286 0x0100 //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 +#VOL 2 +163 0x1000 //RX_TDDRC_ALPHA_UP_1 +164 0x1000 //RX_TDDRC_ALPHA_UP_2 +165 0x1000 //RX_TDDRC_ALPHA_UP_3 +166 0x1000 //RX_TDDRC_ALPHA_UP_4 +184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +190 0x7FFF //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +269 0x0000 //RX_TDDRC_THRD_0 +270 0x0000 //RX_TDDRC_THRD_1 +271 0x7FFF //RX_TDDRC_THRD_2 +272 0x7FFF //RX_TDDRC_THRD_3 +273 0x7E70 //RX_TDDRC_SLANT_0 +274 0x7FFF //RX_TDDRC_SLANT_1 +275 0x1000 //RX_TDDRC_ALPHA_UP_0 +276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x199A //RX_TDDRC_HMNC_GAIN +279 0x0001 //RX_TDDRC_SMT_FLAG +280 0x0CCD //RX_TDDRC_SMT_W +281 0x0155 //RX_TDDRC_DRC_GAIN +195 0x001C //RX_FDEQ_SUBNUM +196 0x4848 //RX_FDEQ_GAIN_0 +197 0x4848 //RX_FDEQ_GAIN_1 +198 0x4848 //RX_FDEQ_GAIN_2 +199 0x4848 //RX_FDEQ_GAIN_3 +200 0x4848 //RX_FDEQ_GAIN_4 +201 0x4848 //RX_FDEQ_GAIN_5 +202 0x4848 //RX_FDEQ_GAIN_6 +203 0x4848 //RX_FDEQ_GAIN_7 +204 0x4848 //RX_FDEQ_GAIN_8 +205 0x3C3C //RX_FDEQ_GAIN_9 +206 0x3C3C //RX_FDEQ_GAIN_10 +207 0x3838 //RX_FDEQ_GAIN_11 +208 0x3838 //RX_FDEQ_GAIN_12 +209 0x3030 //RX_FDEQ_GAIN_13 +210 0x4848 //RX_FDEQ_GAIN_14 +211 0x4848 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0202 //RX_FDEQ_BIN_0 +221 0x0203 //RX_FDEQ_BIN_1 +222 0x0303 //RX_FDEQ_BIN_2 +223 0x0304 //RX_FDEQ_BIN_3 +224 0x0405 //RX_FDEQ_BIN_4 +225 0x0506 //RX_FDEQ_BIN_5 +226 0x0708 //RX_FDEQ_BIN_6 +227 0x090A //RX_FDEQ_BIN_7 +228 0x0B0C //RX_FDEQ_BIN_8 +229 0x0D0E //RX_FDEQ_BIN_9 +230 0x0E0F //RX_FDEQ_BIN_10 +231 0x0F10 //RX_FDEQ_BIN_11 +232 0x1011 //RX_FDEQ_BIN_12 +233 0x1112 //RX_FDEQ_BIN_13 +234 0x0000 //RX_FDEQ_BIN_14 +235 0x0000 //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x4000 //RX_FDEQ_RESRV_0 +245 0x0320 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0030 //RX_FDDRC_BAND_MARGIN_1 +248 0x0050 //RX_FDDRC_BAND_MARGIN_2 +249 0x0080 //RX_FDDRC_BAND_MARGIN_3 +250 0x0007 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x5000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x6400 //RX_FDDRC_THRD_3_2 +258 0x6400 //RX_FDDRC_THRD_3_3 +259 0x2000 //RX_FDDRC_SLANT_0_0 +260 0x2000 //RX_FDDRC_SLANT_0_1 +261 0x2000 //RX_FDDRC_SLANT_0_2 +262 0x2000 //RX_FDDRC_SLANT_0_3 +263 0x5333 //RX_FDDRC_SLANT_1_0 +264 0x5333 //RX_FDDRC_SLANT_1_1 +265 0x5333 //RX_FDDRC_SLANT_1_2 +266 0x5333 //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +286 0x0100 //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 +#VOL 3 +163 0x1000 //RX_TDDRC_ALPHA_UP_1 +164 0x1000 //RX_TDDRC_ALPHA_UP_2 +165 0x1000 //RX_TDDRC_ALPHA_UP_3 +166 0x1000 //RX_TDDRC_ALPHA_UP_4 +184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +190 0x7FFF //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +269 0x0000 //RX_TDDRC_THRD_0 +270 0x0000 //RX_TDDRC_THRD_1 +271 0x7FFF //RX_TDDRC_THRD_2 +272 0x7FFF //RX_TDDRC_THRD_3 +273 0x7E70 //RX_TDDRC_SLANT_0 +274 0x7FFF //RX_TDDRC_SLANT_1 +275 0x1000 //RX_TDDRC_ALPHA_UP_0 +276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x199A //RX_TDDRC_HMNC_GAIN +279 0x0001 //RX_TDDRC_SMT_FLAG +280 0x0CCD //RX_TDDRC_SMT_W +281 0x0155 //RX_TDDRC_DRC_GAIN +195 0x001C //RX_FDEQ_SUBNUM +196 0x4848 //RX_FDEQ_GAIN_0 +197 0x4848 //RX_FDEQ_GAIN_1 +198 0x4848 //RX_FDEQ_GAIN_2 +199 0x4848 //RX_FDEQ_GAIN_3 +200 0x4848 //RX_FDEQ_GAIN_4 +201 0x4848 //RX_FDEQ_GAIN_5 +202 0x4848 //RX_FDEQ_GAIN_6 +203 0x4848 //RX_FDEQ_GAIN_7 +204 0x4848 //RX_FDEQ_GAIN_8 +205 0x3C3C //RX_FDEQ_GAIN_9 +206 0x3C3C //RX_FDEQ_GAIN_10 +207 0x3838 //RX_FDEQ_GAIN_11 +208 0x3838 //RX_FDEQ_GAIN_12 +209 0x3030 //RX_FDEQ_GAIN_13 +210 0x4848 //RX_FDEQ_GAIN_14 +211 0x4848 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0202 //RX_FDEQ_BIN_0 +221 0x0203 //RX_FDEQ_BIN_1 +222 0x0303 //RX_FDEQ_BIN_2 +223 0x0304 //RX_FDEQ_BIN_3 +224 0x0405 //RX_FDEQ_BIN_4 +225 0x0506 //RX_FDEQ_BIN_5 +226 0x0708 //RX_FDEQ_BIN_6 +227 0x090A //RX_FDEQ_BIN_7 +228 0x0B0C //RX_FDEQ_BIN_8 +229 0x0D0E //RX_FDEQ_BIN_9 +230 0x0E0F //RX_FDEQ_BIN_10 +231 0x0F10 //RX_FDEQ_BIN_11 +232 0x1011 //RX_FDEQ_BIN_12 +233 0x1112 //RX_FDEQ_BIN_13 +234 0x0000 //RX_FDEQ_BIN_14 +235 0x0000 //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x4000 //RX_FDEQ_RESRV_0 +245 0x0320 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0030 //RX_FDDRC_BAND_MARGIN_1 +248 0x0050 //RX_FDDRC_BAND_MARGIN_2 +249 0x0080 //RX_FDDRC_BAND_MARGIN_3 +250 0x0007 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x5000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x6400 //RX_FDDRC_THRD_3_2 +258 0x6400 //RX_FDDRC_THRD_3_3 +259 0x2000 //RX_FDDRC_SLANT_0_0 +260 0x2000 //RX_FDDRC_SLANT_0_1 +261 0x2000 //RX_FDDRC_SLANT_0_2 +262 0x2000 //RX_FDDRC_SLANT_0_3 +263 0x5333 //RX_FDDRC_SLANT_1_0 +264 0x5333 //RX_FDDRC_SLANT_1_1 +265 0x5333 //RX_FDDRC_SLANT_1_2 +266 0x5333 //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +286 0x0100 //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 +#VOL 4 +163 0x1000 //RX_TDDRC_ALPHA_UP_1 +164 0x1000 //RX_TDDRC_ALPHA_UP_2 +165 0x1000 //RX_TDDRC_ALPHA_UP_3 +166 0x1000 //RX_TDDRC_ALPHA_UP_4 +184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +190 0x7FFF //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +269 0x0000 //RX_TDDRC_THRD_0 +270 0x0000 //RX_TDDRC_THRD_1 +271 0x7FFF //RX_TDDRC_THRD_2 +272 0x7FFF //RX_TDDRC_THRD_3 +273 0x7E70 //RX_TDDRC_SLANT_0 +274 0x7FFF //RX_TDDRC_SLANT_1 +275 0x1000 //RX_TDDRC_ALPHA_UP_0 +276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x199A //RX_TDDRC_HMNC_GAIN +279 0x0001 //RX_TDDRC_SMT_FLAG +280 0x0CCD //RX_TDDRC_SMT_W +281 0x0155 //RX_TDDRC_DRC_GAIN +195 0x001C //RX_FDEQ_SUBNUM +196 0x4848 //RX_FDEQ_GAIN_0 +197 0x4848 //RX_FDEQ_GAIN_1 +198 0x4848 //RX_FDEQ_GAIN_2 +199 0x4848 //RX_FDEQ_GAIN_3 +200 0x4848 //RX_FDEQ_GAIN_4 +201 0x4848 //RX_FDEQ_GAIN_5 +202 0x4848 //RX_FDEQ_GAIN_6 +203 0x4848 //RX_FDEQ_GAIN_7 +204 0x4848 //RX_FDEQ_GAIN_8 +205 0x3C3C //RX_FDEQ_GAIN_9 +206 0x3C3C //RX_FDEQ_GAIN_10 +207 0x3838 //RX_FDEQ_GAIN_11 +208 0x3838 //RX_FDEQ_GAIN_12 +209 0x3030 //RX_FDEQ_GAIN_13 +210 0x4848 //RX_FDEQ_GAIN_14 +211 0x4848 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0202 //RX_FDEQ_BIN_0 +221 0x0203 //RX_FDEQ_BIN_1 +222 0x0303 //RX_FDEQ_BIN_2 +223 0x0304 //RX_FDEQ_BIN_3 +224 0x0405 //RX_FDEQ_BIN_4 +225 0x0506 //RX_FDEQ_BIN_5 +226 0x0708 //RX_FDEQ_BIN_6 +227 0x090A //RX_FDEQ_BIN_7 +228 0x0B0C //RX_FDEQ_BIN_8 +229 0x0D0E //RX_FDEQ_BIN_9 +230 0x0E0F //RX_FDEQ_BIN_10 +231 0x0F10 //RX_FDEQ_BIN_11 +232 0x1011 //RX_FDEQ_BIN_12 +233 0x1112 //RX_FDEQ_BIN_13 +234 0x0000 //RX_FDEQ_BIN_14 +235 0x0000 //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x4000 //RX_FDEQ_RESRV_0 +245 0x0320 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0030 //RX_FDDRC_BAND_MARGIN_1 +248 0x0050 //RX_FDDRC_BAND_MARGIN_2 +249 0x0080 //RX_FDDRC_BAND_MARGIN_3 +250 0x0007 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x5000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x6400 //RX_FDDRC_THRD_3_2 +258 0x6400 //RX_FDDRC_THRD_3_3 +259 0x2000 //RX_FDDRC_SLANT_0_0 +260 0x2000 //RX_FDDRC_SLANT_0_1 +261 0x2000 //RX_FDDRC_SLANT_0_2 +262 0x2000 //RX_FDDRC_SLANT_0_3 +263 0x5333 //RX_FDDRC_SLANT_1_0 +264 0x5333 //RX_FDDRC_SLANT_1_1 +265 0x5333 //RX_FDDRC_SLANT_1_2 +266 0x5333 //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +286 0x0100 //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 +#VOL 5 +163 0x1000 //RX_TDDRC_ALPHA_UP_1 +164 0x1000 //RX_TDDRC_ALPHA_UP_2 +165 0x1000 //RX_TDDRC_ALPHA_UP_3 +166 0x1000 //RX_TDDRC_ALPHA_UP_4 +184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +190 0x7FFF //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +269 0x0000 //RX_TDDRC_THRD_0 +270 0x0000 //RX_TDDRC_THRD_1 +271 0x7FFF //RX_TDDRC_THRD_2 +272 0x7FFF //RX_TDDRC_THRD_3 +273 0x7E70 //RX_TDDRC_SLANT_0 +274 0x7FFF //RX_TDDRC_SLANT_1 +275 0x1000 //RX_TDDRC_ALPHA_UP_0 +276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x199A //RX_TDDRC_HMNC_GAIN +279 0x0001 //RX_TDDRC_SMT_FLAG +280 0x0CCD //RX_TDDRC_SMT_W +281 0x0155 //RX_TDDRC_DRC_GAIN +195 0x001C //RX_FDEQ_SUBNUM +196 0x4848 //RX_FDEQ_GAIN_0 +197 0x4848 //RX_FDEQ_GAIN_1 +198 0x4848 //RX_FDEQ_GAIN_2 +199 0x4848 //RX_FDEQ_GAIN_3 +200 0x4848 //RX_FDEQ_GAIN_4 +201 0x4848 //RX_FDEQ_GAIN_5 +202 0x4848 //RX_FDEQ_GAIN_6 +203 0x4848 //RX_FDEQ_GAIN_7 +204 0x4848 //RX_FDEQ_GAIN_8 +205 0x3C3C //RX_FDEQ_GAIN_9 +206 0x3C3C //RX_FDEQ_GAIN_10 +207 0x3838 //RX_FDEQ_GAIN_11 +208 0x3838 //RX_FDEQ_GAIN_12 +209 0x3030 //RX_FDEQ_GAIN_13 +210 0x4848 //RX_FDEQ_GAIN_14 +211 0x4848 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0202 //RX_FDEQ_BIN_0 +221 0x0203 //RX_FDEQ_BIN_1 +222 0x0303 //RX_FDEQ_BIN_2 +223 0x0304 //RX_FDEQ_BIN_3 +224 0x0405 //RX_FDEQ_BIN_4 +225 0x0506 //RX_FDEQ_BIN_5 +226 0x0708 //RX_FDEQ_BIN_6 +227 0x090A //RX_FDEQ_BIN_7 +228 0x0B0C //RX_FDEQ_BIN_8 +229 0x0D0E //RX_FDEQ_BIN_9 +230 0x0E0F //RX_FDEQ_BIN_10 +231 0x0F10 //RX_FDEQ_BIN_11 +232 0x1011 //RX_FDEQ_BIN_12 +233 0x1112 //RX_FDEQ_BIN_13 +234 0x0000 //RX_FDEQ_BIN_14 +235 0x0000 //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x4000 //RX_FDEQ_RESRV_0 +245 0x0320 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0030 //RX_FDDRC_BAND_MARGIN_1 +248 0x0050 //RX_FDDRC_BAND_MARGIN_2 +249 0x0080 //RX_FDDRC_BAND_MARGIN_3 +250 0x0007 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x5000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x6400 //RX_FDDRC_THRD_3_2 +258 0x6400 //RX_FDDRC_THRD_3_3 +259 0x2000 //RX_FDDRC_SLANT_0_0 +260 0x2000 //RX_FDDRC_SLANT_0_1 +261 0x2000 //RX_FDDRC_SLANT_0_2 +262 0x2000 //RX_FDDRC_SLANT_0_3 +263 0x5333 //RX_FDDRC_SLANT_1_0 +264 0x5333 //RX_FDDRC_SLANT_1_1 +265 0x5333 //RX_FDDRC_SLANT_1_2 +266 0x5333 //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +286 0x0100 //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 +#VOL 6 +163 0x1000 //RX_TDDRC_ALPHA_UP_1 +164 0x1000 //RX_TDDRC_ALPHA_UP_2 +165 0x1000 //RX_TDDRC_ALPHA_UP_3 +166 0x1000 //RX_TDDRC_ALPHA_UP_4 +184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +190 0x7FFF //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +269 0x0000 //RX_TDDRC_THRD_0 +270 0x0000 //RX_TDDRC_THRD_1 +271 0x7FFF //RX_TDDRC_THRD_2 +272 0x7FFF //RX_TDDRC_THRD_3 +273 0x7E70 //RX_TDDRC_SLANT_0 +274 0x7FFF //RX_TDDRC_SLANT_1 +275 0x1000 //RX_TDDRC_ALPHA_UP_0 +276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x199A //RX_TDDRC_HMNC_GAIN +279 0x0001 //RX_TDDRC_SMT_FLAG +280 0x0CCD //RX_TDDRC_SMT_W +281 0x0155 //RX_TDDRC_DRC_GAIN +195 0x001C //RX_FDEQ_SUBNUM +196 0x4848 //RX_FDEQ_GAIN_0 +197 0x4848 //RX_FDEQ_GAIN_1 +198 0x4848 //RX_FDEQ_GAIN_2 +199 0x4848 //RX_FDEQ_GAIN_3 +200 0x4848 //RX_FDEQ_GAIN_4 +201 0x4848 //RX_FDEQ_GAIN_5 +202 0x4848 //RX_FDEQ_GAIN_6 +203 0x4848 //RX_FDEQ_GAIN_7 +204 0x4848 //RX_FDEQ_GAIN_8 +205 0x3C3C //RX_FDEQ_GAIN_9 +206 0x3C3C //RX_FDEQ_GAIN_10 +207 0x3838 //RX_FDEQ_GAIN_11 +208 0x3838 //RX_FDEQ_GAIN_12 +209 0x3030 //RX_FDEQ_GAIN_13 +210 0x4848 //RX_FDEQ_GAIN_14 +211 0x4848 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0202 //RX_FDEQ_BIN_0 +221 0x0203 //RX_FDEQ_BIN_1 +222 0x0303 //RX_FDEQ_BIN_2 +223 0x0304 //RX_FDEQ_BIN_3 +224 0x0405 //RX_FDEQ_BIN_4 +225 0x0506 //RX_FDEQ_BIN_5 +226 0x0708 //RX_FDEQ_BIN_6 +227 0x090A //RX_FDEQ_BIN_7 +228 0x0B0C //RX_FDEQ_BIN_8 +229 0x0D0E //RX_FDEQ_BIN_9 +230 0x0E0F //RX_FDEQ_BIN_10 +231 0x0F10 //RX_FDEQ_BIN_11 +232 0x1011 //RX_FDEQ_BIN_12 +233 0x1112 //RX_FDEQ_BIN_13 +234 0x0000 //RX_FDEQ_BIN_14 +235 0x0000 //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x4000 //RX_FDEQ_RESRV_0 +245 0x0320 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0030 //RX_FDDRC_BAND_MARGIN_1 +248 0x0050 //RX_FDDRC_BAND_MARGIN_2 +249 0x0080 //RX_FDDRC_BAND_MARGIN_3 +250 0x0007 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x5000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x6400 //RX_FDDRC_THRD_3_2 +258 0x6400 //RX_FDDRC_THRD_3_3 +259 0x2000 //RX_FDDRC_SLANT_0_0 +260 0x2000 //RX_FDDRC_SLANT_0_1 +261 0x2000 //RX_FDDRC_SLANT_0_2 +262 0x2000 //RX_FDDRC_SLANT_0_3 +263 0x5333 //RX_FDDRC_SLANT_1_0 +264 0x5333 //RX_FDDRC_SLANT_1_1 +265 0x5333 //RX_FDDRC_SLANT_1_2 +266 0x5333 //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +286 0x0100 //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 #CASE_NAME BLUETOOTH-BT_HAC-VOICE_GENERIC-SWB -#PARAM_TYPE TX+RX -#TOTAL_CUSTOM_STEP 7 +#PARAM_MODE Full +#PARAM_TYPE TX+2RX +#TOTAL_CUSTOM_STEP 7+7 #TX 0 0x0001 //TX_OPERATION_MODE_0 1 0x0001 //TX_OPERATION_MODE_1 @@ -5519,10 +8271,10 @@ 250 0x0100 //TX_DELTA_THR_SN_EST_0 251 0x0100 //TX_DELTA_THR_SN_EST_1 252 0x0100 //TX_DELTA_THR_SN_EST_2 -253 0x0100 //TX_DELTA_THR_SN_EST_3 -254 0x0000 //TX_DELTA_THR_SN_EST_4 -255 0x0100 //TX_DELTA_THR_SN_EST_5 -256 0x0200 //TX_DELTA_THR_SN_EST_6 +253 0x0000 //TX_DELTA_THR_SN_EST_3 +254 0x0100 //TX_DELTA_THR_SN_EST_4 +255 0x0200 //TX_DELTA_THR_SN_EST_5 +256 0x0100 //TX_DELTA_THR_SN_EST_6 257 0x0200 //TX_DELTA_THR_SN_EST_7 258 0x4000 //TX_LAMBDA_NN_EST_0 259 0x4000 //TX_LAMBDA_NN_EST_1 @@ -5549,11 +8301,11 @@ 280 0x1000 //TX_B_POST_FLT_1 281 0x0010 //TX_NS_LVL_CTRL_0 282 0x003C //TX_NS_LVL_CTRL_1 -283 0x003C //TX_NS_LVL_CTRL_2 -284 0x0024 //TX_NS_LVL_CTRL_3 -285 0x003C //TX_NS_LVL_CTRL_4 -286 0x0014 //TX_NS_LVL_CTRL_5 -287 0x0011 //TX_NS_LVL_CTRL_6 +283 0x0024 //TX_NS_LVL_CTRL_2 +284 0x003C //TX_NS_LVL_CTRL_3 +285 0x0014 //TX_NS_LVL_CTRL_4 +286 0x0011 //TX_NS_LVL_CTRL_5 +287 0x003C //TX_NS_LVL_CTRL_6 288 0x0011 //TX_NS_LVL_CTRL_7 289 0x000F //TX_MIN_GAIN_S_0 290 0x0010 //TX_MIN_GAIN_S_1 @@ -5569,10 +8321,10 @@ 300 0x7FFF //TX_SNRI_SUP_0 301 0x1400 //TX_SNRI_SUP_1 302 0x1400 //TX_SNRI_SUP_2 -303 0x1400 //TX_SNRI_SUP_3 +303 0x4000 //TX_SNRI_SUP_3 304 0x4000 //TX_SNRI_SUP_4 -305 0x4000 //TX_SNRI_SUP_5 -306 0x50C0 //TX_SNRI_SUP_6 +305 0x50C0 //TX_SNRI_SUP_5 +306 0x1400 //TX_SNRI_SUP_6 307 0x7FFF //TX_SNRI_SUP_7 308 0x7FFF //TX_THR_LFNS 309 0x0018 //TX_G_LFNS @@ -5581,19 +8333,19 @@ 312 0x7FFF //TX_A_POST_FILT_0 313 0x2000 //TX_A_POST_FILT_1 314 0x5000 //TX_A_POST_FILT_S_0 -315 0x7C00 //TX_A_POST_FILT_S_1 -316 0x4C00 //TX_A_POST_FILT_S_2 -317 0x4000 //TX_A_POST_FILT_S_3 -318 0x6000 //TX_A_POST_FILT_S_4 -319 0x4000 //TX_A_POST_FILT_S_5 -320 0x5000 //TX_A_POST_FILT_S_6 +315 0x4C00 //TX_A_POST_FILT_S_1 +316 0x4000 //TX_A_POST_FILT_S_2 +317 0x6000 //TX_A_POST_FILT_S_3 +318 0x4000 //TX_A_POST_FILT_S_4 +319 0x5000 //TX_A_POST_FILT_S_5 +320 0x7C00 //TX_A_POST_FILT_S_6 321 0x7000 //TX_A_POST_FILT_S_7 322 0x2000 //TX_B_POST_FILT_0 -323 0x1000 //TX_B_POST_FILT_1 +323 0x6000 //TX_B_POST_FILT_1 324 0x6000 //TX_B_POST_FILT_2 325 0x6000 //TX_B_POST_FILT_3 -326 0x6000 //TX_B_POST_FILT_4 -327 0x4000 //TX_B_POST_FILT_5 +326 0x4000 //TX_B_POST_FILT_4 +327 0x1000 //TX_B_POST_FILT_5 328 0x1000 //TX_B_POST_FILT_6 329 0x2000 //TX_B_POST_FILT_7 330 0x4000 //TX_B_LESSCUT_RTO_S_0 @@ -5601,8 +8353,8 @@ 332 0x7FFF //TX_B_LESSCUT_RTO_S_2 333 0x7FFF //TX_B_LESSCUT_RTO_S_3 334 0x7FFF //TX_B_LESSCUT_RTO_S_4 -335 0x7FFF //TX_B_LESSCUT_RTO_S_5 -336 0x6000 //TX_B_LESSCUT_RTO_S_6 +335 0x6000 //TX_B_LESSCUT_RTO_S_5 +336 0x7FFF //TX_B_LESSCUT_RTO_S_6 337 0x7FFF //TX_B_LESSCUT_RTO_S_7 338 0x7C00 //TX_LAMBDA_PFILT 339 0x7D00 //TX_LAMBDA_PFILT_S_0 @@ -5646,10 +8398,10 @@ 377 0x7FFF //TX_NOISE_TH_5_4 378 0x0DAC //TX_NOISE_TH_6 379 0x0050 //TX_MINENOISE_TH -380 0x4000 //TX_MINENOISE_MIC0_TH_MTS -381 0xFFEE //TX_MINENOISE_MIC0_TH_EXP -382 0x6000 //TX_MINENOISE_MIC0_S_TH_MTS -383 0xFFF3 //TX_MINENOISE_MIC0_S_TH_EXP +380 0x4000 //TX_MORENS_TFMASK_TH +381 0xFFEE //TX_DRC_QUIET_FLOOR +382 0x6000 //TX_RATIODTL_CUT_TH +383 0xFFF3 //TX_DT_CUT_K1 384 0x0666 //TX_OUT_ENER_S_TH_CLEAN 385 0x0666 //TX_OUT_ENER_S_TH_LESSCLEAN 386 0x0333 //TX_OUT_ENER_S_TH_NOISY @@ -5657,15 +8409,15 @@ 388 0x0333 //TX_OUT_ENER_TH_SPEECH 389 0x2000 //TX_SN_NPB_GAIN 390 0x0000 //TX_NN_NPB_GAIN -391 0x0000 //TX_CSX_ALPHA_0 -392 0x0000 //TX_CSX_ALPHA_1 -393 0x0000 //TX_CSX_ALPHA_2 -394 0x0000 //TX_CSX_ALPHA_3 -395 0x0800 //TX_MU_ARSP_EST -396 0x00C8 //TX_P_OUTBEAM_MIN_TH +391 0x0000 //TX_POST_MASK_SUP_HSNE +392 0x0000 //TX_TAIL_DET_TH +393 0x0000 //TX_B_LESSCUT_RTO_WTA +394 0x0000 //TX_MEL_G_R +395 0x0800 //TX_SUPHIGH_TH +396 0x00C8 //TX_MASK_G_R 397 0x0002 //TX_EXTRA_NS_L -398 0x0800 //TX_EXTRA_NS_A -399 0x0005 //TX_VR_NOISE_FLOOR_TH +398 0x0800 //TX_C_POST_FLT_MASK +399 0x0005 //TX_A_POST_FLT_WNS 400 0x0148 //TX_MIN_G_LOW300HZ 401 0x0001 //TX_MAXLEVEL_CNG 402 0x00B4 //TX_STN_NOISE_TH @@ -5780,16 +8532,16 @@ 511 0x6666 //TX_MIC_TO_BFGAIN 512 0x0000 //TX_MICTOBFGAIN0 513 0x0000 //TX_FASTMUE_TH -514 0x0000 //TX_DERVB_LEN_0 -515 0x0000 //TX_DERVB_LEN_1 -516 0x0000 //TX_RHO_DERVB -517 0x0000 //TX_MIC_INDX_DERVB -518 0x0000 //TX_MU_DERVB -519 0x0000 //TX_DR_RESRV_0 -520 0x0000 //TX_DR_RESRV_1 -521 0x0000 //TX_DR_RESRV_2 -522 0x0000 //TX_DR_RESRV_3 -523 0x0000 //TX_DR_RESRV_4 +514 0x0000 //TX_DEREVERB_LF_MU +515 0x0000 //TX_DEREVERB_HF_MU +516 0x0000 //TX_DEREVERB_DELAY +517 0x0000 //TX_DEREVERB_COEF_LEN +518 0x0000 //TX_DEREVERB_DNR +519 0x0000 //TX_DEREVERB_ALPHA +520 0x0000 //TX_DEREVERB_BETA +521 0x0000 //TX_GSC_RTOL_TH +522 0x0000 //TX_GSC_RTOH_TH +523 0x0000 //TX_WIDE2_MEANHTH 524 0x0000 //TX_DR_RESRV_5 525 0x0000 //TX_DR_RESRV_6 526 0x0000 //TX_DR_RESRV_7 @@ -6163,8 +8915,73 @@ 894 0xC000 //TX_FASTNS_SSA_THHFL 895 0xCCCC //TX_FASTNS_SSA_THLFH 896 0xD999 //TX_FASTNS_SSA_THHFH +897 0x0000 //TX_SENDFUNC_REG_MICMUTE +898 0x0000 //TX_SENDFUNC_REG_MICMUTE1 +899 0x0000 //TX_MICMUTE_RATIO_THR +900 0x0000 //TX_MICMUTE_AMP_THR +901 0x0000 //TX_MICMUTE_HPF_IND +902 0x0000 //TX_MICMUTE_LOG_EYR_TH +903 0x0000 //TX_MICMUTE_CVG_TIME +904 0x0000 //TX_MICMUTE_RELEASE_TIME +905 0x0000 //TX_MIC_VOLUME_MIC0MUTE +906 0x0000 //TX_MICMUTE_EPD_OFFSET_0 +907 0x0000 //TX_MICMUTE_FRQ_AEC_L +908 0x0000 //TX_MICMUTE_EAD_THR +909 0x0000 //TX_MICMUTE_LAMBDA_CB_NLE +910 0x0000 //TX_MICMUTE_LAMBDA_RE_EST +911 0x0000 //TX_DTD_THR1_MICMUTE_0 +912 0x0000 //TX_DTD_THR1_MICMUTE_1 +913 0x0000 //TX_DTD_THR1_MICMUTE_2 +914 0x0000 //TX_DTD_THR1_MICMUTE_3 +915 0x0000 //TX_DTD_THR2_MICMUTE_0 +916 0x0000 //TX_MICMUTE_MIN_EQ_RE_EST_0 +917 0x0000 //TX_MICMUTE_MIN_EQ_RE_EST_1 +918 0x0000 //TX_MICMUTE_MIN_EQ_RE_EST_2 +919 0x0000 //TX_MICMUTE_MIN_EQ_RE_EST_3 +920 0x0000 //TX_MICMUTE_MIN_EQ_RE_EST_4 +921 0x0000 //TX_MICMUTE_C_POST_FLT +922 0x0000 //TX_MICMUTE_DT_CUT_K +923 0x0000 //TX_MICMUTE_DT_CUT_THR +924 0x0000 //TX_MICMUTE_DT_CUT_K2 +925 0x0000 //TX_MICMUTE_DT_CUT_THR2 +926 0x0000 //TX_MICMUTE_DT2_HOLD_N +927 0x0000 //TX_MICMUTE_RATIODTH_THCUT +928 0x0000 //TX_MICMUTE_B_POST_FLT_ECHOL +929 0x0000 //TX_MICMUTE_B_POST_FLT_ECHOH +930 0x0000 //TX_MICMUTE_C_POST_FLT_MASK +931 0x0000 //TX_MICMUTE_RATIODTL_CUT_TH +932 0x0000 //TX_MICMUTE_DT_CUT_K1 +933 0x0000 //TX_MICMUTE_N2_SN_EST +934 0x0000 //TX_MICMUTE_THR_SN_EST_0 +935 0x0000 //TX_MICMUTE_MIN_G_CTRL_0 +936 0x0000 //TX_MICMUTE_A_POST_FILT_S_0 +937 0x0000 //TX_MICMUTE_B_POST_FILT_0 +938 0x0000 //TX_MIC1RUB_AMP_THR +939 0x0000 //TX_MIC1MUTE_RATIO_THR +940 0x0000 //TX_MIC1MUTE_AMP_THR +941 0x0000 //TX_MIC1MUTE_CVG_TIME +942 0x0000 //TX_MIC1MUTE_RELEASE_TIME +943 0x0000 //TX_AMS_RESRV_01 +944 0x0000 //TX_AMS_RESRV_02 +945 0x0000 //TX_AMS_RESRV_03 +946 0x0000 //TX_AMS_RESRV_04 +947 0x0000 //TX_AMS_RESRV_05 +948 0x0000 //TX_AMS_RESRV_06 +949 0x0000 //TX_AMS_RESRV_07 +950 0x0000 //TX_AMS_RESRV_08 +951 0x0000 //TX_AMS_RESRV_09 +952 0x0000 //TX_AMS_RESRV_10 +953 0x0000 //TX_AMS_RESRV_11 +954 0x0000 //TX_AMS_RESRV_12 +955 0x0000 //TX_AMS_RESRV_13 +956 0x0000 //TX_AMS_RESRV_14 +957 0x0000 //TX_AMS_RESRV_15 +958 0x0000 //TX_AMS_RESRV_16 +959 0x0000 //TX_AMS_RESRV_17 +960 0x0000 //TX_AMS_RESRV_18 +961 0x0000 //TX_AMS_RESRV_19 #RX -0 0x0064 //RX_RECVFUNC_MODE_0 +0 0x2064 //RX_RECVFUNC_MODE_0 1 0x0000 //RX_RECVFUNC_MODE_1 2 0x0003 //RX_SAMPLINGFREQ_SIG 3 0x0003 //RX_SAMPLINGFREQ_PROC @@ -7014,10 +9831,862 @@ 110 0x0000 //RX_FDDRC_RESRV_0 129 0x0100 //RX_SPK_VOL 130 0x0000 //RX_VOL_RESRV_0 +#RX 2 +157 0x2064 //RX_RECVFUNC_MODE_0 +158 0x0000 //RX_RECVFUNC_MODE_1 +159 0x0003 //RX_SAMPLINGFREQ_SIG +160 0x0003 //RX_SAMPLINGFREQ_PROC +161 0x000A //RX_FRAME_SZ +162 0x0000 //RX_DELAY_OPT +163 0x3000 //RX_TDDRC_ALPHA_UP_1 +164 0x3000 //RX_TDDRC_ALPHA_UP_2 +165 0x3000 //RX_TDDRC_ALPHA_UP_3 +166 0x3000 //RX_TDDRC_ALPHA_UP_4 +167 0x0800 //RX_PGA +168 0x7FFF //RX_A_HP +169 0x0000 //RX_B_PE +170 0x1800 //RX_THR_PITCH_DET_0 +171 0x1000 //RX_THR_PITCH_DET_1 +172 0x0800 //RX_THR_PITCH_DET_2 +173 0x0008 //RX_PITCH_BFR_LEN +174 0x0003 //RX_SBD_PITCH_DET +175 0x0100 //RX_PP_RESRV_0 +176 0x0020 //RX_PP_RESRV_1 +177 0x0400 //RX_N_SN_EST +178 0x000C //RX_N2_SN_EST +179 0x0003 //RX_NS_LVL_CTRL +180 0x9000 //RX_THR_SN_EST +181 0x7CCD //RX_LAMBDA_PFILT +182 0x000A //RX_FENS_RESRV_0 +183 0x0190 //RX_FENS_RESRV_1 +184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +187 0x0002 //RX_EXTRA_NS_L +188 0x0800 //RX_EXTRA_NS_A +189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +190 0x7FFF //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +192 0x199A //RX_A_POST_FLT +193 0x0000 //RX_LMT_THRD +194 0x4000 //RX_LMT_ALPHA +195 0x0020 //RX_FDEQ_SUBNUM +196 0x4848 //RX_FDEQ_GAIN_0 +197 0x4848 //RX_FDEQ_GAIN_1 +198 0x4848 //RX_FDEQ_GAIN_2 +199 0x4848 //RX_FDEQ_GAIN_3 +200 0x4848 //RX_FDEQ_GAIN_4 +201 0x4848 //RX_FDEQ_GAIN_5 +202 0x4848 //RX_FDEQ_GAIN_6 +203 0x4848 //RX_FDEQ_GAIN_7 +204 0x4848 //RX_FDEQ_GAIN_8 +205 0x4848 //RX_FDEQ_GAIN_9 +206 0x4848 //RX_FDEQ_GAIN_10 +207 0x4848 //RX_FDEQ_GAIN_11 +208 0x4848 //RX_FDEQ_GAIN_12 +209 0x4848 //RX_FDEQ_GAIN_13 +210 0x4848 //RX_FDEQ_GAIN_14 +211 0x4848 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0202 //RX_FDEQ_BIN_0 +221 0x0203 //RX_FDEQ_BIN_1 +222 0x0303 //RX_FDEQ_BIN_2 +223 0x0304 //RX_FDEQ_BIN_3 +224 0x0405 //RX_FDEQ_BIN_4 +225 0x0506 //RX_FDEQ_BIN_5 +226 0x0708 //RX_FDEQ_BIN_6 +227 0x090A //RX_FDEQ_BIN_7 +228 0x0B0C //RX_FDEQ_BIN_8 +229 0x0D0E //RX_FDEQ_BIN_9 +230 0x1013 //RX_FDEQ_BIN_10 +231 0x1719 //RX_FDEQ_BIN_11 +232 0x1B1E //RX_FDEQ_BIN_12 +233 0x1E1E //RX_FDEQ_BIN_13 +234 0x1E28 //RX_FDEQ_BIN_14 +235 0x282C //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x4000 //RX_FDEQ_RESRV_0 +245 0x0320 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0030 //RX_FDDRC_BAND_MARGIN_1 +248 0x0050 //RX_FDDRC_BAND_MARGIN_2 +249 0x0080 //RX_FDDRC_BAND_MARGIN_3 +250 0x0007 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x5000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x6400 //RX_FDDRC_THRD_3_2 +258 0x6400 //RX_FDDRC_THRD_3_3 +259 0x2000 //RX_FDDRC_SLANT_0_0 +260 0x2000 //RX_FDDRC_SLANT_0_1 +261 0x2000 //RX_FDDRC_SLANT_0_2 +262 0x2000 //RX_FDDRC_SLANT_0_3 +263 0x5333 //RX_FDDRC_SLANT_1_0 +264 0x5333 //RX_FDDRC_SLANT_1_1 +265 0x5333 //RX_FDDRC_SLANT_1_2 +266 0x5333 //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +268 0x0000 //RX_FILTINDX +269 0x0000 //RX_TDDRC_THRD_0 +270 0x0000 //RX_TDDRC_THRD_1 +271 0x7FFF //RX_TDDRC_THRD_2 +272 0x7FFF //RX_TDDRC_THRD_3 +273 0x7FFF //RX_TDDRC_SLANT_0 +274 0x7FFF //RX_TDDRC_SLANT_1 +275 0x3000 //RX_TDDRC_ALPHA_UP_0 +276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x199A //RX_TDDRC_HMNC_GAIN +279 0x0001 //RX_TDDRC_SMT_FLAG +280 0x0CCD //RX_TDDRC_SMT_W +281 0x0155 //RX_TDDRC_DRC_GAIN +282 0x7C00 //RX_LAMBDA_PKA_FP +283 0x2000 //RX_TPKA_FP +284 0x2000 //RX_MIN_G_FP +285 0x0080 //RX_MAX_G_FP +286 0x0100 //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 +288 0x0000 //RX_MAXLEVEL_CNG +289 0x3000 //RX_BWE_UV_TH +290 0x3000 //RX_BWE_UV_TH2 +291 0x1800 //RX_BWE_UV_TH3 +292 0x1000 //RX_BWE_V_TH +293 0x04CD //RX_BWE_GAIN1_V_TH1 +294 0x0F33 //RX_BWE_GAIN1_V_TH2 +295 0x7333 //RX_BWE_UV_EQ +296 0x199A //RX_BWE_V_EQ +297 0x7333 //RX_BWE_TONE_TH +298 0x0004 //RX_BWE_UV_HOLD_T +299 0x6CCD //RX_BWE_GAIN2_ALPHA +300 0x799A //RX_BWE_GAIN3_ALPHA +301 0x001E //RX_BWE_CUTOFF +302 0x3000 //RX_BWE_GAINFILL +303 0x3200 //RX_BWE_MAXTH_TONE +304 0x2000 //RX_BWE_EQ_0 +305 0x2000 //RX_BWE_EQ_1 +306 0x2000 //RX_BWE_EQ_2 +307 0x2000 //RX_BWE_EQ_3 +308 0x2000 //RX_BWE_EQ_4 +309 0x2000 //RX_BWE_EQ_5 +310 0x2000 //RX_BWE_EQ_6 +311 0x0000 //RX_BWE_RESRV_0 +312 0x0000 //RX_BWE_RESRV_1 +313 0x0000 //RX_BWE_RESRV_2 +#VOL 0 +163 0x3000 //RX_TDDRC_ALPHA_UP_1 +164 0x3000 //RX_TDDRC_ALPHA_UP_2 +165 0x3000 //RX_TDDRC_ALPHA_UP_3 +166 0x3000 //RX_TDDRC_ALPHA_UP_4 +184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +190 0x7FFF //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +269 0x0000 //RX_TDDRC_THRD_0 +270 0x0000 //RX_TDDRC_THRD_1 +271 0x7FFF //RX_TDDRC_THRD_2 +272 0x7FFF //RX_TDDRC_THRD_3 +273 0x7FFF //RX_TDDRC_SLANT_0 +274 0x7FFF //RX_TDDRC_SLANT_1 +275 0x3000 //RX_TDDRC_ALPHA_UP_0 +276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x199A //RX_TDDRC_HMNC_GAIN +279 0x0001 //RX_TDDRC_SMT_FLAG +280 0x0CCD //RX_TDDRC_SMT_W +281 0x0155 //RX_TDDRC_DRC_GAIN +195 0x0020 //RX_FDEQ_SUBNUM +196 0x4848 //RX_FDEQ_GAIN_0 +197 0x4848 //RX_FDEQ_GAIN_1 +198 0x4848 //RX_FDEQ_GAIN_2 +199 0x4848 //RX_FDEQ_GAIN_3 +200 0x4848 //RX_FDEQ_GAIN_4 +201 0x4848 //RX_FDEQ_GAIN_5 +202 0x4848 //RX_FDEQ_GAIN_6 +203 0x4848 //RX_FDEQ_GAIN_7 +204 0x4848 //RX_FDEQ_GAIN_8 +205 0x4848 //RX_FDEQ_GAIN_9 +206 0x4848 //RX_FDEQ_GAIN_10 +207 0x4848 //RX_FDEQ_GAIN_11 +208 0x4848 //RX_FDEQ_GAIN_12 +209 0x4848 //RX_FDEQ_GAIN_13 +210 0x4848 //RX_FDEQ_GAIN_14 +211 0x4848 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0202 //RX_FDEQ_BIN_0 +221 0x0203 //RX_FDEQ_BIN_1 +222 0x0303 //RX_FDEQ_BIN_2 +223 0x0304 //RX_FDEQ_BIN_3 +224 0x0405 //RX_FDEQ_BIN_4 +225 0x0506 //RX_FDEQ_BIN_5 +226 0x0708 //RX_FDEQ_BIN_6 +227 0x090A //RX_FDEQ_BIN_7 +228 0x0B0C //RX_FDEQ_BIN_8 +229 0x0D0E //RX_FDEQ_BIN_9 +230 0x1013 //RX_FDEQ_BIN_10 +231 0x1719 //RX_FDEQ_BIN_11 +232 0x1B1E //RX_FDEQ_BIN_12 +233 0x1E1E //RX_FDEQ_BIN_13 +234 0x1E28 //RX_FDEQ_BIN_14 +235 0x282C //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x4000 //RX_FDEQ_RESRV_0 +245 0x0320 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0030 //RX_FDDRC_BAND_MARGIN_1 +248 0x0050 //RX_FDDRC_BAND_MARGIN_2 +249 0x0080 //RX_FDDRC_BAND_MARGIN_3 +250 0x0007 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x5000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x6400 //RX_FDDRC_THRD_3_2 +258 0x6400 //RX_FDDRC_THRD_3_3 +259 0x2000 //RX_FDDRC_SLANT_0_0 +260 0x2000 //RX_FDDRC_SLANT_0_1 +261 0x2000 //RX_FDDRC_SLANT_0_2 +262 0x2000 //RX_FDDRC_SLANT_0_3 +263 0x5333 //RX_FDDRC_SLANT_1_0 +264 0x5333 //RX_FDDRC_SLANT_1_1 +265 0x5333 //RX_FDDRC_SLANT_1_2 +266 0x5333 //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +286 0x0100 //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 +#VOL 1 +163 0x3000 //RX_TDDRC_ALPHA_UP_1 +164 0x3000 //RX_TDDRC_ALPHA_UP_2 +165 0x3000 //RX_TDDRC_ALPHA_UP_3 +166 0x3000 //RX_TDDRC_ALPHA_UP_4 +184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +190 0x7FFF //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +269 0x0000 //RX_TDDRC_THRD_0 +270 0x0000 //RX_TDDRC_THRD_1 +271 0x7FFF //RX_TDDRC_THRD_2 +272 0x7FFF //RX_TDDRC_THRD_3 +273 0x7FFF //RX_TDDRC_SLANT_0 +274 0x7FFF //RX_TDDRC_SLANT_1 +275 0x3000 //RX_TDDRC_ALPHA_UP_0 +276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x199A //RX_TDDRC_HMNC_GAIN +279 0x0001 //RX_TDDRC_SMT_FLAG +280 0x0CCD //RX_TDDRC_SMT_W +281 0x0155 //RX_TDDRC_DRC_GAIN +195 0x0020 //RX_FDEQ_SUBNUM +196 0x4848 //RX_FDEQ_GAIN_0 +197 0x4848 //RX_FDEQ_GAIN_1 +198 0x4848 //RX_FDEQ_GAIN_2 +199 0x4848 //RX_FDEQ_GAIN_3 +200 0x4848 //RX_FDEQ_GAIN_4 +201 0x4848 //RX_FDEQ_GAIN_5 +202 0x4848 //RX_FDEQ_GAIN_6 +203 0x4848 //RX_FDEQ_GAIN_7 +204 0x4848 //RX_FDEQ_GAIN_8 +205 0x4848 //RX_FDEQ_GAIN_9 +206 0x4848 //RX_FDEQ_GAIN_10 +207 0x4848 //RX_FDEQ_GAIN_11 +208 0x4848 //RX_FDEQ_GAIN_12 +209 0x4848 //RX_FDEQ_GAIN_13 +210 0x4848 //RX_FDEQ_GAIN_14 +211 0x4848 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0202 //RX_FDEQ_BIN_0 +221 0x0203 //RX_FDEQ_BIN_1 +222 0x0303 //RX_FDEQ_BIN_2 +223 0x0304 //RX_FDEQ_BIN_3 +224 0x0405 //RX_FDEQ_BIN_4 +225 0x0506 //RX_FDEQ_BIN_5 +226 0x0708 //RX_FDEQ_BIN_6 +227 0x090A //RX_FDEQ_BIN_7 +228 0x0B0C //RX_FDEQ_BIN_8 +229 0x0D0E //RX_FDEQ_BIN_9 +230 0x1013 //RX_FDEQ_BIN_10 +231 0x1719 //RX_FDEQ_BIN_11 +232 0x1B1E //RX_FDEQ_BIN_12 +233 0x1E1E //RX_FDEQ_BIN_13 +234 0x1E28 //RX_FDEQ_BIN_14 +235 0x282C //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x4000 //RX_FDEQ_RESRV_0 +245 0x0320 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0030 //RX_FDDRC_BAND_MARGIN_1 +248 0x0050 //RX_FDDRC_BAND_MARGIN_2 +249 0x0080 //RX_FDDRC_BAND_MARGIN_3 +250 0x0007 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x5000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x6400 //RX_FDDRC_THRD_3_2 +258 0x6400 //RX_FDDRC_THRD_3_3 +259 0x2000 //RX_FDDRC_SLANT_0_0 +260 0x2000 //RX_FDDRC_SLANT_0_1 +261 0x2000 //RX_FDDRC_SLANT_0_2 +262 0x2000 //RX_FDDRC_SLANT_0_3 +263 0x5333 //RX_FDDRC_SLANT_1_0 +264 0x5333 //RX_FDDRC_SLANT_1_1 +265 0x5333 //RX_FDDRC_SLANT_1_2 +266 0x5333 //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +286 0x0100 //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 +#VOL 2 +163 0x3000 //RX_TDDRC_ALPHA_UP_1 +164 0x3000 //RX_TDDRC_ALPHA_UP_2 +165 0x3000 //RX_TDDRC_ALPHA_UP_3 +166 0x3000 //RX_TDDRC_ALPHA_UP_4 +184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +190 0x7FFF //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +269 0x0000 //RX_TDDRC_THRD_0 +270 0x0000 //RX_TDDRC_THRD_1 +271 0x7FFF //RX_TDDRC_THRD_2 +272 0x7FFF //RX_TDDRC_THRD_3 +273 0x7FFF //RX_TDDRC_SLANT_0 +274 0x7FFF //RX_TDDRC_SLANT_1 +275 0x3000 //RX_TDDRC_ALPHA_UP_0 +276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x199A //RX_TDDRC_HMNC_GAIN +279 0x0001 //RX_TDDRC_SMT_FLAG +280 0x0CCD //RX_TDDRC_SMT_W +281 0x0155 //RX_TDDRC_DRC_GAIN +195 0x0020 //RX_FDEQ_SUBNUM +196 0x4848 //RX_FDEQ_GAIN_0 +197 0x4848 //RX_FDEQ_GAIN_1 +198 0x4848 //RX_FDEQ_GAIN_2 +199 0x4848 //RX_FDEQ_GAIN_3 +200 0x4848 //RX_FDEQ_GAIN_4 +201 0x4848 //RX_FDEQ_GAIN_5 +202 0x4848 //RX_FDEQ_GAIN_6 +203 0x4848 //RX_FDEQ_GAIN_7 +204 0x4848 //RX_FDEQ_GAIN_8 +205 0x4848 //RX_FDEQ_GAIN_9 +206 0x4848 //RX_FDEQ_GAIN_10 +207 0x4848 //RX_FDEQ_GAIN_11 +208 0x4848 //RX_FDEQ_GAIN_12 +209 0x4848 //RX_FDEQ_GAIN_13 +210 0x4848 //RX_FDEQ_GAIN_14 +211 0x4848 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0202 //RX_FDEQ_BIN_0 +221 0x0203 //RX_FDEQ_BIN_1 +222 0x0303 //RX_FDEQ_BIN_2 +223 0x0304 //RX_FDEQ_BIN_3 +224 0x0405 //RX_FDEQ_BIN_4 +225 0x0506 //RX_FDEQ_BIN_5 +226 0x0708 //RX_FDEQ_BIN_6 +227 0x090A //RX_FDEQ_BIN_7 +228 0x0B0C //RX_FDEQ_BIN_8 +229 0x0D0E //RX_FDEQ_BIN_9 +230 0x1013 //RX_FDEQ_BIN_10 +231 0x1719 //RX_FDEQ_BIN_11 +232 0x1B1E //RX_FDEQ_BIN_12 +233 0x1E1E //RX_FDEQ_BIN_13 +234 0x1E28 //RX_FDEQ_BIN_14 +235 0x282C //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x4000 //RX_FDEQ_RESRV_0 +245 0x0320 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0030 //RX_FDDRC_BAND_MARGIN_1 +248 0x0050 //RX_FDDRC_BAND_MARGIN_2 +249 0x0080 //RX_FDDRC_BAND_MARGIN_3 +250 0x0007 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x5000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x6400 //RX_FDDRC_THRD_3_2 +258 0x6400 //RX_FDDRC_THRD_3_3 +259 0x2000 //RX_FDDRC_SLANT_0_0 +260 0x2000 //RX_FDDRC_SLANT_0_1 +261 0x2000 //RX_FDDRC_SLANT_0_2 +262 0x2000 //RX_FDDRC_SLANT_0_3 +263 0x5333 //RX_FDDRC_SLANT_1_0 +264 0x5333 //RX_FDDRC_SLANT_1_1 +265 0x5333 //RX_FDDRC_SLANT_1_2 +266 0x5333 //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +286 0x0100 //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 +#VOL 3 +163 0x3000 //RX_TDDRC_ALPHA_UP_1 +164 0x3000 //RX_TDDRC_ALPHA_UP_2 +165 0x3000 //RX_TDDRC_ALPHA_UP_3 +166 0x3000 //RX_TDDRC_ALPHA_UP_4 +184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +190 0x7FFF //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +269 0x0000 //RX_TDDRC_THRD_0 +270 0x0000 //RX_TDDRC_THRD_1 +271 0x7FFF //RX_TDDRC_THRD_2 +272 0x7FFF //RX_TDDRC_THRD_3 +273 0x7FFF //RX_TDDRC_SLANT_0 +274 0x7FFF //RX_TDDRC_SLANT_1 +275 0x3000 //RX_TDDRC_ALPHA_UP_0 +276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x199A //RX_TDDRC_HMNC_GAIN +279 0x0001 //RX_TDDRC_SMT_FLAG +280 0x0CCD //RX_TDDRC_SMT_W +281 0x0155 //RX_TDDRC_DRC_GAIN +195 0x0020 //RX_FDEQ_SUBNUM +196 0x4848 //RX_FDEQ_GAIN_0 +197 0x4848 //RX_FDEQ_GAIN_1 +198 0x4848 //RX_FDEQ_GAIN_2 +199 0x4848 //RX_FDEQ_GAIN_3 +200 0x4848 //RX_FDEQ_GAIN_4 +201 0x4848 //RX_FDEQ_GAIN_5 +202 0x4848 //RX_FDEQ_GAIN_6 +203 0x4848 //RX_FDEQ_GAIN_7 +204 0x4848 //RX_FDEQ_GAIN_8 +205 0x4848 //RX_FDEQ_GAIN_9 +206 0x4848 //RX_FDEQ_GAIN_10 +207 0x4848 //RX_FDEQ_GAIN_11 +208 0x4848 //RX_FDEQ_GAIN_12 +209 0x4848 //RX_FDEQ_GAIN_13 +210 0x4848 //RX_FDEQ_GAIN_14 +211 0x4848 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0202 //RX_FDEQ_BIN_0 +221 0x0203 //RX_FDEQ_BIN_1 +222 0x0303 //RX_FDEQ_BIN_2 +223 0x0304 //RX_FDEQ_BIN_3 +224 0x0405 //RX_FDEQ_BIN_4 +225 0x0506 //RX_FDEQ_BIN_5 +226 0x0708 //RX_FDEQ_BIN_6 +227 0x090A //RX_FDEQ_BIN_7 +228 0x0B0C //RX_FDEQ_BIN_8 +229 0x0D0E //RX_FDEQ_BIN_9 +230 0x1013 //RX_FDEQ_BIN_10 +231 0x1719 //RX_FDEQ_BIN_11 +232 0x1B1E //RX_FDEQ_BIN_12 +233 0x1E1E //RX_FDEQ_BIN_13 +234 0x1E28 //RX_FDEQ_BIN_14 +235 0x282C //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x4000 //RX_FDEQ_RESRV_0 +245 0x0320 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0030 //RX_FDDRC_BAND_MARGIN_1 +248 0x0050 //RX_FDDRC_BAND_MARGIN_2 +249 0x0080 //RX_FDDRC_BAND_MARGIN_3 +250 0x0007 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x5000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x6400 //RX_FDDRC_THRD_3_2 +258 0x6400 //RX_FDDRC_THRD_3_3 +259 0x2000 //RX_FDDRC_SLANT_0_0 +260 0x2000 //RX_FDDRC_SLANT_0_1 +261 0x2000 //RX_FDDRC_SLANT_0_2 +262 0x2000 //RX_FDDRC_SLANT_0_3 +263 0x5333 //RX_FDDRC_SLANT_1_0 +264 0x5333 //RX_FDDRC_SLANT_1_1 +265 0x5333 //RX_FDDRC_SLANT_1_2 +266 0x5333 //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +286 0x0100 //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 +#VOL 4 +163 0x3000 //RX_TDDRC_ALPHA_UP_1 +164 0x3000 //RX_TDDRC_ALPHA_UP_2 +165 0x3000 //RX_TDDRC_ALPHA_UP_3 +166 0x3000 //RX_TDDRC_ALPHA_UP_4 +184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +190 0x7FFF //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +269 0x0000 //RX_TDDRC_THRD_0 +270 0x0000 //RX_TDDRC_THRD_1 +271 0x7FFF //RX_TDDRC_THRD_2 +272 0x7FFF //RX_TDDRC_THRD_3 +273 0x7FFF //RX_TDDRC_SLANT_0 +274 0x7FFF //RX_TDDRC_SLANT_1 +275 0x3000 //RX_TDDRC_ALPHA_UP_0 +276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x199A //RX_TDDRC_HMNC_GAIN +279 0x0001 //RX_TDDRC_SMT_FLAG +280 0x0CCD //RX_TDDRC_SMT_W +281 0x0155 //RX_TDDRC_DRC_GAIN +195 0x0020 //RX_FDEQ_SUBNUM +196 0x4848 //RX_FDEQ_GAIN_0 +197 0x4848 //RX_FDEQ_GAIN_1 +198 0x4848 //RX_FDEQ_GAIN_2 +199 0x4848 //RX_FDEQ_GAIN_3 +200 0x4848 //RX_FDEQ_GAIN_4 +201 0x4848 //RX_FDEQ_GAIN_5 +202 0x4848 //RX_FDEQ_GAIN_6 +203 0x4848 //RX_FDEQ_GAIN_7 +204 0x4848 //RX_FDEQ_GAIN_8 +205 0x4848 //RX_FDEQ_GAIN_9 +206 0x4848 //RX_FDEQ_GAIN_10 +207 0x4848 //RX_FDEQ_GAIN_11 +208 0x4848 //RX_FDEQ_GAIN_12 +209 0x4848 //RX_FDEQ_GAIN_13 +210 0x4848 //RX_FDEQ_GAIN_14 +211 0x4848 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0202 //RX_FDEQ_BIN_0 +221 0x0203 //RX_FDEQ_BIN_1 +222 0x0303 //RX_FDEQ_BIN_2 +223 0x0304 //RX_FDEQ_BIN_3 +224 0x0405 //RX_FDEQ_BIN_4 +225 0x0506 //RX_FDEQ_BIN_5 +226 0x0708 //RX_FDEQ_BIN_6 +227 0x090A //RX_FDEQ_BIN_7 +228 0x0B0C //RX_FDEQ_BIN_8 +229 0x0D0E //RX_FDEQ_BIN_9 +230 0x1013 //RX_FDEQ_BIN_10 +231 0x1719 //RX_FDEQ_BIN_11 +232 0x1B1E //RX_FDEQ_BIN_12 +233 0x1E1E //RX_FDEQ_BIN_13 +234 0x1E28 //RX_FDEQ_BIN_14 +235 0x282C //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x4000 //RX_FDEQ_RESRV_0 +245 0x0320 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0030 //RX_FDDRC_BAND_MARGIN_1 +248 0x0050 //RX_FDDRC_BAND_MARGIN_2 +249 0x0080 //RX_FDDRC_BAND_MARGIN_3 +250 0x0007 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x5000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x6400 //RX_FDDRC_THRD_3_2 +258 0x6400 //RX_FDDRC_THRD_3_3 +259 0x2000 //RX_FDDRC_SLANT_0_0 +260 0x2000 //RX_FDDRC_SLANT_0_1 +261 0x2000 //RX_FDDRC_SLANT_0_2 +262 0x2000 //RX_FDDRC_SLANT_0_3 +263 0x5333 //RX_FDDRC_SLANT_1_0 +264 0x5333 //RX_FDDRC_SLANT_1_1 +265 0x5333 //RX_FDDRC_SLANT_1_2 +266 0x5333 //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +286 0x0100 //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 +#VOL 5 +163 0x3000 //RX_TDDRC_ALPHA_UP_1 +164 0x3000 //RX_TDDRC_ALPHA_UP_2 +165 0x3000 //RX_TDDRC_ALPHA_UP_3 +166 0x3000 //RX_TDDRC_ALPHA_UP_4 +184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +190 0x7FFF //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +269 0x0000 //RX_TDDRC_THRD_0 +270 0x0000 //RX_TDDRC_THRD_1 +271 0x7FFF //RX_TDDRC_THRD_2 +272 0x7FFF //RX_TDDRC_THRD_3 +273 0x7FFF //RX_TDDRC_SLANT_0 +274 0x7FFF //RX_TDDRC_SLANT_1 +275 0x3000 //RX_TDDRC_ALPHA_UP_0 +276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x199A //RX_TDDRC_HMNC_GAIN +279 0x0001 //RX_TDDRC_SMT_FLAG +280 0x0CCD //RX_TDDRC_SMT_W +281 0x0155 //RX_TDDRC_DRC_GAIN +195 0x0020 //RX_FDEQ_SUBNUM +196 0x4848 //RX_FDEQ_GAIN_0 +197 0x4848 //RX_FDEQ_GAIN_1 +198 0x4848 //RX_FDEQ_GAIN_2 +199 0x4848 //RX_FDEQ_GAIN_3 +200 0x4848 //RX_FDEQ_GAIN_4 +201 0x4848 //RX_FDEQ_GAIN_5 +202 0x4848 //RX_FDEQ_GAIN_6 +203 0x4848 //RX_FDEQ_GAIN_7 +204 0x4848 //RX_FDEQ_GAIN_8 +205 0x4848 //RX_FDEQ_GAIN_9 +206 0x4848 //RX_FDEQ_GAIN_10 +207 0x4848 //RX_FDEQ_GAIN_11 +208 0x4848 //RX_FDEQ_GAIN_12 +209 0x4848 //RX_FDEQ_GAIN_13 +210 0x4848 //RX_FDEQ_GAIN_14 +211 0x4848 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0202 //RX_FDEQ_BIN_0 +221 0x0203 //RX_FDEQ_BIN_1 +222 0x0303 //RX_FDEQ_BIN_2 +223 0x0304 //RX_FDEQ_BIN_3 +224 0x0405 //RX_FDEQ_BIN_4 +225 0x0506 //RX_FDEQ_BIN_5 +226 0x0708 //RX_FDEQ_BIN_6 +227 0x090A //RX_FDEQ_BIN_7 +228 0x0B0C //RX_FDEQ_BIN_8 +229 0x0D0E //RX_FDEQ_BIN_9 +230 0x1013 //RX_FDEQ_BIN_10 +231 0x1719 //RX_FDEQ_BIN_11 +232 0x1B1E //RX_FDEQ_BIN_12 +233 0x1E1E //RX_FDEQ_BIN_13 +234 0x1E28 //RX_FDEQ_BIN_14 +235 0x282C //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x4000 //RX_FDEQ_RESRV_0 +245 0x0320 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0030 //RX_FDDRC_BAND_MARGIN_1 +248 0x0050 //RX_FDDRC_BAND_MARGIN_2 +249 0x0080 //RX_FDDRC_BAND_MARGIN_3 +250 0x0007 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x5000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x6400 //RX_FDDRC_THRD_3_2 +258 0x6400 //RX_FDDRC_THRD_3_3 +259 0x2000 //RX_FDDRC_SLANT_0_0 +260 0x2000 //RX_FDDRC_SLANT_0_1 +261 0x2000 //RX_FDDRC_SLANT_0_2 +262 0x2000 //RX_FDDRC_SLANT_0_3 +263 0x5333 //RX_FDDRC_SLANT_1_0 +264 0x5333 //RX_FDDRC_SLANT_1_1 +265 0x5333 //RX_FDDRC_SLANT_1_2 +266 0x5333 //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +286 0x0100 //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 +#VOL 6 +163 0x3000 //RX_TDDRC_ALPHA_UP_1 +164 0x3000 //RX_TDDRC_ALPHA_UP_2 +165 0x3000 //RX_TDDRC_ALPHA_UP_3 +166 0x3000 //RX_TDDRC_ALPHA_UP_4 +184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +190 0x7FFF //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +269 0x0000 //RX_TDDRC_THRD_0 +270 0x0000 //RX_TDDRC_THRD_1 +271 0x7FFF //RX_TDDRC_THRD_2 +272 0x7FFF //RX_TDDRC_THRD_3 +273 0x7FFF //RX_TDDRC_SLANT_0 +274 0x7FFF //RX_TDDRC_SLANT_1 +275 0x3000 //RX_TDDRC_ALPHA_UP_0 +276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x199A //RX_TDDRC_HMNC_GAIN +279 0x0001 //RX_TDDRC_SMT_FLAG +280 0x0CCD //RX_TDDRC_SMT_W +281 0x0155 //RX_TDDRC_DRC_GAIN +195 0x0020 //RX_FDEQ_SUBNUM +196 0x4848 //RX_FDEQ_GAIN_0 +197 0x4848 //RX_FDEQ_GAIN_1 +198 0x4848 //RX_FDEQ_GAIN_2 +199 0x4848 //RX_FDEQ_GAIN_3 +200 0x4848 //RX_FDEQ_GAIN_4 +201 0x4848 //RX_FDEQ_GAIN_5 +202 0x4848 //RX_FDEQ_GAIN_6 +203 0x4848 //RX_FDEQ_GAIN_7 +204 0x4848 //RX_FDEQ_GAIN_8 +205 0x4848 //RX_FDEQ_GAIN_9 +206 0x4848 //RX_FDEQ_GAIN_10 +207 0x4848 //RX_FDEQ_GAIN_11 +208 0x4848 //RX_FDEQ_GAIN_12 +209 0x4848 //RX_FDEQ_GAIN_13 +210 0x4848 //RX_FDEQ_GAIN_14 +211 0x4848 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0202 //RX_FDEQ_BIN_0 +221 0x0203 //RX_FDEQ_BIN_1 +222 0x0303 //RX_FDEQ_BIN_2 +223 0x0304 //RX_FDEQ_BIN_3 +224 0x0405 //RX_FDEQ_BIN_4 +225 0x0506 //RX_FDEQ_BIN_5 +226 0x0708 //RX_FDEQ_BIN_6 +227 0x090A //RX_FDEQ_BIN_7 +228 0x0B0C //RX_FDEQ_BIN_8 +229 0x0D0E //RX_FDEQ_BIN_9 +230 0x1013 //RX_FDEQ_BIN_10 +231 0x1719 //RX_FDEQ_BIN_11 +232 0x1B1E //RX_FDEQ_BIN_12 +233 0x1E1E //RX_FDEQ_BIN_13 +234 0x1E28 //RX_FDEQ_BIN_14 +235 0x282C //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x4000 //RX_FDEQ_RESRV_0 +245 0x0320 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0030 //RX_FDDRC_BAND_MARGIN_1 +248 0x0050 //RX_FDDRC_BAND_MARGIN_2 +249 0x0080 //RX_FDDRC_BAND_MARGIN_3 +250 0x0007 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x5000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x6400 //RX_FDDRC_THRD_3_2 +258 0x6400 //RX_FDDRC_THRD_3_3 +259 0x2000 //RX_FDDRC_SLANT_0_0 +260 0x2000 //RX_FDDRC_SLANT_0_1 +261 0x2000 //RX_FDDRC_SLANT_0_2 +262 0x2000 //RX_FDDRC_SLANT_0_3 +263 0x5333 //RX_FDDRC_SLANT_1_0 +264 0x5333 //RX_FDDRC_SLANT_1_1 +265 0x5333 //RX_FDDRC_SLANT_1_2 +266 0x5333 //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +286 0x0100 //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 #CASE_NAME BLUETOOTH-BT_HAC-VOICE_GENERIC-FB -#PARAM_TYPE TX+RX -#TOTAL_CUSTOM_STEP 7 +#PARAM_MODE Full +#PARAM_TYPE TX+2RX +#TOTAL_CUSTOM_STEP 7+7 #TX 0 0x0001 //TX_OPERATION_MODE_0 1 0x0001 //TX_OPERATION_MODE_1 @@ -7270,11 +10939,11 @@ 248 0xF800 //TX_THR_SN_EST_6 249 0xF800 //TX_THR_SN_EST_7 250 0x0100 //TX_DELTA_THR_SN_EST_0 -251 0x0200 //TX_DELTA_THR_SN_EST_1 -252 0x0100 //TX_DELTA_THR_SN_EST_2 -253 0x0200 //TX_DELTA_THR_SN_EST_3 +251 0x0100 //TX_DELTA_THR_SN_EST_1 +252 0x0200 //TX_DELTA_THR_SN_EST_2 +253 0x0100 //TX_DELTA_THR_SN_EST_3 254 0x0100 //TX_DELTA_THR_SN_EST_4 -255 0x0100 //TX_DELTA_THR_SN_EST_5 +255 0x0200 //TX_DELTA_THR_SN_EST_5 256 0x0200 //TX_DELTA_THR_SN_EST_6 257 0x0200 //TX_DELTA_THR_SN_EST_7 258 0x4000 //TX_LAMBDA_NN_EST_0 @@ -7302,11 +10971,11 @@ 280 0x1000 //TX_B_POST_FLT_1 281 0x0010 //TX_NS_LVL_CTRL_0 282 0x0014 //TX_NS_LVL_CTRL_1 -283 0x0014 //TX_NS_LVL_CTRL_2 -284 0x0018 //TX_NS_LVL_CTRL_3 -285 0x0016 //TX_NS_LVL_CTRL_4 -286 0x0014 //TX_NS_LVL_CTRL_5 -287 0x0011 //TX_NS_LVL_CTRL_6 +283 0x0018 //TX_NS_LVL_CTRL_2 +284 0x0016 //TX_NS_LVL_CTRL_3 +285 0x0014 //TX_NS_LVL_CTRL_4 +286 0x0011 //TX_NS_LVL_CTRL_5 +287 0x0014 //TX_NS_LVL_CTRL_6 288 0x0011 //TX_NS_LVL_CTRL_7 289 0x000F //TX_MIN_GAIN_S_0 290 0x0010 //TX_MIN_GAIN_S_1 @@ -7324,8 +10993,8 @@ 302 0x4000 //TX_SNRI_SUP_2 303 0x4000 //TX_SNRI_SUP_3 304 0x4000 //TX_SNRI_SUP_4 -305 0x4000 //TX_SNRI_SUP_5 -306 0x50C0 //TX_SNRI_SUP_6 +305 0x50C0 //TX_SNRI_SUP_5 +306 0x4000 //TX_SNRI_SUP_6 307 0x7FFF //TX_SNRI_SUP_7 308 0x7FFF //TX_THR_LFNS 309 0x0018 //TX_G_LFNS @@ -7334,19 +11003,19 @@ 312 0x7FFF //TX_A_POST_FILT_0 313 0x2000 //TX_A_POST_FILT_1 314 0x5000 //TX_A_POST_FILT_S_0 -315 0x6000 //TX_A_POST_FILT_S_1 -316 0x4C00 //TX_A_POST_FILT_S_2 -317 0x4000 //TX_A_POST_FILT_S_3 -318 0x6000 //TX_A_POST_FILT_S_4 -319 0x4000 //TX_A_POST_FILT_S_5 -320 0x5000 //TX_A_POST_FILT_S_6 +315 0x4C00 //TX_A_POST_FILT_S_1 +316 0x4000 //TX_A_POST_FILT_S_2 +317 0x6000 //TX_A_POST_FILT_S_3 +318 0x4000 //TX_A_POST_FILT_S_4 +319 0x5000 //TX_A_POST_FILT_S_5 +320 0x6000 //TX_A_POST_FILT_S_6 321 0x7000 //TX_A_POST_FILT_S_7 322 0x2000 //TX_B_POST_FILT_0 -323 0x1000 //TX_B_POST_FILT_1 +323 0x2000 //TX_B_POST_FILT_1 324 0x2000 //TX_B_POST_FILT_2 -325 0x2000 //TX_B_POST_FILT_3 +325 0x4000 //TX_B_POST_FILT_3 326 0x4000 //TX_B_POST_FILT_4 -327 0x4000 //TX_B_POST_FILT_5 +327 0x1000 //TX_B_POST_FILT_5 328 0x1000 //TX_B_POST_FILT_6 329 0x2000 //TX_B_POST_FILT_7 330 0x4000 //TX_B_LESSCUT_RTO_S_0 @@ -7354,14 +11023,14 @@ 332 0x7FFF //TX_B_LESSCUT_RTO_S_2 333 0x7FFF //TX_B_LESSCUT_RTO_S_3 334 0x7FFF //TX_B_LESSCUT_RTO_S_4 -335 0x7FFF //TX_B_LESSCUT_RTO_S_5 -336 0x6000 //TX_B_LESSCUT_RTO_S_6 +335 0x6000 //TX_B_LESSCUT_RTO_S_5 +336 0x7FFF //TX_B_LESSCUT_RTO_S_6 337 0x7FFF //TX_B_LESSCUT_RTO_S_7 338 0x7C00 //TX_LAMBDA_PFILT 339 0x7C00 //TX_LAMBDA_PFILT_S_0 340 0x7C00 //TX_LAMBDA_PFILT_S_1 -341 0x7C00 //TX_LAMBDA_PFILT_S_2 -342 0x7A00 //TX_LAMBDA_PFILT_S_3 +341 0x7A00 //TX_LAMBDA_PFILT_S_2 +342 0x7C00 //TX_LAMBDA_PFILT_S_3 343 0x7C00 //TX_LAMBDA_PFILT_S_4 344 0x7C00 //TX_LAMBDA_PFILT_S_5 345 0x7C00 //TX_LAMBDA_PFILT_S_6 @@ -7399,10 +11068,10 @@ 377 0x7FFF //TX_NOISE_TH_5_4 378 0x2710 //TX_NOISE_TH_6 379 0x0033 //TX_MINENOISE_TH -380 0x4000 //TX_MINENOISE_MIC0_TH_MTS -381 0xFFEE //TX_MINENOISE_MIC0_TH_EXP -382 0x6000 //TX_MINENOISE_MIC0_S_TH_MTS -383 0xFFF3 //TX_MINENOISE_MIC0_S_TH_EXP +380 0x4000 //TX_MORENS_TFMASK_TH +381 0xFFEE //TX_DRC_QUIET_FLOOR +382 0x6000 //TX_RATIODTL_CUT_TH +383 0xFFF3 //TX_DT_CUT_K1 384 0x0666 //TX_OUT_ENER_S_TH_CLEAN 385 0x0666 //TX_OUT_ENER_S_TH_LESSCLEAN 386 0x0333 //TX_OUT_ENER_S_TH_NOISY @@ -7410,15 +11079,15 @@ 388 0x0333 //TX_OUT_ENER_TH_SPEECH 389 0x2000 //TX_SN_NPB_GAIN 390 0x0000 //TX_NN_NPB_GAIN -391 0x0000 //TX_CSX_ALPHA_0 -392 0x0000 //TX_CSX_ALPHA_1 -393 0x0000 //TX_CSX_ALPHA_2 -394 0x0000 //TX_CSX_ALPHA_3 -395 0x0800 //TX_MU_ARSP_EST -396 0x00C8 //TX_P_OUTBEAM_MIN_TH +391 0x0000 //TX_POST_MASK_SUP_HSNE +392 0x0000 //TX_TAIL_DET_TH +393 0x0000 //TX_B_LESSCUT_RTO_WTA +394 0x0000 //TX_MEL_G_R +395 0x0800 //TX_SUPHIGH_TH +396 0x00C8 //TX_MASK_G_R 397 0x0002 //TX_EXTRA_NS_L -398 0x0800 //TX_EXTRA_NS_A -399 0x0005 //TX_VR_NOISE_FLOOR_TH +398 0x0800 //TX_C_POST_FLT_MASK +399 0x0005 //TX_A_POST_FLT_WNS 400 0x0148 //TX_MIN_G_LOW300HZ 401 0x0002 //TX_MAXLEVEL_CNG 402 0x00B4 //TX_STN_NOISE_TH @@ -7533,16 +11202,16 @@ 511 0x6666 //TX_MIC_TO_BFGAIN 512 0x0000 //TX_MICTOBFGAIN0 513 0x0000 //TX_FASTMUE_TH -514 0x0000 //TX_DERVB_LEN_0 -515 0x0000 //TX_DERVB_LEN_1 -516 0x0000 //TX_RHO_DERVB -517 0x0000 //TX_MIC_INDX_DERVB -518 0x0000 //TX_MU_DERVB -519 0x0000 //TX_DR_RESRV_0 -520 0x0000 //TX_DR_RESRV_1 -521 0x0000 //TX_DR_RESRV_2 -522 0x0000 //TX_DR_RESRV_3 -523 0x0000 //TX_DR_RESRV_4 +514 0x0000 //TX_DEREVERB_LF_MU +515 0x0000 //TX_DEREVERB_HF_MU +516 0x0000 //TX_DEREVERB_DELAY +517 0x0000 //TX_DEREVERB_COEF_LEN +518 0x0000 //TX_DEREVERB_DNR +519 0x0000 //TX_DEREVERB_ALPHA +520 0x0000 //TX_DEREVERB_BETA +521 0x0000 //TX_GSC_RTOL_TH +522 0x0000 //TX_GSC_RTOH_TH +523 0x0000 //TX_WIDE2_MEANHTH 524 0x0000 //TX_DR_RESRV_5 525 0x0000 //TX_DR_RESRV_6 526 0x0000 //TX_DR_RESRV_7 @@ -7916,6 +11585,71 @@ 894 0xC000 //TX_FASTNS_SSA_THHFL 895 0xCCCC //TX_FASTNS_SSA_THLFH 896 0xD999 //TX_FASTNS_SSA_THHFH +897 0x0000 //TX_SENDFUNC_REG_MICMUTE +898 0x0000 //TX_SENDFUNC_REG_MICMUTE1 +899 0x0000 //TX_MICMUTE_RATIO_THR +900 0x0000 //TX_MICMUTE_AMP_THR +901 0x0000 //TX_MICMUTE_HPF_IND +902 0x0000 //TX_MICMUTE_LOG_EYR_TH +903 0x0000 //TX_MICMUTE_CVG_TIME +904 0x0000 //TX_MICMUTE_RELEASE_TIME +905 0x0000 //TX_MIC_VOLUME_MIC0MUTE +906 0x0000 //TX_MICMUTE_EPD_OFFSET_0 +907 0x0000 //TX_MICMUTE_FRQ_AEC_L +908 0x0000 //TX_MICMUTE_EAD_THR +909 0x0000 //TX_MICMUTE_LAMBDA_CB_NLE +910 0x0000 //TX_MICMUTE_LAMBDA_RE_EST +911 0x0000 //TX_DTD_THR1_MICMUTE_0 +912 0x0000 //TX_DTD_THR1_MICMUTE_1 +913 0x0000 //TX_DTD_THR1_MICMUTE_2 +914 0x0000 //TX_DTD_THR1_MICMUTE_3 +915 0x0000 //TX_DTD_THR2_MICMUTE_0 +916 0x0000 //TX_MICMUTE_MIN_EQ_RE_EST_0 +917 0x0000 //TX_MICMUTE_MIN_EQ_RE_EST_1 +918 0x0000 //TX_MICMUTE_MIN_EQ_RE_EST_2 +919 0x0000 //TX_MICMUTE_MIN_EQ_RE_EST_3 +920 0x0000 //TX_MICMUTE_MIN_EQ_RE_EST_4 +921 0x0000 //TX_MICMUTE_C_POST_FLT +922 0x0000 //TX_MICMUTE_DT_CUT_K +923 0x0000 //TX_MICMUTE_DT_CUT_THR +924 0x0000 //TX_MICMUTE_DT_CUT_K2 +925 0x0000 //TX_MICMUTE_DT_CUT_THR2 +926 0x0000 //TX_MICMUTE_DT2_HOLD_N +927 0x0000 //TX_MICMUTE_RATIODTH_THCUT +928 0x0000 //TX_MICMUTE_B_POST_FLT_ECHOL +929 0x0000 //TX_MICMUTE_B_POST_FLT_ECHOH +930 0x0000 //TX_MICMUTE_C_POST_FLT_MASK +931 0x0000 //TX_MICMUTE_RATIODTL_CUT_TH +932 0x0000 //TX_MICMUTE_DT_CUT_K1 +933 0x0000 //TX_MICMUTE_N2_SN_EST +934 0x0000 //TX_MICMUTE_THR_SN_EST_0 +935 0x0000 //TX_MICMUTE_MIN_G_CTRL_0 +936 0x0000 //TX_MICMUTE_A_POST_FILT_S_0 +937 0x0000 //TX_MICMUTE_B_POST_FILT_0 +938 0x0000 //TX_MIC1RUB_AMP_THR +939 0x0000 //TX_MIC1MUTE_RATIO_THR +940 0x0000 //TX_MIC1MUTE_AMP_THR +941 0x0000 //TX_MIC1MUTE_CVG_TIME +942 0x0000 //TX_MIC1MUTE_RELEASE_TIME +943 0x0000 //TX_AMS_RESRV_01 +944 0x0000 //TX_AMS_RESRV_02 +945 0x0000 //TX_AMS_RESRV_03 +946 0x0000 //TX_AMS_RESRV_04 +947 0x0000 //TX_AMS_RESRV_05 +948 0x0000 //TX_AMS_RESRV_06 +949 0x0000 //TX_AMS_RESRV_07 +950 0x0000 //TX_AMS_RESRV_08 +951 0x0000 //TX_AMS_RESRV_09 +952 0x0000 //TX_AMS_RESRV_10 +953 0x0000 //TX_AMS_RESRV_11 +954 0x0000 //TX_AMS_RESRV_12 +955 0x0000 //TX_AMS_RESRV_13 +956 0x0000 //TX_AMS_RESRV_14 +957 0x0000 //TX_AMS_RESRV_15 +958 0x0000 //TX_AMS_RESRV_16 +959 0x0000 //TX_AMS_RESRV_17 +960 0x0000 //TX_AMS_RESRV_18 +961 0x0000 //TX_AMS_RESRV_19 #RX 0 0x0064 //RX_RECVFUNC_MODE_0 1 0x0000 //RX_RECVFUNC_MODE_1 @@ -8767,10 +12501,862 @@ 110 0x0000 //RX_FDDRC_RESRV_0 129 0x0100 //RX_SPK_VOL 130 0x0000 //RX_VOL_RESRV_0 +#RX 2 +157 0x0064 //RX_RECVFUNC_MODE_0 +158 0x0000 //RX_RECVFUNC_MODE_1 +159 0x0004 //RX_SAMPLINGFREQ_SIG +160 0x0004 //RX_SAMPLINGFREQ_PROC +161 0x000A //RX_FRAME_SZ +162 0x0000 //RX_DELAY_OPT +163 0x1000 //RX_TDDRC_ALPHA_UP_1 +164 0x1000 //RX_TDDRC_ALPHA_UP_2 +165 0x1000 //RX_TDDRC_ALPHA_UP_3 +166 0x1000 //RX_TDDRC_ALPHA_UP_4 +167 0x0800 //RX_PGA +168 0x7FFF //RX_A_HP +169 0x4000 //RX_B_PE +170 0x7800 //RX_THR_PITCH_DET_0 +171 0x7000 //RX_THR_PITCH_DET_1 +172 0x6000 //RX_THR_PITCH_DET_2 +173 0x0008 //RX_PITCH_BFR_LEN +174 0x0003 //RX_SBD_PITCH_DET +175 0x0100 //RX_PP_RESRV_0 +176 0x0020 //RX_PP_RESRV_1 +177 0x0500 //RX_N_SN_EST +178 0x000C //RX_N2_SN_EST +179 0x000A //RX_NS_LVL_CTRL +180 0xF600 //RX_THR_SN_EST +181 0x7000 //RX_LAMBDA_PFILT +182 0x000A //RX_FENS_RESRV_0 +183 0x0190 //RX_FENS_RESRV_1 +184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +187 0x0002 //RX_EXTRA_NS_L +188 0x0800 //RX_EXTRA_NS_A +189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +190 0x7FFF //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +192 0x199A //RX_A_POST_FLT +193 0x0000 //RX_LMT_THRD +194 0x4000 //RX_LMT_ALPHA +195 0x0020 //RX_FDEQ_SUBNUM +196 0x4848 //RX_FDEQ_GAIN_0 +197 0x4848 //RX_FDEQ_GAIN_1 +198 0x4848 //RX_FDEQ_GAIN_2 +199 0x4848 //RX_FDEQ_GAIN_3 +200 0x4848 //RX_FDEQ_GAIN_4 +201 0x4848 //RX_FDEQ_GAIN_5 +202 0x4848 //RX_FDEQ_GAIN_6 +203 0x4848 //RX_FDEQ_GAIN_7 +204 0x4848 //RX_FDEQ_GAIN_8 +205 0x4848 //RX_FDEQ_GAIN_9 +206 0x4848 //RX_FDEQ_GAIN_10 +207 0x4848 //RX_FDEQ_GAIN_11 +208 0x4848 //RX_FDEQ_GAIN_12 +209 0x4848 //RX_FDEQ_GAIN_13 +210 0x4848 //RX_FDEQ_GAIN_14 +211 0x4848 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0202 //RX_FDEQ_BIN_0 +221 0x0203 //RX_FDEQ_BIN_1 +222 0x0304 //RX_FDEQ_BIN_2 +223 0x0405 //RX_FDEQ_BIN_3 +224 0x0607 //RX_FDEQ_BIN_4 +225 0x0809 //RX_FDEQ_BIN_5 +226 0x0A0B //RX_FDEQ_BIN_6 +227 0x0C0D //RX_FDEQ_BIN_7 +228 0x0E0F //RX_FDEQ_BIN_8 +229 0x1011 //RX_FDEQ_BIN_9 +230 0x1214 //RX_FDEQ_BIN_10 +231 0x1618 //RX_FDEQ_BIN_11 +232 0x1C1C //RX_FDEQ_BIN_12 +233 0x2020 //RX_FDEQ_BIN_13 +234 0x2020 //RX_FDEQ_BIN_14 +235 0x2011 //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x4000 //RX_FDEQ_RESRV_0 +245 0x0320 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0030 //RX_FDDRC_BAND_MARGIN_1 +248 0x0050 //RX_FDDRC_BAND_MARGIN_2 +249 0x0080 //RX_FDDRC_BAND_MARGIN_3 +250 0x0007 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x5000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x6400 //RX_FDDRC_THRD_3_2 +258 0x6400 //RX_FDDRC_THRD_3_3 +259 0x2000 //RX_FDDRC_SLANT_0_0 +260 0x2000 //RX_FDDRC_SLANT_0_1 +261 0x2000 //RX_FDDRC_SLANT_0_2 +262 0x2000 //RX_FDDRC_SLANT_0_3 +263 0x5333 //RX_FDDRC_SLANT_1_0 +264 0x5333 //RX_FDDRC_SLANT_1_1 +265 0x5333 //RX_FDDRC_SLANT_1_2 +266 0x5333 //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +268 0x0000 //RX_FILTINDX +269 0x0000 //RX_TDDRC_THRD_0 +270 0x0000 //RX_TDDRC_THRD_1 +271 0x7FFF //RX_TDDRC_THRD_2 +272 0x7FFF //RX_TDDRC_THRD_3 +273 0x7FFF //RX_TDDRC_SLANT_0 +274 0x7FFF //RX_TDDRC_SLANT_1 +275 0x1000 //RX_TDDRC_ALPHA_UP_0 +276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x199A //RX_TDDRC_HMNC_GAIN +279 0x0001 //RX_TDDRC_SMT_FLAG +280 0x0CCD //RX_TDDRC_SMT_W +281 0x0155 //RX_TDDRC_DRC_GAIN +282 0x7C00 //RX_LAMBDA_PKA_FP +283 0x2000 //RX_TPKA_FP +284 0x2000 //RX_MIN_G_FP +285 0x0080 //RX_MAX_G_FP +286 0x0100 //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 +288 0x0000 //RX_MAXLEVEL_CNG +289 0x3000 //RX_BWE_UV_TH +290 0x3000 //RX_BWE_UV_TH2 +291 0x1800 //RX_BWE_UV_TH3 +292 0x1000 //RX_BWE_V_TH +293 0x04CD //RX_BWE_GAIN1_V_TH1 +294 0x0F33 //RX_BWE_GAIN1_V_TH2 +295 0x7333 //RX_BWE_UV_EQ +296 0x199A //RX_BWE_V_EQ +297 0x7333 //RX_BWE_TONE_TH +298 0x0004 //RX_BWE_UV_HOLD_T +299 0x6CCD //RX_BWE_GAIN2_ALPHA +300 0x799A //RX_BWE_GAIN3_ALPHA +301 0x001E //RX_BWE_CUTOFF +302 0x3000 //RX_BWE_GAINFILL +303 0x3200 //RX_BWE_MAXTH_TONE +304 0x2000 //RX_BWE_EQ_0 +305 0x2000 //RX_BWE_EQ_1 +306 0x2000 //RX_BWE_EQ_2 +307 0x2000 //RX_BWE_EQ_3 +308 0x2000 //RX_BWE_EQ_4 +309 0x2000 //RX_BWE_EQ_5 +310 0x2000 //RX_BWE_EQ_6 +311 0x0000 //RX_BWE_RESRV_0 +312 0x0000 //RX_BWE_RESRV_1 +313 0x0000 //RX_BWE_RESRV_2 +#VOL 0 +163 0x1000 //RX_TDDRC_ALPHA_UP_1 +164 0x1000 //RX_TDDRC_ALPHA_UP_2 +165 0x1000 //RX_TDDRC_ALPHA_UP_3 +166 0x1000 //RX_TDDRC_ALPHA_UP_4 +184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +190 0x7FFF //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +269 0x0000 //RX_TDDRC_THRD_0 +270 0x0000 //RX_TDDRC_THRD_1 +271 0x7FFF //RX_TDDRC_THRD_2 +272 0x7FFF //RX_TDDRC_THRD_3 +273 0x7FFF //RX_TDDRC_SLANT_0 +274 0x7FFF //RX_TDDRC_SLANT_1 +275 0x1000 //RX_TDDRC_ALPHA_UP_0 +276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x199A //RX_TDDRC_HMNC_GAIN +279 0x0001 //RX_TDDRC_SMT_FLAG +280 0x0CCD //RX_TDDRC_SMT_W +281 0x0155 //RX_TDDRC_DRC_GAIN +195 0x0020 //RX_FDEQ_SUBNUM +196 0x4848 //RX_FDEQ_GAIN_0 +197 0x4848 //RX_FDEQ_GAIN_1 +198 0x4848 //RX_FDEQ_GAIN_2 +199 0x4848 //RX_FDEQ_GAIN_3 +200 0x4848 //RX_FDEQ_GAIN_4 +201 0x4848 //RX_FDEQ_GAIN_5 +202 0x4848 //RX_FDEQ_GAIN_6 +203 0x4848 //RX_FDEQ_GAIN_7 +204 0x4848 //RX_FDEQ_GAIN_8 +205 0x4848 //RX_FDEQ_GAIN_9 +206 0x4848 //RX_FDEQ_GAIN_10 +207 0x4848 //RX_FDEQ_GAIN_11 +208 0x4848 //RX_FDEQ_GAIN_12 +209 0x4848 //RX_FDEQ_GAIN_13 +210 0x4848 //RX_FDEQ_GAIN_14 +211 0x4848 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0202 //RX_FDEQ_BIN_0 +221 0x0203 //RX_FDEQ_BIN_1 +222 0x0304 //RX_FDEQ_BIN_2 +223 0x0405 //RX_FDEQ_BIN_3 +224 0x0607 //RX_FDEQ_BIN_4 +225 0x0809 //RX_FDEQ_BIN_5 +226 0x0A0B //RX_FDEQ_BIN_6 +227 0x0C0D //RX_FDEQ_BIN_7 +228 0x0E0F //RX_FDEQ_BIN_8 +229 0x1011 //RX_FDEQ_BIN_9 +230 0x1214 //RX_FDEQ_BIN_10 +231 0x1618 //RX_FDEQ_BIN_11 +232 0x1C1C //RX_FDEQ_BIN_12 +233 0x2020 //RX_FDEQ_BIN_13 +234 0x2020 //RX_FDEQ_BIN_14 +235 0x2011 //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x4000 //RX_FDEQ_RESRV_0 +245 0x0320 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0030 //RX_FDDRC_BAND_MARGIN_1 +248 0x0050 //RX_FDDRC_BAND_MARGIN_2 +249 0x0080 //RX_FDDRC_BAND_MARGIN_3 +250 0x0007 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x5000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x6400 //RX_FDDRC_THRD_3_2 +258 0x6400 //RX_FDDRC_THRD_3_3 +259 0x2000 //RX_FDDRC_SLANT_0_0 +260 0x2000 //RX_FDDRC_SLANT_0_1 +261 0x2000 //RX_FDDRC_SLANT_0_2 +262 0x2000 //RX_FDDRC_SLANT_0_3 +263 0x5333 //RX_FDDRC_SLANT_1_0 +264 0x5333 //RX_FDDRC_SLANT_1_1 +265 0x5333 //RX_FDDRC_SLANT_1_2 +266 0x5333 //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +286 0x0100 //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 +#VOL 1 +163 0x1000 //RX_TDDRC_ALPHA_UP_1 +164 0x1000 //RX_TDDRC_ALPHA_UP_2 +165 0x1000 //RX_TDDRC_ALPHA_UP_3 +166 0x1000 //RX_TDDRC_ALPHA_UP_4 +184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +190 0x7FFF //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +269 0x0000 //RX_TDDRC_THRD_0 +270 0x0000 //RX_TDDRC_THRD_1 +271 0x7FFF //RX_TDDRC_THRD_2 +272 0x7FFF //RX_TDDRC_THRD_3 +273 0x7FFF //RX_TDDRC_SLANT_0 +274 0x7FFF //RX_TDDRC_SLANT_1 +275 0x1000 //RX_TDDRC_ALPHA_UP_0 +276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x199A //RX_TDDRC_HMNC_GAIN +279 0x0001 //RX_TDDRC_SMT_FLAG +280 0x0CCD //RX_TDDRC_SMT_W +281 0x0155 //RX_TDDRC_DRC_GAIN +195 0x0020 //RX_FDEQ_SUBNUM +196 0x4848 //RX_FDEQ_GAIN_0 +197 0x4848 //RX_FDEQ_GAIN_1 +198 0x4848 //RX_FDEQ_GAIN_2 +199 0x4848 //RX_FDEQ_GAIN_3 +200 0x4848 //RX_FDEQ_GAIN_4 +201 0x4848 //RX_FDEQ_GAIN_5 +202 0x4848 //RX_FDEQ_GAIN_6 +203 0x4848 //RX_FDEQ_GAIN_7 +204 0x4848 //RX_FDEQ_GAIN_8 +205 0x4848 //RX_FDEQ_GAIN_9 +206 0x4848 //RX_FDEQ_GAIN_10 +207 0x4848 //RX_FDEQ_GAIN_11 +208 0x4848 //RX_FDEQ_GAIN_12 +209 0x4848 //RX_FDEQ_GAIN_13 +210 0x4848 //RX_FDEQ_GAIN_14 +211 0x4848 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0202 //RX_FDEQ_BIN_0 +221 0x0203 //RX_FDEQ_BIN_1 +222 0x0304 //RX_FDEQ_BIN_2 +223 0x0405 //RX_FDEQ_BIN_3 +224 0x0607 //RX_FDEQ_BIN_4 +225 0x0809 //RX_FDEQ_BIN_5 +226 0x0A0B //RX_FDEQ_BIN_6 +227 0x0C0D //RX_FDEQ_BIN_7 +228 0x0E0F //RX_FDEQ_BIN_8 +229 0x1011 //RX_FDEQ_BIN_9 +230 0x1214 //RX_FDEQ_BIN_10 +231 0x1618 //RX_FDEQ_BIN_11 +232 0x1C1C //RX_FDEQ_BIN_12 +233 0x2020 //RX_FDEQ_BIN_13 +234 0x2020 //RX_FDEQ_BIN_14 +235 0x2011 //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x4000 //RX_FDEQ_RESRV_0 +245 0x0320 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0030 //RX_FDDRC_BAND_MARGIN_1 +248 0x0050 //RX_FDDRC_BAND_MARGIN_2 +249 0x0080 //RX_FDDRC_BAND_MARGIN_3 +250 0x0007 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x5000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x6400 //RX_FDDRC_THRD_3_2 +258 0x6400 //RX_FDDRC_THRD_3_3 +259 0x2000 //RX_FDDRC_SLANT_0_0 +260 0x2000 //RX_FDDRC_SLANT_0_1 +261 0x2000 //RX_FDDRC_SLANT_0_2 +262 0x2000 //RX_FDDRC_SLANT_0_3 +263 0x5333 //RX_FDDRC_SLANT_1_0 +264 0x5333 //RX_FDDRC_SLANT_1_1 +265 0x5333 //RX_FDDRC_SLANT_1_2 +266 0x5333 //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +286 0x0100 //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 +#VOL 2 +163 0x1000 //RX_TDDRC_ALPHA_UP_1 +164 0x1000 //RX_TDDRC_ALPHA_UP_2 +165 0x1000 //RX_TDDRC_ALPHA_UP_3 +166 0x1000 //RX_TDDRC_ALPHA_UP_4 +184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +190 0x7FFF //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +269 0x0000 //RX_TDDRC_THRD_0 +270 0x0000 //RX_TDDRC_THRD_1 +271 0x7FFF //RX_TDDRC_THRD_2 +272 0x7FFF //RX_TDDRC_THRD_3 +273 0x7FFF //RX_TDDRC_SLANT_0 +274 0x7FFF //RX_TDDRC_SLANT_1 +275 0x1000 //RX_TDDRC_ALPHA_UP_0 +276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x199A //RX_TDDRC_HMNC_GAIN +279 0x0001 //RX_TDDRC_SMT_FLAG +280 0x0CCD //RX_TDDRC_SMT_W +281 0x0155 //RX_TDDRC_DRC_GAIN +195 0x0020 //RX_FDEQ_SUBNUM +196 0x4848 //RX_FDEQ_GAIN_0 +197 0x4848 //RX_FDEQ_GAIN_1 +198 0x4848 //RX_FDEQ_GAIN_2 +199 0x4848 //RX_FDEQ_GAIN_3 +200 0x4848 //RX_FDEQ_GAIN_4 +201 0x4848 //RX_FDEQ_GAIN_5 +202 0x4848 //RX_FDEQ_GAIN_6 +203 0x4848 //RX_FDEQ_GAIN_7 +204 0x4848 //RX_FDEQ_GAIN_8 +205 0x4848 //RX_FDEQ_GAIN_9 +206 0x4848 //RX_FDEQ_GAIN_10 +207 0x4848 //RX_FDEQ_GAIN_11 +208 0x4848 //RX_FDEQ_GAIN_12 +209 0x4848 //RX_FDEQ_GAIN_13 +210 0x4848 //RX_FDEQ_GAIN_14 +211 0x4848 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0202 //RX_FDEQ_BIN_0 +221 0x0203 //RX_FDEQ_BIN_1 +222 0x0304 //RX_FDEQ_BIN_2 +223 0x0405 //RX_FDEQ_BIN_3 +224 0x0607 //RX_FDEQ_BIN_4 +225 0x0809 //RX_FDEQ_BIN_5 +226 0x0A0B //RX_FDEQ_BIN_6 +227 0x0C0D //RX_FDEQ_BIN_7 +228 0x0E0F //RX_FDEQ_BIN_8 +229 0x1011 //RX_FDEQ_BIN_9 +230 0x1214 //RX_FDEQ_BIN_10 +231 0x1618 //RX_FDEQ_BIN_11 +232 0x1C1C //RX_FDEQ_BIN_12 +233 0x2020 //RX_FDEQ_BIN_13 +234 0x2020 //RX_FDEQ_BIN_14 +235 0x2011 //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x4000 //RX_FDEQ_RESRV_0 +245 0x0320 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0030 //RX_FDDRC_BAND_MARGIN_1 +248 0x0050 //RX_FDDRC_BAND_MARGIN_2 +249 0x0080 //RX_FDDRC_BAND_MARGIN_3 +250 0x0007 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x5000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x6400 //RX_FDDRC_THRD_3_2 +258 0x6400 //RX_FDDRC_THRD_3_3 +259 0x2000 //RX_FDDRC_SLANT_0_0 +260 0x2000 //RX_FDDRC_SLANT_0_1 +261 0x2000 //RX_FDDRC_SLANT_0_2 +262 0x2000 //RX_FDDRC_SLANT_0_3 +263 0x5333 //RX_FDDRC_SLANT_1_0 +264 0x5333 //RX_FDDRC_SLANT_1_1 +265 0x5333 //RX_FDDRC_SLANT_1_2 +266 0x5333 //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +286 0x0100 //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 +#VOL 3 +163 0x1000 //RX_TDDRC_ALPHA_UP_1 +164 0x1000 //RX_TDDRC_ALPHA_UP_2 +165 0x1000 //RX_TDDRC_ALPHA_UP_3 +166 0x1000 //RX_TDDRC_ALPHA_UP_4 +184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +190 0x7FFF //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +269 0x0000 //RX_TDDRC_THRD_0 +270 0x0000 //RX_TDDRC_THRD_1 +271 0x7FFF //RX_TDDRC_THRD_2 +272 0x7FFF //RX_TDDRC_THRD_3 +273 0x7FFF //RX_TDDRC_SLANT_0 +274 0x7FFF //RX_TDDRC_SLANT_1 +275 0x1000 //RX_TDDRC_ALPHA_UP_0 +276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x199A //RX_TDDRC_HMNC_GAIN +279 0x0001 //RX_TDDRC_SMT_FLAG +280 0x0CCD //RX_TDDRC_SMT_W +281 0x0155 //RX_TDDRC_DRC_GAIN +195 0x0020 //RX_FDEQ_SUBNUM +196 0x4848 //RX_FDEQ_GAIN_0 +197 0x4848 //RX_FDEQ_GAIN_1 +198 0x4848 //RX_FDEQ_GAIN_2 +199 0x4848 //RX_FDEQ_GAIN_3 +200 0x4848 //RX_FDEQ_GAIN_4 +201 0x4848 //RX_FDEQ_GAIN_5 +202 0x4848 //RX_FDEQ_GAIN_6 +203 0x4848 //RX_FDEQ_GAIN_7 +204 0x4848 //RX_FDEQ_GAIN_8 +205 0x4848 //RX_FDEQ_GAIN_9 +206 0x4848 //RX_FDEQ_GAIN_10 +207 0x4848 //RX_FDEQ_GAIN_11 +208 0x4848 //RX_FDEQ_GAIN_12 +209 0x4848 //RX_FDEQ_GAIN_13 +210 0x4848 //RX_FDEQ_GAIN_14 +211 0x4848 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0202 //RX_FDEQ_BIN_0 +221 0x0203 //RX_FDEQ_BIN_1 +222 0x0304 //RX_FDEQ_BIN_2 +223 0x0405 //RX_FDEQ_BIN_3 +224 0x0607 //RX_FDEQ_BIN_4 +225 0x0809 //RX_FDEQ_BIN_5 +226 0x0A0B //RX_FDEQ_BIN_6 +227 0x0C0D //RX_FDEQ_BIN_7 +228 0x0E0F //RX_FDEQ_BIN_8 +229 0x1011 //RX_FDEQ_BIN_9 +230 0x1214 //RX_FDEQ_BIN_10 +231 0x1618 //RX_FDEQ_BIN_11 +232 0x1C1C //RX_FDEQ_BIN_12 +233 0x2020 //RX_FDEQ_BIN_13 +234 0x2020 //RX_FDEQ_BIN_14 +235 0x2011 //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x4000 //RX_FDEQ_RESRV_0 +245 0x0320 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0030 //RX_FDDRC_BAND_MARGIN_1 +248 0x0050 //RX_FDDRC_BAND_MARGIN_2 +249 0x0080 //RX_FDDRC_BAND_MARGIN_3 +250 0x0007 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x5000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x6400 //RX_FDDRC_THRD_3_2 +258 0x6400 //RX_FDDRC_THRD_3_3 +259 0x2000 //RX_FDDRC_SLANT_0_0 +260 0x2000 //RX_FDDRC_SLANT_0_1 +261 0x2000 //RX_FDDRC_SLANT_0_2 +262 0x2000 //RX_FDDRC_SLANT_0_3 +263 0x5333 //RX_FDDRC_SLANT_1_0 +264 0x5333 //RX_FDDRC_SLANT_1_1 +265 0x5333 //RX_FDDRC_SLANT_1_2 +266 0x5333 //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +286 0x0100 //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 +#VOL 4 +163 0x1000 //RX_TDDRC_ALPHA_UP_1 +164 0x1000 //RX_TDDRC_ALPHA_UP_2 +165 0x1000 //RX_TDDRC_ALPHA_UP_3 +166 0x1000 //RX_TDDRC_ALPHA_UP_4 +184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +190 0x7FFF //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +269 0x0000 //RX_TDDRC_THRD_0 +270 0x0000 //RX_TDDRC_THRD_1 +271 0x7FFF //RX_TDDRC_THRD_2 +272 0x7FFF //RX_TDDRC_THRD_3 +273 0x7FFF //RX_TDDRC_SLANT_0 +274 0x7FFF //RX_TDDRC_SLANT_1 +275 0x1000 //RX_TDDRC_ALPHA_UP_0 +276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x199A //RX_TDDRC_HMNC_GAIN +279 0x0001 //RX_TDDRC_SMT_FLAG +280 0x0CCD //RX_TDDRC_SMT_W +281 0x0155 //RX_TDDRC_DRC_GAIN +195 0x0020 //RX_FDEQ_SUBNUM +196 0x4848 //RX_FDEQ_GAIN_0 +197 0x4848 //RX_FDEQ_GAIN_1 +198 0x4848 //RX_FDEQ_GAIN_2 +199 0x4848 //RX_FDEQ_GAIN_3 +200 0x4848 //RX_FDEQ_GAIN_4 +201 0x4848 //RX_FDEQ_GAIN_5 +202 0x4848 //RX_FDEQ_GAIN_6 +203 0x4848 //RX_FDEQ_GAIN_7 +204 0x4848 //RX_FDEQ_GAIN_8 +205 0x4848 //RX_FDEQ_GAIN_9 +206 0x4848 //RX_FDEQ_GAIN_10 +207 0x4848 //RX_FDEQ_GAIN_11 +208 0x4848 //RX_FDEQ_GAIN_12 +209 0x4848 //RX_FDEQ_GAIN_13 +210 0x4848 //RX_FDEQ_GAIN_14 +211 0x4848 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0202 //RX_FDEQ_BIN_0 +221 0x0203 //RX_FDEQ_BIN_1 +222 0x0304 //RX_FDEQ_BIN_2 +223 0x0405 //RX_FDEQ_BIN_3 +224 0x0607 //RX_FDEQ_BIN_4 +225 0x0809 //RX_FDEQ_BIN_5 +226 0x0A0B //RX_FDEQ_BIN_6 +227 0x0C0D //RX_FDEQ_BIN_7 +228 0x0E0F //RX_FDEQ_BIN_8 +229 0x1011 //RX_FDEQ_BIN_9 +230 0x1214 //RX_FDEQ_BIN_10 +231 0x1618 //RX_FDEQ_BIN_11 +232 0x1C1C //RX_FDEQ_BIN_12 +233 0x2020 //RX_FDEQ_BIN_13 +234 0x2020 //RX_FDEQ_BIN_14 +235 0x2011 //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x4000 //RX_FDEQ_RESRV_0 +245 0x0320 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0030 //RX_FDDRC_BAND_MARGIN_1 +248 0x0050 //RX_FDDRC_BAND_MARGIN_2 +249 0x0080 //RX_FDDRC_BAND_MARGIN_3 +250 0x0007 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x5000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x6400 //RX_FDDRC_THRD_3_2 +258 0x6400 //RX_FDDRC_THRD_3_3 +259 0x2000 //RX_FDDRC_SLANT_0_0 +260 0x2000 //RX_FDDRC_SLANT_0_1 +261 0x2000 //RX_FDDRC_SLANT_0_2 +262 0x2000 //RX_FDDRC_SLANT_0_3 +263 0x5333 //RX_FDDRC_SLANT_1_0 +264 0x5333 //RX_FDDRC_SLANT_1_1 +265 0x5333 //RX_FDDRC_SLANT_1_2 +266 0x5333 //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +286 0x0100 //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 +#VOL 5 +163 0x1000 //RX_TDDRC_ALPHA_UP_1 +164 0x1000 //RX_TDDRC_ALPHA_UP_2 +165 0x1000 //RX_TDDRC_ALPHA_UP_3 +166 0x1000 //RX_TDDRC_ALPHA_UP_4 +184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +190 0x7FFF //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +269 0x0000 //RX_TDDRC_THRD_0 +270 0x0000 //RX_TDDRC_THRD_1 +271 0x7FFF //RX_TDDRC_THRD_2 +272 0x7FFF //RX_TDDRC_THRD_3 +273 0x7FFF //RX_TDDRC_SLANT_0 +274 0x7FFF //RX_TDDRC_SLANT_1 +275 0x1000 //RX_TDDRC_ALPHA_UP_0 +276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x199A //RX_TDDRC_HMNC_GAIN +279 0x0001 //RX_TDDRC_SMT_FLAG +280 0x0CCD //RX_TDDRC_SMT_W +281 0x0155 //RX_TDDRC_DRC_GAIN +195 0x0020 //RX_FDEQ_SUBNUM +196 0x4848 //RX_FDEQ_GAIN_0 +197 0x4848 //RX_FDEQ_GAIN_1 +198 0x4848 //RX_FDEQ_GAIN_2 +199 0x4848 //RX_FDEQ_GAIN_3 +200 0x4848 //RX_FDEQ_GAIN_4 +201 0x4848 //RX_FDEQ_GAIN_5 +202 0x4848 //RX_FDEQ_GAIN_6 +203 0x4848 //RX_FDEQ_GAIN_7 +204 0x4848 //RX_FDEQ_GAIN_8 +205 0x4848 //RX_FDEQ_GAIN_9 +206 0x4848 //RX_FDEQ_GAIN_10 +207 0x4848 //RX_FDEQ_GAIN_11 +208 0x4848 //RX_FDEQ_GAIN_12 +209 0x4848 //RX_FDEQ_GAIN_13 +210 0x4848 //RX_FDEQ_GAIN_14 +211 0x4848 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0202 //RX_FDEQ_BIN_0 +221 0x0203 //RX_FDEQ_BIN_1 +222 0x0304 //RX_FDEQ_BIN_2 +223 0x0405 //RX_FDEQ_BIN_3 +224 0x0607 //RX_FDEQ_BIN_4 +225 0x0809 //RX_FDEQ_BIN_5 +226 0x0A0B //RX_FDEQ_BIN_6 +227 0x0C0D //RX_FDEQ_BIN_7 +228 0x0E0F //RX_FDEQ_BIN_8 +229 0x1011 //RX_FDEQ_BIN_9 +230 0x1214 //RX_FDEQ_BIN_10 +231 0x1618 //RX_FDEQ_BIN_11 +232 0x1C1C //RX_FDEQ_BIN_12 +233 0x2020 //RX_FDEQ_BIN_13 +234 0x2020 //RX_FDEQ_BIN_14 +235 0x2011 //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x4000 //RX_FDEQ_RESRV_0 +245 0x0320 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0030 //RX_FDDRC_BAND_MARGIN_1 +248 0x0050 //RX_FDDRC_BAND_MARGIN_2 +249 0x0080 //RX_FDDRC_BAND_MARGIN_3 +250 0x0007 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x5000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x6400 //RX_FDDRC_THRD_3_2 +258 0x6400 //RX_FDDRC_THRD_3_3 +259 0x2000 //RX_FDDRC_SLANT_0_0 +260 0x2000 //RX_FDDRC_SLANT_0_1 +261 0x2000 //RX_FDDRC_SLANT_0_2 +262 0x2000 //RX_FDDRC_SLANT_0_3 +263 0x5333 //RX_FDDRC_SLANT_1_0 +264 0x5333 //RX_FDDRC_SLANT_1_1 +265 0x5333 //RX_FDDRC_SLANT_1_2 +266 0x5333 //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +286 0x0100 //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 +#VOL 6 +163 0x1000 //RX_TDDRC_ALPHA_UP_1 +164 0x1000 //RX_TDDRC_ALPHA_UP_2 +165 0x1000 //RX_TDDRC_ALPHA_UP_3 +166 0x1000 //RX_TDDRC_ALPHA_UP_4 +184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +190 0x7FFF //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +269 0x0000 //RX_TDDRC_THRD_0 +270 0x0000 //RX_TDDRC_THRD_1 +271 0x7FFF //RX_TDDRC_THRD_2 +272 0x7FFF //RX_TDDRC_THRD_3 +273 0x7FFF //RX_TDDRC_SLANT_0 +274 0x7FFF //RX_TDDRC_SLANT_1 +275 0x1000 //RX_TDDRC_ALPHA_UP_0 +276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x199A //RX_TDDRC_HMNC_GAIN +279 0x0001 //RX_TDDRC_SMT_FLAG +280 0x0CCD //RX_TDDRC_SMT_W +281 0x0155 //RX_TDDRC_DRC_GAIN +195 0x0020 //RX_FDEQ_SUBNUM +196 0x4848 //RX_FDEQ_GAIN_0 +197 0x4848 //RX_FDEQ_GAIN_1 +198 0x4848 //RX_FDEQ_GAIN_2 +199 0x4848 //RX_FDEQ_GAIN_3 +200 0x4848 //RX_FDEQ_GAIN_4 +201 0x4848 //RX_FDEQ_GAIN_5 +202 0x4848 //RX_FDEQ_GAIN_6 +203 0x4848 //RX_FDEQ_GAIN_7 +204 0x4848 //RX_FDEQ_GAIN_8 +205 0x4848 //RX_FDEQ_GAIN_9 +206 0x4848 //RX_FDEQ_GAIN_10 +207 0x4848 //RX_FDEQ_GAIN_11 +208 0x4848 //RX_FDEQ_GAIN_12 +209 0x4848 //RX_FDEQ_GAIN_13 +210 0x4848 //RX_FDEQ_GAIN_14 +211 0x4848 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0202 //RX_FDEQ_BIN_0 +221 0x0203 //RX_FDEQ_BIN_1 +222 0x0304 //RX_FDEQ_BIN_2 +223 0x0405 //RX_FDEQ_BIN_3 +224 0x0607 //RX_FDEQ_BIN_4 +225 0x0809 //RX_FDEQ_BIN_5 +226 0x0A0B //RX_FDEQ_BIN_6 +227 0x0C0D //RX_FDEQ_BIN_7 +228 0x0E0F //RX_FDEQ_BIN_8 +229 0x1011 //RX_FDEQ_BIN_9 +230 0x1214 //RX_FDEQ_BIN_10 +231 0x1618 //RX_FDEQ_BIN_11 +232 0x1C1C //RX_FDEQ_BIN_12 +233 0x2020 //RX_FDEQ_BIN_13 +234 0x2020 //RX_FDEQ_BIN_14 +235 0x2011 //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x4000 //RX_FDEQ_RESRV_0 +245 0x0320 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0030 //RX_FDDRC_BAND_MARGIN_1 +248 0x0050 //RX_FDDRC_BAND_MARGIN_2 +249 0x0080 //RX_FDDRC_BAND_MARGIN_3 +250 0x0007 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x5000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x6400 //RX_FDDRC_THRD_3_2 +258 0x6400 //RX_FDDRC_THRD_3_3 +259 0x2000 //RX_FDDRC_SLANT_0_0 +260 0x2000 //RX_FDDRC_SLANT_0_1 +261 0x2000 //RX_FDDRC_SLANT_0_2 +262 0x2000 //RX_FDDRC_SLANT_0_3 +263 0x5333 //RX_FDDRC_SLANT_1_0 +264 0x5333 //RX_FDDRC_SLANT_1_1 +265 0x5333 //RX_FDDRC_SLANT_1_2 +266 0x5333 //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +286 0x0100 //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 #CASE_NAME BLUETOOTH-BTNB-VOICE_GENERIC-NB -#PARAM_TYPE TX+RX -#TOTAL_CUSTOM_STEP 7 +#PARAM_MODE Full +#PARAM_TYPE TX+2RX +#TOTAL_CUSTOM_STEP 7+7 #TX 0 0x0008 //TX_OPERATION_MODE_0 1 0x0008 //TX_OPERATION_MODE_1 @@ -9023,20 +13609,20 @@ 248 0xF400 //TX_THR_SN_EST_6 249 0xF600 //TX_THR_SN_EST_7 250 0x0000 //TX_DELTA_THR_SN_EST_0 -251 0x0000 //TX_DELTA_THR_SN_EST_1 +251 0x0200 //TX_DELTA_THR_SN_EST_1 252 0x0200 //TX_DELTA_THR_SN_EST_2 253 0x0200 //TX_DELTA_THR_SN_EST_3 254 0x0200 //TX_DELTA_THR_SN_EST_4 255 0x0200 //TX_DELTA_THR_SN_EST_5 -256 0x0200 //TX_DELTA_THR_SN_EST_6 +256 0x0000 //TX_DELTA_THR_SN_EST_6 257 0x0200 //TX_DELTA_THR_SN_EST_7 258 0x6000 //TX_LAMBDA_NN_EST_0 -259 0x6000 //TX_LAMBDA_NN_EST_1 +259 0x4000 //TX_LAMBDA_NN_EST_1 260 0x4000 //TX_LAMBDA_NN_EST_2 261 0x4000 //TX_LAMBDA_NN_EST_3 262 0x4000 //TX_LAMBDA_NN_EST_4 263 0x4000 //TX_LAMBDA_NN_EST_5 -264 0x4000 //TX_LAMBDA_NN_EST_6 +264 0x6000 //TX_LAMBDA_NN_EST_6 265 0x4000 //TX_LAMBDA_NN_EST_7 266 0x0400 //TX_N_SN_EST 267 0x001E //TX_INBEAM_T @@ -9054,16 +13640,16 @@ 279 0x1000 //TX_B_POST_FLT_0 280 0x1000 //TX_B_POST_FLT_1 281 0x000F //TX_NS_LVL_CTRL_0 -282 0x000F //TX_NS_LVL_CTRL_1 -283 0x0011 //TX_NS_LVL_CTRL_2 +282 0x0011 //TX_NS_LVL_CTRL_1 +283 0x000F //TX_NS_LVL_CTRL_2 284 0x000F //TX_NS_LVL_CTRL_3 285 0x000F //TX_NS_LVL_CTRL_4 286 0x000F //TX_NS_LVL_CTRL_5 287 0x000F //TX_NS_LVL_CTRL_6 288 0x0011 //TX_NS_LVL_CTRL_7 289 0x000C //TX_MIN_GAIN_S_0 -290 0x000C //TX_MIN_GAIN_S_1 -291 0x000F //TX_MIN_GAIN_S_2 +290 0x000F //TX_MIN_GAIN_S_1 +291 0x000C //TX_MIN_GAIN_S_2 292 0x000C //TX_MIN_GAIN_S_3 293 0x000C //TX_MIN_GAIN_S_4 294 0x000C //TX_MIN_GAIN_S_5 @@ -9087,12 +13673,12 @@ 312 0x7FFF //TX_A_POST_FILT_0 313 0x2000 //TX_A_POST_FILT_1 314 0x4000 //TX_A_POST_FILT_S_0 -315 0x4000 //TX_A_POST_FILT_S_1 +315 0x5000 //TX_A_POST_FILT_S_1 316 0x5000 //TX_A_POST_FILT_S_2 317 0x5000 //TX_A_POST_FILT_S_3 318 0x5000 //TX_A_POST_FILT_S_4 319 0x5000 //TX_A_POST_FILT_S_5 -320 0x5000 //TX_A_POST_FILT_S_6 +320 0x4000 //TX_A_POST_FILT_S_6 321 0x5000 //TX_A_POST_FILT_S_7 322 0x1000 //TX_B_POST_FILT_0 323 0x1000 //TX_B_POST_FILT_1 @@ -9152,10 +13738,10 @@ 377 0x7FFF //TX_NOISE_TH_5_4 378 0x044C //TX_NOISE_TH_6 379 0x0014 //TX_MINENOISE_TH -380 0x4000 //TX_MINENOISE_MIC0_TH_MTS -381 0xFFEE //TX_MINENOISE_MIC0_TH_EXP -382 0x6000 //TX_MINENOISE_MIC0_S_TH_MTS -383 0xFFF3 //TX_MINENOISE_MIC0_S_TH_EXP +380 0x4000 //TX_MORENS_TFMASK_TH +381 0xFFEE //TX_DRC_QUIET_FLOOR +382 0x6000 //TX_RATIODTL_CUT_TH +383 0xFFF3 //TX_DT_CUT_K1 384 0x0666 //TX_OUT_ENER_S_TH_CLEAN 385 0x0666 //TX_OUT_ENER_S_TH_LESSCLEAN 386 0x0333 //TX_OUT_ENER_S_TH_NOISY @@ -9163,15 +13749,15 @@ 388 0x0333 //TX_OUT_ENER_TH_SPEECH 389 0x2000 //TX_SN_NPB_GAIN 390 0x0000 //TX_NN_NPB_GAIN -391 0x0000 //TX_CSX_ALPHA_0 -392 0x0000 //TX_CSX_ALPHA_1 -393 0x0000 //TX_CSX_ALPHA_2 -394 0x0000 //TX_CSX_ALPHA_3 -395 0x0800 //TX_MU_ARSP_EST -396 0x00C8 //TX_P_OUTBEAM_MIN_TH +391 0x0000 //TX_POST_MASK_SUP_HSNE +392 0x0000 //TX_TAIL_DET_TH +393 0x0000 //TX_B_LESSCUT_RTO_WTA +394 0x0000 //TX_MEL_G_R +395 0x0800 //TX_SUPHIGH_TH +396 0x00C8 //TX_MASK_G_R 397 0x0002 //TX_EXTRA_NS_L -398 0x0800 //TX_EXTRA_NS_A -399 0x0005 //TX_VR_NOISE_FLOOR_TH +398 0x0800 //TX_C_POST_FLT_MASK +399 0x0005 //TX_A_POST_FLT_WNS 400 0x0148 //TX_MIN_G_LOW300HZ 401 0x0002 //TX_MAXLEVEL_CNG 402 0x00B4 //TX_STN_NOISE_TH @@ -9286,16 +13872,16 @@ 511 0x6666 //TX_MIC_TO_BFGAIN 512 0x0000 //TX_MICTOBFGAIN0 513 0x0000 //TX_FASTMUE_TH -514 0x0000 //TX_DERVB_LEN_0 -515 0x0000 //TX_DERVB_LEN_1 -516 0x0000 //TX_RHO_DERVB -517 0x0000 //TX_MIC_INDX_DERVB -518 0x0000 //TX_MU_DERVB -519 0x0000 //TX_DR_RESRV_0 -520 0x0000 //TX_DR_RESRV_1 -521 0x0000 //TX_DR_RESRV_2 -522 0x0000 //TX_DR_RESRV_3 -523 0x0000 //TX_DR_RESRV_4 +514 0x0000 //TX_DEREVERB_LF_MU +515 0x0000 //TX_DEREVERB_HF_MU +516 0x0000 //TX_DEREVERB_DELAY +517 0x0000 //TX_DEREVERB_COEF_LEN +518 0x0000 //TX_DEREVERB_DNR +519 0x0000 //TX_DEREVERB_ALPHA +520 0x0000 //TX_DEREVERB_BETA +521 0x0000 //TX_GSC_RTOL_TH +522 0x0000 //TX_GSC_RTOH_TH +523 0x0000 //TX_WIDE2_MEANHTH 524 0x0000 //TX_DR_RESRV_5 525 0x0000 //TX_DR_RESRV_6 526 0x0000 //TX_DR_RESRV_7 @@ -9669,8 +14255,73 @@ 894 0xC000 //TX_FASTNS_SSA_THHFL 895 0xCCCC //TX_FASTNS_SSA_THLFH 896 0xD999 //TX_FASTNS_SSA_THHFH +897 0x0000 //TX_SENDFUNC_REG_MICMUTE +898 0x0000 //TX_SENDFUNC_REG_MICMUTE1 +899 0x0000 //TX_MICMUTE_RATIO_THR +900 0x0000 //TX_MICMUTE_AMP_THR +901 0x0000 //TX_MICMUTE_HPF_IND +902 0x0000 //TX_MICMUTE_LOG_EYR_TH +903 0x0000 //TX_MICMUTE_CVG_TIME +904 0x0000 //TX_MICMUTE_RELEASE_TIME +905 0x0000 //TX_MIC_VOLUME_MIC0MUTE +906 0x0000 //TX_MICMUTE_EPD_OFFSET_0 +907 0x0000 //TX_MICMUTE_FRQ_AEC_L +908 0x0000 //TX_MICMUTE_EAD_THR +909 0x0000 //TX_MICMUTE_LAMBDA_CB_NLE +910 0x0000 //TX_MICMUTE_LAMBDA_RE_EST +911 0x0000 //TX_DTD_THR1_MICMUTE_0 +912 0x0000 //TX_DTD_THR1_MICMUTE_1 +913 0x0000 //TX_DTD_THR1_MICMUTE_2 +914 0x0000 //TX_DTD_THR1_MICMUTE_3 +915 0x0000 //TX_DTD_THR2_MICMUTE_0 +916 0x0000 //TX_MICMUTE_MIN_EQ_RE_EST_0 +917 0x0000 //TX_MICMUTE_MIN_EQ_RE_EST_1 +918 0x0000 //TX_MICMUTE_MIN_EQ_RE_EST_2 +919 0x0000 //TX_MICMUTE_MIN_EQ_RE_EST_3 +920 0x0000 //TX_MICMUTE_MIN_EQ_RE_EST_4 +921 0x0000 //TX_MICMUTE_C_POST_FLT +922 0x0000 //TX_MICMUTE_DT_CUT_K +923 0x0000 //TX_MICMUTE_DT_CUT_THR +924 0x0000 //TX_MICMUTE_DT_CUT_K2 +925 0x0000 //TX_MICMUTE_DT_CUT_THR2 +926 0x0000 //TX_MICMUTE_DT2_HOLD_N +927 0x0000 //TX_MICMUTE_RATIODTH_THCUT +928 0x0000 //TX_MICMUTE_B_POST_FLT_ECHOL +929 0x0000 //TX_MICMUTE_B_POST_FLT_ECHOH +930 0x0000 //TX_MICMUTE_C_POST_FLT_MASK +931 0x0000 //TX_MICMUTE_RATIODTL_CUT_TH +932 0x0000 //TX_MICMUTE_DT_CUT_K1 +933 0x0000 //TX_MICMUTE_N2_SN_EST +934 0x0000 //TX_MICMUTE_THR_SN_EST_0 +935 0x0000 //TX_MICMUTE_MIN_G_CTRL_0 +936 0x0000 //TX_MICMUTE_A_POST_FILT_S_0 +937 0x0000 //TX_MICMUTE_B_POST_FILT_0 +938 0x0000 //TX_MIC1RUB_AMP_THR +939 0x0000 //TX_MIC1MUTE_RATIO_THR +940 0x0000 //TX_MIC1MUTE_AMP_THR +941 0x0000 //TX_MIC1MUTE_CVG_TIME +942 0x0000 //TX_MIC1MUTE_RELEASE_TIME +943 0x0000 //TX_AMS_RESRV_01 +944 0x0000 //TX_AMS_RESRV_02 +945 0x0000 //TX_AMS_RESRV_03 +946 0x0000 //TX_AMS_RESRV_04 +947 0x0000 //TX_AMS_RESRV_05 +948 0x0000 //TX_AMS_RESRV_06 +949 0x0000 //TX_AMS_RESRV_07 +950 0x0000 //TX_AMS_RESRV_08 +951 0x0000 //TX_AMS_RESRV_09 +952 0x0000 //TX_AMS_RESRV_10 +953 0x0000 //TX_AMS_RESRV_11 +954 0x0000 //TX_AMS_RESRV_12 +955 0x0000 //TX_AMS_RESRV_13 +956 0x0000 //TX_AMS_RESRV_14 +957 0x0000 //TX_AMS_RESRV_15 +958 0x0000 //TX_AMS_RESRV_16 +959 0x0000 //TX_AMS_RESRV_17 +960 0x0000 //TX_AMS_RESRV_18 +961 0x0000 //TX_AMS_RESRV_19 #RX -0 0x006C //RX_RECVFUNC_MODE_0 +0 0x206C //RX_RECVFUNC_MODE_0 1 0x0000 //RX_RECVFUNC_MODE_1 2 0x0000 //RX_SAMPLINGFREQ_SIG 3 0x0000 //RX_SAMPLINGFREQ_PROC @@ -10520,10 +15171,862 @@ 110 0x0000 //RX_FDDRC_RESRV_0 129 0x0100 //RX_SPK_VOL 130 0x0000 //RX_VOL_RESRV_0 +#RX 2 +157 0x206C //RX_RECVFUNC_MODE_0 +158 0x0000 //RX_RECVFUNC_MODE_1 +159 0x0000 //RX_SAMPLINGFREQ_SIG +160 0x0000 //RX_SAMPLINGFREQ_PROC +161 0x000A //RX_FRAME_SZ +162 0x0000 //RX_DELAY_OPT +163 0x3000 //RX_TDDRC_ALPHA_UP_1 +164 0x3000 //RX_TDDRC_ALPHA_UP_2 +165 0x3000 //RX_TDDRC_ALPHA_UP_3 +166 0x3000 //RX_TDDRC_ALPHA_UP_4 +167 0x0800 //RX_PGA +168 0x7FFF //RX_A_HP +169 0x0000 //RX_B_PE +170 0x3800 //RX_THR_PITCH_DET_0 +171 0x3000 //RX_THR_PITCH_DET_1 +172 0x2800 //RX_THR_PITCH_DET_2 +173 0x0008 //RX_PITCH_BFR_LEN +174 0x0003 //RX_SBD_PITCH_DET +175 0x0100 //RX_PP_RESRV_0 +176 0x0020 //RX_PP_RESRV_1 +177 0x0600 //RX_N_SN_EST +178 0x000C //RX_N2_SN_EST +179 0x0010 //RX_NS_LVL_CTRL +180 0xF800 //RX_THR_SN_EST +181 0x7CCD //RX_LAMBDA_PFILT +182 0x000A //RX_FENS_RESRV_0 +183 0x0190 //RX_FENS_RESRV_1 +184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +187 0x0002 //RX_EXTRA_NS_L +188 0x0800 //RX_EXTRA_NS_A +189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +190 0x7FFF //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +192 0x199A //RX_A_POST_FLT +193 0x0000 //RX_LMT_THRD +194 0x4000 //RX_LMT_ALPHA +195 0x0014 //RX_FDEQ_SUBNUM +196 0x4848 //RX_FDEQ_GAIN_0 +197 0x4848 //RX_FDEQ_GAIN_1 +198 0x4848 //RX_FDEQ_GAIN_2 +199 0x4848 //RX_FDEQ_GAIN_3 +200 0x4848 //RX_FDEQ_GAIN_4 +201 0x4848 //RX_FDEQ_GAIN_5 +202 0x4444 //RX_FDEQ_GAIN_6 +203 0x4040 //RX_FDEQ_GAIN_7 +204 0x4040 //RX_FDEQ_GAIN_8 +205 0x4040 //RX_FDEQ_GAIN_9 +206 0x4848 //RX_FDEQ_GAIN_10 +207 0x4848 //RX_FDEQ_GAIN_11 +208 0x4848 //RX_FDEQ_GAIN_12 +209 0x4848 //RX_FDEQ_GAIN_13 +210 0x4848 //RX_FDEQ_GAIN_14 +211 0x4848 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0202 //RX_FDEQ_BIN_0 +221 0x0203 //RX_FDEQ_BIN_1 +222 0x0303 //RX_FDEQ_BIN_2 +223 0x0304 //RX_FDEQ_BIN_3 +224 0x0405 //RX_FDEQ_BIN_4 +225 0x0506 //RX_FDEQ_BIN_5 +226 0x0708 //RX_FDEQ_BIN_6 +227 0x090A //RX_FDEQ_BIN_7 +228 0x0B0C //RX_FDEQ_BIN_8 +229 0x0D0E //RX_FDEQ_BIN_9 +230 0x0000 //RX_FDEQ_BIN_10 +231 0x0000 //RX_FDEQ_BIN_11 +232 0x0000 //RX_FDEQ_BIN_12 +233 0x0000 //RX_FDEQ_BIN_13 +234 0x0000 //RX_FDEQ_BIN_14 +235 0x0000 //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x4000 //RX_FDEQ_RESRV_0 +245 0x0320 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0030 //RX_FDDRC_BAND_MARGIN_1 +248 0x0050 //RX_FDDRC_BAND_MARGIN_2 +249 0x0080 //RX_FDDRC_BAND_MARGIN_3 +250 0x0007 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x5000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x6400 //RX_FDDRC_THRD_3_2 +258 0x6400 //RX_FDDRC_THRD_3_3 +259 0x2000 //RX_FDDRC_SLANT_0_0 +260 0x2000 //RX_FDDRC_SLANT_0_1 +261 0x2000 //RX_FDDRC_SLANT_0_2 +262 0x2000 //RX_FDDRC_SLANT_0_3 +263 0x5333 //RX_FDDRC_SLANT_1_0 +264 0x5333 //RX_FDDRC_SLANT_1_1 +265 0x5333 //RX_FDDRC_SLANT_1_2 +266 0x5333 //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +268 0x0000 //RX_FILTINDX +269 0x0000 //RX_TDDRC_THRD_0 +270 0x0000 //RX_TDDRC_THRD_1 +271 0x7FFF //RX_TDDRC_THRD_2 +272 0x7FFF //RX_TDDRC_THRD_3 +273 0x7FFF //RX_TDDRC_SLANT_0 +274 0x7EB8 //RX_TDDRC_SLANT_1 +275 0x3000 //RX_TDDRC_ALPHA_UP_0 +276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x199A //RX_TDDRC_HMNC_GAIN +279 0x0001 //RX_TDDRC_SMT_FLAG +280 0x0CCD //RX_TDDRC_SMT_W +281 0x017F //RX_TDDRC_DRC_GAIN +282 0x7C00 //RX_LAMBDA_PKA_FP +283 0x2000 //RX_TPKA_FP +284 0x2000 //RX_MIN_G_FP +285 0x0080 //RX_MAX_G_FP +286 0x0100 //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 +288 0x0000 //RX_MAXLEVEL_CNG +289 0x3000 //RX_BWE_UV_TH +290 0x3000 //RX_BWE_UV_TH2 +291 0x1800 //RX_BWE_UV_TH3 +292 0x1000 //RX_BWE_V_TH +293 0x04CD //RX_BWE_GAIN1_V_TH1 +294 0x0F33 //RX_BWE_GAIN1_V_TH2 +295 0x7333 //RX_BWE_UV_EQ +296 0x199A //RX_BWE_V_EQ +297 0x7333 //RX_BWE_TONE_TH +298 0x0004 //RX_BWE_UV_HOLD_T +299 0x6CCD //RX_BWE_GAIN2_ALPHA +300 0x799A //RX_BWE_GAIN3_ALPHA +301 0x001E //RX_BWE_CUTOFF +302 0x3000 //RX_BWE_GAINFILL +303 0x3200 //RX_BWE_MAXTH_TONE +304 0x2000 //RX_BWE_EQ_0 +305 0x2000 //RX_BWE_EQ_1 +306 0x2000 //RX_BWE_EQ_2 +307 0x2000 //RX_BWE_EQ_3 +308 0x2000 //RX_BWE_EQ_4 +309 0x2000 //RX_BWE_EQ_5 +310 0x2000 //RX_BWE_EQ_6 +311 0x0000 //RX_BWE_RESRV_0 +312 0x0000 //RX_BWE_RESRV_1 +313 0x0000 //RX_BWE_RESRV_2 +#VOL 0 +163 0x3000 //RX_TDDRC_ALPHA_UP_1 +164 0x3000 //RX_TDDRC_ALPHA_UP_2 +165 0x3000 //RX_TDDRC_ALPHA_UP_3 +166 0x3000 //RX_TDDRC_ALPHA_UP_4 +184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +190 0x7FFF //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +269 0x0000 //RX_TDDRC_THRD_0 +270 0x0000 //RX_TDDRC_THRD_1 +271 0x7FFF //RX_TDDRC_THRD_2 +272 0x7FFF //RX_TDDRC_THRD_3 +273 0x7FFF //RX_TDDRC_SLANT_0 +274 0x7EB8 //RX_TDDRC_SLANT_1 +275 0x3000 //RX_TDDRC_ALPHA_UP_0 +276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x199A //RX_TDDRC_HMNC_GAIN +279 0x0001 //RX_TDDRC_SMT_FLAG +280 0x0CCD //RX_TDDRC_SMT_W +281 0x017F //RX_TDDRC_DRC_GAIN +195 0x0014 //RX_FDEQ_SUBNUM +196 0x4848 //RX_FDEQ_GAIN_0 +197 0x4848 //RX_FDEQ_GAIN_1 +198 0x4848 //RX_FDEQ_GAIN_2 +199 0x4848 //RX_FDEQ_GAIN_3 +200 0x4848 //RX_FDEQ_GAIN_4 +201 0x4848 //RX_FDEQ_GAIN_5 +202 0x4444 //RX_FDEQ_GAIN_6 +203 0x4040 //RX_FDEQ_GAIN_7 +204 0x4040 //RX_FDEQ_GAIN_8 +205 0x4040 //RX_FDEQ_GAIN_9 +206 0x4848 //RX_FDEQ_GAIN_10 +207 0x4848 //RX_FDEQ_GAIN_11 +208 0x4848 //RX_FDEQ_GAIN_12 +209 0x4848 //RX_FDEQ_GAIN_13 +210 0x4848 //RX_FDEQ_GAIN_14 +211 0x4848 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0202 //RX_FDEQ_BIN_0 +221 0x0203 //RX_FDEQ_BIN_1 +222 0x0303 //RX_FDEQ_BIN_2 +223 0x0304 //RX_FDEQ_BIN_3 +224 0x0405 //RX_FDEQ_BIN_4 +225 0x0506 //RX_FDEQ_BIN_5 +226 0x0708 //RX_FDEQ_BIN_6 +227 0x090A //RX_FDEQ_BIN_7 +228 0x0B0C //RX_FDEQ_BIN_8 +229 0x0D0E //RX_FDEQ_BIN_9 +230 0x0000 //RX_FDEQ_BIN_10 +231 0x0000 //RX_FDEQ_BIN_11 +232 0x0000 //RX_FDEQ_BIN_12 +233 0x0000 //RX_FDEQ_BIN_13 +234 0x0000 //RX_FDEQ_BIN_14 +235 0x0000 //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x4000 //RX_FDEQ_RESRV_0 +245 0x0320 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0030 //RX_FDDRC_BAND_MARGIN_1 +248 0x0050 //RX_FDDRC_BAND_MARGIN_2 +249 0x0080 //RX_FDDRC_BAND_MARGIN_3 +250 0x0007 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x5000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x6400 //RX_FDDRC_THRD_3_2 +258 0x6400 //RX_FDDRC_THRD_3_3 +259 0x2000 //RX_FDDRC_SLANT_0_0 +260 0x2000 //RX_FDDRC_SLANT_0_1 +261 0x2000 //RX_FDDRC_SLANT_0_2 +262 0x2000 //RX_FDDRC_SLANT_0_3 +263 0x5333 //RX_FDDRC_SLANT_1_0 +264 0x5333 //RX_FDDRC_SLANT_1_1 +265 0x5333 //RX_FDDRC_SLANT_1_2 +266 0x5333 //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +286 0x0100 //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 +#VOL 1 +163 0x3000 //RX_TDDRC_ALPHA_UP_1 +164 0x3000 //RX_TDDRC_ALPHA_UP_2 +165 0x3000 //RX_TDDRC_ALPHA_UP_3 +166 0x3000 //RX_TDDRC_ALPHA_UP_4 +184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +190 0x7FFF //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +269 0x0000 //RX_TDDRC_THRD_0 +270 0x0000 //RX_TDDRC_THRD_1 +271 0x7FFF //RX_TDDRC_THRD_2 +272 0x7FFF //RX_TDDRC_THRD_3 +273 0x7FFF //RX_TDDRC_SLANT_0 +274 0x7EB8 //RX_TDDRC_SLANT_1 +275 0x3000 //RX_TDDRC_ALPHA_UP_0 +276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x199A //RX_TDDRC_HMNC_GAIN +279 0x0001 //RX_TDDRC_SMT_FLAG +280 0x0CCD //RX_TDDRC_SMT_W +281 0x017F //RX_TDDRC_DRC_GAIN +195 0x0014 //RX_FDEQ_SUBNUM +196 0x4848 //RX_FDEQ_GAIN_0 +197 0x4848 //RX_FDEQ_GAIN_1 +198 0x4848 //RX_FDEQ_GAIN_2 +199 0x4848 //RX_FDEQ_GAIN_3 +200 0x4848 //RX_FDEQ_GAIN_4 +201 0x4848 //RX_FDEQ_GAIN_5 +202 0x4444 //RX_FDEQ_GAIN_6 +203 0x4040 //RX_FDEQ_GAIN_7 +204 0x4040 //RX_FDEQ_GAIN_8 +205 0x4040 //RX_FDEQ_GAIN_9 +206 0x4848 //RX_FDEQ_GAIN_10 +207 0x4848 //RX_FDEQ_GAIN_11 +208 0x4848 //RX_FDEQ_GAIN_12 +209 0x4848 //RX_FDEQ_GAIN_13 +210 0x4848 //RX_FDEQ_GAIN_14 +211 0x4848 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0202 //RX_FDEQ_BIN_0 +221 0x0203 //RX_FDEQ_BIN_1 +222 0x0303 //RX_FDEQ_BIN_2 +223 0x0304 //RX_FDEQ_BIN_3 +224 0x0405 //RX_FDEQ_BIN_4 +225 0x0506 //RX_FDEQ_BIN_5 +226 0x0708 //RX_FDEQ_BIN_6 +227 0x090A //RX_FDEQ_BIN_7 +228 0x0B0C //RX_FDEQ_BIN_8 +229 0x0D0E //RX_FDEQ_BIN_9 +230 0x0000 //RX_FDEQ_BIN_10 +231 0x0000 //RX_FDEQ_BIN_11 +232 0x0000 //RX_FDEQ_BIN_12 +233 0x0000 //RX_FDEQ_BIN_13 +234 0x0000 //RX_FDEQ_BIN_14 +235 0x0000 //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x4000 //RX_FDEQ_RESRV_0 +245 0x0320 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0030 //RX_FDDRC_BAND_MARGIN_1 +248 0x0050 //RX_FDDRC_BAND_MARGIN_2 +249 0x0080 //RX_FDDRC_BAND_MARGIN_3 +250 0x0007 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x5000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x6400 //RX_FDDRC_THRD_3_2 +258 0x6400 //RX_FDDRC_THRD_3_3 +259 0x2000 //RX_FDDRC_SLANT_0_0 +260 0x2000 //RX_FDDRC_SLANT_0_1 +261 0x2000 //RX_FDDRC_SLANT_0_2 +262 0x2000 //RX_FDDRC_SLANT_0_3 +263 0x5333 //RX_FDDRC_SLANT_1_0 +264 0x5333 //RX_FDDRC_SLANT_1_1 +265 0x5333 //RX_FDDRC_SLANT_1_2 +266 0x5333 //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +286 0x0100 //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 +#VOL 2 +163 0x3000 //RX_TDDRC_ALPHA_UP_1 +164 0x3000 //RX_TDDRC_ALPHA_UP_2 +165 0x3000 //RX_TDDRC_ALPHA_UP_3 +166 0x3000 //RX_TDDRC_ALPHA_UP_4 +184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +190 0x7FFF //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +269 0x0000 //RX_TDDRC_THRD_0 +270 0x0000 //RX_TDDRC_THRD_1 +271 0x7FFF //RX_TDDRC_THRD_2 +272 0x7FFF //RX_TDDRC_THRD_3 +273 0x7FFF //RX_TDDRC_SLANT_0 +274 0x7EB8 //RX_TDDRC_SLANT_1 +275 0x3000 //RX_TDDRC_ALPHA_UP_0 +276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x199A //RX_TDDRC_HMNC_GAIN +279 0x0001 //RX_TDDRC_SMT_FLAG +280 0x0CCD //RX_TDDRC_SMT_W +281 0x017F //RX_TDDRC_DRC_GAIN +195 0x0014 //RX_FDEQ_SUBNUM +196 0x4848 //RX_FDEQ_GAIN_0 +197 0x4848 //RX_FDEQ_GAIN_1 +198 0x4848 //RX_FDEQ_GAIN_2 +199 0x4848 //RX_FDEQ_GAIN_3 +200 0x4848 //RX_FDEQ_GAIN_4 +201 0x4848 //RX_FDEQ_GAIN_5 +202 0x4444 //RX_FDEQ_GAIN_6 +203 0x4040 //RX_FDEQ_GAIN_7 +204 0x4040 //RX_FDEQ_GAIN_8 +205 0x4040 //RX_FDEQ_GAIN_9 +206 0x4848 //RX_FDEQ_GAIN_10 +207 0x4848 //RX_FDEQ_GAIN_11 +208 0x4848 //RX_FDEQ_GAIN_12 +209 0x4848 //RX_FDEQ_GAIN_13 +210 0x4848 //RX_FDEQ_GAIN_14 +211 0x4848 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0202 //RX_FDEQ_BIN_0 +221 0x0203 //RX_FDEQ_BIN_1 +222 0x0303 //RX_FDEQ_BIN_2 +223 0x0304 //RX_FDEQ_BIN_3 +224 0x0405 //RX_FDEQ_BIN_4 +225 0x0506 //RX_FDEQ_BIN_5 +226 0x0708 //RX_FDEQ_BIN_6 +227 0x090A //RX_FDEQ_BIN_7 +228 0x0B0C //RX_FDEQ_BIN_8 +229 0x0D0E //RX_FDEQ_BIN_9 +230 0x0000 //RX_FDEQ_BIN_10 +231 0x0000 //RX_FDEQ_BIN_11 +232 0x0000 //RX_FDEQ_BIN_12 +233 0x0000 //RX_FDEQ_BIN_13 +234 0x0000 //RX_FDEQ_BIN_14 +235 0x0000 //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x4000 //RX_FDEQ_RESRV_0 +245 0x0320 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0030 //RX_FDDRC_BAND_MARGIN_1 +248 0x0050 //RX_FDDRC_BAND_MARGIN_2 +249 0x0080 //RX_FDDRC_BAND_MARGIN_3 +250 0x0007 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x5000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x6400 //RX_FDDRC_THRD_3_2 +258 0x6400 //RX_FDDRC_THRD_3_3 +259 0x2000 //RX_FDDRC_SLANT_0_0 +260 0x2000 //RX_FDDRC_SLANT_0_1 +261 0x2000 //RX_FDDRC_SLANT_0_2 +262 0x2000 //RX_FDDRC_SLANT_0_3 +263 0x5333 //RX_FDDRC_SLANT_1_0 +264 0x5333 //RX_FDDRC_SLANT_1_1 +265 0x5333 //RX_FDDRC_SLANT_1_2 +266 0x5333 //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +286 0x0100 //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 +#VOL 3 +163 0x3000 //RX_TDDRC_ALPHA_UP_1 +164 0x3000 //RX_TDDRC_ALPHA_UP_2 +165 0x3000 //RX_TDDRC_ALPHA_UP_3 +166 0x3000 //RX_TDDRC_ALPHA_UP_4 +184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +190 0x7FFF //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +269 0x0000 //RX_TDDRC_THRD_0 +270 0x0000 //RX_TDDRC_THRD_1 +271 0x7FFF //RX_TDDRC_THRD_2 +272 0x7FFF //RX_TDDRC_THRD_3 +273 0x7FFF //RX_TDDRC_SLANT_0 +274 0x7EB8 //RX_TDDRC_SLANT_1 +275 0x3000 //RX_TDDRC_ALPHA_UP_0 +276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x199A //RX_TDDRC_HMNC_GAIN +279 0x0001 //RX_TDDRC_SMT_FLAG +280 0x0CCD //RX_TDDRC_SMT_W +281 0x017F //RX_TDDRC_DRC_GAIN +195 0x0014 //RX_FDEQ_SUBNUM +196 0x4848 //RX_FDEQ_GAIN_0 +197 0x4848 //RX_FDEQ_GAIN_1 +198 0x4848 //RX_FDEQ_GAIN_2 +199 0x4848 //RX_FDEQ_GAIN_3 +200 0x4848 //RX_FDEQ_GAIN_4 +201 0x4848 //RX_FDEQ_GAIN_5 +202 0x4444 //RX_FDEQ_GAIN_6 +203 0x4040 //RX_FDEQ_GAIN_7 +204 0x4040 //RX_FDEQ_GAIN_8 +205 0x4040 //RX_FDEQ_GAIN_9 +206 0x4848 //RX_FDEQ_GAIN_10 +207 0x4848 //RX_FDEQ_GAIN_11 +208 0x4848 //RX_FDEQ_GAIN_12 +209 0x4848 //RX_FDEQ_GAIN_13 +210 0x4848 //RX_FDEQ_GAIN_14 +211 0x4848 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0202 //RX_FDEQ_BIN_0 +221 0x0203 //RX_FDEQ_BIN_1 +222 0x0303 //RX_FDEQ_BIN_2 +223 0x0304 //RX_FDEQ_BIN_3 +224 0x0405 //RX_FDEQ_BIN_4 +225 0x0506 //RX_FDEQ_BIN_5 +226 0x0708 //RX_FDEQ_BIN_6 +227 0x090A //RX_FDEQ_BIN_7 +228 0x0B0C //RX_FDEQ_BIN_8 +229 0x0D0E //RX_FDEQ_BIN_9 +230 0x0000 //RX_FDEQ_BIN_10 +231 0x0000 //RX_FDEQ_BIN_11 +232 0x0000 //RX_FDEQ_BIN_12 +233 0x0000 //RX_FDEQ_BIN_13 +234 0x0000 //RX_FDEQ_BIN_14 +235 0x0000 //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x4000 //RX_FDEQ_RESRV_0 +245 0x0320 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0030 //RX_FDDRC_BAND_MARGIN_1 +248 0x0050 //RX_FDDRC_BAND_MARGIN_2 +249 0x0080 //RX_FDDRC_BAND_MARGIN_3 +250 0x0007 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x5000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x6400 //RX_FDDRC_THRD_3_2 +258 0x6400 //RX_FDDRC_THRD_3_3 +259 0x2000 //RX_FDDRC_SLANT_0_0 +260 0x2000 //RX_FDDRC_SLANT_0_1 +261 0x2000 //RX_FDDRC_SLANT_0_2 +262 0x2000 //RX_FDDRC_SLANT_0_3 +263 0x5333 //RX_FDDRC_SLANT_1_0 +264 0x5333 //RX_FDDRC_SLANT_1_1 +265 0x5333 //RX_FDDRC_SLANT_1_2 +266 0x5333 //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +286 0x0100 //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 +#VOL 4 +163 0x3000 //RX_TDDRC_ALPHA_UP_1 +164 0x3000 //RX_TDDRC_ALPHA_UP_2 +165 0x3000 //RX_TDDRC_ALPHA_UP_3 +166 0x3000 //RX_TDDRC_ALPHA_UP_4 +184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +190 0x7FFF //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +269 0x0000 //RX_TDDRC_THRD_0 +270 0x0000 //RX_TDDRC_THRD_1 +271 0x7FFF //RX_TDDRC_THRD_2 +272 0x7FFF //RX_TDDRC_THRD_3 +273 0x7FFF //RX_TDDRC_SLANT_0 +274 0x7EB8 //RX_TDDRC_SLANT_1 +275 0x3000 //RX_TDDRC_ALPHA_UP_0 +276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x199A //RX_TDDRC_HMNC_GAIN +279 0x0001 //RX_TDDRC_SMT_FLAG +280 0x0CCD //RX_TDDRC_SMT_W +281 0x017F //RX_TDDRC_DRC_GAIN +195 0x0014 //RX_FDEQ_SUBNUM +196 0x4848 //RX_FDEQ_GAIN_0 +197 0x4848 //RX_FDEQ_GAIN_1 +198 0x4848 //RX_FDEQ_GAIN_2 +199 0x4848 //RX_FDEQ_GAIN_3 +200 0x4848 //RX_FDEQ_GAIN_4 +201 0x4848 //RX_FDEQ_GAIN_5 +202 0x4444 //RX_FDEQ_GAIN_6 +203 0x4040 //RX_FDEQ_GAIN_7 +204 0x4040 //RX_FDEQ_GAIN_8 +205 0x4040 //RX_FDEQ_GAIN_9 +206 0x4848 //RX_FDEQ_GAIN_10 +207 0x4848 //RX_FDEQ_GAIN_11 +208 0x4848 //RX_FDEQ_GAIN_12 +209 0x4848 //RX_FDEQ_GAIN_13 +210 0x4848 //RX_FDEQ_GAIN_14 +211 0x4848 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0202 //RX_FDEQ_BIN_0 +221 0x0203 //RX_FDEQ_BIN_1 +222 0x0303 //RX_FDEQ_BIN_2 +223 0x0304 //RX_FDEQ_BIN_3 +224 0x0405 //RX_FDEQ_BIN_4 +225 0x0506 //RX_FDEQ_BIN_5 +226 0x0708 //RX_FDEQ_BIN_6 +227 0x090A //RX_FDEQ_BIN_7 +228 0x0B0C //RX_FDEQ_BIN_8 +229 0x0D0E //RX_FDEQ_BIN_9 +230 0x0000 //RX_FDEQ_BIN_10 +231 0x0000 //RX_FDEQ_BIN_11 +232 0x0000 //RX_FDEQ_BIN_12 +233 0x0000 //RX_FDEQ_BIN_13 +234 0x0000 //RX_FDEQ_BIN_14 +235 0x0000 //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x4000 //RX_FDEQ_RESRV_0 +245 0x0320 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0030 //RX_FDDRC_BAND_MARGIN_1 +248 0x0050 //RX_FDDRC_BAND_MARGIN_2 +249 0x0080 //RX_FDDRC_BAND_MARGIN_3 +250 0x0007 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x5000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x6400 //RX_FDDRC_THRD_3_2 +258 0x6400 //RX_FDDRC_THRD_3_3 +259 0x2000 //RX_FDDRC_SLANT_0_0 +260 0x2000 //RX_FDDRC_SLANT_0_1 +261 0x2000 //RX_FDDRC_SLANT_0_2 +262 0x2000 //RX_FDDRC_SLANT_0_3 +263 0x5333 //RX_FDDRC_SLANT_1_0 +264 0x5333 //RX_FDDRC_SLANT_1_1 +265 0x5333 //RX_FDDRC_SLANT_1_2 +266 0x5333 //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +286 0x0100 //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 +#VOL 5 +163 0x3000 //RX_TDDRC_ALPHA_UP_1 +164 0x3000 //RX_TDDRC_ALPHA_UP_2 +165 0x3000 //RX_TDDRC_ALPHA_UP_3 +166 0x3000 //RX_TDDRC_ALPHA_UP_4 +184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +190 0x7FFF //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +269 0x0000 //RX_TDDRC_THRD_0 +270 0x0000 //RX_TDDRC_THRD_1 +271 0x7FFF //RX_TDDRC_THRD_2 +272 0x7FFF //RX_TDDRC_THRD_3 +273 0x7FFF //RX_TDDRC_SLANT_0 +274 0x7EB8 //RX_TDDRC_SLANT_1 +275 0x3000 //RX_TDDRC_ALPHA_UP_0 +276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x199A //RX_TDDRC_HMNC_GAIN +279 0x0001 //RX_TDDRC_SMT_FLAG +280 0x0CCD //RX_TDDRC_SMT_W +281 0x017F //RX_TDDRC_DRC_GAIN +195 0x0014 //RX_FDEQ_SUBNUM +196 0x4848 //RX_FDEQ_GAIN_0 +197 0x4848 //RX_FDEQ_GAIN_1 +198 0x4848 //RX_FDEQ_GAIN_2 +199 0x4848 //RX_FDEQ_GAIN_3 +200 0x4848 //RX_FDEQ_GAIN_4 +201 0x4848 //RX_FDEQ_GAIN_5 +202 0x4444 //RX_FDEQ_GAIN_6 +203 0x4040 //RX_FDEQ_GAIN_7 +204 0x4040 //RX_FDEQ_GAIN_8 +205 0x4040 //RX_FDEQ_GAIN_9 +206 0x4848 //RX_FDEQ_GAIN_10 +207 0x4848 //RX_FDEQ_GAIN_11 +208 0x4848 //RX_FDEQ_GAIN_12 +209 0x4848 //RX_FDEQ_GAIN_13 +210 0x4848 //RX_FDEQ_GAIN_14 +211 0x4848 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0202 //RX_FDEQ_BIN_0 +221 0x0203 //RX_FDEQ_BIN_1 +222 0x0303 //RX_FDEQ_BIN_2 +223 0x0304 //RX_FDEQ_BIN_3 +224 0x0405 //RX_FDEQ_BIN_4 +225 0x0506 //RX_FDEQ_BIN_5 +226 0x0708 //RX_FDEQ_BIN_6 +227 0x090A //RX_FDEQ_BIN_7 +228 0x0B0C //RX_FDEQ_BIN_8 +229 0x0D0E //RX_FDEQ_BIN_9 +230 0x0000 //RX_FDEQ_BIN_10 +231 0x0000 //RX_FDEQ_BIN_11 +232 0x0000 //RX_FDEQ_BIN_12 +233 0x0000 //RX_FDEQ_BIN_13 +234 0x0000 //RX_FDEQ_BIN_14 +235 0x0000 //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x4000 //RX_FDEQ_RESRV_0 +245 0x0320 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0030 //RX_FDDRC_BAND_MARGIN_1 +248 0x0050 //RX_FDDRC_BAND_MARGIN_2 +249 0x0080 //RX_FDDRC_BAND_MARGIN_3 +250 0x0007 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x5000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x6400 //RX_FDDRC_THRD_3_2 +258 0x6400 //RX_FDDRC_THRD_3_3 +259 0x2000 //RX_FDDRC_SLANT_0_0 +260 0x2000 //RX_FDDRC_SLANT_0_1 +261 0x2000 //RX_FDDRC_SLANT_0_2 +262 0x2000 //RX_FDDRC_SLANT_0_3 +263 0x5333 //RX_FDDRC_SLANT_1_0 +264 0x5333 //RX_FDDRC_SLANT_1_1 +265 0x5333 //RX_FDDRC_SLANT_1_2 +266 0x5333 //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +286 0x0100 //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 +#VOL 6 +163 0x3000 //RX_TDDRC_ALPHA_UP_1 +164 0x3000 //RX_TDDRC_ALPHA_UP_2 +165 0x3000 //RX_TDDRC_ALPHA_UP_3 +166 0x3000 //RX_TDDRC_ALPHA_UP_4 +184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +190 0x7FFF //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +269 0x0000 //RX_TDDRC_THRD_0 +270 0x0000 //RX_TDDRC_THRD_1 +271 0x7FFF //RX_TDDRC_THRD_2 +272 0x7FFF //RX_TDDRC_THRD_3 +273 0x7FFF //RX_TDDRC_SLANT_0 +274 0x7EB8 //RX_TDDRC_SLANT_1 +275 0x3000 //RX_TDDRC_ALPHA_UP_0 +276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x199A //RX_TDDRC_HMNC_GAIN +279 0x0001 //RX_TDDRC_SMT_FLAG +280 0x0CCD //RX_TDDRC_SMT_W +281 0x017F //RX_TDDRC_DRC_GAIN +195 0x0014 //RX_FDEQ_SUBNUM +196 0x4848 //RX_FDEQ_GAIN_0 +197 0x4848 //RX_FDEQ_GAIN_1 +198 0x4848 //RX_FDEQ_GAIN_2 +199 0x4848 //RX_FDEQ_GAIN_3 +200 0x4848 //RX_FDEQ_GAIN_4 +201 0x4848 //RX_FDEQ_GAIN_5 +202 0x4444 //RX_FDEQ_GAIN_6 +203 0x4040 //RX_FDEQ_GAIN_7 +204 0x4040 //RX_FDEQ_GAIN_8 +205 0x4040 //RX_FDEQ_GAIN_9 +206 0x4848 //RX_FDEQ_GAIN_10 +207 0x4848 //RX_FDEQ_GAIN_11 +208 0x4848 //RX_FDEQ_GAIN_12 +209 0x4848 //RX_FDEQ_GAIN_13 +210 0x4848 //RX_FDEQ_GAIN_14 +211 0x4848 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0202 //RX_FDEQ_BIN_0 +221 0x0203 //RX_FDEQ_BIN_1 +222 0x0303 //RX_FDEQ_BIN_2 +223 0x0304 //RX_FDEQ_BIN_3 +224 0x0405 //RX_FDEQ_BIN_4 +225 0x0506 //RX_FDEQ_BIN_5 +226 0x0708 //RX_FDEQ_BIN_6 +227 0x090A //RX_FDEQ_BIN_7 +228 0x0B0C //RX_FDEQ_BIN_8 +229 0x0D0E //RX_FDEQ_BIN_9 +230 0x0000 //RX_FDEQ_BIN_10 +231 0x0000 //RX_FDEQ_BIN_11 +232 0x0000 //RX_FDEQ_BIN_12 +233 0x0000 //RX_FDEQ_BIN_13 +234 0x0000 //RX_FDEQ_BIN_14 +235 0x0000 //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x4000 //RX_FDEQ_RESRV_0 +245 0x0320 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0030 //RX_FDDRC_BAND_MARGIN_1 +248 0x0050 //RX_FDDRC_BAND_MARGIN_2 +249 0x0080 //RX_FDDRC_BAND_MARGIN_3 +250 0x0007 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x5000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x6400 //RX_FDDRC_THRD_3_2 +258 0x6400 //RX_FDDRC_THRD_3_3 +259 0x2000 //RX_FDDRC_SLANT_0_0 +260 0x2000 //RX_FDDRC_SLANT_0_1 +261 0x2000 //RX_FDDRC_SLANT_0_2 +262 0x2000 //RX_FDDRC_SLANT_0_3 +263 0x5333 //RX_FDDRC_SLANT_1_0 +264 0x5333 //RX_FDDRC_SLANT_1_1 +265 0x5333 //RX_FDDRC_SLANT_1_2 +266 0x5333 //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +286 0x0100 //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 #CASE_NAME BLUETOOTH-BTNB-VOICE_GENERIC-WB -#PARAM_TYPE TX+RX -#TOTAL_CUSTOM_STEP 7 +#PARAM_MODE Full +#PARAM_TYPE TX+2RX +#TOTAL_CUSTOM_STEP 7+7 #TX 0 0x0008 //TX_OPERATION_MODE_0 1 0x0008 //TX_OPERATION_MODE_1 @@ -10776,20 +16279,20 @@ 248 0xF400 //TX_THR_SN_EST_6 249 0xF600 //TX_THR_SN_EST_7 250 0x0000 //TX_DELTA_THR_SN_EST_0 -251 0x0000 //TX_DELTA_THR_SN_EST_1 +251 0x0200 //TX_DELTA_THR_SN_EST_1 252 0x0200 //TX_DELTA_THR_SN_EST_2 253 0x0200 //TX_DELTA_THR_SN_EST_3 254 0x0200 //TX_DELTA_THR_SN_EST_4 255 0x0200 //TX_DELTA_THR_SN_EST_5 -256 0x0200 //TX_DELTA_THR_SN_EST_6 +256 0x0000 //TX_DELTA_THR_SN_EST_6 257 0x0200 //TX_DELTA_THR_SN_EST_7 258 0x6000 //TX_LAMBDA_NN_EST_0 -259 0x6000 //TX_LAMBDA_NN_EST_1 +259 0x4000 //TX_LAMBDA_NN_EST_1 260 0x4000 //TX_LAMBDA_NN_EST_2 261 0x4000 //TX_LAMBDA_NN_EST_3 262 0x4000 //TX_LAMBDA_NN_EST_4 263 0x4000 //TX_LAMBDA_NN_EST_5 -264 0x4000 //TX_LAMBDA_NN_EST_6 +264 0x6000 //TX_LAMBDA_NN_EST_6 265 0x4000 //TX_LAMBDA_NN_EST_7 266 0x0400 //TX_N_SN_EST 267 0x001E //TX_INBEAM_T @@ -10807,16 +16310,16 @@ 279 0x1000 //TX_B_POST_FLT_0 280 0x1000 //TX_B_POST_FLT_1 281 0x000F //TX_NS_LVL_CTRL_0 -282 0x000F //TX_NS_LVL_CTRL_1 -283 0x0011 //TX_NS_LVL_CTRL_2 +282 0x0011 //TX_NS_LVL_CTRL_1 +283 0x000F //TX_NS_LVL_CTRL_2 284 0x000F //TX_NS_LVL_CTRL_3 285 0x000F //TX_NS_LVL_CTRL_4 286 0x000F //TX_NS_LVL_CTRL_5 287 0x000F //TX_NS_LVL_CTRL_6 288 0x0011 //TX_NS_LVL_CTRL_7 289 0x000C //TX_MIN_GAIN_S_0 -290 0x000C //TX_MIN_GAIN_S_1 -291 0x000F //TX_MIN_GAIN_S_2 +290 0x000F //TX_MIN_GAIN_S_1 +291 0x000C //TX_MIN_GAIN_S_2 292 0x000C //TX_MIN_GAIN_S_3 293 0x000C //TX_MIN_GAIN_S_4 294 0x000C //TX_MIN_GAIN_S_5 @@ -10840,12 +16343,12 @@ 312 0x7FFF //TX_A_POST_FILT_0 313 0x2000 //TX_A_POST_FILT_1 314 0x4000 //TX_A_POST_FILT_S_0 -315 0x4000 //TX_A_POST_FILT_S_1 +315 0x5000 //TX_A_POST_FILT_S_1 316 0x5000 //TX_A_POST_FILT_S_2 317 0x5000 //TX_A_POST_FILT_S_3 318 0x5000 //TX_A_POST_FILT_S_4 319 0x5000 //TX_A_POST_FILT_S_5 -320 0x5000 //TX_A_POST_FILT_S_6 +320 0x4000 //TX_A_POST_FILT_S_6 321 0x5000 //TX_A_POST_FILT_S_7 322 0x1000 //TX_B_POST_FILT_0 323 0x1000 //TX_B_POST_FILT_1 @@ -10905,10 +16408,10 @@ 377 0x7FFF //TX_NOISE_TH_5_4 378 0x044C //TX_NOISE_TH_6 379 0x0014 //TX_MINENOISE_TH -380 0x4000 //TX_MINENOISE_MIC0_TH_MTS -381 0xFFEE //TX_MINENOISE_MIC0_TH_EXP -382 0x6000 //TX_MINENOISE_MIC0_S_TH_MTS -383 0xFFF3 //TX_MINENOISE_MIC0_S_TH_EXP +380 0x4000 //TX_MORENS_TFMASK_TH +381 0xFFEE //TX_DRC_QUIET_FLOOR +382 0x6000 //TX_RATIODTL_CUT_TH +383 0xFFF3 //TX_DT_CUT_K1 384 0x0666 //TX_OUT_ENER_S_TH_CLEAN 385 0x0666 //TX_OUT_ENER_S_TH_LESSCLEAN 386 0x0333 //TX_OUT_ENER_S_TH_NOISY @@ -10916,15 +16419,15 @@ 388 0x0333 //TX_OUT_ENER_TH_SPEECH 389 0x2000 //TX_SN_NPB_GAIN 390 0x0000 //TX_NN_NPB_GAIN -391 0x0000 //TX_CSX_ALPHA_0 -392 0x0000 //TX_CSX_ALPHA_1 -393 0x0000 //TX_CSX_ALPHA_2 -394 0x0000 //TX_CSX_ALPHA_3 -395 0x0800 //TX_MU_ARSP_EST -396 0x00C8 //TX_P_OUTBEAM_MIN_TH +391 0x0000 //TX_POST_MASK_SUP_HSNE +392 0x0000 //TX_TAIL_DET_TH +393 0x0000 //TX_B_LESSCUT_RTO_WTA +394 0x0000 //TX_MEL_G_R +395 0x0800 //TX_SUPHIGH_TH +396 0x00C8 //TX_MASK_G_R 397 0x0002 //TX_EXTRA_NS_L -398 0x0800 //TX_EXTRA_NS_A -399 0x0005 //TX_VR_NOISE_FLOOR_TH +398 0x0800 //TX_C_POST_FLT_MASK +399 0x0005 //TX_A_POST_FLT_WNS 400 0x0148 //TX_MIN_G_LOW300HZ 401 0x0002 //TX_MAXLEVEL_CNG 402 0x00B4 //TX_STN_NOISE_TH @@ -11039,16 +16542,16 @@ 511 0x6666 //TX_MIC_TO_BFGAIN 512 0x0000 //TX_MICTOBFGAIN0 513 0x0000 //TX_FASTMUE_TH -514 0x0000 //TX_DERVB_LEN_0 -515 0x0000 //TX_DERVB_LEN_1 -516 0x0000 //TX_RHO_DERVB -517 0x0000 //TX_MIC_INDX_DERVB -518 0x0000 //TX_MU_DERVB -519 0x0000 //TX_DR_RESRV_0 -520 0x0000 //TX_DR_RESRV_1 -521 0x0000 //TX_DR_RESRV_2 -522 0x0000 //TX_DR_RESRV_3 -523 0x0000 //TX_DR_RESRV_4 +514 0x0000 //TX_DEREVERB_LF_MU +515 0x0000 //TX_DEREVERB_HF_MU +516 0x0000 //TX_DEREVERB_DELAY +517 0x0000 //TX_DEREVERB_COEF_LEN +518 0x0000 //TX_DEREVERB_DNR +519 0x0000 //TX_DEREVERB_ALPHA +520 0x0000 //TX_DEREVERB_BETA +521 0x0000 //TX_GSC_RTOL_TH +522 0x0000 //TX_GSC_RTOH_TH +523 0x0000 //TX_WIDE2_MEANHTH 524 0x0000 //TX_DR_RESRV_5 525 0x0000 //TX_DR_RESRV_6 526 0x0000 //TX_DR_RESRV_7 @@ -11422,8 +16925,73 @@ 894 0xC000 //TX_FASTNS_SSA_THHFL 895 0xCCCC //TX_FASTNS_SSA_THLFH 896 0xD999 //TX_FASTNS_SSA_THHFH +897 0x0000 //TX_SENDFUNC_REG_MICMUTE +898 0x0000 //TX_SENDFUNC_REG_MICMUTE1 +899 0x0000 //TX_MICMUTE_RATIO_THR +900 0x0000 //TX_MICMUTE_AMP_THR +901 0x0000 //TX_MICMUTE_HPF_IND +902 0x0000 //TX_MICMUTE_LOG_EYR_TH +903 0x0000 //TX_MICMUTE_CVG_TIME +904 0x0000 //TX_MICMUTE_RELEASE_TIME +905 0x0000 //TX_MIC_VOLUME_MIC0MUTE +906 0x0000 //TX_MICMUTE_EPD_OFFSET_0 +907 0x0000 //TX_MICMUTE_FRQ_AEC_L +908 0x0000 //TX_MICMUTE_EAD_THR +909 0x0000 //TX_MICMUTE_LAMBDA_CB_NLE +910 0x0000 //TX_MICMUTE_LAMBDA_RE_EST +911 0x0000 //TX_DTD_THR1_MICMUTE_0 +912 0x0000 //TX_DTD_THR1_MICMUTE_1 +913 0x0000 //TX_DTD_THR1_MICMUTE_2 +914 0x0000 //TX_DTD_THR1_MICMUTE_3 +915 0x0000 //TX_DTD_THR2_MICMUTE_0 +916 0x0000 //TX_MICMUTE_MIN_EQ_RE_EST_0 +917 0x0000 //TX_MICMUTE_MIN_EQ_RE_EST_1 +918 0x0000 //TX_MICMUTE_MIN_EQ_RE_EST_2 +919 0x0000 //TX_MICMUTE_MIN_EQ_RE_EST_3 +920 0x0000 //TX_MICMUTE_MIN_EQ_RE_EST_4 +921 0x0000 //TX_MICMUTE_C_POST_FLT +922 0x0000 //TX_MICMUTE_DT_CUT_K +923 0x0000 //TX_MICMUTE_DT_CUT_THR +924 0x0000 //TX_MICMUTE_DT_CUT_K2 +925 0x0000 //TX_MICMUTE_DT_CUT_THR2 +926 0x0000 //TX_MICMUTE_DT2_HOLD_N +927 0x0000 //TX_MICMUTE_RATIODTH_THCUT +928 0x0000 //TX_MICMUTE_B_POST_FLT_ECHOL +929 0x0000 //TX_MICMUTE_B_POST_FLT_ECHOH +930 0x0000 //TX_MICMUTE_C_POST_FLT_MASK +931 0x0000 //TX_MICMUTE_RATIODTL_CUT_TH +932 0x0000 //TX_MICMUTE_DT_CUT_K1 +933 0x0000 //TX_MICMUTE_N2_SN_EST +934 0x0000 //TX_MICMUTE_THR_SN_EST_0 +935 0x0000 //TX_MICMUTE_MIN_G_CTRL_0 +936 0x0000 //TX_MICMUTE_A_POST_FILT_S_0 +937 0x0000 //TX_MICMUTE_B_POST_FILT_0 +938 0x0000 //TX_MIC1RUB_AMP_THR +939 0x0000 //TX_MIC1MUTE_RATIO_THR +940 0x0000 //TX_MIC1MUTE_AMP_THR +941 0x0000 //TX_MIC1MUTE_CVG_TIME +942 0x0000 //TX_MIC1MUTE_RELEASE_TIME +943 0x0000 //TX_AMS_RESRV_01 +944 0x0000 //TX_AMS_RESRV_02 +945 0x0000 //TX_AMS_RESRV_03 +946 0x0000 //TX_AMS_RESRV_04 +947 0x0000 //TX_AMS_RESRV_05 +948 0x0000 //TX_AMS_RESRV_06 +949 0x0000 //TX_AMS_RESRV_07 +950 0x0000 //TX_AMS_RESRV_08 +951 0x0000 //TX_AMS_RESRV_09 +952 0x0000 //TX_AMS_RESRV_10 +953 0x0000 //TX_AMS_RESRV_11 +954 0x0000 //TX_AMS_RESRV_12 +955 0x0000 //TX_AMS_RESRV_13 +956 0x0000 //TX_AMS_RESRV_14 +957 0x0000 //TX_AMS_RESRV_15 +958 0x0000 //TX_AMS_RESRV_16 +959 0x0000 //TX_AMS_RESRV_17 +960 0x0000 //TX_AMS_RESRV_18 +961 0x0000 //TX_AMS_RESRV_19 #RX -0 0x006C //RX_RECVFUNC_MODE_0 +0 0x206C //RX_RECVFUNC_MODE_0 1 0x0000 //RX_RECVFUNC_MODE_1 2 0x0001 //RX_SAMPLINGFREQ_SIG 3 0x0001 //RX_SAMPLINGFREQ_PROC @@ -12273,10 +17841,862 @@ 110 0x0000 //RX_FDDRC_RESRV_0 129 0x0100 //RX_SPK_VOL 130 0x0000 //RX_VOL_RESRV_0 +#RX 2 +157 0x206C //RX_RECVFUNC_MODE_0 +158 0x0000 //RX_RECVFUNC_MODE_1 +159 0x0001 //RX_SAMPLINGFREQ_SIG +160 0x0001 //RX_SAMPLINGFREQ_PROC +161 0x000A //RX_FRAME_SZ +162 0x0000 //RX_DELAY_OPT +163 0x1000 //RX_TDDRC_ALPHA_UP_1 +164 0x1000 //RX_TDDRC_ALPHA_UP_2 +165 0x1000 //RX_TDDRC_ALPHA_UP_3 +166 0x1000 //RX_TDDRC_ALPHA_UP_4 +167 0x0800 //RX_PGA +168 0x7FFF //RX_A_HP +169 0x4000 //RX_B_PE +170 0x3800 //RX_THR_PITCH_DET_0 +171 0x3000 //RX_THR_PITCH_DET_1 +172 0x2800 //RX_THR_PITCH_DET_2 +173 0x0008 //RX_PITCH_BFR_LEN +174 0x0003 //RX_SBD_PITCH_DET +175 0x0100 //RX_PP_RESRV_0 +176 0x0020 //RX_PP_RESRV_1 +177 0x0600 //RX_N_SN_EST +178 0x000C //RX_N2_SN_EST +179 0x0010 //RX_NS_LVL_CTRL +180 0xF800 //RX_THR_SN_EST +181 0x7CCD //RX_LAMBDA_PFILT +182 0x000A //RX_FENS_RESRV_0 +183 0x0190 //RX_FENS_RESRV_1 +184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +187 0x0002 //RX_EXTRA_NS_L +188 0x0800 //RX_EXTRA_NS_A +189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +190 0x7FFF //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +192 0x199A //RX_A_POST_FLT +193 0x0000 //RX_LMT_THRD +194 0x4000 //RX_LMT_ALPHA +195 0x001C //RX_FDEQ_SUBNUM +196 0x4848 //RX_FDEQ_GAIN_0 +197 0x4848 //RX_FDEQ_GAIN_1 +198 0x4848 //RX_FDEQ_GAIN_2 +199 0x4848 //RX_FDEQ_GAIN_3 +200 0x4848 //RX_FDEQ_GAIN_4 +201 0x4848 //RX_FDEQ_GAIN_5 +202 0x4848 //RX_FDEQ_GAIN_6 +203 0x4848 //RX_FDEQ_GAIN_7 +204 0x4848 //RX_FDEQ_GAIN_8 +205 0x3C3C //RX_FDEQ_GAIN_9 +206 0x3C3C //RX_FDEQ_GAIN_10 +207 0x3838 //RX_FDEQ_GAIN_11 +208 0x3838 //RX_FDEQ_GAIN_12 +209 0x3030 //RX_FDEQ_GAIN_13 +210 0x4848 //RX_FDEQ_GAIN_14 +211 0x4848 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0202 //RX_FDEQ_BIN_0 +221 0x0203 //RX_FDEQ_BIN_1 +222 0x0303 //RX_FDEQ_BIN_2 +223 0x0304 //RX_FDEQ_BIN_3 +224 0x0405 //RX_FDEQ_BIN_4 +225 0x0506 //RX_FDEQ_BIN_5 +226 0x0708 //RX_FDEQ_BIN_6 +227 0x090A //RX_FDEQ_BIN_7 +228 0x0B0C //RX_FDEQ_BIN_8 +229 0x0D0E //RX_FDEQ_BIN_9 +230 0x0E0F //RX_FDEQ_BIN_10 +231 0x0F10 //RX_FDEQ_BIN_11 +232 0x1011 //RX_FDEQ_BIN_12 +233 0x1112 //RX_FDEQ_BIN_13 +234 0x0000 //RX_FDEQ_BIN_14 +235 0x0000 //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x4000 //RX_FDEQ_RESRV_0 +245 0x0320 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0030 //RX_FDDRC_BAND_MARGIN_1 +248 0x0050 //RX_FDDRC_BAND_MARGIN_2 +249 0x0080 //RX_FDDRC_BAND_MARGIN_3 +250 0x0007 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x5000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x6400 //RX_FDDRC_THRD_3_2 +258 0x6400 //RX_FDDRC_THRD_3_3 +259 0x2000 //RX_FDDRC_SLANT_0_0 +260 0x2000 //RX_FDDRC_SLANT_0_1 +261 0x2000 //RX_FDDRC_SLANT_0_2 +262 0x2000 //RX_FDDRC_SLANT_0_3 +263 0x5333 //RX_FDDRC_SLANT_1_0 +264 0x5333 //RX_FDDRC_SLANT_1_1 +265 0x5333 //RX_FDDRC_SLANT_1_2 +266 0x5333 //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +268 0x0000 //RX_FILTINDX +269 0x0000 //RX_TDDRC_THRD_0 +270 0x0000 //RX_TDDRC_THRD_1 +271 0x7FFF //RX_TDDRC_THRD_2 +272 0x7FFF //RX_TDDRC_THRD_3 +273 0x7E70 //RX_TDDRC_SLANT_0 +274 0x7FFF //RX_TDDRC_SLANT_1 +275 0x1000 //RX_TDDRC_ALPHA_UP_0 +276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x199A //RX_TDDRC_HMNC_GAIN +279 0x0001 //RX_TDDRC_SMT_FLAG +280 0x0CCD //RX_TDDRC_SMT_W +281 0x0155 //RX_TDDRC_DRC_GAIN +282 0x7C00 //RX_LAMBDA_PKA_FP +283 0x2000 //RX_TPKA_FP +284 0x2000 //RX_MIN_G_FP +285 0x0080 //RX_MAX_G_FP +286 0x0100 //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 +288 0x0000 //RX_MAXLEVEL_CNG +289 0x3000 //RX_BWE_UV_TH +290 0x3000 //RX_BWE_UV_TH2 +291 0x1800 //RX_BWE_UV_TH3 +292 0x1000 //RX_BWE_V_TH +293 0x04CD //RX_BWE_GAIN1_V_TH1 +294 0x0F33 //RX_BWE_GAIN1_V_TH2 +295 0x7333 //RX_BWE_UV_EQ +296 0x199A //RX_BWE_V_EQ +297 0x7333 //RX_BWE_TONE_TH +298 0x0004 //RX_BWE_UV_HOLD_T +299 0x6CCD //RX_BWE_GAIN2_ALPHA +300 0x799A //RX_BWE_GAIN3_ALPHA +301 0x001E //RX_BWE_CUTOFF +302 0x3000 //RX_BWE_GAINFILL +303 0x3200 //RX_BWE_MAXTH_TONE +304 0x2000 //RX_BWE_EQ_0 +305 0x2000 //RX_BWE_EQ_1 +306 0x2000 //RX_BWE_EQ_2 +307 0x2000 //RX_BWE_EQ_3 +308 0x2000 //RX_BWE_EQ_4 +309 0x2000 //RX_BWE_EQ_5 +310 0x2000 //RX_BWE_EQ_6 +311 0x0000 //RX_BWE_RESRV_0 +312 0x0000 //RX_BWE_RESRV_1 +313 0x0000 //RX_BWE_RESRV_2 +#VOL 0 +163 0x1000 //RX_TDDRC_ALPHA_UP_1 +164 0x1000 //RX_TDDRC_ALPHA_UP_2 +165 0x1000 //RX_TDDRC_ALPHA_UP_3 +166 0x1000 //RX_TDDRC_ALPHA_UP_4 +184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +190 0x7FFF //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +269 0x0000 //RX_TDDRC_THRD_0 +270 0x0000 //RX_TDDRC_THRD_1 +271 0x7FFF //RX_TDDRC_THRD_2 +272 0x7FFF //RX_TDDRC_THRD_3 +273 0x7E70 //RX_TDDRC_SLANT_0 +274 0x7FFF //RX_TDDRC_SLANT_1 +275 0x1000 //RX_TDDRC_ALPHA_UP_0 +276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x199A //RX_TDDRC_HMNC_GAIN +279 0x0001 //RX_TDDRC_SMT_FLAG +280 0x0CCD //RX_TDDRC_SMT_W +281 0x0155 //RX_TDDRC_DRC_GAIN +195 0x001C //RX_FDEQ_SUBNUM +196 0x4848 //RX_FDEQ_GAIN_0 +197 0x4848 //RX_FDEQ_GAIN_1 +198 0x4848 //RX_FDEQ_GAIN_2 +199 0x4848 //RX_FDEQ_GAIN_3 +200 0x4848 //RX_FDEQ_GAIN_4 +201 0x4848 //RX_FDEQ_GAIN_5 +202 0x4848 //RX_FDEQ_GAIN_6 +203 0x4848 //RX_FDEQ_GAIN_7 +204 0x4848 //RX_FDEQ_GAIN_8 +205 0x3C3C //RX_FDEQ_GAIN_9 +206 0x3C3C //RX_FDEQ_GAIN_10 +207 0x3838 //RX_FDEQ_GAIN_11 +208 0x3838 //RX_FDEQ_GAIN_12 +209 0x3030 //RX_FDEQ_GAIN_13 +210 0x4848 //RX_FDEQ_GAIN_14 +211 0x4848 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0202 //RX_FDEQ_BIN_0 +221 0x0203 //RX_FDEQ_BIN_1 +222 0x0303 //RX_FDEQ_BIN_2 +223 0x0304 //RX_FDEQ_BIN_3 +224 0x0405 //RX_FDEQ_BIN_4 +225 0x0506 //RX_FDEQ_BIN_5 +226 0x0708 //RX_FDEQ_BIN_6 +227 0x090A //RX_FDEQ_BIN_7 +228 0x0B0C //RX_FDEQ_BIN_8 +229 0x0D0E //RX_FDEQ_BIN_9 +230 0x0E0F //RX_FDEQ_BIN_10 +231 0x0F10 //RX_FDEQ_BIN_11 +232 0x1011 //RX_FDEQ_BIN_12 +233 0x1112 //RX_FDEQ_BIN_13 +234 0x0000 //RX_FDEQ_BIN_14 +235 0x0000 //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x4000 //RX_FDEQ_RESRV_0 +245 0x0320 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0030 //RX_FDDRC_BAND_MARGIN_1 +248 0x0050 //RX_FDDRC_BAND_MARGIN_2 +249 0x0080 //RX_FDDRC_BAND_MARGIN_3 +250 0x0007 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x5000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x6400 //RX_FDDRC_THRD_3_2 +258 0x6400 //RX_FDDRC_THRD_3_3 +259 0x2000 //RX_FDDRC_SLANT_0_0 +260 0x2000 //RX_FDDRC_SLANT_0_1 +261 0x2000 //RX_FDDRC_SLANT_0_2 +262 0x2000 //RX_FDDRC_SLANT_0_3 +263 0x5333 //RX_FDDRC_SLANT_1_0 +264 0x5333 //RX_FDDRC_SLANT_1_1 +265 0x5333 //RX_FDDRC_SLANT_1_2 +266 0x5333 //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +286 0x0100 //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 +#VOL 1 +163 0x1000 //RX_TDDRC_ALPHA_UP_1 +164 0x1000 //RX_TDDRC_ALPHA_UP_2 +165 0x1000 //RX_TDDRC_ALPHA_UP_3 +166 0x1000 //RX_TDDRC_ALPHA_UP_4 +184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +190 0x7FFF //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +269 0x0000 //RX_TDDRC_THRD_0 +270 0x0000 //RX_TDDRC_THRD_1 +271 0x7FFF //RX_TDDRC_THRD_2 +272 0x7FFF //RX_TDDRC_THRD_3 +273 0x7E70 //RX_TDDRC_SLANT_0 +274 0x7FFF //RX_TDDRC_SLANT_1 +275 0x1000 //RX_TDDRC_ALPHA_UP_0 +276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x199A //RX_TDDRC_HMNC_GAIN +279 0x0001 //RX_TDDRC_SMT_FLAG +280 0x0CCD //RX_TDDRC_SMT_W +281 0x0155 //RX_TDDRC_DRC_GAIN +195 0x001C //RX_FDEQ_SUBNUM +196 0x4848 //RX_FDEQ_GAIN_0 +197 0x4848 //RX_FDEQ_GAIN_1 +198 0x4848 //RX_FDEQ_GAIN_2 +199 0x4848 //RX_FDEQ_GAIN_3 +200 0x4848 //RX_FDEQ_GAIN_4 +201 0x4848 //RX_FDEQ_GAIN_5 +202 0x4848 //RX_FDEQ_GAIN_6 +203 0x4848 //RX_FDEQ_GAIN_7 +204 0x4848 //RX_FDEQ_GAIN_8 +205 0x3C3C //RX_FDEQ_GAIN_9 +206 0x3C3C //RX_FDEQ_GAIN_10 +207 0x3838 //RX_FDEQ_GAIN_11 +208 0x3838 //RX_FDEQ_GAIN_12 +209 0x3030 //RX_FDEQ_GAIN_13 +210 0x4848 //RX_FDEQ_GAIN_14 +211 0x4848 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0202 //RX_FDEQ_BIN_0 +221 0x0203 //RX_FDEQ_BIN_1 +222 0x0303 //RX_FDEQ_BIN_2 +223 0x0304 //RX_FDEQ_BIN_3 +224 0x0405 //RX_FDEQ_BIN_4 +225 0x0506 //RX_FDEQ_BIN_5 +226 0x0708 //RX_FDEQ_BIN_6 +227 0x090A //RX_FDEQ_BIN_7 +228 0x0B0C //RX_FDEQ_BIN_8 +229 0x0D0E //RX_FDEQ_BIN_9 +230 0x0E0F //RX_FDEQ_BIN_10 +231 0x0F10 //RX_FDEQ_BIN_11 +232 0x1011 //RX_FDEQ_BIN_12 +233 0x1112 //RX_FDEQ_BIN_13 +234 0x0000 //RX_FDEQ_BIN_14 +235 0x0000 //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x4000 //RX_FDEQ_RESRV_0 +245 0x0320 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0030 //RX_FDDRC_BAND_MARGIN_1 +248 0x0050 //RX_FDDRC_BAND_MARGIN_2 +249 0x0080 //RX_FDDRC_BAND_MARGIN_3 +250 0x0007 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x5000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x6400 //RX_FDDRC_THRD_3_2 +258 0x6400 //RX_FDDRC_THRD_3_3 +259 0x2000 //RX_FDDRC_SLANT_0_0 +260 0x2000 //RX_FDDRC_SLANT_0_1 +261 0x2000 //RX_FDDRC_SLANT_0_2 +262 0x2000 //RX_FDDRC_SLANT_0_3 +263 0x5333 //RX_FDDRC_SLANT_1_0 +264 0x5333 //RX_FDDRC_SLANT_1_1 +265 0x5333 //RX_FDDRC_SLANT_1_2 +266 0x5333 //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +286 0x0100 //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 +#VOL 2 +163 0x1000 //RX_TDDRC_ALPHA_UP_1 +164 0x1000 //RX_TDDRC_ALPHA_UP_2 +165 0x1000 //RX_TDDRC_ALPHA_UP_3 +166 0x1000 //RX_TDDRC_ALPHA_UP_4 +184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +190 0x7FFF //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +269 0x0000 //RX_TDDRC_THRD_0 +270 0x0000 //RX_TDDRC_THRD_1 +271 0x7FFF //RX_TDDRC_THRD_2 +272 0x7FFF //RX_TDDRC_THRD_3 +273 0x7E70 //RX_TDDRC_SLANT_0 +274 0x7FFF //RX_TDDRC_SLANT_1 +275 0x1000 //RX_TDDRC_ALPHA_UP_0 +276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x199A //RX_TDDRC_HMNC_GAIN +279 0x0001 //RX_TDDRC_SMT_FLAG +280 0x0CCD //RX_TDDRC_SMT_W +281 0x0155 //RX_TDDRC_DRC_GAIN +195 0x001C //RX_FDEQ_SUBNUM +196 0x4848 //RX_FDEQ_GAIN_0 +197 0x4848 //RX_FDEQ_GAIN_1 +198 0x4848 //RX_FDEQ_GAIN_2 +199 0x4848 //RX_FDEQ_GAIN_3 +200 0x4848 //RX_FDEQ_GAIN_4 +201 0x4848 //RX_FDEQ_GAIN_5 +202 0x4848 //RX_FDEQ_GAIN_6 +203 0x4848 //RX_FDEQ_GAIN_7 +204 0x4848 //RX_FDEQ_GAIN_8 +205 0x3C3C //RX_FDEQ_GAIN_9 +206 0x3C3C //RX_FDEQ_GAIN_10 +207 0x3838 //RX_FDEQ_GAIN_11 +208 0x3838 //RX_FDEQ_GAIN_12 +209 0x3030 //RX_FDEQ_GAIN_13 +210 0x4848 //RX_FDEQ_GAIN_14 +211 0x4848 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0202 //RX_FDEQ_BIN_0 +221 0x0203 //RX_FDEQ_BIN_1 +222 0x0303 //RX_FDEQ_BIN_2 +223 0x0304 //RX_FDEQ_BIN_3 +224 0x0405 //RX_FDEQ_BIN_4 +225 0x0506 //RX_FDEQ_BIN_5 +226 0x0708 //RX_FDEQ_BIN_6 +227 0x090A //RX_FDEQ_BIN_7 +228 0x0B0C //RX_FDEQ_BIN_8 +229 0x0D0E //RX_FDEQ_BIN_9 +230 0x0E0F //RX_FDEQ_BIN_10 +231 0x0F10 //RX_FDEQ_BIN_11 +232 0x1011 //RX_FDEQ_BIN_12 +233 0x1112 //RX_FDEQ_BIN_13 +234 0x0000 //RX_FDEQ_BIN_14 +235 0x0000 //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x4000 //RX_FDEQ_RESRV_0 +245 0x0320 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0030 //RX_FDDRC_BAND_MARGIN_1 +248 0x0050 //RX_FDDRC_BAND_MARGIN_2 +249 0x0080 //RX_FDDRC_BAND_MARGIN_3 +250 0x0007 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x5000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x6400 //RX_FDDRC_THRD_3_2 +258 0x6400 //RX_FDDRC_THRD_3_3 +259 0x2000 //RX_FDDRC_SLANT_0_0 +260 0x2000 //RX_FDDRC_SLANT_0_1 +261 0x2000 //RX_FDDRC_SLANT_0_2 +262 0x2000 //RX_FDDRC_SLANT_0_3 +263 0x5333 //RX_FDDRC_SLANT_1_0 +264 0x5333 //RX_FDDRC_SLANT_1_1 +265 0x5333 //RX_FDDRC_SLANT_1_2 +266 0x5333 //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +286 0x0100 //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 +#VOL 3 +163 0x1000 //RX_TDDRC_ALPHA_UP_1 +164 0x1000 //RX_TDDRC_ALPHA_UP_2 +165 0x1000 //RX_TDDRC_ALPHA_UP_3 +166 0x1000 //RX_TDDRC_ALPHA_UP_4 +184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +190 0x7FFF //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +269 0x0000 //RX_TDDRC_THRD_0 +270 0x0000 //RX_TDDRC_THRD_1 +271 0x7FFF //RX_TDDRC_THRD_2 +272 0x7FFF //RX_TDDRC_THRD_3 +273 0x7E70 //RX_TDDRC_SLANT_0 +274 0x7FFF //RX_TDDRC_SLANT_1 +275 0x1000 //RX_TDDRC_ALPHA_UP_0 +276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x199A //RX_TDDRC_HMNC_GAIN +279 0x0001 //RX_TDDRC_SMT_FLAG +280 0x0CCD //RX_TDDRC_SMT_W +281 0x0155 //RX_TDDRC_DRC_GAIN +195 0x001C //RX_FDEQ_SUBNUM +196 0x4848 //RX_FDEQ_GAIN_0 +197 0x4848 //RX_FDEQ_GAIN_1 +198 0x4848 //RX_FDEQ_GAIN_2 +199 0x4848 //RX_FDEQ_GAIN_3 +200 0x4848 //RX_FDEQ_GAIN_4 +201 0x4848 //RX_FDEQ_GAIN_5 +202 0x4848 //RX_FDEQ_GAIN_6 +203 0x4848 //RX_FDEQ_GAIN_7 +204 0x4848 //RX_FDEQ_GAIN_8 +205 0x3C3C //RX_FDEQ_GAIN_9 +206 0x3C3C //RX_FDEQ_GAIN_10 +207 0x3838 //RX_FDEQ_GAIN_11 +208 0x3838 //RX_FDEQ_GAIN_12 +209 0x3030 //RX_FDEQ_GAIN_13 +210 0x4848 //RX_FDEQ_GAIN_14 +211 0x4848 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0202 //RX_FDEQ_BIN_0 +221 0x0203 //RX_FDEQ_BIN_1 +222 0x0303 //RX_FDEQ_BIN_2 +223 0x0304 //RX_FDEQ_BIN_3 +224 0x0405 //RX_FDEQ_BIN_4 +225 0x0506 //RX_FDEQ_BIN_5 +226 0x0708 //RX_FDEQ_BIN_6 +227 0x090A //RX_FDEQ_BIN_7 +228 0x0B0C //RX_FDEQ_BIN_8 +229 0x0D0E //RX_FDEQ_BIN_9 +230 0x0E0F //RX_FDEQ_BIN_10 +231 0x0F10 //RX_FDEQ_BIN_11 +232 0x1011 //RX_FDEQ_BIN_12 +233 0x1112 //RX_FDEQ_BIN_13 +234 0x0000 //RX_FDEQ_BIN_14 +235 0x0000 //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x4000 //RX_FDEQ_RESRV_0 +245 0x0320 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0030 //RX_FDDRC_BAND_MARGIN_1 +248 0x0050 //RX_FDDRC_BAND_MARGIN_2 +249 0x0080 //RX_FDDRC_BAND_MARGIN_3 +250 0x0007 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x5000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x6400 //RX_FDDRC_THRD_3_2 +258 0x6400 //RX_FDDRC_THRD_3_3 +259 0x2000 //RX_FDDRC_SLANT_0_0 +260 0x2000 //RX_FDDRC_SLANT_0_1 +261 0x2000 //RX_FDDRC_SLANT_0_2 +262 0x2000 //RX_FDDRC_SLANT_0_3 +263 0x5333 //RX_FDDRC_SLANT_1_0 +264 0x5333 //RX_FDDRC_SLANT_1_1 +265 0x5333 //RX_FDDRC_SLANT_1_2 +266 0x5333 //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +286 0x0100 //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 +#VOL 4 +163 0x1000 //RX_TDDRC_ALPHA_UP_1 +164 0x1000 //RX_TDDRC_ALPHA_UP_2 +165 0x1000 //RX_TDDRC_ALPHA_UP_3 +166 0x1000 //RX_TDDRC_ALPHA_UP_4 +184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +190 0x7FFF //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +269 0x0000 //RX_TDDRC_THRD_0 +270 0x0000 //RX_TDDRC_THRD_1 +271 0x7FFF //RX_TDDRC_THRD_2 +272 0x7FFF //RX_TDDRC_THRD_3 +273 0x7E70 //RX_TDDRC_SLANT_0 +274 0x7FFF //RX_TDDRC_SLANT_1 +275 0x1000 //RX_TDDRC_ALPHA_UP_0 +276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x199A //RX_TDDRC_HMNC_GAIN +279 0x0001 //RX_TDDRC_SMT_FLAG +280 0x0CCD //RX_TDDRC_SMT_W +281 0x0155 //RX_TDDRC_DRC_GAIN +195 0x001C //RX_FDEQ_SUBNUM +196 0x4848 //RX_FDEQ_GAIN_0 +197 0x4848 //RX_FDEQ_GAIN_1 +198 0x4848 //RX_FDEQ_GAIN_2 +199 0x4848 //RX_FDEQ_GAIN_3 +200 0x4848 //RX_FDEQ_GAIN_4 +201 0x4848 //RX_FDEQ_GAIN_5 +202 0x4848 //RX_FDEQ_GAIN_6 +203 0x4848 //RX_FDEQ_GAIN_7 +204 0x4848 //RX_FDEQ_GAIN_8 +205 0x3C3C //RX_FDEQ_GAIN_9 +206 0x3C3C //RX_FDEQ_GAIN_10 +207 0x3838 //RX_FDEQ_GAIN_11 +208 0x3838 //RX_FDEQ_GAIN_12 +209 0x3030 //RX_FDEQ_GAIN_13 +210 0x4848 //RX_FDEQ_GAIN_14 +211 0x4848 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0202 //RX_FDEQ_BIN_0 +221 0x0203 //RX_FDEQ_BIN_1 +222 0x0303 //RX_FDEQ_BIN_2 +223 0x0304 //RX_FDEQ_BIN_3 +224 0x0405 //RX_FDEQ_BIN_4 +225 0x0506 //RX_FDEQ_BIN_5 +226 0x0708 //RX_FDEQ_BIN_6 +227 0x090A //RX_FDEQ_BIN_7 +228 0x0B0C //RX_FDEQ_BIN_8 +229 0x0D0E //RX_FDEQ_BIN_9 +230 0x0E0F //RX_FDEQ_BIN_10 +231 0x0F10 //RX_FDEQ_BIN_11 +232 0x1011 //RX_FDEQ_BIN_12 +233 0x1112 //RX_FDEQ_BIN_13 +234 0x0000 //RX_FDEQ_BIN_14 +235 0x0000 //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x4000 //RX_FDEQ_RESRV_0 +245 0x0320 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0030 //RX_FDDRC_BAND_MARGIN_1 +248 0x0050 //RX_FDDRC_BAND_MARGIN_2 +249 0x0080 //RX_FDDRC_BAND_MARGIN_3 +250 0x0007 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x5000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x6400 //RX_FDDRC_THRD_3_2 +258 0x6400 //RX_FDDRC_THRD_3_3 +259 0x2000 //RX_FDDRC_SLANT_0_0 +260 0x2000 //RX_FDDRC_SLANT_0_1 +261 0x2000 //RX_FDDRC_SLANT_0_2 +262 0x2000 //RX_FDDRC_SLANT_0_3 +263 0x5333 //RX_FDDRC_SLANT_1_0 +264 0x5333 //RX_FDDRC_SLANT_1_1 +265 0x5333 //RX_FDDRC_SLANT_1_2 +266 0x5333 //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +286 0x0100 //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 +#VOL 5 +163 0x1000 //RX_TDDRC_ALPHA_UP_1 +164 0x1000 //RX_TDDRC_ALPHA_UP_2 +165 0x1000 //RX_TDDRC_ALPHA_UP_3 +166 0x1000 //RX_TDDRC_ALPHA_UP_4 +184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +190 0x7FFF //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +269 0x0000 //RX_TDDRC_THRD_0 +270 0x0000 //RX_TDDRC_THRD_1 +271 0x7FFF //RX_TDDRC_THRD_2 +272 0x7FFF //RX_TDDRC_THRD_3 +273 0x7E70 //RX_TDDRC_SLANT_0 +274 0x7FFF //RX_TDDRC_SLANT_1 +275 0x1000 //RX_TDDRC_ALPHA_UP_0 +276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x199A //RX_TDDRC_HMNC_GAIN +279 0x0001 //RX_TDDRC_SMT_FLAG +280 0x0CCD //RX_TDDRC_SMT_W +281 0x0155 //RX_TDDRC_DRC_GAIN +195 0x001C //RX_FDEQ_SUBNUM +196 0x4848 //RX_FDEQ_GAIN_0 +197 0x4848 //RX_FDEQ_GAIN_1 +198 0x4848 //RX_FDEQ_GAIN_2 +199 0x4848 //RX_FDEQ_GAIN_3 +200 0x4848 //RX_FDEQ_GAIN_4 +201 0x4848 //RX_FDEQ_GAIN_5 +202 0x4848 //RX_FDEQ_GAIN_6 +203 0x4848 //RX_FDEQ_GAIN_7 +204 0x4848 //RX_FDEQ_GAIN_8 +205 0x3C3C //RX_FDEQ_GAIN_9 +206 0x3C3C //RX_FDEQ_GAIN_10 +207 0x3838 //RX_FDEQ_GAIN_11 +208 0x3838 //RX_FDEQ_GAIN_12 +209 0x3030 //RX_FDEQ_GAIN_13 +210 0x4848 //RX_FDEQ_GAIN_14 +211 0x4848 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0202 //RX_FDEQ_BIN_0 +221 0x0203 //RX_FDEQ_BIN_1 +222 0x0303 //RX_FDEQ_BIN_2 +223 0x0304 //RX_FDEQ_BIN_3 +224 0x0405 //RX_FDEQ_BIN_4 +225 0x0506 //RX_FDEQ_BIN_5 +226 0x0708 //RX_FDEQ_BIN_6 +227 0x090A //RX_FDEQ_BIN_7 +228 0x0B0C //RX_FDEQ_BIN_8 +229 0x0D0E //RX_FDEQ_BIN_9 +230 0x0E0F //RX_FDEQ_BIN_10 +231 0x0F10 //RX_FDEQ_BIN_11 +232 0x1011 //RX_FDEQ_BIN_12 +233 0x1112 //RX_FDEQ_BIN_13 +234 0x0000 //RX_FDEQ_BIN_14 +235 0x0000 //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x4000 //RX_FDEQ_RESRV_0 +245 0x0320 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0030 //RX_FDDRC_BAND_MARGIN_1 +248 0x0050 //RX_FDDRC_BAND_MARGIN_2 +249 0x0080 //RX_FDDRC_BAND_MARGIN_3 +250 0x0007 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x5000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x6400 //RX_FDDRC_THRD_3_2 +258 0x6400 //RX_FDDRC_THRD_3_3 +259 0x2000 //RX_FDDRC_SLANT_0_0 +260 0x2000 //RX_FDDRC_SLANT_0_1 +261 0x2000 //RX_FDDRC_SLANT_0_2 +262 0x2000 //RX_FDDRC_SLANT_0_3 +263 0x5333 //RX_FDDRC_SLANT_1_0 +264 0x5333 //RX_FDDRC_SLANT_1_1 +265 0x5333 //RX_FDDRC_SLANT_1_2 +266 0x5333 //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +286 0x0100 //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 +#VOL 6 +163 0x1000 //RX_TDDRC_ALPHA_UP_1 +164 0x1000 //RX_TDDRC_ALPHA_UP_2 +165 0x1000 //RX_TDDRC_ALPHA_UP_3 +166 0x1000 //RX_TDDRC_ALPHA_UP_4 +184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +190 0x7FFF //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +269 0x0000 //RX_TDDRC_THRD_0 +270 0x0000 //RX_TDDRC_THRD_1 +271 0x7FFF //RX_TDDRC_THRD_2 +272 0x7FFF //RX_TDDRC_THRD_3 +273 0x7E70 //RX_TDDRC_SLANT_0 +274 0x7FFF //RX_TDDRC_SLANT_1 +275 0x1000 //RX_TDDRC_ALPHA_UP_0 +276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x199A //RX_TDDRC_HMNC_GAIN +279 0x0001 //RX_TDDRC_SMT_FLAG +280 0x0CCD //RX_TDDRC_SMT_W +281 0x0155 //RX_TDDRC_DRC_GAIN +195 0x001C //RX_FDEQ_SUBNUM +196 0x4848 //RX_FDEQ_GAIN_0 +197 0x4848 //RX_FDEQ_GAIN_1 +198 0x4848 //RX_FDEQ_GAIN_2 +199 0x4848 //RX_FDEQ_GAIN_3 +200 0x4848 //RX_FDEQ_GAIN_4 +201 0x4848 //RX_FDEQ_GAIN_5 +202 0x4848 //RX_FDEQ_GAIN_6 +203 0x4848 //RX_FDEQ_GAIN_7 +204 0x4848 //RX_FDEQ_GAIN_8 +205 0x3C3C //RX_FDEQ_GAIN_9 +206 0x3C3C //RX_FDEQ_GAIN_10 +207 0x3838 //RX_FDEQ_GAIN_11 +208 0x3838 //RX_FDEQ_GAIN_12 +209 0x3030 //RX_FDEQ_GAIN_13 +210 0x4848 //RX_FDEQ_GAIN_14 +211 0x4848 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0202 //RX_FDEQ_BIN_0 +221 0x0203 //RX_FDEQ_BIN_1 +222 0x0303 //RX_FDEQ_BIN_2 +223 0x0304 //RX_FDEQ_BIN_3 +224 0x0405 //RX_FDEQ_BIN_4 +225 0x0506 //RX_FDEQ_BIN_5 +226 0x0708 //RX_FDEQ_BIN_6 +227 0x090A //RX_FDEQ_BIN_7 +228 0x0B0C //RX_FDEQ_BIN_8 +229 0x0D0E //RX_FDEQ_BIN_9 +230 0x0E0F //RX_FDEQ_BIN_10 +231 0x0F10 //RX_FDEQ_BIN_11 +232 0x1011 //RX_FDEQ_BIN_12 +233 0x1112 //RX_FDEQ_BIN_13 +234 0x0000 //RX_FDEQ_BIN_14 +235 0x0000 //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x4000 //RX_FDEQ_RESRV_0 +245 0x0320 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0030 //RX_FDDRC_BAND_MARGIN_1 +248 0x0050 //RX_FDDRC_BAND_MARGIN_2 +249 0x0080 //RX_FDDRC_BAND_MARGIN_3 +250 0x0007 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x5000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x6400 //RX_FDDRC_THRD_3_2 +258 0x6400 //RX_FDDRC_THRD_3_3 +259 0x2000 //RX_FDDRC_SLANT_0_0 +260 0x2000 //RX_FDDRC_SLANT_0_1 +261 0x2000 //RX_FDDRC_SLANT_0_2 +262 0x2000 //RX_FDDRC_SLANT_0_3 +263 0x5333 //RX_FDDRC_SLANT_1_0 +264 0x5333 //RX_FDDRC_SLANT_1_1 +265 0x5333 //RX_FDDRC_SLANT_1_2 +266 0x5333 //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +286 0x0100 //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 #CASE_NAME BLUETOOTH-BTNB-VOICE_GENERIC-SWB -#PARAM_TYPE TX+RX -#TOTAL_CUSTOM_STEP 7 +#PARAM_MODE Full +#PARAM_TYPE TX+2RX +#TOTAL_CUSTOM_STEP 7+7 #TX 0 0x0001 //TX_OPERATION_MODE_0 1 0x0001 //TX_OPERATION_MODE_1 @@ -12529,20 +18949,20 @@ 248 0xF400 //TX_THR_SN_EST_6 249 0xF600 //TX_THR_SN_EST_7 250 0x0000 //TX_DELTA_THR_SN_EST_0 -251 0x0000 //TX_DELTA_THR_SN_EST_1 +251 0x0200 //TX_DELTA_THR_SN_EST_1 252 0x0200 //TX_DELTA_THR_SN_EST_2 253 0x0200 //TX_DELTA_THR_SN_EST_3 254 0x0200 //TX_DELTA_THR_SN_EST_4 255 0x0200 //TX_DELTA_THR_SN_EST_5 -256 0x0200 //TX_DELTA_THR_SN_EST_6 +256 0x0000 //TX_DELTA_THR_SN_EST_6 257 0x0200 //TX_DELTA_THR_SN_EST_7 258 0x6000 //TX_LAMBDA_NN_EST_0 -259 0x6000 //TX_LAMBDA_NN_EST_1 +259 0x4000 //TX_LAMBDA_NN_EST_1 260 0x4000 //TX_LAMBDA_NN_EST_2 261 0x4000 //TX_LAMBDA_NN_EST_3 262 0x4000 //TX_LAMBDA_NN_EST_4 263 0x4000 //TX_LAMBDA_NN_EST_5 -264 0x4000 //TX_LAMBDA_NN_EST_6 +264 0x6000 //TX_LAMBDA_NN_EST_6 265 0x4000 //TX_LAMBDA_NN_EST_7 266 0x0400 //TX_N_SN_EST 267 0x001E //TX_INBEAM_T @@ -12560,16 +18980,16 @@ 279 0x1000 //TX_B_POST_FLT_0 280 0x1000 //TX_B_POST_FLT_1 281 0x000B //TX_NS_LVL_CTRL_0 -282 0x000F //TX_NS_LVL_CTRL_1 -283 0x0011 //TX_NS_LVL_CTRL_2 +282 0x0011 //TX_NS_LVL_CTRL_1 +283 0x000F //TX_NS_LVL_CTRL_2 284 0x000F //TX_NS_LVL_CTRL_3 285 0x000F //TX_NS_LVL_CTRL_4 286 0x000F //TX_NS_LVL_CTRL_5 287 0x000F //TX_NS_LVL_CTRL_6 288 0x0011 //TX_NS_LVL_CTRL_7 289 0x000C //TX_MIN_GAIN_S_0 -290 0x000C //TX_MIN_GAIN_S_1 -291 0x000F //TX_MIN_GAIN_S_2 +290 0x000F //TX_MIN_GAIN_S_1 +291 0x000C //TX_MIN_GAIN_S_2 292 0x000C //TX_MIN_GAIN_S_3 293 0x000C //TX_MIN_GAIN_S_4 294 0x000C //TX_MIN_GAIN_S_5 @@ -12593,12 +19013,12 @@ 312 0x7FFF //TX_A_POST_FILT_0 313 0x2000 //TX_A_POST_FILT_1 314 0x2000 //TX_A_POST_FILT_S_0 -315 0x4000 //TX_A_POST_FILT_S_1 +315 0x5000 //TX_A_POST_FILT_S_1 316 0x5000 //TX_A_POST_FILT_S_2 317 0x5000 //TX_A_POST_FILT_S_3 318 0x5000 //TX_A_POST_FILT_S_4 319 0x5000 //TX_A_POST_FILT_S_5 -320 0x5000 //TX_A_POST_FILT_S_6 +320 0x4000 //TX_A_POST_FILT_S_6 321 0x5000 //TX_A_POST_FILT_S_7 322 0x1000 //TX_B_POST_FILT_0 323 0x1000 //TX_B_POST_FILT_1 @@ -12658,10 +19078,10 @@ 377 0x7FFF //TX_NOISE_TH_5_4 378 0x044C //TX_NOISE_TH_6 379 0x0014 //TX_MINENOISE_TH -380 0x4000 //TX_MINENOISE_MIC0_TH_MTS -381 0xFFEE //TX_MINENOISE_MIC0_TH_EXP -382 0x6000 //TX_MINENOISE_MIC0_S_TH_MTS -383 0xFFF3 //TX_MINENOISE_MIC0_S_TH_EXP +380 0x4000 //TX_MORENS_TFMASK_TH +381 0xFFEE //TX_DRC_QUIET_FLOOR +382 0x6000 //TX_RATIODTL_CUT_TH +383 0xFFF3 //TX_DT_CUT_K1 384 0x0666 //TX_OUT_ENER_S_TH_CLEAN 385 0x0666 //TX_OUT_ENER_S_TH_LESSCLEAN 386 0x0333 //TX_OUT_ENER_S_TH_NOISY @@ -12669,15 +19089,15 @@ 388 0x0333 //TX_OUT_ENER_TH_SPEECH 389 0x2000 //TX_SN_NPB_GAIN 390 0x0000 //TX_NN_NPB_GAIN -391 0x0000 //TX_CSX_ALPHA_0 -392 0x0000 //TX_CSX_ALPHA_1 -393 0x0000 //TX_CSX_ALPHA_2 -394 0x0000 //TX_CSX_ALPHA_3 -395 0x0800 //TX_MU_ARSP_EST -396 0x00C8 //TX_P_OUTBEAM_MIN_TH +391 0x0000 //TX_POST_MASK_SUP_HSNE +392 0x0000 //TX_TAIL_DET_TH +393 0x0000 //TX_B_LESSCUT_RTO_WTA +394 0x0000 //TX_MEL_G_R +395 0x0800 //TX_SUPHIGH_TH +396 0x00C8 //TX_MASK_G_R 397 0x0002 //TX_EXTRA_NS_L -398 0x0800 //TX_EXTRA_NS_A -399 0x0005 //TX_VR_NOISE_FLOOR_TH +398 0x0800 //TX_C_POST_FLT_MASK +399 0x0005 //TX_A_POST_FLT_WNS 400 0x0148 //TX_MIN_G_LOW300HZ 401 0x0002 //TX_MAXLEVEL_CNG 402 0x00B4 //TX_STN_NOISE_TH @@ -12792,16 +19212,16 @@ 511 0x6666 //TX_MIC_TO_BFGAIN 512 0x0000 //TX_MICTOBFGAIN0 513 0x0000 //TX_FASTMUE_TH -514 0x0000 //TX_DERVB_LEN_0 -515 0x0000 //TX_DERVB_LEN_1 -516 0x0000 //TX_RHO_DERVB -517 0x0000 //TX_MIC_INDX_DERVB -518 0x0000 //TX_MU_DERVB -519 0x0000 //TX_DR_RESRV_0 -520 0x0000 //TX_DR_RESRV_1 -521 0x0000 //TX_DR_RESRV_2 -522 0x0000 //TX_DR_RESRV_3 -523 0x0000 //TX_DR_RESRV_4 +514 0x0000 //TX_DEREVERB_LF_MU +515 0x0000 //TX_DEREVERB_HF_MU +516 0x0000 //TX_DEREVERB_DELAY +517 0x0000 //TX_DEREVERB_COEF_LEN +518 0x0000 //TX_DEREVERB_DNR +519 0x0000 //TX_DEREVERB_ALPHA +520 0x0000 //TX_DEREVERB_BETA +521 0x0000 //TX_GSC_RTOL_TH +522 0x0000 //TX_GSC_RTOH_TH +523 0x0000 //TX_WIDE2_MEANHTH 524 0x0000 //TX_DR_RESRV_5 525 0x0000 //TX_DR_RESRV_6 526 0x0000 //TX_DR_RESRV_7 @@ -13175,8 +19595,73 @@ 894 0xC000 //TX_FASTNS_SSA_THHFL 895 0xCCCC //TX_FASTNS_SSA_THLFH 896 0xD999 //TX_FASTNS_SSA_THHFH +897 0x0000 //TX_SENDFUNC_REG_MICMUTE +898 0x0000 //TX_SENDFUNC_REG_MICMUTE1 +899 0x0000 //TX_MICMUTE_RATIO_THR +900 0x0000 //TX_MICMUTE_AMP_THR +901 0x0000 //TX_MICMUTE_HPF_IND +902 0x0000 //TX_MICMUTE_LOG_EYR_TH +903 0x0000 //TX_MICMUTE_CVG_TIME +904 0x0000 //TX_MICMUTE_RELEASE_TIME +905 0x0000 //TX_MIC_VOLUME_MIC0MUTE +906 0x0000 //TX_MICMUTE_EPD_OFFSET_0 +907 0x0000 //TX_MICMUTE_FRQ_AEC_L +908 0x0000 //TX_MICMUTE_EAD_THR +909 0x0000 //TX_MICMUTE_LAMBDA_CB_NLE +910 0x0000 //TX_MICMUTE_LAMBDA_RE_EST +911 0x0000 //TX_DTD_THR1_MICMUTE_0 +912 0x0000 //TX_DTD_THR1_MICMUTE_1 +913 0x0000 //TX_DTD_THR1_MICMUTE_2 +914 0x0000 //TX_DTD_THR1_MICMUTE_3 +915 0x0000 //TX_DTD_THR2_MICMUTE_0 +916 0x0000 //TX_MICMUTE_MIN_EQ_RE_EST_0 +917 0x0000 //TX_MICMUTE_MIN_EQ_RE_EST_1 +918 0x0000 //TX_MICMUTE_MIN_EQ_RE_EST_2 +919 0x0000 //TX_MICMUTE_MIN_EQ_RE_EST_3 +920 0x0000 //TX_MICMUTE_MIN_EQ_RE_EST_4 +921 0x0000 //TX_MICMUTE_C_POST_FLT +922 0x0000 //TX_MICMUTE_DT_CUT_K +923 0x0000 //TX_MICMUTE_DT_CUT_THR +924 0x0000 //TX_MICMUTE_DT_CUT_K2 +925 0x0000 //TX_MICMUTE_DT_CUT_THR2 +926 0x0000 //TX_MICMUTE_DT2_HOLD_N +927 0x0000 //TX_MICMUTE_RATIODTH_THCUT +928 0x0000 //TX_MICMUTE_B_POST_FLT_ECHOL +929 0x0000 //TX_MICMUTE_B_POST_FLT_ECHOH +930 0x0000 //TX_MICMUTE_C_POST_FLT_MASK +931 0x0000 //TX_MICMUTE_RATIODTL_CUT_TH +932 0x0000 //TX_MICMUTE_DT_CUT_K1 +933 0x0000 //TX_MICMUTE_N2_SN_EST +934 0x0000 //TX_MICMUTE_THR_SN_EST_0 +935 0x0000 //TX_MICMUTE_MIN_G_CTRL_0 +936 0x0000 //TX_MICMUTE_A_POST_FILT_S_0 +937 0x0000 //TX_MICMUTE_B_POST_FILT_0 +938 0x0000 //TX_MIC1RUB_AMP_THR +939 0x0000 //TX_MIC1MUTE_RATIO_THR +940 0x0000 //TX_MIC1MUTE_AMP_THR +941 0x0000 //TX_MIC1MUTE_CVG_TIME +942 0x0000 //TX_MIC1MUTE_RELEASE_TIME +943 0x0000 //TX_AMS_RESRV_01 +944 0x0000 //TX_AMS_RESRV_02 +945 0x0000 //TX_AMS_RESRV_03 +946 0x0000 //TX_AMS_RESRV_04 +947 0x0000 //TX_AMS_RESRV_05 +948 0x0000 //TX_AMS_RESRV_06 +949 0x0000 //TX_AMS_RESRV_07 +950 0x0000 //TX_AMS_RESRV_08 +951 0x0000 //TX_AMS_RESRV_09 +952 0x0000 //TX_AMS_RESRV_10 +953 0x0000 //TX_AMS_RESRV_11 +954 0x0000 //TX_AMS_RESRV_12 +955 0x0000 //TX_AMS_RESRV_13 +956 0x0000 //TX_AMS_RESRV_14 +957 0x0000 //TX_AMS_RESRV_15 +958 0x0000 //TX_AMS_RESRV_16 +959 0x0000 //TX_AMS_RESRV_17 +960 0x0000 //TX_AMS_RESRV_18 +961 0x0000 //TX_AMS_RESRV_19 #RX -0 0x0064 //RX_RECVFUNC_MODE_0 +0 0x2064 //RX_RECVFUNC_MODE_0 1 0x0000 //RX_RECVFUNC_MODE_1 2 0x0003 //RX_SAMPLINGFREQ_SIG 3 0x0003 //RX_SAMPLINGFREQ_PROC @@ -14026,10 +20511,862 @@ 110 0x0000 //RX_FDDRC_RESRV_0 129 0x0100 //RX_SPK_VOL 130 0x0000 //RX_VOL_RESRV_0 +#RX 2 +157 0x2064 //RX_RECVFUNC_MODE_0 +158 0x0000 //RX_RECVFUNC_MODE_1 +159 0x0003 //RX_SAMPLINGFREQ_SIG +160 0x0003 //RX_SAMPLINGFREQ_PROC +161 0x000A //RX_FRAME_SZ +162 0x0000 //RX_DELAY_OPT +163 0x3000 //RX_TDDRC_ALPHA_UP_1 +164 0x3000 //RX_TDDRC_ALPHA_UP_2 +165 0x3000 //RX_TDDRC_ALPHA_UP_3 +166 0x3000 //RX_TDDRC_ALPHA_UP_4 +167 0x0800 //RX_PGA +168 0x7FFF //RX_A_HP +169 0x0000 //RX_B_PE +170 0x1800 //RX_THR_PITCH_DET_0 +171 0x1000 //RX_THR_PITCH_DET_1 +172 0x0800 //RX_THR_PITCH_DET_2 +173 0x0008 //RX_PITCH_BFR_LEN +174 0x0003 //RX_SBD_PITCH_DET +175 0x0100 //RX_PP_RESRV_0 +176 0x0020 //RX_PP_RESRV_1 +177 0x0400 //RX_N_SN_EST +178 0x000C //RX_N2_SN_EST +179 0x0003 //RX_NS_LVL_CTRL +180 0x9000 //RX_THR_SN_EST +181 0x7CCD //RX_LAMBDA_PFILT +182 0x000A //RX_FENS_RESRV_0 +183 0x0190 //RX_FENS_RESRV_1 +184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +187 0x0002 //RX_EXTRA_NS_L +188 0x0800 //RX_EXTRA_NS_A +189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +190 0x7FFF //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +192 0x199A //RX_A_POST_FLT +193 0x0000 //RX_LMT_THRD +194 0x4000 //RX_LMT_ALPHA +195 0x0020 //RX_FDEQ_SUBNUM +196 0x4848 //RX_FDEQ_GAIN_0 +197 0x4848 //RX_FDEQ_GAIN_1 +198 0x4848 //RX_FDEQ_GAIN_2 +199 0x4848 //RX_FDEQ_GAIN_3 +200 0x4848 //RX_FDEQ_GAIN_4 +201 0x4848 //RX_FDEQ_GAIN_5 +202 0x4848 //RX_FDEQ_GAIN_6 +203 0x4848 //RX_FDEQ_GAIN_7 +204 0x4848 //RX_FDEQ_GAIN_8 +205 0x4848 //RX_FDEQ_GAIN_9 +206 0x4848 //RX_FDEQ_GAIN_10 +207 0x4848 //RX_FDEQ_GAIN_11 +208 0x4848 //RX_FDEQ_GAIN_12 +209 0x4848 //RX_FDEQ_GAIN_13 +210 0x4848 //RX_FDEQ_GAIN_14 +211 0x4848 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0202 //RX_FDEQ_BIN_0 +221 0x0203 //RX_FDEQ_BIN_1 +222 0x0303 //RX_FDEQ_BIN_2 +223 0x0304 //RX_FDEQ_BIN_3 +224 0x0405 //RX_FDEQ_BIN_4 +225 0x0506 //RX_FDEQ_BIN_5 +226 0x0708 //RX_FDEQ_BIN_6 +227 0x090A //RX_FDEQ_BIN_7 +228 0x0B0C //RX_FDEQ_BIN_8 +229 0x0D0E //RX_FDEQ_BIN_9 +230 0x1013 //RX_FDEQ_BIN_10 +231 0x1719 //RX_FDEQ_BIN_11 +232 0x1B1E //RX_FDEQ_BIN_12 +233 0x1E1E //RX_FDEQ_BIN_13 +234 0x1E28 //RX_FDEQ_BIN_14 +235 0x282C //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x4000 //RX_FDEQ_RESRV_0 +245 0x0320 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0030 //RX_FDDRC_BAND_MARGIN_1 +248 0x0050 //RX_FDDRC_BAND_MARGIN_2 +249 0x0080 //RX_FDDRC_BAND_MARGIN_3 +250 0x0007 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x5000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x6400 //RX_FDDRC_THRD_3_2 +258 0x6400 //RX_FDDRC_THRD_3_3 +259 0x2000 //RX_FDDRC_SLANT_0_0 +260 0x2000 //RX_FDDRC_SLANT_0_1 +261 0x2000 //RX_FDDRC_SLANT_0_2 +262 0x2000 //RX_FDDRC_SLANT_0_3 +263 0x5333 //RX_FDDRC_SLANT_1_0 +264 0x5333 //RX_FDDRC_SLANT_1_1 +265 0x5333 //RX_FDDRC_SLANT_1_2 +266 0x5333 //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +268 0x0000 //RX_FILTINDX +269 0x0000 //RX_TDDRC_THRD_0 +270 0x0000 //RX_TDDRC_THRD_1 +271 0x7FFF //RX_TDDRC_THRD_2 +272 0x7FFF //RX_TDDRC_THRD_3 +273 0x7FFF //RX_TDDRC_SLANT_0 +274 0x7FFF //RX_TDDRC_SLANT_1 +275 0x3000 //RX_TDDRC_ALPHA_UP_0 +276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x199A //RX_TDDRC_HMNC_GAIN +279 0x0001 //RX_TDDRC_SMT_FLAG +280 0x0CCD //RX_TDDRC_SMT_W +281 0x0155 //RX_TDDRC_DRC_GAIN +282 0x7C00 //RX_LAMBDA_PKA_FP +283 0x2000 //RX_TPKA_FP +284 0x2000 //RX_MIN_G_FP +285 0x0080 //RX_MAX_G_FP +286 0x0100 //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 +288 0x0000 //RX_MAXLEVEL_CNG +289 0x3000 //RX_BWE_UV_TH +290 0x3000 //RX_BWE_UV_TH2 +291 0x1800 //RX_BWE_UV_TH3 +292 0x1000 //RX_BWE_V_TH +293 0x04CD //RX_BWE_GAIN1_V_TH1 +294 0x0F33 //RX_BWE_GAIN1_V_TH2 +295 0x7333 //RX_BWE_UV_EQ +296 0x199A //RX_BWE_V_EQ +297 0x7333 //RX_BWE_TONE_TH +298 0x0004 //RX_BWE_UV_HOLD_T +299 0x6CCD //RX_BWE_GAIN2_ALPHA +300 0x799A //RX_BWE_GAIN3_ALPHA +301 0x001E //RX_BWE_CUTOFF +302 0x3000 //RX_BWE_GAINFILL +303 0x3200 //RX_BWE_MAXTH_TONE +304 0x2000 //RX_BWE_EQ_0 +305 0x2000 //RX_BWE_EQ_1 +306 0x2000 //RX_BWE_EQ_2 +307 0x2000 //RX_BWE_EQ_3 +308 0x2000 //RX_BWE_EQ_4 +309 0x2000 //RX_BWE_EQ_5 +310 0x2000 //RX_BWE_EQ_6 +311 0x0000 //RX_BWE_RESRV_0 +312 0x0000 //RX_BWE_RESRV_1 +313 0x0000 //RX_BWE_RESRV_2 +#VOL 0 +163 0x3000 //RX_TDDRC_ALPHA_UP_1 +164 0x3000 //RX_TDDRC_ALPHA_UP_2 +165 0x3000 //RX_TDDRC_ALPHA_UP_3 +166 0x3000 //RX_TDDRC_ALPHA_UP_4 +184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +190 0x7FFF //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +269 0x0000 //RX_TDDRC_THRD_0 +270 0x0000 //RX_TDDRC_THRD_1 +271 0x7FFF //RX_TDDRC_THRD_2 +272 0x7FFF //RX_TDDRC_THRD_3 +273 0x7FFF //RX_TDDRC_SLANT_0 +274 0x7FFF //RX_TDDRC_SLANT_1 +275 0x3000 //RX_TDDRC_ALPHA_UP_0 +276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x199A //RX_TDDRC_HMNC_GAIN +279 0x0001 //RX_TDDRC_SMT_FLAG +280 0x0CCD //RX_TDDRC_SMT_W +281 0x0155 //RX_TDDRC_DRC_GAIN +195 0x0020 //RX_FDEQ_SUBNUM +196 0x4848 //RX_FDEQ_GAIN_0 +197 0x4848 //RX_FDEQ_GAIN_1 +198 0x4848 //RX_FDEQ_GAIN_2 +199 0x4848 //RX_FDEQ_GAIN_3 +200 0x4848 //RX_FDEQ_GAIN_4 +201 0x4848 //RX_FDEQ_GAIN_5 +202 0x4848 //RX_FDEQ_GAIN_6 +203 0x4848 //RX_FDEQ_GAIN_7 +204 0x4848 //RX_FDEQ_GAIN_8 +205 0x4848 //RX_FDEQ_GAIN_9 +206 0x4848 //RX_FDEQ_GAIN_10 +207 0x4848 //RX_FDEQ_GAIN_11 +208 0x4848 //RX_FDEQ_GAIN_12 +209 0x4848 //RX_FDEQ_GAIN_13 +210 0x4848 //RX_FDEQ_GAIN_14 +211 0x4848 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0202 //RX_FDEQ_BIN_0 +221 0x0203 //RX_FDEQ_BIN_1 +222 0x0303 //RX_FDEQ_BIN_2 +223 0x0304 //RX_FDEQ_BIN_3 +224 0x0405 //RX_FDEQ_BIN_4 +225 0x0506 //RX_FDEQ_BIN_5 +226 0x0708 //RX_FDEQ_BIN_6 +227 0x090A //RX_FDEQ_BIN_7 +228 0x0B0C //RX_FDEQ_BIN_8 +229 0x0D0E //RX_FDEQ_BIN_9 +230 0x1013 //RX_FDEQ_BIN_10 +231 0x1719 //RX_FDEQ_BIN_11 +232 0x1B1E //RX_FDEQ_BIN_12 +233 0x1E1E //RX_FDEQ_BIN_13 +234 0x1E28 //RX_FDEQ_BIN_14 +235 0x282C //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x4000 //RX_FDEQ_RESRV_0 +245 0x0320 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0030 //RX_FDDRC_BAND_MARGIN_1 +248 0x0050 //RX_FDDRC_BAND_MARGIN_2 +249 0x0080 //RX_FDDRC_BAND_MARGIN_3 +250 0x0007 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x5000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x6400 //RX_FDDRC_THRD_3_2 +258 0x6400 //RX_FDDRC_THRD_3_3 +259 0x2000 //RX_FDDRC_SLANT_0_0 +260 0x2000 //RX_FDDRC_SLANT_0_1 +261 0x2000 //RX_FDDRC_SLANT_0_2 +262 0x2000 //RX_FDDRC_SLANT_0_3 +263 0x5333 //RX_FDDRC_SLANT_1_0 +264 0x5333 //RX_FDDRC_SLANT_1_1 +265 0x5333 //RX_FDDRC_SLANT_1_2 +266 0x5333 //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +286 0x0100 //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 +#VOL 1 +163 0x3000 //RX_TDDRC_ALPHA_UP_1 +164 0x3000 //RX_TDDRC_ALPHA_UP_2 +165 0x3000 //RX_TDDRC_ALPHA_UP_3 +166 0x3000 //RX_TDDRC_ALPHA_UP_4 +184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +190 0x7FFF //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +269 0x0000 //RX_TDDRC_THRD_0 +270 0x0000 //RX_TDDRC_THRD_1 +271 0x7FFF //RX_TDDRC_THRD_2 +272 0x7FFF //RX_TDDRC_THRD_3 +273 0x7FFF //RX_TDDRC_SLANT_0 +274 0x7FFF //RX_TDDRC_SLANT_1 +275 0x3000 //RX_TDDRC_ALPHA_UP_0 +276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x199A //RX_TDDRC_HMNC_GAIN +279 0x0001 //RX_TDDRC_SMT_FLAG +280 0x0CCD //RX_TDDRC_SMT_W +281 0x0155 //RX_TDDRC_DRC_GAIN +195 0x0020 //RX_FDEQ_SUBNUM +196 0x4848 //RX_FDEQ_GAIN_0 +197 0x4848 //RX_FDEQ_GAIN_1 +198 0x4848 //RX_FDEQ_GAIN_2 +199 0x4848 //RX_FDEQ_GAIN_3 +200 0x4848 //RX_FDEQ_GAIN_4 +201 0x4848 //RX_FDEQ_GAIN_5 +202 0x4848 //RX_FDEQ_GAIN_6 +203 0x4848 //RX_FDEQ_GAIN_7 +204 0x4848 //RX_FDEQ_GAIN_8 +205 0x4848 //RX_FDEQ_GAIN_9 +206 0x4848 //RX_FDEQ_GAIN_10 +207 0x4848 //RX_FDEQ_GAIN_11 +208 0x4848 //RX_FDEQ_GAIN_12 +209 0x4848 //RX_FDEQ_GAIN_13 +210 0x4848 //RX_FDEQ_GAIN_14 +211 0x4848 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0202 //RX_FDEQ_BIN_0 +221 0x0203 //RX_FDEQ_BIN_1 +222 0x0303 //RX_FDEQ_BIN_2 +223 0x0304 //RX_FDEQ_BIN_3 +224 0x0405 //RX_FDEQ_BIN_4 +225 0x0506 //RX_FDEQ_BIN_5 +226 0x0708 //RX_FDEQ_BIN_6 +227 0x090A //RX_FDEQ_BIN_7 +228 0x0B0C //RX_FDEQ_BIN_8 +229 0x0D0E //RX_FDEQ_BIN_9 +230 0x1013 //RX_FDEQ_BIN_10 +231 0x1719 //RX_FDEQ_BIN_11 +232 0x1B1E //RX_FDEQ_BIN_12 +233 0x1E1E //RX_FDEQ_BIN_13 +234 0x1E28 //RX_FDEQ_BIN_14 +235 0x282C //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x4000 //RX_FDEQ_RESRV_0 +245 0x0320 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0030 //RX_FDDRC_BAND_MARGIN_1 +248 0x0050 //RX_FDDRC_BAND_MARGIN_2 +249 0x0080 //RX_FDDRC_BAND_MARGIN_3 +250 0x0007 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x5000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x6400 //RX_FDDRC_THRD_3_2 +258 0x6400 //RX_FDDRC_THRD_3_3 +259 0x2000 //RX_FDDRC_SLANT_0_0 +260 0x2000 //RX_FDDRC_SLANT_0_1 +261 0x2000 //RX_FDDRC_SLANT_0_2 +262 0x2000 //RX_FDDRC_SLANT_0_3 +263 0x5333 //RX_FDDRC_SLANT_1_0 +264 0x5333 //RX_FDDRC_SLANT_1_1 +265 0x5333 //RX_FDDRC_SLANT_1_2 +266 0x5333 //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +286 0x0100 //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 +#VOL 2 +163 0x3000 //RX_TDDRC_ALPHA_UP_1 +164 0x3000 //RX_TDDRC_ALPHA_UP_2 +165 0x3000 //RX_TDDRC_ALPHA_UP_3 +166 0x3000 //RX_TDDRC_ALPHA_UP_4 +184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +190 0x7FFF //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +269 0x0000 //RX_TDDRC_THRD_0 +270 0x0000 //RX_TDDRC_THRD_1 +271 0x7FFF //RX_TDDRC_THRD_2 +272 0x7FFF //RX_TDDRC_THRD_3 +273 0x7FFF //RX_TDDRC_SLANT_0 +274 0x7FFF //RX_TDDRC_SLANT_1 +275 0x3000 //RX_TDDRC_ALPHA_UP_0 +276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x199A //RX_TDDRC_HMNC_GAIN +279 0x0001 //RX_TDDRC_SMT_FLAG +280 0x0CCD //RX_TDDRC_SMT_W +281 0x0155 //RX_TDDRC_DRC_GAIN +195 0x0020 //RX_FDEQ_SUBNUM +196 0x4848 //RX_FDEQ_GAIN_0 +197 0x4848 //RX_FDEQ_GAIN_1 +198 0x4848 //RX_FDEQ_GAIN_2 +199 0x4848 //RX_FDEQ_GAIN_3 +200 0x4848 //RX_FDEQ_GAIN_4 +201 0x4848 //RX_FDEQ_GAIN_5 +202 0x4848 //RX_FDEQ_GAIN_6 +203 0x4848 //RX_FDEQ_GAIN_7 +204 0x4848 //RX_FDEQ_GAIN_8 +205 0x4848 //RX_FDEQ_GAIN_9 +206 0x4848 //RX_FDEQ_GAIN_10 +207 0x4848 //RX_FDEQ_GAIN_11 +208 0x4848 //RX_FDEQ_GAIN_12 +209 0x4848 //RX_FDEQ_GAIN_13 +210 0x4848 //RX_FDEQ_GAIN_14 +211 0x4848 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0202 //RX_FDEQ_BIN_0 +221 0x0203 //RX_FDEQ_BIN_1 +222 0x0303 //RX_FDEQ_BIN_2 +223 0x0304 //RX_FDEQ_BIN_3 +224 0x0405 //RX_FDEQ_BIN_4 +225 0x0506 //RX_FDEQ_BIN_5 +226 0x0708 //RX_FDEQ_BIN_6 +227 0x090A //RX_FDEQ_BIN_7 +228 0x0B0C //RX_FDEQ_BIN_8 +229 0x0D0E //RX_FDEQ_BIN_9 +230 0x1013 //RX_FDEQ_BIN_10 +231 0x1719 //RX_FDEQ_BIN_11 +232 0x1B1E //RX_FDEQ_BIN_12 +233 0x1E1E //RX_FDEQ_BIN_13 +234 0x1E28 //RX_FDEQ_BIN_14 +235 0x282C //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x4000 //RX_FDEQ_RESRV_0 +245 0x0320 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0030 //RX_FDDRC_BAND_MARGIN_1 +248 0x0050 //RX_FDDRC_BAND_MARGIN_2 +249 0x0080 //RX_FDDRC_BAND_MARGIN_3 +250 0x0007 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x5000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x6400 //RX_FDDRC_THRD_3_2 +258 0x6400 //RX_FDDRC_THRD_3_3 +259 0x2000 //RX_FDDRC_SLANT_0_0 +260 0x2000 //RX_FDDRC_SLANT_0_1 +261 0x2000 //RX_FDDRC_SLANT_0_2 +262 0x2000 //RX_FDDRC_SLANT_0_3 +263 0x5333 //RX_FDDRC_SLANT_1_0 +264 0x5333 //RX_FDDRC_SLANT_1_1 +265 0x5333 //RX_FDDRC_SLANT_1_2 +266 0x5333 //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +286 0x0100 //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 +#VOL 3 +163 0x3000 //RX_TDDRC_ALPHA_UP_1 +164 0x3000 //RX_TDDRC_ALPHA_UP_2 +165 0x3000 //RX_TDDRC_ALPHA_UP_3 +166 0x3000 //RX_TDDRC_ALPHA_UP_4 +184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +190 0x7FFF //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +269 0x0000 //RX_TDDRC_THRD_0 +270 0x0000 //RX_TDDRC_THRD_1 +271 0x7FFF //RX_TDDRC_THRD_2 +272 0x7FFF //RX_TDDRC_THRD_3 +273 0x7FFF //RX_TDDRC_SLANT_0 +274 0x7FFF //RX_TDDRC_SLANT_1 +275 0x3000 //RX_TDDRC_ALPHA_UP_0 +276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x199A //RX_TDDRC_HMNC_GAIN +279 0x0001 //RX_TDDRC_SMT_FLAG +280 0x0CCD //RX_TDDRC_SMT_W +281 0x0155 //RX_TDDRC_DRC_GAIN +195 0x0020 //RX_FDEQ_SUBNUM +196 0x4848 //RX_FDEQ_GAIN_0 +197 0x4848 //RX_FDEQ_GAIN_1 +198 0x4848 //RX_FDEQ_GAIN_2 +199 0x4848 //RX_FDEQ_GAIN_3 +200 0x4848 //RX_FDEQ_GAIN_4 +201 0x4848 //RX_FDEQ_GAIN_5 +202 0x4848 //RX_FDEQ_GAIN_6 +203 0x4848 //RX_FDEQ_GAIN_7 +204 0x4848 //RX_FDEQ_GAIN_8 +205 0x4848 //RX_FDEQ_GAIN_9 +206 0x4848 //RX_FDEQ_GAIN_10 +207 0x4848 //RX_FDEQ_GAIN_11 +208 0x4848 //RX_FDEQ_GAIN_12 +209 0x4848 //RX_FDEQ_GAIN_13 +210 0x4848 //RX_FDEQ_GAIN_14 +211 0x4848 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0202 //RX_FDEQ_BIN_0 +221 0x0203 //RX_FDEQ_BIN_1 +222 0x0303 //RX_FDEQ_BIN_2 +223 0x0304 //RX_FDEQ_BIN_3 +224 0x0405 //RX_FDEQ_BIN_4 +225 0x0506 //RX_FDEQ_BIN_5 +226 0x0708 //RX_FDEQ_BIN_6 +227 0x090A //RX_FDEQ_BIN_7 +228 0x0B0C //RX_FDEQ_BIN_8 +229 0x0D0E //RX_FDEQ_BIN_9 +230 0x1013 //RX_FDEQ_BIN_10 +231 0x1719 //RX_FDEQ_BIN_11 +232 0x1B1E //RX_FDEQ_BIN_12 +233 0x1E1E //RX_FDEQ_BIN_13 +234 0x1E28 //RX_FDEQ_BIN_14 +235 0x282C //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x4000 //RX_FDEQ_RESRV_0 +245 0x0320 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0030 //RX_FDDRC_BAND_MARGIN_1 +248 0x0050 //RX_FDDRC_BAND_MARGIN_2 +249 0x0080 //RX_FDDRC_BAND_MARGIN_3 +250 0x0007 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x5000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x6400 //RX_FDDRC_THRD_3_2 +258 0x6400 //RX_FDDRC_THRD_3_3 +259 0x2000 //RX_FDDRC_SLANT_0_0 +260 0x2000 //RX_FDDRC_SLANT_0_1 +261 0x2000 //RX_FDDRC_SLANT_0_2 +262 0x2000 //RX_FDDRC_SLANT_0_3 +263 0x5333 //RX_FDDRC_SLANT_1_0 +264 0x5333 //RX_FDDRC_SLANT_1_1 +265 0x5333 //RX_FDDRC_SLANT_1_2 +266 0x5333 //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +286 0x0100 //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 +#VOL 4 +163 0x3000 //RX_TDDRC_ALPHA_UP_1 +164 0x3000 //RX_TDDRC_ALPHA_UP_2 +165 0x3000 //RX_TDDRC_ALPHA_UP_3 +166 0x3000 //RX_TDDRC_ALPHA_UP_4 +184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +190 0x7FFF //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +269 0x0000 //RX_TDDRC_THRD_0 +270 0x0000 //RX_TDDRC_THRD_1 +271 0x7FFF //RX_TDDRC_THRD_2 +272 0x7FFF //RX_TDDRC_THRD_3 +273 0x7FFF //RX_TDDRC_SLANT_0 +274 0x7FFF //RX_TDDRC_SLANT_1 +275 0x3000 //RX_TDDRC_ALPHA_UP_0 +276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x199A //RX_TDDRC_HMNC_GAIN +279 0x0001 //RX_TDDRC_SMT_FLAG +280 0x0CCD //RX_TDDRC_SMT_W +281 0x0155 //RX_TDDRC_DRC_GAIN +195 0x0020 //RX_FDEQ_SUBNUM +196 0x4848 //RX_FDEQ_GAIN_0 +197 0x4848 //RX_FDEQ_GAIN_1 +198 0x4848 //RX_FDEQ_GAIN_2 +199 0x4848 //RX_FDEQ_GAIN_3 +200 0x4848 //RX_FDEQ_GAIN_4 +201 0x4848 //RX_FDEQ_GAIN_5 +202 0x4848 //RX_FDEQ_GAIN_6 +203 0x4848 //RX_FDEQ_GAIN_7 +204 0x4848 //RX_FDEQ_GAIN_8 +205 0x4848 //RX_FDEQ_GAIN_9 +206 0x4848 //RX_FDEQ_GAIN_10 +207 0x4848 //RX_FDEQ_GAIN_11 +208 0x4848 //RX_FDEQ_GAIN_12 +209 0x4848 //RX_FDEQ_GAIN_13 +210 0x4848 //RX_FDEQ_GAIN_14 +211 0x4848 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0202 //RX_FDEQ_BIN_0 +221 0x0203 //RX_FDEQ_BIN_1 +222 0x0303 //RX_FDEQ_BIN_2 +223 0x0304 //RX_FDEQ_BIN_3 +224 0x0405 //RX_FDEQ_BIN_4 +225 0x0506 //RX_FDEQ_BIN_5 +226 0x0708 //RX_FDEQ_BIN_6 +227 0x090A //RX_FDEQ_BIN_7 +228 0x0B0C //RX_FDEQ_BIN_8 +229 0x0D0E //RX_FDEQ_BIN_9 +230 0x1013 //RX_FDEQ_BIN_10 +231 0x1719 //RX_FDEQ_BIN_11 +232 0x1B1E //RX_FDEQ_BIN_12 +233 0x1E1E //RX_FDEQ_BIN_13 +234 0x1E28 //RX_FDEQ_BIN_14 +235 0x282C //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x4000 //RX_FDEQ_RESRV_0 +245 0x0320 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0030 //RX_FDDRC_BAND_MARGIN_1 +248 0x0050 //RX_FDDRC_BAND_MARGIN_2 +249 0x0080 //RX_FDDRC_BAND_MARGIN_3 +250 0x0007 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x5000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x6400 //RX_FDDRC_THRD_3_2 +258 0x6400 //RX_FDDRC_THRD_3_3 +259 0x2000 //RX_FDDRC_SLANT_0_0 +260 0x2000 //RX_FDDRC_SLANT_0_1 +261 0x2000 //RX_FDDRC_SLANT_0_2 +262 0x2000 //RX_FDDRC_SLANT_0_3 +263 0x5333 //RX_FDDRC_SLANT_1_0 +264 0x5333 //RX_FDDRC_SLANT_1_1 +265 0x5333 //RX_FDDRC_SLANT_1_2 +266 0x5333 //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +286 0x0100 //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 +#VOL 5 +163 0x3000 //RX_TDDRC_ALPHA_UP_1 +164 0x3000 //RX_TDDRC_ALPHA_UP_2 +165 0x3000 //RX_TDDRC_ALPHA_UP_3 +166 0x3000 //RX_TDDRC_ALPHA_UP_4 +184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +190 0x7FFF //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +269 0x0000 //RX_TDDRC_THRD_0 +270 0x0000 //RX_TDDRC_THRD_1 +271 0x7FFF //RX_TDDRC_THRD_2 +272 0x7FFF //RX_TDDRC_THRD_3 +273 0x7FFF //RX_TDDRC_SLANT_0 +274 0x7FFF //RX_TDDRC_SLANT_1 +275 0x3000 //RX_TDDRC_ALPHA_UP_0 +276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x199A //RX_TDDRC_HMNC_GAIN +279 0x0001 //RX_TDDRC_SMT_FLAG +280 0x0CCD //RX_TDDRC_SMT_W +281 0x0155 //RX_TDDRC_DRC_GAIN +195 0x0020 //RX_FDEQ_SUBNUM +196 0x4848 //RX_FDEQ_GAIN_0 +197 0x4848 //RX_FDEQ_GAIN_1 +198 0x4848 //RX_FDEQ_GAIN_2 +199 0x4848 //RX_FDEQ_GAIN_3 +200 0x4848 //RX_FDEQ_GAIN_4 +201 0x4848 //RX_FDEQ_GAIN_5 +202 0x4848 //RX_FDEQ_GAIN_6 +203 0x4848 //RX_FDEQ_GAIN_7 +204 0x4848 //RX_FDEQ_GAIN_8 +205 0x4848 //RX_FDEQ_GAIN_9 +206 0x4848 //RX_FDEQ_GAIN_10 +207 0x4848 //RX_FDEQ_GAIN_11 +208 0x4848 //RX_FDEQ_GAIN_12 +209 0x4848 //RX_FDEQ_GAIN_13 +210 0x4848 //RX_FDEQ_GAIN_14 +211 0x4848 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0202 //RX_FDEQ_BIN_0 +221 0x0203 //RX_FDEQ_BIN_1 +222 0x0303 //RX_FDEQ_BIN_2 +223 0x0304 //RX_FDEQ_BIN_3 +224 0x0405 //RX_FDEQ_BIN_4 +225 0x0506 //RX_FDEQ_BIN_5 +226 0x0708 //RX_FDEQ_BIN_6 +227 0x090A //RX_FDEQ_BIN_7 +228 0x0B0C //RX_FDEQ_BIN_8 +229 0x0D0E //RX_FDEQ_BIN_9 +230 0x1013 //RX_FDEQ_BIN_10 +231 0x1719 //RX_FDEQ_BIN_11 +232 0x1B1E //RX_FDEQ_BIN_12 +233 0x1E1E //RX_FDEQ_BIN_13 +234 0x1E28 //RX_FDEQ_BIN_14 +235 0x282C //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x4000 //RX_FDEQ_RESRV_0 +245 0x0320 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0030 //RX_FDDRC_BAND_MARGIN_1 +248 0x0050 //RX_FDDRC_BAND_MARGIN_2 +249 0x0080 //RX_FDDRC_BAND_MARGIN_3 +250 0x0007 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x5000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x6400 //RX_FDDRC_THRD_3_2 +258 0x6400 //RX_FDDRC_THRD_3_3 +259 0x2000 //RX_FDDRC_SLANT_0_0 +260 0x2000 //RX_FDDRC_SLANT_0_1 +261 0x2000 //RX_FDDRC_SLANT_0_2 +262 0x2000 //RX_FDDRC_SLANT_0_3 +263 0x5333 //RX_FDDRC_SLANT_1_0 +264 0x5333 //RX_FDDRC_SLANT_1_1 +265 0x5333 //RX_FDDRC_SLANT_1_2 +266 0x5333 //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +286 0x0100 //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 +#VOL 6 +163 0x3000 //RX_TDDRC_ALPHA_UP_1 +164 0x3000 //RX_TDDRC_ALPHA_UP_2 +165 0x3000 //RX_TDDRC_ALPHA_UP_3 +166 0x3000 //RX_TDDRC_ALPHA_UP_4 +184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +190 0x7FFF //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +269 0x0000 //RX_TDDRC_THRD_0 +270 0x0000 //RX_TDDRC_THRD_1 +271 0x7FFF //RX_TDDRC_THRD_2 +272 0x7FFF //RX_TDDRC_THRD_3 +273 0x7FFF //RX_TDDRC_SLANT_0 +274 0x7FFF //RX_TDDRC_SLANT_1 +275 0x3000 //RX_TDDRC_ALPHA_UP_0 +276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x199A //RX_TDDRC_HMNC_GAIN +279 0x0001 //RX_TDDRC_SMT_FLAG +280 0x0CCD //RX_TDDRC_SMT_W +281 0x0155 //RX_TDDRC_DRC_GAIN +195 0x0020 //RX_FDEQ_SUBNUM +196 0x4848 //RX_FDEQ_GAIN_0 +197 0x4848 //RX_FDEQ_GAIN_1 +198 0x4848 //RX_FDEQ_GAIN_2 +199 0x4848 //RX_FDEQ_GAIN_3 +200 0x4848 //RX_FDEQ_GAIN_4 +201 0x4848 //RX_FDEQ_GAIN_5 +202 0x4848 //RX_FDEQ_GAIN_6 +203 0x4848 //RX_FDEQ_GAIN_7 +204 0x4848 //RX_FDEQ_GAIN_8 +205 0x4848 //RX_FDEQ_GAIN_9 +206 0x4848 //RX_FDEQ_GAIN_10 +207 0x4848 //RX_FDEQ_GAIN_11 +208 0x4848 //RX_FDEQ_GAIN_12 +209 0x4848 //RX_FDEQ_GAIN_13 +210 0x4848 //RX_FDEQ_GAIN_14 +211 0x4848 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0202 //RX_FDEQ_BIN_0 +221 0x0203 //RX_FDEQ_BIN_1 +222 0x0303 //RX_FDEQ_BIN_2 +223 0x0304 //RX_FDEQ_BIN_3 +224 0x0405 //RX_FDEQ_BIN_4 +225 0x0506 //RX_FDEQ_BIN_5 +226 0x0708 //RX_FDEQ_BIN_6 +227 0x090A //RX_FDEQ_BIN_7 +228 0x0B0C //RX_FDEQ_BIN_8 +229 0x0D0E //RX_FDEQ_BIN_9 +230 0x1013 //RX_FDEQ_BIN_10 +231 0x1719 //RX_FDEQ_BIN_11 +232 0x1B1E //RX_FDEQ_BIN_12 +233 0x1E1E //RX_FDEQ_BIN_13 +234 0x1E28 //RX_FDEQ_BIN_14 +235 0x282C //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x4000 //RX_FDEQ_RESRV_0 +245 0x0320 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0030 //RX_FDDRC_BAND_MARGIN_1 +248 0x0050 //RX_FDDRC_BAND_MARGIN_2 +249 0x0080 //RX_FDDRC_BAND_MARGIN_3 +250 0x0007 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x5000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x6400 //RX_FDDRC_THRD_3_2 +258 0x6400 //RX_FDDRC_THRD_3_3 +259 0x2000 //RX_FDDRC_SLANT_0_0 +260 0x2000 //RX_FDDRC_SLANT_0_1 +261 0x2000 //RX_FDDRC_SLANT_0_2 +262 0x2000 //RX_FDDRC_SLANT_0_3 +263 0x5333 //RX_FDDRC_SLANT_1_0 +264 0x5333 //RX_FDDRC_SLANT_1_1 +265 0x5333 //RX_FDDRC_SLANT_1_2 +266 0x5333 //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +286 0x0100 //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 #CASE_NAME BLUETOOTH-BTNB-VOICE_GENERIC-FB -#PARAM_TYPE TX+RX -#TOTAL_CUSTOM_STEP 7 +#PARAM_MODE Full +#PARAM_TYPE TX+2RX +#TOTAL_CUSTOM_STEP 7+7 #TX 0 0x0009 //TX_OPERATION_MODE_0 1 0x0009 //TX_OPERATION_MODE_1 @@ -14282,10 +21619,10 @@ 248 0xF600 //TX_THR_SN_EST_6 249 0xF600 //TX_THR_SN_EST_7 250 0x0200 //TX_DELTA_THR_SN_EST_0 -251 0x0200 //TX_DELTA_THR_SN_EST_1 -252 0x0400 //TX_DELTA_THR_SN_EST_2 -253 0x0300 //TX_DELTA_THR_SN_EST_3 -254 0x0600 //TX_DELTA_THR_SN_EST_4 +251 0x0400 //TX_DELTA_THR_SN_EST_1 +252 0x0300 //TX_DELTA_THR_SN_EST_2 +253 0x0600 //TX_DELTA_THR_SN_EST_3 +254 0x0200 //TX_DELTA_THR_SN_EST_4 255 0x0200 //TX_DELTA_THR_SN_EST_5 256 0x0200 //TX_DELTA_THR_SN_EST_6 257 0x0200 //TX_DELTA_THR_SN_EST_7 @@ -14313,31 +21650,31 @@ 279 0x2000 //TX_B_POST_FLT_0 280 0x2000 //TX_B_POST_FLT_1 281 0x0012 //TX_NS_LVL_CTRL_0 -282 0x0019 //TX_NS_LVL_CTRL_1 +282 0x0016 //TX_NS_LVL_CTRL_1 283 0x0016 //TX_NS_LVL_CTRL_2 -284 0x0016 //TX_NS_LVL_CTRL_3 -285 0x0019 //TX_NS_LVL_CTRL_4 +284 0x0019 //TX_NS_LVL_CTRL_3 +285 0x0010 //TX_NS_LVL_CTRL_4 286 0x0010 //TX_NS_LVL_CTRL_5 -287 0x0010 //TX_NS_LVL_CTRL_6 +287 0x0019 //TX_NS_LVL_CTRL_6 288 0x0010 //TX_NS_LVL_CTRL_7 289 0x000C //TX_MIN_GAIN_S_0 -290 0x0011 //TX_MIN_GAIN_S_1 +290 0x000C //TX_MIN_GAIN_S_1 291 0x000C //TX_MIN_GAIN_S_2 -292 0x000C //TX_MIN_GAIN_S_3 -293 0x000F //TX_MIN_GAIN_S_4 +292 0x000F //TX_MIN_GAIN_S_3 +293 0x000C //TX_MIN_GAIN_S_4 294 0x000C //TX_MIN_GAIN_S_5 -295 0x000C //TX_MIN_GAIN_S_6 +295 0x0011 //TX_MIN_GAIN_S_6 296 0x000C //TX_MIN_GAIN_S_7 297 0x7FFF //TX_NMOS_SUP 298 0x0000 //TX_NS_MAX_PRI_SNR_TH 299 0x0000 //TX_NMOS_SUP_MENSA 300 0x7000 //TX_SNRI_SUP_0 -301 0x6000 //TX_SNRI_SUP_1 +301 0x7000 //TX_SNRI_SUP_1 302 0x7000 //TX_SNRI_SUP_2 -303 0x7000 //TX_SNRI_SUP_3 -304 0x6000 //TX_SNRI_SUP_4 +303 0x6000 //TX_SNRI_SUP_3 +304 0x7FFF //TX_SNRI_SUP_4 305 0x7FFF //TX_SNRI_SUP_5 -306 0x7FFF //TX_SNRI_SUP_6 +306 0x6000 //TX_SNRI_SUP_6 307 0x7FFF //TX_SNRI_SUP_7 308 0x7FFF //TX_THR_LFNS 309 0x0016 //TX_G_LFNS @@ -14354,8 +21691,8 @@ 320 0x6000 //TX_A_POST_FILT_S_6 321 0x6000 //TX_A_POST_FILT_S_7 322 0x2000 //TX_B_POST_FILT_0 -323 0x2000 //TX_B_POST_FILT_1 -324 0x4000 //TX_B_POST_FILT_2 +323 0x4000 //TX_B_POST_FILT_1 +324 0x2000 //TX_B_POST_FILT_2 325 0x2000 //TX_B_POST_FILT_3 326 0x2000 //TX_B_POST_FILT_4 327 0x2000 //TX_B_POST_FILT_5 @@ -14411,10 +21748,10 @@ 377 0x0000 //TX_NOISE_TH_5_4 378 0x02BC //TX_NOISE_TH_6 379 0x0020 //TX_MINENOISE_TH -380 0x4000 //TX_MINENOISE_MIC0_TH_MTS -381 0xFFEE //TX_MINENOISE_MIC0_TH_EXP -382 0x6000 //TX_MINENOISE_MIC0_S_TH_MTS -383 0xFFF3 //TX_MINENOISE_MIC0_S_TH_EXP +380 0x4000 //TX_MORENS_TFMASK_TH +381 0xFFEE //TX_DRC_QUIET_FLOOR +382 0x6000 //TX_RATIODTL_CUT_TH +383 0xFFF3 //TX_DT_CUT_K1 384 0x0666 //TX_OUT_ENER_S_TH_CLEAN 385 0x0666 //TX_OUT_ENER_S_TH_LESSCLEAN 386 0x0333 //TX_OUT_ENER_S_TH_NOISY @@ -14422,15 +21759,15 @@ 388 0x0333 //TX_OUT_ENER_TH_SPEECH 389 0x2000 //TX_SN_NPB_GAIN 390 0x0000 //TX_NN_NPB_GAIN -391 0x0000 //TX_CSX_ALPHA_0 -392 0x0000 //TX_CSX_ALPHA_1 -393 0x0000 //TX_CSX_ALPHA_2 -394 0x0000 //TX_CSX_ALPHA_3 -395 0x0800 //TX_MU_ARSP_EST -396 0x00C8 //TX_P_OUTBEAM_MIN_TH +391 0x0000 //TX_POST_MASK_SUP_HSNE +392 0x0000 //TX_TAIL_DET_TH +393 0x0000 //TX_B_LESSCUT_RTO_WTA +394 0x0000 //TX_MEL_G_R +395 0x0800 //TX_SUPHIGH_TH +396 0x00C8 //TX_MASK_G_R 397 0x0002 //TX_EXTRA_NS_L -398 0x0800 //TX_EXTRA_NS_A -399 0x0005 //TX_VR_NOISE_FLOOR_TH +398 0x0800 //TX_C_POST_FLT_MASK +399 0x0005 //TX_A_POST_FLT_WNS 400 0x0148 //TX_MIN_G_LOW300HZ 401 0x0002 //TX_MAXLEVEL_CNG 402 0x00B4 //TX_STN_NOISE_TH @@ -14545,16 +21882,16 @@ 511 0x6666 //TX_MIC_TO_BFGAIN 512 0x0000 //TX_MICTOBFGAIN0 513 0x0000 //TX_FASTMUE_TH -514 0x0000 //TX_DERVB_LEN_0 -515 0x0000 //TX_DERVB_LEN_1 -516 0x0000 //TX_RHO_DERVB -517 0x0000 //TX_MIC_INDX_DERVB -518 0x0000 //TX_MU_DERVB -519 0x0000 //TX_DR_RESRV_0 -520 0x0000 //TX_DR_RESRV_1 -521 0x0000 //TX_DR_RESRV_2 -522 0x0000 //TX_DR_RESRV_3 -523 0x0000 //TX_DR_RESRV_4 +514 0x0000 //TX_DEREVERB_LF_MU +515 0x0000 //TX_DEREVERB_HF_MU +516 0x0000 //TX_DEREVERB_DELAY +517 0x0000 //TX_DEREVERB_COEF_LEN +518 0x0000 //TX_DEREVERB_DNR +519 0x0000 //TX_DEREVERB_ALPHA +520 0x0000 //TX_DEREVERB_BETA +521 0x0000 //TX_GSC_RTOL_TH +522 0x0000 //TX_GSC_RTOH_TH +523 0x0000 //TX_WIDE2_MEANHTH 524 0x0000 //TX_DR_RESRV_5 525 0x0000 //TX_DR_RESRV_6 526 0x0000 //TX_DR_RESRV_7 @@ -14928,8 +22265,73 @@ 894 0xC000 //TX_FASTNS_SSA_THHFL 895 0xCCCC //TX_FASTNS_SSA_THLFH 896 0xD999 //TX_FASTNS_SSA_THHFH +897 0x0000 //TX_SENDFUNC_REG_MICMUTE +898 0x0000 //TX_SENDFUNC_REG_MICMUTE1 +899 0x0000 //TX_MICMUTE_RATIO_THR +900 0x0000 //TX_MICMUTE_AMP_THR +901 0x0000 //TX_MICMUTE_HPF_IND +902 0x0000 //TX_MICMUTE_LOG_EYR_TH +903 0x0000 //TX_MICMUTE_CVG_TIME +904 0x0000 //TX_MICMUTE_RELEASE_TIME +905 0x0000 //TX_MIC_VOLUME_MIC0MUTE +906 0x0000 //TX_MICMUTE_EPD_OFFSET_0 +907 0x0000 //TX_MICMUTE_FRQ_AEC_L +908 0x0000 //TX_MICMUTE_EAD_THR +909 0x0000 //TX_MICMUTE_LAMBDA_CB_NLE +910 0x0000 //TX_MICMUTE_LAMBDA_RE_EST +911 0x0000 //TX_DTD_THR1_MICMUTE_0 +912 0x0000 //TX_DTD_THR1_MICMUTE_1 +913 0x0000 //TX_DTD_THR1_MICMUTE_2 +914 0x0000 //TX_DTD_THR1_MICMUTE_3 +915 0x0000 //TX_DTD_THR2_MICMUTE_0 +916 0x0000 //TX_MICMUTE_MIN_EQ_RE_EST_0 +917 0x0000 //TX_MICMUTE_MIN_EQ_RE_EST_1 +918 0x0000 //TX_MICMUTE_MIN_EQ_RE_EST_2 +919 0x0000 //TX_MICMUTE_MIN_EQ_RE_EST_3 +920 0x0000 //TX_MICMUTE_MIN_EQ_RE_EST_4 +921 0x0000 //TX_MICMUTE_C_POST_FLT +922 0x0000 //TX_MICMUTE_DT_CUT_K +923 0x0000 //TX_MICMUTE_DT_CUT_THR +924 0x0000 //TX_MICMUTE_DT_CUT_K2 +925 0x0000 //TX_MICMUTE_DT_CUT_THR2 +926 0x0000 //TX_MICMUTE_DT2_HOLD_N +927 0x0000 //TX_MICMUTE_RATIODTH_THCUT +928 0x0000 //TX_MICMUTE_B_POST_FLT_ECHOL +929 0x0000 //TX_MICMUTE_B_POST_FLT_ECHOH +930 0x0000 //TX_MICMUTE_C_POST_FLT_MASK +931 0x0000 //TX_MICMUTE_RATIODTL_CUT_TH +932 0x0000 //TX_MICMUTE_DT_CUT_K1 +933 0x0000 //TX_MICMUTE_N2_SN_EST +934 0x0000 //TX_MICMUTE_THR_SN_EST_0 +935 0x0000 //TX_MICMUTE_MIN_G_CTRL_0 +936 0x0000 //TX_MICMUTE_A_POST_FILT_S_0 +937 0x0000 //TX_MICMUTE_B_POST_FILT_0 +938 0x0000 //TX_MIC1RUB_AMP_THR +939 0x0000 //TX_MIC1MUTE_RATIO_THR +940 0x0000 //TX_MIC1MUTE_AMP_THR +941 0x0000 //TX_MIC1MUTE_CVG_TIME +942 0x0000 //TX_MIC1MUTE_RELEASE_TIME +943 0x0000 //TX_AMS_RESRV_01 +944 0x0000 //TX_AMS_RESRV_02 +945 0x0000 //TX_AMS_RESRV_03 +946 0x0000 //TX_AMS_RESRV_04 +947 0x0000 //TX_AMS_RESRV_05 +948 0x0000 //TX_AMS_RESRV_06 +949 0x0000 //TX_AMS_RESRV_07 +950 0x0000 //TX_AMS_RESRV_08 +951 0x0000 //TX_AMS_RESRV_09 +952 0x0000 //TX_AMS_RESRV_10 +953 0x0000 //TX_AMS_RESRV_11 +954 0x0000 //TX_AMS_RESRV_12 +955 0x0000 //TX_AMS_RESRV_13 +956 0x0000 //TX_AMS_RESRV_14 +957 0x0000 //TX_AMS_RESRV_15 +958 0x0000 //TX_AMS_RESRV_16 +959 0x0000 //TX_AMS_RESRV_17 +960 0x0000 //TX_AMS_RESRV_18 +961 0x0000 //TX_AMS_RESRV_19 #RX -0 0x0064 //RX_RECVFUNC_MODE_0 +0 0x2064 //RX_RECVFUNC_MODE_0 1 0x0000 //RX_RECVFUNC_MODE_1 2 0x0004 //RX_SAMPLINGFREQ_SIG 3 0x0004 //RX_SAMPLINGFREQ_PROC @@ -15779,10 +23181,862 @@ 110 0x0000 //RX_FDDRC_RESRV_0 129 0x0100 //RX_SPK_VOL 130 0x0000 //RX_VOL_RESRV_0 +#RX 2 +157 0x0064 //RX_RECVFUNC_MODE_0 +158 0x0000 //RX_RECVFUNC_MODE_1 +159 0x0004 //RX_SAMPLINGFREQ_SIG +160 0x0004 //RX_SAMPLINGFREQ_PROC +161 0x000A //RX_FRAME_SZ +162 0x0000 //RX_DELAY_OPT +163 0x1000 //RX_TDDRC_ALPHA_UP_1 +164 0x1000 //RX_TDDRC_ALPHA_UP_2 +165 0x1000 //RX_TDDRC_ALPHA_UP_3 +166 0x1000 //RX_TDDRC_ALPHA_UP_4 +167 0x0800 //RX_PGA +168 0x7FFF //RX_A_HP +169 0x4000 //RX_B_PE +170 0x7800 //RX_THR_PITCH_DET_0 +171 0x7000 //RX_THR_PITCH_DET_1 +172 0x6000 //RX_THR_PITCH_DET_2 +173 0x0008 //RX_PITCH_BFR_LEN +174 0x0003 //RX_SBD_PITCH_DET +175 0x0100 //RX_PP_RESRV_0 +176 0x0020 //RX_PP_RESRV_1 +177 0x0500 //RX_N_SN_EST +178 0x000C //RX_N2_SN_EST +179 0x000A //RX_NS_LVL_CTRL +180 0xF600 //RX_THR_SN_EST +181 0x7000 //RX_LAMBDA_PFILT +182 0x000A //RX_FENS_RESRV_0 +183 0x0190 //RX_FENS_RESRV_1 +184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +187 0x0002 //RX_EXTRA_NS_L +188 0x0800 //RX_EXTRA_NS_A +189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +190 0x7FFF //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +192 0x199A //RX_A_POST_FLT +193 0x0000 //RX_LMT_THRD +194 0x4000 //RX_LMT_ALPHA +195 0x0020 //RX_FDEQ_SUBNUM +196 0x4848 //RX_FDEQ_GAIN_0 +197 0x4848 //RX_FDEQ_GAIN_1 +198 0x4848 //RX_FDEQ_GAIN_2 +199 0x4848 //RX_FDEQ_GAIN_3 +200 0x4848 //RX_FDEQ_GAIN_4 +201 0x4848 //RX_FDEQ_GAIN_5 +202 0x4848 //RX_FDEQ_GAIN_6 +203 0x4848 //RX_FDEQ_GAIN_7 +204 0x4848 //RX_FDEQ_GAIN_8 +205 0x4848 //RX_FDEQ_GAIN_9 +206 0x4848 //RX_FDEQ_GAIN_10 +207 0x4848 //RX_FDEQ_GAIN_11 +208 0x4848 //RX_FDEQ_GAIN_12 +209 0x4848 //RX_FDEQ_GAIN_13 +210 0x4848 //RX_FDEQ_GAIN_14 +211 0x4848 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0202 //RX_FDEQ_BIN_0 +221 0x0203 //RX_FDEQ_BIN_1 +222 0x0304 //RX_FDEQ_BIN_2 +223 0x0405 //RX_FDEQ_BIN_3 +224 0x0607 //RX_FDEQ_BIN_4 +225 0x0809 //RX_FDEQ_BIN_5 +226 0x0A0B //RX_FDEQ_BIN_6 +227 0x0C0D //RX_FDEQ_BIN_7 +228 0x0E0F //RX_FDEQ_BIN_8 +229 0x1011 //RX_FDEQ_BIN_9 +230 0x1214 //RX_FDEQ_BIN_10 +231 0x1618 //RX_FDEQ_BIN_11 +232 0x1C1C //RX_FDEQ_BIN_12 +233 0x2020 //RX_FDEQ_BIN_13 +234 0x2020 //RX_FDEQ_BIN_14 +235 0x2011 //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x4000 //RX_FDEQ_RESRV_0 +245 0x0320 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0030 //RX_FDDRC_BAND_MARGIN_1 +248 0x0050 //RX_FDDRC_BAND_MARGIN_2 +249 0x0080 //RX_FDDRC_BAND_MARGIN_3 +250 0x0007 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x5000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x6400 //RX_FDDRC_THRD_3_2 +258 0x6400 //RX_FDDRC_THRD_3_3 +259 0x2000 //RX_FDDRC_SLANT_0_0 +260 0x2000 //RX_FDDRC_SLANT_0_1 +261 0x2000 //RX_FDDRC_SLANT_0_2 +262 0x2000 //RX_FDDRC_SLANT_0_3 +263 0x5333 //RX_FDDRC_SLANT_1_0 +264 0x5333 //RX_FDDRC_SLANT_1_1 +265 0x5333 //RX_FDDRC_SLANT_1_2 +266 0x5333 //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +268 0x0000 //RX_FILTINDX +269 0x0000 //RX_TDDRC_THRD_0 +270 0x0000 //RX_TDDRC_THRD_1 +271 0x7FFF //RX_TDDRC_THRD_2 +272 0x7FFF //RX_TDDRC_THRD_3 +273 0x7FFF //RX_TDDRC_SLANT_0 +274 0x7FFF //RX_TDDRC_SLANT_1 +275 0x1000 //RX_TDDRC_ALPHA_UP_0 +276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x199A //RX_TDDRC_HMNC_GAIN +279 0x0001 //RX_TDDRC_SMT_FLAG +280 0x0CCD //RX_TDDRC_SMT_W +281 0x0155 //RX_TDDRC_DRC_GAIN +282 0x7C00 //RX_LAMBDA_PKA_FP +283 0x2000 //RX_TPKA_FP +284 0x2000 //RX_MIN_G_FP +285 0x0080 //RX_MAX_G_FP +286 0x0100 //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 +288 0x0000 //RX_MAXLEVEL_CNG +289 0x3000 //RX_BWE_UV_TH +290 0x3000 //RX_BWE_UV_TH2 +291 0x1800 //RX_BWE_UV_TH3 +292 0x1000 //RX_BWE_V_TH +293 0x04CD //RX_BWE_GAIN1_V_TH1 +294 0x0F33 //RX_BWE_GAIN1_V_TH2 +295 0x7333 //RX_BWE_UV_EQ +296 0x199A //RX_BWE_V_EQ +297 0x7333 //RX_BWE_TONE_TH +298 0x0004 //RX_BWE_UV_HOLD_T +299 0x6CCD //RX_BWE_GAIN2_ALPHA +300 0x799A //RX_BWE_GAIN3_ALPHA +301 0x001E //RX_BWE_CUTOFF +302 0x3000 //RX_BWE_GAINFILL +303 0x3200 //RX_BWE_MAXTH_TONE +304 0x2000 //RX_BWE_EQ_0 +305 0x2000 //RX_BWE_EQ_1 +306 0x2000 //RX_BWE_EQ_2 +307 0x2000 //RX_BWE_EQ_3 +308 0x2000 //RX_BWE_EQ_4 +309 0x2000 //RX_BWE_EQ_5 +310 0x2000 //RX_BWE_EQ_6 +311 0x0000 //RX_BWE_RESRV_0 +312 0x0000 //RX_BWE_RESRV_1 +313 0x0000 //RX_BWE_RESRV_2 +#VOL 0 +163 0x1000 //RX_TDDRC_ALPHA_UP_1 +164 0x1000 //RX_TDDRC_ALPHA_UP_2 +165 0x1000 //RX_TDDRC_ALPHA_UP_3 +166 0x1000 //RX_TDDRC_ALPHA_UP_4 +184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +190 0x7FFF //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +269 0x0000 //RX_TDDRC_THRD_0 +270 0x0000 //RX_TDDRC_THRD_1 +271 0x7FFF //RX_TDDRC_THRD_2 +272 0x7FFF //RX_TDDRC_THRD_3 +273 0x7FFF //RX_TDDRC_SLANT_0 +274 0x7FFF //RX_TDDRC_SLANT_1 +275 0x1000 //RX_TDDRC_ALPHA_UP_0 +276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x199A //RX_TDDRC_HMNC_GAIN +279 0x0001 //RX_TDDRC_SMT_FLAG +280 0x0CCD //RX_TDDRC_SMT_W +281 0x0155 //RX_TDDRC_DRC_GAIN +195 0x0020 //RX_FDEQ_SUBNUM +196 0x4848 //RX_FDEQ_GAIN_0 +197 0x4848 //RX_FDEQ_GAIN_1 +198 0x4848 //RX_FDEQ_GAIN_2 +199 0x4848 //RX_FDEQ_GAIN_3 +200 0x4848 //RX_FDEQ_GAIN_4 +201 0x4848 //RX_FDEQ_GAIN_5 +202 0x4848 //RX_FDEQ_GAIN_6 +203 0x4848 //RX_FDEQ_GAIN_7 +204 0x4848 //RX_FDEQ_GAIN_8 +205 0x4848 //RX_FDEQ_GAIN_9 +206 0x4848 //RX_FDEQ_GAIN_10 +207 0x4848 //RX_FDEQ_GAIN_11 +208 0x4848 //RX_FDEQ_GAIN_12 +209 0x4848 //RX_FDEQ_GAIN_13 +210 0x4848 //RX_FDEQ_GAIN_14 +211 0x4848 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0202 //RX_FDEQ_BIN_0 +221 0x0203 //RX_FDEQ_BIN_1 +222 0x0304 //RX_FDEQ_BIN_2 +223 0x0405 //RX_FDEQ_BIN_3 +224 0x0607 //RX_FDEQ_BIN_4 +225 0x0809 //RX_FDEQ_BIN_5 +226 0x0A0B //RX_FDEQ_BIN_6 +227 0x0C0D //RX_FDEQ_BIN_7 +228 0x0E0F //RX_FDEQ_BIN_8 +229 0x1011 //RX_FDEQ_BIN_9 +230 0x1214 //RX_FDEQ_BIN_10 +231 0x1618 //RX_FDEQ_BIN_11 +232 0x1C1C //RX_FDEQ_BIN_12 +233 0x2020 //RX_FDEQ_BIN_13 +234 0x2020 //RX_FDEQ_BIN_14 +235 0x2011 //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x4000 //RX_FDEQ_RESRV_0 +245 0x0320 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0030 //RX_FDDRC_BAND_MARGIN_1 +248 0x0050 //RX_FDDRC_BAND_MARGIN_2 +249 0x0080 //RX_FDDRC_BAND_MARGIN_3 +250 0x0007 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x5000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x6400 //RX_FDDRC_THRD_3_2 +258 0x6400 //RX_FDDRC_THRD_3_3 +259 0x2000 //RX_FDDRC_SLANT_0_0 +260 0x2000 //RX_FDDRC_SLANT_0_1 +261 0x2000 //RX_FDDRC_SLANT_0_2 +262 0x2000 //RX_FDDRC_SLANT_0_3 +263 0x5333 //RX_FDDRC_SLANT_1_0 +264 0x5333 //RX_FDDRC_SLANT_1_1 +265 0x5333 //RX_FDDRC_SLANT_1_2 +266 0x5333 //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +286 0x0100 //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 +#VOL 1 +163 0x1000 //RX_TDDRC_ALPHA_UP_1 +164 0x1000 //RX_TDDRC_ALPHA_UP_2 +165 0x1000 //RX_TDDRC_ALPHA_UP_3 +166 0x1000 //RX_TDDRC_ALPHA_UP_4 +184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +190 0x7FFF //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +269 0x0000 //RX_TDDRC_THRD_0 +270 0x0000 //RX_TDDRC_THRD_1 +271 0x7FFF //RX_TDDRC_THRD_2 +272 0x7FFF //RX_TDDRC_THRD_3 +273 0x7FFF //RX_TDDRC_SLANT_0 +274 0x7FFF //RX_TDDRC_SLANT_1 +275 0x1000 //RX_TDDRC_ALPHA_UP_0 +276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x199A //RX_TDDRC_HMNC_GAIN +279 0x0001 //RX_TDDRC_SMT_FLAG +280 0x0CCD //RX_TDDRC_SMT_W +281 0x0155 //RX_TDDRC_DRC_GAIN +195 0x0020 //RX_FDEQ_SUBNUM +196 0x4848 //RX_FDEQ_GAIN_0 +197 0x4848 //RX_FDEQ_GAIN_1 +198 0x4848 //RX_FDEQ_GAIN_2 +199 0x4848 //RX_FDEQ_GAIN_3 +200 0x4848 //RX_FDEQ_GAIN_4 +201 0x4848 //RX_FDEQ_GAIN_5 +202 0x4848 //RX_FDEQ_GAIN_6 +203 0x4848 //RX_FDEQ_GAIN_7 +204 0x4848 //RX_FDEQ_GAIN_8 +205 0x4848 //RX_FDEQ_GAIN_9 +206 0x4848 //RX_FDEQ_GAIN_10 +207 0x4848 //RX_FDEQ_GAIN_11 +208 0x4848 //RX_FDEQ_GAIN_12 +209 0x4848 //RX_FDEQ_GAIN_13 +210 0x4848 //RX_FDEQ_GAIN_14 +211 0x4848 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0202 //RX_FDEQ_BIN_0 +221 0x0203 //RX_FDEQ_BIN_1 +222 0x0304 //RX_FDEQ_BIN_2 +223 0x0405 //RX_FDEQ_BIN_3 +224 0x0607 //RX_FDEQ_BIN_4 +225 0x0809 //RX_FDEQ_BIN_5 +226 0x0A0B //RX_FDEQ_BIN_6 +227 0x0C0D //RX_FDEQ_BIN_7 +228 0x0E0F //RX_FDEQ_BIN_8 +229 0x1011 //RX_FDEQ_BIN_9 +230 0x1214 //RX_FDEQ_BIN_10 +231 0x1618 //RX_FDEQ_BIN_11 +232 0x1C1C //RX_FDEQ_BIN_12 +233 0x2020 //RX_FDEQ_BIN_13 +234 0x2020 //RX_FDEQ_BIN_14 +235 0x2011 //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x4000 //RX_FDEQ_RESRV_0 +245 0x0320 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0030 //RX_FDDRC_BAND_MARGIN_1 +248 0x0050 //RX_FDDRC_BAND_MARGIN_2 +249 0x0080 //RX_FDDRC_BAND_MARGIN_3 +250 0x0007 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x5000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x6400 //RX_FDDRC_THRD_3_2 +258 0x6400 //RX_FDDRC_THRD_3_3 +259 0x2000 //RX_FDDRC_SLANT_0_0 +260 0x2000 //RX_FDDRC_SLANT_0_1 +261 0x2000 //RX_FDDRC_SLANT_0_2 +262 0x2000 //RX_FDDRC_SLANT_0_3 +263 0x5333 //RX_FDDRC_SLANT_1_0 +264 0x5333 //RX_FDDRC_SLANT_1_1 +265 0x5333 //RX_FDDRC_SLANT_1_2 +266 0x5333 //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +286 0x0100 //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 +#VOL 2 +163 0x1000 //RX_TDDRC_ALPHA_UP_1 +164 0x1000 //RX_TDDRC_ALPHA_UP_2 +165 0x1000 //RX_TDDRC_ALPHA_UP_3 +166 0x1000 //RX_TDDRC_ALPHA_UP_4 +184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +190 0x7FFF //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +269 0x0000 //RX_TDDRC_THRD_0 +270 0x0000 //RX_TDDRC_THRD_1 +271 0x7FFF //RX_TDDRC_THRD_2 +272 0x7FFF //RX_TDDRC_THRD_3 +273 0x7FFF //RX_TDDRC_SLANT_0 +274 0x7FFF //RX_TDDRC_SLANT_1 +275 0x1000 //RX_TDDRC_ALPHA_UP_0 +276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x199A //RX_TDDRC_HMNC_GAIN +279 0x0001 //RX_TDDRC_SMT_FLAG +280 0x0CCD //RX_TDDRC_SMT_W +281 0x0155 //RX_TDDRC_DRC_GAIN +195 0x0020 //RX_FDEQ_SUBNUM +196 0x4848 //RX_FDEQ_GAIN_0 +197 0x4848 //RX_FDEQ_GAIN_1 +198 0x4848 //RX_FDEQ_GAIN_2 +199 0x4848 //RX_FDEQ_GAIN_3 +200 0x4848 //RX_FDEQ_GAIN_4 +201 0x4848 //RX_FDEQ_GAIN_5 +202 0x4848 //RX_FDEQ_GAIN_6 +203 0x4848 //RX_FDEQ_GAIN_7 +204 0x4848 //RX_FDEQ_GAIN_8 +205 0x4848 //RX_FDEQ_GAIN_9 +206 0x4848 //RX_FDEQ_GAIN_10 +207 0x4848 //RX_FDEQ_GAIN_11 +208 0x4848 //RX_FDEQ_GAIN_12 +209 0x4848 //RX_FDEQ_GAIN_13 +210 0x4848 //RX_FDEQ_GAIN_14 +211 0x4848 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0202 //RX_FDEQ_BIN_0 +221 0x0203 //RX_FDEQ_BIN_1 +222 0x0304 //RX_FDEQ_BIN_2 +223 0x0405 //RX_FDEQ_BIN_3 +224 0x0607 //RX_FDEQ_BIN_4 +225 0x0809 //RX_FDEQ_BIN_5 +226 0x0A0B //RX_FDEQ_BIN_6 +227 0x0C0D //RX_FDEQ_BIN_7 +228 0x0E0F //RX_FDEQ_BIN_8 +229 0x1011 //RX_FDEQ_BIN_9 +230 0x1214 //RX_FDEQ_BIN_10 +231 0x1618 //RX_FDEQ_BIN_11 +232 0x1C1C //RX_FDEQ_BIN_12 +233 0x2020 //RX_FDEQ_BIN_13 +234 0x2020 //RX_FDEQ_BIN_14 +235 0x2011 //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x4000 //RX_FDEQ_RESRV_0 +245 0x0320 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0030 //RX_FDDRC_BAND_MARGIN_1 +248 0x0050 //RX_FDDRC_BAND_MARGIN_2 +249 0x0080 //RX_FDDRC_BAND_MARGIN_3 +250 0x0007 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x5000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x6400 //RX_FDDRC_THRD_3_2 +258 0x6400 //RX_FDDRC_THRD_3_3 +259 0x2000 //RX_FDDRC_SLANT_0_0 +260 0x2000 //RX_FDDRC_SLANT_0_1 +261 0x2000 //RX_FDDRC_SLANT_0_2 +262 0x2000 //RX_FDDRC_SLANT_0_3 +263 0x5333 //RX_FDDRC_SLANT_1_0 +264 0x5333 //RX_FDDRC_SLANT_1_1 +265 0x5333 //RX_FDDRC_SLANT_1_2 +266 0x5333 //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +286 0x0100 //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 +#VOL 3 +163 0x1000 //RX_TDDRC_ALPHA_UP_1 +164 0x1000 //RX_TDDRC_ALPHA_UP_2 +165 0x1000 //RX_TDDRC_ALPHA_UP_3 +166 0x1000 //RX_TDDRC_ALPHA_UP_4 +184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +190 0x7FFF //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +269 0x0000 //RX_TDDRC_THRD_0 +270 0x0000 //RX_TDDRC_THRD_1 +271 0x7FFF //RX_TDDRC_THRD_2 +272 0x7FFF //RX_TDDRC_THRD_3 +273 0x7FFF //RX_TDDRC_SLANT_0 +274 0x7FFF //RX_TDDRC_SLANT_1 +275 0x1000 //RX_TDDRC_ALPHA_UP_0 +276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x199A //RX_TDDRC_HMNC_GAIN +279 0x0001 //RX_TDDRC_SMT_FLAG +280 0x0CCD //RX_TDDRC_SMT_W +281 0x0155 //RX_TDDRC_DRC_GAIN +195 0x0020 //RX_FDEQ_SUBNUM +196 0x4848 //RX_FDEQ_GAIN_0 +197 0x4848 //RX_FDEQ_GAIN_1 +198 0x4848 //RX_FDEQ_GAIN_2 +199 0x4848 //RX_FDEQ_GAIN_3 +200 0x4848 //RX_FDEQ_GAIN_4 +201 0x4848 //RX_FDEQ_GAIN_5 +202 0x4848 //RX_FDEQ_GAIN_6 +203 0x4848 //RX_FDEQ_GAIN_7 +204 0x4848 //RX_FDEQ_GAIN_8 +205 0x4848 //RX_FDEQ_GAIN_9 +206 0x4848 //RX_FDEQ_GAIN_10 +207 0x4848 //RX_FDEQ_GAIN_11 +208 0x4848 //RX_FDEQ_GAIN_12 +209 0x4848 //RX_FDEQ_GAIN_13 +210 0x4848 //RX_FDEQ_GAIN_14 +211 0x4848 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0202 //RX_FDEQ_BIN_0 +221 0x0203 //RX_FDEQ_BIN_1 +222 0x0304 //RX_FDEQ_BIN_2 +223 0x0405 //RX_FDEQ_BIN_3 +224 0x0607 //RX_FDEQ_BIN_4 +225 0x0809 //RX_FDEQ_BIN_5 +226 0x0A0B //RX_FDEQ_BIN_6 +227 0x0C0D //RX_FDEQ_BIN_7 +228 0x0E0F //RX_FDEQ_BIN_8 +229 0x1011 //RX_FDEQ_BIN_9 +230 0x1214 //RX_FDEQ_BIN_10 +231 0x1618 //RX_FDEQ_BIN_11 +232 0x1C1C //RX_FDEQ_BIN_12 +233 0x2020 //RX_FDEQ_BIN_13 +234 0x2020 //RX_FDEQ_BIN_14 +235 0x2011 //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x4000 //RX_FDEQ_RESRV_0 +245 0x0320 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0030 //RX_FDDRC_BAND_MARGIN_1 +248 0x0050 //RX_FDDRC_BAND_MARGIN_2 +249 0x0080 //RX_FDDRC_BAND_MARGIN_3 +250 0x0007 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x5000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x6400 //RX_FDDRC_THRD_3_2 +258 0x6400 //RX_FDDRC_THRD_3_3 +259 0x2000 //RX_FDDRC_SLANT_0_0 +260 0x2000 //RX_FDDRC_SLANT_0_1 +261 0x2000 //RX_FDDRC_SLANT_0_2 +262 0x2000 //RX_FDDRC_SLANT_0_3 +263 0x5333 //RX_FDDRC_SLANT_1_0 +264 0x5333 //RX_FDDRC_SLANT_1_1 +265 0x5333 //RX_FDDRC_SLANT_1_2 +266 0x5333 //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +286 0x0100 //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 +#VOL 4 +163 0x1000 //RX_TDDRC_ALPHA_UP_1 +164 0x1000 //RX_TDDRC_ALPHA_UP_2 +165 0x1000 //RX_TDDRC_ALPHA_UP_3 +166 0x1000 //RX_TDDRC_ALPHA_UP_4 +184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +190 0x7FFF //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +269 0x0000 //RX_TDDRC_THRD_0 +270 0x0000 //RX_TDDRC_THRD_1 +271 0x7FFF //RX_TDDRC_THRD_2 +272 0x7FFF //RX_TDDRC_THRD_3 +273 0x7FFF //RX_TDDRC_SLANT_0 +274 0x7FFF //RX_TDDRC_SLANT_1 +275 0x1000 //RX_TDDRC_ALPHA_UP_0 +276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x199A //RX_TDDRC_HMNC_GAIN +279 0x0001 //RX_TDDRC_SMT_FLAG +280 0x0CCD //RX_TDDRC_SMT_W +281 0x0155 //RX_TDDRC_DRC_GAIN +195 0x0020 //RX_FDEQ_SUBNUM +196 0x4848 //RX_FDEQ_GAIN_0 +197 0x4848 //RX_FDEQ_GAIN_1 +198 0x4848 //RX_FDEQ_GAIN_2 +199 0x4848 //RX_FDEQ_GAIN_3 +200 0x4848 //RX_FDEQ_GAIN_4 +201 0x4848 //RX_FDEQ_GAIN_5 +202 0x4848 //RX_FDEQ_GAIN_6 +203 0x4848 //RX_FDEQ_GAIN_7 +204 0x4848 //RX_FDEQ_GAIN_8 +205 0x4848 //RX_FDEQ_GAIN_9 +206 0x4848 //RX_FDEQ_GAIN_10 +207 0x4848 //RX_FDEQ_GAIN_11 +208 0x4848 //RX_FDEQ_GAIN_12 +209 0x4848 //RX_FDEQ_GAIN_13 +210 0x4848 //RX_FDEQ_GAIN_14 +211 0x4848 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0202 //RX_FDEQ_BIN_0 +221 0x0203 //RX_FDEQ_BIN_1 +222 0x0304 //RX_FDEQ_BIN_2 +223 0x0405 //RX_FDEQ_BIN_3 +224 0x0607 //RX_FDEQ_BIN_4 +225 0x0809 //RX_FDEQ_BIN_5 +226 0x0A0B //RX_FDEQ_BIN_6 +227 0x0C0D //RX_FDEQ_BIN_7 +228 0x0E0F //RX_FDEQ_BIN_8 +229 0x1011 //RX_FDEQ_BIN_9 +230 0x1214 //RX_FDEQ_BIN_10 +231 0x1618 //RX_FDEQ_BIN_11 +232 0x1C1C //RX_FDEQ_BIN_12 +233 0x2020 //RX_FDEQ_BIN_13 +234 0x2020 //RX_FDEQ_BIN_14 +235 0x2011 //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x4000 //RX_FDEQ_RESRV_0 +245 0x0320 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0030 //RX_FDDRC_BAND_MARGIN_1 +248 0x0050 //RX_FDDRC_BAND_MARGIN_2 +249 0x0080 //RX_FDDRC_BAND_MARGIN_3 +250 0x0007 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x5000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x6400 //RX_FDDRC_THRD_3_2 +258 0x6400 //RX_FDDRC_THRD_3_3 +259 0x2000 //RX_FDDRC_SLANT_0_0 +260 0x2000 //RX_FDDRC_SLANT_0_1 +261 0x2000 //RX_FDDRC_SLANT_0_2 +262 0x2000 //RX_FDDRC_SLANT_0_3 +263 0x5333 //RX_FDDRC_SLANT_1_0 +264 0x5333 //RX_FDDRC_SLANT_1_1 +265 0x5333 //RX_FDDRC_SLANT_1_2 +266 0x5333 //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +286 0x0100 //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 +#VOL 5 +163 0x1000 //RX_TDDRC_ALPHA_UP_1 +164 0x1000 //RX_TDDRC_ALPHA_UP_2 +165 0x1000 //RX_TDDRC_ALPHA_UP_3 +166 0x1000 //RX_TDDRC_ALPHA_UP_4 +184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +190 0x7FFF //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +269 0x0000 //RX_TDDRC_THRD_0 +270 0x0000 //RX_TDDRC_THRD_1 +271 0x7FFF //RX_TDDRC_THRD_2 +272 0x7FFF //RX_TDDRC_THRD_3 +273 0x7FFF //RX_TDDRC_SLANT_0 +274 0x7FFF //RX_TDDRC_SLANT_1 +275 0x1000 //RX_TDDRC_ALPHA_UP_0 +276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x199A //RX_TDDRC_HMNC_GAIN +279 0x0001 //RX_TDDRC_SMT_FLAG +280 0x0CCD //RX_TDDRC_SMT_W +281 0x0155 //RX_TDDRC_DRC_GAIN +195 0x0020 //RX_FDEQ_SUBNUM +196 0x4848 //RX_FDEQ_GAIN_0 +197 0x4848 //RX_FDEQ_GAIN_1 +198 0x4848 //RX_FDEQ_GAIN_2 +199 0x4848 //RX_FDEQ_GAIN_3 +200 0x4848 //RX_FDEQ_GAIN_4 +201 0x4848 //RX_FDEQ_GAIN_5 +202 0x4848 //RX_FDEQ_GAIN_6 +203 0x4848 //RX_FDEQ_GAIN_7 +204 0x4848 //RX_FDEQ_GAIN_8 +205 0x4848 //RX_FDEQ_GAIN_9 +206 0x4848 //RX_FDEQ_GAIN_10 +207 0x4848 //RX_FDEQ_GAIN_11 +208 0x4848 //RX_FDEQ_GAIN_12 +209 0x4848 //RX_FDEQ_GAIN_13 +210 0x4848 //RX_FDEQ_GAIN_14 +211 0x4848 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0202 //RX_FDEQ_BIN_0 +221 0x0203 //RX_FDEQ_BIN_1 +222 0x0304 //RX_FDEQ_BIN_2 +223 0x0405 //RX_FDEQ_BIN_3 +224 0x0607 //RX_FDEQ_BIN_4 +225 0x0809 //RX_FDEQ_BIN_5 +226 0x0A0B //RX_FDEQ_BIN_6 +227 0x0C0D //RX_FDEQ_BIN_7 +228 0x0E0F //RX_FDEQ_BIN_8 +229 0x1011 //RX_FDEQ_BIN_9 +230 0x1214 //RX_FDEQ_BIN_10 +231 0x1618 //RX_FDEQ_BIN_11 +232 0x1C1C //RX_FDEQ_BIN_12 +233 0x2020 //RX_FDEQ_BIN_13 +234 0x2020 //RX_FDEQ_BIN_14 +235 0x2011 //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x4000 //RX_FDEQ_RESRV_0 +245 0x0320 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0030 //RX_FDDRC_BAND_MARGIN_1 +248 0x0050 //RX_FDDRC_BAND_MARGIN_2 +249 0x0080 //RX_FDDRC_BAND_MARGIN_3 +250 0x0007 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x5000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x6400 //RX_FDDRC_THRD_3_2 +258 0x6400 //RX_FDDRC_THRD_3_3 +259 0x2000 //RX_FDDRC_SLANT_0_0 +260 0x2000 //RX_FDDRC_SLANT_0_1 +261 0x2000 //RX_FDDRC_SLANT_0_2 +262 0x2000 //RX_FDDRC_SLANT_0_3 +263 0x5333 //RX_FDDRC_SLANT_1_0 +264 0x5333 //RX_FDDRC_SLANT_1_1 +265 0x5333 //RX_FDDRC_SLANT_1_2 +266 0x5333 //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +286 0x0100 //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 +#VOL 6 +163 0x1000 //RX_TDDRC_ALPHA_UP_1 +164 0x1000 //RX_TDDRC_ALPHA_UP_2 +165 0x1000 //RX_TDDRC_ALPHA_UP_3 +166 0x1000 //RX_TDDRC_ALPHA_UP_4 +184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +190 0x7FFF //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +269 0x0000 //RX_TDDRC_THRD_0 +270 0x0000 //RX_TDDRC_THRD_1 +271 0x7FFF //RX_TDDRC_THRD_2 +272 0x7FFF //RX_TDDRC_THRD_3 +273 0x7FFF //RX_TDDRC_SLANT_0 +274 0x7FFF //RX_TDDRC_SLANT_1 +275 0x1000 //RX_TDDRC_ALPHA_UP_0 +276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x199A //RX_TDDRC_HMNC_GAIN +279 0x0001 //RX_TDDRC_SMT_FLAG +280 0x0CCD //RX_TDDRC_SMT_W +281 0x0155 //RX_TDDRC_DRC_GAIN +195 0x0020 //RX_FDEQ_SUBNUM +196 0x4848 //RX_FDEQ_GAIN_0 +197 0x4848 //RX_FDEQ_GAIN_1 +198 0x4848 //RX_FDEQ_GAIN_2 +199 0x4848 //RX_FDEQ_GAIN_3 +200 0x4848 //RX_FDEQ_GAIN_4 +201 0x4848 //RX_FDEQ_GAIN_5 +202 0x4848 //RX_FDEQ_GAIN_6 +203 0x4848 //RX_FDEQ_GAIN_7 +204 0x4848 //RX_FDEQ_GAIN_8 +205 0x4848 //RX_FDEQ_GAIN_9 +206 0x4848 //RX_FDEQ_GAIN_10 +207 0x4848 //RX_FDEQ_GAIN_11 +208 0x4848 //RX_FDEQ_GAIN_12 +209 0x4848 //RX_FDEQ_GAIN_13 +210 0x4848 //RX_FDEQ_GAIN_14 +211 0x4848 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0202 //RX_FDEQ_BIN_0 +221 0x0203 //RX_FDEQ_BIN_1 +222 0x0304 //RX_FDEQ_BIN_2 +223 0x0405 //RX_FDEQ_BIN_3 +224 0x0607 //RX_FDEQ_BIN_4 +225 0x0809 //RX_FDEQ_BIN_5 +226 0x0A0B //RX_FDEQ_BIN_6 +227 0x0C0D //RX_FDEQ_BIN_7 +228 0x0E0F //RX_FDEQ_BIN_8 +229 0x1011 //RX_FDEQ_BIN_9 +230 0x1214 //RX_FDEQ_BIN_10 +231 0x1618 //RX_FDEQ_BIN_11 +232 0x1C1C //RX_FDEQ_BIN_12 +233 0x2020 //RX_FDEQ_BIN_13 +234 0x2020 //RX_FDEQ_BIN_14 +235 0x2011 //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x4000 //RX_FDEQ_RESRV_0 +245 0x0320 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0030 //RX_FDDRC_BAND_MARGIN_1 +248 0x0050 //RX_FDDRC_BAND_MARGIN_2 +249 0x0080 //RX_FDDRC_BAND_MARGIN_3 +250 0x0007 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x5000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x6400 //RX_FDDRC_THRD_3_2 +258 0x6400 //RX_FDDRC_THRD_3_3 +259 0x2000 //RX_FDDRC_SLANT_0_0 +260 0x2000 //RX_FDDRC_SLANT_0_1 +261 0x2000 //RX_FDDRC_SLANT_0_2 +262 0x2000 //RX_FDDRC_SLANT_0_3 +263 0x5333 //RX_FDDRC_SLANT_1_0 +264 0x5333 //RX_FDDRC_SLANT_1_1 +265 0x5333 //RX_FDDRC_SLANT_1_2 +266 0x5333 //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +286 0x0100 //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 #CASE_NAME BLUETOOTH-BTNB_NREC-VOICE_GENERIC-NB -#PARAM_TYPE TX+RX -#TOTAL_CUSTOM_STEP 7 +#PARAM_MODE Full +#PARAM_TYPE TX+2RX +#TOTAL_CUSTOM_STEP 7+7 #TX 0 0x0008 //TX_OPERATION_MODE_0 1 0x0008 //TX_OPERATION_MODE_1 @@ -16035,20 +24289,20 @@ 248 0xF400 //TX_THR_SN_EST_6 249 0xF600 //TX_THR_SN_EST_7 250 0x0000 //TX_DELTA_THR_SN_EST_0 -251 0x0000 //TX_DELTA_THR_SN_EST_1 +251 0x0200 //TX_DELTA_THR_SN_EST_1 252 0x0200 //TX_DELTA_THR_SN_EST_2 253 0x0200 //TX_DELTA_THR_SN_EST_3 254 0x0200 //TX_DELTA_THR_SN_EST_4 255 0x0200 //TX_DELTA_THR_SN_EST_5 -256 0x0200 //TX_DELTA_THR_SN_EST_6 +256 0x0000 //TX_DELTA_THR_SN_EST_6 257 0x0200 //TX_DELTA_THR_SN_EST_7 258 0x6000 //TX_LAMBDA_NN_EST_0 -259 0x6000 //TX_LAMBDA_NN_EST_1 +259 0x4000 //TX_LAMBDA_NN_EST_1 260 0x4000 //TX_LAMBDA_NN_EST_2 261 0x4000 //TX_LAMBDA_NN_EST_3 262 0x4000 //TX_LAMBDA_NN_EST_4 263 0x4000 //TX_LAMBDA_NN_EST_5 -264 0x4000 //TX_LAMBDA_NN_EST_6 +264 0x6000 //TX_LAMBDA_NN_EST_6 265 0x4000 //TX_LAMBDA_NN_EST_7 266 0x0400 //TX_N_SN_EST 267 0x001E //TX_INBEAM_T @@ -16066,16 +24320,16 @@ 279 0x1000 //TX_B_POST_FLT_0 280 0x1000 //TX_B_POST_FLT_1 281 0x000F //TX_NS_LVL_CTRL_0 -282 0x000F //TX_NS_LVL_CTRL_1 -283 0x0011 //TX_NS_LVL_CTRL_2 +282 0x0011 //TX_NS_LVL_CTRL_1 +283 0x000F //TX_NS_LVL_CTRL_2 284 0x000F //TX_NS_LVL_CTRL_3 285 0x000F //TX_NS_LVL_CTRL_4 286 0x000F //TX_NS_LVL_CTRL_5 287 0x000F //TX_NS_LVL_CTRL_6 288 0x0011 //TX_NS_LVL_CTRL_7 289 0x000C //TX_MIN_GAIN_S_0 -290 0x000C //TX_MIN_GAIN_S_1 -291 0x000F //TX_MIN_GAIN_S_2 +290 0x000F //TX_MIN_GAIN_S_1 +291 0x000C //TX_MIN_GAIN_S_2 292 0x000C //TX_MIN_GAIN_S_3 293 0x000C //TX_MIN_GAIN_S_4 294 0x000C //TX_MIN_GAIN_S_5 @@ -16099,12 +24353,12 @@ 312 0x7FFF //TX_A_POST_FILT_0 313 0x2000 //TX_A_POST_FILT_1 314 0x4000 //TX_A_POST_FILT_S_0 -315 0x4000 //TX_A_POST_FILT_S_1 +315 0x5000 //TX_A_POST_FILT_S_1 316 0x5000 //TX_A_POST_FILT_S_2 317 0x5000 //TX_A_POST_FILT_S_3 318 0x5000 //TX_A_POST_FILT_S_4 319 0x5000 //TX_A_POST_FILT_S_5 -320 0x5000 //TX_A_POST_FILT_S_6 +320 0x4000 //TX_A_POST_FILT_S_6 321 0x5000 //TX_A_POST_FILT_S_7 322 0x1000 //TX_B_POST_FILT_0 323 0x1000 //TX_B_POST_FILT_1 @@ -16164,10 +24418,10 @@ 377 0x7FFF //TX_NOISE_TH_5_4 378 0x044C //TX_NOISE_TH_6 379 0x0014 //TX_MINENOISE_TH -380 0x4000 //TX_MINENOISE_MIC0_TH_MTS -381 0xFFEE //TX_MINENOISE_MIC0_TH_EXP -382 0x6000 //TX_MINENOISE_MIC0_S_TH_MTS -383 0xFFF3 //TX_MINENOISE_MIC0_S_TH_EXP +380 0x4000 //TX_MORENS_TFMASK_TH +381 0xFFEE //TX_DRC_QUIET_FLOOR +382 0x6000 //TX_RATIODTL_CUT_TH +383 0xFFF3 //TX_DT_CUT_K1 384 0x0666 //TX_OUT_ENER_S_TH_CLEAN 385 0x0666 //TX_OUT_ENER_S_TH_LESSCLEAN 386 0x0333 //TX_OUT_ENER_S_TH_NOISY @@ -16175,15 +24429,15 @@ 388 0x0333 //TX_OUT_ENER_TH_SPEECH 389 0x2000 //TX_SN_NPB_GAIN 390 0x0000 //TX_NN_NPB_GAIN -391 0x0000 //TX_CSX_ALPHA_0 -392 0x0000 //TX_CSX_ALPHA_1 -393 0x0000 //TX_CSX_ALPHA_2 -394 0x0000 //TX_CSX_ALPHA_3 -395 0x0800 //TX_MU_ARSP_EST -396 0x00C8 //TX_P_OUTBEAM_MIN_TH +391 0x0000 //TX_POST_MASK_SUP_HSNE +392 0x0000 //TX_TAIL_DET_TH +393 0x0000 //TX_B_LESSCUT_RTO_WTA +394 0x0000 //TX_MEL_G_R +395 0x0800 //TX_SUPHIGH_TH +396 0x00C8 //TX_MASK_G_R 397 0x0002 //TX_EXTRA_NS_L -398 0x0800 //TX_EXTRA_NS_A -399 0x0005 //TX_VR_NOISE_FLOOR_TH +398 0x0800 //TX_C_POST_FLT_MASK +399 0x0005 //TX_A_POST_FLT_WNS 400 0x0148 //TX_MIN_G_LOW300HZ 401 0x0002 //TX_MAXLEVEL_CNG 402 0x00B4 //TX_STN_NOISE_TH @@ -16298,16 +24552,16 @@ 511 0x6666 //TX_MIC_TO_BFGAIN 512 0x0000 //TX_MICTOBFGAIN0 513 0x0000 //TX_FASTMUE_TH -514 0x0000 //TX_DERVB_LEN_0 -515 0x0000 //TX_DERVB_LEN_1 -516 0x0000 //TX_RHO_DERVB -517 0x0000 //TX_MIC_INDX_DERVB -518 0x0000 //TX_MU_DERVB -519 0x0000 //TX_DR_RESRV_0 -520 0x0000 //TX_DR_RESRV_1 -521 0x0000 //TX_DR_RESRV_2 -522 0x0000 //TX_DR_RESRV_3 -523 0x0000 //TX_DR_RESRV_4 +514 0x0000 //TX_DEREVERB_LF_MU +515 0x0000 //TX_DEREVERB_HF_MU +516 0x0000 //TX_DEREVERB_DELAY +517 0x0000 //TX_DEREVERB_COEF_LEN +518 0x0000 //TX_DEREVERB_DNR +519 0x0000 //TX_DEREVERB_ALPHA +520 0x0000 //TX_DEREVERB_BETA +521 0x0000 //TX_GSC_RTOL_TH +522 0x0000 //TX_GSC_RTOH_TH +523 0x0000 //TX_WIDE2_MEANHTH 524 0x0000 //TX_DR_RESRV_5 525 0x0000 //TX_DR_RESRV_6 526 0x0000 //TX_DR_RESRV_7 @@ -16681,8 +24935,73 @@ 894 0xC000 //TX_FASTNS_SSA_THHFL 895 0xCCCC //TX_FASTNS_SSA_THLFH 896 0xD999 //TX_FASTNS_SSA_THHFH +897 0x0000 //TX_SENDFUNC_REG_MICMUTE +898 0x0000 //TX_SENDFUNC_REG_MICMUTE1 +899 0x0000 //TX_MICMUTE_RATIO_THR +900 0x0000 //TX_MICMUTE_AMP_THR +901 0x0000 //TX_MICMUTE_HPF_IND +902 0x0000 //TX_MICMUTE_LOG_EYR_TH +903 0x0000 //TX_MICMUTE_CVG_TIME +904 0x0000 //TX_MICMUTE_RELEASE_TIME +905 0x0000 //TX_MIC_VOLUME_MIC0MUTE +906 0x0000 //TX_MICMUTE_EPD_OFFSET_0 +907 0x0000 //TX_MICMUTE_FRQ_AEC_L +908 0x0000 //TX_MICMUTE_EAD_THR +909 0x0000 //TX_MICMUTE_LAMBDA_CB_NLE +910 0x0000 //TX_MICMUTE_LAMBDA_RE_EST +911 0x0000 //TX_DTD_THR1_MICMUTE_0 +912 0x0000 //TX_DTD_THR1_MICMUTE_1 +913 0x0000 //TX_DTD_THR1_MICMUTE_2 +914 0x0000 //TX_DTD_THR1_MICMUTE_3 +915 0x0000 //TX_DTD_THR2_MICMUTE_0 +916 0x0000 //TX_MICMUTE_MIN_EQ_RE_EST_0 +917 0x0000 //TX_MICMUTE_MIN_EQ_RE_EST_1 +918 0x0000 //TX_MICMUTE_MIN_EQ_RE_EST_2 +919 0x0000 //TX_MICMUTE_MIN_EQ_RE_EST_3 +920 0x0000 //TX_MICMUTE_MIN_EQ_RE_EST_4 +921 0x0000 //TX_MICMUTE_C_POST_FLT +922 0x0000 //TX_MICMUTE_DT_CUT_K +923 0x0000 //TX_MICMUTE_DT_CUT_THR +924 0x0000 //TX_MICMUTE_DT_CUT_K2 +925 0x0000 //TX_MICMUTE_DT_CUT_THR2 +926 0x0000 //TX_MICMUTE_DT2_HOLD_N +927 0x0000 //TX_MICMUTE_RATIODTH_THCUT +928 0x0000 //TX_MICMUTE_B_POST_FLT_ECHOL +929 0x0000 //TX_MICMUTE_B_POST_FLT_ECHOH +930 0x0000 //TX_MICMUTE_C_POST_FLT_MASK +931 0x0000 //TX_MICMUTE_RATIODTL_CUT_TH +932 0x0000 //TX_MICMUTE_DT_CUT_K1 +933 0x0000 //TX_MICMUTE_N2_SN_EST +934 0x0000 //TX_MICMUTE_THR_SN_EST_0 +935 0x0000 //TX_MICMUTE_MIN_G_CTRL_0 +936 0x0000 //TX_MICMUTE_A_POST_FILT_S_0 +937 0x0000 //TX_MICMUTE_B_POST_FILT_0 +938 0x0000 //TX_MIC1RUB_AMP_THR +939 0x0000 //TX_MIC1MUTE_RATIO_THR +940 0x0000 //TX_MIC1MUTE_AMP_THR +941 0x0000 //TX_MIC1MUTE_CVG_TIME +942 0x0000 //TX_MIC1MUTE_RELEASE_TIME +943 0x0000 //TX_AMS_RESRV_01 +944 0x0000 //TX_AMS_RESRV_02 +945 0x0000 //TX_AMS_RESRV_03 +946 0x0000 //TX_AMS_RESRV_04 +947 0x0000 //TX_AMS_RESRV_05 +948 0x0000 //TX_AMS_RESRV_06 +949 0x0000 //TX_AMS_RESRV_07 +950 0x0000 //TX_AMS_RESRV_08 +951 0x0000 //TX_AMS_RESRV_09 +952 0x0000 //TX_AMS_RESRV_10 +953 0x0000 //TX_AMS_RESRV_11 +954 0x0000 //TX_AMS_RESRV_12 +955 0x0000 //TX_AMS_RESRV_13 +956 0x0000 //TX_AMS_RESRV_14 +957 0x0000 //TX_AMS_RESRV_15 +958 0x0000 //TX_AMS_RESRV_16 +959 0x0000 //TX_AMS_RESRV_17 +960 0x0000 //TX_AMS_RESRV_18 +961 0x0000 //TX_AMS_RESRV_19 #RX -0 0x006C //RX_RECVFUNC_MODE_0 +0 0x206C //RX_RECVFUNC_MODE_0 1 0x0000 //RX_RECVFUNC_MODE_1 2 0x0000 //RX_SAMPLINGFREQ_SIG 3 0x0000 //RX_SAMPLINGFREQ_PROC @@ -17532,10 +25851,862 @@ 110 0x0000 //RX_FDDRC_RESRV_0 129 0x0100 //RX_SPK_VOL 130 0x0000 //RX_VOL_RESRV_0 +#RX 2 +157 0x206C //RX_RECVFUNC_MODE_0 +158 0x0000 //RX_RECVFUNC_MODE_1 +159 0x0000 //RX_SAMPLINGFREQ_SIG +160 0x0000 //RX_SAMPLINGFREQ_PROC +161 0x000A //RX_FRAME_SZ +162 0x0000 //RX_DELAY_OPT +163 0x3000 //RX_TDDRC_ALPHA_UP_1 +164 0x3000 //RX_TDDRC_ALPHA_UP_2 +165 0x3000 //RX_TDDRC_ALPHA_UP_3 +166 0x3000 //RX_TDDRC_ALPHA_UP_4 +167 0x0800 //RX_PGA +168 0x7FFF //RX_A_HP +169 0x0000 //RX_B_PE +170 0x3800 //RX_THR_PITCH_DET_0 +171 0x3000 //RX_THR_PITCH_DET_1 +172 0x2800 //RX_THR_PITCH_DET_2 +173 0x0008 //RX_PITCH_BFR_LEN +174 0x0003 //RX_SBD_PITCH_DET +175 0x0100 //RX_PP_RESRV_0 +176 0x0020 //RX_PP_RESRV_1 +177 0x0600 //RX_N_SN_EST +178 0x000C //RX_N2_SN_EST +179 0x0010 //RX_NS_LVL_CTRL +180 0xF800 //RX_THR_SN_EST +181 0x7CCD //RX_LAMBDA_PFILT +182 0x000A //RX_FENS_RESRV_0 +183 0x0190 //RX_FENS_RESRV_1 +184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +187 0x0002 //RX_EXTRA_NS_L +188 0x0800 //RX_EXTRA_NS_A +189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +190 0x7FFF //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +192 0x199A //RX_A_POST_FLT +193 0x0000 //RX_LMT_THRD +194 0x4000 //RX_LMT_ALPHA +195 0x0014 //RX_FDEQ_SUBNUM +196 0x4848 //RX_FDEQ_GAIN_0 +197 0x4848 //RX_FDEQ_GAIN_1 +198 0x4848 //RX_FDEQ_GAIN_2 +199 0x4848 //RX_FDEQ_GAIN_3 +200 0x4848 //RX_FDEQ_GAIN_4 +201 0x4848 //RX_FDEQ_GAIN_5 +202 0x4444 //RX_FDEQ_GAIN_6 +203 0x4040 //RX_FDEQ_GAIN_7 +204 0x4040 //RX_FDEQ_GAIN_8 +205 0x4040 //RX_FDEQ_GAIN_9 +206 0x4848 //RX_FDEQ_GAIN_10 +207 0x4848 //RX_FDEQ_GAIN_11 +208 0x4848 //RX_FDEQ_GAIN_12 +209 0x4848 //RX_FDEQ_GAIN_13 +210 0x4848 //RX_FDEQ_GAIN_14 +211 0x4848 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0202 //RX_FDEQ_BIN_0 +221 0x0203 //RX_FDEQ_BIN_1 +222 0x0303 //RX_FDEQ_BIN_2 +223 0x0304 //RX_FDEQ_BIN_3 +224 0x0405 //RX_FDEQ_BIN_4 +225 0x0506 //RX_FDEQ_BIN_5 +226 0x0708 //RX_FDEQ_BIN_6 +227 0x090A //RX_FDEQ_BIN_7 +228 0x0B0C //RX_FDEQ_BIN_8 +229 0x0D0E //RX_FDEQ_BIN_9 +230 0x0000 //RX_FDEQ_BIN_10 +231 0x0000 //RX_FDEQ_BIN_11 +232 0x0000 //RX_FDEQ_BIN_12 +233 0x0000 //RX_FDEQ_BIN_13 +234 0x0000 //RX_FDEQ_BIN_14 +235 0x0000 //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x4000 //RX_FDEQ_RESRV_0 +245 0x0320 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0030 //RX_FDDRC_BAND_MARGIN_1 +248 0x0050 //RX_FDDRC_BAND_MARGIN_2 +249 0x0080 //RX_FDDRC_BAND_MARGIN_3 +250 0x0007 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x5000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x6400 //RX_FDDRC_THRD_3_2 +258 0x6400 //RX_FDDRC_THRD_3_3 +259 0x2000 //RX_FDDRC_SLANT_0_0 +260 0x2000 //RX_FDDRC_SLANT_0_1 +261 0x2000 //RX_FDDRC_SLANT_0_2 +262 0x2000 //RX_FDDRC_SLANT_0_3 +263 0x5333 //RX_FDDRC_SLANT_1_0 +264 0x5333 //RX_FDDRC_SLANT_1_1 +265 0x5333 //RX_FDDRC_SLANT_1_2 +266 0x5333 //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +268 0x0000 //RX_FILTINDX +269 0x0000 //RX_TDDRC_THRD_0 +270 0x0000 //RX_TDDRC_THRD_1 +271 0x7FFF //RX_TDDRC_THRD_2 +272 0x7FFF //RX_TDDRC_THRD_3 +273 0x7FFF //RX_TDDRC_SLANT_0 +274 0x7EB8 //RX_TDDRC_SLANT_1 +275 0x3000 //RX_TDDRC_ALPHA_UP_0 +276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x199A //RX_TDDRC_HMNC_GAIN +279 0x0001 //RX_TDDRC_SMT_FLAG +280 0x0CCD //RX_TDDRC_SMT_W +281 0x017F //RX_TDDRC_DRC_GAIN +282 0x7C00 //RX_LAMBDA_PKA_FP +283 0x2000 //RX_TPKA_FP +284 0x2000 //RX_MIN_G_FP +285 0x0080 //RX_MAX_G_FP +286 0x0100 //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 +288 0x0000 //RX_MAXLEVEL_CNG +289 0x3000 //RX_BWE_UV_TH +290 0x3000 //RX_BWE_UV_TH2 +291 0x1800 //RX_BWE_UV_TH3 +292 0x1000 //RX_BWE_V_TH +293 0x04CD //RX_BWE_GAIN1_V_TH1 +294 0x0F33 //RX_BWE_GAIN1_V_TH2 +295 0x7333 //RX_BWE_UV_EQ +296 0x199A //RX_BWE_V_EQ +297 0x7333 //RX_BWE_TONE_TH +298 0x0004 //RX_BWE_UV_HOLD_T +299 0x6CCD //RX_BWE_GAIN2_ALPHA +300 0x799A //RX_BWE_GAIN3_ALPHA +301 0x001E //RX_BWE_CUTOFF +302 0x3000 //RX_BWE_GAINFILL +303 0x3200 //RX_BWE_MAXTH_TONE +304 0x2000 //RX_BWE_EQ_0 +305 0x2000 //RX_BWE_EQ_1 +306 0x2000 //RX_BWE_EQ_2 +307 0x2000 //RX_BWE_EQ_3 +308 0x2000 //RX_BWE_EQ_4 +309 0x2000 //RX_BWE_EQ_5 +310 0x2000 //RX_BWE_EQ_6 +311 0x0000 //RX_BWE_RESRV_0 +312 0x0000 //RX_BWE_RESRV_1 +313 0x0000 //RX_BWE_RESRV_2 +#VOL 0 +163 0x3000 //RX_TDDRC_ALPHA_UP_1 +164 0x3000 //RX_TDDRC_ALPHA_UP_2 +165 0x3000 //RX_TDDRC_ALPHA_UP_3 +166 0x3000 //RX_TDDRC_ALPHA_UP_4 +184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +190 0x7FFF //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +269 0x0000 //RX_TDDRC_THRD_0 +270 0x0000 //RX_TDDRC_THRD_1 +271 0x7FFF //RX_TDDRC_THRD_2 +272 0x7FFF //RX_TDDRC_THRD_3 +273 0x7FFF //RX_TDDRC_SLANT_0 +274 0x7EB8 //RX_TDDRC_SLANT_1 +275 0x3000 //RX_TDDRC_ALPHA_UP_0 +276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x199A //RX_TDDRC_HMNC_GAIN +279 0x0001 //RX_TDDRC_SMT_FLAG +280 0x0CCD //RX_TDDRC_SMT_W +281 0x017F //RX_TDDRC_DRC_GAIN +195 0x0014 //RX_FDEQ_SUBNUM +196 0x4848 //RX_FDEQ_GAIN_0 +197 0x4848 //RX_FDEQ_GAIN_1 +198 0x4848 //RX_FDEQ_GAIN_2 +199 0x4848 //RX_FDEQ_GAIN_3 +200 0x4848 //RX_FDEQ_GAIN_4 +201 0x4848 //RX_FDEQ_GAIN_5 +202 0x4444 //RX_FDEQ_GAIN_6 +203 0x4040 //RX_FDEQ_GAIN_7 +204 0x4040 //RX_FDEQ_GAIN_8 +205 0x4040 //RX_FDEQ_GAIN_9 +206 0x4848 //RX_FDEQ_GAIN_10 +207 0x4848 //RX_FDEQ_GAIN_11 +208 0x4848 //RX_FDEQ_GAIN_12 +209 0x4848 //RX_FDEQ_GAIN_13 +210 0x4848 //RX_FDEQ_GAIN_14 +211 0x4848 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0202 //RX_FDEQ_BIN_0 +221 0x0203 //RX_FDEQ_BIN_1 +222 0x0303 //RX_FDEQ_BIN_2 +223 0x0304 //RX_FDEQ_BIN_3 +224 0x0405 //RX_FDEQ_BIN_4 +225 0x0506 //RX_FDEQ_BIN_5 +226 0x0708 //RX_FDEQ_BIN_6 +227 0x090A //RX_FDEQ_BIN_7 +228 0x0B0C //RX_FDEQ_BIN_8 +229 0x0D0E //RX_FDEQ_BIN_9 +230 0x0000 //RX_FDEQ_BIN_10 +231 0x0000 //RX_FDEQ_BIN_11 +232 0x0000 //RX_FDEQ_BIN_12 +233 0x0000 //RX_FDEQ_BIN_13 +234 0x0000 //RX_FDEQ_BIN_14 +235 0x0000 //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x4000 //RX_FDEQ_RESRV_0 +245 0x0320 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0030 //RX_FDDRC_BAND_MARGIN_1 +248 0x0050 //RX_FDDRC_BAND_MARGIN_2 +249 0x0080 //RX_FDDRC_BAND_MARGIN_3 +250 0x0007 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x5000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x6400 //RX_FDDRC_THRD_3_2 +258 0x6400 //RX_FDDRC_THRD_3_3 +259 0x2000 //RX_FDDRC_SLANT_0_0 +260 0x2000 //RX_FDDRC_SLANT_0_1 +261 0x2000 //RX_FDDRC_SLANT_0_2 +262 0x2000 //RX_FDDRC_SLANT_0_3 +263 0x5333 //RX_FDDRC_SLANT_1_0 +264 0x5333 //RX_FDDRC_SLANT_1_1 +265 0x5333 //RX_FDDRC_SLANT_1_2 +266 0x5333 //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +286 0x0100 //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 +#VOL 1 +163 0x3000 //RX_TDDRC_ALPHA_UP_1 +164 0x3000 //RX_TDDRC_ALPHA_UP_2 +165 0x3000 //RX_TDDRC_ALPHA_UP_3 +166 0x3000 //RX_TDDRC_ALPHA_UP_4 +184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +190 0x7FFF //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +269 0x0000 //RX_TDDRC_THRD_0 +270 0x0000 //RX_TDDRC_THRD_1 +271 0x7FFF //RX_TDDRC_THRD_2 +272 0x7FFF //RX_TDDRC_THRD_3 +273 0x7FFF //RX_TDDRC_SLANT_0 +274 0x7EB8 //RX_TDDRC_SLANT_1 +275 0x3000 //RX_TDDRC_ALPHA_UP_0 +276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x199A //RX_TDDRC_HMNC_GAIN +279 0x0001 //RX_TDDRC_SMT_FLAG +280 0x0CCD //RX_TDDRC_SMT_W +281 0x017F //RX_TDDRC_DRC_GAIN +195 0x0014 //RX_FDEQ_SUBNUM +196 0x4848 //RX_FDEQ_GAIN_0 +197 0x4848 //RX_FDEQ_GAIN_1 +198 0x4848 //RX_FDEQ_GAIN_2 +199 0x4848 //RX_FDEQ_GAIN_3 +200 0x4848 //RX_FDEQ_GAIN_4 +201 0x4848 //RX_FDEQ_GAIN_5 +202 0x4444 //RX_FDEQ_GAIN_6 +203 0x4040 //RX_FDEQ_GAIN_7 +204 0x4040 //RX_FDEQ_GAIN_8 +205 0x4040 //RX_FDEQ_GAIN_9 +206 0x4848 //RX_FDEQ_GAIN_10 +207 0x4848 //RX_FDEQ_GAIN_11 +208 0x4848 //RX_FDEQ_GAIN_12 +209 0x4848 //RX_FDEQ_GAIN_13 +210 0x4848 //RX_FDEQ_GAIN_14 +211 0x4848 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0202 //RX_FDEQ_BIN_0 +221 0x0203 //RX_FDEQ_BIN_1 +222 0x0303 //RX_FDEQ_BIN_2 +223 0x0304 //RX_FDEQ_BIN_3 +224 0x0405 //RX_FDEQ_BIN_4 +225 0x0506 //RX_FDEQ_BIN_5 +226 0x0708 //RX_FDEQ_BIN_6 +227 0x090A //RX_FDEQ_BIN_7 +228 0x0B0C //RX_FDEQ_BIN_8 +229 0x0D0E //RX_FDEQ_BIN_9 +230 0x0000 //RX_FDEQ_BIN_10 +231 0x0000 //RX_FDEQ_BIN_11 +232 0x0000 //RX_FDEQ_BIN_12 +233 0x0000 //RX_FDEQ_BIN_13 +234 0x0000 //RX_FDEQ_BIN_14 +235 0x0000 //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x4000 //RX_FDEQ_RESRV_0 +245 0x0320 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0030 //RX_FDDRC_BAND_MARGIN_1 +248 0x0050 //RX_FDDRC_BAND_MARGIN_2 +249 0x0080 //RX_FDDRC_BAND_MARGIN_3 +250 0x0007 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x5000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x6400 //RX_FDDRC_THRD_3_2 +258 0x6400 //RX_FDDRC_THRD_3_3 +259 0x2000 //RX_FDDRC_SLANT_0_0 +260 0x2000 //RX_FDDRC_SLANT_0_1 +261 0x2000 //RX_FDDRC_SLANT_0_2 +262 0x2000 //RX_FDDRC_SLANT_0_3 +263 0x5333 //RX_FDDRC_SLANT_1_0 +264 0x5333 //RX_FDDRC_SLANT_1_1 +265 0x5333 //RX_FDDRC_SLANT_1_2 +266 0x5333 //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +286 0x0100 //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 +#VOL 2 +163 0x3000 //RX_TDDRC_ALPHA_UP_1 +164 0x3000 //RX_TDDRC_ALPHA_UP_2 +165 0x3000 //RX_TDDRC_ALPHA_UP_3 +166 0x3000 //RX_TDDRC_ALPHA_UP_4 +184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +190 0x7FFF //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +269 0x0000 //RX_TDDRC_THRD_0 +270 0x0000 //RX_TDDRC_THRD_1 +271 0x7FFF //RX_TDDRC_THRD_2 +272 0x7FFF //RX_TDDRC_THRD_3 +273 0x7FFF //RX_TDDRC_SLANT_0 +274 0x7EB8 //RX_TDDRC_SLANT_1 +275 0x3000 //RX_TDDRC_ALPHA_UP_0 +276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x199A //RX_TDDRC_HMNC_GAIN +279 0x0001 //RX_TDDRC_SMT_FLAG +280 0x0CCD //RX_TDDRC_SMT_W +281 0x017F //RX_TDDRC_DRC_GAIN +195 0x0014 //RX_FDEQ_SUBNUM +196 0x4848 //RX_FDEQ_GAIN_0 +197 0x4848 //RX_FDEQ_GAIN_1 +198 0x4848 //RX_FDEQ_GAIN_2 +199 0x4848 //RX_FDEQ_GAIN_3 +200 0x4848 //RX_FDEQ_GAIN_4 +201 0x4848 //RX_FDEQ_GAIN_5 +202 0x4444 //RX_FDEQ_GAIN_6 +203 0x4040 //RX_FDEQ_GAIN_7 +204 0x4040 //RX_FDEQ_GAIN_8 +205 0x4040 //RX_FDEQ_GAIN_9 +206 0x4848 //RX_FDEQ_GAIN_10 +207 0x4848 //RX_FDEQ_GAIN_11 +208 0x4848 //RX_FDEQ_GAIN_12 +209 0x4848 //RX_FDEQ_GAIN_13 +210 0x4848 //RX_FDEQ_GAIN_14 +211 0x4848 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0202 //RX_FDEQ_BIN_0 +221 0x0203 //RX_FDEQ_BIN_1 +222 0x0303 //RX_FDEQ_BIN_2 +223 0x0304 //RX_FDEQ_BIN_3 +224 0x0405 //RX_FDEQ_BIN_4 +225 0x0506 //RX_FDEQ_BIN_5 +226 0x0708 //RX_FDEQ_BIN_6 +227 0x090A //RX_FDEQ_BIN_7 +228 0x0B0C //RX_FDEQ_BIN_8 +229 0x0D0E //RX_FDEQ_BIN_9 +230 0x0000 //RX_FDEQ_BIN_10 +231 0x0000 //RX_FDEQ_BIN_11 +232 0x0000 //RX_FDEQ_BIN_12 +233 0x0000 //RX_FDEQ_BIN_13 +234 0x0000 //RX_FDEQ_BIN_14 +235 0x0000 //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x4000 //RX_FDEQ_RESRV_0 +245 0x0320 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0030 //RX_FDDRC_BAND_MARGIN_1 +248 0x0050 //RX_FDDRC_BAND_MARGIN_2 +249 0x0080 //RX_FDDRC_BAND_MARGIN_3 +250 0x0007 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x5000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x6400 //RX_FDDRC_THRD_3_2 +258 0x6400 //RX_FDDRC_THRD_3_3 +259 0x2000 //RX_FDDRC_SLANT_0_0 +260 0x2000 //RX_FDDRC_SLANT_0_1 +261 0x2000 //RX_FDDRC_SLANT_0_2 +262 0x2000 //RX_FDDRC_SLANT_0_3 +263 0x5333 //RX_FDDRC_SLANT_1_0 +264 0x5333 //RX_FDDRC_SLANT_1_1 +265 0x5333 //RX_FDDRC_SLANT_1_2 +266 0x5333 //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +286 0x0100 //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 +#VOL 3 +163 0x3000 //RX_TDDRC_ALPHA_UP_1 +164 0x3000 //RX_TDDRC_ALPHA_UP_2 +165 0x3000 //RX_TDDRC_ALPHA_UP_3 +166 0x3000 //RX_TDDRC_ALPHA_UP_4 +184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +190 0x7FFF //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +269 0x0000 //RX_TDDRC_THRD_0 +270 0x0000 //RX_TDDRC_THRD_1 +271 0x7FFF //RX_TDDRC_THRD_2 +272 0x7FFF //RX_TDDRC_THRD_3 +273 0x7FFF //RX_TDDRC_SLANT_0 +274 0x7EB8 //RX_TDDRC_SLANT_1 +275 0x3000 //RX_TDDRC_ALPHA_UP_0 +276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x199A //RX_TDDRC_HMNC_GAIN +279 0x0001 //RX_TDDRC_SMT_FLAG +280 0x0CCD //RX_TDDRC_SMT_W +281 0x017F //RX_TDDRC_DRC_GAIN +195 0x0014 //RX_FDEQ_SUBNUM +196 0x4848 //RX_FDEQ_GAIN_0 +197 0x4848 //RX_FDEQ_GAIN_1 +198 0x4848 //RX_FDEQ_GAIN_2 +199 0x4848 //RX_FDEQ_GAIN_3 +200 0x4848 //RX_FDEQ_GAIN_4 +201 0x4848 //RX_FDEQ_GAIN_5 +202 0x4444 //RX_FDEQ_GAIN_6 +203 0x4040 //RX_FDEQ_GAIN_7 +204 0x4040 //RX_FDEQ_GAIN_8 +205 0x4040 //RX_FDEQ_GAIN_9 +206 0x4848 //RX_FDEQ_GAIN_10 +207 0x4848 //RX_FDEQ_GAIN_11 +208 0x4848 //RX_FDEQ_GAIN_12 +209 0x4848 //RX_FDEQ_GAIN_13 +210 0x4848 //RX_FDEQ_GAIN_14 +211 0x4848 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0202 //RX_FDEQ_BIN_0 +221 0x0203 //RX_FDEQ_BIN_1 +222 0x0303 //RX_FDEQ_BIN_2 +223 0x0304 //RX_FDEQ_BIN_3 +224 0x0405 //RX_FDEQ_BIN_4 +225 0x0506 //RX_FDEQ_BIN_5 +226 0x0708 //RX_FDEQ_BIN_6 +227 0x090A //RX_FDEQ_BIN_7 +228 0x0B0C //RX_FDEQ_BIN_8 +229 0x0D0E //RX_FDEQ_BIN_9 +230 0x0000 //RX_FDEQ_BIN_10 +231 0x0000 //RX_FDEQ_BIN_11 +232 0x0000 //RX_FDEQ_BIN_12 +233 0x0000 //RX_FDEQ_BIN_13 +234 0x0000 //RX_FDEQ_BIN_14 +235 0x0000 //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x4000 //RX_FDEQ_RESRV_0 +245 0x0320 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0030 //RX_FDDRC_BAND_MARGIN_1 +248 0x0050 //RX_FDDRC_BAND_MARGIN_2 +249 0x0080 //RX_FDDRC_BAND_MARGIN_3 +250 0x0007 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x5000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x6400 //RX_FDDRC_THRD_3_2 +258 0x6400 //RX_FDDRC_THRD_3_3 +259 0x2000 //RX_FDDRC_SLANT_0_0 +260 0x2000 //RX_FDDRC_SLANT_0_1 +261 0x2000 //RX_FDDRC_SLANT_0_2 +262 0x2000 //RX_FDDRC_SLANT_0_3 +263 0x5333 //RX_FDDRC_SLANT_1_0 +264 0x5333 //RX_FDDRC_SLANT_1_1 +265 0x5333 //RX_FDDRC_SLANT_1_2 +266 0x5333 //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +286 0x0100 //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 +#VOL 4 +163 0x3000 //RX_TDDRC_ALPHA_UP_1 +164 0x3000 //RX_TDDRC_ALPHA_UP_2 +165 0x3000 //RX_TDDRC_ALPHA_UP_3 +166 0x3000 //RX_TDDRC_ALPHA_UP_4 +184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +190 0x7FFF //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +269 0x0000 //RX_TDDRC_THRD_0 +270 0x0000 //RX_TDDRC_THRD_1 +271 0x7FFF //RX_TDDRC_THRD_2 +272 0x7FFF //RX_TDDRC_THRD_3 +273 0x7FFF //RX_TDDRC_SLANT_0 +274 0x7EB8 //RX_TDDRC_SLANT_1 +275 0x3000 //RX_TDDRC_ALPHA_UP_0 +276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x199A //RX_TDDRC_HMNC_GAIN +279 0x0001 //RX_TDDRC_SMT_FLAG +280 0x0CCD //RX_TDDRC_SMT_W +281 0x017F //RX_TDDRC_DRC_GAIN +195 0x0014 //RX_FDEQ_SUBNUM +196 0x4848 //RX_FDEQ_GAIN_0 +197 0x4848 //RX_FDEQ_GAIN_1 +198 0x4848 //RX_FDEQ_GAIN_2 +199 0x4848 //RX_FDEQ_GAIN_3 +200 0x4848 //RX_FDEQ_GAIN_4 +201 0x4848 //RX_FDEQ_GAIN_5 +202 0x4444 //RX_FDEQ_GAIN_6 +203 0x4040 //RX_FDEQ_GAIN_7 +204 0x4040 //RX_FDEQ_GAIN_8 +205 0x4040 //RX_FDEQ_GAIN_9 +206 0x4848 //RX_FDEQ_GAIN_10 +207 0x4848 //RX_FDEQ_GAIN_11 +208 0x4848 //RX_FDEQ_GAIN_12 +209 0x4848 //RX_FDEQ_GAIN_13 +210 0x4848 //RX_FDEQ_GAIN_14 +211 0x4848 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0202 //RX_FDEQ_BIN_0 +221 0x0203 //RX_FDEQ_BIN_1 +222 0x0303 //RX_FDEQ_BIN_2 +223 0x0304 //RX_FDEQ_BIN_3 +224 0x0405 //RX_FDEQ_BIN_4 +225 0x0506 //RX_FDEQ_BIN_5 +226 0x0708 //RX_FDEQ_BIN_6 +227 0x090A //RX_FDEQ_BIN_7 +228 0x0B0C //RX_FDEQ_BIN_8 +229 0x0D0E //RX_FDEQ_BIN_9 +230 0x0000 //RX_FDEQ_BIN_10 +231 0x0000 //RX_FDEQ_BIN_11 +232 0x0000 //RX_FDEQ_BIN_12 +233 0x0000 //RX_FDEQ_BIN_13 +234 0x0000 //RX_FDEQ_BIN_14 +235 0x0000 //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x4000 //RX_FDEQ_RESRV_0 +245 0x0320 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0030 //RX_FDDRC_BAND_MARGIN_1 +248 0x0050 //RX_FDDRC_BAND_MARGIN_2 +249 0x0080 //RX_FDDRC_BAND_MARGIN_3 +250 0x0007 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x5000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x6400 //RX_FDDRC_THRD_3_2 +258 0x6400 //RX_FDDRC_THRD_3_3 +259 0x2000 //RX_FDDRC_SLANT_0_0 +260 0x2000 //RX_FDDRC_SLANT_0_1 +261 0x2000 //RX_FDDRC_SLANT_0_2 +262 0x2000 //RX_FDDRC_SLANT_0_3 +263 0x5333 //RX_FDDRC_SLANT_1_0 +264 0x5333 //RX_FDDRC_SLANT_1_1 +265 0x5333 //RX_FDDRC_SLANT_1_2 +266 0x5333 //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +286 0x0100 //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 +#VOL 5 +163 0x3000 //RX_TDDRC_ALPHA_UP_1 +164 0x3000 //RX_TDDRC_ALPHA_UP_2 +165 0x3000 //RX_TDDRC_ALPHA_UP_3 +166 0x3000 //RX_TDDRC_ALPHA_UP_4 +184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +190 0x7FFF //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +269 0x0000 //RX_TDDRC_THRD_0 +270 0x0000 //RX_TDDRC_THRD_1 +271 0x7FFF //RX_TDDRC_THRD_2 +272 0x7FFF //RX_TDDRC_THRD_3 +273 0x7FFF //RX_TDDRC_SLANT_0 +274 0x7EB8 //RX_TDDRC_SLANT_1 +275 0x3000 //RX_TDDRC_ALPHA_UP_0 +276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x199A //RX_TDDRC_HMNC_GAIN +279 0x0001 //RX_TDDRC_SMT_FLAG +280 0x0CCD //RX_TDDRC_SMT_W +281 0x017F //RX_TDDRC_DRC_GAIN +195 0x0014 //RX_FDEQ_SUBNUM +196 0x4848 //RX_FDEQ_GAIN_0 +197 0x4848 //RX_FDEQ_GAIN_1 +198 0x4848 //RX_FDEQ_GAIN_2 +199 0x4848 //RX_FDEQ_GAIN_3 +200 0x4848 //RX_FDEQ_GAIN_4 +201 0x4848 //RX_FDEQ_GAIN_5 +202 0x4444 //RX_FDEQ_GAIN_6 +203 0x4040 //RX_FDEQ_GAIN_7 +204 0x4040 //RX_FDEQ_GAIN_8 +205 0x4040 //RX_FDEQ_GAIN_9 +206 0x4848 //RX_FDEQ_GAIN_10 +207 0x4848 //RX_FDEQ_GAIN_11 +208 0x4848 //RX_FDEQ_GAIN_12 +209 0x4848 //RX_FDEQ_GAIN_13 +210 0x4848 //RX_FDEQ_GAIN_14 +211 0x4848 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0202 //RX_FDEQ_BIN_0 +221 0x0203 //RX_FDEQ_BIN_1 +222 0x0303 //RX_FDEQ_BIN_2 +223 0x0304 //RX_FDEQ_BIN_3 +224 0x0405 //RX_FDEQ_BIN_4 +225 0x0506 //RX_FDEQ_BIN_5 +226 0x0708 //RX_FDEQ_BIN_6 +227 0x090A //RX_FDEQ_BIN_7 +228 0x0B0C //RX_FDEQ_BIN_8 +229 0x0D0E //RX_FDEQ_BIN_9 +230 0x0000 //RX_FDEQ_BIN_10 +231 0x0000 //RX_FDEQ_BIN_11 +232 0x0000 //RX_FDEQ_BIN_12 +233 0x0000 //RX_FDEQ_BIN_13 +234 0x0000 //RX_FDEQ_BIN_14 +235 0x0000 //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x4000 //RX_FDEQ_RESRV_0 +245 0x0320 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0030 //RX_FDDRC_BAND_MARGIN_1 +248 0x0050 //RX_FDDRC_BAND_MARGIN_2 +249 0x0080 //RX_FDDRC_BAND_MARGIN_3 +250 0x0007 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x5000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x6400 //RX_FDDRC_THRD_3_2 +258 0x6400 //RX_FDDRC_THRD_3_3 +259 0x2000 //RX_FDDRC_SLANT_0_0 +260 0x2000 //RX_FDDRC_SLANT_0_1 +261 0x2000 //RX_FDDRC_SLANT_0_2 +262 0x2000 //RX_FDDRC_SLANT_0_3 +263 0x5333 //RX_FDDRC_SLANT_1_0 +264 0x5333 //RX_FDDRC_SLANT_1_1 +265 0x5333 //RX_FDDRC_SLANT_1_2 +266 0x5333 //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +286 0x0100 //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 +#VOL 6 +163 0x3000 //RX_TDDRC_ALPHA_UP_1 +164 0x3000 //RX_TDDRC_ALPHA_UP_2 +165 0x3000 //RX_TDDRC_ALPHA_UP_3 +166 0x3000 //RX_TDDRC_ALPHA_UP_4 +184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +190 0x7FFF //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +269 0x0000 //RX_TDDRC_THRD_0 +270 0x0000 //RX_TDDRC_THRD_1 +271 0x7FFF //RX_TDDRC_THRD_2 +272 0x7FFF //RX_TDDRC_THRD_3 +273 0x7FFF //RX_TDDRC_SLANT_0 +274 0x7EB8 //RX_TDDRC_SLANT_1 +275 0x3000 //RX_TDDRC_ALPHA_UP_0 +276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x199A //RX_TDDRC_HMNC_GAIN +279 0x0001 //RX_TDDRC_SMT_FLAG +280 0x0CCD //RX_TDDRC_SMT_W +281 0x017F //RX_TDDRC_DRC_GAIN +195 0x0014 //RX_FDEQ_SUBNUM +196 0x4848 //RX_FDEQ_GAIN_0 +197 0x4848 //RX_FDEQ_GAIN_1 +198 0x4848 //RX_FDEQ_GAIN_2 +199 0x4848 //RX_FDEQ_GAIN_3 +200 0x4848 //RX_FDEQ_GAIN_4 +201 0x4848 //RX_FDEQ_GAIN_5 +202 0x4444 //RX_FDEQ_GAIN_6 +203 0x4040 //RX_FDEQ_GAIN_7 +204 0x4040 //RX_FDEQ_GAIN_8 +205 0x4040 //RX_FDEQ_GAIN_9 +206 0x4848 //RX_FDEQ_GAIN_10 +207 0x4848 //RX_FDEQ_GAIN_11 +208 0x4848 //RX_FDEQ_GAIN_12 +209 0x4848 //RX_FDEQ_GAIN_13 +210 0x4848 //RX_FDEQ_GAIN_14 +211 0x4848 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0202 //RX_FDEQ_BIN_0 +221 0x0203 //RX_FDEQ_BIN_1 +222 0x0303 //RX_FDEQ_BIN_2 +223 0x0304 //RX_FDEQ_BIN_3 +224 0x0405 //RX_FDEQ_BIN_4 +225 0x0506 //RX_FDEQ_BIN_5 +226 0x0708 //RX_FDEQ_BIN_6 +227 0x090A //RX_FDEQ_BIN_7 +228 0x0B0C //RX_FDEQ_BIN_8 +229 0x0D0E //RX_FDEQ_BIN_9 +230 0x0000 //RX_FDEQ_BIN_10 +231 0x0000 //RX_FDEQ_BIN_11 +232 0x0000 //RX_FDEQ_BIN_12 +233 0x0000 //RX_FDEQ_BIN_13 +234 0x0000 //RX_FDEQ_BIN_14 +235 0x0000 //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x4000 //RX_FDEQ_RESRV_0 +245 0x0320 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0030 //RX_FDDRC_BAND_MARGIN_1 +248 0x0050 //RX_FDDRC_BAND_MARGIN_2 +249 0x0080 //RX_FDDRC_BAND_MARGIN_3 +250 0x0007 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x5000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x6400 //RX_FDDRC_THRD_3_2 +258 0x6400 //RX_FDDRC_THRD_3_3 +259 0x2000 //RX_FDDRC_SLANT_0_0 +260 0x2000 //RX_FDDRC_SLANT_0_1 +261 0x2000 //RX_FDDRC_SLANT_0_2 +262 0x2000 //RX_FDDRC_SLANT_0_3 +263 0x5333 //RX_FDDRC_SLANT_1_0 +264 0x5333 //RX_FDDRC_SLANT_1_1 +265 0x5333 //RX_FDDRC_SLANT_1_2 +266 0x5333 //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +286 0x0100 //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 #CASE_NAME BLUETOOTH-BTNB_NREC-VOICE_GENERIC-WB -#PARAM_TYPE TX+RX -#TOTAL_CUSTOM_STEP 7 +#PARAM_MODE Full +#PARAM_TYPE TX+2RX +#TOTAL_CUSTOM_STEP 7+7 #TX 0 0x0008 //TX_OPERATION_MODE_0 1 0x0008 //TX_OPERATION_MODE_1 @@ -17788,20 +26959,20 @@ 248 0xF400 //TX_THR_SN_EST_6 249 0xF600 //TX_THR_SN_EST_7 250 0x0000 //TX_DELTA_THR_SN_EST_0 -251 0x0000 //TX_DELTA_THR_SN_EST_1 +251 0x0200 //TX_DELTA_THR_SN_EST_1 252 0x0200 //TX_DELTA_THR_SN_EST_2 253 0x0200 //TX_DELTA_THR_SN_EST_3 254 0x0200 //TX_DELTA_THR_SN_EST_4 255 0x0200 //TX_DELTA_THR_SN_EST_5 -256 0x0200 //TX_DELTA_THR_SN_EST_6 +256 0x0000 //TX_DELTA_THR_SN_EST_6 257 0x0200 //TX_DELTA_THR_SN_EST_7 258 0x6000 //TX_LAMBDA_NN_EST_0 -259 0x6000 //TX_LAMBDA_NN_EST_1 +259 0x4000 //TX_LAMBDA_NN_EST_1 260 0x4000 //TX_LAMBDA_NN_EST_2 261 0x4000 //TX_LAMBDA_NN_EST_3 262 0x4000 //TX_LAMBDA_NN_EST_4 263 0x4000 //TX_LAMBDA_NN_EST_5 -264 0x4000 //TX_LAMBDA_NN_EST_6 +264 0x6000 //TX_LAMBDA_NN_EST_6 265 0x4000 //TX_LAMBDA_NN_EST_7 266 0x0400 //TX_N_SN_EST 267 0x001E //TX_INBEAM_T @@ -17819,16 +26990,16 @@ 279 0x1000 //TX_B_POST_FLT_0 280 0x1000 //TX_B_POST_FLT_1 281 0x000F //TX_NS_LVL_CTRL_0 -282 0x000F //TX_NS_LVL_CTRL_1 -283 0x0011 //TX_NS_LVL_CTRL_2 +282 0x0011 //TX_NS_LVL_CTRL_1 +283 0x000F //TX_NS_LVL_CTRL_2 284 0x000F //TX_NS_LVL_CTRL_3 285 0x000F //TX_NS_LVL_CTRL_4 286 0x000F //TX_NS_LVL_CTRL_5 287 0x000F //TX_NS_LVL_CTRL_6 288 0x0011 //TX_NS_LVL_CTRL_7 289 0x000C //TX_MIN_GAIN_S_0 -290 0x000C //TX_MIN_GAIN_S_1 -291 0x000F //TX_MIN_GAIN_S_2 +290 0x000F //TX_MIN_GAIN_S_1 +291 0x000C //TX_MIN_GAIN_S_2 292 0x000C //TX_MIN_GAIN_S_3 293 0x000C //TX_MIN_GAIN_S_4 294 0x000C //TX_MIN_GAIN_S_5 @@ -17852,12 +27023,12 @@ 312 0x7FFF //TX_A_POST_FILT_0 313 0x2000 //TX_A_POST_FILT_1 314 0x4000 //TX_A_POST_FILT_S_0 -315 0x4000 //TX_A_POST_FILT_S_1 +315 0x5000 //TX_A_POST_FILT_S_1 316 0x5000 //TX_A_POST_FILT_S_2 317 0x5000 //TX_A_POST_FILT_S_3 318 0x5000 //TX_A_POST_FILT_S_4 319 0x5000 //TX_A_POST_FILT_S_5 -320 0x5000 //TX_A_POST_FILT_S_6 +320 0x4000 //TX_A_POST_FILT_S_6 321 0x5000 //TX_A_POST_FILT_S_7 322 0x1000 //TX_B_POST_FILT_0 323 0x1000 //TX_B_POST_FILT_1 @@ -17917,10 +27088,10 @@ 377 0x7FFF //TX_NOISE_TH_5_4 378 0x044C //TX_NOISE_TH_6 379 0x0014 //TX_MINENOISE_TH -380 0x4000 //TX_MINENOISE_MIC0_TH_MTS -381 0xFFEE //TX_MINENOISE_MIC0_TH_EXP -382 0x6000 //TX_MINENOISE_MIC0_S_TH_MTS -383 0xFFF3 //TX_MINENOISE_MIC0_S_TH_EXP +380 0x4000 //TX_MORENS_TFMASK_TH +381 0xFFEE //TX_DRC_QUIET_FLOOR +382 0x6000 //TX_RATIODTL_CUT_TH +383 0xFFF3 //TX_DT_CUT_K1 384 0x0666 //TX_OUT_ENER_S_TH_CLEAN 385 0x0666 //TX_OUT_ENER_S_TH_LESSCLEAN 386 0x0333 //TX_OUT_ENER_S_TH_NOISY @@ -17928,15 +27099,15 @@ 388 0x0333 //TX_OUT_ENER_TH_SPEECH 389 0x2000 //TX_SN_NPB_GAIN 390 0x0000 //TX_NN_NPB_GAIN -391 0x0000 //TX_CSX_ALPHA_0 -392 0x0000 //TX_CSX_ALPHA_1 -393 0x0000 //TX_CSX_ALPHA_2 -394 0x0000 //TX_CSX_ALPHA_3 -395 0x0800 //TX_MU_ARSP_EST -396 0x00C8 //TX_P_OUTBEAM_MIN_TH +391 0x0000 //TX_POST_MASK_SUP_HSNE +392 0x0000 //TX_TAIL_DET_TH +393 0x0000 //TX_B_LESSCUT_RTO_WTA +394 0x0000 //TX_MEL_G_R +395 0x0800 //TX_SUPHIGH_TH +396 0x00C8 //TX_MASK_G_R 397 0x0002 //TX_EXTRA_NS_L -398 0x0800 //TX_EXTRA_NS_A -399 0x0005 //TX_VR_NOISE_FLOOR_TH +398 0x0800 //TX_C_POST_FLT_MASK +399 0x0005 //TX_A_POST_FLT_WNS 400 0x0148 //TX_MIN_G_LOW300HZ 401 0x0002 //TX_MAXLEVEL_CNG 402 0x00B4 //TX_STN_NOISE_TH @@ -18051,16 +27222,16 @@ 511 0x6666 //TX_MIC_TO_BFGAIN 512 0x0000 //TX_MICTOBFGAIN0 513 0x0000 //TX_FASTMUE_TH -514 0x0000 //TX_DERVB_LEN_0 -515 0x0000 //TX_DERVB_LEN_1 -516 0x0000 //TX_RHO_DERVB -517 0x0000 //TX_MIC_INDX_DERVB -518 0x0000 //TX_MU_DERVB -519 0x0000 //TX_DR_RESRV_0 -520 0x0000 //TX_DR_RESRV_1 -521 0x0000 //TX_DR_RESRV_2 -522 0x0000 //TX_DR_RESRV_3 -523 0x0000 //TX_DR_RESRV_4 +514 0x0000 //TX_DEREVERB_LF_MU +515 0x0000 //TX_DEREVERB_HF_MU +516 0x0000 //TX_DEREVERB_DELAY +517 0x0000 //TX_DEREVERB_COEF_LEN +518 0x0000 //TX_DEREVERB_DNR +519 0x0000 //TX_DEREVERB_ALPHA +520 0x0000 //TX_DEREVERB_BETA +521 0x0000 //TX_GSC_RTOL_TH +522 0x0000 //TX_GSC_RTOH_TH +523 0x0000 //TX_WIDE2_MEANHTH 524 0x0000 //TX_DR_RESRV_5 525 0x0000 //TX_DR_RESRV_6 526 0x0000 //TX_DR_RESRV_7 @@ -18434,8 +27605,73 @@ 894 0xC000 //TX_FASTNS_SSA_THHFL 895 0xCCCC //TX_FASTNS_SSA_THLFH 896 0xD999 //TX_FASTNS_SSA_THHFH +897 0x0000 //TX_SENDFUNC_REG_MICMUTE +898 0x0000 //TX_SENDFUNC_REG_MICMUTE1 +899 0x0000 //TX_MICMUTE_RATIO_THR +900 0x0000 //TX_MICMUTE_AMP_THR +901 0x0000 //TX_MICMUTE_HPF_IND +902 0x0000 //TX_MICMUTE_LOG_EYR_TH +903 0x0000 //TX_MICMUTE_CVG_TIME +904 0x0000 //TX_MICMUTE_RELEASE_TIME +905 0x0000 //TX_MIC_VOLUME_MIC0MUTE +906 0x0000 //TX_MICMUTE_EPD_OFFSET_0 +907 0x0000 //TX_MICMUTE_FRQ_AEC_L +908 0x0000 //TX_MICMUTE_EAD_THR +909 0x0000 //TX_MICMUTE_LAMBDA_CB_NLE +910 0x0000 //TX_MICMUTE_LAMBDA_RE_EST +911 0x0000 //TX_DTD_THR1_MICMUTE_0 +912 0x0000 //TX_DTD_THR1_MICMUTE_1 +913 0x0000 //TX_DTD_THR1_MICMUTE_2 +914 0x0000 //TX_DTD_THR1_MICMUTE_3 +915 0x0000 //TX_DTD_THR2_MICMUTE_0 +916 0x0000 //TX_MICMUTE_MIN_EQ_RE_EST_0 +917 0x0000 //TX_MICMUTE_MIN_EQ_RE_EST_1 +918 0x0000 //TX_MICMUTE_MIN_EQ_RE_EST_2 +919 0x0000 //TX_MICMUTE_MIN_EQ_RE_EST_3 +920 0x0000 //TX_MICMUTE_MIN_EQ_RE_EST_4 +921 0x0000 //TX_MICMUTE_C_POST_FLT +922 0x0000 //TX_MICMUTE_DT_CUT_K +923 0x0000 //TX_MICMUTE_DT_CUT_THR +924 0x0000 //TX_MICMUTE_DT_CUT_K2 +925 0x0000 //TX_MICMUTE_DT_CUT_THR2 +926 0x0000 //TX_MICMUTE_DT2_HOLD_N +927 0x0000 //TX_MICMUTE_RATIODTH_THCUT +928 0x0000 //TX_MICMUTE_B_POST_FLT_ECHOL +929 0x0000 //TX_MICMUTE_B_POST_FLT_ECHOH +930 0x0000 //TX_MICMUTE_C_POST_FLT_MASK +931 0x0000 //TX_MICMUTE_RATIODTL_CUT_TH +932 0x0000 //TX_MICMUTE_DT_CUT_K1 +933 0x0000 //TX_MICMUTE_N2_SN_EST +934 0x0000 //TX_MICMUTE_THR_SN_EST_0 +935 0x0000 //TX_MICMUTE_MIN_G_CTRL_0 +936 0x0000 //TX_MICMUTE_A_POST_FILT_S_0 +937 0x0000 //TX_MICMUTE_B_POST_FILT_0 +938 0x0000 //TX_MIC1RUB_AMP_THR +939 0x0000 //TX_MIC1MUTE_RATIO_THR +940 0x0000 //TX_MIC1MUTE_AMP_THR +941 0x0000 //TX_MIC1MUTE_CVG_TIME +942 0x0000 //TX_MIC1MUTE_RELEASE_TIME +943 0x0000 //TX_AMS_RESRV_01 +944 0x0000 //TX_AMS_RESRV_02 +945 0x0000 //TX_AMS_RESRV_03 +946 0x0000 //TX_AMS_RESRV_04 +947 0x0000 //TX_AMS_RESRV_05 +948 0x0000 //TX_AMS_RESRV_06 +949 0x0000 //TX_AMS_RESRV_07 +950 0x0000 //TX_AMS_RESRV_08 +951 0x0000 //TX_AMS_RESRV_09 +952 0x0000 //TX_AMS_RESRV_10 +953 0x0000 //TX_AMS_RESRV_11 +954 0x0000 //TX_AMS_RESRV_12 +955 0x0000 //TX_AMS_RESRV_13 +956 0x0000 //TX_AMS_RESRV_14 +957 0x0000 //TX_AMS_RESRV_15 +958 0x0000 //TX_AMS_RESRV_16 +959 0x0000 //TX_AMS_RESRV_17 +960 0x0000 //TX_AMS_RESRV_18 +961 0x0000 //TX_AMS_RESRV_19 #RX -0 0x006C //RX_RECVFUNC_MODE_0 +0 0x206C //RX_RECVFUNC_MODE_0 1 0x0000 //RX_RECVFUNC_MODE_1 2 0x0001 //RX_SAMPLINGFREQ_SIG 3 0x0001 //RX_SAMPLINGFREQ_PROC @@ -19285,10 +28521,862 @@ 110 0x0000 //RX_FDDRC_RESRV_0 129 0x0100 //RX_SPK_VOL 130 0x0000 //RX_VOL_RESRV_0 +#RX 2 +157 0x206C //RX_RECVFUNC_MODE_0 +158 0x0000 //RX_RECVFUNC_MODE_1 +159 0x0001 //RX_SAMPLINGFREQ_SIG +160 0x0001 //RX_SAMPLINGFREQ_PROC +161 0x000A //RX_FRAME_SZ +162 0x0000 //RX_DELAY_OPT +163 0x1000 //RX_TDDRC_ALPHA_UP_1 +164 0x1000 //RX_TDDRC_ALPHA_UP_2 +165 0x1000 //RX_TDDRC_ALPHA_UP_3 +166 0x1000 //RX_TDDRC_ALPHA_UP_4 +167 0x0800 //RX_PGA +168 0x7FFF //RX_A_HP +169 0x4000 //RX_B_PE +170 0x3800 //RX_THR_PITCH_DET_0 +171 0x3000 //RX_THR_PITCH_DET_1 +172 0x2800 //RX_THR_PITCH_DET_2 +173 0x0008 //RX_PITCH_BFR_LEN +174 0x0003 //RX_SBD_PITCH_DET +175 0x0100 //RX_PP_RESRV_0 +176 0x0020 //RX_PP_RESRV_1 +177 0x0600 //RX_N_SN_EST +178 0x000C //RX_N2_SN_EST +179 0x0010 //RX_NS_LVL_CTRL +180 0xF800 //RX_THR_SN_EST +181 0x7CCD //RX_LAMBDA_PFILT +182 0x000A //RX_FENS_RESRV_0 +183 0x0190 //RX_FENS_RESRV_1 +184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +187 0x0002 //RX_EXTRA_NS_L +188 0x0800 //RX_EXTRA_NS_A +189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +190 0x7FFF //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +192 0x199A //RX_A_POST_FLT +193 0x0000 //RX_LMT_THRD +194 0x4000 //RX_LMT_ALPHA +195 0x001C //RX_FDEQ_SUBNUM +196 0x4848 //RX_FDEQ_GAIN_0 +197 0x4848 //RX_FDEQ_GAIN_1 +198 0x4848 //RX_FDEQ_GAIN_2 +199 0x4848 //RX_FDEQ_GAIN_3 +200 0x4848 //RX_FDEQ_GAIN_4 +201 0x4848 //RX_FDEQ_GAIN_5 +202 0x4848 //RX_FDEQ_GAIN_6 +203 0x4848 //RX_FDEQ_GAIN_7 +204 0x4848 //RX_FDEQ_GAIN_8 +205 0x3C3C //RX_FDEQ_GAIN_9 +206 0x3C3C //RX_FDEQ_GAIN_10 +207 0x3838 //RX_FDEQ_GAIN_11 +208 0x3838 //RX_FDEQ_GAIN_12 +209 0x3030 //RX_FDEQ_GAIN_13 +210 0x4848 //RX_FDEQ_GAIN_14 +211 0x4848 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0202 //RX_FDEQ_BIN_0 +221 0x0203 //RX_FDEQ_BIN_1 +222 0x0303 //RX_FDEQ_BIN_2 +223 0x0304 //RX_FDEQ_BIN_3 +224 0x0405 //RX_FDEQ_BIN_4 +225 0x0506 //RX_FDEQ_BIN_5 +226 0x0708 //RX_FDEQ_BIN_6 +227 0x090A //RX_FDEQ_BIN_7 +228 0x0B0C //RX_FDEQ_BIN_8 +229 0x0D0E //RX_FDEQ_BIN_9 +230 0x0E0F //RX_FDEQ_BIN_10 +231 0x0F10 //RX_FDEQ_BIN_11 +232 0x1011 //RX_FDEQ_BIN_12 +233 0x1112 //RX_FDEQ_BIN_13 +234 0x0000 //RX_FDEQ_BIN_14 +235 0x0000 //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x4000 //RX_FDEQ_RESRV_0 +245 0x0320 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0030 //RX_FDDRC_BAND_MARGIN_1 +248 0x0050 //RX_FDDRC_BAND_MARGIN_2 +249 0x0080 //RX_FDDRC_BAND_MARGIN_3 +250 0x0007 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x5000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x6400 //RX_FDDRC_THRD_3_2 +258 0x6400 //RX_FDDRC_THRD_3_3 +259 0x2000 //RX_FDDRC_SLANT_0_0 +260 0x2000 //RX_FDDRC_SLANT_0_1 +261 0x2000 //RX_FDDRC_SLANT_0_2 +262 0x2000 //RX_FDDRC_SLANT_0_3 +263 0x5333 //RX_FDDRC_SLANT_1_0 +264 0x5333 //RX_FDDRC_SLANT_1_1 +265 0x5333 //RX_FDDRC_SLANT_1_2 +266 0x5333 //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +268 0x0000 //RX_FILTINDX +269 0x0000 //RX_TDDRC_THRD_0 +270 0x0000 //RX_TDDRC_THRD_1 +271 0x7FFF //RX_TDDRC_THRD_2 +272 0x7FFF //RX_TDDRC_THRD_3 +273 0x7E70 //RX_TDDRC_SLANT_0 +274 0x7FFF //RX_TDDRC_SLANT_1 +275 0x1000 //RX_TDDRC_ALPHA_UP_0 +276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x199A //RX_TDDRC_HMNC_GAIN +279 0x0001 //RX_TDDRC_SMT_FLAG +280 0x0CCD //RX_TDDRC_SMT_W +281 0x0155 //RX_TDDRC_DRC_GAIN +282 0x7C00 //RX_LAMBDA_PKA_FP +283 0x2000 //RX_TPKA_FP +284 0x2000 //RX_MIN_G_FP +285 0x0080 //RX_MAX_G_FP +286 0x0100 //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 +288 0x0000 //RX_MAXLEVEL_CNG +289 0x3000 //RX_BWE_UV_TH +290 0x3000 //RX_BWE_UV_TH2 +291 0x1800 //RX_BWE_UV_TH3 +292 0x1000 //RX_BWE_V_TH +293 0x04CD //RX_BWE_GAIN1_V_TH1 +294 0x0F33 //RX_BWE_GAIN1_V_TH2 +295 0x7333 //RX_BWE_UV_EQ +296 0x199A //RX_BWE_V_EQ +297 0x7333 //RX_BWE_TONE_TH +298 0x0004 //RX_BWE_UV_HOLD_T +299 0x6CCD //RX_BWE_GAIN2_ALPHA +300 0x799A //RX_BWE_GAIN3_ALPHA +301 0x001E //RX_BWE_CUTOFF +302 0x3000 //RX_BWE_GAINFILL +303 0x3200 //RX_BWE_MAXTH_TONE +304 0x2000 //RX_BWE_EQ_0 +305 0x2000 //RX_BWE_EQ_1 +306 0x2000 //RX_BWE_EQ_2 +307 0x2000 //RX_BWE_EQ_3 +308 0x2000 //RX_BWE_EQ_4 +309 0x2000 //RX_BWE_EQ_5 +310 0x2000 //RX_BWE_EQ_6 +311 0x0000 //RX_BWE_RESRV_0 +312 0x0000 //RX_BWE_RESRV_1 +313 0x0000 //RX_BWE_RESRV_2 +#VOL 0 +163 0x1000 //RX_TDDRC_ALPHA_UP_1 +164 0x1000 //RX_TDDRC_ALPHA_UP_2 +165 0x1000 //RX_TDDRC_ALPHA_UP_3 +166 0x1000 //RX_TDDRC_ALPHA_UP_4 +184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +190 0x7FFF //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +269 0x0000 //RX_TDDRC_THRD_0 +270 0x0000 //RX_TDDRC_THRD_1 +271 0x7FFF //RX_TDDRC_THRD_2 +272 0x7FFF //RX_TDDRC_THRD_3 +273 0x7E70 //RX_TDDRC_SLANT_0 +274 0x7FFF //RX_TDDRC_SLANT_1 +275 0x1000 //RX_TDDRC_ALPHA_UP_0 +276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x199A //RX_TDDRC_HMNC_GAIN +279 0x0001 //RX_TDDRC_SMT_FLAG +280 0x0CCD //RX_TDDRC_SMT_W +281 0x0155 //RX_TDDRC_DRC_GAIN +195 0x001C //RX_FDEQ_SUBNUM +196 0x4848 //RX_FDEQ_GAIN_0 +197 0x4848 //RX_FDEQ_GAIN_1 +198 0x4848 //RX_FDEQ_GAIN_2 +199 0x4848 //RX_FDEQ_GAIN_3 +200 0x4848 //RX_FDEQ_GAIN_4 +201 0x4848 //RX_FDEQ_GAIN_5 +202 0x4848 //RX_FDEQ_GAIN_6 +203 0x4848 //RX_FDEQ_GAIN_7 +204 0x4848 //RX_FDEQ_GAIN_8 +205 0x3C3C //RX_FDEQ_GAIN_9 +206 0x3C3C //RX_FDEQ_GAIN_10 +207 0x3838 //RX_FDEQ_GAIN_11 +208 0x3838 //RX_FDEQ_GAIN_12 +209 0x3030 //RX_FDEQ_GAIN_13 +210 0x4848 //RX_FDEQ_GAIN_14 +211 0x4848 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0202 //RX_FDEQ_BIN_0 +221 0x0203 //RX_FDEQ_BIN_1 +222 0x0303 //RX_FDEQ_BIN_2 +223 0x0304 //RX_FDEQ_BIN_3 +224 0x0405 //RX_FDEQ_BIN_4 +225 0x0506 //RX_FDEQ_BIN_5 +226 0x0708 //RX_FDEQ_BIN_6 +227 0x090A //RX_FDEQ_BIN_7 +228 0x0B0C //RX_FDEQ_BIN_8 +229 0x0D0E //RX_FDEQ_BIN_9 +230 0x0E0F //RX_FDEQ_BIN_10 +231 0x0F10 //RX_FDEQ_BIN_11 +232 0x1011 //RX_FDEQ_BIN_12 +233 0x1112 //RX_FDEQ_BIN_13 +234 0x0000 //RX_FDEQ_BIN_14 +235 0x0000 //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x4000 //RX_FDEQ_RESRV_0 +245 0x0320 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0030 //RX_FDDRC_BAND_MARGIN_1 +248 0x0050 //RX_FDDRC_BAND_MARGIN_2 +249 0x0080 //RX_FDDRC_BAND_MARGIN_3 +250 0x0007 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x5000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x6400 //RX_FDDRC_THRD_3_2 +258 0x6400 //RX_FDDRC_THRD_3_3 +259 0x2000 //RX_FDDRC_SLANT_0_0 +260 0x2000 //RX_FDDRC_SLANT_0_1 +261 0x2000 //RX_FDDRC_SLANT_0_2 +262 0x2000 //RX_FDDRC_SLANT_0_3 +263 0x5333 //RX_FDDRC_SLANT_1_0 +264 0x5333 //RX_FDDRC_SLANT_1_1 +265 0x5333 //RX_FDDRC_SLANT_1_2 +266 0x5333 //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +286 0x0100 //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 +#VOL 1 +163 0x1000 //RX_TDDRC_ALPHA_UP_1 +164 0x1000 //RX_TDDRC_ALPHA_UP_2 +165 0x1000 //RX_TDDRC_ALPHA_UP_3 +166 0x1000 //RX_TDDRC_ALPHA_UP_4 +184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +190 0x7FFF //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +269 0x0000 //RX_TDDRC_THRD_0 +270 0x0000 //RX_TDDRC_THRD_1 +271 0x7FFF //RX_TDDRC_THRD_2 +272 0x7FFF //RX_TDDRC_THRD_3 +273 0x7E70 //RX_TDDRC_SLANT_0 +274 0x7FFF //RX_TDDRC_SLANT_1 +275 0x1000 //RX_TDDRC_ALPHA_UP_0 +276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x199A //RX_TDDRC_HMNC_GAIN +279 0x0001 //RX_TDDRC_SMT_FLAG +280 0x0CCD //RX_TDDRC_SMT_W +281 0x0155 //RX_TDDRC_DRC_GAIN +195 0x001C //RX_FDEQ_SUBNUM +196 0x4848 //RX_FDEQ_GAIN_0 +197 0x4848 //RX_FDEQ_GAIN_1 +198 0x4848 //RX_FDEQ_GAIN_2 +199 0x4848 //RX_FDEQ_GAIN_3 +200 0x4848 //RX_FDEQ_GAIN_4 +201 0x4848 //RX_FDEQ_GAIN_5 +202 0x4848 //RX_FDEQ_GAIN_6 +203 0x4848 //RX_FDEQ_GAIN_7 +204 0x4848 //RX_FDEQ_GAIN_8 +205 0x3C3C //RX_FDEQ_GAIN_9 +206 0x3C3C //RX_FDEQ_GAIN_10 +207 0x3838 //RX_FDEQ_GAIN_11 +208 0x3838 //RX_FDEQ_GAIN_12 +209 0x3030 //RX_FDEQ_GAIN_13 +210 0x4848 //RX_FDEQ_GAIN_14 +211 0x4848 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0202 //RX_FDEQ_BIN_0 +221 0x0203 //RX_FDEQ_BIN_1 +222 0x0303 //RX_FDEQ_BIN_2 +223 0x0304 //RX_FDEQ_BIN_3 +224 0x0405 //RX_FDEQ_BIN_4 +225 0x0506 //RX_FDEQ_BIN_5 +226 0x0708 //RX_FDEQ_BIN_6 +227 0x090A //RX_FDEQ_BIN_7 +228 0x0B0C //RX_FDEQ_BIN_8 +229 0x0D0E //RX_FDEQ_BIN_9 +230 0x0E0F //RX_FDEQ_BIN_10 +231 0x0F10 //RX_FDEQ_BIN_11 +232 0x1011 //RX_FDEQ_BIN_12 +233 0x1112 //RX_FDEQ_BIN_13 +234 0x0000 //RX_FDEQ_BIN_14 +235 0x0000 //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x4000 //RX_FDEQ_RESRV_0 +245 0x0320 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0030 //RX_FDDRC_BAND_MARGIN_1 +248 0x0050 //RX_FDDRC_BAND_MARGIN_2 +249 0x0080 //RX_FDDRC_BAND_MARGIN_3 +250 0x0007 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x5000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x6400 //RX_FDDRC_THRD_3_2 +258 0x6400 //RX_FDDRC_THRD_3_3 +259 0x2000 //RX_FDDRC_SLANT_0_0 +260 0x2000 //RX_FDDRC_SLANT_0_1 +261 0x2000 //RX_FDDRC_SLANT_0_2 +262 0x2000 //RX_FDDRC_SLANT_0_3 +263 0x5333 //RX_FDDRC_SLANT_1_0 +264 0x5333 //RX_FDDRC_SLANT_1_1 +265 0x5333 //RX_FDDRC_SLANT_1_2 +266 0x5333 //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +286 0x0100 //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 +#VOL 2 +163 0x1000 //RX_TDDRC_ALPHA_UP_1 +164 0x1000 //RX_TDDRC_ALPHA_UP_2 +165 0x1000 //RX_TDDRC_ALPHA_UP_3 +166 0x1000 //RX_TDDRC_ALPHA_UP_4 +184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +190 0x7FFF //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +269 0x0000 //RX_TDDRC_THRD_0 +270 0x0000 //RX_TDDRC_THRD_1 +271 0x7FFF //RX_TDDRC_THRD_2 +272 0x7FFF //RX_TDDRC_THRD_3 +273 0x7E70 //RX_TDDRC_SLANT_0 +274 0x7FFF //RX_TDDRC_SLANT_1 +275 0x1000 //RX_TDDRC_ALPHA_UP_0 +276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x199A //RX_TDDRC_HMNC_GAIN +279 0x0001 //RX_TDDRC_SMT_FLAG +280 0x0CCD //RX_TDDRC_SMT_W +281 0x0155 //RX_TDDRC_DRC_GAIN +195 0x001C //RX_FDEQ_SUBNUM +196 0x4848 //RX_FDEQ_GAIN_0 +197 0x4848 //RX_FDEQ_GAIN_1 +198 0x4848 //RX_FDEQ_GAIN_2 +199 0x4848 //RX_FDEQ_GAIN_3 +200 0x4848 //RX_FDEQ_GAIN_4 +201 0x4848 //RX_FDEQ_GAIN_5 +202 0x4848 //RX_FDEQ_GAIN_6 +203 0x4848 //RX_FDEQ_GAIN_7 +204 0x4848 //RX_FDEQ_GAIN_8 +205 0x3C3C //RX_FDEQ_GAIN_9 +206 0x3C3C //RX_FDEQ_GAIN_10 +207 0x3838 //RX_FDEQ_GAIN_11 +208 0x3838 //RX_FDEQ_GAIN_12 +209 0x3030 //RX_FDEQ_GAIN_13 +210 0x4848 //RX_FDEQ_GAIN_14 +211 0x4848 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0202 //RX_FDEQ_BIN_0 +221 0x0203 //RX_FDEQ_BIN_1 +222 0x0303 //RX_FDEQ_BIN_2 +223 0x0304 //RX_FDEQ_BIN_3 +224 0x0405 //RX_FDEQ_BIN_4 +225 0x0506 //RX_FDEQ_BIN_5 +226 0x0708 //RX_FDEQ_BIN_6 +227 0x090A //RX_FDEQ_BIN_7 +228 0x0B0C //RX_FDEQ_BIN_8 +229 0x0D0E //RX_FDEQ_BIN_9 +230 0x0E0F //RX_FDEQ_BIN_10 +231 0x0F10 //RX_FDEQ_BIN_11 +232 0x1011 //RX_FDEQ_BIN_12 +233 0x1112 //RX_FDEQ_BIN_13 +234 0x0000 //RX_FDEQ_BIN_14 +235 0x0000 //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x4000 //RX_FDEQ_RESRV_0 +245 0x0320 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0030 //RX_FDDRC_BAND_MARGIN_1 +248 0x0050 //RX_FDDRC_BAND_MARGIN_2 +249 0x0080 //RX_FDDRC_BAND_MARGIN_3 +250 0x0007 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x5000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x6400 //RX_FDDRC_THRD_3_2 +258 0x6400 //RX_FDDRC_THRD_3_3 +259 0x2000 //RX_FDDRC_SLANT_0_0 +260 0x2000 //RX_FDDRC_SLANT_0_1 +261 0x2000 //RX_FDDRC_SLANT_0_2 +262 0x2000 //RX_FDDRC_SLANT_0_3 +263 0x5333 //RX_FDDRC_SLANT_1_0 +264 0x5333 //RX_FDDRC_SLANT_1_1 +265 0x5333 //RX_FDDRC_SLANT_1_2 +266 0x5333 //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +286 0x0100 //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 +#VOL 3 +163 0x1000 //RX_TDDRC_ALPHA_UP_1 +164 0x1000 //RX_TDDRC_ALPHA_UP_2 +165 0x1000 //RX_TDDRC_ALPHA_UP_3 +166 0x1000 //RX_TDDRC_ALPHA_UP_4 +184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +190 0x7FFF //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +269 0x0000 //RX_TDDRC_THRD_0 +270 0x0000 //RX_TDDRC_THRD_1 +271 0x7FFF //RX_TDDRC_THRD_2 +272 0x7FFF //RX_TDDRC_THRD_3 +273 0x7E70 //RX_TDDRC_SLANT_0 +274 0x7FFF //RX_TDDRC_SLANT_1 +275 0x1000 //RX_TDDRC_ALPHA_UP_0 +276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x199A //RX_TDDRC_HMNC_GAIN +279 0x0001 //RX_TDDRC_SMT_FLAG +280 0x0CCD //RX_TDDRC_SMT_W +281 0x0155 //RX_TDDRC_DRC_GAIN +195 0x001C //RX_FDEQ_SUBNUM +196 0x4848 //RX_FDEQ_GAIN_0 +197 0x4848 //RX_FDEQ_GAIN_1 +198 0x4848 //RX_FDEQ_GAIN_2 +199 0x4848 //RX_FDEQ_GAIN_3 +200 0x4848 //RX_FDEQ_GAIN_4 +201 0x4848 //RX_FDEQ_GAIN_5 +202 0x4848 //RX_FDEQ_GAIN_6 +203 0x4848 //RX_FDEQ_GAIN_7 +204 0x4848 //RX_FDEQ_GAIN_8 +205 0x3C3C //RX_FDEQ_GAIN_9 +206 0x3C3C //RX_FDEQ_GAIN_10 +207 0x3838 //RX_FDEQ_GAIN_11 +208 0x3838 //RX_FDEQ_GAIN_12 +209 0x3030 //RX_FDEQ_GAIN_13 +210 0x4848 //RX_FDEQ_GAIN_14 +211 0x4848 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0202 //RX_FDEQ_BIN_0 +221 0x0203 //RX_FDEQ_BIN_1 +222 0x0303 //RX_FDEQ_BIN_2 +223 0x0304 //RX_FDEQ_BIN_3 +224 0x0405 //RX_FDEQ_BIN_4 +225 0x0506 //RX_FDEQ_BIN_5 +226 0x0708 //RX_FDEQ_BIN_6 +227 0x090A //RX_FDEQ_BIN_7 +228 0x0B0C //RX_FDEQ_BIN_8 +229 0x0D0E //RX_FDEQ_BIN_9 +230 0x0E0F //RX_FDEQ_BIN_10 +231 0x0F10 //RX_FDEQ_BIN_11 +232 0x1011 //RX_FDEQ_BIN_12 +233 0x1112 //RX_FDEQ_BIN_13 +234 0x0000 //RX_FDEQ_BIN_14 +235 0x0000 //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x4000 //RX_FDEQ_RESRV_0 +245 0x0320 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0030 //RX_FDDRC_BAND_MARGIN_1 +248 0x0050 //RX_FDDRC_BAND_MARGIN_2 +249 0x0080 //RX_FDDRC_BAND_MARGIN_3 +250 0x0007 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x5000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x6400 //RX_FDDRC_THRD_3_2 +258 0x6400 //RX_FDDRC_THRD_3_3 +259 0x2000 //RX_FDDRC_SLANT_0_0 +260 0x2000 //RX_FDDRC_SLANT_0_1 +261 0x2000 //RX_FDDRC_SLANT_0_2 +262 0x2000 //RX_FDDRC_SLANT_0_3 +263 0x5333 //RX_FDDRC_SLANT_1_0 +264 0x5333 //RX_FDDRC_SLANT_1_1 +265 0x5333 //RX_FDDRC_SLANT_1_2 +266 0x5333 //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +286 0x0100 //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 +#VOL 4 +163 0x1000 //RX_TDDRC_ALPHA_UP_1 +164 0x1000 //RX_TDDRC_ALPHA_UP_2 +165 0x1000 //RX_TDDRC_ALPHA_UP_3 +166 0x1000 //RX_TDDRC_ALPHA_UP_4 +184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +190 0x7FFF //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +269 0x0000 //RX_TDDRC_THRD_0 +270 0x0000 //RX_TDDRC_THRD_1 +271 0x7FFF //RX_TDDRC_THRD_2 +272 0x7FFF //RX_TDDRC_THRD_3 +273 0x7E70 //RX_TDDRC_SLANT_0 +274 0x7FFF //RX_TDDRC_SLANT_1 +275 0x1000 //RX_TDDRC_ALPHA_UP_0 +276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x199A //RX_TDDRC_HMNC_GAIN +279 0x0001 //RX_TDDRC_SMT_FLAG +280 0x0CCD //RX_TDDRC_SMT_W +281 0x0155 //RX_TDDRC_DRC_GAIN +195 0x001C //RX_FDEQ_SUBNUM +196 0x4848 //RX_FDEQ_GAIN_0 +197 0x4848 //RX_FDEQ_GAIN_1 +198 0x4848 //RX_FDEQ_GAIN_2 +199 0x4848 //RX_FDEQ_GAIN_3 +200 0x4848 //RX_FDEQ_GAIN_4 +201 0x4848 //RX_FDEQ_GAIN_5 +202 0x4848 //RX_FDEQ_GAIN_6 +203 0x4848 //RX_FDEQ_GAIN_7 +204 0x4848 //RX_FDEQ_GAIN_8 +205 0x3C3C //RX_FDEQ_GAIN_9 +206 0x3C3C //RX_FDEQ_GAIN_10 +207 0x3838 //RX_FDEQ_GAIN_11 +208 0x3838 //RX_FDEQ_GAIN_12 +209 0x3030 //RX_FDEQ_GAIN_13 +210 0x4848 //RX_FDEQ_GAIN_14 +211 0x4848 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0202 //RX_FDEQ_BIN_0 +221 0x0203 //RX_FDEQ_BIN_1 +222 0x0303 //RX_FDEQ_BIN_2 +223 0x0304 //RX_FDEQ_BIN_3 +224 0x0405 //RX_FDEQ_BIN_4 +225 0x0506 //RX_FDEQ_BIN_5 +226 0x0708 //RX_FDEQ_BIN_6 +227 0x090A //RX_FDEQ_BIN_7 +228 0x0B0C //RX_FDEQ_BIN_8 +229 0x0D0E //RX_FDEQ_BIN_9 +230 0x0E0F //RX_FDEQ_BIN_10 +231 0x0F10 //RX_FDEQ_BIN_11 +232 0x1011 //RX_FDEQ_BIN_12 +233 0x1112 //RX_FDEQ_BIN_13 +234 0x0000 //RX_FDEQ_BIN_14 +235 0x0000 //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x4000 //RX_FDEQ_RESRV_0 +245 0x0320 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0030 //RX_FDDRC_BAND_MARGIN_1 +248 0x0050 //RX_FDDRC_BAND_MARGIN_2 +249 0x0080 //RX_FDDRC_BAND_MARGIN_3 +250 0x0007 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x5000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x6400 //RX_FDDRC_THRD_3_2 +258 0x6400 //RX_FDDRC_THRD_3_3 +259 0x2000 //RX_FDDRC_SLANT_0_0 +260 0x2000 //RX_FDDRC_SLANT_0_1 +261 0x2000 //RX_FDDRC_SLANT_0_2 +262 0x2000 //RX_FDDRC_SLANT_0_3 +263 0x5333 //RX_FDDRC_SLANT_1_0 +264 0x5333 //RX_FDDRC_SLANT_1_1 +265 0x5333 //RX_FDDRC_SLANT_1_2 +266 0x5333 //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +286 0x0100 //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 +#VOL 5 +163 0x1000 //RX_TDDRC_ALPHA_UP_1 +164 0x1000 //RX_TDDRC_ALPHA_UP_2 +165 0x1000 //RX_TDDRC_ALPHA_UP_3 +166 0x1000 //RX_TDDRC_ALPHA_UP_4 +184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +190 0x7FFF //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +269 0x0000 //RX_TDDRC_THRD_0 +270 0x0000 //RX_TDDRC_THRD_1 +271 0x7FFF //RX_TDDRC_THRD_2 +272 0x7FFF //RX_TDDRC_THRD_3 +273 0x7E70 //RX_TDDRC_SLANT_0 +274 0x7FFF //RX_TDDRC_SLANT_1 +275 0x1000 //RX_TDDRC_ALPHA_UP_0 +276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x199A //RX_TDDRC_HMNC_GAIN +279 0x0001 //RX_TDDRC_SMT_FLAG +280 0x0CCD //RX_TDDRC_SMT_W +281 0x0155 //RX_TDDRC_DRC_GAIN +195 0x001C //RX_FDEQ_SUBNUM +196 0x4848 //RX_FDEQ_GAIN_0 +197 0x4848 //RX_FDEQ_GAIN_1 +198 0x4848 //RX_FDEQ_GAIN_2 +199 0x4848 //RX_FDEQ_GAIN_3 +200 0x4848 //RX_FDEQ_GAIN_4 +201 0x4848 //RX_FDEQ_GAIN_5 +202 0x4848 //RX_FDEQ_GAIN_6 +203 0x4848 //RX_FDEQ_GAIN_7 +204 0x4848 //RX_FDEQ_GAIN_8 +205 0x3C3C //RX_FDEQ_GAIN_9 +206 0x3C3C //RX_FDEQ_GAIN_10 +207 0x3838 //RX_FDEQ_GAIN_11 +208 0x3838 //RX_FDEQ_GAIN_12 +209 0x3030 //RX_FDEQ_GAIN_13 +210 0x4848 //RX_FDEQ_GAIN_14 +211 0x4848 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0202 //RX_FDEQ_BIN_0 +221 0x0203 //RX_FDEQ_BIN_1 +222 0x0303 //RX_FDEQ_BIN_2 +223 0x0304 //RX_FDEQ_BIN_3 +224 0x0405 //RX_FDEQ_BIN_4 +225 0x0506 //RX_FDEQ_BIN_5 +226 0x0708 //RX_FDEQ_BIN_6 +227 0x090A //RX_FDEQ_BIN_7 +228 0x0B0C //RX_FDEQ_BIN_8 +229 0x0D0E //RX_FDEQ_BIN_9 +230 0x0E0F //RX_FDEQ_BIN_10 +231 0x0F10 //RX_FDEQ_BIN_11 +232 0x1011 //RX_FDEQ_BIN_12 +233 0x1112 //RX_FDEQ_BIN_13 +234 0x0000 //RX_FDEQ_BIN_14 +235 0x0000 //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x4000 //RX_FDEQ_RESRV_0 +245 0x0320 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0030 //RX_FDDRC_BAND_MARGIN_1 +248 0x0050 //RX_FDDRC_BAND_MARGIN_2 +249 0x0080 //RX_FDDRC_BAND_MARGIN_3 +250 0x0007 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x5000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x6400 //RX_FDDRC_THRD_3_2 +258 0x6400 //RX_FDDRC_THRD_3_3 +259 0x2000 //RX_FDDRC_SLANT_0_0 +260 0x2000 //RX_FDDRC_SLANT_0_1 +261 0x2000 //RX_FDDRC_SLANT_0_2 +262 0x2000 //RX_FDDRC_SLANT_0_3 +263 0x5333 //RX_FDDRC_SLANT_1_0 +264 0x5333 //RX_FDDRC_SLANT_1_1 +265 0x5333 //RX_FDDRC_SLANT_1_2 +266 0x5333 //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +286 0x0100 //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 +#VOL 6 +163 0x1000 //RX_TDDRC_ALPHA_UP_1 +164 0x1000 //RX_TDDRC_ALPHA_UP_2 +165 0x1000 //RX_TDDRC_ALPHA_UP_3 +166 0x1000 //RX_TDDRC_ALPHA_UP_4 +184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +190 0x7FFF //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +269 0x0000 //RX_TDDRC_THRD_0 +270 0x0000 //RX_TDDRC_THRD_1 +271 0x7FFF //RX_TDDRC_THRD_2 +272 0x7FFF //RX_TDDRC_THRD_3 +273 0x7E70 //RX_TDDRC_SLANT_0 +274 0x7FFF //RX_TDDRC_SLANT_1 +275 0x1000 //RX_TDDRC_ALPHA_UP_0 +276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x199A //RX_TDDRC_HMNC_GAIN +279 0x0001 //RX_TDDRC_SMT_FLAG +280 0x0CCD //RX_TDDRC_SMT_W +281 0x0155 //RX_TDDRC_DRC_GAIN +195 0x001C //RX_FDEQ_SUBNUM +196 0x4848 //RX_FDEQ_GAIN_0 +197 0x4848 //RX_FDEQ_GAIN_1 +198 0x4848 //RX_FDEQ_GAIN_2 +199 0x4848 //RX_FDEQ_GAIN_3 +200 0x4848 //RX_FDEQ_GAIN_4 +201 0x4848 //RX_FDEQ_GAIN_5 +202 0x4848 //RX_FDEQ_GAIN_6 +203 0x4848 //RX_FDEQ_GAIN_7 +204 0x4848 //RX_FDEQ_GAIN_8 +205 0x3C3C //RX_FDEQ_GAIN_9 +206 0x3C3C //RX_FDEQ_GAIN_10 +207 0x3838 //RX_FDEQ_GAIN_11 +208 0x3838 //RX_FDEQ_GAIN_12 +209 0x3030 //RX_FDEQ_GAIN_13 +210 0x4848 //RX_FDEQ_GAIN_14 +211 0x4848 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0202 //RX_FDEQ_BIN_0 +221 0x0203 //RX_FDEQ_BIN_1 +222 0x0303 //RX_FDEQ_BIN_2 +223 0x0304 //RX_FDEQ_BIN_3 +224 0x0405 //RX_FDEQ_BIN_4 +225 0x0506 //RX_FDEQ_BIN_5 +226 0x0708 //RX_FDEQ_BIN_6 +227 0x090A //RX_FDEQ_BIN_7 +228 0x0B0C //RX_FDEQ_BIN_8 +229 0x0D0E //RX_FDEQ_BIN_9 +230 0x0E0F //RX_FDEQ_BIN_10 +231 0x0F10 //RX_FDEQ_BIN_11 +232 0x1011 //RX_FDEQ_BIN_12 +233 0x1112 //RX_FDEQ_BIN_13 +234 0x0000 //RX_FDEQ_BIN_14 +235 0x0000 //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x4000 //RX_FDEQ_RESRV_0 +245 0x0320 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0030 //RX_FDDRC_BAND_MARGIN_1 +248 0x0050 //RX_FDDRC_BAND_MARGIN_2 +249 0x0080 //RX_FDDRC_BAND_MARGIN_3 +250 0x0007 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x5000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x6400 //RX_FDDRC_THRD_3_2 +258 0x6400 //RX_FDDRC_THRD_3_3 +259 0x2000 //RX_FDDRC_SLANT_0_0 +260 0x2000 //RX_FDDRC_SLANT_0_1 +261 0x2000 //RX_FDDRC_SLANT_0_2 +262 0x2000 //RX_FDDRC_SLANT_0_3 +263 0x5333 //RX_FDDRC_SLANT_1_0 +264 0x5333 //RX_FDDRC_SLANT_1_1 +265 0x5333 //RX_FDDRC_SLANT_1_2 +266 0x5333 //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +286 0x0100 //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 #CASE_NAME BLUETOOTH-BTNB_NREC-VOICE_GENERIC-SWB -#PARAM_TYPE TX+RX -#TOTAL_CUSTOM_STEP 7 +#PARAM_MODE Full +#PARAM_TYPE TX+2RX +#TOTAL_CUSTOM_STEP 7+7 #TX 0 0x0001 //TX_OPERATION_MODE_0 1 0x0001 //TX_OPERATION_MODE_1 @@ -19541,20 +29629,20 @@ 248 0xF400 //TX_THR_SN_EST_6 249 0xF600 //TX_THR_SN_EST_7 250 0x0000 //TX_DELTA_THR_SN_EST_0 -251 0x0000 //TX_DELTA_THR_SN_EST_1 +251 0x0200 //TX_DELTA_THR_SN_EST_1 252 0x0200 //TX_DELTA_THR_SN_EST_2 253 0x0200 //TX_DELTA_THR_SN_EST_3 254 0x0200 //TX_DELTA_THR_SN_EST_4 255 0x0200 //TX_DELTA_THR_SN_EST_5 -256 0x0200 //TX_DELTA_THR_SN_EST_6 +256 0x0000 //TX_DELTA_THR_SN_EST_6 257 0x0200 //TX_DELTA_THR_SN_EST_7 258 0x6000 //TX_LAMBDA_NN_EST_0 -259 0x6000 //TX_LAMBDA_NN_EST_1 +259 0x4000 //TX_LAMBDA_NN_EST_1 260 0x4000 //TX_LAMBDA_NN_EST_2 261 0x4000 //TX_LAMBDA_NN_EST_3 262 0x4000 //TX_LAMBDA_NN_EST_4 263 0x4000 //TX_LAMBDA_NN_EST_5 -264 0x4000 //TX_LAMBDA_NN_EST_6 +264 0x6000 //TX_LAMBDA_NN_EST_6 265 0x4000 //TX_LAMBDA_NN_EST_7 266 0x0400 //TX_N_SN_EST 267 0x001E //TX_INBEAM_T @@ -19572,16 +29660,16 @@ 279 0x1000 //TX_B_POST_FLT_0 280 0x1000 //TX_B_POST_FLT_1 281 0x000B //TX_NS_LVL_CTRL_0 -282 0x000F //TX_NS_LVL_CTRL_1 -283 0x0011 //TX_NS_LVL_CTRL_2 +282 0x0011 //TX_NS_LVL_CTRL_1 +283 0x000F //TX_NS_LVL_CTRL_2 284 0x000F //TX_NS_LVL_CTRL_3 285 0x000F //TX_NS_LVL_CTRL_4 286 0x000F //TX_NS_LVL_CTRL_5 287 0x000F //TX_NS_LVL_CTRL_6 288 0x0011 //TX_NS_LVL_CTRL_7 289 0x000C //TX_MIN_GAIN_S_0 -290 0x000C //TX_MIN_GAIN_S_1 -291 0x000F //TX_MIN_GAIN_S_2 +290 0x000F //TX_MIN_GAIN_S_1 +291 0x000C //TX_MIN_GAIN_S_2 292 0x000C //TX_MIN_GAIN_S_3 293 0x000C //TX_MIN_GAIN_S_4 294 0x000C //TX_MIN_GAIN_S_5 @@ -19605,12 +29693,12 @@ 312 0x7FFF //TX_A_POST_FILT_0 313 0x2000 //TX_A_POST_FILT_1 314 0x2000 //TX_A_POST_FILT_S_0 -315 0x4000 //TX_A_POST_FILT_S_1 +315 0x5000 //TX_A_POST_FILT_S_1 316 0x5000 //TX_A_POST_FILT_S_2 317 0x5000 //TX_A_POST_FILT_S_3 318 0x5000 //TX_A_POST_FILT_S_4 319 0x5000 //TX_A_POST_FILT_S_5 -320 0x5000 //TX_A_POST_FILT_S_6 +320 0x4000 //TX_A_POST_FILT_S_6 321 0x5000 //TX_A_POST_FILT_S_7 322 0x1000 //TX_B_POST_FILT_0 323 0x1000 //TX_B_POST_FILT_1 @@ -19670,10 +29758,10 @@ 377 0x7FFF //TX_NOISE_TH_5_4 378 0x044C //TX_NOISE_TH_6 379 0x0014 //TX_MINENOISE_TH -380 0x4000 //TX_MINENOISE_MIC0_TH_MTS -381 0xFFEE //TX_MINENOISE_MIC0_TH_EXP -382 0x6000 //TX_MINENOISE_MIC0_S_TH_MTS -383 0xFFF3 //TX_MINENOISE_MIC0_S_TH_EXP +380 0x4000 //TX_MORENS_TFMASK_TH +381 0xFFEE //TX_DRC_QUIET_FLOOR +382 0x6000 //TX_RATIODTL_CUT_TH +383 0xFFF3 //TX_DT_CUT_K1 384 0x0666 //TX_OUT_ENER_S_TH_CLEAN 385 0x0666 //TX_OUT_ENER_S_TH_LESSCLEAN 386 0x0333 //TX_OUT_ENER_S_TH_NOISY @@ -19681,15 +29769,15 @@ 388 0x0333 //TX_OUT_ENER_TH_SPEECH 389 0x2000 //TX_SN_NPB_GAIN 390 0x0000 //TX_NN_NPB_GAIN -391 0x0000 //TX_CSX_ALPHA_0 -392 0x0000 //TX_CSX_ALPHA_1 -393 0x0000 //TX_CSX_ALPHA_2 -394 0x0000 //TX_CSX_ALPHA_3 -395 0x0800 //TX_MU_ARSP_EST -396 0x00C8 //TX_P_OUTBEAM_MIN_TH +391 0x0000 //TX_POST_MASK_SUP_HSNE +392 0x0000 //TX_TAIL_DET_TH +393 0x0000 //TX_B_LESSCUT_RTO_WTA +394 0x0000 //TX_MEL_G_R +395 0x0800 //TX_SUPHIGH_TH +396 0x00C8 //TX_MASK_G_R 397 0x0002 //TX_EXTRA_NS_L -398 0x0800 //TX_EXTRA_NS_A -399 0x0005 //TX_VR_NOISE_FLOOR_TH +398 0x0800 //TX_C_POST_FLT_MASK +399 0x0005 //TX_A_POST_FLT_WNS 400 0x0148 //TX_MIN_G_LOW300HZ 401 0x0002 //TX_MAXLEVEL_CNG 402 0x00B4 //TX_STN_NOISE_TH @@ -19804,16 +29892,16 @@ 511 0x6666 //TX_MIC_TO_BFGAIN 512 0x0000 //TX_MICTOBFGAIN0 513 0x0000 //TX_FASTMUE_TH -514 0x0000 //TX_DERVB_LEN_0 -515 0x0000 //TX_DERVB_LEN_1 -516 0x0000 //TX_RHO_DERVB -517 0x0000 //TX_MIC_INDX_DERVB -518 0x0000 //TX_MU_DERVB -519 0x0000 //TX_DR_RESRV_0 -520 0x0000 //TX_DR_RESRV_1 -521 0x0000 //TX_DR_RESRV_2 -522 0x0000 //TX_DR_RESRV_3 -523 0x0000 //TX_DR_RESRV_4 +514 0x0000 //TX_DEREVERB_LF_MU +515 0x0000 //TX_DEREVERB_HF_MU +516 0x0000 //TX_DEREVERB_DELAY +517 0x0000 //TX_DEREVERB_COEF_LEN +518 0x0000 //TX_DEREVERB_DNR +519 0x0000 //TX_DEREVERB_ALPHA +520 0x0000 //TX_DEREVERB_BETA +521 0x0000 //TX_GSC_RTOL_TH +522 0x0000 //TX_GSC_RTOH_TH +523 0x0000 //TX_WIDE2_MEANHTH 524 0x0000 //TX_DR_RESRV_5 525 0x0000 //TX_DR_RESRV_6 526 0x0000 //TX_DR_RESRV_7 @@ -20187,8 +30275,73 @@ 894 0xC000 //TX_FASTNS_SSA_THHFL 895 0xCCCC //TX_FASTNS_SSA_THLFH 896 0xD999 //TX_FASTNS_SSA_THHFH +897 0x0000 //TX_SENDFUNC_REG_MICMUTE +898 0x0000 //TX_SENDFUNC_REG_MICMUTE1 +899 0x0000 //TX_MICMUTE_RATIO_THR +900 0x0000 //TX_MICMUTE_AMP_THR +901 0x0000 //TX_MICMUTE_HPF_IND +902 0x0000 //TX_MICMUTE_LOG_EYR_TH +903 0x0000 //TX_MICMUTE_CVG_TIME +904 0x0000 //TX_MICMUTE_RELEASE_TIME +905 0x0000 //TX_MIC_VOLUME_MIC0MUTE +906 0x0000 //TX_MICMUTE_EPD_OFFSET_0 +907 0x0000 //TX_MICMUTE_FRQ_AEC_L +908 0x0000 //TX_MICMUTE_EAD_THR +909 0x0000 //TX_MICMUTE_LAMBDA_CB_NLE +910 0x0000 //TX_MICMUTE_LAMBDA_RE_EST +911 0x0000 //TX_DTD_THR1_MICMUTE_0 +912 0x0000 //TX_DTD_THR1_MICMUTE_1 +913 0x0000 //TX_DTD_THR1_MICMUTE_2 +914 0x0000 //TX_DTD_THR1_MICMUTE_3 +915 0x0000 //TX_DTD_THR2_MICMUTE_0 +916 0x0000 //TX_MICMUTE_MIN_EQ_RE_EST_0 +917 0x0000 //TX_MICMUTE_MIN_EQ_RE_EST_1 +918 0x0000 //TX_MICMUTE_MIN_EQ_RE_EST_2 +919 0x0000 //TX_MICMUTE_MIN_EQ_RE_EST_3 +920 0x0000 //TX_MICMUTE_MIN_EQ_RE_EST_4 +921 0x0000 //TX_MICMUTE_C_POST_FLT +922 0x0000 //TX_MICMUTE_DT_CUT_K +923 0x0000 //TX_MICMUTE_DT_CUT_THR +924 0x0000 //TX_MICMUTE_DT_CUT_K2 +925 0x0000 //TX_MICMUTE_DT_CUT_THR2 +926 0x0000 //TX_MICMUTE_DT2_HOLD_N +927 0x0000 //TX_MICMUTE_RATIODTH_THCUT +928 0x0000 //TX_MICMUTE_B_POST_FLT_ECHOL +929 0x0000 //TX_MICMUTE_B_POST_FLT_ECHOH +930 0x0000 //TX_MICMUTE_C_POST_FLT_MASK +931 0x0000 //TX_MICMUTE_RATIODTL_CUT_TH +932 0x0000 //TX_MICMUTE_DT_CUT_K1 +933 0x0000 //TX_MICMUTE_N2_SN_EST +934 0x0000 //TX_MICMUTE_THR_SN_EST_0 +935 0x0000 //TX_MICMUTE_MIN_G_CTRL_0 +936 0x0000 //TX_MICMUTE_A_POST_FILT_S_0 +937 0x0000 //TX_MICMUTE_B_POST_FILT_0 +938 0x0000 //TX_MIC1RUB_AMP_THR +939 0x0000 //TX_MIC1MUTE_RATIO_THR +940 0x0000 //TX_MIC1MUTE_AMP_THR +941 0x0000 //TX_MIC1MUTE_CVG_TIME +942 0x0000 //TX_MIC1MUTE_RELEASE_TIME +943 0x0000 //TX_AMS_RESRV_01 +944 0x0000 //TX_AMS_RESRV_02 +945 0x0000 //TX_AMS_RESRV_03 +946 0x0000 //TX_AMS_RESRV_04 +947 0x0000 //TX_AMS_RESRV_05 +948 0x0000 //TX_AMS_RESRV_06 +949 0x0000 //TX_AMS_RESRV_07 +950 0x0000 //TX_AMS_RESRV_08 +951 0x0000 //TX_AMS_RESRV_09 +952 0x0000 //TX_AMS_RESRV_10 +953 0x0000 //TX_AMS_RESRV_11 +954 0x0000 //TX_AMS_RESRV_12 +955 0x0000 //TX_AMS_RESRV_13 +956 0x0000 //TX_AMS_RESRV_14 +957 0x0000 //TX_AMS_RESRV_15 +958 0x0000 //TX_AMS_RESRV_16 +959 0x0000 //TX_AMS_RESRV_17 +960 0x0000 //TX_AMS_RESRV_18 +961 0x0000 //TX_AMS_RESRV_19 #RX -0 0x0064 //RX_RECVFUNC_MODE_0 +0 0x2064 //RX_RECVFUNC_MODE_0 1 0x0000 //RX_RECVFUNC_MODE_1 2 0x0003 //RX_SAMPLINGFREQ_SIG 3 0x0003 //RX_SAMPLINGFREQ_PROC @@ -21038,10 +31191,862 @@ 110 0x0000 //RX_FDDRC_RESRV_0 129 0x0100 //RX_SPK_VOL 130 0x0000 //RX_VOL_RESRV_0 +#RX 2 +157 0x2064 //RX_RECVFUNC_MODE_0 +158 0x0000 //RX_RECVFUNC_MODE_1 +159 0x0003 //RX_SAMPLINGFREQ_SIG +160 0x0003 //RX_SAMPLINGFREQ_PROC +161 0x000A //RX_FRAME_SZ +162 0x0000 //RX_DELAY_OPT +163 0x3000 //RX_TDDRC_ALPHA_UP_1 +164 0x3000 //RX_TDDRC_ALPHA_UP_2 +165 0x3000 //RX_TDDRC_ALPHA_UP_3 +166 0x3000 //RX_TDDRC_ALPHA_UP_4 +167 0x0800 //RX_PGA +168 0x7FFF //RX_A_HP +169 0x0000 //RX_B_PE +170 0x1800 //RX_THR_PITCH_DET_0 +171 0x1000 //RX_THR_PITCH_DET_1 +172 0x0800 //RX_THR_PITCH_DET_2 +173 0x0008 //RX_PITCH_BFR_LEN +174 0x0003 //RX_SBD_PITCH_DET +175 0x0100 //RX_PP_RESRV_0 +176 0x0020 //RX_PP_RESRV_1 +177 0x0400 //RX_N_SN_EST +178 0x000C //RX_N2_SN_EST +179 0x0003 //RX_NS_LVL_CTRL +180 0x9000 //RX_THR_SN_EST +181 0x7CCD //RX_LAMBDA_PFILT +182 0x000A //RX_FENS_RESRV_0 +183 0x0190 //RX_FENS_RESRV_1 +184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +187 0x0002 //RX_EXTRA_NS_L +188 0x0800 //RX_EXTRA_NS_A +189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +190 0x7FFF //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +192 0x199A //RX_A_POST_FLT +193 0x0000 //RX_LMT_THRD +194 0x4000 //RX_LMT_ALPHA +195 0x0020 //RX_FDEQ_SUBNUM +196 0x4848 //RX_FDEQ_GAIN_0 +197 0x4848 //RX_FDEQ_GAIN_1 +198 0x4848 //RX_FDEQ_GAIN_2 +199 0x4848 //RX_FDEQ_GAIN_3 +200 0x4848 //RX_FDEQ_GAIN_4 +201 0x4848 //RX_FDEQ_GAIN_5 +202 0x4848 //RX_FDEQ_GAIN_6 +203 0x4848 //RX_FDEQ_GAIN_7 +204 0x4848 //RX_FDEQ_GAIN_8 +205 0x4848 //RX_FDEQ_GAIN_9 +206 0x4848 //RX_FDEQ_GAIN_10 +207 0x4848 //RX_FDEQ_GAIN_11 +208 0x4848 //RX_FDEQ_GAIN_12 +209 0x4848 //RX_FDEQ_GAIN_13 +210 0x4848 //RX_FDEQ_GAIN_14 +211 0x4848 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0202 //RX_FDEQ_BIN_0 +221 0x0203 //RX_FDEQ_BIN_1 +222 0x0303 //RX_FDEQ_BIN_2 +223 0x0304 //RX_FDEQ_BIN_3 +224 0x0405 //RX_FDEQ_BIN_4 +225 0x0506 //RX_FDEQ_BIN_5 +226 0x0708 //RX_FDEQ_BIN_6 +227 0x090A //RX_FDEQ_BIN_7 +228 0x0B0C //RX_FDEQ_BIN_8 +229 0x0D0E //RX_FDEQ_BIN_9 +230 0x1013 //RX_FDEQ_BIN_10 +231 0x1719 //RX_FDEQ_BIN_11 +232 0x1B1E //RX_FDEQ_BIN_12 +233 0x1E1E //RX_FDEQ_BIN_13 +234 0x1E28 //RX_FDEQ_BIN_14 +235 0x282C //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x4000 //RX_FDEQ_RESRV_0 +245 0x0320 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0030 //RX_FDDRC_BAND_MARGIN_1 +248 0x0050 //RX_FDDRC_BAND_MARGIN_2 +249 0x0080 //RX_FDDRC_BAND_MARGIN_3 +250 0x0007 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x5000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x6400 //RX_FDDRC_THRD_3_2 +258 0x6400 //RX_FDDRC_THRD_3_3 +259 0x2000 //RX_FDDRC_SLANT_0_0 +260 0x2000 //RX_FDDRC_SLANT_0_1 +261 0x2000 //RX_FDDRC_SLANT_0_2 +262 0x2000 //RX_FDDRC_SLANT_0_3 +263 0x5333 //RX_FDDRC_SLANT_1_0 +264 0x5333 //RX_FDDRC_SLANT_1_1 +265 0x5333 //RX_FDDRC_SLANT_1_2 +266 0x5333 //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +268 0x0000 //RX_FILTINDX +269 0x0000 //RX_TDDRC_THRD_0 +270 0x0000 //RX_TDDRC_THRD_1 +271 0x7FFF //RX_TDDRC_THRD_2 +272 0x7FFF //RX_TDDRC_THRD_3 +273 0x7FFF //RX_TDDRC_SLANT_0 +274 0x7FFF //RX_TDDRC_SLANT_1 +275 0x3000 //RX_TDDRC_ALPHA_UP_0 +276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x199A //RX_TDDRC_HMNC_GAIN +279 0x0001 //RX_TDDRC_SMT_FLAG +280 0x0CCD //RX_TDDRC_SMT_W +281 0x0155 //RX_TDDRC_DRC_GAIN +282 0x7C00 //RX_LAMBDA_PKA_FP +283 0x2000 //RX_TPKA_FP +284 0x2000 //RX_MIN_G_FP +285 0x0080 //RX_MAX_G_FP +286 0x0100 //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 +288 0x0000 //RX_MAXLEVEL_CNG +289 0x3000 //RX_BWE_UV_TH +290 0x3000 //RX_BWE_UV_TH2 +291 0x1800 //RX_BWE_UV_TH3 +292 0x1000 //RX_BWE_V_TH +293 0x04CD //RX_BWE_GAIN1_V_TH1 +294 0x0F33 //RX_BWE_GAIN1_V_TH2 +295 0x7333 //RX_BWE_UV_EQ +296 0x199A //RX_BWE_V_EQ +297 0x7333 //RX_BWE_TONE_TH +298 0x0004 //RX_BWE_UV_HOLD_T +299 0x6CCD //RX_BWE_GAIN2_ALPHA +300 0x799A //RX_BWE_GAIN3_ALPHA +301 0x001E //RX_BWE_CUTOFF +302 0x3000 //RX_BWE_GAINFILL +303 0x3200 //RX_BWE_MAXTH_TONE +304 0x2000 //RX_BWE_EQ_0 +305 0x2000 //RX_BWE_EQ_1 +306 0x2000 //RX_BWE_EQ_2 +307 0x2000 //RX_BWE_EQ_3 +308 0x2000 //RX_BWE_EQ_4 +309 0x2000 //RX_BWE_EQ_5 +310 0x2000 //RX_BWE_EQ_6 +311 0x0000 //RX_BWE_RESRV_0 +312 0x0000 //RX_BWE_RESRV_1 +313 0x0000 //RX_BWE_RESRV_2 +#VOL 0 +163 0x3000 //RX_TDDRC_ALPHA_UP_1 +164 0x3000 //RX_TDDRC_ALPHA_UP_2 +165 0x3000 //RX_TDDRC_ALPHA_UP_3 +166 0x3000 //RX_TDDRC_ALPHA_UP_4 +184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +190 0x7FFF //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +269 0x0000 //RX_TDDRC_THRD_0 +270 0x0000 //RX_TDDRC_THRD_1 +271 0x7FFF //RX_TDDRC_THRD_2 +272 0x7FFF //RX_TDDRC_THRD_3 +273 0x7FFF //RX_TDDRC_SLANT_0 +274 0x7FFF //RX_TDDRC_SLANT_1 +275 0x3000 //RX_TDDRC_ALPHA_UP_0 +276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x199A //RX_TDDRC_HMNC_GAIN +279 0x0001 //RX_TDDRC_SMT_FLAG +280 0x0CCD //RX_TDDRC_SMT_W +281 0x0155 //RX_TDDRC_DRC_GAIN +195 0x0020 //RX_FDEQ_SUBNUM +196 0x4848 //RX_FDEQ_GAIN_0 +197 0x4848 //RX_FDEQ_GAIN_1 +198 0x4848 //RX_FDEQ_GAIN_2 +199 0x4848 //RX_FDEQ_GAIN_3 +200 0x4848 //RX_FDEQ_GAIN_4 +201 0x4848 //RX_FDEQ_GAIN_5 +202 0x4848 //RX_FDEQ_GAIN_6 +203 0x4848 //RX_FDEQ_GAIN_7 +204 0x4848 //RX_FDEQ_GAIN_8 +205 0x4848 //RX_FDEQ_GAIN_9 +206 0x4848 //RX_FDEQ_GAIN_10 +207 0x4848 //RX_FDEQ_GAIN_11 +208 0x4848 //RX_FDEQ_GAIN_12 +209 0x4848 //RX_FDEQ_GAIN_13 +210 0x4848 //RX_FDEQ_GAIN_14 +211 0x4848 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0202 //RX_FDEQ_BIN_0 +221 0x0203 //RX_FDEQ_BIN_1 +222 0x0303 //RX_FDEQ_BIN_2 +223 0x0304 //RX_FDEQ_BIN_3 +224 0x0405 //RX_FDEQ_BIN_4 +225 0x0506 //RX_FDEQ_BIN_5 +226 0x0708 //RX_FDEQ_BIN_6 +227 0x090A //RX_FDEQ_BIN_7 +228 0x0B0C //RX_FDEQ_BIN_8 +229 0x0D0E //RX_FDEQ_BIN_9 +230 0x1013 //RX_FDEQ_BIN_10 +231 0x1719 //RX_FDEQ_BIN_11 +232 0x1B1E //RX_FDEQ_BIN_12 +233 0x1E1E //RX_FDEQ_BIN_13 +234 0x1E28 //RX_FDEQ_BIN_14 +235 0x282C //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x4000 //RX_FDEQ_RESRV_0 +245 0x0320 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0030 //RX_FDDRC_BAND_MARGIN_1 +248 0x0050 //RX_FDDRC_BAND_MARGIN_2 +249 0x0080 //RX_FDDRC_BAND_MARGIN_3 +250 0x0007 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x5000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x6400 //RX_FDDRC_THRD_3_2 +258 0x6400 //RX_FDDRC_THRD_3_3 +259 0x2000 //RX_FDDRC_SLANT_0_0 +260 0x2000 //RX_FDDRC_SLANT_0_1 +261 0x2000 //RX_FDDRC_SLANT_0_2 +262 0x2000 //RX_FDDRC_SLANT_0_3 +263 0x5333 //RX_FDDRC_SLANT_1_0 +264 0x5333 //RX_FDDRC_SLANT_1_1 +265 0x5333 //RX_FDDRC_SLANT_1_2 +266 0x5333 //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +286 0x0100 //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 +#VOL 1 +163 0x3000 //RX_TDDRC_ALPHA_UP_1 +164 0x3000 //RX_TDDRC_ALPHA_UP_2 +165 0x3000 //RX_TDDRC_ALPHA_UP_3 +166 0x3000 //RX_TDDRC_ALPHA_UP_4 +184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +190 0x7FFF //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +269 0x0000 //RX_TDDRC_THRD_0 +270 0x0000 //RX_TDDRC_THRD_1 +271 0x7FFF //RX_TDDRC_THRD_2 +272 0x7FFF //RX_TDDRC_THRD_3 +273 0x7FFF //RX_TDDRC_SLANT_0 +274 0x7FFF //RX_TDDRC_SLANT_1 +275 0x3000 //RX_TDDRC_ALPHA_UP_0 +276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x199A //RX_TDDRC_HMNC_GAIN +279 0x0001 //RX_TDDRC_SMT_FLAG +280 0x0CCD //RX_TDDRC_SMT_W +281 0x0155 //RX_TDDRC_DRC_GAIN +195 0x0020 //RX_FDEQ_SUBNUM +196 0x4848 //RX_FDEQ_GAIN_0 +197 0x4848 //RX_FDEQ_GAIN_1 +198 0x4848 //RX_FDEQ_GAIN_2 +199 0x4848 //RX_FDEQ_GAIN_3 +200 0x4848 //RX_FDEQ_GAIN_4 +201 0x4848 //RX_FDEQ_GAIN_5 +202 0x4848 //RX_FDEQ_GAIN_6 +203 0x4848 //RX_FDEQ_GAIN_7 +204 0x4848 //RX_FDEQ_GAIN_8 +205 0x4848 //RX_FDEQ_GAIN_9 +206 0x4848 //RX_FDEQ_GAIN_10 +207 0x4848 //RX_FDEQ_GAIN_11 +208 0x4848 //RX_FDEQ_GAIN_12 +209 0x4848 //RX_FDEQ_GAIN_13 +210 0x4848 //RX_FDEQ_GAIN_14 +211 0x4848 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0202 //RX_FDEQ_BIN_0 +221 0x0203 //RX_FDEQ_BIN_1 +222 0x0303 //RX_FDEQ_BIN_2 +223 0x0304 //RX_FDEQ_BIN_3 +224 0x0405 //RX_FDEQ_BIN_4 +225 0x0506 //RX_FDEQ_BIN_5 +226 0x0708 //RX_FDEQ_BIN_6 +227 0x090A //RX_FDEQ_BIN_7 +228 0x0B0C //RX_FDEQ_BIN_8 +229 0x0D0E //RX_FDEQ_BIN_9 +230 0x1013 //RX_FDEQ_BIN_10 +231 0x1719 //RX_FDEQ_BIN_11 +232 0x1B1E //RX_FDEQ_BIN_12 +233 0x1E1E //RX_FDEQ_BIN_13 +234 0x1E28 //RX_FDEQ_BIN_14 +235 0x282C //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x4000 //RX_FDEQ_RESRV_0 +245 0x0320 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0030 //RX_FDDRC_BAND_MARGIN_1 +248 0x0050 //RX_FDDRC_BAND_MARGIN_2 +249 0x0080 //RX_FDDRC_BAND_MARGIN_3 +250 0x0007 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x5000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x6400 //RX_FDDRC_THRD_3_2 +258 0x6400 //RX_FDDRC_THRD_3_3 +259 0x2000 //RX_FDDRC_SLANT_0_0 +260 0x2000 //RX_FDDRC_SLANT_0_1 +261 0x2000 //RX_FDDRC_SLANT_0_2 +262 0x2000 //RX_FDDRC_SLANT_0_3 +263 0x5333 //RX_FDDRC_SLANT_1_0 +264 0x5333 //RX_FDDRC_SLANT_1_1 +265 0x5333 //RX_FDDRC_SLANT_1_2 +266 0x5333 //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +286 0x0100 //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 +#VOL 2 +163 0x3000 //RX_TDDRC_ALPHA_UP_1 +164 0x3000 //RX_TDDRC_ALPHA_UP_2 +165 0x3000 //RX_TDDRC_ALPHA_UP_3 +166 0x3000 //RX_TDDRC_ALPHA_UP_4 +184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +190 0x7FFF //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +269 0x0000 //RX_TDDRC_THRD_0 +270 0x0000 //RX_TDDRC_THRD_1 +271 0x7FFF //RX_TDDRC_THRD_2 +272 0x7FFF //RX_TDDRC_THRD_3 +273 0x7FFF //RX_TDDRC_SLANT_0 +274 0x7FFF //RX_TDDRC_SLANT_1 +275 0x3000 //RX_TDDRC_ALPHA_UP_0 +276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x199A //RX_TDDRC_HMNC_GAIN +279 0x0001 //RX_TDDRC_SMT_FLAG +280 0x0CCD //RX_TDDRC_SMT_W +281 0x0155 //RX_TDDRC_DRC_GAIN +195 0x0020 //RX_FDEQ_SUBNUM +196 0x4848 //RX_FDEQ_GAIN_0 +197 0x4848 //RX_FDEQ_GAIN_1 +198 0x4848 //RX_FDEQ_GAIN_2 +199 0x4848 //RX_FDEQ_GAIN_3 +200 0x4848 //RX_FDEQ_GAIN_4 +201 0x4848 //RX_FDEQ_GAIN_5 +202 0x4848 //RX_FDEQ_GAIN_6 +203 0x4848 //RX_FDEQ_GAIN_7 +204 0x4848 //RX_FDEQ_GAIN_8 +205 0x4848 //RX_FDEQ_GAIN_9 +206 0x4848 //RX_FDEQ_GAIN_10 +207 0x4848 //RX_FDEQ_GAIN_11 +208 0x4848 //RX_FDEQ_GAIN_12 +209 0x4848 //RX_FDEQ_GAIN_13 +210 0x4848 //RX_FDEQ_GAIN_14 +211 0x4848 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0202 //RX_FDEQ_BIN_0 +221 0x0203 //RX_FDEQ_BIN_1 +222 0x0303 //RX_FDEQ_BIN_2 +223 0x0304 //RX_FDEQ_BIN_3 +224 0x0405 //RX_FDEQ_BIN_4 +225 0x0506 //RX_FDEQ_BIN_5 +226 0x0708 //RX_FDEQ_BIN_6 +227 0x090A //RX_FDEQ_BIN_7 +228 0x0B0C //RX_FDEQ_BIN_8 +229 0x0D0E //RX_FDEQ_BIN_9 +230 0x1013 //RX_FDEQ_BIN_10 +231 0x1719 //RX_FDEQ_BIN_11 +232 0x1B1E //RX_FDEQ_BIN_12 +233 0x1E1E //RX_FDEQ_BIN_13 +234 0x1E28 //RX_FDEQ_BIN_14 +235 0x282C //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x4000 //RX_FDEQ_RESRV_0 +245 0x0320 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0030 //RX_FDDRC_BAND_MARGIN_1 +248 0x0050 //RX_FDDRC_BAND_MARGIN_2 +249 0x0080 //RX_FDDRC_BAND_MARGIN_3 +250 0x0007 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x5000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x6400 //RX_FDDRC_THRD_3_2 +258 0x6400 //RX_FDDRC_THRD_3_3 +259 0x2000 //RX_FDDRC_SLANT_0_0 +260 0x2000 //RX_FDDRC_SLANT_0_1 +261 0x2000 //RX_FDDRC_SLANT_0_2 +262 0x2000 //RX_FDDRC_SLANT_0_3 +263 0x5333 //RX_FDDRC_SLANT_1_0 +264 0x5333 //RX_FDDRC_SLANT_1_1 +265 0x5333 //RX_FDDRC_SLANT_1_2 +266 0x5333 //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +286 0x0100 //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 +#VOL 3 +163 0x3000 //RX_TDDRC_ALPHA_UP_1 +164 0x3000 //RX_TDDRC_ALPHA_UP_2 +165 0x3000 //RX_TDDRC_ALPHA_UP_3 +166 0x3000 //RX_TDDRC_ALPHA_UP_4 +184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +190 0x7FFF //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +269 0x0000 //RX_TDDRC_THRD_0 +270 0x0000 //RX_TDDRC_THRD_1 +271 0x7FFF //RX_TDDRC_THRD_2 +272 0x7FFF //RX_TDDRC_THRD_3 +273 0x7FFF //RX_TDDRC_SLANT_0 +274 0x7FFF //RX_TDDRC_SLANT_1 +275 0x3000 //RX_TDDRC_ALPHA_UP_0 +276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x199A //RX_TDDRC_HMNC_GAIN +279 0x0001 //RX_TDDRC_SMT_FLAG +280 0x0CCD //RX_TDDRC_SMT_W +281 0x0155 //RX_TDDRC_DRC_GAIN +195 0x0020 //RX_FDEQ_SUBNUM +196 0x4848 //RX_FDEQ_GAIN_0 +197 0x4848 //RX_FDEQ_GAIN_1 +198 0x4848 //RX_FDEQ_GAIN_2 +199 0x4848 //RX_FDEQ_GAIN_3 +200 0x4848 //RX_FDEQ_GAIN_4 +201 0x4848 //RX_FDEQ_GAIN_5 +202 0x4848 //RX_FDEQ_GAIN_6 +203 0x4848 //RX_FDEQ_GAIN_7 +204 0x4848 //RX_FDEQ_GAIN_8 +205 0x4848 //RX_FDEQ_GAIN_9 +206 0x4848 //RX_FDEQ_GAIN_10 +207 0x4848 //RX_FDEQ_GAIN_11 +208 0x4848 //RX_FDEQ_GAIN_12 +209 0x4848 //RX_FDEQ_GAIN_13 +210 0x4848 //RX_FDEQ_GAIN_14 +211 0x4848 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0202 //RX_FDEQ_BIN_0 +221 0x0203 //RX_FDEQ_BIN_1 +222 0x0303 //RX_FDEQ_BIN_2 +223 0x0304 //RX_FDEQ_BIN_3 +224 0x0405 //RX_FDEQ_BIN_4 +225 0x0506 //RX_FDEQ_BIN_5 +226 0x0708 //RX_FDEQ_BIN_6 +227 0x090A //RX_FDEQ_BIN_7 +228 0x0B0C //RX_FDEQ_BIN_8 +229 0x0D0E //RX_FDEQ_BIN_9 +230 0x1013 //RX_FDEQ_BIN_10 +231 0x1719 //RX_FDEQ_BIN_11 +232 0x1B1E //RX_FDEQ_BIN_12 +233 0x1E1E //RX_FDEQ_BIN_13 +234 0x1E28 //RX_FDEQ_BIN_14 +235 0x282C //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x4000 //RX_FDEQ_RESRV_0 +245 0x0320 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0030 //RX_FDDRC_BAND_MARGIN_1 +248 0x0050 //RX_FDDRC_BAND_MARGIN_2 +249 0x0080 //RX_FDDRC_BAND_MARGIN_3 +250 0x0007 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x5000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x6400 //RX_FDDRC_THRD_3_2 +258 0x6400 //RX_FDDRC_THRD_3_3 +259 0x2000 //RX_FDDRC_SLANT_0_0 +260 0x2000 //RX_FDDRC_SLANT_0_1 +261 0x2000 //RX_FDDRC_SLANT_0_2 +262 0x2000 //RX_FDDRC_SLANT_0_3 +263 0x5333 //RX_FDDRC_SLANT_1_0 +264 0x5333 //RX_FDDRC_SLANT_1_1 +265 0x5333 //RX_FDDRC_SLANT_1_2 +266 0x5333 //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +286 0x0100 //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 +#VOL 4 +163 0x3000 //RX_TDDRC_ALPHA_UP_1 +164 0x3000 //RX_TDDRC_ALPHA_UP_2 +165 0x3000 //RX_TDDRC_ALPHA_UP_3 +166 0x3000 //RX_TDDRC_ALPHA_UP_4 +184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +190 0x7FFF //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +269 0x0000 //RX_TDDRC_THRD_0 +270 0x0000 //RX_TDDRC_THRD_1 +271 0x7FFF //RX_TDDRC_THRD_2 +272 0x7FFF //RX_TDDRC_THRD_3 +273 0x7FFF //RX_TDDRC_SLANT_0 +274 0x7FFF //RX_TDDRC_SLANT_1 +275 0x3000 //RX_TDDRC_ALPHA_UP_0 +276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x199A //RX_TDDRC_HMNC_GAIN +279 0x0001 //RX_TDDRC_SMT_FLAG +280 0x0CCD //RX_TDDRC_SMT_W +281 0x0155 //RX_TDDRC_DRC_GAIN +195 0x0020 //RX_FDEQ_SUBNUM +196 0x4848 //RX_FDEQ_GAIN_0 +197 0x4848 //RX_FDEQ_GAIN_1 +198 0x4848 //RX_FDEQ_GAIN_2 +199 0x4848 //RX_FDEQ_GAIN_3 +200 0x4848 //RX_FDEQ_GAIN_4 +201 0x4848 //RX_FDEQ_GAIN_5 +202 0x4848 //RX_FDEQ_GAIN_6 +203 0x4848 //RX_FDEQ_GAIN_7 +204 0x4848 //RX_FDEQ_GAIN_8 +205 0x4848 //RX_FDEQ_GAIN_9 +206 0x4848 //RX_FDEQ_GAIN_10 +207 0x4848 //RX_FDEQ_GAIN_11 +208 0x4848 //RX_FDEQ_GAIN_12 +209 0x4848 //RX_FDEQ_GAIN_13 +210 0x4848 //RX_FDEQ_GAIN_14 +211 0x4848 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0202 //RX_FDEQ_BIN_0 +221 0x0203 //RX_FDEQ_BIN_1 +222 0x0303 //RX_FDEQ_BIN_2 +223 0x0304 //RX_FDEQ_BIN_3 +224 0x0405 //RX_FDEQ_BIN_4 +225 0x0506 //RX_FDEQ_BIN_5 +226 0x0708 //RX_FDEQ_BIN_6 +227 0x090A //RX_FDEQ_BIN_7 +228 0x0B0C //RX_FDEQ_BIN_8 +229 0x0D0E //RX_FDEQ_BIN_9 +230 0x1013 //RX_FDEQ_BIN_10 +231 0x1719 //RX_FDEQ_BIN_11 +232 0x1B1E //RX_FDEQ_BIN_12 +233 0x1E1E //RX_FDEQ_BIN_13 +234 0x1E28 //RX_FDEQ_BIN_14 +235 0x282C //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x4000 //RX_FDEQ_RESRV_0 +245 0x0320 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0030 //RX_FDDRC_BAND_MARGIN_1 +248 0x0050 //RX_FDDRC_BAND_MARGIN_2 +249 0x0080 //RX_FDDRC_BAND_MARGIN_3 +250 0x0007 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x5000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x6400 //RX_FDDRC_THRD_3_2 +258 0x6400 //RX_FDDRC_THRD_3_3 +259 0x2000 //RX_FDDRC_SLANT_0_0 +260 0x2000 //RX_FDDRC_SLANT_0_1 +261 0x2000 //RX_FDDRC_SLANT_0_2 +262 0x2000 //RX_FDDRC_SLANT_0_3 +263 0x5333 //RX_FDDRC_SLANT_1_0 +264 0x5333 //RX_FDDRC_SLANT_1_1 +265 0x5333 //RX_FDDRC_SLANT_1_2 +266 0x5333 //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +286 0x0100 //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 +#VOL 5 +163 0x3000 //RX_TDDRC_ALPHA_UP_1 +164 0x3000 //RX_TDDRC_ALPHA_UP_2 +165 0x3000 //RX_TDDRC_ALPHA_UP_3 +166 0x3000 //RX_TDDRC_ALPHA_UP_4 +184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +190 0x7FFF //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +269 0x0000 //RX_TDDRC_THRD_0 +270 0x0000 //RX_TDDRC_THRD_1 +271 0x7FFF //RX_TDDRC_THRD_2 +272 0x7FFF //RX_TDDRC_THRD_3 +273 0x7FFF //RX_TDDRC_SLANT_0 +274 0x7FFF //RX_TDDRC_SLANT_1 +275 0x3000 //RX_TDDRC_ALPHA_UP_0 +276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x199A //RX_TDDRC_HMNC_GAIN +279 0x0001 //RX_TDDRC_SMT_FLAG +280 0x0CCD //RX_TDDRC_SMT_W +281 0x0155 //RX_TDDRC_DRC_GAIN +195 0x0020 //RX_FDEQ_SUBNUM +196 0x4848 //RX_FDEQ_GAIN_0 +197 0x4848 //RX_FDEQ_GAIN_1 +198 0x4848 //RX_FDEQ_GAIN_2 +199 0x4848 //RX_FDEQ_GAIN_3 +200 0x4848 //RX_FDEQ_GAIN_4 +201 0x4848 //RX_FDEQ_GAIN_5 +202 0x4848 //RX_FDEQ_GAIN_6 +203 0x4848 //RX_FDEQ_GAIN_7 +204 0x4848 //RX_FDEQ_GAIN_8 +205 0x4848 //RX_FDEQ_GAIN_9 +206 0x4848 //RX_FDEQ_GAIN_10 +207 0x4848 //RX_FDEQ_GAIN_11 +208 0x4848 //RX_FDEQ_GAIN_12 +209 0x4848 //RX_FDEQ_GAIN_13 +210 0x4848 //RX_FDEQ_GAIN_14 +211 0x4848 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0202 //RX_FDEQ_BIN_0 +221 0x0203 //RX_FDEQ_BIN_1 +222 0x0303 //RX_FDEQ_BIN_2 +223 0x0304 //RX_FDEQ_BIN_3 +224 0x0405 //RX_FDEQ_BIN_4 +225 0x0506 //RX_FDEQ_BIN_5 +226 0x0708 //RX_FDEQ_BIN_6 +227 0x090A //RX_FDEQ_BIN_7 +228 0x0B0C //RX_FDEQ_BIN_8 +229 0x0D0E //RX_FDEQ_BIN_9 +230 0x1013 //RX_FDEQ_BIN_10 +231 0x1719 //RX_FDEQ_BIN_11 +232 0x1B1E //RX_FDEQ_BIN_12 +233 0x1E1E //RX_FDEQ_BIN_13 +234 0x1E28 //RX_FDEQ_BIN_14 +235 0x282C //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x4000 //RX_FDEQ_RESRV_0 +245 0x0320 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0030 //RX_FDDRC_BAND_MARGIN_1 +248 0x0050 //RX_FDDRC_BAND_MARGIN_2 +249 0x0080 //RX_FDDRC_BAND_MARGIN_3 +250 0x0007 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x5000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x6400 //RX_FDDRC_THRD_3_2 +258 0x6400 //RX_FDDRC_THRD_3_3 +259 0x2000 //RX_FDDRC_SLANT_0_0 +260 0x2000 //RX_FDDRC_SLANT_0_1 +261 0x2000 //RX_FDDRC_SLANT_0_2 +262 0x2000 //RX_FDDRC_SLANT_0_3 +263 0x5333 //RX_FDDRC_SLANT_1_0 +264 0x5333 //RX_FDDRC_SLANT_1_1 +265 0x5333 //RX_FDDRC_SLANT_1_2 +266 0x5333 //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +286 0x0100 //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 +#VOL 6 +163 0x3000 //RX_TDDRC_ALPHA_UP_1 +164 0x3000 //RX_TDDRC_ALPHA_UP_2 +165 0x3000 //RX_TDDRC_ALPHA_UP_3 +166 0x3000 //RX_TDDRC_ALPHA_UP_4 +184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +190 0x7FFF //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +269 0x0000 //RX_TDDRC_THRD_0 +270 0x0000 //RX_TDDRC_THRD_1 +271 0x7FFF //RX_TDDRC_THRD_2 +272 0x7FFF //RX_TDDRC_THRD_3 +273 0x7FFF //RX_TDDRC_SLANT_0 +274 0x7FFF //RX_TDDRC_SLANT_1 +275 0x3000 //RX_TDDRC_ALPHA_UP_0 +276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x199A //RX_TDDRC_HMNC_GAIN +279 0x0001 //RX_TDDRC_SMT_FLAG +280 0x0CCD //RX_TDDRC_SMT_W +281 0x0155 //RX_TDDRC_DRC_GAIN +195 0x0020 //RX_FDEQ_SUBNUM +196 0x4848 //RX_FDEQ_GAIN_0 +197 0x4848 //RX_FDEQ_GAIN_1 +198 0x4848 //RX_FDEQ_GAIN_2 +199 0x4848 //RX_FDEQ_GAIN_3 +200 0x4848 //RX_FDEQ_GAIN_4 +201 0x4848 //RX_FDEQ_GAIN_5 +202 0x4848 //RX_FDEQ_GAIN_6 +203 0x4848 //RX_FDEQ_GAIN_7 +204 0x4848 //RX_FDEQ_GAIN_8 +205 0x4848 //RX_FDEQ_GAIN_9 +206 0x4848 //RX_FDEQ_GAIN_10 +207 0x4848 //RX_FDEQ_GAIN_11 +208 0x4848 //RX_FDEQ_GAIN_12 +209 0x4848 //RX_FDEQ_GAIN_13 +210 0x4848 //RX_FDEQ_GAIN_14 +211 0x4848 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0202 //RX_FDEQ_BIN_0 +221 0x0203 //RX_FDEQ_BIN_1 +222 0x0303 //RX_FDEQ_BIN_2 +223 0x0304 //RX_FDEQ_BIN_3 +224 0x0405 //RX_FDEQ_BIN_4 +225 0x0506 //RX_FDEQ_BIN_5 +226 0x0708 //RX_FDEQ_BIN_6 +227 0x090A //RX_FDEQ_BIN_7 +228 0x0B0C //RX_FDEQ_BIN_8 +229 0x0D0E //RX_FDEQ_BIN_9 +230 0x1013 //RX_FDEQ_BIN_10 +231 0x1719 //RX_FDEQ_BIN_11 +232 0x1B1E //RX_FDEQ_BIN_12 +233 0x1E1E //RX_FDEQ_BIN_13 +234 0x1E28 //RX_FDEQ_BIN_14 +235 0x282C //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x4000 //RX_FDEQ_RESRV_0 +245 0x0320 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0030 //RX_FDDRC_BAND_MARGIN_1 +248 0x0050 //RX_FDDRC_BAND_MARGIN_2 +249 0x0080 //RX_FDDRC_BAND_MARGIN_3 +250 0x0007 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x5000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x6400 //RX_FDDRC_THRD_3_2 +258 0x6400 //RX_FDDRC_THRD_3_3 +259 0x2000 //RX_FDDRC_SLANT_0_0 +260 0x2000 //RX_FDDRC_SLANT_0_1 +261 0x2000 //RX_FDDRC_SLANT_0_2 +262 0x2000 //RX_FDDRC_SLANT_0_3 +263 0x5333 //RX_FDDRC_SLANT_1_0 +264 0x5333 //RX_FDDRC_SLANT_1_1 +265 0x5333 //RX_FDDRC_SLANT_1_2 +266 0x5333 //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +286 0x0100 //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 #CASE_NAME BLUETOOTH-BTNB_NREC-VOICE_GENERIC-FB -#PARAM_TYPE TX+RX -#TOTAL_CUSTOM_STEP 7 +#PARAM_MODE Full +#PARAM_TYPE TX+2RX +#TOTAL_CUSTOM_STEP 7+7 #TX 0 0x0009 //TX_OPERATION_MODE_0 1 0x0009 //TX_OPERATION_MODE_1 @@ -21294,10 +32299,10 @@ 248 0xF600 //TX_THR_SN_EST_6 249 0xF600 //TX_THR_SN_EST_7 250 0x0200 //TX_DELTA_THR_SN_EST_0 -251 0x0200 //TX_DELTA_THR_SN_EST_1 -252 0x0400 //TX_DELTA_THR_SN_EST_2 -253 0x0300 //TX_DELTA_THR_SN_EST_3 -254 0x0600 //TX_DELTA_THR_SN_EST_4 +251 0x0400 //TX_DELTA_THR_SN_EST_1 +252 0x0300 //TX_DELTA_THR_SN_EST_2 +253 0x0600 //TX_DELTA_THR_SN_EST_3 +254 0x0200 //TX_DELTA_THR_SN_EST_4 255 0x0200 //TX_DELTA_THR_SN_EST_5 256 0x0200 //TX_DELTA_THR_SN_EST_6 257 0x0200 //TX_DELTA_THR_SN_EST_7 @@ -21325,31 +32330,31 @@ 279 0x2000 //TX_B_POST_FLT_0 280 0x2000 //TX_B_POST_FLT_1 281 0x0012 //TX_NS_LVL_CTRL_0 -282 0x0019 //TX_NS_LVL_CTRL_1 +282 0x0016 //TX_NS_LVL_CTRL_1 283 0x0016 //TX_NS_LVL_CTRL_2 -284 0x0016 //TX_NS_LVL_CTRL_3 -285 0x0019 //TX_NS_LVL_CTRL_4 +284 0x0019 //TX_NS_LVL_CTRL_3 +285 0x0010 //TX_NS_LVL_CTRL_4 286 0x0010 //TX_NS_LVL_CTRL_5 -287 0x0010 //TX_NS_LVL_CTRL_6 +287 0x0019 //TX_NS_LVL_CTRL_6 288 0x0010 //TX_NS_LVL_CTRL_7 289 0x000C //TX_MIN_GAIN_S_0 -290 0x0011 //TX_MIN_GAIN_S_1 +290 0x000C //TX_MIN_GAIN_S_1 291 0x000C //TX_MIN_GAIN_S_2 -292 0x000C //TX_MIN_GAIN_S_3 -293 0x000F //TX_MIN_GAIN_S_4 +292 0x000F //TX_MIN_GAIN_S_3 +293 0x000C //TX_MIN_GAIN_S_4 294 0x000C //TX_MIN_GAIN_S_5 -295 0x000C //TX_MIN_GAIN_S_6 +295 0x0011 //TX_MIN_GAIN_S_6 296 0x000C //TX_MIN_GAIN_S_7 297 0x7FFF //TX_NMOS_SUP 298 0x0000 //TX_NS_MAX_PRI_SNR_TH 299 0x0000 //TX_NMOS_SUP_MENSA 300 0x7000 //TX_SNRI_SUP_0 -301 0x6000 //TX_SNRI_SUP_1 +301 0x7000 //TX_SNRI_SUP_1 302 0x7000 //TX_SNRI_SUP_2 -303 0x7000 //TX_SNRI_SUP_3 -304 0x6000 //TX_SNRI_SUP_4 +303 0x6000 //TX_SNRI_SUP_3 +304 0x7FFF //TX_SNRI_SUP_4 305 0x7FFF //TX_SNRI_SUP_5 -306 0x7FFF //TX_SNRI_SUP_6 +306 0x6000 //TX_SNRI_SUP_6 307 0x7FFF //TX_SNRI_SUP_7 308 0x7FFF //TX_THR_LFNS 309 0x0016 //TX_G_LFNS @@ -21366,8 +32371,8 @@ 320 0x6000 //TX_A_POST_FILT_S_6 321 0x6000 //TX_A_POST_FILT_S_7 322 0x2000 //TX_B_POST_FILT_0 -323 0x2000 //TX_B_POST_FILT_1 -324 0x4000 //TX_B_POST_FILT_2 +323 0x4000 //TX_B_POST_FILT_1 +324 0x2000 //TX_B_POST_FILT_2 325 0x2000 //TX_B_POST_FILT_3 326 0x2000 //TX_B_POST_FILT_4 327 0x2000 //TX_B_POST_FILT_5 @@ -21423,10 +32428,10 @@ 377 0x0000 //TX_NOISE_TH_5_4 378 0x02BC //TX_NOISE_TH_6 379 0x0020 //TX_MINENOISE_TH -380 0x4000 //TX_MINENOISE_MIC0_TH_MTS -381 0xFFEE //TX_MINENOISE_MIC0_TH_EXP -382 0x6000 //TX_MINENOISE_MIC0_S_TH_MTS -383 0xFFF3 //TX_MINENOISE_MIC0_S_TH_EXP +380 0x4000 //TX_MORENS_TFMASK_TH +381 0xFFEE //TX_DRC_QUIET_FLOOR +382 0x6000 //TX_RATIODTL_CUT_TH +383 0xFFF3 //TX_DT_CUT_K1 384 0x0666 //TX_OUT_ENER_S_TH_CLEAN 385 0x0666 //TX_OUT_ENER_S_TH_LESSCLEAN 386 0x0333 //TX_OUT_ENER_S_TH_NOISY @@ -21434,15 +32439,15 @@ 388 0x0333 //TX_OUT_ENER_TH_SPEECH 389 0x2000 //TX_SN_NPB_GAIN 390 0x0000 //TX_NN_NPB_GAIN -391 0x0000 //TX_CSX_ALPHA_0 -392 0x0000 //TX_CSX_ALPHA_1 -393 0x0000 //TX_CSX_ALPHA_2 -394 0x0000 //TX_CSX_ALPHA_3 -395 0x0800 //TX_MU_ARSP_EST -396 0x00C8 //TX_P_OUTBEAM_MIN_TH +391 0x0000 //TX_POST_MASK_SUP_HSNE +392 0x0000 //TX_TAIL_DET_TH +393 0x0000 //TX_B_LESSCUT_RTO_WTA +394 0x0000 //TX_MEL_G_R +395 0x0800 //TX_SUPHIGH_TH +396 0x00C8 //TX_MASK_G_R 397 0x0002 //TX_EXTRA_NS_L -398 0x0800 //TX_EXTRA_NS_A -399 0x0005 //TX_VR_NOISE_FLOOR_TH +398 0x0800 //TX_C_POST_FLT_MASK +399 0x0005 //TX_A_POST_FLT_WNS 400 0x0148 //TX_MIN_G_LOW300HZ 401 0x0002 //TX_MAXLEVEL_CNG 402 0x00B4 //TX_STN_NOISE_TH @@ -21557,16 +32562,16 @@ 511 0x6666 //TX_MIC_TO_BFGAIN 512 0x0000 //TX_MICTOBFGAIN0 513 0x0000 //TX_FASTMUE_TH -514 0x0000 //TX_DERVB_LEN_0 -515 0x0000 //TX_DERVB_LEN_1 -516 0x0000 //TX_RHO_DERVB -517 0x0000 //TX_MIC_INDX_DERVB -518 0x0000 //TX_MU_DERVB -519 0x0000 //TX_DR_RESRV_0 -520 0x0000 //TX_DR_RESRV_1 -521 0x0000 //TX_DR_RESRV_2 -522 0x0000 //TX_DR_RESRV_3 -523 0x0000 //TX_DR_RESRV_4 +514 0x0000 //TX_DEREVERB_LF_MU +515 0x0000 //TX_DEREVERB_HF_MU +516 0x0000 //TX_DEREVERB_DELAY +517 0x0000 //TX_DEREVERB_COEF_LEN +518 0x0000 //TX_DEREVERB_DNR +519 0x0000 //TX_DEREVERB_ALPHA +520 0x0000 //TX_DEREVERB_BETA +521 0x0000 //TX_GSC_RTOL_TH +522 0x0000 //TX_GSC_RTOH_TH +523 0x0000 //TX_WIDE2_MEANHTH 524 0x0000 //TX_DR_RESRV_5 525 0x0000 //TX_DR_RESRV_6 526 0x0000 //TX_DR_RESRV_7 @@ -21940,8 +32945,73 @@ 894 0xC000 //TX_FASTNS_SSA_THHFL 895 0xCCCC //TX_FASTNS_SSA_THLFH 896 0xD999 //TX_FASTNS_SSA_THHFH +897 0x0000 //TX_SENDFUNC_REG_MICMUTE +898 0x0000 //TX_SENDFUNC_REG_MICMUTE1 +899 0x0000 //TX_MICMUTE_RATIO_THR +900 0x0000 //TX_MICMUTE_AMP_THR +901 0x0000 //TX_MICMUTE_HPF_IND +902 0x0000 //TX_MICMUTE_LOG_EYR_TH +903 0x0000 //TX_MICMUTE_CVG_TIME +904 0x0000 //TX_MICMUTE_RELEASE_TIME +905 0x0000 //TX_MIC_VOLUME_MIC0MUTE +906 0x0000 //TX_MICMUTE_EPD_OFFSET_0 +907 0x0000 //TX_MICMUTE_FRQ_AEC_L +908 0x0000 //TX_MICMUTE_EAD_THR +909 0x0000 //TX_MICMUTE_LAMBDA_CB_NLE +910 0x0000 //TX_MICMUTE_LAMBDA_RE_EST +911 0x0000 //TX_DTD_THR1_MICMUTE_0 +912 0x0000 //TX_DTD_THR1_MICMUTE_1 +913 0x0000 //TX_DTD_THR1_MICMUTE_2 +914 0x0000 //TX_DTD_THR1_MICMUTE_3 +915 0x0000 //TX_DTD_THR2_MICMUTE_0 +916 0x0000 //TX_MICMUTE_MIN_EQ_RE_EST_0 +917 0x0000 //TX_MICMUTE_MIN_EQ_RE_EST_1 +918 0x0000 //TX_MICMUTE_MIN_EQ_RE_EST_2 +919 0x0000 //TX_MICMUTE_MIN_EQ_RE_EST_3 +920 0x0000 //TX_MICMUTE_MIN_EQ_RE_EST_4 +921 0x0000 //TX_MICMUTE_C_POST_FLT +922 0x0000 //TX_MICMUTE_DT_CUT_K +923 0x0000 //TX_MICMUTE_DT_CUT_THR +924 0x0000 //TX_MICMUTE_DT_CUT_K2 +925 0x0000 //TX_MICMUTE_DT_CUT_THR2 +926 0x0000 //TX_MICMUTE_DT2_HOLD_N +927 0x0000 //TX_MICMUTE_RATIODTH_THCUT +928 0x0000 //TX_MICMUTE_B_POST_FLT_ECHOL +929 0x0000 //TX_MICMUTE_B_POST_FLT_ECHOH +930 0x0000 //TX_MICMUTE_C_POST_FLT_MASK +931 0x0000 //TX_MICMUTE_RATIODTL_CUT_TH +932 0x0000 //TX_MICMUTE_DT_CUT_K1 +933 0x0000 //TX_MICMUTE_N2_SN_EST +934 0x0000 //TX_MICMUTE_THR_SN_EST_0 +935 0x0000 //TX_MICMUTE_MIN_G_CTRL_0 +936 0x0000 //TX_MICMUTE_A_POST_FILT_S_0 +937 0x0000 //TX_MICMUTE_B_POST_FILT_0 +938 0x0000 //TX_MIC1RUB_AMP_THR +939 0x0000 //TX_MIC1MUTE_RATIO_THR +940 0x0000 //TX_MIC1MUTE_AMP_THR +941 0x0000 //TX_MIC1MUTE_CVG_TIME +942 0x0000 //TX_MIC1MUTE_RELEASE_TIME +943 0x0000 //TX_AMS_RESRV_01 +944 0x0000 //TX_AMS_RESRV_02 +945 0x0000 //TX_AMS_RESRV_03 +946 0x0000 //TX_AMS_RESRV_04 +947 0x0000 //TX_AMS_RESRV_05 +948 0x0000 //TX_AMS_RESRV_06 +949 0x0000 //TX_AMS_RESRV_07 +950 0x0000 //TX_AMS_RESRV_08 +951 0x0000 //TX_AMS_RESRV_09 +952 0x0000 //TX_AMS_RESRV_10 +953 0x0000 //TX_AMS_RESRV_11 +954 0x0000 //TX_AMS_RESRV_12 +955 0x0000 //TX_AMS_RESRV_13 +956 0x0000 //TX_AMS_RESRV_14 +957 0x0000 //TX_AMS_RESRV_15 +958 0x0000 //TX_AMS_RESRV_16 +959 0x0000 //TX_AMS_RESRV_17 +960 0x0000 //TX_AMS_RESRV_18 +961 0x0000 //TX_AMS_RESRV_19 #RX -0 0x0064 //RX_RECVFUNC_MODE_0 +0 0x2064 //RX_RECVFUNC_MODE_0 1 0x0000 //RX_RECVFUNC_MODE_1 2 0x0004 //RX_SAMPLINGFREQ_SIG 3 0x0004 //RX_SAMPLINGFREQ_PROC @@ -22791,10 +33861,862 @@ 110 0x0000 //RX_FDDRC_RESRV_0 129 0x0100 //RX_SPK_VOL 130 0x0000 //RX_VOL_RESRV_0 +#RX 2 +157 0x0064 //RX_RECVFUNC_MODE_0 +158 0x0000 //RX_RECVFUNC_MODE_1 +159 0x0004 //RX_SAMPLINGFREQ_SIG +160 0x0004 //RX_SAMPLINGFREQ_PROC +161 0x000A //RX_FRAME_SZ +162 0x0000 //RX_DELAY_OPT +163 0x1000 //RX_TDDRC_ALPHA_UP_1 +164 0x1000 //RX_TDDRC_ALPHA_UP_2 +165 0x1000 //RX_TDDRC_ALPHA_UP_3 +166 0x1000 //RX_TDDRC_ALPHA_UP_4 +167 0x0800 //RX_PGA +168 0x7FFF //RX_A_HP +169 0x4000 //RX_B_PE +170 0x7800 //RX_THR_PITCH_DET_0 +171 0x7000 //RX_THR_PITCH_DET_1 +172 0x6000 //RX_THR_PITCH_DET_2 +173 0x0008 //RX_PITCH_BFR_LEN +174 0x0003 //RX_SBD_PITCH_DET +175 0x0100 //RX_PP_RESRV_0 +176 0x0020 //RX_PP_RESRV_1 +177 0x0500 //RX_N_SN_EST +178 0x000C //RX_N2_SN_EST +179 0x000A //RX_NS_LVL_CTRL +180 0xF600 //RX_THR_SN_EST +181 0x7000 //RX_LAMBDA_PFILT +182 0x000A //RX_FENS_RESRV_0 +183 0x0190 //RX_FENS_RESRV_1 +184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +187 0x0002 //RX_EXTRA_NS_L +188 0x0800 //RX_EXTRA_NS_A +189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +190 0x7FFF //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +192 0x199A //RX_A_POST_FLT +193 0x0000 //RX_LMT_THRD +194 0x4000 //RX_LMT_ALPHA +195 0x0020 //RX_FDEQ_SUBNUM +196 0x4848 //RX_FDEQ_GAIN_0 +197 0x4848 //RX_FDEQ_GAIN_1 +198 0x4848 //RX_FDEQ_GAIN_2 +199 0x4848 //RX_FDEQ_GAIN_3 +200 0x4848 //RX_FDEQ_GAIN_4 +201 0x4848 //RX_FDEQ_GAIN_5 +202 0x4848 //RX_FDEQ_GAIN_6 +203 0x4848 //RX_FDEQ_GAIN_7 +204 0x4848 //RX_FDEQ_GAIN_8 +205 0x4848 //RX_FDEQ_GAIN_9 +206 0x4848 //RX_FDEQ_GAIN_10 +207 0x4848 //RX_FDEQ_GAIN_11 +208 0x4848 //RX_FDEQ_GAIN_12 +209 0x4848 //RX_FDEQ_GAIN_13 +210 0x4848 //RX_FDEQ_GAIN_14 +211 0x4848 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0202 //RX_FDEQ_BIN_0 +221 0x0203 //RX_FDEQ_BIN_1 +222 0x0304 //RX_FDEQ_BIN_2 +223 0x0405 //RX_FDEQ_BIN_3 +224 0x0607 //RX_FDEQ_BIN_4 +225 0x0809 //RX_FDEQ_BIN_5 +226 0x0A0B //RX_FDEQ_BIN_6 +227 0x0C0D //RX_FDEQ_BIN_7 +228 0x0E0F //RX_FDEQ_BIN_8 +229 0x1011 //RX_FDEQ_BIN_9 +230 0x1214 //RX_FDEQ_BIN_10 +231 0x1618 //RX_FDEQ_BIN_11 +232 0x1C1C //RX_FDEQ_BIN_12 +233 0x2020 //RX_FDEQ_BIN_13 +234 0x2020 //RX_FDEQ_BIN_14 +235 0x2011 //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x4000 //RX_FDEQ_RESRV_0 +245 0x0320 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0030 //RX_FDDRC_BAND_MARGIN_1 +248 0x0050 //RX_FDDRC_BAND_MARGIN_2 +249 0x0080 //RX_FDDRC_BAND_MARGIN_3 +250 0x0007 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x5000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x6400 //RX_FDDRC_THRD_3_2 +258 0x6400 //RX_FDDRC_THRD_3_3 +259 0x2000 //RX_FDDRC_SLANT_0_0 +260 0x2000 //RX_FDDRC_SLANT_0_1 +261 0x2000 //RX_FDDRC_SLANT_0_2 +262 0x2000 //RX_FDDRC_SLANT_0_3 +263 0x5333 //RX_FDDRC_SLANT_1_0 +264 0x5333 //RX_FDDRC_SLANT_1_1 +265 0x5333 //RX_FDDRC_SLANT_1_2 +266 0x5333 //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +268 0x0000 //RX_FILTINDX +269 0x0000 //RX_TDDRC_THRD_0 +270 0x0000 //RX_TDDRC_THRD_1 +271 0x7FFF //RX_TDDRC_THRD_2 +272 0x7FFF //RX_TDDRC_THRD_3 +273 0x7FFF //RX_TDDRC_SLANT_0 +274 0x7FFF //RX_TDDRC_SLANT_1 +275 0x1000 //RX_TDDRC_ALPHA_UP_0 +276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x199A //RX_TDDRC_HMNC_GAIN +279 0x0001 //RX_TDDRC_SMT_FLAG +280 0x0CCD //RX_TDDRC_SMT_W +281 0x0155 //RX_TDDRC_DRC_GAIN +282 0x7C00 //RX_LAMBDA_PKA_FP +283 0x2000 //RX_TPKA_FP +284 0x2000 //RX_MIN_G_FP +285 0x0080 //RX_MAX_G_FP +286 0x0100 //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 +288 0x0000 //RX_MAXLEVEL_CNG +289 0x3000 //RX_BWE_UV_TH +290 0x3000 //RX_BWE_UV_TH2 +291 0x1800 //RX_BWE_UV_TH3 +292 0x1000 //RX_BWE_V_TH +293 0x04CD //RX_BWE_GAIN1_V_TH1 +294 0x0F33 //RX_BWE_GAIN1_V_TH2 +295 0x7333 //RX_BWE_UV_EQ +296 0x199A //RX_BWE_V_EQ +297 0x7333 //RX_BWE_TONE_TH +298 0x0004 //RX_BWE_UV_HOLD_T +299 0x6CCD //RX_BWE_GAIN2_ALPHA +300 0x799A //RX_BWE_GAIN3_ALPHA +301 0x001E //RX_BWE_CUTOFF +302 0x3000 //RX_BWE_GAINFILL +303 0x3200 //RX_BWE_MAXTH_TONE +304 0x2000 //RX_BWE_EQ_0 +305 0x2000 //RX_BWE_EQ_1 +306 0x2000 //RX_BWE_EQ_2 +307 0x2000 //RX_BWE_EQ_3 +308 0x2000 //RX_BWE_EQ_4 +309 0x2000 //RX_BWE_EQ_5 +310 0x2000 //RX_BWE_EQ_6 +311 0x0000 //RX_BWE_RESRV_0 +312 0x0000 //RX_BWE_RESRV_1 +313 0x0000 //RX_BWE_RESRV_2 +#VOL 0 +163 0x1000 //RX_TDDRC_ALPHA_UP_1 +164 0x1000 //RX_TDDRC_ALPHA_UP_2 +165 0x1000 //RX_TDDRC_ALPHA_UP_3 +166 0x1000 //RX_TDDRC_ALPHA_UP_4 +184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +190 0x7FFF //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +269 0x0000 //RX_TDDRC_THRD_0 +270 0x0000 //RX_TDDRC_THRD_1 +271 0x7FFF //RX_TDDRC_THRD_2 +272 0x7FFF //RX_TDDRC_THRD_3 +273 0x7FFF //RX_TDDRC_SLANT_0 +274 0x7FFF //RX_TDDRC_SLANT_1 +275 0x1000 //RX_TDDRC_ALPHA_UP_0 +276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x199A //RX_TDDRC_HMNC_GAIN +279 0x0001 //RX_TDDRC_SMT_FLAG +280 0x0CCD //RX_TDDRC_SMT_W +281 0x0155 //RX_TDDRC_DRC_GAIN +195 0x0020 //RX_FDEQ_SUBNUM +196 0x4848 //RX_FDEQ_GAIN_0 +197 0x4848 //RX_FDEQ_GAIN_1 +198 0x4848 //RX_FDEQ_GAIN_2 +199 0x4848 //RX_FDEQ_GAIN_3 +200 0x4848 //RX_FDEQ_GAIN_4 +201 0x4848 //RX_FDEQ_GAIN_5 +202 0x4848 //RX_FDEQ_GAIN_6 +203 0x4848 //RX_FDEQ_GAIN_7 +204 0x4848 //RX_FDEQ_GAIN_8 +205 0x4848 //RX_FDEQ_GAIN_9 +206 0x4848 //RX_FDEQ_GAIN_10 +207 0x4848 //RX_FDEQ_GAIN_11 +208 0x4848 //RX_FDEQ_GAIN_12 +209 0x4848 //RX_FDEQ_GAIN_13 +210 0x4848 //RX_FDEQ_GAIN_14 +211 0x4848 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0202 //RX_FDEQ_BIN_0 +221 0x0203 //RX_FDEQ_BIN_1 +222 0x0304 //RX_FDEQ_BIN_2 +223 0x0405 //RX_FDEQ_BIN_3 +224 0x0607 //RX_FDEQ_BIN_4 +225 0x0809 //RX_FDEQ_BIN_5 +226 0x0A0B //RX_FDEQ_BIN_6 +227 0x0C0D //RX_FDEQ_BIN_7 +228 0x0E0F //RX_FDEQ_BIN_8 +229 0x1011 //RX_FDEQ_BIN_9 +230 0x1214 //RX_FDEQ_BIN_10 +231 0x1618 //RX_FDEQ_BIN_11 +232 0x1C1C //RX_FDEQ_BIN_12 +233 0x2020 //RX_FDEQ_BIN_13 +234 0x2020 //RX_FDEQ_BIN_14 +235 0x2011 //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x4000 //RX_FDEQ_RESRV_0 +245 0x0320 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0030 //RX_FDDRC_BAND_MARGIN_1 +248 0x0050 //RX_FDDRC_BAND_MARGIN_2 +249 0x0080 //RX_FDDRC_BAND_MARGIN_3 +250 0x0007 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x5000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x6400 //RX_FDDRC_THRD_3_2 +258 0x6400 //RX_FDDRC_THRD_3_3 +259 0x2000 //RX_FDDRC_SLANT_0_0 +260 0x2000 //RX_FDDRC_SLANT_0_1 +261 0x2000 //RX_FDDRC_SLANT_0_2 +262 0x2000 //RX_FDDRC_SLANT_0_3 +263 0x5333 //RX_FDDRC_SLANT_1_0 +264 0x5333 //RX_FDDRC_SLANT_1_1 +265 0x5333 //RX_FDDRC_SLANT_1_2 +266 0x5333 //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +286 0x0100 //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 +#VOL 1 +163 0x1000 //RX_TDDRC_ALPHA_UP_1 +164 0x1000 //RX_TDDRC_ALPHA_UP_2 +165 0x1000 //RX_TDDRC_ALPHA_UP_3 +166 0x1000 //RX_TDDRC_ALPHA_UP_4 +184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +190 0x7FFF //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +269 0x0000 //RX_TDDRC_THRD_0 +270 0x0000 //RX_TDDRC_THRD_1 +271 0x7FFF //RX_TDDRC_THRD_2 +272 0x7FFF //RX_TDDRC_THRD_3 +273 0x7FFF //RX_TDDRC_SLANT_0 +274 0x7FFF //RX_TDDRC_SLANT_1 +275 0x1000 //RX_TDDRC_ALPHA_UP_0 +276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x199A //RX_TDDRC_HMNC_GAIN +279 0x0001 //RX_TDDRC_SMT_FLAG +280 0x0CCD //RX_TDDRC_SMT_W +281 0x0155 //RX_TDDRC_DRC_GAIN +195 0x0020 //RX_FDEQ_SUBNUM +196 0x4848 //RX_FDEQ_GAIN_0 +197 0x4848 //RX_FDEQ_GAIN_1 +198 0x4848 //RX_FDEQ_GAIN_2 +199 0x4848 //RX_FDEQ_GAIN_3 +200 0x4848 //RX_FDEQ_GAIN_4 +201 0x4848 //RX_FDEQ_GAIN_5 +202 0x4848 //RX_FDEQ_GAIN_6 +203 0x4848 //RX_FDEQ_GAIN_7 +204 0x4848 //RX_FDEQ_GAIN_8 +205 0x4848 //RX_FDEQ_GAIN_9 +206 0x4848 //RX_FDEQ_GAIN_10 +207 0x4848 //RX_FDEQ_GAIN_11 +208 0x4848 //RX_FDEQ_GAIN_12 +209 0x4848 //RX_FDEQ_GAIN_13 +210 0x4848 //RX_FDEQ_GAIN_14 +211 0x4848 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0202 //RX_FDEQ_BIN_0 +221 0x0203 //RX_FDEQ_BIN_1 +222 0x0304 //RX_FDEQ_BIN_2 +223 0x0405 //RX_FDEQ_BIN_3 +224 0x0607 //RX_FDEQ_BIN_4 +225 0x0809 //RX_FDEQ_BIN_5 +226 0x0A0B //RX_FDEQ_BIN_6 +227 0x0C0D //RX_FDEQ_BIN_7 +228 0x0E0F //RX_FDEQ_BIN_8 +229 0x1011 //RX_FDEQ_BIN_9 +230 0x1214 //RX_FDEQ_BIN_10 +231 0x1618 //RX_FDEQ_BIN_11 +232 0x1C1C //RX_FDEQ_BIN_12 +233 0x2020 //RX_FDEQ_BIN_13 +234 0x2020 //RX_FDEQ_BIN_14 +235 0x2011 //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x4000 //RX_FDEQ_RESRV_0 +245 0x0320 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0030 //RX_FDDRC_BAND_MARGIN_1 +248 0x0050 //RX_FDDRC_BAND_MARGIN_2 +249 0x0080 //RX_FDDRC_BAND_MARGIN_3 +250 0x0007 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x5000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x6400 //RX_FDDRC_THRD_3_2 +258 0x6400 //RX_FDDRC_THRD_3_3 +259 0x2000 //RX_FDDRC_SLANT_0_0 +260 0x2000 //RX_FDDRC_SLANT_0_1 +261 0x2000 //RX_FDDRC_SLANT_0_2 +262 0x2000 //RX_FDDRC_SLANT_0_3 +263 0x5333 //RX_FDDRC_SLANT_1_0 +264 0x5333 //RX_FDDRC_SLANT_1_1 +265 0x5333 //RX_FDDRC_SLANT_1_2 +266 0x5333 //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +286 0x0100 //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 +#VOL 2 +163 0x1000 //RX_TDDRC_ALPHA_UP_1 +164 0x1000 //RX_TDDRC_ALPHA_UP_2 +165 0x1000 //RX_TDDRC_ALPHA_UP_3 +166 0x1000 //RX_TDDRC_ALPHA_UP_4 +184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +190 0x7FFF //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +269 0x0000 //RX_TDDRC_THRD_0 +270 0x0000 //RX_TDDRC_THRD_1 +271 0x7FFF //RX_TDDRC_THRD_2 +272 0x7FFF //RX_TDDRC_THRD_3 +273 0x7FFF //RX_TDDRC_SLANT_0 +274 0x7FFF //RX_TDDRC_SLANT_1 +275 0x1000 //RX_TDDRC_ALPHA_UP_0 +276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x199A //RX_TDDRC_HMNC_GAIN +279 0x0001 //RX_TDDRC_SMT_FLAG +280 0x0CCD //RX_TDDRC_SMT_W +281 0x0155 //RX_TDDRC_DRC_GAIN +195 0x0020 //RX_FDEQ_SUBNUM +196 0x4848 //RX_FDEQ_GAIN_0 +197 0x4848 //RX_FDEQ_GAIN_1 +198 0x4848 //RX_FDEQ_GAIN_2 +199 0x4848 //RX_FDEQ_GAIN_3 +200 0x4848 //RX_FDEQ_GAIN_4 +201 0x4848 //RX_FDEQ_GAIN_5 +202 0x4848 //RX_FDEQ_GAIN_6 +203 0x4848 //RX_FDEQ_GAIN_7 +204 0x4848 //RX_FDEQ_GAIN_8 +205 0x4848 //RX_FDEQ_GAIN_9 +206 0x4848 //RX_FDEQ_GAIN_10 +207 0x4848 //RX_FDEQ_GAIN_11 +208 0x4848 //RX_FDEQ_GAIN_12 +209 0x4848 //RX_FDEQ_GAIN_13 +210 0x4848 //RX_FDEQ_GAIN_14 +211 0x4848 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0202 //RX_FDEQ_BIN_0 +221 0x0203 //RX_FDEQ_BIN_1 +222 0x0304 //RX_FDEQ_BIN_2 +223 0x0405 //RX_FDEQ_BIN_3 +224 0x0607 //RX_FDEQ_BIN_4 +225 0x0809 //RX_FDEQ_BIN_5 +226 0x0A0B //RX_FDEQ_BIN_6 +227 0x0C0D //RX_FDEQ_BIN_7 +228 0x0E0F //RX_FDEQ_BIN_8 +229 0x1011 //RX_FDEQ_BIN_9 +230 0x1214 //RX_FDEQ_BIN_10 +231 0x1618 //RX_FDEQ_BIN_11 +232 0x1C1C //RX_FDEQ_BIN_12 +233 0x2020 //RX_FDEQ_BIN_13 +234 0x2020 //RX_FDEQ_BIN_14 +235 0x2011 //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x4000 //RX_FDEQ_RESRV_0 +245 0x0320 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0030 //RX_FDDRC_BAND_MARGIN_1 +248 0x0050 //RX_FDDRC_BAND_MARGIN_2 +249 0x0080 //RX_FDDRC_BAND_MARGIN_3 +250 0x0007 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x5000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x6400 //RX_FDDRC_THRD_3_2 +258 0x6400 //RX_FDDRC_THRD_3_3 +259 0x2000 //RX_FDDRC_SLANT_0_0 +260 0x2000 //RX_FDDRC_SLANT_0_1 +261 0x2000 //RX_FDDRC_SLANT_0_2 +262 0x2000 //RX_FDDRC_SLANT_0_3 +263 0x5333 //RX_FDDRC_SLANT_1_0 +264 0x5333 //RX_FDDRC_SLANT_1_1 +265 0x5333 //RX_FDDRC_SLANT_1_2 +266 0x5333 //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +286 0x0100 //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 +#VOL 3 +163 0x1000 //RX_TDDRC_ALPHA_UP_1 +164 0x1000 //RX_TDDRC_ALPHA_UP_2 +165 0x1000 //RX_TDDRC_ALPHA_UP_3 +166 0x1000 //RX_TDDRC_ALPHA_UP_4 +184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +190 0x7FFF //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +269 0x0000 //RX_TDDRC_THRD_0 +270 0x0000 //RX_TDDRC_THRD_1 +271 0x7FFF //RX_TDDRC_THRD_2 +272 0x7FFF //RX_TDDRC_THRD_3 +273 0x7FFF //RX_TDDRC_SLANT_0 +274 0x7FFF //RX_TDDRC_SLANT_1 +275 0x1000 //RX_TDDRC_ALPHA_UP_0 +276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x199A //RX_TDDRC_HMNC_GAIN +279 0x0001 //RX_TDDRC_SMT_FLAG +280 0x0CCD //RX_TDDRC_SMT_W +281 0x0155 //RX_TDDRC_DRC_GAIN +195 0x0020 //RX_FDEQ_SUBNUM +196 0x4848 //RX_FDEQ_GAIN_0 +197 0x4848 //RX_FDEQ_GAIN_1 +198 0x4848 //RX_FDEQ_GAIN_2 +199 0x4848 //RX_FDEQ_GAIN_3 +200 0x4848 //RX_FDEQ_GAIN_4 +201 0x4848 //RX_FDEQ_GAIN_5 +202 0x4848 //RX_FDEQ_GAIN_6 +203 0x4848 //RX_FDEQ_GAIN_7 +204 0x4848 //RX_FDEQ_GAIN_8 +205 0x4848 //RX_FDEQ_GAIN_9 +206 0x4848 //RX_FDEQ_GAIN_10 +207 0x4848 //RX_FDEQ_GAIN_11 +208 0x4848 //RX_FDEQ_GAIN_12 +209 0x4848 //RX_FDEQ_GAIN_13 +210 0x4848 //RX_FDEQ_GAIN_14 +211 0x4848 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0202 //RX_FDEQ_BIN_0 +221 0x0203 //RX_FDEQ_BIN_1 +222 0x0304 //RX_FDEQ_BIN_2 +223 0x0405 //RX_FDEQ_BIN_3 +224 0x0607 //RX_FDEQ_BIN_4 +225 0x0809 //RX_FDEQ_BIN_5 +226 0x0A0B //RX_FDEQ_BIN_6 +227 0x0C0D //RX_FDEQ_BIN_7 +228 0x0E0F //RX_FDEQ_BIN_8 +229 0x1011 //RX_FDEQ_BIN_9 +230 0x1214 //RX_FDEQ_BIN_10 +231 0x1618 //RX_FDEQ_BIN_11 +232 0x1C1C //RX_FDEQ_BIN_12 +233 0x2020 //RX_FDEQ_BIN_13 +234 0x2020 //RX_FDEQ_BIN_14 +235 0x2011 //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x4000 //RX_FDEQ_RESRV_0 +245 0x0320 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0030 //RX_FDDRC_BAND_MARGIN_1 +248 0x0050 //RX_FDDRC_BAND_MARGIN_2 +249 0x0080 //RX_FDDRC_BAND_MARGIN_3 +250 0x0007 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x5000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x6400 //RX_FDDRC_THRD_3_2 +258 0x6400 //RX_FDDRC_THRD_3_3 +259 0x2000 //RX_FDDRC_SLANT_0_0 +260 0x2000 //RX_FDDRC_SLANT_0_1 +261 0x2000 //RX_FDDRC_SLANT_0_2 +262 0x2000 //RX_FDDRC_SLANT_0_3 +263 0x5333 //RX_FDDRC_SLANT_1_0 +264 0x5333 //RX_FDDRC_SLANT_1_1 +265 0x5333 //RX_FDDRC_SLANT_1_2 +266 0x5333 //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +286 0x0100 //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 +#VOL 4 +163 0x1000 //RX_TDDRC_ALPHA_UP_1 +164 0x1000 //RX_TDDRC_ALPHA_UP_2 +165 0x1000 //RX_TDDRC_ALPHA_UP_3 +166 0x1000 //RX_TDDRC_ALPHA_UP_4 +184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +190 0x7FFF //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +269 0x0000 //RX_TDDRC_THRD_0 +270 0x0000 //RX_TDDRC_THRD_1 +271 0x7FFF //RX_TDDRC_THRD_2 +272 0x7FFF //RX_TDDRC_THRD_3 +273 0x7FFF //RX_TDDRC_SLANT_0 +274 0x7FFF //RX_TDDRC_SLANT_1 +275 0x1000 //RX_TDDRC_ALPHA_UP_0 +276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x199A //RX_TDDRC_HMNC_GAIN +279 0x0001 //RX_TDDRC_SMT_FLAG +280 0x0CCD //RX_TDDRC_SMT_W +281 0x0155 //RX_TDDRC_DRC_GAIN +195 0x0020 //RX_FDEQ_SUBNUM +196 0x4848 //RX_FDEQ_GAIN_0 +197 0x4848 //RX_FDEQ_GAIN_1 +198 0x4848 //RX_FDEQ_GAIN_2 +199 0x4848 //RX_FDEQ_GAIN_3 +200 0x4848 //RX_FDEQ_GAIN_4 +201 0x4848 //RX_FDEQ_GAIN_5 +202 0x4848 //RX_FDEQ_GAIN_6 +203 0x4848 //RX_FDEQ_GAIN_7 +204 0x4848 //RX_FDEQ_GAIN_8 +205 0x4848 //RX_FDEQ_GAIN_9 +206 0x4848 //RX_FDEQ_GAIN_10 +207 0x4848 //RX_FDEQ_GAIN_11 +208 0x4848 //RX_FDEQ_GAIN_12 +209 0x4848 //RX_FDEQ_GAIN_13 +210 0x4848 //RX_FDEQ_GAIN_14 +211 0x4848 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0202 //RX_FDEQ_BIN_0 +221 0x0203 //RX_FDEQ_BIN_1 +222 0x0304 //RX_FDEQ_BIN_2 +223 0x0405 //RX_FDEQ_BIN_3 +224 0x0607 //RX_FDEQ_BIN_4 +225 0x0809 //RX_FDEQ_BIN_5 +226 0x0A0B //RX_FDEQ_BIN_6 +227 0x0C0D //RX_FDEQ_BIN_7 +228 0x0E0F //RX_FDEQ_BIN_8 +229 0x1011 //RX_FDEQ_BIN_9 +230 0x1214 //RX_FDEQ_BIN_10 +231 0x1618 //RX_FDEQ_BIN_11 +232 0x1C1C //RX_FDEQ_BIN_12 +233 0x2020 //RX_FDEQ_BIN_13 +234 0x2020 //RX_FDEQ_BIN_14 +235 0x2011 //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x4000 //RX_FDEQ_RESRV_0 +245 0x0320 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0030 //RX_FDDRC_BAND_MARGIN_1 +248 0x0050 //RX_FDDRC_BAND_MARGIN_2 +249 0x0080 //RX_FDDRC_BAND_MARGIN_3 +250 0x0007 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x5000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x6400 //RX_FDDRC_THRD_3_2 +258 0x6400 //RX_FDDRC_THRD_3_3 +259 0x2000 //RX_FDDRC_SLANT_0_0 +260 0x2000 //RX_FDDRC_SLANT_0_1 +261 0x2000 //RX_FDDRC_SLANT_0_2 +262 0x2000 //RX_FDDRC_SLANT_0_3 +263 0x5333 //RX_FDDRC_SLANT_1_0 +264 0x5333 //RX_FDDRC_SLANT_1_1 +265 0x5333 //RX_FDDRC_SLANT_1_2 +266 0x5333 //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +286 0x0100 //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 +#VOL 5 +163 0x1000 //RX_TDDRC_ALPHA_UP_1 +164 0x1000 //RX_TDDRC_ALPHA_UP_2 +165 0x1000 //RX_TDDRC_ALPHA_UP_3 +166 0x1000 //RX_TDDRC_ALPHA_UP_4 +184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +190 0x7FFF //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +269 0x0000 //RX_TDDRC_THRD_0 +270 0x0000 //RX_TDDRC_THRD_1 +271 0x7FFF //RX_TDDRC_THRD_2 +272 0x7FFF //RX_TDDRC_THRD_3 +273 0x7FFF //RX_TDDRC_SLANT_0 +274 0x7FFF //RX_TDDRC_SLANT_1 +275 0x1000 //RX_TDDRC_ALPHA_UP_0 +276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x199A //RX_TDDRC_HMNC_GAIN +279 0x0001 //RX_TDDRC_SMT_FLAG +280 0x0CCD //RX_TDDRC_SMT_W +281 0x0155 //RX_TDDRC_DRC_GAIN +195 0x0020 //RX_FDEQ_SUBNUM +196 0x4848 //RX_FDEQ_GAIN_0 +197 0x4848 //RX_FDEQ_GAIN_1 +198 0x4848 //RX_FDEQ_GAIN_2 +199 0x4848 //RX_FDEQ_GAIN_3 +200 0x4848 //RX_FDEQ_GAIN_4 +201 0x4848 //RX_FDEQ_GAIN_5 +202 0x4848 //RX_FDEQ_GAIN_6 +203 0x4848 //RX_FDEQ_GAIN_7 +204 0x4848 //RX_FDEQ_GAIN_8 +205 0x4848 //RX_FDEQ_GAIN_9 +206 0x4848 //RX_FDEQ_GAIN_10 +207 0x4848 //RX_FDEQ_GAIN_11 +208 0x4848 //RX_FDEQ_GAIN_12 +209 0x4848 //RX_FDEQ_GAIN_13 +210 0x4848 //RX_FDEQ_GAIN_14 +211 0x4848 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0202 //RX_FDEQ_BIN_0 +221 0x0203 //RX_FDEQ_BIN_1 +222 0x0304 //RX_FDEQ_BIN_2 +223 0x0405 //RX_FDEQ_BIN_3 +224 0x0607 //RX_FDEQ_BIN_4 +225 0x0809 //RX_FDEQ_BIN_5 +226 0x0A0B //RX_FDEQ_BIN_6 +227 0x0C0D //RX_FDEQ_BIN_7 +228 0x0E0F //RX_FDEQ_BIN_8 +229 0x1011 //RX_FDEQ_BIN_9 +230 0x1214 //RX_FDEQ_BIN_10 +231 0x1618 //RX_FDEQ_BIN_11 +232 0x1C1C //RX_FDEQ_BIN_12 +233 0x2020 //RX_FDEQ_BIN_13 +234 0x2020 //RX_FDEQ_BIN_14 +235 0x2011 //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x4000 //RX_FDEQ_RESRV_0 +245 0x0320 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0030 //RX_FDDRC_BAND_MARGIN_1 +248 0x0050 //RX_FDDRC_BAND_MARGIN_2 +249 0x0080 //RX_FDDRC_BAND_MARGIN_3 +250 0x0007 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x5000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x6400 //RX_FDDRC_THRD_3_2 +258 0x6400 //RX_FDDRC_THRD_3_3 +259 0x2000 //RX_FDDRC_SLANT_0_0 +260 0x2000 //RX_FDDRC_SLANT_0_1 +261 0x2000 //RX_FDDRC_SLANT_0_2 +262 0x2000 //RX_FDDRC_SLANT_0_3 +263 0x5333 //RX_FDDRC_SLANT_1_0 +264 0x5333 //RX_FDDRC_SLANT_1_1 +265 0x5333 //RX_FDDRC_SLANT_1_2 +266 0x5333 //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +286 0x0100 //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 +#VOL 6 +163 0x1000 //RX_TDDRC_ALPHA_UP_1 +164 0x1000 //RX_TDDRC_ALPHA_UP_2 +165 0x1000 //RX_TDDRC_ALPHA_UP_3 +166 0x1000 //RX_TDDRC_ALPHA_UP_4 +184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +190 0x7FFF //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +269 0x0000 //RX_TDDRC_THRD_0 +270 0x0000 //RX_TDDRC_THRD_1 +271 0x7FFF //RX_TDDRC_THRD_2 +272 0x7FFF //RX_TDDRC_THRD_3 +273 0x7FFF //RX_TDDRC_SLANT_0 +274 0x7FFF //RX_TDDRC_SLANT_1 +275 0x1000 //RX_TDDRC_ALPHA_UP_0 +276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x199A //RX_TDDRC_HMNC_GAIN +279 0x0001 //RX_TDDRC_SMT_FLAG +280 0x0CCD //RX_TDDRC_SMT_W +281 0x0155 //RX_TDDRC_DRC_GAIN +195 0x0020 //RX_FDEQ_SUBNUM +196 0x4848 //RX_FDEQ_GAIN_0 +197 0x4848 //RX_FDEQ_GAIN_1 +198 0x4848 //RX_FDEQ_GAIN_2 +199 0x4848 //RX_FDEQ_GAIN_3 +200 0x4848 //RX_FDEQ_GAIN_4 +201 0x4848 //RX_FDEQ_GAIN_5 +202 0x4848 //RX_FDEQ_GAIN_6 +203 0x4848 //RX_FDEQ_GAIN_7 +204 0x4848 //RX_FDEQ_GAIN_8 +205 0x4848 //RX_FDEQ_GAIN_9 +206 0x4848 //RX_FDEQ_GAIN_10 +207 0x4848 //RX_FDEQ_GAIN_11 +208 0x4848 //RX_FDEQ_GAIN_12 +209 0x4848 //RX_FDEQ_GAIN_13 +210 0x4848 //RX_FDEQ_GAIN_14 +211 0x4848 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0202 //RX_FDEQ_BIN_0 +221 0x0203 //RX_FDEQ_BIN_1 +222 0x0304 //RX_FDEQ_BIN_2 +223 0x0405 //RX_FDEQ_BIN_3 +224 0x0607 //RX_FDEQ_BIN_4 +225 0x0809 //RX_FDEQ_BIN_5 +226 0x0A0B //RX_FDEQ_BIN_6 +227 0x0C0D //RX_FDEQ_BIN_7 +228 0x0E0F //RX_FDEQ_BIN_8 +229 0x1011 //RX_FDEQ_BIN_9 +230 0x1214 //RX_FDEQ_BIN_10 +231 0x1618 //RX_FDEQ_BIN_11 +232 0x1C1C //RX_FDEQ_BIN_12 +233 0x2020 //RX_FDEQ_BIN_13 +234 0x2020 //RX_FDEQ_BIN_14 +235 0x2011 //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x4000 //RX_FDEQ_RESRV_0 +245 0x0320 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0030 //RX_FDDRC_BAND_MARGIN_1 +248 0x0050 //RX_FDDRC_BAND_MARGIN_2 +249 0x0080 //RX_FDDRC_BAND_MARGIN_3 +250 0x0007 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x5000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x6400 //RX_FDDRC_THRD_3_2 +258 0x6400 //RX_FDDRC_THRD_3_3 +259 0x2000 //RX_FDDRC_SLANT_0_0 +260 0x2000 //RX_FDDRC_SLANT_0_1 +261 0x2000 //RX_FDDRC_SLANT_0_2 +262 0x2000 //RX_FDDRC_SLANT_0_3 +263 0x5333 //RX_FDDRC_SLANT_1_0 +264 0x5333 //RX_FDDRC_SLANT_1_1 +265 0x5333 //RX_FDDRC_SLANT_1_2 +266 0x5333 //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +286 0x0100 //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 #CASE_NAME BLUETOOTH-BTWB-VOICE_GENERIC-NB -#PARAM_TYPE TX+RX -#TOTAL_CUSTOM_STEP 7 +#PARAM_MODE Full +#PARAM_TYPE TX+2RX +#TOTAL_CUSTOM_STEP 7+7 #TX 0 0x0008 //TX_OPERATION_MODE_0 1 0x0008 //TX_OPERATION_MODE_1 @@ -23047,20 +34969,20 @@ 248 0xF400 //TX_THR_SN_EST_6 249 0xF600 //TX_THR_SN_EST_7 250 0x0000 //TX_DELTA_THR_SN_EST_0 -251 0x0000 //TX_DELTA_THR_SN_EST_1 +251 0x0200 //TX_DELTA_THR_SN_EST_1 252 0x0200 //TX_DELTA_THR_SN_EST_2 253 0x0200 //TX_DELTA_THR_SN_EST_3 254 0x0200 //TX_DELTA_THR_SN_EST_4 255 0x0200 //TX_DELTA_THR_SN_EST_5 -256 0x0200 //TX_DELTA_THR_SN_EST_6 +256 0x0000 //TX_DELTA_THR_SN_EST_6 257 0x0200 //TX_DELTA_THR_SN_EST_7 258 0x6000 //TX_LAMBDA_NN_EST_0 -259 0x6000 //TX_LAMBDA_NN_EST_1 +259 0x4000 //TX_LAMBDA_NN_EST_1 260 0x4000 //TX_LAMBDA_NN_EST_2 261 0x4000 //TX_LAMBDA_NN_EST_3 262 0x4000 //TX_LAMBDA_NN_EST_4 263 0x4000 //TX_LAMBDA_NN_EST_5 -264 0x4000 //TX_LAMBDA_NN_EST_6 +264 0x6000 //TX_LAMBDA_NN_EST_6 265 0x4000 //TX_LAMBDA_NN_EST_7 266 0x0400 //TX_N_SN_EST 267 0x001E //TX_INBEAM_T @@ -23078,16 +35000,16 @@ 279 0x1000 //TX_B_POST_FLT_0 280 0x1000 //TX_B_POST_FLT_1 281 0x000F //TX_NS_LVL_CTRL_0 -282 0x000F //TX_NS_LVL_CTRL_1 -283 0x0011 //TX_NS_LVL_CTRL_2 +282 0x0011 //TX_NS_LVL_CTRL_1 +283 0x000F //TX_NS_LVL_CTRL_2 284 0x000F //TX_NS_LVL_CTRL_3 285 0x000F //TX_NS_LVL_CTRL_4 286 0x000F //TX_NS_LVL_CTRL_5 287 0x000F //TX_NS_LVL_CTRL_6 288 0x0011 //TX_NS_LVL_CTRL_7 289 0x000C //TX_MIN_GAIN_S_0 -290 0x000C //TX_MIN_GAIN_S_1 -291 0x000F //TX_MIN_GAIN_S_2 +290 0x000F //TX_MIN_GAIN_S_1 +291 0x000C //TX_MIN_GAIN_S_2 292 0x000C //TX_MIN_GAIN_S_3 293 0x000C //TX_MIN_GAIN_S_4 294 0x000C //TX_MIN_GAIN_S_5 @@ -23111,12 +35033,12 @@ 312 0x7FFF //TX_A_POST_FILT_0 313 0x2000 //TX_A_POST_FILT_1 314 0x4000 //TX_A_POST_FILT_S_0 -315 0x4000 //TX_A_POST_FILT_S_1 +315 0x5000 //TX_A_POST_FILT_S_1 316 0x5000 //TX_A_POST_FILT_S_2 317 0x5000 //TX_A_POST_FILT_S_3 318 0x5000 //TX_A_POST_FILT_S_4 319 0x5000 //TX_A_POST_FILT_S_5 -320 0x5000 //TX_A_POST_FILT_S_6 +320 0x4000 //TX_A_POST_FILT_S_6 321 0x5000 //TX_A_POST_FILT_S_7 322 0x1000 //TX_B_POST_FILT_0 323 0x1000 //TX_B_POST_FILT_1 @@ -23176,10 +35098,10 @@ 377 0x7FFF //TX_NOISE_TH_5_4 378 0x044C //TX_NOISE_TH_6 379 0x0014 //TX_MINENOISE_TH -380 0x4000 //TX_MINENOISE_MIC0_TH_MTS -381 0xFFEE //TX_MINENOISE_MIC0_TH_EXP -382 0x6000 //TX_MINENOISE_MIC0_S_TH_MTS -383 0xFFF3 //TX_MINENOISE_MIC0_S_TH_EXP +380 0x4000 //TX_MORENS_TFMASK_TH +381 0xFFEE //TX_DRC_QUIET_FLOOR +382 0x6000 //TX_RATIODTL_CUT_TH +383 0xFFF3 //TX_DT_CUT_K1 384 0x0666 //TX_OUT_ENER_S_TH_CLEAN 385 0x0666 //TX_OUT_ENER_S_TH_LESSCLEAN 386 0x0333 //TX_OUT_ENER_S_TH_NOISY @@ -23187,15 +35109,15 @@ 388 0x0333 //TX_OUT_ENER_TH_SPEECH 389 0x2000 //TX_SN_NPB_GAIN 390 0x0000 //TX_NN_NPB_GAIN -391 0x0000 //TX_CSX_ALPHA_0 -392 0x0000 //TX_CSX_ALPHA_1 -393 0x0000 //TX_CSX_ALPHA_2 -394 0x0000 //TX_CSX_ALPHA_3 -395 0x0800 //TX_MU_ARSP_EST -396 0x00C8 //TX_P_OUTBEAM_MIN_TH +391 0x0000 //TX_POST_MASK_SUP_HSNE +392 0x0000 //TX_TAIL_DET_TH +393 0x0000 //TX_B_LESSCUT_RTO_WTA +394 0x0000 //TX_MEL_G_R +395 0x0800 //TX_SUPHIGH_TH +396 0x00C8 //TX_MASK_G_R 397 0x0002 //TX_EXTRA_NS_L -398 0x0800 //TX_EXTRA_NS_A -399 0x0005 //TX_VR_NOISE_FLOOR_TH +398 0x0800 //TX_C_POST_FLT_MASK +399 0x0005 //TX_A_POST_FLT_WNS 400 0x0148 //TX_MIN_G_LOW300HZ 401 0x0002 //TX_MAXLEVEL_CNG 402 0x00B4 //TX_STN_NOISE_TH @@ -23310,16 +35232,16 @@ 511 0x6666 //TX_MIC_TO_BFGAIN 512 0x0000 //TX_MICTOBFGAIN0 513 0x0000 //TX_FASTMUE_TH -514 0x0000 //TX_DERVB_LEN_0 -515 0x0000 //TX_DERVB_LEN_1 -516 0x0000 //TX_RHO_DERVB -517 0x0000 //TX_MIC_INDX_DERVB -518 0x0000 //TX_MU_DERVB -519 0x0000 //TX_DR_RESRV_0 -520 0x0000 //TX_DR_RESRV_1 -521 0x0000 //TX_DR_RESRV_2 -522 0x0000 //TX_DR_RESRV_3 -523 0x0000 //TX_DR_RESRV_4 +514 0x0000 //TX_DEREVERB_LF_MU +515 0x0000 //TX_DEREVERB_HF_MU +516 0x0000 //TX_DEREVERB_DELAY +517 0x0000 //TX_DEREVERB_COEF_LEN +518 0x0000 //TX_DEREVERB_DNR +519 0x0000 //TX_DEREVERB_ALPHA +520 0x0000 //TX_DEREVERB_BETA +521 0x0000 //TX_GSC_RTOL_TH +522 0x0000 //TX_GSC_RTOH_TH +523 0x0000 //TX_WIDE2_MEANHTH 524 0x0000 //TX_DR_RESRV_5 525 0x0000 //TX_DR_RESRV_6 526 0x0000 //TX_DR_RESRV_7 @@ -23693,8 +35615,73 @@ 894 0xC000 //TX_FASTNS_SSA_THHFL 895 0xCCCC //TX_FASTNS_SSA_THLFH 896 0xD999 //TX_FASTNS_SSA_THHFH +897 0x0000 //TX_SENDFUNC_REG_MICMUTE +898 0x0000 //TX_SENDFUNC_REG_MICMUTE1 +899 0x0000 //TX_MICMUTE_RATIO_THR +900 0x0000 //TX_MICMUTE_AMP_THR +901 0x0000 //TX_MICMUTE_HPF_IND +902 0x0000 //TX_MICMUTE_LOG_EYR_TH +903 0x0000 //TX_MICMUTE_CVG_TIME +904 0x0000 //TX_MICMUTE_RELEASE_TIME +905 0x0000 //TX_MIC_VOLUME_MIC0MUTE +906 0x0000 //TX_MICMUTE_EPD_OFFSET_0 +907 0x0000 //TX_MICMUTE_FRQ_AEC_L +908 0x0000 //TX_MICMUTE_EAD_THR +909 0x0000 //TX_MICMUTE_LAMBDA_CB_NLE +910 0x0000 //TX_MICMUTE_LAMBDA_RE_EST +911 0x0000 //TX_DTD_THR1_MICMUTE_0 +912 0x0000 //TX_DTD_THR1_MICMUTE_1 +913 0x0000 //TX_DTD_THR1_MICMUTE_2 +914 0x0000 //TX_DTD_THR1_MICMUTE_3 +915 0x0000 //TX_DTD_THR2_MICMUTE_0 +916 0x0000 //TX_MICMUTE_MIN_EQ_RE_EST_0 +917 0x0000 //TX_MICMUTE_MIN_EQ_RE_EST_1 +918 0x0000 //TX_MICMUTE_MIN_EQ_RE_EST_2 +919 0x0000 //TX_MICMUTE_MIN_EQ_RE_EST_3 +920 0x0000 //TX_MICMUTE_MIN_EQ_RE_EST_4 +921 0x0000 //TX_MICMUTE_C_POST_FLT +922 0x0000 //TX_MICMUTE_DT_CUT_K +923 0x0000 //TX_MICMUTE_DT_CUT_THR +924 0x0000 //TX_MICMUTE_DT_CUT_K2 +925 0x0000 //TX_MICMUTE_DT_CUT_THR2 +926 0x0000 //TX_MICMUTE_DT2_HOLD_N +927 0x0000 //TX_MICMUTE_RATIODTH_THCUT +928 0x0000 //TX_MICMUTE_B_POST_FLT_ECHOL +929 0x0000 //TX_MICMUTE_B_POST_FLT_ECHOH +930 0x0000 //TX_MICMUTE_C_POST_FLT_MASK +931 0x0000 //TX_MICMUTE_RATIODTL_CUT_TH +932 0x0000 //TX_MICMUTE_DT_CUT_K1 +933 0x0000 //TX_MICMUTE_N2_SN_EST +934 0x0000 //TX_MICMUTE_THR_SN_EST_0 +935 0x0000 //TX_MICMUTE_MIN_G_CTRL_0 +936 0x0000 //TX_MICMUTE_A_POST_FILT_S_0 +937 0x0000 //TX_MICMUTE_B_POST_FILT_0 +938 0x0000 //TX_MIC1RUB_AMP_THR +939 0x0000 //TX_MIC1MUTE_RATIO_THR +940 0x0000 //TX_MIC1MUTE_AMP_THR +941 0x0000 //TX_MIC1MUTE_CVG_TIME +942 0x0000 //TX_MIC1MUTE_RELEASE_TIME +943 0x0000 //TX_AMS_RESRV_01 +944 0x0000 //TX_AMS_RESRV_02 +945 0x0000 //TX_AMS_RESRV_03 +946 0x0000 //TX_AMS_RESRV_04 +947 0x0000 //TX_AMS_RESRV_05 +948 0x0000 //TX_AMS_RESRV_06 +949 0x0000 //TX_AMS_RESRV_07 +950 0x0000 //TX_AMS_RESRV_08 +951 0x0000 //TX_AMS_RESRV_09 +952 0x0000 //TX_AMS_RESRV_10 +953 0x0000 //TX_AMS_RESRV_11 +954 0x0000 //TX_AMS_RESRV_12 +955 0x0000 //TX_AMS_RESRV_13 +956 0x0000 //TX_AMS_RESRV_14 +957 0x0000 //TX_AMS_RESRV_15 +958 0x0000 //TX_AMS_RESRV_16 +959 0x0000 //TX_AMS_RESRV_17 +960 0x0000 //TX_AMS_RESRV_18 +961 0x0000 //TX_AMS_RESRV_19 #RX -0 0x006C //RX_RECVFUNC_MODE_0 +0 0x206C //RX_RECVFUNC_MODE_0 1 0x0000 //RX_RECVFUNC_MODE_1 2 0x0000 //RX_SAMPLINGFREQ_SIG 3 0x0000 //RX_SAMPLINGFREQ_PROC @@ -24544,10 +36531,862 @@ 110 0x0000 //RX_FDDRC_RESRV_0 129 0x0100 //RX_SPK_VOL 130 0x0000 //RX_VOL_RESRV_0 +#RX 2 +157 0x206C //RX_RECVFUNC_MODE_0 +158 0x0000 //RX_RECVFUNC_MODE_1 +159 0x0000 //RX_SAMPLINGFREQ_SIG +160 0x0000 //RX_SAMPLINGFREQ_PROC +161 0x000A //RX_FRAME_SZ +162 0x0000 //RX_DELAY_OPT +163 0x3000 //RX_TDDRC_ALPHA_UP_1 +164 0x3000 //RX_TDDRC_ALPHA_UP_2 +165 0x3000 //RX_TDDRC_ALPHA_UP_3 +166 0x3000 //RX_TDDRC_ALPHA_UP_4 +167 0x0800 //RX_PGA +168 0x7FFF //RX_A_HP +169 0x0000 //RX_B_PE +170 0x3800 //RX_THR_PITCH_DET_0 +171 0x3000 //RX_THR_PITCH_DET_1 +172 0x2800 //RX_THR_PITCH_DET_2 +173 0x0008 //RX_PITCH_BFR_LEN +174 0x0003 //RX_SBD_PITCH_DET +175 0x0100 //RX_PP_RESRV_0 +176 0x0020 //RX_PP_RESRV_1 +177 0x0600 //RX_N_SN_EST +178 0x000C //RX_N2_SN_EST +179 0x0010 //RX_NS_LVL_CTRL +180 0xF800 //RX_THR_SN_EST +181 0x7CCD //RX_LAMBDA_PFILT +182 0x000A //RX_FENS_RESRV_0 +183 0x0190 //RX_FENS_RESRV_1 +184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +187 0x0002 //RX_EXTRA_NS_L +188 0x0800 //RX_EXTRA_NS_A +189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +190 0x7FFF //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +192 0x199A //RX_A_POST_FLT +193 0x0000 //RX_LMT_THRD +194 0x4000 //RX_LMT_ALPHA +195 0x0014 //RX_FDEQ_SUBNUM +196 0x4848 //RX_FDEQ_GAIN_0 +197 0x4848 //RX_FDEQ_GAIN_1 +198 0x4848 //RX_FDEQ_GAIN_2 +199 0x4848 //RX_FDEQ_GAIN_3 +200 0x4848 //RX_FDEQ_GAIN_4 +201 0x4848 //RX_FDEQ_GAIN_5 +202 0x4444 //RX_FDEQ_GAIN_6 +203 0x4040 //RX_FDEQ_GAIN_7 +204 0x4040 //RX_FDEQ_GAIN_8 +205 0x4040 //RX_FDEQ_GAIN_9 +206 0x4848 //RX_FDEQ_GAIN_10 +207 0x4848 //RX_FDEQ_GAIN_11 +208 0x4848 //RX_FDEQ_GAIN_12 +209 0x4848 //RX_FDEQ_GAIN_13 +210 0x4848 //RX_FDEQ_GAIN_14 +211 0x4848 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0202 //RX_FDEQ_BIN_0 +221 0x0203 //RX_FDEQ_BIN_1 +222 0x0303 //RX_FDEQ_BIN_2 +223 0x0304 //RX_FDEQ_BIN_3 +224 0x0405 //RX_FDEQ_BIN_4 +225 0x0506 //RX_FDEQ_BIN_5 +226 0x0708 //RX_FDEQ_BIN_6 +227 0x090A //RX_FDEQ_BIN_7 +228 0x0B0C //RX_FDEQ_BIN_8 +229 0x0D0E //RX_FDEQ_BIN_9 +230 0x0000 //RX_FDEQ_BIN_10 +231 0x0000 //RX_FDEQ_BIN_11 +232 0x0000 //RX_FDEQ_BIN_12 +233 0x0000 //RX_FDEQ_BIN_13 +234 0x0000 //RX_FDEQ_BIN_14 +235 0x0000 //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x4000 //RX_FDEQ_RESRV_0 +245 0x0320 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0030 //RX_FDDRC_BAND_MARGIN_1 +248 0x0050 //RX_FDDRC_BAND_MARGIN_2 +249 0x0080 //RX_FDDRC_BAND_MARGIN_3 +250 0x0007 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x5000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x6400 //RX_FDDRC_THRD_3_2 +258 0x6400 //RX_FDDRC_THRD_3_3 +259 0x2000 //RX_FDDRC_SLANT_0_0 +260 0x2000 //RX_FDDRC_SLANT_0_1 +261 0x2000 //RX_FDDRC_SLANT_0_2 +262 0x2000 //RX_FDDRC_SLANT_0_3 +263 0x5333 //RX_FDDRC_SLANT_1_0 +264 0x5333 //RX_FDDRC_SLANT_1_1 +265 0x5333 //RX_FDDRC_SLANT_1_2 +266 0x5333 //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +268 0x0000 //RX_FILTINDX +269 0x0000 //RX_TDDRC_THRD_0 +270 0x0000 //RX_TDDRC_THRD_1 +271 0x7FFF //RX_TDDRC_THRD_2 +272 0x7FFF //RX_TDDRC_THRD_3 +273 0x7FFF //RX_TDDRC_SLANT_0 +274 0x7EB8 //RX_TDDRC_SLANT_1 +275 0x3000 //RX_TDDRC_ALPHA_UP_0 +276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x199A //RX_TDDRC_HMNC_GAIN +279 0x0001 //RX_TDDRC_SMT_FLAG +280 0x0CCD //RX_TDDRC_SMT_W +281 0x017F //RX_TDDRC_DRC_GAIN +282 0x7C00 //RX_LAMBDA_PKA_FP +283 0x2000 //RX_TPKA_FP +284 0x2000 //RX_MIN_G_FP +285 0x0080 //RX_MAX_G_FP +286 0x0100 //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 +288 0x0000 //RX_MAXLEVEL_CNG +289 0x3000 //RX_BWE_UV_TH +290 0x3000 //RX_BWE_UV_TH2 +291 0x1800 //RX_BWE_UV_TH3 +292 0x1000 //RX_BWE_V_TH +293 0x04CD //RX_BWE_GAIN1_V_TH1 +294 0x0F33 //RX_BWE_GAIN1_V_TH2 +295 0x7333 //RX_BWE_UV_EQ +296 0x199A //RX_BWE_V_EQ +297 0x7333 //RX_BWE_TONE_TH +298 0x0004 //RX_BWE_UV_HOLD_T +299 0x6CCD //RX_BWE_GAIN2_ALPHA +300 0x799A //RX_BWE_GAIN3_ALPHA +301 0x001E //RX_BWE_CUTOFF +302 0x3000 //RX_BWE_GAINFILL +303 0x3200 //RX_BWE_MAXTH_TONE +304 0x2000 //RX_BWE_EQ_0 +305 0x2000 //RX_BWE_EQ_1 +306 0x2000 //RX_BWE_EQ_2 +307 0x2000 //RX_BWE_EQ_3 +308 0x2000 //RX_BWE_EQ_4 +309 0x2000 //RX_BWE_EQ_5 +310 0x2000 //RX_BWE_EQ_6 +311 0x0000 //RX_BWE_RESRV_0 +312 0x0000 //RX_BWE_RESRV_1 +313 0x0000 //RX_BWE_RESRV_2 +#VOL 0 +163 0x3000 //RX_TDDRC_ALPHA_UP_1 +164 0x3000 //RX_TDDRC_ALPHA_UP_2 +165 0x3000 //RX_TDDRC_ALPHA_UP_3 +166 0x3000 //RX_TDDRC_ALPHA_UP_4 +184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +190 0x7FFF //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +269 0x0000 //RX_TDDRC_THRD_0 +270 0x0000 //RX_TDDRC_THRD_1 +271 0x7FFF //RX_TDDRC_THRD_2 +272 0x7FFF //RX_TDDRC_THRD_3 +273 0x7FFF //RX_TDDRC_SLANT_0 +274 0x7EB8 //RX_TDDRC_SLANT_1 +275 0x3000 //RX_TDDRC_ALPHA_UP_0 +276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x199A //RX_TDDRC_HMNC_GAIN +279 0x0001 //RX_TDDRC_SMT_FLAG +280 0x0CCD //RX_TDDRC_SMT_W +281 0x017F //RX_TDDRC_DRC_GAIN +195 0x0014 //RX_FDEQ_SUBNUM +196 0x4848 //RX_FDEQ_GAIN_0 +197 0x4848 //RX_FDEQ_GAIN_1 +198 0x4848 //RX_FDEQ_GAIN_2 +199 0x4848 //RX_FDEQ_GAIN_3 +200 0x4848 //RX_FDEQ_GAIN_4 +201 0x4848 //RX_FDEQ_GAIN_5 +202 0x4444 //RX_FDEQ_GAIN_6 +203 0x4040 //RX_FDEQ_GAIN_7 +204 0x4040 //RX_FDEQ_GAIN_8 +205 0x4040 //RX_FDEQ_GAIN_9 +206 0x4848 //RX_FDEQ_GAIN_10 +207 0x4848 //RX_FDEQ_GAIN_11 +208 0x4848 //RX_FDEQ_GAIN_12 +209 0x4848 //RX_FDEQ_GAIN_13 +210 0x4848 //RX_FDEQ_GAIN_14 +211 0x4848 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0202 //RX_FDEQ_BIN_0 +221 0x0203 //RX_FDEQ_BIN_1 +222 0x0303 //RX_FDEQ_BIN_2 +223 0x0304 //RX_FDEQ_BIN_3 +224 0x0405 //RX_FDEQ_BIN_4 +225 0x0506 //RX_FDEQ_BIN_5 +226 0x0708 //RX_FDEQ_BIN_6 +227 0x090A //RX_FDEQ_BIN_7 +228 0x0B0C //RX_FDEQ_BIN_8 +229 0x0D0E //RX_FDEQ_BIN_9 +230 0x0000 //RX_FDEQ_BIN_10 +231 0x0000 //RX_FDEQ_BIN_11 +232 0x0000 //RX_FDEQ_BIN_12 +233 0x0000 //RX_FDEQ_BIN_13 +234 0x0000 //RX_FDEQ_BIN_14 +235 0x0000 //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x4000 //RX_FDEQ_RESRV_0 +245 0x0320 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0030 //RX_FDDRC_BAND_MARGIN_1 +248 0x0050 //RX_FDDRC_BAND_MARGIN_2 +249 0x0080 //RX_FDDRC_BAND_MARGIN_3 +250 0x0007 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x5000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x6400 //RX_FDDRC_THRD_3_2 +258 0x6400 //RX_FDDRC_THRD_3_3 +259 0x2000 //RX_FDDRC_SLANT_0_0 +260 0x2000 //RX_FDDRC_SLANT_0_1 +261 0x2000 //RX_FDDRC_SLANT_0_2 +262 0x2000 //RX_FDDRC_SLANT_0_3 +263 0x5333 //RX_FDDRC_SLANT_1_0 +264 0x5333 //RX_FDDRC_SLANT_1_1 +265 0x5333 //RX_FDDRC_SLANT_1_2 +266 0x5333 //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +286 0x0100 //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 +#VOL 1 +163 0x3000 //RX_TDDRC_ALPHA_UP_1 +164 0x3000 //RX_TDDRC_ALPHA_UP_2 +165 0x3000 //RX_TDDRC_ALPHA_UP_3 +166 0x3000 //RX_TDDRC_ALPHA_UP_4 +184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +190 0x7FFF //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +269 0x0000 //RX_TDDRC_THRD_0 +270 0x0000 //RX_TDDRC_THRD_1 +271 0x7FFF //RX_TDDRC_THRD_2 +272 0x7FFF //RX_TDDRC_THRD_3 +273 0x7FFF //RX_TDDRC_SLANT_0 +274 0x7EB8 //RX_TDDRC_SLANT_1 +275 0x3000 //RX_TDDRC_ALPHA_UP_0 +276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x199A //RX_TDDRC_HMNC_GAIN +279 0x0001 //RX_TDDRC_SMT_FLAG +280 0x0CCD //RX_TDDRC_SMT_W +281 0x017F //RX_TDDRC_DRC_GAIN +195 0x0014 //RX_FDEQ_SUBNUM +196 0x4848 //RX_FDEQ_GAIN_0 +197 0x4848 //RX_FDEQ_GAIN_1 +198 0x4848 //RX_FDEQ_GAIN_2 +199 0x4848 //RX_FDEQ_GAIN_3 +200 0x4848 //RX_FDEQ_GAIN_4 +201 0x4848 //RX_FDEQ_GAIN_5 +202 0x4444 //RX_FDEQ_GAIN_6 +203 0x4040 //RX_FDEQ_GAIN_7 +204 0x4040 //RX_FDEQ_GAIN_8 +205 0x4040 //RX_FDEQ_GAIN_9 +206 0x4848 //RX_FDEQ_GAIN_10 +207 0x4848 //RX_FDEQ_GAIN_11 +208 0x4848 //RX_FDEQ_GAIN_12 +209 0x4848 //RX_FDEQ_GAIN_13 +210 0x4848 //RX_FDEQ_GAIN_14 +211 0x4848 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0202 //RX_FDEQ_BIN_0 +221 0x0203 //RX_FDEQ_BIN_1 +222 0x0303 //RX_FDEQ_BIN_2 +223 0x0304 //RX_FDEQ_BIN_3 +224 0x0405 //RX_FDEQ_BIN_4 +225 0x0506 //RX_FDEQ_BIN_5 +226 0x0708 //RX_FDEQ_BIN_6 +227 0x090A //RX_FDEQ_BIN_7 +228 0x0B0C //RX_FDEQ_BIN_8 +229 0x0D0E //RX_FDEQ_BIN_9 +230 0x0000 //RX_FDEQ_BIN_10 +231 0x0000 //RX_FDEQ_BIN_11 +232 0x0000 //RX_FDEQ_BIN_12 +233 0x0000 //RX_FDEQ_BIN_13 +234 0x0000 //RX_FDEQ_BIN_14 +235 0x0000 //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x4000 //RX_FDEQ_RESRV_0 +245 0x0320 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0030 //RX_FDDRC_BAND_MARGIN_1 +248 0x0050 //RX_FDDRC_BAND_MARGIN_2 +249 0x0080 //RX_FDDRC_BAND_MARGIN_3 +250 0x0007 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x5000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x6400 //RX_FDDRC_THRD_3_2 +258 0x6400 //RX_FDDRC_THRD_3_3 +259 0x2000 //RX_FDDRC_SLANT_0_0 +260 0x2000 //RX_FDDRC_SLANT_0_1 +261 0x2000 //RX_FDDRC_SLANT_0_2 +262 0x2000 //RX_FDDRC_SLANT_0_3 +263 0x5333 //RX_FDDRC_SLANT_1_0 +264 0x5333 //RX_FDDRC_SLANT_1_1 +265 0x5333 //RX_FDDRC_SLANT_1_2 +266 0x5333 //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +286 0x0100 //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 +#VOL 2 +163 0x3000 //RX_TDDRC_ALPHA_UP_1 +164 0x3000 //RX_TDDRC_ALPHA_UP_2 +165 0x3000 //RX_TDDRC_ALPHA_UP_3 +166 0x3000 //RX_TDDRC_ALPHA_UP_4 +184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +190 0x7FFF //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +269 0x0000 //RX_TDDRC_THRD_0 +270 0x0000 //RX_TDDRC_THRD_1 +271 0x7FFF //RX_TDDRC_THRD_2 +272 0x7FFF //RX_TDDRC_THRD_3 +273 0x7FFF //RX_TDDRC_SLANT_0 +274 0x7EB8 //RX_TDDRC_SLANT_1 +275 0x3000 //RX_TDDRC_ALPHA_UP_0 +276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x199A //RX_TDDRC_HMNC_GAIN +279 0x0001 //RX_TDDRC_SMT_FLAG +280 0x0CCD //RX_TDDRC_SMT_W +281 0x017F //RX_TDDRC_DRC_GAIN +195 0x0014 //RX_FDEQ_SUBNUM +196 0x4848 //RX_FDEQ_GAIN_0 +197 0x4848 //RX_FDEQ_GAIN_1 +198 0x4848 //RX_FDEQ_GAIN_2 +199 0x4848 //RX_FDEQ_GAIN_3 +200 0x4848 //RX_FDEQ_GAIN_4 +201 0x4848 //RX_FDEQ_GAIN_5 +202 0x4444 //RX_FDEQ_GAIN_6 +203 0x4040 //RX_FDEQ_GAIN_7 +204 0x4040 //RX_FDEQ_GAIN_8 +205 0x4040 //RX_FDEQ_GAIN_9 +206 0x4848 //RX_FDEQ_GAIN_10 +207 0x4848 //RX_FDEQ_GAIN_11 +208 0x4848 //RX_FDEQ_GAIN_12 +209 0x4848 //RX_FDEQ_GAIN_13 +210 0x4848 //RX_FDEQ_GAIN_14 +211 0x4848 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0202 //RX_FDEQ_BIN_0 +221 0x0203 //RX_FDEQ_BIN_1 +222 0x0303 //RX_FDEQ_BIN_2 +223 0x0304 //RX_FDEQ_BIN_3 +224 0x0405 //RX_FDEQ_BIN_4 +225 0x0506 //RX_FDEQ_BIN_5 +226 0x0708 //RX_FDEQ_BIN_6 +227 0x090A //RX_FDEQ_BIN_7 +228 0x0B0C //RX_FDEQ_BIN_8 +229 0x0D0E //RX_FDEQ_BIN_9 +230 0x0000 //RX_FDEQ_BIN_10 +231 0x0000 //RX_FDEQ_BIN_11 +232 0x0000 //RX_FDEQ_BIN_12 +233 0x0000 //RX_FDEQ_BIN_13 +234 0x0000 //RX_FDEQ_BIN_14 +235 0x0000 //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x4000 //RX_FDEQ_RESRV_0 +245 0x0320 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0030 //RX_FDDRC_BAND_MARGIN_1 +248 0x0050 //RX_FDDRC_BAND_MARGIN_2 +249 0x0080 //RX_FDDRC_BAND_MARGIN_3 +250 0x0007 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x5000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x6400 //RX_FDDRC_THRD_3_2 +258 0x6400 //RX_FDDRC_THRD_3_3 +259 0x2000 //RX_FDDRC_SLANT_0_0 +260 0x2000 //RX_FDDRC_SLANT_0_1 +261 0x2000 //RX_FDDRC_SLANT_0_2 +262 0x2000 //RX_FDDRC_SLANT_0_3 +263 0x5333 //RX_FDDRC_SLANT_1_0 +264 0x5333 //RX_FDDRC_SLANT_1_1 +265 0x5333 //RX_FDDRC_SLANT_1_2 +266 0x5333 //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +286 0x0100 //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 +#VOL 3 +163 0x3000 //RX_TDDRC_ALPHA_UP_1 +164 0x3000 //RX_TDDRC_ALPHA_UP_2 +165 0x3000 //RX_TDDRC_ALPHA_UP_3 +166 0x3000 //RX_TDDRC_ALPHA_UP_4 +184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +190 0x7FFF //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +269 0x0000 //RX_TDDRC_THRD_0 +270 0x0000 //RX_TDDRC_THRD_1 +271 0x7FFF //RX_TDDRC_THRD_2 +272 0x7FFF //RX_TDDRC_THRD_3 +273 0x7FFF //RX_TDDRC_SLANT_0 +274 0x7EB8 //RX_TDDRC_SLANT_1 +275 0x3000 //RX_TDDRC_ALPHA_UP_0 +276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x199A //RX_TDDRC_HMNC_GAIN +279 0x0001 //RX_TDDRC_SMT_FLAG +280 0x0CCD //RX_TDDRC_SMT_W +281 0x017F //RX_TDDRC_DRC_GAIN +195 0x0014 //RX_FDEQ_SUBNUM +196 0x4848 //RX_FDEQ_GAIN_0 +197 0x4848 //RX_FDEQ_GAIN_1 +198 0x4848 //RX_FDEQ_GAIN_2 +199 0x4848 //RX_FDEQ_GAIN_3 +200 0x4848 //RX_FDEQ_GAIN_4 +201 0x4848 //RX_FDEQ_GAIN_5 +202 0x4444 //RX_FDEQ_GAIN_6 +203 0x4040 //RX_FDEQ_GAIN_7 +204 0x4040 //RX_FDEQ_GAIN_8 +205 0x4040 //RX_FDEQ_GAIN_9 +206 0x4848 //RX_FDEQ_GAIN_10 +207 0x4848 //RX_FDEQ_GAIN_11 +208 0x4848 //RX_FDEQ_GAIN_12 +209 0x4848 //RX_FDEQ_GAIN_13 +210 0x4848 //RX_FDEQ_GAIN_14 +211 0x4848 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0202 //RX_FDEQ_BIN_0 +221 0x0203 //RX_FDEQ_BIN_1 +222 0x0303 //RX_FDEQ_BIN_2 +223 0x0304 //RX_FDEQ_BIN_3 +224 0x0405 //RX_FDEQ_BIN_4 +225 0x0506 //RX_FDEQ_BIN_5 +226 0x0708 //RX_FDEQ_BIN_6 +227 0x090A //RX_FDEQ_BIN_7 +228 0x0B0C //RX_FDEQ_BIN_8 +229 0x0D0E //RX_FDEQ_BIN_9 +230 0x0000 //RX_FDEQ_BIN_10 +231 0x0000 //RX_FDEQ_BIN_11 +232 0x0000 //RX_FDEQ_BIN_12 +233 0x0000 //RX_FDEQ_BIN_13 +234 0x0000 //RX_FDEQ_BIN_14 +235 0x0000 //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x4000 //RX_FDEQ_RESRV_0 +245 0x0320 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0030 //RX_FDDRC_BAND_MARGIN_1 +248 0x0050 //RX_FDDRC_BAND_MARGIN_2 +249 0x0080 //RX_FDDRC_BAND_MARGIN_3 +250 0x0007 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x5000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x6400 //RX_FDDRC_THRD_3_2 +258 0x6400 //RX_FDDRC_THRD_3_3 +259 0x2000 //RX_FDDRC_SLANT_0_0 +260 0x2000 //RX_FDDRC_SLANT_0_1 +261 0x2000 //RX_FDDRC_SLANT_0_2 +262 0x2000 //RX_FDDRC_SLANT_0_3 +263 0x5333 //RX_FDDRC_SLANT_1_0 +264 0x5333 //RX_FDDRC_SLANT_1_1 +265 0x5333 //RX_FDDRC_SLANT_1_2 +266 0x5333 //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +286 0x0100 //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 +#VOL 4 +163 0x3000 //RX_TDDRC_ALPHA_UP_1 +164 0x3000 //RX_TDDRC_ALPHA_UP_2 +165 0x3000 //RX_TDDRC_ALPHA_UP_3 +166 0x3000 //RX_TDDRC_ALPHA_UP_4 +184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +190 0x7FFF //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +269 0x0000 //RX_TDDRC_THRD_0 +270 0x0000 //RX_TDDRC_THRD_1 +271 0x7FFF //RX_TDDRC_THRD_2 +272 0x7FFF //RX_TDDRC_THRD_3 +273 0x7FFF //RX_TDDRC_SLANT_0 +274 0x7EB8 //RX_TDDRC_SLANT_1 +275 0x3000 //RX_TDDRC_ALPHA_UP_0 +276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x199A //RX_TDDRC_HMNC_GAIN +279 0x0001 //RX_TDDRC_SMT_FLAG +280 0x0CCD //RX_TDDRC_SMT_W +281 0x017F //RX_TDDRC_DRC_GAIN +195 0x0014 //RX_FDEQ_SUBNUM +196 0x4848 //RX_FDEQ_GAIN_0 +197 0x4848 //RX_FDEQ_GAIN_1 +198 0x4848 //RX_FDEQ_GAIN_2 +199 0x4848 //RX_FDEQ_GAIN_3 +200 0x4848 //RX_FDEQ_GAIN_4 +201 0x4848 //RX_FDEQ_GAIN_5 +202 0x4444 //RX_FDEQ_GAIN_6 +203 0x4040 //RX_FDEQ_GAIN_7 +204 0x4040 //RX_FDEQ_GAIN_8 +205 0x4040 //RX_FDEQ_GAIN_9 +206 0x4848 //RX_FDEQ_GAIN_10 +207 0x4848 //RX_FDEQ_GAIN_11 +208 0x4848 //RX_FDEQ_GAIN_12 +209 0x4848 //RX_FDEQ_GAIN_13 +210 0x4848 //RX_FDEQ_GAIN_14 +211 0x4848 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0202 //RX_FDEQ_BIN_0 +221 0x0203 //RX_FDEQ_BIN_1 +222 0x0303 //RX_FDEQ_BIN_2 +223 0x0304 //RX_FDEQ_BIN_3 +224 0x0405 //RX_FDEQ_BIN_4 +225 0x0506 //RX_FDEQ_BIN_5 +226 0x0708 //RX_FDEQ_BIN_6 +227 0x090A //RX_FDEQ_BIN_7 +228 0x0B0C //RX_FDEQ_BIN_8 +229 0x0D0E //RX_FDEQ_BIN_9 +230 0x0000 //RX_FDEQ_BIN_10 +231 0x0000 //RX_FDEQ_BIN_11 +232 0x0000 //RX_FDEQ_BIN_12 +233 0x0000 //RX_FDEQ_BIN_13 +234 0x0000 //RX_FDEQ_BIN_14 +235 0x0000 //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x4000 //RX_FDEQ_RESRV_0 +245 0x0320 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0030 //RX_FDDRC_BAND_MARGIN_1 +248 0x0050 //RX_FDDRC_BAND_MARGIN_2 +249 0x0080 //RX_FDDRC_BAND_MARGIN_3 +250 0x0007 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x5000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x6400 //RX_FDDRC_THRD_3_2 +258 0x6400 //RX_FDDRC_THRD_3_3 +259 0x2000 //RX_FDDRC_SLANT_0_0 +260 0x2000 //RX_FDDRC_SLANT_0_1 +261 0x2000 //RX_FDDRC_SLANT_0_2 +262 0x2000 //RX_FDDRC_SLANT_0_3 +263 0x5333 //RX_FDDRC_SLANT_1_0 +264 0x5333 //RX_FDDRC_SLANT_1_1 +265 0x5333 //RX_FDDRC_SLANT_1_2 +266 0x5333 //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +286 0x0100 //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 +#VOL 5 +163 0x3000 //RX_TDDRC_ALPHA_UP_1 +164 0x3000 //RX_TDDRC_ALPHA_UP_2 +165 0x3000 //RX_TDDRC_ALPHA_UP_3 +166 0x3000 //RX_TDDRC_ALPHA_UP_4 +184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +190 0x7FFF //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +269 0x0000 //RX_TDDRC_THRD_0 +270 0x0000 //RX_TDDRC_THRD_1 +271 0x7FFF //RX_TDDRC_THRD_2 +272 0x7FFF //RX_TDDRC_THRD_3 +273 0x7FFF //RX_TDDRC_SLANT_0 +274 0x7EB8 //RX_TDDRC_SLANT_1 +275 0x3000 //RX_TDDRC_ALPHA_UP_0 +276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x199A //RX_TDDRC_HMNC_GAIN +279 0x0001 //RX_TDDRC_SMT_FLAG +280 0x0CCD //RX_TDDRC_SMT_W +281 0x017F //RX_TDDRC_DRC_GAIN +195 0x0014 //RX_FDEQ_SUBNUM +196 0x4848 //RX_FDEQ_GAIN_0 +197 0x4848 //RX_FDEQ_GAIN_1 +198 0x4848 //RX_FDEQ_GAIN_2 +199 0x4848 //RX_FDEQ_GAIN_3 +200 0x4848 //RX_FDEQ_GAIN_4 +201 0x4848 //RX_FDEQ_GAIN_5 +202 0x4444 //RX_FDEQ_GAIN_6 +203 0x4040 //RX_FDEQ_GAIN_7 +204 0x4040 //RX_FDEQ_GAIN_8 +205 0x4040 //RX_FDEQ_GAIN_9 +206 0x4848 //RX_FDEQ_GAIN_10 +207 0x4848 //RX_FDEQ_GAIN_11 +208 0x4848 //RX_FDEQ_GAIN_12 +209 0x4848 //RX_FDEQ_GAIN_13 +210 0x4848 //RX_FDEQ_GAIN_14 +211 0x4848 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0202 //RX_FDEQ_BIN_0 +221 0x0203 //RX_FDEQ_BIN_1 +222 0x0303 //RX_FDEQ_BIN_2 +223 0x0304 //RX_FDEQ_BIN_3 +224 0x0405 //RX_FDEQ_BIN_4 +225 0x0506 //RX_FDEQ_BIN_5 +226 0x0708 //RX_FDEQ_BIN_6 +227 0x090A //RX_FDEQ_BIN_7 +228 0x0B0C //RX_FDEQ_BIN_8 +229 0x0D0E //RX_FDEQ_BIN_9 +230 0x0000 //RX_FDEQ_BIN_10 +231 0x0000 //RX_FDEQ_BIN_11 +232 0x0000 //RX_FDEQ_BIN_12 +233 0x0000 //RX_FDEQ_BIN_13 +234 0x0000 //RX_FDEQ_BIN_14 +235 0x0000 //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x4000 //RX_FDEQ_RESRV_0 +245 0x0320 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0030 //RX_FDDRC_BAND_MARGIN_1 +248 0x0050 //RX_FDDRC_BAND_MARGIN_2 +249 0x0080 //RX_FDDRC_BAND_MARGIN_3 +250 0x0007 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x5000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x6400 //RX_FDDRC_THRD_3_2 +258 0x6400 //RX_FDDRC_THRD_3_3 +259 0x2000 //RX_FDDRC_SLANT_0_0 +260 0x2000 //RX_FDDRC_SLANT_0_1 +261 0x2000 //RX_FDDRC_SLANT_0_2 +262 0x2000 //RX_FDDRC_SLANT_0_3 +263 0x5333 //RX_FDDRC_SLANT_1_0 +264 0x5333 //RX_FDDRC_SLANT_1_1 +265 0x5333 //RX_FDDRC_SLANT_1_2 +266 0x5333 //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +286 0x0100 //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 +#VOL 6 +163 0x3000 //RX_TDDRC_ALPHA_UP_1 +164 0x3000 //RX_TDDRC_ALPHA_UP_2 +165 0x3000 //RX_TDDRC_ALPHA_UP_3 +166 0x3000 //RX_TDDRC_ALPHA_UP_4 +184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +190 0x7FFF //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +269 0x0000 //RX_TDDRC_THRD_0 +270 0x0000 //RX_TDDRC_THRD_1 +271 0x7FFF //RX_TDDRC_THRD_2 +272 0x7FFF //RX_TDDRC_THRD_3 +273 0x7FFF //RX_TDDRC_SLANT_0 +274 0x7EB8 //RX_TDDRC_SLANT_1 +275 0x3000 //RX_TDDRC_ALPHA_UP_0 +276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x199A //RX_TDDRC_HMNC_GAIN +279 0x0001 //RX_TDDRC_SMT_FLAG +280 0x0CCD //RX_TDDRC_SMT_W +281 0x017F //RX_TDDRC_DRC_GAIN +195 0x0014 //RX_FDEQ_SUBNUM +196 0x4848 //RX_FDEQ_GAIN_0 +197 0x4848 //RX_FDEQ_GAIN_1 +198 0x4848 //RX_FDEQ_GAIN_2 +199 0x4848 //RX_FDEQ_GAIN_3 +200 0x4848 //RX_FDEQ_GAIN_4 +201 0x4848 //RX_FDEQ_GAIN_5 +202 0x4444 //RX_FDEQ_GAIN_6 +203 0x4040 //RX_FDEQ_GAIN_7 +204 0x4040 //RX_FDEQ_GAIN_8 +205 0x4040 //RX_FDEQ_GAIN_9 +206 0x4848 //RX_FDEQ_GAIN_10 +207 0x4848 //RX_FDEQ_GAIN_11 +208 0x4848 //RX_FDEQ_GAIN_12 +209 0x4848 //RX_FDEQ_GAIN_13 +210 0x4848 //RX_FDEQ_GAIN_14 +211 0x4848 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0202 //RX_FDEQ_BIN_0 +221 0x0203 //RX_FDEQ_BIN_1 +222 0x0303 //RX_FDEQ_BIN_2 +223 0x0304 //RX_FDEQ_BIN_3 +224 0x0405 //RX_FDEQ_BIN_4 +225 0x0506 //RX_FDEQ_BIN_5 +226 0x0708 //RX_FDEQ_BIN_6 +227 0x090A //RX_FDEQ_BIN_7 +228 0x0B0C //RX_FDEQ_BIN_8 +229 0x0D0E //RX_FDEQ_BIN_9 +230 0x0000 //RX_FDEQ_BIN_10 +231 0x0000 //RX_FDEQ_BIN_11 +232 0x0000 //RX_FDEQ_BIN_12 +233 0x0000 //RX_FDEQ_BIN_13 +234 0x0000 //RX_FDEQ_BIN_14 +235 0x0000 //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x4000 //RX_FDEQ_RESRV_0 +245 0x0320 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0030 //RX_FDDRC_BAND_MARGIN_1 +248 0x0050 //RX_FDDRC_BAND_MARGIN_2 +249 0x0080 //RX_FDDRC_BAND_MARGIN_3 +250 0x0007 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x5000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x6400 //RX_FDDRC_THRD_3_2 +258 0x6400 //RX_FDDRC_THRD_3_3 +259 0x2000 //RX_FDDRC_SLANT_0_0 +260 0x2000 //RX_FDDRC_SLANT_0_1 +261 0x2000 //RX_FDDRC_SLANT_0_2 +262 0x2000 //RX_FDDRC_SLANT_0_3 +263 0x5333 //RX_FDDRC_SLANT_1_0 +264 0x5333 //RX_FDDRC_SLANT_1_1 +265 0x5333 //RX_FDDRC_SLANT_1_2 +266 0x5333 //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +286 0x0100 //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 #CASE_NAME BLUETOOTH-BTWB-VOICE_GENERIC-WB -#PARAM_TYPE TX+RX -#TOTAL_CUSTOM_STEP 7 +#PARAM_MODE Full +#PARAM_TYPE TX+2RX +#TOTAL_CUSTOM_STEP 7+7 #TX 0 0x0008 //TX_OPERATION_MODE_0 1 0x0008 //TX_OPERATION_MODE_1 @@ -24800,20 +37639,20 @@ 248 0xF400 //TX_THR_SN_EST_6 249 0xF600 //TX_THR_SN_EST_7 250 0x0000 //TX_DELTA_THR_SN_EST_0 -251 0x0000 //TX_DELTA_THR_SN_EST_1 +251 0x0200 //TX_DELTA_THR_SN_EST_1 252 0x0200 //TX_DELTA_THR_SN_EST_2 253 0x0200 //TX_DELTA_THR_SN_EST_3 254 0x0200 //TX_DELTA_THR_SN_EST_4 255 0x0200 //TX_DELTA_THR_SN_EST_5 -256 0x0200 //TX_DELTA_THR_SN_EST_6 +256 0x0000 //TX_DELTA_THR_SN_EST_6 257 0x0200 //TX_DELTA_THR_SN_EST_7 258 0x6000 //TX_LAMBDA_NN_EST_0 -259 0x6000 //TX_LAMBDA_NN_EST_1 +259 0x4000 //TX_LAMBDA_NN_EST_1 260 0x4000 //TX_LAMBDA_NN_EST_2 261 0x4000 //TX_LAMBDA_NN_EST_3 262 0x4000 //TX_LAMBDA_NN_EST_4 263 0x4000 //TX_LAMBDA_NN_EST_5 -264 0x4000 //TX_LAMBDA_NN_EST_6 +264 0x6000 //TX_LAMBDA_NN_EST_6 265 0x4000 //TX_LAMBDA_NN_EST_7 266 0x0400 //TX_N_SN_EST 267 0x001E //TX_INBEAM_T @@ -24831,16 +37670,16 @@ 279 0x1000 //TX_B_POST_FLT_0 280 0x1000 //TX_B_POST_FLT_1 281 0x000F //TX_NS_LVL_CTRL_0 -282 0x000F //TX_NS_LVL_CTRL_1 -283 0x0011 //TX_NS_LVL_CTRL_2 +282 0x0011 //TX_NS_LVL_CTRL_1 +283 0x000F //TX_NS_LVL_CTRL_2 284 0x000F //TX_NS_LVL_CTRL_3 285 0x000F //TX_NS_LVL_CTRL_4 286 0x000F //TX_NS_LVL_CTRL_5 287 0x000F //TX_NS_LVL_CTRL_6 288 0x0011 //TX_NS_LVL_CTRL_7 289 0x000C //TX_MIN_GAIN_S_0 -290 0x000C //TX_MIN_GAIN_S_1 -291 0x000F //TX_MIN_GAIN_S_2 +290 0x000F //TX_MIN_GAIN_S_1 +291 0x000C //TX_MIN_GAIN_S_2 292 0x000C //TX_MIN_GAIN_S_3 293 0x000C //TX_MIN_GAIN_S_4 294 0x000C //TX_MIN_GAIN_S_5 @@ -24864,12 +37703,12 @@ 312 0x7FFF //TX_A_POST_FILT_0 313 0x2000 //TX_A_POST_FILT_1 314 0x4000 //TX_A_POST_FILT_S_0 -315 0x4000 //TX_A_POST_FILT_S_1 +315 0x5000 //TX_A_POST_FILT_S_1 316 0x5000 //TX_A_POST_FILT_S_2 317 0x5000 //TX_A_POST_FILT_S_3 318 0x5000 //TX_A_POST_FILT_S_4 319 0x5000 //TX_A_POST_FILT_S_5 -320 0x5000 //TX_A_POST_FILT_S_6 +320 0x4000 //TX_A_POST_FILT_S_6 321 0x5000 //TX_A_POST_FILT_S_7 322 0x1000 //TX_B_POST_FILT_0 323 0x1000 //TX_B_POST_FILT_1 @@ -24929,10 +37768,10 @@ 377 0x7FFF //TX_NOISE_TH_5_4 378 0x044C //TX_NOISE_TH_6 379 0x0014 //TX_MINENOISE_TH -380 0x4000 //TX_MINENOISE_MIC0_TH_MTS -381 0xFFEE //TX_MINENOISE_MIC0_TH_EXP -382 0x6000 //TX_MINENOISE_MIC0_S_TH_MTS -383 0xFFF3 //TX_MINENOISE_MIC0_S_TH_EXP +380 0x4000 //TX_MORENS_TFMASK_TH +381 0xFFEE //TX_DRC_QUIET_FLOOR +382 0x6000 //TX_RATIODTL_CUT_TH +383 0xFFF3 //TX_DT_CUT_K1 384 0x0666 //TX_OUT_ENER_S_TH_CLEAN 385 0x0666 //TX_OUT_ENER_S_TH_LESSCLEAN 386 0x0333 //TX_OUT_ENER_S_TH_NOISY @@ -24940,15 +37779,15 @@ 388 0x0333 //TX_OUT_ENER_TH_SPEECH 389 0x2000 //TX_SN_NPB_GAIN 390 0x0000 //TX_NN_NPB_GAIN -391 0x0000 //TX_CSX_ALPHA_0 -392 0x0000 //TX_CSX_ALPHA_1 -393 0x0000 //TX_CSX_ALPHA_2 -394 0x0000 //TX_CSX_ALPHA_3 -395 0x0800 //TX_MU_ARSP_EST -396 0x00C8 //TX_P_OUTBEAM_MIN_TH +391 0x0000 //TX_POST_MASK_SUP_HSNE +392 0x0000 //TX_TAIL_DET_TH +393 0x0000 //TX_B_LESSCUT_RTO_WTA +394 0x0000 //TX_MEL_G_R +395 0x0800 //TX_SUPHIGH_TH +396 0x00C8 //TX_MASK_G_R 397 0x0002 //TX_EXTRA_NS_L -398 0x0800 //TX_EXTRA_NS_A -399 0x0005 //TX_VR_NOISE_FLOOR_TH +398 0x0800 //TX_C_POST_FLT_MASK +399 0x0005 //TX_A_POST_FLT_WNS 400 0x0148 //TX_MIN_G_LOW300HZ 401 0x0002 //TX_MAXLEVEL_CNG 402 0x00B4 //TX_STN_NOISE_TH @@ -25063,16 +37902,16 @@ 511 0x6666 //TX_MIC_TO_BFGAIN 512 0x0000 //TX_MICTOBFGAIN0 513 0x0000 //TX_FASTMUE_TH -514 0x0000 //TX_DERVB_LEN_0 -515 0x0000 //TX_DERVB_LEN_1 -516 0x0000 //TX_RHO_DERVB -517 0x0000 //TX_MIC_INDX_DERVB -518 0x0000 //TX_MU_DERVB -519 0x0000 //TX_DR_RESRV_0 -520 0x0000 //TX_DR_RESRV_1 -521 0x0000 //TX_DR_RESRV_2 -522 0x0000 //TX_DR_RESRV_3 -523 0x0000 //TX_DR_RESRV_4 +514 0x0000 //TX_DEREVERB_LF_MU +515 0x0000 //TX_DEREVERB_HF_MU +516 0x0000 //TX_DEREVERB_DELAY +517 0x0000 //TX_DEREVERB_COEF_LEN +518 0x0000 //TX_DEREVERB_DNR +519 0x0000 //TX_DEREVERB_ALPHA +520 0x0000 //TX_DEREVERB_BETA +521 0x0000 //TX_GSC_RTOL_TH +522 0x0000 //TX_GSC_RTOH_TH +523 0x0000 //TX_WIDE2_MEANHTH 524 0x0000 //TX_DR_RESRV_5 525 0x0000 //TX_DR_RESRV_6 526 0x0000 //TX_DR_RESRV_7 @@ -25446,8 +38285,73 @@ 894 0xC000 //TX_FASTNS_SSA_THHFL 895 0xCCCC //TX_FASTNS_SSA_THLFH 896 0xD999 //TX_FASTNS_SSA_THHFH +897 0x0000 //TX_SENDFUNC_REG_MICMUTE +898 0x0000 //TX_SENDFUNC_REG_MICMUTE1 +899 0x0000 //TX_MICMUTE_RATIO_THR +900 0x0000 //TX_MICMUTE_AMP_THR +901 0x0000 //TX_MICMUTE_HPF_IND +902 0x0000 //TX_MICMUTE_LOG_EYR_TH +903 0x0000 //TX_MICMUTE_CVG_TIME +904 0x0000 //TX_MICMUTE_RELEASE_TIME +905 0x0000 //TX_MIC_VOLUME_MIC0MUTE +906 0x0000 //TX_MICMUTE_EPD_OFFSET_0 +907 0x0000 //TX_MICMUTE_FRQ_AEC_L +908 0x0000 //TX_MICMUTE_EAD_THR +909 0x0000 //TX_MICMUTE_LAMBDA_CB_NLE +910 0x0000 //TX_MICMUTE_LAMBDA_RE_EST +911 0x0000 //TX_DTD_THR1_MICMUTE_0 +912 0x0000 //TX_DTD_THR1_MICMUTE_1 +913 0x0000 //TX_DTD_THR1_MICMUTE_2 +914 0x0000 //TX_DTD_THR1_MICMUTE_3 +915 0x0000 //TX_DTD_THR2_MICMUTE_0 +916 0x0000 //TX_MICMUTE_MIN_EQ_RE_EST_0 +917 0x0000 //TX_MICMUTE_MIN_EQ_RE_EST_1 +918 0x0000 //TX_MICMUTE_MIN_EQ_RE_EST_2 +919 0x0000 //TX_MICMUTE_MIN_EQ_RE_EST_3 +920 0x0000 //TX_MICMUTE_MIN_EQ_RE_EST_4 +921 0x0000 //TX_MICMUTE_C_POST_FLT +922 0x0000 //TX_MICMUTE_DT_CUT_K +923 0x0000 //TX_MICMUTE_DT_CUT_THR +924 0x0000 //TX_MICMUTE_DT_CUT_K2 +925 0x0000 //TX_MICMUTE_DT_CUT_THR2 +926 0x0000 //TX_MICMUTE_DT2_HOLD_N +927 0x0000 //TX_MICMUTE_RATIODTH_THCUT +928 0x0000 //TX_MICMUTE_B_POST_FLT_ECHOL +929 0x0000 //TX_MICMUTE_B_POST_FLT_ECHOH +930 0x0000 //TX_MICMUTE_C_POST_FLT_MASK +931 0x0000 //TX_MICMUTE_RATIODTL_CUT_TH +932 0x0000 //TX_MICMUTE_DT_CUT_K1 +933 0x0000 //TX_MICMUTE_N2_SN_EST +934 0x0000 //TX_MICMUTE_THR_SN_EST_0 +935 0x0000 //TX_MICMUTE_MIN_G_CTRL_0 +936 0x0000 //TX_MICMUTE_A_POST_FILT_S_0 +937 0x0000 //TX_MICMUTE_B_POST_FILT_0 +938 0x0000 //TX_MIC1RUB_AMP_THR +939 0x0000 //TX_MIC1MUTE_RATIO_THR +940 0x0000 //TX_MIC1MUTE_AMP_THR +941 0x0000 //TX_MIC1MUTE_CVG_TIME +942 0x0000 //TX_MIC1MUTE_RELEASE_TIME +943 0x0000 //TX_AMS_RESRV_01 +944 0x0000 //TX_AMS_RESRV_02 +945 0x0000 //TX_AMS_RESRV_03 +946 0x0000 //TX_AMS_RESRV_04 +947 0x0000 //TX_AMS_RESRV_05 +948 0x0000 //TX_AMS_RESRV_06 +949 0x0000 //TX_AMS_RESRV_07 +950 0x0000 //TX_AMS_RESRV_08 +951 0x0000 //TX_AMS_RESRV_09 +952 0x0000 //TX_AMS_RESRV_10 +953 0x0000 //TX_AMS_RESRV_11 +954 0x0000 //TX_AMS_RESRV_12 +955 0x0000 //TX_AMS_RESRV_13 +956 0x0000 //TX_AMS_RESRV_14 +957 0x0000 //TX_AMS_RESRV_15 +958 0x0000 //TX_AMS_RESRV_16 +959 0x0000 //TX_AMS_RESRV_17 +960 0x0000 //TX_AMS_RESRV_18 +961 0x0000 //TX_AMS_RESRV_19 #RX -0 0x006C //RX_RECVFUNC_MODE_0 +0 0x206C //RX_RECVFUNC_MODE_0 1 0x0000 //RX_RECVFUNC_MODE_1 2 0x0001 //RX_SAMPLINGFREQ_SIG 3 0x0001 //RX_SAMPLINGFREQ_PROC @@ -26297,10 +39201,862 @@ 110 0x0000 //RX_FDDRC_RESRV_0 129 0x0100 //RX_SPK_VOL 130 0x0000 //RX_VOL_RESRV_0 +#RX 2 +157 0x206C //RX_RECVFUNC_MODE_0 +158 0x0000 //RX_RECVFUNC_MODE_1 +159 0x0001 //RX_SAMPLINGFREQ_SIG +160 0x0001 //RX_SAMPLINGFREQ_PROC +161 0x000A //RX_FRAME_SZ +162 0x0000 //RX_DELAY_OPT +163 0x1000 //RX_TDDRC_ALPHA_UP_1 +164 0x1000 //RX_TDDRC_ALPHA_UP_2 +165 0x1000 //RX_TDDRC_ALPHA_UP_3 +166 0x1000 //RX_TDDRC_ALPHA_UP_4 +167 0x0800 //RX_PGA +168 0x7FFF //RX_A_HP +169 0x4000 //RX_B_PE +170 0x3800 //RX_THR_PITCH_DET_0 +171 0x3000 //RX_THR_PITCH_DET_1 +172 0x2800 //RX_THR_PITCH_DET_2 +173 0x0008 //RX_PITCH_BFR_LEN +174 0x0003 //RX_SBD_PITCH_DET +175 0x0100 //RX_PP_RESRV_0 +176 0x0020 //RX_PP_RESRV_1 +177 0x0600 //RX_N_SN_EST +178 0x000C //RX_N2_SN_EST +179 0x0010 //RX_NS_LVL_CTRL +180 0xF800 //RX_THR_SN_EST +181 0x7CCD //RX_LAMBDA_PFILT +182 0x000A //RX_FENS_RESRV_0 +183 0x0190 //RX_FENS_RESRV_1 +184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +187 0x0002 //RX_EXTRA_NS_L +188 0x0800 //RX_EXTRA_NS_A +189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +190 0x7FFF //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +192 0x199A //RX_A_POST_FLT +193 0x0000 //RX_LMT_THRD +194 0x4000 //RX_LMT_ALPHA +195 0x001C //RX_FDEQ_SUBNUM +196 0x4848 //RX_FDEQ_GAIN_0 +197 0x4848 //RX_FDEQ_GAIN_1 +198 0x4848 //RX_FDEQ_GAIN_2 +199 0x4848 //RX_FDEQ_GAIN_3 +200 0x4848 //RX_FDEQ_GAIN_4 +201 0x4848 //RX_FDEQ_GAIN_5 +202 0x4848 //RX_FDEQ_GAIN_6 +203 0x4848 //RX_FDEQ_GAIN_7 +204 0x4848 //RX_FDEQ_GAIN_8 +205 0x3C3C //RX_FDEQ_GAIN_9 +206 0x3C3C //RX_FDEQ_GAIN_10 +207 0x3838 //RX_FDEQ_GAIN_11 +208 0x3838 //RX_FDEQ_GAIN_12 +209 0x3030 //RX_FDEQ_GAIN_13 +210 0x4848 //RX_FDEQ_GAIN_14 +211 0x4848 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0202 //RX_FDEQ_BIN_0 +221 0x0203 //RX_FDEQ_BIN_1 +222 0x0303 //RX_FDEQ_BIN_2 +223 0x0304 //RX_FDEQ_BIN_3 +224 0x0405 //RX_FDEQ_BIN_4 +225 0x0506 //RX_FDEQ_BIN_5 +226 0x0708 //RX_FDEQ_BIN_6 +227 0x090A //RX_FDEQ_BIN_7 +228 0x0B0C //RX_FDEQ_BIN_8 +229 0x0D0E //RX_FDEQ_BIN_9 +230 0x0E0F //RX_FDEQ_BIN_10 +231 0x0F10 //RX_FDEQ_BIN_11 +232 0x1011 //RX_FDEQ_BIN_12 +233 0x1112 //RX_FDEQ_BIN_13 +234 0x0000 //RX_FDEQ_BIN_14 +235 0x0000 //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x4000 //RX_FDEQ_RESRV_0 +245 0x0320 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0030 //RX_FDDRC_BAND_MARGIN_1 +248 0x0050 //RX_FDDRC_BAND_MARGIN_2 +249 0x0080 //RX_FDDRC_BAND_MARGIN_3 +250 0x0007 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x5000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x6400 //RX_FDDRC_THRD_3_2 +258 0x6400 //RX_FDDRC_THRD_3_3 +259 0x2000 //RX_FDDRC_SLANT_0_0 +260 0x2000 //RX_FDDRC_SLANT_0_1 +261 0x2000 //RX_FDDRC_SLANT_0_2 +262 0x2000 //RX_FDDRC_SLANT_0_3 +263 0x5333 //RX_FDDRC_SLANT_1_0 +264 0x5333 //RX_FDDRC_SLANT_1_1 +265 0x5333 //RX_FDDRC_SLANT_1_2 +266 0x5333 //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +268 0x0000 //RX_FILTINDX +269 0x0000 //RX_TDDRC_THRD_0 +270 0x0000 //RX_TDDRC_THRD_1 +271 0x7FFF //RX_TDDRC_THRD_2 +272 0x7FFF //RX_TDDRC_THRD_3 +273 0x7E70 //RX_TDDRC_SLANT_0 +274 0x7FFF //RX_TDDRC_SLANT_1 +275 0x1000 //RX_TDDRC_ALPHA_UP_0 +276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x199A //RX_TDDRC_HMNC_GAIN +279 0x0001 //RX_TDDRC_SMT_FLAG +280 0x0CCD //RX_TDDRC_SMT_W +281 0x0155 //RX_TDDRC_DRC_GAIN +282 0x7C00 //RX_LAMBDA_PKA_FP +283 0x2000 //RX_TPKA_FP +284 0x2000 //RX_MIN_G_FP +285 0x0080 //RX_MAX_G_FP +286 0x0100 //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 +288 0x0000 //RX_MAXLEVEL_CNG +289 0x3000 //RX_BWE_UV_TH +290 0x3000 //RX_BWE_UV_TH2 +291 0x1800 //RX_BWE_UV_TH3 +292 0x1000 //RX_BWE_V_TH +293 0x04CD //RX_BWE_GAIN1_V_TH1 +294 0x0F33 //RX_BWE_GAIN1_V_TH2 +295 0x7333 //RX_BWE_UV_EQ +296 0x199A //RX_BWE_V_EQ +297 0x7333 //RX_BWE_TONE_TH +298 0x0004 //RX_BWE_UV_HOLD_T +299 0x6CCD //RX_BWE_GAIN2_ALPHA +300 0x799A //RX_BWE_GAIN3_ALPHA +301 0x001E //RX_BWE_CUTOFF +302 0x3000 //RX_BWE_GAINFILL +303 0x3200 //RX_BWE_MAXTH_TONE +304 0x2000 //RX_BWE_EQ_0 +305 0x2000 //RX_BWE_EQ_1 +306 0x2000 //RX_BWE_EQ_2 +307 0x2000 //RX_BWE_EQ_3 +308 0x2000 //RX_BWE_EQ_4 +309 0x2000 //RX_BWE_EQ_5 +310 0x2000 //RX_BWE_EQ_6 +311 0x0000 //RX_BWE_RESRV_0 +312 0x0000 //RX_BWE_RESRV_1 +313 0x0000 //RX_BWE_RESRV_2 +#VOL 0 +163 0x1000 //RX_TDDRC_ALPHA_UP_1 +164 0x1000 //RX_TDDRC_ALPHA_UP_2 +165 0x1000 //RX_TDDRC_ALPHA_UP_3 +166 0x1000 //RX_TDDRC_ALPHA_UP_4 +184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +190 0x7FFF //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +269 0x0000 //RX_TDDRC_THRD_0 +270 0x0000 //RX_TDDRC_THRD_1 +271 0x7FFF //RX_TDDRC_THRD_2 +272 0x7FFF //RX_TDDRC_THRD_3 +273 0x7E70 //RX_TDDRC_SLANT_0 +274 0x7FFF //RX_TDDRC_SLANT_1 +275 0x1000 //RX_TDDRC_ALPHA_UP_0 +276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x199A //RX_TDDRC_HMNC_GAIN +279 0x0001 //RX_TDDRC_SMT_FLAG +280 0x0CCD //RX_TDDRC_SMT_W +281 0x0155 //RX_TDDRC_DRC_GAIN +195 0x001C //RX_FDEQ_SUBNUM +196 0x4848 //RX_FDEQ_GAIN_0 +197 0x4848 //RX_FDEQ_GAIN_1 +198 0x4848 //RX_FDEQ_GAIN_2 +199 0x4848 //RX_FDEQ_GAIN_3 +200 0x4848 //RX_FDEQ_GAIN_4 +201 0x4848 //RX_FDEQ_GAIN_5 +202 0x4848 //RX_FDEQ_GAIN_6 +203 0x4848 //RX_FDEQ_GAIN_7 +204 0x4848 //RX_FDEQ_GAIN_8 +205 0x3C3C //RX_FDEQ_GAIN_9 +206 0x3C3C //RX_FDEQ_GAIN_10 +207 0x3838 //RX_FDEQ_GAIN_11 +208 0x3838 //RX_FDEQ_GAIN_12 +209 0x3030 //RX_FDEQ_GAIN_13 +210 0x4848 //RX_FDEQ_GAIN_14 +211 0x4848 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0202 //RX_FDEQ_BIN_0 +221 0x0203 //RX_FDEQ_BIN_1 +222 0x0303 //RX_FDEQ_BIN_2 +223 0x0304 //RX_FDEQ_BIN_3 +224 0x0405 //RX_FDEQ_BIN_4 +225 0x0506 //RX_FDEQ_BIN_5 +226 0x0708 //RX_FDEQ_BIN_6 +227 0x090A //RX_FDEQ_BIN_7 +228 0x0B0C //RX_FDEQ_BIN_8 +229 0x0D0E //RX_FDEQ_BIN_9 +230 0x0E0F //RX_FDEQ_BIN_10 +231 0x0F10 //RX_FDEQ_BIN_11 +232 0x1011 //RX_FDEQ_BIN_12 +233 0x1112 //RX_FDEQ_BIN_13 +234 0x0000 //RX_FDEQ_BIN_14 +235 0x0000 //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x4000 //RX_FDEQ_RESRV_0 +245 0x0320 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0030 //RX_FDDRC_BAND_MARGIN_1 +248 0x0050 //RX_FDDRC_BAND_MARGIN_2 +249 0x0080 //RX_FDDRC_BAND_MARGIN_3 +250 0x0007 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x5000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x6400 //RX_FDDRC_THRD_3_2 +258 0x6400 //RX_FDDRC_THRD_3_3 +259 0x2000 //RX_FDDRC_SLANT_0_0 +260 0x2000 //RX_FDDRC_SLANT_0_1 +261 0x2000 //RX_FDDRC_SLANT_0_2 +262 0x2000 //RX_FDDRC_SLANT_0_3 +263 0x5333 //RX_FDDRC_SLANT_1_0 +264 0x5333 //RX_FDDRC_SLANT_1_1 +265 0x5333 //RX_FDDRC_SLANT_1_2 +266 0x5333 //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +286 0x0100 //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 +#VOL 1 +163 0x1000 //RX_TDDRC_ALPHA_UP_1 +164 0x1000 //RX_TDDRC_ALPHA_UP_2 +165 0x1000 //RX_TDDRC_ALPHA_UP_3 +166 0x1000 //RX_TDDRC_ALPHA_UP_4 +184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +190 0x7FFF //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +269 0x0000 //RX_TDDRC_THRD_0 +270 0x0000 //RX_TDDRC_THRD_1 +271 0x7FFF //RX_TDDRC_THRD_2 +272 0x7FFF //RX_TDDRC_THRD_3 +273 0x7E70 //RX_TDDRC_SLANT_0 +274 0x7FFF //RX_TDDRC_SLANT_1 +275 0x1000 //RX_TDDRC_ALPHA_UP_0 +276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x199A //RX_TDDRC_HMNC_GAIN +279 0x0001 //RX_TDDRC_SMT_FLAG +280 0x0CCD //RX_TDDRC_SMT_W +281 0x0155 //RX_TDDRC_DRC_GAIN +195 0x001C //RX_FDEQ_SUBNUM +196 0x4848 //RX_FDEQ_GAIN_0 +197 0x4848 //RX_FDEQ_GAIN_1 +198 0x4848 //RX_FDEQ_GAIN_2 +199 0x4848 //RX_FDEQ_GAIN_3 +200 0x4848 //RX_FDEQ_GAIN_4 +201 0x4848 //RX_FDEQ_GAIN_5 +202 0x4848 //RX_FDEQ_GAIN_6 +203 0x4848 //RX_FDEQ_GAIN_7 +204 0x4848 //RX_FDEQ_GAIN_8 +205 0x3C3C //RX_FDEQ_GAIN_9 +206 0x3C3C //RX_FDEQ_GAIN_10 +207 0x3838 //RX_FDEQ_GAIN_11 +208 0x3838 //RX_FDEQ_GAIN_12 +209 0x3030 //RX_FDEQ_GAIN_13 +210 0x4848 //RX_FDEQ_GAIN_14 +211 0x4848 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0202 //RX_FDEQ_BIN_0 +221 0x0203 //RX_FDEQ_BIN_1 +222 0x0303 //RX_FDEQ_BIN_2 +223 0x0304 //RX_FDEQ_BIN_3 +224 0x0405 //RX_FDEQ_BIN_4 +225 0x0506 //RX_FDEQ_BIN_5 +226 0x0708 //RX_FDEQ_BIN_6 +227 0x090A //RX_FDEQ_BIN_7 +228 0x0B0C //RX_FDEQ_BIN_8 +229 0x0D0E //RX_FDEQ_BIN_9 +230 0x0E0F //RX_FDEQ_BIN_10 +231 0x0F10 //RX_FDEQ_BIN_11 +232 0x1011 //RX_FDEQ_BIN_12 +233 0x1112 //RX_FDEQ_BIN_13 +234 0x0000 //RX_FDEQ_BIN_14 +235 0x0000 //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x4000 //RX_FDEQ_RESRV_0 +245 0x0320 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0030 //RX_FDDRC_BAND_MARGIN_1 +248 0x0050 //RX_FDDRC_BAND_MARGIN_2 +249 0x0080 //RX_FDDRC_BAND_MARGIN_3 +250 0x0007 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x5000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x6400 //RX_FDDRC_THRD_3_2 +258 0x6400 //RX_FDDRC_THRD_3_3 +259 0x2000 //RX_FDDRC_SLANT_0_0 +260 0x2000 //RX_FDDRC_SLANT_0_1 +261 0x2000 //RX_FDDRC_SLANT_0_2 +262 0x2000 //RX_FDDRC_SLANT_0_3 +263 0x5333 //RX_FDDRC_SLANT_1_0 +264 0x5333 //RX_FDDRC_SLANT_1_1 +265 0x5333 //RX_FDDRC_SLANT_1_2 +266 0x5333 //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +286 0x0100 //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 +#VOL 2 +163 0x1000 //RX_TDDRC_ALPHA_UP_1 +164 0x1000 //RX_TDDRC_ALPHA_UP_2 +165 0x1000 //RX_TDDRC_ALPHA_UP_3 +166 0x1000 //RX_TDDRC_ALPHA_UP_4 +184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +190 0x7FFF //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +269 0x0000 //RX_TDDRC_THRD_0 +270 0x0000 //RX_TDDRC_THRD_1 +271 0x7FFF //RX_TDDRC_THRD_2 +272 0x7FFF //RX_TDDRC_THRD_3 +273 0x7E70 //RX_TDDRC_SLANT_0 +274 0x7FFF //RX_TDDRC_SLANT_1 +275 0x1000 //RX_TDDRC_ALPHA_UP_0 +276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x199A //RX_TDDRC_HMNC_GAIN +279 0x0001 //RX_TDDRC_SMT_FLAG +280 0x0CCD //RX_TDDRC_SMT_W +281 0x0155 //RX_TDDRC_DRC_GAIN +195 0x001C //RX_FDEQ_SUBNUM +196 0x4848 //RX_FDEQ_GAIN_0 +197 0x4848 //RX_FDEQ_GAIN_1 +198 0x4848 //RX_FDEQ_GAIN_2 +199 0x4848 //RX_FDEQ_GAIN_3 +200 0x4848 //RX_FDEQ_GAIN_4 +201 0x4848 //RX_FDEQ_GAIN_5 +202 0x4848 //RX_FDEQ_GAIN_6 +203 0x4848 //RX_FDEQ_GAIN_7 +204 0x4848 //RX_FDEQ_GAIN_8 +205 0x3C3C //RX_FDEQ_GAIN_9 +206 0x3C3C //RX_FDEQ_GAIN_10 +207 0x3838 //RX_FDEQ_GAIN_11 +208 0x3838 //RX_FDEQ_GAIN_12 +209 0x3030 //RX_FDEQ_GAIN_13 +210 0x4848 //RX_FDEQ_GAIN_14 +211 0x4848 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0202 //RX_FDEQ_BIN_0 +221 0x0203 //RX_FDEQ_BIN_1 +222 0x0303 //RX_FDEQ_BIN_2 +223 0x0304 //RX_FDEQ_BIN_3 +224 0x0405 //RX_FDEQ_BIN_4 +225 0x0506 //RX_FDEQ_BIN_5 +226 0x0708 //RX_FDEQ_BIN_6 +227 0x090A //RX_FDEQ_BIN_7 +228 0x0B0C //RX_FDEQ_BIN_8 +229 0x0D0E //RX_FDEQ_BIN_9 +230 0x0E0F //RX_FDEQ_BIN_10 +231 0x0F10 //RX_FDEQ_BIN_11 +232 0x1011 //RX_FDEQ_BIN_12 +233 0x1112 //RX_FDEQ_BIN_13 +234 0x0000 //RX_FDEQ_BIN_14 +235 0x0000 //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x4000 //RX_FDEQ_RESRV_0 +245 0x0320 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0030 //RX_FDDRC_BAND_MARGIN_1 +248 0x0050 //RX_FDDRC_BAND_MARGIN_2 +249 0x0080 //RX_FDDRC_BAND_MARGIN_3 +250 0x0007 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x5000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x6400 //RX_FDDRC_THRD_3_2 +258 0x6400 //RX_FDDRC_THRD_3_3 +259 0x2000 //RX_FDDRC_SLANT_0_0 +260 0x2000 //RX_FDDRC_SLANT_0_1 +261 0x2000 //RX_FDDRC_SLANT_0_2 +262 0x2000 //RX_FDDRC_SLANT_0_3 +263 0x5333 //RX_FDDRC_SLANT_1_0 +264 0x5333 //RX_FDDRC_SLANT_1_1 +265 0x5333 //RX_FDDRC_SLANT_1_2 +266 0x5333 //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +286 0x0100 //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 +#VOL 3 +163 0x1000 //RX_TDDRC_ALPHA_UP_1 +164 0x1000 //RX_TDDRC_ALPHA_UP_2 +165 0x1000 //RX_TDDRC_ALPHA_UP_3 +166 0x1000 //RX_TDDRC_ALPHA_UP_4 +184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +190 0x7FFF //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +269 0x0000 //RX_TDDRC_THRD_0 +270 0x0000 //RX_TDDRC_THRD_1 +271 0x7FFF //RX_TDDRC_THRD_2 +272 0x7FFF //RX_TDDRC_THRD_3 +273 0x7E70 //RX_TDDRC_SLANT_0 +274 0x7FFF //RX_TDDRC_SLANT_1 +275 0x1000 //RX_TDDRC_ALPHA_UP_0 +276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x199A //RX_TDDRC_HMNC_GAIN +279 0x0001 //RX_TDDRC_SMT_FLAG +280 0x0CCD //RX_TDDRC_SMT_W +281 0x0155 //RX_TDDRC_DRC_GAIN +195 0x001C //RX_FDEQ_SUBNUM +196 0x4848 //RX_FDEQ_GAIN_0 +197 0x4848 //RX_FDEQ_GAIN_1 +198 0x4848 //RX_FDEQ_GAIN_2 +199 0x4848 //RX_FDEQ_GAIN_3 +200 0x4848 //RX_FDEQ_GAIN_4 +201 0x4848 //RX_FDEQ_GAIN_5 +202 0x4848 //RX_FDEQ_GAIN_6 +203 0x4848 //RX_FDEQ_GAIN_7 +204 0x4848 //RX_FDEQ_GAIN_8 +205 0x3C3C //RX_FDEQ_GAIN_9 +206 0x3C3C //RX_FDEQ_GAIN_10 +207 0x3838 //RX_FDEQ_GAIN_11 +208 0x3838 //RX_FDEQ_GAIN_12 +209 0x3030 //RX_FDEQ_GAIN_13 +210 0x4848 //RX_FDEQ_GAIN_14 +211 0x4848 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0202 //RX_FDEQ_BIN_0 +221 0x0203 //RX_FDEQ_BIN_1 +222 0x0303 //RX_FDEQ_BIN_2 +223 0x0304 //RX_FDEQ_BIN_3 +224 0x0405 //RX_FDEQ_BIN_4 +225 0x0506 //RX_FDEQ_BIN_5 +226 0x0708 //RX_FDEQ_BIN_6 +227 0x090A //RX_FDEQ_BIN_7 +228 0x0B0C //RX_FDEQ_BIN_8 +229 0x0D0E //RX_FDEQ_BIN_9 +230 0x0E0F //RX_FDEQ_BIN_10 +231 0x0F10 //RX_FDEQ_BIN_11 +232 0x1011 //RX_FDEQ_BIN_12 +233 0x1112 //RX_FDEQ_BIN_13 +234 0x0000 //RX_FDEQ_BIN_14 +235 0x0000 //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x4000 //RX_FDEQ_RESRV_0 +245 0x0320 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0030 //RX_FDDRC_BAND_MARGIN_1 +248 0x0050 //RX_FDDRC_BAND_MARGIN_2 +249 0x0080 //RX_FDDRC_BAND_MARGIN_3 +250 0x0007 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x5000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x6400 //RX_FDDRC_THRD_3_2 +258 0x6400 //RX_FDDRC_THRD_3_3 +259 0x2000 //RX_FDDRC_SLANT_0_0 +260 0x2000 //RX_FDDRC_SLANT_0_1 +261 0x2000 //RX_FDDRC_SLANT_0_2 +262 0x2000 //RX_FDDRC_SLANT_0_3 +263 0x5333 //RX_FDDRC_SLANT_1_0 +264 0x5333 //RX_FDDRC_SLANT_1_1 +265 0x5333 //RX_FDDRC_SLANT_1_2 +266 0x5333 //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +286 0x0100 //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 +#VOL 4 +163 0x1000 //RX_TDDRC_ALPHA_UP_1 +164 0x1000 //RX_TDDRC_ALPHA_UP_2 +165 0x1000 //RX_TDDRC_ALPHA_UP_3 +166 0x1000 //RX_TDDRC_ALPHA_UP_4 +184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +190 0x7FFF //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +269 0x0000 //RX_TDDRC_THRD_0 +270 0x0000 //RX_TDDRC_THRD_1 +271 0x7FFF //RX_TDDRC_THRD_2 +272 0x7FFF //RX_TDDRC_THRD_3 +273 0x7E70 //RX_TDDRC_SLANT_0 +274 0x7FFF //RX_TDDRC_SLANT_1 +275 0x1000 //RX_TDDRC_ALPHA_UP_0 +276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x199A //RX_TDDRC_HMNC_GAIN +279 0x0001 //RX_TDDRC_SMT_FLAG +280 0x0CCD //RX_TDDRC_SMT_W +281 0x0155 //RX_TDDRC_DRC_GAIN +195 0x001C //RX_FDEQ_SUBNUM +196 0x4848 //RX_FDEQ_GAIN_0 +197 0x4848 //RX_FDEQ_GAIN_1 +198 0x4848 //RX_FDEQ_GAIN_2 +199 0x4848 //RX_FDEQ_GAIN_3 +200 0x4848 //RX_FDEQ_GAIN_4 +201 0x4848 //RX_FDEQ_GAIN_5 +202 0x4848 //RX_FDEQ_GAIN_6 +203 0x4848 //RX_FDEQ_GAIN_7 +204 0x4848 //RX_FDEQ_GAIN_8 +205 0x3C3C //RX_FDEQ_GAIN_9 +206 0x3C3C //RX_FDEQ_GAIN_10 +207 0x3838 //RX_FDEQ_GAIN_11 +208 0x3838 //RX_FDEQ_GAIN_12 +209 0x3030 //RX_FDEQ_GAIN_13 +210 0x4848 //RX_FDEQ_GAIN_14 +211 0x4848 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0202 //RX_FDEQ_BIN_0 +221 0x0203 //RX_FDEQ_BIN_1 +222 0x0303 //RX_FDEQ_BIN_2 +223 0x0304 //RX_FDEQ_BIN_3 +224 0x0405 //RX_FDEQ_BIN_4 +225 0x0506 //RX_FDEQ_BIN_5 +226 0x0708 //RX_FDEQ_BIN_6 +227 0x090A //RX_FDEQ_BIN_7 +228 0x0B0C //RX_FDEQ_BIN_8 +229 0x0D0E //RX_FDEQ_BIN_9 +230 0x0E0F //RX_FDEQ_BIN_10 +231 0x0F10 //RX_FDEQ_BIN_11 +232 0x1011 //RX_FDEQ_BIN_12 +233 0x1112 //RX_FDEQ_BIN_13 +234 0x0000 //RX_FDEQ_BIN_14 +235 0x0000 //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x4000 //RX_FDEQ_RESRV_0 +245 0x0320 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0030 //RX_FDDRC_BAND_MARGIN_1 +248 0x0050 //RX_FDDRC_BAND_MARGIN_2 +249 0x0080 //RX_FDDRC_BAND_MARGIN_3 +250 0x0007 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x5000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x6400 //RX_FDDRC_THRD_3_2 +258 0x6400 //RX_FDDRC_THRD_3_3 +259 0x2000 //RX_FDDRC_SLANT_0_0 +260 0x2000 //RX_FDDRC_SLANT_0_1 +261 0x2000 //RX_FDDRC_SLANT_0_2 +262 0x2000 //RX_FDDRC_SLANT_0_3 +263 0x5333 //RX_FDDRC_SLANT_1_0 +264 0x5333 //RX_FDDRC_SLANT_1_1 +265 0x5333 //RX_FDDRC_SLANT_1_2 +266 0x5333 //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +286 0x0100 //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 +#VOL 5 +163 0x1000 //RX_TDDRC_ALPHA_UP_1 +164 0x1000 //RX_TDDRC_ALPHA_UP_2 +165 0x1000 //RX_TDDRC_ALPHA_UP_3 +166 0x1000 //RX_TDDRC_ALPHA_UP_4 +184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +190 0x7FFF //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +269 0x0000 //RX_TDDRC_THRD_0 +270 0x0000 //RX_TDDRC_THRD_1 +271 0x7FFF //RX_TDDRC_THRD_2 +272 0x7FFF //RX_TDDRC_THRD_3 +273 0x7E70 //RX_TDDRC_SLANT_0 +274 0x7FFF //RX_TDDRC_SLANT_1 +275 0x1000 //RX_TDDRC_ALPHA_UP_0 +276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x199A //RX_TDDRC_HMNC_GAIN +279 0x0001 //RX_TDDRC_SMT_FLAG +280 0x0CCD //RX_TDDRC_SMT_W +281 0x0155 //RX_TDDRC_DRC_GAIN +195 0x001C //RX_FDEQ_SUBNUM +196 0x4848 //RX_FDEQ_GAIN_0 +197 0x4848 //RX_FDEQ_GAIN_1 +198 0x4848 //RX_FDEQ_GAIN_2 +199 0x4848 //RX_FDEQ_GAIN_3 +200 0x4848 //RX_FDEQ_GAIN_4 +201 0x4848 //RX_FDEQ_GAIN_5 +202 0x4848 //RX_FDEQ_GAIN_6 +203 0x4848 //RX_FDEQ_GAIN_7 +204 0x4848 //RX_FDEQ_GAIN_8 +205 0x3C3C //RX_FDEQ_GAIN_9 +206 0x3C3C //RX_FDEQ_GAIN_10 +207 0x3838 //RX_FDEQ_GAIN_11 +208 0x3838 //RX_FDEQ_GAIN_12 +209 0x3030 //RX_FDEQ_GAIN_13 +210 0x4848 //RX_FDEQ_GAIN_14 +211 0x4848 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0202 //RX_FDEQ_BIN_0 +221 0x0203 //RX_FDEQ_BIN_1 +222 0x0303 //RX_FDEQ_BIN_2 +223 0x0304 //RX_FDEQ_BIN_3 +224 0x0405 //RX_FDEQ_BIN_4 +225 0x0506 //RX_FDEQ_BIN_5 +226 0x0708 //RX_FDEQ_BIN_6 +227 0x090A //RX_FDEQ_BIN_7 +228 0x0B0C //RX_FDEQ_BIN_8 +229 0x0D0E //RX_FDEQ_BIN_9 +230 0x0E0F //RX_FDEQ_BIN_10 +231 0x0F10 //RX_FDEQ_BIN_11 +232 0x1011 //RX_FDEQ_BIN_12 +233 0x1112 //RX_FDEQ_BIN_13 +234 0x0000 //RX_FDEQ_BIN_14 +235 0x0000 //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x4000 //RX_FDEQ_RESRV_0 +245 0x0320 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0030 //RX_FDDRC_BAND_MARGIN_1 +248 0x0050 //RX_FDDRC_BAND_MARGIN_2 +249 0x0080 //RX_FDDRC_BAND_MARGIN_3 +250 0x0007 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x5000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x6400 //RX_FDDRC_THRD_3_2 +258 0x6400 //RX_FDDRC_THRD_3_3 +259 0x2000 //RX_FDDRC_SLANT_0_0 +260 0x2000 //RX_FDDRC_SLANT_0_1 +261 0x2000 //RX_FDDRC_SLANT_0_2 +262 0x2000 //RX_FDDRC_SLANT_0_3 +263 0x5333 //RX_FDDRC_SLANT_1_0 +264 0x5333 //RX_FDDRC_SLANT_1_1 +265 0x5333 //RX_FDDRC_SLANT_1_2 +266 0x5333 //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +286 0x0100 //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 +#VOL 6 +163 0x1000 //RX_TDDRC_ALPHA_UP_1 +164 0x1000 //RX_TDDRC_ALPHA_UP_2 +165 0x1000 //RX_TDDRC_ALPHA_UP_3 +166 0x1000 //RX_TDDRC_ALPHA_UP_4 +184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +190 0x7FFF //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +269 0x0000 //RX_TDDRC_THRD_0 +270 0x0000 //RX_TDDRC_THRD_1 +271 0x7FFF //RX_TDDRC_THRD_2 +272 0x7FFF //RX_TDDRC_THRD_3 +273 0x7E70 //RX_TDDRC_SLANT_0 +274 0x7FFF //RX_TDDRC_SLANT_1 +275 0x1000 //RX_TDDRC_ALPHA_UP_0 +276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x199A //RX_TDDRC_HMNC_GAIN +279 0x0001 //RX_TDDRC_SMT_FLAG +280 0x0CCD //RX_TDDRC_SMT_W +281 0x0155 //RX_TDDRC_DRC_GAIN +195 0x001C //RX_FDEQ_SUBNUM +196 0x4848 //RX_FDEQ_GAIN_0 +197 0x4848 //RX_FDEQ_GAIN_1 +198 0x4848 //RX_FDEQ_GAIN_2 +199 0x4848 //RX_FDEQ_GAIN_3 +200 0x4848 //RX_FDEQ_GAIN_4 +201 0x4848 //RX_FDEQ_GAIN_5 +202 0x4848 //RX_FDEQ_GAIN_6 +203 0x4848 //RX_FDEQ_GAIN_7 +204 0x4848 //RX_FDEQ_GAIN_8 +205 0x3C3C //RX_FDEQ_GAIN_9 +206 0x3C3C //RX_FDEQ_GAIN_10 +207 0x3838 //RX_FDEQ_GAIN_11 +208 0x3838 //RX_FDEQ_GAIN_12 +209 0x3030 //RX_FDEQ_GAIN_13 +210 0x4848 //RX_FDEQ_GAIN_14 +211 0x4848 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0202 //RX_FDEQ_BIN_0 +221 0x0203 //RX_FDEQ_BIN_1 +222 0x0303 //RX_FDEQ_BIN_2 +223 0x0304 //RX_FDEQ_BIN_3 +224 0x0405 //RX_FDEQ_BIN_4 +225 0x0506 //RX_FDEQ_BIN_5 +226 0x0708 //RX_FDEQ_BIN_6 +227 0x090A //RX_FDEQ_BIN_7 +228 0x0B0C //RX_FDEQ_BIN_8 +229 0x0D0E //RX_FDEQ_BIN_9 +230 0x0E0F //RX_FDEQ_BIN_10 +231 0x0F10 //RX_FDEQ_BIN_11 +232 0x1011 //RX_FDEQ_BIN_12 +233 0x1112 //RX_FDEQ_BIN_13 +234 0x0000 //RX_FDEQ_BIN_14 +235 0x0000 //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x4000 //RX_FDEQ_RESRV_0 +245 0x0320 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0030 //RX_FDDRC_BAND_MARGIN_1 +248 0x0050 //RX_FDDRC_BAND_MARGIN_2 +249 0x0080 //RX_FDDRC_BAND_MARGIN_3 +250 0x0007 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x5000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x6400 //RX_FDDRC_THRD_3_2 +258 0x6400 //RX_FDDRC_THRD_3_3 +259 0x2000 //RX_FDDRC_SLANT_0_0 +260 0x2000 //RX_FDDRC_SLANT_0_1 +261 0x2000 //RX_FDDRC_SLANT_0_2 +262 0x2000 //RX_FDDRC_SLANT_0_3 +263 0x5333 //RX_FDDRC_SLANT_1_0 +264 0x5333 //RX_FDDRC_SLANT_1_1 +265 0x5333 //RX_FDDRC_SLANT_1_2 +266 0x5333 //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +286 0x0100 //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 #CASE_NAME BLUETOOTH-BTWB-VOICE_GENERIC-SWB -#PARAM_TYPE TX+RX -#TOTAL_CUSTOM_STEP 7 +#PARAM_MODE Full +#PARAM_TYPE TX+2RX +#TOTAL_CUSTOM_STEP 7+7 #TX 0 0x0001 //TX_OPERATION_MODE_0 1 0x0001 //TX_OPERATION_MODE_1 @@ -26553,20 +40309,20 @@ 248 0xF400 //TX_THR_SN_EST_6 249 0xF600 //TX_THR_SN_EST_7 250 0x0000 //TX_DELTA_THR_SN_EST_0 -251 0x0000 //TX_DELTA_THR_SN_EST_1 +251 0x0200 //TX_DELTA_THR_SN_EST_1 252 0x0200 //TX_DELTA_THR_SN_EST_2 253 0x0200 //TX_DELTA_THR_SN_EST_3 254 0x0200 //TX_DELTA_THR_SN_EST_4 255 0x0200 //TX_DELTA_THR_SN_EST_5 -256 0x0200 //TX_DELTA_THR_SN_EST_6 +256 0x0000 //TX_DELTA_THR_SN_EST_6 257 0x0200 //TX_DELTA_THR_SN_EST_7 258 0x6000 //TX_LAMBDA_NN_EST_0 -259 0x6000 //TX_LAMBDA_NN_EST_1 +259 0x4000 //TX_LAMBDA_NN_EST_1 260 0x4000 //TX_LAMBDA_NN_EST_2 261 0x4000 //TX_LAMBDA_NN_EST_3 262 0x4000 //TX_LAMBDA_NN_EST_4 263 0x4000 //TX_LAMBDA_NN_EST_5 -264 0x4000 //TX_LAMBDA_NN_EST_6 +264 0x6000 //TX_LAMBDA_NN_EST_6 265 0x4000 //TX_LAMBDA_NN_EST_7 266 0x0400 //TX_N_SN_EST 267 0x001E //TX_INBEAM_T @@ -26584,16 +40340,16 @@ 279 0x1000 //TX_B_POST_FLT_0 280 0x1000 //TX_B_POST_FLT_1 281 0x000B //TX_NS_LVL_CTRL_0 -282 0x000F //TX_NS_LVL_CTRL_1 -283 0x0011 //TX_NS_LVL_CTRL_2 +282 0x0011 //TX_NS_LVL_CTRL_1 +283 0x000F //TX_NS_LVL_CTRL_2 284 0x000F //TX_NS_LVL_CTRL_3 285 0x000F //TX_NS_LVL_CTRL_4 286 0x000F //TX_NS_LVL_CTRL_5 287 0x000F //TX_NS_LVL_CTRL_6 288 0x0011 //TX_NS_LVL_CTRL_7 289 0x000C //TX_MIN_GAIN_S_0 -290 0x000C //TX_MIN_GAIN_S_1 -291 0x000F //TX_MIN_GAIN_S_2 +290 0x000F //TX_MIN_GAIN_S_1 +291 0x000C //TX_MIN_GAIN_S_2 292 0x000C //TX_MIN_GAIN_S_3 293 0x000C //TX_MIN_GAIN_S_4 294 0x000C //TX_MIN_GAIN_S_5 @@ -26617,12 +40373,12 @@ 312 0x7FFF //TX_A_POST_FILT_0 313 0x2000 //TX_A_POST_FILT_1 314 0x2000 //TX_A_POST_FILT_S_0 -315 0x4000 //TX_A_POST_FILT_S_1 +315 0x5000 //TX_A_POST_FILT_S_1 316 0x5000 //TX_A_POST_FILT_S_2 317 0x5000 //TX_A_POST_FILT_S_3 318 0x5000 //TX_A_POST_FILT_S_4 319 0x5000 //TX_A_POST_FILT_S_5 -320 0x5000 //TX_A_POST_FILT_S_6 +320 0x4000 //TX_A_POST_FILT_S_6 321 0x5000 //TX_A_POST_FILT_S_7 322 0x1000 //TX_B_POST_FILT_0 323 0x1000 //TX_B_POST_FILT_1 @@ -26682,10 +40438,10 @@ 377 0x7FFF //TX_NOISE_TH_5_4 378 0x044C //TX_NOISE_TH_6 379 0x0014 //TX_MINENOISE_TH -380 0x4000 //TX_MINENOISE_MIC0_TH_MTS -381 0xFFEE //TX_MINENOISE_MIC0_TH_EXP -382 0x6000 //TX_MINENOISE_MIC0_S_TH_MTS -383 0xFFF3 //TX_MINENOISE_MIC0_S_TH_EXP +380 0x4000 //TX_MORENS_TFMASK_TH +381 0xFFEE //TX_DRC_QUIET_FLOOR +382 0x6000 //TX_RATIODTL_CUT_TH +383 0xFFF3 //TX_DT_CUT_K1 384 0x0666 //TX_OUT_ENER_S_TH_CLEAN 385 0x0666 //TX_OUT_ENER_S_TH_LESSCLEAN 386 0x0333 //TX_OUT_ENER_S_TH_NOISY @@ -26693,15 +40449,15 @@ 388 0x0333 //TX_OUT_ENER_TH_SPEECH 389 0x2000 //TX_SN_NPB_GAIN 390 0x0000 //TX_NN_NPB_GAIN -391 0x0000 //TX_CSX_ALPHA_0 -392 0x0000 //TX_CSX_ALPHA_1 -393 0x0000 //TX_CSX_ALPHA_2 -394 0x0000 //TX_CSX_ALPHA_3 -395 0x0800 //TX_MU_ARSP_EST -396 0x00C8 //TX_P_OUTBEAM_MIN_TH +391 0x0000 //TX_POST_MASK_SUP_HSNE +392 0x0000 //TX_TAIL_DET_TH +393 0x0000 //TX_B_LESSCUT_RTO_WTA +394 0x0000 //TX_MEL_G_R +395 0x0800 //TX_SUPHIGH_TH +396 0x00C8 //TX_MASK_G_R 397 0x0002 //TX_EXTRA_NS_L -398 0x0800 //TX_EXTRA_NS_A -399 0x0005 //TX_VR_NOISE_FLOOR_TH +398 0x0800 //TX_C_POST_FLT_MASK +399 0x0005 //TX_A_POST_FLT_WNS 400 0x0148 //TX_MIN_G_LOW300HZ 401 0x0002 //TX_MAXLEVEL_CNG 402 0x00B4 //TX_STN_NOISE_TH @@ -26816,16 +40572,16 @@ 511 0x6666 //TX_MIC_TO_BFGAIN 512 0x0000 //TX_MICTOBFGAIN0 513 0x0000 //TX_FASTMUE_TH -514 0x0000 //TX_DERVB_LEN_0 -515 0x0000 //TX_DERVB_LEN_1 -516 0x0000 //TX_RHO_DERVB -517 0x0000 //TX_MIC_INDX_DERVB -518 0x0000 //TX_MU_DERVB -519 0x0000 //TX_DR_RESRV_0 -520 0x0000 //TX_DR_RESRV_1 -521 0x0000 //TX_DR_RESRV_2 -522 0x0000 //TX_DR_RESRV_3 -523 0x0000 //TX_DR_RESRV_4 +514 0x0000 //TX_DEREVERB_LF_MU +515 0x0000 //TX_DEREVERB_HF_MU +516 0x0000 //TX_DEREVERB_DELAY +517 0x0000 //TX_DEREVERB_COEF_LEN +518 0x0000 //TX_DEREVERB_DNR +519 0x0000 //TX_DEREVERB_ALPHA +520 0x0000 //TX_DEREVERB_BETA +521 0x0000 //TX_GSC_RTOL_TH +522 0x0000 //TX_GSC_RTOH_TH +523 0x0000 //TX_WIDE2_MEANHTH 524 0x0000 //TX_DR_RESRV_5 525 0x0000 //TX_DR_RESRV_6 526 0x0000 //TX_DR_RESRV_7 @@ -27199,8 +40955,73 @@ 894 0xC000 //TX_FASTNS_SSA_THHFL 895 0xCCCC //TX_FASTNS_SSA_THLFH 896 0xD999 //TX_FASTNS_SSA_THHFH +897 0x0000 //TX_SENDFUNC_REG_MICMUTE +898 0x0000 //TX_SENDFUNC_REG_MICMUTE1 +899 0x0000 //TX_MICMUTE_RATIO_THR +900 0x0000 //TX_MICMUTE_AMP_THR +901 0x0000 //TX_MICMUTE_HPF_IND +902 0x0000 //TX_MICMUTE_LOG_EYR_TH +903 0x0000 //TX_MICMUTE_CVG_TIME +904 0x0000 //TX_MICMUTE_RELEASE_TIME +905 0x0000 //TX_MIC_VOLUME_MIC0MUTE +906 0x0000 //TX_MICMUTE_EPD_OFFSET_0 +907 0x0000 //TX_MICMUTE_FRQ_AEC_L +908 0x0000 //TX_MICMUTE_EAD_THR +909 0x0000 //TX_MICMUTE_LAMBDA_CB_NLE +910 0x0000 //TX_MICMUTE_LAMBDA_RE_EST +911 0x0000 //TX_DTD_THR1_MICMUTE_0 +912 0x0000 //TX_DTD_THR1_MICMUTE_1 +913 0x0000 //TX_DTD_THR1_MICMUTE_2 +914 0x0000 //TX_DTD_THR1_MICMUTE_3 +915 0x0000 //TX_DTD_THR2_MICMUTE_0 +916 0x0000 //TX_MICMUTE_MIN_EQ_RE_EST_0 +917 0x0000 //TX_MICMUTE_MIN_EQ_RE_EST_1 +918 0x0000 //TX_MICMUTE_MIN_EQ_RE_EST_2 +919 0x0000 //TX_MICMUTE_MIN_EQ_RE_EST_3 +920 0x0000 //TX_MICMUTE_MIN_EQ_RE_EST_4 +921 0x0000 //TX_MICMUTE_C_POST_FLT +922 0x0000 //TX_MICMUTE_DT_CUT_K +923 0x0000 //TX_MICMUTE_DT_CUT_THR +924 0x0000 //TX_MICMUTE_DT_CUT_K2 +925 0x0000 //TX_MICMUTE_DT_CUT_THR2 +926 0x0000 //TX_MICMUTE_DT2_HOLD_N +927 0x0000 //TX_MICMUTE_RATIODTH_THCUT +928 0x0000 //TX_MICMUTE_B_POST_FLT_ECHOL +929 0x0000 //TX_MICMUTE_B_POST_FLT_ECHOH +930 0x0000 //TX_MICMUTE_C_POST_FLT_MASK +931 0x0000 //TX_MICMUTE_RATIODTL_CUT_TH +932 0x0000 //TX_MICMUTE_DT_CUT_K1 +933 0x0000 //TX_MICMUTE_N2_SN_EST +934 0x0000 //TX_MICMUTE_THR_SN_EST_0 +935 0x0000 //TX_MICMUTE_MIN_G_CTRL_0 +936 0x0000 //TX_MICMUTE_A_POST_FILT_S_0 +937 0x0000 //TX_MICMUTE_B_POST_FILT_0 +938 0x0000 //TX_MIC1RUB_AMP_THR +939 0x0000 //TX_MIC1MUTE_RATIO_THR +940 0x0000 //TX_MIC1MUTE_AMP_THR +941 0x0000 //TX_MIC1MUTE_CVG_TIME +942 0x0000 //TX_MIC1MUTE_RELEASE_TIME +943 0x0000 //TX_AMS_RESRV_01 +944 0x0000 //TX_AMS_RESRV_02 +945 0x0000 //TX_AMS_RESRV_03 +946 0x0000 //TX_AMS_RESRV_04 +947 0x0000 //TX_AMS_RESRV_05 +948 0x0000 //TX_AMS_RESRV_06 +949 0x0000 //TX_AMS_RESRV_07 +950 0x0000 //TX_AMS_RESRV_08 +951 0x0000 //TX_AMS_RESRV_09 +952 0x0000 //TX_AMS_RESRV_10 +953 0x0000 //TX_AMS_RESRV_11 +954 0x0000 //TX_AMS_RESRV_12 +955 0x0000 //TX_AMS_RESRV_13 +956 0x0000 //TX_AMS_RESRV_14 +957 0x0000 //TX_AMS_RESRV_15 +958 0x0000 //TX_AMS_RESRV_16 +959 0x0000 //TX_AMS_RESRV_17 +960 0x0000 //TX_AMS_RESRV_18 +961 0x0000 //TX_AMS_RESRV_19 #RX -0 0x0064 //RX_RECVFUNC_MODE_0 +0 0x2064 //RX_RECVFUNC_MODE_0 1 0x0000 //RX_RECVFUNC_MODE_1 2 0x0003 //RX_SAMPLINGFREQ_SIG 3 0x0003 //RX_SAMPLINGFREQ_PROC @@ -28050,10 +41871,862 @@ 110 0x0000 //RX_FDDRC_RESRV_0 129 0x0100 //RX_SPK_VOL 130 0x0000 //RX_VOL_RESRV_0 +#RX 2 +157 0x2064 //RX_RECVFUNC_MODE_0 +158 0x0000 //RX_RECVFUNC_MODE_1 +159 0x0003 //RX_SAMPLINGFREQ_SIG +160 0x0003 //RX_SAMPLINGFREQ_PROC +161 0x000A //RX_FRAME_SZ +162 0x0000 //RX_DELAY_OPT +163 0x3000 //RX_TDDRC_ALPHA_UP_1 +164 0x3000 //RX_TDDRC_ALPHA_UP_2 +165 0x3000 //RX_TDDRC_ALPHA_UP_3 +166 0x3000 //RX_TDDRC_ALPHA_UP_4 +167 0x0800 //RX_PGA +168 0x7FFF //RX_A_HP +169 0x0000 //RX_B_PE +170 0x1800 //RX_THR_PITCH_DET_0 +171 0x1000 //RX_THR_PITCH_DET_1 +172 0x0800 //RX_THR_PITCH_DET_2 +173 0x0008 //RX_PITCH_BFR_LEN +174 0x0003 //RX_SBD_PITCH_DET +175 0x0100 //RX_PP_RESRV_0 +176 0x0020 //RX_PP_RESRV_1 +177 0x0400 //RX_N_SN_EST +178 0x000C //RX_N2_SN_EST +179 0x0003 //RX_NS_LVL_CTRL +180 0x9000 //RX_THR_SN_EST +181 0x7CCD //RX_LAMBDA_PFILT +182 0x000A //RX_FENS_RESRV_0 +183 0x0190 //RX_FENS_RESRV_1 +184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +187 0x0002 //RX_EXTRA_NS_L +188 0x0800 //RX_EXTRA_NS_A +189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +190 0x7FFF //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +192 0x199A //RX_A_POST_FLT +193 0x0000 //RX_LMT_THRD +194 0x4000 //RX_LMT_ALPHA +195 0x0020 //RX_FDEQ_SUBNUM +196 0x4848 //RX_FDEQ_GAIN_0 +197 0x4848 //RX_FDEQ_GAIN_1 +198 0x4848 //RX_FDEQ_GAIN_2 +199 0x4848 //RX_FDEQ_GAIN_3 +200 0x4848 //RX_FDEQ_GAIN_4 +201 0x4848 //RX_FDEQ_GAIN_5 +202 0x4848 //RX_FDEQ_GAIN_6 +203 0x4848 //RX_FDEQ_GAIN_7 +204 0x4848 //RX_FDEQ_GAIN_8 +205 0x4848 //RX_FDEQ_GAIN_9 +206 0x4848 //RX_FDEQ_GAIN_10 +207 0x4848 //RX_FDEQ_GAIN_11 +208 0x4848 //RX_FDEQ_GAIN_12 +209 0x4848 //RX_FDEQ_GAIN_13 +210 0x4848 //RX_FDEQ_GAIN_14 +211 0x4848 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0202 //RX_FDEQ_BIN_0 +221 0x0203 //RX_FDEQ_BIN_1 +222 0x0303 //RX_FDEQ_BIN_2 +223 0x0304 //RX_FDEQ_BIN_3 +224 0x0405 //RX_FDEQ_BIN_4 +225 0x0506 //RX_FDEQ_BIN_5 +226 0x0708 //RX_FDEQ_BIN_6 +227 0x090A //RX_FDEQ_BIN_7 +228 0x0B0C //RX_FDEQ_BIN_8 +229 0x0D0E //RX_FDEQ_BIN_9 +230 0x1013 //RX_FDEQ_BIN_10 +231 0x1719 //RX_FDEQ_BIN_11 +232 0x1B1E //RX_FDEQ_BIN_12 +233 0x1E1E //RX_FDEQ_BIN_13 +234 0x1E28 //RX_FDEQ_BIN_14 +235 0x282C //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x4000 //RX_FDEQ_RESRV_0 +245 0x0320 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0030 //RX_FDDRC_BAND_MARGIN_1 +248 0x0050 //RX_FDDRC_BAND_MARGIN_2 +249 0x0080 //RX_FDDRC_BAND_MARGIN_3 +250 0x0007 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x5000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x6400 //RX_FDDRC_THRD_3_2 +258 0x6400 //RX_FDDRC_THRD_3_3 +259 0x2000 //RX_FDDRC_SLANT_0_0 +260 0x2000 //RX_FDDRC_SLANT_0_1 +261 0x2000 //RX_FDDRC_SLANT_0_2 +262 0x2000 //RX_FDDRC_SLANT_0_3 +263 0x5333 //RX_FDDRC_SLANT_1_0 +264 0x5333 //RX_FDDRC_SLANT_1_1 +265 0x5333 //RX_FDDRC_SLANT_1_2 +266 0x5333 //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +268 0x0000 //RX_FILTINDX +269 0x0000 //RX_TDDRC_THRD_0 +270 0x0000 //RX_TDDRC_THRD_1 +271 0x7FFF //RX_TDDRC_THRD_2 +272 0x7FFF //RX_TDDRC_THRD_3 +273 0x7FFF //RX_TDDRC_SLANT_0 +274 0x7FFF //RX_TDDRC_SLANT_1 +275 0x3000 //RX_TDDRC_ALPHA_UP_0 +276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x199A //RX_TDDRC_HMNC_GAIN +279 0x0001 //RX_TDDRC_SMT_FLAG +280 0x0CCD //RX_TDDRC_SMT_W +281 0x0155 //RX_TDDRC_DRC_GAIN +282 0x7C00 //RX_LAMBDA_PKA_FP +283 0x2000 //RX_TPKA_FP +284 0x2000 //RX_MIN_G_FP +285 0x0080 //RX_MAX_G_FP +286 0x0100 //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 +288 0x0000 //RX_MAXLEVEL_CNG +289 0x3000 //RX_BWE_UV_TH +290 0x3000 //RX_BWE_UV_TH2 +291 0x1800 //RX_BWE_UV_TH3 +292 0x1000 //RX_BWE_V_TH +293 0x04CD //RX_BWE_GAIN1_V_TH1 +294 0x0F33 //RX_BWE_GAIN1_V_TH2 +295 0x7333 //RX_BWE_UV_EQ +296 0x199A //RX_BWE_V_EQ +297 0x7333 //RX_BWE_TONE_TH +298 0x0004 //RX_BWE_UV_HOLD_T +299 0x6CCD //RX_BWE_GAIN2_ALPHA +300 0x799A //RX_BWE_GAIN3_ALPHA +301 0x001E //RX_BWE_CUTOFF +302 0x3000 //RX_BWE_GAINFILL +303 0x3200 //RX_BWE_MAXTH_TONE +304 0x2000 //RX_BWE_EQ_0 +305 0x2000 //RX_BWE_EQ_1 +306 0x2000 //RX_BWE_EQ_2 +307 0x2000 //RX_BWE_EQ_3 +308 0x2000 //RX_BWE_EQ_4 +309 0x2000 //RX_BWE_EQ_5 +310 0x2000 //RX_BWE_EQ_6 +311 0x0000 //RX_BWE_RESRV_0 +312 0x0000 //RX_BWE_RESRV_1 +313 0x0000 //RX_BWE_RESRV_2 +#VOL 0 +163 0x3000 //RX_TDDRC_ALPHA_UP_1 +164 0x3000 //RX_TDDRC_ALPHA_UP_2 +165 0x3000 //RX_TDDRC_ALPHA_UP_3 +166 0x3000 //RX_TDDRC_ALPHA_UP_4 +184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +190 0x7FFF //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +269 0x0000 //RX_TDDRC_THRD_0 +270 0x0000 //RX_TDDRC_THRD_1 +271 0x7FFF //RX_TDDRC_THRD_2 +272 0x7FFF //RX_TDDRC_THRD_3 +273 0x7FFF //RX_TDDRC_SLANT_0 +274 0x7FFF //RX_TDDRC_SLANT_1 +275 0x3000 //RX_TDDRC_ALPHA_UP_0 +276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x199A //RX_TDDRC_HMNC_GAIN +279 0x0001 //RX_TDDRC_SMT_FLAG +280 0x0CCD //RX_TDDRC_SMT_W +281 0x0155 //RX_TDDRC_DRC_GAIN +195 0x0020 //RX_FDEQ_SUBNUM +196 0x4848 //RX_FDEQ_GAIN_0 +197 0x4848 //RX_FDEQ_GAIN_1 +198 0x4848 //RX_FDEQ_GAIN_2 +199 0x4848 //RX_FDEQ_GAIN_3 +200 0x4848 //RX_FDEQ_GAIN_4 +201 0x4848 //RX_FDEQ_GAIN_5 +202 0x4848 //RX_FDEQ_GAIN_6 +203 0x4848 //RX_FDEQ_GAIN_7 +204 0x4848 //RX_FDEQ_GAIN_8 +205 0x4848 //RX_FDEQ_GAIN_9 +206 0x4848 //RX_FDEQ_GAIN_10 +207 0x4848 //RX_FDEQ_GAIN_11 +208 0x4848 //RX_FDEQ_GAIN_12 +209 0x4848 //RX_FDEQ_GAIN_13 +210 0x4848 //RX_FDEQ_GAIN_14 +211 0x4848 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0202 //RX_FDEQ_BIN_0 +221 0x0203 //RX_FDEQ_BIN_1 +222 0x0303 //RX_FDEQ_BIN_2 +223 0x0304 //RX_FDEQ_BIN_3 +224 0x0405 //RX_FDEQ_BIN_4 +225 0x0506 //RX_FDEQ_BIN_5 +226 0x0708 //RX_FDEQ_BIN_6 +227 0x090A //RX_FDEQ_BIN_7 +228 0x0B0C //RX_FDEQ_BIN_8 +229 0x0D0E //RX_FDEQ_BIN_9 +230 0x1013 //RX_FDEQ_BIN_10 +231 0x1719 //RX_FDEQ_BIN_11 +232 0x1B1E //RX_FDEQ_BIN_12 +233 0x1E1E //RX_FDEQ_BIN_13 +234 0x1E28 //RX_FDEQ_BIN_14 +235 0x282C //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x4000 //RX_FDEQ_RESRV_0 +245 0x0320 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0030 //RX_FDDRC_BAND_MARGIN_1 +248 0x0050 //RX_FDDRC_BAND_MARGIN_2 +249 0x0080 //RX_FDDRC_BAND_MARGIN_3 +250 0x0007 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x5000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x6400 //RX_FDDRC_THRD_3_2 +258 0x6400 //RX_FDDRC_THRD_3_3 +259 0x2000 //RX_FDDRC_SLANT_0_0 +260 0x2000 //RX_FDDRC_SLANT_0_1 +261 0x2000 //RX_FDDRC_SLANT_0_2 +262 0x2000 //RX_FDDRC_SLANT_0_3 +263 0x5333 //RX_FDDRC_SLANT_1_0 +264 0x5333 //RX_FDDRC_SLANT_1_1 +265 0x5333 //RX_FDDRC_SLANT_1_2 +266 0x5333 //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +286 0x0100 //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 +#VOL 1 +163 0x3000 //RX_TDDRC_ALPHA_UP_1 +164 0x3000 //RX_TDDRC_ALPHA_UP_2 +165 0x3000 //RX_TDDRC_ALPHA_UP_3 +166 0x3000 //RX_TDDRC_ALPHA_UP_4 +184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +190 0x7FFF //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +269 0x0000 //RX_TDDRC_THRD_0 +270 0x0000 //RX_TDDRC_THRD_1 +271 0x7FFF //RX_TDDRC_THRD_2 +272 0x7FFF //RX_TDDRC_THRD_3 +273 0x7FFF //RX_TDDRC_SLANT_0 +274 0x7FFF //RX_TDDRC_SLANT_1 +275 0x3000 //RX_TDDRC_ALPHA_UP_0 +276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x199A //RX_TDDRC_HMNC_GAIN +279 0x0001 //RX_TDDRC_SMT_FLAG +280 0x0CCD //RX_TDDRC_SMT_W +281 0x0155 //RX_TDDRC_DRC_GAIN +195 0x0020 //RX_FDEQ_SUBNUM +196 0x4848 //RX_FDEQ_GAIN_0 +197 0x4848 //RX_FDEQ_GAIN_1 +198 0x4848 //RX_FDEQ_GAIN_2 +199 0x4848 //RX_FDEQ_GAIN_3 +200 0x4848 //RX_FDEQ_GAIN_4 +201 0x4848 //RX_FDEQ_GAIN_5 +202 0x4848 //RX_FDEQ_GAIN_6 +203 0x4848 //RX_FDEQ_GAIN_7 +204 0x4848 //RX_FDEQ_GAIN_8 +205 0x4848 //RX_FDEQ_GAIN_9 +206 0x4848 //RX_FDEQ_GAIN_10 +207 0x4848 //RX_FDEQ_GAIN_11 +208 0x4848 //RX_FDEQ_GAIN_12 +209 0x4848 //RX_FDEQ_GAIN_13 +210 0x4848 //RX_FDEQ_GAIN_14 +211 0x4848 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0202 //RX_FDEQ_BIN_0 +221 0x0203 //RX_FDEQ_BIN_1 +222 0x0303 //RX_FDEQ_BIN_2 +223 0x0304 //RX_FDEQ_BIN_3 +224 0x0405 //RX_FDEQ_BIN_4 +225 0x0506 //RX_FDEQ_BIN_5 +226 0x0708 //RX_FDEQ_BIN_6 +227 0x090A //RX_FDEQ_BIN_7 +228 0x0B0C //RX_FDEQ_BIN_8 +229 0x0D0E //RX_FDEQ_BIN_9 +230 0x1013 //RX_FDEQ_BIN_10 +231 0x1719 //RX_FDEQ_BIN_11 +232 0x1B1E //RX_FDEQ_BIN_12 +233 0x1E1E //RX_FDEQ_BIN_13 +234 0x1E28 //RX_FDEQ_BIN_14 +235 0x282C //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x4000 //RX_FDEQ_RESRV_0 +245 0x0320 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0030 //RX_FDDRC_BAND_MARGIN_1 +248 0x0050 //RX_FDDRC_BAND_MARGIN_2 +249 0x0080 //RX_FDDRC_BAND_MARGIN_3 +250 0x0007 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x5000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x6400 //RX_FDDRC_THRD_3_2 +258 0x6400 //RX_FDDRC_THRD_3_3 +259 0x2000 //RX_FDDRC_SLANT_0_0 +260 0x2000 //RX_FDDRC_SLANT_0_1 +261 0x2000 //RX_FDDRC_SLANT_0_2 +262 0x2000 //RX_FDDRC_SLANT_0_3 +263 0x5333 //RX_FDDRC_SLANT_1_0 +264 0x5333 //RX_FDDRC_SLANT_1_1 +265 0x5333 //RX_FDDRC_SLANT_1_2 +266 0x5333 //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +286 0x0100 //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 +#VOL 2 +163 0x3000 //RX_TDDRC_ALPHA_UP_1 +164 0x3000 //RX_TDDRC_ALPHA_UP_2 +165 0x3000 //RX_TDDRC_ALPHA_UP_3 +166 0x3000 //RX_TDDRC_ALPHA_UP_4 +184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +190 0x7FFF //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +269 0x0000 //RX_TDDRC_THRD_0 +270 0x0000 //RX_TDDRC_THRD_1 +271 0x7FFF //RX_TDDRC_THRD_2 +272 0x7FFF //RX_TDDRC_THRD_3 +273 0x7FFF //RX_TDDRC_SLANT_0 +274 0x7FFF //RX_TDDRC_SLANT_1 +275 0x3000 //RX_TDDRC_ALPHA_UP_0 +276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x199A //RX_TDDRC_HMNC_GAIN +279 0x0001 //RX_TDDRC_SMT_FLAG +280 0x0CCD //RX_TDDRC_SMT_W +281 0x0155 //RX_TDDRC_DRC_GAIN +195 0x0020 //RX_FDEQ_SUBNUM +196 0x4848 //RX_FDEQ_GAIN_0 +197 0x4848 //RX_FDEQ_GAIN_1 +198 0x4848 //RX_FDEQ_GAIN_2 +199 0x4848 //RX_FDEQ_GAIN_3 +200 0x4848 //RX_FDEQ_GAIN_4 +201 0x4848 //RX_FDEQ_GAIN_5 +202 0x4848 //RX_FDEQ_GAIN_6 +203 0x4848 //RX_FDEQ_GAIN_7 +204 0x4848 //RX_FDEQ_GAIN_8 +205 0x4848 //RX_FDEQ_GAIN_9 +206 0x4848 //RX_FDEQ_GAIN_10 +207 0x4848 //RX_FDEQ_GAIN_11 +208 0x4848 //RX_FDEQ_GAIN_12 +209 0x4848 //RX_FDEQ_GAIN_13 +210 0x4848 //RX_FDEQ_GAIN_14 +211 0x4848 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0202 //RX_FDEQ_BIN_0 +221 0x0203 //RX_FDEQ_BIN_1 +222 0x0303 //RX_FDEQ_BIN_2 +223 0x0304 //RX_FDEQ_BIN_3 +224 0x0405 //RX_FDEQ_BIN_4 +225 0x0506 //RX_FDEQ_BIN_5 +226 0x0708 //RX_FDEQ_BIN_6 +227 0x090A //RX_FDEQ_BIN_7 +228 0x0B0C //RX_FDEQ_BIN_8 +229 0x0D0E //RX_FDEQ_BIN_9 +230 0x1013 //RX_FDEQ_BIN_10 +231 0x1719 //RX_FDEQ_BIN_11 +232 0x1B1E //RX_FDEQ_BIN_12 +233 0x1E1E //RX_FDEQ_BIN_13 +234 0x1E28 //RX_FDEQ_BIN_14 +235 0x282C //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x4000 //RX_FDEQ_RESRV_0 +245 0x0320 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0030 //RX_FDDRC_BAND_MARGIN_1 +248 0x0050 //RX_FDDRC_BAND_MARGIN_2 +249 0x0080 //RX_FDDRC_BAND_MARGIN_3 +250 0x0007 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x5000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x6400 //RX_FDDRC_THRD_3_2 +258 0x6400 //RX_FDDRC_THRD_3_3 +259 0x2000 //RX_FDDRC_SLANT_0_0 +260 0x2000 //RX_FDDRC_SLANT_0_1 +261 0x2000 //RX_FDDRC_SLANT_0_2 +262 0x2000 //RX_FDDRC_SLANT_0_3 +263 0x5333 //RX_FDDRC_SLANT_1_0 +264 0x5333 //RX_FDDRC_SLANT_1_1 +265 0x5333 //RX_FDDRC_SLANT_1_2 +266 0x5333 //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +286 0x0100 //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 +#VOL 3 +163 0x3000 //RX_TDDRC_ALPHA_UP_1 +164 0x3000 //RX_TDDRC_ALPHA_UP_2 +165 0x3000 //RX_TDDRC_ALPHA_UP_3 +166 0x3000 //RX_TDDRC_ALPHA_UP_4 +184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +190 0x7FFF //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +269 0x0000 //RX_TDDRC_THRD_0 +270 0x0000 //RX_TDDRC_THRD_1 +271 0x7FFF //RX_TDDRC_THRD_2 +272 0x7FFF //RX_TDDRC_THRD_3 +273 0x7FFF //RX_TDDRC_SLANT_0 +274 0x7FFF //RX_TDDRC_SLANT_1 +275 0x3000 //RX_TDDRC_ALPHA_UP_0 +276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x199A //RX_TDDRC_HMNC_GAIN +279 0x0001 //RX_TDDRC_SMT_FLAG +280 0x0CCD //RX_TDDRC_SMT_W +281 0x0155 //RX_TDDRC_DRC_GAIN +195 0x0020 //RX_FDEQ_SUBNUM +196 0x4848 //RX_FDEQ_GAIN_0 +197 0x4848 //RX_FDEQ_GAIN_1 +198 0x4848 //RX_FDEQ_GAIN_2 +199 0x4848 //RX_FDEQ_GAIN_3 +200 0x4848 //RX_FDEQ_GAIN_4 +201 0x4848 //RX_FDEQ_GAIN_5 +202 0x4848 //RX_FDEQ_GAIN_6 +203 0x4848 //RX_FDEQ_GAIN_7 +204 0x4848 //RX_FDEQ_GAIN_8 +205 0x4848 //RX_FDEQ_GAIN_9 +206 0x4848 //RX_FDEQ_GAIN_10 +207 0x4848 //RX_FDEQ_GAIN_11 +208 0x4848 //RX_FDEQ_GAIN_12 +209 0x4848 //RX_FDEQ_GAIN_13 +210 0x4848 //RX_FDEQ_GAIN_14 +211 0x4848 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0202 //RX_FDEQ_BIN_0 +221 0x0203 //RX_FDEQ_BIN_1 +222 0x0303 //RX_FDEQ_BIN_2 +223 0x0304 //RX_FDEQ_BIN_3 +224 0x0405 //RX_FDEQ_BIN_4 +225 0x0506 //RX_FDEQ_BIN_5 +226 0x0708 //RX_FDEQ_BIN_6 +227 0x090A //RX_FDEQ_BIN_7 +228 0x0B0C //RX_FDEQ_BIN_8 +229 0x0D0E //RX_FDEQ_BIN_9 +230 0x1013 //RX_FDEQ_BIN_10 +231 0x1719 //RX_FDEQ_BIN_11 +232 0x1B1E //RX_FDEQ_BIN_12 +233 0x1E1E //RX_FDEQ_BIN_13 +234 0x1E28 //RX_FDEQ_BIN_14 +235 0x282C //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x4000 //RX_FDEQ_RESRV_0 +245 0x0320 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0030 //RX_FDDRC_BAND_MARGIN_1 +248 0x0050 //RX_FDDRC_BAND_MARGIN_2 +249 0x0080 //RX_FDDRC_BAND_MARGIN_3 +250 0x0007 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x5000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x6400 //RX_FDDRC_THRD_3_2 +258 0x6400 //RX_FDDRC_THRD_3_3 +259 0x2000 //RX_FDDRC_SLANT_0_0 +260 0x2000 //RX_FDDRC_SLANT_0_1 +261 0x2000 //RX_FDDRC_SLANT_0_2 +262 0x2000 //RX_FDDRC_SLANT_0_3 +263 0x5333 //RX_FDDRC_SLANT_1_0 +264 0x5333 //RX_FDDRC_SLANT_1_1 +265 0x5333 //RX_FDDRC_SLANT_1_2 +266 0x5333 //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +286 0x0100 //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 +#VOL 4 +163 0x3000 //RX_TDDRC_ALPHA_UP_1 +164 0x3000 //RX_TDDRC_ALPHA_UP_2 +165 0x3000 //RX_TDDRC_ALPHA_UP_3 +166 0x3000 //RX_TDDRC_ALPHA_UP_4 +184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +190 0x7FFF //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +269 0x0000 //RX_TDDRC_THRD_0 +270 0x0000 //RX_TDDRC_THRD_1 +271 0x7FFF //RX_TDDRC_THRD_2 +272 0x7FFF //RX_TDDRC_THRD_3 +273 0x7FFF //RX_TDDRC_SLANT_0 +274 0x7FFF //RX_TDDRC_SLANT_1 +275 0x3000 //RX_TDDRC_ALPHA_UP_0 +276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x199A //RX_TDDRC_HMNC_GAIN +279 0x0001 //RX_TDDRC_SMT_FLAG +280 0x0CCD //RX_TDDRC_SMT_W +281 0x0155 //RX_TDDRC_DRC_GAIN +195 0x0020 //RX_FDEQ_SUBNUM +196 0x4848 //RX_FDEQ_GAIN_0 +197 0x4848 //RX_FDEQ_GAIN_1 +198 0x4848 //RX_FDEQ_GAIN_2 +199 0x4848 //RX_FDEQ_GAIN_3 +200 0x4848 //RX_FDEQ_GAIN_4 +201 0x4848 //RX_FDEQ_GAIN_5 +202 0x4848 //RX_FDEQ_GAIN_6 +203 0x4848 //RX_FDEQ_GAIN_7 +204 0x4848 //RX_FDEQ_GAIN_8 +205 0x4848 //RX_FDEQ_GAIN_9 +206 0x4848 //RX_FDEQ_GAIN_10 +207 0x4848 //RX_FDEQ_GAIN_11 +208 0x4848 //RX_FDEQ_GAIN_12 +209 0x4848 //RX_FDEQ_GAIN_13 +210 0x4848 //RX_FDEQ_GAIN_14 +211 0x4848 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0202 //RX_FDEQ_BIN_0 +221 0x0203 //RX_FDEQ_BIN_1 +222 0x0303 //RX_FDEQ_BIN_2 +223 0x0304 //RX_FDEQ_BIN_3 +224 0x0405 //RX_FDEQ_BIN_4 +225 0x0506 //RX_FDEQ_BIN_5 +226 0x0708 //RX_FDEQ_BIN_6 +227 0x090A //RX_FDEQ_BIN_7 +228 0x0B0C //RX_FDEQ_BIN_8 +229 0x0D0E //RX_FDEQ_BIN_9 +230 0x1013 //RX_FDEQ_BIN_10 +231 0x1719 //RX_FDEQ_BIN_11 +232 0x1B1E //RX_FDEQ_BIN_12 +233 0x1E1E //RX_FDEQ_BIN_13 +234 0x1E28 //RX_FDEQ_BIN_14 +235 0x282C //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x4000 //RX_FDEQ_RESRV_0 +245 0x0320 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0030 //RX_FDDRC_BAND_MARGIN_1 +248 0x0050 //RX_FDDRC_BAND_MARGIN_2 +249 0x0080 //RX_FDDRC_BAND_MARGIN_3 +250 0x0007 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x5000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x6400 //RX_FDDRC_THRD_3_2 +258 0x6400 //RX_FDDRC_THRD_3_3 +259 0x2000 //RX_FDDRC_SLANT_0_0 +260 0x2000 //RX_FDDRC_SLANT_0_1 +261 0x2000 //RX_FDDRC_SLANT_0_2 +262 0x2000 //RX_FDDRC_SLANT_0_3 +263 0x5333 //RX_FDDRC_SLANT_1_0 +264 0x5333 //RX_FDDRC_SLANT_1_1 +265 0x5333 //RX_FDDRC_SLANT_1_2 +266 0x5333 //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +286 0x0100 //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 +#VOL 5 +163 0x3000 //RX_TDDRC_ALPHA_UP_1 +164 0x3000 //RX_TDDRC_ALPHA_UP_2 +165 0x3000 //RX_TDDRC_ALPHA_UP_3 +166 0x3000 //RX_TDDRC_ALPHA_UP_4 +184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +190 0x7FFF //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +269 0x0000 //RX_TDDRC_THRD_0 +270 0x0000 //RX_TDDRC_THRD_1 +271 0x7FFF //RX_TDDRC_THRD_2 +272 0x7FFF //RX_TDDRC_THRD_3 +273 0x7FFF //RX_TDDRC_SLANT_0 +274 0x7FFF //RX_TDDRC_SLANT_1 +275 0x3000 //RX_TDDRC_ALPHA_UP_0 +276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x199A //RX_TDDRC_HMNC_GAIN +279 0x0001 //RX_TDDRC_SMT_FLAG +280 0x0CCD //RX_TDDRC_SMT_W +281 0x0155 //RX_TDDRC_DRC_GAIN +195 0x0020 //RX_FDEQ_SUBNUM +196 0x4848 //RX_FDEQ_GAIN_0 +197 0x4848 //RX_FDEQ_GAIN_1 +198 0x4848 //RX_FDEQ_GAIN_2 +199 0x4848 //RX_FDEQ_GAIN_3 +200 0x4848 //RX_FDEQ_GAIN_4 +201 0x4848 //RX_FDEQ_GAIN_5 +202 0x4848 //RX_FDEQ_GAIN_6 +203 0x4848 //RX_FDEQ_GAIN_7 +204 0x4848 //RX_FDEQ_GAIN_8 +205 0x4848 //RX_FDEQ_GAIN_9 +206 0x4848 //RX_FDEQ_GAIN_10 +207 0x4848 //RX_FDEQ_GAIN_11 +208 0x4848 //RX_FDEQ_GAIN_12 +209 0x4848 //RX_FDEQ_GAIN_13 +210 0x4848 //RX_FDEQ_GAIN_14 +211 0x4848 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0202 //RX_FDEQ_BIN_0 +221 0x0203 //RX_FDEQ_BIN_1 +222 0x0303 //RX_FDEQ_BIN_2 +223 0x0304 //RX_FDEQ_BIN_3 +224 0x0405 //RX_FDEQ_BIN_4 +225 0x0506 //RX_FDEQ_BIN_5 +226 0x0708 //RX_FDEQ_BIN_6 +227 0x090A //RX_FDEQ_BIN_7 +228 0x0B0C //RX_FDEQ_BIN_8 +229 0x0D0E //RX_FDEQ_BIN_9 +230 0x1013 //RX_FDEQ_BIN_10 +231 0x1719 //RX_FDEQ_BIN_11 +232 0x1B1E //RX_FDEQ_BIN_12 +233 0x1E1E //RX_FDEQ_BIN_13 +234 0x1E28 //RX_FDEQ_BIN_14 +235 0x282C //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x4000 //RX_FDEQ_RESRV_0 +245 0x0320 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0030 //RX_FDDRC_BAND_MARGIN_1 +248 0x0050 //RX_FDDRC_BAND_MARGIN_2 +249 0x0080 //RX_FDDRC_BAND_MARGIN_3 +250 0x0007 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x5000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x6400 //RX_FDDRC_THRD_3_2 +258 0x6400 //RX_FDDRC_THRD_3_3 +259 0x2000 //RX_FDDRC_SLANT_0_0 +260 0x2000 //RX_FDDRC_SLANT_0_1 +261 0x2000 //RX_FDDRC_SLANT_0_2 +262 0x2000 //RX_FDDRC_SLANT_0_3 +263 0x5333 //RX_FDDRC_SLANT_1_0 +264 0x5333 //RX_FDDRC_SLANT_1_1 +265 0x5333 //RX_FDDRC_SLANT_1_2 +266 0x5333 //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +286 0x0100 //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 +#VOL 6 +163 0x3000 //RX_TDDRC_ALPHA_UP_1 +164 0x3000 //RX_TDDRC_ALPHA_UP_2 +165 0x3000 //RX_TDDRC_ALPHA_UP_3 +166 0x3000 //RX_TDDRC_ALPHA_UP_4 +184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +190 0x7FFF //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +269 0x0000 //RX_TDDRC_THRD_0 +270 0x0000 //RX_TDDRC_THRD_1 +271 0x7FFF //RX_TDDRC_THRD_2 +272 0x7FFF //RX_TDDRC_THRD_3 +273 0x7FFF //RX_TDDRC_SLANT_0 +274 0x7FFF //RX_TDDRC_SLANT_1 +275 0x3000 //RX_TDDRC_ALPHA_UP_0 +276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x199A //RX_TDDRC_HMNC_GAIN +279 0x0001 //RX_TDDRC_SMT_FLAG +280 0x0CCD //RX_TDDRC_SMT_W +281 0x0155 //RX_TDDRC_DRC_GAIN +195 0x0020 //RX_FDEQ_SUBNUM +196 0x4848 //RX_FDEQ_GAIN_0 +197 0x4848 //RX_FDEQ_GAIN_1 +198 0x4848 //RX_FDEQ_GAIN_2 +199 0x4848 //RX_FDEQ_GAIN_3 +200 0x4848 //RX_FDEQ_GAIN_4 +201 0x4848 //RX_FDEQ_GAIN_5 +202 0x4848 //RX_FDEQ_GAIN_6 +203 0x4848 //RX_FDEQ_GAIN_7 +204 0x4848 //RX_FDEQ_GAIN_8 +205 0x4848 //RX_FDEQ_GAIN_9 +206 0x4848 //RX_FDEQ_GAIN_10 +207 0x4848 //RX_FDEQ_GAIN_11 +208 0x4848 //RX_FDEQ_GAIN_12 +209 0x4848 //RX_FDEQ_GAIN_13 +210 0x4848 //RX_FDEQ_GAIN_14 +211 0x4848 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0202 //RX_FDEQ_BIN_0 +221 0x0203 //RX_FDEQ_BIN_1 +222 0x0303 //RX_FDEQ_BIN_2 +223 0x0304 //RX_FDEQ_BIN_3 +224 0x0405 //RX_FDEQ_BIN_4 +225 0x0506 //RX_FDEQ_BIN_5 +226 0x0708 //RX_FDEQ_BIN_6 +227 0x090A //RX_FDEQ_BIN_7 +228 0x0B0C //RX_FDEQ_BIN_8 +229 0x0D0E //RX_FDEQ_BIN_9 +230 0x1013 //RX_FDEQ_BIN_10 +231 0x1719 //RX_FDEQ_BIN_11 +232 0x1B1E //RX_FDEQ_BIN_12 +233 0x1E1E //RX_FDEQ_BIN_13 +234 0x1E28 //RX_FDEQ_BIN_14 +235 0x282C //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x4000 //RX_FDEQ_RESRV_0 +245 0x0320 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0030 //RX_FDDRC_BAND_MARGIN_1 +248 0x0050 //RX_FDDRC_BAND_MARGIN_2 +249 0x0080 //RX_FDDRC_BAND_MARGIN_3 +250 0x0007 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x5000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x6400 //RX_FDDRC_THRD_3_2 +258 0x6400 //RX_FDDRC_THRD_3_3 +259 0x2000 //RX_FDDRC_SLANT_0_0 +260 0x2000 //RX_FDDRC_SLANT_0_1 +261 0x2000 //RX_FDDRC_SLANT_0_2 +262 0x2000 //RX_FDDRC_SLANT_0_3 +263 0x5333 //RX_FDDRC_SLANT_1_0 +264 0x5333 //RX_FDDRC_SLANT_1_1 +265 0x5333 //RX_FDDRC_SLANT_1_2 +266 0x5333 //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +286 0x0100 //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 #CASE_NAME BLUETOOTH-BTWB-VOICE_GENERIC-FB -#PARAM_TYPE TX+RX -#TOTAL_CUSTOM_STEP 7 +#PARAM_MODE Full +#PARAM_TYPE TX+2RX +#TOTAL_CUSTOM_STEP 7+7 #TX 0 0x0009 //TX_OPERATION_MODE_0 1 0x0009 //TX_OPERATION_MODE_1 @@ -28306,10 +42979,10 @@ 248 0xF600 //TX_THR_SN_EST_6 249 0xF600 //TX_THR_SN_EST_7 250 0x0200 //TX_DELTA_THR_SN_EST_0 -251 0x0200 //TX_DELTA_THR_SN_EST_1 -252 0x0400 //TX_DELTA_THR_SN_EST_2 -253 0x0300 //TX_DELTA_THR_SN_EST_3 -254 0x0600 //TX_DELTA_THR_SN_EST_4 +251 0x0400 //TX_DELTA_THR_SN_EST_1 +252 0x0300 //TX_DELTA_THR_SN_EST_2 +253 0x0600 //TX_DELTA_THR_SN_EST_3 +254 0x0200 //TX_DELTA_THR_SN_EST_4 255 0x0200 //TX_DELTA_THR_SN_EST_5 256 0x0200 //TX_DELTA_THR_SN_EST_6 257 0x0200 //TX_DELTA_THR_SN_EST_7 @@ -28337,31 +43010,31 @@ 279 0x2000 //TX_B_POST_FLT_0 280 0x2000 //TX_B_POST_FLT_1 281 0x0012 //TX_NS_LVL_CTRL_0 -282 0x0019 //TX_NS_LVL_CTRL_1 +282 0x0016 //TX_NS_LVL_CTRL_1 283 0x0016 //TX_NS_LVL_CTRL_2 -284 0x0016 //TX_NS_LVL_CTRL_3 -285 0x0019 //TX_NS_LVL_CTRL_4 +284 0x0019 //TX_NS_LVL_CTRL_3 +285 0x0010 //TX_NS_LVL_CTRL_4 286 0x0010 //TX_NS_LVL_CTRL_5 -287 0x0010 //TX_NS_LVL_CTRL_6 +287 0x0019 //TX_NS_LVL_CTRL_6 288 0x0010 //TX_NS_LVL_CTRL_7 289 0x000C //TX_MIN_GAIN_S_0 -290 0x0011 //TX_MIN_GAIN_S_1 +290 0x000C //TX_MIN_GAIN_S_1 291 0x000C //TX_MIN_GAIN_S_2 -292 0x000C //TX_MIN_GAIN_S_3 -293 0x000F //TX_MIN_GAIN_S_4 +292 0x000F //TX_MIN_GAIN_S_3 +293 0x000C //TX_MIN_GAIN_S_4 294 0x000C //TX_MIN_GAIN_S_5 -295 0x000C //TX_MIN_GAIN_S_6 +295 0x0011 //TX_MIN_GAIN_S_6 296 0x000C //TX_MIN_GAIN_S_7 297 0x7FFF //TX_NMOS_SUP 298 0x0000 //TX_NS_MAX_PRI_SNR_TH 299 0x0000 //TX_NMOS_SUP_MENSA 300 0x7000 //TX_SNRI_SUP_0 -301 0x6000 //TX_SNRI_SUP_1 +301 0x7000 //TX_SNRI_SUP_1 302 0x7000 //TX_SNRI_SUP_2 -303 0x7000 //TX_SNRI_SUP_3 -304 0x6000 //TX_SNRI_SUP_4 +303 0x6000 //TX_SNRI_SUP_3 +304 0x7FFF //TX_SNRI_SUP_4 305 0x7FFF //TX_SNRI_SUP_5 -306 0x7FFF //TX_SNRI_SUP_6 +306 0x6000 //TX_SNRI_SUP_6 307 0x7FFF //TX_SNRI_SUP_7 308 0x7FFF //TX_THR_LFNS 309 0x0016 //TX_G_LFNS @@ -28378,8 +43051,8 @@ 320 0x6000 //TX_A_POST_FILT_S_6 321 0x6000 //TX_A_POST_FILT_S_7 322 0x2000 //TX_B_POST_FILT_0 -323 0x2000 //TX_B_POST_FILT_1 -324 0x4000 //TX_B_POST_FILT_2 +323 0x4000 //TX_B_POST_FILT_1 +324 0x2000 //TX_B_POST_FILT_2 325 0x2000 //TX_B_POST_FILT_3 326 0x2000 //TX_B_POST_FILT_4 327 0x2000 //TX_B_POST_FILT_5 @@ -28435,10 +43108,10 @@ 377 0x0000 //TX_NOISE_TH_5_4 378 0x02BC //TX_NOISE_TH_6 379 0x0020 //TX_MINENOISE_TH -380 0x4000 //TX_MINENOISE_MIC0_TH_MTS -381 0xFFEE //TX_MINENOISE_MIC0_TH_EXP -382 0x6000 //TX_MINENOISE_MIC0_S_TH_MTS -383 0xFFF3 //TX_MINENOISE_MIC0_S_TH_EXP +380 0x4000 //TX_MORENS_TFMASK_TH +381 0xFFEE //TX_DRC_QUIET_FLOOR +382 0x6000 //TX_RATIODTL_CUT_TH +383 0xFFF3 //TX_DT_CUT_K1 384 0x0666 //TX_OUT_ENER_S_TH_CLEAN 385 0x0666 //TX_OUT_ENER_S_TH_LESSCLEAN 386 0x0333 //TX_OUT_ENER_S_TH_NOISY @@ -28446,15 +43119,15 @@ 388 0x0333 //TX_OUT_ENER_TH_SPEECH 389 0x2000 //TX_SN_NPB_GAIN 390 0x0000 //TX_NN_NPB_GAIN -391 0x0000 //TX_CSX_ALPHA_0 -392 0x0000 //TX_CSX_ALPHA_1 -393 0x0000 //TX_CSX_ALPHA_2 -394 0x0000 //TX_CSX_ALPHA_3 -395 0x0800 //TX_MU_ARSP_EST -396 0x00C8 //TX_P_OUTBEAM_MIN_TH +391 0x0000 //TX_POST_MASK_SUP_HSNE +392 0x0000 //TX_TAIL_DET_TH +393 0x0000 //TX_B_LESSCUT_RTO_WTA +394 0x0000 //TX_MEL_G_R +395 0x0800 //TX_SUPHIGH_TH +396 0x00C8 //TX_MASK_G_R 397 0x0002 //TX_EXTRA_NS_L -398 0x0800 //TX_EXTRA_NS_A -399 0x0005 //TX_VR_NOISE_FLOOR_TH +398 0x0800 //TX_C_POST_FLT_MASK +399 0x0005 //TX_A_POST_FLT_WNS 400 0x0148 //TX_MIN_G_LOW300HZ 401 0x0002 //TX_MAXLEVEL_CNG 402 0x00B4 //TX_STN_NOISE_TH @@ -28569,16 +43242,16 @@ 511 0x6666 //TX_MIC_TO_BFGAIN 512 0x0000 //TX_MICTOBFGAIN0 513 0x0000 //TX_FASTMUE_TH -514 0x0000 //TX_DERVB_LEN_0 -515 0x0000 //TX_DERVB_LEN_1 -516 0x0000 //TX_RHO_DERVB -517 0x0000 //TX_MIC_INDX_DERVB -518 0x0000 //TX_MU_DERVB -519 0x0000 //TX_DR_RESRV_0 -520 0x0000 //TX_DR_RESRV_1 -521 0x0000 //TX_DR_RESRV_2 -522 0x0000 //TX_DR_RESRV_3 -523 0x0000 //TX_DR_RESRV_4 +514 0x0000 //TX_DEREVERB_LF_MU +515 0x0000 //TX_DEREVERB_HF_MU +516 0x0000 //TX_DEREVERB_DELAY +517 0x0000 //TX_DEREVERB_COEF_LEN +518 0x0000 //TX_DEREVERB_DNR +519 0x0000 //TX_DEREVERB_ALPHA +520 0x0000 //TX_DEREVERB_BETA +521 0x0000 //TX_GSC_RTOL_TH +522 0x0000 //TX_GSC_RTOH_TH +523 0x0000 //TX_WIDE2_MEANHTH 524 0x0000 //TX_DR_RESRV_5 525 0x0000 //TX_DR_RESRV_6 526 0x0000 //TX_DR_RESRV_7 @@ -28952,8 +43625,73 @@ 894 0xC000 //TX_FASTNS_SSA_THHFL 895 0xCCCC //TX_FASTNS_SSA_THLFH 896 0xD999 //TX_FASTNS_SSA_THHFH +897 0x0000 //TX_SENDFUNC_REG_MICMUTE +898 0x0000 //TX_SENDFUNC_REG_MICMUTE1 +899 0x0000 //TX_MICMUTE_RATIO_THR +900 0x0000 //TX_MICMUTE_AMP_THR +901 0x0000 //TX_MICMUTE_HPF_IND +902 0x0000 //TX_MICMUTE_LOG_EYR_TH +903 0x0000 //TX_MICMUTE_CVG_TIME +904 0x0000 //TX_MICMUTE_RELEASE_TIME +905 0x0000 //TX_MIC_VOLUME_MIC0MUTE +906 0x0000 //TX_MICMUTE_EPD_OFFSET_0 +907 0x0000 //TX_MICMUTE_FRQ_AEC_L +908 0x0000 //TX_MICMUTE_EAD_THR +909 0x0000 //TX_MICMUTE_LAMBDA_CB_NLE +910 0x0000 //TX_MICMUTE_LAMBDA_RE_EST +911 0x0000 //TX_DTD_THR1_MICMUTE_0 +912 0x0000 //TX_DTD_THR1_MICMUTE_1 +913 0x0000 //TX_DTD_THR1_MICMUTE_2 +914 0x0000 //TX_DTD_THR1_MICMUTE_3 +915 0x0000 //TX_DTD_THR2_MICMUTE_0 +916 0x0000 //TX_MICMUTE_MIN_EQ_RE_EST_0 +917 0x0000 //TX_MICMUTE_MIN_EQ_RE_EST_1 +918 0x0000 //TX_MICMUTE_MIN_EQ_RE_EST_2 +919 0x0000 //TX_MICMUTE_MIN_EQ_RE_EST_3 +920 0x0000 //TX_MICMUTE_MIN_EQ_RE_EST_4 +921 0x0000 //TX_MICMUTE_C_POST_FLT +922 0x0000 //TX_MICMUTE_DT_CUT_K +923 0x0000 //TX_MICMUTE_DT_CUT_THR +924 0x0000 //TX_MICMUTE_DT_CUT_K2 +925 0x0000 //TX_MICMUTE_DT_CUT_THR2 +926 0x0000 //TX_MICMUTE_DT2_HOLD_N +927 0x0000 //TX_MICMUTE_RATIODTH_THCUT +928 0x0000 //TX_MICMUTE_B_POST_FLT_ECHOL +929 0x0000 //TX_MICMUTE_B_POST_FLT_ECHOH +930 0x0000 //TX_MICMUTE_C_POST_FLT_MASK +931 0x0000 //TX_MICMUTE_RATIODTL_CUT_TH +932 0x0000 //TX_MICMUTE_DT_CUT_K1 +933 0x0000 //TX_MICMUTE_N2_SN_EST +934 0x0000 //TX_MICMUTE_THR_SN_EST_0 +935 0x0000 //TX_MICMUTE_MIN_G_CTRL_0 +936 0x0000 //TX_MICMUTE_A_POST_FILT_S_0 +937 0x0000 //TX_MICMUTE_B_POST_FILT_0 +938 0x0000 //TX_MIC1RUB_AMP_THR +939 0x0000 //TX_MIC1MUTE_RATIO_THR +940 0x0000 //TX_MIC1MUTE_AMP_THR +941 0x0000 //TX_MIC1MUTE_CVG_TIME +942 0x0000 //TX_MIC1MUTE_RELEASE_TIME +943 0x0000 //TX_AMS_RESRV_01 +944 0x0000 //TX_AMS_RESRV_02 +945 0x0000 //TX_AMS_RESRV_03 +946 0x0000 //TX_AMS_RESRV_04 +947 0x0000 //TX_AMS_RESRV_05 +948 0x0000 //TX_AMS_RESRV_06 +949 0x0000 //TX_AMS_RESRV_07 +950 0x0000 //TX_AMS_RESRV_08 +951 0x0000 //TX_AMS_RESRV_09 +952 0x0000 //TX_AMS_RESRV_10 +953 0x0000 //TX_AMS_RESRV_11 +954 0x0000 //TX_AMS_RESRV_12 +955 0x0000 //TX_AMS_RESRV_13 +956 0x0000 //TX_AMS_RESRV_14 +957 0x0000 //TX_AMS_RESRV_15 +958 0x0000 //TX_AMS_RESRV_16 +959 0x0000 //TX_AMS_RESRV_17 +960 0x0000 //TX_AMS_RESRV_18 +961 0x0000 //TX_AMS_RESRV_19 #RX -0 0x0064 //RX_RECVFUNC_MODE_0 +0 0x2064 //RX_RECVFUNC_MODE_0 1 0x0000 //RX_RECVFUNC_MODE_1 2 0x0004 //RX_SAMPLINGFREQ_SIG 3 0x0004 //RX_SAMPLINGFREQ_PROC @@ -29803,10 +44541,862 @@ 110 0x0000 //RX_FDDRC_RESRV_0 129 0x0100 //RX_SPK_VOL 130 0x0000 //RX_VOL_RESRV_0 +#RX 2 +157 0x0064 //RX_RECVFUNC_MODE_0 +158 0x0000 //RX_RECVFUNC_MODE_1 +159 0x0004 //RX_SAMPLINGFREQ_SIG +160 0x0004 //RX_SAMPLINGFREQ_PROC +161 0x000A //RX_FRAME_SZ +162 0x0000 //RX_DELAY_OPT +163 0x1000 //RX_TDDRC_ALPHA_UP_1 +164 0x1000 //RX_TDDRC_ALPHA_UP_2 +165 0x1000 //RX_TDDRC_ALPHA_UP_3 +166 0x1000 //RX_TDDRC_ALPHA_UP_4 +167 0x0800 //RX_PGA +168 0x7FFF //RX_A_HP +169 0x4000 //RX_B_PE +170 0x7800 //RX_THR_PITCH_DET_0 +171 0x7000 //RX_THR_PITCH_DET_1 +172 0x6000 //RX_THR_PITCH_DET_2 +173 0x0008 //RX_PITCH_BFR_LEN +174 0x0003 //RX_SBD_PITCH_DET +175 0x0100 //RX_PP_RESRV_0 +176 0x0020 //RX_PP_RESRV_1 +177 0x0500 //RX_N_SN_EST +178 0x000C //RX_N2_SN_EST +179 0x000A //RX_NS_LVL_CTRL +180 0xF600 //RX_THR_SN_EST +181 0x7000 //RX_LAMBDA_PFILT +182 0x000A //RX_FENS_RESRV_0 +183 0x0190 //RX_FENS_RESRV_1 +184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +187 0x0002 //RX_EXTRA_NS_L +188 0x0800 //RX_EXTRA_NS_A +189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +190 0x7FFF //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +192 0x199A //RX_A_POST_FLT +193 0x0000 //RX_LMT_THRD +194 0x4000 //RX_LMT_ALPHA +195 0x0020 //RX_FDEQ_SUBNUM +196 0x4848 //RX_FDEQ_GAIN_0 +197 0x4848 //RX_FDEQ_GAIN_1 +198 0x4848 //RX_FDEQ_GAIN_2 +199 0x4848 //RX_FDEQ_GAIN_3 +200 0x4848 //RX_FDEQ_GAIN_4 +201 0x4848 //RX_FDEQ_GAIN_5 +202 0x4848 //RX_FDEQ_GAIN_6 +203 0x4848 //RX_FDEQ_GAIN_7 +204 0x4848 //RX_FDEQ_GAIN_8 +205 0x4848 //RX_FDEQ_GAIN_9 +206 0x4848 //RX_FDEQ_GAIN_10 +207 0x4848 //RX_FDEQ_GAIN_11 +208 0x4848 //RX_FDEQ_GAIN_12 +209 0x4848 //RX_FDEQ_GAIN_13 +210 0x4848 //RX_FDEQ_GAIN_14 +211 0x4848 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0202 //RX_FDEQ_BIN_0 +221 0x0203 //RX_FDEQ_BIN_1 +222 0x0304 //RX_FDEQ_BIN_2 +223 0x0405 //RX_FDEQ_BIN_3 +224 0x0607 //RX_FDEQ_BIN_4 +225 0x0809 //RX_FDEQ_BIN_5 +226 0x0A0B //RX_FDEQ_BIN_6 +227 0x0C0D //RX_FDEQ_BIN_7 +228 0x0E0F //RX_FDEQ_BIN_8 +229 0x1011 //RX_FDEQ_BIN_9 +230 0x1214 //RX_FDEQ_BIN_10 +231 0x1618 //RX_FDEQ_BIN_11 +232 0x1C1C //RX_FDEQ_BIN_12 +233 0x2020 //RX_FDEQ_BIN_13 +234 0x2020 //RX_FDEQ_BIN_14 +235 0x2011 //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x4000 //RX_FDEQ_RESRV_0 +245 0x0320 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0030 //RX_FDDRC_BAND_MARGIN_1 +248 0x0050 //RX_FDDRC_BAND_MARGIN_2 +249 0x0080 //RX_FDDRC_BAND_MARGIN_3 +250 0x0007 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x5000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x6400 //RX_FDDRC_THRD_3_2 +258 0x6400 //RX_FDDRC_THRD_3_3 +259 0x2000 //RX_FDDRC_SLANT_0_0 +260 0x2000 //RX_FDDRC_SLANT_0_1 +261 0x2000 //RX_FDDRC_SLANT_0_2 +262 0x2000 //RX_FDDRC_SLANT_0_3 +263 0x5333 //RX_FDDRC_SLANT_1_0 +264 0x5333 //RX_FDDRC_SLANT_1_1 +265 0x5333 //RX_FDDRC_SLANT_1_2 +266 0x5333 //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +268 0x0000 //RX_FILTINDX +269 0x0000 //RX_TDDRC_THRD_0 +270 0x0000 //RX_TDDRC_THRD_1 +271 0x7FFF //RX_TDDRC_THRD_2 +272 0x7FFF //RX_TDDRC_THRD_3 +273 0x7FFF //RX_TDDRC_SLANT_0 +274 0x7FFF //RX_TDDRC_SLANT_1 +275 0x1000 //RX_TDDRC_ALPHA_UP_0 +276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x199A //RX_TDDRC_HMNC_GAIN +279 0x0001 //RX_TDDRC_SMT_FLAG +280 0x0CCD //RX_TDDRC_SMT_W +281 0x0155 //RX_TDDRC_DRC_GAIN +282 0x7C00 //RX_LAMBDA_PKA_FP +283 0x2000 //RX_TPKA_FP +284 0x2000 //RX_MIN_G_FP +285 0x0080 //RX_MAX_G_FP +286 0x0100 //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 +288 0x0000 //RX_MAXLEVEL_CNG +289 0x3000 //RX_BWE_UV_TH +290 0x3000 //RX_BWE_UV_TH2 +291 0x1800 //RX_BWE_UV_TH3 +292 0x1000 //RX_BWE_V_TH +293 0x04CD //RX_BWE_GAIN1_V_TH1 +294 0x0F33 //RX_BWE_GAIN1_V_TH2 +295 0x7333 //RX_BWE_UV_EQ +296 0x199A //RX_BWE_V_EQ +297 0x7333 //RX_BWE_TONE_TH +298 0x0004 //RX_BWE_UV_HOLD_T +299 0x6CCD //RX_BWE_GAIN2_ALPHA +300 0x799A //RX_BWE_GAIN3_ALPHA +301 0x001E //RX_BWE_CUTOFF +302 0x3000 //RX_BWE_GAINFILL +303 0x3200 //RX_BWE_MAXTH_TONE +304 0x2000 //RX_BWE_EQ_0 +305 0x2000 //RX_BWE_EQ_1 +306 0x2000 //RX_BWE_EQ_2 +307 0x2000 //RX_BWE_EQ_3 +308 0x2000 //RX_BWE_EQ_4 +309 0x2000 //RX_BWE_EQ_5 +310 0x2000 //RX_BWE_EQ_6 +311 0x0000 //RX_BWE_RESRV_0 +312 0x0000 //RX_BWE_RESRV_1 +313 0x0000 //RX_BWE_RESRV_2 +#VOL 0 +163 0x1000 //RX_TDDRC_ALPHA_UP_1 +164 0x1000 //RX_TDDRC_ALPHA_UP_2 +165 0x1000 //RX_TDDRC_ALPHA_UP_3 +166 0x1000 //RX_TDDRC_ALPHA_UP_4 +184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +190 0x7FFF //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +269 0x0000 //RX_TDDRC_THRD_0 +270 0x0000 //RX_TDDRC_THRD_1 +271 0x7FFF //RX_TDDRC_THRD_2 +272 0x7FFF //RX_TDDRC_THRD_3 +273 0x7FFF //RX_TDDRC_SLANT_0 +274 0x7FFF //RX_TDDRC_SLANT_1 +275 0x1000 //RX_TDDRC_ALPHA_UP_0 +276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x199A //RX_TDDRC_HMNC_GAIN +279 0x0001 //RX_TDDRC_SMT_FLAG +280 0x0CCD //RX_TDDRC_SMT_W +281 0x0155 //RX_TDDRC_DRC_GAIN +195 0x0020 //RX_FDEQ_SUBNUM +196 0x4848 //RX_FDEQ_GAIN_0 +197 0x4848 //RX_FDEQ_GAIN_1 +198 0x4848 //RX_FDEQ_GAIN_2 +199 0x4848 //RX_FDEQ_GAIN_3 +200 0x4848 //RX_FDEQ_GAIN_4 +201 0x4848 //RX_FDEQ_GAIN_5 +202 0x4848 //RX_FDEQ_GAIN_6 +203 0x4848 //RX_FDEQ_GAIN_7 +204 0x4848 //RX_FDEQ_GAIN_8 +205 0x4848 //RX_FDEQ_GAIN_9 +206 0x4848 //RX_FDEQ_GAIN_10 +207 0x4848 //RX_FDEQ_GAIN_11 +208 0x4848 //RX_FDEQ_GAIN_12 +209 0x4848 //RX_FDEQ_GAIN_13 +210 0x4848 //RX_FDEQ_GAIN_14 +211 0x4848 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0202 //RX_FDEQ_BIN_0 +221 0x0203 //RX_FDEQ_BIN_1 +222 0x0304 //RX_FDEQ_BIN_2 +223 0x0405 //RX_FDEQ_BIN_3 +224 0x0607 //RX_FDEQ_BIN_4 +225 0x0809 //RX_FDEQ_BIN_5 +226 0x0A0B //RX_FDEQ_BIN_6 +227 0x0C0D //RX_FDEQ_BIN_7 +228 0x0E0F //RX_FDEQ_BIN_8 +229 0x1011 //RX_FDEQ_BIN_9 +230 0x1214 //RX_FDEQ_BIN_10 +231 0x1618 //RX_FDEQ_BIN_11 +232 0x1C1C //RX_FDEQ_BIN_12 +233 0x2020 //RX_FDEQ_BIN_13 +234 0x2020 //RX_FDEQ_BIN_14 +235 0x2011 //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x4000 //RX_FDEQ_RESRV_0 +245 0x0320 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0030 //RX_FDDRC_BAND_MARGIN_1 +248 0x0050 //RX_FDDRC_BAND_MARGIN_2 +249 0x0080 //RX_FDDRC_BAND_MARGIN_3 +250 0x0007 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x5000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x6400 //RX_FDDRC_THRD_3_2 +258 0x6400 //RX_FDDRC_THRD_3_3 +259 0x2000 //RX_FDDRC_SLANT_0_0 +260 0x2000 //RX_FDDRC_SLANT_0_1 +261 0x2000 //RX_FDDRC_SLANT_0_2 +262 0x2000 //RX_FDDRC_SLANT_0_3 +263 0x5333 //RX_FDDRC_SLANT_1_0 +264 0x5333 //RX_FDDRC_SLANT_1_1 +265 0x5333 //RX_FDDRC_SLANT_1_2 +266 0x5333 //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +286 0x0100 //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 +#VOL 1 +163 0x1000 //RX_TDDRC_ALPHA_UP_1 +164 0x1000 //RX_TDDRC_ALPHA_UP_2 +165 0x1000 //RX_TDDRC_ALPHA_UP_3 +166 0x1000 //RX_TDDRC_ALPHA_UP_4 +184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +190 0x7FFF //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +269 0x0000 //RX_TDDRC_THRD_0 +270 0x0000 //RX_TDDRC_THRD_1 +271 0x7FFF //RX_TDDRC_THRD_2 +272 0x7FFF //RX_TDDRC_THRD_3 +273 0x7FFF //RX_TDDRC_SLANT_0 +274 0x7FFF //RX_TDDRC_SLANT_1 +275 0x1000 //RX_TDDRC_ALPHA_UP_0 +276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x199A //RX_TDDRC_HMNC_GAIN +279 0x0001 //RX_TDDRC_SMT_FLAG +280 0x0CCD //RX_TDDRC_SMT_W +281 0x0155 //RX_TDDRC_DRC_GAIN +195 0x0020 //RX_FDEQ_SUBNUM +196 0x4848 //RX_FDEQ_GAIN_0 +197 0x4848 //RX_FDEQ_GAIN_1 +198 0x4848 //RX_FDEQ_GAIN_2 +199 0x4848 //RX_FDEQ_GAIN_3 +200 0x4848 //RX_FDEQ_GAIN_4 +201 0x4848 //RX_FDEQ_GAIN_5 +202 0x4848 //RX_FDEQ_GAIN_6 +203 0x4848 //RX_FDEQ_GAIN_7 +204 0x4848 //RX_FDEQ_GAIN_8 +205 0x4848 //RX_FDEQ_GAIN_9 +206 0x4848 //RX_FDEQ_GAIN_10 +207 0x4848 //RX_FDEQ_GAIN_11 +208 0x4848 //RX_FDEQ_GAIN_12 +209 0x4848 //RX_FDEQ_GAIN_13 +210 0x4848 //RX_FDEQ_GAIN_14 +211 0x4848 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0202 //RX_FDEQ_BIN_0 +221 0x0203 //RX_FDEQ_BIN_1 +222 0x0304 //RX_FDEQ_BIN_2 +223 0x0405 //RX_FDEQ_BIN_3 +224 0x0607 //RX_FDEQ_BIN_4 +225 0x0809 //RX_FDEQ_BIN_5 +226 0x0A0B //RX_FDEQ_BIN_6 +227 0x0C0D //RX_FDEQ_BIN_7 +228 0x0E0F //RX_FDEQ_BIN_8 +229 0x1011 //RX_FDEQ_BIN_9 +230 0x1214 //RX_FDEQ_BIN_10 +231 0x1618 //RX_FDEQ_BIN_11 +232 0x1C1C //RX_FDEQ_BIN_12 +233 0x2020 //RX_FDEQ_BIN_13 +234 0x2020 //RX_FDEQ_BIN_14 +235 0x2011 //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x4000 //RX_FDEQ_RESRV_0 +245 0x0320 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0030 //RX_FDDRC_BAND_MARGIN_1 +248 0x0050 //RX_FDDRC_BAND_MARGIN_2 +249 0x0080 //RX_FDDRC_BAND_MARGIN_3 +250 0x0007 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x5000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x6400 //RX_FDDRC_THRD_3_2 +258 0x6400 //RX_FDDRC_THRD_3_3 +259 0x2000 //RX_FDDRC_SLANT_0_0 +260 0x2000 //RX_FDDRC_SLANT_0_1 +261 0x2000 //RX_FDDRC_SLANT_0_2 +262 0x2000 //RX_FDDRC_SLANT_0_3 +263 0x5333 //RX_FDDRC_SLANT_1_0 +264 0x5333 //RX_FDDRC_SLANT_1_1 +265 0x5333 //RX_FDDRC_SLANT_1_2 +266 0x5333 //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +286 0x0100 //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 +#VOL 2 +163 0x1000 //RX_TDDRC_ALPHA_UP_1 +164 0x1000 //RX_TDDRC_ALPHA_UP_2 +165 0x1000 //RX_TDDRC_ALPHA_UP_3 +166 0x1000 //RX_TDDRC_ALPHA_UP_4 +184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +190 0x7FFF //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +269 0x0000 //RX_TDDRC_THRD_0 +270 0x0000 //RX_TDDRC_THRD_1 +271 0x7FFF //RX_TDDRC_THRD_2 +272 0x7FFF //RX_TDDRC_THRD_3 +273 0x7FFF //RX_TDDRC_SLANT_0 +274 0x7FFF //RX_TDDRC_SLANT_1 +275 0x1000 //RX_TDDRC_ALPHA_UP_0 +276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x199A //RX_TDDRC_HMNC_GAIN +279 0x0001 //RX_TDDRC_SMT_FLAG +280 0x0CCD //RX_TDDRC_SMT_W +281 0x0155 //RX_TDDRC_DRC_GAIN +195 0x0020 //RX_FDEQ_SUBNUM +196 0x4848 //RX_FDEQ_GAIN_0 +197 0x4848 //RX_FDEQ_GAIN_1 +198 0x4848 //RX_FDEQ_GAIN_2 +199 0x4848 //RX_FDEQ_GAIN_3 +200 0x4848 //RX_FDEQ_GAIN_4 +201 0x4848 //RX_FDEQ_GAIN_5 +202 0x4848 //RX_FDEQ_GAIN_6 +203 0x4848 //RX_FDEQ_GAIN_7 +204 0x4848 //RX_FDEQ_GAIN_8 +205 0x4848 //RX_FDEQ_GAIN_9 +206 0x4848 //RX_FDEQ_GAIN_10 +207 0x4848 //RX_FDEQ_GAIN_11 +208 0x4848 //RX_FDEQ_GAIN_12 +209 0x4848 //RX_FDEQ_GAIN_13 +210 0x4848 //RX_FDEQ_GAIN_14 +211 0x4848 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0202 //RX_FDEQ_BIN_0 +221 0x0203 //RX_FDEQ_BIN_1 +222 0x0304 //RX_FDEQ_BIN_2 +223 0x0405 //RX_FDEQ_BIN_3 +224 0x0607 //RX_FDEQ_BIN_4 +225 0x0809 //RX_FDEQ_BIN_5 +226 0x0A0B //RX_FDEQ_BIN_6 +227 0x0C0D //RX_FDEQ_BIN_7 +228 0x0E0F //RX_FDEQ_BIN_8 +229 0x1011 //RX_FDEQ_BIN_9 +230 0x1214 //RX_FDEQ_BIN_10 +231 0x1618 //RX_FDEQ_BIN_11 +232 0x1C1C //RX_FDEQ_BIN_12 +233 0x2020 //RX_FDEQ_BIN_13 +234 0x2020 //RX_FDEQ_BIN_14 +235 0x2011 //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x4000 //RX_FDEQ_RESRV_0 +245 0x0320 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0030 //RX_FDDRC_BAND_MARGIN_1 +248 0x0050 //RX_FDDRC_BAND_MARGIN_2 +249 0x0080 //RX_FDDRC_BAND_MARGIN_3 +250 0x0007 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x5000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x6400 //RX_FDDRC_THRD_3_2 +258 0x6400 //RX_FDDRC_THRD_3_3 +259 0x2000 //RX_FDDRC_SLANT_0_0 +260 0x2000 //RX_FDDRC_SLANT_0_1 +261 0x2000 //RX_FDDRC_SLANT_0_2 +262 0x2000 //RX_FDDRC_SLANT_0_3 +263 0x5333 //RX_FDDRC_SLANT_1_0 +264 0x5333 //RX_FDDRC_SLANT_1_1 +265 0x5333 //RX_FDDRC_SLANT_1_2 +266 0x5333 //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +286 0x0100 //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 +#VOL 3 +163 0x1000 //RX_TDDRC_ALPHA_UP_1 +164 0x1000 //RX_TDDRC_ALPHA_UP_2 +165 0x1000 //RX_TDDRC_ALPHA_UP_3 +166 0x1000 //RX_TDDRC_ALPHA_UP_4 +184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +190 0x7FFF //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +269 0x0000 //RX_TDDRC_THRD_0 +270 0x0000 //RX_TDDRC_THRD_1 +271 0x7FFF //RX_TDDRC_THRD_2 +272 0x7FFF //RX_TDDRC_THRD_3 +273 0x7FFF //RX_TDDRC_SLANT_0 +274 0x7FFF //RX_TDDRC_SLANT_1 +275 0x1000 //RX_TDDRC_ALPHA_UP_0 +276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x199A //RX_TDDRC_HMNC_GAIN +279 0x0001 //RX_TDDRC_SMT_FLAG +280 0x0CCD //RX_TDDRC_SMT_W +281 0x0155 //RX_TDDRC_DRC_GAIN +195 0x0020 //RX_FDEQ_SUBNUM +196 0x4848 //RX_FDEQ_GAIN_0 +197 0x4848 //RX_FDEQ_GAIN_1 +198 0x4848 //RX_FDEQ_GAIN_2 +199 0x4848 //RX_FDEQ_GAIN_3 +200 0x4848 //RX_FDEQ_GAIN_4 +201 0x4848 //RX_FDEQ_GAIN_5 +202 0x4848 //RX_FDEQ_GAIN_6 +203 0x4848 //RX_FDEQ_GAIN_7 +204 0x4848 //RX_FDEQ_GAIN_8 +205 0x4848 //RX_FDEQ_GAIN_9 +206 0x4848 //RX_FDEQ_GAIN_10 +207 0x4848 //RX_FDEQ_GAIN_11 +208 0x4848 //RX_FDEQ_GAIN_12 +209 0x4848 //RX_FDEQ_GAIN_13 +210 0x4848 //RX_FDEQ_GAIN_14 +211 0x4848 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0202 //RX_FDEQ_BIN_0 +221 0x0203 //RX_FDEQ_BIN_1 +222 0x0304 //RX_FDEQ_BIN_2 +223 0x0405 //RX_FDEQ_BIN_3 +224 0x0607 //RX_FDEQ_BIN_4 +225 0x0809 //RX_FDEQ_BIN_5 +226 0x0A0B //RX_FDEQ_BIN_6 +227 0x0C0D //RX_FDEQ_BIN_7 +228 0x0E0F //RX_FDEQ_BIN_8 +229 0x1011 //RX_FDEQ_BIN_9 +230 0x1214 //RX_FDEQ_BIN_10 +231 0x1618 //RX_FDEQ_BIN_11 +232 0x1C1C //RX_FDEQ_BIN_12 +233 0x2020 //RX_FDEQ_BIN_13 +234 0x2020 //RX_FDEQ_BIN_14 +235 0x2011 //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x4000 //RX_FDEQ_RESRV_0 +245 0x0320 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0030 //RX_FDDRC_BAND_MARGIN_1 +248 0x0050 //RX_FDDRC_BAND_MARGIN_2 +249 0x0080 //RX_FDDRC_BAND_MARGIN_3 +250 0x0007 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x5000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x6400 //RX_FDDRC_THRD_3_2 +258 0x6400 //RX_FDDRC_THRD_3_3 +259 0x2000 //RX_FDDRC_SLANT_0_0 +260 0x2000 //RX_FDDRC_SLANT_0_1 +261 0x2000 //RX_FDDRC_SLANT_0_2 +262 0x2000 //RX_FDDRC_SLANT_0_3 +263 0x5333 //RX_FDDRC_SLANT_1_0 +264 0x5333 //RX_FDDRC_SLANT_1_1 +265 0x5333 //RX_FDDRC_SLANT_1_2 +266 0x5333 //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +286 0x0100 //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 +#VOL 4 +163 0x1000 //RX_TDDRC_ALPHA_UP_1 +164 0x1000 //RX_TDDRC_ALPHA_UP_2 +165 0x1000 //RX_TDDRC_ALPHA_UP_3 +166 0x1000 //RX_TDDRC_ALPHA_UP_4 +184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +190 0x7FFF //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +269 0x0000 //RX_TDDRC_THRD_0 +270 0x0000 //RX_TDDRC_THRD_1 +271 0x7FFF //RX_TDDRC_THRD_2 +272 0x7FFF //RX_TDDRC_THRD_3 +273 0x7FFF //RX_TDDRC_SLANT_0 +274 0x7FFF //RX_TDDRC_SLANT_1 +275 0x1000 //RX_TDDRC_ALPHA_UP_0 +276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x199A //RX_TDDRC_HMNC_GAIN +279 0x0001 //RX_TDDRC_SMT_FLAG +280 0x0CCD //RX_TDDRC_SMT_W +281 0x0155 //RX_TDDRC_DRC_GAIN +195 0x0020 //RX_FDEQ_SUBNUM +196 0x4848 //RX_FDEQ_GAIN_0 +197 0x4848 //RX_FDEQ_GAIN_1 +198 0x4848 //RX_FDEQ_GAIN_2 +199 0x4848 //RX_FDEQ_GAIN_3 +200 0x4848 //RX_FDEQ_GAIN_4 +201 0x4848 //RX_FDEQ_GAIN_5 +202 0x4848 //RX_FDEQ_GAIN_6 +203 0x4848 //RX_FDEQ_GAIN_7 +204 0x4848 //RX_FDEQ_GAIN_8 +205 0x4848 //RX_FDEQ_GAIN_9 +206 0x4848 //RX_FDEQ_GAIN_10 +207 0x4848 //RX_FDEQ_GAIN_11 +208 0x4848 //RX_FDEQ_GAIN_12 +209 0x4848 //RX_FDEQ_GAIN_13 +210 0x4848 //RX_FDEQ_GAIN_14 +211 0x4848 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0202 //RX_FDEQ_BIN_0 +221 0x0203 //RX_FDEQ_BIN_1 +222 0x0304 //RX_FDEQ_BIN_2 +223 0x0405 //RX_FDEQ_BIN_3 +224 0x0607 //RX_FDEQ_BIN_4 +225 0x0809 //RX_FDEQ_BIN_5 +226 0x0A0B //RX_FDEQ_BIN_6 +227 0x0C0D //RX_FDEQ_BIN_7 +228 0x0E0F //RX_FDEQ_BIN_8 +229 0x1011 //RX_FDEQ_BIN_9 +230 0x1214 //RX_FDEQ_BIN_10 +231 0x1618 //RX_FDEQ_BIN_11 +232 0x1C1C //RX_FDEQ_BIN_12 +233 0x2020 //RX_FDEQ_BIN_13 +234 0x2020 //RX_FDEQ_BIN_14 +235 0x2011 //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x4000 //RX_FDEQ_RESRV_0 +245 0x0320 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0030 //RX_FDDRC_BAND_MARGIN_1 +248 0x0050 //RX_FDDRC_BAND_MARGIN_2 +249 0x0080 //RX_FDDRC_BAND_MARGIN_3 +250 0x0007 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x5000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x6400 //RX_FDDRC_THRD_3_2 +258 0x6400 //RX_FDDRC_THRD_3_3 +259 0x2000 //RX_FDDRC_SLANT_0_0 +260 0x2000 //RX_FDDRC_SLANT_0_1 +261 0x2000 //RX_FDDRC_SLANT_0_2 +262 0x2000 //RX_FDDRC_SLANT_0_3 +263 0x5333 //RX_FDDRC_SLANT_1_0 +264 0x5333 //RX_FDDRC_SLANT_1_1 +265 0x5333 //RX_FDDRC_SLANT_1_2 +266 0x5333 //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +286 0x0100 //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 +#VOL 5 +163 0x1000 //RX_TDDRC_ALPHA_UP_1 +164 0x1000 //RX_TDDRC_ALPHA_UP_2 +165 0x1000 //RX_TDDRC_ALPHA_UP_3 +166 0x1000 //RX_TDDRC_ALPHA_UP_4 +184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +190 0x7FFF //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +269 0x0000 //RX_TDDRC_THRD_0 +270 0x0000 //RX_TDDRC_THRD_1 +271 0x7FFF //RX_TDDRC_THRD_2 +272 0x7FFF //RX_TDDRC_THRD_3 +273 0x7FFF //RX_TDDRC_SLANT_0 +274 0x7FFF //RX_TDDRC_SLANT_1 +275 0x1000 //RX_TDDRC_ALPHA_UP_0 +276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x199A //RX_TDDRC_HMNC_GAIN +279 0x0001 //RX_TDDRC_SMT_FLAG +280 0x0CCD //RX_TDDRC_SMT_W +281 0x0155 //RX_TDDRC_DRC_GAIN +195 0x0020 //RX_FDEQ_SUBNUM +196 0x4848 //RX_FDEQ_GAIN_0 +197 0x4848 //RX_FDEQ_GAIN_1 +198 0x4848 //RX_FDEQ_GAIN_2 +199 0x4848 //RX_FDEQ_GAIN_3 +200 0x4848 //RX_FDEQ_GAIN_4 +201 0x4848 //RX_FDEQ_GAIN_5 +202 0x4848 //RX_FDEQ_GAIN_6 +203 0x4848 //RX_FDEQ_GAIN_7 +204 0x4848 //RX_FDEQ_GAIN_8 +205 0x4848 //RX_FDEQ_GAIN_9 +206 0x4848 //RX_FDEQ_GAIN_10 +207 0x4848 //RX_FDEQ_GAIN_11 +208 0x4848 //RX_FDEQ_GAIN_12 +209 0x4848 //RX_FDEQ_GAIN_13 +210 0x4848 //RX_FDEQ_GAIN_14 +211 0x4848 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0202 //RX_FDEQ_BIN_0 +221 0x0203 //RX_FDEQ_BIN_1 +222 0x0304 //RX_FDEQ_BIN_2 +223 0x0405 //RX_FDEQ_BIN_3 +224 0x0607 //RX_FDEQ_BIN_4 +225 0x0809 //RX_FDEQ_BIN_5 +226 0x0A0B //RX_FDEQ_BIN_6 +227 0x0C0D //RX_FDEQ_BIN_7 +228 0x0E0F //RX_FDEQ_BIN_8 +229 0x1011 //RX_FDEQ_BIN_9 +230 0x1214 //RX_FDEQ_BIN_10 +231 0x1618 //RX_FDEQ_BIN_11 +232 0x1C1C //RX_FDEQ_BIN_12 +233 0x2020 //RX_FDEQ_BIN_13 +234 0x2020 //RX_FDEQ_BIN_14 +235 0x2011 //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x4000 //RX_FDEQ_RESRV_0 +245 0x0320 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0030 //RX_FDDRC_BAND_MARGIN_1 +248 0x0050 //RX_FDDRC_BAND_MARGIN_2 +249 0x0080 //RX_FDDRC_BAND_MARGIN_3 +250 0x0007 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x5000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x6400 //RX_FDDRC_THRD_3_2 +258 0x6400 //RX_FDDRC_THRD_3_3 +259 0x2000 //RX_FDDRC_SLANT_0_0 +260 0x2000 //RX_FDDRC_SLANT_0_1 +261 0x2000 //RX_FDDRC_SLANT_0_2 +262 0x2000 //RX_FDDRC_SLANT_0_3 +263 0x5333 //RX_FDDRC_SLANT_1_0 +264 0x5333 //RX_FDDRC_SLANT_1_1 +265 0x5333 //RX_FDDRC_SLANT_1_2 +266 0x5333 //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +286 0x0100 //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 +#VOL 6 +163 0x1000 //RX_TDDRC_ALPHA_UP_1 +164 0x1000 //RX_TDDRC_ALPHA_UP_2 +165 0x1000 //RX_TDDRC_ALPHA_UP_3 +166 0x1000 //RX_TDDRC_ALPHA_UP_4 +184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +190 0x7FFF //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +269 0x0000 //RX_TDDRC_THRD_0 +270 0x0000 //RX_TDDRC_THRD_1 +271 0x7FFF //RX_TDDRC_THRD_2 +272 0x7FFF //RX_TDDRC_THRD_3 +273 0x7FFF //RX_TDDRC_SLANT_0 +274 0x7FFF //RX_TDDRC_SLANT_1 +275 0x1000 //RX_TDDRC_ALPHA_UP_0 +276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x199A //RX_TDDRC_HMNC_GAIN +279 0x0001 //RX_TDDRC_SMT_FLAG +280 0x0CCD //RX_TDDRC_SMT_W +281 0x0155 //RX_TDDRC_DRC_GAIN +195 0x0020 //RX_FDEQ_SUBNUM +196 0x4848 //RX_FDEQ_GAIN_0 +197 0x4848 //RX_FDEQ_GAIN_1 +198 0x4848 //RX_FDEQ_GAIN_2 +199 0x4848 //RX_FDEQ_GAIN_3 +200 0x4848 //RX_FDEQ_GAIN_4 +201 0x4848 //RX_FDEQ_GAIN_5 +202 0x4848 //RX_FDEQ_GAIN_6 +203 0x4848 //RX_FDEQ_GAIN_7 +204 0x4848 //RX_FDEQ_GAIN_8 +205 0x4848 //RX_FDEQ_GAIN_9 +206 0x4848 //RX_FDEQ_GAIN_10 +207 0x4848 //RX_FDEQ_GAIN_11 +208 0x4848 //RX_FDEQ_GAIN_12 +209 0x4848 //RX_FDEQ_GAIN_13 +210 0x4848 //RX_FDEQ_GAIN_14 +211 0x4848 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0202 //RX_FDEQ_BIN_0 +221 0x0203 //RX_FDEQ_BIN_1 +222 0x0304 //RX_FDEQ_BIN_2 +223 0x0405 //RX_FDEQ_BIN_3 +224 0x0607 //RX_FDEQ_BIN_4 +225 0x0809 //RX_FDEQ_BIN_5 +226 0x0A0B //RX_FDEQ_BIN_6 +227 0x0C0D //RX_FDEQ_BIN_7 +228 0x0E0F //RX_FDEQ_BIN_8 +229 0x1011 //RX_FDEQ_BIN_9 +230 0x1214 //RX_FDEQ_BIN_10 +231 0x1618 //RX_FDEQ_BIN_11 +232 0x1C1C //RX_FDEQ_BIN_12 +233 0x2020 //RX_FDEQ_BIN_13 +234 0x2020 //RX_FDEQ_BIN_14 +235 0x2011 //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x4000 //RX_FDEQ_RESRV_0 +245 0x0320 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0030 //RX_FDDRC_BAND_MARGIN_1 +248 0x0050 //RX_FDDRC_BAND_MARGIN_2 +249 0x0080 //RX_FDDRC_BAND_MARGIN_3 +250 0x0007 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x5000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x6400 //RX_FDDRC_THRD_3_2 +258 0x6400 //RX_FDDRC_THRD_3_3 +259 0x2000 //RX_FDDRC_SLANT_0_0 +260 0x2000 //RX_FDDRC_SLANT_0_1 +261 0x2000 //RX_FDDRC_SLANT_0_2 +262 0x2000 //RX_FDDRC_SLANT_0_3 +263 0x5333 //RX_FDDRC_SLANT_1_0 +264 0x5333 //RX_FDDRC_SLANT_1_1 +265 0x5333 //RX_FDDRC_SLANT_1_2 +266 0x5333 //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +286 0x0100 //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 #CASE_NAME BLUETOOTH-BTWB_NREC-VOICE_GENERIC-NB -#PARAM_TYPE TX+RX -#TOTAL_CUSTOM_STEP 7 +#PARAM_MODE Full +#PARAM_TYPE TX+2RX +#TOTAL_CUSTOM_STEP 7+7 #TX 0 0x0008 //TX_OPERATION_MODE_0 1 0x0008 //TX_OPERATION_MODE_1 @@ -30059,20 +45649,20 @@ 248 0xF400 //TX_THR_SN_EST_6 249 0xF600 //TX_THR_SN_EST_7 250 0x0000 //TX_DELTA_THR_SN_EST_0 -251 0x0000 //TX_DELTA_THR_SN_EST_1 +251 0x0200 //TX_DELTA_THR_SN_EST_1 252 0x0200 //TX_DELTA_THR_SN_EST_2 253 0x0200 //TX_DELTA_THR_SN_EST_3 254 0x0200 //TX_DELTA_THR_SN_EST_4 255 0x0200 //TX_DELTA_THR_SN_EST_5 -256 0x0200 //TX_DELTA_THR_SN_EST_6 +256 0x0000 //TX_DELTA_THR_SN_EST_6 257 0x0200 //TX_DELTA_THR_SN_EST_7 258 0x6000 //TX_LAMBDA_NN_EST_0 -259 0x6000 //TX_LAMBDA_NN_EST_1 +259 0x4000 //TX_LAMBDA_NN_EST_1 260 0x4000 //TX_LAMBDA_NN_EST_2 261 0x4000 //TX_LAMBDA_NN_EST_3 262 0x4000 //TX_LAMBDA_NN_EST_4 263 0x4000 //TX_LAMBDA_NN_EST_5 -264 0x4000 //TX_LAMBDA_NN_EST_6 +264 0x6000 //TX_LAMBDA_NN_EST_6 265 0x4000 //TX_LAMBDA_NN_EST_7 266 0x0400 //TX_N_SN_EST 267 0x001E //TX_INBEAM_T @@ -30090,16 +45680,16 @@ 279 0x1000 //TX_B_POST_FLT_0 280 0x1000 //TX_B_POST_FLT_1 281 0x000F //TX_NS_LVL_CTRL_0 -282 0x000F //TX_NS_LVL_CTRL_1 -283 0x0011 //TX_NS_LVL_CTRL_2 +282 0x0011 //TX_NS_LVL_CTRL_1 +283 0x000F //TX_NS_LVL_CTRL_2 284 0x000F //TX_NS_LVL_CTRL_3 285 0x000F //TX_NS_LVL_CTRL_4 286 0x000F //TX_NS_LVL_CTRL_5 287 0x000F //TX_NS_LVL_CTRL_6 288 0x0011 //TX_NS_LVL_CTRL_7 289 0x000C //TX_MIN_GAIN_S_0 -290 0x000C //TX_MIN_GAIN_S_1 -291 0x000F //TX_MIN_GAIN_S_2 +290 0x000F //TX_MIN_GAIN_S_1 +291 0x000C //TX_MIN_GAIN_S_2 292 0x000C //TX_MIN_GAIN_S_3 293 0x000C //TX_MIN_GAIN_S_4 294 0x000C //TX_MIN_GAIN_S_5 @@ -30123,12 +45713,12 @@ 312 0x7FFF //TX_A_POST_FILT_0 313 0x2000 //TX_A_POST_FILT_1 314 0x4000 //TX_A_POST_FILT_S_0 -315 0x4000 //TX_A_POST_FILT_S_1 +315 0x5000 //TX_A_POST_FILT_S_1 316 0x5000 //TX_A_POST_FILT_S_2 317 0x5000 //TX_A_POST_FILT_S_3 318 0x5000 //TX_A_POST_FILT_S_4 319 0x5000 //TX_A_POST_FILT_S_5 -320 0x5000 //TX_A_POST_FILT_S_6 +320 0x4000 //TX_A_POST_FILT_S_6 321 0x5000 //TX_A_POST_FILT_S_7 322 0x1000 //TX_B_POST_FILT_0 323 0x1000 //TX_B_POST_FILT_1 @@ -30188,10 +45778,10 @@ 377 0x7FFF //TX_NOISE_TH_5_4 378 0x044C //TX_NOISE_TH_6 379 0x0014 //TX_MINENOISE_TH -380 0x4000 //TX_MINENOISE_MIC0_TH_MTS -381 0xFFEE //TX_MINENOISE_MIC0_TH_EXP -382 0x6000 //TX_MINENOISE_MIC0_S_TH_MTS -383 0xFFF3 //TX_MINENOISE_MIC0_S_TH_EXP +380 0x4000 //TX_MORENS_TFMASK_TH +381 0xFFEE //TX_DRC_QUIET_FLOOR +382 0x6000 //TX_RATIODTL_CUT_TH +383 0xFFF3 //TX_DT_CUT_K1 384 0x0666 //TX_OUT_ENER_S_TH_CLEAN 385 0x0666 //TX_OUT_ENER_S_TH_LESSCLEAN 386 0x0333 //TX_OUT_ENER_S_TH_NOISY @@ -30199,15 +45789,15 @@ 388 0x0333 //TX_OUT_ENER_TH_SPEECH 389 0x2000 //TX_SN_NPB_GAIN 390 0x0000 //TX_NN_NPB_GAIN -391 0x0000 //TX_CSX_ALPHA_0 -392 0x0000 //TX_CSX_ALPHA_1 -393 0x0000 //TX_CSX_ALPHA_2 -394 0x0000 //TX_CSX_ALPHA_3 -395 0x0800 //TX_MU_ARSP_EST -396 0x00C8 //TX_P_OUTBEAM_MIN_TH +391 0x0000 //TX_POST_MASK_SUP_HSNE +392 0x0000 //TX_TAIL_DET_TH +393 0x0000 //TX_B_LESSCUT_RTO_WTA +394 0x0000 //TX_MEL_G_R +395 0x0800 //TX_SUPHIGH_TH +396 0x00C8 //TX_MASK_G_R 397 0x0002 //TX_EXTRA_NS_L -398 0x0800 //TX_EXTRA_NS_A -399 0x0005 //TX_VR_NOISE_FLOOR_TH +398 0x0800 //TX_C_POST_FLT_MASK +399 0x0005 //TX_A_POST_FLT_WNS 400 0x0148 //TX_MIN_G_LOW300HZ 401 0x0002 //TX_MAXLEVEL_CNG 402 0x00B4 //TX_STN_NOISE_TH @@ -30322,16 +45912,16 @@ 511 0x6666 //TX_MIC_TO_BFGAIN 512 0x0000 //TX_MICTOBFGAIN0 513 0x0000 //TX_FASTMUE_TH -514 0x0000 //TX_DERVB_LEN_0 -515 0x0000 //TX_DERVB_LEN_1 -516 0x0000 //TX_RHO_DERVB -517 0x0000 //TX_MIC_INDX_DERVB -518 0x0000 //TX_MU_DERVB -519 0x0000 //TX_DR_RESRV_0 -520 0x0000 //TX_DR_RESRV_1 -521 0x0000 //TX_DR_RESRV_2 -522 0x0000 //TX_DR_RESRV_3 -523 0x0000 //TX_DR_RESRV_4 +514 0x0000 //TX_DEREVERB_LF_MU +515 0x0000 //TX_DEREVERB_HF_MU +516 0x0000 //TX_DEREVERB_DELAY +517 0x0000 //TX_DEREVERB_COEF_LEN +518 0x0000 //TX_DEREVERB_DNR +519 0x0000 //TX_DEREVERB_ALPHA +520 0x0000 //TX_DEREVERB_BETA +521 0x0000 //TX_GSC_RTOL_TH +522 0x0000 //TX_GSC_RTOH_TH +523 0x0000 //TX_WIDE2_MEANHTH 524 0x0000 //TX_DR_RESRV_5 525 0x0000 //TX_DR_RESRV_6 526 0x0000 //TX_DR_RESRV_7 @@ -30705,8 +46295,73 @@ 894 0xC000 //TX_FASTNS_SSA_THHFL 895 0xCCCC //TX_FASTNS_SSA_THLFH 896 0xD999 //TX_FASTNS_SSA_THHFH +897 0x0000 //TX_SENDFUNC_REG_MICMUTE +898 0x0000 //TX_SENDFUNC_REG_MICMUTE1 +899 0x0000 //TX_MICMUTE_RATIO_THR +900 0x0000 //TX_MICMUTE_AMP_THR +901 0x0000 //TX_MICMUTE_HPF_IND +902 0x0000 //TX_MICMUTE_LOG_EYR_TH +903 0x0000 //TX_MICMUTE_CVG_TIME +904 0x0000 //TX_MICMUTE_RELEASE_TIME +905 0x0000 //TX_MIC_VOLUME_MIC0MUTE +906 0x0000 //TX_MICMUTE_EPD_OFFSET_0 +907 0x0000 //TX_MICMUTE_FRQ_AEC_L +908 0x0000 //TX_MICMUTE_EAD_THR +909 0x0000 //TX_MICMUTE_LAMBDA_CB_NLE +910 0x0000 //TX_MICMUTE_LAMBDA_RE_EST +911 0x0000 //TX_DTD_THR1_MICMUTE_0 +912 0x0000 //TX_DTD_THR1_MICMUTE_1 +913 0x0000 //TX_DTD_THR1_MICMUTE_2 +914 0x0000 //TX_DTD_THR1_MICMUTE_3 +915 0x0000 //TX_DTD_THR2_MICMUTE_0 +916 0x0000 //TX_MICMUTE_MIN_EQ_RE_EST_0 +917 0x0000 //TX_MICMUTE_MIN_EQ_RE_EST_1 +918 0x0000 //TX_MICMUTE_MIN_EQ_RE_EST_2 +919 0x0000 //TX_MICMUTE_MIN_EQ_RE_EST_3 +920 0x0000 //TX_MICMUTE_MIN_EQ_RE_EST_4 +921 0x0000 //TX_MICMUTE_C_POST_FLT +922 0x0000 //TX_MICMUTE_DT_CUT_K +923 0x0000 //TX_MICMUTE_DT_CUT_THR +924 0x0000 //TX_MICMUTE_DT_CUT_K2 +925 0x0000 //TX_MICMUTE_DT_CUT_THR2 +926 0x0000 //TX_MICMUTE_DT2_HOLD_N +927 0x0000 //TX_MICMUTE_RATIODTH_THCUT +928 0x0000 //TX_MICMUTE_B_POST_FLT_ECHOL +929 0x0000 //TX_MICMUTE_B_POST_FLT_ECHOH +930 0x0000 //TX_MICMUTE_C_POST_FLT_MASK +931 0x0000 //TX_MICMUTE_RATIODTL_CUT_TH +932 0x0000 //TX_MICMUTE_DT_CUT_K1 +933 0x0000 //TX_MICMUTE_N2_SN_EST +934 0x0000 //TX_MICMUTE_THR_SN_EST_0 +935 0x0000 //TX_MICMUTE_MIN_G_CTRL_0 +936 0x0000 //TX_MICMUTE_A_POST_FILT_S_0 +937 0x0000 //TX_MICMUTE_B_POST_FILT_0 +938 0x0000 //TX_MIC1RUB_AMP_THR +939 0x0000 //TX_MIC1MUTE_RATIO_THR +940 0x0000 //TX_MIC1MUTE_AMP_THR +941 0x0000 //TX_MIC1MUTE_CVG_TIME +942 0x0000 //TX_MIC1MUTE_RELEASE_TIME +943 0x0000 //TX_AMS_RESRV_01 +944 0x0000 //TX_AMS_RESRV_02 +945 0x0000 //TX_AMS_RESRV_03 +946 0x0000 //TX_AMS_RESRV_04 +947 0x0000 //TX_AMS_RESRV_05 +948 0x0000 //TX_AMS_RESRV_06 +949 0x0000 //TX_AMS_RESRV_07 +950 0x0000 //TX_AMS_RESRV_08 +951 0x0000 //TX_AMS_RESRV_09 +952 0x0000 //TX_AMS_RESRV_10 +953 0x0000 //TX_AMS_RESRV_11 +954 0x0000 //TX_AMS_RESRV_12 +955 0x0000 //TX_AMS_RESRV_13 +956 0x0000 //TX_AMS_RESRV_14 +957 0x0000 //TX_AMS_RESRV_15 +958 0x0000 //TX_AMS_RESRV_16 +959 0x0000 //TX_AMS_RESRV_17 +960 0x0000 //TX_AMS_RESRV_18 +961 0x0000 //TX_AMS_RESRV_19 #RX -0 0x006C //RX_RECVFUNC_MODE_0 +0 0x206C //RX_RECVFUNC_MODE_0 1 0x0000 //RX_RECVFUNC_MODE_1 2 0x0000 //RX_SAMPLINGFREQ_SIG 3 0x0000 //RX_SAMPLINGFREQ_PROC @@ -31556,10 +47211,862 @@ 110 0x0000 //RX_FDDRC_RESRV_0 129 0x0100 //RX_SPK_VOL 130 0x0000 //RX_VOL_RESRV_0 +#RX 2 +157 0x206C //RX_RECVFUNC_MODE_0 +158 0x0000 //RX_RECVFUNC_MODE_1 +159 0x0000 //RX_SAMPLINGFREQ_SIG +160 0x0000 //RX_SAMPLINGFREQ_PROC +161 0x000A //RX_FRAME_SZ +162 0x0000 //RX_DELAY_OPT +163 0x3000 //RX_TDDRC_ALPHA_UP_1 +164 0x3000 //RX_TDDRC_ALPHA_UP_2 +165 0x3000 //RX_TDDRC_ALPHA_UP_3 +166 0x3000 //RX_TDDRC_ALPHA_UP_4 +167 0x0800 //RX_PGA +168 0x7FFF //RX_A_HP +169 0x0000 //RX_B_PE +170 0x3800 //RX_THR_PITCH_DET_0 +171 0x3000 //RX_THR_PITCH_DET_1 +172 0x2800 //RX_THR_PITCH_DET_2 +173 0x0008 //RX_PITCH_BFR_LEN +174 0x0003 //RX_SBD_PITCH_DET +175 0x0100 //RX_PP_RESRV_0 +176 0x0020 //RX_PP_RESRV_1 +177 0x0600 //RX_N_SN_EST +178 0x000C //RX_N2_SN_EST +179 0x0010 //RX_NS_LVL_CTRL +180 0xF800 //RX_THR_SN_EST +181 0x7CCD //RX_LAMBDA_PFILT +182 0x000A //RX_FENS_RESRV_0 +183 0x0190 //RX_FENS_RESRV_1 +184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +187 0x0002 //RX_EXTRA_NS_L +188 0x0800 //RX_EXTRA_NS_A +189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +190 0x7FFF //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +192 0x199A //RX_A_POST_FLT +193 0x0000 //RX_LMT_THRD +194 0x4000 //RX_LMT_ALPHA +195 0x0014 //RX_FDEQ_SUBNUM +196 0x4848 //RX_FDEQ_GAIN_0 +197 0x4848 //RX_FDEQ_GAIN_1 +198 0x4848 //RX_FDEQ_GAIN_2 +199 0x4848 //RX_FDEQ_GAIN_3 +200 0x4848 //RX_FDEQ_GAIN_4 +201 0x4848 //RX_FDEQ_GAIN_5 +202 0x4444 //RX_FDEQ_GAIN_6 +203 0x4040 //RX_FDEQ_GAIN_7 +204 0x4040 //RX_FDEQ_GAIN_8 +205 0x4040 //RX_FDEQ_GAIN_9 +206 0x4848 //RX_FDEQ_GAIN_10 +207 0x4848 //RX_FDEQ_GAIN_11 +208 0x4848 //RX_FDEQ_GAIN_12 +209 0x4848 //RX_FDEQ_GAIN_13 +210 0x4848 //RX_FDEQ_GAIN_14 +211 0x4848 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0202 //RX_FDEQ_BIN_0 +221 0x0203 //RX_FDEQ_BIN_1 +222 0x0303 //RX_FDEQ_BIN_2 +223 0x0304 //RX_FDEQ_BIN_3 +224 0x0405 //RX_FDEQ_BIN_4 +225 0x0506 //RX_FDEQ_BIN_5 +226 0x0708 //RX_FDEQ_BIN_6 +227 0x090A //RX_FDEQ_BIN_7 +228 0x0B0C //RX_FDEQ_BIN_8 +229 0x0D0E //RX_FDEQ_BIN_9 +230 0x0000 //RX_FDEQ_BIN_10 +231 0x0000 //RX_FDEQ_BIN_11 +232 0x0000 //RX_FDEQ_BIN_12 +233 0x0000 //RX_FDEQ_BIN_13 +234 0x0000 //RX_FDEQ_BIN_14 +235 0x0000 //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x4000 //RX_FDEQ_RESRV_0 +245 0x0320 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0030 //RX_FDDRC_BAND_MARGIN_1 +248 0x0050 //RX_FDDRC_BAND_MARGIN_2 +249 0x0080 //RX_FDDRC_BAND_MARGIN_3 +250 0x0007 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x5000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x6400 //RX_FDDRC_THRD_3_2 +258 0x6400 //RX_FDDRC_THRD_3_3 +259 0x2000 //RX_FDDRC_SLANT_0_0 +260 0x2000 //RX_FDDRC_SLANT_0_1 +261 0x2000 //RX_FDDRC_SLANT_0_2 +262 0x2000 //RX_FDDRC_SLANT_0_3 +263 0x5333 //RX_FDDRC_SLANT_1_0 +264 0x5333 //RX_FDDRC_SLANT_1_1 +265 0x5333 //RX_FDDRC_SLANT_1_2 +266 0x5333 //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +268 0x0000 //RX_FILTINDX +269 0x0000 //RX_TDDRC_THRD_0 +270 0x0000 //RX_TDDRC_THRD_1 +271 0x7FFF //RX_TDDRC_THRD_2 +272 0x7FFF //RX_TDDRC_THRD_3 +273 0x7FFF //RX_TDDRC_SLANT_0 +274 0x7EB8 //RX_TDDRC_SLANT_1 +275 0x3000 //RX_TDDRC_ALPHA_UP_0 +276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x199A //RX_TDDRC_HMNC_GAIN +279 0x0001 //RX_TDDRC_SMT_FLAG +280 0x0CCD //RX_TDDRC_SMT_W +281 0x017F //RX_TDDRC_DRC_GAIN +282 0x7C00 //RX_LAMBDA_PKA_FP +283 0x2000 //RX_TPKA_FP +284 0x2000 //RX_MIN_G_FP +285 0x0080 //RX_MAX_G_FP +286 0x0100 //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 +288 0x0000 //RX_MAXLEVEL_CNG +289 0x3000 //RX_BWE_UV_TH +290 0x3000 //RX_BWE_UV_TH2 +291 0x1800 //RX_BWE_UV_TH3 +292 0x1000 //RX_BWE_V_TH +293 0x04CD //RX_BWE_GAIN1_V_TH1 +294 0x0F33 //RX_BWE_GAIN1_V_TH2 +295 0x7333 //RX_BWE_UV_EQ +296 0x199A //RX_BWE_V_EQ +297 0x7333 //RX_BWE_TONE_TH +298 0x0004 //RX_BWE_UV_HOLD_T +299 0x6CCD //RX_BWE_GAIN2_ALPHA +300 0x799A //RX_BWE_GAIN3_ALPHA +301 0x001E //RX_BWE_CUTOFF +302 0x3000 //RX_BWE_GAINFILL +303 0x3200 //RX_BWE_MAXTH_TONE +304 0x2000 //RX_BWE_EQ_0 +305 0x2000 //RX_BWE_EQ_1 +306 0x2000 //RX_BWE_EQ_2 +307 0x2000 //RX_BWE_EQ_3 +308 0x2000 //RX_BWE_EQ_4 +309 0x2000 //RX_BWE_EQ_5 +310 0x2000 //RX_BWE_EQ_6 +311 0x0000 //RX_BWE_RESRV_0 +312 0x0000 //RX_BWE_RESRV_1 +313 0x0000 //RX_BWE_RESRV_2 +#VOL 0 +163 0x3000 //RX_TDDRC_ALPHA_UP_1 +164 0x3000 //RX_TDDRC_ALPHA_UP_2 +165 0x3000 //RX_TDDRC_ALPHA_UP_3 +166 0x3000 //RX_TDDRC_ALPHA_UP_4 +184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +190 0x7FFF //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +269 0x0000 //RX_TDDRC_THRD_0 +270 0x0000 //RX_TDDRC_THRD_1 +271 0x7FFF //RX_TDDRC_THRD_2 +272 0x7FFF //RX_TDDRC_THRD_3 +273 0x7FFF //RX_TDDRC_SLANT_0 +274 0x7EB8 //RX_TDDRC_SLANT_1 +275 0x3000 //RX_TDDRC_ALPHA_UP_0 +276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x199A //RX_TDDRC_HMNC_GAIN +279 0x0001 //RX_TDDRC_SMT_FLAG +280 0x0CCD //RX_TDDRC_SMT_W +281 0x017F //RX_TDDRC_DRC_GAIN +195 0x0014 //RX_FDEQ_SUBNUM +196 0x4848 //RX_FDEQ_GAIN_0 +197 0x4848 //RX_FDEQ_GAIN_1 +198 0x4848 //RX_FDEQ_GAIN_2 +199 0x4848 //RX_FDEQ_GAIN_3 +200 0x4848 //RX_FDEQ_GAIN_4 +201 0x4848 //RX_FDEQ_GAIN_5 +202 0x4444 //RX_FDEQ_GAIN_6 +203 0x4040 //RX_FDEQ_GAIN_7 +204 0x4040 //RX_FDEQ_GAIN_8 +205 0x4040 //RX_FDEQ_GAIN_9 +206 0x4848 //RX_FDEQ_GAIN_10 +207 0x4848 //RX_FDEQ_GAIN_11 +208 0x4848 //RX_FDEQ_GAIN_12 +209 0x4848 //RX_FDEQ_GAIN_13 +210 0x4848 //RX_FDEQ_GAIN_14 +211 0x4848 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0202 //RX_FDEQ_BIN_0 +221 0x0203 //RX_FDEQ_BIN_1 +222 0x0303 //RX_FDEQ_BIN_2 +223 0x0304 //RX_FDEQ_BIN_3 +224 0x0405 //RX_FDEQ_BIN_4 +225 0x0506 //RX_FDEQ_BIN_5 +226 0x0708 //RX_FDEQ_BIN_6 +227 0x090A //RX_FDEQ_BIN_7 +228 0x0B0C //RX_FDEQ_BIN_8 +229 0x0D0E //RX_FDEQ_BIN_9 +230 0x0000 //RX_FDEQ_BIN_10 +231 0x0000 //RX_FDEQ_BIN_11 +232 0x0000 //RX_FDEQ_BIN_12 +233 0x0000 //RX_FDEQ_BIN_13 +234 0x0000 //RX_FDEQ_BIN_14 +235 0x0000 //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x4000 //RX_FDEQ_RESRV_0 +245 0x0320 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0030 //RX_FDDRC_BAND_MARGIN_1 +248 0x0050 //RX_FDDRC_BAND_MARGIN_2 +249 0x0080 //RX_FDDRC_BAND_MARGIN_3 +250 0x0007 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x5000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x6400 //RX_FDDRC_THRD_3_2 +258 0x6400 //RX_FDDRC_THRD_3_3 +259 0x2000 //RX_FDDRC_SLANT_0_0 +260 0x2000 //RX_FDDRC_SLANT_0_1 +261 0x2000 //RX_FDDRC_SLANT_0_2 +262 0x2000 //RX_FDDRC_SLANT_0_3 +263 0x5333 //RX_FDDRC_SLANT_1_0 +264 0x5333 //RX_FDDRC_SLANT_1_1 +265 0x5333 //RX_FDDRC_SLANT_1_2 +266 0x5333 //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +286 0x0100 //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 +#VOL 1 +163 0x3000 //RX_TDDRC_ALPHA_UP_1 +164 0x3000 //RX_TDDRC_ALPHA_UP_2 +165 0x3000 //RX_TDDRC_ALPHA_UP_3 +166 0x3000 //RX_TDDRC_ALPHA_UP_4 +184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +190 0x7FFF //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +269 0x0000 //RX_TDDRC_THRD_0 +270 0x0000 //RX_TDDRC_THRD_1 +271 0x7FFF //RX_TDDRC_THRD_2 +272 0x7FFF //RX_TDDRC_THRD_3 +273 0x7FFF //RX_TDDRC_SLANT_0 +274 0x7EB8 //RX_TDDRC_SLANT_1 +275 0x3000 //RX_TDDRC_ALPHA_UP_0 +276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x199A //RX_TDDRC_HMNC_GAIN +279 0x0001 //RX_TDDRC_SMT_FLAG +280 0x0CCD //RX_TDDRC_SMT_W +281 0x017F //RX_TDDRC_DRC_GAIN +195 0x0014 //RX_FDEQ_SUBNUM +196 0x4848 //RX_FDEQ_GAIN_0 +197 0x4848 //RX_FDEQ_GAIN_1 +198 0x4848 //RX_FDEQ_GAIN_2 +199 0x4848 //RX_FDEQ_GAIN_3 +200 0x4848 //RX_FDEQ_GAIN_4 +201 0x4848 //RX_FDEQ_GAIN_5 +202 0x4444 //RX_FDEQ_GAIN_6 +203 0x4040 //RX_FDEQ_GAIN_7 +204 0x4040 //RX_FDEQ_GAIN_8 +205 0x4040 //RX_FDEQ_GAIN_9 +206 0x4848 //RX_FDEQ_GAIN_10 +207 0x4848 //RX_FDEQ_GAIN_11 +208 0x4848 //RX_FDEQ_GAIN_12 +209 0x4848 //RX_FDEQ_GAIN_13 +210 0x4848 //RX_FDEQ_GAIN_14 +211 0x4848 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0202 //RX_FDEQ_BIN_0 +221 0x0203 //RX_FDEQ_BIN_1 +222 0x0303 //RX_FDEQ_BIN_2 +223 0x0304 //RX_FDEQ_BIN_3 +224 0x0405 //RX_FDEQ_BIN_4 +225 0x0506 //RX_FDEQ_BIN_5 +226 0x0708 //RX_FDEQ_BIN_6 +227 0x090A //RX_FDEQ_BIN_7 +228 0x0B0C //RX_FDEQ_BIN_8 +229 0x0D0E //RX_FDEQ_BIN_9 +230 0x0000 //RX_FDEQ_BIN_10 +231 0x0000 //RX_FDEQ_BIN_11 +232 0x0000 //RX_FDEQ_BIN_12 +233 0x0000 //RX_FDEQ_BIN_13 +234 0x0000 //RX_FDEQ_BIN_14 +235 0x0000 //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x4000 //RX_FDEQ_RESRV_0 +245 0x0320 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0030 //RX_FDDRC_BAND_MARGIN_1 +248 0x0050 //RX_FDDRC_BAND_MARGIN_2 +249 0x0080 //RX_FDDRC_BAND_MARGIN_3 +250 0x0007 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x5000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x6400 //RX_FDDRC_THRD_3_2 +258 0x6400 //RX_FDDRC_THRD_3_3 +259 0x2000 //RX_FDDRC_SLANT_0_0 +260 0x2000 //RX_FDDRC_SLANT_0_1 +261 0x2000 //RX_FDDRC_SLANT_0_2 +262 0x2000 //RX_FDDRC_SLANT_0_3 +263 0x5333 //RX_FDDRC_SLANT_1_0 +264 0x5333 //RX_FDDRC_SLANT_1_1 +265 0x5333 //RX_FDDRC_SLANT_1_2 +266 0x5333 //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +286 0x0100 //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 +#VOL 2 +163 0x3000 //RX_TDDRC_ALPHA_UP_1 +164 0x3000 //RX_TDDRC_ALPHA_UP_2 +165 0x3000 //RX_TDDRC_ALPHA_UP_3 +166 0x3000 //RX_TDDRC_ALPHA_UP_4 +184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +190 0x7FFF //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +269 0x0000 //RX_TDDRC_THRD_0 +270 0x0000 //RX_TDDRC_THRD_1 +271 0x7FFF //RX_TDDRC_THRD_2 +272 0x7FFF //RX_TDDRC_THRD_3 +273 0x7FFF //RX_TDDRC_SLANT_0 +274 0x7EB8 //RX_TDDRC_SLANT_1 +275 0x3000 //RX_TDDRC_ALPHA_UP_0 +276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x199A //RX_TDDRC_HMNC_GAIN +279 0x0001 //RX_TDDRC_SMT_FLAG +280 0x0CCD //RX_TDDRC_SMT_W +281 0x017F //RX_TDDRC_DRC_GAIN +195 0x0014 //RX_FDEQ_SUBNUM +196 0x4848 //RX_FDEQ_GAIN_0 +197 0x4848 //RX_FDEQ_GAIN_1 +198 0x4848 //RX_FDEQ_GAIN_2 +199 0x4848 //RX_FDEQ_GAIN_3 +200 0x4848 //RX_FDEQ_GAIN_4 +201 0x4848 //RX_FDEQ_GAIN_5 +202 0x4444 //RX_FDEQ_GAIN_6 +203 0x4040 //RX_FDEQ_GAIN_7 +204 0x4040 //RX_FDEQ_GAIN_8 +205 0x4040 //RX_FDEQ_GAIN_9 +206 0x4848 //RX_FDEQ_GAIN_10 +207 0x4848 //RX_FDEQ_GAIN_11 +208 0x4848 //RX_FDEQ_GAIN_12 +209 0x4848 //RX_FDEQ_GAIN_13 +210 0x4848 //RX_FDEQ_GAIN_14 +211 0x4848 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0202 //RX_FDEQ_BIN_0 +221 0x0203 //RX_FDEQ_BIN_1 +222 0x0303 //RX_FDEQ_BIN_2 +223 0x0304 //RX_FDEQ_BIN_3 +224 0x0405 //RX_FDEQ_BIN_4 +225 0x0506 //RX_FDEQ_BIN_5 +226 0x0708 //RX_FDEQ_BIN_6 +227 0x090A //RX_FDEQ_BIN_7 +228 0x0B0C //RX_FDEQ_BIN_8 +229 0x0D0E //RX_FDEQ_BIN_9 +230 0x0000 //RX_FDEQ_BIN_10 +231 0x0000 //RX_FDEQ_BIN_11 +232 0x0000 //RX_FDEQ_BIN_12 +233 0x0000 //RX_FDEQ_BIN_13 +234 0x0000 //RX_FDEQ_BIN_14 +235 0x0000 //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x4000 //RX_FDEQ_RESRV_0 +245 0x0320 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0030 //RX_FDDRC_BAND_MARGIN_1 +248 0x0050 //RX_FDDRC_BAND_MARGIN_2 +249 0x0080 //RX_FDDRC_BAND_MARGIN_3 +250 0x0007 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x5000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x6400 //RX_FDDRC_THRD_3_2 +258 0x6400 //RX_FDDRC_THRD_3_3 +259 0x2000 //RX_FDDRC_SLANT_0_0 +260 0x2000 //RX_FDDRC_SLANT_0_1 +261 0x2000 //RX_FDDRC_SLANT_0_2 +262 0x2000 //RX_FDDRC_SLANT_0_3 +263 0x5333 //RX_FDDRC_SLANT_1_0 +264 0x5333 //RX_FDDRC_SLANT_1_1 +265 0x5333 //RX_FDDRC_SLANT_1_2 +266 0x5333 //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +286 0x0100 //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 +#VOL 3 +163 0x3000 //RX_TDDRC_ALPHA_UP_1 +164 0x3000 //RX_TDDRC_ALPHA_UP_2 +165 0x3000 //RX_TDDRC_ALPHA_UP_3 +166 0x3000 //RX_TDDRC_ALPHA_UP_4 +184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +190 0x7FFF //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +269 0x0000 //RX_TDDRC_THRD_0 +270 0x0000 //RX_TDDRC_THRD_1 +271 0x7FFF //RX_TDDRC_THRD_2 +272 0x7FFF //RX_TDDRC_THRD_3 +273 0x7FFF //RX_TDDRC_SLANT_0 +274 0x7EB8 //RX_TDDRC_SLANT_1 +275 0x3000 //RX_TDDRC_ALPHA_UP_0 +276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x199A //RX_TDDRC_HMNC_GAIN +279 0x0001 //RX_TDDRC_SMT_FLAG +280 0x0CCD //RX_TDDRC_SMT_W +281 0x017F //RX_TDDRC_DRC_GAIN +195 0x0014 //RX_FDEQ_SUBNUM +196 0x4848 //RX_FDEQ_GAIN_0 +197 0x4848 //RX_FDEQ_GAIN_1 +198 0x4848 //RX_FDEQ_GAIN_2 +199 0x4848 //RX_FDEQ_GAIN_3 +200 0x4848 //RX_FDEQ_GAIN_4 +201 0x4848 //RX_FDEQ_GAIN_5 +202 0x4444 //RX_FDEQ_GAIN_6 +203 0x4040 //RX_FDEQ_GAIN_7 +204 0x4040 //RX_FDEQ_GAIN_8 +205 0x4040 //RX_FDEQ_GAIN_9 +206 0x4848 //RX_FDEQ_GAIN_10 +207 0x4848 //RX_FDEQ_GAIN_11 +208 0x4848 //RX_FDEQ_GAIN_12 +209 0x4848 //RX_FDEQ_GAIN_13 +210 0x4848 //RX_FDEQ_GAIN_14 +211 0x4848 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0202 //RX_FDEQ_BIN_0 +221 0x0203 //RX_FDEQ_BIN_1 +222 0x0303 //RX_FDEQ_BIN_2 +223 0x0304 //RX_FDEQ_BIN_3 +224 0x0405 //RX_FDEQ_BIN_4 +225 0x0506 //RX_FDEQ_BIN_5 +226 0x0708 //RX_FDEQ_BIN_6 +227 0x090A //RX_FDEQ_BIN_7 +228 0x0B0C //RX_FDEQ_BIN_8 +229 0x0D0E //RX_FDEQ_BIN_9 +230 0x0000 //RX_FDEQ_BIN_10 +231 0x0000 //RX_FDEQ_BIN_11 +232 0x0000 //RX_FDEQ_BIN_12 +233 0x0000 //RX_FDEQ_BIN_13 +234 0x0000 //RX_FDEQ_BIN_14 +235 0x0000 //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x4000 //RX_FDEQ_RESRV_0 +245 0x0320 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0030 //RX_FDDRC_BAND_MARGIN_1 +248 0x0050 //RX_FDDRC_BAND_MARGIN_2 +249 0x0080 //RX_FDDRC_BAND_MARGIN_3 +250 0x0007 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x5000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x6400 //RX_FDDRC_THRD_3_2 +258 0x6400 //RX_FDDRC_THRD_3_3 +259 0x2000 //RX_FDDRC_SLANT_0_0 +260 0x2000 //RX_FDDRC_SLANT_0_1 +261 0x2000 //RX_FDDRC_SLANT_0_2 +262 0x2000 //RX_FDDRC_SLANT_0_3 +263 0x5333 //RX_FDDRC_SLANT_1_0 +264 0x5333 //RX_FDDRC_SLANT_1_1 +265 0x5333 //RX_FDDRC_SLANT_1_2 +266 0x5333 //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +286 0x0100 //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 +#VOL 4 +163 0x3000 //RX_TDDRC_ALPHA_UP_1 +164 0x3000 //RX_TDDRC_ALPHA_UP_2 +165 0x3000 //RX_TDDRC_ALPHA_UP_3 +166 0x3000 //RX_TDDRC_ALPHA_UP_4 +184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +190 0x7FFF //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +269 0x0000 //RX_TDDRC_THRD_0 +270 0x0000 //RX_TDDRC_THRD_1 +271 0x7FFF //RX_TDDRC_THRD_2 +272 0x7FFF //RX_TDDRC_THRD_3 +273 0x7FFF //RX_TDDRC_SLANT_0 +274 0x7EB8 //RX_TDDRC_SLANT_1 +275 0x3000 //RX_TDDRC_ALPHA_UP_0 +276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x199A //RX_TDDRC_HMNC_GAIN +279 0x0001 //RX_TDDRC_SMT_FLAG +280 0x0CCD //RX_TDDRC_SMT_W +281 0x017F //RX_TDDRC_DRC_GAIN +195 0x0014 //RX_FDEQ_SUBNUM +196 0x4848 //RX_FDEQ_GAIN_0 +197 0x4848 //RX_FDEQ_GAIN_1 +198 0x4848 //RX_FDEQ_GAIN_2 +199 0x4848 //RX_FDEQ_GAIN_3 +200 0x4848 //RX_FDEQ_GAIN_4 +201 0x4848 //RX_FDEQ_GAIN_5 +202 0x4444 //RX_FDEQ_GAIN_6 +203 0x4040 //RX_FDEQ_GAIN_7 +204 0x4040 //RX_FDEQ_GAIN_8 +205 0x4040 //RX_FDEQ_GAIN_9 +206 0x4848 //RX_FDEQ_GAIN_10 +207 0x4848 //RX_FDEQ_GAIN_11 +208 0x4848 //RX_FDEQ_GAIN_12 +209 0x4848 //RX_FDEQ_GAIN_13 +210 0x4848 //RX_FDEQ_GAIN_14 +211 0x4848 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0202 //RX_FDEQ_BIN_0 +221 0x0203 //RX_FDEQ_BIN_1 +222 0x0303 //RX_FDEQ_BIN_2 +223 0x0304 //RX_FDEQ_BIN_3 +224 0x0405 //RX_FDEQ_BIN_4 +225 0x0506 //RX_FDEQ_BIN_5 +226 0x0708 //RX_FDEQ_BIN_6 +227 0x090A //RX_FDEQ_BIN_7 +228 0x0B0C //RX_FDEQ_BIN_8 +229 0x0D0E //RX_FDEQ_BIN_9 +230 0x0000 //RX_FDEQ_BIN_10 +231 0x0000 //RX_FDEQ_BIN_11 +232 0x0000 //RX_FDEQ_BIN_12 +233 0x0000 //RX_FDEQ_BIN_13 +234 0x0000 //RX_FDEQ_BIN_14 +235 0x0000 //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x4000 //RX_FDEQ_RESRV_0 +245 0x0320 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0030 //RX_FDDRC_BAND_MARGIN_1 +248 0x0050 //RX_FDDRC_BAND_MARGIN_2 +249 0x0080 //RX_FDDRC_BAND_MARGIN_3 +250 0x0007 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x5000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x6400 //RX_FDDRC_THRD_3_2 +258 0x6400 //RX_FDDRC_THRD_3_3 +259 0x2000 //RX_FDDRC_SLANT_0_0 +260 0x2000 //RX_FDDRC_SLANT_0_1 +261 0x2000 //RX_FDDRC_SLANT_0_2 +262 0x2000 //RX_FDDRC_SLANT_0_3 +263 0x5333 //RX_FDDRC_SLANT_1_0 +264 0x5333 //RX_FDDRC_SLANT_1_1 +265 0x5333 //RX_FDDRC_SLANT_1_2 +266 0x5333 //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +286 0x0100 //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 +#VOL 5 +163 0x3000 //RX_TDDRC_ALPHA_UP_1 +164 0x3000 //RX_TDDRC_ALPHA_UP_2 +165 0x3000 //RX_TDDRC_ALPHA_UP_3 +166 0x3000 //RX_TDDRC_ALPHA_UP_4 +184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +190 0x7FFF //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +269 0x0000 //RX_TDDRC_THRD_0 +270 0x0000 //RX_TDDRC_THRD_1 +271 0x7FFF //RX_TDDRC_THRD_2 +272 0x7FFF //RX_TDDRC_THRD_3 +273 0x7FFF //RX_TDDRC_SLANT_0 +274 0x7EB8 //RX_TDDRC_SLANT_1 +275 0x3000 //RX_TDDRC_ALPHA_UP_0 +276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x199A //RX_TDDRC_HMNC_GAIN +279 0x0001 //RX_TDDRC_SMT_FLAG +280 0x0CCD //RX_TDDRC_SMT_W +281 0x017F //RX_TDDRC_DRC_GAIN +195 0x0014 //RX_FDEQ_SUBNUM +196 0x4848 //RX_FDEQ_GAIN_0 +197 0x4848 //RX_FDEQ_GAIN_1 +198 0x4848 //RX_FDEQ_GAIN_2 +199 0x4848 //RX_FDEQ_GAIN_3 +200 0x4848 //RX_FDEQ_GAIN_4 +201 0x4848 //RX_FDEQ_GAIN_5 +202 0x4444 //RX_FDEQ_GAIN_6 +203 0x4040 //RX_FDEQ_GAIN_7 +204 0x4040 //RX_FDEQ_GAIN_8 +205 0x4040 //RX_FDEQ_GAIN_9 +206 0x4848 //RX_FDEQ_GAIN_10 +207 0x4848 //RX_FDEQ_GAIN_11 +208 0x4848 //RX_FDEQ_GAIN_12 +209 0x4848 //RX_FDEQ_GAIN_13 +210 0x4848 //RX_FDEQ_GAIN_14 +211 0x4848 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0202 //RX_FDEQ_BIN_0 +221 0x0203 //RX_FDEQ_BIN_1 +222 0x0303 //RX_FDEQ_BIN_2 +223 0x0304 //RX_FDEQ_BIN_3 +224 0x0405 //RX_FDEQ_BIN_4 +225 0x0506 //RX_FDEQ_BIN_5 +226 0x0708 //RX_FDEQ_BIN_6 +227 0x090A //RX_FDEQ_BIN_7 +228 0x0B0C //RX_FDEQ_BIN_8 +229 0x0D0E //RX_FDEQ_BIN_9 +230 0x0000 //RX_FDEQ_BIN_10 +231 0x0000 //RX_FDEQ_BIN_11 +232 0x0000 //RX_FDEQ_BIN_12 +233 0x0000 //RX_FDEQ_BIN_13 +234 0x0000 //RX_FDEQ_BIN_14 +235 0x0000 //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x4000 //RX_FDEQ_RESRV_0 +245 0x0320 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0030 //RX_FDDRC_BAND_MARGIN_1 +248 0x0050 //RX_FDDRC_BAND_MARGIN_2 +249 0x0080 //RX_FDDRC_BAND_MARGIN_3 +250 0x0007 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x5000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x6400 //RX_FDDRC_THRD_3_2 +258 0x6400 //RX_FDDRC_THRD_3_3 +259 0x2000 //RX_FDDRC_SLANT_0_0 +260 0x2000 //RX_FDDRC_SLANT_0_1 +261 0x2000 //RX_FDDRC_SLANT_0_2 +262 0x2000 //RX_FDDRC_SLANT_0_3 +263 0x5333 //RX_FDDRC_SLANT_1_0 +264 0x5333 //RX_FDDRC_SLANT_1_1 +265 0x5333 //RX_FDDRC_SLANT_1_2 +266 0x5333 //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +286 0x0100 //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 +#VOL 6 +163 0x3000 //RX_TDDRC_ALPHA_UP_1 +164 0x3000 //RX_TDDRC_ALPHA_UP_2 +165 0x3000 //RX_TDDRC_ALPHA_UP_3 +166 0x3000 //RX_TDDRC_ALPHA_UP_4 +184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +190 0x7FFF //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +269 0x0000 //RX_TDDRC_THRD_0 +270 0x0000 //RX_TDDRC_THRD_1 +271 0x7FFF //RX_TDDRC_THRD_2 +272 0x7FFF //RX_TDDRC_THRD_3 +273 0x7FFF //RX_TDDRC_SLANT_0 +274 0x7EB8 //RX_TDDRC_SLANT_1 +275 0x3000 //RX_TDDRC_ALPHA_UP_0 +276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x199A //RX_TDDRC_HMNC_GAIN +279 0x0001 //RX_TDDRC_SMT_FLAG +280 0x0CCD //RX_TDDRC_SMT_W +281 0x017F //RX_TDDRC_DRC_GAIN +195 0x0014 //RX_FDEQ_SUBNUM +196 0x4848 //RX_FDEQ_GAIN_0 +197 0x4848 //RX_FDEQ_GAIN_1 +198 0x4848 //RX_FDEQ_GAIN_2 +199 0x4848 //RX_FDEQ_GAIN_3 +200 0x4848 //RX_FDEQ_GAIN_4 +201 0x4848 //RX_FDEQ_GAIN_5 +202 0x4444 //RX_FDEQ_GAIN_6 +203 0x4040 //RX_FDEQ_GAIN_7 +204 0x4040 //RX_FDEQ_GAIN_8 +205 0x4040 //RX_FDEQ_GAIN_9 +206 0x4848 //RX_FDEQ_GAIN_10 +207 0x4848 //RX_FDEQ_GAIN_11 +208 0x4848 //RX_FDEQ_GAIN_12 +209 0x4848 //RX_FDEQ_GAIN_13 +210 0x4848 //RX_FDEQ_GAIN_14 +211 0x4848 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0202 //RX_FDEQ_BIN_0 +221 0x0203 //RX_FDEQ_BIN_1 +222 0x0303 //RX_FDEQ_BIN_2 +223 0x0304 //RX_FDEQ_BIN_3 +224 0x0405 //RX_FDEQ_BIN_4 +225 0x0506 //RX_FDEQ_BIN_5 +226 0x0708 //RX_FDEQ_BIN_6 +227 0x090A //RX_FDEQ_BIN_7 +228 0x0B0C //RX_FDEQ_BIN_8 +229 0x0D0E //RX_FDEQ_BIN_9 +230 0x0000 //RX_FDEQ_BIN_10 +231 0x0000 //RX_FDEQ_BIN_11 +232 0x0000 //RX_FDEQ_BIN_12 +233 0x0000 //RX_FDEQ_BIN_13 +234 0x0000 //RX_FDEQ_BIN_14 +235 0x0000 //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x4000 //RX_FDEQ_RESRV_0 +245 0x0320 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0030 //RX_FDDRC_BAND_MARGIN_1 +248 0x0050 //RX_FDDRC_BAND_MARGIN_2 +249 0x0080 //RX_FDDRC_BAND_MARGIN_3 +250 0x0007 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x5000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x6400 //RX_FDDRC_THRD_3_2 +258 0x6400 //RX_FDDRC_THRD_3_3 +259 0x2000 //RX_FDDRC_SLANT_0_0 +260 0x2000 //RX_FDDRC_SLANT_0_1 +261 0x2000 //RX_FDDRC_SLANT_0_2 +262 0x2000 //RX_FDDRC_SLANT_0_3 +263 0x5333 //RX_FDDRC_SLANT_1_0 +264 0x5333 //RX_FDDRC_SLANT_1_1 +265 0x5333 //RX_FDDRC_SLANT_1_2 +266 0x5333 //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +286 0x0100 //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 #CASE_NAME BLUETOOTH-BTWB_NREC-VOICE_GENERIC-WB -#PARAM_TYPE TX+RX -#TOTAL_CUSTOM_STEP 7 +#PARAM_MODE Full +#PARAM_TYPE TX+2RX +#TOTAL_CUSTOM_STEP 7+7 #TX 0 0x0008 //TX_OPERATION_MODE_0 1 0x0008 //TX_OPERATION_MODE_1 @@ -31812,20 +48319,20 @@ 248 0xF400 //TX_THR_SN_EST_6 249 0xF600 //TX_THR_SN_EST_7 250 0x0000 //TX_DELTA_THR_SN_EST_0 -251 0x0000 //TX_DELTA_THR_SN_EST_1 +251 0x0200 //TX_DELTA_THR_SN_EST_1 252 0x0200 //TX_DELTA_THR_SN_EST_2 253 0x0200 //TX_DELTA_THR_SN_EST_3 254 0x0200 //TX_DELTA_THR_SN_EST_4 255 0x0200 //TX_DELTA_THR_SN_EST_5 -256 0x0200 //TX_DELTA_THR_SN_EST_6 +256 0x0000 //TX_DELTA_THR_SN_EST_6 257 0x0200 //TX_DELTA_THR_SN_EST_7 258 0x6000 //TX_LAMBDA_NN_EST_0 -259 0x6000 //TX_LAMBDA_NN_EST_1 +259 0x4000 //TX_LAMBDA_NN_EST_1 260 0x4000 //TX_LAMBDA_NN_EST_2 261 0x4000 //TX_LAMBDA_NN_EST_3 262 0x4000 //TX_LAMBDA_NN_EST_4 263 0x4000 //TX_LAMBDA_NN_EST_5 -264 0x4000 //TX_LAMBDA_NN_EST_6 +264 0x6000 //TX_LAMBDA_NN_EST_6 265 0x4000 //TX_LAMBDA_NN_EST_7 266 0x0400 //TX_N_SN_EST 267 0x001E //TX_INBEAM_T @@ -31843,16 +48350,16 @@ 279 0x1000 //TX_B_POST_FLT_0 280 0x1000 //TX_B_POST_FLT_1 281 0x000F //TX_NS_LVL_CTRL_0 -282 0x000F //TX_NS_LVL_CTRL_1 -283 0x0011 //TX_NS_LVL_CTRL_2 +282 0x0011 //TX_NS_LVL_CTRL_1 +283 0x000F //TX_NS_LVL_CTRL_2 284 0x000F //TX_NS_LVL_CTRL_3 285 0x000F //TX_NS_LVL_CTRL_4 286 0x000F //TX_NS_LVL_CTRL_5 287 0x000F //TX_NS_LVL_CTRL_6 288 0x0011 //TX_NS_LVL_CTRL_7 289 0x000C //TX_MIN_GAIN_S_0 -290 0x000C //TX_MIN_GAIN_S_1 -291 0x000F //TX_MIN_GAIN_S_2 +290 0x000F //TX_MIN_GAIN_S_1 +291 0x000C //TX_MIN_GAIN_S_2 292 0x000C //TX_MIN_GAIN_S_3 293 0x000C //TX_MIN_GAIN_S_4 294 0x000C //TX_MIN_GAIN_S_5 @@ -31876,12 +48383,12 @@ 312 0x7FFF //TX_A_POST_FILT_0 313 0x2000 //TX_A_POST_FILT_1 314 0x4000 //TX_A_POST_FILT_S_0 -315 0x4000 //TX_A_POST_FILT_S_1 +315 0x5000 //TX_A_POST_FILT_S_1 316 0x5000 //TX_A_POST_FILT_S_2 317 0x5000 //TX_A_POST_FILT_S_3 318 0x5000 //TX_A_POST_FILT_S_4 319 0x5000 //TX_A_POST_FILT_S_5 -320 0x5000 //TX_A_POST_FILT_S_6 +320 0x4000 //TX_A_POST_FILT_S_6 321 0x5000 //TX_A_POST_FILT_S_7 322 0x1000 //TX_B_POST_FILT_0 323 0x1000 //TX_B_POST_FILT_1 @@ -31941,10 +48448,10 @@ 377 0x7FFF //TX_NOISE_TH_5_4 378 0x044C //TX_NOISE_TH_6 379 0x0014 //TX_MINENOISE_TH -380 0x4000 //TX_MINENOISE_MIC0_TH_MTS -381 0xFFEE //TX_MINENOISE_MIC0_TH_EXP -382 0x6000 //TX_MINENOISE_MIC0_S_TH_MTS -383 0xFFF3 //TX_MINENOISE_MIC0_S_TH_EXP +380 0x4000 //TX_MORENS_TFMASK_TH +381 0xFFEE //TX_DRC_QUIET_FLOOR +382 0x6000 //TX_RATIODTL_CUT_TH +383 0xFFF3 //TX_DT_CUT_K1 384 0x0666 //TX_OUT_ENER_S_TH_CLEAN 385 0x0666 //TX_OUT_ENER_S_TH_LESSCLEAN 386 0x0333 //TX_OUT_ENER_S_TH_NOISY @@ -31952,15 +48459,15 @@ 388 0x0333 //TX_OUT_ENER_TH_SPEECH 389 0x2000 //TX_SN_NPB_GAIN 390 0x0000 //TX_NN_NPB_GAIN -391 0x0000 //TX_CSX_ALPHA_0 -392 0x0000 //TX_CSX_ALPHA_1 -393 0x0000 //TX_CSX_ALPHA_2 -394 0x0000 //TX_CSX_ALPHA_3 -395 0x0800 //TX_MU_ARSP_EST -396 0x00C8 //TX_P_OUTBEAM_MIN_TH +391 0x0000 //TX_POST_MASK_SUP_HSNE +392 0x0000 //TX_TAIL_DET_TH +393 0x0000 //TX_B_LESSCUT_RTO_WTA +394 0x0000 //TX_MEL_G_R +395 0x0800 //TX_SUPHIGH_TH +396 0x00C8 //TX_MASK_G_R 397 0x0002 //TX_EXTRA_NS_L -398 0x0800 //TX_EXTRA_NS_A -399 0x0005 //TX_VR_NOISE_FLOOR_TH +398 0x0800 //TX_C_POST_FLT_MASK +399 0x0005 //TX_A_POST_FLT_WNS 400 0x0148 //TX_MIN_G_LOW300HZ 401 0x0002 //TX_MAXLEVEL_CNG 402 0x00B4 //TX_STN_NOISE_TH @@ -32075,16 +48582,16 @@ 511 0x6666 //TX_MIC_TO_BFGAIN 512 0x0000 //TX_MICTOBFGAIN0 513 0x0000 //TX_FASTMUE_TH -514 0x0000 //TX_DERVB_LEN_0 -515 0x0000 //TX_DERVB_LEN_1 -516 0x0000 //TX_RHO_DERVB -517 0x0000 //TX_MIC_INDX_DERVB -518 0x0000 //TX_MU_DERVB -519 0x0000 //TX_DR_RESRV_0 -520 0x0000 //TX_DR_RESRV_1 -521 0x0000 //TX_DR_RESRV_2 -522 0x0000 //TX_DR_RESRV_3 -523 0x0000 //TX_DR_RESRV_4 +514 0x0000 //TX_DEREVERB_LF_MU +515 0x0000 //TX_DEREVERB_HF_MU +516 0x0000 //TX_DEREVERB_DELAY +517 0x0000 //TX_DEREVERB_COEF_LEN +518 0x0000 //TX_DEREVERB_DNR +519 0x0000 //TX_DEREVERB_ALPHA +520 0x0000 //TX_DEREVERB_BETA +521 0x0000 //TX_GSC_RTOL_TH +522 0x0000 //TX_GSC_RTOH_TH +523 0x0000 //TX_WIDE2_MEANHTH 524 0x0000 //TX_DR_RESRV_5 525 0x0000 //TX_DR_RESRV_6 526 0x0000 //TX_DR_RESRV_7 @@ -32458,8 +48965,73 @@ 894 0xC000 //TX_FASTNS_SSA_THHFL 895 0xCCCC //TX_FASTNS_SSA_THLFH 896 0xD999 //TX_FASTNS_SSA_THHFH +897 0x0000 //TX_SENDFUNC_REG_MICMUTE +898 0x0000 //TX_SENDFUNC_REG_MICMUTE1 +899 0x0000 //TX_MICMUTE_RATIO_THR +900 0x0000 //TX_MICMUTE_AMP_THR +901 0x0000 //TX_MICMUTE_HPF_IND +902 0x0000 //TX_MICMUTE_LOG_EYR_TH +903 0x0000 //TX_MICMUTE_CVG_TIME +904 0x0000 //TX_MICMUTE_RELEASE_TIME +905 0x0000 //TX_MIC_VOLUME_MIC0MUTE +906 0x0000 //TX_MICMUTE_EPD_OFFSET_0 +907 0x0000 //TX_MICMUTE_FRQ_AEC_L +908 0x0000 //TX_MICMUTE_EAD_THR +909 0x0000 //TX_MICMUTE_LAMBDA_CB_NLE +910 0x0000 //TX_MICMUTE_LAMBDA_RE_EST +911 0x0000 //TX_DTD_THR1_MICMUTE_0 +912 0x0000 //TX_DTD_THR1_MICMUTE_1 +913 0x0000 //TX_DTD_THR1_MICMUTE_2 +914 0x0000 //TX_DTD_THR1_MICMUTE_3 +915 0x0000 //TX_DTD_THR2_MICMUTE_0 +916 0x0000 //TX_MICMUTE_MIN_EQ_RE_EST_0 +917 0x0000 //TX_MICMUTE_MIN_EQ_RE_EST_1 +918 0x0000 //TX_MICMUTE_MIN_EQ_RE_EST_2 +919 0x0000 //TX_MICMUTE_MIN_EQ_RE_EST_3 +920 0x0000 //TX_MICMUTE_MIN_EQ_RE_EST_4 +921 0x0000 //TX_MICMUTE_C_POST_FLT +922 0x0000 //TX_MICMUTE_DT_CUT_K +923 0x0000 //TX_MICMUTE_DT_CUT_THR +924 0x0000 //TX_MICMUTE_DT_CUT_K2 +925 0x0000 //TX_MICMUTE_DT_CUT_THR2 +926 0x0000 //TX_MICMUTE_DT2_HOLD_N +927 0x0000 //TX_MICMUTE_RATIODTH_THCUT +928 0x0000 //TX_MICMUTE_B_POST_FLT_ECHOL +929 0x0000 //TX_MICMUTE_B_POST_FLT_ECHOH +930 0x0000 //TX_MICMUTE_C_POST_FLT_MASK +931 0x0000 //TX_MICMUTE_RATIODTL_CUT_TH +932 0x0000 //TX_MICMUTE_DT_CUT_K1 +933 0x0000 //TX_MICMUTE_N2_SN_EST +934 0x0000 //TX_MICMUTE_THR_SN_EST_0 +935 0x0000 //TX_MICMUTE_MIN_G_CTRL_0 +936 0x0000 //TX_MICMUTE_A_POST_FILT_S_0 +937 0x0000 //TX_MICMUTE_B_POST_FILT_0 +938 0x0000 //TX_MIC1RUB_AMP_THR +939 0x0000 //TX_MIC1MUTE_RATIO_THR +940 0x0000 //TX_MIC1MUTE_AMP_THR +941 0x0000 //TX_MIC1MUTE_CVG_TIME +942 0x0000 //TX_MIC1MUTE_RELEASE_TIME +943 0x0000 //TX_AMS_RESRV_01 +944 0x0000 //TX_AMS_RESRV_02 +945 0x0000 //TX_AMS_RESRV_03 +946 0x0000 //TX_AMS_RESRV_04 +947 0x0000 //TX_AMS_RESRV_05 +948 0x0000 //TX_AMS_RESRV_06 +949 0x0000 //TX_AMS_RESRV_07 +950 0x0000 //TX_AMS_RESRV_08 +951 0x0000 //TX_AMS_RESRV_09 +952 0x0000 //TX_AMS_RESRV_10 +953 0x0000 //TX_AMS_RESRV_11 +954 0x0000 //TX_AMS_RESRV_12 +955 0x0000 //TX_AMS_RESRV_13 +956 0x0000 //TX_AMS_RESRV_14 +957 0x0000 //TX_AMS_RESRV_15 +958 0x0000 //TX_AMS_RESRV_16 +959 0x0000 //TX_AMS_RESRV_17 +960 0x0000 //TX_AMS_RESRV_18 +961 0x0000 //TX_AMS_RESRV_19 #RX -0 0x006C //RX_RECVFUNC_MODE_0 +0 0x206C //RX_RECVFUNC_MODE_0 1 0x0000 //RX_RECVFUNC_MODE_1 2 0x0001 //RX_SAMPLINGFREQ_SIG 3 0x0001 //RX_SAMPLINGFREQ_PROC @@ -33309,10 +49881,862 @@ 110 0x0000 //RX_FDDRC_RESRV_0 129 0x0100 //RX_SPK_VOL 130 0x0000 //RX_VOL_RESRV_0 +#RX 2 +157 0x206C //RX_RECVFUNC_MODE_0 +158 0x0000 //RX_RECVFUNC_MODE_1 +159 0x0001 //RX_SAMPLINGFREQ_SIG +160 0x0001 //RX_SAMPLINGFREQ_PROC +161 0x000A //RX_FRAME_SZ +162 0x0000 //RX_DELAY_OPT +163 0x1000 //RX_TDDRC_ALPHA_UP_1 +164 0x1000 //RX_TDDRC_ALPHA_UP_2 +165 0x1000 //RX_TDDRC_ALPHA_UP_3 +166 0x1000 //RX_TDDRC_ALPHA_UP_4 +167 0x0800 //RX_PGA +168 0x7FFF //RX_A_HP +169 0x4000 //RX_B_PE +170 0x3800 //RX_THR_PITCH_DET_0 +171 0x3000 //RX_THR_PITCH_DET_1 +172 0x2800 //RX_THR_PITCH_DET_2 +173 0x0008 //RX_PITCH_BFR_LEN +174 0x0003 //RX_SBD_PITCH_DET +175 0x0100 //RX_PP_RESRV_0 +176 0x0020 //RX_PP_RESRV_1 +177 0x0600 //RX_N_SN_EST +178 0x000C //RX_N2_SN_EST +179 0x0010 //RX_NS_LVL_CTRL +180 0xF800 //RX_THR_SN_EST +181 0x7CCD //RX_LAMBDA_PFILT +182 0x000A //RX_FENS_RESRV_0 +183 0x0190 //RX_FENS_RESRV_1 +184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +187 0x0002 //RX_EXTRA_NS_L +188 0x0800 //RX_EXTRA_NS_A +189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +190 0x7FFF //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +192 0x199A //RX_A_POST_FLT +193 0x0000 //RX_LMT_THRD +194 0x4000 //RX_LMT_ALPHA +195 0x001C //RX_FDEQ_SUBNUM +196 0x4848 //RX_FDEQ_GAIN_0 +197 0x4848 //RX_FDEQ_GAIN_1 +198 0x4848 //RX_FDEQ_GAIN_2 +199 0x4848 //RX_FDEQ_GAIN_3 +200 0x4848 //RX_FDEQ_GAIN_4 +201 0x4848 //RX_FDEQ_GAIN_5 +202 0x4848 //RX_FDEQ_GAIN_6 +203 0x4848 //RX_FDEQ_GAIN_7 +204 0x4848 //RX_FDEQ_GAIN_8 +205 0x3C3C //RX_FDEQ_GAIN_9 +206 0x3C3C //RX_FDEQ_GAIN_10 +207 0x3838 //RX_FDEQ_GAIN_11 +208 0x3838 //RX_FDEQ_GAIN_12 +209 0x3030 //RX_FDEQ_GAIN_13 +210 0x4848 //RX_FDEQ_GAIN_14 +211 0x4848 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0202 //RX_FDEQ_BIN_0 +221 0x0203 //RX_FDEQ_BIN_1 +222 0x0303 //RX_FDEQ_BIN_2 +223 0x0304 //RX_FDEQ_BIN_3 +224 0x0405 //RX_FDEQ_BIN_4 +225 0x0506 //RX_FDEQ_BIN_5 +226 0x0708 //RX_FDEQ_BIN_6 +227 0x090A //RX_FDEQ_BIN_7 +228 0x0B0C //RX_FDEQ_BIN_8 +229 0x0D0E //RX_FDEQ_BIN_9 +230 0x0E0F //RX_FDEQ_BIN_10 +231 0x0F10 //RX_FDEQ_BIN_11 +232 0x1011 //RX_FDEQ_BIN_12 +233 0x1112 //RX_FDEQ_BIN_13 +234 0x0000 //RX_FDEQ_BIN_14 +235 0x0000 //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x4000 //RX_FDEQ_RESRV_0 +245 0x0320 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0030 //RX_FDDRC_BAND_MARGIN_1 +248 0x0050 //RX_FDDRC_BAND_MARGIN_2 +249 0x0080 //RX_FDDRC_BAND_MARGIN_3 +250 0x0007 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x5000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x6400 //RX_FDDRC_THRD_3_2 +258 0x6400 //RX_FDDRC_THRD_3_3 +259 0x2000 //RX_FDDRC_SLANT_0_0 +260 0x2000 //RX_FDDRC_SLANT_0_1 +261 0x2000 //RX_FDDRC_SLANT_0_2 +262 0x2000 //RX_FDDRC_SLANT_0_3 +263 0x5333 //RX_FDDRC_SLANT_1_0 +264 0x5333 //RX_FDDRC_SLANT_1_1 +265 0x5333 //RX_FDDRC_SLANT_1_2 +266 0x5333 //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +268 0x0000 //RX_FILTINDX +269 0x0000 //RX_TDDRC_THRD_0 +270 0x0000 //RX_TDDRC_THRD_1 +271 0x7FFF //RX_TDDRC_THRD_2 +272 0x7FFF //RX_TDDRC_THRD_3 +273 0x7E70 //RX_TDDRC_SLANT_0 +274 0x7FFF //RX_TDDRC_SLANT_1 +275 0x1000 //RX_TDDRC_ALPHA_UP_0 +276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x199A //RX_TDDRC_HMNC_GAIN +279 0x0001 //RX_TDDRC_SMT_FLAG +280 0x0CCD //RX_TDDRC_SMT_W +281 0x0155 //RX_TDDRC_DRC_GAIN +282 0x7C00 //RX_LAMBDA_PKA_FP +283 0x2000 //RX_TPKA_FP +284 0x2000 //RX_MIN_G_FP +285 0x0080 //RX_MAX_G_FP +286 0x0100 //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 +288 0x0000 //RX_MAXLEVEL_CNG +289 0x3000 //RX_BWE_UV_TH +290 0x3000 //RX_BWE_UV_TH2 +291 0x1800 //RX_BWE_UV_TH3 +292 0x1000 //RX_BWE_V_TH +293 0x04CD //RX_BWE_GAIN1_V_TH1 +294 0x0F33 //RX_BWE_GAIN1_V_TH2 +295 0x7333 //RX_BWE_UV_EQ +296 0x199A //RX_BWE_V_EQ +297 0x7333 //RX_BWE_TONE_TH +298 0x0004 //RX_BWE_UV_HOLD_T +299 0x6CCD //RX_BWE_GAIN2_ALPHA +300 0x799A //RX_BWE_GAIN3_ALPHA +301 0x001E //RX_BWE_CUTOFF +302 0x3000 //RX_BWE_GAINFILL +303 0x3200 //RX_BWE_MAXTH_TONE +304 0x2000 //RX_BWE_EQ_0 +305 0x2000 //RX_BWE_EQ_1 +306 0x2000 //RX_BWE_EQ_2 +307 0x2000 //RX_BWE_EQ_3 +308 0x2000 //RX_BWE_EQ_4 +309 0x2000 //RX_BWE_EQ_5 +310 0x2000 //RX_BWE_EQ_6 +311 0x0000 //RX_BWE_RESRV_0 +312 0x0000 //RX_BWE_RESRV_1 +313 0x0000 //RX_BWE_RESRV_2 +#VOL 0 +163 0x1000 //RX_TDDRC_ALPHA_UP_1 +164 0x1000 //RX_TDDRC_ALPHA_UP_2 +165 0x1000 //RX_TDDRC_ALPHA_UP_3 +166 0x1000 //RX_TDDRC_ALPHA_UP_4 +184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +190 0x7FFF //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +269 0x0000 //RX_TDDRC_THRD_0 +270 0x0000 //RX_TDDRC_THRD_1 +271 0x7FFF //RX_TDDRC_THRD_2 +272 0x7FFF //RX_TDDRC_THRD_3 +273 0x7E70 //RX_TDDRC_SLANT_0 +274 0x7FFF //RX_TDDRC_SLANT_1 +275 0x1000 //RX_TDDRC_ALPHA_UP_0 +276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x199A //RX_TDDRC_HMNC_GAIN +279 0x0001 //RX_TDDRC_SMT_FLAG +280 0x0CCD //RX_TDDRC_SMT_W +281 0x0155 //RX_TDDRC_DRC_GAIN +195 0x001C //RX_FDEQ_SUBNUM +196 0x4848 //RX_FDEQ_GAIN_0 +197 0x4848 //RX_FDEQ_GAIN_1 +198 0x4848 //RX_FDEQ_GAIN_2 +199 0x4848 //RX_FDEQ_GAIN_3 +200 0x4848 //RX_FDEQ_GAIN_4 +201 0x4848 //RX_FDEQ_GAIN_5 +202 0x4848 //RX_FDEQ_GAIN_6 +203 0x4848 //RX_FDEQ_GAIN_7 +204 0x4848 //RX_FDEQ_GAIN_8 +205 0x3C3C //RX_FDEQ_GAIN_9 +206 0x3C3C //RX_FDEQ_GAIN_10 +207 0x3838 //RX_FDEQ_GAIN_11 +208 0x3838 //RX_FDEQ_GAIN_12 +209 0x3030 //RX_FDEQ_GAIN_13 +210 0x4848 //RX_FDEQ_GAIN_14 +211 0x4848 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0202 //RX_FDEQ_BIN_0 +221 0x0203 //RX_FDEQ_BIN_1 +222 0x0303 //RX_FDEQ_BIN_2 +223 0x0304 //RX_FDEQ_BIN_3 +224 0x0405 //RX_FDEQ_BIN_4 +225 0x0506 //RX_FDEQ_BIN_5 +226 0x0708 //RX_FDEQ_BIN_6 +227 0x090A //RX_FDEQ_BIN_7 +228 0x0B0C //RX_FDEQ_BIN_8 +229 0x0D0E //RX_FDEQ_BIN_9 +230 0x0E0F //RX_FDEQ_BIN_10 +231 0x0F10 //RX_FDEQ_BIN_11 +232 0x1011 //RX_FDEQ_BIN_12 +233 0x1112 //RX_FDEQ_BIN_13 +234 0x0000 //RX_FDEQ_BIN_14 +235 0x0000 //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x4000 //RX_FDEQ_RESRV_0 +245 0x0320 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0030 //RX_FDDRC_BAND_MARGIN_1 +248 0x0050 //RX_FDDRC_BAND_MARGIN_2 +249 0x0080 //RX_FDDRC_BAND_MARGIN_3 +250 0x0007 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x5000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x6400 //RX_FDDRC_THRD_3_2 +258 0x6400 //RX_FDDRC_THRD_3_3 +259 0x2000 //RX_FDDRC_SLANT_0_0 +260 0x2000 //RX_FDDRC_SLANT_0_1 +261 0x2000 //RX_FDDRC_SLANT_0_2 +262 0x2000 //RX_FDDRC_SLANT_0_3 +263 0x5333 //RX_FDDRC_SLANT_1_0 +264 0x5333 //RX_FDDRC_SLANT_1_1 +265 0x5333 //RX_FDDRC_SLANT_1_2 +266 0x5333 //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +286 0x0100 //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 +#VOL 1 +163 0x1000 //RX_TDDRC_ALPHA_UP_1 +164 0x1000 //RX_TDDRC_ALPHA_UP_2 +165 0x1000 //RX_TDDRC_ALPHA_UP_3 +166 0x1000 //RX_TDDRC_ALPHA_UP_4 +184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +190 0x7FFF //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +269 0x0000 //RX_TDDRC_THRD_0 +270 0x0000 //RX_TDDRC_THRD_1 +271 0x7FFF //RX_TDDRC_THRD_2 +272 0x7FFF //RX_TDDRC_THRD_3 +273 0x7E70 //RX_TDDRC_SLANT_0 +274 0x7FFF //RX_TDDRC_SLANT_1 +275 0x1000 //RX_TDDRC_ALPHA_UP_0 +276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x199A //RX_TDDRC_HMNC_GAIN +279 0x0001 //RX_TDDRC_SMT_FLAG +280 0x0CCD //RX_TDDRC_SMT_W +281 0x0155 //RX_TDDRC_DRC_GAIN +195 0x001C //RX_FDEQ_SUBNUM +196 0x4848 //RX_FDEQ_GAIN_0 +197 0x4848 //RX_FDEQ_GAIN_1 +198 0x4848 //RX_FDEQ_GAIN_2 +199 0x4848 //RX_FDEQ_GAIN_3 +200 0x4848 //RX_FDEQ_GAIN_4 +201 0x4848 //RX_FDEQ_GAIN_5 +202 0x4848 //RX_FDEQ_GAIN_6 +203 0x4848 //RX_FDEQ_GAIN_7 +204 0x4848 //RX_FDEQ_GAIN_8 +205 0x3C3C //RX_FDEQ_GAIN_9 +206 0x3C3C //RX_FDEQ_GAIN_10 +207 0x3838 //RX_FDEQ_GAIN_11 +208 0x3838 //RX_FDEQ_GAIN_12 +209 0x3030 //RX_FDEQ_GAIN_13 +210 0x4848 //RX_FDEQ_GAIN_14 +211 0x4848 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0202 //RX_FDEQ_BIN_0 +221 0x0203 //RX_FDEQ_BIN_1 +222 0x0303 //RX_FDEQ_BIN_2 +223 0x0304 //RX_FDEQ_BIN_3 +224 0x0405 //RX_FDEQ_BIN_4 +225 0x0506 //RX_FDEQ_BIN_5 +226 0x0708 //RX_FDEQ_BIN_6 +227 0x090A //RX_FDEQ_BIN_7 +228 0x0B0C //RX_FDEQ_BIN_8 +229 0x0D0E //RX_FDEQ_BIN_9 +230 0x0E0F //RX_FDEQ_BIN_10 +231 0x0F10 //RX_FDEQ_BIN_11 +232 0x1011 //RX_FDEQ_BIN_12 +233 0x1112 //RX_FDEQ_BIN_13 +234 0x0000 //RX_FDEQ_BIN_14 +235 0x0000 //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x4000 //RX_FDEQ_RESRV_0 +245 0x0320 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0030 //RX_FDDRC_BAND_MARGIN_1 +248 0x0050 //RX_FDDRC_BAND_MARGIN_2 +249 0x0080 //RX_FDDRC_BAND_MARGIN_3 +250 0x0007 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x5000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x6400 //RX_FDDRC_THRD_3_2 +258 0x6400 //RX_FDDRC_THRD_3_3 +259 0x2000 //RX_FDDRC_SLANT_0_0 +260 0x2000 //RX_FDDRC_SLANT_0_1 +261 0x2000 //RX_FDDRC_SLANT_0_2 +262 0x2000 //RX_FDDRC_SLANT_0_3 +263 0x5333 //RX_FDDRC_SLANT_1_0 +264 0x5333 //RX_FDDRC_SLANT_1_1 +265 0x5333 //RX_FDDRC_SLANT_1_2 +266 0x5333 //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +286 0x0100 //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 +#VOL 2 +163 0x1000 //RX_TDDRC_ALPHA_UP_1 +164 0x1000 //RX_TDDRC_ALPHA_UP_2 +165 0x1000 //RX_TDDRC_ALPHA_UP_3 +166 0x1000 //RX_TDDRC_ALPHA_UP_4 +184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +190 0x7FFF //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +269 0x0000 //RX_TDDRC_THRD_0 +270 0x0000 //RX_TDDRC_THRD_1 +271 0x7FFF //RX_TDDRC_THRD_2 +272 0x7FFF //RX_TDDRC_THRD_3 +273 0x7E70 //RX_TDDRC_SLANT_0 +274 0x7FFF //RX_TDDRC_SLANT_1 +275 0x1000 //RX_TDDRC_ALPHA_UP_0 +276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x199A //RX_TDDRC_HMNC_GAIN +279 0x0001 //RX_TDDRC_SMT_FLAG +280 0x0CCD //RX_TDDRC_SMT_W +281 0x0155 //RX_TDDRC_DRC_GAIN +195 0x001C //RX_FDEQ_SUBNUM +196 0x4848 //RX_FDEQ_GAIN_0 +197 0x4848 //RX_FDEQ_GAIN_1 +198 0x4848 //RX_FDEQ_GAIN_2 +199 0x4848 //RX_FDEQ_GAIN_3 +200 0x4848 //RX_FDEQ_GAIN_4 +201 0x4848 //RX_FDEQ_GAIN_5 +202 0x4848 //RX_FDEQ_GAIN_6 +203 0x4848 //RX_FDEQ_GAIN_7 +204 0x4848 //RX_FDEQ_GAIN_8 +205 0x3C3C //RX_FDEQ_GAIN_9 +206 0x3C3C //RX_FDEQ_GAIN_10 +207 0x3838 //RX_FDEQ_GAIN_11 +208 0x3838 //RX_FDEQ_GAIN_12 +209 0x3030 //RX_FDEQ_GAIN_13 +210 0x4848 //RX_FDEQ_GAIN_14 +211 0x4848 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0202 //RX_FDEQ_BIN_0 +221 0x0203 //RX_FDEQ_BIN_1 +222 0x0303 //RX_FDEQ_BIN_2 +223 0x0304 //RX_FDEQ_BIN_3 +224 0x0405 //RX_FDEQ_BIN_4 +225 0x0506 //RX_FDEQ_BIN_5 +226 0x0708 //RX_FDEQ_BIN_6 +227 0x090A //RX_FDEQ_BIN_7 +228 0x0B0C //RX_FDEQ_BIN_8 +229 0x0D0E //RX_FDEQ_BIN_9 +230 0x0E0F //RX_FDEQ_BIN_10 +231 0x0F10 //RX_FDEQ_BIN_11 +232 0x1011 //RX_FDEQ_BIN_12 +233 0x1112 //RX_FDEQ_BIN_13 +234 0x0000 //RX_FDEQ_BIN_14 +235 0x0000 //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x4000 //RX_FDEQ_RESRV_0 +245 0x0320 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0030 //RX_FDDRC_BAND_MARGIN_1 +248 0x0050 //RX_FDDRC_BAND_MARGIN_2 +249 0x0080 //RX_FDDRC_BAND_MARGIN_3 +250 0x0007 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x5000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x6400 //RX_FDDRC_THRD_3_2 +258 0x6400 //RX_FDDRC_THRD_3_3 +259 0x2000 //RX_FDDRC_SLANT_0_0 +260 0x2000 //RX_FDDRC_SLANT_0_1 +261 0x2000 //RX_FDDRC_SLANT_0_2 +262 0x2000 //RX_FDDRC_SLANT_0_3 +263 0x5333 //RX_FDDRC_SLANT_1_0 +264 0x5333 //RX_FDDRC_SLANT_1_1 +265 0x5333 //RX_FDDRC_SLANT_1_2 +266 0x5333 //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +286 0x0100 //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 +#VOL 3 +163 0x1000 //RX_TDDRC_ALPHA_UP_1 +164 0x1000 //RX_TDDRC_ALPHA_UP_2 +165 0x1000 //RX_TDDRC_ALPHA_UP_3 +166 0x1000 //RX_TDDRC_ALPHA_UP_4 +184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +190 0x7FFF //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +269 0x0000 //RX_TDDRC_THRD_0 +270 0x0000 //RX_TDDRC_THRD_1 +271 0x7FFF //RX_TDDRC_THRD_2 +272 0x7FFF //RX_TDDRC_THRD_3 +273 0x7E70 //RX_TDDRC_SLANT_0 +274 0x7FFF //RX_TDDRC_SLANT_1 +275 0x1000 //RX_TDDRC_ALPHA_UP_0 +276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x199A //RX_TDDRC_HMNC_GAIN +279 0x0001 //RX_TDDRC_SMT_FLAG +280 0x0CCD //RX_TDDRC_SMT_W +281 0x0155 //RX_TDDRC_DRC_GAIN +195 0x001C //RX_FDEQ_SUBNUM +196 0x4848 //RX_FDEQ_GAIN_0 +197 0x4848 //RX_FDEQ_GAIN_1 +198 0x4848 //RX_FDEQ_GAIN_2 +199 0x4848 //RX_FDEQ_GAIN_3 +200 0x4848 //RX_FDEQ_GAIN_4 +201 0x4848 //RX_FDEQ_GAIN_5 +202 0x4848 //RX_FDEQ_GAIN_6 +203 0x4848 //RX_FDEQ_GAIN_7 +204 0x4848 //RX_FDEQ_GAIN_8 +205 0x3C3C //RX_FDEQ_GAIN_9 +206 0x3C3C //RX_FDEQ_GAIN_10 +207 0x3838 //RX_FDEQ_GAIN_11 +208 0x3838 //RX_FDEQ_GAIN_12 +209 0x3030 //RX_FDEQ_GAIN_13 +210 0x4848 //RX_FDEQ_GAIN_14 +211 0x4848 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0202 //RX_FDEQ_BIN_0 +221 0x0203 //RX_FDEQ_BIN_1 +222 0x0303 //RX_FDEQ_BIN_2 +223 0x0304 //RX_FDEQ_BIN_3 +224 0x0405 //RX_FDEQ_BIN_4 +225 0x0506 //RX_FDEQ_BIN_5 +226 0x0708 //RX_FDEQ_BIN_6 +227 0x090A //RX_FDEQ_BIN_7 +228 0x0B0C //RX_FDEQ_BIN_8 +229 0x0D0E //RX_FDEQ_BIN_9 +230 0x0E0F //RX_FDEQ_BIN_10 +231 0x0F10 //RX_FDEQ_BIN_11 +232 0x1011 //RX_FDEQ_BIN_12 +233 0x1112 //RX_FDEQ_BIN_13 +234 0x0000 //RX_FDEQ_BIN_14 +235 0x0000 //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x4000 //RX_FDEQ_RESRV_0 +245 0x0320 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0030 //RX_FDDRC_BAND_MARGIN_1 +248 0x0050 //RX_FDDRC_BAND_MARGIN_2 +249 0x0080 //RX_FDDRC_BAND_MARGIN_3 +250 0x0007 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x5000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x6400 //RX_FDDRC_THRD_3_2 +258 0x6400 //RX_FDDRC_THRD_3_3 +259 0x2000 //RX_FDDRC_SLANT_0_0 +260 0x2000 //RX_FDDRC_SLANT_0_1 +261 0x2000 //RX_FDDRC_SLANT_0_2 +262 0x2000 //RX_FDDRC_SLANT_0_3 +263 0x5333 //RX_FDDRC_SLANT_1_0 +264 0x5333 //RX_FDDRC_SLANT_1_1 +265 0x5333 //RX_FDDRC_SLANT_1_2 +266 0x5333 //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +286 0x0100 //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 +#VOL 4 +163 0x1000 //RX_TDDRC_ALPHA_UP_1 +164 0x1000 //RX_TDDRC_ALPHA_UP_2 +165 0x1000 //RX_TDDRC_ALPHA_UP_3 +166 0x1000 //RX_TDDRC_ALPHA_UP_4 +184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +190 0x7FFF //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +269 0x0000 //RX_TDDRC_THRD_0 +270 0x0000 //RX_TDDRC_THRD_1 +271 0x7FFF //RX_TDDRC_THRD_2 +272 0x7FFF //RX_TDDRC_THRD_3 +273 0x7E70 //RX_TDDRC_SLANT_0 +274 0x7FFF //RX_TDDRC_SLANT_1 +275 0x1000 //RX_TDDRC_ALPHA_UP_0 +276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x199A //RX_TDDRC_HMNC_GAIN +279 0x0001 //RX_TDDRC_SMT_FLAG +280 0x0CCD //RX_TDDRC_SMT_W +281 0x0155 //RX_TDDRC_DRC_GAIN +195 0x001C //RX_FDEQ_SUBNUM +196 0x4848 //RX_FDEQ_GAIN_0 +197 0x4848 //RX_FDEQ_GAIN_1 +198 0x4848 //RX_FDEQ_GAIN_2 +199 0x4848 //RX_FDEQ_GAIN_3 +200 0x4848 //RX_FDEQ_GAIN_4 +201 0x4848 //RX_FDEQ_GAIN_5 +202 0x4848 //RX_FDEQ_GAIN_6 +203 0x4848 //RX_FDEQ_GAIN_7 +204 0x4848 //RX_FDEQ_GAIN_8 +205 0x3C3C //RX_FDEQ_GAIN_9 +206 0x3C3C //RX_FDEQ_GAIN_10 +207 0x3838 //RX_FDEQ_GAIN_11 +208 0x3838 //RX_FDEQ_GAIN_12 +209 0x3030 //RX_FDEQ_GAIN_13 +210 0x4848 //RX_FDEQ_GAIN_14 +211 0x4848 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0202 //RX_FDEQ_BIN_0 +221 0x0203 //RX_FDEQ_BIN_1 +222 0x0303 //RX_FDEQ_BIN_2 +223 0x0304 //RX_FDEQ_BIN_3 +224 0x0405 //RX_FDEQ_BIN_4 +225 0x0506 //RX_FDEQ_BIN_5 +226 0x0708 //RX_FDEQ_BIN_6 +227 0x090A //RX_FDEQ_BIN_7 +228 0x0B0C //RX_FDEQ_BIN_8 +229 0x0D0E //RX_FDEQ_BIN_9 +230 0x0E0F //RX_FDEQ_BIN_10 +231 0x0F10 //RX_FDEQ_BIN_11 +232 0x1011 //RX_FDEQ_BIN_12 +233 0x1112 //RX_FDEQ_BIN_13 +234 0x0000 //RX_FDEQ_BIN_14 +235 0x0000 //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x4000 //RX_FDEQ_RESRV_0 +245 0x0320 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0030 //RX_FDDRC_BAND_MARGIN_1 +248 0x0050 //RX_FDDRC_BAND_MARGIN_2 +249 0x0080 //RX_FDDRC_BAND_MARGIN_3 +250 0x0007 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x5000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x6400 //RX_FDDRC_THRD_3_2 +258 0x6400 //RX_FDDRC_THRD_3_3 +259 0x2000 //RX_FDDRC_SLANT_0_0 +260 0x2000 //RX_FDDRC_SLANT_0_1 +261 0x2000 //RX_FDDRC_SLANT_0_2 +262 0x2000 //RX_FDDRC_SLANT_0_3 +263 0x5333 //RX_FDDRC_SLANT_1_0 +264 0x5333 //RX_FDDRC_SLANT_1_1 +265 0x5333 //RX_FDDRC_SLANT_1_2 +266 0x5333 //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +286 0x0100 //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 +#VOL 5 +163 0x1000 //RX_TDDRC_ALPHA_UP_1 +164 0x1000 //RX_TDDRC_ALPHA_UP_2 +165 0x1000 //RX_TDDRC_ALPHA_UP_3 +166 0x1000 //RX_TDDRC_ALPHA_UP_4 +184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +190 0x7FFF //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +269 0x0000 //RX_TDDRC_THRD_0 +270 0x0000 //RX_TDDRC_THRD_1 +271 0x7FFF //RX_TDDRC_THRD_2 +272 0x7FFF //RX_TDDRC_THRD_3 +273 0x7E70 //RX_TDDRC_SLANT_0 +274 0x7FFF //RX_TDDRC_SLANT_1 +275 0x1000 //RX_TDDRC_ALPHA_UP_0 +276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x199A //RX_TDDRC_HMNC_GAIN +279 0x0001 //RX_TDDRC_SMT_FLAG +280 0x0CCD //RX_TDDRC_SMT_W +281 0x0155 //RX_TDDRC_DRC_GAIN +195 0x001C //RX_FDEQ_SUBNUM +196 0x4848 //RX_FDEQ_GAIN_0 +197 0x4848 //RX_FDEQ_GAIN_1 +198 0x4848 //RX_FDEQ_GAIN_2 +199 0x4848 //RX_FDEQ_GAIN_3 +200 0x4848 //RX_FDEQ_GAIN_4 +201 0x4848 //RX_FDEQ_GAIN_5 +202 0x4848 //RX_FDEQ_GAIN_6 +203 0x4848 //RX_FDEQ_GAIN_7 +204 0x4848 //RX_FDEQ_GAIN_8 +205 0x3C3C //RX_FDEQ_GAIN_9 +206 0x3C3C //RX_FDEQ_GAIN_10 +207 0x3838 //RX_FDEQ_GAIN_11 +208 0x3838 //RX_FDEQ_GAIN_12 +209 0x3030 //RX_FDEQ_GAIN_13 +210 0x4848 //RX_FDEQ_GAIN_14 +211 0x4848 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0202 //RX_FDEQ_BIN_0 +221 0x0203 //RX_FDEQ_BIN_1 +222 0x0303 //RX_FDEQ_BIN_2 +223 0x0304 //RX_FDEQ_BIN_3 +224 0x0405 //RX_FDEQ_BIN_4 +225 0x0506 //RX_FDEQ_BIN_5 +226 0x0708 //RX_FDEQ_BIN_6 +227 0x090A //RX_FDEQ_BIN_7 +228 0x0B0C //RX_FDEQ_BIN_8 +229 0x0D0E //RX_FDEQ_BIN_9 +230 0x0E0F //RX_FDEQ_BIN_10 +231 0x0F10 //RX_FDEQ_BIN_11 +232 0x1011 //RX_FDEQ_BIN_12 +233 0x1112 //RX_FDEQ_BIN_13 +234 0x0000 //RX_FDEQ_BIN_14 +235 0x0000 //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x4000 //RX_FDEQ_RESRV_0 +245 0x0320 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0030 //RX_FDDRC_BAND_MARGIN_1 +248 0x0050 //RX_FDDRC_BAND_MARGIN_2 +249 0x0080 //RX_FDDRC_BAND_MARGIN_3 +250 0x0007 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x5000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x6400 //RX_FDDRC_THRD_3_2 +258 0x6400 //RX_FDDRC_THRD_3_3 +259 0x2000 //RX_FDDRC_SLANT_0_0 +260 0x2000 //RX_FDDRC_SLANT_0_1 +261 0x2000 //RX_FDDRC_SLANT_0_2 +262 0x2000 //RX_FDDRC_SLANT_0_3 +263 0x5333 //RX_FDDRC_SLANT_1_0 +264 0x5333 //RX_FDDRC_SLANT_1_1 +265 0x5333 //RX_FDDRC_SLANT_1_2 +266 0x5333 //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +286 0x0100 //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 +#VOL 6 +163 0x1000 //RX_TDDRC_ALPHA_UP_1 +164 0x1000 //RX_TDDRC_ALPHA_UP_2 +165 0x1000 //RX_TDDRC_ALPHA_UP_3 +166 0x1000 //RX_TDDRC_ALPHA_UP_4 +184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +190 0x7FFF //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +269 0x0000 //RX_TDDRC_THRD_0 +270 0x0000 //RX_TDDRC_THRD_1 +271 0x7FFF //RX_TDDRC_THRD_2 +272 0x7FFF //RX_TDDRC_THRD_3 +273 0x7E70 //RX_TDDRC_SLANT_0 +274 0x7FFF //RX_TDDRC_SLANT_1 +275 0x1000 //RX_TDDRC_ALPHA_UP_0 +276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x199A //RX_TDDRC_HMNC_GAIN +279 0x0001 //RX_TDDRC_SMT_FLAG +280 0x0CCD //RX_TDDRC_SMT_W +281 0x0155 //RX_TDDRC_DRC_GAIN +195 0x001C //RX_FDEQ_SUBNUM +196 0x4848 //RX_FDEQ_GAIN_0 +197 0x4848 //RX_FDEQ_GAIN_1 +198 0x4848 //RX_FDEQ_GAIN_2 +199 0x4848 //RX_FDEQ_GAIN_3 +200 0x4848 //RX_FDEQ_GAIN_4 +201 0x4848 //RX_FDEQ_GAIN_5 +202 0x4848 //RX_FDEQ_GAIN_6 +203 0x4848 //RX_FDEQ_GAIN_7 +204 0x4848 //RX_FDEQ_GAIN_8 +205 0x3C3C //RX_FDEQ_GAIN_9 +206 0x3C3C //RX_FDEQ_GAIN_10 +207 0x3838 //RX_FDEQ_GAIN_11 +208 0x3838 //RX_FDEQ_GAIN_12 +209 0x3030 //RX_FDEQ_GAIN_13 +210 0x4848 //RX_FDEQ_GAIN_14 +211 0x4848 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0202 //RX_FDEQ_BIN_0 +221 0x0203 //RX_FDEQ_BIN_1 +222 0x0303 //RX_FDEQ_BIN_2 +223 0x0304 //RX_FDEQ_BIN_3 +224 0x0405 //RX_FDEQ_BIN_4 +225 0x0506 //RX_FDEQ_BIN_5 +226 0x0708 //RX_FDEQ_BIN_6 +227 0x090A //RX_FDEQ_BIN_7 +228 0x0B0C //RX_FDEQ_BIN_8 +229 0x0D0E //RX_FDEQ_BIN_9 +230 0x0E0F //RX_FDEQ_BIN_10 +231 0x0F10 //RX_FDEQ_BIN_11 +232 0x1011 //RX_FDEQ_BIN_12 +233 0x1112 //RX_FDEQ_BIN_13 +234 0x0000 //RX_FDEQ_BIN_14 +235 0x0000 //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x4000 //RX_FDEQ_RESRV_0 +245 0x0320 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0030 //RX_FDDRC_BAND_MARGIN_1 +248 0x0050 //RX_FDDRC_BAND_MARGIN_2 +249 0x0080 //RX_FDDRC_BAND_MARGIN_3 +250 0x0007 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x5000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x6400 //RX_FDDRC_THRD_3_2 +258 0x6400 //RX_FDDRC_THRD_3_3 +259 0x2000 //RX_FDDRC_SLANT_0_0 +260 0x2000 //RX_FDDRC_SLANT_0_1 +261 0x2000 //RX_FDDRC_SLANT_0_2 +262 0x2000 //RX_FDDRC_SLANT_0_3 +263 0x5333 //RX_FDDRC_SLANT_1_0 +264 0x5333 //RX_FDDRC_SLANT_1_1 +265 0x5333 //RX_FDDRC_SLANT_1_2 +266 0x5333 //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +286 0x0100 //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 #CASE_NAME BLUETOOTH-BTWB_NREC-VOICE_GENERIC-SWB -#PARAM_TYPE TX+RX -#TOTAL_CUSTOM_STEP 7 +#PARAM_MODE Full +#PARAM_TYPE TX+2RX +#TOTAL_CUSTOM_STEP 7+7 #TX 0 0x0001 //TX_OPERATION_MODE_0 1 0x0001 //TX_OPERATION_MODE_1 @@ -33565,20 +50989,20 @@ 248 0xF400 //TX_THR_SN_EST_6 249 0xF600 //TX_THR_SN_EST_7 250 0x0000 //TX_DELTA_THR_SN_EST_0 -251 0x0000 //TX_DELTA_THR_SN_EST_1 +251 0x0200 //TX_DELTA_THR_SN_EST_1 252 0x0200 //TX_DELTA_THR_SN_EST_2 253 0x0200 //TX_DELTA_THR_SN_EST_3 254 0x0200 //TX_DELTA_THR_SN_EST_4 255 0x0200 //TX_DELTA_THR_SN_EST_5 -256 0x0200 //TX_DELTA_THR_SN_EST_6 +256 0x0000 //TX_DELTA_THR_SN_EST_6 257 0x0200 //TX_DELTA_THR_SN_EST_7 258 0x6000 //TX_LAMBDA_NN_EST_0 -259 0x6000 //TX_LAMBDA_NN_EST_1 +259 0x4000 //TX_LAMBDA_NN_EST_1 260 0x4000 //TX_LAMBDA_NN_EST_2 261 0x4000 //TX_LAMBDA_NN_EST_3 262 0x4000 //TX_LAMBDA_NN_EST_4 263 0x4000 //TX_LAMBDA_NN_EST_5 -264 0x4000 //TX_LAMBDA_NN_EST_6 +264 0x6000 //TX_LAMBDA_NN_EST_6 265 0x4000 //TX_LAMBDA_NN_EST_7 266 0x0400 //TX_N_SN_EST 267 0x001E //TX_INBEAM_T @@ -33596,16 +51020,16 @@ 279 0x1000 //TX_B_POST_FLT_0 280 0x1000 //TX_B_POST_FLT_1 281 0x000B //TX_NS_LVL_CTRL_0 -282 0x000F //TX_NS_LVL_CTRL_1 -283 0x0011 //TX_NS_LVL_CTRL_2 +282 0x0011 //TX_NS_LVL_CTRL_1 +283 0x000F //TX_NS_LVL_CTRL_2 284 0x000F //TX_NS_LVL_CTRL_3 285 0x000F //TX_NS_LVL_CTRL_4 286 0x000F //TX_NS_LVL_CTRL_5 287 0x000F //TX_NS_LVL_CTRL_6 288 0x0011 //TX_NS_LVL_CTRL_7 289 0x000C //TX_MIN_GAIN_S_0 -290 0x000C //TX_MIN_GAIN_S_1 -291 0x000F //TX_MIN_GAIN_S_2 +290 0x000F //TX_MIN_GAIN_S_1 +291 0x000C //TX_MIN_GAIN_S_2 292 0x000C //TX_MIN_GAIN_S_3 293 0x000C //TX_MIN_GAIN_S_4 294 0x000C //TX_MIN_GAIN_S_5 @@ -33629,12 +51053,12 @@ 312 0x7FFF //TX_A_POST_FILT_0 313 0x2000 //TX_A_POST_FILT_1 314 0x2000 //TX_A_POST_FILT_S_0 -315 0x4000 //TX_A_POST_FILT_S_1 +315 0x5000 //TX_A_POST_FILT_S_1 316 0x5000 //TX_A_POST_FILT_S_2 317 0x5000 //TX_A_POST_FILT_S_3 318 0x5000 //TX_A_POST_FILT_S_4 319 0x5000 //TX_A_POST_FILT_S_5 -320 0x5000 //TX_A_POST_FILT_S_6 +320 0x4000 //TX_A_POST_FILT_S_6 321 0x5000 //TX_A_POST_FILT_S_7 322 0x1000 //TX_B_POST_FILT_0 323 0x1000 //TX_B_POST_FILT_1 @@ -33694,10 +51118,10 @@ 377 0x7FFF //TX_NOISE_TH_5_4 378 0x044C //TX_NOISE_TH_6 379 0x0014 //TX_MINENOISE_TH -380 0x4000 //TX_MINENOISE_MIC0_TH_MTS -381 0xFFEE //TX_MINENOISE_MIC0_TH_EXP -382 0x6000 //TX_MINENOISE_MIC0_S_TH_MTS -383 0xFFF3 //TX_MINENOISE_MIC0_S_TH_EXP +380 0x4000 //TX_MORENS_TFMASK_TH +381 0xFFEE //TX_DRC_QUIET_FLOOR +382 0x6000 //TX_RATIODTL_CUT_TH +383 0xFFF3 //TX_DT_CUT_K1 384 0x0666 //TX_OUT_ENER_S_TH_CLEAN 385 0x0666 //TX_OUT_ENER_S_TH_LESSCLEAN 386 0x0333 //TX_OUT_ENER_S_TH_NOISY @@ -33705,15 +51129,15 @@ 388 0x0333 //TX_OUT_ENER_TH_SPEECH 389 0x2000 //TX_SN_NPB_GAIN 390 0x0000 //TX_NN_NPB_GAIN -391 0x0000 //TX_CSX_ALPHA_0 -392 0x0000 //TX_CSX_ALPHA_1 -393 0x0000 //TX_CSX_ALPHA_2 -394 0x0000 //TX_CSX_ALPHA_3 -395 0x0800 //TX_MU_ARSP_EST -396 0x00C8 //TX_P_OUTBEAM_MIN_TH +391 0x0000 //TX_POST_MASK_SUP_HSNE +392 0x0000 //TX_TAIL_DET_TH +393 0x0000 //TX_B_LESSCUT_RTO_WTA +394 0x0000 //TX_MEL_G_R +395 0x0800 //TX_SUPHIGH_TH +396 0x00C8 //TX_MASK_G_R 397 0x0002 //TX_EXTRA_NS_L -398 0x0800 //TX_EXTRA_NS_A -399 0x0005 //TX_VR_NOISE_FLOOR_TH +398 0x0800 //TX_C_POST_FLT_MASK +399 0x0005 //TX_A_POST_FLT_WNS 400 0x0148 //TX_MIN_G_LOW300HZ 401 0x0002 //TX_MAXLEVEL_CNG 402 0x00B4 //TX_STN_NOISE_TH @@ -33828,16 +51252,16 @@ 511 0x6666 //TX_MIC_TO_BFGAIN 512 0x0000 //TX_MICTOBFGAIN0 513 0x0000 //TX_FASTMUE_TH -514 0x0000 //TX_DERVB_LEN_0 -515 0x0000 //TX_DERVB_LEN_1 -516 0x0000 //TX_RHO_DERVB -517 0x0000 //TX_MIC_INDX_DERVB -518 0x0000 //TX_MU_DERVB -519 0x0000 //TX_DR_RESRV_0 -520 0x0000 //TX_DR_RESRV_1 -521 0x0000 //TX_DR_RESRV_2 -522 0x0000 //TX_DR_RESRV_3 -523 0x0000 //TX_DR_RESRV_4 +514 0x0000 //TX_DEREVERB_LF_MU +515 0x0000 //TX_DEREVERB_HF_MU +516 0x0000 //TX_DEREVERB_DELAY +517 0x0000 //TX_DEREVERB_COEF_LEN +518 0x0000 //TX_DEREVERB_DNR +519 0x0000 //TX_DEREVERB_ALPHA +520 0x0000 //TX_DEREVERB_BETA +521 0x0000 //TX_GSC_RTOL_TH +522 0x0000 //TX_GSC_RTOH_TH +523 0x0000 //TX_WIDE2_MEANHTH 524 0x0000 //TX_DR_RESRV_5 525 0x0000 //TX_DR_RESRV_6 526 0x0000 //TX_DR_RESRV_7 @@ -34211,8 +51635,73 @@ 894 0xC000 //TX_FASTNS_SSA_THHFL 895 0xCCCC //TX_FASTNS_SSA_THLFH 896 0xD999 //TX_FASTNS_SSA_THHFH +897 0x0000 //TX_SENDFUNC_REG_MICMUTE +898 0x0000 //TX_SENDFUNC_REG_MICMUTE1 +899 0x0000 //TX_MICMUTE_RATIO_THR +900 0x0000 //TX_MICMUTE_AMP_THR +901 0x0000 //TX_MICMUTE_HPF_IND +902 0x0000 //TX_MICMUTE_LOG_EYR_TH +903 0x0000 //TX_MICMUTE_CVG_TIME +904 0x0000 //TX_MICMUTE_RELEASE_TIME +905 0x0000 //TX_MIC_VOLUME_MIC0MUTE +906 0x0000 //TX_MICMUTE_EPD_OFFSET_0 +907 0x0000 //TX_MICMUTE_FRQ_AEC_L +908 0x0000 //TX_MICMUTE_EAD_THR +909 0x0000 //TX_MICMUTE_LAMBDA_CB_NLE +910 0x0000 //TX_MICMUTE_LAMBDA_RE_EST +911 0x0000 //TX_DTD_THR1_MICMUTE_0 +912 0x0000 //TX_DTD_THR1_MICMUTE_1 +913 0x0000 //TX_DTD_THR1_MICMUTE_2 +914 0x0000 //TX_DTD_THR1_MICMUTE_3 +915 0x0000 //TX_DTD_THR2_MICMUTE_0 +916 0x0000 //TX_MICMUTE_MIN_EQ_RE_EST_0 +917 0x0000 //TX_MICMUTE_MIN_EQ_RE_EST_1 +918 0x0000 //TX_MICMUTE_MIN_EQ_RE_EST_2 +919 0x0000 //TX_MICMUTE_MIN_EQ_RE_EST_3 +920 0x0000 //TX_MICMUTE_MIN_EQ_RE_EST_4 +921 0x0000 //TX_MICMUTE_C_POST_FLT +922 0x0000 //TX_MICMUTE_DT_CUT_K +923 0x0000 //TX_MICMUTE_DT_CUT_THR +924 0x0000 //TX_MICMUTE_DT_CUT_K2 +925 0x0000 //TX_MICMUTE_DT_CUT_THR2 +926 0x0000 //TX_MICMUTE_DT2_HOLD_N +927 0x0000 //TX_MICMUTE_RATIODTH_THCUT +928 0x0000 //TX_MICMUTE_B_POST_FLT_ECHOL +929 0x0000 //TX_MICMUTE_B_POST_FLT_ECHOH +930 0x0000 //TX_MICMUTE_C_POST_FLT_MASK +931 0x0000 //TX_MICMUTE_RATIODTL_CUT_TH +932 0x0000 //TX_MICMUTE_DT_CUT_K1 +933 0x0000 //TX_MICMUTE_N2_SN_EST +934 0x0000 //TX_MICMUTE_THR_SN_EST_0 +935 0x0000 //TX_MICMUTE_MIN_G_CTRL_0 +936 0x0000 //TX_MICMUTE_A_POST_FILT_S_0 +937 0x0000 //TX_MICMUTE_B_POST_FILT_0 +938 0x0000 //TX_MIC1RUB_AMP_THR +939 0x0000 //TX_MIC1MUTE_RATIO_THR +940 0x0000 //TX_MIC1MUTE_AMP_THR +941 0x0000 //TX_MIC1MUTE_CVG_TIME +942 0x0000 //TX_MIC1MUTE_RELEASE_TIME +943 0x0000 //TX_AMS_RESRV_01 +944 0x0000 //TX_AMS_RESRV_02 +945 0x0000 //TX_AMS_RESRV_03 +946 0x0000 //TX_AMS_RESRV_04 +947 0x0000 //TX_AMS_RESRV_05 +948 0x0000 //TX_AMS_RESRV_06 +949 0x0000 //TX_AMS_RESRV_07 +950 0x0000 //TX_AMS_RESRV_08 +951 0x0000 //TX_AMS_RESRV_09 +952 0x0000 //TX_AMS_RESRV_10 +953 0x0000 //TX_AMS_RESRV_11 +954 0x0000 //TX_AMS_RESRV_12 +955 0x0000 //TX_AMS_RESRV_13 +956 0x0000 //TX_AMS_RESRV_14 +957 0x0000 //TX_AMS_RESRV_15 +958 0x0000 //TX_AMS_RESRV_16 +959 0x0000 //TX_AMS_RESRV_17 +960 0x0000 //TX_AMS_RESRV_18 +961 0x0000 //TX_AMS_RESRV_19 #RX -0 0x0064 //RX_RECVFUNC_MODE_0 +0 0x2064 //RX_RECVFUNC_MODE_0 1 0x0000 //RX_RECVFUNC_MODE_1 2 0x0003 //RX_SAMPLINGFREQ_SIG 3 0x0003 //RX_SAMPLINGFREQ_PROC @@ -35062,10 +52551,862 @@ 110 0x0000 //RX_FDDRC_RESRV_0 129 0x0100 //RX_SPK_VOL 130 0x0000 //RX_VOL_RESRV_0 +#RX 2 +157 0x2064 //RX_RECVFUNC_MODE_0 +158 0x0000 //RX_RECVFUNC_MODE_1 +159 0x0003 //RX_SAMPLINGFREQ_SIG +160 0x0003 //RX_SAMPLINGFREQ_PROC +161 0x000A //RX_FRAME_SZ +162 0x0000 //RX_DELAY_OPT +163 0x3000 //RX_TDDRC_ALPHA_UP_1 +164 0x3000 //RX_TDDRC_ALPHA_UP_2 +165 0x3000 //RX_TDDRC_ALPHA_UP_3 +166 0x3000 //RX_TDDRC_ALPHA_UP_4 +167 0x0800 //RX_PGA +168 0x7FFF //RX_A_HP +169 0x0000 //RX_B_PE +170 0x1800 //RX_THR_PITCH_DET_0 +171 0x1000 //RX_THR_PITCH_DET_1 +172 0x0800 //RX_THR_PITCH_DET_2 +173 0x0008 //RX_PITCH_BFR_LEN +174 0x0003 //RX_SBD_PITCH_DET +175 0x0100 //RX_PP_RESRV_0 +176 0x0020 //RX_PP_RESRV_1 +177 0x0400 //RX_N_SN_EST +178 0x000C //RX_N2_SN_EST +179 0x0003 //RX_NS_LVL_CTRL +180 0x9000 //RX_THR_SN_EST +181 0x7CCD //RX_LAMBDA_PFILT +182 0x000A //RX_FENS_RESRV_0 +183 0x0190 //RX_FENS_RESRV_1 +184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +187 0x0002 //RX_EXTRA_NS_L +188 0x0800 //RX_EXTRA_NS_A +189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +190 0x7FFF //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +192 0x199A //RX_A_POST_FLT +193 0x0000 //RX_LMT_THRD +194 0x4000 //RX_LMT_ALPHA +195 0x0020 //RX_FDEQ_SUBNUM +196 0x4848 //RX_FDEQ_GAIN_0 +197 0x4848 //RX_FDEQ_GAIN_1 +198 0x4848 //RX_FDEQ_GAIN_2 +199 0x4848 //RX_FDEQ_GAIN_3 +200 0x4848 //RX_FDEQ_GAIN_4 +201 0x4848 //RX_FDEQ_GAIN_5 +202 0x4848 //RX_FDEQ_GAIN_6 +203 0x4848 //RX_FDEQ_GAIN_7 +204 0x4848 //RX_FDEQ_GAIN_8 +205 0x4848 //RX_FDEQ_GAIN_9 +206 0x4848 //RX_FDEQ_GAIN_10 +207 0x4848 //RX_FDEQ_GAIN_11 +208 0x4848 //RX_FDEQ_GAIN_12 +209 0x4848 //RX_FDEQ_GAIN_13 +210 0x4848 //RX_FDEQ_GAIN_14 +211 0x4848 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0202 //RX_FDEQ_BIN_0 +221 0x0203 //RX_FDEQ_BIN_1 +222 0x0303 //RX_FDEQ_BIN_2 +223 0x0304 //RX_FDEQ_BIN_3 +224 0x0405 //RX_FDEQ_BIN_4 +225 0x0506 //RX_FDEQ_BIN_5 +226 0x0708 //RX_FDEQ_BIN_6 +227 0x090A //RX_FDEQ_BIN_7 +228 0x0B0C //RX_FDEQ_BIN_8 +229 0x0D0E //RX_FDEQ_BIN_9 +230 0x1013 //RX_FDEQ_BIN_10 +231 0x1719 //RX_FDEQ_BIN_11 +232 0x1B1E //RX_FDEQ_BIN_12 +233 0x1E1E //RX_FDEQ_BIN_13 +234 0x1E28 //RX_FDEQ_BIN_14 +235 0x282C //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x4000 //RX_FDEQ_RESRV_0 +245 0x0320 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0030 //RX_FDDRC_BAND_MARGIN_1 +248 0x0050 //RX_FDDRC_BAND_MARGIN_2 +249 0x0080 //RX_FDDRC_BAND_MARGIN_3 +250 0x0007 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x5000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x6400 //RX_FDDRC_THRD_3_2 +258 0x6400 //RX_FDDRC_THRD_3_3 +259 0x2000 //RX_FDDRC_SLANT_0_0 +260 0x2000 //RX_FDDRC_SLANT_0_1 +261 0x2000 //RX_FDDRC_SLANT_0_2 +262 0x2000 //RX_FDDRC_SLANT_0_3 +263 0x5333 //RX_FDDRC_SLANT_1_0 +264 0x5333 //RX_FDDRC_SLANT_1_1 +265 0x5333 //RX_FDDRC_SLANT_1_2 +266 0x5333 //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +268 0x0000 //RX_FILTINDX +269 0x0000 //RX_TDDRC_THRD_0 +270 0x0000 //RX_TDDRC_THRD_1 +271 0x7FFF //RX_TDDRC_THRD_2 +272 0x7FFF //RX_TDDRC_THRD_3 +273 0x7FFF //RX_TDDRC_SLANT_0 +274 0x7FFF //RX_TDDRC_SLANT_1 +275 0x3000 //RX_TDDRC_ALPHA_UP_0 +276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x199A //RX_TDDRC_HMNC_GAIN +279 0x0001 //RX_TDDRC_SMT_FLAG +280 0x0CCD //RX_TDDRC_SMT_W +281 0x0155 //RX_TDDRC_DRC_GAIN +282 0x7C00 //RX_LAMBDA_PKA_FP +283 0x2000 //RX_TPKA_FP +284 0x2000 //RX_MIN_G_FP +285 0x0080 //RX_MAX_G_FP +286 0x0100 //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 +288 0x0000 //RX_MAXLEVEL_CNG +289 0x3000 //RX_BWE_UV_TH +290 0x3000 //RX_BWE_UV_TH2 +291 0x1800 //RX_BWE_UV_TH3 +292 0x1000 //RX_BWE_V_TH +293 0x04CD //RX_BWE_GAIN1_V_TH1 +294 0x0F33 //RX_BWE_GAIN1_V_TH2 +295 0x7333 //RX_BWE_UV_EQ +296 0x199A //RX_BWE_V_EQ +297 0x7333 //RX_BWE_TONE_TH +298 0x0004 //RX_BWE_UV_HOLD_T +299 0x6CCD //RX_BWE_GAIN2_ALPHA +300 0x799A //RX_BWE_GAIN3_ALPHA +301 0x001E //RX_BWE_CUTOFF +302 0x3000 //RX_BWE_GAINFILL +303 0x3200 //RX_BWE_MAXTH_TONE +304 0x2000 //RX_BWE_EQ_0 +305 0x2000 //RX_BWE_EQ_1 +306 0x2000 //RX_BWE_EQ_2 +307 0x2000 //RX_BWE_EQ_3 +308 0x2000 //RX_BWE_EQ_4 +309 0x2000 //RX_BWE_EQ_5 +310 0x2000 //RX_BWE_EQ_6 +311 0x0000 //RX_BWE_RESRV_0 +312 0x0000 //RX_BWE_RESRV_1 +313 0x0000 //RX_BWE_RESRV_2 +#VOL 0 +163 0x3000 //RX_TDDRC_ALPHA_UP_1 +164 0x3000 //RX_TDDRC_ALPHA_UP_2 +165 0x3000 //RX_TDDRC_ALPHA_UP_3 +166 0x3000 //RX_TDDRC_ALPHA_UP_4 +184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +190 0x7FFF //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +269 0x0000 //RX_TDDRC_THRD_0 +270 0x0000 //RX_TDDRC_THRD_1 +271 0x7FFF //RX_TDDRC_THRD_2 +272 0x7FFF //RX_TDDRC_THRD_3 +273 0x7FFF //RX_TDDRC_SLANT_0 +274 0x7FFF //RX_TDDRC_SLANT_1 +275 0x3000 //RX_TDDRC_ALPHA_UP_0 +276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x199A //RX_TDDRC_HMNC_GAIN +279 0x0001 //RX_TDDRC_SMT_FLAG +280 0x0CCD //RX_TDDRC_SMT_W +281 0x0155 //RX_TDDRC_DRC_GAIN +195 0x0020 //RX_FDEQ_SUBNUM +196 0x4848 //RX_FDEQ_GAIN_0 +197 0x4848 //RX_FDEQ_GAIN_1 +198 0x4848 //RX_FDEQ_GAIN_2 +199 0x4848 //RX_FDEQ_GAIN_3 +200 0x4848 //RX_FDEQ_GAIN_4 +201 0x4848 //RX_FDEQ_GAIN_5 +202 0x4848 //RX_FDEQ_GAIN_6 +203 0x4848 //RX_FDEQ_GAIN_7 +204 0x4848 //RX_FDEQ_GAIN_8 +205 0x4848 //RX_FDEQ_GAIN_9 +206 0x4848 //RX_FDEQ_GAIN_10 +207 0x4848 //RX_FDEQ_GAIN_11 +208 0x4848 //RX_FDEQ_GAIN_12 +209 0x4848 //RX_FDEQ_GAIN_13 +210 0x4848 //RX_FDEQ_GAIN_14 +211 0x4848 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0202 //RX_FDEQ_BIN_0 +221 0x0203 //RX_FDEQ_BIN_1 +222 0x0303 //RX_FDEQ_BIN_2 +223 0x0304 //RX_FDEQ_BIN_3 +224 0x0405 //RX_FDEQ_BIN_4 +225 0x0506 //RX_FDEQ_BIN_5 +226 0x0708 //RX_FDEQ_BIN_6 +227 0x090A //RX_FDEQ_BIN_7 +228 0x0B0C //RX_FDEQ_BIN_8 +229 0x0D0E //RX_FDEQ_BIN_9 +230 0x1013 //RX_FDEQ_BIN_10 +231 0x1719 //RX_FDEQ_BIN_11 +232 0x1B1E //RX_FDEQ_BIN_12 +233 0x1E1E //RX_FDEQ_BIN_13 +234 0x1E28 //RX_FDEQ_BIN_14 +235 0x282C //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x4000 //RX_FDEQ_RESRV_0 +245 0x0320 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0030 //RX_FDDRC_BAND_MARGIN_1 +248 0x0050 //RX_FDDRC_BAND_MARGIN_2 +249 0x0080 //RX_FDDRC_BAND_MARGIN_3 +250 0x0007 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x5000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x6400 //RX_FDDRC_THRD_3_2 +258 0x6400 //RX_FDDRC_THRD_3_3 +259 0x2000 //RX_FDDRC_SLANT_0_0 +260 0x2000 //RX_FDDRC_SLANT_0_1 +261 0x2000 //RX_FDDRC_SLANT_0_2 +262 0x2000 //RX_FDDRC_SLANT_0_3 +263 0x5333 //RX_FDDRC_SLANT_1_0 +264 0x5333 //RX_FDDRC_SLANT_1_1 +265 0x5333 //RX_FDDRC_SLANT_1_2 +266 0x5333 //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +286 0x0100 //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 +#VOL 1 +163 0x3000 //RX_TDDRC_ALPHA_UP_1 +164 0x3000 //RX_TDDRC_ALPHA_UP_2 +165 0x3000 //RX_TDDRC_ALPHA_UP_3 +166 0x3000 //RX_TDDRC_ALPHA_UP_4 +184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +190 0x7FFF //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +269 0x0000 //RX_TDDRC_THRD_0 +270 0x0000 //RX_TDDRC_THRD_1 +271 0x7FFF //RX_TDDRC_THRD_2 +272 0x7FFF //RX_TDDRC_THRD_3 +273 0x7FFF //RX_TDDRC_SLANT_0 +274 0x7FFF //RX_TDDRC_SLANT_1 +275 0x3000 //RX_TDDRC_ALPHA_UP_0 +276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x199A //RX_TDDRC_HMNC_GAIN +279 0x0001 //RX_TDDRC_SMT_FLAG +280 0x0CCD //RX_TDDRC_SMT_W +281 0x0155 //RX_TDDRC_DRC_GAIN +195 0x0020 //RX_FDEQ_SUBNUM +196 0x4848 //RX_FDEQ_GAIN_0 +197 0x4848 //RX_FDEQ_GAIN_1 +198 0x4848 //RX_FDEQ_GAIN_2 +199 0x4848 //RX_FDEQ_GAIN_3 +200 0x4848 //RX_FDEQ_GAIN_4 +201 0x4848 //RX_FDEQ_GAIN_5 +202 0x4848 //RX_FDEQ_GAIN_6 +203 0x4848 //RX_FDEQ_GAIN_7 +204 0x4848 //RX_FDEQ_GAIN_8 +205 0x4848 //RX_FDEQ_GAIN_9 +206 0x4848 //RX_FDEQ_GAIN_10 +207 0x4848 //RX_FDEQ_GAIN_11 +208 0x4848 //RX_FDEQ_GAIN_12 +209 0x4848 //RX_FDEQ_GAIN_13 +210 0x4848 //RX_FDEQ_GAIN_14 +211 0x4848 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0202 //RX_FDEQ_BIN_0 +221 0x0203 //RX_FDEQ_BIN_1 +222 0x0303 //RX_FDEQ_BIN_2 +223 0x0304 //RX_FDEQ_BIN_3 +224 0x0405 //RX_FDEQ_BIN_4 +225 0x0506 //RX_FDEQ_BIN_5 +226 0x0708 //RX_FDEQ_BIN_6 +227 0x090A //RX_FDEQ_BIN_7 +228 0x0B0C //RX_FDEQ_BIN_8 +229 0x0D0E //RX_FDEQ_BIN_9 +230 0x1013 //RX_FDEQ_BIN_10 +231 0x1719 //RX_FDEQ_BIN_11 +232 0x1B1E //RX_FDEQ_BIN_12 +233 0x1E1E //RX_FDEQ_BIN_13 +234 0x1E28 //RX_FDEQ_BIN_14 +235 0x282C //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x4000 //RX_FDEQ_RESRV_0 +245 0x0320 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0030 //RX_FDDRC_BAND_MARGIN_1 +248 0x0050 //RX_FDDRC_BAND_MARGIN_2 +249 0x0080 //RX_FDDRC_BAND_MARGIN_3 +250 0x0007 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x5000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x6400 //RX_FDDRC_THRD_3_2 +258 0x6400 //RX_FDDRC_THRD_3_3 +259 0x2000 //RX_FDDRC_SLANT_0_0 +260 0x2000 //RX_FDDRC_SLANT_0_1 +261 0x2000 //RX_FDDRC_SLANT_0_2 +262 0x2000 //RX_FDDRC_SLANT_0_3 +263 0x5333 //RX_FDDRC_SLANT_1_0 +264 0x5333 //RX_FDDRC_SLANT_1_1 +265 0x5333 //RX_FDDRC_SLANT_1_2 +266 0x5333 //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +286 0x0100 //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 +#VOL 2 +163 0x3000 //RX_TDDRC_ALPHA_UP_1 +164 0x3000 //RX_TDDRC_ALPHA_UP_2 +165 0x3000 //RX_TDDRC_ALPHA_UP_3 +166 0x3000 //RX_TDDRC_ALPHA_UP_4 +184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +190 0x7FFF //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +269 0x0000 //RX_TDDRC_THRD_0 +270 0x0000 //RX_TDDRC_THRD_1 +271 0x7FFF //RX_TDDRC_THRD_2 +272 0x7FFF //RX_TDDRC_THRD_3 +273 0x7FFF //RX_TDDRC_SLANT_0 +274 0x7FFF //RX_TDDRC_SLANT_1 +275 0x3000 //RX_TDDRC_ALPHA_UP_0 +276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x199A //RX_TDDRC_HMNC_GAIN +279 0x0001 //RX_TDDRC_SMT_FLAG +280 0x0CCD //RX_TDDRC_SMT_W +281 0x0155 //RX_TDDRC_DRC_GAIN +195 0x0020 //RX_FDEQ_SUBNUM +196 0x4848 //RX_FDEQ_GAIN_0 +197 0x4848 //RX_FDEQ_GAIN_1 +198 0x4848 //RX_FDEQ_GAIN_2 +199 0x4848 //RX_FDEQ_GAIN_3 +200 0x4848 //RX_FDEQ_GAIN_4 +201 0x4848 //RX_FDEQ_GAIN_5 +202 0x4848 //RX_FDEQ_GAIN_6 +203 0x4848 //RX_FDEQ_GAIN_7 +204 0x4848 //RX_FDEQ_GAIN_8 +205 0x4848 //RX_FDEQ_GAIN_9 +206 0x4848 //RX_FDEQ_GAIN_10 +207 0x4848 //RX_FDEQ_GAIN_11 +208 0x4848 //RX_FDEQ_GAIN_12 +209 0x4848 //RX_FDEQ_GAIN_13 +210 0x4848 //RX_FDEQ_GAIN_14 +211 0x4848 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0202 //RX_FDEQ_BIN_0 +221 0x0203 //RX_FDEQ_BIN_1 +222 0x0303 //RX_FDEQ_BIN_2 +223 0x0304 //RX_FDEQ_BIN_3 +224 0x0405 //RX_FDEQ_BIN_4 +225 0x0506 //RX_FDEQ_BIN_5 +226 0x0708 //RX_FDEQ_BIN_6 +227 0x090A //RX_FDEQ_BIN_7 +228 0x0B0C //RX_FDEQ_BIN_8 +229 0x0D0E //RX_FDEQ_BIN_9 +230 0x1013 //RX_FDEQ_BIN_10 +231 0x1719 //RX_FDEQ_BIN_11 +232 0x1B1E //RX_FDEQ_BIN_12 +233 0x1E1E //RX_FDEQ_BIN_13 +234 0x1E28 //RX_FDEQ_BIN_14 +235 0x282C //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x4000 //RX_FDEQ_RESRV_0 +245 0x0320 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0030 //RX_FDDRC_BAND_MARGIN_1 +248 0x0050 //RX_FDDRC_BAND_MARGIN_2 +249 0x0080 //RX_FDDRC_BAND_MARGIN_3 +250 0x0007 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x5000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x6400 //RX_FDDRC_THRD_3_2 +258 0x6400 //RX_FDDRC_THRD_3_3 +259 0x2000 //RX_FDDRC_SLANT_0_0 +260 0x2000 //RX_FDDRC_SLANT_0_1 +261 0x2000 //RX_FDDRC_SLANT_0_2 +262 0x2000 //RX_FDDRC_SLANT_0_3 +263 0x5333 //RX_FDDRC_SLANT_1_0 +264 0x5333 //RX_FDDRC_SLANT_1_1 +265 0x5333 //RX_FDDRC_SLANT_1_2 +266 0x5333 //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +286 0x0100 //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 +#VOL 3 +163 0x3000 //RX_TDDRC_ALPHA_UP_1 +164 0x3000 //RX_TDDRC_ALPHA_UP_2 +165 0x3000 //RX_TDDRC_ALPHA_UP_3 +166 0x3000 //RX_TDDRC_ALPHA_UP_4 +184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +190 0x7FFF //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +269 0x0000 //RX_TDDRC_THRD_0 +270 0x0000 //RX_TDDRC_THRD_1 +271 0x7FFF //RX_TDDRC_THRD_2 +272 0x7FFF //RX_TDDRC_THRD_3 +273 0x7FFF //RX_TDDRC_SLANT_0 +274 0x7FFF //RX_TDDRC_SLANT_1 +275 0x3000 //RX_TDDRC_ALPHA_UP_0 +276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x199A //RX_TDDRC_HMNC_GAIN +279 0x0001 //RX_TDDRC_SMT_FLAG +280 0x0CCD //RX_TDDRC_SMT_W +281 0x0155 //RX_TDDRC_DRC_GAIN +195 0x0020 //RX_FDEQ_SUBNUM +196 0x4848 //RX_FDEQ_GAIN_0 +197 0x4848 //RX_FDEQ_GAIN_1 +198 0x4848 //RX_FDEQ_GAIN_2 +199 0x4848 //RX_FDEQ_GAIN_3 +200 0x4848 //RX_FDEQ_GAIN_4 +201 0x4848 //RX_FDEQ_GAIN_5 +202 0x4848 //RX_FDEQ_GAIN_6 +203 0x4848 //RX_FDEQ_GAIN_7 +204 0x4848 //RX_FDEQ_GAIN_8 +205 0x4848 //RX_FDEQ_GAIN_9 +206 0x4848 //RX_FDEQ_GAIN_10 +207 0x4848 //RX_FDEQ_GAIN_11 +208 0x4848 //RX_FDEQ_GAIN_12 +209 0x4848 //RX_FDEQ_GAIN_13 +210 0x4848 //RX_FDEQ_GAIN_14 +211 0x4848 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0202 //RX_FDEQ_BIN_0 +221 0x0203 //RX_FDEQ_BIN_1 +222 0x0303 //RX_FDEQ_BIN_2 +223 0x0304 //RX_FDEQ_BIN_3 +224 0x0405 //RX_FDEQ_BIN_4 +225 0x0506 //RX_FDEQ_BIN_5 +226 0x0708 //RX_FDEQ_BIN_6 +227 0x090A //RX_FDEQ_BIN_7 +228 0x0B0C //RX_FDEQ_BIN_8 +229 0x0D0E //RX_FDEQ_BIN_9 +230 0x1013 //RX_FDEQ_BIN_10 +231 0x1719 //RX_FDEQ_BIN_11 +232 0x1B1E //RX_FDEQ_BIN_12 +233 0x1E1E //RX_FDEQ_BIN_13 +234 0x1E28 //RX_FDEQ_BIN_14 +235 0x282C //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x4000 //RX_FDEQ_RESRV_0 +245 0x0320 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0030 //RX_FDDRC_BAND_MARGIN_1 +248 0x0050 //RX_FDDRC_BAND_MARGIN_2 +249 0x0080 //RX_FDDRC_BAND_MARGIN_3 +250 0x0007 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x5000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x6400 //RX_FDDRC_THRD_3_2 +258 0x6400 //RX_FDDRC_THRD_3_3 +259 0x2000 //RX_FDDRC_SLANT_0_0 +260 0x2000 //RX_FDDRC_SLANT_0_1 +261 0x2000 //RX_FDDRC_SLANT_0_2 +262 0x2000 //RX_FDDRC_SLANT_0_3 +263 0x5333 //RX_FDDRC_SLANT_1_0 +264 0x5333 //RX_FDDRC_SLANT_1_1 +265 0x5333 //RX_FDDRC_SLANT_1_2 +266 0x5333 //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +286 0x0100 //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 +#VOL 4 +163 0x3000 //RX_TDDRC_ALPHA_UP_1 +164 0x3000 //RX_TDDRC_ALPHA_UP_2 +165 0x3000 //RX_TDDRC_ALPHA_UP_3 +166 0x3000 //RX_TDDRC_ALPHA_UP_4 +184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +190 0x7FFF //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +269 0x0000 //RX_TDDRC_THRD_0 +270 0x0000 //RX_TDDRC_THRD_1 +271 0x7FFF //RX_TDDRC_THRD_2 +272 0x7FFF //RX_TDDRC_THRD_3 +273 0x7FFF //RX_TDDRC_SLANT_0 +274 0x7FFF //RX_TDDRC_SLANT_1 +275 0x3000 //RX_TDDRC_ALPHA_UP_0 +276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x199A //RX_TDDRC_HMNC_GAIN +279 0x0001 //RX_TDDRC_SMT_FLAG +280 0x0CCD //RX_TDDRC_SMT_W +281 0x0155 //RX_TDDRC_DRC_GAIN +195 0x0020 //RX_FDEQ_SUBNUM +196 0x4848 //RX_FDEQ_GAIN_0 +197 0x4848 //RX_FDEQ_GAIN_1 +198 0x4848 //RX_FDEQ_GAIN_2 +199 0x4848 //RX_FDEQ_GAIN_3 +200 0x4848 //RX_FDEQ_GAIN_4 +201 0x4848 //RX_FDEQ_GAIN_5 +202 0x4848 //RX_FDEQ_GAIN_6 +203 0x4848 //RX_FDEQ_GAIN_7 +204 0x4848 //RX_FDEQ_GAIN_8 +205 0x4848 //RX_FDEQ_GAIN_9 +206 0x4848 //RX_FDEQ_GAIN_10 +207 0x4848 //RX_FDEQ_GAIN_11 +208 0x4848 //RX_FDEQ_GAIN_12 +209 0x4848 //RX_FDEQ_GAIN_13 +210 0x4848 //RX_FDEQ_GAIN_14 +211 0x4848 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0202 //RX_FDEQ_BIN_0 +221 0x0203 //RX_FDEQ_BIN_1 +222 0x0303 //RX_FDEQ_BIN_2 +223 0x0304 //RX_FDEQ_BIN_3 +224 0x0405 //RX_FDEQ_BIN_4 +225 0x0506 //RX_FDEQ_BIN_5 +226 0x0708 //RX_FDEQ_BIN_6 +227 0x090A //RX_FDEQ_BIN_7 +228 0x0B0C //RX_FDEQ_BIN_8 +229 0x0D0E //RX_FDEQ_BIN_9 +230 0x1013 //RX_FDEQ_BIN_10 +231 0x1719 //RX_FDEQ_BIN_11 +232 0x1B1E //RX_FDEQ_BIN_12 +233 0x1E1E //RX_FDEQ_BIN_13 +234 0x1E28 //RX_FDEQ_BIN_14 +235 0x282C //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x4000 //RX_FDEQ_RESRV_0 +245 0x0320 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0030 //RX_FDDRC_BAND_MARGIN_1 +248 0x0050 //RX_FDDRC_BAND_MARGIN_2 +249 0x0080 //RX_FDDRC_BAND_MARGIN_3 +250 0x0007 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x5000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x6400 //RX_FDDRC_THRD_3_2 +258 0x6400 //RX_FDDRC_THRD_3_3 +259 0x2000 //RX_FDDRC_SLANT_0_0 +260 0x2000 //RX_FDDRC_SLANT_0_1 +261 0x2000 //RX_FDDRC_SLANT_0_2 +262 0x2000 //RX_FDDRC_SLANT_0_3 +263 0x5333 //RX_FDDRC_SLANT_1_0 +264 0x5333 //RX_FDDRC_SLANT_1_1 +265 0x5333 //RX_FDDRC_SLANT_1_2 +266 0x5333 //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +286 0x0100 //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 +#VOL 5 +163 0x3000 //RX_TDDRC_ALPHA_UP_1 +164 0x3000 //RX_TDDRC_ALPHA_UP_2 +165 0x3000 //RX_TDDRC_ALPHA_UP_3 +166 0x3000 //RX_TDDRC_ALPHA_UP_4 +184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +190 0x7FFF //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +269 0x0000 //RX_TDDRC_THRD_0 +270 0x0000 //RX_TDDRC_THRD_1 +271 0x7FFF //RX_TDDRC_THRD_2 +272 0x7FFF //RX_TDDRC_THRD_3 +273 0x7FFF //RX_TDDRC_SLANT_0 +274 0x7FFF //RX_TDDRC_SLANT_1 +275 0x3000 //RX_TDDRC_ALPHA_UP_0 +276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x199A //RX_TDDRC_HMNC_GAIN +279 0x0001 //RX_TDDRC_SMT_FLAG +280 0x0CCD //RX_TDDRC_SMT_W +281 0x0155 //RX_TDDRC_DRC_GAIN +195 0x0020 //RX_FDEQ_SUBNUM +196 0x4848 //RX_FDEQ_GAIN_0 +197 0x4848 //RX_FDEQ_GAIN_1 +198 0x4848 //RX_FDEQ_GAIN_2 +199 0x4848 //RX_FDEQ_GAIN_3 +200 0x4848 //RX_FDEQ_GAIN_4 +201 0x4848 //RX_FDEQ_GAIN_5 +202 0x4848 //RX_FDEQ_GAIN_6 +203 0x4848 //RX_FDEQ_GAIN_7 +204 0x4848 //RX_FDEQ_GAIN_8 +205 0x4848 //RX_FDEQ_GAIN_9 +206 0x4848 //RX_FDEQ_GAIN_10 +207 0x4848 //RX_FDEQ_GAIN_11 +208 0x4848 //RX_FDEQ_GAIN_12 +209 0x4848 //RX_FDEQ_GAIN_13 +210 0x4848 //RX_FDEQ_GAIN_14 +211 0x4848 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0202 //RX_FDEQ_BIN_0 +221 0x0203 //RX_FDEQ_BIN_1 +222 0x0303 //RX_FDEQ_BIN_2 +223 0x0304 //RX_FDEQ_BIN_3 +224 0x0405 //RX_FDEQ_BIN_4 +225 0x0506 //RX_FDEQ_BIN_5 +226 0x0708 //RX_FDEQ_BIN_6 +227 0x090A //RX_FDEQ_BIN_7 +228 0x0B0C //RX_FDEQ_BIN_8 +229 0x0D0E //RX_FDEQ_BIN_9 +230 0x1013 //RX_FDEQ_BIN_10 +231 0x1719 //RX_FDEQ_BIN_11 +232 0x1B1E //RX_FDEQ_BIN_12 +233 0x1E1E //RX_FDEQ_BIN_13 +234 0x1E28 //RX_FDEQ_BIN_14 +235 0x282C //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x4000 //RX_FDEQ_RESRV_0 +245 0x0320 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0030 //RX_FDDRC_BAND_MARGIN_1 +248 0x0050 //RX_FDDRC_BAND_MARGIN_2 +249 0x0080 //RX_FDDRC_BAND_MARGIN_3 +250 0x0007 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x5000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x6400 //RX_FDDRC_THRD_3_2 +258 0x6400 //RX_FDDRC_THRD_3_3 +259 0x2000 //RX_FDDRC_SLANT_0_0 +260 0x2000 //RX_FDDRC_SLANT_0_1 +261 0x2000 //RX_FDDRC_SLANT_0_2 +262 0x2000 //RX_FDDRC_SLANT_0_3 +263 0x5333 //RX_FDDRC_SLANT_1_0 +264 0x5333 //RX_FDDRC_SLANT_1_1 +265 0x5333 //RX_FDDRC_SLANT_1_2 +266 0x5333 //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +286 0x0100 //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 +#VOL 6 +163 0x3000 //RX_TDDRC_ALPHA_UP_1 +164 0x3000 //RX_TDDRC_ALPHA_UP_2 +165 0x3000 //RX_TDDRC_ALPHA_UP_3 +166 0x3000 //RX_TDDRC_ALPHA_UP_4 +184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +190 0x7FFF //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +269 0x0000 //RX_TDDRC_THRD_0 +270 0x0000 //RX_TDDRC_THRD_1 +271 0x7FFF //RX_TDDRC_THRD_2 +272 0x7FFF //RX_TDDRC_THRD_3 +273 0x7FFF //RX_TDDRC_SLANT_0 +274 0x7FFF //RX_TDDRC_SLANT_1 +275 0x3000 //RX_TDDRC_ALPHA_UP_0 +276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x199A //RX_TDDRC_HMNC_GAIN +279 0x0001 //RX_TDDRC_SMT_FLAG +280 0x0CCD //RX_TDDRC_SMT_W +281 0x0155 //RX_TDDRC_DRC_GAIN +195 0x0020 //RX_FDEQ_SUBNUM +196 0x4848 //RX_FDEQ_GAIN_0 +197 0x4848 //RX_FDEQ_GAIN_1 +198 0x4848 //RX_FDEQ_GAIN_2 +199 0x4848 //RX_FDEQ_GAIN_3 +200 0x4848 //RX_FDEQ_GAIN_4 +201 0x4848 //RX_FDEQ_GAIN_5 +202 0x4848 //RX_FDEQ_GAIN_6 +203 0x4848 //RX_FDEQ_GAIN_7 +204 0x4848 //RX_FDEQ_GAIN_8 +205 0x4848 //RX_FDEQ_GAIN_9 +206 0x4848 //RX_FDEQ_GAIN_10 +207 0x4848 //RX_FDEQ_GAIN_11 +208 0x4848 //RX_FDEQ_GAIN_12 +209 0x4848 //RX_FDEQ_GAIN_13 +210 0x4848 //RX_FDEQ_GAIN_14 +211 0x4848 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0202 //RX_FDEQ_BIN_0 +221 0x0203 //RX_FDEQ_BIN_1 +222 0x0303 //RX_FDEQ_BIN_2 +223 0x0304 //RX_FDEQ_BIN_3 +224 0x0405 //RX_FDEQ_BIN_4 +225 0x0506 //RX_FDEQ_BIN_5 +226 0x0708 //RX_FDEQ_BIN_6 +227 0x090A //RX_FDEQ_BIN_7 +228 0x0B0C //RX_FDEQ_BIN_8 +229 0x0D0E //RX_FDEQ_BIN_9 +230 0x1013 //RX_FDEQ_BIN_10 +231 0x1719 //RX_FDEQ_BIN_11 +232 0x1B1E //RX_FDEQ_BIN_12 +233 0x1E1E //RX_FDEQ_BIN_13 +234 0x1E28 //RX_FDEQ_BIN_14 +235 0x282C //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x4000 //RX_FDEQ_RESRV_0 +245 0x0320 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0030 //RX_FDDRC_BAND_MARGIN_1 +248 0x0050 //RX_FDDRC_BAND_MARGIN_2 +249 0x0080 //RX_FDDRC_BAND_MARGIN_3 +250 0x0007 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x5000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x6400 //RX_FDDRC_THRD_3_2 +258 0x6400 //RX_FDDRC_THRD_3_3 +259 0x2000 //RX_FDDRC_SLANT_0_0 +260 0x2000 //RX_FDDRC_SLANT_0_1 +261 0x2000 //RX_FDDRC_SLANT_0_2 +262 0x2000 //RX_FDDRC_SLANT_0_3 +263 0x5333 //RX_FDDRC_SLANT_1_0 +264 0x5333 //RX_FDDRC_SLANT_1_1 +265 0x5333 //RX_FDDRC_SLANT_1_2 +266 0x5333 //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +286 0x0100 //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 #CASE_NAME BLUETOOTH-BTWB_NREC-VOICE_GENERIC-FB -#PARAM_TYPE TX+RX -#TOTAL_CUSTOM_STEP 7 +#PARAM_MODE Full +#PARAM_TYPE TX+2RX +#TOTAL_CUSTOM_STEP 7+7 #TX 0 0x0009 //TX_OPERATION_MODE_0 1 0x0009 //TX_OPERATION_MODE_1 @@ -35318,10 +53659,10 @@ 248 0xF600 //TX_THR_SN_EST_6 249 0xF600 //TX_THR_SN_EST_7 250 0x0200 //TX_DELTA_THR_SN_EST_0 -251 0x0200 //TX_DELTA_THR_SN_EST_1 -252 0x0400 //TX_DELTA_THR_SN_EST_2 -253 0x0300 //TX_DELTA_THR_SN_EST_3 -254 0x0600 //TX_DELTA_THR_SN_EST_4 +251 0x0400 //TX_DELTA_THR_SN_EST_1 +252 0x0300 //TX_DELTA_THR_SN_EST_2 +253 0x0600 //TX_DELTA_THR_SN_EST_3 +254 0x0200 //TX_DELTA_THR_SN_EST_4 255 0x0200 //TX_DELTA_THR_SN_EST_5 256 0x0200 //TX_DELTA_THR_SN_EST_6 257 0x0200 //TX_DELTA_THR_SN_EST_7 @@ -35349,31 +53690,31 @@ 279 0x2000 //TX_B_POST_FLT_0 280 0x2000 //TX_B_POST_FLT_1 281 0x0012 //TX_NS_LVL_CTRL_0 -282 0x0019 //TX_NS_LVL_CTRL_1 +282 0x0016 //TX_NS_LVL_CTRL_1 283 0x0016 //TX_NS_LVL_CTRL_2 -284 0x0016 //TX_NS_LVL_CTRL_3 -285 0x0019 //TX_NS_LVL_CTRL_4 +284 0x0019 //TX_NS_LVL_CTRL_3 +285 0x0010 //TX_NS_LVL_CTRL_4 286 0x0010 //TX_NS_LVL_CTRL_5 -287 0x0010 //TX_NS_LVL_CTRL_6 +287 0x0019 //TX_NS_LVL_CTRL_6 288 0x0010 //TX_NS_LVL_CTRL_7 289 0x000C //TX_MIN_GAIN_S_0 -290 0x0011 //TX_MIN_GAIN_S_1 +290 0x000C //TX_MIN_GAIN_S_1 291 0x000C //TX_MIN_GAIN_S_2 -292 0x000C //TX_MIN_GAIN_S_3 -293 0x000F //TX_MIN_GAIN_S_4 +292 0x000F //TX_MIN_GAIN_S_3 +293 0x000C //TX_MIN_GAIN_S_4 294 0x000C //TX_MIN_GAIN_S_5 -295 0x000C //TX_MIN_GAIN_S_6 +295 0x0011 //TX_MIN_GAIN_S_6 296 0x000C //TX_MIN_GAIN_S_7 297 0x7FFF //TX_NMOS_SUP 298 0x0000 //TX_NS_MAX_PRI_SNR_TH 299 0x0000 //TX_NMOS_SUP_MENSA 300 0x7000 //TX_SNRI_SUP_0 -301 0x6000 //TX_SNRI_SUP_1 +301 0x7000 //TX_SNRI_SUP_1 302 0x7000 //TX_SNRI_SUP_2 -303 0x7000 //TX_SNRI_SUP_3 -304 0x6000 //TX_SNRI_SUP_4 +303 0x6000 //TX_SNRI_SUP_3 +304 0x7FFF //TX_SNRI_SUP_4 305 0x7FFF //TX_SNRI_SUP_5 -306 0x7FFF //TX_SNRI_SUP_6 +306 0x6000 //TX_SNRI_SUP_6 307 0x7FFF //TX_SNRI_SUP_7 308 0x7FFF //TX_THR_LFNS 309 0x0016 //TX_G_LFNS @@ -35390,8 +53731,8 @@ 320 0x6000 //TX_A_POST_FILT_S_6 321 0x6000 //TX_A_POST_FILT_S_7 322 0x2000 //TX_B_POST_FILT_0 -323 0x2000 //TX_B_POST_FILT_1 -324 0x4000 //TX_B_POST_FILT_2 +323 0x4000 //TX_B_POST_FILT_1 +324 0x2000 //TX_B_POST_FILT_2 325 0x2000 //TX_B_POST_FILT_3 326 0x2000 //TX_B_POST_FILT_4 327 0x2000 //TX_B_POST_FILT_5 @@ -35447,10 +53788,10 @@ 377 0x0000 //TX_NOISE_TH_5_4 378 0x02BC //TX_NOISE_TH_6 379 0x0020 //TX_MINENOISE_TH -380 0x4000 //TX_MINENOISE_MIC0_TH_MTS -381 0xFFEE //TX_MINENOISE_MIC0_TH_EXP -382 0x6000 //TX_MINENOISE_MIC0_S_TH_MTS -383 0xFFF3 //TX_MINENOISE_MIC0_S_TH_EXP +380 0x4000 //TX_MORENS_TFMASK_TH +381 0xFFEE //TX_DRC_QUIET_FLOOR +382 0x6000 //TX_RATIODTL_CUT_TH +383 0xFFF3 //TX_DT_CUT_K1 384 0x0666 //TX_OUT_ENER_S_TH_CLEAN 385 0x0666 //TX_OUT_ENER_S_TH_LESSCLEAN 386 0x0333 //TX_OUT_ENER_S_TH_NOISY @@ -35458,15 +53799,15 @@ 388 0x0333 //TX_OUT_ENER_TH_SPEECH 389 0x2000 //TX_SN_NPB_GAIN 390 0x0000 //TX_NN_NPB_GAIN -391 0x0000 //TX_CSX_ALPHA_0 -392 0x0000 //TX_CSX_ALPHA_1 -393 0x0000 //TX_CSX_ALPHA_2 -394 0x0000 //TX_CSX_ALPHA_3 -395 0x0800 //TX_MU_ARSP_EST -396 0x00C8 //TX_P_OUTBEAM_MIN_TH +391 0x0000 //TX_POST_MASK_SUP_HSNE +392 0x0000 //TX_TAIL_DET_TH +393 0x0000 //TX_B_LESSCUT_RTO_WTA +394 0x0000 //TX_MEL_G_R +395 0x0800 //TX_SUPHIGH_TH +396 0x00C8 //TX_MASK_G_R 397 0x0002 //TX_EXTRA_NS_L -398 0x0800 //TX_EXTRA_NS_A -399 0x0005 //TX_VR_NOISE_FLOOR_TH +398 0x0800 //TX_C_POST_FLT_MASK +399 0x0005 //TX_A_POST_FLT_WNS 400 0x0148 //TX_MIN_G_LOW300HZ 401 0x0002 //TX_MAXLEVEL_CNG 402 0x00B4 //TX_STN_NOISE_TH @@ -35581,16 +53922,16 @@ 511 0x6666 //TX_MIC_TO_BFGAIN 512 0x0000 //TX_MICTOBFGAIN0 513 0x0000 //TX_FASTMUE_TH -514 0x0000 //TX_DERVB_LEN_0 -515 0x0000 //TX_DERVB_LEN_1 -516 0x0000 //TX_RHO_DERVB -517 0x0000 //TX_MIC_INDX_DERVB -518 0x0000 //TX_MU_DERVB -519 0x0000 //TX_DR_RESRV_0 -520 0x0000 //TX_DR_RESRV_1 -521 0x0000 //TX_DR_RESRV_2 -522 0x0000 //TX_DR_RESRV_3 -523 0x0000 //TX_DR_RESRV_4 +514 0x0000 //TX_DEREVERB_LF_MU +515 0x0000 //TX_DEREVERB_HF_MU +516 0x0000 //TX_DEREVERB_DELAY +517 0x0000 //TX_DEREVERB_COEF_LEN +518 0x0000 //TX_DEREVERB_DNR +519 0x0000 //TX_DEREVERB_ALPHA +520 0x0000 //TX_DEREVERB_BETA +521 0x0000 //TX_GSC_RTOL_TH +522 0x0000 //TX_GSC_RTOH_TH +523 0x0000 //TX_WIDE2_MEANHTH 524 0x0000 //TX_DR_RESRV_5 525 0x0000 //TX_DR_RESRV_6 526 0x0000 //TX_DR_RESRV_7 @@ -35964,8 +54305,73 @@ 894 0xC000 //TX_FASTNS_SSA_THHFL 895 0xCCCC //TX_FASTNS_SSA_THLFH 896 0xD999 //TX_FASTNS_SSA_THHFH +897 0x0000 //TX_SENDFUNC_REG_MICMUTE +898 0x0000 //TX_SENDFUNC_REG_MICMUTE1 +899 0x0000 //TX_MICMUTE_RATIO_THR +900 0x0000 //TX_MICMUTE_AMP_THR +901 0x0000 //TX_MICMUTE_HPF_IND +902 0x0000 //TX_MICMUTE_LOG_EYR_TH +903 0x0000 //TX_MICMUTE_CVG_TIME +904 0x0000 //TX_MICMUTE_RELEASE_TIME +905 0x0000 //TX_MIC_VOLUME_MIC0MUTE +906 0x0000 //TX_MICMUTE_EPD_OFFSET_0 +907 0x0000 //TX_MICMUTE_FRQ_AEC_L +908 0x0000 //TX_MICMUTE_EAD_THR +909 0x0000 //TX_MICMUTE_LAMBDA_CB_NLE +910 0x0000 //TX_MICMUTE_LAMBDA_RE_EST +911 0x0000 //TX_DTD_THR1_MICMUTE_0 +912 0x0000 //TX_DTD_THR1_MICMUTE_1 +913 0x0000 //TX_DTD_THR1_MICMUTE_2 +914 0x0000 //TX_DTD_THR1_MICMUTE_3 +915 0x0000 //TX_DTD_THR2_MICMUTE_0 +916 0x0000 //TX_MICMUTE_MIN_EQ_RE_EST_0 +917 0x0000 //TX_MICMUTE_MIN_EQ_RE_EST_1 +918 0x0000 //TX_MICMUTE_MIN_EQ_RE_EST_2 +919 0x0000 //TX_MICMUTE_MIN_EQ_RE_EST_3 +920 0x0000 //TX_MICMUTE_MIN_EQ_RE_EST_4 +921 0x0000 //TX_MICMUTE_C_POST_FLT +922 0x0000 //TX_MICMUTE_DT_CUT_K +923 0x0000 //TX_MICMUTE_DT_CUT_THR +924 0x0000 //TX_MICMUTE_DT_CUT_K2 +925 0x0000 //TX_MICMUTE_DT_CUT_THR2 +926 0x0000 //TX_MICMUTE_DT2_HOLD_N +927 0x0000 //TX_MICMUTE_RATIODTH_THCUT +928 0x0000 //TX_MICMUTE_B_POST_FLT_ECHOL +929 0x0000 //TX_MICMUTE_B_POST_FLT_ECHOH +930 0x0000 //TX_MICMUTE_C_POST_FLT_MASK +931 0x0000 //TX_MICMUTE_RATIODTL_CUT_TH +932 0x0000 //TX_MICMUTE_DT_CUT_K1 +933 0x0000 //TX_MICMUTE_N2_SN_EST +934 0x0000 //TX_MICMUTE_THR_SN_EST_0 +935 0x0000 //TX_MICMUTE_MIN_G_CTRL_0 +936 0x0000 //TX_MICMUTE_A_POST_FILT_S_0 +937 0x0000 //TX_MICMUTE_B_POST_FILT_0 +938 0x0000 //TX_MIC1RUB_AMP_THR +939 0x0000 //TX_MIC1MUTE_RATIO_THR +940 0x0000 //TX_MIC1MUTE_AMP_THR +941 0x0000 //TX_MIC1MUTE_CVG_TIME +942 0x0000 //TX_MIC1MUTE_RELEASE_TIME +943 0x0000 //TX_AMS_RESRV_01 +944 0x0000 //TX_AMS_RESRV_02 +945 0x0000 //TX_AMS_RESRV_03 +946 0x0000 //TX_AMS_RESRV_04 +947 0x0000 //TX_AMS_RESRV_05 +948 0x0000 //TX_AMS_RESRV_06 +949 0x0000 //TX_AMS_RESRV_07 +950 0x0000 //TX_AMS_RESRV_08 +951 0x0000 //TX_AMS_RESRV_09 +952 0x0000 //TX_AMS_RESRV_10 +953 0x0000 //TX_AMS_RESRV_11 +954 0x0000 //TX_AMS_RESRV_12 +955 0x0000 //TX_AMS_RESRV_13 +956 0x0000 //TX_AMS_RESRV_14 +957 0x0000 //TX_AMS_RESRV_15 +958 0x0000 //TX_AMS_RESRV_16 +959 0x0000 //TX_AMS_RESRV_17 +960 0x0000 //TX_AMS_RESRV_18 +961 0x0000 //TX_AMS_RESRV_19 #RX -0 0x0064 //RX_RECVFUNC_MODE_0 +0 0x2064 //RX_RECVFUNC_MODE_0 1 0x0000 //RX_RECVFUNC_MODE_1 2 0x0004 //RX_SAMPLINGFREQ_SIG 3 0x0004 //RX_SAMPLINGFREQ_PROC @@ -36815,4 +55221,855 @@ 110 0x0000 //RX_FDDRC_RESRV_0 129 0x0100 //RX_SPK_VOL 130 0x0000 //RX_VOL_RESRV_0 +#RX 2 +157 0x0064 //RX_RECVFUNC_MODE_0 +158 0x0000 //RX_RECVFUNC_MODE_1 +159 0x0004 //RX_SAMPLINGFREQ_SIG +160 0x0004 //RX_SAMPLINGFREQ_PROC +161 0x000A //RX_FRAME_SZ +162 0x0000 //RX_DELAY_OPT +163 0x1000 //RX_TDDRC_ALPHA_UP_1 +164 0x1000 //RX_TDDRC_ALPHA_UP_2 +165 0x1000 //RX_TDDRC_ALPHA_UP_3 +166 0x1000 //RX_TDDRC_ALPHA_UP_4 +167 0x0800 //RX_PGA +168 0x7FFF //RX_A_HP +169 0x4000 //RX_B_PE +170 0x7800 //RX_THR_PITCH_DET_0 +171 0x7000 //RX_THR_PITCH_DET_1 +172 0x6000 //RX_THR_PITCH_DET_2 +173 0x0008 //RX_PITCH_BFR_LEN +174 0x0003 //RX_SBD_PITCH_DET +175 0x0100 //RX_PP_RESRV_0 +176 0x0020 //RX_PP_RESRV_1 +177 0x0500 //RX_N_SN_EST +178 0x000C //RX_N2_SN_EST +179 0x000A //RX_NS_LVL_CTRL +180 0xF600 //RX_THR_SN_EST +181 0x7000 //RX_LAMBDA_PFILT +182 0x000A //RX_FENS_RESRV_0 +183 0x0190 //RX_FENS_RESRV_1 +184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +187 0x0002 //RX_EXTRA_NS_L +188 0x0800 //RX_EXTRA_NS_A +189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +190 0x7FFF //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +192 0x199A //RX_A_POST_FLT +193 0x0000 //RX_LMT_THRD +194 0x4000 //RX_LMT_ALPHA +195 0x0020 //RX_FDEQ_SUBNUM +196 0x4848 //RX_FDEQ_GAIN_0 +197 0x4848 //RX_FDEQ_GAIN_1 +198 0x4848 //RX_FDEQ_GAIN_2 +199 0x4848 //RX_FDEQ_GAIN_3 +200 0x4848 //RX_FDEQ_GAIN_4 +201 0x4848 //RX_FDEQ_GAIN_5 +202 0x4848 //RX_FDEQ_GAIN_6 +203 0x4848 //RX_FDEQ_GAIN_7 +204 0x4848 //RX_FDEQ_GAIN_8 +205 0x4848 //RX_FDEQ_GAIN_9 +206 0x4848 //RX_FDEQ_GAIN_10 +207 0x4848 //RX_FDEQ_GAIN_11 +208 0x4848 //RX_FDEQ_GAIN_12 +209 0x4848 //RX_FDEQ_GAIN_13 +210 0x4848 //RX_FDEQ_GAIN_14 +211 0x4848 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0202 //RX_FDEQ_BIN_0 +221 0x0203 //RX_FDEQ_BIN_1 +222 0x0304 //RX_FDEQ_BIN_2 +223 0x0405 //RX_FDEQ_BIN_3 +224 0x0607 //RX_FDEQ_BIN_4 +225 0x0809 //RX_FDEQ_BIN_5 +226 0x0A0B //RX_FDEQ_BIN_6 +227 0x0C0D //RX_FDEQ_BIN_7 +228 0x0E0F //RX_FDEQ_BIN_8 +229 0x1011 //RX_FDEQ_BIN_9 +230 0x1214 //RX_FDEQ_BIN_10 +231 0x1618 //RX_FDEQ_BIN_11 +232 0x1C1C //RX_FDEQ_BIN_12 +233 0x2020 //RX_FDEQ_BIN_13 +234 0x2020 //RX_FDEQ_BIN_14 +235 0x2011 //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x4000 //RX_FDEQ_RESRV_0 +245 0x0320 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0030 //RX_FDDRC_BAND_MARGIN_1 +248 0x0050 //RX_FDDRC_BAND_MARGIN_2 +249 0x0080 //RX_FDDRC_BAND_MARGIN_3 +250 0x0007 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x5000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x6400 //RX_FDDRC_THRD_3_2 +258 0x6400 //RX_FDDRC_THRD_3_3 +259 0x2000 //RX_FDDRC_SLANT_0_0 +260 0x2000 //RX_FDDRC_SLANT_0_1 +261 0x2000 //RX_FDDRC_SLANT_0_2 +262 0x2000 //RX_FDDRC_SLANT_0_3 +263 0x5333 //RX_FDDRC_SLANT_1_0 +264 0x5333 //RX_FDDRC_SLANT_1_1 +265 0x5333 //RX_FDDRC_SLANT_1_2 +266 0x5333 //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +268 0x0000 //RX_FILTINDX +269 0x0000 //RX_TDDRC_THRD_0 +270 0x0000 //RX_TDDRC_THRD_1 +271 0x7FFF //RX_TDDRC_THRD_2 +272 0x7FFF //RX_TDDRC_THRD_3 +273 0x7FFF //RX_TDDRC_SLANT_0 +274 0x7FFF //RX_TDDRC_SLANT_1 +275 0x1000 //RX_TDDRC_ALPHA_UP_0 +276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x199A //RX_TDDRC_HMNC_GAIN +279 0x0001 //RX_TDDRC_SMT_FLAG +280 0x0CCD //RX_TDDRC_SMT_W +281 0x0155 //RX_TDDRC_DRC_GAIN +282 0x7C00 //RX_LAMBDA_PKA_FP +283 0x2000 //RX_TPKA_FP +284 0x2000 //RX_MIN_G_FP +285 0x0080 //RX_MAX_G_FP +286 0x0100 //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 +288 0x0000 //RX_MAXLEVEL_CNG +289 0x3000 //RX_BWE_UV_TH +290 0x3000 //RX_BWE_UV_TH2 +291 0x1800 //RX_BWE_UV_TH3 +292 0x1000 //RX_BWE_V_TH +293 0x04CD //RX_BWE_GAIN1_V_TH1 +294 0x0F33 //RX_BWE_GAIN1_V_TH2 +295 0x7333 //RX_BWE_UV_EQ +296 0x199A //RX_BWE_V_EQ +297 0x7333 //RX_BWE_TONE_TH +298 0x0004 //RX_BWE_UV_HOLD_T +299 0x6CCD //RX_BWE_GAIN2_ALPHA +300 0x799A //RX_BWE_GAIN3_ALPHA +301 0x001E //RX_BWE_CUTOFF +302 0x3000 //RX_BWE_GAINFILL +303 0x3200 //RX_BWE_MAXTH_TONE +304 0x2000 //RX_BWE_EQ_0 +305 0x2000 //RX_BWE_EQ_1 +306 0x2000 //RX_BWE_EQ_2 +307 0x2000 //RX_BWE_EQ_3 +308 0x2000 //RX_BWE_EQ_4 +309 0x2000 //RX_BWE_EQ_5 +310 0x2000 //RX_BWE_EQ_6 +311 0x0000 //RX_BWE_RESRV_0 +312 0x0000 //RX_BWE_RESRV_1 +313 0x0000 //RX_BWE_RESRV_2 +#VOL 0 +163 0x1000 //RX_TDDRC_ALPHA_UP_1 +164 0x1000 //RX_TDDRC_ALPHA_UP_2 +165 0x1000 //RX_TDDRC_ALPHA_UP_3 +166 0x1000 //RX_TDDRC_ALPHA_UP_4 +184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +190 0x7FFF //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +269 0x0000 //RX_TDDRC_THRD_0 +270 0x0000 //RX_TDDRC_THRD_1 +271 0x7FFF //RX_TDDRC_THRD_2 +272 0x7FFF //RX_TDDRC_THRD_3 +273 0x7FFF //RX_TDDRC_SLANT_0 +274 0x7FFF //RX_TDDRC_SLANT_1 +275 0x1000 //RX_TDDRC_ALPHA_UP_0 +276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x199A //RX_TDDRC_HMNC_GAIN +279 0x0001 //RX_TDDRC_SMT_FLAG +280 0x0CCD //RX_TDDRC_SMT_W +281 0x0155 //RX_TDDRC_DRC_GAIN +195 0x0020 //RX_FDEQ_SUBNUM +196 0x4848 //RX_FDEQ_GAIN_0 +197 0x4848 //RX_FDEQ_GAIN_1 +198 0x4848 //RX_FDEQ_GAIN_2 +199 0x4848 //RX_FDEQ_GAIN_3 +200 0x4848 //RX_FDEQ_GAIN_4 +201 0x4848 //RX_FDEQ_GAIN_5 +202 0x4848 //RX_FDEQ_GAIN_6 +203 0x4848 //RX_FDEQ_GAIN_7 +204 0x4848 //RX_FDEQ_GAIN_8 +205 0x4848 //RX_FDEQ_GAIN_9 +206 0x4848 //RX_FDEQ_GAIN_10 +207 0x4848 //RX_FDEQ_GAIN_11 +208 0x4848 //RX_FDEQ_GAIN_12 +209 0x4848 //RX_FDEQ_GAIN_13 +210 0x4848 //RX_FDEQ_GAIN_14 +211 0x4848 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0202 //RX_FDEQ_BIN_0 +221 0x0203 //RX_FDEQ_BIN_1 +222 0x0304 //RX_FDEQ_BIN_2 +223 0x0405 //RX_FDEQ_BIN_3 +224 0x0607 //RX_FDEQ_BIN_4 +225 0x0809 //RX_FDEQ_BIN_5 +226 0x0A0B //RX_FDEQ_BIN_6 +227 0x0C0D //RX_FDEQ_BIN_7 +228 0x0E0F //RX_FDEQ_BIN_8 +229 0x1011 //RX_FDEQ_BIN_9 +230 0x1214 //RX_FDEQ_BIN_10 +231 0x1618 //RX_FDEQ_BIN_11 +232 0x1C1C //RX_FDEQ_BIN_12 +233 0x2020 //RX_FDEQ_BIN_13 +234 0x2020 //RX_FDEQ_BIN_14 +235 0x2011 //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x4000 //RX_FDEQ_RESRV_0 +245 0x0320 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0030 //RX_FDDRC_BAND_MARGIN_1 +248 0x0050 //RX_FDDRC_BAND_MARGIN_2 +249 0x0080 //RX_FDDRC_BAND_MARGIN_3 +250 0x0007 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x5000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x6400 //RX_FDDRC_THRD_3_2 +258 0x6400 //RX_FDDRC_THRD_3_3 +259 0x2000 //RX_FDDRC_SLANT_0_0 +260 0x2000 //RX_FDDRC_SLANT_0_1 +261 0x2000 //RX_FDDRC_SLANT_0_2 +262 0x2000 //RX_FDDRC_SLANT_0_3 +263 0x5333 //RX_FDDRC_SLANT_1_0 +264 0x5333 //RX_FDDRC_SLANT_1_1 +265 0x5333 //RX_FDDRC_SLANT_1_2 +266 0x5333 //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +286 0x0100 //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 +#VOL 1 +163 0x1000 //RX_TDDRC_ALPHA_UP_1 +164 0x1000 //RX_TDDRC_ALPHA_UP_2 +165 0x1000 //RX_TDDRC_ALPHA_UP_3 +166 0x1000 //RX_TDDRC_ALPHA_UP_4 +184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +190 0x7FFF //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +269 0x0000 //RX_TDDRC_THRD_0 +270 0x0000 //RX_TDDRC_THRD_1 +271 0x7FFF //RX_TDDRC_THRD_2 +272 0x7FFF //RX_TDDRC_THRD_3 +273 0x7FFF //RX_TDDRC_SLANT_0 +274 0x7FFF //RX_TDDRC_SLANT_1 +275 0x1000 //RX_TDDRC_ALPHA_UP_0 +276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x199A //RX_TDDRC_HMNC_GAIN +279 0x0001 //RX_TDDRC_SMT_FLAG +280 0x0CCD //RX_TDDRC_SMT_W +281 0x0155 //RX_TDDRC_DRC_GAIN +195 0x0020 //RX_FDEQ_SUBNUM +196 0x4848 //RX_FDEQ_GAIN_0 +197 0x4848 //RX_FDEQ_GAIN_1 +198 0x4848 //RX_FDEQ_GAIN_2 +199 0x4848 //RX_FDEQ_GAIN_3 +200 0x4848 //RX_FDEQ_GAIN_4 +201 0x4848 //RX_FDEQ_GAIN_5 +202 0x4848 //RX_FDEQ_GAIN_6 +203 0x4848 //RX_FDEQ_GAIN_7 +204 0x4848 //RX_FDEQ_GAIN_8 +205 0x4848 //RX_FDEQ_GAIN_9 +206 0x4848 //RX_FDEQ_GAIN_10 +207 0x4848 //RX_FDEQ_GAIN_11 +208 0x4848 //RX_FDEQ_GAIN_12 +209 0x4848 //RX_FDEQ_GAIN_13 +210 0x4848 //RX_FDEQ_GAIN_14 +211 0x4848 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0202 //RX_FDEQ_BIN_0 +221 0x0203 //RX_FDEQ_BIN_1 +222 0x0304 //RX_FDEQ_BIN_2 +223 0x0405 //RX_FDEQ_BIN_3 +224 0x0607 //RX_FDEQ_BIN_4 +225 0x0809 //RX_FDEQ_BIN_5 +226 0x0A0B //RX_FDEQ_BIN_6 +227 0x0C0D //RX_FDEQ_BIN_7 +228 0x0E0F //RX_FDEQ_BIN_8 +229 0x1011 //RX_FDEQ_BIN_9 +230 0x1214 //RX_FDEQ_BIN_10 +231 0x1618 //RX_FDEQ_BIN_11 +232 0x1C1C //RX_FDEQ_BIN_12 +233 0x2020 //RX_FDEQ_BIN_13 +234 0x2020 //RX_FDEQ_BIN_14 +235 0x2011 //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x4000 //RX_FDEQ_RESRV_0 +245 0x0320 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0030 //RX_FDDRC_BAND_MARGIN_1 +248 0x0050 //RX_FDDRC_BAND_MARGIN_2 +249 0x0080 //RX_FDDRC_BAND_MARGIN_3 +250 0x0007 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x5000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x6400 //RX_FDDRC_THRD_3_2 +258 0x6400 //RX_FDDRC_THRD_3_3 +259 0x2000 //RX_FDDRC_SLANT_0_0 +260 0x2000 //RX_FDDRC_SLANT_0_1 +261 0x2000 //RX_FDDRC_SLANT_0_2 +262 0x2000 //RX_FDDRC_SLANT_0_3 +263 0x5333 //RX_FDDRC_SLANT_1_0 +264 0x5333 //RX_FDDRC_SLANT_1_1 +265 0x5333 //RX_FDDRC_SLANT_1_2 +266 0x5333 //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +286 0x0100 //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 +#VOL 2 +163 0x1000 //RX_TDDRC_ALPHA_UP_1 +164 0x1000 //RX_TDDRC_ALPHA_UP_2 +165 0x1000 //RX_TDDRC_ALPHA_UP_3 +166 0x1000 //RX_TDDRC_ALPHA_UP_4 +184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +190 0x7FFF //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +269 0x0000 //RX_TDDRC_THRD_0 +270 0x0000 //RX_TDDRC_THRD_1 +271 0x7FFF //RX_TDDRC_THRD_2 +272 0x7FFF //RX_TDDRC_THRD_3 +273 0x7FFF //RX_TDDRC_SLANT_0 +274 0x7FFF //RX_TDDRC_SLANT_1 +275 0x1000 //RX_TDDRC_ALPHA_UP_0 +276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x199A //RX_TDDRC_HMNC_GAIN +279 0x0001 //RX_TDDRC_SMT_FLAG +280 0x0CCD //RX_TDDRC_SMT_W +281 0x0155 //RX_TDDRC_DRC_GAIN +195 0x0020 //RX_FDEQ_SUBNUM +196 0x4848 //RX_FDEQ_GAIN_0 +197 0x4848 //RX_FDEQ_GAIN_1 +198 0x4848 //RX_FDEQ_GAIN_2 +199 0x4848 //RX_FDEQ_GAIN_3 +200 0x4848 //RX_FDEQ_GAIN_4 +201 0x4848 //RX_FDEQ_GAIN_5 +202 0x4848 //RX_FDEQ_GAIN_6 +203 0x4848 //RX_FDEQ_GAIN_7 +204 0x4848 //RX_FDEQ_GAIN_8 +205 0x4848 //RX_FDEQ_GAIN_9 +206 0x4848 //RX_FDEQ_GAIN_10 +207 0x4848 //RX_FDEQ_GAIN_11 +208 0x4848 //RX_FDEQ_GAIN_12 +209 0x4848 //RX_FDEQ_GAIN_13 +210 0x4848 //RX_FDEQ_GAIN_14 +211 0x4848 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0202 //RX_FDEQ_BIN_0 +221 0x0203 //RX_FDEQ_BIN_1 +222 0x0304 //RX_FDEQ_BIN_2 +223 0x0405 //RX_FDEQ_BIN_3 +224 0x0607 //RX_FDEQ_BIN_4 +225 0x0809 //RX_FDEQ_BIN_5 +226 0x0A0B //RX_FDEQ_BIN_6 +227 0x0C0D //RX_FDEQ_BIN_7 +228 0x0E0F //RX_FDEQ_BIN_8 +229 0x1011 //RX_FDEQ_BIN_9 +230 0x1214 //RX_FDEQ_BIN_10 +231 0x1618 //RX_FDEQ_BIN_11 +232 0x1C1C //RX_FDEQ_BIN_12 +233 0x2020 //RX_FDEQ_BIN_13 +234 0x2020 //RX_FDEQ_BIN_14 +235 0x2011 //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x4000 //RX_FDEQ_RESRV_0 +245 0x0320 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0030 //RX_FDDRC_BAND_MARGIN_1 +248 0x0050 //RX_FDDRC_BAND_MARGIN_2 +249 0x0080 //RX_FDDRC_BAND_MARGIN_3 +250 0x0007 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x5000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x6400 //RX_FDDRC_THRD_3_2 +258 0x6400 //RX_FDDRC_THRD_3_3 +259 0x2000 //RX_FDDRC_SLANT_0_0 +260 0x2000 //RX_FDDRC_SLANT_0_1 +261 0x2000 //RX_FDDRC_SLANT_0_2 +262 0x2000 //RX_FDDRC_SLANT_0_3 +263 0x5333 //RX_FDDRC_SLANT_1_0 +264 0x5333 //RX_FDDRC_SLANT_1_1 +265 0x5333 //RX_FDDRC_SLANT_1_2 +266 0x5333 //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +286 0x0100 //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 +#VOL 3 +163 0x1000 //RX_TDDRC_ALPHA_UP_1 +164 0x1000 //RX_TDDRC_ALPHA_UP_2 +165 0x1000 //RX_TDDRC_ALPHA_UP_3 +166 0x1000 //RX_TDDRC_ALPHA_UP_4 +184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +190 0x7FFF //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +269 0x0000 //RX_TDDRC_THRD_0 +270 0x0000 //RX_TDDRC_THRD_1 +271 0x7FFF //RX_TDDRC_THRD_2 +272 0x7FFF //RX_TDDRC_THRD_3 +273 0x7FFF //RX_TDDRC_SLANT_0 +274 0x7FFF //RX_TDDRC_SLANT_1 +275 0x1000 //RX_TDDRC_ALPHA_UP_0 +276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x199A //RX_TDDRC_HMNC_GAIN +279 0x0001 //RX_TDDRC_SMT_FLAG +280 0x0CCD //RX_TDDRC_SMT_W +281 0x0155 //RX_TDDRC_DRC_GAIN +195 0x0020 //RX_FDEQ_SUBNUM +196 0x4848 //RX_FDEQ_GAIN_0 +197 0x4848 //RX_FDEQ_GAIN_1 +198 0x4848 //RX_FDEQ_GAIN_2 +199 0x4848 //RX_FDEQ_GAIN_3 +200 0x4848 //RX_FDEQ_GAIN_4 +201 0x4848 //RX_FDEQ_GAIN_5 +202 0x4848 //RX_FDEQ_GAIN_6 +203 0x4848 //RX_FDEQ_GAIN_7 +204 0x4848 //RX_FDEQ_GAIN_8 +205 0x4848 //RX_FDEQ_GAIN_9 +206 0x4848 //RX_FDEQ_GAIN_10 +207 0x4848 //RX_FDEQ_GAIN_11 +208 0x4848 //RX_FDEQ_GAIN_12 +209 0x4848 //RX_FDEQ_GAIN_13 +210 0x4848 //RX_FDEQ_GAIN_14 +211 0x4848 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0202 //RX_FDEQ_BIN_0 +221 0x0203 //RX_FDEQ_BIN_1 +222 0x0304 //RX_FDEQ_BIN_2 +223 0x0405 //RX_FDEQ_BIN_3 +224 0x0607 //RX_FDEQ_BIN_4 +225 0x0809 //RX_FDEQ_BIN_5 +226 0x0A0B //RX_FDEQ_BIN_6 +227 0x0C0D //RX_FDEQ_BIN_7 +228 0x0E0F //RX_FDEQ_BIN_8 +229 0x1011 //RX_FDEQ_BIN_9 +230 0x1214 //RX_FDEQ_BIN_10 +231 0x1618 //RX_FDEQ_BIN_11 +232 0x1C1C //RX_FDEQ_BIN_12 +233 0x2020 //RX_FDEQ_BIN_13 +234 0x2020 //RX_FDEQ_BIN_14 +235 0x2011 //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x4000 //RX_FDEQ_RESRV_0 +245 0x0320 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0030 //RX_FDDRC_BAND_MARGIN_1 +248 0x0050 //RX_FDDRC_BAND_MARGIN_2 +249 0x0080 //RX_FDDRC_BAND_MARGIN_3 +250 0x0007 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x5000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x6400 //RX_FDDRC_THRD_3_2 +258 0x6400 //RX_FDDRC_THRD_3_3 +259 0x2000 //RX_FDDRC_SLANT_0_0 +260 0x2000 //RX_FDDRC_SLANT_0_1 +261 0x2000 //RX_FDDRC_SLANT_0_2 +262 0x2000 //RX_FDDRC_SLANT_0_3 +263 0x5333 //RX_FDDRC_SLANT_1_0 +264 0x5333 //RX_FDDRC_SLANT_1_1 +265 0x5333 //RX_FDDRC_SLANT_1_2 +266 0x5333 //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +286 0x0100 //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 +#VOL 4 +163 0x1000 //RX_TDDRC_ALPHA_UP_1 +164 0x1000 //RX_TDDRC_ALPHA_UP_2 +165 0x1000 //RX_TDDRC_ALPHA_UP_3 +166 0x1000 //RX_TDDRC_ALPHA_UP_4 +184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +190 0x7FFF //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +269 0x0000 //RX_TDDRC_THRD_0 +270 0x0000 //RX_TDDRC_THRD_1 +271 0x7FFF //RX_TDDRC_THRD_2 +272 0x7FFF //RX_TDDRC_THRD_3 +273 0x7FFF //RX_TDDRC_SLANT_0 +274 0x7FFF //RX_TDDRC_SLANT_1 +275 0x1000 //RX_TDDRC_ALPHA_UP_0 +276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x199A //RX_TDDRC_HMNC_GAIN +279 0x0001 //RX_TDDRC_SMT_FLAG +280 0x0CCD //RX_TDDRC_SMT_W +281 0x0155 //RX_TDDRC_DRC_GAIN +195 0x0020 //RX_FDEQ_SUBNUM +196 0x4848 //RX_FDEQ_GAIN_0 +197 0x4848 //RX_FDEQ_GAIN_1 +198 0x4848 //RX_FDEQ_GAIN_2 +199 0x4848 //RX_FDEQ_GAIN_3 +200 0x4848 //RX_FDEQ_GAIN_4 +201 0x4848 //RX_FDEQ_GAIN_5 +202 0x4848 //RX_FDEQ_GAIN_6 +203 0x4848 //RX_FDEQ_GAIN_7 +204 0x4848 //RX_FDEQ_GAIN_8 +205 0x4848 //RX_FDEQ_GAIN_9 +206 0x4848 //RX_FDEQ_GAIN_10 +207 0x4848 //RX_FDEQ_GAIN_11 +208 0x4848 //RX_FDEQ_GAIN_12 +209 0x4848 //RX_FDEQ_GAIN_13 +210 0x4848 //RX_FDEQ_GAIN_14 +211 0x4848 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0202 //RX_FDEQ_BIN_0 +221 0x0203 //RX_FDEQ_BIN_1 +222 0x0304 //RX_FDEQ_BIN_2 +223 0x0405 //RX_FDEQ_BIN_3 +224 0x0607 //RX_FDEQ_BIN_4 +225 0x0809 //RX_FDEQ_BIN_5 +226 0x0A0B //RX_FDEQ_BIN_6 +227 0x0C0D //RX_FDEQ_BIN_7 +228 0x0E0F //RX_FDEQ_BIN_8 +229 0x1011 //RX_FDEQ_BIN_9 +230 0x1214 //RX_FDEQ_BIN_10 +231 0x1618 //RX_FDEQ_BIN_11 +232 0x1C1C //RX_FDEQ_BIN_12 +233 0x2020 //RX_FDEQ_BIN_13 +234 0x2020 //RX_FDEQ_BIN_14 +235 0x2011 //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x4000 //RX_FDEQ_RESRV_0 +245 0x0320 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0030 //RX_FDDRC_BAND_MARGIN_1 +248 0x0050 //RX_FDDRC_BAND_MARGIN_2 +249 0x0080 //RX_FDDRC_BAND_MARGIN_3 +250 0x0007 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x5000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x6400 //RX_FDDRC_THRD_3_2 +258 0x6400 //RX_FDDRC_THRD_3_3 +259 0x2000 //RX_FDDRC_SLANT_0_0 +260 0x2000 //RX_FDDRC_SLANT_0_1 +261 0x2000 //RX_FDDRC_SLANT_0_2 +262 0x2000 //RX_FDDRC_SLANT_0_3 +263 0x5333 //RX_FDDRC_SLANT_1_0 +264 0x5333 //RX_FDDRC_SLANT_1_1 +265 0x5333 //RX_FDDRC_SLANT_1_2 +266 0x5333 //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +286 0x0100 //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 +#VOL 5 +163 0x1000 //RX_TDDRC_ALPHA_UP_1 +164 0x1000 //RX_TDDRC_ALPHA_UP_2 +165 0x1000 //RX_TDDRC_ALPHA_UP_3 +166 0x1000 //RX_TDDRC_ALPHA_UP_4 +184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +190 0x7FFF //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +269 0x0000 //RX_TDDRC_THRD_0 +270 0x0000 //RX_TDDRC_THRD_1 +271 0x7FFF //RX_TDDRC_THRD_2 +272 0x7FFF //RX_TDDRC_THRD_3 +273 0x7FFF //RX_TDDRC_SLANT_0 +274 0x7FFF //RX_TDDRC_SLANT_1 +275 0x1000 //RX_TDDRC_ALPHA_UP_0 +276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x199A //RX_TDDRC_HMNC_GAIN +279 0x0001 //RX_TDDRC_SMT_FLAG +280 0x0CCD //RX_TDDRC_SMT_W +281 0x0155 //RX_TDDRC_DRC_GAIN +195 0x0020 //RX_FDEQ_SUBNUM +196 0x4848 //RX_FDEQ_GAIN_0 +197 0x4848 //RX_FDEQ_GAIN_1 +198 0x4848 //RX_FDEQ_GAIN_2 +199 0x4848 //RX_FDEQ_GAIN_3 +200 0x4848 //RX_FDEQ_GAIN_4 +201 0x4848 //RX_FDEQ_GAIN_5 +202 0x4848 //RX_FDEQ_GAIN_6 +203 0x4848 //RX_FDEQ_GAIN_7 +204 0x4848 //RX_FDEQ_GAIN_8 +205 0x4848 //RX_FDEQ_GAIN_9 +206 0x4848 //RX_FDEQ_GAIN_10 +207 0x4848 //RX_FDEQ_GAIN_11 +208 0x4848 //RX_FDEQ_GAIN_12 +209 0x4848 //RX_FDEQ_GAIN_13 +210 0x4848 //RX_FDEQ_GAIN_14 +211 0x4848 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0202 //RX_FDEQ_BIN_0 +221 0x0203 //RX_FDEQ_BIN_1 +222 0x0304 //RX_FDEQ_BIN_2 +223 0x0405 //RX_FDEQ_BIN_3 +224 0x0607 //RX_FDEQ_BIN_4 +225 0x0809 //RX_FDEQ_BIN_5 +226 0x0A0B //RX_FDEQ_BIN_6 +227 0x0C0D //RX_FDEQ_BIN_7 +228 0x0E0F //RX_FDEQ_BIN_8 +229 0x1011 //RX_FDEQ_BIN_9 +230 0x1214 //RX_FDEQ_BIN_10 +231 0x1618 //RX_FDEQ_BIN_11 +232 0x1C1C //RX_FDEQ_BIN_12 +233 0x2020 //RX_FDEQ_BIN_13 +234 0x2020 //RX_FDEQ_BIN_14 +235 0x2011 //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x4000 //RX_FDEQ_RESRV_0 +245 0x0320 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0030 //RX_FDDRC_BAND_MARGIN_1 +248 0x0050 //RX_FDDRC_BAND_MARGIN_2 +249 0x0080 //RX_FDDRC_BAND_MARGIN_3 +250 0x0007 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x5000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x6400 //RX_FDDRC_THRD_3_2 +258 0x6400 //RX_FDDRC_THRD_3_3 +259 0x2000 //RX_FDDRC_SLANT_0_0 +260 0x2000 //RX_FDDRC_SLANT_0_1 +261 0x2000 //RX_FDDRC_SLANT_0_2 +262 0x2000 //RX_FDDRC_SLANT_0_3 +263 0x5333 //RX_FDDRC_SLANT_1_0 +264 0x5333 //RX_FDDRC_SLANT_1_1 +265 0x5333 //RX_FDDRC_SLANT_1_2 +266 0x5333 //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +286 0x0100 //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 +#VOL 6 +163 0x1000 //RX_TDDRC_ALPHA_UP_1 +164 0x1000 //RX_TDDRC_ALPHA_UP_2 +165 0x1000 //RX_TDDRC_ALPHA_UP_3 +166 0x1000 //RX_TDDRC_ALPHA_UP_4 +184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +190 0x7FFF //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +269 0x0000 //RX_TDDRC_THRD_0 +270 0x0000 //RX_TDDRC_THRD_1 +271 0x7FFF //RX_TDDRC_THRD_2 +272 0x7FFF //RX_TDDRC_THRD_3 +273 0x7FFF //RX_TDDRC_SLANT_0 +274 0x7FFF //RX_TDDRC_SLANT_1 +275 0x1000 //RX_TDDRC_ALPHA_UP_0 +276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x199A //RX_TDDRC_HMNC_GAIN +279 0x0001 //RX_TDDRC_SMT_FLAG +280 0x0CCD //RX_TDDRC_SMT_W +281 0x0155 //RX_TDDRC_DRC_GAIN +195 0x0020 //RX_FDEQ_SUBNUM +196 0x4848 //RX_FDEQ_GAIN_0 +197 0x4848 //RX_FDEQ_GAIN_1 +198 0x4848 //RX_FDEQ_GAIN_2 +199 0x4848 //RX_FDEQ_GAIN_3 +200 0x4848 //RX_FDEQ_GAIN_4 +201 0x4848 //RX_FDEQ_GAIN_5 +202 0x4848 //RX_FDEQ_GAIN_6 +203 0x4848 //RX_FDEQ_GAIN_7 +204 0x4848 //RX_FDEQ_GAIN_8 +205 0x4848 //RX_FDEQ_GAIN_9 +206 0x4848 //RX_FDEQ_GAIN_10 +207 0x4848 //RX_FDEQ_GAIN_11 +208 0x4848 //RX_FDEQ_GAIN_12 +209 0x4848 //RX_FDEQ_GAIN_13 +210 0x4848 //RX_FDEQ_GAIN_14 +211 0x4848 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0202 //RX_FDEQ_BIN_0 +221 0x0203 //RX_FDEQ_BIN_1 +222 0x0304 //RX_FDEQ_BIN_2 +223 0x0405 //RX_FDEQ_BIN_3 +224 0x0607 //RX_FDEQ_BIN_4 +225 0x0809 //RX_FDEQ_BIN_5 +226 0x0A0B //RX_FDEQ_BIN_6 +227 0x0C0D //RX_FDEQ_BIN_7 +228 0x0E0F //RX_FDEQ_BIN_8 +229 0x1011 //RX_FDEQ_BIN_9 +230 0x1214 //RX_FDEQ_BIN_10 +231 0x1618 //RX_FDEQ_BIN_11 +232 0x1C1C //RX_FDEQ_BIN_12 +233 0x2020 //RX_FDEQ_BIN_13 +234 0x2020 //RX_FDEQ_BIN_14 +235 0x2011 //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x4000 //RX_FDEQ_RESRV_0 +245 0x0320 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0030 //RX_FDDRC_BAND_MARGIN_1 +248 0x0050 //RX_FDDRC_BAND_MARGIN_2 +249 0x0080 //RX_FDDRC_BAND_MARGIN_3 +250 0x0007 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x5000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x6400 //RX_FDDRC_THRD_3_2 +258 0x6400 //RX_FDDRC_THRD_3_3 +259 0x2000 //RX_FDDRC_SLANT_0_0 +260 0x2000 //RX_FDDRC_SLANT_0_1 +261 0x2000 //RX_FDDRC_SLANT_0_2 +262 0x2000 //RX_FDDRC_SLANT_0_3 +263 0x5333 //RX_FDDRC_SLANT_1_0 +264 0x5333 //RX_FDDRC_SLANT_1_1 +265 0x5333 //RX_FDDRC_SLANT_1_2 +266 0x5333 //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +286 0x0100 //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 diff --git a/audio/panther/tuning/fortemedia/HANDSET.dat b/audio/panther/tuning/fortemedia/HANDSET.dat index a996c9b..953650c 100644 Binary files a/audio/panther/tuning/fortemedia/HANDSET.dat and b/audio/panther/tuning/fortemedia/HANDSET.dat differ diff --git a/audio/panther/tuning/fortemedia/HANDSET.mods b/audio/panther/tuning/fortemedia/HANDSET.mods index b64d3d1..249b65e 100644 --- a/audio/panther/tuning/fortemedia/HANDSET.mods +++ b/audio/panther/tuning/fortemedia/HANDSET.mods @@ -1,11 +1,12 @@ #PLATFORM_NAME gChip #EXPORT_FLAG HANDSET -#SINGLE_API_VER 1.1.6 -#SAVE_TIME 2021-08-20 16:47:25 +#SINGLE_API_VER 1.2.0 +#SAVE_TIME 2022-02-24 17:08:24 #CASE_NAME HANDSET-HANDSET-RESERVE1-FB -#PARAM_TYPE TX+RX -#TOTAL_CUSTOM_STEP 7 +#PARAM_MODE FULL +#PARAM_TYPE TX+2RX +#TOTAL_CUSTOM_STEP 7+7 #TX 0 0x0000 //TX_OPERATION_MODE_0 1 0x0000 //TX_OPERATION_MODE_1 @@ -28,7 +29,7 @@ 18 0x0000 //TX_SYS_RESRV_2 19 0x0000 //TX_SYS_RESRV_3 20 0x0000 //TX_DIST2REF0 -21 0x009D //TX_DIST2REF1 +21 0x00A4 //TX_DIST2REF1 22 0x0000 //TX_DIST2REF_02 23 0x0000 //TX_DIST2REF_03 24 0x0000 //TX_DIST2REF_04 @@ -258,12 +259,12 @@ 248 0xF800 //TX_THR_SN_EST_6 249 0xF700 //TX_THR_SN_EST_7 250 0x0000 //TX_DELTA_THR_SN_EST_0 -251 0x0100 //TX_DELTA_THR_SN_EST_1 +251 0x0200 //TX_DELTA_THR_SN_EST_1 252 0x0200 //TX_DELTA_THR_SN_EST_2 253 0x0200 //TX_DELTA_THR_SN_EST_3 -254 0x0200 //TX_DELTA_THR_SN_EST_4 -255 0x0100 //TX_DELTA_THR_SN_EST_5 -256 0x0200 //TX_DELTA_THR_SN_EST_6 +254 0x0100 //TX_DELTA_THR_SN_EST_4 +255 0x0200 //TX_DELTA_THR_SN_EST_5 +256 0x0100 //TX_DELTA_THR_SN_EST_6 257 0x0200 //TX_DELTA_THR_SN_EST_7 258 0x4000 //TX_LAMBDA_NN_EST_0 259 0x4000 //TX_LAMBDA_NN_EST_1 @@ -291,16 +292,16 @@ 281 0x0014 //TX_NS_LVL_CTRL_0 282 0x0016 //TX_NS_LVL_CTRL_1 283 0x0016 //TX_NS_LVL_CTRL_2 -284 0x0016 //TX_NS_LVL_CTRL_3 -285 0x0018 //TX_NS_LVL_CTRL_4 -286 0x0016 //TX_NS_LVL_CTRL_5 -287 0x0012 //TX_NS_LVL_CTRL_6 +284 0x0018 //TX_NS_LVL_CTRL_3 +285 0x0016 //TX_NS_LVL_CTRL_4 +286 0x0012 //TX_NS_LVL_CTRL_5 +287 0x0016 //TX_NS_LVL_CTRL_6 288 0x0017 //TX_NS_LVL_CTRL_7 289 0x000E //TX_MIN_GAIN_S_0 -290 0x0012 //TX_MIN_GAIN_S_1 -291 0x0007 //TX_MIN_GAIN_S_2 -292 0x0012 //TX_MIN_GAIN_S_3 -293 0x0010 //TX_MIN_GAIN_S_4 +290 0x0007 //TX_MIN_GAIN_S_1 +291 0x0012 //TX_MIN_GAIN_S_2 +292 0x0010 //TX_MIN_GAIN_S_3 +293 0x0012 //TX_MIN_GAIN_S_4 294 0x0012 //TX_MIN_GAIN_S_5 295 0x0012 //TX_MIN_GAIN_S_6 296 0x0012 //TX_MIN_GAIN_S_7 @@ -322,29 +323,29 @@ 312 0x7FFF //TX_A_POST_FILT_0 313 0x2000 //TX_A_POST_FILT_1 314 0x4000 //TX_A_POST_FILT_S_0 -315 0x5000 //TX_A_POST_FILT_S_1 +315 0x4000 //TX_A_POST_FILT_S_1 316 0x4000 //TX_A_POST_FILT_S_2 317 0x4000 //TX_A_POST_FILT_S_3 318 0x4000 //TX_A_POST_FILT_S_4 319 0x4000 //TX_A_POST_FILT_S_5 -320 0x4000 //TX_A_POST_FILT_S_6 +320 0x5000 //TX_A_POST_FILT_S_6 321 0x7000 //TX_A_POST_FILT_S_7 322 0x1000 //TX_B_POST_FILT_0 323 0x2000 //TX_B_POST_FILT_1 -324 0x3000 //TX_B_POST_FILT_2 +324 0x2000 //TX_B_POST_FILT_2 325 0x2000 //TX_B_POST_FILT_3 -326 0x5000 //TX_B_POST_FILT_4 +326 0x2000 //TX_B_POST_FILT_4 327 0x2000 //TX_B_POST_FILT_5 -328 0x6000 //TX_B_POST_FILT_6 +328 0x3000 //TX_B_POST_FILT_6 329 0x3000 //TX_B_POST_FILT_7 330 0x1000 //TX_B_LESSCUT_RTO_S_0 -331 0x6000 //TX_B_LESSCUT_RTO_S_1 -332 0x6000 //TX_B_LESSCUT_RTO_S_2 -333 0x6000 //TX_B_LESSCUT_RTO_S_3 -334 0x6000 //TX_B_LESSCUT_RTO_S_4 -335 0x6000 //TX_B_LESSCUT_RTO_S_5 -336 0x7FFF //TX_B_LESSCUT_RTO_S_6 -337 0x7FFF //TX_B_LESSCUT_RTO_S_7 +331 0x1000 //TX_B_LESSCUT_RTO_S_1 +332 0x1000 //TX_B_LESSCUT_RTO_S_2 +333 0x1000 //TX_B_LESSCUT_RTO_S_3 +334 0x1000 //TX_B_LESSCUT_RTO_S_4 +335 0x1000 //TX_B_LESSCUT_RTO_S_5 +336 0x1000 //TX_B_LESSCUT_RTO_S_6 +337 0x1000 //TX_B_LESSCUT_RTO_S_7 338 0x7E14 //TX_LAMBDA_PFILT 339 0x7C29 //TX_LAMBDA_PFILT_S_0 340 0x7C29 //TX_LAMBDA_PFILT_S_1 @@ -387,10 +388,10 @@ 377 0x4E20 //TX_NOISE_TH_5_4 378 0x39DF //TX_NOISE_TH_6 379 0x0014 //TX_MINENOISE_TH -380 0x4000 //TX_MINENOISE_MIC0_TH_MTS -381 0xFFEE //TX_MINENOISE_MIC0_TH_EXP -382 0x6000 //TX_MINENOISE_MIC0_S_TH_MTS -383 0xFFF3 //TX_MINENOISE_MIC0_S_TH_EXP +380 0xD508 //TX_MORENS_TFMASK_TH +381 0x0001 //TX_DRC_QUIET_FLOOR +382 0x6D60 //TX_RATIODTL_CUT_TH +383 0x1482 //TX_DT_CUT_K1 384 0x00A5 //TX_OUT_ENER_S_TH_CLEAN 385 0x00A5 //TX_OUT_ENER_S_TH_LESSCLEAN 386 0x00A5 //TX_OUT_ENER_S_TH_NOISY @@ -398,15 +399,15 @@ 388 0x0200 //TX_OUT_ENER_TH_SPEECH 389 0x2000 //TX_SN_NPB_GAIN 390 0x0000 //TX_NN_NPB_GAIN -391 0x0000 //TX_CSX_ALPHA_0 -392 0x0000 //TX_CSX_ALPHA_1 -393 0x0000 //TX_CSX_ALPHA_2 -394 0x0000 //TX_CSX_ALPHA_3 -395 0x0800 //TX_MU_ARSP_EST -396 0x00C8 //TX_P_OUTBEAM_MIN_TH +391 0x3000 //TX_POST_MASK_SUP_HSNE +392 0x07D0 //TX_TAIL_DET_TH +393 0x4000 //TX_B_LESSCUT_RTO_WTA +394 0x0000 //TX_MEL_G_R +395 0x0080 //TX_SUPHIGH_TH +396 0x0000 //TX_MASK_G_R 397 0x0002 //TX_EXTRA_NS_L -398 0x0800 //TX_EXTRA_NS_A -399 0x0005 //TX_VR_NOISE_FLOOR_TH +398 0x1800 //TX_C_POST_FLT_MASK +399 0x7FFF //TX_A_POST_FLT_WNS 400 0x0148 //TX_MIN_G_LOW300HZ 401 0x0004 //TX_MAXLEVEL_CNG 402 0x00B4 //TX_STN_NOISE_TH @@ -521,16 +522,16 @@ 511 0x6666 //TX_MIC_TO_BFGAIN 512 0x0000 //TX_MICTOBFGAIN0 513 0x0000 //TX_FASTMUE_TH -514 0x0000 //TX_DERVB_LEN_0 -515 0x0000 //TX_DERVB_LEN_1 -516 0x0000 //TX_RHO_DERVB -517 0x0000 //TX_MIC_INDX_DERVB -518 0x0000 //TX_MU_DERVB -519 0x0000 //TX_DR_RESRV_0 -520 0x0000 //TX_DR_RESRV_1 -521 0x0000 //TX_DR_RESRV_2 -522 0x0000 //TX_DR_RESRV_3 -523 0x0000 //TX_DR_RESRV_4 +514 0x2CCC //TX_DEREVERB_LF_MU +515 0x3200 //TX_DEREVERB_HF_MU +516 0x0007 //TX_DEREVERB_DELAY +517 0x0004 //TX_DEREVERB_COEF_LEN +518 0x0003 //TX_DEREVERB_DNR +519 0x0000 //TX_DEREVERB_ALPHA +520 0x0000 //TX_DEREVERB_BETA +521 0x7FFF //TX_GSC_RTOL_TH +522 0x7FFF //TX_GSC_RTOH_TH +523 0x7E2C //TX_WIDE2_MEANHTH 524 0x0000 //TX_DR_RESRV_5 525 0x0000 //TX_DR_RESRV_6 526 0x0000 //TX_DR_RESRV_7 @@ -574,24 +575,24 @@ 564 0x0000 //TX_PB_RESRV_0 565 0x0000 //TX_PB_RESRV_1 566 0x0030 //TX_FDEQ_SUBNUM -567 0x504A //TX_FDEQ_GAIN_0 -568 0x4C54 //TX_FDEQ_GAIN_1 -569 0x554B //TX_FDEQ_GAIN_2 -570 0x4D4E //TX_FDEQ_GAIN_3 -571 0x4F4F //TX_FDEQ_GAIN_4 -572 0x4E51 //TX_FDEQ_GAIN_5 -573 0x5154 //TX_FDEQ_GAIN_6 -574 0x5456 //TX_FDEQ_GAIN_7 -575 0x5E66 //TX_FDEQ_GAIN_8 -576 0x675D //TX_FDEQ_GAIN_9 -577 0x5655 //TX_FDEQ_GAIN_10 -578 0x5956 //TX_FDEQ_GAIN_11 -579 0x5656 //TX_FDEQ_GAIN_12 -580 0x5953 //TX_FDEQ_GAIN_13 -581 0x575A //TX_FDEQ_GAIN_14 -582 0x5559 //TX_FDEQ_GAIN_15 -583 0x656E //TX_FDEQ_GAIN_16 -584 0x7B98 //TX_FDEQ_GAIN_17 +567 0x4C4A //TX_FDEQ_GAIN_0 +568 0x4B4F //TX_FDEQ_GAIN_1 +569 0x504B //TX_FDEQ_GAIN_2 +570 0x4A4C //TX_FDEQ_GAIN_3 +571 0x4A49 //TX_FDEQ_GAIN_4 +572 0x4F48 //TX_FDEQ_GAIN_5 +573 0x4A4E //TX_FDEQ_GAIN_6 +574 0x534E //TX_FDEQ_GAIN_7 +575 0x494F //TX_FDEQ_GAIN_8 +576 0x5E6E //TX_FDEQ_GAIN_9 +577 0x787A //TX_FDEQ_GAIN_10 +578 0x6A58 //TX_FDEQ_GAIN_11 +579 0x5051 //TX_FDEQ_GAIN_12 +580 0x5156 //TX_FDEQ_GAIN_13 +581 0x6168 //TX_FDEQ_GAIN_14 +582 0x7678 //TX_FDEQ_GAIN_15 +583 0x7A87 //TX_FDEQ_GAIN_16 +584 0x9898 //TX_FDEQ_GAIN_17 585 0x9898 //TX_FDEQ_GAIN_18 586 0x9848 //TX_FDEQ_GAIN_19 587 0x4848 //TX_FDEQ_GAIN_20 @@ -630,15 +631,15 @@ 620 0x4848 //TX_PREEQ_GAIN_MIC0_3 621 0x4848 //TX_PREEQ_GAIN_MIC0_4 622 0x4848 //TX_PREEQ_GAIN_MIC0_5 -623 0x4846 //TX_PREEQ_GAIN_MIC0_6 -624 0x4645 //TX_PREEQ_GAIN_MIC0_7 -625 0x4545 //TX_PREEQ_GAIN_MIC0_8 -626 0x4545 //TX_PREEQ_GAIN_MIC0_9 -627 0x4444 //TX_PREEQ_GAIN_MIC0_10 -628 0x4443 //TX_PREEQ_GAIN_MIC0_11 -629 0x4241 //TX_PREEQ_GAIN_MIC0_12 -630 0x3C3E //TX_PREEQ_GAIN_MIC0_13 -631 0x3E40 //TX_PREEQ_GAIN_MIC0_14 +623 0x4848 //TX_PREEQ_GAIN_MIC0_6 +624 0x4848 //TX_PREEQ_GAIN_MIC0_7 +625 0x4848 //TX_PREEQ_GAIN_MIC0_8 +626 0x4848 //TX_PREEQ_GAIN_MIC0_9 +627 0x4848 //TX_PREEQ_GAIN_MIC0_10 +628 0x4848 //TX_PREEQ_GAIN_MIC0_11 +629 0x4848 //TX_PREEQ_GAIN_MIC0_12 +630 0x4848 //TX_PREEQ_GAIN_MIC0_13 +631 0x4848 //TX_PREEQ_GAIN_MIC0_14 632 0x4848 //TX_PREEQ_GAIN_MIC0_15 633 0x4848 //TX_PREEQ_GAIN_MIC0_16 634 0x4848 //TX_PREEQ_GAIN_MIC0_17 @@ -648,23 +649,23 @@ 638 0x4848 //TX_PREEQ_GAIN_MIC0_21 639 0x4848 //TX_PREEQ_GAIN_MIC0_22 640 0x4848 //TX_PREEQ_GAIN_MIC0_23 -641 0x0202 //TX_PREEQ_BIN_MIC0_0 -642 0x0203 //TX_PREEQ_BIN_MIC0_1 -643 0x0303 //TX_PREEQ_BIN_MIC0_2 -644 0x0304 //TX_PREEQ_BIN_MIC0_3 -645 0x0405 //TX_PREEQ_BIN_MIC0_4 -646 0x0506 //TX_PREEQ_BIN_MIC0_5 -647 0x0808 //TX_PREEQ_BIN_MIC0_6 -648 0x0809 //TX_PREEQ_BIN_MIC0_7 -649 0x0A0A //TX_PREEQ_BIN_MIC0_8 -650 0x0C10 //TX_PREEQ_BIN_MIC0_9 -651 0x1013 //TX_PREEQ_BIN_MIC0_10 -652 0x1414 //TX_PREEQ_BIN_MIC0_11 -653 0x261E //TX_PREEQ_BIN_MIC0_12 -654 0x1E14 //TX_PREEQ_BIN_MIC0_13 -655 0x1414 //TX_PREEQ_BIN_MIC0_14 -656 0x2814 //TX_PREEQ_BIN_MIC0_15 -657 0x4000 //TX_PREEQ_BIN_MIC0_16 +641 0x1812 //TX_PREEQ_BIN_MIC0_0 +642 0x0A0A //TX_PREEQ_BIN_MIC0_1 +643 0x0808 //TX_PREEQ_BIN_MIC0_2 +644 0x080A //TX_PREEQ_BIN_MIC0_3 +645 0x0B09 //TX_PREEQ_BIN_MIC0_4 +646 0x0A06 //TX_PREEQ_BIN_MIC0_5 +647 0x0606 //TX_PREEQ_BIN_MIC0_6 +648 0x0605 //TX_PREEQ_BIN_MIC0_7 +649 0x050A //TX_PREEQ_BIN_MIC0_8 +650 0x1505 //TX_PREEQ_BIN_MIC0_9 +651 0x0506 //TX_PREEQ_BIN_MIC0_10 +652 0x0615 //TX_PREEQ_BIN_MIC0_11 +653 0x1516 //TX_PREEQ_BIN_MIC0_12 +654 0x2021 //TX_PREEQ_BIN_MIC0_13 +655 0x2021 //TX_PREEQ_BIN_MIC0_14 +656 0x2021 //TX_PREEQ_BIN_MIC0_15 +657 0x0800 //TX_PREEQ_BIN_MIC0_16 658 0x0000 //TX_PREEQ_BIN_MIC0_17 659 0x0000 //TX_PREEQ_BIN_MIC0_18 660 0x0000 //TX_PREEQ_BIN_MIC0_19 @@ -679,17 +680,17 @@ 669 0x4848 //TX_PREEQ_GAIN_MIC1_3 670 0x4848 //TX_PREEQ_GAIN_MIC1_4 671 0x4848 //TX_PREEQ_GAIN_MIC1_5 -672 0x4849 //TX_PREEQ_GAIN_MIC1_6 -673 0x4A4B //TX_PREEQ_GAIN_MIC1_7 -674 0x4C4B //TX_PREEQ_GAIN_MIC1_8 -675 0x4A48 //TX_PREEQ_GAIN_MIC1_9 -676 0x4B4C //TX_PREEQ_GAIN_MIC1_10 -677 0x4C4B //TX_PREEQ_GAIN_MIC1_11 -678 0x4838 //TX_PREEQ_GAIN_MIC1_12 -679 0x3858 //TX_PREEQ_GAIN_MIC1_13 -680 0x7060 //TX_PREEQ_GAIN_MIC1_14 -681 0x9870 //TX_PREEQ_GAIN_MIC1_15 -682 0x5848 //TX_PREEQ_GAIN_MIC1_16 +672 0x4A4C //TX_PREEQ_GAIN_MIC1_6 +673 0x4E50 //TX_PREEQ_GAIN_MIC1_7 +674 0x5456 //TX_PREEQ_GAIN_MIC1_8 +675 0x585C //TX_PREEQ_GAIN_MIC1_9 +676 0x5C64 //TX_PREEQ_GAIN_MIC1_10 +677 0x7478 //TX_PREEQ_GAIN_MIC1_11 +678 0x705C //TX_PREEQ_GAIN_MIC1_12 +679 0x4838 //TX_PREEQ_GAIN_MIC1_13 +680 0x3C70 //TX_PREEQ_GAIN_MIC1_14 +681 0x4848 //TX_PREEQ_GAIN_MIC1_15 +682 0x4848 //TX_PREEQ_GAIN_MIC1_16 683 0x4848 //TX_PREEQ_GAIN_MIC1_17 684 0x4848 //TX_PREEQ_GAIN_MIC1_18 685 0x4848 //TX_PREEQ_GAIN_MIC1_19 @@ -703,17 +704,17 @@ 693 0x0304 //TX_PREEQ_BIN_MIC1_3 694 0x0405 //TX_PREEQ_BIN_MIC1_4 695 0x0506 //TX_PREEQ_BIN_MIC1_5 -696 0x0808 //TX_PREEQ_BIN_MIC1_6 -697 0x0809 //TX_PREEQ_BIN_MIC1_7 -698 0x0A0A //TX_PREEQ_BIN_MIC1_8 +696 0x0708 //TX_PREEQ_BIN_MIC1_6 +697 0x0909 //TX_PREEQ_BIN_MIC1_7 +698 0x090B //TX_PREEQ_BIN_MIC1_8 699 0x0C10 //TX_PREEQ_BIN_MIC1_9 700 0x1013 //TX_PREEQ_BIN_MIC1_10 701 0x1414 //TX_PREEQ_BIN_MIC1_11 -702 0x261E //TX_PREEQ_BIN_MIC1_12 -703 0x1E14 //TX_PREEQ_BIN_MIC1_13 -704 0x1414 //TX_PREEQ_BIN_MIC1_14 -705 0x2814 //TX_PREEQ_BIN_MIC1_15 -706 0x4000 //TX_PREEQ_BIN_MIC1_16 +702 0x1414 //TX_PREEQ_BIN_MIC1_12 +703 0x1C1E //TX_PREEQ_BIN_MIC1_13 +704 0x1E28 //TX_PREEQ_BIN_MIC1_14 +705 0x462C //TX_PREEQ_BIN_MIC1_15 +706 0x0000 //TX_PREEQ_BIN_MIC1_16 707 0x0000 //TX_PREEQ_BIN_MIC1_17 708 0x0000 //TX_PREEQ_BIN_MIC1_18 709 0x0000 //TX_PREEQ_BIN_MIC1_19 @@ -746,23 +747,23 @@ 736 0x4848 //TX_PREEQ_GAIN_MIC2_21 737 0x4848 //TX_PREEQ_GAIN_MIC2_22 738 0x4848 //TX_PREEQ_GAIN_MIC2_23 -739 0x0202 //TX_PREEQ_BIN_MIC2_0 -740 0x0203 //TX_PREEQ_BIN_MIC2_1 -741 0x0303 //TX_PREEQ_BIN_MIC2_2 -742 0x0304 //TX_PREEQ_BIN_MIC2_3 -743 0x0405 //TX_PREEQ_BIN_MIC2_4 -744 0x0506 //TX_PREEQ_BIN_MIC2_5 -745 0x0808 //TX_PREEQ_BIN_MIC2_6 -746 0x0809 //TX_PREEQ_BIN_MIC2_7 -747 0x0A0A //TX_PREEQ_BIN_MIC2_8 -748 0x0C10 //TX_PREEQ_BIN_MIC2_9 -749 0x1013 //TX_PREEQ_BIN_MIC2_10 -750 0x1414 //TX_PREEQ_BIN_MIC2_11 -751 0x261E //TX_PREEQ_BIN_MIC2_12 -752 0x1E14 //TX_PREEQ_BIN_MIC2_13 -753 0x1414 //TX_PREEQ_BIN_MIC2_14 -754 0x2814 //TX_PREEQ_BIN_MIC2_15 -755 0x4000 //TX_PREEQ_BIN_MIC2_16 +739 0x0E10 //TX_PREEQ_BIN_MIC2_0 +740 0x1010 //TX_PREEQ_BIN_MIC2_1 +741 0x1010 //TX_PREEQ_BIN_MIC2_2 +742 0x1010 //TX_PREEQ_BIN_MIC2_3 +743 0x1010 //TX_PREEQ_BIN_MIC2_4 +744 0x1010 //TX_PREEQ_BIN_MIC2_5 +745 0x1010 //TX_PREEQ_BIN_MIC2_6 +746 0x1010 //TX_PREEQ_BIN_MIC2_7 +747 0x1010 //TX_PREEQ_BIN_MIC2_8 +748 0x1010 //TX_PREEQ_BIN_MIC2_9 +749 0x1010 //TX_PREEQ_BIN_MIC2_10 +750 0x1010 //TX_PREEQ_BIN_MIC2_11 +751 0x1010 //TX_PREEQ_BIN_MIC2_12 +752 0x1010 //TX_PREEQ_BIN_MIC2_13 +753 0x1010 //TX_PREEQ_BIN_MIC2_14 +754 0x0200 //TX_PREEQ_BIN_MIC2_15 +755 0x0000 //TX_PREEQ_BIN_MIC2_16 756 0x0000 //TX_PREEQ_BIN_MIC2_17 757 0x0000 //TX_PREEQ_BIN_MIC2_18 758 0x0000 //TX_PREEQ_BIN_MIC2_19 @@ -873,7 +874,7 @@ 863 0x199A //TX_TDDRC_HMNC_GAIN 864 0x0000 //TX_TDDRC_SMT_FLAG 865 0x0CCD //TX_TDDRC_SMT_W -866 0x05F5 //TX_TDDRC_DRC_GAIN +866 0x0504 //TX_TDDRC_DRC_GAIN 867 0x7FFF //TX_TDDRC_LMT_THRD 868 0x0000 //TX_TDDRC_LMT_ALPHA 869 0x0000 //TX_TFMASKLTH @@ -904,6 +905,71 @@ 894 0xC000 //TX_FASTNS_SSA_THHFL 895 0xCCCC //TX_FASTNS_SSA_THLFH 896 0xD999 //TX_FASTNS_SSA_THHFH +897 0x2339 //TX_SENDFUNC_REG_MICMUTE +898 0x0021 //TX_SENDFUNC_REG_MICMUTE1 +899 0x02BC //TX_MICMUTE_RATIO_THR +900 0x0140 //TX_MICMUTE_AMP_THR +901 0x0004 //TX_MICMUTE_HPF_IND +902 0x00C0 //TX_MICMUTE_LOG_EYR_TH +903 0x0008 //TX_MICMUTE_CVG_TIME +904 0x0008 //TX_MICMUTE_RELEASE_TIME +905 0x01FE //TX_MIC_VOLUME_MIC0MUTE +906 0x0020 //TX_MICMUTE_EPD_OFFSET_0 +907 0x001E //TX_MICMUTE_FRQ_AEC_L +908 0x7999 //TX_MICMUTE_EAD_THR +909 0x7FFF //TX_MICMUTE_LAMBDA_CB_NLE +910 0x7FFF //TX_MICMUTE_LAMBDA_RE_EST +911 0x4000 //TX_DTD_THR1_MICMUTE_0 +912 0x7000 //TX_DTD_THR1_MICMUTE_1 +913 0x7FFF //TX_DTD_THR1_MICMUTE_2 +914 0x7FFF //TX_DTD_THR1_MICMUTE_3 +915 0x6CCC //TX_DTD_THR2_MICMUTE_0 +916 0x0400 //TX_MICMUTE_MIN_EQ_RE_EST_0 +917 0x0400 //TX_MICMUTE_MIN_EQ_RE_EST_1 +918 0x1000 //TX_MICMUTE_MIN_EQ_RE_EST_2 +919 0x7FFF //TX_MICMUTE_MIN_EQ_RE_EST_3 +920 0x7FFF //TX_MICMUTE_MIN_EQ_RE_EST_4 +921 0x4000 //TX_MICMUTE_C_POST_FLT +922 0x03E8 //TX_MICMUTE_DT_CUT_K +923 0x0001 //TX_MICMUTE_DT_CUT_THR +924 0x03E8 //TX_MICMUTE_DT_CUT_K2 +925 0x0001 //TX_MICMUTE_DT_CUT_THR2 +926 0x0064 //TX_MICMUTE_DT2_HOLD_N +927 0x1000 //TX_MICMUTE_RATIODTH_THCUT +928 0x1000 //TX_MICMUTE_B_POST_FLT_ECHOL +929 0x7FFF //TX_MICMUTE_B_POST_FLT_ECHOH +930 0x0400 //TX_MICMUTE_C_POST_FLT_MASK +931 0x7999 //TX_MICMUTE_RATIODTL_CUT_TH +932 0x0258 //TX_MICMUTE_DT_CUT_K1 +933 0x0800 //TX_MICMUTE_N2_SN_EST +934 0xFC00 //TX_MICMUTE_THR_SN_EST_0 +935 0x001C //TX_MICMUTE_MIN_G_CTRL_0 +936 0x6000 //TX_MICMUTE_A_POST_FILT_S_0 +937 0x7000 //TX_MICMUTE_B_POST_FILT_0 +938 0x2710 //TX_MIC1RUB_AMP_THR +939 0x0010 //TX_MIC1MUTE_RATIO_THR +940 0x0450 //TX_MIC1MUTE_AMP_THR +941 0x0008 //TX_MIC1MUTE_CVG_TIME +942 0x0008 //TX_MIC1MUTE_RELEASE_TIME +943 0x0000 //TX_AMS_RESRV_01 +944 0x0000 //TX_AMS_RESRV_02 +945 0x0000 //TX_AMS_RESRV_03 +946 0x0000 //TX_AMS_RESRV_04 +947 0x0000 //TX_AMS_RESRV_05 +948 0x0000 //TX_AMS_RESRV_06 +949 0x0000 //TX_AMS_RESRV_07 +950 0x0000 //TX_AMS_RESRV_08 +951 0x0000 //TX_AMS_RESRV_09 +952 0x0000 //TX_AMS_RESRV_10 +953 0x0000 //TX_AMS_RESRV_11 +954 0x0000 //TX_AMS_RESRV_12 +955 0x0000 //TX_AMS_RESRV_13 +956 0x0000 //TX_AMS_RESRV_14 +957 0x0000 //TX_AMS_RESRV_15 +958 0x0000 //TX_AMS_RESRV_16 +959 0x0000 //TX_AMS_RESRV_17 +960 0x0000 //TX_AMS_RESRV_18 +961 0x0000 //TX_AMS_RESRV_19 #RX 0 0x003C //RX_RECVFUNC_MODE_0 1 0x0000 //RX_RECVFUNC_MODE_1 @@ -915,7 +981,7 @@ 7 0x1000 //RX_TDDRC_ALPHA_UP_2 8 0x1000 //RX_TDDRC_ALPHA_UP_3 9 0x1000 //RX_TDDRC_ALPHA_UP_4 -10 0x064E //RX_PGA +10 0x0722 //RX_PGA 11 0x7FFF //RX_A_HP 12 0x4000 //RX_B_PE 13 0x5800 //RX_THR_PITCH_DET_0 @@ -944,21 +1010,21 @@ 36 0x0000 //RX_LMT_THRD 37 0x4000 //RX_LMT_ALPHA 38 0x0020 //RX_FDEQ_SUBNUM -39 0x4848 //RX_FDEQ_GAIN_0 -40 0x4850 //RX_FDEQ_GAIN_1 -41 0x6478 //RX_FDEQ_GAIN_2 -42 0x8689 //RX_FDEQ_GAIN_3 -43 0x908F //RX_FDEQ_GAIN_4 -44 0x9495 //RX_FDEQ_GAIN_5 -45 0x989D //RX_FDEQ_GAIN_6 -46 0x9DA6 //RX_FDEQ_GAIN_7 -47 0xA895 //RX_FDEQ_GAIN_8 -48 0x8A8A //RX_FDEQ_GAIN_9 -49 0x8E78 //RX_FDEQ_GAIN_10 -50 0x7070 //RX_FDEQ_GAIN_11 -51 0x7680 //RX_FDEQ_GAIN_12 -52 0x787C //RX_FDEQ_GAIN_13 -53 0x8890 //RX_FDEQ_GAIN_14 +39 0x4E4E //RX_FDEQ_GAIN_0 +40 0x4E56 //RX_FDEQ_GAIN_1 +41 0x6878 //RX_FDEQ_GAIN_2 +42 0x8088 //RX_FDEQ_GAIN_3 +43 0x848B //RX_FDEQ_GAIN_4 +44 0x8F8E //RX_FDEQ_GAIN_5 +45 0x9494 //RX_FDEQ_GAIN_6 +46 0x96A0 //RX_FDEQ_GAIN_7 +47 0xB8A0 //RX_FDEQ_GAIN_8 +48 0xA99D //RX_FDEQ_GAIN_9 +49 0x9D6A //RX_FDEQ_GAIN_10 +50 0x626B //RX_FDEQ_GAIN_11 +51 0x6C78 //RX_FDEQ_GAIN_12 +52 0x7884 //RX_FDEQ_GAIN_13 +53 0x9098 //RX_FDEQ_GAIN_14 54 0x9CAC //RX_FDEQ_GAIN_15 55 0x4848 //RX_FDEQ_GAIN_16 56 0x4848 //RX_FDEQ_GAIN_17 @@ -1029,7 +1095,7 @@ 121 0x199A //RX_TDDRC_HMNC_GAIN 122 0x0001 //RX_TDDRC_SMT_FLAG 123 0x0CCD //RX_TDDRC_SMT_W -124 0x0275 //RX_TDDRC_DRC_GAIN +124 0x02FD //RX_TDDRC_DRC_GAIN 125 0x7C00 //RX_LAMBDA_PKA_FP 126 0x2000 //RX_TPKA_FP 127 0x2000 //RX_MIN_G_FP @@ -1085,23 +1151,23 @@ 121 0x199A //RX_TDDRC_HMNC_GAIN 122 0x0001 //RX_TDDRC_SMT_FLAG 123 0x0CCD //RX_TDDRC_SMT_W -124 0x0275 //RX_TDDRC_DRC_GAIN +124 0x02FD //RX_TDDRC_DRC_GAIN 38 0x0020 //RX_FDEQ_SUBNUM -39 0x4848 //RX_FDEQ_GAIN_0 -40 0x4850 //RX_FDEQ_GAIN_1 -41 0x6478 //RX_FDEQ_GAIN_2 -42 0x8689 //RX_FDEQ_GAIN_3 -43 0x908F //RX_FDEQ_GAIN_4 -44 0x9495 //RX_FDEQ_GAIN_5 -45 0x989D //RX_FDEQ_GAIN_6 -46 0x9DA6 //RX_FDEQ_GAIN_7 -47 0xA895 //RX_FDEQ_GAIN_8 -48 0x8A8A //RX_FDEQ_GAIN_9 -49 0x8E78 //RX_FDEQ_GAIN_10 -50 0x7070 //RX_FDEQ_GAIN_11 -51 0x7680 //RX_FDEQ_GAIN_12 -52 0x787C //RX_FDEQ_GAIN_13 -53 0x8890 //RX_FDEQ_GAIN_14 +39 0x4E4E //RX_FDEQ_GAIN_0 +40 0x4E56 //RX_FDEQ_GAIN_1 +41 0x6878 //RX_FDEQ_GAIN_2 +42 0x8088 //RX_FDEQ_GAIN_3 +43 0x848B //RX_FDEQ_GAIN_4 +44 0x8F8E //RX_FDEQ_GAIN_5 +45 0x9494 //RX_FDEQ_GAIN_6 +46 0x96A0 //RX_FDEQ_GAIN_7 +47 0xB8A0 //RX_FDEQ_GAIN_8 +48 0xA99D //RX_FDEQ_GAIN_9 +49 0x9D6A //RX_FDEQ_GAIN_10 +50 0x626B //RX_FDEQ_GAIN_11 +51 0x6C78 //RX_FDEQ_GAIN_12 +52 0x7884 //RX_FDEQ_GAIN_13 +53 0x9098 //RX_FDEQ_GAIN_14 54 0x9CAC //RX_FDEQ_GAIN_15 55 0x4848 //RX_FDEQ_GAIN_16 56 0x4848 //RX_FDEQ_GAIN_17 @@ -1184,23 +1250,23 @@ 121 0x199A //RX_TDDRC_HMNC_GAIN 122 0x0001 //RX_TDDRC_SMT_FLAG 123 0x0CCD //RX_TDDRC_SMT_W -124 0x0275 //RX_TDDRC_DRC_GAIN +124 0x02FD //RX_TDDRC_DRC_GAIN 38 0x0020 //RX_FDEQ_SUBNUM -39 0x4848 //RX_FDEQ_GAIN_0 -40 0x4850 //RX_FDEQ_GAIN_1 -41 0x6478 //RX_FDEQ_GAIN_2 -42 0x8689 //RX_FDEQ_GAIN_3 -43 0x908F //RX_FDEQ_GAIN_4 -44 0x9495 //RX_FDEQ_GAIN_5 -45 0x989D //RX_FDEQ_GAIN_6 -46 0x9DA6 //RX_FDEQ_GAIN_7 -47 0xA895 //RX_FDEQ_GAIN_8 -48 0x8A8A //RX_FDEQ_GAIN_9 -49 0x8E78 //RX_FDEQ_GAIN_10 -50 0x7070 //RX_FDEQ_GAIN_11 -51 0x7680 //RX_FDEQ_GAIN_12 -52 0x787C //RX_FDEQ_GAIN_13 -53 0x8890 //RX_FDEQ_GAIN_14 +39 0x4E4E //RX_FDEQ_GAIN_0 +40 0x4E56 //RX_FDEQ_GAIN_1 +41 0x6878 //RX_FDEQ_GAIN_2 +42 0x8088 //RX_FDEQ_GAIN_3 +43 0x848B //RX_FDEQ_GAIN_4 +44 0x8F8E //RX_FDEQ_GAIN_5 +45 0x9494 //RX_FDEQ_GAIN_6 +46 0x96A0 //RX_FDEQ_GAIN_7 +47 0xB8A0 //RX_FDEQ_GAIN_8 +48 0xA99D //RX_FDEQ_GAIN_9 +49 0x9D6A //RX_FDEQ_GAIN_10 +50 0x626B //RX_FDEQ_GAIN_11 +51 0x6C78 //RX_FDEQ_GAIN_12 +52 0x7884 //RX_FDEQ_GAIN_13 +53 0x9098 //RX_FDEQ_GAIN_14 54 0x9CAC //RX_FDEQ_GAIN_15 55 0x4848 //RX_FDEQ_GAIN_16 56 0x4848 //RX_FDEQ_GAIN_17 @@ -1283,23 +1349,23 @@ 121 0x199A //RX_TDDRC_HMNC_GAIN 122 0x0001 //RX_TDDRC_SMT_FLAG 123 0x0CCD //RX_TDDRC_SMT_W -124 0x0275 //RX_TDDRC_DRC_GAIN +124 0x02FD //RX_TDDRC_DRC_GAIN 38 0x0020 //RX_FDEQ_SUBNUM -39 0x4848 //RX_FDEQ_GAIN_0 -40 0x4850 //RX_FDEQ_GAIN_1 -41 0x6478 //RX_FDEQ_GAIN_2 -42 0x8689 //RX_FDEQ_GAIN_3 -43 0x908F //RX_FDEQ_GAIN_4 -44 0x9495 //RX_FDEQ_GAIN_5 -45 0x989D //RX_FDEQ_GAIN_6 -46 0x9DA6 //RX_FDEQ_GAIN_7 -47 0xA895 //RX_FDEQ_GAIN_8 -48 0x8A8A //RX_FDEQ_GAIN_9 -49 0x8E78 //RX_FDEQ_GAIN_10 -50 0x7070 //RX_FDEQ_GAIN_11 -51 0x7680 //RX_FDEQ_GAIN_12 -52 0x787C //RX_FDEQ_GAIN_13 -53 0x8890 //RX_FDEQ_GAIN_14 +39 0x4E4E //RX_FDEQ_GAIN_0 +40 0x4E56 //RX_FDEQ_GAIN_1 +41 0x6878 //RX_FDEQ_GAIN_2 +42 0x8088 //RX_FDEQ_GAIN_3 +43 0x848B //RX_FDEQ_GAIN_4 +44 0x8F8E //RX_FDEQ_GAIN_5 +45 0x9494 //RX_FDEQ_GAIN_6 +46 0x96A0 //RX_FDEQ_GAIN_7 +47 0xB8A0 //RX_FDEQ_GAIN_8 +48 0xA99D //RX_FDEQ_GAIN_9 +49 0x9D6A //RX_FDEQ_GAIN_10 +50 0x626B //RX_FDEQ_GAIN_11 +51 0x6C78 //RX_FDEQ_GAIN_12 +52 0x7884 //RX_FDEQ_GAIN_13 +53 0x9098 //RX_FDEQ_GAIN_14 54 0x9CAC //RX_FDEQ_GAIN_15 55 0x4848 //RX_FDEQ_GAIN_16 56 0x4848 //RX_FDEQ_GAIN_17 @@ -1357,7 +1423,7 @@ 108 0x5333 //RX_FDDRC_SLANT_1_2 109 0x5333 //RX_FDDRC_SLANT_1_3 110 0x0000 //RX_FDDRC_RESRV_0 -129 0x0026 //RX_SPK_VOL +129 0x0024 //RX_SPK_VOL 130 0x0000 //RX_VOL_RESRV_0 #VOL 3 6 0x1000 //RX_TDDRC_ALPHA_UP_1 @@ -1382,23 +1448,23 @@ 121 0x199A //RX_TDDRC_HMNC_GAIN 122 0x0001 //RX_TDDRC_SMT_FLAG 123 0x0CCD //RX_TDDRC_SMT_W -124 0x0275 //RX_TDDRC_DRC_GAIN +124 0x02FD //RX_TDDRC_DRC_GAIN 38 0x0020 //RX_FDEQ_SUBNUM -39 0x4848 //RX_FDEQ_GAIN_0 -40 0x4850 //RX_FDEQ_GAIN_1 -41 0x6478 //RX_FDEQ_GAIN_2 -42 0x8689 //RX_FDEQ_GAIN_3 -43 0x908F //RX_FDEQ_GAIN_4 -44 0x9495 //RX_FDEQ_GAIN_5 -45 0x989D //RX_FDEQ_GAIN_6 -46 0x9DA6 //RX_FDEQ_GAIN_7 -47 0xA895 //RX_FDEQ_GAIN_8 -48 0x8A8A //RX_FDEQ_GAIN_9 -49 0x8E78 //RX_FDEQ_GAIN_10 -50 0x7070 //RX_FDEQ_GAIN_11 -51 0x7680 //RX_FDEQ_GAIN_12 -52 0x787C //RX_FDEQ_GAIN_13 -53 0x8890 //RX_FDEQ_GAIN_14 +39 0x4E4E //RX_FDEQ_GAIN_0 +40 0x4E56 //RX_FDEQ_GAIN_1 +41 0x6878 //RX_FDEQ_GAIN_2 +42 0x8088 //RX_FDEQ_GAIN_3 +43 0x848B //RX_FDEQ_GAIN_4 +44 0x8F8E //RX_FDEQ_GAIN_5 +45 0x9494 //RX_FDEQ_GAIN_6 +46 0x96A0 //RX_FDEQ_GAIN_7 +47 0xB8A0 //RX_FDEQ_GAIN_8 +48 0xA99D //RX_FDEQ_GAIN_9 +49 0x9D6A //RX_FDEQ_GAIN_10 +50 0x626B //RX_FDEQ_GAIN_11 +51 0x6C78 //RX_FDEQ_GAIN_12 +52 0x7884 //RX_FDEQ_GAIN_13 +53 0x9098 //RX_FDEQ_GAIN_14 54 0x9CAC //RX_FDEQ_GAIN_15 55 0x4848 //RX_FDEQ_GAIN_16 56 0x4848 //RX_FDEQ_GAIN_17 @@ -1456,7 +1522,7 @@ 108 0x5333 //RX_FDDRC_SLANT_1_2 109 0x5333 //RX_FDDRC_SLANT_1_3 110 0x0000 //RX_FDDRC_RESRV_0 -129 0x003D //RX_SPK_VOL +129 0x003A //RX_SPK_VOL 130 0x0000 //RX_VOL_RESRV_0 #VOL 4 6 0x1000 //RX_TDDRC_ALPHA_UP_1 @@ -1481,23 +1547,23 @@ 121 0x199A //RX_TDDRC_HMNC_GAIN 122 0x0001 //RX_TDDRC_SMT_FLAG 123 0x0CCD //RX_TDDRC_SMT_W -124 0x0275 //RX_TDDRC_DRC_GAIN +124 0x02FD //RX_TDDRC_DRC_GAIN 38 0x0020 //RX_FDEQ_SUBNUM -39 0x4848 //RX_FDEQ_GAIN_0 -40 0x4850 //RX_FDEQ_GAIN_1 -41 0x6478 //RX_FDEQ_GAIN_2 -42 0x8689 //RX_FDEQ_GAIN_3 -43 0x908F //RX_FDEQ_GAIN_4 -44 0x9495 //RX_FDEQ_GAIN_5 -45 0x989D //RX_FDEQ_GAIN_6 -46 0x9DA6 //RX_FDEQ_GAIN_7 -47 0xA895 //RX_FDEQ_GAIN_8 -48 0x8A8A //RX_FDEQ_GAIN_9 -49 0x8E78 //RX_FDEQ_GAIN_10 -50 0x7070 //RX_FDEQ_GAIN_11 -51 0x7680 //RX_FDEQ_GAIN_12 -52 0x787C //RX_FDEQ_GAIN_13 -53 0x8890 //RX_FDEQ_GAIN_14 +39 0x4E4E //RX_FDEQ_GAIN_0 +40 0x4E56 //RX_FDEQ_GAIN_1 +41 0x6878 //RX_FDEQ_GAIN_2 +42 0x8088 //RX_FDEQ_GAIN_3 +43 0x848B //RX_FDEQ_GAIN_4 +44 0x8F8E //RX_FDEQ_GAIN_5 +45 0x9494 //RX_FDEQ_GAIN_6 +46 0x96A0 //RX_FDEQ_GAIN_7 +47 0xB8A0 //RX_FDEQ_GAIN_8 +48 0xA99D //RX_FDEQ_GAIN_9 +49 0x9D6A //RX_FDEQ_GAIN_10 +50 0x626B //RX_FDEQ_GAIN_11 +51 0x6C78 //RX_FDEQ_GAIN_12 +52 0x7884 //RX_FDEQ_GAIN_13 +53 0x9098 //RX_FDEQ_GAIN_14 54 0x9CAC //RX_FDEQ_GAIN_15 55 0x4848 //RX_FDEQ_GAIN_16 56 0x4848 //RX_FDEQ_GAIN_17 @@ -1555,7 +1621,7 @@ 108 0x5333 //RX_FDDRC_SLANT_1_2 109 0x5333 //RX_FDDRC_SLANT_1_3 110 0x0000 //RX_FDDRC_RESRV_0 -129 0x0060 //RX_SPK_VOL +129 0x0059 //RX_SPK_VOL 130 0x0000 //RX_VOL_RESRV_0 #VOL 5 6 0x1000 //RX_TDDRC_ALPHA_UP_1 @@ -1580,23 +1646,23 @@ 121 0x199A //RX_TDDRC_HMNC_GAIN 122 0x0001 //RX_TDDRC_SMT_FLAG 123 0x0CCD //RX_TDDRC_SMT_W -124 0x0275 //RX_TDDRC_DRC_GAIN +124 0x02FD //RX_TDDRC_DRC_GAIN 38 0x0020 //RX_FDEQ_SUBNUM -39 0x4848 //RX_FDEQ_GAIN_0 -40 0x4850 //RX_FDEQ_GAIN_1 -41 0x6478 //RX_FDEQ_GAIN_2 -42 0x8689 //RX_FDEQ_GAIN_3 -43 0x908F //RX_FDEQ_GAIN_4 -44 0x9495 //RX_FDEQ_GAIN_5 -45 0x989D //RX_FDEQ_GAIN_6 -46 0x9DA6 //RX_FDEQ_GAIN_7 -47 0xA895 //RX_FDEQ_GAIN_8 -48 0x8A8A //RX_FDEQ_GAIN_9 -49 0x8E78 //RX_FDEQ_GAIN_10 -50 0x7070 //RX_FDEQ_GAIN_11 -51 0x7680 //RX_FDEQ_GAIN_12 -52 0x787C //RX_FDEQ_GAIN_13 -53 0x8890 //RX_FDEQ_GAIN_14 +39 0x4E4E //RX_FDEQ_GAIN_0 +40 0x4E56 //RX_FDEQ_GAIN_1 +41 0x6878 //RX_FDEQ_GAIN_2 +42 0x8088 //RX_FDEQ_GAIN_3 +43 0x848B //RX_FDEQ_GAIN_4 +44 0x8F8E //RX_FDEQ_GAIN_5 +45 0x9494 //RX_FDEQ_GAIN_6 +46 0x96A0 //RX_FDEQ_GAIN_7 +47 0xB8A0 //RX_FDEQ_GAIN_8 +48 0xA99D //RX_FDEQ_GAIN_9 +49 0x9D6A //RX_FDEQ_GAIN_10 +50 0x626B //RX_FDEQ_GAIN_11 +51 0x6C78 //RX_FDEQ_GAIN_12 +52 0x7884 //RX_FDEQ_GAIN_13 +53 0x9098 //RX_FDEQ_GAIN_14 54 0x9CAC //RX_FDEQ_GAIN_15 55 0x4848 //RX_FDEQ_GAIN_16 56 0x4848 //RX_FDEQ_GAIN_17 @@ -1654,7 +1720,7 @@ 108 0x5333 //RX_FDDRC_SLANT_1_2 109 0x5333 //RX_FDDRC_SLANT_1_3 110 0x0000 //RX_FDDRC_RESRV_0 -129 0x0099 //RX_SPK_VOL +129 0x0090 //RX_SPK_VOL 130 0x0000 //RX_VOL_RESRV_0 #VOL 6 6 0x1000 //RX_TDDRC_ALPHA_UP_1 @@ -1679,23 +1745,23 @@ 121 0x199A //RX_TDDRC_HMNC_GAIN 122 0x0001 //RX_TDDRC_SMT_FLAG 123 0x0CCD //RX_TDDRC_SMT_W -124 0x0275 //RX_TDDRC_DRC_GAIN +124 0x02FD //RX_TDDRC_DRC_GAIN 38 0x0020 //RX_FDEQ_SUBNUM -39 0x4848 //RX_FDEQ_GAIN_0 -40 0x4850 //RX_FDEQ_GAIN_1 -41 0x6478 //RX_FDEQ_GAIN_2 -42 0x8689 //RX_FDEQ_GAIN_3 -43 0x908F //RX_FDEQ_GAIN_4 -44 0x9495 //RX_FDEQ_GAIN_5 -45 0x989D //RX_FDEQ_GAIN_6 -46 0x9DA6 //RX_FDEQ_GAIN_7 -47 0xA895 //RX_FDEQ_GAIN_8 -48 0x8A8A //RX_FDEQ_GAIN_9 -49 0x8E78 //RX_FDEQ_GAIN_10 -50 0x7070 //RX_FDEQ_GAIN_11 -51 0x7680 //RX_FDEQ_GAIN_12 -52 0x787C //RX_FDEQ_GAIN_13 -53 0x8890 //RX_FDEQ_GAIN_14 +39 0x4E4E //RX_FDEQ_GAIN_0 +40 0x4E56 //RX_FDEQ_GAIN_1 +41 0x6878 //RX_FDEQ_GAIN_2 +42 0x8088 //RX_FDEQ_GAIN_3 +43 0x848B //RX_FDEQ_GAIN_4 +44 0x8F8E //RX_FDEQ_GAIN_5 +45 0x9494 //RX_FDEQ_GAIN_6 +46 0x96A0 //RX_FDEQ_GAIN_7 +47 0xB8A0 //RX_FDEQ_GAIN_8 +48 0xA99D //RX_FDEQ_GAIN_9 +49 0x9D6A //RX_FDEQ_GAIN_10 +50 0x626B //RX_FDEQ_GAIN_11 +51 0x6C78 //RX_FDEQ_GAIN_12 +52 0x7884 //RX_FDEQ_GAIN_13 +53 0x9098 //RX_FDEQ_GAIN_14 54 0x9CAC //RX_FDEQ_GAIN_15 55 0x4848 //RX_FDEQ_GAIN_16 56 0x4848 //RX_FDEQ_GAIN_17 @@ -1755,10 +1821,862 @@ 110 0x0000 //RX_FDDRC_RESRV_0 129 0x0100 //RX_SPK_VOL 130 0x0000 //RX_VOL_RESRV_0 +#RX 2 +157 0x003C //RX_RECVFUNC_MODE_0 +158 0x0000 //RX_RECVFUNC_MODE_1 +159 0x0004 //RX_SAMPLINGFREQ_SIG +160 0x0004 //RX_SAMPLINGFREQ_PROC +161 0x000A //RX_FRAME_SZ +162 0x0000 //RX_DELAY_OPT +163 0x1000 //RX_TDDRC_ALPHA_UP_1 +164 0x1000 //RX_TDDRC_ALPHA_UP_2 +165 0x1000 //RX_TDDRC_ALPHA_UP_3 +166 0x1000 //RX_TDDRC_ALPHA_UP_4 +167 0x0722 //RX_PGA +168 0x7FFF //RX_A_HP +169 0x4000 //RX_B_PE +170 0x5800 //RX_THR_PITCH_DET_0 +171 0x5000 //RX_THR_PITCH_DET_1 +172 0x4000 //RX_THR_PITCH_DET_2 +173 0x0008 //RX_PITCH_BFR_LEN +174 0x0003 //RX_SBD_PITCH_DET +175 0x0100 //RX_PP_RESRV_0 +176 0x0020 //RX_PP_RESRV_1 +177 0x0600 //RX_N_SN_EST +178 0x000C //RX_N2_SN_EST +179 0x000F //RX_NS_LVL_CTRL +180 0xF800 //RX_THR_SN_EST +181 0x7E00 //RX_LAMBDA_PFILT +182 0x000A //RX_FENS_RESRV_0 +183 0x0190 //RX_FENS_RESRV_1 +184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +187 0x0002 //RX_EXTRA_NS_L +188 0x0800 //RX_EXTRA_NS_A +189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +190 0x7000 //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +192 0x199A //RX_A_POST_FLT +193 0x0000 //RX_LMT_THRD +194 0x4000 //RX_LMT_ALPHA +195 0x0020 //RX_FDEQ_SUBNUM +196 0x4E4E //RX_FDEQ_GAIN_0 +197 0x4E56 //RX_FDEQ_GAIN_1 +198 0x6878 //RX_FDEQ_GAIN_2 +199 0x8088 //RX_FDEQ_GAIN_3 +200 0x848B //RX_FDEQ_GAIN_4 +201 0x8F8E //RX_FDEQ_GAIN_5 +202 0x9494 //RX_FDEQ_GAIN_6 +203 0x96A0 //RX_FDEQ_GAIN_7 +204 0xB8A0 //RX_FDEQ_GAIN_8 +205 0xA99D //RX_FDEQ_GAIN_9 +206 0x9D6A //RX_FDEQ_GAIN_10 +207 0x626B //RX_FDEQ_GAIN_11 +208 0x6C78 //RX_FDEQ_GAIN_12 +209 0x7884 //RX_FDEQ_GAIN_13 +210 0x9098 //RX_FDEQ_GAIN_14 +211 0x9CAC //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0202 //RX_FDEQ_BIN_0 +221 0x0202 //RX_FDEQ_BIN_1 +222 0x0302 //RX_FDEQ_BIN_2 +223 0x0304 //RX_FDEQ_BIN_3 +224 0x0405 //RX_FDEQ_BIN_4 +225 0x0506 //RX_FDEQ_BIN_5 +226 0x0708 //RX_FDEQ_BIN_6 +227 0x090A //RX_FDEQ_BIN_7 +228 0x0B0C //RX_FDEQ_BIN_8 +229 0x0D0E //RX_FDEQ_BIN_9 +230 0x1013 //RX_FDEQ_BIN_10 +231 0x1719 //RX_FDEQ_BIN_11 +232 0x1B1E //RX_FDEQ_BIN_12 +233 0x1E1E //RX_FDEQ_BIN_13 +234 0x1E28 //RX_FDEQ_BIN_14 +235 0x282C //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x4000 //RX_FDEQ_RESRV_0 +245 0x0320 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0030 //RX_FDDRC_BAND_MARGIN_1 +248 0x0050 //RX_FDDRC_BAND_MARGIN_2 +249 0x0080 //RX_FDDRC_BAND_MARGIN_3 +250 0x0007 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x5000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x6400 //RX_FDDRC_THRD_3_2 +258 0x6400 //RX_FDDRC_THRD_3_3 +259 0x2000 //RX_FDDRC_SLANT_0_0 +260 0x2000 //RX_FDDRC_SLANT_0_1 +261 0x2000 //RX_FDDRC_SLANT_0_2 +262 0x2000 //RX_FDDRC_SLANT_0_3 +263 0x5333 //RX_FDDRC_SLANT_1_0 +264 0x5333 //RX_FDDRC_SLANT_1_1 +265 0x5333 //RX_FDDRC_SLANT_1_2 +266 0x5333 //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +268 0x0002 //RX_FILTINDX +269 0x0000 //RX_TDDRC_THRD_0 +270 0x0000 //RX_TDDRC_THRD_1 +271 0x1800 //RX_TDDRC_THRD_2 +272 0x1800 //RX_TDDRC_THRD_3 +273 0x3000 //RX_TDDRC_SLANT_0 +274 0x6E00 //RX_TDDRC_SLANT_1 +275 0x1000 //RX_TDDRC_ALPHA_UP_0 +276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x199A //RX_TDDRC_HMNC_GAIN +279 0x0001 //RX_TDDRC_SMT_FLAG +280 0x0CCD //RX_TDDRC_SMT_W +281 0x02FD //RX_TDDRC_DRC_GAIN +282 0x7C00 //RX_LAMBDA_PKA_FP +283 0x2000 //RX_TPKA_FP +284 0x2000 //RX_MIN_G_FP +285 0x0080 //RX_MAX_G_FP +286 0x000D //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 +288 0x0000 //RX_MAXLEVEL_CNG +289 0x3000 //RX_BWE_UV_TH +290 0x3000 //RX_BWE_UV_TH2 +291 0x1800 //RX_BWE_UV_TH3 +292 0x1000 //RX_BWE_V_TH +293 0x04CD //RX_BWE_GAIN1_V_TH1 +294 0x0F33 //RX_BWE_GAIN1_V_TH2 +295 0x7333 //RX_BWE_UV_EQ +296 0x199A //RX_BWE_V_EQ +297 0x7333 //RX_BWE_TONE_TH +298 0x0004 //RX_BWE_UV_HOLD_T +299 0x6CCD //RX_BWE_GAIN2_ALPHA +300 0x799A //RX_BWE_GAIN3_ALPHA +301 0x001E //RX_BWE_CUTOFF +302 0x3000 //RX_BWE_GAINFILL +303 0x3200 //RX_BWE_MAXTH_TONE +304 0x2000 //RX_BWE_EQ_0 +305 0x2000 //RX_BWE_EQ_1 +306 0x2000 //RX_BWE_EQ_2 +307 0x2000 //RX_BWE_EQ_3 +308 0x2000 //RX_BWE_EQ_4 +309 0x2000 //RX_BWE_EQ_5 +310 0x2000 //RX_BWE_EQ_6 +311 0x0000 //RX_BWE_RESRV_0 +312 0x0000 //RX_BWE_RESRV_1 +313 0x0000 //RX_BWE_RESRV_2 +#VOL 0 +163 0x1000 //RX_TDDRC_ALPHA_UP_1 +164 0x1000 //RX_TDDRC_ALPHA_UP_2 +165 0x1000 //RX_TDDRC_ALPHA_UP_3 +166 0x1000 //RX_TDDRC_ALPHA_UP_4 +184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +190 0x7000 //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +269 0x0000 //RX_TDDRC_THRD_0 +270 0x0000 //RX_TDDRC_THRD_1 +271 0x1800 //RX_TDDRC_THRD_2 +272 0x1800 //RX_TDDRC_THRD_3 +273 0x3000 //RX_TDDRC_SLANT_0 +274 0x6E00 //RX_TDDRC_SLANT_1 +275 0x1000 //RX_TDDRC_ALPHA_UP_0 +276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x199A //RX_TDDRC_HMNC_GAIN +279 0x0001 //RX_TDDRC_SMT_FLAG +280 0x0CCD //RX_TDDRC_SMT_W +281 0x02FD //RX_TDDRC_DRC_GAIN +195 0x0020 //RX_FDEQ_SUBNUM +196 0x4E4E //RX_FDEQ_GAIN_0 +197 0x4E56 //RX_FDEQ_GAIN_1 +198 0x6878 //RX_FDEQ_GAIN_2 +199 0x8088 //RX_FDEQ_GAIN_3 +200 0x848B //RX_FDEQ_GAIN_4 +201 0x8F8E //RX_FDEQ_GAIN_5 +202 0x9494 //RX_FDEQ_GAIN_6 +203 0x96A0 //RX_FDEQ_GAIN_7 +204 0xB8A0 //RX_FDEQ_GAIN_8 +205 0xA99D //RX_FDEQ_GAIN_9 +206 0x9D6A //RX_FDEQ_GAIN_10 +207 0x626B //RX_FDEQ_GAIN_11 +208 0x6C78 //RX_FDEQ_GAIN_12 +209 0x7884 //RX_FDEQ_GAIN_13 +210 0x9098 //RX_FDEQ_GAIN_14 +211 0x9CAC //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0202 //RX_FDEQ_BIN_0 +221 0x0202 //RX_FDEQ_BIN_1 +222 0x0302 //RX_FDEQ_BIN_2 +223 0x0304 //RX_FDEQ_BIN_3 +224 0x0405 //RX_FDEQ_BIN_4 +225 0x0506 //RX_FDEQ_BIN_5 +226 0x0708 //RX_FDEQ_BIN_6 +227 0x090A //RX_FDEQ_BIN_7 +228 0x0B0C //RX_FDEQ_BIN_8 +229 0x0D0E //RX_FDEQ_BIN_9 +230 0x1013 //RX_FDEQ_BIN_10 +231 0x1719 //RX_FDEQ_BIN_11 +232 0x1B1E //RX_FDEQ_BIN_12 +233 0x1E1E //RX_FDEQ_BIN_13 +234 0x1E28 //RX_FDEQ_BIN_14 +235 0x282C //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x4000 //RX_FDEQ_RESRV_0 +245 0x0320 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0030 //RX_FDDRC_BAND_MARGIN_1 +248 0x0050 //RX_FDDRC_BAND_MARGIN_2 +249 0x0080 //RX_FDDRC_BAND_MARGIN_3 +250 0x0007 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x5000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x6400 //RX_FDDRC_THRD_3_2 +258 0x6400 //RX_FDDRC_THRD_3_3 +259 0x2000 //RX_FDDRC_SLANT_0_0 +260 0x2000 //RX_FDDRC_SLANT_0_1 +261 0x2000 //RX_FDDRC_SLANT_0_2 +262 0x2000 //RX_FDDRC_SLANT_0_3 +263 0x5333 //RX_FDDRC_SLANT_1_0 +264 0x5333 //RX_FDDRC_SLANT_1_1 +265 0x5333 //RX_FDDRC_SLANT_1_2 +266 0x5333 //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +286 0x000D //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 +#VOL 1 +163 0x1000 //RX_TDDRC_ALPHA_UP_1 +164 0x1000 //RX_TDDRC_ALPHA_UP_2 +165 0x1000 //RX_TDDRC_ALPHA_UP_3 +166 0x1000 //RX_TDDRC_ALPHA_UP_4 +184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +190 0x7000 //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +269 0x0000 //RX_TDDRC_THRD_0 +270 0x0000 //RX_TDDRC_THRD_1 +271 0x1800 //RX_TDDRC_THRD_2 +272 0x1800 //RX_TDDRC_THRD_3 +273 0x3000 //RX_TDDRC_SLANT_0 +274 0x6E00 //RX_TDDRC_SLANT_1 +275 0x1000 //RX_TDDRC_ALPHA_UP_0 +276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x199A //RX_TDDRC_HMNC_GAIN +279 0x0001 //RX_TDDRC_SMT_FLAG +280 0x0CCD //RX_TDDRC_SMT_W +281 0x02FD //RX_TDDRC_DRC_GAIN +195 0x0020 //RX_FDEQ_SUBNUM +196 0x4E4E //RX_FDEQ_GAIN_0 +197 0x4E56 //RX_FDEQ_GAIN_1 +198 0x6878 //RX_FDEQ_GAIN_2 +199 0x8088 //RX_FDEQ_GAIN_3 +200 0x848B //RX_FDEQ_GAIN_4 +201 0x8F8E //RX_FDEQ_GAIN_5 +202 0x9494 //RX_FDEQ_GAIN_6 +203 0x96A0 //RX_FDEQ_GAIN_7 +204 0xB8A0 //RX_FDEQ_GAIN_8 +205 0xA99D //RX_FDEQ_GAIN_9 +206 0x9D6A //RX_FDEQ_GAIN_10 +207 0x626B //RX_FDEQ_GAIN_11 +208 0x6C78 //RX_FDEQ_GAIN_12 +209 0x7884 //RX_FDEQ_GAIN_13 +210 0x9098 //RX_FDEQ_GAIN_14 +211 0x9CAC //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0202 //RX_FDEQ_BIN_0 +221 0x0202 //RX_FDEQ_BIN_1 +222 0x0302 //RX_FDEQ_BIN_2 +223 0x0304 //RX_FDEQ_BIN_3 +224 0x0405 //RX_FDEQ_BIN_4 +225 0x0506 //RX_FDEQ_BIN_5 +226 0x0708 //RX_FDEQ_BIN_6 +227 0x090A //RX_FDEQ_BIN_7 +228 0x0B0C //RX_FDEQ_BIN_8 +229 0x0D0E //RX_FDEQ_BIN_9 +230 0x1013 //RX_FDEQ_BIN_10 +231 0x1719 //RX_FDEQ_BIN_11 +232 0x1B1E //RX_FDEQ_BIN_12 +233 0x1E1E //RX_FDEQ_BIN_13 +234 0x1E28 //RX_FDEQ_BIN_14 +235 0x282C //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x4000 //RX_FDEQ_RESRV_0 +245 0x0320 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0030 //RX_FDDRC_BAND_MARGIN_1 +248 0x0050 //RX_FDDRC_BAND_MARGIN_2 +249 0x0080 //RX_FDDRC_BAND_MARGIN_3 +250 0x0007 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x5000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x6400 //RX_FDDRC_THRD_3_2 +258 0x6400 //RX_FDDRC_THRD_3_3 +259 0x2000 //RX_FDDRC_SLANT_0_0 +260 0x2000 //RX_FDDRC_SLANT_0_1 +261 0x2000 //RX_FDDRC_SLANT_0_2 +262 0x2000 //RX_FDDRC_SLANT_0_3 +263 0x5333 //RX_FDDRC_SLANT_1_0 +264 0x5333 //RX_FDDRC_SLANT_1_1 +265 0x5333 //RX_FDDRC_SLANT_1_2 +266 0x5333 //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +286 0x0016 //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 +#VOL 2 +163 0x1000 //RX_TDDRC_ALPHA_UP_1 +164 0x1000 //RX_TDDRC_ALPHA_UP_2 +165 0x1000 //RX_TDDRC_ALPHA_UP_3 +166 0x1000 //RX_TDDRC_ALPHA_UP_4 +184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +190 0x7000 //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +269 0x0000 //RX_TDDRC_THRD_0 +270 0x0000 //RX_TDDRC_THRD_1 +271 0x1800 //RX_TDDRC_THRD_2 +272 0x1800 //RX_TDDRC_THRD_3 +273 0x3000 //RX_TDDRC_SLANT_0 +274 0x6E00 //RX_TDDRC_SLANT_1 +275 0x1000 //RX_TDDRC_ALPHA_UP_0 +276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x199A //RX_TDDRC_HMNC_GAIN +279 0x0001 //RX_TDDRC_SMT_FLAG +280 0x0CCD //RX_TDDRC_SMT_W +281 0x02FD //RX_TDDRC_DRC_GAIN +195 0x0020 //RX_FDEQ_SUBNUM +196 0x4E4E //RX_FDEQ_GAIN_0 +197 0x4E56 //RX_FDEQ_GAIN_1 +198 0x6878 //RX_FDEQ_GAIN_2 +199 0x8088 //RX_FDEQ_GAIN_3 +200 0x848B //RX_FDEQ_GAIN_4 +201 0x8F8E //RX_FDEQ_GAIN_5 +202 0x9494 //RX_FDEQ_GAIN_6 +203 0x96A0 //RX_FDEQ_GAIN_7 +204 0xB8A0 //RX_FDEQ_GAIN_8 +205 0xA99D //RX_FDEQ_GAIN_9 +206 0x9D6A //RX_FDEQ_GAIN_10 +207 0x626B //RX_FDEQ_GAIN_11 +208 0x6C78 //RX_FDEQ_GAIN_12 +209 0x7884 //RX_FDEQ_GAIN_13 +210 0x9098 //RX_FDEQ_GAIN_14 +211 0x9CAC //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0202 //RX_FDEQ_BIN_0 +221 0x0202 //RX_FDEQ_BIN_1 +222 0x0302 //RX_FDEQ_BIN_2 +223 0x0304 //RX_FDEQ_BIN_3 +224 0x0405 //RX_FDEQ_BIN_4 +225 0x0506 //RX_FDEQ_BIN_5 +226 0x0708 //RX_FDEQ_BIN_6 +227 0x090A //RX_FDEQ_BIN_7 +228 0x0B0C //RX_FDEQ_BIN_8 +229 0x0D0E //RX_FDEQ_BIN_9 +230 0x1013 //RX_FDEQ_BIN_10 +231 0x1719 //RX_FDEQ_BIN_11 +232 0x1B1E //RX_FDEQ_BIN_12 +233 0x1E1E //RX_FDEQ_BIN_13 +234 0x1E28 //RX_FDEQ_BIN_14 +235 0x282C //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x4000 //RX_FDEQ_RESRV_0 +245 0x0320 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0030 //RX_FDDRC_BAND_MARGIN_1 +248 0x0050 //RX_FDDRC_BAND_MARGIN_2 +249 0x0080 //RX_FDDRC_BAND_MARGIN_3 +250 0x0007 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x5000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x6400 //RX_FDDRC_THRD_3_2 +258 0x6400 //RX_FDDRC_THRD_3_3 +259 0x2000 //RX_FDDRC_SLANT_0_0 +260 0x2000 //RX_FDDRC_SLANT_0_1 +261 0x2000 //RX_FDDRC_SLANT_0_2 +262 0x2000 //RX_FDDRC_SLANT_0_3 +263 0x5333 //RX_FDDRC_SLANT_1_0 +264 0x5333 //RX_FDDRC_SLANT_1_1 +265 0x5333 //RX_FDDRC_SLANT_1_2 +266 0x5333 //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +286 0x0024 //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 +#VOL 3 +163 0x1000 //RX_TDDRC_ALPHA_UP_1 +164 0x1000 //RX_TDDRC_ALPHA_UP_2 +165 0x1000 //RX_TDDRC_ALPHA_UP_3 +166 0x1000 //RX_TDDRC_ALPHA_UP_4 +184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +190 0x7000 //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +269 0x0000 //RX_TDDRC_THRD_0 +270 0x0000 //RX_TDDRC_THRD_1 +271 0x1800 //RX_TDDRC_THRD_2 +272 0x1800 //RX_TDDRC_THRD_3 +273 0x3000 //RX_TDDRC_SLANT_0 +274 0x6E00 //RX_TDDRC_SLANT_1 +275 0x1000 //RX_TDDRC_ALPHA_UP_0 +276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x199A //RX_TDDRC_HMNC_GAIN +279 0x0001 //RX_TDDRC_SMT_FLAG +280 0x0CCD //RX_TDDRC_SMT_W +281 0x02FD //RX_TDDRC_DRC_GAIN +195 0x0020 //RX_FDEQ_SUBNUM +196 0x4E4E //RX_FDEQ_GAIN_0 +197 0x4E56 //RX_FDEQ_GAIN_1 +198 0x6878 //RX_FDEQ_GAIN_2 +199 0x8088 //RX_FDEQ_GAIN_3 +200 0x848B //RX_FDEQ_GAIN_4 +201 0x8F8E //RX_FDEQ_GAIN_5 +202 0x9494 //RX_FDEQ_GAIN_6 +203 0x96A0 //RX_FDEQ_GAIN_7 +204 0xB8A0 //RX_FDEQ_GAIN_8 +205 0xA99D //RX_FDEQ_GAIN_9 +206 0x9D6A //RX_FDEQ_GAIN_10 +207 0x626B //RX_FDEQ_GAIN_11 +208 0x6C78 //RX_FDEQ_GAIN_12 +209 0x7884 //RX_FDEQ_GAIN_13 +210 0x9098 //RX_FDEQ_GAIN_14 +211 0x9CAC //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0202 //RX_FDEQ_BIN_0 +221 0x0202 //RX_FDEQ_BIN_1 +222 0x0302 //RX_FDEQ_BIN_2 +223 0x0304 //RX_FDEQ_BIN_3 +224 0x0405 //RX_FDEQ_BIN_4 +225 0x0506 //RX_FDEQ_BIN_5 +226 0x0708 //RX_FDEQ_BIN_6 +227 0x090A //RX_FDEQ_BIN_7 +228 0x0B0C //RX_FDEQ_BIN_8 +229 0x0D0E //RX_FDEQ_BIN_9 +230 0x1013 //RX_FDEQ_BIN_10 +231 0x1719 //RX_FDEQ_BIN_11 +232 0x1B1E //RX_FDEQ_BIN_12 +233 0x1E1E //RX_FDEQ_BIN_13 +234 0x1E28 //RX_FDEQ_BIN_14 +235 0x282C //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x4000 //RX_FDEQ_RESRV_0 +245 0x0320 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0030 //RX_FDDRC_BAND_MARGIN_1 +248 0x0050 //RX_FDDRC_BAND_MARGIN_2 +249 0x0080 //RX_FDDRC_BAND_MARGIN_3 +250 0x0007 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x5000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x6400 //RX_FDDRC_THRD_3_2 +258 0x6400 //RX_FDDRC_THRD_3_3 +259 0x2000 //RX_FDDRC_SLANT_0_0 +260 0x2000 //RX_FDDRC_SLANT_0_1 +261 0x2000 //RX_FDDRC_SLANT_0_2 +262 0x2000 //RX_FDDRC_SLANT_0_3 +263 0x5333 //RX_FDDRC_SLANT_1_0 +264 0x5333 //RX_FDDRC_SLANT_1_1 +265 0x5333 //RX_FDDRC_SLANT_1_2 +266 0x5333 //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +286 0x003A //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 +#VOL 4 +163 0x1000 //RX_TDDRC_ALPHA_UP_1 +164 0x1000 //RX_TDDRC_ALPHA_UP_2 +165 0x1000 //RX_TDDRC_ALPHA_UP_3 +166 0x1000 //RX_TDDRC_ALPHA_UP_4 +184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +190 0x7000 //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +269 0x0000 //RX_TDDRC_THRD_0 +270 0x0000 //RX_TDDRC_THRD_1 +271 0x1800 //RX_TDDRC_THRD_2 +272 0x1800 //RX_TDDRC_THRD_3 +273 0x3000 //RX_TDDRC_SLANT_0 +274 0x6E00 //RX_TDDRC_SLANT_1 +275 0x1000 //RX_TDDRC_ALPHA_UP_0 +276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x199A //RX_TDDRC_HMNC_GAIN +279 0x0001 //RX_TDDRC_SMT_FLAG +280 0x0CCD //RX_TDDRC_SMT_W +281 0x02FD //RX_TDDRC_DRC_GAIN +195 0x0020 //RX_FDEQ_SUBNUM +196 0x4E4E //RX_FDEQ_GAIN_0 +197 0x4E56 //RX_FDEQ_GAIN_1 +198 0x6878 //RX_FDEQ_GAIN_2 +199 0x8088 //RX_FDEQ_GAIN_3 +200 0x848B //RX_FDEQ_GAIN_4 +201 0x8F8E //RX_FDEQ_GAIN_5 +202 0x9494 //RX_FDEQ_GAIN_6 +203 0x96A0 //RX_FDEQ_GAIN_7 +204 0xB8A0 //RX_FDEQ_GAIN_8 +205 0xA99D //RX_FDEQ_GAIN_9 +206 0x9D6A //RX_FDEQ_GAIN_10 +207 0x626B //RX_FDEQ_GAIN_11 +208 0x6C78 //RX_FDEQ_GAIN_12 +209 0x7884 //RX_FDEQ_GAIN_13 +210 0x9098 //RX_FDEQ_GAIN_14 +211 0x9CAC //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0202 //RX_FDEQ_BIN_0 +221 0x0202 //RX_FDEQ_BIN_1 +222 0x0302 //RX_FDEQ_BIN_2 +223 0x0304 //RX_FDEQ_BIN_3 +224 0x0405 //RX_FDEQ_BIN_4 +225 0x0506 //RX_FDEQ_BIN_5 +226 0x0708 //RX_FDEQ_BIN_6 +227 0x090A //RX_FDEQ_BIN_7 +228 0x0B0C //RX_FDEQ_BIN_8 +229 0x0D0E //RX_FDEQ_BIN_9 +230 0x1013 //RX_FDEQ_BIN_10 +231 0x1719 //RX_FDEQ_BIN_11 +232 0x1B1E //RX_FDEQ_BIN_12 +233 0x1E1E //RX_FDEQ_BIN_13 +234 0x1E28 //RX_FDEQ_BIN_14 +235 0x282C //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x4000 //RX_FDEQ_RESRV_0 +245 0x0320 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0030 //RX_FDDRC_BAND_MARGIN_1 +248 0x0050 //RX_FDDRC_BAND_MARGIN_2 +249 0x0080 //RX_FDDRC_BAND_MARGIN_3 +250 0x0007 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x5000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x6400 //RX_FDDRC_THRD_3_2 +258 0x6400 //RX_FDDRC_THRD_3_3 +259 0x2000 //RX_FDDRC_SLANT_0_0 +260 0x2000 //RX_FDDRC_SLANT_0_1 +261 0x2000 //RX_FDDRC_SLANT_0_2 +262 0x2000 //RX_FDDRC_SLANT_0_3 +263 0x5333 //RX_FDDRC_SLANT_1_0 +264 0x5333 //RX_FDDRC_SLANT_1_1 +265 0x5333 //RX_FDDRC_SLANT_1_2 +266 0x5333 //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +286 0x0059 //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 +#VOL 5 +163 0x1000 //RX_TDDRC_ALPHA_UP_1 +164 0x1000 //RX_TDDRC_ALPHA_UP_2 +165 0x1000 //RX_TDDRC_ALPHA_UP_3 +166 0x1000 //RX_TDDRC_ALPHA_UP_4 +184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +190 0x7000 //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +269 0x0000 //RX_TDDRC_THRD_0 +270 0x0000 //RX_TDDRC_THRD_1 +271 0x1800 //RX_TDDRC_THRD_2 +272 0x1800 //RX_TDDRC_THRD_3 +273 0x3000 //RX_TDDRC_SLANT_0 +274 0x6E00 //RX_TDDRC_SLANT_1 +275 0x1000 //RX_TDDRC_ALPHA_UP_0 +276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x199A //RX_TDDRC_HMNC_GAIN +279 0x0001 //RX_TDDRC_SMT_FLAG +280 0x0CCD //RX_TDDRC_SMT_W +281 0x02FD //RX_TDDRC_DRC_GAIN +195 0x0020 //RX_FDEQ_SUBNUM +196 0x4E4E //RX_FDEQ_GAIN_0 +197 0x4E56 //RX_FDEQ_GAIN_1 +198 0x6878 //RX_FDEQ_GAIN_2 +199 0x8088 //RX_FDEQ_GAIN_3 +200 0x848B //RX_FDEQ_GAIN_4 +201 0x8F8E //RX_FDEQ_GAIN_5 +202 0x9494 //RX_FDEQ_GAIN_6 +203 0x96A0 //RX_FDEQ_GAIN_7 +204 0xB8A0 //RX_FDEQ_GAIN_8 +205 0xA99D //RX_FDEQ_GAIN_9 +206 0x9D6A //RX_FDEQ_GAIN_10 +207 0x626B //RX_FDEQ_GAIN_11 +208 0x6C78 //RX_FDEQ_GAIN_12 +209 0x7884 //RX_FDEQ_GAIN_13 +210 0x9098 //RX_FDEQ_GAIN_14 +211 0x9CAC //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0202 //RX_FDEQ_BIN_0 +221 0x0202 //RX_FDEQ_BIN_1 +222 0x0302 //RX_FDEQ_BIN_2 +223 0x0304 //RX_FDEQ_BIN_3 +224 0x0405 //RX_FDEQ_BIN_4 +225 0x0506 //RX_FDEQ_BIN_5 +226 0x0708 //RX_FDEQ_BIN_6 +227 0x090A //RX_FDEQ_BIN_7 +228 0x0B0C //RX_FDEQ_BIN_8 +229 0x0D0E //RX_FDEQ_BIN_9 +230 0x1013 //RX_FDEQ_BIN_10 +231 0x1719 //RX_FDEQ_BIN_11 +232 0x1B1E //RX_FDEQ_BIN_12 +233 0x1E1E //RX_FDEQ_BIN_13 +234 0x1E28 //RX_FDEQ_BIN_14 +235 0x282C //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x4000 //RX_FDEQ_RESRV_0 +245 0x0320 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0030 //RX_FDDRC_BAND_MARGIN_1 +248 0x0050 //RX_FDDRC_BAND_MARGIN_2 +249 0x0080 //RX_FDDRC_BAND_MARGIN_3 +250 0x0007 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x5000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x6400 //RX_FDDRC_THRD_3_2 +258 0x6400 //RX_FDDRC_THRD_3_3 +259 0x2000 //RX_FDDRC_SLANT_0_0 +260 0x2000 //RX_FDDRC_SLANT_0_1 +261 0x2000 //RX_FDDRC_SLANT_0_2 +262 0x2000 //RX_FDDRC_SLANT_0_3 +263 0x5333 //RX_FDDRC_SLANT_1_0 +264 0x5333 //RX_FDDRC_SLANT_1_1 +265 0x5333 //RX_FDDRC_SLANT_1_2 +266 0x5333 //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +286 0x0090 //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 +#VOL 6 +163 0x1000 //RX_TDDRC_ALPHA_UP_1 +164 0x1000 //RX_TDDRC_ALPHA_UP_2 +165 0x1000 //RX_TDDRC_ALPHA_UP_3 +166 0x1000 //RX_TDDRC_ALPHA_UP_4 +184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +190 0x7000 //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +269 0x0000 //RX_TDDRC_THRD_0 +270 0x0000 //RX_TDDRC_THRD_1 +271 0x1800 //RX_TDDRC_THRD_2 +272 0x1800 //RX_TDDRC_THRD_3 +273 0x3000 //RX_TDDRC_SLANT_0 +274 0x6E00 //RX_TDDRC_SLANT_1 +275 0x1000 //RX_TDDRC_ALPHA_UP_0 +276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x199A //RX_TDDRC_HMNC_GAIN +279 0x0001 //RX_TDDRC_SMT_FLAG +280 0x0CCD //RX_TDDRC_SMT_W +281 0x02FD //RX_TDDRC_DRC_GAIN +195 0x0020 //RX_FDEQ_SUBNUM +196 0x4E4E //RX_FDEQ_GAIN_0 +197 0x4E56 //RX_FDEQ_GAIN_1 +198 0x6878 //RX_FDEQ_GAIN_2 +199 0x8088 //RX_FDEQ_GAIN_3 +200 0x848B //RX_FDEQ_GAIN_4 +201 0x8F8E //RX_FDEQ_GAIN_5 +202 0x9494 //RX_FDEQ_GAIN_6 +203 0x96A0 //RX_FDEQ_GAIN_7 +204 0xB8A0 //RX_FDEQ_GAIN_8 +205 0xA99D //RX_FDEQ_GAIN_9 +206 0x9D6A //RX_FDEQ_GAIN_10 +207 0x626B //RX_FDEQ_GAIN_11 +208 0x6C78 //RX_FDEQ_GAIN_12 +209 0x7884 //RX_FDEQ_GAIN_13 +210 0x9098 //RX_FDEQ_GAIN_14 +211 0x9CAC //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0202 //RX_FDEQ_BIN_0 +221 0x0202 //RX_FDEQ_BIN_1 +222 0x0302 //RX_FDEQ_BIN_2 +223 0x0304 //RX_FDEQ_BIN_3 +224 0x0405 //RX_FDEQ_BIN_4 +225 0x0506 //RX_FDEQ_BIN_5 +226 0x0708 //RX_FDEQ_BIN_6 +227 0x090A //RX_FDEQ_BIN_7 +228 0x0B0C //RX_FDEQ_BIN_8 +229 0x0D0E //RX_FDEQ_BIN_9 +230 0x1013 //RX_FDEQ_BIN_10 +231 0x1719 //RX_FDEQ_BIN_11 +232 0x1B1E //RX_FDEQ_BIN_12 +233 0x1E1E //RX_FDEQ_BIN_13 +234 0x1E28 //RX_FDEQ_BIN_14 +235 0x282C //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x4000 //RX_FDEQ_RESRV_0 +245 0x0320 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0030 //RX_FDDRC_BAND_MARGIN_1 +248 0x0050 //RX_FDDRC_BAND_MARGIN_2 +249 0x0080 //RX_FDDRC_BAND_MARGIN_3 +250 0x0007 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x5000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x6400 //RX_FDDRC_THRD_3_2 +258 0x6400 //RX_FDDRC_THRD_3_3 +259 0x2000 //RX_FDDRC_SLANT_0_0 +260 0x2000 //RX_FDDRC_SLANT_0_1 +261 0x2000 //RX_FDDRC_SLANT_0_2 +262 0x2000 //RX_FDDRC_SLANT_0_3 +263 0x5333 //RX_FDDRC_SLANT_1_0 +264 0x5333 //RX_FDDRC_SLANT_1_1 +265 0x5333 //RX_FDDRC_SLANT_1_2 +266 0x5333 //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +286 0x0100 //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 #CASE_NAME HANDSET-HANDSET-CUSTOM2-FB -#PARAM_TYPE TX+RX -#TOTAL_CUSTOM_STEP 7 +#PARAM_MODE FULL +#PARAM_TYPE TX+2RX +#TOTAL_CUSTOM_STEP 7+7 #TX 0 0x0000 //TX_OPERATION_MODE_0 1 0x0000 //TX_OPERATION_MODE_1 @@ -1781,7 +2699,7 @@ 18 0x0000 //TX_SYS_RESRV_2 19 0x0000 //TX_SYS_RESRV_3 20 0x0000 //TX_DIST2REF0 -21 0x009D //TX_DIST2REF1 +21 0x00A4 //TX_DIST2REF1 22 0x0000 //TX_DIST2REF_02 23 0x0000 //TX_DIST2REF_03 24 0x0000 //TX_DIST2REF_04 @@ -2011,12 +2929,12 @@ 248 0xF800 //TX_THR_SN_EST_6 249 0xF700 //TX_THR_SN_EST_7 250 0x0000 //TX_DELTA_THR_SN_EST_0 -251 0x0100 //TX_DELTA_THR_SN_EST_1 +251 0x0200 //TX_DELTA_THR_SN_EST_1 252 0x0200 //TX_DELTA_THR_SN_EST_2 253 0x0200 //TX_DELTA_THR_SN_EST_3 -254 0x0200 //TX_DELTA_THR_SN_EST_4 -255 0x0100 //TX_DELTA_THR_SN_EST_5 -256 0x0200 //TX_DELTA_THR_SN_EST_6 +254 0x0100 //TX_DELTA_THR_SN_EST_4 +255 0x0200 //TX_DELTA_THR_SN_EST_5 +256 0x0100 //TX_DELTA_THR_SN_EST_6 257 0x0200 //TX_DELTA_THR_SN_EST_7 258 0x4000 //TX_LAMBDA_NN_EST_0 259 0x4000 //TX_LAMBDA_NN_EST_1 @@ -2044,16 +2962,16 @@ 281 0x0014 //TX_NS_LVL_CTRL_0 282 0x0016 //TX_NS_LVL_CTRL_1 283 0x0016 //TX_NS_LVL_CTRL_2 -284 0x0016 //TX_NS_LVL_CTRL_3 -285 0x0018 //TX_NS_LVL_CTRL_4 -286 0x0016 //TX_NS_LVL_CTRL_5 -287 0x0012 //TX_NS_LVL_CTRL_6 +284 0x0018 //TX_NS_LVL_CTRL_3 +285 0x0016 //TX_NS_LVL_CTRL_4 +286 0x0012 //TX_NS_LVL_CTRL_5 +287 0x0016 //TX_NS_LVL_CTRL_6 288 0x0017 //TX_NS_LVL_CTRL_7 289 0x000E //TX_MIN_GAIN_S_0 -290 0x0012 //TX_MIN_GAIN_S_1 -291 0x0007 //TX_MIN_GAIN_S_2 -292 0x0012 //TX_MIN_GAIN_S_3 -293 0x0010 //TX_MIN_GAIN_S_4 +290 0x0007 //TX_MIN_GAIN_S_1 +291 0x0012 //TX_MIN_GAIN_S_2 +292 0x0010 //TX_MIN_GAIN_S_3 +293 0x0012 //TX_MIN_GAIN_S_4 294 0x0012 //TX_MIN_GAIN_S_5 295 0x0012 //TX_MIN_GAIN_S_6 296 0x0012 //TX_MIN_GAIN_S_7 @@ -2075,29 +2993,29 @@ 312 0x7FFF //TX_A_POST_FILT_0 313 0x2000 //TX_A_POST_FILT_1 314 0x4000 //TX_A_POST_FILT_S_0 -315 0x5000 //TX_A_POST_FILT_S_1 +315 0x4000 //TX_A_POST_FILT_S_1 316 0x4000 //TX_A_POST_FILT_S_2 317 0x4000 //TX_A_POST_FILT_S_3 318 0x4000 //TX_A_POST_FILT_S_4 319 0x4000 //TX_A_POST_FILT_S_5 -320 0x4000 //TX_A_POST_FILT_S_6 +320 0x5000 //TX_A_POST_FILT_S_6 321 0x7000 //TX_A_POST_FILT_S_7 322 0x1000 //TX_B_POST_FILT_0 323 0x2000 //TX_B_POST_FILT_1 -324 0x3000 //TX_B_POST_FILT_2 +324 0x2000 //TX_B_POST_FILT_2 325 0x2000 //TX_B_POST_FILT_3 -326 0x5000 //TX_B_POST_FILT_4 +326 0x2000 //TX_B_POST_FILT_4 327 0x2000 //TX_B_POST_FILT_5 -328 0x6000 //TX_B_POST_FILT_6 +328 0x3000 //TX_B_POST_FILT_6 329 0x3000 //TX_B_POST_FILT_7 330 0x1000 //TX_B_LESSCUT_RTO_S_0 -331 0x6000 //TX_B_LESSCUT_RTO_S_1 -332 0x6000 //TX_B_LESSCUT_RTO_S_2 -333 0x6000 //TX_B_LESSCUT_RTO_S_3 -334 0x6000 //TX_B_LESSCUT_RTO_S_4 -335 0x6000 //TX_B_LESSCUT_RTO_S_5 -336 0x7FFF //TX_B_LESSCUT_RTO_S_6 -337 0x7FFF //TX_B_LESSCUT_RTO_S_7 +331 0x1000 //TX_B_LESSCUT_RTO_S_1 +332 0x1000 //TX_B_LESSCUT_RTO_S_2 +333 0x1000 //TX_B_LESSCUT_RTO_S_3 +334 0x1000 //TX_B_LESSCUT_RTO_S_4 +335 0x1000 //TX_B_LESSCUT_RTO_S_5 +336 0x1000 //TX_B_LESSCUT_RTO_S_6 +337 0x1000 //TX_B_LESSCUT_RTO_S_7 338 0x7E14 //TX_LAMBDA_PFILT 339 0x7C29 //TX_LAMBDA_PFILT_S_0 340 0x7C29 //TX_LAMBDA_PFILT_S_1 @@ -2140,10 +3058,10 @@ 377 0x4E20 //TX_NOISE_TH_5_4 378 0x39DF //TX_NOISE_TH_6 379 0x0014 //TX_MINENOISE_TH -380 0x4000 //TX_MINENOISE_MIC0_TH_MTS -381 0xFFEE //TX_MINENOISE_MIC0_TH_EXP -382 0x6000 //TX_MINENOISE_MIC0_S_TH_MTS -383 0xFFF3 //TX_MINENOISE_MIC0_S_TH_EXP +380 0xD508 //TX_MORENS_TFMASK_TH +381 0x0001 //TX_DRC_QUIET_FLOOR +382 0x6D60 //TX_RATIODTL_CUT_TH +383 0x1482 //TX_DT_CUT_K1 384 0x00A5 //TX_OUT_ENER_S_TH_CLEAN 385 0x00A5 //TX_OUT_ENER_S_TH_LESSCLEAN 386 0x00A5 //TX_OUT_ENER_S_TH_NOISY @@ -2151,15 +3069,15 @@ 388 0x0200 //TX_OUT_ENER_TH_SPEECH 389 0x2000 //TX_SN_NPB_GAIN 390 0x0000 //TX_NN_NPB_GAIN -391 0x0000 //TX_CSX_ALPHA_0 -392 0x0000 //TX_CSX_ALPHA_1 -393 0x0000 //TX_CSX_ALPHA_2 -394 0x0000 //TX_CSX_ALPHA_3 -395 0x0800 //TX_MU_ARSP_EST -396 0x00C8 //TX_P_OUTBEAM_MIN_TH +391 0x3000 //TX_POST_MASK_SUP_HSNE +392 0x07D0 //TX_TAIL_DET_TH +393 0x4000 //TX_B_LESSCUT_RTO_WTA +394 0x0000 //TX_MEL_G_R +395 0x0080 //TX_SUPHIGH_TH +396 0x0000 //TX_MASK_G_R 397 0x0002 //TX_EXTRA_NS_L -398 0x0800 //TX_EXTRA_NS_A -399 0x0005 //TX_VR_NOISE_FLOOR_TH +398 0x1800 //TX_C_POST_FLT_MASK +399 0x7FFF //TX_A_POST_FLT_WNS 400 0x0148 //TX_MIN_G_LOW300HZ 401 0x0004 //TX_MAXLEVEL_CNG 402 0x00B4 //TX_STN_NOISE_TH @@ -2274,16 +3192,16 @@ 511 0x6666 //TX_MIC_TO_BFGAIN 512 0x0000 //TX_MICTOBFGAIN0 513 0x0000 //TX_FASTMUE_TH -514 0x0000 //TX_DERVB_LEN_0 -515 0x0000 //TX_DERVB_LEN_1 -516 0x0000 //TX_RHO_DERVB -517 0x0000 //TX_MIC_INDX_DERVB -518 0x0000 //TX_MU_DERVB -519 0x0000 //TX_DR_RESRV_0 -520 0x0000 //TX_DR_RESRV_1 -521 0x0000 //TX_DR_RESRV_2 -522 0x0000 //TX_DR_RESRV_3 -523 0x0000 //TX_DR_RESRV_4 +514 0x2CCC //TX_DEREVERB_LF_MU +515 0x3200 //TX_DEREVERB_HF_MU +516 0x0007 //TX_DEREVERB_DELAY +517 0x0004 //TX_DEREVERB_COEF_LEN +518 0x0003 //TX_DEREVERB_DNR +519 0x0000 //TX_DEREVERB_ALPHA +520 0x0000 //TX_DEREVERB_BETA +521 0x7FFF //TX_GSC_RTOL_TH +522 0x7FFF //TX_GSC_RTOH_TH +523 0x7E2C //TX_WIDE2_MEANHTH 524 0x0000 //TX_DR_RESRV_5 525 0x0000 //TX_DR_RESRV_6 526 0x0000 //TX_DR_RESRV_7 @@ -2327,24 +3245,24 @@ 564 0x0000 //TX_PB_RESRV_0 565 0x0000 //TX_PB_RESRV_1 566 0x0030 //TX_FDEQ_SUBNUM -567 0x504A //TX_FDEQ_GAIN_0 -568 0x4C54 //TX_FDEQ_GAIN_1 -569 0x554B //TX_FDEQ_GAIN_2 -570 0x4D4E //TX_FDEQ_GAIN_3 -571 0x4F4F //TX_FDEQ_GAIN_4 -572 0x4E51 //TX_FDEQ_GAIN_5 -573 0x5154 //TX_FDEQ_GAIN_6 -574 0x5456 //TX_FDEQ_GAIN_7 -575 0x5E66 //TX_FDEQ_GAIN_8 -576 0x675D //TX_FDEQ_GAIN_9 -577 0x5655 //TX_FDEQ_GAIN_10 -578 0x5956 //TX_FDEQ_GAIN_11 -579 0x5656 //TX_FDEQ_GAIN_12 -580 0x5953 //TX_FDEQ_GAIN_13 -581 0x575A //TX_FDEQ_GAIN_14 -582 0x5559 //TX_FDEQ_GAIN_15 -583 0x656E //TX_FDEQ_GAIN_16 -584 0x7B98 //TX_FDEQ_GAIN_17 +567 0x4C4A //TX_FDEQ_GAIN_0 +568 0x4B4F //TX_FDEQ_GAIN_1 +569 0x504B //TX_FDEQ_GAIN_2 +570 0x4A4C //TX_FDEQ_GAIN_3 +571 0x4A49 //TX_FDEQ_GAIN_4 +572 0x4F48 //TX_FDEQ_GAIN_5 +573 0x4A4E //TX_FDEQ_GAIN_6 +574 0x534E //TX_FDEQ_GAIN_7 +575 0x494F //TX_FDEQ_GAIN_8 +576 0x5E6E //TX_FDEQ_GAIN_9 +577 0x787A //TX_FDEQ_GAIN_10 +578 0x6A58 //TX_FDEQ_GAIN_11 +579 0x5051 //TX_FDEQ_GAIN_12 +580 0x5156 //TX_FDEQ_GAIN_13 +581 0x6168 //TX_FDEQ_GAIN_14 +582 0x7678 //TX_FDEQ_GAIN_15 +583 0x7A87 //TX_FDEQ_GAIN_16 +584 0x9898 //TX_FDEQ_GAIN_17 585 0x9898 //TX_FDEQ_GAIN_18 586 0x9848 //TX_FDEQ_GAIN_19 587 0x4848 //TX_FDEQ_GAIN_20 @@ -2383,15 +3301,15 @@ 620 0x4848 //TX_PREEQ_GAIN_MIC0_3 621 0x4848 //TX_PREEQ_GAIN_MIC0_4 622 0x4848 //TX_PREEQ_GAIN_MIC0_5 -623 0x4846 //TX_PREEQ_GAIN_MIC0_6 -624 0x4645 //TX_PREEQ_GAIN_MIC0_7 -625 0x4545 //TX_PREEQ_GAIN_MIC0_8 -626 0x4545 //TX_PREEQ_GAIN_MIC0_9 -627 0x4444 //TX_PREEQ_GAIN_MIC0_10 -628 0x4443 //TX_PREEQ_GAIN_MIC0_11 -629 0x4241 //TX_PREEQ_GAIN_MIC0_12 -630 0x3C3E //TX_PREEQ_GAIN_MIC0_13 -631 0x3E40 //TX_PREEQ_GAIN_MIC0_14 +623 0x4848 //TX_PREEQ_GAIN_MIC0_6 +624 0x4848 //TX_PREEQ_GAIN_MIC0_7 +625 0x4848 //TX_PREEQ_GAIN_MIC0_8 +626 0x4848 //TX_PREEQ_GAIN_MIC0_9 +627 0x4848 //TX_PREEQ_GAIN_MIC0_10 +628 0x4848 //TX_PREEQ_GAIN_MIC0_11 +629 0x4848 //TX_PREEQ_GAIN_MIC0_12 +630 0x4848 //TX_PREEQ_GAIN_MIC0_13 +631 0x4848 //TX_PREEQ_GAIN_MIC0_14 632 0x4848 //TX_PREEQ_GAIN_MIC0_15 633 0x4848 //TX_PREEQ_GAIN_MIC0_16 634 0x4848 //TX_PREEQ_GAIN_MIC0_17 @@ -2401,23 +3319,23 @@ 638 0x4848 //TX_PREEQ_GAIN_MIC0_21 639 0x4848 //TX_PREEQ_GAIN_MIC0_22 640 0x4848 //TX_PREEQ_GAIN_MIC0_23 -641 0x0202 //TX_PREEQ_BIN_MIC0_0 -642 0x0203 //TX_PREEQ_BIN_MIC0_1 -643 0x0303 //TX_PREEQ_BIN_MIC0_2 -644 0x0304 //TX_PREEQ_BIN_MIC0_3 -645 0x0405 //TX_PREEQ_BIN_MIC0_4 -646 0x0506 //TX_PREEQ_BIN_MIC0_5 -647 0x0808 //TX_PREEQ_BIN_MIC0_6 -648 0x0809 //TX_PREEQ_BIN_MIC0_7 -649 0x0A0A //TX_PREEQ_BIN_MIC0_8 -650 0x0C10 //TX_PREEQ_BIN_MIC0_9 -651 0x1013 //TX_PREEQ_BIN_MIC0_10 -652 0x1414 //TX_PREEQ_BIN_MIC0_11 -653 0x261E //TX_PREEQ_BIN_MIC0_12 -654 0x1E14 //TX_PREEQ_BIN_MIC0_13 -655 0x1414 //TX_PREEQ_BIN_MIC0_14 -656 0x2814 //TX_PREEQ_BIN_MIC0_15 -657 0x4000 //TX_PREEQ_BIN_MIC0_16 +641 0x1812 //TX_PREEQ_BIN_MIC0_0 +642 0x0A0A //TX_PREEQ_BIN_MIC0_1 +643 0x0808 //TX_PREEQ_BIN_MIC0_2 +644 0x080A //TX_PREEQ_BIN_MIC0_3 +645 0x0B09 //TX_PREEQ_BIN_MIC0_4 +646 0x0A06 //TX_PREEQ_BIN_MIC0_5 +647 0x0606 //TX_PREEQ_BIN_MIC0_6 +648 0x0605 //TX_PREEQ_BIN_MIC0_7 +649 0x050A //TX_PREEQ_BIN_MIC0_8 +650 0x1505 //TX_PREEQ_BIN_MIC0_9 +651 0x0506 //TX_PREEQ_BIN_MIC0_10 +652 0x0615 //TX_PREEQ_BIN_MIC0_11 +653 0x1516 //TX_PREEQ_BIN_MIC0_12 +654 0x2021 //TX_PREEQ_BIN_MIC0_13 +655 0x2021 //TX_PREEQ_BIN_MIC0_14 +656 0x2021 //TX_PREEQ_BIN_MIC0_15 +657 0x0800 //TX_PREEQ_BIN_MIC0_16 658 0x0000 //TX_PREEQ_BIN_MIC0_17 659 0x0000 //TX_PREEQ_BIN_MIC0_18 660 0x0000 //TX_PREEQ_BIN_MIC0_19 @@ -2432,17 +3350,17 @@ 669 0x4848 //TX_PREEQ_GAIN_MIC1_3 670 0x4848 //TX_PREEQ_GAIN_MIC1_4 671 0x4848 //TX_PREEQ_GAIN_MIC1_5 -672 0x4849 //TX_PREEQ_GAIN_MIC1_6 -673 0x4A4B //TX_PREEQ_GAIN_MIC1_7 -674 0x4C4B //TX_PREEQ_GAIN_MIC1_8 -675 0x4A48 //TX_PREEQ_GAIN_MIC1_9 -676 0x4B4C //TX_PREEQ_GAIN_MIC1_10 -677 0x4C4B //TX_PREEQ_GAIN_MIC1_11 -678 0x4838 //TX_PREEQ_GAIN_MIC1_12 -679 0x3858 //TX_PREEQ_GAIN_MIC1_13 -680 0x7060 //TX_PREEQ_GAIN_MIC1_14 -681 0x9870 //TX_PREEQ_GAIN_MIC1_15 -682 0x5848 //TX_PREEQ_GAIN_MIC1_16 +672 0x4A4C //TX_PREEQ_GAIN_MIC1_6 +673 0x4E50 //TX_PREEQ_GAIN_MIC1_7 +674 0x5456 //TX_PREEQ_GAIN_MIC1_8 +675 0x585C //TX_PREEQ_GAIN_MIC1_9 +676 0x5C64 //TX_PREEQ_GAIN_MIC1_10 +677 0x7478 //TX_PREEQ_GAIN_MIC1_11 +678 0x705C //TX_PREEQ_GAIN_MIC1_12 +679 0x4838 //TX_PREEQ_GAIN_MIC1_13 +680 0x3C70 //TX_PREEQ_GAIN_MIC1_14 +681 0x4848 //TX_PREEQ_GAIN_MIC1_15 +682 0x4848 //TX_PREEQ_GAIN_MIC1_16 683 0x4848 //TX_PREEQ_GAIN_MIC1_17 684 0x4848 //TX_PREEQ_GAIN_MIC1_18 685 0x4848 //TX_PREEQ_GAIN_MIC1_19 @@ -2456,17 +3374,17 @@ 693 0x0304 //TX_PREEQ_BIN_MIC1_3 694 0x0405 //TX_PREEQ_BIN_MIC1_4 695 0x0506 //TX_PREEQ_BIN_MIC1_5 -696 0x0808 //TX_PREEQ_BIN_MIC1_6 -697 0x0809 //TX_PREEQ_BIN_MIC1_7 -698 0x0A0A //TX_PREEQ_BIN_MIC1_8 +696 0x0708 //TX_PREEQ_BIN_MIC1_6 +697 0x0909 //TX_PREEQ_BIN_MIC1_7 +698 0x090B //TX_PREEQ_BIN_MIC1_8 699 0x0C10 //TX_PREEQ_BIN_MIC1_9 700 0x1013 //TX_PREEQ_BIN_MIC1_10 701 0x1414 //TX_PREEQ_BIN_MIC1_11 -702 0x261E //TX_PREEQ_BIN_MIC1_12 -703 0x1E14 //TX_PREEQ_BIN_MIC1_13 -704 0x1414 //TX_PREEQ_BIN_MIC1_14 -705 0x2814 //TX_PREEQ_BIN_MIC1_15 -706 0x4000 //TX_PREEQ_BIN_MIC1_16 +702 0x1414 //TX_PREEQ_BIN_MIC1_12 +703 0x1C1E //TX_PREEQ_BIN_MIC1_13 +704 0x1E28 //TX_PREEQ_BIN_MIC1_14 +705 0x462C //TX_PREEQ_BIN_MIC1_15 +706 0x0000 //TX_PREEQ_BIN_MIC1_16 707 0x0000 //TX_PREEQ_BIN_MIC1_17 708 0x0000 //TX_PREEQ_BIN_MIC1_18 709 0x0000 //TX_PREEQ_BIN_MIC1_19 @@ -2499,23 +3417,23 @@ 736 0x4848 //TX_PREEQ_GAIN_MIC2_21 737 0x4848 //TX_PREEQ_GAIN_MIC2_22 738 0x4848 //TX_PREEQ_GAIN_MIC2_23 -739 0x0202 //TX_PREEQ_BIN_MIC2_0 -740 0x0203 //TX_PREEQ_BIN_MIC2_1 -741 0x0303 //TX_PREEQ_BIN_MIC2_2 -742 0x0304 //TX_PREEQ_BIN_MIC2_3 -743 0x0405 //TX_PREEQ_BIN_MIC2_4 -744 0x0506 //TX_PREEQ_BIN_MIC2_5 -745 0x0808 //TX_PREEQ_BIN_MIC2_6 -746 0x0809 //TX_PREEQ_BIN_MIC2_7 -747 0x0A0A //TX_PREEQ_BIN_MIC2_8 -748 0x0C10 //TX_PREEQ_BIN_MIC2_9 -749 0x1013 //TX_PREEQ_BIN_MIC2_10 -750 0x1414 //TX_PREEQ_BIN_MIC2_11 -751 0x261E //TX_PREEQ_BIN_MIC2_12 -752 0x1E14 //TX_PREEQ_BIN_MIC2_13 -753 0x1414 //TX_PREEQ_BIN_MIC2_14 -754 0x2814 //TX_PREEQ_BIN_MIC2_15 -755 0x4000 //TX_PREEQ_BIN_MIC2_16 +739 0x0E10 //TX_PREEQ_BIN_MIC2_0 +740 0x1010 //TX_PREEQ_BIN_MIC2_1 +741 0x1010 //TX_PREEQ_BIN_MIC2_2 +742 0x1010 //TX_PREEQ_BIN_MIC2_3 +743 0x1010 //TX_PREEQ_BIN_MIC2_4 +744 0x1010 //TX_PREEQ_BIN_MIC2_5 +745 0x1010 //TX_PREEQ_BIN_MIC2_6 +746 0x1010 //TX_PREEQ_BIN_MIC2_7 +747 0x1010 //TX_PREEQ_BIN_MIC2_8 +748 0x1010 //TX_PREEQ_BIN_MIC2_9 +749 0x1010 //TX_PREEQ_BIN_MIC2_10 +750 0x1010 //TX_PREEQ_BIN_MIC2_11 +751 0x1010 //TX_PREEQ_BIN_MIC2_12 +752 0x1010 //TX_PREEQ_BIN_MIC2_13 +753 0x1010 //TX_PREEQ_BIN_MIC2_14 +754 0x0200 //TX_PREEQ_BIN_MIC2_15 +755 0x0000 //TX_PREEQ_BIN_MIC2_16 756 0x0000 //TX_PREEQ_BIN_MIC2_17 757 0x0000 //TX_PREEQ_BIN_MIC2_18 758 0x0000 //TX_PREEQ_BIN_MIC2_19 @@ -2626,7 +3544,7 @@ 863 0x199A //TX_TDDRC_HMNC_GAIN 864 0x0000 //TX_TDDRC_SMT_FLAG 865 0x0CCD //TX_TDDRC_SMT_W -866 0x05F5 //TX_TDDRC_DRC_GAIN +866 0x0504 //TX_TDDRC_DRC_GAIN 867 0x7FFF //TX_TDDRC_LMT_THRD 868 0x0000 //TX_TDDRC_LMT_ALPHA 869 0x0000 //TX_TFMASKLTH @@ -2657,6 +3575,71 @@ 894 0xC000 //TX_FASTNS_SSA_THHFL 895 0xCCCC //TX_FASTNS_SSA_THLFH 896 0xD999 //TX_FASTNS_SSA_THHFH +897 0x2339 //TX_SENDFUNC_REG_MICMUTE +898 0x0021 //TX_SENDFUNC_REG_MICMUTE1 +899 0x02BC //TX_MICMUTE_RATIO_THR +900 0x0140 //TX_MICMUTE_AMP_THR +901 0x0004 //TX_MICMUTE_HPF_IND +902 0x00C0 //TX_MICMUTE_LOG_EYR_TH +903 0x0008 //TX_MICMUTE_CVG_TIME +904 0x0008 //TX_MICMUTE_RELEASE_TIME +905 0x01FE //TX_MIC_VOLUME_MIC0MUTE +906 0x0020 //TX_MICMUTE_EPD_OFFSET_0 +907 0x001E //TX_MICMUTE_FRQ_AEC_L +908 0x7999 //TX_MICMUTE_EAD_THR +909 0x7FFF //TX_MICMUTE_LAMBDA_CB_NLE +910 0x7FFF //TX_MICMUTE_LAMBDA_RE_EST +911 0x4000 //TX_DTD_THR1_MICMUTE_0 +912 0x7000 //TX_DTD_THR1_MICMUTE_1 +913 0x7FFF //TX_DTD_THR1_MICMUTE_2 +914 0x7FFF //TX_DTD_THR1_MICMUTE_3 +915 0x6CCC //TX_DTD_THR2_MICMUTE_0 +916 0x0400 //TX_MICMUTE_MIN_EQ_RE_EST_0 +917 0x0400 //TX_MICMUTE_MIN_EQ_RE_EST_1 +918 0x1000 //TX_MICMUTE_MIN_EQ_RE_EST_2 +919 0x7FFF //TX_MICMUTE_MIN_EQ_RE_EST_3 +920 0x7FFF //TX_MICMUTE_MIN_EQ_RE_EST_4 +921 0x4000 //TX_MICMUTE_C_POST_FLT +922 0x03E8 //TX_MICMUTE_DT_CUT_K +923 0x0001 //TX_MICMUTE_DT_CUT_THR +924 0x03E8 //TX_MICMUTE_DT_CUT_K2 +925 0x0001 //TX_MICMUTE_DT_CUT_THR2 +926 0x0064 //TX_MICMUTE_DT2_HOLD_N +927 0x1000 //TX_MICMUTE_RATIODTH_THCUT +928 0x1000 //TX_MICMUTE_B_POST_FLT_ECHOL +929 0x7FFF //TX_MICMUTE_B_POST_FLT_ECHOH +930 0x0400 //TX_MICMUTE_C_POST_FLT_MASK +931 0x7999 //TX_MICMUTE_RATIODTL_CUT_TH +932 0x0258 //TX_MICMUTE_DT_CUT_K1 +933 0x0800 //TX_MICMUTE_N2_SN_EST +934 0xFC00 //TX_MICMUTE_THR_SN_EST_0 +935 0x001C //TX_MICMUTE_MIN_G_CTRL_0 +936 0x6000 //TX_MICMUTE_A_POST_FILT_S_0 +937 0x7000 //TX_MICMUTE_B_POST_FILT_0 +938 0x2710 //TX_MIC1RUB_AMP_THR +939 0x0010 //TX_MIC1MUTE_RATIO_THR +940 0x0450 //TX_MIC1MUTE_AMP_THR +941 0x0008 //TX_MIC1MUTE_CVG_TIME +942 0x0008 //TX_MIC1MUTE_RELEASE_TIME +943 0x0000 //TX_AMS_RESRV_01 +944 0x0000 //TX_AMS_RESRV_02 +945 0x0000 //TX_AMS_RESRV_03 +946 0x0000 //TX_AMS_RESRV_04 +947 0x0000 //TX_AMS_RESRV_05 +948 0x0000 //TX_AMS_RESRV_06 +949 0x0000 //TX_AMS_RESRV_07 +950 0x0000 //TX_AMS_RESRV_08 +951 0x0000 //TX_AMS_RESRV_09 +952 0x0000 //TX_AMS_RESRV_10 +953 0x0000 //TX_AMS_RESRV_11 +954 0x0000 //TX_AMS_RESRV_12 +955 0x0000 //TX_AMS_RESRV_13 +956 0x0000 //TX_AMS_RESRV_14 +957 0x0000 //TX_AMS_RESRV_15 +958 0x0000 //TX_AMS_RESRV_16 +959 0x0000 //TX_AMS_RESRV_17 +960 0x0000 //TX_AMS_RESRV_18 +961 0x0000 //TX_AMS_RESRV_19 #RX 0 0x003C //RX_RECVFUNC_MODE_0 1 0x0000 //RX_RECVFUNC_MODE_1 @@ -2668,7 +3651,7 @@ 7 0x1000 //RX_TDDRC_ALPHA_UP_2 8 0x1000 //RX_TDDRC_ALPHA_UP_3 9 0x1000 //RX_TDDRC_ALPHA_UP_4 -10 0x064E //RX_PGA +10 0x0722 //RX_PGA 11 0x7FFF //RX_A_HP 12 0x4000 //RX_B_PE 13 0x5800 //RX_THR_PITCH_DET_0 @@ -2697,21 +3680,21 @@ 36 0x0000 //RX_LMT_THRD 37 0x4000 //RX_LMT_ALPHA 38 0x0020 //RX_FDEQ_SUBNUM -39 0x4848 //RX_FDEQ_GAIN_0 -40 0x4850 //RX_FDEQ_GAIN_1 -41 0x6478 //RX_FDEQ_GAIN_2 -42 0x8689 //RX_FDEQ_GAIN_3 -43 0x908F //RX_FDEQ_GAIN_4 -44 0x9495 //RX_FDEQ_GAIN_5 -45 0x989D //RX_FDEQ_GAIN_6 -46 0x9DA6 //RX_FDEQ_GAIN_7 -47 0xA895 //RX_FDEQ_GAIN_8 -48 0x8A8A //RX_FDEQ_GAIN_9 -49 0x8E78 //RX_FDEQ_GAIN_10 -50 0x7070 //RX_FDEQ_GAIN_11 -51 0x7680 //RX_FDEQ_GAIN_12 -52 0x787C //RX_FDEQ_GAIN_13 -53 0x8890 //RX_FDEQ_GAIN_14 +39 0x4E4E //RX_FDEQ_GAIN_0 +40 0x4E56 //RX_FDEQ_GAIN_1 +41 0x6878 //RX_FDEQ_GAIN_2 +42 0x8088 //RX_FDEQ_GAIN_3 +43 0x848B //RX_FDEQ_GAIN_4 +44 0x8F8E //RX_FDEQ_GAIN_5 +45 0x9494 //RX_FDEQ_GAIN_6 +46 0x96A0 //RX_FDEQ_GAIN_7 +47 0xB8A0 //RX_FDEQ_GAIN_8 +48 0xA99D //RX_FDEQ_GAIN_9 +49 0x9D6A //RX_FDEQ_GAIN_10 +50 0x626B //RX_FDEQ_GAIN_11 +51 0x6C78 //RX_FDEQ_GAIN_12 +52 0x7884 //RX_FDEQ_GAIN_13 +53 0x9098 //RX_FDEQ_GAIN_14 54 0x9CAC //RX_FDEQ_GAIN_15 55 0x4848 //RX_FDEQ_GAIN_16 56 0x4848 //RX_FDEQ_GAIN_17 @@ -2782,7 +3765,7 @@ 121 0x199A //RX_TDDRC_HMNC_GAIN 122 0x0001 //RX_TDDRC_SMT_FLAG 123 0x0CCD //RX_TDDRC_SMT_W -124 0x0275 //RX_TDDRC_DRC_GAIN +124 0x02FD //RX_TDDRC_DRC_GAIN 125 0x7C00 //RX_LAMBDA_PKA_FP 126 0x2000 //RX_TPKA_FP 127 0x2000 //RX_MIN_G_FP @@ -2838,23 +3821,23 @@ 121 0x199A //RX_TDDRC_HMNC_GAIN 122 0x0001 //RX_TDDRC_SMT_FLAG 123 0x0CCD //RX_TDDRC_SMT_W -124 0x0275 //RX_TDDRC_DRC_GAIN +124 0x02FD //RX_TDDRC_DRC_GAIN 38 0x0020 //RX_FDEQ_SUBNUM -39 0x4848 //RX_FDEQ_GAIN_0 -40 0x4850 //RX_FDEQ_GAIN_1 -41 0x6478 //RX_FDEQ_GAIN_2 -42 0x8689 //RX_FDEQ_GAIN_3 -43 0x908F //RX_FDEQ_GAIN_4 -44 0x9495 //RX_FDEQ_GAIN_5 -45 0x989D //RX_FDEQ_GAIN_6 -46 0x9DA6 //RX_FDEQ_GAIN_7 -47 0xA895 //RX_FDEQ_GAIN_8 -48 0x8A8A //RX_FDEQ_GAIN_9 -49 0x8E78 //RX_FDEQ_GAIN_10 -50 0x7070 //RX_FDEQ_GAIN_11 -51 0x7680 //RX_FDEQ_GAIN_12 -52 0x787C //RX_FDEQ_GAIN_13 -53 0x8890 //RX_FDEQ_GAIN_14 +39 0x4E4E //RX_FDEQ_GAIN_0 +40 0x4E56 //RX_FDEQ_GAIN_1 +41 0x6878 //RX_FDEQ_GAIN_2 +42 0x8088 //RX_FDEQ_GAIN_3 +43 0x848B //RX_FDEQ_GAIN_4 +44 0x8F8E //RX_FDEQ_GAIN_5 +45 0x9494 //RX_FDEQ_GAIN_6 +46 0x96A0 //RX_FDEQ_GAIN_7 +47 0xB8A0 //RX_FDEQ_GAIN_8 +48 0xA99D //RX_FDEQ_GAIN_9 +49 0x9D6A //RX_FDEQ_GAIN_10 +50 0x626B //RX_FDEQ_GAIN_11 +51 0x6C78 //RX_FDEQ_GAIN_12 +52 0x7884 //RX_FDEQ_GAIN_13 +53 0x9098 //RX_FDEQ_GAIN_14 54 0x9CAC //RX_FDEQ_GAIN_15 55 0x4848 //RX_FDEQ_GAIN_16 56 0x4848 //RX_FDEQ_GAIN_17 @@ -2937,23 +3920,23 @@ 121 0x199A //RX_TDDRC_HMNC_GAIN 122 0x0001 //RX_TDDRC_SMT_FLAG 123 0x0CCD //RX_TDDRC_SMT_W -124 0x0275 //RX_TDDRC_DRC_GAIN +124 0x02FD //RX_TDDRC_DRC_GAIN 38 0x0020 //RX_FDEQ_SUBNUM -39 0x4848 //RX_FDEQ_GAIN_0 -40 0x4850 //RX_FDEQ_GAIN_1 -41 0x6478 //RX_FDEQ_GAIN_2 -42 0x8689 //RX_FDEQ_GAIN_3 -43 0x908F //RX_FDEQ_GAIN_4 -44 0x9495 //RX_FDEQ_GAIN_5 -45 0x989D //RX_FDEQ_GAIN_6 -46 0x9DA6 //RX_FDEQ_GAIN_7 -47 0xA895 //RX_FDEQ_GAIN_8 -48 0x8A8A //RX_FDEQ_GAIN_9 -49 0x8E78 //RX_FDEQ_GAIN_10 -50 0x7070 //RX_FDEQ_GAIN_11 -51 0x7680 //RX_FDEQ_GAIN_12 -52 0x787C //RX_FDEQ_GAIN_13 -53 0x8890 //RX_FDEQ_GAIN_14 +39 0x4E4E //RX_FDEQ_GAIN_0 +40 0x4E56 //RX_FDEQ_GAIN_1 +41 0x6878 //RX_FDEQ_GAIN_2 +42 0x8088 //RX_FDEQ_GAIN_3 +43 0x848B //RX_FDEQ_GAIN_4 +44 0x8F8E //RX_FDEQ_GAIN_5 +45 0x9494 //RX_FDEQ_GAIN_6 +46 0x96A0 //RX_FDEQ_GAIN_7 +47 0xB8A0 //RX_FDEQ_GAIN_8 +48 0xA99D //RX_FDEQ_GAIN_9 +49 0x9D6A //RX_FDEQ_GAIN_10 +50 0x626B //RX_FDEQ_GAIN_11 +51 0x6C78 //RX_FDEQ_GAIN_12 +52 0x7884 //RX_FDEQ_GAIN_13 +53 0x9098 //RX_FDEQ_GAIN_14 54 0x9CAC //RX_FDEQ_GAIN_15 55 0x4848 //RX_FDEQ_GAIN_16 56 0x4848 //RX_FDEQ_GAIN_17 @@ -3036,23 +4019,23 @@ 121 0x199A //RX_TDDRC_HMNC_GAIN 122 0x0001 //RX_TDDRC_SMT_FLAG 123 0x0CCD //RX_TDDRC_SMT_W -124 0x0275 //RX_TDDRC_DRC_GAIN +124 0x02FD //RX_TDDRC_DRC_GAIN 38 0x0020 //RX_FDEQ_SUBNUM -39 0x4848 //RX_FDEQ_GAIN_0 -40 0x4850 //RX_FDEQ_GAIN_1 -41 0x6478 //RX_FDEQ_GAIN_2 -42 0x8689 //RX_FDEQ_GAIN_3 -43 0x908F //RX_FDEQ_GAIN_4 -44 0x9495 //RX_FDEQ_GAIN_5 -45 0x989D //RX_FDEQ_GAIN_6 -46 0x9DA6 //RX_FDEQ_GAIN_7 -47 0xA895 //RX_FDEQ_GAIN_8 -48 0x8A8A //RX_FDEQ_GAIN_9 -49 0x8E78 //RX_FDEQ_GAIN_10 -50 0x7070 //RX_FDEQ_GAIN_11 -51 0x7680 //RX_FDEQ_GAIN_12 -52 0x787C //RX_FDEQ_GAIN_13 -53 0x8890 //RX_FDEQ_GAIN_14 +39 0x4E4E //RX_FDEQ_GAIN_0 +40 0x4E56 //RX_FDEQ_GAIN_1 +41 0x6878 //RX_FDEQ_GAIN_2 +42 0x8088 //RX_FDEQ_GAIN_3 +43 0x848B //RX_FDEQ_GAIN_4 +44 0x8F8E //RX_FDEQ_GAIN_5 +45 0x9494 //RX_FDEQ_GAIN_6 +46 0x96A0 //RX_FDEQ_GAIN_7 +47 0xB8A0 //RX_FDEQ_GAIN_8 +48 0xA99D //RX_FDEQ_GAIN_9 +49 0x9D6A //RX_FDEQ_GAIN_10 +50 0x626B //RX_FDEQ_GAIN_11 +51 0x6C78 //RX_FDEQ_GAIN_12 +52 0x7884 //RX_FDEQ_GAIN_13 +53 0x9098 //RX_FDEQ_GAIN_14 54 0x9CAC //RX_FDEQ_GAIN_15 55 0x4848 //RX_FDEQ_GAIN_16 56 0x4848 //RX_FDEQ_GAIN_17 @@ -3110,7 +4093,7 @@ 108 0x5333 //RX_FDDRC_SLANT_1_2 109 0x5333 //RX_FDDRC_SLANT_1_3 110 0x0000 //RX_FDDRC_RESRV_0 -129 0x0026 //RX_SPK_VOL +129 0x0024 //RX_SPK_VOL 130 0x0000 //RX_VOL_RESRV_0 #VOL 3 6 0x1000 //RX_TDDRC_ALPHA_UP_1 @@ -3135,23 +4118,23 @@ 121 0x199A //RX_TDDRC_HMNC_GAIN 122 0x0001 //RX_TDDRC_SMT_FLAG 123 0x0CCD //RX_TDDRC_SMT_W -124 0x0275 //RX_TDDRC_DRC_GAIN +124 0x02FD //RX_TDDRC_DRC_GAIN 38 0x0020 //RX_FDEQ_SUBNUM -39 0x4848 //RX_FDEQ_GAIN_0 -40 0x4850 //RX_FDEQ_GAIN_1 -41 0x6478 //RX_FDEQ_GAIN_2 -42 0x8689 //RX_FDEQ_GAIN_3 -43 0x908F //RX_FDEQ_GAIN_4 -44 0x9495 //RX_FDEQ_GAIN_5 -45 0x989D //RX_FDEQ_GAIN_6 -46 0x9DA6 //RX_FDEQ_GAIN_7 -47 0xA895 //RX_FDEQ_GAIN_8 -48 0x8A8A //RX_FDEQ_GAIN_9 -49 0x8E78 //RX_FDEQ_GAIN_10 -50 0x7070 //RX_FDEQ_GAIN_11 -51 0x7680 //RX_FDEQ_GAIN_12 -52 0x787C //RX_FDEQ_GAIN_13 -53 0x8890 //RX_FDEQ_GAIN_14 +39 0x4E4E //RX_FDEQ_GAIN_0 +40 0x4E56 //RX_FDEQ_GAIN_1 +41 0x6878 //RX_FDEQ_GAIN_2 +42 0x8088 //RX_FDEQ_GAIN_3 +43 0x848B //RX_FDEQ_GAIN_4 +44 0x8F8E //RX_FDEQ_GAIN_5 +45 0x9494 //RX_FDEQ_GAIN_6 +46 0x96A0 //RX_FDEQ_GAIN_7 +47 0xB8A0 //RX_FDEQ_GAIN_8 +48 0xA99D //RX_FDEQ_GAIN_9 +49 0x9D6A //RX_FDEQ_GAIN_10 +50 0x626B //RX_FDEQ_GAIN_11 +51 0x6C78 //RX_FDEQ_GAIN_12 +52 0x7884 //RX_FDEQ_GAIN_13 +53 0x9098 //RX_FDEQ_GAIN_14 54 0x9CAC //RX_FDEQ_GAIN_15 55 0x4848 //RX_FDEQ_GAIN_16 56 0x4848 //RX_FDEQ_GAIN_17 @@ -3209,7 +4192,7 @@ 108 0x5333 //RX_FDDRC_SLANT_1_2 109 0x5333 //RX_FDDRC_SLANT_1_3 110 0x0000 //RX_FDDRC_RESRV_0 -129 0x003D //RX_SPK_VOL +129 0x003A //RX_SPK_VOL 130 0x0000 //RX_VOL_RESRV_0 #VOL 4 6 0x1000 //RX_TDDRC_ALPHA_UP_1 @@ -3234,23 +4217,23 @@ 121 0x199A //RX_TDDRC_HMNC_GAIN 122 0x0001 //RX_TDDRC_SMT_FLAG 123 0x0CCD //RX_TDDRC_SMT_W -124 0x0275 //RX_TDDRC_DRC_GAIN +124 0x02FD //RX_TDDRC_DRC_GAIN 38 0x0020 //RX_FDEQ_SUBNUM -39 0x4848 //RX_FDEQ_GAIN_0 -40 0x4850 //RX_FDEQ_GAIN_1 -41 0x6478 //RX_FDEQ_GAIN_2 -42 0x8689 //RX_FDEQ_GAIN_3 -43 0x908F //RX_FDEQ_GAIN_4 -44 0x9495 //RX_FDEQ_GAIN_5 -45 0x989D //RX_FDEQ_GAIN_6 -46 0x9DA6 //RX_FDEQ_GAIN_7 -47 0xA895 //RX_FDEQ_GAIN_8 -48 0x8A8A //RX_FDEQ_GAIN_9 -49 0x8E78 //RX_FDEQ_GAIN_10 -50 0x7070 //RX_FDEQ_GAIN_11 -51 0x7680 //RX_FDEQ_GAIN_12 -52 0x787C //RX_FDEQ_GAIN_13 -53 0x8890 //RX_FDEQ_GAIN_14 +39 0x4E4E //RX_FDEQ_GAIN_0 +40 0x4E56 //RX_FDEQ_GAIN_1 +41 0x6878 //RX_FDEQ_GAIN_2 +42 0x8088 //RX_FDEQ_GAIN_3 +43 0x848B //RX_FDEQ_GAIN_4 +44 0x8F8E //RX_FDEQ_GAIN_5 +45 0x9494 //RX_FDEQ_GAIN_6 +46 0x96A0 //RX_FDEQ_GAIN_7 +47 0xB8A0 //RX_FDEQ_GAIN_8 +48 0xA99D //RX_FDEQ_GAIN_9 +49 0x9D6A //RX_FDEQ_GAIN_10 +50 0x626B //RX_FDEQ_GAIN_11 +51 0x6C78 //RX_FDEQ_GAIN_12 +52 0x7884 //RX_FDEQ_GAIN_13 +53 0x9098 //RX_FDEQ_GAIN_14 54 0x9CAC //RX_FDEQ_GAIN_15 55 0x4848 //RX_FDEQ_GAIN_16 56 0x4848 //RX_FDEQ_GAIN_17 @@ -3308,7 +4291,7 @@ 108 0x5333 //RX_FDDRC_SLANT_1_2 109 0x5333 //RX_FDDRC_SLANT_1_3 110 0x0000 //RX_FDDRC_RESRV_0 -129 0x0060 //RX_SPK_VOL +129 0x0059 //RX_SPK_VOL 130 0x0000 //RX_VOL_RESRV_0 #VOL 5 6 0x1000 //RX_TDDRC_ALPHA_UP_1 @@ -3333,23 +4316,23 @@ 121 0x199A //RX_TDDRC_HMNC_GAIN 122 0x0001 //RX_TDDRC_SMT_FLAG 123 0x0CCD //RX_TDDRC_SMT_W -124 0x0275 //RX_TDDRC_DRC_GAIN +124 0x02FD //RX_TDDRC_DRC_GAIN 38 0x0020 //RX_FDEQ_SUBNUM -39 0x4848 //RX_FDEQ_GAIN_0 -40 0x4850 //RX_FDEQ_GAIN_1 -41 0x6478 //RX_FDEQ_GAIN_2 -42 0x8689 //RX_FDEQ_GAIN_3 -43 0x908F //RX_FDEQ_GAIN_4 -44 0x9495 //RX_FDEQ_GAIN_5 -45 0x989D //RX_FDEQ_GAIN_6 -46 0x9DA6 //RX_FDEQ_GAIN_7 -47 0xA895 //RX_FDEQ_GAIN_8 -48 0x8A8A //RX_FDEQ_GAIN_9 -49 0x8E78 //RX_FDEQ_GAIN_10 -50 0x7070 //RX_FDEQ_GAIN_11 -51 0x7680 //RX_FDEQ_GAIN_12 -52 0x787C //RX_FDEQ_GAIN_13 -53 0x8890 //RX_FDEQ_GAIN_14 +39 0x4E4E //RX_FDEQ_GAIN_0 +40 0x4E56 //RX_FDEQ_GAIN_1 +41 0x6878 //RX_FDEQ_GAIN_2 +42 0x8088 //RX_FDEQ_GAIN_3 +43 0x848B //RX_FDEQ_GAIN_4 +44 0x8F8E //RX_FDEQ_GAIN_5 +45 0x9494 //RX_FDEQ_GAIN_6 +46 0x96A0 //RX_FDEQ_GAIN_7 +47 0xB8A0 //RX_FDEQ_GAIN_8 +48 0xA99D //RX_FDEQ_GAIN_9 +49 0x9D6A //RX_FDEQ_GAIN_10 +50 0x626B //RX_FDEQ_GAIN_11 +51 0x6C78 //RX_FDEQ_GAIN_12 +52 0x7884 //RX_FDEQ_GAIN_13 +53 0x9098 //RX_FDEQ_GAIN_14 54 0x9CAC //RX_FDEQ_GAIN_15 55 0x4848 //RX_FDEQ_GAIN_16 56 0x4848 //RX_FDEQ_GAIN_17 @@ -3407,7 +4390,7 @@ 108 0x5333 //RX_FDDRC_SLANT_1_2 109 0x5333 //RX_FDDRC_SLANT_1_3 110 0x0000 //RX_FDDRC_RESRV_0 -129 0x0099 //RX_SPK_VOL +129 0x0090 //RX_SPK_VOL 130 0x0000 //RX_VOL_RESRV_0 #VOL 6 6 0x1000 //RX_TDDRC_ALPHA_UP_1 @@ -3432,23 +4415,23 @@ 121 0x199A //RX_TDDRC_HMNC_GAIN 122 0x0001 //RX_TDDRC_SMT_FLAG 123 0x0CCD //RX_TDDRC_SMT_W -124 0x0275 //RX_TDDRC_DRC_GAIN +124 0x02FD //RX_TDDRC_DRC_GAIN 38 0x0020 //RX_FDEQ_SUBNUM -39 0x4848 //RX_FDEQ_GAIN_0 -40 0x4850 //RX_FDEQ_GAIN_1 -41 0x6478 //RX_FDEQ_GAIN_2 -42 0x8689 //RX_FDEQ_GAIN_3 -43 0x908F //RX_FDEQ_GAIN_4 -44 0x9495 //RX_FDEQ_GAIN_5 -45 0x989D //RX_FDEQ_GAIN_6 -46 0x9DA6 //RX_FDEQ_GAIN_7 -47 0xA895 //RX_FDEQ_GAIN_8 -48 0x8A8A //RX_FDEQ_GAIN_9 -49 0x8E78 //RX_FDEQ_GAIN_10 -50 0x7070 //RX_FDEQ_GAIN_11 -51 0x7680 //RX_FDEQ_GAIN_12 -52 0x787C //RX_FDEQ_GAIN_13 -53 0x8890 //RX_FDEQ_GAIN_14 +39 0x4E4E //RX_FDEQ_GAIN_0 +40 0x4E56 //RX_FDEQ_GAIN_1 +41 0x6878 //RX_FDEQ_GAIN_2 +42 0x8088 //RX_FDEQ_GAIN_3 +43 0x848B //RX_FDEQ_GAIN_4 +44 0x8F8E //RX_FDEQ_GAIN_5 +45 0x9494 //RX_FDEQ_GAIN_6 +46 0x96A0 //RX_FDEQ_GAIN_7 +47 0xB8A0 //RX_FDEQ_GAIN_8 +48 0xA99D //RX_FDEQ_GAIN_9 +49 0x9D6A //RX_FDEQ_GAIN_10 +50 0x626B //RX_FDEQ_GAIN_11 +51 0x6C78 //RX_FDEQ_GAIN_12 +52 0x7884 //RX_FDEQ_GAIN_13 +53 0x9098 //RX_FDEQ_GAIN_14 54 0x9CAC //RX_FDEQ_GAIN_15 55 0x4848 //RX_FDEQ_GAIN_16 56 0x4848 //RX_FDEQ_GAIN_17 @@ -3508,10 +4491,862 @@ 110 0x0000 //RX_FDDRC_RESRV_0 129 0x0100 //RX_SPK_VOL 130 0x0000 //RX_VOL_RESRV_0 +#RX 2 +157 0x003C //RX_RECVFUNC_MODE_0 +158 0x0000 //RX_RECVFUNC_MODE_1 +159 0x0004 //RX_SAMPLINGFREQ_SIG +160 0x0004 //RX_SAMPLINGFREQ_PROC +161 0x000A //RX_FRAME_SZ +162 0x0000 //RX_DELAY_OPT +163 0x1000 //RX_TDDRC_ALPHA_UP_1 +164 0x1000 //RX_TDDRC_ALPHA_UP_2 +165 0x1000 //RX_TDDRC_ALPHA_UP_3 +166 0x1000 //RX_TDDRC_ALPHA_UP_4 +167 0x0722 //RX_PGA +168 0x7FFF //RX_A_HP +169 0x4000 //RX_B_PE +170 0x5800 //RX_THR_PITCH_DET_0 +171 0x5000 //RX_THR_PITCH_DET_1 +172 0x4000 //RX_THR_PITCH_DET_2 +173 0x0008 //RX_PITCH_BFR_LEN +174 0x0003 //RX_SBD_PITCH_DET +175 0x0100 //RX_PP_RESRV_0 +176 0x0020 //RX_PP_RESRV_1 +177 0x0600 //RX_N_SN_EST +178 0x000C //RX_N2_SN_EST +179 0x000F //RX_NS_LVL_CTRL +180 0xF800 //RX_THR_SN_EST +181 0x7E00 //RX_LAMBDA_PFILT +182 0x000A //RX_FENS_RESRV_0 +183 0x0190 //RX_FENS_RESRV_1 +184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +187 0x0002 //RX_EXTRA_NS_L +188 0x0800 //RX_EXTRA_NS_A +189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +190 0x7000 //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +192 0x199A //RX_A_POST_FLT +193 0x0000 //RX_LMT_THRD +194 0x4000 //RX_LMT_ALPHA +195 0x0020 //RX_FDEQ_SUBNUM +196 0x4E4E //RX_FDEQ_GAIN_0 +197 0x4E56 //RX_FDEQ_GAIN_1 +198 0x6878 //RX_FDEQ_GAIN_2 +199 0x8088 //RX_FDEQ_GAIN_3 +200 0x848B //RX_FDEQ_GAIN_4 +201 0x8F8E //RX_FDEQ_GAIN_5 +202 0x9494 //RX_FDEQ_GAIN_6 +203 0x96A0 //RX_FDEQ_GAIN_7 +204 0xB8A0 //RX_FDEQ_GAIN_8 +205 0xA99D //RX_FDEQ_GAIN_9 +206 0x9D6A //RX_FDEQ_GAIN_10 +207 0x626B //RX_FDEQ_GAIN_11 +208 0x6C78 //RX_FDEQ_GAIN_12 +209 0x7884 //RX_FDEQ_GAIN_13 +210 0x9098 //RX_FDEQ_GAIN_14 +211 0x9CAC //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0202 //RX_FDEQ_BIN_0 +221 0x0202 //RX_FDEQ_BIN_1 +222 0x0302 //RX_FDEQ_BIN_2 +223 0x0304 //RX_FDEQ_BIN_3 +224 0x0405 //RX_FDEQ_BIN_4 +225 0x0506 //RX_FDEQ_BIN_5 +226 0x0708 //RX_FDEQ_BIN_6 +227 0x090A //RX_FDEQ_BIN_7 +228 0x0B0C //RX_FDEQ_BIN_8 +229 0x0D0E //RX_FDEQ_BIN_9 +230 0x1013 //RX_FDEQ_BIN_10 +231 0x1719 //RX_FDEQ_BIN_11 +232 0x1B1E //RX_FDEQ_BIN_12 +233 0x1E1E //RX_FDEQ_BIN_13 +234 0x1E28 //RX_FDEQ_BIN_14 +235 0x282C //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x4000 //RX_FDEQ_RESRV_0 +245 0x0320 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0030 //RX_FDDRC_BAND_MARGIN_1 +248 0x0050 //RX_FDDRC_BAND_MARGIN_2 +249 0x0080 //RX_FDDRC_BAND_MARGIN_3 +250 0x0007 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x5000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x6400 //RX_FDDRC_THRD_3_2 +258 0x6400 //RX_FDDRC_THRD_3_3 +259 0x2000 //RX_FDDRC_SLANT_0_0 +260 0x2000 //RX_FDDRC_SLANT_0_1 +261 0x2000 //RX_FDDRC_SLANT_0_2 +262 0x2000 //RX_FDDRC_SLANT_0_3 +263 0x5333 //RX_FDDRC_SLANT_1_0 +264 0x5333 //RX_FDDRC_SLANT_1_1 +265 0x5333 //RX_FDDRC_SLANT_1_2 +266 0x5333 //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +268 0x0002 //RX_FILTINDX +269 0x0000 //RX_TDDRC_THRD_0 +270 0x0000 //RX_TDDRC_THRD_1 +271 0x1800 //RX_TDDRC_THRD_2 +272 0x1800 //RX_TDDRC_THRD_3 +273 0x3000 //RX_TDDRC_SLANT_0 +274 0x6E00 //RX_TDDRC_SLANT_1 +275 0x1000 //RX_TDDRC_ALPHA_UP_0 +276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x199A //RX_TDDRC_HMNC_GAIN +279 0x0001 //RX_TDDRC_SMT_FLAG +280 0x0CCD //RX_TDDRC_SMT_W +281 0x02FD //RX_TDDRC_DRC_GAIN +282 0x7C00 //RX_LAMBDA_PKA_FP +283 0x2000 //RX_TPKA_FP +284 0x2000 //RX_MIN_G_FP +285 0x0080 //RX_MAX_G_FP +286 0x000D //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 +288 0x0000 //RX_MAXLEVEL_CNG +289 0x3000 //RX_BWE_UV_TH +290 0x3000 //RX_BWE_UV_TH2 +291 0x1800 //RX_BWE_UV_TH3 +292 0x1000 //RX_BWE_V_TH +293 0x04CD //RX_BWE_GAIN1_V_TH1 +294 0x0F33 //RX_BWE_GAIN1_V_TH2 +295 0x7333 //RX_BWE_UV_EQ +296 0x199A //RX_BWE_V_EQ +297 0x7333 //RX_BWE_TONE_TH +298 0x0004 //RX_BWE_UV_HOLD_T +299 0x6CCD //RX_BWE_GAIN2_ALPHA +300 0x799A //RX_BWE_GAIN3_ALPHA +301 0x001E //RX_BWE_CUTOFF +302 0x3000 //RX_BWE_GAINFILL +303 0x3200 //RX_BWE_MAXTH_TONE +304 0x2000 //RX_BWE_EQ_0 +305 0x2000 //RX_BWE_EQ_1 +306 0x2000 //RX_BWE_EQ_2 +307 0x2000 //RX_BWE_EQ_3 +308 0x2000 //RX_BWE_EQ_4 +309 0x2000 //RX_BWE_EQ_5 +310 0x2000 //RX_BWE_EQ_6 +311 0x0000 //RX_BWE_RESRV_0 +312 0x0000 //RX_BWE_RESRV_1 +313 0x0000 //RX_BWE_RESRV_2 +#VOL 0 +163 0x1000 //RX_TDDRC_ALPHA_UP_1 +164 0x1000 //RX_TDDRC_ALPHA_UP_2 +165 0x1000 //RX_TDDRC_ALPHA_UP_3 +166 0x1000 //RX_TDDRC_ALPHA_UP_4 +184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +190 0x7000 //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +269 0x0000 //RX_TDDRC_THRD_0 +270 0x0000 //RX_TDDRC_THRD_1 +271 0x1800 //RX_TDDRC_THRD_2 +272 0x1800 //RX_TDDRC_THRD_3 +273 0x3000 //RX_TDDRC_SLANT_0 +274 0x6E00 //RX_TDDRC_SLANT_1 +275 0x1000 //RX_TDDRC_ALPHA_UP_0 +276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x199A //RX_TDDRC_HMNC_GAIN +279 0x0001 //RX_TDDRC_SMT_FLAG +280 0x0CCD //RX_TDDRC_SMT_W +281 0x02FD //RX_TDDRC_DRC_GAIN +195 0x0020 //RX_FDEQ_SUBNUM +196 0x4E4E //RX_FDEQ_GAIN_0 +197 0x4E56 //RX_FDEQ_GAIN_1 +198 0x6878 //RX_FDEQ_GAIN_2 +199 0x8088 //RX_FDEQ_GAIN_3 +200 0x848B //RX_FDEQ_GAIN_4 +201 0x8F8E //RX_FDEQ_GAIN_5 +202 0x9494 //RX_FDEQ_GAIN_6 +203 0x96A0 //RX_FDEQ_GAIN_7 +204 0xB8A0 //RX_FDEQ_GAIN_8 +205 0xA99D //RX_FDEQ_GAIN_9 +206 0x9D6A //RX_FDEQ_GAIN_10 +207 0x626B //RX_FDEQ_GAIN_11 +208 0x6C78 //RX_FDEQ_GAIN_12 +209 0x7884 //RX_FDEQ_GAIN_13 +210 0x9098 //RX_FDEQ_GAIN_14 +211 0x9CAC //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0202 //RX_FDEQ_BIN_0 +221 0x0202 //RX_FDEQ_BIN_1 +222 0x0302 //RX_FDEQ_BIN_2 +223 0x0304 //RX_FDEQ_BIN_3 +224 0x0405 //RX_FDEQ_BIN_4 +225 0x0506 //RX_FDEQ_BIN_5 +226 0x0708 //RX_FDEQ_BIN_6 +227 0x090A //RX_FDEQ_BIN_7 +228 0x0B0C //RX_FDEQ_BIN_8 +229 0x0D0E //RX_FDEQ_BIN_9 +230 0x1013 //RX_FDEQ_BIN_10 +231 0x1719 //RX_FDEQ_BIN_11 +232 0x1B1E //RX_FDEQ_BIN_12 +233 0x1E1E //RX_FDEQ_BIN_13 +234 0x1E28 //RX_FDEQ_BIN_14 +235 0x282C //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x4000 //RX_FDEQ_RESRV_0 +245 0x0320 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0030 //RX_FDDRC_BAND_MARGIN_1 +248 0x0050 //RX_FDDRC_BAND_MARGIN_2 +249 0x0080 //RX_FDDRC_BAND_MARGIN_3 +250 0x0007 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x5000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x6400 //RX_FDDRC_THRD_3_2 +258 0x6400 //RX_FDDRC_THRD_3_3 +259 0x2000 //RX_FDDRC_SLANT_0_0 +260 0x2000 //RX_FDDRC_SLANT_0_1 +261 0x2000 //RX_FDDRC_SLANT_0_2 +262 0x2000 //RX_FDDRC_SLANT_0_3 +263 0x5333 //RX_FDDRC_SLANT_1_0 +264 0x5333 //RX_FDDRC_SLANT_1_1 +265 0x5333 //RX_FDDRC_SLANT_1_2 +266 0x5333 //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +286 0x000D //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 +#VOL 1 +163 0x1000 //RX_TDDRC_ALPHA_UP_1 +164 0x1000 //RX_TDDRC_ALPHA_UP_2 +165 0x1000 //RX_TDDRC_ALPHA_UP_3 +166 0x1000 //RX_TDDRC_ALPHA_UP_4 +184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +190 0x7000 //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +269 0x0000 //RX_TDDRC_THRD_0 +270 0x0000 //RX_TDDRC_THRD_1 +271 0x1800 //RX_TDDRC_THRD_2 +272 0x1800 //RX_TDDRC_THRD_3 +273 0x3000 //RX_TDDRC_SLANT_0 +274 0x6E00 //RX_TDDRC_SLANT_1 +275 0x1000 //RX_TDDRC_ALPHA_UP_0 +276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x199A //RX_TDDRC_HMNC_GAIN +279 0x0001 //RX_TDDRC_SMT_FLAG +280 0x0CCD //RX_TDDRC_SMT_W +281 0x02FD //RX_TDDRC_DRC_GAIN +195 0x0020 //RX_FDEQ_SUBNUM +196 0x4E4E //RX_FDEQ_GAIN_0 +197 0x4E56 //RX_FDEQ_GAIN_1 +198 0x6878 //RX_FDEQ_GAIN_2 +199 0x8088 //RX_FDEQ_GAIN_3 +200 0x848B //RX_FDEQ_GAIN_4 +201 0x8F8E //RX_FDEQ_GAIN_5 +202 0x9494 //RX_FDEQ_GAIN_6 +203 0x96A0 //RX_FDEQ_GAIN_7 +204 0xB8A0 //RX_FDEQ_GAIN_8 +205 0xA99D //RX_FDEQ_GAIN_9 +206 0x9D6A //RX_FDEQ_GAIN_10 +207 0x626B //RX_FDEQ_GAIN_11 +208 0x6C78 //RX_FDEQ_GAIN_12 +209 0x7884 //RX_FDEQ_GAIN_13 +210 0x9098 //RX_FDEQ_GAIN_14 +211 0x9CAC //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0202 //RX_FDEQ_BIN_0 +221 0x0202 //RX_FDEQ_BIN_1 +222 0x0302 //RX_FDEQ_BIN_2 +223 0x0304 //RX_FDEQ_BIN_3 +224 0x0405 //RX_FDEQ_BIN_4 +225 0x0506 //RX_FDEQ_BIN_5 +226 0x0708 //RX_FDEQ_BIN_6 +227 0x090A //RX_FDEQ_BIN_7 +228 0x0B0C //RX_FDEQ_BIN_8 +229 0x0D0E //RX_FDEQ_BIN_9 +230 0x1013 //RX_FDEQ_BIN_10 +231 0x1719 //RX_FDEQ_BIN_11 +232 0x1B1E //RX_FDEQ_BIN_12 +233 0x1E1E //RX_FDEQ_BIN_13 +234 0x1E28 //RX_FDEQ_BIN_14 +235 0x282C //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x4000 //RX_FDEQ_RESRV_0 +245 0x0320 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0030 //RX_FDDRC_BAND_MARGIN_1 +248 0x0050 //RX_FDDRC_BAND_MARGIN_2 +249 0x0080 //RX_FDDRC_BAND_MARGIN_3 +250 0x0007 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x5000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x6400 //RX_FDDRC_THRD_3_2 +258 0x6400 //RX_FDDRC_THRD_3_3 +259 0x2000 //RX_FDDRC_SLANT_0_0 +260 0x2000 //RX_FDDRC_SLANT_0_1 +261 0x2000 //RX_FDDRC_SLANT_0_2 +262 0x2000 //RX_FDDRC_SLANT_0_3 +263 0x5333 //RX_FDDRC_SLANT_1_0 +264 0x5333 //RX_FDDRC_SLANT_1_1 +265 0x5333 //RX_FDDRC_SLANT_1_2 +266 0x5333 //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +286 0x0016 //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 +#VOL 2 +163 0x1000 //RX_TDDRC_ALPHA_UP_1 +164 0x1000 //RX_TDDRC_ALPHA_UP_2 +165 0x1000 //RX_TDDRC_ALPHA_UP_3 +166 0x1000 //RX_TDDRC_ALPHA_UP_4 +184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +190 0x7000 //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +269 0x0000 //RX_TDDRC_THRD_0 +270 0x0000 //RX_TDDRC_THRD_1 +271 0x1800 //RX_TDDRC_THRD_2 +272 0x1800 //RX_TDDRC_THRD_3 +273 0x3000 //RX_TDDRC_SLANT_0 +274 0x6E00 //RX_TDDRC_SLANT_1 +275 0x1000 //RX_TDDRC_ALPHA_UP_0 +276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x199A //RX_TDDRC_HMNC_GAIN +279 0x0001 //RX_TDDRC_SMT_FLAG +280 0x0CCD //RX_TDDRC_SMT_W +281 0x02FD //RX_TDDRC_DRC_GAIN +195 0x0020 //RX_FDEQ_SUBNUM +196 0x4E4E //RX_FDEQ_GAIN_0 +197 0x4E56 //RX_FDEQ_GAIN_1 +198 0x6878 //RX_FDEQ_GAIN_2 +199 0x8088 //RX_FDEQ_GAIN_3 +200 0x848B //RX_FDEQ_GAIN_4 +201 0x8F8E //RX_FDEQ_GAIN_5 +202 0x9494 //RX_FDEQ_GAIN_6 +203 0x96A0 //RX_FDEQ_GAIN_7 +204 0xB8A0 //RX_FDEQ_GAIN_8 +205 0xA99D //RX_FDEQ_GAIN_9 +206 0x9D6A //RX_FDEQ_GAIN_10 +207 0x626B //RX_FDEQ_GAIN_11 +208 0x6C78 //RX_FDEQ_GAIN_12 +209 0x7884 //RX_FDEQ_GAIN_13 +210 0x9098 //RX_FDEQ_GAIN_14 +211 0x9CAC //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0202 //RX_FDEQ_BIN_0 +221 0x0202 //RX_FDEQ_BIN_1 +222 0x0302 //RX_FDEQ_BIN_2 +223 0x0304 //RX_FDEQ_BIN_3 +224 0x0405 //RX_FDEQ_BIN_4 +225 0x0506 //RX_FDEQ_BIN_5 +226 0x0708 //RX_FDEQ_BIN_6 +227 0x090A //RX_FDEQ_BIN_7 +228 0x0B0C //RX_FDEQ_BIN_8 +229 0x0D0E //RX_FDEQ_BIN_9 +230 0x1013 //RX_FDEQ_BIN_10 +231 0x1719 //RX_FDEQ_BIN_11 +232 0x1B1E //RX_FDEQ_BIN_12 +233 0x1E1E //RX_FDEQ_BIN_13 +234 0x1E28 //RX_FDEQ_BIN_14 +235 0x282C //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x4000 //RX_FDEQ_RESRV_0 +245 0x0320 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0030 //RX_FDDRC_BAND_MARGIN_1 +248 0x0050 //RX_FDDRC_BAND_MARGIN_2 +249 0x0080 //RX_FDDRC_BAND_MARGIN_3 +250 0x0007 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x5000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x6400 //RX_FDDRC_THRD_3_2 +258 0x6400 //RX_FDDRC_THRD_3_3 +259 0x2000 //RX_FDDRC_SLANT_0_0 +260 0x2000 //RX_FDDRC_SLANT_0_1 +261 0x2000 //RX_FDDRC_SLANT_0_2 +262 0x2000 //RX_FDDRC_SLANT_0_3 +263 0x5333 //RX_FDDRC_SLANT_1_0 +264 0x5333 //RX_FDDRC_SLANT_1_1 +265 0x5333 //RX_FDDRC_SLANT_1_2 +266 0x5333 //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +286 0x0024 //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 +#VOL 3 +163 0x1000 //RX_TDDRC_ALPHA_UP_1 +164 0x1000 //RX_TDDRC_ALPHA_UP_2 +165 0x1000 //RX_TDDRC_ALPHA_UP_3 +166 0x1000 //RX_TDDRC_ALPHA_UP_4 +184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +190 0x7000 //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +269 0x0000 //RX_TDDRC_THRD_0 +270 0x0000 //RX_TDDRC_THRD_1 +271 0x1800 //RX_TDDRC_THRD_2 +272 0x1800 //RX_TDDRC_THRD_3 +273 0x3000 //RX_TDDRC_SLANT_0 +274 0x6E00 //RX_TDDRC_SLANT_1 +275 0x1000 //RX_TDDRC_ALPHA_UP_0 +276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x199A //RX_TDDRC_HMNC_GAIN +279 0x0001 //RX_TDDRC_SMT_FLAG +280 0x0CCD //RX_TDDRC_SMT_W +281 0x02FD //RX_TDDRC_DRC_GAIN +195 0x0020 //RX_FDEQ_SUBNUM +196 0x4E4E //RX_FDEQ_GAIN_0 +197 0x4E56 //RX_FDEQ_GAIN_1 +198 0x6878 //RX_FDEQ_GAIN_2 +199 0x8088 //RX_FDEQ_GAIN_3 +200 0x848B //RX_FDEQ_GAIN_4 +201 0x8F8E //RX_FDEQ_GAIN_5 +202 0x9494 //RX_FDEQ_GAIN_6 +203 0x96A0 //RX_FDEQ_GAIN_7 +204 0xB8A0 //RX_FDEQ_GAIN_8 +205 0xA99D //RX_FDEQ_GAIN_9 +206 0x9D6A //RX_FDEQ_GAIN_10 +207 0x626B //RX_FDEQ_GAIN_11 +208 0x6C78 //RX_FDEQ_GAIN_12 +209 0x7884 //RX_FDEQ_GAIN_13 +210 0x9098 //RX_FDEQ_GAIN_14 +211 0x9CAC //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0202 //RX_FDEQ_BIN_0 +221 0x0202 //RX_FDEQ_BIN_1 +222 0x0302 //RX_FDEQ_BIN_2 +223 0x0304 //RX_FDEQ_BIN_3 +224 0x0405 //RX_FDEQ_BIN_4 +225 0x0506 //RX_FDEQ_BIN_5 +226 0x0708 //RX_FDEQ_BIN_6 +227 0x090A //RX_FDEQ_BIN_7 +228 0x0B0C //RX_FDEQ_BIN_8 +229 0x0D0E //RX_FDEQ_BIN_9 +230 0x1013 //RX_FDEQ_BIN_10 +231 0x1719 //RX_FDEQ_BIN_11 +232 0x1B1E //RX_FDEQ_BIN_12 +233 0x1E1E //RX_FDEQ_BIN_13 +234 0x1E28 //RX_FDEQ_BIN_14 +235 0x282C //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x4000 //RX_FDEQ_RESRV_0 +245 0x0320 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0030 //RX_FDDRC_BAND_MARGIN_1 +248 0x0050 //RX_FDDRC_BAND_MARGIN_2 +249 0x0080 //RX_FDDRC_BAND_MARGIN_3 +250 0x0007 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x5000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x6400 //RX_FDDRC_THRD_3_2 +258 0x6400 //RX_FDDRC_THRD_3_3 +259 0x2000 //RX_FDDRC_SLANT_0_0 +260 0x2000 //RX_FDDRC_SLANT_0_1 +261 0x2000 //RX_FDDRC_SLANT_0_2 +262 0x2000 //RX_FDDRC_SLANT_0_3 +263 0x5333 //RX_FDDRC_SLANT_1_0 +264 0x5333 //RX_FDDRC_SLANT_1_1 +265 0x5333 //RX_FDDRC_SLANT_1_2 +266 0x5333 //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +286 0x003A //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 +#VOL 4 +163 0x1000 //RX_TDDRC_ALPHA_UP_1 +164 0x1000 //RX_TDDRC_ALPHA_UP_2 +165 0x1000 //RX_TDDRC_ALPHA_UP_3 +166 0x1000 //RX_TDDRC_ALPHA_UP_4 +184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +190 0x7000 //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +269 0x0000 //RX_TDDRC_THRD_0 +270 0x0000 //RX_TDDRC_THRD_1 +271 0x1800 //RX_TDDRC_THRD_2 +272 0x1800 //RX_TDDRC_THRD_3 +273 0x3000 //RX_TDDRC_SLANT_0 +274 0x6E00 //RX_TDDRC_SLANT_1 +275 0x1000 //RX_TDDRC_ALPHA_UP_0 +276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x199A //RX_TDDRC_HMNC_GAIN +279 0x0001 //RX_TDDRC_SMT_FLAG +280 0x0CCD //RX_TDDRC_SMT_W +281 0x02FD //RX_TDDRC_DRC_GAIN +195 0x0020 //RX_FDEQ_SUBNUM +196 0x4E4E //RX_FDEQ_GAIN_0 +197 0x4E56 //RX_FDEQ_GAIN_1 +198 0x6878 //RX_FDEQ_GAIN_2 +199 0x8088 //RX_FDEQ_GAIN_3 +200 0x848B //RX_FDEQ_GAIN_4 +201 0x8F8E //RX_FDEQ_GAIN_5 +202 0x9494 //RX_FDEQ_GAIN_6 +203 0x96A0 //RX_FDEQ_GAIN_7 +204 0xB8A0 //RX_FDEQ_GAIN_8 +205 0xA99D //RX_FDEQ_GAIN_9 +206 0x9D6A //RX_FDEQ_GAIN_10 +207 0x626B //RX_FDEQ_GAIN_11 +208 0x6C78 //RX_FDEQ_GAIN_12 +209 0x7884 //RX_FDEQ_GAIN_13 +210 0x9098 //RX_FDEQ_GAIN_14 +211 0x9CAC //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0202 //RX_FDEQ_BIN_0 +221 0x0202 //RX_FDEQ_BIN_1 +222 0x0302 //RX_FDEQ_BIN_2 +223 0x0304 //RX_FDEQ_BIN_3 +224 0x0405 //RX_FDEQ_BIN_4 +225 0x0506 //RX_FDEQ_BIN_5 +226 0x0708 //RX_FDEQ_BIN_6 +227 0x090A //RX_FDEQ_BIN_7 +228 0x0B0C //RX_FDEQ_BIN_8 +229 0x0D0E //RX_FDEQ_BIN_9 +230 0x1013 //RX_FDEQ_BIN_10 +231 0x1719 //RX_FDEQ_BIN_11 +232 0x1B1E //RX_FDEQ_BIN_12 +233 0x1E1E //RX_FDEQ_BIN_13 +234 0x1E28 //RX_FDEQ_BIN_14 +235 0x282C //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x4000 //RX_FDEQ_RESRV_0 +245 0x0320 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0030 //RX_FDDRC_BAND_MARGIN_1 +248 0x0050 //RX_FDDRC_BAND_MARGIN_2 +249 0x0080 //RX_FDDRC_BAND_MARGIN_3 +250 0x0007 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x5000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x6400 //RX_FDDRC_THRD_3_2 +258 0x6400 //RX_FDDRC_THRD_3_3 +259 0x2000 //RX_FDDRC_SLANT_0_0 +260 0x2000 //RX_FDDRC_SLANT_0_1 +261 0x2000 //RX_FDDRC_SLANT_0_2 +262 0x2000 //RX_FDDRC_SLANT_0_3 +263 0x5333 //RX_FDDRC_SLANT_1_0 +264 0x5333 //RX_FDDRC_SLANT_1_1 +265 0x5333 //RX_FDDRC_SLANT_1_2 +266 0x5333 //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +286 0x0059 //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 +#VOL 5 +163 0x1000 //RX_TDDRC_ALPHA_UP_1 +164 0x1000 //RX_TDDRC_ALPHA_UP_2 +165 0x1000 //RX_TDDRC_ALPHA_UP_3 +166 0x1000 //RX_TDDRC_ALPHA_UP_4 +184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +190 0x7000 //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +269 0x0000 //RX_TDDRC_THRD_0 +270 0x0000 //RX_TDDRC_THRD_1 +271 0x1800 //RX_TDDRC_THRD_2 +272 0x1800 //RX_TDDRC_THRD_3 +273 0x3000 //RX_TDDRC_SLANT_0 +274 0x6E00 //RX_TDDRC_SLANT_1 +275 0x1000 //RX_TDDRC_ALPHA_UP_0 +276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x199A //RX_TDDRC_HMNC_GAIN +279 0x0001 //RX_TDDRC_SMT_FLAG +280 0x0CCD //RX_TDDRC_SMT_W +281 0x02FD //RX_TDDRC_DRC_GAIN +195 0x0020 //RX_FDEQ_SUBNUM +196 0x4E4E //RX_FDEQ_GAIN_0 +197 0x4E56 //RX_FDEQ_GAIN_1 +198 0x6878 //RX_FDEQ_GAIN_2 +199 0x8088 //RX_FDEQ_GAIN_3 +200 0x848B //RX_FDEQ_GAIN_4 +201 0x8F8E //RX_FDEQ_GAIN_5 +202 0x9494 //RX_FDEQ_GAIN_6 +203 0x96A0 //RX_FDEQ_GAIN_7 +204 0xB8A0 //RX_FDEQ_GAIN_8 +205 0xA99D //RX_FDEQ_GAIN_9 +206 0x9D6A //RX_FDEQ_GAIN_10 +207 0x626B //RX_FDEQ_GAIN_11 +208 0x6C78 //RX_FDEQ_GAIN_12 +209 0x7884 //RX_FDEQ_GAIN_13 +210 0x9098 //RX_FDEQ_GAIN_14 +211 0x9CAC //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0202 //RX_FDEQ_BIN_0 +221 0x0202 //RX_FDEQ_BIN_1 +222 0x0302 //RX_FDEQ_BIN_2 +223 0x0304 //RX_FDEQ_BIN_3 +224 0x0405 //RX_FDEQ_BIN_4 +225 0x0506 //RX_FDEQ_BIN_5 +226 0x0708 //RX_FDEQ_BIN_6 +227 0x090A //RX_FDEQ_BIN_7 +228 0x0B0C //RX_FDEQ_BIN_8 +229 0x0D0E //RX_FDEQ_BIN_9 +230 0x1013 //RX_FDEQ_BIN_10 +231 0x1719 //RX_FDEQ_BIN_11 +232 0x1B1E //RX_FDEQ_BIN_12 +233 0x1E1E //RX_FDEQ_BIN_13 +234 0x1E28 //RX_FDEQ_BIN_14 +235 0x282C //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x4000 //RX_FDEQ_RESRV_0 +245 0x0320 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0030 //RX_FDDRC_BAND_MARGIN_1 +248 0x0050 //RX_FDDRC_BAND_MARGIN_2 +249 0x0080 //RX_FDDRC_BAND_MARGIN_3 +250 0x0007 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x5000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x6400 //RX_FDDRC_THRD_3_2 +258 0x6400 //RX_FDDRC_THRD_3_3 +259 0x2000 //RX_FDDRC_SLANT_0_0 +260 0x2000 //RX_FDDRC_SLANT_0_1 +261 0x2000 //RX_FDDRC_SLANT_0_2 +262 0x2000 //RX_FDDRC_SLANT_0_3 +263 0x5333 //RX_FDDRC_SLANT_1_0 +264 0x5333 //RX_FDDRC_SLANT_1_1 +265 0x5333 //RX_FDDRC_SLANT_1_2 +266 0x5333 //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +286 0x0090 //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 +#VOL 6 +163 0x1000 //RX_TDDRC_ALPHA_UP_1 +164 0x1000 //RX_TDDRC_ALPHA_UP_2 +165 0x1000 //RX_TDDRC_ALPHA_UP_3 +166 0x1000 //RX_TDDRC_ALPHA_UP_4 +184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +190 0x7000 //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +269 0x0000 //RX_TDDRC_THRD_0 +270 0x0000 //RX_TDDRC_THRD_1 +271 0x1800 //RX_TDDRC_THRD_2 +272 0x1800 //RX_TDDRC_THRD_3 +273 0x3000 //RX_TDDRC_SLANT_0 +274 0x6E00 //RX_TDDRC_SLANT_1 +275 0x1000 //RX_TDDRC_ALPHA_UP_0 +276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x199A //RX_TDDRC_HMNC_GAIN +279 0x0001 //RX_TDDRC_SMT_FLAG +280 0x0CCD //RX_TDDRC_SMT_W +281 0x02FD //RX_TDDRC_DRC_GAIN +195 0x0020 //RX_FDEQ_SUBNUM +196 0x4E4E //RX_FDEQ_GAIN_0 +197 0x4E56 //RX_FDEQ_GAIN_1 +198 0x6878 //RX_FDEQ_GAIN_2 +199 0x8088 //RX_FDEQ_GAIN_3 +200 0x848B //RX_FDEQ_GAIN_4 +201 0x8F8E //RX_FDEQ_GAIN_5 +202 0x9494 //RX_FDEQ_GAIN_6 +203 0x96A0 //RX_FDEQ_GAIN_7 +204 0xB8A0 //RX_FDEQ_GAIN_8 +205 0xA99D //RX_FDEQ_GAIN_9 +206 0x9D6A //RX_FDEQ_GAIN_10 +207 0x626B //RX_FDEQ_GAIN_11 +208 0x6C78 //RX_FDEQ_GAIN_12 +209 0x7884 //RX_FDEQ_GAIN_13 +210 0x9098 //RX_FDEQ_GAIN_14 +211 0x9CAC //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0202 //RX_FDEQ_BIN_0 +221 0x0202 //RX_FDEQ_BIN_1 +222 0x0302 //RX_FDEQ_BIN_2 +223 0x0304 //RX_FDEQ_BIN_3 +224 0x0405 //RX_FDEQ_BIN_4 +225 0x0506 //RX_FDEQ_BIN_5 +226 0x0708 //RX_FDEQ_BIN_6 +227 0x090A //RX_FDEQ_BIN_7 +228 0x0B0C //RX_FDEQ_BIN_8 +229 0x0D0E //RX_FDEQ_BIN_9 +230 0x1013 //RX_FDEQ_BIN_10 +231 0x1719 //RX_FDEQ_BIN_11 +232 0x1B1E //RX_FDEQ_BIN_12 +233 0x1E1E //RX_FDEQ_BIN_13 +234 0x1E28 //RX_FDEQ_BIN_14 +235 0x282C //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x4000 //RX_FDEQ_RESRV_0 +245 0x0320 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0030 //RX_FDDRC_BAND_MARGIN_1 +248 0x0050 //RX_FDDRC_BAND_MARGIN_2 +249 0x0080 //RX_FDDRC_BAND_MARGIN_3 +250 0x0007 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x5000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x6400 //RX_FDDRC_THRD_3_2 +258 0x6400 //RX_FDDRC_THRD_3_3 +259 0x2000 //RX_FDDRC_SLANT_0_0 +260 0x2000 //RX_FDDRC_SLANT_0_1 +261 0x2000 //RX_FDDRC_SLANT_0_2 +262 0x2000 //RX_FDDRC_SLANT_0_3 +263 0x5333 //RX_FDDRC_SLANT_1_0 +264 0x5333 //RX_FDDRC_SLANT_1_1 +265 0x5333 //RX_FDDRC_SLANT_1_2 +266 0x5333 //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +286 0x0100 //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 #CASE_NAME HANDSET-HANDSET-CUSTOM1-FB -#PARAM_TYPE TX+RX -#TOTAL_CUSTOM_STEP 7 +#PARAM_MODE FULL +#PARAM_TYPE TX+2RX +#TOTAL_CUSTOM_STEP 7+7 #TX 0 0x0000 //TX_OPERATION_MODE_0 1 0x0000 //TX_OPERATION_MODE_1 @@ -3534,7 +5369,7 @@ 18 0x0000 //TX_SYS_RESRV_2 19 0x0000 //TX_SYS_RESRV_3 20 0x0000 //TX_DIST2REF0 -21 0x009D //TX_DIST2REF1 +21 0x00A4 //TX_DIST2REF1 22 0x0000 //TX_DIST2REF_02 23 0x0000 //TX_DIST2REF_03 24 0x0000 //TX_DIST2REF_04 @@ -3764,12 +5599,12 @@ 248 0xF800 //TX_THR_SN_EST_6 249 0xF700 //TX_THR_SN_EST_7 250 0x0000 //TX_DELTA_THR_SN_EST_0 -251 0x0100 //TX_DELTA_THR_SN_EST_1 +251 0x0200 //TX_DELTA_THR_SN_EST_1 252 0x0200 //TX_DELTA_THR_SN_EST_2 253 0x0200 //TX_DELTA_THR_SN_EST_3 -254 0x0200 //TX_DELTA_THR_SN_EST_4 -255 0x0100 //TX_DELTA_THR_SN_EST_5 -256 0x0200 //TX_DELTA_THR_SN_EST_6 +254 0x0100 //TX_DELTA_THR_SN_EST_4 +255 0x0200 //TX_DELTA_THR_SN_EST_5 +256 0x0100 //TX_DELTA_THR_SN_EST_6 257 0x0200 //TX_DELTA_THR_SN_EST_7 258 0x4000 //TX_LAMBDA_NN_EST_0 259 0x4000 //TX_LAMBDA_NN_EST_1 @@ -3797,16 +5632,16 @@ 281 0x0014 //TX_NS_LVL_CTRL_0 282 0x0016 //TX_NS_LVL_CTRL_1 283 0x0016 //TX_NS_LVL_CTRL_2 -284 0x0016 //TX_NS_LVL_CTRL_3 -285 0x0018 //TX_NS_LVL_CTRL_4 -286 0x0016 //TX_NS_LVL_CTRL_5 -287 0x0012 //TX_NS_LVL_CTRL_6 +284 0x0018 //TX_NS_LVL_CTRL_3 +285 0x0016 //TX_NS_LVL_CTRL_4 +286 0x0012 //TX_NS_LVL_CTRL_5 +287 0x0016 //TX_NS_LVL_CTRL_6 288 0x0017 //TX_NS_LVL_CTRL_7 289 0x000E //TX_MIN_GAIN_S_0 -290 0x0012 //TX_MIN_GAIN_S_1 -291 0x0007 //TX_MIN_GAIN_S_2 -292 0x0012 //TX_MIN_GAIN_S_3 -293 0x0010 //TX_MIN_GAIN_S_4 +290 0x0007 //TX_MIN_GAIN_S_1 +291 0x0012 //TX_MIN_GAIN_S_2 +292 0x0010 //TX_MIN_GAIN_S_3 +293 0x0012 //TX_MIN_GAIN_S_4 294 0x0012 //TX_MIN_GAIN_S_5 295 0x0012 //TX_MIN_GAIN_S_6 296 0x0012 //TX_MIN_GAIN_S_7 @@ -3828,29 +5663,29 @@ 312 0x7FFF //TX_A_POST_FILT_0 313 0x2000 //TX_A_POST_FILT_1 314 0x4000 //TX_A_POST_FILT_S_0 -315 0x5000 //TX_A_POST_FILT_S_1 +315 0x4000 //TX_A_POST_FILT_S_1 316 0x4000 //TX_A_POST_FILT_S_2 317 0x4000 //TX_A_POST_FILT_S_3 318 0x4000 //TX_A_POST_FILT_S_4 319 0x4000 //TX_A_POST_FILT_S_5 -320 0x4000 //TX_A_POST_FILT_S_6 +320 0x5000 //TX_A_POST_FILT_S_6 321 0x7000 //TX_A_POST_FILT_S_7 322 0x1000 //TX_B_POST_FILT_0 323 0x2000 //TX_B_POST_FILT_1 -324 0x3000 //TX_B_POST_FILT_2 +324 0x2000 //TX_B_POST_FILT_2 325 0x2000 //TX_B_POST_FILT_3 -326 0x5000 //TX_B_POST_FILT_4 +326 0x2000 //TX_B_POST_FILT_4 327 0x2000 //TX_B_POST_FILT_5 -328 0x6000 //TX_B_POST_FILT_6 +328 0x3000 //TX_B_POST_FILT_6 329 0x3000 //TX_B_POST_FILT_7 330 0x1000 //TX_B_LESSCUT_RTO_S_0 -331 0x6000 //TX_B_LESSCUT_RTO_S_1 -332 0x6000 //TX_B_LESSCUT_RTO_S_2 -333 0x6000 //TX_B_LESSCUT_RTO_S_3 -334 0x6000 //TX_B_LESSCUT_RTO_S_4 -335 0x6000 //TX_B_LESSCUT_RTO_S_5 -336 0x7FFF //TX_B_LESSCUT_RTO_S_6 -337 0x7FFF //TX_B_LESSCUT_RTO_S_7 +331 0x1000 //TX_B_LESSCUT_RTO_S_1 +332 0x1000 //TX_B_LESSCUT_RTO_S_2 +333 0x1000 //TX_B_LESSCUT_RTO_S_3 +334 0x1000 //TX_B_LESSCUT_RTO_S_4 +335 0x1000 //TX_B_LESSCUT_RTO_S_5 +336 0x1000 //TX_B_LESSCUT_RTO_S_6 +337 0x1000 //TX_B_LESSCUT_RTO_S_7 338 0x7E14 //TX_LAMBDA_PFILT 339 0x7C29 //TX_LAMBDA_PFILT_S_0 340 0x7C29 //TX_LAMBDA_PFILT_S_1 @@ -3893,10 +5728,10 @@ 377 0x4E20 //TX_NOISE_TH_5_4 378 0x39DF //TX_NOISE_TH_6 379 0x0014 //TX_MINENOISE_TH -380 0x4000 //TX_MINENOISE_MIC0_TH_MTS -381 0xFFEE //TX_MINENOISE_MIC0_TH_EXP -382 0x6000 //TX_MINENOISE_MIC0_S_TH_MTS -383 0xFFF3 //TX_MINENOISE_MIC0_S_TH_EXP +380 0xD508 //TX_MORENS_TFMASK_TH +381 0x0001 //TX_DRC_QUIET_FLOOR +382 0x6D60 //TX_RATIODTL_CUT_TH +383 0x1482 //TX_DT_CUT_K1 384 0x00A5 //TX_OUT_ENER_S_TH_CLEAN 385 0x00A5 //TX_OUT_ENER_S_TH_LESSCLEAN 386 0x00A5 //TX_OUT_ENER_S_TH_NOISY @@ -3904,15 +5739,15 @@ 388 0x0200 //TX_OUT_ENER_TH_SPEECH 389 0x2000 //TX_SN_NPB_GAIN 390 0x0000 //TX_NN_NPB_GAIN -391 0x0000 //TX_CSX_ALPHA_0 -392 0x0000 //TX_CSX_ALPHA_1 -393 0x0000 //TX_CSX_ALPHA_2 -394 0x0000 //TX_CSX_ALPHA_3 -395 0x0800 //TX_MU_ARSP_EST -396 0x00C8 //TX_P_OUTBEAM_MIN_TH +391 0x3000 //TX_POST_MASK_SUP_HSNE +392 0x07D0 //TX_TAIL_DET_TH +393 0x4000 //TX_B_LESSCUT_RTO_WTA +394 0x0000 //TX_MEL_G_R +395 0x0080 //TX_SUPHIGH_TH +396 0x0000 //TX_MASK_G_R 397 0x0002 //TX_EXTRA_NS_L -398 0x0800 //TX_EXTRA_NS_A -399 0x0005 //TX_VR_NOISE_FLOOR_TH +398 0x1800 //TX_C_POST_FLT_MASK +399 0x7FFF //TX_A_POST_FLT_WNS 400 0x0148 //TX_MIN_G_LOW300HZ 401 0x0004 //TX_MAXLEVEL_CNG 402 0x00B4 //TX_STN_NOISE_TH @@ -4027,16 +5862,16 @@ 511 0x6666 //TX_MIC_TO_BFGAIN 512 0x0000 //TX_MICTOBFGAIN0 513 0x0000 //TX_FASTMUE_TH -514 0x0000 //TX_DERVB_LEN_0 -515 0x0000 //TX_DERVB_LEN_1 -516 0x0000 //TX_RHO_DERVB -517 0x0000 //TX_MIC_INDX_DERVB -518 0x0000 //TX_MU_DERVB -519 0x0000 //TX_DR_RESRV_0 -520 0x0000 //TX_DR_RESRV_1 -521 0x0000 //TX_DR_RESRV_2 -522 0x0000 //TX_DR_RESRV_3 -523 0x0000 //TX_DR_RESRV_4 +514 0x2CCC //TX_DEREVERB_LF_MU +515 0x3200 //TX_DEREVERB_HF_MU +516 0x0007 //TX_DEREVERB_DELAY +517 0x0004 //TX_DEREVERB_COEF_LEN +518 0x0003 //TX_DEREVERB_DNR +519 0x0000 //TX_DEREVERB_ALPHA +520 0x0000 //TX_DEREVERB_BETA +521 0x7FFF //TX_GSC_RTOL_TH +522 0x7FFF //TX_GSC_RTOH_TH +523 0x7E2C //TX_WIDE2_MEANHTH 524 0x0000 //TX_DR_RESRV_5 525 0x0000 //TX_DR_RESRV_6 526 0x0000 //TX_DR_RESRV_7 @@ -4080,24 +5915,24 @@ 564 0x0000 //TX_PB_RESRV_0 565 0x0000 //TX_PB_RESRV_1 566 0x0030 //TX_FDEQ_SUBNUM -567 0x504A //TX_FDEQ_GAIN_0 -568 0x4C54 //TX_FDEQ_GAIN_1 -569 0x554B //TX_FDEQ_GAIN_2 -570 0x4D4E //TX_FDEQ_GAIN_3 -571 0x4F4F //TX_FDEQ_GAIN_4 -572 0x4E51 //TX_FDEQ_GAIN_5 -573 0x5154 //TX_FDEQ_GAIN_6 -574 0x5456 //TX_FDEQ_GAIN_7 -575 0x5E66 //TX_FDEQ_GAIN_8 -576 0x675D //TX_FDEQ_GAIN_9 -577 0x5655 //TX_FDEQ_GAIN_10 -578 0x5956 //TX_FDEQ_GAIN_11 -579 0x5656 //TX_FDEQ_GAIN_12 -580 0x5953 //TX_FDEQ_GAIN_13 -581 0x575A //TX_FDEQ_GAIN_14 -582 0x5559 //TX_FDEQ_GAIN_15 -583 0x656E //TX_FDEQ_GAIN_16 -584 0x7B98 //TX_FDEQ_GAIN_17 +567 0x4C4A //TX_FDEQ_GAIN_0 +568 0x4B4F //TX_FDEQ_GAIN_1 +569 0x504B //TX_FDEQ_GAIN_2 +570 0x4A4C //TX_FDEQ_GAIN_3 +571 0x4A49 //TX_FDEQ_GAIN_4 +572 0x4F48 //TX_FDEQ_GAIN_5 +573 0x4A4E //TX_FDEQ_GAIN_6 +574 0x534E //TX_FDEQ_GAIN_7 +575 0x494F //TX_FDEQ_GAIN_8 +576 0x5E6E //TX_FDEQ_GAIN_9 +577 0x787A //TX_FDEQ_GAIN_10 +578 0x6A58 //TX_FDEQ_GAIN_11 +579 0x5051 //TX_FDEQ_GAIN_12 +580 0x5156 //TX_FDEQ_GAIN_13 +581 0x6168 //TX_FDEQ_GAIN_14 +582 0x7678 //TX_FDEQ_GAIN_15 +583 0x7A87 //TX_FDEQ_GAIN_16 +584 0x9898 //TX_FDEQ_GAIN_17 585 0x9898 //TX_FDEQ_GAIN_18 586 0x9848 //TX_FDEQ_GAIN_19 587 0x4848 //TX_FDEQ_GAIN_20 @@ -4136,15 +5971,15 @@ 620 0x4848 //TX_PREEQ_GAIN_MIC0_3 621 0x4848 //TX_PREEQ_GAIN_MIC0_4 622 0x4848 //TX_PREEQ_GAIN_MIC0_5 -623 0x4846 //TX_PREEQ_GAIN_MIC0_6 -624 0x4645 //TX_PREEQ_GAIN_MIC0_7 -625 0x4545 //TX_PREEQ_GAIN_MIC0_8 -626 0x4545 //TX_PREEQ_GAIN_MIC0_9 -627 0x4444 //TX_PREEQ_GAIN_MIC0_10 -628 0x4443 //TX_PREEQ_GAIN_MIC0_11 -629 0x4241 //TX_PREEQ_GAIN_MIC0_12 -630 0x3C3E //TX_PREEQ_GAIN_MIC0_13 -631 0x3E40 //TX_PREEQ_GAIN_MIC0_14 +623 0x4848 //TX_PREEQ_GAIN_MIC0_6 +624 0x4848 //TX_PREEQ_GAIN_MIC0_7 +625 0x4848 //TX_PREEQ_GAIN_MIC0_8 +626 0x4848 //TX_PREEQ_GAIN_MIC0_9 +627 0x4848 //TX_PREEQ_GAIN_MIC0_10 +628 0x4848 //TX_PREEQ_GAIN_MIC0_11 +629 0x4848 //TX_PREEQ_GAIN_MIC0_12 +630 0x4848 //TX_PREEQ_GAIN_MIC0_13 +631 0x4848 //TX_PREEQ_GAIN_MIC0_14 632 0x4848 //TX_PREEQ_GAIN_MIC0_15 633 0x4848 //TX_PREEQ_GAIN_MIC0_16 634 0x4848 //TX_PREEQ_GAIN_MIC0_17 @@ -4154,23 +5989,23 @@ 638 0x4848 //TX_PREEQ_GAIN_MIC0_21 639 0x4848 //TX_PREEQ_GAIN_MIC0_22 640 0x4848 //TX_PREEQ_GAIN_MIC0_23 -641 0x0202 //TX_PREEQ_BIN_MIC0_0 -642 0x0203 //TX_PREEQ_BIN_MIC0_1 -643 0x0303 //TX_PREEQ_BIN_MIC0_2 -644 0x0304 //TX_PREEQ_BIN_MIC0_3 -645 0x0405 //TX_PREEQ_BIN_MIC0_4 -646 0x0506 //TX_PREEQ_BIN_MIC0_5 -647 0x0808 //TX_PREEQ_BIN_MIC0_6 -648 0x0809 //TX_PREEQ_BIN_MIC0_7 -649 0x0A0A //TX_PREEQ_BIN_MIC0_8 -650 0x0C10 //TX_PREEQ_BIN_MIC0_9 -651 0x1013 //TX_PREEQ_BIN_MIC0_10 -652 0x1414 //TX_PREEQ_BIN_MIC0_11 -653 0x261E //TX_PREEQ_BIN_MIC0_12 -654 0x1E14 //TX_PREEQ_BIN_MIC0_13 -655 0x1414 //TX_PREEQ_BIN_MIC0_14 -656 0x2814 //TX_PREEQ_BIN_MIC0_15 -657 0x4000 //TX_PREEQ_BIN_MIC0_16 +641 0x1812 //TX_PREEQ_BIN_MIC0_0 +642 0x0A0A //TX_PREEQ_BIN_MIC0_1 +643 0x0808 //TX_PREEQ_BIN_MIC0_2 +644 0x080A //TX_PREEQ_BIN_MIC0_3 +645 0x0B09 //TX_PREEQ_BIN_MIC0_4 +646 0x0A06 //TX_PREEQ_BIN_MIC0_5 +647 0x0606 //TX_PREEQ_BIN_MIC0_6 +648 0x0605 //TX_PREEQ_BIN_MIC0_7 +649 0x050A //TX_PREEQ_BIN_MIC0_8 +650 0x1505 //TX_PREEQ_BIN_MIC0_9 +651 0x0506 //TX_PREEQ_BIN_MIC0_10 +652 0x0615 //TX_PREEQ_BIN_MIC0_11 +653 0x1516 //TX_PREEQ_BIN_MIC0_12 +654 0x2021 //TX_PREEQ_BIN_MIC0_13 +655 0x2021 //TX_PREEQ_BIN_MIC0_14 +656 0x2021 //TX_PREEQ_BIN_MIC0_15 +657 0x0800 //TX_PREEQ_BIN_MIC0_16 658 0x0000 //TX_PREEQ_BIN_MIC0_17 659 0x0000 //TX_PREEQ_BIN_MIC0_18 660 0x0000 //TX_PREEQ_BIN_MIC0_19 @@ -4185,17 +6020,17 @@ 669 0x4848 //TX_PREEQ_GAIN_MIC1_3 670 0x4848 //TX_PREEQ_GAIN_MIC1_4 671 0x4848 //TX_PREEQ_GAIN_MIC1_5 -672 0x4849 //TX_PREEQ_GAIN_MIC1_6 -673 0x4A4B //TX_PREEQ_GAIN_MIC1_7 -674 0x4C4B //TX_PREEQ_GAIN_MIC1_8 -675 0x4A48 //TX_PREEQ_GAIN_MIC1_9 -676 0x4B4C //TX_PREEQ_GAIN_MIC1_10 -677 0x4C4B //TX_PREEQ_GAIN_MIC1_11 -678 0x4838 //TX_PREEQ_GAIN_MIC1_12 -679 0x3858 //TX_PREEQ_GAIN_MIC1_13 -680 0x7060 //TX_PREEQ_GAIN_MIC1_14 -681 0x9870 //TX_PREEQ_GAIN_MIC1_15 -682 0x5848 //TX_PREEQ_GAIN_MIC1_16 +672 0x4A4C //TX_PREEQ_GAIN_MIC1_6 +673 0x4E50 //TX_PREEQ_GAIN_MIC1_7 +674 0x5456 //TX_PREEQ_GAIN_MIC1_8 +675 0x585C //TX_PREEQ_GAIN_MIC1_9 +676 0x5C64 //TX_PREEQ_GAIN_MIC1_10 +677 0x7478 //TX_PREEQ_GAIN_MIC1_11 +678 0x705C //TX_PREEQ_GAIN_MIC1_12 +679 0x4838 //TX_PREEQ_GAIN_MIC1_13 +680 0x3C70 //TX_PREEQ_GAIN_MIC1_14 +681 0x4848 //TX_PREEQ_GAIN_MIC1_15 +682 0x4848 //TX_PREEQ_GAIN_MIC1_16 683 0x4848 //TX_PREEQ_GAIN_MIC1_17 684 0x4848 //TX_PREEQ_GAIN_MIC1_18 685 0x4848 //TX_PREEQ_GAIN_MIC1_19 @@ -4209,17 +6044,17 @@ 693 0x0304 //TX_PREEQ_BIN_MIC1_3 694 0x0405 //TX_PREEQ_BIN_MIC1_4 695 0x0506 //TX_PREEQ_BIN_MIC1_5 -696 0x0808 //TX_PREEQ_BIN_MIC1_6 -697 0x0809 //TX_PREEQ_BIN_MIC1_7 -698 0x0A0A //TX_PREEQ_BIN_MIC1_8 +696 0x0708 //TX_PREEQ_BIN_MIC1_6 +697 0x0909 //TX_PREEQ_BIN_MIC1_7 +698 0x090B //TX_PREEQ_BIN_MIC1_8 699 0x0C10 //TX_PREEQ_BIN_MIC1_9 700 0x1013 //TX_PREEQ_BIN_MIC1_10 701 0x1414 //TX_PREEQ_BIN_MIC1_11 -702 0x261E //TX_PREEQ_BIN_MIC1_12 -703 0x1E14 //TX_PREEQ_BIN_MIC1_13 -704 0x1414 //TX_PREEQ_BIN_MIC1_14 -705 0x2814 //TX_PREEQ_BIN_MIC1_15 -706 0x4000 //TX_PREEQ_BIN_MIC1_16 +702 0x1414 //TX_PREEQ_BIN_MIC1_12 +703 0x1C1E //TX_PREEQ_BIN_MIC1_13 +704 0x1E28 //TX_PREEQ_BIN_MIC1_14 +705 0x462C //TX_PREEQ_BIN_MIC1_15 +706 0x0000 //TX_PREEQ_BIN_MIC1_16 707 0x0000 //TX_PREEQ_BIN_MIC1_17 708 0x0000 //TX_PREEQ_BIN_MIC1_18 709 0x0000 //TX_PREEQ_BIN_MIC1_19 @@ -4252,23 +6087,23 @@ 736 0x4848 //TX_PREEQ_GAIN_MIC2_21 737 0x4848 //TX_PREEQ_GAIN_MIC2_22 738 0x4848 //TX_PREEQ_GAIN_MIC2_23 -739 0x0202 //TX_PREEQ_BIN_MIC2_0 -740 0x0203 //TX_PREEQ_BIN_MIC2_1 -741 0x0303 //TX_PREEQ_BIN_MIC2_2 -742 0x0304 //TX_PREEQ_BIN_MIC2_3 -743 0x0405 //TX_PREEQ_BIN_MIC2_4 -744 0x0506 //TX_PREEQ_BIN_MIC2_5 -745 0x0808 //TX_PREEQ_BIN_MIC2_6 -746 0x0809 //TX_PREEQ_BIN_MIC2_7 -747 0x0A0A //TX_PREEQ_BIN_MIC2_8 -748 0x0C10 //TX_PREEQ_BIN_MIC2_9 -749 0x1013 //TX_PREEQ_BIN_MIC2_10 -750 0x1414 //TX_PREEQ_BIN_MIC2_11 -751 0x261E //TX_PREEQ_BIN_MIC2_12 -752 0x1E14 //TX_PREEQ_BIN_MIC2_13 -753 0x1414 //TX_PREEQ_BIN_MIC2_14 -754 0x2814 //TX_PREEQ_BIN_MIC2_15 -755 0x4000 //TX_PREEQ_BIN_MIC2_16 +739 0x0E10 //TX_PREEQ_BIN_MIC2_0 +740 0x1010 //TX_PREEQ_BIN_MIC2_1 +741 0x1010 //TX_PREEQ_BIN_MIC2_2 +742 0x1010 //TX_PREEQ_BIN_MIC2_3 +743 0x1010 //TX_PREEQ_BIN_MIC2_4 +744 0x1010 //TX_PREEQ_BIN_MIC2_5 +745 0x1010 //TX_PREEQ_BIN_MIC2_6 +746 0x1010 //TX_PREEQ_BIN_MIC2_7 +747 0x1010 //TX_PREEQ_BIN_MIC2_8 +748 0x1010 //TX_PREEQ_BIN_MIC2_9 +749 0x1010 //TX_PREEQ_BIN_MIC2_10 +750 0x1010 //TX_PREEQ_BIN_MIC2_11 +751 0x1010 //TX_PREEQ_BIN_MIC2_12 +752 0x1010 //TX_PREEQ_BIN_MIC2_13 +753 0x1010 //TX_PREEQ_BIN_MIC2_14 +754 0x0200 //TX_PREEQ_BIN_MIC2_15 +755 0x0000 //TX_PREEQ_BIN_MIC2_16 756 0x0000 //TX_PREEQ_BIN_MIC2_17 757 0x0000 //TX_PREEQ_BIN_MIC2_18 758 0x0000 //TX_PREEQ_BIN_MIC2_19 @@ -4379,7 +6214,7 @@ 863 0x199A //TX_TDDRC_HMNC_GAIN 864 0x0000 //TX_TDDRC_SMT_FLAG 865 0x0CCD //TX_TDDRC_SMT_W -866 0x05F5 //TX_TDDRC_DRC_GAIN +866 0x0504 //TX_TDDRC_DRC_GAIN 867 0x7FFF //TX_TDDRC_LMT_THRD 868 0x0000 //TX_TDDRC_LMT_ALPHA 869 0x0000 //TX_TFMASKLTH @@ -4410,6 +6245,71 @@ 894 0xC000 //TX_FASTNS_SSA_THHFL 895 0xCCCC //TX_FASTNS_SSA_THLFH 896 0xD999 //TX_FASTNS_SSA_THHFH +897 0x2339 //TX_SENDFUNC_REG_MICMUTE +898 0x0021 //TX_SENDFUNC_REG_MICMUTE1 +899 0x02BC //TX_MICMUTE_RATIO_THR +900 0x0140 //TX_MICMUTE_AMP_THR +901 0x0004 //TX_MICMUTE_HPF_IND +902 0x00C0 //TX_MICMUTE_LOG_EYR_TH +903 0x0008 //TX_MICMUTE_CVG_TIME +904 0x0008 //TX_MICMUTE_RELEASE_TIME +905 0x01FE //TX_MIC_VOLUME_MIC0MUTE +906 0x0020 //TX_MICMUTE_EPD_OFFSET_0 +907 0x001E //TX_MICMUTE_FRQ_AEC_L +908 0x7999 //TX_MICMUTE_EAD_THR +909 0x7FFF //TX_MICMUTE_LAMBDA_CB_NLE +910 0x7FFF //TX_MICMUTE_LAMBDA_RE_EST +911 0x4000 //TX_DTD_THR1_MICMUTE_0 +912 0x7000 //TX_DTD_THR1_MICMUTE_1 +913 0x7FFF //TX_DTD_THR1_MICMUTE_2 +914 0x7FFF //TX_DTD_THR1_MICMUTE_3 +915 0x6CCC //TX_DTD_THR2_MICMUTE_0 +916 0x0400 //TX_MICMUTE_MIN_EQ_RE_EST_0 +917 0x0400 //TX_MICMUTE_MIN_EQ_RE_EST_1 +918 0x1000 //TX_MICMUTE_MIN_EQ_RE_EST_2 +919 0x7FFF //TX_MICMUTE_MIN_EQ_RE_EST_3 +920 0x7FFF //TX_MICMUTE_MIN_EQ_RE_EST_4 +921 0x4000 //TX_MICMUTE_C_POST_FLT +922 0x03E8 //TX_MICMUTE_DT_CUT_K +923 0x0001 //TX_MICMUTE_DT_CUT_THR +924 0x03E8 //TX_MICMUTE_DT_CUT_K2 +925 0x0001 //TX_MICMUTE_DT_CUT_THR2 +926 0x0064 //TX_MICMUTE_DT2_HOLD_N +927 0x1000 //TX_MICMUTE_RATIODTH_THCUT +928 0x1000 //TX_MICMUTE_B_POST_FLT_ECHOL +929 0x7FFF //TX_MICMUTE_B_POST_FLT_ECHOH +930 0x0400 //TX_MICMUTE_C_POST_FLT_MASK +931 0x7999 //TX_MICMUTE_RATIODTL_CUT_TH +932 0x0258 //TX_MICMUTE_DT_CUT_K1 +933 0x0800 //TX_MICMUTE_N2_SN_EST +934 0xFC00 //TX_MICMUTE_THR_SN_EST_0 +935 0x001C //TX_MICMUTE_MIN_G_CTRL_0 +936 0x6000 //TX_MICMUTE_A_POST_FILT_S_0 +937 0x7000 //TX_MICMUTE_B_POST_FILT_0 +938 0x2710 //TX_MIC1RUB_AMP_THR +939 0x0010 //TX_MIC1MUTE_RATIO_THR +940 0x0450 //TX_MIC1MUTE_AMP_THR +941 0x0008 //TX_MIC1MUTE_CVG_TIME +942 0x0008 //TX_MIC1MUTE_RELEASE_TIME +943 0x0000 //TX_AMS_RESRV_01 +944 0x0000 //TX_AMS_RESRV_02 +945 0x0000 //TX_AMS_RESRV_03 +946 0x0000 //TX_AMS_RESRV_04 +947 0x0000 //TX_AMS_RESRV_05 +948 0x0000 //TX_AMS_RESRV_06 +949 0x0000 //TX_AMS_RESRV_07 +950 0x0000 //TX_AMS_RESRV_08 +951 0x0000 //TX_AMS_RESRV_09 +952 0x0000 //TX_AMS_RESRV_10 +953 0x0000 //TX_AMS_RESRV_11 +954 0x0000 //TX_AMS_RESRV_12 +955 0x0000 //TX_AMS_RESRV_13 +956 0x0000 //TX_AMS_RESRV_14 +957 0x0000 //TX_AMS_RESRV_15 +958 0x0000 //TX_AMS_RESRV_16 +959 0x0000 //TX_AMS_RESRV_17 +960 0x0000 //TX_AMS_RESRV_18 +961 0x0000 //TX_AMS_RESRV_19 #RX 0 0x003C //RX_RECVFUNC_MODE_0 1 0x0000 //RX_RECVFUNC_MODE_1 @@ -4421,7 +6321,7 @@ 7 0x1000 //RX_TDDRC_ALPHA_UP_2 8 0x1000 //RX_TDDRC_ALPHA_UP_3 9 0x1000 //RX_TDDRC_ALPHA_UP_4 -10 0x064E //RX_PGA +10 0x0722 //RX_PGA 11 0x7FFF //RX_A_HP 12 0x4000 //RX_B_PE 13 0x5800 //RX_THR_PITCH_DET_0 @@ -4450,21 +6350,21 @@ 36 0x0000 //RX_LMT_THRD 37 0x4000 //RX_LMT_ALPHA 38 0x0020 //RX_FDEQ_SUBNUM -39 0x4848 //RX_FDEQ_GAIN_0 -40 0x4850 //RX_FDEQ_GAIN_1 -41 0x6478 //RX_FDEQ_GAIN_2 -42 0x8689 //RX_FDEQ_GAIN_3 -43 0x908F //RX_FDEQ_GAIN_4 -44 0x9495 //RX_FDEQ_GAIN_5 -45 0x989D //RX_FDEQ_GAIN_6 -46 0x9DA6 //RX_FDEQ_GAIN_7 -47 0xA895 //RX_FDEQ_GAIN_8 -48 0x8A8A //RX_FDEQ_GAIN_9 -49 0x8E78 //RX_FDEQ_GAIN_10 -50 0x7070 //RX_FDEQ_GAIN_11 -51 0x7680 //RX_FDEQ_GAIN_12 -52 0x787C //RX_FDEQ_GAIN_13 -53 0x8890 //RX_FDEQ_GAIN_14 +39 0x4E4E //RX_FDEQ_GAIN_0 +40 0x4E56 //RX_FDEQ_GAIN_1 +41 0x6878 //RX_FDEQ_GAIN_2 +42 0x8088 //RX_FDEQ_GAIN_3 +43 0x848B //RX_FDEQ_GAIN_4 +44 0x8F8E //RX_FDEQ_GAIN_5 +45 0x9494 //RX_FDEQ_GAIN_6 +46 0x96A0 //RX_FDEQ_GAIN_7 +47 0xB8A0 //RX_FDEQ_GAIN_8 +48 0xA99D //RX_FDEQ_GAIN_9 +49 0x9D6A //RX_FDEQ_GAIN_10 +50 0x626B //RX_FDEQ_GAIN_11 +51 0x6C78 //RX_FDEQ_GAIN_12 +52 0x7884 //RX_FDEQ_GAIN_13 +53 0x9098 //RX_FDEQ_GAIN_14 54 0x9CAC //RX_FDEQ_GAIN_15 55 0x4848 //RX_FDEQ_GAIN_16 56 0x4848 //RX_FDEQ_GAIN_17 @@ -4535,7 +6435,7 @@ 121 0x199A //RX_TDDRC_HMNC_GAIN 122 0x0001 //RX_TDDRC_SMT_FLAG 123 0x0CCD //RX_TDDRC_SMT_W -124 0x0275 //RX_TDDRC_DRC_GAIN +124 0x02FD //RX_TDDRC_DRC_GAIN 125 0x7C00 //RX_LAMBDA_PKA_FP 126 0x2000 //RX_TPKA_FP 127 0x2000 //RX_MIN_G_FP @@ -4591,23 +6491,23 @@ 121 0x199A //RX_TDDRC_HMNC_GAIN 122 0x0001 //RX_TDDRC_SMT_FLAG 123 0x0CCD //RX_TDDRC_SMT_W -124 0x0275 //RX_TDDRC_DRC_GAIN +124 0x02FD //RX_TDDRC_DRC_GAIN 38 0x0020 //RX_FDEQ_SUBNUM -39 0x4848 //RX_FDEQ_GAIN_0 -40 0x4850 //RX_FDEQ_GAIN_1 -41 0x6478 //RX_FDEQ_GAIN_2 -42 0x8689 //RX_FDEQ_GAIN_3 -43 0x908F //RX_FDEQ_GAIN_4 -44 0x9495 //RX_FDEQ_GAIN_5 -45 0x989D //RX_FDEQ_GAIN_6 -46 0x9DA6 //RX_FDEQ_GAIN_7 -47 0xA895 //RX_FDEQ_GAIN_8 -48 0x8A8A //RX_FDEQ_GAIN_9 -49 0x8E78 //RX_FDEQ_GAIN_10 -50 0x7070 //RX_FDEQ_GAIN_11 -51 0x7680 //RX_FDEQ_GAIN_12 -52 0x787C //RX_FDEQ_GAIN_13 -53 0x8890 //RX_FDEQ_GAIN_14 +39 0x4E4E //RX_FDEQ_GAIN_0 +40 0x4E56 //RX_FDEQ_GAIN_1 +41 0x6878 //RX_FDEQ_GAIN_2 +42 0x8088 //RX_FDEQ_GAIN_3 +43 0x848B //RX_FDEQ_GAIN_4 +44 0x8F8E //RX_FDEQ_GAIN_5 +45 0x9494 //RX_FDEQ_GAIN_6 +46 0x96A0 //RX_FDEQ_GAIN_7 +47 0xB8A0 //RX_FDEQ_GAIN_8 +48 0xA99D //RX_FDEQ_GAIN_9 +49 0x9D6A //RX_FDEQ_GAIN_10 +50 0x626B //RX_FDEQ_GAIN_11 +51 0x6C78 //RX_FDEQ_GAIN_12 +52 0x7884 //RX_FDEQ_GAIN_13 +53 0x9098 //RX_FDEQ_GAIN_14 54 0x9CAC //RX_FDEQ_GAIN_15 55 0x4848 //RX_FDEQ_GAIN_16 56 0x4848 //RX_FDEQ_GAIN_17 @@ -4690,23 +6590,23 @@ 121 0x199A //RX_TDDRC_HMNC_GAIN 122 0x0001 //RX_TDDRC_SMT_FLAG 123 0x0CCD //RX_TDDRC_SMT_W -124 0x0275 //RX_TDDRC_DRC_GAIN +124 0x02FD //RX_TDDRC_DRC_GAIN 38 0x0020 //RX_FDEQ_SUBNUM -39 0x4848 //RX_FDEQ_GAIN_0 -40 0x4850 //RX_FDEQ_GAIN_1 -41 0x6478 //RX_FDEQ_GAIN_2 -42 0x8689 //RX_FDEQ_GAIN_3 -43 0x908F //RX_FDEQ_GAIN_4 -44 0x9495 //RX_FDEQ_GAIN_5 -45 0x989D //RX_FDEQ_GAIN_6 -46 0x9DA6 //RX_FDEQ_GAIN_7 -47 0xA895 //RX_FDEQ_GAIN_8 -48 0x8A8A //RX_FDEQ_GAIN_9 -49 0x8E78 //RX_FDEQ_GAIN_10 -50 0x7070 //RX_FDEQ_GAIN_11 -51 0x7680 //RX_FDEQ_GAIN_12 -52 0x787C //RX_FDEQ_GAIN_13 -53 0x8890 //RX_FDEQ_GAIN_14 +39 0x4E4E //RX_FDEQ_GAIN_0 +40 0x4E56 //RX_FDEQ_GAIN_1 +41 0x6878 //RX_FDEQ_GAIN_2 +42 0x8088 //RX_FDEQ_GAIN_3 +43 0x848B //RX_FDEQ_GAIN_4 +44 0x8F8E //RX_FDEQ_GAIN_5 +45 0x9494 //RX_FDEQ_GAIN_6 +46 0x96A0 //RX_FDEQ_GAIN_7 +47 0xB8A0 //RX_FDEQ_GAIN_8 +48 0xA99D //RX_FDEQ_GAIN_9 +49 0x9D6A //RX_FDEQ_GAIN_10 +50 0x626B //RX_FDEQ_GAIN_11 +51 0x6C78 //RX_FDEQ_GAIN_12 +52 0x7884 //RX_FDEQ_GAIN_13 +53 0x9098 //RX_FDEQ_GAIN_14 54 0x9CAC //RX_FDEQ_GAIN_15 55 0x4848 //RX_FDEQ_GAIN_16 56 0x4848 //RX_FDEQ_GAIN_17 @@ -4789,23 +6689,23 @@ 121 0x199A //RX_TDDRC_HMNC_GAIN 122 0x0001 //RX_TDDRC_SMT_FLAG 123 0x0CCD //RX_TDDRC_SMT_W -124 0x0275 //RX_TDDRC_DRC_GAIN +124 0x02FD //RX_TDDRC_DRC_GAIN 38 0x0020 //RX_FDEQ_SUBNUM -39 0x4848 //RX_FDEQ_GAIN_0 -40 0x4850 //RX_FDEQ_GAIN_1 -41 0x6478 //RX_FDEQ_GAIN_2 -42 0x8689 //RX_FDEQ_GAIN_3 -43 0x908F //RX_FDEQ_GAIN_4 -44 0x9495 //RX_FDEQ_GAIN_5 -45 0x989D //RX_FDEQ_GAIN_6 -46 0x9DA6 //RX_FDEQ_GAIN_7 -47 0xA895 //RX_FDEQ_GAIN_8 -48 0x8A8A //RX_FDEQ_GAIN_9 -49 0x8E78 //RX_FDEQ_GAIN_10 -50 0x7070 //RX_FDEQ_GAIN_11 -51 0x7680 //RX_FDEQ_GAIN_12 -52 0x787C //RX_FDEQ_GAIN_13 -53 0x8890 //RX_FDEQ_GAIN_14 +39 0x4E4E //RX_FDEQ_GAIN_0 +40 0x4E56 //RX_FDEQ_GAIN_1 +41 0x6878 //RX_FDEQ_GAIN_2 +42 0x8088 //RX_FDEQ_GAIN_3 +43 0x848B //RX_FDEQ_GAIN_4 +44 0x8F8E //RX_FDEQ_GAIN_5 +45 0x9494 //RX_FDEQ_GAIN_6 +46 0x96A0 //RX_FDEQ_GAIN_7 +47 0xB8A0 //RX_FDEQ_GAIN_8 +48 0xA99D //RX_FDEQ_GAIN_9 +49 0x9D6A //RX_FDEQ_GAIN_10 +50 0x626B //RX_FDEQ_GAIN_11 +51 0x6C78 //RX_FDEQ_GAIN_12 +52 0x7884 //RX_FDEQ_GAIN_13 +53 0x9098 //RX_FDEQ_GAIN_14 54 0x9CAC //RX_FDEQ_GAIN_15 55 0x4848 //RX_FDEQ_GAIN_16 56 0x4848 //RX_FDEQ_GAIN_17 @@ -4863,7 +6763,7 @@ 108 0x5333 //RX_FDDRC_SLANT_1_2 109 0x5333 //RX_FDDRC_SLANT_1_3 110 0x0000 //RX_FDDRC_RESRV_0 -129 0x0026 //RX_SPK_VOL +129 0x0024 //RX_SPK_VOL 130 0x0000 //RX_VOL_RESRV_0 #VOL 3 6 0x1000 //RX_TDDRC_ALPHA_UP_1 @@ -4888,23 +6788,23 @@ 121 0x199A //RX_TDDRC_HMNC_GAIN 122 0x0001 //RX_TDDRC_SMT_FLAG 123 0x0CCD //RX_TDDRC_SMT_W -124 0x0275 //RX_TDDRC_DRC_GAIN +124 0x02FD //RX_TDDRC_DRC_GAIN 38 0x0020 //RX_FDEQ_SUBNUM -39 0x4848 //RX_FDEQ_GAIN_0 -40 0x4850 //RX_FDEQ_GAIN_1 -41 0x6478 //RX_FDEQ_GAIN_2 -42 0x8689 //RX_FDEQ_GAIN_3 -43 0x908F //RX_FDEQ_GAIN_4 -44 0x9495 //RX_FDEQ_GAIN_5 -45 0x989D //RX_FDEQ_GAIN_6 -46 0x9DA6 //RX_FDEQ_GAIN_7 -47 0xA895 //RX_FDEQ_GAIN_8 -48 0x8A8A //RX_FDEQ_GAIN_9 -49 0x8E78 //RX_FDEQ_GAIN_10 -50 0x7070 //RX_FDEQ_GAIN_11 -51 0x7680 //RX_FDEQ_GAIN_12 -52 0x787C //RX_FDEQ_GAIN_13 -53 0x8890 //RX_FDEQ_GAIN_14 +39 0x4E4E //RX_FDEQ_GAIN_0 +40 0x4E56 //RX_FDEQ_GAIN_1 +41 0x6878 //RX_FDEQ_GAIN_2 +42 0x8088 //RX_FDEQ_GAIN_3 +43 0x848B //RX_FDEQ_GAIN_4 +44 0x8F8E //RX_FDEQ_GAIN_5 +45 0x9494 //RX_FDEQ_GAIN_6 +46 0x96A0 //RX_FDEQ_GAIN_7 +47 0xB8A0 //RX_FDEQ_GAIN_8 +48 0xA99D //RX_FDEQ_GAIN_9 +49 0x9D6A //RX_FDEQ_GAIN_10 +50 0x626B //RX_FDEQ_GAIN_11 +51 0x6C78 //RX_FDEQ_GAIN_12 +52 0x7884 //RX_FDEQ_GAIN_13 +53 0x9098 //RX_FDEQ_GAIN_14 54 0x9CAC //RX_FDEQ_GAIN_15 55 0x4848 //RX_FDEQ_GAIN_16 56 0x4848 //RX_FDEQ_GAIN_17 @@ -4962,7 +6862,7 @@ 108 0x5333 //RX_FDDRC_SLANT_1_2 109 0x5333 //RX_FDDRC_SLANT_1_3 110 0x0000 //RX_FDDRC_RESRV_0 -129 0x003D //RX_SPK_VOL +129 0x003A //RX_SPK_VOL 130 0x0000 //RX_VOL_RESRV_0 #VOL 4 6 0x1000 //RX_TDDRC_ALPHA_UP_1 @@ -4987,23 +6887,23 @@ 121 0x199A //RX_TDDRC_HMNC_GAIN 122 0x0001 //RX_TDDRC_SMT_FLAG 123 0x0CCD //RX_TDDRC_SMT_W -124 0x0275 //RX_TDDRC_DRC_GAIN +124 0x02FD //RX_TDDRC_DRC_GAIN 38 0x0020 //RX_FDEQ_SUBNUM -39 0x4848 //RX_FDEQ_GAIN_0 -40 0x4850 //RX_FDEQ_GAIN_1 -41 0x6478 //RX_FDEQ_GAIN_2 -42 0x8689 //RX_FDEQ_GAIN_3 -43 0x908F //RX_FDEQ_GAIN_4 -44 0x9495 //RX_FDEQ_GAIN_5 -45 0x989D //RX_FDEQ_GAIN_6 -46 0x9DA6 //RX_FDEQ_GAIN_7 -47 0xA895 //RX_FDEQ_GAIN_8 -48 0x8A8A //RX_FDEQ_GAIN_9 -49 0x8E78 //RX_FDEQ_GAIN_10 -50 0x7070 //RX_FDEQ_GAIN_11 -51 0x7680 //RX_FDEQ_GAIN_12 -52 0x787C //RX_FDEQ_GAIN_13 -53 0x8890 //RX_FDEQ_GAIN_14 +39 0x4E4E //RX_FDEQ_GAIN_0 +40 0x4E56 //RX_FDEQ_GAIN_1 +41 0x6878 //RX_FDEQ_GAIN_2 +42 0x8088 //RX_FDEQ_GAIN_3 +43 0x848B //RX_FDEQ_GAIN_4 +44 0x8F8E //RX_FDEQ_GAIN_5 +45 0x9494 //RX_FDEQ_GAIN_6 +46 0x96A0 //RX_FDEQ_GAIN_7 +47 0xB8A0 //RX_FDEQ_GAIN_8 +48 0xA99D //RX_FDEQ_GAIN_9 +49 0x9D6A //RX_FDEQ_GAIN_10 +50 0x626B //RX_FDEQ_GAIN_11 +51 0x6C78 //RX_FDEQ_GAIN_12 +52 0x7884 //RX_FDEQ_GAIN_13 +53 0x9098 //RX_FDEQ_GAIN_14 54 0x9CAC //RX_FDEQ_GAIN_15 55 0x4848 //RX_FDEQ_GAIN_16 56 0x4848 //RX_FDEQ_GAIN_17 @@ -5061,7 +6961,7 @@ 108 0x5333 //RX_FDDRC_SLANT_1_2 109 0x5333 //RX_FDDRC_SLANT_1_3 110 0x0000 //RX_FDDRC_RESRV_0 -129 0x0060 //RX_SPK_VOL +129 0x0059 //RX_SPK_VOL 130 0x0000 //RX_VOL_RESRV_0 #VOL 5 6 0x1000 //RX_TDDRC_ALPHA_UP_1 @@ -5086,23 +6986,23 @@ 121 0x199A //RX_TDDRC_HMNC_GAIN 122 0x0001 //RX_TDDRC_SMT_FLAG 123 0x0CCD //RX_TDDRC_SMT_W -124 0x0275 //RX_TDDRC_DRC_GAIN +124 0x02FD //RX_TDDRC_DRC_GAIN 38 0x0020 //RX_FDEQ_SUBNUM -39 0x4848 //RX_FDEQ_GAIN_0 -40 0x4850 //RX_FDEQ_GAIN_1 -41 0x6478 //RX_FDEQ_GAIN_2 -42 0x8689 //RX_FDEQ_GAIN_3 -43 0x908F //RX_FDEQ_GAIN_4 -44 0x9495 //RX_FDEQ_GAIN_5 -45 0x989D //RX_FDEQ_GAIN_6 -46 0x9DA6 //RX_FDEQ_GAIN_7 -47 0xA895 //RX_FDEQ_GAIN_8 -48 0x8A8A //RX_FDEQ_GAIN_9 -49 0x8E78 //RX_FDEQ_GAIN_10 -50 0x7070 //RX_FDEQ_GAIN_11 -51 0x7680 //RX_FDEQ_GAIN_12 -52 0x787C //RX_FDEQ_GAIN_13 -53 0x8890 //RX_FDEQ_GAIN_14 +39 0x4E4E //RX_FDEQ_GAIN_0 +40 0x4E56 //RX_FDEQ_GAIN_1 +41 0x6878 //RX_FDEQ_GAIN_2 +42 0x8088 //RX_FDEQ_GAIN_3 +43 0x848B //RX_FDEQ_GAIN_4 +44 0x8F8E //RX_FDEQ_GAIN_5 +45 0x9494 //RX_FDEQ_GAIN_6 +46 0x96A0 //RX_FDEQ_GAIN_7 +47 0xB8A0 //RX_FDEQ_GAIN_8 +48 0xA99D //RX_FDEQ_GAIN_9 +49 0x9D6A //RX_FDEQ_GAIN_10 +50 0x626B //RX_FDEQ_GAIN_11 +51 0x6C78 //RX_FDEQ_GAIN_12 +52 0x7884 //RX_FDEQ_GAIN_13 +53 0x9098 //RX_FDEQ_GAIN_14 54 0x9CAC //RX_FDEQ_GAIN_15 55 0x4848 //RX_FDEQ_GAIN_16 56 0x4848 //RX_FDEQ_GAIN_17 @@ -5160,7 +7060,7 @@ 108 0x5333 //RX_FDDRC_SLANT_1_2 109 0x5333 //RX_FDDRC_SLANT_1_3 110 0x0000 //RX_FDDRC_RESRV_0 -129 0x0099 //RX_SPK_VOL +129 0x0090 //RX_SPK_VOL 130 0x0000 //RX_VOL_RESRV_0 #VOL 6 6 0x1000 //RX_TDDRC_ALPHA_UP_1 @@ -5185,23 +7085,23 @@ 121 0x199A //RX_TDDRC_HMNC_GAIN 122 0x0001 //RX_TDDRC_SMT_FLAG 123 0x0CCD //RX_TDDRC_SMT_W -124 0x0275 //RX_TDDRC_DRC_GAIN +124 0x02FD //RX_TDDRC_DRC_GAIN 38 0x0020 //RX_FDEQ_SUBNUM -39 0x4848 //RX_FDEQ_GAIN_0 -40 0x4850 //RX_FDEQ_GAIN_1 -41 0x6478 //RX_FDEQ_GAIN_2 -42 0x8689 //RX_FDEQ_GAIN_3 -43 0x908F //RX_FDEQ_GAIN_4 -44 0x9495 //RX_FDEQ_GAIN_5 -45 0x989D //RX_FDEQ_GAIN_6 -46 0x9DA6 //RX_FDEQ_GAIN_7 -47 0xA895 //RX_FDEQ_GAIN_8 -48 0x8A8A //RX_FDEQ_GAIN_9 -49 0x8E78 //RX_FDEQ_GAIN_10 -50 0x7070 //RX_FDEQ_GAIN_11 -51 0x7680 //RX_FDEQ_GAIN_12 -52 0x787C //RX_FDEQ_GAIN_13 -53 0x8890 //RX_FDEQ_GAIN_14 +39 0x4E4E //RX_FDEQ_GAIN_0 +40 0x4E56 //RX_FDEQ_GAIN_1 +41 0x6878 //RX_FDEQ_GAIN_2 +42 0x8088 //RX_FDEQ_GAIN_3 +43 0x848B //RX_FDEQ_GAIN_4 +44 0x8F8E //RX_FDEQ_GAIN_5 +45 0x9494 //RX_FDEQ_GAIN_6 +46 0x96A0 //RX_FDEQ_GAIN_7 +47 0xB8A0 //RX_FDEQ_GAIN_8 +48 0xA99D //RX_FDEQ_GAIN_9 +49 0x9D6A //RX_FDEQ_GAIN_10 +50 0x626B //RX_FDEQ_GAIN_11 +51 0x6C78 //RX_FDEQ_GAIN_12 +52 0x7884 //RX_FDEQ_GAIN_13 +53 0x9098 //RX_FDEQ_GAIN_14 54 0x9CAC //RX_FDEQ_GAIN_15 55 0x4848 //RX_FDEQ_GAIN_16 56 0x4848 //RX_FDEQ_GAIN_17 @@ -5261,14 +7161,866 @@ 110 0x0000 //RX_FDDRC_RESRV_0 129 0x0100 //RX_SPK_VOL 130 0x0000 //RX_VOL_RESRV_0 +#RX 2 +157 0x003C //RX_RECVFUNC_MODE_0 +158 0x0000 //RX_RECVFUNC_MODE_1 +159 0x0004 //RX_SAMPLINGFREQ_SIG +160 0x0004 //RX_SAMPLINGFREQ_PROC +161 0x000A //RX_FRAME_SZ +162 0x0000 //RX_DELAY_OPT +163 0x1000 //RX_TDDRC_ALPHA_UP_1 +164 0x1000 //RX_TDDRC_ALPHA_UP_2 +165 0x1000 //RX_TDDRC_ALPHA_UP_3 +166 0x1000 //RX_TDDRC_ALPHA_UP_4 +167 0x0722 //RX_PGA +168 0x7FFF //RX_A_HP +169 0x4000 //RX_B_PE +170 0x5800 //RX_THR_PITCH_DET_0 +171 0x5000 //RX_THR_PITCH_DET_1 +172 0x4000 //RX_THR_PITCH_DET_2 +173 0x0008 //RX_PITCH_BFR_LEN +174 0x0003 //RX_SBD_PITCH_DET +175 0x0100 //RX_PP_RESRV_0 +176 0x0020 //RX_PP_RESRV_1 +177 0x0600 //RX_N_SN_EST +178 0x000C //RX_N2_SN_EST +179 0x000F //RX_NS_LVL_CTRL +180 0xF800 //RX_THR_SN_EST +181 0x7E00 //RX_LAMBDA_PFILT +182 0x000A //RX_FENS_RESRV_0 +183 0x0190 //RX_FENS_RESRV_1 +184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +187 0x0002 //RX_EXTRA_NS_L +188 0x0800 //RX_EXTRA_NS_A +189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +190 0x7000 //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +192 0x199A //RX_A_POST_FLT +193 0x0000 //RX_LMT_THRD +194 0x4000 //RX_LMT_ALPHA +195 0x0020 //RX_FDEQ_SUBNUM +196 0x4E4E //RX_FDEQ_GAIN_0 +197 0x4E56 //RX_FDEQ_GAIN_1 +198 0x6878 //RX_FDEQ_GAIN_2 +199 0x8088 //RX_FDEQ_GAIN_3 +200 0x848B //RX_FDEQ_GAIN_4 +201 0x8F8E //RX_FDEQ_GAIN_5 +202 0x9494 //RX_FDEQ_GAIN_6 +203 0x96A0 //RX_FDEQ_GAIN_7 +204 0xB8A0 //RX_FDEQ_GAIN_8 +205 0xA99D //RX_FDEQ_GAIN_9 +206 0x9D6A //RX_FDEQ_GAIN_10 +207 0x626B //RX_FDEQ_GAIN_11 +208 0x6C78 //RX_FDEQ_GAIN_12 +209 0x7884 //RX_FDEQ_GAIN_13 +210 0x9098 //RX_FDEQ_GAIN_14 +211 0x9CAC //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0202 //RX_FDEQ_BIN_0 +221 0x0202 //RX_FDEQ_BIN_1 +222 0x0302 //RX_FDEQ_BIN_2 +223 0x0304 //RX_FDEQ_BIN_3 +224 0x0405 //RX_FDEQ_BIN_4 +225 0x0506 //RX_FDEQ_BIN_5 +226 0x0708 //RX_FDEQ_BIN_6 +227 0x090A //RX_FDEQ_BIN_7 +228 0x0B0C //RX_FDEQ_BIN_8 +229 0x0D0E //RX_FDEQ_BIN_9 +230 0x1013 //RX_FDEQ_BIN_10 +231 0x1719 //RX_FDEQ_BIN_11 +232 0x1B1E //RX_FDEQ_BIN_12 +233 0x1E1E //RX_FDEQ_BIN_13 +234 0x1E28 //RX_FDEQ_BIN_14 +235 0x282C //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x4000 //RX_FDEQ_RESRV_0 +245 0x0320 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0030 //RX_FDDRC_BAND_MARGIN_1 +248 0x0050 //RX_FDDRC_BAND_MARGIN_2 +249 0x0080 //RX_FDDRC_BAND_MARGIN_3 +250 0x0007 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x5000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x6400 //RX_FDDRC_THRD_3_2 +258 0x6400 //RX_FDDRC_THRD_3_3 +259 0x2000 //RX_FDDRC_SLANT_0_0 +260 0x2000 //RX_FDDRC_SLANT_0_1 +261 0x2000 //RX_FDDRC_SLANT_0_2 +262 0x2000 //RX_FDDRC_SLANT_0_3 +263 0x5333 //RX_FDDRC_SLANT_1_0 +264 0x5333 //RX_FDDRC_SLANT_1_1 +265 0x5333 //RX_FDDRC_SLANT_1_2 +266 0x5333 //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +268 0x0002 //RX_FILTINDX +269 0x0000 //RX_TDDRC_THRD_0 +270 0x0000 //RX_TDDRC_THRD_1 +271 0x1800 //RX_TDDRC_THRD_2 +272 0x1800 //RX_TDDRC_THRD_3 +273 0x3000 //RX_TDDRC_SLANT_0 +274 0x6E00 //RX_TDDRC_SLANT_1 +275 0x1000 //RX_TDDRC_ALPHA_UP_0 +276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x199A //RX_TDDRC_HMNC_GAIN +279 0x0001 //RX_TDDRC_SMT_FLAG +280 0x0CCD //RX_TDDRC_SMT_W +281 0x02FD //RX_TDDRC_DRC_GAIN +282 0x7C00 //RX_LAMBDA_PKA_FP +283 0x2000 //RX_TPKA_FP +284 0x2000 //RX_MIN_G_FP +285 0x0080 //RX_MAX_G_FP +286 0x000D //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 +288 0x0000 //RX_MAXLEVEL_CNG +289 0x3000 //RX_BWE_UV_TH +290 0x3000 //RX_BWE_UV_TH2 +291 0x1800 //RX_BWE_UV_TH3 +292 0x1000 //RX_BWE_V_TH +293 0x04CD //RX_BWE_GAIN1_V_TH1 +294 0x0F33 //RX_BWE_GAIN1_V_TH2 +295 0x7333 //RX_BWE_UV_EQ +296 0x199A //RX_BWE_V_EQ +297 0x7333 //RX_BWE_TONE_TH +298 0x0004 //RX_BWE_UV_HOLD_T +299 0x6CCD //RX_BWE_GAIN2_ALPHA +300 0x799A //RX_BWE_GAIN3_ALPHA +301 0x001E //RX_BWE_CUTOFF +302 0x3000 //RX_BWE_GAINFILL +303 0x3200 //RX_BWE_MAXTH_TONE +304 0x2000 //RX_BWE_EQ_0 +305 0x2000 //RX_BWE_EQ_1 +306 0x2000 //RX_BWE_EQ_2 +307 0x2000 //RX_BWE_EQ_3 +308 0x2000 //RX_BWE_EQ_4 +309 0x2000 //RX_BWE_EQ_5 +310 0x2000 //RX_BWE_EQ_6 +311 0x0000 //RX_BWE_RESRV_0 +312 0x0000 //RX_BWE_RESRV_1 +313 0x0000 //RX_BWE_RESRV_2 +#VOL 0 +163 0x1000 //RX_TDDRC_ALPHA_UP_1 +164 0x1000 //RX_TDDRC_ALPHA_UP_2 +165 0x1000 //RX_TDDRC_ALPHA_UP_3 +166 0x1000 //RX_TDDRC_ALPHA_UP_4 +184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +190 0x7000 //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +269 0x0000 //RX_TDDRC_THRD_0 +270 0x0000 //RX_TDDRC_THRD_1 +271 0x1800 //RX_TDDRC_THRD_2 +272 0x1800 //RX_TDDRC_THRD_3 +273 0x3000 //RX_TDDRC_SLANT_0 +274 0x6E00 //RX_TDDRC_SLANT_1 +275 0x1000 //RX_TDDRC_ALPHA_UP_0 +276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x199A //RX_TDDRC_HMNC_GAIN +279 0x0001 //RX_TDDRC_SMT_FLAG +280 0x0CCD //RX_TDDRC_SMT_W +281 0x02FD //RX_TDDRC_DRC_GAIN +195 0x0020 //RX_FDEQ_SUBNUM +196 0x4E4E //RX_FDEQ_GAIN_0 +197 0x4E56 //RX_FDEQ_GAIN_1 +198 0x6878 //RX_FDEQ_GAIN_2 +199 0x8088 //RX_FDEQ_GAIN_3 +200 0x848B //RX_FDEQ_GAIN_4 +201 0x8F8E //RX_FDEQ_GAIN_5 +202 0x9494 //RX_FDEQ_GAIN_6 +203 0x96A0 //RX_FDEQ_GAIN_7 +204 0xB8A0 //RX_FDEQ_GAIN_8 +205 0xA99D //RX_FDEQ_GAIN_9 +206 0x9D6A //RX_FDEQ_GAIN_10 +207 0x626B //RX_FDEQ_GAIN_11 +208 0x6C78 //RX_FDEQ_GAIN_12 +209 0x7884 //RX_FDEQ_GAIN_13 +210 0x9098 //RX_FDEQ_GAIN_14 +211 0x9CAC //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0202 //RX_FDEQ_BIN_0 +221 0x0202 //RX_FDEQ_BIN_1 +222 0x0302 //RX_FDEQ_BIN_2 +223 0x0304 //RX_FDEQ_BIN_3 +224 0x0405 //RX_FDEQ_BIN_4 +225 0x0506 //RX_FDEQ_BIN_5 +226 0x0708 //RX_FDEQ_BIN_6 +227 0x090A //RX_FDEQ_BIN_7 +228 0x0B0C //RX_FDEQ_BIN_8 +229 0x0D0E //RX_FDEQ_BIN_9 +230 0x1013 //RX_FDEQ_BIN_10 +231 0x1719 //RX_FDEQ_BIN_11 +232 0x1B1E //RX_FDEQ_BIN_12 +233 0x1E1E //RX_FDEQ_BIN_13 +234 0x1E28 //RX_FDEQ_BIN_14 +235 0x282C //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x4000 //RX_FDEQ_RESRV_0 +245 0x0320 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0030 //RX_FDDRC_BAND_MARGIN_1 +248 0x0050 //RX_FDDRC_BAND_MARGIN_2 +249 0x0080 //RX_FDDRC_BAND_MARGIN_3 +250 0x0007 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x5000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x6400 //RX_FDDRC_THRD_3_2 +258 0x6400 //RX_FDDRC_THRD_3_3 +259 0x2000 //RX_FDDRC_SLANT_0_0 +260 0x2000 //RX_FDDRC_SLANT_0_1 +261 0x2000 //RX_FDDRC_SLANT_0_2 +262 0x2000 //RX_FDDRC_SLANT_0_3 +263 0x5333 //RX_FDDRC_SLANT_1_0 +264 0x5333 //RX_FDDRC_SLANT_1_1 +265 0x5333 //RX_FDDRC_SLANT_1_2 +266 0x5333 //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +286 0x000D //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 +#VOL 1 +163 0x1000 //RX_TDDRC_ALPHA_UP_1 +164 0x1000 //RX_TDDRC_ALPHA_UP_2 +165 0x1000 //RX_TDDRC_ALPHA_UP_3 +166 0x1000 //RX_TDDRC_ALPHA_UP_4 +184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +190 0x7000 //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +269 0x0000 //RX_TDDRC_THRD_0 +270 0x0000 //RX_TDDRC_THRD_1 +271 0x1800 //RX_TDDRC_THRD_2 +272 0x1800 //RX_TDDRC_THRD_3 +273 0x3000 //RX_TDDRC_SLANT_0 +274 0x6E00 //RX_TDDRC_SLANT_1 +275 0x1000 //RX_TDDRC_ALPHA_UP_0 +276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x199A //RX_TDDRC_HMNC_GAIN +279 0x0001 //RX_TDDRC_SMT_FLAG +280 0x0CCD //RX_TDDRC_SMT_W +281 0x02FD //RX_TDDRC_DRC_GAIN +195 0x0020 //RX_FDEQ_SUBNUM +196 0x4E4E //RX_FDEQ_GAIN_0 +197 0x4E56 //RX_FDEQ_GAIN_1 +198 0x6878 //RX_FDEQ_GAIN_2 +199 0x8088 //RX_FDEQ_GAIN_3 +200 0x848B //RX_FDEQ_GAIN_4 +201 0x8F8E //RX_FDEQ_GAIN_5 +202 0x9494 //RX_FDEQ_GAIN_6 +203 0x96A0 //RX_FDEQ_GAIN_7 +204 0xB8A0 //RX_FDEQ_GAIN_8 +205 0xA99D //RX_FDEQ_GAIN_9 +206 0x9D6A //RX_FDEQ_GAIN_10 +207 0x626B //RX_FDEQ_GAIN_11 +208 0x6C78 //RX_FDEQ_GAIN_12 +209 0x7884 //RX_FDEQ_GAIN_13 +210 0x9098 //RX_FDEQ_GAIN_14 +211 0x9CAC //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0202 //RX_FDEQ_BIN_0 +221 0x0202 //RX_FDEQ_BIN_1 +222 0x0302 //RX_FDEQ_BIN_2 +223 0x0304 //RX_FDEQ_BIN_3 +224 0x0405 //RX_FDEQ_BIN_4 +225 0x0506 //RX_FDEQ_BIN_5 +226 0x0708 //RX_FDEQ_BIN_6 +227 0x090A //RX_FDEQ_BIN_7 +228 0x0B0C //RX_FDEQ_BIN_8 +229 0x0D0E //RX_FDEQ_BIN_9 +230 0x1013 //RX_FDEQ_BIN_10 +231 0x1719 //RX_FDEQ_BIN_11 +232 0x1B1E //RX_FDEQ_BIN_12 +233 0x1E1E //RX_FDEQ_BIN_13 +234 0x1E28 //RX_FDEQ_BIN_14 +235 0x282C //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x4000 //RX_FDEQ_RESRV_0 +245 0x0320 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0030 //RX_FDDRC_BAND_MARGIN_1 +248 0x0050 //RX_FDDRC_BAND_MARGIN_2 +249 0x0080 //RX_FDDRC_BAND_MARGIN_3 +250 0x0007 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x5000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x6400 //RX_FDDRC_THRD_3_2 +258 0x6400 //RX_FDDRC_THRD_3_3 +259 0x2000 //RX_FDDRC_SLANT_0_0 +260 0x2000 //RX_FDDRC_SLANT_0_1 +261 0x2000 //RX_FDDRC_SLANT_0_2 +262 0x2000 //RX_FDDRC_SLANT_0_3 +263 0x5333 //RX_FDDRC_SLANT_1_0 +264 0x5333 //RX_FDDRC_SLANT_1_1 +265 0x5333 //RX_FDDRC_SLANT_1_2 +266 0x5333 //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +286 0x0016 //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 +#VOL 2 +163 0x1000 //RX_TDDRC_ALPHA_UP_1 +164 0x1000 //RX_TDDRC_ALPHA_UP_2 +165 0x1000 //RX_TDDRC_ALPHA_UP_3 +166 0x1000 //RX_TDDRC_ALPHA_UP_4 +184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +190 0x7000 //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +269 0x0000 //RX_TDDRC_THRD_0 +270 0x0000 //RX_TDDRC_THRD_1 +271 0x1800 //RX_TDDRC_THRD_2 +272 0x1800 //RX_TDDRC_THRD_3 +273 0x3000 //RX_TDDRC_SLANT_0 +274 0x6E00 //RX_TDDRC_SLANT_1 +275 0x1000 //RX_TDDRC_ALPHA_UP_0 +276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x199A //RX_TDDRC_HMNC_GAIN +279 0x0001 //RX_TDDRC_SMT_FLAG +280 0x0CCD //RX_TDDRC_SMT_W +281 0x02FD //RX_TDDRC_DRC_GAIN +195 0x0020 //RX_FDEQ_SUBNUM +196 0x4E4E //RX_FDEQ_GAIN_0 +197 0x4E56 //RX_FDEQ_GAIN_1 +198 0x6878 //RX_FDEQ_GAIN_2 +199 0x8088 //RX_FDEQ_GAIN_3 +200 0x848B //RX_FDEQ_GAIN_4 +201 0x8F8E //RX_FDEQ_GAIN_5 +202 0x9494 //RX_FDEQ_GAIN_6 +203 0x96A0 //RX_FDEQ_GAIN_7 +204 0xB8A0 //RX_FDEQ_GAIN_8 +205 0xA99D //RX_FDEQ_GAIN_9 +206 0x9D6A //RX_FDEQ_GAIN_10 +207 0x626B //RX_FDEQ_GAIN_11 +208 0x6C78 //RX_FDEQ_GAIN_12 +209 0x7884 //RX_FDEQ_GAIN_13 +210 0x9098 //RX_FDEQ_GAIN_14 +211 0x9CAC //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0202 //RX_FDEQ_BIN_0 +221 0x0202 //RX_FDEQ_BIN_1 +222 0x0302 //RX_FDEQ_BIN_2 +223 0x0304 //RX_FDEQ_BIN_3 +224 0x0405 //RX_FDEQ_BIN_4 +225 0x0506 //RX_FDEQ_BIN_5 +226 0x0708 //RX_FDEQ_BIN_6 +227 0x090A //RX_FDEQ_BIN_7 +228 0x0B0C //RX_FDEQ_BIN_8 +229 0x0D0E //RX_FDEQ_BIN_9 +230 0x1013 //RX_FDEQ_BIN_10 +231 0x1719 //RX_FDEQ_BIN_11 +232 0x1B1E //RX_FDEQ_BIN_12 +233 0x1E1E //RX_FDEQ_BIN_13 +234 0x1E28 //RX_FDEQ_BIN_14 +235 0x282C //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x4000 //RX_FDEQ_RESRV_0 +245 0x0320 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0030 //RX_FDDRC_BAND_MARGIN_1 +248 0x0050 //RX_FDDRC_BAND_MARGIN_2 +249 0x0080 //RX_FDDRC_BAND_MARGIN_3 +250 0x0007 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x5000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x6400 //RX_FDDRC_THRD_3_2 +258 0x6400 //RX_FDDRC_THRD_3_3 +259 0x2000 //RX_FDDRC_SLANT_0_0 +260 0x2000 //RX_FDDRC_SLANT_0_1 +261 0x2000 //RX_FDDRC_SLANT_0_2 +262 0x2000 //RX_FDDRC_SLANT_0_3 +263 0x5333 //RX_FDDRC_SLANT_1_0 +264 0x5333 //RX_FDDRC_SLANT_1_1 +265 0x5333 //RX_FDDRC_SLANT_1_2 +266 0x5333 //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +286 0x0024 //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 +#VOL 3 +163 0x1000 //RX_TDDRC_ALPHA_UP_1 +164 0x1000 //RX_TDDRC_ALPHA_UP_2 +165 0x1000 //RX_TDDRC_ALPHA_UP_3 +166 0x1000 //RX_TDDRC_ALPHA_UP_4 +184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +190 0x7000 //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +269 0x0000 //RX_TDDRC_THRD_0 +270 0x0000 //RX_TDDRC_THRD_1 +271 0x1800 //RX_TDDRC_THRD_2 +272 0x1800 //RX_TDDRC_THRD_3 +273 0x3000 //RX_TDDRC_SLANT_0 +274 0x6E00 //RX_TDDRC_SLANT_1 +275 0x1000 //RX_TDDRC_ALPHA_UP_0 +276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x199A //RX_TDDRC_HMNC_GAIN +279 0x0001 //RX_TDDRC_SMT_FLAG +280 0x0CCD //RX_TDDRC_SMT_W +281 0x02FD //RX_TDDRC_DRC_GAIN +195 0x0020 //RX_FDEQ_SUBNUM +196 0x4E4E //RX_FDEQ_GAIN_0 +197 0x4E56 //RX_FDEQ_GAIN_1 +198 0x6878 //RX_FDEQ_GAIN_2 +199 0x8088 //RX_FDEQ_GAIN_3 +200 0x848B //RX_FDEQ_GAIN_4 +201 0x8F8E //RX_FDEQ_GAIN_5 +202 0x9494 //RX_FDEQ_GAIN_6 +203 0x96A0 //RX_FDEQ_GAIN_7 +204 0xB8A0 //RX_FDEQ_GAIN_8 +205 0xA99D //RX_FDEQ_GAIN_9 +206 0x9D6A //RX_FDEQ_GAIN_10 +207 0x626B //RX_FDEQ_GAIN_11 +208 0x6C78 //RX_FDEQ_GAIN_12 +209 0x7884 //RX_FDEQ_GAIN_13 +210 0x9098 //RX_FDEQ_GAIN_14 +211 0x9CAC //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0202 //RX_FDEQ_BIN_0 +221 0x0202 //RX_FDEQ_BIN_1 +222 0x0302 //RX_FDEQ_BIN_2 +223 0x0304 //RX_FDEQ_BIN_3 +224 0x0405 //RX_FDEQ_BIN_4 +225 0x0506 //RX_FDEQ_BIN_5 +226 0x0708 //RX_FDEQ_BIN_6 +227 0x090A //RX_FDEQ_BIN_7 +228 0x0B0C //RX_FDEQ_BIN_8 +229 0x0D0E //RX_FDEQ_BIN_9 +230 0x1013 //RX_FDEQ_BIN_10 +231 0x1719 //RX_FDEQ_BIN_11 +232 0x1B1E //RX_FDEQ_BIN_12 +233 0x1E1E //RX_FDEQ_BIN_13 +234 0x1E28 //RX_FDEQ_BIN_14 +235 0x282C //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x4000 //RX_FDEQ_RESRV_0 +245 0x0320 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0030 //RX_FDDRC_BAND_MARGIN_1 +248 0x0050 //RX_FDDRC_BAND_MARGIN_2 +249 0x0080 //RX_FDDRC_BAND_MARGIN_3 +250 0x0007 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x5000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x6400 //RX_FDDRC_THRD_3_2 +258 0x6400 //RX_FDDRC_THRD_3_3 +259 0x2000 //RX_FDDRC_SLANT_0_0 +260 0x2000 //RX_FDDRC_SLANT_0_1 +261 0x2000 //RX_FDDRC_SLANT_0_2 +262 0x2000 //RX_FDDRC_SLANT_0_3 +263 0x5333 //RX_FDDRC_SLANT_1_0 +264 0x5333 //RX_FDDRC_SLANT_1_1 +265 0x5333 //RX_FDDRC_SLANT_1_2 +266 0x5333 //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +286 0x003A //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 +#VOL 4 +163 0x1000 //RX_TDDRC_ALPHA_UP_1 +164 0x1000 //RX_TDDRC_ALPHA_UP_2 +165 0x1000 //RX_TDDRC_ALPHA_UP_3 +166 0x1000 //RX_TDDRC_ALPHA_UP_4 +184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +190 0x7000 //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +269 0x0000 //RX_TDDRC_THRD_0 +270 0x0000 //RX_TDDRC_THRD_1 +271 0x1800 //RX_TDDRC_THRD_2 +272 0x1800 //RX_TDDRC_THRD_3 +273 0x3000 //RX_TDDRC_SLANT_0 +274 0x6E00 //RX_TDDRC_SLANT_1 +275 0x1000 //RX_TDDRC_ALPHA_UP_0 +276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x199A //RX_TDDRC_HMNC_GAIN +279 0x0001 //RX_TDDRC_SMT_FLAG +280 0x0CCD //RX_TDDRC_SMT_W +281 0x02FD //RX_TDDRC_DRC_GAIN +195 0x0020 //RX_FDEQ_SUBNUM +196 0x4E4E //RX_FDEQ_GAIN_0 +197 0x4E56 //RX_FDEQ_GAIN_1 +198 0x6878 //RX_FDEQ_GAIN_2 +199 0x8088 //RX_FDEQ_GAIN_3 +200 0x848B //RX_FDEQ_GAIN_4 +201 0x8F8E //RX_FDEQ_GAIN_5 +202 0x9494 //RX_FDEQ_GAIN_6 +203 0x96A0 //RX_FDEQ_GAIN_7 +204 0xB8A0 //RX_FDEQ_GAIN_8 +205 0xA99D //RX_FDEQ_GAIN_9 +206 0x9D6A //RX_FDEQ_GAIN_10 +207 0x626B //RX_FDEQ_GAIN_11 +208 0x6C78 //RX_FDEQ_GAIN_12 +209 0x7884 //RX_FDEQ_GAIN_13 +210 0x9098 //RX_FDEQ_GAIN_14 +211 0x9CAC //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0202 //RX_FDEQ_BIN_0 +221 0x0202 //RX_FDEQ_BIN_1 +222 0x0302 //RX_FDEQ_BIN_2 +223 0x0304 //RX_FDEQ_BIN_3 +224 0x0405 //RX_FDEQ_BIN_4 +225 0x0506 //RX_FDEQ_BIN_5 +226 0x0708 //RX_FDEQ_BIN_6 +227 0x090A //RX_FDEQ_BIN_7 +228 0x0B0C //RX_FDEQ_BIN_8 +229 0x0D0E //RX_FDEQ_BIN_9 +230 0x1013 //RX_FDEQ_BIN_10 +231 0x1719 //RX_FDEQ_BIN_11 +232 0x1B1E //RX_FDEQ_BIN_12 +233 0x1E1E //RX_FDEQ_BIN_13 +234 0x1E28 //RX_FDEQ_BIN_14 +235 0x282C //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x4000 //RX_FDEQ_RESRV_0 +245 0x0320 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0030 //RX_FDDRC_BAND_MARGIN_1 +248 0x0050 //RX_FDDRC_BAND_MARGIN_2 +249 0x0080 //RX_FDDRC_BAND_MARGIN_3 +250 0x0007 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x5000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x6400 //RX_FDDRC_THRD_3_2 +258 0x6400 //RX_FDDRC_THRD_3_3 +259 0x2000 //RX_FDDRC_SLANT_0_0 +260 0x2000 //RX_FDDRC_SLANT_0_1 +261 0x2000 //RX_FDDRC_SLANT_0_2 +262 0x2000 //RX_FDDRC_SLANT_0_3 +263 0x5333 //RX_FDDRC_SLANT_1_0 +264 0x5333 //RX_FDDRC_SLANT_1_1 +265 0x5333 //RX_FDDRC_SLANT_1_2 +266 0x5333 //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +286 0x0059 //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 +#VOL 5 +163 0x1000 //RX_TDDRC_ALPHA_UP_1 +164 0x1000 //RX_TDDRC_ALPHA_UP_2 +165 0x1000 //RX_TDDRC_ALPHA_UP_3 +166 0x1000 //RX_TDDRC_ALPHA_UP_4 +184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +190 0x7000 //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +269 0x0000 //RX_TDDRC_THRD_0 +270 0x0000 //RX_TDDRC_THRD_1 +271 0x1800 //RX_TDDRC_THRD_2 +272 0x1800 //RX_TDDRC_THRD_3 +273 0x3000 //RX_TDDRC_SLANT_0 +274 0x6E00 //RX_TDDRC_SLANT_1 +275 0x1000 //RX_TDDRC_ALPHA_UP_0 +276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x199A //RX_TDDRC_HMNC_GAIN +279 0x0001 //RX_TDDRC_SMT_FLAG +280 0x0CCD //RX_TDDRC_SMT_W +281 0x02FD //RX_TDDRC_DRC_GAIN +195 0x0020 //RX_FDEQ_SUBNUM +196 0x4E4E //RX_FDEQ_GAIN_0 +197 0x4E56 //RX_FDEQ_GAIN_1 +198 0x6878 //RX_FDEQ_GAIN_2 +199 0x8088 //RX_FDEQ_GAIN_3 +200 0x848B //RX_FDEQ_GAIN_4 +201 0x8F8E //RX_FDEQ_GAIN_5 +202 0x9494 //RX_FDEQ_GAIN_6 +203 0x96A0 //RX_FDEQ_GAIN_7 +204 0xB8A0 //RX_FDEQ_GAIN_8 +205 0xA99D //RX_FDEQ_GAIN_9 +206 0x9D6A //RX_FDEQ_GAIN_10 +207 0x626B //RX_FDEQ_GAIN_11 +208 0x6C78 //RX_FDEQ_GAIN_12 +209 0x7884 //RX_FDEQ_GAIN_13 +210 0x9098 //RX_FDEQ_GAIN_14 +211 0x9CAC //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0202 //RX_FDEQ_BIN_0 +221 0x0202 //RX_FDEQ_BIN_1 +222 0x0302 //RX_FDEQ_BIN_2 +223 0x0304 //RX_FDEQ_BIN_3 +224 0x0405 //RX_FDEQ_BIN_4 +225 0x0506 //RX_FDEQ_BIN_5 +226 0x0708 //RX_FDEQ_BIN_6 +227 0x090A //RX_FDEQ_BIN_7 +228 0x0B0C //RX_FDEQ_BIN_8 +229 0x0D0E //RX_FDEQ_BIN_9 +230 0x1013 //RX_FDEQ_BIN_10 +231 0x1719 //RX_FDEQ_BIN_11 +232 0x1B1E //RX_FDEQ_BIN_12 +233 0x1E1E //RX_FDEQ_BIN_13 +234 0x1E28 //RX_FDEQ_BIN_14 +235 0x282C //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x4000 //RX_FDEQ_RESRV_0 +245 0x0320 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0030 //RX_FDDRC_BAND_MARGIN_1 +248 0x0050 //RX_FDDRC_BAND_MARGIN_2 +249 0x0080 //RX_FDDRC_BAND_MARGIN_3 +250 0x0007 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x5000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x6400 //RX_FDDRC_THRD_3_2 +258 0x6400 //RX_FDDRC_THRD_3_3 +259 0x2000 //RX_FDDRC_SLANT_0_0 +260 0x2000 //RX_FDDRC_SLANT_0_1 +261 0x2000 //RX_FDDRC_SLANT_0_2 +262 0x2000 //RX_FDDRC_SLANT_0_3 +263 0x5333 //RX_FDDRC_SLANT_1_0 +264 0x5333 //RX_FDDRC_SLANT_1_1 +265 0x5333 //RX_FDDRC_SLANT_1_2 +266 0x5333 //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +286 0x0090 //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 +#VOL 6 +163 0x1000 //RX_TDDRC_ALPHA_UP_1 +164 0x1000 //RX_TDDRC_ALPHA_UP_2 +165 0x1000 //RX_TDDRC_ALPHA_UP_3 +166 0x1000 //RX_TDDRC_ALPHA_UP_4 +184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +190 0x7000 //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +269 0x0000 //RX_TDDRC_THRD_0 +270 0x0000 //RX_TDDRC_THRD_1 +271 0x1800 //RX_TDDRC_THRD_2 +272 0x1800 //RX_TDDRC_THRD_3 +273 0x3000 //RX_TDDRC_SLANT_0 +274 0x6E00 //RX_TDDRC_SLANT_1 +275 0x1000 //RX_TDDRC_ALPHA_UP_0 +276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x199A //RX_TDDRC_HMNC_GAIN +279 0x0001 //RX_TDDRC_SMT_FLAG +280 0x0CCD //RX_TDDRC_SMT_W +281 0x02FD //RX_TDDRC_DRC_GAIN +195 0x0020 //RX_FDEQ_SUBNUM +196 0x4E4E //RX_FDEQ_GAIN_0 +197 0x4E56 //RX_FDEQ_GAIN_1 +198 0x6878 //RX_FDEQ_GAIN_2 +199 0x8088 //RX_FDEQ_GAIN_3 +200 0x848B //RX_FDEQ_GAIN_4 +201 0x8F8E //RX_FDEQ_GAIN_5 +202 0x9494 //RX_FDEQ_GAIN_6 +203 0x96A0 //RX_FDEQ_GAIN_7 +204 0xB8A0 //RX_FDEQ_GAIN_8 +205 0xA99D //RX_FDEQ_GAIN_9 +206 0x9D6A //RX_FDEQ_GAIN_10 +207 0x626B //RX_FDEQ_GAIN_11 +208 0x6C78 //RX_FDEQ_GAIN_12 +209 0x7884 //RX_FDEQ_GAIN_13 +210 0x9098 //RX_FDEQ_GAIN_14 +211 0x9CAC //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0202 //RX_FDEQ_BIN_0 +221 0x0202 //RX_FDEQ_BIN_1 +222 0x0302 //RX_FDEQ_BIN_2 +223 0x0304 //RX_FDEQ_BIN_3 +224 0x0405 //RX_FDEQ_BIN_4 +225 0x0506 //RX_FDEQ_BIN_5 +226 0x0708 //RX_FDEQ_BIN_6 +227 0x090A //RX_FDEQ_BIN_7 +228 0x0B0C //RX_FDEQ_BIN_8 +229 0x0D0E //RX_FDEQ_BIN_9 +230 0x1013 //RX_FDEQ_BIN_10 +231 0x1719 //RX_FDEQ_BIN_11 +232 0x1B1E //RX_FDEQ_BIN_12 +233 0x1E1E //RX_FDEQ_BIN_13 +234 0x1E28 //RX_FDEQ_BIN_14 +235 0x282C //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x4000 //RX_FDEQ_RESRV_0 +245 0x0320 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0030 //RX_FDDRC_BAND_MARGIN_1 +248 0x0050 //RX_FDDRC_BAND_MARGIN_2 +249 0x0080 //RX_FDDRC_BAND_MARGIN_3 +250 0x0007 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x5000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x6400 //RX_FDDRC_THRD_3_2 +258 0x6400 //RX_FDDRC_THRD_3_3 +259 0x2000 //RX_FDDRC_SLANT_0_0 +260 0x2000 //RX_FDDRC_SLANT_0_1 +261 0x2000 //RX_FDDRC_SLANT_0_2 +262 0x2000 //RX_FDDRC_SLANT_0_3 +263 0x5333 //RX_FDDRC_SLANT_1_0 +264 0x5333 //RX_FDDRC_SLANT_1_1 +265 0x5333 //RX_FDDRC_SLANT_1_2 +266 0x5333 //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +286 0x0100 //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 #CASE_NAME HANDSET-HANDSET-VOICE_GENERIC-NB -#PARAM_TYPE TX+RX -#TOTAL_CUSTOM_STEP 7 +#PARAM_MODE FULL +#PARAM_TYPE TX+2RX +#TOTAL_CUSTOM_STEP 7+7 #TX 0 0x0000 //TX_OPERATION_MODE_0 1 0x0000 //TX_OPERATION_MODE_1 -2 0x0036 //TX_PATCH_REG +2 0x0076 //TX_PATCH_REG 3 0x6F7E //TX_SENDFUNC_MODE_0 4 0x0001 //TX_SENDFUNC_MODE_1 5 0x0002 //TX_NUM_MIC @@ -5287,7 +8039,7 @@ 18 0x0000 //TX_SYS_RESRV_2 19 0x0000 //TX_SYS_RESRV_3 20 0x0000 //TX_DIST2REF0 -21 0x009D //TX_DIST2REF1 +21 0x00A3 //TX_DIST2REF1 22 0x0000 //TX_DIST2REF_02 23 0x0000 //TX_DIST2REF_03 24 0x0000 //TX_DIST2REF_04 @@ -5517,19 +8269,19 @@ 248 0xF800 //TX_THR_SN_EST_6 249 0xF700 //TX_THR_SN_EST_7 250 0x0000 //TX_DELTA_THR_SN_EST_0 -251 0x01A0 //TX_DELTA_THR_SN_EST_1 -252 0x0100 //TX_DELTA_THR_SN_EST_2 -253 0x0200 //TX_DELTA_THR_SN_EST_3 -254 0x01A0 //TX_DELTA_THR_SN_EST_4 -255 0x0100 //TX_DELTA_THR_SN_EST_5 -256 0x0000 //TX_DELTA_THR_SN_EST_6 +251 0x0100 //TX_DELTA_THR_SN_EST_1 +252 0x0200 //TX_DELTA_THR_SN_EST_2 +253 0x01A0 //TX_DELTA_THR_SN_EST_3 +254 0x0100 //TX_DELTA_THR_SN_EST_4 +255 0x0000 //TX_DELTA_THR_SN_EST_5 +256 0x01A0 //TX_DELTA_THR_SN_EST_6 257 0x0200 //TX_DELTA_THR_SN_EST_7 258 0x4000 //TX_LAMBDA_NN_EST_0 -259 0x4000 //TX_LAMBDA_NN_EST_1 -260 0x3000 //TX_LAMBDA_NN_EST_2 -261 0x4000 //TX_LAMBDA_NN_EST_3 +259 0x3000 //TX_LAMBDA_NN_EST_1 +260 0x4000 //TX_LAMBDA_NN_EST_2 +261 0x3000 //TX_LAMBDA_NN_EST_3 262 0x3000 //TX_LAMBDA_NN_EST_4 -263 0x3000 //TX_LAMBDA_NN_EST_5 +263 0x4000 //TX_LAMBDA_NN_EST_5 264 0x4000 //TX_LAMBDA_NN_EST_6 265 0x4000 //TX_LAMBDA_NN_EST_7 266 0x0400 //TX_N_SN_EST @@ -5548,20 +8300,20 @@ 279 0x4000 //TX_B_POST_FLT_0 280 0x4000 //TX_B_POST_FLT_1 281 0x0014 //TX_NS_LVL_CTRL_0 -282 0x001B //TX_NS_LVL_CTRL_1 -283 0x0019 //TX_NS_LVL_CTRL_2 +282 0x0019 //TX_NS_LVL_CTRL_1 +283 0x0017 //TX_NS_LVL_CTRL_2 284 0x0017 //TX_NS_LVL_CTRL_3 -285 0x0017 //TX_NS_LVL_CTRL_4 -286 0x0019 //TX_NS_LVL_CTRL_5 -287 0x0014 //TX_NS_LVL_CTRL_6 +285 0x0019 //TX_NS_LVL_CTRL_4 +286 0x0014 //TX_NS_LVL_CTRL_5 +287 0x001B //TX_NS_LVL_CTRL_6 288 0x0010 //TX_NS_LVL_CTRL_7 289 0x0010 //TX_MIN_GAIN_S_0 290 0x000C //TX_MIN_GAIN_S_1 -291 0x000C //TX_MIN_GAIN_S_2 +291 0x0010 //TX_MIN_GAIN_S_2 292 0x0010 //TX_MIN_GAIN_S_3 -293 0x0010 //TX_MIN_GAIN_S_4 -294 0x000C //TX_MIN_GAIN_S_5 -295 0x0014 //TX_MIN_GAIN_S_6 +293 0x000C //TX_MIN_GAIN_S_4 +294 0x0014 //TX_MIN_GAIN_S_5 +295 0x000C //TX_MIN_GAIN_S_6 296 0x0014 //TX_MIN_GAIN_S_7 297 0x5000 //TX_NMOS_SUP 298 0x0000 //TX_NS_MAX_PRI_SNR_TH @@ -5571,8 +8323,8 @@ 302 0x4000 //TX_SNRI_SUP_2 303 0x4000 //TX_SNRI_SUP_3 304 0x4000 //TX_SNRI_SUP_4 -305 0x4000 //TX_SNRI_SUP_5 -306 0x7FFF //TX_SNRI_SUP_6 +305 0x7FFF //TX_SNRI_SUP_5 +306 0x4000 //TX_SNRI_SUP_6 307 0x3000 //TX_SNRI_SUP_7 308 0x3000 //TX_THR_LFNS 309 0x001A //TX_G_LFNS @@ -5581,36 +8333,36 @@ 312 0x7FFF //TX_A_POST_FILT_0 313 0x2000 //TX_A_POST_FILT_1 314 0x2000 //TX_A_POST_FILT_S_0 -315 0x7000 //TX_A_POST_FILT_S_1 -316 0x6000 //TX_A_POST_FILT_S_2 -317 0x5000 //TX_A_POST_FILT_S_3 -318 0x2000 //TX_A_POST_FILT_S_4 -319 0x6000 //TX_A_POST_FILT_S_5 -320 0x2000 //TX_A_POST_FILT_S_6 +315 0x6000 //TX_A_POST_FILT_S_1 +316 0x5000 //TX_A_POST_FILT_S_2 +317 0x2000 //TX_A_POST_FILT_S_3 +318 0x6000 //TX_A_POST_FILT_S_4 +319 0x2000 //TX_A_POST_FILT_S_5 +320 0x7000 //TX_A_POST_FILT_S_6 321 0x7000 //TX_A_POST_FILT_S_7 322 0x4000 //TX_B_POST_FILT_0 323 0x4000 //TX_B_POST_FILT_1 -324 0x7FFF //TX_B_POST_FILT_2 -325 0x5000 //TX_B_POST_FILT_3 -326 0x7FFF //TX_B_POST_FILT_4 -327 0x7FFF //TX_B_POST_FILT_5 +324 0x5000 //TX_B_POST_FILT_2 +325 0x4000 //TX_B_POST_FILT_3 +326 0x4000 //TX_B_POST_FILT_4 +327 0x4000 //TX_B_POST_FILT_5 328 0x4000 //TX_B_POST_FILT_6 329 0x2000 //TX_B_POST_FILT_7 330 0x7FFF //TX_B_LESSCUT_RTO_S_0 -331 0x7FFF //TX_B_LESSCUT_RTO_S_1 -332 0x7FFF //TX_B_LESSCUT_RTO_S_2 -333 0x7FFF //TX_B_LESSCUT_RTO_S_3 -334 0x7FFF //TX_B_LESSCUT_RTO_S_4 -335 0x7FFF //TX_B_LESSCUT_RTO_S_5 -336 0x7FFF //TX_B_LESSCUT_RTO_S_6 -337 0x7FFF //TX_B_LESSCUT_RTO_S_7 +331 0x1000 //TX_B_LESSCUT_RTO_S_1 +332 0x1000 //TX_B_LESSCUT_RTO_S_2 +333 0x1000 //TX_B_LESSCUT_RTO_S_3 +334 0x1000 //TX_B_LESSCUT_RTO_S_4 +335 0x1000 //TX_B_LESSCUT_RTO_S_5 +336 0x1000 //TX_B_LESSCUT_RTO_S_6 +337 0x1000 //TX_B_LESSCUT_RTO_S_7 338 0x7E14 //TX_LAMBDA_PFILT 339 0x7C29 //TX_LAMBDA_PFILT_S_0 -340 0x7C29 //TX_LAMBDA_PFILT_S_1 -341 0x7200 //TX_LAMBDA_PFILT_S_2 -342 0x7900 //TX_LAMBDA_PFILT_S_3 -343 0x7400 //TX_LAMBDA_PFILT_S_4 -344 0x7200 //TX_LAMBDA_PFILT_S_5 +340 0x7200 //TX_LAMBDA_PFILT_S_1 +341 0x7900 //TX_LAMBDA_PFILT_S_2 +342 0x7400 //TX_LAMBDA_PFILT_S_3 +343 0x7200 //TX_LAMBDA_PFILT_S_4 +344 0x7C29 //TX_LAMBDA_PFILT_S_5 345 0x7C29 //TX_LAMBDA_PFILT_S_6 346 0x7C29 //TX_LAMBDA_PFILT_S_7 347 0x0200 //TX_K_PEPPER @@ -5646,10 +8398,10 @@ 377 0x0000 //TX_NOISE_TH_5_4 378 0x07D0 //TX_NOISE_TH_6 379 0x0004 //TX_MINENOISE_TH -380 0x4000 //TX_MINENOISE_MIC0_TH_MTS -381 0xFFEE //TX_MINENOISE_MIC0_TH_EXP -382 0x6000 //TX_MINENOISE_MIC0_S_TH_MTS -383 0xFFF3 //TX_MINENOISE_MIC0_S_TH_EXP +380 0xD508 //TX_MORENS_TFMASK_TH +381 0x0001 //TX_DRC_QUIET_FLOOR +382 0x6D60 //TX_RATIODTL_CUT_TH +383 0x0DAC //TX_DT_CUT_K1 384 0x00A5 //TX_OUT_ENER_S_TH_CLEAN 385 0x00A5 //TX_OUT_ENER_S_TH_LESSCLEAN 386 0x00A5 //TX_OUT_ENER_S_TH_NOISY @@ -5657,15 +8409,15 @@ 388 0x00CE //TX_OUT_ENER_TH_SPEECH 389 0x2000 //TX_SN_NPB_GAIN 390 0x0000 //TX_NN_NPB_GAIN -391 0x0000 //TX_CSX_ALPHA_0 -392 0x0000 //TX_CSX_ALPHA_1 -393 0x0000 //TX_CSX_ALPHA_2 -394 0x0000 //TX_CSX_ALPHA_3 -395 0x0800 //TX_MU_ARSP_EST -396 0x00C8 //TX_P_OUTBEAM_MIN_TH +391 0x3000 //TX_POST_MASK_SUP_HSNE +392 0x07D0 //TX_TAIL_DET_TH +393 0x4000 //TX_B_LESSCUT_RTO_WTA +394 0x0000 //TX_MEL_G_R +395 0x0080 //TX_SUPHIGH_TH +396 0x0000 //TX_MASK_G_R 397 0x0002 //TX_EXTRA_NS_L -398 0x0800 //TX_EXTRA_NS_A -399 0x0005 //TX_VR_NOISE_FLOOR_TH +398 0x1800 //TX_C_POST_FLT_MASK +399 0x7FFF //TX_A_POST_FLT_WNS 400 0x0148 //TX_MIN_G_LOW300HZ 401 0x0001 //TX_MAXLEVEL_CNG 402 0x00B4 //TX_STN_NOISE_TH @@ -5780,16 +8532,16 @@ 511 0x6666 //TX_MIC_TO_BFGAIN 512 0x0000 //TX_MICTOBFGAIN0 513 0x0000 //TX_FASTMUE_TH -514 0x0000 //TX_DERVB_LEN_0 -515 0x0000 //TX_DERVB_LEN_1 -516 0x0000 //TX_RHO_DERVB -517 0x0000 //TX_MIC_INDX_DERVB -518 0x0000 //TX_MU_DERVB -519 0x0000 //TX_DR_RESRV_0 -520 0x0000 //TX_DR_RESRV_1 -521 0x0000 //TX_DR_RESRV_2 -522 0x0000 //TX_DR_RESRV_3 -523 0x0000 //TX_DR_RESRV_4 +514 0x3000 //TX_DEREVERB_LF_MU +515 0x34CD //TX_DEREVERB_HF_MU +516 0x0007 //TX_DEREVERB_DELAY +517 0x0004 //TX_DEREVERB_COEF_LEN +518 0x0003 //TX_DEREVERB_DNR +519 0x0000 //TX_DEREVERB_ALPHA +520 0x0000 //TX_DEREVERB_BETA +521 0x3A98 //TX_GSC_RTOL_TH +522 0x3A98 //TX_GSC_RTOH_TH +523 0x7E2C //TX_WIDE2_MEANHTH 524 0x0000 //TX_DR_RESRV_5 525 0x0000 //TX_DR_RESRV_6 526 0x0000 //TX_DR_RESRV_7 @@ -5841,7 +8593,7 @@ 572 0x4240 //TX_FDEQ_GAIN_5 573 0x4040 //TX_FDEQ_GAIN_6 574 0x3630 //TX_FDEQ_GAIN_7 -575 0x2620 //TX_FDEQ_GAIN_8 +575 0x2726 //TX_FDEQ_GAIN_8 576 0x383C //TX_FDEQ_GAIN_9 577 0x4848 //TX_FDEQ_GAIN_10 578 0x4848 //TX_FDEQ_GAIN_11 @@ -5866,7 +8618,7 @@ 597 0x0808 //TX_FDEQ_BIN_6 598 0x050E //TX_FDEQ_BIN_7 599 0x0B0C //TX_FDEQ_BIN_8 -600 0x0F0F //TX_FDEQ_BIN_9 +600 0x0F09 //TX_FDEQ_BIN_9 601 0x0000 //TX_FDEQ_BIN_10 602 0x0000 //TX_FDEQ_BIN_11 603 0x0000 //TX_FDEQ_BIN_12 @@ -5890,9 +8642,9 @@ 621 0x4848 //TX_PREEQ_GAIN_MIC0_4 622 0x4848 //TX_PREEQ_GAIN_MIC0_5 623 0x4848 //TX_PREEQ_GAIN_MIC0_6 -624 0x4846 //TX_PREEQ_GAIN_MIC0_7 -625 0x4544 //TX_PREEQ_GAIN_MIC0_8 -626 0x4241 //TX_PREEQ_GAIN_MIC0_9 +624 0x4848 //TX_PREEQ_GAIN_MIC0_7 +625 0x4848 //TX_PREEQ_GAIN_MIC0_8 +626 0x4848 //TX_PREEQ_GAIN_MIC0_9 627 0x4848 //TX_PREEQ_GAIN_MIC0_10 628 0x4848 //TX_PREEQ_GAIN_MIC0_11 629 0x4848 //TX_PREEQ_GAIN_MIC0_12 @@ -5907,16 +8659,16 @@ 638 0x4848 //TX_PREEQ_GAIN_MIC0_21 639 0x4848 //TX_PREEQ_GAIN_MIC0_22 640 0x4848 //TX_PREEQ_GAIN_MIC0_23 -641 0x0202 //TX_PREEQ_BIN_MIC0_0 -642 0x0203 //TX_PREEQ_BIN_MIC0_1 -643 0x0303 //TX_PREEQ_BIN_MIC0_2 -644 0x0304 //TX_PREEQ_BIN_MIC0_3 -645 0x0405 //TX_PREEQ_BIN_MIC0_4 -646 0x0506 //TX_PREEQ_BIN_MIC0_5 -647 0x0708 //TX_PREEQ_BIN_MIC0_6 -648 0x090A //TX_PREEQ_BIN_MIC0_7 -649 0x0B0C //TX_PREEQ_BIN_MIC0_8 -650 0x0D0E //TX_PREEQ_BIN_MIC0_9 +641 0x251A //TX_PREEQ_BIN_MIC0_0 +642 0x0F0F //TX_PREEQ_BIN_MIC0_1 +643 0x0C08 //TX_PREEQ_BIN_MIC0_2 +644 0x0700 //TX_PREEQ_BIN_MIC0_3 +645 0x0000 //TX_PREEQ_BIN_MIC0_4 +646 0x0000 //TX_PREEQ_BIN_MIC0_5 +647 0x0000 //TX_PREEQ_BIN_MIC0_6 +648 0x0000 //TX_PREEQ_BIN_MIC0_7 +649 0x0000 //TX_PREEQ_BIN_MIC0_8 +650 0x0000 //TX_PREEQ_BIN_MIC0_9 651 0x0000 //TX_PREEQ_BIN_MIC0_10 652 0x0000 //TX_PREEQ_BIN_MIC0_11 653 0x0000 //TX_PREEQ_BIN_MIC0_12 @@ -5931,17 +8683,17 @@ 662 0x0000 //TX_PREEQ_BIN_MIC0_21 663 0x0000 //TX_PREEQ_BIN_MIC0_22 664 0x0000 //TX_PREEQ_BIN_MIC0_23 -665 0x0014 //TX_PREEQ_SUBNUM_MIC1 +665 0x0030 //TX_PREEQ_SUBNUM_MIC1 666 0x4848 //TX_PREEQ_GAIN_MIC1_0 667 0x4848 //TX_PREEQ_GAIN_MIC1_1 668 0x4848 //TX_PREEQ_GAIN_MIC1_2 669 0x4848 //TX_PREEQ_GAIN_MIC1_3 670 0x4848 //TX_PREEQ_GAIN_MIC1_4 671 0x4848 //TX_PREEQ_GAIN_MIC1_5 -672 0x4848 //TX_PREEQ_GAIN_MIC1_6 -673 0x4848 //TX_PREEQ_GAIN_MIC1_7 -674 0x4A4C //TX_PREEQ_GAIN_MIC1_8 -675 0x4E50 //TX_PREEQ_GAIN_MIC1_9 +672 0x494A //TX_PREEQ_GAIN_MIC1_6 +673 0x4B4C //TX_PREEQ_GAIN_MIC1_7 +674 0x4D4E //TX_PREEQ_GAIN_MIC1_8 +675 0x4F51 //TX_PREEQ_GAIN_MIC1_9 676 0x4848 //TX_PREEQ_GAIN_MIC1_10 677 0x4848 //TX_PREEQ_GAIN_MIC1_11 678 0x4848 //TX_PREEQ_GAIN_MIC1_12 @@ -5956,7 +8708,7 @@ 687 0x4848 //TX_PREEQ_GAIN_MIC1_21 688 0x4848 //TX_PREEQ_GAIN_MIC1_22 689 0x4848 //TX_PREEQ_GAIN_MIC1_23 -690 0x0203 //TX_PREEQ_BIN_MIC1_0 +690 0x0202 //TX_PREEQ_BIN_MIC1_0 691 0x0203 //TX_PREEQ_BIN_MIC1_1 692 0x0303 //TX_PREEQ_BIN_MIC1_2 693 0x0304 //TX_PREEQ_BIN_MIC1_3 @@ -6041,7 +8793,7 @@ 772 0x0044 //TX_MIC_PWR_BIAS_3 773 0x0000 //TX_GAIN_LIMIT_0 774 0x0000 //TX_GAIN_LIMIT_1 -775 0x0006 //TX_GAIN_LIMIT_2 +775 0x0007 //TX_GAIN_LIMIT_2 776 0x0007 //TX_GAIN_LIMIT_3 777 0x7F5B //TX_BVE_NOVAD0_ALPHADOWN 778 0x7FDE //TX_BVE_VAD0_ALPHAUP @@ -6132,7 +8884,7 @@ 863 0x199A //TX_TDDRC_HMNC_GAIN 864 0x0000 //TX_TDDRC_SMT_FLAG 865 0x0CCD //TX_TDDRC_SMT_W -866 0x0550 //TX_TDDRC_DRC_GAIN +866 0x05A0 //TX_TDDRC_DRC_GAIN 867 0x7FFF //TX_TDDRC_LMT_THRD 868 0x0000 //TX_TDDRC_LMT_ALPHA 869 0x0000 //TX_TFMASKLTH @@ -6163,8 +8915,73 @@ 894 0xC000 //TX_FASTNS_SSA_THHFL 895 0xCCCC //TX_FASTNS_SSA_THLFH 896 0xD999 //TX_FASTNS_SSA_THHFH +897 0x2339 //TX_SENDFUNC_REG_MICMUTE +898 0x0021 //TX_SENDFUNC_REG_MICMUTE1 +899 0x02BC //TX_MICMUTE_RATIO_THR +900 0x0140 //TX_MICMUTE_AMP_THR +901 0x0004 //TX_MICMUTE_HPF_IND +902 0x00C0 //TX_MICMUTE_LOG_EYR_TH +903 0x0008 //TX_MICMUTE_CVG_TIME +904 0x0008 //TX_MICMUTE_RELEASE_TIME +905 0x01FE //TX_MIC_VOLUME_MIC0MUTE +906 0x0020 //TX_MICMUTE_EPD_OFFSET_0 +907 0x001E //TX_MICMUTE_FRQ_AEC_L +908 0x7999 //TX_MICMUTE_EAD_THR +909 0x7FFF //TX_MICMUTE_LAMBDA_CB_NLE +910 0x7FFF //TX_MICMUTE_LAMBDA_RE_EST +911 0x4000 //TX_DTD_THR1_MICMUTE_0 +912 0x7000 //TX_DTD_THR1_MICMUTE_1 +913 0x7FFF //TX_DTD_THR1_MICMUTE_2 +914 0x7FFF //TX_DTD_THR1_MICMUTE_3 +915 0x6CCC //TX_DTD_THR2_MICMUTE_0 +916 0x0400 //TX_MICMUTE_MIN_EQ_RE_EST_0 +917 0x0400 //TX_MICMUTE_MIN_EQ_RE_EST_1 +918 0x1000 //TX_MICMUTE_MIN_EQ_RE_EST_2 +919 0x7FFF //TX_MICMUTE_MIN_EQ_RE_EST_3 +920 0x7FFF //TX_MICMUTE_MIN_EQ_RE_EST_4 +921 0x4000 //TX_MICMUTE_C_POST_FLT +922 0x03E8 //TX_MICMUTE_DT_CUT_K +923 0x0001 //TX_MICMUTE_DT_CUT_THR +924 0x03E8 //TX_MICMUTE_DT_CUT_K2 +925 0x0001 //TX_MICMUTE_DT_CUT_THR2 +926 0x0064 //TX_MICMUTE_DT2_HOLD_N +927 0x1000 //TX_MICMUTE_RATIODTH_THCUT +928 0x1000 //TX_MICMUTE_B_POST_FLT_ECHOL +929 0x7FFF //TX_MICMUTE_B_POST_FLT_ECHOH +930 0x0400 //TX_MICMUTE_C_POST_FLT_MASK +931 0x7999 //TX_MICMUTE_RATIODTL_CUT_TH +932 0x0258 //TX_MICMUTE_DT_CUT_K1 +933 0x0800 //TX_MICMUTE_N2_SN_EST +934 0xFC00 //TX_MICMUTE_THR_SN_EST_0 +935 0x001C //TX_MICMUTE_MIN_G_CTRL_0 +936 0x6000 //TX_MICMUTE_A_POST_FILT_S_0 +937 0x7000 //TX_MICMUTE_B_POST_FILT_0 +938 0x2710 //TX_MIC1RUB_AMP_THR +939 0x0010 //TX_MIC1MUTE_RATIO_THR +940 0x0450 //TX_MIC1MUTE_AMP_THR +941 0x0008 //TX_MIC1MUTE_CVG_TIME +942 0x0008 //TX_MIC1MUTE_RELEASE_TIME +943 0x0000 //TX_AMS_RESRV_01 +944 0x0000 //TX_AMS_RESRV_02 +945 0x0000 //TX_AMS_RESRV_03 +946 0x0000 //TX_AMS_RESRV_04 +947 0x0000 //TX_AMS_RESRV_05 +948 0x0000 //TX_AMS_RESRV_06 +949 0x0000 //TX_AMS_RESRV_07 +950 0x0000 //TX_AMS_RESRV_08 +951 0x0000 //TX_AMS_RESRV_09 +952 0x0000 //TX_AMS_RESRV_10 +953 0x0000 //TX_AMS_RESRV_11 +954 0x0000 //TX_AMS_RESRV_12 +955 0x0000 //TX_AMS_RESRV_13 +956 0x0000 //TX_AMS_RESRV_14 +957 0x0000 //TX_AMS_RESRV_15 +958 0x0000 //TX_AMS_RESRV_16 +959 0x0000 //TX_AMS_RESRV_17 +960 0x0000 //TX_AMS_RESRV_18 +961 0x0000 //TX_AMS_RESRV_19 #RX -0 0x003C //RX_RECVFUNC_MODE_0 +0 0x203C //RX_RECVFUNC_MODE_0 1 0x0000 //RX_RECVFUNC_MODE_1 2 0x0000 //RX_SAMPLINGFREQ_SIG 3 0x0000 //RX_SAMPLINGFREQ_PROC @@ -6204,15 +9021,15 @@ 37 0x4000 //RX_LMT_ALPHA 38 0x0014 //RX_FDEQ_SUBNUM 39 0x4840 //RX_FDEQ_GAIN_0 -40 0x3E3E //RX_FDEQ_GAIN_1 -41 0x4E62 //RX_FDEQ_GAIN_2 -42 0x6C7A //RX_FDEQ_GAIN_3 -43 0x8690 //RX_FDEQ_GAIN_4 -44 0x867E //RX_FDEQ_GAIN_5 -45 0x7E7E //RX_FDEQ_GAIN_6 -46 0x8080 //RX_FDEQ_GAIN_7 -47 0x8088 //RX_FDEQ_GAIN_8 -48 0x838B //RX_FDEQ_GAIN_9 +40 0x3E40 //RX_FDEQ_GAIN_1 +41 0x515E //RX_FDEQ_GAIN_2 +42 0x6470 //RX_FDEQ_GAIN_3 +43 0x7A84 //RX_FDEQ_GAIN_4 +44 0x7C7A //RX_FDEQ_GAIN_5 +45 0x7C7C //RX_FDEQ_GAIN_6 +46 0x7D7C //RX_FDEQ_GAIN_7 +47 0x7E82 //RX_FDEQ_GAIN_8 +48 0x7C80 //RX_FDEQ_GAIN_9 49 0x4848 //RX_FDEQ_GAIN_10 50 0x4848 //RX_FDEQ_GAIN_11 51 0x4848 //RX_FDEQ_GAIN_12 @@ -6228,8 +9045,8 @@ 61 0x4848 //RX_FDEQ_GAIN_22 62 0x4848 //RX_FDEQ_GAIN_23 63 0x0202 //RX_FDEQ_BIN_0 -64 0x0203 //RX_FDEQ_BIN_1 -65 0x0303 //RX_FDEQ_BIN_2 +64 0x0204 //RX_FDEQ_BIN_1 +65 0x0203 //RX_FDEQ_BIN_2 66 0x0304 //RX_FDEQ_BIN_3 67 0x0405 //RX_FDEQ_BIN_4 68 0x0506 //RX_FDEQ_BIN_5 @@ -6288,7 +9105,7 @@ 121 0x199A //RX_TDDRC_HMNC_GAIN 122 0x0001 //RX_TDDRC_SMT_FLAG 123 0x0CCD //RX_TDDRC_SMT_W -124 0x05A0 //RX_TDDRC_DRC_GAIN +124 0x055F //RX_TDDRC_DRC_GAIN 125 0x7C00 //RX_LAMBDA_PKA_FP 126 0x13E0 //RX_TPKA_FP 127 0x0080 //RX_MIN_G_FP @@ -6344,18 +9161,18 @@ 121 0x199A //RX_TDDRC_HMNC_GAIN 122 0x0001 //RX_TDDRC_SMT_FLAG 123 0x0CCD //RX_TDDRC_SMT_W -124 0x05A0 //RX_TDDRC_DRC_GAIN +124 0x055F //RX_TDDRC_DRC_GAIN 38 0x0014 //RX_FDEQ_SUBNUM 39 0x4840 //RX_FDEQ_GAIN_0 -40 0x3E3E //RX_FDEQ_GAIN_1 -41 0x4E62 //RX_FDEQ_GAIN_2 -42 0x6C7A //RX_FDEQ_GAIN_3 -43 0x8690 //RX_FDEQ_GAIN_4 -44 0x867E //RX_FDEQ_GAIN_5 -45 0x7E7E //RX_FDEQ_GAIN_6 -46 0x8080 //RX_FDEQ_GAIN_7 -47 0x8088 //RX_FDEQ_GAIN_8 -48 0x838B //RX_FDEQ_GAIN_9 +40 0x3E40 //RX_FDEQ_GAIN_1 +41 0x4D5A //RX_FDEQ_GAIN_2 +42 0x606C //RX_FDEQ_GAIN_3 +43 0x767C //RX_FDEQ_GAIN_4 +44 0x7876 //RX_FDEQ_GAIN_5 +45 0x7878 //RX_FDEQ_GAIN_6 +46 0x797C //RX_FDEQ_GAIN_7 +47 0x7E82 //RX_FDEQ_GAIN_8 +48 0x7C80 //RX_FDEQ_GAIN_9 49 0x4848 //RX_FDEQ_GAIN_10 50 0x4848 //RX_FDEQ_GAIN_11 51 0x4848 //RX_FDEQ_GAIN_12 @@ -6371,8 +9188,8 @@ 61 0x4848 //RX_FDEQ_GAIN_22 62 0x4848 //RX_FDEQ_GAIN_23 63 0x0202 //RX_FDEQ_BIN_0 -64 0x0203 //RX_FDEQ_BIN_1 -65 0x0303 //RX_FDEQ_BIN_2 +64 0x0204 //RX_FDEQ_BIN_1 +65 0x0203 //RX_FDEQ_BIN_2 66 0x0304 //RX_FDEQ_BIN_3 67 0x0405 //RX_FDEQ_BIN_4 68 0x0506 //RX_FDEQ_BIN_5 @@ -6446,15 +9263,15 @@ 124 0x055F //RX_TDDRC_DRC_GAIN 38 0x0014 //RX_FDEQ_SUBNUM 39 0x4840 //RX_FDEQ_GAIN_0 -40 0x3E3E //RX_FDEQ_GAIN_1 -41 0x4E62 //RX_FDEQ_GAIN_2 -42 0x6C7A //RX_FDEQ_GAIN_3 -43 0x8690 //RX_FDEQ_GAIN_4 -44 0x867E //RX_FDEQ_GAIN_5 -45 0x7E7E //RX_FDEQ_GAIN_6 -46 0x8080 //RX_FDEQ_GAIN_7 -47 0x8088 //RX_FDEQ_GAIN_8 -48 0x838B //RX_FDEQ_GAIN_9 +40 0x3E40 //RX_FDEQ_GAIN_1 +41 0x4D5A //RX_FDEQ_GAIN_2 +42 0x606C //RX_FDEQ_GAIN_3 +43 0x767C //RX_FDEQ_GAIN_4 +44 0x7876 //RX_FDEQ_GAIN_5 +45 0x7878 //RX_FDEQ_GAIN_6 +46 0x797C //RX_FDEQ_GAIN_7 +47 0x7E82 //RX_FDEQ_GAIN_8 +48 0x7C80 //RX_FDEQ_GAIN_9 49 0x4848 //RX_FDEQ_GAIN_10 50 0x4848 //RX_FDEQ_GAIN_11 51 0x4848 //RX_FDEQ_GAIN_12 @@ -6470,8 +9287,8 @@ 61 0x4848 //RX_FDEQ_GAIN_22 62 0x4848 //RX_FDEQ_GAIN_23 63 0x0202 //RX_FDEQ_BIN_0 -64 0x0203 //RX_FDEQ_BIN_1 -65 0x0303 //RX_FDEQ_BIN_2 +64 0x0204 //RX_FDEQ_BIN_1 +65 0x0203 //RX_FDEQ_BIN_2 66 0x0304 //RX_FDEQ_BIN_3 67 0x0405 //RX_FDEQ_BIN_4 68 0x0506 //RX_FDEQ_BIN_5 @@ -6517,7 +9334,7 @@ 108 0x5333 //RX_FDDRC_SLANT_1_2 109 0x5333 //RX_FDDRC_SLANT_1_3 110 0x0000 //RX_FDDRC_RESRV_0 -129 0x0011 //RX_SPK_VOL +129 0x0010 //RX_SPK_VOL 130 0x0000 //RX_VOL_RESRV_0 #VOL 2 6 0x1000 //RX_TDDRC_ALPHA_UP_1 @@ -6545,15 +9362,15 @@ 124 0x055F //RX_TDDRC_DRC_GAIN 38 0x0014 //RX_FDEQ_SUBNUM 39 0x4840 //RX_FDEQ_GAIN_0 -40 0x3E3E //RX_FDEQ_GAIN_1 -41 0x4E62 //RX_FDEQ_GAIN_2 -42 0x6C7A //RX_FDEQ_GAIN_3 -43 0x8690 //RX_FDEQ_GAIN_4 -44 0x867E //RX_FDEQ_GAIN_5 -45 0x7E7E //RX_FDEQ_GAIN_6 -46 0x8080 //RX_FDEQ_GAIN_7 -47 0x8088 //RX_FDEQ_GAIN_8 -48 0x838B //RX_FDEQ_GAIN_9 +40 0x3E40 //RX_FDEQ_GAIN_1 +41 0x4D5A //RX_FDEQ_GAIN_2 +42 0x606C //RX_FDEQ_GAIN_3 +43 0x767C //RX_FDEQ_GAIN_4 +44 0x7876 //RX_FDEQ_GAIN_5 +45 0x7878 //RX_FDEQ_GAIN_6 +46 0x797C //RX_FDEQ_GAIN_7 +47 0x7E82 //RX_FDEQ_GAIN_8 +48 0x7C80 //RX_FDEQ_GAIN_9 49 0x4848 //RX_FDEQ_GAIN_10 50 0x4848 //RX_FDEQ_GAIN_11 51 0x4848 //RX_FDEQ_GAIN_12 @@ -6569,8 +9386,8 @@ 61 0x4848 //RX_FDEQ_GAIN_22 62 0x4848 //RX_FDEQ_GAIN_23 63 0x0202 //RX_FDEQ_BIN_0 -64 0x0203 //RX_FDEQ_BIN_1 -65 0x0303 //RX_FDEQ_BIN_2 +64 0x0204 //RX_FDEQ_BIN_1 +65 0x0203 //RX_FDEQ_BIN_2 66 0x0304 //RX_FDEQ_BIN_3 67 0x0405 //RX_FDEQ_BIN_4 68 0x0506 //RX_FDEQ_BIN_5 @@ -6616,7 +9433,7 @@ 108 0x5333 //RX_FDDRC_SLANT_1_2 109 0x5333 //RX_FDDRC_SLANT_1_3 110 0x0000 //RX_FDDRC_RESRV_0 -129 0x001C //RX_SPK_VOL +129 0x001A //RX_SPK_VOL 130 0x0000 //RX_VOL_RESRV_0 #VOL 3 6 0x1000 //RX_TDDRC_ALPHA_UP_1 @@ -6644,15 +9461,15 @@ 124 0x055F //RX_TDDRC_DRC_GAIN 38 0x0014 //RX_FDEQ_SUBNUM 39 0x4840 //RX_FDEQ_GAIN_0 -40 0x3E3E //RX_FDEQ_GAIN_1 -41 0x4E62 //RX_FDEQ_GAIN_2 -42 0x6C7A //RX_FDEQ_GAIN_3 -43 0x8690 //RX_FDEQ_GAIN_4 -44 0x867E //RX_FDEQ_GAIN_5 -45 0x7E7E //RX_FDEQ_GAIN_6 -46 0x8080 //RX_FDEQ_GAIN_7 -47 0x8088 //RX_FDEQ_GAIN_8 -48 0x838B //RX_FDEQ_GAIN_9 +40 0x3E40 //RX_FDEQ_GAIN_1 +41 0x4D5A //RX_FDEQ_GAIN_2 +42 0x606C //RX_FDEQ_GAIN_3 +43 0x767C //RX_FDEQ_GAIN_4 +44 0x7876 //RX_FDEQ_GAIN_5 +45 0x7878 //RX_FDEQ_GAIN_6 +46 0x797C //RX_FDEQ_GAIN_7 +47 0x7E82 //RX_FDEQ_GAIN_8 +48 0x7C80 //RX_FDEQ_GAIN_9 49 0x4848 //RX_FDEQ_GAIN_10 50 0x4848 //RX_FDEQ_GAIN_11 51 0x4848 //RX_FDEQ_GAIN_12 @@ -6668,8 +9485,8 @@ 61 0x4848 //RX_FDEQ_GAIN_22 62 0x4848 //RX_FDEQ_GAIN_23 63 0x0202 //RX_FDEQ_BIN_0 -64 0x0203 //RX_FDEQ_BIN_1 -65 0x0303 //RX_FDEQ_BIN_2 +64 0x0204 //RX_FDEQ_BIN_1 +65 0x0203 //RX_FDEQ_BIN_2 66 0x0304 //RX_FDEQ_BIN_3 67 0x0405 //RX_FDEQ_BIN_4 68 0x0506 //RX_FDEQ_BIN_5 @@ -6715,7 +9532,7 @@ 108 0x5333 //RX_FDDRC_SLANT_1_2 109 0x5333 //RX_FDDRC_SLANT_1_3 110 0x0000 //RX_FDDRC_RESRV_0 -129 0x002E //RX_SPK_VOL +129 0x0033 //RX_SPK_VOL 130 0x0000 //RX_VOL_RESRV_0 #VOL 4 6 0x1000 //RX_TDDRC_ALPHA_UP_1 @@ -6743,15 +9560,15 @@ 124 0x055F //RX_TDDRC_DRC_GAIN 38 0x0014 //RX_FDEQ_SUBNUM 39 0x4840 //RX_FDEQ_GAIN_0 -40 0x3E3E //RX_FDEQ_GAIN_1 -41 0x4E62 //RX_FDEQ_GAIN_2 -42 0x6C7A //RX_FDEQ_GAIN_3 -43 0x8690 //RX_FDEQ_GAIN_4 -44 0x867E //RX_FDEQ_GAIN_5 -45 0x7E7E //RX_FDEQ_GAIN_6 -46 0x8080 //RX_FDEQ_GAIN_7 -47 0x8088 //RX_FDEQ_GAIN_8 -48 0x838B //RX_FDEQ_GAIN_9 +40 0x3E40 //RX_FDEQ_GAIN_1 +41 0x4D5A //RX_FDEQ_GAIN_2 +42 0x606C //RX_FDEQ_GAIN_3 +43 0x767C //RX_FDEQ_GAIN_4 +44 0x7876 //RX_FDEQ_GAIN_5 +45 0x7878 //RX_FDEQ_GAIN_6 +46 0x797C //RX_FDEQ_GAIN_7 +47 0x7E82 //RX_FDEQ_GAIN_8 +48 0x7C80 //RX_FDEQ_GAIN_9 49 0x4848 //RX_FDEQ_GAIN_10 50 0x4848 //RX_FDEQ_GAIN_11 51 0x4848 //RX_FDEQ_GAIN_12 @@ -6767,8 +9584,8 @@ 61 0x4848 //RX_FDEQ_GAIN_22 62 0x4848 //RX_FDEQ_GAIN_23 63 0x0202 //RX_FDEQ_BIN_0 -64 0x0203 //RX_FDEQ_BIN_1 -65 0x0303 //RX_FDEQ_BIN_2 +64 0x0204 //RX_FDEQ_BIN_1 +65 0x0203 //RX_FDEQ_BIN_2 66 0x0304 //RX_FDEQ_BIN_3 67 0x0405 //RX_FDEQ_BIN_4 68 0x0506 //RX_FDEQ_BIN_5 @@ -6814,7 +9631,7 @@ 108 0x5333 //RX_FDDRC_SLANT_1_2 109 0x5333 //RX_FDDRC_SLANT_1_3 110 0x0000 //RX_FDDRC_RESRV_0 -129 0x004B //RX_SPK_VOL +129 0x0045 //RX_SPK_VOL 130 0x0000 //RX_VOL_RESRV_0 #VOL 5 6 0x1000 //RX_TDDRC_ALPHA_UP_1 @@ -6842,15 +9659,15 @@ 124 0x055F //RX_TDDRC_DRC_GAIN 38 0x0014 //RX_FDEQ_SUBNUM 39 0x4840 //RX_FDEQ_GAIN_0 -40 0x3E3E //RX_FDEQ_GAIN_1 -41 0x4E62 //RX_FDEQ_GAIN_2 -42 0x6C7A //RX_FDEQ_GAIN_3 -43 0x8690 //RX_FDEQ_GAIN_4 -44 0x867E //RX_FDEQ_GAIN_5 -45 0x7E7E //RX_FDEQ_GAIN_6 -46 0x8080 //RX_FDEQ_GAIN_7 -47 0x8088 //RX_FDEQ_GAIN_8 -48 0x838B //RX_FDEQ_GAIN_9 +40 0x3E40 //RX_FDEQ_GAIN_1 +41 0x4D5A //RX_FDEQ_GAIN_2 +42 0x606C //RX_FDEQ_GAIN_3 +43 0x767C //RX_FDEQ_GAIN_4 +44 0x7876 //RX_FDEQ_GAIN_5 +45 0x7878 //RX_FDEQ_GAIN_6 +46 0x797C //RX_FDEQ_GAIN_7 +47 0x7E82 //RX_FDEQ_GAIN_8 +48 0x7C80 //RX_FDEQ_GAIN_9 49 0x4848 //RX_FDEQ_GAIN_10 50 0x4848 //RX_FDEQ_GAIN_11 51 0x4848 //RX_FDEQ_GAIN_12 @@ -6866,8 +9683,8 @@ 61 0x4848 //RX_FDEQ_GAIN_22 62 0x4848 //RX_FDEQ_GAIN_23 63 0x0202 //RX_FDEQ_BIN_0 -64 0x0203 //RX_FDEQ_BIN_1 -65 0x0303 //RX_FDEQ_BIN_2 +64 0x0204 //RX_FDEQ_BIN_1 +65 0x0203 //RX_FDEQ_BIN_2 66 0x0304 //RX_FDEQ_BIN_3 67 0x0405 //RX_FDEQ_BIN_4 68 0x0506 //RX_FDEQ_BIN_5 @@ -6913,7 +9730,7 @@ 108 0x5333 //RX_FDDRC_SLANT_1_2 109 0x5333 //RX_FDDRC_SLANT_1_3 110 0x0000 //RX_FDDRC_RESRV_0 -129 0x007B //RX_SPK_VOL +129 0x0074 //RX_SPK_VOL 130 0x0000 //RX_VOL_RESRV_0 #VOL 6 6 0x1000 //RX_TDDRC_ALPHA_UP_1 @@ -6941,15 +9758,15 @@ 124 0x055F //RX_TDDRC_DRC_GAIN 38 0x0014 //RX_FDEQ_SUBNUM 39 0x4840 //RX_FDEQ_GAIN_0 -40 0x3E3E //RX_FDEQ_GAIN_1 -41 0x4E62 //RX_FDEQ_GAIN_2 -42 0x6C7A //RX_FDEQ_GAIN_3 -43 0x8690 //RX_FDEQ_GAIN_4 -44 0x867E //RX_FDEQ_GAIN_5 -45 0x7E7E //RX_FDEQ_GAIN_6 -46 0x8080 //RX_FDEQ_GAIN_7 -47 0x8088 //RX_FDEQ_GAIN_8 -48 0x838B //RX_FDEQ_GAIN_9 +40 0x3E40 //RX_FDEQ_GAIN_1 +41 0x4D5A //RX_FDEQ_GAIN_2 +42 0x606C //RX_FDEQ_GAIN_3 +43 0x767C //RX_FDEQ_GAIN_4 +44 0x7876 //RX_FDEQ_GAIN_5 +45 0x7878 //RX_FDEQ_GAIN_6 +46 0x797C //RX_FDEQ_GAIN_7 +47 0x7E82 //RX_FDEQ_GAIN_8 +48 0x7C80 //RX_FDEQ_GAIN_9 49 0x4848 //RX_FDEQ_GAIN_10 50 0x4848 //RX_FDEQ_GAIN_11 51 0x4848 //RX_FDEQ_GAIN_12 @@ -6965,8 +9782,8 @@ 61 0x4848 //RX_FDEQ_GAIN_22 62 0x4848 //RX_FDEQ_GAIN_23 63 0x0202 //RX_FDEQ_BIN_0 -64 0x0203 //RX_FDEQ_BIN_1 -65 0x0303 //RX_FDEQ_BIN_2 +64 0x0204 //RX_FDEQ_BIN_1 +65 0x0203 //RX_FDEQ_BIN_2 66 0x0304 //RX_FDEQ_BIN_3 67 0x0405 //RX_FDEQ_BIN_4 68 0x0506 //RX_FDEQ_BIN_5 @@ -7014,10 +9831,862 @@ 110 0x0000 //RX_FDDRC_RESRV_0 129 0x0100 //RX_SPK_VOL 130 0x0000 //RX_VOL_RESRV_0 +#RX 2 +157 0x003C //RX_RECVFUNC_MODE_0 +158 0x0000 //RX_RECVFUNC_MODE_1 +159 0x0000 //RX_SAMPLINGFREQ_SIG +160 0x0000 //RX_SAMPLINGFREQ_PROC +161 0x000A //RX_FRAME_SZ +162 0x0000 //RX_DELAY_OPT +163 0x1000 //RX_TDDRC_ALPHA_UP_1 +164 0x1000 //RX_TDDRC_ALPHA_UP_2 +165 0x1000 //RX_TDDRC_ALPHA_UP_3 +166 0x1000 //RX_TDDRC_ALPHA_UP_4 +167 0x0600 //RX_PGA +168 0x7FFF //RX_A_HP +169 0x4000 //RX_B_PE +170 0x7800 //RX_THR_PITCH_DET_0 +171 0x7000 //RX_THR_PITCH_DET_1 +172 0x6000 //RX_THR_PITCH_DET_2 +173 0x0008 //RX_PITCH_BFR_LEN +174 0x0003 //RX_SBD_PITCH_DET +175 0x0100 //RX_PP_RESRV_0 +176 0x0020 //RX_PP_RESRV_1 +177 0x0400 //RX_N_SN_EST +178 0x000C //RX_N2_SN_EST +179 0x0014 //RX_NS_LVL_CTRL +180 0xF800 //RX_THR_SN_EST +181 0x7E00 //RX_LAMBDA_PFILT +182 0x000A //RX_FENS_RESRV_0 +183 0x0190 //RX_FENS_RESRV_1 +184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +187 0x0002 //RX_EXTRA_NS_L +188 0x0800 //RX_EXTRA_NS_A +189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +190 0x7000 //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +192 0x199A //RX_A_POST_FLT +193 0x0000 //RX_LMT_THRD +194 0x4000 //RX_LMT_ALPHA +195 0x0014 //RX_FDEQ_SUBNUM +196 0x4840 //RX_FDEQ_GAIN_0 +197 0x3E40 //RX_FDEQ_GAIN_1 +198 0x515E //RX_FDEQ_GAIN_2 +199 0x6470 //RX_FDEQ_GAIN_3 +200 0x7A84 //RX_FDEQ_GAIN_4 +201 0x7C7A //RX_FDEQ_GAIN_5 +202 0x7C7C //RX_FDEQ_GAIN_6 +203 0x7D7C //RX_FDEQ_GAIN_7 +204 0x7E82 //RX_FDEQ_GAIN_8 +205 0x7C80 //RX_FDEQ_GAIN_9 +206 0x4848 //RX_FDEQ_GAIN_10 +207 0x4848 //RX_FDEQ_GAIN_11 +208 0x4848 //RX_FDEQ_GAIN_12 +209 0x4848 //RX_FDEQ_GAIN_13 +210 0x4848 //RX_FDEQ_GAIN_14 +211 0x4848 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0202 //RX_FDEQ_BIN_0 +221 0x0204 //RX_FDEQ_BIN_1 +222 0x0203 //RX_FDEQ_BIN_2 +223 0x0304 //RX_FDEQ_BIN_3 +224 0x0405 //RX_FDEQ_BIN_4 +225 0x0506 //RX_FDEQ_BIN_5 +226 0x0708 //RX_FDEQ_BIN_6 +227 0x090A //RX_FDEQ_BIN_7 +228 0x0B0C //RX_FDEQ_BIN_8 +229 0x0D08 //RX_FDEQ_BIN_9 +230 0x0000 //RX_FDEQ_BIN_10 +231 0x0000 //RX_FDEQ_BIN_11 +232 0x0000 //RX_FDEQ_BIN_12 +233 0x0000 //RX_FDEQ_BIN_13 +234 0x0000 //RX_FDEQ_BIN_14 +235 0x0000 //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x4000 //RX_FDEQ_RESRV_0 +245 0x0320 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0030 //RX_FDDRC_BAND_MARGIN_1 +248 0x0050 //RX_FDDRC_BAND_MARGIN_2 +249 0x0080 //RX_FDDRC_BAND_MARGIN_3 +250 0x0007 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x5000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x6400 //RX_FDDRC_THRD_3_2 +258 0x6400 //RX_FDDRC_THRD_3_3 +259 0x2000 //RX_FDDRC_SLANT_0_0 +260 0x2000 //RX_FDDRC_SLANT_0_1 +261 0x2000 //RX_FDDRC_SLANT_0_2 +262 0x2000 //RX_FDDRC_SLANT_0_3 +263 0x5333 //RX_FDDRC_SLANT_1_0 +264 0x5333 //RX_FDDRC_SLANT_1_1 +265 0x5333 //RX_FDDRC_SLANT_1_2 +266 0x5333 //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +268 0x0002 //RX_FILTINDX +269 0x0000 //RX_TDDRC_THRD_0 +270 0x0000 //RX_TDDRC_THRD_1 +271 0x1800 //RX_TDDRC_THRD_2 +272 0x1800 //RX_TDDRC_THRD_3 +273 0x3000 //RX_TDDRC_SLANT_0 +274 0x6E00 //RX_TDDRC_SLANT_1 +275 0x1000 //RX_TDDRC_ALPHA_UP_0 +276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x199A //RX_TDDRC_HMNC_GAIN +279 0x0001 //RX_TDDRC_SMT_FLAG +280 0x0CCD //RX_TDDRC_SMT_W +281 0x055F //RX_TDDRC_DRC_GAIN +282 0x7C00 //RX_LAMBDA_PKA_FP +283 0x13E0 //RX_TPKA_FP +284 0x0080 //RX_MIN_G_FP +285 0x2000 //RX_MAX_G_FP +286 0x000A //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 +288 0x0000 //RX_MAXLEVEL_CNG +289 0x3000 //RX_BWE_UV_TH +290 0x3000 //RX_BWE_UV_TH2 +291 0x1800 //RX_BWE_UV_TH3 +292 0x1000 //RX_BWE_V_TH +293 0x04CD //RX_BWE_GAIN1_V_TH1 +294 0x0F33 //RX_BWE_GAIN1_V_TH2 +295 0x7333 //RX_BWE_UV_EQ +296 0x199A //RX_BWE_V_EQ +297 0x7333 //RX_BWE_TONE_TH +298 0x0004 //RX_BWE_UV_HOLD_T +299 0x6CCD //RX_BWE_GAIN2_ALPHA +300 0x799A //RX_BWE_GAIN3_ALPHA +301 0x001E //RX_BWE_CUTOFF +302 0x3000 //RX_BWE_GAINFILL +303 0x3200 //RX_BWE_MAXTH_TONE +304 0x2000 //RX_BWE_EQ_0 +305 0x2000 //RX_BWE_EQ_1 +306 0x2000 //RX_BWE_EQ_2 +307 0x2000 //RX_BWE_EQ_3 +308 0x2000 //RX_BWE_EQ_4 +309 0x2000 //RX_BWE_EQ_5 +310 0x2000 //RX_BWE_EQ_6 +311 0x0000 //RX_BWE_RESRV_0 +312 0x0000 //RX_BWE_RESRV_1 +313 0x0000 //RX_BWE_RESRV_2 +#VOL 0 +163 0x1000 //RX_TDDRC_ALPHA_UP_1 +164 0x1000 //RX_TDDRC_ALPHA_UP_2 +165 0x1000 //RX_TDDRC_ALPHA_UP_3 +166 0x1000 //RX_TDDRC_ALPHA_UP_4 +184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +190 0x7000 //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +269 0x0000 //RX_TDDRC_THRD_0 +270 0x0000 //RX_TDDRC_THRD_1 +271 0x1800 //RX_TDDRC_THRD_2 +272 0x1800 //RX_TDDRC_THRD_3 +273 0x3000 //RX_TDDRC_SLANT_0 +274 0x6E00 //RX_TDDRC_SLANT_1 +275 0x1000 //RX_TDDRC_ALPHA_UP_0 +276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x199A //RX_TDDRC_HMNC_GAIN +279 0x0001 //RX_TDDRC_SMT_FLAG +280 0x0CCD //RX_TDDRC_SMT_W +281 0x055F //RX_TDDRC_DRC_GAIN +195 0x0014 //RX_FDEQ_SUBNUM +196 0x4840 //RX_FDEQ_GAIN_0 +197 0x3E40 //RX_FDEQ_GAIN_1 +198 0x515E //RX_FDEQ_GAIN_2 +199 0x6470 //RX_FDEQ_GAIN_3 +200 0x7A84 //RX_FDEQ_GAIN_4 +201 0x7C7A //RX_FDEQ_GAIN_5 +202 0x7C7C //RX_FDEQ_GAIN_6 +203 0x7D7C //RX_FDEQ_GAIN_7 +204 0x7E82 //RX_FDEQ_GAIN_8 +205 0x7C80 //RX_FDEQ_GAIN_9 +206 0x4848 //RX_FDEQ_GAIN_10 +207 0x4848 //RX_FDEQ_GAIN_11 +208 0x4848 //RX_FDEQ_GAIN_12 +209 0x4848 //RX_FDEQ_GAIN_13 +210 0x4848 //RX_FDEQ_GAIN_14 +211 0x4848 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0202 //RX_FDEQ_BIN_0 +221 0x0204 //RX_FDEQ_BIN_1 +222 0x0203 //RX_FDEQ_BIN_2 +223 0x0304 //RX_FDEQ_BIN_3 +224 0x0405 //RX_FDEQ_BIN_4 +225 0x0506 //RX_FDEQ_BIN_5 +226 0x0708 //RX_FDEQ_BIN_6 +227 0x090A //RX_FDEQ_BIN_7 +228 0x0B0C //RX_FDEQ_BIN_8 +229 0x0D08 //RX_FDEQ_BIN_9 +230 0x0000 //RX_FDEQ_BIN_10 +231 0x0000 //RX_FDEQ_BIN_11 +232 0x0000 //RX_FDEQ_BIN_12 +233 0x0000 //RX_FDEQ_BIN_13 +234 0x0000 //RX_FDEQ_BIN_14 +235 0x0000 //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x4000 //RX_FDEQ_RESRV_0 +245 0x0320 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0030 //RX_FDDRC_BAND_MARGIN_1 +248 0x0050 //RX_FDDRC_BAND_MARGIN_2 +249 0x0080 //RX_FDDRC_BAND_MARGIN_3 +250 0x0007 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x5000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x6400 //RX_FDDRC_THRD_3_2 +258 0x6400 //RX_FDDRC_THRD_3_3 +259 0x2000 //RX_FDDRC_SLANT_0_0 +260 0x2000 //RX_FDDRC_SLANT_0_1 +261 0x2000 //RX_FDDRC_SLANT_0_2 +262 0x2000 //RX_FDDRC_SLANT_0_3 +263 0x5333 //RX_FDDRC_SLANT_1_0 +264 0x5333 //RX_FDDRC_SLANT_1_1 +265 0x5333 //RX_FDDRC_SLANT_1_2 +266 0x5333 //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +286 0x000A //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 +#VOL 1 +163 0x1000 //RX_TDDRC_ALPHA_UP_1 +164 0x1000 //RX_TDDRC_ALPHA_UP_2 +165 0x1000 //RX_TDDRC_ALPHA_UP_3 +166 0x1000 //RX_TDDRC_ALPHA_UP_4 +184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +190 0x7000 //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +269 0x0000 //RX_TDDRC_THRD_0 +270 0x0000 //RX_TDDRC_THRD_1 +271 0x1800 //RX_TDDRC_THRD_2 +272 0x1800 //RX_TDDRC_THRD_3 +273 0x3000 //RX_TDDRC_SLANT_0 +274 0x6E00 //RX_TDDRC_SLANT_1 +275 0x1000 //RX_TDDRC_ALPHA_UP_0 +276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x199A //RX_TDDRC_HMNC_GAIN +279 0x0001 //RX_TDDRC_SMT_FLAG +280 0x0CCD //RX_TDDRC_SMT_W +281 0x055F //RX_TDDRC_DRC_GAIN +195 0x0014 //RX_FDEQ_SUBNUM +196 0x4840 //RX_FDEQ_GAIN_0 +197 0x3E40 //RX_FDEQ_GAIN_1 +198 0x515E //RX_FDEQ_GAIN_2 +199 0x6470 //RX_FDEQ_GAIN_3 +200 0x7A84 //RX_FDEQ_GAIN_4 +201 0x7C7A //RX_FDEQ_GAIN_5 +202 0x7C7C //RX_FDEQ_GAIN_6 +203 0x7D7C //RX_FDEQ_GAIN_7 +204 0x7E82 //RX_FDEQ_GAIN_8 +205 0x7C80 //RX_FDEQ_GAIN_9 +206 0x4848 //RX_FDEQ_GAIN_10 +207 0x4848 //RX_FDEQ_GAIN_11 +208 0x4848 //RX_FDEQ_GAIN_12 +209 0x4848 //RX_FDEQ_GAIN_13 +210 0x4848 //RX_FDEQ_GAIN_14 +211 0x4848 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0202 //RX_FDEQ_BIN_0 +221 0x0204 //RX_FDEQ_BIN_1 +222 0x0203 //RX_FDEQ_BIN_2 +223 0x0304 //RX_FDEQ_BIN_3 +224 0x0405 //RX_FDEQ_BIN_4 +225 0x0506 //RX_FDEQ_BIN_5 +226 0x0708 //RX_FDEQ_BIN_6 +227 0x090A //RX_FDEQ_BIN_7 +228 0x0B0C //RX_FDEQ_BIN_8 +229 0x0D08 //RX_FDEQ_BIN_9 +230 0x0000 //RX_FDEQ_BIN_10 +231 0x0000 //RX_FDEQ_BIN_11 +232 0x0000 //RX_FDEQ_BIN_12 +233 0x0000 //RX_FDEQ_BIN_13 +234 0x0000 //RX_FDEQ_BIN_14 +235 0x0000 //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x4000 //RX_FDEQ_RESRV_0 +245 0x0320 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0030 //RX_FDDRC_BAND_MARGIN_1 +248 0x0050 //RX_FDDRC_BAND_MARGIN_2 +249 0x0080 //RX_FDDRC_BAND_MARGIN_3 +250 0x0007 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x5000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x6400 //RX_FDDRC_THRD_3_2 +258 0x6400 //RX_FDDRC_THRD_3_3 +259 0x2000 //RX_FDDRC_SLANT_0_0 +260 0x2000 //RX_FDDRC_SLANT_0_1 +261 0x2000 //RX_FDDRC_SLANT_0_2 +262 0x2000 //RX_FDDRC_SLANT_0_3 +263 0x5333 //RX_FDDRC_SLANT_1_0 +264 0x5333 //RX_FDDRC_SLANT_1_1 +265 0x5333 //RX_FDDRC_SLANT_1_2 +266 0x5333 //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +286 0x0010 //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 +#VOL 2 +163 0x1000 //RX_TDDRC_ALPHA_UP_1 +164 0x1000 //RX_TDDRC_ALPHA_UP_2 +165 0x1000 //RX_TDDRC_ALPHA_UP_3 +166 0x1000 //RX_TDDRC_ALPHA_UP_4 +184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +190 0x7000 //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +269 0x0000 //RX_TDDRC_THRD_0 +270 0x0000 //RX_TDDRC_THRD_1 +271 0x1800 //RX_TDDRC_THRD_2 +272 0x1800 //RX_TDDRC_THRD_3 +273 0x3000 //RX_TDDRC_SLANT_0 +274 0x6E00 //RX_TDDRC_SLANT_1 +275 0x1000 //RX_TDDRC_ALPHA_UP_0 +276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x199A //RX_TDDRC_HMNC_GAIN +279 0x0001 //RX_TDDRC_SMT_FLAG +280 0x0CCD //RX_TDDRC_SMT_W +281 0x055F //RX_TDDRC_DRC_GAIN +195 0x0014 //RX_FDEQ_SUBNUM +196 0x4840 //RX_FDEQ_GAIN_0 +197 0x3E40 //RX_FDEQ_GAIN_1 +198 0x515E //RX_FDEQ_GAIN_2 +199 0x6470 //RX_FDEQ_GAIN_3 +200 0x7A84 //RX_FDEQ_GAIN_4 +201 0x7C7A //RX_FDEQ_GAIN_5 +202 0x7C7C //RX_FDEQ_GAIN_6 +203 0x7D7C //RX_FDEQ_GAIN_7 +204 0x7E82 //RX_FDEQ_GAIN_8 +205 0x7C80 //RX_FDEQ_GAIN_9 +206 0x4848 //RX_FDEQ_GAIN_10 +207 0x4848 //RX_FDEQ_GAIN_11 +208 0x4848 //RX_FDEQ_GAIN_12 +209 0x4848 //RX_FDEQ_GAIN_13 +210 0x4848 //RX_FDEQ_GAIN_14 +211 0x4848 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0202 //RX_FDEQ_BIN_0 +221 0x0204 //RX_FDEQ_BIN_1 +222 0x0203 //RX_FDEQ_BIN_2 +223 0x0304 //RX_FDEQ_BIN_3 +224 0x0405 //RX_FDEQ_BIN_4 +225 0x0506 //RX_FDEQ_BIN_5 +226 0x0708 //RX_FDEQ_BIN_6 +227 0x090A //RX_FDEQ_BIN_7 +228 0x0B0C //RX_FDEQ_BIN_8 +229 0x0D08 //RX_FDEQ_BIN_9 +230 0x0000 //RX_FDEQ_BIN_10 +231 0x0000 //RX_FDEQ_BIN_11 +232 0x0000 //RX_FDEQ_BIN_12 +233 0x0000 //RX_FDEQ_BIN_13 +234 0x0000 //RX_FDEQ_BIN_14 +235 0x0000 //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x4000 //RX_FDEQ_RESRV_0 +245 0x0320 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0030 //RX_FDDRC_BAND_MARGIN_1 +248 0x0050 //RX_FDDRC_BAND_MARGIN_2 +249 0x0080 //RX_FDDRC_BAND_MARGIN_3 +250 0x0007 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x5000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x6400 //RX_FDDRC_THRD_3_2 +258 0x6400 //RX_FDDRC_THRD_3_3 +259 0x2000 //RX_FDDRC_SLANT_0_0 +260 0x2000 //RX_FDDRC_SLANT_0_1 +261 0x2000 //RX_FDDRC_SLANT_0_2 +262 0x2000 //RX_FDDRC_SLANT_0_3 +263 0x5333 //RX_FDDRC_SLANT_1_0 +264 0x5333 //RX_FDDRC_SLANT_1_1 +265 0x5333 //RX_FDDRC_SLANT_1_2 +266 0x5333 //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +286 0x001A //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 +#VOL 3 +163 0x1000 //RX_TDDRC_ALPHA_UP_1 +164 0x1000 //RX_TDDRC_ALPHA_UP_2 +165 0x1000 //RX_TDDRC_ALPHA_UP_3 +166 0x1000 //RX_TDDRC_ALPHA_UP_4 +184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +190 0x7000 //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +269 0x0000 //RX_TDDRC_THRD_0 +270 0x0000 //RX_TDDRC_THRD_1 +271 0x1800 //RX_TDDRC_THRD_2 +272 0x1800 //RX_TDDRC_THRD_3 +273 0x3000 //RX_TDDRC_SLANT_0 +274 0x6E00 //RX_TDDRC_SLANT_1 +275 0x1000 //RX_TDDRC_ALPHA_UP_0 +276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x199A //RX_TDDRC_HMNC_GAIN +279 0x0001 //RX_TDDRC_SMT_FLAG +280 0x0CCD //RX_TDDRC_SMT_W +281 0x055F //RX_TDDRC_DRC_GAIN +195 0x0014 //RX_FDEQ_SUBNUM +196 0x4840 //RX_FDEQ_GAIN_0 +197 0x3E40 //RX_FDEQ_GAIN_1 +198 0x515E //RX_FDEQ_GAIN_2 +199 0x6470 //RX_FDEQ_GAIN_3 +200 0x7A84 //RX_FDEQ_GAIN_4 +201 0x7C7A //RX_FDEQ_GAIN_5 +202 0x7C7C //RX_FDEQ_GAIN_6 +203 0x7D7C //RX_FDEQ_GAIN_7 +204 0x7E82 //RX_FDEQ_GAIN_8 +205 0x7C80 //RX_FDEQ_GAIN_9 +206 0x4848 //RX_FDEQ_GAIN_10 +207 0x4848 //RX_FDEQ_GAIN_11 +208 0x4848 //RX_FDEQ_GAIN_12 +209 0x4848 //RX_FDEQ_GAIN_13 +210 0x4848 //RX_FDEQ_GAIN_14 +211 0x4848 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0202 //RX_FDEQ_BIN_0 +221 0x0204 //RX_FDEQ_BIN_1 +222 0x0203 //RX_FDEQ_BIN_2 +223 0x0304 //RX_FDEQ_BIN_3 +224 0x0405 //RX_FDEQ_BIN_4 +225 0x0506 //RX_FDEQ_BIN_5 +226 0x0708 //RX_FDEQ_BIN_6 +227 0x090A //RX_FDEQ_BIN_7 +228 0x0B0C //RX_FDEQ_BIN_8 +229 0x0D08 //RX_FDEQ_BIN_9 +230 0x0000 //RX_FDEQ_BIN_10 +231 0x0000 //RX_FDEQ_BIN_11 +232 0x0000 //RX_FDEQ_BIN_12 +233 0x0000 //RX_FDEQ_BIN_13 +234 0x0000 //RX_FDEQ_BIN_14 +235 0x0000 //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x4000 //RX_FDEQ_RESRV_0 +245 0x0320 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0030 //RX_FDDRC_BAND_MARGIN_1 +248 0x0050 //RX_FDDRC_BAND_MARGIN_2 +249 0x0080 //RX_FDDRC_BAND_MARGIN_3 +250 0x0007 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x5000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x6400 //RX_FDDRC_THRD_3_2 +258 0x6400 //RX_FDDRC_THRD_3_3 +259 0x2000 //RX_FDDRC_SLANT_0_0 +260 0x2000 //RX_FDDRC_SLANT_0_1 +261 0x2000 //RX_FDDRC_SLANT_0_2 +262 0x2000 //RX_FDDRC_SLANT_0_3 +263 0x5333 //RX_FDDRC_SLANT_1_0 +264 0x5333 //RX_FDDRC_SLANT_1_1 +265 0x5333 //RX_FDDRC_SLANT_1_2 +266 0x5333 //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +286 0x0034 //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 +#VOL 4 +163 0x1000 //RX_TDDRC_ALPHA_UP_1 +164 0x1000 //RX_TDDRC_ALPHA_UP_2 +165 0x1000 //RX_TDDRC_ALPHA_UP_3 +166 0x1000 //RX_TDDRC_ALPHA_UP_4 +184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +190 0x7000 //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +269 0x0000 //RX_TDDRC_THRD_0 +270 0x0000 //RX_TDDRC_THRD_1 +271 0x1800 //RX_TDDRC_THRD_2 +272 0x1800 //RX_TDDRC_THRD_3 +273 0x3000 //RX_TDDRC_SLANT_0 +274 0x6E00 //RX_TDDRC_SLANT_1 +275 0x1000 //RX_TDDRC_ALPHA_UP_0 +276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x199A //RX_TDDRC_HMNC_GAIN +279 0x0001 //RX_TDDRC_SMT_FLAG +280 0x0CCD //RX_TDDRC_SMT_W +281 0x055F //RX_TDDRC_DRC_GAIN +195 0x0014 //RX_FDEQ_SUBNUM +196 0x4840 //RX_FDEQ_GAIN_0 +197 0x3E40 //RX_FDEQ_GAIN_1 +198 0x515E //RX_FDEQ_GAIN_2 +199 0x6470 //RX_FDEQ_GAIN_3 +200 0x7A84 //RX_FDEQ_GAIN_4 +201 0x7C7A //RX_FDEQ_GAIN_5 +202 0x7C7C //RX_FDEQ_GAIN_6 +203 0x7D7C //RX_FDEQ_GAIN_7 +204 0x7E82 //RX_FDEQ_GAIN_8 +205 0x7C80 //RX_FDEQ_GAIN_9 +206 0x4848 //RX_FDEQ_GAIN_10 +207 0x4848 //RX_FDEQ_GAIN_11 +208 0x4848 //RX_FDEQ_GAIN_12 +209 0x4848 //RX_FDEQ_GAIN_13 +210 0x4848 //RX_FDEQ_GAIN_14 +211 0x4848 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0202 //RX_FDEQ_BIN_0 +221 0x0204 //RX_FDEQ_BIN_1 +222 0x0203 //RX_FDEQ_BIN_2 +223 0x0304 //RX_FDEQ_BIN_3 +224 0x0405 //RX_FDEQ_BIN_4 +225 0x0506 //RX_FDEQ_BIN_5 +226 0x0708 //RX_FDEQ_BIN_6 +227 0x090A //RX_FDEQ_BIN_7 +228 0x0B0C //RX_FDEQ_BIN_8 +229 0x0D08 //RX_FDEQ_BIN_9 +230 0x0000 //RX_FDEQ_BIN_10 +231 0x0000 //RX_FDEQ_BIN_11 +232 0x0000 //RX_FDEQ_BIN_12 +233 0x0000 //RX_FDEQ_BIN_13 +234 0x0000 //RX_FDEQ_BIN_14 +235 0x0000 //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x4000 //RX_FDEQ_RESRV_0 +245 0x0320 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0030 //RX_FDDRC_BAND_MARGIN_1 +248 0x0050 //RX_FDDRC_BAND_MARGIN_2 +249 0x0080 //RX_FDDRC_BAND_MARGIN_3 +250 0x0007 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x5000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x6400 //RX_FDDRC_THRD_3_2 +258 0x6400 //RX_FDDRC_THRD_3_3 +259 0x2000 //RX_FDDRC_SLANT_0_0 +260 0x2000 //RX_FDDRC_SLANT_0_1 +261 0x2000 //RX_FDDRC_SLANT_0_2 +262 0x2000 //RX_FDDRC_SLANT_0_3 +263 0x5333 //RX_FDDRC_SLANT_1_0 +264 0x5333 //RX_FDDRC_SLANT_1_1 +265 0x5333 //RX_FDDRC_SLANT_1_2 +266 0x5333 //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +286 0x0045 //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 +#VOL 5 +163 0x1000 //RX_TDDRC_ALPHA_UP_1 +164 0x1000 //RX_TDDRC_ALPHA_UP_2 +165 0x1000 //RX_TDDRC_ALPHA_UP_3 +166 0x1000 //RX_TDDRC_ALPHA_UP_4 +184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +190 0x7000 //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +269 0x0000 //RX_TDDRC_THRD_0 +270 0x0000 //RX_TDDRC_THRD_1 +271 0x1800 //RX_TDDRC_THRD_2 +272 0x1800 //RX_TDDRC_THRD_3 +273 0x3000 //RX_TDDRC_SLANT_0 +274 0x6E00 //RX_TDDRC_SLANT_1 +275 0x1000 //RX_TDDRC_ALPHA_UP_0 +276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x199A //RX_TDDRC_HMNC_GAIN +279 0x0001 //RX_TDDRC_SMT_FLAG +280 0x0CCD //RX_TDDRC_SMT_W +281 0x055F //RX_TDDRC_DRC_GAIN +195 0x0014 //RX_FDEQ_SUBNUM +196 0x4840 //RX_FDEQ_GAIN_0 +197 0x3E40 //RX_FDEQ_GAIN_1 +198 0x515E //RX_FDEQ_GAIN_2 +199 0x6470 //RX_FDEQ_GAIN_3 +200 0x7A84 //RX_FDEQ_GAIN_4 +201 0x7C7A //RX_FDEQ_GAIN_5 +202 0x7C7C //RX_FDEQ_GAIN_6 +203 0x7D7C //RX_FDEQ_GAIN_7 +204 0x7E82 //RX_FDEQ_GAIN_8 +205 0x7C80 //RX_FDEQ_GAIN_9 +206 0x4848 //RX_FDEQ_GAIN_10 +207 0x4848 //RX_FDEQ_GAIN_11 +208 0x4848 //RX_FDEQ_GAIN_12 +209 0x4848 //RX_FDEQ_GAIN_13 +210 0x4848 //RX_FDEQ_GAIN_14 +211 0x4848 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0202 //RX_FDEQ_BIN_0 +221 0x0204 //RX_FDEQ_BIN_1 +222 0x0203 //RX_FDEQ_BIN_2 +223 0x0304 //RX_FDEQ_BIN_3 +224 0x0405 //RX_FDEQ_BIN_4 +225 0x0506 //RX_FDEQ_BIN_5 +226 0x0708 //RX_FDEQ_BIN_6 +227 0x090A //RX_FDEQ_BIN_7 +228 0x0B0C //RX_FDEQ_BIN_8 +229 0x0D08 //RX_FDEQ_BIN_9 +230 0x0000 //RX_FDEQ_BIN_10 +231 0x0000 //RX_FDEQ_BIN_11 +232 0x0000 //RX_FDEQ_BIN_12 +233 0x0000 //RX_FDEQ_BIN_13 +234 0x0000 //RX_FDEQ_BIN_14 +235 0x0000 //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x4000 //RX_FDEQ_RESRV_0 +245 0x0320 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0030 //RX_FDDRC_BAND_MARGIN_1 +248 0x0050 //RX_FDDRC_BAND_MARGIN_2 +249 0x0080 //RX_FDDRC_BAND_MARGIN_3 +250 0x0007 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x5000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x6400 //RX_FDDRC_THRD_3_2 +258 0x6400 //RX_FDDRC_THRD_3_3 +259 0x2000 //RX_FDDRC_SLANT_0_0 +260 0x2000 //RX_FDDRC_SLANT_0_1 +261 0x2000 //RX_FDDRC_SLANT_0_2 +262 0x2000 //RX_FDDRC_SLANT_0_3 +263 0x5333 //RX_FDDRC_SLANT_1_0 +264 0x5333 //RX_FDDRC_SLANT_1_1 +265 0x5333 //RX_FDDRC_SLANT_1_2 +266 0x5333 //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +286 0x0074 //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 +#VOL 6 +163 0x1000 //RX_TDDRC_ALPHA_UP_1 +164 0x1000 //RX_TDDRC_ALPHA_UP_2 +165 0x1000 //RX_TDDRC_ALPHA_UP_3 +166 0x1000 //RX_TDDRC_ALPHA_UP_4 +184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +190 0x7000 //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +269 0x0000 //RX_TDDRC_THRD_0 +270 0x0000 //RX_TDDRC_THRD_1 +271 0x1800 //RX_TDDRC_THRD_2 +272 0x1800 //RX_TDDRC_THRD_3 +273 0x3000 //RX_TDDRC_SLANT_0 +274 0x6E00 //RX_TDDRC_SLANT_1 +275 0x1000 //RX_TDDRC_ALPHA_UP_0 +276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x199A //RX_TDDRC_HMNC_GAIN +279 0x0001 //RX_TDDRC_SMT_FLAG +280 0x0CCD //RX_TDDRC_SMT_W +281 0x055F //RX_TDDRC_DRC_GAIN +195 0x0014 //RX_FDEQ_SUBNUM +196 0x4840 //RX_FDEQ_GAIN_0 +197 0x3E40 //RX_FDEQ_GAIN_1 +198 0x515E //RX_FDEQ_GAIN_2 +199 0x6470 //RX_FDEQ_GAIN_3 +200 0x7A84 //RX_FDEQ_GAIN_4 +201 0x7C7A //RX_FDEQ_GAIN_5 +202 0x7C7C //RX_FDEQ_GAIN_6 +203 0x7D7C //RX_FDEQ_GAIN_7 +204 0x7E82 //RX_FDEQ_GAIN_8 +205 0x7C80 //RX_FDEQ_GAIN_9 +206 0x4848 //RX_FDEQ_GAIN_10 +207 0x4848 //RX_FDEQ_GAIN_11 +208 0x4848 //RX_FDEQ_GAIN_12 +209 0x4848 //RX_FDEQ_GAIN_13 +210 0x4848 //RX_FDEQ_GAIN_14 +211 0x4848 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0202 //RX_FDEQ_BIN_0 +221 0x0204 //RX_FDEQ_BIN_1 +222 0x0203 //RX_FDEQ_BIN_2 +223 0x0304 //RX_FDEQ_BIN_3 +224 0x0405 //RX_FDEQ_BIN_4 +225 0x0506 //RX_FDEQ_BIN_5 +226 0x0708 //RX_FDEQ_BIN_6 +227 0x090A //RX_FDEQ_BIN_7 +228 0x0B0C //RX_FDEQ_BIN_8 +229 0x0D08 //RX_FDEQ_BIN_9 +230 0x0000 //RX_FDEQ_BIN_10 +231 0x0000 //RX_FDEQ_BIN_11 +232 0x0000 //RX_FDEQ_BIN_12 +233 0x0000 //RX_FDEQ_BIN_13 +234 0x0000 //RX_FDEQ_BIN_14 +235 0x0000 //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x4000 //RX_FDEQ_RESRV_0 +245 0x0320 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0030 //RX_FDDRC_BAND_MARGIN_1 +248 0x0050 //RX_FDDRC_BAND_MARGIN_2 +249 0x0080 //RX_FDDRC_BAND_MARGIN_3 +250 0x0007 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x5000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x6400 //RX_FDDRC_THRD_3_2 +258 0x6400 //RX_FDDRC_THRD_3_3 +259 0x2000 //RX_FDDRC_SLANT_0_0 +260 0x2000 //RX_FDDRC_SLANT_0_1 +261 0x2000 //RX_FDDRC_SLANT_0_2 +262 0x2000 //RX_FDDRC_SLANT_0_3 +263 0x5333 //RX_FDDRC_SLANT_1_0 +264 0x5333 //RX_FDDRC_SLANT_1_1 +265 0x5333 //RX_FDDRC_SLANT_1_2 +266 0x5333 //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +286 0x0100 //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 #CASE_NAME HANDSET-HANDSET-VOICE_GENERIC-WB -#PARAM_TYPE TX+RX -#TOTAL_CUSTOM_STEP 7 +#PARAM_MODE FULL +#PARAM_TYPE TX+2RX +#TOTAL_CUSTOM_STEP 7+7 #TX 0 0x0000 //TX_OPERATION_MODE_0 1 0x0000 //TX_OPERATION_MODE_1 @@ -7040,7 +10709,7 @@ 18 0x0000 //TX_SYS_RESRV_2 19 0x0000 //TX_SYS_RESRV_3 20 0x0000 //TX_DIST2REF0 -21 0x009D //TX_DIST2REF1 +21 0x00A3 //TX_DIST2REF1 22 0x0000 //TX_DIST2REF_02 23 0x0000 //TX_DIST2REF_03 24 0x0000 //TX_DIST2REF_04 @@ -7270,16 +10939,16 @@ 248 0xF800 //TX_THR_SN_EST_6 249 0xF700 //TX_THR_SN_EST_7 250 0x0000 //TX_DELTA_THR_SN_EST_0 -251 0x0100 //TX_DELTA_THR_SN_EST_1 -252 0x01A0 //TX_DELTA_THR_SN_EST_2 +251 0x01A0 //TX_DELTA_THR_SN_EST_1 +252 0x0200 //TX_DELTA_THR_SN_EST_2 253 0x0200 //TX_DELTA_THR_SN_EST_3 -254 0x0200 //TX_DELTA_THR_SN_EST_4 -255 0x0100 //TX_DELTA_THR_SN_EST_5 -256 0x0200 //TX_DELTA_THR_SN_EST_6 +254 0x0100 //TX_DELTA_THR_SN_EST_4 +255 0x0200 //TX_DELTA_THR_SN_EST_5 +256 0x0100 //TX_DELTA_THR_SN_EST_6 257 0x0200 //TX_DELTA_THR_SN_EST_7 258 0x4000 //TX_LAMBDA_NN_EST_0 -259 0x4000 //TX_LAMBDA_NN_EST_1 -260 0x5000 //TX_LAMBDA_NN_EST_2 +259 0x5000 //TX_LAMBDA_NN_EST_1 +260 0x4000 //TX_LAMBDA_NN_EST_2 261 0x4000 //TX_LAMBDA_NN_EST_3 262 0x4000 //TX_LAMBDA_NN_EST_4 263 0x4000 //TX_LAMBDA_NN_EST_5 @@ -7301,18 +10970,18 @@ 279 0x1000 //TX_B_POST_FLT_0 280 0x4000 //TX_B_POST_FLT_1 281 0x0018 //TX_NS_LVL_CTRL_0 -282 0x001C //TX_NS_LVL_CTRL_1 -283 0x0019 //TX_NS_LVL_CTRL_2 -284 0x0018 //TX_NS_LVL_CTRL_3 -285 0x0019 //TX_NS_LVL_CTRL_4 -286 0x001A //TX_NS_LVL_CTRL_5 -287 0x001E //TX_NS_LVL_CTRL_6 +282 0x0019 //TX_NS_LVL_CTRL_1 +283 0x0018 //TX_NS_LVL_CTRL_2 +284 0x0019 //TX_NS_LVL_CTRL_3 +285 0x001A //TX_NS_LVL_CTRL_4 +286 0x001E //TX_NS_LVL_CTRL_5 +287 0x001C //TX_NS_LVL_CTRL_6 288 0x001C //TX_NS_LVL_CTRL_7 289 0x000E //TX_MIN_GAIN_S_0 -290 0x0018 //TX_MIN_GAIN_S_1 +290 0x0012 //TX_MIN_GAIN_S_1 291 0x0012 //TX_MIN_GAIN_S_2 292 0x0012 //TX_MIN_GAIN_S_3 -293 0x0012 //TX_MIN_GAIN_S_4 +293 0x0018 //TX_MIN_GAIN_S_4 294 0x0018 //TX_MIN_GAIN_S_5 295 0x0018 //TX_MIN_GAIN_S_6 296 0x0018 //TX_MIN_GAIN_S_7 @@ -7320,8 +10989,8 @@ 298 0x0000 //TX_NS_MAX_PRI_SNR_TH 299 0x0000 //TX_NMOS_SUP_MENSA 300 0x7FFF //TX_SNRI_SUP_0 -301 0x4000 //TX_SNRI_SUP_1 -302 0x5000 //TX_SNRI_SUP_2 +301 0x5000 //TX_SNRI_SUP_1 +302 0x4000 //TX_SNRI_SUP_2 303 0x4000 //TX_SNRI_SUP_3 304 0x4000 //TX_SNRI_SUP_4 305 0x4000 //TX_SNRI_SUP_5 @@ -7334,28 +11003,28 @@ 312 0x7FFF //TX_A_POST_FILT_0 313 0x2000 //TX_A_POST_FILT_1 314 0x7000 //TX_A_POST_FILT_S_0 -315 0x7000 //TX_A_POST_FILT_S_1 +315 0x3000 //TX_A_POST_FILT_S_1 316 0x3000 //TX_A_POST_FILT_S_2 -317 0x3000 //TX_A_POST_FILT_S_3 -318 0x2000 //TX_A_POST_FILT_S_4 +317 0x2000 //TX_A_POST_FILT_S_3 +318 0x7000 //TX_A_POST_FILT_S_4 319 0x7000 //TX_A_POST_FILT_S_5 320 0x7000 //TX_A_POST_FILT_S_6 321 0x7000 //TX_A_POST_FILT_S_7 322 0x1000 //TX_B_POST_FILT_0 323 0x4000 //TX_B_POST_FILT_1 -324 0x5000 //TX_B_POST_FILT_2 +324 0x4000 //TX_B_POST_FILT_2 325 0x4000 //TX_B_POST_FILT_3 326 0x4000 //TX_B_POST_FILT_4 327 0x4000 //TX_B_POST_FILT_5 -328 0x4000 //TX_B_POST_FILT_6 +328 0x5000 //TX_B_POST_FILT_6 329 0x4000 //TX_B_POST_FILT_7 330 0x4000 //TX_B_LESSCUT_RTO_S_0 331 0x6000 //TX_B_LESSCUT_RTO_S_1 332 0x6000 //TX_B_LESSCUT_RTO_S_2 333 0x6000 //TX_B_LESSCUT_RTO_S_3 -334 0x6000 //TX_B_LESSCUT_RTO_S_4 +334 0x7FFF //TX_B_LESSCUT_RTO_S_4 335 0x6000 //TX_B_LESSCUT_RTO_S_5 -336 0x7FFF //TX_B_LESSCUT_RTO_S_6 +336 0x6000 //TX_B_LESSCUT_RTO_S_6 337 0x7FFF //TX_B_LESSCUT_RTO_S_7 338 0x7C29 //TX_LAMBDA_PFILT 339 0x7C29 //TX_LAMBDA_PFILT_S_0 @@ -7387,8 +11056,8 @@ 365 0x0001 //TX_NOISEDET 366 0x0190 //TX_NDETCT 367 0x000A //TX_NOISE_TH_0 -368 0x1B58 //TX_NOISE_TH_0_2 -369 0x2134 //TX_NOISE_TH_0_3 +368 0x7FFF //TX_NOISE_TH_0_2 +369 0x7FFF //TX_NOISE_TH_0_3 370 0x0139 //TX_NOISE_TH_1 371 0x0479 //TX_NOISE_TH_2 372 0x2328 //TX_NOISE_TH_3 @@ -7399,10 +11068,10 @@ 377 0x4E20 //TX_NOISE_TH_5_4 378 0x21E8 //TX_NOISE_TH_6 379 0x0014 //TX_MINENOISE_TH -380 0x4000 //TX_MINENOISE_MIC0_TH_MTS -381 0xFFEE //TX_MINENOISE_MIC0_TH_EXP -382 0x6000 //TX_MINENOISE_MIC0_S_TH_MTS -383 0xFFF3 //TX_MINENOISE_MIC0_S_TH_EXP +380 0xD508 //TX_MORENS_TFMASK_TH +381 0x0001 //TX_DRC_QUIET_FLOOR +382 0x6D60 //TX_RATIODTL_CUT_TH +383 0x0DAC //TX_DT_CUT_K1 384 0x00A5 //TX_OUT_ENER_S_TH_CLEAN 385 0x00A5 //TX_OUT_ENER_S_TH_LESSCLEAN 386 0x00A5 //TX_OUT_ENER_S_TH_NOISY @@ -7410,15 +11079,15 @@ 388 0x00CE //TX_OUT_ENER_TH_SPEECH 389 0x2000 //TX_SN_NPB_GAIN 390 0x0000 //TX_NN_NPB_GAIN -391 0x0000 //TX_CSX_ALPHA_0 -392 0x0000 //TX_CSX_ALPHA_1 -393 0x0000 //TX_CSX_ALPHA_2 -394 0x0000 //TX_CSX_ALPHA_3 -395 0x0800 //TX_MU_ARSP_EST -396 0x00C8 //TX_P_OUTBEAM_MIN_TH +391 0x3000 //TX_POST_MASK_SUP_HSNE +392 0x07D0 //TX_TAIL_DET_TH +393 0x4000 //TX_B_LESSCUT_RTO_WTA +394 0x0000 //TX_MEL_G_R +395 0x0080 //TX_SUPHIGH_TH +396 0x4000 //TX_MASK_G_R 397 0x0002 //TX_EXTRA_NS_L -398 0x0800 //TX_EXTRA_NS_A -399 0x0005 //TX_VR_NOISE_FLOOR_TH +398 0x1800 //TX_C_POST_FLT_MASK +399 0x7FFF //TX_A_POST_FLT_WNS 400 0x0148 //TX_MIN_G_LOW300HZ 401 0x0004 //TX_MAXLEVEL_CNG 402 0x00B4 //TX_STN_NOISE_TH @@ -7533,16 +11202,16 @@ 511 0x6666 //TX_MIC_TO_BFGAIN 512 0x0000 //TX_MICTOBFGAIN0 513 0x0000 //TX_FASTMUE_TH -514 0x0000 //TX_DERVB_LEN_0 -515 0x0000 //TX_DERVB_LEN_1 -516 0x0000 //TX_RHO_DERVB -517 0x0000 //TX_MIC_INDX_DERVB -518 0x0000 //TX_MU_DERVB -519 0x0000 //TX_DR_RESRV_0 -520 0x0000 //TX_DR_RESRV_1 -521 0x0000 //TX_DR_RESRV_2 -522 0x0000 //TX_DR_RESRV_3 -523 0x0000 //TX_DR_RESRV_4 +514 0x3000 //TX_DEREVERB_LF_MU +515 0x34CD //TX_DEREVERB_HF_MU +516 0x0007 //TX_DEREVERB_DELAY +517 0x0004 //TX_DEREVERB_COEF_LEN +518 0x0003 //TX_DEREVERB_DNR +519 0x0000 //TX_DEREVERB_ALPHA +520 0x0000 //TX_DEREVERB_BETA +521 0x0000 //TX_GSC_RTOL_TH +522 0x0000 //TX_GSC_RTOH_TH +523 0x7E2C //TX_WIDE2_MEANHTH 524 0x0000 //TX_DR_RESRV_5 525 0x0000 //TX_DR_RESRV_6 526 0x0000 //TX_DR_RESRV_7 @@ -7595,11 +11264,11 @@ 573 0x4B53 //TX_FDEQ_GAIN_6 574 0x564A //TX_FDEQ_GAIN_7 575 0x3D3A //TX_FDEQ_GAIN_8 -576 0x3838 //TX_FDEQ_GAIN_9 -577 0x3836 //TX_FDEQ_GAIN_10 -578 0x3633 //TX_FDEQ_GAIN_11 -579 0x3838 //TX_FDEQ_GAIN_12 -580 0x4048 //TX_FDEQ_GAIN_13 +576 0x3B3C //TX_FDEQ_GAIN_9 +577 0x3C36 //TX_FDEQ_GAIN_10 +578 0x3636 //TX_FDEQ_GAIN_11 +579 0x3D3E //TX_FDEQ_GAIN_12 +580 0x4548 //TX_FDEQ_GAIN_13 581 0x4848 //TX_FDEQ_GAIN_14 582 0x4848 //TX_FDEQ_GAIN_15 583 0x4848 //TX_FDEQ_GAIN_16 @@ -7643,12 +11312,12 @@ 621 0x4848 //TX_PREEQ_GAIN_MIC0_4 622 0x4848 //TX_PREEQ_GAIN_MIC0_5 623 0x4848 //TX_PREEQ_GAIN_MIC0_6 -624 0x4846 //TX_PREEQ_GAIN_MIC0_7 -625 0x4544 //TX_PREEQ_GAIN_MIC0_8 -626 0x4241 //TX_PREEQ_GAIN_MIC0_9 -627 0x403E //TX_PREEQ_GAIN_MIC0_10 -628 0x3D3C //TX_PREEQ_GAIN_MIC0_11 -629 0x3C3C //TX_PREEQ_GAIN_MIC0_12 +624 0x4848 //TX_PREEQ_GAIN_MIC0_7 +625 0x4848 //TX_PREEQ_GAIN_MIC0_8 +626 0x4848 //TX_PREEQ_GAIN_MIC0_9 +627 0x4848 //TX_PREEQ_GAIN_MIC0_10 +628 0x4848 //TX_PREEQ_GAIN_MIC0_11 +629 0x4848 //TX_PREEQ_GAIN_MIC0_12 630 0x4848 //TX_PREEQ_GAIN_MIC0_13 631 0x4848 //TX_PREEQ_GAIN_MIC0_14 632 0x4848 //TX_PREEQ_GAIN_MIC0_15 @@ -7660,19 +11329,19 @@ 638 0x4848 //TX_PREEQ_GAIN_MIC0_21 639 0x4848 //TX_PREEQ_GAIN_MIC0_22 640 0x4848 //TX_PREEQ_GAIN_MIC0_23 -641 0x0202 //TX_PREEQ_BIN_MIC0_0 -642 0x0203 //TX_PREEQ_BIN_MIC0_1 -643 0x0303 //TX_PREEQ_BIN_MIC0_2 -644 0x0304 //TX_PREEQ_BIN_MIC0_3 -645 0x0405 //TX_PREEQ_BIN_MIC0_4 -646 0x0506 //TX_PREEQ_BIN_MIC0_5 -647 0x7008 //TX_PREEQ_BIN_MIC0_6 -648 0x090A //TX_PREEQ_BIN_MIC0_7 -649 0x0B0C //TX_PREEQ_BIN_MIC0_8 -650 0x0F10 //TX_PREEQ_BIN_MIC0_9 -651 0x1011 //TX_PREEQ_BIN_MIC0_10 -652 0x1112 //TX_PREEQ_BIN_MIC0_11 -653 0x1208 //TX_PREEQ_BIN_MIC0_12 +641 0x251A //TX_PREEQ_BIN_MIC0_0 +642 0x0F0F //TX_PREEQ_BIN_MIC0_1 +643 0x0C0C //TX_PREEQ_BIN_MIC0_2 +644 0x0C0F //TX_PREEQ_BIN_MIC0_3 +645 0x0F0F //TX_PREEQ_BIN_MIC0_4 +646 0x0F09 //TX_PREEQ_BIN_MIC0_5 +647 0x0909 //TX_PREEQ_BIN_MIC0_6 +648 0x0908 //TX_PREEQ_BIN_MIC0_7 +649 0x0700 //TX_PREEQ_BIN_MIC0_8 +650 0x0000 //TX_PREEQ_BIN_MIC0_9 +651 0x0000 //TX_PREEQ_BIN_MIC0_10 +652 0x0000 //TX_PREEQ_BIN_MIC0_11 +653 0x0000 //TX_PREEQ_BIN_MIC0_12 654 0x0000 //TX_PREEQ_BIN_MIC0_13 655 0x0000 //TX_PREEQ_BIN_MIC0_14 656 0x0000 //TX_PREEQ_BIN_MIC0_15 @@ -7684,21 +11353,21 @@ 662 0x0000 //TX_PREEQ_BIN_MIC0_21 663 0x0000 //TX_PREEQ_BIN_MIC0_22 664 0x0000 //TX_PREEQ_BIN_MIC0_23 -665 0x0020 //TX_PREEQ_SUBNUM_MIC1 +665 0x0030 //TX_PREEQ_SUBNUM_MIC1 666 0x4848 //TX_PREEQ_GAIN_MIC1_0 667 0x4848 //TX_PREEQ_GAIN_MIC1_1 668 0x4848 //TX_PREEQ_GAIN_MIC1_2 669 0x4848 //TX_PREEQ_GAIN_MIC1_3 670 0x4848 //TX_PREEQ_GAIN_MIC1_4 671 0x4848 //TX_PREEQ_GAIN_MIC1_5 -672 0x4848 //TX_PREEQ_GAIN_MIC1_6 -673 0x4848 //TX_PREEQ_GAIN_MIC1_7 -674 0x484A //TX_PREEQ_GAIN_MIC1_8 -675 0x4B4C //TX_PREEQ_GAIN_MIC1_9 -676 0x4B4A //TX_PREEQ_GAIN_MIC1_10 -677 0x4A48 //TX_PREEQ_GAIN_MIC1_11 -678 0x4C4C //TX_PREEQ_GAIN_MIC1_12 -679 0x4C4C //TX_PREEQ_GAIN_MIC1_13 +672 0x494A //TX_PREEQ_GAIN_MIC1_6 +673 0x4B4C //TX_PREEQ_GAIN_MIC1_7 +674 0x4D4E //TX_PREEQ_GAIN_MIC1_8 +675 0x5051 //TX_PREEQ_GAIN_MIC1_9 +676 0x5255 //TX_PREEQ_GAIN_MIC1_10 +677 0x585A //TX_PREEQ_GAIN_MIC1_11 +678 0x5C5F //TX_PREEQ_GAIN_MIC1_12 +679 0x636A //TX_PREEQ_GAIN_MIC1_13 680 0x4848 //TX_PREEQ_GAIN_MIC1_14 681 0x4848 //TX_PREEQ_GAIN_MIC1_15 682 0x4848 //TX_PREEQ_GAIN_MIC1_16 @@ -7721,8 +11390,8 @@ 699 0x0D0E //TX_PREEQ_BIN_MIC1_9 700 0x0F10 //TX_PREEQ_BIN_MIC1_10 701 0x1011 //TX_PREEQ_BIN_MIC1_11 -702 0x1112 //TX_PREEQ_BIN_MIC1_12 -703 0x120B //TX_PREEQ_BIN_MIC1_13 +702 0x1104 //TX_PREEQ_BIN_MIC1_12 +703 0x101B //TX_PREEQ_BIN_MIC1_13 704 0x0000 //TX_PREEQ_BIN_MIC1_14 705 0x0000 //TX_PREEQ_BIN_MIC1_15 706 0x0000 //TX_PREEQ_BIN_MIC1_16 @@ -7795,7 +11464,7 @@ 773 0x0000 //TX_GAIN_LIMIT_0 774 0x0000 //TX_GAIN_LIMIT_1 775 0x0006 //TX_GAIN_LIMIT_2 -776 0x0005 //TX_GAIN_LIMIT_3 +776 0x0007 //TX_GAIN_LIMIT_3 777 0x7F5B //TX_BVE_NOVAD0_ALPHADOWN 778 0x7FDE //TX_BVE_VAD0_ALPHAUP 779 0x7F3A //TX_BVE_VAD0_ALPHADOWN @@ -7916,8 +11585,73 @@ 894 0xC000 //TX_FASTNS_SSA_THHFL 895 0xCCCC //TX_FASTNS_SSA_THLFH 896 0xD999 //TX_FASTNS_SSA_THHFH +897 0x2339 //TX_SENDFUNC_REG_MICMUTE +898 0x0021 //TX_SENDFUNC_REG_MICMUTE1 +899 0x02BC //TX_MICMUTE_RATIO_THR +900 0x0140 //TX_MICMUTE_AMP_THR +901 0x0004 //TX_MICMUTE_HPF_IND +902 0x00C0 //TX_MICMUTE_LOG_EYR_TH +903 0x0008 //TX_MICMUTE_CVG_TIME +904 0x0008 //TX_MICMUTE_RELEASE_TIME +905 0x01FE //TX_MIC_VOLUME_MIC0MUTE +906 0x0020 //TX_MICMUTE_EPD_OFFSET_0 +907 0x001E //TX_MICMUTE_FRQ_AEC_L +908 0x7999 //TX_MICMUTE_EAD_THR +909 0x7FFF //TX_MICMUTE_LAMBDA_CB_NLE +910 0x7FFF //TX_MICMUTE_LAMBDA_RE_EST +911 0x4000 //TX_DTD_THR1_MICMUTE_0 +912 0x7000 //TX_DTD_THR1_MICMUTE_1 +913 0x7FFF //TX_DTD_THR1_MICMUTE_2 +914 0x7FFF //TX_DTD_THR1_MICMUTE_3 +915 0x6CCC //TX_DTD_THR2_MICMUTE_0 +916 0x0400 //TX_MICMUTE_MIN_EQ_RE_EST_0 +917 0x0400 //TX_MICMUTE_MIN_EQ_RE_EST_1 +918 0x1000 //TX_MICMUTE_MIN_EQ_RE_EST_2 +919 0x7FFF //TX_MICMUTE_MIN_EQ_RE_EST_3 +920 0x7FFF //TX_MICMUTE_MIN_EQ_RE_EST_4 +921 0x4000 //TX_MICMUTE_C_POST_FLT +922 0x03E8 //TX_MICMUTE_DT_CUT_K +923 0x0001 //TX_MICMUTE_DT_CUT_THR +924 0x03E8 //TX_MICMUTE_DT_CUT_K2 +925 0x0001 //TX_MICMUTE_DT_CUT_THR2 +926 0x0064 //TX_MICMUTE_DT2_HOLD_N +927 0x1000 //TX_MICMUTE_RATIODTH_THCUT +928 0x1000 //TX_MICMUTE_B_POST_FLT_ECHOL +929 0x7FFF //TX_MICMUTE_B_POST_FLT_ECHOH +930 0x0400 //TX_MICMUTE_C_POST_FLT_MASK +931 0x7999 //TX_MICMUTE_RATIODTL_CUT_TH +932 0x0258 //TX_MICMUTE_DT_CUT_K1 +933 0x0800 //TX_MICMUTE_N2_SN_EST +934 0xFC00 //TX_MICMUTE_THR_SN_EST_0 +935 0x001C //TX_MICMUTE_MIN_G_CTRL_0 +936 0x6000 //TX_MICMUTE_A_POST_FILT_S_0 +937 0x7000 //TX_MICMUTE_B_POST_FILT_0 +938 0x2710 //TX_MIC1RUB_AMP_THR +939 0x0010 //TX_MIC1MUTE_RATIO_THR +940 0x0450 //TX_MIC1MUTE_AMP_THR +941 0x0008 //TX_MIC1MUTE_CVG_TIME +942 0x0008 //TX_MIC1MUTE_RELEASE_TIME +943 0x0000 //TX_AMS_RESRV_01 +944 0x0000 //TX_AMS_RESRV_02 +945 0x0000 //TX_AMS_RESRV_03 +946 0x0000 //TX_AMS_RESRV_04 +947 0x0000 //TX_AMS_RESRV_05 +948 0x0000 //TX_AMS_RESRV_06 +949 0x0000 //TX_AMS_RESRV_07 +950 0x0000 //TX_AMS_RESRV_08 +951 0x0000 //TX_AMS_RESRV_09 +952 0x0000 //TX_AMS_RESRV_10 +953 0x0000 //TX_AMS_RESRV_11 +954 0x0000 //TX_AMS_RESRV_12 +955 0x0000 //TX_AMS_RESRV_13 +956 0x0000 //TX_AMS_RESRV_14 +957 0x0000 //TX_AMS_RESRV_15 +958 0x0000 //TX_AMS_RESRV_16 +959 0x0000 //TX_AMS_RESRV_17 +960 0x0000 //TX_AMS_RESRV_18 +961 0x0000 //TX_AMS_RESRV_19 #RX -0 0x003C //RX_RECVFUNC_MODE_0 +0 0x203C //RX_RECVFUNC_MODE_0 1 0x0000 //RX_RECVFUNC_MODE_1 2 0x0001 //RX_SAMPLINGFREQ_SIG 3 0x0001 //RX_SAMPLINGFREQ_PROC @@ -7958,17 +11692,17 @@ 38 0x001C //RX_FDEQ_SUBNUM 39 0x4840 //RX_FDEQ_GAIN_0 40 0x4040 //RX_FDEQ_GAIN_1 -41 0x485C //RX_FDEQ_GAIN_2 -42 0x6873 //RX_FDEQ_GAIN_3 -43 0x7F8E //RX_FDEQ_GAIN_4 -44 0x847E //RX_FDEQ_GAIN_5 -45 0x7E80 //RX_FDEQ_GAIN_6 -46 0x8884 //RX_FDEQ_GAIN_7 -47 0x8890 //RX_FDEQ_GAIN_8 -48 0x8E8F //RX_FDEQ_GAIN_9 -49 0x8B77 //RX_FDEQ_GAIN_10 -50 0x6F7F //RX_FDEQ_GAIN_11 -51 0x6568 //RX_FDEQ_GAIN_12 +41 0x4659 //RX_FDEQ_GAIN_2 +42 0x6474 //RX_FDEQ_GAIN_3 +43 0x7A82 //RX_FDEQ_GAIN_4 +44 0x8180 //RX_FDEQ_GAIN_5 +45 0x8084 //RX_FDEQ_GAIN_6 +46 0x8A88 //RX_FDEQ_GAIN_7 +47 0x8C8C //RX_FDEQ_GAIN_8 +48 0x8A95 //RX_FDEQ_GAIN_9 +49 0x978E //RX_FDEQ_GAIN_10 +50 0x8C8C //RX_FDEQ_GAIN_11 +51 0x7068 //RX_FDEQ_GAIN_12 52 0x6050 //RX_FDEQ_GAIN_13 53 0x4848 //RX_FDEQ_GAIN_14 54 0x4848 //RX_FDEQ_GAIN_15 @@ -7991,9 +11725,9 @@ 71 0x0B0C //RX_FDEQ_BIN_8 72 0x0D0E //RX_FDEQ_BIN_9 73 0x0E0F //RX_FDEQ_BIN_10 -74 0x0F10 //RX_FDEQ_BIN_11 -75 0x1011 //RX_FDEQ_BIN_12 -76 0x1104 //RX_FDEQ_BIN_13 +74 0x0F0E //RX_FDEQ_BIN_11 +75 0x100D //RX_FDEQ_BIN_12 +76 0x110A //RX_FDEQ_BIN_13 77 0x0000 //RX_FDEQ_BIN_14 78 0x0000 //RX_FDEQ_BIN_15 79 0x0000 //RX_FDEQ_BIN_16 @@ -8041,12 +11775,12 @@ 121 0x199A //RX_TDDRC_HMNC_GAIN 122 0x0001 //RX_TDDRC_SMT_FLAG 123 0x0CCD //RX_TDDRC_SMT_W -124 0x0407 //RX_TDDRC_DRC_GAIN +124 0x04E6 //RX_TDDRC_DRC_GAIN 125 0x7C00 //RX_LAMBDA_PKA_FP 126 0x13E0 //RX_TPKA_FP 127 0x0080 //RX_MIN_G_FP 128 0x2000 //RX_MAX_G_FP -129 0x000C //RX_SPK_VOL +129 0x000B //RX_SPK_VOL 130 0x0000 //RX_VOL_RESRV_0 131 0x0000 //RX_MAXLEVEL_CNG 132 0x3000 //RX_BWE_UV_TH @@ -8097,21 +11831,21 @@ 121 0x199A //RX_TDDRC_HMNC_GAIN 122 0x0001 //RX_TDDRC_SMT_FLAG 123 0x0CCD //RX_TDDRC_SMT_W -124 0x0407 //RX_TDDRC_DRC_GAIN +124 0x04E6 //RX_TDDRC_DRC_GAIN 38 0x001C //RX_FDEQ_SUBNUM 39 0x4840 //RX_FDEQ_GAIN_0 40 0x4040 //RX_FDEQ_GAIN_1 -41 0x485C //RX_FDEQ_GAIN_2 -42 0x6873 //RX_FDEQ_GAIN_3 -43 0x7F8E //RX_FDEQ_GAIN_4 -44 0x847E //RX_FDEQ_GAIN_5 -45 0x7E80 //RX_FDEQ_GAIN_6 -46 0x8884 //RX_FDEQ_GAIN_7 -47 0x8890 //RX_FDEQ_GAIN_8 -48 0x8E8F //RX_FDEQ_GAIN_9 -49 0x8B77 //RX_FDEQ_GAIN_10 -50 0x6F7F //RX_FDEQ_GAIN_11 -51 0x6568 //RX_FDEQ_GAIN_12 +41 0x4659 //RX_FDEQ_GAIN_2 +42 0x6474 //RX_FDEQ_GAIN_3 +43 0x7A82 //RX_FDEQ_GAIN_4 +44 0x8180 //RX_FDEQ_GAIN_5 +45 0x8084 //RX_FDEQ_GAIN_6 +46 0x8A88 //RX_FDEQ_GAIN_7 +47 0x8C8C //RX_FDEQ_GAIN_8 +48 0x8A95 //RX_FDEQ_GAIN_9 +49 0x978E //RX_FDEQ_GAIN_10 +50 0x8C8C //RX_FDEQ_GAIN_11 +51 0x7068 //RX_FDEQ_GAIN_12 52 0x6050 //RX_FDEQ_GAIN_13 53 0x4848 //RX_FDEQ_GAIN_14 54 0x4848 //RX_FDEQ_GAIN_15 @@ -8134,9 +11868,9 @@ 71 0x0B0C //RX_FDEQ_BIN_8 72 0x0D0E //RX_FDEQ_BIN_9 73 0x0E0F //RX_FDEQ_BIN_10 -74 0x0F10 //RX_FDEQ_BIN_11 -75 0x1011 //RX_FDEQ_BIN_12 -76 0x1104 //RX_FDEQ_BIN_13 +74 0x0F0E //RX_FDEQ_BIN_11 +75 0x100D //RX_FDEQ_BIN_12 +76 0x110A //RX_FDEQ_BIN_13 77 0x0000 //RX_FDEQ_BIN_14 78 0x0000 //RX_FDEQ_BIN_15 79 0x0000 //RX_FDEQ_BIN_16 @@ -8171,7 +11905,7 @@ 108 0x5333 //RX_FDDRC_SLANT_1_2 109 0x5333 //RX_FDDRC_SLANT_1_3 110 0x0000 //RX_FDDRC_RESRV_0 -129 0x000C //RX_SPK_VOL +129 0x000B //RX_SPK_VOL 130 0x0000 //RX_VOL_RESRV_0 #VOL 1 6 0x1000 //RX_TDDRC_ALPHA_UP_1 @@ -8196,21 +11930,21 @@ 121 0x199A //RX_TDDRC_HMNC_GAIN 122 0x0001 //RX_TDDRC_SMT_FLAG 123 0x0CCD //RX_TDDRC_SMT_W -124 0x0407 //RX_TDDRC_DRC_GAIN +124 0x04E6 //RX_TDDRC_DRC_GAIN 38 0x001C //RX_FDEQ_SUBNUM 39 0x4840 //RX_FDEQ_GAIN_0 40 0x4040 //RX_FDEQ_GAIN_1 -41 0x485C //RX_FDEQ_GAIN_2 -42 0x6873 //RX_FDEQ_GAIN_3 -43 0x7F8E //RX_FDEQ_GAIN_4 -44 0x847E //RX_FDEQ_GAIN_5 -45 0x7E80 //RX_FDEQ_GAIN_6 -46 0x8884 //RX_FDEQ_GAIN_7 -47 0x8890 //RX_FDEQ_GAIN_8 -48 0x8E8F //RX_FDEQ_GAIN_9 -49 0x8B77 //RX_FDEQ_GAIN_10 -50 0x6F7F //RX_FDEQ_GAIN_11 -51 0x6568 //RX_FDEQ_GAIN_12 +41 0x4659 //RX_FDEQ_GAIN_2 +42 0x6474 //RX_FDEQ_GAIN_3 +43 0x7A82 //RX_FDEQ_GAIN_4 +44 0x8180 //RX_FDEQ_GAIN_5 +45 0x8084 //RX_FDEQ_GAIN_6 +46 0x8A88 //RX_FDEQ_GAIN_7 +47 0x8C8C //RX_FDEQ_GAIN_8 +48 0x8A95 //RX_FDEQ_GAIN_9 +49 0x978E //RX_FDEQ_GAIN_10 +50 0x8C8C //RX_FDEQ_GAIN_11 +51 0x7068 //RX_FDEQ_GAIN_12 52 0x6050 //RX_FDEQ_GAIN_13 53 0x4848 //RX_FDEQ_GAIN_14 54 0x4848 //RX_FDEQ_GAIN_15 @@ -8233,9 +11967,9 @@ 71 0x0B0C //RX_FDEQ_BIN_8 72 0x0D0E //RX_FDEQ_BIN_9 73 0x0E0F //RX_FDEQ_BIN_10 -74 0x0F10 //RX_FDEQ_BIN_11 -75 0x1011 //RX_FDEQ_BIN_12 -76 0x1104 //RX_FDEQ_BIN_13 +74 0x0F0E //RX_FDEQ_BIN_11 +75 0x100D //RX_FDEQ_BIN_12 +76 0x110A //RX_FDEQ_BIN_13 77 0x0000 //RX_FDEQ_BIN_14 78 0x0000 //RX_FDEQ_BIN_15 79 0x0000 //RX_FDEQ_BIN_16 @@ -8270,7 +12004,7 @@ 108 0x5333 //RX_FDDRC_SLANT_1_2 109 0x5333 //RX_FDDRC_SLANT_1_3 110 0x0000 //RX_FDDRC_RESRV_0 -129 0x0014 //RX_SPK_VOL +129 0x0012 //RX_SPK_VOL 130 0x0000 //RX_VOL_RESRV_0 #VOL 2 6 0x1000 //RX_TDDRC_ALPHA_UP_1 @@ -8295,21 +12029,21 @@ 121 0x199A //RX_TDDRC_HMNC_GAIN 122 0x0001 //RX_TDDRC_SMT_FLAG 123 0x0CCD //RX_TDDRC_SMT_W -124 0x0407 //RX_TDDRC_DRC_GAIN +124 0x04E6 //RX_TDDRC_DRC_GAIN 38 0x001C //RX_FDEQ_SUBNUM 39 0x4840 //RX_FDEQ_GAIN_0 40 0x4040 //RX_FDEQ_GAIN_1 -41 0x485C //RX_FDEQ_GAIN_2 -42 0x6873 //RX_FDEQ_GAIN_3 -43 0x7F8E //RX_FDEQ_GAIN_4 -44 0x847E //RX_FDEQ_GAIN_5 -45 0x7E80 //RX_FDEQ_GAIN_6 -46 0x8884 //RX_FDEQ_GAIN_7 -47 0x8890 //RX_FDEQ_GAIN_8 -48 0x8E8F //RX_FDEQ_GAIN_9 -49 0x8B77 //RX_FDEQ_GAIN_10 -50 0x6F7F //RX_FDEQ_GAIN_11 -51 0x6568 //RX_FDEQ_GAIN_12 +41 0x4659 //RX_FDEQ_GAIN_2 +42 0x6474 //RX_FDEQ_GAIN_3 +43 0x7A82 //RX_FDEQ_GAIN_4 +44 0x8180 //RX_FDEQ_GAIN_5 +45 0x8084 //RX_FDEQ_GAIN_6 +46 0x8A88 //RX_FDEQ_GAIN_7 +47 0x8C8C //RX_FDEQ_GAIN_8 +48 0x8A95 //RX_FDEQ_GAIN_9 +49 0x978E //RX_FDEQ_GAIN_10 +50 0x8C8C //RX_FDEQ_GAIN_11 +51 0x7068 //RX_FDEQ_GAIN_12 52 0x6050 //RX_FDEQ_GAIN_13 53 0x4848 //RX_FDEQ_GAIN_14 54 0x4848 //RX_FDEQ_GAIN_15 @@ -8332,9 +12066,9 @@ 71 0x0B0C //RX_FDEQ_BIN_8 72 0x0D0E //RX_FDEQ_BIN_9 73 0x0E0F //RX_FDEQ_BIN_10 -74 0x0F10 //RX_FDEQ_BIN_11 -75 0x1011 //RX_FDEQ_BIN_12 -76 0x1104 //RX_FDEQ_BIN_13 +74 0x0F0E //RX_FDEQ_BIN_11 +75 0x100D //RX_FDEQ_BIN_12 +76 0x110A //RX_FDEQ_BIN_13 77 0x0000 //RX_FDEQ_BIN_14 78 0x0000 //RX_FDEQ_BIN_15 79 0x0000 //RX_FDEQ_BIN_16 @@ -8369,7 +12103,7 @@ 108 0x5333 //RX_FDDRC_SLANT_1_2 109 0x5333 //RX_FDDRC_SLANT_1_3 110 0x0000 //RX_FDDRC_RESRV_0 -129 0x0020 //RX_SPK_VOL +129 0x001E //RX_SPK_VOL 130 0x0000 //RX_VOL_RESRV_0 #VOL 3 6 0x1000 //RX_TDDRC_ALPHA_UP_1 @@ -8394,21 +12128,21 @@ 121 0x199A //RX_TDDRC_HMNC_GAIN 122 0x0001 //RX_TDDRC_SMT_FLAG 123 0x0CCD //RX_TDDRC_SMT_W -124 0x0407 //RX_TDDRC_DRC_GAIN +124 0x04E6 //RX_TDDRC_DRC_GAIN 38 0x001C //RX_FDEQ_SUBNUM 39 0x4840 //RX_FDEQ_GAIN_0 40 0x4040 //RX_FDEQ_GAIN_1 -41 0x485C //RX_FDEQ_GAIN_2 -42 0x6873 //RX_FDEQ_GAIN_3 -43 0x7F8E //RX_FDEQ_GAIN_4 -44 0x847E //RX_FDEQ_GAIN_5 -45 0x7E80 //RX_FDEQ_GAIN_6 -46 0x8884 //RX_FDEQ_GAIN_7 -47 0x8890 //RX_FDEQ_GAIN_8 -48 0x8E8F //RX_FDEQ_GAIN_9 -49 0x8B77 //RX_FDEQ_GAIN_10 -50 0x6F7F //RX_FDEQ_GAIN_11 -51 0x6568 //RX_FDEQ_GAIN_12 +41 0x4659 //RX_FDEQ_GAIN_2 +42 0x6474 //RX_FDEQ_GAIN_3 +43 0x7A82 //RX_FDEQ_GAIN_4 +44 0x8180 //RX_FDEQ_GAIN_5 +45 0x8084 //RX_FDEQ_GAIN_6 +46 0x8A88 //RX_FDEQ_GAIN_7 +47 0x8C8C //RX_FDEQ_GAIN_8 +48 0x8A95 //RX_FDEQ_GAIN_9 +49 0x978E //RX_FDEQ_GAIN_10 +50 0x8C8C //RX_FDEQ_GAIN_11 +51 0x7068 //RX_FDEQ_GAIN_12 52 0x6050 //RX_FDEQ_GAIN_13 53 0x4848 //RX_FDEQ_GAIN_14 54 0x4848 //RX_FDEQ_GAIN_15 @@ -8431,9 +12165,9 @@ 71 0x0B0C //RX_FDEQ_BIN_8 72 0x0D0E //RX_FDEQ_BIN_9 73 0x0E0F //RX_FDEQ_BIN_10 -74 0x0F10 //RX_FDEQ_BIN_11 -75 0x1011 //RX_FDEQ_BIN_12 -76 0x1104 //RX_FDEQ_BIN_13 +74 0x0F0E //RX_FDEQ_BIN_11 +75 0x100D //RX_FDEQ_BIN_12 +76 0x110A //RX_FDEQ_BIN_13 77 0x0000 //RX_FDEQ_BIN_14 78 0x0000 //RX_FDEQ_BIN_15 79 0x0000 //RX_FDEQ_BIN_16 @@ -8468,7 +12202,7 @@ 108 0x5333 //RX_FDDRC_SLANT_1_2 109 0x5333 //RX_FDDRC_SLANT_1_3 110 0x0000 //RX_FDDRC_RESRV_0 -129 0x0035 //RX_SPK_VOL +129 0x0033 //RX_SPK_VOL 130 0x0000 //RX_VOL_RESRV_0 #VOL 4 6 0x1000 //RX_TDDRC_ALPHA_UP_1 @@ -8493,21 +12227,21 @@ 121 0x199A //RX_TDDRC_HMNC_GAIN 122 0x0001 //RX_TDDRC_SMT_FLAG 123 0x0CCD //RX_TDDRC_SMT_W -124 0x0407 //RX_TDDRC_DRC_GAIN +124 0x04E6 //RX_TDDRC_DRC_GAIN 38 0x001C //RX_FDEQ_SUBNUM 39 0x4840 //RX_FDEQ_GAIN_0 40 0x4040 //RX_FDEQ_GAIN_1 -41 0x485C //RX_FDEQ_GAIN_2 -42 0x6873 //RX_FDEQ_GAIN_3 -43 0x7F8E //RX_FDEQ_GAIN_4 -44 0x847E //RX_FDEQ_GAIN_5 -45 0x7E80 //RX_FDEQ_GAIN_6 -46 0x8884 //RX_FDEQ_GAIN_7 -47 0x8890 //RX_FDEQ_GAIN_8 -48 0x8E8F //RX_FDEQ_GAIN_9 -49 0x8B77 //RX_FDEQ_GAIN_10 -50 0x6F7F //RX_FDEQ_GAIN_11 -51 0x6568 //RX_FDEQ_GAIN_12 +41 0x4659 //RX_FDEQ_GAIN_2 +42 0x6474 //RX_FDEQ_GAIN_3 +43 0x7A82 //RX_FDEQ_GAIN_4 +44 0x8180 //RX_FDEQ_GAIN_5 +45 0x8084 //RX_FDEQ_GAIN_6 +46 0x8A88 //RX_FDEQ_GAIN_7 +47 0x8C8C //RX_FDEQ_GAIN_8 +48 0x8A95 //RX_FDEQ_GAIN_9 +49 0x978E //RX_FDEQ_GAIN_10 +50 0x8C8C //RX_FDEQ_GAIN_11 +51 0x7068 //RX_FDEQ_GAIN_12 52 0x6050 //RX_FDEQ_GAIN_13 53 0x4848 //RX_FDEQ_GAIN_14 54 0x4848 //RX_FDEQ_GAIN_15 @@ -8530,9 +12264,9 @@ 71 0x0B0C //RX_FDEQ_BIN_8 72 0x0D0E //RX_FDEQ_BIN_9 73 0x0E0F //RX_FDEQ_BIN_10 -74 0x0F10 //RX_FDEQ_BIN_11 -75 0x1011 //RX_FDEQ_BIN_12 -76 0x1104 //RX_FDEQ_BIN_13 +74 0x0F0E //RX_FDEQ_BIN_11 +75 0x100D //RX_FDEQ_BIN_12 +76 0x110A //RX_FDEQ_BIN_13 77 0x0000 //RX_FDEQ_BIN_14 78 0x0000 //RX_FDEQ_BIN_15 79 0x0000 //RX_FDEQ_BIN_16 @@ -8567,7 +12301,7 @@ 108 0x5333 //RX_FDDRC_SLANT_1_2 109 0x5333 //RX_FDDRC_SLANT_1_3 110 0x0000 //RX_FDDRC_RESRV_0 -129 0x0057 //RX_SPK_VOL +129 0x0050 //RX_SPK_VOL 130 0x0000 //RX_VOL_RESRV_0 #VOL 5 6 0x1000 //RX_TDDRC_ALPHA_UP_1 @@ -8592,21 +12326,21 @@ 121 0x199A //RX_TDDRC_HMNC_GAIN 122 0x0001 //RX_TDDRC_SMT_FLAG 123 0x0CCD //RX_TDDRC_SMT_W -124 0x0407 //RX_TDDRC_DRC_GAIN +124 0x04E6 //RX_TDDRC_DRC_GAIN 38 0x001C //RX_FDEQ_SUBNUM 39 0x4840 //RX_FDEQ_GAIN_0 40 0x4040 //RX_FDEQ_GAIN_1 -41 0x485C //RX_FDEQ_GAIN_2 -42 0x6873 //RX_FDEQ_GAIN_3 -43 0x7F8E //RX_FDEQ_GAIN_4 -44 0x847E //RX_FDEQ_GAIN_5 -45 0x7E80 //RX_FDEQ_GAIN_6 -46 0x8884 //RX_FDEQ_GAIN_7 -47 0x8890 //RX_FDEQ_GAIN_8 -48 0x8E8F //RX_FDEQ_GAIN_9 -49 0x8B77 //RX_FDEQ_GAIN_10 -50 0x6F7F //RX_FDEQ_GAIN_11 -51 0x6568 //RX_FDEQ_GAIN_12 +41 0x4659 //RX_FDEQ_GAIN_2 +42 0x6474 //RX_FDEQ_GAIN_3 +43 0x7A82 //RX_FDEQ_GAIN_4 +44 0x8180 //RX_FDEQ_GAIN_5 +45 0x8084 //RX_FDEQ_GAIN_6 +46 0x8A88 //RX_FDEQ_GAIN_7 +47 0x8C8C //RX_FDEQ_GAIN_8 +48 0x8A95 //RX_FDEQ_GAIN_9 +49 0x978E //RX_FDEQ_GAIN_10 +50 0x8C8C //RX_FDEQ_GAIN_11 +51 0x7068 //RX_FDEQ_GAIN_12 52 0x6050 //RX_FDEQ_GAIN_13 53 0x4848 //RX_FDEQ_GAIN_14 54 0x4848 //RX_FDEQ_GAIN_15 @@ -8629,9 +12363,9 @@ 71 0x0B0C //RX_FDEQ_BIN_8 72 0x0D0E //RX_FDEQ_BIN_9 73 0x0E0F //RX_FDEQ_BIN_10 -74 0x0F10 //RX_FDEQ_BIN_11 -75 0x1011 //RX_FDEQ_BIN_12 -76 0x1104 //RX_FDEQ_BIN_13 +74 0x0F0E //RX_FDEQ_BIN_11 +75 0x100D //RX_FDEQ_BIN_12 +76 0x110A //RX_FDEQ_BIN_13 77 0x0000 //RX_FDEQ_BIN_14 78 0x0000 //RX_FDEQ_BIN_15 79 0x0000 //RX_FDEQ_BIN_16 @@ -8666,7 +12400,7 @@ 108 0x5333 //RX_FDDRC_SLANT_1_2 109 0x5333 //RX_FDDRC_SLANT_1_3 110 0x0000 //RX_FDDRC_RESRV_0 -129 0x008E //RX_SPK_VOL +129 0x0086 //RX_SPK_VOL 130 0x0000 //RX_VOL_RESRV_0 #VOL 6 6 0x1000 //RX_TDDRC_ALPHA_UP_1 @@ -8691,21 +12425,21 @@ 121 0x199A //RX_TDDRC_HMNC_GAIN 122 0x0001 //RX_TDDRC_SMT_FLAG 123 0x0CCD //RX_TDDRC_SMT_W -124 0x0407 //RX_TDDRC_DRC_GAIN +124 0x04E6 //RX_TDDRC_DRC_GAIN 38 0x001C //RX_FDEQ_SUBNUM 39 0x4840 //RX_FDEQ_GAIN_0 40 0x4040 //RX_FDEQ_GAIN_1 -41 0x485C //RX_FDEQ_GAIN_2 -42 0x6873 //RX_FDEQ_GAIN_3 -43 0x7F8E //RX_FDEQ_GAIN_4 -44 0x847E //RX_FDEQ_GAIN_5 -45 0x7E80 //RX_FDEQ_GAIN_6 -46 0x8884 //RX_FDEQ_GAIN_7 -47 0x8890 //RX_FDEQ_GAIN_8 -48 0x8E8F //RX_FDEQ_GAIN_9 -49 0x8B77 //RX_FDEQ_GAIN_10 -50 0x6F7F //RX_FDEQ_GAIN_11 -51 0x6568 //RX_FDEQ_GAIN_12 +41 0x4659 //RX_FDEQ_GAIN_2 +42 0x6474 //RX_FDEQ_GAIN_3 +43 0x7A82 //RX_FDEQ_GAIN_4 +44 0x8180 //RX_FDEQ_GAIN_5 +45 0x8084 //RX_FDEQ_GAIN_6 +46 0x8A88 //RX_FDEQ_GAIN_7 +47 0x8C8C //RX_FDEQ_GAIN_8 +48 0x8A95 //RX_FDEQ_GAIN_9 +49 0x978E //RX_FDEQ_GAIN_10 +50 0x8C8C //RX_FDEQ_GAIN_11 +51 0x7068 //RX_FDEQ_GAIN_12 52 0x6050 //RX_FDEQ_GAIN_13 53 0x4848 //RX_FDEQ_GAIN_14 54 0x4848 //RX_FDEQ_GAIN_15 @@ -8728,9 +12462,9 @@ 71 0x0B0C //RX_FDEQ_BIN_8 72 0x0D0E //RX_FDEQ_BIN_9 73 0x0E0F //RX_FDEQ_BIN_10 -74 0x0F10 //RX_FDEQ_BIN_11 -75 0x1011 //RX_FDEQ_BIN_12 -76 0x1104 //RX_FDEQ_BIN_13 +74 0x0F0E //RX_FDEQ_BIN_11 +75 0x100D //RX_FDEQ_BIN_12 +76 0x110A //RX_FDEQ_BIN_13 77 0x0000 //RX_FDEQ_BIN_14 78 0x0000 //RX_FDEQ_BIN_15 79 0x0000 //RX_FDEQ_BIN_16 @@ -8767,14 +12501,866 @@ 110 0x0000 //RX_FDDRC_RESRV_0 129 0x0100 //RX_SPK_VOL 130 0x0000 //RX_VOL_RESRV_0 +#RX 2 +157 0x003C //RX_RECVFUNC_MODE_0 +158 0x0000 //RX_RECVFUNC_MODE_1 +159 0x0001 //RX_SAMPLINGFREQ_SIG +160 0x0001 //RX_SAMPLINGFREQ_PROC +161 0x000A //RX_FRAME_SZ +162 0x0000 //RX_DELAY_OPT +163 0x1000 //RX_TDDRC_ALPHA_UP_1 +164 0x1000 //RX_TDDRC_ALPHA_UP_2 +165 0x1000 //RX_TDDRC_ALPHA_UP_3 +166 0x1000 //RX_TDDRC_ALPHA_UP_4 +167 0x0600 //RX_PGA +168 0x7FFF //RX_A_HP +169 0x4000 //RX_B_PE +170 0x7800 //RX_THR_PITCH_DET_0 +171 0x7000 //RX_THR_PITCH_DET_1 +172 0x6000 //RX_THR_PITCH_DET_2 +173 0x0008 //RX_PITCH_BFR_LEN +174 0x0003 //RX_SBD_PITCH_DET +175 0x0100 //RX_PP_RESRV_0 +176 0x0020 //RX_PP_RESRV_1 +177 0x0400 //RX_N_SN_EST +178 0x000C //RX_N2_SN_EST +179 0x0014 //RX_NS_LVL_CTRL +180 0xF800 //RX_THR_SN_EST +181 0x7E00 //RX_LAMBDA_PFILT +182 0x000A //RX_FENS_RESRV_0 +183 0x0190 //RX_FENS_RESRV_1 +184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +187 0x0002 //RX_EXTRA_NS_L +188 0x0800 //RX_EXTRA_NS_A +189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +190 0x7000 //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +192 0x199A //RX_A_POST_FLT +193 0x1000 //RX_LMT_THRD +194 0x7FDF //RX_LMT_ALPHA +195 0x001C //RX_FDEQ_SUBNUM +196 0x4840 //RX_FDEQ_GAIN_0 +197 0x4040 //RX_FDEQ_GAIN_1 +198 0x4659 //RX_FDEQ_GAIN_2 +199 0x6474 //RX_FDEQ_GAIN_3 +200 0x7A82 //RX_FDEQ_GAIN_4 +201 0x8180 //RX_FDEQ_GAIN_5 +202 0x8084 //RX_FDEQ_GAIN_6 +203 0x8A88 //RX_FDEQ_GAIN_7 +204 0x8C8C //RX_FDEQ_GAIN_8 +205 0x8A95 //RX_FDEQ_GAIN_9 +206 0x978E //RX_FDEQ_GAIN_10 +207 0x8C8C //RX_FDEQ_GAIN_11 +208 0x7068 //RX_FDEQ_GAIN_12 +209 0x6050 //RX_FDEQ_GAIN_13 +210 0x4848 //RX_FDEQ_GAIN_14 +211 0x4848 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0202 //RX_FDEQ_BIN_0 +221 0x0203 //RX_FDEQ_BIN_1 +222 0x0303 //RX_FDEQ_BIN_2 +223 0x0304 //RX_FDEQ_BIN_3 +224 0x0405 //RX_FDEQ_BIN_4 +225 0x0506 //RX_FDEQ_BIN_5 +226 0x0708 //RX_FDEQ_BIN_6 +227 0x090A //RX_FDEQ_BIN_7 +228 0x0B0C //RX_FDEQ_BIN_8 +229 0x0D0E //RX_FDEQ_BIN_9 +230 0x0E0F //RX_FDEQ_BIN_10 +231 0x0F0E //RX_FDEQ_BIN_11 +232 0x100D //RX_FDEQ_BIN_12 +233 0x110A //RX_FDEQ_BIN_13 +234 0x0000 //RX_FDEQ_BIN_14 +235 0x0000 //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x4000 //RX_FDEQ_RESRV_0 +245 0x0320 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0030 //RX_FDDRC_BAND_MARGIN_1 +248 0x0050 //RX_FDDRC_BAND_MARGIN_2 +249 0x0080 //RX_FDDRC_BAND_MARGIN_3 +250 0x0007 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x5000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x6400 //RX_FDDRC_THRD_3_2 +258 0x6400 //RX_FDDRC_THRD_3_3 +259 0x2000 //RX_FDDRC_SLANT_0_0 +260 0x2000 //RX_FDDRC_SLANT_0_1 +261 0x2000 //RX_FDDRC_SLANT_0_2 +262 0x2000 //RX_FDDRC_SLANT_0_3 +263 0x5333 //RX_FDDRC_SLANT_1_0 +264 0x5333 //RX_FDDRC_SLANT_1_1 +265 0x5333 //RX_FDDRC_SLANT_1_2 +266 0x5333 //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +268 0x0002 //RX_FILTINDX +269 0x0000 //RX_TDDRC_THRD_0 +270 0x0000 //RX_TDDRC_THRD_1 +271 0x1800 //RX_TDDRC_THRD_2 +272 0x1800 //RX_TDDRC_THRD_3 +273 0x3000 //RX_TDDRC_SLANT_0 +274 0x6E00 //RX_TDDRC_SLANT_1 +275 0x1000 //RX_TDDRC_ALPHA_UP_0 +276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x199A //RX_TDDRC_HMNC_GAIN +279 0x0001 //RX_TDDRC_SMT_FLAG +280 0x0CCD //RX_TDDRC_SMT_W +281 0x04E6 //RX_TDDRC_DRC_GAIN +282 0x7C00 //RX_LAMBDA_PKA_FP +283 0x13E0 //RX_TPKA_FP +284 0x0080 //RX_MIN_G_FP +285 0x2000 //RX_MAX_G_FP +286 0x000B //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 +288 0x0000 //RX_MAXLEVEL_CNG +289 0x3000 //RX_BWE_UV_TH +290 0x3000 //RX_BWE_UV_TH2 +291 0x1800 //RX_BWE_UV_TH3 +292 0x1000 //RX_BWE_V_TH +293 0x04CD //RX_BWE_GAIN1_V_TH1 +294 0x0F33 //RX_BWE_GAIN1_V_TH2 +295 0x7333 //RX_BWE_UV_EQ +296 0x199A //RX_BWE_V_EQ +297 0x7333 //RX_BWE_TONE_TH +298 0x0004 //RX_BWE_UV_HOLD_T +299 0x6CCD //RX_BWE_GAIN2_ALPHA +300 0x799A //RX_BWE_GAIN3_ALPHA +301 0x001E //RX_BWE_CUTOFF +302 0x3000 //RX_BWE_GAINFILL +303 0x3200 //RX_BWE_MAXTH_TONE +304 0x2000 //RX_BWE_EQ_0 +305 0x2000 //RX_BWE_EQ_1 +306 0x2000 //RX_BWE_EQ_2 +307 0x2000 //RX_BWE_EQ_3 +308 0x2000 //RX_BWE_EQ_4 +309 0x2000 //RX_BWE_EQ_5 +310 0x2000 //RX_BWE_EQ_6 +311 0x0000 //RX_BWE_RESRV_0 +312 0x0000 //RX_BWE_RESRV_1 +313 0x0000 //RX_BWE_RESRV_2 +#VOL 0 +163 0x1000 //RX_TDDRC_ALPHA_UP_1 +164 0x1000 //RX_TDDRC_ALPHA_UP_2 +165 0x1000 //RX_TDDRC_ALPHA_UP_3 +166 0x1000 //RX_TDDRC_ALPHA_UP_4 +184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +190 0x7000 //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +269 0x0000 //RX_TDDRC_THRD_0 +270 0x0000 //RX_TDDRC_THRD_1 +271 0x1800 //RX_TDDRC_THRD_2 +272 0x1800 //RX_TDDRC_THRD_3 +273 0x3000 //RX_TDDRC_SLANT_0 +274 0x6E00 //RX_TDDRC_SLANT_1 +275 0x1000 //RX_TDDRC_ALPHA_UP_0 +276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x199A //RX_TDDRC_HMNC_GAIN +279 0x0001 //RX_TDDRC_SMT_FLAG +280 0x0CCD //RX_TDDRC_SMT_W +281 0x04E6 //RX_TDDRC_DRC_GAIN +195 0x001C //RX_FDEQ_SUBNUM +196 0x4840 //RX_FDEQ_GAIN_0 +197 0x4040 //RX_FDEQ_GAIN_1 +198 0x4659 //RX_FDEQ_GAIN_2 +199 0x6474 //RX_FDEQ_GAIN_3 +200 0x7A82 //RX_FDEQ_GAIN_4 +201 0x8180 //RX_FDEQ_GAIN_5 +202 0x8084 //RX_FDEQ_GAIN_6 +203 0x8A88 //RX_FDEQ_GAIN_7 +204 0x8C8C //RX_FDEQ_GAIN_8 +205 0x8A95 //RX_FDEQ_GAIN_9 +206 0x978E //RX_FDEQ_GAIN_10 +207 0x8C8C //RX_FDEQ_GAIN_11 +208 0x7068 //RX_FDEQ_GAIN_12 +209 0x6050 //RX_FDEQ_GAIN_13 +210 0x4848 //RX_FDEQ_GAIN_14 +211 0x4848 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0202 //RX_FDEQ_BIN_0 +221 0x0203 //RX_FDEQ_BIN_1 +222 0x0303 //RX_FDEQ_BIN_2 +223 0x0304 //RX_FDEQ_BIN_3 +224 0x0405 //RX_FDEQ_BIN_4 +225 0x0506 //RX_FDEQ_BIN_5 +226 0x0708 //RX_FDEQ_BIN_6 +227 0x090A //RX_FDEQ_BIN_7 +228 0x0B0C //RX_FDEQ_BIN_8 +229 0x0D0E //RX_FDEQ_BIN_9 +230 0x0E0F //RX_FDEQ_BIN_10 +231 0x0F0E //RX_FDEQ_BIN_11 +232 0x100D //RX_FDEQ_BIN_12 +233 0x110A //RX_FDEQ_BIN_13 +234 0x0000 //RX_FDEQ_BIN_14 +235 0x0000 //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x4000 //RX_FDEQ_RESRV_0 +245 0x0320 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0030 //RX_FDDRC_BAND_MARGIN_1 +248 0x0050 //RX_FDDRC_BAND_MARGIN_2 +249 0x0080 //RX_FDDRC_BAND_MARGIN_3 +250 0x0007 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x5000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x6400 //RX_FDDRC_THRD_3_2 +258 0x6400 //RX_FDDRC_THRD_3_3 +259 0x2000 //RX_FDDRC_SLANT_0_0 +260 0x2000 //RX_FDDRC_SLANT_0_1 +261 0x2000 //RX_FDDRC_SLANT_0_2 +262 0x2000 //RX_FDDRC_SLANT_0_3 +263 0x5333 //RX_FDDRC_SLANT_1_0 +264 0x5333 //RX_FDDRC_SLANT_1_1 +265 0x5333 //RX_FDDRC_SLANT_1_2 +266 0x5333 //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +286 0x000B //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 +#VOL 1 +163 0x1000 //RX_TDDRC_ALPHA_UP_1 +164 0x1000 //RX_TDDRC_ALPHA_UP_2 +165 0x1000 //RX_TDDRC_ALPHA_UP_3 +166 0x1000 //RX_TDDRC_ALPHA_UP_4 +184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +190 0x7000 //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +269 0x0000 //RX_TDDRC_THRD_0 +270 0x0000 //RX_TDDRC_THRD_1 +271 0x1800 //RX_TDDRC_THRD_2 +272 0x1800 //RX_TDDRC_THRD_3 +273 0x3000 //RX_TDDRC_SLANT_0 +274 0x6E00 //RX_TDDRC_SLANT_1 +275 0x1000 //RX_TDDRC_ALPHA_UP_0 +276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x199A //RX_TDDRC_HMNC_GAIN +279 0x0001 //RX_TDDRC_SMT_FLAG +280 0x0CCD //RX_TDDRC_SMT_W +281 0x04E6 //RX_TDDRC_DRC_GAIN +195 0x001C //RX_FDEQ_SUBNUM +196 0x4840 //RX_FDEQ_GAIN_0 +197 0x4040 //RX_FDEQ_GAIN_1 +198 0x4659 //RX_FDEQ_GAIN_2 +199 0x6474 //RX_FDEQ_GAIN_3 +200 0x7A82 //RX_FDEQ_GAIN_4 +201 0x8180 //RX_FDEQ_GAIN_5 +202 0x8084 //RX_FDEQ_GAIN_6 +203 0x8A88 //RX_FDEQ_GAIN_7 +204 0x8C8C //RX_FDEQ_GAIN_8 +205 0x8A95 //RX_FDEQ_GAIN_9 +206 0x978E //RX_FDEQ_GAIN_10 +207 0x8C8C //RX_FDEQ_GAIN_11 +208 0x7068 //RX_FDEQ_GAIN_12 +209 0x6050 //RX_FDEQ_GAIN_13 +210 0x4848 //RX_FDEQ_GAIN_14 +211 0x4848 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0202 //RX_FDEQ_BIN_0 +221 0x0203 //RX_FDEQ_BIN_1 +222 0x0303 //RX_FDEQ_BIN_2 +223 0x0304 //RX_FDEQ_BIN_3 +224 0x0405 //RX_FDEQ_BIN_4 +225 0x0506 //RX_FDEQ_BIN_5 +226 0x0708 //RX_FDEQ_BIN_6 +227 0x090A //RX_FDEQ_BIN_7 +228 0x0B0C //RX_FDEQ_BIN_8 +229 0x0D0E //RX_FDEQ_BIN_9 +230 0x0E0F //RX_FDEQ_BIN_10 +231 0x0F0E //RX_FDEQ_BIN_11 +232 0x100D //RX_FDEQ_BIN_12 +233 0x110A //RX_FDEQ_BIN_13 +234 0x0000 //RX_FDEQ_BIN_14 +235 0x0000 //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x4000 //RX_FDEQ_RESRV_0 +245 0x0320 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0030 //RX_FDDRC_BAND_MARGIN_1 +248 0x0050 //RX_FDDRC_BAND_MARGIN_2 +249 0x0080 //RX_FDDRC_BAND_MARGIN_3 +250 0x0007 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x5000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x6400 //RX_FDDRC_THRD_3_2 +258 0x6400 //RX_FDDRC_THRD_3_3 +259 0x2000 //RX_FDDRC_SLANT_0_0 +260 0x2000 //RX_FDDRC_SLANT_0_1 +261 0x2000 //RX_FDDRC_SLANT_0_2 +262 0x2000 //RX_FDDRC_SLANT_0_3 +263 0x5333 //RX_FDDRC_SLANT_1_0 +264 0x5333 //RX_FDDRC_SLANT_1_1 +265 0x5333 //RX_FDDRC_SLANT_1_2 +266 0x5333 //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +286 0x0012 //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 +#VOL 2 +163 0x1000 //RX_TDDRC_ALPHA_UP_1 +164 0x1000 //RX_TDDRC_ALPHA_UP_2 +165 0x1000 //RX_TDDRC_ALPHA_UP_3 +166 0x1000 //RX_TDDRC_ALPHA_UP_4 +184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +190 0x7000 //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +269 0x0000 //RX_TDDRC_THRD_0 +270 0x0000 //RX_TDDRC_THRD_1 +271 0x1800 //RX_TDDRC_THRD_2 +272 0x1800 //RX_TDDRC_THRD_3 +273 0x3000 //RX_TDDRC_SLANT_0 +274 0x6E00 //RX_TDDRC_SLANT_1 +275 0x1000 //RX_TDDRC_ALPHA_UP_0 +276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x199A //RX_TDDRC_HMNC_GAIN +279 0x0001 //RX_TDDRC_SMT_FLAG +280 0x0CCD //RX_TDDRC_SMT_W +281 0x04E6 //RX_TDDRC_DRC_GAIN +195 0x001C //RX_FDEQ_SUBNUM +196 0x4840 //RX_FDEQ_GAIN_0 +197 0x4040 //RX_FDEQ_GAIN_1 +198 0x4659 //RX_FDEQ_GAIN_2 +199 0x6474 //RX_FDEQ_GAIN_3 +200 0x7A82 //RX_FDEQ_GAIN_4 +201 0x8180 //RX_FDEQ_GAIN_5 +202 0x8084 //RX_FDEQ_GAIN_6 +203 0x8A88 //RX_FDEQ_GAIN_7 +204 0x8C8C //RX_FDEQ_GAIN_8 +205 0x8A95 //RX_FDEQ_GAIN_9 +206 0x978E //RX_FDEQ_GAIN_10 +207 0x8C8C //RX_FDEQ_GAIN_11 +208 0x7068 //RX_FDEQ_GAIN_12 +209 0x6050 //RX_FDEQ_GAIN_13 +210 0x4848 //RX_FDEQ_GAIN_14 +211 0x4848 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0202 //RX_FDEQ_BIN_0 +221 0x0203 //RX_FDEQ_BIN_1 +222 0x0303 //RX_FDEQ_BIN_2 +223 0x0304 //RX_FDEQ_BIN_3 +224 0x0405 //RX_FDEQ_BIN_4 +225 0x0506 //RX_FDEQ_BIN_5 +226 0x0708 //RX_FDEQ_BIN_6 +227 0x090A //RX_FDEQ_BIN_7 +228 0x0B0C //RX_FDEQ_BIN_8 +229 0x0D0E //RX_FDEQ_BIN_9 +230 0x0E0F //RX_FDEQ_BIN_10 +231 0x0F0E //RX_FDEQ_BIN_11 +232 0x100D //RX_FDEQ_BIN_12 +233 0x110A //RX_FDEQ_BIN_13 +234 0x0000 //RX_FDEQ_BIN_14 +235 0x0000 //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x4000 //RX_FDEQ_RESRV_0 +245 0x0320 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0030 //RX_FDDRC_BAND_MARGIN_1 +248 0x0050 //RX_FDDRC_BAND_MARGIN_2 +249 0x0080 //RX_FDDRC_BAND_MARGIN_3 +250 0x0007 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x5000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x6400 //RX_FDDRC_THRD_3_2 +258 0x6400 //RX_FDDRC_THRD_3_3 +259 0x2000 //RX_FDDRC_SLANT_0_0 +260 0x2000 //RX_FDDRC_SLANT_0_1 +261 0x2000 //RX_FDDRC_SLANT_0_2 +262 0x2000 //RX_FDDRC_SLANT_0_3 +263 0x5333 //RX_FDDRC_SLANT_1_0 +264 0x5333 //RX_FDDRC_SLANT_1_1 +265 0x5333 //RX_FDDRC_SLANT_1_2 +266 0x5333 //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +286 0x001E //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 +#VOL 3 +163 0x1000 //RX_TDDRC_ALPHA_UP_1 +164 0x1000 //RX_TDDRC_ALPHA_UP_2 +165 0x1000 //RX_TDDRC_ALPHA_UP_3 +166 0x1000 //RX_TDDRC_ALPHA_UP_4 +184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +190 0x7000 //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +269 0x0000 //RX_TDDRC_THRD_0 +270 0x0000 //RX_TDDRC_THRD_1 +271 0x1800 //RX_TDDRC_THRD_2 +272 0x1800 //RX_TDDRC_THRD_3 +273 0x3000 //RX_TDDRC_SLANT_0 +274 0x6E00 //RX_TDDRC_SLANT_1 +275 0x1000 //RX_TDDRC_ALPHA_UP_0 +276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x199A //RX_TDDRC_HMNC_GAIN +279 0x0001 //RX_TDDRC_SMT_FLAG +280 0x0CCD //RX_TDDRC_SMT_W +281 0x04E6 //RX_TDDRC_DRC_GAIN +195 0x001C //RX_FDEQ_SUBNUM +196 0x4840 //RX_FDEQ_GAIN_0 +197 0x4040 //RX_FDEQ_GAIN_1 +198 0x4659 //RX_FDEQ_GAIN_2 +199 0x6474 //RX_FDEQ_GAIN_3 +200 0x7A82 //RX_FDEQ_GAIN_4 +201 0x8180 //RX_FDEQ_GAIN_5 +202 0x8084 //RX_FDEQ_GAIN_6 +203 0x8A88 //RX_FDEQ_GAIN_7 +204 0x8C8C //RX_FDEQ_GAIN_8 +205 0x8A95 //RX_FDEQ_GAIN_9 +206 0x978E //RX_FDEQ_GAIN_10 +207 0x8C8C //RX_FDEQ_GAIN_11 +208 0x7068 //RX_FDEQ_GAIN_12 +209 0x6050 //RX_FDEQ_GAIN_13 +210 0x4848 //RX_FDEQ_GAIN_14 +211 0x4848 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0202 //RX_FDEQ_BIN_0 +221 0x0203 //RX_FDEQ_BIN_1 +222 0x0303 //RX_FDEQ_BIN_2 +223 0x0304 //RX_FDEQ_BIN_3 +224 0x0405 //RX_FDEQ_BIN_4 +225 0x0506 //RX_FDEQ_BIN_5 +226 0x0708 //RX_FDEQ_BIN_6 +227 0x090A //RX_FDEQ_BIN_7 +228 0x0B0C //RX_FDEQ_BIN_8 +229 0x0D0E //RX_FDEQ_BIN_9 +230 0x0E0F //RX_FDEQ_BIN_10 +231 0x0F0E //RX_FDEQ_BIN_11 +232 0x100D //RX_FDEQ_BIN_12 +233 0x110A //RX_FDEQ_BIN_13 +234 0x0000 //RX_FDEQ_BIN_14 +235 0x0000 //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x4000 //RX_FDEQ_RESRV_0 +245 0x0320 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0030 //RX_FDDRC_BAND_MARGIN_1 +248 0x0050 //RX_FDDRC_BAND_MARGIN_2 +249 0x0080 //RX_FDDRC_BAND_MARGIN_3 +250 0x0007 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x5000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x6400 //RX_FDDRC_THRD_3_2 +258 0x6400 //RX_FDDRC_THRD_3_3 +259 0x2000 //RX_FDDRC_SLANT_0_0 +260 0x2000 //RX_FDDRC_SLANT_0_1 +261 0x2000 //RX_FDDRC_SLANT_0_2 +262 0x2000 //RX_FDDRC_SLANT_0_3 +263 0x5333 //RX_FDDRC_SLANT_1_0 +264 0x5333 //RX_FDDRC_SLANT_1_1 +265 0x5333 //RX_FDDRC_SLANT_1_2 +266 0x5333 //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +286 0x0031 //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 +#VOL 4 +163 0x1000 //RX_TDDRC_ALPHA_UP_1 +164 0x1000 //RX_TDDRC_ALPHA_UP_2 +165 0x1000 //RX_TDDRC_ALPHA_UP_3 +166 0x1000 //RX_TDDRC_ALPHA_UP_4 +184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +190 0x7000 //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +269 0x0000 //RX_TDDRC_THRD_0 +270 0x0000 //RX_TDDRC_THRD_1 +271 0x1800 //RX_TDDRC_THRD_2 +272 0x1800 //RX_TDDRC_THRD_3 +273 0x3000 //RX_TDDRC_SLANT_0 +274 0x6E00 //RX_TDDRC_SLANT_1 +275 0x1000 //RX_TDDRC_ALPHA_UP_0 +276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x199A //RX_TDDRC_HMNC_GAIN +279 0x0001 //RX_TDDRC_SMT_FLAG +280 0x0CCD //RX_TDDRC_SMT_W +281 0x04E6 //RX_TDDRC_DRC_GAIN +195 0x001C //RX_FDEQ_SUBNUM +196 0x4840 //RX_FDEQ_GAIN_0 +197 0x4040 //RX_FDEQ_GAIN_1 +198 0x4659 //RX_FDEQ_GAIN_2 +199 0x6474 //RX_FDEQ_GAIN_3 +200 0x7A82 //RX_FDEQ_GAIN_4 +201 0x8180 //RX_FDEQ_GAIN_5 +202 0x8084 //RX_FDEQ_GAIN_6 +203 0x8A88 //RX_FDEQ_GAIN_7 +204 0x8C8C //RX_FDEQ_GAIN_8 +205 0x8A95 //RX_FDEQ_GAIN_9 +206 0x978E //RX_FDEQ_GAIN_10 +207 0x8C8C //RX_FDEQ_GAIN_11 +208 0x7068 //RX_FDEQ_GAIN_12 +209 0x6050 //RX_FDEQ_GAIN_13 +210 0x4848 //RX_FDEQ_GAIN_14 +211 0x4848 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0202 //RX_FDEQ_BIN_0 +221 0x0203 //RX_FDEQ_BIN_1 +222 0x0303 //RX_FDEQ_BIN_2 +223 0x0304 //RX_FDEQ_BIN_3 +224 0x0405 //RX_FDEQ_BIN_4 +225 0x0506 //RX_FDEQ_BIN_5 +226 0x0708 //RX_FDEQ_BIN_6 +227 0x090A //RX_FDEQ_BIN_7 +228 0x0B0C //RX_FDEQ_BIN_8 +229 0x0D0E //RX_FDEQ_BIN_9 +230 0x0E0F //RX_FDEQ_BIN_10 +231 0x0F0E //RX_FDEQ_BIN_11 +232 0x100D //RX_FDEQ_BIN_12 +233 0x110A //RX_FDEQ_BIN_13 +234 0x0000 //RX_FDEQ_BIN_14 +235 0x0000 //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x4000 //RX_FDEQ_RESRV_0 +245 0x0320 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0030 //RX_FDDRC_BAND_MARGIN_1 +248 0x0050 //RX_FDDRC_BAND_MARGIN_2 +249 0x0080 //RX_FDDRC_BAND_MARGIN_3 +250 0x0007 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x5000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x6400 //RX_FDDRC_THRD_3_2 +258 0x6400 //RX_FDDRC_THRD_3_3 +259 0x2000 //RX_FDDRC_SLANT_0_0 +260 0x2000 //RX_FDDRC_SLANT_0_1 +261 0x2000 //RX_FDDRC_SLANT_0_2 +262 0x2000 //RX_FDDRC_SLANT_0_3 +263 0x5333 //RX_FDDRC_SLANT_1_0 +264 0x5333 //RX_FDDRC_SLANT_1_1 +265 0x5333 //RX_FDDRC_SLANT_1_2 +266 0x5333 //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +286 0x0050 //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 +#VOL 5 +163 0x1000 //RX_TDDRC_ALPHA_UP_1 +164 0x1000 //RX_TDDRC_ALPHA_UP_2 +165 0x1000 //RX_TDDRC_ALPHA_UP_3 +166 0x1000 //RX_TDDRC_ALPHA_UP_4 +184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +190 0x7000 //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +269 0x0000 //RX_TDDRC_THRD_0 +270 0x0000 //RX_TDDRC_THRD_1 +271 0x1800 //RX_TDDRC_THRD_2 +272 0x1800 //RX_TDDRC_THRD_3 +273 0x3000 //RX_TDDRC_SLANT_0 +274 0x6E00 //RX_TDDRC_SLANT_1 +275 0x1000 //RX_TDDRC_ALPHA_UP_0 +276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x199A //RX_TDDRC_HMNC_GAIN +279 0x0001 //RX_TDDRC_SMT_FLAG +280 0x0CCD //RX_TDDRC_SMT_W +281 0x04E6 //RX_TDDRC_DRC_GAIN +195 0x001C //RX_FDEQ_SUBNUM +196 0x4840 //RX_FDEQ_GAIN_0 +197 0x4040 //RX_FDEQ_GAIN_1 +198 0x4659 //RX_FDEQ_GAIN_2 +199 0x6474 //RX_FDEQ_GAIN_3 +200 0x7A82 //RX_FDEQ_GAIN_4 +201 0x8180 //RX_FDEQ_GAIN_5 +202 0x8084 //RX_FDEQ_GAIN_6 +203 0x8A88 //RX_FDEQ_GAIN_7 +204 0x8C8C //RX_FDEQ_GAIN_8 +205 0x8A95 //RX_FDEQ_GAIN_9 +206 0x978E //RX_FDEQ_GAIN_10 +207 0x8C8C //RX_FDEQ_GAIN_11 +208 0x7068 //RX_FDEQ_GAIN_12 +209 0x6050 //RX_FDEQ_GAIN_13 +210 0x4848 //RX_FDEQ_GAIN_14 +211 0x4848 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0202 //RX_FDEQ_BIN_0 +221 0x0203 //RX_FDEQ_BIN_1 +222 0x0303 //RX_FDEQ_BIN_2 +223 0x0304 //RX_FDEQ_BIN_3 +224 0x0405 //RX_FDEQ_BIN_4 +225 0x0506 //RX_FDEQ_BIN_5 +226 0x0708 //RX_FDEQ_BIN_6 +227 0x090A //RX_FDEQ_BIN_7 +228 0x0B0C //RX_FDEQ_BIN_8 +229 0x0D0E //RX_FDEQ_BIN_9 +230 0x0E0F //RX_FDEQ_BIN_10 +231 0x0F0E //RX_FDEQ_BIN_11 +232 0x100D //RX_FDEQ_BIN_12 +233 0x110A //RX_FDEQ_BIN_13 +234 0x0000 //RX_FDEQ_BIN_14 +235 0x0000 //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x4000 //RX_FDEQ_RESRV_0 +245 0x0320 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0030 //RX_FDDRC_BAND_MARGIN_1 +248 0x0050 //RX_FDDRC_BAND_MARGIN_2 +249 0x0080 //RX_FDDRC_BAND_MARGIN_3 +250 0x0007 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x5000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x6400 //RX_FDDRC_THRD_3_2 +258 0x6400 //RX_FDDRC_THRD_3_3 +259 0x2000 //RX_FDDRC_SLANT_0_0 +260 0x2000 //RX_FDDRC_SLANT_0_1 +261 0x2000 //RX_FDDRC_SLANT_0_2 +262 0x2000 //RX_FDDRC_SLANT_0_3 +263 0x5333 //RX_FDDRC_SLANT_1_0 +264 0x5333 //RX_FDDRC_SLANT_1_1 +265 0x5333 //RX_FDDRC_SLANT_1_2 +266 0x5333 //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +286 0x0086 //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 +#VOL 6 +163 0x1000 //RX_TDDRC_ALPHA_UP_1 +164 0x1000 //RX_TDDRC_ALPHA_UP_2 +165 0x1000 //RX_TDDRC_ALPHA_UP_3 +166 0x1000 //RX_TDDRC_ALPHA_UP_4 +184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +190 0x7000 //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +269 0x0000 //RX_TDDRC_THRD_0 +270 0x0000 //RX_TDDRC_THRD_1 +271 0x1800 //RX_TDDRC_THRD_2 +272 0x1800 //RX_TDDRC_THRD_3 +273 0x3000 //RX_TDDRC_SLANT_0 +274 0x6E00 //RX_TDDRC_SLANT_1 +275 0x1000 //RX_TDDRC_ALPHA_UP_0 +276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x199A //RX_TDDRC_HMNC_GAIN +279 0x0001 //RX_TDDRC_SMT_FLAG +280 0x0CCD //RX_TDDRC_SMT_W +281 0x04E6 //RX_TDDRC_DRC_GAIN +195 0x001C //RX_FDEQ_SUBNUM +196 0x4840 //RX_FDEQ_GAIN_0 +197 0x4040 //RX_FDEQ_GAIN_1 +198 0x4659 //RX_FDEQ_GAIN_2 +199 0x6474 //RX_FDEQ_GAIN_3 +200 0x7A82 //RX_FDEQ_GAIN_4 +201 0x8180 //RX_FDEQ_GAIN_5 +202 0x8084 //RX_FDEQ_GAIN_6 +203 0x8A88 //RX_FDEQ_GAIN_7 +204 0x8C8C //RX_FDEQ_GAIN_8 +205 0x8A95 //RX_FDEQ_GAIN_9 +206 0x978E //RX_FDEQ_GAIN_10 +207 0x8C8C //RX_FDEQ_GAIN_11 +208 0x7068 //RX_FDEQ_GAIN_12 +209 0x6050 //RX_FDEQ_GAIN_13 +210 0x4848 //RX_FDEQ_GAIN_14 +211 0x4848 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0202 //RX_FDEQ_BIN_0 +221 0x0203 //RX_FDEQ_BIN_1 +222 0x0303 //RX_FDEQ_BIN_2 +223 0x0304 //RX_FDEQ_BIN_3 +224 0x0405 //RX_FDEQ_BIN_4 +225 0x0506 //RX_FDEQ_BIN_5 +226 0x0708 //RX_FDEQ_BIN_6 +227 0x090A //RX_FDEQ_BIN_7 +228 0x0B0C //RX_FDEQ_BIN_8 +229 0x0D0E //RX_FDEQ_BIN_9 +230 0x0E0F //RX_FDEQ_BIN_10 +231 0x0F0E //RX_FDEQ_BIN_11 +232 0x100D //RX_FDEQ_BIN_12 +233 0x110A //RX_FDEQ_BIN_13 +234 0x0000 //RX_FDEQ_BIN_14 +235 0x0000 //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x4000 //RX_FDEQ_RESRV_0 +245 0x0320 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0030 //RX_FDDRC_BAND_MARGIN_1 +248 0x0050 //RX_FDDRC_BAND_MARGIN_2 +249 0x0080 //RX_FDDRC_BAND_MARGIN_3 +250 0x0007 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x5000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x6400 //RX_FDDRC_THRD_3_2 +258 0x6400 //RX_FDDRC_THRD_3_3 +259 0x2000 //RX_FDDRC_SLANT_0_0 +260 0x2000 //RX_FDDRC_SLANT_0_1 +261 0x2000 //RX_FDDRC_SLANT_0_2 +262 0x2000 //RX_FDDRC_SLANT_0_3 +263 0x5333 //RX_FDDRC_SLANT_1_0 +264 0x5333 //RX_FDDRC_SLANT_1_1 +265 0x5333 //RX_FDDRC_SLANT_1_2 +266 0x5333 //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +286 0x0100 //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 #CASE_NAME HANDSET-HANDSET-VOICE_GENERIC-SWB -#PARAM_TYPE TX+RX -#TOTAL_CUSTOM_STEP 7 +#PARAM_MODE FULL +#PARAM_TYPE TX+2RX +#TOTAL_CUSTOM_STEP 7+7 #TX 0 0x0000 //TX_OPERATION_MODE_0 1 0x0000 //TX_OPERATION_MODE_1 -2 0x0026 //TX_PATCH_REG +2 0x0076 //TX_PATCH_REG 3 0x6F7E //TX_SENDFUNC_MODE_0 4 0x0001 //TX_SENDFUNC_MODE_1 5 0x0002 //TX_NUM_MIC @@ -8793,7 +13379,7 @@ 18 0x0000 //TX_SYS_RESRV_2 19 0x0000 //TX_SYS_RESRV_3 20 0x0000 //TX_DIST2REF0 -21 0x009D //TX_DIST2REF1 +21 0x00A3 //TX_DIST2REF1 22 0x0000 //TX_DIST2REF_02 23 0x0000 //TX_DIST2REF_03 24 0x0000 //TX_DIST2REF_04 @@ -9023,12 +13609,12 @@ 248 0xF800 //TX_THR_SN_EST_6 249 0xF700 //TX_THR_SN_EST_7 250 0x0000 //TX_DELTA_THR_SN_EST_0 -251 0x0100 //TX_DELTA_THR_SN_EST_1 +251 0x0200 //TX_DELTA_THR_SN_EST_1 252 0x0200 //TX_DELTA_THR_SN_EST_2 253 0x0200 //TX_DELTA_THR_SN_EST_3 -254 0x0200 //TX_DELTA_THR_SN_EST_4 -255 0x0100 //TX_DELTA_THR_SN_EST_5 -256 0x0200 //TX_DELTA_THR_SN_EST_6 +254 0x0100 //TX_DELTA_THR_SN_EST_4 +255 0x0200 //TX_DELTA_THR_SN_EST_5 +256 0x0100 //TX_DELTA_THR_SN_EST_6 257 0x0200 //TX_DELTA_THR_SN_EST_7 258 0x4000 //TX_LAMBDA_NN_EST_0 259 0x4000 //TX_LAMBDA_NN_EST_1 @@ -9054,18 +13640,18 @@ 279 0x1000 //TX_B_POST_FLT_0 280 0x1000 //TX_B_POST_FLT_1 281 0x0014 //TX_NS_LVL_CTRL_0 -282 0x0016 //TX_NS_LVL_CTRL_1 -283 0x002C //TX_NS_LVL_CTRL_2 -284 0x0016 //TX_NS_LVL_CTRL_3 -285 0x0018 //TX_NS_LVL_CTRL_4 -286 0x0016 //TX_NS_LVL_CTRL_5 -287 0x0012 //TX_NS_LVL_CTRL_6 +282 0x002C //TX_NS_LVL_CTRL_1 +283 0x0016 //TX_NS_LVL_CTRL_2 +284 0x0018 //TX_NS_LVL_CTRL_3 +285 0x0016 //TX_NS_LVL_CTRL_4 +286 0x0012 //TX_NS_LVL_CTRL_5 +287 0x0016 //TX_NS_LVL_CTRL_6 288 0x0017 //TX_NS_LVL_CTRL_7 289 0x000E //TX_MIN_GAIN_S_0 -290 0x0012 //TX_MIN_GAIN_S_1 -291 0x000D //TX_MIN_GAIN_S_2 -292 0x0012 //TX_MIN_GAIN_S_3 -293 0x0010 //TX_MIN_GAIN_S_4 +290 0x000D //TX_MIN_GAIN_S_1 +291 0x0012 //TX_MIN_GAIN_S_2 +292 0x0010 //TX_MIN_GAIN_S_3 +293 0x0012 //TX_MIN_GAIN_S_4 294 0x0012 //TX_MIN_GAIN_S_5 295 0x0012 //TX_MIN_GAIN_S_6 296 0x0012 //TX_MIN_GAIN_S_7 @@ -9087,29 +13673,29 @@ 312 0x7FFF //TX_A_POST_FILT_0 313 0x2000 //TX_A_POST_FILT_1 314 0x4000 //TX_A_POST_FILT_S_0 -315 0x5000 //TX_A_POST_FILT_S_1 +315 0x4000 //TX_A_POST_FILT_S_1 316 0x4000 //TX_A_POST_FILT_S_2 317 0x4000 //TX_A_POST_FILT_S_3 318 0x4000 //TX_A_POST_FILT_S_4 319 0x4000 //TX_A_POST_FILT_S_5 -320 0x4000 //TX_A_POST_FILT_S_6 +320 0x5000 //TX_A_POST_FILT_S_6 321 0x7000 //TX_A_POST_FILT_S_7 322 0x1000 //TX_B_POST_FILT_0 323 0x1000 //TX_B_POST_FILT_1 -324 0x3000 //TX_B_POST_FILT_2 -325 0x1000 //TX_B_POST_FILT_3 -326 0x5000 //TX_B_POST_FILT_4 -327 0x2000 //TX_B_POST_FILT_5 -328 0x6000 //TX_B_POST_FILT_6 +324 0x2000 //TX_B_POST_FILT_2 +325 0x2000 //TX_B_POST_FILT_3 +326 0x2000 //TX_B_POST_FILT_4 +327 0x1000 //TX_B_POST_FILT_5 +328 0x3000 //TX_B_POST_FILT_6 329 0x3000 //TX_B_POST_FILT_7 330 0x1000 //TX_B_LESSCUT_RTO_S_0 -331 0x6000 //TX_B_LESSCUT_RTO_S_1 -332 0x6000 //TX_B_LESSCUT_RTO_S_2 -333 0x6000 //TX_B_LESSCUT_RTO_S_3 -334 0x6000 //TX_B_LESSCUT_RTO_S_4 -335 0x6000 //TX_B_LESSCUT_RTO_S_5 -336 0x7FFF //TX_B_LESSCUT_RTO_S_6 -337 0x7FFF //TX_B_LESSCUT_RTO_S_7 +331 0x1000 //TX_B_LESSCUT_RTO_S_1 +332 0x1000 //TX_B_LESSCUT_RTO_S_2 +333 0x1000 //TX_B_LESSCUT_RTO_S_3 +334 0x1000 //TX_B_LESSCUT_RTO_S_4 +335 0x1000 //TX_B_LESSCUT_RTO_S_5 +336 0x1000 //TX_B_LESSCUT_RTO_S_6 +337 0x1000 //TX_B_LESSCUT_RTO_S_7 338 0x7E14 //TX_LAMBDA_PFILT 339 0x7C29 //TX_LAMBDA_PFILT_S_0 340 0x7C29 //TX_LAMBDA_PFILT_S_1 @@ -9152,10 +13738,10 @@ 377 0x4E20 //TX_NOISE_TH_5_4 378 0x1194 //TX_NOISE_TH_6 379 0x0014 //TX_MINENOISE_TH -380 0x4000 //TX_MINENOISE_MIC0_TH_MTS -381 0xFFEE //TX_MINENOISE_MIC0_TH_EXP -382 0x6000 //TX_MINENOISE_MIC0_S_TH_MTS -383 0xFFF3 //TX_MINENOISE_MIC0_S_TH_EXP +380 0xD508 //TX_MORENS_TFMASK_TH +381 0x0001 //TX_DRC_QUIET_FLOOR +382 0x6D60 //TX_RATIODTL_CUT_TH +383 0x0DAC //TX_DT_CUT_K1 384 0x00A5 //TX_OUT_ENER_S_TH_CLEAN 385 0x00A5 //TX_OUT_ENER_S_TH_LESSCLEAN 386 0x00A5 //TX_OUT_ENER_S_TH_NOISY @@ -9163,15 +13749,15 @@ 388 0x0200 //TX_OUT_ENER_TH_SPEECH 389 0x2000 //TX_SN_NPB_GAIN 390 0x0000 //TX_NN_NPB_GAIN -391 0x0000 //TX_CSX_ALPHA_0 -392 0x0000 //TX_CSX_ALPHA_1 -393 0x0000 //TX_CSX_ALPHA_2 -394 0x0000 //TX_CSX_ALPHA_3 -395 0x0800 //TX_MU_ARSP_EST -396 0x00C8 //TX_P_OUTBEAM_MIN_TH +391 0x3000 //TX_POST_MASK_SUP_HSNE +392 0x07D0 //TX_TAIL_DET_TH +393 0x4000 //TX_B_LESSCUT_RTO_WTA +394 0x0000 //TX_MEL_G_R +395 0x0080 //TX_SUPHIGH_TH +396 0x0000 //TX_MASK_G_R 397 0x0002 //TX_EXTRA_NS_L -398 0x0800 //TX_EXTRA_NS_A -399 0x0005 //TX_VR_NOISE_FLOOR_TH +398 0x1800 //TX_C_POST_FLT_MASK +399 0x7FFF //TX_A_POST_FLT_WNS 400 0x0148 //TX_MIN_G_LOW300HZ 401 0x0004 //TX_MAXLEVEL_CNG 402 0x00B4 //TX_STN_NOISE_TH @@ -9286,16 +13872,16 @@ 511 0x6666 //TX_MIC_TO_BFGAIN 512 0x0000 //TX_MICTOBFGAIN0 513 0x0000 //TX_FASTMUE_TH -514 0x0000 //TX_DERVB_LEN_0 -515 0x0000 //TX_DERVB_LEN_1 -516 0x0000 //TX_RHO_DERVB -517 0x0000 //TX_MIC_INDX_DERVB -518 0x0000 //TX_MU_DERVB -519 0x0000 //TX_DR_RESRV_0 -520 0x0000 //TX_DR_RESRV_1 -521 0x0000 //TX_DR_RESRV_2 -522 0x0000 //TX_DR_RESRV_3 -523 0x0000 //TX_DR_RESRV_4 +514 0x2CCC //TX_DEREVERB_LF_MU +515 0x3200 //TX_DEREVERB_HF_MU +516 0x0007 //TX_DEREVERB_DELAY +517 0x0004 //TX_DEREVERB_COEF_LEN +518 0x0003 //TX_DEREVERB_DNR +519 0x0000 //TX_DEREVERB_ALPHA +520 0x0000 //TX_DEREVERB_BETA +521 0x3A98 //TX_GSC_RTOL_TH +522 0x3A98 //TX_GSC_RTOH_TH +523 0x7E2C //TX_WIDE2_MEANHTH 524 0x0000 //TX_DR_RESRV_5 525 0x0000 //TX_DR_RESRV_6 526 0x0000 //TX_DR_RESRV_7 @@ -9342,19 +13928,19 @@ 567 0x5C54 //TX_FDEQ_GAIN_0 568 0x5048 //TX_FDEQ_GAIN_1 569 0x4C4C //TX_FDEQ_GAIN_2 -570 0x474A //TX_FDEQ_GAIN_3 -571 0x423C //TX_FDEQ_GAIN_4 -572 0x4042 //TX_FDEQ_GAIN_5 -573 0x474F //TX_FDEQ_GAIN_6 -574 0x5444 //TX_FDEQ_GAIN_7 -575 0x4243 //TX_FDEQ_GAIN_8 -576 0x4344 //TX_FDEQ_GAIN_9 -577 0x414D //TX_FDEQ_GAIN_10 -578 0x4A47 //TX_FDEQ_GAIN_11 -579 0x4346 //TX_FDEQ_GAIN_12 -580 0x4C4F //TX_FDEQ_GAIN_13 -581 0x565B //TX_FDEQ_GAIN_14 -582 0x6448 //TX_FDEQ_GAIN_15 +570 0x494D //TX_FDEQ_GAIN_3 +571 0x4442 //TX_FDEQ_GAIN_4 +572 0x4448 //TX_FDEQ_GAIN_5 +573 0x4C53 //TX_FDEQ_GAIN_6 +574 0x6244 //TX_FDEQ_GAIN_7 +575 0x4348 //TX_FDEQ_GAIN_8 +576 0x4848 //TX_FDEQ_GAIN_9 +577 0x4A49 //TX_FDEQ_GAIN_10 +578 0x4E4A //TX_FDEQ_GAIN_11 +579 0x4840 //TX_FDEQ_GAIN_12 +580 0x4040 //TX_FDEQ_GAIN_13 +581 0x4054 //TX_FDEQ_GAIN_14 +582 0x687A //TX_FDEQ_GAIN_15 583 0x4848 //TX_FDEQ_GAIN_16 584 0x4848 //TX_FDEQ_GAIN_17 585 0x4848 //TX_FDEQ_GAIN_18 @@ -9397,3514 +13983,8 @@ 622 0x4848 //TX_PREEQ_GAIN_MIC0_5 623 0x4848 //TX_PREEQ_GAIN_MIC0_6 624 0x4848 //TX_PREEQ_GAIN_MIC0_7 -625 0x4646 //TX_PREEQ_GAIN_MIC0_8 -626 0x4545 //TX_PREEQ_GAIN_MIC0_9 -627 0x4545 //TX_PREEQ_GAIN_MIC0_10 -628 0x4544 //TX_PREEQ_GAIN_MIC0_11 -629 0x4444 //TX_PREEQ_GAIN_MIC0_12 -630 0x4343 //TX_PREEQ_GAIN_MIC0_13 -631 0x4241 //TX_PREEQ_GAIN_MIC0_14 -632 0x3C3E //TX_PREEQ_GAIN_MIC0_15 -633 0x4848 //TX_PREEQ_GAIN_MIC0_16 -634 0x4848 //TX_PREEQ_GAIN_MIC0_17 -635 0x4848 //TX_PREEQ_GAIN_MIC0_18 -636 0x4848 //TX_PREEQ_GAIN_MIC0_19 -637 0x4848 //TX_PREEQ_GAIN_MIC0_20 -638 0x4848 //TX_PREEQ_GAIN_MIC0_21 -639 0x4848 //TX_PREEQ_GAIN_MIC0_22 -640 0x4848 //TX_PREEQ_GAIN_MIC0_23 -641 0x0202 //TX_PREEQ_BIN_MIC0_0 -642 0x0203 //TX_PREEQ_BIN_MIC0_1 -643 0x0303 //TX_PREEQ_BIN_MIC0_2 -644 0x0304 //TX_PREEQ_BIN_MIC0_3 -645 0x0405 //TX_PREEQ_BIN_MIC0_4 -646 0x0506 //TX_PREEQ_BIN_MIC0_5 -647 0x0708 //TX_PREEQ_BIN_MIC0_6 -648 0x090A //TX_PREEQ_BIN_MIC0_7 -649 0x0B0C //TX_PREEQ_BIN_MIC0_8 -650 0x0D0E //TX_PREEQ_BIN_MIC0_9 -651 0x1013 //TX_PREEQ_BIN_MIC0_10 -652 0x1719 //TX_PREEQ_BIN_MIC0_11 -653 0x1B1E //TX_PREEQ_BIN_MIC0_12 -654 0x1E1E //TX_PREEQ_BIN_MIC0_13 -655 0x1E28 //TX_PREEQ_BIN_MIC0_14 -656 0x282C //TX_PREEQ_BIN_MIC0_15 -657 0x0000 //TX_PREEQ_BIN_MIC0_16 -658 0x0000 //TX_PREEQ_BIN_MIC0_17 -659 0x0000 //TX_PREEQ_BIN_MIC0_18 -660 0x0000 //TX_PREEQ_BIN_MIC0_19 -661 0x0000 //TX_PREEQ_BIN_MIC0_20 -662 0x0000 //TX_PREEQ_BIN_MIC0_21 -663 0x0000 //TX_PREEQ_BIN_MIC0_22 -664 0x0000 //TX_PREEQ_BIN_MIC0_23 -665 0x0020 //TX_PREEQ_SUBNUM_MIC1 -666 0x4848 //TX_PREEQ_GAIN_MIC1_0 -667 0x4848 //TX_PREEQ_GAIN_MIC1_1 -668 0x4848 //TX_PREEQ_GAIN_MIC1_2 -669 0x4848 //TX_PREEQ_GAIN_MIC1_3 -670 0x4848 //TX_PREEQ_GAIN_MIC1_4 -671 0x4848 //TX_PREEQ_GAIN_MIC1_5 -672 0x4848 //TX_PREEQ_GAIN_MIC1_6 -673 0x4848 //TX_PREEQ_GAIN_MIC1_7 -674 0x484A //TX_PREEQ_GAIN_MIC1_8 -675 0x4B4C //TX_PREEQ_GAIN_MIC1_9 -676 0x4B4A //TX_PREEQ_GAIN_MIC1_10 -677 0x4A48 //TX_PREEQ_GAIN_MIC1_11 -678 0x4C4C //TX_PREEQ_GAIN_MIC1_12 -679 0x4C4C //TX_PREEQ_GAIN_MIC1_13 -680 0x4848 //TX_PREEQ_GAIN_MIC1_14 -681 0x4848 //TX_PREEQ_GAIN_MIC1_15 -682 0x4848 //TX_PREEQ_GAIN_MIC1_16 -683 0x4848 //TX_PREEQ_GAIN_MIC1_17 -684 0x4848 //TX_PREEQ_GAIN_MIC1_18 -685 0x4848 //TX_PREEQ_GAIN_MIC1_19 -686 0x4848 //TX_PREEQ_GAIN_MIC1_20 -687 0x4848 //TX_PREEQ_GAIN_MIC1_21 -688 0x4848 //TX_PREEQ_GAIN_MIC1_22 -689 0x4848 //TX_PREEQ_GAIN_MIC1_23 -690 0x0202 //TX_PREEQ_BIN_MIC1_0 -691 0x0203 //TX_PREEQ_BIN_MIC1_1 -692 0x0303 //TX_PREEQ_BIN_MIC1_2 -693 0x0304 //TX_PREEQ_BIN_MIC1_3 -694 0x0405 //TX_PREEQ_BIN_MIC1_4 -695 0x0506 //TX_PREEQ_BIN_MIC1_5 -696 0x0708 //TX_PREEQ_BIN_MIC1_6 -697 0x090A //TX_PREEQ_BIN_MIC1_7 -698 0x0B0C //TX_PREEQ_BIN_MIC1_8 -699 0x0D0E //TX_PREEQ_BIN_MIC1_9 -700 0x0F10 //TX_PREEQ_BIN_MIC1_10 -701 0x1011 //TX_PREEQ_BIN_MIC1_11 -702 0x1112 //TX_PREEQ_BIN_MIC1_12 -703 0x120B //TX_PREEQ_BIN_MIC1_13 -704 0x0000 //TX_PREEQ_BIN_MIC1_14 -705 0x0000 //TX_PREEQ_BIN_MIC1_15 -706 0x0000 //TX_PREEQ_BIN_MIC1_16 -707 0x0000 //TX_PREEQ_BIN_MIC1_17 -708 0x0000 //TX_PREEQ_BIN_MIC1_18 -709 0x0000 //TX_PREEQ_BIN_MIC1_19 -710 0x0000 //TX_PREEQ_BIN_MIC1_20 -711 0x0000 //TX_PREEQ_BIN_MIC1_21 -712 0x0000 //TX_PREEQ_BIN_MIC1_22 -713 0x0000 //TX_PREEQ_BIN_MIC1_23 -714 0x0030 //TX_PREEQ_SUBNUM_MIC2 -715 0x4848 //TX_PREEQ_GAIN_MIC2_0 -716 0x4848 //TX_PREEQ_GAIN_MIC2_1 -717 0x4848 //TX_PREEQ_GAIN_MIC2_2 -718 0x4848 //TX_PREEQ_GAIN_MIC2_3 -719 0x4848 //TX_PREEQ_GAIN_MIC2_4 -720 0x4848 //TX_PREEQ_GAIN_MIC2_5 -721 0x4848 //TX_PREEQ_GAIN_MIC2_6 -722 0x4848 //TX_PREEQ_GAIN_MIC2_7 -723 0x4848 //TX_PREEQ_GAIN_MIC2_8 -724 0x4848 //TX_PREEQ_GAIN_MIC2_9 -725 0x4848 //TX_PREEQ_GAIN_MIC2_10 -726 0x4848 //TX_PREEQ_GAIN_MIC2_11 -727 0x4848 //TX_PREEQ_GAIN_MIC2_12 -728 0x4848 //TX_PREEQ_GAIN_MIC2_13 -729 0x4848 //TX_PREEQ_GAIN_MIC2_14 -730 0x4848 //TX_PREEQ_GAIN_MIC2_15 -731 0x4848 //TX_PREEQ_GAIN_MIC2_16 -732 0x4848 //TX_PREEQ_GAIN_MIC2_17 -733 0x4848 //TX_PREEQ_GAIN_MIC2_18 -734 0x4848 //TX_PREEQ_GAIN_MIC2_19 -735 0x4848 //TX_PREEQ_GAIN_MIC2_20 -736 0x4848 //TX_PREEQ_GAIN_MIC2_21 -737 0x4848 //TX_PREEQ_GAIN_MIC2_22 -738 0x4848 //TX_PREEQ_GAIN_MIC2_23 -739 0x0608 //TX_PREEQ_BIN_MIC2_0 -740 0x0808 //TX_PREEQ_BIN_MIC2_1 -741 0x0808 //TX_PREEQ_BIN_MIC2_2 -742 0x0808 //TX_PREEQ_BIN_MIC2_3 -743 0x0808 //TX_PREEQ_BIN_MIC2_4 -744 0x0808 //TX_PREEQ_BIN_MIC2_5 -745 0x0808 //TX_PREEQ_BIN_MIC2_6 -746 0x0808 //TX_PREEQ_BIN_MIC2_7 -747 0x0808 //TX_PREEQ_BIN_MIC2_8 -748 0x0808 //TX_PREEQ_BIN_MIC2_9 -749 0x0808 //TX_PREEQ_BIN_MIC2_10 -750 0x0808 //TX_PREEQ_BIN_MIC2_11 -751 0x0808 //TX_PREEQ_BIN_MIC2_12 -752 0x0808 //TX_PREEQ_BIN_MIC2_13 -753 0x0808 //TX_PREEQ_BIN_MIC2_14 -754 0x0200 //TX_PREEQ_BIN_MIC2_15 -755 0x0000 //TX_PREEQ_BIN_MIC2_16 -756 0x0000 //TX_PREEQ_BIN_MIC2_17 -757 0x0000 //TX_PREEQ_BIN_MIC2_18 -758 0x0000 //TX_PREEQ_BIN_MIC2_19 -759 0x0000 //TX_PREEQ_BIN_MIC2_20 -760 0x0000 //TX_PREEQ_BIN_MIC2_21 -761 0x0000 //TX_PREEQ_BIN_MIC2_22 -762 0x0000 //TX_PREEQ_BIN_MIC2_23 -763 0x0006 //TX_MASKING_ABILITY -764 0x0800 //TX_NND_WEIGHT -765 0x0050 //TX_MIC_CALIBRATION_0 -766 0x0056 //TX_MIC_CALIBRATION_1 -767 0x0050 //TX_MIC_CALIBRATION_2 -768 0x0050 //TX_MIC_CALIBRATION_3 -769 0x0046 //TX_MIC_PWR_BIAS_0 -770 0x0042 //TX_MIC_PWR_BIAS_1 -771 0x0046 //TX_MIC_PWR_BIAS_2 -772 0x0046 //TX_MIC_PWR_BIAS_3 -773 0x0000 //TX_GAIN_LIMIT_0 -774 0x0005 //TX_GAIN_LIMIT_1 -775 0x0000 //TX_GAIN_LIMIT_2 -776 0x0000 //TX_GAIN_LIMIT_3 -777 0x7F5B //TX_BVE_NOVAD0_ALPHADOWN -778 0x7FDE //TX_BVE_VAD0_ALPHAUP -779 0x7F3A //TX_BVE_VAD0_ALPHADOWN -780 0x2000 //TX_BVE_GAINWEIGHT_NOFEVADLI -781 0x7F5B //TX_BVE_FEVADLI_ALPHA -782 0x7F19 //TX_BVE_NOVAD0_ALPHAUP -783 0x1000 //TX_TDDRC_ALPHA_UP_01 -784 0x1000 //TX_TDDRC_ALPHA_UP_02 -785 0x1000 //TX_TDDRC_ALPHA_UP_03 -786 0x1000 //TX_TDDRC_ALPHA_UP_04 -787 0x7EB8 //TX_TDDRC_ALPHA_DWN_01 -788 0x7EB8 //TX_TDDRC_ALPHA_DWN_02 -789 0x7EB8 //TX_TDDRC_ALPHA_DWN_03 -790 0x7EB8 //TX_TDDRC_ALPHA_DWN_04 -791 0x7FFF //TX_TDDRC_TD_DRC_LIMIT -792 0x0800 //TX_TDDRC_POST_LIMIT_GAIN -793 0x0000 //TX_TDDRC_RESRV_0 -794 0x0000 //TX_TDDRC_RESRV_1 -795 0x0018 //TX_FDDRC_BAND_MARGIN_0 -796 0x0030 //TX_FDDRC_BAND_MARGIN_1 -797 0x0050 //TX_FDDRC_BAND_MARGIN_2 -798 0x0080 //TX_FDDRC_BAND_MARGIN_3 -799 0x0007 //TX_FDDRC_BLOCK_EXP -800 0x5000 //TX_FDDRC_THRD_2_0 -801 0x5000 //TX_FDDRC_THRD_2_1 -802 0x5000 //TX_FDDRC_THRD_2_2 -803 0x5000 //TX_FDDRC_THRD_2_3 -804 0x6400 //TX_FDDRC_THRD_3_0 -805 0x6400 //TX_FDDRC_THRD_3_1 -806 0x6400 //TX_FDDRC_THRD_3_2 -807 0x6400 //TX_FDDRC_THRD_3_3 -808 0x2000 //TX_FDDRC_SLANT_0_0 -809 0x2000 //TX_FDDRC_SLANT_0_1 -810 0x2000 //TX_FDDRC_SLANT_0_2 -811 0x2000 //TX_FDDRC_SLANT_0_3 -812 0x5333 //TX_FDDRC_SLANT_1_0 -813 0x5333 //TX_FDDRC_SLANT_1_1 -814 0x5333 //TX_FDDRC_SLANT_1_2 -815 0x5333 //TX_FDDRC_SLANT_1_3 -816 0x0010 //TX_DEADMIC_SILENCE_TH -817 0x0600 //TX_MIC_DEGRADE_TH -818 0x0078 //TX_DEADMIC_CNT -819 0x0078 //TX_MIC_DEGRADE_CNT -820 0x0000 //TX_FDDRC_RESRV_4 -821 0x0000 //TX_FDDRC_RESRV_5 -822 0x0000 //TX_FDDRC_RESRV_6 -823 0x7FFF //TX_KS_NOISEPASTE_FACTOR -824 0x0001 //TX_KS_CONFIG -825 0x7FFF //TX_KS_GAIN_MIN -826 0x0000 //TX_KS_RESRV_0 -827 0x0000 //TX_KS_RESRV_1 -828 0x0000 //TX_KS_RESRV_2 -829 0x7C00 //TX_LAMBDA_PKA_FP -830 0x2000 //TX_TPKA_FP -831 0x0080 //TX_MIN_G_FP -832 0x2000 //TX_MAX_G_FP -833 0x0FA0 //TX_FFP_FP_K_METAL -834 0x4000 //TX_A_POST_FLT_FP -835 0x0F5C //TX_RTO_OUTBEAM_TH -836 0x4CCD //TX_TPKA_FP_THD -837 0x0000 //TX_MAX_G_FP_BLK -838 0x0000 //TX_FFP_FADEIN -839 0x0000 //TX_FFP_FADEOUT -840 0x0000 //TX_WHISPERCTH -841 0x0000 //TX_WHISPERHOLDT -842 0x0000 //TX_WHISP_ENTHH -843 0x0000 //TX_WHISP_ENTHL -844 0x0000 //TX_WHISP_RTOTH -845 0x0000 //TX_WHISP_RTOTH2 -846 0x0096 //TX_MUTE_PERIOD -847 0x0000 //TX_FADE_IN_PERIOD -848 0x0100 //TX_FFP_RESRV_2 -849 0x0020 //TX_FFP_RESRV_3 -850 0x0000 //TX_FFP_RESRV_4 -851 0x0000 //TX_FFP_RESRV_5 -852 0x0000 //TX_FFP_RESRV_6 -853 0x0002 //TX_FILTINDX -854 0x0002 //TX_TDDRC_THRD_0 -855 0x0003 //TX_TDDRC_THRD_1 -856 0x1500 //TX_TDDRC_THRD_2 -857 0x1500 //TX_TDDRC_THRD_3 -858 0x3000 //TX_TDDRC_SLANT_0 -859 0x6E00 //TX_TDDRC_SLANT_1 -860 0x1000 //TX_TDDRC_ALPHA_UP_00 -861 0x7EB8 //TX_TDDRC_ALPHA_DWN_00 -862 0x0000 //TX_TDDRC_HMNC_FLAG -863 0x199A //TX_TDDRC_HMNC_GAIN -864 0x0000 //TX_TDDRC_SMT_FLAG -865 0x0CCD //TX_TDDRC_SMT_W -866 0x0550 //TX_TDDRC_DRC_GAIN -867 0x7FFF //TX_TDDRC_LMT_THRD -868 0x0000 //TX_TDDRC_LMT_ALPHA -869 0x0000 //TX_TFMASKLTH -870 0x0000 //TX_TFMASKLTHL -871 0x0CCD //TX_TFMASKHTH -872 0xECCD //TX_TFMASKLTH_BINVAD -873 0xFCCD //TX_TFMASKLTH_NS_EST -874 0xF800 //TX_TFMASKLTH_DOA -875 0x0CCD //TX_TFMASKTH_BLESSCUT -876 0x1000 //TX_B_LESSCUT_RTO_MASK -877 0x2000 //TX_SB_RHO_MEAN_TH_ABN -878 0x2000 //TX_B_POST_FLT_MASK -879 0x0000 //TX_B_POST_FLT_MASK1 -880 0x6333 //TX_GAIN_WIND_MASK -881 0x0000 //TX_TFMASK_BFSTRICT_MUSIC -882 0x0000 //TX_TFMASK_BFSTRICT_NOMUSIC -883 0x7333 //TX_FASTNS_OUTIN_TH -884 0x0CCD //TX_FASTNS_TFMASK_TH -885 0x0CCD //TX_FASTNS_TFMASKBIN_TH1 -886 0x0CCD //TX_FASTNS_TFMASKBIN_TH2 -887 0x0CCD //TX_FASTNS_TFMASKBIN_TH3 -888 0x0028 //TX_FASTNS_ARSPC_TH -889 0xC000 //TX_FASTNS_MASK5_TH -890 0x0810 //TX_POSTSSA_MIN_G_VR_MASK -891 0x1000 //TX_A_LESSCUT_RTO_MASK -892 0x1770 //TX_FASTNS_NOISETH -893 0xC000 //TX_FASTNS_SSA_THLFL -894 0xC000 //TX_FASTNS_SSA_THHFL -895 0xCCCC //TX_FASTNS_SSA_THLFH -896 0xD999 //TX_FASTNS_SSA_THHFH -#RX -0 0x003C //RX_RECVFUNC_MODE_0 -1 0x0000 //RX_RECVFUNC_MODE_1 -2 0x0003 //RX_SAMPLINGFREQ_SIG -3 0x0003 //RX_SAMPLINGFREQ_PROC -4 0x000A //RX_FRAME_SZ -5 0x0000 //RX_DELAY_OPT -6 0x1000 //RX_TDDRC_ALPHA_UP_1 -7 0x1000 //RX_TDDRC_ALPHA_UP_2 -8 0x1000 //RX_TDDRC_ALPHA_UP_3 -9 0x1000 //RX_TDDRC_ALPHA_UP_4 -10 0x0600 //RX_PGA -11 0x7FFF //RX_A_HP -12 0x4000 //RX_B_PE -13 0x5800 //RX_THR_PITCH_DET_0 -14 0x5000 //RX_THR_PITCH_DET_1 -15 0x4000 //RX_THR_PITCH_DET_2 -16 0x0008 //RX_PITCH_BFR_LEN -17 0x0003 //RX_SBD_PITCH_DET -18 0x0100 //RX_PP_RESRV_0 -19 0x0020 //RX_PP_RESRV_1 -20 0x0600 //RX_N_SN_EST -21 0x000C //RX_N2_SN_EST -22 0x000F //RX_NS_LVL_CTRL -23 0xF800 //RX_THR_SN_EST -24 0x7E00 //RX_LAMBDA_PFILT -25 0x000A //RX_FENS_RESRV_0 -26 0x0190 //RX_FENS_RESRV_1 -27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 -28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 -29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 -30 0x0002 //RX_EXTRA_NS_L -31 0x0800 //RX_EXTRA_NS_A -32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 -33 0x7000 //RX_TDDRC_LIMITER_THRD -34 0x0800 //RX_TDDRC_LIMITER_GAIN -35 0x199A //RX_A_POST_FLT -36 0x0000 //RX_LMT_THRD -37 0x4000 //RX_LMT_ALPHA -38 0x0020 //RX_FDEQ_SUBNUM -39 0x4840 //RX_FDEQ_GAIN_0 -40 0x4040 //RX_FDEQ_GAIN_1 -41 0x4050 //RX_FDEQ_GAIN_2 -42 0x5D6C //RX_FDEQ_GAIN_3 -43 0x7B86 //RX_FDEQ_GAIN_4 -44 0x8186 //RX_FDEQ_GAIN_5 -45 0x8688 //RX_FDEQ_GAIN_6 -46 0x9097 //RX_FDEQ_GAIN_7 -47 0x929F //RX_FDEQ_GAIN_8 -48 0x9CA0 //RX_FDEQ_GAIN_9 -49 0xA391 //RX_FDEQ_GAIN_10 -50 0x8A82 //RX_FDEQ_GAIN_11 -51 0x726E //RX_FDEQ_GAIN_12 -52 0x704E //RX_FDEQ_GAIN_13 -53 0x6565 //RX_FDEQ_GAIN_14 -54 0x698A //RX_FDEQ_GAIN_15 -55 0x4848 //RX_FDEQ_GAIN_16 -56 0x4848 //RX_FDEQ_GAIN_17 -57 0x4848 //RX_FDEQ_GAIN_18 -58 0x4848 //RX_FDEQ_GAIN_19 -59 0x4848 //RX_FDEQ_GAIN_20 -60 0x4848 //RX_FDEQ_GAIN_21 -61 0x4848 //RX_FDEQ_GAIN_22 -62 0x4848 //RX_FDEQ_GAIN_23 -63 0x0202 //RX_FDEQ_BIN_0 -64 0x0202 //RX_FDEQ_BIN_1 -65 0x0302 //RX_FDEQ_BIN_2 -66 0x0304 //RX_FDEQ_BIN_3 -67 0x0405 //RX_FDEQ_BIN_4 -68 0x0506 //RX_FDEQ_BIN_5 -69 0x0708 //RX_FDEQ_BIN_6 -70 0x090A //RX_FDEQ_BIN_7 -71 0x0B0C //RX_FDEQ_BIN_8 -72 0x0D0E //RX_FDEQ_BIN_9 -73 0x1013 //RX_FDEQ_BIN_10 -74 0x1719 //RX_FDEQ_BIN_11 -75 0x1B1E //RX_FDEQ_BIN_12 -76 0x1E1E //RX_FDEQ_BIN_13 -77 0x1E28 //RX_FDEQ_BIN_14 -78 0x282C //RX_FDEQ_BIN_15 -79 0x0000 //RX_FDEQ_BIN_16 -80 0x0000 //RX_FDEQ_BIN_17 -81 0x0000 //RX_FDEQ_BIN_18 -82 0x0000 //RX_FDEQ_BIN_19 -83 0x0000 //RX_FDEQ_BIN_20 -84 0x0000 //RX_FDEQ_BIN_21 -85 0x0000 //RX_FDEQ_BIN_22 -86 0x0000 //RX_FDEQ_BIN_23 -87 0x4000 //RX_FDEQ_RESRV_0 -88 0x0320 //RX_FDEQ_RESRV_1 -89 0x0018 //RX_FDDRC_BAND_MARGIN_0 -90 0x0030 //RX_FDDRC_BAND_MARGIN_1 -91 0x0050 //RX_FDDRC_BAND_MARGIN_2 -92 0x0080 //RX_FDDRC_BAND_MARGIN_3 -93 0x0007 //RX_FDDRC_BLOCK_EXP -94 0x5000 //RX_FDDRC_THRD_2_0 -95 0x5000 //RX_FDDRC_THRD_2_1 -96 0x5000 //RX_FDDRC_THRD_2_2 -97 0x5000 //RX_FDDRC_THRD_2_3 -98 0x6400 //RX_FDDRC_THRD_3_0 -99 0x6400 //RX_FDDRC_THRD_3_1 -100 0x6400 //RX_FDDRC_THRD_3_2 -101 0x6400 //RX_FDDRC_THRD_3_3 -102 0x2000 //RX_FDDRC_SLANT_0_0 -103 0x2000 //RX_FDDRC_SLANT_0_1 -104 0x2000 //RX_FDDRC_SLANT_0_2 -105 0x2000 //RX_FDDRC_SLANT_0_3 -106 0x5333 //RX_FDDRC_SLANT_1_0 -107 0x5333 //RX_FDDRC_SLANT_1_1 -108 0x5333 //RX_FDDRC_SLANT_1_2 -109 0x5333 //RX_FDDRC_SLANT_1_3 -110 0x0000 //RX_FDDRC_RESRV_0 -111 0x0002 //RX_FILTINDX -112 0x0001 //RX_TDDRC_THRD_0 -113 0x0002 //RX_TDDRC_THRD_1 -114 0x1800 //RX_TDDRC_THRD_2 -115 0x1800 //RX_TDDRC_THRD_3 -116 0x3000 //RX_TDDRC_SLANT_0 -117 0x6E00 //RX_TDDRC_SLANT_1 -118 0x1000 //RX_TDDRC_ALPHA_UP_0 -119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 -120 0x0000 //RX_TDDRC_HMNC_FLAG -121 0x199A //RX_TDDRC_HMNC_GAIN -122 0x0001 //RX_TDDRC_SMT_FLAG -123 0x0CCD //RX_TDDRC_SMT_W -124 0x0523 //RX_TDDRC_DRC_GAIN -125 0x7C00 //RX_LAMBDA_PKA_FP -126 0x13E0 //RX_TPKA_FP -127 0x0080 //RX_MIN_G_FP -128 0x2000 //RX_MAX_G_FP -129 0x000B //RX_SPK_VOL -130 0x0000 //RX_VOL_RESRV_0 -131 0x0000 //RX_MAXLEVEL_CNG -132 0x3000 //RX_BWE_UV_TH -133 0x3000 //RX_BWE_UV_TH2 -134 0x1800 //RX_BWE_UV_TH3 -135 0x1000 //RX_BWE_V_TH -136 0x04CD //RX_BWE_GAIN1_V_TH1 -137 0x0F33 //RX_BWE_GAIN1_V_TH2 -138 0x7333 //RX_BWE_UV_EQ -139 0x199A //RX_BWE_V_EQ -140 0x7333 //RX_BWE_TONE_TH -141 0x0004 //RX_BWE_UV_HOLD_T -142 0x6CCD //RX_BWE_GAIN2_ALPHA -143 0x799A //RX_BWE_GAIN3_ALPHA -144 0x001E //RX_BWE_CUTOFF -145 0x3000 //RX_BWE_GAINFILL -146 0x3200 //RX_BWE_MAXTH_TONE -147 0x2000 //RX_BWE_EQ_0 -148 0x2000 //RX_BWE_EQ_1 -149 0x2000 //RX_BWE_EQ_2 -150 0x2000 //RX_BWE_EQ_3 -151 0x2000 //RX_BWE_EQ_4 -152 0x2000 //RX_BWE_EQ_5 -153 0x2000 //RX_BWE_EQ_6 -154 0x0000 //RX_BWE_RESRV_0 -155 0x0000 //RX_BWE_RESRV_1 -156 0x0000 //RX_BWE_RESRV_2 -#VOL 0 -6 0x1000 //RX_TDDRC_ALPHA_UP_1 -7 0x1000 //RX_TDDRC_ALPHA_UP_2 -8 0x1000 //RX_TDDRC_ALPHA_UP_3 -9 0x1000 //RX_TDDRC_ALPHA_UP_4 -27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 -28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 -29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 -32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 -33 0x7000 //RX_TDDRC_LIMITER_THRD -34 0x0800 //RX_TDDRC_LIMITER_GAIN -112 0x0001 //RX_TDDRC_THRD_0 -113 0x0002 //RX_TDDRC_THRD_1 -114 0x1800 //RX_TDDRC_THRD_2 -115 0x1800 //RX_TDDRC_THRD_3 -116 0x3000 //RX_TDDRC_SLANT_0 -117 0x6E00 //RX_TDDRC_SLANT_1 -118 0x1000 //RX_TDDRC_ALPHA_UP_0 -119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 -120 0x0000 //RX_TDDRC_HMNC_FLAG -121 0x199A //RX_TDDRC_HMNC_GAIN -122 0x0001 //RX_TDDRC_SMT_FLAG -123 0x0CCD //RX_TDDRC_SMT_W -124 0x0523 //RX_TDDRC_DRC_GAIN -38 0x0020 //RX_FDEQ_SUBNUM -39 0x4840 //RX_FDEQ_GAIN_0 -40 0x4040 //RX_FDEQ_GAIN_1 -41 0x4050 //RX_FDEQ_GAIN_2 -42 0x5D6C //RX_FDEQ_GAIN_3 -43 0x7B86 //RX_FDEQ_GAIN_4 -44 0x8186 //RX_FDEQ_GAIN_5 -45 0x8688 //RX_FDEQ_GAIN_6 -46 0x9097 //RX_FDEQ_GAIN_7 -47 0x929F //RX_FDEQ_GAIN_8 -48 0x9CA0 //RX_FDEQ_GAIN_9 -49 0xA391 //RX_FDEQ_GAIN_10 -50 0x8A82 //RX_FDEQ_GAIN_11 -51 0x726E //RX_FDEQ_GAIN_12 -52 0x704E //RX_FDEQ_GAIN_13 -53 0x6565 //RX_FDEQ_GAIN_14 -54 0x698A //RX_FDEQ_GAIN_15 -55 0x4848 //RX_FDEQ_GAIN_16 -56 0x4848 //RX_FDEQ_GAIN_17 -57 0x4848 //RX_FDEQ_GAIN_18 -58 0x4848 //RX_FDEQ_GAIN_19 -59 0x4848 //RX_FDEQ_GAIN_20 -60 0x4848 //RX_FDEQ_GAIN_21 -61 0x4848 //RX_FDEQ_GAIN_22 -62 0x4848 //RX_FDEQ_GAIN_23 -63 0x0202 //RX_FDEQ_BIN_0 -64 0x0202 //RX_FDEQ_BIN_1 -65 0x0302 //RX_FDEQ_BIN_2 -66 0x0304 //RX_FDEQ_BIN_3 -67 0x0405 //RX_FDEQ_BIN_4 -68 0x0506 //RX_FDEQ_BIN_5 -69 0x0708 //RX_FDEQ_BIN_6 -70 0x090A //RX_FDEQ_BIN_7 -71 0x0B0C //RX_FDEQ_BIN_8 -72 0x0D0E //RX_FDEQ_BIN_9 -73 0x1013 //RX_FDEQ_BIN_10 -74 0x1719 //RX_FDEQ_BIN_11 -75 0x1B1E //RX_FDEQ_BIN_12 -76 0x1E1E //RX_FDEQ_BIN_13 -77 0x1E28 //RX_FDEQ_BIN_14 -78 0x282C //RX_FDEQ_BIN_15 -79 0x0000 //RX_FDEQ_BIN_16 -80 0x0000 //RX_FDEQ_BIN_17 -81 0x0000 //RX_FDEQ_BIN_18 -82 0x0000 //RX_FDEQ_BIN_19 -83 0x0000 //RX_FDEQ_BIN_20 -84 0x0000 //RX_FDEQ_BIN_21 -85 0x0000 //RX_FDEQ_BIN_22 -86 0x0000 //RX_FDEQ_BIN_23 -87 0x4000 //RX_FDEQ_RESRV_0 -88 0x0320 //RX_FDEQ_RESRV_1 -89 0x0018 //RX_FDDRC_BAND_MARGIN_0 -90 0x0030 //RX_FDDRC_BAND_MARGIN_1 -91 0x0050 //RX_FDDRC_BAND_MARGIN_2 -92 0x0080 //RX_FDDRC_BAND_MARGIN_3 -93 0x0007 //RX_FDDRC_BLOCK_EXP -94 0x5000 //RX_FDDRC_THRD_2_0 -95 0x5000 //RX_FDDRC_THRD_2_1 -96 0x5000 //RX_FDDRC_THRD_2_2 -97 0x5000 //RX_FDDRC_THRD_2_3 -98 0x6400 //RX_FDDRC_THRD_3_0 -99 0x6400 //RX_FDDRC_THRD_3_1 -100 0x6400 //RX_FDDRC_THRD_3_2 -101 0x6400 //RX_FDDRC_THRD_3_3 -102 0x2000 //RX_FDDRC_SLANT_0_0 -103 0x2000 //RX_FDDRC_SLANT_0_1 -104 0x2000 //RX_FDDRC_SLANT_0_2 -105 0x2000 //RX_FDDRC_SLANT_0_3 -106 0x5333 //RX_FDDRC_SLANT_1_0 -107 0x5333 //RX_FDDRC_SLANT_1_1 -108 0x5333 //RX_FDDRC_SLANT_1_2 -109 0x5333 //RX_FDDRC_SLANT_1_3 -110 0x0000 //RX_FDDRC_RESRV_0 -129 0x000B //RX_SPK_VOL -130 0x0000 //RX_VOL_RESRV_0 -#VOL 1 -6 0x1000 //RX_TDDRC_ALPHA_UP_1 -7 0x1000 //RX_TDDRC_ALPHA_UP_2 -8 0x1000 //RX_TDDRC_ALPHA_UP_3 -9 0x1000 //RX_TDDRC_ALPHA_UP_4 -27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 -28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 -29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 -32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 -33 0x7000 //RX_TDDRC_LIMITER_THRD -34 0x0800 //RX_TDDRC_LIMITER_GAIN -112 0x0001 //RX_TDDRC_THRD_0 -113 0x0002 //RX_TDDRC_THRD_1 -114 0x1800 //RX_TDDRC_THRD_2 -115 0x1800 //RX_TDDRC_THRD_3 -116 0x3000 //RX_TDDRC_SLANT_0 -117 0x6E00 //RX_TDDRC_SLANT_1 -118 0x1000 //RX_TDDRC_ALPHA_UP_0 -119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 -120 0x0000 //RX_TDDRC_HMNC_FLAG -121 0x199A //RX_TDDRC_HMNC_GAIN -122 0x0001 //RX_TDDRC_SMT_FLAG -123 0x0CCD //RX_TDDRC_SMT_W -124 0x04E6 //RX_TDDRC_DRC_GAIN -38 0x0020 //RX_FDEQ_SUBNUM -39 0x4840 //RX_FDEQ_GAIN_0 -40 0x4040 //RX_FDEQ_GAIN_1 -41 0x4050 //RX_FDEQ_GAIN_2 -42 0x5D6C //RX_FDEQ_GAIN_3 -43 0x7B86 //RX_FDEQ_GAIN_4 -44 0x8186 //RX_FDEQ_GAIN_5 -45 0x8688 //RX_FDEQ_GAIN_6 -46 0x9097 //RX_FDEQ_GAIN_7 -47 0x929F //RX_FDEQ_GAIN_8 -48 0x9CA0 //RX_FDEQ_GAIN_9 -49 0xA391 //RX_FDEQ_GAIN_10 -50 0x8A82 //RX_FDEQ_GAIN_11 -51 0x726E //RX_FDEQ_GAIN_12 -52 0x704E //RX_FDEQ_GAIN_13 -53 0x6565 //RX_FDEQ_GAIN_14 -54 0x698A //RX_FDEQ_GAIN_15 -55 0x4848 //RX_FDEQ_GAIN_16 -56 0x4848 //RX_FDEQ_GAIN_17 -57 0x4848 //RX_FDEQ_GAIN_18 -58 0x4848 //RX_FDEQ_GAIN_19 -59 0x4848 //RX_FDEQ_GAIN_20 -60 0x4848 //RX_FDEQ_GAIN_21 -61 0x4848 //RX_FDEQ_GAIN_22 -62 0x4848 //RX_FDEQ_GAIN_23 -63 0x0202 //RX_FDEQ_BIN_0 -64 0x0202 //RX_FDEQ_BIN_1 -65 0x0302 //RX_FDEQ_BIN_2 -66 0x0304 //RX_FDEQ_BIN_3 -67 0x0405 //RX_FDEQ_BIN_4 -68 0x0506 //RX_FDEQ_BIN_5 -69 0x0708 //RX_FDEQ_BIN_6 -70 0x090A //RX_FDEQ_BIN_7 -71 0x0B0C //RX_FDEQ_BIN_8 -72 0x0D0E //RX_FDEQ_BIN_9 -73 0x1013 //RX_FDEQ_BIN_10 -74 0x1719 //RX_FDEQ_BIN_11 -75 0x1B1E //RX_FDEQ_BIN_12 -76 0x1E1E //RX_FDEQ_BIN_13 -77 0x1E28 //RX_FDEQ_BIN_14 -78 0x282C //RX_FDEQ_BIN_15 -79 0x0000 //RX_FDEQ_BIN_16 -80 0x0000 //RX_FDEQ_BIN_17 -81 0x0000 //RX_FDEQ_BIN_18 -82 0x0000 //RX_FDEQ_BIN_19 -83 0x0000 //RX_FDEQ_BIN_20 -84 0x0000 //RX_FDEQ_BIN_21 -85 0x0000 //RX_FDEQ_BIN_22 -86 0x0000 //RX_FDEQ_BIN_23 -87 0x4000 //RX_FDEQ_RESRV_0 -88 0x0320 //RX_FDEQ_RESRV_1 -89 0x0018 //RX_FDDRC_BAND_MARGIN_0 -90 0x0030 //RX_FDDRC_BAND_MARGIN_1 -91 0x0050 //RX_FDDRC_BAND_MARGIN_2 -92 0x0080 //RX_FDDRC_BAND_MARGIN_3 -93 0x0007 //RX_FDDRC_BLOCK_EXP -94 0x5000 //RX_FDDRC_THRD_2_0 -95 0x5000 //RX_FDDRC_THRD_2_1 -96 0x5000 //RX_FDDRC_THRD_2_2 -97 0x5000 //RX_FDDRC_THRD_2_3 -98 0x6400 //RX_FDDRC_THRD_3_0 -99 0x6400 //RX_FDDRC_THRD_3_1 -100 0x6400 //RX_FDDRC_THRD_3_2 -101 0x6400 //RX_FDDRC_THRD_3_3 -102 0x2000 //RX_FDDRC_SLANT_0_0 -103 0x2000 //RX_FDDRC_SLANT_0_1 -104 0x2000 //RX_FDDRC_SLANT_0_2 -105 0x2000 //RX_FDDRC_SLANT_0_3 -106 0x5333 //RX_FDDRC_SLANT_1_0 -107 0x5333 //RX_FDDRC_SLANT_1_1 -108 0x5333 //RX_FDDRC_SLANT_1_2 -109 0x5333 //RX_FDDRC_SLANT_1_3 -110 0x0000 //RX_FDDRC_RESRV_0 -129 0x0013 //RX_SPK_VOL -130 0x0000 //RX_VOL_RESRV_0 -#VOL 2 -6 0x1000 //RX_TDDRC_ALPHA_UP_1 -7 0x1000 //RX_TDDRC_ALPHA_UP_2 -8 0x1000 //RX_TDDRC_ALPHA_UP_3 -9 0x1000 //RX_TDDRC_ALPHA_UP_4 -27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 -28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 -29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 -32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 -33 0x7000 //RX_TDDRC_LIMITER_THRD -34 0x0800 //RX_TDDRC_LIMITER_GAIN -112 0x0001 //RX_TDDRC_THRD_0 -113 0x0002 //RX_TDDRC_THRD_1 -114 0x1800 //RX_TDDRC_THRD_2 -115 0x1800 //RX_TDDRC_THRD_3 -116 0x3000 //RX_TDDRC_SLANT_0 -117 0x6E00 //RX_TDDRC_SLANT_1 -118 0x1000 //RX_TDDRC_ALPHA_UP_0 -119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 -120 0x0000 //RX_TDDRC_HMNC_FLAG -121 0x199A //RX_TDDRC_HMNC_GAIN -122 0x0001 //RX_TDDRC_SMT_FLAG -123 0x0CCD //RX_TDDRC_SMT_W -124 0x04E6 //RX_TDDRC_DRC_GAIN -38 0x0020 //RX_FDEQ_SUBNUM -39 0x4840 //RX_FDEQ_GAIN_0 -40 0x4040 //RX_FDEQ_GAIN_1 -41 0x4050 //RX_FDEQ_GAIN_2 -42 0x5D6C //RX_FDEQ_GAIN_3 -43 0x7B86 //RX_FDEQ_GAIN_4 -44 0x8186 //RX_FDEQ_GAIN_5 -45 0x8688 //RX_FDEQ_GAIN_6 -46 0x9097 //RX_FDEQ_GAIN_7 -47 0x929F //RX_FDEQ_GAIN_8 -48 0x9CA0 //RX_FDEQ_GAIN_9 -49 0xA391 //RX_FDEQ_GAIN_10 -50 0x8A82 //RX_FDEQ_GAIN_11 -51 0x726E //RX_FDEQ_GAIN_12 -52 0x704E //RX_FDEQ_GAIN_13 -53 0x6565 //RX_FDEQ_GAIN_14 -54 0x698A //RX_FDEQ_GAIN_15 -55 0x4848 //RX_FDEQ_GAIN_16 -56 0x4848 //RX_FDEQ_GAIN_17 -57 0x4848 //RX_FDEQ_GAIN_18 -58 0x4848 //RX_FDEQ_GAIN_19 -59 0x4848 //RX_FDEQ_GAIN_20 -60 0x4848 //RX_FDEQ_GAIN_21 -61 0x4848 //RX_FDEQ_GAIN_22 -62 0x4848 //RX_FDEQ_GAIN_23 -63 0x0202 //RX_FDEQ_BIN_0 -64 0x0202 //RX_FDEQ_BIN_1 -65 0x0302 //RX_FDEQ_BIN_2 -66 0x0304 //RX_FDEQ_BIN_3 -67 0x0405 //RX_FDEQ_BIN_4 -68 0x0506 //RX_FDEQ_BIN_5 -69 0x0708 //RX_FDEQ_BIN_6 -70 0x090A //RX_FDEQ_BIN_7 -71 0x0B0C //RX_FDEQ_BIN_8 -72 0x0D0E //RX_FDEQ_BIN_9 -73 0x1013 //RX_FDEQ_BIN_10 -74 0x1719 //RX_FDEQ_BIN_11 -75 0x1B1E //RX_FDEQ_BIN_12 -76 0x1E1E //RX_FDEQ_BIN_13 -77 0x1E28 //RX_FDEQ_BIN_14 -78 0x282C //RX_FDEQ_BIN_15 -79 0x0000 //RX_FDEQ_BIN_16 -80 0x0000 //RX_FDEQ_BIN_17 -81 0x0000 //RX_FDEQ_BIN_18 -82 0x0000 //RX_FDEQ_BIN_19 -83 0x0000 //RX_FDEQ_BIN_20 -84 0x0000 //RX_FDEQ_BIN_21 -85 0x0000 //RX_FDEQ_BIN_22 -86 0x0000 //RX_FDEQ_BIN_23 -87 0x4000 //RX_FDEQ_RESRV_0 -88 0x0320 //RX_FDEQ_RESRV_1 -89 0x0018 //RX_FDDRC_BAND_MARGIN_0 -90 0x0030 //RX_FDDRC_BAND_MARGIN_1 -91 0x0050 //RX_FDDRC_BAND_MARGIN_2 -92 0x0080 //RX_FDDRC_BAND_MARGIN_3 -93 0x0007 //RX_FDDRC_BLOCK_EXP -94 0x5000 //RX_FDDRC_THRD_2_0 -95 0x5000 //RX_FDDRC_THRD_2_1 -96 0x5000 //RX_FDDRC_THRD_2_2 -97 0x5000 //RX_FDDRC_THRD_2_3 -98 0x6400 //RX_FDDRC_THRD_3_0 -99 0x6400 //RX_FDDRC_THRD_3_1 -100 0x6400 //RX_FDDRC_THRD_3_2 -101 0x6400 //RX_FDDRC_THRD_3_3 -102 0x2000 //RX_FDDRC_SLANT_0_0 -103 0x2000 //RX_FDDRC_SLANT_0_1 -104 0x2000 //RX_FDDRC_SLANT_0_2 -105 0x2000 //RX_FDDRC_SLANT_0_3 -106 0x5333 //RX_FDDRC_SLANT_1_0 -107 0x5333 //RX_FDDRC_SLANT_1_1 -108 0x5333 //RX_FDDRC_SLANT_1_2 -109 0x5333 //RX_FDDRC_SLANT_1_3 -110 0x0000 //RX_FDDRC_RESRV_0 -129 0x001F //RX_SPK_VOL -130 0x0000 //RX_VOL_RESRV_0 -#VOL 3 -6 0x1000 //RX_TDDRC_ALPHA_UP_1 -7 0x1000 //RX_TDDRC_ALPHA_UP_2 -8 0x1000 //RX_TDDRC_ALPHA_UP_3 -9 0x1000 //RX_TDDRC_ALPHA_UP_4 -27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 -28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 -29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 -32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 -33 0x7000 //RX_TDDRC_LIMITER_THRD -34 0x0800 //RX_TDDRC_LIMITER_GAIN -112 0x0001 //RX_TDDRC_THRD_0 -113 0x0002 //RX_TDDRC_THRD_1 -114 0x1800 //RX_TDDRC_THRD_2 -115 0x1800 //RX_TDDRC_THRD_3 -116 0x3000 //RX_TDDRC_SLANT_0 -117 0x6E00 //RX_TDDRC_SLANT_1 -118 0x1000 //RX_TDDRC_ALPHA_UP_0 -119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 -120 0x0000 //RX_TDDRC_HMNC_FLAG -121 0x199A //RX_TDDRC_HMNC_GAIN -122 0x0001 //RX_TDDRC_SMT_FLAG -123 0x0CCD //RX_TDDRC_SMT_W -124 0x04E6 //RX_TDDRC_DRC_GAIN -38 0x0020 //RX_FDEQ_SUBNUM -39 0x4840 //RX_FDEQ_GAIN_0 -40 0x4040 //RX_FDEQ_GAIN_1 -41 0x4050 //RX_FDEQ_GAIN_2 -42 0x5D6C //RX_FDEQ_GAIN_3 -43 0x7B86 //RX_FDEQ_GAIN_4 -44 0x8186 //RX_FDEQ_GAIN_5 -45 0x8688 //RX_FDEQ_GAIN_6 -46 0x9097 //RX_FDEQ_GAIN_7 -47 0x929F //RX_FDEQ_GAIN_8 -48 0x9CA0 //RX_FDEQ_GAIN_9 -49 0xA391 //RX_FDEQ_GAIN_10 -50 0x8A82 //RX_FDEQ_GAIN_11 -51 0x726E //RX_FDEQ_GAIN_12 -52 0x704E //RX_FDEQ_GAIN_13 -53 0x6565 //RX_FDEQ_GAIN_14 -54 0x698A //RX_FDEQ_GAIN_15 -55 0x4848 //RX_FDEQ_GAIN_16 -56 0x4848 //RX_FDEQ_GAIN_17 -57 0x4848 //RX_FDEQ_GAIN_18 -58 0x4848 //RX_FDEQ_GAIN_19 -59 0x4848 //RX_FDEQ_GAIN_20 -60 0x4848 //RX_FDEQ_GAIN_21 -61 0x4848 //RX_FDEQ_GAIN_22 -62 0x4848 //RX_FDEQ_GAIN_23 -63 0x0202 //RX_FDEQ_BIN_0 -64 0x0202 //RX_FDEQ_BIN_1 -65 0x0302 //RX_FDEQ_BIN_2 -66 0x0304 //RX_FDEQ_BIN_3 -67 0x0405 //RX_FDEQ_BIN_4 -68 0x0506 //RX_FDEQ_BIN_5 -69 0x0708 //RX_FDEQ_BIN_6 -70 0x090A //RX_FDEQ_BIN_7 -71 0x0B0C //RX_FDEQ_BIN_8 -72 0x0D0E //RX_FDEQ_BIN_9 -73 0x1013 //RX_FDEQ_BIN_10 -74 0x1719 //RX_FDEQ_BIN_11 -75 0x1B1E //RX_FDEQ_BIN_12 -76 0x1E1E //RX_FDEQ_BIN_13 -77 0x1E28 //RX_FDEQ_BIN_14 -78 0x282C //RX_FDEQ_BIN_15 -79 0x0000 //RX_FDEQ_BIN_16 -80 0x0000 //RX_FDEQ_BIN_17 -81 0x0000 //RX_FDEQ_BIN_18 -82 0x0000 //RX_FDEQ_BIN_19 -83 0x0000 //RX_FDEQ_BIN_20 -84 0x0000 //RX_FDEQ_BIN_21 -85 0x0000 //RX_FDEQ_BIN_22 -86 0x0000 //RX_FDEQ_BIN_23 -87 0x4000 //RX_FDEQ_RESRV_0 -88 0x0320 //RX_FDEQ_RESRV_1 -89 0x0018 //RX_FDDRC_BAND_MARGIN_0 -90 0x0030 //RX_FDDRC_BAND_MARGIN_1 -91 0x0050 //RX_FDDRC_BAND_MARGIN_2 -92 0x0080 //RX_FDDRC_BAND_MARGIN_3 -93 0x0007 //RX_FDDRC_BLOCK_EXP -94 0x5000 //RX_FDDRC_THRD_2_0 -95 0x5000 //RX_FDDRC_THRD_2_1 -96 0x5000 //RX_FDDRC_THRD_2_2 -97 0x5000 //RX_FDDRC_THRD_2_3 -98 0x6400 //RX_FDDRC_THRD_3_0 -99 0x6400 //RX_FDDRC_THRD_3_1 -100 0x6400 //RX_FDDRC_THRD_3_2 -101 0x6400 //RX_FDDRC_THRD_3_3 -102 0x2000 //RX_FDDRC_SLANT_0_0 -103 0x2000 //RX_FDDRC_SLANT_0_1 -104 0x2000 //RX_FDDRC_SLANT_0_2 -105 0x2000 //RX_FDDRC_SLANT_0_3 -106 0x5333 //RX_FDDRC_SLANT_1_0 -107 0x5333 //RX_FDDRC_SLANT_1_1 -108 0x5333 //RX_FDDRC_SLANT_1_2 -109 0x5333 //RX_FDDRC_SLANT_1_3 -110 0x0000 //RX_FDDRC_RESRV_0 -129 0x0032 //RX_SPK_VOL -130 0x0000 //RX_VOL_RESRV_0 -#VOL 4 -6 0x1000 //RX_TDDRC_ALPHA_UP_1 -7 0x1000 //RX_TDDRC_ALPHA_UP_2 -8 0x1000 //RX_TDDRC_ALPHA_UP_3 -9 0x1000 //RX_TDDRC_ALPHA_UP_4 -27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 -28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 -29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 -32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 -33 0x7000 //RX_TDDRC_LIMITER_THRD -34 0x0800 //RX_TDDRC_LIMITER_GAIN -112 0x0001 //RX_TDDRC_THRD_0 -113 0x0002 //RX_TDDRC_THRD_1 -114 0x1800 //RX_TDDRC_THRD_2 -115 0x1800 //RX_TDDRC_THRD_3 -116 0x3000 //RX_TDDRC_SLANT_0 -117 0x6E00 //RX_TDDRC_SLANT_1 -118 0x1000 //RX_TDDRC_ALPHA_UP_0 -119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 -120 0x0000 //RX_TDDRC_HMNC_FLAG -121 0x199A //RX_TDDRC_HMNC_GAIN -122 0x0001 //RX_TDDRC_SMT_FLAG -123 0x0CCD //RX_TDDRC_SMT_W -124 0x04E6 //RX_TDDRC_DRC_GAIN -38 0x0020 //RX_FDEQ_SUBNUM -39 0x4840 //RX_FDEQ_GAIN_0 -40 0x4040 //RX_FDEQ_GAIN_1 -41 0x4050 //RX_FDEQ_GAIN_2 -42 0x5D6C //RX_FDEQ_GAIN_3 -43 0x7B86 //RX_FDEQ_GAIN_4 -44 0x8186 //RX_FDEQ_GAIN_5 -45 0x8688 //RX_FDEQ_GAIN_6 -46 0x9097 //RX_FDEQ_GAIN_7 -47 0x929F //RX_FDEQ_GAIN_8 -48 0x9CA0 //RX_FDEQ_GAIN_9 -49 0xA391 //RX_FDEQ_GAIN_10 -50 0x8A82 //RX_FDEQ_GAIN_11 -51 0x726E //RX_FDEQ_GAIN_12 -52 0x704E //RX_FDEQ_GAIN_13 -53 0x6565 //RX_FDEQ_GAIN_14 -54 0x698A //RX_FDEQ_GAIN_15 -55 0x4848 //RX_FDEQ_GAIN_16 -56 0x4848 //RX_FDEQ_GAIN_17 -57 0x4848 //RX_FDEQ_GAIN_18 -58 0x4848 //RX_FDEQ_GAIN_19 -59 0x4848 //RX_FDEQ_GAIN_20 -60 0x4848 //RX_FDEQ_GAIN_21 -61 0x4848 //RX_FDEQ_GAIN_22 -62 0x4848 //RX_FDEQ_GAIN_23 -63 0x0202 //RX_FDEQ_BIN_0 -64 0x0202 //RX_FDEQ_BIN_1 -65 0x0302 //RX_FDEQ_BIN_2 -66 0x0304 //RX_FDEQ_BIN_3 -67 0x0405 //RX_FDEQ_BIN_4 -68 0x0506 //RX_FDEQ_BIN_5 -69 0x0708 //RX_FDEQ_BIN_6 -70 0x090A //RX_FDEQ_BIN_7 -71 0x0B0C //RX_FDEQ_BIN_8 -72 0x0D0E //RX_FDEQ_BIN_9 -73 0x1013 //RX_FDEQ_BIN_10 -74 0x1719 //RX_FDEQ_BIN_11 -75 0x1B1E //RX_FDEQ_BIN_12 -76 0x1E1E //RX_FDEQ_BIN_13 -77 0x1E28 //RX_FDEQ_BIN_14 -78 0x282C //RX_FDEQ_BIN_15 -79 0x0000 //RX_FDEQ_BIN_16 -80 0x0000 //RX_FDEQ_BIN_17 -81 0x0000 //RX_FDEQ_BIN_18 -82 0x0000 //RX_FDEQ_BIN_19 -83 0x0000 //RX_FDEQ_BIN_20 -84 0x0000 //RX_FDEQ_BIN_21 -85 0x0000 //RX_FDEQ_BIN_22 -86 0x0000 //RX_FDEQ_BIN_23 -87 0x4000 //RX_FDEQ_RESRV_0 -88 0x0320 //RX_FDEQ_RESRV_1 -89 0x0018 //RX_FDDRC_BAND_MARGIN_0 -90 0x0030 //RX_FDDRC_BAND_MARGIN_1 -91 0x0050 //RX_FDDRC_BAND_MARGIN_2 -92 0x0080 //RX_FDDRC_BAND_MARGIN_3 -93 0x0007 //RX_FDDRC_BLOCK_EXP -94 0x5000 //RX_FDDRC_THRD_2_0 -95 0x5000 //RX_FDDRC_THRD_2_1 -96 0x5000 //RX_FDDRC_THRD_2_2 -97 0x5000 //RX_FDDRC_THRD_2_3 -98 0x6400 //RX_FDDRC_THRD_3_0 -99 0x6400 //RX_FDDRC_THRD_3_1 -100 0x6400 //RX_FDDRC_THRD_3_2 -101 0x6400 //RX_FDDRC_THRD_3_3 -102 0x2000 //RX_FDDRC_SLANT_0_0 -103 0x2000 //RX_FDDRC_SLANT_0_1 -104 0x2000 //RX_FDDRC_SLANT_0_2 -105 0x2000 //RX_FDDRC_SLANT_0_3 -106 0x5333 //RX_FDDRC_SLANT_1_0 -107 0x5333 //RX_FDDRC_SLANT_1_1 -108 0x5333 //RX_FDDRC_SLANT_1_2 -109 0x5333 //RX_FDDRC_SLANT_1_3 -110 0x0000 //RX_FDDRC_RESRV_0 -129 0x0052 //RX_SPK_VOL -130 0x0000 //RX_VOL_RESRV_0 -#VOL 5 -6 0x1000 //RX_TDDRC_ALPHA_UP_1 -7 0x1000 //RX_TDDRC_ALPHA_UP_2 -8 0x1000 //RX_TDDRC_ALPHA_UP_3 -9 0x1000 //RX_TDDRC_ALPHA_UP_4 -27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 -28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 -29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 -32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 -33 0x7000 //RX_TDDRC_LIMITER_THRD -34 0x0800 //RX_TDDRC_LIMITER_GAIN -112 0x0001 //RX_TDDRC_THRD_0 -113 0x0002 //RX_TDDRC_THRD_1 -114 0x1800 //RX_TDDRC_THRD_2 -115 0x1800 //RX_TDDRC_THRD_3 -116 0x3000 //RX_TDDRC_SLANT_0 -117 0x6E00 //RX_TDDRC_SLANT_1 -118 0x1000 //RX_TDDRC_ALPHA_UP_0 -119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 -120 0x0000 //RX_TDDRC_HMNC_FLAG -121 0x199A //RX_TDDRC_HMNC_GAIN -122 0x0001 //RX_TDDRC_SMT_FLAG -123 0x0CCD //RX_TDDRC_SMT_W -124 0x04E6 //RX_TDDRC_DRC_GAIN -38 0x0020 //RX_FDEQ_SUBNUM -39 0x4840 //RX_FDEQ_GAIN_0 -40 0x4040 //RX_FDEQ_GAIN_1 -41 0x4050 //RX_FDEQ_GAIN_2 -42 0x5D6C //RX_FDEQ_GAIN_3 -43 0x7B86 //RX_FDEQ_GAIN_4 -44 0x8186 //RX_FDEQ_GAIN_5 -45 0x8688 //RX_FDEQ_GAIN_6 -46 0x9097 //RX_FDEQ_GAIN_7 -47 0x929F //RX_FDEQ_GAIN_8 -48 0x9CA0 //RX_FDEQ_GAIN_9 -49 0xA391 //RX_FDEQ_GAIN_10 -50 0x8A82 //RX_FDEQ_GAIN_11 -51 0x726E //RX_FDEQ_GAIN_12 -52 0x704E //RX_FDEQ_GAIN_13 -53 0x6565 //RX_FDEQ_GAIN_14 -54 0x698A //RX_FDEQ_GAIN_15 -55 0x4848 //RX_FDEQ_GAIN_16 -56 0x4848 //RX_FDEQ_GAIN_17 -57 0x4848 //RX_FDEQ_GAIN_18 -58 0x4848 //RX_FDEQ_GAIN_19 -59 0x4848 //RX_FDEQ_GAIN_20 -60 0x4848 //RX_FDEQ_GAIN_21 -61 0x4848 //RX_FDEQ_GAIN_22 -62 0x4848 //RX_FDEQ_GAIN_23 -63 0x0202 //RX_FDEQ_BIN_0 -64 0x0202 //RX_FDEQ_BIN_1 -65 0x0302 //RX_FDEQ_BIN_2 -66 0x0304 //RX_FDEQ_BIN_3 -67 0x0405 //RX_FDEQ_BIN_4 -68 0x0506 //RX_FDEQ_BIN_5 -69 0x0708 //RX_FDEQ_BIN_6 -70 0x090A //RX_FDEQ_BIN_7 -71 0x0B0C //RX_FDEQ_BIN_8 -72 0x0D0E //RX_FDEQ_BIN_9 -73 0x1013 //RX_FDEQ_BIN_10 -74 0x1719 //RX_FDEQ_BIN_11 -75 0x1B1E //RX_FDEQ_BIN_12 -76 0x1E1E //RX_FDEQ_BIN_13 -77 0x1E28 //RX_FDEQ_BIN_14 -78 0x282C //RX_FDEQ_BIN_15 -79 0x0000 //RX_FDEQ_BIN_16 -80 0x0000 //RX_FDEQ_BIN_17 -81 0x0000 //RX_FDEQ_BIN_18 -82 0x0000 //RX_FDEQ_BIN_19 -83 0x0000 //RX_FDEQ_BIN_20 -84 0x0000 //RX_FDEQ_BIN_21 -85 0x0000 //RX_FDEQ_BIN_22 -86 0x0000 //RX_FDEQ_BIN_23 -87 0x4000 //RX_FDEQ_RESRV_0 -88 0x0320 //RX_FDEQ_RESRV_1 -89 0x0018 //RX_FDDRC_BAND_MARGIN_0 -90 0x0030 //RX_FDDRC_BAND_MARGIN_1 -91 0x0050 //RX_FDDRC_BAND_MARGIN_2 -92 0x0080 //RX_FDDRC_BAND_MARGIN_3 -93 0x0007 //RX_FDDRC_BLOCK_EXP -94 0x5000 //RX_FDDRC_THRD_2_0 -95 0x5000 //RX_FDDRC_THRD_2_1 -96 0x5000 //RX_FDDRC_THRD_2_2 -97 0x5000 //RX_FDDRC_THRD_2_3 -98 0x6400 //RX_FDDRC_THRD_3_0 -99 0x6400 //RX_FDDRC_THRD_3_1 -100 0x6400 //RX_FDDRC_THRD_3_2 -101 0x6400 //RX_FDDRC_THRD_3_3 -102 0x2000 //RX_FDDRC_SLANT_0_0 -103 0x2000 //RX_FDDRC_SLANT_0_1 -104 0x2000 //RX_FDDRC_SLANT_0_2 -105 0x2000 //RX_FDDRC_SLANT_0_3 -106 0x5333 //RX_FDDRC_SLANT_1_0 -107 0x5333 //RX_FDDRC_SLANT_1_1 -108 0x5333 //RX_FDDRC_SLANT_1_2 -109 0x5333 //RX_FDDRC_SLANT_1_3 -110 0x0000 //RX_FDDRC_RESRV_0 -129 0x0087 //RX_SPK_VOL -130 0x0000 //RX_VOL_RESRV_0 -#VOL 6 -6 0x1000 //RX_TDDRC_ALPHA_UP_1 -7 0x1000 //RX_TDDRC_ALPHA_UP_2 -8 0x1000 //RX_TDDRC_ALPHA_UP_3 -9 0x1000 //RX_TDDRC_ALPHA_UP_4 -27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 -28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 -29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 -32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 -33 0x7000 //RX_TDDRC_LIMITER_THRD -34 0x0800 //RX_TDDRC_LIMITER_GAIN -112 0x0001 //RX_TDDRC_THRD_0 -113 0x0002 //RX_TDDRC_THRD_1 -114 0x1800 //RX_TDDRC_THRD_2 -115 0x1800 //RX_TDDRC_THRD_3 -116 0x3000 //RX_TDDRC_SLANT_0 -117 0x6E00 //RX_TDDRC_SLANT_1 -118 0x1000 //RX_TDDRC_ALPHA_UP_0 -119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 -120 0x0000 //RX_TDDRC_HMNC_FLAG -121 0x199A //RX_TDDRC_HMNC_GAIN -122 0x0001 //RX_TDDRC_SMT_FLAG -123 0x0CCD //RX_TDDRC_SMT_W -124 0x04E6 //RX_TDDRC_DRC_GAIN -38 0x0020 //RX_FDEQ_SUBNUM -39 0x4840 //RX_FDEQ_GAIN_0 -40 0x4040 //RX_FDEQ_GAIN_1 -41 0x4050 //RX_FDEQ_GAIN_2 -42 0x5D6C //RX_FDEQ_GAIN_3 -43 0x7B86 //RX_FDEQ_GAIN_4 -44 0x8186 //RX_FDEQ_GAIN_5 -45 0x8688 //RX_FDEQ_GAIN_6 -46 0x9097 //RX_FDEQ_GAIN_7 -47 0x929F //RX_FDEQ_GAIN_8 -48 0x9CA0 //RX_FDEQ_GAIN_9 -49 0xA391 //RX_FDEQ_GAIN_10 -50 0x8A82 //RX_FDEQ_GAIN_11 -51 0x726E //RX_FDEQ_GAIN_12 -52 0x704E //RX_FDEQ_GAIN_13 -53 0x6565 //RX_FDEQ_GAIN_14 -54 0x698A //RX_FDEQ_GAIN_15 -55 0x4848 //RX_FDEQ_GAIN_16 -56 0x4848 //RX_FDEQ_GAIN_17 -57 0x4848 //RX_FDEQ_GAIN_18 -58 0x4848 //RX_FDEQ_GAIN_19 -59 0x4848 //RX_FDEQ_GAIN_20 -60 0x4848 //RX_FDEQ_GAIN_21 -61 0x4848 //RX_FDEQ_GAIN_22 -62 0x4848 //RX_FDEQ_GAIN_23 -63 0x0202 //RX_FDEQ_BIN_0 -64 0x0202 //RX_FDEQ_BIN_1 -65 0x0302 //RX_FDEQ_BIN_2 -66 0x0304 //RX_FDEQ_BIN_3 -67 0x0405 //RX_FDEQ_BIN_4 -68 0x0506 //RX_FDEQ_BIN_5 -69 0x0708 //RX_FDEQ_BIN_6 -70 0x090A //RX_FDEQ_BIN_7 -71 0x0B0C //RX_FDEQ_BIN_8 -72 0x0D0E //RX_FDEQ_BIN_9 -73 0x1013 //RX_FDEQ_BIN_10 -74 0x1719 //RX_FDEQ_BIN_11 -75 0x1B1E //RX_FDEQ_BIN_12 -76 0x1E1E //RX_FDEQ_BIN_13 -77 0x1E28 //RX_FDEQ_BIN_14 -78 0x282C //RX_FDEQ_BIN_15 -79 0x0000 //RX_FDEQ_BIN_16 -80 0x0000 //RX_FDEQ_BIN_17 -81 0x0000 //RX_FDEQ_BIN_18 -82 0x0000 //RX_FDEQ_BIN_19 -83 0x0000 //RX_FDEQ_BIN_20 -84 0x0000 //RX_FDEQ_BIN_21 -85 0x0000 //RX_FDEQ_BIN_22 -86 0x0000 //RX_FDEQ_BIN_23 -87 0x4000 //RX_FDEQ_RESRV_0 -88 0x0320 //RX_FDEQ_RESRV_1 -89 0x0018 //RX_FDDRC_BAND_MARGIN_0 -90 0x0030 //RX_FDDRC_BAND_MARGIN_1 -91 0x0050 //RX_FDDRC_BAND_MARGIN_2 -92 0x0080 //RX_FDDRC_BAND_MARGIN_3 -93 0x0007 //RX_FDDRC_BLOCK_EXP -94 0x5000 //RX_FDDRC_THRD_2_0 -95 0x5000 //RX_FDDRC_THRD_2_1 -96 0x5000 //RX_FDDRC_THRD_2_2 -97 0x5000 //RX_FDDRC_THRD_2_3 -98 0x6400 //RX_FDDRC_THRD_3_0 -99 0x6400 //RX_FDDRC_THRD_3_1 -100 0x6400 //RX_FDDRC_THRD_3_2 -101 0x6400 //RX_FDDRC_THRD_3_3 -102 0x2000 //RX_FDDRC_SLANT_0_0 -103 0x2000 //RX_FDDRC_SLANT_0_1 -104 0x2000 //RX_FDDRC_SLANT_0_2 -105 0x2000 //RX_FDDRC_SLANT_0_3 -106 0x5333 //RX_FDDRC_SLANT_1_0 -107 0x5333 //RX_FDDRC_SLANT_1_1 -108 0x5333 //RX_FDDRC_SLANT_1_2 -109 0x5333 //RX_FDDRC_SLANT_1_3 -110 0x0000 //RX_FDDRC_RESRV_0 -129 0x0100 //RX_SPK_VOL -130 0x0000 //RX_VOL_RESRV_0 - -#CASE_NAME HANDSET-HANDSET-VOICE_GENERIC-FB -#PARAM_TYPE TX+RX -#TOTAL_CUSTOM_STEP 7 -#TX -0 0x0000 //TX_OPERATION_MODE_0 -1 0x0000 //TX_OPERATION_MODE_1 -2 0x0026 //TX_PATCH_REG -3 0x6B7E //TX_SENDFUNC_MODE_0 -4 0x0001 //TX_SENDFUNC_MODE_1 -5 0x0002 //TX_NUM_MIC -6 0x0004 //TX_SAMPLINGFREQ_SIG -7 0x0004 //TX_SAMPLINGFREQ_PROC -8 0x000A //TX_FRAME_SZ_SIG -9 0x000A //TX_FRAME_SZ -10 0x0000 //TX_DELAY_OPT -11 0x0028 //TX_MAX_TAIL_LENGTH -12 0x0001 //TX_NUM_LOUTCHN -13 0x0001 //TX_MAXNUM_AECREF -14 0x0000 //TX_DBG_FUNC_REG -15 0x0000 //TX_DBG_FUNC_REG1 -16 0x0000 //TX_SYS_RESRV_0 -17 0x0000 //TX_SYS_RESRV_1 -18 0x0000 //TX_SYS_RESRV_2 -19 0x0000 //TX_SYS_RESRV_3 -20 0x0000 //TX_DIST2REF0 -21 0x009D //TX_DIST2REF1 -22 0x0000 //TX_DIST2REF_02 -23 0x0000 //TX_DIST2REF_03 -24 0x0000 //TX_DIST2REF_04 -25 0x0000 //TX_DIST2REF_05 -26 0x0000 //TX_MMIC -27 0x1000 //TX_PGA_0 -28 0x1000 //TX_PGA_1 -29 0x1000 //TX_PGA_2 -30 0x0000 //TX_PGA_3 -31 0x0000 //TX_PGA_4 -32 0x0000 //TX_PGA_5 -33 0x0000 //TX_MIC_PAIRS -34 0x0000 //TX_MIC_PAIRS_HS -35 0x0002 //TX_MICS_FOR_BF -36 0x0000 //TX_MIC_PAIRS_FORL1 -37 0x0002 //TX_MICS_OF_PAIR0 -38 0x0002 //TX_MICS_OF_PAIR1 -39 0x0002 //TX_MICS_OF_PAIR2 -40 0x0002 //TX_MICS_OF_PAIR3 -41 0x0000 //TX_MIC_DATA_SRC0 -42 0x0002 //TX_MIC_DATA_SRC1 -43 0x0001 //TX_MIC_DATA_SRC2 -44 0x0000 //TX_MIC_DATA_SRC3 -45 0x0000 //TX_MIC_PAIR_CH_04 -46 0x0000 //TX_MIC_PAIR_CH_05 -47 0x0000 //TX_MIC_PAIR_CH_10 -48 0x0000 //TX_MIC_PAIR_CH_11 -49 0x0000 //TX_MIC_PAIR_CH_12 -50 0x0000 //TX_MIC_PAIR_CH_13 -51 0x0000 //TX_MIC_PAIR_CH_14 -52 0x05DC //TX_HD_BIN_MASK -53 0x0010 //TX_HD_SUBAND_MASK -54 0x19A1 //TX_HD_FRAME_AVG_MASK -55 0x0320 //TX_HD_MIN_FRQ -56 0x1000 //TX_HD_ALPHA_PSD -57 0x1100 //TX_T_PHPR1 -58 0x0000 //TX_T_PHPR2 -59 0x0000 //TX_T_PTPR -60 0x0000 //TX_T_PNPR -61 0x0000 //TX_T_PAPR1 -62 0xEE6C //TX_T_PSDVAT -63 0x0800 //TX_CNT -64 0x4000 //TX_ANTI_HOWL_GAIN -65 0x0001 //TX_MICFORBFMARK_0 -66 0x0001 //TX_MICFORBFMARK_1 -67 0x0001 //TX_MICFORBFMARK_2 -68 0x0001 //TX_MICFORBFMARK_3 -69 0x0001 //TX_MICFORBFMARK_4 -70 0x0001 //TX_MICFORBFMARK_5 -71 0x0000 //TX_DIST2REF_10 -72 0x3A66 //TX_DIST2REF_11 -73 0x0000 //TX_DIST2REF2 -74 0x0000 //TX_DIST2REF_13 -75 0x0000 //TX_DIST2REF_14 -76 0x0000 //TX_DIST2REF_15 -77 0x0000 //TX_DIST2REF_20 -78 0x0000 //TX_DIST2REF_21 -79 0x0000 //TX_DIST2REF_22 -80 0x0000 //TX_DIST2REF_23 -81 0x0000 //TX_DIST2REF_24 -82 0x0000 //TX_DIST2REF_25 -83 0x0000 //TX_DIST2REF_30 -84 0x0000 //TX_DIST2REF_31 -85 0x0000 //TX_DIST2REF_32 -86 0x0000 //TX_DIST2REF_33 -87 0x0000 //TX_DIST2REF_34 -88 0x0000 //TX_DIST2REF_35 -89 0x0000 //TX_MIC_LOC_00 -90 0x0000 //TX_MIC_LOC_01 -91 0x0000 //TX_MIC_LOC_02 -92 0x0000 //TX_MIC_LOC_03 -93 0x0000 //TX_MIC_LOC_04 -94 0x0000 //TX_MIC_LOC_05 -95 0x0000 //TX_MIC_LOC_10 -96 0x0000 //TX_MIC_LOC_11 -97 0x0000 //TX_MIC_LOC_12 -98 0x0000 //TX_MIC_LOC_13 -99 0x0000 //TX_MIC_LOC_14 -100 0x0000 //TX_MIC_LOC_15 -101 0x0000 //TX_MIC_LOC_20 -102 0x0000 //TX_MIC_LOC_21 -103 0x0000 //TX_MIC_LOC_22 -104 0x0000 //TX_MIC_LOC_23 -105 0x0000 //TX_MIC_LOC_24 -106 0x0000 //TX_MIC_LOC_25 -107 0x0200 //TX_MIC_REFBLK_VOLUME -108 0x0AAC //TX_MIC_BLOCK_VOLUME -109 0x0000 //TX_INVERSE_MASK -110 0x0000 //TX_ADCS_MASK -111 0x04D0 //TX_ADCS_GAIN -112 0x4000 //TX_NFC_GAINFAC -113 0x0000 //TX_MAINMIC_BLKFACTOR -114 0x0000 //TX_REFMIC_BLKFACTOR -115 0x0000 //TX_BLMIC_BLKFACTOR -116 0x0000 //TX_BRMIC_BLKFACTOR -117 0x0031 //TX_MICBLK_START_BIN -118 0x0060 //TX_MICBLK_END_BIN -119 0x0015 //TX_MICBLK_FE_HOLD -120 0xFFF2 //TX_MICBLK_MR_EXP_TH -121 0xFFF2 //TX_MICBLK_LR_EXP_TH -122 0x0000 //TX_FENE_HOLD -123 0x4000 //TX_FE_ENER_TH_MTS -124 0x0004 //TX_FE_ENER_TH_EXP -125 0x6000 //TX_C_POST_FLT_MIC_MAINBLK -126 0x6000 //TX_C_POST_FLT_MIC_REFBLK -127 0x0010 //TX_MIC_BLOCK_N -128 0x7E56 //TX_A_HP -129 0x4000 //TX_B_PE -130 0x1800 //TX_THR_PITCH_DET_0 -131 0x1000 //TX_THR_PITCH_DET_1 -132 0x0800 //TX_THR_PITCH_DET_2 -133 0x0008 //TX_PITCH_BFR_LEN -134 0x0003 //TX_SBD_PITCH_DET -135 0x0050 //TX_TD_AEC_L -136 0x4000 //TX_MU0_UNP_TD_AEC -137 0x1000 //TX_MU0_PTD_TD_AEC -138 0x0000 //TX_PP_RESRV_0 -139 0x2A94 //TX_PP_RESRV_1 -140 0x55F0 //TX_PP_RESRV_2 -141 0x0000 //TX_PP_RESRV_3 -142 0x0000 //TX_PP_RESRV_4 -143 0x0000 //TX_PP_RESRV_5 -144 0x0000 //TX_PP_RESRV_6 -145 0x0000 //TX_PP_RESRV_7 -146 0x0028 //TX_TAIL_LENGTH -147 0x0080 //TX_AEC_REF_GAIN_0 -148 0x0800 //TX_AEC_REF_GAIN_1 -149 0x0800 //TX_AEC_REF_GAIN_2 -150 0x7900 //TX_EAD_THR -151 0x2000 //TX_THR_RE_EST -152 0x0400 //TX_MIN_EQ_RE_EST_0 -153 0x0400 //TX_MIN_EQ_RE_EST_1 -154 0x0800 //TX_MIN_EQ_RE_EST_2 -155 0x0800 //TX_MIN_EQ_RE_EST_3 -156 0x1000 //TX_MIN_EQ_RE_EST_4 -157 0x1000 //TX_MIN_EQ_RE_EST_5 -158 0x1000 //TX_MIN_EQ_RE_EST_6 -159 0x1000 //TX_MIN_EQ_RE_EST_7 -160 0x1000 //TX_MIN_EQ_RE_EST_8 -161 0x1000 //TX_MIN_EQ_RE_EST_9 -162 0x1000 //TX_MIN_EQ_RE_EST_10 -163 0x1000 //TX_MIN_EQ_RE_EST_11 -164 0x1000 //TX_MIN_EQ_RE_EST_12 -165 0x3000 //TX_LAMBDA_RE_EST -166 0x1000 //TX_LAMBDA_CB_NLE -167 0x1800 //TX_C_POST_FLT -168 0x4000 //TX_GAIN_NP -169 0x003C //TX_SE_HOLD_N -170 0x0046 //TX_DT_HOLD_N -171 0x03E8 //TX_DT2_HOLD_N -172 0x6666 //TX_AEC_RESRV_0 -173 0x0000 //TX_AEC_RESRV_1 -174 0x0014 //TX_AEC_RESRV_2 -175 0x0000 //TX_MIC_DELAY_LENGTH -176 0x0000 //TX_REF_DELAY_LENGTH -177 0x0000 //TX_ADD_LINEIN_GAINL -178 0x0000 //TX_ADD_LINEIN_GAINH -179 0x0000 //TX_MIN_EQ_RE_EST_14 -180 0x0000 //TX_DTD_THR1_8 -181 0x7FFF //TX_DTD_THR2_8 -182 0x0000 //TX_DTD_MIC_BLK2 -183 0x0008 //TX_FRQ_LIN_LEN -184 0x7FFF //TX_FRQ_AEC_LEN_RHO -185 0x6000 //TX_MU0_UNP_FRQ_AEC -186 0x4000 //TX_MU0_PTD_FRQ_AEC -187 0x000A //TX_MINENOISETH -188 0x0800 //TX_MU0_RE_EST -189 0x0001 //TX_AEC_NUM_CH -190 0x0000 //TX_BIGECHOATTENUATION_MAX -191 0x2000 //TX_A_POST_FLT_MICBLK -192 0x0000 //TX_BLKENERTH -193 0x0000 //TX_BLKENERHIGHTH -194 0x0000 //TX_NORMENERTH -195 0x0000 //TX_NORMENERHIGHTH -196 0x0000 //TX_NORMENERHIGHTHL -197 0x7000 //TX_DTD_THR1_0 -198 0x7000 //TX_DTD_THR1_1 -199 0x7000 //TX_DTD_THR1_2 -200 0x7F00 //TX_DTD_THR1_3 -201 0x7F00 //TX_DTD_THR1_4 -202 0x7F00 //TX_DTD_THR1_5 -203 0x7F00 //TX_DTD_THR1_6 -204 0x2000 //TX_DTD_THR2_0 -205 0x2000 //TX_DTD_THR2_1 -206 0x2000 //TX_DTD_THR2_2 -207 0x1000 //TX_DTD_THR2_3 -208 0x1000 //TX_DTD_THR2_4 -209 0x1000 //TX_DTD_THR2_5 -210 0x1000 //TX_DTD_THR2_6 -211 0x6000 //TX_DTD_THR3 -212 0x0177 //TX_SPK_CUT_K -213 0x1B58 //TX_DT_CUT_K -214 0x0100 //TX_DT_CUT_THR -215 0x04EB //TX_COMFORT_G -216 0x01F4 //TX_POWER_YOUT_TH -217 0x4000 //TX_FDPFGAINECHO -218 0x0000 //TX_DTD_HD_THR -219 0x0000 //TX_SPK_CUT_K_S -220 0x0000 //TX_DTD_MIC_BLK -221 0x0400 //TX_ADPT_STRICT_L -222 0x0200 //TX_ADPT_STRICT_H -223 0x0C00 //TX_RATIO_DT_L_TH_LOW -224 0x2000 //TX_RATIO_DT_H_TH_LOW -225 0x1800 //TX_RATIO_DT_L_TH_HIGH -226 0x3000 //TX_RATIO_DT_H_TH_HIGH -227 0x0A00 //TX_RATIO_DT_L0_TH -228 0x7000 //TX_B_POST_FILT_ECHO_L -229 0x7FFF //TX_B_POST_FILT_ECHO_H -230 0x0200 //TX_MIN_G_CTRL_ECHO -231 0x7FFF //TX_B_LESSCUT_RTO_ECHO -232 0x0000 //TX_EPD_OFFSET_00 -233 0x0000 //TX_EPD_OFFST_01 -234 0x1388 //TX_RATIO_DT_L0_TH_HIGH -235 0x3A98 //TX_RATIO_DT_H_TH_CUT -236 0x7FFF //TX_MIN_EQ_RE_EST_13 -237 0x0000 //TX_DTD_THR1_7 -238 0x0000 //TX_DTD_THR2_7 -239 0x0800 //TX_DT_RESRV_7 -240 0x0800 //TX_DT_RESRV_8 -241 0x0000 //TX_DT_RESRV_9 -242 0xF600 //TX_THR_SN_EST_0 -243 0xFA00 //TX_THR_SN_EST_1 -244 0xFA00 //TX_THR_SN_EST_2 -245 0xF800 //TX_THR_SN_EST_3 -246 0xF800 //TX_THR_SN_EST_4 -247 0xF800 //TX_THR_SN_EST_5 -248 0xF800 //TX_THR_SN_EST_6 -249 0xF700 //TX_THR_SN_EST_7 -250 0x0000 //TX_DELTA_THR_SN_EST_0 -251 0x0100 //TX_DELTA_THR_SN_EST_1 -252 0x0200 //TX_DELTA_THR_SN_EST_2 -253 0x0200 //TX_DELTA_THR_SN_EST_3 -254 0x0200 //TX_DELTA_THR_SN_EST_4 -255 0x0100 //TX_DELTA_THR_SN_EST_5 -256 0x0200 //TX_DELTA_THR_SN_EST_6 -257 0x0200 //TX_DELTA_THR_SN_EST_7 -258 0x4000 //TX_LAMBDA_NN_EST_0 -259 0x4000 //TX_LAMBDA_NN_EST_1 -260 0x4000 //TX_LAMBDA_NN_EST_2 -261 0x4000 //TX_LAMBDA_NN_EST_3 -262 0x4000 //TX_LAMBDA_NN_EST_4 -263 0x4000 //TX_LAMBDA_NN_EST_5 -264 0x4000 //TX_LAMBDA_NN_EST_6 -265 0x4000 //TX_LAMBDA_NN_EST_7 -266 0x0400 //TX_N_SN_EST -267 0x001E //TX_INBEAM_T -268 0x0041 //TX_INBEAMHOLDT -269 0x2000 //TX_G_STRICT -270 0x2000 //TX_EQ_THR_BF -271 0x799A //TX_LAMBDA_EQ_BF -272 0x1000 //TX_NE_RTO_TH -273 0x1000 //TX_NE_RTO_TH_L -274 0x1000 //TX_MAINREFRTOH_TH_H -275 0x0600 //TX_MAINREFRTOH_TH_L -276 0x2000 //TX_MAINREFRTO_TH_H -277 0x1400 //TX_MAINREFRTO_TH_L -278 0x0000 //TX_MAINREFRTO_TH_EQ -279 0x1000 //TX_B_POST_FLT_0 -280 0x2000 //TX_B_POST_FLT_1 -281 0x0014 //TX_NS_LVL_CTRL_0 -282 0x0016 //TX_NS_LVL_CTRL_1 -283 0x0016 //TX_NS_LVL_CTRL_2 -284 0x0016 //TX_NS_LVL_CTRL_3 -285 0x0018 //TX_NS_LVL_CTRL_4 -286 0x0016 //TX_NS_LVL_CTRL_5 -287 0x0012 //TX_NS_LVL_CTRL_6 -288 0x0017 //TX_NS_LVL_CTRL_7 -289 0x000E //TX_MIN_GAIN_S_0 -290 0x0012 //TX_MIN_GAIN_S_1 -291 0x0007 //TX_MIN_GAIN_S_2 -292 0x0012 //TX_MIN_GAIN_S_3 -293 0x0010 //TX_MIN_GAIN_S_4 -294 0x0012 //TX_MIN_GAIN_S_5 -295 0x0012 //TX_MIN_GAIN_S_6 -296 0x0012 //TX_MIN_GAIN_S_7 -297 0x6000 //TX_NMOS_SUP -298 0x0000 //TX_NS_MAX_PRI_SNR_TH -299 0x0000 //TX_NMOS_SUP_MENSA -300 0x7FFF //TX_SNRI_SUP_0 -301 0x6000 //TX_SNRI_SUP_1 -302 0x6000 //TX_SNRI_SUP_2 -303 0x6000 //TX_SNRI_SUP_3 -304 0x6000 //TX_SNRI_SUP_4 -305 0x6000 //TX_SNRI_SUP_5 -306 0x6000 //TX_SNRI_SUP_6 -307 0x6000 //TX_SNRI_SUP_7 -308 0x6000 //TX_THR_LFNS -309 0x0017 //TX_G_LFNS -310 0x09C4 //TX_GAIN0_NTH -311 0x000A //TX_MUSIC_MORENS -312 0x7FFF //TX_A_POST_FILT_0 -313 0x2000 //TX_A_POST_FILT_1 -314 0x4000 //TX_A_POST_FILT_S_0 -315 0x5000 //TX_A_POST_FILT_S_1 -316 0x4000 //TX_A_POST_FILT_S_2 -317 0x4000 //TX_A_POST_FILT_S_3 -318 0x4000 //TX_A_POST_FILT_S_4 -319 0x4000 //TX_A_POST_FILT_S_5 -320 0x4000 //TX_A_POST_FILT_S_6 -321 0x7000 //TX_A_POST_FILT_S_7 -322 0x1000 //TX_B_POST_FILT_0 -323 0x2000 //TX_B_POST_FILT_1 -324 0x3000 //TX_B_POST_FILT_2 -325 0x2000 //TX_B_POST_FILT_3 -326 0x5000 //TX_B_POST_FILT_4 -327 0x2000 //TX_B_POST_FILT_5 -328 0x6000 //TX_B_POST_FILT_6 -329 0x3000 //TX_B_POST_FILT_7 -330 0x1000 //TX_B_LESSCUT_RTO_S_0 -331 0x6000 //TX_B_LESSCUT_RTO_S_1 -332 0x6000 //TX_B_LESSCUT_RTO_S_2 -333 0x6000 //TX_B_LESSCUT_RTO_S_3 -334 0x6000 //TX_B_LESSCUT_RTO_S_4 -335 0x6000 //TX_B_LESSCUT_RTO_S_5 -336 0x7FFF //TX_B_LESSCUT_RTO_S_6 -337 0x7FFF //TX_B_LESSCUT_RTO_S_7 -338 0x7E14 //TX_LAMBDA_PFILT -339 0x7C29 //TX_LAMBDA_PFILT_S_0 -340 0x7C29 //TX_LAMBDA_PFILT_S_1 -341 0x7C29 //TX_LAMBDA_PFILT_S_2 -342 0x7C29 //TX_LAMBDA_PFILT_S_3 -343 0x7C29 //TX_LAMBDA_PFILT_S_4 -344 0x7C29 //TX_LAMBDA_PFILT_S_5 -345 0x7C29 //TX_LAMBDA_PFILT_S_6 -346 0x7C29 //TX_LAMBDA_PFILT_S_7 -347 0x07D0 //TX_K_PEPPER -348 0x0800 //TX_A_PEPPER -349 0x1D4C //TX_K_PEPPER_HF -350 0x0400 //TX_A_PEPPER_HF -351 0x0001 //TX_HMNC_BST_FLG -352 0x4000 //TX_HMNC_BST_THR -353 0x0800 //TX_DT_BINVAD_TH_0 -354 0x0800 //TX_DT_BINVAD_TH_1 -355 0x0800 //TX_DT_BINVAD_TH_2 -356 0x0800 //TX_DT_BINVAD_TH_3 -357 0x0000 //TX_DT_BINVAD_ENDF -358 0x1000 //TX_C_POST_FLT_DT -359 0x7FFF //TX_NS_B_POST_FLT_LESSCUT -360 0x0100 //TX_DT_BOOST -361 0x0000 //TX_BF_SGRAD_FLG -362 0x0005 //TX_BF_DVG_TH -363 0x001E //TX_SN_C_F -364 0x0000 //TX_K_APT -365 0x0001 //TX_NOISEDET -366 0x0190 //TX_NDETCT -367 0x000A //TX_NOISE_TH_0 -368 0x1B58 //TX_NOISE_TH_0_2 -369 0x2134 //TX_NOISE_TH_0_3 -370 0x00C6 //TX_NOISE_TH_1 -371 0x0DAC //TX_NOISE_TH_2 -372 0x2EE0 //TX_NOISE_TH_3 -373 0x47E0 //TX_NOISE_TH_4 -374 0x57E4 //TX_NOISE_TH_5 -375 0x4BD6 //TX_NOISE_TH_5_2 -376 0x0001 //TX_NOISE_TH_5_3 -377 0x4E20 //TX_NOISE_TH_5_4 -378 0x39DF //TX_NOISE_TH_6 -379 0x0014 //TX_MINENOISE_TH -380 0x4000 //TX_MINENOISE_MIC0_TH_MTS -381 0xFFEE //TX_MINENOISE_MIC0_TH_EXP -382 0x6000 //TX_MINENOISE_MIC0_S_TH_MTS -383 0xFFF3 //TX_MINENOISE_MIC0_S_TH_EXP -384 0x00A5 //TX_OUT_ENER_S_TH_CLEAN -385 0x00A5 //TX_OUT_ENER_S_TH_LESSCLEAN -386 0x00A5 //TX_OUT_ENER_S_TH_NOISY -387 0x0029 //TX_OUT_ENER_TH_NOISE -388 0x0200 //TX_OUT_ENER_TH_SPEECH -389 0x2000 //TX_SN_NPB_GAIN -390 0x0000 //TX_NN_NPB_GAIN -391 0x0000 //TX_CSX_ALPHA_0 -392 0x0000 //TX_CSX_ALPHA_1 -393 0x0000 //TX_CSX_ALPHA_2 -394 0x0000 //TX_CSX_ALPHA_3 -395 0x0800 //TX_MU_ARSP_EST -396 0x00C8 //TX_P_OUTBEAM_MIN_TH -397 0x0002 //TX_EXTRA_NS_L -398 0x0800 //TX_EXTRA_NS_A -399 0x0005 //TX_VR_NOISE_FLOOR_TH -400 0x0148 //TX_MIN_G_LOW300HZ -401 0x0004 //TX_MAXLEVEL_CNG -402 0x00B4 //TX_STN_NOISE_TH -403 0x4000 //TX_POST_MASK_SUP -404 0x7FFF //TX_POST_MASK_ADJUST -405 0x00C8 //TX_NS_ENOISE_MIC0_TH -406 0x0014 //TX_MINENOISE_MIC0_TH -407 0x012C //TX_MINENOISE_MIC0_S_TH -408 0x2900 //TX_MIN_G_CTRL_SSNS -409 0x0800 //TX_METAL_RTO_THR -410 0x0FA0 //TX_NS_FP_K_METAL -411 0x3A98 //TX_NOISEDET_BOOST_TH -412 0x0FA0 //TX_NSMOOTH_TH -413 0x0000 //TX_NS_RESRV_8 -414 0x1800 //TX_RHO_UPB -415 0x2328 //TX_N_HOLD_HS -416 0x006E //TX_N_RHO_BFR0 -417 0x7FFF //TX_LAMBDA_ARSP_EST -418 0x0100 //TX_EXTRA_GAIN_MICBLOCK -419 0x0333 //TX_THR_STD_NSR -420 0x019A //TX_THR_STD_PLH -421 0x03E8 //TX_N_HOLD_STD -422 0x0066 //TX_THR_STD_RHO -423 0x2800 //TX_BF_RESET_THR_HS -424 0x0CCD //TX_SB_RTO_MEAN_TH -425 0x0300 //TX_SB_RHO_MEAN_TH_NTALK -426 0x2000 //TX_SB_RTO_MEAN_TH_ABN -427 0x2EE0 //TX_SB_RTO_MEAN_TH_RUB -428 0x0990 //TX_WTA_EN_RTO_TH -429 0x1400 //TX_TOP_ENER_TH_F -430 0x0100 //TX_DESIRED_TALK_HOLDT -431 0x0800 //TX_MIC_BLOCK_FACTOR -432 0x0000 //TX_NSEST_BFRLRNRDC -433 0x0000 //TX_THR_POST_FLT_HS -434 0x0010 //TX_HS_VAD_BIN -435 0x2666 //TX_THR_VAD_HS -436 0x2CCD //TX_MEAN_RTO_MIN_TH2 -437 0x0032 //TX_SILENCE_T -438 0x0000 //TX_A_POST_FLT_WTA -439 0x799A //TX_LAMBDA_PFLT_WTA -440 0x051E //TX_SB_RHO_MEAN2_TH -441 0x051E //TX_SB_RHO_MEAN3_TH -442 0x0000 //TX_HS_RESRV_4 -443 0x0000 //TX_HS_RESRV_5 -444 0x0001 //TX_DOA_VAD_THR_1 -445 0x003C //TX_DOA_VAD_THR_2 -446 0x0028 //TX_DOA_VAD_THR1_0 -447 0x0028 //TX_DOA_VAD_THR1_1 -448 0x0000 //TX_SRC_DOA_RNG_LOW_0A -449 0x001E //TX_SRC_DOA_RNG_HIGH_0A -450 0x005A //TX_DFLT_SRC_DOA_0A -451 0x0000 //TX_SRC_DOA_RNG_LOW_0B -452 0x0000 //TX_SRC_DOA_RNG_HIGH_0B -453 0x0000 //TX_DFLT_SRC_DOA_0B -454 0x0000 //TX_SRC_DOA_RNG_LOW_0C -455 0x0000 //TX_SRC_DOA_RNG_HIGH_0C -456 0x0000 //TX_DFLT_SRC_DOA_0C -457 0x0000 //TX_SRC_DOA_RNG_LOW_0D -458 0x0000 //TX_SRC_DOA_RNG_HIGH_0D -459 0x0000 //TX_DFLT_SRC_DOA_0D -460 0x0000 //TX_SRC_DOA_RNG_LOW_1A -461 0x00B4 //TX_SRC_DOA_RNG_HIGH_1A -462 0x005A //TX_DFLT_SRC_DOA_1A -463 0x0000 //TX_SRC_DOA_RNG_LOW_1B -464 0x00B4 //TX_SRC_DOA_RNG_HIGH_1B -465 0x005A //TX_DFLT_SRC_DOA_1B -466 0x0000 //TX_SRC_DOA_RNG_LOW_1C -467 0x00B4 //TX_SRC_DOA_RNG_HIGH_1C -468 0x005A //TX_DFLT_SRC_DOA_1C -469 0x0000 //TX_SRC_DOA_RNG_LOW_1D -470 0x00B4 //TX_SRC_DOA_RNG_HIGH_1D -471 0x005A //TX_DFLT_SRC_DOA_1D -472 0x0100 //TX_BF_HOLDOFF_T -473 0x7FFF //TX_DOA_COST_FACTOR -474 0x0D9A //TX_MAINTOREFR_TH0 -475 0x071C //TX_DOA_TRK_THR -476 0x012C //TX_DOA_TRACK_HT -477 0x0200 //TX_N1_HOLD_HF -478 0x0100 //TX_N2_HOLD_HF -479 0x2A3D //TX_BF_RESET_THR_HF -480 0x7333 //TX_DOA_SMOOTH -481 0x0800 //TX_MU_BF -482 0x0800 //TX_BF_MU_LF_B2 -483 0x0040 //TX_BF_FC_END_BIN_B2 -484 0x0020 //TX_BF_FC_END_BIN -485 0x0000 //TX_HF_RESRV_25 -486 0x0000 //TX_HF_RESRV_26 -487 0x0007 //TX_N_DOA_SEED -488 0x0001 //TX_FINE_DOA_SEARCH_FLG -489 0x0000 //TX_HF_RESRV_27 -490 0x038E //TX_DLT_SRC_DOA_RNG -491 0x0200 //TX_BF_MU_LF -492 0x0000 //TX_DFLT_SRC_LOC_0 -493 0x7FFF //TX_DFLT_SRC_LOC_1 -494 0x0000 //TX_DFLT_SRC_LOC_2 -495 0x038E //TX_DOA_TRACK_VADTH -496 0x0000 //TX_DOA_TRACK_NEW -497 0x0300 //TX_NOR_OFF_THR -498 0x7C00 //TX_MORE_ON_700HZ_THR -499 0x2000 //TX_MU_BF_ADPT_NS -500 0x0000 //TX_ADAPT_LEN -501 0x6666 //TX_MORE_SNS -502 0x0000 //TX_NOR_OFF_TH1 -503 0x0000 //TX_WIDE_MASK_TH -504 0xD333 //TX_SUBSNRATIOHIGH4MEANBCK_THR -505 0x6000 //TX_C_POST_FLT_CUT -506 0x2000 //TX_RADIODTLV -507 0x0320 //TX_POWER_LINEIN_TH -508 0x0014 //TX_FE_VADCOUNT_TH_FC -509 0x0000 //TX_ECHO_SUPP_FC -510 0x0C80 //TX_ECHO_TH -511 0x6666 //TX_MIC_TO_BFGAIN -512 0x0000 //TX_MICTOBFGAIN0 -513 0x0000 //TX_FASTMUE_TH -514 0x0000 //TX_DERVB_LEN_0 -515 0x0000 //TX_DERVB_LEN_1 -516 0x0000 //TX_RHO_DERVB -517 0x0000 //TX_MIC_INDX_DERVB -518 0x0000 //TX_MU_DERVB -519 0x0000 //TX_DR_RESRV_0 -520 0x0000 //TX_DR_RESRV_1 -521 0x0000 //TX_DR_RESRV_2 -522 0x0000 //TX_DR_RESRV_3 -523 0x0000 //TX_DR_RESRV_4 -524 0x0000 //TX_DR_RESRV_5 -525 0x0000 //TX_DR_RESRV_6 -526 0x0000 //TX_DR_RESRV_7 -527 0x0000 //TX_DR_RESRV_8 -528 0x1333 //TX_WIND_MARK_TH -529 0x399A //TX_CORR_THR -530 0x0004 //TX_SNR_THR -531 0x0010 //TX_ENGY_THR -532 0x1770 //TX_CORR_HIGH_TH -533 0x6000 //TX_ENGY_THR_2 -534 0x3400 //TX_MEAN_RTO_THR -535 0x0028 //TX_WNS_ENOISE_MIC0_TH -536 0x3000 //TX_RATIOMICL_TH -537 0x7FFF //TX_CALIG_HS -538 0x0000 //TX_LVL_CTRL -539 0x0010 //TX_WIND_SUPRTO -540 0x0014 //TX_WNS_MIN_G -541 0x0600 //TX_WNS_B_POST_FLT -542 0x3000 //TX_RATIOMICH_TH -543 0xD120 //TX_WIND_INBEAM_L_TH -544 0x0FA0 //TX_WIND_INBEAM_H_TH -545 0x2000 //TX_WNS_RESRV_0 -546 0x59D8 //TX_WNS_RESRV_1 -547 0x0200 //TX_WNS_RESRV_2 -548 0x0000 //TX_WNS_RESRV_3 -549 0x0000 //TX_WNS_RESRV_4 -550 0x0000 //TX_WNS_RESRV_5 -551 0x0000 //TX_WNS_RESRV_6 -552 0x0000 //TX_PB_B_POST_FLT_LESSCUT -553 0x0070 //TX_BF_LESSCUT_BBIN -554 0x0070 //TX_BF_LESSCUT_EBIN -555 0x0010 //TX_POSTBFB0 -556 0x0070 //TX_POSTBFB -557 0x00B0 //TX_POSTBFE -558 0x0E66 //TX_SPEECH_SNR_TH -559 0x0050 //TX_PB_MAX_PRI_SNR_TH -560 0x770A //TX_MAX_PRI_SNR_TH_L -561 0x0000 //TX_PFGAIN -562 0x0000 //TX_MAINTOREFR_TH -563 0x0000 //TX_SAM_MARK -564 0x0000 //TX_PB_RESRV_0 -565 0x0000 //TX_PB_RESRV_1 -566 0x0030 //TX_FDEQ_SUBNUM -567 0x504A //TX_FDEQ_GAIN_0 -568 0x4C54 //TX_FDEQ_GAIN_1 -569 0x554B //TX_FDEQ_GAIN_2 -570 0x4D4E //TX_FDEQ_GAIN_3 -571 0x4F4F //TX_FDEQ_GAIN_4 -572 0x4E51 //TX_FDEQ_GAIN_5 -573 0x5154 //TX_FDEQ_GAIN_6 -574 0x5456 //TX_FDEQ_GAIN_7 -575 0x5E66 //TX_FDEQ_GAIN_8 -576 0x675D //TX_FDEQ_GAIN_9 -577 0x5655 //TX_FDEQ_GAIN_10 -578 0x5956 //TX_FDEQ_GAIN_11 -579 0x5656 //TX_FDEQ_GAIN_12 -580 0x5953 //TX_FDEQ_GAIN_13 -581 0x575A //TX_FDEQ_GAIN_14 -582 0x5559 //TX_FDEQ_GAIN_15 -583 0x656E //TX_FDEQ_GAIN_16 -584 0x7B98 //TX_FDEQ_GAIN_17 -585 0x9898 //TX_FDEQ_GAIN_18 -586 0x9848 //TX_FDEQ_GAIN_19 -587 0x4848 //TX_FDEQ_GAIN_20 -588 0x4848 //TX_FDEQ_GAIN_21 -589 0x4848 //TX_FDEQ_GAIN_22 -590 0x4848 //TX_FDEQ_GAIN_23 -591 0x0F03 //TX_FDEQ_BIN_0 -592 0x0909 //TX_FDEQ_BIN_1 -593 0x080F //TX_FDEQ_BIN_2 -594 0x0609 //TX_FDEQ_BIN_3 -595 0x0F03 //TX_FDEQ_BIN_4 -596 0x1402 //TX_FDEQ_BIN_5 -597 0x0E13 //TX_FDEQ_BIN_6 -598 0x110F //TX_FDEQ_BIN_7 -599 0x0E0F //TX_FDEQ_BIN_8 -600 0x0E0F //TX_FDEQ_BIN_9 -601 0x080D //TX_FDEQ_BIN_10 -602 0x0F0F //TX_FDEQ_BIN_11 -603 0x0F0F //TX_FDEQ_BIN_12 -604 0x0A0F //TX_FDEQ_BIN_13 -605 0x0809 //TX_FDEQ_BIN_14 -606 0x0A0B //TX_FDEQ_BIN_15 -607 0x0C0D //TX_FDEQ_BIN_16 -608 0x0E0F //TX_FDEQ_BIN_17 -609 0x1013 //TX_FDEQ_BIN_18 -610 0x0A00 //TX_FDEQ_BIN_19 -611 0x0000 //TX_FDEQ_BIN_20 -612 0x0000 //TX_FDEQ_BIN_21 -613 0x0000 //TX_FDEQ_BIN_22 -614 0x0000 //TX_FDEQ_BIN_23 -615 0x0000 //TX_FDEQ_PADDING -616 0x0030 //TX_PREEQ_SUBNUM_MIC0 -617 0x4848 //TX_PREEQ_GAIN_MIC0_0 -618 0x4848 //TX_PREEQ_GAIN_MIC0_1 -619 0x4848 //TX_PREEQ_GAIN_MIC0_2 -620 0x4848 //TX_PREEQ_GAIN_MIC0_3 -621 0x4848 //TX_PREEQ_GAIN_MIC0_4 -622 0x4848 //TX_PREEQ_GAIN_MIC0_5 -623 0x4846 //TX_PREEQ_GAIN_MIC0_6 -624 0x4645 //TX_PREEQ_GAIN_MIC0_7 -625 0x4545 //TX_PREEQ_GAIN_MIC0_8 -626 0x4545 //TX_PREEQ_GAIN_MIC0_9 -627 0x4444 //TX_PREEQ_GAIN_MIC0_10 -628 0x4443 //TX_PREEQ_GAIN_MIC0_11 -629 0x4241 //TX_PREEQ_GAIN_MIC0_12 -630 0x3C3E //TX_PREEQ_GAIN_MIC0_13 -631 0x3E40 //TX_PREEQ_GAIN_MIC0_14 -632 0x4848 //TX_PREEQ_GAIN_MIC0_15 -633 0x4848 //TX_PREEQ_GAIN_MIC0_16 -634 0x4848 //TX_PREEQ_GAIN_MIC0_17 -635 0x4848 //TX_PREEQ_GAIN_MIC0_18 -636 0x4848 //TX_PREEQ_GAIN_MIC0_19 -637 0x4848 //TX_PREEQ_GAIN_MIC0_20 -638 0x4848 //TX_PREEQ_GAIN_MIC0_21 -639 0x4848 //TX_PREEQ_GAIN_MIC0_22 -640 0x4848 //TX_PREEQ_GAIN_MIC0_23 -641 0x0202 //TX_PREEQ_BIN_MIC0_0 -642 0x0203 //TX_PREEQ_BIN_MIC0_1 -643 0x0303 //TX_PREEQ_BIN_MIC0_2 -644 0x0304 //TX_PREEQ_BIN_MIC0_3 -645 0x0405 //TX_PREEQ_BIN_MIC0_4 -646 0x0506 //TX_PREEQ_BIN_MIC0_5 -647 0x0808 //TX_PREEQ_BIN_MIC0_6 -648 0x0809 //TX_PREEQ_BIN_MIC0_7 -649 0x0A0A //TX_PREEQ_BIN_MIC0_8 -650 0x0C10 //TX_PREEQ_BIN_MIC0_9 -651 0x1013 //TX_PREEQ_BIN_MIC0_10 -652 0x1414 //TX_PREEQ_BIN_MIC0_11 -653 0x261E //TX_PREEQ_BIN_MIC0_12 -654 0x1E14 //TX_PREEQ_BIN_MIC0_13 -655 0x1414 //TX_PREEQ_BIN_MIC0_14 -656 0x2814 //TX_PREEQ_BIN_MIC0_15 -657 0x4000 //TX_PREEQ_BIN_MIC0_16 -658 0x0000 //TX_PREEQ_BIN_MIC0_17 -659 0x0000 //TX_PREEQ_BIN_MIC0_18 -660 0x0000 //TX_PREEQ_BIN_MIC0_19 -661 0x0000 //TX_PREEQ_BIN_MIC0_20 -662 0x0000 //TX_PREEQ_BIN_MIC0_21 -663 0x0000 //TX_PREEQ_BIN_MIC0_22 -664 0x0000 //TX_PREEQ_BIN_MIC0_23 -665 0x0030 //TX_PREEQ_SUBNUM_MIC1 -666 0x4848 //TX_PREEQ_GAIN_MIC1_0 -667 0x4848 //TX_PREEQ_GAIN_MIC1_1 -668 0x4848 //TX_PREEQ_GAIN_MIC1_2 -669 0x4848 //TX_PREEQ_GAIN_MIC1_3 -670 0x4848 //TX_PREEQ_GAIN_MIC1_4 -671 0x4848 //TX_PREEQ_GAIN_MIC1_5 -672 0x4849 //TX_PREEQ_GAIN_MIC1_6 -673 0x4A4B //TX_PREEQ_GAIN_MIC1_7 -674 0x4C4B //TX_PREEQ_GAIN_MIC1_8 -675 0x4A48 //TX_PREEQ_GAIN_MIC1_9 -676 0x4B4C //TX_PREEQ_GAIN_MIC1_10 -677 0x4C4B //TX_PREEQ_GAIN_MIC1_11 -678 0x4838 //TX_PREEQ_GAIN_MIC1_12 -679 0x3858 //TX_PREEQ_GAIN_MIC1_13 -680 0x7060 //TX_PREEQ_GAIN_MIC1_14 -681 0x9870 //TX_PREEQ_GAIN_MIC1_15 -682 0x5848 //TX_PREEQ_GAIN_MIC1_16 -683 0x4848 //TX_PREEQ_GAIN_MIC1_17 -684 0x4848 //TX_PREEQ_GAIN_MIC1_18 -685 0x4848 //TX_PREEQ_GAIN_MIC1_19 -686 0x4848 //TX_PREEQ_GAIN_MIC1_20 -687 0x4848 //TX_PREEQ_GAIN_MIC1_21 -688 0x4848 //TX_PREEQ_GAIN_MIC1_22 -689 0x4848 //TX_PREEQ_GAIN_MIC1_23 -690 0x0202 //TX_PREEQ_BIN_MIC1_0 -691 0x0203 //TX_PREEQ_BIN_MIC1_1 -692 0x0303 //TX_PREEQ_BIN_MIC1_2 -693 0x0304 //TX_PREEQ_BIN_MIC1_3 -694 0x0405 //TX_PREEQ_BIN_MIC1_4 -695 0x0506 //TX_PREEQ_BIN_MIC1_5 -696 0x0808 //TX_PREEQ_BIN_MIC1_6 -697 0x0809 //TX_PREEQ_BIN_MIC1_7 -698 0x0A0A //TX_PREEQ_BIN_MIC1_8 -699 0x0C10 //TX_PREEQ_BIN_MIC1_9 -700 0x1013 //TX_PREEQ_BIN_MIC1_10 -701 0x1414 //TX_PREEQ_BIN_MIC1_11 -702 0x261E //TX_PREEQ_BIN_MIC1_12 -703 0x1E14 //TX_PREEQ_BIN_MIC1_13 -704 0x1414 //TX_PREEQ_BIN_MIC1_14 -705 0x2814 //TX_PREEQ_BIN_MIC1_15 -706 0x4000 //TX_PREEQ_BIN_MIC1_16 -707 0x0000 //TX_PREEQ_BIN_MIC1_17 -708 0x0000 //TX_PREEQ_BIN_MIC1_18 -709 0x0000 //TX_PREEQ_BIN_MIC1_19 -710 0x0000 //TX_PREEQ_BIN_MIC1_20 -711 0x0000 //TX_PREEQ_BIN_MIC1_21 -712 0x0000 //TX_PREEQ_BIN_MIC1_22 -713 0x0000 //TX_PREEQ_BIN_MIC1_23 -714 0x0030 //TX_PREEQ_SUBNUM_MIC2 -715 0x4848 //TX_PREEQ_GAIN_MIC2_0 -716 0x4848 //TX_PREEQ_GAIN_MIC2_1 -717 0x4848 //TX_PREEQ_GAIN_MIC2_2 -718 0x4848 //TX_PREEQ_GAIN_MIC2_3 -719 0x4848 //TX_PREEQ_GAIN_MIC2_4 -720 0x4848 //TX_PREEQ_GAIN_MIC2_5 -721 0x4848 //TX_PREEQ_GAIN_MIC2_6 -722 0x4848 //TX_PREEQ_GAIN_MIC2_7 -723 0x4848 //TX_PREEQ_GAIN_MIC2_8 -724 0x4848 //TX_PREEQ_GAIN_MIC2_9 -725 0x4848 //TX_PREEQ_GAIN_MIC2_10 -726 0x4848 //TX_PREEQ_GAIN_MIC2_11 -727 0x4848 //TX_PREEQ_GAIN_MIC2_12 -728 0x4848 //TX_PREEQ_GAIN_MIC2_13 -729 0x4848 //TX_PREEQ_GAIN_MIC2_14 -730 0x4848 //TX_PREEQ_GAIN_MIC2_15 -731 0x4848 //TX_PREEQ_GAIN_MIC2_16 -732 0x4848 //TX_PREEQ_GAIN_MIC2_17 -733 0x4848 //TX_PREEQ_GAIN_MIC2_18 -734 0x4848 //TX_PREEQ_GAIN_MIC2_19 -735 0x4848 //TX_PREEQ_GAIN_MIC2_20 -736 0x4848 //TX_PREEQ_GAIN_MIC2_21 -737 0x4848 //TX_PREEQ_GAIN_MIC2_22 -738 0x4848 //TX_PREEQ_GAIN_MIC2_23 -739 0x0202 //TX_PREEQ_BIN_MIC2_0 -740 0x0203 //TX_PREEQ_BIN_MIC2_1 -741 0x0303 //TX_PREEQ_BIN_MIC2_2 -742 0x0304 //TX_PREEQ_BIN_MIC2_3 -743 0x0405 //TX_PREEQ_BIN_MIC2_4 -744 0x0506 //TX_PREEQ_BIN_MIC2_5 -745 0x0808 //TX_PREEQ_BIN_MIC2_6 -746 0x0809 //TX_PREEQ_BIN_MIC2_7 -747 0x0A0A //TX_PREEQ_BIN_MIC2_8 -748 0x0C10 //TX_PREEQ_BIN_MIC2_9 -749 0x1013 //TX_PREEQ_BIN_MIC2_10 -750 0x1414 //TX_PREEQ_BIN_MIC2_11 -751 0x261E //TX_PREEQ_BIN_MIC2_12 -752 0x1E14 //TX_PREEQ_BIN_MIC2_13 -753 0x1414 //TX_PREEQ_BIN_MIC2_14 -754 0x2814 //TX_PREEQ_BIN_MIC2_15 -755 0x4000 //TX_PREEQ_BIN_MIC2_16 -756 0x0000 //TX_PREEQ_BIN_MIC2_17 -757 0x0000 //TX_PREEQ_BIN_MIC2_18 -758 0x0000 //TX_PREEQ_BIN_MIC2_19 -759 0x0000 //TX_PREEQ_BIN_MIC2_20 -760 0x0000 //TX_PREEQ_BIN_MIC2_21 -761 0x0000 //TX_PREEQ_BIN_MIC2_22 -762 0x0000 //TX_PREEQ_BIN_MIC2_23 -763 0x0006 //TX_MASKING_ABILITY -764 0x2000 //TX_NND_WEIGHT -765 0x0060 //TX_MIC_CALIBRATION_0 -766 0x0060 //TX_MIC_CALIBRATION_1 -767 0x0070 //TX_MIC_CALIBRATION_2 -768 0x0070 //TX_MIC_CALIBRATION_3 -769 0x0050 //TX_MIC_PWR_BIAS_0 -770 0x0040 //TX_MIC_PWR_BIAS_1 -771 0x0040 //TX_MIC_PWR_BIAS_2 -772 0x0040 //TX_MIC_PWR_BIAS_3 -773 0x0009 //TX_GAIN_LIMIT_0 -774 0x000F //TX_GAIN_LIMIT_1 -775 0x000F //TX_GAIN_LIMIT_2 -776 0x000F //TX_GAIN_LIMIT_3 -777 0x7F5B //TX_BVE_NOVAD0_ALPHADOWN -778 0x7FDE //TX_BVE_VAD0_ALPHAUP -779 0x7F3A //TX_BVE_VAD0_ALPHADOWN -780 0x2000 //TX_BVE_GAINWEIGHT_NOFEVADLI -781 0x7F5B //TX_BVE_FEVADLI_ALPHA -782 0x7F19 //TX_BVE_NOVAD0_ALPHAUP -783 0x1000 //TX_TDDRC_ALPHA_UP_01 -784 0x1000 //TX_TDDRC_ALPHA_UP_02 -785 0x1000 //TX_TDDRC_ALPHA_UP_03 -786 0x1000 //TX_TDDRC_ALPHA_UP_04 -787 0x7EB8 //TX_TDDRC_ALPHA_DWN_01 -788 0x7EB8 //TX_TDDRC_ALPHA_DWN_02 -789 0x7EB8 //TX_TDDRC_ALPHA_DWN_03 -790 0x7EB8 //TX_TDDRC_ALPHA_DWN_04 -791 0x7FFF //TX_TDDRC_TD_DRC_LIMIT -792 0x0800 //TX_TDDRC_POST_LIMIT_GAIN -793 0x0000 //TX_TDDRC_RESRV_0 -794 0x0000 //TX_TDDRC_RESRV_1 -795 0x0018 //TX_FDDRC_BAND_MARGIN_0 -796 0x0030 //TX_FDDRC_BAND_MARGIN_1 -797 0x0050 //TX_FDDRC_BAND_MARGIN_2 -798 0x0080 //TX_FDDRC_BAND_MARGIN_3 -799 0x0007 //TX_FDDRC_BLOCK_EXP -800 0x5000 //TX_FDDRC_THRD_2_0 -801 0x5000 //TX_FDDRC_THRD_2_1 -802 0x5000 //TX_FDDRC_THRD_2_2 -803 0x5000 //TX_FDDRC_THRD_2_3 -804 0x6400 //TX_FDDRC_THRD_3_0 -805 0x6400 //TX_FDDRC_THRD_3_1 -806 0x6400 //TX_FDDRC_THRD_3_2 -807 0x6400 //TX_FDDRC_THRD_3_3 -808 0x2000 //TX_FDDRC_SLANT_0_0 -809 0x2000 //TX_FDDRC_SLANT_0_1 -810 0x2000 //TX_FDDRC_SLANT_0_2 -811 0x2000 //TX_FDDRC_SLANT_0_3 -812 0x5333 //TX_FDDRC_SLANT_1_0 -813 0x5333 //TX_FDDRC_SLANT_1_1 -814 0x5333 //TX_FDDRC_SLANT_1_2 -815 0x5333 //TX_FDDRC_SLANT_1_3 -816 0x0010 //TX_DEADMIC_SILENCE_TH -817 0x0600 //TX_MIC_DEGRADE_TH -818 0x0078 //TX_DEADMIC_CNT -819 0x0078 //TX_MIC_DEGRADE_CNT -820 0x0000 //TX_FDDRC_RESRV_4 -821 0x0000 //TX_FDDRC_RESRV_5 -822 0x0000 //TX_FDDRC_RESRV_6 -823 0x7FFF //TX_KS_NOISEPASTE_FACTOR -824 0x0001 //TX_KS_CONFIG -825 0x7FFF //TX_KS_GAIN_MIN -826 0x0000 //TX_KS_RESRV_0 -827 0x0000 //TX_KS_RESRV_1 -828 0x0000 //TX_KS_RESRV_2 -829 0x7C00 //TX_LAMBDA_PKA_FP -830 0x2000 //TX_TPKA_FP -831 0x0080 //TX_MIN_G_FP -832 0x2000 //TX_MAX_G_FP -833 0x0FA0 //TX_FFP_FP_K_METAL -834 0x4000 //TX_A_POST_FLT_FP -835 0x0F5C //TX_RTO_OUTBEAM_TH -836 0x4CCD //TX_TPKA_FP_THD -837 0x0000 //TX_MAX_G_FP_BLK -838 0x0000 //TX_FFP_FADEIN -839 0x0000 //TX_FFP_FADEOUT -840 0x0000 //TX_WHISPERCTH -841 0x0000 //TX_WHISPERHOLDT -842 0x0000 //TX_WHISP_ENTHH -843 0x0000 //TX_WHISP_ENTHL -844 0x0000 //TX_WHISP_RTOTH -845 0x0000 //TX_WHISP_RTOTH2 -846 0x0096 //TX_MUTE_PERIOD -847 0x0000 //TX_FADE_IN_PERIOD -848 0x0100 //TX_FFP_RESRV_2 -849 0x0020 //TX_FFP_RESRV_3 -850 0x0000 //TX_FFP_RESRV_4 -851 0x0000 //TX_FFP_RESRV_5 -852 0x0000 //TX_FFP_RESRV_6 -853 0x0002 //TX_FILTINDX -854 0x0000 //TX_TDDRC_THRD_0 -855 0x0000 //TX_TDDRC_THRD_1 -856 0x1800 //TX_TDDRC_THRD_2 -857 0x1800 //TX_TDDRC_THRD_3 -858 0x3000 //TX_TDDRC_SLANT_0 -859 0x7E00 //TX_TDDRC_SLANT_1 -860 0x1000 //TX_TDDRC_ALPHA_UP_00 -861 0x7EB8 //TX_TDDRC_ALPHA_DWN_00 -862 0x0000 //TX_TDDRC_HMNC_FLAG -863 0x199A //TX_TDDRC_HMNC_GAIN -864 0x0000 //TX_TDDRC_SMT_FLAG -865 0x0CCD //TX_TDDRC_SMT_W -866 0x05F5 //TX_TDDRC_DRC_GAIN -867 0x7FFF //TX_TDDRC_LMT_THRD -868 0x0000 //TX_TDDRC_LMT_ALPHA -869 0x0000 //TX_TFMASKLTH -870 0x0000 //TX_TFMASKLTHL -871 0x0CCD //TX_TFMASKHTH -872 0xECCD //TX_TFMASKLTH_BINVAD -873 0xFCCD //TX_TFMASKLTH_NS_EST -874 0xF800 //TX_TFMASKLTH_DOA -875 0x0CCD //TX_TFMASKTH_BLESSCUT -876 0x1000 //TX_B_LESSCUT_RTO_MASK -877 0x2000 //TX_SB_RHO_MEAN_TH_ABN -878 0x2000 //TX_B_POST_FLT_MASK -879 0x0000 //TX_B_POST_FLT_MASK1 -880 0x6333 //TX_GAIN_WIND_MASK -881 0x0000 //TX_TFMASK_BFSTRICT_MUSIC -882 0x0000 //TX_TFMASK_BFSTRICT_NOMUSIC -883 0x7333 //TX_FASTNS_OUTIN_TH -884 0x0CCD //TX_FASTNS_TFMASK_TH -885 0x0CCD //TX_FASTNS_TFMASKBIN_TH1 -886 0x0CCD //TX_FASTNS_TFMASKBIN_TH2 -887 0x0CCD //TX_FASTNS_TFMASKBIN_TH3 -888 0x0028 //TX_FASTNS_ARSPC_TH -889 0xC000 //TX_FASTNS_MASK5_TH -890 0x0810 //TX_POSTSSA_MIN_G_VR_MASK -891 0x1000 //TX_A_LESSCUT_RTO_MASK -892 0x1770 //TX_FASTNS_NOISETH -893 0xC000 //TX_FASTNS_SSA_THLFL -894 0xC000 //TX_FASTNS_SSA_THHFL -895 0xCCCC //TX_FASTNS_SSA_THLFH -896 0xD999 //TX_FASTNS_SSA_THHFH -#RX -0 0x002C //RX_RECVFUNC_MODE_0 -1 0x0000 //RX_RECVFUNC_MODE_1 -2 0x0004 //RX_SAMPLINGFREQ_SIG -3 0x0004 //RX_SAMPLINGFREQ_PROC -4 0x000A //RX_FRAME_SZ -5 0x0000 //RX_DELAY_OPT -6 0x1000 //RX_TDDRC_ALPHA_UP_1 -7 0x1000 //RX_TDDRC_ALPHA_UP_2 -8 0x1000 //RX_TDDRC_ALPHA_UP_3 -9 0x1000 //RX_TDDRC_ALPHA_UP_4 -10 0x064E //RX_PGA -11 0x7FFF //RX_A_HP -12 0x4000 //RX_B_PE -13 0x5800 //RX_THR_PITCH_DET_0 -14 0x5000 //RX_THR_PITCH_DET_1 -15 0x4000 //RX_THR_PITCH_DET_2 -16 0x0008 //RX_PITCH_BFR_LEN -17 0x0003 //RX_SBD_PITCH_DET -18 0x0100 //RX_PP_RESRV_0 -19 0x0020 //RX_PP_RESRV_1 -20 0x0600 //RX_N_SN_EST -21 0x000C //RX_N2_SN_EST -22 0x000F //RX_NS_LVL_CTRL -23 0xF800 //RX_THR_SN_EST -24 0x7E00 //RX_LAMBDA_PFILT -25 0x000A //RX_FENS_RESRV_0 -26 0x0190 //RX_FENS_RESRV_1 -27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 -28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 -29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 -30 0x0002 //RX_EXTRA_NS_L -31 0x0800 //RX_EXTRA_NS_A -32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 -33 0x7000 //RX_TDDRC_LIMITER_THRD -34 0x0800 //RX_TDDRC_LIMITER_GAIN -35 0x199A //RX_A_POST_FLT -36 0x0000 //RX_LMT_THRD -37 0x4000 //RX_LMT_ALPHA -38 0x0020 //RX_FDEQ_SUBNUM -39 0x4848 //RX_FDEQ_GAIN_0 -40 0x4850 //RX_FDEQ_GAIN_1 -41 0x6478 //RX_FDEQ_GAIN_2 -42 0x8689 //RX_FDEQ_GAIN_3 -43 0x908F //RX_FDEQ_GAIN_4 -44 0x9495 //RX_FDEQ_GAIN_5 -45 0x989D //RX_FDEQ_GAIN_6 -46 0x9DA6 //RX_FDEQ_GAIN_7 -47 0xA895 //RX_FDEQ_GAIN_8 -48 0x8A8A //RX_FDEQ_GAIN_9 -49 0x8E78 //RX_FDEQ_GAIN_10 -50 0x7070 //RX_FDEQ_GAIN_11 -51 0x7680 //RX_FDEQ_GAIN_12 -52 0x787C //RX_FDEQ_GAIN_13 -53 0x8890 //RX_FDEQ_GAIN_14 -54 0x9CAC //RX_FDEQ_GAIN_15 -55 0x4848 //RX_FDEQ_GAIN_16 -56 0x4848 //RX_FDEQ_GAIN_17 -57 0x4848 //RX_FDEQ_GAIN_18 -58 0x4848 //RX_FDEQ_GAIN_19 -59 0x4848 //RX_FDEQ_GAIN_20 -60 0x4848 //RX_FDEQ_GAIN_21 -61 0x4848 //RX_FDEQ_GAIN_22 -62 0x4848 //RX_FDEQ_GAIN_23 -63 0x0202 //RX_FDEQ_BIN_0 -64 0x0202 //RX_FDEQ_BIN_1 -65 0x0302 //RX_FDEQ_BIN_2 -66 0x0304 //RX_FDEQ_BIN_3 -67 0x0405 //RX_FDEQ_BIN_4 -68 0x0506 //RX_FDEQ_BIN_5 -69 0x0708 //RX_FDEQ_BIN_6 -70 0x090A //RX_FDEQ_BIN_7 -71 0x0B0C //RX_FDEQ_BIN_8 -72 0x0D0E //RX_FDEQ_BIN_9 -73 0x1013 //RX_FDEQ_BIN_10 -74 0x1719 //RX_FDEQ_BIN_11 -75 0x1B1E //RX_FDEQ_BIN_12 -76 0x1E1E //RX_FDEQ_BIN_13 -77 0x1E28 //RX_FDEQ_BIN_14 -78 0x282C //RX_FDEQ_BIN_15 -79 0x0000 //RX_FDEQ_BIN_16 -80 0x0000 //RX_FDEQ_BIN_17 -81 0x0000 //RX_FDEQ_BIN_18 -82 0x0000 //RX_FDEQ_BIN_19 -83 0x0000 //RX_FDEQ_BIN_20 -84 0x0000 //RX_FDEQ_BIN_21 -85 0x0000 //RX_FDEQ_BIN_22 -86 0x0000 //RX_FDEQ_BIN_23 -87 0x4000 //RX_FDEQ_RESRV_0 -88 0x0320 //RX_FDEQ_RESRV_1 -89 0x0018 //RX_FDDRC_BAND_MARGIN_0 -90 0x0030 //RX_FDDRC_BAND_MARGIN_1 -91 0x0050 //RX_FDDRC_BAND_MARGIN_2 -92 0x0080 //RX_FDDRC_BAND_MARGIN_3 -93 0x0007 //RX_FDDRC_BLOCK_EXP -94 0x5000 //RX_FDDRC_THRD_2_0 -95 0x5000 //RX_FDDRC_THRD_2_1 -96 0x5000 //RX_FDDRC_THRD_2_2 -97 0x5000 //RX_FDDRC_THRD_2_3 -98 0x6400 //RX_FDDRC_THRD_3_0 -99 0x6400 //RX_FDDRC_THRD_3_1 -100 0x6400 //RX_FDDRC_THRD_3_2 -101 0x6400 //RX_FDDRC_THRD_3_3 -102 0x2000 //RX_FDDRC_SLANT_0_0 -103 0x2000 //RX_FDDRC_SLANT_0_1 -104 0x2000 //RX_FDDRC_SLANT_0_2 -105 0x2000 //RX_FDDRC_SLANT_0_3 -106 0x5333 //RX_FDDRC_SLANT_1_0 -107 0x5333 //RX_FDDRC_SLANT_1_1 -108 0x5333 //RX_FDDRC_SLANT_1_2 -109 0x5333 //RX_FDDRC_SLANT_1_3 -110 0x0000 //RX_FDDRC_RESRV_0 -111 0x0002 //RX_FILTINDX -112 0x0000 //RX_TDDRC_THRD_0 -113 0x0000 //RX_TDDRC_THRD_1 -114 0x1800 //RX_TDDRC_THRD_2 -115 0x1800 //RX_TDDRC_THRD_3 -116 0x3000 //RX_TDDRC_SLANT_0 -117 0x6E00 //RX_TDDRC_SLANT_1 -118 0x1000 //RX_TDDRC_ALPHA_UP_0 -119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 -120 0x0000 //RX_TDDRC_HMNC_FLAG -121 0x199A //RX_TDDRC_HMNC_GAIN -122 0x0001 //RX_TDDRC_SMT_FLAG -123 0x0CCD //RX_TDDRC_SMT_W -124 0x0275 //RX_TDDRC_DRC_GAIN -125 0x7C00 //RX_LAMBDA_PKA_FP -126 0x1964 //RX_TPKA_FP -127 0x0080 //RX_MIN_G_FP -128 0x2000 //RX_MAX_G_FP -129 0x000D //RX_SPK_VOL -130 0x0000 //RX_VOL_RESRV_0 -131 0x0000 //RX_MAXLEVEL_CNG -132 0x3000 //RX_BWE_UV_TH -133 0x3000 //RX_BWE_UV_TH2 -134 0x1800 //RX_BWE_UV_TH3 -135 0x1000 //RX_BWE_V_TH -136 0x04CD //RX_BWE_GAIN1_V_TH1 -137 0x0F33 //RX_BWE_GAIN1_V_TH2 -138 0x7333 //RX_BWE_UV_EQ -139 0x199A //RX_BWE_V_EQ -140 0x7333 //RX_BWE_TONE_TH -141 0x0004 //RX_BWE_UV_HOLD_T -142 0x6CCD //RX_BWE_GAIN2_ALPHA -143 0x799A //RX_BWE_GAIN3_ALPHA -144 0x001E //RX_BWE_CUTOFF -145 0x3000 //RX_BWE_GAINFILL -146 0x3200 //RX_BWE_MAXTH_TONE -147 0x2000 //RX_BWE_EQ_0 -148 0x2000 //RX_BWE_EQ_1 -149 0x2000 //RX_BWE_EQ_2 -150 0x2000 //RX_BWE_EQ_3 -151 0x2000 //RX_BWE_EQ_4 -152 0x2000 //RX_BWE_EQ_5 -153 0x2000 //RX_BWE_EQ_6 -154 0x0000 //RX_BWE_RESRV_0 -155 0x0000 //RX_BWE_RESRV_1 -156 0x0000 //RX_BWE_RESRV_2 -#VOL 0 -6 0x1000 //RX_TDDRC_ALPHA_UP_1 -7 0x1000 //RX_TDDRC_ALPHA_UP_2 -8 0x1000 //RX_TDDRC_ALPHA_UP_3 -9 0x1000 //RX_TDDRC_ALPHA_UP_4 -27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 -28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 -29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 -32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 -33 0x7000 //RX_TDDRC_LIMITER_THRD -34 0x0800 //RX_TDDRC_LIMITER_GAIN -112 0x0000 //RX_TDDRC_THRD_0 -113 0x0000 //RX_TDDRC_THRD_1 -114 0x1800 //RX_TDDRC_THRD_2 -115 0x1800 //RX_TDDRC_THRD_3 -116 0x3000 //RX_TDDRC_SLANT_0 -117 0x6E00 //RX_TDDRC_SLANT_1 -118 0x1000 //RX_TDDRC_ALPHA_UP_0 -119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 -120 0x0000 //RX_TDDRC_HMNC_FLAG -121 0x199A //RX_TDDRC_HMNC_GAIN -122 0x0001 //RX_TDDRC_SMT_FLAG -123 0x0CCD //RX_TDDRC_SMT_W -124 0x0275 //RX_TDDRC_DRC_GAIN -38 0x0020 //RX_FDEQ_SUBNUM -39 0x4848 //RX_FDEQ_GAIN_0 -40 0x4850 //RX_FDEQ_GAIN_1 -41 0x6478 //RX_FDEQ_GAIN_2 -42 0x8689 //RX_FDEQ_GAIN_3 -43 0x908F //RX_FDEQ_GAIN_4 -44 0x9495 //RX_FDEQ_GAIN_5 -45 0x989D //RX_FDEQ_GAIN_6 -46 0x9DA6 //RX_FDEQ_GAIN_7 -47 0xA895 //RX_FDEQ_GAIN_8 -48 0x8A8A //RX_FDEQ_GAIN_9 -49 0x8E78 //RX_FDEQ_GAIN_10 -50 0x7070 //RX_FDEQ_GAIN_11 -51 0x7680 //RX_FDEQ_GAIN_12 -52 0x787C //RX_FDEQ_GAIN_13 -53 0x8890 //RX_FDEQ_GAIN_14 -54 0x9CAC //RX_FDEQ_GAIN_15 -55 0x4848 //RX_FDEQ_GAIN_16 -56 0x4848 //RX_FDEQ_GAIN_17 -57 0x4848 //RX_FDEQ_GAIN_18 -58 0x4848 //RX_FDEQ_GAIN_19 -59 0x4848 //RX_FDEQ_GAIN_20 -60 0x4848 //RX_FDEQ_GAIN_21 -61 0x4848 //RX_FDEQ_GAIN_22 -62 0x4848 //RX_FDEQ_GAIN_23 -63 0x0202 //RX_FDEQ_BIN_0 -64 0x0202 //RX_FDEQ_BIN_1 -65 0x0302 //RX_FDEQ_BIN_2 -66 0x0304 //RX_FDEQ_BIN_3 -67 0x0405 //RX_FDEQ_BIN_4 -68 0x0506 //RX_FDEQ_BIN_5 -69 0x0708 //RX_FDEQ_BIN_6 -70 0x090A //RX_FDEQ_BIN_7 -71 0x0B0C //RX_FDEQ_BIN_8 -72 0x0D0E //RX_FDEQ_BIN_9 -73 0x1013 //RX_FDEQ_BIN_10 -74 0x1719 //RX_FDEQ_BIN_11 -75 0x1B1E //RX_FDEQ_BIN_12 -76 0x1E1E //RX_FDEQ_BIN_13 -77 0x1E28 //RX_FDEQ_BIN_14 -78 0x282C //RX_FDEQ_BIN_15 -79 0x0000 //RX_FDEQ_BIN_16 -80 0x0000 //RX_FDEQ_BIN_17 -81 0x0000 //RX_FDEQ_BIN_18 -82 0x0000 //RX_FDEQ_BIN_19 -83 0x0000 //RX_FDEQ_BIN_20 -84 0x0000 //RX_FDEQ_BIN_21 -85 0x0000 //RX_FDEQ_BIN_22 -86 0x0000 //RX_FDEQ_BIN_23 -87 0x4000 //RX_FDEQ_RESRV_0 -88 0x0320 //RX_FDEQ_RESRV_1 -89 0x0018 //RX_FDDRC_BAND_MARGIN_0 -90 0x0030 //RX_FDDRC_BAND_MARGIN_1 -91 0x0050 //RX_FDDRC_BAND_MARGIN_2 -92 0x0080 //RX_FDDRC_BAND_MARGIN_3 -93 0x0007 //RX_FDDRC_BLOCK_EXP -94 0x5000 //RX_FDDRC_THRD_2_0 -95 0x5000 //RX_FDDRC_THRD_2_1 -96 0x5000 //RX_FDDRC_THRD_2_2 -97 0x5000 //RX_FDDRC_THRD_2_3 -98 0x6400 //RX_FDDRC_THRD_3_0 -99 0x6400 //RX_FDDRC_THRD_3_1 -100 0x6400 //RX_FDDRC_THRD_3_2 -101 0x6400 //RX_FDDRC_THRD_3_3 -102 0x2000 //RX_FDDRC_SLANT_0_0 -103 0x2000 //RX_FDDRC_SLANT_0_1 -104 0x2000 //RX_FDDRC_SLANT_0_2 -105 0x2000 //RX_FDDRC_SLANT_0_3 -106 0x5333 //RX_FDDRC_SLANT_1_0 -107 0x5333 //RX_FDDRC_SLANT_1_1 -108 0x5333 //RX_FDDRC_SLANT_1_2 -109 0x5333 //RX_FDDRC_SLANT_1_3 -110 0x0000 //RX_FDDRC_RESRV_0 -129 0x000D //RX_SPK_VOL -130 0x0000 //RX_VOL_RESRV_0 -#VOL 1 -6 0x1000 //RX_TDDRC_ALPHA_UP_1 -7 0x1000 //RX_TDDRC_ALPHA_UP_2 -8 0x1000 //RX_TDDRC_ALPHA_UP_3 -9 0x1000 //RX_TDDRC_ALPHA_UP_4 -27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 -28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 -29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 -32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 -33 0x7000 //RX_TDDRC_LIMITER_THRD -34 0x0800 //RX_TDDRC_LIMITER_GAIN -112 0x0000 //RX_TDDRC_THRD_0 -113 0x0000 //RX_TDDRC_THRD_1 -114 0x1800 //RX_TDDRC_THRD_2 -115 0x1800 //RX_TDDRC_THRD_3 -116 0x3000 //RX_TDDRC_SLANT_0 -117 0x6E00 //RX_TDDRC_SLANT_1 -118 0x1000 //RX_TDDRC_ALPHA_UP_0 -119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 -120 0x0000 //RX_TDDRC_HMNC_FLAG -121 0x199A //RX_TDDRC_HMNC_GAIN -122 0x0001 //RX_TDDRC_SMT_FLAG -123 0x0CCD //RX_TDDRC_SMT_W -124 0x0275 //RX_TDDRC_DRC_GAIN -38 0x0020 //RX_FDEQ_SUBNUM -39 0x4848 //RX_FDEQ_GAIN_0 -40 0x4850 //RX_FDEQ_GAIN_1 -41 0x6478 //RX_FDEQ_GAIN_2 -42 0x8689 //RX_FDEQ_GAIN_3 -43 0x908F //RX_FDEQ_GAIN_4 -44 0x9495 //RX_FDEQ_GAIN_5 -45 0x989D //RX_FDEQ_GAIN_6 -46 0x9DA6 //RX_FDEQ_GAIN_7 -47 0xA895 //RX_FDEQ_GAIN_8 -48 0x8A8A //RX_FDEQ_GAIN_9 -49 0x8E78 //RX_FDEQ_GAIN_10 -50 0x7070 //RX_FDEQ_GAIN_11 -51 0x7680 //RX_FDEQ_GAIN_12 -52 0x787C //RX_FDEQ_GAIN_13 -53 0x8890 //RX_FDEQ_GAIN_14 -54 0x9CAC //RX_FDEQ_GAIN_15 -55 0x4848 //RX_FDEQ_GAIN_16 -56 0x4848 //RX_FDEQ_GAIN_17 -57 0x4848 //RX_FDEQ_GAIN_18 -58 0x4848 //RX_FDEQ_GAIN_19 -59 0x4848 //RX_FDEQ_GAIN_20 -60 0x4848 //RX_FDEQ_GAIN_21 -61 0x4848 //RX_FDEQ_GAIN_22 -62 0x4848 //RX_FDEQ_GAIN_23 -63 0x0202 //RX_FDEQ_BIN_0 -64 0x0202 //RX_FDEQ_BIN_1 -65 0x0302 //RX_FDEQ_BIN_2 -66 0x0304 //RX_FDEQ_BIN_3 -67 0x0405 //RX_FDEQ_BIN_4 -68 0x0506 //RX_FDEQ_BIN_5 -69 0x0708 //RX_FDEQ_BIN_6 -70 0x090A //RX_FDEQ_BIN_7 -71 0x0B0C //RX_FDEQ_BIN_8 -72 0x0D0E //RX_FDEQ_BIN_9 -73 0x1013 //RX_FDEQ_BIN_10 -74 0x1719 //RX_FDEQ_BIN_11 -75 0x1B1E //RX_FDEQ_BIN_12 -76 0x1E1E //RX_FDEQ_BIN_13 -77 0x1E28 //RX_FDEQ_BIN_14 -78 0x282C //RX_FDEQ_BIN_15 -79 0x0000 //RX_FDEQ_BIN_16 -80 0x0000 //RX_FDEQ_BIN_17 -81 0x0000 //RX_FDEQ_BIN_18 -82 0x0000 //RX_FDEQ_BIN_19 -83 0x0000 //RX_FDEQ_BIN_20 -84 0x0000 //RX_FDEQ_BIN_21 -85 0x0000 //RX_FDEQ_BIN_22 -86 0x0000 //RX_FDEQ_BIN_23 -87 0x4000 //RX_FDEQ_RESRV_0 -88 0x0320 //RX_FDEQ_RESRV_1 -89 0x0018 //RX_FDDRC_BAND_MARGIN_0 -90 0x0030 //RX_FDDRC_BAND_MARGIN_1 -91 0x0050 //RX_FDDRC_BAND_MARGIN_2 -92 0x0080 //RX_FDDRC_BAND_MARGIN_3 -93 0x0007 //RX_FDDRC_BLOCK_EXP -94 0x5000 //RX_FDDRC_THRD_2_0 -95 0x5000 //RX_FDDRC_THRD_2_1 -96 0x5000 //RX_FDDRC_THRD_2_2 -97 0x5000 //RX_FDDRC_THRD_2_3 -98 0x6400 //RX_FDDRC_THRD_3_0 -99 0x6400 //RX_FDDRC_THRD_3_1 -100 0x6400 //RX_FDDRC_THRD_3_2 -101 0x6400 //RX_FDDRC_THRD_3_3 -102 0x2000 //RX_FDDRC_SLANT_0_0 -103 0x2000 //RX_FDDRC_SLANT_0_1 -104 0x2000 //RX_FDDRC_SLANT_0_2 -105 0x2000 //RX_FDDRC_SLANT_0_3 -106 0x5333 //RX_FDDRC_SLANT_1_0 -107 0x5333 //RX_FDDRC_SLANT_1_1 -108 0x5333 //RX_FDDRC_SLANT_1_2 -109 0x5333 //RX_FDDRC_SLANT_1_3 -110 0x0000 //RX_FDDRC_RESRV_0 -129 0x0016 //RX_SPK_VOL -130 0x0000 //RX_VOL_RESRV_0 -#VOL 2 -6 0x1000 //RX_TDDRC_ALPHA_UP_1 -7 0x1000 //RX_TDDRC_ALPHA_UP_2 -8 0x1000 //RX_TDDRC_ALPHA_UP_3 -9 0x1000 //RX_TDDRC_ALPHA_UP_4 -27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 -28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 -29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 -32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 -33 0x7000 //RX_TDDRC_LIMITER_THRD -34 0x0800 //RX_TDDRC_LIMITER_GAIN -112 0x0000 //RX_TDDRC_THRD_0 -113 0x0000 //RX_TDDRC_THRD_1 -114 0x1800 //RX_TDDRC_THRD_2 -115 0x1800 //RX_TDDRC_THRD_3 -116 0x3000 //RX_TDDRC_SLANT_0 -117 0x6E00 //RX_TDDRC_SLANT_1 -118 0x1000 //RX_TDDRC_ALPHA_UP_0 -119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 -120 0x0000 //RX_TDDRC_HMNC_FLAG -121 0x199A //RX_TDDRC_HMNC_GAIN -122 0x0001 //RX_TDDRC_SMT_FLAG -123 0x0CCD //RX_TDDRC_SMT_W -124 0x0275 //RX_TDDRC_DRC_GAIN -38 0x0020 //RX_FDEQ_SUBNUM -39 0x4848 //RX_FDEQ_GAIN_0 -40 0x4850 //RX_FDEQ_GAIN_1 -41 0x6478 //RX_FDEQ_GAIN_2 -42 0x8689 //RX_FDEQ_GAIN_3 -43 0x908F //RX_FDEQ_GAIN_4 -44 0x9495 //RX_FDEQ_GAIN_5 -45 0x989D //RX_FDEQ_GAIN_6 -46 0x9DA6 //RX_FDEQ_GAIN_7 -47 0xA895 //RX_FDEQ_GAIN_8 -48 0x8A8A //RX_FDEQ_GAIN_9 -49 0x8E78 //RX_FDEQ_GAIN_10 -50 0x7070 //RX_FDEQ_GAIN_11 -51 0x7680 //RX_FDEQ_GAIN_12 -52 0x787C //RX_FDEQ_GAIN_13 -53 0x8890 //RX_FDEQ_GAIN_14 -54 0x9CAC //RX_FDEQ_GAIN_15 -55 0x4848 //RX_FDEQ_GAIN_16 -56 0x4848 //RX_FDEQ_GAIN_17 -57 0x4848 //RX_FDEQ_GAIN_18 -58 0x4848 //RX_FDEQ_GAIN_19 -59 0x4848 //RX_FDEQ_GAIN_20 -60 0x4848 //RX_FDEQ_GAIN_21 -61 0x4848 //RX_FDEQ_GAIN_22 -62 0x4848 //RX_FDEQ_GAIN_23 -63 0x0202 //RX_FDEQ_BIN_0 -64 0x0202 //RX_FDEQ_BIN_1 -65 0x0302 //RX_FDEQ_BIN_2 -66 0x0304 //RX_FDEQ_BIN_3 -67 0x0405 //RX_FDEQ_BIN_4 -68 0x0506 //RX_FDEQ_BIN_5 -69 0x0708 //RX_FDEQ_BIN_6 -70 0x090A //RX_FDEQ_BIN_7 -71 0x0B0C //RX_FDEQ_BIN_8 -72 0x0D0E //RX_FDEQ_BIN_9 -73 0x1013 //RX_FDEQ_BIN_10 -74 0x1719 //RX_FDEQ_BIN_11 -75 0x1B1E //RX_FDEQ_BIN_12 -76 0x1E1E //RX_FDEQ_BIN_13 -77 0x1E28 //RX_FDEQ_BIN_14 -78 0x282C //RX_FDEQ_BIN_15 -79 0x0000 //RX_FDEQ_BIN_16 -80 0x0000 //RX_FDEQ_BIN_17 -81 0x0000 //RX_FDEQ_BIN_18 -82 0x0000 //RX_FDEQ_BIN_19 -83 0x0000 //RX_FDEQ_BIN_20 -84 0x0000 //RX_FDEQ_BIN_21 -85 0x0000 //RX_FDEQ_BIN_22 -86 0x0000 //RX_FDEQ_BIN_23 -87 0x4000 //RX_FDEQ_RESRV_0 -88 0x0320 //RX_FDEQ_RESRV_1 -89 0x0018 //RX_FDDRC_BAND_MARGIN_0 -90 0x0030 //RX_FDDRC_BAND_MARGIN_1 -91 0x0050 //RX_FDDRC_BAND_MARGIN_2 -92 0x0080 //RX_FDDRC_BAND_MARGIN_3 -93 0x0007 //RX_FDDRC_BLOCK_EXP -94 0x5000 //RX_FDDRC_THRD_2_0 -95 0x5000 //RX_FDDRC_THRD_2_1 -96 0x5000 //RX_FDDRC_THRD_2_2 -97 0x5000 //RX_FDDRC_THRD_2_3 -98 0x6400 //RX_FDDRC_THRD_3_0 -99 0x6400 //RX_FDDRC_THRD_3_1 -100 0x6400 //RX_FDDRC_THRD_3_2 -101 0x6400 //RX_FDDRC_THRD_3_3 -102 0x2000 //RX_FDDRC_SLANT_0_0 -103 0x2000 //RX_FDDRC_SLANT_0_1 -104 0x2000 //RX_FDDRC_SLANT_0_2 -105 0x2000 //RX_FDDRC_SLANT_0_3 -106 0x5333 //RX_FDDRC_SLANT_1_0 -107 0x5333 //RX_FDDRC_SLANT_1_1 -108 0x5333 //RX_FDDRC_SLANT_1_2 -109 0x5333 //RX_FDDRC_SLANT_1_3 -110 0x0000 //RX_FDDRC_RESRV_0 -129 0x0026 //RX_SPK_VOL -130 0x0000 //RX_VOL_RESRV_0 -#VOL 3 -6 0x1000 //RX_TDDRC_ALPHA_UP_1 -7 0x1000 //RX_TDDRC_ALPHA_UP_2 -8 0x1000 //RX_TDDRC_ALPHA_UP_3 -9 0x1000 //RX_TDDRC_ALPHA_UP_4 -27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 -28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 -29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 -32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 -33 0x7000 //RX_TDDRC_LIMITER_THRD -34 0x0800 //RX_TDDRC_LIMITER_GAIN -112 0x0000 //RX_TDDRC_THRD_0 -113 0x0000 //RX_TDDRC_THRD_1 -114 0x1800 //RX_TDDRC_THRD_2 -115 0x1800 //RX_TDDRC_THRD_3 -116 0x3000 //RX_TDDRC_SLANT_0 -117 0x6E00 //RX_TDDRC_SLANT_1 -118 0x1000 //RX_TDDRC_ALPHA_UP_0 -119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 -120 0x0000 //RX_TDDRC_HMNC_FLAG -121 0x199A //RX_TDDRC_HMNC_GAIN -122 0x0001 //RX_TDDRC_SMT_FLAG -123 0x0CCD //RX_TDDRC_SMT_W -124 0x0275 //RX_TDDRC_DRC_GAIN -38 0x0020 //RX_FDEQ_SUBNUM -39 0x4848 //RX_FDEQ_GAIN_0 -40 0x4850 //RX_FDEQ_GAIN_1 -41 0x6478 //RX_FDEQ_GAIN_2 -42 0x8689 //RX_FDEQ_GAIN_3 -43 0x908F //RX_FDEQ_GAIN_4 -44 0x9495 //RX_FDEQ_GAIN_5 -45 0x989D //RX_FDEQ_GAIN_6 -46 0x9DA6 //RX_FDEQ_GAIN_7 -47 0xA895 //RX_FDEQ_GAIN_8 -48 0x8A8A //RX_FDEQ_GAIN_9 -49 0x8E78 //RX_FDEQ_GAIN_10 -50 0x7070 //RX_FDEQ_GAIN_11 -51 0x7680 //RX_FDEQ_GAIN_12 -52 0x787C //RX_FDEQ_GAIN_13 -53 0x8890 //RX_FDEQ_GAIN_14 -54 0x9CAC //RX_FDEQ_GAIN_15 -55 0x4848 //RX_FDEQ_GAIN_16 -56 0x4848 //RX_FDEQ_GAIN_17 -57 0x4848 //RX_FDEQ_GAIN_18 -58 0x4848 //RX_FDEQ_GAIN_19 -59 0x4848 //RX_FDEQ_GAIN_20 -60 0x4848 //RX_FDEQ_GAIN_21 -61 0x4848 //RX_FDEQ_GAIN_22 -62 0x4848 //RX_FDEQ_GAIN_23 -63 0x0202 //RX_FDEQ_BIN_0 -64 0x0202 //RX_FDEQ_BIN_1 -65 0x0302 //RX_FDEQ_BIN_2 -66 0x0304 //RX_FDEQ_BIN_3 -67 0x0405 //RX_FDEQ_BIN_4 -68 0x0506 //RX_FDEQ_BIN_5 -69 0x0708 //RX_FDEQ_BIN_6 -70 0x090A //RX_FDEQ_BIN_7 -71 0x0B0C //RX_FDEQ_BIN_8 -72 0x0D0E //RX_FDEQ_BIN_9 -73 0x1013 //RX_FDEQ_BIN_10 -74 0x1719 //RX_FDEQ_BIN_11 -75 0x1B1E //RX_FDEQ_BIN_12 -76 0x1E1E //RX_FDEQ_BIN_13 -77 0x1E28 //RX_FDEQ_BIN_14 -78 0x282C //RX_FDEQ_BIN_15 -79 0x0000 //RX_FDEQ_BIN_16 -80 0x0000 //RX_FDEQ_BIN_17 -81 0x0000 //RX_FDEQ_BIN_18 -82 0x0000 //RX_FDEQ_BIN_19 -83 0x0000 //RX_FDEQ_BIN_20 -84 0x0000 //RX_FDEQ_BIN_21 -85 0x0000 //RX_FDEQ_BIN_22 -86 0x0000 //RX_FDEQ_BIN_23 -87 0x4000 //RX_FDEQ_RESRV_0 -88 0x0320 //RX_FDEQ_RESRV_1 -89 0x0018 //RX_FDDRC_BAND_MARGIN_0 -90 0x0030 //RX_FDDRC_BAND_MARGIN_1 -91 0x0050 //RX_FDDRC_BAND_MARGIN_2 -92 0x0080 //RX_FDDRC_BAND_MARGIN_3 -93 0x0007 //RX_FDDRC_BLOCK_EXP -94 0x5000 //RX_FDDRC_THRD_2_0 -95 0x5000 //RX_FDDRC_THRD_2_1 -96 0x5000 //RX_FDDRC_THRD_2_2 -97 0x5000 //RX_FDDRC_THRD_2_3 -98 0x6400 //RX_FDDRC_THRD_3_0 -99 0x6400 //RX_FDDRC_THRD_3_1 -100 0x6400 //RX_FDDRC_THRD_3_2 -101 0x6400 //RX_FDDRC_THRD_3_3 -102 0x2000 //RX_FDDRC_SLANT_0_0 -103 0x2000 //RX_FDDRC_SLANT_0_1 -104 0x2000 //RX_FDDRC_SLANT_0_2 -105 0x2000 //RX_FDDRC_SLANT_0_3 -106 0x5333 //RX_FDDRC_SLANT_1_0 -107 0x5333 //RX_FDDRC_SLANT_1_1 -108 0x5333 //RX_FDDRC_SLANT_1_2 -109 0x5333 //RX_FDDRC_SLANT_1_3 -110 0x0000 //RX_FDDRC_RESRV_0 -129 0x003D //RX_SPK_VOL -130 0x0000 //RX_VOL_RESRV_0 -#VOL 4 -6 0x1000 //RX_TDDRC_ALPHA_UP_1 -7 0x1000 //RX_TDDRC_ALPHA_UP_2 -8 0x1000 //RX_TDDRC_ALPHA_UP_3 -9 0x1000 //RX_TDDRC_ALPHA_UP_4 -27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 -28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 -29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 -32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 -33 0x7000 //RX_TDDRC_LIMITER_THRD -34 0x0800 //RX_TDDRC_LIMITER_GAIN -112 0x0000 //RX_TDDRC_THRD_0 -113 0x0000 //RX_TDDRC_THRD_1 -114 0x1800 //RX_TDDRC_THRD_2 -115 0x1800 //RX_TDDRC_THRD_3 -116 0x3000 //RX_TDDRC_SLANT_0 -117 0x6E00 //RX_TDDRC_SLANT_1 -118 0x1000 //RX_TDDRC_ALPHA_UP_0 -119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 -120 0x0000 //RX_TDDRC_HMNC_FLAG -121 0x199A //RX_TDDRC_HMNC_GAIN -122 0x0001 //RX_TDDRC_SMT_FLAG -123 0x0CCD //RX_TDDRC_SMT_W -124 0x0275 //RX_TDDRC_DRC_GAIN -38 0x0020 //RX_FDEQ_SUBNUM -39 0x4848 //RX_FDEQ_GAIN_0 -40 0x4850 //RX_FDEQ_GAIN_1 -41 0x6478 //RX_FDEQ_GAIN_2 -42 0x8689 //RX_FDEQ_GAIN_3 -43 0x908F //RX_FDEQ_GAIN_4 -44 0x9495 //RX_FDEQ_GAIN_5 -45 0x989D //RX_FDEQ_GAIN_6 -46 0x9DA6 //RX_FDEQ_GAIN_7 -47 0xA895 //RX_FDEQ_GAIN_8 -48 0x8A8A //RX_FDEQ_GAIN_9 -49 0x8E78 //RX_FDEQ_GAIN_10 -50 0x7070 //RX_FDEQ_GAIN_11 -51 0x7680 //RX_FDEQ_GAIN_12 -52 0x787C //RX_FDEQ_GAIN_13 -53 0x8890 //RX_FDEQ_GAIN_14 -54 0x9CAC //RX_FDEQ_GAIN_15 -55 0x4848 //RX_FDEQ_GAIN_16 -56 0x4848 //RX_FDEQ_GAIN_17 -57 0x4848 //RX_FDEQ_GAIN_18 -58 0x4848 //RX_FDEQ_GAIN_19 -59 0x4848 //RX_FDEQ_GAIN_20 -60 0x4848 //RX_FDEQ_GAIN_21 -61 0x4848 //RX_FDEQ_GAIN_22 -62 0x4848 //RX_FDEQ_GAIN_23 -63 0x0202 //RX_FDEQ_BIN_0 -64 0x0202 //RX_FDEQ_BIN_1 -65 0x0302 //RX_FDEQ_BIN_2 -66 0x0304 //RX_FDEQ_BIN_3 -67 0x0405 //RX_FDEQ_BIN_4 -68 0x0506 //RX_FDEQ_BIN_5 -69 0x0708 //RX_FDEQ_BIN_6 -70 0x090A //RX_FDEQ_BIN_7 -71 0x0B0C //RX_FDEQ_BIN_8 -72 0x0D0E //RX_FDEQ_BIN_9 -73 0x1013 //RX_FDEQ_BIN_10 -74 0x1719 //RX_FDEQ_BIN_11 -75 0x1B1E //RX_FDEQ_BIN_12 -76 0x1E1E //RX_FDEQ_BIN_13 -77 0x1E28 //RX_FDEQ_BIN_14 -78 0x282C //RX_FDEQ_BIN_15 -79 0x0000 //RX_FDEQ_BIN_16 -80 0x0000 //RX_FDEQ_BIN_17 -81 0x0000 //RX_FDEQ_BIN_18 -82 0x0000 //RX_FDEQ_BIN_19 -83 0x0000 //RX_FDEQ_BIN_20 -84 0x0000 //RX_FDEQ_BIN_21 -85 0x0000 //RX_FDEQ_BIN_22 -86 0x0000 //RX_FDEQ_BIN_23 -87 0x4000 //RX_FDEQ_RESRV_0 -88 0x0320 //RX_FDEQ_RESRV_1 -89 0x0018 //RX_FDDRC_BAND_MARGIN_0 -90 0x0030 //RX_FDDRC_BAND_MARGIN_1 -91 0x0050 //RX_FDDRC_BAND_MARGIN_2 -92 0x0080 //RX_FDDRC_BAND_MARGIN_3 -93 0x0007 //RX_FDDRC_BLOCK_EXP -94 0x5000 //RX_FDDRC_THRD_2_0 -95 0x5000 //RX_FDDRC_THRD_2_1 -96 0x5000 //RX_FDDRC_THRD_2_2 -97 0x5000 //RX_FDDRC_THRD_2_3 -98 0x6400 //RX_FDDRC_THRD_3_0 -99 0x6400 //RX_FDDRC_THRD_3_1 -100 0x6400 //RX_FDDRC_THRD_3_2 -101 0x6400 //RX_FDDRC_THRD_3_3 -102 0x2000 //RX_FDDRC_SLANT_0_0 -103 0x2000 //RX_FDDRC_SLANT_0_1 -104 0x2000 //RX_FDDRC_SLANT_0_2 -105 0x2000 //RX_FDDRC_SLANT_0_3 -106 0x5333 //RX_FDDRC_SLANT_1_0 -107 0x5333 //RX_FDDRC_SLANT_1_1 -108 0x5333 //RX_FDDRC_SLANT_1_2 -109 0x5333 //RX_FDDRC_SLANT_1_3 -110 0x0000 //RX_FDDRC_RESRV_0 -129 0x0060 //RX_SPK_VOL -130 0x0000 //RX_VOL_RESRV_0 -#VOL 5 -6 0x1000 //RX_TDDRC_ALPHA_UP_1 -7 0x1000 //RX_TDDRC_ALPHA_UP_2 -8 0x1000 //RX_TDDRC_ALPHA_UP_3 -9 0x1000 //RX_TDDRC_ALPHA_UP_4 -27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 -28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 -29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 -32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 -33 0x7000 //RX_TDDRC_LIMITER_THRD -34 0x0800 //RX_TDDRC_LIMITER_GAIN -112 0x0000 //RX_TDDRC_THRD_0 -113 0x0000 //RX_TDDRC_THRD_1 -114 0x1800 //RX_TDDRC_THRD_2 -115 0x1800 //RX_TDDRC_THRD_3 -116 0x3000 //RX_TDDRC_SLANT_0 -117 0x6E00 //RX_TDDRC_SLANT_1 -118 0x1000 //RX_TDDRC_ALPHA_UP_0 -119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 -120 0x0000 //RX_TDDRC_HMNC_FLAG -121 0x199A //RX_TDDRC_HMNC_GAIN -122 0x0001 //RX_TDDRC_SMT_FLAG -123 0x0CCD //RX_TDDRC_SMT_W -124 0x0275 //RX_TDDRC_DRC_GAIN -38 0x0020 //RX_FDEQ_SUBNUM -39 0x4848 //RX_FDEQ_GAIN_0 -40 0x4850 //RX_FDEQ_GAIN_1 -41 0x6478 //RX_FDEQ_GAIN_2 -42 0x8689 //RX_FDEQ_GAIN_3 -43 0x908F //RX_FDEQ_GAIN_4 -44 0x9495 //RX_FDEQ_GAIN_5 -45 0x989D //RX_FDEQ_GAIN_6 -46 0x9DA6 //RX_FDEQ_GAIN_7 -47 0xA895 //RX_FDEQ_GAIN_8 -48 0x8A8A //RX_FDEQ_GAIN_9 -49 0x8E78 //RX_FDEQ_GAIN_10 -50 0x7070 //RX_FDEQ_GAIN_11 -51 0x7680 //RX_FDEQ_GAIN_12 -52 0x787C //RX_FDEQ_GAIN_13 -53 0x8890 //RX_FDEQ_GAIN_14 -54 0x9CAC //RX_FDEQ_GAIN_15 -55 0x4848 //RX_FDEQ_GAIN_16 -56 0x4848 //RX_FDEQ_GAIN_17 -57 0x4848 //RX_FDEQ_GAIN_18 -58 0x4848 //RX_FDEQ_GAIN_19 -59 0x4848 //RX_FDEQ_GAIN_20 -60 0x4848 //RX_FDEQ_GAIN_21 -61 0x4848 //RX_FDEQ_GAIN_22 -62 0x4848 //RX_FDEQ_GAIN_23 -63 0x0202 //RX_FDEQ_BIN_0 -64 0x0202 //RX_FDEQ_BIN_1 -65 0x0302 //RX_FDEQ_BIN_2 -66 0x0304 //RX_FDEQ_BIN_3 -67 0x0405 //RX_FDEQ_BIN_4 -68 0x0506 //RX_FDEQ_BIN_5 -69 0x0708 //RX_FDEQ_BIN_6 -70 0x090A //RX_FDEQ_BIN_7 -71 0x0B0C //RX_FDEQ_BIN_8 -72 0x0D0E //RX_FDEQ_BIN_9 -73 0x1013 //RX_FDEQ_BIN_10 -74 0x1719 //RX_FDEQ_BIN_11 -75 0x1B1E //RX_FDEQ_BIN_12 -76 0x1E1E //RX_FDEQ_BIN_13 -77 0x1E28 //RX_FDEQ_BIN_14 -78 0x282C //RX_FDEQ_BIN_15 -79 0x0000 //RX_FDEQ_BIN_16 -80 0x0000 //RX_FDEQ_BIN_17 -81 0x0000 //RX_FDEQ_BIN_18 -82 0x0000 //RX_FDEQ_BIN_19 -83 0x0000 //RX_FDEQ_BIN_20 -84 0x0000 //RX_FDEQ_BIN_21 -85 0x0000 //RX_FDEQ_BIN_22 -86 0x0000 //RX_FDEQ_BIN_23 -87 0x4000 //RX_FDEQ_RESRV_0 -88 0x0320 //RX_FDEQ_RESRV_1 -89 0x0018 //RX_FDDRC_BAND_MARGIN_0 -90 0x0030 //RX_FDDRC_BAND_MARGIN_1 -91 0x0050 //RX_FDDRC_BAND_MARGIN_2 -92 0x0080 //RX_FDDRC_BAND_MARGIN_3 -93 0x0007 //RX_FDDRC_BLOCK_EXP -94 0x5000 //RX_FDDRC_THRD_2_0 -95 0x5000 //RX_FDDRC_THRD_2_1 -96 0x5000 //RX_FDDRC_THRD_2_2 -97 0x5000 //RX_FDDRC_THRD_2_3 -98 0x6400 //RX_FDDRC_THRD_3_0 -99 0x6400 //RX_FDDRC_THRD_3_1 -100 0x6400 //RX_FDDRC_THRD_3_2 -101 0x6400 //RX_FDDRC_THRD_3_3 -102 0x2000 //RX_FDDRC_SLANT_0_0 -103 0x2000 //RX_FDDRC_SLANT_0_1 -104 0x2000 //RX_FDDRC_SLANT_0_2 -105 0x2000 //RX_FDDRC_SLANT_0_3 -106 0x5333 //RX_FDDRC_SLANT_1_0 -107 0x5333 //RX_FDDRC_SLANT_1_1 -108 0x5333 //RX_FDDRC_SLANT_1_2 -109 0x5333 //RX_FDDRC_SLANT_1_3 -110 0x0000 //RX_FDDRC_RESRV_0 -129 0x0099 //RX_SPK_VOL -130 0x0000 //RX_VOL_RESRV_0 -#VOL 6 -6 0x1000 //RX_TDDRC_ALPHA_UP_1 -7 0x1000 //RX_TDDRC_ALPHA_UP_2 -8 0x1000 //RX_TDDRC_ALPHA_UP_3 -9 0x1000 //RX_TDDRC_ALPHA_UP_4 -27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 -28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 -29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 -32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 -33 0x7000 //RX_TDDRC_LIMITER_THRD -34 0x0800 //RX_TDDRC_LIMITER_GAIN -112 0x0000 //RX_TDDRC_THRD_0 -113 0x0000 //RX_TDDRC_THRD_1 -114 0x1800 //RX_TDDRC_THRD_2 -115 0x1800 //RX_TDDRC_THRD_3 -116 0x3000 //RX_TDDRC_SLANT_0 -117 0x6E00 //RX_TDDRC_SLANT_1 -118 0x1000 //RX_TDDRC_ALPHA_UP_0 -119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 -120 0x0000 //RX_TDDRC_HMNC_FLAG -121 0x199A //RX_TDDRC_HMNC_GAIN -122 0x0001 //RX_TDDRC_SMT_FLAG -123 0x0CCD //RX_TDDRC_SMT_W -124 0x0275 //RX_TDDRC_DRC_GAIN -38 0x0020 //RX_FDEQ_SUBNUM -39 0x4848 //RX_FDEQ_GAIN_0 -40 0x4850 //RX_FDEQ_GAIN_1 -41 0x6478 //RX_FDEQ_GAIN_2 -42 0x8689 //RX_FDEQ_GAIN_3 -43 0x908F //RX_FDEQ_GAIN_4 -44 0x9495 //RX_FDEQ_GAIN_5 -45 0x989D //RX_FDEQ_GAIN_6 -46 0x9DA6 //RX_FDEQ_GAIN_7 -47 0xA895 //RX_FDEQ_GAIN_8 -48 0x8A8A //RX_FDEQ_GAIN_9 -49 0x8E78 //RX_FDEQ_GAIN_10 -50 0x7070 //RX_FDEQ_GAIN_11 -51 0x7680 //RX_FDEQ_GAIN_12 -52 0x787C //RX_FDEQ_GAIN_13 -53 0x8890 //RX_FDEQ_GAIN_14 -54 0x9CAC //RX_FDEQ_GAIN_15 -55 0x4848 //RX_FDEQ_GAIN_16 -56 0x4848 //RX_FDEQ_GAIN_17 -57 0x4848 //RX_FDEQ_GAIN_18 -58 0x4848 //RX_FDEQ_GAIN_19 -59 0x4848 //RX_FDEQ_GAIN_20 -60 0x4848 //RX_FDEQ_GAIN_21 -61 0x4848 //RX_FDEQ_GAIN_22 -62 0x4848 //RX_FDEQ_GAIN_23 -63 0x0202 //RX_FDEQ_BIN_0 -64 0x0202 //RX_FDEQ_BIN_1 -65 0x0302 //RX_FDEQ_BIN_2 -66 0x0304 //RX_FDEQ_BIN_3 -67 0x0405 //RX_FDEQ_BIN_4 -68 0x0506 //RX_FDEQ_BIN_5 -69 0x0708 //RX_FDEQ_BIN_6 -70 0x090A //RX_FDEQ_BIN_7 -71 0x0B0C //RX_FDEQ_BIN_8 -72 0x0D0E //RX_FDEQ_BIN_9 -73 0x1013 //RX_FDEQ_BIN_10 -74 0x1719 //RX_FDEQ_BIN_11 -75 0x1B1E //RX_FDEQ_BIN_12 -76 0x1E1E //RX_FDEQ_BIN_13 -77 0x1E28 //RX_FDEQ_BIN_14 -78 0x282C //RX_FDEQ_BIN_15 -79 0x0000 //RX_FDEQ_BIN_16 -80 0x0000 //RX_FDEQ_BIN_17 -81 0x0000 //RX_FDEQ_BIN_18 -82 0x0000 //RX_FDEQ_BIN_19 -83 0x0000 //RX_FDEQ_BIN_20 -84 0x0000 //RX_FDEQ_BIN_21 -85 0x0000 //RX_FDEQ_BIN_22 -86 0x0000 //RX_FDEQ_BIN_23 -87 0x4000 //RX_FDEQ_RESRV_0 -88 0x0320 //RX_FDEQ_RESRV_1 -89 0x0018 //RX_FDDRC_BAND_MARGIN_0 -90 0x0030 //RX_FDDRC_BAND_MARGIN_1 -91 0x0050 //RX_FDDRC_BAND_MARGIN_2 -92 0x0080 //RX_FDDRC_BAND_MARGIN_3 -93 0x0007 //RX_FDDRC_BLOCK_EXP -94 0x5000 //RX_FDDRC_THRD_2_0 -95 0x5000 //RX_FDDRC_THRD_2_1 -96 0x5000 //RX_FDDRC_THRD_2_2 -97 0x5000 //RX_FDDRC_THRD_2_3 -98 0x6400 //RX_FDDRC_THRD_3_0 -99 0x6400 //RX_FDDRC_THRD_3_1 -100 0x6400 //RX_FDDRC_THRD_3_2 -101 0x6400 //RX_FDDRC_THRD_3_3 -102 0x2000 //RX_FDDRC_SLANT_0_0 -103 0x2000 //RX_FDDRC_SLANT_0_1 -104 0x2000 //RX_FDDRC_SLANT_0_2 -105 0x2000 //RX_FDDRC_SLANT_0_3 -106 0x5333 //RX_FDDRC_SLANT_1_0 -107 0x5333 //RX_FDDRC_SLANT_1_1 -108 0x5333 //RX_FDDRC_SLANT_1_2 -109 0x5333 //RX_FDDRC_SLANT_1_3 -110 0x0000 //RX_FDDRC_RESRV_0 -129 0x0100 //RX_SPK_VOL -130 0x0000 //RX_VOL_RESRV_0 - -#CASE_NAME HANDSET-HANDSET_HAC-VOICE_GENERIC-NB -#PARAM_TYPE TX+RX -#TOTAL_CUSTOM_STEP 7 -#TX -0 0x0000 //TX_OPERATION_MODE_0 -1 0x0000 //TX_OPERATION_MODE_1 -2 0x0036 //TX_PATCH_REG -3 0x6F7E //TX_SENDFUNC_MODE_0 -4 0x0001 //TX_SENDFUNC_MODE_1 -5 0x0002 //TX_NUM_MIC -6 0x0000 //TX_SAMPLINGFREQ_SIG -7 0x0000 //TX_SAMPLINGFREQ_PROC -8 0x000A //TX_FRAME_SZ_SIG -9 0x000A //TX_FRAME_SZ -10 0x0000 //TX_DELAY_OPT -11 0x0028 //TX_MAX_TAIL_LENGTH -12 0x0001 //TX_NUM_LOUTCHN -13 0x0001 //TX_MAXNUM_AECREF -14 0x0000 //TX_DBG_FUNC_REG -15 0x0000 //TX_DBG_FUNC_REG1 -16 0x0000 //TX_SYS_RESRV_0 -17 0x0000 //TX_SYS_RESRV_1 -18 0x0000 //TX_SYS_RESRV_2 -19 0x0000 //TX_SYS_RESRV_3 -20 0x0000 //TX_DIST2REF0 -21 0x009D //TX_DIST2REF1 -22 0x0000 //TX_DIST2REF_02 -23 0x0000 //TX_DIST2REF_03 -24 0x0000 //TX_DIST2REF_04 -25 0x0000 //TX_DIST2REF_05 -26 0x0000 //TX_MMIC -27 0x1000 //TX_PGA_0 -28 0x1000 //TX_PGA_1 -29 0x1000 //TX_PGA_2 -30 0x0000 //TX_PGA_3 -31 0x0000 //TX_PGA_4 -32 0x0000 //TX_PGA_5 -33 0x0000 //TX_MIC_PAIRS -34 0x0000 //TX_MIC_PAIRS_HS -35 0x0002 //TX_MICS_FOR_BF -36 0x0000 //TX_MIC_PAIRS_FORL1 -37 0x0002 //TX_MICS_OF_PAIR0 -38 0x0002 //TX_MICS_OF_PAIR1 -39 0x0002 //TX_MICS_OF_PAIR2 -40 0x0002 //TX_MICS_OF_PAIR3 -41 0x0000 //TX_MIC_DATA_SRC0 -42 0x0002 //TX_MIC_DATA_SRC1 -43 0x0001 //TX_MIC_DATA_SRC2 -44 0x0000 //TX_MIC_DATA_SRC3 -45 0x0000 //TX_MIC_PAIR_CH_04 -46 0x0000 //TX_MIC_PAIR_CH_05 -47 0x0000 //TX_MIC_PAIR_CH_10 -48 0x0000 //TX_MIC_PAIR_CH_11 -49 0x0000 //TX_MIC_PAIR_CH_12 -50 0x0000 //TX_MIC_PAIR_CH_13 -51 0x0000 //TX_MIC_PAIR_CH_14 -52 0x05DC //TX_HD_BIN_MASK -53 0x0010 //TX_HD_SUBAND_MASK -54 0x19A1 //TX_HD_FRAME_AVG_MASK -55 0x0320 //TX_HD_MIN_FRQ -56 0x1000 //TX_HD_ALPHA_PSD -57 0x1100 //TX_T_PHPR1 -58 0x0000 //TX_T_PHPR2 -59 0x0000 //TX_T_PTPR -60 0x0000 //TX_T_PNPR -61 0x0000 //TX_T_PAPR1 -62 0xEE6C //TX_T_PSDVAT -63 0x0800 //TX_CNT -64 0x4000 //TX_ANTI_HOWL_GAIN -65 0x0001 //TX_MICFORBFMARK_0 -66 0x0001 //TX_MICFORBFMARK_1 -67 0x0001 //TX_MICFORBFMARK_2 -68 0x0001 //TX_MICFORBFMARK_3 -69 0x0001 //TX_MICFORBFMARK_4 -70 0x0001 //TX_MICFORBFMARK_5 -71 0x0000 //TX_DIST2REF_10 -72 0x3A66 //TX_DIST2REF_11 -73 0x0000 //TX_DIST2REF2 -74 0x0000 //TX_DIST2REF_13 -75 0x0000 //TX_DIST2REF_14 -76 0x0000 //TX_DIST2REF_15 -77 0x0000 //TX_DIST2REF_20 -78 0x0000 //TX_DIST2REF_21 -79 0x0000 //TX_DIST2REF_22 -80 0x0000 //TX_DIST2REF_23 -81 0x0000 //TX_DIST2REF_24 -82 0x0000 //TX_DIST2REF_25 -83 0x0000 //TX_DIST2REF_30 -84 0x0000 //TX_DIST2REF_31 -85 0x0000 //TX_DIST2REF_32 -86 0x0000 //TX_DIST2REF_33 -87 0x0000 //TX_DIST2REF_34 -88 0x0000 //TX_DIST2REF_35 -89 0x0000 //TX_MIC_LOC_00 -90 0x0000 //TX_MIC_LOC_01 -91 0x0000 //TX_MIC_LOC_02 -92 0x0000 //TX_MIC_LOC_03 -93 0x0000 //TX_MIC_LOC_04 -94 0x0000 //TX_MIC_LOC_05 -95 0x0000 //TX_MIC_LOC_10 -96 0x0000 //TX_MIC_LOC_11 -97 0x0000 //TX_MIC_LOC_12 -98 0x0000 //TX_MIC_LOC_13 -99 0x0000 //TX_MIC_LOC_14 -100 0x0000 //TX_MIC_LOC_15 -101 0x0000 //TX_MIC_LOC_20 -102 0x0000 //TX_MIC_LOC_21 -103 0x0000 //TX_MIC_LOC_22 -104 0x0000 //TX_MIC_LOC_23 -105 0x0000 //TX_MIC_LOC_24 -106 0x0000 //TX_MIC_LOC_25 -107 0x0200 //TX_MIC_REFBLK_VOLUME -108 0x0AAC //TX_MIC_BLOCK_VOLUME -109 0x0000 //TX_INVERSE_MASK -110 0x0000 //TX_ADCS_MASK -111 0x04D0 //TX_ADCS_GAIN -112 0x4000 //TX_NFC_GAINFAC -113 0x0000 //TX_MAINMIC_BLKFACTOR -114 0x0000 //TX_REFMIC_BLKFACTOR -115 0x0000 //TX_BLMIC_BLKFACTOR -116 0x0000 //TX_BRMIC_BLKFACTOR -117 0x0031 //TX_MICBLK_START_BIN -118 0x0060 //TX_MICBLK_END_BIN -119 0x0015 //TX_MICBLK_FE_HOLD -120 0xFFF2 //TX_MICBLK_MR_EXP_TH -121 0xFFF2 //TX_MICBLK_LR_EXP_TH -122 0x0000 //TX_FENE_HOLD -123 0x4000 //TX_FE_ENER_TH_MTS -124 0x0004 //TX_FE_ENER_TH_EXP -125 0x6000 //TX_C_POST_FLT_MIC_MAINBLK -126 0x6000 //TX_C_POST_FLT_MIC_REFBLK -127 0x0010 //TX_MIC_BLOCK_N -128 0x7646 //TX_A_HP -129 0x4000 //TX_B_PE -130 0x1800 //TX_THR_PITCH_DET_0 -131 0x1000 //TX_THR_PITCH_DET_1 -132 0x0800 //TX_THR_PITCH_DET_2 -133 0x0008 //TX_PITCH_BFR_LEN -134 0x0003 //TX_SBD_PITCH_DET -135 0x0050 //TX_TD_AEC_L -136 0x4000 //TX_MU0_UNP_TD_AEC -137 0x1000 //TX_MU0_PTD_TD_AEC -138 0x0000 //TX_PP_RESRV_0 -139 0x2A94 //TX_PP_RESRV_1 -140 0x55F0 //TX_PP_RESRV_2 -141 0x0000 //TX_PP_RESRV_3 -142 0x0000 //TX_PP_RESRV_4 -143 0x0000 //TX_PP_RESRV_5 -144 0x0000 //TX_PP_RESRV_6 -145 0x0000 //TX_PP_RESRV_7 -146 0x0028 //TX_TAIL_LENGTH -147 0x0800 //TX_AEC_REF_GAIN_0 -148 0x0800 //TX_AEC_REF_GAIN_1 -149 0x0800 //TX_AEC_REF_GAIN_2 -150 0x6000 //TX_EAD_THR -151 0x2000 //TX_THR_RE_EST -152 0x0100 //TX_MIN_EQ_RE_EST_0 -153 0x0100 //TX_MIN_EQ_RE_EST_1 -154 0x0100 //TX_MIN_EQ_RE_EST_2 -155 0x0200 //TX_MIN_EQ_RE_EST_3 -156 0x0200 //TX_MIN_EQ_RE_EST_4 -157 0x0200 //TX_MIN_EQ_RE_EST_5 -158 0x0200 //TX_MIN_EQ_RE_EST_6 -159 0x0200 //TX_MIN_EQ_RE_EST_7 -160 0x1000 //TX_MIN_EQ_RE_EST_8 -161 0x1000 //TX_MIN_EQ_RE_EST_9 -162 0x1000 //TX_MIN_EQ_RE_EST_10 -163 0x0400 //TX_MIN_EQ_RE_EST_11 -164 0x1000 //TX_MIN_EQ_RE_EST_12 -165 0x3000 //TX_LAMBDA_RE_EST -166 0x1000 //TX_LAMBDA_CB_NLE -167 0x0400 //TX_C_POST_FLT -168 0x4000 //TX_GAIN_NP -169 0x003C //TX_SE_HOLD_N -170 0x0046 //TX_DT_HOLD_N -171 0x03E8 //TX_DT2_HOLD_N -172 0x6666 //TX_AEC_RESRV_0 -173 0x0000 //TX_AEC_RESRV_1 -174 0x0014 //TX_AEC_RESRV_2 -175 0x0000 //TX_MIC_DELAY_LENGTH -176 0x0000 //TX_REF_DELAY_LENGTH -177 0x0000 //TX_ADD_LINEIN_GAINL -178 0x0000 //TX_ADD_LINEIN_GAINH -179 0x0000 //TX_MIN_EQ_RE_EST_14 -180 0x0000 //TX_DTD_THR1_8 -181 0x7FFF //TX_DTD_THR2_8 -182 0x0000 //TX_DTD_MIC_BLK2 -183 0x0008 //TX_FRQ_LIN_LEN -184 0x7FFF //TX_FRQ_AEC_LEN_RHO -185 0x6000 //TX_MU0_UNP_FRQ_AEC -186 0x4000 //TX_MU0_PTD_FRQ_AEC -187 0x000A //TX_MINENOISETH -188 0x0800 //TX_MU0_RE_EST -189 0x0001 //TX_AEC_NUM_CH -190 0x0000 //TX_BIGECHOATTENUATION_MAX -191 0x2000 //TX_A_POST_FLT_MICBLK -192 0x0000 //TX_BLKENERTH -193 0x0000 //TX_BLKENERHIGHTH -194 0x0000 //TX_NORMENERTH -195 0x0000 //TX_NORMENERHIGHTH -196 0x0000 //TX_NORMENERHIGHTHL -197 0x7B00 //TX_DTD_THR1_0 -198 0x7B00 //TX_DTD_THR1_1 -199 0x7B00 //TX_DTD_THR1_2 -200 0x7B00 //TX_DTD_THR1_3 -201 0x7B00 //TX_DTD_THR1_4 -202 0x7B00 //TX_DTD_THR1_5 -203 0x7B00 //TX_DTD_THR1_6 -204 0x1000 //TX_DTD_THR2_0 -205 0x1000 //TX_DTD_THR2_1 -206 0x1000 //TX_DTD_THR2_2 -207 0x1000 //TX_DTD_THR2_3 -208 0x1000 //TX_DTD_THR2_4 -209 0x1000 //TX_DTD_THR2_5 -210 0x1000 //TX_DTD_THR2_6 -211 0x7FFF //TX_DTD_THR3 -212 0x0000 //TX_SPK_CUT_K -213 0x0FA0 //TX_DT_CUT_K -214 0x0100 //TX_DT_CUT_THR -215 0x04EB //TX_COMFORT_G -216 0x01F4 //TX_POWER_YOUT_TH -217 0x4000 //TX_FDPFGAINECHO -218 0x0000 //TX_DTD_HD_THR -219 0x0000 //TX_SPK_CUT_K_S -220 0x0000 //TX_DTD_MIC_BLK -221 0x0400 //TX_ADPT_STRICT_L -222 0x0200 //TX_ADPT_STRICT_H -223 0x0000 //TX_RATIO_DT_L_TH_LOW -224 0x0000 //TX_RATIO_DT_H_TH_LOW -225 0x0000 //TX_RATIO_DT_L_TH_HIGH -226 0x0000 //TX_RATIO_DT_H_TH_HIGH -227 0x0000 //TX_RATIO_DT_L0_TH -228 0x2000 //TX_B_POST_FILT_ECHO_L -229 0x2000 //TX_B_POST_FILT_ECHO_H -230 0x0200 //TX_MIN_G_CTRL_ECHO -231 0x7FFF //TX_B_LESSCUT_RTO_ECHO -232 0x0000 //TX_EPD_OFFSET_00 -233 0x0000 //TX_EPD_OFFST_01 -234 0x0000 //TX_RATIO_DT_L0_TH_HIGH -235 0x3A98 //TX_RATIO_DT_H_TH_CUT -236 0x7FFF //TX_MIN_EQ_RE_EST_13 -237 0x0000 //TX_DTD_THR1_7 -238 0x0000 //TX_DTD_THR2_7 -239 0x0800 //TX_DT_RESRV_7 -240 0x0800 //TX_DT_RESRV_8 -241 0x0000 //TX_DT_RESRV_9 -242 0xF800 //TX_THR_SN_EST_0 -243 0xF800 //TX_THR_SN_EST_1 -244 0xFA00 //TX_THR_SN_EST_2 -245 0xF900 //TX_THR_SN_EST_3 -246 0xF900 //TX_THR_SN_EST_4 -247 0xFA00 //TX_THR_SN_EST_5 -248 0xF800 //TX_THR_SN_EST_6 -249 0xF700 //TX_THR_SN_EST_7 -250 0x0000 //TX_DELTA_THR_SN_EST_0 -251 0x01A0 //TX_DELTA_THR_SN_EST_1 -252 0x0100 //TX_DELTA_THR_SN_EST_2 -253 0x0200 //TX_DELTA_THR_SN_EST_3 -254 0x01A0 //TX_DELTA_THR_SN_EST_4 -255 0x0100 //TX_DELTA_THR_SN_EST_5 -256 0x0000 //TX_DELTA_THR_SN_EST_6 -257 0x0200 //TX_DELTA_THR_SN_EST_7 -258 0x4000 //TX_LAMBDA_NN_EST_0 -259 0x4000 //TX_LAMBDA_NN_EST_1 -260 0x3000 //TX_LAMBDA_NN_EST_2 -261 0x4000 //TX_LAMBDA_NN_EST_3 -262 0x3000 //TX_LAMBDA_NN_EST_4 -263 0x3000 //TX_LAMBDA_NN_EST_5 -264 0x4000 //TX_LAMBDA_NN_EST_6 -265 0x4000 //TX_LAMBDA_NN_EST_7 -266 0x0400 //TX_N_SN_EST -267 0x001E //TX_INBEAM_T -268 0x0041 //TX_INBEAMHOLDT -269 0x2000 //TX_G_STRICT -270 0x0000 //TX_EQ_THR_BF -271 0x799A //TX_LAMBDA_EQ_BF -272 0x3000 //TX_NE_RTO_TH -273 0x1000 //TX_NE_RTO_TH_L -274 0x3000 //TX_MAINREFRTOH_TH_H -275 0x1000 //TX_MAINREFRTOH_TH_L -276 0x3000 //TX_MAINREFRTO_TH_H -277 0x1000 //TX_MAINREFRTO_TH_L -278 0x0200 //TX_MAINREFRTO_TH_EQ -279 0x4000 //TX_B_POST_FLT_0 -280 0x4000 //TX_B_POST_FLT_1 -281 0x0014 //TX_NS_LVL_CTRL_0 -282 0x001B //TX_NS_LVL_CTRL_1 -283 0x0019 //TX_NS_LVL_CTRL_2 -284 0x0017 //TX_NS_LVL_CTRL_3 -285 0x0017 //TX_NS_LVL_CTRL_4 -286 0x0019 //TX_NS_LVL_CTRL_5 -287 0x0014 //TX_NS_LVL_CTRL_6 -288 0x0010 //TX_NS_LVL_CTRL_7 -289 0x0010 //TX_MIN_GAIN_S_0 -290 0x000C //TX_MIN_GAIN_S_1 -291 0x000C //TX_MIN_GAIN_S_2 -292 0x0010 //TX_MIN_GAIN_S_3 -293 0x0010 //TX_MIN_GAIN_S_4 -294 0x000C //TX_MIN_GAIN_S_5 -295 0x0014 //TX_MIN_GAIN_S_6 -296 0x0014 //TX_MIN_GAIN_S_7 -297 0x5000 //TX_NMOS_SUP -298 0x0000 //TX_NS_MAX_PRI_SNR_TH -299 0x0000 //TX_NMOS_SUP_MENSA -300 0x4000 //TX_SNRI_SUP_0 -301 0x4000 //TX_SNRI_SUP_1 -302 0x4000 //TX_SNRI_SUP_2 -303 0x4000 //TX_SNRI_SUP_3 -304 0x4000 //TX_SNRI_SUP_4 -305 0x4000 //TX_SNRI_SUP_5 -306 0x7FFF //TX_SNRI_SUP_6 -307 0x3000 //TX_SNRI_SUP_7 -308 0x3000 //TX_THR_LFNS -309 0x001A //TX_G_LFNS -310 0x09C4 //TX_GAIN0_NTH -311 0x000A //TX_MUSIC_MORENS -312 0x7FFF //TX_A_POST_FILT_0 -313 0x2000 //TX_A_POST_FILT_1 -314 0x2000 //TX_A_POST_FILT_S_0 -315 0x7000 //TX_A_POST_FILT_S_1 -316 0x6000 //TX_A_POST_FILT_S_2 -317 0x5000 //TX_A_POST_FILT_S_3 -318 0x2000 //TX_A_POST_FILT_S_4 -319 0x6000 //TX_A_POST_FILT_S_5 -320 0x2000 //TX_A_POST_FILT_S_6 -321 0x7000 //TX_A_POST_FILT_S_7 -322 0x4000 //TX_B_POST_FILT_0 -323 0x4000 //TX_B_POST_FILT_1 -324 0x7FFF //TX_B_POST_FILT_2 -325 0x5000 //TX_B_POST_FILT_3 -326 0x7FFF //TX_B_POST_FILT_4 -327 0x7FFF //TX_B_POST_FILT_5 -328 0x4000 //TX_B_POST_FILT_6 -329 0x2000 //TX_B_POST_FILT_7 -330 0x7FFF //TX_B_LESSCUT_RTO_S_0 -331 0x7FFF //TX_B_LESSCUT_RTO_S_1 -332 0x7FFF //TX_B_LESSCUT_RTO_S_2 -333 0x7FFF //TX_B_LESSCUT_RTO_S_3 -334 0x7FFF //TX_B_LESSCUT_RTO_S_4 -335 0x7FFF //TX_B_LESSCUT_RTO_S_5 -336 0x7FFF //TX_B_LESSCUT_RTO_S_6 -337 0x7FFF //TX_B_LESSCUT_RTO_S_7 -338 0x7E14 //TX_LAMBDA_PFILT -339 0x7C29 //TX_LAMBDA_PFILT_S_0 -340 0x7C29 //TX_LAMBDA_PFILT_S_1 -341 0x7200 //TX_LAMBDA_PFILT_S_2 -342 0x7900 //TX_LAMBDA_PFILT_S_3 -343 0x7400 //TX_LAMBDA_PFILT_S_4 -344 0x7200 //TX_LAMBDA_PFILT_S_5 -345 0x7C29 //TX_LAMBDA_PFILT_S_6 -346 0x7C29 //TX_LAMBDA_PFILT_S_7 -347 0x0200 //TX_K_PEPPER -348 0x0800 //TX_A_PEPPER -349 0x0C80 //TX_K_PEPPER_HF -350 0x0400 //TX_A_PEPPER_HF -351 0x0001 //TX_HMNC_BST_FLG -352 0x4000 //TX_HMNC_BST_THR -353 0x0800 //TX_DT_BINVAD_TH_0 -354 0x0800 //TX_DT_BINVAD_TH_1 -355 0x0800 //TX_DT_BINVAD_TH_2 -356 0x0800 //TX_DT_BINVAD_TH_3 -357 0x0000 //TX_DT_BINVAD_ENDF -358 0x1000 //TX_C_POST_FLT_DT -359 0x7FFF //TX_NS_B_POST_FLT_LESSCUT -360 0x0100 //TX_DT_BOOST -361 0x0000 //TX_BF_SGRAD_FLG -362 0x0005 //TX_BF_DVG_TH -363 0x001E //TX_SN_C_F -364 0x0000 //TX_K_APT -365 0x0001 //TX_NOISEDET -366 0x0190 //TX_NDETCT -367 0x0004 //TX_NOISE_TH_0 -368 0x1B58 //TX_NOISE_TH_0_2 -369 0x2134 //TX_NOISE_TH_0_3 -370 0x0320 //TX_NOISE_TH_1 -371 0x022C //TX_NOISE_TH_2 -372 0x2710 //TX_NOISE_TH_3 -373 0x6B6C //TX_NOISE_TH_4 -374 0x7FFF //TX_NOISE_TH_5 -375 0x7FFF //TX_NOISE_TH_5_2 -376 0x0000 //TX_NOISE_TH_5_3 -377 0x0000 //TX_NOISE_TH_5_4 -378 0x07D0 //TX_NOISE_TH_6 -379 0x0004 //TX_MINENOISE_TH -380 0x4000 //TX_MINENOISE_MIC0_TH_MTS -381 0xFFEE //TX_MINENOISE_MIC0_TH_EXP -382 0x6000 //TX_MINENOISE_MIC0_S_TH_MTS -383 0xFFF3 //TX_MINENOISE_MIC0_S_TH_EXP -384 0x00A5 //TX_OUT_ENER_S_TH_CLEAN -385 0x00A5 //TX_OUT_ENER_S_TH_LESSCLEAN -386 0x00A5 //TX_OUT_ENER_S_TH_NOISY -387 0x0029 //TX_OUT_ENER_TH_NOISE -388 0x00CE //TX_OUT_ENER_TH_SPEECH -389 0x2000 //TX_SN_NPB_GAIN -390 0x0000 //TX_NN_NPB_GAIN -391 0x0000 //TX_CSX_ALPHA_0 -392 0x0000 //TX_CSX_ALPHA_1 -393 0x0000 //TX_CSX_ALPHA_2 -394 0x0000 //TX_CSX_ALPHA_3 -395 0x0800 //TX_MU_ARSP_EST -396 0x00C8 //TX_P_OUTBEAM_MIN_TH -397 0x0002 //TX_EXTRA_NS_L -398 0x0800 //TX_EXTRA_NS_A -399 0x0005 //TX_VR_NOISE_FLOOR_TH -400 0x0148 //TX_MIN_G_LOW300HZ -401 0x0001 //TX_MAXLEVEL_CNG -402 0x00B4 //TX_STN_NOISE_TH -403 0x4000 //TX_POST_MASK_SUP -404 0x7FFF //TX_POST_MASK_ADJUST -405 0x000A //TX_NS_ENOISE_MIC0_TH -406 0x0004 //TX_MINENOISE_MIC0_TH -407 0x0014 //TX_MINENOISE_MIC0_S_TH -408 0x4900 //TX_MIN_G_CTRL_SSNS -409 0x0400 //TX_METAL_RTO_THR -410 0x0FA0 //TX_NS_FP_K_METAL -411 0x3A98 //TX_NOISEDET_BOOST_TH -412 0x0FA0 //TX_NSMOOTH_TH -413 0x0000 //TX_NS_RESRV_8 -414 0x1800 //TX_RHO_UPB -415 0x2328 //TX_N_HOLD_HS -416 0x006E //TX_N_RHO_BFR0 -417 0x7FFF //TX_LAMBDA_ARSP_EST -418 0x0100 //TX_EXTRA_GAIN_MICBLOCK -419 0x0333 //TX_THR_STD_NSR -420 0x019A //TX_THR_STD_PLH -421 0x03E8 //TX_N_HOLD_STD -422 0x0066 //TX_THR_STD_RHO -423 0x4000 //TX_BF_RESET_THR_HS -424 0x0CCD //TX_SB_RTO_MEAN_TH -425 0x0280 //TX_SB_RHO_MEAN_TH_NTALK -426 0x3800 //TX_SB_RTO_MEAN_TH_ABN -427 0x2EE0 //TX_SB_RTO_MEAN_TH_RUB -428 0x0990 //TX_WTA_EN_RTO_TH -429 0x1400 //TX_TOP_ENER_TH_F -430 0x0100 //TX_DESIRED_TALK_HOLDT -431 0x0800 //TX_MIC_BLOCK_FACTOR -432 0x0000 //TX_NSEST_BFRLRNRDC -433 0x0000 //TX_THR_POST_FLT_HS -434 0x0010 //TX_HS_VAD_BIN -435 0x2666 //TX_THR_VAD_HS -436 0x2CCD //TX_MEAN_RTO_MIN_TH2 -437 0x0032 //TX_SILENCE_T -438 0x0000 //TX_A_POST_FLT_WTA -439 0x799A //TX_LAMBDA_PFLT_WTA -440 0x0000 //TX_SB_RHO_MEAN2_TH -441 0x0640 //TX_SB_RHO_MEAN3_TH -442 0x0000 //TX_HS_RESRV_4 -443 0x0000 //TX_HS_RESRV_5 -444 0x003C //TX_DOA_VAD_THR_1 -445 0x003C //TX_DOA_VAD_THR_2 -446 0x0028 //TX_DOA_VAD_THR1_0 -447 0x0028 //TX_DOA_VAD_THR1_1 -448 0x0000 //TX_SRC_DOA_RNG_LOW_0A -449 0x00B4 //TX_SRC_DOA_RNG_HIGH_0A -450 0x005A //TX_DFLT_SRC_DOA_0A -451 0x0000 //TX_SRC_DOA_RNG_LOW_0B -452 0x0000 //TX_SRC_DOA_RNG_HIGH_0B -453 0x0000 //TX_DFLT_SRC_DOA_0B -454 0x0000 //TX_SRC_DOA_RNG_LOW_0C -455 0x0000 //TX_SRC_DOA_RNG_HIGH_0C -456 0x0000 //TX_DFLT_SRC_DOA_0C -457 0x0000 //TX_SRC_DOA_RNG_LOW_0D -458 0x0000 //TX_SRC_DOA_RNG_HIGH_0D -459 0x0000 //TX_DFLT_SRC_DOA_0D -460 0x0000 //TX_SRC_DOA_RNG_LOW_1A -461 0x00B4 //TX_SRC_DOA_RNG_HIGH_1A -462 0x005A //TX_DFLT_SRC_DOA_1A -463 0x0000 //TX_SRC_DOA_RNG_LOW_1B -464 0x00B4 //TX_SRC_DOA_RNG_HIGH_1B -465 0x005A //TX_DFLT_SRC_DOA_1B -466 0x0000 //TX_SRC_DOA_RNG_LOW_1C -467 0x00B4 //TX_SRC_DOA_RNG_HIGH_1C -468 0x005A //TX_DFLT_SRC_DOA_1C -469 0x0000 //TX_SRC_DOA_RNG_LOW_1D -470 0x00B4 //TX_SRC_DOA_RNG_HIGH_1D -471 0x005A //TX_DFLT_SRC_DOA_1D -472 0x0100 //TX_BF_HOLDOFF_T -473 0x7FFF //TX_DOA_COST_FACTOR -474 0x0D9A //TX_MAINTOREFR_TH0 -475 0x071C //TX_DOA_TRK_THR -476 0x012C //TX_DOA_TRACK_HT -477 0x0200 //TX_N1_HOLD_HF -478 0x0100 //TX_N2_HOLD_HF -479 0x2A3D //TX_BF_RESET_THR_HF -480 0x7333 //TX_DOA_SMOOTH -481 0x0800 //TX_MU_BF -482 0x0800 //TX_BF_MU_LF_B2 -483 0x0040 //TX_BF_FC_END_BIN_B2 -484 0x0020 //TX_BF_FC_END_BIN -485 0x0000 //TX_HF_RESRV_25 -486 0x0000 //TX_HF_RESRV_26 -487 0x0007 //TX_N_DOA_SEED -488 0x0001 //TX_FINE_DOA_SEARCH_FLG -489 0x0000 //TX_HF_RESRV_27 -490 0x038E //TX_DLT_SRC_DOA_RNG -491 0x0200 //TX_BF_MU_LF -492 0x0000 //TX_DFLT_SRC_LOC_0 -493 0x7FFF //TX_DFLT_SRC_LOC_1 -494 0x0000 //TX_DFLT_SRC_LOC_2 -495 0x038E //TX_DOA_TRACK_VADTH -496 0x0000 //TX_DOA_TRACK_NEW -497 0x01E0 //TX_NOR_OFF_THR -498 0x7C00 //TX_MORE_ON_700HZ_THR -499 0x2000 //TX_MU_BF_ADPT_NS -500 0x0000 //TX_ADAPT_LEN -501 0x6666 //TX_MORE_SNS -502 0x0000 //TX_NOR_OFF_TH1 -503 0x0000 //TX_WIDE_MASK_TH -504 0xD333 //TX_SUBSNRATIOHIGH4MEANBCK_THR -505 0x6000 //TX_C_POST_FLT_CUT -506 0x2000 //TX_RADIODTLV -507 0x0320 //TX_POWER_LINEIN_TH -508 0x0014 //TX_FE_VADCOUNT_TH_FC -509 0x0000 //TX_ECHO_SUPP_FC -510 0x0C80 //TX_ECHO_TH -511 0x6666 //TX_MIC_TO_BFGAIN -512 0x0000 //TX_MICTOBFGAIN0 -513 0x0000 //TX_FASTMUE_TH -514 0x0000 //TX_DERVB_LEN_0 -515 0x0000 //TX_DERVB_LEN_1 -516 0x0000 //TX_RHO_DERVB -517 0x0000 //TX_MIC_INDX_DERVB -518 0x0000 //TX_MU_DERVB -519 0x0000 //TX_DR_RESRV_0 -520 0x0000 //TX_DR_RESRV_1 -521 0x0000 //TX_DR_RESRV_2 -522 0x0000 //TX_DR_RESRV_3 -523 0x0000 //TX_DR_RESRV_4 -524 0x0000 //TX_DR_RESRV_5 -525 0x0000 //TX_DR_RESRV_6 -526 0x0000 //TX_DR_RESRV_7 -527 0x0000 //TX_DR_RESRV_8 -528 0x1333 //TX_WIND_MARK_TH -529 0x399A //TX_CORR_THR -530 0x0004 //TX_SNR_THR -531 0x0010 //TX_ENGY_THR -532 0x1770 //TX_CORR_HIGH_TH -533 0x6000 //TX_ENGY_THR_2 -534 0x3400 //TX_MEAN_RTO_THR -535 0x0028 //TX_WNS_ENOISE_MIC0_TH -536 0x3000 //TX_RATIOMICL_TH -537 0x7FFF //TX_CALIG_HS -538 0x0000 //TX_LVL_CTRL -539 0x0014 //TX_WIND_SUPRTO -540 0x001A //TX_WNS_MIN_G -541 0x0600 //TX_WNS_B_POST_FLT -542 0x2800 //TX_RATIOMICH_TH -543 0xD120 //TX_WIND_INBEAM_L_TH -544 0x0FA0 //TX_WIND_INBEAM_H_TH -545 0x2000 //TX_WNS_RESRV_0 -546 0x59D8 //TX_WNS_RESRV_1 -547 0x0080 //TX_WNS_RESRV_2 -548 0x0000 //TX_WNS_RESRV_3 -549 0x0000 //TX_WNS_RESRV_4 -550 0x0000 //TX_WNS_RESRV_5 -551 0x0000 //TX_WNS_RESRV_6 -552 0x0000 //TX_PB_B_POST_FLT_LESSCUT -553 0x0070 //TX_BF_LESSCUT_BBIN -554 0x0070 //TX_BF_LESSCUT_EBIN -555 0x0010 //TX_POSTBFB0 -556 0x0070 //TX_POSTBFB -557 0x00B0 //TX_POSTBFE -558 0x0E66 //TX_SPEECH_SNR_TH -559 0x0050 //TX_PB_MAX_PRI_SNR_TH -560 0x770A //TX_MAX_PRI_SNR_TH_L -561 0x0000 //TX_PFGAIN -562 0x0000 //TX_MAINTOREFR_TH -563 0x0000 //TX_SAM_MARK -564 0x0000 //TX_PB_RESRV_0 -565 0x0000 //TX_PB_RESRV_1 -566 0x0018 //TX_FDEQ_SUBNUM -567 0x6C60 //TX_FDEQ_GAIN_0 -568 0x584F //TX_FDEQ_GAIN_1 -569 0x4F4E //TX_FDEQ_GAIN_2 -570 0x474A //TX_FDEQ_GAIN_3 -571 0x473F //TX_FDEQ_GAIN_4 -572 0x4240 //TX_FDEQ_GAIN_5 -573 0x4040 //TX_FDEQ_GAIN_6 -574 0x3630 //TX_FDEQ_GAIN_7 -575 0x2620 //TX_FDEQ_GAIN_8 -576 0x383C //TX_FDEQ_GAIN_9 -577 0x4848 //TX_FDEQ_GAIN_10 -578 0x4848 //TX_FDEQ_GAIN_11 -579 0x4848 //TX_FDEQ_GAIN_12 -580 0x4848 //TX_FDEQ_GAIN_13 -581 0x4848 //TX_FDEQ_GAIN_14 -582 0x4848 //TX_FDEQ_GAIN_15 -583 0x4848 //TX_FDEQ_GAIN_16 -584 0x4848 //TX_FDEQ_GAIN_17 -585 0x4848 //TX_FDEQ_GAIN_18 -586 0x4848 //TX_FDEQ_GAIN_19 -587 0x4848 //TX_FDEQ_GAIN_20 -588 0x4848 //TX_FDEQ_GAIN_21 -589 0x4848 //TX_FDEQ_GAIN_22 -590 0x4848 //TX_FDEQ_GAIN_23 -591 0x0202 //TX_FDEQ_BIN_0 -592 0x0104 //TX_FDEQ_BIN_1 -593 0x0502 //TX_FDEQ_BIN_2 -594 0x0202 //TX_FDEQ_BIN_3 -595 0x0504 //TX_FDEQ_BIN_4 -596 0x0708 //TX_FDEQ_BIN_5 -597 0x0808 //TX_FDEQ_BIN_6 -598 0x050E //TX_FDEQ_BIN_7 -599 0x0B0C //TX_FDEQ_BIN_8 -600 0x0F0F //TX_FDEQ_BIN_9 -601 0x0000 //TX_FDEQ_BIN_10 -602 0x0000 //TX_FDEQ_BIN_11 -603 0x0000 //TX_FDEQ_BIN_12 -604 0x0000 //TX_FDEQ_BIN_13 -605 0x0000 //TX_FDEQ_BIN_14 -606 0x0000 //TX_FDEQ_BIN_15 -607 0x0000 //TX_FDEQ_BIN_16 -608 0x0000 //TX_FDEQ_BIN_17 -609 0x0000 //TX_FDEQ_BIN_18 -610 0x0000 //TX_FDEQ_BIN_19 -611 0x0000 //TX_FDEQ_BIN_20 -612 0x0000 //TX_FDEQ_BIN_21 -613 0x0000 //TX_FDEQ_BIN_22 -614 0x0000 //TX_FDEQ_BIN_23 -615 0x0000 //TX_FDEQ_PADDING -616 0x0030 //TX_PREEQ_SUBNUM_MIC0 -617 0x4848 //TX_PREEQ_GAIN_MIC0_0 -618 0x4848 //TX_PREEQ_GAIN_MIC0_1 -619 0x4848 //TX_PREEQ_GAIN_MIC0_2 -620 0x4848 //TX_PREEQ_GAIN_MIC0_3 -621 0x4848 //TX_PREEQ_GAIN_MIC0_4 -622 0x4848 //TX_PREEQ_GAIN_MIC0_5 -623 0x4848 //TX_PREEQ_GAIN_MIC0_6 -624 0x4846 //TX_PREEQ_GAIN_MIC0_7 -625 0x4544 //TX_PREEQ_GAIN_MIC0_8 -626 0x4241 //TX_PREEQ_GAIN_MIC0_9 +625 0x4848 //TX_PREEQ_GAIN_MIC0_8 +626 0x4848 //TX_PREEQ_GAIN_MIC0_9 627 0x4848 //TX_PREEQ_GAIN_MIC0_10 628 0x4848 //TX_PREEQ_GAIN_MIC0_11 629 0x4848 //TX_PREEQ_GAIN_MIC0_12 @@ -12919,20 +13999,20 @@ 638 0x4848 //TX_PREEQ_GAIN_MIC0_21 639 0x4848 //TX_PREEQ_GAIN_MIC0_22 640 0x4848 //TX_PREEQ_GAIN_MIC0_23 -641 0x0202 //TX_PREEQ_BIN_MIC0_0 -642 0x0203 //TX_PREEQ_BIN_MIC0_1 -643 0x0303 //TX_PREEQ_BIN_MIC0_2 -644 0x0304 //TX_PREEQ_BIN_MIC0_3 -645 0x0405 //TX_PREEQ_BIN_MIC0_4 -646 0x0506 //TX_PREEQ_BIN_MIC0_5 -647 0x0708 //TX_PREEQ_BIN_MIC0_6 -648 0x090A //TX_PREEQ_BIN_MIC0_7 -649 0x0B0C //TX_PREEQ_BIN_MIC0_8 -650 0x0D0E //TX_PREEQ_BIN_MIC0_9 -651 0x0000 //TX_PREEQ_BIN_MIC0_10 -652 0x0000 //TX_PREEQ_BIN_MIC0_11 -653 0x0000 //TX_PREEQ_BIN_MIC0_12 -654 0x0000 //TX_PREEQ_BIN_MIC0_13 +641 0x251A //TX_PREEQ_BIN_MIC0_0 +642 0x0F0F //TX_PREEQ_BIN_MIC0_1 +643 0x0C0C //TX_PREEQ_BIN_MIC0_2 +644 0x0C0F //TX_PREEQ_BIN_MIC0_3 +645 0x0F0F //TX_PREEQ_BIN_MIC0_4 +646 0x0F09 //TX_PREEQ_BIN_MIC0_5 +647 0x0909 //TX_PREEQ_BIN_MIC0_6 +648 0x0908 //TX_PREEQ_BIN_MIC0_7 +649 0x070F //TX_PREEQ_BIN_MIC0_8 +650 0x1F08 //TX_PREEQ_BIN_MIC0_9 +651 0x0808 //TX_PREEQ_BIN_MIC0_10 +652 0x0920 //TX_PREEQ_BIN_MIC0_11 +653 0x2020 //TX_PREEQ_BIN_MIC0_12 +654 0x2021 //TX_PREEQ_BIN_MIC0_13 655 0x0000 //TX_PREEQ_BIN_MIC0_14 656 0x0000 //TX_PREEQ_BIN_MIC0_15 657 0x0000 //TX_PREEQ_BIN_MIC0_16 @@ -12943,1776 +14023,23 @@ 662 0x0000 //TX_PREEQ_BIN_MIC0_21 663 0x0000 //TX_PREEQ_BIN_MIC0_22 664 0x0000 //TX_PREEQ_BIN_MIC0_23 -665 0x0014 //TX_PREEQ_SUBNUM_MIC1 +665 0x0030 //TX_PREEQ_SUBNUM_MIC1 666 0x4848 //TX_PREEQ_GAIN_MIC1_0 667 0x4848 //TX_PREEQ_GAIN_MIC1_1 668 0x4848 //TX_PREEQ_GAIN_MIC1_2 669 0x4848 //TX_PREEQ_GAIN_MIC1_3 670 0x4848 //TX_PREEQ_GAIN_MIC1_4 671 0x4848 //TX_PREEQ_GAIN_MIC1_5 -672 0x4848 //TX_PREEQ_GAIN_MIC1_6 -673 0x4848 //TX_PREEQ_GAIN_MIC1_7 -674 0x4A4C //TX_PREEQ_GAIN_MIC1_8 -675 0x4E50 //TX_PREEQ_GAIN_MIC1_9 -676 0x4848 //TX_PREEQ_GAIN_MIC1_10 -677 0x4848 //TX_PREEQ_GAIN_MIC1_11 -678 0x4848 //TX_PREEQ_GAIN_MIC1_12 -679 0x4848 //TX_PREEQ_GAIN_MIC1_13 -680 0x4848 //TX_PREEQ_GAIN_MIC1_14 -681 0x4848 //TX_PREEQ_GAIN_MIC1_15 -682 0x4848 //TX_PREEQ_GAIN_MIC1_16 -683 0x4848 //TX_PREEQ_GAIN_MIC1_17 -684 0x4848 //TX_PREEQ_GAIN_MIC1_18 -685 0x4848 //TX_PREEQ_GAIN_MIC1_19 -686 0x4848 //TX_PREEQ_GAIN_MIC1_20 -687 0x4848 //TX_PREEQ_GAIN_MIC1_21 -688 0x4848 //TX_PREEQ_GAIN_MIC1_22 -689 0x4848 //TX_PREEQ_GAIN_MIC1_23 -690 0x0203 //TX_PREEQ_BIN_MIC1_0 -691 0x0203 //TX_PREEQ_BIN_MIC1_1 -692 0x0303 //TX_PREEQ_BIN_MIC1_2 -693 0x0304 //TX_PREEQ_BIN_MIC1_3 -694 0x0405 //TX_PREEQ_BIN_MIC1_4 -695 0x0506 //TX_PREEQ_BIN_MIC1_5 -696 0x0708 //TX_PREEQ_BIN_MIC1_6 -697 0x090A //TX_PREEQ_BIN_MIC1_7 -698 0x0B0C //TX_PREEQ_BIN_MIC1_8 -699 0x0D0E //TX_PREEQ_BIN_MIC1_9 -700 0x0000 //TX_PREEQ_BIN_MIC1_10 -701 0x0000 //TX_PREEQ_BIN_MIC1_11 -702 0x0000 //TX_PREEQ_BIN_MIC1_12 -703 0x0000 //TX_PREEQ_BIN_MIC1_13 -704 0x0000 //TX_PREEQ_BIN_MIC1_14 -705 0x0000 //TX_PREEQ_BIN_MIC1_15 -706 0x0000 //TX_PREEQ_BIN_MIC1_16 -707 0x0000 //TX_PREEQ_BIN_MIC1_17 -708 0x0000 //TX_PREEQ_BIN_MIC1_18 -709 0x0000 //TX_PREEQ_BIN_MIC1_19 -710 0x0000 //TX_PREEQ_BIN_MIC1_20 -711 0x0000 //TX_PREEQ_BIN_MIC1_21 -712 0x0000 //TX_PREEQ_BIN_MIC1_22 -713 0x0000 //TX_PREEQ_BIN_MIC1_23 -714 0x0030 //TX_PREEQ_SUBNUM_MIC2 -715 0x4848 //TX_PREEQ_GAIN_MIC2_0 -716 0x4848 //TX_PREEQ_GAIN_MIC2_1 -717 0x4848 //TX_PREEQ_GAIN_MIC2_2 -718 0x4848 //TX_PREEQ_GAIN_MIC2_3 -719 0x4848 //TX_PREEQ_GAIN_MIC2_4 -720 0x4848 //TX_PREEQ_GAIN_MIC2_5 -721 0x4848 //TX_PREEQ_GAIN_MIC2_6 -722 0x4848 //TX_PREEQ_GAIN_MIC2_7 -723 0x4848 //TX_PREEQ_GAIN_MIC2_8 -724 0x4848 //TX_PREEQ_GAIN_MIC2_9 -725 0x4848 //TX_PREEQ_GAIN_MIC2_10 -726 0x4848 //TX_PREEQ_GAIN_MIC2_11 -727 0x4848 //TX_PREEQ_GAIN_MIC2_12 -728 0x4848 //TX_PREEQ_GAIN_MIC2_13 -729 0x4848 //TX_PREEQ_GAIN_MIC2_14 -730 0x4848 //TX_PREEQ_GAIN_MIC2_15 -731 0x4848 //TX_PREEQ_GAIN_MIC2_16 -732 0x4848 //TX_PREEQ_GAIN_MIC2_17 -733 0x4848 //TX_PREEQ_GAIN_MIC2_18 -734 0x4848 //TX_PREEQ_GAIN_MIC2_19 -735 0x4848 //TX_PREEQ_GAIN_MIC2_20 -736 0x4848 //TX_PREEQ_GAIN_MIC2_21 -737 0x4848 //TX_PREEQ_GAIN_MIC2_22 -738 0x4848 //TX_PREEQ_GAIN_MIC2_23 -739 0x0608 //TX_PREEQ_BIN_MIC2_0 -740 0x0808 //TX_PREEQ_BIN_MIC2_1 -741 0x0808 //TX_PREEQ_BIN_MIC2_2 -742 0x0808 //TX_PREEQ_BIN_MIC2_3 -743 0x0808 //TX_PREEQ_BIN_MIC2_4 -744 0x0808 //TX_PREEQ_BIN_MIC2_5 -745 0x0808 //TX_PREEQ_BIN_MIC2_6 -746 0x0808 //TX_PREEQ_BIN_MIC2_7 -747 0x0808 //TX_PREEQ_BIN_MIC2_8 -748 0x0808 //TX_PREEQ_BIN_MIC2_9 -749 0x0808 //TX_PREEQ_BIN_MIC2_10 -750 0x0808 //TX_PREEQ_BIN_MIC2_11 -751 0x0808 //TX_PREEQ_BIN_MIC2_12 -752 0x0808 //TX_PREEQ_BIN_MIC2_13 -753 0x0808 //TX_PREEQ_BIN_MIC2_14 -754 0x0200 //TX_PREEQ_BIN_MIC2_15 -755 0x0000 //TX_PREEQ_BIN_MIC2_16 -756 0x0000 //TX_PREEQ_BIN_MIC2_17 -757 0x0000 //TX_PREEQ_BIN_MIC2_18 -758 0x0000 //TX_PREEQ_BIN_MIC2_19 -759 0x0000 //TX_PREEQ_BIN_MIC2_20 -760 0x0000 //TX_PREEQ_BIN_MIC2_21 -761 0x0000 //TX_PREEQ_BIN_MIC2_22 -762 0x0000 //TX_PREEQ_BIN_MIC2_23 -763 0x0006 //TX_MASKING_ABILITY -764 0x0800 //TX_NND_WEIGHT -765 0x0065 //TX_MIC_CALIBRATION_0 -766 0x0065 //TX_MIC_CALIBRATION_1 -767 0x0065 //TX_MIC_CALIBRATION_2 -768 0x0065 //TX_MIC_CALIBRATION_3 -769 0x0044 //TX_MIC_PWR_BIAS_0 -770 0x0044 //TX_MIC_PWR_BIAS_1 -771 0x0044 //TX_MIC_PWR_BIAS_2 -772 0x0044 //TX_MIC_PWR_BIAS_3 -773 0x0000 //TX_GAIN_LIMIT_0 -774 0x0000 //TX_GAIN_LIMIT_1 -775 0x0006 //TX_GAIN_LIMIT_2 -776 0x0006 //TX_GAIN_LIMIT_3 -777 0x7F5B //TX_BVE_NOVAD0_ALPHADOWN -778 0x7FDE //TX_BVE_VAD0_ALPHAUP -779 0x7F3A //TX_BVE_VAD0_ALPHADOWN -780 0x2000 //TX_BVE_GAINWEIGHT_NOFEVADLI -781 0x7F5B //TX_BVE_FEVADLI_ALPHA -782 0x7F19 //TX_BVE_NOVAD0_ALPHAUP -783 0x1000 //TX_TDDRC_ALPHA_UP_01 -784 0x1000 //TX_TDDRC_ALPHA_UP_02 -785 0x1000 //TX_TDDRC_ALPHA_UP_03 -786 0x1000 //TX_TDDRC_ALPHA_UP_04 -787 0x7EB8 //TX_TDDRC_ALPHA_DWN_01 -788 0x7EB8 //TX_TDDRC_ALPHA_DWN_02 -789 0x7EB8 //TX_TDDRC_ALPHA_DWN_03 -790 0x7EB8 //TX_TDDRC_ALPHA_DWN_04 -791 0x7FFF //TX_TDDRC_TD_DRC_LIMIT -792 0x0800 //TX_TDDRC_POST_LIMIT_GAIN -793 0x0000 //TX_TDDRC_RESRV_0 -794 0x0000 //TX_TDDRC_RESRV_1 -795 0x0018 //TX_FDDRC_BAND_MARGIN_0 -796 0x0030 //TX_FDDRC_BAND_MARGIN_1 -797 0x0050 //TX_FDDRC_BAND_MARGIN_2 -798 0x0080 //TX_FDDRC_BAND_MARGIN_3 -799 0x0007 //TX_FDDRC_BLOCK_EXP -800 0x5000 //TX_FDDRC_THRD_2_0 -801 0x5000 //TX_FDDRC_THRD_2_1 -802 0x5000 //TX_FDDRC_THRD_2_2 -803 0x5000 //TX_FDDRC_THRD_2_3 -804 0x6400 //TX_FDDRC_THRD_3_0 -805 0x6400 //TX_FDDRC_THRD_3_1 -806 0x6400 //TX_FDDRC_THRD_3_2 -807 0x6400 //TX_FDDRC_THRD_3_3 -808 0x2000 //TX_FDDRC_SLANT_0_0 -809 0x2000 //TX_FDDRC_SLANT_0_1 -810 0x2000 //TX_FDDRC_SLANT_0_2 -811 0x2000 //TX_FDDRC_SLANT_0_3 -812 0x5333 //TX_FDDRC_SLANT_1_0 -813 0x5333 //TX_FDDRC_SLANT_1_1 -814 0x5333 //TX_FDDRC_SLANT_1_2 -815 0x5333 //TX_FDDRC_SLANT_1_3 -816 0x0010 //TX_DEADMIC_SILENCE_TH -817 0x0600 //TX_MIC_DEGRADE_TH -818 0x0078 //TX_DEADMIC_CNT -819 0x0078 //TX_MIC_DEGRADE_CNT -820 0x0000 //TX_FDDRC_RESRV_4 -821 0x0000 //TX_FDDRC_RESRV_5 -822 0x0000 //TX_FDDRC_RESRV_6 -823 0x7FFF //TX_KS_NOISEPASTE_FACTOR -824 0x0001 //TX_KS_CONFIG -825 0x7FFF //TX_KS_GAIN_MIN -826 0x0000 //TX_KS_RESRV_0 -827 0x0000 //TX_KS_RESRV_1 -828 0x0000 //TX_KS_RESRV_2 -829 0x7C00 //TX_LAMBDA_PKA_FP -830 0x2000 //TX_TPKA_FP -831 0x0080 //TX_MIN_G_FP -832 0x2000 //TX_MAX_G_FP -833 0x0FA0 //TX_FFP_FP_K_METAL -834 0x4000 //TX_A_POST_FLT_FP -835 0x0F5C //TX_RTO_OUTBEAM_TH -836 0x4CCD //TX_TPKA_FP_THD -837 0x0000 //TX_MAX_G_FP_BLK -838 0x0000 //TX_FFP_FADEIN -839 0x0000 //TX_FFP_FADEOUT -840 0x0000 //TX_WHISPERCTH -841 0x0000 //TX_WHISPERHOLDT -842 0x0000 //TX_WHISP_ENTHH -843 0x0000 //TX_WHISP_ENTHL -844 0x0000 //TX_WHISP_RTOTH -845 0x0000 //TX_WHISP_RTOTH2 -846 0x0096 //TX_MUTE_PERIOD -847 0x0000 //TX_FADE_IN_PERIOD -848 0x0100 //TX_FFP_RESRV_2 -849 0x0020 //TX_FFP_RESRV_3 -850 0x0000 //TX_FFP_RESRV_4 -851 0x0000 //TX_FFP_RESRV_5 -852 0x0000 //TX_FFP_RESRV_6 -853 0x0002 //TX_FILTINDX -854 0x0000 //TX_TDDRC_THRD_0 -855 0x0010 //TX_TDDRC_THRD_1 -856 0x1500 //TX_TDDRC_THRD_2 -857 0x1500 //TX_TDDRC_THRD_3 -858 0x3000 //TX_TDDRC_SLANT_0 -859 0x6E00 //TX_TDDRC_SLANT_1 -860 0x1000 //TX_TDDRC_ALPHA_UP_00 -861 0x7EB8 //TX_TDDRC_ALPHA_DWN_00 -862 0x0000 //TX_TDDRC_HMNC_FLAG -863 0x199A //TX_TDDRC_HMNC_GAIN -864 0x0000 //TX_TDDRC_SMT_FLAG -865 0x0CCD //TX_TDDRC_SMT_W -866 0x0550 //TX_TDDRC_DRC_GAIN -867 0x7FFF //TX_TDDRC_LMT_THRD -868 0x0000 //TX_TDDRC_LMT_ALPHA -869 0x0000 //TX_TFMASKLTH -870 0x0000 //TX_TFMASKLTHL -871 0x0CCD //TX_TFMASKHTH -872 0x0CCD //TX_TFMASKLTH_BINVAD -873 0xF333 //TX_TFMASKLTH_NS_EST -874 0xF800 //TX_TFMASKLTH_DOA -875 0x0CCD //TX_TFMASKTH_BLESSCUT -876 0x1000 //TX_B_LESSCUT_RTO_MASK -877 0x3800 //TX_SB_RHO_MEAN_TH_ABN -878 0x2000 //TX_B_POST_FLT_MASK -879 0x0000 //TX_B_POST_FLT_MASK1 -880 0x6333 //TX_GAIN_WIND_MASK -881 0x7FFF //TX_TFMASK_BFSTRICT_MUSIC -882 0x0000 //TX_TFMASK_BFSTRICT_NOMUSIC -883 0x7333 //TX_FASTNS_OUTIN_TH -884 0x0CCD //TX_FASTNS_TFMASK_TH -885 0x0CCD //TX_FASTNS_TFMASKBIN_TH1 -886 0x0CCD //TX_FASTNS_TFMASKBIN_TH2 -887 0x0CCD //TX_FASTNS_TFMASKBIN_TH3 -888 0x0028 //TX_FASTNS_ARSPC_TH -889 0xC000 //TX_FASTNS_MASK5_TH -890 0x0810 //TX_POSTSSA_MIN_G_VR_MASK -891 0x1000 //TX_A_LESSCUT_RTO_MASK -892 0x1770 //TX_FASTNS_NOISETH -893 0xC000 //TX_FASTNS_SSA_THLFL -894 0xC000 //TX_FASTNS_SSA_THHFL -895 0xCCCC //TX_FASTNS_SSA_THLFH -896 0xD999 //TX_FASTNS_SSA_THHFH -#RX -0 0x000C //RX_RECVFUNC_MODE_0 -1 0x0000 //RX_RECVFUNC_MODE_1 -2 0x0000 //RX_SAMPLINGFREQ_SIG -3 0x0000 //RX_SAMPLINGFREQ_PROC -4 0x000A //RX_FRAME_SZ -5 0x0000 //RX_DELAY_OPT -6 0x1000 //RX_TDDRC_ALPHA_UP_1 -7 0x1000 //RX_TDDRC_ALPHA_UP_2 -8 0x1000 //RX_TDDRC_ALPHA_UP_3 -9 0x1000 //RX_TDDRC_ALPHA_UP_4 -10 0x0800 //RX_PGA -11 0x7FFF //RX_A_HP -12 0x4000 //RX_B_PE -13 0x7800 //RX_THR_PITCH_DET_0 -14 0x7000 //RX_THR_PITCH_DET_1 -15 0x6000 //RX_THR_PITCH_DET_2 -16 0x0008 //RX_PITCH_BFR_LEN -17 0x0003 //RX_SBD_PITCH_DET -18 0x0100 //RX_PP_RESRV_0 -19 0x0020 //RX_PP_RESRV_1 -20 0x0400 //RX_N_SN_EST -21 0x000C //RX_N2_SN_EST -22 0x0014 //RX_NS_LVL_CTRL -23 0xF800 //RX_THR_SN_EST -24 0x7E00 //RX_LAMBDA_PFILT -25 0x000A //RX_FENS_RESRV_0 -26 0x0190 //RX_FENS_RESRV_1 -27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 -28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 -29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 -30 0x0002 //RX_EXTRA_NS_L -31 0x0800 //RX_EXTRA_NS_A -32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 -33 0x7000 //RX_TDDRC_LIMITER_THRD -34 0x0800 //RX_TDDRC_LIMITER_GAIN -35 0x199A //RX_A_POST_FLT -36 0x0000 //RX_LMT_THRD -37 0x4000 //RX_LMT_ALPHA -38 0x0030 //RX_FDEQ_SUBNUM -39 0x4848 //RX_FDEQ_GAIN_0 -40 0x4848 //RX_FDEQ_GAIN_1 -41 0x4844 //RX_FDEQ_GAIN_2 -42 0x4A4C //RX_FDEQ_GAIN_3 -43 0x4E50 //RX_FDEQ_GAIN_4 -44 0x5254 //RX_FDEQ_GAIN_5 -45 0x5658 //RX_FDEQ_GAIN_6 -46 0x5A5C //RX_FDEQ_GAIN_7 -47 0x5C5C //RX_FDEQ_GAIN_8 -48 0x5C5C //RX_FDEQ_GAIN_9 -49 0x5C5C //RX_FDEQ_GAIN_10 -50 0x5C48 //RX_FDEQ_GAIN_11 -51 0x4848 //RX_FDEQ_GAIN_12 -52 0x4848 //RX_FDEQ_GAIN_13 -53 0x4848 //RX_FDEQ_GAIN_14 -54 0x4848 //RX_FDEQ_GAIN_15 -55 0x4848 //RX_FDEQ_GAIN_16 -56 0x4848 //RX_FDEQ_GAIN_17 -57 0x4848 //RX_FDEQ_GAIN_18 -58 0x4848 //RX_FDEQ_GAIN_19 -59 0x4848 //RX_FDEQ_GAIN_20 -60 0x4848 //RX_FDEQ_GAIN_21 -61 0x4848 //RX_FDEQ_GAIN_22 -62 0x4848 //RX_FDEQ_GAIN_23 -63 0x0202 //RX_FDEQ_BIN_0 -64 0x0203 //RX_FDEQ_BIN_1 -65 0x0402 //RX_FDEQ_BIN_2 -66 0x0303 //RX_FDEQ_BIN_3 -67 0x0303 //RX_FDEQ_BIN_4 -68 0x0303 //RX_FDEQ_BIN_5 -69 0x0303 //RX_FDEQ_BIN_6 -70 0x0303 //RX_FDEQ_BIN_7 -71 0x0A0A //RX_FDEQ_BIN_8 -72 0x0A0E //RX_FDEQ_BIN_9 -73 0x0000 //RX_FDEQ_BIN_10 -74 0x0000 //RX_FDEQ_BIN_11 -75 0x0000 //RX_FDEQ_BIN_12 -76 0x0000 //RX_FDEQ_BIN_13 -77 0x0000 //RX_FDEQ_BIN_14 -78 0x0000 //RX_FDEQ_BIN_15 -79 0x0000 //RX_FDEQ_BIN_16 -80 0x0000 //RX_FDEQ_BIN_17 -81 0x0000 //RX_FDEQ_BIN_18 -82 0x0000 //RX_FDEQ_BIN_19 -83 0x0000 //RX_FDEQ_BIN_20 -84 0x0000 //RX_FDEQ_BIN_21 -85 0x0000 //RX_FDEQ_BIN_22 -86 0x0000 //RX_FDEQ_BIN_23 -87 0x4000 //RX_FDEQ_RESRV_0 -88 0x0320 //RX_FDEQ_RESRV_1 -89 0x0018 //RX_FDDRC_BAND_MARGIN_0 -90 0x0030 //RX_FDDRC_BAND_MARGIN_1 -91 0x0050 //RX_FDDRC_BAND_MARGIN_2 -92 0x0080 //RX_FDDRC_BAND_MARGIN_3 -93 0x0007 //RX_FDDRC_BLOCK_EXP -94 0x5000 //RX_FDDRC_THRD_2_0 -95 0x5000 //RX_FDDRC_THRD_2_1 -96 0x5000 //RX_FDDRC_THRD_2_2 -97 0x5000 //RX_FDDRC_THRD_2_3 -98 0x6400 //RX_FDDRC_THRD_3_0 -99 0x6400 //RX_FDDRC_THRD_3_1 -100 0x6400 //RX_FDDRC_THRD_3_2 -101 0x6400 //RX_FDDRC_THRD_3_3 -102 0x2000 //RX_FDDRC_SLANT_0_0 -103 0x2000 //RX_FDDRC_SLANT_0_1 -104 0x2000 //RX_FDDRC_SLANT_0_2 -105 0x2000 //RX_FDDRC_SLANT_0_3 -106 0x5333 //RX_FDDRC_SLANT_1_0 -107 0x5333 //RX_FDDRC_SLANT_1_1 -108 0x5333 //RX_FDDRC_SLANT_1_2 -109 0x5333 //RX_FDDRC_SLANT_1_3 -110 0x0000 //RX_FDDRC_RESRV_0 -111 0x0002 //RX_FILTINDX -112 0x0000 //RX_TDDRC_THRD_0 -113 0x0000 //RX_TDDRC_THRD_1 -114 0x1800 //RX_TDDRC_THRD_2 -115 0x1800 //RX_TDDRC_THRD_3 -116 0x3000 //RX_TDDRC_SLANT_0 -117 0x6E00 //RX_TDDRC_SLANT_1 -118 0x1000 //RX_TDDRC_ALPHA_UP_0 -119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 -120 0x0000 //RX_TDDRC_HMNC_FLAG -121 0x199A //RX_TDDRC_HMNC_GAIN -122 0x0001 //RX_TDDRC_SMT_FLAG -123 0x0CCD //RX_TDDRC_SMT_W -124 0x0360 //RX_TDDRC_DRC_GAIN -125 0x7C00 //RX_LAMBDA_PKA_FP -126 0x2000 //RX_TPKA_FP -127 0x2000 //RX_MIN_G_FP -128 0x0080 //RX_MAX_G_FP -129 0x0100 //RX_SPK_VOL -130 0x0000 //RX_VOL_RESRV_0 -131 0x0000 //RX_MAXLEVEL_CNG -132 0x3000 //RX_BWE_UV_TH -133 0x3000 //RX_BWE_UV_TH2 -134 0x1800 //RX_BWE_UV_TH3 -135 0x1000 //RX_BWE_V_TH -136 0x04CD //RX_BWE_GAIN1_V_TH1 -137 0x0F33 //RX_BWE_GAIN1_V_TH2 -138 0x7333 //RX_BWE_UV_EQ -139 0x199A //RX_BWE_V_EQ -140 0x7333 //RX_BWE_TONE_TH -141 0x0004 //RX_BWE_UV_HOLD_T -142 0x6CCD //RX_BWE_GAIN2_ALPHA -143 0x799A //RX_BWE_GAIN3_ALPHA -144 0x001E //RX_BWE_CUTOFF -145 0x3000 //RX_BWE_GAINFILL -146 0x3200 //RX_BWE_MAXTH_TONE -147 0x2000 //RX_BWE_EQ_0 -148 0x2000 //RX_BWE_EQ_1 -149 0x2000 //RX_BWE_EQ_2 -150 0x2000 //RX_BWE_EQ_3 -151 0x2000 //RX_BWE_EQ_4 -152 0x2000 //RX_BWE_EQ_5 -153 0x2000 //RX_BWE_EQ_6 -154 0x0000 //RX_BWE_RESRV_0 -155 0x0000 //RX_BWE_RESRV_1 -156 0x0000 //RX_BWE_RESRV_2 -#VOL 0 -6 0x1000 //RX_TDDRC_ALPHA_UP_1 -7 0x1000 //RX_TDDRC_ALPHA_UP_2 -8 0x1000 //RX_TDDRC_ALPHA_UP_3 -9 0x1000 //RX_TDDRC_ALPHA_UP_4 -27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 -28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 -29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 -32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 -33 0x7000 //RX_TDDRC_LIMITER_THRD -34 0x0800 //RX_TDDRC_LIMITER_GAIN -112 0x0000 //RX_TDDRC_THRD_0 -113 0x0000 //RX_TDDRC_THRD_1 -114 0x1800 //RX_TDDRC_THRD_2 -115 0x1800 //RX_TDDRC_THRD_3 -116 0x3000 //RX_TDDRC_SLANT_0 -117 0x6E00 //RX_TDDRC_SLANT_1 -118 0x1000 //RX_TDDRC_ALPHA_UP_0 -119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 -120 0x0000 //RX_TDDRC_HMNC_FLAG -121 0x199A //RX_TDDRC_HMNC_GAIN -122 0x0001 //RX_TDDRC_SMT_FLAG -123 0x0CCD //RX_TDDRC_SMT_W -124 0x0360 //RX_TDDRC_DRC_GAIN -38 0x0030 //RX_FDEQ_SUBNUM -39 0x4848 //RX_FDEQ_GAIN_0 -40 0x4848 //RX_FDEQ_GAIN_1 -41 0x4844 //RX_FDEQ_GAIN_2 -42 0x4A4C //RX_FDEQ_GAIN_3 -43 0x4E50 //RX_FDEQ_GAIN_4 -44 0x5254 //RX_FDEQ_GAIN_5 -45 0x5658 //RX_FDEQ_GAIN_6 -46 0x5A5C //RX_FDEQ_GAIN_7 -47 0x5C5C //RX_FDEQ_GAIN_8 -48 0x5C5C //RX_FDEQ_GAIN_9 -49 0x5C5C //RX_FDEQ_GAIN_10 -50 0x5C48 //RX_FDEQ_GAIN_11 -51 0x4848 //RX_FDEQ_GAIN_12 -52 0x4848 //RX_FDEQ_GAIN_13 -53 0x4848 //RX_FDEQ_GAIN_14 -54 0x4848 //RX_FDEQ_GAIN_15 -55 0x4848 //RX_FDEQ_GAIN_16 -56 0x4848 //RX_FDEQ_GAIN_17 -57 0x4848 //RX_FDEQ_GAIN_18 -58 0x4848 //RX_FDEQ_GAIN_19 -59 0x4848 //RX_FDEQ_GAIN_20 -60 0x4848 //RX_FDEQ_GAIN_21 -61 0x4848 //RX_FDEQ_GAIN_22 -62 0x4848 //RX_FDEQ_GAIN_23 -63 0x0202 //RX_FDEQ_BIN_0 -64 0x0203 //RX_FDEQ_BIN_1 -65 0x0402 //RX_FDEQ_BIN_2 -66 0x0303 //RX_FDEQ_BIN_3 -67 0x0303 //RX_FDEQ_BIN_4 -68 0x0303 //RX_FDEQ_BIN_5 -69 0x0303 //RX_FDEQ_BIN_6 -70 0x0303 //RX_FDEQ_BIN_7 -71 0x0A0A //RX_FDEQ_BIN_8 -72 0x0A0E //RX_FDEQ_BIN_9 -73 0x0000 //RX_FDEQ_BIN_10 -74 0x0000 //RX_FDEQ_BIN_11 -75 0x0000 //RX_FDEQ_BIN_12 -76 0x0000 //RX_FDEQ_BIN_13 -77 0x0000 //RX_FDEQ_BIN_14 -78 0x0000 //RX_FDEQ_BIN_15 -79 0x0000 //RX_FDEQ_BIN_16 -80 0x0000 //RX_FDEQ_BIN_17 -81 0x0000 //RX_FDEQ_BIN_18 -82 0x0000 //RX_FDEQ_BIN_19 -83 0x0000 //RX_FDEQ_BIN_20 -84 0x0000 //RX_FDEQ_BIN_21 -85 0x0000 //RX_FDEQ_BIN_22 -86 0x0000 //RX_FDEQ_BIN_23 -87 0x4000 //RX_FDEQ_RESRV_0 -88 0x0320 //RX_FDEQ_RESRV_1 -89 0x0018 //RX_FDDRC_BAND_MARGIN_0 -90 0x0030 //RX_FDDRC_BAND_MARGIN_1 -91 0x0050 //RX_FDDRC_BAND_MARGIN_2 -92 0x0080 //RX_FDDRC_BAND_MARGIN_3 -93 0x0007 //RX_FDDRC_BLOCK_EXP -94 0x5000 //RX_FDDRC_THRD_2_0 -95 0x5000 //RX_FDDRC_THRD_2_1 -96 0x5000 //RX_FDDRC_THRD_2_2 -97 0x5000 //RX_FDDRC_THRD_2_3 -98 0x6400 //RX_FDDRC_THRD_3_0 -99 0x6400 //RX_FDDRC_THRD_3_1 -100 0x6400 //RX_FDDRC_THRD_3_2 -101 0x6400 //RX_FDDRC_THRD_3_3 -102 0x2000 //RX_FDDRC_SLANT_0_0 -103 0x2000 //RX_FDDRC_SLANT_0_1 -104 0x2000 //RX_FDDRC_SLANT_0_2 -105 0x2000 //RX_FDDRC_SLANT_0_3 -106 0x5333 //RX_FDDRC_SLANT_1_0 -107 0x5333 //RX_FDDRC_SLANT_1_1 -108 0x5333 //RX_FDDRC_SLANT_1_2 -109 0x5333 //RX_FDDRC_SLANT_1_3 -110 0x0000 //RX_FDDRC_RESRV_0 -129 0x0100 //RX_SPK_VOL -130 0x0000 //RX_VOL_RESRV_0 -#VOL 1 -6 0x1000 //RX_TDDRC_ALPHA_UP_1 -7 0x1000 //RX_TDDRC_ALPHA_UP_2 -8 0x1000 //RX_TDDRC_ALPHA_UP_3 -9 0x1000 //RX_TDDRC_ALPHA_UP_4 -27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 -28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 -29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 -32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 -33 0x7000 //RX_TDDRC_LIMITER_THRD -34 0x0800 //RX_TDDRC_LIMITER_GAIN -112 0x0000 //RX_TDDRC_THRD_0 -113 0x0000 //RX_TDDRC_THRD_1 -114 0x1800 //RX_TDDRC_THRD_2 -115 0x1800 //RX_TDDRC_THRD_3 -116 0x3000 //RX_TDDRC_SLANT_0 -117 0x6E00 //RX_TDDRC_SLANT_1 -118 0x1000 //RX_TDDRC_ALPHA_UP_0 -119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 -120 0x0000 //RX_TDDRC_HMNC_FLAG -121 0x199A //RX_TDDRC_HMNC_GAIN -122 0x0001 //RX_TDDRC_SMT_FLAG -123 0x0CCD //RX_TDDRC_SMT_W -124 0x0360 //RX_TDDRC_DRC_GAIN -38 0x0030 //RX_FDEQ_SUBNUM -39 0x4848 //RX_FDEQ_GAIN_0 -40 0x4848 //RX_FDEQ_GAIN_1 -41 0x4844 //RX_FDEQ_GAIN_2 -42 0x4A4C //RX_FDEQ_GAIN_3 -43 0x4E50 //RX_FDEQ_GAIN_4 -44 0x5254 //RX_FDEQ_GAIN_5 -45 0x5658 //RX_FDEQ_GAIN_6 -46 0x5A5C //RX_FDEQ_GAIN_7 -47 0x5C5C //RX_FDEQ_GAIN_8 -48 0x5C5C //RX_FDEQ_GAIN_9 -49 0x5C5C //RX_FDEQ_GAIN_10 -50 0x5C48 //RX_FDEQ_GAIN_11 -51 0x4848 //RX_FDEQ_GAIN_12 -52 0x4848 //RX_FDEQ_GAIN_13 -53 0x4848 //RX_FDEQ_GAIN_14 -54 0x4848 //RX_FDEQ_GAIN_15 -55 0x4848 //RX_FDEQ_GAIN_16 -56 0x4848 //RX_FDEQ_GAIN_17 -57 0x4848 //RX_FDEQ_GAIN_18 -58 0x4848 //RX_FDEQ_GAIN_19 -59 0x4848 //RX_FDEQ_GAIN_20 -60 0x4848 //RX_FDEQ_GAIN_21 -61 0x4848 //RX_FDEQ_GAIN_22 -62 0x4848 //RX_FDEQ_GAIN_23 -63 0x0202 //RX_FDEQ_BIN_0 -64 0x0203 //RX_FDEQ_BIN_1 -65 0x0402 //RX_FDEQ_BIN_2 -66 0x0303 //RX_FDEQ_BIN_3 -67 0x0303 //RX_FDEQ_BIN_4 -68 0x0303 //RX_FDEQ_BIN_5 -69 0x0303 //RX_FDEQ_BIN_6 -70 0x0303 //RX_FDEQ_BIN_7 -71 0x0A0A //RX_FDEQ_BIN_8 -72 0x0A0E //RX_FDEQ_BIN_9 -73 0x0000 //RX_FDEQ_BIN_10 -74 0x0000 //RX_FDEQ_BIN_11 -75 0x0000 //RX_FDEQ_BIN_12 -76 0x0000 //RX_FDEQ_BIN_13 -77 0x0000 //RX_FDEQ_BIN_14 -78 0x0000 //RX_FDEQ_BIN_15 -79 0x0000 //RX_FDEQ_BIN_16 -80 0x0000 //RX_FDEQ_BIN_17 -81 0x0000 //RX_FDEQ_BIN_18 -82 0x0000 //RX_FDEQ_BIN_19 -83 0x0000 //RX_FDEQ_BIN_20 -84 0x0000 //RX_FDEQ_BIN_21 -85 0x0000 //RX_FDEQ_BIN_22 -86 0x0000 //RX_FDEQ_BIN_23 -87 0x4000 //RX_FDEQ_RESRV_0 -88 0x0320 //RX_FDEQ_RESRV_1 -89 0x0018 //RX_FDDRC_BAND_MARGIN_0 -90 0x0030 //RX_FDDRC_BAND_MARGIN_1 -91 0x0050 //RX_FDDRC_BAND_MARGIN_2 -92 0x0080 //RX_FDDRC_BAND_MARGIN_3 -93 0x0007 //RX_FDDRC_BLOCK_EXP -94 0x5000 //RX_FDDRC_THRD_2_0 -95 0x5000 //RX_FDDRC_THRD_2_1 -96 0x5000 //RX_FDDRC_THRD_2_2 -97 0x5000 //RX_FDDRC_THRD_2_3 -98 0x6400 //RX_FDDRC_THRD_3_0 -99 0x6400 //RX_FDDRC_THRD_3_1 -100 0x6400 //RX_FDDRC_THRD_3_2 -101 0x6400 //RX_FDDRC_THRD_3_3 -102 0x2000 //RX_FDDRC_SLANT_0_0 -103 0x2000 //RX_FDDRC_SLANT_0_1 -104 0x2000 //RX_FDDRC_SLANT_0_2 -105 0x2000 //RX_FDDRC_SLANT_0_3 -106 0x5333 //RX_FDDRC_SLANT_1_0 -107 0x5333 //RX_FDDRC_SLANT_1_1 -108 0x5333 //RX_FDDRC_SLANT_1_2 -109 0x5333 //RX_FDDRC_SLANT_1_3 -110 0x0000 //RX_FDDRC_RESRV_0 -129 0x0100 //RX_SPK_VOL -130 0x0000 //RX_VOL_RESRV_0 -#VOL 2 -6 0x1000 //RX_TDDRC_ALPHA_UP_1 -7 0x1000 //RX_TDDRC_ALPHA_UP_2 -8 0x1000 //RX_TDDRC_ALPHA_UP_3 -9 0x1000 //RX_TDDRC_ALPHA_UP_4 -27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 -28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 -29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 -32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 -33 0x7000 //RX_TDDRC_LIMITER_THRD -34 0x0800 //RX_TDDRC_LIMITER_GAIN -112 0x0000 //RX_TDDRC_THRD_0 -113 0x0000 //RX_TDDRC_THRD_1 -114 0x1800 //RX_TDDRC_THRD_2 -115 0x1800 //RX_TDDRC_THRD_3 -116 0x3000 //RX_TDDRC_SLANT_0 -117 0x6E00 //RX_TDDRC_SLANT_1 -118 0x1000 //RX_TDDRC_ALPHA_UP_0 -119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 -120 0x0000 //RX_TDDRC_HMNC_FLAG -121 0x199A //RX_TDDRC_HMNC_GAIN -122 0x0001 //RX_TDDRC_SMT_FLAG -123 0x0CCD //RX_TDDRC_SMT_W -124 0x0360 //RX_TDDRC_DRC_GAIN -38 0x0030 //RX_FDEQ_SUBNUM -39 0x4848 //RX_FDEQ_GAIN_0 -40 0x4848 //RX_FDEQ_GAIN_1 -41 0x4844 //RX_FDEQ_GAIN_2 -42 0x4A4C //RX_FDEQ_GAIN_3 -43 0x4E50 //RX_FDEQ_GAIN_4 -44 0x5254 //RX_FDEQ_GAIN_5 -45 0x5658 //RX_FDEQ_GAIN_6 -46 0x5A5C //RX_FDEQ_GAIN_7 -47 0x5C5C //RX_FDEQ_GAIN_8 -48 0x5C5C //RX_FDEQ_GAIN_9 -49 0x5C5C //RX_FDEQ_GAIN_10 -50 0x5C48 //RX_FDEQ_GAIN_11 -51 0x4848 //RX_FDEQ_GAIN_12 -52 0x4848 //RX_FDEQ_GAIN_13 -53 0x4848 //RX_FDEQ_GAIN_14 -54 0x4848 //RX_FDEQ_GAIN_15 -55 0x4848 //RX_FDEQ_GAIN_16 -56 0x4848 //RX_FDEQ_GAIN_17 -57 0x4848 //RX_FDEQ_GAIN_18 -58 0x4848 //RX_FDEQ_GAIN_19 -59 0x4848 //RX_FDEQ_GAIN_20 -60 0x4848 //RX_FDEQ_GAIN_21 -61 0x4848 //RX_FDEQ_GAIN_22 -62 0x4848 //RX_FDEQ_GAIN_23 -63 0x0202 //RX_FDEQ_BIN_0 -64 0x0203 //RX_FDEQ_BIN_1 -65 0x0402 //RX_FDEQ_BIN_2 -66 0x0303 //RX_FDEQ_BIN_3 -67 0x0303 //RX_FDEQ_BIN_4 -68 0x0303 //RX_FDEQ_BIN_5 -69 0x0303 //RX_FDEQ_BIN_6 -70 0x0303 //RX_FDEQ_BIN_7 -71 0x0A0A //RX_FDEQ_BIN_8 -72 0x0A0E //RX_FDEQ_BIN_9 -73 0x0000 //RX_FDEQ_BIN_10 -74 0x0000 //RX_FDEQ_BIN_11 -75 0x0000 //RX_FDEQ_BIN_12 -76 0x0000 //RX_FDEQ_BIN_13 -77 0x0000 //RX_FDEQ_BIN_14 -78 0x0000 //RX_FDEQ_BIN_15 -79 0x0000 //RX_FDEQ_BIN_16 -80 0x0000 //RX_FDEQ_BIN_17 -81 0x0000 //RX_FDEQ_BIN_18 -82 0x0000 //RX_FDEQ_BIN_19 -83 0x0000 //RX_FDEQ_BIN_20 -84 0x0000 //RX_FDEQ_BIN_21 -85 0x0000 //RX_FDEQ_BIN_22 -86 0x0000 //RX_FDEQ_BIN_23 -87 0x4000 //RX_FDEQ_RESRV_0 -88 0x0320 //RX_FDEQ_RESRV_1 -89 0x0018 //RX_FDDRC_BAND_MARGIN_0 -90 0x0030 //RX_FDDRC_BAND_MARGIN_1 -91 0x0050 //RX_FDDRC_BAND_MARGIN_2 -92 0x0080 //RX_FDDRC_BAND_MARGIN_3 -93 0x0007 //RX_FDDRC_BLOCK_EXP -94 0x5000 //RX_FDDRC_THRD_2_0 -95 0x5000 //RX_FDDRC_THRD_2_1 -96 0x5000 //RX_FDDRC_THRD_2_2 -97 0x5000 //RX_FDDRC_THRD_2_3 -98 0x6400 //RX_FDDRC_THRD_3_0 -99 0x6400 //RX_FDDRC_THRD_3_1 -100 0x6400 //RX_FDDRC_THRD_3_2 -101 0x6400 //RX_FDDRC_THRD_3_3 -102 0x2000 //RX_FDDRC_SLANT_0_0 -103 0x2000 //RX_FDDRC_SLANT_0_1 -104 0x2000 //RX_FDDRC_SLANT_0_2 -105 0x2000 //RX_FDDRC_SLANT_0_3 -106 0x5333 //RX_FDDRC_SLANT_1_0 -107 0x5333 //RX_FDDRC_SLANT_1_1 -108 0x5333 //RX_FDDRC_SLANT_1_2 -109 0x5333 //RX_FDDRC_SLANT_1_3 -110 0x0000 //RX_FDDRC_RESRV_0 -129 0x0100 //RX_SPK_VOL -130 0x0000 //RX_VOL_RESRV_0 -#VOL 3 -6 0x1000 //RX_TDDRC_ALPHA_UP_1 -7 0x1000 //RX_TDDRC_ALPHA_UP_2 -8 0x1000 //RX_TDDRC_ALPHA_UP_3 -9 0x1000 //RX_TDDRC_ALPHA_UP_4 -27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 -28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 -29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 -32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 -33 0x7000 //RX_TDDRC_LIMITER_THRD -34 0x0800 //RX_TDDRC_LIMITER_GAIN -112 0x0000 //RX_TDDRC_THRD_0 -113 0x0000 //RX_TDDRC_THRD_1 -114 0x1800 //RX_TDDRC_THRD_2 -115 0x1800 //RX_TDDRC_THRD_3 -116 0x3000 //RX_TDDRC_SLANT_0 -117 0x6E00 //RX_TDDRC_SLANT_1 -118 0x1000 //RX_TDDRC_ALPHA_UP_0 -119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 -120 0x0000 //RX_TDDRC_HMNC_FLAG -121 0x199A //RX_TDDRC_HMNC_GAIN -122 0x0001 //RX_TDDRC_SMT_FLAG -123 0x0CCD //RX_TDDRC_SMT_W -124 0x0360 //RX_TDDRC_DRC_GAIN -38 0x0030 //RX_FDEQ_SUBNUM -39 0x4848 //RX_FDEQ_GAIN_0 -40 0x4848 //RX_FDEQ_GAIN_1 -41 0x4844 //RX_FDEQ_GAIN_2 -42 0x4A4C //RX_FDEQ_GAIN_3 -43 0x4E50 //RX_FDEQ_GAIN_4 -44 0x5254 //RX_FDEQ_GAIN_5 -45 0x5658 //RX_FDEQ_GAIN_6 -46 0x5A5C //RX_FDEQ_GAIN_7 -47 0x5C5C //RX_FDEQ_GAIN_8 -48 0x5C5C //RX_FDEQ_GAIN_9 -49 0x5C5C //RX_FDEQ_GAIN_10 -50 0x5C48 //RX_FDEQ_GAIN_11 -51 0x4848 //RX_FDEQ_GAIN_12 -52 0x4848 //RX_FDEQ_GAIN_13 -53 0x4848 //RX_FDEQ_GAIN_14 -54 0x4848 //RX_FDEQ_GAIN_15 -55 0x4848 //RX_FDEQ_GAIN_16 -56 0x4848 //RX_FDEQ_GAIN_17 -57 0x4848 //RX_FDEQ_GAIN_18 -58 0x4848 //RX_FDEQ_GAIN_19 -59 0x4848 //RX_FDEQ_GAIN_20 -60 0x4848 //RX_FDEQ_GAIN_21 -61 0x4848 //RX_FDEQ_GAIN_22 -62 0x4848 //RX_FDEQ_GAIN_23 -63 0x0202 //RX_FDEQ_BIN_0 -64 0x0203 //RX_FDEQ_BIN_1 -65 0x0402 //RX_FDEQ_BIN_2 -66 0x0303 //RX_FDEQ_BIN_3 -67 0x0303 //RX_FDEQ_BIN_4 -68 0x0303 //RX_FDEQ_BIN_5 -69 0x0303 //RX_FDEQ_BIN_6 -70 0x0303 //RX_FDEQ_BIN_7 -71 0x0A0A //RX_FDEQ_BIN_8 -72 0x0A0E //RX_FDEQ_BIN_9 -73 0x0000 //RX_FDEQ_BIN_10 -74 0x0000 //RX_FDEQ_BIN_11 -75 0x0000 //RX_FDEQ_BIN_12 -76 0x0000 //RX_FDEQ_BIN_13 -77 0x0000 //RX_FDEQ_BIN_14 -78 0x0000 //RX_FDEQ_BIN_15 -79 0x0000 //RX_FDEQ_BIN_16 -80 0x0000 //RX_FDEQ_BIN_17 -81 0x0000 //RX_FDEQ_BIN_18 -82 0x0000 //RX_FDEQ_BIN_19 -83 0x0000 //RX_FDEQ_BIN_20 -84 0x0000 //RX_FDEQ_BIN_21 -85 0x0000 //RX_FDEQ_BIN_22 -86 0x0000 //RX_FDEQ_BIN_23 -87 0x4000 //RX_FDEQ_RESRV_0 -88 0x0320 //RX_FDEQ_RESRV_1 -89 0x0018 //RX_FDDRC_BAND_MARGIN_0 -90 0x0030 //RX_FDDRC_BAND_MARGIN_1 -91 0x0050 //RX_FDDRC_BAND_MARGIN_2 -92 0x0080 //RX_FDDRC_BAND_MARGIN_3 -93 0x0007 //RX_FDDRC_BLOCK_EXP -94 0x5000 //RX_FDDRC_THRD_2_0 -95 0x5000 //RX_FDDRC_THRD_2_1 -96 0x5000 //RX_FDDRC_THRD_2_2 -97 0x5000 //RX_FDDRC_THRD_2_3 -98 0x6400 //RX_FDDRC_THRD_3_0 -99 0x6400 //RX_FDDRC_THRD_3_1 -100 0x6400 //RX_FDDRC_THRD_3_2 -101 0x6400 //RX_FDDRC_THRD_3_3 -102 0x2000 //RX_FDDRC_SLANT_0_0 -103 0x2000 //RX_FDDRC_SLANT_0_1 -104 0x2000 //RX_FDDRC_SLANT_0_2 -105 0x2000 //RX_FDDRC_SLANT_0_3 -106 0x5333 //RX_FDDRC_SLANT_1_0 -107 0x5333 //RX_FDDRC_SLANT_1_1 -108 0x5333 //RX_FDDRC_SLANT_1_2 -109 0x5333 //RX_FDDRC_SLANT_1_3 -110 0x0000 //RX_FDDRC_RESRV_0 -129 0x0100 //RX_SPK_VOL -130 0x0000 //RX_VOL_RESRV_0 -#VOL 4 -6 0x1000 //RX_TDDRC_ALPHA_UP_1 -7 0x1000 //RX_TDDRC_ALPHA_UP_2 -8 0x1000 //RX_TDDRC_ALPHA_UP_3 -9 0x1000 //RX_TDDRC_ALPHA_UP_4 -27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 -28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 -29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 -32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 -33 0x7000 //RX_TDDRC_LIMITER_THRD -34 0x0800 //RX_TDDRC_LIMITER_GAIN -112 0x0000 //RX_TDDRC_THRD_0 -113 0x0000 //RX_TDDRC_THRD_1 -114 0x1800 //RX_TDDRC_THRD_2 -115 0x1800 //RX_TDDRC_THRD_3 -116 0x3000 //RX_TDDRC_SLANT_0 -117 0x6E00 //RX_TDDRC_SLANT_1 -118 0x1000 //RX_TDDRC_ALPHA_UP_0 -119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 -120 0x0000 //RX_TDDRC_HMNC_FLAG -121 0x199A //RX_TDDRC_HMNC_GAIN -122 0x0001 //RX_TDDRC_SMT_FLAG -123 0x0CCD //RX_TDDRC_SMT_W -124 0x0360 //RX_TDDRC_DRC_GAIN -38 0x0030 //RX_FDEQ_SUBNUM -39 0x4848 //RX_FDEQ_GAIN_0 -40 0x4848 //RX_FDEQ_GAIN_1 -41 0x4844 //RX_FDEQ_GAIN_2 -42 0x4A4C //RX_FDEQ_GAIN_3 -43 0x4E50 //RX_FDEQ_GAIN_4 -44 0x5254 //RX_FDEQ_GAIN_5 -45 0x5658 //RX_FDEQ_GAIN_6 -46 0x5A5C //RX_FDEQ_GAIN_7 -47 0x5C5C //RX_FDEQ_GAIN_8 -48 0x5C5C //RX_FDEQ_GAIN_9 -49 0x5C5C //RX_FDEQ_GAIN_10 -50 0x5C48 //RX_FDEQ_GAIN_11 -51 0x4848 //RX_FDEQ_GAIN_12 -52 0x4848 //RX_FDEQ_GAIN_13 -53 0x4848 //RX_FDEQ_GAIN_14 -54 0x4848 //RX_FDEQ_GAIN_15 -55 0x4848 //RX_FDEQ_GAIN_16 -56 0x4848 //RX_FDEQ_GAIN_17 -57 0x4848 //RX_FDEQ_GAIN_18 -58 0x4848 //RX_FDEQ_GAIN_19 -59 0x4848 //RX_FDEQ_GAIN_20 -60 0x4848 //RX_FDEQ_GAIN_21 -61 0x4848 //RX_FDEQ_GAIN_22 -62 0x4848 //RX_FDEQ_GAIN_23 -63 0x0202 //RX_FDEQ_BIN_0 -64 0x0203 //RX_FDEQ_BIN_1 -65 0x0402 //RX_FDEQ_BIN_2 -66 0x0303 //RX_FDEQ_BIN_3 -67 0x0303 //RX_FDEQ_BIN_4 -68 0x0303 //RX_FDEQ_BIN_5 -69 0x0303 //RX_FDEQ_BIN_6 -70 0x0303 //RX_FDEQ_BIN_7 -71 0x0A0A //RX_FDEQ_BIN_8 -72 0x0A0E //RX_FDEQ_BIN_9 -73 0x0000 //RX_FDEQ_BIN_10 -74 0x0000 //RX_FDEQ_BIN_11 -75 0x0000 //RX_FDEQ_BIN_12 -76 0x0000 //RX_FDEQ_BIN_13 -77 0x0000 //RX_FDEQ_BIN_14 -78 0x0000 //RX_FDEQ_BIN_15 -79 0x0000 //RX_FDEQ_BIN_16 -80 0x0000 //RX_FDEQ_BIN_17 -81 0x0000 //RX_FDEQ_BIN_18 -82 0x0000 //RX_FDEQ_BIN_19 -83 0x0000 //RX_FDEQ_BIN_20 -84 0x0000 //RX_FDEQ_BIN_21 -85 0x0000 //RX_FDEQ_BIN_22 -86 0x0000 //RX_FDEQ_BIN_23 -87 0x4000 //RX_FDEQ_RESRV_0 -88 0x0320 //RX_FDEQ_RESRV_1 -89 0x0018 //RX_FDDRC_BAND_MARGIN_0 -90 0x0030 //RX_FDDRC_BAND_MARGIN_1 -91 0x0050 //RX_FDDRC_BAND_MARGIN_2 -92 0x0080 //RX_FDDRC_BAND_MARGIN_3 -93 0x0007 //RX_FDDRC_BLOCK_EXP -94 0x5000 //RX_FDDRC_THRD_2_0 -95 0x5000 //RX_FDDRC_THRD_2_1 -96 0x5000 //RX_FDDRC_THRD_2_2 -97 0x5000 //RX_FDDRC_THRD_2_3 -98 0x6400 //RX_FDDRC_THRD_3_0 -99 0x6400 //RX_FDDRC_THRD_3_1 -100 0x6400 //RX_FDDRC_THRD_3_2 -101 0x6400 //RX_FDDRC_THRD_3_3 -102 0x2000 //RX_FDDRC_SLANT_0_0 -103 0x2000 //RX_FDDRC_SLANT_0_1 -104 0x2000 //RX_FDDRC_SLANT_0_2 -105 0x2000 //RX_FDDRC_SLANT_0_3 -106 0x5333 //RX_FDDRC_SLANT_1_0 -107 0x5333 //RX_FDDRC_SLANT_1_1 -108 0x5333 //RX_FDDRC_SLANT_1_2 -109 0x5333 //RX_FDDRC_SLANT_1_3 -110 0x0000 //RX_FDDRC_RESRV_0 -129 0x0100 //RX_SPK_VOL -130 0x0000 //RX_VOL_RESRV_0 -#VOL 5 -6 0x1000 //RX_TDDRC_ALPHA_UP_1 -7 0x1000 //RX_TDDRC_ALPHA_UP_2 -8 0x1000 //RX_TDDRC_ALPHA_UP_3 -9 0x1000 //RX_TDDRC_ALPHA_UP_4 -27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 -28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 -29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 -32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 -33 0x7000 //RX_TDDRC_LIMITER_THRD -34 0x0800 //RX_TDDRC_LIMITER_GAIN -112 0x0000 //RX_TDDRC_THRD_0 -113 0x0000 //RX_TDDRC_THRD_1 -114 0x1800 //RX_TDDRC_THRD_2 -115 0x1800 //RX_TDDRC_THRD_3 -116 0x3000 //RX_TDDRC_SLANT_0 -117 0x6E00 //RX_TDDRC_SLANT_1 -118 0x1000 //RX_TDDRC_ALPHA_UP_0 -119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 -120 0x0000 //RX_TDDRC_HMNC_FLAG -121 0x199A //RX_TDDRC_HMNC_GAIN -122 0x0001 //RX_TDDRC_SMT_FLAG -123 0x0CCD //RX_TDDRC_SMT_W -124 0x0360 //RX_TDDRC_DRC_GAIN -38 0x0030 //RX_FDEQ_SUBNUM -39 0x4848 //RX_FDEQ_GAIN_0 -40 0x4848 //RX_FDEQ_GAIN_1 -41 0x4844 //RX_FDEQ_GAIN_2 -42 0x4A4C //RX_FDEQ_GAIN_3 -43 0x4E50 //RX_FDEQ_GAIN_4 -44 0x5254 //RX_FDEQ_GAIN_5 -45 0x5658 //RX_FDEQ_GAIN_6 -46 0x5A5C //RX_FDEQ_GAIN_7 -47 0x5C5C //RX_FDEQ_GAIN_8 -48 0x5C5C //RX_FDEQ_GAIN_9 -49 0x5C5C //RX_FDEQ_GAIN_10 -50 0x5C48 //RX_FDEQ_GAIN_11 -51 0x4848 //RX_FDEQ_GAIN_12 -52 0x4848 //RX_FDEQ_GAIN_13 -53 0x4848 //RX_FDEQ_GAIN_14 -54 0x4848 //RX_FDEQ_GAIN_15 -55 0x4848 //RX_FDEQ_GAIN_16 -56 0x4848 //RX_FDEQ_GAIN_17 -57 0x4848 //RX_FDEQ_GAIN_18 -58 0x4848 //RX_FDEQ_GAIN_19 -59 0x4848 //RX_FDEQ_GAIN_20 -60 0x4848 //RX_FDEQ_GAIN_21 -61 0x4848 //RX_FDEQ_GAIN_22 -62 0x4848 //RX_FDEQ_GAIN_23 -63 0x0202 //RX_FDEQ_BIN_0 -64 0x0203 //RX_FDEQ_BIN_1 -65 0x0402 //RX_FDEQ_BIN_2 -66 0x0303 //RX_FDEQ_BIN_3 -67 0x0303 //RX_FDEQ_BIN_4 -68 0x0303 //RX_FDEQ_BIN_5 -69 0x0303 //RX_FDEQ_BIN_6 -70 0x0303 //RX_FDEQ_BIN_7 -71 0x0A0A //RX_FDEQ_BIN_8 -72 0x0A0E //RX_FDEQ_BIN_9 -73 0x0000 //RX_FDEQ_BIN_10 -74 0x0000 //RX_FDEQ_BIN_11 -75 0x0000 //RX_FDEQ_BIN_12 -76 0x0000 //RX_FDEQ_BIN_13 -77 0x0000 //RX_FDEQ_BIN_14 -78 0x0000 //RX_FDEQ_BIN_15 -79 0x0000 //RX_FDEQ_BIN_16 -80 0x0000 //RX_FDEQ_BIN_17 -81 0x0000 //RX_FDEQ_BIN_18 -82 0x0000 //RX_FDEQ_BIN_19 -83 0x0000 //RX_FDEQ_BIN_20 -84 0x0000 //RX_FDEQ_BIN_21 -85 0x0000 //RX_FDEQ_BIN_22 -86 0x0000 //RX_FDEQ_BIN_23 -87 0x4000 //RX_FDEQ_RESRV_0 -88 0x0320 //RX_FDEQ_RESRV_1 -89 0x0018 //RX_FDDRC_BAND_MARGIN_0 -90 0x0030 //RX_FDDRC_BAND_MARGIN_1 -91 0x0050 //RX_FDDRC_BAND_MARGIN_2 -92 0x0080 //RX_FDDRC_BAND_MARGIN_3 -93 0x0007 //RX_FDDRC_BLOCK_EXP -94 0x5000 //RX_FDDRC_THRD_2_0 -95 0x5000 //RX_FDDRC_THRD_2_1 -96 0x5000 //RX_FDDRC_THRD_2_2 -97 0x5000 //RX_FDDRC_THRD_2_3 -98 0x6400 //RX_FDDRC_THRD_3_0 -99 0x6400 //RX_FDDRC_THRD_3_1 -100 0x6400 //RX_FDDRC_THRD_3_2 -101 0x6400 //RX_FDDRC_THRD_3_3 -102 0x2000 //RX_FDDRC_SLANT_0_0 -103 0x2000 //RX_FDDRC_SLANT_0_1 -104 0x2000 //RX_FDDRC_SLANT_0_2 -105 0x2000 //RX_FDDRC_SLANT_0_3 -106 0x5333 //RX_FDDRC_SLANT_1_0 -107 0x5333 //RX_FDDRC_SLANT_1_1 -108 0x5333 //RX_FDDRC_SLANT_1_2 -109 0x5333 //RX_FDDRC_SLANT_1_3 -110 0x0000 //RX_FDDRC_RESRV_0 -129 0x0100 //RX_SPK_VOL -130 0x0000 //RX_VOL_RESRV_0 -#VOL 6 -6 0x1000 //RX_TDDRC_ALPHA_UP_1 -7 0x1000 //RX_TDDRC_ALPHA_UP_2 -8 0x1000 //RX_TDDRC_ALPHA_UP_3 -9 0x1000 //RX_TDDRC_ALPHA_UP_4 -27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 -28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 -29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 -32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 -33 0x7000 //RX_TDDRC_LIMITER_THRD -34 0x0800 //RX_TDDRC_LIMITER_GAIN -112 0x0000 //RX_TDDRC_THRD_0 -113 0x0000 //RX_TDDRC_THRD_1 -114 0x1800 //RX_TDDRC_THRD_2 -115 0x1800 //RX_TDDRC_THRD_3 -116 0x3000 //RX_TDDRC_SLANT_0 -117 0x6E00 //RX_TDDRC_SLANT_1 -118 0x1000 //RX_TDDRC_ALPHA_UP_0 -119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 -120 0x0000 //RX_TDDRC_HMNC_FLAG -121 0x199A //RX_TDDRC_HMNC_GAIN -122 0x0001 //RX_TDDRC_SMT_FLAG -123 0x0CCD //RX_TDDRC_SMT_W -124 0x0360 //RX_TDDRC_DRC_GAIN -38 0x0030 //RX_FDEQ_SUBNUM -39 0x4848 //RX_FDEQ_GAIN_0 -40 0x4848 //RX_FDEQ_GAIN_1 -41 0x4844 //RX_FDEQ_GAIN_2 -42 0x4A4C //RX_FDEQ_GAIN_3 -43 0x4E50 //RX_FDEQ_GAIN_4 -44 0x5254 //RX_FDEQ_GAIN_5 -45 0x5658 //RX_FDEQ_GAIN_6 -46 0x5A5C //RX_FDEQ_GAIN_7 -47 0x5C5C //RX_FDEQ_GAIN_8 -48 0x5C5C //RX_FDEQ_GAIN_9 -49 0x5C5C //RX_FDEQ_GAIN_10 -50 0x5C48 //RX_FDEQ_GAIN_11 -51 0x4848 //RX_FDEQ_GAIN_12 -52 0x4848 //RX_FDEQ_GAIN_13 -53 0x4848 //RX_FDEQ_GAIN_14 -54 0x4848 //RX_FDEQ_GAIN_15 -55 0x4848 //RX_FDEQ_GAIN_16 -56 0x4848 //RX_FDEQ_GAIN_17 -57 0x4848 //RX_FDEQ_GAIN_18 -58 0x4848 //RX_FDEQ_GAIN_19 -59 0x4848 //RX_FDEQ_GAIN_20 -60 0x4848 //RX_FDEQ_GAIN_21 -61 0x4848 //RX_FDEQ_GAIN_22 -62 0x4848 //RX_FDEQ_GAIN_23 -63 0x0202 //RX_FDEQ_BIN_0 -64 0x0203 //RX_FDEQ_BIN_1 -65 0x0402 //RX_FDEQ_BIN_2 -66 0x0303 //RX_FDEQ_BIN_3 -67 0x0303 //RX_FDEQ_BIN_4 -68 0x0303 //RX_FDEQ_BIN_5 -69 0x0303 //RX_FDEQ_BIN_6 -70 0x0303 //RX_FDEQ_BIN_7 -71 0x0A0A //RX_FDEQ_BIN_8 -72 0x0A0E //RX_FDEQ_BIN_9 -73 0x0000 //RX_FDEQ_BIN_10 -74 0x0000 //RX_FDEQ_BIN_11 -75 0x0000 //RX_FDEQ_BIN_12 -76 0x0000 //RX_FDEQ_BIN_13 -77 0x0000 //RX_FDEQ_BIN_14 -78 0x0000 //RX_FDEQ_BIN_15 -79 0x0000 //RX_FDEQ_BIN_16 -80 0x0000 //RX_FDEQ_BIN_17 -81 0x0000 //RX_FDEQ_BIN_18 -82 0x0000 //RX_FDEQ_BIN_19 -83 0x0000 //RX_FDEQ_BIN_20 -84 0x0000 //RX_FDEQ_BIN_21 -85 0x0000 //RX_FDEQ_BIN_22 -86 0x0000 //RX_FDEQ_BIN_23 -87 0x4000 //RX_FDEQ_RESRV_0 -88 0x0320 //RX_FDEQ_RESRV_1 -89 0x0018 //RX_FDDRC_BAND_MARGIN_0 -90 0x0030 //RX_FDDRC_BAND_MARGIN_1 -91 0x0050 //RX_FDDRC_BAND_MARGIN_2 -92 0x0080 //RX_FDDRC_BAND_MARGIN_3 -93 0x0007 //RX_FDDRC_BLOCK_EXP -94 0x5000 //RX_FDDRC_THRD_2_0 -95 0x5000 //RX_FDDRC_THRD_2_1 -96 0x5000 //RX_FDDRC_THRD_2_2 -97 0x5000 //RX_FDDRC_THRD_2_3 -98 0x6400 //RX_FDDRC_THRD_3_0 -99 0x6400 //RX_FDDRC_THRD_3_1 -100 0x6400 //RX_FDDRC_THRD_3_2 -101 0x6400 //RX_FDDRC_THRD_3_3 -102 0x2000 //RX_FDDRC_SLANT_0_0 -103 0x2000 //RX_FDDRC_SLANT_0_1 -104 0x2000 //RX_FDDRC_SLANT_0_2 -105 0x2000 //RX_FDDRC_SLANT_0_3 -106 0x5333 //RX_FDDRC_SLANT_1_0 -107 0x5333 //RX_FDDRC_SLANT_1_1 -108 0x5333 //RX_FDDRC_SLANT_1_2 -109 0x5333 //RX_FDDRC_SLANT_1_3 -110 0x0000 //RX_FDDRC_RESRV_0 -129 0x0100 //RX_SPK_VOL -130 0x0000 //RX_VOL_RESRV_0 - -#CASE_NAME HANDSET-HANDSET_HAC-VOICE_GENERIC-WB -#PARAM_TYPE TX+RX -#TOTAL_CUSTOM_STEP 7 -#TX -0 0x0000 //TX_OPERATION_MODE_0 -1 0x0000 //TX_OPERATION_MODE_1 -2 0x0036 //TX_PATCH_REG -3 0x2F7E //TX_SENDFUNC_MODE_0 -4 0x0001 //TX_SENDFUNC_MODE_1 -5 0x0002 //TX_NUM_MIC -6 0x0001 //TX_SAMPLINGFREQ_SIG -7 0x0001 //TX_SAMPLINGFREQ_PROC -8 0x000A //TX_FRAME_SZ_SIG -9 0x000A //TX_FRAME_SZ -10 0x0000 //TX_DELAY_OPT -11 0x0028 //TX_MAX_TAIL_LENGTH -12 0x0001 //TX_NUM_LOUTCHN -13 0x0001 //TX_MAXNUM_AECREF -14 0x0000 //TX_DBG_FUNC_REG -15 0x0000 //TX_DBG_FUNC_REG1 -16 0x0000 //TX_SYS_RESRV_0 -17 0x0000 //TX_SYS_RESRV_1 -18 0x0000 //TX_SYS_RESRV_2 -19 0x0000 //TX_SYS_RESRV_3 -20 0x0000 //TX_DIST2REF0 -21 0x009D //TX_DIST2REF1 -22 0x0000 //TX_DIST2REF_02 -23 0x0000 //TX_DIST2REF_03 -24 0x0000 //TX_DIST2REF_04 -25 0x0000 //TX_DIST2REF_05 -26 0x0000 //TX_MMIC -27 0x1000 //TX_PGA_0 -28 0x1000 //TX_PGA_1 -29 0x1000 //TX_PGA_2 -30 0x0000 //TX_PGA_3 -31 0x0000 //TX_PGA_4 -32 0x0000 //TX_PGA_5 -33 0x0000 //TX_MIC_PAIRS -34 0x0000 //TX_MIC_PAIRS_HS -35 0x0002 //TX_MICS_FOR_BF -36 0x0000 //TX_MIC_PAIRS_FORL1 -37 0x0002 //TX_MICS_OF_PAIR0 -38 0x0002 //TX_MICS_OF_PAIR1 -39 0x0002 //TX_MICS_OF_PAIR2 -40 0x0002 //TX_MICS_OF_PAIR3 -41 0x0000 //TX_MIC_DATA_SRC0 -42 0x0002 //TX_MIC_DATA_SRC1 -43 0x0001 //TX_MIC_DATA_SRC2 -44 0x0000 //TX_MIC_DATA_SRC3 -45 0x0000 //TX_MIC_PAIR_CH_04 -46 0x0000 //TX_MIC_PAIR_CH_05 -47 0x0000 //TX_MIC_PAIR_CH_10 -48 0x0000 //TX_MIC_PAIR_CH_11 -49 0x0000 //TX_MIC_PAIR_CH_12 -50 0x0000 //TX_MIC_PAIR_CH_13 -51 0x0000 //TX_MIC_PAIR_CH_14 -52 0x05DC //TX_HD_BIN_MASK -53 0x0010 //TX_HD_SUBAND_MASK -54 0x19A1 //TX_HD_FRAME_AVG_MASK -55 0x0320 //TX_HD_MIN_FRQ -56 0x1000 //TX_HD_ALPHA_PSD -57 0x1100 //TX_T_PHPR1 -58 0x0000 //TX_T_PHPR2 -59 0x0000 //TX_T_PTPR -60 0x0000 //TX_T_PNPR -61 0x0000 //TX_T_PAPR1 -62 0xEE6C //TX_T_PSDVAT -63 0x0800 //TX_CNT -64 0x4000 //TX_ANTI_HOWL_GAIN -65 0x0001 //TX_MICFORBFMARK_0 -66 0x0001 //TX_MICFORBFMARK_1 -67 0x0001 //TX_MICFORBFMARK_2 -68 0x0001 //TX_MICFORBFMARK_3 -69 0x0001 //TX_MICFORBFMARK_4 -70 0x0001 //TX_MICFORBFMARK_5 -71 0x0000 //TX_DIST2REF_10 -72 0x3A66 //TX_DIST2REF_11 -73 0x0000 //TX_DIST2REF2 -74 0x0000 //TX_DIST2REF_13 -75 0x0000 //TX_DIST2REF_14 -76 0x0000 //TX_DIST2REF_15 -77 0x0000 //TX_DIST2REF_20 -78 0x0000 //TX_DIST2REF_21 -79 0x0000 //TX_DIST2REF_22 -80 0x0000 //TX_DIST2REF_23 -81 0x0000 //TX_DIST2REF_24 -82 0x0000 //TX_DIST2REF_25 -83 0x0000 //TX_DIST2REF_30 -84 0x0000 //TX_DIST2REF_31 -85 0x0000 //TX_DIST2REF_32 -86 0x0000 //TX_DIST2REF_33 -87 0x0000 //TX_DIST2REF_34 -88 0x0000 //TX_DIST2REF_35 -89 0x0000 //TX_MIC_LOC_00 -90 0x0000 //TX_MIC_LOC_01 -91 0x0000 //TX_MIC_LOC_02 -92 0x0000 //TX_MIC_LOC_03 -93 0x0000 //TX_MIC_LOC_04 -94 0x0000 //TX_MIC_LOC_05 -95 0x0000 //TX_MIC_LOC_10 -96 0x0000 //TX_MIC_LOC_11 -97 0x0000 //TX_MIC_LOC_12 -98 0x0000 //TX_MIC_LOC_13 -99 0x0000 //TX_MIC_LOC_14 -100 0x0000 //TX_MIC_LOC_15 -101 0x0000 //TX_MIC_LOC_20 -102 0x0000 //TX_MIC_LOC_21 -103 0x0000 //TX_MIC_LOC_22 -104 0x0000 //TX_MIC_LOC_23 -105 0x0000 //TX_MIC_LOC_24 -106 0x0000 //TX_MIC_LOC_25 -107 0x0800 //TX_MIC_REFBLK_VOLUME -108 0x0AAC //TX_MIC_BLOCK_VOLUME -109 0x0000 //TX_INVERSE_MASK -110 0x0000 //TX_ADCS_MASK -111 0x04D0 //TX_ADCS_GAIN -112 0x4000 //TX_NFC_GAINFAC -113 0x0000 //TX_MAINMIC_BLKFACTOR -114 0x0000 //TX_REFMIC_BLKFACTOR -115 0x0000 //TX_BLMIC_BLKFACTOR -116 0x0000 //TX_BRMIC_BLKFACTOR -117 0x0031 //TX_MICBLK_START_BIN -118 0x0060 //TX_MICBLK_END_BIN -119 0x0015 //TX_MICBLK_FE_HOLD -120 0xFFF2 //TX_MICBLK_MR_EXP_TH -121 0xFFF2 //TX_MICBLK_LR_EXP_TH -122 0x0000 //TX_FENE_HOLD -123 0x4000 //TX_FE_ENER_TH_MTS -124 0x0004 //TX_FE_ENER_TH_EXP -125 0x6000 //TX_C_POST_FLT_MIC_MAINBLK -126 0x6000 //TX_C_POST_FLT_MIC_REFBLK -127 0x0010 //TX_MIC_BLOCK_N -128 0x7B02 //TX_A_HP -129 0x4000 //TX_B_PE -130 0x1800 //TX_THR_PITCH_DET_0 -131 0x1000 //TX_THR_PITCH_DET_1 -132 0x0800 //TX_THR_PITCH_DET_2 -133 0x0008 //TX_PITCH_BFR_LEN -134 0x0003 //TX_SBD_PITCH_DET -135 0x0050 //TX_TD_AEC_L -136 0x4000 //TX_MU0_UNP_TD_AEC -137 0x1000 //TX_MU0_PTD_TD_AEC -138 0x0000 //TX_PP_RESRV_0 -139 0x2A94 //TX_PP_RESRV_1 -140 0x55F0 //TX_PP_RESRV_2 -141 0x0000 //TX_PP_RESRV_3 -142 0x0000 //TX_PP_RESRV_4 -143 0x0000 //TX_PP_RESRV_5 -144 0x0000 //TX_PP_RESRV_6 -145 0x0000 //TX_PP_RESRV_7 -146 0x0028 //TX_TAIL_LENGTH -147 0x0800 //TX_AEC_REF_GAIN_0 -148 0x0800 //TX_AEC_REF_GAIN_1 -149 0x0800 //TX_AEC_REF_GAIN_2 -150 0x6000 //TX_EAD_THR -151 0x2000 //TX_THR_RE_EST -152 0x0100 //TX_MIN_EQ_RE_EST_0 -153 0x0100 //TX_MIN_EQ_RE_EST_1 -154 0x0100 //TX_MIN_EQ_RE_EST_2 -155 0x0200 //TX_MIN_EQ_RE_EST_3 -156 0x0200 //TX_MIN_EQ_RE_EST_4 -157 0x0200 //TX_MIN_EQ_RE_EST_5 -158 0x0200 //TX_MIN_EQ_RE_EST_6 -159 0x0200 //TX_MIN_EQ_RE_EST_7 -160 0x1000 //TX_MIN_EQ_RE_EST_8 -161 0x1000 //TX_MIN_EQ_RE_EST_9 -162 0x1000 //TX_MIN_EQ_RE_EST_10 -163 0x0400 //TX_MIN_EQ_RE_EST_11 -164 0x1000 //TX_MIN_EQ_RE_EST_12 -165 0x3000 //TX_LAMBDA_RE_EST -166 0x1000 //TX_LAMBDA_CB_NLE -167 0x0400 //TX_C_POST_FLT -168 0x4000 //TX_GAIN_NP -169 0x003C //TX_SE_HOLD_N -170 0x0046 //TX_DT_HOLD_N -171 0x03E8 //TX_DT2_HOLD_N -172 0x6666 //TX_AEC_RESRV_0 -173 0x0000 //TX_AEC_RESRV_1 -174 0x0014 //TX_AEC_RESRV_2 -175 0x0000 //TX_MIC_DELAY_LENGTH -176 0x0000 //TX_REF_DELAY_LENGTH -177 0x0000 //TX_ADD_LINEIN_GAINL -178 0x0000 //TX_ADD_LINEIN_GAINH -179 0x0000 //TX_MIN_EQ_RE_EST_14 -180 0x0000 //TX_DTD_THR1_8 -181 0x7FFF //TX_DTD_THR2_8 -182 0x0000 //TX_DTD_MIC_BLK2 -183 0x0008 //TX_FRQ_LIN_LEN -184 0x7FFF //TX_FRQ_AEC_LEN_RHO -185 0x6000 //TX_MU0_UNP_FRQ_AEC -186 0x4000 //TX_MU0_PTD_FRQ_AEC -187 0x000A //TX_MINENOISETH -188 0x0800 //TX_MU0_RE_EST -189 0x0001 //TX_AEC_NUM_CH -190 0x0000 //TX_BIGECHOATTENUATION_MAX -191 0x2000 //TX_A_POST_FLT_MICBLK -192 0x0000 //TX_BLKENERTH -193 0x0000 //TX_BLKENERHIGHTH -194 0x0000 //TX_NORMENERTH -195 0x0000 //TX_NORMENERHIGHTH -196 0x0000 //TX_NORMENERHIGHTHL -197 0x7000 //TX_DTD_THR1_0 -198 0x7000 //TX_DTD_THR1_1 -199 0x7000 //TX_DTD_THR1_2 -200 0x7F00 //TX_DTD_THR1_3 -201 0x7F00 //TX_DTD_THR1_4 -202 0x7F00 //TX_DTD_THR1_5 -203 0x7F00 //TX_DTD_THR1_6 -204 0x2000 //TX_DTD_THR2_0 -205 0x2000 //TX_DTD_THR2_1 -206 0x2000 //TX_DTD_THR2_2 -207 0x1000 //TX_DTD_THR2_3 -208 0x1000 //TX_DTD_THR2_4 -209 0x1000 //TX_DTD_THR2_5 -210 0x1000 //TX_DTD_THR2_6 -211 0x7FFF //TX_DTD_THR3 -212 0x0000 //TX_SPK_CUT_K -213 0x1B58 //TX_DT_CUT_K -214 0x0100 //TX_DT_CUT_THR -215 0x04EB //TX_COMFORT_G -216 0x01F4 //TX_POWER_YOUT_TH -217 0x4000 //TX_FDPFGAINECHO -218 0x0000 //TX_DTD_HD_THR -219 0x0000 //TX_SPK_CUT_K_S -220 0x0000 //TX_DTD_MIC_BLK -221 0x0400 //TX_ADPT_STRICT_L -222 0x0200 //TX_ADPT_STRICT_H -223 0x0000 //TX_RATIO_DT_L_TH_LOW -224 0x0000 //TX_RATIO_DT_H_TH_LOW -225 0x0000 //TX_RATIO_DT_L_TH_HIGH -226 0x0000 //TX_RATIO_DT_H_TH_HIGH -227 0x0000 //TX_RATIO_DT_L0_TH -228 0x2000 //TX_B_POST_FILT_ECHO_L -229 0x2000 //TX_B_POST_FILT_ECHO_H -230 0x0200 //TX_MIN_G_CTRL_ECHO -231 0x7FFF //TX_B_LESSCUT_RTO_ECHO -232 0x0000 //TX_EPD_OFFSET_00 -233 0x0000 //TX_EPD_OFFST_01 -234 0x0000 //TX_RATIO_DT_L0_TH_HIGH -235 0x3A98 //TX_RATIO_DT_H_TH_CUT -236 0x7FFF //TX_MIN_EQ_RE_EST_13 -237 0x0000 //TX_DTD_THR1_7 -238 0x0000 //TX_DTD_THR2_7 -239 0x0800 //TX_DT_RESRV_7 -240 0x0800 //TX_DT_RESRV_8 -241 0x0000 //TX_DT_RESRV_9 -242 0xF600 //TX_THR_SN_EST_0 -243 0xFA00 //TX_THR_SN_EST_1 -244 0xFB00 //TX_THR_SN_EST_2 -245 0xF800 //TX_THR_SN_EST_3 -246 0xFA00 //TX_THR_SN_EST_4 -247 0xF800 //TX_THR_SN_EST_5 -248 0xF800 //TX_THR_SN_EST_6 -249 0xF700 //TX_THR_SN_EST_7 -250 0x0000 //TX_DELTA_THR_SN_EST_0 -251 0x0100 //TX_DELTA_THR_SN_EST_1 -252 0x01A0 //TX_DELTA_THR_SN_EST_2 -253 0x0200 //TX_DELTA_THR_SN_EST_3 -254 0x0200 //TX_DELTA_THR_SN_EST_4 -255 0x0100 //TX_DELTA_THR_SN_EST_5 -256 0x0200 //TX_DELTA_THR_SN_EST_6 -257 0x0200 //TX_DELTA_THR_SN_EST_7 -258 0x4000 //TX_LAMBDA_NN_EST_0 -259 0x4000 //TX_LAMBDA_NN_EST_1 -260 0x5000 //TX_LAMBDA_NN_EST_2 -261 0x4000 //TX_LAMBDA_NN_EST_3 -262 0x4000 //TX_LAMBDA_NN_EST_4 -263 0x4000 //TX_LAMBDA_NN_EST_5 -264 0x4000 //TX_LAMBDA_NN_EST_6 -265 0x4000 //TX_LAMBDA_NN_EST_7 -266 0x0400 //TX_N_SN_EST -267 0x001E //TX_INBEAM_T -268 0x0041 //TX_INBEAMHOLDT -269 0x2000 //TX_G_STRICT -270 0x0000 //TX_EQ_THR_BF -271 0x799A //TX_LAMBDA_EQ_BF -272 0x1000 //TX_NE_RTO_TH -273 0x1000 //TX_NE_RTO_TH_L -274 0x2000 //TX_MAINREFRTOH_TH_H -275 0x1400 //TX_MAINREFRTOH_TH_L -276 0x2000 //TX_MAINREFRTO_TH_H -277 0x1400 //TX_MAINREFRTO_TH_L -278 0x0000 //TX_MAINREFRTO_TH_EQ -279 0x1000 //TX_B_POST_FLT_0 -280 0x4000 //TX_B_POST_FLT_1 -281 0x0018 //TX_NS_LVL_CTRL_0 -282 0x001C //TX_NS_LVL_CTRL_1 -283 0x0019 //TX_NS_LVL_CTRL_2 -284 0x0018 //TX_NS_LVL_CTRL_3 -285 0x0019 //TX_NS_LVL_CTRL_4 -286 0x001A //TX_NS_LVL_CTRL_5 -287 0x001E //TX_NS_LVL_CTRL_6 -288 0x001C //TX_NS_LVL_CTRL_7 -289 0x000E //TX_MIN_GAIN_S_0 -290 0x0018 //TX_MIN_GAIN_S_1 -291 0x0012 //TX_MIN_GAIN_S_2 -292 0x0012 //TX_MIN_GAIN_S_3 -293 0x0012 //TX_MIN_GAIN_S_4 -294 0x0018 //TX_MIN_GAIN_S_5 -295 0x0018 //TX_MIN_GAIN_S_6 -296 0x0018 //TX_MIN_GAIN_S_7 -297 0x5000 //TX_NMOS_SUP -298 0x0000 //TX_NS_MAX_PRI_SNR_TH -299 0x0000 //TX_NMOS_SUP_MENSA -300 0x7FFF //TX_SNRI_SUP_0 -301 0x4000 //TX_SNRI_SUP_1 -302 0x5000 //TX_SNRI_SUP_2 -303 0x4000 //TX_SNRI_SUP_3 -304 0x4000 //TX_SNRI_SUP_4 -305 0x4000 //TX_SNRI_SUP_5 -306 0x4000 //TX_SNRI_SUP_6 -307 0x4000 //TX_SNRI_SUP_7 -308 0x4000 //TX_THR_LFNS -309 0x0018 //TX_G_LFNS -310 0x09C4 //TX_GAIN0_NTH -311 0x000A //TX_MUSIC_MORENS -312 0x7FFF //TX_A_POST_FILT_0 -313 0x2000 //TX_A_POST_FILT_1 -314 0x7000 //TX_A_POST_FILT_S_0 -315 0x7000 //TX_A_POST_FILT_S_1 -316 0x3000 //TX_A_POST_FILT_S_2 -317 0x3000 //TX_A_POST_FILT_S_3 -318 0x2000 //TX_A_POST_FILT_S_4 -319 0x7000 //TX_A_POST_FILT_S_5 -320 0x7000 //TX_A_POST_FILT_S_6 -321 0x7000 //TX_A_POST_FILT_S_7 -322 0x1000 //TX_B_POST_FILT_0 -323 0x4000 //TX_B_POST_FILT_1 -324 0x5000 //TX_B_POST_FILT_2 -325 0x4000 //TX_B_POST_FILT_3 -326 0x4000 //TX_B_POST_FILT_4 -327 0x4000 //TX_B_POST_FILT_5 -328 0x4000 //TX_B_POST_FILT_6 -329 0x4000 //TX_B_POST_FILT_7 -330 0x4000 //TX_B_LESSCUT_RTO_S_0 -331 0x6000 //TX_B_LESSCUT_RTO_S_1 -332 0x6000 //TX_B_LESSCUT_RTO_S_2 -333 0x6000 //TX_B_LESSCUT_RTO_S_3 -334 0x6000 //TX_B_LESSCUT_RTO_S_4 -335 0x6000 //TX_B_LESSCUT_RTO_S_5 -336 0x7FFF //TX_B_LESSCUT_RTO_S_6 -337 0x7FFF //TX_B_LESSCUT_RTO_S_7 -338 0x7C29 //TX_LAMBDA_PFILT -339 0x7C29 //TX_LAMBDA_PFILT_S_0 -340 0x7C29 //TX_LAMBDA_PFILT_S_1 -341 0x7C29 //TX_LAMBDA_PFILT_S_2 -342 0x7C29 //TX_LAMBDA_PFILT_S_3 -343 0x7C29 //TX_LAMBDA_PFILT_S_4 -344 0x7C29 //TX_LAMBDA_PFILT_S_5 -345 0x7C29 //TX_LAMBDA_PFILT_S_6 -346 0x7C29 //TX_LAMBDA_PFILT_S_7 -347 0x0200 //TX_K_PEPPER -348 0x0600 //TX_A_PEPPER -349 0x1D4C //TX_K_PEPPER_HF -350 0x0400 //TX_A_PEPPER_HF -351 0x0001 //TX_HMNC_BST_FLG -352 0x4000 //TX_HMNC_BST_THR -353 0x0800 //TX_DT_BINVAD_TH_0 -354 0x0800 //TX_DT_BINVAD_TH_1 -355 0x0800 //TX_DT_BINVAD_TH_2 -356 0x0800 //TX_DT_BINVAD_TH_3 -357 0x0000 //TX_DT_BINVAD_ENDF -358 0x1000 //TX_C_POST_FLT_DT -359 0x7FFF //TX_NS_B_POST_FLT_LESSCUT -360 0x0100 //TX_DT_BOOST -361 0x0000 //TX_BF_SGRAD_FLG -362 0x0005 //TX_BF_DVG_TH -363 0x001E //TX_SN_C_F -364 0x0000 //TX_K_APT -365 0x0001 //TX_NOISEDET -366 0x0190 //TX_NDETCT -367 0x000A //TX_NOISE_TH_0 -368 0x1B58 //TX_NOISE_TH_0_2 -369 0x2134 //TX_NOISE_TH_0_3 -370 0x0139 //TX_NOISE_TH_1 -371 0x0479 //TX_NOISE_TH_2 -372 0x2328 //TX_NOISE_TH_3 -373 0x4422 //TX_NOISE_TH_4 -374 0x5586 //TX_NOISE_TH_5 -375 0x4425 //TX_NOISE_TH_5_2 -376 0x0032 //TX_NOISE_TH_5_3 -377 0x4E20 //TX_NOISE_TH_5_4 -378 0x21E8 //TX_NOISE_TH_6 -379 0x0014 //TX_MINENOISE_TH -380 0x4000 //TX_MINENOISE_MIC0_TH_MTS -381 0xFFEE //TX_MINENOISE_MIC0_TH_EXP -382 0x6000 //TX_MINENOISE_MIC0_S_TH_MTS -383 0xFFF3 //TX_MINENOISE_MIC0_S_TH_EXP -384 0x00A5 //TX_OUT_ENER_S_TH_CLEAN -385 0x00A5 //TX_OUT_ENER_S_TH_LESSCLEAN -386 0x00A5 //TX_OUT_ENER_S_TH_NOISY -387 0x0029 //TX_OUT_ENER_TH_NOISE -388 0x00CE //TX_OUT_ENER_TH_SPEECH -389 0x2000 //TX_SN_NPB_GAIN -390 0x0000 //TX_NN_NPB_GAIN -391 0x0000 //TX_CSX_ALPHA_0 -392 0x0000 //TX_CSX_ALPHA_1 -393 0x0000 //TX_CSX_ALPHA_2 -394 0x0000 //TX_CSX_ALPHA_3 -395 0x0800 //TX_MU_ARSP_EST -396 0x00C8 //TX_P_OUTBEAM_MIN_TH -397 0x0002 //TX_EXTRA_NS_L -398 0x0800 //TX_EXTRA_NS_A -399 0x0005 //TX_VR_NOISE_FLOOR_TH -400 0x0148 //TX_MIN_G_LOW300HZ -401 0x0004 //TX_MAXLEVEL_CNG -402 0x00B4 //TX_STN_NOISE_TH -403 0x4000 //TX_POST_MASK_SUP -404 0x7FFF //TX_POST_MASK_ADJUST -405 0x00C8 //TX_NS_ENOISE_MIC0_TH -406 0x0014 //TX_MINENOISE_MIC0_TH -407 0x012C //TX_MINENOISE_MIC0_S_TH -408 0x4900 //TX_MIN_G_CTRL_SSNS -409 0x1000 //TX_METAL_RTO_THR -410 0x0FA0 //TX_NS_FP_K_METAL -411 0x3A98 //TX_NOISEDET_BOOST_TH -412 0x0FA0 //TX_NSMOOTH_TH -413 0x0000 //TX_NS_RESRV_8 -414 0x1800 //TX_RHO_UPB -415 0x2328 //TX_N_HOLD_HS -416 0x006E //TX_N_RHO_BFR0 -417 0x7FFF //TX_LAMBDA_ARSP_EST -418 0x0100 //TX_EXTRA_GAIN_MICBLOCK -419 0x0333 //TX_THR_STD_NSR -420 0x019A //TX_THR_STD_PLH -421 0x03E8 //TX_N_HOLD_STD -422 0x0066 //TX_THR_STD_RHO -423 0x2800 //TX_BF_RESET_THR_HS -424 0x0CCD //TX_SB_RTO_MEAN_TH -425 0x0300 //TX_SB_RHO_MEAN_TH_NTALK -426 0x1C00 //TX_SB_RTO_MEAN_TH_ABN -427 0x2EE0 //TX_SB_RTO_MEAN_TH_RUB -428 0x0000 //TX_WTA_EN_RTO_TH -429 0x1400 //TX_TOP_ENER_TH_F -430 0x0100 //TX_DESIRED_TALK_HOLDT -431 0x0800 //TX_MIC_BLOCK_FACTOR -432 0x0000 //TX_NSEST_BFRLRNRDC -433 0x0000 //TX_THR_POST_FLT_HS -434 0x0010 //TX_HS_VAD_BIN -435 0x2666 //TX_THR_VAD_HS -436 0x2CCD //TX_MEAN_RTO_MIN_TH2 -437 0x0032 //TX_SILENCE_T -438 0x0000 //TX_A_POST_FLT_WTA -439 0x799A //TX_LAMBDA_PFLT_WTA -440 0x05A8 //TX_SB_RHO_MEAN2_TH -441 0x0384 //TX_SB_RHO_MEAN3_TH -442 0x0000 //TX_HS_RESRV_4 -443 0x0000 //TX_HS_RESRV_5 -444 0x0001 //TX_DOA_VAD_THR_1 -445 0x003C //TX_DOA_VAD_THR_2 -446 0x0028 //TX_DOA_VAD_THR1_0 -447 0x0028 //TX_DOA_VAD_THR1_1 -448 0x0000 //TX_SRC_DOA_RNG_LOW_0A -449 0x001E //TX_SRC_DOA_RNG_HIGH_0A -450 0x005A //TX_DFLT_SRC_DOA_0A -451 0x0000 //TX_SRC_DOA_RNG_LOW_0B -452 0x0000 //TX_SRC_DOA_RNG_HIGH_0B -453 0x0000 //TX_DFLT_SRC_DOA_0B -454 0x0000 //TX_SRC_DOA_RNG_LOW_0C -455 0x0000 //TX_SRC_DOA_RNG_HIGH_0C -456 0x0000 //TX_DFLT_SRC_DOA_0C -457 0x0000 //TX_SRC_DOA_RNG_LOW_0D -458 0x0000 //TX_SRC_DOA_RNG_HIGH_0D -459 0x0000 //TX_DFLT_SRC_DOA_0D -460 0x0000 //TX_SRC_DOA_RNG_LOW_1A -461 0x00B4 //TX_SRC_DOA_RNG_HIGH_1A -462 0x005A //TX_DFLT_SRC_DOA_1A -463 0x0000 //TX_SRC_DOA_RNG_LOW_1B -464 0x00B4 //TX_SRC_DOA_RNG_HIGH_1B -465 0x005A //TX_DFLT_SRC_DOA_1B -466 0x0000 //TX_SRC_DOA_RNG_LOW_1C -467 0x00B4 //TX_SRC_DOA_RNG_HIGH_1C -468 0x005A //TX_DFLT_SRC_DOA_1C -469 0x0000 //TX_SRC_DOA_RNG_LOW_1D -470 0x00B4 //TX_SRC_DOA_RNG_HIGH_1D -471 0x005A //TX_DFLT_SRC_DOA_1D -472 0x0100 //TX_BF_HOLDOFF_T -473 0x7FFF //TX_DOA_COST_FACTOR -474 0x0D9A //TX_MAINTOREFR_TH0 -475 0x071C //TX_DOA_TRK_THR -476 0x012C //TX_DOA_TRACK_HT -477 0x0200 //TX_N1_HOLD_HF -478 0x0100 //TX_N2_HOLD_HF -479 0x2A3D //TX_BF_RESET_THR_HF -480 0x7333 //TX_DOA_SMOOTH -481 0x0800 //TX_MU_BF -482 0x0800 //TX_BF_MU_LF_B2 -483 0x0040 //TX_BF_FC_END_BIN_B2 -484 0x0020 //TX_BF_FC_END_BIN -485 0x0000 //TX_HF_RESRV_25 -486 0x0000 //TX_HF_RESRV_26 -487 0x0007 //TX_N_DOA_SEED -488 0x0001 //TX_FINE_DOA_SEARCH_FLG -489 0x0000 //TX_HF_RESRV_27 -490 0x038E //TX_DLT_SRC_DOA_RNG -491 0x0200 //TX_BF_MU_LF -492 0x0000 //TX_DFLT_SRC_LOC_0 -493 0x7FFF //TX_DFLT_SRC_LOC_1 -494 0x0000 //TX_DFLT_SRC_LOC_2 -495 0x038E //TX_DOA_TRACK_VADTH -496 0x0000 //TX_DOA_TRACK_NEW -497 0x0280 //TX_NOR_OFF_THR -498 0x7C00 //TX_MORE_ON_700HZ_THR -499 0x0200 //TX_MU_BF_ADPT_NS -500 0x0000 //TX_ADAPT_LEN -501 0x6666 //TX_MORE_SNS -502 0x0000 //TX_NOR_OFF_TH1 -503 0x0000 //TX_WIDE_MASK_TH -504 0xD333 //TX_SUBSNRATIOHIGH4MEANBCK_THR -505 0x6000 //TX_C_POST_FLT_CUT -506 0x2000 //TX_RADIODTLV -507 0x0320 //TX_POWER_LINEIN_TH -508 0x0014 //TX_FE_VADCOUNT_TH_FC -509 0x0000 //TX_ECHO_SUPP_FC -510 0x0C80 //TX_ECHO_TH -511 0x6666 //TX_MIC_TO_BFGAIN -512 0x0000 //TX_MICTOBFGAIN0 -513 0x0000 //TX_FASTMUE_TH -514 0x0000 //TX_DERVB_LEN_0 -515 0x0000 //TX_DERVB_LEN_1 -516 0x0000 //TX_RHO_DERVB -517 0x0000 //TX_MIC_INDX_DERVB -518 0x0000 //TX_MU_DERVB -519 0x0000 //TX_DR_RESRV_0 -520 0x0000 //TX_DR_RESRV_1 -521 0x0000 //TX_DR_RESRV_2 -522 0x0000 //TX_DR_RESRV_3 -523 0x0000 //TX_DR_RESRV_4 -524 0x0000 //TX_DR_RESRV_5 -525 0x0000 //TX_DR_RESRV_6 -526 0x0000 //TX_DR_RESRV_7 -527 0x0000 //TX_DR_RESRV_8 -528 0x1333 //TX_WIND_MARK_TH -529 0x399A //TX_CORR_THR -530 0x0004 //TX_SNR_THR -531 0x0010 //TX_ENGY_THR -532 0x1770 //TX_CORR_HIGH_TH -533 0x6000 //TX_ENGY_THR_2 -534 0x3400 //TX_MEAN_RTO_THR -535 0x0028 //TX_WNS_ENOISE_MIC0_TH -536 0x3000 //TX_RATIOMICL_TH -537 0x7FFF //TX_CALIG_HS -538 0x0000 //TX_LVL_CTRL -539 0x0010 //TX_WIND_SUPRTO -540 0x0014 //TX_WNS_MIN_G -541 0x0600 //TX_WNS_B_POST_FLT -542 0x3000 //TX_RATIOMICH_TH -543 0xD120 //TX_WIND_INBEAM_L_TH -544 0x0FA0 //TX_WIND_INBEAM_H_TH -545 0x2000 //TX_WNS_RESRV_0 -546 0x59D8 //TX_WNS_RESRV_1 -547 0x0200 //TX_WNS_RESRV_2 -548 0x0000 //TX_WNS_RESRV_3 -549 0x0000 //TX_WNS_RESRV_4 -550 0x0000 //TX_WNS_RESRV_5 -551 0x0000 //TX_WNS_RESRV_6 -552 0x0000 //TX_PB_B_POST_FLT_LESSCUT -553 0x0070 //TX_BF_LESSCUT_BBIN -554 0x0070 //TX_BF_LESSCUT_EBIN -555 0x0010 //TX_POSTBFB0 -556 0x0070 //TX_POSTBFB -557 0x00B0 //TX_POSTBFE -558 0x0E66 //TX_SPEECH_SNR_TH -559 0x0050 //TX_PB_MAX_PRI_SNR_TH -560 0x770A //TX_MAX_PRI_SNR_TH_L -561 0x0000 //TX_PFGAIN -562 0x0000 //TX_MAINTOREFR_TH -563 0x0000 //TX_SAM_MARK -564 0x0000 //TX_PB_RESRV_0 -565 0x0000 //TX_PB_RESRV_1 -566 0x0030 //TX_FDEQ_SUBNUM -567 0x5C54 //TX_FDEQ_GAIN_0 -568 0x5048 //TX_FDEQ_GAIN_1 -569 0x4C4C //TX_FDEQ_GAIN_2 -570 0x474A //TX_FDEQ_GAIN_3 -571 0x473F //TX_FDEQ_GAIN_4 -572 0x4245 //TX_FDEQ_GAIN_5 -573 0x4B53 //TX_FDEQ_GAIN_6 -574 0x564A //TX_FDEQ_GAIN_7 -575 0x3D3A //TX_FDEQ_GAIN_8 -576 0x3838 //TX_FDEQ_GAIN_9 -577 0x3836 //TX_FDEQ_GAIN_10 -578 0x3633 //TX_FDEQ_GAIN_11 -579 0x3838 //TX_FDEQ_GAIN_12 -580 0x4048 //TX_FDEQ_GAIN_13 -581 0x4848 //TX_FDEQ_GAIN_14 -582 0x4848 //TX_FDEQ_GAIN_15 -583 0x4848 //TX_FDEQ_GAIN_16 -584 0x4848 //TX_FDEQ_GAIN_17 -585 0x4848 //TX_FDEQ_GAIN_18 -586 0x4848 //TX_FDEQ_GAIN_19 -587 0x4848 //TX_FDEQ_GAIN_20 -588 0x4848 //TX_FDEQ_GAIN_21 -589 0x4848 //TX_FDEQ_GAIN_22 -590 0x4848 //TX_FDEQ_GAIN_23 -591 0x0202 //TX_FDEQ_BIN_0 -592 0x0104 //TX_FDEQ_BIN_1 -593 0x0502 //TX_FDEQ_BIN_2 -594 0x0202 //TX_FDEQ_BIN_3 -595 0x0504 //TX_FDEQ_BIN_4 -596 0x0708 //TX_FDEQ_BIN_5 -597 0x0808 //TX_FDEQ_BIN_6 -598 0x050E //TX_FDEQ_BIN_7 -599 0x0B0C //TX_FDEQ_BIN_8 -600 0x0F0F //TX_FDEQ_BIN_9 -601 0x0F0F //TX_FDEQ_BIN_10 -602 0x0F28 //TX_FDEQ_BIN_11 -603 0x0611 //TX_FDEQ_BIN_12 -604 0x0000 //TX_FDEQ_BIN_13 -605 0x0000 //TX_FDEQ_BIN_14 -606 0x0000 //TX_FDEQ_BIN_15 -607 0x0000 //TX_FDEQ_BIN_16 -608 0x0000 //TX_FDEQ_BIN_17 -609 0x0000 //TX_FDEQ_BIN_18 -610 0x0000 //TX_FDEQ_BIN_19 -611 0x0000 //TX_FDEQ_BIN_20 -612 0x0000 //TX_FDEQ_BIN_21 -613 0x0000 //TX_FDEQ_BIN_22 -614 0x0000 //TX_FDEQ_BIN_23 -615 0x0000 //TX_FDEQ_PADDING -616 0x0030 //TX_PREEQ_SUBNUM_MIC0 -617 0x4848 //TX_PREEQ_GAIN_MIC0_0 -618 0x4848 //TX_PREEQ_GAIN_MIC0_1 -619 0x4848 //TX_PREEQ_GAIN_MIC0_2 -620 0x4848 //TX_PREEQ_GAIN_MIC0_3 -621 0x4848 //TX_PREEQ_GAIN_MIC0_4 -622 0x4848 //TX_PREEQ_GAIN_MIC0_5 -623 0x4848 //TX_PREEQ_GAIN_MIC0_6 -624 0x4846 //TX_PREEQ_GAIN_MIC0_7 -625 0x4544 //TX_PREEQ_GAIN_MIC0_8 -626 0x4241 //TX_PREEQ_GAIN_MIC0_9 -627 0x403E //TX_PREEQ_GAIN_MIC0_10 -628 0x3D3C //TX_PREEQ_GAIN_MIC0_11 -629 0x3C3C //TX_PREEQ_GAIN_MIC0_12 -630 0x4848 //TX_PREEQ_GAIN_MIC0_13 -631 0x4848 //TX_PREEQ_GAIN_MIC0_14 -632 0x4848 //TX_PREEQ_GAIN_MIC0_15 -633 0x4848 //TX_PREEQ_GAIN_MIC0_16 -634 0x4848 //TX_PREEQ_GAIN_MIC0_17 -635 0x4848 //TX_PREEQ_GAIN_MIC0_18 -636 0x4848 //TX_PREEQ_GAIN_MIC0_19 -637 0x4848 //TX_PREEQ_GAIN_MIC0_20 -638 0x4848 //TX_PREEQ_GAIN_MIC0_21 -639 0x4848 //TX_PREEQ_GAIN_MIC0_22 -640 0x4848 //TX_PREEQ_GAIN_MIC0_23 -641 0x0202 //TX_PREEQ_BIN_MIC0_0 -642 0x0203 //TX_PREEQ_BIN_MIC0_1 -643 0x0303 //TX_PREEQ_BIN_MIC0_2 -644 0x0304 //TX_PREEQ_BIN_MIC0_3 -645 0x0405 //TX_PREEQ_BIN_MIC0_4 -646 0x0506 //TX_PREEQ_BIN_MIC0_5 -647 0x7008 //TX_PREEQ_BIN_MIC0_6 -648 0x090A //TX_PREEQ_BIN_MIC0_7 -649 0x0B0C //TX_PREEQ_BIN_MIC0_8 -650 0x0F10 //TX_PREEQ_BIN_MIC0_9 -651 0x1011 //TX_PREEQ_BIN_MIC0_10 -652 0x1112 //TX_PREEQ_BIN_MIC0_11 -653 0x1208 //TX_PREEQ_BIN_MIC0_12 -654 0x0000 //TX_PREEQ_BIN_MIC0_13 -655 0x0000 //TX_PREEQ_BIN_MIC0_14 -656 0x0000 //TX_PREEQ_BIN_MIC0_15 -657 0x0000 //TX_PREEQ_BIN_MIC0_16 -658 0x0000 //TX_PREEQ_BIN_MIC0_17 -659 0x0000 //TX_PREEQ_BIN_MIC0_18 -660 0x0000 //TX_PREEQ_BIN_MIC0_19 -661 0x0000 //TX_PREEQ_BIN_MIC0_20 -662 0x0000 //TX_PREEQ_BIN_MIC0_21 -663 0x0000 //TX_PREEQ_BIN_MIC0_22 -664 0x0000 //TX_PREEQ_BIN_MIC0_23 -665 0x0020 //TX_PREEQ_SUBNUM_MIC1 -666 0x4848 //TX_PREEQ_GAIN_MIC1_0 -667 0x4848 //TX_PREEQ_GAIN_MIC1_1 -668 0x4848 //TX_PREEQ_GAIN_MIC1_2 -669 0x4848 //TX_PREEQ_GAIN_MIC1_3 -670 0x4848 //TX_PREEQ_GAIN_MIC1_4 -671 0x4848 //TX_PREEQ_GAIN_MIC1_5 -672 0x4848 //TX_PREEQ_GAIN_MIC1_6 -673 0x4848 //TX_PREEQ_GAIN_MIC1_7 -674 0x484A //TX_PREEQ_GAIN_MIC1_8 -675 0x4B4C //TX_PREEQ_GAIN_MIC1_9 -676 0x4B4A //TX_PREEQ_GAIN_MIC1_10 -677 0x4A48 //TX_PREEQ_GAIN_MIC1_11 -678 0x4C4C //TX_PREEQ_GAIN_MIC1_12 -679 0x4C4C //TX_PREEQ_GAIN_MIC1_13 -680 0x4848 //TX_PREEQ_GAIN_MIC1_14 -681 0x4848 //TX_PREEQ_GAIN_MIC1_15 +672 0x494A //TX_PREEQ_GAIN_MIC1_6 +673 0x4B4C //TX_PREEQ_GAIN_MIC1_7 +674 0x4D4E //TX_PREEQ_GAIN_MIC1_8 +675 0x4F52 //TX_PREEQ_GAIN_MIC1_9 +676 0x5355 //TX_PREEQ_GAIN_MIC1_10 +677 0x585C //TX_PREEQ_GAIN_MIC1_11 +678 0x616A //TX_PREEQ_GAIN_MIC1_12 +679 0x726E //TX_PREEQ_GAIN_MIC1_13 +680 0x5C48 //TX_PREEQ_GAIN_MIC1_14 +681 0x3B38 //TX_PREEQ_GAIN_MIC1_15 682 0x4848 //TX_PREEQ_GAIN_MIC1_16 683 0x4848 //TX_PREEQ_GAIN_MIC1_17 684 0x4848 //TX_PREEQ_GAIN_MIC1_18 @@ -14731,1765 +14058,12 @@ 697 0x090A //TX_PREEQ_BIN_MIC1_7 698 0x0B0C //TX_PREEQ_BIN_MIC1_8 699 0x0D0E //TX_PREEQ_BIN_MIC1_9 -700 0x0F10 //TX_PREEQ_BIN_MIC1_10 -701 0x1011 //TX_PREEQ_BIN_MIC1_11 -702 0x1112 //TX_PREEQ_BIN_MIC1_12 -703 0x120B //TX_PREEQ_BIN_MIC1_13 -704 0x0000 //TX_PREEQ_BIN_MIC1_14 -705 0x0000 //TX_PREEQ_BIN_MIC1_15 -706 0x0000 //TX_PREEQ_BIN_MIC1_16 -707 0x0000 //TX_PREEQ_BIN_MIC1_17 -708 0x0000 //TX_PREEQ_BIN_MIC1_18 -709 0x0000 //TX_PREEQ_BIN_MIC1_19 -710 0x0000 //TX_PREEQ_BIN_MIC1_20 -711 0x0000 //TX_PREEQ_BIN_MIC1_21 -712 0x0000 //TX_PREEQ_BIN_MIC1_22 -713 0x0000 //TX_PREEQ_BIN_MIC1_23 -714 0x0030 //TX_PREEQ_SUBNUM_MIC2 -715 0x4848 //TX_PREEQ_GAIN_MIC2_0 -716 0x4848 //TX_PREEQ_GAIN_MIC2_1 -717 0x4848 //TX_PREEQ_GAIN_MIC2_2 -718 0x4848 //TX_PREEQ_GAIN_MIC2_3 -719 0x4848 //TX_PREEQ_GAIN_MIC2_4 -720 0x4848 //TX_PREEQ_GAIN_MIC2_5 -721 0x4848 //TX_PREEQ_GAIN_MIC2_6 -722 0x4848 //TX_PREEQ_GAIN_MIC2_7 -723 0x4848 //TX_PREEQ_GAIN_MIC2_8 -724 0x4848 //TX_PREEQ_GAIN_MIC2_9 -725 0x4848 //TX_PREEQ_GAIN_MIC2_10 -726 0x4848 //TX_PREEQ_GAIN_MIC2_11 -727 0x4848 //TX_PREEQ_GAIN_MIC2_12 -728 0x4848 //TX_PREEQ_GAIN_MIC2_13 -729 0x4848 //TX_PREEQ_GAIN_MIC2_14 -730 0x4848 //TX_PREEQ_GAIN_MIC2_15 -731 0x4848 //TX_PREEQ_GAIN_MIC2_16 -732 0x4848 //TX_PREEQ_GAIN_MIC2_17 -733 0x4848 //TX_PREEQ_GAIN_MIC2_18 -734 0x4848 //TX_PREEQ_GAIN_MIC2_19 -735 0x4848 //TX_PREEQ_GAIN_MIC2_20 -736 0x4848 //TX_PREEQ_GAIN_MIC2_21 -737 0x4848 //TX_PREEQ_GAIN_MIC2_22 -738 0x4848 //TX_PREEQ_GAIN_MIC2_23 -739 0x0608 //TX_PREEQ_BIN_MIC2_0 -740 0x0808 //TX_PREEQ_BIN_MIC2_1 -741 0x0808 //TX_PREEQ_BIN_MIC2_2 -742 0x0808 //TX_PREEQ_BIN_MIC2_3 -743 0x0808 //TX_PREEQ_BIN_MIC2_4 -744 0x0808 //TX_PREEQ_BIN_MIC2_5 -745 0x0808 //TX_PREEQ_BIN_MIC2_6 -746 0x0808 //TX_PREEQ_BIN_MIC2_7 -747 0x0808 //TX_PREEQ_BIN_MIC2_8 -748 0x0808 //TX_PREEQ_BIN_MIC2_9 -749 0x0808 //TX_PREEQ_BIN_MIC2_10 -750 0x0808 //TX_PREEQ_BIN_MIC2_11 -751 0x0808 //TX_PREEQ_BIN_MIC2_12 -752 0x0808 //TX_PREEQ_BIN_MIC2_13 -753 0x0808 //TX_PREEQ_BIN_MIC2_14 -754 0x0200 //TX_PREEQ_BIN_MIC2_15 -755 0x0000 //TX_PREEQ_BIN_MIC2_16 -756 0x0000 //TX_PREEQ_BIN_MIC2_17 -757 0x0000 //TX_PREEQ_BIN_MIC2_18 -758 0x0000 //TX_PREEQ_BIN_MIC2_19 -759 0x0000 //TX_PREEQ_BIN_MIC2_20 -760 0x0000 //TX_PREEQ_BIN_MIC2_21 -761 0x0000 //TX_PREEQ_BIN_MIC2_22 -762 0x0000 //TX_PREEQ_BIN_MIC2_23 -763 0x0006 //TX_MASKING_ABILITY -764 0x0800 //TX_NND_WEIGHT -765 0x0062 //TX_MIC_CALIBRATION_0 -766 0x0062 //TX_MIC_CALIBRATION_1 -767 0x0062 //TX_MIC_CALIBRATION_2 -768 0x0062 //TX_MIC_CALIBRATION_3 -769 0x0046 //TX_MIC_PWR_BIAS_0 -770 0x0046 //TX_MIC_PWR_BIAS_1 -771 0x0046 //TX_MIC_PWR_BIAS_2 -772 0x0046 //TX_MIC_PWR_BIAS_3 -773 0x0000 //TX_GAIN_LIMIT_0 -774 0x0000 //TX_GAIN_LIMIT_1 -775 0x0006 //TX_GAIN_LIMIT_2 -776 0x0006 //TX_GAIN_LIMIT_3 -777 0x7F5B //TX_BVE_NOVAD0_ALPHADOWN -778 0x7FDE //TX_BVE_VAD0_ALPHAUP -779 0x7F3A //TX_BVE_VAD0_ALPHADOWN -780 0x2000 //TX_BVE_GAINWEIGHT_NOFEVADLI -781 0x7F5B //TX_BVE_FEVADLI_ALPHA -782 0x7F19 //TX_BVE_NOVAD0_ALPHAUP -783 0x1000 //TX_TDDRC_ALPHA_UP_01 -784 0x1000 //TX_TDDRC_ALPHA_UP_02 -785 0x1000 //TX_TDDRC_ALPHA_UP_03 -786 0x1000 //TX_TDDRC_ALPHA_UP_04 -787 0x7EB8 //TX_TDDRC_ALPHA_DWN_01 -788 0x7EB8 //TX_TDDRC_ALPHA_DWN_02 -789 0x7EB8 //TX_TDDRC_ALPHA_DWN_03 -790 0x7EB8 //TX_TDDRC_ALPHA_DWN_04 -791 0x7FFF //TX_TDDRC_TD_DRC_LIMIT -792 0x0800 //TX_TDDRC_POST_LIMIT_GAIN -793 0x0000 //TX_TDDRC_RESRV_0 -794 0x0000 //TX_TDDRC_RESRV_1 -795 0x0018 //TX_FDDRC_BAND_MARGIN_0 -796 0x0030 //TX_FDDRC_BAND_MARGIN_1 -797 0x0050 //TX_FDDRC_BAND_MARGIN_2 -798 0x0080 //TX_FDDRC_BAND_MARGIN_3 -799 0x0007 //TX_FDDRC_BLOCK_EXP -800 0x5000 //TX_FDDRC_THRD_2_0 -801 0x5000 //TX_FDDRC_THRD_2_1 -802 0x5000 //TX_FDDRC_THRD_2_2 -803 0x5000 //TX_FDDRC_THRD_2_3 -804 0x6400 //TX_FDDRC_THRD_3_0 -805 0x6400 //TX_FDDRC_THRD_3_1 -806 0x6400 //TX_FDDRC_THRD_3_2 -807 0x6400 //TX_FDDRC_THRD_3_3 -808 0x2000 //TX_FDDRC_SLANT_0_0 -809 0x2000 //TX_FDDRC_SLANT_0_1 -810 0x2000 //TX_FDDRC_SLANT_0_2 -811 0x2000 //TX_FDDRC_SLANT_0_3 -812 0x5333 //TX_FDDRC_SLANT_1_0 -813 0x5333 //TX_FDDRC_SLANT_1_1 -814 0x5333 //TX_FDDRC_SLANT_1_2 -815 0x5333 //TX_FDDRC_SLANT_1_3 -816 0x0010 //TX_DEADMIC_SILENCE_TH -817 0x0600 //TX_MIC_DEGRADE_TH -818 0x0078 //TX_DEADMIC_CNT -819 0x0078 //TX_MIC_DEGRADE_CNT -820 0x0000 //TX_FDDRC_RESRV_4 -821 0x0000 //TX_FDDRC_RESRV_5 -822 0x0000 //TX_FDDRC_RESRV_6 -823 0x7FFF //TX_KS_NOISEPASTE_FACTOR -824 0x0001 //TX_KS_CONFIG -825 0x7FFF //TX_KS_GAIN_MIN -826 0x0000 //TX_KS_RESRV_0 -827 0x0000 //TX_KS_RESRV_1 -828 0x0000 //TX_KS_RESRV_2 -829 0x7C00 //TX_LAMBDA_PKA_FP -830 0x2000 //TX_TPKA_FP -831 0x0080 //TX_MIN_G_FP -832 0x2000 //TX_MAX_G_FP -833 0x0FA0 //TX_FFP_FP_K_METAL -834 0x4000 //TX_A_POST_FLT_FP -835 0x0F5C //TX_RTO_OUTBEAM_TH -836 0x4CCD //TX_TPKA_FP_THD -837 0x0000 //TX_MAX_G_FP_BLK -838 0x0000 //TX_FFP_FADEIN -839 0x0000 //TX_FFP_FADEOUT -840 0x0000 //TX_WHISPERCTH -841 0x0000 //TX_WHISPERHOLDT -842 0x0000 //TX_WHISP_ENTHH -843 0x0000 //TX_WHISP_ENTHL -844 0x0000 //TX_WHISP_RTOTH -845 0x0000 //TX_WHISP_RTOTH2 -846 0x0096 //TX_MUTE_PERIOD -847 0x0000 //TX_FADE_IN_PERIOD -848 0x0100 //TX_FFP_RESRV_2 -849 0x0020 //TX_FFP_RESRV_3 -850 0x0000 //TX_FFP_RESRV_4 -851 0x0000 //TX_FFP_RESRV_5 -852 0x0000 //TX_FFP_RESRV_6 -853 0x0002 //TX_FILTINDX -854 0x0002 //TX_TDDRC_THRD_0 -855 0x0003 //TX_TDDRC_THRD_1 -856 0x1500 //TX_TDDRC_THRD_2 -857 0x1500 //TX_TDDRC_THRD_3 -858 0x3000 //TX_TDDRC_SLANT_0 -859 0x6E00 //TX_TDDRC_SLANT_1 -860 0x1000 //TX_TDDRC_ALPHA_UP_00 -861 0x7EB8 //TX_TDDRC_ALPHA_DWN_00 -862 0x0000 //TX_TDDRC_HMNC_FLAG -863 0x199A //TX_TDDRC_HMNC_GAIN -864 0x0000 //TX_TDDRC_SMT_FLAG -865 0x0CCD //TX_TDDRC_SMT_W -866 0x05A0 //TX_TDDRC_DRC_GAIN -867 0x7FFF //TX_TDDRC_LMT_THRD -868 0x0000 //TX_TDDRC_LMT_ALPHA -869 0x0000 //TX_TFMASKLTH -870 0x0000 //TX_TFMASKLTHL -871 0x0CCD //TX_TFMASKHTH -872 0x199A //TX_TFMASKLTH_BINVAD -873 0xFCCD //TX_TFMASKLTH_NS_EST -874 0xF800 //TX_TFMASKLTH_DOA -875 0x0CCD //TX_TFMASKTH_BLESSCUT -876 0x2000 //TX_B_LESSCUT_RTO_MASK -877 0x1C00 //TX_SB_RHO_MEAN_TH_ABN -878 0x2000 //TX_B_POST_FLT_MASK -879 0x0000 //TX_B_POST_FLT_MASK1 -880 0x6333 //TX_GAIN_WIND_MASK -881 0x0000 //TX_TFMASK_BFSTRICT_MUSIC -882 0x0000 //TX_TFMASK_BFSTRICT_NOMUSIC -883 0x7333 //TX_FASTNS_OUTIN_TH -884 0x0CCD //TX_FASTNS_TFMASK_TH -885 0x0CCD //TX_FASTNS_TFMASKBIN_TH1 -886 0x0CCD //TX_FASTNS_TFMASKBIN_TH2 -887 0x0CCD //TX_FASTNS_TFMASKBIN_TH3 -888 0x00C8 //TX_FASTNS_ARSPC_TH -889 0xC000 //TX_FASTNS_MASK5_TH -890 0x0810 //TX_POSTSSA_MIN_G_VR_MASK -891 0x1000 //TX_A_LESSCUT_RTO_MASK -892 0x1770 //TX_FASTNS_NOISETH -893 0xC000 //TX_FASTNS_SSA_THLFL -894 0xC000 //TX_FASTNS_SSA_THHFL -895 0xCCCC //TX_FASTNS_SSA_THLFH -896 0xD999 //TX_FASTNS_SSA_THHFH -#RX -0 0x000C //RX_RECVFUNC_MODE_0 -1 0x0000 //RX_RECVFUNC_MODE_1 -2 0x0001 //RX_SAMPLINGFREQ_SIG -3 0x0001 //RX_SAMPLINGFREQ_PROC -4 0x000A //RX_FRAME_SZ -5 0x0000 //RX_DELAY_OPT -6 0x1000 //RX_TDDRC_ALPHA_UP_1 -7 0x1000 //RX_TDDRC_ALPHA_UP_2 -8 0x1000 //RX_TDDRC_ALPHA_UP_3 -9 0x1000 //RX_TDDRC_ALPHA_UP_4 -10 0x0800 //RX_PGA -11 0x7FFF //RX_A_HP -12 0x4000 //RX_B_PE -13 0x7800 //RX_THR_PITCH_DET_0 -14 0x7000 //RX_THR_PITCH_DET_1 -15 0x6000 //RX_THR_PITCH_DET_2 -16 0x0008 //RX_PITCH_BFR_LEN -17 0x0003 //RX_SBD_PITCH_DET -18 0x0100 //RX_PP_RESRV_0 -19 0x0020 //RX_PP_RESRV_1 -20 0x0400 //RX_N_SN_EST -21 0x000C //RX_N2_SN_EST -22 0x0014 //RX_NS_LVL_CTRL -23 0xF800 //RX_THR_SN_EST -24 0x7E00 //RX_LAMBDA_PFILT -25 0x000A //RX_FENS_RESRV_0 -26 0x0190 //RX_FENS_RESRV_1 -27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 -28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 -29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 -30 0x0002 //RX_EXTRA_NS_L -31 0x0800 //RX_EXTRA_NS_A -32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 -33 0x7000 //RX_TDDRC_LIMITER_THRD -34 0x0800 //RX_TDDRC_LIMITER_GAIN -35 0x199A //RX_A_POST_FLT -36 0x0000 //RX_LMT_THRD -37 0x4000 //RX_LMT_ALPHA -38 0x0030 //RX_FDEQ_SUBNUM -39 0x4848 //RX_FDEQ_GAIN_0 -40 0x4848 //RX_FDEQ_GAIN_1 -41 0x4844 //RX_FDEQ_GAIN_2 -42 0x4A4C //RX_FDEQ_GAIN_3 -43 0x4E50 //RX_FDEQ_GAIN_4 -44 0x5254 //RX_FDEQ_GAIN_5 -45 0x5658 //RX_FDEQ_GAIN_6 -46 0x5A5C //RX_FDEQ_GAIN_7 -47 0x5C5C //RX_FDEQ_GAIN_8 -48 0x5C5C //RX_FDEQ_GAIN_9 -49 0x5C5C //RX_FDEQ_GAIN_10 -50 0x5C5C //RX_FDEQ_GAIN_11 -51 0x5C5C //RX_FDEQ_GAIN_12 -52 0x5C5C //RX_FDEQ_GAIN_13 -53 0x4848 //RX_FDEQ_GAIN_14 -54 0x4848 //RX_FDEQ_GAIN_15 -55 0x4848 //RX_FDEQ_GAIN_16 -56 0x4848 //RX_FDEQ_GAIN_17 -57 0x4848 //RX_FDEQ_GAIN_18 -58 0x4848 //RX_FDEQ_GAIN_19 -59 0x4848 //RX_FDEQ_GAIN_20 -60 0x4848 //RX_FDEQ_GAIN_21 -61 0x4848 //RX_FDEQ_GAIN_22 -62 0x4848 //RX_FDEQ_GAIN_23 -63 0x0202 //RX_FDEQ_BIN_0 -64 0x0203 //RX_FDEQ_BIN_1 -65 0x0402 //RX_FDEQ_BIN_2 -66 0x0505 //RX_FDEQ_BIN_3 -67 0x0505 //RX_FDEQ_BIN_4 -68 0x0505 //RX_FDEQ_BIN_5 -69 0x0505 //RX_FDEQ_BIN_6 -70 0x0505 //RX_FDEQ_BIN_7 -71 0x160C //RX_FDEQ_BIN_8 -72 0x0D0E //RX_FDEQ_BIN_9 -73 0x0E0F //RX_FDEQ_BIN_10 -74 0x0F10 //RX_FDEQ_BIN_11 -75 0x1011 //RX_FDEQ_BIN_12 -76 0x1104 //RX_FDEQ_BIN_13 -77 0x0000 //RX_FDEQ_BIN_14 -78 0x0000 //RX_FDEQ_BIN_15 -79 0x0000 //RX_FDEQ_BIN_16 -80 0x0000 //RX_FDEQ_BIN_17 -81 0x0000 //RX_FDEQ_BIN_18 -82 0x0000 //RX_FDEQ_BIN_19 -83 0x0000 //RX_FDEQ_BIN_20 -84 0x0000 //RX_FDEQ_BIN_21 -85 0x0000 //RX_FDEQ_BIN_22 -86 0x0000 //RX_FDEQ_BIN_23 -87 0x4000 //RX_FDEQ_RESRV_0 -88 0x0320 //RX_FDEQ_RESRV_1 -89 0x0018 //RX_FDDRC_BAND_MARGIN_0 -90 0x0030 //RX_FDDRC_BAND_MARGIN_1 -91 0x0050 //RX_FDDRC_BAND_MARGIN_2 -92 0x0080 //RX_FDDRC_BAND_MARGIN_3 -93 0x0007 //RX_FDDRC_BLOCK_EXP -94 0x5000 //RX_FDDRC_THRD_2_0 -95 0x5000 //RX_FDDRC_THRD_2_1 -96 0x5000 //RX_FDDRC_THRD_2_2 -97 0x5000 //RX_FDDRC_THRD_2_3 -98 0x6400 //RX_FDDRC_THRD_3_0 -99 0x6400 //RX_FDDRC_THRD_3_1 -100 0x6400 //RX_FDDRC_THRD_3_2 -101 0x6400 //RX_FDDRC_THRD_3_3 -102 0x2000 //RX_FDDRC_SLANT_0_0 -103 0x2000 //RX_FDDRC_SLANT_0_1 -104 0x2000 //RX_FDDRC_SLANT_0_2 -105 0x2000 //RX_FDDRC_SLANT_0_3 -106 0x5333 //RX_FDDRC_SLANT_1_0 -107 0x5333 //RX_FDDRC_SLANT_1_1 -108 0x5333 //RX_FDDRC_SLANT_1_2 -109 0x5333 //RX_FDDRC_SLANT_1_3 -110 0x0000 //RX_FDDRC_RESRV_0 -111 0x0002 //RX_FILTINDX -112 0x0000 //RX_TDDRC_THRD_0 -113 0x0000 //RX_TDDRC_THRD_1 -114 0x1800 //RX_TDDRC_THRD_2 -115 0x1800 //RX_TDDRC_THRD_3 -116 0x3000 //RX_TDDRC_SLANT_0 -117 0x6E00 //RX_TDDRC_SLANT_1 -118 0x1000 //RX_TDDRC_ALPHA_UP_0 -119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 -120 0x0000 //RX_TDDRC_HMNC_FLAG -121 0x199A //RX_TDDRC_HMNC_GAIN -122 0x0001 //RX_TDDRC_SMT_FLAG -123 0x0CCD //RX_TDDRC_SMT_W -124 0x0400 //RX_TDDRC_DRC_GAIN -125 0x7C00 //RX_LAMBDA_PKA_FP -126 0x2000 //RX_TPKA_FP -127 0x2000 //RX_MIN_G_FP -128 0x0080 //RX_MAX_G_FP -129 0x0100 //RX_SPK_VOL -130 0x0000 //RX_VOL_RESRV_0 -131 0x0000 //RX_MAXLEVEL_CNG -132 0x3000 //RX_BWE_UV_TH -133 0x3000 //RX_BWE_UV_TH2 -134 0x1800 //RX_BWE_UV_TH3 -135 0x1000 //RX_BWE_V_TH -136 0x04CD //RX_BWE_GAIN1_V_TH1 -137 0x0F33 //RX_BWE_GAIN1_V_TH2 -138 0x7333 //RX_BWE_UV_EQ -139 0x199A //RX_BWE_V_EQ -140 0x7333 //RX_BWE_TONE_TH -141 0x0004 //RX_BWE_UV_HOLD_T -142 0x6CCD //RX_BWE_GAIN2_ALPHA -143 0x799A //RX_BWE_GAIN3_ALPHA -144 0x001E //RX_BWE_CUTOFF -145 0x3000 //RX_BWE_GAINFILL -146 0x3200 //RX_BWE_MAXTH_TONE -147 0x2000 //RX_BWE_EQ_0 -148 0x2000 //RX_BWE_EQ_1 -149 0x2000 //RX_BWE_EQ_2 -150 0x2000 //RX_BWE_EQ_3 -151 0x2000 //RX_BWE_EQ_4 -152 0x2000 //RX_BWE_EQ_5 -153 0x2000 //RX_BWE_EQ_6 -154 0x0000 //RX_BWE_RESRV_0 -155 0x0000 //RX_BWE_RESRV_1 -156 0x0000 //RX_BWE_RESRV_2 -#VOL 0 -6 0x1000 //RX_TDDRC_ALPHA_UP_1 -7 0x1000 //RX_TDDRC_ALPHA_UP_2 -8 0x1000 //RX_TDDRC_ALPHA_UP_3 -9 0x1000 //RX_TDDRC_ALPHA_UP_4 -27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 -28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 -29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 -32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 -33 0x7000 //RX_TDDRC_LIMITER_THRD -34 0x0800 //RX_TDDRC_LIMITER_GAIN -112 0x0000 //RX_TDDRC_THRD_0 -113 0x0000 //RX_TDDRC_THRD_1 -114 0x1800 //RX_TDDRC_THRD_2 -115 0x1800 //RX_TDDRC_THRD_3 -116 0x3000 //RX_TDDRC_SLANT_0 -117 0x6E00 //RX_TDDRC_SLANT_1 -118 0x1000 //RX_TDDRC_ALPHA_UP_0 -119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 -120 0x0000 //RX_TDDRC_HMNC_FLAG -121 0x199A //RX_TDDRC_HMNC_GAIN -122 0x0001 //RX_TDDRC_SMT_FLAG -123 0x0CCD //RX_TDDRC_SMT_W -124 0x0400 //RX_TDDRC_DRC_GAIN -38 0x0030 //RX_FDEQ_SUBNUM -39 0x4848 //RX_FDEQ_GAIN_0 -40 0x4848 //RX_FDEQ_GAIN_1 -41 0x4844 //RX_FDEQ_GAIN_2 -42 0x4A4C //RX_FDEQ_GAIN_3 -43 0x4E50 //RX_FDEQ_GAIN_4 -44 0x5254 //RX_FDEQ_GAIN_5 -45 0x5658 //RX_FDEQ_GAIN_6 -46 0x5A5C //RX_FDEQ_GAIN_7 -47 0x5C5C //RX_FDEQ_GAIN_8 -48 0x5C5C //RX_FDEQ_GAIN_9 -49 0x5C5C //RX_FDEQ_GAIN_10 -50 0x5C5C //RX_FDEQ_GAIN_11 -51 0x5C5C //RX_FDEQ_GAIN_12 -52 0x5C5C //RX_FDEQ_GAIN_13 -53 0x4848 //RX_FDEQ_GAIN_14 -54 0x4848 //RX_FDEQ_GAIN_15 -55 0x4848 //RX_FDEQ_GAIN_16 -56 0x4848 //RX_FDEQ_GAIN_17 -57 0x4848 //RX_FDEQ_GAIN_18 -58 0x4848 //RX_FDEQ_GAIN_19 -59 0x4848 //RX_FDEQ_GAIN_20 -60 0x4848 //RX_FDEQ_GAIN_21 -61 0x4848 //RX_FDEQ_GAIN_22 -62 0x4848 //RX_FDEQ_GAIN_23 -63 0x0202 //RX_FDEQ_BIN_0 -64 0x0203 //RX_FDEQ_BIN_1 -65 0x0402 //RX_FDEQ_BIN_2 -66 0x0505 //RX_FDEQ_BIN_3 -67 0x0505 //RX_FDEQ_BIN_4 -68 0x0505 //RX_FDEQ_BIN_5 -69 0x0505 //RX_FDEQ_BIN_6 -70 0x0505 //RX_FDEQ_BIN_7 -71 0x160C //RX_FDEQ_BIN_8 -72 0x0D0E //RX_FDEQ_BIN_9 -73 0x0E0F //RX_FDEQ_BIN_10 -74 0x0F10 //RX_FDEQ_BIN_11 -75 0x1011 //RX_FDEQ_BIN_12 -76 0x1104 //RX_FDEQ_BIN_13 -77 0x0000 //RX_FDEQ_BIN_14 -78 0x0000 //RX_FDEQ_BIN_15 -79 0x0000 //RX_FDEQ_BIN_16 -80 0x0000 //RX_FDEQ_BIN_17 -81 0x0000 //RX_FDEQ_BIN_18 -82 0x0000 //RX_FDEQ_BIN_19 -83 0x0000 //RX_FDEQ_BIN_20 -84 0x0000 //RX_FDEQ_BIN_21 -85 0x0000 //RX_FDEQ_BIN_22 -86 0x0000 //RX_FDEQ_BIN_23 -87 0x4000 //RX_FDEQ_RESRV_0 -88 0x0320 //RX_FDEQ_RESRV_1 -89 0x0018 //RX_FDDRC_BAND_MARGIN_0 -90 0x0030 //RX_FDDRC_BAND_MARGIN_1 -91 0x0050 //RX_FDDRC_BAND_MARGIN_2 -92 0x0080 //RX_FDDRC_BAND_MARGIN_3 -93 0x0007 //RX_FDDRC_BLOCK_EXP -94 0x5000 //RX_FDDRC_THRD_2_0 -95 0x5000 //RX_FDDRC_THRD_2_1 -96 0x5000 //RX_FDDRC_THRD_2_2 -97 0x5000 //RX_FDDRC_THRD_2_3 -98 0x6400 //RX_FDDRC_THRD_3_0 -99 0x6400 //RX_FDDRC_THRD_3_1 -100 0x6400 //RX_FDDRC_THRD_3_2 -101 0x6400 //RX_FDDRC_THRD_3_3 -102 0x2000 //RX_FDDRC_SLANT_0_0 -103 0x2000 //RX_FDDRC_SLANT_0_1 -104 0x2000 //RX_FDDRC_SLANT_0_2 -105 0x2000 //RX_FDDRC_SLANT_0_3 -106 0x5333 //RX_FDDRC_SLANT_1_0 -107 0x5333 //RX_FDDRC_SLANT_1_1 -108 0x5333 //RX_FDDRC_SLANT_1_2 -109 0x5333 //RX_FDDRC_SLANT_1_3 -110 0x0000 //RX_FDDRC_RESRV_0 -129 0x0100 //RX_SPK_VOL -130 0x0000 //RX_VOL_RESRV_0 -#VOL 1 -6 0x1000 //RX_TDDRC_ALPHA_UP_1 -7 0x1000 //RX_TDDRC_ALPHA_UP_2 -8 0x1000 //RX_TDDRC_ALPHA_UP_3 -9 0x1000 //RX_TDDRC_ALPHA_UP_4 -27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 -28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 -29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 -32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 -33 0x7000 //RX_TDDRC_LIMITER_THRD -34 0x0800 //RX_TDDRC_LIMITER_GAIN -112 0x0000 //RX_TDDRC_THRD_0 -113 0x0000 //RX_TDDRC_THRD_1 -114 0x1800 //RX_TDDRC_THRD_2 -115 0x1800 //RX_TDDRC_THRD_3 -116 0x3000 //RX_TDDRC_SLANT_0 -117 0x6E00 //RX_TDDRC_SLANT_1 -118 0x1000 //RX_TDDRC_ALPHA_UP_0 -119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 -120 0x0000 //RX_TDDRC_HMNC_FLAG -121 0x199A //RX_TDDRC_HMNC_GAIN -122 0x0001 //RX_TDDRC_SMT_FLAG -123 0x0CCD //RX_TDDRC_SMT_W -124 0x0400 //RX_TDDRC_DRC_GAIN -38 0x0030 //RX_FDEQ_SUBNUM -39 0x4848 //RX_FDEQ_GAIN_0 -40 0x4848 //RX_FDEQ_GAIN_1 -41 0x4844 //RX_FDEQ_GAIN_2 -42 0x4A4C //RX_FDEQ_GAIN_3 -43 0x4E50 //RX_FDEQ_GAIN_4 -44 0x5254 //RX_FDEQ_GAIN_5 -45 0x5658 //RX_FDEQ_GAIN_6 -46 0x5A5C //RX_FDEQ_GAIN_7 -47 0x5C5C //RX_FDEQ_GAIN_8 -48 0x5C5C //RX_FDEQ_GAIN_9 -49 0x5C5C //RX_FDEQ_GAIN_10 -50 0x5C5C //RX_FDEQ_GAIN_11 -51 0x5C5C //RX_FDEQ_GAIN_12 -52 0x5C5C //RX_FDEQ_GAIN_13 -53 0x4848 //RX_FDEQ_GAIN_14 -54 0x4848 //RX_FDEQ_GAIN_15 -55 0x4848 //RX_FDEQ_GAIN_16 -56 0x4848 //RX_FDEQ_GAIN_17 -57 0x4848 //RX_FDEQ_GAIN_18 -58 0x4848 //RX_FDEQ_GAIN_19 -59 0x4848 //RX_FDEQ_GAIN_20 -60 0x4848 //RX_FDEQ_GAIN_21 -61 0x4848 //RX_FDEQ_GAIN_22 -62 0x4848 //RX_FDEQ_GAIN_23 -63 0x0202 //RX_FDEQ_BIN_0 -64 0x0203 //RX_FDEQ_BIN_1 -65 0x0402 //RX_FDEQ_BIN_2 -66 0x0505 //RX_FDEQ_BIN_3 -67 0x0505 //RX_FDEQ_BIN_4 -68 0x0505 //RX_FDEQ_BIN_5 -69 0x0505 //RX_FDEQ_BIN_6 -70 0x0505 //RX_FDEQ_BIN_7 -71 0x160C //RX_FDEQ_BIN_8 -72 0x0D0E //RX_FDEQ_BIN_9 -73 0x0E0F //RX_FDEQ_BIN_10 -74 0x0F10 //RX_FDEQ_BIN_11 -75 0x1011 //RX_FDEQ_BIN_12 -76 0x1104 //RX_FDEQ_BIN_13 -77 0x0000 //RX_FDEQ_BIN_14 -78 0x0000 //RX_FDEQ_BIN_15 -79 0x0000 //RX_FDEQ_BIN_16 -80 0x0000 //RX_FDEQ_BIN_17 -81 0x0000 //RX_FDEQ_BIN_18 -82 0x0000 //RX_FDEQ_BIN_19 -83 0x0000 //RX_FDEQ_BIN_20 -84 0x0000 //RX_FDEQ_BIN_21 -85 0x0000 //RX_FDEQ_BIN_22 -86 0x0000 //RX_FDEQ_BIN_23 -87 0x4000 //RX_FDEQ_RESRV_0 -88 0x0320 //RX_FDEQ_RESRV_1 -89 0x0018 //RX_FDDRC_BAND_MARGIN_0 -90 0x0030 //RX_FDDRC_BAND_MARGIN_1 -91 0x0050 //RX_FDDRC_BAND_MARGIN_2 -92 0x0080 //RX_FDDRC_BAND_MARGIN_3 -93 0x0007 //RX_FDDRC_BLOCK_EXP -94 0x5000 //RX_FDDRC_THRD_2_0 -95 0x5000 //RX_FDDRC_THRD_2_1 -96 0x5000 //RX_FDDRC_THRD_2_2 -97 0x5000 //RX_FDDRC_THRD_2_3 -98 0x6400 //RX_FDDRC_THRD_3_0 -99 0x6400 //RX_FDDRC_THRD_3_1 -100 0x6400 //RX_FDDRC_THRD_3_2 -101 0x6400 //RX_FDDRC_THRD_3_3 -102 0x2000 //RX_FDDRC_SLANT_0_0 -103 0x2000 //RX_FDDRC_SLANT_0_1 -104 0x2000 //RX_FDDRC_SLANT_0_2 -105 0x2000 //RX_FDDRC_SLANT_0_3 -106 0x5333 //RX_FDDRC_SLANT_1_0 -107 0x5333 //RX_FDDRC_SLANT_1_1 -108 0x5333 //RX_FDDRC_SLANT_1_2 -109 0x5333 //RX_FDDRC_SLANT_1_3 -110 0x0000 //RX_FDDRC_RESRV_0 -129 0x0100 //RX_SPK_VOL -130 0x0000 //RX_VOL_RESRV_0 -#VOL 2 -6 0x1000 //RX_TDDRC_ALPHA_UP_1 -7 0x1000 //RX_TDDRC_ALPHA_UP_2 -8 0x1000 //RX_TDDRC_ALPHA_UP_3 -9 0x1000 //RX_TDDRC_ALPHA_UP_4 -27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 -28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 -29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 -32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 -33 0x7000 //RX_TDDRC_LIMITER_THRD -34 0x0800 //RX_TDDRC_LIMITER_GAIN -112 0x0000 //RX_TDDRC_THRD_0 -113 0x0000 //RX_TDDRC_THRD_1 -114 0x1800 //RX_TDDRC_THRD_2 -115 0x1800 //RX_TDDRC_THRD_3 -116 0x3000 //RX_TDDRC_SLANT_0 -117 0x6E00 //RX_TDDRC_SLANT_1 -118 0x1000 //RX_TDDRC_ALPHA_UP_0 -119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 -120 0x0000 //RX_TDDRC_HMNC_FLAG -121 0x199A //RX_TDDRC_HMNC_GAIN -122 0x0001 //RX_TDDRC_SMT_FLAG -123 0x0CCD //RX_TDDRC_SMT_W -124 0x0400 //RX_TDDRC_DRC_GAIN -38 0x0030 //RX_FDEQ_SUBNUM -39 0x4848 //RX_FDEQ_GAIN_0 -40 0x4848 //RX_FDEQ_GAIN_1 -41 0x4844 //RX_FDEQ_GAIN_2 -42 0x4A4C //RX_FDEQ_GAIN_3 -43 0x4E50 //RX_FDEQ_GAIN_4 -44 0x5254 //RX_FDEQ_GAIN_5 -45 0x5658 //RX_FDEQ_GAIN_6 -46 0x5A5C //RX_FDEQ_GAIN_7 -47 0x5C5C //RX_FDEQ_GAIN_8 -48 0x5C5C //RX_FDEQ_GAIN_9 -49 0x5C5C //RX_FDEQ_GAIN_10 -50 0x5C5C //RX_FDEQ_GAIN_11 -51 0x5C5C //RX_FDEQ_GAIN_12 -52 0x5C5C //RX_FDEQ_GAIN_13 -53 0x4848 //RX_FDEQ_GAIN_14 -54 0x4848 //RX_FDEQ_GAIN_15 -55 0x4848 //RX_FDEQ_GAIN_16 -56 0x4848 //RX_FDEQ_GAIN_17 -57 0x4848 //RX_FDEQ_GAIN_18 -58 0x4848 //RX_FDEQ_GAIN_19 -59 0x4848 //RX_FDEQ_GAIN_20 -60 0x4848 //RX_FDEQ_GAIN_21 -61 0x4848 //RX_FDEQ_GAIN_22 -62 0x4848 //RX_FDEQ_GAIN_23 -63 0x0202 //RX_FDEQ_BIN_0 -64 0x0203 //RX_FDEQ_BIN_1 -65 0x0402 //RX_FDEQ_BIN_2 -66 0x0505 //RX_FDEQ_BIN_3 -67 0x0505 //RX_FDEQ_BIN_4 -68 0x0505 //RX_FDEQ_BIN_5 -69 0x0505 //RX_FDEQ_BIN_6 -70 0x0505 //RX_FDEQ_BIN_7 -71 0x160C //RX_FDEQ_BIN_8 -72 0x0D0E //RX_FDEQ_BIN_9 -73 0x0E0F //RX_FDEQ_BIN_10 -74 0x0F10 //RX_FDEQ_BIN_11 -75 0x1011 //RX_FDEQ_BIN_12 -76 0x1104 //RX_FDEQ_BIN_13 -77 0x0000 //RX_FDEQ_BIN_14 -78 0x0000 //RX_FDEQ_BIN_15 -79 0x0000 //RX_FDEQ_BIN_16 -80 0x0000 //RX_FDEQ_BIN_17 -81 0x0000 //RX_FDEQ_BIN_18 -82 0x0000 //RX_FDEQ_BIN_19 -83 0x0000 //RX_FDEQ_BIN_20 -84 0x0000 //RX_FDEQ_BIN_21 -85 0x0000 //RX_FDEQ_BIN_22 -86 0x0000 //RX_FDEQ_BIN_23 -87 0x4000 //RX_FDEQ_RESRV_0 -88 0x0320 //RX_FDEQ_RESRV_1 -89 0x0018 //RX_FDDRC_BAND_MARGIN_0 -90 0x0030 //RX_FDDRC_BAND_MARGIN_1 -91 0x0050 //RX_FDDRC_BAND_MARGIN_2 -92 0x0080 //RX_FDDRC_BAND_MARGIN_3 -93 0x0007 //RX_FDDRC_BLOCK_EXP -94 0x5000 //RX_FDDRC_THRD_2_0 -95 0x5000 //RX_FDDRC_THRD_2_1 -96 0x5000 //RX_FDDRC_THRD_2_2 -97 0x5000 //RX_FDDRC_THRD_2_3 -98 0x6400 //RX_FDDRC_THRD_3_0 -99 0x6400 //RX_FDDRC_THRD_3_1 -100 0x6400 //RX_FDDRC_THRD_3_2 -101 0x6400 //RX_FDDRC_THRD_3_3 -102 0x2000 //RX_FDDRC_SLANT_0_0 -103 0x2000 //RX_FDDRC_SLANT_0_1 -104 0x2000 //RX_FDDRC_SLANT_0_2 -105 0x2000 //RX_FDDRC_SLANT_0_3 -106 0x5333 //RX_FDDRC_SLANT_1_0 -107 0x5333 //RX_FDDRC_SLANT_1_1 -108 0x5333 //RX_FDDRC_SLANT_1_2 -109 0x5333 //RX_FDDRC_SLANT_1_3 -110 0x0000 //RX_FDDRC_RESRV_0 -129 0x0100 //RX_SPK_VOL -130 0x0000 //RX_VOL_RESRV_0 -#VOL 3 -6 0x1000 //RX_TDDRC_ALPHA_UP_1 -7 0x1000 //RX_TDDRC_ALPHA_UP_2 -8 0x1000 //RX_TDDRC_ALPHA_UP_3 -9 0x1000 //RX_TDDRC_ALPHA_UP_4 -27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 -28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 -29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 -32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 -33 0x7000 //RX_TDDRC_LIMITER_THRD -34 0x0800 //RX_TDDRC_LIMITER_GAIN -112 0x0000 //RX_TDDRC_THRD_0 -113 0x0000 //RX_TDDRC_THRD_1 -114 0x1800 //RX_TDDRC_THRD_2 -115 0x1800 //RX_TDDRC_THRD_3 -116 0x3000 //RX_TDDRC_SLANT_0 -117 0x6E00 //RX_TDDRC_SLANT_1 -118 0x1000 //RX_TDDRC_ALPHA_UP_0 -119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 -120 0x0000 //RX_TDDRC_HMNC_FLAG -121 0x199A //RX_TDDRC_HMNC_GAIN -122 0x0001 //RX_TDDRC_SMT_FLAG -123 0x0CCD //RX_TDDRC_SMT_W -124 0x0400 //RX_TDDRC_DRC_GAIN -38 0x0030 //RX_FDEQ_SUBNUM -39 0x4848 //RX_FDEQ_GAIN_0 -40 0x4848 //RX_FDEQ_GAIN_1 -41 0x4844 //RX_FDEQ_GAIN_2 -42 0x4A4C //RX_FDEQ_GAIN_3 -43 0x4E50 //RX_FDEQ_GAIN_4 -44 0x5254 //RX_FDEQ_GAIN_5 -45 0x5658 //RX_FDEQ_GAIN_6 -46 0x5A5C //RX_FDEQ_GAIN_7 -47 0x5C5C //RX_FDEQ_GAIN_8 -48 0x5C5C //RX_FDEQ_GAIN_9 -49 0x5C5C //RX_FDEQ_GAIN_10 -50 0x5C5C //RX_FDEQ_GAIN_11 -51 0x5C5C //RX_FDEQ_GAIN_12 -52 0x5C5C //RX_FDEQ_GAIN_13 -53 0x4848 //RX_FDEQ_GAIN_14 -54 0x4848 //RX_FDEQ_GAIN_15 -55 0x4848 //RX_FDEQ_GAIN_16 -56 0x4848 //RX_FDEQ_GAIN_17 -57 0x4848 //RX_FDEQ_GAIN_18 -58 0x4848 //RX_FDEQ_GAIN_19 -59 0x4848 //RX_FDEQ_GAIN_20 -60 0x4848 //RX_FDEQ_GAIN_21 -61 0x4848 //RX_FDEQ_GAIN_22 -62 0x4848 //RX_FDEQ_GAIN_23 -63 0x0202 //RX_FDEQ_BIN_0 -64 0x0203 //RX_FDEQ_BIN_1 -65 0x0402 //RX_FDEQ_BIN_2 -66 0x0505 //RX_FDEQ_BIN_3 -67 0x0505 //RX_FDEQ_BIN_4 -68 0x0505 //RX_FDEQ_BIN_5 -69 0x0505 //RX_FDEQ_BIN_6 -70 0x0505 //RX_FDEQ_BIN_7 -71 0x160C //RX_FDEQ_BIN_8 -72 0x0D0E //RX_FDEQ_BIN_9 -73 0x0E0F //RX_FDEQ_BIN_10 -74 0x0F10 //RX_FDEQ_BIN_11 -75 0x1011 //RX_FDEQ_BIN_12 -76 0x1104 //RX_FDEQ_BIN_13 -77 0x0000 //RX_FDEQ_BIN_14 -78 0x0000 //RX_FDEQ_BIN_15 -79 0x0000 //RX_FDEQ_BIN_16 -80 0x0000 //RX_FDEQ_BIN_17 -81 0x0000 //RX_FDEQ_BIN_18 -82 0x0000 //RX_FDEQ_BIN_19 -83 0x0000 //RX_FDEQ_BIN_20 -84 0x0000 //RX_FDEQ_BIN_21 -85 0x0000 //RX_FDEQ_BIN_22 -86 0x0000 //RX_FDEQ_BIN_23 -87 0x4000 //RX_FDEQ_RESRV_0 -88 0x0320 //RX_FDEQ_RESRV_1 -89 0x0018 //RX_FDDRC_BAND_MARGIN_0 -90 0x0030 //RX_FDDRC_BAND_MARGIN_1 -91 0x0050 //RX_FDDRC_BAND_MARGIN_2 -92 0x0080 //RX_FDDRC_BAND_MARGIN_3 -93 0x0007 //RX_FDDRC_BLOCK_EXP -94 0x5000 //RX_FDDRC_THRD_2_0 -95 0x5000 //RX_FDDRC_THRD_2_1 -96 0x5000 //RX_FDDRC_THRD_2_2 -97 0x5000 //RX_FDDRC_THRD_2_3 -98 0x6400 //RX_FDDRC_THRD_3_0 -99 0x6400 //RX_FDDRC_THRD_3_1 -100 0x6400 //RX_FDDRC_THRD_3_2 -101 0x6400 //RX_FDDRC_THRD_3_3 -102 0x2000 //RX_FDDRC_SLANT_0_0 -103 0x2000 //RX_FDDRC_SLANT_0_1 -104 0x2000 //RX_FDDRC_SLANT_0_2 -105 0x2000 //RX_FDDRC_SLANT_0_3 -106 0x5333 //RX_FDDRC_SLANT_1_0 -107 0x5333 //RX_FDDRC_SLANT_1_1 -108 0x5333 //RX_FDDRC_SLANT_1_2 -109 0x5333 //RX_FDDRC_SLANT_1_3 -110 0x0000 //RX_FDDRC_RESRV_0 -129 0x0100 //RX_SPK_VOL -130 0x0000 //RX_VOL_RESRV_0 -#VOL 4 -6 0x1000 //RX_TDDRC_ALPHA_UP_1 -7 0x1000 //RX_TDDRC_ALPHA_UP_2 -8 0x1000 //RX_TDDRC_ALPHA_UP_3 -9 0x1000 //RX_TDDRC_ALPHA_UP_4 -27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 -28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 -29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 -32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 -33 0x7000 //RX_TDDRC_LIMITER_THRD -34 0x0800 //RX_TDDRC_LIMITER_GAIN -112 0x0000 //RX_TDDRC_THRD_0 -113 0x0000 //RX_TDDRC_THRD_1 -114 0x1800 //RX_TDDRC_THRD_2 -115 0x1800 //RX_TDDRC_THRD_3 -116 0x3000 //RX_TDDRC_SLANT_0 -117 0x6E00 //RX_TDDRC_SLANT_1 -118 0x1000 //RX_TDDRC_ALPHA_UP_0 -119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 -120 0x0000 //RX_TDDRC_HMNC_FLAG -121 0x199A //RX_TDDRC_HMNC_GAIN -122 0x0001 //RX_TDDRC_SMT_FLAG -123 0x0CCD //RX_TDDRC_SMT_W -124 0x0400 //RX_TDDRC_DRC_GAIN -38 0x0030 //RX_FDEQ_SUBNUM -39 0x4848 //RX_FDEQ_GAIN_0 -40 0x4848 //RX_FDEQ_GAIN_1 -41 0x4844 //RX_FDEQ_GAIN_2 -42 0x4A4C //RX_FDEQ_GAIN_3 -43 0x4E50 //RX_FDEQ_GAIN_4 -44 0x5254 //RX_FDEQ_GAIN_5 -45 0x5658 //RX_FDEQ_GAIN_6 -46 0x5A5C //RX_FDEQ_GAIN_7 -47 0x5C5C //RX_FDEQ_GAIN_8 -48 0x5C5C //RX_FDEQ_GAIN_9 -49 0x5C5C //RX_FDEQ_GAIN_10 -50 0x5C5C //RX_FDEQ_GAIN_11 -51 0x5C5C //RX_FDEQ_GAIN_12 -52 0x5C5C //RX_FDEQ_GAIN_13 -53 0x4848 //RX_FDEQ_GAIN_14 -54 0x4848 //RX_FDEQ_GAIN_15 -55 0x4848 //RX_FDEQ_GAIN_16 -56 0x4848 //RX_FDEQ_GAIN_17 -57 0x4848 //RX_FDEQ_GAIN_18 -58 0x4848 //RX_FDEQ_GAIN_19 -59 0x4848 //RX_FDEQ_GAIN_20 -60 0x4848 //RX_FDEQ_GAIN_21 -61 0x4848 //RX_FDEQ_GAIN_22 -62 0x4848 //RX_FDEQ_GAIN_23 -63 0x0202 //RX_FDEQ_BIN_0 -64 0x0203 //RX_FDEQ_BIN_1 -65 0x0402 //RX_FDEQ_BIN_2 -66 0x0505 //RX_FDEQ_BIN_3 -67 0x0505 //RX_FDEQ_BIN_4 -68 0x0505 //RX_FDEQ_BIN_5 -69 0x0505 //RX_FDEQ_BIN_6 -70 0x0505 //RX_FDEQ_BIN_7 -71 0x160C //RX_FDEQ_BIN_8 -72 0x0D0E //RX_FDEQ_BIN_9 -73 0x0E0F //RX_FDEQ_BIN_10 -74 0x0F10 //RX_FDEQ_BIN_11 -75 0x1011 //RX_FDEQ_BIN_12 -76 0x1104 //RX_FDEQ_BIN_13 -77 0x0000 //RX_FDEQ_BIN_14 -78 0x0000 //RX_FDEQ_BIN_15 -79 0x0000 //RX_FDEQ_BIN_16 -80 0x0000 //RX_FDEQ_BIN_17 -81 0x0000 //RX_FDEQ_BIN_18 -82 0x0000 //RX_FDEQ_BIN_19 -83 0x0000 //RX_FDEQ_BIN_20 -84 0x0000 //RX_FDEQ_BIN_21 -85 0x0000 //RX_FDEQ_BIN_22 -86 0x0000 //RX_FDEQ_BIN_23 -87 0x4000 //RX_FDEQ_RESRV_0 -88 0x0320 //RX_FDEQ_RESRV_1 -89 0x0018 //RX_FDDRC_BAND_MARGIN_0 -90 0x0030 //RX_FDDRC_BAND_MARGIN_1 -91 0x0050 //RX_FDDRC_BAND_MARGIN_2 -92 0x0080 //RX_FDDRC_BAND_MARGIN_3 -93 0x0007 //RX_FDDRC_BLOCK_EXP -94 0x5000 //RX_FDDRC_THRD_2_0 -95 0x5000 //RX_FDDRC_THRD_2_1 -96 0x5000 //RX_FDDRC_THRD_2_2 -97 0x5000 //RX_FDDRC_THRD_2_3 -98 0x6400 //RX_FDDRC_THRD_3_0 -99 0x6400 //RX_FDDRC_THRD_3_1 -100 0x6400 //RX_FDDRC_THRD_3_2 -101 0x6400 //RX_FDDRC_THRD_3_3 -102 0x2000 //RX_FDDRC_SLANT_0_0 -103 0x2000 //RX_FDDRC_SLANT_0_1 -104 0x2000 //RX_FDDRC_SLANT_0_2 -105 0x2000 //RX_FDDRC_SLANT_0_3 -106 0x5333 //RX_FDDRC_SLANT_1_0 -107 0x5333 //RX_FDDRC_SLANT_1_1 -108 0x5333 //RX_FDDRC_SLANT_1_2 -109 0x5333 //RX_FDDRC_SLANT_1_3 -110 0x0000 //RX_FDDRC_RESRV_0 -129 0x0100 //RX_SPK_VOL -130 0x0000 //RX_VOL_RESRV_0 -#VOL 5 -6 0x1000 //RX_TDDRC_ALPHA_UP_1 -7 0x1000 //RX_TDDRC_ALPHA_UP_2 -8 0x1000 //RX_TDDRC_ALPHA_UP_3 -9 0x1000 //RX_TDDRC_ALPHA_UP_4 -27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 -28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 -29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 -32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 -33 0x7000 //RX_TDDRC_LIMITER_THRD -34 0x0800 //RX_TDDRC_LIMITER_GAIN -112 0x0000 //RX_TDDRC_THRD_0 -113 0x0000 //RX_TDDRC_THRD_1 -114 0x1800 //RX_TDDRC_THRD_2 -115 0x1800 //RX_TDDRC_THRD_3 -116 0x3000 //RX_TDDRC_SLANT_0 -117 0x6E00 //RX_TDDRC_SLANT_1 -118 0x1000 //RX_TDDRC_ALPHA_UP_0 -119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 -120 0x0000 //RX_TDDRC_HMNC_FLAG -121 0x199A //RX_TDDRC_HMNC_GAIN -122 0x0001 //RX_TDDRC_SMT_FLAG -123 0x0CCD //RX_TDDRC_SMT_W -124 0x0400 //RX_TDDRC_DRC_GAIN -38 0x0030 //RX_FDEQ_SUBNUM -39 0x4848 //RX_FDEQ_GAIN_0 -40 0x4848 //RX_FDEQ_GAIN_1 -41 0x4844 //RX_FDEQ_GAIN_2 -42 0x4A4C //RX_FDEQ_GAIN_3 -43 0x4E50 //RX_FDEQ_GAIN_4 -44 0x5254 //RX_FDEQ_GAIN_5 -45 0x5658 //RX_FDEQ_GAIN_6 -46 0x5A5C //RX_FDEQ_GAIN_7 -47 0x5C5C //RX_FDEQ_GAIN_8 -48 0x5C5C //RX_FDEQ_GAIN_9 -49 0x5C5C //RX_FDEQ_GAIN_10 -50 0x5C5C //RX_FDEQ_GAIN_11 -51 0x5C5C //RX_FDEQ_GAIN_12 -52 0x5C5C //RX_FDEQ_GAIN_13 -53 0x4848 //RX_FDEQ_GAIN_14 -54 0x4848 //RX_FDEQ_GAIN_15 -55 0x4848 //RX_FDEQ_GAIN_16 -56 0x4848 //RX_FDEQ_GAIN_17 -57 0x4848 //RX_FDEQ_GAIN_18 -58 0x4848 //RX_FDEQ_GAIN_19 -59 0x4848 //RX_FDEQ_GAIN_20 -60 0x4848 //RX_FDEQ_GAIN_21 -61 0x4848 //RX_FDEQ_GAIN_22 -62 0x4848 //RX_FDEQ_GAIN_23 -63 0x0202 //RX_FDEQ_BIN_0 -64 0x0203 //RX_FDEQ_BIN_1 -65 0x0402 //RX_FDEQ_BIN_2 -66 0x0505 //RX_FDEQ_BIN_3 -67 0x0505 //RX_FDEQ_BIN_4 -68 0x0505 //RX_FDEQ_BIN_5 -69 0x0505 //RX_FDEQ_BIN_6 -70 0x0505 //RX_FDEQ_BIN_7 -71 0x160C //RX_FDEQ_BIN_8 -72 0x0D0E //RX_FDEQ_BIN_9 -73 0x0E0F //RX_FDEQ_BIN_10 -74 0x0F10 //RX_FDEQ_BIN_11 -75 0x1011 //RX_FDEQ_BIN_12 -76 0x1104 //RX_FDEQ_BIN_13 -77 0x0000 //RX_FDEQ_BIN_14 -78 0x0000 //RX_FDEQ_BIN_15 -79 0x0000 //RX_FDEQ_BIN_16 -80 0x0000 //RX_FDEQ_BIN_17 -81 0x0000 //RX_FDEQ_BIN_18 -82 0x0000 //RX_FDEQ_BIN_19 -83 0x0000 //RX_FDEQ_BIN_20 -84 0x0000 //RX_FDEQ_BIN_21 -85 0x0000 //RX_FDEQ_BIN_22 -86 0x0000 //RX_FDEQ_BIN_23 -87 0x4000 //RX_FDEQ_RESRV_0 -88 0x0320 //RX_FDEQ_RESRV_1 -89 0x0018 //RX_FDDRC_BAND_MARGIN_0 -90 0x0030 //RX_FDDRC_BAND_MARGIN_1 -91 0x0050 //RX_FDDRC_BAND_MARGIN_2 -92 0x0080 //RX_FDDRC_BAND_MARGIN_3 -93 0x0007 //RX_FDDRC_BLOCK_EXP -94 0x5000 //RX_FDDRC_THRD_2_0 -95 0x5000 //RX_FDDRC_THRD_2_1 -96 0x5000 //RX_FDDRC_THRD_2_2 -97 0x5000 //RX_FDDRC_THRD_2_3 -98 0x6400 //RX_FDDRC_THRD_3_0 -99 0x6400 //RX_FDDRC_THRD_3_1 -100 0x6400 //RX_FDDRC_THRD_3_2 -101 0x6400 //RX_FDDRC_THRD_3_3 -102 0x2000 //RX_FDDRC_SLANT_0_0 -103 0x2000 //RX_FDDRC_SLANT_0_1 -104 0x2000 //RX_FDDRC_SLANT_0_2 -105 0x2000 //RX_FDDRC_SLANT_0_3 -106 0x5333 //RX_FDDRC_SLANT_1_0 -107 0x5333 //RX_FDDRC_SLANT_1_1 -108 0x5333 //RX_FDDRC_SLANT_1_2 -109 0x5333 //RX_FDDRC_SLANT_1_3 -110 0x0000 //RX_FDDRC_RESRV_0 -129 0x0100 //RX_SPK_VOL -130 0x0000 //RX_VOL_RESRV_0 -#VOL 6 -6 0x1000 //RX_TDDRC_ALPHA_UP_1 -7 0x1000 //RX_TDDRC_ALPHA_UP_2 -8 0x1000 //RX_TDDRC_ALPHA_UP_3 -9 0x1000 //RX_TDDRC_ALPHA_UP_4 -27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 -28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 -29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 -32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 -33 0x7000 //RX_TDDRC_LIMITER_THRD -34 0x0800 //RX_TDDRC_LIMITER_GAIN -112 0x0000 //RX_TDDRC_THRD_0 -113 0x0000 //RX_TDDRC_THRD_1 -114 0x1800 //RX_TDDRC_THRD_2 -115 0x1800 //RX_TDDRC_THRD_3 -116 0x3000 //RX_TDDRC_SLANT_0 -117 0x6E00 //RX_TDDRC_SLANT_1 -118 0x1000 //RX_TDDRC_ALPHA_UP_0 -119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 -120 0x0000 //RX_TDDRC_HMNC_FLAG -121 0x199A //RX_TDDRC_HMNC_GAIN -122 0x0001 //RX_TDDRC_SMT_FLAG -123 0x0CCD //RX_TDDRC_SMT_W -124 0x0400 //RX_TDDRC_DRC_GAIN -38 0x0030 //RX_FDEQ_SUBNUM -39 0x4848 //RX_FDEQ_GAIN_0 -40 0x4848 //RX_FDEQ_GAIN_1 -41 0x4844 //RX_FDEQ_GAIN_2 -42 0x4A4C //RX_FDEQ_GAIN_3 -43 0x4E50 //RX_FDEQ_GAIN_4 -44 0x5254 //RX_FDEQ_GAIN_5 -45 0x5658 //RX_FDEQ_GAIN_6 -46 0x5A5C //RX_FDEQ_GAIN_7 -47 0x5C5C //RX_FDEQ_GAIN_8 -48 0x5C5C //RX_FDEQ_GAIN_9 -49 0x5C5C //RX_FDEQ_GAIN_10 -50 0x5C5C //RX_FDEQ_GAIN_11 -51 0x5C5C //RX_FDEQ_GAIN_12 -52 0x5C5C //RX_FDEQ_GAIN_13 -53 0x4848 //RX_FDEQ_GAIN_14 -54 0x4848 //RX_FDEQ_GAIN_15 -55 0x4848 //RX_FDEQ_GAIN_16 -56 0x4848 //RX_FDEQ_GAIN_17 -57 0x4848 //RX_FDEQ_GAIN_18 -58 0x4848 //RX_FDEQ_GAIN_19 -59 0x4848 //RX_FDEQ_GAIN_20 -60 0x4848 //RX_FDEQ_GAIN_21 -61 0x4848 //RX_FDEQ_GAIN_22 -62 0x4848 //RX_FDEQ_GAIN_23 -63 0x0202 //RX_FDEQ_BIN_0 -64 0x0203 //RX_FDEQ_BIN_1 -65 0x0402 //RX_FDEQ_BIN_2 -66 0x0505 //RX_FDEQ_BIN_3 -67 0x0505 //RX_FDEQ_BIN_4 -68 0x0505 //RX_FDEQ_BIN_5 -69 0x0505 //RX_FDEQ_BIN_6 -70 0x0505 //RX_FDEQ_BIN_7 -71 0x160C //RX_FDEQ_BIN_8 -72 0x0D0E //RX_FDEQ_BIN_9 -73 0x0E0F //RX_FDEQ_BIN_10 -74 0x0F10 //RX_FDEQ_BIN_11 -75 0x1011 //RX_FDEQ_BIN_12 -76 0x1104 //RX_FDEQ_BIN_13 -77 0x0000 //RX_FDEQ_BIN_14 -78 0x0000 //RX_FDEQ_BIN_15 -79 0x0000 //RX_FDEQ_BIN_16 -80 0x0000 //RX_FDEQ_BIN_17 -81 0x0000 //RX_FDEQ_BIN_18 -82 0x0000 //RX_FDEQ_BIN_19 -83 0x0000 //RX_FDEQ_BIN_20 -84 0x0000 //RX_FDEQ_BIN_21 -85 0x0000 //RX_FDEQ_BIN_22 -86 0x0000 //RX_FDEQ_BIN_23 -87 0x4000 //RX_FDEQ_RESRV_0 -88 0x0320 //RX_FDEQ_RESRV_1 -89 0x0018 //RX_FDDRC_BAND_MARGIN_0 -90 0x0030 //RX_FDDRC_BAND_MARGIN_1 -91 0x0050 //RX_FDDRC_BAND_MARGIN_2 -92 0x0080 //RX_FDDRC_BAND_MARGIN_3 -93 0x0007 //RX_FDDRC_BLOCK_EXP -94 0x5000 //RX_FDDRC_THRD_2_0 -95 0x5000 //RX_FDDRC_THRD_2_1 -96 0x5000 //RX_FDDRC_THRD_2_2 -97 0x5000 //RX_FDDRC_THRD_2_3 -98 0x6400 //RX_FDDRC_THRD_3_0 -99 0x6400 //RX_FDDRC_THRD_3_1 -100 0x6400 //RX_FDDRC_THRD_3_2 -101 0x6400 //RX_FDDRC_THRD_3_3 -102 0x2000 //RX_FDDRC_SLANT_0_0 -103 0x2000 //RX_FDDRC_SLANT_0_1 -104 0x2000 //RX_FDDRC_SLANT_0_2 -105 0x2000 //RX_FDDRC_SLANT_0_3 -106 0x5333 //RX_FDDRC_SLANT_1_0 -107 0x5333 //RX_FDDRC_SLANT_1_1 -108 0x5333 //RX_FDDRC_SLANT_1_2 -109 0x5333 //RX_FDDRC_SLANT_1_3 -110 0x0000 //RX_FDDRC_RESRV_0 -129 0x0100 //RX_SPK_VOL -130 0x0000 //RX_VOL_RESRV_0 - -#CASE_NAME HANDSET-HANDSET_HAC-VOICE_GENERIC-SWB -#PARAM_TYPE TX+RX -#TOTAL_CUSTOM_STEP 7 -#TX -0 0x0000 //TX_OPERATION_MODE_0 -1 0x0000 //TX_OPERATION_MODE_1 -2 0x0026 //TX_PATCH_REG -3 0x6F7E //TX_SENDFUNC_MODE_0 -4 0x0001 //TX_SENDFUNC_MODE_1 -5 0x0002 //TX_NUM_MIC -6 0x0003 //TX_SAMPLINGFREQ_SIG -7 0x0003 //TX_SAMPLINGFREQ_PROC -8 0x000A //TX_FRAME_SZ_SIG -9 0x000A //TX_FRAME_SZ -10 0x0000 //TX_DELAY_OPT -11 0x0028 //TX_MAX_TAIL_LENGTH -12 0x0001 //TX_NUM_LOUTCHN -13 0x0001 //TX_MAXNUM_AECREF -14 0x0000 //TX_DBG_FUNC_REG -15 0x0000 //TX_DBG_FUNC_REG1 -16 0x0000 //TX_SYS_RESRV_0 -17 0x0000 //TX_SYS_RESRV_1 -18 0x0000 //TX_SYS_RESRV_2 -19 0x0000 //TX_SYS_RESRV_3 -20 0x0000 //TX_DIST2REF0 -21 0x009D //TX_DIST2REF1 -22 0x0000 //TX_DIST2REF_02 -23 0x0000 //TX_DIST2REF_03 -24 0x0000 //TX_DIST2REF_04 -25 0x0000 //TX_DIST2REF_05 -26 0x0000 //TX_MMIC -27 0x1000 //TX_PGA_0 -28 0x1000 //TX_PGA_1 -29 0x1000 //TX_PGA_2 -30 0x0000 //TX_PGA_3 -31 0x0000 //TX_PGA_4 -32 0x0000 //TX_PGA_5 -33 0x0000 //TX_MIC_PAIRS -34 0x0000 //TX_MIC_PAIRS_HS -35 0x0002 //TX_MICS_FOR_BF -36 0x0000 //TX_MIC_PAIRS_FORL1 -37 0x0002 //TX_MICS_OF_PAIR0 -38 0x0002 //TX_MICS_OF_PAIR1 -39 0x0002 //TX_MICS_OF_PAIR2 -40 0x0002 //TX_MICS_OF_PAIR3 -41 0x0000 //TX_MIC_DATA_SRC0 -42 0x0002 //TX_MIC_DATA_SRC1 -43 0x0001 //TX_MIC_DATA_SRC2 -44 0x0000 //TX_MIC_DATA_SRC3 -45 0x0000 //TX_MIC_PAIR_CH_04 -46 0x0000 //TX_MIC_PAIR_CH_05 -47 0x0000 //TX_MIC_PAIR_CH_10 -48 0x0000 //TX_MIC_PAIR_CH_11 -49 0x0000 //TX_MIC_PAIR_CH_12 -50 0x0000 //TX_MIC_PAIR_CH_13 -51 0x0000 //TX_MIC_PAIR_CH_14 -52 0x05DC //TX_HD_BIN_MASK -53 0x0010 //TX_HD_SUBAND_MASK -54 0x19A1 //TX_HD_FRAME_AVG_MASK -55 0x0320 //TX_HD_MIN_FRQ -56 0x1000 //TX_HD_ALPHA_PSD -57 0x1100 //TX_T_PHPR1 -58 0x0000 //TX_T_PHPR2 -59 0x0000 //TX_T_PTPR -60 0x0000 //TX_T_PNPR -61 0x0000 //TX_T_PAPR1 -62 0xEE6C //TX_T_PSDVAT -63 0x0800 //TX_CNT -64 0x4000 //TX_ANTI_HOWL_GAIN -65 0x0001 //TX_MICFORBFMARK_0 -66 0x0001 //TX_MICFORBFMARK_1 -67 0x0001 //TX_MICFORBFMARK_2 -68 0x0001 //TX_MICFORBFMARK_3 -69 0x0001 //TX_MICFORBFMARK_4 -70 0x0001 //TX_MICFORBFMARK_5 -71 0x0000 //TX_DIST2REF_10 -72 0x3A66 //TX_DIST2REF_11 -73 0x0000 //TX_DIST2REF2 -74 0x0000 //TX_DIST2REF_13 -75 0x0000 //TX_DIST2REF_14 -76 0x0000 //TX_DIST2REF_15 -77 0x0000 //TX_DIST2REF_20 -78 0x0000 //TX_DIST2REF_21 -79 0x0000 //TX_DIST2REF_22 -80 0x0000 //TX_DIST2REF_23 -81 0x0000 //TX_DIST2REF_24 -82 0x0000 //TX_DIST2REF_25 -83 0x0000 //TX_DIST2REF_30 -84 0x0000 //TX_DIST2REF_31 -85 0x0000 //TX_DIST2REF_32 -86 0x0000 //TX_DIST2REF_33 -87 0x0000 //TX_DIST2REF_34 -88 0x0000 //TX_DIST2REF_35 -89 0x0000 //TX_MIC_LOC_00 -90 0x0000 //TX_MIC_LOC_01 -91 0x0000 //TX_MIC_LOC_02 -92 0x0000 //TX_MIC_LOC_03 -93 0x0000 //TX_MIC_LOC_04 -94 0x0000 //TX_MIC_LOC_05 -95 0x0000 //TX_MIC_LOC_10 -96 0x0000 //TX_MIC_LOC_11 -97 0x0000 //TX_MIC_LOC_12 -98 0x0000 //TX_MIC_LOC_13 -99 0x0000 //TX_MIC_LOC_14 -100 0x0000 //TX_MIC_LOC_15 -101 0x0000 //TX_MIC_LOC_20 -102 0x0000 //TX_MIC_LOC_21 -103 0x0000 //TX_MIC_LOC_22 -104 0x0000 //TX_MIC_LOC_23 -105 0x0000 //TX_MIC_LOC_24 -106 0x0000 //TX_MIC_LOC_25 -107 0x0200 //TX_MIC_REFBLK_VOLUME -108 0x0AAC //TX_MIC_BLOCK_VOLUME -109 0x0000 //TX_INVERSE_MASK -110 0x0000 //TX_ADCS_MASK -111 0x04D0 //TX_ADCS_GAIN -112 0x4000 //TX_NFC_GAINFAC -113 0x0000 //TX_MAINMIC_BLKFACTOR -114 0x0000 //TX_REFMIC_BLKFACTOR -115 0x0000 //TX_BLMIC_BLKFACTOR -116 0x0000 //TX_BRMIC_BLKFACTOR -117 0x0031 //TX_MICBLK_START_BIN -118 0x0060 //TX_MICBLK_END_BIN -119 0x0015 //TX_MICBLK_FE_HOLD -120 0xFFF2 //TX_MICBLK_MR_EXP_TH -121 0xFFF2 //TX_MICBLK_LR_EXP_TH -122 0x0000 //TX_FENE_HOLD -123 0x4000 //TX_FE_ENER_TH_MTS -124 0x0004 //TX_FE_ENER_TH_EXP -125 0x6000 //TX_C_POST_FLT_MIC_MAINBLK -126 0x6000 //TX_C_POST_FLT_MIC_REFBLK -127 0x0010 //TX_MIC_BLOCK_N -128 0x7E56 //TX_A_HP -129 0x4000 //TX_B_PE -130 0x1800 //TX_THR_PITCH_DET_0 -131 0x1000 //TX_THR_PITCH_DET_1 -132 0x0800 //TX_THR_PITCH_DET_2 -133 0x0008 //TX_PITCH_BFR_LEN -134 0x0003 //TX_SBD_PITCH_DET -135 0x0050 //TX_TD_AEC_L -136 0x4000 //TX_MU0_UNP_TD_AEC -137 0x1000 //TX_MU0_PTD_TD_AEC -138 0x0000 //TX_PP_RESRV_0 -139 0x2A94 //TX_PP_RESRV_1 -140 0x55F0 //TX_PP_RESRV_2 -141 0x0000 //TX_PP_RESRV_3 -142 0x0000 //TX_PP_RESRV_4 -143 0x0000 //TX_PP_RESRV_5 -144 0x0000 //TX_PP_RESRV_6 -145 0x0000 //TX_PP_RESRV_7 -146 0x0028 //TX_TAIL_LENGTH -147 0x0080 //TX_AEC_REF_GAIN_0 -148 0x0800 //TX_AEC_REF_GAIN_1 -149 0x0800 //TX_AEC_REF_GAIN_2 -150 0x7900 //TX_EAD_THR -151 0x2000 //TX_THR_RE_EST -152 0x0400 //TX_MIN_EQ_RE_EST_0 -153 0x0400 //TX_MIN_EQ_RE_EST_1 -154 0x0800 //TX_MIN_EQ_RE_EST_2 -155 0x0800 //TX_MIN_EQ_RE_EST_3 -156 0x1000 //TX_MIN_EQ_RE_EST_4 -157 0x1000 //TX_MIN_EQ_RE_EST_5 -158 0x1000 //TX_MIN_EQ_RE_EST_6 -159 0x1000 //TX_MIN_EQ_RE_EST_7 -160 0x1000 //TX_MIN_EQ_RE_EST_8 -161 0x1000 //TX_MIN_EQ_RE_EST_9 -162 0x1000 //TX_MIN_EQ_RE_EST_10 -163 0x1000 //TX_MIN_EQ_RE_EST_11 -164 0x1000 //TX_MIN_EQ_RE_EST_12 -165 0x3000 //TX_LAMBDA_RE_EST -166 0x1000 //TX_LAMBDA_CB_NLE -167 0x1800 //TX_C_POST_FLT -168 0x4000 //TX_GAIN_NP -169 0x003C //TX_SE_HOLD_N -170 0x0046 //TX_DT_HOLD_N -171 0x03E8 //TX_DT2_HOLD_N -172 0x6666 //TX_AEC_RESRV_0 -173 0x0000 //TX_AEC_RESRV_1 -174 0x0014 //TX_AEC_RESRV_2 -175 0x0000 //TX_MIC_DELAY_LENGTH -176 0x0000 //TX_REF_DELAY_LENGTH -177 0x0000 //TX_ADD_LINEIN_GAINL -178 0x0000 //TX_ADD_LINEIN_GAINH -179 0x0000 //TX_MIN_EQ_RE_EST_14 -180 0x0000 //TX_DTD_THR1_8 -181 0x7FFF //TX_DTD_THR2_8 -182 0x0000 //TX_DTD_MIC_BLK2 -183 0x0008 //TX_FRQ_LIN_LEN -184 0x7FFF //TX_FRQ_AEC_LEN_RHO -185 0x6000 //TX_MU0_UNP_FRQ_AEC -186 0x4000 //TX_MU0_PTD_FRQ_AEC -187 0x000A //TX_MINENOISETH -188 0x0800 //TX_MU0_RE_EST -189 0x0001 //TX_AEC_NUM_CH -190 0x0000 //TX_BIGECHOATTENUATION_MAX -191 0x2000 //TX_A_POST_FLT_MICBLK -192 0x0000 //TX_BLKENERTH -193 0x0000 //TX_BLKENERHIGHTH -194 0x0000 //TX_NORMENERTH -195 0x0000 //TX_NORMENERHIGHTH -196 0x0000 //TX_NORMENERHIGHTHL -197 0x7000 //TX_DTD_THR1_0 -198 0x7000 //TX_DTD_THR1_1 -199 0x7000 //TX_DTD_THR1_2 -200 0x7F00 //TX_DTD_THR1_3 -201 0x7F00 //TX_DTD_THR1_4 -202 0x7F00 //TX_DTD_THR1_5 -203 0x7F00 //TX_DTD_THR1_6 -204 0x2000 //TX_DTD_THR2_0 -205 0x2000 //TX_DTD_THR2_1 -206 0x2000 //TX_DTD_THR2_2 -207 0x1000 //TX_DTD_THR2_3 -208 0x1000 //TX_DTD_THR2_4 -209 0x1000 //TX_DTD_THR2_5 -210 0x1000 //TX_DTD_THR2_6 -211 0x6000 //TX_DTD_THR3 -212 0x0177 //TX_SPK_CUT_K -213 0x1B58 //TX_DT_CUT_K -214 0x0100 //TX_DT_CUT_THR -215 0x04EB //TX_COMFORT_G -216 0x01F4 //TX_POWER_YOUT_TH -217 0x4000 //TX_FDPFGAINECHO -218 0x0000 //TX_DTD_HD_THR -219 0x0000 //TX_SPK_CUT_K_S -220 0x0000 //TX_DTD_MIC_BLK -221 0x0400 //TX_ADPT_STRICT_L -222 0x0200 //TX_ADPT_STRICT_H -223 0x0C00 //TX_RATIO_DT_L_TH_LOW -224 0x2000 //TX_RATIO_DT_H_TH_LOW -225 0x1800 //TX_RATIO_DT_L_TH_HIGH -226 0x3000 //TX_RATIO_DT_H_TH_HIGH -227 0x0A00 //TX_RATIO_DT_L0_TH -228 0x7000 //TX_B_POST_FILT_ECHO_L -229 0x7FFF //TX_B_POST_FILT_ECHO_H -230 0x0200 //TX_MIN_G_CTRL_ECHO -231 0x7FFF //TX_B_LESSCUT_RTO_ECHO -232 0x0000 //TX_EPD_OFFSET_00 -233 0x0000 //TX_EPD_OFFST_01 -234 0x1388 //TX_RATIO_DT_L0_TH_HIGH -235 0x3A98 //TX_RATIO_DT_H_TH_CUT -236 0x7FFF //TX_MIN_EQ_RE_EST_13 -237 0x0000 //TX_DTD_THR1_7 -238 0x0000 //TX_DTD_THR2_7 -239 0x0800 //TX_DT_RESRV_7 -240 0x0800 //TX_DT_RESRV_8 -241 0x0000 //TX_DT_RESRV_9 -242 0xF600 //TX_THR_SN_EST_0 -243 0xFA00 //TX_THR_SN_EST_1 -244 0xFA00 //TX_THR_SN_EST_2 -245 0xF800 //TX_THR_SN_EST_3 -246 0xF800 //TX_THR_SN_EST_4 -247 0xF800 //TX_THR_SN_EST_5 -248 0xF800 //TX_THR_SN_EST_6 -249 0xF700 //TX_THR_SN_EST_7 -250 0x0000 //TX_DELTA_THR_SN_EST_0 -251 0x0100 //TX_DELTA_THR_SN_EST_1 -252 0x0200 //TX_DELTA_THR_SN_EST_2 -253 0x0200 //TX_DELTA_THR_SN_EST_3 -254 0x0200 //TX_DELTA_THR_SN_EST_4 -255 0x0100 //TX_DELTA_THR_SN_EST_5 -256 0x0200 //TX_DELTA_THR_SN_EST_6 -257 0x0200 //TX_DELTA_THR_SN_EST_7 -258 0x4000 //TX_LAMBDA_NN_EST_0 -259 0x4000 //TX_LAMBDA_NN_EST_1 -260 0x4000 //TX_LAMBDA_NN_EST_2 -261 0x4000 //TX_LAMBDA_NN_EST_3 -262 0x4000 //TX_LAMBDA_NN_EST_4 -263 0x4000 //TX_LAMBDA_NN_EST_5 -264 0x4000 //TX_LAMBDA_NN_EST_6 -265 0x4000 //TX_LAMBDA_NN_EST_7 -266 0x0400 //TX_N_SN_EST -267 0x001E //TX_INBEAM_T -268 0x0041 //TX_INBEAMHOLDT -269 0x2000 //TX_G_STRICT -270 0x2000 //TX_EQ_THR_BF -271 0x799A //TX_LAMBDA_EQ_BF -272 0x1000 //TX_NE_RTO_TH -273 0x1000 //TX_NE_RTO_TH_L -274 0x1000 //TX_MAINREFRTOH_TH_H -275 0x0600 //TX_MAINREFRTOH_TH_L -276 0x2000 //TX_MAINREFRTO_TH_H -277 0x1400 //TX_MAINREFRTO_TH_L -278 0x0000 //TX_MAINREFRTO_TH_EQ -279 0x1000 //TX_B_POST_FLT_0 -280 0x1000 //TX_B_POST_FLT_1 -281 0x0014 //TX_NS_LVL_CTRL_0 -282 0x0016 //TX_NS_LVL_CTRL_1 -283 0x002C //TX_NS_LVL_CTRL_2 -284 0x0016 //TX_NS_LVL_CTRL_3 -285 0x0018 //TX_NS_LVL_CTRL_4 -286 0x0016 //TX_NS_LVL_CTRL_5 -287 0x0012 //TX_NS_LVL_CTRL_6 -288 0x0017 //TX_NS_LVL_CTRL_7 -289 0x000E //TX_MIN_GAIN_S_0 -290 0x0012 //TX_MIN_GAIN_S_1 -291 0x000D //TX_MIN_GAIN_S_2 -292 0x0012 //TX_MIN_GAIN_S_3 -293 0x0010 //TX_MIN_GAIN_S_4 -294 0x0012 //TX_MIN_GAIN_S_5 -295 0x0012 //TX_MIN_GAIN_S_6 -296 0x0012 //TX_MIN_GAIN_S_7 -297 0x6000 //TX_NMOS_SUP -298 0x0000 //TX_NS_MAX_PRI_SNR_TH -299 0x0000 //TX_NMOS_SUP_MENSA -300 0x7FFF //TX_SNRI_SUP_0 -301 0x6000 //TX_SNRI_SUP_1 -302 0x6000 //TX_SNRI_SUP_2 -303 0x6000 //TX_SNRI_SUP_3 -304 0x6000 //TX_SNRI_SUP_4 -305 0x6000 //TX_SNRI_SUP_5 -306 0x6000 //TX_SNRI_SUP_6 -307 0x6000 //TX_SNRI_SUP_7 -308 0x6000 //TX_THR_LFNS -309 0x0017 //TX_G_LFNS -310 0x09C4 //TX_GAIN0_NTH -311 0x000A //TX_MUSIC_MORENS -312 0x7FFF //TX_A_POST_FILT_0 -313 0x2000 //TX_A_POST_FILT_1 -314 0x4000 //TX_A_POST_FILT_S_0 -315 0x5000 //TX_A_POST_FILT_S_1 -316 0x4000 //TX_A_POST_FILT_S_2 -317 0x4000 //TX_A_POST_FILT_S_3 -318 0x4000 //TX_A_POST_FILT_S_4 -319 0x4000 //TX_A_POST_FILT_S_5 -320 0x4000 //TX_A_POST_FILT_S_6 -321 0x7000 //TX_A_POST_FILT_S_7 -322 0x1000 //TX_B_POST_FILT_0 -323 0x1000 //TX_B_POST_FILT_1 -324 0x3000 //TX_B_POST_FILT_2 -325 0x1000 //TX_B_POST_FILT_3 -326 0x5000 //TX_B_POST_FILT_4 -327 0x2000 //TX_B_POST_FILT_5 -328 0x6000 //TX_B_POST_FILT_6 -329 0x3000 //TX_B_POST_FILT_7 -330 0x1000 //TX_B_LESSCUT_RTO_S_0 -331 0x6000 //TX_B_LESSCUT_RTO_S_1 -332 0x6000 //TX_B_LESSCUT_RTO_S_2 -333 0x6000 //TX_B_LESSCUT_RTO_S_3 -334 0x6000 //TX_B_LESSCUT_RTO_S_4 -335 0x6000 //TX_B_LESSCUT_RTO_S_5 -336 0x7FFF //TX_B_LESSCUT_RTO_S_6 -337 0x7FFF //TX_B_LESSCUT_RTO_S_7 -338 0x7E14 //TX_LAMBDA_PFILT -339 0x7C29 //TX_LAMBDA_PFILT_S_0 -340 0x7C29 //TX_LAMBDA_PFILT_S_1 -341 0x7C29 //TX_LAMBDA_PFILT_S_2 -342 0x7C29 //TX_LAMBDA_PFILT_S_3 -343 0x7C29 //TX_LAMBDA_PFILT_S_4 -344 0x7C29 //TX_LAMBDA_PFILT_S_5 -345 0x7C29 //TX_LAMBDA_PFILT_S_6 -346 0x7C29 //TX_LAMBDA_PFILT_S_7 -347 0x07D0 //TX_K_PEPPER -348 0x0800 //TX_A_PEPPER -349 0x1D4C //TX_K_PEPPER_HF -350 0x0400 //TX_A_PEPPER_HF -351 0x0001 //TX_HMNC_BST_FLG -352 0x4000 //TX_HMNC_BST_THR -353 0x0800 //TX_DT_BINVAD_TH_0 -354 0x0800 //TX_DT_BINVAD_TH_1 -355 0x0800 //TX_DT_BINVAD_TH_2 -356 0x0800 //TX_DT_BINVAD_TH_3 -357 0x0000 //TX_DT_BINVAD_ENDF -358 0x1000 //TX_C_POST_FLT_DT -359 0x7FFF //TX_NS_B_POST_FLT_LESSCUT -360 0x0100 //TX_DT_BOOST -361 0x0000 //TX_BF_SGRAD_FLG -362 0x0005 //TX_BF_DVG_TH -363 0x001E //TX_SN_C_F -364 0x0000 //TX_K_APT -365 0x0001 //TX_NOISEDET -366 0x0190 //TX_NDETCT -367 0x000A //TX_NOISE_TH_0 -368 0x7FFF //TX_NOISE_TH_0_2 -369 0x7FFF //TX_NOISE_TH_0_3 -370 0x00C6 //TX_NOISE_TH_1 -371 0x0DAC //TX_NOISE_TH_2 -372 0x2260 //TX_NOISE_TH_3 -373 0x7080 //TX_NOISE_TH_4 -374 0x57E4 //TX_NOISE_TH_5 -375 0x4BD6 //TX_NOISE_TH_5_2 -376 0x0001 //TX_NOISE_TH_5_3 -377 0x4E20 //TX_NOISE_TH_5_4 -378 0x1194 //TX_NOISE_TH_6 -379 0x0014 //TX_MINENOISE_TH -380 0x4000 //TX_MINENOISE_MIC0_TH_MTS -381 0xFFEE //TX_MINENOISE_MIC0_TH_EXP -382 0x6000 //TX_MINENOISE_MIC0_S_TH_MTS -383 0xFFF3 //TX_MINENOISE_MIC0_S_TH_EXP -384 0x00A5 //TX_OUT_ENER_S_TH_CLEAN -385 0x00A5 //TX_OUT_ENER_S_TH_LESSCLEAN -386 0x00A5 //TX_OUT_ENER_S_TH_NOISY -387 0x0029 //TX_OUT_ENER_TH_NOISE -388 0x0200 //TX_OUT_ENER_TH_SPEECH -389 0x2000 //TX_SN_NPB_GAIN -390 0x0000 //TX_NN_NPB_GAIN -391 0x0000 //TX_CSX_ALPHA_0 -392 0x0000 //TX_CSX_ALPHA_1 -393 0x0000 //TX_CSX_ALPHA_2 -394 0x0000 //TX_CSX_ALPHA_3 -395 0x0800 //TX_MU_ARSP_EST -396 0x00C8 //TX_P_OUTBEAM_MIN_TH -397 0x0002 //TX_EXTRA_NS_L -398 0x0800 //TX_EXTRA_NS_A -399 0x0005 //TX_VR_NOISE_FLOOR_TH -400 0x0148 //TX_MIN_G_LOW300HZ -401 0x0004 //TX_MAXLEVEL_CNG -402 0x00B4 //TX_STN_NOISE_TH -403 0x4000 //TX_POST_MASK_SUP -404 0x7FFF //TX_POST_MASK_ADJUST -405 0x00C8 //TX_NS_ENOISE_MIC0_TH -406 0x0014 //TX_MINENOISE_MIC0_TH -407 0x012C //TX_MINENOISE_MIC0_S_TH -408 0x2900 //TX_MIN_G_CTRL_SSNS -409 0x0800 //TX_METAL_RTO_THR -410 0x0FA0 //TX_NS_FP_K_METAL -411 0x3A98 //TX_NOISEDET_BOOST_TH -412 0x0FA0 //TX_NSMOOTH_TH -413 0x0000 //TX_NS_RESRV_8 -414 0x1800 //TX_RHO_UPB -415 0x2328 //TX_N_HOLD_HS -416 0x006E //TX_N_RHO_BFR0 -417 0x7FFF //TX_LAMBDA_ARSP_EST -418 0x0100 //TX_EXTRA_GAIN_MICBLOCK -419 0x0333 //TX_THR_STD_NSR -420 0x019A //TX_THR_STD_PLH -421 0x03E8 //TX_N_HOLD_STD -422 0x0066 //TX_THR_STD_RHO -423 0x2800 //TX_BF_RESET_THR_HS -424 0x0CCD //TX_SB_RTO_MEAN_TH -425 0x0300 //TX_SB_RHO_MEAN_TH_NTALK -426 0x2000 //TX_SB_RTO_MEAN_TH_ABN -427 0x2EE0 //TX_SB_RTO_MEAN_TH_RUB -428 0x0990 //TX_WTA_EN_RTO_TH -429 0x1400 //TX_TOP_ENER_TH_F -430 0x0100 //TX_DESIRED_TALK_HOLDT -431 0x0800 //TX_MIC_BLOCK_FACTOR -432 0x0000 //TX_NSEST_BFRLRNRDC -433 0x0000 //TX_THR_POST_FLT_HS -434 0x0010 //TX_HS_VAD_BIN -435 0x2666 //TX_THR_VAD_HS -436 0x2CCD //TX_MEAN_RTO_MIN_TH2 -437 0x0032 //TX_SILENCE_T -438 0x0000 //TX_A_POST_FLT_WTA -439 0x799A //TX_LAMBDA_PFLT_WTA -440 0x051E //TX_SB_RHO_MEAN2_TH -441 0x02F0 //TX_SB_RHO_MEAN3_TH -442 0x0000 //TX_HS_RESRV_4 -443 0x0000 //TX_HS_RESRV_5 -444 0x0001 //TX_DOA_VAD_THR_1 -445 0x003C //TX_DOA_VAD_THR_2 -446 0x0028 //TX_DOA_VAD_THR1_0 -447 0x0028 //TX_DOA_VAD_THR1_1 -448 0x0000 //TX_SRC_DOA_RNG_LOW_0A -449 0x001E //TX_SRC_DOA_RNG_HIGH_0A -450 0x005A //TX_DFLT_SRC_DOA_0A -451 0x0000 //TX_SRC_DOA_RNG_LOW_0B -452 0x0000 //TX_SRC_DOA_RNG_HIGH_0B -453 0x0000 //TX_DFLT_SRC_DOA_0B -454 0x0000 //TX_SRC_DOA_RNG_LOW_0C -455 0x0000 //TX_SRC_DOA_RNG_HIGH_0C -456 0x0000 //TX_DFLT_SRC_DOA_0C -457 0x0000 //TX_SRC_DOA_RNG_LOW_0D -458 0x0000 //TX_SRC_DOA_RNG_HIGH_0D -459 0x0000 //TX_DFLT_SRC_DOA_0D -460 0x0000 //TX_SRC_DOA_RNG_LOW_1A -461 0x00B4 //TX_SRC_DOA_RNG_HIGH_1A -462 0x005A //TX_DFLT_SRC_DOA_1A -463 0x0000 //TX_SRC_DOA_RNG_LOW_1B -464 0x00B4 //TX_SRC_DOA_RNG_HIGH_1B -465 0x005A //TX_DFLT_SRC_DOA_1B -466 0x0000 //TX_SRC_DOA_RNG_LOW_1C -467 0x00B4 //TX_SRC_DOA_RNG_HIGH_1C -468 0x005A //TX_DFLT_SRC_DOA_1C -469 0x0000 //TX_SRC_DOA_RNG_LOW_1D -470 0x00B4 //TX_SRC_DOA_RNG_HIGH_1D -471 0x005A //TX_DFLT_SRC_DOA_1D -472 0x0100 //TX_BF_HOLDOFF_T -473 0x7FFF //TX_DOA_COST_FACTOR -474 0x0D9A //TX_MAINTOREFR_TH0 -475 0x071C //TX_DOA_TRK_THR -476 0x012C //TX_DOA_TRACK_HT -477 0x0200 //TX_N1_HOLD_HF -478 0x0100 //TX_N2_HOLD_HF -479 0x2A3D //TX_BF_RESET_THR_HF -480 0x7333 //TX_DOA_SMOOTH -481 0x0800 //TX_MU_BF -482 0x0800 //TX_BF_MU_LF_B2 -483 0x0040 //TX_BF_FC_END_BIN_B2 -484 0x0020 //TX_BF_FC_END_BIN -485 0x0000 //TX_HF_RESRV_25 -486 0x0000 //TX_HF_RESRV_26 -487 0x0007 //TX_N_DOA_SEED -488 0x0001 //TX_FINE_DOA_SEARCH_FLG -489 0x0000 //TX_HF_RESRV_27 -490 0x038E //TX_DLT_SRC_DOA_RNG -491 0x0200 //TX_BF_MU_LF -492 0x0000 //TX_DFLT_SRC_LOC_0 -493 0x7FFF //TX_DFLT_SRC_LOC_1 -494 0x0000 //TX_DFLT_SRC_LOC_2 -495 0x038E //TX_DOA_TRACK_VADTH -496 0x0000 //TX_DOA_TRACK_NEW -497 0x0300 //TX_NOR_OFF_THR -498 0x7C00 //TX_MORE_ON_700HZ_THR -499 0x2000 //TX_MU_BF_ADPT_NS -500 0x0000 //TX_ADAPT_LEN -501 0x6666 //TX_MORE_SNS -502 0x0000 //TX_NOR_OFF_TH1 -503 0x0000 //TX_WIDE_MASK_TH -504 0xD333 //TX_SUBSNRATIOHIGH4MEANBCK_THR -505 0x6000 //TX_C_POST_FLT_CUT -506 0x2000 //TX_RADIODTLV -507 0x0320 //TX_POWER_LINEIN_TH -508 0x0014 //TX_FE_VADCOUNT_TH_FC -509 0x0000 //TX_ECHO_SUPP_FC -510 0x0C80 //TX_ECHO_TH -511 0x6666 //TX_MIC_TO_BFGAIN -512 0x0000 //TX_MICTOBFGAIN0 -513 0x0000 //TX_FASTMUE_TH -514 0x0000 //TX_DERVB_LEN_0 -515 0x0000 //TX_DERVB_LEN_1 -516 0x0000 //TX_RHO_DERVB -517 0x0000 //TX_MIC_INDX_DERVB -518 0x0000 //TX_MU_DERVB -519 0x0000 //TX_DR_RESRV_0 -520 0x0000 //TX_DR_RESRV_1 -521 0x0000 //TX_DR_RESRV_2 -522 0x0000 //TX_DR_RESRV_3 -523 0x0000 //TX_DR_RESRV_4 -524 0x0000 //TX_DR_RESRV_5 -525 0x0000 //TX_DR_RESRV_6 -526 0x0000 //TX_DR_RESRV_7 -527 0x0000 //TX_DR_RESRV_8 -528 0x1333 //TX_WIND_MARK_TH -529 0x399A //TX_CORR_THR -530 0x0004 //TX_SNR_THR -531 0x0010 //TX_ENGY_THR -532 0x1770 //TX_CORR_HIGH_TH -533 0x6000 //TX_ENGY_THR_2 -534 0x3400 //TX_MEAN_RTO_THR -535 0x0028 //TX_WNS_ENOISE_MIC0_TH -536 0x3000 //TX_RATIOMICL_TH -537 0x7FFF //TX_CALIG_HS -538 0x0000 //TX_LVL_CTRL -539 0x0010 //TX_WIND_SUPRTO -540 0x0014 //TX_WNS_MIN_G -541 0x0600 //TX_WNS_B_POST_FLT -542 0x3000 //TX_RATIOMICH_TH -543 0xD120 //TX_WIND_INBEAM_L_TH -544 0x0FA0 //TX_WIND_INBEAM_H_TH -545 0x2000 //TX_WNS_RESRV_0 -546 0x59D8 //TX_WNS_RESRV_1 -547 0x0200 //TX_WNS_RESRV_2 -548 0x0000 //TX_WNS_RESRV_3 -549 0x0000 //TX_WNS_RESRV_4 -550 0x0000 //TX_WNS_RESRV_5 -551 0x0000 //TX_WNS_RESRV_6 -552 0x0000 //TX_PB_B_POST_FLT_LESSCUT -553 0x0070 //TX_BF_LESSCUT_BBIN -554 0x0070 //TX_BF_LESSCUT_EBIN -555 0x0010 //TX_POSTBFB0 -556 0x0070 //TX_POSTBFB -557 0x00B0 //TX_POSTBFE -558 0x0E66 //TX_SPEECH_SNR_TH -559 0x0050 //TX_PB_MAX_PRI_SNR_TH -560 0x770A //TX_MAX_PRI_SNR_TH_L -561 0x0000 //TX_PFGAIN -562 0x0000 //TX_MAINTOREFR_TH -563 0x0000 //TX_SAM_MARK -564 0x0000 //TX_PB_RESRV_0 -565 0x0000 //TX_PB_RESRV_1 -566 0x0030 //TX_FDEQ_SUBNUM -567 0x5C54 //TX_FDEQ_GAIN_0 -568 0x5048 //TX_FDEQ_GAIN_1 -569 0x4C4C //TX_FDEQ_GAIN_2 -570 0x474A //TX_FDEQ_GAIN_3 -571 0x423C //TX_FDEQ_GAIN_4 -572 0x4042 //TX_FDEQ_GAIN_5 -573 0x474F //TX_FDEQ_GAIN_6 -574 0x5444 //TX_FDEQ_GAIN_7 -575 0x4243 //TX_FDEQ_GAIN_8 -576 0x4344 //TX_FDEQ_GAIN_9 -577 0x414D //TX_FDEQ_GAIN_10 -578 0x4A47 //TX_FDEQ_GAIN_11 -579 0x4346 //TX_FDEQ_GAIN_12 -580 0x4C4F //TX_FDEQ_GAIN_13 -581 0x565B //TX_FDEQ_GAIN_14 -582 0x6448 //TX_FDEQ_GAIN_15 -583 0x4848 //TX_FDEQ_GAIN_16 -584 0x4848 //TX_FDEQ_GAIN_17 -585 0x4848 //TX_FDEQ_GAIN_18 -586 0x4848 //TX_FDEQ_GAIN_19 -587 0x4848 //TX_FDEQ_GAIN_20 -588 0x4848 //TX_FDEQ_GAIN_21 -589 0x4848 //TX_FDEQ_GAIN_22 -590 0x4848 //TX_FDEQ_GAIN_23 -591 0x0202 //TX_FDEQ_BIN_0 -592 0x0104 //TX_FDEQ_BIN_1 -593 0x0502 //TX_FDEQ_BIN_2 -594 0x0202 //TX_FDEQ_BIN_3 -595 0x0504 //TX_FDEQ_BIN_4 -596 0x0708 //TX_FDEQ_BIN_5 -597 0x0808 //TX_FDEQ_BIN_6 -598 0x050E //TX_FDEQ_BIN_7 -599 0x0B0C //TX_FDEQ_BIN_8 -600 0x0F0F //TX_FDEQ_BIN_9 -601 0x0E0D //TX_FDEQ_BIN_10 -602 0x0F28 //TX_FDEQ_BIN_11 -603 0x111B //TX_FDEQ_BIN_12 -604 0x291E //TX_FDEQ_BIN_13 -605 0x1E10 //TX_FDEQ_BIN_14 -606 0x1810 //TX_FDEQ_BIN_15 -607 0x1021 //TX_FDEQ_BIN_16 -608 0x1000 //TX_FDEQ_BIN_17 -609 0x0000 //TX_FDEQ_BIN_18 -610 0x0000 //TX_FDEQ_BIN_19 -611 0x0000 //TX_FDEQ_BIN_20 -612 0x0000 //TX_FDEQ_BIN_21 -613 0x0000 //TX_FDEQ_BIN_22 -614 0x0000 //TX_FDEQ_BIN_23 -615 0x0000 //TX_FDEQ_PADDING -616 0x0030 //TX_PREEQ_SUBNUM_MIC0 -617 0x4848 //TX_PREEQ_GAIN_MIC0_0 -618 0x4848 //TX_PREEQ_GAIN_MIC0_1 -619 0x4848 //TX_PREEQ_GAIN_MIC0_2 -620 0x4848 //TX_PREEQ_GAIN_MIC0_3 -621 0x4848 //TX_PREEQ_GAIN_MIC0_4 -622 0x4848 //TX_PREEQ_GAIN_MIC0_5 -623 0x4848 //TX_PREEQ_GAIN_MIC0_6 -624 0x4848 //TX_PREEQ_GAIN_MIC0_7 -625 0x4646 //TX_PREEQ_GAIN_MIC0_8 -626 0x4545 //TX_PREEQ_GAIN_MIC0_9 -627 0x4545 //TX_PREEQ_GAIN_MIC0_10 -628 0x4544 //TX_PREEQ_GAIN_MIC0_11 -629 0x4444 //TX_PREEQ_GAIN_MIC0_12 -630 0x4343 //TX_PREEQ_GAIN_MIC0_13 -631 0x4241 //TX_PREEQ_GAIN_MIC0_14 -632 0x3C3E //TX_PREEQ_GAIN_MIC0_15 -633 0x4848 //TX_PREEQ_GAIN_MIC0_16 -634 0x4848 //TX_PREEQ_GAIN_MIC0_17 -635 0x4848 //TX_PREEQ_GAIN_MIC0_18 -636 0x4848 //TX_PREEQ_GAIN_MIC0_19 -637 0x4848 //TX_PREEQ_GAIN_MIC0_20 -638 0x4848 //TX_PREEQ_GAIN_MIC0_21 -639 0x4848 //TX_PREEQ_GAIN_MIC0_22 -640 0x4848 //TX_PREEQ_GAIN_MIC0_23 -641 0x0202 //TX_PREEQ_BIN_MIC0_0 -642 0x0203 //TX_PREEQ_BIN_MIC0_1 -643 0x0303 //TX_PREEQ_BIN_MIC0_2 -644 0x0304 //TX_PREEQ_BIN_MIC0_3 -645 0x0405 //TX_PREEQ_BIN_MIC0_4 -646 0x0506 //TX_PREEQ_BIN_MIC0_5 -647 0x0708 //TX_PREEQ_BIN_MIC0_6 -648 0x090A //TX_PREEQ_BIN_MIC0_7 -649 0x0B0C //TX_PREEQ_BIN_MIC0_8 -650 0x0D0E //TX_PREEQ_BIN_MIC0_9 -651 0x1013 //TX_PREEQ_BIN_MIC0_10 -652 0x1719 //TX_PREEQ_BIN_MIC0_11 -653 0x1B1E //TX_PREEQ_BIN_MIC0_12 -654 0x1E1E //TX_PREEQ_BIN_MIC0_13 -655 0x1E28 //TX_PREEQ_BIN_MIC0_14 -656 0x282C //TX_PREEQ_BIN_MIC0_15 -657 0x0000 //TX_PREEQ_BIN_MIC0_16 -658 0x0000 //TX_PREEQ_BIN_MIC0_17 -659 0x0000 //TX_PREEQ_BIN_MIC0_18 -660 0x0000 //TX_PREEQ_BIN_MIC0_19 -661 0x0000 //TX_PREEQ_BIN_MIC0_20 -662 0x0000 //TX_PREEQ_BIN_MIC0_21 -663 0x0000 //TX_PREEQ_BIN_MIC0_22 -664 0x0000 //TX_PREEQ_BIN_MIC0_23 -665 0x0020 //TX_PREEQ_SUBNUM_MIC1 -666 0x4848 //TX_PREEQ_GAIN_MIC1_0 -667 0x4848 //TX_PREEQ_GAIN_MIC1_1 -668 0x4848 //TX_PREEQ_GAIN_MIC1_2 -669 0x4848 //TX_PREEQ_GAIN_MIC1_3 -670 0x4848 //TX_PREEQ_GAIN_MIC1_4 -671 0x4848 //TX_PREEQ_GAIN_MIC1_5 -672 0x4848 //TX_PREEQ_GAIN_MIC1_6 -673 0x4848 //TX_PREEQ_GAIN_MIC1_7 -674 0x484A //TX_PREEQ_GAIN_MIC1_8 -675 0x4B4C //TX_PREEQ_GAIN_MIC1_9 -676 0x4B4A //TX_PREEQ_GAIN_MIC1_10 -677 0x4A48 //TX_PREEQ_GAIN_MIC1_11 -678 0x4C4C //TX_PREEQ_GAIN_MIC1_12 -679 0x4C4C //TX_PREEQ_GAIN_MIC1_13 -680 0x4848 //TX_PREEQ_GAIN_MIC1_14 -681 0x4848 //TX_PREEQ_GAIN_MIC1_15 -682 0x4848 //TX_PREEQ_GAIN_MIC1_16 -683 0x4848 //TX_PREEQ_GAIN_MIC1_17 -684 0x4848 //TX_PREEQ_GAIN_MIC1_18 -685 0x4848 //TX_PREEQ_GAIN_MIC1_19 -686 0x4848 //TX_PREEQ_GAIN_MIC1_20 -687 0x4848 //TX_PREEQ_GAIN_MIC1_21 -688 0x4848 //TX_PREEQ_GAIN_MIC1_22 -689 0x4848 //TX_PREEQ_GAIN_MIC1_23 -690 0x0202 //TX_PREEQ_BIN_MIC1_0 -691 0x0203 //TX_PREEQ_BIN_MIC1_1 -692 0x0303 //TX_PREEQ_BIN_MIC1_2 -693 0x0304 //TX_PREEQ_BIN_MIC1_3 -694 0x0405 //TX_PREEQ_BIN_MIC1_4 -695 0x0506 //TX_PREEQ_BIN_MIC1_5 -696 0x0708 //TX_PREEQ_BIN_MIC1_6 -697 0x090A //TX_PREEQ_BIN_MIC1_7 -698 0x0B0C //TX_PREEQ_BIN_MIC1_8 -699 0x0D0E //TX_PREEQ_BIN_MIC1_9 -700 0x0F10 //TX_PREEQ_BIN_MIC1_10 -701 0x1011 //TX_PREEQ_BIN_MIC1_11 -702 0x1112 //TX_PREEQ_BIN_MIC1_12 -703 0x120B //TX_PREEQ_BIN_MIC1_13 -704 0x0000 //TX_PREEQ_BIN_MIC1_14 -705 0x0000 //TX_PREEQ_BIN_MIC1_15 +700 0x1013 //TX_PREEQ_BIN_MIC1_10 +701 0x1719 //TX_PREEQ_BIN_MIC1_11 +702 0x1B1E //TX_PREEQ_BIN_MIC1_12 +703 0x1E1E //TX_PREEQ_BIN_MIC1_13 +704 0x1E28 //TX_PREEQ_BIN_MIC1_14 +705 0x3042 //TX_PREEQ_BIN_MIC1_15 706 0x0000 //TX_PREEQ_BIN_MIC1_16 707 0x0000 //TX_PREEQ_BIN_MIC1_17 708 0x0000 //TX_PREEQ_BIN_MIC1_18 @@ -16650,7 +14224,7 @@ 863 0x199A //TX_TDDRC_HMNC_GAIN 864 0x0000 //TX_TDDRC_SMT_FLAG 865 0x0CCD //TX_TDDRC_SMT_W -866 0x0550 //TX_TDDRC_DRC_GAIN +866 0x0650 //TX_TDDRC_DRC_GAIN 867 0x7FFF //TX_TDDRC_LMT_THRD 868 0x0000 //TX_TDDRC_LMT_ALPHA 869 0x0000 //TX_TFMASKLTH @@ -16681,8 +14255,73 @@ 894 0xC000 //TX_FASTNS_SSA_THHFL 895 0xCCCC //TX_FASTNS_SSA_THLFH 896 0xD999 //TX_FASTNS_SSA_THHFH +897 0x2339 //TX_SENDFUNC_REG_MICMUTE +898 0x0021 //TX_SENDFUNC_REG_MICMUTE1 +899 0x02BC //TX_MICMUTE_RATIO_THR +900 0x0140 //TX_MICMUTE_AMP_THR +901 0x0004 //TX_MICMUTE_HPF_IND +902 0x00C0 //TX_MICMUTE_LOG_EYR_TH +903 0x0008 //TX_MICMUTE_CVG_TIME +904 0x0008 //TX_MICMUTE_RELEASE_TIME +905 0x01FE //TX_MIC_VOLUME_MIC0MUTE +906 0x0020 //TX_MICMUTE_EPD_OFFSET_0 +907 0x001E //TX_MICMUTE_FRQ_AEC_L +908 0x7999 //TX_MICMUTE_EAD_THR +909 0x7FFF //TX_MICMUTE_LAMBDA_CB_NLE +910 0x7FFF //TX_MICMUTE_LAMBDA_RE_EST +911 0x4000 //TX_DTD_THR1_MICMUTE_0 +912 0x7000 //TX_DTD_THR1_MICMUTE_1 +913 0x7FFF //TX_DTD_THR1_MICMUTE_2 +914 0x7FFF //TX_DTD_THR1_MICMUTE_3 +915 0x6CCC //TX_DTD_THR2_MICMUTE_0 +916 0x0400 //TX_MICMUTE_MIN_EQ_RE_EST_0 +917 0x0400 //TX_MICMUTE_MIN_EQ_RE_EST_1 +918 0x1000 //TX_MICMUTE_MIN_EQ_RE_EST_2 +919 0x7FFF //TX_MICMUTE_MIN_EQ_RE_EST_3 +920 0x7FFF //TX_MICMUTE_MIN_EQ_RE_EST_4 +921 0x4000 //TX_MICMUTE_C_POST_FLT +922 0x03E8 //TX_MICMUTE_DT_CUT_K +923 0x0001 //TX_MICMUTE_DT_CUT_THR +924 0x03E8 //TX_MICMUTE_DT_CUT_K2 +925 0x0001 //TX_MICMUTE_DT_CUT_THR2 +926 0x0064 //TX_MICMUTE_DT2_HOLD_N +927 0x1000 //TX_MICMUTE_RATIODTH_THCUT +928 0x1000 //TX_MICMUTE_B_POST_FLT_ECHOL +929 0x7FFF //TX_MICMUTE_B_POST_FLT_ECHOH +930 0x0400 //TX_MICMUTE_C_POST_FLT_MASK +931 0x7999 //TX_MICMUTE_RATIODTL_CUT_TH +932 0x0258 //TX_MICMUTE_DT_CUT_K1 +933 0x0800 //TX_MICMUTE_N2_SN_EST +934 0xFC00 //TX_MICMUTE_THR_SN_EST_0 +935 0x001C //TX_MICMUTE_MIN_G_CTRL_0 +936 0x6000 //TX_MICMUTE_A_POST_FILT_S_0 +937 0x7000 //TX_MICMUTE_B_POST_FILT_0 +938 0x2710 //TX_MIC1RUB_AMP_THR +939 0x0010 //TX_MIC1MUTE_RATIO_THR +940 0x0450 //TX_MIC1MUTE_AMP_THR +941 0x0008 //TX_MIC1MUTE_CVG_TIME +942 0x0008 //TX_MIC1MUTE_RELEASE_TIME +943 0x0000 //TX_AMS_RESRV_01 +944 0x0000 //TX_AMS_RESRV_02 +945 0x0000 //TX_AMS_RESRV_03 +946 0x0000 //TX_AMS_RESRV_04 +947 0x0000 //TX_AMS_RESRV_05 +948 0x0000 //TX_AMS_RESRV_06 +949 0x0000 //TX_AMS_RESRV_07 +950 0x0000 //TX_AMS_RESRV_08 +951 0x0000 //TX_AMS_RESRV_09 +952 0x0000 //TX_AMS_RESRV_10 +953 0x0000 //TX_AMS_RESRV_11 +954 0x0000 //TX_AMS_RESRV_12 +955 0x0000 //TX_AMS_RESRV_13 +956 0x0000 //TX_AMS_RESRV_14 +957 0x0000 //TX_AMS_RESRV_15 +958 0x0000 //TX_AMS_RESRV_16 +959 0x0000 //TX_AMS_RESRV_17 +960 0x0000 //TX_AMS_RESRV_18 +961 0x0000 //TX_AMS_RESRV_19 #RX -0 0x000C //RX_RECVFUNC_MODE_0 +0 0x203C //RX_RECVFUNC_MODE_0 1 0x0000 //RX_RECVFUNC_MODE_1 2 0x0003 //RX_SAMPLINGFREQ_SIG 3 0x0003 //RX_SAMPLINGFREQ_PROC @@ -16692,7 +14331,7 @@ 7 0x1000 //RX_TDDRC_ALPHA_UP_2 8 0x1000 //RX_TDDRC_ALPHA_UP_3 9 0x1000 //RX_TDDRC_ALPHA_UP_4 -10 0x0800 //RX_PGA +10 0x05AA //RX_PGA 11 0x7FFF //RX_A_HP 12 0x4000 //RX_B_PE 13 0x5800 //RX_THR_PITCH_DET_0 @@ -16720,23 +14359,23 @@ 35 0x199A //RX_A_POST_FLT 36 0x0000 //RX_LMT_THRD 37 0x4000 //RX_LMT_ALPHA -38 0x0030 //RX_FDEQ_SUBNUM -39 0x4848 //RX_FDEQ_GAIN_0 -40 0x4848 //RX_FDEQ_GAIN_1 -41 0x4844 //RX_FDEQ_GAIN_2 -42 0x4B4D //RX_FDEQ_GAIN_3 -43 0x4E50 //RX_FDEQ_GAIN_4 -44 0x5254 //RX_FDEQ_GAIN_5 -45 0x5658 //RX_FDEQ_GAIN_6 -46 0x5C60 //RX_FDEQ_GAIN_7 -47 0x6468 //RX_FDEQ_GAIN_8 -48 0x6C70 //RX_FDEQ_GAIN_9 -49 0x7474 //RX_FDEQ_GAIN_10 -50 0x7474 //RX_FDEQ_GAIN_11 -51 0x7474 //RX_FDEQ_GAIN_12 -52 0x7474 //RX_FDEQ_GAIN_13 -53 0x7474 //RX_FDEQ_GAIN_14 -54 0x7474 //RX_FDEQ_GAIN_15 +38 0x0020 //RX_FDEQ_SUBNUM +39 0x483E //RX_FDEQ_GAIN_0 +40 0x3E3E //RX_FDEQ_GAIN_1 +41 0x3E4C //RX_FDEQ_GAIN_2 +42 0x5064 //RX_FDEQ_GAIN_3 +43 0x7076 //RX_FDEQ_GAIN_4 +44 0x897A //RX_FDEQ_GAIN_5 +45 0x7C80 //RX_FDEQ_GAIN_6 +46 0x8888 //RX_FDEQ_GAIN_7 +47 0x949C //RX_FDEQ_GAIN_8 +48 0x96A4 //RX_FDEQ_GAIN_9 +49 0xA9A0 //RX_FDEQ_GAIN_10 +50 0x9487 //RX_FDEQ_GAIN_11 +51 0x6F64 //RX_FDEQ_GAIN_12 +52 0x625A //RX_FDEQ_GAIN_13 +53 0x5D80 //RX_FDEQ_GAIN_14 +54 0x8890 //RX_FDEQ_GAIN_15 55 0x4848 //RX_FDEQ_GAIN_16 56 0x4848 //RX_FDEQ_GAIN_17 57 0x4848 //RX_FDEQ_GAIN_18 @@ -16746,21 +14385,21 @@ 61 0x4848 //RX_FDEQ_GAIN_22 62 0x4848 //RX_FDEQ_GAIN_23 63 0x0202 //RX_FDEQ_BIN_0 -64 0x0203 //RX_FDEQ_BIN_1 -65 0x0402 //RX_FDEQ_BIN_2 -66 0x0304 //RX_FDEQ_BIN_3 -67 0x0405 //RX_FDEQ_BIN_4 -68 0x0506 //RX_FDEQ_BIN_5 +64 0x0202 //RX_FDEQ_BIN_1 +65 0x0301 //RX_FDEQ_BIN_2 +66 0x0404 //RX_FDEQ_BIN_3 +67 0x0406 //RX_FDEQ_BIN_4 +68 0x0109 //RX_FDEQ_BIN_5 69 0x0708 //RX_FDEQ_BIN_6 70 0x090A //RX_FDEQ_BIN_7 71 0x0B0C //RX_FDEQ_BIN_8 72 0x0D0E //RX_FDEQ_BIN_9 -73 0x1214 //RX_FDEQ_BIN_10 -74 0x1E1E //RX_FDEQ_BIN_11 -75 0x1E1E //RX_FDEQ_BIN_12 -76 0x1E1E //RX_FDEQ_BIN_13 -77 0x1E1E //RX_FDEQ_BIN_14 -78 0x202C //RX_FDEQ_BIN_15 +73 0x1013 //RX_FDEQ_BIN_10 +74 0x1719 //RX_FDEQ_BIN_11 +75 0x1B0F //RX_FDEQ_BIN_12 +76 0x141E //RX_FDEQ_BIN_13 +77 0x3728 //RX_FDEQ_BIN_14 +78 0x282C //RX_FDEQ_BIN_15 79 0x0000 //RX_FDEQ_BIN_16 80 0x0000 //RX_FDEQ_BIN_17 81 0x0000 //RX_FDEQ_BIN_18 @@ -16794,23 +14433,23 @@ 109 0x5333 //RX_FDDRC_SLANT_1_3 110 0x0000 //RX_FDDRC_RESRV_0 111 0x0002 //RX_FILTINDX -112 0x0000 //RX_TDDRC_THRD_0 -113 0x0000 //RX_TDDRC_THRD_1 +112 0x0001 //RX_TDDRC_THRD_0 +113 0x0002 //RX_TDDRC_THRD_1 114 0x1800 //RX_TDDRC_THRD_2 115 0x1800 //RX_TDDRC_THRD_3 -116 0x3000 //RX_TDDRC_SLANT_0 -117 0x6E00 //RX_TDDRC_SLANT_1 +116 0x7FFF //RX_TDDRC_SLANT_0 +117 0x7FFF //RX_TDDRC_SLANT_1 118 0x1000 //RX_TDDRC_ALPHA_UP_0 119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 120 0x0000 //RX_TDDRC_HMNC_FLAG 121 0x199A //RX_TDDRC_HMNC_GAIN 122 0x0001 //RX_TDDRC_SMT_FLAG 123 0x0CCD //RX_TDDRC_SMT_W -124 0x01E0 //RX_TDDRC_DRC_GAIN +124 0x0551 //RX_TDDRC_DRC_GAIN 125 0x7C00 //RX_LAMBDA_PKA_FP -126 0x2000 //RX_TPKA_FP -127 0x2000 //RX_MIN_G_FP -128 0x0080 //RX_MAX_G_FP +126 0x13E0 //RX_TPKA_FP +127 0x0080 //RX_MIN_G_FP +128 0x2000 //RX_MAX_G_FP 129 0x0100 //RX_SPK_VOL 130 0x0000 //RX_VOL_RESRV_0 131 0x0000 //RX_MAXLEVEL_CNG @@ -16850,36 +14489,36 @@ 32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 33 0x7000 //RX_TDDRC_LIMITER_THRD 34 0x0800 //RX_TDDRC_LIMITER_GAIN -112 0x0000 //RX_TDDRC_THRD_0 -113 0x0000 //RX_TDDRC_THRD_1 +112 0x0001 //RX_TDDRC_THRD_0 +113 0x0002 //RX_TDDRC_THRD_1 114 0x1800 //RX_TDDRC_THRD_2 115 0x1800 //RX_TDDRC_THRD_3 -116 0x3000 //RX_TDDRC_SLANT_0 -117 0x6E00 //RX_TDDRC_SLANT_1 +116 0x7FFF //RX_TDDRC_SLANT_0 +117 0x7FFF //RX_TDDRC_SLANT_1 118 0x1000 //RX_TDDRC_ALPHA_UP_0 119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 120 0x0000 //RX_TDDRC_HMNC_FLAG 121 0x199A //RX_TDDRC_HMNC_GAIN 122 0x0001 //RX_TDDRC_SMT_FLAG 123 0x0CCD //RX_TDDRC_SMT_W -124 0x01E0 //RX_TDDRC_DRC_GAIN -38 0x0030 //RX_FDEQ_SUBNUM -39 0x4848 //RX_FDEQ_GAIN_0 -40 0x4848 //RX_FDEQ_GAIN_1 -41 0x4844 //RX_FDEQ_GAIN_2 -42 0x4B4D //RX_FDEQ_GAIN_3 -43 0x4E50 //RX_FDEQ_GAIN_4 -44 0x5254 //RX_FDEQ_GAIN_5 -45 0x5658 //RX_FDEQ_GAIN_6 -46 0x5C60 //RX_FDEQ_GAIN_7 -47 0x6468 //RX_FDEQ_GAIN_8 -48 0x6C70 //RX_FDEQ_GAIN_9 -49 0x7474 //RX_FDEQ_GAIN_10 -50 0x7474 //RX_FDEQ_GAIN_11 -51 0x7474 //RX_FDEQ_GAIN_12 -52 0x7474 //RX_FDEQ_GAIN_13 -53 0x7474 //RX_FDEQ_GAIN_14 -54 0x7474 //RX_FDEQ_GAIN_15 +124 0x056F //RX_TDDRC_DRC_GAIN +38 0x0020 //RX_FDEQ_SUBNUM +39 0x483E //RX_FDEQ_GAIN_0 +40 0x3E3E //RX_FDEQ_GAIN_1 +41 0x3E4C //RX_FDEQ_GAIN_2 +42 0x586E //RX_FDEQ_GAIN_3 +43 0x8496 //RX_FDEQ_GAIN_4 +44 0x968E //RX_FDEQ_GAIN_5 +45 0x8488 //RX_FDEQ_GAIN_6 +46 0x8884 //RX_FDEQ_GAIN_7 +47 0x9CA4 //RX_FDEQ_GAIN_8 +48 0x98A8 //RX_FDEQ_GAIN_9 +49 0xBEB8 //RX_FDEQ_GAIN_10 +50 0x918D //RX_FDEQ_GAIN_11 +51 0x7566 //RX_FDEQ_GAIN_12 +52 0x6460 //RX_FDEQ_GAIN_13 +53 0x6174 //RX_FDEQ_GAIN_14 +54 0x7890 //RX_FDEQ_GAIN_15 55 0x4848 //RX_FDEQ_GAIN_16 56 0x4848 //RX_FDEQ_GAIN_17 57 0x4848 //RX_FDEQ_GAIN_18 @@ -16889,21 +14528,21 @@ 61 0x4848 //RX_FDEQ_GAIN_22 62 0x4848 //RX_FDEQ_GAIN_23 63 0x0202 //RX_FDEQ_BIN_0 -64 0x0203 //RX_FDEQ_BIN_1 -65 0x0402 //RX_FDEQ_BIN_2 -66 0x0304 //RX_FDEQ_BIN_3 -67 0x0405 //RX_FDEQ_BIN_4 -68 0x0506 //RX_FDEQ_BIN_5 +64 0x0202 //RX_FDEQ_BIN_1 +65 0x0301 //RX_FDEQ_BIN_2 +66 0x0404 //RX_FDEQ_BIN_3 +67 0x0406 //RX_FDEQ_BIN_4 +68 0x0109 //RX_FDEQ_BIN_5 69 0x0708 //RX_FDEQ_BIN_6 70 0x090A //RX_FDEQ_BIN_7 71 0x0B0C //RX_FDEQ_BIN_8 -72 0x0D0E //RX_FDEQ_BIN_9 -73 0x1214 //RX_FDEQ_BIN_10 -74 0x1E1E //RX_FDEQ_BIN_11 -75 0x1E1E //RX_FDEQ_BIN_12 -76 0x1E1E //RX_FDEQ_BIN_13 -77 0x1E1E //RX_FDEQ_BIN_14 -78 0x202C //RX_FDEQ_BIN_15 +72 0x0D09 //RX_FDEQ_BIN_9 +73 0x0819 //RX_FDEQ_BIN_10 +74 0x1E19 //RX_FDEQ_BIN_11 +75 0x1B0F //RX_FDEQ_BIN_12 +76 0x141E //RX_FDEQ_BIN_13 +77 0x3728 //RX_FDEQ_BIN_14 +78 0x282C //RX_FDEQ_BIN_15 79 0x0000 //RX_FDEQ_BIN_16 80 0x0000 //RX_FDEQ_BIN_17 81 0x0000 //RX_FDEQ_BIN_18 @@ -16936,7 +14575,7 @@ 108 0x5333 //RX_FDDRC_SLANT_1_2 109 0x5333 //RX_FDDRC_SLANT_1_3 110 0x0000 //RX_FDDRC_RESRV_0 -129 0x0100 //RX_SPK_VOL +129 0x000A //RX_SPK_VOL 130 0x0000 //RX_VOL_RESRV_0 #VOL 1 6 0x1000 //RX_TDDRC_ALPHA_UP_1 @@ -16949,36 +14588,36 @@ 32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 33 0x7000 //RX_TDDRC_LIMITER_THRD 34 0x0800 //RX_TDDRC_LIMITER_GAIN -112 0x0000 //RX_TDDRC_THRD_0 -113 0x0000 //RX_TDDRC_THRD_1 +112 0x0001 //RX_TDDRC_THRD_0 +113 0x0002 //RX_TDDRC_THRD_1 114 0x1800 //RX_TDDRC_THRD_2 115 0x1800 //RX_TDDRC_THRD_3 -116 0x3000 //RX_TDDRC_SLANT_0 -117 0x6E00 //RX_TDDRC_SLANT_1 +116 0x7FFF //RX_TDDRC_SLANT_0 +117 0x7FFF //RX_TDDRC_SLANT_1 118 0x1000 //RX_TDDRC_ALPHA_UP_0 119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 120 0x0000 //RX_TDDRC_HMNC_FLAG 121 0x199A //RX_TDDRC_HMNC_GAIN 122 0x0001 //RX_TDDRC_SMT_FLAG 123 0x0CCD //RX_TDDRC_SMT_W -124 0x01E0 //RX_TDDRC_DRC_GAIN -38 0x0030 //RX_FDEQ_SUBNUM -39 0x4848 //RX_FDEQ_GAIN_0 -40 0x4848 //RX_FDEQ_GAIN_1 -41 0x4844 //RX_FDEQ_GAIN_2 -42 0x4B4D //RX_FDEQ_GAIN_3 -43 0x4E50 //RX_FDEQ_GAIN_4 -44 0x5254 //RX_FDEQ_GAIN_5 -45 0x5658 //RX_FDEQ_GAIN_6 -46 0x5C60 //RX_FDEQ_GAIN_7 -47 0x6468 //RX_FDEQ_GAIN_8 -48 0x6C70 //RX_FDEQ_GAIN_9 -49 0x7474 //RX_FDEQ_GAIN_10 -50 0x7474 //RX_FDEQ_GAIN_11 -51 0x7474 //RX_FDEQ_GAIN_12 -52 0x7474 //RX_FDEQ_GAIN_13 -53 0x7474 //RX_FDEQ_GAIN_14 -54 0x7474 //RX_FDEQ_GAIN_15 +124 0x056F //RX_TDDRC_DRC_GAIN +38 0x0020 //RX_FDEQ_SUBNUM +39 0x483E //RX_FDEQ_GAIN_0 +40 0x3E3E //RX_FDEQ_GAIN_1 +41 0x3E4C //RX_FDEQ_GAIN_2 +42 0x586E //RX_FDEQ_GAIN_3 +43 0x8496 //RX_FDEQ_GAIN_4 +44 0x968E //RX_FDEQ_GAIN_5 +45 0x8488 //RX_FDEQ_GAIN_6 +46 0x8884 //RX_FDEQ_GAIN_7 +47 0x9CA4 //RX_FDEQ_GAIN_8 +48 0x98A8 //RX_FDEQ_GAIN_9 +49 0xBEB8 //RX_FDEQ_GAIN_10 +50 0x918D //RX_FDEQ_GAIN_11 +51 0x7566 //RX_FDEQ_GAIN_12 +52 0x6460 //RX_FDEQ_GAIN_13 +53 0x6174 //RX_FDEQ_GAIN_14 +54 0x7890 //RX_FDEQ_GAIN_15 55 0x4848 //RX_FDEQ_GAIN_16 56 0x4848 //RX_FDEQ_GAIN_17 57 0x4848 //RX_FDEQ_GAIN_18 @@ -16988,21 +14627,21 @@ 61 0x4848 //RX_FDEQ_GAIN_22 62 0x4848 //RX_FDEQ_GAIN_23 63 0x0202 //RX_FDEQ_BIN_0 -64 0x0203 //RX_FDEQ_BIN_1 -65 0x0402 //RX_FDEQ_BIN_2 -66 0x0304 //RX_FDEQ_BIN_3 -67 0x0405 //RX_FDEQ_BIN_4 -68 0x0506 //RX_FDEQ_BIN_5 +64 0x0202 //RX_FDEQ_BIN_1 +65 0x0301 //RX_FDEQ_BIN_2 +66 0x0404 //RX_FDEQ_BIN_3 +67 0x0406 //RX_FDEQ_BIN_4 +68 0x0109 //RX_FDEQ_BIN_5 69 0x0708 //RX_FDEQ_BIN_6 70 0x090A //RX_FDEQ_BIN_7 71 0x0B0C //RX_FDEQ_BIN_8 -72 0x0D0E //RX_FDEQ_BIN_9 -73 0x1214 //RX_FDEQ_BIN_10 -74 0x1E1E //RX_FDEQ_BIN_11 -75 0x1E1E //RX_FDEQ_BIN_12 -76 0x1E1E //RX_FDEQ_BIN_13 -77 0x1E1E //RX_FDEQ_BIN_14 -78 0x202C //RX_FDEQ_BIN_15 +72 0x0D09 //RX_FDEQ_BIN_9 +73 0x0819 //RX_FDEQ_BIN_10 +74 0x1E19 //RX_FDEQ_BIN_11 +75 0x1B0F //RX_FDEQ_BIN_12 +76 0x141E //RX_FDEQ_BIN_13 +77 0x3728 //RX_FDEQ_BIN_14 +78 0x282C //RX_FDEQ_BIN_15 79 0x0000 //RX_FDEQ_BIN_16 80 0x0000 //RX_FDEQ_BIN_17 81 0x0000 //RX_FDEQ_BIN_18 @@ -17035,7 +14674,7 @@ 108 0x5333 //RX_FDDRC_SLANT_1_2 109 0x5333 //RX_FDDRC_SLANT_1_3 110 0x0000 //RX_FDDRC_RESRV_0 -129 0x0100 //RX_SPK_VOL +129 0x0010 //RX_SPK_VOL 130 0x0000 //RX_VOL_RESRV_0 #VOL 2 6 0x1000 //RX_TDDRC_ALPHA_UP_1 @@ -17048,36 +14687,36 @@ 32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 33 0x7000 //RX_TDDRC_LIMITER_THRD 34 0x0800 //RX_TDDRC_LIMITER_GAIN -112 0x0000 //RX_TDDRC_THRD_0 -113 0x0000 //RX_TDDRC_THRD_1 +112 0x0001 //RX_TDDRC_THRD_0 +113 0x0002 //RX_TDDRC_THRD_1 114 0x1800 //RX_TDDRC_THRD_2 115 0x1800 //RX_TDDRC_THRD_3 -116 0x3000 //RX_TDDRC_SLANT_0 -117 0x6E00 //RX_TDDRC_SLANT_1 +116 0x7FFF //RX_TDDRC_SLANT_0 +117 0x7FFF //RX_TDDRC_SLANT_1 118 0x1000 //RX_TDDRC_ALPHA_UP_0 119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 120 0x0000 //RX_TDDRC_HMNC_FLAG 121 0x199A //RX_TDDRC_HMNC_GAIN 122 0x0001 //RX_TDDRC_SMT_FLAG 123 0x0CCD //RX_TDDRC_SMT_W -124 0x01E0 //RX_TDDRC_DRC_GAIN -38 0x0030 //RX_FDEQ_SUBNUM -39 0x4848 //RX_FDEQ_GAIN_0 -40 0x4848 //RX_FDEQ_GAIN_1 -41 0x4844 //RX_FDEQ_GAIN_2 -42 0x4B4D //RX_FDEQ_GAIN_3 -43 0x4E50 //RX_FDEQ_GAIN_4 -44 0x5254 //RX_FDEQ_GAIN_5 -45 0x5658 //RX_FDEQ_GAIN_6 -46 0x5C60 //RX_FDEQ_GAIN_7 -47 0x6468 //RX_FDEQ_GAIN_8 -48 0x6C70 //RX_FDEQ_GAIN_9 -49 0x7474 //RX_FDEQ_GAIN_10 -50 0x7474 //RX_FDEQ_GAIN_11 -51 0x7474 //RX_FDEQ_GAIN_12 -52 0x7474 //RX_FDEQ_GAIN_13 -53 0x7474 //RX_FDEQ_GAIN_14 -54 0x7474 //RX_FDEQ_GAIN_15 +124 0x056F //RX_TDDRC_DRC_GAIN +38 0x0020 //RX_FDEQ_SUBNUM +39 0x483E //RX_FDEQ_GAIN_0 +40 0x3E3E //RX_FDEQ_GAIN_1 +41 0x3E4C //RX_FDEQ_GAIN_2 +42 0x586E //RX_FDEQ_GAIN_3 +43 0x8496 //RX_FDEQ_GAIN_4 +44 0x968E //RX_FDEQ_GAIN_5 +45 0x8488 //RX_FDEQ_GAIN_6 +46 0x8884 //RX_FDEQ_GAIN_7 +47 0x9CA4 //RX_FDEQ_GAIN_8 +48 0x98A8 //RX_FDEQ_GAIN_9 +49 0xBEB8 //RX_FDEQ_GAIN_10 +50 0x918D //RX_FDEQ_GAIN_11 +51 0x7566 //RX_FDEQ_GAIN_12 +52 0x6460 //RX_FDEQ_GAIN_13 +53 0x6174 //RX_FDEQ_GAIN_14 +54 0x7890 //RX_FDEQ_GAIN_15 55 0x4848 //RX_FDEQ_GAIN_16 56 0x4848 //RX_FDEQ_GAIN_17 57 0x4848 //RX_FDEQ_GAIN_18 @@ -17087,21 +14726,21 @@ 61 0x4848 //RX_FDEQ_GAIN_22 62 0x4848 //RX_FDEQ_GAIN_23 63 0x0202 //RX_FDEQ_BIN_0 -64 0x0203 //RX_FDEQ_BIN_1 -65 0x0402 //RX_FDEQ_BIN_2 -66 0x0304 //RX_FDEQ_BIN_3 -67 0x0405 //RX_FDEQ_BIN_4 -68 0x0506 //RX_FDEQ_BIN_5 +64 0x0202 //RX_FDEQ_BIN_1 +65 0x0301 //RX_FDEQ_BIN_2 +66 0x0404 //RX_FDEQ_BIN_3 +67 0x0406 //RX_FDEQ_BIN_4 +68 0x0109 //RX_FDEQ_BIN_5 69 0x0708 //RX_FDEQ_BIN_6 70 0x090A //RX_FDEQ_BIN_7 71 0x0B0C //RX_FDEQ_BIN_8 -72 0x0D0E //RX_FDEQ_BIN_9 -73 0x1214 //RX_FDEQ_BIN_10 -74 0x1E1E //RX_FDEQ_BIN_11 -75 0x1E1E //RX_FDEQ_BIN_12 -76 0x1E1E //RX_FDEQ_BIN_13 -77 0x1E1E //RX_FDEQ_BIN_14 -78 0x202C //RX_FDEQ_BIN_15 +72 0x0D09 //RX_FDEQ_BIN_9 +73 0x0819 //RX_FDEQ_BIN_10 +74 0x1E19 //RX_FDEQ_BIN_11 +75 0x1B0F //RX_FDEQ_BIN_12 +76 0x141E //RX_FDEQ_BIN_13 +77 0x3728 //RX_FDEQ_BIN_14 +78 0x282C //RX_FDEQ_BIN_15 79 0x0000 //RX_FDEQ_BIN_16 80 0x0000 //RX_FDEQ_BIN_17 81 0x0000 //RX_FDEQ_BIN_18 @@ -17134,7 +14773,7 @@ 108 0x5333 //RX_FDDRC_SLANT_1_2 109 0x5333 //RX_FDDRC_SLANT_1_3 110 0x0000 //RX_FDDRC_RESRV_0 -129 0x0100 //RX_SPK_VOL +129 0x001B //RX_SPK_VOL 130 0x0000 //RX_VOL_RESRV_0 #VOL 3 6 0x1000 //RX_TDDRC_ALPHA_UP_1 @@ -17147,36 +14786,36 @@ 32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 33 0x7000 //RX_TDDRC_LIMITER_THRD 34 0x0800 //RX_TDDRC_LIMITER_GAIN -112 0x0000 //RX_TDDRC_THRD_0 -113 0x0000 //RX_TDDRC_THRD_1 +112 0x0001 //RX_TDDRC_THRD_0 +113 0x0002 //RX_TDDRC_THRD_1 114 0x1800 //RX_TDDRC_THRD_2 115 0x1800 //RX_TDDRC_THRD_3 -116 0x3000 //RX_TDDRC_SLANT_0 -117 0x6E00 //RX_TDDRC_SLANT_1 +116 0x7FFF //RX_TDDRC_SLANT_0 +117 0x7FFF //RX_TDDRC_SLANT_1 118 0x1000 //RX_TDDRC_ALPHA_UP_0 119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 120 0x0000 //RX_TDDRC_HMNC_FLAG 121 0x199A //RX_TDDRC_HMNC_GAIN 122 0x0001 //RX_TDDRC_SMT_FLAG 123 0x0CCD //RX_TDDRC_SMT_W -124 0x01E0 //RX_TDDRC_DRC_GAIN -38 0x0030 //RX_FDEQ_SUBNUM -39 0x4848 //RX_FDEQ_GAIN_0 -40 0x4848 //RX_FDEQ_GAIN_1 -41 0x4844 //RX_FDEQ_GAIN_2 -42 0x4B4D //RX_FDEQ_GAIN_3 -43 0x4E50 //RX_FDEQ_GAIN_4 -44 0x5254 //RX_FDEQ_GAIN_5 -45 0x5658 //RX_FDEQ_GAIN_6 -46 0x5C60 //RX_FDEQ_GAIN_7 -47 0x6468 //RX_FDEQ_GAIN_8 -48 0x6C70 //RX_FDEQ_GAIN_9 -49 0x7474 //RX_FDEQ_GAIN_10 -50 0x7474 //RX_FDEQ_GAIN_11 -51 0x7474 //RX_FDEQ_GAIN_12 -52 0x7474 //RX_FDEQ_GAIN_13 -53 0x7474 //RX_FDEQ_GAIN_14 -54 0x7474 //RX_FDEQ_GAIN_15 +124 0x056F //RX_TDDRC_DRC_GAIN +38 0x0020 //RX_FDEQ_SUBNUM +39 0x483E //RX_FDEQ_GAIN_0 +40 0x3E3E //RX_FDEQ_GAIN_1 +41 0x3E4C //RX_FDEQ_GAIN_2 +42 0x586E //RX_FDEQ_GAIN_3 +43 0x8496 //RX_FDEQ_GAIN_4 +44 0x968E //RX_FDEQ_GAIN_5 +45 0x8488 //RX_FDEQ_GAIN_6 +46 0x8884 //RX_FDEQ_GAIN_7 +47 0x9CA4 //RX_FDEQ_GAIN_8 +48 0x98A8 //RX_FDEQ_GAIN_9 +49 0xBEB8 //RX_FDEQ_GAIN_10 +50 0x918D //RX_FDEQ_GAIN_11 +51 0x7566 //RX_FDEQ_GAIN_12 +52 0x6460 //RX_FDEQ_GAIN_13 +53 0x6174 //RX_FDEQ_GAIN_14 +54 0x7890 //RX_FDEQ_GAIN_15 55 0x4848 //RX_FDEQ_GAIN_16 56 0x4848 //RX_FDEQ_GAIN_17 57 0x4848 //RX_FDEQ_GAIN_18 @@ -17186,21 +14825,21 @@ 61 0x4848 //RX_FDEQ_GAIN_22 62 0x4848 //RX_FDEQ_GAIN_23 63 0x0202 //RX_FDEQ_BIN_0 -64 0x0203 //RX_FDEQ_BIN_1 -65 0x0402 //RX_FDEQ_BIN_2 -66 0x0304 //RX_FDEQ_BIN_3 -67 0x0405 //RX_FDEQ_BIN_4 -68 0x0506 //RX_FDEQ_BIN_5 +64 0x0202 //RX_FDEQ_BIN_1 +65 0x0301 //RX_FDEQ_BIN_2 +66 0x0404 //RX_FDEQ_BIN_3 +67 0x0406 //RX_FDEQ_BIN_4 +68 0x0109 //RX_FDEQ_BIN_5 69 0x0708 //RX_FDEQ_BIN_6 70 0x090A //RX_FDEQ_BIN_7 71 0x0B0C //RX_FDEQ_BIN_8 -72 0x0D0E //RX_FDEQ_BIN_9 -73 0x1214 //RX_FDEQ_BIN_10 -74 0x1E1E //RX_FDEQ_BIN_11 -75 0x1E1E //RX_FDEQ_BIN_12 -76 0x1E1E //RX_FDEQ_BIN_13 -77 0x1E1E //RX_FDEQ_BIN_14 -78 0x202C //RX_FDEQ_BIN_15 +72 0x0D09 //RX_FDEQ_BIN_9 +73 0x0819 //RX_FDEQ_BIN_10 +74 0x1E19 //RX_FDEQ_BIN_11 +75 0x1B0F //RX_FDEQ_BIN_12 +76 0x141E //RX_FDEQ_BIN_13 +77 0x3728 //RX_FDEQ_BIN_14 +78 0x282C //RX_FDEQ_BIN_15 79 0x0000 //RX_FDEQ_BIN_16 80 0x0000 //RX_FDEQ_BIN_17 81 0x0000 //RX_FDEQ_BIN_18 @@ -17233,7 +14872,7 @@ 108 0x5333 //RX_FDDRC_SLANT_1_2 109 0x5333 //RX_FDDRC_SLANT_1_3 110 0x0000 //RX_FDDRC_RESRV_0 -129 0x0100 //RX_SPK_VOL +129 0x0035 //RX_SPK_VOL 130 0x0000 //RX_VOL_RESRV_0 #VOL 4 6 0x1000 //RX_TDDRC_ALPHA_UP_1 @@ -17246,36 +14885,36 @@ 32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 33 0x7000 //RX_TDDRC_LIMITER_THRD 34 0x0800 //RX_TDDRC_LIMITER_GAIN -112 0x0000 //RX_TDDRC_THRD_0 -113 0x0000 //RX_TDDRC_THRD_1 +112 0x0001 //RX_TDDRC_THRD_0 +113 0x0002 //RX_TDDRC_THRD_1 114 0x1800 //RX_TDDRC_THRD_2 115 0x1800 //RX_TDDRC_THRD_3 -116 0x3000 //RX_TDDRC_SLANT_0 -117 0x6E00 //RX_TDDRC_SLANT_1 +116 0x7FFF //RX_TDDRC_SLANT_0 +117 0x7FFF //RX_TDDRC_SLANT_1 118 0x1000 //RX_TDDRC_ALPHA_UP_0 119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 120 0x0000 //RX_TDDRC_HMNC_FLAG 121 0x199A //RX_TDDRC_HMNC_GAIN 122 0x0001 //RX_TDDRC_SMT_FLAG 123 0x0CCD //RX_TDDRC_SMT_W -124 0x01E0 //RX_TDDRC_DRC_GAIN -38 0x0030 //RX_FDEQ_SUBNUM -39 0x4848 //RX_FDEQ_GAIN_0 -40 0x4848 //RX_FDEQ_GAIN_1 -41 0x4844 //RX_FDEQ_GAIN_2 -42 0x4B4D //RX_FDEQ_GAIN_3 -43 0x4E50 //RX_FDEQ_GAIN_4 -44 0x5254 //RX_FDEQ_GAIN_5 -45 0x5658 //RX_FDEQ_GAIN_6 -46 0x5C60 //RX_FDEQ_GAIN_7 -47 0x6468 //RX_FDEQ_GAIN_8 -48 0x6C70 //RX_FDEQ_GAIN_9 -49 0x7474 //RX_FDEQ_GAIN_10 -50 0x7474 //RX_FDEQ_GAIN_11 -51 0x7474 //RX_FDEQ_GAIN_12 -52 0x7474 //RX_FDEQ_GAIN_13 -53 0x7474 //RX_FDEQ_GAIN_14 -54 0x7474 //RX_FDEQ_GAIN_15 +124 0x056F //RX_TDDRC_DRC_GAIN +38 0x0020 //RX_FDEQ_SUBNUM +39 0x483E //RX_FDEQ_GAIN_0 +40 0x3E3E //RX_FDEQ_GAIN_1 +41 0x3E4C //RX_FDEQ_GAIN_2 +42 0x586E //RX_FDEQ_GAIN_3 +43 0x8496 //RX_FDEQ_GAIN_4 +44 0x968E //RX_FDEQ_GAIN_5 +45 0x8488 //RX_FDEQ_GAIN_6 +46 0x8884 //RX_FDEQ_GAIN_7 +47 0x9CA4 //RX_FDEQ_GAIN_8 +48 0x98A8 //RX_FDEQ_GAIN_9 +49 0xBEB8 //RX_FDEQ_GAIN_10 +50 0x918D //RX_FDEQ_GAIN_11 +51 0x7566 //RX_FDEQ_GAIN_12 +52 0x6460 //RX_FDEQ_GAIN_13 +53 0x6174 //RX_FDEQ_GAIN_14 +54 0x7890 //RX_FDEQ_GAIN_15 55 0x4848 //RX_FDEQ_GAIN_16 56 0x4848 //RX_FDEQ_GAIN_17 57 0x4848 //RX_FDEQ_GAIN_18 @@ -17285,21 +14924,21 @@ 61 0x4848 //RX_FDEQ_GAIN_22 62 0x4848 //RX_FDEQ_GAIN_23 63 0x0202 //RX_FDEQ_BIN_0 -64 0x0203 //RX_FDEQ_BIN_1 -65 0x0402 //RX_FDEQ_BIN_2 -66 0x0304 //RX_FDEQ_BIN_3 -67 0x0405 //RX_FDEQ_BIN_4 -68 0x0506 //RX_FDEQ_BIN_5 +64 0x0202 //RX_FDEQ_BIN_1 +65 0x0301 //RX_FDEQ_BIN_2 +66 0x0404 //RX_FDEQ_BIN_3 +67 0x0406 //RX_FDEQ_BIN_4 +68 0x0109 //RX_FDEQ_BIN_5 69 0x0708 //RX_FDEQ_BIN_6 70 0x090A //RX_FDEQ_BIN_7 71 0x0B0C //RX_FDEQ_BIN_8 -72 0x0D0E //RX_FDEQ_BIN_9 -73 0x1214 //RX_FDEQ_BIN_10 -74 0x1E1E //RX_FDEQ_BIN_11 -75 0x1E1E //RX_FDEQ_BIN_12 -76 0x1E1E //RX_FDEQ_BIN_13 -77 0x1E1E //RX_FDEQ_BIN_14 -78 0x202C //RX_FDEQ_BIN_15 +72 0x0D09 //RX_FDEQ_BIN_9 +73 0x0819 //RX_FDEQ_BIN_10 +74 0x1E19 //RX_FDEQ_BIN_11 +75 0x1B0F //RX_FDEQ_BIN_12 +76 0x141E //RX_FDEQ_BIN_13 +77 0x3728 //RX_FDEQ_BIN_14 +78 0x282C //RX_FDEQ_BIN_15 79 0x0000 //RX_FDEQ_BIN_16 80 0x0000 //RX_FDEQ_BIN_17 81 0x0000 //RX_FDEQ_BIN_18 @@ -17332,7 +14971,7 @@ 108 0x5333 //RX_FDDRC_SLANT_1_2 109 0x5333 //RX_FDDRC_SLANT_1_3 110 0x0000 //RX_FDDRC_RESRV_0 -129 0x0100 //RX_SPK_VOL +129 0x0047 //RX_SPK_VOL 130 0x0000 //RX_VOL_RESRV_0 #VOL 5 6 0x1000 //RX_TDDRC_ALPHA_UP_1 @@ -17345,36 +14984,36 @@ 32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 33 0x7000 //RX_TDDRC_LIMITER_THRD 34 0x0800 //RX_TDDRC_LIMITER_GAIN -112 0x0000 //RX_TDDRC_THRD_0 -113 0x0000 //RX_TDDRC_THRD_1 +112 0x0001 //RX_TDDRC_THRD_0 +113 0x0002 //RX_TDDRC_THRD_1 114 0x1800 //RX_TDDRC_THRD_2 115 0x1800 //RX_TDDRC_THRD_3 -116 0x3000 //RX_TDDRC_SLANT_0 -117 0x6E00 //RX_TDDRC_SLANT_1 +116 0x7FFF //RX_TDDRC_SLANT_0 +117 0x7FFF //RX_TDDRC_SLANT_1 118 0x1000 //RX_TDDRC_ALPHA_UP_0 119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 120 0x0000 //RX_TDDRC_HMNC_FLAG 121 0x199A //RX_TDDRC_HMNC_GAIN 122 0x0001 //RX_TDDRC_SMT_FLAG 123 0x0CCD //RX_TDDRC_SMT_W -124 0x01E0 //RX_TDDRC_DRC_GAIN -38 0x0030 //RX_FDEQ_SUBNUM -39 0x4848 //RX_FDEQ_GAIN_0 -40 0x4848 //RX_FDEQ_GAIN_1 -41 0x4844 //RX_FDEQ_GAIN_2 -42 0x4B4D //RX_FDEQ_GAIN_3 -43 0x4E50 //RX_FDEQ_GAIN_4 -44 0x5254 //RX_FDEQ_GAIN_5 -45 0x5658 //RX_FDEQ_GAIN_6 -46 0x5C60 //RX_FDEQ_GAIN_7 -47 0x6468 //RX_FDEQ_GAIN_8 -48 0x6C70 //RX_FDEQ_GAIN_9 -49 0x7474 //RX_FDEQ_GAIN_10 -50 0x7474 //RX_FDEQ_GAIN_11 -51 0x7474 //RX_FDEQ_GAIN_12 -52 0x7474 //RX_FDEQ_GAIN_13 -53 0x7474 //RX_FDEQ_GAIN_14 -54 0x7474 //RX_FDEQ_GAIN_15 +124 0x056F //RX_TDDRC_DRC_GAIN +38 0x0020 //RX_FDEQ_SUBNUM +39 0x483E //RX_FDEQ_GAIN_0 +40 0x3E3E //RX_FDEQ_GAIN_1 +41 0x3E4C //RX_FDEQ_GAIN_2 +42 0x586E //RX_FDEQ_GAIN_3 +43 0x8496 //RX_FDEQ_GAIN_4 +44 0x968E //RX_FDEQ_GAIN_5 +45 0x8488 //RX_FDEQ_GAIN_6 +46 0x8884 //RX_FDEQ_GAIN_7 +47 0x9CA4 //RX_FDEQ_GAIN_8 +48 0x98A8 //RX_FDEQ_GAIN_9 +49 0xBEB8 //RX_FDEQ_GAIN_10 +50 0x918D //RX_FDEQ_GAIN_11 +51 0x7566 //RX_FDEQ_GAIN_12 +52 0x6460 //RX_FDEQ_GAIN_13 +53 0x6174 //RX_FDEQ_GAIN_14 +54 0x7890 //RX_FDEQ_GAIN_15 55 0x4848 //RX_FDEQ_GAIN_16 56 0x4848 //RX_FDEQ_GAIN_17 57 0x4848 //RX_FDEQ_GAIN_18 @@ -17384,21 +15023,21 @@ 61 0x4848 //RX_FDEQ_GAIN_22 62 0x4848 //RX_FDEQ_GAIN_23 63 0x0202 //RX_FDEQ_BIN_0 -64 0x0203 //RX_FDEQ_BIN_1 -65 0x0402 //RX_FDEQ_BIN_2 -66 0x0304 //RX_FDEQ_BIN_3 -67 0x0405 //RX_FDEQ_BIN_4 -68 0x0506 //RX_FDEQ_BIN_5 +64 0x0202 //RX_FDEQ_BIN_1 +65 0x0301 //RX_FDEQ_BIN_2 +66 0x0404 //RX_FDEQ_BIN_3 +67 0x0406 //RX_FDEQ_BIN_4 +68 0x0109 //RX_FDEQ_BIN_5 69 0x0708 //RX_FDEQ_BIN_6 70 0x090A //RX_FDEQ_BIN_7 71 0x0B0C //RX_FDEQ_BIN_8 -72 0x0D0E //RX_FDEQ_BIN_9 -73 0x1214 //RX_FDEQ_BIN_10 -74 0x1E1E //RX_FDEQ_BIN_11 -75 0x1E1E //RX_FDEQ_BIN_12 -76 0x1E1E //RX_FDEQ_BIN_13 -77 0x1E1E //RX_FDEQ_BIN_14 -78 0x202C //RX_FDEQ_BIN_15 +72 0x0D09 //RX_FDEQ_BIN_9 +73 0x0819 //RX_FDEQ_BIN_10 +74 0x1E19 //RX_FDEQ_BIN_11 +75 0x1B0F //RX_FDEQ_BIN_12 +76 0x141E //RX_FDEQ_BIN_13 +77 0x3728 //RX_FDEQ_BIN_14 +78 0x282C //RX_FDEQ_BIN_15 79 0x0000 //RX_FDEQ_BIN_16 80 0x0000 //RX_FDEQ_BIN_17 81 0x0000 //RX_FDEQ_BIN_18 @@ -17431,7 +15070,7 @@ 108 0x5333 //RX_FDDRC_SLANT_1_2 109 0x5333 //RX_FDDRC_SLANT_1_3 110 0x0000 //RX_FDDRC_RESRV_0 -129 0x0100 //RX_SPK_VOL +129 0x0076 //RX_SPK_VOL 130 0x0000 //RX_VOL_RESRV_0 #VOL 6 6 0x1000 //RX_TDDRC_ALPHA_UP_1 @@ -17444,36 +15083,36 @@ 32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 33 0x7000 //RX_TDDRC_LIMITER_THRD 34 0x0800 //RX_TDDRC_LIMITER_GAIN -112 0x0000 //RX_TDDRC_THRD_0 -113 0x0000 //RX_TDDRC_THRD_1 +112 0x0001 //RX_TDDRC_THRD_0 +113 0x0002 //RX_TDDRC_THRD_1 114 0x1800 //RX_TDDRC_THRD_2 115 0x1800 //RX_TDDRC_THRD_3 -116 0x3000 //RX_TDDRC_SLANT_0 -117 0x6E00 //RX_TDDRC_SLANT_1 +116 0x7FFF //RX_TDDRC_SLANT_0 +117 0x7FFF //RX_TDDRC_SLANT_1 118 0x1000 //RX_TDDRC_ALPHA_UP_0 119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 120 0x0000 //RX_TDDRC_HMNC_FLAG 121 0x199A //RX_TDDRC_HMNC_GAIN 122 0x0001 //RX_TDDRC_SMT_FLAG 123 0x0CCD //RX_TDDRC_SMT_W -124 0x01E0 //RX_TDDRC_DRC_GAIN -38 0x0030 //RX_FDEQ_SUBNUM -39 0x4848 //RX_FDEQ_GAIN_0 -40 0x4848 //RX_FDEQ_GAIN_1 -41 0x4844 //RX_FDEQ_GAIN_2 -42 0x4B4D //RX_FDEQ_GAIN_3 -43 0x4E50 //RX_FDEQ_GAIN_4 -44 0x5254 //RX_FDEQ_GAIN_5 -45 0x5658 //RX_FDEQ_GAIN_6 -46 0x5C60 //RX_FDEQ_GAIN_7 -47 0x6468 //RX_FDEQ_GAIN_8 -48 0x6C70 //RX_FDEQ_GAIN_9 -49 0x7474 //RX_FDEQ_GAIN_10 -50 0x7474 //RX_FDEQ_GAIN_11 -51 0x7474 //RX_FDEQ_GAIN_12 -52 0x7474 //RX_FDEQ_GAIN_13 -53 0x7474 //RX_FDEQ_GAIN_14 -54 0x7474 //RX_FDEQ_GAIN_15 +124 0x056F //RX_TDDRC_DRC_GAIN +38 0x0020 //RX_FDEQ_SUBNUM +39 0x483E //RX_FDEQ_GAIN_0 +40 0x3E3E //RX_FDEQ_GAIN_1 +41 0x3E4C //RX_FDEQ_GAIN_2 +42 0x586E //RX_FDEQ_GAIN_3 +43 0x8496 //RX_FDEQ_GAIN_4 +44 0x968E //RX_FDEQ_GAIN_5 +45 0x8488 //RX_FDEQ_GAIN_6 +46 0x8884 //RX_FDEQ_GAIN_7 +47 0x9CA4 //RX_FDEQ_GAIN_8 +48 0x98A8 //RX_FDEQ_GAIN_9 +49 0xBEB8 //RX_FDEQ_GAIN_10 +50 0x918D //RX_FDEQ_GAIN_11 +51 0x7566 //RX_FDEQ_GAIN_12 +52 0x6460 //RX_FDEQ_GAIN_13 +53 0x6174 //RX_FDEQ_GAIN_14 +54 0x7890 //RX_FDEQ_GAIN_15 55 0x4848 //RX_FDEQ_GAIN_16 56 0x4848 //RX_FDEQ_GAIN_17 57 0x4848 //RX_FDEQ_GAIN_18 @@ -17483,21 +15122,21 @@ 61 0x4848 //RX_FDEQ_GAIN_22 62 0x4848 //RX_FDEQ_GAIN_23 63 0x0202 //RX_FDEQ_BIN_0 -64 0x0203 //RX_FDEQ_BIN_1 -65 0x0402 //RX_FDEQ_BIN_2 -66 0x0304 //RX_FDEQ_BIN_3 -67 0x0405 //RX_FDEQ_BIN_4 -68 0x0506 //RX_FDEQ_BIN_5 +64 0x0202 //RX_FDEQ_BIN_1 +65 0x0301 //RX_FDEQ_BIN_2 +66 0x0404 //RX_FDEQ_BIN_3 +67 0x0406 //RX_FDEQ_BIN_4 +68 0x0109 //RX_FDEQ_BIN_5 69 0x0708 //RX_FDEQ_BIN_6 70 0x090A //RX_FDEQ_BIN_7 71 0x0B0C //RX_FDEQ_BIN_8 -72 0x0D0E //RX_FDEQ_BIN_9 -73 0x1214 //RX_FDEQ_BIN_10 -74 0x1E1E //RX_FDEQ_BIN_11 -75 0x1E1E //RX_FDEQ_BIN_12 -76 0x1E1E //RX_FDEQ_BIN_13 -77 0x1E1E //RX_FDEQ_BIN_14 -78 0x202C //RX_FDEQ_BIN_15 +72 0x0D09 //RX_FDEQ_BIN_9 +73 0x0819 //RX_FDEQ_BIN_10 +74 0x1E19 //RX_FDEQ_BIN_11 +75 0x1B0F //RX_FDEQ_BIN_12 +76 0x141E //RX_FDEQ_BIN_13 +77 0x3728 //RX_FDEQ_BIN_14 +78 0x282C //RX_FDEQ_BIN_15 79 0x0000 //RX_FDEQ_BIN_16 80 0x0000 //RX_FDEQ_BIN_17 81 0x0000 //RX_FDEQ_BIN_18 @@ -17532,10 +15171,862 @@ 110 0x0000 //RX_FDDRC_RESRV_0 129 0x0100 //RX_SPK_VOL 130 0x0000 //RX_VOL_RESRV_0 +#RX 2 +157 0x003C //RX_RECVFUNC_MODE_0 +158 0x0000 //RX_RECVFUNC_MODE_1 +159 0x0003 //RX_SAMPLINGFREQ_SIG +160 0x0003 //RX_SAMPLINGFREQ_PROC +161 0x000A //RX_FRAME_SZ +162 0x0000 //RX_DELAY_OPT +163 0x1000 //RX_TDDRC_ALPHA_UP_1 +164 0x1000 //RX_TDDRC_ALPHA_UP_2 +165 0x1000 //RX_TDDRC_ALPHA_UP_3 +166 0x1000 //RX_TDDRC_ALPHA_UP_4 +167 0x05AA //RX_PGA +168 0x7FFF //RX_A_HP +169 0x4000 //RX_B_PE +170 0x5800 //RX_THR_PITCH_DET_0 +171 0x5000 //RX_THR_PITCH_DET_1 +172 0x4000 //RX_THR_PITCH_DET_2 +173 0x0008 //RX_PITCH_BFR_LEN +174 0x0003 //RX_SBD_PITCH_DET +175 0x0100 //RX_PP_RESRV_0 +176 0x0020 //RX_PP_RESRV_1 +177 0x0600 //RX_N_SN_EST +178 0x000C //RX_N2_SN_EST +179 0x000F //RX_NS_LVL_CTRL +180 0xF800 //RX_THR_SN_EST +181 0x7E00 //RX_LAMBDA_PFILT +182 0x000A //RX_FENS_RESRV_0 +183 0x0190 //RX_FENS_RESRV_1 +184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +187 0x0002 //RX_EXTRA_NS_L +188 0x0800 //RX_EXTRA_NS_A +189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +190 0x7000 //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +192 0x199A //RX_A_POST_FLT +193 0x0000 //RX_LMT_THRD +194 0x4000 //RX_LMT_ALPHA +195 0x0020 //RX_FDEQ_SUBNUM +196 0x483E //RX_FDEQ_GAIN_0 +197 0x3E3E //RX_FDEQ_GAIN_1 +198 0x3E4C //RX_FDEQ_GAIN_2 +199 0x5064 //RX_FDEQ_GAIN_3 +200 0x7076 //RX_FDEQ_GAIN_4 +201 0x897A //RX_FDEQ_GAIN_5 +202 0x7C80 //RX_FDEQ_GAIN_6 +203 0x8888 //RX_FDEQ_GAIN_7 +204 0x949C //RX_FDEQ_GAIN_8 +205 0x96A4 //RX_FDEQ_GAIN_9 +206 0xA9A0 //RX_FDEQ_GAIN_10 +207 0x9487 //RX_FDEQ_GAIN_11 +208 0x6F64 //RX_FDEQ_GAIN_12 +209 0x625A //RX_FDEQ_GAIN_13 +210 0x5D80 //RX_FDEQ_GAIN_14 +211 0x8890 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0202 //RX_FDEQ_BIN_0 +221 0x0202 //RX_FDEQ_BIN_1 +222 0x0301 //RX_FDEQ_BIN_2 +223 0x0404 //RX_FDEQ_BIN_3 +224 0x0406 //RX_FDEQ_BIN_4 +225 0x0109 //RX_FDEQ_BIN_5 +226 0x0708 //RX_FDEQ_BIN_6 +227 0x090A //RX_FDEQ_BIN_7 +228 0x0B0C //RX_FDEQ_BIN_8 +229 0x0D0E //RX_FDEQ_BIN_9 +230 0x1013 //RX_FDEQ_BIN_10 +231 0x1719 //RX_FDEQ_BIN_11 +232 0x1B0F //RX_FDEQ_BIN_12 +233 0x141E //RX_FDEQ_BIN_13 +234 0x3728 //RX_FDEQ_BIN_14 +235 0x282C //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x4000 //RX_FDEQ_RESRV_0 +245 0x0320 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0030 //RX_FDDRC_BAND_MARGIN_1 +248 0x0050 //RX_FDDRC_BAND_MARGIN_2 +249 0x0080 //RX_FDDRC_BAND_MARGIN_3 +250 0x0007 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x5000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x6400 //RX_FDDRC_THRD_3_2 +258 0x6400 //RX_FDDRC_THRD_3_3 +259 0x2000 //RX_FDDRC_SLANT_0_0 +260 0x2000 //RX_FDDRC_SLANT_0_1 +261 0x2000 //RX_FDDRC_SLANT_0_2 +262 0x2000 //RX_FDDRC_SLANT_0_3 +263 0x5333 //RX_FDDRC_SLANT_1_0 +264 0x5333 //RX_FDDRC_SLANT_1_1 +265 0x5333 //RX_FDDRC_SLANT_1_2 +266 0x5333 //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +268 0x0002 //RX_FILTINDX +269 0x0001 //RX_TDDRC_THRD_0 +270 0x0002 //RX_TDDRC_THRD_1 +271 0x1800 //RX_TDDRC_THRD_2 +272 0x1800 //RX_TDDRC_THRD_3 +273 0x7FFF //RX_TDDRC_SLANT_0 +274 0x7FFF //RX_TDDRC_SLANT_1 +275 0x1000 //RX_TDDRC_ALPHA_UP_0 +276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x199A //RX_TDDRC_HMNC_GAIN +279 0x0001 //RX_TDDRC_SMT_FLAG +280 0x0CCD //RX_TDDRC_SMT_W +281 0x0551 //RX_TDDRC_DRC_GAIN +282 0x7C00 //RX_LAMBDA_PKA_FP +283 0x13E0 //RX_TPKA_FP +284 0x0080 //RX_MIN_G_FP +285 0x2000 //RX_MAX_G_FP +286 0x0100 //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 +288 0x0000 //RX_MAXLEVEL_CNG +289 0x3000 //RX_BWE_UV_TH +290 0x3000 //RX_BWE_UV_TH2 +291 0x1800 //RX_BWE_UV_TH3 +292 0x1000 //RX_BWE_V_TH +293 0x04CD //RX_BWE_GAIN1_V_TH1 +294 0x0F33 //RX_BWE_GAIN1_V_TH2 +295 0x7333 //RX_BWE_UV_EQ +296 0x199A //RX_BWE_V_EQ +297 0x7333 //RX_BWE_TONE_TH +298 0x0004 //RX_BWE_UV_HOLD_T +299 0x6CCD //RX_BWE_GAIN2_ALPHA +300 0x799A //RX_BWE_GAIN3_ALPHA +301 0x001E //RX_BWE_CUTOFF +302 0x3000 //RX_BWE_GAINFILL +303 0x3200 //RX_BWE_MAXTH_TONE +304 0x2000 //RX_BWE_EQ_0 +305 0x2000 //RX_BWE_EQ_1 +306 0x2000 //RX_BWE_EQ_2 +307 0x2000 //RX_BWE_EQ_3 +308 0x2000 //RX_BWE_EQ_4 +309 0x2000 //RX_BWE_EQ_5 +310 0x2000 //RX_BWE_EQ_6 +311 0x0000 //RX_BWE_RESRV_0 +312 0x0000 //RX_BWE_RESRV_1 +313 0x0000 //RX_BWE_RESRV_2 +#VOL 0 +163 0x1000 //RX_TDDRC_ALPHA_UP_1 +164 0x1000 //RX_TDDRC_ALPHA_UP_2 +165 0x1000 //RX_TDDRC_ALPHA_UP_3 +166 0x1000 //RX_TDDRC_ALPHA_UP_4 +184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +190 0x7000 //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +269 0x0001 //RX_TDDRC_THRD_0 +270 0x0002 //RX_TDDRC_THRD_1 +271 0x1800 //RX_TDDRC_THRD_2 +272 0x1800 //RX_TDDRC_THRD_3 +273 0x7FFF //RX_TDDRC_SLANT_0 +274 0x7FFF //RX_TDDRC_SLANT_1 +275 0x1000 //RX_TDDRC_ALPHA_UP_0 +276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x199A //RX_TDDRC_HMNC_GAIN +279 0x0001 //RX_TDDRC_SMT_FLAG +280 0x0CCD //RX_TDDRC_SMT_W +281 0x0551 //RX_TDDRC_DRC_GAIN +195 0x0020 //RX_FDEQ_SUBNUM +196 0x483E //RX_FDEQ_GAIN_0 +197 0x3E3E //RX_FDEQ_GAIN_1 +198 0x3E4C //RX_FDEQ_GAIN_2 +199 0x5064 //RX_FDEQ_GAIN_3 +200 0x7076 //RX_FDEQ_GAIN_4 +201 0x897A //RX_FDEQ_GAIN_5 +202 0x7C80 //RX_FDEQ_GAIN_6 +203 0x8888 //RX_FDEQ_GAIN_7 +204 0x949C //RX_FDEQ_GAIN_8 +205 0x96A4 //RX_FDEQ_GAIN_9 +206 0xA9A0 //RX_FDEQ_GAIN_10 +207 0x9487 //RX_FDEQ_GAIN_11 +208 0x6F64 //RX_FDEQ_GAIN_12 +209 0x625A //RX_FDEQ_GAIN_13 +210 0x5D80 //RX_FDEQ_GAIN_14 +211 0x8890 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0202 //RX_FDEQ_BIN_0 +221 0x0202 //RX_FDEQ_BIN_1 +222 0x0301 //RX_FDEQ_BIN_2 +223 0x0404 //RX_FDEQ_BIN_3 +224 0x0406 //RX_FDEQ_BIN_4 +225 0x0109 //RX_FDEQ_BIN_5 +226 0x0708 //RX_FDEQ_BIN_6 +227 0x090A //RX_FDEQ_BIN_7 +228 0x0B0C //RX_FDEQ_BIN_8 +229 0x0D0E //RX_FDEQ_BIN_9 +230 0x1013 //RX_FDEQ_BIN_10 +231 0x1719 //RX_FDEQ_BIN_11 +232 0x1B0F //RX_FDEQ_BIN_12 +233 0x141E //RX_FDEQ_BIN_13 +234 0x3728 //RX_FDEQ_BIN_14 +235 0x282C //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x4000 //RX_FDEQ_RESRV_0 +245 0x0320 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0030 //RX_FDDRC_BAND_MARGIN_1 +248 0x0050 //RX_FDDRC_BAND_MARGIN_2 +249 0x0080 //RX_FDDRC_BAND_MARGIN_3 +250 0x0007 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x5000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x6400 //RX_FDDRC_THRD_3_2 +258 0x6400 //RX_FDDRC_THRD_3_3 +259 0x2000 //RX_FDDRC_SLANT_0_0 +260 0x2000 //RX_FDDRC_SLANT_0_1 +261 0x2000 //RX_FDDRC_SLANT_0_2 +262 0x2000 //RX_FDDRC_SLANT_0_3 +263 0x5333 //RX_FDDRC_SLANT_1_0 +264 0x5333 //RX_FDDRC_SLANT_1_1 +265 0x5333 //RX_FDDRC_SLANT_1_2 +266 0x5333 //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +286 0x000A //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 +#VOL 1 +163 0x1000 //RX_TDDRC_ALPHA_UP_1 +164 0x1000 //RX_TDDRC_ALPHA_UP_2 +165 0x1000 //RX_TDDRC_ALPHA_UP_3 +166 0x1000 //RX_TDDRC_ALPHA_UP_4 +184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +190 0x7000 //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +269 0x0001 //RX_TDDRC_THRD_0 +270 0x0002 //RX_TDDRC_THRD_1 +271 0x1800 //RX_TDDRC_THRD_2 +272 0x1800 //RX_TDDRC_THRD_3 +273 0x7FFF //RX_TDDRC_SLANT_0 +274 0x7FFF //RX_TDDRC_SLANT_1 +275 0x1000 //RX_TDDRC_ALPHA_UP_0 +276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x199A //RX_TDDRC_HMNC_GAIN +279 0x0001 //RX_TDDRC_SMT_FLAG +280 0x0CCD //RX_TDDRC_SMT_W +281 0x0551 //RX_TDDRC_DRC_GAIN +195 0x0020 //RX_FDEQ_SUBNUM +196 0x483E //RX_FDEQ_GAIN_0 +197 0x3E3E //RX_FDEQ_GAIN_1 +198 0x3E4C //RX_FDEQ_GAIN_2 +199 0x5064 //RX_FDEQ_GAIN_3 +200 0x7076 //RX_FDEQ_GAIN_4 +201 0x897A //RX_FDEQ_GAIN_5 +202 0x7C80 //RX_FDEQ_GAIN_6 +203 0x8888 //RX_FDEQ_GAIN_7 +204 0x949C //RX_FDEQ_GAIN_8 +205 0x96A4 //RX_FDEQ_GAIN_9 +206 0xA9A0 //RX_FDEQ_GAIN_10 +207 0x9487 //RX_FDEQ_GAIN_11 +208 0x6F64 //RX_FDEQ_GAIN_12 +209 0x625A //RX_FDEQ_GAIN_13 +210 0x5D80 //RX_FDEQ_GAIN_14 +211 0x8890 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0202 //RX_FDEQ_BIN_0 +221 0x0202 //RX_FDEQ_BIN_1 +222 0x0301 //RX_FDEQ_BIN_2 +223 0x0404 //RX_FDEQ_BIN_3 +224 0x0406 //RX_FDEQ_BIN_4 +225 0x0109 //RX_FDEQ_BIN_5 +226 0x0708 //RX_FDEQ_BIN_6 +227 0x090A //RX_FDEQ_BIN_7 +228 0x0B0C //RX_FDEQ_BIN_8 +229 0x0D0E //RX_FDEQ_BIN_9 +230 0x1013 //RX_FDEQ_BIN_10 +231 0x1719 //RX_FDEQ_BIN_11 +232 0x1B0F //RX_FDEQ_BIN_12 +233 0x141E //RX_FDEQ_BIN_13 +234 0x3728 //RX_FDEQ_BIN_14 +235 0x282C //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x4000 //RX_FDEQ_RESRV_0 +245 0x0320 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0030 //RX_FDDRC_BAND_MARGIN_1 +248 0x0050 //RX_FDDRC_BAND_MARGIN_2 +249 0x0080 //RX_FDDRC_BAND_MARGIN_3 +250 0x0007 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x5000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x6400 //RX_FDDRC_THRD_3_2 +258 0x6400 //RX_FDDRC_THRD_3_3 +259 0x2000 //RX_FDDRC_SLANT_0_0 +260 0x2000 //RX_FDDRC_SLANT_0_1 +261 0x2000 //RX_FDDRC_SLANT_0_2 +262 0x2000 //RX_FDDRC_SLANT_0_3 +263 0x5333 //RX_FDDRC_SLANT_1_0 +264 0x5333 //RX_FDDRC_SLANT_1_1 +265 0x5333 //RX_FDDRC_SLANT_1_2 +266 0x5333 //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +286 0x0010 //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 +#VOL 2 +163 0x1000 //RX_TDDRC_ALPHA_UP_1 +164 0x1000 //RX_TDDRC_ALPHA_UP_2 +165 0x1000 //RX_TDDRC_ALPHA_UP_3 +166 0x1000 //RX_TDDRC_ALPHA_UP_4 +184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +190 0x7000 //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +269 0x0001 //RX_TDDRC_THRD_0 +270 0x0002 //RX_TDDRC_THRD_1 +271 0x1800 //RX_TDDRC_THRD_2 +272 0x1800 //RX_TDDRC_THRD_3 +273 0x7FFF //RX_TDDRC_SLANT_0 +274 0x7FFF //RX_TDDRC_SLANT_1 +275 0x1000 //RX_TDDRC_ALPHA_UP_0 +276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x199A //RX_TDDRC_HMNC_GAIN +279 0x0001 //RX_TDDRC_SMT_FLAG +280 0x0CCD //RX_TDDRC_SMT_W +281 0x0551 //RX_TDDRC_DRC_GAIN +195 0x0020 //RX_FDEQ_SUBNUM +196 0x483E //RX_FDEQ_GAIN_0 +197 0x3E3E //RX_FDEQ_GAIN_1 +198 0x3E4C //RX_FDEQ_GAIN_2 +199 0x5064 //RX_FDEQ_GAIN_3 +200 0x7076 //RX_FDEQ_GAIN_4 +201 0x897A //RX_FDEQ_GAIN_5 +202 0x7C80 //RX_FDEQ_GAIN_6 +203 0x8888 //RX_FDEQ_GAIN_7 +204 0x949C //RX_FDEQ_GAIN_8 +205 0x96A4 //RX_FDEQ_GAIN_9 +206 0xA9A0 //RX_FDEQ_GAIN_10 +207 0x9487 //RX_FDEQ_GAIN_11 +208 0x6F64 //RX_FDEQ_GAIN_12 +209 0x625A //RX_FDEQ_GAIN_13 +210 0x5D80 //RX_FDEQ_GAIN_14 +211 0x8890 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0202 //RX_FDEQ_BIN_0 +221 0x0202 //RX_FDEQ_BIN_1 +222 0x0301 //RX_FDEQ_BIN_2 +223 0x0404 //RX_FDEQ_BIN_3 +224 0x0406 //RX_FDEQ_BIN_4 +225 0x0109 //RX_FDEQ_BIN_5 +226 0x0708 //RX_FDEQ_BIN_6 +227 0x090A //RX_FDEQ_BIN_7 +228 0x0B0C //RX_FDEQ_BIN_8 +229 0x0D0E //RX_FDEQ_BIN_9 +230 0x1013 //RX_FDEQ_BIN_10 +231 0x1719 //RX_FDEQ_BIN_11 +232 0x1B0F //RX_FDEQ_BIN_12 +233 0x141E //RX_FDEQ_BIN_13 +234 0x3728 //RX_FDEQ_BIN_14 +235 0x282C //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x4000 //RX_FDEQ_RESRV_0 +245 0x0320 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0030 //RX_FDDRC_BAND_MARGIN_1 +248 0x0050 //RX_FDDRC_BAND_MARGIN_2 +249 0x0080 //RX_FDDRC_BAND_MARGIN_3 +250 0x0007 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x5000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x6400 //RX_FDDRC_THRD_3_2 +258 0x6400 //RX_FDDRC_THRD_3_3 +259 0x2000 //RX_FDDRC_SLANT_0_0 +260 0x2000 //RX_FDDRC_SLANT_0_1 +261 0x2000 //RX_FDDRC_SLANT_0_2 +262 0x2000 //RX_FDDRC_SLANT_0_3 +263 0x5333 //RX_FDDRC_SLANT_1_0 +264 0x5333 //RX_FDDRC_SLANT_1_1 +265 0x5333 //RX_FDDRC_SLANT_1_2 +266 0x5333 //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +286 0x001B //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 +#VOL 3 +163 0x1000 //RX_TDDRC_ALPHA_UP_1 +164 0x1000 //RX_TDDRC_ALPHA_UP_2 +165 0x1000 //RX_TDDRC_ALPHA_UP_3 +166 0x1000 //RX_TDDRC_ALPHA_UP_4 +184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +190 0x7000 //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +269 0x0001 //RX_TDDRC_THRD_0 +270 0x0002 //RX_TDDRC_THRD_1 +271 0x1800 //RX_TDDRC_THRD_2 +272 0x1800 //RX_TDDRC_THRD_3 +273 0x7FFF //RX_TDDRC_SLANT_0 +274 0x7FFF //RX_TDDRC_SLANT_1 +275 0x1000 //RX_TDDRC_ALPHA_UP_0 +276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x199A //RX_TDDRC_HMNC_GAIN +279 0x0001 //RX_TDDRC_SMT_FLAG +280 0x0CCD //RX_TDDRC_SMT_W +281 0x0551 //RX_TDDRC_DRC_GAIN +195 0x0020 //RX_FDEQ_SUBNUM +196 0x483E //RX_FDEQ_GAIN_0 +197 0x3E3E //RX_FDEQ_GAIN_1 +198 0x3E4C //RX_FDEQ_GAIN_2 +199 0x5064 //RX_FDEQ_GAIN_3 +200 0x7076 //RX_FDEQ_GAIN_4 +201 0x897A //RX_FDEQ_GAIN_5 +202 0x7C80 //RX_FDEQ_GAIN_6 +203 0x8888 //RX_FDEQ_GAIN_7 +204 0x949C //RX_FDEQ_GAIN_8 +205 0x96A4 //RX_FDEQ_GAIN_9 +206 0xA9A0 //RX_FDEQ_GAIN_10 +207 0x9487 //RX_FDEQ_GAIN_11 +208 0x6F64 //RX_FDEQ_GAIN_12 +209 0x625A //RX_FDEQ_GAIN_13 +210 0x5D80 //RX_FDEQ_GAIN_14 +211 0x8890 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0202 //RX_FDEQ_BIN_0 +221 0x0202 //RX_FDEQ_BIN_1 +222 0x0301 //RX_FDEQ_BIN_2 +223 0x0404 //RX_FDEQ_BIN_3 +224 0x0406 //RX_FDEQ_BIN_4 +225 0x0109 //RX_FDEQ_BIN_5 +226 0x0708 //RX_FDEQ_BIN_6 +227 0x090A //RX_FDEQ_BIN_7 +228 0x0B0C //RX_FDEQ_BIN_8 +229 0x0D0E //RX_FDEQ_BIN_9 +230 0x1013 //RX_FDEQ_BIN_10 +231 0x1719 //RX_FDEQ_BIN_11 +232 0x1B0F //RX_FDEQ_BIN_12 +233 0x141E //RX_FDEQ_BIN_13 +234 0x3728 //RX_FDEQ_BIN_14 +235 0x282C //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x4000 //RX_FDEQ_RESRV_0 +245 0x0320 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0030 //RX_FDDRC_BAND_MARGIN_1 +248 0x0050 //RX_FDDRC_BAND_MARGIN_2 +249 0x0080 //RX_FDDRC_BAND_MARGIN_3 +250 0x0007 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x5000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x6400 //RX_FDDRC_THRD_3_2 +258 0x6400 //RX_FDDRC_THRD_3_3 +259 0x2000 //RX_FDDRC_SLANT_0_0 +260 0x2000 //RX_FDDRC_SLANT_0_1 +261 0x2000 //RX_FDDRC_SLANT_0_2 +262 0x2000 //RX_FDDRC_SLANT_0_3 +263 0x5333 //RX_FDDRC_SLANT_1_0 +264 0x5333 //RX_FDDRC_SLANT_1_1 +265 0x5333 //RX_FDDRC_SLANT_1_2 +266 0x5333 //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +286 0x0032 //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 +#VOL 4 +163 0x1000 //RX_TDDRC_ALPHA_UP_1 +164 0x1000 //RX_TDDRC_ALPHA_UP_2 +165 0x1000 //RX_TDDRC_ALPHA_UP_3 +166 0x1000 //RX_TDDRC_ALPHA_UP_4 +184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +190 0x7000 //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +269 0x0001 //RX_TDDRC_THRD_0 +270 0x0002 //RX_TDDRC_THRD_1 +271 0x1800 //RX_TDDRC_THRD_2 +272 0x1800 //RX_TDDRC_THRD_3 +273 0x7FFF //RX_TDDRC_SLANT_0 +274 0x7FFF //RX_TDDRC_SLANT_1 +275 0x1000 //RX_TDDRC_ALPHA_UP_0 +276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x199A //RX_TDDRC_HMNC_GAIN +279 0x0001 //RX_TDDRC_SMT_FLAG +280 0x0CCD //RX_TDDRC_SMT_W +281 0x0551 //RX_TDDRC_DRC_GAIN +195 0x0020 //RX_FDEQ_SUBNUM +196 0x483E //RX_FDEQ_GAIN_0 +197 0x3E3E //RX_FDEQ_GAIN_1 +198 0x3E4C //RX_FDEQ_GAIN_2 +199 0x5064 //RX_FDEQ_GAIN_3 +200 0x7076 //RX_FDEQ_GAIN_4 +201 0x897A //RX_FDEQ_GAIN_5 +202 0x7C80 //RX_FDEQ_GAIN_6 +203 0x8888 //RX_FDEQ_GAIN_7 +204 0x949C //RX_FDEQ_GAIN_8 +205 0x96A4 //RX_FDEQ_GAIN_9 +206 0xA9A0 //RX_FDEQ_GAIN_10 +207 0x9487 //RX_FDEQ_GAIN_11 +208 0x6F64 //RX_FDEQ_GAIN_12 +209 0x625A //RX_FDEQ_GAIN_13 +210 0x5D80 //RX_FDEQ_GAIN_14 +211 0x8890 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0202 //RX_FDEQ_BIN_0 +221 0x0202 //RX_FDEQ_BIN_1 +222 0x0301 //RX_FDEQ_BIN_2 +223 0x0404 //RX_FDEQ_BIN_3 +224 0x0406 //RX_FDEQ_BIN_4 +225 0x0109 //RX_FDEQ_BIN_5 +226 0x0708 //RX_FDEQ_BIN_6 +227 0x090A //RX_FDEQ_BIN_7 +228 0x0B0C //RX_FDEQ_BIN_8 +229 0x0D0E //RX_FDEQ_BIN_9 +230 0x1013 //RX_FDEQ_BIN_10 +231 0x1719 //RX_FDEQ_BIN_11 +232 0x1B0F //RX_FDEQ_BIN_12 +233 0x141E //RX_FDEQ_BIN_13 +234 0x3728 //RX_FDEQ_BIN_14 +235 0x282C //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x4000 //RX_FDEQ_RESRV_0 +245 0x0320 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0030 //RX_FDDRC_BAND_MARGIN_1 +248 0x0050 //RX_FDDRC_BAND_MARGIN_2 +249 0x0080 //RX_FDDRC_BAND_MARGIN_3 +250 0x0007 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x5000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x6400 //RX_FDDRC_THRD_3_2 +258 0x6400 //RX_FDDRC_THRD_3_3 +259 0x2000 //RX_FDDRC_SLANT_0_0 +260 0x2000 //RX_FDDRC_SLANT_0_1 +261 0x2000 //RX_FDDRC_SLANT_0_2 +262 0x2000 //RX_FDDRC_SLANT_0_3 +263 0x5333 //RX_FDDRC_SLANT_1_0 +264 0x5333 //RX_FDDRC_SLANT_1_1 +265 0x5333 //RX_FDDRC_SLANT_1_2 +266 0x5333 //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +286 0x0047 //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 +#VOL 5 +163 0x1000 //RX_TDDRC_ALPHA_UP_1 +164 0x1000 //RX_TDDRC_ALPHA_UP_2 +165 0x1000 //RX_TDDRC_ALPHA_UP_3 +166 0x1000 //RX_TDDRC_ALPHA_UP_4 +184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +190 0x7000 //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +269 0x0001 //RX_TDDRC_THRD_0 +270 0x0002 //RX_TDDRC_THRD_1 +271 0x1800 //RX_TDDRC_THRD_2 +272 0x1800 //RX_TDDRC_THRD_3 +273 0x7FFF //RX_TDDRC_SLANT_0 +274 0x7FFF //RX_TDDRC_SLANT_1 +275 0x1000 //RX_TDDRC_ALPHA_UP_0 +276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x199A //RX_TDDRC_HMNC_GAIN +279 0x0001 //RX_TDDRC_SMT_FLAG +280 0x0CCD //RX_TDDRC_SMT_W +281 0x0551 //RX_TDDRC_DRC_GAIN +195 0x0020 //RX_FDEQ_SUBNUM +196 0x483E //RX_FDEQ_GAIN_0 +197 0x3E3E //RX_FDEQ_GAIN_1 +198 0x3E4C //RX_FDEQ_GAIN_2 +199 0x5064 //RX_FDEQ_GAIN_3 +200 0x7076 //RX_FDEQ_GAIN_4 +201 0x897A //RX_FDEQ_GAIN_5 +202 0x7C80 //RX_FDEQ_GAIN_6 +203 0x8888 //RX_FDEQ_GAIN_7 +204 0x949C //RX_FDEQ_GAIN_8 +205 0x96A4 //RX_FDEQ_GAIN_9 +206 0xA9A0 //RX_FDEQ_GAIN_10 +207 0x9487 //RX_FDEQ_GAIN_11 +208 0x6F64 //RX_FDEQ_GAIN_12 +209 0x625A //RX_FDEQ_GAIN_13 +210 0x5D80 //RX_FDEQ_GAIN_14 +211 0x8890 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0202 //RX_FDEQ_BIN_0 +221 0x0202 //RX_FDEQ_BIN_1 +222 0x0301 //RX_FDEQ_BIN_2 +223 0x0404 //RX_FDEQ_BIN_3 +224 0x0406 //RX_FDEQ_BIN_4 +225 0x0109 //RX_FDEQ_BIN_5 +226 0x0708 //RX_FDEQ_BIN_6 +227 0x090A //RX_FDEQ_BIN_7 +228 0x0B0C //RX_FDEQ_BIN_8 +229 0x0D0E //RX_FDEQ_BIN_9 +230 0x1013 //RX_FDEQ_BIN_10 +231 0x1719 //RX_FDEQ_BIN_11 +232 0x1B0F //RX_FDEQ_BIN_12 +233 0x141E //RX_FDEQ_BIN_13 +234 0x3728 //RX_FDEQ_BIN_14 +235 0x282C //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x4000 //RX_FDEQ_RESRV_0 +245 0x0320 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0030 //RX_FDDRC_BAND_MARGIN_1 +248 0x0050 //RX_FDDRC_BAND_MARGIN_2 +249 0x0080 //RX_FDDRC_BAND_MARGIN_3 +250 0x0007 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x5000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x6400 //RX_FDDRC_THRD_3_2 +258 0x6400 //RX_FDDRC_THRD_3_3 +259 0x2000 //RX_FDDRC_SLANT_0_0 +260 0x2000 //RX_FDDRC_SLANT_0_1 +261 0x2000 //RX_FDDRC_SLANT_0_2 +262 0x2000 //RX_FDDRC_SLANT_0_3 +263 0x5333 //RX_FDDRC_SLANT_1_0 +264 0x5333 //RX_FDDRC_SLANT_1_1 +265 0x5333 //RX_FDDRC_SLANT_1_2 +266 0x5333 //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +286 0x0076 //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 +#VOL 6 +163 0x1000 //RX_TDDRC_ALPHA_UP_1 +164 0x1000 //RX_TDDRC_ALPHA_UP_2 +165 0x1000 //RX_TDDRC_ALPHA_UP_3 +166 0x1000 //RX_TDDRC_ALPHA_UP_4 +184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +190 0x7000 //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +269 0x0001 //RX_TDDRC_THRD_0 +270 0x0002 //RX_TDDRC_THRD_1 +271 0x1800 //RX_TDDRC_THRD_2 +272 0x1800 //RX_TDDRC_THRD_3 +273 0x7FFF //RX_TDDRC_SLANT_0 +274 0x7FFF //RX_TDDRC_SLANT_1 +275 0x1000 //RX_TDDRC_ALPHA_UP_0 +276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x199A //RX_TDDRC_HMNC_GAIN +279 0x0001 //RX_TDDRC_SMT_FLAG +280 0x0CCD //RX_TDDRC_SMT_W +281 0x0551 //RX_TDDRC_DRC_GAIN +195 0x0020 //RX_FDEQ_SUBNUM +196 0x483E //RX_FDEQ_GAIN_0 +197 0x3E3E //RX_FDEQ_GAIN_1 +198 0x3E4C //RX_FDEQ_GAIN_2 +199 0x5064 //RX_FDEQ_GAIN_3 +200 0x7076 //RX_FDEQ_GAIN_4 +201 0x897A //RX_FDEQ_GAIN_5 +202 0x7C80 //RX_FDEQ_GAIN_6 +203 0x8888 //RX_FDEQ_GAIN_7 +204 0x949C //RX_FDEQ_GAIN_8 +205 0x96A4 //RX_FDEQ_GAIN_9 +206 0xA9A0 //RX_FDEQ_GAIN_10 +207 0x9487 //RX_FDEQ_GAIN_11 +208 0x6F64 //RX_FDEQ_GAIN_12 +209 0x625A //RX_FDEQ_GAIN_13 +210 0x5D80 //RX_FDEQ_GAIN_14 +211 0x8890 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0202 //RX_FDEQ_BIN_0 +221 0x0202 //RX_FDEQ_BIN_1 +222 0x0301 //RX_FDEQ_BIN_2 +223 0x0404 //RX_FDEQ_BIN_3 +224 0x0406 //RX_FDEQ_BIN_4 +225 0x0109 //RX_FDEQ_BIN_5 +226 0x0708 //RX_FDEQ_BIN_6 +227 0x090A //RX_FDEQ_BIN_7 +228 0x0B0C //RX_FDEQ_BIN_8 +229 0x0D0E //RX_FDEQ_BIN_9 +230 0x1013 //RX_FDEQ_BIN_10 +231 0x1719 //RX_FDEQ_BIN_11 +232 0x1B0F //RX_FDEQ_BIN_12 +233 0x141E //RX_FDEQ_BIN_13 +234 0x3728 //RX_FDEQ_BIN_14 +235 0x282C //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x4000 //RX_FDEQ_RESRV_0 +245 0x0320 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0030 //RX_FDDRC_BAND_MARGIN_1 +248 0x0050 //RX_FDDRC_BAND_MARGIN_2 +249 0x0080 //RX_FDDRC_BAND_MARGIN_3 +250 0x0007 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x5000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x6400 //RX_FDDRC_THRD_3_2 +258 0x6400 //RX_FDDRC_THRD_3_3 +259 0x2000 //RX_FDDRC_SLANT_0_0 +260 0x2000 //RX_FDDRC_SLANT_0_1 +261 0x2000 //RX_FDDRC_SLANT_0_2 +262 0x2000 //RX_FDDRC_SLANT_0_3 +263 0x5333 //RX_FDDRC_SLANT_1_0 +264 0x5333 //RX_FDDRC_SLANT_1_1 +265 0x5333 //RX_FDDRC_SLANT_1_2 +266 0x5333 //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +286 0x0100 //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 -#CASE_NAME HANDSET-HANDSET_HAC-VOICE_GENERIC-FB -#PARAM_TYPE TX+RX -#TOTAL_CUSTOM_STEP 7 +#CASE_NAME HANDSET-HANDSET-VOICE_GENERIC-FB +#PARAM_MODE FULL +#PARAM_TYPE TX+2RX +#TOTAL_CUSTOM_STEP 7+7 #TX 0 0x0000 //TX_OPERATION_MODE_0 1 0x0000 //TX_OPERATION_MODE_1 @@ -17558,7 +16049,7 @@ 18 0x0000 //TX_SYS_RESRV_2 19 0x0000 //TX_SYS_RESRV_3 20 0x0000 //TX_DIST2REF0 -21 0x009D //TX_DIST2REF1 +21 0x00A3 //TX_DIST2REF1 22 0x0000 //TX_DIST2REF_02 23 0x0000 //TX_DIST2REF_03 24 0x0000 //TX_DIST2REF_04 @@ -17788,12 +16279,12 @@ 248 0xF800 //TX_THR_SN_EST_6 249 0xF700 //TX_THR_SN_EST_7 250 0x0000 //TX_DELTA_THR_SN_EST_0 -251 0x0100 //TX_DELTA_THR_SN_EST_1 +251 0x0200 //TX_DELTA_THR_SN_EST_1 252 0x0200 //TX_DELTA_THR_SN_EST_2 253 0x0200 //TX_DELTA_THR_SN_EST_3 -254 0x0200 //TX_DELTA_THR_SN_EST_4 -255 0x0100 //TX_DELTA_THR_SN_EST_5 -256 0x0200 //TX_DELTA_THR_SN_EST_6 +254 0x0100 //TX_DELTA_THR_SN_EST_4 +255 0x0200 //TX_DELTA_THR_SN_EST_5 +256 0x0100 //TX_DELTA_THR_SN_EST_6 257 0x0200 //TX_DELTA_THR_SN_EST_7 258 0x4000 //TX_LAMBDA_NN_EST_0 259 0x4000 //TX_LAMBDA_NN_EST_1 @@ -17821,16 +16312,16 @@ 281 0x0014 //TX_NS_LVL_CTRL_0 282 0x0016 //TX_NS_LVL_CTRL_1 283 0x0016 //TX_NS_LVL_CTRL_2 -284 0x0016 //TX_NS_LVL_CTRL_3 -285 0x0018 //TX_NS_LVL_CTRL_4 -286 0x0016 //TX_NS_LVL_CTRL_5 -287 0x0012 //TX_NS_LVL_CTRL_6 +284 0x0018 //TX_NS_LVL_CTRL_3 +285 0x0016 //TX_NS_LVL_CTRL_4 +286 0x0012 //TX_NS_LVL_CTRL_5 +287 0x0016 //TX_NS_LVL_CTRL_6 288 0x0017 //TX_NS_LVL_CTRL_7 289 0x000E //TX_MIN_GAIN_S_0 -290 0x0012 //TX_MIN_GAIN_S_1 -291 0x0007 //TX_MIN_GAIN_S_2 -292 0x0012 //TX_MIN_GAIN_S_3 -293 0x0010 //TX_MIN_GAIN_S_4 +290 0x0007 //TX_MIN_GAIN_S_1 +291 0x0012 //TX_MIN_GAIN_S_2 +292 0x0010 //TX_MIN_GAIN_S_3 +293 0x0012 //TX_MIN_GAIN_S_4 294 0x0012 //TX_MIN_GAIN_S_5 295 0x0012 //TX_MIN_GAIN_S_6 296 0x0012 //TX_MIN_GAIN_S_7 @@ -17852,29 +16343,29 @@ 312 0x7FFF //TX_A_POST_FILT_0 313 0x2000 //TX_A_POST_FILT_1 314 0x4000 //TX_A_POST_FILT_S_0 -315 0x5000 //TX_A_POST_FILT_S_1 +315 0x4000 //TX_A_POST_FILT_S_1 316 0x4000 //TX_A_POST_FILT_S_2 317 0x4000 //TX_A_POST_FILT_S_3 318 0x4000 //TX_A_POST_FILT_S_4 319 0x4000 //TX_A_POST_FILT_S_5 -320 0x4000 //TX_A_POST_FILT_S_6 +320 0x5000 //TX_A_POST_FILT_S_6 321 0x7000 //TX_A_POST_FILT_S_7 322 0x1000 //TX_B_POST_FILT_0 323 0x2000 //TX_B_POST_FILT_1 -324 0x3000 //TX_B_POST_FILT_2 +324 0x2000 //TX_B_POST_FILT_2 325 0x2000 //TX_B_POST_FILT_3 -326 0x5000 //TX_B_POST_FILT_4 +326 0x2000 //TX_B_POST_FILT_4 327 0x2000 //TX_B_POST_FILT_5 -328 0x6000 //TX_B_POST_FILT_6 +328 0x3000 //TX_B_POST_FILT_6 329 0x3000 //TX_B_POST_FILT_7 330 0x1000 //TX_B_LESSCUT_RTO_S_0 -331 0x6000 //TX_B_LESSCUT_RTO_S_1 -332 0x6000 //TX_B_LESSCUT_RTO_S_2 -333 0x6000 //TX_B_LESSCUT_RTO_S_3 -334 0x6000 //TX_B_LESSCUT_RTO_S_4 -335 0x6000 //TX_B_LESSCUT_RTO_S_5 -336 0x7FFF //TX_B_LESSCUT_RTO_S_6 -337 0x7FFF //TX_B_LESSCUT_RTO_S_7 +331 0x1000 //TX_B_LESSCUT_RTO_S_1 +332 0x1000 //TX_B_LESSCUT_RTO_S_2 +333 0x1000 //TX_B_LESSCUT_RTO_S_3 +334 0x1000 //TX_B_LESSCUT_RTO_S_4 +335 0x1000 //TX_B_LESSCUT_RTO_S_5 +336 0x1000 //TX_B_LESSCUT_RTO_S_6 +337 0x1000 //TX_B_LESSCUT_RTO_S_7 338 0x7E14 //TX_LAMBDA_PFILT 339 0x7C29 //TX_LAMBDA_PFILT_S_0 340 0x7C29 //TX_LAMBDA_PFILT_S_1 @@ -17917,10 +16408,10 @@ 377 0x4E20 //TX_NOISE_TH_5_4 378 0x39DF //TX_NOISE_TH_6 379 0x0014 //TX_MINENOISE_TH -380 0x4000 //TX_MINENOISE_MIC0_TH_MTS -381 0xFFEE //TX_MINENOISE_MIC0_TH_EXP -382 0x6000 //TX_MINENOISE_MIC0_S_TH_MTS -383 0xFFF3 //TX_MINENOISE_MIC0_S_TH_EXP +380 0xD508 //TX_MORENS_TFMASK_TH +381 0x0001 //TX_DRC_QUIET_FLOOR +382 0x6D60 //TX_RATIODTL_CUT_TH +383 0x1482 //TX_DT_CUT_K1 384 0x00A5 //TX_OUT_ENER_S_TH_CLEAN 385 0x00A5 //TX_OUT_ENER_S_TH_LESSCLEAN 386 0x00A5 //TX_OUT_ENER_S_TH_NOISY @@ -17928,15 +16419,15 @@ 388 0x0200 //TX_OUT_ENER_TH_SPEECH 389 0x2000 //TX_SN_NPB_GAIN 390 0x0000 //TX_NN_NPB_GAIN -391 0x0000 //TX_CSX_ALPHA_0 -392 0x0000 //TX_CSX_ALPHA_1 -393 0x0000 //TX_CSX_ALPHA_2 -394 0x0000 //TX_CSX_ALPHA_3 -395 0x0800 //TX_MU_ARSP_EST -396 0x00C8 //TX_P_OUTBEAM_MIN_TH +391 0x3000 //TX_POST_MASK_SUP_HSNE +392 0x07D0 //TX_TAIL_DET_TH +393 0x4000 //TX_B_LESSCUT_RTO_WTA +394 0x0000 //TX_MEL_G_R +395 0x0080 //TX_SUPHIGH_TH +396 0x0000 //TX_MASK_G_R 397 0x0002 //TX_EXTRA_NS_L -398 0x0800 //TX_EXTRA_NS_A -399 0x0005 //TX_VR_NOISE_FLOOR_TH +398 0x1800 //TX_C_POST_FLT_MASK +399 0x7FFF //TX_A_POST_FLT_WNS 400 0x0148 //TX_MIN_G_LOW300HZ 401 0x0004 //TX_MAXLEVEL_CNG 402 0x00B4 //TX_STN_NOISE_TH @@ -18051,16 +16542,16 @@ 511 0x6666 //TX_MIC_TO_BFGAIN 512 0x0000 //TX_MICTOBFGAIN0 513 0x0000 //TX_FASTMUE_TH -514 0x0000 //TX_DERVB_LEN_0 -515 0x0000 //TX_DERVB_LEN_1 -516 0x0000 //TX_RHO_DERVB -517 0x0000 //TX_MIC_INDX_DERVB -518 0x0000 //TX_MU_DERVB -519 0x0000 //TX_DR_RESRV_0 -520 0x0000 //TX_DR_RESRV_1 -521 0x0000 //TX_DR_RESRV_2 -522 0x0000 //TX_DR_RESRV_3 -523 0x0000 //TX_DR_RESRV_4 +514 0x2CCC //TX_DEREVERB_LF_MU +515 0x3200 //TX_DEREVERB_HF_MU +516 0x0007 //TX_DEREVERB_DELAY +517 0x0004 //TX_DEREVERB_COEF_LEN +518 0x0003 //TX_DEREVERB_DNR +519 0x0000 //TX_DEREVERB_ALPHA +520 0x0000 //TX_DEREVERB_BETA +521 0x7FFF //TX_GSC_RTOL_TH +522 0x7FFF //TX_GSC_RTOH_TH +523 0x7E2C //TX_WIDE2_MEANHTH 524 0x0000 //TX_DR_RESRV_5 525 0x0000 //TX_DR_RESRV_6 526 0x0000 //TX_DR_RESRV_7 @@ -18104,24 +16595,24 @@ 564 0x0000 //TX_PB_RESRV_0 565 0x0000 //TX_PB_RESRV_1 566 0x0030 //TX_FDEQ_SUBNUM -567 0x504A //TX_FDEQ_GAIN_0 -568 0x4C54 //TX_FDEQ_GAIN_1 -569 0x554B //TX_FDEQ_GAIN_2 -570 0x4D4E //TX_FDEQ_GAIN_3 -571 0x4F4F //TX_FDEQ_GAIN_4 -572 0x4E51 //TX_FDEQ_GAIN_5 -573 0x5154 //TX_FDEQ_GAIN_6 -574 0x5456 //TX_FDEQ_GAIN_7 -575 0x5E66 //TX_FDEQ_GAIN_8 -576 0x675D //TX_FDEQ_GAIN_9 -577 0x5655 //TX_FDEQ_GAIN_10 -578 0x5956 //TX_FDEQ_GAIN_11 -579 0x5656 //TX_FDEQ_GAIN_12 -580 0x5953 //TX_FDEQ_GAIN_13 -581 0x575A //TX_FDEQ_GAIN_14 -582 0x5559 //TX_FDEQ_GAIN_15 -583 0x656E //TX_FDEQ_GAIN_16 -584 0x7B98 //TX_FDEQ_GAIN_17 +567 0x4C4A //TX_FDEQ_GAIN_0 +568 0x4B4F //TX_FDEQ_GAIN_1 +569 0x504B //TX_FDEQ_GAIN_2 +570 0x4A4C //TX_FDEQ_GAIN_3 +571 0x4A49 //TX_FDEQ_GAIN_4 +572 0x4F48 //TX_FDEQ_GAIN_5 +573 0x4A4E //TX_FDEQ_GAIN_6 +574 0x534E //TX_FDEQ_GAIN_7 +575 0x494F //TX_FDEQ_GAIN_8 +576 0x5E6E //TX_FDEQ_GAIN_9 +577 0x787A //TX_FDEQ_GAIN_10 +578 0x6A58 //TX_FDEQ_GAIN_11 +579 0x5051 //TX_FDEQ_GAIN_12 +580 0x5156 //TX_FDEQ_GAIN_13 +581 0x6168 //TX_FDEQ_GAIN_14 +582 0x7678 //TX_FDEQ_GAIN_15 +583 0x7A87 //TX_FDEQ_GAIN_16 +584 0x9898 //TX_FDEQ_GAIN_17 585 0x9898 //TX_FDEQ_GAIN_18 586 0x9848 //TX_FDEQ_GAIN_19 587 0x4848 //TX_FDEQ_GAIN_20 @@ -18160,15 +16651,15 @@ 620 0x4848 //TX_PREEQ_GAIN_MIC0_3 621 0x4848 //TX_PREEQ_GAIN_MIC0_4 622 0x4848 //TX_PREEQ_GAIN_MIC0_5 -623 0x4846 //TX_PREEQ_GAIN_MIC0_6 -624 0x4645 //TX_PREEQ_GAIN_MIC0_7 -625 0x4545 //TX_PREEQ_GAIN_MIC0_8 -626 0x4545 //TX_PREEQ_GAIN_MIC0_9 -627 0x4444 //TX_PREEQ_GAIN_MIC0_10 -628 0x4443 //TX_PREEQ_GAIN_MIC0_11 -629 0x4241 //TX_PREEQ_GAIN_MIC0_12 -630 0x3C3E //TX_PREEQ_GAIN_MIC0_13 -631 0x3E40 //TX_PREEQ_GAIN_MIC0_14 +623 0x4848 //TX_PREEQ_GAIN_MIC0_6 +624 0x4848 //TX_PREEQ_GAIN_MIC0_7 +625 0x4848 //TX_PREEQ_GAIN_MIC0_8 +626 0x4848 //TX_PREEQ_GAIN_MIC0_9 +627 0x4848 //TX_PREEQ_GAIN_MIC0_10 +628 0x4848 //TX_PREEQ_GAIN_MIC0_11 +629 0x4848 //TX_PREEQ_GAIN_MIC0_12 +630 0x4848 //TX_PREEQ_GAIN_MIC0_13 +631 0x4848 //TX_PREEQ_GAIN_MIC0_14 632 0x4848 //TX_PREEQ_GAIN_MIC0_15 633 0x4848 //TX_PREEQ_GAIN_MIC0_16 634 0x4848 //TX_PREEQ_GAIN_MIC0_17 @@ -18178,23 +16669,23 @@ 638 0x4848 //TX_PREEQ_GAIN_MIC0_21 639 0x4848 //TX_PREEQ_GAIN_MIC0_22 640 0x4848 //TX_PREEQ_GAIN_MIC0_23 -641 0x0202 //TX_PREEQ_BIN_MIC0_0 -642 0x0203 //TX_PREEQ_BIN_MIC0_1 -643 0x0303 //TX_PREEQ_BIN_MIC0_2 -644 0x0304 //TX_PREEQ_BIN_MIC0_3 -645 0x0405 //TX_PREEQ_BIN_MIC0_4 -646 0x0506 //TX_PREEQ_BIN_MIC0_5 -647 0x0808 //TX_PREEQ_BIN_MIC0_6 -648 0x0809 //TX_PREEQ_BIN_MIC0_7 -649 0x0A0A //TX_PREEQ_BIN_MIC0_8 -650 0x0C10 //TX_PREEQ_BIN_MIC0_9 -651 0x1013 //TX_PREEQ_BIN_MIC0_10 -652 0x1414 //TX_PREEQ_BIN_MIC0_11 -653 0x261E //TX_PREEQ_BIN_MIC0_12 -654 0x1E14 //TX_PREEQ_BIN_MIC0_13 -655 0x1414 //TX_PREEQ_BIN_MIC0_14 -656 0x2814 //TX_PREEQ_BIN_MIC0_15 -657 0x4000 //TX_PREEQ_BIN_MIC0_16 +641 0x1812 //TX_PREEQ_BIN_MIC0_0 +642 0x0A0A //TX_PREEQ_BIN_MIC0_1 +643 0x0808 //TX_PREEQ_BIN_MIC0_2 +644 0x080A //TX_PREEQ_BIN_MIC0_3 +645 0x0B09 //TX_PREEQ_BIN_MIC0_4 +646 0x0A06 //TX_PREEQ_BIN_MIC0_5 +647 0x0606 //TX_PREEQ_BIN_MIC0_6 +648 0x0605 //TX_PREEQ_BIN_MIC0_7 +649 0x050A //TX_PREEQ_BIN_MIC0_8 +650 0x1505 //TX_PREEQ_BIN_MIC0_9 +651 0x0506 //TX_PREEQ_BIN_MIC0_10 +652 0x0615 //TX_PREEQ_BIN_MIC0_11 +653 0x1516 //TX_PREEQ_BIN_MIC0_12 +654 0x2021 //TX_PREEQ_BIN_MIC0_13 +655 0x2021 //TX_PREEQ_BIN_MIC0_14 +656 0x2021 //TX_PREEQ_BIN_MIC0_15 +657 0x0800 //TX_PREEQ_BIN_MIC0_16 658 0x0000 //TX_PREEQ_BIN_MIC0_17 659 0x0000 //TX_PREEQ_BIN_MIC0_18 660 0x0000 //TX_PREEQ_BIN_MIC0_19 @@ -18209,17 +16700,17 @@ 669 0x4848 //TX_PREEQ_GAIN_MIC1_3 670 0x4848 //TX_PREEQ_GAIN_MIC1_4 671 0x4848 //TX_PREEQ_GAIN_MIC1_5 -672 0x4849 //TX_PREEQ_GAIN_MIC1_6 -673 0x4A4B //TX_PREEQ_GAIN_MIC1_7 -674 0x4C4B //TX_PREEQ_GAIN_MIC1_8 -675 0x4A48 //TX_PREEQ_GAIN_MIC1_9 -676 0x4B4C //TX_PREEQ_GAIN_MIC1_10 -677 0x4C4B //TX_PREEQ_GAIN_MIC1_11 -678 0x4838 //TX_PREEQ_GAIN_MIC1_12 -679 0x3858 //TX_PREEQ_GAIN_MIC1_13 -680 0x7060 //TX_PREEQ_GAIN_MIC1_14 -681 0x9870 //TX_PREEQ_GAIN_MIC1_15 -682 0x5848 //TX_PREEQ_GAIN_MIC1_16 +672 0x4A4C //TX_PREEQ_GAIN_MIC1_6 +673 0x4E50 //TX_PREEQ_GAIN_MIC1_7 +674 0x5456 //TX_PREEQ_GAIN_MIC1_8 +675 0x585C //TX_PREEQ_GAIN_MIC1_9 +676 0x5C64 //TX_PREEQ_GAIN_MIC1_10 +677 0x7478 //TX_PREEQ_GAIN_MIC1_11 +678 0x705C //TX_PREEQ_GAIN_MIC1_12 +679 0x4838 //TX_PREEQ_GAIN_MIC1_13 +680 0x3C70 //TX_PREEQ_GAIN_MIC1_14 +681 0x4848 //TX_PREEQ_GAIN_MIC1_15 +682 0x4848 //TX_PREEQ_GAIN_MIC1_16 683 0x4848 //TX_PREEQ_GAIN_MIC1_17 684 0x4848 //TX_PREEQ_GAIN_MIC1_18 685 0x4848 //TX_PREEQ_GAIN_MIC1_19 @@ -18233,17 +16724,17 @@ 693 0x0304 //TX_PREEQ_BIN_MIC1_3 694 0x0405 //TX_PREEQ_BIN_MIC1_4 695 0x0506 //TX_PREEQ_BIN_MIC1_5 -696 0x0808 //TX_PREEQ_BIN_MIC1_6 -697 0x0809 //TX_PREEQ_BIN_MIC1_7 -698 0x0A0A //TX_PREEQ_BIN_MIC1_8 +696 0x0708 //TX_PREEQ_BIN_MIC1_6 +697 0x0909 //TX_PREEQ_BIN_MIC1_7 +698 0x090B //TX_PREEQ_BIN_MIC1_8 699 0x0C10 //TX_PREEQ_BIN_MIC1_9 700 0x1013 //TX_PREEQ_BIN_MIC1_10 701 0x1414 //TX_PREEQ_BIN_MIC1_11 -702 0x261E //TX_PREEQ_BIN_MIC1_12 -703 0x1E14 //TX_PREEQ_BIN_MIC1_13 -704 0x1414 //TX_PREEQ_BIN_MIC1_14 -705 0x2814 //TX_PREEQ_BIN_MIC1_15 -706 0x4000 //TX_PREEQ_BIN_MIC1_16 +702 0x1414 //TX_PREEQ_BIN_MIC1_12 +703 0x1C1E //TX_PREEQ_BIN_MIC1_13 +704 0x1E28 //TX_PREEQ_BIN_MIC1_14 +705 0x462C //TX_PREEQ_BIN_MIC1_15 +706 0x0000 //TX_PREEQ_BIN_MIC1_16 707 0x0000 //TX_PREEQ_BIN_MIC1_17 708 0x0000 //TX_PREEQ_BIN_MIC1_18 709 0x0000 //TX_PREEQ_BIN_MIC1_19 @@ -18276,23 +16767,23 @@ 736 0x4848 //TX_PREEQ_GAIN_MIC2_21 737 0x4848 //TX_PREEQ_GAIN_MIC2_22 738 0x4848 //TX_PREEQ_GAIN_MIC2_23 -739 0x0202 //TX_PREEQ_BIN_MIC2_0 -740 0x0203 //TX_PREEQ_BIN_MIC2_1 -741 0x0303 //TX_PREEQ_BIN_MIC2_2 -742 0x0304 //TX_PREEQ_BIN_MIC2_3 -743 0x0405 //TX_PREEQ_BIN_MIC2_4 -744 0x0506 //TX_PREEQ_BIN_MIC2_5 -745 0x0808 //TX_PREEQ_BIN_MIC2_6 -746 0x0809 //TX_PREEQ_BIN_MIC2_7 -747 0x0A0A //TX_PREEQ_BIN_MIC2_8 -748 0x0C10 //TX_PREEQ_BIN_MIC2_9 -749 0x1013 //TX_PREEQ_BIN_MIC2_10 -750 0x1414 //TX_PREEQ_BIN_MIC2_11 -751 0x261E //TX_PREEQ_BIN_MIC2_12 -752 0x1E14 //TX_PREEQ_BIN_MIC2_13 -753 0x1414 //TX_PREEQ_BIN_MIC2_14 -754 0x2814 //TX_PREEQ_BIN_MIC2_15 -755 0x4000 //TX_PREEQ_BIN_MIC2_16 +739 0x0E10 //TX_PREEQ_BIN_MIC2_0 +740 0x1010 //TX_PREEQ_BIN_MIC2_1 +741 0x1010 //TX_PREEQ_BIN_MIC2_2 +742 0x1010 //TX_PREEQ_BIN_MIC2_3 +743 0x1010 //TX_PREEQ_BIN_MIC2_4 +744 0x1010 //TX_PREEQ_BIN_MIC2_5 +745 0x1010 //TX_PREEQ_BIN_MIC2_6 +746 0x1010 //TX_PREEQ_BIN_MIC2_7 +747 0x1010 //TX_PREEQ_BIN_MIC2_8 +748 0x1010 //TX_PREEQ_BIN_MIC2_9 +749 0x1010 //TX_PREEQ_BIN_MIC2_10 +750 0x1010 //TX_PREEQ_BIN_MIC2_11 +751 0x1010 //TX_PREEQ_BIN_MIC2_12 +752 0x1010 //TX_PREEQ_BIN_MIC2_13 +753 0x1010 //TX_PREEQ_BIN_MIC2_14 +754 0x0200 //TX_PREEQ_BIN_MIC2_15 +755 0x0000 //TX_PREEQ_BIN_MIC2_16 756 0x0000 //TX_PREEQ_BIN_MIC2_17 757 0x0000 //TX_PREEQ_BIN_MIC2_18 758 0x0000 //TX_PREEQ_BIN_MIC2_19 @@ -18403,7 +16894,7 @@ 863 0x199A //TX_TDDRC_HMNC_GAIN 864 0x0000 //TX_TDDRC_SMT_FLAG 865 0x0CCD //TX_TDDRC_SMT_W -866 0x05F5 //TX_TDDRC_DRC_GAIN +866 0x0504 //TX_TDDRC_DRC_GAIN 867 0x7FFF //TX_TDDRC_LMT_THRD 868 0x0000 //TX_TDDRC_LMT_ALPHA 869 0x0000 //TX_TFMASKLTH @@ -18434,8 +16925,73 @@ 894 0xC000 //TX_FASTNS_SSA_THHFL 895 0xCCCC //TX_FASTNS_SSA_THLFH 896 0xD999 //TX_FASTNS_SSA_THHFH +897 0x2339 //TX_SENDFUNC_REG_MICMUTE +898 0x0021 //TX_SENDFUNC_REG_MICMUTE1 +899 0x02BC //TX_MICMUTE_RATIO_THR +900 0x0140 //TX_MICMUTE_AMP_THR +901 0x0004 //TX_MICMUTE_HPF_IND +902 0x00C0 //TX_MICMUTE_LOG_EYR_TH +903 0x0008 //TX_MICMUTE_CVG_TIME +904 0x0008 //TX_MICMUTE_RELEASE_TIME +905 0x01FE //TX_MIC_VOLUME_MIC0MUTE +906 0x0020 //TX_MICMUTE_EPD_OFFSET_0 +907 0x001E //TX_MICMUTE_FRQ_AEC_L +908 0x7999 //TX_MICMUTE_EAD_THR +909 0x7FFF //TX_MICMUTE_LAMBDA_CB_NLE +910 0x7FFF //TX_MICMUTE_LAMBDA_RE_EST +911 0x4000 //TX_DTD_THR1_MICMUTE_0 +912 0x7000 //TX_DTD_THR1_MICMUTE_1 +913 0x7FFF //TX_DTD_THR1_MICMUTE_2 +914 0x7FFF //TX_DTD_THR1_MICMUTE_3 +915 0x6CCC //TX_DTD_THR2_MICMUTE_0 +916 0x0400 //TX_MICMUTE_MIN_EQ_RE_EST_0 +917 0x0400 //TX_MICMUTE_MIN_EQ_RE_EST_1 +918 0x1000 //TX_MICMUTE_MIN_EQ_RE_EST_2 +919 0x7FFF //TX_MICMUTE_MIN_EQ_RE_EST_3 +920 0x7FFF //TX_MICMUTE_MIN_EQ_RE_EST_4 +921 0x4000 //TX_MICMUTE_C_POST_FLT +922 0x03E8 //TX_MICMUTE_DT_CUT_K +923 0x0001 //TX_MICMUTE_DT_CUT_THR +924 0x03E8 //TX_MICMUTE_DT_CUT_K2 +925 0x0001 //TX_MICMUTE_DT_CUT_THR2 +926 0x0064 //TX_MICMUTE_DT2_HOLD_N +927 0x1000 //TX_MICMUTE_RATIODTH_THCUT +928 0x1000 //TX_MICMUTE_B_POST_FLT_ECHOL +929 0x7FFF //TX_MICMUTE_B_POST_FLT_ECHOH +930 0x0400 //TX_MICMUTE_C_POST_FLT_MASK +931 0x7999 //TX_MICMUTE_RATIODTL_CUT_TH +932 0x0258 //TX_MICMUTE_DT_CUT_K1 +933 0x0800 //TX_MICMUTE_N2_SN_EST +934 0xFC00 //TX_MICMUTE_THR_SN_EST_0 +935 0x001C //TX_MICMUTE_MIN_G_CTRL_0 +936 0x6000 //TX_MICMUTE_A_POST_FILT_S_0 +937 0x7000 //TX_MICMUTE_B_POST_FILT_0 +938 0x2710 //TX_MIC1RUB_AMP_THR +939 0x0010 //TX_MIC1MUTE_RATIO_THR +940 0x0450 //TX_MIC1MUTE_AMP_THR +941 0x0008 //TX_MIC1MUTE_CVG_TIME +942 0x0008 //TX_MIC1MUTE_RELEASE_TIME +943 0x0000 //TX_AMS_RESRV_01 +944 0x0000 //TX_AMS_RESRV_02 +945 0x0000 //TX_AMS_RESRV_03 +946 0x0000 //TX_AMS_RESRV_04 +947 0x0000 //TX_AMS_RESRV_05 +948 0x0000 //TX_AMS_RESRV_06 +949 0x0000 //TX_AMS_RESRV_07 +950 0x0000 //TX_AMS_RESRV_08 +951 0x0000 //TX_AMS_RESRV_09 +952 0x0000 //TX_AMS_RESRV_10 +953 0x0000 //TX_AMS_RESRV_11 +954 0x0000 //TX_AMS_RESRV_12 +955 0x0000 //TX_AMS_RESRV_13 +956 0x0000 //TX_AMS_RESRV_14 +957 0x0000 //TX_AMS_RESRV_15 +958 0x0000 //TX_AMS_RESRV_16 +959 0x0000 //TX_AMS_RESRV_17 +960 0x0000 //TX_AMS_RESRV_18 +961 0x0000 //TX_AMS_RESRV_19 #RX -0 0x000C //RX_RECVFUNC_MODE_0 +0 0x202C //RX_RECVFUNC_MODE_0 1 0x0000 //RX_RECVFUNC_MODE_1 2 0x0004 //RX_SAMPLINGFREQ_SIG 3 0x0004 //RX_SAMPLINGFREQ_PROC @@ -18445,7 +17001,7 @@ 7 0x1000 //RX_TDDRC_ALPHA_UP_2 8 0x1000 //RX_TDDRC_ALPHA_UP_3 9 0x1000 //RX_TDDRC_ALPHA_UP_4 -10 0x0800 //RX_PGA +10 0x0722 //RX_PGA 11 0x7FFF //RX_A_HP 12 0x4000 //RX_B_PE 13 0x5800 //RX_THR_PITCH_DET_0 @@ -18473,23 +17029,23 @@ 35 0x199A //RX_A_POST_FLT 36 0x0000 //RX_LMT_THRD 37 0x4000 //RX_LMT_ALPHA -38 0x0030 //RX_FDEQ_SUBNUM -39 0x4848 //RX_FDEQ_GAIN_0 -40 0x4848 //RX_FDEQ_GAIN_1 -41 0x4844 //RX_FDEQ_GAIN_2 -42 0x4B4D //RX_FDEQ_GAIN_3 -43 0x4E50 //RX_FDEQ_GAIN_4 -44 0x5254 //RX_FDEQ_GAIN_5 -45 0x5658 //RX_FDEQ_GAIN_6 -46 0x5C60 //RX_FDEQ_GAIN_7 -47 0x6468 //RX_FDEQ_GAIN_8 -48 0x6C70 //RX_FDEQ_GAIN_9 -49 0x7474 //RX_FDEQ_GAIN_10 -50 0x7474 //RX_FDEQ_GAIN_11 -51 0x7474 //RX_FDEQ_GAIN_12 -52 0x7474 //RX_FDEQ_GAIN_13 -53 0x7474 //RX_FDEQ_GAIN_14 -54 0x7474 //RX_FDEQ_GAIN_15 +38 0x0020 //RX_FDEQ_SUBNUM +39 0x4E4E //RX_FDEQ_GAIN_0 +40 0x4E56 //RX_FDEQ_GAIN_1 +41 0x6878 //RX_FDEQ_GAIN_2 +42 0x8088 //RX_FDEQ_GAIN_3 +43 0x848B //RX_FDEQ_GAIN_4 +44 0x8F8E //RX_FDEQ_GAIN_5 +45 0x9494 //RX_FDEQ_GAIN_6 +46 0x96A0 //RX_FDEQ_GAIN_7 +47 0xB8A0 //RX_FDEQ_GAIN_8 +48 0xA99D //RX_FDEQ_GAIN_9 +49 0x9D6A //RX_FDEQ_GAIN_10 +50 0x626B //RX_FDEQ_GAIN_11 +51 0x6C78 //RX_FDEQ_GAIN_12 +52 0x7884 //RX_FDEQ_GAIN_13 +53 0x9098 //RX_FDEQ_GAIN_14 +54 0x9CAC //RX_FDEQ_GAIN_15 55 0x4848 //RX_FDEQ_GAIN_16 56 0x4848 //RX_FDEQ_GAIN_17 57 0x4848 //RX_FDEQ_GAIN_18 @@ -18499,8 +17055,8 @@ 61 0x4848 //RX_FDEQ_GAIN_22 62 0x4848 //RX_FDEQ_GAIN_23 63 0x0202 //RX_FDEQ_BIN_0 -64 0x0203 //RX_FDEQ_BIN_1 -65 0x0402 //RX_FDEQ_BIN_2 +64 0x0202 //RX_FDEQ_BIN_1 +65 0x0302 //RX_FDEQ_BIN_2 66 0x0304 //RX_FDEQ_BIN_3 67 0x0405 //RX_FDEQ_BIN_4 68 0x0506 //RX_FDEQ_BIN_5 @@ -18508,12 +17064,12 @@ 70 0x090A //RX_FDEQ_BIN_7 71 0x0B0C //RX_FDEQ_BIN_8 72 0x0D0E //RX_FDEQ_BIN_9 -73 0x1214 //RX_FDEQ_BIN_10 -74 0x1E1E //RX_FDEQ_BIN_11 -75 0x1E1E //RX_FDEQ_BIN_12 +73 0x1013 //RX_FDEQ_BIN_10 +74 0x1719 //RX_FDEQ_BIN_11 +75 0x1B1E //RX_FDEQ_BIN_12 76 0x1E1E //RX_FDEQ_BIN_13 -77 0x1E1E //RX_FDEQ_BIN_14 -78 0x202C //RX_FDEQ_BIN_15 +77 0x1E28 //RX_FDEQ_BIN_14 +78 0x282C //RX_FDEQ_BIN_15 79 0x0000 //RX_FDEQ_BIN_16 80 0x0000 //RX_FDEQ_BIN_17 81 0x0000 //RX_FDEQ_BIN_18 @@ -18559,1765 +17115,12 @@ 121 0x199A //RX_TDDRC_HMNC_GAIN 122 0x0001 //RX_TDDRC_SMT_FLAG 123 0x0CCD //RX_TDDRC_SMT_W -124 0x01E0 //RX_TDDRC_DRC_GAIN +124 0x02FD //RX_TDDRC_DRC_GAIN 125 0x7C00 //RX_LAMBDA_PKA_FP -126 0x2000 //RX_TPKA_FP -127 0x2000 //RX_MIN_G_FP -128 0x0080 //RX_MAX_G_FP -129 0x0100 //RX_SPK_VOL -130 0x0000 //RX_VOL_RESRV_0 -131 0x0000 //RX_MAXLEVEL_CNG -132 0x3000 //RX_BWE_UV_TH -133 0x3000 //RX_BWE_UV_TH2 -134 0x1800 //RX_BWE_UV_TH3 -135 0x1000 //RX_BWE_V_TH -136 0x04CD //RX_BWE_GAIN1_V_TH1 -137 0x0F33 //RX_BWE_GAIN1_V_TH2 -138 0x7333 //RX_BWE_UV_EQ -139 0x199A //RX_BWE_V_EQ -140 0x7333 //RX_BWE_TONE_TH -141 0x0004 //RX_BWE_UV_HOLD_T -142 0x6CCD //RX_BWE_GAIN2_ALPHA -143 0x799A //RX_BWE_GAIN3_ALPHA -144 0x001E //RX_BWE_CUTOFF -145 0x3000 //RX_BWE_GAINFILL -146 0x3200 //RX_BWE_MAXTH_TONE -147 0x2000 //RX_BWE_EQ_0 -148 0x2000 //RX_BWE_EQ_1 -149 0x2000 //RX_BWE_EQ_2 -150 0x2000 //RX_BWE_EQ_3 -151 0x2000 //RX_BWE_EQ_4 -152 0x2000 //RX_BWE_EQ_5 -153 0x2000 //RX_BWE_EQ_6 -154 0x0000 //RX_BWE_RESRV_0 -155 0x0000 //RX_BWE_RESRV_1 -156 0x0000 //RX_BWE_RESRV_2 -#VOL 0 -6 0x1000 //RX_TDDRC_ALPHA_UP_1 -7 0x1000 //RX_TDDRC_ALPHA_UP_2 -8 0x1000 //RX_TDDRC_ALPHA_UP_3 -9 0x1000 //RX_TDDRC_ALPHA_UP_4 -27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 -28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 -29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 -32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 -33 0x7000 //RX_TDDRC_LIMITER_THRD -34 0x0800 //RX_TDDRC_LIMITER_GAIN -112 0x0000 //RX_TDDRC_THRD_0 -113 0x0000 //RX_TDDRC_THRD_1 -114 0x1800 //RX_TDDRC_THRD_2 -115 0x1800 //RX_TDDRC_THRD_3 -116 0x3000 //RX_TDDRC_SLANT_0 -117 0x6E00 //RX_TDDRC_SLANT_1 -118 0x1000 //RX_TDDRC_ALPHA_UP_0 -119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 -120 0x0000 //RX_TDDRC_HMNC_FLAG -121 0x199A //RX_TDDRC_HMNC_GAIN -122 0x0001 //RX_TDDRC_SMT_FLAG -123 0x0CCD //RX_TDDRC_SMT_W -124 0x01E0 //RX_TDDRC_DRC_GAIN -38 0x0030 //RX_FDEQ_SUBNUM -39 0x4848 //RX_FDEQ_GAIN_0 -40 0x4848 //RX_FDEQ_GAIN_1 -41 0x4844 //RX_FDEQ_GAIN_2 -42 0x4B4D //RX_FDEQ_GAIN_3 -43 0x4E50 //RX_FDEQ_GAIN_4 -44 0x5254 //RX_FDEQ_GAIN_5 -45 0x5658 //RX_FDEQ_GAIN_6 -46 0x5C60 //RX_FDEQ_GAIN_7 -47 0x6468 //RX_FDEQ_GAIN_8 -48 0x6C70 //RX_FDEQ_GAIN_9 -49 0x7474 //RX_FDEQ_GAIN_10 -50 0x7474 //RX_FDEQ_GAIN_11 -51 0x7474 //RX_FDEQ_GAIN_12 -52 0x7474 //RX_FDEQ_GAIN_13 -53 0x7474 //RX_FDEQ_GAIN_14 -54 0x7474 //RX_FDEQ_GAIN_15 -55 0x4848 //RX_FDEQ_GAIN_16 -56 0x4848 //RX_FDEQ_GAIN_17 -57 0x4848 //RX_FDEQ_GAIN_18 -58 0x4848 //RX_FDEQ_GAIN_19 -59 0x4848 //RX_FDEQ_GAIN_20 -60 0x4848 //RX_FDEQ_GAIN_21 -61 0x4848 //RX_FDEQ_GAIN_22 -62 0x4848 //RX_FDEQ_GAIN_23 -63 0x0202 //RX_FDEQ_BIN_0 -64 0x0203 //RX_FDEQ_BIN_1 -65 0x0402 //RX_FDEQ_BIN_2 -66 0x0304 //RX_FDEQ_BIN_3 -67 0x0405 //RX_FDEQ_BIN_4 -68 0x0506 //RX_FDEQ_BIN_5 -69 0x0708 //RX_FDEQ_BIN_6 -70 0x090A //RX_FDEQ_BIN_7 -71 0x0B0C //RX_FDEQ_BIN_8 -72 0x0D0E //RX_FDEQ_BIN_9 -73 0x1214 //RX_FDEQ_BIN_10 -74 0x1E1E //RX_FDEQ_BIN_11 -75 0x1E1E //RX_FDEQ_BIN_12 -76 0x1E1E //RX_FDEQ_BIN_13 -77 0x1E1E //RX_FDEQ_BIN_14 -78 0x202C //RX_FDEQ_BIN_15 -79 0x0000 //RX_FDEQ_BIN_16 -80 0x0000 //RX_FDEQ_BIN_17 -81 0x0000 //RX_FDEQ_BIN_18 -82 0x0000 //RX_FDEQ_BIN_19 -83 0x0000 //RX_FDEQ_BIN_20 -84 0x0000 //RX_FDEQ_BIN_21 -85 0x0000 //RX_FDEQ_BIN_22 -86 0x0000 //RX_FDEQ_BIN_23 -87 0x4000 //RX_FDEQ_RESRV_0 -88 0x0320 //RX_FDEQ_RESRV_1 -89 0x0018 //RX_FDDRC_BAND_MARGIN_0 -90 0x0030 //RX_FDDRC_BAND_MARGIN_1 -91 0x0050 //RX_FDDRC_BAND_MARGIN_2 -92 0x0080 //RX_FDDRC_BAND_MARGIN_3 -93 0x0007 //RX_FDDRC_BLOCK_EXP -94 0x5000 //RX_FDDRC_THRD_2_0 -95 0x5000 //RX_FDDRC_THRD_2_1 -96 0x5000 //RX_FDDRC_THRD_2_2 -97 0x5000 //RX_FDDRC_THRD_2_3 -98 0x6400 //RX_FDDRC_THRD_3_0 -99 0x6400 //RX_FDDRC_THRD_3_1 -100 0x6400 //RX_FDDRC_THRD_3_2 -101 0x6400 //RX_FDDRC_THRD_3_3 -102 0x2000 //RX_FDDRC_SLANT_0_0 -103 0x2000 //RX_FDDRC_SLANT_0_1 -104 0x2000 //RX_FDDRC_SLANT_0_2 -105 0x2000 //RX_FDDRC_SLANT_0_3 -106 0x5333 //RX_FDDRC_SLANT_1_0 -107 0x5333 //RX_FDDRC_SLANT_1_1 -108 0x5333 //RX_FDDRC_SLANT_1_2 -109 0x5333 //RX_FDDRC_SLANT_1_3 -110 0x0000 //RX_FDDRC_RESRV_0 -129 0x0100 //RX_SPK_VOL -130 0x0000 //RX_VOL_RESRV_0 -#VOL 1 -6 0x1000 //RX_TDDRC_ALPHA_UP_1 -7 0x1000 //RX_TDDRC_ALPHA_UP_2 -8 0x1000 //RX_TDDRC_ALPHA_UP_3 -9 0x1000 //RX_TDDRC_ALPHA_UP_4 -27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 -28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 -29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 -32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 -33 0x7000 //RX_TDDRC_LIMITER_THRD -34 0x0800 //RX_TDDRC_LIMITER_GAIN -112 0x0000 //RX_TDDRC_THRD_0 -113 0x0000 //RX_TDDRC_THRD_1 -114 0x1800 //RX_TDDRC_THRD_2 -115 0x1800 //RX_TDDRC_THRD_3 -116 0x3000 //RX_TDDRC_SLANT_0 -117 0x6E00 //RX_TDDRC_SLANT_1 -118 0x1000 //RX_TDDRC_ALPHA_UP_0 -119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 -120 0x0000 //RX_TDDRC_HMNC_FLAG -121 0x199A //RX_TDDRC_HMNC_GAIN -122 0x0001 //RX_TDDRC_SMT_FLAG -123 0x0CCD //RX_TDDRC_SMT_W -124 0x01E0 //RX_TDDRC_DRC_GAIN -38 0x0030 //RX_FDEQ_SUBNUM -39 0x4848 //RX_FDEQ_GAIN_0 -40 0x4848 //RX_FDEQ_GAIN_1 -41 0x4844 //RX_FDEQ_GAIN_2 -42 0x4B4D //RX_FDEQ_GAIN_3 -43 0x4E50 //RX_FDEQ_GAIN_4 -44 0x5254 //RX_FDEQ_GAIN_5 -45 0x5658 //RX_FDEQ_GAIN_6 -46 0x5C60 //RX_FDEQ_GAIN_7 -47 0x6468 //RX_FDEQ_GAIN_8 -48 0x6C70 //RX_FDEQ_GAIN_9 -49 0x7474 //RX_FDEQ_GAIN_10 -50 0x7474 //RX_FDEQ_GAIN_11 -51 0x7474 //RX_FDEQ_GAIN_12 -52 0x7474 //RX_FDEQ_GAIN_13 -53 0x7474 //RX_FDEQ_GAIN_14 -54 0x7474 //RX_FDEQ_GAIN_15 -55 0x4848 //RX_FDEQ_GAIN_16 -56 0x4848 //RX_FDEQ_GAIN_17 -57 0x4848 //RX_FDEQ_GAIN_18 -58 0x4848 //RX_FDEQ_GAIN_19 -59 0x4848 //RX_FDEQ_GAIN_20 -60 0x4848 //RX_FDEQ_GAIN_21 -61 0x4848 //RX_FDEQ_GAIN_22 -62 0x4848 //RX_FDEQ_GAIN_23 -63 0x0202 //RX_FDEQ_BIN_0 -64 0x0203 //RX_FDEQ_BIN_1 -65 0x0402 //RX_FDEQ_BIN_2 -66 0x0304 //RX_FDEQ_BIN_3 -67 0x0405 //RX_FDEQ_BIN_4 -68 0x0506 //RX_FDEQ_BIN_5 -69 0x0708 //RX_FDEQ_BIN_6 -70 0x090A //RX_FDEQ_BIN_7 -71 0x0B0C //RX_FDEQ_BIN_8 -72 0x0D0E //RX_FDEQ_BIN_9 -73 0x1214 //RX_FDEQ_BIN_10 -74 0x1E1E //RX_FDEQ_BIN_11 -75 0x1E1E //RX_FDEQ_BIN_12 -76 0x1E1E //RX_FDEQ_BIN_13 -77 0x1E1E //RX_FDEQ_BIN_14 -78 0x202C //RX_FDEQ_BIN_15 -79 0x0000 //RX_FDEQ_BIN_16 -80 0x0000 //RX_FDEQ_BIN_17 -81 0x0000 //RX_FDEQ_BIN_18 -82 0x0000 //RX_FDEQ_BIN_19 -83 0x0000 //RX_FDEQ_BIN_20 -84 0x0000 //RX_FDEQ_BIN_21 -85 0x0000 //RX_FDEQ_BIN_22 -86 0x0000 //RX_FDEQ_BIN_23 -87 0x4000 //RX_FDEQ_RESRV_0 -88 0x0320 //RX_FDEQ_RESRV_1 -89 0x0018 //RX_FDDRC_BAND_MARGIN_0 -90 0x0030 //RX_FDDRC_BAND_MARGIN_1 -91 0x0050 //RX_FDDRC_BAND_MARGIN_2 -92 0x0080 //RX_FDDRC_BAND_MARGIN_3 -93 0x0007 //RX_FDDRC_BLOCK_EXP -94 0x5000 //RX_FDDRC_THRD_2_0 -95 0x5000 //RX_FDDRC_THRD_2_1 -96 0x5000 //RX_FDDRC_THRD_2_2 -97 0x5000 //RX_FDDRC_THRD_2_3 -98 0x6400 //RX_FDDRC_THRD_3_0 -99 0x6400 //RX_FDDRC_THRD_3_1 -100 0x6400 //RX_FDDRC_THRD_3_2 -101 0x6400 //RX_FDDRC_THRD_3_3 -102 0x2000 //RX_FDDRC_SLANT_0_0 -103 0x2000 //RX_FDDRC_SLANT_0_1 -104 0x2000 //RX_FDDRC_SLANT_0_2 -105 0x2000 //RX_FDDRC_SLANT_0_3 -106 0x5333 //RX_FDDRC_SLANT_1_0 -107 0x5333 //RX_FDDRC_SLANT_1_1 -108 0x5333 //RX_FDDRC_SLANT_1_2 -109 0x5333 //RX_FDDRC_SLANT_1_3 -110 0x0000 //RX_FDDRC_RESRV_0 -129 0x0100 //RX_SPK_VOL -130 0x0000 //RX_VOL_RESRV_0 -#VOL 2 -6 0x1000 //RX_TDDRC_ALPHA_UP_1 -7 0x1000 //RX_TDDRC_ALPHA_UP_2 -8 0x1000 //RX_TDDRC_ALPHA_UP_3 -9 0x1000 //RX_TDDRC_ALPHA_UP_4 -27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 -28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 -29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 -32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 -33 0x7000 //RX_TDDRC_LIMITER_THRD -34 0x0800 //RX_TDDRC_LIMITER_GAIN -112 0x0000 //RX_TDDRC_THRD_0 -113 0x0000 //RX_TDDRC_THRD_1 -114 0x1800 //RX_TDDRC_THRD_2 -115 0x1800 //RX_TDDRC_THRD_3 -116 0x3000 //RX_TDDRC_SLANT_0 -117 0x6E00 //RX_TDDRC_SLANT_1 -118 0x1000 //RX_TDDRC_ALPHA_UP_0 -119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 -120 0x0000 //RX_TDDRC_HMNC_FLAG -121 0x199A //RX_TDDRC_HMNC_GAIN -122 0x0001 //RX_TDDRC_SMT_FLAG -123 0x0CCD //RX_TDDRC_SMT_W -124 0x01E0 //RX_TDDRC_DRC_GAIN -38 0x0030 //RX_FDEQ_SUBNUM -39 0x4848 //RX_FDEQ_GAIN_0 -40 0x4848 //RX_FDEQ_GAIN_1 -41 0x4844 //RX_FDEQ_GAIN_2 -42 0x4B4D //RX_FDEQ_GAIN_3 -43 0x4E50 //RX_FDEQ_GAIN_4 -44 0x5254 //RX_FDEQ_GAIN_5 -45 0x5658 //RX_FDEQ_GAIN_6 -46 0x5C60 //RX_FDEQ_GAIN_7 -47 0x6468 //RX_FDEQ_GAIN_8 -48 0x6C70 //RX_FDEQ_GAIN_9 -49 0x7474 //RX_FDEQ_GAIN_10 -50 0x7474 //RX_FDEQ_GAIN_11 -51 0x7474 //RX_FDEQ_GAIN_12 -52 0x7474 //RX_FDEQ_GAIN_13 -53 0x7474 //RX_FDEQ_GAIN_14 -54 0x7474 //RX_FDEQ_GAIN_15 -55 0x4848 //RX_FDEQ_GAIN_16 -56 0x4848 //RX_FDEQ_GAIN_17 -57 0x4848 //RX_FDEQ_GAIN_18 -58 0x4848 //RX_FDEQ_GAIN_19 -59 0x4848 //RX_FDEQ_GAIN_20 -60 0x4848 //RX_FDEQ_GAIN_21 -61 0x4848 //RX_FDEQ_GAIN_22 -62 0x4848 //RX_FDEQ_GAIN_23 -63 0x0202 //RX_FDEQ_BIN_0 -64 0x0203 //RX_FDEQ_BIN_1 -65 0x0402 //RX_FDEQ_BIN_2 -66 0x0304 //RX_FDEQ_BIN_3 -67 0x0405 //RX_FDEQ_BIN_4 -68 0x0506 //RX_FDEQ_BIN_5 -69 0x0708 //RX_FDEQ_BIN_6 -70 0x090A //RX_FDEQ_BIN_7 -71 0x0B0C //RX_FDEQ_BIN_8 -72 0x0D0E //RX_FDEQ_BIN_9 -73 0x1214 //RX_FDEQ_BIN_10 -74 0x1E1E //RX_FDEQ_BIN_11 -75 0x1E1E //RX_FDEQ_BIN_12 -76 0x1E1E //RX_FDEQ_BIN_13 -77 0x1E1E //RX_FDEQ_BIN_14 -78 0x202C //RX_FDEQ_BIN_15 -79 0x0000 //RX_FDEQ_BIN_16 -80 0x0000 //RX_FDEQ_BIN_17 -81 0x0000 //RX_FDEQ_BIN_18 -82 0x0000 //RX_FDEQ_BIN_19 -83 0x0000 //RX_FDEQ_BIN_20 -84 0x0000 //RX_FDEQ_BIN_21 -85 0x0000 //RX_FDEQ_BIN_22 -86 0x0000 //RX_FDEQ_BIN_23 -87 0x4000 //RX_FDEQ_RESRV_0 -88 0x0320 //RX_FDEQ_RESRV_1 -89 0x0018 //RX_FDDRC_BAND_MARGIN_0 -90 0x0030 //RX_FDDRC_BAND_MARGIN_1 -91 0x0050 //RX_FDDRC_BAND_MARGIN_2 -92 0x0080 //RX_FDDRC_BAND_MARGIN_3 -93 0x0007 //RX_FDDRC_BLOCK_EXP -94 0x5000 //RX_FDDRC_THRD_2_0 -95 0x5000 //RX_FDDRC_THRD_2_1 -96 0x5000 //RX_FDDRC_THRD_2_2 -97 0x5000 //RX_FDDRC_THRD_2_3 -98 0x6400 //RX_FDDRC_THRD_3_0 -99 0x6400 //RX_FDDRC_THRD_3_1 -100 0x6400 //RX_FDDRC_THRD_3_2 -101 0x6400 //RX_FDDRC_THRD_3_3 -102 0x2000 //RX_FDDRC_SLANT_0_0 -103 0x2000 //RX_FDDRC_SLANT_0_1 -104 0x2000 //RX_FDDRC_SLANT_0_2 -105 0x2000 //RX_FDDRC_SLANT_0_3 -106 0x5333 //RX_FDDRC_SLANT_1_0 -107 0x5333 //RX_FDDRC_SLANT_1_1 -108 0x5333 //RX_FDDRC_SLANT_1_2 -109 0x5333 //RX_FDDRC_SLANT_1_3 -110 0x0000 //RX_FDDRC_RESRV_0 -129 0x0100 //RX_SPK_VOL -130 0x0000 //RX_VOL_RESRV_0 -#VOL 3 -6 0x1000 //RX_TDDRC_ALPHA_UP_1 -7 0x1000 //RX_TDDRC_ALPHA_UP_2 -8 0x1000 //RX_TDDRC_ALPHA_UP_3 -9 0x1000 //RX_TDDRC_ALPHA_UP_4 -27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 -28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 -29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 -32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 -33 0x7000 //RX_TDDRC_LIMITER_THRD -34 0x0800 //RX_TDDRC_LIMITER_GAIN -112 0x0000 //RX_TDDRC_THRD_0 -113 0x0000 //RX_TDDRC_THRD_1 -114 0x1800 //RX_TDDRC_THRD_2 -115 0x1800 //RX_TDDRC_THRD_3 -116 0x3000 //RX_TDDRC_SLANT_0 -117 0x6E00 //RX_TDDRC_SLANT_1 -118 0x1000 //RX_TDDRC_ALPHA_UP_0 -119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 -120 0x0000 //RX_TDDRC_HMNC_FLAG -121 0x199A //RX_TDDRC_HMNC_GAIN -122 0x0001 //RX_TDDRC_SMT_FLAG -123 0x0CCD //RX_TDDRC_SMT_W -124 0x01E0 //RX_TDDRC_DRC_GAIN -38 0x0030 //RX_FDEQ_SUBNUM -39 0x4848 //RX_FDEQ_GAIN_0 -40 0x4848 //RX_FDEQ_GAIN_1 -41 0x4844 //RX_FDEQ_GAIN_2 -42 0x4B4D //RX_FDEQ_GAIN_3 -43 0x4E50 //RX_FDEQ_GAIN_4 -44 0x5254 //RX_FDEQ_GAIN_5 -45 0x5658 //RX_FDEQ_GAIN_6 -46 0x5C60 //RX_FDEQ_GAIN_7 -47 0x6468 //RX_FDEQ_GAIN_8 -48 0x6C70 //RX_FDEQ_GAIN_9 -49 0x7474 //RX_FDEQ_GAIN_10 -50 0x7474 //RX_FDEQ_GAIN_11 -51 0x7474 //RX_FDEQ_GAIN_12 -52 0x7474 //RX_FDEQ_GAIN_13 -53 0x7474 //RX_FDEQ_GAIN_14 -54 0x7474 //RX_FDEQ_GAIN_15 -55 0x4848 //RX_FDEQ_GAIN_16 -56 0x4848 //RX_FDEQ_GAIN_17 -57 0x4848 //RX_FDEQ_GAIN_18 -58 0x4848 //RX_FDEQ_GAIN_19 -59 0x4848 //RX_FDEQ_GAIN_20 -60 0x4848 //RX_FDEQ_GAIN_21 -61 0x4848 //RX_FDEQ_GAIN_22 -62 0x4848 //RX_FDEQ_GAIN_23 -63 0x0202 //RX_FDEQ_BIN_0 -64 0x0203 //RX_FDEQ_BIN_1 -65 0x0402 //RX_FDEQ_BIN_2 -66 0x0304 //RX_FDEQ_BIN_3 -67 0x0405 //RX_FDEQ_BIN_4 -68 0x0506 //RX_FDEQ_BIN_5 -69 0x0708 //RX_FDEQ_BIN_6 -70 0x090A //RX_FDEQ_BIN_7 -71 0x0B0C //RX_FDEQ_BIN_8 -72 0x0D0E //RX_FDEQ_BIN_9 -73 0x1214 //RX_FDEQ_BIN_10 -74 0x1E1E //RX_FDEQ_BIN_11 -75 0x1E1E //RX_FDEQ_BIN_12 -76 0x1E1E //RX_FDEQ_BIN_13 -77 0x1E1E //RX_FDEQ_BIN_14 -78 0x202C //RX_FDEQ_BIN_15 -79 0x0000 //RX_FDEQ_BIN_16 -80 0x0000 //RX_FDEQ_BIN_17 -81 0x0000 //RX_FDEQ_BIN_18 -82 0x0000 //RX_FDEQ_BIN_19 -83 0x0000 //RX_FDEQ_BIN_20 -84 0x0000 //RX_FDEQ_BIN_21 -85 0x0000 //RX_FDEQ_BIN_22 -86 0x0000 //RX_FDEQ_BIN_23 -87 0x4000 //RX_FDEQ_RESRV_0 -88 0x0320 //RX_FDEQ_RESRV_1 -89 0x0018 //RX_FDDRC_BAND_MARGIN_0 -90 0x0030 //RX_FDDRC_BAND_MARGIN_1 -91 0x0050 //RX_FDDRC_BAND_MARGIN_2 -92 0x0080 //RX_FDDRC_BAND_MARGIN_3 -93 0x0007 //RX_FDDRC_BLOCK_EXP -94 0x5000 //RX_FDDRC_THRD_2_0 -95 0x5000 //RX_FDDRC_THRD_2_1 -96 0x5000 //RX_FDDRC_THRD_2_2 -97 0x5000 //RX_FDDRC_THRD_2_3 -98 0x6400 //RX_FDDRC_THRD_3_0 -99 0x6400 //RX_FDDRC_THRD_3_1 -100 0x6400 //RX_FDDRC_THRD_3_2 -101 0x6400 //RX_FDDRC_THRD_3_3 -102 0x2000 //RX_FDDRC_SLANT_0_0 -103 0x2000 //RX_FDDRC_SLANT_0_1 -104 0x2000 //RX_FDDRC_SLANT_0_2 -105 0x2000 //RX_FDDRC_SLANT_0_3 -106 0x5333 //RX_FDDRC_SLANT_1_0 -107 0x5333 //RX_FDDRC_SLANT_1_1 -108 0x5333 //RX_FDDRC_SLANT_1_2 -109 0x5333 //RX_FDDRC_SLANT_1_3 -110 0x0000 //RX_FDDRC_RESRV_0 -129 0x0100 //RX_SPK_VOL -130 0x0000 //RX_VOL_RESRV_0 -#VOL 4 -6 0x1000 //RX_TDDRC_ALPHA_UP_1 -7 0x1000 //RX_TDDRC_ALPHA_UP_2 -8 0x1000 //RX_TDDRC_ALPHA_UP_3 -9 0x1000 //RX_TDDRC_ALPHA_UP_4 -27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 -28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 -29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 -32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 -33 0x7000 //RX_TDDRC_LIMITER_THRD -34 0x0800 //RX_TDDRC_LIMITER_GAIN -112 0x0000 //RX_TDDRC_THRD_0 -113 0x0000 //RX_TDDRC_THRD_1 -114 0x1800 //RX_TDDRC_THRD_2 -115 0x1800 //RX_TDDRC_THRD_3 -116 0x3000 //RX_TDDRC_SLANT_0 -117 0x6E00 //RX_TDDRC_SLANT_1 -118 0x1000 //RX_TDDRC_ALPHA_UP_0 -119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 -120 0x0000 //RX_TDDRC_HMNC_FLAG -121 0x199A //RX_TDDRC_HMNC_GAIN -122 0x0001 //RX_TDDRC_SMT_FLAG -123 0x0CCD //RX_TDDRC_SMT_W -124 0x01E0 //RX_TDDRC_DRC_GAIN -38 0x0030 //RX_FDEQ_SUBNUM -39 0x4848 //RX_FDEQ_GAIN_0 -40 0x4848 //RX_FDEQ_GAIN_1 -41 0x4844 //RX_FDEQ_GAIN_2 -42 0x4B4D //RX_FDEQ_GAIN_3 -43 0x4E50 //RX_FDEQ_GAIN_4 -44 0x5254 //RX_FDEQ_GAIN_5 -45 0x5658 //RX_FDEQ_GAIN_6 -46 0x5C60 //RX_FDEQ_GAIN_7 -47 0x6468 //RX_FDEQ_GAIN_8 -48 0x6C70 //RX_FDEQ_GAIN_9 -49 0x7474 //RX_FDEQ_GAIN_10 -50 0x7474 //RX_FDEQ_GAIN_11 -51 0x7474 //RX_FDEQ_GAIN_12 -52 0x7474 //RX_FDEQ_GAIN_13 -53 0x7474 //RX_FDEQ_GAIN_14 -54 0x7474 //RX_FDEQ_GAIN_15 -55 0x4848 //RX_FDEQ_GAIN_16 -56 0x4848 //RX_FDEQ_GAIN_17 -57 0x4848 //RX_FDEQ_GAIN_18 -58 0x4848 //RX_FDEQ_GAIN_19 -59 0x4848 //RX_FDEQ_GAIN_20 -60 0x4848 //RX_FDEQ_GAIN_21 -61 0x4848 //RX_FDEQ_GAIN_22 -62 0x4848 //RX_FDEQ_GAIN_23 -63 0x0202 //RX_FDEQ_BIN_0 -64 0x0203 //RX_FDEQ_BIN_1 -65 0x0402 //RX_FDEQ_BIN_2 -66 0x0304 //RX_FDEQ_BIN_3 -67 0x0405 //RX_FDEQ_BIN_4 -68 0x0506 //RX_FDEQ_BIN_5 -69 0x0708 //RX_FDEQ_BIN_6 -70 0x090A //RX_FDEQ_BIN_7 -71 0x0B0C //RX_FDEQ_BIN_8 -72 0x0D0E //RX_FDEQ_BIN_9 -73 0x1214 //RX_FDEQ_BIN_10 -74 0x1E1E //RX_FDEQ_BIN_11 -75 0x1E1E //RX_FDEQ_BIN_12 -76 0x1E1E //RX_FDEQ_BIN_13 -77 0x1E1E //RX_FDEQ_BIN_14 -78 0x202C //RX_FDEQ_BIN_15 -79 0x0000 //RX_FDEQ_BIN_16 -80 0x0000 //RX_FDEQ_BIN_17 -81 0x0000 //RX_FDEQ_BIN_18 -82 0x0000 //RX_FDEQ_BIN_19 -83 0x0000 //RX_FDEQ_BIN_20 -84 0x0000 //RX_FDEQ_BIN_21 -85 0x0000 //RX_FDEQ_BIN_22 -86 0x0000 //RX_FDEQ_BIN_23 -87 0x4000 //RX_FDEQ_RESRV_0 -88 0x0320 //RX_FDEQ_RESRV_1 -89 0x0018 //RX_FDDRC_BAND_MARGIN_0 -90 0x0030 //RX_FDDRC_BAND_MARGIN_1 -91 0x0050 //RX_FDDRC_BAND_MARGIN_2 -92 0x0080 //RX_FDDRC_BAND_MARGIN_3 -93 0x0007 //RX_FDDRC_BLOCK_EXP -94 0x5000 //RX_FDDRC_THRD_2_0 -95 0x5000 //RX_FDDRC_THRD_2_1 -96 0x5000 //RX_FDDRC_THRD_2_2 -97 0x5000 //RX_FDDRC_THRD_2_3 -98 0x6400 //RX_FDDRC_THRD_3_0 -99 0x6400 //RX_FDDRC_THRD_3_1 -100 0x6400 //RX_FDDRC_THRD_3_2 -101 0x6400 //RX_FDDRC_THRD_3_3 -102 0x2000 //RX_FDDRC_SLANT_0_0 -103 0x2000 //RX_FDDRC_SLANT_0_1 -104 0x2000 //RX_FDDRC_SLANT_0_2 -105 0x2000 //RX_FDDRC_SLANT_0_3 -106 0x5333 //RX_FDDRC_SLANT_1_0 -107 0x5333 //RX_FDDRC_SLANT_1_1 -108 0x5333 //RX_FDDRC_SLANT_1_2 -109 0x5333 //RX_FDDRC_SLANT_1_3 -110 0x0000 //RX_FDDRC_RESRV_0 -129 0x0100 //RX_SPK_VOL -130 0x0000 //RX_VOL_RESRV_0 -#VOL 5 -6 0x1000 //RX_TDDRC_ALPHA_UP_1 -7 0x1000 //RX_TDDRC_ALPHA_UP_2 -8 0x1000 //RX_TDDRC_ALPHA_UP_3 -9 0x1000 //RX_TDDRC_ALPHA_UP_4 -27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 -28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 -29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 -32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 -33 0x7000 //RX_TDDRC_LIMITER_THRD -34 0x0800 //RX_TDDRC_LIMITER_GAIN -112 0x0000 //RX_TDDRC_THRD_0 -113 0x0000 //RX_TDDRC_THRD_1 -114 0x1800 //RX_TDDRC_THRD_2 -115 0x1800 //RX_TDDRC_THRD_3 -116 0x3000 //RX_TDDRC_SLANT_0 -117 0x6E00 //RX_TDDRC_SLANT_1 -118 0x1000 //RX_TDDRC_ALPHA_UP_0 -119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 -120 0x0000 //RX_TDDRC_HMNC_FLAG -121 0x199A //RX_TDDRC_HMNC_GAIN -122 0x0001 //RX_TDDRC_SMT_FLAG -123 0x0CCD //RX_TDDRC_SMT_W -124 0x01E0 //RX_TDDRC_DRC_GAIN -38 0x0030 //RX_FDEQ_SUBNUM -39 0x4848 //RX_FDEQ_GAIN_0 -40 0x4848 //RX_FDEQ_GAIN_1 -41 0x4844 //RX_FDEQ_GAIN_2 -42 0x4B4D //RX_FDEQ_GAIN_3 -43 0x4E50 //RX_FDEQ_GAIN_4 -44 0x5254 //RX_FDEQ_GAIN_5 -45 0x5658 //RX_FDEQ_GAIN_6 -46 0x5C60 //RX_FDEQ_GAIN_7 -47 0x6468 //RX_FDEQ_GAIN_8 -48 0x6C70 //RX_FDEQ_GAIN_9 -49 0x7474 //RX_FDEQ_GAIN_10 -50 0x7474 //RX_FDEQ_GAIN_11 -51 0x7474 //RX_FDEQ_GAIN_12 -52 0x7474 //RX_FDEQ_GAIN_13 -53 0x7474 //RX_FDEQ_GAIN_14 -54 0x7474 //RX_FDEQ_GAIN_15 -55 0x4848 //RX_FDEQ_GAIN_16 -56 0x4848 //RX_FDEQ_GAIN_17 -57 0x4848 //RX_FDEQ_GAIN_18 -58 0x4848 //RX_FDEQ_GAIN_19 -59 0x4848 //RX_FDEQ_GAIN_20 -60 0x4848 //RX_FDEQ_GAIN_21 -61 0x4848 //RX_FDEQ_GAIN_22 -62 0x4848 //RX_FDEQ_GAIN_23 -63 0x0202 //RX_FDEQ_BIN_0 -64 0x0203 //RX_FDEQ_BIN_1 -65 0x0402 //RX_FDEQ_BIN_2 -66 0x0304 //RX_FDEQ_BIN_3 -67 0x0405 //RX_FDEQ_BIN_4 -68 0x0506 //RX_FDEQ_BIN_5 -69 0x0708 //RX_FDEQ_BIN_6 -70 0x090A //RX_FDEQ_BIN_7 -71 0x0B0C //RX_FDEQ_BIN_8 -72 0x0D0E //RX_FDEQ_BIN_9 -73 0x1214 //RX_FDEQ_BIN_10 -74 0x1E1E //RX_FDEQ_BIN_11 -75 0x1E1E //RX_FDEQ_BIN_12 -76 0x1E1E //RX_FDEQ_BIN_13 -77 0x1E1E //RX_FDEQ_BIN_14 -78 0x202C //RX_FDEQ_BIN_15 -79 0x0000 //RX_FDEQ_BIN_16 -80 0x0000 //RX_FDEQ_BIN_17 -81 0x0000 //RX_FDEQ_BIN_18 -82 0x0000 //RX_FDEQ_BIN_19 -83 0x0000 //RX_FDEQ_BIN_20 -84 0x0000 //RX_FDEQ_BIN_21 -85 0x0000 //RX_FDEQ_BIN_22 -86 0x0000 //RX_FDEQ_BIN_23 -87 0x4000 //RX_FDEQ_RESRV_0 -88 0x0320 //RX_FDEQ_RESRV_1 -89 0x0018 //RX_FDDRC_BAND_MARGIN_0 -90 0x0030 //RX_FDDRC_BAND_MARGIN_1 -91 0x0050 //RX_FDDRC_BAND_MARGIN_2 -92 0x0080 //RX_FDDRC_BAND_MARGIN_3 -93 0x0007 //RX_FDDRC_BLOCK_EXP -94 0x5000 //RX_FDDRC_THRD_2_0 -95 0x5000 //RX_FDDRC_THRD_2_1 -96 0x5000 //RX_FDDRC_THRD_2_2 -97 0x5000 //RX_FDDRC_THRD_2_3 -98 0x6400 //RX_FDDRC_THRD_3_0 -99 0x6400 //RX_FDDRC_THRD_3_1 -100 0x6400 //RX_FDDRC_THRD_3_2 -101 0x6400 //RX_FDDRC_THRD_3_3 -102 0x2000 //RX_FDDRC_SLANT_0_0 -103 0x2000 //RX_FDDRC_SLANT_0_1 -104 0x2000 //RX_FDDRC_SLANT_0_2 -105 0x2000 //RX_FDDRC_SLANT_0_3 -106 0x5333 //RX_FDDRC_SLANT_1_0 -107 0x5333 //RX_FDDRC_SLANT_1_1 -108 0x5333 //RX_FDDRC_SLANT_1_2 -109 0x5333 //RX_FDDRC_SLANT_1_3 -110 0x0000 //RX_FDDRC_RESRV_0 -129 0x0100 //RX_SPK_VOL -130 0x0000 //RX_VOL_RESRV_0 -#VOL 6 -6 0x1000 //RX_TDDRC_ALPHA_UP_1 -7 0x1000 //RX_TDDRC_ALPHA_UP_2 -8 0x1000 //RX_TDDRC_ALPHA_UP_3 -9 0x1000 //RX_TDDRC_ALPHA_UP_4 -27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 -28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 -29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 -32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 -33 0x7000 //RX_TDDRC_LIMITER_THRD -34 0x0800 //RX_TDDRC_LIMITER_GAIN -112 0x0000 //RX_TDDRC_THRD_0 -113 0x0000 //RX_TDDRC_THRD_1 -114 0x1800 //RX_TDDRC_THRD_2 -115 0x1800 //RX_TDDRC_THRD_3 -116 0x3000 //RX_TDDRC_SLANT_0 -117 0x6E00 //RX_TDDRC_SLANT_1 -118 0x1000 //RX_TDDRC_ALPHA_UP_0 -119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 -120 0x0000 //RX_TDDRC_HMNC_FLAG -121 0x199A //RX_TDDRC_HMNC_GAIN -122 0x0001 //RX_TDDRC_SMT_FLAG -123 0x0CCD //RX_TDDRC_SMT_W -124 0x01E0 //RX_TDDRC_DRC_GAIN -38 0x0030 //RX_FDEQ_SUBNUM -39 0x4848 //RX_FDEQ_GAIN_0 -40 0x4848 //RX_FDEQ_GAIN_1 -41 0x4844 //RX_FDEQ_GAIN_2 -42 0x4B4D //RX_FDEQ_GAIN_3 -43 0x4E50 //RX_FDEQ_GAIN_4 -44 0x5254 //RX_FDEQ_GAIN_5 -45 0x5658 //RX_FDEQ_GAIN_6 -46 0x5C60 //RX_FDEQ_GAIN_7 -47 0x6468 //RX_FDEQ_GAIN_8 -48 0x6C70 //RX_FDEQ_GAIN_9 -49 0x7474 //RX_FDEQ_GAIN_10 -50 0x7474 //RX_FDEQ_GAIN_11 -51 0x7474 //RX_FDEQ_GAIN_12 -52 0x7474 //RX_FDEQ_GAIN_13 -53 0x7474 //RX_FDEQ_GAIN_14 -54 0x7474 //RX_FDEQ_GAIN_15 -55 0x4848 //RX_FDEQ_GAIN_16 -56 0x4848 //RX_FDEQ_GAIN_17 -57 0x4848 //RX_FDEQ_GAIN_18 -58 0x4848 //RX_FDEQ_GAIN_19 -59 0x4848 //RX_FDEQ_GAIN_20 -60 0x4848 //RX_FDEQ_GAIN_21 -61 0x4848 //RX_FDEQ_GAIN_22 -62 0x4848 //RX_FDEQ_GAIN_23 -63 0x0202 //RX_FDEQ_BIN_0 -64 0x0203 //RX_FDEQ_BIN_1 -65 0x0402 //RX_FDEQ_BIN_2 -66 0x0304 //RX_FDEQ_BIN_3 -67 0x0405 //RX_FDEQ_BIN_4 -68 0x0506 //RX_FDEQ_BIN_5 -69 0x0708 //RX_FDEQ_BIN_6 -70 0x090A //RX_FDEQ_BIN_7 -71 0x0B0C //RX_FDEQ_BIN_8 -72 0x0D0E //RX_FDEQ_BIN_9 -73 0x1214 //RX_FDEQ_BIN_10 -74 0x1E1E //RX_FDEQ_BIN_11 -75 0x1E1E //RX_FDEQ_BIN_12 -76 0x1E1E //RX_FDEQ_BIN_13 -77 0x1E1E //RX_FDEQ_BIN_14 -78 0x202C //RX_FDEQ_BIN_15 -79 0x0000 //RX_FDEQ_BIN_16 -80 0x0000 //RX_FDEQ_BIN_17 -81 0x0000 //RX_FDEQ_BIN_18 -82 0x0000 //RX_FDEQ_BIN_19 -83 0x0000 //RX_FDEQ_BIN_20 -84 0x0000 //RX_FDEQ_BIN_21 -85 0x0000 //RX_FDEQ_BIN_22 -86 0x0000 //RX_FDEQ_BIN_23 -87 0x4000 //RX_FDEQ_RESRV_0 -88 0x0320 //RX_FDEQ_RESRV_1 -89 0x0018 //RX_FDDRC_BAND_MARGIN_0 -90 0x0030 //RX_FDDRC_BAND_MARGIN_1 -91 0x0050 //RX_FDDRC_BAND_MARGIN_2 -92 0x0080 //RX_FDDRC_BAND_MARGIN_3 -93 0x0007 //RX_FDDRC_BLOCK_EXP -94 0x5000 //RX_FDDRC_THRD_2_0 -95 0x5000 //RX_FDDRC_THRD_2_1 -96 0x5000 //RX_FDDRC_THRD_2_2 -97 0x5000 //RX_FDDRC_THRD_2_3 -98 0x6400 //RX_FDDRC_THRD_3_0 -99 0x6400 //RX_FDDRC_THRD_3_1 -100 0x6400 //RX_FDDRC_THRD_3_2 -101 0x6400 //RX_FDDRC_THRD_3_3 -102 0x2000 //RX_FDDRC_SLANT_0_0 -103 0x2000 //RX_FDDRC_SLANT_0_1 -104 0x2000 //RX_FDDRC_SLANT_0_2 -105 0x2000 //RX_FDDRC_SLANT_0_3 -106 0x5333 //RX_FDDRC_SLANT_1_0 -107 0x5333 //RX_FDDRC_SLANT_1_1 -108 0x5333 //RX_FDDRC_SLANT_1_2 -109 0x5333 //RX_FDDRC_SLANT_1_3 -110 0x0000 //RX_FDDRC_RESRV_0 -129 0x0100 //RX_SPK_VOL -130 0x0000 //RX_VOL_RESRV_0 - -#CASE_NAME HANDSET-HANDSET-TMOBILE_US-NB -#PARAM_TYPE TX+RX -#TOTAL_CUSTOM_STEP 7 -#TX -0 0x0000 //TX_OPERATION_MODE_0 -1 0x0000 //TX_OPERATION_MODE_1 -2 0x0036 //TX_PATCH_REG -3 0x6F7E //TX_SENDFUNC_MODE_0 -4 0x0001 //TX_SENDFUNC_MODE_1 -5 0x0002 //TX_NUM_MIC -6 0x0000 //TX_SAMPLINGFREQ_SIG -7 0x0000 //TX_SAMPLINGFREQ_PROC -8 0x000A //TX_FRAME_SZ_SIG -9 0x000A //TX_FRAME_SZ -10 0x0000 //TX_DELAY_OPT -11 0x0028 //TX_MAX_TAIL_LENGTH -12 0x0001 //TX_NUM_LOUTCHN -13 0x0001 //TX_MAXNUM_AECREF -14 0x0000 //TX_DBG_FUNC_REG -15 0x0000 //TX_DBG_FUNC_REG1 -16 0x0000 //TX_SYS_RESRV_0 -17 0x0000 //TX_SYS_RESRV_1 -18 0x0000 //TX_SYS_RESRV_2 -19 0x0000 //TX_SYS_RESRV_3 -20 0x0000 //TX_DIST2REF0 -21 0x009D //TX_DIST2REF1 -22 0x0000 //TX_DIST2REF_02 -23 0x0000 //TX_DIST2REF_03 -24 0x0000 //TX_DIST2REF_04 -25 0x0000 //TX_DIST2REF_05 -26 0x0000 //TX_MMIC -27 0x1000 //TX_PGA_0 -28 0x1000 //TX_PGA_1 -29 0x1000 //TX_PGA_2 -30 0x0000 //TX_PGA_3 -31 0x0000 //TX_PGA_4 -32 0x0000 //TX_PGA_5 -33 0x0000 //TX_MIC_PAIRS -34 0x0000 //TX_MIC_PAIRS_HS -35 0x0002 //TX_MICS_FOR_BF -36 0x0000 //TX_MIC_PAIRS_FORL1 -37 0x0002 //TX_MICS_OF_PAIR0 -38 0x0002 //TX_MICS_OF_PAIR1 -39 0x0002 //TX_MICS_OF_PAIR2 -40 0x0002 //TX_MICS_OF_PAIR3 -41 0x0000 //TX_MIC_DATA_SRC0 -42 0x0002 //TX_MIC_DATA_SRC1 -43 0x0001 //TX_MIC_DATA_SRC2 -44 0x0000 //TX_MIC_DATA_SRC3 -45 0x0000 //TX_MIC_PAIR_CH_04 -46 0x0000 //TX_MIC_PAIR_CH_05 -47 0x0000 //TX_MIC_PAIR_CH_10 -48 0x0000 //TX_MIC_PAIR_CH_11 -49 0x0000 //TX_MIC_PAIR_CH_12 -50 0x0000 //TX_MIC_PAIR_CH_13 -51 0x0000 //TX_MIC_PAIR_CH_14 -52 0x05DC //TX_HD_BIN_MASK -53 0x0010 //TX_HD_SUBAND_MASK -54 0x19A1 //TX_HD_FRAME_AVG_MASK -55 0x0320 //TX_HD_MIN_FRQ -56 0x1000 //TX_HD_ALPHA_PSD -57 0x1100 //TX_T_PHPR1 -58 0x0000 //TX_T_PHPR2 -59 0x0000 //TX_T_PTPR -60 0x0000 //TX_T_PNPR -61 0x0000 //TX_T_PAPR1 -62 0xEE6C //TX_T_PSDVAT -63 0x0800 //TX_CNT -64 0x4000 //TX_ANTI_HOWL_GAIN -65 0x0001 //TX_MICFORBFMARK_0 -66 0x0001 //TX_MICFORBFMARK_1 -67 0x0001 //TX_MICFORBFMARK_2 -68 0x0001 //TX_MICFORBFMARK_3 -69 0x0001 //TX_MICFORBFMARK_4 -70 0x0001 //TX_MICFORBFMARK_5 -71 0x0000 //TX_DIST2REF_10 -72 0x3A66 //TX_DIST2REF_11 -73 0x0000 //TX_DIST2REF2 -74 0x0000 //TX_DIST2REF_13 -75 0x0000 //TX_DIST2REF_14 -76 0x0000 //TX_DIST2REF_15 -77 0x0000 //TX_DIST2REF_20 -78 0x0000 //TX_DIST2REF_21 -79 0x0000 //TX_DIST2REF_22 -80 0x0000 //TX_DIST2REF_23 -81 0x0000 //TX_DIST2REF_24 -82 0x0000 //TX_DIST2REF_25 -83 0x0000 //TX_DIST2REF_30 -84 0x0000 //TX_DIST2REF_31 -85 0x0000 //TX_DIST2REF_32 -86 0x0000 //TX_DIST2REF_33 -87 0x0000 //TX_DIST2REF_34 -88 0x0000 //TX_DIST2REF_35 -89 0x0000 //TX_MIC_LOC_00 -90 0x0000 //TX_MIC_LOC_01 -91 0x0000 //TX_MIC_LOC_02 -92 0x0000 //TX_MIC_LOC_03 -93 0x0000 //TX_MIC_LOC_04 -94 0x0000 //TX_MIC_LOC_05 -95 0x0000 //TX_MIC_LOC_10 -96 0x0000 //TX_MIC_LOC_11 -97 0x0000 //TX_MIC_LOC_12 -98 0x0000 //TX_MIC_LOC_13 -99 0x0000 //TX_MIC_LOC_14 -100 0x0000 //TX_MIC_LOC_15 -101 0x0000 //TX_MIC_LOC_20 -102 0x0000 //TX_MIC_LOC_21 -103 0x0000 //TX_MIC_LOC_22 -104 0x0000 //TX_MIC_LOC_23 -105 0x0000 //TX_MIC_LOC_24 -106 0x0000 //TX_MIC_LOC_25 -107 0x0200 //TX_MIC_REFBLK_VOLUME -108 0x0AAC //TX_MIC_BLOCK_VOLUME -109 0x0000 //TX_INVERSE_MASK -110 0x0000 //TX_ADCS_MASK -111 0x04D0 //TX_ADCS_GAIN -112 0x4000 //TX_NFC_GAINFAC -113 0x0000 //TX_MAINMIC_BLKFACTOR -114 0x0000 //TX_REFMIC_BLKFACTOR -115 0x0000 //TX_BLMIC_BLKFACTOR -116 0x0000 //TX_BRMIC_BLKFACTOR -117 0x0031 //TX_MICBLK_START_BIN -118 0x0060 //TX_MICBLK_END_BIN -119 0x0015 //TX_MICBLK_FE_HOLD -120 0xFFF2 //TX_MICBLK_MR_EXP_TH -121 0xFFF2 //TX_MICBLK_LR_EXP_TH -122 0x0000 //TX_FENE_HOLD -123 0x4000 //TX_FE_ENER_TH_MTS -124 0x0004 //TX_FE_ENER_TH_EXP -125 0x6000 //TX_C_POST_FLT_MIC_MAINBLK -126 0x6000 //TX_C_POST_FLT_MIC_REFBLK -127 0x0010 //TX_MIC_BLOCK_N -128 0x7646 //TX_A_HP -129 0x4000 //TX_B_PE -130 0x1800 //TX_THR_PITCH_DET_0 -131 0x1000 //TX_THR_PITCH_DET_1 -132 0x0800 //TX_THR_PITCH_DET_2 -133 0x0008 //TX_PITCH_BFR_LEN -134 0x0003 //TX_SBD_PITCH_DET -135 0x0050 //TX_TD_AEC_L -136 0x4000 //TX_MU0_UNP_TD_AEC -137 0x1000 //TX_MU0_PTD_TD_AEC -138 0x0000 //TX_PP_RESRV_0 -139 0x2A94 //TX_PP_RESRV_1 -140 0x55F0 //TX_PP_RESRV_2 -141 0x0000 //TX_PP_RESRV_3 -142 0x0000 //TX_PP_RESRV_4 -143 0x0000 //TX_PP_RESRV_5 -144 0x0000 //TX_PP_RESRV_6 -145 0x0000 //TX_PP_RESRV_7 -146 0x0028 //TX_TAIL_LENGTH -147 0x0800 //TX_AEC_REF_GAIN_0 -148 0x0800 //TX_AEC_REF_GAIN_1 -149 0x0800 //TX_AEC_REF_GAIN_2 -150 0x6000 //TX_EAD_THR -151 0x2000 //TX_THR_RE_EST -152 0x0100 //TX_MIN_EQ_RE_EST_0 -153 0x0100 //TX_MIN_EQ_RE_EST_1 -154 0x0100 //TX_MIN_EQ_RE_EST_2 -155 0x0200 //TX_MIN_EQ_RE_EST_3 -156 0x0200 //TX_MIN_EQ_RE_EST_4 -157 0x0200 //TX_MIN_EQ_RE_EST_5 -158 0x0200 //TX_MIN_EQ_RE_EST_6 -159 0x0200 //TX_MIN_EQ_RE_EST_7 -160 0x1000 //TX_MIN_EQ_RE_EST_8 -161 0x1000 //TX_MIN_EQ_RE_EST_9 -162 0x1000 //TX_MIN_EQ_RE_EST_10 -163 0x0400 //TX_MIN_EQ_RE_EST_11 -164 0x1000 //TX_MIN_EQ_RE_EST_12 -165 0x3000 //TX_LAMBDA_RE_EST -166 0x1000 //TX_LAMBDA_CB_NLE -167 0x0400 //TX_C_POST_FLT -168 0x4000 //TX_GAIN_NP -169 0x003C //TX_SE_HOLD_N -170 0x0046 //TX_DT_HOLD_N -171 0x03E8 //TX_DT2_HOLD_N -172 0x6666 //TX_AEC_RESRV_0 -173 0x0000 //TX_AEC_RESRV_1 -174 0x0014 //TX_AEC_RESRV_2 -175 0x0000 //TX_MIC_DELAY_LENGTH -176 0x0000 //TX_REF_DELAY_LENGTH -177 0x0000 //TX_ADD_LINEIN_GAINL -178 0x0000 //TX_ADD_LINEIN_GAINH -179 0x0000 //TX_MIN_EQ_RE_EST_14 -180 0x0000 //TX_DTD_THR1_8 -181 0x7FFF //TX_DTD_THR2_8 -182 0x0000 //TX_DTD_MIC_BLK2 -183 0x0008 //TX_FRQ_LIN_LEN -184 0x7FFF //TX_FRQ_AEC_LEN_RHO -185 0x6000 //TX_MU0_UNP_FRQ_AEC -186 0x4000 //TX_MU0_PTD_FRQ_AEC -187 0x000A //TX_MINENOISETH -188 0x0800 //TX_MU0_RE_EST -189 0x0001 //TX_AEC_NUM_CH -190 0x0000 //TX_BIGECHOATTENUATION_MAX -191 0x2000 //TX_A_POST_FLT_MICBLK -192 0x0000 //TX_BLKENERTH -193 0x0000 //TX_BLKENERHIGHTH -194 0x0000 //TX_NORMENERTH -195 0x0000 //TX_NORMENERHIGHTH -196 0x0000 //TX_NORMENERHIGHTHL -197 0x7B00 //TX_DTD_THR1_0 -198 0x7B00 //TX_DTD_THR1_1 -199 0x7B00 //TX_DTD_THR1_2 -200 0x7B00 //TX_DTD_THR1_3 -201 0x7B00 //TX_DTD_THR1_4 -202 0x7B00 //TX_DTD_THR1_5 -203 0x7B00 //TX_DTD_THR1_6 -204 0x1000 //TX_DTD_THR2_0 -205 0x1000 //TX_DTD_THR2_1 -206 0x1000 //TX_DTD_THR2_2 -207 0x1000 //TX_DTD_THR2_3 -208 0x1000 //TX_DTD_THR2_4 -209 0x1000 //TX_DTD_THR2_5 -210 0x1000 //TX_DTD_THR2_6 -211 0x7FFF //TX_DTD_THR3 -212 0x0000 //TX_SPK_CUT_K -213 0x0FA0 //TX_DT_CUT_K -214 0x0100 //TX_DT_CUT_THR -215 0x04EB //TX_COMFORT_G -216 0x01F4 //TX_POWER_YOUT_TH -217 0x4000 //TX_FDPFGAINECHO -218 0x0000 //TX_DTD_HD_THR -219 0x0000 //TX_SPK_CUT_K_S -220 0x0000 //TX_DTD_MIC_BLK -221 0x0400 //TX_ADPT_STRICT_L -222 0x0200 //TX_ADPT_STRICT_H -223 0x0000 //TX_RATIO_DT_L_TH_LOW -224 0x0000 //TX_RATIO_DT_H_TH_LOW -225 0x0000 //TX_RATIO_DT_L_TH_HIGH -226 0x0000 //TX_RATIO_DT_H_TH_HIGH -227 0x0000 //TX_RATIO_DT_L0_TH -228 0x2000 //TX_B_POST_FILT_ECHO_L -229 0x2000 //TX_B_POST_FILT_ECHO_H -230 0x0200 //TX_MIN_G_CTRL_ECHO -231 0x7FFF //TX_B_LESSCUT_RTO_ECHO -232 0x0000 //TX_EPD_OFFSET_00 -233 0x0000 //TX_EPD_OFFST_01 -234 0x0000 //TX_RATIO_DT_L0_TH_HIGH -235 0x3A98 //TX_RATIO_DT_H_TH_CUT -236 0x7FFF //TX_MIN_EQ_RE_EST_13 -237 0x0000 //TX_DTD_THR1_7 -238 0x0000 //TX_DTD_THR2_7 -239 0x0800 //TX_DT_RESRV_7 -240 0x0800 //TX_DT_RESRV_8 -241 0x0000 //TX_DT_RESRV_9 -242 0xF800 //TX_THR_SN_EST_0 -243 0xF800 //TX_THR_SN_EST_1 -244 0xFA00 //TX_THR_SN_EST_2 -245 0xF900 //TX_THR_SN_EST_3 -246 0xF900 //TX_THR_SN_EST_4 -247 0xFA00 //TX_THR_SN_EST_5 -248 0xF800 //TX_THR_SN_EST_6 -249 0xF700 //TX_THR_SN_EST_7 -250 0x0000 //TX_DELTA_THR_SN_EST_0 -251 0x01A0 //TX_DELTA_THR_SN_EST_1 -252 0x0100 //TX_DELTA_THR_SN_EST_2 -253 0x0200 //TX_DELTA_THR_SN_EST_3 -254 0x01A0 //TX_DELTA_THR_SN_EST_4 -255 0x0100 //TX_DELTA_THR_SN_EST_5 -256 0x0000 //TX_DELTA_THR_SN_EST_6 -257 0x0200 //TX_DELTA_THR_SN_EST_7 -258 0x4000 //TX_LAMBDA_NN_EST_0 -259 0x4000 //TX_LAMBDA_NN_EST_1 -260 0x3000 //TX_LAMBDA_NN_EST_2 -261 0x4000 //TX_LAMBDA_NN_EST_3 -262 0x3000 //TX_LAMBDA_NN_EST_4 -263 0x3000 //TX_LAMBDA_NN_EST_5 -264 0x4000 //TX_LAMBDA_NN_EST_6 -265 0x4000 //TX_LAMBDA_NN_EST_7 -266 0x0400 //TX_N_SN_EST -267 0x001E //TX_INBEAM_T -268 0x0041 //TX_INBEAMHOLDT -269 0x2000 //TX_G_STRICT -270 0x0000 //TX_EQ_THR_BF -271 0x799A //TX_LAMBDA_EQ_BF -272 0x3000 //TX_NE_RTO_TH -273 0x1000 //TX_NE_RTO_TH_L -274 0x3000 //TX_MAINREFRTOH_TH_H -275 0x1000 //TX_MAINREFRTOH_TH_L -276 0x3000 //TX_MAINREFRTO_TH_H -277 0x1000 //TX_MAINREFRTO_TH_L -278 0x0200 //TX_MAINREFRTO_TH_EQ -279 0x4000 //TX_B_POST_FLT_0 -280 0x4000 //TX_B_POST_FLT_1 -281 0x0014 //TX_NS_LVL_CTRL_0 -282 0x001B //TX_NS_LVL_CTRL_1 -283 0x0019 //TX_NS_LVL_CTRL_2 -284 0x0017 //TX_NS_LVL_CTRL_3 -285 0x0017 //TX_NS_LVL_CTRL_4 -286 0x0019 //TX_NS_LVL_CTRL_5 -287 0x0014 //TX_NS_LVL_CTRL_6 -288 0x0010 //TX_NS_LVL_CTRL_7 -289 0x0010 //TX_MIN_GAIN_S_0 -290 0x000C //TX_MIN_GAIN_S_1 -291 0x000C //TX_MIN_GAIN_S_2 -292 0x0010 //TX_MIN_GAIN_S_3 -293 0x0010 //TX_MIN_GAIN_S_4 -294 0x000C //TX_MIN_GAIN_S_5 -295 0x0014 //TX_MIN_GAIN_S_6 -296 0x0014 //TX_MIN_GAIN_S_7 -297 0x5000 //TX_NMOS_SUP -298 0x0000 //TX_NS_MAX_PRI_SNR_TH -299 0x0000 //TX_NMOS_SUP_MENSA -300 0x4000 //TX_SNRI_SUP_0 -301 0x4000 //TX_SNRI_SUP_1 -302 0x4000 //TX_SNRI_SUP_2 -303 0x4000 //TX_SNRI_SUP_3 -304 0x4000 //TX_SNRI_SUP_4 -305 0x4000 //TX_SNRI_SUP_5 -306 0x7FFF //TX_SNRI_SUP_6 -307 0x3000 //TX_SNRI_SUP_7 -308 0x3000 //TX_THR_LFNS -309 0x001A //TX_G_LFNS -310 0x09C4 //TX_GAIN0_NTH -311 0x000A //TX_MUSIC_MORENS -312 0x7FFF //TX_A_POST_FILT_0 -313 0x2000 //TX_A_POST_FILT_1 -314 0x2000 //TX_A_POST_FILT_S_0 -315 0x7000 //TX_A_POST_FILT_S_1 -316 0x6000 //TX_A_POST_FILT_S_2 -317 0x5000 //TX_A_POST_FILT_S_3 -318 0x2000 //TX_A_POST_FILT_S_4 -319 0x6000 //TX_A_POST_FILT_S_5 -320 0x2000 //TX_A_POST_FILT_S_6 -321 0x7000 //TX_A_POST_FILT_S_7 -322 0x4000 //TX_B_POST_FILT_0 -323 0x4000 //TX_B_POST_FILT_1 -324 0x7FFF //TX_B_POST_FILT_2 -325 0x5000 //TX_B_POST_FILT_3 -326 0x7FFF //TX_B_POST_FILT_4 -327 0x7FFF //TX_B_POST_FILT_5 -328 0x4000 //TX_B_POST_FILT_6 -329 0x2000 //TX_B_POST_FILT_7 -330 0x7FFF //TX_B_LESSCUT_RTO_S_0 -331 0x7FFF //TX_B_LESSCUT_RTO_S_1 -332 0x7FFF //TX_B_LESSCUT_RTO_S_2 -333 0x7FFF //TX_B_LESSCUT_RTO_S_3 -334 0x7FFF //TX_B_LESSCUT_RTO_S_4 -335 0x7FFF //TX_B_LESSCUT_RTO_S_5 -336 0x7FFF //TX_B_LESSCUT_RTO_S_6 -337 0x7FFF //TX_B_LESSCUT_RTO_S_7 -338 0x7E14 //TX_LAMBDA_PFILT -339 0x7C29 //TX_LAMBDA_PFILT_S_0 -340 0x7C29 //TX_LAMBDA_PFILT_S_1 -341 0x7200 //TX_LAMBDA_PFILT_S_2 -342 0x7900 //TX_LAMBDA_PFILT_S_3 -343 0x7400 //TX_LAMBDA_PFILT_S_4 -344 0x7200 //TX_LAMBDA_PFILT_S_5 -345 0x7C29 //TX_LAMBDA_PFILT_S_6 -346 0x7C29 //TX_LAMBDA_PFILT_S_7 -347 0x0200 //TX_K_PEPPER -348 0x0800 //TX_A_PEPPER -349 0x0C80 //TX_K_PEPPER_HF -350 0x0400 //TX_A_PEPPER_HF -351 0x0001 //TX_HMNC_BST_FLG -352 0x4000 //TX_HMNC_BST_THR -353 0x0800 //TX_DT_BINVAD_TH_0 -354 0x0800 //TX_DT_BINVAD_TH_1 -355 0x0800 //TX_DT_BINVAD_TH_2 -356 0x0800 //TX_DT_BINVAD_TH_3 -357 0x0000 //TX_DT_BINVAD_ENDF -358 0x1000 //TX_C_POST_FLT_DT -359 0x7FFF //TX_NS_B_POST_FLT_LESSCUT -360 0x0100 //TX_DT_BOOST -361 0x0000 //TX_BF_SGRAD_FLG -362 0x0005 //TX_BF_DVG_TH -363 0x001E //TX_SN_C_F -364 0x0000 //TX_K_APT -365 0x0001 //TX_NOISEDET -366 0x0190 //TX_NDETCT -367 0x0004 //TX_NOISE_TH_0 -368 0x1B58 //TX_NOISE_TH_0_2 -369 0x2134 //TX_NOISE_TH_0_3 -370 0x0320 //TX_NOISE_TH_1 -371 0x022C //TX_NOISE_TH_2 -372 0x2710 //TX_NOISE_TH_3 -373 0x6B6C //TX_NOISE_TH_4 -374 0x7FFF //TX_NOISE_TH_5 -375 0x7FFF //TX_NOISE_TH_5_2 -376 0x0000 //TX_NOISE_TH_5_3 -377 0x0000 //TX_NOISE_TH_5_4 -378 0x07D0 //TX_NOISE_TH_6 -379 0x0004 //TX_MINENOISE_TH -380 0x4000 //TX_MINENOISE_MIC0_TH_MTS -381 0xFFEE //TX_MINENOISE_MIC0_TH_EXP -382 0x6000 //TX_MINENOISE_MIC0_S_TH_MTS -383 0xFFF3 //TX_MINENOISE_MIC0_S_TH_EXP -384 0x00A5 //TX_OUT_ENER_S_TH_CLEAN -385 0x00A5 //TX_OUT_ENER_S_TH_LESSCLEAN -386 0x00A5 //TX_OUT_ENER_S_TH_NOISY -387 0x0029 //TX_OUT_ENER_TH_NOISE -388 0x00CE //TX_OUT_ENER_TH_SPEECH -389 0x2000 //TX_SN_NPB_GAIN -390 0x0000 //TX_NN_NPB_GAIN -391 0x0000 //TX_CSX_ALPHA_0 -392 0x0000 //TX_CSX_ALPHA_1 -393 0x0000 //TX_CSX_ALPHA_2 -394 0x0000 //TX_CSX_ALPHA_3 -395 0x0800 //TX_MU_ARSP_EST -396 0x00C8 //TX_P_OUTBEAM_MIN_TH -397 0x0002 //TX_EXTRA_NS_L -398 0x0800 //TX_EXTRA_NS_A -399 0x0005 //TX_VR_NOISE_FLOOR_TH -400 0x0148 //TX_MIN_G_LOW300HZ -401 0x0001 //TX_MAXLEVEL_CNG -402 0x00B4 //TX_STN_NOISE_TH -403 0x4000 //TX_POST_MASK_SUP -404 0x7FFF //TX_POST_MASK_ADJUST -405 0x000A //TX_NS_ENOISE_MIC0_TH -406 0x0004 //TX_MINENOISE_MIC0_TH -407 0x0014 //TX_MINENOISE_MIC0_S_TH -408 0x4900 //TX_MIN_G_CTRL_SSNS -409 0x0400 //TX_METAL_RTO_THR -410 0x0FA0 //TX_NS_FP_K_METAL -411 0x3A98 //TX_NOISEDET_BOOST_TH -412 0x0FA0 //TX_NSMOOTH_TH -413 0x0000 //TX_NS_RESRV_8 -414 0x1800 //TX_RHO_UPB -415 0x2328 //TX_N_HOLD_HS -416 0x006E //TX_N_RHO_BFR0 -417 0x7FFF //TX_LAMBDA_ARSP_EST -418 0x0100 //TX_EXTRA_GAIN_MICBLOCK -419 0x0333 //TX_THR_STD_NSR -420 0x019A //TX_THR_STD_PLH -421 0x03E8 //TX_N_HOLD_STD -422 0x0066 //TX_THR_STD_RHO -423 0x4000 //TX_BF_RESET_THR_HS -424 0x0CCD //TX_SB_RTO_MEAN_TH -425 0x0280 //TX_SB_RHO_MEAN_TH_NTALK -426 0x3800 //TX_SB_RTO_MEAN_TH_ABN -427 0x2EE0 //TX_SB_RTO_MEAN_TH_RUB -428 0x0990 //TX_WTA_EN_RTO_TH -429 0x1400 //TX_TOP_ENER_TH_F -430 0x0100 //TX_DESIRED_TALK_HOLDT -431 0x0800 //TX_MIC_BLOCK_FACTOR -432 0x0000 //TX_NSEST_BFRLRNRDC -433 0x0000 //TX_THR_POST_FLT_HS -434 0x0010 //TX_HS_VAD_BIN -435 0x2666 //TX_THR_VAD_HS -436 0x2CCD //TX_MEAN_RTO_MIN_TH2 -437 0x0032 //TX_SILENCE_T -438 0x0000 //TX_A_POST_FLT_WTA -439 0x799A //TX_LAMBDA_PFLT_WTA -440 0x0000 //TX_SB_RHO_MEAN2_TH -441 0x0640 //TX_SB_RHO_MEAN3_TH -442 0x0000 //TX_HS_RESRV_4 -443 0x0000 //TX_HS_RESRV_5 -444 0x003C //TX_DOA_VAD_THR_1 -445 0x003C //TX_DOA_VAD_THR_2 -446 0x0028 //TX_DOA_VAD_THR1_0 -447 0x0028 //TX_DOA_VAD_THR1_1 -448 0x0000 //TX_SRC_DOA_RNG_LOW_0A -449 0x00B4 //TX_SRC_DOA_RNG_HIGH_0A -450 0x005A //TX_DFLT_SRC_DOA_0A -451 0x0000 //TX_SRC_DOA_RNG_LOW_0B -452 0x0000 //TX_SRC_DOA_RNG_HIGH_0B -453 0x0000 //TX_DFLT_SRC_DOA_0B -454 0x0000 //TX_SRC_DOA_RNG_LOW_0C -455 0x0000 //TX_SRC_DOA_RNG_HIGH_0C -456 0x0000 //TX_DFLT_SRC_DOA_0C -457 0x0000 //TX_SRC_DOA_RNG_LOW_0D -458 0x0000 //TX_SRC_DOA_RNG_HIGH_0D -459 0x0000 //TX_DFLT_SRC_DOA_0D -460 0x0000 //TX_SRC_DOA_RNG_LOW_1A -461 0x00B4 //TX_SRC_DOA_RNG_HIGH_1A -462 0x005A //TX_DFLT_SRC_DOA_1A -463 0x0000 //TX_SRC_DOA_RNG_LOW_1B -464 0x00B4 //TX_SRC_DOA_RNG_HIGH_1B -465 0x005A //TX_DFLT_SRC_DOA_1B -466 0x0000 //TX_SRC_DOA_RNG_LOW_1C -467 0x00B4 //TX_SRC_DOA_RNG_HIGH_1C -468 0x005A //TX_DFLT_SRC_DOA_1C -469 0x0000 //TX_SRC_DOA_RNG_LOW_1D -470 0x00B4 //TX_SRC_DOA_RNG_HIGH_1D -471 0x005A //TX_DFLT_SRC_DOA_1D -472 0x0100 //TX_BF_HOLDOFF_T -473 0x7FFF //TX_DOA_COST_FACTOR -474 0x0D9A //TX_MAINTOREFR_TH0 -475 0x071C //TX_DOA_TRK_THR -476 0x012C //TX_DOA_TRACK_HT -477 0x0200 //TX_N1_HOLD_HF -478 0x0100 //TX_N2_HOLD_HF -479 0x2A3D //TX_BF_RESET_THR_HF -480 0x7333 //TX_DOA_SMOOTH -481 0x0800 //TX_MU_BF -482 0x0800 //TX_BF_MU_LF_B2 -483 0x0040 //TX_BF_FC_END_BIN_B2 -484 0x0020 //TX_BF_FC_END_BIN -485 0x0000 //TX_HF_RESRV_25 -486 0x0000 //TX_HF_RESRV_26 -487 0x0007 //TX_N_DOA_SEED -488 0x0001 //TX_FINE_DOA_SEARCH_FLG -489 0x0000 //TX_HF_RESRV_27 -490 0x038E //TX_DLT_SRC_DOA_RNG -491 0x0200 //TX_BF_MU_LF -492 0x0000 //TX_DFLT_SRC_LOC_0 -493 0x7FFF //TX_DFLT_SRC_LOC_1 -494 0x0000 //TX_DFLT_SRC_LOC_2 -495 0x038E //TX_DOA_TRACK_VADTH -496 0x0000 //TX_DOA_TRACK_NEW -497 0x01E0 //TX_NOR_OFF_THR -498 0x7C00 //TX_MORE_ON_700HZ_THR -499 0x2000 //TX_MU_BF_ADPT_NS -500 0x0000 //TX_ADAPT_LEN -501 0x6666 //TX_MORE_SNS -502 0x0000 //TX_NOR_OFF_TH1 -503 0x0000 //TX_WIDE_MASK_TH -504 0xD333 //TX_SUBSNRATIOHIGH4MEANBCK_THR -505 0x6000 //TX_C_POST_FLT_CUT -506 0x2000 //TX_RADIODTLV -507 0x0320 //TX_POWER_LINEIN_TH -508 0x0014 //TX_FE_VADCOUNT_TH_FC -509 0x0000 //TX_ECHO_SUPP_FC -510 0x0C80 //TX_ECHO_TH -511 0x6666 //TX_MIC_TO_BFGAIN -512 0x0000 //TX_MICTOBFGAIN0 -513 0x0000 //TX_FASTMUE_TH -514 0x0000 //TX_DERVB_LEN_0 -515 0x0000 //TX_DERVB_LEN_1 -516 0x0000 //TX_RHO_DERVB -517 0x0000 //TX_MIC_INDX_DERVB -518 0x0000 //TX_MU_DERVB -519 0x0000 //TX_DR_RESRV_0 -520 0x0000 //TX_DR_RESRV_1 -521 0x0000 //TX_DR_RESRV_2 -522 0x0000 //TX_DR_RESRV_3 -523 0x0000 //TX_DR_RESRV_4 -524 0x0000 //TX_DR_RESRV_5 -525 0x0000 //TX_DR_RESRV_6 -526 0x0000 //TX_DR_RESRV_7 -527 0x0000 //TX_DR_RESRV_8 -528 0x1333 //TX_WIND_MARK_TH -529 0x399A //TX_CORR_THR -530 0x0004 //TX_SNR_THR -531 0x0010 //TX_ENGY_THR -532 0x1770 //TX_CORR_HIGH_TH -533 0x6000 //TX_ENGY_THR_2 -534 0x3400 //TX_MEAN_RTO_THR -535 0x0028 //TX_WNS_ENOISE_MIC0_TH -536 0x3000 //TX_RATIOMICL_TH -537 0x7FFF //TX_CALIG_HS -538 0x0000 //TX_LVL_CTRL -539 0x0014 //TX_WIND_SUPRTO -540 0x001A //TX_WNS_MIN_G -541 0x0600 //TX_WNS_B_POST_FLT -542 0x2800 //TX_RATIOMICH_TH -543 0xD120 //TX_WIND_INBEAM_L_TH -544 0x0FA0 //TX_WIND_INBEAM_H_TH -545 0x2000 //TX_WNS_RESRV_0 -546 0x59D8 //TX_WNS_RESRV_1 -547 0x0080 //TX_WNS_RESRV_2 -548 0x0000 //TX_WNS_RESRV_3 -549 0x0000 //TX_WNS_RESRV_4 -550 0x0000 //TX_WNS_RESRV_5 -551 0x0000 //TX_WNS_RESRV_6 -552 0x0000 //TX_PB_B_POST_FLT_LESSCUT -553 0x0070 //TX_BF_LESSCUT_BBIN -554 0x0070 //TX_BF_LESSCUT_EBIN -555 0x0010 //TX_POSTBFB0 -556 0x0070 //TX_POSTBFB -557 0x00B0 //TX_POSTBFE -558 0x0E66 //TX_SPEECH_SNR_TH -559 0x0050 //TX_PB_MAX_PRI_SNR_TH -560 0x770A //TX_MAX_PRI_SNR_TH_L -561 0x0000 //TX_PFGAIN -562 0x0000 //TX_MAINTOREFR_TH -563 0x0000 //TX_SAM_MARK -564 0x0000 //TX_PB_RESRV_0 -565 0x0000 //TX_PB_RESRV_1 -566 0x0018 //TX_FDEQ_SUBNUM -567 0x6C60 //TX_FDEQ_GAIN_0 -568 0x584F //TX_FDEQ_GAIN_1 -569 0x4F4E //TX_FDEQ_GAIN_2 -570 0x474A //TX_FDEQ_GAIN_3 -571 0x473F //TX_FDEQ_GAIN_4 -572 0x403B //TX_FDEQ_GAIN_5 -573 0x3933 //TX_FDEQ_GAIN_6 -574 0x302B //TX_FDEQ_GAIN_7 -575 0x2220 //TX_FDEQ_GAIN_8 -576 0x383C //TX_FDEQ_GAIN_9 -577 0x4848 //TX_FDEQ_GAIN_10 -578 0x4848 //TX_FDEQ_GAIN_11 -579 0x4848 //TX_FDEQ_GAIN_12 -580 0x4848 //TX_FDEQ_GAIN_13 -581 0x4848 //TX_FDEQ_GAIN_14 -582 0x4848 //TX_FDEQ_GAIN_15 -583 0x4848 //TX_FDEQ_GAIN_16 -584 0x4848 //TX_FDEQ_GAIN_17 -585 0x4848 //TX_FDEQ_GAIN_18 -586 0x4848 //TX_FDEQ_GAIN_19 -587 0x4848 //TX_FDEQ_GAIN_20 -588 0x4848 //TX_FDEQ_GAIN_21 -589 0x4848 //TX_FDEQ_GAIN_22 -590 0x4848 //TX_FDEQ_GAIN_23 -591 0x0202 //TX_FDEQ_BIN_0 -592 0x0104 //TX_FDEQ_BIN_1 -593 0x0502 //TX_FDEQ_BIN_2 -594 0x0202 //TX_FDEQ_BIN_3 -595 0x0504 //TX_FDEQ_BIN_4 -596 0x0708 //TX_FDEQ_BIN_5 -597 0x0808 //TX_FDEQ_BIN_6 -598 0x050E //TX_FDEQ_BIN_7 -599 0x0B0C //TX_FDEQ_BIN_8 -600 0x0F0F //TX_FDEQ_BIN_9 -601 0x0000 //TX_FDEQ_BIN_10 -602 0x0000 //TX_FDEQ_BIN_11 -603 0x0000 //TX_FDEQ_BIN_12 -604 0x0000 //TX_FDEQ_BIN_13 -605 0x0000 //TX_FDEQ_BIN_14 -606 0x0000 //TX_FDEQ_BIN_15 -607 0x0000 //TX_FDEQ_BIN_16 -608 0x0000 //TX_FDEQ_BIN_17 -609 0x0000 //TX_FDEQ_BIN_18 -610 0x0000 //TX_FDEQ_BIN_19 -611 0x0000 //TX_FDEQ_BIN_20 -612 0x0000 //TX_FDEQ_BIN_21 -613 0x0000 //TX_FDEQ_BIN_22 -614 0x0000 //TX_FDEQ_BIN_23 -615 0x0000 //TX_FDEQ_PADDING -616 0x0030 //TX_PREEQ_SUBNUM_MIC0 -617 0x4848 //TX_PREEQ_GAIN_MIC0_0 -618 0x4848 //TX_PREEQ_GAIN_MIC0_1 -619 0x4848 //TX_PREEQ_GAIN_MIC0_2 -620 0x4848 //TX_PREEQ_GAIN_MIC0_3 -621 0x4848 //TX_PREEQ_GAIN_MIC0_4 -622 0x4848 //TX_PREEQ_GAIN_MIC0_5 -623 0x4848 //TX_PREEQ_GAIN_MIC0_6 -624 0x4846 //TX_PREEQ_GAIN_MIC0_7 -625 0x4544 //TX_PREEQ_GAIN_MIC0_8 -626 0x4241 //TX_PREEQ_GAIN_MIC0_9 -627 0x4848 //TX_PREEQ_GAIN_MIC0_10 -628 0x4848 //TX_PREEQ_GAIN_MIC0_11 -629 0x4848 //TX_PREEQ_GAIN_MIC0_12 -630 0x4848 //TX_PREEQ_GAIN_MIC0_13 -631 0x4848 //TX_PREEQ_GAIN_MIC0_14 -632 0x4848 //TX_PREEQ_GAIN_MIC0_15 -633 0x4848 //TX_PREEQ_GAIN_MIC0_16 -634 0x4848 //TX_PREEQ_GAIN_MIC0_17 -635 0x4848 //TX_PREEQ_GAIN_MIC0_18 -636 0x4848 //TX_PREEQ_GAIN_MIC0_19 -637 0x4848 //TX_PREEQ_GAIN_MIC0_20 -638 0x4848 //TX_PREEQ_GAIN_MIC0_21 -639 0x4848 //TX_PREEQ_GAIN_MIC0_22 -640 0x4848 //TX_PREEQ_GAIN_MIC0_23 -641 0x0202 //TX_PREEQ_BIN_MIC0_0 -642 0x0203 //TX_PREEQ_BIN_MIC0_1 -643 0x0303 //TX_PREEQ_BIN_MIC0_2 -644 0x0304 //TX_PREEQ_BIN_MIC0_3 -645 0x0405 //TX_PREEQ_BIN_MIC0_4 -646 0x0506 //TX_PREEQ_BIN_MIC0_5 -647 0x0708 //TX_PREEQ_BIN_MIC0_6 -648 0x090A //TX_PREEQ_BIN_MIC0_7 -649 0x0B0C //TX_PREEQ_BIN_MIC0_8 -650 0x0D0E //TX_PREEQ_BIN_MIC0_9 -651 0x0000 //TX_PREEQ_BIN_MIC0_10 -652 0x0000 //TX_PREEQ_BIN_MIC0_11 -653 0x0000 //TX_PREEQ_BIN_MIC0_12 -654 0x0000 //TX_PREEQ_BIN_MIC0_13 -655 0x0000 //TX_PREEQ_BIN_MIC0_14 -656 0x0000 //TX_PREEQ_BIN_MIC0_15 -657 0x0000 //TX_PREEQ_BIN_MIC0_16 -658 0x0000 //TX_PREEQ_BIN_MIC0_17 -659 0x0000 //TX_PREEQ_BIN_MIC0_18 -660 0x0000 //TX_PREEQ_BIN_MIC0_19 -661 0x0000 //TX_PREEQ_BIN_MIC0_20 -662 0x0000 //TX_PREEQ_BIN_MIC0_21 -663 0x0000 //TX_PREEQ_BIN_MIC0_22 -664 0x0000 //TX_PREEQ_BIN_MIC0_23 -665 0x0014 //TX_PREEQ_SUBNUM_MIC1 -666 0x4848 //TX_PREEQ_GAIN_MIC1_0 -667 0x4848 //TX_PREEQ_GAIN_MIC1_1 -668 0x4848 //TX_PREEQ_GAIN_MIC1_2 -669 0x4848 //TX_PREEQ_GAIN_MIC1_3 -670 0x4848 //TX_PREEQ_GAIN_MIC1_4 -671 0x4848 //TX_PREEQ_GAIN_MIC1_5 -672 0x4848 //TX_PREEQ_GAIN_MIC1_6 -673 0x4848 //TX_PREEQ_GAIN_MIC1_7 -674 0x4A4C //TX_PREEQ_GAIN_MIC1_8 -675 0x4E50 //TX_PREEQ_GAIN_MIC1_9 -676 0x4848 //TX_PREEQ_GAIN_MIC1_10 -677 0x4848 //TX_PREEQ_GAIN_MIC1_11 -678 0x4848 //TX_PREEQ_GAIN_MIC1_12 -679 0x4848 //TX_PREEQ_GAIN_MIC1_13 -680 0x4848 //TX_PREEQ_GAIN_MIC1_14 -681 0x4848 //TX_PREEQ_GAIN_MIC1_15 -682 0x4848 //TX_PREEQ_GAIN_MIC1_16 -683 0x4848 //TX_PREEQ_GAIN_MIC1_17 -684 0x4848 //TX_PREEQ_GAIN_MIC1_18 -685 0x4848 //TX_PREEQ_GAIN_MIC1_19 -686 0x4848 //TX_PREEQ_GAIN_MIC1_20 -687 0x4848 //TX_PREEQ_GAIN_MIC1_21 -688 0x4848 //TX_PREEQ_GAIN_MIC1_22 -689 0x4848 //TX_PREEQ_GAIN_MIC1_23 -690 0x0203 //TX_PREEQ_BIN_MIC1_0 -691 0x0203 //TX_PREEQ_BIN_MIC1_1 -692 0x0303 //TX_PREEQ_BIN_MIC1_2 -693 0x0304 //TX_PREEQ_BIN_MIC1_3 -694 0x0405 //TX_PREEQ_BIN_MIC1_4 -695 0x0506 //TX_PREEQ_BIN_MIC1_5 -696 0x0708 //TX_PREEQ_BIN_MIC1_6 -697 0x090A //TX_PREEQ_BIN_MIC1_7 -698 0x0B0C //TX_PREEQ_BIN_MIC1_8 -699 0x0D0E //TX_PREEQ_BIN_MIC1_9 -700 0x0000 //TX_PREEQ_BIN_MIC1_10 -701 0x0000 //TX_PREEQ_BIN_MIC1_11 -702 0x0000 //TX_PREEQ_BIN_MIC1_12 -703 0x0000 //TX_PREEQ_BIN_MIC1_13 -704 0x0000 //TX_PREEQ_BIN_MIC1_14 -705 0x0000 //TX_PREEQ_BIN_MIC1_15 -706 0x0000 //TX_PREEQ_BIN_MIC1_16 -707 0x0000 //TX_PREEQ_BIN_MIC1_17 -708 0x0000 //TX_PREEQ_BIN_MIC1_18 -709 0x0000 //TX_PREEQ_BIN_MIC1_19 -710 0x0000 //TX_PREEQ_BIN_MIC1_20 -711 0x0000 //TX_PREEQ_BIN_MIC1_21 -712 0x0000 //TX_PREEQ_BIN_MIC1_22 -713 0x0000 //TX_PREEQ_BIN_MIC1_23 -714 0x0030 //TX_PREEQ_SUBNUM_MIC2 -715 0x4848 //TX_PREEQ_GAIN_MIC2_0 -716 0x4848 //TX_PREEQ_GAIN_MIC2_1 -717 0x4848 //TX_PREEQ_GAIN_MIC2_2 -718 0x4848 //TX_PREEQ_GAIN_MIC2_3 -719 0x4848 //TX_PREEQ_GAIN_MIC2_4 -720 0x4848 //TX_PREEQ_GAIN_MIC2_5 -721 0x4848 //TX_PREEQ_GAIN_MIC2_6 -722 0x4848 //TX_PREEQ_GAIN_MIC2_7 -723 0x4848 //TX_PREEQ_GAIN_MIC2_8 -724 0x4848 //TX_PREEQ_GAIN_MIC2_9 -725 0x4848 //TX_PREEQ_GAIN_MIC2_10 -726 0x4848 //TX_PREEQ_GAIN_MIC2_11 -727 0x4848 //TX_PREEQ_GAIN_MIC2_12 -728 0x4848 //TX_PREEQ_GAIN_MIC2_13 -729 0x4848 //TX_PREEQ_GAIN_MIC2_14 -730 0x4848 //TX_PREEQ_GAIN_MIC2_15 -731 0x4848 //TX_PREEQ_GAIN_MIC2_16 -732 0x4848 //TX_PREEQ_GAIN_MIC2_17 -733 0x4848 //TX_PREEQ_GAIN_MIC2_18 -734 0x4848 //TX_PREEQ_GAIN_MIC2_19 -735 0x4848 //TX_PREEQ_GAIN_MIC2_20 -736 0x4848 //TX_PREEQ_GAIN_MIC2_21 -737 0x4848 //TX_PREEQ_GAIN_MIC2_22 -738 0x4848 //TX_PREEQ_GAIN_MIC2_23 -739 0x0608 //TX_PREEQ_BIN_MIC2_0 -740 0x0808 //TX_PREEQ_BIN_MIC2_1 -741 0x0808 //TX_PREEQ_BIN_MIC2_2 -742 0x0808 //TX_PREEQ_BIN_MIC2_3 -743 0x0808 //TX_PREEQ_BIN_MIC2_4 -744 0x0808 //TX_PREEQ_BIN_MIC2_5 -745 0x0808 //TX_PREEQ_BIN_MIC2_6 -746 0x0808 //TX_PREEQ_BIN_MIC2_7 -747 0x0808 //TX_PREEQ_BIN_MIC2_8 -748 0x0808 //TX_PREEQ_BIN_MIC2_9 -749 0x0808 //TX_PREEQ_BIN_MIC2_10 -750 0x0808 //TX_PREEQ_BIN_MIC2_11 -751 0x0808 //TX_PREEQ_BIN_MIC2_12 -752 0x0808 //TX_PREEQ_BIN_MIC2_13 -753 0x0808 //TX_PREEQ_BIN_MIC2_14 -754 0x0200 //TX_PREEQ_BIN_MIC2_15 -755 0x0000 //TX_PREEQ_BIN_MIC2_16 -756 0x0000 //TX_PREEQ_BIN_MIC2_17 -757 0x0000 //TX_PREEQ_BIN_MIC2_18 -758 0x0000 //TX_PREEQ_BIN_MIC2_19 -759 0x0000 //TX_PREEQ_BIN_MIC2_20 -760 0x0000 //TX_PREEQ_BIN_MIC2_21 -761 0x0000 //TX_PREEQ_BIN_MIC2_22 -762 0x0000 //TX_PREEQ_BIN_MIC2_23 -763 0x0006 //TX_MASKING_ABILITY -764 0x0800 //TX_NND_WEIGHT -765 0x0065 //TX_MIC_CALIBRATION_0 -766 0x0065 //TX_MIC_CALIBRATION_1 -767 0x0065 //TX_MIC_CALIBRATION_2 -768 0x0065 //TX_MIC_CALIBRATION_3 -769 0x0044 //TX_MIC_PWR_BIAS_0 -770 0x0044 //TX_MIC_PWR_BIAS_1 -771 0x0044 //TX_MIC_PWR_BIAS_2 -772 0x0044 //TX_MIC_PWR_BIAS_3 -773 0x0000 //TX_GAIN_LIMIT_0 -774 0x0000 //TX_GAIN_LIMIT_1 -775 0x0006 //TX_GAIN_LIMIT_2 -776 0x0006 //TX_GAIN_LIMIT_3 -777 0x7F5B //TX_BVE_NOVAD0_ALPHADOWN -778 0x7FDE //TX_BVE_VAD0_ALPHAUP -779 0x7F3A //TX_BVE_VAD0_ALPHADOWN -780 0x2000 //TX_BVE_GAINWEIGHT_NOFEVADLI -781 0x7F5B //TX_BVE_FEVADLI_ALPHA -782 0x7F19 //TX_BVE_NOVAD0_ALPHAUP -783 0x1000 //TX_TDDRC_ALPHA_UP_01 -784 0x1000 //TX_TDDRC_ALPHA_UP_02 -785 0x1000 //TX_TDDRC_ALPHA_UP_03 -786 0x1000 //TX_TDDRC_ALPHA_UP_04 -787 0x7EB8 //TX_TDDRC_ALPHA_DWN_01 -788 0x7EB8 //TX_TDDRC_ALPHA_DWN_02 -789 0x7EB8 //TX_TDDRC_ALPHA_DWN_03 -790 0x7EB8 //TX_TDDRC_ALPHA_DWN_04 -791 0x7FFF //TX_TDDRC_TD_DRC_LIMIT -792 0x0800 //TX_TDDRC_POST_LIMIT_GAIN -793 0x0000 //TX_TDDRC_RESRV_0 -794 0x0000 //TX_TDDRC_RESRV_1 -795 0x0018 //TX_FDDRC_BAND_MARGIN_0 -796 0x0030 //TX_FDDRC_BAND_MARGIN_1 -797 0x0050 //TX_FDDRC_BAND_MARGIN_2 -798 0x0080 //TX_FDDRC_BAND_MARGIN_3 -799 0x0007 //TX_FDDRC_BLOCK_EXP -800 0x5000 //TX_FDDRC_THRD_2_0 -801 0x5000 //TX_FDDRC_THRD_2_1 -802 0x5000 //TX_FDDRC_THRD_2_2 -803 0x5000 //TX_FDDRC_THRD_2_3 -804 0x6400 //TX_FDDRC_THRD_3_0 -805 0x6400 //TX_FDDRC_THRD_3_1 -806 0x6400 //TX_FDDRC_THRD_3_2 -807 0x6400 //TX_FDDRC_THRD_3_3 -808 0x2000 //TX_FDDRC_SLANT_0_0 -809 0x2000 //TX_FDDRC_SLANT_0_1 -810 0x2000 //TX_FDDRC_SLANT_0_2 -811 0x2000 //TX_FDDRC_SLANT_0_3 -812 0x5333 //TX_FDDRC_SLANT_1_0 -813 0x5333 //TX_FDDRC_SLANT_1_1 -814 0x5333 //TX_FDDRC_SLANT_1_2 -815 0x5333 //TX_FDDRC_SLANT_1_3 -816 0x0010 //TX_DEADMIC_SILENCE_TH -817 0x0600 //TX_MIC_DEGRADE_TH -818 0x0078 //TX_DEADMIC_CNT -819 0x0078 //TX_MIC_DEGRADE_CNT -820 0x0000 //TX_FDDRC_RESRV_4 -821 0x0000 //TX_FDDRC_RESRV_5 -822 0x0000 //TX_FDDRC_RESRV_6 -823 0x7FFF //TX_KS_NOISEPASTE_FACTOR -824 0x0001 //TX_KS_CONFIG -825 0x7FFF //TX_KS_GAIN_MIN -826 0x0000 //TX_KS_RESRV_0 -827 0x0000 //TX_KS_RESRV_1 -828 0x0000 //TX_KS_RESRV_2 -829 0x7C00 //TX_LAMBDA_PKA_FP -830 0x2000 //TX_TPKA_FP -831 0x0080 //TX_MIN_G_FP -832 0x2000 //TX_MAX_G_FP -833 0x0FA0 //TX_FFP_FP_K_METAL -834 0x4000 //TX_A_POST_FLT_FP -835 0x0F5C //TX_RTO_OUTBEAM_TH -836 0x4CCD //TX_TPKA_FP_THD -837 0x0000 //TX_MAX_G_FP_BLK -838 0x0000 //TX_FFP_FADEIN -839 0x0000 //TX_FFP_FADEOUT -840 0x0000 //TX_WHISPERCTH -841 0x0000 //TX_WHISPERHOLDT -842 0x0000 //TX_WHISP_ENTHH -843 0x0000 //TX_WHISP_ENTHL -844 0x0000 //TX_WHISP_RTOTH -845 0x0000 //TX_WHISP_RTOTH2 -846 0x0096 //TX_MUTE_PERIOD -847 0x0000 //TX_FADE_IN_PERIOD -848 0x0100 //TX_FFP_RESRV_2 -849 0x0020 //TX_FFP_RESRV_3 -850 0x0000 //TX_FFP_RESRV_4 -851 0x0000 //TX_FFP_RESRV_5 -852 0x0000 //TX_FFP_RESRV_6 -853 0x0002 //TX_FILTINDX -854 0x0000 //TX_TDDRC_THRD_0 -855 0x0010 //TX_TDDRC_THRD_1 -856 0x1500 //TX_TDDRC_THRD_2 -857 0x1500 //TX_TDDRC_THRD_3 -858 0x3000 //TX_TDDRC_SLANT_0 -859 0x6E00 //TX_TDDRC_SLANT_1 -860 0x1000 //TX_TDDRC_ALPHA_UP_00 -861 0x7EB8 //TX_TDDRC_ALPHA_DWN_00 -862 0x0000 //TX_TDDRC_HMNC_FLAG -863 0x199A //TX_TDDRC_HMNC_GAIN -864 0x0000 //TX_TDDRC_SMT_FLAG -865 0x0CCD //TX_TDDRC_SMT_W -866 0x05A0 //TX_TDDRC_DRC_GAIN -867 0x7FFF //TX_TDDRC_LMT_THRD -868 0x0000 //TX_TDDRC_LMT_ALPHA -869 0x0000 //TX_TFMASKLTH -870 0x0000 //TX_TFMASKLTHL -871 0x0CCD //TX_TFMASKHTH -872 0x0CCD //TX_TFMASKLTH_BINVAD -873 0xF333 //TX_TFMASKLTH_NS_EST -874 0xF800 //TX_TFMASKLTH_DOA -875 0x0CCD //TX_TFMASKTH_BLESSCUT -876 0x1000 //TX_B_LESSCUT_RTO_MASK -877 0x3800 //TX_SB_RHO_MEAN_TH_ABN -878 0x2000 //TX_B_POST_FLT_MASK -879 0x0000 //TX_B_POST_FLT_MASK1 -880 0x6333 //TX_GAIN_WIND_MASK -881 0x7FFF //TX_TFMASK_BFSTRICT_MUSIC -882 0x0000 //TX_TFMASK_BFSTRICT_NOMUSIC -883 0x7333 //TX_FASTNS_OUTIN_TH -884 0x0CCD //TX_FASTNS_TFMASK_TH -885 0x0CCD //TX_FASTNS_TFMASKBIN_TH1 -886 0x0CCD //TX_FASTNS_TFMASKBIN_TH2 -887 0x0CCD //TX_FASTNS_TFMASKBIN_TH3 -888 0x0028 //TX_FASTNS_ARSPC_TH -889 0xC000 //TX_FASTNS_MASK5_TH -890 0x0810 //TX_POSTSSA_MIN_G_VR_MASK -891 0x1000 //TX_A_LESSCUT_RTO_MASK -892 0x1770 //TX_FASTNS_NOISETH -893 0xC000 //TX_FASTNS_SSA_THLFL -894 0xC000 //TX_FASTNS_SSA_THHFL -895 0xCCCC //TX_FASTNS_SSA_THLFH -896 0xD999 //TX_FASTNS_SSA_THHFH -#RX -0 0x003C //RX_RECVFUNC_MODE_0 -1 0x0000 //RX_RECVFUNC_MODE_1 -2 0x0000 //RX_SAMPLINGFREQ_SIG -3 0x0000 //RX_SAMPLINGFREQ_PROC -4 0x000A //RX_FRAME_SZ -5 0x0000 //RX_DELAY_OPT -6 0x1000 //RX_TDDRC_ALPHA_UP_1 -7 0x1000 //RX_TDDRC_ALPHA_UP_2 -8 0x1000 //RX_TDDRC_ALPHA_UP_3 -9 0x1000 //RX_TDDRC_ALPHA_UP_4 -10 0x0600 //RX_PGA -11 0x7FFF //RX_A_HP -12 0x4000 //RX_B_PE -13 0x7800 //RX_THR_PITCH_DET_0 -14 0x7000 //RX_THR_PITCH_DET_1 -15 0x6000 //RX_THR_PITCH_DET_2 -16 0x0008 //RX_PITCH_BFR_LEN -17 0x0003 //RX_SBD_PITCH_DET -18 0x0100 //RX_PP_RESRV_0 -19 0x0020 //RX_PP_RESRV_1 -20 0x0400 //RX_N_SN_EST -21 0x000C //RX_N2_SN_EST -22 0x0014 //RX_NS_LVL_CTRL -23 0xF800 //RX_THR_SN_EST -24 0x7E00 //RX_LAMBDA_PFILT -25 0x000A //RX_FENS_RESRV_0 -26 0x0190 //RX_FENS_RESRV_1 -27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 -28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 -29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 -30 0x0002 //RX_EXTRA_NS_L -31 0x0800 //RX_EXTRA_NS_A -32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 -33 0x7000 //RX_TDDRC_LIMITER_THRD -34 0x0800 //RX_TDDRC_LIMITER_GAIN -35 0x199A //RX_A_POST_FLT -36 0x0000 //RX_LMT_THRD -37 0x4000 //RX_LMT_ALPHA -38 0x0014 //RX_FDEQ_SUBNUM -39 0x4840 //RX_FDEQ_GAIN_0 -40 0x3E3E //RX_FDEQ_GAIN_1 -41 0x484D //RX_FDEQ_GAIN_2 -42 0x5E72 //RX_FDEQ_GAIN_3 -43 0x818E //RX_FDEQ_GAIN_4 -44 0x7E75 //RX_FDEQ_GAIN_5 -45 0x7067 //RX_FDEQ_GAIN_6 -46 0x6774 //RX_FDEQ_GAIN_7 -47 0x6F72 //RX_FDEQ_GAIN_8 -48 0x7A7E //RX_FDEQ_GAIN_9 -49 0x4848 //RX_FDEQ_GAIN_10 -50 0x4848 //RX_FDEQ_GAIN_11 -51 0x4848 //RX_FDEQ_GAIN_12 -52 0x4848 //RX_FDEQ_GAIN_13 -53 0x4848 //RX_FDEQ_GAIN_14 -54 0x4848 //RX_FDEQ_GAIN_15 -55 0x4848 //RX_FDEQ_GAIN_16 -56 0x4848 //RX_FDEQ_GAIN_17 -57 0x4848 //RX_FDEQ_GAIN_18 -58 0x4848 //RX_FDEQ_GAIN_19 -59 0x4848 //RX_FDEQ_GAIN_20 -60 0x4848 //RX_FDEQ_GAIN_21 -61 0x4848 //RX_FDEQ_GAIN_22 -62 0x4848 //RX_FDEQ_GAIN_23 -63 0x0202 //RX_FDEQ_BIN_0 -64 0x0203 //RX_FDEQ_BIN_1 -65 0x0303 //RX_FDEQ_BIN_2 -66 0x0304 //RX_FDEQ_BIN_3 -67 0x0405 //RX_FDEQ_BIN_4 -68 0x0506 //RX_FDEQ_BIN_5 -69 0x0708 //RX_FDEQ_BIN_6 -70 0x090A //RX_FDEQ_BIN_7 -71 0x0B0C //RX_FDEQ_BIN_8 -72 0x0D08 //RX_FDEQ_BIN_9 -73 0x0000 //RX_FDEQ_BIN_10 -74 0x0000 //RX_FDEQ_BIN_11 -75 0x0000 //RX_FDEQ_BIN_12 -76 0x0000 //RX_FDEQ_BIN_13 -77 0x0000 //RX_FDEQ_BIN_14 -78 0x0000 //RX_FDEQ_BIN_15 -79 0x0000 //RX_FDEQ_BIN_16 -80 0x0000 //RX_FDEQ_BIN_17 -81 0x0000 //RX_FDEQ_BIN_18 -82 0x0000 //RX_FDEQ_BIN_19 -83 0x0000 //RX_FDEQ_BIN_20 -84 0x0000 //RX_FDEQ_BIN_21 -85 0x0000 //RX_FDEQ_BIN_22 -86 0x0000 //RX_FDEQ_BIN_23 -87 0x4000 //RX_FDEQ_RESRV_0 -88 0x0320 //RX_FDEQ_RESRV_1 -89 0x0018 //RX_FDDRC_BAND_MARGIN_0 -90 0x0030 //RX_FDDRC_BAND_MARGIN_1 -91 0x0050 //RX_FDDRC_BAND_MARGIN_2 -92 0x0080 //RX_FDDRC_BAND_MARGIN_3 -93 0x0007 //RX_FDDRC_BLOCK_EXP -94 0x5000 //RX_FDDRC_THRD_2_0 -95 0x5000 //RX_FDDRC_THRD_2_1 -96 0x5000 //RX_FDDRC_THRD_2_2 -97 0x5000 //RX_FDDRC_THRD_2_3 -98 0x6400 //RX_FDDRC_THRD_3_0 -99 0x6400 //RX_FDDRC_THRD_3_1 -100 0x6400 //RX_FDDRC_THRD_3_2 -101 0x6400 //RX_FDDRC_THRD_3_3 -102 0x2000 //RX_FDDRC_SLANT_0_0 -103 0x2000 //RX_FDDRC_SLANT_0_1 -104 0x2000 //RX_FDDRC_SLANT_0_2 -105 0x2000 //RX_FDDRC_SLANT_0_3 -106 0x5333 //RX_FDDRC_SLANT_1_0 -107 0x5333 //RX_FDDRC_SLANT_1_1 -108 0x5333 //RX_FDDRC_SLANT_1_2 -109 0x5333 //RX_FDDRC_SLANT_1_3 -110 0x0000 //RX_FDDRC_RESRV_0 -111 0x0002 //RX_FILTINDX -112 0x0000 //RX_TDDRC_THRD_0 -113 0x0000 //RX_TDDRC_THRD_1 -114 0x1800 //RX_TDDRC_THRD_2 -115 0x1800 //RX_TDDRC_THRD_3 -116 0x3000 //RX_TDDRC_SLANT_0 -117 0x6E00 //RX_TDDRC_SLANT_1 -118 0x1000 //RX_TDDRC_ALPHA_UP_0 -119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 -120 0x0000 //RX_TDDRC_HMNC_FLAG -121 0x199A //RX_TDDRC_HMNC_GAIN -122 0x0001 //RX_TDDRC_SMT_FLAG -123 0x0CCD //RX_TDDRC_SMT_W -124 0x0313 //RX_TDDRC_DRC_GAIN -125 0x7C00 //RX_LAMBDA_PKA_FP -126 0x13E0 //RX_TPKA_FP +126 0x1964 //RX_TPKA_FP 127 0x0080 //RX_MIN_G_FP 128 0x2000 //RX_MAX_G_FP -129 0x000E //RX_SPK_VOL +129 0x000D //RX_SPK_VOL 130 0x0000 //RX_VOL_RESRV_0 131 0x0000 //RX_MAXLEVEL_CNG 132 0x3000 //RX_BWE_UV_TH @@ -20368,24 +17171,24 @@ 121 0x199A //RX_TDDRC_HMNC_GAIN 122 0x0001 //RX_TDDRC_SMT_FLAG 123 0x0CCD //RX_TDDRC_SMT_W -124 0x0313 //RX_TDDRC_DRC_GAIN -38 0x0014 //RX_FDEQ_SUBNUM -39 0x4840 //RX_FDEQ_GAIN_0 -40 0x3E3E //RX_FDEQ_GAIN_1 -41 0x484D //RX_FDEQ_GAIN_2 -42 0x5E72 //RX_FDEQ_GAIN_3 -43 0x818E //RX_FDEQ_GAIN_4 -44 0x7E75 //RX_FDEQ_GAIN_5 -45 0x7067 //RX_FDEQ_GAIN_6 -46 0x6774 //RX_FDEQ_GAIN_7 -47 0x6F72 //RX_FDEQ_GAIN_8 -48 0x7A7E //RX_FDEQ_GAIN_9 -49 0x4848 //RX_FDEQ_GAIN_10 -50 0x4848 //RX_FDEQ_GAIN_11 -51 0x4848 //RX_FDEQ_GAIN_12 -52 0x4848 //RX_FDEQ_GAIN_13 -53 0x4848 //RX_FDEQ_GAIN_14 -54 0x4848 //RX_FDEQ_GAIN_15 +124 0x02FD //RX_TDDRC_DRC_GAIN +38 0x0020 //RX_FDEQ_SUBNUM +39 0x4E4E //RX_FDEQ_GAIN_0 +40 0x4E56 //RX_FDEQ_GAIN_1 +41 0x6878 //RX_FDEQ_GAIN_2 +42 0x8088 //RX_FDEQ_GAIN_3 +43 0x848B //RX_FDEQ_GAIN_4 +44 0x8F8E //RX_FDEQ_GAIN_5 +45 0x9494 //RX_FDEQ_GAIN_6 +46 0x96A0 //RX_FDEQ_GAIN_7 +47 0xB8A0 //RX_FDEQ_GAIN_8 +48 0xA99D //RX_FDEQ_GAIN_9 +49 0x9D6A //RX_FDEQ_GAIN_10 +50 0x626B //RX_FDEQ_GAIN_11 +51 0x6C78 //RX_FDEQ_GAIN_12 +52 0x7884 //RX_FDEQ_GAIN_13 +53 0x9098 //RX_FDEQ_GAIN_14 +54 0x9CAC //RX_FDEQ_GAIN_15 55 0x4848 //RX_FDEQ_GAIN_16 56 0x4848 //RX_FDEQ_GAIN_17 57 0x4848 //RX_FDEQ_GAIN_18 @@ -20395,21 +17198,21 @@ 61 0x4848 //RX_FDEQ_GAIN_22 62 0x4848 //RX_FDEQ_GAIN_23 63 0x0202 //RX_FDEQ_BIN_0 -64 0x0203 //RX_FDEQ_BIN_1 -65 0x0303 //RX_FDEQ_BIN_2 +64 0x0202 //RX_FDEQ_BIN_1 +65 0x0302 //RX_FDEQ_BIN_2 66 0x0304 //RX_FDEQ_BIN_3 67 0x0405 //RX_FDEQ_BIN_4 68 0x0506 //RX_FDEQ_BIN_5 69 0x0708 //RX_FDEQ_BIN_6 70 0x090A //RX_FDEQ_BIN_7 71 0x0B0C //RX_FDEQ_BIN_8 -72 0x0D08 //RX_FDEQ_BIN_9 -73 0x0000 //RX_FDEQ_BIN_10 -74 0x0000 //RX_FDEQ_BIN_11 -75 0x0000 //RX_FDEQ_BIN_12 -76 0x0000 //RX_FDEQ_BIN_13 -77 0x0000 //RX_FDEQ_BIN_14 -78 0x0000 //RX_FDEQ_BIN_15 +72 0x0D0E //RX_FDEQ_BIN_9 +73 0x1013 //RX_FDEQ_BIN_10 +74 0x1719 //RX_FDEQ_BIN_11 +75 0x1B1E //RX_FDEQ_BIN_12 +76 0x1E1E //RX_FDEQ_BIN_13 +77 0x1E28 //RX_FDEQ_BIN_14 +78 0x282C //RX_FDEQ_BIN_15 79 0x0000 //RX_FDEQ_BIN_16 80 0x0000 //RX_FDEQ_BIN_17 81 0x0000 //RX_FDEQ_BIN_18 @@ -20442,7 +17245,7 @@ 108 0x5333 //RX_FDDRC_SLANT_1_2 109 0x5333 //RX_FDDRC_SLANT_1_3 110 0x0000 //RX_FDDRC_RESRV_0 -129 0x000E //RX_SPK_VOL +129 0x000D //RX_SPK_VOL 130 0x0000 //RX_VOL_RESRV_0 #VOL 1 6 0x1000 //RX_TDDRC_ALPHA_UP_1 @@ -20467,24 +17270,24 @@ 121 0x199A //RX_TDDRC_HMNC_GAIN 122 0x0001 //RX_TDDRC_SMT_FLAG 123 0x0CCD //RX_TDDRC_SMT_W -124 0x02F8 //RX_TDDRC_DRC_GAIN -38 0x0014 //RX_FDEQ_SUBNUM -39 0x4840 //RX_FDEQ_GAIN_0 -40 0x3E3E //RX_FDEQ_GAIN_1 -41 0x484D //RX_FDEQ_GAIN_2 -42 0x5E72 //RX_FDEQ_GAIN_3 -43 0x818E //RX_FDEQ_GAIN_4 -44 0x7E75 //RX_FDEQ_GAIN_5 -45 0x7067 //RX_FDEQ_GAIN_6 -46 0x6774 //RX_FDEQ_GAIN_7 -47 0x6F72 //RX_FDEQ_GAIN_8 -48 0x7A7E //RX_FDEQ_GAIN_9 -49 0x4848 //RX_FDEQ_GAIN_10 -50 0x4848 //RX_FDEQ_GAIN_11 -51 0x4848 //RX_FDEQ_GAIN_12 -52 0x4848 //RX_FDEQ_GAIN_13 -53 0x4848 //RX_FDEQ_GAIN_14 -54 0x4848 //RX_FDEQ_GAIN_15 +124 0x02FD //RX_TDDRC_DRC_GAIN +38 0x0020 //RX_FDEQ_SUBNUM +39 0x4E4E //RX_FDEQ_GAIN_0 +40 0x4E56 //RX_FDEQ_GAIN_1 +41 0x6878 //RX_FDEQ_GAIN_2 +42 0x8088 //RX_FDEQ_GAIN_3 +43 0x848B //RX_FDEQ_GAIN_4 +44 0x8F8E //RX_FDEQ_GAIN_5 +45 0x9494 //RX_FDEQ_GAIN_6 +46 0x96A0 //RX_FDEQ_GAIN_7 +47 0xB8A0 //RX_FDEQ_GAIN_8 +48 0xA99D //RX_FDEQ_GAIN_9 +49 0x9D6A //RX_FDEQ_GAIN_10 +50 0x626B //RX_FDEQ_GAIN_11 +51 0x6C78 //RX_FDEQ_GAIN_12 +52 0x7884 //RX_FDEQ_GAIN_13 +53 0x9098 //RX_FDEQ_GAIN_14 +54 0x9CAC //RX_FDEQ_GAIN_15 55 0x4848 //RX_FDEQ_GAIN_16 56 0x4848 //RX_FDEQ_GAIN_17 57 0x4848 //RX_FDEQ_GAIN_18 @@ -20494,1519 +17297,8 @@ 61 0x4848 //RX_FDEQ_GAIN_22 62 0x4848 //RX_FDEQ_GAIN_23 63 0x0202 //RX_FDEQ_BIN_0 -64 0x0203 //RX_FDEQ_BIN_1 -65 0x0303 //RX_FDEQ_BIN_2 -66 0x0304 //RX_FDEQ_BIN_3 -67 0x0405 //RX_FDEQ_BIN_4 -68 0x0506 //RX_FDEQ_BIN_5 -69 0x0708 //RX_FDEQ_BIN_6 -70 0x090A //RX_FDEQ_BIN_7 -71 0x0B0C //RX_FDEQ_BIN_8 -72 0x0D08 //RX_FDEQ_BIN_9 -73 0x0000 //RX_FDEQ_BIN_10 -74 0x0000 //RX_FDEQ_BIN_11 -75 0x0000 //RX_FDEQ_BIN_12 -76 0x0000 //RX_FDEQ_BIN_13 -77 0x0000 //RX_FDEQ_BIN_14 -78 0x0000 //RX_FDEQ_BIN_15 -79 0x0000 //RX_FDEQ_BIN_16 -80 0x0000 //RX_FDEQ_BIN_17 -81 0x0000 //RX_FDEQ_BIN_18 -82 0x0000 //RX_FDEQ_BIN_19 -83 0x0000 //RX_FDEQ_BIN_20 -84 0x0000 //RX_FDEQ_BIN_21 -85 0x0000 //RX_FDEQ_BIN_22 -86 0x0000 //RX_FDEQ_BIN_23 -87 0x4000 //RX_FDEQ_RESRV_0 -88 0x0320 //RX_FDEQ_RESRV_1 -89 0x0018 //RX_FDDRC_BAND_MARGIN_0 -90 0x0030 //RX_FDDRC_BAND_MARGIN_1 -91 0x0050 //RX_FDDRC_BAND_MARGIN_2 -92 0x0080 //RX_FDDRC_BAND_MARGIN_3 -93 0x0007 //RX_FDDRC_BLOCK_EXP -94 0x5000 //RX_FDDRC_THRD_2_0 -95 0x5000 //RX_FDDRC_THRD_2_1 -96 0x5000 //RX_FDDRC_THRD_2_2 -97 0x5000 //RX_FDDRC_THRD_2_3 -98 0x6400 //RX_FDDRC_THRD_3_0 -99 0x6400 //RX_FDDRC_THRD_3_1 -100 0x6400 //RX_FDDRC_THRD_3_2 -101 0x6400 //RX_FDDRC_THRD_3_3 -102 0x2000 //RX_FDDRC_SLANT_0_0 -103 0x2000 //RX_FDDRC_SLANT_0_1 -104 0x2000 //RX_FDDRC_SLANT_0_2 -105 0x2000 //RX_FDDRC_SLANT_0_3 -106 0x5333 //RX_FDDRC_SLANT_1_0 -107 0x5333 //RX_FDDRC_SLANT_1_1 -108 0x5333 //RX_FDDRC_SLANT_1_2 -109 0x5333 //RX_FDDRC_SLANT_1_3 -110 0x0000 //RX_FDDRC_RESRV_0 -129 0x0017 //RX_SPK_VOL -130 0x0000 //RX_VOL_RESRV_0 -#VOL 2 -6 0x1000 //RX_TDDRC_ALPHA_UP_1 -7 0x1000 //RX_TDDRC_ALPHA_UP_2 -8 0x1000 //RX_TDDRC_ALPHA_UP_3 -9 0x1000 //RX_TDDRC_ALPHA_UP_4 -27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 -28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 -29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 -32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 -33 0x7000 //RX_TDDRC_LIMITER_THRD -34 0x0800 //RX_TDDRC_LIMITER_GAIN -112 0x0000 //RX_TDDRC_THRD_0 -113 0x0000 //RX_TDDRC_THRD_1 -114 0x1800 //RX_TDDRC_THRD_2 -115 0x1800 //RX_TDDRC_THRD_3 -116 0x3000 //RX_TDDRC_SLANT_0 -117 0x6E00 //RX_TDDRC_SLANT_1 -118 0x1000 //RX_TDDRC_ALPHA_UP_0 -119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 -120 0x0000 //RX_TDDRC_HMNC_FLAG -121 0x199A //RX_TDDRC_HMNC_GAIN -122 0x0001 //RX_TDDRC_SMT_FLAG -123 0x0CCD //RX_TDDRC_SMT_W -124 0x02EC //RX_TDDRC_DRC_GAIN -38 0x0014 //RX_FDEQ_SUBNUM -39 0x4840 //RX_FDEQ_GAIN_0 -40 0x3E3E //RX_FDEQ_GAIN_1 -41 0x484D //RX_FDEQ_GAIN_2 -42 0x5E72 //RX_FDEQ_GAIN_3 -43 0x818E //RX_FDEQ_GAIN_4 -44 0x7E75 //RX_FDEQ_GAIN_5 -45 0x7067 //RX_FDEQ_GAIN_6 -46 0x6774 //RX_FDEQ_GAIN_7 -47 0x6F72 //RX_FDEQ_GAIN_8 -48 0x7A7E //RX_FDEQ_GAIN_9 -49 0x4848 //RX_FDEQ_GAIN_10 -50 0x4848 //RX_FDEQ_GAIN_11 -51 0x4848 //RX_FDEQ_GAIN_12 -52 0x4848 //RX_FDEQ_GAIN_13 -53 0x4848 //RX_FDEQ_GAIN_14 -54 0x4848 //RX_FDEQ_GAIN_15 -55 0x4848 //RX_FDEQ_GAIN_16 -56 0x4848 //RX_FDEQ_GAIN_17 -57 0x4848 //RX_FDEQ_GAIN_18 -58 0x4848 //RX_FDEQ_GAIN_19 -59 0x4848 //RX_FDEQ_GAIN_20 -60 0x4848 //RX_FDEQ_GAIN_21 -61 0x4848 //RX_FDEQ_GAIN_22 -62 0x4848 //RX_FDEQ_GAIN_23 -63 0x0202 //RX_FDEQ_BIN_0 -64 0x0203 //RX_FDEQ_BIN_1 -65 0x0303 //RX_FDEQ_BIN_2 -66 0x0304 //RX_FDEQ_BIN_3 -67 0x0405 //RX_FDEQ_BIN_4 -68 0x0506 //RX_FDEQ_BIN_5 -69 0x0708 //RX_FDEQ_BIN_6 -70 0x090A //RX_FDEQ_BIN_7 -71 0x0B0C //RX_FDEQ_BIN_8 -72 0x0D08 //RX_FDEQ_BIN_9 -73 0x0000 //RX_FDEQ_BIN_10 -74 0x0000 //RX_FDEQ_BIN_11 -75 0x0000 //RX_FDEQ_BIN_12 -76 0x0000 //RX_FDEQ_BIN_13 -77 0x0000 //RX_FDEQ_BIN_14 -78 0x0000 //RX_FDEQ_BIN_15 -79 0x0000 //RX_FDEQ_BIN_16 -80 0x0000 //RX_FDEQ_BIN_17 -81 0x0000 //RX_FDEQ_BIN_18 -82 0x0000 //RX_FDEQ_BIN_19 -83 0x0000 //RX_FDEQ_BIN_20 -84 0x0000 //RX_FDEQ_BIN_21 -85 0x0000 //RX_FDEQ_BIN_22 -86 0x0000 //RX_FDEQ_BIN_23 -87 0x4000 //RX_FDEQ_RESRV_0 -88 0x0320 //RX_FDEQ_RESRV_1 -89 0x0018 //RX_FDDRC_BAND_MARGIN_0 -90 0x0030 //RX_FDDRC_BAND_MARGIN_1 -91 0x0050 //RX_FDDRC_BAND_MARGIN_2 -92 0x0080 //RX_FDDRC_BAND_MARGIN_3 -93 0x0007 //RX_FDDRC_BLOCK_EXP -94 0x5000 //RX_FDDRC_THRD_2_0 -95 0x5000 //RX_FDDRC_THRD_2_1 -96 0x5000 //RX_FDDRC_THRD_2_2 -97 0x5000 //RX_FDDRC_THRD_2_3 -98 0x6400 //RX_FDDRC_THRD_3_0 -99 0x6400 //RX_FDDRC_THRD_3_1 -100 0x6400 //RX_FDDRC_THRD_3_2 -101 0x6400 //RX_FDDRC_THRD_3_3 -102 0x2000 //RX_FDDRC_SLANT_0_0 -103 0x2000 //RX_FDDRC_SLANT_0_1 -104 0x2000 //RX_FDDRC_SLANT_0_2 -105 0x2000 //RX_FDDRC_SLANT_0_3 -106 0x5333 //RX_FDDRC_SLANT_1_0 -107 0x5333 //RX_FDDRC_SLANT_1_1 -108 0x5333 //RX_FDDRC_SLANT_1_2 -109 0x5333 //RX_FDDRC_SLANT_1_3 -110 0x0000 //RX_FDDRC_RESRV_0 -129 0x0026 //RX_SPK_VOL -130 0x0000 //RX_VOL_RESRV_0 -#VOL 3 -6 0x1000 //RX_TDDRC_ALPHA_UP_1 -7 0x1000 //RX_TDDRC_ALPHA_UP_2 -8 0x1000 //RX_TDDRC_ALPHA_UP_3 -9 0x1000 //RX_TDDRC_ALPHA_UP_4 -27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 -28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 -29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 -32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 -33 0x7000 //RX_TDDRC_LIMITER_THRD -34 0x0800 //RX_TDDRC_LIMITER_GAIN -112 0x0000 //RX_TDDRC_THRD_0 -113 0x0000 //RX_TDDRC_THRD_1 -114 0x1800 //RX_TDDRC_THRD_2 -115 0x1800 //RX_TDDRC_THRD_3 -116 0x3000 //RX_TDDRC_SLANT_0 -117 0x6E00 //RX_TDDRC_SLANT_1 -118 0x1000 //RX_TDDRC_ALPHA_UP_0 -119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 -120 0x0000 //RX_TDDRC_HMNC_FLAG -121 0x199A //RX_TDDRC_HMNC_GAIN -122 0x0001 //RX_TDDRC_SMT_FLAG -123 0x0CCD //RX_TDDRC_SMT_W -124 0x02EC //RX_TDDRC_DRC_GAIN -38 0x0014 //RX_FDEQ_SUBNUM -39 0x4840 //RX_FDEQ_GAIN_0 -40 0x3E3E //RX_FDEQ_GAIN_1 -41 0x484D //RX_FDEQ_GAIN_2 -42 0x5E72 //RX_FDEQ_GAIN_3 -43 0x818E //RX_FDEQ_GAIN_4 -44 0x7E75 //RX_FDEQ_GAIN_5 -45 0x7067 //RX_FDEQ_GAIN_6 -46 0x6774 //RX_FDEQ_GAIN_7 -47 0x6F72 //RX_FDEQ_GAIN_8 -48 0x7A7E //RX_FDEQ_GAIN_9 -49 0x4848 //RX_FDEQ_GAIN_10 -50 0x4848 //RX_FDEQ_GAIN_11 -51 0x4848 //RX_FDEQ_GAIN_12 -52 0x4848 //RX_FDEQ_GAIN_13 -53 0x4848 //RX_FDEQ_GAIN_14 -54 0x4848 //RX_FDEQ_GAIN_15 -55 0x4848 //RX_FDEQ_GAIN_16 -56 0x4848 //RX_FDEQ_GAIN_17 -57 0x4848 //RX_FDEQ_GAIN_18 -58 0x4848 //RX_FDEQ_GAIN_19 -59 0x4848 //RX_FDEQ_GAIN_20 -60 0x4848 //RX_FDEQ_GAIN_21 -61 0x4848 //RX_FDEQ_GAIN_22 -62 0x4848 //RX_FDEQ_GAIN_23 -63 0x0202 //RX_FDEQ_BIN_0 -64 0x0203 //RX_FDEQ_BIN_1 -65 0x0303 //RX_FDEQ_BIN_2 -66 0x0304 //RX_FDEQ_BIN_3 -67 0x0405 //RX_FDEQ_BIN_4 -68 0x0506 //RX_FDEQ_BIN_5 -69 0x0708 //RX_FDEQ_BIN_6 -70 0x090A //RX_FDEQ_BIN_7 -71 0x0B0C //RX_FDEQ_BIN_8 -72 0x0D08 //RX_FDEQ_BIN_9 -73 0x0000 //RX_FDEQ_BIN_10 -74 0x0000 //RX_FDEQ_BIN_11 -75 0x0000 //RX_FDEQ_BIN_12 -76 0x0000 //RX_FDEQ_BIN_13 -77 0x0000 //RX_FDEQ_BIN_14 -78 0x0000 //RX_FDEQ_BIN_15 -79 0x0000 //RX_FDEQ_BIN_16 -80 0x0000 //RX_FDEQ_BIN_17 -81 0x0000 //RX_FDEQ_BIN_18 -82 0x0000 //RX_FDEQ_BIN_19 -83 0x0000 //RX_FDEQ_BIN_20 -84 0x0000 //RX_FDEQ_BIN_21 -85 0x0000 //RX_FDEQ_BIN_22 -86 0x0000 //RX_FDEQ_BIN_23 -87 0x4000 //RX_FDEQ_RESRV_0 -88 0x0320 //RX_FDEQ_RESRV_1 -89 0x0018 //RX_FDDRC_BAND_MARGIN_0 -90 0x0030 //RX_FDDRC_BAND_MARGIN_1 -91 0x0050 //RX_FDDRC_BAND_MARGIN_2 -92 0x0080 //RX_FDDRC_BAND_MARGIN_3 -93 0x0007 //RX_FDDRC_BLOCK_EXP -94 0x5000 //RX_FDDRC_THRD_2_0 -95 0x5000 //RX_FDDRC_THRD_2_1 -96 0x5000 //RX_FDDRC_THRD_2_2 -97 0x5000 //RX_FDDRC_THRD_2_3 -98 0x6400 //RX_FDDRC_THRD_3_0 -99 0x6400 //RX_FDDRC_THRD_3_1 -100 0x6400 //RX_FDDRC_THRD_3_2 -101 0x6400 //RX_FDDRC_THRD_3_3 -102 0x2000 //RX_FDDRC_SLANT_0_0 -103 0x2000 //RX_FDDRC_SLANT_0_1 -104 0x2000 //RX_FDDRC_SLANT_0_2 -105 0x2000 //RX_FDDRC_SLANT_0_3 -106 0x5333 //RX_FDDRC_SLANT_1_0 -107 0x5333 //RX_FDDRC_SLANT_1_1 -108 0x5333 //RX_FDDRC_SLANT_1_2 -109 0x5333 //RX_FDDRC_SLANT_1_3 -110 0x0000 //RX_FDDRC_RESRV_0 -129 0x003D //RX_SPK_VOL -130 0x0000 //RX_VOL_RESRV_0 -#VOL 4 -6 0x1000 //RX_TDDRC_ALPHA_UP_1 -7 0x1000 //RX_TDDRC_ALPHA_UP_2 -8 0x1000 //RX_TDDRC_ALPHA_UP_3 -9 0x1000 //RX_TDDRC_ALPHA_UP_4 -27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 -28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 -29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 -32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 -33 0x7000 //RX_TDDRC_LIMITER_THRD -34 0x0800 //RX_TDDRC_LIMITER_GAIN -112 0x0000 //RX_TDDRC_THRD_0 -113 0x0000 //RX_TDDRC_THRD_1 -114 0x1800 //RX_TDDRC_THRD_2 -115 0x1800 //RX_TDDRC_THRD_3 -116 0x3000 //RX_TDDRC_SLANT_0 -117 0x6E00 //RX_TDDRC_SLANT_1 -118 0x1000 //RX_TDDRC_ALPHA_UP_0 -119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 -120 0x0000 //RX_TDDRC_HMNC_FLAG -121 0x199A //RX_TDDRC_HMNC_GAIN -122 0x0001 //RX_TDDRC_SMT_FLAG -123 0x0CCD //RX_TDDRC_SMT_W -124 0x02EC //RX_TDDRC_DRC_GAIN -38 0x0014 //RX_FDEQ_SUBNUM -39 0x4840 //RX_FDEQ_GAIN_0 -40 0x3E3E //RX_FDEQ_GAIN_1 -41 0x484D //RX_FDEQ_GAIN_2 -42 0x5E72 //RX_FDEQ_GAIN_3 -43 0x818E //RX_FDEQ_GAIN_4 -44 0x7E75 //RX_FDEQ_GAIN_5 -45 0x7067 //RX_FDEQ_GAIN_6 -46 0x6774 //RX_FDEQ_GAIN_7 -47 0x6F72 //RX_FDEQ_GAIN_8 -48 0x7A7E //RX_FDEQ_GAIN_9 -49 0x4848 //RX_FDEQ_GAIN_10 -50 0x4848 //RX_FDEQ_GAIN_11 -51 0x4848 //RX_FDEQ_GAIN_12 -52 0x4848 //RX_FDEQ_GAIN_13 -53 0x4848 //RX_FDEQ_GAIN_14 -54 0x4848 //RX_FDEQ_GAIN_15 -55 0x4848 //RX_FDEQ_GAIN_16 -56 0x4848 //RX_FDEQ_GAIN_17 -57 0x4848 //RX_FDEQ_GAIN_18 -58 0x4848 //RX_FDEQ_GAIN_19 -59 0x4848 //RX_FDEQ_GAIN_20 -60 0x4848 //RX_FDEQ_GAIN_21 -61 0x4848 //RX_FDEQ_GAIN_22 -62 0x4848 //RX_FDEQ_GAIN_23 -63 0x0202 //RX_FDEQ_BIN_0 -64 0x0203 //RX_FDEQ_BIN_1 -65 0x0303 //RX_FDEQ_BIN_2 -66 0x0304 //RX_FDEQ_BIN_3 -67 0x0405 //RX_FDEQ_BIN_4 -68 0x0506 //RX_FDEQ_BIN_5 -69 0x0708 //RX_FDEQ_BIN_6 -70 0x090A //RX_FDEQ_BIN_7 -71 0x0B0C //RX_FDEQ_BIN_8 -72 0x0D08 //RX_FDEQ_BIN_9 -73 0x0000 //RX_FDEQ_BIN_10 -74 0x0000 //RX_FDEQ_BIN_11 -75 0x0000 //RX_FDEQ_BIN_12 -76 0x0000 //RX_FDEQ_BIN_13 -77 0x0000 //RX_FDEQ_BIN_14 -78 0x0000 //RX_FDEQ_BIN_15 -79 0x0000 //RX_FDEQ_BIN_16 -80 0x0000 //RX_FDEQ_BIN_17 -81 0x0000 //RX_FDEQ_BIN_18 -82 0x0000 //RX_FDEQ_BIN_19 -83 0x0000 //RX_FDEQ_BIN_20 -84 0x0000 //RX_FDEQ_BIN_21 -85 0x0000 //RX_FDEQ_BIN_22 -86 0x0000 //RX_FDEQ_BIN_23 -87 0x4000 //RX_FDEQ_RESRV_0 -88 0x0320 //RX_FDEQ_RESRV_1 -89 0x0018 //RX_FDDRC_BAND_MARGIN_0 -90 0x0030 //RX_FDDRC_BAND_MARGIN_1 -91 0x0050 //RX_FDDRC_BAND_MARGIN_2 -92 0x0080 //RX_FDDRC_BAND_MARGIN_3 -93 0x0007 //RX_FDDRC_BLOCK_EXP -94 0x5000 //RX_FDDRC_THRD_2_0 -95 0x5000 //RX_FDDRC_THRD_2_1 -96 0x5000 //RX_FDDRC_THRD_2_2 -97 0x5000 //RX_FDDRC_THRD_2_3 -98 0x6400 //RX_FDDRC_THRD_3_0 -99 0x6400 //RX_FDDRC_THRD_3_1 -100 0x6400 //RX_FDDRC_THRD_3_2 -101 0x6400 //RX_FDDRC_THRD_3_3 -102 0x2000 //RX_FDDRC_SLANT_0_0 -103 0x2000 //RX_FDDRC_SLANT_0_1 -104 0x2000 //RX_FDDRC_SLANT_0_2 -105 0x2000 //RX_FDDRC_SLANT_0_3 -106 0x5333 //RX_FDDRC_SLANT_1_0 -107 0x5333 //RX_FDDRC_SLANT_1_1 -108 0x5333 //RX_FDDRC_SLANT_1_2 -109 0x5333 //RX_FDDRC_SLANT_1_3 -110 0x0000 //RX_FDDRC_RESRV_0 -129 0x0061 //RX_SPK_VOL -130 0x0000 //RX_VOL_RESRV_0 -#VOL 5 -6 0x1000 //RX_TDDRC_ALPHA_UP_1 -7 0x1000 //RX_TDDRC_ALPHA_UP_2 -8 0x1000 //RX_TDDRC_ALPHA_UP_3 -9 0x1000 //RX_TDDRC_ALPHA_UP_4 -27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 -28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 -29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 -32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 -33 0x7000 //RX_TDDRC_LIMITER_THRD -34 0x0800 //RX_TDDRC_LIMITER_GAIN -112 0x0000 //RX_TDDRC_THRD_0 -113 0x0000 //RX_TDDRC_THRD_1 -114 0x1800 //RX_TDDRC_THRD_2 -115 0x1800 //RX_TDDRC_THRD_3 -116 0x3000 //RX_TDDRC_SLANT_0 -117 0x6E00 //RX_TDDRC_SLANT_1 -118 0x1000 //RX_TDDRC_ALPHA_UP_0 -119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 -120 0x0000 //RX_TDDRC_HMNC_FLAG -121 0x199A //RX_TDDRC_HMNC_GAIN -122 0x0001 //RX_TDDRC_SMT_FLAG -123 0x0CCD //RX_TDDRC_SMT_W -124 0x02EC //RX_TDDRC_DRC_GAIN -38 0x0014 //RX_FDEQ_SUBNUM -39 0x4840 //RX_FDEQ_GAIN_0 -40 0x3E3E //RX_FDEQ_GAIN_1 -41 0x484D //RX_FDEQ_GAIN_2 -42 0x5E72 //RX_FDEQ_GAIN_3 -43 0x818E //RX_FDEQ_GAIN_4 -44 0x7E75 //RX_FDEQ_GAIN_5 -45 0x7067 //RX_FDEQ_GAIN_6 -46 0x6774 //RX_FDEQ_GAIN_7 -47 0x6F72 //RX_FDEQ_GAIN_8 -48 0x7A7E //RX_FDEQ_GAIN_9 -49 0x4848 //RX_FDEQ_GAIN_10 -50 0x4848 //RX_FDEQ_GAIN_11 -51 0x4848 //RX_FDEQ_GAIN_12 -52 0x4848 //RX_FDEQ_GAIN_13 -53 0x4848 //RX_FDEQ_GAIN_14 -54 0x4848 //RX_FDEQ_GAIN_15 -55 0x4848 //RX_FDEQ_GAIN_16 -56 0x4848 //RX_FDEQ_GAIN_17 -57 0x4848 //RX_FDEQ_GAIN_18 -58 0x4848 //RX_FDEQ_GAIN_19 -59 0x4848 //RX_FDEQ_GAIN_20 -60 0x4848 //RX_FDEQ_GAIN_21 -61 0x4848 //RX_FDEQ_GAIN_22 -62 0x4848 //RX_FDEQ_GAIN_23 -63 0x0202 //RX_FDEQ_BIN_0 -64 0x0203 //RX_FDEQ_BIN_1 -65 0x0303 //RX_FDEQ_BIN_2 -66 0x0304 //RX_FDEQ_BIN_3 -67 0x0405 //RX_FDEQ_BIN_4 -68 0x0506 //RX_FDEQ_BIN_5 -69 0x0708 //RX_FDEQ_BIN_6 -70 0x090A //RX_FDEQ_BIN_7 -71 0x0B0C //RX_FDEQ_BIN_8 -72 0x0D08 //RX_FDEQ_BIN_9 -73 0x0000 //RX_FDEQ_BIN_10 -74 0x0000 //RX_FDEQ_BIN_11 -75 0x0000 //RX_FDEQ_BIN_12 -76 0x0000 //RX_FDEQ_BIN_13 -77 0x0000 //RX_FDEQ_BIN_14 -78 0x0000 //RX_FDEQ_BIN_15 -79 0x0000 //RX_FDEQ_BIN_16 -80 0x0000 //RX_FDEQ_BIN_17 -81 0x0000 //RX_FDEQ_BIN_18 -82 0x0000 //RX_FDEQ_BIN_19 -83 0x0000 //RX_FDEQ_BIN_20 -84 0x0000 //RX_FDEQ_BIN_21 -85 0x0000 //RX_FDEQ_BIN_22 -86 0x0000 //RX_FDEQ_BIN_23 -87 0x4000 //RX_FDEQ_RESRV_0 -88 0x0320 //RX_FDEQ_RESRV_1 -89 0x0018 //RX_FDDRC_BAND_MARGIN_0 -90 0x0030 //RX_FDDRC_BAND_MARGIN_1 -91 0x0050 //RX_FDDRC_BAND_MARGIN_2 -92 0x0080 //RX_FDDRC_BAND_MARGIN_3 -93 0x0007 //RX_FDDRC_BLOCK_EXP -94 0x5000 //RX_FDDRC_THRD_2_0 -95 0x5000 //RX_FDDRC_THRD_2_1 -96 0x5000 //RX_FDDRC_THRD_2_2 -97 0x5000 //RX_FDDRC_THRD_2_3 -98 0x6400 //RX_FDDRC_THRD_3_0 -99 0x6400 //RX_FDDRC_THRD_3_1 -100 0x6400 //RX_FDDRC_THRD_3_2 -101 0x6400 //RX_FDDRC_THRD_3_3 -102 0x2000 //RX_FDDRC_SLANT_0_0 -103 0x2000 //RX_FDDRC_SLANT_0_1 -104 0x2000 //RX_FDDRC_SLANT_0_2 -105 0x2000 //RX_FDDRC_SLANT_0_3 -106 0x5333 //RX_FDDRC_SLANT_1_0 -107 0x5333 //RX_FDDRC_SLANT_1_1 -108 0x5333 //RX_FDDRC_SLANT_1_2 -109 0x5333 //RX_FDDRC_SLANT_1_3 -110 0x0000 //RX_FDDRC_RESRV_0 -129 0x009B //RX_SPK_VOL -130 0x0000 //RX_VOL_RESRV_0 -#VOL 6 -6 0x1000 //RX_TDDRC_ALPHA_UP_1 -7 0x1000 //RX_TDDRC_ALPHA_UP_2 -8 0x1000 //RX_TDDRC_ALPHA_UP_3 -9 0x1000 //RX_TDDRC_ALPHA_UP_4 -27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 -28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 -29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 -32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 -33 0x7000 //RX_TDDRC_LIMITER_THRD -34 0x0800 //RX_TDDRC_LIMITER_GAIN -112 0x0000 //RX_TDDRC_THRD_0 -113 0x0000 //RX_TDDRC_THRD_1 -114 0x1800 //RX_TDDRC_THRD_2 -115 0x1800 //RX_TDDRC_THRD_3 -116 0x3000 //RX_TDDRC_SLANT_0 -117 0x6E00 //RX_TDDRC_SLANT_1 -118 0x1000 //RX_TDDRC_ALPHA_UP_0 -119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 -120 0x0000 //RX_TDDRC_HMNC_FLAG -121 0x199A //RX_TDDRC_HMNC_GAIN -122 0x0001 //RX_TDDRC_SMT_FLAG -123 0x0CCD //RX_TDDRC_SMT_W -124 0x02EC //RX_TDDRC_DRC_GAIN -38 0x0014 //RX_FDEQ_SUBNUM -39 0x4840 //RX_FDEQ_GAIN_0 -40 0x3E3E //RX_FDEQ_GAIN_1 -41 0x484D //RX_FDEQ_GAIN_2 -42 0x5E72 //RX_FDEQ_GAIN_3 -43 0x818E //RX_FDEQ_GAIN_4 -44 0x7E75 //RX_FDEQ_GAIN_5 -45 0x7067 //RX_FDEQ_GAIN_6 -46 0x6774 //RX_FDEQ_GAIN_7 -47 0x6F72 //RX_FDEQ_GAIN_8 -48 0x7A7E //RX_FDEQ_GAIN_9 -49 0x4848 //RX_FDEQ_GAIN_10 -50 0x4848 //RX_FDEQ_GAIN_11 -51 0x4848 //RX_FDEQ_GAIN_12 -52 0x4848 //RX_FDEQ_GAIN_13 -53 0x4848 //RX_FDEQ_GAIN_14 -54 0x4848 //RX_FDEQ_GAIN_15 -55 0x4848 //RX_FDEQ_GAIN_16 -56 0x4848 //RX_FDEQ_GAIN_17 -57 0x4848 //RX_FDEQ_GAIN_18 -58 0x4848 //RX_FDEQ_GAIN_19 -59 0x4848 //RX_FDEQ_GAIN_20 -60 0x4848 //RX_FDEQ_GAIN_21 -61 0x4848 //RX_FDEQ_GAIN_22 -62 0x4848 //RX_FDEQ_GAIN_23 -63 0x0202 //RX_FDEQ_BIN_0 -64 0x0203 //RX_FDEQ_BIN_1 -65 0x0303 //RX_FDEQ_BIN_2 -66 0x0304 //RX_FDEQ_BIN_3 -67 0x0405 //RX_FDEQ_BIN_4 -68 0x0506 //RX_FDEQ_BIN_5 -69 0x0708 //RX_FDEQ_BIN_6 -70 0x090A //RX_FDEQ_BIN_7 -71 0x0B0C //RX_FDEQ_BIN_8 -72 0x0D08 //RX_FDEQ_BIN_9 -73 0x0000 //RX_FDEQ_BIN_10 -74 0x0000 //RX_FDEQ_BIN_11 -75 0x0000 //RX_FDEQ_BIN_12 -76 0x0000 //RX_FDEQ_BIN_13 -77 0x0000 //RX_FDEQ_BIN_14 -78 0x0000 //RX_FDEQ_BIN_15 -79 0x0000 //RX_FDEQ_BIN_16 -80 0x0000 //RX_FDEQ_BIN_17 -81 0x0000 //RX_FDEQ_BIN_18 -82 0x0000 //RX_FDEQ_BIN_19 -83 0x0000 //RX_FDEQ_BIN_20 -84 0x0000 //RX_FDEQ_BIN_21 -85 0x0000 //RX_FDEQ_BIN_22 -86 0x0000 //RX_FDEQ_BIN_23 -87 0x4000 //RX_FDEQ_RESRV_0 -88 0x0320 //RX_FDEQ_RESRV_1 -89 0x0018 //RX_FDDRC_BAND_MARGIN_0 -90 0x0030 //RX_FDDRC_BAND_MARGIN_1 -91 0x0050 //RX_FDDRC_BAND_MARGIN_2 -92 0x0080 //RX_FDDRC_BAND_MARGIN_3 -93 0x0007 //RX_FDDRC_BLOCK_EXP -94 0x5000 //RX_FDDRC_THRD_2_0 -95 0x5000 //RX_FDDRC_THRD_2_1 -96 0x5000 //RX_FDDRC_THRD_2_2 -97 0x5000 //RX_FDDRC_THRD_2_3 -98 0x6400 //RX_FDDRC_THRD_3_0 -99 0x6400 //RX_FDDRC_THRD_3_1 -100 0x6400 //RX_FDDRC_THRD_3_2 -101 0x6400 //RX_FDDRC_THRD_3_3 -102 0x2000 //RX_FDDRC_SLANT_0_0 -103 0x2000 //RX_FDDRC_SLANT_0_1 -104 0x2000 //RX_FDDRC_SLANT_0_2 -105 0x2000 //RX_FDDRC_SLANT_0_3 -106 0x5333 //RX_FDDRC_SLANT_1_0 -107 0x5333 //RX_FDDRC_SLANT_1_1 -108 0x5333 //RX_FDDRC_SLANT_1_2 -109 0x5333 //RX_FDDRC_SLANT_1_3 -110 0x0000 //RX_FDDRC_RESRV_0 -129 0x0100 //RX_SPK_VOL -130 0x0000 //RX_VOL_RESRV_0 - -#CASE_NAME HANDSET-HANDSET-TMOBILE_US-WB -#PARAM_TYPE TX+RX -#TOTAL_CUSTOM_STEP 7 -#TX -0 0x0000 //TX_OPERATION_MODE_0 -1 0x0000 //TX_OPERATION_MODE_1 -2 0x0036 //TX_PATCH_REG -3 0x2F7E //TX_SENDFUNC_MODE_0 -4 0x0001 //TX_SENDFUNC_MODE_1 -5 0x0002 //TX_NUM_MIC -6 0x0001 //TX_SAMPLINGFREQ_SIG -7 0x0001 //TX_SAMPLINGFREQ_PROC -8 0x000A //TX_FRAME_SZ_SIG -9 0x000A //TX_FRAME_SZ -10 0x0000 //TX_DELAY_OPT -11 0x0028 //TX_MAX_TAIL_LENGTH -12 0x0001 //TX_NUM_LOUTCHN -13 0x0001 //TX_MAXNUM_AECREF -14 0x0000 //TX_DBG_FUNC_REG -15 0x0000 //TX_DBG_FUNC_REG1 -16 0x0000 //TX_SYS_RESRV_0 -17 0x0000 //TX_SYS_RESRV_1 -18 0x0000 //TX_SYS_RESRV_2 -19 0x0000 //TX_SYS_RESRV_3 -20 0x0000 //TX_DIST2REF0 -21 0x009D //TX_DIST2REF1 -22 0x0000 //TX_DIST2REF_02 -23 0x0000 //TX_DIST2REF_03 -24 0x0000 //TX_DIST2REF_04 -25 0x0000 //TX_DIST2REF_05 -26 0x0000 //TX_MMIC -27 0x1000 //TX_PGA_0 -28 0x1000 //TX_PGA_1 -29 0x1000 //TX_PGA_2 -30 0x0000 //TX_PGA_3 -31 0x0000 //TX_PGA_4 -32 0x0000 //TX_PGA_5 -33 0x0000 //TX_MIC_PAIRS -34 0x0000 //TX_MIC_PAIRS_HS -35 0x0002 //TX_MICS_FOR_BF -36 0x0000 //TX_MIC_PAIRS_FORL1 -37 0x0002 //TX_MICS_OF_PAIR0 -38 0x0002 //TX_MICS_OF_PAIR1 -39 0x0002 //TX_MICS_OF_PAIR2 -40 0x0002 //TX_MICS_OF_PAIR3 -41 0x0000 //TX_MIC_DATA_SRC0 -42 0x0002 //TX_MIC_DATA_SRC1 -43 0x0001 //TX_MIC_DATA_SRC2 -44 0x0000 //TX_MIC_DATA_SRC3 -45 0x0000 //TX_MIC_PAIR_CH_04 -46 0x0000 //TX_MIC_PAIR_CH_05 -47 0x0000 //TX_MIC_PAIR_CH_10 -48 0x0000 //TX_MIC_PAIR_CH_11 -49 0x0000 //TX_MIC_PAIR_CH_12 -50 0x0000 //TX_MIC_PAIR_CH_13 -51 0x0000 //TX_MIC_PAIR_CH_14 -52 0x05DC //TX_HD_BIN_MASK -53 0x0010 //TX_HD_SUBAND_MASK -54 0x19A1 //TX_HD_FRAME_AVG_MASK -55 0x0320 //TX_HD_MIN_FRQ -56 0x1000 //TX_HD_ALPHA_PSD -57 0x1100 //TX_T_PHPR1 -58 0x0000 //TX_T_PHPR2 -59 0x0000 //TX_T_PTPR -60 0x0000 //TX_T_PNPR -61 0x0000 //TX_T_PAPR1 -62 0xEE6C //TX_T_PSDVAT -63 0x0800 //TX_CNT -64 0x4000 //TX_ANTI_HOWL_GAIN -65 0x0001 //TX_MICFORBFMARK_0 -66 0x0001 //TX_MICFORBFMARK_1 -67 0x0001 //TX_MICFORBFMARK_2 -68 0x0001 //TX_MICFORBFMARK_3 -69 0x0001 //TX_MICFORBFMARK_4 -70 0x0001 //TX_MICFORBFMARK_5 -71 0x0000 //TX_DIST2REF_10 -72 0x3A66 //TX_DIST2REF_11 -73 0x0000 //TX_DIST2REF2 -74 0x0000 //TX_DIST2REF_13 -75 0x0000 //TX_DIST2REF_14 -76 0x0000 //TX_DIST2REF_15 -77 0x0000 //TX_DIST2REF_20 -78 0x0000 //TX_DIST2REF_21 -79 0x0000 //TX_DIST2REF_22 -80 0x0000 //TX_DIST2REF_23 -81 0x0000 //TX_DIST2REF_24 -82 0x0000 //TX_DIST2REF_25 -83 0x0000 //TX_DIST2REF_30 -84 0x0000 //TX_DIST2REF_31 -85 0x0000 //TX_DIST2REF_32 -86 0x0000 //TX_DIST2REF_33 -87 0x0000 //TX_DIST2REF_34 -88 0x0000 //TX_DIST2REF_35 -89 0x0000 //TX_MIC_LOC_00 -90 0x0000 //TX_MIC_LOC_01 -91 0x0000 //TX_MIC_LOC_02 -92 0x0000 //TX_MIC_LOC_03 -93 0x0000 //TX_MIC_LOC_04 -94 0x0000 //TX_MIC_LOC_05 -95 0x0000 //TX_MIC_LOC_10 -96 0x0000 //TX_MIC_LOC_11 -97 0x0000 //TX_MIC_LOC_12 -98 0x0000 //TX_MIC_LOC_13 -99 0x0000 //TX_MIC_LOC_14 -100 0x0000 //TX_MIC_LOC_15 -101 0x0000 //TX_MIC_LOC_20 -102 0x0000 //TX_MIC_LOC_21 -103 0x0000 //TX_MIC_LOC_22 -104 0x0000 //TX_MIC_LOC_23 -105 0x0000 //TX_MIC_LOC_24 -106 0x0000 //TX_MIC_LOC_25 -107 0x0800 //TX_MIC_REFBLK_VOLUME -108 0x0AAC //TX_MIC_BLOCK_VOLUME -109 0x0000 //TX_INVERSE_MASK -110 0x0000 //TX_ADCS_MASK -111 0x04D0 //TX_ADCS_GAIN -112 0x4000 //TX_NFC_GAINFAC -113 0x0000 //TX_MAINMIC_BLKFACTOR -114 0x0000 //TX_REFMIC_BLKFACTOR -115 0x0000 //TX_BLMIC_BLKFACTOR -116 0x0000 //TX_BRMIC_BLKFACTOR -117 0x0031 //TX_MICBLK_START_BIN -118 0x0060 //TX_MICBLK_END_BIN -119 0x0015 //TX_MICBLK_FE_HOLD -120 0xFFF2 //TX_MICBLK_MR_EXP_TH -121 0xFFF2 //TX_MICBLK_LR_EXP_TH -122 0x0000 //TX_FENE_HOLD -123 0x4000 //TX_FE_ENER_TH_MTS -124 0x0004 //TX_FE_ENER_TH_EXP -125 0x6000 //TX_C_POST_FLT_MIC_MAINBLK -126 0x6000 //TX_C_POST_FLT_MIC_REFBLK -127 0x0010 //TX_MIC_BLOCK_N -128 0x7B02 //TX_A_HP -129 0x4000 //TX_B_PE -130 0x1800 //TX_THR_PITCH_DET_0 -131 0x1000 //TX_THR_PITCH_DET_1 -132 0x0800 //TX_THR_PITCH_DET_2 -133 0x0008 //TX_PITCH_BFR_LEN -134 0x0003 //TX_SBD_PITCH_DET -135 0x0050 //TX_TD_AEC_L -136 0x4000 //TX_MU0_UNP_TD_AEC -137 0x1000 //TX_MU0_PTD_TD_AEC -138 0x0000 //TX_PP_RESRV_0 -139 0x2A94 //TX_PP_RESRV_1 -140 0x55F0 //TX_PP_RESRV_2 -141 0x0000 //TX_PP_RESRV_3 -142 0x0000 //TX_PP_RESRV_4 -143 0x0000 //TX_PP_RESRV_5 -144 0x0000 //TX_PP_RESRV_6 -145 0x0000 //TX_PP_RESRV_7 -146 0x0028 //TX_TAIL_LENGTH -147 0x0800 //TX_AEC_REF_GAIN_0 -148 0x0800 //TX_AEC_REF_GAIN_1 -149 0x0800 //TX_AEC_REF_GAIN_2 -150 0x6000 //TX_EAD_THR -151 0x2000 //TX_THR_RE_EST -152 0x0100 //TX_MIN_EQ_RE_EST_0 -153 0x0100 //TX_MIN_EQ_RE_EST_1 -154 0x0100 //TX_MIN_EQ_RE_EST_2 -155 0x0200 //TX_MIN_EQ_RE_EST_3 -156 0x0200 //TX_MIN_EQ_RE_EST_4 -157 0x0200 //TX_MIN_EQ_RE_EST_5 -158 0x0200 //TX_MIN_EQ_RE_EST_6 -159 0x0200 //TX_MIN_EQ_RE_EST_7 -160 0x1000 //TX_MIN_EQ_RE_EST_8 -161 0x1000 //TX_MIN_EQ_RE_EST_9 -162 0x1000 //TX_MIN_EQ_RE_EST_10 -163 0x0400 //TX_MIN_EQ_RE_EST_11 -164 0x1000 //TX_MIN_EQ_RE_EST_12 -165 0x3000 //TX_LAMBDA_RE_EST -166 0x1000 //TX_LAMBDA_CB_NLE -167 0x0400 //TX_C_POST_FLT -168 0x4000 //TX_GAIN_NP -169 0x003C //TX_SE_HOLD_N -170 0x0046 //TX_DT_HOLD_N -171 0x03E8 //TX_DT2_HOLD_N -172 0x6666 //TX_AEC_RESRV_0 -173 0x0000 //TX_AEC_RESRV_1 -174 0x0014 //TX_AEC_RESRV_2 -175 0x0000 //TX_MIC_DELAY_LENGTH -176 0x0000 //TX_REF_DELAY_LENGTH -177 0x0000 //TX_ADD_LINEIN_GAINL -178 0x0000 //TX_ADD_LINEIN_GAINH -179 0x0000 //TX_MIN_EQ_RE_EST_14 -180 0x0000 //TX_DTD_THR1_8 -181 0x7FFF //TX_DTD_THR2_8 -182 0x0000 //TX_DTD_MIC_BLK2 -183 0x0008 //TX_FRQ_LIN_LEN -184 0x7FFF //TX_FRQ_AEC_LEN_RHO -185 0x6000 //TX_MU0_UNP_FRQ_AEC -186 0x4000 //TX_MU0_PTD_FRQ_AEC -187 0x000A //TX_MINENOISETH -188 0x0800 //TX_MU0_RE_EST -189 0x0001 //TX_AEC_NUM_CH -190 0x0000 //TX_BIGECHOATTENUATION_MAX -191 0x2000 //TX_A_POST_FLT_MICBLK -192 0x0000 //TX_BLKENERTH -193 0x0000 //TX_BLKENERHIGHTH -194 0x0000 //TX_NORMENERTH -195 0x0000 //TX_NORMENERHIGHTH -196 0x0000 //TX_NORMENERHIGHTHL -197 0x7000 //TX_DTD_THR1_0 -198 0x7000 //TX_DTD_THR1_1 -199 0x7000 //TX_DTD_THR1_2 -200 0x7F00 //TX_DTD_THR1_3 -201 0x7F00 //TX_DTD_THR1_4 -202 0x7F00 //TX_DTD_THR1_5 -203 0x7F00 //TX_DTD_THR1_6 -204 0x2000 //TX_DTD_THR2_0 -205 0x2000 //TX_DTD_THR2_1 -206 0x2000 //TX_DTD_THR2_2 -207 0x1000 //TX_DTD_THR2_3 -208 0x1000 //TX_DTD_THR2_4 -209 0x1000 //TX_DTD_THR2_5 -210 0x1000 //TX_DTD_THR2_6 -211 0x7FFF //TX_DTD_THR3 -212 0x0000 //TX_SPK_CUT_K -213 0x1B58 //TX_DT_CUT_K -214 0x0100 //TX_DT_CUT_THR -215 0x04EB //TX_COMFORT_G -216 0x01F4 //TX_POWER_YOUT_TH -217 0x4000 //TX_FDPFGAINECHO -218 0x0000 //TX_DTD_HD_THR -219 0x0000 //TX_SPK_CUT_K_S -220 0x0000 //TX_DTD_MIC_BLK -221 0x0400 //TX_ADPT_STRICT_L -222 0x0200 //TX_ADPT_STRICT_H -223 0x0000 //TX_RATIO_DT_L_TH_LOW -224 0x0000 //TX_RATIO_DT_H_TH_LOW -225 0x0000 //TX_RATIO_DT_L_TH_HIGH -226 0x0000 //TX_RATIO_DT_H_TH_HIGH -227 0x0000 //TX_RATIO_DT_L0_TH -228 0x2000 //TX_B_POST_FILT_ECHO_L -229 0x2000 //TX_B_POST_FILT_ECHO_H -230 0x0200 //TX_MIN_G_CTRL_ECHO -231 0x7FFF //TX_B_LESSCUT_RTO_ECHO -232 0x0000 //TX_EPD_OFFSET_00 -233 0x0000 //TX_EPD_OFFST_01 -234 0x0000 //TX_RATIO_DT_L0_TH_HIGH -235 0x3A98 //TX_RATIO_DT_H_TH_CUT -236 0x7FFF //TX_MIN_EQ_RE_EST_13 -237 0x0000 //TX_DTD_THR1_7 -238 0x0000 //TX_DTD_THR2_7 -239 0x0800 //TX_DT_RESRV_7 -240 0x0800 //TX_DT_RESRV_8 -241 0x0000 //TX_DT_RESRV_9 -242 0xF600 //TX_THR_SN_EST_0 -243 0xFA00 //TX_THR_SN_EST_1 -244 0xFB00 //TX_THR_SN_EST_2 -245 0xF800 //TX_THR_SN_EST_3 -246 0xFA00 //TX_THR_SN_EST_4 -247 0xF800 //TX_THR_SN_EST_5 -248 0xF800 //TX_THR_SN_EST_6 -249 0xF700 //TX_THR_SN_EST_7 -250 0x0000 //TX_DELTA_THR_SN_EST_0 -251 0x0100 //TX_DELTA_THR_SN_EST_1 -252 0x01A0 //TX_DELTA_THR_SN_EST_2 -253 0x0200 //TX_DELTA_THR_SN_EST_3 -254 0x0200 //TX_DELTA_THR_SN_EST_4 -255 0x0100 //TX_DELTA_THR_SN_EST_5 -256 0x0200 //TX_DELTA_THR_SN_EST_6 -257 0x0200 //TX_DELTA_THR_SN_EST_7 -258 0x4000 //TX_LAMBDA_NN_EST_0 -259 0x4000 //TX_LAMBDA_NN_EST_1 -260 0x5000 //TX_LAMBDA_NN_EST_2 -261 0x4000 //TX_LAMBDA_NN_EST_3 -262 0x4000 //TX_LAMBDA_NN_EST_4 -263 0x4000 //TX_LAMBDA_NN_EST_5 -264 0x4000 //TX_LAMBDA_NN_EST_6 -265 0x4000 //TX_LAMBDA_NN_EST_7 -266 0x0400 //TX_N_SN_EST -267 0x001E //TX_INBEAM_T -268 0x0041 //TX_INBEAMHOLDT -269 0x2000 //TX_G_STRICT -270 0x0000 //TX_EQ_THR_BF -271 0x799A //TX_LAMBDA_EQ_BF -272 0x1000 //TX_NE_RTO_TH -273 0x1000 //TX_NE_RTO_TH_L -274 0x2000 //TX_MAINREFRTOH_TH_H -275 0x1400 //TX_MAINREFRTOH_TH_L -276 0x2000 //TX_MAINREFRTO_TH_H -277 0x1400 //TX_MAINREFRTO_TH_L -278 0x0000 //TX_MAINREFRTO_TH_EQ -279 0x1000 //TX_B_POST_FLT_0 -280 0x4000 //TX_B_POST_FLT_1 -281 0x0018 //TX_NS_LVL_CTRL_0 -282 0x001C //TX_NS_LVL_CTRL_1 -283 0x0019 //TX_NS_LVL_CTRL_2 -284 0x0018 //TX_NS_LVL_CTRL_3 -285 0x0019 //TX_NS_LVL_CTRL_4 -286 0x001A //TX_NS_LVL_CTRL_5 -287 0x001E //TX_NS_LVL_CTRL_6 -288 0x001C //TX_NS_LVL_CTRL_7 -289 0x000E //TX_MIN_GAIN_S_0 -290 0x0018 //TX_MIN_GAIN_S_1 -291 0x0012 //TX_MIN_GAIN_S_2 -292 0x0012 //TX_MIN_GAIN_S_3 -293 0x0012 //TX_MIN_GAIN_S_4 -294 0x0018 //TX_MIN_GAIN_S_5 -295 0x0018 //TX_MIN_GAIN_S_6 -296 0x0018 //TX_MIN_GAIN_S_7 -297 0x5000 //TX_NMOS_SUP -298 0x0000 //TX_NS_MAX_PRI_SNR_TH -299 0x0000 //TX_NMOS_SUP_MENSA -300 0x7FFF //TX_SNRI_SUP_0 -301 0x4000 //TX_SNRI_SUP_1 -302 0x5000 //TX_SNRI_SUP_2 -303 0x4000 //TX_SNRI_SUP_3 -304 0x4000 //TX_SNRI_SUP_4 -305 0x4000 //TX_SNRI_SUP_5 -306 0x4000 //TX_SNRI_SUP_6 -307 0x4000 //TX_SNRI_SUP_7 -308 0x4000 //TX_THR_LFNS -309 0x0018 //TX_G_LFNS -310 0x09C4 //TX_GAIN0_NTH -311 0x000A //TX_MUSIC_MORENS -312 0x7FFF //TX_A_POST_FILT_0 -313 0x2000 //TX_A_POST_FILT_1 -314 0x7000 //TX_A_POST_FILT_S_0 -315 0x7000 //TX_A_POST_FILT_S_1 -316 0x3000 //TX_A_POST_FILT_S_2 -317 0x3000 //TX_A_POST_FILT_S_3 -318 0x2000 //TX_A_POST_FILT_S_4 -319 0x7000 //TX_A_POST_FILT_S_5 -320 0x7000 //TX_A_POST_FILT_S_6 -321 0x7000 //TX_A_POST_FILT_S_7 -322 0x1000 //TX_B_POST_FILT_0 -323 0x4000 //TX_B_POST_FILT_1 -324 0x5000 //TX_B_POST_FILT_2 -325 0x4000 //TX_B_POST_FILT_3 -326 0x4000 //TX_B_POST_FILT_4 -327 0x4000 //TX_B_POST_FILT_5 -328 0x4000 //TX_B_POST_FILT_6 -329 0x4000 //TX_B_POST_FILT_7 -330 0x4000 //TX_B_LESSCUT_RTO_S_0 -331 0x6000 //TX_B_LESSCUT_RTO_S_1 -332 0x6000 //TX_B_LESSCUT_RTO_S_2 -333 0x6000 //TX_B_LESSCUT_RTO_S_3 -334 0x6000 //TX_B_LESSCUT_RTO_S_4 -335 0x6000 //TX_B_LESSCUT_RTO_S_5 -336 0x7FFF //TX_B_LESSCUT_RTO_S_6 -337 0x7FFF //TX_B_LESSCUT_RTO_S_7 -338 0x7C29 //TX_LAMBDA_PFILT -339 0x7C29 //TX_LAMBDA_PFILT_S_0 -340 0x7C29 //TX_LAMBDA_PFILT_S_1 -341 0x7C29 //TX_LAMBDA_PFILT_S_2 -342 0x7C29 //TX_LAMBDA_PFILT_S_3 -343 0x7C29 //TX_LAMBDA_PFILT_S_4 -344 0x7C29 //TX_LAMBDA_PFILT_S_5 -345 0x7C29 //TX_LAMBDA_PFILT_S_6 -346 0x7C29 //TX_LAMBDA_PFILT_S_7 -347 0x0200 //TX_K_PEPPER -348 0x0600 //TX_A_PEPPER -349 0x1D4C //TX_K_PEPPER_HF -350 0x0400 //TX_A_PEPPER_HF -351 0x0001 //TX_HMNC_BST_FLG -352 0x4000 //TX_HMNC_BST_THR -353 0x0800 //TX_DT_BINVAD_TH_0 -354 0x0800 //TX_DT_BINVAD_TH_1 -355 0x0800 //TX_DT_BINVAD_TH_2 -356 0x0800 //TX_DT_BINVAD_TH_3 -357 0x0000 //TX_DT_BINVAD_ENDF -358 0x1000 //TX_C_POST_FLT_DT -359 0x7FFF //TX_NS_B_POST_FLT_LESSCUT -360 0x0100 //TX_DT_BOOST -361 0x0000 //TX_BF_SGRAD_FLG -362 0x0005 //TX_BF_DVG_TH -363 0x001E //TX_SN_C_F -364 0x0000 //TX_K_APT -365 0x0001 //TX_NOISEDET -366 0x0190 //TX_NDETCT -367 0x000A //TX_NOISE_TH_0 -368 0x1B58 //TX_NOISE_TH_0_2 -369 0x2134 //TX_NOISE_TH_0_3 -370 0x0139 //TX_NOISE_TH_1 -371 0x0479 //TX_NOISE_TH_2 -372 0x2328 //TX_NOISE_TH_3 -373 0x4422 //TX_NOISE_TH_4 -374 0x5586 //TX_NOISE_TH_5 -375 0x4425 //TX_NOISE_TH_5_2 -376 0x0032 //TX_NOISE_TH_5_3 -377 0x4E20 //TX_NOISE_TH_5_4 -378 0x21E8 //TX_NOISE_TH_6 -379 0x0014 //TX_MINENOISE_TH -380 0x4000 //TX_MINENOISE_MIC0_TH_MTS -381 0xFFEE //TX_MINENOISE_MIC0_TH_EXP -382 0x6000 //TX_MINENOISE_MIC0_S_TH_MTS -383 0xFFF3 //TX_MINENOISE_MIC0_S_TH_EXP -384 0x00A5 //TX_OUT_ENER_S_TH_CLEAN -385 0x00A5 //TX_OUT_ENER_S_TH_LESSCLEAN -386 0x00A5 //TX_OUT_ENER_S_TH_NOISY -387 0x0029 //TX_OUT_ENER_TH_NOISE -388 0x00CE //TX_OUT_ENER_TH_SPEECH -389 0x2000 //TX_SN_NPB_GAIN -390 0x0000 //TX_NN_NPB_GAIN -391 0x0000 //TX_CSX_ALPHA_0 -392 0x0000 //TX_CSX_ALPHA_1 -393 0x0000 //TX_CSX_ALPHA_2 -394 0x0000 //TX_CSX_ALPHA_3 -395 0x0800 //TX_MU_ARSP_EST -396 0x00C8 //TX_P_OUTBEAM_MIN_TH -397 0x0002 //TX_EXTRA_NS_L -398 0x0800 //TX_EXTRA_NS_A -399 0x0005 //TX_VR_NOISE_FLOOR_TH -400 0x0148 //TX_MIN_G_LOW300HZ -401 0x0004 //TX_MAXLEVEL_CNG -402 0x00B4 //TX_STN_NOISE_TH -403 0x4000 //TX_POST_MASK_SUP -404 0x7FFF //TX_POST_MASK_ADJUST -405 0x00C8 //TX_NS_ENOISE_MIC0_TH -406 0x0014 //TX_MINENOISE_MIC0_TH -407 0x012C //TX_MINENOISE_MIC0_S_TH -408 0x4900 //TX_MIN_G_CTRL_SSNS -409 0x1000 //TX_METAL_RTO_THR -410 0x0FA0 //TX_NS_FP_K_METAL -411 0x3A98 //TX_NOISEDET_BOOST_TH -412 0x0FA0 //TX_NSMOOTH_TH -413 0x0000 //TX_NS_RESRV_8 -414 0x1800 //TX_RHO_UPB -415 0x2328 //TX_N_HOLD_HS -416 0x006E //TX_N_RHO_BFR0 -417 0x7FFF //TX_LAMBDA_ARSP_EST -418 0x0100 //TX_EXTRA_GAIN_MICBLOCK -419 0x0333 //TX_THR_STD_NSR -420 0x019A //TX_THR_STD_PLH -421 0x03E8 //TX_N_HOLD_STD -422 0x0066 //TX_THR_STD_RHO -423 0x2800 //TX_BF_RESET_THR_HS -424 0x0CCD //TX_SB_RTO_MEAN_TH -425 0x0300 //TX_SB_RHO_MEAN_TH_NTALK -426 0x1C00 //TX_SB_RTO_MEAN_TH_ABN -427 0x2EE0 //TX_SB_RTO_MEAN_TH_RUB -428 0x0000 //TX_WTA_EN_RTO_TH -429 0x1400 //TX_TOP_ENER_TH_F -430 0x0100 //TX_DESIRED_TALK_HOLDT -431 0x0800 //TX_MIC_BLOCK_FACTOR -432 0x0000 //TX_NSEST_BFRLRNRDC -433 0x0000 //TX_THR_POST_FLT_HS -434 0x0010 //TX_HS_VAD_BIN -435 0x2666 //TX_THR_VAD_HS -436 0x2CCD //TX_MEAN_RTO_MIN_TH2 -437 0x0032 //TX_SILENCE_T -438 0x0000 //TX_A_POST_FLT_WTA -439 0x799A //TX_LAMBDA_PFLT_WTA -440 0x05A8 //TX_SB_RHO_MEAN2_TH -441 0x0384 //TX_SB_RHO_MEAN3_TH -442 0x0000 //TX_HS_RESRV_4 -443 0x0000 //TX_HS_RESRV_5 -444 0x0001 //TX_DOA_VAD_THR_1 -445 0x003C //TX_DOA_VAD_THR_2 -446 0x0028 //TX_DOA_VAD_THR1_0 -447 0x0028 //TX_DOA_VAD_THR1_1 -448 0x0000 //TX_SRC_DOA_RNG_LOW_0A -449 0x001E //TX_SRC_DOA_RNG_HIGH_0A -450 0x005A //TX_DFLT_SRC_DOA_0A -451 0x0000 //TX_SRC_DOA_RNG_LOW_0B -452 0x0000 //TX_SRC_DOA_RNG_HIGH_0B -453 0x0000 //TX_DFLT_SRC_DOA_0B -454 0x0000 //TX_SRC_DOA_RNG_LOW_0C -455 0x0000 //TX_SRC_DOA_RNG_HIGH_0C -456 0x0000 //TX_DFLT_SRC_DOA_0C -457 0x0000 //TX_SRC_DOA_RNG_LOW_0D -458 0x0000 //TX_SRC_DOA_RNG_HIGH_0D -459 0x0000 //TX_DFLT_SRC_DOA_0D -460 0x0000 //TX_SRC_DOA_RNG_LOW_1A -461 0x00B4 //TX_SRC_DOA_RNG_HIGH_1A -462 0x005A //TX_DFLT_SRC_DOA_1A -463 0x0000 //TX_SRC_DOA_RNG_LOW_1B -464 0x00B4 //TX_SRC_DOA_RNG_HIGH_1B -465 0x005A //TX_DFLT_SRC_DOA_1B -466 0x0000 //TX_SRC_DOA_RNG_LOW_1C -467 0x00B4 //TX_SRC_DOA_RNG_HIGH_1C -468 0x005A //TX_DFLT_SRC_DOA_1C -469 0x0000 //TX_SRC_DOA_RNG_LOW_1D -470 0x00B4 //TX_SRC_DOA_RNG_HIGH_1D -471 0x005A //TX_DFLT_SRC_DOA_1D -472 0x0100 //TX_BF_HOLDOFF_T -473 0x7FFF //TX_DOA_COST_FACTOR -474 0x0D9A //TX_MAINTOREFR_TH0 -475 0x071C //TX_DOA_TRK_THR -476 0x012C //TX_DOA_TRACK_HT -477 0x0200 //TX_N1_HOLD_HF -478 0x0100 //TX_N2_HOLD_HF -479 0x2A3D //TX_BF_RESET_THR_HF -480 0x7333 //TX_DOA_SMOOTH -481 0x0800 //TX_MU_BF -482 0x0800 //TX_BF_MU_LF_B2 -483 0x0040 //TX_BF_FC_END_BIN_B2 -484 0x0020 //TX_BF_FC_END_BIN -485 0x0000 //TX_HF_RESRV_25 -486 0x0000 //TX_HF_RESRV_26 -487 0x0007 //TX_N_DOA_SEED -488 0x0001 //TX_FINE_DOA_SEARCH_FLG -489 0x0000 //TX_HF_RESRV_27 -490 0x038E //TX_DLT_SRC_DOA_RNG -491 0x0200 //TX_BF_MU_LF -492 0x0000 //TX_DFLT_SRC_LOC_0 -493 0x7FFF //TX_DFLT_SRC_LOC_1 -494 0x0000 //TX_DFLT_SRC_LOC_2 -495 0x038E //TX_DOA_TRACK_VADTH -496 0x0000 //TX_DOA_TRACK_NEW -497 0x0280 //TX_NOR_OFF_THR -498 0x7C00 //TX_MORE_ON_700HZ_THR -499 0x0200 //TX_MU_BF_ADPT_NS -500 0x0000 //TX_ADAPT_LEN -501 0x6666 //TX_MORE_SNS -502 0x0000 //TX_NOR_OFF_TH1 -503 0x0000 //TX_WIDE_MASK_TH -504 0xD333 //TX_SUBSNRATIOHIGH4MEANBCK_THR -505 0x6000 //TX_C_POST_FLT_CUT -506 0x2000 //TX_RADIODTLV -507 0x0320 //TX_POWER_LINEIN_TH -508 0x0014 //TX_FE_VADCOUNT_TH_FC -509 0x0000 //TX_ECHO_SUPP_FC -510 0x0C80 //TX_ECHO_TH -511 0x6666 //TX_MIC_TO_BFGAIN -512 0x0000 //TX_MICTOBFGAIN0 -513 0x0000 //TX_FASTMUE_TH -514 0x0000 //TX_DERVB_LEN_0 -515 0x0000 //TX_DERVB_LEN_1 -516 0x0000 //TX_RHO_DERVB -517 0x0000 //TX_MIC_INDX_DERVB -518 0x0000 //TX_MU_DERVB -519 0x0000 //TX_DR_RESRV_0 -520 0x0000 //TX_DR_RESRV_1 -521 0x0000 //TX_DR_RESRV_2 -522 0x0000 //TX_DR_RESRV_3 -523 0x0000 //TX_DR_RESRV_4 -524 0x0000 //TX_DR_RESRV_5 -525 0x0000 //TX_DR_RESRV_6 -526 0x0000 //TX_DR_RESRV_7 -527 0x0000 //TX_DR_RESRV_8 -528 0x1333 //TX_WIND_MARK_TH -529 0x399A //TX_CORR_THR -530 0x0004 //TX_SNR_THR -531 0x0010 //TX_ENGY_THR -532 0x1770 //TX_CORR_HIGH_TH -533 0x6000 //TX_ENGY_THR_2 -534 0x3400 //TX_MEAN_RTO_THR -535 0x0028 //TX_WNS_ENOISE_MIC0_TH -536 0x3000 //TX_RATIOMICL_TH -537 0x7FFF //TX_CALIG_HS -538 0x0000 //TX_LVL_CTRL -539 0x0010 //TX_WIND_SUPRTO -540 0x0014 //TX_WNS_MIN_G -541 0x0600 //TX_WNS_B_POST_FLT -542 0x3000 //TX_RATIOMICH_TH -543 0xD120 //TX_WIND_INBEAM_L_TH -544 0x0FA0 //TX_WIND_INBEAM_H_TH -545 0x2000 //TX_WNS_RESRV_0 -546 0x59D8 //TX_WNS_RESRV_1 -547 0x0200 //TX_WNS_RESRV_2 -548 0x0000 //TX_WNS_RESRV_3 -549 0x0000 //TX_WNS_RESRV_4 -550 0x0000 //TX_WNS_RESRV_5 -551 0x0000 //TX_WNS_RESRV_6 -552 0x0000 //TX_PB_B_POST_FLT_LESSCUT -553 0x0070 //TX_BF_LESSCUT_BBIN -554 0x0070 //TX_BF_LESSCUT_EBIN -555 0x0010 //TX_POSTBFB0 -556 0x0070 //TX_POSTBFB -557 0x00B0 //TX_POSTBFE -558 0x0E66 //TX_SPEECH_SNR_TH -559 0x0050 //TX_PB_MAX_PRI_SNR_TH -560 0x770A //TX_MAX_PRI_SNR_TH_L -561 0x0000 //TX_PFGAIN -562 0x0000 //TX_MAINTOREFR_TH -563 0x0000 //TX_SAM_MARK -564 0x0000 //TX_PB_RESRV_0 -565 0x0000 //TX_PB_RESRV_1 -566 0x0030 //TX_FDEQ_SUBNUM -567 0x5C54 //TX_FDEQ_GAIN_0 -568 0x5048 //TX_FDEQ_GAIN_1 -569 0x4C4C //TX_FDEQ_GAIN_2 -570 0x474A //TX_FDEQ_GAIN_3 -571 0x4742 //TX_FDEQ_GAIN_4 -572 0x4241 //TX_FDEQ_GAIN_5 -573 0x403F //TX_FDEQ_GAIN_6 -574 0x433F //TX_FDEQ_GAIN_7 -575 0x3938 //TX_FDEQ_GAIN_8 -576 0x3434 //TX_FDEQ_GAIN_9 -577 0x3530 //TX_FDEQ_GAIN_10 -578 0x3033 //TX_FDEQ_GAIN_11 -579 0x3535 //TX_FDEQ_GAIN_12 -580 0x3D48 //TX_FDEQ_GAIN_13 -581 0x4848 //TX_FDEQ_GAIN_14 -582 0x4848 //TX_FDEQ_GAIN_15 -583 0x4848 //TX_FDEQ_GAIN_16 -584 0x4848 //TX_FDEQ_GAIN_17 -585 0x4848 //TX_FDEQ_GAIN_18 -586 0x4848 //TX_FDEQ_GAIN_19 -587 0x4848 //TX_FDEQ_GAIN_20 -588 0x4848 //TX_FDEQ_GAIN_21 -589 0x4848 //TX_FDEQ_GAIN_22 -590 0x4848 //TX_FDEQ_GAIN_23 -591 0x0202 //TX_FDEQ_BIN_0 -592 0x0104 //TX_FDEQ_BIN_1 -593 0x0502 //TX_FDEQ_BIN_2 -594 0x0202 //TX_FDEQ_BIN_3 -595 0x0504 //TX_FDEQ_BIN_4 -596 0x0708 //TX_FDEQ_BIN_5 -597 0x0808 //TX_FDEQ_BIN_6 -598 0x050E //TX_FDEQ_BIN_7 -599 0x0B0C //TX_FDEQ_BIN_8 -600 0x0F0F //TX_FDEQ_BIN_9 -601 0x0F0F //TX_FDEQ_BIN_10 -602 0x0F28 //TX_FDEQ_BIN_11 -603 0x0611 //TX_FDEQ_BIN_12 -604 0x0000 //TX_FDEQ_BIN_13 -605 0x0000 //TX_FDEQ_BIN_14 -606 0x0000 //TX_FDEQ_BIN_15 -607 0x0000 //TX_FDEQ_BIN_16 -608 0x0000 //TX_FDEQ_BIN_17 -609 0x0000 //TX_FDEQ_BIN_18 -610 0x0000 //TX_FDEQ_BIN_19 -611 0x0000 //TX_FDEQ_BIN_20 -612 0x0000 //TX_FDEQ_BIN_21 -613 0x0000 //TX_FDEQ_BIN_22 -614 0x0000 //TX_FDEQ_BIN_23 -615 0x0000 //TX_FDEQ_PADDING -616 0x0030 //TX_PREEQ_SUBNUM_MIC0 -617 0x4848 //TX_PREEQ_GAIN_MIC0_0 -618 0x4848 //TX_PREEQ_GAIN_MIC0_1 -619 0x4848 //TX_PREEQ_GAIN_MIC0_2 -620 0x4848 //TX_PREEQ_GAIN_MIC0_3 -621 0x4848 //TX_PREEQ_GAIN_MIC0_4 -622 0x4848 //TX_PREEQ_GAIN_MIC0_5 -623 0x4848 //TX_PREEQ_GAIN_MIC0_6 -624 0x4846 //TX_PREEQ_GAIN_MIC0_7 -625 0x4544 //TX_PREEQ_GAIN_MIC0_8 -626 0x4241 //TX_PREEQ_GAIN_MIC0_9 -627 0x403E //TX_PREEQ_GAIN_MIC0_10 -628 0x3D3C //TX_PREEQ_GAIN_MIC0_11 -629 0x3C3C //TX_PREEQ_GAIN_MIC0_12 -630 0x4848 //TX_PREEQ_GAIN_MIC0_13 -631 0x4848 //TX_PREEQ_GAIN_MIC0_14 -632 0x4848 //TX_PREEQ_GAIN_MIC0_15 -633 0x4848 //TX_PREEQ_GAIN_MIC0_16 -634 0x4848 //TX_PREEQ_GAIN_MIC0_17 -635 0x4848 //TX_PREEQ_GAIN_MIC0_18 -636 0x4848 //TX_PREEQ_GAIN_MIC0_19 -637 0x4848 //TX_PREEQ_GAIN_MIC0_20 -638 0x4848 //TX_PREEQ_GAIN_MIC0_21 -639 0x4848 //TX_PREEQ_GAIN_MIC0_22 -640 0x4848 //TX_PREEQ_GAIN_MIC0_23 -641 0x0202 //TX_PREEQ_BIN_MIC0_0 -642 0x0203 //TX_PREEQ_BIN_MIC0_1 -643 0x0303 //TX_PREEQ_BIN_MIC0_2 -644 0x0304 //TX_PREEQ_BIN_MIC0_3 -645 0x0405 //TX_PREEQ_BIN_MIC0_4 -646 0x0506 //TX_PREEQ_BIN_MIC0_5 -647 0x7008 //TX_PREEQ_BIN_MIC0_6 -648 0x090A //TX_PREEQ_BIN_MIC0_7 -649 0x0B0C //TX_PREEQ_BIN_MIC0_8 -650 0x0F10 //TX_PREEQ_BIN_MIC0_9 -651 0x1011 //TX_PREEQ_BIN_MIC0_10 -652 0x1112 //TX_PREEQ_BIN_MIC0_11 -653 0x1208 //TX_PREEQ_BIN_MIC0_12 -654 0x0000 //TX_PREEQ_BIN_MIC0_13 -655 0x0000 //TX_PREEQ_BIN_MIC0_14 -656 0x0000 //TX_PREEQ_BIN_MIC0_15 -657 0x0000 //TX_PREEQ_BIN_MIC0_16 -658 0x0000 //TX_PREEQ_BIN_MIC0_17 -659 0x0000 //TX_PREEQ_BIN_MIC0_18 -660 0x0000 //TX_PREEQ_BIN_MIC0_19 -661 0x0000 //TX_PREEQ_BIN_MIC0_20 -662 0x0000 //TX_PREEQ_BIN_MIC0_21 -663 0x0000 //TX_PREEQ_BIN_MIC0_22 -664 0x0000 //TX_PREEQ_BIN_MIC0_23 -665 0x0020 //TX_PREEQ_SUBNUM_MIC1 -666 0x4848 //TX_PREEQ_GAIN_MIC1_0 -667 0x4848 //TX_PREEQ_GAIN_MIC1_1 -668 0x4848 //TX_PREEQ_GAIN_MIC1_2 -669 0x4848 //TX_PREEQ_GAIN_MIC1_3 -670 0x4848 //TX_PREEQ_GAIN_MIC1_4 -671 0x4848 //TX_PREEQ_GAIN_MIC1_5 -672 0x4848 //TX_PREEQ_GAIN_MIC1_6 -673 0x4848 //TX_PREEQ_GAIN_MIC1_7 -674 0x484A //TX_PREEQ_GAIN_MIC1_8 -675 0x4B4C //TX_PREEQ_GAIN_MIC1_9 -676 0x4B4A //TX_PREEQ_GAIN_MIC1_10 -677 0x4A48 //TX_PREEQ_GAIN_MIC1_11 -678 0x4C4C //TX_PREEQ_GAIN_MIC1_12 -679 0x4C4C //TX_PREEQ_GAIN_MIC1_13 -680 0x4848 //TX_PREEQ_GAIN_MIC1_14 -681 0x4848 //TX_PREEQ_GAIN_MIC1_15 -682 0x4848 //TX_PREEQ_GAIN_MIC1_16 -683 0x4848 //TX_PREEQ_GAIN_MIC1_17 -684 0x4848 //TX_PREEQ_GAIN_MIC1_18 -685 0x4848 //TX_PREEQ_GAIN_MIC1_19 -686 0x4848 //TX_PREEQ_GAIN_MIC1_20 -687 0x4848 //TX_PREEQ_GAIN_MIC1_21 -688 0x4848 //TX_PREEQ_GAIN_MIC1_22 -689 0x4848 //TX_PREEQ_GAIN_MIC1_23 -690 0x0202 //TX_PREEQ_BIN_MIC1_0 -691 0x0203 //TX_PREEQ_BIN_MIC1_1 -692 0x0303 //TX_PREEQ_BIN_MIC1_2 -693 0x0304 //TX_PREEQ_BIN_MIC1_3 -694 0x0405 //TX_PREEQ_BIN_MIC1_4 -695 0x0506 //TX_PREEQ_BIN_MIC1_5 -696 0x0708 //TX_PREEQ_BIN_MIC1_6 -697 0x090A //TX_PREEQ_BIN_MIC1_7 -698 0x0B0C //TX_PREEQ_BIN_MIC1_8 -699 0x0D0E //TX_PREEQ_BIN_MIC1_9 -700 0x0F10 //TX_PREEQ_BIN_MIC1_10 -701 0x1011 //TX_PREEQ_BIN_MIC1_11 -702 0x1112 //TX_PREEQ_BIN_MIC1_12 -703 0x120B //TX_PREEQ_BIN_MIC1_13 -704 0x0000 //TX_PREEQ_BIN_MIC1_14 -705 0x0000 //TX_PREEQ_BIN_MIC1_15 -706 0x0000 //TX_PREEQ_BIN_MIC1_16 -707 0x0000 //TX_PREEQ_BIN_MIC1_17 -708 0x0000 //TX_PREEQ_BIN_MIC1_18 -709 0x0000 //TX_PREEQ_BIN_MIC1_19 -710 0x0000 //TX_PREEQ_BIN_MIC1_20 -711 0x0000 //TX_PREEQ_BIN_MIC1_21 -712 0x0000 //TX_PREEQ_BIN_MIC1_22 -713 0x0000 //TX_PREEQ_BIN_MIC1_23 -714 0x0030 //TX_PREEQ_SUBNUM_MIC2 -715 0x4848 //TX_PREEQ_GAIN_MIC2_0 -716 0x4848 //TX_PREEQ_GAIN_MIC2_1 -717 0x4848 //TX_PREEQ_GAIN_MIC2_2 -718 0x4848 //TX_PREEQ_GAIN_MIC2_3 -719 0x4848 //TX_PREEQ_GAIN_MIC2_4 -720 0x4848 //TX_PREEQ_GAIN_MIC2_5 -721 0x4848 //TX_PREEQ_GAIN_MIC2_6 -722 0x4848 //TX_PREEQ_GAIN_MIC2_7 -723 0x4848 //TX_PREEQ_GAIN_MIC2_8 -724 0x4848 //TX_PREEQ_GAIN_MIC2_9 -725 0x4848 //TX_PREEQ_GAIN_MIC2_10 -726 0x4848 //TX_PREEQ_GAIN_MIC2_11 -727 0x4848 //TX_PREEQ_GAIN_MIC2_12 -728 0x4848 //TX_PREEQ_GAIN_MIC2_13 -729 0x4848 //TX_PREEQ_GAIN_MIC2_14 -730 0x4848 //TX_PREEQ_GAIN_MIC2_15 -731 0x4848 //TX_PREEQ_GAIN_MIC2_16 -732 0x4848 //TX_PREEQ_GAIN_MIC2_17 -733 0x4848 //TX_PREEQ_GAIN_MIC2_18 -734 0x4848 //TX_PREEQ_GAIN_MIC2_19 -735 0x4848 //TX_PREEQ_GAIN_MIC2_20 -736 0x4848 //TX_PREEQ_GAIN_MIC2_21 -737 0x4848 //TX_PREEQ_GAIN_MIC2_22 -738 0x4848 //TX_PREEQ_GAIN_MIC2_23 -739 0x0608 //TX_PREEQ_BIN_MIC2_0 -740 0x0808 //TX_PREEQ_BIN_MIC2_1 -741 0x0808 //TX_PREEQ_BIN_MIC2_2 -742 0x0808 //TX_PREEQ_BIN_MIC2_3 -743 0x0808 //TX_PREEQ_BIN_MIC2_4 -744 0x0808 //TX_PREEQ_BIN_MIC2_5 -745 0x0808 //TX_PREEQ_BIN_MIC2_6 -746 0x0808 //TX_PREEQ_BIN_MIC2_7 -747 0x0808 //TX_PREEQ_BIN_MIC2_8 -748 0x0808 //TX_PREEQ_BIN_MIC2_9 -749 0x0808 //TX_PREEQ_BIN_MIC2_10 -750 0x0808 //TX_PREEQ_BIN_MIC2_11 -751 0x0808 //TX_PREEQ_BIN_MIC2_12 -752 0x0808 //TX_PREEQ_BIN_MIC2_13 -753 0x0808 //TX_PREEQ_BIN_MIC2_14 -754 0x0200 //TX_PREEQ_BIN_MIC2_15 -755 0x0000 //TX_PREEQ_BIN_MIC2_16 -756 0x0000 //TX_PREEQ_BIN_MIC2_17 -757 0x0000 //TX_PREEQ_BIN_MIC2_18 -758 0x0000 //TX_PREEQ_BIN_MIC2_19 -759 0x0000 //TX_PREEQ_BIN_MIC2_20 -760 0x0000 //TX_PREEQ_BIN_MIC2_21 -761 0x0000 //TX_PREEQ_BIN_MIC2_22 -762 0x0000 //TX_PREEQ_BIN_MIC2_23 -763 0x0006 //TX_MASKING_ABILITY -764 0x0800 //TX_NND_WEIGHT -765 0x0062 //TX_MIC_CALIBRATION_0 -766 0x0062 //TX_MIC_CALIBRATION_1 -767 0x0062 //TX_MIC_CALIBRATION_2 -768 0x0062 //TX_MIC_CALIBRATION_3 -769 0x0046 //TX_MIC_PWR_BIAS_0 -770 0x0046 //TX_MIC_PWR_BIAS_1 -771 0x0046 //TX_MIC_PWR_BIAS_2 -772 0x0046 //TX_MIC_PWR_BIAS_3 -773 0x0000 //TX_GAIN_LIMIT_0 -774 0x0000 //TX_GAIN_LIMIT_1 -775 0x0006 //TX_GAIN_LIMIT_2 -776 0x0006 //TX_GAIN_LIMIT_3 -777 0x7F5B //TX_BVE_NOVAD0_ALPHADOWN -778 0x7FDE //TX_BVE_VAD0_ALPHAUP -779 0x7F3A //TX_BVE_VAD0_ALPHADOWN -780 0x2000 //TX_BVE_GAINWEIGHT_NOFEVADLI -781 0x7F5B //TX_BVE_FEVADLI_ALPHA -782 0x7F19 //TX_BVE_NOVAD0_ALPHAUP -783 0x1000 //TX_TDDRC_ALPHA_UP_01 -784 0x1000 //TX_TDDRC_ALPHA_UP_02 -785 0x1000 //TX_TDDRC_ALPHA_UP_03 -786 0x1000 //TX_TDDRC_ALPHA_UP_04 -787 0x7EB8 //TX_TDDRC_ALPHA_DWN_01 -788 0x7EB8 //TX_TDDRC_ALPHA_DWN_02 -789 0x7EB8 //TX_TDDRC_ALPHA_DWN_03 -790 0x7EB8 //TX_TDDRC_ALPHA_DWN_04 -791 0x7FFF //TX_TDDRC_TD_DRC_LIMIT -792 0x0800 //TX_TDDRC_POST_LIMIT_GAIN -793 0x0000 //TX_TDDRC_RESRV_0 -794 0x0000 //TX_TDDRC_RESRV_1 -795 0x0018 //TX_FDDRC_BAND_MARGIN_0 -796 0x0030 //TX_FDDRC_BAND_MARGIN_1 -797 0x0050 //TX_FDDRC_BAND_MARGIN_2 -798 0x0080 //TX_FDDRC_BAND_MARGIN_3 -799 0x0007 //TX_FDDRC_BLOCK_EXP -800 0x5000 //TX_FDDRC_THRD_2_0 -801 0x5000 //TX_FDDRC_THRD_2_1 -802 0x5000 //TX_FDDRC_THRD_2_2 -803 0x5000 //TX_FDDRC_THRD_2_3 -804 0x6400 //TX_FDDRC_THRD_3_0 -805 0x6400 //TX_FDDRC_THRD_3_1 -806 0x6400 //TX_FDDRC_THRD_3_2 -807 0x6400 //TX_FDDRC_THRD_3_3 -808 0x2000 //TX_FDDRC_SLANT_0_0 -809 0x2000 //TX_FDDRC_SLANT_0_1 -810 0x2000 //TX_FDDRC_SLANT_0_2 -811 0x2000 //TX_FDDRC_SLANT_0_3 -812 0x5333 //TX_FDDRC_SLANT_1_0 -813 0x5333 //TX_FDDRC_SLANT_1_1 -814 0x5333 //TX_FDDRC_SLANT_1_2 -815 0x5333 //TX_FDDRC_SLANT_1_3 -816 0x0010 //TX_DEADMIC_SILENCE_TH -817 0x0600 //TX_MIC_DEGRADE_TH -818 0x0078 //TX_DEADMIC_CNT -819 0x0078 //TX_MIC_DEGRADE_CNT -820 0x0000 //TX_FDDRC_RESRV_4 -821 0x0000 //TX_FDDRC_RESRV_5 -822 0x0000 //TX_FDDRC_RESRV_6 -823 0x7FFF //TX_KS_NOISEPASTE_FACTOR -824 0x0001 //TX_KS_CONFIG -825 0x7FFF //TX_KS_GAIN_MIN -826 0x0000 //TX_KS_RESRV_0 -827 0x0000 //TX_KS_RESRV_1 -828 0x0000 //TX_KS_RESRV_2 -829 0x7C00 //TX_LAMBDA_PKA_FP -830 0x2000 //TX_TPKA_FP -831 0x0080 //TX_MIN_G_FP -832 0x2000 //TX_MAX_G_FP -833 0x0FA0 //TX_FFP_FP_K_METAL -834 0x4000 //TX_A_POST_FLT_FP -835 0x0F5C //TX_RTO_OUTBEAM_TH -836 0x4CCD //TX_TPKA_FP_THD -837 0x0000 //TX_MAX_G_FP_BLK -838 0x0000 //TX_FFP_FADEIN -839 0x0000 //TX_FFP_FADEOUT -840 0x0000 //TX_WHISPERCTH -841 0x0000 //TX_WHISPERHOLDT -842 0x0000 //TX_WHISP_ENTHH -843 0x0000 //TX_WHISP_ENTHL -844 0x0000 //TX_WHISP_RTOTH -845 0x0000 //TX_WHISP_RTOTH2 -846 0x0096 //TX_MUTE_PERIOD -847 0x0000 //TX_FADE_IN_PERIOD -848 0x0100 //TX_FFP_RESRV_2 -849 0x0020 //TX_FFP_RESRV_3 -850 0x0000 //TX_FFP_RESRV_4 -851 0x0000 //TX_FFP_RESRV_5 -852 0x0000 //TX_FFP_RESRV_6 -853 0x0002 //TX_FILTINDX -854 0x0002 //TX_TDDRC_THRD_0 -855 0x0003 //TX_TDDRC_THRD_1 -856 0x1500 //TX_TDDRC_THRD_2 -857 0x1500 //TX_TDDRC_THRD_3 -858 0x3000 //TX_TDDRC_SLANT_0 -859 0x6E00 //TX_TDDRC_SLANT_1 -860 0x1000 //TX_TDDRC_ALPHA_UP_00 -861 0x7EB8 //TX_TDDRC_ALPHA_DWN_00 -862 0x0000 //TX_TDDRC_HMNC_FLAG -863 0x199A //TX_TDDRC_HMNC_GAIN -864 0x0000 //TX_TDDRC_SMT_FLAG -865 0x0CCD //TX_TDDRC_SMT_W -866 0x05A0 //TX_TDDRC_DRC_GAIN -867 0x7FFF //TX_TDDRC_LMT_THRD -868 0x0000 //TX_TDDRC_LMT_ALPHA -869 0x0000 //TX_TFMASKLTH -870 0x0000 //TX_TFMASKLTHL -871 0x0CCD //TX_TFMASKHTH -872 0x199A //TX_TFMASKLTH_BINVAD -873 0xFCCD //TX_TFMASKLTH_NS_EST -874 0xF800 //TX_TFMASKLTH_DOA -875 0x0CCD //TX_TFMASKTH_BLESSCUT -876 0x2000 //TX_B_LESSCUT_RTO_MASK -877 0x1C00 //TX_SB_RHO_MEAN_TH_ABN -878 0x2000 //TX_B_POST_FLT_MASK -879 0x0000 //TX_B_POST_FLT_MASK1 -880 0x6333 //TX_GAIN_WIND_MASK -881 0x0000 //TX_TFMASK_BFSTRICT_MUSIC -882 0x0000 //TX_TFMASK_BFSTRICT_NOMUSIC -883 0x7333 //TX_FASTNS_OUTIN_TH -884 0x0CCD //TX_FASTNS_TFMASK_TH -885 0x0CCD //TX_FASTNS_TFMASKBIN_TH1 -886 0x0CCD //TX_FASTNS_TFMASKBIN_TH2 -887 0x0CCD //TX_FASTNS_TFMASKBIN_TH3 -888 0x00C8 //TX_FASTNS_ARSPC_TH -889 0xC000 //TX_FASTNS_MASK5_TH -890 0x0810 //TX_POSTSSA_MIN_G_VR_MASK -891 0x1000 //TX_A_LESSCUT_RTO_MASK -892 0x1770 //TX_FASTNS_NOISETH -893 0xC000 //TX_FASTNS_SSA_THLFL -894 0xC000 //TX_FASTNS_SSA_THHFL -895 0xCCCC //TX_FASTNS_SSA_THLFH -896 0xD999 //TX_FASTNS_SSA_THHFH -#RX -0 0x003C //RX_RECVFUNC_MODE_0 -1 0x0000 //RX_RECVFUNC_MODE_1 -2 0x0001 //RX_SAMPLINGFREQ_SIG -3 0x0001 //RX_SAMPLINGFREQ_PROC -4 0x000A //RX_FRAME_SZ -5 0x0000 //RX_DELAY_OPT -6 0x1000 //RX_TDDRC_ALPHA_UP_1 -7 0x1000 //RX_TDDRC_ALPHA_UP_2 -8 0x1000 //RX_TDDRC_ALPHA_UP_3 -9 0x1000 //RX_TDDRC_ALPHA_UP_4 -10 0x0600 //RX_PGA -11 0x7FFF //RX_A_HP -12 0x4000 //RX_B_PE -13 0x7800 //RX_THR_PITCH_DET_0 -14 0x7000 //RX_THR_PITCH_DET_1 -15 0x6000 //RX_THR_PITCH_DET_2 -16 0x0008 //RX_PITCH_BFR_LEN -17 0x0003 //RX_SBD_PITCH_DET -18 0x0100 //RX_PP_RESRV_0 -19 0x0020 //RX_PP_RESRV_1 -20 0x0400 //RX_N_SN_EST -21 0x000C //RX_N2_SN_EST -22 0x0014 //RX_NS_LVL_CTRL -23 0xF800 //RX_THR_SN_EST -24 0x7E00 //RX_LAMBDA_PFILT -25 0x000A //RX_FENS_RESRV_0 -26 0x0190 //RX_FENS_RESRV_1 -27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 -28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 -29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 -30 0x0002 //RX_EXTRA_NS_L -31 0x0800 //RX_EXTRA_NS_A -32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 -33 0x7000 //RX_TDDRC_LIMITER_THRD -34 0x0800 //RX_TDDRC_LIMITER_GAIN -35 0x199A //RX_A_POST_FLT -36 0x1000 //RX_LMT_THRD -37 0x7FDF //RX_LMT_ALPHA -38 0x001C //RX_FDEQ_SUBNUM -39 0x4840 //RX_FDEQ_GAIN_0 -40 0x4040 //RX_FDEQ_GAIN_1 -41 0x444C //RX_FDEQ_GAIN_2 -42 0x5C6C //RX_FDEQ_GAIN_3 -43 0x828B //RX_FDEQ_GAIN_4 -44 0x8F87 //RX_FDEQ_GAIN_5 -45 0x8481 //RX_FDEQ_GAIN_6 -46 0x8980 //RX_FDEQ_GAIN_7 -47 0x8383 //RX_FDEQ_GAIN_8 -48 0x7F86 //RX_FDEQ_GAIN_9 -49 0x796F //RX_FDEQ_GAIN_10 -50 0x6B66 //RX_FDEQ_GAIN_11 -51 0x625E //RX_FDEQ_GAIN_12 -52 0x5850 //RX_FDEQ_GAIN_13 -53 0x4848 //RX_FDEQ_GAIN_14 -54 0x4848 //RX_FDEQ_GAIN_15 -55 0x4848 //RX_FDEQ_GAIN_16 -56 0x4848 //RX_FDEQ_GAIN_17 -57 0x4848 //RX_FDEQ_GAIN_18 -58 0x4848 //RX_FDEQ_GAIN_19 -59 0x4848 //RX_FDEQ_GAIN_20 -60 0x4848 //RX_FDEQ_GAIN_21 -61 0x4848 //RX_FDEQ_GAIN_22 -62 0x4848 //RX_FDEQ_GAIN_23 -63 0x0202 //RX_FDEQ_BIN_0 -64 0x0203 //RX_FDEQ_BIN_1 -65 0x0303 //RX_FDEQ_BIN_2 +64 0x0202 //RX_FDEQ_BIN_1 +65 0x0302 //RX_FDEQ_BIN_2 66 0x0304 //RX_FDEQ_BIN_3 67 0x0405 //RX_FDEQ_BIN_4 68 0x0506 //RX_FDEQ_BIN_5 @@ -22014,254 +17306,12 @@ 70 0x090A //RX_FDEQ_BIN_7 71 0x0B0C //RX_FDEQ_BIN_8 72 0x0D0E //RX_FDEQ_BIN_9 -73 0x0E0F //RX_FDEQ_BIN_10 -74 0x0F10 //RX_FDEQ_BIN_11 -75 0x1011 //RX_FDEQ_BIN_12 -76 0x1104 //RX_FDEQ_BIN_13 -77 0x0000 //RX_FDEQ_BIN_14 -78 0x0000 //RX_FDEQ_BIN_15 -79 0x0000 //RX_FDEQ_BIN_16 -80 0x0000 //RX_FDEQ_BIN_17 -81 0x0000 //RX_FDEQ_BIN_18 -82 0x0000 //RX_FDEQ_BIN_19 -83 0x0000 //RX_FDEQ_BIN_20 -84 0x0000 //RX_FDEQ_BIN_21 -85 0x0000 //RX_FDEQ_BIN_22 -86 0x0000 //RX_FDEQ_BIN_23 -87 0x4000 //RX_FDEQ_RESRV_0 -88 0x0320 //RX_FDEQ_RESRV_1 -89 0x0018 //RX_FDDRC_BAND_MARGIN_0 -90 0x0030 //RX_FDDRC_BAND_MARGIN_1 -91 0x0050 //RX_FDDRC_BAND_MARGIN_2 -92 0x0080 //RX_FDDRC_BAND_MARGIN_3 -93 0x0007 //RX_FDDRC_BLOCK_EXP -94 0x5000 //RX_FDDRC_THRD_2_0 -95 0x5000 //RX_FDDRC_THRD_2_1 -96 0x5000 //RX_FDDRC_THRD_2_2 -97 0x5000 //RX_FDDRC_THRD_2_3 -98 0x6400 //RX_FDDRC_THRD_3_0 -99 0x6400 //RX_FDDRC_THRD_3_1 -100 0x6400 //RX_FDDRC_THRD_3_2 -101 0x6400 //RX_FDDRC_THRD_3_3 -102 0x2000 //RX_FDDRC_SLANT_0_0 -103 0x2000 //RX_FDDRC_SLANT_0_1 -104 0x2000 //RX_FDDRC_SLANT_0_2 -105 0x2000 //RX_FDDRC_SLANT_0_3 -106 0x5333 //RX_FDDRC_SLANT_1_0 -107 0x5333 //RX_FDDRC_SLANT_1_1 -108 0x5333 //RX_FDDRC_SLANT_1_2 -109 0x5333 //RX_FDDRC_SLANT_1_3 -110 0x0000 //RX_FDDRC_RESRV_0 -111 0x0002 //RX_FILTINDX -112 0x0000 //RX_TDDRC_THRD_0 -113 0x0000 //RX_TDDRC_THRD_1 -114 0x1800 //RX_TDDRC_THRD_2 -115 0x1800 //RX_TDDRC_THRD_3 -116 0x3000 //RX_TDDRC_SLANT_0 -117 0x6E00 //RX_TDDRC_SLANT_1 -118 0x1000 //RX_TDDRC_ALPHA_UP_0 -119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 -120 0x0000 //RX_TDDRC_HMNC_FLAG -121 0x199A //RX_TDDRC_HMNC_GAIN -122 0x0001 //RX_TDDRC_SMT_FLAG -123 0x0CCD //RX_TDDRC_SMT_W -124 0x0364 //RX_TDDRC_DRC_GAIN -125 0x7C00 //RX_LAMBDA_PKA_FP -126 0x13E0 //RX_TPKA_FP -127 0x0080 //RX_MIN_G_FP -128 0x2000 //RX_MAX_G_FP -129 0x000E //RX_SPK_VOL -130 0x0000 //RX_VOL_RESRV_0 -131 0x0000 //RX_MAXLEVEL_CNG -132 0x3000 //RX_BWE_UV_TH -133 0x3000 //RX_BWE_UV_TH2 -134 0x1800 //RX_BWE_UV_TH3 -135 0x1000 //RX_BWE_V_TH -136 0x04CD //RX_BWE_GAIN1_V_TH1 -137 0x0F33 //RX_BWE_GAIN1_V_TH2 -138 0x7333 //RX_BWE_UV_EQ -139 0x199A //RX_BWE_V_EQ -140 0x7333 //RX_BWE_TONE_TH -141 0x0004 //RX_BWE_UV_HOLD_T -142 0x6CCD //RX_BWE_GAIN2_ALPHA -143 0x799A //RX_BWE_GAIN3_ALPHA -144 0x001E //RX_BWE_CUTOFF -145 0x3000 //RX_BWE_GAINFILL -146 0x3200 //RX_BWE_MAXTH_TONE -147 0x2000 //RX_BWE_EQ_0 -148 0x2000 //RX_BWE_EQ_1 -149 0x2000 //RX_BWE_EQ_2 -150 0x2000 //RX_BWE_EQ_3 -151 0x2000 //RX_BWE_EQ_4 -152 0x2000 //RX_BWE_EQ_5 -153 0x2000 //RX_BWE_EQ_6 -154 0x0000 //RX_BWE_RESRV_0 -155 0x0000 //RX_BWE_RESRV_1 -156 0x0000 //RX_BWE_RESRV_2 -#VOL 0 -6 0x1000 //RX_TDDRC_ALPHA_UP_1 -7 0x1000 //RX_TDDRC_ALPHA_UP_2 -8 0x1000 //RX_TDDRC_ALPHA_UP_3 -9 0x1000 //RX_TDDRC_ALPHA_UP_4 -27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 -28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 -29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 -32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 -33 0x7000 //RX_TDDRC_LIMITER_THRD -34 0x0800 //RX_TDDRC_LIMITER_GAIN -112 0x0000 //RX_TDDRC_THRD_0 -113 0x0000 //RX_TDDRC_THRD_1 -114 0x1800 //RX_TDDRC_THRD_2 -115 0x1800 //RX_TDDRC_THRD_3 -116 0x3000 //RX_TDDRC_SLANT_0 -117 0x6E00 //RX_TDDRC_SLANT_1 -118 0x1000 //RX_TDDRC_ALPHA_UP_0 -119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 -120 0x0000 //RX_TDDRC_HMNC_FLAG -121 0x199A //RX_TDDRC_HMNC_GAIN -122 0x0001 //RX_TDDRC_SMT_FLAG -123 0x0CCD //RX_TDDRC_SMT_W -124 0x0364 //RX_TDDRC_DRC_GAIN -38 0x001C //RX_FDEQ_SUBNUM -39 0x4840 //RX_FDEQ_GAIN_0 -40 0x4040 //RX_FDEQ_GAIN_1 -41 0x444C //RX_FDEQ_GAIN_2 -42 0x5C6C //RX_FDEQ_GAIN_3 -43 0x828B //RX_FDEQ_GAIN_4 -44 0x8F87 //RX_FDEQ_GAIN_5 -45 0x8481 //RX_FDEQ_GAIN_6 -46 0x8980 //RX_FDEQ_GAIN_7 -47 0x8383 //RX_FDEQ_GAIN_8 -48 0x7F86 //RX_FDEQ_GAIN_9 -49 0x796F //RX_FDEQ_GAIN_10 -50 0x6B66 //RX_FDEQ_GAIN_11 -51 0x625E //RX_FDEQ_GAIN_12 -52 0x5850 //RX_FDEQ_GAIN_13 -53 0x4848 //RX_FDEQ_GAIN_14 -54 0x4848 //RX_FDEQ_GAIN_15 -55 0x4848 //RX_FDEQ_GAIN_16 -56 0x4848 //RX_FDEQ_GAIN_17 -57 0x4848 //RX_FDEQ_GAIN_18 -58 0x4848 //RX_FDEQ_GAIN_19 -59 0x4848 //RX_FDEQ_GAIN_20 -60 0x4848 //RX_FDEQ_GAIN_21 -61 0x4848 //RX_FDEQ_GAIN_22 -62 0x4848 //RX_FDEQ_GAIN_23 -63 0x0202 //RX_FDEQ_BIN_0 -64 0x0203 //RX_FDEQ_BIN_1 -65 0x0303 //RX_FDEQ_BIN_2 -66 0x0304 //RX_FDEQ_BIN_3 -67 0x0405 //RX_FDEQ_BIN_4 -68 0x0506 //RX_FDEQ_BIN_5 -69 0x0708 //RX_FDEQ_BIN_6 -70 0x090A //RX_FDEQ_BIN_7 -71 0x0B0C //RX_FDEQ_BIN_8 -72 0x0D0E //RX_FDEQ_BIN_9 -73 0x0E0F //RX_FDEQ_BIN_10 -74 0x0F10 //RX_FDEQ_BIN_11 -75 0x1011 //RX_FDEQ_BIN_12 -76 0x1104 //RX_FDEQ_BIN_13 -77 0x0000 //RX_FDEQ_BIN_14 -78 0x0000 //RX_FDEQ_BIN_15 -79 0x0000 //RX_FDEQ_BIN_16 -80 0x0000 //RX_FDEQ_BIN_17 -81 0x0000 //RX_FDEQ_BIN_18 -82 0x0000 //RX_FDEQ_BIN_19 -83 0x0000 //RX_FDEQ_BIN_20 -84 0x0000 //RX_FDEQ_BIN_21 -85 0x0000 //RX_FDEQ_BIN_22 -86 0x0000 //RX_FDEQ_BIN_23 -87 0x4000 //RX_FDEQ_RESRV_0 -88 0x0320 //RX_FDEQ_RESRV_1 -89 0x0018 //RX_FDDRC_BAND_MARGIN_0 -90 0x0030 //RX_FDDRC_BAND_MARGIN_1 -91 0x0050 //RX_FDDRC_BAND_MARGIN_2 -92 0x0080 //RX_FDDRC_BAND_MARGIN_3 -93 0x0007 //RX_FDDRC_BLOCK_EXP -94 0x5000 //RX_FDDRC_THRD_2_0 -95 0x5000 //RX_FDDRC_THRD_2_1 -96 0x5000 //RX_FDDRC_THRD_2_2 -97 0x5000 //RX_FDDRC_THRD_2_3 -98 0x6400 //RX_FDDRC_THRD_3_0 -99 0x6400 //RX_FDDRC_THRD_3_1 -100 0x6400 //RX_FDDRC_THRD_3_2 -101 0x6400 //RX_FDDRC_THRD_3_3 -102 0x2000 //RX_FDDRC_SLANT_0_0 -103 0x2000 //RX_FDDRC_SLANT_0_1 -104 0x2000 //RX_FDDRC_SLANT_0_2 -105 0x2000 //RX_FDDRC_SLANT_0_3 -106 0x5333 //RX_FDDRC_SLANT_1_0 -107 0x5333 //RX_FDDRC_SLANT_1_1 -108 0x5333 //RX_FDDRC_SLANT_1_2 -109 0x5333 //RX_FDDRC_SLANT_1_3 -110 0x0000 //RX_FDDRC_RESRV_0 -129 0x000E //RX_SPK_VOL -130 0x0000 //RX_VOL_RESRV_0 -#VOL 1 -6 0x1000 //RX_TDDRC_ALPHA_UP_1 -7 0x1000 //RX_TDDRC_ALPHA_UP_2 -8 0x1000 //RX_TDDRC_ALPHA_UP_3 -9 0x1000 //RX_TDDRC_ALPHA_UP_4 -27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 -28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 -29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 -32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 -33 0x7000 //RX_TDDRC_LIMITER_THRD -34 0x0800 //RX_TDDRC_LIMITER_GAIN -112 0x0000 //RX_TDDRC_THRD_0 -113 0x0000 //RX_TDDRC_THRD_1 -114 0x1800 //RX_TDDRC_THRD_2 -115 0x1800 //RX_TDDRC_THRD_3 -116 0x3000 //RX_TDDRC_SLANT_0 -117 0x6E00 //RX_TDDRC_SLANT_1 -118 0x1000 //RX_TDDRC_ALPHA_UP_0 -119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 -120 0x0000 //RX_TDDRC_HMNC_FLAG -121 0x199A //RX_TDDRC_HMNC_GAIN -122 0x0001 //RX_TDDRC_SMT_FLAG -123 0x0CCD //RX_TDDRC_SMT_W -124 0x036E //RX_TDDRC_DRC_GAIN -38 0x001C //RX_FDEQ_SUBNUM -39 0x4840 //RX_FDEQ_GAIN_0 -40 0x4040 //RX_FDEQ_GAIN_1 -41 0x444C //RX_FDEQ_GAIN_2 -42 0x5C6C //RX_FDEQ_GAIN_3 -43 0x828B //RX_FDEQ_GAIN_4 -44 0x8F87 //RX_FDEQ_GAIN_5 -45 0x8481 //RX_FDEQ_GAIN_6 -46 0x8980 //RX_FDEQ_GAIN_7 -47 0x8383 //RX_FDEQ_GAIN_8 -48 0x7F86 //RX_FDEQ_GAIN_9 -49 0x796F //RX_FDEQ_GAIN_10 -50 0x6B66 //RX_FDEQ_GAIN_11 -51 0x625E //RX_FDEQ_GAIN_12 -52 0x5850 //RX_FDEQ_GAIN_13 -53 0x4848 //RX_FDEQ_GAIN_14 -54 0x4848 //RX_FDEQ_GAIN_15 -55 0x4848 //RX_FDEQ_GAIN_16 -56 0x4848 //RX_FDEQ_GAIN_17 -57 0x4848 //RX_FDEQ_GAIN_18 -58 0x4848 //RX_FDEQ_GAIN_19 -59 0x4848 //RX_FDEQ_GAIN_20 -60 0x4848 //RX_FDEQ_GAIN_21 -61 0x4848 //RX_FDEQ_GAIN_22 -62 0x4848 //RX_FDEQ_GAIN_23 -63 0x0202 //RX_FDEQ_BIN_0 -64 0x0203 //RX_FDEQ_BIN_1 -65 0x0303 //RX_FDEQ_BIN_2 -66 0x0304 //RX_FDEQ_BIN_3 -67 0x0405 //RX_FDEQ_BIN_4 -68 0x0506 //RX_FDEQ_BIN_5 -69 0x0708 //RX_FDEQ_BIN_6 -70 0x090A //RX_FDEQ_BIN_7 -71 0x0B0C //RX_FDEQ_BIN_8 -72 0x0D0E //RX_FDEQ_BIN_9 -73 0x0E0F //RX_FDEQ_BIN_10 -74 0x0F10 //RX_FDEQ_BIN_11 -75 0x1011 //RX_FDEQ_BIN_12 -76 0x1104 //RX_FDEQ_BIN_13 -77 0x0000 //RX_FDEQ_BIN_14 -78 0x0000 //RX_FDEQ_BIN_15 +73 0x1013 //RX_FDEQ_BIN_10 +74 0x1719 //RX_FDEQ_BIN_11 +75 0x1B1E //RX_FDEQ_BIN_12 +76 0x1E1E //RX_FDEQ_BIN_13 +77 0x1E28 //RX_FDEQ_BIN_14 +78 0x282C //RX_FDEQ_BIN_15 79 0x0000 //RX_FDEQ_BIN_16 80 0x0000 //RX_FDEQ_BIN_17 81 0x0000 //RX_FDEQ_BIN_18 @@ -22319,24 +17369,24 @@ 121 0x199A //RX_TDDRC_HMNC_GAIN 122 0x0001 //RX_TDDRC_SMT_FLAG 123 0x0CCD //RX_TDDRC_SMT_W -124 0x0364 //RX_TDDRC_DRC_GAIN -38 0x001C //RX_FDEQ_SUBNUM -39 0x4840 //RX_FDEQ_GAIN_0 -40 0x4040 //RX_FDEQ_GAIN_1 -41 0x444C //RX_FDEQ_GAIN_2 -42 0x5C6C //RX_FDEQ_GAIN_3 -43 0x828B //RX_FDEQ_GAIN_4 -44 0x8F87 //RX_FDEQ_GAIN_5 -45 0x8481 //RX_FDEQ_GAIN_6 -46 0x8980 //RX_FDEQ_GAIN_7 -47 0x8383 //RX_FDEQ_GAIN_8 -48 0x7F86 //RX_FDEQ_GAIN_9 -49 0x796F //RX_FDEQ_GAIN_10 -50 0x6B66 //RX_FDEQ_GAIN_11 -51 0x625E //RX_FDEQ_GAIN_12 -52 0x5850 //RX_FDEQ_GAIN_13 -53 0x4848 //RX_FDEQ_GAIN_14 -54 0x4848 //RX_FDEQ_GAIN_15 +124 0x02FD //RX_TDDRC_DRC_GAIN +38 0x0020 //RX_FDEQ_SUBNUM +39 0x4E4E //RX_FDEQ_GAIN_0 +40 0x4E56 //RX_FDEQ_GAIN_1 +41 0x6878 //RX_FDEQ_GAIN_2 +42 0x8088 //RX_FDEQ_GAIN_3 +43 0x848B //RX_FDEQ_GAIN_4 +44 0x8F8E //RX_FDEQ_GAIN_5 +45 0x9494 //RX_FDEQ_GAIN_6 +46 0x96A0 //RX_FDEQ_GAIN_7 +47 0xB8A0 //RX_FDEQ_GAIN_8 +48 0xA99D //RX_FDEQ_GAIN_9 +49 0x9D6A //RX_FDEQ_GAIN_10 +50 0x626B //RX_FDEQ_GAIN_11 +51 0x6C78 //RX_FDEQ_GAIN_12 +52 0x7884 //RX_FDEQ_GAIN_13 +53 0x9098 //RX_FDEQ_GAIN_14 +54 0x9CAC //RX_FDEQ_GAIN_15 55 0x4848 //RX_FDEQ_GAIN_16 56 0x4848 //RX_FDEQ_GAIN_17 57 0x4848 //RX_FDEQ_GAIN_18 @@ -22346,8 +17396,8 @@ 61 0x4848 //RX_FDEQ_GAIN_22 62 0x4848 //RX_FDEQ_GAIN_23 63 0x0202 //RX_FDEQ_BIN_0 -64 0x0203 //RX_FDEQ_BIN_1 -65 0x0303 //RX_FDEQ_BIN_2 +64 0x0202 //RX_FDEQ_BIN_1 +65 0x0302 //RX_FDEQ_BIN_2 66 0x0304 //RX_FDEQ_BIN_3 67 0x0405 //RX_FDEQ_BIN_4 68 0x0506 //RX_FDEQ_BIN_5 @@ -22355,12 +17405,12 @@ 70 0x090A //RX_FDEQ_BIN_7 71 0x0B0C //RX_FDEQ_BIN_8 72 0x0D0E //RX_FDEQ_BIN_9 -73 0x0E0F //RX_FDEQ_BIN_10 -74 0x0F10 //RX_FDEQ_BIN_11 -75 0x1011 //RX_FDEQ_BIN_12 -76 0x1104 //RX_FDEQ_BIN_13 -77 0x0000 //RX_FDEQ_BIN_14 -78 0x0000 //RX_FDEQ_BIN_15 +73 0x1013 //RX_FDEQ_BIN_10 +74 0x1719 //RX_FDEQ_BIN_11 +75 0x1B1E //RX_FDEQ_BIN_12 +76 0x1E1E //RX_FDEQ_BIN_13 +77 0x1E28 //RX_FDEQ_BIN_14 +78 0x282C //RX_FDEQ_BIN_15 79 0x0000 //RX_FDEQ_BIN_16 80 0x0000 //RX_FDEQ_BIN_17 81 0x0000 //RX_FDEQ_BIN_18 @@ -22418,24 +17468,24 @@ 121 0x199A //RX_TDDRC_HMNC_GAIN 122 0x0001 //RX_TDDRC_SMT_FLAG 123 0x0CCD //RX_TDDRC_SMT_W -124 0x0357 //RX_TDDRC_DRC_GAIN -38 0x001C //RX_FDEQ_SUBNUM -39 0x4840 //RX_FDEQ_GAIN_0 -40 0x4040 //RX_FDEQ_GAIN_1 -41 0x444C //RX_FDEQ_GAIN_2 -42 0x5C6C //RX_FDEQ_GAIN_3 -43 0x828B //RX_FDEQ_GAIN_4 -44 0x8F87 //RX_FDEQ_GAIN_5 -45 0x8481 //RX_FDEQ_GAIN_6 -46 0x8980 //RX_FDEQ_GAIN_7 -47 0x8383 //RX_FDEQ_GAIN_8 -48 0x7F86 //RX_FDEQ_GAIN_9 -49 0x796F //RX_FDEQ_GAIN_10 -50 0x6B66 //RX_FDEQ_GAIN_11 -51 0x625E //RX_FDEQ_GAIN_12 -52 0x5850 //RX_FDEQ_GAIN_13 -53 0x4848 //RX_FDEQ_GAIN_14 -54 0x4848 //RX_FDEQ_GAIN_15 +124 0x02FD //RX_TDDRC_DRC_GAIN +38 0x0020 //RX_FDEQ_SUBNUM +39 0x4E4E //RX_FDEQ_GAIN_0 +40 0x4E56 //RX_FDEQ_GAIN_1 +41 0x6878 //RX_FDEQ_GAIN_2 +42 0x8088 //RX_FDEQ_GAIN_3 +43 0x848B //RX_FDEQ_GAIN_4 +44 0x8F8E //RX_FDEQ_GAIN_5 +45 0x9494 //RX_FDEQ_GAIN_6 +46 0x96A0 //RX_FDEQ_GAIN_7 +47 0xB8A0 //RX_FDEQ_GAIN_8 +48 0xA99D //RX_FDEQ_GAIN_9 +49 0x9D6A //RX_FDEQ_GAIN_10 +50 0x626B //RX_FDEQ_GAIN_11 +51 0x6C78 //RX_FDEQ_GAIN_12 +52 0x7884 //RX_FDEQ_GAIN_13 +53 0x9098 //RX_FDEQ_GAIN_14 +54 0x9CAC //RX_FDEQ_GAIN_15 55 0x4848 //RX_FDEQ_GAIN_16 56 0x4848 //RX_FDEQ_GAIN_17 57 0x4848 //RX_FDEQ_GAIN_18 @@ -22445,8 +17495,8 @@ 61 0x4848 //RX_FDEQ_GAIN_22 62 0x4848 //RX_FDEQ_GAIN_23 63 0x0202 //RX_FDEQ_BIN_0 -64 0x0203 //RX_FDEQ_BIN_1 -65 0x0303 //RX_FDEQ_BIN_2 +64 0x0202 //RX_FDEQ_BIN_1 +65 0x0302 //RX_FDEQ_BIN_2 66 0x0304 //RX_FDEQ_BIN_3 67 0x0405 //RX_FDEQ_BIN_4 68 0x0506 //RX_FDEQ_BIN_5 @@ -22454,12 +17504,12 @@ 70 0x090A //RX_FDEQ_BIN_7 71 0x0B0C //RX_FDEQ_BIN_8 72 0x0D0E //RX_FDEQ_BIN_9 -73 0x0E0F //RX_FDEQ_BIN_10 -74 0x0F10 //RX_FDEQ_BIN_11 -75 0x1011 //RX_FDEQ_BIN_12 -76 0x1104 //RX_FDEQ_BIN_13 -77 0x0000 //RX_FDEQ_BIN_14 -78 0x0000 //RX_FDEQ_BIN_15 +73 0x1013 //RX_FDEQ_BIN_10 +74 0x1719 //RX_FDEQ_BIN_11 +75 0x1B1E //RX_FDEQ_BIN_12 +76 0x1E1E //RX_FDEQ_BIN_13 +77 0x1E28 //RX_FDEQ_BIN_14 +78 0x282C //RX_FDEQ_BIN_15 79 0x0000 //RX_FDEQ_BIN_16 80 0x0000 //RX_FDEQ_BIN_17 81 0x0000 //RX_FDEQ_BIN_18 @@ -22517,1238 +17567,24 @@ 121 0x199A //RX_TDDRC_HMNC_GAIN 122 0x0001 //RX_TDDRC_SMT_FLAG 123 0x0CCD //RX_TDDRC_SMT_W -124 0x0357 //RX_TDDRC_DRC_GAIN -38 0x001C //RX_FDEQ_SUBNUM -39 0x4840 //RX_FDEQ_GAIN_0 -40 0x4040 //RX_FDEQ_GAIN_1 -41 0x444C //RX_FDEQ_GAIN_2 -42 0x5C6C //RX_FDEQ_GAIN_3 -43 0x828B //RX_FDEQ_GAIN_4 -44 0x8F87 //RX_FDEQ_GAIN_5 -45 0x8481 //RX_FDEQ_GAIN_6 -46 0x8980 //RX_FDEQ_GAIN_7 -47 0x8383 //RX_FDEQ_GAIN_8 -48 0x7F86 //RX_FDEQ_GAIN_9 -49 0x796F //RX_FDEQ_GAIN_10 -50 0x6B66 //RX_FDEQ_GAIN_11 -51 0x625E //RX_FDEQ_GAIN_12 -52 0x5850 //RX_FDEQ_GAIN_13 -53 0x4848 //RX_FDEQ_GAIN_14 -54 0x4848 //RX_FDEQ_GAIN_15 -55 0x4848 //RX_FDEQ_GAIN_16 -56 0x4848 //RX_FDEQ_GAIN_17 -57 0x4848 //RX_FDEQ_GAIN_18 -58 0x4848 //RX_FDEQ_GAIN_19 -59 0x4848 //RX_FDEQ_GAIN_20 -60 0x4848 //RX_FDEQ_GAIN_21 -61 0x4848 //RX_FDEQ_GAIN_22 -62 0x4848 //RX_FDEQ_GAIN_23 -63 0x0202 //RX_FDEQ_BIN_0 -64 0x0203 //RX_FDEQ_BIN_1 -65 0x0303 //RX_FDEQ_BIN_2 -66 0x0304 //RX_FDEQ_BIN_3 -67 0x0405 //RX_FDEQ_BIN_4 -68 0x0506 //RX_FDEQ_BIN_5 -69 0x0708 //RX_FDEQ_BIN_6 -70 0x090A //RX_FDEQ_BIN_7 -71 0x0B0C //RX_FDEQ_BIN_8 -72 0x0D0E //RX_FDEQ_BIN_9 -73 0x0E0F //RX_FDEQ_BIN_10 -74 0x0F10 //RX_FDEQ_BIN_11 -75 0x1011 //RX_FDEQ_BIN_12 -76 0x1104 //RX_FDEQ_BIN_13 -77 0x0000 //RX_FDEQ_BIN_14 -78 0x0000 //RX_FDEQ_BIN_15 -79 0x0000 //RX_FDEQ_BIN_16 -80 0x0000 //RX_FDEQ_BIN_17 -81 0x0000 //RX_FDEQ_BIN_18 -82 0x0000 //RX_FDEQ_BIN_19 -83 0x0000 //RX_FDEQ_BIN_20 -84 0x0000 //RX_FDEQ_BIN_21 -85 0x0000 //RX_FDEQ_BIN_22 -86 0x0000 //RX_FDEQ_BIN_23 -87 0x4000 //RX_FDEQ_RESRV_0 -88 0x0320 //RX_FDEQ_RESRV_1 -89 0x0018 //RX_FDDRC_BAND_MARGIN_0 -90 0x0030 //RX_FDDRC_BAND_MARGIN_1 -91 0x0050 //RX_FDDRC_BAND_MARGIN_2 -92 0x0080 //RX_FDDRC_BAND_MARGIN_3 -93 0x0007 //RX_FDDRC_BLOCK_EXP -94 0x5000 //RX_FDDRC_THRD_2_0 -95 0x5000 //RX_FDDRC_THRD_2_1 -96 0x5000 //RX_FDDRC_THRD_2_2 -97 0x5000 //RX_FDDRC_THRD_2_3 -98 0x6400 //RX_FDDRC_THRD_3_0 -99 0x6400 //RX_FDDRC_THRD_3_1 -100 0x6400 //RX_FDDRC_THRD_3_2 -101 0x6400 //RX_FDDRC_THRD_3_3 -102 0x2000 //RX_FDDRC_SLANT_0_0 -103 0x2000 //RX_FDDRC_SLANT_0_1 -104 0x2000 //RX_FDDRC_SLANT_0_2 -105 0x2000 //RX_FDDRC_SLANT_0_3 -106 0x5333 //RX_FDDRC_SLANT_1_0 -107 0x5333 //RX_FDDRC_SLANT_1_1 -108 0x5333 //RX_FDDRC_SLANT_1_2 -109 0x5333 //RX_FDDRC_SLANT_1_3 -110 0x0000 //RX_FDDRC_RESRV_0 -129 0x005E //RX_SPK_VOL -130 0x0000 //RX_VOL_RESRV_0 -#VOL 5 -6 0x1000 //RX_TDDRC_ALPHA_UP_1 -7 0x1000 //RX_TDDRC_ALPHA_UP_2 -8 0x1000 //RX_TDDRC_ALPHA_UP_3 -9 0x1000 //RX_TDDRC_ALPHA_UP_4 -27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 -28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 -29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 -32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 -33 0x7000 //RX_TDDRC_LIMITER_THRD -34 0x0800 //RX_TDDRC_LIMITER_GAIN -112 0x0000 //RX_TDDRC_THRD_0 -113 0x0000 //RX_TDDRC_THRD_1 -114 0x1800 //RX_TDDRC_THRD_2 -115 0x1800 //RX_TDDRC_THRD_3 -116 0x3000 //RX_TDDRC_SLANT_0 -117 0x6E00 //RX_TDDRC_SLANT_1 -118 0x1000 //RX_TDDRC_ALPHA_UP_0 -119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 -120 0x0000 //RX_TDDRC_HMNC_FLAG -121 0x199A //RX_TDDRC_HMNC_GAIN -122 0x0001 //RX_TDDRC_SMT_FLAG -123 0x0CCD //RX_TDDRC_SMT_W -124 0x0357 //RX_TDDRC_DRC_GAIN -38 0x001C //RX_FDEQ_SUBNUM -39 0x4840 //RX_FDEQ_GAIN_0 -40 0x4040 //RX_FDEQ_GAIN_1 -41 0x444C //RX_FDEQ_GAIN_2 -42 0x5C6C //RX_FDEQ_GAIN_3 -43 0x828B //RX_FDEQ_GAIN_4 -44 0x8F87 //RX_FDEQ_GAIN_5 -45 0x8481 //RX_FDEQ_GAIN_6 -46 0x8980 //RX_FDEQ_GAIN_7 -47 0x8383 //RX_FDEQ_GAIN_8 -48 0x7F86 //RX_FDEQ_GAIN_9 -49 0x796F //RX_FDEQ_GAIN_10 -50 0x6B66 //RX_FDEQ_GAIN_11 -51 0x625E //RX_FDEQ_GAIN_12 -52 0x5850 //RX_FDEQ_GAIN_13 -53 0x4848 //RX_FDEQ_GAIN_14 -54 0x4848 //RX_FDEQ_GAIN_15 -55 0x4848 //RX_FDEQ_GAIN_16 -56 0x4848 //RX_FDEQ_GAIN_17 -57 0x4848 //RX_FDEQ_GAIN_18 -58 0x4848 //RX_FDEQ_GAIN_19 -59 0x4848 //RX_FDEQ_GAIN_20 -60 0x4848 //RX_FDEQ_GAIN_21 -61 0x4848 //RX_FDEQ_GAIN_22 -62 0x4848 //RX_FDEQ_GAIN_23 -63 0x0202 //RX_FDEQ_BIN_0 -64 0x0203 //RX_FDEQ_BIN_1 -65 0x0303 //RX_FDEQ_BIN_2 -66 0x0304 //RX_FDEQ_BIN_3 -67 0x0405 //RX_FDEQ_BIN_4 -68 0x0506 //RX_FDEQ_BIN_5 -69 0x0708 //RX_FDEQ_BIN_6 -70 0x090A //RX_FDEQ_BIN_7 -71 0x0B0C //RX_FDEQ_BIN_8 -72 0x0D0E //RX_FDEQ_BIN_9 -73 0x0E0F //RX_FDEQ_BIN_10 -74 0x0F10 //RX_FDEQ_BIN_11 -75 0x1011 //RX_FDEQ_BIN_12 -76 0x1104 //RX_FDEQ_BIN_13 -77 0x0000 //RX_FDEQ_BIN_14 -78 0x0000 //RX_FDEQ_BIN_15 -79 0x0000 //RX_FDEQ_BIN_16 -80 0x0000 //RX_FDEQ_BIN_17 -81 0x0000 //RX_FDEQ_BIN_18 -82 0x0000 //RX_FDEQ_BIN_19 -83 0x0000 //RX_FDEQ_BIN_20 -84 0x0000 //RX_FDEQ_BIN_21 -85 0x0000 //RX_FDEQ_BIN_22 -86 0x0000 //RX_FDEQ_BIN_23 -87 0x4000 //RX_FDEQ_RESRV_0 -88 0x0320 //RX_FDEQ_RESRV_1 -89 0x0018 //RX_FDDRC_BAND_MARGIN_0 -90 0x0030 //RX_FDDRC_BAND_MARGIN_1 -91 0x0050 //RX_FDDRC_BAND_MARGIN_2 -92 0x0080 //RX_FDDRC_BAND_MARGIN_3 -93 0x0007 //RX_FDDRC_BLOCK_EXP -94 0x5000 //RX_FDDRC_THRD_2_0 -95 0x5000 //RX_FDDRC_THRD_2_1 -96 0x5000 //RX_FDDRC_THRD_2_2 -97 0x5000 //RX_FDDRC_THRD_2_3 -98 0x6400 //RX_FDDRC_THRD_3_0 -99 0x6400 //RX_FDDRC_THRD_3_1 -100 0x6400 //RX_FDDRC_THRD_3_2 -101 0x6400 //RX_FDDRC_THRD_3_3 -102 0x2000 //RX_FDDRC_SLANT_0_0 -103 0x2000 //RX_FDDRC_SLANT_0_1 -104 0x2000 //RX_FDDRC_SLANT_0_2 -105 0x2000 //RX_FDDRC_SLANT_0_3 -106 0x5333 //RX_FDDRC_SLANT_1_0 -107 0x5333 //RX_FDDRC_SLANT_1_1 -108 0x5333 //RX_FDDRC_SLANT_1_2 -109 0x5333 //RX_FDDRC_SLANT_1_3 -110 0x0000 //RX_FDDRC_RESRV_0 -129 0x0097 //RX_SPK_VOL -130 0x0000 //RX_VOL_RESRV_0 -#VOL 6 -6 0x1000 //RX_TDDRC_ALPHA_UP_1 -7 0x1000 //RX_TDDRC_ALPHA_UP_2 -8 0x1000 //RX_TDDRC_ALPHA_UP_3 -9 0x1000 //RX_TDDRC_ALPHA_UP_4 -27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 -28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 -29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 -32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 -33 0x7000 //RX_TDDRC_LIMITER_THRD -34 0x0800 //RX_TDDRC_LIMITER_GAIN -112 0x0000 //RX_TDDRC_THRD_0 -113 0x0000 //RX_TDDRC_THRD_1 -114 0x1800 //RX_TDDRC_THRD_2 -115 0x1800 //RX_TDDRC_THRD_3 -116 0x3000 //RX_TDDRC_SLANT_0 -117 0x6E00 //RX_TDDRC_SLANT_1 -118 0x1000 //RX_TDDRC_ALPHA_UP_0 -119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 -120 0x0000 //RX_TDDRC_HMNC_FLAG -121 0x199A //RX_TDDRC_HMNC_GAIN -122 0x0001 //RX_TDDRC_SMT_FLAG -123 0x0CCD //RX_TDDRC_SMT_W -124 0x0357 //RX_TDDRC_DRC_GAIN -38 0x001C //RX_FDEQ_SUBNUM -39 0x4840 //RX_FDEQ_GAIN_0 -40 0x4040 //RX_FDEQ_GAIN_1 -41 0x444C //RX_FDEQ_GAIN_2 -42 0x5C6C //RX_FDEQ_GAIN_3 -43 0x828B //RX_FDEQ_GAIN_4 -44 0x8F87 //RX_FDEQ_GAIN_5 -45 0x8481 //RX_FDEQ_GAIN_6 -46 0x8980 //RX_FDEQ_GAIN_7 -47 0x8383 //RX_FDEQ_GAIN_8 -48 0x7F86 //RX_FDEQ_GAIN_9 -49 0x796F //RX_FDEQ_GAIN_10 -50 0x6B66 //RX_FDEQ_GAIN_11 -51 0x625E //RX_FDEQ_GAIN_12 -52 0x5850 //RX_FDEQ_GAIN_13 -53 0x4848 //RX_FDEQ_GAIN_14 -54 0x4848 //RX_FDEQ_GAIN_15 -55 0x4848 //RX_FDEQ_GAIN_16 -56 0x4848 //RX_FDEQ_GAIN_17 -57 0x4848 //RX_FDEQ_GAIN_18 -58 0x4848 //RX_FDEQ_GAIN_19 -59 0x4848 //RX_FDEQ_GAIN_20 -60 0x4848 //RX_FDEQ_GAIN_21 -61 0x4848 //RX_FDEQ_GAIN_22 -62 0x4848 //RX_FDEQ_GAIN_23 -63 0x0202 //RX_FDEQ_BIN_0 -64 0x0203 //RX_FDEQ_BIN_1 -65 0x0303 //RX_FDEQ_BIN_2 -66 0x0304 //RX_FDEQ_BIN_3 -67 0x0405 //RX_FDEQ_BIN_4 -68 0x0506 //RX_FDEQ_BIN_5 -69 0x0708 //RX_FDEQ_BIN_6 -70 0x090A //RX_FDEQ_BIN_7 -71 0x0B0C //RX_FDEQ_BIN_8 -72 0x0D0E //RX_FDEQ_BIN_9 -73 0x0E0F //RX_FDEQ_BIN_10 -74 0x0F10 //RX_FDEQ_BIN_11 -75 0x1011 //RX_FDEQ_BIN_12 -76 0x1104 //RX_FDEQ_BIN_13 -77 0x0000 //RX_FDEQ_BIN_14 -78 0x0000 //RX_FDEQ_BIN_15 -79 0x0000 //RX_FDEQ_BIN_16 -80 0x0000 //RX_FDEQ_BIN_17 -81 0x0000 //RX_FDEQ_BIN_18 -82 0x0000 //RX_FDEQ_BIN_19 -83 0x0000 //RX_FDEQ_BIN_20 -84 0x0000 //RX_FDEQ_BIN_21 -85 0x0000 //RX_FDEQ_BIN_22 -86 0x0000 //RX_FDEQ_BIN_23 -87 0x4000 //RX_FDEQ_RESRV_0 -88 0x0320 //RX_FDEQ_RESRV_1 -89 0x0018 //RX_FDDRC_BAND_MARGIN_0 -90 0x0030 //RX_FDDRC_BAND_MARGIN_1 -91 0x0050 //RX_FDDRC_BAND_MARGIN_2 -92 0x0080 //RX_FDDRC_BAND_MARGIN_3 -93 0x0007 //RX_FDDRC_BLOCK_EXP -94 0x5000 //RX_FDDRC_THRD_2_0 -95 0x5000 //RX_FDDRC_THRD_2_1 -96 0x5000 //RX_FDDRC_THRD_2_2 -97 0x5000 //RX_FDDRC_THRD_2_3 -98 0x6400 //RX_FDDRC_THRD_3_0 -99 0x6400 //RX_FDDRC_THRD_3_1 -100 0x6400 //RX_FDDRC_THRD_3_2 -101 0x6400 //RX_FDDRC_THRD_3_3 -102 0x2000 //RX_FDDRC_SLANT_0_0 -103 0x2000 //RX_FDDRC_SLANT_0_1 -104 0x2000 //RX_FDDRC_SLANT_0_2 -105 0x2000 //RX_FDDRC_SLANT_0_3 -106 0x5333 //RX_FDDRC_SLANT_1_0 -107 0x5333 //RX_FDDRC_SLANT_1_1 -108 0x5333 //RX_FDDRC_SLANT_1_2 -109 0x5333 //RX_FDDRC_SLANT_1_3 -110 0x0000 //RX_FDDRC_RESRV_0 -129 0x0100 //RX_SPK_VOL -130 0x0000 //RX_VOL_RESRV_0 - -#CASE_NAME HANDSET-HANDSET-TMOBILE_US-SWB -#PARAM_TYPE TX+RX -#TOTAL_CUSTOM_STEP 7 -#TX -0 0x0000 //TX_OPERATION_MODE_0 -1 0x0000 //TX_OPERATION_MODE_1 -2 0x0026 //TX_PATCH_REG -3 0x6F7E //TX_SENDFUNC_MODE_0 -4 0x0001 //TX_SENDFUNC_MODE_1 -5 0x0002 //TX_NUM_MIC -6 0x0003 //TX_SAMPLINGFREQ_SIG -7 0x0003 //TX_SAMPLINGFREQ_PROC -8 0x000A //TX_FRAME_SZ_SIG -9 0x000A //TX_FRAME_SZ -10 0x0000 //TX_DELAY_OPT -11 0x0028 //TX_MAX_TAIL_LENGTH -12 0x0001 //TX_NUM_LOUTCHN -13 0x0001 //TX_MAXNUM_AECREF -14 0x0000 //TX_DBG_FUNC_REG -15 0x0000 //TX_DBG_FUNC_REG1 -16 0x0000 //TX_SYS_RESRV_0 -17 0x0000 //TX_SYS_RESRV_1 -18 0x0000 //TX_SYS_RESRV_2 -19 0x0000 //TX_SYS_RESRV_3 -20 0x0000 //TX_DIST2REF0 -21 0x009D //TX_DIST2REF1 -22 0x0000 //TX_DIST2REF_02 -23 0x0000 //TX_DIST2REF_03 -24 0x0000 //TX_DIST2REF_04 -25 0x0000 //TX_DIST2REF_05 -26 0x0000 //TX_MMIC -27 0x1000 //TX_PGA_0 -28 0x1000 //TX_PGA_1 -29 0x1000 //TX_PGA_2 -30 0x0000 //TX_PGA_3 -31 0x0000 //TX_PGA_4 -32 0x0000 //TX_PGA_5 -33 0x0000 //TX_MIC_PAIRS -34 0x0000 //TX_MIC_PAIRS_HS -35 0x0002 //TX_MICS_FOR_BF -36 0x0000 //TX_MIC_PAIRS_FORL1 -37 0x0002 //TX_MICS_OF_PAIR0 -38 0x0002 //TX_MICS_OF_PAIR1 -39 0x0002 //TX_MICS_OF_PAIR2 -40 0x0002 //TX_MICS_OF_PAIR3 -41 0x0000 //TX_MIC_DATA_SRC0 -42 0x0002 //TX_MIC_DATA_SRC1 -43 0x0001 //TX_MIC_DATA_SRC2 -44 0x0000 //TX_MIC_DATA_SRC3 -45 0x0000 //TX_MIC_PAIR_CH_04 -46 0x0000 //TX_MIC_PAIR_CH_05 -47 0x0000 //TX_MIC_PAIR_CH_10 -48 0x0000 //TX_MIC_PAIR_CH_11 -49 0x0000 //TX_MIC_PAIR_CH_12 -50 0x0000 //TX_MIC_PAIR_CH_13 -51 0x0000 //TX_MIC_PAIR_CH_14 -52 0x05DC //TX_HD_BIN_MASK -53 0x0010 //TX_HD_SUBAND_MASK -54 0x19A1 //TX_HD_FRAME_AVG_MASK -55 0x0320 //TX_HD_MIN_FRQ -56 0x1000 //TX_HD_ALPHA_PSD -57 0x1100 //TX_T_PHPR1 -58 0x0000 //TX_T_PHPR2 -59 0x0000 //TX_T_PTPR -60 0x0000 //TX_T_PNPR -61 0x0000 //TX_T_PAPR1 -62 0xEE6C //TX_T_PSDVAT -63 0x0800 //TX_CNT -64 0x4000 //TX_ANTI_HOWL_GAIN -65 0x0001 //TX_MICFORBFMARK_0 -66 0x0001 //TX_MICFORBFMARK_1 -67 0x0001 //TX_MICFORBFMARK_2 -68 0x0001 //TX_MICFORBFMARK_3 -69 0x0001 //TX_MICFORBFMARK_4 -70 0x0001 //TX_MICFORBFMARK_5 -71 0x0000 //TX_DIST2REF_10 -72 0x3A66 //TX_DIST2REF_11 -73 0x0000 //TX_DIST2REF2 -74 0x0000 //TX_DIST2REF_13 -75 0x0000 //TX_DIST2REF_14 -76 0x0000 //TX_DIST2REF_15 -77 0x0000 //TX_DIST2REF_20 -78 0x0000 //TX_DIST2REF_21 -79 0x0000 //TX_DIST2REF_22 -80 0x0000 //TX_DIST2REF_23 -81 0x0000 //TX_DIST2REF_24 -82 0x0000 //TX_DIST2REF_25 -83 0x0000 //TX_DIST2REF_30 -84 0x0000 //TX_DIST2REF_31 -85 0x0000 //TX_DIST2REF_32 -86 0x0000 //TX_DIST2REF_33 -87 0x0000 //TX_DIST2REF_34 -88 0x0000 //TX_DIST2REF_35 -89 0x0000 //TX_MIC_LOC_00 -90 0x0000 //TX_MIC_LOC_01 -91 0x0000 //TX_MIC_LOC_02 -92 0x0000 //TX_MIC_LOC_03 -93 0x0000 //TX_MIC_LOC_04 -94 0x0000 //TX_MIC_LOC_05 -95 0x0000 //TX_MIC_LOC_10 -96 0x0000 //TX_MIC_LOC_11 -97 0x0000 //TX_MIC_LOC_12 -98 0x0000 //TX_MIC_LOC_13 -99 0x0000 //TX_MIC_LOC_14 -100 0x0000 //TX_MIC_LOC_15 -101 0x0000 //TX_MIC_LOC_20 -102 0x0000 //TX_MIC_LOC_21 -103 0x0000 //TX_MIC_LOC_22 -104 0x0000 //TX_MIC_LOC_23 -105 0x0000 //TX_MIC_LOC_24 -106 0x0000 //TX_MIC_LOC_25 -107 0x0200 //TX_MIC_REFBLK_VOLUME -108 0x0AAC //TX_MIC_BLOCK_VOLUME -109 0x0000 //TX_INVERSE_MASK -110 0x0000 //TX_ADCS_MASK -111 0x04D0 //TX_ADCS_GAIN -112 0x4000 //TX_NFC_GAINFAC -113 0x0000 //TX_MAINMIC_BLKFACTOR -114 0x0000 //TX_REFMIC_BLKFACTOR -115 0x0000 //TX_BLMIC_BLKFACTOR -116 0x0000 //TX_BRMIC_BLKFACTOR -117 0x0031 //TX_MICBLK_START_BIN -118 0x0060 //TX_MICBLK_END_BIN -119 0x0015 //TX_MICBLK_FE_HOLD -120 0xFFF2 //TX_MICBLK_MR_EXP_TH -121 0xFFF2 //TX_MICBLK_LR_EXP_TH -122 0x0000 //TX_FENE_HOLD -123 0x4000 //TX_FE_ENER_TH_MTS -124 0x0004 //TX_FE_ENER_TH_EXP -125 0x6000 //TX_C_POST_FLT_MIC_MAINBLK -126 0x6000 //TX_C_POST_FLT_MIC_REFBLK -127 0x0010 //TX_MIC_BLOCK_N -128 0x7E56 //TX_A_HP -129 0x4000 //TX_B_PE -130 0x1800 //TX_THR_PITCH_DET_0 -131 0x1000 //TX_THR_PITCH_DET_1 -132 0x0800 //TX_THR_PITCH_DET_2 -133 0x0008 //TX_PITCH_BFR_LEN -134 0x0003 //TX_SBD_PITCH_DET -135 0x0050 //TX_TD_AEC_L -136 0x4000 //TX_MU0_UNP_TD_AEC -137 0x1000 //TX_MU0_PTD_TD_AEC -138 0x0000 //TX_PP_RESRV_0 -139 0x2A94 //TX_PP_RESRV_1 -140 0x55F0 //TX_PP_RESRV_2 -141 0x0000 //TX_PP_RESRV_3 -142 0x0000 //TX_PP_RESRV_4 -143 0x0000 //TX_PP_RESRV_5 -144 0x0000 //TX_PP_RESRV_6 -145 0x0000 //TX_PP_RESRV_7 -146 0x0028 //TX_TAIL_LENGTH -147 0x0080 //TX_AEC_REF_GAIN_0 -148 0x0800 //TX_AEC_REF_GAIN_1 -149 0x0800 //TX_AEC_REF_GAIN_2 -150 0x7900 //TX_EAD_THR -151 0x2000 //TX_THR_RE_EST -152 0x0400 //TX_MIN_EQ_RE_EST_0 -153 0x0400 //TX_MIN_EQ_RE_EST_1 -154 0x0800 //TX_MIN_EQ_RE_EST_2 -155 0x0800 //TX_MIN_EQ_RE_EST_3 -156 0x1000 //TX_MIN_EQ_RE_EST_4 -157 0x1000 //TX_MIN_EQ_RE_EST_5 -158 0x1000 //TX_MIN_EQ_RE_EST_6 -159 0x1000 //TX_MIN_EQ_RE_EST_7 -160 0x1000 //TX_MIN_EQ_RE_EST_8 -161 0x1000 //TX_MIN_EQ_RE_EST_9 -162 0x1000 //TX_MIN_EQ_RE_EST_10 -163 0x1000 //TX_MIN_EQ_RE_EST_11 -164 0x1000 //TX_MIN_EQ_RE_EST_12 -165 0x3000 //TX_LAMBDA_RE_EST -166 0x1000 //TX_LAMBDA_CB_NLE -167 0x1800 //TX_C_POST_FLT -168 0x4000 //TX_GAIN_NP -169 0x003C //TX_SE_HOLD_N -170 0x0046 //TX_DT_HOLD_N -171 0x03E8 //TX_DT2_HOLD_N -172 0x6666 //TX_AEC_RESRV_0 -173 0x0000 //TX_AEC_RESRV_1 -174 0x0014 //TX_AEC_RESRV_2 -175 0x0000 //TX_MIC_DELAY_LENGTH -176 0x0000 //TX_REF_DELAY_LENGTH -177 0x0000 //TX_ADD_LINEIN_GAINL -178 0x0000 //TX_ADD_LINEIN_GAINH -179 0x0000 //TX_MIN_EQ_RE_EST_14 -180 0x0000 //TX_DTD_THR1_8 -181 0x7FFF //TX_DTD_THR2_8 -182 0x0000 //TX_DTD_MIC_BLK2 -183 0x0008 //TX_FRQ_LIN_LEN -184 0x7FFF //TX_FRQ_AEC_LEN_RHO -185 0x6000 //TX_MU0_UNP_FRQ_AEC -186 0x4000 //TX_MU0_PTD_FRQ_AEC -187 0x000A //TX_MINENOISETH -188 0x0800 //TX_MU0_RE_EST -189 0x0001 //TX_AEC_NUM_CH -190 0x0000 //TX_BIGECHOATTENUATION_MAX -191 0x2000 //TX_A_POST_FLT_MICBLK -192 0x0000 //TX_BLKENERTH -193 0x0000 //TX_BLKENERHIGHTH -194 0x0000 //TX_NORMENERTH -195 0x0000 //TX_NORMENERHIGHTH -196 0x0000 //TX_NORMENERHIGHTHL -197 0x7000 //TX_DTD_THR1_0 -198 0x7000 //TX_DTD_THR1_1 -199 0x7000 //TX_DTD_THR1_2 -200 0x7F00 //TX_DTD_THR1_3 -201 0x7F00 //TX_DTD_THR1_4 -202 0x7F00 //TX_DTD_THR1_5 -203 0x7F00 //TX_DTD_THR1_6 -204 0x2000 //TX_DTD_THR2_0 -205 0x2000 //TX_DTD_THR2_1 -206 0x2000 //TX_DTD_THR2_2 -207 0x1000 //TX_DTD_THR2_3 -208 0x1000 //TX_DTD_THR2_4 -209 0x1000 //TX_DTD_THR2_5 -210 0x1000 //TX_DTD_THR2_6 -211 0x6000 //TX_DTD_THR3 -212 0x0177 //TX_SPK_CUT_K -213 0x1B58 //TX_DT_CUT_K -214 0x0100 //TX_DT_CUT_THR -215 0x04EB //TX_COMFORT_G -216 0x01F4 //TX_POWER_YOUT_TH -217 0x4000 //TX_FDPFGAINECHO -218 0x0000 //TX_DTD_HD_THR -219 0x0000 //TX_SPK_CUT_K_S -220 0x0000 //TX_DTD_MIC_BLK -221 0x0400 //TX_ADPT_STRICT_L -222 0x0200 //TX_ADPT_STRICT_H -223 0x0C00 //TX_RATIO_DT_L_TH_LOW -224 0x2000 //TX_RATIO_DT_H_TH_LOW -225 0x1800 //TX_RATIO_DT_L_TH_HIGH -226 0x3000 //TX_RATIO_DT_H_TH_HIGH -227 0x0A00 //TX_RATIO_DT_L0_TH -228 0x7000 //TX_B_POST_FILT_ECHO_L -229 0x7FFF //TX_B_POST_FILT_ECHO_H -230 0x0200 //TX_MIN_G_CTRL_ECHO -231 0x7FFF //TX_B_LESSCUT_RTO_ECHO -232 0x0000 //TX_EPD_OFFSET_00 -233 0x0000 //TX_EPD_OFFST_01 -234 0x1388 //TX_RATIO_DT_L0_TH_HIGH -235 0x3A98 //TX_RATIO_DT_H_TH_CUT -236 0x7FFF //TX_MIN_EQ_RE_EST_13 -237 0x0000 //TX_DTD_THR1_7 -238 0x0000 //TX_DTD_THR2_7 -239 0x0800 //TX_DT_RESRV_7 -240 0x0800 //TX_DT_RESRV_8 -241 0x0000 //TX_DT_RESRV_9 -242 0xF600 //TX_THR_SN_EST_0 -243 0xFA00 //TX_THR_SN_EST_1 -244 0xFA00 //TX_THR_SN_EST_2 -245 0xF800 //TX_THR_SN_EST_3 -246 0xF800 //TX_THR_SN_EST_4 -247 0xF800 //TX_THR_SN_EST_5 -248 0xF800 //TX_THR_SN_EST_6 -249 0xF700 //TX_THR_SN_EST_7 -250 0x0000 //TX_DELTA_THR_SN_EST_0 -251 0x0100 //TX_DELTA_THR_SN_EST_1 -252 0x0200 //TX_DELTA_THR_SN_EST_2 -253 0x0200 //TX_DELTA_THR_SN_EST_3 -254 0x0200 //TX_DELTA_THR_SN_EST_4 -255 0x0100 //TX_DELTA_THR_SN_EST_5 -256 0x0200 //TX_DELTA_THR_SN_EST_6 -257 0x0200 //TX_DELTA_THR_SN_EST_7 -258 0x4000 //TX_LAMBDA_NN_EST_0 -259 0x4000 //TX_LAMBDA_NN_EST_1 -260 0x4000 //TX_LAMBDA_NN_EST_2 -261 0x4000 //TX_LAMBDA_NN_EST_3 -262 0x4000 //TX_LAMBDA_NN_EST_4 -263 0x4000 //TX_LAMBDA_NN_EST_5 -264 0x4000 //TX_LAMBDA_NN_EST_6 -265 0x4000 //TX_LAMBDA_NN_EST_7 -266 0x0400 //TX_N_SN_EST -267 0x001E //TX_INBEAM_T -268 0x0041 //TX_INBEAMHOLDT -269 0x2000 //TX_G_STRICT -270 0x2000 //TX_EQ_THR_BF -271 0x799A //TX_LAMBDA_EQ_BF -272 0x1000 //TX_NE_RTO_TH -273 0x1000 //TX_NE_RTO_TH_L -274 0x1000 //TX_MAINREFRTOH_TH_H -275 0x0600 //TX_MAINREFRTOH_TH_L -276 0x2000 //TX_MAINREFRTO_TH_H -277 0x1400 //TX_MAINREFRTO_TH_L -278 0x0000 //TX_MAINREFRTO_TH_EQ -279 0x1000 //TX_B_POST_FLT_0 -280 0x1000 //TX_B_POST_FLT_1 -281 0x0014 //TX_NS_LVL_CTRL_0 -282 0x0016 //TX_NS_LVL_CTRL_1 -283 0x002C //TX_NS_LVL_CTRL_2 -284 0x0016 //TX_NS_LVL_CTRL_3 -285 0x0018 //TX_NS_LVL_CTRL_4 -286 0x0016 //TX_NS_LVL_CTRL_5 -287 0x0012 //TX_NS_LVL_CTRL_6 -288 0x0017 //TX_NS_LVL_CTRL_7 -289 0x000E //TX_MIN_GAIN_S_0 -290 0x0012 //TX_MIN_GAIN_S_1 -291 0x000D //TX_MIN_GAIN_S_2 -292 0x0012 //TX_MIN_GAIN_S_3 -293 0x0010 //TX_MIN_GAIN_S_4 -294 0x0012 //TX_MIN_GAIN_S_5 -295 0x0012 //TX_MIN_GAIN_S_6 -296 0x0012 //TX_MIN_GAIN_S_7 -297 0x6000 //TX_NMOS_SUP -298 0x0000 //TX_NS_MAX_PRI_SNR_TH -299 0x0000 //TX_NMOS_SUP_MENSA -300 0x7FFF //TX_SNRI_SUP_0 -301 0x6000 //TX_SNRI_SUP_1 -302 0x6000 //TX_SNRI_SUP_2 -303 0x6000 //TX_SNRI_SUP_3 -304 0x6000 //TX_SNRI_SUP_4 -305 0x6000 //TX_SNRI_SUP_5 -306 0x6000 //TX_SNRI_SUP_6 -307 0x6000 //TX_SNRI_SUP_7 -308 0x6000 //TX_THR_LFNS -309 0x0017 //TX_G_LFNS -310 0x09C4 //TX_GAIN0_NTH -311 0x000A //TX_MUSIC_MORENS -312 0x7FFF //TX_A_POST_FILT_0 -313 0x2000 //TX_A_POST_FILT_1 -314 0x4000 //TX_A_POST_FILT_S_0 -315 0x5000 //TX_A_POST_FILT_S_1 -316 0x4000 //TX_A_POST_FILT_S_2 -317 0x4000 //TX_A_POST_FILT_S_3 -318 0x4000 //TX_A_POST_FILT_S_4 -319 0x4000 //TX_A_POST_FILT_S_5 -320 0x4000 //TX_A_POST_FILT_S_6 -321 0x7000 //TX_A_POST_FILT_S_7 -322 0x1000 //TX_B_POST_FILT_0 -323 0x1000 //TX_B_POST_FILT_1 -324 0x3000 //TX_B_POST_FILT_2 -325 0x1000 //TX_B_POST_FILT_3 -326 0x5000 //TX_B_POST_FILT_4 -327 0x2000 //TX_B_POST_FILT_5 -328 0x6000 //TX_B_POST_FILT_6 -329 0x3000 //TX_B_POST_FILT_7 -330 0x1000 //TX_B_LESSCUT_RTO_S_0 -331 0x6000 //TX_B_LESSCUT_RTO_S_1 -332 0x6000 //TX_B_LESSCUT_RTO_S_2 -333 0x6000 //TX_B_LESSCUT_RTO_S_3 -334 0x6000 //TX_B_LESSCUT_RTO_S_4 -335 0x6000 //TX_B_LESSCUT_RTO_S_5 -336 0x7FFF //TX_B_LESSCUT_RTO_S_6 -337 0x7FFF //TX_B_LESSCUT_RTO_S_7 -338 0x7E14 //TX_LAMBDA_PFILT -339 0x7C29 //TX_LAMBDA_PFILT_S_0 -340 0x7C29 //TX_LAMBDA_PFILT_S_1 -341 0x7C29 //TX_LAMBDA_PFILT_S_2 -342 0x7C29 //TX_LAMBDA_PFILT_S_3 -343 0x7C29 //TX_LAMBDA_PFILT_S_4 -344 0x7C29 //TX_LAMBDA_PFILT_S_5 -345 0x7C29 //TX_LAMBDA_PFILT_S_6 -346 0x7C29 //TX_LAMBDA_PFILT_S_7 -347 0x07D0 //TX_K_PEPPER -348 0x0800 //TX_A_PEPPER -349 0x1D4C //TX_K_PEPPER_HF -350 0x0400 //TX_A_PEPPER_HF -351 0x0001 //TX_HMNC_BST_FLG -352 0x4000 //TX_HMNC_BST_THR -353 0x0800 //TX_DT_BINVAD_TH_0 -354 0x0800 //TX_DT_BINVAD_TH_1 -355 0x0800 //TX_DT_BINVAD_TH_2 -356 0x0800 //TX_DT_BINVAD_TH_3 -357 0x0000 //TX_DT_BINVAD_ENDF -358 0x1000 //TX_C_POST_FLT_DT -359 0x7FFF //TX_NS_B_POST_FLT_LESSCUT -360 0x0100 //TX_DT_BOOST -361 0x0000 //TX_BF_SGRAD_FLG -362 0x0005 //TX_BF_DVG_TH -363 0x001E //TX_SN_C_F -364 0x0000 //TX_K_APT -365 0x0001 //TX_NOISEDET -366 0x0190 //TX_NDETCT -367 0x000A //TX_NOISE_TH_0 -368 0x7FFF //TX_NOISE_TH_0_2 -369 0x7FFF //TX_NOISE_TH_0_3 -370 0x00C6 //TX_NOISE_TH_1 -371 0x0DAC //TX_NOISE_TH_2 -372 0x2260 //TX_NOISE_TH_3 -373 0x7080 //TX_NOISE_TH_4 -374 0x57E4 //TX_NOISE_TH_5 -375 0x4BD6 //TX_NOISE_TH_5_2 -376 0x0001 //TX_NOISE_TH_5_3 -377 0x4E20 //TX_NOISE_TH_5_4 -378 0x1194 //TX_NOISE_TH_6 -379 0x0014 //TX_MINENOISE_TH -380 0x4000 //TX_MINENOISE_MIC0_TH_MTS -381 0xFFEE //TX_MINENOISE_MIC0_TH_EXP -382 0x6000 //TX_MINENOISE_MIC0_S_TH_MTS -383 0xFFF3 //TX_MINENOISE_MIC0_S_TH_EXP -384 0x00A5 //TX_OUT_ENER_S_TH_CLEAN -385 0x00A5 //TX_OUT_ENER_S_TH_LESSCLEAN -386 0x00A5 //TX_OUT_ENER_S_TH_NOISY -387 0x0029 //TX_OUT_ENER_TH_NOISE -388 0x0200 //TX_OUT_ENER_TH_SPEECH -389 0x2000 //TX_SN_NPB_GAIN -390 0x0000 //TX_NN_NPB_GAIN -391 0x0000 //TX_CSX_ALPHA_0 -392 0x0000 //TX_CSX_ALPHA_1 -393 0x0000 //TX_CSX_ALPHA_2 -394 0x0000 //TX_CSX_ALPHA_3 -395 0x0800 //TX_MU_ARSP_EST -396 0x00C8 //TX_P_OUTBEAM_MIN_TH -397 0x0002 //TX_EXTRA_NS_L -398 0x0800 //TX_EXTRA_NS_A -399 0x0005 //TX_VR_NOISE_FLOOR_TH -400 0x0148 //TX_MIN_G_LOW300HZ -401 0x0004 //TX_MAXLEVEL_CNG -402 0x00B4 //TX_STN_NOISE_TH -403 0x4000 //TX_POST_MASK_SUP -404 0x7FFF //TX_POST_MASK_ADJUST -405 0x00C8 //TX_NS_ENOISE_MIC0_TH -406 0x0014 //TX_MINENOISE_MIC0_TH -407 0x012C //TX_MINENOISE_MIC0_S_TH -408 0x2900 //TX_MIN_G_CTRL_SSNS -409 0x0800 //TX_METAL_RTO_THR -410 0x0FA0 //TX_NS_FP_K_METAL -411 0x3A98 //TX_NOISEDET_BOOST_TH -412 0x0FA0 //TX_NSMOOTH_TH -413 0x0000 //TX_NS_RESRV_8 -414 0x1800 //TX_RHO_UPB -415 0x2328 //TX_N_HOLD_HS -416 0x006E //TX_N_RHO_BFR0 -417 0x7FFF //TX_LAMBDA_ARSP_EST -418 0x0100 //TX_EXTRA_GAIN_MICBLOCK -419 0x0333 //TX_THR_STD_NSR -420 0x019A //TX_THR_STD_PLH -421 0x03E8 //TX_N_HOLD_STD -422 0x0066 //TX_THR_STD_RHO -423 0x2800 //TX_BF_RESET_THR_HS -424 0x0CCD //TX_SB_RTO_MEAN_TH -425 0x0300 //TX_SB_RHO_MEAN_TH_NTALK -426 0x2000 //TX_SB_RTO_MEAN_TH_ABN -427 0x2EE0 //TX_SB_RTO_MEAN_TH_RUB -428 0x0990 //TX_WTA_EN_RTO_TH -429 0x1400 //TX_TOP_ENER_TH_F -430 0x0100 //TX_DESIRED_TALK_HOLDT -431 0x0800 //TX_MIC_BLOCK_FACTOR -432 0x0000 //TX_NSEST_BFRLRNRDC -433 0x0000 //TX_THR_POST_FLT_HS -434 0x0010 //TX_HS_VAD_BIN -435 0x2666 //TX_THR_VAD_HS -436 0x2CCD //TX_MEAN_RTO_MIN_TH2 -437 0x0032 //TX_SILENCE_T -438 0x0000 //TX_A_POST_FLT_WTA -439 0x799A //TX_LAMBDA_PFLT_WTA -440 0x051E //TX_SB_RHO_MEAN2_TH -441 0x02F0 //TX_SB_RHO_MEAN3_TH -442 0x0000 //TX_HS_RESRV_4 -443 0x0000 //TX_HS_RESRV_5 -444 0x0001 //TX_DOA_VAD_THR_1 -445 0x003C //TX_DOA_VAD_THR_2 -446 0x0028 //TX_DOA_VAD_THR1_0 -447 0x0028 //TX_DOA_VAD_THR1_1 -448 0x0000 //TX_SRC_DOA_RNG_LOW_0A -449 0x001E //TX_SRC_DOA_RNG_HIGH_0A -450 0x005A //TX_DFLT_SRC_DOA_0A -451 0x0000 //TX_SRC_DOA_RNG_LOW_0B -452 0x0000 //TX_SRC_DOA_RNG_HIGH_0B -453 0x0000 //TX_DFLT_SRC_DOA_0B -454 0x0000 //TX_SRC_DOA_RNG_LOW_0C -455 0x0000 //TX_SRC_DOA_RNG_HIGH_0C -456 0x0000 //TX_DFLT_SRC_DOA_0C -457 0x0000 //TX_SRC_DOA_RNG_LOW_0D -458 0x0000 //TX_SRC_DOA_RNG_HIGH_0D -459 0x0000 //TX_DFLT_SRC_DOA_0D -460 0x0000 //TX_SRC_DOA_RNG_LOW_1A -461 0x00B4 //TX_SRC_DOA_RNG_HIGH_1A -462 0x005A //TX_DFLT_SRC_DOA_1A -463 0x0000 //TX_SRC_DOA_RNG_LOW_1B -464 0x00B4 //TX_SRC_DOA_RNG_HIGH_1B -465 0x005A //TX_DFLT_SRC_DOA_1B -466 0x0000 //TX_SRC_DOA_RNG_LOW_1C -467 0x00B4 //TX_SRC_DOA_RNG_HIGH_1C -468 0x005A //TX_DFLT_SRC_DOA_1C -469 0x0000 //TX_SRC_DOA_RNG_LOW_1D -470 0x00B4 //TX_SRC_DOA_RNG_HIGH_1D -471 0x005A //TX_DFLT_SRC_DOA_1D -472 0x0100 //TX_BF_HOLDOFF_T -473 0x7FFF //TX_DOA_COST_FACTOR -474 0x0D9A //TX_MAINTOREFR_TH0 -475 0x071C //TX_DOA_TRK_THR -476 0x012C //TX_DOA_TRACK_HT -477 0x0200 //TX_N1_HOLD_HF -478 0x0100 //TX_N2_HOLD_HF -479 0x2A3D //TX_BF_RESET_THR_HF -480 0x7333 //TX_DOA_SMOOTH -481 0x0800 //TX_MU_BF -482 0x0800 //TX_BF_MU_LF_B2 -483 0x0040 //TX_BF_FC_END_BIN_B2 -484 0x0020 //TX_BF_FC_END_BIN -485 0x0000 //TX_HF_RESRV_25 -486 0x0000 //TX_HF_RESRV_26 -487 0x0007 //TX_N_DOA_SEED -488 0x0001 //TX_FINE_DOA_SEARCH_FLG -489 0x0000 //TX_HF_RESRV_27 -490 0x038E //TX_DLT_SRC_DOA_RNG -491 0x0200 //TX_BF_MU_LF -492 0x0000 //TX_DFLT_SRC_LOC_0 -493 0x7FFF //TX_DFLT_SRC_LOC_1 -494 0x0000 //TX_DFLT_SRC_LOC_2 -495 0x038E //TX_DOA_TRACK_VADTH -496 0x0000 //TX_DOA_TRACK_NEW -497 0x0300 //TX_NOR_OFF_THR -498 0x7C00 //TX_MORE_ON_700HZ_THR -499 0x2000 //TX_MU_BF_ADPT_NS -500 0x0000 //TX_ADAPT_LEN -501 0x6666 //TX_MORE_SNS -502 0x0000 //TX_NOR_OFF_TH1 -503 0x0000 //TX_WIDE_MASK_TH -504 0xD333 //TX_SUBSNRATIOHIGH4MEANBCK_THR -505 0x6000 //TX_C_POST_FLT_CUT -506 0x2000 //TX_RADIODTLV -507 0x0320 //TX_POWER_LINEIN_TH -508 0x0014 //TX_FE_VADCOUNT_TH_FC -509 0x0000 //TX_ECHO_SUPP_FC -510 0x0C80 //TX_ECHO_TH -511 0x6666 //TX_MIC_TO_BFGAIN -512 0x0000 //TX_MICTOBFGAIN0 -513 0x0000 //TX_FASTMUE_TH -514 0x0000 //TX_DERVB_LEN_0 -515 0x0000 //TX_DERVB_LEN_1 -516 0x0000 //TX_RHO_DERVB -517 0x0000 //TX_MIC_INDX_DERVB -518 0x0000 //TX_MU_DERVB -519 0x0000 //TX_DR_RESRV_0 -520 0x0000 //TX_DR_RESRV_1 -521 0x0000 //TX_DR_RESRV_2 -522 0x0000 //TX_DR_RESRV_3 -523 0x0000 //TX_DR_RESRV_4 -524 0x0000 //TX_DR_RESRV_5 -525 0x0000 //TX_DR_RESRV_6 -526 0x0000 //TX_DR_RESRV_7 -527 0x0000 //TX_DR_RESRV_8 -528 0x1333 //TX_WIND_MARK_TH -529 0x399A //TX_CORR_THR -530 0x0004 //TX_SNR_THR -531 0x0010 //TX_ENGY_THR -532 0x1770 //TX_CORR_HIGH_TH -533 0x6000 //TX_ENGY_THR_2 -534 0x3400 //TX_MEAN_RTO_THR -535 0x0028 //TX_WNS_ENOISE_MIC0_TH -536 0x3000 //TX_RATIOMICL_TH -537 0x7FFF //TX_CALIG_HS -538 0x0000 //TX_LVL_CTRL -539 0x0010 //TX_WIND_SUPRTO -540 0x0014 //TX_WNS_MIN_G -541 0x0600 //TX_WNS_B_POST_FLT -542 0x3000 //TX_RATIOMICH_TH -543 0xD120 //TX_WIND_INBEAM_L_TH -544 0x0FA0 //TX_WIND_INBEAM_H_TH -545 0x2000 //TX_WNS_RESRV_0 -546 0x59D8 //TX_WNS_RESRV_1 -547 0x0200 //TX_WNS_RESRV_2 -548 0x0000 //TX_WNS_RESRV_3 -549 0x0000 //TX_WNS_RESRV_4 -550 0x0000 //TX_WNS_RESRV_5 -551 0x0000 //TX_WNS_RESRV_6 -552 0x0000 //TX_PB_B_POST_FLT_LESSCUT -553 0x0070 //TX_BF_LESSCUT_BBIN -554 0x0070 //TX_BF_LESSCUT_EBIN -555 0x0010 //TX_POSTBFB0 -556 0x0070 //TX_POSTBFB -557 0x00B0 //TX_POSTBFE -558 0x0E66 //TX_SPEECH_SNR_TH -559 0x0050 //TX_PB_MAX_PRI_SNR_TH -560 0x770A //TX_MAX_PRI_SNR_TH_L -561 0x0000 //TX_PFGAIN -562 0x0000 //TX_MAINTOREFR_TH -563 0x0000 //TX_SAM_MARK -564 0x0000 //TX_PB_RESRV_0 -565 0x0000 //TX_PB_RESRV_1 -566 0x0030 //TX_FDEQ_SUBNUM -567 0x5C54 //TX_FDEQ_GAIN_0 -568 0x5048 //TX_FDEQ_GAIN_1 -569 0x4C4C //TX_FDEQ_GAIN_2 -570 0x474F //TX_FDEQ_GAIN_3 -571 0x4842 //TX_FDEQ_GAIN_4 -572 0x4541 //TX_FDEQ_GAIN_5 -573 0x4247 //TX_FDEQ_GAIN_6 -574 0x4743 //TX_FDEQ_GAIN_7 -575 0x4445 //TX_FDEQ_GAIN_8 -576 0x4750 //TX_FDEQ_GAIN_9 -577 0x3F48 //TX_FDEQ_GAIN_10 -578 0x4844 //TX_FDEQ_GAIN_11 -579 0x3E48 //TX_FDEQ_GAIN_12 -580 0x4E4A //TX_FDEQ_GAIN_13 -581 0x5459 //TX_FDEQ_GAIN_14 -582 0x6448 //TX_FDEQ_GAIN_15 -583 0x4848 //TX_FDEQ_GAIN_16 -584 0x4848 //TX_FDEQ_GAIN_17 -585 0x4848 //TX_FDEQ_GAIN_18 -586 0x4848 //TX_FDEQ_GAIN_19 -587 0x4848 //TX_FDEQ_GAIN_20 -588 0x4848 //TX_FDEQ_GAIN_21 -589 0x4848 //TX_FDEQ_GAIN_22 -590 0x4848 //TX_FDEQ_GAIN_23 -591 0x0202 //TX_FDEQ_BIN_0 -592 0x0104 //TX_FDEQ_BIN_1 -593 0x0502 //TX_FDEQ_BIN_2 -594 0x0202 //TX_FDEQ_BIN_3 -595 0x0504 //TX_FDEQ_BIN_4 -596 0x0708 //TX_FDEQ_BIN_5 -597 0x0808 //TX_FDEQ_BIN_6 -598 0x050E //TX_FDEQ_BIN_7 -599 0x0B0C //TX_FDEQ_BIN_8 -600 0x0F0F //TX_FDEQ_BIN_9 -601 0x0E0D //TX_FDEQ_BIN_10 -602 0x0F28 //TX_FDEQ_BIN_11 -603 0x111B //TX_FDEQ_BIN_12 -604 0x291E //TX_FDEQ_BIN_13 -605 0x1E10 //TX_FDEQ_BIN_14 -606 0x1810 //TX_FDEQ_BIN_15 -607 0x1021 //TX_FDEQ_BIN_16 -608 0x1000 //TX_FDEQ_BIN_17 -609 0x0000 //TX_FDEQ_BIN_18 -610 0x0000 //TX_FDEQ_BIN_19 -611 0x0000 //TX_FDEQ_BIN_20 -612 0x0000 //TX_FDEQ_BIN_21 -613 0x0000 //TX_FDEQ_BIN_22 -614 0x0000 //TX_FDEQ_BIN_23 -615 0x0000 //TX_FDEQ_PADDING -616 0x0030 //TX_PREEQ_SUBNUM_MIC0 -617 0x4848 //TX_PREEQ_GAIN_MIC0_0 -618 0x4848 //TX_PREEQ_GAIN_MIC0_1 -619 0x4848 //TX_PREEQ_GAIN_MIC0_2 -620 0x4848 //TX_PREEQ_GAIN_MIC0_3 -621 0x4848 //TX_PREEQ_GAIN_MIC0_4 -622 0x4848 //TX_PREEQ_GAIN_MIC0_5 -623 0x4848 //TX_PREEQ_GAIN_MIC0_6 -624 0x4848 //TX_PREEQ_GAIN_MIC0_7 -625 0x4646 //TX_PREEQ_GAIN_MIC0_8 -626 0x4545 //TX_PREEQ_GAIN_MIC0_9 -627 0x4545 //TX_PREEQ_GAIN_MIC0_10 -628 0x4544 //TX_PREEQ_GAIN_MIC0_11 -629 0x4444 //TX_PREEQ_GAIN_MIC0_12 -630 0x4343 //TX_PREEQ_GAIN_MIC0_13 -631 0x4241 //TX_PREEQ_GAIN_MIC0_14 -632 0x3C3E //TX_PREEQ_GAIN_MIC0_15 -633 0x4848 //TX_PREEQ_GAIN_MIC0_16 -634 0x4848 //TX_PREEQ_GAIN_MIC0_17 -635 0x4848 //TX_PREEQ_GAIN_MIC0_18 -636 0x4848 //TX_PREEQ_GAIN_MIC0_19 -637 0x4848 //TX_PREEQ_GAIN_MIC0_20 -638 0x4848 //TX_PREEQ_GAIN_MIC0_21 -639 0x4848 //TX_PREEQ_GAIN_MIC0_22 -640 0x4848 //TX_PREEQ_GAIN_MIC0_23 -641 0x0202 //TX_PREEQ_BIN_MIC0_0 -642 0x0203 //TX_PREEQ_BIN_MIC0_1 -643 0x0303 //TX_PREEQ_BIN_MIC0_2 -644 0x0304 //TX_PREEQ_BIN_MIC0_3 -645 0x0405 //TX_PREEQ_BIN_MIC0_4 -646 0x0506 //TX_PREEQ_BIN_MIC0_5 -647 0x0708 //TX_PREEQ_BIN_MIC0_6 -648 0x090A //TX_PREEQ_BIN_MIC0_7 -649 0x0B0C //TX_PREEQ_BIN_MIC0_8 -650 0x0D0E //TX_PREEQ_BIN_MIC0_9 -651 0x1013 //TX_PREEQ_BIN_MIC0_10 -652 0x1719 //TX_PREEQ_BIN_MIC0_11 -653 0x1B1E //TX_PREEQ_BIN_MIC0_12 -654 0x1E1E //TX_PREEQ_BIN_MIC0_13 -655 0x1E28 //TX_PREEQ_BIN_MIC0_14 -656 0x282C //TX_PREEQ_BIN_MIC0_15 -657 0x0000 //TX_PREEQ_BIN_MIC0_16 -658 0x0000 //TX_PREEQ_BIN_MIC0_17 -659 0x0000 //TX_PREEQ_BIN_MIC0_18 -660 0x0000 //TX_PREEQ_BIN_MIC0_19 -661 0x0000 //TX_PREEQ_BIN_MIC0_20 -662 0x0000 //TX_PREEQ_BIN_MIC0_21 -663 0x0000 //TX_PREEQ_BIN_MIC0_22 -664 0x0000 //TX_PREEQ_BIN_MIC0_23 -665 0x0020 //TX_PREEQ_SUBNUM_MIC1 -666 0x4848 //TX_PREEQ_GAIN_MIC1_0 -667 0x4848 //TX_PREEQ_GAIN_MIC1_1 -668 0x4848 //TX_PREEQ_GAIN_MIC1_2 -669 0x4848 //TX_PREEQ_GAIN_MIC1_3 -670 0x4848 //TX_PREEQ_GAIN_MIC1_4 -671 0x4848 //TX_PREEQ_GAIN_MIC1_5 -672 0x4848 //TX_PREEQ_GAIN_MIC1_6 -673 0x4848 //TX_PREEQ_GAIN_MIC1_7 -674 0x484A //TX_PREEQ_GAIN_MIC1_8 -675 0x4B4C //TX_PREEQ_GAIN_MIC1_9 -676 0x4B4A //TX_PREEQ_GAIN_MIC1_10 -677 0x4A48 //TX_PREEQ_GAIN_MIC1_11 -678 0x4C4C //TX_PREEQ_GAIN_MIC1_12 -679 0x4C4C //TX_PREEQ_GAIN_MIC1_13 -680 0x4848 //TX_PREEQ_GAIN_MIC1_14 -681 0x4848 //TX_PREEQ_GAIN_MIC1_15 -682 0x4848 //TX_PREEQ_GAIN_MIC1_16 -683 0x4848 //TX_PREEQ_GAIN_MIC1_17 -684 0x4848 //TX_PREEQ_GAIN_MIC1_18 -685 0x4848 //TX_PREEQ_GAIN_MIC1_19 -686 0x4848 //TX_PREEQ_GAIN_MIC1_20 -687 0x4848 //TX_PREEQ_GAIN_MIC1_21 -688 0x4848 //TX_PREEQ_GAIN_MIC1_22 -689 0x4848 //TX_PREEQ_GAIN_MIC1_23 -690 0x0202 //TX_PREEQ_BIN_MIC1_0 -691 0x0203 //TX_PREEQ_BIN_MIC1_1 -692 0x0303 //TX_PREEQ_BIN_MIC1_2 -693 0x0304 //TX_PREEQ_BIN_MIC1_3 -694 0x0405 //TX_PREEQ_BIN_MIC1_4 -695 0x0506 //TX_PREEQ_BIN_MIC1_5 -696 0x0708 //TX_PREEQ_BIN_MIC1_6 -697 0x090A //TX_PREEQ_BIN_MIC1_7 -698 0x0B0C //TX_PREEQ_BIN_MIC1_8 -699 0x0D0E //TX_PREEQ_BIN_MIC1_9 -700 0x0F10 //TX_PREEQ_BIN_MIC1_10 -701 0x1011 //TX_PREEQ_BIN_MIC1_11 -702 0x1112 //TX_PREEQ_BIN_MIC1_12 -703 0x120B //TX_PREEQ_BIN_MIC1_13 -704 0x0000 //TX_PREEQ_BIN_MIC1_14 -705 0x0000 //TX_PREEQ_BIN_MIC1_15 -706 0x0000 //TX_PREEQ_BIN_MIC1_16 -707 0x0000 //TX_PREEQ_BIN_MIC1_17 -708 0x0000 //TX_PREEQ_BIN_MIC1_18 -709 0x0000 //TX_PREEQ_BIN_MIC1_19 -710 0x0000 //TX_PREEQ_BIN_MIC1_20 -711 0x0000 //TX_PREEQ_BIN_MIC1_21 -712 0x0000 //TX_PREEQ_BIN_MIC1_22 -713 0x0000 //TX_PREEQ_BIN_MIC1_23 -714 0x0030 //TX_PREEQ_SUBNUM_MIC2 -715 0x4848 //TX_PREEQ_GAIN_MIC2_0 -716 0x4848 //TX_PREEQ_GAIN_MIC2_1 -717 0x4848 //TX_PREEQ_GAIN_MIC2_2 -718 0x4848 //TX_PREEQ_GAIN_MIC2_3 -719 0x4848 //TX_PREEQ_GAIN_MIC2_4 -720 0x4848 //TX_PREEQ_GAIN_MIC2_5 -721 0x4848 //TX_PREEQ_GAIN_MIC2_6 -722 0x4848 //TX_PREEQ_GAIN_MIC2_7 -723 0x4848 //TX_PREEQ_GAIN_MIC2_8 -724 0x4848 //TX_PREEQ_GAIN_MIC2_9 -725 0x4848 //TX_PREEQ_GAIN_MIC2_10 -726 0x4848 //TX_PREEQ_GAIN_MIC2_11 -727 0x4848 //TX_PREEQ_GAIN_MIC2_12 -728 0x4848 //TX_PREEQ_GAIN_MIC2_13 -729 0x4848 //TX_PREEQ_GAIN_MIC2_14 -730 0x4848 //TX_PREEQ_GAIN_MIC2_15 -731 0x4848 //TX_PREEQ_GAIN_MIC2_16 -732 0x4848 //TX_PREEQ_GAIN_MIC2_17 -733 0x4848 //TX_PREEQ_GAIN_MIC2_18 -734 0x4848 //TX_PREEQ_GAIN_MIC2_19 -735 0x4848 //TX_PREEQ_GAIN_MIC2_20 -736 0x4848 //TX_PREEQ_GAIN_MIC2_21 -737 0x4848 //TX_PREEQ_GAIN_MIC2_22 -738 0x4848 //TX_PREEQ_GAIN_MIC2_23 -739 0x0608 //TX_PREEQ_BIN_MIC2_0 -740 0x0808 //TX_PREEQ_BIN_MIC2_1 -741 0x0808 //TX_PREEQ_BIN_MIC2_2 -742 0x0808 //TX_PREEQ_BIN_MIC2_3 -743 0x0808 //TX_PREEQ_BIN_MIC2_4 -744 0x0808 //TX_PREEQ_BIN_MIC2_5 -745 0x0808 //TX_PREEQ_BIN_MIC2_6 -746 0x0808 //TX_PREEQ_BIN_MIC2_7 -747 0x0808 //TX_PREEQ_BIN_MIC2_8 -748 0x0808 //TX_PREEQ_BIN_MIC2_9 -749 0x0808 //TX_PREEQ_BIN_MIC2_10 -750 0x0808 //TX_PREEQ_BIN_MIC2_11 -751 0x0808 //TX_PREEQ_BIN_MIC2_12 -752 0x0808 //TX_PREEQ_BIN_MIC2_13 -753 0x0808 //TX_PREEQ_BIN_MIC2_14 -754 0x0200 //TX_PREEQ_BIN_MIC2_15 -755 0x0000 //TX_PREEQ_BIN_MIC2_16 -756 0x0000 //TX_PREEQ_BIN_MIC2_17 -757 0x0000 //TX_PREEQ_BIN_MIC2_18 -758 0x0000 //TX_PREEQ_BIN_MIC2_19 -759 0x0000 //TX_PREEQ_BIN_MIC2_20 -760 0x0000 //TX_PREEQ_BIN_MIC2_21 -761 0x0000 //TX_PREEQ_BIN_MIC2_22 -762 0x0000 //TX_PREEQ_BIN_MIC2_23 -763 0x0006 //TX_MASKING_ABILITY -764 0x0800 //TX_NND_WEIGHT -765 0x0050 //TX_MIC_CALIBRATION_0 -766 0x0056 //TX_MIC_CALIBRATION_1 -767 0x0050 //TX_MIC_CALIBRATION_2 -768 0x0050 //TX_MIC_CALIBRATION_3 -769 0x0046 //TX_MIC_PWR_BIAS_0 -770 0x0042 //TX_MIC_PWR_BIAS_1 -771 0x0046 //TX_MIC_PWR_BIAS_2 -772 0x0046 //TX_MIC_PWR_BIAS_3 -773 0x0000 //TX_GAIN_LIMIT_0 -774 0x0006 //TX_GAIN_LIMIT_1 -775 0x0000 //TX_GAIN_LIMIT_2 -776 0x0000 //TX_GAIN_LIMIT_3 -777 0x7F5B //TX_BVE_NOVAD0_ALPHADOWN -778 0x7FDE //TX_BVE_VAD0_ALPHAUP -779 0x7F3A //TX_BVE_VAD0_ALPHADOWN -780 0x2000 //TX_BVE_GAINWEIGHT_NOFEVADLI -781 0x7F5B //TX_BVE_FEVADLI_ALPHA -782 0x7F19 //TX_BVE_NOVAD0_ALPHAUP -783 0x1000 //TX_TDDRC_ALPHA_UP_01 -784 0x1000 //TX_TDDRC_ALPHA_UP_02 -785 0x1000 //TX_TDDRC_ALPHA_UP_03 -786 0x1000 //TX_TDDRC_ALPHA_UP_04 -787 0x7EB8 //TX_TDDRC_ALPHA_DWN_01 -788 0x7EB8 //TX_TDDRC_ALPHA_DWN_02 -789 0x7EB8 //TX_TDDRC_ALPHA_DWN_03 -790 0x7EB8 //TX_TDDRC_ALPHA_DWN_04 -791 0x7FFF //TX_TDDRC_TD_DRC_LIMIT -792 0x0800 //TX_TDDRC_POST_LIMIT_GAIN -793 0x0000 //TX_TDDRC_RESRV_0 -794 0x0000 //TX_TDDRC_RESRV_1 -795 0x0018 //TX_FDDRC_BAND_MARGIN_0 -796 0x0030 //TX_FDDRC_BAND_MARGIN_1 -797 0x0050 //TX_FDDRC_BAND_MARGIN_2 -798 0x0080 //TX_FDDRC_BAND_MARGIN_3 -799 0x0007 //TX_FDDRC_BLOCK_EXP -800 0x5000 //TX_FDDRC_THRD_2_0 -801 0x5000 //TX_FDDRC_THRD_2_1 -802 0x5000 //TX_FDDRC_THRD_2_2 -803 0x5000 //TX_FDDRC_THRD_2_3 -804 0x6400 //TX_FDDRC_THRD_3_0 -805 0x6400 //TX_FDDRC_THRD_3_1 -806 0x6400 //TX_FDDRC_THRD_3_2 -807 0x6400 //TX_FDDRC_THRD_3_3 -808 0x2000 //TX_FDDRC_SLANT_0_0 -809 0x2000 //TX_FDDRC_SLANT_0_1 -810 0x2000 //TX_FDDRC_SLANT_0_2 -811 0x2000 //TX_FDDRC_SLANT_0_3 -812 0x5333 //TX_FDDRC_SLANT_1_0 -813 0x5333 //TX_FDDRC_SLANT_1_1 -814 0x5333 //TX_FDDRC_SLANT_1_2 -815 0x5333 //TX_FDDRC_SLANT_1_3 -816 0x0010 //TX_DEADMIC_SILENCE_TH -817 0x0600 //TX_MIC_DEGRADE_TH -818 0x0078 //TX_DEADMIC_CNT -819 0x0078 //TX_MIC_DEGRADE_CNT -820 0x0000 //TX_FDDRC_RESRV_4 -821 0x0000 //TX_FDDRC_RESRV_5 -822 0x0000 //TX_FDDRC_RESRV_6 -823 0x7FFF //TX_KS_NOISEPASTE_FACTOR -824 0x0001 //TX_KS_CONFIG -825 0x7FFF //TX_KS_GAIN_MIN -826 0x0000 //TX_KS_RESRV_0 -827 0x0000 //TX_KS_RESRV_1 -828 0x0000 //TX_KS_RESRV_2 -829 0x7C00 //TX_LAMBDA_PKA_FP -830 0x2000 //TX_TPKA_FP -831 0x0080 //TX_MIN_G_FP -832 0x2000 //TX_MAX_G_FP -833 0x0FA0 //TX_FFP_FP_K_METAL -834 0x4000 //TX_A_POST_FLT_FP -835 0x0F5C //TX_RTO_OUTBEAM_TH -836 0x4CCD //TX_TPKA_FP_THD -837 0x0000 //TX_MAX_G_FP_BLK -838 0x0000 //TX_FFP_FADEIN -839 0x0000 //TX_FFP_FADEOUT -840 0x0000 //TX_WHISPERCTH -841 0x0000 //TX_WHISPERHOLDT -842 0x0000 //TX_WHISP_ENTHH -843 0x0000 //TX_WHISP_ENTHL -844 0x0000 //TX_WHISP_RTOTH -845 0x0000 //TX_WHISP_RTOTH2 -846 0x0096 //TX_MUTE_PERIOD -847 0x0000 //TX_FADE_IN_PERIOD -848 0x0100 //TX_FFP_RESRV_2 -849 0x0020 //TX_FFP_RESRV_3 -850 0x0000 //TX_FFP_RESRV_4 -851 0x0000 //TX_FFP_RESRV_5 -852 0x0000 //TX_FFP_RESRV_6 -853 0x0002 //TX_FILTINDX -854 0x0002 //TX_TDDRC_THRD_0 -855 0x0003 //TX_TDDRC_THRD_1 -856 0x1500 //TX_TDDRC_THRD_2 -857 0x1500 //TX_TDDRC_THRD_3 -858 0x3000 //TX_TDDRC_SLANT_0 -859 0x6E00 //TX_TDDRC_SLANT_1 -860 0x1000 //TX_TDDRC_ALPHA_UP_00 -861 0x7EB8 //TX_TDDRC_ALPHA_DWN_00 -862 0x0000 //TX_TDDRC_HMNC_FLAG -863 0x199A //TX_TDDRC_HMNC_GAIN -864 0x0000 //TX_TDDRC_SMT_FLAG -865 0x0CCD //TX_TDDRC_SMT_W -866 0x05F7 //TX_TDDRC_DRC_GAIN -867 0x7FFF //TX_TDDRC_LMT_THRD -868 0x0000 //TX_TDDRC_LMT_ALPHA -869 0x0000 //TX_TFMASKLTH -870 0x0000 //TX_TFMASKLTHL -871 0x0CCD //TX_TFMASKHTH -872 0xECCD //TX_TFMASKLTH_BINVAD -873 0xFCCD //TX_TFMASKLTH_NS_EST -874 0xF800 //TX_TFMASKLTH_DOA -875 0x0CCD //TX_TFMASKTH_BLESSCUT -876 0x1000 //TX_B_LESSCUT_RTO_MASK -877 0x2000 //TX_SB_RHO_MEAN_TH_ABN -878 0x2000 //TX_B_POST_FLT_MASK -879 0x0000 //TX_B_POST_FLT_MASK1 -880 0x6333 //TX_GAIN_WIND_MASK -881 0x0000 //TX_TFMASK_BFSTRICT_MUSIC -882 0x0000 //TX_TFMASK_BFSTRICT_NOMUSIC -883 0x7333 //TX_FASTNS_OUTIN_TH -884 0x0CCD //TX_FASTNS_TFMASK_TH -885 0x0CCD //TX_FASTNS_TFMASKBIN_TH1 -886 0x0CCD //TX_FASTNS_TFMASKBIN_TH2 -887 0x0CCD //TX_FASTNS_TFMASKBIN_TH3 -888 0x0028 //TX_FASTNS_ARSPC_TH -889 0xC000 //TX_FASTNS_MASK5_TH -890 0x0810 //TX_POSTSSA_MIN_G_VR_MASK -891 0x1000 //TX_A_LESSCUT_RTO_MASK -892 0x1770 //TX_FASTNS_NOISETH -893 0xC000 //TX_FASTNS_SSA_THLFL -894 0xC000 //TX_FASTNS_SSA_THHFL -895 0xCCCC //TX_FASTNS_SSA_THLFH -896 0xD999 //TX_FASTNS_SSA_THHFH -#RX -0 0x003C //RX_RECVFUNC_MODE_0 -1 0x0000 //RX_RECVFUNC_MODE_1 -2 0x0003 //RX_SAMPLINGFREQ_SIG -3 0x0003 //RX_SAMPLINGFREQ_PROC -4 0x000A //RX_FRAME_SZ -5 0x0000 //RX_DELAY_OPT -6 0x1000 //RX_TDDRC_ALPHA_UP_1 -7 0x1000 //RX_TDDRC_ALPHA_UP_2 -8 0x1000 //RX_TDDRC_ALPHA_UP_3 -9 0x1000 //RX_TDDRC_ALPHA_UP_4 -10 0x0600 //RX_PGA -11 0x7FFF //RX_A_HP -12 0x4000 //RX_B_PE -13 0x5800 //RX_THR_PITCH_DET_0 -14 0x5000 //RX_THR_PITCH_DET_1 -15 0x4000 //RX_THR_PITCH_DET_2 -16 0x0008 //RX_PITCH_BFR_LEN -17 0x0003 //RX_SBD_PITCH_DET -18 0x0100 //RX_PP_RESRV_0 -19 0x0020 //RX_PP_RESRV_1 -20 0x0600 //RX_N_SN_EST -21 0x000C //RX_N2_SN_EST -22 0x000F //RX_NS_LVL_CTRL -23 0xF800 //RX_THR_SN_EST -24 0x7E00 //RX_LAMBDA_PFILT -25 0x000A //RX_FENS_RESRV_0 -26 0x0190 //RX_FENS_RESRV_1 -27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 -28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 -29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 -30 0x0002 //RX_EXTRA_NS_L -31 0x0800 //RX_EXTRA_NS_A -32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 -33 0x7000 //RX_TDDRC_LIMITER_THRD -34 0x0800 //RX_TDDRC_LIMITER_GAIN -35 0x199A //RX_A_POST_FLT -36 0x0000 //RX_LMT_THRD -37 0x4000 //RX_LMT_ALPHA +124 0x02FD //RX_TDDRC_DRC_GAIN 38 0x0020 //RX_FDEQ_SUBNUM -39 0x4840 //RX_FDEQ_GAIN_0 -40 0x4040 //RX_FDEQ_GAIN_1 -41 0x4559 //RX_FDEQ_GAIN_2 -42 0x6473 //RX_FDEQ_GAIN_3 -43 0x8690 //RX_FDEQ_GAIN_4 -44 0x8887 //RX_FDEQ_GAIN_5 -45 0x8787 //RX_FDEQ_GAIN_6 -46 0x8E91 //RX_FDEQ_GAIN_7 -47 0x9099 //RX_FDEQ_GAIN_8 -48 0x96A2 //RX_FDEQ_GAIN_9 -49 0xAB9C //RX_FDEQ_GAIN_10 -50 0x9287 //RX_FDEQ_GAIN_11 -51 0x716E //RX_FDEQ_GAIN_12 -52 0x5C54 //RX_FDEQ_GAIN_13 -53 0x5859 //RX_FDEQ_GAIN_14 -54 0x5861 //RX_FDEQ_GAIN_15 +39 0x4E4E //RX_FDEQ_GAIN_0 +40 0x4E56 //RX_FDEQ_GAIN_1 +41 0x6878 //RX_FDEQ_GAIN_2 +42 0x8088 //RX_FDEQ_GAIN_3 +43 0x848B //RX_FDEQ_GAIN_4 +44 0x8F8E //RX_FDEQ_GAIN_5 +45 0x9494 //RX_FDEQ_GAIN_6 +46 0x96A0 //RX_FDEQ_GAIN_7 +47 0xB8A0 //RX_FDEQ_GAIN_8 +48 0xA99D //RX_FDEQ_GAIN_9 +49 0x9D6A //RX_FDEQ_GAIN_10 +50 0x626B //RX_FDEQ_GAIN_11 +51 0x6C78 //RX_FDEQ_GAIN_12 +52 0x7884 //RX_FDEQ_GAIN_13 +53 0x9098 //RX_FDEQ_GAIN_14 +54 0x9CAC //RX_FDEQ_GAIN_15 55 0x4848 //RX_FDEQ_GAIN_16 56 0x4848 //RX_FDEQ_GAIN_17 57 0x4848 //RX_FDEQ_GAIN_18 @@ -23805,9 +17641,21 @@ 108 0x5333 //RX_FDDRC_SLANT_1_2 109 0x5333 //RX_FDDRC_SLANT_1_3 110 0x0000 //RX_FDDRC_RESRV_0 -111 0x0002 //RX_FILTINDX -112 0x0001 //RX_TDDRC_THRD_0 -113 0x0002 //RX_TDDRC_THRD_1 +129 0x0059 //RX_SPK_VOL +130 0x0000 //RX_VOL_RESRV_0 +#VOL 5 +6 0x1000 //RX_TDDRC_ALPHA_UP_1 +7 0x1000 //RX_TDDRC_ALPHA_UP_2 +8 0x1000 //RX_TDDRC_ALPHA_UP_3 +9 0x1000 //RX_TDDRC_ALPHA_UP_4 +27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +33 0x7000 //RX_TDDRC_LIMITER_THRD +34 0x0800 //RX_TDDRC_LIMITER_GAIN +112 0x0000 //RX_TDDRC_THRD_0 +113 0x0000 //RX_TDDRC_THRD_1 114 0x1800 //RX_TDDRC_THRD_2 115 0x1800 //RX_TDDRC_THRD_3 116 0x3000 //RX_TDDRC_SLANT_0 @@ -23818,2493 +17666,1041 @@ 121 0x199A //RX_TDDRC_HMNC_GAIN 122 0x0001 //RX_TDDRC_SMT_FLAG 123 0x0CCD //RX_TDDRC_SMT_W -124 0x0478 //RX_TDDRC_DRC_GAIN -125 0x7C00 //RX_LAMBDA_PKA_FP -126 0x13E0 //RX_TPKA_FP -127 0x0080 //RX_MIN_G_FP -128 0x2000 //RX_MAX_G_FP -129 0x000E //RX_SPK_VOL +124 0x02FD //RX_TDDRC_DRC_GAIN +38 0x0020 //RX_FDEQ_SUBNUM +39 0x4E4E //RX_FDEQ_GAIN_0 +40 0x4E56 //RX_FDEQ_GAIN_1 +41 0x6878 //RX_FDEQ_GAIN_2 +42 0x8088 //RX_FDEQ_GAIN_3 +43 0x848B //RX_FDEQ_GAIN_4 +44 0x8F8E //RX_FDEQ_GAIN_5 +45 0x9494 //RX_FDEQ_GAIN_6 +46 0x96A0 //RX_FDEQ_GAIN_7 +47 0xB8A0 //RX_FDEQ_GAIN_8 +48 0xA99D //RX_FDEQ_GAIN_9 +49 0x9D6A //RX_FDEQ_GAIN_10 +50 0x626B //RX_FDEQ_GAIN_11 +51 0x6C78 //RX_FDEQ_GAIN_12 +52 0x7884 //RX_FDEQ_GAIN_13 +53 0x9098 //RX_FDEQ_GAIN_14 +54 0x9CAC //RX_FDEQ_GAIN_15 +55 0x4848 //RX_FDEQ_GAIN_16 +56 0x4848 //RX_FDEQ_GAIN_17 +57 0x4848 //RX_FDEQ_GAIN_18 +58 0x4848 //RX_FDEQ_GAIN_19 +59 0x4848 //RX_FDEQ_GAIN_20 +60 0x4848 //RX_FDEQ_GAIN_21 +61 0x4848 //RX_FDEQ_GAIN_22 +62 0x4848 //RX_FDEQ_GAIN_23 +63 0x0202 //RX_FDEQ_BIN_0 +64 0x0202 //RX_FDEQ_BIN_1 +65 0x0302 //RX_FDEQ_BIN_2 +66 0x0304 //RX_FDEQ_BIN_3 +67 0x0405 //RX_FDEQ_BIN_4 +68 0x0506 //RX_FDEQ_BIN_5 +69 0x0708 //RX_FDEQ_BIN_6 +70 0x090A //RX_FDEQ_BIN_7 +71 0x0B0C //RX_FDEQ_BIN_8 +72 0x0D0E //RX_FDEQ_BIN_9 +73 0x1013 //RX_FDEQ_BIN_10 +74 0x1719 //RX_FDEQ_BIN_11 +75 0x1B1E //RX_FDEQ_BIN_12 +76 0x1E1E //RX_FDEQ_BIN_13 +77 0x1E28 //RX_FDEQ_BIN_14 +78 0x282C //RX_FDEQ_BIN_15 +79 0x0000 //RX_FDEQ_BIN_16 +80 0x0000 //RX_FDEQ_BIN_17 +81 0x0000 //RX_FDEQ_BIN_18 +82 0x0000 //RX_FDEQ_BIN_19 +83 0x0000 //RX_FDEQ_BIN_20 +84 0x0000 //RX_FDEQ_BIN_21 +85 0x0000 //RX_FDEQ_BIN_22 +86 0x0000 //RX_FDEQ_BIN_23 +87 0x4000 //RX_FDEQ_RESRV_0 +88 0x0320 //RX_FDEQ_RESRV_1 +89 0x0018 //RX_FDDRC_BAND_MARGIN_0 +90 0x0030 //RX_FDDRC_BAND_MARGIN_1 +91 0x0050 //RX_FDDRC_BAND_MARGIN_2 +92 0x0080 //RX_FDDRC_BAND_MARGIN_3 +93 0x0007 //RX_FDDRC_BLOCK_EXP +94 0x5000 //RX_FDDRC_THRD_2_0 +95 0x5000 //RX_FDDRC_THRD_2_1 +96 0x5000 //RX_FDDRC_THRD_2_2 +97 0x5000 //RX_FDDRC_THRD_2_3 +98 0x6400 //RX_FDDRC_THRD_3_0 +99 0x6400 //RX_FDDRC_THRD_3_1 +100 0x6400 //RX_FDDRC_THRD_3_2 +101 0x6400 //RX_FDDRC_THRD_3_3 +102 0x2000 //RX_FDDRC_SLANT_0_0 +103 0x2000 //RX_FDDRC_SLANT_0_1 +104 0x2000 //RX_FDDRC_SLANT_0_2 +105 0x2000 //RX_FDDRC_SLANT_0_3 +106 0x5333 //RX_FDDRC_SLANT_1_0 +107 0x5333 //RX_FDDRC_SLANT_1_1 +108 0x5333 //RX_FDDRC_SLANT_1_2 +109 0x5333 //RX_FDDRC_SLANT_1_3 +110 0x0000 //RX_FDDRC_RESRV_0 +129 0x0090 //RX_SPK_VOL 130 0x0000 //RX_VOL_RESRV_0 -131 0x0000 //RX_MAXLEVEL_CNG -132 0x3000 //RX_BWE_UV_TH -133 0x3000 //RX_BWE_UV_TH2 -134 0x1800 //RX_BWE_UV_TH3 -135 0x1000 //RX_BWE_V_TH -136 0x04CD //RX_BWE_GAIN1_V_TH1 -137 0x0F33 //RX_BWE_GAIN1_V_TH2 -138 0x7333 //RX_BWE_UV_EQ -139 0x199A //RX_BWE_V_EQ -140 0x7333 //RX_BWE_TONE_TH -141 0x0004 //RX_BWE_UV_HOLD_T -142 0x6CCD //RX_BWE_GAIN2_ALPHA -143 0x799A //RX_BWE_GAIN3_ALPHA -144 0x001E //RX_BWE_CUTOFF -145 0x3000 //RX_BWE_GAINFILL -146 0x3200 //RX_BWE_MAXTH_TONE -147 0x2000 //RX_BWE_EQ_0 -148 0x2000 //RX_BWE_EQ_1 -149 0x2000 //RX_BWE_EQ_2 -150 0x2000 //RX_BWE_EQ_3 -151 0x2000 //RX_BWE_EQ_4 -152 0x2000 //RX_BWE_EQ_5 -153 0x2000 //RX_BWE_EQ_6 -154 0x0000 //RX_BWE_RESRV_0 -155 0x0000 //RX_BWE_RESRV_1 -156 0x0000 //RX_BWE_RESRV_2 +#VOL 6 +6 0x1000 //RX_TDDRC_ALPHA_UP_1 +7 0x1000 //RX_TDDRC_ALPHA_UP_2 +8 0x1000 //RX_TDDRC_ALPHA_UP_3 +9 0x1000 //RX_TDDRC_ALPHA_UP_4 +27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +33 0x7000 //RX_TDDRC_LIMITER_THRD +34 0x0800 //RX_TDDRC_LIMITER_GAIN +112 0x0000 //RX_TDDRC_THRD_0 +113 0x0000 //RX_TDDRC_THRD_1 +114 0x1800 //RX_TDDRC_THRD_2 +115 0x1800 //RX_TDDRC_THRD_3 +116 0x3000 //RX_TDDRC_SLANT_0 +117 0x6E00 //RX_TDDRC_SLANT_1 +118 0x1000 //RX_TDDRC_ALPHA_UP_0 +119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +120 0x0000 //RX_TDDRC_HMNC_FLAG +121 0x199A //RX_TDDRC_HMNC_GAIN +122 0x0001 //RX_TDDRC_SMT_FLAG +123 0x0CCD //RX_TDDRC_SMT_W +124 0x02FD //RX_TDDRC_DRC_GAIN +38 0x0020 //RX_FDEQ_SUBNUM +39 0x4E4E //RX_FDEQ_GAIN_0 +40 0x4E56 //RX_FDEQ_GAIN_1 +41 0x6878 //RX_FDEQ_GAIN_2 +42 0x8088 //RX_FDEQ_GAIN_3 +43 0x848B //RX_FDEQ_GAIN_4 +44 0x8F8E //RX_FDEQ_GAIN_5 +45 0x9494 //RX_FDEQ_GAIN_6 +46 0x96A0 //RX_FDEQ_GAIN_7 +47 0xB8A0 //RX_FDEQ_GAIN_8 +48 0xA99D //RX_FDEQ_GAIN_9 +49 0x9D6A //RX_FDEQ_GAIN_10 +50 0x626B //RX_FDEQ_GAIN_11 +51 0x6C78 //RX_FDEQ_GAIN_12 +52 0x7884 //RX_FDEQ_GAIN_13 +53 0x9098 //RX_FDEQ_GAIN_14 +54 0x9CAC //RX_FDEQ_GAIN_15 +55 0x4848 //RX_FDEQ_GAIN_16 +56 0x4848 //RX_FDEQ_GAIN_17 +57 0x4848 //RX_FDEQ_GAIN_18 +58 0x4848 //RX_FDEQ_GAIN_19 +59 0x4848 //RX_FDEQ_GAIN_20 +60 0x4848 //RX_FDEQ_GAIN_21 +61 0x4848 //RX_FDEQ_GAIN_22 +62 0x4848 //RX_FDEQ_GAIN_23 +63 0x0202 //RX_FDEQ_BIN_0 +64 0x0202 //RX_FDEQ_BIN_1 +65 0x0302 //RX_FDEQ_BIN_2 +66 0x0304 //RX_FDEQ_BIN_3 +67 0x0405 //RX_FDEQ_BIN_4 +68 0x0506 //RX_FDEQ_BIN_5 +69 0x0708 //RX_FDEQ_BIN_6 +70 0x090A //RX_FDEQ_BIN_7 +71 0x0B0C //RX_FDEQ_BIN_8 +72 0x0D0E //RX_FDEQ_BIN_9 +73 0x1013 //RX_FDEQ_BIN_10 +74 0x1719 //RX_FDEQ_BIN_11 +75 0x1B1E //RX_FDEQ_BIN_12 +76 0x1E1E //RX_FDEQ_BIN_13 +77 0x1E28 //RX_FDEQ_BIN_14 +78 0x282C //RX_FDEQ_BIN_15 +79 0x0000 //RX_FDEQ_BIN_16 +80 0x0000 //RX_FDEQ_BIN_17 +81 0x0000 //RX_FDEQ_BIN_18 +82 0x0000 //RX_FDEQ_BIN_19 +83 0x0000 //RX_FDEQ_BIN_20 +84 0x0000 //RX_FDEQ_BIN_21 +85 0x0000 //RX_FDEQ_BIN_22 +86 0x0000 //RX_FDEQ_BIN_23 +87 0x4000 //RX_FDEQ_RESRV_0 +88 0x0320 //RX_FDEQ_RESRV_1 +89 0x0018 //RX_FDDRC_BAND_MARGIN_0 +90 0x0030 //RX_FDDRC_BAND_MARGIN_1 +91 0x0050 //RX_FDDRC_BAND_MARGIN_2 +92 0x0080 //RX_FDDRC_BAND_MARGIN_3 +93 0x0007 //RX_FDDRC_BLOCK_EXP +94 0x5000 //RX_FDDRC_THRD_2_0 +95 0x5000 //RX_FDDRC_THRD_2_1 +96 0x5000 //RX_FDDRC_THRD_2_2 +97 0x5000 //RX_FDDRC_THRD_2_3 +98 0x6400 //RX_FDDRC_THRD_3_0 +99 0x6400 //RX_FDDRC_THRD_3_1 +100 0x6400 //RX_FDDRC_THRD_3_2 +101 0x6400 //RX_FDDRC_THRD_3_3 +102 0x2000 //RX_FDDRC_SLANT_0_0 +103 0x2000 //RX_FDDRC_SLANT_0_1 +104 0x2000 //RX_FDDRC_SLANT_0_2 +105 0x2000 //RX_FDDRC_SLANT_0_3 +106 0x5333 //RX_FDDRC_SLANT_1_0 +107 0x5333 //RX_FDDRC_SLANT_1_1 +108 0x5333 //RX_FDDRC_SLANT_1_2 +109 0x5333 //RX_FDDRC_SLANT_1_3 +110 0x0000 //RX_FDDRC_RESRV_0 +129 0x0100 //RX_SPK_VOL +130 0x0000 //RX_VOL_RESRV_0 +#RX 2 +157 0x002C //RX_RECVFUNC_MODE_0 +158 0x0000 //RX_RECVFUNC_MODE_1 +159 0x0004 //RX_SAMPLINGFREQ_SIG +160 0x0004 //RX_SAMPLINGFREQ_PROC +161 0x000A //RX_FRAME_SZ +162 0x0000 //RX_DELAY_OPT +163 0x1000 //RX_TDDRC_ALPHA_UP_1 +164 0x1000 //RX_TDDRC_ALPHA_UP_2 +165 0x1000 //RX_TDDRC_ALPHA_UP_3 +166 0x1000 //RX_TDDRC_ALPHA_UP_4 +167 0x0722 //RX_PGA +168 0x7FFF //RX_A_HP +169 0x4000 //RX_B_PE +170 0x5800 //RX_THR_PITCH_DET_0 +171 0x5000 //RX_THR_PITCH_DET_1 +172 0x4000 //RX_THR_PITCH_DET_2 +173 0x0008 //RX_PITCH_BFR_LEN +174 0x0003 //RX_SBD_PITCH_DET +175 0x0100 //RX_PP_RESRV_0 +176 0x0020 //RX_PP_RESRV_1 +177 0x0600 //RX_N_SN_EST +178 0x000C //RX_N2_SN_EST +179 0x000F //RX_NS_LVL_CTRL +180 0xF800 //RX_THR_SN_EST +181 0x7E00 //RX_LAMBDA_PFILT +182 0x000A //RX_FENS_RESRV_0 +183 0x0190 //RX_FENS_RESRV_1 +184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +187 0x0002 //RX_EXTRA_NS_L +188 0x0800 //RX_EXTRA_NS_A +189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +190 0x7000 //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +192 0x199A //RX_A_POST_FLT +193 0x0000 //RX_LMT_THRD +194 0x4000 //RX_LMT_ALPHA +195 0x0020 //RX_FDEQ_SUBNUM +196 0x4E4E //RX_FDEQ_GAIN_0 +197 0x4E56 //RX_FDEQ_GAIN_1 +198 0x6878 //RX_FDEQ_GAIN_2 +199 0x8088 //RX_FDEQ_GAIN_3 +200 0x848B //RX_FDEQ_GAIN_4 +201 0x8F8E //RX_FDEQ_GAIN_5 +202 0x9494 //RX_FDEQ_GAIN_6 +203 0x96A0 //RX_FDEQ_GAIN_7 +204 0xB8A0 //RX_FDEQ_GAIN_8 +205 0xA99D //RX_FDEQ_GAIN_9 +206 0x9D6A //RX_FDEQ_GAIN_10 +207 0x626B //RX_FDEQ_GAIN_11 +208 0x6C78 //RX_FDEQ_GAIN_12 +209 0x7884 //RX_FDEQ_GAIN_13 +210 0x9098 //RX_FDEQ_GAIN_14 +211 0x9CAC //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0202 //RX_FDEQ_BIN_0 +221 0x0202 //RX_FDEQ_BIN_1 +222 0x0302 //RX_FDEQ_BIN_2 +223 0x0304 //RX_FDEQ_BIN_3 +224 0x0405 //RX_FDEQ_BIN_4 +225 0x0506 //RX_FDEQ_BIN_5 +226 0x0708 //RX_FDEQ_BIN_6 +227 0x090A //RX_FDEQ_BIN_7 +228 0x0B0C //RX_FDEQ_BIN_8 +229 0x0D0E //RX_FDEQ_BIN_9 +230 0x1013 //RX_FDEQ_BIN_10 +231 0x1719 //RX_FDEQ_BIN_11 +232 0x1B1E //RX_FDEQ_BIN_12 +233 0x1E1E //RX_FDEQ_BIN_13 +234 0x1E28 //RX_FDEQ_BIN_14 +235 0x282C //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x4000 //RX_FDEQ_RESRV_0 +245 0x0320 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0030 //RX_FDDRC_BAND_MARGIN_1 +248 0x0050 //RX_FDDRC_BAND_MARGIN_2 +249 0x0080 //RX_FDDRC_BAND_MARGIN_3 +250 0x0007 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x5000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x6400 //RX_FDDRC_THRD_3_2 +258 0x6400 //RX_FDDRC_THRD_3_3 +259 0x2000 //RX_FDDRC_SLANT_0_0 +260 0x2000 //RX_FDDRC_SLANT_0_1 +261 0x2000 //RX_FDDRC_SLANT_0_2 +262 0x2000 //RX_FDDRC_SLANT_0_3 +263 0x5333 //RX_FDDRC_SLANT_1_0 +264 0x5333 //RX_FDDRC_SLANT_1_1 +265 0x5333 //RX_FDDRC_SLANT_1_2 +266 0x5333 //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +268 0x0002 //RX_FILTINDX +269 0x0000 //RX_TDDRC_THRD_0 +270 0x0000 //RX_TDDRC_THRD_1 +271 0x1800 //RX_TDDRC_THRD_2 +272 0x1800 //RX_TDDRC_THRD_3 +273 0x3000 //RX_TDDRC_SLANT_0 +274 0x6E00 //RX_TDDRC_SLANT_1 +275 0x1000 //RX_TDDRC_ALPHA_UP_0 +276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x199A //RX_TDDRC_HMNC_GAIN +279 0x0001 //RX_TDDRC_SMT_FLAG +280 0x0CCD //RX_TDDRC_SMT_W +281 0x02FD //RX_TDDRC_DRC_GAIN +282 0x7C00 //RX_LAMBDA_PKA_FP +283 0x1964 //RX_TPKA_FP +284 0x0080 //RX_MIN_G_FP +285 0x2000 //RX_MAX_G_FP +286 0x000D //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 +288 0x0000 //RX_MAXLEVEL_CNG +289 0x3000 //RX_BWE_UV_TH +290 0x3000 //RX_BWE_UV_TH2 +291 0x1800 //RX_BWE_UV_TH3 +292 0x1000 //RX_BWE_V_TH +293 0x04CD //RX_BWE_GAIN1_V_TH1 +294 0x0F33 //RX_BWE_GAIN1_V_TH2 +295 0x7333 //RX_BWE_UV_EQ +296 0x199A //RX_BWE_V_EQ +297 0x7333 //RX_BWE_TONE_TH +298 0x0004 //RX_BWE_UV_HOLD_T +299 0x6CCD //RX_BWE_GAIN2_ALPHA +300 0x799A //RX_BWE_GAIN3_ALPHA +301 0x001E //RX_BWE_CUTOFF +302 0x3000 //RX_BWE_GAINFILL +303 0x3200 //RX_BWE_MAXTH_TONE +304 0x2000 //RX_BWE_EQ_0 +305 0x2000 //RX_BWE_EQ_1 +306 0x2000 //RX_BWE_EQ_2 +307 0x2000 //RX_BWE_EQ_3 +308 0x2000 //RX_BWE_EQ_4 +309 0x2000 //RX_BWE_EQ_5 +310 0x2000 //RX_BWE_EQ_6 +311 0x0000 //RX_BWE_RESRV_0 +312 0x0000 //RX_BWE_RESRV_1 +313 0x0000 //RX_BWE_RESRV_2 #VOL 0 -6 0x1000 //RX_TDDRC_ALPHA_UP_1 -7 0x1000 //RX_TDDRC_ALPHA_UP_2 -8 0x1000 //RX_TDDRC_ALPHA_UP_3 -9 0x1000 //RX_TDDRC_ALPHA_UP_4 -27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 -28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 -29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 -32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 -33 0x7000 //RX_TDDRC_LIMITER_THRD -34 0x0800 //RX_TDDRC_LIMITER_GAIN -112 0x0001 //RX_TDDRC_THRD_0 -113 0x0002 //RX_TDDRC_THRD_1 -114 0x1800 //RX_TDDRC_THRD_2 -115 0x1800 //RX_TDDRC_THRD_3 -116 0x3000 //RX_TDDRC_SLANT_0 -117 0x6E00 //RX_TDDRC_SLANT_1 -118 0x1000 //RX_TDDRC_ALPHA_UP_0 -119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 -120 0x0000 //RX_TDDRC_HMNC_FLAG -121 0x199A //RX_TDDRC_HMNC_GAIN -122 0x0001 //RX_TDDRC_SMT_FLAG -123 0x0CCD //RX_TDDRC_SMT_W -124 0x0478 //RX_TDDRC_DRC_GAIN -38 0x0020 //RX_FDEQ_SUBNUM -39 0x4840 //RX_FDEQ_GAIN_0 -40 0x4040 //RX_FDEQ_GAIN_1 -41 0x4559 //RX_FDEQ_GAIN_2 -42 0x6473 //RX_FDEQ_GAIN_3 -43 0x8690 //RX_FDEQ_GAIN_4 -44 0x8887 //RX_FDEQ_GAIN_5 -45 0x8787 //RX_FDEQ_GAIN_6 -46 0x8E91 //RX_FDEQ_GAIN_7 -47 0x9099 //RX_FDEQ_GAIN_8 -48 0x96A2 //RX_FDEQ_GAIN_9 -49 0xAB9C //RX_FDEQ_GAIN_10 -50 0x9287 //RX_FDEQ_GAIN_11 -51 0x716E //RX_FDEQ_GAIN_12 -52 0x5C54 //RX_FDEQ_GAIN_13 -53 0x5859 //RX_FDEQ_GAIN_14 -54 0x5861 //RX_FDEQ_GAIN_15 -55 0x4848 //RX_FDEQ_GAIN_16 -56 0x4848 //RX_FDEQ_GAIN_17 -57 0x4848 //RX_FDEQ_GAIN_18 -58 0x4848 //RX_FDEQ_GAIN_19 -59 0x4848 //RX_FDEQ_GAIN_20 -60 0x4848 //RX_FDEQ_GAIN_21 -61 0x4848 //RX_FDEQ_GAIN_22 -62 0x4848 //RX_FDEQ_GAIN_23 -63 0x0202 //RX_FDEQ_BIN_0 -64 0x0202 //RX_FDEQ_BIN_1 -65 0x0302 //RX_FDEQ_BIN_2 -66 0x0304 //RX_FDEQ_BIN_3 -67 0x0405 //RX_FDEQ_BIN_4 -68 0x0506 //RX_FDEQ_BIN_5 -69 0x0708 //RX_FDEQ_BIN_6 -70 0x090A //RX_FDEQ_BIN_7 -71 0x0B0C //RX_FDEQ_BIN_8 -72 0x0D0E //RX_FDEQ_BIN_9 -73 0x1013 //RX_FDEQ_BIN_10 -74 0x1719 //RX_FDEQ_BIN_11 -75 0x1B1E //RX_FDEQ_BIN_12 -76 0x1E1E //RX_FDEQ_BIN_13 -77 0x1E28 //RX_FDEQ_BIN_14 -78 0x282C //RX_FDEQ_BIN_15 -79 0x0000 //RX_FDEQ_BIN_16 -80 0x0000 //RX_FDEQ_BIN_17 -81 0x0000 //RX_FDEQ_BIN_18 -82 0x0000 //RX_FDEQ_BIN_19 -83 0x0000 //RX_FDEQ_BIN_20 -84 0x0000 //RX_FDEQ_BIN_21 -85 0x0000 //RX_FDEQ_BIN_22 -86 0x0000 //RX_FDEQ_BIN_23 -87 0x4000 //RX_FDEQ_RESRV_0 -88 0x0320 //RX_FDEQ_RESRV_1 -89 0x0018 //RX_FDDRC_BAND_MARGIN_0 -90 0x0030 //RX_FDDRC_BAND_MARGIN_1 -91 0x0050 //RX_FDDRC_BAND_MARGIN_2 -92 0x0080 //RX_FDDRC_BAND_MARGIN_3 -93 0x0007 //RX_FDDRC_BLOCK_EXP -94 0x5000 //RX_FDDRC_THRD_2_0 -95 0x5000 //RX_FDDRC_THRD_2_1 -96 0x5000 //RX_FDDRC_THRD_2_2 -97 0x5000 //RX_FDDRC_THRD_2_3 -98 0x6400 //RX_FDDRC_THRD_3_0 -99 0x6400 //RX_FDDRC_THRD_3_1 -100 0x6400 //RX_FDDRC_THRD_3_2 -101 0x6400 //RX_FDDRC_THRD_3_3 -102 0x2000 //RX_FDDRC_SLANT_0_0 -103 0x2000 //RX_FDDRC_SLANT_0_1 -104 0x2000 //RX_FDDRC_SLANT_0_2 -105 0x2000 //RX_FDDRC_SLANT_0_3 -106 0x5333 //RX_FDDRC_SLANT_1_0 -107 0x5333 //RX_FDDRC_SLANT_1_1 -108 0x5333 //RX_FDDRC_SLANT_1_2 -109 0x5333 //RX_FDDRC_SLANT_1_3 -110 0x0000 //RX_FDDRC_RESRV_0 -129 0x000E //RX_SPK_VOL -130 0x0000 //RX_VOL_RESRV_0 +163 0x1000 //RX_TDDRC_ALPHA_UP_1 +164 0x1000 //RX_TDDRC_ALPHA_UP_2 +165 0x1000 //RX_TDDRC_ALPHA_UP_3 +166 0x1000 //RX_TDDRC_ALPHA_UP_4 +184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +190 0x7000 //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +269 0x0000 //RX_TDDRC_THRD_0 +270 0x0000 //RX_TDDRC_THRD_1 +271 0x1800 //RX_TDDRC_THRD_2 +272 0x1800 //RX_TDDRC_THRD_3 +273 0x3000 //RX_TDDRC_SLANT_0 +274 0x6E00 //RX_TDDRC_SLANT_1 +275 0x1000 //RX_TDDRC_ALPHA_UP_0 +276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x199A //RX_TDDRC_HMNC_GAIN +279 0x0001 //RX_TDDRC_SMT_FLAG +280 0x0CCD //RX_TDDRC_SMT_W +281 0x02FD //RX_TDDRC_DRC_GAIN +195 0x0020 //RX_FDEQ_SUBNUM +196 0x4E4E //RX_FDEQ_GAIN_0 +197 0x4E56 //RX_FDEQ_GAIN_1 +198 0x6878 //RX_FDEQ_GAIN_2 +199 0x8088 //RX_FDEQ_GAIN_3 +200 0x848B //RX_FDEQ_GAIN_4 +201 0x8F8E //RX_FDEQ_GAIN_5 +202 0x9494 //RX_FDEQ_GAIN_6 +203 0x96A0 //RX_FDEQ_GAIN_7 +204 0xB8A0 //RX_FDEQ_GAIN_8 +205 0xA99D //RX_FDEQ_GAIN_9 +206 0x9D6A //RX_FDEQ_GAIN_10 +207 0x626B //RX_FDEQ_GAIN_11 +208 0x6C78 //RX_FDEQ_GAIN_12 +209 0x7884 //RX_FDEQ_GAIN_13 +210 0x9098 //RX_FDEQ_GAIN_14 +211 0x9CAC //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0202 //RX_FDEQ_BIN_0 +221 0x0202 //RX_FDEQ_BIN_1 +222 0x0302 //RX_FDEQ_BIN_2 +223 0x0304 //RX_FDEQ_BIN_3 +224 0x0405 //RX_FDEQ_BIN_4 +225 0x0506 //RX_FDEQ_BIN_5 +226 0x0708 //RX_FDEQ_BIN_6 +227 0x090A //RX_FDEQ_BIN_7 +228 0x0B0C //RX_FDEQ_BIN_8 +229 0x0D0E //RX_FDEQ_BIN_9 +230 0x1013 //RX_FDEQ_BIN_10 +231 0x1719 //RX_FDEQ_BIN_11 +232 0x1B1E //RX_FDEQ_BIN_12 +233 0x1E1E //RX_FDEQ_BIN_13 +234 0x1E28 //RX_FDEQ_BIN_14 +235 0x282C //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x4000 //RX_FDEQ_RESRV_0 +245 0x0320 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0030 //RX_FDDRC_BAND_MARGIN_1 +248 0x0050 //RX_FDDRC_BAND_MARGIN_2 +249 0x0080 //RX_FDDRC_BAND_MARGIN_3 +250 0x0007 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x5000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x6400 //RX_FDDRC_THRD_3_2 +258 0x6400 //RX_FDDRC_THRD_3_3 +259 0x2000 //RX_FDDRC_SLANT_0_0 +260 0x2000 //RX_FDDRC_SLANT_0_1 +261 0x2000 //RX_FDDRC_SLANT_0_2 +262 0x2000 //RX_FDDRC_SLANT_0_3 +263 0x5333 //RX_FDDRC_SLANT_1_0 +264 0x5333 //RX_FDDRC_SLANT_1_1 +265 0x5333 //RX_FDDRC_SLANT_1_2 +266 0x5333 //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +286 0x000D //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 #VOL 1 -6 0x1000 //RX_TDDRC_ALPHA_UP_1 -7 0x1000 //RX_TDDRC_ALPHA_UP_2 -8 0x1000 //RX_TDDRC_ALPHA_UP_3 -9 0x1000 //RX_TDDRC_ALPHA_UP_4 -27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 -28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 -29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 -32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 -33 0x7000 //RX_TDDRC_LIMITER_THRD -34 0x0800 //RX_TDDRC_LIMITER_GAIN -112 0x0001 //RX_TDDRC_THRD_0 -113 0x0002 //RX_TDDRC_THRD_1 -114 0x1800 //RX_TDDRC_THRD_2 -115 0x1800 //RX_TDDRC_THRD_3 -116 0x3000 //RX_TDDRC_SLANT_0 -117 0x6E00 //RX_TDDRC_SLANT_1 -118 0x1000 //RX_TDDRC_ALPHA_UP_0 -119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 -120 0x0000 //RX_TDDRC_HMNC_FLAG -121 0x199A //RX_TDDRC_HMNC_GAIN -122 0x0001 //RX_TDDRC_SMT_FLAG -123 0x0CCD //RX_TDDRC_SMT_W -124 0x045E //RX_TDDRC_DRC_GAIN -38 0x0020 //RX_FDEQ_SUBNUM -39 0x4840 //RX_FDEQ_GAIN_0 -40 0x4040 //RX_FDEQ_GAIN_1 -41 0x4559 //RX_FDEQ_GAIN_2 -42 0x6473 //RX_FDEQ_GAIN_3 -43 0x8690 //RX_FDEQ_GAIN_4 -44 0x8887 //RX_FDEQ_GAIN_5 -45 0x8787 //RX_FDEQ_GAIN_6 -46 0x8E91 //RX_FDEQ_GAIN_7 -47 0x9099 //RX_FDEQ_GAIN_8 -48 0x96A2 //RX_FDEQ_GAIN_9 -49 0xAB9C //RX_FDEQ_GAIN_10 -50 0x9287 //RX_FDEQ_GAIN_11 -51 0x716E //RX_FDEQ_GAIN_12 -52 0x5C54 //RX_FDEQ_GAIN_13 -53 0x5859 //RX_FDEQ_GAIN_14 -54 0x5861 //RX_FDEQ_GAIN_15 -55 0x4848 //RX_FDEQ_GAIN_16 -56 0x4848 //RX_FDEQ_GAIN_17 -57 0x4848 //RX_FDEQ_GAIN_18 -58 0x4848 //RX_FDEQ_GAIN_19 -59 0x4848 //RX_FDEQ_GAIN_20 -60 0x4848 //RX_FDEQ_GAIN_21 -61 0x4848 //RX_FDEQ_GAIN_22 -62 0x4848 //RX_FDEQ_GAIN_23 -63 0x0202 //RX_FDEQ_BIN_0 -64 0x0202 //RX_FDEQ_BIN_1 -65 0x0302 //RX_FDEQ_BIN_2 -66 0x0304 //RX_FDEQ_BIN_3 -67 0x0405 //RX_FDEQ_BIN_4 -68 0x0506 //RX_FDEQ_BIN_5 -69 0x0708 //RX_FDEQ_BIN_6 -70 0x090A //RX_FDEQ_BIN_7 -71 0x0B0C //RX_FDEQ_BIN_8 -72 0x0D0E //RX_FDEQ_BIN_9 -73 0x1013 //RX_FDEQ_BIN_10 -74 0x1719 //RX_FDEQ_BIN_11 -75 0x1B1E //RX_FDEQ_BIN_12 -76 0x1E1E //RX_FDEQ_BIN_13 -77 0x1E28 //RX_FDEQ_BIN_14 -78 0x282C //RX_FDEQ_BIN_15 -79 0x0000 //RX_FDEQ_BIN_16 -80 0x0000 //RX_FDEQ_BIN_17 -81 0x0000 //RX_FDEQ_BIN_18 -82 0x0000 //RX_FDEQ_BIN_19 -83 0x0000 //RX_FDEQ_BIN_20 -84 0x0000 //RX_FDEQ_BIN_21 -85 0x0000 //RX_FDEQ_BIN_22 -86 0x0000 //RX_FDEQ_BIN_23 -87 0x4000 //RX_FDEQ_RESRV_0 -88 0x0320 //RX_FDEQ_RESRV_1 -89 0x0018 //RX_FDDRC_BAND_MARGIN_0 -90 0x0030 //RX_FDDRC_BAND_MARGIN_1 -91 0x0050 //RX_FDDRC_BAND_MARGIN_2 -92 0x0080 //RX_FDDRC_BAND_MARGIN_3 -93 0x0007 //RX_FDDRC_BLOCK_EXP -94 0x5000 //RX_FDDRC_THRD_2_0 -95 0x5000 //RX_FDDRC_THRD_2_1 -96 0x5000 //RX_FDDRC_THRD_2_2 -97 0x5000 //RX_FDDRC_THRD_2_3 -98 0x6400 //RX_FDDRC_THRD_3_0 -99 0x6400 //RX_FDDRC_THRD_3_1 -100 0x6400 //RX_FDDRC_THRD_3_2 -101 0x6400 //RX_FDDRC_THRD_3_3 -102 0x2000 //RX_FDDRC_SLANT_0_0 -103 0x2000 //RX_FDDRC_SLANT_0_1 -104 0x2000 //RX_FDDRC_SLANT_0_2 -105 0x2000 //RX_FDDRC_SLANT_0_3 -106 0x5333 //RX_FDDRC_SLANT_1_0 -107 0x5333 //RX_FDDRC_SLANT_1_1 -108 0x5333 //RX_FDDRC_SLANT_1_2 -109 0x5333 //RX_FDDRC_SLANT_1_3 -110 0x0000 //RX_FDDRC_RESRV_0 -129 0x0017 //RX_SPK_VOL -130 0x0000 //RX_VOL_RESRV_0 +163 0x1000 //RX_TDDRC_ALPHA_UP_1 +164 0x1000 //RX_TDDRC_ALPHA_UP_2 +165 0x1000 //RX_TDDRC_ALPHA_UP_3 +166 0x1000 //RX_TDDRC_ALPHA_UP_4 +184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +190 0x7000 //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +269 0x0000 //RX_TDDRC_THRD_0 +270 0x0000 //RX_TDDRC_THRD_1 +271 0x1800 //RX_TDDRC_THRD_2 +272 0x1800 //RX_TDDRC_THRD_3 +273 0x3000 //RX_TDDRC_SLANT_0 +274 0x6E00 //RX_TDDRC_SLANT_1 +275 0x1000 //RX_TDDRC_ALPHA_UP_0 +276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x199A //RX_TDDRC_HMNC_GAIN +279 0x0001 //RX_TDDRC_SMT_FLAG +280 0x0CCD //RX_TDDRC_SMT_W +281 0x02FD //RX_TDDRC_DRC_GAIN +195 0x0020 //RX_FDEQ_SUBNUM +196 0x4E4E //RX_FDEQ_GAIN_0 +197 0x4E56 //RX_FDEQ_GAIN_1 +198 0x6878 //RX_FDEQ_GAIN_2 +199 0x8088 //RX_FDEQ_GAIN_3 +200 0x848B //RX_FDEQ_GAIN_4 +201 0x8F8E //RX_FDEQ_GAIN_5 +202 0x9494 //RX_FDEQ_GAIN_6 +203 0x96A0 //RX_FDEQ_GAIN_7 +204 0xB8A0 //RX_FDEQ_GAIN_8 +205 0xA99D //RX_FDEQ_GAIN_9 +206 0x9D6A //RX_FDEQ_GAIN_10 +207 0x626B //RX_FDEQ_GAIN_11 +208 0x6C78 //RX_FDEQ_GAIN_12 +209 0x7884 //RX_FDEQ_GAIN_13 +210 0x9098 //RX_FDEQ_GAIN_14 +211 0x9CAC //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0202 //RX_FDEQ_BIN_0 +221 0x0202 //RX_FDEQ_BIN_1 +222 0x0302 //RX_FDEQ_BIN_2 +223 0x0304 //RX_FDEQ_BIN_3 +224 0x0405 //RX_FDEQ_BIN_4 +225 0x0506 //RX_FDEQ_BIN_5 +226 0x0708 //RX_FDEQ_BIN_6 +227 0x090A //RX_FDEQ_BIN_7 +228 0x0B0C //RX_FDEQ_BIN_8 +229 0x0D0E //RX_FDEQ_BIN_9 +230 0x1013 //RX_FDEQ_BIN_10 +231 0x1719 //RX_FDEQ_BIN_11 +232 0x1B1E //RX_FDEQ_BIN_12 +233 0x1E1E //RX_FDEQ_BIN_13 +234 0x1E28 //RX_FDEQ_BIN_14 +235 0x282C //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x4000 //RX_FDEQ_RESRV_0 +245 0x0320 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0030 //RX_FDDRC_BAND_MARGIN_1 +248 0x0050 //RX_FDDRC_BAND_MARGIN_2 +249 0x0080 //RX_FDDRC_BAND_MARGIN_3 +250 0x0007 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x5000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x6400 //RX_FDDRC_THRD_3_2 +258 0x6400 //RX_FDDRC_THRD_3_3 +259 0x2000 //RX_FDDRC_SLANT_0_0 +260 0x2000 //RX_FDDRC_SLANT_0_1 +261 0x2000 //RX_FDDRC_SLANT_0_2 +262 0x2000 //RX_FDDRC_SLANT_0_3 +263 0x5333 //RX_FDDRC_SLANT_1_0 +264 0x5333 //RX_FDDRC_SLANT_1_1 +265 0x5333 //RX_FDDRC_SLANT_1_2 +266 0x5333 //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +286 0x0016 //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 #VOL 2 -6 0x1000 //RX_TDDRC_ALPHA_UP_1 -7 0x1000 //RX_TDDRC_ALPHA_UP_2 -8 0x1000 //RX_TDDRC_ALPHA_UP_3 -9 0x1000 //RX_TDDRC_ALPHA_UP_4 -27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 -28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 -29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 -32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 -33 0x7000 //RX_TDDRC_LIMITER_THRD -34 0x0800 //RX_TDDRC_LIMITER_GAIN -112 0x0001 //RX_TDDRC_THRD_0 -113 0x0002 //RX_TDDRC_THRD_1 -114 0x1800 //RX_TDDRC_THRD_2 -115 0x1800 //RX_TDDRC_THRD_3 -116 0x3000 //RX_TDDRC_SLANT_0 -117 0x6E00 //RX_TDDRC_SLANT_1 -118 0x1000 //RX_TDDRC_ALPHA_UP_0 -119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 -120 0x0000 //RX_TDDRC_HMNC_FLAG -121 0x199A //RX_TDDRC_HMNC_GAIN -122 0x0001 //RX_TDDRC_SMT_FLAG -123 0x0CCD //RX_TDDRC_SMT_W -124 0x0478 //RX_TDDRC_DRC_GAIN -38 0x0020 //RX_FDEQ_SUBNUM -39 0x4840 //RX_FDEQ_GAIN_0 -40 0x4040 //RX_FDEQ_GAIN_1 -41 0x4559 //RX_FDEQ_GAIN_2 -42 0x6473 //RX_FDEQ_GAIN_3 -43 0x8690 //RX_FDEQ_GAIN_4 -44 0x8887 //RX_FDEQ_GAIN_5 -45 0x8787 //RX_FDEQ_GAIN_6 -46 0x8E91 //RX_FDEQ_GAIN_7 -47 0x9099 //RX_FDEQ_GAIN_8 -48 0x96A2 //RX_FDEQ_GAIN_9 -49 0xAB9C //RX_FDEQ_GAIN_10 -50 0x9287 //RX_FDEQ_GAIN_11 -51 0x716E //RX_FDEQ_GAIN_12 -52 0x5C54 //RX_FDEQ_GAIN_13 -53 0x5859 //RX_FDEQ_GAIN_14 -54 0x5861 //RX_FDEQ_GAIN_15 -55 0x4848 //RX_FDEQ_GAIN_16 -56 0x4848 //RX_FDEQ_GAIN_17 -57 0x4848 //RX_FDEQ_GAIN_18 -58 0x4848 //RX_FDEQ_GAIN_19 -59 0x4848 //RX_FDEQ_GAIN_20 -60 0x4848 //RX_FDEQ_GAIN_21 -61 0x4848 //RX_FDEQ_GAIN_22 -62 0x4848 //RX_FDEQ_GAIN_23 -63 0x0202 //RX_FDEQ_BIN_0 -64 0x0202 //RX_FDEQ_BIN_1 -65 0x0302 //RX_FDEQ_BIN_2 -66 0x0304 //RX_FDEQ_BIN_3 -67 0x0405 //RX_FDEQ_BIN_4 -68 0x0506 //RX_FDEQ_BIN_5 -69 0x0708 //RX_FDEQ_BIN_6 -70 0x090A //RX_FDEQ_BIN_7 -71 0x0B0C //RX_FDEQ_BIN_8 -72 0x0D0E //RX_FDEQ_BIN_9 -73 0x1013 //RX_FDEQ_BIN_10 -74 0x1719 //RX_FDEQ_BIN_11 -75 0x1B1E //RX_FDEQ_BIN_12 -76 0x1E1E //RX_FDEQ_BIN_13 -77 0x1E28 //RX_FDEQ_BIN_14 -78 0x282C //RX_FDEQ_BIN_15 -79 0x0000 //RX_FDEQ_BIN_16 -80 0x0000 //RX_FDEQ_BIN_17 -81 0x0000 //RX_FDEQ_BIN_18 -82 0x0000 //RX_FDEQ_BIN_19 -83 0x0000 //RX_FDEQ_BIN_20 -84 0x0000 //RX_FDEQ_BIN_21 -85 0x0000 //RX_FDEQ_BIN_22 -86 0x0000 //RX_FDEQ_BIN_23 -87 0x4000 //RX_FDEQ_RESRV_0 -88 0x0320 //RX_FDEQ_RESRV_1 -89 0x0018 //RX_FDDRC_BAND_MARGIN_0 -90 0x0030 //RX_FDDRC_BAND_MARGIN_1 -91 0x0050 //RX_FDDRC_BAND_MARGIN_2 -92 0x0080 //RX_FDDRC_BAND_MARGIN_3 -93 0x0007 //RX_FDDRC_BLOCK_EXP -94 0x5000 //RX_FDDRC_THRD_2_0 -95 0x5000 //RX_FDDRC_THRD_2_1 -96 0x5000 //RX_FDDRC_THRD_2_2 -97 0x5000 //RX_FDDRC_THRD_2_3 -98 0x6400 //RX_FDDRC_THRD_3_0 -99 0x6400 //RX_FDDRC_THRD_3_1 -100 0x6400 //RX_FDDRC_THRD_3_2 -101 0x6400 //RX_FDDRC_THRD_3_3 -102 0x2000 //RX_FDDRC_SLANT_0_0 -103 0x2000 //RX_FDDRC_SLANT_0_1 -104 0x2000 //RX_FDDRC_SLANT_0_2 -105 0x2000 //RX_FDDRC_SLANT_0_3 -106 0x5333 //RX_FDDRC_SLANT_1_0 -107 0x5333 //RX_FDDRC_SLANT_1_1 -108 0x5333 //RX_FDDRC_SLANT_1_2 -109 0x5333 //RX_FDDRC_SLANT_1_3 -110 0x0000 //RX_FDDRC_RESRV_0 -129 0x0024 //RX_SPK_VOL -130 0x0000 //RX_VOL_RESRV_0 +163 0x1000 //RX_TDDRC_ALPHA_UP_1 +164 0x1000 //RX_TDDRC_ALPHA_UP_2 +165 0x1000 //RX_TDDRC_ALPHA_UP_3 +166 0x1000 //RX_TDDRC_ALPHA_UP_4 +184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +190 0x7000 //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +269 0x0000 //RX_TDDRC_THRD_0 +270 0x0000 //RX_TDDRC_THRD_1 +271 0x1800 //RX_TDDRC_THRD_2 +272 0x1800 //RX_TDDRC_THRD_3 +273 0x3000 //RX_TDDRC_SLANT_0 +274 0x6E00 //RX_TDDRC_SLANT_1 +275 0x1000 //RX_TDDRC_ALPHA_UP_0 +276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x199A //RX_TDDRC_HMNC_GAIN +279 0x0001 //RX_TDDRC_SMT_FLAG +280 0x0CCD //RX_TDDRC_SMT_W +281 0x02FD //RX_TDDRC_DRC_GAIN +195 0x0020 //RX_FDEQ_SUBNUM +196 0x4E4E //RX_FDEQ_GAIN_0 +197 0x4E56 //RX_FDEQ_GAIN_1 +198 0x6878 //RX_FDEQ_GAIN_2 +199 0x8088 //RX_FDEQ_GAIN_3 +200 0x848B //RX_FDEQ_GAIN_4 +201 0x8F8E //RX_FDEQ_GAIN_5 +202 0x9494 //RX_FDEQ_GAIN_6 +203 0x96A0 //RX_FDEQ_GAIN_7 +204 0xB8A0 //RX_FDEQ_GAIN_8 +205 0xA99D //RX_FDEQ_GAIN_9 +206 0x9D6A //RX_FDEQ_GAIN_10 +207 0x626B //RX_FDEQ_GAIN_11 +208 0x6C78 //RX_FDEQ_GAIN_12 +209 0x7884 //RX_FDEQ_GAIN_13 +210 0x9098 //RX_FDEQ_GAIN_14 +211 0x9CAC //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0202 //RX_FDEQ_BIN_0 +221 0x0202 //RX_FDEQ_BIN_1 +222 0x0302 //RX_FDEQ_BIN_2 +223 0x0304 //RX_FDEQ_BIN_3 +224 0x0405 //RX_FDEQ_BIN_4 +225 0x0506 //RX_FDEQ_BIN_5 +226 0x0708 //RX_FDEQ_BIN_6 +227 0x090A //RX_FDEQ_BIN_7 +228 0x0B0C //RX_FDEQ_BIN_8 +229 0x0D0E //RX_FDEQ_BIN_9 +230 0x1013 //RX_FDEQ_BIN_10 +231 0x1719 //RX_FDEQ_BIN_11 +232 0x1B1E //RX_FDEQ_BIN_12 +233 0x1E1E //RX_FDEQ_BIN_13 +234 0x1E28 //RX_FDEQ_BIN_14 +235 0x282C //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x4000 //RX_FDEQ_RESRV_0 +245 0x0320 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0030 //RX_FDDRC_BAND_MARGIN_1 +248 0x0050 //RX_FDDRC_BAND_MARGIN_2 +249 0x0080 //RX_FDDRC_BAND_MARGIN_3 +250 0x0007 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x5000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x6400 //RX_FDDRC_THRD_3_2 +258 0x6400 //RX_FDDRC_THRD_3_3 +259 0x2000 //RX_FDDRC_SLANT_0_0 +260 0x2000 //RX_FDDRC_SLANT_0_1 +261 0x2000 //RX_FDDRC_SLANT_0_2 +262 0x2000 //RX_FDDRC_SLANT_0_3 +263 0x5333 //RX_FDDRC_SLANT_1_0 +264 0x5333 //RX_FDDRC_SLANT_1_1 +265 0x5333 //RX_FDDRC_SLANT_1_2 +266 0x5333 //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +286 0x0024 //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 #VOL 3 -6 0x1000 //RX_TDDRC_ALPHA_UP_1 -7 0x1000 //RX_TDDRC_ALPHA_UP_2 -8 0x1000 //RX_TDDRC_ALPHA_UP_3 -9 0x1000 //RX_TDDRC_ALPHA_UP_4 -27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 -28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 -29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 -32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 -33 0x7000 //RX_TDDRC_LIMITER_THRD -34 0x0800 //RX_TDDRC_LIMITER_GAIN -112 0x0001 //RX_TDDRC_THRD_0 -113 0x0002 //RX_TDDRC_THRD_1 -114 0x1800 //RX_TDDRC_THRD_2 -115 0x1800 //RX_TDDRC_THRD_3 -116 0x3000 //RX_TDDRC_SLANT_0 -117 0x6E00 //RX_TDDRC_SLANT_1 -118 0x1000 //RX_TDDRC_ALPHA_UP_0 -119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 -120 0x0000 //RX_TDDRC_HMNC_FLAG -121 0x199A //RX_TDDRC_HMNC_GAIN -122 0x0001 //RX_TDDRC_SMT_FLAG -123 0x0CCD //RX_TDDRC_SMT_W -124 0x0478 //RX_TDDRC_DRC_GAIN -38 0x0020 //RX_FDEQ_SUBNUM -39 0x4840 //RX_FDEQ_GAIN_0 -40 0x4040 //RX_FDEQ_GAIN_1 -41 0x4559 //RX_FDEQ_GAIN_2 -42 0x6473 //RX_FDEQ_GAIN_3 -43 0x8690 //RX_FDEQ_GAIN_4 -44 0x8887 //RX_FDEQ_GAIN_5 -45 0x8787 //RX_FDEQ_GAIN_6 -46 0x8E91 //RX_FDEQ_GAIN_7 -47 0x9099 //RX_FDEQ_GAIN_8 -48 0x96A2 //RX_FDEQ_GAIN_9 -49 0xAB9C //RX_FDEQ_GAIN_10 -50 0x9287 //RX_FDEQ_GAIN_11 -51 0x716E //RX_FDEQ_GAIN_12 -52 0x5C54 //RX_FDEQ_GAIN_13 -53 0x5859 //RX_FDEQ_GAIN_14 -54 0x5861 //RX_FDEQ_GAIN_15 -55 0x4848 //RX_FDEQ_GAIN_16 -56 0x4848 //RX_FDEQ_GAIN_17 -57 0x4848 //RX_FDEQ_GAIN_18 -58 0x4848 //RX_FDEQ_GAIN_19 -59 0x4848 //RX_FDEQ_GAIN_20 -60 0x4848 //RX_FDEQ_GAIN_21 -61 0x4848 //RX_FDEQ_GAIN_22 -62 0x4848 //RX_FDEQ_GAIN_23 -63 0x0202 //RX_FDEQ_BIN_0 -64 0x0202 //RX_FDEQ_BIN_1 -65 0x0302 //RX_FDEQ_BIN_2 -66 0x0304 //RX_FDEQ_BIN_3 -67 0x0405 //RX_FDEQ_BIN_4 -68 0x0506 //RX_FDEQ_BIN_5 -69 0x0708 //RX_FDEQ_BIN_6 -70 0x090A //RX_FDEQ_BIN_7 -71 0x0B0C //RX_FDEQ_BIN_8 -72 0x0D0E //RX_FDEQ_BIN_9 -73 0x1013 //RX_FDEQ_BIN_10 -74 0x1719 //RX_FDEQ_BIN_11 -75 0x1B1E //RX_FDEQ_BIN_12 -76 0x1E1E //RX_FDEQ_BIN_13 -77 0x1E28 //RX_FDEQ_BIN_14 -78 0x282C //RX_FDEQ_BIN_15 -79 0x0000 //RX_FDEQ_BIN_16 -80 0x0000 //RX_FDEQ_BIN_17 -81 0x0000 //RX_FDEQ_BIN_18 -82 0x0000 //RX_FDEQ_BIN_19 -83 0x0000 //RX_FDEQ_BIN_20 -84 0x0000 //RX_FDEQ_BIN_21 -85 0x0000 //RX_FDEQ_BIN_22 -86 0x0000 //RX_FDEQ_BIN_23 -87 0x4000 //RX_FDEQ_RESRV_0 -88 0x0320 //RX_FDEQ_RESRV_1 -89 0x0018 //RX_FDDRC_BAND_MARGIN_0 -90 0x0030 //RX_FDDRC_BAND_MARGIN_1 -91 0x0050 //RX_FDDRC_BAND_MARGIN_2 -92 0x0080 //RX_FDDRC_BAND_MARGIN_3 -93 0x0007 //RX_FDDRC_BLOCK_EXP -94 0x5000 //RX_FDDRC_THRD_2_0 -95 0x5000 //RX_FDDRC_THRD_2_1 -96 0x5000 //RX_FDDRC_THRD_2_2 -97 0x5000 //RX_FDDRC_THRD_2_3 -98 0x6400 //RX_FDDRC_THRD_3_0 -99 0x6400 //RX_FDDRC_THRD_3_1 -100 0x6400 //RX_FDDRC_THRD_3_2 -101 0x6400 //RX_FDDRC_THRD_3_3 -102 0x2000 //RX_FDDRC_SLANT_0_0 -103 0x2000 //RX_FDDRC_SLANT_0_1 -104 0x2000 //RX_FDDRC_SLANT_0_2 -105 0x2000 //RX_FDDRC_SLANT_0_3 -106 0x5333 //RX_FDDRC_SLANT_1_0 -107 0x5333 //RX_FDDRC_SLANT_1_1 -108 0x5333 //RX_FDDRC_SLANT_1_2 -109 0x5333 //RX_FDDRC_SLANT_1_3 -110 0x0000 //RX_FDDRC_RESRV_0 -129 0x0039 //RX_SPK_VOL -130 0x0000 //RX_VOL_RESRV_0 +163 0x1000 //RX_TDDRC_ALPHA_UP_1 +164 0x1000 //RX_TDDRC_ALPHA_UP_2 +165 0x1000 //RX_TDDRC_ALPHA_UP_3 +166 0x1000 //RX_TDDRC_ALPHA_UP_4 +184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +190 0x7000 //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +269 0x0000 //RX_TDDRC_THRD_0 +270 0x0000 //RX_TDDRC_THRD_1 +271 0x1800 //RX_TDDRC_THRD_2 +272 0x1800 //RX_TDDRC_THRD_3 +273 0x3000 //RX_TDDRC_SLANT_0 +274 0x6E00 //RX_TDDRC_SLANT_1 +275 0x1000 //RX_TDDRC_ALPHA_UP_0 +276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x199A //RX_TDDRC_HMNC_GAIN +279 0x0001 //RX_TDDRC_SMT_FLAG +280 0x0CCD //RX_TDDRC_SMT_W +281 0x02FD //RX_TDDRC_DRC_GAIN +195 0x0020 //RX_FDEQ_SUBNUM +196 0x4E4E //RX_FDEQ_GAIN_0 +197 0x4E56 //RX_FDEQ_GAIN_1 +198 0x6878 //RX_FDEQ_GAIN_2 +199 0x8088 //RX_FDEQ_GAIN_3 +200 0x848B //RX_FDEQ_GAIN_4 +201 0x8F8E //RX_FDEQ_GAIN_5 +202 0x9494 //RX_FDEQ_GAIN_6 +203 0x96A0 //RX_FDEQ_GAIN_7 +204 0xB8A0 //RX_FDEQ_GAIN_8 +205 0xA99D //RX_FDEQ_GAIN_9 +206 0x9D6A //RX_FDEQ_GAIN_10 +207 0x626B //RX_FDEQ_GAIN_11 +208 0x6C78 //RX_FDEQ_GAIN_12 +209 0x7884 //RX_FDEQ_GAIN_13 +210 0x9098 //RX_FDEQ_GAIN_14 +211 0x9CAC //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0202 //RX_FDEQ_BIN_0 +221 0x0202 //RX_FDEQ_BIN_1 +222 0x0302 //RX_FDEQ_BIN_2 +223 0x0304 //RX_FDEQ_BIN_3 +224 0x0405 //RX_FDEQ_BIN_4 +225 0x0506 //RX_FDEQ_BIN_5 +226 0x0708 //RX_FDEQ_BIN_6 +227 0x090A //RX_FDEQ_BIN_7 +228 0x0B0C //RX_FDEQ_BIN_8 +229 0x0D0E //RX_FDEQ_BIN_9 +230 0x1013 //RX_FDEQ_BIN_10 +231 0x1719 //RX_FDEQ_BIN_11 +232 0x1B1E //RX_FDEQ_BIN_12 +233 0x1E1E //RX_FDEQ_BIN_13 +234 0x1E28 //RX_FDEQ_BIN_14 +235 0x282C //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x4000 //RX_FDEQ_RESRV_0 +245 0x0320 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0030 //RX_FDDRC_BAND_MARGIN_1 +248 0x0050 //RX_FDDRC_BAND_MARGIN_2 +249 0x0080 //RX_FDDRC_BAND_MARGIN_3 +250 0x0007 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x5000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x6400 //RX_FDDRC_THRD_3_2 +258 0x6400 //RX_FDDRC_THRD_3_3 +259 0x2000 //RX_FDDRC_SLANT_0_0 +260 0x2000 //RX_FDDRC_SLANT_0_1 +261 0x2000 //RX_FDDRC_SLANT_0_2 +262 0x2000 //RX_FDDRC_SLANT_0_3 +263 0x5333 //RX_FDDRC_SLANT_1_0 +264 0x5333 //RX_FDDRC_SLANT_1_1 +265 0x5333 //RX_FDDRC_SLANT_1_2 +266 0x5333 //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +286 0x003A //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 #VOL 4 -6 0x1000 //RX_TDDRC_ALPHA_UP_1 -7 0x1000 //RX_TDDRC_ALPHA_UP_2 -8 0x1000 //RX_TDDRC_ALPHA_UP_3 -9 0x1000 //RX_TDDRC_ALPHA_UP_4 -27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 -28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 -29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 -32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 -33 0x7000 //RX_TDDRC_LIMITER_THRD -34 0x0800 //RX_TDDRC_LIMITER_GAIN -112 0x0001 //RX_TDDRC_THRD_0 -113 0x0002 //RX_TDDRC_THRD_1 -114 0x1800 //RX_TDDRC_THRD_2 -115 0x1800 //RX_TDDRC_THRD_3 -116 0x3000 //RX_TDDRC_SLANT_0 -117 0x6E00 //RX_TDDRC_SLANT_1 -118 0x1000 //RX_TDDRC_ALPHA_UP_0 -119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 -120 0x0000 //RX_TDDRC_HMNC_FLAG -121 0x199A //RX_TDDRC_HMNC_GAIN -122 0x0001 //RX_TDDRC_SMT_FLAG -123 0x0CCD //RX_TDDRC_SMT_W -124 0x0478 //RX_TDDRC_DRC_GAIN -38 0x0020 //RX_FDEQ_SUBNUM -39 0x4840 //RX_FDEQ_GAIN_0 -40 0x4040 //RX_FDEQ_GAIN_1 -41 0x4559 //RX_FDEQ_GAIN_2 -42 0x6473 //RX_FDEQ_GAIN_3 -43 0x8690 //RX_FDEQ_GAIN_4 -44 0x8887 //RX_FDEQ_GAIN_5 -45 0x8787 //RX_FDEQ_GAIN_6 -46 0x8E91 //RX_FDEQ_GAIN_7 -47 0x9099 //RX_FDEQ_GAIN_8 -48 0x96A2 //RX_FDEQ_GAIN_9 -49 0xAB9C //RX_FDEQ_GAIN_10 -50 0x9287 //RX_FDEQ_GAIN_11 -51 0x716E //RX_FDEQ_GAIN_12 -52 0x5C54 //RX_FDEQ_GAIN_13 -53 0x5859 //RX_FDEQ_GAIN_14 -54 0x5861 //RX_FDEQ_GAIN_15 -55 0x4848 //RX_FDEQ_GAIN_16 -56 0x4848 //RX_FDEQ_GAIN_17 -57 0x4848 //RX_FDEQ_GAIN_18 -58 0x4848 //RX_FDEQ_GAIN_19 -59 0x4848 //RX_FDEQ_GAIN_20 -60 0x4848 //RX_FDEQ_GAIN_21 -61 0x4848 //RX_FDEQ_GAIN_22 -62 0x4848 //RX_FDEQ_GAIN_23 -63 0x0202 //RX_FDEQ_BIN_0 -64 0x0202 //RX_FDEQ_BIN_1 -65 0x0302 //RX_FDEQ_BIN_2 -66 0x0304 //RX_FDEQ_BIN_3 -67 0x0405 //RX_FDEQ_BIN_4 -68 0x0506 //RX_FDEQ_BIN_5 -69 0x0708 //RX_FDEQ_BIN_6 -70 0x090A //RX_FDEQ_BIN_7 -71 0x0B0C //RX_FDEQ_BIN_8 -72 0x0D0E //RX_FDEQ_BIN_9 -73 0x1013 //RX_FDEQ_BIN_10 -74 0x1719 //RX_FDEQ_BIN_11 -75 0x1B1E //RX_FDEQ_BIN_12 -76 0x1E1E //RX_FDEQ_BIN_13 -77 0x1E28 //RX_FDEQ_BIN_14 -78 0x282C //RX_FDEQ_BIN_15 -79 0x0000 //RX_FDEQ_BIN_16 -80 0x0000 //RX_FDEQ_BIN_17 -81 0x0000 //RX_FDEQ_BIN_18 -82 0x0000 //RX_FDEQ_BIN_19 -83 0x0000 //RX_FDEQ_BIN_20 -84 0x0000 //RX_FDEQ_BIN_21 -85 0x0000 //RX_FDEQ_BIN_22 -86 0x0000 //RX_FDEQ_BIN_23 -87 0x4000 //RX_FDEQ_RESRV_0 -88 0x0320 //RX_FDEQ_RESRV_1 -89 0x0018 //RX_FDDRC_BAND_MARGIN_0 -90 0x0030 //RX_FDDRC_BAND_MARGIN_1 -91 0x0050 //RX_FDDRC_BAND_MARGIN_2 -92 0x0080 //RX_FDDRC_BAND_MARGIN_3 -93 0x0007 //RX_FDDRC_BLOCK_EXP -94 0x5000 //RX_FDDRC_THRD_2_0 -95 0x5000 //RX_FDDRC_THRD_2_1 -96 0x5000 //RX_FDDRC_THRD_2_2 -97 0x5000 //RX_FDDRC_THRD_2_3 -98 0x6400 //RX_FDDRC_THRD_3_0 -99 0x6400 //RX_FDDRC_THRD_3_1 -100 0x6400 //RX_FDDRC_THRD_3_2 -101 0x6400 //RX_FDDRC_THRD_3_3 -102 0x2000 //RX_FDDRC_SLANT_0_0 -103 0x2000 //RX_FDDRC_SLANT_0_1 -104 0x2000 //RX_FDDRC_SLANT_0_2 -105 0x2000 //RX_FDDRC_SLANT_0_3 -106 0x5333 //RX_FDDRC_SLANT_1_0 -107 0x5333 //RX_FDDRC_SLANT_1_1 -108 0x5333 //RX_FDDRC_SLANT_1_2 -109 0x5333 //RX_FDDRC_SLANT_1_3 -110 0x0000 //RX_FDDRC_RESRV_0 -129 0x005C //RX_SPK_VOL -130 0x0000 //RX_VOL_RESRV_0 +163 0x1000 //RX_TDDRC_ALPHA_UP_1 +164 0x1000 //RX_TDDRC_ALPHA_UP_2 +165 0x1000 //RX_TDDRC_ALPHA_UP_3 +166 0x1000 //RX_TDDRC_ALPHA_UP_4 +184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +190 0x7000 //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +269 0x0000 //RX_TDDRC_THRD_0 +270 0x0000 //RX_TDDRC_THRD_1 +271 0x1800 //RX_TDDRC_THRD_2 +272 0x1800 //RX_TDDRC_THRD_3 +273 0x3000 //RX_TDDRC_SLANT_0 +274 0x6E00 //RX_TDDRC_SLANT_1 +275 0x1000 //RX_TDDRC_ALPHA_UP_0 +276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x199A //RX_TDDRC_HMNC_GAIN +279 0x0001 //RX_TDDRC_SMT_FLAG +280 0x0CCD //RX_TDDRC_SMT_W +281 0x02FD //RX_TDDRC_DRC_GAIN +195 0x0020 //RX_FDEQ_SUBNUM +196 0x4E4E //RX_FDEQ_GAIN_0 +197 0x4E56 //RX_FDEQ_GAIN_1 +198 0x6878 //RX_FDEQ_GAIN_2 +199 0x8088 //RX_FDEQ_GAIN_3 +200 0x848B //RX_FDEQ_GAIN_4 +201 0x8F8E //RX_FDEQ_GAIN_5 +202 0x9494 //RX_FDEQ_GAIN_6 +203 0x96A0 //RX_FDEQ_GAIN_7 +204 0xB8A0 //RX_FDEQ_GAIN_8 +205 0xA99D //RX_FDEQ_GAIN_9 +206 0x9D6A //RX_FDEQ_GAIN_10 +207 0x626B //RX_FDEQ_GAIN_11 +208 0x6C78 //RX_FDEQ_GAIN_12 +209 0x7884 //RX_FDEQ_GAIN_13 +210 0x9098 //RX_FDEQ_GAIN_14 +211 0x9CAC //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0202 //RX_FDEQ_BIN_0 +221 0x0202 //RX_FDEQ_BIN_1 +222 0x0302 //RX_FDEQ_BIN_2 +223 0x0304 //RX_FDEQ_BIN_3 +224 0x0405 //RX_FDEQ_BIN_4 +225 0x0506 //RX_FDEQ_BIN_5 +226 0x0708 //RX_FDEQ_BIN_6 +227 0x090A //RX_FDEQ_BIN_7 +228 0x0B0C //RX_FDEQ_BIN_8 +229 0x0D0E //RX_FDEQ_BIN_9 +230 0x1013 //RX_FDEQ_BIN_10 +231 0x1719 //RX_FDEQ_BIN_11 +232 0x1B1E //RX_FDEQ_BIN_12 +233 0x1E1E //RX_FDEQ_BIN_13 +234 0x1E28 //RX_FDEQ_BIN_14 +235 0x282C //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x4000 //RX_FDEQ_RESRV_0 +245 0x0320 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0030 //RX_FDDRC_BAND_MARGIN_1 +248 0x0050 //RX_FDDRC_BAND_MARGIN_2 +249 0x0080 //RX_FDDRC_BAND_MARGIN_3 +250 0x0007 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x5000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x6400 //RX_FDDRC_THRD_3_2 +258 0x6400 //RX_FDDRC_THRD_3_3 +259 0x2000 //RX_FDDRC_SLANT_0_0 +260 0x2000 //RX_FDDRC_SLANT_0_1 +261 0x2000 //RX_FDDRC_SLANT_0_2 +262 0x2000 //RX_FDDRC_SLANT_0_3 +263 0x5333 //RX_FDDRC_SLANT_1_0 +264 0x5333 //RX_FDDRC_SLANT_1_1 +265 0x5333 //RX_FDDRC_SLANT_1_2 +266 0x5333 //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +286 0x0059 //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 #VOL 5 -6 0x1000 //RX_TDDRC_ALPHA_UP_1 -7 0x1000 //RX_TDDRC_ALPHA_UP_2 -8 0x1000 //RX_TDDRC_ALPHA_UP_3 -9 0x1000 //RX_TDDRC_ALPHA_UP_4 -27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 -28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 -29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 -32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 -33 0x7000 //RX_TDDRC_LIMITER_THRD -34 0x0800 //RX_TDDRC_LIMITER_GAIN -112 0x0001 //RX_TDDRC_THRD_0 -113 0x0002 //RX_TDDRC_THRD_1 -114 0x1800 //RX_TDDRC_THRD_2 -115 0x1800 //RX_TDDRC_THRD_3 -116 0x3000 //RX_TDDRC_SLANT_0 -117 0x6E00 //RX_TDDRC_SLANT_1 -118 0x1000 //RX_TDDRC_ALPHA_UP_0 -119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 -120 0x0000 //RX_TDDRC_HMNC_FLAG -121 0x199A //RX_TDDRC_HMNC_GAIN -122 0x0001 //RX_TDDRC_SMT_FLAG -123 0x0CCD //RX_TDDRC_SMT_W -124 0x0478 //RX_TDDRC_DRC_GAIN -38 0x0020 //RX_FDEQ_SUBNUM -39 0x4840 //RX_FDEQ_GAIN_0 -40 0x4040 //RX_FDEQ_GAIN_1 -41 0x4559 //RX_FDEQ_GAIN_2 -42 0x6473 //RX_FDEQ_GAIN_3 -43 0x8690 //RX_FDEQ_GAIN_4 -44 0x8887 //RX_FDEQ_GAIN_5 -45 0x8787 //RX_FDEQ_GAIN_6 -46 0x8E91 //RX_FDEQ_GAIN_7 -47 0x9099 //RX_FDEQ_GAIN_8 -48 0x96A2 //RX_FDEQ_GAIN_9 -49 0xAB9C //RX_FDEQ_GAIN_10 -50 0x9287 //RX_FDEQ_GAIN_11 -51 0x716E //RX_FDEQ_GAIN_12 -52 0x5C54 //RX_FDEQ_GAIN_13 -53 0x5859 //RX_FDEQ_GAIN_14 -54 0x5861 //RX_FDEQ_GAIN_15 -55 0x4848 //RX_FDEQ_GAIN_16 -56 0x4848 //RX_FDEQ_GAIN_17 -57 0x4848 //RX_FDEQ_GAIN_18 -58 0x4848 //RX_FDEQ_GAIN_19 -59 0x4848 //RX_FDEQ_GAIN_20 -60 0x4848 //RX_FDEQ_GAIN_21 -61 0x4848 //RX_FDEQ_GAIN_22 -62 0x4848 //RX_FDEQ_GAIN_23 -63 0x0202 //RX_FDEQ_BIN_0 -64 0x0202 //RX_FDEQ_BIN_1 -65 0x0302 //RX_FDEQ_BIN_2 -66 0x0304 //RX_FDEQ_BIN_3 -67 0x0405 //RX_FDEQ_BIN_4 -68 0x0506 //RX_FDEQ_BIN_5 -69 0x0708 //RX_FDEQ_BIN_6 -70 0x090A //RX_FDEQ_BIN_7 -71 0x0B0C //RX_FDEQ_BIN_8 -72 0x0D0E //RX_FDEQ_BIN_9 -73 0x1013 //RX_FDEQ_BIN_10 -74 0x1719 //RX_FDEQ_BIN_11 -75 0x1B1E //RX_FDEQ_BIN_12 -76 0x1E1E //RX_FDEQ_BIN_13 -77 0x1E28 //RX_FDEQ_BIN_14 -78 0x282C //RX_FDEQ_BIN_15 -79 0x0000 //RX_FDEQ_BIN_16 -80 0x0000 //RX_FDEQ_BIN_17 -81 0x0000 //RX_FDEQ_BIN_18 -82 0x0000 //RX_FDEQ_BIN_19 -83 0x0000 //RX_FDEQ_BIN_20 -84 0x0000 //RX_FDEQ_BIN_21 -85 0x0000 //RX_FDEQ_BIN_22 -86 0x0000 //RX_FDEQ_BIN_23 -87 0x4000 //RX_FDEQ_RESRV_0 -88 0x0320 //RX_FDEQ_RESRV_1 -89 0x0018 //RX_FDDRC_BAND_MARGIN_0 -90 0x0030 //RX_FDDRC_BAND_MARGIN_1 -91 0x0050 //RX_FDDRC_BAND_MARGIN_2 -92 0x0080 //RX_FDDRC_BAND_MARGIN_3 -93 0x0007 //RX_FDDRC_BLOCK_EXP -94 0x5000 //RX_FDDRC_THRD_2_0 -95 0x5000 //RX_FDDRC_THRD_2_1 -96 0x5000 //RX_FDDRC_THRD_2_2 -97 0x5000 //RX_FDDRC_THRD_2_3 -98 0x6400 //RX_FDDRC_THRD_3_0 -99 0x6400 //RX_FDDRC_THRD_3_1 -100 0x6400 //RX_FDDRC_THRD_3_2 -101 0x6400 //RX_FDDRC_THRD_3_3 -102 0x2000 //RX_FDDRC_SLANT_0_0 -103 0x2000 //RX_FDDRC_SLANT_0_1 -104 0x2000 //RX_FDDRC_SLANT_0_2 -105 0x2000 //RX_FDDRC_SLANT_0_3 -106 0x5333 //RX_FDDRC_SLANT_1_0 -107 0x5333 //RX_FDDRC_SLANT_1_1 -108 0x5333 //RX_FDDRC_SLANT_1_2 -109 0x5333 //RX_FDDRC_SLANT_1_3 -110 0x0000 //RX_FDDRC_RESRV_0 -129 0x0096 //RX_SPK_VOL -130 0x0000 //RX_VOL_RESRV_0 +163 0x1000 //RX_TDDRC_ALPHA_UP_1 +164 0x1000 //RX_TDDRC_ALPHA_UP_2 +165 0x1000 //RX_TDDRC_ALPHA_UP_3 +166 0x1000 //RX_TDDRC_ALPHA_UP_4 +184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +190 0x7000 //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +269 0x0000 //RX_TDDRC_THRD_0 +270 0x0000 //RX_TDDRC_THRD_1 +271 0x1800 //RX_TDDRC_THRD_2 +272 0x1800 //RX_TDDRC_THRD_3 +273 0x3000 //RX_TDDRC_SLANT_0 +274 0x6E00 //RX_TDDRC_SLANT_1 +275 0x1000 //RX_TDDRC_ALPHA_UP_0 +276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x199A //RX_TDDRC_HMNC_GAIN +279 0x0001 //RX_TDDRC_SMT_FLAG +280 0x0CCD //RX_TDDRC_SMT_W +281 0x02FD //RX_TDDRC_DRC_GAIN +195 0x0020 //RX_FDEQ_SUBNUM +196 0x4E4E //RX_FDEQ_GAIN_0 +197 0x4E56 //RX_FDEQ_GAIN_1 +198 0x6878 //RX_FDEQ_GAIN_2 +199 0x8088 //RX_FDEQ_GAIN_3 +200 0x848B //RX_FDEQ_GAIN_4 +201 0x8F8E //RX_FDEQ_GAIN_5 +202 0x9494 //RX_FDEQ_GAIN_6 +203 0x96A0 //RX_FDEQ_GAIN_7 +204 0xB8A0 //RX_FDEQ_GAIN_8 +205 0xA99D //RX_FDEQ_GAIN_9 +206 0x9D6A //RX_FDEQ_GAIN_10 +207 0x626B //RX_FDEQ_GAIN_11 +208 0x6C78 //RX_FDEQ_GAIN_12 +209 0x7884 //RX_FDEQ_GAIN_13 +210 0x9098 //RX_FDEQ_GAIN_14 +211 0x9CAC //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0202 //RX_FDEQ_BIN_0 +221 0x0202 //RX_FDEQ_BIN_1 +222 0x0302 //RX_FDEQ_BIN_2 +223 0x0304 //RX_FDEQ_BIN_3 +224 0x0405 //RX_FDEQ_BIN_4 +225 0x0506 //RX_FDEQ_BIN_5 +226 0x0708 //RX_FDEQ_BIN_6 +227 0x090A //RX_FDEQ_BIN_7 +228 0x0B0C //RX_FDEQ_BIN_8 +229 0x0D0E //RX_FDEQ_BIN_9 +230 0x1013 //RX_FDEQ_BIN_10 +231 0x1719 //RX_FDEQ_BIN_11 +232 0x1B1E //RX_FDEQ_BIN_12 +233 0x1E1E //RX_FDEQ_BIN_13 +234 0x1E28 //RX_FDEQ_BIN_14 +235 0x282C //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x4000 //RX_FDEQ_RESRV_0 +245 0x0320 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0030 //RX_FDDRC_BAND_MARGIN_1 +248 0x0050 //RX_FDDRC_BAND_MARGIN_2 +249 0x0080 //RX_FDDRC_BAND_MARGIN_3 +250 0x0007 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x5000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x6400 //RX_FDDRC_THRD_3_2 +258 0x6400 //RX_FDDRC_THRD_3_3 +259 0x2000 //RX_FDDRC_SLANT_0_0 +260 0x2000 //RX_FDDRC_SLANT_0_1 +261 0x2000 //RX_FDDRC_SLANT_0_2 +262 0x2000 //RX_FDDRC_SLANT_0_3 +263 0x5333 //RX_FDDRC_SLANT_1_0 +264 0x5333 //RX_FDDRC_SLANT_1_1 +265 0x5333 //RX_FDDRC_SLANT_1_2 +266 0x5333 //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +286 0x0090 //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 #VOL 6 -6 0x1000 //RX_TDDRC_ALPHA_UP_1 -7 0x1000 //RX_TDDRC_ALPHA_UP_2 -8 0x1000 //RX_TDDRC_ALPHA_UP_3 -9 0x1000 //RX_TDDRC_ALPHA_UP_4 -27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 -28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 -29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 -32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 -33 0x7000 //RX_TDDRC_LIMITER_THRD -34 0x0800 //RX_TDDRC_LIMITER_GAIN -112 0x0001 //RX_TDDRC_THRD_0 -113 0x0002 //RX_TDDRC_THRD_1 -114 0x1800 //RX_TDDRC_THRD_2 -115 0x1800 //RX_TDDRC_THRD_3 -116 0x3000 //RX_TDDRC_SLANT_0 -117 0x6E00 //RX_TDDRC_SLANT_1 -118 0x1000 //RX_TDDRC_ALPHA_UP_0 -119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 -120 0x0000 //RX_TDDRC_HMNC_FLAG -121 0x199A //RX_TDDRC_HMNC_GAIN -122 0x0001 //RX_TDDRC_SMT_FLAG -123 0x0CCD //RX_TDDRC_SMT_W -124 0x0478 //RX_TDDRC_DRC_GAIN -38 0x0020 //RX_FDEQ_SUBNUM -39 0x4840 //RX_FDEQ_GAIN_0 -40 0x4040 //RX_FDEQ_GAIN_1 -41 0x4559 //RX_FDEQ_GAIN_2 -42 0x6473 //RX_FDEQ_GAIN_3 -43 0x8690 //RX_FDEQ_GAIN_4 -44 0x8887 //RX_FDEQ_GAIN_5 -45 0x8787 //RX_FDEQ_GAIN_6 -46 0x8E91 //RX_FDEQ_GAIN_7 -47 0x9099 //RX_FDEQ_GAIN_8 -48 0x96A2 //RX_FDEQ_GAIN_9 -49 0xAB9C //RX_FDEQ_GAIN_10 -50 0x9287 //RX_FDEQ_GAIN_11 -51 0x716E //RX_FDEQ_GAIN_12 -52 0x5C54 //RX_FDEQ_GAIN_13 -53 0x5859 //RX_FDEQ_GAIN_14 -54 0x5861 //RX_FDEQ_GAIN_15 -55 0x4848 //RX_FDEQ_GAIN_16 -56 0x4848 //RX_FDEQ_GAIN_17 -57 0x4848 //RX_FDEQ_GAIN_18 -58 0x4848 //RX_FDEQ_GAIN_19 -59 0x4848 //RX_FDEQ_GAIN_20 -60 0x4848 //RX_FDEQ_GAIN_21 -61 0x4848 //RX_FDEQ_GAIN_22 -62 0x4848 //RX_FDEQ_GAIN_23 -63 0x0202 //RX_FDEQ_BIN_0 -64 0x0202 //RX_FDEQ_BIN_1 -65 0x0302 //RX_FDEQ_BIN_2 -66 0x0304 //RX_FDEQ_BIN_3 -67 0x0405 //RX_FDEQ_BIN_4 -68 0x0506 //RX_FDEQ_BIN_5 -69 0x0708 //RX_FDEQ_BIN_6 -70 0x090A //RX_FDEQ_BIN_7 -71 0x0B0C //RX_FDEQ_BIN_8 -72 0x0D0E //RX_FDEQ_BIN_9 -73 0x1013 //RX_FDEQ_BIN_10 -74 0x1719 //RX_FDEQ_BIN_11 -75 0x1B1E //RX_FDEQ_BIN_12 -76 0x1E1E //RX_FDEQ_BIN_13 -77 0x1E28 //RX_FDEQ_BIN_14 -78 0x282C //RX_FDEQ_BIN_15 -79 0x0000 //RX_FDEQ_BIN_16 -80 0x0000 //RX_FDEQ_BIN_17 -81 0x0000 //RX_FDEQ_BIN_18 -82 0x0000 //RX_FDEQ_BIN_19 -83 0x0000 //RX_FDEQ_BIN_20 -84 0x0000 //RX_FDEQ_BIN_21 -85 0x0000 //RX_FDEQ_BIN_22 -86 0x0000 //RX_FDEQ_BIN_23 -87 0x4000 //RX_FDEQ_RESRV_0 -88 0x0320 //RX_FDEQ_RESRV_1 -89 0x0018 //RX_FDDRC_BAND_MARGIN_0 -90 0x0030 //RX_FDDRC_BAND_MARGIN_1 -91 0x0050 //RX_FDDRC_BAND_MARGIN_2 -92 0x0080 //RX_FDDRC_BAND_MARGIN_3 -93 0x0007 //RX_FDDRC_BLOCK_EXP -94 0x5000 //RX_FDDRC_THRD_2_0 -95 0x5000 //RX_FDDRC_THRD_2_1 -96 0x5000 //RX_FDDRC_THRD_2_2 -97 0x5000 //RX_FDDRC_THRD_2_3 -98 0x6400 //RX_FDDRC_THRD_3_0 -99 0x6400 //RX_FDDRC_THRD_3_1 -100 0x6400 //RX_FDDRC_THRD_3_2 -101 0x6400 //RX_FDDRC_THRD_3_3 -102 0x2000 //RX_FDDRC_SLANT_0_0 -103 0x2000 //RX_FDDRC_SLANT_0_1 -104 0x2000 //RX_FDDRC_SLANT_0_2 -105 0x2000 //RX_FDDRC_SLANT_0_3 -106 0x5333 //RX_FDDRC_SLANT_1_0 -107 0x5333 //RX_FDDRC_SLANT_1_1 -108 0x5333 //RX_FDDRC_SLANT_1_2 -109 0x5333 //RX_FDDRC_SLANT_1_3 -110 0x0000 //RX_FDDRC_RESRV_0 -129 0x0100 //RX_SPK_VOL -130 0x0000 //RX_VOL_RESRV_0 +163 0x1000 //RX_TDDRC_ALPHA_UP_1 +164 0x1000 //RX_TDDRC_ALPHA_UP_2 +165 0x1000 //RX_TDDRC_ALPHA_UP_3 +166 0x1000 //RX_TDDRC_ALPHA_UP_4 +184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +190 0x7000 //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +269 0x0000 //RX_TDDRC_THRD_0 +270 0x0000 //RX_TDDRC_THRD_1 +271 0x1800 //RX_TDDRC_THRD_2 +272 0x1800 //RX_TDDRC_THRD_3 +273 0x3000 //RX_TDDRC_SLANT_0 +274 0x6E00 //RX_TDDRC_SLANT_1 +275 0x1000 //RX_TDDRC_ALPHA_UP_0 +276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x199A //RX_TDDRC_HMNC_GAIN +279 0x0001 //RX_TDDRC_SMT_FLAG +280 0x0CCD //RX_TDDRC_SMT_W +281 0x02FD //RX_TDDRC_DRC_GAIN +195 0x0020 //RX_FDEQ_SUBNUM +196 0x4E4E //RX_FDEQ_GAIN_0 +197 0x4E56 //RX_FDEQ_GAIN_1 +198 0x6878 //RX_FDEQ_GAIN_2 +199 0x8088 //RX_FDEQ_GAIN_3 +200 0x848B //RX_FDEQ_GAIN_4 +201 0x8F8E //RX_FDEQ_GAIN_5 +202 0x9494 //RX_FDEQ_GAIN_6 +203 0x96A0 //RX_FDEQ_GAIN_7 +204 0xB8A0 //RX_FDEQ_GAIN_8 +205 0xA99D //RX_FDEQ_GAIN_9 +206 0x9D6A //RX_FDEQ_GAIN_10 +207 0x626B //RX_FDEQ_GAIN_11 +208 0x6C78 //RX_FDEQ_GAIN_12 +209 0x7884 //RX_FDEQ_GAIN_13 +210 0x9098 //RX_FDEQ_GAIN_14 +211 0x9CAC //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0202 //RX_FDEQ_BIN_0 +221 0x0202 //RX_FDEQ_BIN_1 +222 0x0302 //RX_FDEQ_BIN_2 +223 0x0304 //RX_FDEQ_BIN_3 +224 0x0405 //RX_FDEQ_BIN_4 +225 0x0506 //RX_FDEQ_BIN_5 +226 0x0708 //RX_FDEQ_BIN_6 +227 0x090A //RX_FDEQ_BIN_7 +228 0x0B0C //RX_FDEQ_BIN_8 +229 0x0D0E //RX_FDEQ_BIN_9 +230 0x1013 //RX_FDEQ_BIN_10 +231 0x1719 //RX_FDEQ_BIN_11 +232 0x1B1E //RX_FDEQ_BIN_12 +233 0x1E1E //RX_FDEQ_BIN_13 +234 0x1E28 //RX_FDEQ_BIN_14 +235 0x282C //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x4000 //RX_FDEQ_RESRV_0 +245 0x0320 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0030 //RX_FDDRC_BAND_MARGIN_1 +248 0x0050 //RX_FDDRC_BAND_MARGIN_2 +249 0x0080 //RX_FDDRC_BAND_MARGIN_3 +250 0x0007 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x5000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x6400 //RX_FDDRC_THRD_3_2 +258 0x6400 //RX_FDDRC_THRD_3_3 +259 0x2000 //RX_FDDRC_SLANT_0_0 +260 0x2000 //RX_FDDRC_SLANT_0_1 +261 0x2000 //RX_FDDRC_SLANT_0_2 +262 0x2000 //RX_FDDRC_SLANT_0_3 +263 0x5333 //RX_FDDRC_SLANT_1_0 +264 0x5333 //RX_FDDRC_SLANT_1_1 +265 0x5333 //RX_FDDRC_SLANT_1_2 +266 0x5333 //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +286 0x0100 //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 -#CASE_NAME HANDSET-HANDSET-TMOBILE_US-FB -#PARAM_TYPE TX+RX -#TOTAL_CUSTOM_STEP 7 +#CASE_NAME HANDSET-HANDSET_HAC-VOICE_GENERIC-NB +#PARAM_MODE Full +#PARAM_TYPE TX+2RX +#TOTAL_CUSTOM_STEP 7+7 #TX 0 0x0000 //TX_OPERATION_MODE_0 1 0x0000 //TX_OPERATION_MODE_1 -2 0x0026 //TX_PATCH_REG -3 0x6B7E //TX_SENDFUNC_MODE_0 -4 0x0001 //TX_SENDFUNC_MODE_1 -5 0x0002 //TX_NUM_MIC -6 0x0004 //TX_SAMPLINGFREQ_SIG -7 0x0004 //TX_SAMPLINGFREQ_PROC -8 0x000A //TX_FRAME_SZ_SIG -9 0x000A //TX_FRAME_SZ -10 0x0000 //TX_DELAY_OPT -11 0x0028 //TX_MAX_TAIL_LENGTH -12 0x0001 //TX_NUM_LOUTCHN -13 0x0001 //TX_MAXNUM_AECREF -14 0x0000 //TX_DBG_FUNC_REG -15 0x0000 //TX_DBG_FUNC_REG1 -16 0x0000 //TX_SYS_RESRV_0 -17 0x0000 //TX_SYS_RESRV_1 -18 0x0000 //TX_SYS_RESRV_2 -19 0x0000 //TX_SYS_RESRV_3 -20 0x0000 //TX_DIST2REF0 -21 0x009D //TX_DIST2REF1 -22 0x0000 //TX_DIST2REF_02 -23 0x0000 //TX_DIST2REF_03 -24 0x0000 //TX_DIST2REF_04 -25 0x0000 //TX_DIST2REF_05 -26 0x0000 //TX_MMIC -27 0x1000 //TX_PGA_0 -28 0x1000 //TX_PGA_1 -29 0x1000 //TX_PGA_2 -30 0x0000 //TX_PGA_3 -31 0x0000 //TX_PGA_4 -32 0x0000 //TX_PGA_5 -33 0x0000 //TX_MIC_PAIRS -34 0x0000 //TX_MIC_PAIRS_HS -35 0x0002 //TX_MICS_FOR_BF -36 0x0000 //TX_MIC_PAIRS_FORL1 -37 0x0002 //TX_MICS_OF_PAIR0 -38 0x0002 //TX_MICS_OF_PAIR1 -39 0x0002 //TX_MICS_OF_PAIR2 -40 0x0002 //TX_MICS_OF_PAIR3 -41 0x0000 //TX_MIC_DATA_SRC0 -42 0x0002 //TX_MIC_DATA_SRC1 -43 0x0001 //TX_MIC_DATA_SRC2 -44 0x0000 //TX_MIC_DATA_SRC3 -45 0x0000 //TX_MIC_PAIR_CH_04 -46 0x0000 //TX_MIC_PAIR_CH_05 -47 0x0000 //TX_MIC_PAIR_CH_10 -48 0x0000 //TX_MIC_PAIR_CH_11 -49 0x0000 //TX_MIC_PAIR_CH_12 -50 0x0000 //TX_MIC_PAIR_CH_13 -51 0x0000 //TX_MIC_PAIR_CH_14 -52 0x05DC //TX_HD_BIN_MASK -53 0x0010 //TX_HD_SUBAND_MASK -54 0x19A1 //TX_HD_FRAME_AVG_MASK -55 0x0320 //TX_HD_MIN_FRQ -56 0x1000 //TX_HD_ALPHA_PSD -57 0x1100 //TX_T_PHPR1 -58 0x0000 //TX_T_PHPR2 -59 0x0000 //TX_T_PTPR -60 0x0000 //TX_T_PNPR -61 0x0000 //TX_T_PAPR1 -62 0xEE6C //TX_T_PSDVAT -63 0x0800 //TX_CNT -64 0x4000 //TX_ANTI_HOWL_GAIN -65 0x0001 //TX_MICFORBFMARK_0 -66 0x0001 //TX_MICFORBFMARK_1 -67 0x0001 //TX_MICFORBFMARK_2 -68 0x0001 //TX_MICFORBFMARK_3 -69 0x0001 //TX_MICFORBFMARK_4 -70 0x0001 //TX_MICFORBFMARK_5 -71 0x0000 //TX_DIST2REF_10 -72 0x3A66 //TX_DIST2REF_11 -73 0x0000 //TX_DIST2REF2 -74 0x0000 //TX_DIST2REF_13 -75 0x0000 //TX_DIST2REF_14 -76 0x0000 //TX_DIST2REF_15 -77 0x0000 //TX_DIST2REF_20 -78 0x0000 //TX_DIST2REF_21 -79 0x0000 //TX_DIST2REF_22 -80 0x0000 //TX_DIST2REF_23 -81 0x0000 //TX_DIST2REF_24 -82 0x0000 //TX_DIST2REF_25 -83 0x0000 //TX_DIST2REF_30 -84 0x0000 //TX_DIST2REF_31 -85 0x0000 //TX_DIST2REF_32 -86 0x0000 //TX_DIST2REF_33 -87 0x0000 //TX_DIST2REF_34 -88 0x0000 //TX_DIST2REF_35 -89 0x0000 //TX_MIC_LOC_00 -90 0x0000 //TX_MIC_LOC_01 -91 0x0000 //TX_MIC_LOC_02 -92 0x0000 //TX_MIC_LOC_03 -93 0x0000 //TX_MIC_LOC_04 -94 0x0000 //TX_MIC_LOC_05 -95 0x0000 //TX_MIC_LOC_10 -96 0x0000 //TX_MIC_LOC_11 -97 0x0000 //TX_MIC_LOC_12 -98 0x0000 //TX_MIC_LOC_13 -99 0x0000 //TX_MIC_LOC_14 -100 0x0000 //TX_MIC_LOC_15 -101 0x0000 //TX_MIC_LOC_20 -102 0x0000 //TX_MIC_LOC_21 -103 0x0000 //TX_MIC_LOC_22 -104 0x0000 //TX_MIC_LOC_23 -105 0x0000 //TX_MIC_LOC_24 -106 0x0000 //TX_MIC_LOC_25 -107 0x0200 //TX_MIC_REFBLK_VOLUME -108 0x0AAC //TX_MIC_BLOCK_VOLUME -109 0x0000 //TX_INVERSE_MASK -110 0x0000 //TX_ADCS_MASK -111 0x04D0 //TX_ADCS_GAIN -112 0x4000 //TX_NFC_GAINFAC -113 0x0000 //TX_MAINMIC_BLKFACTOR -114 0x0000 //TX_REFMIC_BLKFACTOR -115 0x0000 //TX_BLMIC_BLKFACTOR -116 0x0000 //TX_BRMIC_BLKFACTOR -117 0x0031 //TX_MICBLK_START_BIN -118 0x0060 //TX_MICBLK_END_BIN -119 0x0015 //TX_MICBLK_FE_HOLD -120 0xFFF2 //TX_MICBLK_MR_EXP_TH -121 0xFFF2 //TX_MICBLK_LR_EXP_TH -122 0x0000 //TX_FENE_HOLD -123 0x4000 //TX_FE_ENER_TH_MTS -124 0x0004 //TX_FE_ENER_TH_EXP -125 0x6000 //TX_C_POST_FLT_MIC_MAINBLK -126 0x6000 //TX_C_POST_FLT_MIC_REFBLK -127 0x0010 //TX_MIC_BLOCK_N -128 0x7E56 //TX_A_HP -129 0x4000 //TX_B_PE -130 0x1800 //TX_THR_PITCH_DET_0 -131 0x1000 //TX_THR_PITCH_DET_1 -132 0x0800 //TX_THR_PITCH_DET_2 -133 0x0008 //TX_PITCH_BFR_LEN -134 0x0003 //TX_SBD_PITCH_DET -135 0x0050 //TX_TD_AEC_L -136 0x4000 //TX_MU0_UNP_TD_AEC -137 0x1000 //TX_MU0_PTD_TD_AEC -138 0x0000 //TX_PP_RESRV_0 -139 0x2A94 //TX_PP_RESRV_1 -140 0x55F0 //TX_PP_RESRV_2 -141 0x0000 //TX_PP_RESRV_3 -142 0x0000 //TX_PP_RESRV_4 -143 0x0000 //TX_PP_RESRV_5 -144 0x0000 //TX_PP_RESRV_6 -145 0x0000 //TX_PP_RESRV_7 -146 0x0028 //TX_TAIL_LENGTH -147 0x0080 //TX_AEC_REF_GAIN_0 -148 0x0800 //TX_AEC_REF_GAIN_1 -149 0x0800 //TX_AEC_REF_GAIN_2 -150 0x7900 //TX_EAD_THR -151 0x2000 //TX_THR_RE_EST -152 0x0400 //TX_MIN_EQ_RE_EST_0 -153 0x0400 //TX_MIN_EQ_RE_EST_1 -154 0x0800 //TX_MIN_EQ_RE_EST_2 -155 0x0800 //TX_MIN_EQ_RE_EST_3 -156 0x1000 //TX_MIN_EQ_RE_EST_4 -157 0x1000 //TX_MIN_EQ_RE_EST_5 -158 0x1000 //TX_MIN_EQ_RE_EST_6 -159 0x1000 //TX_MIN_EQ_RE_EST_7 -160 0x1000 //TX_MIN_EQ_RE_EST_8 -161 0x1000 //TX_MIN_EQ_RE_EST_9 -162 0x1000 //TX_MIN_EQ_RE_EST_10 -163 0x1000 //TX_MIN_EQ_RE_EST_11 -164 0x1000 //TX_MIN_EQ_RE_EST_12 -165 0x3000 //TX_LAMBDA_RE_EST -166 0x1000 //TX_LAMBDA_CB_NLE -167 0x1800 //TX_C_POST_FLT -168 0x4000 //TX_GAIN_NP -169 0x003C //TX_SE_HOLD_N -170 0x0046 //TX_DT_HOLD_N -171 0x03E8 //TX_DT2_HOLD_N -172 0x6666 //TX_AEC_RESRV_0 -173 0x0000 //TX_AEC_RESRV_1 -174 0x0014 //TX_AEC_RESRV_2 -175 0x0000 //TX_MIC_DELAY_LENGTH -176 0x0000 //TX_REF_DELAY_LENGTH -177 0x0000 //TX_ADD_LINEIN_GAINL -178 0x0000 //TX_ADD_LINEIN_GAINH -179 0x0000 //TX_MIN_EQ_RE_EST_14 -180 0x0000 //TX_DTD_THR1_8 -181 0x7FFF //TX_DTD_THR2_8 -182 0x0000 //TX_DTD_MIC_BLK2 -183 0x0008 //TX_FRQ_LIN_LEN -184 0x7FFF //TX_FRQ_AEC_LEN_RHO -185 0x6000 //TX_MU0_UNP_FRQ_AEC -186 0x4000 //TX_MU0_PTD_FRQ_AEC -187 0x000A //TX_MINENOISETH -188 0x0800 //TX_MU0_RE_EST -189 0x0001 //TX_AEC_NUM_CH -190 0x0000 //TX_BIGECHOATTENUATION_MAX -191 0x2000 //TX_A_POST_FLT_MICBLK -192 0x0000 //TX_BLKENERTH -193 0x0000 //TX_BLKENERHIGHTH -194 0x0000 //TX_NORMENERTH -195 0x0000 //TX_NORMENERHIGHTH -196 0x0000 //TX_NORMENERHIGHTHL -197 0x7000 //TX_DTD_THR1_0 -198 0x7000 //TX_DTD_THR1_1 -199 0x7000 //TX_DTD_THR1_2 -200 0x7F00 //TX_DTD_THR1_3 -201 0x7F00 //TX_DTD_THR1_4 -202 0x7F00 //TX_DTD_THR1_5 -203 0x7F00 //TX_DTD_THR1_6 -204 0x2000 //TX_DTD_THR2_0 -205 0x2000 //TX_DTD_THR2_1 -206 0x2000 //TX_DTD_THR2_2 -207 0x1000 //TX_DTD_THR2_3 -208 0x1000 //TX_DTD_THR2_4 -209 0x1000 //TX_DTD_THR2_5 -210 0x1000 //TX_DTD_THR2_6 -211 0x6000 //TX_DTD_THR3 -212 0x0177 //TX_SPK_CUT_K -213 0x1B58 //TX_DT_CUT_K -214 0x0100 //TX_DT_CUT_THR -215 0x04EB //TX_COMFORT_G -216 0x01F4 //TX_POWER_YOUT_TH -217 0x4000 //TX_FDPFGAINECHO -218 0x0000 //TX_DTD_HD_THR -219 0x0000 //TX_SPK_CUT_K_S -220 0x0000 //TX_DTD_MIC_BLK -221 0x0400 //TX_ADPT_STRICT_L -222 0x0200 //TX_ADPT_STRICT_H -223 0x0C00 //TX_RATIO_DT_L_TH_LOW -224 0x2000 //TX_RATIO_DT_H_TH_LOW -225 0x1800 //TX_RATIO_DT_L_TH_HIGH -226 0x3000 //TX_RATIO_DT_H_TH_HIGH -227 0x0A00 //TX_RATIO_DT_L0_TH -228 0x7000 //TX_B_POST_FILT_ECHO_L -229 0x7FFF //TX_B_POST_FILT_ECHO_H -230 0x0200 //TX_MIN_G_CTRL_ECHO -231 0x7FFF //TX_B_LESSCUT_RTO_ECHO -232 0x0000 //TX_EPD_OFFSET_00 -233 0x0000 //TX_EPD_OFFST_01 -234 0x1388 //TX_RATIO_DT_L0_TH_HIGH -235 0x3A98 //TX_RATIO_DT_H_TH_CUT -236 0x7FFF //TX_MIN_EQ_RE_EST_13 -237 0x0000 //TX_DTD_THR1_7 -238 0x0000 //TX_DTD_THR2_7 -239 0x0800 //TX_DT_RESRV_7 -240 0x0800 //TX_DT_RESRV_8 -241 0x0000 //TX_DT_RESRV_9 -242 0xF600 //TX_THR_SN_EST_0 -243 0xFA00 //TX_THR_SN_EST_1 -244 0xFA00 //TX_THR_SN_EST_2 -245 0xF800 //TX_THR_SN_EST_3 -246 0xF800 //TX_THR_SN_EST_4 -247 0xF800 //TX_THR_SN_EST_5 -248 0xF800 //TX_THR_SN_EST_6 -249 0xF700 //TX_THR_SN_EST_7 -250 0x0000 //TX_DELTA_THR_SN_EST_0 -251 0x0100 //TX_DELTA_THR_SN_EST_1 -252 0x0200 //TX_DELTA_THR_SN_EST_2 -253 0x0200 //TX_DELTA_THR_SN_EST_3 -254 0x0200 //TX_DELTA_THR_SN_EST_4 -255 0x0100 //TX_DELTA_THR_SN_EST_5 -256 0x0200 //TX_DELTA_THR_SN_EST_6 -257 0x0200 //TX_DELTA_THR_SN_EST_7 -258 0x4000 //TX_LAMBDA_NN_EST_0 -259 0x4000 //TX_LAMBDA_NN_EST_1 -260 0x4000 //TX_LAMBDA_NN_EST_2 -261 0x4000 //TX_LAMBDA_NN_EST_3 -262 0x4000 //TX_LAMBDA_NN_EST_4 -263 0x4000 //TX_LAMBDA_NN_EST_5 -264 0x4000 //TX_LAMBDA_NN_EST_6 -265 0x4000 //TX_LAMBDA_NN_EST_7 -266 0x0400 //TX_N_SN_EST -267 0x001E //TX_INBEAM_T -268 0x0041 //TX_INBEAMHOLDT -269 0x2000 //TX_G_STRICT -270 0x2000 //TX_EQ_THR_BF -271 0x799A //TX_LAMBDA_EQ_BF -272 0x1000 //TX_NE_RTO_TH -273 0x1000 //TX_NE_RTO_TH_L -274 0x1000 //TX_MAINREFRTOH_TH_H -275 0x0600 //TX_MAINREFRTOH_TH_L -276 0x2000 //TX_MAINREFRTO_TH_H -277 0x1400 //TX_MAINREFRTO_TH_L -278 0x0000 //TX_MAINREFRTO_TH_EQ -279 0x1000 //TX_B_POST_FLT_0 -280 0x2000 //TX_B_POST_FLT_1 -281 0x0014 //TX_NS_LVL_CTRL_0 -282 0x0016 //TX_NS_LVL_CTRL_1 -283 0x0016 //TX_NS_LVL_CTRL_2 -284 0x0016 //TX_NS_LVL_CTRL_3 -285 0x0018 //TX_NS_LVL_CTRL_4 -286 0x0016 //TX_NS_LVL_CTRL_5 -287 0x0012 //TX_NS_LVL_CTRL_6 -288 0x0017 //TX_NS_LVL_CTRL_7 -289 0x000E //TX_MIN_GAIN_S_0 -290 0x0012 //TX_MIN_GAIN_S_1 -291 0x0007 //TX_MIN_GAIN_S_2 -292 0x0012 //TX_MIN_GAIN_S_3 -293 0x0010 //TX_MIN_GAIN_S_4 -294 0x0012 //TX_MIN_GAIN_S_5 -295 0x0012 //TX_MIN_GAIN_S_6 -296 0x0012 //TX_MIN_GAIN_S_7 -297 0x6000 //TX_NMOS_SUP -298 0x0000 //TX_NS_MAX_PRI_SNR_TH -299 0x0000 //TX_NMOS_SUP_MENSA -300 0x7FFF //TX_SNRI_SUP_0 -301 0x6000 //TX_SNRI_SUP_1 -302 0x6000 //TX_SNRI_SUP_2 -303 0x6000 //TX_SNRI_SUP_3 -304 0x6000 //TX_SNRI_SUP_4 -305 0x6000 //TX_SNRI_SUP_5 -306 0x6000 //TX_SNRI_SUP_6 -307 0x6000 //TX_SNRI_SUP_7 -308 0x6000 //TX_THR_LFNS -309 0x0017 //TX_G_LFNS -310 0x09C4 //TX_GAIN0_NTH -311 0x000A //TX_MUSIC_MORENS -312 0x7FFF //TX_A_POST_FILT_0 -313 0x2000 //TX_A_POST_FILT_1 -314 0x4000 //TX_A_POST_FILT_S_0 -315 0x5000 //TX_A_POST_FILT_S_1 -316 0x4000 //TX_A_POST_FILT_S_2 -317 0x4000 //TX_A_POST_FILT_S_3 -318 0x4000 //TX_A_POST_FILT_S_4 -319 0x4000 //TX_A_POST_FILT_S_5 -320 0x4000 //TX_A_POST_FILT_S_6 -321 0x7000 //TX_A_POST_FILT_S_7 -322 0x1000 //TX_B_POST_FILT_0 -323 0x2000 //TX_B_POST_FILT_1 -324 0x3000 //TX_B_POST_FILT_2 -325 0x2000 //TX_B_POST_FILT_3 -326 0x5000 //TX_B_POST_FILT_4 -327 0x2000 //TX_B_POST_FILT_5 -328 0x6000 //TX_B_POST_FILT_6 -329 0x3000 //TX_B_POST_FILT_7 -330 0x1000 //TX_B_LESSCUT_RTO_S_0 -331 0x6000 //TX_B_LESSCUT_RTO_S_1 -332 0x6000 //TX_B_LESSCUT_RTO_S_2 -333 0x6000 //TX_B_LESSCUT_RTO_S_3 -334 0x6000 //TX_B_LESSCUT_RTO_S_4 -335 0x6000 //TX_B_LESSCUT_RTO_S_5 -336 0x7FFF //TX_B_LESSCUT_RTO_S_6 -337 0x7FFF //TX_B_LESSCUT_RTO_S_7 -338 0x7E14 //TX_LAMBDA_PFILT -339 0x7C29 //TX_LAMBDA_PFILT_S_0 -340 0x7C29 //TX_LAMBDA_PFILT_S_1 -341 0x7C29 //TX_LAMBDA_PFILT_S_2 -342 0x7C29 //TX_LAMBDA_PFILT_S_3 -343 0x7C29 //TX_LAMBDA_PFILT_S_4 -344 0x7C29 //TX_LAMBDA_PFILT_S_5 -345 0x7C29 //TX_LAMBDA_PFILT_S_6 -346 0x7C29 //TX_LAMBDA_PFILT_S_7 -347 0x07D0 //TX_K_PEPPER -348 0x0800 //TX_A_PEPPER -349 0x1D4C //TX_K_PEPPER_HF -350 0x0400 //TX_A_PEPPER_HF -351 0x0001 //TX_HMNC_BST_FLG -352 0x4000 //TX_HMNC_BST_THR -353 0x0800 //TX_DT_BINVAD_TH_0 -354 0x0800 //TX_DT_BINVAD_TH_1 -355 0x0800 //TX_DT_BINVAD_TH_2 -356 0x0800 //TX_DT_BINVAD_TH_3 -357 0x0000 //TX_DT_BINVAD_ENDF -358 0x1000 //TX_C_POST_FLT_DT -359 0x7FFF //TX_NS_B_POST_FLT_LESSCUT -360 0x0100 //TX_DT_BOOST -361 0x0000 //TX_BF_SGRAD_FLG -362 0x0005 //TX_BF_DVG_TH -363 0x001E //TX_SN_C_F -364 0x0000 //TX_K_APT -365 0x0001 //TX_NOISEDET -366 0x0190 //TX_NDETCT -367 0x000A //TX_NOISE_TH_0 -368 0x1B58 //TX_NOISE_TH_0_2 -369 0x2134 //TX_NOISE_TH_0_3 -370 0x00C6 //TX_NOISE_TH_1 -371 0x0DAC //TX_NOISE_TH_2 -372 0x2EE0 //TX_NOISE_TH_3 -373 0x47E0 //TX_NOISE_TH_4 -374 0x57E4 //TX_NOISE_TH_5 -375 0x4BD6 //TX_NOISE_TH_5_2 -376 0x0001 //TX_NOISE_TH_5_3 -377 0x4E20 //TX_NOISE_TH_5_4 -378 0x39DF //TX_NOISE_TH_6 -379 0x0014 //TX_MINENOISE_TH -380 0x4000 //TX_MINENOISE_MIC0_TH_MTS -381 0xFFEE //TX_MINENOISE_MIC0_TH_EXP -382 0x6000 //TX_MINENOISE_MIC0_S_TH_MTS -383 0xFFF3 //TX_MINENOISE_MIC0_S_TH_EXP -384 0x00A5 //TX_OUT_ENER_S_TH_CLEAN -385 0x00A5 //TX_OUT_ENER_S_TH_LESSCLEAN -386 0x00A5 //TX_OUT_ENER_S_TH_NOISY -387 0x0029 //TX_OUT_ENER_TH_NOISE -388 0x0200 //TX_OUT_ENER_TH_SPEECH -389 0x2000 //TX_SN_NPB_GAIN -390 0x0000 //TX_NN_NPB_GAIN -391 0x0000 //TX_CSX_ALPHA_0 -392 0x0000 //TX_CSX_ALPHA_1 -393 0x0000 //TX_CSX_ALPHA_2 -394 0x0000 //TX_CSX_ALPHA_3 -395 0x0800 //TX_MU_ARSP_EST -396 0x00C8 //TX_P_OUTBEAM_MIN_TH -397 0x0002 //TX_EXTRA_NS_L -398 0x0800 //TX_EXTRA_NS_A -399 0x0005 //TX_VR_NOISE_FLOOR_TH -400 0x0148 //TX_MIN_G_LOW300HZ -401 0x0004 //TX_MAXLEVEL_CNG -402 0x00B4 //TX_STN_NOISE_TH -403 0x4000 //TX_POST_MASK_SUP -404 0x7FFF //TX_POST_MASK_ADJUST -405 0x00C8 //TX_NS_ENOISE_MIC0_TH -406 0x0014 //TX_MINENOISE_MIC0_TH -407 0x012C //TX_MINENOISE_MIC0_S_TH -408 0x2900 //TX_MIN_G_CTRL_SSNS -409 0x0800 //TX_METAL_RTO_THR -410 0x0FA0 //TX_NS_FP_K_METAL -411 0x3A98 //TX_NOISEDET_BOOST_TH -412 0x0FA0 //TX_NSMOOTH_TH -413 0x0000 //TX_NS_RESRV_8 -414 0x1800 //TX_RHO_UPB -415 0x2328 //TX_N_HOLD_HS -416 0x006E //TX_N_RHO_BFR0 -417 0x7FFF //TX_LAMBDA_ARSP_EST -418 0x0100 //TX_EXTRA_GAIN_MICBLOCK -419 0x0333 //TX_THR_STD_NSR -420 0x019A //TX_THR_STD_PLH -421 0x03E8 //TX_N_HOLD_STD -422 0x0066 //TX_THR_STD_RHO -423 0x2800 //TX_BF_RESET_THR_HS -424 0x0CCD //TX_SB_RTO_MEAN_TH -425 0x0300 //TX_SB_RHO_MEAN_TH_NTALK -426 0x2000 //TX_SB_RTO_MEAN_TH_ABN -427 0x2EE0 //TX_SB_RTO_MEAN_TH_RUB -428 0x0990 //TX_WTA_EN_RTO_TH -429 0x1400 //TX_TOP_ENER_TH_F -430 0x0100 //TX_DESIRED_TALK_HOLDT -431 0x0800 //TX_MIC_BLOCK_FACTOR -432 0x0000 //TX_NSEST_BFRLRNRDC -433 0x0000 //TX_THR_POST_FLT_HS -434 0x0010 //TX_HS_VAD_BIN -435 0x2666 //TX_THR_VAD_HS -436 0x2CCD //TX_MEAN_RTO_MIN_TH2 -437 0x0032 //TX_SILENCE_T -438 0x0000 //TX_A_POST_FLT_WTA -439 0x799A //TX_LAMBDA_PFLT_WTA -440 0x051E //TX_SB_RHO_MEAN2_TH -441 0x051E //TX_SB_RHO_MEAN3_TH -442 0x0000 //TX_HS_RESRV_4 -443 0x0000 //TX_HS_RESRV_5 -444 0x0001 //TX_DOA_VAD_THR_1 -445 0x003C //TX_DOA_VAD_THR_2 -446 0x0028 //TX_DOA_VAD_THR1_0 -447 0x0028 //TX_DOA_VAD_THR1_1 -448 0x0000 //TX_SRC_DOA_RNG_LOW_0A -449 0x001E //TX_SRC_DOA_RNG_HIGH_0A -450 0x005A //TX_DFLT_SRC_DOA_0A -451 0x0000 //TX_SRC_DOA_RNG_LOW_0B -452 0x0000 //TX_SRC_DOA_RNG_HIGH_0B -453 0x0000 //TX_DFLT_SRC_DOA_0B -454 0x0000 //TX_SRC_DOA_RNG_LOW_0C -455 0x0000 //TX_SRC_DOA_RNG_HIGH_0C -456 0x0000 //TX_DFLT_SRC_DOA_0C -457 0x0000 //TX_SRC_DOA_RNG_LOW_0D -458 0x0000 //TX_SRC_DOA_RNG_HIGH_0D -459 0x0000 //TX_DFLT_SRC_DOA_0D -460 0x0000 //TX_SRC_DOA_RNG_LOW_1A -461 0x00B4 //TX_SRC_DOA_RNG_HIGH_1A -462 0x005A //TX_DFLT_SRC_DOA_1A -463 0x0000 //TX_SRC_DOA_RNG_LOW_1B -464 0x00B4 //TX_SRC_DOA_RNG_HIGH_1B -465 0x005A //TX_DFLT_SRC_DOA_1B -466 0x0000 //TX_SRC_DOA_RNG_LOW_1C -467 0x00B4 //TX_SRC_DOA_RNG_HIGH_1C -468 0x005A //TX_DFLT_SRC_DOA_1C -469 0x0000 //TX_SRC_DOA_RNG_LOW_1D -470 0x00B4 //TX_SRC_DOA_RNG_HIGH_1D -471 0x005A //TX_DFLT_SRC_DOA_1D -472 0x0100 //TX_BF_HOLDOFF_T -473 0x7FFF //TX_DOA_COST_FACTOR -474 0x0D9A //TX_MAINTOREFR_TH0 -475 0x071C //TX_DOA_TRK_THR -476 0x012C //TX_DOA_TRACK_HT -477 0x0200 //TX_N1_HOLD_HF -478 0x0100 //TX_N2_HOLD_HF -479 0x2A3D //TX_BF_RESET_THR_HF -480 0x7333 //TX_DOA_SMOOTH -481 0x0800 //TX_MU_BF -482 0x0800 //TX_BF_MU_LF_B2 -483 0x0040 //TX_BF_FC_END_BIN_B2 -484 0x0020 //TX_BF_FC_END_BIN -485 0x0000 //TX_HF_RESRV_25 -486 0x0000 //TX_HF_RESRV_26 -487 0x0007 //TX_N_DOA_SEED -488 0x0001 //TX_FINE_DOA_SEARCH_FLG -489 0x0000 //TX_HF_RESRV_27 -490 0x038E //TX_DLT_SRC_DOA_RNG -491 0x0200 //TX_BF_MU_LF -492 0x0000 //TX_DFLT_SRC_LOC_0 -493 0x7FFF //TX_DFLT_SRC_LOC_1 -494 0x0000 //TX_DFLT_SRC_LOC_2 -495 0x038E //TX_DOA_TRACK_VADTH -496 0x0000 //TX_DOA_TRACK_NEW -497 0x0300 //TX_NOR_OFF_THR -498 0x7C00 //TX_MORE_ON_700HZ_THR -499 0x2000 //TX_MU_BF_ADPT_NS -500 0x0000 //TX_ADAPT_LEN -501 0x6666 //TX_MORE_SNS -502 0x0000 //TX_NOR_OFF_TH1 -503 0x0000 //TX_WIDE_MASK_TH -504 0xD333 //TX_SUBSNRATIOHIGH4MEANBCK_THR -505 0x6000 //TX_C_POST_FLT_CUT -506 0x2000 //TX_RADIODTLV -507 0x0320 //TX_POWER_LINEIN_TH -508 0x0014 //TX_FE_VADCOUNT_TH_FC -509 0x0000 //TX_ECHO_SUPP_FC -510 0x0C80 //TX_ECHO_TH -511 0x6666 //TX_MIC_TO_BFGAIN -512 0x0000 //TX_MICTOBFGAIN0 -513 0x0000 //TX_FASTMUE_TH -514 0x0000 //TX_DERVB_LEN_0 -515 0x0000 //TX_DERVB_LEN_1 -516 0x0000 //TX_RHO_DERVB -517 0x0000 //TX_MIC_INDX_DERVB -518 0x0000 //TX_MU_DERVB -519 0x0000 //TX_DR_RESRV_0 -520 0x0000 //TX_DR_RESRV_1 -521 0x0000 //TX_DR_RESRV_2 -522 0x0000 //TX_DR_RESRV_3 -523 0x0000 //TX_DR_RESRV_4 -524 0x0000 //TX_DR_RESRV_5 -525 0x0000 //TX_DR_RESRV_6 -526 0x0000 //TX_DR_RESRV_7 -527 0x0000 //TX_DR_RESRV_8 -528 0x1333 //TX_WIND_MARK_TH -529 0x399A //TX_CORR_THR -530 0x0004 //TX_SNR_THR -531 0x0010 //TX_ENGY_THR -532 0x1770 //TX_CORR_HIGH_TH -533 0x6000 //TX_ENGY_THR_2 -534 0x3400 //TX_MEAN_RTO_THR -535 0x0028 //TX_WNS_ENOISE_MIC0_TH -536 0x3000 //TX_RATIOMICL_TH -537 0x7FFF //TX_CALIG_HS -538 0x0000 //TX_LVL_CTRL -539 0x0010 //TX_WIND_SUPRTO -540 0x0014 //TX_WNS_MIN_G -541 0x0600 //TX_WNS_B_POST_FLT -542 0x3000 //TX_RATIOMICH_TH -543 0xD120 //TX_WIND_INBEAM_L_TH -544 0x0FA0 //TX_WIND_INBEAM_H_TH -545 0x2000 //TX_WNS_RESRV_0 -546 0x59D8 //TX_WNS_RESRV_1 -547 0x0200 //TX_WNS_RESRV_2 -548 0x0000 //TX_WNS_RESRV_3 -549 0x0000 //TX_WNS_RESRV_4 -550 0x0000 //TX_WNS_RESRV_5 -551 0x0000 //TX_WNS_RESRV_6 -552 0x0000 //TX_PB_B_POST_FLT_LESSCUT -553 0x0070 //TX_BF_LESSCUT_BBIN -554 0x0070 //TX_BF_LESSCUT_EBIN -555 0x0010 //TX_POSTBFB0 -556 0x0070 //TX_POSTBFB -557 0x00B0 //TX_POSTBFE -558 0x0E66 //TX_SPEECH_SNR_TH -559 0x0050 //TX_PB_MAX_PRI_SNR_TH -560 0x770A //TX_MAX_PRI_SNR_TH_L -561 0x0000 //TX_PFGAIN -562 0x0000 //TX_MAINTOREFR_TH -563 0x0000 //TX_SAM_MARK -564 0x0000 //TX_PB_RESRV_0 -565 0x0000 //TX_PB_RESRV_1 -566 0x0030 //TX_FDEQ_SUBNUM -567 0x504A //TX_FDEQ_GAIN_0 -568 0x4C54 //TX_FDEQ_GAIN_1 -569 0x554B //TX_FDEQ_GAIN_2 -570 0x4D4E //TX_FDEQ_GAIN_3 -571 0x4F4F //TX_FDEQ_GAIN_4 -572 0x4E51 //TX_FDEQ_GAIN_5 -573 0x5154 //TX_FDEQ_GAIN_6 -574 0x5456 //TX_FDEQ_GAIN_7 -575 0x5E66 //TX_FDEQ_GAIN_8 -576 0x675D //TX_FDEQ_GAIN_9 -577 0x5655 //TX_FDEQ_GAIN_10 -578 0x5956 //TX_FDEQ_GAIN_11 -579 0x5656 //TX_FDEQ_GAIN_12 -580 0x5953 //TX_FDEQ_GAIN_13 -581 0x575A //TX_FDEQ_GAIN_14 -582 0x5559 //TX_FDEQ_GAIN_15 -583 0x656E //TX_FDEQ_GAIN_16 -584 0x7B98 //TX_FDEQ_GAIN_17 -585 0x9898 //TX_FDEQ_GAIN_18 -586 0x9848 //TX_FDEQ_GAIN_19 -587 0x4848 //TX_FDEQ_GAIN_20 -588 0x4848 //TX_FDEQ_GAIN_21 -589 0x4848 //TX_FDEQ_GAIN_22 -590 0x4848 //TX_FDEQ_GAIN_23 -591 0x0F03 //TX_FDEQ_BIN_0 -592 0x0909 //TX_FDEQ_BIN_1 -593 0x080F //TX_FDEQ_BIN_2 -594 0x0609 //TX_FDEQ_BIN_3 -595 0x0F03 //TX_FDEQ_BIN_4 -596 0x1402 //TX_FDEQ_BIN_5 -597 0x0E13 //TX_FDEQ_BIN_6 -598 0x110F //TX_FDEQ_BIN_7 -599 0x0E0F //TX_FDEQ_BIN_8 -600 0x0E0F //TX_FDEQ_BIN_9 -601 0x080D //TX_FDEQ_BIN_10 -602 0x0F0F //TX_FDEQ_BIN_11 -603 0x0F0F //TX_FDEQ_BIN_12 -604 0x0A0F //TX_FDEQ_BIN_13 -605 0x0809 //TX_FDEQ_BIN_14 -606 0x0A0B //TX_FDEQ_BIN_15 -607 0x0C0D //TX_FDEQ_BIN_16 -608 0x0E0F //TX_FDEQ_BIN_17 -609 0x1013 //TX_FDEQ_BIN_18 -610 0x0A00 //TX_FDEQ_BIN_19 -611 0x0000 //TX_FDEQ_BIN_20 -612 0x0000 //TX_FDEQ_BIN_21 -613 0x0000 //TX_FDEQ_BIN_22 -614 0x0000 //TX_FDEQ_BIN_23 -615 0x0000 //TX_FDEQ_PADDING -616 0x0030 //TX_PREEQ_SUBNUM_MIC0 -617 0x4848 //TX_PREEQ_GAIN_MIC0_0 -618 0x4848 //TX_PREEQ_GAIN_MIC0_1 -619 0x4848 //TX_PREEQ_GAIN_MIC0_2 -620 0x4848 //TX_PREEQ_GAIN_MIC0_3 -621 0x4848 //TX_PREEQ_GAIN_MIC0_4 -622 0x4848 //TX_PREEQ_GAIN_MIC0_5 -623 0x4846 //TX_PREEQ_GAIN_MIC0_6 -624 0x4645 //TX_PREEQ_GAIN_MIC0_7 -625 0x4545 //TX_PREEQ_GAIN_MIC0_8 -626 0x4545 //TX_PREEQ_GAIN_MIC0_9 -627 0x4444 //TX_PREEQ_GAIN_MIC0_10 -628 0x4443 //TX_PREEQ_GAIN_MIC0_11 -629 0x4241 //TX_PREEQ_GAIN_MIC0_12 -630 0x3C3E //TX_PREEQ_GAIN_MIC0_13 -631 0x3E40 //TX_PREEQ_GAIN_MIC0_14 -632 0x4848 //TX_PREEQ_GAIN_MIC0_15 -633 0x4848 //TX_PREEQ_GAIN_MIC0_16 -634 0x4848 //TX_PREEQ_GAIN_MIC0_17 -635 0x4848 //TX_PREEQ_GAIN_MIC0_18 -636 0x4848 //TX_PREEQ_GAIN_MIC0_19 -637 0x4848 //TX_PREEQ_GAIN_MIC0_20 -638 0x4848 //TX_PREEQ_GAIN_MIC0_21 -639 0x4848 //TX_PREEQ_GAIN_MIC0_22 -640 0x4848 //TX_PREEQ_GAIN_MIC0_23 -641 0x0202 //TX_PREEQ_BIN_MIC0_0 -642 0x0203 //TX_PREEQ_BIN_MIC0_1 -643 0x0303 //TX_PREEQ_BIN_MIC0_2 -644 0x0304 //TX_PREEQ_BIN_MIC0_3 -645 0x0405 //TX_PREEQ_BIN_MIC0_4 -646 0x0506 //TX_PREEQ_BIN_MIC0_5 -647 0x0808 //TX_PREEQ_BIN_MIC0_6 -648 0x0809 //TX_PREEQ_BIN_MIC0_7 -649 0x0A0A //TX_PREEQ_BIN_MIC0_8 -650 0x0C10 //TX_PREEQ_BIN_MIC0_9 -651 0x1013 //TX_PREEQ_BIN_MIC0_10 -652 0x1414 //TX_PREEQ_BIN_MIC0_11 -653 0x261E //TX_PREEQ_BIN_MIC0_12 -654 0x1E14 //TX_PREEQ_BIN_MIC0_13 -655 0x1414 //TX_PREEQ_BIN_MIC0_14 -656 0x2814 //TX_PREEQ_BIN_MIC0_15 -657 0x4000 //TX_PREEQ_BIN_MIC0_16 -658 0x0000 //TX_PREEQ_BIN_MIC0_17 -659 0x0000 //TX_PREEQ_BIN_MIC0_18 -660 0x0000 //TX_PREEQ_BIN_MIC0_19 -661 0x0000 //TX_PREEQ_BIN_MIC0_20 -662 0x0000 //TX_PREEQ_BIN_MIC0_21 -663 0x0000 //TX_PREEQ_BIN_MIC0_22 -664 0x0000 //TX_PREEQ_BIN_MIC0_23 -665 0x0030 //TX_PREEQ_SUBNUM_MIC1 -666 0x4848 //TX_PREEQ_GAIN_MIC1_0 -667 0x4848 //TX_PREEQ_GAIN_MIC1_1 -668 0x4848 //TX_PREEQ_GAIN_MIC1_2 -669 0x4848 //TX_PREEQ_GAIN_MIC1_3 -670 0x4848 //TX_PREEQ_GAIN_MIC1_4 -671 0x4848 //TX_PREEQ_GAIN_MIC1_5 -672 0x4849 //TX_PREEQ_GAIN_MIC1_6 -673 0x4A4B //TX_PREEQ_GAIN_MIC1_7 -674 0x4C4B //TX_PREEQ_GAIN_MIC1_8 -675 0x4A48 //TX_PREEQ_GAIN_MIC1_9 -676 0x4B4C //TX_PREEQ_GAIN_MIC1_10 -677 0x4C4B //TX_PREEQ_GAIN_MIC1_11 -678 0x4838 //TX_PREEQ_GAIN_MIC1_12 -679 0x3858 //TX_PREEQ_GAIN_MIC1_13 -680 0x7060 //TX_PREEQ_GAIN_MIC1_14 -681 0x9870 //TX_PREEQ_GAIN_MIC1_15 -682 0x5848 //TX_PREEQ_GAIN_MIC1_16 -683 0x4848 //TX_PREEQ_GAIN_MIC1_17 -684 0x4848 //TX_PREEQ_GAIN_MIC1_18 -685 0x4848 //TX_PREEQ_GAIN_MIC1_19 -686 0x4848 //TX_PREEQ_GAIN_MIC1_20 -687 0x4848 //TX_PREEQ_GAIN_MIC1_21 -688 0x4848 //TX_PREEQ_GAIN_MIC1_22 -689 0x4848 //TX_PREEQ_GAIN_MIC1_23 -690 0x0202 //TX_PREEQ_BIN_MIC1_0 -691 0x0203 //TX_PREEQ_BIN_MIC1_1 -692 0x0303 //TX_PREEQ_BIN_MIC1_2 -693 0x0304 //TX_PREEQ_BIN_MIC1_3 -694 0x0405 //TX_PREEQ_BIN_MIC1_4 -695 0x0506 //TX_PREEQ_BIN_MIC1_5 -696 0x0808 //TX_PREEQ_BIN_MIC1_6 -697 0x0809 //TX_PREEQ_BIN_MIC1_7 -698 0x0A0A //TX_PREEQ_BIN_MIC1_8 -699 0x0C10 //TX_PREEQ_BIN_MIC1_9 -700 0x1013 //TX_PREEQ_BIN_MIC1_10 -701 0x1414 //TX_PREEQ_BIN_MIC1_11 -702 0x261E //TX_PREEQ_BIN_MIC1_12 -703 0x1E14 //TX_PREEQ_BIN_MIC1_13 -704 0x1414 //TX_PREEQ_BIN_MIC1_14 -705 0x2814 //TX_PREEQ_BIN_MIC1_15 -706 0x4000 //TX_PREEQ_BIN_MIC1_16 -707 0x0000 //TX_PREEQ_BIN_MIC1_17 -708 0x0000 //TX_PREEQ_BIN_MIC1_18 -709 0x0000 //TX_PREEQ_BIN_MIC1_19 -710 0x0000 //TX_PREEQ_BIN_MIC1_20 -711 0x0000 //TX_PREEQ_BIN_MIC1_21 -712 0x0000 //TX_PREEQ_BIN_MIC1_22 -713 0x0000 //TX_PREEQ_BIN_MIC1_23 -714 0x0030 //TX_PREEQ_SUBNUM_MIC2 -715 0x4848 //TX_PREEQ_GAIN_MIC2_0 -716 0x4848 //TX_PREEQ_GAIN_MIC2_1 -717 0x4848 //TX_PREEQ_GAIN_MIC2_2 -718 0x4848 //TX_PREEQ_GAIN_MIC2_3 -719 0x4848 //TX_PREEQ_GAIN_MIC2_4 -720 0x4848 //TX_PREEQ_GAIN_MIC2_5 -721 0x4848 //TX_PREEQ_GAIN_MIC2_6 -722 0x4848 //TX_PREEQ_GAIN_MIC2_7 -723 0x4848 //TX_PREEQ_GAIN_MIC2_8 -724 0x4848 //TX_PREEQ_GAIN_MIC2_9 -725 0x4848 //TX_PREEQ_GAIN_MIC2_10 -726 0x4848 //TX_PREEQ_GAIN_MIC2_11 -727 0x4848 //TX_PREEQ_GAIN_MIC2_12 -728 0x4848 //TX_PREEQ_GAIN_MIC2_13 -729 0x4848 //TX_PREEQ_GAIN_MIC2_14 -730 0x4848 //TX_PREEQ_GAIN_MIC2_15 -731 0x4848 //TX_PREEQ_GAIN_MIC2_16 -732 0x4848 //TX_PREEQ_GAIN_MIC2_17 -733 0x4848 //TX_PREEQ_GAIN_MIC2_18 -734 0x4848 //TX_PREEQ_GAIN_MIC2_19 -735 0x4848 //TX_PREEQ_GAIN_MIC2_20 -736 0x4848 //TX_PREEQ_GAIN_MIC2_21 -737 0x4848 //TX_PREEQ_GAIN_MIC2_22 -738 0x4848 //TX_PREEQ_GAIN_MIC2_23 -739 0x0202 //TX_PREEQ_BIN_MIC2_0 -740 0x0203 //TX_PREEQ_BIN_MIC2_1 -741 0x0303 //TX_PREEQ_BIN_MIC2_2 -742 0x0304 //TX_PREEQ_BIN_MIC2_3 -743 0x0405 //TX_PREEQ_BIN_MIC2_4 -744 0x0506 //TX_PREEQ_BIN_MIC2_5 -745 0x0808 //TX_PREEQ_BIN_MIC2_6 -746 0x0809 //TX_PREEQ_BIN_MIC2_7 -747 0x0A0A //TX_PREEQ_BIN_MIC2_8 -748 0x0C10 //TX_PREEQ_BIN_MIC2_9 -749 0x1013 //TX_PREEQ_BIN_MIC2_10 -750 0x1414 //TX_PREEQ_BIN_MIC2_11 -751 0x261E //TX_PREEQ_BIN_MIC2_12 -752 0x1E14 //TX_PREEQ_BIN_MIC2_13 -753 0x1414 //TX_PREEQ_BIN_MIC2_14 -754 0x2814 //TX_PREEQ_BIN_MIC2_15 -755 0x4000 //TX_PREEQ_BIN_MIC2_16 -756 0x0000 //TX_PREEQ_BIN_MIC2_17 -757 0x0000 //TX_PREEQ_BIN_MIC2_18 -758 0x0000 //TX_PREEQ_BIN_MIC2_19 -759 0x0000 //TX_PREEQ_BIN_MIC2_20 -760 0x0000 //TX_PREEQ_BIN_MIC2_21 -761 0x0000 //TX_PREEQ_BIN_MIC2_22 -762 0x0000 //TX_PREEQ_BIN_MIC2_23 -763 0x0006 //TX_MASKING_ABILITY -764 0x2000 //TX_NND_WEIGHT -765 0x0060 //TX_MIC_CALIBRATION_0 -766 0x0060 //TX_MIC_CALIBRATION_1 -767 0x0070 //TX_MIC_CALIBRATION_2 -768 0x0070 //TX_MIC_CALIBRATION_3 -769 0x0050 //TX_MIC_PWR_BIAS_0 -770 0x0040 //TX_MIC_PWR_BIAS_1 -771 0x0040 //TX_MIC_PWR_BIAS_2 -772 0x0040 //TX_MIC_PWR_BIAS_3 -773 0x0009 //TX_GAIN_LIMIT_0 -774 0x000F //TX_GAIN_LIMIT_1 -775 0x000F //TX_GAIN_LIMIT_2 -776 0x000F //TX_GAIN_LIMIT_3 -777 0x7F5B //TX_BVE_NOVAD0_ALPHADOWN -778 0x7FDE //TX_BVE_VAD0_ALPHAUP -779 0x7F3A //TX_BVE_VAD0_ALPHADOWN -780 0x2000 //TX_BVE_GAINWEIGHT_NOFEVADLI -781 0x7F5B //TX_BVE_FEVADLI_ALPHA -782 0x7F19 //TX_BVE_NOVAD0_ALPHAUP -783 0x1000 //TX_TDDRC_ALPHA_UP_01 -784 0x1000 //TX_TDDRC_ALPHA_UP_02 -785 0x1000 //TX_TDDRC_ALPHA_UP_03 -786 0x1000 //TX_TDDRC_ALPHA_UP_04 -787 0x7EB8 //TX_TDDRC_ALPHA_DWN_01 -788 0x7EB8 //TX_TDDRC_ALPHA_DWN_02 -789 0x7EB8 //TX_TDDRC_ALPHA_DWN_03 -790 0x7EB8 //TX_TDDRC_ALPHA_DWN_04 -791 0x7FFF //TX_TDDRC_TD_DRC_LIMIT -792 0x0800 //TX_TDDRC_POST_LIMIT_GAIN -793 0x0000 //TX_TDDRC_RESRV_0 -794 0x0000 //TX_TDDRC_RESRV_1 -795 0x0018 //TX_FDDRC_BAND_MARGIN_0 -796 0x0030 //TX_FDDRC_BAND_MARGIN_1 -797 0x0050 //TX_FDDRC_BAND_MARGIN_2 -798 0x0080 //TX_FDDRC_BAND_MARGIN_3 -799 0x0007 //TX_FDDRC_BLOCK_EXP -800 0x5000 //TX_FDDRC_THRD_2_0 -801 0x5000 //TX_FDDRC_THRD_2_1 -802 0x5000 //TX_FDDRC_THRD_2_2 -803 0x5000 //TX_FDDRC_THRD_2_3 -804 0x6400 //TX_FDDRC_THRD_3_0 -805 0x6400 //TX_FDDRC_THRD_3_1 -806 0x6400 //TX_FDDRC_THRD_3_2 -807 0x6400 //TX_FDDRC_THRD_3_3 -808 0x2000 //TX_FDDRC_SLANT_0_0 -809 0x2000 //TX_FDDRC_SLANT_0_1 -810 0x2000 //TX_FDDRC_SLANT_0_2 -811 0x2000 //TX_FDDRC_SLANT_0_3 -812 0x5333 //TX_FDDRC_SLANT_1_0 -813 0x5333 //TX_FDDRC_SLANT_1_1 -814 0x5333 //TX_FDDRC_SLANT_1_2 -815 0x5333 //TX_FDDRC_SLANT_1_3 -816 0x0010 //TX_DEADMIC_SILENCE_TH -817 0x0600 //TX_MIC_DEGRADE_TH -818 0x0078 //TX_DEADMIC_CNT -819 0x0078 //TX_MIC_DEGRADE_CNT -820 0x0000 //TX_FDDRC_RESRV_4 -821 0x0000 //TX_FDDRC_RESRV_5 -822 0x0000 //TX_FDDRC_RESRV_6 -823 0x7FFF //TX_KS_NOISEPASTE_FACTOR -824 0x0001 //TX_KS_CONFIG -825 0x7FFF //TX_KS_GAIN_MIN -826 0x0000 //TX_KS_RESRV_0 -827 0x0000 //TX_KS_RESRV_1 -828 0x0000 //TX_KS_RESRV_2 -829 0x7C00 //TX_LAMBDA_PKA_FP -830 0x2000 //TX_TPKA_FP -831 0x0080 //TX_MIN_G_FP -832 0x2000 //TX_MAX_G_FP -833 0x0FA0 //TX_FFP_FP_K_METAL -834 0x4000 //TX_A_POST_FLT_FP -835 0x0F5C //TX_RTO_OUTBEAM_TH -836 0x4CCD //TX_TPKA_FP_THD -837 0x0000 //TX_MAX_G_FP_BLK -838 0x0000 //TX_FFP_FADEIN -839 0x0000 //TX_FFP_FADEOUT -840 0x0000 //TX_WHISPERCTH -841 0x0000 //TX_WHISPERHOLDT -842 0x0000 //TX_WHISP_ENTHH -843 0x0000 //TX_WHISP_ENTHL -844 0x0000 //TX_WHISP_RTOTH -845 0x0000 //TX_WHISP_RTOTH2 -846 0x0096 //TX_MUTE_PERIOD -847 0x0000 //TX_FADE_IN_PERIOD -848 0x0100 //TX_FFP_RESRV_2 -849 0x0020 //TX_FFP_RESRV_3 -850 0x0000 //TX_FFP_RESRV_4 -851 0x0000 //TX_FFP_RESRV_5 -852 0x0000 //TX_FFP_RESRV_6 -853 0x0002 //TX_FILTINDX -854 0x0000 //TX_TDDRC_THRD_0 -855 0x0000 //TX_TDDRC_THRD_1 -856 0x1800 //TX_TDDRC_THRD_2 -857 0x1800 //TX_TDDRC_THRD_3 -858 0x3000 //TX_TDDRC_SLANT_0 -859 0x7E00 //TX_TDDRC_SLANT_1 -860 0x1000 //TX_TDDRC_ALPHA_UP_00 -861 0x7EB8 //TX_TDDRC_ALPHA_DWN_00 -862 0x0000 //TX_TDDRC_HMNC_FLAG -863 0x199A //TX_TDDRC_HMNC_GAIN -864 0x0000 //TX_TDDRC_SMT_FLAG -865 0x0CCD //TX_TDDRC_SMT_W -866 0x05F5 //TX_TDDRC_DRC_GAIN -867 0x7FFF //TX_TDDRC_LMT_THRD -868 0x0000 //TX_TDDRC_LMT_ALPHA -869 0x0000 //TX_TFMASKLTH -870 0x0000 //TX_TFMASKLTHL -871 0x0CCD //TX_TFMASKHTH -872 0xECCD //TX_TFMASKLTH_BINVAD -873 0xFCCD //TX_TFMASKLTH_NS_EST -874 0xF800 //TX_TFMASKLTH_DOA -875 0x0CCD //TX_TFMASKTH_BLESSCUT -876 0x1000 //TX_B_LESSCUT_RTO_MASK -877 0x2000 //TX_SB_RHO_MEAN_TH_ABN -878 0x2000 //TX_B_POST_FLT_MASK -879 0x0000 //TX_B_POST_FLT_MASK1 -880 0x6333 //TX_GAIN_WIND_MASK -881 0x0000 //TX_TFMASK_BFSTRICT_MUSIC -882 0x0000 //TX_TFMASK_BFSTRICT_NOMUSIC -883 0x7333 //TX_FASTNS_OUTIN_TH -884 0x0CCD //TX_FASTNS_TFMASK_TH -885 0x0CCD //TX_FASTNS_TFMASKBIN_TH1 -886 0x0CCD //TX_FASTNS_TFMASKBIN_TH2 -887 0x0CCD //TX_FASTNS_TFMASKBIN_TH3 -888 0x0028 //TX_FASTNS_ARSPC_TH -889 0xC000 //TX_FASTNS_MASK5_TH -890 0x0810 //TX_POSTSSA_MIN_G_VR_MASK -891 0x1000 //TX_A_LESSCUT_RTO_MASK -892 0x1770 //TX_FASTNS_NOISETH -893 0xC000 //TX_FASTNS_SSA_THLFL -894 0xC000 //TX_FASTNS_SSA_THHFL -895 0xCCCC //TX_FASTNS_SSA_THLFH -896 0xD999 //TX_FASTNS_SSA_THHFH -#RX -0 0x002C //RX_RECVFUNC_MODE_0 -1 0x0000 //RX_RECVFUNC_MODE_1 -2 0x0004 //RX_SAMPLINGFREQ_SIG -3 0x0004 //RX_SAMPLINGFREQ_PROC -4 0x000A //RX_FRAME_SZ -5 0x0000 //RX_DELAY_OPT -6 0x1000 //RX_TDDRC_ALPHA_UP_1 -7 0x1000 //RX_TDDRC_ALPHA_UP_2 -8 0x1000 //RX_TDDRC_ALPHA_UP_3 -9 0x1000 //RX_TDDRC_ALPHA_UP_4 -10 0x064E //RX_PGA -11 0x7FFF //RX_A_HP -12 0x4000 //RX_B_PE -13 0x5800 //RX_THR_PITCH_DET_0 -14 0x5000 //RX_THR_PITCH_DET_1 -15 0x4000 //RX_THR_PITCH_DET_2 -16 0x0008 //RX_PITCH_BFR_LEN -17 0x0003 //RX_SBD_PITCH_DET -18 0x0100 //RX_PP_RESRV_0 -19 0x0020 //RX_PP_RESRV_1 -20 0x0600 //RX_N_SN_EST -21 0x000C //RX_N2_SN_EST -22 0x000F //RX_NS_LVL_CTRL -23 0xF800 //RX_THR_SN_EST -24 0x7E00 //RX_LAMBDA_PFILT -25 0x000A //RX_FENS_RESRV_0 -26 0x0190 //RX_FENS_RESRV_1 -27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 -28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 -29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 -30 0x0002 //RX_EXTRA_NS_L -31 0x0800 //RX_EXTRA_NS_A -32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 -33 0x7000 //RX_TDDRC_LIMITER_THRD -34 0x0800 //RX_TDDRC_LIMITER_GAIN -35 0x199A //RX_A_POST_FLT -36 0x0000 //RX_LMT_THRD -37 0x4000 //RX_LMT_ALPHA -38 0x0020 //RX_FDEQ_SUBNUM -39 0x4848 //RX_FDEQ_GAIN_0 -40 0x4850 //RX_FDEQ_GAIN_1 -41 0x6478 //RX_FDEQ_GAIN_2 -42 0x8689 //RX_FDEQ_GAIN_3 -43 0x908F //RX_FDEQ_GAIN_4 -44 0x9495 //RX_FDEQ_GAIN_5 -45 0x989D //RX_FDEQ_GAIN_6 -46 0x9DA6 //RX_FDEQ_GAIN_7 -47 0xA895 //RX_FDEQ_GAIN_8 -48 0x8A8A //RX_FDEQ_GAIN_9 -49 0x8E78 //RX_FDEQ_GAIN_10 -50 0x7070 //RX_FDEQ_GAIN_11 -51 0x7680 //RX_FDEQ_GAIN_12 -52 0x787C //RX_FDEQ_GAIN_13 -53 0x8890 //RX_FDEQ_GAIN_14 -54 0x9CAC //RX_FDEQ_GAIN_15 -55 0x4848 //RX_FDEQ_GAIN_16 -56 0x4848 //RX_FDEQ_GAIN_17 -57 0x4848 //RX_FDEQ_GAIN_18 -58 0x4848 //RX_FDEQ_GAIN_19 -59 0x4848 //RX_FDEQ_GAIN_20 -60 0x4848 //RX_FDEQ_GAIN_21 -61 0x4848 //RX_FDEQ_GAIN_22 -62 0x4848 //RX_FDEQ_GAIN_23 -63 0x0202 //RX_FDEQ_BIN_0 -64 0x0202 //RX_FDEQ_BIN_1 -65 0x0302 //RX_FDEQ_BIN_2 -66 0x0304 //RX_FDEQ_BIN_3 -67 0x0405 //RX_FDEQ_BIN_4 -68 0x0506 //RX_FDEQ_BIN_5 -69 0x0708 //RX_FDEQ_BIN_6 -70 0x090A //RX_FDEQ_BIN_7 -71 0x0B0C //RX_FDEQ_BIN_8 -72 0x0D0E //RX_FDEQ_BIN_9 -73 0x1013 //RX_FDEQ_BIN_10 -74 0x1719 //RX_FDEQ_BIN_11 -75 0x1B1E //RX_FDEQ_BIN_12 -76 0x1E1E //RX_FDEQ_BIN_13 -77 0x1E28 //RX_FDEQ_BIN_14 -78 0x282C //RX_FDEQ_BIN_15 -79 0x0000 //RX_FDEQ_BIN_16 -80 0x0000 //RX_FDEQ_BIN_17 -81 0x0000 //RX_FDEQ_BIN_18 -82 0x0000 //RX_FDEQ_BIN_19 -83 0x0000 //RX_FDEQ_BIN_20 -84 0x0000 //RX_FDEQ_BIN_21 -85 0x0000 //RX_FDEQ_BIN_22 -86 0x0000 //RX_FDEQ_BIN_23 -87 0x4000 //RX_FDEQ_RESRV_0 -88 0x0320 //RX_FDEQ_RESRV_1 -89 0x0018 //RX_FDDRC_BAND_MARGIN_0 -90 0x0030 //RX_FDDRC_BAND_MARGIN_1 -91 0x0050 //RX_FDDRC_BAND_MARGIN_2 -92 0x0080 //RX_FDDRC_BAND_MARGIN_3 -93 0x0007 //RX_FDDRC_BLOCK_EXP -94 0x5000 //RX_FDDRC_THRD_2_0 -95 0x5000 //RX_FDDRC_THRD_2_1 -96 0x5000 //RX_FDDRC_THRD_2_2 -97 0x5000 //RX_FDDRC_THRD_2_3 -98 0x6400 //RX_FDDRC_THRD_3_0 -99 0x6400 //RX_FDDRC_THRD_3_1 -100 0x6400 //RX_FDDRC_THRD_3_2 -101 0x6400 //RX_FDDRC_THRD_3_3 -102 0x2000 //RX_FDDRC_SLANT_0_0 -103 0x2000 //RX_FDDRC_SLANT_0_1 -104 0x2000 //RX_FDDRC_SLANT_0_2 -105 0x2000 //RX_FDDRC_SLANT_0_3 -106 0x5333 //RX_FDDRC_SLANT_1_0 -107 0x5333 //RX_FDDRC_SLANT_1_1 -108 0x5333 //RX_FDDRC_SLANT_1_2 -109 0x5333 //RX_FDDRC_SLANT_1_3 -110 0x0000 //RX_FDDRC_RESRV_0 -111 0x0002 //RX_FILTINDX -112 0x0000 //RX_TDDRC_THRD_0 -113 0x0000 //RX_TDDRC_THRD_1 -114 0x1800 //RX_TDDRC_THRD_2 -115 0x1800 //RX_TDDRC_THRD_3 -116 0x3000 //RX_TDDRC_SLANT_0 -117 0x6E00 //RX_TDDRC_SLANT_1 -118 0x1000 //RX_TDDRC_ALPHA_UP_0 -119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 -120 0x0000 //RX_TDDRC_HMNC_FLAG -121 0x199A //RX_TDDRC_HMNC_GAIN -122 0x0001 //RX_TDDRC_SMT_FLAG -123 0x0CCD //RX_TDDRC_SMT_W -124 0x0275 //RX_TDDRC_DRC_GAIN -125 0x7C00 //RX_LAMBDA_PKA_FP -126 0x1964 //RX_TPKA_FP -127 0x0080 //RX_MIN_G_FP -128 0x2000 //RX_MAX_G_FP -129 0x000D //RX_SPK_VOL -130 0x0000 //RX_VOL_RESRV_0 -131 0x0000 //RX_MAXLEVEL_CNG -132 0x3000 //RX_BWE_UV_TH -133 0x3000 //RX_BWE_UV_TH2 -134 0x1800 //RX_BWE_UV_TH3 -135 0x1000 //RX_BWE_V_TH -136 0x04CD //RX_BWE_GAIN1_V_TH1 -137 0x0F33 //RX_BWE_GAIN1_V_TH2 -138 0x7333 //RX_BWE_UV_EQ -139 0x199A //RX_BWE_V_EQ -140 0x7333 //RX_BWE_TONE_TH -141 0x0004 //RX_BWE_UV_HOLD_T -142 0x6CCD //RX_BWE_GAIN2_ALPHA -143 0x799A //RX_BWE_GAIN3_ALPHA -144 0x001E //RX_BWE_CUTOFF -145 0x3000 //RX_BWE_GAINFILL -146 0x3200 //RX_BWE_MAXTH_TONE -147 0x2000 //RX_BWE_EQ_0 -148 0x2000 //RX_BWE_EQ_1 -149 0x2000 //RX_BWE_EQ_2 -150 0x2000 //RX_BWE_EQ_3 -151 0x2000 //RX_BWE_EQ_4 -152 0x2000 //RX_BWE_EQ_5 -153 0x2000 //RX_BWE_EQ_6 -154 0x0000 //RX_BWE_RESRV_0 -155 0x0000 //RX_BWE_RESRV_1 -156 0x0000 //RX_BWE_RESRV_2 -#VOL 0 -6 0x1000 //RX_TDDRC_ALPHA_UP_1 -7 0x1000 //RX_TDDRC_ALPHA_UP_2 -8 0x1000 //RX_TDDRC_ALPHA_UP_3 -9 0x1000 //RX_TDDRC_ALPHA_UP_4 -27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 -28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 -29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 -32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 -33 0x7000 //RX_TDDRC_LIMITER_THRD -34 0x0800 //RX_TDDRC_LIMITER_GAIN -112 0x0000 //RX_TDDRC_THRD_0 -113 0x0000 //RX_TDDRC_THRD_1 -114 0x1800 //RX_TDDRC_THRD_2 -115 0x1800 //RX_TDDRC_THRD_3 -116 0x3000 //RX_TDDRC_SLANT_0 -117 0x6E00 //RX_TDDRC_SLANT_1 -118 0x1000 //RX_TDDRC_ALPHA_UP_0 -119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 -120 0x0000 //RX_TDDRC_HMNC_FLAG -121 0x199A //RX_TDDRC_HMNC_GAIN -122 0x0001 //RX_TDDRC_SMT_FLAG -123 0x0CCD //RX_TDDRC_SMT_W -124 0x0275 //RX_TDDRC_DRC_GAIN -38 0x0020 //RX_FDEQ_SUBNUM -39 0x4848 //RX_FDEQ_GAIN_0 -40 0x4850 //RX_FDEQ_GAIN_1 -41 0x6478 //RX_FDEQ_GAIN_2 -42 0x8689 //RX_FDEQ_GAIN_3 -43 0x908F //RX_FDEQ_GAIN_4 -44 0x9495 //RX_FDEQ_GAIN_5 -45 0x989D //RX_FDEQ_GAIN_6 -46 0x9DA6 //RX_FDEQ_GAIN_7 -47 0xA895 //RX_FDEQ_GAIN_8 -48 0x8A8A //RX_FDEQ_GAIN_9 -49 0x8E78 //RX_FDEQ_GAIN_10 -50 0x7070 //RX_FDEQ_GAIN_11 -51 0x7680 //RX_FDEQ_GAIN_12 -52 0x787C //RX_FDEQ_GAIN_13 -53 0x8890 //RX_FDEQ_GAIN_14 -54 0x9CAC //RX_FDEQ_GAIN_15 -55 0x4848 //RX_FDEQ_GAIN_16 -56 0x4848 //RX_FDEQ_GAIN_17 -57 0x4848 //RX_FDEQ_GAIN_18 -58 0x4848 //RX_FDEQ_GAIN_19 -59 0x4848 //RX_FDEQ_GAIN_20 -60 0x4848 //RX_FDEQ_GAIN_21 -61 0x4848 //RX_FDEQ_GAIN_22 -62 0x4848 //RX_FDEQ_GAIN_23 -63 0x0202 //RX_FDEQ_BIN_0 -64 0x0202 //RX_FDEQ_BIN_1 -65 0x0302 //RX_FDEQ_BIN_2 -66 0x0304 //RX_FDEQ_BIN_3 -67 0x0405 //RX_FDEQ_BIN_4 -68 0x0506 //RX_FDEQ_BIN_5 -69 0x0708 //RX_FDEQ_BIN_6 -70 0x090A //RX_FDEQ_BIN_7 -71 0x0B0C //RX_FDEQ_BIN_8 -72 0x0D0E //RX_FDEQ_BIN_9 -73 0x1013 //RX_FDEQ_BIN_10 -74 0x1719 //RX_FDEQ_BIN_11 -75 0x1B1E //RX_FDEQ_BIN_12 -76 0x1E1E //RX_FDEQ_BIN_13 -77 0x1E28 //RX_FDEQ_BIN_14 -78 0x282C //RX_FDEQ_BIN_15 -79 0x0000 //RX_FDEQ_BIN_16 -80 0x0000 //RX_FDEQ_BIN_17 -81 0x0000 //RX_FDEQ_BIN_18 -82 0x0000 //RX_FDEQ_BIN_19 -83 0x0000 //RX_FDEQ_BIN_20 -84 0x0000 //RX_FDEQ_BIN_21 -85 0x0000 //RX_FDEQ_BIN_22 -86 0x0000 //RX_FDEQ_BIN_23 -87 0x4000 //RX_FDEQ_RESRV_0 -88 0x0320 //RX_FDEQ_RESRV_1 -89 0x0018 //RX_FDDRC_BAND_MARGIN_0 -90 0x0030 //RX_FDDRC_BAND_MARGIN_1 -91 0x0050 //RX_FDDRC_BAND_MARGIN_2 -92 0x0080 //RX_FDDRC_BAND_MARGIN_3 -93 0x0007 //RX_FDDRC_BLOCK_EXP -94 0x5000 //RX_FDDRC_THRD_2_0 -95 0x5000 //RX_FDDRC_THRD_2_1 -96 0x5000 //RX_FDDRC_THRD_2_2 -97 0x5000 //RX_FDDRC_THRD_2_3 -98 0x6400 //RX_FDDRC_THRD_3_0 -99 0x6400 //RX_FDDRC_THRD_3_1 -100 0x6400 //RX_FDDRC_THRD_3_2 -101 0x6400 //RX_FDDRC_THRD_3_3 -102 0x2000 //RX_FDDRC_SLANT_0_0 -103 0x2000 //RX_FDDRC_SLANT_0_1 -104 0x2000 //RX_FDDRC_SLANT_0_2 -105 0x2000 //RX_FDDRC_SLANT_0_3 -106 0x5333 //RX_FDDRC_SLANT_1_0 -107 0x5333 //RX_FDDRC_SLANT_1_1 -108 0x5333 //RX_FDDRC_SLANT_1_2 -109 0x5333 //RX_FDDRC_SLANT_1_3 -110 0x0000 //RX_FDDRC_RESRV_0 -129 0x000D //RX_SPK_VOL -130 0x0000 //RX_VOL_RESRV_0 -#VOL 1 -6 0x1000 //RX_TDDRC_ALPHA_UP_1 -7 0x1000 //RX_TDDRC_ALPHA_UP_2 -8 0x1000 //RX_TDDRC_ALPHA_UP_3 -9 0x1000 //RX_TDDRC_ALPHA_UP_4 -27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 -28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 -29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 -32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 -33 0x7000 //RX_TDDRC_LIMITER_THRD -34 0x0800 //RX_TDDRC_LIMITER_GAIN -112 0x0000 //RX_TDDRC_THRD_0 -113 0x0000 //RX_TDDRC_THRD_1 -114 0x1800 //RX_TDDRC_THRD_2 -115 0x1800 //RX_TDDRC_THRD_3 -116 0x3000 //RX_TDDRC_SLANT_0 -117 0x6E00 //RX_TDDRC_SLANT_1 -118 0x1000 //RX_TDDRC_ALPHA_UP_0 -119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 -120 0x0000 //RX_TDDRC_HMNC_FLAG -121 0x199A //RX_TDDRC_HMNC_GAIN -122 0x0001 //RX_TDDRC_SMT_FLAG -123 0x0CCD //RX_TDDRC_SMT_W -124 0x0275 //RX_TDDRC_DRC_GAIN -38 0x0020 //RX_FDEQ_SUBNUM -39 0x4848 //RX_FDEQ_GAIN_0 -40 0x4850 //RX_FDEQ_GAIN_1 -41 0x6478 //RX_FDEQ_GAIN_2 -42 0x8689 //RX_FDEQ_GAIN_3 -43 0x908F //RX_FDEQ_GAIN_4 -44 0x9495 //RX_FDEQ_GAIN_5 -45 0x989D //RX_FDEQ_GAIN_6 -46 0x9DA6 //RX_FDEQ_GAIN_7 -47 0xA895 //RX_FDEQ_GAIN_8 -48 0x8A8A //RX_FDEQ_GAIN_9 -49 0x8E78 //RX_FDEQ_GAIN_10 -50 0x7070 //RX_FDEQ_GAIN_11 -51 0x7680 //RX_FDEQ_GAIN_12 -52 0x787C //RX_FDEQ_GAIN_13 -53 0x8890 //RX_FDEQ_GAIN_14 -54 0x9CAC //RX_FDEQ_GAIN_15 -55 0x4848 //RX_FDEQ_GAIN_16 -56 0x4848 //RX_FDEQ_GAIN_17 -57 0x4848 //RX_FDEQ_GAIN_18 -58 0x4848 //RX_FDEQ_GAIN_19 -59 0x4848 //RX_FDEQ_GAIN_20 -60 0x4848 //RX_FDEQ_GAIN_21 -61 0x4848 //RX_FDEQ_GAIN_22 -62 0x4848 //RX_FDEQ_GAIN_23 -63 0x0202 //RX_FDEQ_BIN_0 -64 0x0202 //RX_FDEQ_BIN_1 -65 0x0302 //RX_FDEQ_BIN_2 -66 0x0304 //RX_FDEQ_BIN_3 -67 0x0405 //RX_FDEQ_BIN_4 -68 0x0506 //RX_FDEQ_BIN_5 -69 0x0708 //RX_FDEQ_BIN_6 -70 0x090A //RX_FDEQ_BIN_7 -71 0x0B0C //RX_FDEQ_BIN_8 -72 0x0D0E //RX_FDEQ_BIN_9 -73 0x1013 //RX_FDEQ_BIN_10 -74 0x1719 //RX_FDEQ_BIN_11 -75 0x1B1E //RX_FDEQ_BIN_12 -76 0x1E1E //RX_FDEQ_BIN_13 -77 0x1E28 //RX_FDEQ_BIN_14 -78 0x282C //RX_FDEQ_BIN_15 -79 0x0000 //RX_FDEQ_BIN_16 -80 0x0000 //RX_FDEQ_BIN_17 -81 0x0000 //RX_FDEQ_BIN_18 -82 0x0000 //RX_FDEQ_BIN_19 -83 0x0000 //RX_FDEQ_BIN_20 -84 0x0000 //RX_FDEQ_BIN_21 -85 0x0000 //RX_FDEQ_BIN_22 -86 0x0000 //RX_FDEQ_BIN_23 -87 0x4000 //RX_FDEQ_RESRV_0 -88 0x0320 //RX_FDEQ_RESRV_1 -89 0x0018 //RX_FDDRC_BAND_MARGIN_0 -90 0x0030 //RX_FDDRC_BAND_MARGIN_1 -91 0x0050 //RX_FDDRC_BAND_MARGIN_2 -92 0x0080 //RX_FDDRC_BAND_MARGIN_3 -93 0x0007 //RX_FDDRC_BLOCK_EXP -94 0x5000 //RX_FDDRC_THRD_2_0 -95 0x5000 //RX_FDDRC_THRD_2_1 -96 0x5000 //RX_FDDRC_THRD_2_2 -97 0x5000 //RX_FDDRC_THRD_2_3 -98 0x6400 //RX_FDDRC_THRD_3_0 -99 0x6400 //RX_FDDRC_THRD_3_1 -100 0x6400 //RX_FDDRC_THRD_3_2 -101 0x6400 //RX_FDDRC_THRD_3_3 -102 0x2000 //RX_FDDRC_SLANT_0_0 -103 0x2000 //RX_FDDRC_SLANT_0_1 -104 0x2000 //RX_FDDRC_SLANT_0_2 -105 0x2000 //RX_FDDRC_SLANT_0_3 -106 0x5333 //RX_FDDRC_SLANT_1_0 -107 0x5333 //RX_FDDRC_SLANT_1_1 -108 0x5333 //RX_FDDRC_SLANT_1_2 -109 0x5333 //RX_FDDRC_SLANT_1_3 -110 0x0000 //RX_FDDRC_RESRV_0 -129 0x0016 //RX_SPK_VOL -130 0x0000 //RX_VOL_RESRV_0 -#VOL 2 -6 0x1000 //RX_TDDRC_ALPHA_UP_1 -7 0x1000 //RX_TDDRC_ALPHA_UP_2 -8 0x1000 //RX_TDDRC_ALPHA_UP_3 -9 0x1000 //RX_TDDRC_ALPHA_UP_4 -27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 -28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 -29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 -32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 -33 0x7000 //RX_TDDRC_LIMITER_THRD -34 0x0800 //RX_TDDRC_LIMITER_GAIN -112 0x0000 //RX_TDDRC_THRD_0 -113 0x0000 //RX_TDDRC_THRD_1 -114 0x1800 //RX_TDDRC_THRD_2 -115 0x1800 //RX_TDDRC_THRD_3 -116 0x3000 //RX_TDDRC_SLANT_0 -117 0x6E00 //RX_TDDRC_SLANT_1 -118 0x1000 //RX_TDDRC_ALPHA_UP_0 -119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 -120 0x0000 //RX_TDDRC_HMNC_FLAG -121 0x199A //RX_TDDRC_HMNC_GAIN -122 0x0001 //RX_TDDRC_SMT_FLAG -123 0x0CCD //RX_TDDRC_SMT_W -124 0x0275 //RX_TDDRC_DRC_GAIN -38 0x0020 //RX_FDEQ_SUBNUM -39 0x4848 //RX_FDEQ_GAIN_0 -40 0x4850 //RX_FDEQ_GAIN_1 -41 0x6478 //RX_FDEQ_GAIN_2 -42 0x8689 //RX_FDEQ_GAIN_3 -43 0x908F //RX_FDEQ_GAIN_4 -44 0x9495 //RX_FDEQ_GAIN_5 -45 0x989D //RX_FDEQ_GAIN_6 -46 0x9DA6 //RX_FDEQ_GAIN_7 -47 0xA895 //RX_FDEQ_GAIN_8 -48 0x8A8A //RX_FDEQ_GAIN_9 -49 0x8E78 //RX_FDEQ_GAIN_10 -50 0x7070 //RX_FDEQ_GAIN_11 -51 0x7680 //RX_FDEQ_GAIN_12 -52 0x787C //RX_FDEQ_GAIN_13 -53 0x8890 //RX_FDEQ_GAIN_14 -54 0x9CAC //RX_FDEQ_GAIN_15 -55 0x4848 //RX_FDEQ_GAIN_16 -56 0x4848 //RX_FDEQ_GAIN_17 -57 0x4848 //RX_FDEQ_GAIN_18 -58 0x4848 //RX_FDEQ_GAIN_19 -59 0x4848 //RX_FDEQ_GAIN_20 -60 0x4848 //RX_FDEQ_GAIN_21 -61 0x4848 //RX_FDEQ_GAIN_22 -62 0x4848 //RX_FDEQ_GAIN_23 -63 0x0202 //RX_FDEQ_BIN_0 -64 0x0202 //RX_FDEQ_BIN_1 -65 0x0302 //RX_FDEQ_BIN_2 -66 0x0304 //RX_FDEQ_BIN_3 -67 0x0405 //RX_FDEQ_BIN_4 -68 0x0506 //RX_FDEQ_BIN_5 -69 0x0708 //RX_FDEQ_BIN_6 -70 0x090A //RX_FDEQ_BIN_7 -71 0x0B0C //RX_FDEQ_BIN_8 -72 0x0D0E //RX_FDEQ_BIN_9 -73 0x1013 //RX_FDEQ_BIN_10 -74 0x1719 //RX_FDEQ_BIN_11 -75 0x1B1E //RX_FDEQ_BIN_12 -76 0x1E1E //RX_FDEQ_BIN_13 -77 0x1E28 //RX_FDEQ_BIN_14 -78 0x282C //RX_FDEQ_BIN_15 -79 0x0000 //RX_FDEQ_BIN_16 -80 0x0000 //RX_FDEQ_BIN_17 -81 0x0000 //RX_FDEQ_BIN_18 -82 0x0000 //RX_FDEQ_BIN_19 -83 0x0000 //RX_FDEQ_BIN_20 -84 0x0000 //RX_FDEQ_BIN_21 -85 0x0000 //RX_FDEQ_BIN_22 -86 0x0000 //RX_FDEQ_BIN_23 -87 0x4000 //RX_FDEQ_RESRV_0 -88 0x0320 //RX_FDEQ_RESRV_1 -89 0x0018 //RX_FDDRC_BAND_MARGIN_0 -90 0x0030 //RX_FDDRC_BAND_MARGIN_1 -91 0x0050 //RX_FDDRC_BAND_MARGIN_2 -92 0x0080 //RX_FDDRC_BAND_MARGIN_3 -93 0x0007 //RX_FDDRC_BLOCK_EXP -94 0x5000 //RX_FDDRC_THRD_2_0 -95 0x5000 //RX_FDDRC_THRD_2_1 -96 0x5000 //RX_FDDRC_THRD_2_2 -97 0x5000 //RX_FDDRC_THRD_2_3 -98 0x6400 //RX_FDDRC_THRD_3_0 -99 0x6400 //RX_FDDRC_THRD_3_1 -100 0x6400 //RX_FDDRC_THRD_3_2 -101 0x6400 //RX_FDDRC_THRD_3_3 -102 0x2000 //RX_FDDRC_SLANT_0_0 -103 0x2000 //RX_FDDRC_SLANT_0_1 -104 0x2000 //RX_FDDRC_SLANT_0_2 -105 0x2000 //RX_FDDRC_SLANT_0_3 -106 0x5333 //RX_FDDRC_SLANT_1_0 -107 0x5333 //RX_FDDRC_SLANT_1_1 -108 0x5333 //RX_FDDRC_SLANT_1_2 -109 0x5333 //RX_FDDRC_SLANT_1_3 -110 0x0000 //RX_FDDRC_RESRV_0 -129 0x0026 //RX_SPK_VOL -130 0x0000 //RX_VOL_RESRV_0 -#VOL 3 -6 0x1000 //RX_TDDRC_ALPHA_UP_1 -7 0x1000 //RX_TDDRC_ALPHA_UP_2 -8 0x1000 //RX_TDDRC_ALPHA_UP_3 -9 0x1000 //RX_TDDRC_ALPHA_UP_4 -27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 -28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 -29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 -32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 -33 0x7000 //RX_TDDRC_LIMITER_THRD -34 0x0800 //RX_TDDRC_LIMITER_GAIN -112 0x0000 //RX_TDDRC_THRD_0 -113 0x0000 //RX_TDDRC_THRD_1 -114 0x1800 //RX_TDDRC_THRD_2 -115 0x1800 //RX_TDDRC_THRD_3 -116 0x3000 //RX_TDDRC_SLANT_0 -117 0x6E00 //RX_TDDRC_SLANT_1 -118 0x1000 //RX_TDDRC_ALPHA_UP_0 -119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 -120 0x0000 //RX_TDDRC_HMNC_FLAG -121 0x199A //RX_TDDRC_HMNC_GAIN -122 0x0001 //RX_TDDRC_SMT_FLAG -123 0x0CCD //RX_TDDRC_SMT_W -124 0x0275 //RX_TDDRC_DRC_GAIN -38 0x0020 //RX_FDEQ_SUBNUM -39 0x4848 //RX_FDEQ_GAIN_0 -40 0x4850 //RX_FDEQ_GAIN_1 -41 0x6478 //RX_FDEQ_GAIN_2 -42 0x8689 //RX_FDEQ_GAIN_3 -43 0x908F //RX_FDEQ_GAIN_4 -44 0x9495 //RX_FDEQ_GAIN_5 -45 0x989D //RX_FDEQ_GAIN_6 -46 0x9DA6 //RX_FDEQ_GAIN_7 -47 0xA895 //RX_FDEQ_GAIN_8 -48 0x8A8A //RX_FDEQ_GAIN_9 -49 0x8E78 //RX_FDEQ_GAIN_10 -50 0x7070 //RX_FDEQ_GAIN_11 -51 0x7680 //RX_FDEQ_GAIN_12 -52 0x787C //RX_FDEQ_GAIN_13 -53 0x8890 //RX_FDEQ_GAIN_14 -54 0x9CAC //RX_FDEQ_GAIN_15 -55 0x4848 //RX_FDEQ_GAIN_16 -56 0x4848 //RX_FDEQ_GAIN_17 -57 0x4848 //RX_FDEQ_GAIN_18 -58 0x4848 //RX_FDEQ_GAIN_19 -59 0x4848 //RX_FDEQ_GAIN_20 -60 0x4848 //RX_FDEQ_GAIN_21 -61 0x4848 //RX_FDEQ_GAIN_22 -62 0x4848 //RX_FDEQ_GAIN_23 -63 0x0202 //RX_FDEQ_BIN_0 -64 0x0202 //RX_FDEQ_BIN_1 -65 0x0302 //RX_FDEQ_BIN_2 -66 0x0304 //RX_FDEQ_BIN_3 -67 0x0405 //RX_FDEQ_BIN_4 -68 0x0506 //RX_FDEQ_BIN_5 -69 0x0708 //RX_FDEQ_BIN_6 -70 0x090A //RX_FDEQ_BIN_7 -71 0x0B0C //RX_FDEQ_BIN_8 -72 0x0D0E //RX_FDEQ_BIN_9 -73 0x1013 //RX_FDEQ_BIN_10 -74 0x1719 //RX_FDEQ_BIN_11 -75 0x1B1E //RX_FDEQ_BIN_12 -76 0x1E1E //RX_FDEQ_BIN_13 -77 0x1E28 //RX_FDEQ_BIN_14 -78 0x282C //RX_FDEQ_BIN_15 -79 0x0000 //RX_FDEQ_BIN_16 -80 0x0000 //RX_FDEQ_BIN_17 -81 0x0000 //RX_FDEQ_BIN_18 -82 0x0000 //RX_FDEQ_BIN_19 -83 0x0000 //RX_FDEQ_BIN_20 -84 0x0000 //RX_FDEQ_BIN_21 -85 0x0000 //RX_FDEQ_BIN_22 -86 0x0000 //RX_FDEQ_BIN_23 -87 0x4000 //RX_FDEQ_RESRV_0 -88 0x0320 //RX_FDEQ_RESRV_1 -89 0x0018 //RX_FDDRC_BAND_MARGIN_0 -90 0x0030 //RX_FDDRC_BAND_MARGIN_1 -91 0x0050 //RX_FDDRC_BAND_MARGIN_2 -92 0x0080 //RX_FDDRC_BAND_MARGIN_3 -93 0x0007 //RX_FDDRC_BLOCK_EXP -94 0x5000 //RX_FDDRC_THRD_2_0 -95 0x5000 //RX_FDDRC_THRD_2_1 -96 0x5000 //RX_FDDRC_THRD_2_2 -97 0x5000 //RX_FDDRC_THRD_2_3 -98 0x6400 //RX_FDDRC_THRD_3_0 -99 0x6400 //RX_FDDRC_THRD_3_1 -100 0x6400 //RX_FDDRC_THRD_3_2 -101 0x6400 //RX_FDDRC_THRD_3_3 -102 0x2000 //RX_FDDRC_SLANT_0_0 -103 0x2000 //RX_FDDRC_SLANT_0_1 -104 0x2000 //RX_FDDRC_SLANT_0_2 -105 0x2000 //RX_FDDRC_SLANT_0_3 -106 0x5333 //RX_FDDRC_SLANT_1_0 -107 0x5333 //RX_FDDRC_SLANT_1_1 -108 0x5333 //RX_FDDRC_SLANT_1_2 -109 0x5333 //RX_FDDRC_SLANT_1_3 -110 0x0000 //RX_FDDRC_RESRV_0 -129 0x003D //RX_SPK_VOL -130 0x0000 //RX_VOL_RESRV_0 -#VOL 4 -6 0x1000 //RX_TDDRC_ALPHA_UP_1 -7 0x1000 //RX_TDDRC_ALPHA_UP_2 -8 0x1000 //RX_TDDRC_ALPHA_UP_3 -9 0x1000 //RX_TDDRC_ALPHA_UP_4 -27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 -28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 -29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 -32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 -33 0x7000 //RX_TDDRC_LIMITER_THRD -34 0x0800 //RX_TDDRC_LIMITER_GAIN -112 0x0000 //RX_TDDRC_THRD_0 -113 0x0000 //RX_TDDRC_THRD_1 -114 0x1800 //RX_TDDRC_THRD_2 -115 0x1800 //RX_TDDRC_THRD_3 -116 0x3000 //RX_TDDRC_SLANT_0 -117 0x6E00 //RX_TDDRC_SLANT_1 -118 0x1000 //RX_TDDRC_ALPHA_UP_0 -119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 -120 0x0000 //RX_TDDRC_HMNC_FLAG -121 0x199A //RX_TDDRC_HMNC_GAIN -122 0x0001 //RX_TDDRC_SMT_FLAG -123 0x0CCD //RX_TDDRC_SMT_W -124 0x0275 //RX_TDDRC_DRC_GAIN -38 0x0020 //RX_FDEQ_SUBNUM -39 0x4848 //RX_FDEQ_GAIN_0 -40 0x4850 //RX_FDEQ_GAIN_1 -41 0x6478 //RX_FDEQ_GAIN_2 -42 0x8689 //RX_FDEQ_GAIN_3 -43 0x908F //RX_FDEQ_GAIN_4 -44 0x9495 //RX_FDEQ_GAIN_5 -45 0x989D //RX_FDEQ_GAIN_6 -46 0x9DA6 //RX_FDEQ_GAIN_7 -47 0xA895 //RX_FDEQ_GAIN_8 -48 0x8A8A //RX_FDEQ_GAIN_9 -49 0x8E78 //RX_FDEQ_GAIN_10 -50 0x7070 //RX_FDEQ_GAIN_11 -51 0x7680 //RX_FDEQ_GAIN_12 -52 0x787C //RX_FDEQ_GAIN_13 -53 0x8890 //RX_FDEQ_GAIN_14 -54 0x9CAC //RX_FDEQ_GAIN_15 -55 0x4848 //RX_FDEQ_GAIN_16 -56 0x4848 //RX_FDEQ_GAIN_17 -57 0x4848 //RX_FDEQ_GAIN_18 -58 0x4848 //RX_FDEQ_GAIN_19 -59 0x4848 //RX_FDEQ_GAIN_20 -60 0x4848 //RX_FDEQ_GAIN_21 -61 0x4848 //RX_FDEQ_GAIN_22 -62 0x4848 //RX_FDEQ_GAIN_23 -63 0x0202 //RX_FDEQ_BIN_0 -64 0x0202 //RX_FDEQ_BIN_1 -65 0x0302 //RX_FDEQ_BIN_2 -66 0x0304 //RX_FDEQ_BIN_3 -67 0x0405 //RX_FDEQ_BIN_4 -68 0x0506 //RX_FDEQ_BIN_5 -69 0x0708 //RX_FDEQ_BIN_6 -70 0x090A //RX_FDEQ_BIN_7 -71 0x0B0C //RX_FDEQ_BIN_8 -72 0x0D0E //RX_FDEQ_BIN_9 -73 0x1013 //RX_FDEQ_BIN_10 -74 0x1719 //RX_FDEQ_BIN_11 -75 0x1B1E //RX_FDEQ_BIN_12 -76 0x1E1E //RX_FDEQ_BIN_13 -77 0x1E28 //RX_FDEQ_BIN_14 -78 0x282C //RX_FDEQ_BIN_15 -79 0x0000 //RX_FDEQ_BIN_16 -80 0x0000 //RX_FDEQ_BIN_17 -81 0x0000 //RX_FDEQ_BIN_18 -82 0x0000 //RX_FDEQ_BIN_19 -83 0x0000 //RX_FDEQ_BIN_20 -84 0x0000 //RX_FDEQ_BIN_21 -85 0x0000 //RX_FDEQ_BIN_22 -86 0x0000 //RX_FDEQ_BIN_23 -87 0x4000 //RX_FDEQ_RESRV_0 -88 0x0320 //RX_FDEQ_RESRV_1 -89 0x0018 //RX_FDDRC_BAND_MARGIN_0 -90 0x0030 //RX_FDDRC_BAND_MARGIN_1 -91 0x0050 //RX_FDDRC_BAND_MARGIN_2 -92 0x0080 //RX_FDDRC_BAND_MARGIN_3 -93 0x0007 //RX_FDDRC_BLOCK_EXP -94 0x5000 //RX_FDDRC_THRD_2_0 -95 0x5000 //RX_FDDRC_THRD_2_1 -96 0x5000 //RX_FDDRC_THRD_2_2 -97 0x5000 //RX_FDDRC_THRD_2_3 -98 0x6400 //RX_FDDRC_THRD_3_0 -99 0x6400 //RX_FDDRC_THRD_3_1 -100 0x6400 //RX_FDDRC_THRD_3_2 -101 0x6400 //RX_FDDRC_THRD_3_3 -102 0x2000 //RX_FDDRC_SLANT_0_0 -103 0x2000 //RX_FDDRC_SLANT_0_1 -104 0x2000 //RX_FDDRC_SLANT_0_2 -105 0x2000 //RX_FDDRC_SLANT_0_3 -106 0x5333 //RX_FDDRC_SLANT_1_0 -107 0x5333 //RX_FDDRC_SLANT_1_1 -108 0x5333 //RX_FDDRC_SLANT_1_2 -109 0x5333 //RX_FDDRC_SLANT_1_3 -110 0x0000 //RX_FDDRC_RESRV_0 -129 0x0060 //RX_SPK_VOL -130 0x0000 //RX_VOL_RESRV_0 -#VOL 5 -6 0x1000 //RX_TDDRC_ALPHA_UP_1 -7 0x1000 //RX_TDDRC_ALPHA_UP_2 -8 0x1000 //RX_TDDRC_ALPHA_UP_3 -9 0x1000 //RX_TDDRC_ALPHA_UP_4 -27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 -28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 -29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 -32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 -33 0x7000 //RX_TDDRC_LIMITER_THRD -34 0x0800 //RX_TDDRC_LIMITER_GAIN -112 0x0000 //RX_TDDRC_THRD_0 -113 0x0000 //RX_TDDRC_THRD_1 -114 0x1800 //RX_TDDRC_THRD_2 -115 0x1800 //RX_TDDRC_THRD_3 -116 0x3000 //RX_TDDRC_SLANT_0 -117 0x6E00 //RX_TDDRC_SLANT_1 -118 0x1000 //RX_TDDRC_ALPHA_UP_0 -119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 -120 0x0000 //RX_TDDRC_HMNC_FLAG -121 0x199A //RX_TDDRC_HMNC_GAIN -122 0x0001 //RX_TDDRC_SMT_FLAG -123 0x0CCD //RX_TDDRC_SMT_W -124 0x0275 //RX_TDDRC_DRC_GAIN -38 0x0020 //RX_FDEQ_SUBNUM -39 0x4848 //RX_FDEQ_GAIN_0 -40 0x4850 //RX_FDEQ_GAIN_1 -41 0x6478 //RX_FDEQ_GAIN_2 -42 0x8689 //RX_FDEQ_GAIN_3 -43 0x908F //RX_FDEQ_GAIN_4 -44 0x9495 //RX_FDEQ_GAIN_5 -45 0x989D //RX_FDEQ_GAIN_6 -46 0x9DA6 //RX_FDEQ_GAIN_7 -47 0xA895 //RX_FDEQ_GAIN_8 -48 0x8A8A //RX_FDEQ_GAIN_9 -49 0x8E78 //RX_FDEQ_GAIN_10 -50 0x7070 //RX_FDEQ_GAIN_11 -51 0x7680 //RX_FDEQ_GAIN_12 -52 0x787C //RX_FDEQ_GAIN_13 -53 0x8890 //RX_FDEQ_GAIN_14 -54 0x9CAC //RX_FDEQ_GAIN_15 -55 0x4848 //RX_FDEQ_GAIN_16 -56 0x4848 //RX_FDEQ_GAIN_17 -57 0x4848 //RX_FDEQ_GAIN_18 -58 0x4848 //RX_FDEQ_GAIN_19 -59 0x4848 //RX_FDEQ_GAIN_20 -60 0x4848 //RX_FDEQ_GAIN_21 -61 0x4848 //RX_FDEQ_GAIN_22 -62 0x4848 //RX_FDEQ_GAIN_23 -63 0x0202 //RX_FDEQ_BIN_0 -64 0x0202 //RX_FDEQ_BIN_1 -65 0x0302 //RX_FDEQ_BIN_2 -66 0x0304 //RX_FDEQ_BIN_3 -67 0x0405 //RX_FDEQ_BIN_4 -68 0x0506 //RX_FDEQ_BIN_5 -69 0x0708 //RX_FDEQ_BIN_6 -70 0x090A //RX_FDEQ_BIN_7 -71 0x0B0C //RX_FDEQ_BIN_8 -72 0x0D0E //RX_FDEQ_BIN_9 -73 0x1013 //RX_FDEQ_BIN_10 -74 0x1719 //RX_FDEQ_BIN_11 -75 0x1B1E //RX_FDEQ_BIN_12 -76 0x1E1E //RX_FDEQ_BIN_13 -77 0x1E28 //RX_FDEQ_BIN_14 -78 0x282C //RX_FDEQ_BIN_15 -79 0x0000 //RX_FDEQ_BIN_16 -80 0x0000 //RX_FDEQ_BIN_17 -81 0x0000 //RX_FDEQ_BIN_18 -82 0x0000 //RX_FDEQ_BIN_19 -83 0x0000 //RX_FDEQ_BIN_20 -84 0x0000 //RX_FDEQ_BIN_21 -85 0x0000 //RX_FDEQ_BIN_22 -86 0x0000 //RX_FDEQ_BIN_23 -87 0x4000 //RX_FDEQ_RESRV_0 -88 0x0320 //RX_FDEQ_RESRV_1 -89 0x0018 //RX_FDDRC_BAND_MARGIN_0 -90 0x0030 //RX_FDDRC_BAND_MARGIN_1 -91 0x0050 //RX_FDDRC_BAND_MARGIN_2 -92 0x0080 //RX_FDDRC_BAND_MARGIN_3 -93 0x0007 //RX_FDDRC_BLOCK_EXP -94 0x5000 //RX_FDDRC_THRD_2_0 -95 0x5000 //RX_FDDRC_THRD_2_1 -96 0x5000 //RX_FDDRC_THRD_2_2 -97 0x5000 //RX_FDDRC_THRD_2_3 -98 0x6400 //RX_FDDRC_THRD_3_0 -99 0x6400 //RX_FDDRC_THRD_3_1 -100 0x6400 //RX_FDDRC_THRD_3_2 -101 0x6400 //RX_FDDRC_THRD_3_3 -102 0x2000 //RX_FDDRC_SLANT_0_0 -103 0x2000 //RX_FDDRC_SLANT_0_1 -104 0x2000 //RX_FDDRC_SLANT_0_2 -105 0x2000 //RX_FDDRC_SLANT_0_3 -106 0x5333 //RX_FDDRC_SLANT_1_0 -107 0x5333 //RX_FDDRC_SLANT_1_1 -108 0x5333 //RX_FDDRC_SLANT_1_2 -109 0x5333 //RX_FDDRC_SLANT_1_3 -110 0x0000 //RX_FDDRC_RESRV_0 -129 0x0099 //RX_SPK_VOL -130 0x0000 //RX_VOL_RESRV_0 -#VOL 6 -6 0x1000 //RX_TDDRC_ALPHA_UP_1 -7 0x1000 //RX_TDDRC_ALPHA_UP_2 -8 0x1000 //RX_TDDRC_ALPHA_UP_3 -9 0x1000 //RX_TDDRC_ALPHA_UP_4 -27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 -28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 -29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 -32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 -33 0x7000 //RX_TDDRC_LIMITER_THRD -34 0x0800 //RX_TDDRC_LIMITER_GAIN -112 0x0000 //RX_TDDRC_THRD_0 -113 0x0000 //RX_TDDRC_THRD_1 -114 0x1800 //RX_TDDRC_THRD_2 -115 0x1800 //RX_TDDRC_THRD_3 -116 0x3000 //RX_TDDRC_SLANT_0 -117 0x6E00 //RX_TDDRC_SLANT_1 -118 0x1000 //RX_TDDRC_ALPHA_UP_0 -119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 -120 0x0000 //RX_TDDRC_HMNC_FLAG -121 0x199A //RX_TDDRC_HMNC_GAIN -122 0x0001 //RX_TDDRC_SMT_FLAG -123 0x0CCD //RX_TDDRC_SMT_W -124 0x0275 //RX_TDDRC_DRC_GAIN -38 0x0020 //RX_FDEQ_SUBNUM -39 0x4848 //RX_FDEQ_GAIN_0 -40 0x4850 //RX_FDEQ_GAIN_1 -41 0x6478 //RX_FDEQ_GAIN_2 -42 0x8689 //RX_FDEQ_GAIN_3 -43 0x908F //RX_FDEQ_GAIN_4 -44 0x9495 //RX_FDEQ_GAIN_5 -45 0x989D //RX_FDEQ_GAIN_6 -46 0x9DA6 //RX_FDEQ_GAIN_7 -47 0xA895 //RX_FDEQ_GAIN_8 -48 0x8A8A //RX_FDEQ_GAIN_9 -49 0x8E78 //RX_FDEQ_GAIN_10 -50 0x7070 //RX_FDEQ_GAIN_11 -51 0x7680 //RX_FDEQ_GAIN_12 -52 0x787C //RX_FDEQ_GAIN_13 -53 0x8890 //RX_FDEQ_GAIN_14 -54 0x9CAC //RX_FDEQ_GAIN_15 -55 0x4848 //RX_FDEQ_GAIN_16 -56 0x4848 //RX_FDEQ_GAIN_17 -57 0x4848 //RX_FDEQ_GAIN_18 -58 0x4848 //RX_FDEQ_GAIN_19 -59 0x4848 //RX_FDEQ_GAIN_20 -60 0x4848 //RX_FDEQ_GAIN_21 -61 0x4848 //RX_FDEQ_GAIN_22 -62 0x4848 //RX_FDEQ_GAIN_23 -63 0x0202 //RX_FDEQ_BIN_0 -64 0x0202 //RX_FDEQ_BIN_1 -65 0x0302 //RX_FDEQ_BIN_2 -66 0x0304 //RX_FDEQ_BIN_3 -67 0x0405 //RX_FDEQ_BIN_4 -68 0x0506 //RX_FDEQ_BIN_5 -69 0x0708 //RX_FDEQ_BIN_6 -70 0x090A //RX_FDEQ_BIN_7 -71 0x0B0C //RX_FDEQ_BIN_8 -72 0x0D0E //RX_FDEQ_BIN_9 -73 0x1013 //RX_FDEQ_BIN_10 -74 0x1719 //RX_FDEQ_BIN_11 -75 0x1B1E //RX_FDEQ_BIN_12 -76 0x1E1E //RX_FDEQ_BIN_13 -77 0x1E28 //RX_FDEQ_BIN_14 -78 0x282C //RX_FDEQ_BIN_15 -79 0x0000 //RX_FDEQ_BIN_16 -80 0x0000 //RX_FDEQ_BIN_17 -81 0x0000 //RX_FDEQ_BIN_18 -82 0x0000 //RX_FDEQ_BIN_19 -83 0x0000 //RX_FDEQ_BIN_20 -84 0x0000 //RX_FDEQ_BIN_21 -85 0x0000 //RX_FDEQ_BIN_22 -86 0x0000 //RX_FDEQ_BIN_23 -87 0x4000 //RX_FDEQ_RESRV_0 -88 0x0320 //RX_FDEQ_RESRV_1 -89 0x0018 //RX_FDDRC_BAND_MARGIN_0 -90 0x0030 //RX_FDDRC_BAND_MARGIN_1 -91 0x0050 //RX_FDDRC_BAND_MARGIN_2 -92 0x0080 //RX_FDDRC_BAND_MARGIN_3 -93 0x0007 //RX_FDDRC_BLOCK_EXP -94 0x5000 //RX_FDDRC_THRD_2_0 -95 0x5000 //RX_FDDRC_THRD_2_1 -96 0x5000 //RX_FDDRC_THRD_2_2 -97 0x5000 //RX_FDDRC_THRD_2_3 -98 0x6400 //RX_FDDRC_THRD_3_0 -99 0x6400 //RX_FDDRC_THRD_3_1 -100 0x6400 //RX_FDDRC_THRD_3_2 -101 0x6400 //RX_FDDRC_THRD_3_3 -102 0x2000 //RX_FDDRC_SLANT_0_0 -103 0x2000 //RX_FDDRC_SLANT_0_1 -104 0x2000 //RX_FDDRC_SLANT_0_2 -105 0x2000 //RX_FDDRC_SLANT_0_3 -106 0x5333 //RX_FDDRC_SLANT_1_0 -107 0x5333 //RX_FDDRC_SLANT_1_1 -108 0x5333 //RX_FDDRC_SLANT_1_2 -109 0x5333 //RX_FDDRC_SLANT_1_3 -110 0x0000 //RX_FDDRC_RESRV_0 -129 0x0100 //RX_SPK_VOL -130 0x0000 //RX_VOL_RESRV_0 - -#CASE_NAME HANDSET-HANDSET_HAC-TMOBILE_US-NB -#PARAM_TYPE TX+RX -#TOTAL_CUSTOM_STEP 7 -#TX -0 0x0000 //TX_OPERATION_MODE_0 -1 0x0000 //TX_OPERATION_MODE_1 -2 0x0036 //TX_PATCH_REG +2 0x0076 //TX_PATCH_REG 3 0x6F7E //TX_SENDFUNC_MODE_0 4 0x0001 //TX_SENDFUNC_MODE_1 5 0x0002 //TX_NUM_MIC @@ -26323,7 +18719,7 @@ 18 0x0000 //TX_SYS_RESRV_2 19 0x0000 //TX_SYS_RESRV_3 20 0x0000 //TX_DIST2REF0 -21 0x009D //TX_DIST2REF1 +21 0x00A3 //TX_DIST2REF1 22 0x0000 //TX_DIST2REF_02 23 0x0000 //TX_DIST2REF_03 24 0x0000 //TX_DIST2REF_04 @@ -26553,19 +18949,19 @@ 248 0xF800 //TX_THR_SN_EST_6 249 0xF700 //TX_THR_SN_EST_7 250 0x0000 //TX_DELTA_THR_SN_EST_0 -251 0x01A0 //TX_DELTA_THR_SN_EST_1 -252 0x0100 //TX_DELTA_THR_SN_EST_2 -253 0x0200 //TX_DELTA_THR_SN_EST_3 -254 0x01A0 //TX_DELTA_THR_SN_EST_4 -255 0x0100 //TX_DELTA_THR_SN_EST_5 -256 0x0000 //TX_DELTA_THR_SN_EST_6 +251 0x0100 //TX_DELTA_THR_SN_EST_1 +252 0x0200 //TX_DELTA_THR_SN_EST_2 +253 0x01A0 //TX_DELTA_THR_SN_EST_3 +254 0x0100 //TX_DELTA_THR_SN_EST_4 +255 0x0000 //TX_DELTA_THR_SN_EST_5 +256 0x01A0 //TX_DELTA_THR_SN_EST_6 257 0x0200 //TX_DELTA_THR_SN_EST_7 258 0x4000 //TX_LAMBDA_NN_EST_0 -259 0x4000 //TX_LAMBDA_NN_EST_1 -260 0x3000 //TX_LAMBDA_NN_EST_2 -261 0x4000 //TX_LAMBDA_NN_EST_3 +259 0x3000 //TX_LAMBDA_NN_EST_1 +260 0x4000 //TX_LAMBDA_NN_EST_2 +261 0x3000 //TX_LAMBDA_NN_EST_3 262 0x3000 //TX_LAMBDA_NN_EST_4 -263 0x3000 //TX_LAMBDA_NN_EST_5 +263 0x4000 //TX_LAMBDA_NN_EST_5 264 0x4000 //TX_LAMBDA_NN_EST_6 265 0x4000 //TX_LAMBDA_NN_EST_7 266 0x0400 //TX_N_SN_EST @@ -26584,20 +18980,20 @@ 279 0x4000 //TX_B_POST_FLT_0 280 0x4000 //TX_B_POST_FLT_1 281 0x0014 //TX_NS_LVL_CTRL_0 -282 0x001B //TX_NS_LVL_CTRL_1 -283 0x0019 //TX_NS_LVL_CTRL_2 +282 0x0019 //TX_NS_LVL_CTRL_1 +283 0x0017 //TX_NS_LVL_CTRL_2 284 0x0017 //TX_NS_LVL_CTRL_3 -285 0x0017 //TX_NS_LVL_CTRL_4 -286 0x0019 //TX_NS_LVL_CTRL_5 -287 0x0014 //TX_NS_LVL_CTRL_6 +285 0x0019 //TX_NS_LVL_CTRL_4 +286 0x0014 //TX_NS_LVL_CTRL_5 +287 0x001B //TX_NS_LVL_CTRL_6 288 0x0010 //TX_NS_LVL_CTRL_7 289 0x0010 //TX_MIN_GAIN_S_0 290 0x000C //TX_MIN_GAIN_S_1 -291 0x000C //TX_MIN_GAIN_S_2 +291 0x0010 //TX_MIN_GAIN_S_2 292 0x0010 //TX_MIN_GAIN_S_3 -293 0x0010 //TX_MIN_GAIN_S_4 -294 0x000C //TX_MIN_GAIN_S_5 -295 0x0014 //TX_MIN_GAIN_S_6 +293 0x000C //TX_MIN_GAIN_S_4 +294 0x0014 //TX_MIN_GAIN_S_5 +295 0x000C //TX_MIN_GAIN_S_6 296 0x0014 //TX_MIN_GAIN_S_7 297 0x5000 //TX_NMOS_SUP 298 0x0000 //TX_NS_MAX_PRI_SNR_TH @@ -26607,8 +19003,8 @@ 302 0x4000 //TX_SNRI_SUP_2 303 0x4000 //TX_SNRI_SUP_3 304 0x4000 //TX_SNRI_SUP_4 -305 0x4000 //TX_SNRI_SUP_5 -306 0x7FFF //TX_SNRI_SUP_6 +305 0x7FFF //TX_SNRI_SUP_5 +306 0x4000 //TX_SNRI_SUP_6 307 0x3000 //TX_SNRI_SUP_7 308 0x3000 //TX_THR_LFNS 309 0x001A //TX_G_LFNS @@ -26617,36 +19013,36 @@ 312 0x7FFF //TX_A_POST_FILT_0 313 0x2000 //TX_A_POST_FILT_1 314 0x2000 //TX_A_POST_FILT_S_0 -315 0x7000 //TX_A_POST_FILT_S_1 -316 0x6000 //TX_A_POST_FILT_S_2 -317 0x5000 //TX_A_POST_FILT_S_3 -318 0x2000 //TX_A_POST_FILT_S_4 -319 0x6000 //TX_A_POST_FILT_S_5 -320 0x2000 //TX_A_POST_FILT_S_6 +315 0x6000 //TX_A_POST_FILT_S_1 +316 0x5000 //TX_A_POST_FILT_S_2 +317 0x2000 //TX_A_POST_FILT_S_3 +318 0x6000 //TX_A_POST_FILT_S_4 +319 0x2000 //TX_A_POST_FILT_S_5 +320 0x7000 //TX_A_POST_FILT_S_6 321 0x7000 //TX_A_POST_FILT_S_7 322 0x4000 //TX_B_POST_FILT_0 323 0x4000 //TX_B_POST_FILT_1 -324 0x7FFF //TX_B_POST_FILT_2 -325 0x5000 //TX_B_POST_FILT_3 -326 0x7FFF //TX_B_POST_FILT_4 -327 0x7FFF //TX_B_POST_FILT_5 +324 0x5000 //TX_B_POST_FILT_2 +325 0x4000 //TX_B_POST_FILT_3 +326 0x4000 //TX_B_POST_FILT_4 +327 0x4000 //TX_B_POST_FILT_5 328 0x4000 //TX_B_POST_FILT_6 329 0x2000 //TX_B_POST_FILT_7 330 0x7FFF //TX_B_LESSCUT_RTO_S_0 -331 0x7FFF //TX_B_LESSCUT_RTO_S_1 -332 0x7FFF //TX_B_LESSCUT_RTO_S_2 -333 0x7FFF //TX_B_LESSCUT_RTO_S_3 -334 0x7FFF //TX_B_LESSCUT_RTO_S_4 -335 0x7FFF //TX_B_LESSCUT_RTO_S_5 -336 0x7FFF //TX_B_LESSCUT_RTO_S_6 -337 0x7FFF //TX_B_LESSCUT_RTO_S_7 +331 0x1000 //TX_B_LESSCUT_RTO_S_1 +332 0x1000 //TX_B_LESSCUT_RTO_S_2 +333 0x1000 //TX_B_LESSCUT_RTO_S_3 +334 0x1000 //TX_B_LESSCUT_RTO_S_4 +335 0x1000 //TX_B_LESSCUT_RTO_S_5 +336 0x1000 //TX_B_LESSCUT_RTO_S_6 +337 0x1000 //TX_B_LESSCUT_RTO_S_7 338 0x7E14 //TX_LAMBDA_PFILT 339 0x7C29 //TX_LAMBDA_PFILT_S_0 -340 0x7C29 //TX_LAMBDA_PFILT_S_1 -341 0x7200 //TX_LAMBDA_PFILT_S_2 -342 0x7900 //TX_LAMBDA_PFILT_S_3 -343 0x7400 //TX_LAMBDA_PFILT_S_4 -344 0x7200 //TX_LAMBDA_PFILT_S_5 +340 0x7200 //TX_LAMBDA_PFILT_S_1 +341 0x7900 //TX_LAMBDA_PFILT_S_2 +342 0x7400 //TX_LAMBDA_PFILT_S_3 +343 0x7200 //TX_LAMBDA_PFILT_S_4 +344 0x7C29 //TX_LAMBDA_PFILT_S_5 345 0x7C29 //TX_LAMBDA_PFILT_S_6 346 0x7C29 //TX_LAMBDA_PFILT_S_7 347 0x0200 //TX_K_PEPPER @@ -26682,10 +19078,10 @@ 377 0x0000 //TX_NOISE_TH_5_4 378 0x07D0 //TX_NOISE_TH_6 379 0x0004 //TX_MINENOISE_TH -380 0x4000 //TX_MINENOISE_MIC0_TH_MTS -381 0xFFEE //TX_MINENOISE_MIC0_TH_EXP -382 0x6000 //TX_MINENOISE_MIC0_S_TH_MTS -383 0xFFF3 //TX_MINENOISE_MIC0_S_TH_EXP +380 0xD508 //TX_MORENS_TFMASK_TH +381 0x0001 //TX_DRC_QUIET_FLOOR +382 0x6D60 //TX_RATIODTL_CUT_TH +383 0x0DAC //TX_DT_CUT_K1 384 0x00A5 //TX_OUT_ENER_S_TH_CLEAN 385 0x00A5 //TX_OUT_ENER_S_TH_LESSCLEAN 386 0x00A5 //TX_OUT_ENER_S_TH_NOISY @@ -26693,15 +19089,15 @@ 388 0x00CE //TX_OUT_ENER_TH_SPEECH 389 0x2000 //TX_SN_NPB_GAIN 390 0x0000 //TX_NN_NPB_GAIN -391 0x0000 //TX_CSX_ALPHA_0 -392 0x0000 //TX_CSX_ALPHA_1 -393 0x0000 //TX_CSX_ALPHA_2 -394 0x0000 //TX_CSX_ALPHA_3 -395 0x0800 //TX_MU_ARSP_EST -396 0x00C8 //TX_P_OUTBEAM_MIN_TH +391 0x3000 //TX_POST_MASK_SUP_HSNE +392 0x07D0 //TX_TAIL_DET_TH +393 0x4000 //TX_B_LESSCUT_RTO_WTA +394 0x0000 //TX_MEL_G_R +395 0x0080 //TX_SUPHIGH_TH +396 0x0000 //TX_MASK_G_R 397 0x0002 //TX_EXTRA_NS_L -398 0x0800 //TX_EXTRA_NS_A -399 0x0005 //TX_VR_NOISE_FLOOR_TH +398 0x1800 //TX_C_POST_FLT_MASK +399 0x7FFF //TX_A_POST_FLT_WNS 400 0x0148 //TX_MIN_G_LOW300HZ 401 0x0001 //TX_MAXLEVEL_CNG 402 0x00B4 //TX_STN_NOISE_TH @@ -26816,16 +19212,16 @@ 511 0x6666 //TX_MIC_TO_BFGAIN 512 0x0000 //TX_MICTOBFGAIN0 513 0x0000 //TX_FASTMUE_TH -514 0x0000 //TX_DERVB_LEN_0 -515 0x0000 //TX_DERVB_LEN_1 -516 0x0000 //TX_RHO_DERVB -517 0x0000 //TX_MIC_INDX_DERVB -518 0x0000 //TX_MU_DERVB -519 0x0000 //TX_DR_RESRV_0 -520 0x0000 //TX_DR_RESRV_1 -521 0x0000 //TX_DR_RESRV_2 -522 0x0000 //TX_DR_RESRV_3 -523 0x0000 //TX_DR_RESRV_4 +514 0x3000 //TX_DEREVERB_LF_MU +515 0x34CD //TX_DEREVERB_HF_MU +516 0x0007 //TX_DEREVERB_DELAY +517 0x0004 //TX_DEREVERB_COEF_LEN +518 0x0003 //TX_DEREVERB_DNR +519 0x0000 //TX_DEREVERB_ALPHA +520 0x0000 //TX_DEREVERB_BETA +521 0x3A98 //TX_GSC_RTOL_TH +522 0x3A98 //TX_GSC_RTOH_TH +523 0x7E2C //TX_WIDE2_MEANHTH 524 0x0000 //TX_DR_RESRV_5 525 0x0000 //TX_DR_RESRV_6 526 0x0000 //TX_DR_RESRV_7 @@ -26874,10 +19270,10 @@ 569 0x4F4E //TX_FDEQ_GAIN_2 570 0x474A //TX_FDEQ_GAIN_3 571 0x473F //TX_FDEQ_GAIN_4 -572 0x403B //TX_FDEQ_GAIN_5 -573 0x3933 //TX_FDEQ_GAIN_6 -574 0x302B //TX_FDEQ_GAIN_7 -575 0x2220 //TX_FDEQ_GAIN_8 +572 0x4240 //TX_FDEQ_GAIN_5 +573 0x4040 //TX_FDEQ_GAIN_6 +574 0x3630 //TX_FDEQ_GAIN_7 +575 0x2726 //TX_FDEQ_GAIN_8 576 0x383C //TX_FDEQ_GAIN_9 577 0x4848 //TX_FDEQ_GAIN_10 578 0x4848 //TX_FDEQ_GAIN_11 @@ -26902,7 +19298,7 @@ 597 0x0808 //TX_FDEQ_BIN_6 598 0x050E //TX_FDEQ_BIN_7 599 0x0B0C //TX_FDEQ_BIN_8 -600 0x0F0F //TX_FDEQ_BIN_9 +600 0x0F09 //TX_FDEQ_BIN_9 601 0x0000 //TX_FDEQ_BIN_10 602 0x0000 //TX_FDEQ_BIN_11 603 0x0000 //TX_FDEQ_BIN_12 @@ -26926,9 +19322,9 @@ 621 0x4848 //TX_PREEQ_GAIN_MIC0_4 622 0x4848 //TX_PREEQ_GAIN_MIC0_5 623 0x4848 //TX_PREEQ_GAIN_MIC0_6 -624 0x4846 //TX_PREEQ_GAIN_MIC0_7 -625 0x4544 //TX_PREEQ_GAIN_MIC0_8 -626 0x4241 //TX_PREEQ_GAIN_MIC0_9 +624 0x4848 //TX_PREEQ_GAIN_MIC0_7 +625 0x4848 //TX_PREEQ_GAIN_MIC0_8 +626 0x4848 //TX_PREEQ_GAIN_MIC0_9 627 0x4848 //TX_PREEQ_GAIN_MIC0_10 628 0x4848 //TX_PREEQ_GAIN_MIC0_11 629 0x4848 //TX_PREEQ_GAIN_MIC0_12 @@ -26943,16 +19339,16 @@ 638 0x4848 //TX_PREEQ_GAIN_MIC0_21 639 0x4848 //TX_PREEQ_GAIN_MIC0_22 640 0x4848 //TX_PREEQ_GAIN_MIC0_23 -641 0x0202 //TX_PREEQ_BIN_MIC0_0 -642 0x0203 //TX_PREEQ_BIN_MIC0_1 -643 0x0303 //TX_PREEQ_BIN_MIC0_2 -644 0x0304 //TX_PREEQ_BIN_MIC0_3 -645 0x0405 //TX_PREEQ_BIN_MIC0_4 -646 0x0506 //TX_PREEQ_BIN_MIC0_5 -647 0x0708 //TX_PREEQ_BIN_MIC0_6 -648 0x090A //TX_PREEQ_BIN_MIC0_7 -649 0x0B0C //TX_PREEQ_BIN_MIC0_8 -650 0x0D0E //TX_PREEQ_BIN_MIC0_9 +641 0x251A //TX_PREEQ_BIN_MIC0_0 +642 0x0F0F //TX_PREEQ_BIN_MIC0_1 +643 0x0C08 //TX_PREEQ_BIN_MIC0_2 +644 0x0700 //TX_PREEQ_BIN_MIC0_3 +645 0x0000 //TX_PREEQ_BIN_MIC0_4 +646 0x0000 //TX_PREEQ_BIN_MIC0_5 +647 0x0000 //TX_PREEQ_BIN_MIC0_6 +648 0x0000 //TX_PREEQ_BIN_MIC0_7 +649 0x0000 //TX_PREEQ_BIN_MIC0_8 +650 0x0000 //TX_PREEQ_BIN_MIC0_9 651 0x0000 //TX_PREEQ_BIN_MIC0_10 652 0x0000 //TX_PREEQ_BIN_MIC0_11 653 0x0000 //TX_PREEQ_BIN_MIC0_12 @@ -26967,17 +19363,17 @@ 662 0x0000 //TX_PREEQ_BIN_MIC0_21 663 0x0000 //TX_PREEQ_BIN_MIC0_22 664 0x0000 //TX_PREEQ_BIN_MIC0_23 -665 0x0014 //TX_PREEQ_SUBNUM_MIC1 +665 0x0030 //TX_PREEQ_SUBNUM_MIC1 666 0x4848 //TX_PREEQ_GAIN_MIC1_0 667 0x4848 //TX_PREEQ_GAIN_MIC1_1 668 0x4848 //TX_PREEQ_GAIN_MIC1_2 669 0x4848 //TX_PREEQ_GAIN_MIC1_3 670 0x4848 //TX_PREEQ_GAIN_MIC1_4 671 0x4848 //TX_PREEQ_GAIN_MIC1_5 -672 0x4848 //TX_PREEQ_GAIN_MIC1_6 -673 0x4848 //TX_PREEQ_GAIN_MIC1_7 -674 0x4A4C //TX_PREEQ_GAIN_MIC1_8 -675 0x4E50 //TX_PREEQ_GAIN_MIC1_9 +672 0x494A //TX_PREEQ_GAIN_MIC1_6 +673 0x4B4C //TX_PREEQ_GAIN_MIC1_7 +674 0x4D4E //TX_PREEQ_GAIN_MIC1_8 +675 0x4F51 //TX_PREEQ_GAIN_MIC1_9 676 0x4848 //TX_PREEQ_GAIN_MIC1_10 677 0x4848 //TX_PREEQ_GAIN_MIC1_11 678 0x4848 //TX_PREEQ_GAIN_MIC1_12 @@ -26992,7 +19388,7 @@ 687 0x4848 //TX_PREEQ_GAIN_MIC1_21 688 0x4848 //TX_PREEQ_GAIN_MIC1_22 689 0x4848 //TX_PREEQ_GAIN_MIC1_23 -690 0x0203 //TX_PREEQ_BIN_MIC1_0 +690 0x0202 //TX_PREEQ_BIN_MIC1_0 691 0x0203 //TX_PREEQ_BIN_MIC1_1 692 0x0303 //TX_PREEQ_BIN_MIC1_2 693 0x0304 //TX_PREEQ_BIN_MIC1_3 @@ -27077,8 +19473,8 @@ 772 0x0044 //TX_MIC_PWR_BIAS_3 773 0x0000 //TX_GAIN_LIMIT_0 774 0x0000 //TX_GAIN_LIMIT_1 -775 0x0006 //TX_GAIN_LIMIT_2 -776 0x0006 //TX_GAIN_LIMIT_3 +775 0x0007 //TX_GAIN_LIMIT_2 +776 0x0007 //TX_GAIN_LIMIT_3 777 0x7F5B //TX_BVE_NOVAD0_ALPHADOWN 778 0x7FDE //TX_BVE_VAD0_ALPHAUP 779 0x7F3A //TX_BVE_VAD0_ALPHADOWN @@ -27199,6 +19595,71 @@ 894 0xC000 //TX_FASTNS_SSA_THHFL 895 0xCCCC //TX_FASTNS_SSA_THLFH 896 0xD999 //TX_FASTNS_SSA_THHFH +897 0x2339 //TX_SENDFUNC_REG_MICMUTE +898 0x0021 //TX_SENDFUNC_REG_MICMUTE1 +899 0x02BC //TX_MICMUTE_RATIO_THR +900 0x0140 //TX_MICMUTE_AMP_THR +901 0x0004 //TX_MICMUTE_HPF_IND +902 0x00C0 //TX_MICMUTE_LOG_EYR_TH +903 0x0008 //TX_MICMUTE_CVG_TIME +904 0x0008 //TX_MICMUTE_RELEASE_TIME +905 0x01FE //TX_MIC_VOLUME_MIC0MUTE +906 0x0020 //TX_MICMUTE_EPD_OFFSET_0 +907 0x001E //TX_MICMUTE_FRQ_AEC_L +908 0x7999 //TX_MICMUTE_EAD_THR +909 0x7FFF //TX_MICMUTE_LAMBDA_CB_NLE +910 0x7FFF //TX_MICMUTE_LAMBDA_RE_EST +911 0x4000 //TX_DTD_THR1_MICMUTE_0 +912 0x7000 //TX_DTD_THR1_MICMUTE_1 +913 0x7FFF //TX_DTD_THR1_MICMUTE_2 +914 0x7FFF //TX_DTD_THR1_MICMUTE_3 +915 0x6CCC //TX_DTD_THR2_MICMUTE_0 +916 0x0400 //TX_MICMUTE_MIN_EQ_RE_EST_0 +917 0x0400 //TX_MICMUTE_MIN_EQ_RE_EST_1 +918 0x1000 //TX_MICMUTE_MIN_EQ_RE_EST_2 +919 0x7FFF //TX_MICMUTE_MIN_EQ_RE_EST_3 +920 0x7FFF //TX_MICMUTE_MIN_EQ_RE_EST_4 +921 0x4000 //TX_MICMUTE_C_POST_FLT +922 0x03E8 //TX_MICMUTE_DT_CUT_K +923 0x0001 //TX_MICMUTE_DT_CUT_THR +924 0x03E8 //TX_MICMUTE_DT_CUT_K2 +925 0x0001 //TX_MICMUTE_DT_CUT_THR2 +926 0x0064 //TX_MICMUTE_DT2_HOLD_N +927 0x1000 //TX_MICMUTE_RATIODTH_THCUT +928 0x1000 //TX_MICMUTE_B_POST_FLT_ECHOL +929 0x7FFF //TX_MICMUTE_B_POST_FLT_ECHOH +930 0x0400 //TX_MICMUTE_C_POST_FLT_MASK +931 0x7999 //TX_MICMUTE_RATIODTL_CUT_TH +932 0x0258 //TX_MICMUTE_DT_CUT_K1 +933 0x0800 //TX_MICMUTE_N2_SN_EST +934 0xFC00 //TX_MICMUTE_THR_SN_EST_0 +935 0x001C //TX_MICMUTE_MIN_G_CTRL_0 +936 0x6000 //TX_MICMUTE_A_POST_FILT_S_0 +937 0x7000 //TX_MICMUTE_B_POST_FILT_0 +938 0x2710 //TX_MIC1RUB_AMP_THR +939 0x0010 //TX_MIC1MUTE_RATIO_THR +940 0x0450 //TX_MIC1MUTE_AMP_THR +941 0x0008 //TX_MIC1MUTE_CVG_TIME +942 0x0008 //TX_MIC1MUTE_RELEASE_TIME +943 0x0000 //TX_AMS_RESRV_01 +944 0x0000 //TX_AMS_RESRV_02 +945 0x0000 //TX_AMS_RESRV_03 +946 0x0000 //TX_AMS_RESRV_04 +947 0x0000 //TX_AMS_RESRV_05 +948 0x0000 //TX_AMS_RESRV_06 +949 0x0000 //TX_AMS_RESRV_07 +950 0x0000 //TX_AMS_RESRV_08 +951 0x0000 //TX_AMS_RESRV_09 +952 0x0000 //TX_AMS_RESRV_10 +953 0x0000 //TX_AMS_RESRV_11 +954 0x0000 //TX_AMS_RESRV_12 +955 0x0000 //TX_AMS_RESRV_13 +956 0x0000 //TX_AMS_RESRV_14 +957 0x0000 //TX_AMS_RESRV_15 +958 0x0000 //TX_AMS_RESRV_16 +959 0x0000 //TX_AMS_RESRV_17 +960 0x0000 //TX_AMS_RESRV_18 +961 0x0000 //TX_AMS_RESRV_19 #RX 0 0x000C //RX_RECVFUNC_MODE_0 1 0x0000 //RX_RECVFUNC_MODE_1 @@ -28050,10 +20511,862 @@ 110 0x0000 //RX_FDDRC_RESRV_0 129 0x0100 //RX_SPK_VOL 130 0x0000 //RX_VOL_RESRV_0 +#RX 2 +157 0x000C //RX_RECVFUNC_MODE_0 +158 0x0000 //RX_RECVFUNC_MODE_1 +159 0x0000 //RX_SAMPLINGFREQ_SIG +160 0x0000 //RX_SAMPLINGFREQ_PROC +161 0x000A //RX_FRAME_SZ +162 0x0000 //RX_DELAY_OPT +163 0x1000 //RX_TDDRC_ALPHA_UP_1 +164 0x1000 //RX_TDDRC_ALPHA_UP_2 +165 0x1000 //RX_TDDRC_ALPHA_UP_3 +166 0x1000 //RX_TDDRC_ALPHA_UP_4 +167 0x0800 //RX_PGA +168 0x7FFF //RX_A_HP +169 0x4000 //RX_B_PE +170 0x7800 //RX_THR_PITCH_DET_0 +171 0x7000 //RX_THR_PITCH_DET_1 +172 0x6000 //RX_THR_PITCH_DET_2 +173 0x0008 //RX_PITCH_BFR_LEN +174 0x0003 //RX_SBD_PITCH_DET +175 0x0100 //RX_PP_RESRV_0 +176 0x0020 //RX_PP_RESRV_1 +177 0x0400 //RX_N_SN_EST +178 0x000C //RX_N2_SN_EST +179 0x0014 //RX_NS_LVL_CTRL +180 0xF800 //RX_THR_SN_EST +181 0x7E00 //RX_LAMBDA_PFILT +182 0x000A //RX_FENS_RESRV_0 +183 0x0190 //RX_FENS_RESRV_1 +184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +187 0x0002 //RX_EXTRA_NS_L +188 0x0800 //RX_EXTRA_NS_A +189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +190 0x7000 //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +192 0x199A //RX_A_POST_FLT +193 0x0000 //RX_LMT_THRD +194 0x4000 //RX_LMT_ALPHA +195 0x0030 //RX_FDEQ_SUBNUM +196 0x4848 //RX_FDEQ_GAIN_0 +197 0x4848 //RX_FDEQ_GAIN_1 +198 0x4844 //RX_FDEQ_GAIN_2 +199 0x4A4C //RX_FDEQ_GAIN_3 +200 0x4E50 //RX_FDEQ_GAIN_4 +201 0x5254 //RX_FDEQ_GAIN_5 +202 0x5658 //RX_FDEQ_GAIN_6 +203 0x5A5C //RX_FDEQ_GAIN_7 +204 0x5C5C //RX_FDEQ_GAIN_8 +205 0x5C5C //RX_FDEQ_GAIN_9 +206 0x5C5C //RX_FDEQ_GAIN_10 +207 0x5C48 //RX_FDEQ_GAIN_11 +208 0x4848 //RX_FDEQ_GAIN_12 +209 0x4848 //RX_FDEQ_GAIN_13 +210 0x4848 //RX_FDEQ_GAIN_14 +211 0x4848 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0202 //RX_FDEQ_BIN_0 +221 0x0203 //RX_FDEQ_BIN_1 +222 0x0402 //RX_FDEQ_BIN_2 +223 0x0303 //RX_FDEQ_BIN_3 +224 0x0303 //RX_FDEQ_BIN_4 +225 0x0303 //RX_FDEQ_BIN_5 +226 0x0303 //RX_FDEQ_BIN_6 +227 0x0303 //RX_FDEQ_BIN_7 +228 0x0A0A //RX_FDEQ_BIN_8 +229 0x0A0E //RX_FDEQ_BIN_9 +230 0x0000 //RX_FDEQ_BIN_10 +231 0x0000 //RX_FDEQ_BIN_11 +232 0x0000 //RX_FDEQ_BIN_12 +233 0x0000 //RX_FDEQ_BIN_13 +234 0x0000 //RX_FDEQ_BIN_14 +235 0x0000 //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x4000 //RX_FDEQ_RESRV_0 +245 0x0320 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0030 //RX_FDDRC_BAND_MARGIN_1 +248 0x0050 //RX_FDDRC_BAND_MARGIN_2 +249 0x0080 //RX_FDDRC_BAND_MARGIN_3 +250 0x0007 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x5000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x6400 //RX_FDDRC_THRD_3_2 +258 0x6400 //RX_FDDRC_THRD_3_3 +259 0x2000 //RX_FDDRC_SLANT_0_0 +260 0x2000 //RX_FDDRC_SLANT_0_1 +261 0x2000 //RX_FDDRC_SLANT_0_2 +262 0x2000 //RX_FDDRC_SLANT_0_3 +263 0x5333 //RX_FDDRC_SLANT_1_0 +264 0x5333 //RX_FDDRC_SLANT_1_1 +265 0x5333 //RX_FDDRC_SLANT_1_2 +266 0x5333 //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +268 0x0002 //RX_FILTINDX +269 0x0000 //RX_TDDRC_THRD_0 +270 0x0000 //RX_TDDRC_THRD_1 +271 0x1800 //RX_TDDRC_THRD_2 +272 0x1800 //RX_TDDRC_THRD_3 +273 0x3000 //RX_TDDRC_SLANT_0 +274 0x6E00 //RX_TDDRC_SLANT_1 +275 0x1000 //RX_TDDRC_ALPHA_UP_0 +276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x199A //RX_TDDRC_HMNC_GAIN +279 0x0001 //RX_TDDRC_SMT_FLAG +280 0x0CCD //RX_TDDRC_SMT_W +281 0x0360 //RX_TDDRC_DRC_GAIN +282 0x7C00 //RX_LAMBDA_PKA_FP +283 0x2000 //RX_TPKA_FP +284 0x2000 //RX_MIN_G_FP +285 0x0080 //RX_MAX_G_FP +286 0x0100 //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 +288 0x0000 //RX_MAXLEVEL_CNG +289 0x3000 //RX_BWE_UV_TH +290 0x3000 //RX_BWE_UV_TH2 +291 0x1800 //RX_BWE_UV_TH3 +292 0x1000 //RX_BWE_V_TH +293 0x04CD //RX_BWE_GAIN1_V_TH1 +294 0x0F33 //RX_BWE_GAIN1_V_TH2 +295 0x7333 //RX_BWE_UV_EQ +296 0x199A //RX_BWE_V_EQ +297 0x7333 //RX_BWE_TONE_TH +298 0x0004 //RX_BWE_UV_HOLD_T +299 0x6CCD //RX_BWE_GAIN2_ALPHA +300 0x799A //RX_BWE_GAIN3_ALPHA +301 0x001E //RX_BWE_CUTOFF +302 0x3000 //RX_BWE_GAINFILL +303 0x3200 //RX_BWE_MAXTH_TONE +304 0x2000 //RX_BWE_EQ_0 +305 0x2000 //RX_BWE_EQ_1 +306 0x2000 //RX_BWE_EQ_2 +307 0x2000 //RX_BWE_EQ_3 +308 0x2000 //RX_BWE_EQ_4 +309 0x2000 //RX_BWE_EQ_5 +310 0x2000 //RX_BWE_EQ_6 +311 0x0000 //RX_BWE_RESRV_0 +312 0x0000 //RX_BWE_RESRV_1 +313 0x0000 //RX_BWE_RESRV_2 +#VOL 0 +163 0x1000 //RX_TDDRC_ALPHA_UP_1 +164 0x1000 //RX_TDDRC_ALPHA_UP_2 +165 0x1000 //RX_TDDRC_ALPHA_UP_3 +166 0x1000 //RX_TDDRC_ALPHA_UP_4 +184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +190 0x7000 //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +269 0x0000 //RX_TDDRC_THRD_0 +270 0x0000 //RX_TDDRC_THRD_1 +271 0x1800 //RX_TDDRC_THRD_2 +272 0x1800 //RX_TDDRC_THRD_3 +273 0x3000 //RX_TDDRC_SLANT_0 +274 0x6E00 //RX_TDDRC_SLANT_1 +275 0x1000 //RX_TDDRC_ALPHA_UP_0 +276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x199A //RX_TDDRC_HMNC_GAIN +279 0x0001 //RX_TDDRC_SMT_FLAG +280 0x0CCD //RX_TDDRC_SMT_W +281 0x0360 //RX_TDDRC_DRC_GAIN +195 0x0030 //RX_FDEQ_SUBNUM +196 0x4848 //RX_FDEQ_GAIN_0 +197 0x4848 //RX_FDEQ_GAIN_1 +198 0x4844 //RX_FDEQ_GAIN_2 +199 0x4A4C //RX_FDEQ_GAIN_3 +200 0x4E50 //RX_FDEQ_GAIN_4 +201 0x5254 //RX_FDEQ_GAIN_5 +202 0x5658 //RX_FDEQ_GAIN_6 +203 0x5A5C //RX_FDEQ_GAIN_7 +204 0x5C5C //RX_FDEQ_GAIN_8 +205 0x5C5C //RX_FDEQ_GAIN_9 +206 0x5C5C //RX_FDEQ_GAIN_10 +207 0x5C48 //RX_FDEQ_GAIN_11 +208 0x4848 //RX_FDEQ_GAIN_12 +209 0x4848 //RX_FDEQ_GAIN_13 +210 0x4848 //RX_FDEQ_GAIN_14 +211 0x4848 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0202 //RX_FDEQ_BIN_0 +221 0x0203 //RX_FDEQ_BIN_1 +222 0x0402 //RX_FDEQ_BIN_2 +223 0x0303 //RX_FDEQ_BIN_3 +224 0x0303 //RX_FDEQ_BIN_4 +225 0x0303 //RX_FDEQ_BIN_5 +226 0x0303 //RX_FDEQ_BIN_6 +227 0x0303 //RX_FDEQ_BIN_7 +228 0x0A0A //RX_FDEQ_BIN_8 +229 0x0A0E //RX_FDEQ_BIN_9 +230 0x0000 //RX_FDEQ_BIN_10 +231 0x0000 //RX_FDEQ_BIN_11 +232 0x0000 //RX_FDEQ_BIN_12 +233 0x0000 //RX_FDEQ_BIN_13 +234 0x0000 //RX_FDEQ_BIN_14 +235 0x0000 //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x4000 //RX_FDEQ_RESRV_0 +245 0x0320 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0030 //RX_FDDRC_BAND_MARGIN_1 +248 0x0050 //RX_FDDRC_BAND_MARGIN_2 +249 0x0080 //RX_FDDRC_BAND_MARGIN_3 +250 0x0007 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x5000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x6400 //RX_FDDRC_THRD_3_2 +258 0x6400 //RX_FDDRC_THRD_3_3 +259 0x2000 //RX_FDDRC_SLANT_0_0 +260 0x2000 //RX_FDDRC_SLANT_0_1 +261 0x2000 //RX_FDDRC_SLANT_0_2 +262 0x2000 //RX_FDDRC_SLANT_0_3 +263 0x5333 //RX_FDDRC_SLANT_1_0 +264 0x5333 //RX_FDDRC_SLANT_1_1 +265 0x5333 //RX_FDDRC_SLANT_1_2 +266 0x5333 //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +286 0x0100 //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 +#VOL 1 +163 0x1000 //RX_TDDRC_ALPHA_UP_1 +164 0x1000 //RX_TDDRC_ALPHA_UP_2 +165 0x1000 //RX_TDDRC_ALPHA_UP_3 +166 0x1000 //RX_TDDRC_ALPHA_UP_4 +184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +190 0x7000 //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +269 0x0000 //RX_TDDRC_THRD_0 +270 0x0000 //RX_TDDRC_THRD_1 +271 0x1800 //RX_TDDRC_THRD_2 +272 0x1800 //RX_TDDRC_THRD_3 +273 0x3000 //RX_TDDRC_SLANT_0 +274 0x6E00 //RX_TDDRC_SLANT_1 +275 0x1000 //RX_TDDRC_ALPHA_UP_0 +276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x199A //RX_TDDRC_HMNC_GAIN +279 0x0001 //RX_TDDRC_SMT_FLAG +280 0x0CCD //RX_TDDRC_SMT_W +281 0x0360 //RX_TDDRC_DRC_GAIN +195 0x0030 //RX_FDEQ_SUBNUM +196 0x4848 //RX_FDEQ_GAIN_0 +197 0x4848 //RX_FDEQ_GAIN_1 +198 0x4844 //RX_FDEQ_GAIN_2 +199 0x4A4C //RX_FDEQ_GAIN_3 +200 0x4E50 //RX_FDEQ_GAIN_4 +201 0x5254 //RX_FDEQ_GAIN_5 +202 0x5658 //RX_FDEQ_GAIN_6 +203 0x5A5C //RX_FDEQ_GAIN_7 +204 0x5C5C //RX_FDEQ_GAIN_8 +205 0x5C5C //RX_FDEQ_GAIN_9 +206 0x5C5C //RX_FDEQ_GAIN_10 +207 0x5C48 //RX_FDEQ_GAIN_11 +208 0x4848 //RX_FDEQ_GAIN_12 +209 0x4848 //RX_FDEQ_GAIN_13 +210 0x4848 //RX_FDEQ_GAIN_14 +211 0x4848 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0202 //RX_FDEQ_BIN_0 +221 0x0203 //RX_FDEQ_BIN_1 +222 0x0402 //RX_FDEQ_BIN_2 +223 0x0303 //RX_FDEQ_BIN_3 +224 0x0303 //RX_FDEQ_BIN_4 +225 0x0303 //RX_FDEQ_BIN_5 +226 0x0303 //RX_FDEQ_BIN_6 +227 0x0303 //RX_FDEQ_BIN_7 +228 0x0A0A //RX_FDEQ_BIN_8 +229 0x0A0E //RX_FDEQ_BIN_9 +230 0x0000 //RX_FDEQ_BIN_10 +231 0x0000 //RX_FDEQ_BIN_11 +232 0x0000 //RX_FDEQ_BIN_12 +233 0x0000 //RX_FDEQ_BIN_13 +234 0x0000 //RX_FDEQ_BIN_14 +235 0x0000 //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x4000 //RX_FDEQ_RESRV_0 +245 0x0320 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0030 //RX_FDDRC_BAND_MARGIN_1 +248 0x0050 //RX_FDDRC_BAND_MARGIN_2 +249 0x0080 //RX_FDDRC_BAND_MARGIN_3 +250 0x0007 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x5000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x6400 //RX_FDDRC_THRD_3_2 +258 0x6400 //RX_FDDRC_THRD_3_3 +259 0x2000 //RX_FDDRC_SLANT_0_0 +260 0x2000 //RX_FDDRC_SLANT_0_1 +261 0x2000 //RX_FDDRC_SLANT_0_2 +262 0x2000 //RX_FDDRC_SLANT_0_3 +263 0x5333 //RX_FDDRC_SLANT_1_0 +264 0x5333 //RX_FDDRC_SLANT_1_1 +265 0x5333 //RX_FDDRC_SLANT_1_2 +266 0x5333 //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +286 0x0100 //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 +#VOL 2 +163 0x1000 //RX_TDDRC_ALPHA_UP_1 +164 0x1000 //RX_TDDRC_ALPHA_UP_2 +165 0x1000 //RX_TDDRC_ALPHA_UP_3 +166 0x1000 //RX_TDDRC_ALPHA_UP_4 +184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +190 0x7000 //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +269 0x0000 //RX_TDDRC_THRD_0 +270 0x0000 //RX_TDDRC_THRD_1 +271 0x1800 //RX_TDDRC_THRD_2 +272 0x1800 //RX_TDDRC_THRD_3 +273 0x3000 //RX_TDDRC_SLANT_0 +274 0x6E00 //RX_TDDRC_SLANT_1 +275 0x1000 //RX_TDDRC_ALPHA_UP_0 +276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x199A //RX_TDDRC_HMNC_GAIN +279 0x0001 //RX_TDDRC_SMT_FLAG +280 0x0CCD //RX_TDDRC_SMT_W +281 0x0360 //RX_TDDRC_DRC_GAIN +195 0x0030 //RX_FDEQ_SUBNUM +196 0x4848 //RX_FDEQ_GAIN_0 +197 0x4848 //RX_FDEQ_GAIN_1 +198 0x4844 //RX_FDEQ_GAIN_2 +199 0x4A4C //RX_FDEQ_GAIN_3 +200 0x4E50 //RX_FDEQ_GAIN_4 +201 0x5254 //RX_FDEQ_GAIN_5 +202 0x5658 //RX_FDEQ_GAIN_6 +203 0x5A5C //RX_FDEQ_GAIN_7 +204 0x5C5C //RX_FDEQ_GAIN_8 +205 0x5C5C //RX_FDEQ_GAIN_9 +206 0x5C5C //RX_FDEQ_GAIN_10 +207 0x5C48 //RX_FDEQ_GAIN_11 +208 0x4848 //RX_FDEQ_GAIN_12 +209 0x4848 //RX_FDEQ_GAIN_13 +210 0x4848 //RX_FDEQ_GAIN_14 +211 0x4848 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0202 //RX_FDEQ_BIN_0 +221 0x0203 //RX_FDEQ_BIN_1 +222 0x0402 //RX_FDEQ_BIN_2 +223 0x0303 //RX_FDEQ_BIN_3 +224 0x0303 //RX_FDEQ_BIN_4 +225 0x0303 //RX_FDEQ_BIN_5 +226 0x0303 //RX_FDEQ_BIN_6 +227 0x0303 //RX_FDEQ_BIN_7 +228 0x0A0A //RX_FDEQ_BIN_8 +229 0x0A0E //RX_FDEQ_BIN_9 +230 0x0000 //RX_FDEQ_BIN_10 +231 0x0000 //RX_FDEQ_BIN_11 +232 0x0000 //RX_FDEQ_BIN_12 +233 0x0000 //RX_FDEQ_BIN_13 +234 0x0000 //RX_FDEQ_BIN_14 +235 0x0000 //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x4000 //RX_FDEQ_RESRV_0 +245 0x0320 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0030 //RX_FDDRC_BAND_MARGIN_1 +248 0x0050 //RX_FDDRC_BAND_MARGIN_2 +249 0x0080 //RX_FDDRC_BAND_MARGIN_3 +250 0x0007 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x5000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x6400 //RX_FDDRC_THRD_3_2 +258 0x6400 //RX_FDDRC_THRD_3_3 +259 0x2000 //RX_FDDRC_SLANT_0_0 +260 0x2000 //RX_FDDRC_SLANT_0_1 +261 0x2000 //RX_FDDRC_SLANT_0_2 +262 0x2000 //RX_FDDRC_SLANT_0_3 +263 0x5333 //RX_FDDRC_SLANT_1_0 +264 0x5333 //RX_FDDRC_SLANT_1_1 +265 0x5333 //RX_FDDRC_SLANT_1_2 +266 0x5333 //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +286 0x0100 //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 +#VOL 3 +163 0x1000 //RX_TDDRC_ALPHA_UP_1 +164 0x1000 //RX_TDDRC_ALPHA_UP_2 +165 0x1000 //RX_TDDRC_ALPHA_UP_3 +166 0x1000 //RX_TDDRC_ALPHA_UP_4 +184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +190 0x7000 //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +269 0x0000 //RX_TDDRC_THRD_0 +270 0x0000 //RX_TDDRC_THRD_1 +271 0x1800 //RX_TDDRC_THRD_2 +272 0x1800 //RX_TDDRC_THRD_3 +273 0x3000 //RX_TDDRC_SLANT_0 +274 0x6E00 //RX_TDDRC_SLANT_1 +275 0x1000 //RX_TDDRC_ALPHA_UP_0 +276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x199A //RX_TDDRC_HMNC_GAIN +279 0x0001 //RX_TDDRC_SMT_FLAG +280 0x0CCD //RX_TDDRC_SMT_W +281 0x0360 //RX_TDDRC_DRC_GAIN +195 0x0030 //RX_FDEQ_SUBNUM +196 0x4848 //RX_FDEQ_GAIN_0 +197 0x4848 //RX_FDEQ_GAIN_1 +198 0x4844 //RX_FDEQ_GAIN_2 +199 0x4A4C //RX_FDEQ_GAIN_3 +200 0x4E50 //RX_FDEQ_GAIN_4 +201 0x5254 //RX_FDEQ_GAIN_5 +202 0x5658 //RX_FDEQ_GAIN_6 +203 0x5A5C //RX_FDEQ_GAIN_7 +204 0x5C5C //RX_FDEQ_GAIN_8 +205 0x5C5C //RX_FDEQ_GAIN_9 +206 0x5C5C //RX_FDEQ_GAIN_10 +207 0x5C48 //RX_FDEQ_GAIN_11 +208 0x4848 //RX_FDEQ_GAIN_12 +209 0x4848 //RX_FDEQ_GAIN_13 +210 0x4848 //RX_FDEQ_GAIN_14 +211 0x4848 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0202 //RX_FDEQ_BIN_0 +221 0x0203 //RX_FDEQ_BIN_1 +222 0x0402 //RX_FDEQ_BIN_2 +223 0x0303 //RX_FDEQ_BIN_3 +224 0x0303 //RX_FDEQ_BIN_4 +225 0x0303 //RX_FDEQ_BIN_5 +226 0x0303 //RX_FDEQ_BIN_6 +227 0x0303 //RX_FDEQ_BIN_7 +228 0x0A0A //RX_FDEQ_BIN_8 +229 0x0A0E //RX_FDEQ_BIN_9 +230 0x0000 //RX_FDEQ_BIN_10 +231 0x0000 //RX_FDEQ_BIN_11 +232 0x0000 //RX_FDEQ_BIN_12 +233 0x0000 //RX_FDEQ_BIN_13 +234 0x0000 //RX_FDEQ_BIN_14 +235 0x0000 //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x4000 //RX_FDEQ_RESRV_0 +245 0x0320 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0030 //RX_FDDRC_BAND_MARGIN_1 +248 0x0050 //RX_FDDRC_BAND_MARGIN_2 +249 0x0080 //RX_FDDRC_BAND_MARGIN_3 +250 0x0007 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x5000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x6400 //RX_FDDRC_THRD_3_2 +258 0x6400 //RX_FDDRC_THRD_3_3 +259 0x2000 //RX_FDDRC_SLANT_0_0 +260 0x2000 //RX_FDDRC_SLANT_0_1 +261 0x2000 //RX_FDDRC_SLANT_0_2 +262 0x2000 //RX_FDDRC_SLANT_0_3 +263 0x5333 //RX_FDDRC_SLANT_1_0 +264 0x5333 //RX_FDDRC_SLANT_1_1 +265 0x5333 //RX_FDDRC_SLANT_1_2 +266 0x5333 //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +286 0x0100 //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 +#VOL 4 +163 0x1000 //RX_TDDRC_ALPHA_UP_1 +164 0x1000 //RX_TDDRC_ALPHA_UP_2 +165 0x1000 //RX_TDDRC_ALPHA_UP_3 +166 0x1000 //RX_TDDRC_ALPHA_UP_4 +184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +190 0x7000 //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +269 0x0000 //RX_TDDRC_THRD_0 +270 0x0000 //RX_TDDRC_THRD_1 +271 0x1800 //RX_TDDRC_THRD_2 +272 0x1800 //RX_TDDRC_THRD_3 +273 0x3000 //RX_TDDRC_SLANT_0 +274 0x6E00 //RX_TDDRC_SLANT_1 +275 0x1000 //RX_TDDRC_ALPHA_UP_0 +276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x199A //RX_TDDRC_HMNC_GAIN +279 0x0001 //RX_TDDRC_SMT_FLAG +280 0x0CCD //RX_TDDRC_SMT_W +281 0x0360 //RX_TDDRC_DRC_GAIN +195 0x0030 //RX_FDEQ_SUBNUM +196 0x4848 //RX_FDEQ_GAIN_0 +197 0x4848 //RX_FDEQ_GAIN_1 +198 0x4844 //RX_FDEQ_GAIN_2 +199 0x4A4C //RX_FDEQ_GAIN_3 +200 0x4E50 //RX_FDEQ_GAIN_4 +201 0x5254 //RX_FDEQ_GAIN_5 +202 0x5658 //RX_FDEQ_GAIN_6 +203 0x5A5C //RX_FDEQ_GAIN_7 +204 0x5C5C //RX_FDEQ_GAIN_8 +205 0x5C5C //RX_FDEQ_GAIN_9 +206 0x5C5C //RX_FDEQ_GAIN_10 +207 0x5C48 //RX_FDEQ_GAIN_11 +208 0x4848 //RX_FDEQ_GAIN_12 +209 0x4848 //RX_FDEQ_GAIN_13 +210 0x4848 //RX_FDEQ_GAIN_14 +211 0x4848 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0202 //RX_FDEQ_BIN_0 +221 0x0203 //RX_FDEQ_BIN_1 +222 0x0402 //RX_FDEQ_BIN_2 +223 0x0303 //RX_FDEQ_BIN_3 +224 0x0303 //RX_FDEQ_BIN_4 +225 0x0303 //RX_FDEQ_BIN_5 +226 0x0303 //RX_FDEQ_BIN_6 +227 0x0303 //RX_FDEQ_BIN_7 +228 0x0A0A //RX_FDEQ_BIN_8 +229 0x0A0E //RX_FDEQ_BIN_9 +230 0x0000 //RX_FDEQ_BIN_10 +231 0x0000 //RX_FDEQ_BIN_11 +232 0x0000 //RX_FDEQ_BIN_12 +233 0x0000 //RX_FDEQ_BIN_13 +234 0x0000 //RX_FDEQ_BIN_14 +235 0x0000 //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x4000 //RX_FDEQ_RESRV_0 +245 0x0320 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0030 //RX_FDDRC_BAND_MARGIN_1 +248 0x0050 //RX_FDDRC_BAND_MARGIN_2 +249 0x0080 //RX_FDDRC_BAND_MARGIN_3 +250 0x0007 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x5000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x6400 //RX_FDDRC_THRD_3_2 +258 0x6400 //RX_FDDRC_THRD_3_3 +259 0x2000 //RX_FDDRC_SLANT_0_0 +260 0x2000 //RX_FDDRC_SLANT_0_1 +261 0x2000 //RX_FDDRC_SLANT_0_2 +262 0x2000 //RX_FDDRC_SLANT_0_3 +263 0x5333 //RX_FDDRC_SLANT_1_0 +264 0x5333 //RX_FDDRC_SLANT_1_1 +265 0x5333 //RX_FDDRC_SLANT_1_2 +266 0x5333 //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +286 0x0100 //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 +#VOL 5 +163 0x1000 //RX_TDDRC_ALPHA_UP_1 +164 0x1000 //RX_TDDRC_ALPHA_UP_2 +165 0x1000 //RX_TDDRC_ALPHA_UP_3 +166 0x1000 //RX_TDDRC_ALPHA_UP_4 +184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +190 0x7000 //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +269 0x0000 //RX_TDDRC_THRD_0 +270 0x0000 //RX_TDDRC_THRD_1 +271 0x1800 //RX_TDDRC_THRD_2 +272 0x1800 //RX_TDDRC_THRD_3 +273 0x3000 //RX_TDDRC_SLANT_0 +274 0x6E00 //RX_TDDRC_SLANT_1 +275 0x1000 //RX_TDDRC_ALPHA_UP_0 +276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x199A //RX_TDDRC_HMNC_GAIN +279 0x0001 //RX_TDDRC_SMT_FLAG +280 0x0CCD //RX_TDDRC_SMT_W +281 0x0360 //RX_TDDRC_DRC_GAIN +195 0x0030 //RX_FDEQ_SUBNUM +196 0x4848 //RX_FDEQ_GAIN_0 +197 0x4848 //RX_FDEQ_GAIN_1 +198 0x4844 //RX_FDEQ_GAIN_2 +199 0x4A4C //RX_FDEQ_GAIN_3 +200 0x4E50 //RX_FDEQ_GAIN_4 +201 0x5254 //RX_FDEQ_GAIN_5 +202 0x5658 //RX_FDEQ_GAIN_6 +203 0x5A5C //RX_FDEQ_GAIN_7 +204 0x5C5C //RX_FDEQ_GAIN_8 +205 0x5C5C //RX_FDEQ_GAIN_9 +206 0x5C5C //RX_FDEQ_GAIN_10 +207 0x5C48 //RX_FDEQ_GAIN_11 +208 0x4848 //RX_FDEQ_GAIN_12 +209 0x4848 //RX_FDEQ_GAIN_13 +210 0x4848 //RX_FDEQ_GAIN_14 +211 0x4848 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0202 //RX_FDEQ_BIN_0 +221 0x0203 //RX_FDEQ_BIN_1 +222 0x0402 //RX_FDEQ_BIN_2 +223 0x0303 //RX_FDEQ_BIN_3 +224 0x0303 //RX_FDEQ_BIN_4 +225 0x0303 //RX_FDEQ_BIN_5 +226 0x0303 //RX_FDEQ_BIN_6 +227 0x0303 //RX_FDEQ_BIN_7 +228 0x0A0A //RX_FDEQ_BIN_8 +229 0x0A0E //RX_FDEQ_BIN_9 +230 0x0000 //RX_FDEQ_BIN_10 +231 0x0000 //RX_FDEQ_BIN_11 +232 0x0000 //RX_FDEQ_BIN_12 +233 0x0000 //RX_FDEQ_BIN_13 +234 0x0000 //RX_FDEQ_BIN_14 +235 0x0000 //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x4000 //RX_FDEQ_RESRV_0 +245 0x0320 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0030 //RX_FDDRC_BAND_MARGIN_1 +248 0x0050 //RX_FDDRC_BAND_MARGIN_2 +249 0x0080 //RX_FDDRC_BAND_MARGIN_3 +250 0x0007 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x5000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x6400 //RX_FDDRC_THRD_3_2 +258 0x6400 //RX_FDDRC_THRD_3_3 +259 0x2000 //RX_FDDRC_SLANT_0_0 +260 0x2000 //RX_FDDRC_SLANT_0_1 +261 0x2000 //RX_FDDRC_SLANT_0_2 +262 0x2000 //RX_FDDRC_SLANT_0_3 +263 0x5333 //RX_FDDRC_SLANT_1_0 +264 0x5333 //RX_FDDRC_SLANT_1_1 +265 0x5333 //RX_FDDRC_SLANT_1_2 +266 0x5333 //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +286 0x0100 //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 +#VOL 6 +163 0x1000 //RX_TDDRC_ALPHA_UP_1 +164 0x1000 //RX_TDDRC_ALPHA_UP_2 +165 0x1000 //RX_TDDRC_ALPHA_UP_3 +166 0x1000 //RX_TDDRC_ALPHA_UP_4 +184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +190 0x7000 //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +269 0x0000 //RX_TDDRC_THRD_0 +270 0x0000 //RX_TDDRC_THRD_1 +271 0x1800 //RX_TDDRC_THRD_2 +272 0x1800 //RX_TDDRC_THRD_3 +273 0x3000 //RX_TDDRC_SLANT_0 +274 0x6E00 //RX_TDDRC_SLANT_1 +275 0x1000 //RX_TDDRC_ALPHA_UP_0 +276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x199A //RX_TDDRC_HMNC_GAIN +279 0x0001 //RX_TDDRC_SMT_FLAG +280 0x0CCD //RX_TDDRC_SMT_W +281 0x0360 //RX_TDDRC_DRC_GAIN +195 0x0030 //RX_FDEQ_SUBNUM +196 0x4848 //RX_FDEQ_GAIN_0 +197 0x4848 //RX_FDEQ_GAIN_1 +198 0x4844 //RX_FDEQ_GAIN_2 +199 0x4A4C //RX_FDEQ_GAIN_3 +200 0x4E50 //RX_FDEQ_GAIN_4 +201 0x5254 //RX_FDEQ_GAIN_5 +202 0x5658 //RX_FDEQ_GAIN_6 +203 0x5A5C //RX_FDEQ_GAIN_7 +204 0x5C5C //RX_FDEQ_GAIN_8 +205 0x5C5C //RX_FDEQ_GAIN_9 +206 0x5C5C //RX_FDEQ_GAIN_10 +207 0x5C48 //RX_FDEQ_GAIN_11 +208 0x4848 //RX_FDEQ_GAIN_12 +209 0x4848 //RX_FDEQ_GAIN_13 +210 0x4848 //RX_FDEQ_GAIN_14 +211 0x4848 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0202 //RX_FDEQ_BIN_0 +221 0x0203 //RX_FDEQ_BIN_1 +222 0x0402 //RX_FDEQ_BIN_2 +223 0x0303 //RX_FDEQ_BIN_3 +224 0x0303 //RX_FDEQ_BIN_4 +225 0x0303 //RX_FDEQ_BIN_5 +226 0x0303 //RX_FDEQ_BIN_6 +227 0x0303 //RX_FDEQ_BIN_7 +228 0x0A0A //RX_FDEQ_BIN_8 +229 0x0A0E //RX_FDEQ_BIN_9 +230 0x0000 //RX_FDEQ_BIN_10 +231 0x0000 //RX_FDEQ_BIN_11 +232 0x0000 //RX_FDEQ_BIN_12 +233 0x0000 //RX_FDEQ_BIN_13 +234 0x0000 //RX_FDEQ_BIN_14 +235 0x0000 //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x4000 //RX_FDEQ_RESRV_0 +245 0x0320 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0030 //RX_FDDRC_BAND_MARGIN_1 +248 0x0050 //RX_FDDRC_BAND_MARGIN_2 +249 0x0080 //RX_FDDRC_BAND_MARGIN_3 +250 0x0007 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x5000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x6400 //RX_FDDRC_THRD_3_2 +258 0x6400 //RX_FDDRC_THRD_3_3 +259 0x2000 //RX_FDDRC_SLANT_0_0 +260 0x2000 //RX_FDDRC_SLANT_0_1 +261 0x2000 //RX_FDDRC_SLANT_0_2 +262 0x2000 //RX_FDDRC_SLANT_0_3 +263 0x5333 //RX_FDDRC_SLANT_1_0 +264 0x5333 //RX_FDDRC_SLANT_1_1 +265 0x5333 //RX_FDDRC_SLANT_1_2 +266 0x5333 //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +286 0x0100 //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 -#CASE_NAME HANDSET-HANDSET_HAC-TMOBILE_US-WB -#PARAM_TYPE TX+RX -#TOTAL_CUSTOM_STEP 7 +#CASE_NAME HANDSET-HANDSET_HAC-VOICE_GENERIC-WB +#PARAM_MODE Full +#PARAM_TYPE TX+2RX +#TOTAL_CUSTOM_STEP 7+7 #TX 0 0x0000 //TX_OPERATION_MODE_0 1 0x0000 //TX_OPERATION_MODE_1 @@ -28076,7 +21389,7 @@ 18 0x0000 //TX_SYS_RESRV_2 19 0x0000 //TX_SYS_RESRV_3 20 0x0000 //TX_DIST2REF0 -21 0x009D //TX_DIST2REF1 +21 0x00A3 //TX_DIST2REF1 22 0x0000 //TX_DIST2REF_02 23 0x0000 //TX_DIST2REF_03 24 0x0000 //TX_DIST2REF_04 @@ -28306,16 +21619,16 @@ 248 0xF800 //TX_THR_SN_EST_6 249 0xF700 //TX_THR_SN_EST_7 250 0x0000 //TX_DELTA_THR_SN_EST_0 -251 0x0100 //TX_DELTA_THR_SN_EST_1 -252 0x01A0 //TX_DELTA_THR_SN_EST_2 +251 0x01A0 //TX_DELTA_THR_SN_EST_1 +252 0x0200 //TX_DELTA_THR_SN_EST_2 253 0x0200 //TX_DELTA_THR_SN_EST_3 -254 0x0200 //TX_DELTA_THR_SN_EST_4 -255 0x0100 //TX_DELTA_THR_SN_EST_5 -256 0x0200 //TX_DELTA_THR_SN_EST_6 +254 0x0100 //TX_DELTA_THR_SN_EST_4 +255 0x0200 //TX_DELTA_THR_SN_EST_5 +256 0x0100 //TX_DELTA_THR_SN_EST_6 257 0x0200 //TX_DELTA_THR_SN_EST_7 258 0x4000 //TX_LAMBDA_NN_EST_0 -259 0x4000 //TX_LAMBDA_NN_EST_1 -260 0x5000 //TX_LAMBDA_NN_EST_2 +259 0x5000 //TX_LAMBDA_NN_EST_1 +260 0x4000 //TX_LAMBDA_NN_EST_2 261 0x4000 //TX_LAMBDA_NN_EST_3 262 0x4000 //TX_LAMBDA_NN_EST_4 263 0x4000 //TX_LAMBDA_NN_EST_5 @@ -28337,18 +21650,18 @@ 279 0x1000 //TX_B_POST_FLT_0 280 0x4000 //TX_B_POST_FLT_1 281 0x0018 //TX_NS_LVL_CTRL_0 -282 0x001C //TX_NS_LVL_CTRL_1 -283 0x0019 //TX_NS_LVL_CTRL_2 -284 0x0018 //TX_NS_LVL_CTRL_3 -285 0x0019 //TX_NS_LVL_CTRL_4 -286 0x001A //TX_NS_LVL_CTRL_5 -287 0x001E //TX_NS_LVL_CTRL_6 +282 0x0019 //TX_NS_LVL_CTRL_1 +283 0x0018 //TX_NS_LVL_CTRL_2 +284 0x0019 //TX_NS_LVL_CTRL_3 +285 0x001A //TX_NS_LVL_CTRL_4 +286 0x001E //TX_NS_LVL_CTRL_5 +287 0x001C //TX_NS_LVL_CTRL_6 288 0x001C //TX_NS_LVL_CTRL_7 289 0x000E //TX_MIN_GAIN_S_0 -290 0x0018 //TX_MIN_GAIN_S_1 +290 0x0012 //TX_MIN_GAIN_S_1 291 0x0012 //TX_MIN_GAIN_S_2 292 0x0012 //TX_MIN_GAIN_S_3 -293 0x0012 //TX_MIN_GAIN_S_4 +293 0x0018 //TX_MIN_GAIN_S_4 294 0x0018 //TX_MIN_GAIN_S_5 295 0x0018 //TX_MIN_GAIN_S_6 296 0x0018 //TX_MIN_GAIN_S_7 @@ -28356,8 +21669,8 @@ 298 0x0000 //TX_NS_MAX_PRI_SNR_TH 299 0x0000 //TX_NMOS_SUP_MENSA 300 0x7FFF //TX_SNRI_SUP_0 -301 0x4000 //TX_SNRI_SUP_1 -302 0x5000 //TX_SNRI_SUP_2 +301 0x5000 //TX_SNRI_SUP_1 +302 0x4000 //TX_SNRI_SUP_2 303 0x4000 //TX_SNRI_SUP_3 304 0x4000 //TX_SNRI_SUP_4 305 0x4000 //TX_SNRI_SUP_5 @@ -28370,28 +21683,28 @@ 312 0x7FFF //TX_A_POST_FILT_0 313 0x2000 //TX_A_POST_FILT_1 314 0x7000 //TX_A_POST_FILT_S_0 -315 0x7000 //TX_A_POST_FILT_S_1 +315 0x3000 //TX_A_POST_FILT_S_1 316 0x3000 //TX_A_POST_FILT_S_2 -317 0x3000 //TX_A_POST_FILT_S_3 -318 0x2000 //TX_A_POST_FILT_S_4 +317 0x2000 //TX_A_POST_FILT_S_3 +318 0x7000 //TX_A_POST_FILT_S_4 319 0x7000 //TX_A_POST_FILT_S_5 320 0x7000 //TX_A_POST_FILT_S_6 321 0x7000 //TX_A_POST_FILT_S_7 322 0x1000 //TX_B_POST_FILT_0 323 0x4000 //TX_B_POST_FILT_1 -324 0x5000 //TX_B_POST_FILT_2 +324 0x4000 //TX_B_POST_FILT_2 325 0x4000 //TX_B_POST_FILT_3 326 0x4000 //TX_B_POST_FILT_4 327 0x4000 //TX_B_POST_FILT_5 -328 0x4000 //TX_B_POST_FILT_6 +328 0x5000 //TX_B_POST_FILT_6 329 0x4000 //TX_B_POST_FILT_7 330 0x4000 //TX_B_LESSCUT_RTO_S_0 331 0x6000 //TX_B_LESSCUT_RTO_S_1 332 0x6000 //TX_B_LESSCUT_RTO_S_2 333 0x6000 //TX_B_LESSCUT_RTO_S_3 -334 0x6000 //TX_B_LESSCUT_RTO_S_4 +334 0x7FFF //TX_B_LESSCUT_RTO_S_4 335 0x6000 //TX_B_LESSCUT_RTO_S_5 -336 0x7FFF //TX_B_LESSCUT_RTO_S_6 +336 0x6000 //TX_B_LESSCUT_RTO_S_6 337 0x7FFF //TX_B_LESSCUT_RTO_S_7 338 0x7C29 //TX_LAMBDA_PFILT 339 0x7C29 //TX_LAMBDA_PFILT_S_0 @@ -28423,8 +21736,8 @@ 365 0x0001 //TX_NOISEDET 366 0x0190 //TX_NDETCT 367 0x000A //TX_NOISE_TH_0 -368 0x1B58 //TX_NOISE_TH_0_2 -369 0x2134 //TX_NOISE_TH_0_3 +368 0x7FFF //TX_NOISE_TH_0_2 +369 0x7FFF //TX_NOISE_TH_0_3 370 0x0139 //TX_NOISE_TH_1 371 0x0479 //TX_NOISE_TH_2 372 0x2328 //TX_NOISE_TH_3 @@ -28435,10 +21748,10 @@ 377 0x4E20 //TX_NOISE_TH_5_4 378 0x21E8 //TX_NOISE_TH_6 379 0x0014 //TX_MINENOISE_TH -380 0x4000 //TX_MINENOISE_MIC0_TH_MTS -381 0xFFEE //TX_MINENOISE_MIC0_TH_EXP -382 0x6000 //TX_MINENOISE_MIC0_S_TH_MTS -383 0xFFF3 //TX_MINENOISE_MIC0_S_TH_EXP +380 0xD508 //TX_MORENS_TFMASK_TH +381 0x0001 //TX_DRC_QUIET_FLOOR +382 0x6D60 //TX_RATIODTL_CUT_TH +383 0x0DAC //TX_DT_CUT_K1 384 0x00A5 //TX_OUT_ENER_S_TH_CLEAN 385 0x00A5 //TX_OUT_ENER_S_TH_LESSCLEAN 386 0x00A5 //TX_OUT_ENER_S_TH_NOISY @@ -28446,15 +21759,15 @@ 388 0x00CE //TX_OUT_ENER_TH_SPEECH 389 0x2000 //TX_SN_NPB_GAIN 390 0x0000 //TX_NN_NPB_GAIN -391 0x0000 //TX_CSX_ALPHA_0 -392 0x0000 //TX_CSX_ALPHA_1 -393 0x0000 //TX_CSX_ALPHA_2 -394 0x0000 //TX_CSX_ALPHA_3 -395 0x0800 //TX_MU_ARSP_EST -396 0x00C8 //TX_P_OUTBEAM_MIN_TH +391 0x3000 //TX_POST_MASK_SUP_HSNE +392 0x07D0 //TX_TAIL_DET_TH +393 0x4000 //TX_B_LESSCUT_RTO_WTA +394 0x0000 //TX_MEL_G_R +395 0x0080 //TX_SUPHIGH_TH +396 0x4000 //TX_MASK_G_R 397 0x0002 //TX_EXTRA_NS_L -398 0x0800 //TX_EXTRA_NS_A -399 0x0005 //TX_VR_NOISE_FLOOR_TH +398 0x1800 //TX_C_POST_FLT_MASK +399 0x7FFF //TX_A_POST_FLT_WNS 400 0x0148 //TX_MIN_G_LOW300HZ 401 0x0004 //TX_MAXLEVEL_CNG 402 0x00B4 //TX_STN_NOISE_TH @@ -28569,16 +21882,16 @@ 511 0x6666 //TX_MIC_TO_BFGAIN 512 0x0000 //TX_MICTOBFGAIN0 513 0x0000 //TX_FASTMUE_TH -514 0x0000 //TX_DERVB_LEN_0 -515 0x0000 //TX_DERVB_LEN_1 -516 0x0000 //TX_RHO_DERVB -517 0x0000 //TX_MIC_INDX_DERVB -518 0x0000 //TX_MU_DERVB -519 0x0000 //TX_DR_RESRV_0 -520 0x0000 //TX_DR_RESRV_1 -521 0x0000 //TX_DR_RESRV_2 -522 0x0000 //TX_DR_RESRV_3 -523 0x0000 //TX_DR_RESRV_4 +514 0x3000 //TX_DEREVERB_LF_MU +515 0x34CD //TX_DEREVERB_HF_MU +516 0x0007 //TX_DEREVERB_DELAY +517 0x0004 //TX_DEREVERB_COEF_LEN +518 0x0003 //TX_DEREVERB_DNR +519 0x0000 //TX_DEREVERB_ALPHA +520 0x0000 //TX_DEREVERB_BETA +521 0x0000 //TX_GSC_RTOL_TH +522 0x0000 //TX_GSC_RTOH_TH +523 0x7E2C //TX_WIDE2_MEANHTH 524 0x0000 //TX_DR_RESRV_5 525 0x0000 //TX_DR_RESRV_6 526 0x0000 //TX_DR_RESRV_7 @@ -28626,16 +21939,16 @@ 568 0x5048 //TX_FDEQ_GAIN_1 569 0x4C4C //TX_FDEQ_GAIN_2 570 0x474A //TX_FDEQ_GAIN_3 -571 0x4742 //TX_FDEQ_GAIN_4 -572 0x4241 //TX_FDEQ_GAIN_5 -573 0x403F //TX_FDEQ_GAIN_6 -574 0x433F //TX_FDEQ_GAIN_7 -575 0x3938 //TX_FDEQ_GAIN_8 -576 0x3434 //TX_FDEQ_GAIN_9 -577 0x3530 //TX_FDEQ_GAIN_10 -578 0x3033 //TX_FDEQ_GAIN_11 -579 0x3535 //TX_FDEQ_GAIN_12 -580 0x3D48 //TX_FDEQ_GAIN_13 +571 0x473F //TX_FDEQ_GAIN_4 +572 0x4245 //TX_FDEQ_GAIN_5 +573 0x4B53 //TX_FDEQ_GAIN_6 +574 0x564A //TX_FDEQ_GAIN_7 +575 0x3D3A //TX_FDEQ_GAIN_8 +576 0x3B3C //TX_FDEQ_GAIN_9 +577 0x3C36 //TX_FDEQ_GAIN_10 +578 0x3636 //TX_FDEQ_GAIN_11 +579 0x3D3E //TX_FDEQ_GAIN_12 +580 0x4548 //TX_FDEQ_GAIN_13 581 0x4848 //TX_FDEQ_GAIN_14 582 0x4848 //TX_FDEQ_GAIN_15 583 0x4848 //TX_FDEQ_GAIN_16 @@ -28679,12 +21992,12 @@ 621 0x4848 //TX_PREEQ_GAIN_MIC0_4 622 0x4848 //TX_PREEQ_GAIN_MIC0_5 623 0x4848 //TX_PREEQ_GAIN_MIC0_6 -624 0x4846 //TX_PREEQ_GAIN_MIC0_7 -625 0x4544 //TX_PREEQ_GAIN_MIC0_8 -626 0x4241 //TX_PREEQ_GAIN_MIC0_9 -627 0x403E //TX_PREEQ_GAIN_MIC0_10 -628 0x3D3C //TX_PREEQ_GAIN_MIC0_11 -629 0x3C3C //TX_PREEQ_GAIN_MIC0_12 +624 0x4848 //TX_PREEQ_GAIN_MIC0_7 +625 0x4848 //TX_PREEQ_GAIN_MIC0_8 +626 0x4848 //TX_PREEQ_GAIN_MIC0_9 +627 0x4848 //TX_PREEQ_GAIN_MIC0_10 +628 0x4848 //TX_PREEQ_GAIN_MIC0_11 +629 0x4848 //TX_PREEQ_GAIN_MIC0_12 630 0x4848 //TX_PREEQ_GAIN_MIC0_13 631 0x4848 //TX_PREEQ_GAIN_MIC0_14 632 0x4848 //TX_PREEQ_GAIN_MIC0_15 @@ -28696,19 +22009,19 @@ 638 0x4848 //TX_PREEQ_GAIN_MIC0_21 639 0x4848 //TX_PREEQ_GAIN_MIC0_22 640 0x4848 //TX_PREEQ_GAIN_MIC0_23 -641 0x0202 //TX_PREEQ_BIN_MIC0_0 -642 0x0203 //TX_PREEQ_BIN_MIC0_1 -643 0x0303 //TX_PREEQ_BIN_MIC0_2 -644 0x0304 //TX_PREEQ_BIN_MIC0_3 -645 0x0405 //TX_PREEQ_BIN_MIC0_4 -646 0x0506 //TX_PREEQ_BIN_MIC0_5 -647 0x7008 //TX_PREEQ_BIN_MIC0_6 -648 0x090A //TX_PREEQ_BIN_MIC0_7 -649 0x0B0C //TX_PREEQ_BIN_MIC0_8 -650 0x0F10 //TX_PREEQ_BIN_MIC0_9 -651 0x1011 //TX_PREEQ_BIN_MIC0_10 -652 0x1112 //TX_PREEQ_BIN_MIC0_11 -653 0x1208 //TX_PREEQ_BIN_MIC0_12 +641 0x251A //TX_PREEQ_BIN_MIC0_0 +642 0x0F0F //TX_PREEQ_BIN_MIC0_1 +643 0x0C0C //TX_PREEQ_BIN_MIC0_2 +644 0x0C0F //TX_PREEQ_BIN_MIC0_3 +645 0x0F0F //TX_PREEQ_BIN_MIC0_4 +646 0x0F09 //TX_PREEQ_BIN_MIC0_5 +647 0x0909 //TX_PREEQ_BIN_MIC0_6 +648 0x0908 //TX_PREEQ_BIN_MIC0_7 +649 0x0700 //TX_PREEQ_BIN_MIC0_8 +650 0x0000 //TX_PREEQ_BIN_MIC0_9 +651 0x0000 //TX_PREEQ_BIN_MIC0_10 +652 0x0000 //TX_PREEQ_BIN_MIC0_11 +653 0x0000 //TX_PREEQ_BIN_MIC0_12 654 0x0000 //TX_PREEQ_BIN_MIC0_13 655 0x0000 //TX_PREEQ_BIN_MIC0_14 656 0x0000 //TX_PREEQ_BIN_MIC0_15 @@ -28720,21 +22033,21 @@ 662 0x0000 //TX_PREEQ_BIN_MIC0_21 663 0x0000 //TX_PREEQ_BIN_MIC0_22 664 0x0000 //TX_PREEQ_BIN_MIC0_23 -665 0x0020 //TX_PREEQ_SUBNUM_MIC1 +665 0x0030 //TX_PREEQ_SUBNUM_MIC1 666 0x4848 //TX_PREEQ_GAIN_MIC1_0 667 0x4848 //TX_PREEQ_GAIN_MIC1_1 668 0x4848 //TX_PREEQ_GAIN_MIC1_2 669 0x4848 //TX_PREEQ_GAIN_MIC1_3 670 0x4848 //TX_PREEQ_GAIN_MIC1_4 671 0x4848 //TX_PREEQ_GAIN_MIC1_5 -672 0x4848 //TX_PREEQ_GAIN_MIC1_6 -673 0x4848 //TX_PREEQ_GAIN_MIC1_7 -674 0x484A //TX_PREEQ_GAIN_MIC1_8 -675 0x4B4C //TX_PREEQ_GAIN_MIC1_9 -676 0x4B4A //TX_PREEQ_GAIN_MIC1_10 -677 0x4A48 //TX_PREEQ_GAIN_MIC1_11 -678 0x4C4C //TX_PREEQ_GAIN_MIC1_12 -679 0x4C4C //TX_PREEQ_GAIN_MIC1_13 +672 0x494A //TX_PREEQ_GAIN_MIC1_6 +673 0x4B4C //TX_PREEQ_GAIN_MIC1_7 +674 0x4D4E //TX_PREEQ_GAIN_MIC1_8 +675 0x5051 //TX_PREEQ_GAIN_MIC1_9 +676 0x5255 //TX_PREEQ_GAIN_MIC1_10 +677 0x585A //TX_PREEQ_GAIN_MIC1_11 +678 0x5C5F //TX_PREEQ_GAIN_MIC1_12 +679 0x636A //TX_PREEQ_GAIN_MIC1_13 680 0x4848 //TX_PREEQ_GAIN_MIC1_14 681 0x4848 //TX_PREEQ_GAIN_MIC1_15 682 0x4848 //TX_PREEQ_GAIN_MIC1_16 @@ -28757,8 +22070,8 @@ 699 0x0D0E //TX_PREEQ_BIN_MIC1_9 700 0x0F10 //TX_PREEQ_BIN_MIC1_10 701 0x1011 //TX_PREEQ_BIN_MIC1_11 -702 0x1112 //TX_PREEQ_BIN_MIC1_12 -703 0x120B //TX_PREEQ_BIN_MIC1_13 +702 0x1104 //TX_PREEQ_BIN_MIC1_12 +703 0x101B //TX_PREEQ_BIN_MIC1_13 704 0x0000 //TX_PREEQ_BIN_MIC1_14 705 0x0000 //TX_PREEQ_BIN_MIC1_15 706 0x0000 //TX_PREEQ_BIN_MIC1_16 @@ -28831,7 +22144,7 @@ 773 0x0000 //TX_GAIN_LIMIT_0 774 0x0000 //TX_GAIN_LIMIT_1 775 0x0006 //TX_GAIN_LIMIT_2 -776 0x0006 //TX_GAIN_LIMIT_3 +776 0x0007 //TX_GAIN_LIMIT_3 777 0x7F5B //TX_BVE_NOVAD0_ALPHADOWN 778 0x7FDE //TX_BVE_VAD0_ALPHAUP 779 0x7F3A //TX_BVE_VAD0_ALPHADOWN @@ -28952,6 +22265,71 @@ 894 0xC000 //TX_FASTNS_SSA_THHFL 895 0xCCCC //TX_FASTNS_SSA_THLFH 896 0xD999 //TX_FASTNS_SSA_THHFH +897 0x2339 //TX_SENDFUNC_REG_MICMUTE +898 0x0021 //TX_SENDFUNC_REG_MICMUTE1 +899 0x02BC //TX_MICMUTE_RATIO_THR +900 0x0140 //TX_MICMUTE_AMP_THR +901 0x0004 //TX_MICMUTE_HPF_IND +902 0x00C0 //TX_MICMUTE_LOG_EYR_TH +903 0x0008 //TX_MICMUTE_CVG_TIME +904 0x0008 //TX_MICMUTE_RELEASE_TIME +905 0x01FE //TX_MIC_VOLUME_MIC0MUTE +906 0x0020 //TX_MICMUTE_EPD_OFFSET_0 +907 0x001E //TX_MICMUTE_FRQ_AEC_L +908 0x7999 //TX_MICMUTE_EAD_THR +909 0x7FFF //TX_MICMUTE_LAMBDA_CB_NLE +910 0x7FFF //TX_MICMUTE_LAMBDA_RE_EST +911 0x4000 //TX_DTD_THR1_MICMUTE_0 +912 0x7000 //TX_DTD_THR1_MICMUTE_1 +913 0x7FFF //TX_DTD_THR1_MICMUTE_2 +914 0x7FFF //TX_DTD_THR1_MICMUTE_3 +915 0x6CCC //TX_DTD_THR2_MICMUTE_0 +916 0x0400 //TX_MICMUTE_MIN_EQ_RE_EST_0 +917 0x0400 //TX_MICMUTE_MIN_EQ_RE_EST_1 +918 0x1000 //TX_MICMUTE_MIN_EQ_RE_EST_2 +919 0x7FFF //TX_MICMUTE_MIN_EQ_RE_EST_3 +920 0x7FFF //TX_MICMUTE_MIN_EQ_RE_EST_4 +921 0x4000 //TX_MICMUTE_C_POST_FLT +922 0x03E8 //TX_MICMUTE_DT_CUT_K +923 0x0001 //TX_MICMUTE_DT_CUT_THR +924 0x03E8 //TX_MICMUTE_DT_CUT_K2 +925 0x0001 //TX_MICMUTE_DT_CUT_THR2 +926 0x0064 //TX_MICMUTE_DT2_HOLD_N +927 0x1000 //TX_MICMUTE_RATIODTH_THCUT +928 0x1000 //TX_MICMUTE_B_POST_FLT_ECHOL +929 0x7FFF //TX_MICMUTE_B_POST_FLT_ECHOH +930 0x0400 //TX_MICMUTE_C_POST_FLT_MASK +931 0x7999 //TX_MICMUTE_RATIODTL_CUT_TH +932 0x0258 //TX_MICMUTE_DT_CUT_K1 +933 0x0800 //TX_MICMUTE_N2_SN_EST +934 0xFC00 //TX_MICMUTE_THR_SN_EST_0 +935 0x001C //TX_MICMUTE_MIN_G_CTRL_0 +936 0x6000 //TX_MICMUTE_A_POST_FILT_S_0 +937 0x7000 //TX_MICMUTE_B_POST_FILT_0 +938 0x2710 //TX_MIC1RUB_AMP_THR +939 0x0010 //TX_MIC1MUTE_RATIO_THR +940 0x0450 //TX_MIC1MUTE_AMP_THR +941 0x0008 //TX_MIC1MUTE_CVG_TIME +942 0x0008 //TX_MIC1MUTE_RELEASE_TIME +943 0x0000 //TX_AMS_RESRV_01 +944 0x0000 //TX_AMS_RESRV_02 +945 0x0000 //TX_AMS_RESRV_03 +946 0x0000 //TX_AMS_RESRV_04 +947 0x0000 //TX_AMS_RESRV_05 +948 0x0000 //TX_AMS_RESRV_06 +949 0x0000 //TX_AMS_RESRV_07 +950 0x0000 //TX_AMS_RESRV_08 +951 0x0000 //TX_AMS_RESRV_09 +952 0x0000 //TX_AMS_RESRV_10 +953 0x0000 //TX_AMS_RESRV_11 +954 0x0000 //TX_AMS_RESRV_12 +955 0x0000 //TX_AMS_RESRV_13 +956 0x0000 //TX_AMS_RESRV_14 +957 0x0000 //TX_AMS_RESRV_15 +958 0x0000 //TX_AMS_RESRV_16 +959 0x0000 //TX_AMS_RESRV_17 +960 0x0000 //TX_AMS_RESRV_18 +961 0x0000 //TX_AMS_RESRV_19 #RX 0 0x000C //RX_RECVFUNC_MODE_0 1 0x0000 //RX_RECVFUNC_MODE_1 @@ -29803,14 +23181,866 @@ 110 0x0000 //RX_FDDRC_RESRV_0 129 0x0100 //RX_SPK_VOL 130 0x0000 //RX_VOL_RESRV_0 +#RX 2 +157 0x000C //RX_RECVFUNC_MODE_0 +158 0x0000 //RX_RECVFUNC_MODE_1 +159 0x0001 //RX_SAMPLINGFREQ_SIG +160 0x0001 //RX_SAMPLINGFREQ_PROC +161 0x000A //RX_FRAME_SZ +162 0x0000 //RX_DELAY_OPT +163 0x1000 //RX_TDDRC_ALPHA_UP_1 +164 0x1000 //RX_TDDRC_ALPHA_UP_2 +165 0x1000 //RX_TDDRC_ALPHA_UP_3 +166 0x1000 //RX_TDDRC_ALPHA_UP_4 +167 0x0800 //RX_PGA +168 0x7FFF //RX_A_HP +169 0x4000 //RX_B_PE +170 0x7800 //RX_THR_PITCH_DET_0 +171 0x7000 //RX_THR_PITCH_DET_1 +172 0x6000 //RX_THR_PITCH_DET_2 +173 0x0008 //RX_PITCH_BFR_LEN +174 0x0003 //RX_SBD_PITCH_DET +175 0x0100 //RX_PP_RESRV_0 +176 0x0020 //RX_PP_RESRV_1 +177 0x0400 //RX_N_SN_EST +178 0x000C //RX_N2_SN_EST +179 0x0014 //RX_NS_LVL_CTRL +180 0xF800 //RX_THR_SN_EST +181 0x7E00 //RX_LAMBDA_PFILT +182 0x000A //RX_FENS_RESRV_0 +183 0x0190 //RX_FENS_RESRV_1 +184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +187 0x0002 //RX_EXTRA_NS_L +188 0x0800 //RX_EXTRA_NS_A +189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +190 0x7000 //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +192 0x199A //RX_A_POST_FLT +193 0x0000 //RX_LMT_THRD +194 0x4000 //RX_LMT_ALPHA +195 0x0030 //RX_FDEQ_SUBNUM +196 0x4848 //RX_FDEQ_GAIN_0 +197 0x4848 //RX_FDEQ_GAIN_1 +198 0x4844 //RX_FDEQ_GAIN_2 +199 0x4A4C //RX_FDEQ_GAIN_3 +200 0x4E50 //RX_FDEQ_GAIN_4 +201 0x5254 //RX_FDEQ_GAIN_5 +202 0x5658 //RX_FDEQ_GAIN_6 +203 0x5A5C //RX_FDEQ_GAIN_7 +204 0x5C5C //RX_FDEQ_GAIN_8 +205 0x5C5C //RX_FDEQ_GAIN_9 +206 0x5C5C //RX_FDEQ_GAIN_10 +207 0x5C5C //RX_FDEQ_GAIN_11 +208 0x5C5C //RX_FDEQ_GAIN_12 +209 0x5C5C //RX_FDEQ_GAIN_13 +210 0x4848 //RX_FDEQ_GAIN_14 +211 0x4848 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0202 //RX_FDEQ_BIN_0 +221 0x0203 //RX_FDEQ_BIN_1 +222 0x0402 //RX_FDEQ_BIN_2 +223 0x0505 //RX_FDEQ_BIN_3 +224 0x0505 //RX_FDEQ_BIN_4 +225 0x0505 //RX_FDEQ_BIN_5 +226 0x0505 //RX_FDEQ_BIN_6 +227 0x0505 //RX_FDEQ_BIN_7 +228 0x160C //RX_FDEQ_BIN_8 +229 0x0D0E //RX_FDEQ_BIN_9 +230 0x0E0F //RX_FDEQ_BIN_10 +231 0x0F10 //RX_FDEQ_BIN_11 +232 0x1011 //RX_FDEQ_BIN_12 +233 0x1104 //RX_FDEQ_BIN_13 +234 0x0000 //RX_FDEQ_BIN_14 +235 0x0000 //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x4000 //RX_FDEQ_RESRV_0 +245 0x0320 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0030 //RX_FDDRC_BAND_MARGIN_1 +248 0x0050 //RX_FDDRC_BAND_MARGIN_2 +249 0x0080 //RX_FDDRC_BAND_MARGIN_3 +250 0x0007 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x5000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x6400 //RX_FDDRC_THRD_3_2 +258 0x6400 //RX_FDDRC_THRD_3_3 +259 0x2000 //RX_FDDRC_SLANT_0_0 +260 0x2000 //RX_FDDRC_SLANT_0_1 +261 0x2000 //RX_FDDRC_SLANT_0_2 +262 0x2000 //RX_FDDRC_SLANT_0_3 +263 0x5333 //RX_FDDRC_SLANT_1_0 +264 0x5333 //RX_FDDRC_SLANT_1_1 +265 0x5333 //RX_FDDRC_SLANT_1_2 +266 0x5333 //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +268 0x0002 //RX_FILTINDX +269 0x0000 //RX_TDDRC_THRD_0 +270 0x0000 //RX_TDDRC_THRD_1 +271 0x1800 //RX_TDDRC_THRD_2 +272 0x1800 //RX_TDDRC_THRD_3 +273 0x3000 //RX_TDDRC_SLANT_0 +274 0x6E00 //RX_TDDRC_SLANT_1 +275 0x1000 //RX_TDDRC_ALPHA_UP_0 +276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x199A //RX_TDDRC_HMNC_GAIN +279 0x0001 //RX_TDDRC_SMT_FLAG +280 0x0CCD //RX_TDDRC_SMT_W +281 0x0400 //RX_TDDRC_DRC_GAIN +282 0x7C00 //RX_LAMBDA_PKA_FP +283 0x2000 //RX_TPKA_FP +284 0x2000 //RX_MIN_G_FP +285 0x0080 //RX_MAX_G_FP +286 0x0100 //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 +288 0x0000 //RX_MAXLEVEL_CNG +289 0x3000 //RX_BWE_UV_TH +290 0x3000 //RX_BWE_UV_TH2 +291 0x1800 //RX_BWE_UV_TH3 +292 0x1000 //RX_BWE_V_TH +293 0x04CD //RX_BWE_GAIN1_V_TH1 +294 0x0F33 //RX_BWE_GAIN1_V_TH2 +295 0x7333 //RX_BWE_UV_EQ +296 0x199A //RX_BWE_V_EQ +297 0x7333 //RX_BWE_TONE_TH +298 0x0004 //RX_BWE_UV_HOLD_T +299 0x6CCD //RX_BWE_GAIN2_ALPHA +300 0x799A //RX_BWE_GAIN3_ALPHA +301 0x001E //RX_BWE_CUTOFF +302 0x3000 //RX_BWE_GAINFILL +303 0x3200 //RX_BWE_MAXTH_TONE +304 0x2000 //RX_BWE_EQ_0 +305 0x2000 //RX_BWE_EQ_1 +306 0x2000 //RX_BWE_EQ_2 +307 0x2000 //RX_BWE_EQ_3 +308 0x2000 //RX_BWE_EQ_4 +309 0x2000 //RX_BWE_EQ_5 +310 0x2000 //RX_BWE_EQ_6 +311 0x0000 //RX_BWE_RESRV_0 +312 0x0000 //RX_BWE_RESRV_1 +313 0x0000 //RX_BWE_RESRV_2 +#VOL 0 +163 0x1000 //RX_TDDRC_ALPHA_UP_1 +164 0x1000 //RX_TDDRC_ALPHA_UP_2 +165 0x1000 //RX_TDDRC_ALPHA_UP_3 +166 0x1000 //RX_TDDRC_ALPHA_UP_4 +184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +190 0x7000 //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +269 0x0000 //RX_TDDRC_THRD_0 +270 0x0000 //RX_TDDRC_THRD_1 +271 0x1800 //RX_TDDRC_THRD_2 +272 0x1800 //RX_TDDRC_THRD_3 +273 0x3000 //RX_TDDRC_SLANT_0 +274 0x6E00 //RX_TDDRC_SLANT_1 +275 0x1000 //RX_TDDRC_ALPHA_UP_0 +276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x199A //RX_TDDRC_HMNC_GAIN +279 0x0001 //RX_TDDRC_SMT_FLAG +280 0x0CCD //RX_TDDRC_SMT_W +281 0x0400 //RX_TDDRC_DRC_GAIN +195 0x0030 //RX_FDEQ_SUBNUM +196 0x4848 //RX_FDEQ_GAIN_0 +197 0x4848 //RX_FDEQ_GAIN_1 +198 0x4844 //RX_FDEQ_GAIN_2 +199 0x4A4C //RX_FDEQ_GAIN_3 +200 0x4E50 //RX_FDEQ_GAIN_4 +201 0x5254 //RX_FDEQ_GAIN_5 +202 0x5658 //RX_FDEQ_GAIN_6 +203 0x5A5C //RX_FDEQ_GAIN_7 +204 0x5C5C //RX_FDEQ_GAIN_8 +205 0x5C5C //RX_FDEQ_GAIN_9 +206 0x5C5C //RX_FDEQ_GAIN_10 +207 0x5C5C //RX_FDEQ_GAIN_11 +208 0x5C5C //RX_FDEQ_GAIN_12 +209 0x5C5C //RX_FDEQ_GAIN_13 +210 0x4848 //RX_FDEQ_GAIN_14 +211 0x4848 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0202 //RX_FDEQ_BIN_0 +221 0x0203 //RX_FDEQ_BIN_1 +222 0x0402 //RX_FDEQ_BIN_2 +223 0x0505 //RX_FDEQ_BIN_3 +224 0x0505 //RX_FDEQ_BIN_4 +225 0x0505 //RX_FDEQ_BIN_5 +226 0x0505 //RX_FDEQ_BIN_6 +227 0x0505 //RX_FDEQ_BIN_7 +228 0x160C //RX_FDEQ_BIN_8 +229 0x0D0E //RX_FDEQ_BIN_9 +230 0x0E0F //RX_FDEQ_BIN_10 +231 0x0F10 //RX_FDEQ_BIN_11 +232 0x1011 //RX_FDEQ_BIN_12 +233 0x1104 //RX_FDEQ_BIN_13 +234 0x0000 //RX_FDEQ_BIN_14 +235 0x0000 //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x4000 //RX_FDEQ_RESRV_0 +245 0x0320 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0030 //RX_FDDRC_BAND_MARGIN_1 +248 0x0050 //RX_FDDRC_BAND_MARGIN_2 +249 0x0080 //RX_FDDRC_BAND_MARGIN_3 +250 0x0007 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x5000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x6400 //RX_FDDRC_THRD_3_2 +258 0x6400 //RX_FDDRC_THRD_3_3 +259 0x2000 //RX_FDDRC_SLANT_0_0 +260 0x2000 //RX_FDDRC_SLANT_0_1 +261 0x2000 //RX_FDDRC_SLANT_0_2 +262 0x2000 //RX_FDDRC_SLANT_0_3 +263 0x5333 //RX_FDDRC_SLANT_1_0 +264 0x5333 //RX_FDDRC_SLANT_1_1 +265 0x5333 //RX_FDDRC_SLANT_1_2 +266 0x5333 //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +286 0x0100 //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 +#VOL 1 +163 0x1000 //RX_TDDRC_ALPHA_UP_1 +164 0x1000 //RX_TDDRC_ALPHA_UP_2 +165 0x1000 //RX_TDDRC_ALPHA_UP_3 +166 0x1000 //RX_TDDRC_ALPHA_UP_4 +184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +190 0x7000 //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +269 0x0000 //RX_TDDRC_THRD_0 +270 0x0000 //RX_TDDRC_THRD_1 +271 0x1800 //RX_TDDRC_THRD_2 +272 0x1800 //RX_TDDRC_THRD_3 +273 0x3000 //RX_TDDRC_SLANT_0 +274 0x6E00 //RX_TDDRC_SLANT_1 +275 0x1000 //RX_TDDRC_ALPHA_UP_0 +276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x199A //RX_TDDRC_HMNC_GAIN +279 0x0001 //RX_TDDRC_SMT_FLAG +280 0x0CCD //RX_TDDRC_SMT_W +281 0x0400 //RX_TDDRC_DRC_GAIN +195 0x0030 //RX_FDEQ_SUBNUM +196 0x4848 //RX_FDEQ_GAIN_0 +197 0x4848 //RX_FDEQ_GAIN_1 +198 0x4844 //RX_FDEQ_GAIN_2 +199 0x4A4C //RX_FDEQ_GAIN_3 +200 0x4E50 //RX_FDEQ_GAIN_4 +201 0x5254 //RX_FDEQ_GAIN_5 +202 0x5658 //RX_FDEQ_GAIN_6 +203 0x5A5C //RX_FDEQ_GAIN_7 +204 0x5C5C //RX_FDEQ_GAIN_8 +205 0x5C5C //RX_FDEQ_GAIN_9 +206 0x5C5C //RX_FDEQ_GAIN_10 +207 0x5C5C //RX_FDEQ_GAIN_11 +208 0x5C5C //RX_FDEQ_GAIN_12 +209 0x5C5C //RX_FDEQ_GAIN_13 +210 0x4848 //RX_FDEQ_GAIN_14 +211 0x4848 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0202 //RX_FDEQ_BIN_0 +221 0x0203 //RX_FDEQ_BIN_1 +222 0x0402 //RX_FDEQ_BIN_2 +223 0x0505 //RX_FDEQ_BIN_3 +224 0x0505 //RX_FDEQ_BIN_4 +225 0x0505 //RX_FDEQ_BIN_5 +226 0x0505 //RX_FDEQ_BIN_6 +227 0x0505 //RX_FDEQ_BIN_7 +228 0x160C //RX_FDEQ_BIN_8 +229 0x0D0E //RX_FDEQ_BIN_9 +230 0x0E0F //RX_FDEQ_BIN_10 +231 0x0F10 //RX_FDEQ_BIN_11 +232 0x1011 //RX_FDEQ_BIN_12 +233 0x1104 //RX_FDEQ_BIN_13 +234 0x0000 //RX_FDEQ_BIN_14 +235 0x0000 //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x4000 //RX_FDEQ_RESRV_0 +245 0x0320 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0030 //RX_FDDRC_BAND_MARGIN_1 +248 0x0050 //RX_FDDRC_BAND_MARGIN_2 +249 0x0080 //RX_FDDRC_BAND_MARGIN_3 +250 0x0007 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x5000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x6400 //RX_FDDRC_THRD_3_2 +258 0x6400 //RX_FDDRC_THRD_3_3 +259 0x2000 //RX_FDDRC_SLANT_0_0 +260 0x2000 //RX_FDDRC_SLANT_0_1 +261 0x2000 //RX_FDDRC_SLANT_0_2 +262 0x2000 //RX_FDDRC_SLANT_0_3 +263 0x5333 //RX_FDDRC_SLANT_1_0 +264 0x5333 //RX_FDDRC_SLANT_1_1 +265 0x5333 //RX_FDDRC_SLANT_1_2 +266 0x5333 //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +286 0x0100 //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 +#VOL 2 +163 0x1000 //RX_TDDRC_ALPHA_UP_1 +164 0x1000 //RX_TDDRC_ALPHA_UP_2 +165 0x1000 //RX_TDDRC_ALPHA_UP_3 +166 0x1000 //RX_TDDRC_ALPHA_UP_4 +184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +190 0x7000 //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +269 0x0000 //RX_TDDRC_THRD_0 +270 0x0000 //RX_TDDRC_THRD_1 +271 0x1800 //RX_TDDRC_THRD_2 +272 0x1800 //RX_TDDRC_THRD_3 +273 0x3000 //RX_TDDRC_SLANT_0 +274 0x6E00 //RX_TDDRC_SLANT_1 +275 0x1000 //RX_TDDRC_ALPHA_UP_0 +276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x199A //RX_TDDRC_HMNC_GAIN +279 0x0001 //RX_TDDRC_SMT_FLAG +280 0x0CCD //RX_TDDRC_SMT_W +281 0x0400 //RX_TDDRC_DRC_GAIN +195 0x0030 //RX_FDEQ_SUBNUM +196 0x4848 //RX_FDEQ_GAIN_0 +197 0x4848 //RX_FDEQ_GAIN_1 +198 0x4844 //RX_FDEQ_GAIN_2 +199 0x4A4C //RX_FDEQ_GAIN_3 +200 0x4E50 //RX_FDEQ_GAIN_4 +201 0x5254 //RX_FDEQ_GAIN_5 +202 0x5658 //RX_FDEQ_GAIN_6 +203 0x5A5C //RX_FDEQ_GAIN_7 +204 0x5C5C //RX_FDEQ_GAIN_8 +205 0x5C5C //RX_FDEQ_GAIN_9 +206 0x5C5C //RX_FDEQ_GAIN_10 +207 0x5C5C //RX_FDEQ_GAIN_11 +208 0x5C5C //RX_FDEQ_GAIN_12 +209 0x5C5C //RX_FDEQ_GAIN_13 +210 0x4848 //RX_FDEQ_GAIN_14 +211 0x4848 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0202 //RX_FDEQ_BIN_0 +221 0x0203 //RX_FDEQ_BIN_1 +222 0x0402 //RX_FDEQ_BIN_2 +223 0x0505 //RX_FDEQ_BIN_3 +224 0x0505 //RX_FDEQ_BIN_4 +225 0x0505 //RX_FDEQ_BIN_5 +226 0x0505 //RX_FDEQ_BIN_6 +227 0x0505 //RX_FDEQ_BIN_7 +228 0x160C //RX_FDEQ_BIN_8 +229 0x0D0E //RX_FDEQ_BIN_9 +230 0x0E0F //RX_FDEQ_BIN_10 +231 0x0F10 //RX_FDEQ_BIN_11 +232 0x1011 //RX_FDEQ_BIN_12 +233 0x1104 //RX_FDEQ_BIN_13 +234 0x0000 //RX_FDEQ_BIN_14 +235 0x0000 //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x4000 //RX_FDEQ_RESRV_0 +245 0x0320 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0030 //RX_FDDRC_BAND_MARGIN_1 +248 0x0050 //RX_FDDRC_BAND_MARGIN_2 +249 0x0080 //RX_FDDRC_BAND_MARGIN_3 +250 0x0007 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x5000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x6400 //RX_FDDRC_THRD_3_2 +258 0x6400 //RX_FDDRC_THRD_3_3 +259 0x2000 //RX_FDDRC_SLANT_0_0 +260 0x2000 //RX_FDDRC_SLANT_0_1 +261 0x2000 //RX_FDDRC_SLANT_0_2 +262 0x2000 //RX_FDDRC_SLANT_0_3 +263 0x5333 //RX_FDDRC_SLANT_1_0 +264 0x5333 //RX_FDDRC_SLANT_1_1 +265 0x5333 //RX_FDDRC_SLANT_1_2 +266 0x5333 //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +286 0x0100 //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 +#VOL 3 +163 0x1000 //RX_TDDRC_ALPHA_UP_1 +164 0x1000 //RX_TDDRC_ALPHA_UP_2 +165 0x1000 //RX_TDDRC_ALPHA_UP_3 +166 0x1000 //RX_TDDRC_ALPHA_UP_4 +184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +190 0x7000 //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +269 0x0000 //RX_TDDRC_THRD_0 +270 0x0000 //RX_TDDRC_THRD_1 +271 0x1800 //RX_TDDRC_THRD_2 +272 0x1800 //RX_TDDRC_THRD_3 +273 0x3000 //RX_TDDRC_SLANT_0 +274 0x6E00 //RX_TDDRC_SLANT_1 +275 0x1000 //RX_TDDRC_ALPHA_UP_0 +276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x199A //RX_TDDRC_HMNC_GAIN +279 0x0001 //RX_TDDRC_SMT_FLAG +280 0x0CCD //RX_TDDRC_SMT_W +281 0x0400 //RX_TDDRC_DRC_GAIN +195 0x0030 //RX_FDEQ_SUBNUM +196 0x4848 //RX_FDEQ_GAIN_0 +197 0x4848 //RX_FDEQ_GAIN_1 +198 0x4844 //RX_FDEQ_GAIN_2 +199 0x4A4C //RX_FDEQ_GAIN_3 +200 0x4E50 //RX_FDEQ_GAIN_4 +201 0x5254 //RX_FDEQ_GAIN_5 +202 0x5658 //RX_FDEQ_GAIN_6 +203 0x5A5C //RX_FDEQ_GAIN_7 +204 0x5C5C //RX_FDEQ_GAIN_8 +205 0x5C5C //RX_FDEQ_GAIN_9 +206 0x5C5C //RX_FDEQ_GAIN_10 +207 0x5C5C //RX_FDEQ_GAIN_11 +208 0x5C5C //RX_FDEQ_GAIN_12 +209 0x5C5C //RX_FDEQ_GAIN_13 +210 0x4848 //RX_FDEQ_GAIN_14 +211 0x4848 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0202 //RX_FDEQ_BIN_0 +221 0x0203 //RX_FDEQ_BIN_1 +222 0x0402 //RX_FDEQ_BIN_2 +223 0x0505 //RX_FDEQ_BIN_3 +224 0x0505 //RX_FDEQ_BIN_4 +225 0x0505 //RX_FDEQ_BIN_5 +226 0x0505 //RX_FDEQ_BIN_6 +227 0x0505 //RX_FDEQ_BIN_7 +228 0x160C //RX_FDEQ_BIN_8 +229 0x0D0E //RX_FDEQ_BIN_9 +230 0x0E0F //RX_FDEQ_BIN_10 +231 0x0F10 //RX_FDEQ_BIN_11 +232 0x1011 //RX_FDEQ_BIN_12 +233 0x1104 //RX_FDEQ_BIN_13 +234 0x0000 //RX_FDEQ_BIN_14 +235 0x0000 //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x4000 //RX_FDEQ_RESRV_0 +245 0x0320 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0030 //RX_FDDRC_BAND_MARGIN_1 +248 0x0050 //RX_FDDRC_BAND_MARGIN_2 +249 0x0080 //RX_FDDRC_BAND_MARGIN_3 +250 0x0007 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x5000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x6400 //RX_FDDRC_THRD_3_2 +258 0x6400 //RX_FDDRC_THRD_3_3 +259 0x2000 //RX_FDDRC_SLANT_0_0 +260 0x2000 //RX_FDDRC_SLANT_0_1 +261 0x2000 //RX_FDDRC_SLANT_0_2 +262 0x2000 //RX_FDDRC_SLANT_0_3 +263 0x5333 //RX_FDDRC_SLANT_1_0 +264 0x5333 //RX_FDDRC_SLANT_1_1 +265 0x5333 //RX_FDDRC_SLANT_1_2 +266 0x5333 //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +286 0x0100 //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 +#VOL 4 +163 0x1000 //RX_TDDRC_ALPHA_UP_1 +164 0x1000 //RX_TDDRC_ALPHA_UP_2 +165 0x1000 //RX_TDDRC_ALPHA_UP_3 +166 0x1000 //RX_TDDRC_ALPHA_UP_4 +184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +190 0x7000 //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +269 0x0000 //RX_TDDRC_THRD_0 +270 0x0000 //RX_TDDRC_THRD_1 +271 0x1800 //RX_TDDRC_THRD_2 +272 0x1800 //RX_TDDRC_THRD_3 +273 0x3000 //RX_TDDRC_SLANT_0 +274 0x6E00 //RX_TDDRC_SLANT_1 +275 0x1000 //RX_TDDRC_ALPHA_UP_0 +276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x199A //RX_TDDRC_HMNC_GAIN +279 0x0001 //RX_TDDRC_SMT_FLAG +280 0x0CCD //RX_TDDRC_SMT_W +281 0x0400 //RX_TDDRC_DRC_GAIN +195 0x0030 //RX_FDEQ_SUBNUM +196 0x4848 //RX_FDEQ_GAIN_0 +197 0x4848 //RX_FDEQ_GAIN_1 +198 0x4844 //RX_FDEQ_GAIN_2 +199 0x4A4C //RX_FDEQ_GAIN_3 +200 0x4E50 //RX_FDEQ_GAIN_4 +201 0x5254 //RX_FDEQ_GAIN_5 +202 0x5658 //RX_FDEQ_GAIN_6 +203 0x5A5C //RX_FDEQ_GAIN_7 +204 0x5C5C //RX_FDEQ_GAIN_8 +205 0x5C5C //RX_FDEQ_GAIN_9 +206 0x5C5C //RX_FDEQ_GAIN_10 +207 0x5C5C //RX_FDEQ_GAIN_11 +208 0x5C5C //RX_FDEQ_GAIN_12 +209 0x5C5C //RX_FDEQ_GAIN_13 +210 0x4848 //RX_FDEQ_GAIN_14 +211 0x4848 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0202 //RX_FDEQ_BIN_0 +221 0x0203 //RX_FDEQ_BIN_1 +222 0x0402 //RX_FDEQ_BIN_2 +223 0x0505 //RX_FDEQ_BIN_3 +224 0x0505 //RX_FDEQ_BIN_4 +225 0x0505 //RX_FDEQ_BIN_5 +226 0x0505 //RX_FDEQ_BIN_6 +227 0x0505 //RX_FDEQ_BIN_7 +228 0x160C //RX_FDEQ_BIN_8 +229 0x0D0E //RX_FDEQ_BIN_9 +230 0x0E0F //RX_FDEQ_BIN_10 +231 0x0F10 //RX_FDEQ_BIN_11 +232 0x1011 //RX_FDEQ_BIN_12 +233 0x1104 //RX_FDEQ_BIN_13 +234 0x0000 //RX_FDEQ_BIN_14 +235 0x0000 //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x4000 //RX_FDEQ_RESRV_0 +245 0x0320 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0030 //RX_FDDRC_BAND_MARGIN_1 +248 0x0050 //RX_FDDRC_BAND_MARGIN_2 +249 0x0080 //RX_FDDRC_BAND_MARGIN_3 +250 0x0007 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x5000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x6400 //RX_FDDRC_THRD_3_2 +258 0x6400 //RX_FDDRC_THRD_3_3 +259 0x2000 //RX_FDDRC_SLANT_0_0 +260 0x2000 //RX_FDDRC_SLANT_0_1 +261 0x2000 //RX_FDDRC_SLANT_0_2 +262 0x2000 //RX_FDDRC_SLANT_0_3 +263 0x5333 //RX_FDDRC_SLANT_1_0 +264 0x5333 //RX_FDDRC_SLANT_1_1 +265 0x5333 //RX_FDDRC_SLANT_1_2 +266 0x5333 //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +286 0x0100 //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 +#VOL 5 +163 0x1000 //RX_TDDRC_ALPHA_UP_1 +164 0x1000 //RX_TDDRC_ALPHA_UP_2 +165 0x1000 //RX_TDDRC_ALPHA_UP_3 +166 0x1000 //RX_TDDRC_ALPHA_UP_4 +184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +190 0x7000 //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +269 0x0000 //RX_TDDRC_THRD_0 +270 0x0000 //RX_TDDRC_THRD_1 +271 0x1800 //RX_TDDRC_THRD_2 +272 0x1800 //RX_TDDRC_THRD_3 +273 0x3000 //RX_TDDRC_SLANT_0 +274 0x6E00 //RX_TDDRC_SLANT_1 +275 0x1000 //RX_TDDRC_ALPHA_UP_0 +276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x199A //RX_TDDRC_HMNC_GAIN +279 0x0001 //RX_TDDRC_SMT_FLAG +280 0x0CCD //RX_TDDRC_SMT_W +281 0x0400 //RX_TDDRC_DRC_GAIN +195 0x0030 //RX_FDEQ_SUBNUM +196 0x4848 //RX_FDEQ_GAIN_0 +197 0x4848 //RX_FDEQ_GAIN_1 +198 0x4844 //RX_FDEQ_GAIN_2 +199 0x4A4C //RX_FDEQ_GAIN_3 +200 0x4E50 //RX_FDEQ_GAIN_4 +201 0x5254 //RX_FDEQ_GAIN_5 +202 0x5658 //RX_FDEQ_GAIN_6 +203 0x5A5C //RX_FDEQ_GAIN_7 +204 0x5C5C //RX_FDEQ_GAIN_8 +205 0x5C5C //RX_FDEQ_GAIN_9 +206 0x5C5C //RX_FDEQ_GAIN_10 +207 0x5C5C //RX_FDEQ_GAIN_11 +208 0x5C5C //RX_FDEQ_GAIN_12 +209 0x5C5C //RX_FDEQ_GAIN_13 +210 0x4848 //RX_FDEQ_GAIN_14 +211 0x4848 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0202 //RX_FDEQ_BIN_0 +221 0x0203 //RX_FDEQ_BIN_1 +222 0x0402 //RX_FDEQ_BIN_2 +223 0x0505 //RX_FDEQ_BIN_3 +224 0x0505 //RX_FDEQ_BIN_4 +225 0x0505 //RX_FDEQ_BIN_5 +226 0x0505 //RX_FDEQ_BIN_6 +227 0x0505 //RX_FDEQ_BIN_7 +228 0x160C //RX_FDEQ_BIN_8 +229 0x0D0E //RX_FDEQ_BIN_9 +230 0x0E0F //RX_FDEQ_BIN_10 +231 0x0F10 //RX_FDEQ_BIN_11 +232 0x1011 //RX_FDEQ_BIN_12 +233 0x1104 //RX_FDEQ_BIN_13 +234 0x0000 //RX_FDEQ_BIN_14 +235 0x0000 //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x4000 //RX_FDEQ_RESRV_0 +245 0x0320 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0030 //RX_FDDRC_BAND_MARGIN_1 +248 0x0050 //RX_FDDRC_BAND_MARGIN_2 +249 0x0080 //RX_FDDRC_BAND_MARGIN_3 +250 0x0007 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x5000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x6400 //RX_FDDRC_THRD_3_2 +258 0x6400 //RX_FDDRC_THRD_3_3 +259 0x2000 //RX_FDDRC_SLANT_0_0 +260 0x2000 //RX_FDDRC_SLANT_0_1 +261 0x2000 //RX_FDDRC_SLANT_0_2 +262 0x2000 //RX_FDDRC_SLANT_0_3 +263 0x5333 //RX_FDDRC_SLANT_1_0 +264 0x5333 //RX_FDDRC_SLANT_1_1 +265 0x5333 //RX_FDDRC_SLANT_1_2 +266 0x5333 //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +286 0x0100 //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 +#VOL 6 +163 0x1000 //RX_TDDRC_ALPHA_UP_1 +164 0x1000 //RX_TDDRC_ALPHA_UP_2 +165 0x1000 //RX_TDDRC_ALPHA_UP_3 +166 0x1000 //RX_TDDRC_ALPHA_UP_4 +184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +190 0x7000 //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +269 0x0000 //RX_TDDRC_THRD_0 +270 0x0000 //RX_TDDRC_THRD_1 +271 0x1800 //RX_TDDRC_THRD_2 +272 0x1800 //RX_TDDRC_THRD_3 +273 0x3000 //RX_TDDRC_SLANT_0 +274 0x6E00 //RX_TDDRC_SLANT_1 +275 0x1000 //RX_TDDRC_ALPHA_UP_0 +276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x199A //RX_TDDRC_HMNC_GAIN +279 0x0001 //RX_TDDRC_SMT_FLAG +280 0x0CCD //RX_TDDRC_SMT_W +281 0x0400 //RX_TDDRC_DRC_GAIN +195 0x0030 //RX_FDEQ_SUBNUM +196 0x4848 //RX_FDEQ_GAIN_0 +197 0x4848 //RX_FDEQ_GAIN_1 +198 0x4844 //RX_FDEQ_GAIN_2 +199 0x4A4C //RX_FDEQ_GAIN_3 +200 0x4E50 //RX_FDEQ_GAIN_4 +201 0x5254 //RX_FDEQ_GAIN_5 +202 0x5658 //RX_FDEQ_GAIN_6 +203 0x5A5C //RX_FDEQ_GAIN_7 +204 0x5C5C //RX_FDEQ_GAIN_8 +205 0x5C5C //RX_FDEQ_GAIN_9 +206 0x5C5C //RX_FDEQ_GAIN_10 +207 0x5C5C //RX_FDEQ_GAIN_11 +208 0x5C5C //RX_FDEQ_GAIN_12 +209 0x5C5C //RX_FDEQ_GAIN_13 +210 0x4848 //RX_FDEQ_GAIN_14 +211 0x4848 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0202 //RX_FDEQ_BIN_0 +221 0x0203 //RX_FDEQ_BIN_1 +222 0x0402 //RX_FDEQ_BIN_2 +223 0x0505 //RX_FDEQ_BIN_3 +224 0x0505 //RX_FDEQ_BIN_4 +225 0x0505 //RX_FDEQ_BIN_5 +226 0x0505 //RX_FDEQ_BIN_6 +227 0x0505 //RX_FDEQ_BIN_7 +228 0x160C //RX_FDEQ_BIN_8 +229 0x0D0E //RX_FDEQ_BIN_9 +230 0x0E0F //RX_FDEQ_BIN_10 +231 0x0F10 //RX_FDEQ_BIN_11 +232 0x1011 //RX_FDEQ_BIN_12 +233 0x1104 //RX_FDEQ_BIN_13 +234 0x0000 //RX_FDEQ_BIN_14 +235 0x0000 //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x4000 //RX_FDEQ_RESRV_0 +245 0x0320 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0030 //RX_FDDRC_BAND_MARGIN_1 +248 0x0050 //RX_FDDRC_BAND_MARGIN_2 +249 0x0080 //RX_FDDRC_BAND_MARGIN_3 +250 0x0007 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x5000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x6400 //RX_FDDRC_THRD_3_2 +258 0x6400 //RX_FDDRC_THRD_3_3 +259 0x2000 //RX_FDDRC_SLANT_0_0 +260 0x2000 //RX_FDDRC_SLANT_0_1 +261 0x2000 //RX_FDDRC_SLANT_0_2 +262 0x2000 //RX_FDDRC_SLANT_0_3 +263 0x5333 //RX_FDDRC_SLANT_1_0 +264 0x5333 //RX_FDDRC_SLANT_1_1 +265 0x5333 //RX_FDDRC_SLANT_1_2 +266 0x5333 //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +286 0x0100 //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 -#CASE_NAME HANDSET-HANDSET_HAC-TMOBILE_US-SWB -#PARAM_TYPE TX+RX -#TOTAL_CUSTOM_STEP 7 +#CASE_NAME HANDSET-HANDSET_HAC-VOICE_GENERIC-SWB +#PARAM_MODE Full +#PARAM_TYPE TX+2RX +#TOTAL_CUSTOM_STEP 7+7 #TX 0 0x0000 //TX_OPERATION_MODE_0 1 0x0000 //TX_OPERATION_MODE_1 -2 0x0026 //TX_PATCH_REG +2 0x0076 //TX_PATCH_REG 3 0x6F7E //TX_SENDFUNC_MODE_0 4 0x0001 //TX_SENDFUNC_MODE_1 5 0x0002 //TX_NUM_MIC @@ -29829,7 +24059,7 @@ 18 0x0000 //TX_SYS_RESRV_2 19 0x0000 //TX_SYS_RESRV_3 20 0x0000 //TX_DIST2REF0 -21 0x009D //TX_DIST2REF1 +21 0x00A3 //TX_DIST2REF1 22 0x0000 //TX_DIST2REF_02 23 0x0000 //TX_DIST2REF_03 24 0x0000 //TX_DIST2REF_04 @@ -30059,12 +24289,12 @@ 248 0xF800 //TX_THR_SN_EST_6 249 0xF700 //TX_THR_SN_EST_7 250 0x0000 //TX_DELTA_THR_SN_EST_0 -251 0x0100 //TX_DELTA_THR_SN_EST_1 +251 0x0200 //TX_DELTA_THR_SN_EST_1 252 0x0200 //TX_DELTA_THR_SN_EST_2 253 0x0200 //TX_DELTA_THR_SN_EST_3 -254 0x0200 //TX_DELTA_THR_SN_EST_4 -255 0x0100 //TX_DELTA_THR_SN_EST_5 -256 0x0200 //TX_DELTA_THR_SN_EST_6 +254 0x0100 //TX_DELTA_THR_SN_EST_4 +255 0x0200 //TX_DELTA_THR_SN_EST_5 +256 0x0100 //TX_DELTA_THR_SN_EST_6 257 0x0200 //TX_DELTA_THR_SN_EST_7 258 0x4000 //TX_LAMBDA_NN_EST_0 259 0x4000 //TX_LAMBDA_NN_EST_1 @@ -30090,18 +24320,18 @@ 279 0x1000 //TX_B_POST_FLT_0 280 0x1000 //TX_B_POST_FLT_1 281 0x0014 //TX_NS_LVL_CTRL_0 -282 0x0016 //TX_NS_LVL_CTRL_1 -283 0x002C //TX_NS_LVL_CTRL_2 -284 0x0016 //TX_NS_LVL_CTRL_3 -285 0x0018 //TX_NS_LVL_CTRL_4 -286 0x0016 //TX_NS_LVL_CTRL_5 -287 0x0012 //TX_NS_LVL_CTRL_6 +282 0x002C //TX_NS_LVL_CTRL_1 +283 0x0016 //TX_NS_LVL_CTRL_2 +284 0x0018 //TX_NS_LVL_CTRL_3 +285 0x0016 //TX_NS_LVL_CTRL_4 +286 0x0012 //TX_NS_LVL_CTRL_5 +287 0x0016 //TX_NS_LVL_CTRL_6 288 0x0017 //TX_NS_LVL_CTRL_7 289 0x000E //TX_MIN_GAIN_S_0 -290 0x0012 //TX_MIN_GAIN_S_1 -291 0x000D //TX_MIN_GAIN_S_2 -292 0x0012 //TX_MIN_GAIN_S_3 -293 0x0010 //TX_MIN_GAIN_S_4 +290 0x000D //TX_MIN_GAIN_S_1 +291 0x0012 //TX_MIN_GAIN_S_2 +292 0x0010 //TX_MIN_GAIN_S_3 +293 0x0012 //TX_MIN_GAIN_S_4 294 0x0012 //TX_MIN_GAIN_S_5 295 0x0012 //TX_MIN_GAIN_S_6 296 0x0012 //TX_MIN_GAIN_S_7 @@ -30123,29 +24353,29 @@ 312 0x7FFF //TX_A_POST_FILT_0 313 0x2000 //TX_A_POST_FILT_1 314 0x4000 //TX_A_POST_FILT_S_0 -315 0x5000 //TX_A_POST_FILT_S_1 +315 0x4000 //TX_A_POST_FILT_S_1 316 0x4000 //TX_A_POST_FILT_S_2 317 0x4000 //TX_A_POST_FILT_S_3 318 0x4000 //TX_A_POST_FILT_S_4 319 0x4000 //TX_A_POST_FILT_S_5 -320 0x4000 //TX_A_POST_FILT_S_6 +320 0x5000 //TX_A_POST_FILT_S_6 321 0x7000 //TX_A_POST_FILT_S_7 322 0x1000 //TX_B_POST_FILT_0 323 0x1000 //TX_B_POST_FILT_1 -324 0x3000 //TX_B_POST_FILT_2 -325 0x1000 //TX_B_POST_FILT_3 -326 0x5000 //TX_B_POST_FILT_4 -327 0x2000 //TX_B_POST_FILT_5 -328 0x6000 //TX_B_POST_FILT_6 +324 0x2000 //TX_B_POST_FILT_2 +325 0x2000 //TX_B_POST_FILT_3 +326 0x2000 //TX_B_POST_FILT_4 +327 0x1000 //TX_B_POST_FILT_5 +328 0x3000 //TX_B_POST_FILT_6 329 0x3000 //TX_B_POST_FILT_7 330 0x1000 //TX_B_LESSCUT_RTO_S_0 -331 0x6000 //TX_B_LESSCUT_RTO_S_1 -332 0x6000 //TX_B_LESSCUT_RTO_S_2 -333 0x6000 //TX_B_LESSCUT_RTO_S_3 -334 0x6000 //TX_B_LESSCUT_RTO_S_4 -335 0x6000 //TX_B_LESSCUT_RTO_S_5 -336 0x7FFF //TX_B_LESSCUT_RTO_S_6 -337 0x7FFF //TX_B_LESSCUT_RTO_S_7 +331 0x1000 //TX_B_LESSCUT_RTO_S_1 +332 0x1000 //TX_B_LESSCUT_RTO_S_2 +333 0x1000 //TX_B_LESSCUT_RTO_S_3 +334 0x1000 //TX_B_LESSCUT_RTO_S_4 +335 0x1000 //TX_B_LESSCUT_RTO_S_5 +336 0x1000 //TX_B_LESSCUT_RTO_S_6 +337 0x1000 //TX_B_LESSCUT_RTO_S_7 338 0x7E14 //TX_LAMBDA_PFILT 339 0x7C29 //TX_LAMBDA_PFILT_S_0 340 0x7C29 //TX_LAMBDA_PFILT_S_1 @@ -30188,10 +24418,10 @@ 377 0x4E20 //TX_NOISE_TH_5_4 378 0x1194 //TX_NOISE_TH_6 379 0x0014 //TX_MINENOISE_TH -380 0x4000 //TX_MINENOISE_MIC0_TH_MTS -381 0xFFEE //TX_MINENOISE_MIC0_TH_EXP -382 0x6000 //TX_MINENOISE_MIC0_S_TH_MTS -383 0xFFF3 //TX_MINENOISE_MIC0_S_TH_EXP +380 0xD508 //TX_MORENS_TFMASK_TH +381 0x0001 //TX_DRC_QUIET_FLOOR +382 0x6D60 //TX_RATIODTL_CUT_TH +383 0x0DAC //TX_DT_CUT_K1 384 0x00A5 //TX_OUT_ENER_S_TH_CLEAN 385 0x00A5 //TX_OUT_ENER_S_TH_LESSCLEAN 386 0x00A5 //TX_OUT_ENER_S_TH_NOISY @@ -30199,15 +24429,15 @@ 388 0x0200 //TX_OUT_ENER_TH_SPEECH 389 0x2000 //TX_SN_NPB_GAIN 390 0x0000 //TX_NN_NPB_GAIN -391 0x0000 //TX_CSX_ALPHA_0 -392 0x0000 //TX_CSX_ALPHA_1 -393 0x0000 //TX_CSX_ALPHA_2 -394 0x0000 //TX_CSX_ALPHA_3 -395 0x0800 //TX_MU_ARSP_EST -396 0x00C8 //TX_P_OUTBEAM_MIN_TH +391 0x3000 //TX_POST_MASK_SUP_HSNE +392 0x07D0 //TX_TAIL_DET_TH +393 0x4000 //TX_B_LESSCUT_RTO_WTA +394 0x0000 //TX_MEL_G_R +395 0x0080 //TX_SUPHIGH_TH +396 0x0000 //TX_MASK_G_R 397 0x0002 //TX_EXTRA_NS_L -398 0x0800 //TX_EXTRA_NS_A -399 0x0005 //TX_VR_NOISE_FLOOR_TH +398 0x1800 //TX_C_POST_FLT_MASK +399 0x7FFF //TX_A_POST_FLT_WNS 400 0x0148 //TX_MIN_G_LOW300HZ 401 0x0004 //TX_MAXLEVEL_CNG 402 0x00B4 //TX_STN_NOISE_TH @@ -30322,16 +24552,16 @@ 511 0x6666 //TX_MIC_TO_BFGAIN 512 0x0000 //TX_MICTOBFGAIN0 513 0x0000 //TX_FASTMUE_TH -514 0x0000 //TX_DERVB_LEN_0 -515 0x0000 //TX_DERVB_LEN_1 -516 0x0000 //TX_RHO_DERVB -517 0x0000 //TX_MIC_INDX_DERVB -518 0x0000 //TX_MU_DERVB -519 0x0000 //TX_DR_RESRV_0 -520 0x0000 //TX_DR_RESRV_1 -521 0x0000 //TX_DR_RESRV_2 -522 0x0000 //TX_DR_RESRV_3 -523 0x0000 //TX_DR_RESRV_4 +514 0x2CCC //TX_DEREVERB_LF_MU +515 0x3200 //TX_DEREVERB_HF_MU +516 0x0007 //TX_DEREVERB_DELAY +517 0x0004 //TX_DEREVERB_COEF_LEN +518 0x0003 //TX_DEREVERB_DNR +519 0x0000 //TX_DEREVERB_ALPHA +520 0x0000 //TX_DEREVERB_BETA +521 0x3A98 //TX_GSC_RTOL_TH +522 0x3A98 //TX_GSC_RTOH_TH +523 0x7E2C //TX_WIDE2_MEANHTH 524 0x0000 //TX_DR_RESRV_5 525 0x0000 //TX_DR_RESRV_6 526 0x0000 //TX_DR_RESRV_7 @@ -30378,19 +24608,19 @@ 567 0x5C54 //TX_FDEQ_GAIN_0 568 0x5048 //TX_FDEQ_GAIN_1 569 0x4C4C //TX_FDEQ_GAIN_2 -570 0x474F //TX_FDEQ_GAIN_3 -571 0x4842 //TX_FDEQ_GAIN_4 -572 0x4541 //TX_FDEQ_GAIN_5 -573 0x4247 //TX_FDEQ_GAIN_6 -574 0x4743 //TX_FDEQ_GAIN_7 -575 0x4445 //TX_FDEQ_GAIN_8 -576 0x4750 //TX_FDEQ_GAIN_9 -577 0x3F48 //TX_FDEQ_GAIN_10 -578 0x4844 //TX_FDEQ_GAIN_11 -579 0x3E48 //TX_FDEQ_GAIN_12 -580 0x4E4A //TX_FDEQ_GAIN_13 -581 0x5459 //TX_FDEQ_GAIN_14 -582 0x6448 //TX_FDEQ_GAIN_15 +570 0x494D //TX_FDEQ_GAIN_3 +571 0x4442 //TX_FDEQ_GAIN_4 +572 0x4448 //TX_FDEQ_GAIN_5 +573 0x4C53 //TX_FDEQ_GAIN_6 +574 0x6244 //TX_FDEQ_GAIN_7 +575 0x4348 //TX_FDEQ_GAIN_8 +576 0x4848 //TX_FDEQ_GAIN_9 +577 0x4A49 //TX_FDEQ_GAIN_10 +578 0x4E4A //TX_FDEQ_GAIN_11 +579 0x4840 //TX_FDEQ_GAIN_12 +580 0x4040 //TX_FDEQ_GAIN_13 +581 0x4054 //TX_FDEQ_GAIN_14 +582 0x687A //TX_FDEQ_GAIN_15 583 0x4848 //TX_FDEQ_GAIN_16 584 0x4848 //TX_FDEQ_GAIN_17 585 0x4848 //TX_FDEQ_GAIN_18 @@ -30433,14 +24663,14 @@ 622 0x4848 //TX_PREEQ_GAIN_MIC0_5 623 0x4848 //TX_PREEQ_GAIN_MIC0_6 624 0x4848 //TX_PREEQ_GAIN_MIC0_7 -625 0x4646 //TX_PREEQ_GAIN_MIC0_8 -626 0x4545 //TX_PREEQ_GAIN_MIC0_9 -627 0x4545 //TX_PREEQ_GAIN_MIC0_10 -628 0x4544 //TX_PREEQ_GAIN_MIC0_11 -629 0x4444 //TX_PREEQ_GAIN_MIC0_12 -630 0x4343 //TX_PREEQ_GAIN_MIC0_13 -631 0x4241 //TX_PREEQ_GAIN_MIC0_14 -632 0x3C3E //TX_PREEQ_GAIN_MIC0_15 +625 0x4848 //TX_PREEQ_GAIN_MIC0_8 +626 0x4848 //TX_PREEQ_GAIN_MIC0_9 +627 0x4848 //TX_PREEQ_GAIN_MIC0_10 +628 0x4848 //TX_PREEQ_GAIN_MIC0_11 +629 0x4848 //TX_PREEQ_GAIN_MIC0_12 +630 0x4848 //TX_PREEQ_GAIN_MIC0_13 +631 0x4848 //TX_PREEQ_GAIN_MIC0_14 +632 0x4848 //TX_PREEQ_GAIN_MIC0_15 633 0x4848 //TX_PREEQ_GAIN_MIC0_16 634 0x4848 //TX_PREEQ_GAIN_MIC0_17 635 0x4848 //TX_PREEQ_GAIN_MIC0_18 @@ -30449,22 +24679,22 @@ 638 0x4848 //TX_PREEQ_GAIN_MIC0_21 639 0x4848 //TX_PREEQ_GAIN_MIC0_22 640 0x4848 //TX_PREEQ_GAIN_MIC0_23 -641 0x0202 //TX_PREEQ_BIN_MIC0_0 -642 0x0203 //TX_PREEQ_BIN_MIC0_1 -643 0x0303 //TX_PREEQ_BIN_MIC0_2 -644 0x0304 //TX_PREEQ_BIN_MIC0_3 -645 0x0405 //TX_PREEQ_BIN_MIC0_4 -646 0x0506 //TX_PREEQ_BIN_MIC0_5 -647 0x0708 //TX_PREEQ_BIN_MIC0_6 -648 0x090A //TX_PREEQ_BIN_MIC0_7 -649 0x0B0C //TX_PREEQ_BIN_MIC0_8 -650 0x0D0E //TX_PREEQ_BIN_MIC0_9 -651 0x1013 //TX_PREEQ_BIN_MIC0_10 -652 0x1719 //TX_PREEQ_BIN_MIC0_11 -653 0x1B1E //TX_PREEQ_BIN_MIC0_12 -654 0x1E1E //TX_PREEQ_BIN_MIC0_13 -655 0x1E28 //TX_PREEQ_BIN_MIC0_14 -656 0x282C //TX_PREEQ_BIN_MIC0_15 +641 0x251A //TX_PREEQ_BIN_MIC0_0 +642 0x0F0F //TX_PREEQ_BIN_MIC0_1 +643 0x0C0C //TX_PREEQ_BIN_MIC0_2 +644 0x0C0F //TX_PREEQ_BIN_MIC0_3 +645 0x0F0F //TX_PREEQ_BIN_MIC0_4 +646 0x0F09 //TX_PREEQ_BIN_MIC0_5 +647 0x0909 //TX_PREEQ_BIN_MIC0_6 +648 0x0908 //TX_PREEQ_BIN_MIC0_7 +649 0x070F //TX_PREEQ_BIN_MIC0_8 +650 0x1F08 //TX_PREEQ_BIN_MIC0_9 +651 0x0808 //TX_PREEQ_BIN_MIC0_10 +652 0x0920 //TX_PREEQ_BIN_MIC0_11 +653 0x2020 //TX_PREEQ_BIN_MIC0_12 +654 0x2021 //TX_PREEQ_BIN_MIC0_13 +655 0x0000 //TX_PREEQ_BIN_MIC0_14 +656 0x0000 //TX_PREEQ_BIN_MIC0_15 657 0x0000 //TX_PREEQ_BIN_MIC0_16 658 0x0000 //TX_PREEQ_BIN_MIC0_17 659 0x0000 //TX_PREEQ_BIN_MIC0_18 @@ -30473,23 +24703,23 @@ 662 0x0000 //TX_PREEQ_BIN_MIC0_21 663 0x0000 //TX_PREEQ_BIN_MIC0_22 664 0x0000 //TX_PREEQ_BIN_MIC0_23 -665 0x0020 //TX_PREEQ_SUBNUM_MIC1 +665 0x0030 //TX_PREEQ_SUBNUM_MIC1 666 0x4848 //TX_PREEQ_GAIN_MIC1_0 667 0x4848 //TX_PREEQ_GAIN_MIC1_1 668 0x4848 //TX_PREEQ_GAIN_MIC1_2 669 0x4848 //TX_PREEQ_GAIN_MIC1_3 670 0x4848 //TX_PREEQ_GAIN_MIC1_4 671 0x4848 //TX_PREEQ_GAIN_MIC1_5 -672 0x4848 //TX_PREEQ_GAIN_MIC1_6 -673 0x4848 //TX_PREEQ_GAIN_MIC1_7 -674 0x484A //TX_PREEQ_GAIN_MIC1_8 -675 0x4B4C //TX_PREEQ_GAIN_MIC1_9 -676 0x4B4A //TX_PREEQ_GAIN_MIC1_10 -677 0x4A48 //TX_PREEQ_GAIN_MIC1_11 -678 0x4C4C //TX_PREEQ_GAIN_MIC1_12 -679 0x4C4C //TX_PREEQ_GAIN_MIC1_13 -680 0x4848 //TX_PREEQ_GAIN_MIC1_14 -681 0x4848 //TX_PREEQ_GAIN_MIC1_15 +672 0x494A //TX_PREEQ_GAIN_MIC1_6 +673 0x4B4C //TX_PREEQ_GAIN_MIC1_7 +674 0x4D4E //TX_PREEQ_GAIN_MIC1_8 +675 0x4F52 //TX_PREEQ_GAIN_MIC1_9 +676 0x5355 //TX_PREEQ_GAIN_MIC1_10 +677 0x585C //TX_PREEQ_GAIN_MIC1_11 +678 0x616A //TX_PREEQ_GAIN_MIC1_12 +679 0x726E //TX_PREEQ_GAIN_MIC1_13 +680 0x5C48 //TX_PREEQ_GAIN_MIC1_14 +681 0x3B38 //TX_PREEQ_GAIN_MIC1_15 682 0x4848 //TX_PREEQ_GAIN_MIC1_16 683 0x4848 //TX_PREEQ_GAIN_MIC1_17 684 0x4848 //TX_PREEQ_GAIN_MIC1_18 @@ -30508,12 +24738,12 @@ 697 0x090A //TX_PREEQ_BIN_MIC1_7 698 0x0B0C //TX_PREEQ_BIN_MIC1_8 699 0x0D0E //TX_PREEQ_BIN_MIC1_9 -700 0x0F10 //TX_PREEQ_BIN_MIC1_10 -701 0x1011 //TX_PREEQ_BIN_MIC1_11 -702 0x1112 //TX_PREEQ_BIN_MIC1_12 -703 0x120B //TX_PREEQ_BIN_MIC1_13 -704 0x0000 //TX_PREEQ_BIN_MIC1_14 -705 0x0000 //TX_PREEQ_BIN_MIC1_15 +700 0x1013 //TX_PREEQ_BIN_MIC1_10 +701 0x1719 //TX_PREEQ_BIN_MIC1_11 +702 0x1B1E //TX_PREEQ_BIN_MIC1_12 +703 0x1E1E //TX_PREEQ_BIN_MIC1_13 +704 0x1E28 //TX_PREEQ_BIN_MIC1_14 +705 0x3042 //TX_PREEQ_BIN_MIC1_15 706 0x0000 //TX_PREEQ_BIN_MIC1_16 707 0x0000 //TX_PREEQ_BIN_MIC1_17 708 0x0000 //TX_PREEQ_BIN_MIC1_18 @@ -30674,7 +24904,7 @@ 863 0x199A //TX_TDDRC_HMNC_GAIN 864 0x0000 //TX_TDDRC_SMT_FLAG 865 0x0CCD //TX_TDDRC_SMT_W -866 0x05F7 //TX_TDDRC_DRC_GAIN +866 0x0650 //TX_TDDRC_DRC_GAIN 867 0x7FFF //TX_TDDRC_LMT_THRD 868 0x0000 //TX_TDDRC_LMT_ALPHA 869 0x0000 //TX_TFMASKLTH @@ -30705,6 +24935,71 @@ 894 0xC000 //TX_FASTNS_SSA_THHFL 895 0xCCCC //TX_FASTNS_SSA_THLFH 896 0xD999 //TX_FASTNS_SSA_THHFH +897 0x2339 //TX_SENDFUNC_REG_MICMUTE +898 0x0021 //TX_SENDFUNC_REG_MICMUTE1 +899 0x02BC //TX_MICMUTE_RATIO_THR +900 0x0140 //TX_MICMUTE_AMP_THR +901 0x0004 //TX_MICMUTE_HPF_IND +902 0x00C0 //TX_MICMUTE_LOG_EYR_TH +903 0x0008 //TX_MICMUTE_CVG_TIME +904 0x0008 //TX_MICMUTE_RELEASE_TIME +905 0x01FE //TX_MIC_VOLUME_MIC0MUTE +906 0x0020 //TX_MICMUTE_EPD_OFFSET_0 +907 0x001E //TX_MICMUTE_FRQ_AEC_L +908 0x7999 //TX_MICMUTE_EAD_THR +909 0x7FFF //TX_MICMUTE_LAMBDA_CB_NLE +910 0x7FFF //TX_MICMUTE_LAMBDA_RE_EST +911 0x4000 //TX_DTD_THR1_MICMUTE_0 +912 0x7000 //TX_DTD_THR1_MICMUTE_1 +913 0x7FFF //TX_DTD_THR1_MICMUTE_2 +914 0x7FFF //TX_DTD_THR1_MICMUTE_3 +915 0x6CCC //TX_DTD_THR2_MICMUTE_0 +916 0x0400 //TX_MICMUTE_MIN_EQ_RE_EST_0 +917 0x0400 //TX_MICMUTE_MIN_EQ_RE_EST_1 +918 0x1000 //TX_MICMUTE_MIN_EQ_RE_EST_2 +919 0x7FFF //TX_MICMUTE_MIN_EQ_RE_EST_3 +920 0x7FFF //TX_MICMUTE_MIN_EQ_RE_EST_4 +921 0x4000 //TX_MICMUTE_C_POST_FLT +922 0x03E8 //TX_MICMUTE_DT_CUT_K +923 0x0001 //TX_MICMUTE_DT_CUT_THR +924 0x03E8 //TX_MICMUTE_DT_CUT_K2 +925 0x0001 //TX_MICMUTE_DT_CUT_THR2 +926 0x0064 //TX_MICMUTE_DT2_HOLD_N +927 0x1000 //TX_MICMUTE_RATIODTH_THCUT +928 0x1000 //TX_MICMUTE_B_POST_FLT_ECHOL +929 0x7FFF //TX_MICMUTE_B_POST_FLT_ECHOH +930 0x0400 //TX_MICMUTE_C_POST_FLT_MASK +931 0x7999 //TX_MICMUTE_RATIODTL_CUT_TH +932 0x0258 //TX_MICMUTE_DT_CUT_K1 +933 0x0800 //TX_MICMUTE_N2_SN_EST +934 0xFC00 //TX_MICMUTE_THR_SN_EST_0 +935 0x001C //TX_MICMUTE_MIN_G_CTRL_0 +936 0x6000 //TX_MICMUTE_A_POST_FILT_S_0 +937 0x7000 //TX_MICMUTE_B_POST_FILT_0 +938 0x2710 //TX_MIC1RUB_AMP_THR +939 0x0010 //TX_MIC1MUTE_RATIO_THR +940 0x0450 //TX_MIC1MUTE_AMP_THR +941 0x0008 //TX_MIC1MUTE_CVG_TIME +942 0x0008 //TX_MIC1MUTE_RELEASE_TIME +943 0x0000 //TX_AMS_RESRV_01 +944 0x0000 //TX_AMS_RESRV_02 +945 0x0000 //TX_AMS_RESRV_03 +946 0x0000 //TX_AMS_RESRV_04 +947 0x0000 //TX_AMS_RESRV_05 +948 0x0000 //TX_AMS_RESRV_06 +949 0x0000 //TX_AMS_RESRV_07 +950 0x0000 //TX_AMS_RESRV_08 +951 0x0000 //TX_AMS_RESRV_09 +952 0x0000 //TX_AMS_RESRV_10 +953 0x0000 //TX_AMS_RESRV_11 +954 0x0000 //TX_AMS_RESRV_12 +955 0x0000 //TX_AMS_RESRV_13 +956 0x0000 //TX_AMS_RESRV_14 +957 0x0000 //TX_AMS_RESRV_15 +958 0x0000 //TX_AMS_RESRV_16 +959 0x0000 //TX_AMS_RESRV_17 +960 0x0000 //TX_AMS_RESRV_18 +961 0x0000 //TX_AMS_RESRV_19 #RX 0 0x000C //RX_RECVFUNC_MODE_0 1 0x0000 //RX_RECVFUNC_MODE_1 @@ -31556,10 +25851,862 @@ 110 0x0000 //RX_FDDRC_RESRV_0 129 0x0100 //RX_SPK_VOL 130 0x0000 //RX_VOL_RESRV_0 +#RX 2 +157 0x000C //RX_RECVFUNC_MODE_0 +158 0x0000 //RX_RECVFUNC_MODE_1 +159 0x0003 //RX_SAMPLINGFREQ_SIG +160 0x0003 //RX_SAMPLINGFREQ_PROC +161 0x000A //RX_FRAME_SZ +162 0x0000 //RX_DELAY_OPT +163 0x1000 //RX_TDDRC_ALPHA_UP_1 +164 0x1000 //RX_TDDRC_ALPHA_UP_2 +165 0x1000 //RX_TDDRC_ALPHA_UP_3 +166 0x1000 //RX_TDDRC_ALPHA_UP_4 +167 0x0800 //RX_PGA +168 0x7FFF //RX_A_HP +169 0x4000 //RX_B_PE +170 0x5800 //RX_THR_PITCH_DET_0 +171 0x5000 //RX_THR_PITCH_DET_1 +172 0x4000 //RX_THR_PITCH_DET_2 +173 0x0008 //RX_PITCH_BFR_LEN +174 0x0003 //RX_SBD_PITCH_DET +175 0x0100 //RX_PP_RESRV_0 +176 0x0020 //RX_PP_RESRV_1 +177 0x0600 //RX_N_SN_EST +178 0x000C //RX_N2_SN_EST +179 0x000F //RX_NS_LVL_CTRL +180 0xF800 //RX_THR_SN_EST +181 0x7E00 //RX_LAMBDA_PFILT +182 0x000A //RX_FENS_RESRV_0 +183 0x0190 //RX_FENS_RESRV_1 +184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +187 0x0002 //RX_EXTRA_NS_L +188 0x0800 //RX_EXTRA_NS_A +189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +190 0x7000 //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +192 0x199A //RX_A_POST_FLT +193 0x0000 //RX_LMT_THRD +194 0x4000 //RX_LMT_ALPHA +195 0x0030 //RX_FDEQ_SUBNUM +196 0x4848 //RX_FDEQ_GAIN_0 +197 0x4848 //RX_FDEQ_GAIN_1 +198 0x4844 //RX_FDEQ_GAIN_2 +199 0x4B4D //RX_FDEQ_GAIN_3 +200 0x4E50 //RX_FDEQ_GAIN_4 +201 0x5254 //RX_FDEQ_GAIN_5 +202 0x5658 //RX_FDEQ_GAIN_6 +203 0x5C60 //RX_FDEQ_GAIN_7 +204 0x6468 //RX_FDEQ_GAIN_8 +205 0x6C70 //RX_FDEQ_GAIN_9 +206 0x7474 //RX_FDEQ_GAIN_10 +207 0x7474 //RX_FDEQ_GAIN_11 +208 0x7474 //RX_FDEQ_GAIN_12 +209 0x7474 //RX_FDEQ_GAIN_13 +210 0x7474 //RX_FDEQ_GAIN_14 +211 0x7474 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0202 //RX_FDEQ_BIN_0 +221 0x0203 //RX_FDEQ_BIN_1 +222 0x0402 //RX_FDEQ_BIN_2 +223 0x0304 //RX_FDEQ_BIN_3 +224 0x0405 //RX_FDEQ_BIN_4 +225 0x0506 //RX_FDEQ_BIN_5 +226 0x0708 //RX_FDEQ_BIN_6 +227 0x090A //RX_FDEQ_BIN_7 +228 0x0B0C //RX_FDEQ_BIN_8 +229 0x0D0E //RX_FDEQ_BIN_9 +230 0x1214 //RX_FDEQ_BIN_10 +231 0x1E1E //RX_FDEQ_BIN_11 +232 0x1E1E //RX_FDEQ_BIN_12 +233 0x1E1E //RX_FDEQ_BIN_13 +234 0x1E1E //RX_FDEQ_BIN_14 +235 0x202C //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x4000 //RX_FDEQ_RESRV_0 +245 0x0320 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0030 //RX_FDDRC_BAND_MARGIN_1 +248 0x0050 //RX_FDDRC_BAND_MARGIN_2 +249 0x0080 //RX_FDDRC_BAND_MARGIN_3 +250 0x0007 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x5000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x6400 //RX_FDDRC_THRD_3_2 +258 0x6400 //RX_FDDRC_THRD_3_3 +259 0x2000 //RX_FDDRC_SLANT_0_0 +260 0x2000 //RX_FDDRC_SLANT_0_1 +261 0x2000 //RX_FDDRC_SLANT_0_2 +262 0x2000 //RX_FDDRC_SLANT_0_3 +263 0x5333 //RX_FDDRC_SLANT_1_0 +264 0x5333 //RX_FDDRC_SLANT_1_1 +265 0x5333 //RX_FDDRC_SLANT_1_2 +266 0x5333 //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +268 0x0002 //RX_FILTINDX +269 0x0000 //RX_TDDRC_THRD_0 +270 0x0000 //RX_TDDRC_THRD_1 +271 0x1800 //RX_TDDRC_THRD_2 +272 0x1800 //RX_TDDRC_THRD_3 +273 0x3000 //RX_TDDRC_SLANT_0 +274 0x6E00 //RX_TDDRC_SLANT_1 +275 0x1000 //RX_TDDRC_ALPHA_UP_0 +276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x199A //RX_TDDRC_HMNC_GAIN +279 0x0001 //RX_TDDRC_SMT_FLAG +280 0x0CCD //RX_TDDRC_SMT_W +281 0x01E0 //RX_TDDRC_DRC_GAIN +282 0x7C00 //RX_LAMBDA_PKA_FP +283 0x2000 //RX_TPKA_FP +284 0x2000 //RX_MIN_G_FP +285 0x0080 //RX_MAX_G_FP +286 0x0100 //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 +288 0x0000 //RX_MAXLEVEL_CNG +289 0x3000 //RX_BWE_UV_TH +290 0x3000 //RX_BWE_UV_TH2 +291 0x1800 //RX_BWE_UV_TH3 +292 0x1000 //RX_BWE_V_TH +293 0x04CD //RX_BWE_GAIN1_V_TH1 +294 0x0F33 //RX_BWE_GAIN1_V_TH2 +295 0x7333 //RX_BWE_UV_EQ +296 0x199A //RX_BWE_V_EQ +297 0x7333 //RX_BWE_TONE_TH +298 0x0004 //RX_BWE_UV_HOLD_T +299 0x6CCD //RX_BWE_GAIN2_ALPHA +300 0x799A //RX_BWE_GAIN3_ALPHA +301 0x001E //RX_BWE_CUTOFF +302 0x3000 //RX_BWE_GAINFILL +303 0x3200 //RX_BWE_MAXTH_TONE +304 0x2000 //RX_BWE_EQ_0 +305 0x2000 //RX_BWE_EQ_1 +306 0x2000 //RX_BWE_EQ_2 +307 0x2000 //RX_BWE_EQ_3 +308 0x2000 //RX_BWE_EQ_4 +309 0x2000 //RX_BWE_EQ_5 +310 0x2000 //RX_BWE_EQ_6 +311 0x0000 //RX_BWE_RESRV_0 +312 0x0000 //RX_BWE_RESRV_1 +313 0x0000 //RX_BWE_RESRV_2 +#VOL 0 +163 0x1000 //RX_TDDRC_ALPHA_UP_1 +164 0x1000 //RX_TDDRC_ALPHA_UP_2 +165 0x1000 //RX_TDDRC_ALPHA_UP_3 +166 0x1000 //RX_TDDRC_ALPHA_UP_4 +184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +190 0x7000 //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +269 0x0000 //RX_TDDRC_THRD_0 +270 0x0000 //RX_TDDRC_THRD_1 +271 0x1800 //RX_TDDRC_THRD_2 +272 0x1800 //RX_TDDRC_THRD_3 +273 0x3000 //RX_TDDRC_SLANT_0 +274 0x6E00 //RX_TDDRC_SLANT_1 +275 0x1000 //RX_TDDRC_ALPHA_UP_0 +276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x199A //RX_TDDRC_HMNC_GAIN +279 0x0001 //RX_TDDRC_SMT_FLAG +280 0x0CCD //RX_TDDRC_SMT_W +281 0x01E0 //RX_TDDRC_DRC_GAIN +195 0x0030 //RX_FDEQ_SUBNUM +196 0x4848 //RX_FDEQ_GAIN_0 +197 0x4848 //RX_FDEQ_GAIN_1 +198 0x4844 //RX_FDEQ_GAIN_2 +199 0x4B4D //RX_FDEQ_GAIN_3 +200 0x4E50 //RX_FDEQ_GAIN_4 +201 0x5254 //RX_FDEQ_GAIN_5 +202 0x5658 //RX_FDEQ_GAIN_6 +203 0x5C60 //RX_FDEQ_GAIN_7 +204 0x6468 //RX_FDEQ_GAIN_8 +205 0x6C70 //RX_FDEQ_GAIN_9 +206 0x7474 //RX_FDEQ_GAIN_10 +207 0x7474 //RX_FDEQ_GAIN_11 +208 0x7474 //RX_FDEQ_GAIN_12 +209 0x7474 //RX_FDEQ_GAIN_13 +210 0x7474 //RX_FDEQ_GAIN_14 +211 0x7474 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0202 //RX_FDEQ_BIN_0 +221 0x0203 //RX_FDEQ_BIN_1 +222 0x0402 //RX_FDEQ_BIN_2 +223 0x0304 //RX_FDEQ_BIN_3 +224 0x0405 //RX_FDEQ_BIN_4 +225 0x0506 //RX_FDEQ_BIN_5 +226 0x0708 //RX_FDEQ_BIN_6 +227 0x090A //RX_FDEQ_BIN_7 +228 0x0B0C //RX_FDEQ_BIN_8 +229 0x0D0E //RX_FDEQ_BIN_9 +230 0x1214 //RX_FDEQ_BIN_10 +231 0x1E1E //RX_FDEQ_BIN_11 +232 0x1E1E //RX_FDEQ_BIN_12 +233 0x1E1E //RX_FDEQ_BIN_13 +234 0x1E1E //RX_FDEQ_BIN_14 +235 0x202C //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x4000 //RX_FDEQ_RESRV_0 +245 0x0320 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0030 //RX_FDDRC_BAND_MARGIN_1 +248 0x0050 //RX_FDDRC_BAND_MARGIN_2 +249 0x0080 //RX_FDDRC_BAND_MARGIN_3 +250 0x0007 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x5000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x6400 //RX_FDDRC_THRD_3_2 +258 0x6400 //RX_FDDRC_THRD_3_3 +259 0x2000 //RX_FDDRC_SLANT_0_0 +260 0x2000 //RX_FDDRC_SLANT_0_1 +261 0x2000 //RX_FDDRC_SLANT_0_2 +262 0x2000 //RX_FDDRC_SLANT_0_3 +263 0x5333 //RX_FDDRC_SLANT_1_0 +264 0x5333 //RX_FDDRC_SLANT_1_1 +265 0x5333 //RX_FDDRC_SLANT_1_2 +266 0x5333 //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +286 0x0100 //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 +#VOL 1 +163 0x1000 //RX_TDDRC_ALPHA_UP_1 +164 0x1000 //RX_TDDRC_ALPHA_UP_2 +165 0x1000 //RX_TDDRC_ALPHA_UP_3 +166 0x1000 //RX_TDDRC_ALPHA_UP_4 +184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +190 0x7000 //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +269 0x0000 //RX_TDDRC_THRD_0 +270 0x0000 //RX_TDDRC_THRD_1 +271 0x1800 //RX_TDDRC_THRD_2 +272 0x1800 //RX_TDDRC_THRD_3 +273 0x3000 //RX_TDDRC_SLANT_0 +274 0x6E00 //RX_TDDRC_SLANT_1 +275 0x1000 //RX_TDDRC_ALPHA_UP_0 +276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x199A //RX_TDDRC_HMNC_GAIN +279 0x0001 //RX_TDDRC_SMT_FLAG +280 0x0CCD //RX_TDDRC_SMT_W +281 0x01E0 //RX_TDDRC_DRC_GAIN +195 0x0030 //RX_FDEQ_SUBNUM +196 0x4848 //RX_FDEQ_GAIN_0 +197 0x4848 //RX_FDEQ_GAIN_1 +198 0x4844 //RX_FDEQ_GAIN_2 +199 0x4B4D //RX_FDEQ_GAIN_3 +200 0x4E50 //RX_FDEQ_GAIN_4 +201 0x5254 //RX_FDEQ_GAIN_5 +202 0x5658 //RX_FDEQ_GAIN_6 +203 0x5C60 //RX_FDEQ_GAIN_7 +204 0x6468 //RX_FDEQ_GAIN_8 +205 0x6C70 //RX_FDEQ_GAIN_9 +206 0x7474 //RX_FDEQ_GAIN_10 +207 0x7474 //RX_FDEQ_GAIN_11 +208 0x7474 //RX_FDEQ_GAIN_12 +209 0x7474 //RX_FDEQ_GAIN_13 +210 0x7474 //RX_FDEQ_GAIN_14 +211 0x7474 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0202 //RX_FDEQ_BIN_0 +221 0x0203 //RX_FDEQ_BIN_1 +222 0x0402 //RX_FDEQ_BIN_2 +223 0x0304 //RX_FDEQ_BIN_3 +224 0x0405 //RX_FDEQ_BIN_4 +225 0x0506 //RX_FDEQ_BIN_5 +226 0x0708 //RX_FDEQ_BIN_6 +227 0x090A //RX_FDEQ_BIN_7 +228 0x0B0C //RX_FDEQ_BIN_8 +229 0x0D0E //RX_FDEQ_BIN_9 +230 0x1214 //RX_FDEQ_BIN_10 +231 0x1E1E //RX_FDEQ_BIN_11 +232 0x1E1E //RX_FDEQ_BIN_12 +233 0x1E1E //RX_FDEQ_BIN_13 +234 0x1E1E //RX_FDEQ_BIN_14 +235 0x202C //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x4000 //RX_FDEQ_RESRV_0 +245 0x0320 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0030 //RX_FDDRC_BAND_MARGIN_1 +248 0x0050 //RX_FDDRC_BAND_MARGIN_2 +249 0x0080 //RX_FDDRC_BAND_MARGIN_3 +250 0x0007 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x5000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x6400 //RX_FDDRC_THRD_3_2 +258 0x6400 //RX_FDDRC_THRD_3_3 +259 0x2000 //RX_FDDRC_SLANT_0_0 +260 0x2000 //RX_FDDRC_SLANT_0_1 +261 0x2000 //RX_FDDRC_SLANT_0_2 +262 0x2000 //RX_FDDRC_SLANT_0_3 +263 0x5333 //RX_FDDRC_SLANT_1_0 +264 0x5333 //RX_FDDRC_SLANT_1_1 +265 0x5333 //RX_FDDRC_SLANT_1_2 +266 0x5333 //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +286 0x0100 //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 +#VOL 2 +163 0x1000 //RX_TDDRC_ALPHA_UP_1 +164 0x1000 //RX_TDDRC_ALPHA_UP_2 +165 0x1000 //RX_TDDRC_ALPHA_UP_3 +166 0x1000 //RX_TDDRC_ALPHA_UP_4 +184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +190 0x7000 //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +269 0x0000 //RX_TDDRC_THRD_0 +270 0x0000 //RX_TDDRC_THRD_1 +271 0x1800 //RX_TDDRC_THRD_2 +272 0x1800 //RX_TDDRC_THRD_3 +273 0x3000 //RX_TDDRC_SLANT_0 +274 0x6E00 //RX_TDDRC_SLANT_1 +275 0x1000 //RX_TDDRC_ALPHA_UP_0 +276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x199A //RX_TDDRC_HMNC_GAIN +279 0x0001 //RX_TDDRC_SMT_FLAG +280 0x0CCD //RX_TDDRC_SMT_W +281 0x01E0 //RX_TDDRC_DRC_GAIN +195 0x0030 //RX_FDEQ_SUBNUM +196 0x4848 //RX_FDEQ_GAIN_0 +197 0x4848 //RX_FDEQ_GAIN_1 +198 0x4844 //RX_FDEQ_GAIN_2 +199 0x4B4D //RX_FDEQ_GAIN_3 +200 0x4E50 //RX_FDEQ_GAIN_4 +201 0x5254 //RX_FDEQ_GAIN_5 +202 0x5658 //RX_FDEQ_GAIN_6 +203 0x5C60 //RX_FDEQ_GAIN_7 +204 0x6468 //RX_FDEQ_GAIN_8 +205 0x6C70 //RX_FDEQ_GAIN_9 +206 0x7474 //RX_FDEQ_GAIN_10 +207 0x7474 //RX_FDEQ_GAIN_11 +208 0x7474 //RX_FDEQ_GAIN_12 +209 0x7474 //RX_FDEQ_GAIN_13 +210 0x7474 //RX_FDEQ_GAIN_14 +211 0x7474 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0202 //RX_FDEQ_BIN_0 +221 0x0203 //RX_FDEQ_BIN_1 +222 0x0402 //RX_FDEQ_BIN_2 +223 0x0304 //RX_FDEQ_BIN_3 +224 0x0405 //RX_FDEQ_BIN_4 +225 0x0506 //RX_FDEQ_BIN_5 +226 0x0708 //RX_FDEQ_BIN_6 +227 0x090A //RX_FDEQ_BIN_7 +228 0x0B0C //RX_FDEQ_BIN_8 +229 0x0D0E //RX_FDEQ_BIN_9 +230 0x1214 //RX_FDEQ_BIN_10 +231 0x1E1E //RX_FDEQ_BIN_11 +232 0x1E1E //RX_FDEQ_BIN_12 +233 0x1E1E //RX_FDEQ_BIN_13 +234 0x1E1E //RX_FDEQ_BIN_14 +235 0x202C //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x4000 //RX_FDEQ_RESRV_0 +245 0x0320 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0030 //RX_FDDRC_BAND_MARGIN_1 +248 0x0050 //RX_FDDRC_BAND_MARGIN_2 +249 0x0080 //RX_FDDRC_BAND_MARGIN_3 +250 0x0007 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x5000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x6400 //RX_FDDRC_THRD_3_2 +258 0x6400 //RX_FDDRC_THRD_3_3 +259 0x2000 //RX_FDDRC_SLANT_0_0 +260 0x2000 //RX_FDDRC_SLANT_0_1 +261 0x2000 //RX_FDDRC_SLANT_0_2 +262 0x2000 //RX_FDDRC_SLANT_0_3 +263 0x5333 //RX_FDDRC_SLANT_1_0 +264 0x5333 //RX_FDDRC_SLANT_1_1 +265 0x5333 //RX_FDDRC_SLANT_1_2 +266 0x5333 //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +286 0x0100 //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 +#VOL 3 +163 0x1000 //RX_TDDRC_ALPHA_UP_1 +164 0x1000 //RX_TDDRC_ALPHA_UP_2 +165 0x1000 //RX_TDDRC_ALPHA_UP_3 +166 0x1000 //RX_TDDRC_ALPHA_UP_4 +184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +190 0x7000 //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +269 0x0000 //RX_TDDRC_THRD_0 +270 0x0000 //RX_TDDRC_THRD_1 +271 0x1800 //RX_TDDRC_THRD_2 +272 0x1800 //RX_TDDRC_THRD_3 +273 0x3000 //RX_TDDRC_SLANT_0 +274 0x6E00 //RX_TDDRC_SLANT_1 +275 0x1000 //RX_TDDRC_ALPHA_UP_0 +276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x199A //RX_TDDRC_HMNC_GAIN +279 0x0001 //RX_TDDRC_SMT_FLAG +280 0x0CCD //RX_TDDRC_SMT_W +281 0x01E0 //RX_TDDRC_DRC_GAIN +195 0x0030 //RX_FDEQ_SUBNUM +196 0x4848 //RX_FDEQ_GAIN_0 +197 0x4848 //RX_FDEQ_GAIN_1 +198 0x4844 //RX_FDEQ_GAIN_2 +199 0x4B4D //RX_FDEQ_GAIN_3 +200 0x4E50 //RX_FDEQ_GAIN_4 +201 0x5254 //RX_FDEQ_GAIN_5 +202 0x5658 //RX_FDEQ_GAIN_6 +203 0x5C60 //RX_FDEQ_GAIN_7 +204 0x6468 //RX_FDEQ_GAIN_8 +205 0x6C70 //RX_FDEQ_GAIN_9 +206 0x7474 //RX_FDEQ_GAIN_10 +207 0x7474 //RX_FDEQ_GAIN_11 +208 0x7474 //RX_FDEQ_GAIN_12 +209 0x7474 //RX_FDEQ_GAIN_13 +210 0x7474 //RX_FDEQ_GAIN_14 +211 0x7474 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0202 //RX_FDEQ_BIN_0 +221 0x0203 //RX_FDEQ_BIN_1 +222 0x0402 //RX_FDEQ_BIN_2 +223 0x0304 //RX_FDEQ_BIN_3 +224 0x0405 //RX_FDEQ_BIN_4 +225 0x0506 //RX_FDEQ_BIN_5 +226 0x0708 //RX_FDEQ_BIN_6 +227 0x090A //RX_FDEQ_BIN_7 +228 0x0B0C //RX_FDEQ_BIN_8 +229 0x0D0E //RX_FDEQ_BIN_9 +230 0x1214 //RX_FDEQ_BIN_10 +231 0x1E1E //RX_FDEQ_BIN_11 +232 0x1E1E //RX_FDEQ_BIN_12 +233 0x1E1E //RX_FDEQ_BIN_13 +234 0x1E1E //RX_FDEQ_BIN_14 +235 0x202C //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x4000 //RX_FDEQ_RESRV_0 +245 0x0320 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0030 //RX_FDDRC_BAND_MARGIN_1 +248 0x0050 //RX_FDDRC_BAND_MARGIN_2 +249 0x0080 //RX_FDDRC_BAND_MARGIN_3 +250 0x0007 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x5000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x6400 //RX_FDDRC_THRD_3_2 +258 0x6400 //RX_FDDRC_THRD_3_3 +259 0x2000 //RX_FDDRC_SLANT_0_0 +260 0x2000 //RX_FDDRC_SLANT_0_1 +261 0x2000 //RX_FDDRC_SLANT_0_2 +262 0x2000 //RX_FDDRC_SLANT_0_3 +263 0x5333 //RX_FDDRC_SLANT_1_0 +264 0x5333 //RX_FDDRC_SLANT_1_1 +265 0x5333 //RX_FDDRC_SLANT_1_2 +266 0x5333 //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +286 0x0100 //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 +#VOL 4 +163 0x1000 //RX_TDDRC_ALPHA_UP_1 +164 0x1000 //RX_TDDRC_ALPHA_UP_2 +165 0x1000 //RX_TDDRC_ALPHA_UP_3 +166 0x1000 //RX_TDDRC_ALPHA_UP_4 +184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +190 0x7000 //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +269 0x0000 //RX_TDDRC_THRD_0 +270 0x0000 //RX_TDDRC_THRD_1 +271 0x1800 //RX_TDDRC_THRD_2 +272 0x1800 //RX_TDDRC_THRD_3 +273 0x3000 //RX_TDDRC_SLANT_0 +274 0x6E00 //RX_TDDRC_SLANT_1 +275 0x1000 //RX_TDDRC_ALPHA_UP_0 +276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x199A //RX_TDDRC_HMNC_GAIN +279 0x0001 //RX_TDDRC_SMT_FLAG +280 0x0CCD //RX_TDDRC_SMT_W +281 0x01E0 //RX_TDDRC_DRC_GAIN +195 0x0030 //RX_FDEQ_SUBNUM +196 0x4848 //RX_FDEQ_GAIN_0 +197 0x4848 //RX_FDEQ_GAIN_1 +198 0x4844 //RX_FDEQ_GAIN_2 +199 0x4B4D //RX_FDEQ_GAIN_3 +200 0x4E50 //RX_FDEQ_GAIN_4 +201 0x5254 //RX_FDEQ_GAIN_5 +202 0x5658 //RX_FDEQ_GAIN_6 +203 0x5C60 //RX_FDEQ_GAIN_7 +204 0x6468 //RX_FDEQ_GAIN_8 +205 0x6C70 //RX_FDEQ_GAIN_9 +206 0x7474 //RX_FDEQ_GAIN_10 +207 0x7474 //RX_FDEQ_GAIN_11 +208 0x7474 //RX_FDEQ_GAIN_12 +209 0x7474 //RX_FDEQ_GAIN_13 +210 0x7474 //RX_FDEQ_GAIN_14 +211 0x7474 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0202 //RX_FDEQ_BIN_0 +221 0x0203 //RX_FDEQ_BIN_1 +222 0x0402 //RX_FDEQ_BIN_2 +223 0x0304 //RX_FDEQ_BIN_3 +224 0x0405 //RX_FDEQ_BIN_4 +225 0x0506 //RX_FDEQ_BIN_5 +226 0x0708 //RX_FDEQ_BIN_6 +227 0x090A //RX_FDEQ_BIN_7 +228 0x0B0C //RX_FDEQ_BIN_8 +229 0x0D0E //RX_FDEQ_BIN_9 +230 0x1214 //RX_FDEQ_BIN_10 +231 0x1E1E //RX_FDEQ_BIN_11 +232 0x1E1E //RX_FDEQ_BIN_12 +233 0x1E1E //RX_FDEQ_BIN_13 +234 0x1E1E //RX_FDEQ_BIN_14 +235 0x202C //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x4000 //RX_FDEQ_RESRV_0 +245 0x0320 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0030 //RX_FDDRC_BAND_MARGIN_1 +248 0x0050 //RX_FDDRC_BAND_MARGIN_2 +249 0x0080 //RX_FDDRC_BAND_MARGIN_3 +250 0x0007 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x5000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x6400 //RX_FDDRC_THRD_3_2 +258 0x6400 //RX_FDDRC_THRD_3_3 +259 0x2000 //RX_FDDRC_SLANT_0_0 +260 0x2000 //RX_FDDRC_SLANT_0_1 +261 0x2000 //RX_FDDRC_SLANT_0_2 +262 0x2000 //RX_FDDRC_SLANT_0_3 +263 0x5333 //RX_FDDRC_SLANT_1_0 +264 0x5333 //RX_FDDRC_SLANT_1_1 +265 0x5333 //RX_FDDRC_SLANT_1_2 +266 0x5333 //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +286 0x0100 //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 +#VOL 5 +163 0x1000 //RX_TDDRC_ALPHA_UP_1 +164 0x1000 //RX_TDDRC_ALPHA_UP_2 +165 0x1000 //RX_TDDRC_ALPHA_UP_3 +166 0x1000 //RX_TDDRC_ALPHA_UP_4 +184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +190 0x7000 //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +269 0x0000 //RX_TDDRC_THRD_0 +270 0x0000 //RX_TDDRC_THRD_1 +271 0x1800 //RX_TDDRC_THRD_2 +272 0x1800 //RX_TDDRC_THRD_3 +273 0x3000 //RX_TDDRC_SLANT_0 +274 0x6E00 //RX_TDDRC_SLANT_1 +275 0x1000 //RX_TDDRC_ALPHA_UP_0 +276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x199A //RX_TDDRC_HMNC_GAIN +279 0x0001 //RX_TDDRC_SMT_FLAG +280 0x0CCD //RX_TDDRC_SMT_W +281 0x01E0 //RX_TDDRC_DRC_GAIN +195 0x0030 //RX_FDEQ_SUBNUM +196 0x4848 //RX_FDEQ_GAIN_0 +197 0x4848 //RX_FDEQ_GAIN_1 +198 0x4844 //RX_FDEQ_GAIN_2 +199 0x4B4D //RX_FDEQ_GAIN_3 +200 0x4E50 //RX_FDEQ_GAIN_4 +201 0x5254 //RX_FDEQ_GAIN_5 +202 0x5658 //RX_FDEQ_GAIN_6 +203 0x5C60 //RX_FDEQ_GAIN_7 +204 0x6468 //RX_FDEQ_GAIN_8 +205 0x6C70 //RX_FDEQ_GAIN_9 +206 0x7474 //RX_FDEQ_GAIN_10 +207 0x7474 //RX_FDEQ_GAIN_11 +208 0x7474 //RX_FDEQ_GAIN_12 +209 0x7474 //RX_FDEQ_GAIN_13 +210 0x7474 //RX_FDEQ_GAIN_14 +211 0x7474 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0202 //RX_FDEQ_BIN_0 +221 0x0203 //RX_FDEQ_BIN_1 +222 0x0402 //RX_FDEQ_BIN_2 +223 0x0304 //RX_FDEQ_BIN_3 +224 0x0405 //RX_FDEQ_BIN_4 +225 0x0506 //RX_FDEQ_BIN_5 +226 0x0708 //RX_FDEQ_BIN_6 +227 0x090A //RX_FDEQ_BIN_7 +228 0x0B0C //RX_FDEQ_BIN_8 +229 0x0D0E //RX_FDEQ_BIN_9 +230 0x1214 //RX_FDEQ_BIN_10 +231 0x1E1E //RX_FDEQ_BIN_11 +232 0x1E1E //RX_FDEQ_BIN_12 +233 0x1E1E //RX_FDEQ_BIN_13 +234 0x1E1E //RX_FDEQ_BIN_14 +235 0x202C //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x4000 //RX_FDEQ_RESRV_0 +245 0x0320 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0030 //RX_FDDRC_BAND_MARGIN_1 +248 0x0050 //RX_FDDRC_BAND_MARGIN_2 +249 0x0080 //RX_FDDRC_BAND_MARGIN_3 +250 0x0007 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x5000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x6400 //RX_FDDRC_THRD_3_2 +258 0x6400 //RX_FDDRC_THRD_3_3 +259 0x2000 //RX_FDDRC_SLANT_0_0 +260 0x2000 //RX_FDDRC_SLANT_0_1 +261 0x2000 //RX_FDDRC_SLANT_0_2 +262 0x2000 //RX_FDDRC_SLANT_0_3 +263 0x5333 //RX_FDDRC_SLANT_1_0 +264 0x5333 //RX_FDDRC_SLANT_1_1 +265 0x5333 //RX_FDDRC_SLANT_1_2 +266 0x5333 //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +286 0x0100 //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 +#VOL 6 +163 0x1000 //RX_TDDRC_ALPHA_UP_1 +164 0x1000 //RX_TDDRC_ALPHA_UP_2 +165 0x1000 //RX_TDDRC_ALPHA_UP_3 +166 0x1000 //RX_TDDRC_ALPHA_UP_4 +184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +190 0x7000 //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +269 0x0000 //RX_TDDRC_THRD_0 +270 0x0000 //RX_TDDRC_THRD_1 +271 0x1800 //RX_TDDRC_THRD_2 +272 0x1800 //RX_TDDRC_THRD_3 +273 0x3000 //RX_TDDRC_SLANT_0 +274 0x6E00 //RX_TDDRC_SLANT_1 +275 0x1000 //RX_TDDRC_ALPHA_UP_0 +276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x199A //RX_TDDRC_HMNC_GAIN +279 0x0001 //RX_TDDRC_SMT_FLAG +280 0x0CCD //RX_TDDRC_SMT_W +281 0x01E0 //RX_TDDRC_DRC_GAIN +195 0x0030 //RX_FDEQ_SUBNUM +196 0x4848 //RX_FDEQ_GAIN_0 +197 0x4848 //RX_FDEQ_GAIN_1 +198 0x4844 //RX_FDEQ_GAIN_2 +199 0x4B4D //RX_FDEQ_GAIN_3 +200 0x4E50 //RX_FDEQ_GAIN_4 +201 0x5254 //RX_FDEQ_GAIN_5 +202 0x5658 //RX_FDEQ_GAIN_6 +203 0x5C60 //RX_FDEQ_GAIN_7 +204 0x6468 //RX_FDEQ_GAIN_8 +205 0x6C70 //RX_FDEQ_GAIN_9 +206 0x7474 //RX_FDEQ_GAIN_10 +207 0x7474 //RX_FDEQ_GAIN_11 +208 0x7474 //RX_FDEQ_GAIN_12 +209 0x7474 //RX_FDEQ_GAIN_13 +210 0x7474 //RX_FDEQ_GAIN_14 +211 0x7474 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0202 //RX_FDEQ_BIN_0 +221 0x0203 //RX_FDEQ_BIN_1 +222 0x0402 //RX_FDEQ_BIN_2 +223 0x0304 //RX_FDEQ_BIN_3 +224 0x0405 //RX_FDEQ_BIN_4 +225 0x0506 //RX_FDEQ_BIN_5 +226 0x0708 //RX_FDEQ_BIN_6 +227 0x090A //RX_FDEQ_BIN_7 +228 0x0B0C //RX_FDEQ_BIN_8 +229 0x0D0E //RX_FDEQ_BIN_9 +230 0x1214 //RX_FDEQ_BIN_10 +231 0x1E1E //RX_FDEQ_BIN_11 +232 0x1E1E //RX_FDEQ_BIN_12 +233 0x1E1E //RX_FDEQ_BIN_13 +234 0x1E1E //RX_FDEQ_BIN_14 +235 0x202C //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x4000 //RX_FDEQ_RESRV_0 +245 0x0320 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0030 //RX_FDDRC_BAND_MARGIN_1 +248 0x0050 //RX_FDDRC_BAND_MARGIN_2 +249 0x0080 //RX_FDDRC_BAND_MARGIN_3 +250 0x0007 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x5000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x6400 //RX_FDDRC_THRD_3_2 +258 0x6400 //RX_FDDRC_THRD_3_3 +259 0x2000 //RX_FDDRC_SLANT_0_0 +260 0x2000 //RX_FDDRC_SLANT_0_1 +261 0x2000 //RX_FDDRC_SLANT_0_2 +262 0x2000 //RX_FDDRC_SLANT_0_3 +263 0x5333 //RX_FDDRC_SLANT_1_0 +264 0x5333 //RX_FDDRC_SLANT_1_1 +265 0x5333 //RX_FDDRC_SLANT_1_2 +266 0x5333 //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +286 0x0100 //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 -#CASE_NAME HANDSET-HANDSET_HAC-TMOBILE_US-FB -#PARAM_TYPE TX+RX -#TOTAL_CUSTOM_STEP 7 +#CASE_NAME HANDSET-HANDSET_HAC-VOICE_GENERIC-FB +#PARAM_MODE Full +#PARAM_TYPE TX+2RX +#TOTAL_CUSTOM_STEP 7+7 #TX 0 0x0000 //TX_OPERATION_MODE_0 1 0x0000 //TX_OPERATION_MODE_1 @@ -31582,7 +26729,7 @@ 18 0x0000 //TX_SYS_RESRV_2 19 0x0000 //TX_SYS_RESRV_3 20 0x0000 //TX_DIST2REF0 -21 0x009D //TX_DIST2REF1 +21 0x00A3 //TX_DIST2REF1 22 0x0000 //TX_DIST2REF_02 23 0x0000 //TX_DIST2REF_03 24 0x0000 //TX_DIST2REF_04 @@ -31812,12 +26959,12 @@ 248 0xF800 //TX_THR_SN_EST_6 249 0xF700 //TX_THR_SN_EST_7 250 0x0000 //TX_DELTA_THR_SN_EST_0 -251 0x0100 //TX_DELTA_THR_SN_EST_1 +251 0x0200 //TX_DELTA_THR_SN_EST_1 252 0x0200 //TX_DELTA_THR_SN_EST_2 253 0x0200 //TX_DELTA_THR_SN_EST_3 -254 0x0200 //TX_DELTA_THR_SN_EST_4 -255 0x0100 //TX_DELTA_THR_SN_EST_5 -256 0x0200 //TX_DELTA_THR_SN_EST_6 +254 0x0100 //TX_DELTA_THR_SN_EST_4 +255 0x0200 //TX_DELTA_THR_SN_EST_5 +256 0x0100 //TX_DELTA_THR_SN_EST_6 257 0x0200 //TX_DELTA_THR_SN_EST_7 258 0x4000 //TX_LAMBDA_NN_EST_0 259 0x4000 //TX_LAMBDA_NN_EST_1 @@ -31845,16 +26992,16 @@ 281 0x0014 //TX_NS_LVL_CTRL_0 282 0x0016 //TX_NS_LVL_CTRL_1 283 0x0016 //TX_NS_LVL_CTRL_2 -284 0x0016 //TX_NS_LVL_CTRL_3 -285 0x0018 //TX_NS_LVL_CTRL_4 -286 0x0016 //TX_NS_LVL_CTRL_5 -287 0x0012 //TX_NS_LVL_CTRL_6 +284 0x0018 //TX_NS_LVL_CTRL_3 +285 0x0016 //TX_NS_LVL_CTRL_4 +286 0x0012 //TX_NS_LVL_CTRL_5 +287 0x0016 //TX_NS_LVL_CTRL_6 288 0x0017 //TX_NS_LVL_CTRL_7 289 0x000E //TX_MIN_GAIN_S_0 -290 0x0012 //TX_MIN_GAIN_S_1 -291 0x0007 //TX_MIN_GAIN_S_2 -292 0x0012 //TX_MIN_GAIN_S_3 -293 0x0010 //TX_MIN_GAIN_S_4 +290 0x0007 //TX_MIN_GAIN_S_1 +291 0x0012 //TX_MIN_GAIN_S_2 +292 0x0010 //TX_MIN_GAIN_S_3 +293 0x0012 //TX_MIN_GAIN_S_4 294 0x0012 //TX_MIN_GAIN_S_5 295 0x0012 //TX_MIN_GAIN_S_6 296 0x0012 //TX_MIN_GAIN_S_7 @@ -31876,29 +27023,29 @@ 312 0x7FFF //TX_A_POST_FILT_0 313 0x2000 //TX_A_POST_FILT_1 314 0x4000 //TX_A_POST_FILT_S_0 -315 0x5000 //TX_A_POST_FILT_S_1 +315 0x4000 //TX_A_POST_FILT_S_1 316 0x4000 //TX_A_POST_FILT_S_2 317 0x4000 //TX_A_POST_FILT_S_3 318 0x4000 //TX_A_POST_FILT_S_4 319 0x4000 //TX_A_POST_FILT_S_5 -320 0x4000 //TX_A_POST_FILT_S_6 +320 0x5000 //TX_A_POST_FILT_S_6 321 0x7000 //TX_A_POST_FILT_S_7 322 0x1000 //TX_B_POST_FILT_0 323 0x2000 //TX_B_POST_FILT_1 -324 0x3000 //TX_B_POST_FILT_2 +324 0x2000 //TX_B_POST_FILT_2 325 0x2000 //TX_B_POST_FILT_3 -326 0x5000 //TX_B_POST_FILT_4 +326 0x2000 //TX_B_POST_FILT_4 327 0x2000 //TX_B_POST_FILT_5 -328 0x6000 //TX_B_POST_FILT_6 +328 0x3000 //TX_B_POST_FILT_6 329 0x3000 //TX_B_POST_FILT_7 330 0x1000 //TX_B_LESSCUT_RTO_S_0 -331 0x6000 //TX_B_LESSCUT_RTO_S_1 -332 0x6000 //TX_B_LESSCUT_RTO_S_2 -333 0x6000 //TX_B_LESSCUT_RTO_S_3 -334 0x6000 //TX_B_LESSCUT_RTO_S_4 -335 0x6000 //TX_B_LESSCUT_RTO_S_5 -336 0x7FFF //TX_B_LESSCUT_RTO_S_6 -337 0x7FFF //TX_B_LESSCUT_RTO_S_7 +331 0x1000 //TX_B_LESSCUT_RTO_S_1 +332 0x1000 //TX_B_LESSCUT_RTO_S_2 +333 0x1000 //TX_B_LESSCUT_RTO_S_3 +334 0x1000 //TX_B_LESSCUT_RTO_S_4 +335 0x1000 //TX_B_LESSCUT_RTO_S_5 +336 0x1000 //TX_B_LESSCUT_RTO_S_6 +337 0x1000 //TX_B_LESSCUT_RTO_S_7 338 0x7E14 //TX_LAMBDA_PFILT 339 0x7C29 //TX_LAMBDA_PFILT_S_0 340 0x7C29 //TX_LAMBDA_PFILT_S_1 @@ -31941,10 +27088,10 @@ 377 0x4E20 //TX_NOISE_TH_5_4 378 0x39DF //TX_NOISE_TH_6 379 0x0014 //TX_MINENOISE_TH -380 0x4000 //TX_MINENOISE_MIC0_TH_MTS -381 0xFFEE //TX_MINENOISE_MIC0_TH_EXP -382 0x6000 //TX_MINENOISE_MIC0_S_TH_MTS -383 0xFFF3 //TX_MINENOISE_MIC0_S_TH_EXP +380 0xD508 //TX_MORENS_TFMASK_TH +381 0x0001 //TX_DRC_QUIET_FLOOR +382 0x6D60 //TX_RATIODTL_CUT_TH +383 0x1482 //TX_DT_CUT_K1 384 0x00A5 //TX_OUT_ENER_S_TH_CLEAN 385 0x00A5 //TX_OUT_ENER_S_TH_LESSCLEAN 386 0x00A5 //TX_OUT_ENER_S_TH_NOISY @@ -31952,15 +27099,15 @@ 388 0x0200 //TX_OUT_ENER_TH_SPEECH 389 0x2000 //TX_SN_NPB_GAIN 390 0x0000 //TX_NN_NPB_GAIN -391 0x0000 //TX_CSX_ALPHA_0 -392 0x0000 //TX_CSX_ALPHA_1 -393 0x0000 //TX_CSX_ALPHA_2 -394 0x0000 //TX_CSX_ALPHA_3 -395 0x0800 //TX_MU_ARSP_EST -396 0x00C8 //TX_P_OUTBEAM_MIN_TH +391 0x3000 //TX_POST_MASK_SUP_HSNE +392 0x07D0 //TX_TAIL_DET_TH +393 0x4000 //TX_B_LESSCUT_RTO_WTA +394 0x0000 //TX_MEL_G_R +395 0x0080 //TX_SUPHIGH_TH +396 0x0000 //TX_MASK_G_R 397 0x0002 //TX_EXTRA_NS_L -398 0x0800 //TX_EXTRA_NS_A -399 0x0005 //TX_VR_NOISE_FLOOR_TH +398 0x1800 //TX_C_POST_FLT_MASK +399 0x7FFF //TX_A_POST_FLT_WNS 400 0x0148 //TX_MIN_G_LOW300HZ 401 0x0004 //TX_MAXLEVEL_CNG 402 0x00B4 //TX_STN_NOISE_TH @@ -32075,16 +27222,16 @@ 511 0x6666 //TX_MIC_TO_BFGAIN 512 0x0000 //TX_MICTOBFGAIN0 513 0x0000 //TX_FASTMUE_TH -514 0x0000 //TX_DERVB_LEN_0 -515 0x0000 //TX_DERVB_LEN_1 -516 0x0000 //TX_RHO_DERVB -517 0x0000 //TX_MIC_INDX_DERVB -518 0x0000 //TX_MU_DERVB -519 0x0000 //TX_DR_RESRV_0 -520 0x0000 //TX_DR_RESRV_1 -521 0x0000 //TX_DR_RESRV_2 -522 0x0000 //TX_DR_RESRV_3 -523 0x0000 //TX_DR_RESRV_4 +514 0x2CCC //TX_DEREVERB_LF_MU +515 0x3200 //TX_DEREVERB_HF_MU +516 0x0007 //TX_DEREVERB_DELAY +517 0x0004 //TX_DEREVERB_COEF_LEN +518 0x0003 //TX_DEREVERB_DNR +519 0x0000 //TX_DEREVERB_ALPHA +520 0x0000 //TX_DEREVERB_BETA +521 0x7FFF //TX_GSC_RTOL_TH +522 0x7FFF //TX_GSC_RTOH_TH +523 0x7E2C //TX_WIDE2_MEANHTH 524 0x0000 //TX_DR_RESRV_5 525 0x0000 //TX_DR_RESRV_6 526 0x0000 //TX_DR_RESRV_7 @@ -32128,24 +27275,24 @@ 564 0x0000 //TX_PB_RESRV_0 565 0x0000 //TX_PB_RESRV_1 566 0x0030 //TX_FDEQ_SUBNUM -567 0x504A //TX_FDEQ_GAIN_0 -568 0x4C54 //TX_FDEQ_GAIN_1 -569 0x554B //TX_FDEQ_GAIN_2 -570 0x4D4E //TX_FDEQ_GAIN_3 -571 0x4F4F //TX_FDEQ_GAIN_4 -572 0x4E51 //TX_FDEQ_GAIN_5 -573 0x5154 //TX_FDEQ_GAIN_6 -574 0x5456 //TX_FDEQ_GAIN_7 -575 0x5E66 //TX_FDEQ_GAIN_8 -576 0x675D //TX_FDEQ_GAIN_9 -577 0x5655 //TX_FDEQ_GAIN_10 -578 0x5956 //TX_FDEQ_GAIN_11 -579 0x5656 //TX_FDEQ_GAIN_12 -580 0x5953 //TX_FDEQ_GAIN_13 -581 0x575A //TX_FDEQ_GAIN_14 -582 0x5559 //TX_FDEQ_GAIN_15 -583 0x656E //TX_FDEQ_GAIN_16 -584 0x7B98 //TX_FDEQ_GAIN_17 +567 0x4C4A //TX_FDEQ_GAIN_0 +568 0x4B4F //TX_FDEQ_GAIN_1 +569 0x504B //TX_FDEQ_GAIN_2 +570 0x4A4C //TX_FDEQ_GAIN_3 +571 0x4A49 //TX_FDEQ_GAIN_4 +572 0x4F48 //TX_FDEQ_GAIN_5 +573 0x4A4E //TX_FDEQ_GAIN_6 +574 0x534E //TX_FDEQ_GAIN_7 +575 0x494F //TX_FDEQ_GAIN_8 +576 0x5E6E //TX_FDEQ_GAIN_9 +577 0x787A //TX_FDEQ_GAIN_10 +578 0x6A58 //TX_FDEQ_GAIN_11 +579 0x5051 //TX_FDEQ_GAIN_12 +580 0x5156 //TX_FDEQ_GAIN_13 +581 0x6168 //TX_FDEQ_GAIN_14 +582 0x7678 //TX_FDEQ_GAIN_15 +583 0x7A87 //TX_FDEQ_GAIN_16 +584 0x9898 //TX_FDEQ_GAIN_17 585 0x9898 //TX_FDEQ_GAIN_18 586 0x9848 //TX_FDEQ_GAIN_19 587 0x4848 //TX_FDEQ_GAIN_20 @@ -32184,15 +27331,15 @@ 620 0x4848 //TX_PREEQ_GAIN_MIC0_3 621 0x4848 //TX_PREEQ_GAIN_MIC0_4 622 0x4848 //TX_PREEQ_GAIN_MIC0_5 -623 0x4846 //TX_PREEQ_GAIN_MIC0_6 -624 0x4645 //TX_PREEQ_GAIN_MIC0_7 -625 0x4545 //TX_PREEQ_GAIN_MIC0_8 -626 0x4545 //TX_PREEQ_GAIN_MIC0_9 -627 0x4444 //TX_PREEQ_GAIN_MIC0_10 -628 0x4443 //TX_PREEQ_GAIN_MIC0_11 -629 0x4241 //TX_PREEQ_GAIN_MIC0_12 -630 0x3C3E //TX_PREEQ_GAIN_MIC0_13 -631 0x3E40 //TX_PREEQ_GAIN_MIC0_14 +623 0x4848 //TX_PREEQ_GAIN_MIC0_6 +624 0x4848 //TX_PREEQ_GAIN_MIC0_7 +625 0x4848 //TX_PREEQ_GAIN_MIC0_8 +626 0x4848 //TX_PREEQ_GAIN_MIC0_9 +627 0x4848 //TX_PREEQ_GAIN_MIC0_10 +628 0x4848 //TX_PREEQ_GAIN_MIC0_11 +629 0x4848 //TX_PREEQ_GAIN_MIC0_12 +630 0x4848 //TX_PREEQ_GAIN_MIC0_13 +631 0x4848 //TX_PREEQ_GAIN_MIC0_14 632 0x4848 //TX_PREEQ_GAIN_MIC0_15 633 0x4848 //TX_PREEQ_GAIN_MIC0_16 634 0x4848 //TX_PREEQ_GAIN_MIC0_17 @@ -32202,23 +27349,23 @@ 638 0x4848 //TX_PREEQ_GAIN_MIC0_21 639 0x4848 //TX_PREEQ_GAIN_MIC0_22 640 0x4848 //TX_PREEQ_GAIN_MIC0_23 -641 0x0202 //TX_PREEQ_BIN_MIC0_0 -642 0x0203 //TX_PREEQ_BIN_MIC0_1 -643 0x0303 //TX_PREEQ_BIN_MIC0_2 -644 0x0304 //TX_PREEQ_BIN_MIC0_3 -645 0x0405 //TX_PREEQ_BIN_MIC0_4 -646 0x0506 //TX_PREEQ_BIN_MIC0_5 -647 0x0808 //TX_PREEQ_BIN_MIC0_6 -648 0x0809 //TX_PREEQ_BIN_MIC0_7 -649 0x0A0A //TX_PREEQ_BIN_MIC0_8 -650 0x0C10 //TX_PREEQ_BIN_MIC0_9 -651 0x1013 //TX_PREEQ_BIN_MIC0_10 -652 0x1414 //TX_PREEQ_BIN_MIC0_11 -653 0x261E //TX_PREEQ_BIN_MIC0_12 -654 0x1E14 //TX_PREEQ_BIN_MIC0_13 -655 0x1414 //TX_PREEQ_BIN_MIC0_14 -656 0x2814 //TX_PREEQ_BIN_MIC0_15 -657 0x4000 //TX_PREEQ_BIN_MIC0_16 +641 0x1812 //TX_PREEQ_BIN_MIC0_0 +642 0x0A0A //TX_PREEQ_BIN_MIC0_1 +643 0x0808 //TX_PREEQ_BIN_MIC0_2 +644 0x080A //TX_PREEQ_BIN_MIC0_3 +645 0x0B09 //TX_PREEQ_BIN_MIC0_4 +646 0x0A06 //TX_PREEQ_BIN_MIC0_5 +647 0x0606 //TX_PREEQ_BIN_MIC0_6 +648 0x0605 //TX_PREEQ_BIN_MIC0_7 +649 0x050A //TX_PREEQ_BIN_MIC0_8 +650 0x1505 //TX_PREEQ_BIN_MIC0_9 +651 0x0506 //TX_PREEQ_BIN_MIC0_10 +652 0x0615 //TX_PREEQ_BIN_MIC0_11 +653 0x1516 //TX_PREEQ_BIN_MIC0_12 +654 0x2021 //TX_PREEQ_BIN_MIC0_13 +655 0x2021 //TX_PREEQ_BIN_MIC0_14 +656 0x2021 //TX_PREEQ_BIN_MIC0_15 +657 0x0800 //TX_PREEQ_BIN_MIC0_16 658 0x0000 //TX_PREEQ_BIN_MIC0_17 659 0x0000 //TX_PREEQ_BIN_MIC0_18 660 0x0000 //TX_PREEQ_BIN_MIC0_19 @@ -32233,17 +27380,17 @@ 669 0x4848 //TX_PREEQ_GAIN_MIC1_3 670 0x4848 //TX_PREEQ_GAIN_MIC1_4 671 0x4848 //TX_PREEQ_GAIN_MIC1_5 -672 0x4849 //TX_PREEQ_GAIN_MIC1_6 -673 0x4A4B //TX_PREEQ_GAIN_MIC1_7 -674 0x4C4B //TX_PREEQ_GAIN_MIC1_8 -675 0x4A48 //TX_PREEQ_GAIN_MIC1_9 -676 0x4B4C //TX_PREEQ_GAIN_MIC1_10 -677 0x4C4B //TX_PREEQ_GAIN_MIC1_11 -678 0x4838 //TX_PREEQ_GAIN_MIC1_12 -679 0x3858 //TX_PREEQ_GAIN_MIC1_13 -680 0x7060 //TX_PREEQ_GAIN_MIC1_14 -681 0x9870 //TX_PREEQ_GAIN_MIC1_15 -682 0x5848 //TX_PREEQ_GAIN_MIC1_16 +672 0x4A4C //TX_PREEQ_GAIN_MIC1_6 +673 0x4E50 //TX_PREEQ_GAIN_MIC1_7 +674 0x5456 //TX_PREEQ_GAIN_MIC1_8 +675 0x585C //TX_PREEQ_GAIN_MIC1_9 +676 0x5C64 //TX_PREEQ_GAIN_MIC1_10 +677 0x7478 //TX_PREEQ_GAIN_MIC1_11 +678 0x705C //TX_PREEQ_GAIN_MIC1_12 +679 0x4838 //TX_PREEQ_GAIN_MIC1_13 +680 0x3C70 //TX_PREEQ_GAIN_MIC1_14 +681 0x4848 //TX_PREEQ_GAIN_MIC1_15 +682 0x4848 //TX_PREEQ_GAIN_MIC1_16 683 0x4848 //TX_PREEQ_GAIN_MIC1_17 684 0x4848 //TX_PREEQ_GAIN_MIC1_18 685 0x4848 //TX_PREEQ_GAIN_MIC1_19 @@ -32257,17 +27404,17 @@ 693 0x0304 //TX_PREEQ_BIN_MIC1_3 694 0x0405 //TX_PREEQ_BIN_MIC1_4 695 0x0506 //TX_PREEQ_BIN_MIC1_5 -696 0x0808 //TX_PREEQ_BIN_MIC1_6 -697 0x0809 //TX_PREEQ_BIN_MIC1_7 -698 0x0A0A //TX_PREEQ_BIN_MIC1_8 +696 0x0708 //TX_PREEQ_BIN_MIC1_6 +697 0x0909 //TX_PREEQ_BIN_MIC1_7 +698 0x090B //TX_PREEQ_BIN_MIC1_8 699 0x0C10 //TX_PREEQ_BIN_MIC1_9 700 0x1013 //TX_PREEQ_BIN_MIC1_10 701 0x1414 //TX_PREEQ_BIN_MIC1_11 -702 0x261E //TX_PREEQ_BIN_MIC1_12 -703 0x1E14 //TX_PREEQ_BIN_MIC1_13 -704 0x1414 //TX_PREEQ_BIN_MIC1_14 -705 0x2814 //TX_PREEQ_BIN_MIC1_15 -706 0x4000 //TX_PREEQ_BIN_MIC1_16 +702 0x1414 //TX_PREEQ_BIN_MIC1_12 +703 0x1C1E //TX_PREEQ_BIN_MIC1_13 +704 0x1E28 //TX_PREEQ_BIN_MIC1_14 +705 0x462C //TX_PREEQ_BIN_MIC1_15 +706 0x0000 //TX_PREEQ_BIN_MIC1_16 707 0x0000 //TX_PREEQ_BIN_MIC1_17 708 0x0000 //TX_PREEQ_BIN_MIC1_18 709 0x0000 //TX_PREEQ_BIN_MIC1_19 @@ -32300,23 +27447,23 @@ 736 0x4848 //TX_PREEQ_GAIN_MIC2_21 737 0x4848 //TX_PREEQ_GAIN_MIC2_22 738 0x4848 //TX_PREEQ_GAIN_MIC2_23 -739 0x0202 //TX_PREEQ_BIN_MIC2_0 -740 0x0203 //TX_PREEQ_BIN_MIC2_1 -741 0x0303 //TX_PREEQ_BIN_MIC2_2 -742 0x0304 //TX_PREEQ_BIN_MIC2_3 -743 0x0405 //TX_PREEQ_BIN_MIC2_4 -744 0x0506 //TX_PREEQ_BIN_MIC2_5 -745 0x0808 //TX_PREEQ_BIN_MIC2_6 -746 0x0809 //TX_PREEQ_BIN_MIC2_7 -747 0x0A0A //TX_PREEQ_BIN_MIC2_8 -748 0x0C10 //TX_PREEQ_BIN_MIC2_9 -749 0x1013 //TX_PREEQ_BIN_MIC2_10 -750 0x1414 //TX_PREEQ_BIN_MIC2_11 -751 0x261E //TX_PREEQ_BIN_MIC2_12 -752 0x1E14 //TX_PREEQ_BIN_MIC2_13 -753 0x1414 //TX_PREEQ_BIN_MIC2_14 -754 0x2814 //TX_PREEQ_BIN_MIC2_15 -755 0x4000 //TX_PREEQ_BIN_MIC2_16 +739 0x0E10 //TX_PREEQ_BIN_MIC2_0 +740 0x1010 //TX_PREEQ_BIN_MIC2_1 +741 0x1010 //TX_PREEQ_BIN_MIC2_2 +742 0x1010 //TX_PREEQ_BIN_MIC2_3 +743 0x1010 //TX_PREEQ_BIN_MIC2_4 +744 0x1010 //TX_PREEQ_BIN_MIC2_5 +745 0x1010 //TX_PREEQ_BIN_MIC2_6 +746 0x1010 //TX_PREEQ_BIN_MIC2_7 +747 0x1010 //TX_PREEQ_BIN_MIC2_8 +748 0x1010 //TX_PREEQ_BIN_MIC2_9 +749 0x1010 //TX_PREEQ_BIN_MIC2_10 +750 0x1010 //TX_PREEQ_BIN_MIC2_11 +751 0x1010 //TX_PREEQ_BIN_MIC2_12 +752 0x1010 //TX_PREEQ_BIN_MIC2_13 +753 0x1010 //TX_PREEQ_BIN_MIC2_14 +754 0x0200 //TX_PREEQ_BIN_MIC2_15 +755 0x0000 //TX_PREEQ_BIN_MIC2_16 756 0x0000 //TX_PREEQ_BIN_MIC2_17 757 0x0000 //TX_PREEQ_BIN_MIC2_18 758 0x0000 //TX_PREEQ_BIN_MIC2_19 @@ -32427,7 +27574,7 @@ 863 0x199A //TX_TDDRC_HMNC_GAIN 864 0x0000 //TX_TDDRC_SMT_FLAG 865 0x0CCD //TX_TDDRC_SMT_W -866 0x05F5 //TX_TDDRC_DRC_GAIN +866 0x0504 //TX_TDDRC_DRC_GAIN 867 0x7FFF //TX_TDDRC_LMT_THRD 868 0x0000 //TX_TDDRC_LMT_ALPHA 869 0x0000 //TX_TFMASKLTH @@ -32458,6 +27605,71 @@ 894 0xC000 //TX_FASTNS_SSA_THHFL 895 0xCCCC //TX_FASTNS_SSA_THLFH 896 0xD999 //TX_FASTNS_SSA_THHFH +897 0x2339 //TX_SENDFUNC_REG_MICMUTE +898 0x0021 //TX_SENDFUNC_REG_MICMUTE1 +899 0x02BC //TX_MICMUTE_RATIO_THR +900 0x0140 //TX_MICMUTE_AMP_THR +901 0x0004 //TX_MICMUTE_HPF_IND +902 0x00C0 //TX_MICMUTE_LOG_EYR_TH +903 0x0008 //TX_MICMUTE_CVG_TIME +904 0x0008 //TX_MICMUTE_RELEASE_TIME +905 0x01FE //TX_MIC_VOLUME_MIC0MUTE +906 0x0020 //TX_MICMUTE_EPD_OFFSET_0 +907 0x001E //TX_MICMUTE_FRQ_AEC_L +908 0x7999 //TX_MICMUTE_EAD_THR +909 0x7FFF //TX_MICMUTE_LAMBDA_CB_NLE +910 0x7FFF //TX_MICMUTE_LAMBDA_RE_EST +911 0x4000 //TX_DTD_THR1_MICMUTE_0 +912 0x7000 //TX_DTD_THR1_MICMUTE_1 +913 0x7FFF //TX_DTD_THR1_MICMUTE_2 +914 0x7FFF //TX_DTD_THR1_MICMUTE_3 +915 0x6CCC //TX_DTD_THR2_MICMUTE_0 +916 0x0400 //TX_MICMUTE_MIN_EQ_RE_EST_0 +917 0x0400 //TX_MICMUTE_MIN_EQ_RE_EST_1 +918 0x1000 //TX_MICMUTE_MIN_EQ_RE_EST_2 +919 0x7FFF //TX_MICMUTE_MIN_EQ_RE_EST_3 +920 0x7FFF //TX_MICMUTE_MIN_EQ_RE_EST_4 +921 0x4000 //TX_MICMUTE_C_POST_FLT +922 0x03E8 //TX_MICMUTE_DT_CUT_K +923 0x0001 //TX_MICMUTE_DT_CUT_THR +924 0x03E8 //TX_MICMUTE_DT_CUT_K2 +925 0x0001 //TX_MICMUTE_DT_CUT_THR2 +926 0x0064 //TX_MICMUTE_DT2_HOLD_N +927 0x1000 //TX_MICMUTE_RATIODTH_THCUT +928 0x1000 //TX_MICMUTE_B_POST_FLT_ECHOL +929 0x7FFF //TX_MICMUTE_B_POST_FLT_ECHOH +930 0x0400 //TX_MICMUTE_C_POST_FLT_MASK +931 0x7999 //TX_MICMUTE_RATIODTL_CUT_TH +932 0x0258 //TX_MICMUTE_DT_CUT_K1 +933 0x0800 //TX_MICMUTE_N2_SN_EST +934 0xFC00 //TX_MICMUTE_THR_SN_EST_0 +935 0x001C //TX_MICMUTE_MIN_G_CTRL_0 +936 0x6000 //TX_MICMUTE_A_POST_FILT_S_0 +937 0x7000 //TX_MICMUTE_B_POST_FILT_0 +938 0x2710 //TX_MIC1RUB_AMP_THR +939 0x0010 //TX_MIC1MUTE_RATIO_THR +940 0x0450 //TX_MIC1MUTE_AMP_THR +941 0x0008 //TX_MIC1MUTE_CVG_TIME +942 0x0008 //TX_MIC1MUTE_RELEASE_TIME +943 0x0000 //TX_AMS_RESRV_01 +944 0x0000 //TX_AMS_RESRV_02 +945 0x0000 //TX_AMS_RESRV_03 +946 0x0000 //TX_AMS_RESRV_04 +947 0x0000 //TX_AMS_RESRV_05 +948 0x0000 //TX_AMS_RESRV_06 +949 0x0000 //TX_AMS_RESRV_07 +950 0x0000 //TX_AMS_RESRV_08 +951 0x0000 //TX_AMS_RESRV_09 +952 0x0000 //TX_AMS_RESRV_10 +953 0x0000 //TX_AMS_RESRV_11 +954 0x0000 //TX_AMS_RESRV_12 +955 0x0000 //TX_AMS_RESRV_13 +956 0x0000 //TX_AMS_RESRV_14 +957 0x0000 //TX_AMS_RESRV_15 +958 0x0000 //TX_AMS_RESRV_16 +959 0x0000 //TX_AMS_RESRV_17 +960 0x0000 //TX_AMS_RESRV_18 +961 0x0000 //TX_AMS_RESRV_19 #RX 0 0x000C //RX_RECVFUNC_MODE_0 1 0x0000 //RX_RECVFUNC_MODE_1 @@ -33309,4 +28521,35565 @@ 110 0x0000 //RX_FDDRC_RESRV_0 129 0x0100 //RX_SPK_VOL 130 0x0000 //RX_VOL_RESRV_0 +#RX 2 +157 0x000C //RX_RECVFUNC_MODE_0 +158 0x0000 //RX_RECVFUNC_MODE_1 +159 0x0004 //RX_SAMPLINGFREQ_SIG +160 0x0004 //RX_SAMPLINGFREQ_PROC +161 0x000A //RX_FRAME_SZ +162 0x0000 //RX_DELAY_OPT +163 0x1000 //RX_TDDRC_ALPHA_UP_1 +164 0x1000 //RX_TDDRC_ALPHA_UP_2 +165 0x1000 //RX_TDDRC_ALPHA_UP_3 +166 0x1000 //RX_TDDRC_ALPHA_UP_4 +167 0x0800 //RX_PGA +168 0x7FFF //RX_A_HP +169 0x4000 //RX_B_PE +170 0x5800 //RX_THR_PITCH_DET_0 +171 0x5000 //RX_THR_PITCH_DET_1 +172 0x4000 //RX_THR_PITCH_DET_2 +173 0x0008 //RX_PITCH_BFR_LEN +174 0x0003 //RX_SBD_PITCH_DET +175 0x0100 //RX_PP_RESRV_0 +176 0x0020 //RX_PP_RESRV_1 +177 0x0600 //RX_N_SN_EST +178 0x000C //RX_N2_SN_EST +179 0x000F //RX_NS_LVL_CTRL +180 0xF800 //RX_THR_SN_EST +181 0x7E00 //RX_LAMBDA_PFILT +182 0x000A //RX_FENS_RESRV_0 +183 0x0190 //RX_FENS_RESRV_1 +184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +187 0x0002 //RX_EXTRA_NS_L +188 0x0800 //RX_EXTRA_NS_A +189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +190 0x7000 //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +192 0x199A //RX_A_POST_FLT +193 0x0000 //RX_LMT_THRD +194 0x4000 //RX_LMT_ALPHA +195 0x0030 //RX_FDEQ_SUBNUM +196 0x4848 //RX_FDEQ_GAIN_0 +197 0x4848 //RX_FDEQ_GAIN_1 +198 0x4844 //RX_FDEQ_GAIN_2 +199 0x4B4D //RX_FDEQ_GAIN_3 +200 0x4E50 //RX_FDEQ_GAIN_4 +201 0x5254 //RX_FDEQ_GAIN_5 +202 0x5658 //RX_FDEQ_GAIN_6 +203 0x5C60 //RX_FDEQ_GAIN_7 +204 0x6468 //RX_FDEQ_GAIN_8 +205 0x6C70 //RX_FDEQ_GAIN_9 +206 0x7474 //RX_FDEQ_GAIN_10 +207 0x7474 //RX_FDEQ_GAIN_11 +208 0x7474 //RX_FDEQ_GAIN_12 +209 0x7474 //RX_FDEQ_GAIN_13 +210 0x7474 //RX_FDEQ_GAIN_14 +211 0x7474 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0202 //RX_FDEQ_BIN_0 +221 0x0203 //RX_FDEQ_BIN_1 +222 0x0402 //RX_FDEQ_BIN_2 +223 0x0304 //RX_FDEQ_BIN_3 +224 0x0405 //RX_FDEQ_BIN_4 +225 0x0506 //RX_FDEQ_BIN_5 +226 0x0708 //RX_FDEQ_BIN_6 +227 0x090A //RX_FDEQ_BIN_7 +228 0x0B0C //RX_FDEQ_BIN_8 +229 0x0D0E //RX_FDEQ_BIN_9 +230 0x1214 //RX_FDEQ_BIN_10 +231 0x1E1E //RX_FDEQ_BIN_11 +232 0x1E1E //RX_FDEQ_BIN_12 +233 0x1E1E //RX_FDEQ_BIN_13 +234 0x1E1E //RX_FDEQ_BIN_14 +235 0x202C //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x4000 //RX_FDEQ_RESRV_0 +245 0x0320 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0030 //RX_FDDRC_BAND_MARGIN_1 +248 0x0050 //RX_FDDRC_BAND_MARGIN_2 +249 0x0080 //RX_FDDRC_BAND_MARGIN_3 +250 0x0007 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x5000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x6400 //RX_FDDRC_THRD_3_2 +258 0x6400 //RX_FDDRC_THRD_3_3 +259 0x2000 //RX_FDDRC_SLANT_0_0 +260 0x2000 //RX_FDDRC_SLANT_0_1 +261 0x2000 //RX_FDDRC_SLANT_0_2 +262 0x2000 //RX_FDDRC_SLANT_0_3 +263 0x5333 //RX_FDDRC_SLANT_1_0 +264 0x5333 //RX_FDDRC_SLANT_1_1 +265 0x5333 //RX_FDDRC_SLANT_1_2 +266 0x5333 //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +268 0x0002 //RX_FILTINDX +269 0x0000 //RX_TDDRC_THRD_0 +270 0x0000 //RX_TDDRC_THRD_1 +271 0x1800 //RX_TDDRC_THRD_2 +272 0x1800 //RX_TDDRC_THRD_3 +273 0x3000 //RX_TDDRC_SLANT_0 +274 0x6E00 //RX_TDDRC_SLANT_1 +275 0x1000 //RX_TDDRC_ALPHA_UP_0 +276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x199A //RX_TDDRC_HMNC_GAIN +279 0x0001 //RX_TDDRC_SMT_FLAG +280 0x0CCD //RX_TDDRC_SMT_W +281 0x01E0 //RX_TDDRC_DRC_GAIN +282 0x7C00 //RX_LAMBDA_PKA_FP +283 0x2000 //RX_TPKA_FP +284 0x2000 //RX_MIN_G_FP +285 0x0080 //RX_MAX_G_FP +286 0x0100 //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 +288 0x0000 //RX_MAXLEVEL_CNG +289 0x3000 //RX_BWE_UV_TH +290 0x3000 //RX_BWE_UV_TH2 +291 0x1800 //RX_BWE_UV_TH3 +292 0x1000 //RX_BWE_V_TH +293 0x04CD //RX_BWE_GAIN1_V_TH1 +294 0x0F33 //RX_BWE_GAIN1_V_TH2 +295 0x7333 //RX_BWE_UV_EQ +296 0x199A //RX_BWE_V_EQ +297 0x7333 //RX_BWE_TONE_TH +298 0x0004 //RX_BWE_UV_HOLD_T +299 0x6CCD //RX_BWE_GAIN2_ALPHA +300 0x799A //RX_BWE_GAIN3_ALPHA +301 0x001E //RX_BWE_CUTOFF +302 0x3000 //RX_BWE_GAINFILL +303 0x3200 //RX_BWE_MAXTH_TONE +304 0x2000 //RX_BWE_EQ_0 +305 0x2000 //RX_BWE_EQ_1 +306 0x2000 //RX_BWE_EQ_2 +307 0x2000 //RX_BWE_EQ_3 +308 0x2000 //RX_BWE_EQ_4 +309 0x2000 //RX_BWE_EQ_5 +310 0x2000 //RX_BWE_EQ_6 +311 0x0000 //RX_BWE_RESRV_0 +312 0x0000 //RX_BWE_RESRV_1 +313 0x0000 //RX_BWE_RESRV_2 +#VOL 0 +163 0x1000 //RX_TDDRC_ALPHA_UP_1 +164 0x1000 //RX_TDDRC_ALPHA_UP_2 +165 0x1000 //RX_TDDRC_ALPHA_UP_3 +166 0x1000 //RX_TDDRC_ALPHA_UP_4 +184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +190 0x7000 //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +269 0x0000 //RX_TDDRC_THRD_0 +270 0x0000 //RX_TDDRC_THRD_1 +271 0x1800 //RX_TDDRC_THRD_2 +272 0x1800 //RX_TDDRC_THRD_3 +273 0x3000 //RX_TDDRC_SLANT_0 +274 0x6E00 //RX_TDDRC_SLANT_1 +275 0x1000 //RX_TDDRC_ALPHA_UP_0 +276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x199A //RX_TDDRC_HMNC_GAIN +279 0x0001 //RX_TDDRC_SMT_FLAG +280 0x0CCD //RX_TDDRC_SMT_W +281 0x01E0 //RX_TDDRC_DRC_GAIN +195 0x0030 //RX_FDEQ_SUBNUM +196 0x4848 //RX_FDEQ_GAIN_0 +197 0x4848 //RX_FDEQ_GAIN_1 +198 0x4844 //RX_FDEQ_GAIN_2 +199 0x4B4D //RX_FDEQ_GAIN_3 +200 0x4E50 //RX_FDEQ_GAIN_4 +201 0x5254 //RX_FDEQ_GAIN_5 +202 0x5658 //RX_FDEQ_GAIN_6 +203 0x5C60 //RX_FDEQ_GAIN_7 +204 0x6468 //RX_FDEQ_GAIN_8 +205 0x6C70 //RX_FDEQ_GAIN_9 +206 0x7474 //RX_FDEQ_GAIN_10 +207 0x7474 //RX_FDEQ_GAIN_11 +208 0x7474 //RX_FDEQ_GAIN_12 +209 0x7474 //RX_FDEQ_GAIN_13 +210 0x7474 //RX_FDEQ_GAIN_14 +211 0x7474 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0202 //RX_FDEQ_BIN_0 +221 0x0203 //RX_FDEQ_BIN_1 +222 0x0402 //RX_FDEQ_BIN_2 +223 0x0304 //RX_FDEQ_BIN_3 +224 0x0405 //RX_FDEQ_BIN_4 +225 0x0506 //RX_FDEQ_BIN_5 +226 0x0708 //RX_FDEQ_BIN_6 +227 0x090A //RX_FDEQ_BIN_7 +228 0x0B0C //RX_FDEQ_BIN_8 +229 0x0D0E //RX_FDEQ_BIN_9 +230 0x1214 //RX_FDEQ_BIN_10 +231 0x1E1E //RX_FDEQ_BIN_11 +232 0x1E1E //RX_FDEQ_BIN_12 +233 0x1E1E //RX_FDEQ_BIN_13 +234 0x1E1E //RX_FDEQ_BIN_14 +235 0x202C //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x4000 //RX_FDEQ_RESRV_0 +245 0x0320 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0030 //RX_FDDRC_BAND_MARGIN_1 +248 0x0050 //RX_FDDRC_BAND_MARGIN_2 +249 0x0080 //RX_FDDRC_BAND_MARGIN_3 +250 0x0007 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x5000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x6400 //RX_FDDRC_THRD_3_2 +258 0x6400 //RX_FDDRC_THRD_3_3 +259 0x2000 //RX_FDDRC_SLANT_0_0 +260 0x2000 //RX_FDDRC_SLANT_0_1 +261 0x2000 //RX_FDDRC_SLANT_0_2 +262 0x2000 //RX_FDDRC_SLANT_0_3 +263 0x5333 //RX_FDDRC_SLANT_1_0 +264 0x5333 //RX_FDDRC_SLANT_1_1 +265 0x5333 //RX_FDDRC_SLANT_1_2 +266 0x5333 //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +286 0x0100 //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 +#VOL 1 +163 0x1000 //RX_TDDRC_ALPHA_UP_1 +164 0x1000 //RX_TDDRC_ALPHA_UP_2 +165 0x1000 //RX_TDDRC_ALPHA_UP_3 +166 0x1000 //RX_TDDRC_ALPHA_UP_4 +184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +190 0x7000 //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +269 0x0000 //RX_TDDRC_THRD_0 +270 0x0000 //RX_TDDRC_THRD_1 +271 0x1800 //RX_TDDRC_THRD_2 +272 0x1800 //RX_TDDRC_THRD_3 +273 0x3000 //RX_TDDRC_SLANT_0 +274 0x6E00 //RX_TDDRC_SLANT_1 +275 0x1000 //RX_TDDRC_ALPHA_UP_0 +276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x199A //RX_TDDRC_HMNC_GAIN +279 0x0001 //RX_TDDRC_SMT_FLAG +280 0x0CCD //RX_TDDRC_SMT_W +281 0x01E0 //RX_TDDRC_DRC_GAIN +195 0x0030 //RX_FDEQ_SUBNUM +196 0x4848 //RX_FDEQ_GAIN_0 +197 0x4848 //RX_FDEQ_GAIN_1 +198 0x4844 //RX_FDEQ_GAIN_2 +199 0x4B4D //RX_FDEQ_GAIN_3 +200 0x4E50 //RX_FDEQ_GAIN_4 +201 0x5254 //RX_FDEQ_GAIN_5 +202 0x5658 //RX_FDEQ_GAIN_6 +203 0x5C60 //RX_FDEQ_GAIN_7 +204 0x6468 //RX_FDEQ_GAIN_8 +205 0x6C70 //RX_FDEQ_GAIN_9 +206 0x7474 //RX_FDEQ_GAIN_10 +207 0x7474 //RX_FDEQ_GAIN_11 +208 0x7474 //RX_FDEQ_GAIN_12 +209 0x7474 //RX_FDEQ_GAIN_13 +210 0x7474 //RX_FDEQ_GAIN_14 +211 0x7474 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0202 //RX_FDEQ_BIN_0 +221 0x0203 //RX_FDEQ_BIN_1 +222 0x0402 //RX_FDEQ_BIN_2 +223 0x0304 //RX_FDEQ_BIN_3 +224 0x0405 //RX_FDEQ_BIN_4 +225 0x0506 //RX_FDEQ_BIN_5 +226 0x0708 //RX_FDEQ_BIN_6 +227 0x090A //RX_FDEQ_BIN_7 +228 0x0B0C //RX_FDEQ_BIN_8 +229 0x0D0E //RX_FDEQ_BIN_9 +230 0x1214 //RX_FDEQ_BIN_10 +231 0x1E1E //RX_FDEQ_BIN_11 +232 0x1E1E //RX_FDEQ_BIN_12 +233 0x1E1E //RX_FDEQ_BIN_13 +234 0x1E1E //RX_FDEQ_BIN_14 +235 0x202C //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x4000 //RX_FDEQ_RESRV_0 +245 0x0320 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0030 //RX_FDDRC_BAND_MARGIN_1 +248 0x0050 //RX_FDDRC_BAND_MARGIN_2 +249 0x0080 //RX_FDDRC_BAND_MARGIN_3 +250 0x0007 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x5000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x6400 //RX_FDDRC_THRD_3_2 +258 0x6400 //RX_FDDRC_THRD_3_3 +259 0x2000 //RX_FDDRC_SLANT_0_0 +260 0x2000 //RX_FDDRC_SLANT_0_1 +261 0x2000 //RX_FDDRC_SLANT_0_2 +262 0x2000 //RX_FDDRC_SLANT_0_3 +263 0x5333 //RX_FDDRC_SLANT_1_0 +264 0x5333 //RX_FDDRC_SLANT_1_1 +265 0x5333 //RX_FDDRC_SLANT_1_2 +266 0x5333 //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +286 0x0100 //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 +#VOL 2 +163 0x1000 //RX_TDDRC_ALPHA_UP_1 +164 0x1000 //RX_TDDRC_ALPHA_UP_2 +165 0x1000 //RX_TDDRC_ALPHA_UP_3 +166 0x1000 //RX_TDDRC_ALPHA_UP_4 +184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +190 0x7000 //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +269 0x0000 //RX_TDDRC_THRD_0 +270 0x0000 //RX_TDDRC_THRD_1 +271 0x1800 //RX_TDDRC_THRD_2 +272 0x1800 //RX_TDDRC_THRD_3 +273 0x3000 //RX_TDDRC_SLANT_0 +274 0x6E00 //RX_TDDRC_SLANT_1 +275 0x1000 //RX_TDDRC_ALPHA_UP_0 +276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x199A //RX_TDDRC_HMNC_GAIN +279 0x0001 //RX_TDDRC_SMT_FLAG +280 0x0CCD //RX_TDDRC_SMT_W +281 0x01E0 //RX_TDDRC_DRC_GAIN +195 0x0030 //RX_FDEQ_SUBNUM +196 0x4848 //RX_FDEQ_GAIN_0 +197 0x4848 //RX_FDEQ_GAIN_1 +198 0x4844 //RX_FDEQ_GAIN_2 +199 0x4B4D //RX_FDEQ_GAIN_3 +200 0x4E50 //RX_FDEQ_GAIN_4 +201 0x5254 //RX_FDEQ_GAIN_5 +202 0x5658 //RX_FDEQ_GAIN_6 +203 0x5C60 //RX_FDEQ_GAIN_7 +204 0x6468 //RX_FDEQ_GAIN_8 +205 0x6C70 //RX_FDEQ_GAIN_9 +206 0x7474 //RX_FDEQ_GAIN_10 +207 0x7474 //RX_FDEQ_GAIN_11 +208 0x7474 //RX_FDEQ_GAIN_12 +209 0x7474 //RX_FDEQ_GAIN_13 +210 0x7474 //RX_FDEQ_GAIN_14 +211 0x7474 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0202 //RX_FDEQ_BIN_0 +221 0x0203 //RX_FDEQ_BIN_1 +222 0x0402 //RX_FDEQ_BIN_2 +223 0x0304 //RX_FDEQ_BIN_3 +224 0x0405 //RX_FDEQ_BIN_4 +225 0x0506 //RX_FDEQ_BIN_5 +226 0x0708 //RX_FDEQ_BIN_6 +227 0x090A //RX_FDEQ_BIN_7 +228 0x0B0C //RX_FDEQ_BIN_8 +229 0x0D0E //RX_FDEQ_BIN_9 +230 0x1214 //RX_FDEQ_BIN_10 +231 0x1E1E //RX_FDEQ_BIN_11 +232 0x1E1E //RX_FDEQ_BIN_12 +233 0x1E1E //RX_FDEQ_BIN_13 +234 0x1E1E //RX_FDEQ_BIN_14 +235 0x202C //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x4000 //RX_FDEQ_RESRV_0 +245 0x0320 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0030 //RX_FDDRC_BAND_MARGIN_1 +248 0x0050 //RX_FDDRC_BAND_MARGIN_2 +249 0x0080 //RX_FDDRC_BAND_MARGIN_3 +250 0x0007 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x5000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x6400 //RX_FDDRC_THRD_3_2 +258 0x6400 //RX_FDDRC_THRD_3_3 +259 0x2000 //RX_FDDRC_SLANT_0_0 +260 0x2000 //RX_FDDRC_SLANT_0_1 +261 0x2000 //RX_FDDRC_SLANT_0_2 +262 0x2000 //RX_FDDRC_SLANT_0_3 +263 0x5333 //RX_FDDRC_SLANT_1_0 +264 0x5333 //RX_FDDRC_SLANT_1_1 +265 0x5333 //RX_FDDRC_SLANT_1_2 +266 0x5333 //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +286 0x0100 //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 +#VOL 3 +163 0x1000 //RX_TDDRC_ALPHA_UP_1 +164 0x1000 //RX_TDDRC_ALPHA_UP_2 +165 0x1000 //RX_TDDRC_ALPHA_UP_3 +166 0x1000 //RX_TDDRC_ALPHA_UP_4 +184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +190 0x7000 //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +269 0x0000 //RX_TDDRC_THRD_0 +270 0x0000 //RX_TDDRC_THRD_1 +271 0x1800 //RX_TDDRC_THRD_2 +272 0x1800 //RX_TDDRC_THRD_3 +273 0x3000 //RX_TDDRC_SLANT_0 +274 0x6E00 //RX_TDDRC_SLANT_1 +275 0x1000 //RX_TDDRC_ALPHA_UP_0 +276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x199A //RX_TDDRC_HMNC_GAIN +279 0x0001 //RX_TDDRC_SMT_FLAG +280 0x0CCD //RX_TDDRC_SMT_W +281 0x01E0 //RX_TDDRC_DRC_GAIN +195 0x0030 //RX_FDEQ_SUBNUM +196 0x4848 //RX_FDEQ_GAIN_0 +197 0x4848 //RX_FDEQ_GAIN_1 +198 0x4844 //RX_FDEQ_GAIN_2 +199 0x4B4D //RX_FDEQ_GAIN_3 +200 0x4E50 //RX_FDEQ_GAIN_4 +201 0x5254 //RX_FDEQ_GAIN_5 +202 0x5658 //RX_FDEQ_GAIN_6 +203 0x5C60 //RX_FDEQ_GAIN_7 +204 0x6468 //RX_FDEQ_GAIN_8 +205 0x6C70 //RX_FDEQ_GAIN_9 +206 0x7474 //RX_FDEQ_GAIN_10 +207 0x7474 //RX_FDEQ_GAIN_11 +208 0x7474 //RX_FDEQ_GAIN_12 +209 0x7474 //RX_FDEQ_GAIN_13 +210 0x7474 //RX_FDEQ_GAIN_14 +211 0x7474 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0202 //RX_FDEQ_BIN_0 +221 0x0203 //RX_FDEQ_BIN_1 +222 0x0402 //RX_FDEQ_BIN_2 +223 0x0304 //RX_FDEQ_BIN_3 +224 0x0405 //RX_FDEQ_BIN_4 +225 0x0506 //RX_FDEQ_BIN_5 +226 0x0708 //RX_FDEQ_BIN_6 +227 0x090A //RX_FDEQ_BIN_7 +228 0x0B0C //RX_FDEQ_BIN_8 +229 0x0D0E //RX_FDEQ_BIN_9 +230 0x1214 //RX_FDEQ_BIN_10 +231 0x1E1E //RX_FDEQ_BIN_11 +232 0x1E1E //RX_FDEQ_BIN_12 +233 0x1E1E //RX_FDEQ_BIN_13 +234 0x1E1E //RX_FDEQ_BIN_14 +235 0x202C //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x4000 //RX_FDEQ_RESRV_0 +245 0x0320 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0030 //RX_FDDRC_BAND_MARGIN_1 +248 0x0050 //RX_FDDRC_BAND_MARGIN_2 +249 0x0080 //RX_FDDRC_BAND_MARGIN_3 +250 0x0007 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x5000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x6400 //RX_FDDRC_THRD_3_2 +258 0x6400 //RX_FDDRC_THRD_3_3 +259 0x2000 //RX_FDDRC_SLANT_0_0 +260 0x2000 //RX_FDDRC_SLANT_0_1 +261 0x2000 //RX_FDDRC_SLANT_0_2 +262 0x2000 //RX_FDDRC_SLANT_0_3 +263 0x5333 //RX_FDDRC_SLANT_1_0 +264 0x5333 //RX_FDDRC_SLANT_1_1 +265 0x5333 //RX_FDDRC_SLANT_1_2 +266 0x5333 //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +286 0x0100 //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 +#VOL 4 +163 0x1000 //RX_TDDRC_ALPHA_UP_1 +164 0x1000 //RX_TDDRC_ALPHA_UP_2 +165 0x1000 //RX_TDDRC_ALPHA_UP_3 +166 0x1000 //RX_TDDRC_ALPHA_UP_4 +184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +190 0x7000 //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +269 0x0000 //RX_TDDRC_THRD_0 +270 0x0000 //RX_TDDRC_THRD_1 +271 0x1800 //RX_TDDRC_THRD_2 +272 0x1800 //RX_TDDRC_THRD_3 +273 0x3000 //RX_TDDRC_SLANT_0 +274 0x6E00 //RX_TDDRC_SLANT_1 +275 0x1000 //RX_TDDRC_ALPHA_UP_0 +276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x199A //RX_TDDRC_HMNC_GAIN +279 0x0001 //RX_TDDRC_SMT_FLAG +280 0x0CCD //RX_TDDRC_SMT_W +281 0x01E0 //RX_TDDRC_DRC_GAIN +195 0x0030 //RX_FDEQ_SUBNUM +196 0x4848 //RX_FDEQ_GAIN_0 +197 0x4848 //RX_FDEQ_GAIN_1 +198 0x4844 //RX_FDEQ_GAIN_2 +199 0x4B4D //RX_FDEQ_GAIN_3 +200 0x4E50 //RX_FDEQ_GAIN_4 +201 0x5254 //RX_FDEQ_GAIN_5 +202 0x5658 //RX_FDEQ_GAIN_6 +203 0x5C60 //RX_FDEQ_GAIN_7 +204 0x6468 //RX_FDEQ_GAIN_8 +205 0x6C70 //RX_FDEQ_GAIN_9 +206 0x7474 //RX_FDEQ_GAIN_10 +207 0x7474 //RX_FDEQ_GAIN_11 +208 0x7474 //RX_FDEQ_GAIN_12 +209 0x7474 //RX_FDEQ_GAIN_13 +210 0x7474 //RX_FDEQ_GAIN_14 +211 0x7474 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0202 //RX_FDEQ_BIN_0 +221 0x0203 //RX_FDEQ_BIN_1 +222 0x0402 //RX_FDEQ_BIN_2 +223 0x0304 //RX_FDEQ_BIN_3 +224 0x0405 //RX_FDEQ_BIN_4 +225 0x0506 //RX_FDEQ_BIN_5 +226 0x0708 //RX_FDEQ_BIN_6 +227 0x090A //RX_FDEQ_BIN_7 +228 0x0B0C //RX_FDEQ_BIN_8 +229 0x0D0E //RX_FDEQ_BIN_9 +230 0x1214 //RX_FDEQ_BIN_10 +231 0x1E1E //RX_FDEQ_BIN_11 +232 0x1E1E //RX_FDEQ_BIN_12 +233 0x1E1E //RX_FDEQ_BIN_13 +234 0x1E1E //RX_FDEQ_BIN_14 +235 0x202C //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x4000 //RX_FDEQ_RESRV_0 +245 0x0320 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0030 //RX_FDDRC_BAND_MARGIN_1 +248 0x0050 //RX_FDDRC_BAND_MARGIN_2 +249 0x0080 //RX_FDDRC_BAND_MARGIN_3 +250 0x0007 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x5000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x6400 //RX_FDDRC_THRD_3_2 +258 0x6400 //RX_FDDRC_THRD_3_3 +259 0x2000 //RX_FDDRC_SLANT_0_0 +260 0x2000 //RX_FDDRC_SLANT_0_1 +261 0x2000 //RX_FDDRC_SLANT_0_2 +262 0x2000 //RX_FDDRC_SLANT_0_3 +263 0x5333 //RX_FDDRC_SLANT_1_0 +264 0x5333 //RX_FDDRC_SLANT_1_1 +265 0x5333 //RX_FDDRC_SLANT_1_2 +266 0x5333 //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +286 0x0100 //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 +#VOL 5 +163 0x1000 //RX_TDDRC_ALPHA_UP_1 +164 0x1000 //RX_TDDRC_ALPHA_UP_2 +165 0x1000 //RX_TDDRC_ALPHA_UP_3 +166 0x1000 //RX_TDDRC_ALPHA_UP_4 +184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +190 0x7000 //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +269 0x0000 //RX_TDDRC_THRD_0 +270 0x0000 //RX_TDDRC_THRD_1 +271 0x1800 //RX_TDDRC_THRD_2 +272 0x1800 //RX_TDDRC_THRD_3 +273 0x3000 //RX_TDDRC_SLANT_0 +274 0x6E00 //RX_TDDRC_SLANT_1 +275 0x1000 //RX_TDDRC_ALPHA_UP_0 +276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x199A //RX_TDDRC_HMNC_GAIN +279 0x0001 //RX_TDDRC_SMT_FLAG +280 0x0CCD //RX_TDDRC_SMT_W +281 0x01E0 //RX_TDDRC_DRC_GAIN +195 0x0030 //RX_FDEQ_SUBNUM +196 0x4848 //RX_FDEQ_GAIN_0 +197 0x4848 //RX_FDEQ_GAIN_1 +198 0x4844 //RX_FDEQ_GAIN_2 +199 0x4B4D //RX_FDEQ_GAIN_3 +200 0x4E50 //RX_FDEQ_GAIN_4 +201 0x5254 //RX_FDEQ_GAIN_5 +202 0x5658 //RX_FDEQ_GAIN_6 +203 0x5C60 //RX_FDEQ_GAIN_7 +204 0x6468 //RX_FDEQ_GAIN_8 +205 0x6C70 //RX_FDEQ_GAIN_9 +206 0x7474 //RX_FDEQ_GAIN_10 +207 0x7474 //RX_FDEQ_GAIN_11 +208 0x7474 //RX_FDEQ_GAIN_12 +209 0x7474 //RX_FDEQ_GAIN_13 +210 0x7474 //RX_FDEQ_GAIN_14 +211 0x7474 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0202 //RX_FDEQ_BIN_0 +221 0x0203 //RX_FDEQ_BIN_1 +222 0x0402 //RX_FDEQ_BIN_2 +223 0x0304 //RX_FDEQ_BIN_3 +224 0x0405 //RX_FDEQ_BIN_4 +225 0x0506 //RX_FDEQ_BIN_5 +226 0x0708 //RX_FDEQ_BIN_6 +227 0x090A //RX_FDEQ_BIN_7 +228 0x0B0C //RX_FDEQ_BIN_8 +229 0x0D0E //RX_FDEQ_BIN_9 +230 0x1214 //RX_FDEQ_BIN_10 +231 0x1E1E //RX_FDEQ_BIN_11 +232 0x1E1E //RX_FDEQ_BIN_12 +233 0x1E1E //RX_FDEQ_BIN_13 +234 0x1E1E //RX_FDEQ_BIN_14 +235 0x202C //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x4000 //RX_FDEQ_RESRV_0 +245 0x0320 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0030 //RX_FDDRC_BAND_MARGIN_1 +248 0x0050 //RX_FDDRC_BAND_MARGIN_2 +249 0x0080 //RX_FDDRC_BAND_MARGIN_3 +250 0x0007 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x5000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x6400 //RX_FDDRC_THRD_3_2 +258 0x6400 //RX_FDDRC_THRD_3_3 +259 0x2000 //RX_FDDRC_SLANT_0_0 +260 0x2000 //RX_FDDRC_SLANT_0_1 +261 0x2000 //RX_FDDRC_SLANT_0_2 +262 0x2000 //RX_FDDRC_SLANT_0_3 +263 0x5333 //RX_FDDRC_SLANT_1_0 +264 0x5333 //RX_FDDRC_SLANT_1_1 +265 0x5333 //RX_FDDRC_SLANT_1_2 +266 0x5333 //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +286 0x0100 //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 +#VOL 6 +163 0x1000 //RX_TDDRC_ALPHA_UP_1 +164 0x1000 //RX_TDDRC_ALPHA_UP_2 +165 0x1000 //RX_TDDRC_ALPHA_UP_3 +166 0x1000 //RX_TDDRC_ALPHA_UP_4 +184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +190 0x7000 //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +269 0x0000 //RX_TDDRC_THRD_0 +270 0x0000 //RX_TDDRC_THRD_1 +271 0x1800 //RX_TDDRC_THRD_2 +272 0x1800 //RX_TDDRC_THRD_3 +273 0x3000 //RX_TDDRC_SLANT_0 +274 0x6E00 //RX_TDDRC_SLANT_1 +275 0x1000 //RX_TDDRC_ALPHA_UP_0 +276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x199A //RX_TDDRC_HMNC_GAIN +279 0x0001 //RX_TDDRC_SMT_FLAG +280 0x0CCD //RX_TDDRC_SMT_W +281 0x01E0 //RX_TDDRC_DRC_GAIN +195 0x0030 //RX_FDEQ_SUBNUM +196 0x4848 //RX_FDEQ_GAIN_0 +197 0x4848 //RX_FDEQ_GAIN_1 +198 0x4844 //RX_FDEQ_GAIN_2 +199 0x4B4D //RX_FDEQ_GAIN_3 +200 0x4E50 //RX_FDEQ_GAIN_4 +201 0x5254 //RX_FDEQ_GAIN_5 +202 0x5658 //RX_FDEQ_GAIN_6 +203 0x5C60 //RX_FDEQ_GAIN_7 +204 0x6468 //RX_FDEQ_GAIN_8 +205 0x6C70 //RX_FDEQ_GAIN_9 +206 0x7474 //RX_FDEQ_GAIN_10 +207 0x7474 //RX_FDEQ_GAIN_11 +208 0x7474 //RX_FDEQ_GAIN_12 +209 0x7474 //RX_FDEQ_GAIN_13 +210 0x7474 //RX_FDEQ_GAIN_14 +211 0x7474 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0202 //RX_FDEQ_BIN_0 +221 0x0203 //RX_FDEQ_BIN_1 +222 0x0402 //RX_FDEQ_BIN_2 +223 0x0304 //RX_FDEQ_BIN_3 +224 0x0405 //RX_FDEQ_BIN_4 +225 0x0506 //RX_FDEQ_BIN_5 +226 0x0708 //RX_FDEQ_BIN_6 +227 0x090A //RX_FDEQ_BIN_7 +228 0x0B0C //RX_FDEQ_BIN_8 +229 0x0D0E //RX_FDEQ_BIN_9 +230 0x1214 //RX_FDEQ_BIN_10 +231 0x1E1E //RX_FDEQ_BIN_11 +232 0x1E1E //RX_FDEQ_BIN_12 +233 0x1E1E //RX_FDEQ_BIN_13 +234 0x1E1E //RX_FDEQ_BIN_14 +235 0x202C //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x4000 //RX_FDEQ_RESRV_0 +245 0x0320 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0030 //RX_FDDRC_BAND_MARGIN_1 +248 0x0050 //RX_FDDRC_BAND_MARGIN_2 +249 0x0080 //RX_FDDRC_BAND_MARGIN_3 +250 0x0007 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x5000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x6400 //RX_FDDRC_THRD_3_2 +258 0x6400 //RX_FDDRC_THRD_3_3 +259 0x2000 //RX_FDDRC_SLANT_0_0 +260 0x2000 //RX_FDDRC_SLANT_0_1 +261 0x2000 //RX_FDDRC_SLANT_0_2 +262 0x2000 //RX_FDDRC_SLANT_0_3 +263 0x5333 //RX_FDDRC_SLANT_1_0 +264 0x5333 //RX_FDDRC_SLANT_1_1 +265 0x5333 //RX_FDDRC_SLANT_1_2 +266 0x5333 //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +286 0x0100 //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 + +#CASE_NAME HANDSET-HANDSET-TMOBILE_US-NB +#PARAM_MODE Full +#PARAM_TYPE TX+2RX +#TOTAL_CUSTOM_STEP 7+7 +#TX +0 0x0000 //TX_OPERATION_MODE_0 +1 0x0000 //TX_OPERATION_MODE_1 +2 0x0076 //TX_PATCH_REG +3 0x6F7E //TX_SENDFUNC_MODE_0 +4 0x0001 //TX_SENDFUNC_MODE_1 +5 0x0002 //TX_NUM_MIC +6 0x0000 //TX_SAMPLINGFREQ_SIG +7 0x0000 //TX_SAMPLINGFREQ_PROC +8 0x000A //TX_FRAME_SZ_SIG +9 0x000A //TX_FRAME_SZ +10 0x0000 //TX_DELAY_OPT +11 0x0028 //TX_MAX_TAIL_LENGTH +12 0x0001 //TX_NUM_LOUTCHN +13 0x0001 //TX_MAXNUM_AECREF +14 0x0000 //TX_DBG_FUNC_REG +15 0x0000 //TX_DBG_FUNC_REG1 +16 0x0000 //TX_SYS_RESRV_0 +17 0x0000 //TX_SYS_RESRV_1 +18 0x0000 //TX_SYS_RESRV_2 +19 0x0000 //TX_SYS_RESRV_3 +20 0x0000 //TX_DIST2REF0 +21 0x00A3 //TX_DIST2REF1 +22 0x0000 //TX_DIST2REF_02 +23 0x0000 //TX_DIST2REF_03 +24 0x0000 //TX_DIST2REF_04 +25 0x0000 //TX_DIST2REF_05 +26 0x0000 //TX_MMIC +27 0x1000 //TX_PGA_0 +28 0x1000 //TX_PGA_1 +29 0x1000 //TX_PGA_2 +30 0x0000 //TX_PGA_3 +31 0x0000 //TX_PGA_4 +32 0x0000 //TX_PGA_5 +33 0x0000 //TX_MIC_PAIRS +34 0x0000 //TX_MIC_PAIRS_HS +35 0x0002 //TX_MICS_FOR_BF +36 0x0000 //TX_MIC_PAIRS_FORL1 +37 0x0002 //TX_MICS_OF_PAIR0 +38 0x0002 //TX_MICS_OF_PAIR1 +39 0x0002 //TX_MICS_OF_PAIR2 +40 0x0002 //TX_MICS_OF_PAIR3 +41 0x0000 //TX_MIC_DATA_SRC0 +42 0x0002 //TX_MIC_DATA_SRC1 +43 0x0001 //TX_MIC_DATA_SRC2 +44 0x0000 //TX_MIC_DATA_SRC3 +45 0x0000 //TX_MIC_PAIR_CH_04 +46 0x0000 //TX_MIC_PAIR_CH_05 +47 0x0000 //TX_MIC_PAIR_CH_10 +48 0x0000 //TX_MIC_PAIR_CH_11 +49 0x0000 //TX_MIC_PAIR_CH_12 +50 0x0000 //TX_MIC_PAIR_CH_13 +51 0x0000 //TX_MIC_PAIR_CH_14 +52 0x05DC //TX_HD_BIN_MASK +53 0x0010 //TX_HD_SUBAND_MASK +54 0x19A1 //TX_HD_FRAME_AVG_MASK +55 0x0320 //TX_HD_MIN_FRQ +56 0x1000 //TX_HD_ALPHA_PSD +57 0x1100 //TX_T_PHPR1 +58 0x0000 //TX_T_PHPR2 +59 0x0000 //TX_T_PTPR +60 0x0000 //TX_T_PNPR +61 0x0000 //TX_T_PAPR1 +62 0xEE6C //TX_T_PSDVAT +63 0x0800 //TX_CNT +64 0x4000 //TX_ANTI_HOWL_GAIN +65 0x0001 //TX_MICFORBFMARK_0 +66 0x0001 //TX_MICFORBFMARK_1 +67 0x0001 //TX_MICFORBFMARK_2 +68 0x0001 //TX_MICFORBFMARK_3 +69 0x0001 //TX_MICFORBFMARK_4 +70 0x0001 //TX_MICFORBFMARK_5 +71 0x0000 //TX_DIST2REF_10 +72 0x3A66 //TX_DIST2REF_11 +73 0x0000 //TX_DIST2REF2 +74 0x0000 //TX_DIST2REF_13 +75 0x0000 //TX_DIST2REF_14 +76 0x0000 //TX_DIST2REF_15 +77 0x0000 //TX_DIST2REF_20 +78 0x0000 //TX_DIST2REF_21 +79 0x0000 //TX_DIST2REF_22 +80 0x0000 //TX_DIST2REF_23 +81 0x0000 //TX_DIST2REF_24 +82 0x0000 //TX_DIST2REF_25 +83 0x0000 //TX_DIST2REF_30 +84 0x0000 //TX_DIST2REF_31 +85 0x0000 //TX_DIST2REF_32 +86 0x0000 //TX_DIST2REF_33 +87 0x0000 //TX_DIST2REF_34 +88 0x0000 //TX_DIST2REF_35 +89 0x0000 //TX_MIC_LOC_00 +90 0x0000 //TX_MIC_LOC_01 +91 0x0000 //TX_MIC_LOC_02 +92 0x0000 //TX_MIC_LOC_03 +93 0x0000 //TX_MIC_LOC_04 +94 0x0000 //TX_MIC_LOC_05 +95 0x0000 //TX_MIC_LOC_10 +96 0x0000 //TX_MIC_LOC_11 +97 0x0000 //TX_MIC_LOC_12 +98 0x0000 //TX_MIC_LOC_13 +99 0x0000 //TX_MIC_LOC_14 +100 0x0000 //TX_MIC_LOC_15 +101 0x0000 //TX_MIC_LOC_20 +102 0x0000 //TX_MIC_LOC_21 +103 0x0000 //TX_MIC_LOC_22 +104 0x0000 //TX_MIC_LOC_23 +105 0x0000 //TX_MIC_LOC_24 +106 0x0000 //TX_MIC_LOC_25 +107 0x0200 //TX_MIC_REFBLK_VOLUME +108 0x0AAC //TX_MIC_BLOCK_VOLUME +109 0x0000 //TX_INVERSE_MASK +110 0x0000 //TX_ADCS_MASK +111 0x04D0 //TX_ADCS_GAIN +112 0x4000 //TX_NFC_GAINFAC +113 0x0000 //TX_MAINMIC_BLKFACTOR +114 0x0000 //TX_REFMIC_BLKFACTOR +115 0x0000 //TX_BLMIC_BLKFACTOR +116 0x0000 //TX_BRMIC_BLKFACTOR +117 0x0031 //TX_MICBLK_START_BIN +118 0x0060 //TX_MICBLK_END_BIN +119 0x0015 //TX_MICBLK_FE_HOLD +120 0xFFF2 //TX_MICBLK_MR_EXP_TH +121 0xFFF2 //TX_MICBLK_LR_EXP_TH +122 0x0000 //TX_FENE_HOLD +123 0x4000 //TX_FE_ENER_TH_MTS +124 0x0004 //TX_FE_ENER_TH_EXP +125 0x6000 //TX_C_POST_FLT_MIC_MAINBLK +126 0x6000 //TX_C_POST_FLT_MIC_REFBLK +127 0x0010 //TX_MIC_BLOCK_N +128 0x7646 //TX_A_HP +129 0x4000 //TX_B_PE +130 0x1800 //TX_THR_PITCH_DET_0 +131 0x1000 //TX_THR_PITCH_DET_1 +132 0x0800 //TX_THR_PITCH_DET_2 +133 0x0008 //TX_PITCH_BFR_LEN +134 0x0003 //TX_SBD_PITCH_DET +135 0x0050 //TX_TD_AEC_L +136 0x4000 //TX_MU0_UNP_TD_AEC +137 0x1000 //TX_MU0_PTD_TD_AEC +138 0x0000 //TX_PP_RESRV_0 +139 0x2A94 //TX_PP_RESRV_1 +140 0x55F0 //TX_PP_RESRV_2 +141 0x0000 //TX_PP_RESRV_3 +142 0x0000 //TX_PP_RESRV_4 +143 0x0000 //TX_PP_RESRV_5 +144 0x0000 //TX_PP_RESRV_6 +145 0x0000 //TX_PP_RESRV_7 +146 0x0028 //TX_TAIL_LENGTH +147 0x0800 //TX_AEC_REF_GAIN_0 +148 0x0800 //TX_AEC_REF_GAIN_1 +149 0x0800 //TX_AEC_REF_GAIN_2 +150 0x6000 //TX_EAD_THR +151 0x2000 //TX_THR_RE_EST +152 0x0100 //TX_MIN_EQ_RE_EST_0 +153 0x0100 //TX_MIN_EQ_RE_EST_1 +154 0x0100 //TX_MIN_EQ_RE_EST_2 +155 0x0200 //TX_MIN_EQ_RE_EST_3 +156 0x0200 //TX_MIN_EQ_RE_EST_4 +157 0x0200 //TX_MIN_EQ_RE_EST_5 +158 0x0200 //TX_MIN_EQ_RE_EST_6 +159 0x0200 //TX_MIN_EQ_RE_EST_7 +160 0x1000 //TX_MIN_EQ_RE_EST_8 +161 0x1000 //TX_MIN_EQ_RE_EST_9 +162 0x1000 //TX_MIN_EQ_RE_EST_10 +163 0x0400 //TX_MIN_EQ_RE_EST_11 +164 0x1000 //TX_MIN_EQ_RE_EST_12 +165 0x3000 //TX_LAMBDA_RE_EST +166 0x1000 //TX_LAMBDA_CB_NLE +167 0x0400 //TX_C_POST_FLT +168 0x4000 //TX_GAIN_NP +169 0x003C //TX_SE_HOLD_N +170 0x0046 //TX_DT_HOLD_N +171 0x03E8 //TX_DT2_HOLD_N +172 0x6666 //TX_AEC_RESRV_0 +173 0x0000 //TX_AEC_RESRV_1 +174 0x0014 //TX_AEC_RESRV_2 +175 0x0000 //TX_MIC_DELAY_LENGTH +176 0x0000 //TX_REF_DELAY_LENGTH +177 0x0000 //TX_ADD_LINEIN_GAINL +178 0x0000 //TX_ADD_LINEIN_GAINH +179 0x0000 //TX_MIN_EQ_RE_EST_14 +180 0x0000 //TX_DTD_THR1_8 +181 0x7FFF //TX_DTD_THR2_8 +182 0x0000 //TX_DTD_MIC_BLK2 +183 0x0008 //TX_FRQ_LIN_LEN +184 0x7FFF //TX_FRQ_AEC_LEN_RHO +185 0x6000 //TX_MU0_UNP_FRQ_AEC +186 0x4000 //TX_MU0_PTD_FRQ_AEC +187 0x000A //TX_MINENOISETH +188 0x0800 //TX_MU0_RE_EST +189 0x0001 //TX_AEC_NUM_CH +190 0x0000 //TX_BIGECHOATTENUATION_MAX +191 0x2000 //TX_A_POST_FLT_MICBLK +192 0x0000 //TX_BLKENERTH +193 0x0000 //TX_BLKENERHIGHTH +194 0x0000 //TX_NORMENERTH +195 0x0000 //TX_NORMENERHIGHTH +196 0x0000 //TX_NORMENERHIGHTHL +197 0x7B00 //TX_DTD_THR1_0 +198 0x7B00 //TX_DTD_THR1_1 +199 0x7B00 //TX_DTD_THR1_2 +200 0x7B00 //TX_DTD_THR1_3 +201 0x7B00 //TX_DTD_THR1_4 +202 0x7B00 //TX_DTD_THR1_5 +203 0x7B00 //TX_DTD_THR1_6 +204 0x1000 //TX_DTD_THR2_0 +205 0x1000 //TX_DTD_THR2_1 +206 0x1000 //TX_DTD_THR2_2 +207 0x1000 //TX_DTD_THR2_3 +208 0x1000 //TX_DTD_THR2_4 +209 0x1000 //TX_DTD_THR2_5 +210 0x1000 //TX_DTD_THR2_6 +211 0x7FFF //TX_DTD_THR3 +212 0x0000 //TX_SPK_CUT_K +213 0x0FA0 //TX_DT_CUT_K +214 0x0100 //TX_DT_CUT_THR +215 0x04EB //TX_COMFORT_G +216 0x01F4 //TX_POWER_YOUT_TH +217 0x4000 //TX_FDPFGAINECHO +218 0x0000 //TX_DTD_HD_THR +219 0x0000 //TX_SPK_CUT_K_S +220 0x0000 //TX_DTD_MIC_BLK +221 0x0400 //TX_ADPT_STRICT_L +222 0x0200 //TX_ADPT_STRICT_H +223 0x0000 //TX_RATIO_DT_L_TH_LOW +224 0x0000 //TX_RATIO_DT_H_TH_LOW +225 0x0000 //TX_RATIO_DT_L_TH_HIGH +226 0x0000 //TX_RATIO_DT_H_TH_HIGH +227 0x0000 //TX_RATIO_DT_L0_TH +228 0x2000 //TX_B_POST_FILT_ECHO_L +229 0x2000 //TX_B_POST_FILT_ECHO_H +230 0x0200 //TX_MIN_G_CTRL_ECHO +231 0x7FFF //TX_B_LESSCUT_RTO_ECHO +232 0x0000 //TX_EPD_OFFSET_00 +233 0x0000 //TX_EPD_OFFST_01 +234 0x0000 //TX_RATIO_DT_L0_TH_HIGH +235 0x3A98 //TX_RATIO_DT_H_TH_CUT +236 0x7FFF //TX_MIN_EQ_RE_EST_13 +237 0x0000 //TX_DTD_THR1_7 +238 0x0000 //TX_DTD_THR2_7 +239 0x0800 //TX_DT_RESRV_7 +240 0x0800 //TX_DT_RESRV_8 +241 0x0000 //TX_DT_RESRV_9 +242 0xF800 //TX_THR_SN_EST_0 +243 0xF800 //TX_THR_SN_EST_1 +244 0xFA00 //TX_THR_SN_EST_2 +245 0xF900 //TX_THR_SN_EST_3 +246 0xF900 //TX_THR_SN_EST_4 +247 0xFA00 //TX_THR_SN_EST_5 +248 0xF800 //TX_THR_SN_EST_6 +249 0xF700 //TX_THR_SN_EST_7 +250 0x0000 //TX_DELTA_THR_SN_EST_0 +251 0x0100 //TX_DELTA_THR_SN_EST_1 +252 0x0200 //TX_DELTA_THR_SN_EST_2 +253 0x01A0 //TX_DELTA_THR_SN_EST_3 +254 0x0100 //TX_DELTA_THR_SN_EST_4 +255 0x0000 //TX_DELTA_THR_SN_EST_5 +256 0x01A0 //TX_DELTA_THR_SN_EST_6 +257 0x0200 //TX_DELTA_THR_SN_EST_7 +258 0x4000 //TX_LAMBDA_NN_EST_0 +259 0x3000 //TX_LAMBDA_NN_EST_1 +260 0x4000 //TX_LAMBDA_NN_EST_2 +261 0x3000 //TX_LAMBDA_NN_EST_3 +262 0x3000 //TX_LAMBDA_NN_EST_4 +263 0x4000 //TX_LAMBDA_NN_EST_5 +264 0x4000 //TX_LAMBDA_NN_EST_6 +265 0x4000 //TX_LAMBDA_NN_EST_7 +266 0x0400 //TX_N_SN_EST +267 0x001E //TX_INBEAM_T +268 0x0041 //TX_INBEAMHOLDT +269 0x2000 //TX_G_STRICT +270 0x0000 //TX_EQ_THR_BF +271 0x799A //TX_LAMBDA_EQ_BF +272 0x3000 //TX_NE_RTO_TH +273 0x1000 //TX_NE_RTO_TH_L +274 0x3000 //TX_MAINREFRTOH_TH_H +275 0x1000 //TX_MAINREFRTOH_TH_L +276 0x3000 //TX_MAINREFRTO_TH_H +277 0x1000 //TX_MAINREFRTO_TH_L +278 0x0200 //TX_MAINREFRTO_TH_EQ +279 0x4000 //TX_B_POST_FLT_0 +280 0x4000 //TX_B_POST_FLT_1 +281 0x0014 //TX_NS_LVL_CTRL_0 +282 0x0019 //TX_NS_LVL_CTRL_1 +283 0x0017 //TX_NS_LVL_CTRL_2 +284 0x0017 //TX_NS_LVL_CTRL_3 +285 0x0019 //TX_NS_LVL_CTRL_4 +286 0x0014 //TX_NS_LVL_CTRL_5 +287 0x001B //TX_NS_LVL_CTRL_6 +288 0x0010 //TX_NS_LVL_CTRL_7 +289 0x0010 //TX_MIN_GAIN_S_0 +290 0x000C //TX_MIN_GAIN_S_1 +291 0x0010 //TX_MIN_GAIN_S_2 +292 0x0010 //TX_MIN_GAIN_S_3 +293 0x000C //TX_MIN_GAIN_S_4 +294 0x0014 //TX_MIN_GAIN_S_5 +295 0x000C //TX_MIN_GAIN_S_6 +296 0x0014 //TX_MIN_GAIN_S_7 +297 0x5000 //TX_NMOS_SUP +298 0x0000 //TX_NS_MAX_PRI_SNR_TH +299 0x0000 //TX_NMOS_SUP_MENSA +300 0x4000 //TX_SNRI_SUP_0 +301 0x4000 //TX_SNRI_SUP_1 +302 0x4000 //TX_SNRI_SUP_2 +303 0x4000 //TX_SNRI_SUP_3 +304 0x4000 //TX_SNRI_SUP_4 +305 0x7FFF //TX_SNRI_SUP_5 +306 0x4000 //TX_SNRI_SUP_6 +307 0x3000 //TX_SNRI_SUP_7 +308 0x3000 //TX_THR_LFNS +309 0x001A //TX_G_LFNS +310 0x09C4 //TX_GAIN0_NTH +311 0x000A //TX_MUSIC_MORENS +312 0x7FFF //TX_A_POST_FILT_0 +313 0x2000 //TX_A_POST_FILT_1 +314 0x2000 //TX_A_POST_FILT_S_0 +315 0x6000 //TX_A_POST_FILT_S_1 +316 0x5000 //TX_A_POST_FILT_S_2 +317 0x2000 //TX_A_POST_FILT_S_3 +318 0x6000 //TX_A_POST_FILT_S_4 +319 0x2000 //TX_A_POST_FILT_S_5 +320 0x7000 //TX_A_POST_FILT_S_6 +321 0x7000 //TX_A_POST_FILT_S_7 +322 0x4000 //TX_B_POST_FILT_0 +323 0x4000 //TX_B_POST_FILT_1 +324 0x5000 //TX_B_POST_FILT_2 +325 0x4000 //TX_B_POST_FILT_3 +326 0x4000 //TX_B_POST_FILT_4 +327 0x4000 //TX_B_POST_FILT_5 +328 0x4000 //TX_B_POST_FILT_6 +329 0x2000 //TX_B_POST_FILT_7 +330 0x7FFF //TX_B_LESSCUT_RTO_S_0 +331 0x1000 //TX_B_LESSCUT_RTO_S_1 +332 0x1000 //TX_B_LESSCUT_RTO_S_2 +333 0x1000 //TX_B_LESSCUT_RTO_S_3 +334 0x1000 //TX_B_LESSCUT_RTO_S_4 +335 0x1000 //TX_B_LESSCUT_RTO_S_5 +336 0x1000 //TX_B_LESSCUT_RTO_S_6 +337 0x1000 //TX_B_LESSCUT_RTO_S_7 +338 0x7E14 //TX_LAMBDA_PFILT +339 0x7C29 //TX_LAMBDA_PFILT_S_0 +340 0x7200 //TX_LAMBDA_PFILT_S_1 +341 0x7900 //TX_LAMBDA_PFILT_S_2 +342 0x7400 //TX_LAMBDA_PFILT_S_3 +343 0x7200 //TX_LAMBDA_PFILT_S_4 +344 0x7C29 //TX_LAMBDA_PFILT_S_5 +345 0x7C29 //TX_LAMBDA_PFILT_S_6 +346 0x7C29 //TX_LAMBDA_PFILT_S_7 +347 0x0200 //TX_K_PEPPER +348 0x0800 //TX_A_PEPPER +349 0x0C80 //TX_K_PEPPER_HF +350 0x0400 //TX_A_PEPPER_HF +351 0x0001 //TX_HMNC_BST_FLG +352 0x4000 //TX_HMNC_BST_THR +353 0x0800 //TX_DT_BINVAD_TH_0 +354 0x0800 //TX_DT_BINVAD_TH_1 +355 0x0800 //TX_DT_BINVAD_TH_2 +356 0x0800 //TX_DT_BINVAD_TH_3 +357 0x0000 //TX_DT_BINVAD_ENDF +358 0x1000 //TX_C_POST_FLT_DT +359 0x7FFF //TX_NS_B_POST_FLT_LESSCUT +360 0x0100 //TX_DT_BOOST +361 0x0000 //TX_BF_SGRAD_FLG +362 0x0005 //TX_BF_DVG_TH +363 0x001E //TX_SN_C_F +364 0x0000 //TX_K_APT +365 0x0001 //TX_NOISEDET +366 0x0190 //TX_NDETCT +367 0x0004 //TX_NOISE_TH_0 +368 0x1B58 //TX_NOISE_TH_0_2 +369 0x2134 //TX_NOISE_TH_0_3 +370 0x0320 //TX_NOISE_TH_1 +371 0x022C //TX_NOISE_TH_2 +372 0x2710 //TX_NOISE_TH_3 +373 0x6B6C //TX_NOISE_TH_4 +374 0x7FFF //TX_NOISE_TH_5 +375 0x7FFF //TX_NOISE_TH_5_2 +376 0x0000 //TX_NOISE_TH_5_3 +377 0x0000 //TX_NOISE_TH_5_4 +378 0x07D0 //TX_NOISE_TH_6 +379 0x0004 //TX_MINENOISE_TH +380 0xD508 //TX_MORENS_TFMASK_TH +381 0x0001 //TX_DRC_QUIET_FLOOR +382 0x6D60 //TX_RATIODTL_CUT_TH +383 0x0DAC //TX_DT_CUT_K1 +384 0x00A5 //TX_OUT_ENER_S_TH_CLEAN +385 0x00A5 //TX_OUT_ENER_S_TH_LESSCLEAN +386 0x00A5 //TX_OUT_ENER_S_TH_NOISY +387 0x0029 //TX_OUT_ENER_TH_NOISE +388 0x00CE //TX_OUT_ENER_TH_SPEECH +389 0x2000 //TX_SN_NPB_GAIN +390 0x0000 //TX_NN_NPB_GAIN +391 0x3000 //TX_POST_MASK_SUP_HSNE +392 0x07D0 //TX_TAIL_DET_TH +393 0x4000 //TX_B_LESSCUT_RTO_WTA +394 0x0000 //TX_MEL_G_R +395 0x0080 //TX_SUPHIGH_TH +396 0x0000 //TX_MASK_G_R +397 0x0002 //TX_EXTRA_NS_L +398 0x1800 //TX_C_POST_FLT_MASK +399 0x7FFF //TX_A_POST_FLT_WNS +400 0x0148 //TX_MIN_G_LOW300HZ +401 0x0001 //TX_MAXLEVEL_CNG +402 0x00B4 //TX_STN_NOISE_TH +403 0x4000 //TX_POST_MASK_SUP +404 0x7FFF //TX_POST_MASK_ADJUST +405 0x000A //TX_NS_ENOISE_MIC0_TH +406 0x0004 //TX_MINENOISE_MIC0_TH +407 0x0014 //TX_MINENOISE_MIC0_S_TH +408 0x4900 //TX_MIN_G_CTRL_SSNS +409 0x0400 //TX_METAL_RTO_THR +410 0x0FA0 //TX_NS_FP_K_METAL +411 0x3A98 //TX_NOISEDET_BOOST_TH +412 0x0FA0 //TX_NSMOOTH_TH +413 0x0000 //TX_NS_RESRV_8 +414 0x1800 //TX_RHO_UPB +415 0x2328 //TX_N_HOLD_HS +416 0x006E //TX_N_RHO_BFR0 +417 0x7FFF //TX_LAMBDA_ARSP_EST +418 0x0100 //TX_EXTRA_GAIN_MICBLOCK +419 0x0333 //TX_THR_STD_NSR +420 0x019A //TX_THR_STD_PLH +421 0x03E8 //TX_N_HOLD_STD +422 0x0066 //TX_THR_STD_RHO +423 0x4000 //TX_BF_RESET_THR_HS +424 0x0CCD //TX_SB_RTO_MEAN_TH +425 0x0280 //TX_SB_RHO_MEAN_TH_NTALK +426 0x3800 //TX_SB_RTO_MEAN_TH_ABN +427 0x2EE0 //TX_SB_RTO_MEAN_TH_RUB +428 0x0990 //TX_WTA_EN_RTO_TH +429 0x1400 //TX_TOP_ENER_TH_F +430 0x0100 //TX_DESIRED_TALK_HOLDT +431 0x0800 //TX_MIC_BLOCK_FACTOR +432 0x0000 //TX_NSEST_BFRLRNRDC +433 0x0000 //TX_THR_POST_FLT_HS +434 0x0010 //TX_HS_VAD_BIN +435 0x2666 //TX_THR_VAD_HS +436 0x2CCD //TX_MEAN_RTO_MIN_TH2 +437 0x0032 //TX_SILENCE_T +438 0x0000 //TX_A_POST_FLT_WTA +439 0x799A //TX_LAMBDA_PFLT_WTA +440 0x0000 //TX_SB_RHO_MEAN2_TH +441 0x0640 //TX_SB_RHO_MEAN3_TH +442 0x0000 //TX_HS_RESRV_4 +443 0x0000 //TX_HS_RESRV_5 +444 0x003C //TX_DOA_VAD_THR_1 +445 0x003C //TX_DOA_VAD_THR_2 +446 0x0028 //TX_DOA_VAD_THR1_0 +447 0x0028 //TX_DOA_VAD_THR1_1 +448 0x0000 //TX_SRC_DOA_RNG_LOW_0A +449 0x00B4 //TX_SRC_DOA_RNG_HIGH_0A +450 0x005A //TX_DFLT_SRC_DOA_0A +451 0x0000 //TX_SRC_DOA_RNG_LOW_0B +452 0x0000 //TX_SRC_DOA_RNG_HIGH_0B +453 0x0000 //TX_DFLT_SRC_DOA_0B +454 0x0000 //TX_SRC_DOA_RNG_LOW_0C +455 0x0000 //TX_SRC_DOA_RNG_HIGH_0C +456 0x0000 //TX_DFLT_SRC_DOA_0C +457 0x0000 //TX_SRC_DOA_RNG_LOW_0D +458 0x0000 //TX_SRC_DOA_RNG_HIGH_0D +459 0x0000 //TX_DFLT_SRC_DOA_0D +460 0x0000 //TX_SRC_DOA_RNG_LOW_1A +461 0x00B4 //TX_SRC_DOA_RNG_HIGH_1A +462 0x005A //TX_DFLT_SRC_DOA_1A +463 0x0000 //TX_SRC_DOA_RNG_LOW_1B +464 0x00B4 //TX_SRC_DOA_RNG_HIGH_1B +465 0x005A //TX_DFLT_SRC_DOA_1B +466 0x0000 //TX_SRC_DOA_RNG_LOW_1C +467 0x00B4 //TX_SRC_DOA_RNG_HIGH_1C +468 0x005A //TX_DFLT_SRC_DOA_1C +469 0x0000 //TX_SRC_DOA_RNG_LOW_1D +470 0x00B4 //TX_SRC_DOA_RNG_HIGH_1D +471 0x005A //TX_DFLT_SRC_DOA_1D +472 0x0100 //TX_BF_HOLDOFF_T +473 0x7FFF //TX_DOA_COST_FACTOR +474 0x0D9A //TX_MAINTOREFR_TH0 +475 0x071C //TX_DOA_TRK_THR +476 0x012C //TX_DOA_TRACK_HT +477 0x0200 //TX_N1_HOLD_HF +478 0x0100 //TX_N2_HOLD_HF +479 0x2A3D //TX_BF_RESET_THR_HF +480 0x7333 //TX_DOA_SMOOTH +481 0x0800 //TX_MU_BF +482 0x0800 //TX_BF_MU_LF_B2 +483 0x0040 //TX_BF_FC_END_BIN_B2 +484 0x0020 //TX_BF_FC_END_BIN +485 0x0000 //TX_HF_RESRV_25 +486 0x0000 //TX_HF_RESRV_26 +487 0x0007 //TX_N_DOA_SEED +488 0x0001 //TX_FINE_DOA_SEARCH_FLG +489 0x0000 //TX_HF_RESRV_27 +490 0x038E //TX_DLT_SRC_DOA_RNG +491 0x0200 //TX_BF_MU_LF +492 0x0000 //TX_DFLT_SRC_LOC_0 +493 0x7FFF //TX_DFLT_SRC_LOC_1 +494 0x0000 //TX_DFLT_SRC_LOC_2 +495 0x038E //TX_DOA_TRACK_VADTH +496 0x0000 //TX_DOA_TRACK_NEW +497 0x01E0 //TX_NOR_OFF_THR +498 0x7C00 //TX_MORE_ON_700HZ_THR +499 0x2000 //TX_MU_BF_ADPT_NS +500 0x0000 //TX_ADAPT_LEN +501 0x6666 //TX_MORE_SNS +502 0x0000 //TX_NOR_OFF_TH1 +503 0x0000 //TX_WIDE_MASK_TH +504 0xD333 //TX_SUBSNRATIOHIGH4MEANBCK_THR +505 0x6000 //TX_C_POST_FLT_CUT +506 0x2000 //TX_RADIODTLV +507 0x0320 //TX_POWER_LINEIN_TH +508 0x0014 //TX_FE_VADCOUNT_TH_FC +509 0x0000 //TX_ECHO_SUPP_FC +510 0x0C80 //TX_ECHO_TH +511 0x6666 //TX_MIC_TO_BFGAIN +512 0x0000 //TX_MICTOBFGAIN0 +513 0x0000 //TX_FASTMUE_TH +514 0x3000 //TX_DEREVERB_LF_MU +515 0x34CD //TX_DEREVERB_HF_MU +516 0x0007 //TX_DEREVERB_DELAY +517 0x0004 //TX_DEREVERB_COEF_LEN +518 0x0003 //TX_DEREVERB_DNR +519 0x0000 //TX_DEREVERB_ALPHA +520 0x0000 //TX_DEREVERB_BETA +521 0x3A98 //TX_GSC_RTOL_TH +522 0x3A98 //TX_GSC_RTOH_TH +523 0x7E2C //TX_WIDE2_MEANHTH +524 0x0000 //TX_DR_RESRV_5 +525 0x0000 //TX_DR_RESRV_6 +526 0x0000 //TX_DR_RESRV_7 +527 0x0000 //TX_DR_RESRV_8 +528 0x1333 //TX_WIND_MARK_TH +529 0x399A //TX_CORR_THR +530 0x0004 //TX_SNR_THR +531 0x0010 //TX_ENGY_THR +532 0x1770 //TX_CORR_HIGH_TH +533 0x6000 //TX_ENGY_THR_2 +534 0x3400 //TX_MEAN_RTO_THR +535 0x0028 //TX_WNS_ENOISE_MIC0_TH +536 0x3000 //TX_RATIOMICL_TH +537 0x7FFF //TX_CALIG_HS +538 0x0000 //TX_LVL_CTRL +539 0x0014 //TX_WIND_SUPRTO +540 0x001A //TX_WNS_MIN_G +541 0x0600 //TX_WNS_B_POST_FLT +542 0x2800 //TX_RATIOMICH_TH +543 0xD120 //TX_WIND_INBEAM_L_TH +544 0x0FA0 //TX_WIND_INBEAM_H_TH +545 0x2000 //TX_WNS_RESRV_0 +546 0x59D8 //TX_WNS_RESRV_1 +547 0x0080 //TX_WNS_RESRV_2 +548 0x0000 //TX_WNS_RESRV_3 +549 0x0000 //TX_WNS_RESRV_4 +550 0x0000 //TX_WNS_RESRV_5 +551 0x0000 //TX_WNS_RESRV_6 +552 0x0000 //TX_PB_B_POST_FLT_LESSCUT +553 0x0070 //TX_BF_LESSCUT_BBIN +554 0x0070 //TX_BF_LESSCUT_EBIN +555 0x0010 //TX_POSTBFB0 +556 0x0070 //TX_POSTBFB +557 0x00B0 //TX_POSTBFE +558 0x0E66 //TX_SPEECH_SNR_TH +559 0x0050 //TX_PB_MAX_PRI_SNR_TH +560 0x770A //TX_MAX_PRI_SNR_TH_L +561 0x0000 //TX_PFGAIN +562 0x0000 //TX_MAINTOREFR_TH +563 0x0000 //TX_SAM_MARK +564 0x0000 //TX_PB_RESRV_0 +565 0x0000 //TX_PB_RESRV_1 +566 0x0018 //TX_FDEQ_SUBNUM +567 0x6C60 //TX_FDEQ_GAIN_0 +568 0x584F //TX_FDEQ_GAIN_1 +569 0x4F4E //TX_FDEQ_GAIN_2 +570 0x474A //TX_FDEQ_GAIN_3 +571 0x473F //TX_FDEQ_GAIN_4 +572 0x4240 //TX_FDEQ_GAIN_5 +573 0x4040 //TX_FDEQ_GAIN_6 +574 0x3630 //TX_FDEQ_GAIN_7 +575 0x2726 //TX_FDEQ_GAIN_8 +576 0x383C //TX_FDEQ_GAIN_9 +577 0x4848 //TX_FDEQ_GAIN_10 +578 0x4848 //TX_FDEQ_GAIN_11 +579 0x4848 //TX_FDEQ_GAIN_12 +580 0x4848 //TX_FDEQ_GAIN_13 +581 0x4848 //TX_FDEQ_GAIN_14 +582 0x4848 //TX_FDEQ_GAIN_15 +583 0x4848 //TX_FDEQ_GAIN_16 +584 0x4848 //TX_FDEQ_GAIN_17 +585 0x4848 //TX_FDEQ_GAIN_18 +586 0x4848 //TX_FDEQ_GAIN_19 +587 0x4848 //TX_FDEQ_GAIN_20 +588 0x4848 //TX_FDEQ_GAIN_21 +589 0x4848 //TX_FDEQ_GAIN_22 +590 0x4848 //TX_FDEQ_GAIN_23 +591 0x0202 //TX_FDEQ_BIN_0 +592 0x0104 //TX_FDEQ_BIN_1 +593 0x0502 //TX_FDEQ_BIN_2 +594 0x0202 //TX_FDEQ_BIN_3 +595 0x0504 //TX_FDEQ_BIN_4 +596 0x0708 //TX_FDEQ_BIN_5 +597 0x0808 //TX_FDEQ_BIN_6 +598 0x050E //TX_FDEQ_BIN_7 +599 0x0B0C //TX_FDEQ_BIN_8 +600 0x0F09 //TX_FDEQ_BIN_9 +601 0x0000 //TX_FDEQ_BIN_10 +602 0x0000 //TX_FDEQ_BIN_11 +603 0x0000 //TX_FDEQ_BIN_12 +604 0x0000 //TX_FDEQ_BIN_13 +605 0x0000 //TX_FDEQ_BIN_14 +606 0x0000 //TX_FDEQ_BIN_15 +607 0x0000 //TX_FDEQ_BIN_16 +608 0x0000 //TX_FDEQ_BIN_17 +609 0x0000 //TX_FDEQ_BIN_18 +610 0x0000 //TX_FDEQ_BIN_19 +611 0x0000 //TX_FDEQ_BIN_20 +612 0x0000 //TX_FDEQ_BIN_21 +613 0x0000 //TX_FDEQ_BIN_22 +614 0x0000 //TX_FDEQ_BIN_23 +615 0x0000 //TX_FDEQ_PADDING +616 0x0030 //TX_PREEQ_SUBNUM_MIC0 +617 0x4848 //TX_PREEQ_GAIN_MIC0_0 +618 0x4848 //TX_PREEQ_GAIN_MIC0_1 +619 0x4848 //TX_PREEQ_GAIN_MIC0_2 +620 0x4848 //TX_PREEQ_GAIN_MIC0_3 +621 0x4848 //TX_PREEQ_GAIN_MIC0_4 +622 0x4848 //TX_PREEQ_GAIN_MIC0_5 +623 0x4848 //TX_PREEQ_GAIN_MIC0_6 +624 0x4848 //TX_PREEQ_GAIN_MIC0_7 +625 0x4848 //TX_PREEQ_GAIN_MIC0_8 +626 0x4848 //TX_PREEQ_GAIN_MIC0_9 +627 0x4848 //TX_PREEQ_GAIN_MIC0_10 +628 0x4848 //TX_PREEQ_GAIN_MIC0_11 +629 0x4848 //TX_PREEQ_GAIN_MIC0_12 +630 0x4848 //TX_PREEQ_GAIN_MIC0_13 +631 0x4848 //TX_PREEQ_GAIN_MIC0_14 +632 0x4848 //TX_PREEQ_GAIN_MIC0_15 +633 0x4848 //TX_PREEQ_GAIN_MIC0_16 +634 0x4848 //TX_PREEQ_GAIN_MIC0_17 +635 0x4848 //TX_PREEQ_GAIN_MIC0_18 +636 0x4848 //TX_PREEQ_GAIN_MIC0_19 +637 0x4848 //TX_PREEQ_GAIN_MIC0_20 +638 0x4848 //TX_PREEQ_GAIN_MIC0_21 +639 0x4848 //TX_PREEQ_GAIN_MIC0_22 +640 0x4848 //TX_PREEQ_GAIN_MIC0_23 +641 0x251A //TX_PREEQ_BIN_MIC0_0 +642 0x0F0F //TX_PREEQ_BIN_MIC0_1 +643 0x0C08 //TX_PREEQ_BIN_MIC0_2 +644 0x0700 //TX_PREEQ_BIN_MIC0_3 +645 0x0000 //TX_PREEQ_BIN_MIC0_4 +646 0x0000 //TX_PREEQ_BIN_MIC0_5 +647 0x0000 //TX_PREEQ_BIN_MIC0_6 +648 0x0000 //TX_PREEQ_BIN_MIC0_7 +649 0x0000 //TX_PREEQ_BIN_MIC0_8 +650 0x0000 //TX_PREEQ_BIN_MIC0_9 +651 0x0000 //TX_PREEQ_BIN_MIC0_10 +652 0x0000 //TX_PREEQ_BIN_MIC0_11 +653 0x0000 //TX_PREEQ_BIN_MIC0_12 +654 0x0000 //TX_PREEQ_BIN_MIC0_13 +655 0x0000 //TX_PREEQ_BIN_MIC0_14 +656 0x0000 //TX_PREEQ_BIN_MIC0_15 +657 0x0000 //TX_PREEQ_BIN_MIC0_16 +658 0x0000 //TX_PREEQ_BIN_MIC0_17 +659 0x0000 //TX_PREEQ_BIN_MIC0_18 +660 0x0000 //TX_PREEQ_BIN_MIC0_19 +661 0x0000 //TX_PREEQ_BIN_MIC0_20 +662 0x0000 //TX_PREEQ_BIN_MIC0_21 +663 0x0000 //TX_PREEQ_BIN_MIC0_22 +664 0x0000 //TX_PREEQ_BIN_MIC0_23 +665 0x0030 //TX_PREEQ_SUBNUM_MIC1 +666 0x4848 //TX_PREEQ_GAIN_MIC1_0 +667 0x4848 //TX_PREEQ_GAIN_MIC1_1 +668 0x4848 //TX_PREEQ_GAIN_MIC1_2 +669 0x4848 //TX_PREEQ_GAIN_MIC1_3 +670 0x4848 //TX_PREEQ_GAIN_MIC1_4 +671 0x4848 //TX_PREEQ_GAIN_MIC1_5 +672 0x494A //TX_PREEQ_GAIN_MIC1_6 +673 0x4B4C //TX_PREEQ_GAIN_MIC1_7 +674 0x4D4E //TX_PREEQ_GAIN_MIC1_8 +675 0x4F51 //TX_PREEQ_GAIN_MIC1_9 +676 0x4848 //TX_PREEQ_GAIN_MIC1_10 +677 0x4848 //TX_PREEQ_GAIN_MIC1_11 +678 0x4848 //TX_PREEQ_GAIN_MIC1_12 +679 0x4848 //TX_PREEQ_GAIN_MIC1_13 +680 0x4848 //TX_PREEQ_GAIN_MIC1_14 +681 0x4848 //TX_PREEQ_GAIN_MIC1_15 +682 0x4848 //TX_PREEQ_GAIN_MIC1_16 +683 0x4848 //TX_PREEQ_GAIN_MIC1_17 +684 0x4848 //TX_PREEQ_GAIN_MIC1_18 +685 0x4848 //TX_PREEQ_GAIN_MIC1_19 +686 0x4848 //TX_PREEQ_GAIN_MIC1_20 +687 0x4848 //TX_PREEQ_GAIN_MIC1_21 +688 0x4848 //TX_PREEQ_GAIN_MIC1_22 +689 0x4848 //TX_PREEQ_GAIN_MIC1_23 +690 0x0202 //TX_PREEQ_BIN_MIC1_0 +691 0x0203 //TX_PREEQ_BIN_MIC1_1 +692 0x0303 //TX_PREEQ_BIN_MIC1_2 +693 0x0304 //TX_PREEQ_BIN_MIC1_3 +694 0x0405 //TX_PREEQ_BIN_MIC1_4 +695 0x0506 //TX_PREEQ_BIN_MIC1_5 +696 0x0708 //TX_PREEQ_BIN_MIC1_6 +697 0x090A //TX_PREEQ_BIN_MIC1_7 +698 0x0B0C //TX_PREEQ_BIN_MIC1_8 +699 0x0D0E //TX_PREEQ_BIN_MIC1_9 +700 0x0000 //TX_PREEQ_BIN_MIC1_10 +701 0x0000 //TX_PREEQ_BIN_MIC1_11 +702 0x0000 //TX_PREEQ_BIN_MIC1_12 +703 0x0000 //TX_PREEQ_BIN_MIC1_13 +704 0x0000 //TX_PREEQ_BIN_MIC1_14 +705 0x0000 //TX_PREEQ_BIN_MIC1_15 +706 0x0000 //TX_PREEQ_BIN_MIC1_16 +707 0x0000 //TX_PREEQ_BIN_MIC1_17 +708 0x0000 //TX_PREEQ_BIN_MIC1_18 +709 0x0000 //TX_PREEQ_BIN_MIC1_19 +710 0x0000 //TX_PREEQ_BIN_MIC1_20 +711 0x0000 //TX_PREEQ_BIN_MIC1_21 +712 0x0000 //TX_PREEQ_BIN_MIC1_22 +713 0x0000 //TX_PREEQ_BIN_MIC1_23 +714 0x0030 //TX_PREEQ_SUBNUM_MIC2 +715 0x4848 //TX_PREEQ_GAIN_MIC2_0 +716 0x4848 //TX_PREEQ_GAIN_MIC2_1 +717 0x4848 //TX_PREEQ_GAIN_MIC2_2 +718 0x4848 //TX_PREEQ_GAIN_MIC2_3 +719 0x4848 //TX_PREEQ_GAIN_MIC2_4 +720 0x4848 //TX_PREEQ_GAIN_MIC2_5 +721 0x4848 //TX_PREEQ_GAIN_MIC2_6 +722 0x4848 //TX_PREEQ_GAIN_MIC2_7 +723 0x4848 //TX_PREEQ_GAIN_MIC2_8 +724 0x4848 //TX_PREEQ_GAIN_MIC2_9 +725 0x4848 //TX_PREEQ_GAIN_MIC2_10 +726 0x4848 //TX_PREEQ_GAIN_MIC2_11 +727 0x4848 //TX_PREEQ_GAIN_MIC2_12 +728 0x4848 //TX_PREEQ_GAIN_MIC2_13 +729 0x4848 //TX_PREEQ_GAIN_MIC2_14 +730 0x4848 //TX_PREEQ_GAIN_MIC2_15 +731 0x4848 //TX_PREEQ_GAIN_MIC2_16 +732 0x4848 //TX_PREEQ_GAIN_MIC2_17 +733 0x4848 //TX_PREEQ_GAIN_MIC2_18 +734 0x4848 //TX_PREEQ_GAIN_MIC2_19 +735 0x4848 //TX_PREEQ_GAIN_MIC2_20 +736 0x4848 //TX_PREEQ_GAIN_MIC2_21 +737 0x4848 //TX_PREEQ_GAIN_MIC2_22 +738 0x4848 //TX_PREEQ_GAIN_MIC2_23 +739 0x0608 //TX_PREEQ_BIN_MIC2_0 +740 0x0808 //TX_PREEQ_BIN_MIC2_1 +741 0x0808 //TX_PREEQ_BIN_MIC2_2 +742 0x0808 //TX_PREEQ_BIN_MIC2_3 +743 0x0808 //TX_PREEQ_BIN_MIC2_4 +744 0x0808 //TX_PREEQ_BIN_MIC2_5 +745 0x0808 //TX_PREEQ_BIN_MIC2_6 +746 0x0808 //TX_PREEQ_BIN_MIC2_7 +747 0x0808 //TX_PREEQ_BIN_MIC2_8 +748 0x0808 //TX_PREEQ_BIN_MIC2_9 +749 0x0808 //TX_PREEQ_BIN_MIC2_10 +750 0x0808 //TX_PREEQ_BIN_MIC2_11 +751 0x0808 //TX_PREEQ_BIN_MIC2_12 +752 0x0808 //TX_PREEQ_BIN_MIC2_13 +753 0x0808 //TX_PREEQ_BIN_MIC2_14 +754 0x0200 //TX_PREEQ_BIN_MIC2_15 +755 0x0000 //TX_PREEQ_BIN_MIC2_16 +756 0x0000 //TX_PREEQ_BIN_MIC2_17 +757 0x0000 //TX_PREEQ_BIN_MIC2_18 +758 0x0000 //TX_PREEQ_BIN_MIC2_19 +759 0x0000 //TX_PREEQ_BIN_MIC2_20 +760 0x0000 //TX_PREEQ_BIN_MIC2_21 +761 0x0000 //TX_PREEQ_BIN_MIC2_22 +762 0x0000 //TX_PREEQ_BIN_MIC2_23 +763 0x0006 //TX_MASKING_ABILITY +764 0x0800 //TX_NND_WEIGHT +765 0x0065 //TX_MIC_CALIBRATION_0 +766 0x0065 //TX_MIC_CALIBRATION_1 +767 0x0065 //TX_MIC_CALIBRATION_2 +768 0x0065 //TX_MIC_CALIBRATION_3 +769 0x0044 //TX_MIC_PWR_BIAS_0 +770 0x0044 //TX_MIC_PWR_BIAS_1 +771 0x0044 //TX_MIC_PWR_BIAS_2 +772 0x0044 //TX_MIC_PWR_BIAS_3 +773 0x0000 //TX_GAIN_LIMIT_0 +774 0x0000 //TX_GAIN_LIMIT_1 +775 0x0007 //TX_GAIN_LIMIT_2 +776 0x0007 //TX_GAIN_LIMIT_3 +777 0x7F5B //TX_BVE_NOVAD0_ALPHADOWN +778 0x7FDE //TX_BVE_VAD0_ALPHAUP +779 0x7F3A //TX_BVE_VAD0_ALPHADOWN +780 0x2000 //TX_BVE_GAINWEIGHT_NOFEVADLI +781 0x7F5B //TX_BVE_FEVADLI_ALPHA +782 0x7F19 //TX_BVE_NOVAD0_ALPHAUP +783 0x1000 //TX_TDDRC_ALPHA_UP_01 +784 0x1000 //TX_TDDRC_ALPHA_UP_02 +785 0x1000 //TX_TDDRC_ALPHA_UP_03 +786 0x1000 //TX_TDDRC_ALPHA_UP_04 +787 0x7EB8 //TX_TDDRC_ALPHA_DWN_01 +788 0x7EB8 //TX_TDDRC_ALPHA_DWN_02 +789 0x7EB8 //TX_TDDRC_ALPHA_DWN_03 +790 0x7EB8 //TX_TDDRC_ALPHA_DWN_04 +791 0x7FFF //TX_TDDRC_TD_DRC_LIMIT +792 0x0800 //TX_TDDRC_POST_LIMIT_GAIN +793 0x0000 //TX_TDDRC_RESRV_0 +794 0x0000 //TX_TDDRC_RESRV_1 +795 0x0018 //TX_FDDRC_BAND_MARGIN_0 +796 0x0030 //TX_FDDRC_BAND_MARGIN_1 +797 0x0050 //TX_FDDRC_BAND_MARGIN_2 +798 0x0080 //TX_FDDRC_BAND_MARGIN_3 +799 0x0007 //TX_FDDRC_BLOCK_EXP +800 0x5000 //TX_FDDRC_THRD_2_0 +801 0x5000 //TX_FDDRC_THRD_2_1 +802 0x5000 //TX_FDDRC_THRD_2_2 +803 0x5000 //TX_FDDRC_THRD_2_3 +804 0x6400 //TX_FDDRC_THRD_3_0 +805 0x6400 //TX_FDDRC_THRD_3_1 +806 0x6400 //TX_FDDRC_THRD_3_2 +807 0x6400 //TX_FDDRC_THRD_3_3 +808 0x2000 //TX_FDDRC_SLANT_0_0 +809 0x2000 //TX_FDDRC_SLANT_0_1 +810 0x2000 //TX_FDDRC_SLANT_0_2 +811 0x2000 //TX_FDDRC_SLANT_0_3 +812 0x5333 //TX_FDDRC_SLANT_1_0 +813 0x5333 //TX_FDDRC_SLANT_1_1 +814 0x5333 //TX_FDDRC_SLANT_1_2 +815 0x5333 //TX_FDDRC_SLANT_1_3 +816 0x0010 //TX_DEADMIC_SILENCE_TH +817 0x0600 //TX_MIC_DEGRADE_TH +818 0x0078 //TX_DEADMIC_CNT +819 0x0078 //TX_MIC_DEGRADE_CNT +820 0x0000 //TX_FDDRC_RESRV_4 +821 0x0000 //TX_FDDRC_RESRV_5 +822 0x0000 //TX_FDDRC_RESRV_6 +823 0x7FFF //TX_KS_NOISEPASTE_FACTOR +824 0x0001 //TX_KS_CONFIG +825 0x7FFF //TX_KS_GAIN_MIN +826 0x0000 //TX_KS_RESRV_0 +827 0x0000 //TX_KS_RESRV_1 +828 0x0000 //TX_KS_RESRV_2 +829 0x7C00 //TX_LAMBDA_PKA_FP +830 0x2000 //TX_TPKA_FP +831 0x0080 //TX_MIN_G_FP +832 0x2000 //TX_MAX_G_FP +833 0x0FA0 //TX_FFP_FP_K_METAL +834 0x4000 //TX_A_POST_FLT_FP +835 0x0F5C //TX_RTO_OUTBEAM_TH +836 0x4CCD //TX_TPKA_FP_THD +837 0x0000 //TX_MAX_G_FP_BLK +838 0x0000 //TX_FFP_FADEIN +839 0x0000 //TX_FFP_FADEOUT +840 0x0000 //TX_WHISPERCTH +841 0x0000 //TX_WHISPERHOLDT +842 0x0000 //TX_WHISP_ENTHH +843 0x0000 //TX_WHISP_ENTHL +844 0x0000 //TX_WHISP_RTOTH +845 0x0000 //TX_WHISP_RTOTH2 +846 0x0096 //TX_MUTE_PERIOD +847 0x0000 //TX_FADE_IN_PERIOD +848 0x0100 //TX_FFP_RESRV_2 +849 0x0020 //TX_FFP_RESRV_3 +850 0x0000 //TX_FFP_RESRV_4 +851 0x0000 //TX_FFP_RESRV_5 +852 0x0000 //TX_FFP_RESRV_6 +853 0x0002 //TX_FILTINDX +854 0x0000 //TX_TDDRC_THRD_0 +855 0x0010 //TX_TDDRC_THRD_1 +856 0x1500 //TX_TDDRC_THRD_2 +857 0x1500 //TX_TDDRC_THRD_3 +858 0x3000 //TX_TDDRC_SLANT_0 +859 0x6E00 //TX_TDDRC_SLANT_1 +860 0x1000 //TX_TDDRC_ALPHA_UP_00 +861 0x7EB8 //TX_TDDRC_ALPHA_DWN_00 +862 0x0000 //TX_TDDRC_HMNC_FLAG +863 0x199A //TX_TDDRC_HMNC_GAIN +864 0x0000 //TX_TDDRC_SMT_FLAG +865 0x0CCD //TX_TDDRC_SMT_W +866 0x05A0 //TX_TDDRC_DRC_GAIN +867 0x7FFF //TX_TDDRC_LMT_THRD +868 0x0000 //TX_TDDRC_LMT_ALPHA +869 0x0000 //TX_TFMASKLTH +870 0x0000 //TX_TFMASKLTHL +871 0x0CCD //TX_TFMASKHTH +872 0x0CCD //TX_TFMASKLTH_BINVAD +873 0xF333 //TX_TFMASKLTH_NS_EST +874 0xF800 //TX_TFMASKLTH_DOA +875 0x0CCD //TX_TFMASKTH_BLESSCUT +876 0x1000 //TX_B_LESSCUT_RTO_MASK +877 0x3800 //TX_SB_RHO_MEAN_TH_ABN +878 0x2000 //TX_B_POST_FLT_MASK +879 0x0000 //TX_B_POST_FLT_MASK1 +880 0x6333 //TX_GAIN_WIND_MASK +881 0x7FFF //TX_TFMASK_BFSTRICT_MUSIC +882 0x0000 //TX_TFMASK_BFSTRICT_NOMUSIC +883 0x7333 //TX_FASTNS_OUTIN_TH +884 0x0CCD //TX_FASTNS_TFMASK_TH +885 0x0CCD //TX_FASTNS_TFMASKBIN_TH1 +886 0x0CCD //TX_FASTNS_TFMASKBIN_TH2 +887 0x0CCD //TX_FASTNS_TFMASKBIN_TH3 +888 0x0028 //TX_FASTNS_ARSPC_TH +889 0xC000 //TX_FASTNS_MASK5_TH +890 0x0810 //TX_POSTSSA_MIN_G_VR_MASK +891 0x1000 //TX_A_LESSCUT_RTO_MASK +892 0x1770 //TX_FASTNS_NOISETH +893 0xC000 //TX_FASTNS_SSA_THLFL +894 0xC000 //TX_FASTNS_SSA_THHFL +895 0xCCCC //TX_FASTNS_SSA_THLFH +896 0xD999 //TX_FASTNS_SSA_THHFH +897 0x2339 //TX_SENDFUNC_REG_MICMUTE +898 0x0021 //TX_SENDFUNC_REG_MICMUTE1 +899 0x02BC //TX_MICMUTE_RATIO_THR +900 0x0140 //TX_MICMUTE_AMP_THR +901 0x0004 //TX_MICMUTE_HPF_IND +902 0x00C0 //TX_MICMUTE_LOG_EYR_TH +903 0x0008 //TX_MICMUTE_CVG_TIME +904 0x0008 //TX_MICMUTE_RELEASE_TIME +905 0x01FE //TX_MIC_VOLUME_MIC0MUTE +906 0x0020 //TX_MICMUTE_EPD_OFFSET_0 +907 0x001E //TX_MICMUTE_FRQ_AEC_L +908 0x7999 //TX_MICMUTE_EAD_THR +909 0x7FFF //TX_MICMUTE_LAMBDA_CB_NLE +910 0x7FFF //TX_MICMUTE_LAMBDA_RE_EST +911 0x4000 //TX_DTD_THR1_MICMUTE_0 +912 0x7000 //TX_DTD_THR1_MICMUTE_1 +913 0x7FFF //TX_DTD_THR1_MICMUTE_2 +914 0x7FFF //TX_DTD_THR1_MICMUTE_3 +915 0x6CCC //TX_DTD_THR2_MICMUTE_0 +916 0x0400 //TX_MICMUTE_MIN_EQ_RE_EST_0 +917 0x0400 //TX_MICMUTE_MIN_EQ_RE_EST_1 +918 0x1000 //TX_MICMUTE_MIN_EQ_RE_EST_2 +919 0x7FFF //TX_MICMUTE_MIN_EQ_RE_EST_3 +920 0x7FFF //TX_MICMUTE_MIN_EQ_RE_EST_4 +921 0x4000 //TX_MICMUTE_C_POST_FLT +922 0x03E8 //TX_MICMUTE_DT_CUT_K +923 0x0001 //TX_MICMUTE_DT_CUT_THR +924 0x03E8 //TX_MICMUTE_DT_CUT_K2 +925 0x0001 //TX_MICMUTE_DT_CUT_THR2 +926 0x0064 //TX_MICMUTE_DT2_HOLD_N +927 0x1000 //TX_MICMUTE_RATIODTH_THCUT +928 0x1000 //TX_MICMUTE_B_POST_FLT_ECHOL +929 0x7FFF //TX_MICMUTE_B_POST_FLT_ECHOH +930 0x0400 //TX_MICMUTE_C_POST_FLT_MASK +931 0x7999 //TX_MICMUTE_RATIODTL_CUT_TH +932 0x0258 //TX_MICMUTE_DT_CUT_K1 +933 0x0800 //TX_MICMUTE_N2_SN_EST +934 0xFC00 //TX_MICMUTE_THR_SN_EST_0 +935 0x001C //TX_MICMUTE_MIN_G_CTRL_0 +936 0x6000 //TX_MICMUTE_A_POST_FILT_S_0 +937 0x7000 //TX_MICMUTE_B_POST_FILT_0 +938 0x2710 //TX_MIC1RUB_AMP_THR +939 0x0010 //TX_MIC1MUTE_RATIO_THR +940 0x0450 //TX_MIC1MUTE_AMP_THR +941 0x0008 //TX_MIC1MUTE_CVG_TIME +942 0x0008 //TX_MIC1MUTE_RELEASE_TIME +943 0x0000 //TX_AMS_RESRV_01 +944 0x0000 //TX_AMS_RESRV_02 +945 0x0000 //TX_AMS_RESRV_03 +946 0x0000 //TX_AMS_RESRV_04 +947 0x0000 //TX_AMS_RESRV_05 +948 0x0000 //TX_AMS_RESRV_06 +949 0x0000 //TX_AMS_RESRV_07 +950 0x0000 //TX_AMS_RESRV_08 +951 0x0000 //TX_AMS_RESRV_09 +952 0x0000 //TX_AMS_RESRV_10 +953 0x0000 //TX_AMS_RESRV_11 +954 0x0000 //TX_AMS_RESRV_12 +955 0x0000 //TX_AMS_RESRV_13 +956 0x0000 //TX_AMS_RESRV_14 +957 0x0000 //TX_AMS_RESRV_15 +958 0x0000 //TX_AMS_RESRV_16 +959 0x0000 //TX_AMS_RESRV_17 +960 0x0000 //TX_AMS_RESRV_18 +961 0x0000 //TX_AMS_RESRV_19 +#RX +0 0x203C //RX_RECVFUNC_MODE_0 +1 0x0000 //RX_RECVFUNC_MODE_1 +2 0x0000 //RX_SAMPLINGFREQ_SIG +3 0x0000 //RX_SAMPLINGFREQ_PROC +4 0x000A //RX_FRAME_SZ +5 0x0000 //RX_DELAY_OPT +6 0x1000 //RX_TDDRC_ALPHA_UP_1 +7 0x1000 //RX_TDDRC_ALPHA_UP_2 +8 0x1000 //RX_TDDRC_ALPHA_UP_3 +9 0x1000 //RX_TDDRC_ALPHA_UP_4 +10 0x0600 //RX_PGA +11 0x7FFF //RX_A_HP +12 0x4000 //RX_B_PE +13 0x7800 //RX_THR_PITCH_DET_0 +14 0x7000 //RX_THR_PITCH_DET_1 +15 0x6000 //RX_THR_PITCH_DET_2 +16 0x0008 //RX_PITCH_BFR_LEN +17 0x0003 //RX_SBD_PITCH_DET +18 0x0100 //RX_PP_RESRV_0 +19 0x0020 //RX_PP_RESRV_1 +20 0x0400 //RX_N_SN_EST +21 0x000C //RX_N2_SN_EST +22 0x0014 //RX_NS_LVL_CTRL +23 0xF800 //RX_THR_SN_EST +24 0x7E00 //RX_LAMBDA_PFILT +25 0x000A //RX_FENS_RESRV_0 +26 0x0190 //RX_FENS_RESRV_1 +27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +30 0x0002 //RX_EXTRA_NS_L +31 0x0800 //RX_EXTRA_NS_A +32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +33 0x7000 //RX_TDDRC_LIMITER_THRD +34 0x0800 //RX_TDDRC_LIMITER_GAIN +35 0x199A //RX_A_POST_FLT +36 0x0000 //RX_LMT_THRD +37 0x4000 //RX_LMT_ALPHA +38 0x0014 //RX_FDEQ_SUBNUM +39 0x4840 //RX_FDEQ_GAIN_0 +40 0x3E40 //RX_FDEQ_GAIN_1 +41 0x515E //RX_FDEQ_GAIN_2 +42 0x6470 //RX_FDEQ_GAIN_3 +43 0x7A84 //RX_FDEQ_GAIN_4 +44 0x7C7A //RX_FDEQ_GAIN_5 +45 0x7C7C //RX_FDEQ_GAIN_6 +46 0x7D7C //RX_FDEQ_GAIN_7 +47 0x7E82 //RX_FDEQ_GAIN_8 +48 0x7C80 //RX_FDEQ_GAIN_9 +49 0x4848 //RX_FDEQ_GAIN_10 +50 0x4848 //RX_FDEQ_GAIN_11 +51 0x4848 //RX_FDEQ_GAIN_12 +52 0x4848 //RX_FDEQ_GAIN_13 +53 0x4848 //RX_FDEQ_GAIN_14 +54 0x4848 //RX_FDEQ_GAIN_15 +55 0x4848 //RX_FDEQ_GAIN_16 +56 0x4848 //RX_FDEQ_GAIN_17 +57 0x4848 //RX_FDEQ_GAIN_18 +58 0x4848 //RX_FDEQ_GAIN_19 +59 0x4848 //RX_FDEQ_GAIN_20 +60 0x4848 //RX_FDEQ_GAIN_21 +61 0x4848 //RX_FDEQ_GAIN_22 +62 0x4848 //RX_FDEQ_GAIN_23 +63 0x0202 //RX_FDEQ_BIN_0 +64 0x0204 //RX_FDEQ_BIN_1 +65 0x0203 //RX_FDEQ_BIN_2 +66 0x0304 //RX_FDEQ_BIN_3 +67 0x0405 //RX_FDEQ_BIN_4 +68 0x0506 //RX_FDEQ_BIN_5 +69 0x0708 //RX_FDEQ_BIN_6 +70 0x090A //RX_FDEQ_BIN_7 +71 0x0B0C //RX_FDEQ_BIN_8 +72 0x0D08 //RX_FDEQ_BIN_9 +73 0x0000 //RX_FDEQ_BIN_10 +74 0x0000 //RX_FDEQ_BIN_11 +75 0x0000 //RX_FDEQ_BIN_12 +76 0x0000 //RX_FDEQ_BIN_13 +77 0x0000 //RX_FDEQ_BIN_14 +78 0x0000 //RX_FDEQ_BIN_15 +79 0x0000 //RX_FDEQ_BIN_16 +80 0x0000 //RX_FDEQ_BIN_17 +81 0x0000 //RX_FDEQ_BIN_18 +82 0x0000 //RX_FDEQ_BIN_19 +83 0x0000 //RX_FDEQ_BIN_20 +84 0x0000 //RX_FDEQ_BIN_21 +85 0x0000 //RX_FDEQ_BIN_22 +86 0x0000 //RX_FDEQ_BIN_23 +87 0x4000 //RX_FDEQ_RESRV_0 +88 0x0320 //RX_FDEQ_RESRV_1 +89 0x0018 //RX_FDDRC_BAND_MARGIN_0 +90 0x0030 //RX_FDDRC_BAND_MARGIN_1 +91 0x0050 //RX_FDDRC_BAND_MARGIN_2 +92 0x0080 //RX_FDDRC_BAND_MARGIN_3 +93 0x0007 //RX_FDDRC_BLOCK_EXP +94 0x5000 //RX_FDDRC_THRD_2_0 +95 0x5000 //RX_FDDRC_THRD_2_1 +96 0x5000 //RX_FDDRC_THRD_2_2 +97 0x5000 //RX_FDDRC_THRD_2_3 +98 0x6400 //RX_FDDRC_THRD_3_0 +99 0x6400 //RX_FDDRC_THRD_3_1 +100 0x6400 //RX_FDDRC_THRD_3_2 +101 0x6400 //RX_FDDRC_THRD_3_3 +102 0x2000 //RX_FDDRC_SLANT_0_0 +103 0x2000 //RX_FDDRC_SLANT_0_1 +104 0x2000 //RX_FDDRC_SLANT_0_2 +105 0x2000 //RX_FDDRC_SLANT_0_3 +106 0x5333 //RX_FDDRC_SLANT_1_0 +107 0x5333 //RX_FDDRC_SLANT_1_1 +108 0x5333 //RX_FDDRC_SLANT_1_2 +109 0x5333 //RX_FDDRC_SLANT_1_3 +110 0x0000 //RX_FDDRC_RESRV_0 +111 0x0002 //RX_FILTINDX +112 0x0000 //RX_TDDRC_THRD_0 +113 0x0000 //RX_TDDRC_THRD_1 +114 0x1800 //RX_TDDRC_THRD_2 +115 0x1800 //RX_TDDRC_THRD_3 +116 0x3000 //RX_TDDRC_SLANT_0 +117 0x6E00 //RX_TDDRC_SLANT_1 +118 0x1000 //RX_TDDRC_ALPHA_UP_0 +119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +120 0x0000 //RX_TDDRC_HMNC_FLAG +121 0x199A //RX_TDDRC_HMNC_GAIN +122 0x0001 //RX_TDDRC_SMT_FLAG +123 0x0CCD //RX_TDDRC_SMT_W +124 0x055F //RX_TDDRC_DRC_GAIN +125 0x7C00 //RX_LAMBDA_PKA_FP +126 0x13E0 //RX_TPKA_FP +127 0x0080 //RX_MIN_G_FP +128 0x2000 //RX_MAX_G_FP +129 0x000A //RX_SPK_VOL +130 0x0000 //RX_VOL_RESRV_0 +131 0x0000 //RX_MAXLEVEL_CNG +132 0x3000 //RX_BWE_UV_TH +133 0x3000 //RX_BWE_UV_TH2 +134 0x1800 //RX_BWE_UV_TH3 +135 0x1000 //RX_BWE_V_TH +136 0x04CD //RX_BWE_GAIN1_V_TH1 +137 0x0F33 //RX_BWE_GAIN1_V_TH2 +138 0x7333 //RX_BWE_UV_EQ +139 0x199A //RX_BWE_V_EQ +140 0x7333 //RX_BWE_TONE_TH +141 0x0004 //RX_BWE_UV_HOLD_T +142 0x6CCD //RX_BWE_GAIN2_ALPHA +143 0x799A //RX_BWE_GAIN3_ALPHA +144 0x001E //RX_BWE_CUTOFF +145 0x3000 //RX_BWE_GAINFILL +146 0x3200 //RX_BWE_MAXTH_TONE +147 0x2000 //RX_BWE_EQ_0 +148 0x2000 //RX_BWE_EQ_1 +149 0x2000 //RX_BWE_EQ_2 +150 0x2000 //RX_BWE_EQ_3 +151 0x2000 //RX_BWE_EQ_4 +152 0x2000 //RX_BWE_EQ_5 +153 0x2000 //RX_BWE_EQ_6 +154 0x0000 //RX_BWE_RESRV_0 +155 0x0000 //RX_BWE_RESRV_1 +156 0x0000 //RX_BWE_RESRV_2 +#VOL 0 +6 0x1000 //RX_TDDRC_ALPHA_UP_1 +7 0x1000 //RX_TDDRC_ALPHA_UP_2 +8 0x1000 //RX_TDDRC_ALPHA_UP_3 +9 0x1000 //RX_TDDRC_ALPHA_UP_4 +27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +33 0x7000 //RX_TDDRC_LIMITER_THRD +34 0x0800 //RX_TDDRC_LIMITER_GAIN +112 0x0000 //RX_TDDRC_THRD_0 +113 0x0000 //RX_TDDRC_THRD_1 +114 0x1800 //RX_TDDRC_THRD_2 +115 0x1800 //RX_TDDRC_THRD_3 +116 0x3000 //RX_TDDRC_SLANT_0 +117 0x6E00 //RX_TDDRC_SLANT_1 +118 0x1000 //RX_TDDRC_ALPHA_UP_0 +119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +120 0x0000 //RX_TDDRC_HMNC_FLAG +121 0x199A //RX_TDDRC_HMNC_GAIN +122 0x0001 //RX_TDDRC_SMT_FLAG +123 0x0CCD //RX_TDDRC_SMT_W +124 0x055F //RX_TDDRC_DRC_GAIN +38 0x0014 //RX_FDEQ_SUBNUM +39 0x4840 //RX_FDEQ_GAIN_0 +40 0x3E40 //RX_FDEQ_GAIN_1 +41 0x4D5A //RX_FDEQ_GAIN_2 +42 0x606C //RX_FDEQ_GAIN_3 +43 0x767C //RX_FDEQ_GAIN_4 +44 0x7876 //RX_FDEQ_GAIN_5 +45 0x7878 //RX_FDEQ_GAIN_6 +46 0x797C //RX_FDEQ_GAIN_7 +47 0x7E82 //RX_FDEQ_GAIN_8 +48 0x7C80 //RX_FDEQ_GAIN_9 +49 0x4848 //RX_FDEQ_GAIN_10 +50 0x4848 //RX_FDEQ_GAIN_11 +51 0x4848 //RX_FDEQ_GAIN_12 +52 0x4848 //RX_FDEQ_GAIN_13 +53 0x4848 //RX_FDEQ_GAIN_14 +54 0x4848 //RX_FDEQ_GAIN_15 +55 0x4848 //RX_FDEQ_GAIN_16 +56 0x4848 //RX_FDEQ_GAIN_17 +57 0x4848 //RX_FDEQ_GAIN_18 +58 0x4848 //RX_FDEQ_GAIN_19 +59 0x4848 //RX_FDEQ_GAIN_20 +60 0x4848 //RX_FDEQ_GAIN_21 +61 0x4848 //RX_FDEQ_GAIN_22 +62 0x4848 //RX_FDEQ_GAIN_23 +63 0x0202 //RX_FDEQ_BIN_0 +64 0x0204 //RX_FDEQ_BIN_1 +65 0x0203 //RX_FDEQ_BIN_2 +66 0x0304 //RX_FDEQ_BIN_3 +67 0x0405 //RX_FDEQ_BIN_4 +68 0x0506 //RX_FDEQ_BIN_5 +69 0x0708 //RX_FDEQ_BIN_6 +70 0x090A //RX_FDEQ_BIN_7 +71 0x0B0C //RX_FDEQ_BIN_8 +72 0x0D08 //RX_FDEQ_BIN_9 +73 0x0000 //RX_FDEQ_BIN_10 +74 0x0000 //RX_FDEQ_BIN_11 +75 0x0000 //RX_FDEQ_BIN_12 +76 0x0000 //RX_FDEQ_BIN_13 +77 0x0000 //RX_FDEQ_BIN_14 +78 0x0000 //RX_FDEQ_BIN_15 +79 0x0000 //RX_FDEQ_BIN_16 +80 0x0000 //RX_FDEQ_BIN_17 +81 0x0000 //RX_FDEQ_BIN_18 +82 0x0000 //RX_FDEQ_BIN_19 +83 0x0000 //RX_FDEQ_BIN_20 +84 0x0000 //RX_FDEQ_BIN_21 +85 0x0000 //RX_FDEQ_BIN_22 +86 0x0000 //RX_FDEQ_BIN_23 +87 0x4000 //RX_FDEQ_RESRV_0 +88 0x0320 //RX_FDEQ_RESRV_1 +89 0x0018 //RX_FDDRC_BAND_MARGIN_0 +90 0x0030 //RX_FDDRC_BAND_MARGIN_1 +91 0x0050 //RX_FDDRC_BAND_MARGIN_2 +92 0x0080 //RX_FDDRC_BAND_MARGIN_3 +93 0x0007 //RX_FDDRC_BLOCK_EXP +94 0x5000 //RX_FDDRC_THRD_2_0 +95 0x5000 //RX_FDDRC_THRD_2_1 +96 0x5000 //RX_FDDRC_THRD_2_2 +97 0x5000 //RX_FDDRC_THRD_2_3 +98 0x6400 //RX_FDDRC_THRD_3_0 +99 0x6400 //RX_FDDRC_THRD_3_1 +100 0x6400 //RX_FDDRC_THRD_3_2 +101 0x6400 //RX_FDDRC_THRD_3_3 +102 0x2000 //RX_FDDRC_SLANT_0_0 +103 0x2000 //RX_FDDRC_SLANT_0_1 +104 0x2000 //RX_FDDRC_SLANT_0_2 +105 0x2000 //RX_FDDRC_SLANT_0_3 +106 0x5333 //RX_FDDRC_SLANT_1_0 +107 0x5333 //RX_FDDRC_SLANT_1_1 +108 0x5333 //RX_FDDRC_SLANT_1_2 +109 0x5333 //RX_FDDRC_SLANT_1_3 +110 0x0000 //RX_FDDRC_RESRV_0 +129 0x000A //RX_SPK_VOL +130 0x0000 //RX_VOL_RESRV_0 +#VOL 1 +6 0x1000 //RX_TDDRC_ALPHA_UP_1 +7 0x1000 //RX_TDDRC_ALPHA_UP_2 +8 0x1000 //RX_TDDRC_ALPHA_UP_3 +9 0x1000 //RX_TDDRC_ALPHA_UP_4 +27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +33 0x7000 //RX_TDDRC_LIMITER_THRD +34 0x0800 //RX_TDDRC_LIMITER_GAIN +112 0x0000 //RX_TDDRC_THRD_0 +113 0x0000 //RX_TDDRC_THRD_1 +114 0x1800 //RX_TDDRC_THRD_2 +115 0x1800 //RX_TDDRC_THRD_3 +116 0x3000 //RX_TDDRC_SLANT_0 +117 0x6E00 //RX_TDDRC_SLANT_1 +118 0x1000 //RX_TDDRC_ALPHA_UP_0 +119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +120 0x0000 //RX_TDDRC_HMNC_FLAG +121 0x199A //RX_TDDRC_HMNC_GAIN +122 0x0001 //RX_TDDRC_SMT_FLAG +123 0x0CCD //RX_TDDRC_SMT_W +124 0x055F //RX_TDDRC_DRC_GAIN +38 0x0014 //RX_FDEQ_SUBNUM +39 0x4840 //RX_FDEQ_GAIN_0 +40 0x3E40 //RX_FDEQ_GAIN_1 +41 0x4D5A //RX_FDEQ_GAIN_2 +42 0x606C //RX_FDEQ_GAIN_3 +43 0x767C //RX_FDEQ_GAIN_4 +44 0x7876 //RX_FDEQ_GAIN_5 +45 0x7878 //RX_FDEQ_GAIN_6 +46 0x797C //RX_FDEQ_GAIN_7 +47 0x7E82 //RX_FDEQ_GAIN_8 +48 0x7C80 //RX_FDEQ_GAIN_9 +49 0x4848 //RX_FDEQ_GAIN_10 +50 0x4848 //RX_FDEQ_GAIN_11 +51 0x4848 //RX_FDEQ_GAIN_12 +52 0x4848 //RX_FDEQ_GAIN_13 +53 0x4848 //RX_FDEQ_GAIN_14 +54 0x4848 //RX_FDEQ_GAIN_15 +55 0x4848 //RX_FDEQ_GAIN_16 +56 0x4848 //RX_FDEQ_GAIN_17 +57 0x4848 //RX_FDEQ_GAIN_18 +58 0x4848 //RX_FDEQ_GAIN_19 +59 0x4848 //RX_FDEQ_GAIN_20 +60 0x4848 //RX_FDEQ_GAIN_21 +61 0x4848 //RX_FDEQ_GAIN_22 +62 0x4848 //RX_FDEQ_GAIN_23 +63 0x0202 //RX_FDEQ_BIN_0 +64 0x0204 //RX_FDEQ_BIN_1 +65 0x0203 //RX_FDEQ_BIN_2 +66 0x0304 //RX_FDEQ_BIN_3 +67 0x0405 //RX_FDEQ_BIN_4 +68 0x0506 //RX_FDEQ_BIN_5 +69 0x0708 //RX_FDEQ_BIN_6 +70 0x090A //RX_FDEQ_BIN_7 +71 0x0B0C //RX_FDEQ_BIN_8 +72 0x0D08 //RX_FDEQ_BIN_9 +73 0x0000 //RX_FDEQ_BIN_10 +74 0x0000 //RX_FDEQ_BIN_11 +75 0x0000 //RX_FDEQ_BIN_12 +76 0x0000 //RX_FDEQ_BIN_13 +77 0x0000 //RX_FDEQ_BIN_14 +78 0x0000 //RX_FDEQ_BIN_15 +79 0x0000 //RX_FDEQ_BIN_16 +80 0x0000 //RX_FDEQ_BIN_17 +81 0x0000 //RX_FDEQ_BIN_18 +82 0x0000 //RX_FDEQ_BIN_19 +83 0x0000 //RX_FDEQ_BIN_20 +84 0x0000 //RX_FDEQ_BIN_21 +85 0x0000 //RX_FDEQ_BIN_22 +86 0x0000 //RX_FDEQ_BIN_23 +87 0x4000 //RX_FDEQ_RESRV_0 +88 0x0320 //RX_FDEQ_RESRV_1 +89 0x0018 //RX_FDDRC_BAND_MARGIN_0 +90 0x0030 //RX_FDDRC_BAND_MARGIN_1 +91 0x0050 //RX_FDDRC_BAND_MARGIN_2 +92 0x0080 //RX_FDDRC_BAND_MARGIN_3 +93 0x0007 //RX_FDDRC_BLOCK_EXP +94 0x5000 //RX_FDDRC_THRD_2_0 +95 0x5000 //RX_FDDRC_THRD_2_1 +96 0x5000 //RX_FDDRC_THRD_2_2 +97 0x5000 //RX_FDDRC_THRD_2_3 +98 0x6400 //RX_FDDRC_THRD_3_0 +99 0x6400 //RX_FDDRC_THRD_3_1 +100 0x6400 //RX_FDDRC_THRD_3_2 +101 0x6400 //RX_FDDRC_THRD_3_3 +102 0x2000 //RX_FDDRC_SLANT_0_0 +103 0x2000 //RX_FDDRC_SLANT_0_1 +104 0x2000 //RX_FDDRC_SLANT_0_2 +105 0x2000 //RX_FDDRC_SLANT_0_3 +106 0x5333 //RX_FDDRC_SLANT_1_0 +107 0x5333 //RX_FDDRC_SLANT_1_1 +108 0x5333 //RX_FDDRC_SLANT_1_2 +109 0x5333 //RX_FDDRC_SLANT_1_3 +110 0x0000 //RX_FDDRC_RESRV_0 +129 0x0010 //RX_SPK_VOL +130 0x0000 //RX_VOL_RESRV_0 +#VOL 2 +6 0x1000 //RX_TDDRC_ALPHA_UP_1 +7 0x1000 //RX_TDDRC_ALPHA_UP_2 +8 0x1000 //RX_TDDRC_ALPHA_UP_3 +9 0x1000 //RX_TDDRC_ALPHA_UP_4 +27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +33 0x7000 //RX_TDDRC_LIMITER_THRD +34 0x0800 //RX_TDDRC_LIMITER_GAIN +112 0x0000 //RX_TDDRC_THRD_0 +113 0x0000 //RX_TDDRC_THRD_1 +114 0x1800 //RX_TDDRC_THRD_2 +115 0x1800 //RX_TDDRC_THRD_3 +116 0x3000 //RX_TDDRC_SLANT_0 +117 0x6E00 //RX_TDDRC_SLANT_1 +118 0x1000 //RX_TDDRC_ALPHA_UP_0 +119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +120 0x0000 //RX_TDDRC_HMNC_FLAG +121 0x199A //RX_TDDRC_HMNC_GAIN +122 0x0001 //RX_TDDRC_SMT_FLAG +123 0x0CCD //RX_TDDRC_SMT_W +124 0x055F //RX_TDDRC_DRC_GAIN +38 0x0014 //RX_FDEQ_SUBNUM +39 0x4840 //RX_FDEQ_GAIN_0 +40 0x3E40 //RX_FDEQ_GAIN_1 +41 0x4D5A //RX_FDEQ_GAIN_2 +42 0x606C //RX_FDEQ_GAIN_3 +43 0x767C //RX_FDEQ_GAIN_4 +44 0x7876 //RX_FDEQ_GAIN_5 +45 0x7878 //RX_FDEQ_GAIN_6 +46 0x797C //RX_FDEQ_GAIN_7 +47 0x7E82 //RX_FDEQ_GAIN_8 +48 0x7C80 //RX_FDEQ_GAIN_9 +49 0x4848 //RX_FDEQ_GAIN_10 +50 0x4848 //RX_FDEQ_GAIN_11 +51 0x4848 //RX_FDEQ_GAIN_12 +52 0x4848 //RX_FDEQ_GAIN_13 +53 0x4848 //RX_FDEQ_GAIN_14 +54 0x4848 //RX_FDEQ_GAIN_15 +55 0x4848 //RX_FDEQ_GAIN_16 +56 0x4848 //RX_FDEQ_GAIN_17 +57 0x4848 //RX_FDEQ_GAIN_18 +58 0x4848 //RX_FDEQ_GAIN_19 +59 0x4848 //RX_FDEQ_GAIN_20 +60 0x4848 //RX_FDEQ_GAIN_21 +61 0x4848 //RX_FDEQ_GAIN_22 +62 0x4848 //RX_FDEQ_GAIN_23 +63 0x0202 //RX_FDEQ_BIN_0 +64 0x0204 //RX_FDEQ_BIN_1 +65 0x0203 //RX_FDEQ_BIN_2 +66 0x0304 //RX_FDEQ_BIN_3 +67 0x0405 //RX_FDEQ_BIN_4 +68 0x0506 //RX_FDEQ_BIN_5 +69 0x0708 //RX_FDEQ_BIN_6 +70 0x090A //RX_FDEQ_BIN_7 +71 0x0B0C //RX_FDEQ_BIN_8 +72 0x0D08 //RX_FDEQ_BIN_9 +73 0x0000 //RX_FDEQ_BIN_10 +74 0x0000 //RX_FDEQ_BIN_11 +75 0x0000 //RX_FDEQ_BIN_12 +76 0x0000 //RX_FDEQ_BIN_13 +77 0x0000 //RX_FDEQ_BIN_14 +78 0x0000 //RX_FDEQ_BIN_15 +79 0x0000 //RX_FDEQ_BIN_16 +80 0x0000 //RX_FDEQ_BIN_17 +81 0x0000 //RX_FDEQ_BIN_18 +82 0x0000 //RX_FDEQ_BIN_19 +83 0x0000 //RX_FDEQ_BIN_20 +84 0x0000 //RX_FDEQ_BIN_21 +85 0x0000 //RX_FDEQ_BIN_22 +86 0x0000 //RX_FDEQ_BIN_23 +87 0x4000 //RX_FDEQ_RESRV_0 +88 0x0320 //RX_FDEQ_RESRV_1 +89 0x0018 //RX_FDDRC_BAND_MARGIN_0 +90 0x0030 //RX_FDDRC_BAND_MARGIN_1 +91 0x0050 //RX_FDDRC_BAND_MARGIN_2 +92 0x0080 //RX_FDDRC_BAND_MARGIN_3 +93 0x0007 //RX_FDDRC_BLOCK_EXP +94 0x5000 //RX_FDDRC_THRD_2_0 +95 0x5000 //RX_FDDRC_THRD_2_1 +96 0x5000 //RX_FDDRC_THRD_2_2 +97 0x5000 //RX_FDDRC_THRD_2_3 +98 0x6400 //RX_FDDRC_THRD_3_0 +99 0x6400 //RX_FDDRC_THRD_3_1 +100 0x6400 //RX_FDDRC_THRD_3_2 +101 0x6400 //RX_FDDRC_THRD_3_3 +102 0x2000 //RX_FDDRC_SLANT_0_0 +103 0x2000 //RX_FDDRC_SLANT_0_1 +104 0x2000 //RX_FDDRC_SLANT_0_2 +105 0x2000 //RX_FDDRC_SLANT_0_3 +106 0x5333 //RX_FDDRC_SLANT_1_0 +107 0x5333 //RX_FDDRC_SLANT_1_1 +108 0x5333 //RX_FDDRC_SLANT_1_2 +109 0x5333 //RX_FDDRC_SLANT_1_3 +110 0x0000 //RX_FDDRC_RESRV_0 +129 0x001A //RX_SPK_VOL +130 0x0000 //RX_VOL_RESRV_0 +#VOL 3 +6 0x1000 //RX_TDDRC_ALPHA_UP_1 +7 0x1000 //RX_TDDRC_ALPHA_UP_2 +8 0x1000 //RX_TDDRC_ALPHA_UP_3 +9 0x1000 //RX_TDDRC_ALPHA_UP_4 +27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +33 0x7000 //RX_TDDRC_LIMITER_THRD +34 0x0800 //RX_TDDRC_LIMITER_GAIN +112 0x0000 //RX_TDDRC_THRD_0 +113 0x0000 //RX_TDDRC_THRD_1 +114 0x1800 //RX_TDDRC_THRD_2 +115 0x1800 //RX_TDDRC_THRD_3 +116 0x3000 //RX_TDDRC_SLANT_0 +117 0x6E00 //RX_TDDRC_SLANT_1 +118 0x1000 //RX_TDDRC_ALPHA_UP_0 +119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +120 0x0000 //RX_TDDRC_HMNC_FLAG +121 0x199A //RX_TDDRC_HMNC_GAIN +122 0x0001 //RX_TDDRC_SMT_FLAG +123 0x0CCD //RX_TDDRC_SMT_W +124 0x055F //RX_TDDRC_DRC_GAIN +38 0x0014 //RX_FDEQ_SUBNUM +39 0x4840 //RX_FDEQ_GAIN_0 +40 0x3E40 //RX_FDEQ_GAIN_1 +41 0x4D5A //RX_FDEQ_GAIN_2 +42 0x606C //RX_FDEQ_GAIN_3 +43 0x767C //RX_FDEQ_GAIN_4 +44 0x7876 //RX_FDEQ_GAIN_5 +45 0x7878 //RX_FDEQ_GAIN_6 +46 0x797C //RX_FDEQ_GAIN_7 +47 0x7E82 //RX_FDEQ_GAIN_8 +48 0x7C80 //RX_FDEQ_GAIN_9 +49 0x4848 //RX_FDEQ_GAIN_10 +50 0x4848 //RX_FDEQ_GAIN_11 +51 0x4848 //RX_FDEQ_GAIN_12 +52 0x4848 //RX_FDEQ_GAIN_13 +53 0x4848 //RX_FDEQ_GAIN_14 +54 0x4848 //RX_FDEQ_GAIN_15 +55 0x4848 //RX_FDEQ_GAIN_16 +56 0x4848 //RX_FDEQ_GAIN_17 +57 0x4848 //RX_FDEQ_GAIN_18 +58 0x4848 //RX_FDEQ_GAIN_19 +59 0x4848 //RX_FDEQ_GAIN_20 +60 0x4848 //RX_FDEQ_GAIN_21 +61 0x4848 //RX_FDEQ_GAIN_22 +62 0x4848 //RX_FDEQ_GAIN_23 +63 0x0202 //RX_FDEQ_BIN_0 +64 0x0204 //RX_FDEQ_BIN_1 +65 0x0203 //RX_FDEQ_BIN_2 +66 0x0304 //RX_FDEQ_BIN_3 +67 0x0405 //RX_FDEQ_BIN_4 +68 0x0506 //RX_FDEQ_BIN_5 +69 0x0708 //RX_FDEQ_BIN_6 +70 0x090A //RX_FDEQ_BIN_7 +71 0x0B0C //RX_FDEQ_BIN_8 +72 0x0D08 //RX_FDEQ_BIN_9 +73 0x0000 //RX_FDEQ_BIN_10 +74 0x0000 //RX_FDEQ_BIN_11 +75 0x0000 //RX_FDEQ_BIN_12 +76 0x0000 //RX_FDEQ_BIN_13 +77 0x0000 //RX_FDEQ_BIN_14 +78 0x0000 //RX_FDEQ_BIN_15 +79 0x0000 //RX_FDEQ_BIN_16 +80 0x0000 //RX_FDEQ_BIN_17 +81 0x0000 //RX_FDEQ_BIN_18 +82 0x0000 //RX_FDEQ_BIN_19 +83 0x0000 //RX_FDEQ_BIN_20 +84 0x0000 //RX_FDEQ_BIN_21 +85 0x0000 //RX_FDEQ_BIN_22 +86 0x0000 //RX_FDEQ_BIN_23 +87 0x4000 //RX_FDEQ_RESRV_0 +88 0x0320 //RX_FDEQ_RESRV_1 +89 0x0018 //RX_FDDRC_BAND_MARGIN_0 +90 0x0030 //RX_FDDRC_BAND_MARGIN_1 +91 0x0050 //RX_FDDRC_BAND_MARGIN_2 +92 0x0080 //RX_FDDRC_BAND_MARGIN_3 +93 0x0007 //RX_FDDRC_BLOCK_EXP +94 0x5000 //RX_FDDRC_THRD_2_0 +95 0x5000 //RX_FDDRC_THRD_2_1 +96 0x5000 //RX_FDDRC_THRD_2_2 +97 0x5000 //RX_FDDRC_THRD_2_3 +98 0x6400 //RX_FDDRC_THRD_3_0 +99 0x6400 //RX_FDDRC_THRD_3_1 +100 0x6400 //RX_FDDRC_THRD_3_2 +101 0x6400 //RX_FDDRC_THRD_3_3 +102 0x2000 //RX_FDDRC_SLANT_0_0 +103 0x2000 //RX_FDDRC_SLANT_0_1 +104 0x2000 //RX_FDDRC_SLANT_0_2 +105 0x2000 //RX_FDDRC_SLANT_0_3 +106 0x5333 //RX_FDDRC_SLANT_1_0 +107 0x5333 //RX_FDDRC_SLANT_1_1 +108 0x5333 //RX_FDDRC_SLANT_1_2 +109 0x5333 //RX_FDDRC_SLANT_1_3 +110 0x0000 //RX_FDDRC_RESRV_0 +129 0x0033 //RX_SPK_VOL +130 0x0000 //RX_VOL_RESRV_0 +#VOL 4 +6 0x1000 //RX_TDDRC_ALPHA_UP_1 +7 0x1000 //RX_TDDRC_ALPHA_UP_2 +8 0x1000 //RX_TDDRC_ALPHA_UP_3 +9 0x1000 //RX_TDDRC_ALPHA_UP_4 +27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +33 0x7000 //RX_TDDRC_LIMITER_THRD +34 0x0800 //RX_TDDRC_LIMITER_GAIN +112 0x0000 //RX_TDDRC_THRD_0 +113 0x0000 //RX_TDDRC_THRD_1 +114 0x1800 //RX_TDDRC_THRD_2 +115 0x1800 //RX_TDDRC_THRD_3 +116 0x3000 //RX_TDDRC_SLANT_0 +117 0x6E00 //RX_TDDRC_SLANT_1 +118 0x1000 //RX_TDDRC_ALPHA_UP_0 +119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +120 0x0000 //RX_TDDRC_HMNC_FLAG +121 0x199A //RX_TDDRC_HMNC_GAIN +122 0x0001 //RX_TDDRC_SMT_FLAG +123 0x0CCD //RX_TDDRC_SMT_W +124 0x055F //RX_TDDRC_DRC_GAIN +38 0x0014 //RX_FDEQ_SUBNUM +39 0x4840 //RX_FDEQ_GAIN_0 +40 0x3E40 //RX_FDEQ_GAIN_1 +41 0x4D5A //RX_FDEQ_GAIN_2 +42 0x606C //RX_FDEQ_GAIN_3 +43 0x767C //RX_FDEQ_GAIN_4 +44 0x7876 //RX_FDEQ_GAIN_5 +45 0x7878 //RX_FDEQ_GAIN_6 +46 0x797C //RX_FDEQ_GAIN_7 +47 0x7E82 //RX_FDEQ_GAIN_8 +48 0x7C80 //RX_FDEQ_GAIN_9 +49 0x4848 //RX_FDEQ_GAIN_10 +50 0x4848 //RX_FDEQ_GAIN_11 +51 0x4848 //RX_FDEQ_GAIN_12 +52 0x4848 //RX_FDEQ_GAIN_13 +53 0x4848 //RX_FDEQ_GAIN_14 +54 0x4848 //RX_FDEQ_GAIN_15 +55 0x4848 //RX_FDEQ_GAIN_16 +56 0x4848 //RX_FDEQ_GAIN_17 +57 0x4848 //RX_FDEQ_GAIN_18 +58 0x4848 //RX_FDEQ_GAIN_19 +59 0x4848 //RX_FDEQ_GAIN_20 +60 0x4848 //RX_FDEQ_GAIN_21 +61 0x4848 //RX_FDEQ_GAIN_22 +62 0x4848 //RX_FDEQ_GAIN_23 +63 0x0202 //RX_FDEQ_BIN_0 +64 0x0204 //RX_FDEQ_BIN_1 +65 0x0203 //RX_FDEQ_BIN_2 +66 0x0304 //RX_FDEQ_BIN_3 +67 0x0405 //RX_FDEQ_BIN_4 +68 0x0506 //RX_FDEQ_BIN_5 +69 0x0708 //RX_FDEQ_BIN_6 +70 0x090A //RX_FDEQ_BIN_7 +71 0x0B0C //RX_FDEQ_BIN_8 +72 0x0D08 //RX_FDEQ_BIN_9 +73 0x0000 //RX_FDEQ_BIN_10 +74 0x0000 //RX_FDEQ_BIN_11 +75 0x0000 //RX_FDEQ_BIN_12 +76 0x0000 //RX_FDEQ_BIN_13 +77 0x0000 //RX_FDEQ_BIN_14 +78 0x0000 //RX_FDEQ_BIN_15 +79 0x0000 //RX_FDEQ_BIN_16 +80 0x0000 //RX_FDEQ_BIN_17 +81 0x0000 //RX_FDEQ_BIN_18 +82 0x0000 //RX_FDEQ_BIN_19 +83 0x0000 //RX_FDEQ_BIN_20 +84 0x0000 //RX_FDEQ_BIN_21 +85 0x0000 //RX_FDEQ_BIN_22 +86 0x0000 //RX_FDEQ_BIN_23 +87 0x4000 //RX_FDEQ_RESRV_0 +88 0x0320 //RX_FDEQ_RESRV_1 +89 0x0018 //RX_FDDRC_BAND_MARGIN_0 +90 0x0030 //RX_FDDRC_BAND_MARGIN_1 +91 0x0050 //RX_FDDRC_BAND_MARGIN_2 +92 0x0080 //RX_FDDRC_BAND_MARGIN_3 +93 0x0007 //RX_FDDRC_BLOCK_EXP +94 0x5000 //RX_FDDRC_THRD_2_0 +95 0x5000 //RX_FDDRC_THRD_2_1 +96 0x5000 //RX_FDDRC_THRD_2_2 +97 0x5000 //RX_FDDRC_THRD_2_3 +98 0x6400 //RX_FDDRC_THRD_3_0 +99 0x6400 //RX_FDDRC_THRD_3_1 +100 0x6400 //RX_FDDRC_THRD_3_2 +101 0x6400 //RX_FDDRC_THRD_3_3 +102 0x2000 //RX_FDDRC_SLANT_0_0 +103 0x2000 //RX_FDDRC_SLANT_0_1 +104 0x2000 //RX_FDDRC_SLANT_0_2 +105 0x2000 //RX_FDDRC_SLANT_0_3 +106 0x5333 //RX_FDDRC_SLANT_1_0 +107 0x5333 //RX_FDDRC_SLANT_1_1 +108 0x5333 //RX_FDDRC_SLANT_1_2 +109 0x5333 //RX_FDDRC_SLANT_1_3 +110 0x0000 //RX_FDDRC_RESRV_0 +129 0x0045 //RX_SPK_VOL +130 0x0000 //RX_VOL_RESRV_0 +#VOL 5 +6 0x1000 //RX_TDDRC_ALPHA_UP_1 +7 0x1000 //RX_TDDRC_ALPHA_UP_2 +8 0x1000 //RX_TDDRC_ALPHA_UP_3 +9 0x1000 //RX_TDDRC_ALPHA_UP_4 +27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +33 0x7000 //RX_TDDRC_LIMITER_THRD +34 0x0800 //RX_TDDRC_LIMITER_GAIN +112 0x0000 //RX_TDDRC_THRD_0 +113 0x0000 //RX_TDDRC_THRD_1 +114 0x1800 //RX_TDDRC_THRD_2 +115 0x1800 //RX_TDDRC_THRD_3 +116 0x3000 //RX_TDDRC_SLANT_0 +117 0x6E00 //RX_TDDRC_SLANT_1 +118 0x1000 //RX_TDDRC_ALPHA_UP_0 +119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +120 0x0000 //RX_TDDRC_HMNC_FLAG +121 0x199A //RX_TDDRC_HMNC_GAIN +122 0x0001 //RX_TDDRC_SMT_FLAG +123 0x0CCD //RX_TDDRC_SMT_W +124 0x055F //RX_TDDRC_DRC_GAIN +38 0x0014 //RX_FDEQ_SUBNUM +39 0x4840 //RX_FDEQ_GAIN_0 +40 0x3E40 //RX_FDEQ_GAIN_1 +41 0x4D5A //RX_FDEQ_GAIN_2 +42 0x606C //RX_FDEQ_GAIN_3 +43 0x767C //RX_FDEQ_GAIN_4 +44 0x7876 //RX_FDEQ_GAIN_5 +45 0x7878 //RX_FDEQ_GAIN_6 +46 0x797C //RX_FDEQ_GAIN_7 +47 0x7E82 //RX_FDEQ_GAIN_8 +48 0x7C80 //RX_FDEQ_GAIN_9 +49 0x4848 //RX_FDEQ_GAIN_10 +50 0x4848 //RX_FDEQ_GAIN_11 +51 0x4848 //RX_FDEQ_GAIN_12 +52 0x4848 //RX_FDEQ_GAIN_13 +53 0x4848 //RX_FDEQ_GAIN_14 +54 0x4848 //RX_FDEQ_GAIN_15 +55 0x4848 //RX_FDEQ_GAIN_16 +56 0x4848 //RX_FDEQ_GAIN_17 +57 0x4848 //RX_FDEQ_GAIN_18 +58 0x4848 //RX_FDEQ_GAIN_19 +59 0x4848 //RX_FDEQ_GAIN_20 +60 0x4848 //RX_FDEQ_GAIN_21 +61 0x4848 //RX_FDEQ_GAIN_22 +62 0x4848 //RX_FDEQ_GAIN_23 +63 0x0202 //RX_FDEQ_BIN_0 +64 0x0204 //RX_FDEQ_BIN_1 +65 0x0203 //RX_FDEQ_BIN_2 +66 0x0304 //RX_FDEQ_BIN_3 +67 0x0405 //RX_FDEQ_BIN_4 +68 0x0506 //RX_FDEQ_BIN_5 +69 0x0708 //RX_FDEQ_BIN_6 +70 0x090A //RX_FDEQ_BIN_7 +71 0x0B0C //RX_FDEQ_BIN_8 +72 0x0D08 //RX_FDEQ_BIN_9 +73 0x0000 //RX_FDEQ_BIN_10 +74 0x0000 //RX_FDEQ_BIN_11 +75 0x0000 //RX_FDEQ_BIN_12 +76 0x0000 //RX_FDEQ_BIN_13 +77 0x0000 //RX_FDEQ_BIN_14 +78 0x0000 //RX_FDEQ_BIN_15 +79 0x0000 //RX_FDEQ_BIN_16 +80 0x0000 //RX_FDEQ_BIN_17 +81 0x0000 //RX_FDEQ_BIN_18 +82 0x0000 //RX_FDEQ_BIN_19 +83 0x0000 //RX_FDEQ_BIN_20 +84 0x0000 //RX_FDEQ_BIN_21 +85 0x0000 //RX_FDEQ_BIN_22 +86 0x0000 //RX_FDEQ_BIN_23 +87 0x4000 //RX_FDEQ_RESRV_0 +88 0x0320 //RX_FDEQ_RESRV_1 +89 0x0018 //RX_FDDRC_BAND_MARGIN_0 +90 0x0030 //RX_FDDRC_BAND_MARGIN_1 +91 0x0050 //RX_FDDRC_BAND_MARGIN_2 +92 0x0080 //RX_FDDRC_BAND_MARGIN_3 +93 0x0007 //RX_FDDRC_BLOCK_EXP +94 0x5000 //RX_FDDRC_THRD_2_0 +95 0x5000 //RX_FDDRC_THRD_2_1 +96 0x5000 //RX_FDDRC_THRD_2_2 +97 0x5000 //RX_FDDRC_THRD_2_3 +98 0x6400 //RX_FDDRC_THRD_3_0 +99 0x6400 //RX_FDDRC_THRD_3_1 +100 0x6400 //RX_FDDRC_THRD_3_2 +101 0x6400 //RX_FDDRC_THRD_3_3 +102 0x2000 //RX_FDDRC_SLANT_0_0 +103 0x2000 //RX_FDDRC_SLANT_0_1 +104 0x2000 //RX_FDDRC_SLANT_0_2 +105 0x2000 //RX_FDDRC_SLANT_0_3 +106 0x5333 //RX_FDDRC_SLANT_1_0 +107 0x5333 //RX_FDDRC_SLANT_1_1 +108 0x5333 //RX_FDDRC_SLANT_1_2 +109 0x5333 //RX_FDDRC_SLANT_1_3 +110 0x0000 //RX_FDDRC_RESRV_0 +129 0x0074 //RX_SPK_VOL +130 0x0000 //RX_VOL_RESRV_0 +#VOL 6 +6 0x1000 //RX_TDDRC_ALPHA_UP_1 +7 0x1000 //RX_TDDRC_ALPHA_UP_2 +8 0x1000 //RX_TDDRC_ALPHA_UP_3 +9 0x1000 //RX_TDDRC_ALPHA_UP_4 +27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +33 0x7000 //RX_TDDRC_LIMITER_THRD +34 0x0800 //RX_TDDRC_LIMITER_GAIN +112 0x0000 //RX_TDDRC_THRD_0 +113 0x0000 //RX_TDDRC_THRD_1 +114 0x1800 //RX_TDDRC_THRD_2 +115 0x1800 //RX_TDDRC_THRD_3 +116 0x3000 //RX_TDDRC_SLANT_0 +117 0x6E00 //RX_TDDRC_SLANT_1 +118 0x1000 //RX_TDDRC_ALPHA_UP_0 +119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +120 0x0000 //RX_TDDRC_HMNC_FLAG +121 0x199A //RX_TDDRC_HMNC_GAIN +122 0x0001 //RX_TDDRC_SMT_FLAG +123 0x0CCD //RX_TDDRC_SMT_W +124 0x055F //RX_TDDRC_DRC_GAIN +38 0x0014 //RX_FDEQ_SUBNUM +39 0x4840 //RX_FDEQ_GAIN_0 +40 0x3E40 //RX_FDEQ_GAIN_1 +41 0x4D5A //RX_FDEQ_GAIN_2 +42 0x606C //RX_FDEQ_GAIN_3 +43 0x767C //RX_FDEQ_GAIN_4 +44 0x7876 //RX_FDEQ_GAIN_5 +45 0x7878 //RX_FDEQ_GAIN_6 +46 0x797C //RX_FDEQ_GAIN_7 +47 0x7E82 //RX_FDEQ_GAIN_8 +48 0x7C80 //RX_FDEQ_GAIN_9 +49 0x4848 //RX_FDEQ_GAIN_10 +50 0x4848 //RX_FDEQ_GAIN_11 +51 0x4848 //RX_FDEQ_GAIN_12 +52 0x4848 //RX_FDEQ_GAIN_13 +53 0x4848 //RX_FDEQ_GAIN_14 +54 0x4848 //RX_FDEQ_GAIN_15 +55 0x4848 //RX_FDEQ_GAIN_16 +56 0x4848 //RX_FDEQ_GAIN_17 +57 0x4848 //RX_FDEQ_GAIN_18 +58 0x4848 //RX_FDEQ_GAIN_19 +59 0x4848 //RX_FDEQ_GAIN_20 +60 0x4848 //RX_FDEQ_GAIN_21 +61 0x4848 //RX_FDEQ_GAIN_22 +62 0x4848 //RX_FDEQ_GAIN_23 +63 0x0202 //RX_FDEQ_BIN_0 +64 0x0204 //RX_FDEQ_BIN_1 +65 0x0203 //RX_FDEQ_BIN_2 +66 0x0304 //RX_FDEQ_BIN_3 +67 0x0405 //RX_FDEQ_BIN_4 +68 0x0506 //RX_FDEQ_BIN_5 +69 0x0708 //RX_FDEQ_BIN_6 +70 0x090A //RX_FDEQ_BIN_7 +71 0x0B0C //RX_FDEQ_BIN_8 +72 0x0D08 //RX_FDEQ_BIN_9 +73 0x0000 //RX_FDEQ_BIN_10 +74 0x0000 //RX_FDEQ_BIN_11 +75 0x0000 //RX_FDEQ_BIN_12 +76 0x0000 //RX_FDEQ_BIN_13 +77 0x0000 //RX_FDEQ_BIN_14 +78 0x0000 //RX_FDEQ_BIN_15 +79 0x0000 //RX_FDEQ_BIN_16 +80 0x0000 //RX_FDEQ_BIN_17 +81 0x0000 //RX_FDEQ_BIN_18 +82 0x0000 //RX_FDEQ_BIN_19 +83 0x0000 //RX_FDEQ_BIN_20 +84 0x0000 //RX_FDEQ_BIN_21 +85 0x0000 //RX_FDEQ_BIN_22 +86 0x0000 //RX_FDEQ_BIN_23 +87 0x4000 //RX_FDEQ_RESRV_0 +88 0x0320 //RX_FDEQ_RESRV_1 +89 0x0018 //RX_FDDRC_BAND_MARGIN_0 +90 0x0030 //RX_FDDRC_BAND_MARGIN_1 +91 0x0050 //RX_FDDRC_BAND_MARGIN_2 +92 0x0080 //RX_FDDRC_BAND_MARGIN_3 +93 0x0007 //RX_FDDRC_BLOCK_EXP +94 0x5000 //RX_FDDRC_THRD_2_0 +95 0x5000 //RX_FDDRC_THRD_2_1 +96 0x5000 //RX_FDDRC_THRD_2_2 +97 0x5000 //RX_FDDRC_THRD_2_3 +98 0x6400 //RX_FDDRC_THRD_3_0 +99 0x6400 //RX_FDDRC_THRD_3_1 +100 0x6400 //RX_FDDRC_THRD_3_2 +101 0x6400 //RX_FDDRC_THRD_3_3 +102 0x2000 //RX_FDDRC_SLANT_0_0 +103 0x2000 //RX_FDDRC_SLANT_0_1 +104 0x2000 //RX_FDDRC_SLANT_0_2 +105 0x2000 //RX_FDDRC_SLANT_0_3 +106 0x5333 //RX_FDDRC_SLANT_1_0 +107 0x5333 //RX_FDDRC_SLANT_1_1 +108 0x5333 //RX_FDDRC_SLANT_1_2 +109 0x5333 //RX_FDDRC_SLANT_1_3 +110 0x0000 //RX_FDDRC_RESRV_0 +129 0x0100 //RX_SPK_VOL +130 0x0000 //RX_VOL_RESRV_0 +#RX 2 +157 0x003C //RX_RECVFUNC_MODE_0 +158 0x0000 //RX_RECVFUNC_MODE_1 +159 0x0000 //RX_SAMPLINGFREQ_SIG +160 0x0000 //RX_SAMPLINGFREQ_PROC +161 0x000A //RX_FRAME_SZ +162 0x0000 //RX_DELAY_OPT +163 0x1000 //RX_TDDRC_ALPHA_UP_1 +164 0x1000 //RX_TDDRC_ALPHA_UP_2 +165 0x1000 //RX_TDDRC_ALPHA_UP_3 +166 0x1000 //RX_TDDRC_ALPHA_UP_4 +167 0x0600 //RX_PGA +168 0x7FFF //RX_A_HP +169 0x4000 //RX_B_PE +170 0x7800 //RX_THR_PITCH_DET_0 +171 0x7000 //RX_THR_PITCH_DET_1 +172 0x6000 //RX_THR_PITCH_DET_2 +173 0x0008 //RX_PITCH_BFR_LEN +174 0x0003 //RX_SBD_PITCH_DET +175 0x0100 //RX_PP_RESRV_0 +176 0x0020 //RX_PP_RESRV_1 +177 0x0400 //RX_N_SN_EST +178 0x000C //RX_N2_SN_EST +179 0x0014 //RX_NS_LVL_CTRL +180 0xF800 //RX_THR_SN_EST +181 0x7E00 //RX_LAMBDA_PFILT +182 0x000A //RX_FENS_RESRV_0 +183 0x0190 //RX_FENS_RESRV_1 +184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +187 0x0002 //RX_EXTRA_NS_L +188 0x0800 //RX_EXTRA_NS_A +189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +190 0x7000 //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +192 0x199A //RX_A_POST_FLT +193 0x0000 //RX_LMT_THRD +194 0x4000 //RX_LMT_ALPHA +195 0x0014 //RX_FDEQ_SUBNUM +196 0x4840 //RX_FDEQ_GAIN_0 +197 0x3E40 //RX_FDEQ_GAIN_1 +198 0x515E //RX_FDEQ_GAIN_2 +199 0x6470 //RX_FDEQ_GAIN_3 +200 0x7A84 //RX_FDEQ_GAIN_4 +201 0x7C7A //RX_FDEQ_GAIN_5 +202 0x7C7C //RX_FDEQ_GAIN_6 +203 0x7D7C //RX_FDEQ_GAIN_7 +204 0x7E82 //RX_FDEQ_GAIN_8 +205 0x7C80 //RX_FDEQ_GAIN_9 +206 0x4848 //RX_FDEQ_GAIN_10 +207 0x4848 //RX_FDEQ_GAIN_11 +208 0x4848 //RX_FDEQ_GAIN_12 +209 0x4848 //RX_FDEQ_GAIN_13 +210 0x4848 //RX_FDEQ_GAIN_14 +211 0x4848 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0202 //RX_FDEQ_BIN_0 +221 0x0204 //RX_FDEQ_BIN_1 +222 0x0203 //RX_FDEQ_BIN_2 +223 0x0304 //RX_FDEQ_BIN_3 +224 0x0405 //RX_FDEQ_BIN_4 +225 0x0506 //RX_FDEQ_BIN_5 +226 0x0708 //RX_FDEQ_BIN_6 +227 0x090A //RX_FDEQ_BIN_7 +228 0x0B0C //RX_FDEQ_BIN_8 +229 0x0D08 //RX_FDEQ_BIN_9 +230 0x0000 //RX_FDEQ_BIN_10 +231 0x0000 //RX_FDEQ_BIN_11 +232 0x0000 //RX_FDEQ_BIN_12 +233 0x0000 //RX_FDEQ_BIN_13 +234 0x0000 //RX_FDEQ_BIN_14 +235 0x0000 //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x4000 //RX_FDEQ_RESRV_0 +245 0x0320 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0030 //RX_FDDRC_BAND_MARGIN_1 +248 0x0050 //RX_FDDRC_BAND_MARGIN_2 +249 0x0080 //RX_FDDRC_BAND_MARGIN_3 +250 0x0007 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x5000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x6400 //RX_FDDRC_THRD_3_2 +258 0x6400 //RX_FDDRC_THRD_3_3 +259 0x2000 //RX_FDDRC_SLANT_0_0 +260 0x2000 //RX_FDDRC_SLANT_0_1 +261 0x2000 //RX_FDDRC_SLANT_0_2 +262 0x2000 //RX_FDDRC_SLANT_0_3 +263 0x5333 //RX_FDDRC_SLANT_1_0 +264 0x5333 //RX_FDDRC_SLANT_1_1 +265 0x5333 //RX_FDDRC_SLANT_1_2 +266 0x5333 //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +268 0x0002 //RX_FILTINDX +269 0x0000 //RX_TDDRC_THRD_0 +270 0x0000 //RX_TDDRC_THRD_1 +271 0x1800 //RX_TDDRC_THRD_2 +272 0x1800 //RX_TDDRC_THRD_3 +273 0x3000 //RX_TDDRC_SLANT_0 +274 0x6E00 //RX_TDDRC_SLANT_1 +275 0x1000 //RX_TDDRC_ALPHA_UP_0 +276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x199A //RX_TDDRC_HMNC_GAIN +279 0x0001 //RX_TDDRC_SMT_FLAG +280 0x0CCD //RX_TDDRC_SMT_W +281 0x055F //RX_TDDRC_DRC_GAIN +282 0x7C00 //RX_LAMBDA_PKA_FP +283 0x13E0 //RX_TPKA_FP +284 0x0080 //RX_MIN_G_FP +285 0x2000 //RX_MAX_G_FP +286 0x000A //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 +288 0x0000 //RX_MAXLEVEL_CNG +289 0x3000 //RX_BWE_UV_TH +290 0x3000 //RX_BWE_UV_TH2 +291 0x1800 //RX_BWE_UV_TH3 +292 0x1000 //RX_BWE_V_TH +293 0x04CD //RX_BWE_GAIN1_V_TH1 +294 0x0F33 //RX_BWE_GAIN1_V_TH2 +295 0x7333 //RX_BWE_UV_EQ +296 0x199A //RX_BWE_V_EQ +297 0x7333 //RX_BWE_TONE_TH +298 0x0004 //RX_BWE_UV_HOLD_T +299 0x6CCD //RX_BWE_GAIN2_ALPHA +300 0x799A //RX_BWE_GAIN3_ALPHA +301 0x001E //RX_BWE_CUTOFF +302 0x3000 //RX_BWE_GAINFILL +303 0x3200 //RX_BWE_MAXTH_TONE +304 0x2000 //RX_BWE_EQ_0 +305 0x2000 //RX_BWE_EQ_1 +306 0x2000 //RX_BWE_EQ_2 +307 0x2000 //RX_BWE_EQ_3 +308 0x2000 //RX_BWE_EQ_4 +309 0x2000 //RX_BWE_EQ_5 +310 0x2000 //RX_BWE_EQ_6 +311 0x0000 //RX_BWE_RESRV_0 +312 0x0000 //RX_BWE_RESRV_1 +313 0x0000 //RX_BWE_RESRV_2 +#VOL 0 +163 0x1000 //RX_TDDRC_ALPHA_UP_1 +164 0x1000 //RX_TDDRC_ALPHA_UP_2 +165 0x1000 //RX_TDDRC_ALPHA_UP_3 +166 0x1000 //RX_TDDRC_ALPHA_UP_4 +184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +190 0x7000 //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +269 0x0000 //RX_TDDRC_THRD_0 +270 0x0000 //RX_TDDRC_THRD_1 +271 0x1800 //RX_TDDRC_THRD_2 +272 0x1800 //RX_TDDRC_THRD_3 +273 0x3000 //RX_TDDRC_SLANT_0 +274 0x6E00 //RX_TDDRC_SLANT_1 +275 0x1000 //RX_TDDRC_ALPHA_UP_0 +276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x199A //RX_TDDRC_HMNC_GAIN +279 0x0001 //RX_TDDRC_SMT_FLAG +280 0x0CCD //RX_TDDRC_SMT_W +281 0x055F //RX_TDDRC_DRC_GAIN +195 0x0014 //RX_FDEQ_SUBNUM +196 0x4840 //RX_FDEQ_GAIN_0 +197 0x3E40 //RX_FDEQ_GAIN_1 +198 0x515E //RX_FDEQ_GAIN_2 +199 0x6470 //RX_FDEQ_GAIN_3 +200 0x7A84 //RX_FDEQ_GAIN_4 +201 0x7C7A //RX_FDEQ_GAIN_5 +202 0x7C7C //RX_FDEQ_GAIN_6 +203 0x7D7C //RX_FDEQ_GAIN_7 +204 0x7E82 //RX_FDEQ_GAIN_8 +205 0x7C80 //RX_FDEQ_GAIN_9 +206 0x4848 //RX_FDEQ_GAIN_10 +207 0x4848 //RX_FDEQ_GAIN_11 +208 0x4848 //RX_FDEQ_GAIN_12 +209 0x4848 //RX_FDEQ_GAIN_13 +210 0x4848 //RX_FDEQ_GAIN_14 +211 0x4848 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0202 //RX_FDEQ_BIN_0 +221 0x0204 //RX_FDEQ_BIN_1 +222 0x0203 //RX_FDEQ_BIN_2 +223 0x0304 //RX_FDEQ_BIN_3 +224 0x0405 //RX_FDEQ_BIN_4 +225 0x0506 //RX_FDEQ_BIN_5 +226 0x0708 //RX_FDEQ_BIN_6 +227 0x090A //RX_FDEQ_BIN_7 +228 0x0B0C //RX_FDEQ_BIN_8 +229 0x0D08 //RX_FDEQ_BIN_9 +230 0x0000 //RX_FDEQ_BIN_10 +231 0x0000 //RX_FDEQ_BIN_11 +232 0x0000 //RX_FDEQ_BIN_12 +233 0x0000 //RX_FDEQ_BIN_13 +234 0x0000 //RX_FDEQ_BIN_14 +235 0x0000 //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x4000 //RX_FDEQ_RESRV_0 +245 0x0320 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0030 //RX_FDDRC_BAND_MARGIN_1 +248 0x0050 //RX_FDDRC_BAND_MARGIN_2 +249 0x0080 //RX_FDDRC_BAND_MARGIN_3 +250 0x0007 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x5000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x6400 //RX_FDDRC_THRD_3_2 +258 0x6400 //RX_FDDRC_THRD_3_3 +259 0x2000 //RX_FDDRC_SLANT_0_0 +260 0x2000 //RX_FDDRC_SLANT_0_1 +261 0x2000 //RX_FDDRC_SLANT_0_2 +262 0x2000 //RX_FDDRC_SLANT_0_3 +263 0x5333 //RX_FDDRC_SLANT_1_0 +264 0x5333 //RX_FDDRC_SLANT_1_1 +265 0x5333 //RX_FDDRC_SLANT_1_2 +266 0x5333 //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +286 0x000A //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 +#VOL 1 +163 0x1000 //RX_TDDRC_ALPHA_UP_1 +164 0x1000 //RX_TDDRC_ALPHA_UP_2 +165 0x1000 //RX_TDDRC_ALPHA_UP_3 +166 0x1000 //RX_TDDRC_ALPHA_UP_4 +184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +190 0x7000 //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +269 0x0000 //RX_TDDRC_THRD_0 +270 0x0000 //RX_TDDRC_THRD_1 +271 0x1800 //RX_TDDRC_THRD_2 +272 0x1800 //RX_TDDRC_THRD_3 +273 0x3000 //RX_TDDRC_SLANT_0 +274 0x6E00 //RX_TDDRC_SLANT_1 +275 0x1000 //RX_TDDRC_ALPHA_UP_0 +276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x199A //RX_TDDRC_HMNC_GAIN +279 0x0001 //RX_TDDRC_SMT_FLAG +280 0x0CCD //RX_TDDRC_SMT_W +281 0x055F //RX_TDDRC_DRC_GAIN +195 0x0014 //RX_FDEQ_SUBNUM +196 0x4840 //RX_FDEQ_GAIN_0 +197 0x3E40 //RX_FDEQ_GAIN_1 +198 0x515E //RX_FDEQ_GAIN_2 +199 0x6470 //RX_FDEQ_GAIN_3 +200 0x7A84 //RX_FDEQ_GAIN_4 +201 0x7C7A //RX_FDEQ_GAIN_5 +202 0x7C7C //RX_FDEQ_GAIN_6 +203 0x7D7C //RX_FDEQ_GAIN_7 +204 0x7E82 //RX_FDEQ_GAIN_8 +205 0x7C80 //RX_FDEQ_GAIN_9 +206 0x4848 //RX_FDEQ_GAIN_10 +207 0x4848 //RX_FDEQ_GAIN_11 +208 0x4848 //RX_FDEQ_GAIN_12 +209 0x4848 //RX_FDEQ_GAIN_13 +210 0x4848 //RX_FDEQ_GAIN_14 +211 0x4848 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0202 //RX_FDEQ_BIN_0 +221 0x0204 //RX_FDEQ_BIN_1 +222 0x0203 //RX_FDEQ_BIN_2 +223 0x0304 //RX_FDEQ_BIN_3 +224 0x0405 //RX_FDEQ_BIN_4 +225 0x0506 //RX_FDEQ_BIN_5 +226 0x0708 //RX_FDEQ_BIN_6 +227 0x090A //RX_FDEQ_BIN_7 +228 0x0B0C //RX_FDEQ_BIN_8 +229 0x0D08 //RX_FDEQ_BIN_9 +230 0x0000 //RX_FDEQ_BIN_10 +231 0x0000 //RX_FDEQ_BIN_11 +232 0x0000 //RX_FDEQ_BIN_12 +233 0x0000 //RX_FDEQ_BIN_13 +234 0x0000 //RX_FDEQ_BIN_14 +235 0x0000 //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x4000 //RX_FDEQ_RESRV_0 +245 0x0320 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0030 //RX_FDDRC_BAND_MARGIN_1 +248 0x0050 //RX_FDDRC_BAND_MARGIN_2 +249 0x0080 //RX_FDDRC_BAND_MARGIN_3 +250 0x0007 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x5000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x6400 //RX_FDDRC_THRD_3_2 +258 0x6400 //RX_FDDRC_THRD_3_3 +259 0x2000 //RX_FDDRC_SLANT_0_0 +260 0x2000 //RX_FDDRC_SLANT_0_1 +261 0x2000 //RX_FDDRC_SLANT_0_2 +262 0x2000 //RX_FDDRC_SLANT_0_3 +263 0x5333 //RX_FDDRC_SLANT_1_0 +264 0x5333 //RX_FDDRC_SLANT_1_1 +265 0x5333 //RX_FDDRC_SLANT_1_2 +266 0x5333 //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +286 0x0010 //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 +#VOL 2 +163 0x1000 //RX_TDDRC_ALPHA_UP_1 +164 0x1000 //RX_TDDRC_ALPHA_UP_2 +165 0x1000 //RX_TDDRC_ALPHA_UP_3 +166 0x1000 //RX_TDDRC_ALPHA_UP_4 +184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +190 0x7000 //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +269 0x0000 //RX_TDDRC_THRD_0 +270 0x0000 //RX_TDDRC_THRD_1 +271 0x1800 //RX_TDDRC_THRD_2 +272 0x1800 //RX_TDDRC_THRD_3 +273 0x3000 //RX_TDDRC_SLANT_0 +274 0x6E00 //RX_TDDRC_SLANT_1 +275 0x1000 //RX_TDDRC_ALPHA_UP_0 +276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x199A //RX_TDDRC_HMNC_GAIN +279 0x0001 //RX_TDDRC_SMT_FLAG +280 0x0CCD //RX_TDDRC_SMT_W +281 0x055F //RX_TDDRC_DRC_GAIN +195 0x0014 //RX_FDEQ_SUBNUM +196 0x4840 //RX_FDEQ_GAIN_0 +197 0x3E40 //RX_FDEQ_GAIN_1 +198 0x515E //RX_FDEQ_GAIN_2 +199 0x6470 //RX_FDEQ_GAIN_3 +200 0x7A84 //RX_FDEQ_GAIN_4 +201 0x7C7A //RX_FDEQ_GAIN_5 +202 0x7C7C //RX_FDEQ_GAIN_6 +203 0x7D7C //RX_FDEQ_GAIN_7 +204 0x7E82 //RX_FDEQ_GAIN_8 +205 0x7C80 //RX_FDEQ_GAIN_9 +206 0x4848 //RX_FDEQ_GAIN_10 +207 0x4848 //RX_FDEQ_GAIN_11 +208 0x4848 //RX_FDEQ_GAIN_12 +209 0x4848 //RX_FDEQ_GAIN_13 +210 0x4848 //RX_FDEQ_GAIN_14 +211 0x4848 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0202 //RX_FDEQ_BIN_0 +221 0x0204 //RX_FDEQ_BIN_1 +222 0x0203 //RX_FDEQ_BIN_2 +223 0x0304 //RX_FDEQ_BIN_3 +224 0x0405 //RX_FDEQ_BIN_4 +225 0x0506 //RX_FDEQ_BIN_5 +226 0x0708 //RX_FDEQ_BIN_6 +227 0x090A //RX_FDEQ_BIN_7 +228 0x0B0C //RX_FDEQ_BIN_8 +229 0x0D08 //RX_FDEQ_BIN_9 +230 0x0000 //RX_FDEQ_BIN_10 +231 0x0000 //RX_FDEQ_BIN_11 +232 0x0000 //RX_FDEQ_BIN_12 +233 0x0000 //RX_FDEQ_BIN_13 +234 0x0000 //RX_FDEQ_BIN_14 +235 0x0000 //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x4000 //RX_FDEQ_RESRV_0 +245 0x0320 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0030 //RX_FDDRC_BAND_MARGIN_1 +248 0x0050 //RX_FDDRC_BAND_MARGIN_2 +249 0x0080 //RX_FDDRC_BAND_MARGIN_3 +250 0x0007 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x5000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x6400 //RX_FDDRC_THRD_3_2 +258 0x6400 //RX_FDDRC_THRD_3_3 +259 0x2000 //RX_FDDRC_SLANT_0_0 +260 0x2000 //RX_FDDRC_SLANT_0_1 +261 0x2000 //RX_FDDRC_SLANT_0_2 +262 0x2000 //RX_FDDRC_SLANT_0_3 +263 0x5333 //RX_FDDRC_SLANT_1_0 +264 0x5333 //RX_FDDRC_SLANT_1_1 +265 0x5333 //RX_FDDRC_SLANT_1_2 +266 0x5333 //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +286 0x001A //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 +#VOL 3 +163 0x1000 //RX_TDDRC_ALPHA_UP_1 +164 0x1000 //RX_TDDRC_ALPHA_UP_2 +165 0x1000 //RX_TDDRC_ALPHA_UP_3 +166 0x1000 //RX_TDDRC_ALPHA_UP_4 +184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +190 0x7000 //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +269 0x0000 //RX_TDDRC_THRD_0 +270 0x0000 //RX_TDDRC_THRD_1 +271 0x1800 //RX_TDDRC_THRD_2 +272 0x1800 //RX_TDDRC_THRD_3 +273 0x3000 //RX_TDDRC_SLANT_0 +274 0x6E00 //RX_TDDRC_SLANT_1 +275 0x1000 //RX_TDDRC_ALPHA_UP_0 +276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x199A //RX_TDDRC_HMNC_GAIN +279 0x0001 //RX_TDDRC_SMT_FLAG +280 0x0CCD //RX_TDDRC_SMT_W +281 0x055F //RX_TDDRC_DRC_GAIN +195 0x0014 //RX_FDEQ_SUBNUM +196 0x4840 //RX_FDEQ_GAIN_0 +197 0x3E40 //RX_FDEQ_GAIN_1 +198 0x515E //RX_FDEQ_GAIN_2 +199 0x6470 //RX_FDEQ_GAIN_3 +200 0x7A84 //RX_FDEQ_GAIN_4 +201 0x7C7A //RX_FDEQ_GAIN_5 +202 0x7C7C //RX_FDEQ_GAIN_6 +203 0x7D7C //RX_FDEQ_GAIN_7 +204 0x7E82 //RX_FDEQ_GAIN_8 +205 0x7C80 //RX_FDEQ_GAIN_9 +206 0x4848 //RX_FDEQ_GAIN_10 +207 0x4848 //RX_FDEQ_GAIN_11 +208 0x4848 //RX_FDEQ_GAIN_12 +209 0x4848 //RX_FDEQ_GAIN_13 +210 0x4848 //RX_FDEQ_GAIN_14 +211 0x4848 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0202 //RX_FDEQ_BIN_0 +221 0x0204 //RX_FDEQ_BIN_1 +222 0x0203 //RX_FDEQ_BIN_2 +223 0x0304 //RX_FDEQ_BIN_3 +224 0x0405 //RX_FDEQ_BIN_4 +225 0x0506 //RX_FDEQ_BIN_5 +226 0x0708 //RX_FDEQ_BIN_6 +227 0x090A //RX_FDEQ_BIN_7 +228 0x0B0C //RX_FDEQ_BIN_8 +229 0x0D08 //RX_FDEQ_BIN_9 +230 0x0000 //RX_FDEQ_BIN_10 +231 0x0000 //RX_FDEQ_BIN_11 +232 0x0000 //RX_FDEQ_BIN_12 +233 0x0000 //RX_FDEQ_BIN_13 +234 0x0000 //RX_FDEQ_BIN_14 +235 0x0000 //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x4000 //RX_FDEQ_RESRV_0 +245 0x0320 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0030 //RX_FDDRC_BAND_MARGIN_1 +248 0x0050 //RX_FDDRC_BAND_MARGIN_2 +249 0x0080 //RX_FDDRC_BAND_MARGIN_3 +250 0x0007 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x5000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x6400 //RX_FDDRC_THRD_3_2 +258 0x6400 //RX_FDDRC_THRD_3_3 +259 0x2000 //RX_FDDRC_SLANT_0_0 +260 0x2000 //RX_FDDRC_SLANT_0_1 +261 0x2000 //RX_FDDRC_SLANT_0_2 +262 0x2000 //RX_FDDRC_SLANT_0_3 +263 0x5333 //RX_FDDRC_SLANT_1_0 +264 0x5333 //RX_FDDRC_SLANT_1_1 +265 0x5333 //RX_FDDRC_SLANT_1_2 +266 0x5333 //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +286 0x0034 //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 +#VOL 4 +163 0x1000 //RX_TDDRC_ALPHA_UP_1 +164 0x1000 //RX_TDDRC_ALPHA_UP_2 +165 0x1000 //RX_TDDRC_ALPHA_UP_3 +166 0x1000 //RX_TDDRC_ALPHA_UP_4 +184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +190 0x7000 //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +269 0x0000 //RX_TDDRC_THRD_0 +270 0x0000 //RX_TDDRC_THRD_1 +271 0x1800 //RX_TDDRC_THRD_2 +272 0x1800 //RX_TDDRC_THRD_3 +273 0x3000 //RX_TDDRC_SLANT_0 +274 0x6E00 //RX_TDDRC_SLANT_1 +275 0x1000 //RX_TDDRC_ALPHA_UP_0 +276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x199A //RX_TDDRC_HMNC_GAIN +279 0x0001 //RX_TDDRC_SMT_FLAG +280 0x0CCD //RX_TDDRC_SMT_W +281 0x055F //RX_TDDRC_DRC_GAIN +195 0x0014 //RX_FDEQ_SUBNUM +196 0x4840 //RX_FDEQ_GAIN_0 +197 0x3E40 //RX_FDEQ_GAIN_1 +198 0x515E //RX_FDEQ_GAIN_2 +199 0x6470 //RX_FDEQ_GAIN_3 +200 0x7A84 //RX_FDEQ_GAIN_4 +201 0x7C7A //RX_FDEQ_GAIN_5 +202 0x7C7C //RX_FDEQ_GAIN_6 +203 0x7D7C //RX_FDEQ_GAIN_7 +204 0x7E82 //RX_FDEQ_GAIN_8 +205 0x7C80 //RX_FDEQ_GAIN_9 +206 0x4848 //RX_FDEQ_GAIN_10 +207 0x4848 //RX_FDEQ_GAIN_11 +208 0x4848 //RX_FDEQ_GAIN_12 +209 0x4848 //RX_FDEQ_GAIN_13 +210 0x4848 //RX_FDEQ_GAIN_14 +211 0x4848 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0202 //RX_FDEQ_BIN_0 +221 0x0204 //RX_FDEQ_BIN_1 +222 0x0203 //RX_FDEQ_BIN_2 +223 0x0304 //RX_FDEQ_BIN_3 +224 0x0405 //RX_FDEQ_BIN_4 +225 0x0506 //RX_FDEQ_BIN_5 +226 0x0708 //RX_FDEQ_BIN_6 +227 0x090A //RX_FDEQ_BIN_7 +228 0x0B0C //RX_FDEQ_BIN_8 +229 0x0D08 //RX_FDEQ_BIN_9 +230 0x0000 //RX_FDEQ_BIN_10 +231 0x0000 //RX_FDEQ_BIN_11 +232 0x0000 //RX_FDEQ_BIN_12 +233 0x0000 //RX_FDEQ_BIN_13 +234 0x0000 //RX_FDEQ_BIN_14 +235 0x0000 //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x4000 //RX_FDEQ_RESRV_0 +245 0x0320 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0030 //RX_FDDRC_BAND_MARGIN_1 +248 0x0050 //RX_FDDRC_BAND_MARGIN_2 +249 0x0080 //RX_FDDRC_BAND_MARGIN_3 +250 0x0007 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x5000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x6400 //RX_FDDRC_THRD_3_2 +258 0x6400 //RX_FDDRC_THRD_3_3 +259 0x2000 //RX_FDDRC_SLANT_0_0 +260 0x2000 //RX_FDDRC_SLANT_0_1 +261 0x2000 //RX_FDDRC_SLANT_0_2 +262 0x2000 //RX_FDDRC_SLANT_0_3 +263 0x5333 //RX_FDDRC_SLANT_1_0 +264 0x5333 //RX_FDDRC_SLANT_1_1 +265 0x5333 //RX_FDDRC_SLANT_1_2 +266 0x5333 //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +286 0x0045 //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 +#VOL 5 +163 0x1000 //RX_TDDRC_ALPHA_UP_1 +164 0x1000 //RX_TDDRC_ALPHA_UP_2 +165 0x1000 //RX_TDDRC_ALPHA_UP_3 +166 0x1000 //RX_TDDRC_ALPHA_UP_4 +184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +190 0x7000 //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +269 0x0000 //RX_TDDRC_THRD_0 +270 0x0000 //RX_TDDRC_THRD_1 +271 0x1800 //RX_TDDRC_THRD_2 +272 0x1800 //RX_TDDRC_THRD_3 +273 0x3000 //RX_TDDRC_SLANT_0 +274 0x6E00 //RX_TDDRC_SLANT_1 +275 0x1000 //RX_TDDRC_ALPHA_UP_0 +276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x199A //RX_TDDRC_HMNC_GAIN +279 0x0001 //RX_TDDRC_SMT_FLAG +280 0x0CCD //RX_TDDRC_SMT_W +281 0x055F //RX_TDDRC_DRC_GAIN +195 0x0014 //RX_FDEQ_SUBNUM +196 0x4840 //RX_FDEQ_GAIN_0 +197 0x3E40 //RX_FDEQ_GAIN_1 +198 0x515E //RX_FDEQ_GAIN_2 +199 0x6470 //RX_FDEQ_GAIN_3 +200 0x7A84 //RX_FDEQ_GAIN_4 +201 0x7C7A //RX_FDEQ_GAIN_5 +202 0x7C7C //RX_FDEQ_GAIN_6 +203 0x7D7C //RX_FDEQ_GAIN_7 +204 0x7E82 //RX_FDEQ_GAIN_8 +205 0x7C80 //RX_FDEQ_GAIN_9 +206 0x4848 //RX_FDEQ_GAIN_10 +207 0x4848 //RX_FDEQ_GAIN_11 +208 0x4848 //RX_FDEQ_GAIN_12 +209 0x4848 //RX_FDEQ_GAIN_13 +210 0x4848 //RX_FDEQ_GAIN_14 +211 0x4848 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0202 //RX_FDEQ_BIN_0 +221 0x0204 //RX_FDEQ_BIN_1 +222 0x0203 //RX_FDEQ_BIN_2 +223 0x0304 //RX_FDEQ_BIN_3 +224 0x0405 //RX_FDEQ_BIN_4 +225 0x0506 //RX_FDEQ_BIN_5 +226 0x0708 //RX_FDEQ_BIN_6 +227 0x090A //RX_FDEQ_BIN_7 +228 0x0B0C //RX_FDEQ_BIN_8 +229 0x0D08 //RX_FDEQ_BIN_9 +230 0x0000 //RX_FDEQ_BIN_10 +231 0x0000 //RX_FDEQ_BIN_11 +232 0x0000 //RX_FDEQ_BIN_12 +233 0x0000 //RX_FDEQ_BIN_13 +234 0x0000 //RX_FDEQ_BIN_14 +235 0x0000 //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x4000 //RX_FDEQ_RESRV_0 +245 0x0320 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0030 //RX_FDDRC_BAND_MARGIN_1 +248 0x0050 //RX_FDDRC_BAND_MARGIN_2 +249 0x0080 //RX_FDDRC_BAND_MARGIN_3 +250 0x0007 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x5000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x6400 //RX_FDDRC_THRD_3_2 +258 0x6400 //RX_FDDRC_THRD_3_3 +259 0x2000 //RX_FDDRC_SLANT_0_0 +260 0x2000 //RX_FDDRC_SLANT_0_1 +261 0x2000 //RX_FDDRC_SLANT_0_2 +262 0x2000 //RX_FDDRC_SLANT_0_3 +263 0x5333 //RX_FDDRC_SLANT_1_0 +264 0x5333 //RX_FDDRC_SLANT_1_1 +265 0x5333 //RX_FDDRC_SLANT_1_2 +266 0x5333 //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +286 0x0074 //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 +#VOL 6 +163 0x1000 //RX_TDDRC_ALPHA_UP_1 +164 0x1000 //RX_TDDRC_ALPHA_UP_2 +165 0x1000 //RX_TDDRC_ALPHA_UP_3 +166 0x1000 //RX_TDDRC_ALPHA_UP_4 +184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +190 0x7000 //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +269 0x0000 //RX_TDDRC_THRD_0 +270 0x0000 //RX_TDDRC_THRD_1 +271 0x1800 //RX_TDDRC_THRD_2 +272 0x1800 //RX_TDDRC_THRD_3 +273 0x3000 //RX_TDDRC_SLANT_0 +274 0x6E00 //RX_TDDRC_SLANT_1 +275 0x1000 //RX_TDDRC_ALPHA_UP_0 +276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x199A //RX_TDDRC_HMNC_GAIN +279 0x0001 //RX_TDDRC_SMT_FLAG +280 0x0CCD //RX_TDDRC_SMT_W +281 0x055F //RX_TDDRC_DRC_GAIN +195 0x0014 //RX_FDEQ_SUBNUM +196 0x4840 //RX_FDEQ_GAIN_0 +197 0x3E40 //RX_FDEQ_GAIN_1 +198 0x515E //RX_FDEQ_GAIN_2 +199 0x6470 //RX_FDEQ_GAIN_3 +200 0x7A84 //RX_FDEQ_GAIN_4 +201 0x7C7A //RX_FDEQ_GAIN_5 +202 0x7C7C //RX_FDEQ_GAIN_6 +203 0x7D7C //RX_FDEQ_GAIN_7 +204 0x7E82 //RX_FDEQ_GAIN_8 +205 0x7C80 //RX_FDEQ_GAIN_9 +206 0x4848 //RX_FDEQ_GAIN_10 +207 0x4848 //RX_FDEQ_GAIN_11 +208 0x4848 //RX_FDEQ_GAIN_12 +209 0x4848 //RX_FDEQ_GAIN_13 +210 0x4848 //RX_FDEQ_GAIN_14 +211 0x4848 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0202 //RX_FDEQ_BIN_0 +221 0x0204 //RX_FDEQ_BIN_1 +222 0x0203 //RX_FDEQ_BIN_2 +223 0x0304 //RX_FDEQ_BIN_3 +224 0x0405 //RX_FDEQ_BIN_4 +225 0x0506 //RX_FDEQ_BIN_5 +226 0x0708 //RX_FDEQ_BIN_6 +227 0x090A //RX_FDEQ_BIN_7 +228 0x0B0C //RX_FDEQ_BIN_8 +229 0x0D08 //RX_FDEQ_BIN_9 +230 0x0000 //RX_FDEQ_BIN_10 +231 0x0000 //RX_FDEQ_BIN_11 +232 0x0000 //RX_FDEQ_BIN_12 +233 0x0000 //RX_FDEQ_BIN_13 +234 0x0000 //RX_FDEQ_BIN_14 +235 0x0000 //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x4000 //RX_FDEQ_RESRV_0 +245 0x0320 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0030 //RX_FDDRC_BAND_MARGIN_1 +248 0x0050 //RX_FDDRC_BAND_MARGIN_2 +249 0x0080 //RX_FDDRC_BAND_MARGIN_3 +250 0x0007 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x5000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x6400 //RX_FDDRC_THRD_3_2 +258 0x6400 //RX_FDDRC_THRD_3_3 +259 0x2000 //RX_FDDRC_SLANT_0_0 +260 0x2000 //RX_FDDRC_SLANT_0_1 +261 0x2000 //RX_FDDRC_SLANT_0_2 +262 0x2000 //RX_FDDRC_SLANT_0_3 +263 0x5333 //RX_FDDRC_SLANT_1_0 +264 0x5333 //RX_FDDRC_SLANT_1_1 +265 0x5333 //RX_FDDRC_SLANT_1_2 +266 0x5333 //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +286 0x0100 //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 + +#CASE_NAME HANDSET-HANDSET-TMOBILE_US-WB +#PARAM_MODE Full +#PARAM_TYPE TX+2RX +#TOTAL_CUSTOM_STEP 7+7 +#TX +0 0x0000 //TX_OPERATION_MODE_0 +1 0x0000 //TX_OPERATION_MODE_1 +2 0x0036 //TX_PATCH_REG +3 0x2F7E //TX_SENDFUNC_MODE_0 +4 0x0001 //TX_SENDFUNC_MODE_1 +5 0x0002 //TX_NUM_MIC +6 0x0001 //TX_SAMPLINGFREQ_SIG +7 0x0001 //TX_SAMPLINGFREQ_PROC +8 0x000A //TX_FRAME_SZ_SIG +9 0x000A //TX_FRAME_SZ +10 0x0000 //TX_DELAY_OPT +11 0x0028 //TX_MAX_TAIL_LENGTH +12 0x0001 //TX_NUM_LOUTCHN +13 0x0001 //TX_MAXNUM_AECREF +14 0x0000 //TX_DBG_FUNC_REG +15 0x0000 //TX_DBG_FUNC_REG1 +16 0x0000 //TX_SYS_RESRV_0 +17 0x0000 //TX_SYS_RESRV_1 +18 0x0000 //TX_SYS_RESRV_2 +19 0x0000 //TX_SYS_RESRV_3 +20 0x0000 //TX_DIST2REF0 +21 0x00A3 //TX_DIST2REF1 +22 0x0000 //TX_DIST2REF_02 +23 0x0000 //TX_DIST2REF_03 +24 0x0000 //TX_DIST2REF_04 +25 0x0000 //TX_DIST2REF_05 +26 0x0000 //TX_MMIC +27 0x1000 //TX_PGA_0 +28 0x1000 //TX_PGA_1 +29 0x1000 //TX_PGA_2 +30 0x0000 //TX_PGA_3 +31 0x0000 //TX_PGA_4 +32 0x0000 //TX_PGA_5 +33 0x0000 //TX_MIC_PAIRS +34 0x0000 //TX_MIC_PAIRS_HS +35 0x0002 //TX_MICS_FOR_BF +36 0x0000 //TX_MIC_PAIRS_FORL1 +37 0x0002 //TX_MICS_OF_PAIR0 +38 0x0002 //TX_MICS_OF_PAIR1 +39 0x0002 //TX_MICS_OF_PAIR2 +40 0x0002 //TX_MICS_OF_PAIR3 +41 0x0000 //TX_MIC_DATA_SRC0 +42 0x0002 //TX_MIC_DATA_SRC1 +43 0x0001 //TX_MIC_DATA_SRC2 +44 0x0000 //TX_MIC_DATA_SRC3 +45 0x0000 //TX_MIC_PAIR_CH_04 +46 0x0000 //TX_MIC_PAIR_CH_05 +47 0x0000 //TX_MIC_PAIR_CH_10 +48 0x0000 //TX_MIC_PAIR_CH_11 +49 0x0000 //TX_MIC_PAIR_CH_12 +50 0x0000 //TX_MIC_PAIR_CH_13 +51 0x0000 //TX_MIC_PAIR_CH_14 +52 0x05DC //TX_HD_BIN_MASK +53 0x0010 //TX_HD_SUBAND_MASK +54 0x19A1 //TX_HD_FRAME_AVG_MASK +55 0x0320 //TX_HD_MIN_FRQ +56 0x1000 //TX_HD_ALPHA_PSD +57 0x1100 //TX_T_PHPR1 +58 0x0000 //TX_T_PHPR2 +59 0x0000 //TX_T_PTPR +60 0x0000 //TX_T_PNPR +61 0x0000 //TX_T_PAPR1 +62 0xEE6C //TX_T_PSDVAT +63 0x0800 //TX_CNT +64 0x4000 //TX_ANTI_HOWL_GAIN +65 0x0001 //TX_MICFORBFMARK_0 +66 0x0001 //TX_MICFORBFMARK_1 +67 0x0001 //TX_MICFORBFMARK_2 +68 0x0001 //TX_MICFORBFMARK_3 +69 0x0001 //TX_MICFORBFMARK_4 +70 0x0001 //TX_MICFORBFMARK_5 +71 0x0000 //TX_DIST2REF_10 +72 0x3A66 //TX_DIST2REF_11 +73 0x0000 //TX_DIST2REF2 +74 0x0000 //TX_DIST2REF_13 +75 0x0000 //TX_DIST2REF_14 +76 0x0000 //TX_DIST2REF_15 +77 0x0000 //TX_DIST2REF_20 +78 0x0000 //TX_DIST2REF_21 +79 0x0000 //TX_DIST2REF_22 +80 0x0000 //TX_DIST2REF_23 +81 0x0000 //TX_DIST2REF_24 +82 0x0000 //TX_DIST2REF_25 +83 0x0000 //TX_DIST2REF_30 +84 0x0000 //TX_DIST2REF_31 +85 0x0000 //TX_DIST2REF_32 +86 0x0000 //TX_DIST2REF_33 +87 0x0000 //TX_DIST2REF_34 +88 0x0000 //TX_DIST2REF_35 +89 0x0000 //TX_MIC_LOC_00 +90 0x0000 //TX_MIC_LOC_01 +91 0x0000 //TX_MIC_LOC_02 +92 0x0000 //TX_MIC_LOC_03 +93 0x0000 //TX_MIC_LOC_04 +94 0x0000 //TX_MIC_LOC_05 +95 0x0000 //TX_MIC_LOC_10 +96 0x0000 //TX_MIC_LOC_11 +97 0x0000 //TX_MIC_LOC_12 +98 0x0000 //TX_MIC_LOC_13 +99 0x0000 //TX_MIC_LOC_14 +100 0x0000 //TX_MIC_LOC_15 +101 0x0000 //TX_MIC_LOC_20 +102 0x0000 //TX_MIC_LOC_21 +103 0x0000 //TX_MIC_LOC_22 +104 0x0000 //TX_MIC_LOC_23 +105 0x0000 //TX_MIC_LOC_24 +106 0x0000 //TX_MIC_LOC_25 +107 0x0800 //TX_MIC_REFBLK_VOLUME +108 0x0AAC //TX_MIC_BLOCK_VOLUME +109 0x0000 //TX_INVERSE_MASK +110 0x0000 //TX_ADCS_MASK +111 0x04D0 //TX_ADCS_GAIN +112 0x4000 //TX_NFC_GAINFAC +113 0x0000 //TX_MAINMIC_BLKFACTOR +114 0x0000 //TX_REFMIC_BLKFACTOR +115 0x0000 //TX_BLMIC_BLKFACTOR +116 0x0000 //TX_BRMIC_BLKFACTOR +117 0x0031 //TX_MICBLK_START_BIN +118 0x0060 //TX_MICBLK_END_BIN +119 0x0015 //TX_MICBLK_FE_HOLD +120 0xFFF2 //TX_MICBLK_MR_EXP_TH +121 0xFFF2 //TX_MICBLK_LR_EXP_TH +122 0x0000 //TX_FENE_HOLD +123 0x4000 //TX_FE_ENER_TH_MTS +124 0x0004 //TX_FE_ENER_TH_EXP +125 0x6000 //TX_C_POST_FLT_MIC_MAINBLK +126 0x6000 //TX_C_POST_FLT_MIC_REFBLK +127 0x0010 //TX_MIC_BLOCK_N +128 0x7B02 //TX_A_HP +129 0x4000 //TX_B_PE +130 0x1800 //TX_THR_PITCH_DET_0 +131 0x1000 //TX_THR_PITCH_DET_1 +132 0x0800 //TX_THR_PITCH_DET_2 +133 0x0008 //TX_PITCH_BFR_LEN +134 0x0003 //TX_SBD_PITCH_DET +135 0x0050 //TX_TD_AEC_L +136 0x4000 //TX_MU0_UNP_TD_AEC +137 0x1000 //TX_MU0_PTD_TD_AEC +138 0x0000 //TX_PP_RESRV_0 +139 0x2A94 //TX_PP_RESRV_1 +140 0x55F0 //TX_PP_RESRV_2 +141 0x0000 //TX_PP_RESRV_3 +142 0x0000 //TX_PP_RESRV_4 +143 0x0000 //TX_PP_RESRV_5 +144 0x0000 //TX_PP_RESRV_6 +145 0x0000 //TX_PP_RESRV_7 +146 0x0028 //TX_TAIL_LENGTH +147 0x0800 //TX_AEC_REF_GAIN_0 +148 0x0800 //TX_AEC_REF_GAIN_1 +149 0x0800 //TX_AEC_REF_GAIN_2 +150 0x6000 //TX_EAD_THR +151 0x2000 //TX_THR_RE_EST +152 0x0100 //TX_MIN_EQ_RE_EST_0 +153 0x0100 //TX_MIN_EQ_RE_EST_1 +154 0x0100 //TX_MIN_EQ_RE_EST_2 +155 0x0200 //TX_MIN_EQ_RE_EST_3 +156 0x0200 //TX_MIN_EQ_RE_EST_4 +157 0x0200 //TX_MIN_EQ_RE_EST_5 +158 0x0200 //TX_MIN_EQ_RE_EST_6 +159 0x0200 //TX_MIN_EQ_RE_EST_7 +160 0x1000 //TX_MIN_EQ_RE_EST_8 +161 0x1000 //TX_MIN_EQ_RE_EST_9 +162 0x1000 //TX_MIN_EQ_RE_EST_10 +163 0x0400 //TX_MIN_EQ_RE_EST_11 +164 0x1000 //TX_MIN_EQ_RE_EST_12 +165 0x3000 //TX_LAMBDA_RE_EST +166 0x1000 //TX_LAMBDA_CB_NLE +167 0x0400 //TX_C_POST_FLT +168 0x4000 //TX_GAIN_NP +169 0x003C //TX_SE_HOLD_N +170 0x0046 //TX_DT_HOLD_N +171 0x03E8 //TX_DT2_HOLD_N +172 0x6666 //TX_AEC_RESRV_0 +173 0x0000 //TX_AEC_RESRV_1 +174 0x0014 //TX_AEC_RESRV_2 +175 0x0000 //TX_MIC_DELAY_LENGTH +176 0x0000 //TX_REF_DELAY_LENGTH +177 0x0000 //TX_ADD_LINEIN_GAINL +178 0x0000 //TX_ADD_LINEIN_GAINH +179 0x0000 //TX_MIN_EQ_RE_EST_14 +180 0x0000 //TX_DTD_THR1_8 +181 0x7FFF //TX_DTD_THR2_8 +182 0x0000 //TX_DTD_MIC_BLK2 +183 0x0008 //TX_FRQ_LIN_LEN +184 0x7FFF //TX_FRQ_AEC_LEN_RHO +185 0x6000 //TX_MU0_UNP_FRQ_AEC +186 0x4000 //TX_MU0_PTD_FRQ_AEC +187 0x000A //TX_MINENOISETH +188 0x0800 //TX_MU0_RE_EST +189 0x0001 //TX_AEC_NUM_CH +190 0x0000 //TX_BIGECHOATTENUATION_MAX +191 0x2000 //TX_A_POST_FLT_MICBLK +192 0x0000 //TX_BLKENERTH +193 0x0000 //TX_BLKENERHIGHTH +194 0x0000 //TX_NORMENERTH +195 0x0000 //TX_NORMENERHIGHTH +196 0x0000 //TX_NORMENERHIGHTHL +197 0x7000 //TX_DTD_THR1_0 +198 0x7000 //TX_DTD_THR1_1 +199 0x7000 //TX_DTD_THR1_2 +200 0x7F00 //TX_DTD_THR1_3 +201 0x7F00 //TX_DTD_THR1_4 +202 0x7F00 //TX_DTD_THR1_5 +203 0x7F00 //TX_DTD_THR1_6 +204 0x2000 //TX_DTD_THR2_0 +205 0x2000 //TX_DTD_THR2_1 +206 0x2000 //TX_DTD_THR2_2 +207 0x1000 //TX_DTD_THR2_3 +208 0x1000 //TX_DTD_THR2_4 +209 0x1000 //TX_DTD_THR2_5 +210 0x1000 //TX_DTD_THR2_6 +211 0x7FFF //TX_DTD_THR3 +212 0x0000 //TX_SPK_CUT_K +213 0x1B58 //TX_DT_CUT_K +214 0x0100 //TX_DT_CUT_THR +215 0x04EB //TX_COMFORT_G +216 0x01F4 //TX_POWER_YOUT_TH +217 0x4000 //TX_FDPFGAINECHO +218 0x0000 //TX_DTD_HD_THR +219 0x0000 //TX_SPK_CUT_K_S +220 0x0000 //TX_DTD_MIC_BLK +221 0x0400 //TX_ADPT_STRICT_L +222 0x0200 //TX_ADPT_STRICT_H +223 0x0000 //TX_RATIO_DT_L_TH_LOW +224 0x0000 //TX_RATIO_DT_H_TH_LOW +225 0x0000 //TX_RATIO_DT_L_TH_HIGH +226 0x0000 //TX_RATIO_DT_H_TH_HIGH +227 0x0000 //TX_RATIO_DT_L0_TH +228 0x2000 //TX_B_POST_FILT_ECHO_L +229 0x2000 //TX_B_POST_FILT_ECHO_H +230 0x0200 //TX_MIN_G_CTRL_ECHO +231 0x7FFF //TX_B_LESSCUT_RTO_ECHO +232 0x0000 //TX_EPD_OFFSET_00 +233 0x0000 //TX_EPD_OFFST_01 +234 0x0000 //TX_RATIO_DT_L0_TH_HIGH +235 0x3A98 //TX_RATIO_DT_H_TH_CUT +236 0x7FFF //TX_MIN_EQ_RE_EST_13 +237 0x0000 //TX_DTD_THR1_7 +238 0x0000 //TX_DTD_THR2_7 +239 0x0800 //TX_DT_RESRV_7 +240 0x0800 //TX_DT_RESRV_8 +241 0x0000 //TX_DT_RESRV_9 +242 0xF600 //TX_THR_SN_EST_0 +243 0xFA00 //TX_THR_SN_EST_1 +244 0xFB00 //TX_THR_SN_EST_2 +245 0xF800 //TX_THR_SN_EST_3 +246 0xFA00 //TX_THR_SN_EST_4 +247 0xF800 //TX_THR_SN_EST_5 +248 0xF800 //TX_THR_SN_EST_6 +249 0xF700 //TX_THR_SN_EST_7 +250 0x0000 //TX_DELTA_THR_SN_EST_0 +251 0x01A0 //TX_DELTA_THR_SN_EST_1 +252 0x0200 //TX_DELTA_THR_SN_EST_2 +253 0x0200 //TX_DELTA_THR_SN_EST_3 +254 0x0100 //TX_DELTA_THR_SN_EST_4 +255 0x0200 //TX_DELTA_THR_SN_EST_5 +256 0x0100 //TX_DELTA_THR_SN_EST_6 +257 0x0200 //TX_DELTA_THR_SN_EST_7 +258 0x4000 //TX_LAMBDA_NN_EST_0 +259 0x5000 //TX_LAMBDA_NN_EST_1 +260 0x4000 //TX_LAMBDA_NN_EST_2 +261 0x4000 //TX_LAMBDA_NN_EST_3 +262 0x4000 //TX_LAMBDA_NN_EST_4 +263 0x4000 //TX_LAMBDA_NN_EST_5 +264 0x4000 //TX_LAMBDA_NN_EST_6 +265 0x4000 //TX_LAMBDA_NN_EST_7 +266 0x0400 //TX_N_SN_EST +267 0x001E //TX_INBEAM_T +268 0x0041 //TX_INBEAMHOLDT +269 0x2000 //TX_G_STRICT +270 0x0000 //TX_EQ_THR_BF +271 0x799A //TX_LAMBDA_EQ_BF +272 0x1000 //TX_NE_RTO_TH +273 0x1000 //TX_NE_RTO_TH_L +274 0x2000 //TX_MAINREFRTOH_TH_H +275 0x1400 //TX_MAINREFRTOH_TH_L +276 0x2000 //TX_MAINREFRTO_TH_H +277 0x1400 //TX_MAINREFRTO_TH_L +278 0x0000 //TX_MAINREFRTO_TH_EQ +279 0x1000 //TX_B_POST_FLT_0 +280 0x4000 //TX_B_POST_FLT_1 +281 0x0018 //TX_NS_LVL_CTRL_0 +282 0x0019 //TX_NS_LVL_CTRL_1 +283 0x0018 //TX_NS_LVL_CTRL_2 +284 0x0019 //TX_NS_LVL_CTRL_3 +285 0x001A //TX_NS_LVL_CTRL_4 +286 0x001E //TX_NS_LVL_CTRL_5 +287 0x001C //TX_NS_LVL_CTRL_6 +288 0x001C //TX_NS_LVL_CTRL_7 +289 0x000E //TX_MIN_GAIN_S_0 +290 0x0012 //TX_MIN_GAIN_S_1 +291 0x0012 //TX_MIN_GAIN_S_2 +292 0x0012 //TX_MIN_GAIN_S_3 +293 0x0018 //TX_MIN_GAIN_S_4 +294 0x0018 //TX_MIN_GAIN_S_5 +295 0x0018 //TX_MIN_GAIN_S_6 +296 0x0018 //TX_MIN_GAIN_S_7 +297 0x5000 //TX_NMOS_SUP +298 0x0000 //TX_NS_MAX_PRI_SNR_TH +299 0x0000 //TX_NMOS_SUP_MENSA +300 0x7FFF //TX_SNRI_SUP_0 +301 0x5000 //TX_SNRI_SUP_1 +302 0x4000 //TX_SNRI_SUP_2 +303 0x4000 //TX_SNRI_SUP_3 +304 0x4000 //TX_SNRI_SUP_4 +305 0x4000 //TX_SNRI_SUP_5 +306 0x4000 //TX_SNRI_SUP_6 +307 0x4000 //TX_SNRI_SUP_7 +308 0x4000 //TX_THR_LFNS +309 0x0018 //TX_G_LFNS +310 0x09C4 //TX_GAIN0_NTH +311 0x000A //TX_MUSIC_MORENS +312 0x7FFF //TX_A_POST_FILT_0 +313 0x2000 //TX_A_POST_FILT_1 +314 0x7000 //TX_A_POST_FILT_S_0 +315 0x3000 //TX_A_POST_FILT_S_1 +316 0x3000 //TX_A_POST_FILT_S_2 +317 0x2000 //TX_A_POST_FILT_S_3 +318 0x7000 //TX_A_POST_FILT_S_4 +319 0x7000 //TX_A_POST_FILT_S_5 +320 0x7000 //TX_A_POST_FILT_S_6 +321 0x7000 //TX_A_POST_FILT_S_7 +322 0x1000 //TX_B_POST_FILT_0 +323 0x4000 //TX_B_POST_FILT_1 +324 0x4000 //TX_B_POST_FILT_2 +325 0x4000 //TX_B_POST_FILT_3 +326 0x4000 //TX_B_POST_FILT_4 +327 0x4000 //TX_B_POST_FILT_5 +328 0x5000 //TX_B_POST_FILT_6 +329 0x4000 //TX_B_POST_FILT_7 +330 0x4000 //TX_B_LESSCUT_RTO_S_0 +331 0x6000 //TX_B_LESSCUT_RTO_S_1 +332 0x6000 //TX_B_LESSCUT_RTO_S_2 +333 0x6000 //TX_B_LESSCUT_RTO_S_3 +334 0x7FFF //TX_B_LESSCUT_RTO_S_4 +335 0x6000 //TX_B_LESSCUT_RTO_S_5 +336 0x6000 //TX_B_LESSCUT_RTO_S_6 +337 0x7FFF //TX_B_LESSCUT_RTO_S_7 +338 0x7C29 //TX_LAMBDA_PFILT +339 0x7C29 //TX_LAMBDA_PFILT_S_0 +340 0x7C29 //TX_LAMBDA_PFILT_S_1 +341 0x7C29 //TX_LAMBDA_PFILT_S_2 +342 0x7C29 //TX_LAMBDA_PFILT_S_3 +343 0x7C29 //TX_LAMBDA_PFILT_S_4 +344 0x7C29 //TX_LAMBDA_PFILT_S_5 +345 0x7C29 //TX_LAMBDA_PFILT_S_6 +346 0x7C29 //TX_LAMBDA_PFILT_S_7 +347 0x0200 //TX_K_PEPPER +348 0x0600 //TX_A_PEPPER +349 0x1D4C //TX_K_PEPPER_HF +350 0x0400 //TX_A_PEPPER_HF +351 0x0001 //TX_HMNC_BST_FLG +352 0x4000 //TX_HMNC_BST_THR +353 0x0800 //TX_DT_BINVAD_TH_0 +354 0x0800 //TX_DT_BINVAD_TH_1 +355 0x0800 //TX_DT_BINVAD_TH_2 +356 0x0800 //TX_DT_BINVAD_TH_3 +357 0x0000 //TX_DT_BINVAD_ENDF +358 0x1000 //TX_C_POST_FLT_DT +359 0x7FFF //TX_NS_B_POST_FLT_LESSCUT +360 0x0100 //TX_DT_BOOST +361 0x0000 //TX_BF_SGRAD_FLG +362 0x0005 //TX_BF_DVG_TH +363 0x001E //TX_SN_C_F +364 0x0000 //TX_K_APT +365 0x0001 //TX_NOISEDET +366 0x0190 //TX_NDETCT +367 0x000A //TX_NOISE_TH_0 +368 0x7FFF //TX_NOISE_TH_0_2 +369 0x7FFF //TX_NOISE_TH_0_3 +370 0x0139 //TX_NOISE_TH_1 +371 0x0479 //TX_NOISE_TH_2 +372 0x2328 //TX_NOISE_TH_3 +373 0x4422 //TX_NOISE_TH_4 +374 0x5586 //TX_NOISE_TH_5 +375 0x4425 //TX_NOISE_TH_5_2 +376 0x0032 //TX_NOISE_TH_5_3 +377 0x4E20 //TX_NOISE_TH_5_4 +378 0x21E8 //TX_NOISE_TH_6 +379 0x0014 //TX_MINENOISE_TH +380 0xD508 //TX_MORENS_TFMASK_TH +381 0x0001 //TX_DRC_QUIET_FLOOR +382 0x6D60 //TX_RATIODTL_CUT_TH +383 0x0DAC //TX_DT_CUT_K1 +384 0x00A5 //TX_OUT_ENER_S_TH_CLEAN +385 0x00A5 //TX_OUT_ENER_S_TH_LESSCLEAN +386 0x00A5 //TX_OUT_ENER_S_TH_NOISY +387 0x0029 //TX_OUT_ENER_TH_NOISE +388 0x00CE //TX_OUT_ENER_TH_SPEECH +389 0x2000 //TX_SN_NPB_GAIN +390 0x0000 //TX_NN_NPB_GAIN +391 0x3000 //TX_POST_MASK_SUP_HSNE +392 0x07D0 //TX_TAIL_DET_TH +393 0x4000 //TX_B_LESSCUT_RTO_WTA +394 0x0000 //TX_MEL_G_R +395 0x0080 //TX_SUPHIGH_TH +396 0x4000 //TX_MASK_G_R +397 0x0002 //TX_EXTRA_NS_L +398 0x1800 //TX_C_POST_FLT_MASK +399 0x7FFF //TX_A_POST_FLT_WNS +400 0x0148 //TX_MIN_G_LOW300HZ +401 0x0004 //TX_MAXLEVEL_CNG +402 0x00B4 //TX_STN_NOISE_TH +403 0x4000 //TX_POST_MASK_SUP +404 0x7FFF //TX_POST_MASK_ADJUST +405 0x00C8 //TX_NS_ENOISE_MIC0_TH +406 0x0014 //TX_MINENOISE_MIC0_TH +407 0x012C //TX_MINENOISE_MIC0_S_TH +408 0x4900 //TX_MIN_G_CTRL_SSNS +409 0x1000 //TX_METAL_RTO_THR +410 0x0FA0 //TX_NS_FP_K_METAL +411 0x3A98 //TX_NOISEDET_BOOST_TH +412 0x0FA0 //TX_NSMOOTH_TH +413 0x0000 //TX_NS_RESRV_8 +414 0x1800 //TX_RHO_UPB +415 0x2328 //TX_N_HOLD_HS +416 0x006E //TX_N_RHO_BFR0 +417 0x7FFF //TX_LAMBDA_ARSP_EST +418 0x0100 //TX_EXTRA_GAIN_MICBLOCK +419 0x0333 //TX_THR_STD_NSR +420 0x019A //TX_THR_STD_PLH +421 0x03E8 //TX_N_HOLD_STD +422 0x0066 //TX_THR_STD_RHO +423 0x2800 //TX_BF_RESET_THR_HS +424 0x0CCD //TX_SB_RTO_MEAN_TH +425 0x0300 //TX_SB_RHO_MEAN_TH_NTALK +426 0x1C00 //TX_SB_RTO_MEAN_TH_ABN +427 0x2EE0 //TX_SB_RTO_MEAN_TH_RUB +428 0x0000 //TX_WTA_EN_RTO_TH +429 0x1400 //TX_TOP_ENER_TH_F +430 0x0100 //TX_DESIRED_TALK_HOLDT +431 0x0800 //TX_MIC_BLOCK_FACTOR +432 0x0000 //TX_NSEST_BFRLRNRDC +433 0x0000 //TX_THR_POST_FLT_HS +434 0x0010 //TX_HS_VAD_BIN +435 0x2666 //TX_THR_VAD_HS +436 0x2CCD //TX_MEAN_RTO_MIN_TH2 +437 0x0032 //TX_SILENCE_T +438 0x0000 //TX_A_POST_FLT_WTA +439 0x799A //TX_LAMBDA_PFLT_WTA +440 0x05A8 //TX_SB_RHO_MEAN2_TH +441 0x0384 //TX_SB_RHO_MEAN3_TH +442 0x0000 //TX_HS_RESRV_4 +443 0x0000 //TX_HS_RESRV_5 +444 0x0001 //TX_DOA_VAD_THR_1 +445 0x003C //TX_DOA_VAD_THR_2 +446 0x0028 //TX_DOA_VAD_THR1_0 +447 0x0028 //TX_DOA_VAD_THR1_1 +448 0x0000 //TX_SRC_DOA_RNG_LOW_0A +449 0x001E //TX_SRC_DOA_RNG_HIGH_0A +450 0x005A //TX_DFLT_SRC_DOA_0A +451 0x0000 //TX_SRC_DOA_RNG_LOW_0B +452 0x0000 //TX_SRC_DOA_RNG_HIGH_0B +453 0x0000 //TX_DFLT_SRC_DOA_0B +454 0x0000 //TX_SRC_DOA_RNG_LOW_0C +455 0x0000 //TX_SRC_DOA_RNG_HIGH_0C +456 0x0000 //TX_DFLT_SRC_DOA_0C +457 0x0000 //TX_SRC_DOA_RNG_LOW_0D +458 0x0000 //TX_SRC_DOA_RNG_HIGH_0D +459 0x0000 //TX_DFLT_SRC_DOA_0D +460 0x0000 //TX_SRC_DOA_RNG_LOW_1A +461 0x00B4 //TX_SRC_DOA_RNG_HIGH_1A +462 0x005A //TX_DFLT_SRC_DOA_1A +463 0x0000 //TX_SRC_DOA_RNG_LOW_1B +464 0x00B4 //TX_SRC_DOA_RNG_HIGH_1B +465 0x005A //TX_DFLT_SRC_DOA_1B +466 0x0000 //TX_SRC_DOA_RNG_LOW_1C +467 0x00B4 //TX_SRC_DOA_RNG_HIGH_1C +468 0x005A //TX_DFLT_SRC_DOA_1C +469 0x0000 //TX_SRC_DOA_RNG_LOW_1D +470 0x00B4 //TX_SRC_DOA_RNG_HIGH_1D +471 0x005A //TX_DFLT_SRC_DOA_1D +472 0x0100 //TX_BF_HOLDOFF_T +473 0x7FFF //TX_DOA_COST_FACTOR +474 0x0D9A //TX_MAINTOREFR_TH0 +475 0x071C //TX_DOA_TRK_THR +476 0x012C //TX_DOA_TRACK_HT +477 0x0200 //TX_N1_HOLD_HF +478 0x0100 //TX_N2_HOLD_HF +479 0x2A3D //TX_BF_RESET_THR_HF +480 0x7333 //TX_DOA_SMOOTH +481 0x0800 //TX_MU_BF +482 0x0800 //TX_BF_MU_LF_B2 +483 0x0040 //TX_BF_FC_END_BIN_B2 +484 0x0020 //TX_BF_FC_END_BIN +485 0x0000 //TX_HF_RESRV_25 +486 0x0000 //TX_HF_RESRV_26 +487 0x0007 //TX_N_DOA_SEED +488 0x0001 //TX_FINE_DOA_SEARCH_FLG +489 0x0000 //TX_HF_RESRV_27 +490 0x038E //TX_DLT_SRC_DOA_RNG +491 0x0200 //TX_BF_MU_LF +492 0x0000 //TX_DFLT_SRC_LOC_0 +493 0x7FFF //TX_DFLT_SRC_LOC_1 +494 0x0000 //TX_DFLT_SRC_LOC_2 +495 0x038E //TX_DOA_TRACK_VADTH +496 0x0000 //TX_DOA_TRACK_NEW +497 0x0280 //TX_NOR_OFF_THR +498 0x7C00 //TX_MORE_ON_700HZ_THR +499 0x0200 //TX_MU_BF_ADPT_NS +500 0x0000 //TX_ADAPT_LEN +501 0x6666 //TX_MORE_SNS +502 0x0000 //TX_NOR_OFF_TH1 +503 0x0000 //TX_WIDE_MASK_TH +504 0xD333 //TX_SUBSNRATIOHIGH4MEANBCK_THR +505 0x6000 //TX_C_POST_FLT_CUT +506 0x2000 //TX_RADIODTLV +507 0x0320 //TX_POWER_LINEIN_TH +508 0x0014 //TX_FE_VADCOUNT_TH_FC +509 0x0000 //TX_ECHO_SUPP_FC +510 0x0C80 //TX_ECHO_TH +511 0x6666 //TX_MIC_TO_BFGAIN +512 0x0000 //TX_MICTOBFGAIN0 +513 0x0000 //TX_FASTMUE_TH +514 0x3000 //TX_DEREVERB_LF_MU +515 0x34CD //TX_DEREVERB_HF_MU +516 0x0007 //TX_DEREVERB_DELAY +517 0x0004 //TX_DEREVERB_COEF_LEN +518 0x0003 //TX_DEREVERB_DNR +519 0x0000 //TX_DEREVERB_ALPHA +520 0x0000 //TX_DEREVERB_BETA +521 0x0000 //TX_GSC_RTOL_TH +522 0x0000 //TX_GSC_RTOH_TH +523 0x7E2C //TX_WIDE2_MEANHTH +524 0x0000 //TX_DR_RESRV_5 +525 0x0000 //TX_DR_RESRV_6 +526 0x0000 //TX_DR_RESRV_7 +527 0x0000 //TX_DR_RESRV_8 +528 0x1333 //TX_WIND_MARK_TH +529 0x399A //TX_CORR_THR +530 0x0004 //TX_SNR_THR +531 0x0010 //TX_ENGY_THR +532 0x1770 //TX_CORR_HIGH_TH +533 0x6000 //TX_ENGY_THR_2 +534 0x3400 //TX_MEAN_RTO_THR +535 0x0028 //TX_WNS_ENOISE_MIC0_TH +536 0x3000 //TX_RATIOMICL_TH +537 0x7FFF //TX_CALIG_HS +538 0x0000 //TX_LVL_CTRL +539 0x0010 //TX_WIND_SUPRTO +540 0x0014 //TX_WNS_MIN_G +541 0x0600 //TX_WNS_B_POST_FLT +542 0x3000 //TX_RATIOMICH_TH +543 0xD120 //TX_WIND_INBEAM_L_TH +544 0x0FA0 //TX_WIND_INBEAM_H_TH +545 0x2000 //TX_WNS_RESRV_0 +546 0x59D8 //TX_WNS_RESRV_1 +547 0x0200 //TX_WNS_RESRV_2 +548 0x0000 //TX_WNS_RESRV_3 +549 0x0000 //TX_WNS_RESRV_4 +550 0x0000 //TX_WNS_RESRV_5 +551 0x0000 //TX_WNS_RESRV_6 +552 0x0000 //TX_PB_B_POST_FLT_LESSCUT +553 0x0070 //TX_BF_LESSCUT_BBIN +554 0x0070 //TX_BF_LESSCUT_EBIN +555 0x0010 //TX_POSTBFB0 +556 0x0070 //TX_POSTBFB +557 0x00B0 //TX_POSTBFE +558 0x0E66 //TX_SPEECH_SNR_TH +559 0x0050 //TX_PB_MAX_PRI_SNR_TH +560 0x770A //TX_MAX_PRI_SNR_TH_L +561 0x0000 //TX_PFGAIN +562 0x0000 //TX_MAINTOREFR_TH +563 0x0000 //TX_SAM_MARK +564 0x0000 //TX_PB_RESRV_0 +565 0x0000 //TX_PB_RESRV_1 +566 0x0030 //TX_FDEQ_SUBNUM +567 0x5C54 //TX_FDEQ_GAIN_0 +568 0x5048 //TX_FDEQ_GAIN_1 +569 0x4C4C //TX_FDEQ_GAIN_2 +570 0x474A //TX_FDEQ_GAIN_3 +571 0x473F //TX_FDEQ_GAIN_4 +572 0x4245 //TX_FDEQ_GAIN_5 +573 0x4B53 //TX_FDEQ_GAIN_6 +574 0x564A //TX_FDEQ_GAIN_7 +575 0x3D3A //TX_FDEQ_GAIN_8 +576 0x3B3C //TX_FDEQ_GAIN_9 +577 0x3C36 //TX_FDEQ_GAIN_10 +578 0x3636 //TX_FDEQ_GAIN_11 +579 0x3D3E //TX_FDEQ_GAIN_12 +580 0x4548 //TX_FDEQ_GAIN_13 +581 0x4848 //TX_FDEQ_GAIN_14 +582 0x4848 //TX_FDEQ_GAIN_15 +583 0x4848 //TX_FDEQ_GAIN_16 +584 0x4848 //TX_FDEQ_GAIN_17 +585 0x4848 //TX_FDEQ_GAIN_18 +586 0x4848 //TX_FDEQ_GAIN_19 +587 0x4848 //TX_FDEQ_GAIN_20 +588 0x4848 //TX_FDEQ_GAIN_21 +589 0x4848 //TX_FDEQ_GAIN_22 +590 0x4848 //TX_FDEQ_GAIN_23 +591 0x0202 //TX_FDEQ_BIN_0 +592 0x0104 //TX_FDEQ_BIN_1 +593 0x0502 //TX_FDEQ_BIN_2 +594 0x0202 //TX_FDEQ_BIN_3 +595 0x0504 //TX_FDEQ_BIN_4 +596 0x0708 //TX_FDEQ_BIN_5 +597 0x0808 //TX_FDEQ_BIN_6 +598 0x050E //TX_FDEQ_BIN_7 +599 0x0B0C //TX_FDEQ_BIN_8 +600 0x0F0F //TX_FDEQ_BIN_9 +601 0x0F0F //TX_FDEQ_BIN_10 +602 0x0F28 //TX_FDEQ_BIN_11 +603 0x0611 //TX_FDEQ_BIN_12 +604 0x0000 //TX_FDEQ_BIN_13 +605 0x0000 //TX_FDEQ_BIN_14 +606 0x0000 //TX_FDEQ_BIN_15 +607 0x0000 //TX_FDEQ_BIN_16 +608 0x0000 //TX_FDEQ_BIN_17 +609 0x0000 //TX_FDEQ_BIN_18 +610 0x0000 //TX_FDEQ_BIN_19 +611 0x0000 //TX_FDEQ_BIN_20 +612 0x0000 //TX_FDEQ_BIN_21 +613 0x0000 //TX_FDEQ_BIN_22 +614 0x0000 //TX_FDEQ_BIN_23 +615 0x0000 //TX_FDEQ_PADDING +616 0x0030 //TX_PREEQ_SUBNUM_MIC0 +617 0x4848 //TX_PREEQ_GAIN_MIC0_0 +618 0x4848 //TX_PREEQ_GAIN_MIC0_1 +619 0x4848 //TX_PREEQ_GAIN_MIC0_2 +620 0x4848 //TX_PREEQ_GAIN_MIC0_3 +621 0x4848 //TX_PREEQ_GAIN_MIC0_4 +622 0x4848 //TX_PREEQ_GAIN_MIC0_5 +623 0x4848 //TX_PREEQ_GAIN_MIC0_6 +624 0x4848 //TX_PREEQ_GAIN_MIC0_7 +625 0x4848 //TX_PREEQ_GAIN_MIC0_8 +626 0x4848 //TX_PREEQ_GAIN_MIC0_9 +627 0x4848 //TX_PREEQ_GAIN_MIC0_10 +628 0x4848 //TX_PREEQ_GAIN_MIC0_11 +629 0x4848 //TX_PREEQ_GAIN_MIC0_12 +630 0x4848 //TX_PREEQ_GAIN_MIC0_13 +631 0x4848 //TX_PREEQ_GAIN_MIC0_14 +632 0x4848 //TX_PREEQ_GAIN_MIC0_15 +633 0x4848 //TX_PREEQ_GAIN_MIC0_16 +634 0x4848 //TX_PREEQ_GAIN_MIC0_17 +635 0x4848 //TX_PREEQ_GAIN_MIC0_18 +636 0x4848 //TX_PREEQ_GAIN_MIC0_19 +637 0x4848 //TX_PREEQ_GAIN_MIC0_20 +638 0x4848 //TX_PREEQ_GAIN_MIC0_21 +639 0x4848 //TX_PREEQ_GAIN_MIC0_22 +640 0x4848 //TX_PREEQ_GAIN_MIC0_23 +641 0x251A //TX_PREEQ_BIN_MIC0_0 +642 0x0F0F //TX_PREEQ_BIN_MIC0_1 +643 0x0C0C //TX_PREEQ_BIN_MIC0_2 +644 0x0C0F //TX_PREEQ_BIN_MIC0_3 +645 0x0F0F //TX_PREEQ_BIN_MIC0_4 +646 0x0F09 //TX_PREEQ_BIN_MIC0_5 +647 0x0909 //TX_PREEQ_BIN_MIC0_6 +648 0x0908 //TX_PREEQ_BIN_MIC0_7 +649 0x0700 //TX_PREEQ_BIN_MIC0_8 +650 0x0000 //TX_PREEQ_BIN_MIC0_9 +651 0x0000 //TX_PREEQ_BIN_MIC0_10 +652 0x0000 //TX_PREEQ_BIN_MIC0_11 +653 0x0000 //TX_PREEQ_BIN_MIC0_12 +654 0x0000 //TX_PREEQ_BIN_MIC0_13 +655 0x0000 //TX_PREEQ_BIN_MIC0_14 +656 0x0000 //TX_PREEQ_BIN_MIC0_15 +657 0x0000 //TX_PREEQ_BIN_MIC0_16 +658 0x0000 //TX_PREEQ_BIN_MIC0_17 +659 0x0000 //TX_PREEQ_BIN_MIC0_18 +660 0x0000 //TX_PREEQ_BIN_MIC0_19 +661 0x0000 //TX_PREEQ_BIN_MIC0_20 +662 0x0000 //TX_PREEQ_BIN_MIC0_21 +663 0x0000 //TX_PREEQ_BIN_MIC0_22 +664 0x0000 //TX_PREEQ_BIN_MIC0_23 +665 0x0030 //TX_PREEQ_SUBNUM_MIC1 +666 0x4848 //TX_PREEQ_GAIN_MIC1_0 +667 0x4848 //TX_PREEQ_GAIN_MIC1_1 +668 0x4848 //TX_PREEQ_GAIN_MIC1_2 +669 0x4848 //TX_PREEQ_GAIN_MIC1_3 +670 0x4848 //TX_PREEQ_GAIN_MIC1_4 +671 0x4848 //TX_PREEQ_GAIN_MIC1_5 +672 0x494A //TX_PREEQ_GAIN_MIC1_6 +673 0x4B4C //TX_PREEQ_GAIN_MIC1_7 +674 0x4D4E //TX_PREEQ_GAIN_MIC1_8 +675 0x5051 //TX_PREEQ_GAIN_MIC1_9 +676 0x5255 //TX_PREEQ_GAIN_MIC1_10 +677 0x585A //TX_PREEQ_GAIN_MIC1_11 +678 0x5C5F //TX_PREEQ_GAIN_MIC1_12 +679 0x636A //TX_PREEQ_GAIN_MIC1_13 +680 0x4848 //TX_PREEQ_GAIN_MIC1_14 +681 0x4848 //TX_PREEQ_GAIN_MIC1_15 +682 0x4848 //TX_PREEQ_GAIN_MIC1_16 +683 0x4848 //TX_PREEQ_GAIN_MIC1_17 +684 0x4848 //TX_PREEQ_GAIN_MIC1_18 +685 0x4848 //TX_PREEQ_GAIN_MIC1_19 +686 0x4848 //TX_PREEQ_GAIN_MIC1_20 +687 0x4848 //TX_PREEQ_GAIN_MIC1_21 +688 0x4848 //TX_PREEQ_GAIN_MIC1_22 +689 0x4848 //TX_PREEQ_GAIN_MIC1_23 +690 0x0202 //TX_PREEQ_BIN_MIC1_0 +691 0x0203 //TX_PREEQ_BIN_MIC1_1 +692 0x0303 //TX_PREEQ_BIN_MIC1_2 +693 0x0304 //TX_PREEQ_BIN_MIC1_3 +694 0x0405 //TX_PREEQ_BIN_MIC1_4 +695 0x0506 //TX_PREEQ_BIN_MIC1_5 +696 0x0708 //TX_PREEQ_BIN_MIC1_6 +697 0x090A //TX_PREEQ_BIN_MIC1_7 +698 0x0B0C //TX_PREEQ_BIN_MIC1_8 +699 0x0D0E //TX_PREEQ_BIN_MIC1_9 +700 0x0F10 //TX_PREEQ_BIN_MIC1_10 +701 0x1011 //TX_PREEQ_BIN_MIC1_11 +702 0x1104 //TX_PREEQ_BIN_MIC1_12 +703 0x101B //TX_PREEQ_BIN_MIC1_13 +704 0x0000 //TX_PREEQ_BIN_MIC1_14 +705 0x0000 //TX_PREEQ_BIN_MIC1_15 +706 0x0000 //TX_PREEQ_BIN_MIC1_16 +707 0x0000 //TX_PREEQ_BIN_MIC1_17 +708 0x0000 //TX_PREEQ_BIN_MIC1_18 +709 0x0000 //TX_PREEQ_BIN_MIC1_19 +710 0x0000 //TX_PREEQ_BIN_MIC1_20 +711 0x0000 //TX_PREEQ_BIN_MIC1_21 +712 0x0000 //TX_PREEQ_BIN_MIC1_22 +713 0x0000 //TX_PREEQ_BIN_MIC1_23 +714 0x0030 //TX_PREEQ_SUBNUM_MIC2 +715 0x4848 //TX_PREEQ_GAIN_MIC2_0 +716 0x4848 //TX_PREEQ_GAIN_MIC2_1 +717 0x4848 //TX_PREEQ_GAIN_MIC2_2 +718 0x4848 //TX_PREEQ_GAIN_MIC2_3 +719 0x4848 //TX_PREEQ_GAIN_MIC2_4 +720 0x4848 //TX_PREEQ_GAIN_MIC2_5 +721 0x4848 //TX_PREEQ_GAIN_MIC2_6 +722 0x4848 //TX_PREEQ_GAIN_MIC2_7 +723 0x4848 //TX_PREEQ_GAIN_MIC2_8 +724 0x4848 //TX_PREEQ_GAIN_MIC2_9 +725 0x4848 //TX_PREEQ_GAIN_MIC2_10 +726 0x4848 //TX_PREEQ_GAIN_MIC2_11 +727 0x4848 //TX_PREEQ_GAIN_MIC2_12 +728 0x4848 //TX_PREEQ_GAIN_MIC2_13 +729 0x4848 //TX_PREEQ_GAIN_MIC2_14 +730 0x4848 //TX_PREEQ_GAIN_MIC2_15 +731 0x4848 //TX_PREEQ_GAIN_MIC2_16 +732 0x4848 //TX_PREEQ_GAIN_MIC2_17 +733 0x4848 //TX_PREEQ_GAIN_MIC2_18 +734 0x4848 //TX_PREEQ_GAIN_MIC2_19 +735 0x4848 //TX_PREEQ_GAIN_MIC2_20 +736 0x4848 //TX_PREEQ_GAIN_MIC2_21 +737 0x4848 //TX_PREEQ_GAIN_MIC2_22 +738 0x4848 //TX_PREEQ_GAIN_MIC2_23 +739 0x0608 //TX_PREEQ_BIN_MIC2_0 +740 0x0808 //TX_PREEQ_BIN_MIC2_1 +741 0x0808 //TX_PREEQ_BIN_MIC2_2 +742 0x0808 //TX_PREEQ_BIN_MIC2_3 +743 0x0808 //TX_PREEQ_BIN_MIC2_4 +744 0x0808 //TX_PREEQ_BIN_MIC2_5 +745 0x0808 //TX_PREEQ_BIN_MIC2_6 +746 0x0808 //TX_PREEQ_BIN_MIC2_7 +747 0x0808 //TX_PREEQ_BIN_MIC2_8 +748 0x0808 //TX_PREEQ_BIN_MIC2_9 +749 0x0808 //TX_PREEQ_BIN_MIC2_10 +750 0x0808 //TX_PREEQ_BIN_MIC2_11 +751 0x0808 //TX_PREEQ_BIN_MIC2_12 +752 0x0808 //TX_PREEQ_BIN_MIC2_13 +753 0x0808 //TX_PREEQ_BIN_MIC2_14 +754 0x0200 //TX_PREEQ_BIN_MIC2_15 +755 0x0000 //TX_PREEQ_BIN_MIC2_16 +756 0x0000 //TX_PREEQ_BIN_MIC2_17 +757 0x0000 //TX_PREEQ_BIN_MIC2_18 +758 0x0000 //TX_PREEQ_BIN_MIC2_19 +759 0x0000 //TX_PREEQ_BIN_MIC2_20 +760 0x0000 //TX_PREEQ_BIN_MIC2_21 +761 0x0000 //TX_PREEQ_BIN_MIC2_22 +762 0x0000 //TX_PREEQ_BIN_MIC2_23 +763 0x0006 //TX_MASKING_ABILITY +764 0x0800 //TX_NND_WEIGHT +765 0x0062 //TX_MIC_CALIBRATION_0 +766 0x0062 //TX_MIC_CALIBRATION_1 +767 0x0062 //TX_MIC_CALIBRATION_2 +768 0x0062 //TX_MIC_CALIBRATION_3 +769 0x0046 //TX_MIC_PWR_BIAS_0 +770 0x0046 //TX_MIC_PWR_BIAS_1 +771 0x0046 //TX_MIC_PWR_BIAS_2 +772 0x0046 //TX_MIC_PWR_BIAS_3 +773 0x0000 //TX_GAIN_LIMIT_0 +774 0x0000 //TX_GAIN_LIMIT_1 +775 0x0006 //TX_GAIN_LIMIT_2 +776 0x0007 //TX_GAIN_LIMIT_3 +777 0x7F5B //TX_BVE_NOVAD0_ALPHADOWN +778 0x7FDE //TX_BVE_VAD0_ALPHAUP +779 0x7F3A //TX_BVE_VAD0_ALPHADOWN +780 0x2000 //TX_BVE_GAINWEIGHT_NOFEVADLI +781 0x7F5B //TX_BVE_FEVADLI_ALPHA +782 0x7F19 //TX_BVE_NOVAD0_ALPHAUP +783 0x1000 //TX_TDDRC_ALPHA_UP_01 +784 0x1000 //TX_TDDRC_ALPHA_UP_02 +785 0x1000 //TX_TDDRC_ALPHA_UP_03 +786 0x1000 //TX_TDDRC_ALPHA_UP_04 +787 0x7EB8 //TX_TDDRC_ALPHA_DWN_01 +788 0x7EB8 //TX_TDDRC_ALPHA_DWN_02 +789 0x7EB8 //TX_TDDRC_ALPHA_DWN_03 +790 0x7EB8 //TX_TDDRC_ALPHA_DWN_04 +791 0x7FFF //TX_TDDRC_TD_DRC_LIMIT +792 0x0800 //TX_TDDRC_POST_LIMIT_GAIN +793 0x0000 //TX_TDDRC_RESRV_0 +794 0x0000 //TX_TDDRC_RESRV_1 +795 0x0018 //TX_FDDRC_BAND_MARGIN_0 +796 0x0030 //TX_FDDRC_BAND_MARGIN_1 +797 0x0050 //TX_FDDRC_BAND_MARGIN_2 +798 0x0080 //TX_FDDRC_BAND_MARGIN_3 +799 0x0007 //TX_FDDRC_BLOCK_EXP +800 0x5000 //TX_FDDRC_THRD_2_0 +801 0x5000 //TX_FDDRC_THRD_2_1 +802 0x5000 //TX_FDDRC_THRD_2_2 +803 0x5000 //TX_FDDRC_THRD_2_3 +804 0x6400 //TX_FDDRC_THRD_3_0 +805 0x6400 //TX_FDDRC_THRD_3_1 +806 0x6400 //TX_FDDRC_THRD_3_2 +807 0x6400 //TX_FDDRC_THRD_3_3 +808 0x2000 //TX_FDDRC_SLANT_0_0 +809 0x2000 //TX_FDDRC_SLANT_0_1 +810 0x2000 //TX_FDDRC_SLANT_0_2 +811 0x2000 //TX_FDDRC_SLANT_0_3 +812 0x5333 //TX_FDDRC_SLANT_1_0 +813 0x5333 //TX_FDDRC_SLANT_1_1 +814 0x5333 //TX_FDDRC_SLANT_1_2 +815 0x5333 //TX_FDDRC_SLANT_1_3 +816 0x0010 //TX_DEADMIC_SILENCE_TH +817 0x0600 //TX_MIC_DEGRADE_TH +818 0x0078 //TX_DEADMIC_CNT +819 0x0078 //TX_MIC_DEGRADE_CNT +820 0x0000 //TX_FDDRC_RESRV_4 +821 0x0000 //TX_FDDRC_RESRV_5 +822 0x0000 //TX_FDDRC_RESRV_6 +823 0x7FFF //TX_KS_NOISEPASTE_FACTOR +824 0x0001 //TX_KS_CONFIG +825 0x7FFF //TX_KS_GAIN_MIN +826 0x0000 //TX_KS_RESRV_0 +827 0x0000 //TX_KS_RESRV_1 +828 0x0000 //TX_KS_RESRV_2 +829 0x7C00 //TX_LAMBDA_PKA_FP +830 0x2000 //TX_TPKA_FP +831 0x0080 //TX_MIN_G_FP +832 0x2000 //TX_MAX_G_FP +833 0x0FA0 //TX_FFP_FP_K_METAL +834 0x4000 //TX_A_POST_FLT_FP +835 0x0F5C //TX_RTO_OUTBEAM_TH +836 0x4CCD //TX_TPKA_FP_THD +837 0x0000 //TX_MAX_G_FP_BLK +838 0x0000 //TX_FFP_FADEIN +839 0x0000 //TX_FFP_FADEOUT +840 0x0000 //TX_WHISPERCTH +841 0x0000 //TX_WHISPERHOLDT +842 0x0000 //TX_WHISP_ENTHH +843 0x0000 //TX_WHISP_ENTHL +844 0x0000 //TX_WHISP_RTOTH +845 0x0000 //TX_WHISP_RTOTH2 +846 0x0096 //TX_MUTE_PERIOD +847 0x0000 //TX_FADE_IN_PERIOD +848 0x0100 //TX_FFP_RESRV_2 +849 0x0020 //TX_FFP_RESRV_3 +850 0x0000 //TX_FFP_RESRV_4 +851 0x0000 //TX_FFP_RESRV_5 +852 0x0000 //TX_FFP_RESRV_6 +853 0x0002 //TX_FILTINDX +854 0x0002 //TX_TDDRC_THRD_0 +855 0x0003 //TX_TDDRC_THRD_1 +856 0x1500 //TX_TDDRC_THRD_2 +857 0x1500 //TX_TDDRC_THRD_3 +858 0x3000 //TX_TDDRC_SLANT_0 +859 0x6E00 //TX_TDDRC_SLANT_1 +860 0x1000 //TX_TDDRC_ALPHA_UP_00 +861 0x7EB8 //TX_TDDRC_ALPHA_DWN_00 +862 0x0000 //TX_TDDRC_HMNC_FLAG +863 0x199A //TX_TDDRC_HMNC_GAIN +864 0x0000 //TX_TDDRC_SMT_FLAG +865 0x0CCD //TX_TDDRC_SMT_W +866 0x05A0 //TX_TDDRC_DRC_GAIN +867 0x7FFF //TX_TDDRC_LMT_THRD +868 0x0000 //TX_TDDRC_LMT_ALPHA +869 0x0000 //TX_TFMASKLTH +870 0x0000 //TX_TFMASKLTHL +871 0x0CCD //TX_TFMASKHTH +872 0x199A //TX_TFMASKLTH_BINVAD +873 0xFCCD //TX_TFMASKLTH_NS_EST +874 0xF800 //TX_TFMASKLTH_DOA +875 0x0CCD //TX_TFMASKTH_BLESSCUT +876 0x2000 //TX_B_LESSCUT_RTO_MASK +877 0x1C00 //TX_SB_RHO_MEAN_TH_ABN +878 0x2000 //TX_B_POST_FLT_MASK +879 0x0000 //TX_B_POST_FLT_MASK1 +880 0x6333 //TX_GAIN_WIND_MASK +881 0x0000 //TX_TFMASK_BFSTRICT_MUSIC +882 0x0000 //TX_TFMASK_BFSTRICT_NOMUSIC +883 0x7333 //TX_FASTNS_OUTIN_TH +884 0x0CCD //TX_FASTNS_TFMASK_TH +885 0x0CCD //TX_FASTNS_TFMASKBIN_TH1 +886 0x0CCD //TX_FASTNS_TFMASKBIN_TH2 +887 0x0CCD //TX_FASTNS_TFMASKBIN_TH3 +888 0x00C8 //TX_FASTNS_ARSPC_TH +889 0xC000 //TX_FASTNS_MASK5_TH +890 0x0810 //TX_POSTSSA_MIN_G_VR_MASK +891 0x1000 //TX_A_LESSCUT_RTO_MASK +892 0x1770 //TX_FASTNS_NOISETH +893 0xC000 //TX_FASTNS_SSA_THLFL +894 0xC000 //TX_FASTNS_SSA_THHFL +895 0xCCCC //TX_FASTNS_SSA_THLFH +896 0xD999 //TX_FASTNS_SSA_THHFH +897 0x2339 //TX_SENDFUNC_REG_MICMUTE +898 0x0021 //TX_SENDFUNC_REG_MICMUTE1 +899 0x02BC //TX_MICMUTE_RATIO_THR +900 0x0140 //TX_MICMUTE_AMP_THR +901 0x0004 //TX_MICMUTE_HPF_IND +902 0x00C0 //TX_MICMUTE_LOG_EYR_TH +903 0x0008 //TX_MICMUTE_CVG_TIME +904 0x0008 //TX_MICMUTE_RELEASE_TIME +905 0x01FE //TX_MIC_VOLUME_MIC0MUTE +906 0x0020 //TX_MICMUTE_EPD_OFFSET_0 +907 0x001E //TX_MICMUTE_FRQ_AEC_L +908 0x7999 //TX_MICMUTE_EAD_THR +909 0x7FFF //TX_MICMUTE_LAMBDA_CB_NLE +910 0x7FFF //TX_MICMUTE_LAMBDA_RE_EST +911 0x4000 //TX_DTD_THR1_MICMUTE_0 +912 0x7000 //TX_DTD_THR1_MICMUTE_1 +913 0x7FFF //TX_DTD_THR1_MICMUTE_2 +914 0x7FFF //TX_DTD_THR1_MICMUTE_3 +915 0x6CCC //TX_DTD_THR2_MICMUTE_0 +916 0x0400 //TX_MICMUTE_MIN_EQ_RE_EST_0 +917 0x0400 //TX_MICMUTE_MIN_EQ_RE_EST_1 +918 0x1000 //TX_MICMUTE_MIN_EQ_RE_EST_2 +919 0x7FFF //TX_MICMUTE_MIN_EQ_RE_EST_3 +920 0x7FFF //TX_MICMUTE_MIN_EQ_RE_EST_4 +921 0x4000 //TX_MICMUTE_C_POST_FLT +922 0x03E8 //TX_MICMUTE_DT_CUT_K +923 0x0001 //TX_MICMUTE_DT_CUT_THR +924 0x03E8 //TX_MICMUTE_DT_CUT_K2 +925 0x0001 //TX_MICMUTE_DT_CUT_THR2 +926 0x0064 //TX_MICMUTE_DT2_HOLD_N +927 0x1000 //TX_MICMUTE_RATIODTH_THCUT +928 0x1000 //TX_MICMUTE_B_POST_FLT_ECHOL +929 0x7FFF //TX_MICMUTE_B_POST_FLT_ECHOH +930 0x0400 //TX_MICMUTE_C_POST_FLT_MASK +931 0x7999 //TX_MICMUTE_RATIODTL_CUT_TH +932 0x0258 //TX_MICMUTE_DT_CUT_K1 +933 0x0800 //TX_MICMUTE_N2_SN_EST +934 0xFC00 //TX_MICMUTE_THR_SN_EST_0 +935 0x001C //TX_MICMUTE_MIN_G_CTRL_0 +936 0x6000 //TX_MICMUTE_A_POST_FILT_S_0 +937 0x7000 //TX_MICMUTE_B_POST_FILT_0 +938 0x2710 //TX_MIC1RUB_AMP_THR +939 0x0010 //TX_MIC1MUTE_RATIO_THR +940 0x0450 //TX_MIC1MUTE_AMP_THR +941 0x0008 //TX_MIC1MUTE_CVG_TIME +942 0x0008 //TX_MIC1MUTE_RELEASE_TIME +943 0x0000 //TX_AMS_RESRV_01 +944 0x0000 //TX_AMS_RESRV_02 +945 0x0000 //TX_AMS_RESRV_03 +946 0x0000 //TX_AMS_RESRV_04 +947 0x0000 //TX_AMS_RESRV_05 +948 0x0000 //TX_AMS_RESRV_06 +949 0x0000 //TX_AMS_RESRV_07 +950 0x0000 //TX_AMS_RESRV_08 +951 0x0000 //TX_AMS_RESRV_09 +952 0x0000 //TX_AMS_RESRV_10 +953 0x0000 //TX_AMS_RESRV_11 +954 0x0000 //TX_AMS_RESRV_12 +955 0x0000 //TX_AMS_RESRV_13 +956 0x0000 //TX_AMS_RESRV_14 +957 0x0000 //TX_AMS_RESRV_15 +958 0x0000 //TX_AMS_RESRV_16 +959 0x0000 //TX_AMS_RESRV_17 +960 0x0000 //TX_AMS_RESRV_18 +961 0x0000 //TX_AMS_RESRV_19 +#RX +0 0x203C //RX_RECVFUNC_MODE_0 +1 0x0000 //RX_RECVFUNC_MODE_1 +2 0x0001 //RX_SAMPLINGFREQ_SIG +3 0x0001 //RX_SAMPLINGFREQ_PROC +4 0x000A //RX_FRAME_SZ +5 0x0000 //RX_DELAY_OPT +6 0x1000 //RX_TDDRC_ALPHA_UP_1 +7 0x1000 //RX_TDDRC_ALPHA_UP_2 +8 0x1000 //RX_TDDRC_ALPHA_UP_3 +9 0x1000 //RX_TDDRC_ALPHA_UP_4 +10 0x0600 //RX_PGA +11 0x7FFF //RX_A_HP +12 0x4000 //RX_B_PE +13 0x7800 //RX_THR_PITCH_DET_0 +14 0x7000 //RX_THR_PITCH_DET_1 +15 0x6000 //RX_THR_PITCH_DET_2 +16 0x0008 //RX_PITCH_BFR_LEN +17 0x0003 //RX_SBD_PITCH_DET +18 0x0100 //RX_PP_RESRV_0 +19 0x0020 //RX_PP_RESRV_1 +20 0x0400 //RX_N_SN_EST +21 0x000C //RX_N2_SN_EST +22 0x0014 //RX_NS_LVL_CTRL +23 0xF800 //RX_THR_SN_EST +24 0x7E00 //RX_LAMBDA_PFILT +25 0x000A //RX_FENS_RESRV_0 +26 0x0190 //RX_FENS_RESRV_1 +27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +30 0x0002 //RX_EXTRA_NS_L +31 0x0800 //RX_EXTRA_NS_A +32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +33 0x7000 //RX_TDDRC_LIMITER_THRD +34 0x0800 //RX_TDDRC_LIMITER_GAIN +35 0x199A //RX_A_POST_FLT +36 0x1000 //RX_LMT_THRD +37 0x7FDF //RX_LMT_ALPHA +38 0x001C //RX_FDEQ_SUBNUM +39 0x4840 //RX_FDEQ_GAIN_0 +40 0x4040 //RX_FDEQ_GAIN_1 +41 0x4659 //RX_FDEQ_GAIN_2 +42 0x6474 //RX_FDEQ_GAIN_3 +43 0x7A82 //RX_FDEQ_GAIN_4 +44 0x8180 //RX_FDEQ_GAIN_5 +45 0x8084 //RX_FDEQ_GAIN_6 +46 0x8A88 //RX_FDEQ_GAIN_7 +47 0x8C8C //RX_FDEQ_GAIN_8 +48 0x8A95 //RX_FDEQ_GAIN_9 +49 0x978E //RX_FDEQ_GAIN_10 +50 0x8C8C //RX_FDEQ_GAIN_11 +51 0x7068 //RX_FDEQ_GAIN_12 +52 0x6050 //RX_FDEQ_GAIN_13 +53 0x4848 //RX_FDEQ_GAIN_14 +54 0x4848 //RX_FDEQ_GAIN_15 +55 0x4848 //RX_FDEQ_GAIN_16 +56 0x4848 //RX_FDEQ_GAIN_17 +57 0x4848 //RX_FDEQ_GAIN_18 +58 0x4848 //RX_FDEQ_GAIN_19 +59 0x4848 //RX_FDEQ_GAIN_20 +60 0x4848 //RX_FDEQ_GAIN_21 +61 0x4848 //RX_FDEQ_GAIN_22 +62 0x4848 //RX_FDEQ_GAIN_23 +63 0x0202 //RX_FDEQ_BIN_0 +64 0x0203 //RX_FDEQ_BIN_1 +65 0x0303 //RX_FDEQ_BIN_2 +66 0x0304 //RX_FDEQ_BIN_3 +67 0x0405 //RX_FDEQ_BIN_4 +68 0x0506 //RX_FDEQ_BIN_5 +69 0x0708 //RX_FDEQ_BIN_6 +70 0x090A //RX_FDEQ_BIN_7 +71 0x0B0C //RX_FDEQ_BIN_8 +72 0x0D0E //RX_FDEQ_BIN_9 +73 0x0E0F //RX_FDEQ_BIN_10 +74 0x0F0E //RX_FDEQ_BIN_11 +75 0x100D //RX_FDEQ_BIN_12 +76 0x110A //RX_FDEQ_BIN_13 +77 0x0000 //RX_FDEQ_BIN_14 +78 0x0000 //RX_FDEQ_BIN_15 +79 0x0000 //RX_FDEQ_BIN_16 +80 0x0000 //RX_FDEQ_BIN_17 +81 0x0000 //RX_FDEQ_BIN_18 +82 0x0000 //RX_FDEQ_BIN_19 +83 0x0000 //RX_FDEQ_BIN_20 +84 0x0000 //RX_FDEQ_BIN_21 +85 0x0000 //RX_FDEQ_BIN_22 +86 0x0000 //RX_FDEQ_BIN_23 +87 0x4000 //RX_FDEQ_RESRV_0 +88 0x0320 //RX_FDEQ_RESRV_1 +89 0x0018 //RX_FDDRC_BAND_MARGIN_0 +90 0x0030 //RX_FDDRC_BAND_MARGIN_1 +91 0x0050 //RX_FDDRC_BAND_MARGIN_2 +92 0x0080 //RX_FDDRC_BAND_MARGIN_3 +93 0x0007 //RX_FDDRC_BLOCK_EXP +94 0x5000 //RX_FDDRC_THRD_2_0 +95 0x5000 //RX_FDDRC_THRD_2_1 +96 0x5000 //RX_FDDRC_THRD_2_2 +97 0x5000 //RX_FDDRC_THRD_2_3 +98 0x6400 //RX_FDDRC_THRD_3_0 +99 0x6400 //RX_FDDRC_THRD_3_1 +100 0x6400 //RX_FDDRC_THRD_3_2 +101 0x6400 //RX_FDDRC_THRD_3_3 +102 0x2000 //RX_FDDRC_SLANT_0_0 +103 0x2000 //RX_FDDRC_SLANT_0_1 +104 0x2000 //RX_FDDRC_SLANT_0_2 +105 0x2000 //RX_FDDRC_SLANT_0_3 +106 0x5333 //RX_FDDRC_SLANT_1_0 +107 0x5333 //RX_FDDRC_SLANT_1_1 +108 0x5333 //RX_FDDRC_SLANT_1_2 +109 0x5333 //RX_FDDRC_SLANT_1_3 +110 0x0000 //RX_FDDRC_RESRV_0 +111 0x0002 //RX_FILTINDX +112 0x0000 //RX_TDDRC_THRD_0 +113 0x0000 //RX_TDDRC_THRD_1 +114 0x1800 //RX_TDDRC_THRD_2 +115 0x1800 //RX_TDDRC_THRD_3 +116 0x3000 //RX_TDDRC_SLANT_0 +117 0x6E00 //RX_TDDRC_SLANT_1 +118 0x1000 //RX_TDDRC_ALPHA_UP_0 +119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +120 0x0000 //RX_TDDRC_HMNC_FLAG +121 0x199A //RX_TDDRC_HMNC_GAIN +122 0x0001 //RX_TDDRC_SMT_FLAG +123 0x0CCD //RX_TDDRC_SMT_W +124 0x04E6 //RX_TDDRC_DRC_GAIN +125 0x7C00 //RX_LAMBDA_PKA_FP +126 0x13E0 //RX_TPKA_FP +127 0x0080 //RX_MIN_G_FP +128 0x2000 //RX_MAX_G_FP +129 0x000B //RX_SPK_VOL +130 0x0000 //RX_VOL_RESRV_0 +131 0x0000 //RX_MAXLEVEL_CNG +132 0x3000 //RX_BWE_UV_TH +133 0x3000 //RX_BWE_UV_TH2 +134 0x1800 //RX_BWE_UV_TH3 +135 0x1000 //RX_BWE_V_TH +136 0x04CD //RX_BWE_GAIN1_V_TH1 +137 0x0F33 //RX_BWE_GAIN1_V_TH2 +138 0x7333 //RX_BWE_UV_EQ +139 0x199A //RX_BWE_V_EQ +140 0x7333 //RX_BWE_TONE_TH +141 0x0004 //RX_BWE_UV_HOLD_T +142 0x6CCD //RX_BWE_GAIN2_ALPHA +143 0x799A //RX_BWE_GAIN3_ALPHA +144 0x001E //RX_BWE_CUTOFF +145 0x3000 //RX_BWE_GAINFILL +146 0x3200 //RX_BWE_MAXTH_TONE +147 0x2000 //RX_BWE_EQ_0 +148 0x2000 //RX_BWE_EQ_1 +149 0x2000 //RX_BWE_EQ_2 +150 0x2000 //RX_BWE_EQ_3 +151 0x2000 //RX_BWE_EQ_4 +152 0x2000 //RX_BWE_EQ_5 +153 0x2000 //RX_BWE_EQ_6 +154 0x0000 //RX_BWE_RESRV_0 +155 0x0000 //RX_BWE_RESRV_1 +156 0x0000 //RX_BWE_RESRV_2 +#VOL 0 +6 0x1000 //RX_TDDRC_ALPHA_UP_1 +7 0x1000 //RX_TDDRC_ALPHA_UP_2 +8 0x1000 //RX_TDDRC_ALPHA_UP_3 +9 0x1000 //RX_TDDRC_ALPHA_UP_4 +27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +33 0x7000 //RX_TDDRC_LIMITER_THRD +34 0x0800 //RX_TDDRC_LIMITER_GAIN +112 0x0000 //RX_TDDRC_THRD_0 +113 0x0000 //RX_TDDRC_THRD_1 +114 0x1800 //RX_TDDRC_THRD_2 +115 0x1800 //RX_TDDRC_THRD_3 +116 0x3000 //RX_TDDRC_SLANT_0 +117 0x6E00 //RX_TDDRC_SLANT_1 +118 0x1000 //RX_TDDRC_ALPHA_UP_0 +119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +120 0x0000 //RX_TDDRC_HMNC_FLAG +121 0x199A //RX_TDDRC_HMNC_GAIN +122 0x0001 //RX_TDDRC_SMT_FLAG +123 0x0CCD //RX_TDDRC_SMT_W +124 0x04E6 //RX_TDDRC_DRC_GAIN +38 0x001C //RX_FDEQ_SUBNUM +39 0x4840 //RX_FDEQ_GAIN_0 +40 0x4040 //RX_FDEQ_GAIN_1 +41 0x4659 //RX_FDEQ_GAIN_2 +42 0x6474 //RX_FDEQ_GAIN_3 +43 0x7A82 //RX_FDEQ_GAIN_4 +44 0x8180 //RX_FDEQ_GAIN_5 +45 0x8084 //RX_FDEQ_GAIN_6 +46 0x8A88 //RX_FDEQ_GAIN_7 +47 0x8C8C //RX_FDEQ_GAIN_8 +48 0x8A95 //RX_FDEQ_GAIN_9 +49 0x978E //RX_FDEQ_GAIN_10 +50 0x8C8C //RX_FDEQ_GAIN_11 +51 0x7068 //RX_FDEQ_GAIN_12 +52 0x6050 //RX_FDEQ_GAIN_13 +53 0x4848 //RX_FDEQ_GAIN_14 +54 0x4848 //RX_FDEQ_GAIN_15 +55 0x4848 //RX_FDEQ_GAIN_16 +56 0x4848 //RX_FDEQ_GAIN_17 +57 0x4848 //RX_FDEQ_GAIN_18 +58 0x4848 //RX_FDEQ_GAIN_19 +59 0x4848 //RX_FDEQ_GAIN_20 +60 0x4848 //RX_FDEQ_GAIN_21 +61 0x4848 //RX_FDEQ_GAIN_22 +62 0x4848 //RX_FDEQ_GAIN_23 +63 0x0202 //RX_FDEQ_BIN_0 +64 0x0203 //RX_FDEQ_BIN_1 +65 0x0303 //RX_FDEQ_BIN_2 +66 0x0304 //RX_FDEQ_BIN_3 +67 0x0405 //RX_FDEQ_BIN_4 +68 0x0506 //RX_FDEQ_BIN_5 +69 0x0708 //RX_FDEQ_BIN_6 +70 0x090A //RX_FDEQ_BIN_7 +71 0x0B0C //RX_FDEQ_BIN_8 +72 0x0D0E //RX_FDEQ_BIN_9 +73 0x0E0F //RX_FDEQ_BIN_10 +74 0x0F0E //RX_FDEQ_BIN_11 +75 0x100D //RX_FDEQ_BIN_12 +76 0x110A //RX_FDEQ_BIN_13 +77 0x0000 //RX_FDEQ_BIN_14 +78 0x0000 //RX_FDEQ_BIN_15 +79 0x0000 //RX_FDEQ_BIN_16 +80 0x0000 //RX_FDEQ_BIN_17 +81 0x0000 //RX_FDEQ_BIN_18 +82 0x0000 //RX_FDEQ_BIN_19 +83 0x0000 //RX_FDEQ_BIN_20 +84 0x0000 //RX_FDEQ_BIN_21 +85 0x0000 //RX_FDEQ_BIN_22 +86 0x0000 //RX_FDEQ_BIN_23 +87 0x4000 //RX_FDEQ_RESRV_0 +88 0x0320 //RX_FDEQ_RESRV_1 +89 0x0018 //RX_FDDRC_BAND_MARGIN_0 +90 0x0030 //RX_FDDRC_BAND_MARGIN_1 +91 0x0050 //RX_FDDRC_BAND_MARGIN_2 +92 0x0080 //RX_FDDRC_BAND_MARGIN_3 +93 0x0007 //RX_FDDRC_BLOCK_EXP +94 0x5000 //RX_FDDRC_THRD_2_0 +95 0x5000 //RX_FDDRC_THRD_2_1 +96 0x5000 //RX_FDDRC_THRD_2_2 +97 0x5000 //RX_FDDRC_THRD_2_3 +98 0x6400 //RX_FDDRC_THRD_3_0 +99 0x6400 //RX_FDDRC_THRD_3_1 +100 0x6400 //RX_FDDRC_THRD_3_2 +101 0x6400 //RX_FDDRC_THRD_3_3 +102 0x2000 //RX_FDDRC_SLANT_0_0 +103 0x2000 //RX_FDDRC_SLANT_0_1 +104 0x2000 //RX_FDDRC_SLANT_0_2 +105 0x2000 //RX_FDDRC_SLANT_0_3 +106 0x5333 //RX_FDDRC_SLANT_1_0 +107 0x5333 //RX_FDDRC_SLANT_1_1 +108 0x5333 //RX_FDDRC_SLANT_1_2 +109 0x5333 //RX_FDDRC_SLANT_1_3 +110 0x0000 //RX_FDDRC_RESRV_0 +129 0x000B //RX_SPK_VOL +130 0x0000 //RX_VOL_RESRV_0 +#VOL 1 +6 0x1000 //RX_TDDRC_ALPHA_UP_1 +7 0x1000 //RX_TDDRC_ALPHA_UP_2 +8 0x1000 //RX_TDDRC_ALPHA_UP_3 +9 0x1000 //RX_TDDRC_ALPHA_UP_4 +27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +33 0x7000 //RX_TDDRC_LIMITER_THRD +34 0x0800 //RX_TDDRC_LIMITER_GAIN +112 0x0000 //RX_TDDRC_THRD_0 +113 0x0000 //RX_TDDRC_THRD_1 +114 0x1800 //RX_TDDRC_THRD_2 +115 0x1800 //RX_TDDRC_THRD_3 +116 0x3000 //RX_TDDRC_SLANT_0 +117 0x6E00 //RX_TDDRC_SLANT_1 +118 0x1000 //RX_TDDRC_ALPHA_UP_0 +119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +120 0x0000 //RX_TDDRC_HMNC_FLAG +121 0x199A //RX_TDDRC_HMNC_GAIN +122 0x0001 //RX_TDDRC_SMT_FLAG +123 0x0CCD //RX_TDDRC_SMT_W +124 0x04E6 //RX_TDDRC_DRC_GAIN +38 0x001C //RX_FDEQ_SUBNUM +39 0x4840 //RX_FDEQ_GAIN_0 +40 0x4040 //RX_FDEQ_GAIN_1 +41 0x4659 //RX_FDEQ_GAIN_2 +42 0x6474 //RX_FDEQ_GAIN_3 +43 0x7A82 //RX_FDEQ_GAIN_4 +44 0x8180 //RX_FDEQ_GAIN_5 +45 0x8084 //RX_FDEQ_GAIN_6 +46 0x8A88 //RX_FDEQ_GAIN_7 +47 0x8C8C //RX_FDEQ_GAIN_8 +48 0x8A95 //RX_FDEQ_GAIN_9 +49 0x978E //RX_FDEQ_GAIN_10 +50 0x8C8C //RX_FDEQ_GAIN_11 +51 0x7068 //RX_FDEQ_GAIN_12 +52 0x6050 //RX_FDEQ_GAIN_13 +53 0x4848 //RX_FDEQ_GAIN_14 +54 0x4848 //RX_FDEQ_GAIN_15 +55 0x4848 //RX_FDEQ_GAIN_16 +56 0x4848 //RX_FDEQ_GAIN_17 +57 0x4848 //RX_FDEQ_GAIN_18 +58 0x4848 //RX_FDEQ_GAIN_19 +59 0x4848 //RX_FDEQ_GAIN_20 +60 0x4848 //RX_FDEQ_GAIN_21 +61 0x4848 //RX_FDEQ_GAIN_22 +62 0x4848 //RX_FDEQ_GAIN_23 +63 0x0202 //RX_FDEQ_BIN_0 +64 0x0203 //RX_FDEQ_BIN_1 +65 0x0303 //RX_FDEQ_BIN_2 +66 0x0304 //RX_FDEQ_BIN_3 +67 0x0405 //RX_FDEQ_BIN_4 +68 0x0506 //RX_FDEQ_BIN_5 +69 0x0708 //RX_FDEQ_BIN_6 +70 0x090A //RX_FDEQ_BIN_7 +71 0x0B0C //RX_FDEQ_BIN_8 +72 0x0D0E //RX_FDEQ_BIN_9 +73 0x0E0F //RX_FDEQ_BIN_10 +74 0x0F0E //RX_FDEQ_BIN_11 +75 0x100D //RX_FDEQ_BIN_12 +76 0x110A //RX_FDEQ_BIN_13 +77 0x0000 //RX_FDEQ_BIN_14 +78 0x0000 //RX_FDEQ_BIN_15 +79 0x0000 //RX_FDEQ_BIN_16 +80 0x0000 //RX_FDEQ_BIN_17 +81 0x0000 //RX_FDEQ_BIN_18 +82 0x0000 //RX_FDEQ_BIN_19 +83 0x0000 //RX_FDEQ_BIN_20 +84 0x0000 //RX_FDEQ_BIN_21 +85 0x0000 //RX_FDEQ_BIN_22 +86 0x0000 //RX_FDEQ_BIN_23 +87 0x4000 //RX_FDEQ_RESRV_0 +88 0x0320 //RX_FDEQ_RESRV_1 +89 0x0018 //RX_FDDRC_BAND_MARGIN_0 +90 0x0030 //RX_FDDRC_BAND_MARGIN_1 +91 0x0050 //RX_FDDRC_BAND_MARGIN_2 +92 0x0080 //RX_FDDRC_BAND_MARGIN_3 +93 0x0007 //RX_FDDRC_BLOCK_EXP +94 0x5000 //RX_FDDRC_THRD_2_0 +95 0x5000 //RX_FDDRC_THRD_2_1 +96 0x5000 //RX_FDDRC_THRD_2_2 +97 0x5000 //RX_FDDRC_THRD_2_3 +98 0x6400 //RX_FDDRC_THRD_3_0 +99 0x6400 //RX_FDDRC_THRD_3_1 +100 0x6400 //RX_FDDRC_THRD_3_2 +101 0x6400 //RX_FDDRC_THRD_3_3 +102 0x2000 //RX_FDDRC_SLANT_0_0 +103 0x2000 //RX_FDDRC_SLANT_0_1 +104 0x2000 //RX_FDDRC_SLANT_0_2 +105 0x2000 //RX_FDDRC_SLANT_0_3 +106 0x5333 //RX_FDDRC_SLANT_1_0 +107 0x5333 //RX_FDDRC_SLANT_1_1 +108 0x5333 //RX_FDDRC_SLANT_1_2 +109 0x5333 //RX_FDDRC_SLANT_1_3 +110 0x0000 //RX_FDDRC_RESRV_0 +129 0x0012 //RX_SPK_VOL +130 0x0000 //RX_VOL_RESRV_0 +#VOL 2 +6 0x1000 //RX_TDDRC_ALPHA_UP_1 +7 0x1000 //RX_TDDRC_ALPHA_UP_2 +8 0x1000 //RX_TDDRC_ALPHA_UP_3 +9 0x1000 //RX_TDDRC_ALPHA_UP_4 +27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +33 0x7000 //RX_TDDRC_LIMITER_THRD +34 0x0800 //RX_TDDRC_LIMITER_GAIN +112 0x0000 //RX_TDDRC_THRD_0 +113 0x0000 //RX_TDDRC_THRD_1 +114 0x1800 //RX_TDDRC_THRD_2 +115 0x1800 //RX_TDDRC_THRD_3 +116 0x3000 //RX_TDDRC_SLANT_0 +117 0x6E00 //RX_TDDRC_SLANT_1 +118 0x1000 //RX_TDDRC_ALPHA_UP_0 +119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +120 0x0000 //RX_TDDRC_HMNC_FLAG +121 0x199A //RX_TDDRC_HMNC_GAIN +122 0x0001 //RX_TDDRC_SMT_FLAG +123 0x0CCD //RX_TDDRC_SMT_W +124 0x04E6 //RX_TDDRC_DRC_GAIN +38 0x001C //RX_FDEQ_SUBNUM +39 0x4840 //RX_FDEQ_GAIN_0 +40 0x4040 //RX_FDEQ_GAIN_1 +41 0x4659 //RX_FDEQ_GAIN_2 +42 0x6474 //RX_FDEQ_GAIN_3 +43 0x7A82 //RX_FDEQ_GAIN_4 +44 0x8180 //RX_FDEQ_GAIN_5 +45 0x8084 //RX_FDEQ_GAIN_6 +46 0x8A88 //RX_FDEQ_GAIN_7 +47 0x8C8C //RX_FDEQ_GAIN_8 +48 0x8A95 //RX_FDEQ_GAIN_9 +49 0x978E //RX_FDEQ_GAIN_10 +50 0x8C8C //RX_FDEQ_GAIN_11 +51 0x7068 //RX_FDEQ_GAIN_12 +52 0x6050 //RX_FDEQ_GAIN_13 +53 0x4848 //RX_FDEQ_GAIN_14 +54 0x4848 //RX_FDEQ_GAIN_15 +55 0x4848 //RX_FDEQ_GAIN_16 +56 0x4848 //RX_FDEQ_GAIN_17 +57 0x4848 //RX_FDEQ_GAIN_18 +58 0x4848 //RX_FDEQ_GAIN_19 +59 0x4848 //RX_FDEQ_GAIN_20 +60 0x4848 //RX_FDEQ_GAIN_21 +61 0x4848 //RX_FDEQ_GAIN_22 +62 0x4848 //RX_FDEQ_GAIN_23 +63 0x0202 //RX_FDEQ_BIN_0 +64 0x0203 //RX_FDEQ_BIN_1 +65 0x0303 //RX_FDEQ_BIN_2 +66 0x0304 //RX_FDEQ_BIN_3 +67 0x0405 //RX_FDEQ_BIN_4 +68 0x0506 //RX_FDEQ_BIN_5 +69 0x0708 //RX_FDEQ_BIN_6 +70 0x090A //RX_FDEQ_BIN_7 +71 0x0B0C //RX_FDEQ_BIN_8 +72 0x0D0E //RX_FDEQ_BIN_9 +73 0x0E0F //RX_FDEQ_BIN_10 +74 0x0F0E //RX_FDEQ_BIN_11 +75 0x100D //RX_FDEQ_BIN_12 +76 0x110A //RX_FDEQ_BIN_13 +77 0x0000 //RX_FDEQ_BIN_14 +78 0x0000 //RX_FDEQ_BIN_15 +79 0x0000 //RX_FDEQ_BIN_16 +80 0x0000 //RX_FDEQ_BIN_17 +81 0x0000 //RX_FDEQ_BIN_18 +82 0x0000 //RX_FDEQ_BIN_19 +83 0x0000 //RX_FDEQ_BIN_20 +84 0x0000 //RX_FDEQ_BIN_21 +85 0x0000 //RX_FDEQ_BIN_22 +86 0x0000 //RX_FDEQ_BIN_23 +87 0x4000 //RX_FDEQ_RESRV_0 +88 0x0320 //RX_FDEQ_RESRV_1 +89 0x0018 //RX_FDDRC_BAND_MARGIN_0 +90 0x0030 //RX_FDDRC_BAND_MARGIN_1 +91 0x0050 //RX_FDDRC_BAND_MARGIN_2 +92 0x0080 //RX_FDDRC_BAND_MARGIN_3 +93 0x0007 //RX_FDDRC_BLOCK_EXP +94 0x5000 //RX_FDDRC_THRD_2_0 +95 0x5000 //RX_FDDRC_THRD_2_1 +96 0x5000 //RX_FDDRC_THRD_2_2 +97 0x5000 //RX_FDDRC_THRD_2_3 +98 0x6400 //RX_FDDRC_THRD_3_0 +99 0x6400 //RX_FDDRC_THRD_3_1 +100 0x6400 //RX_FDDRC_THRD_3_2 +101 0x6400 //RX_FDDRC_THRD_3_3 +102 0x2000 //RX_FDDRC_SLANT_0_0 +103 0x2000 //RX_FDDRC_SLANT_0_1 +104 0x2000 //RX_FDDRC_SLANT_0_2 +105 0x2000 //RX_FDDRC_SLANT_0_3 +106 0x5333 //RX_FDDRC_SLANT_1_0 +107 0x5333 //RX_FDDRC_SLANT_1_1 +108 0x5333 //RX_FDDRC_SLANT_1_2 +109 0x5333 //RX_FDDRC_SLANT_1_3 +110 0x0000 //RX_FDDRC_RESRV_0 +129 0x001E //RX_SPK_VOL +130 0x0000 //RX_VOL_RESRV_0 +#VOL 3 +6 0x1000 //RX_TDDRC_ALPHA_UP_1 +7 0x1000 //RX_TDDRC_ALPHA_UP_2 +8 0x1000 //RX_TDDRC_ALPHA_UP_3 +9 0x1000 //RX_TDDRC_ALPHA_UP_4 +27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +33 0x7000 //RX_TDDRC_LIMITER_THRD +34 0x0800 //RX_TDDRC_LIMITER_GAIN +112 0x0000 //RX_TDDRC_THRD_0 +113 0x0000 //RX_TDDRC_THRD_1 +114 0x1800 //RX_TDDRC_THRD_2 +115 0x1800 //RX_TDDRC_THRD_3 +116 0x3000 //RX_TDDRC_SLANT_0 +117 0x6E00 //RX_TDDRC_SLANT_1 +118 0x1000 //RX_TDDRC_ALPHA_UP_0 +119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +120 0x0000 //RX_TDDRC_HMNC_FLAG +121 0x199A //RX_TDDRC_HMNC_GAIN +122 0x0001 //RX_TDDRC_SMT_FLAG +123 0x0CCD //RX_TDDRC_SMT_W +124 0x04E6 //RX_TDDRC_DRC_GAIN +38 0x001C //RX_FDEQ_SUBNUM +39 0x4840 //RX_FDEQ_GAIN_0 +40 0x4040 //RX_FDEQ_GAIN_1 +41 0x4659 //RX_FDEQ_GAIN_2 +42 0x6474 //RX_FDEQ_GAIN_3 +43 0x7A82 //RX_FDEQ_GAIN_4 +44 0x8180 //RX_FDEQ_GAIN_5 +45 0x8084 //RX_FDEQ_GAIN_6 +46 0x8A88 //RX_FDEQ_GAIN_7 +47 0x8C8C //RX_FDEQ_GAIN_8 +48 0x8A95 //RX_FDEQ_GAIN_9 +49 0x978E //RX_FDEQ_GAIN_10 +50 0x8C8C //RX_FDEQ_GAIN_11 +51 0x7068 //RX_FDEQ_GAIN_12 +52 0x6050 //RX_FDEQ_GAIN_13 +53 0x4848 //RX_FDEQ_GAIN_14 +54 0x4848 //RX_FDEQ_GAIN_15 +55 0x4848 //RX_FDEQ_GAIN_16 +56 0x4848 //RX_FDEQ_GAIN_17 +57 0x4848 //RX_FDEQ_GAIN_18 +58 0x4848 //RX_FDEQ_GAIN_19 +59 0x4848 //RX_FDEQ_GAIN_20 +60 0x4848 //RX_FDEQ_GAIN_21 +61 0x4848 //RX_FDEQ_GAIN_22 +62 0x4848 //RX_FDEQ_GAIN_23 +63 0x0202 //RX_FDEQ_BIN_0 +64 0x0203 //RX_FDEQ_BIN_1 +65 0x0303 //RX_FDEQ_BIN_2 +66 0x0304 //RX_FDEQ_BIN_3 +67 0x0405 //RX_FDEQ_BIN_4 +68 0x0506 //RX_FDEQ_BIN_5 +69 0x0708 //RX_FDEQ_BIN_6 +70 0x090A //RX_FDEQ_BIN_7 +71 0x0B0C //RX_FDEQ_BIN_8 +72 0x0D0E //RX_FDEQ_BIN_9 +73 0x0E0F //RX_FDEQ_BIN_10 +74 0x0F0E //RX_FDEQ_BIN_11 +75 0x100D //RX_FDEQ_BIN_12 +76 0x110A //RX_FDEQ_BIN_13 +77 0x0000 //RX_FDEQ_BIN_14 +78 0x0000 //RX_FDEQ_BIN_15 +79 0x0000 //RX_FDEQ_BIN_16 +80 0x0000 //RX_FDEQ_BIN_17 +81 0x0000 //RX_FDEQ_BIN_18 +82 0x0000 //RX_FDEQ_BIN_19 +83 0x0000 //RX_FDEQ_BIN_20 +84 0x0000 //RX_FDEQ_BIN_21 +85 0x0000 //RX_FDEQ_BIN_22 +86 0x0000 //RX_FDEQ_BIN_23 +87 0x4000 //RX_FDEQ_RESRV_0 +88 0x0320 //RX_FDEQ_RESRV_1 +89 0x0018 //RX_FDDRC_BAND_MARGIN_0 +90 0x0030 //RX_FDDRC_BAND_MARGIN_1 +91 0x0050 //RX_FDDRC_BAND_MARGIN_2 +92 0x0080 //RX_FDDRC_BAND_MARGIN_3 +93 0x0007 //RX_FDDRC_BLOCK_EXP +94 0x5000 //RX_FDDRC_THRD_2_0 +95 0x5000 //RX_FDDRC_THRD_2_1 +96 0x5000 //RX_FDDRC_THRD_2_2 +97 0x5000 //RX_FDDRC_THRD_2_3 +98 0x6400 //RX_FDDRC_THRD_3_0 +99 0x6400 //RX_FDDRC_THRD_3_1 +100 0x6400 //RX_FDDRC_THRD_3_2 +101 0x6400 //RX_FDDRC_THRD_3_3 +102 0x2000 //RX_FDDRC_SLANT_0_0 +103 0x2000 //RX_FDDRC_SLANT_0_1 +104 0x2000 //RX_FDDRC_SLANT_0_2 +105 0x2000 //RX_FDDRC_SLANT_0_3 +106 0x5333 //RX_FDDRC_SLANT_1_0 +107 0x5333 //RX_FDDRC_SLANT_1_1 +108 0x5333 //RX_FDDRC_SLANT_1_2 +109 0x5333 //RX_FDDRC_SLANT_1_3 +110 0x0000 //RX_FDDRC_RESRV_0 +129 0x0033 //RX_SPK_VOL +130 0x0000 //RX_VOL_RESRV_0 +#VOL 4 +6 0x1000 //RX_TDDRC_ALPHA_UP_1 +7 0x1000 //RX_TDDRC_ALPHA_UP_2 +8 0x1000 //RX_TDDRC_ALPHA_UP_3 +9 0x1000 //RX_TDDRC_ALPHA_UP_4 +27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +33 0x7000 //RX_TDDRC_LIMITER_THRD +34 0x0800 //RX_TDDRC_LIMITER_GAIN +112 0x0000 //RX_TDDRC_THRD_0 +113 0x0000 //RX_TDDRC_THRD_1 +114 0x1800 //RX_TDDRC_THRD_2 +115 0x1800 //RX_TDDRC_THRD_3 +116 0x3000 //RX_TDDRC_SLANT_0 +117 0x6E00 //RX_TDDRC_SLANT_1 +118 0x1000 //RX_TDDRC_ALPHA_UP_0 +119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +120 0x0000 //RX_TDDRC_HMNC_FLAG +121 0x199A //RX_TDDRC_HMNC_GAIN +122 0x0001 //RX_TDDRC_SMT_FLAG +123 0x0CCD //RX_TDDRC_SMT_W +124 0x04E6 //RX_TDDRC_DRC_GAIN +38 0x001C //RX_FDEQ_SUBNUM +39 0x4840 //RX_FDEQ_GAIN_0 +40 0x4040 //RX_FDEQ_GAIN_1 +41 0x4659 //RX_FDEQ_GAIN_2 +42 0x6474 //RX_FDEQ_GAIN_3 +43 0x7A82 //RX_FDEQ_GAIN_4 +44 0x8180 //RX_FDEQ_GAIN_5 +45 0x8084 //RX_FDEQ_GAIN_6 +46 0x8A88 //RX_FDEQ_GAIN_7 +47 0x8C8C //RX_FDEQ_GAIN_8 +48 0x8A95 //RX_FDEQ_GAIN_9 +49 0x978E //RX_FDEQ_GAIN_10 +50 0x8C8C //RX_FDEQ_GAIN_11 +51 0x7068 //RX_FDEQ_GAIN_12 +52 0x6050 //RX_FDEQ_GAIN_13 +53 0x4848 //RX_FDEQ_GAIN_14 +54 0x4848 //RX_FDEQ_GAIN_15 +55 0x4848 //RX_FDEQ_GAIN_16 +56 0x4848 //RX_FDEQ_GAIN_17 +57 0x4848 //RX_FDEQ_GAIN_18 +58 0x4848 //RX_FDEQ_GAIN_19 +59 0x4848 //RX_FDEQ_GAIN_20 +60 0x4848 //RX_FDEQ_GAIN_21 +61 0x4848 //RX_FDEQ_GAIN_22 +62 0x4848 //RX_FDEQ_GAIN_23 +63 0x0202 //RX_FDEQ_BIN_0 +64 0x0203 //RX_FDEQ_BIN_1 +65 0x0303 //RX_FDEQ_BIN_2 +66 0x0304 //RX_FDEQ_BIN_3 +67 0x0405 //RX_FDEQ_BIN_4 +68 0x0506 //RX_FDEQ_BIN_5 +69 0x0708 //RX_FDEQ_BIN_6 +70 0x090A //RX_FDEQ_BIN_7 +71 0x0B0C //RX_FDEQ_BIN_8 +72 0x0D0E //RX_FDEQ_BIN_9 +73 0x0E0F //RX_FDEQ_BIN_10 +74 0x0F0E //RX_FDEQ_BIN_11 +75 0x100D //RX_FDEQ_BIN_12 +76 0x110A //RX_FDEQ_BIN_13 +77 0x0000 //RX_FDEQ_BIN_14 +78 0x0000 //RX_FDEQ_BIN_15 +79 0x0000 //RX_FDEQ_BIN_16 +80 0x0000 //RX_FDEQ_BIN_17 +81 0x0000 //RX_FDEQ_BIN_18 +82 0x0000 //RX_FDEQ_BIN_19 +83 0x0000 //RX_FDEQ_BIN_20 +84 0x0000 //RX_FDEQ_BIN_21 +85 0x0000 //RX_FDEQ_BIN_22 +86 0x0000 //RX_FDEQ_BIN_23 +87 0x4000 //RX_FDEQ_RESRV_0 +88 0x0320 //RX_FDEQ_RESRV_1 +89 0x0018 //RX_FDDRC_BAND_MARGIN_0 +90 0x0030 //RX_FDDRC_BAND_MARGIN_1 +91 0x0050 //RX_FDDRC_BAND_MARGIN_2 +92 0x0080 //RX_FDDRC_BAND_MARGIN_3 +93 0x0007 //RX_FDDRC_BLOCK_EXP +94 0x5000 //RX_FDDRC_THRD_2_0 +95 0x5000 //RX_FDDRC_THRD_2_1 +96 0x5000 //RX_FDDRC_THRD_2_2 +97 0x5000 //RX_FDDRC_THRD_2_3 +98 0x6400 //RX_FDDRC_THRD_3_0 +99 0x6400 //RX_FDDRC_THRD_3_1 +100 0x6400 //RX_FDDRC_THRD_3_2 +101 0x6400 //RX_FDDRC_THRD_3_3 +102 0x2000 //RX_FDDRC_SLANT_0_0 +103 0x2000 //RX_FDDRC_SLANT_0_1 +104 0x2000 //RX_FDDRC_SLANT_0_2 +105 0x2000 //RX_FDDRC_SLANT_0_3 +106 0x5333 //RX_FDDRC_SLANT_1_0 +107 0x5333 //RX_FDDRC_SLANT_1_1 +108 0x5333 //RX_FDDRC_SLANT_1_2 +109 0x5333 //RX_FDDRC_SLANT_1_3 +110 0x0000 //RX_FDDRC_RESRV_0 +129 0x0050 //RX_SPK_VOL +130 0x0000 //RX_VOL_RESRV_0 +#VOL 5 +6 0x1000 //RX_TDDRC_ALPHA_UP_1 +7 0x1000 //RX_TDDRC_ALPHA_UP_2 +8 0x1000 //RX_TDDRC_ALPHA_UP_3 +9 0x1000 //RX_TDDRC_ALPHA_UP_4 +27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +33 0x7000 //RX_TDDRC_LIMITER_THRD +34 0x0800 //RX_TDDRC_LIMITER_GAIN +112 0x0000 //RX_TDDRC_THRD_0 +113 0x0000 //RX_TDDRC_THRD_1 +114 0x1800 //RX_TDDRC_THRD_2 +115 0x1800 //RX_TDDRC_THRD_3 +116 0x3000 //RX_TDDRC_SLANT_0 +117 0x6E00 //RX_TDDRC_SLANT_1 +118 0x1000 //RX_TDDRC_ALPHA_UP_0 +119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +120 0x0000 //RX_TDDRC_HMNC_FLAG +121 0x199A //RX_TDDRC_HMNC_GAIN +122 0x0001 //RX_TDDRC_SMT_FLAG +123 0x0CCD //RX_TDDRC_SMT_W +124 0x04E6 //RX_TDDRC_DRC_GAIN +38 0x001C //RX_FDEQ_SUBNUM +39 0x4840 //RX_FDEQ_GAIN_0 +40 0x4040 //RX_FDEQ_GAIN_1 +41 0x4659 //RX_FDEQ_GAIN_2 +42 0x6474 //RX_FDEQ_GAIN_3 +43 0x7A82 //RX_FDEQ_GAIN_4 +44 0x8180 //RX_FDEQ_GAIN_5 +45 0x8084 //RX_FDEQ_GAIN_6 +46 0x8A88 //RX_FDEQ_GAIN_7 +47 0x8C8C //RX_FDEQ_GAIN_8 +48 0x8A95 //RX_FDEQ_GAIN_9 +49 0x978E //RX_FDEQ_GAIN_10 +50 0x8C8C //RX_FDEQ_GAIN_11 +51 0x7068 //RX_FDEQ_GAIN_12 +52 0x6050 //RX_FDEQ_GAIN_13 +53 0x4848 //RX_FDEQ_GAIN_14 +54 0x4848 //RX_FDEQ_GAIN_15 +55 0x4848 //RX_FDEQ_GAIN_16 +56 0x4848 //RX_FDEQ_GAIN_17 +57 0x4848 //RX_FDEQ_GAIN_18 +58 0x4848 //RX_FDEQ_GAIN_19 +59 0x4848 //RX_FDEQ_GAIN_20 +60 0x4848 //RX_FDEQ_GAIN_21 +61 0x4848 //RX_FDEQ_GAIN_22 +62 0x4848 //RX_FDEQ_GAIN_23 +63 0x0202 //RX_FDEQ_BIN_0 +64 0x0203 //RX_FDEQ_BIN_1 +65 0x0303 //RX_FDEQ_BIN_2 +66 0x0304 //RX_FDEQ_BIN_3 +67 0x0405 //RX_FDEQ_BIN_4 +68 0x0506 //RX_FDEQ_BIN_5 +69 0x0708 //RX_FDEQ_BIN_6 +70 0x090A //RX_FDEQ_BIN_7 +71 0x0B0C //RX_FDEQ_BIN_8 +72 0x0D0E //RX_FDEQ_BIN_9 +73 0x0E0F //RX_FDEQ_BIN_10 +74 0x0F0E //RX_FDEQ_BIN_11 +75 0x100D //RX_FDEQ_BIN_12 +76 0x110A //RX_FDEQ_BIN_13 +77 0x0000 //RX_FDEQ_BIN_14 +78 0x0000 //RX_FDEQ_BIN_15 +79 0x0000 //RX_FDEQ_BIN_16 +80 0x0000 //RX_FDEQ_BIN_17 +81 0x0000 //RX_FDEQ_BIN_18 +82 0x0000 //RX_FDEQ_BIN_19 +83 0x0000 //RX_FDEQ_BIN_20 +84 0x0000 //RX_FDEQ_BIN_21 +85 0x0000 //RX_FDEQ_BIN_22 +86 0x0000 //RX_FDEQ_BIN_23 +87 0x4000 //RX_FDEQ_RESRV_0 +88 0x0320 //RX_FDEQ_RESRV_1 +89 0x0018 //RX_FDDRC_BAND_MARGIN_0 +90 0x0030 //RX_FDDRC_BAND_MARGIN_1 +91 0x0050 //RX_FDDRC_BAND_MARGIN_2 +92 0x0080 //RX_FDDRC_BAND_MARGIN_3 +93 0x0007 //RX_FDDRC_BLOCK_EXP +94 0x5000 //RX_FDDRC_THRD_2_0 +95 0x5000 //RX_FDDRC_THRD_2_1 +96 0x5000 //RX_FDDRC_THRD_2_2 +97 0x5000 //RX_FDDRC_THRD_2_3 +98 0x6400 //RX_FDDRC_THRD_3_0 +99 0x6400 //RX_FDDRC_THRD_3_1 +100 0x6400 //RX_FDDRC_THRD_3_2 +101 0x6400 //RX_FDDRC_THRD_3_3 +102 0x2000 //RX_FDDRC_SLANT_0_0 +103 0x2000 //RX_FDDRC_SLANT_0_1 +104 0x2000 //RX_FDDRC_SLANT_0_2 +105 0x2000 //RX_FDDRC_SLANT_0_3 +106 0x5333 //RX_FDDRC_SLANT_1_0 +107 0x5333 //RX_FDDRC_SLANT_1_1 +108 0x5333 //RX_FDDRC_SLANT_1_2 +109 0x5333 //RX_FDDRC_SLANT_1_3 +110 0x0000 //RX_FDDRC_RESRV_0 +129 0x0086 //RX_SPK_VOL +130 0x0000 //RX_VOL_RESRV_0 +#VOL 6 +6 0x1000 //RX_TDDRC_ALPHA_UP_1 +7 0x1000 //RX_TDDRC_ALPHA_UP_2 +8 0x1000 //RX_TDDRC_ALPHA_UP_3 +9 0x1000 //RX_TDDRC_ALPHA_UP_4 +27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +33 0x7000 //RX_TDDRC_LIMITER_THRD +34 0x0800 //RX_TDDRC_LIMITER_GAIN +112 0x0000 //RX_TDDRC_THRD_0 +113 0x0000 //RX_TDDRC_THRD_1 +114 0x1800 //RX_TDDRC_THRD_2 +115 0x1800 //RX_TDDRC_THRD_3 +116 0x3000 //RX_TDDRC_SLANT_0 +117 0x6E00 //RX_TDDRC_SLANT_1 +118 0x1000 //RX_TDDRC_ALPHA_UP_0 +119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +120 0x0000 //RX_TDDRC_HMNC_FLAG +121 0x199A //RX_TDDRC_HMNC_GAIN +122 0x0001 //RX_TDDRC_SMT_FLAG +123 0x0CCD //RX_TDDRC_SMT_W +124 0x04E6 //RX_TDDRC_DRC_GAIN +38 0x001C //RX_FDEQ_SUBNUM +39 0x4840 //RX_FDEQ_GAIN_0 +40 0x4040 //RX_FDEQ_GAIN_1 +41 0x4659 //RX_FDEQ_GAIN_2 +42 0x6474 //RX_FDEQ_GAIN_3 +43 0x7A82 //RX_FDEQ_GAIN_4 +44 0x8180 //RX_FDEQ_GAIN_5 +45 0x8084 //RX_FDEQ_GAIN_6 +46 0x8A88 //RX_FDEQ_GAIN_7 +47 0x8C8C //RX_FDEQ_GAIN_8 +48 0x8A95 //RX_FDEQ_GAIN_9 +49 0x978E //RX_FDEQ_GAIN_10 +50 0x8C8C //RX_FDEQ_GAIN_11 +51 0x7068 //RX_FDEQ_GAIN_12 +52 0x6050 //RX_FDEQ_GAIN_13 +53 0x4848 //RX_FDEQ_GAIN_14 +54 0x4848 //RX_FDEQ_GAIN_15 +55 0x4848 //RX_FDEQ_GAIN_16 +56 0x4848 //RX_FDEQ_GAIN_17 +57 0x4848 //RX_FDEQ_GAIN_18 +58 0x4848 //RX_FDEQ_GAIN_19 +59 0x4848 //RX_FDEQ_GAIN_20 +60 0x4848 //RX_FDEQ_GAIN_21 +61 0x4848 //RX_FDEQ_GAIN_22 +62 0x4848 //RX_FDEQ_GAIN_23 +63 0x0202 //RX_FDEQ_BIN_0 +64 0x0203 //RX_FDEQ_BIN_1 +65 0x0303 //RX_FDEQ_BIN_2 +66 0x0304 //RX_FDEQ_BIN_3 +67 0x0405 //RX_FDEQ_BIN_4 +68 0x0506 //RX_FDEQ_BIN_5 +69 0x0708 //RX_FDEQ_BIN_6 +70 0x090A //RX_FDEQ_BIN_7 +71 0x0B0C //RX_FDEQ_BIN_8 +72 0x0D0E //RX_FDEQ_BIN_9 +73 0x0E0F //RX_FDEQ_BIN_10 +74 0x0F0E //RX_FDEQ_BIN_11 +75 0x100D //RX_FDEQ_BIN_12 +76 0x110A //RX_FDEQ_BIN_13 +77 0x0000 //RX_FDEQ_BIN_14 +78 0x0000 //RX_FDEQ_BIN_15 +79 0x0000 //RX_FDEQ_BIN_16 +80 0x0000 //RX_FDEQ_BIN_17 +81 0x0000 //RX_FDEQ_BIN_18 +82 0x0000 //RX_FDEQ_BIN_19 +83 0x0000 //RX_FDEQ_BIN_20 +84 0x0000 //RX_FDEQ_BIN_21 +85 0x0000 //RX_FDEQ_BIN_22 +86 0x0000 //RX_FDEQ_BIN_23 +87 0x4000 //RX_FDEQ_RESRV_0 +88 0x0320 //RX_FDEQ_RESRV_1 +89 0x0018 //RX_FDDRC_BAND_MARGIN_0 +90 0x0030 //RX_FDDRC_BAND_MARGIN_1 +91 0x0050 //RX_FDDRC_BAND_MARGIN_2 +92 0x0080 //RX_FDDRC_BAND_MARGIN_3 +93 0x0007 //RX_FDDRC_BLOCK_EXP +94 0x5000 //RX_FDDRC_THRD_2_0 +95 0x5000 //RX_FDDRC_THRD_2_1 +96 0x5000 //RX_FDDRC_THRD_2_2 +97 0x5000 //RX_FDDRC_THRD_2_3 +98 0x6400 //RX_FDDRC_THRD_3_0 +99 0x6400 //RX_FDDRC_THRD_3_1 +100 0x6400 //RX_FDDRC_THRD_3_2 +101 0x6400 //RX_FDDRC_THRD_3_3 +102 0x2000 //RX_FDDRC_SLANT_0_0 +103 0x2000 //RX_FDDRC_SLANT_0_1 +104 0x2000 //RX_FDDRC_SLANT_0_2 +105 0x2000 //RX_FDDRC_SLANT_0_3 +106 0x5333 //RX_FDDRC_SLANT_1_0 +107 0x5333 //RX_FDDRC_SLANT_1_1 +108 0x5333 //RX_FDDRC_SLANT_1_2 +109 0x5333 //RX_FDDRC_SLANT_1_3 +110 0x0000 //RX_FDDRC_RESRV_0 +129 0x0100 //RX_SPK_VOL +130 0x0000 //RX_VOL_RESRV_0 +#RX 2 +157 0x003C //RX_RECVFUNC_MODE_0 +158 0x0000 //RX_RECVFUNC_MODE_1 +159 0x0001 //RX_SAMPLINGFREQ_SIG +160 0x0001 //RX_SAMPLINGFREQ_PROC +161 0x000A //RX_FRAME_SZ +162 0x0000 //RX_DELAY_OPT +163 0x1000 //RX_TDDRC_ALPHA_UP_1 +164 0x1000 //RX_TDDRC_ALPHA_UP_2 +165 0x1000 //RX_TDDRC_ALPHA_UP_3 +166 0x1000 //RX_TDDRC_ALPHA_UP_4 +167 0x0600 //RX_PGA +168 0x7FFF //RX_A_HP +169 0x4000 //RX_B_PE +170 0x7800 //RX_THR_PITCH_DET_0 +171 0x7000 //RX_THR_PITCH_DET_1 +172 0x6000 //RX_THR_PITCH_DET_2 +173 0x0008 //RX_PITCH_BFR_LEN +174 0x0003 //RX_SBD_PITCH_DET +175 0x0100 //RX_PP_RESRV_0 +176 0x0020 //RX_PP_RESRV_1 +177 0x0400 //RX_N_SN_EST +178 0x000C //RX_N2_SN_EST +179 0x0014 //RX_NS_LVL_CTRL +180 0xF800 //RX_THR_SN_EST +181 0x7E00 //RX_LAMBDA_PFILT +182 0x000A //RX_FENS_RESRV_0 +183 0x0190 //RX_FENS_RESRV_1 +184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +187 0x0002 //RX_EXTRA_NS_L +188 0x0800 //RX_EXTRA_NS_A +189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +190 0x7000 //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +192 0x199A //RX_A_POST_FLT +193 0x1000 //RX_LMT_THRD +194 0x7FDF //RX_LMT_ALPHA +195 0x001C //RX_FDEQ_SUBNUM +196 0x4840 //RX_FDEQ_GAIN_0 +197 0x4040 //RX_FDEQ_GAIN_1 +198 0x4659 //RX_FDEQ_GAIN_2 +199 0x6474 //RX_FDEQ_GAIN_3 +200 0x7A82 //RX_FDEQ_GAIN_4 +201 0x8180 //RX_FDEQ_GAIN_5 +202 0x8084 //RX_FDEQ_GAIN_6 +203 0x8A88 //RX_FDEQ_GAIN_7 +204 0x8C8C //RX_FDEQ_GAIN_8 +205 0x8A95 //RX_FDEQ_GAIN_9 +206 0x978E //RX_FDEQ_GAIN_10 +207 0x8C8C //RX_FDEQ_GAIN_11 +208 0x7068 //RX_FDEQ_GAIN_12 +209 0x6050 //RX_FDEQ_GAIN_13 +210 0x4848 //RX_FDEQ_GAIN_14 +211 0x4848 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0202 //RX_FDEQ_BIN_0 +221 0x0203 //RX_FDEQ_BIN_1 +222 0x0303 //RX_FDEQ_BIN_2 +223 0x0304 //RX_FDEQ_BIN_3 +224 0x0405 //RX_FDEQ_BIN_4 +225 0x0506 //RX_FDEQ_BIN_5 +226 0x0708 //RX_FDEQ_BIN_6 +227 0x090A //RX_FDEQ_BIN_7 +228 0x0B0C //RX_FDEQ_BIN_8 +229 0x0D0E //RX_FDEQ_BIN_9 +230 0x0E0F //RX_FDEQ_BIN_10 +231 0x0F0E //RX_FDEQ_BIN_11 +232 0x100D //RX_FDEQ_BIN_12 +233 0x110A //RX_FDEQ_BIN_13 +234 0x0000 //RX_FDEQ_BIN_14 +235 0x0000 //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x4000 //RX_FDEQ_RESRV_0 +245 0x0320 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0030 //RX_FDDRC_BAND_MARGIN_1 +248 0x0050 //RX_FDDRC_BAND_MARGIN_2 +249 0x0080 //RX_FDDRC_BAND_MARGIN_3 +250 0x0007 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x5000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x6400 //RX_FDDRC_THRD_3_2 +258 0x6400 //RX_FDDRC_THRD_3_3 +259 0x2000 //RX_FDDRC_SLANT_0_0 +260 0x2000 //RX_FDDRC_SLANT_0_1 +261 0x2000 //RX_FDDRC_SLANT_0_2 +262 0x2000 //RX_FDDRC_SLANT_0_3 +263 0x5333 //RX_FDDRC_SLANT_1_0 +264 0x5333 //RX_FDDRC_SLANT_1_1 +265 0x5333 //RX_FDDRC_SLANT_1_2 +266 0x5333 //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +268 0x0002 //RX_FILTINDX +269 0x0000 //RX_TDDRC_THRD_0 +270 0x0000 //RX_TDDRC_THRD_1 +271 0x1800 //RX_TDDRC_THRD_2 +272 0x1800 //RX_TDDRC_THRD_3 +273 0x3000 //RX_TDDRC_SLANT_0 +274 0x6E00 //RX_TDDRC_SLANT_1 +275 0x1000 //RX_TDDRC_ALPHA_UP_0 +276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x199A //RX_TDDRC_HMNC_GAIN +279 0x0001 //RX_TDDRC_SMT_FLAG +280 0x0CCD //RX_TDDRC_SMT_W +281 0x04E6 //RX_TDDRC_DRC_GAIN +282 0x7C00 //RX_LAMBDA_PKA_FP +283 0x13E0 //RX_TPKA_FP +284 0x0080 //RX_MIN_G_FP +285 0x2000 //RX_MAX_G_FP +286 0x000B //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 +288 0x0000 //RX_MAXLEVEL_CNG +289 0x3000 //RX_BWE_UV_TH +290 0x3000 //RX_BWE_UV_TH2 +291 0x1800 //RX_BWE_UV_TH3 +292 0x1000 //RX_BWE_V_TH +293 0x04CD //RX_BWE_GAIN1_V_TH1 +294 0x0F33 //RX_BWE_GAIN1_V_TH2 +295 0x7333 //RX_BWE_UV_EQ +296 0x199A //RX_BWE_V_EQ +297 0x7333 //RX_BWE_TONE_TH +298 0x0004 //RX_BWE_UV_HOLD_T +299 0x6CCD //RX_BWE_GAIN2_ALPHA +300 0x799A //RX_BWE_GAIN3_ALPHA +301 0x001E //RX_BWE_CUTOFF +302 0x3000 //RX_BWE_GAINFILL +303 0x3200 //RX_BWE_MAXTH_TONE +304 0x2000 //RX_BWE_EQ_0 +305 0x2000 //RX_BWE_EQ_1 +306 0x2000 //RX_BWE_EQ_2 +307 0x2000 //RX_BWE_EQ_3 +308 0x2000 //RX_BWE_EQ_4 +309 0x2000 //RX_BWE_EQ_5 +310 0x2000 //RX_BWE_EQ_6 +311 0x0000 //RX_BWE_RESRV_0 +312 0x0000 //RX_BWE_RESRV_1 +313 0x0000 //RX_BWE_RESRV_2 +#VOL 0 +163 0x1000 //RX_TDDRC_ALPHA_UP_1 +164 0x1000 //RX_TDDRC_ALPHA_UP_2 +165 0x1000 //RX_TDDRC_ALPHA_UP_3 +166 0x1000 //RX_TDDRC_ALPHA_UP_4 +184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +190 0x7000 //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +269 0x0000 //RX_TDDRC_THRD_0 +270 0x0000 //RX_TDDRC_THRD_1 +271 0x1800 //RX_TDDRC_THRD_2 +272 0x1800 //RX_TDDRC_THRD_3 +273 0x3000 //RX_TDDRC_SLANT_0 +274 0x6E00 //RX_TDDRC_SLANT_1 +275 0x1000 //RX_TDDRC_ALPHA_UP_0 +276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x199A //RX_TDDRC_HMNC_GAIN +279 0x0001 //RX_TDDRC_SMT_FLAG +280 0x0CCD //RX_TDDRC_SMT_W +281 0x04E6 //RX_TDDRC_DRC_GAIN +195 0x001C //RX_FDEQ_SUBNUM +196 0x4840 //RX_FDEQ_GAIN_0 +197 0x4040 //RX_FDEQ_GAIN_1 +198 0x4659 //RX_FDEQ_GAIN_2 +199 0x6474 //RX_FDEQ_GAIN_3 +200 0x7A82 //RX_FDEQ_GAIN_4 +201 0x8180 //RX_FDEQ_GAIN_5 +202 0x8084 //RX_FDEQ_GAIN_6 +203 0x8A88 //RX_FDEQ_GAIN_7 +204 0x8C8C //RX_FDEQ_GAIN_8 +205 0x8A95 //RX_FDEQ_GAIN_9 +206 0x978E //RX_FDEQ_GAIN_10 +207 0x8C8C //RX_FDEQ_GAIN_11 +208 0x7068 //RX_FDEQ_GAIN_12 +209 0x6050 //RX_FDEQ_GAIN_13 +210 0x4848 //RX_FDEQ_GAIN_14 +211 0x4848 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0202 //RX_FDEQ_BIN_0 +221 0x0203 //RX_FDEQ_BIN_1 +222 0x0303 //RX_FDEQ_BIN_2 +223 0x0304 //RX_FDEQ_BIN_3 +224 0x0405 //RX_FDEQ_BIN_4 +225 0x0506 //RX_FDEQ_BIN_5 +226 0x0708 //RX_FDEQ_BIN_6 +227 0x090A //RX_FDEQ_BIN_7 +228 0x0B0C //RX_FDEQ_BIN_8 +229 0x0D0E //RX_FDEQ_BIN_9 +230 0x0E0F //RX_FDEQ_BIN_10 +231 0x0F0E //RX_FDEQ_BIN_11 +232 0x100D //RX_FDEQ_BIN_12 +233 0x110A //RX_FDEQ_BIN_13 +234 0x0000 //RX_FDEQ_BIN_14 +235 0x0000 //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x4000 //RX_FDEQ_RESRV_0 +245 0x0320 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0030 //RX_FDDRC_BAND_MARGIN_1 +248 0x0050 //RX_FDDRC_BAND_MARGIN_2 +249 0x0080 //RX_FDDRC_BAND_MARGIN_3 +250 0x0007 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x5000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x6400 //RX_FDDRC_THRD_3_2 +258 0x6400 //RX_FDDRC_THRD_3_3 +259 0x2000 //RX_FDDRC_SLANT_0_0 +260 0x2000 //RX_FDDRC_SLANT_0_1 +261 0x2000 //RX_FDDRC_SLANT_0_2 +262 0x2000 //RX_FDDRC_SLANT_0_3 +263 0x5333 //RX_FDDRC_SLANT_1_0 +264 0x5333 //RX_FDDRC_SLANT_1_1 +265 0x5333 //RX_FDDRC_SLANT_1_2 +266 0x5333 //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +286 0x000B //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 +#VOL 1 +163 0x1000 //RX_TDDRC_ALPHA_UP_1 +164 0x1000 //RX_TDDRC_ALPHA_UP_2 +165 0x1000 //RX_TDDRC_ALPHA_UP_3 +166 0x1000 //RX_TDDRC_ALPHA_UP_4 +184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +190 0x7000 //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +269 0x0000 //RX_TDDRC_THRD_0 +270 0x0000 //RX_TDDRC_THRD_1 +271 0x1800 //RX_TDDRC_THRD_2 +272 0x1800 //RX_TDDRC_THRD_3 +273 0x3000 //RX_TDDRC_SLANT_0 +274 0x6E00 //RX_TDDRC_SLANT_1 +275 0x1000 //RX_TDDRC_ALPHA_UP_0 +276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x199A //RX_TDDRC_HMNC_GAIN +279 0x0001 //RX_TDDRC_SMT_FLAG +280 0x0CCD //RX_TDDRC_SMT_W +281 0x04E6 //RX_TDDRC_DRC_GAIN +195 0x001C //RX_FDEQ_SUBNUM +196 0x4840 //RX_FDEQ_GAIN_0 +197 0x4040 //RX_FDEQ_GAIN_1 +198 0x4659 //RX_FDEQ_GAIN_2 +199 0x6474 //RX_FDEQ_GAIN_3 +200 0x7A82 //RX_FDEQ_GAIN_4 +201 0x8180 //RX_FDEQ_GAIN_5 +202 0x8084 //RX_FDEQ_GAIN_6 +203 0x8A88 //RX_FDEQ_GAIN_7 +204 0x8C8C //RX_FDEQ_GAIN_8 +205 0x8A95 //RX_FDEQ_GAIN_9 +206 0x978E //RX_FDEQ_GAIN_10 +207 0x8C8C //RX_FDEQ_GAIN_11 +208 0x7068 //RX_FDEQ_GAIN_12 +209 0x6050 //RX_FDEQ_GAIN_13 +210 0x4848 //RX_FDEQ_GAIN_14 +211 0x4848 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0202 //RX_FDEQ_BIN_0 +221 0x0203 //RX_FDEQ_BIN_1 +222 0x0303 //RX_FDEQ_BIN_2 +223 0x0304 //RX_FDEQ_BIN_3 +224 0x0405 //RX_FDEQ_BIN_4 +225 0x0506 //RX_FDEQ_BIN_5 +226 0x0708 //RX_FDEQ_BIN_6 +227 0x090A //RX_FDEQ_BIN_7 +228 0x0B0C //RX_FDEQ_BIN_8 +229 0x0D0E //RX_FDEQ_BIN_9 +230 0x0E0F //RX_FDEQ_BIN_10 +231 0x0F0E //RX_FDEQ_BIN_11 +232 0x100D //RX_FDEQ_BIN_12 +233 0x110A //RX_FDEQ_BIN_13 +234 0x0000 //RX_FDEQ_BIN_14 +235 0x0000 //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x4000 //RX_FDEQ_RESRV_0 +245 0x0320 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0030 //RX_FDDRC_BAND_MARGIN_1 +248 0x0050 //RX_FDDRC_BAND_MARGIN_2 +249 0x0080 //RX_FDDRC_BAND_MARGIN_3 +250 0x0007 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x5000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x6400 //RX_FDDRC_THRD_3_2 +258 0x6400 //RX_FDDRC_THRD_3_3 +259 0x2000 //RX_FDDRC_SLANT_0_0 +260 0x2000 //RX_FDDRC_SLANT_0_1 +261 0x2000 //RX_FDDRC_SLANT_0_2 +262 0x2000 //RX_FDDRC_SLANT_0_3 +263 0x5333 //RX_FDDRC_SLANT_1_0 +264 0x5333 //RX_FDDRC_SLANT_1_1 +265 0x5333 //RX_FDDRC_SLANT_1_2 +266 0x5333 //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +286 0x0012 //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 +#VOL 2 +163 0x1000 //RX_TDDRC_ALPHA_UP_1 +164 0x1000 //RX_TDDRC_ALPHA_UP_2 +165 0x1000 //RX_TDDRC_ALPHA_UP_3 +166 0x1000 //RX_TDDRC_ALPHA_UP_4 +184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +190 0x7000 //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +269 0x0000 //RX_TDDRC_THRD_0 +270 0x0000 //RX_TDDRC_THRD_1 +271 0x1800 //RX_TDDRC_THRD_2 +272 0x1800 //RX_TDDRC_THRD_3 +273 0x3000 //RX_TDDRC_SLANT_0 +274 0x6E00 //RX_TDDRC_SLANT_1 +275 0x1000 //RX_TDDRC_ALPHA_UP_0 +276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x199A //RX_TDDRC_HMNC_GAIN +279 0x0001 //RX_TDDRC_SMT_FLAG +280 0x0CCD //RX_TDDRC_SMT_W +281 0x04E6 //RX_TDDRC_DRC_GAIN +195 0x001C //RX_FDEQ_SUBNUM +196 0x4840 //RX_FDEQ_GAIN_0 +197 0x4040 //RX_FDEQ_GAIN_1 +198 0x4659 //RX_FDEQ_GAIN_2 +199 0x6474 //RX_FDEQ_GAIN_3 +200 0x7A82 //RX_FDEQ_GAIN_4 +201 0x8180 //RX_FDEQ_GAIN_5 +202 0x8084 //RX_FDEQ_GAIN_6 +203 0x8A88 //RX_FDEQ_GAIN_7 +204 0x8C8C //RX_FDEQ_GAIN_8 +205 0x8A95 //RX_FDEQ_GAIN_9 +206 0x978E //RX_FDEQ_GAIN_10 +207 0x8C8C //RX_FDEQ_GAIN_11 +208 0x7068 //RX_FDEQ_GAIN_12 +209 0x6050 //RX_FDEQ_GAIN_13 +210 0x4848 //RX_FDEQ_GAIN_14 +211 0x4848 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0202 //RX_FDEQ_BIN_0 +221 0x0203 //RX_FDEQ_BIN_1 +222 0x0303 //RX_FDEQ_BIN_2 +223 0x0304 //RX_FDEQ_BIN_3 +224 0x0405 //RX_FDEQ_BIN_4 +225 0x0506 //RX_FDEQ_BIN_5 +226 0x0708 //RX_FDEQ_BIN_6 +227 0x090A //RX_FDEQ_BIN_7 +228 0x0B0C //RX_FDEQ_BIN_8 +229 0x0D0E //RX_FDEQ_BIN_9 +230 0x0E0F //RX_FDEQ_BIN_10 +231 0x0F0E //RX_FDEQ_BIN_11 +232 0x100D //RX_FDEQ_BIN_12 +233 0x110A //RX_FDEQ_BIN_13 +234 0x0000 //RX_FDEQ_BIN_14 +235 0x0000 //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x4000 //RX_FDEQ_RESRV_0 +245 0x0320 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0030 //RX_FDDRC_BAND_MARGIN_1 +248 0x0050 //RX_FDDRC_BAND_MARGIN_2 +249 0x0080 //RX_FDDRC_BAND_MARGIN_3 +250 0x0007 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x5000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x6400 //RX_FDDRC_THRD_3_2 +258 0x6400 //RX_FDDRC_THRD_3_3 +259 0x2000 //RX_FDDRC_SLANT_0_0 +260 0x2000 //RX_FDDRC_SLANT_0_1 +261 0x2000 //RX_FDDRC_SLANT_0_2 +262 0x2000 //RX_FDDRC_SLANT_0_3 +263 0x5333 //RX_FDDRC_SLANT_1_0 +264 0x5333 //RX_FDDRC_SLANT_1_1 +265 0x5333 //RX_FDDRC_SLANT_1_2 +266 0x5333 //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +286 0x001E //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 +#VOL 3 +163 0x1000 //RX_TDDRC_ALPHA_UP_1 +164 0x1000 //RX_TDDRC_ALPHA_UP_2 +165 0x1000 //RX_TDDRC_ALPHA_UP_3 +166 0x1000 //RX_TDDRC_ALPHA_UP_4 +184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +190 0x7000 //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +269 0x0000 //RX_TDDRC_THRD_0 +270 0x0000 //RX_TDDRC_THRD_1 +271 0x1800 //RX_TDDRC_THRD_2 +272 0x1800 //RX_TDDRC_THRD_3 +273 0x3000 //RX_TDDRC_SLANT_0 +274 0x6E00 //RX_TDDRC_SLANT_1 +275 0x1000 //RX_TDDRC_ALPHA_UP_0 +276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x199A //RX_TDDRC_HMNC_GAIN +279 0x0001 //RX_TDDRC_SMT_FLAG +280 0x0CCD //RX_TDDRC_SMT_W +281 0x04E6 //RX_TDDRC_DRC_GAIN +195 0x001C //RX_FDEQ_SUBNUM +196 0x4840 //RX_FDEQ_GAIN_0 +197 0x4040 //RX_FDEQ_GAIN_1 +198 0x4659 //RX_FDEQ_GAIN_2 +199 0x6474 //RX_FDEQ_GAIN_3 +200 0x7A82 //RX_FDEQ_GAIN_4 +201 0x8180 //RX_FDEQ_GAIN_5 +202 0x8084 //RX_FDEQ_GAIN_6 +203 0x8A88 //RX_FDEQ_GAIN_7 +204 0x8C8C //RX_FDEQ_GAIN_8 +205 0x8A95 //RX_FDEQ_GAIN_9 +206 0x978E //RX_FDEQ_GAIN_10 +207 0x8C8C //RX_FDEQ_GAIN_11 +208 0x7068 //RX_FDEQ_GAIN_12 +209 0x6050 //RX_FDEQ_GAIN_13 +210 0x4848 //RX_FDEQ_GAIN_14 +211 0x4848 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0202 //RX_FDEQ_BIN_0 +221 0x0203 //RX_FDEQ_BIN_1 +222 0x0303 //RX_FDEQ_BIN_2 +223 0x0304 //RX_FDEQ_BIN_3 +224 0x0405 //RX_FDEQ_BIN_4 +225 0x0506 //RX_FDEQ_BIN_5 +226 0x0708 //RX_FDEQ_BIN_6 +227 0x090A //RX_FDEQ_BIN_7 +228 0x0B0C //RX_FDEQ_BIN_8 +229 0x0D0E //RX_FDEQ_BIN_9 +230 0x0E0F //RX_FDEQ_BIN_10 +231 0x0F0E //RX_FDEQ_BIN_11 +232 0x100D //RX_FDEQ_BIN_12 +233 0x110A //RX_FDEQ_BIN_13 +234 0x0000 //RX_FDEQ_BIN_14 +235 0x0000 //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x4000 //RX_FDEQ_RESRV_0 +245 0x0320 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0030 //RX_FDDRC_BAND_MARGIN_1 +248 0x0050 //RX_FDDRC_BAND_MARGIN_2 +249 0x0080 //RX_FDDRC_BAND_MARGIN_3 +250 0x0007 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x5000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x6400 //RX_FDDRC_THRD_3_2 +258 0x6400 //RX_FDDRC_THRD_3_3 +259 0x2000 //RX_FDDRC_SLANT_0_0 +260 0x2000 //RX_FDDRC_SLANT_0_1 +261 0x2000 //RX_FDDRC_SLANT_0_2 +262 0x2000 //RX_FDDRC_SLANT_0_3 +263 0x5333 //RX_FDDRC_SLANT_1_0 +264 0x5333 //RX_FDDRC_SLANT_1_1 +265 0x5333 //RX_FDDRC_SLANT_1_2 +266 0x5333 //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +286 0x0031 //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 +#VOL 4 +163 0x1000 //RX_TDDRC_ALPHA_UP_1 +164 0x1000 //RX_TDDRC_ALPHA_UP_2 +165 0x1000 //RX_TDDRC_ALPHA_UP_3 +166 0x1000 //RX_TDDRC_ALPHA_UP_4 +184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +190 0x7000 //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +269 0x0000 //RX_TDDRC_THRD_0 +270 0x0000 //RX_TDDRC_THRD_1 +271 0x1800 //RX_TDDRC_THRD_2 +272 0x1800 //RX_TDDRC_THRD_3 +273 0x3000 //RX_TDDRC_SLANT_0 +274 0x6E00 //RX_TDDRC_SLANT_1 +275 0x1000 //RX_TDDRC_ALPHA_UP_0 +276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x199A //RX_TDDRC_HMNC_GAIN +279 0x0001 //RX_TDDRC_SMT_FLAG +280 0x0CCD //RX_TDDRC_SMT_W +281 0x04E6 //RX_TDDRC_DRC_GAIN +195 0x001C //RX_FDEQ_SUBNUM +196 0x4840 //RX_FDEQ_GAIN_0 +197 0x4040 //RX_FDEQ_GAIN_1 +198 0x4659 //RX_FDEQ_GAIN_2 +199 0x6474 //RX_FDEQ_GAIN_3 +200 0x7A82 //RX_FDEQ_GAIN_4 +201 0x8180 //RX_FDEQ_GAIN_5 +202 0x8084 //RX_FDEQ_GAIN_6 +203 0x8A88 //RX_FDEQ_GAIN_7 +204 0x8C8C //RX_FDEQ_GAIN_8 +205 0x8A95 //RX_FDEQ_GAIN_9 +206 0x978E //RX_FDEQ_GAIN_10 +207 0x8C8C //RX_FDEQ_GAIN_11 +208 0x7068 //RX_FDEQ_GAIN_12 +209 0x6050 //RX_FDEQ_GAIN_13 +210 0x4848 //RX_FDEQ_GAIN_14 +211 0x4848 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0202 //RX_FDEQ_BIN_0 +221 0x0203 //RX_FDEQ_BIN_1 +222 0x0303 //RX_FDEQ_BIN_2 +223 0x0304 //RX_FDEQ_BIN_3 +224 0x0405 //RX_FDEQ_BIN_4 +225 0x0506 //RX_FDEQ_BIN_5 +226 0x0708 //RX_FDEQ_BIN_6 +227 0x090A //RX_FDEQ_BIN_7 +228 0x0B0C //RX_FDEQ_BIN_8 +229 0x0D0E //RX_FDEQ_BIN_9 +230 0x0E0F //RX_FDEQ_BIN_10 +231 0x0F0E //RX_FDEQ_BIN_11 +232 0x100D //RX_FDEQ_BIN_12 +233 0x110A //RX_FDEQ_BIN_13 +234 0x0000 //RX_FDEQ_BIN_14 +235 0x0000 //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x4000 //RX_FDEQ_RESRV_0 +245 0x0320 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0030 //RX_FDDRC_BAND_MARGIN_1 +248 0x0050 //RX_FDDRC_BAND_MARGIN_2 +249 0x0080 //RX_FDDRC_BAND_MARGIN_3 +250 0x0007 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x5000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x6400 //RX_FDDRC_THRD_3_2 +258 0x6400 //RX_FDDRC_THRD_3_3 +259 0x2000 //RX_FDDRC_SLANT_0_0 +260 0x2000 //RX_FDDRC_SLANT_0_1 +261 0x2000 //RX_FDDRC_SLANT_0_2 +262 0x2000 //RX_FDDRC_SLANT_0_3 +263 0x5333 //RX_FDDRC_SLANT_1_0 +264 0x5333 //RX_FDDRC_SLANT_1_1 +265 0x5333 //RX_FDDRC_SLANT_1_2 +266 0x5333 //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +286 0x0050 //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 +#VOL 5 +163 0x1000 //RX_TDDRC_ALPHA_UP_1 +164 0x1000 //RX_TDDRC_ALPHA_UP_2 +165 0x1000 //RX_TDDRC_ALPHA_UP_3 +166 0x1000 //RX_TDDRC_ALPHA_UP_4 +184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +190 0x7000 //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +269 0x0000 //RX_TDDRC_THRD_0 +270 0x0000 //RX_TDDRC_THRD_1 +271 0x1800 //RX_TDDRC_THRD_2 +272 0x1800 //RX_TDDRC_THRD_3 +273 0x3000 //RX_TDDRC_SLANT_0 +274 0x6E00 //RX_TDDRC_SLANT_1 +275 0x1000 //RX_TDDRC_ALPHA_UP_0 +276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x199A //RX_TDDRC_HMNC_GAIN +279 0x0001 //RX_TDDRC_SMT_FLAG +280 0x0CCD //RX_TDDRC_SMT_W +281 0x04E6 //RX_TDDRC_DRC_GAIN +195 0x001C //RX_FDEQ_SUBNUM +196 0x4840 //RX_FDEQ_GAIN_0 +197 0x4040 //RX_FDEQ_GAIN_1 +198 0x4659 //RX_FDEQ_GAIN_2 +199 0x6474 //RX_FDEQ_GAIN_3 +200 0x7A82 //RX_FDEQ_GAIN_4 +201 0x8180 //RX_FDEQ_GAIN_5 +202 0x8084 //RX_FDEQ_GAIN_6 +203 0x8A88 //RX_FDEQ_GAIN_7 +204 0x8C8C //RX_FDEQ_GAIN_8 +205 0x8A95 //RX_FDEQ_GAIN_9 +206 0x978E //RX_FDEQ_GAIN_10 +207 0x8C8C //RX_FDEQ_GAIN_11 +208 0x7068 //RX_FDEQ_GAIN_12 +209 0x6050 //RX_FDEQ_GAIN_13 +210 0x4848 //RX_FDEQ_GAIN_14 +211 0x4848 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0202 //RX_FDEQ_BIN_0 +221 0x0203 //RX_FDEQ_BIN_1 +222 0x0303 //RX_FDEQ_BIN_2 +223 0x0304 //RX_FDEQ_BIN_3 +224 0x0405 //RX_FDEQ_BIN_4 +225 0x0506 //RX_FDEQ_BIN_5 +226 0x0708 //RX_FDEQ_BIN_6 +227 0x090A //RX_FDEQ_BIN_7 +228 0x0B0C //RX_FDEQ_BIN_8 +229 0x0D0E //RX_FDEQ_BIN_9 +230 0x0E0F //RX_FDEQ_BIN_10 +231 0x0F0E //RX_FDEQ_BIN_11 +232 0x100D //RX_FDEQ_BIN_12 +233 0x110A //RX_FDEQ_BIN_13 +234 0x0000 //RX_FDEQ_BIN_14 +235 0x0000 //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x4000 //RX_FDEQ_RESRV_0 +245 0x0320 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0030 //RX_FDDRC_BAND_MARGIN_1 +248 0x0050 //RX_FDDRC_BAND_MARGIN_2 +249 0x0080 //RX_FDDRC_BAND_MARGIN_3 +250 0x0007 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x5000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x6400 //RX_FDDRC_THRD_3_2 +258 0x6400 //RX_FDDRC_THRD_3_3 +259 0x2000 //RX_FDDRC_SLANT_0_0 +260 0x2000 //RX_FDDRC_SLANT_0_1 +261 0x2000 //RX_FDDRC_SLANT_0_2 +262 0x2000 //RX_FDDRC_SLANT_0_3 +263 0x5333 //RX_FDDRC_SLANT_1_0 +264 0x5333 //RX_FDDRC_SLANT_1_1 +265 0x5333 //RX_FDDRC_SLANT_1_2 +266 0x5333 //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +286 0x0086 //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 +#VOL 6 +163 0x1000 //RX_TDDRC_ALPHA_UP_1 +164 0x1000 //RX_TDDRC_ALPHA_UP_2 +165 0x1000 //RX_TDDRC_ALPHA_UP_3 +166 0x1000 //RX_TDDRC_ALPHA_UP_4 +184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +190 0x7000 //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +269 0x0000 //RX_TDDRC_THRD_0 +270 0x0000 //RX_TDDRC_THRD_1 +271 0x1800 //RX_TDDRC_THRD_2 +272 0x1800 //RX_TDDRC_THRD_3 +273 0x3000 //RX_TDDRC_SLANT_0 +274 0x6E00 //RX_TDDRC_SLANT_1 +275 0x1000 //RX_TDDRC_ALPHA_UP_0 +276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x199A //RX_TDDRC_HMNC_GAIN +279 0x0001 //RX_TDDRC_SMT_FLAG +280 0x0CCD //RX_TDDRC_SMT_W +281 0x04E6 //RX_TDDRC_DRC_GAIN +195 0x001C //RX_FDEQ_SUBNUM +196 0x4840 //RX_FDEQ_GAIN_0 +197 0x4040 //RX_FDEQ_GAIN_1 +198 0x4659 //RX_FDEQ_GAIN_2 +199 0x6474 //RX_FDEQ_GAIN_3 +200 0x7A82 //RX_FDEQ_GAIN_4 +201 0x8180 //RX_FDEQ_GAIN_5 +202 0x8084 //RX_FDEQ_GAIN_6 +203 0x8A88 //RX_FDEQ_GAIN_7 +204 0x8C8C //RX_FDEQ_GAIN_8 +205 0x8A95 //RX_FDEQ_GAIN_9 +206 0x978E //RX_FDEQ_GAIN_10 +207 0x8C8C //RX_FDEQ_GAIN_11 +208 0x7068 //RX_FDEQ_GAIN_12 +209 0x6050 //RX_FDEQ_GAIN_13 +210 0x4848 //RX_FDEQ_GAIN_14 +211 0x4848 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0202 //RX_FDEQ_BIN_0 +221 0x0203 //RX_FDEQ_BIN_1 +222 0x0303 //RX_FDEQ_BIN_2 +223 0x0304 //RX_FDEQ_BIN_3 +224 0x0405 //RX_FDEQ_BIN_4 +225 0x0506 //RX_FDEQ_BIN_5 +226 0x0708 //RX_FDEQ_BIN_6 +227 0x090A //RX_FDEQ_BIN_7 +228 0x0B0C //RX_FDEQ_BIN_8 +229 0x0D0E //RX_FDEQ_BIN_9 +230 0x0E0F //RX_FDEQ_BIN_10 +231 0x0F0E //RX_FDEQ_BIN_11 +232 0x100D //RX_FDEQ_BIN_12 +233 0x110A //RX_FDEQ_BIN_13 +234 0x0000 //RX_FDEQ_BIN_14 +235 0x0000 //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x4000 //RX_FDEQ_RESRV_0 +245 0x0320 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0030 //RX_FDDRC_BAND_MARGIN_1 +248 0x0050 //RX_FDDRC_BAND_MARGIN_2 +249 0x0080 //RX_FDDRC_BAND_MARGIN_3 +250 0x0007 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x5000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x6400 //RX_FDDRC_THRD_3_2 +258 0x6400 //RX_FDDRC_THRD_3_3 +259 0x2000 //RX_FDDRC_SLANT_0_0 +260 0x2000 //RX_FDDRC_SLANT_0_1 +261 0x2000 //RX_FDDRC_SLANT_0_2 +262 0x2000 //RX_FDDRC_SLANT_0_3 +263 0x5333 //RX_FDDRC_SLANT_1_0 +264 0x5333 //RX_FDDRC_SLANT_1_1 +265 0x5333 //RX_FDDRC_SLANT_1_2 +266 0x5333 //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +286 0x0100 //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 + +#CASE_NAME HANDSET-HANDSET-TMOBILE_US-SWB +#PARAM_MODE Full +#PARAM_TYPE TX+2RX +#TOTAL_CUSTOM_STEP 7+7 +#TX +0 0x0000 //TX_OPERATION_MODE_0 +1 0x0000 //TX_OPERATION_MODE_1 +2 0x0076 //TX_PATCH_REG +3 0x6F7E //TX_SENDFUNC_MODE_0 +4 0x0001 //TX_SENDFUNC_MODE_1 +5 0x0002 //TX_NUM_MIC +6 0x0003 //TX_SAMPLINGFREQ_SIG +7 0x0003 //TX_SAMPLINGFREQ_PROC +8 0x000A //TX_FRAME_SZ_SIG +9 0x000A //TX_FRAME_SZ +10 0x0000 //TX_DELAY_OPT +11 0x0028 //TX_MAX_TAIL_LENGTH +12 0x0001 //TX_NUM_LOUTCHN +13 0x0001 //TX_MAXNUM_AECREF +14 0x0000 //TX_DBG_FUNC_REG +15 0x0000 //TX_DBG_FUNC_REG1 +16 0x0000 //TX_SYS_RESRV_0 +17 0x0000 //TX_SYS_RESRV_1 +18 0x0000 //TX_SYS_RESRV_2 +19 0x0000 //TX_SYS_RESRV_3 +20 0x0000 //TX_DIST2REF0 +21 0x00A3 //TX_DIST2REF1 +22 0x0000 //TX_DIST2REF_02 +23 0x0000 //TX_DIST2REF_03 +24 0x0000 //TX_DIST2REF_04 +25 0x0000 //TX_DIST2REF_05 +26 0x0000 //TX_MMIC +27 0x1000 //TX_PGA_0 +28 0x1000 //TX_PGA_1 +29 0x1000 //TX_PGA_2 +30 0x0000 //TX_PGA_3 +31 0x0000 //TX_PGA_4 +32 0x0000 //TX_PGA_5 +33 0x0000 //TX_MIC_PAIRS +34 0x0000 //TX_MIC_PAIRS_HS +35 0x0002 //TX_MICS_FOR_BF +36 0x0000 //TX_MIC_PAIRS_FORL1 +37 0x0002 //TX_MICS_OF_PAIR0 +38 0x0002 //TX_MICS_OF_PAIR1 +39 0x0002 //TX_MICS_OF_PAIR2 +40 0x0002 //TX_MICS_OF_PAIR3 +41 0x0000 //TX_MIC_DATA_SRC0 +42 0x0002 //TX_MIC_DATA_SRC1 +43 0x0001 //TX_MIC_DATA_SRC2 +44 0x0000 //TX_MIC_DATA_SRC3 +45 0x0000 //TX_MIC_PAIR_CH_04 +46 0x0000 //TX_MIC_PAIR_CH_05 +47 0x0000 //TX_MIC_PAIR_CH_10 +48 0x0000 //TX_MIC_PAIR_CH_11 +49 0x0000 //TX_MIC_PAIR_CH_12 +50 0x0000 //TX_MIC_PAIR_CH_13 +51 0x0000 //TX_MIC_PAIR_CH_14 +52 0x05DC //TX_HD_BIN_MASK +53 0x0010 //TX_HD_SUBAND_MASK +54 0x19A1 //TX_HD_FRAME_AVG_MASK +55 0x0320 //TX_HD_MIN_FRQ +56 0x1000 //TX_HD_ALPHA_PSD +57 0x1100 //TX_T_PHPR1 +58 0x0000 //TX_T_PHPR2 +59 0x0000 //TX_T_PTPR +60 0x0000 //TX_T_PNPR +61 0x0000 //TX_T_PAPR1 +62 0xEE6C //TX_T_PSDVAT +63 0x0800 //TX_CNT +64 0x4000 //TX_ANTI_HOWL_GAIN +65 0x0001 //TX_MICFORBFMARK_0 +66 0x0001 //TX_MICFORBFMARK_1 +67 0x0001 //TX_MICFORBFMARK_2 +68 0x0001 //TX_MICFORBFMARK_3 +69 0x0001 //TX_MICFORBFMARK_4 +70 0x0001 //TX_MICFORBFMARK_5 +71 0x0000 //TX_DIST2REF_10 +72 0x3A66 //TX_DIST2REF_11 +73 0x0000 //TX_DIST2REF2 +74 0x0000 //TX_DIST2REF_13 +75 0x0000 //TX_DIST2REF_14 +76 0x0000 //TX_DIST2REF_15 +77 0x0000 //TX_DIST2REF_20 +78 0x0000 //TX_DIST2REF_21 +79 0x0000 //TX_DIST2REF_22 +80 0x0000 //TX_DIST2REF_23 +81 0x0000 //TX_DIST2REF_24 +82 0x0000 //TX_DIST2REF_25 +83 0x0000 //TX_DIST2REF_30 +84 0x0000 //TX_DIST2REF_31 +85 0x0000 //TX_DIST2REF_32 +86 0x0000 //TX_DIST2REF_33 +87 0x0000 //TX_DIST2REF_34 +88 0x0000 //TX_DIST2REF_35 +89 0x0000 //TX_MIC_LOC_00 +90 0x0000 //TX_MIC_LOC_01 +91 0x0000 //TX_MIC_LOC_02 +92 0x0000 //TX_MIC_LOC_03 +93 0x0000 //TX_MIC_LOC_04 +94 0x0000 //TX_MIC_LOC_05 +95 0x0000 //TX_MIC_LOC_10 +96 0x0000 //TX_MIC_LOC_11 +97 0x0000 //TX_MIC_LOC_12 +98 0x0000 //TX_MIC_LOC_13 +99 0x0000 //TX_MIC_LOC_14 +100 0x0000 //TX_MIC_LOC_15 +101 0x0000 //TX_MIC_LOC_20 +102 0x0000 //TX_MIC_LOC_21 +103 0x0000 //TX_MIC_LOC_22 +104 0x0000 //TX_MIC_LOC_23 +105 0x0000 //TX_MIC_LOC_24 +106 0x0000 //TX_MIC_LOC_25 +107 0x0200 //TX_MIC_REFBLK_VOLUME +108 0x0AAC //TX_MIC_BLOCK_VOLUME +109 0x0000 //TX_INVERSE_MASK +110 0x0000 //TX_ADCS_MASK +111 0x04D0 //TX_ADCS_GAIN +112 0x4000 //TX_NFC_GAINFAC +113 0x0000 //TX_MAINMIC_BLKFACTOR +114 0x0000 //TX_REFMIC_BLKFACTOR +115 0x0000 //TX_BLMIC_BLKFACTOR +116 0x0000 //TX_BRMIC_BLKFACTOR +117 0x0031 //TX_MICBLK_START_BIN +118 0x0060 //TX_MICBLK_END_BIN +119 0x0015 //TX_MICBLK_FE_HOLD +120 0xFFF2 //TX_MICBLK_MR_EXP_TH +121 0xFFF2 //TX_MICBLK_LR_EXP_TH +122 0x0000 //TX_FENE_HOLD +123 0x4000 //TX_FE_ENER_TH_MTS +124 0x0004 //TX_FE_ENER_TH_EXP +125 0x6000 //TX_C_POST_FLT_MIC_MAINBLK +126 0x6000 //TX_C_POST_FLT_MIC_REFBLK +127 0x0010 //TX_MIC_BLOCK_N +128 0x7E56 //TX_A_HP +129 0x4000 //TX_B_PE +130 0x1800 //TX_THR_PITCH_DET_0 +131 0x1000 //TX_THR_PITCH_DET_1 +132 0x0800 //TX_THR_PITCH_DET_2 +133 0x0008 //TX_PITCH_BFR_LEN +134 0x0003 //TX_SBD_PITCH_DET +135 0x0050 //TX_TD_AEC_L +136 0x4000 //TX_MU0_UNP_TD_AEC +137 0x1000 //TX_MU0_PTD_TD_AEC +138 0x0000 //TX_PP_RESRV_0 +139 0x2A94 //TX_PP_RESRV_1 +140 0x55F0 //TX_PP_RESRV_2 +141 0x0000 //TX_PP_RESRV_3 +142 0x0000 //TX_PP_RESRV_4 +143 0x0000 //TX_PP_RESRV_5 +144 0x0000 //TX_PP_RESRV_6 +145 0x0000 //TX_PP_RESRV_7 +146 0x0028 //TX_TAIL_LENGTH +147 0x0080 //TX_AEC_REF_GAIN_0 +148 0x0800 //TX_AEC_REF_GAIN_1 +149 0x0800 //TX_AEC_REF_GAIN_2 +150 0x7900 //TX_EAD_THR +151 0x2000 //TX_THR_RE_EST +152 0x0400 //TX_MIN_EQ_RE_EST_0 +153 0x0400 //TX_MIN_EQ_RE_EST_1 +154 0x0800 //TX_MIN_EQ_RE_EST_2 +155 0x0800 //TX_MIN_EQ_RE_EST_3 +156 0x1000 //TX_MIN_EQ_RE_EST_4 +157 0x1000 //TX_MIN_EQ_RE_EST_5 +158 0x1000 //TX_MIN_EQ_RE_EST_6 +159 0x1000 //TX_MIN_EQ_RE_EST_7 +160 0x1000 //TX_MIN_EQ_RE_EST_8 +161 0x1000 //TX_MIN_EQ_RE_EST_9 +162 0x1000 //TX_MIN_EQ_RE_EST_10 +163 0x1000 //TX_MIN_EQ_RE_EST_11 +164 0x1000 //TX_MIN_EQ_RE_EST_12 +165 0x3000 //TX_LAMBDA_RE_EST +166 0x1000 //TX_LAMBDA_CB_NLE +167 0x1800 //TX_C_POST_FLT +168 0x4000 //TX_GAIN_NP +169 0x003C //TX_SE_HOLD_N +170 0x0046 //TX_DT_HOLD_N +171 0x03E8 //TX_DT2_HOLD_N +172 0x6666 //TX_AEC_RESRV_0 +173 0x0000 //TX_AEC_RESRV_1 +174 0x0014 //TX_AEC_RESRV_2 +175 0x0000 //TX_MIC_DELAY_LENGTH +176 0x0000 //TX_REF_DELAY_LENGTH +177 0x0000 //TX_ADD_LINEIN_GAINL +178 0x0000 //TX_ADD_LINEIN_GAINH +179 0x0000 //TX_MIN_EQ_RE_EST_14 +180 0x0000 //TX_DTD_THR1_8 +181 0x7FFF //TX_DTD_THR2_8 +182 0x0000 //TX_DTD_MIC_BLK2 +183 0x0008 //TX_FRQ_LIN_LEN +184 0x7FFF //TX_FRQ_AEC_LEN_RHO +185 0x6000 //TX_MU0_UNP_FRQ_AEC +186 0x4000 //TX_MU0_PTD_FRQ_AEC +187 0x000A //TX_MINENOISETH +188 0x0800 //TX_MU0_RE_EST +189 0x0001 //TX_AEC_NUM_CH +190 0x0000 //TX_BIGECHOATTENUATION_MAX +191 0x2000 //TX_A_POST_FLT_MICBLK +192 0x0000 //TX_BLKENERTH +193 0x0000 //TX_BLKENERHIGHTH +194 0x0000 //TX_NORMENERTH +195 0x0000 //TX_NORMENERHIGHTH +196 0x0000 //TX_NORMENERHIGHTHL +197 0x7000 //TX_DTD_THR1_0 +198 0x7000 //TX_DTD_THR1_1 +199 0x7000 //TX_DTD_THR1_2 +200 0x7F00 //TX_DTD_THR1_3 +201 0x7F00 //TX_DTD_THR1_4 +202 0x7F00 //TX_DTD_THR1_5 +203 0x7F00 //TX_DTD_THR1_6 +204 0x2000 //TX_DTD_THR2_0 +205 0x2000 //TX_DTD_THR2_1 +206 0x2000 //TX_DTD_THR2_2 +207 0x1000 //TX_DTD_THR2_3 +208 0x1000 //TX_DTD_THR2_4 +209 0x1000 //TX_DTD_THR2_5 +210 0x1000 //TX_DTD_THR2_6 +211 0x6000 //TX_DTD_THR3 +212 0x0177 //TX_SPK_CUT_K +213 0x1B58 //TX_DT_CUT_K +214 0x0100 //TX_DT_CUT_THR +215 0x04EB //TX_COMFORT_G +216 0x01F4 //TX_POWER_YOUT_TH +217 0x4000 //TX_FDPFGAINECHO +218 0x0000 //TX_DTD_HD_THR +219 0x0000 //TX_SPK_CUT_K_S +220 0x0000 //TX_DTD_MIC_BLK +221 0x0400 //TX_ADPT_STRICT_L +222 0x0200 //TX_ADPT_STRICT_H +223 0x0C00 //TX_RATIO_DT_L_TH_LOW +224 0x2000 //TX_RATIO_DT_H_TH_LOW +225 0x1800 //TX_RATIO_DT_L_TH_HIGH +226 0x3000 //TX_RATIO_DT_H_TH_HIGH +227 0x0A00 //TX_RATIO_DT_L0_TH +228 0x7000 //TX_B_POST_FILT_ECHO_L +229 0x7FFF //TX_B_POST_FILT_ECHO_H +230 0x0200 //TX_MIN_G_CTRL_ECHO +231 0x7FFF //TX_B_LESSCUT_RTO_ECHO +232 0x0000 //TX_EPD_OFFSET_00 +233 0x0000 //TX_EPD_OFFST_01 +234 0x1388 //TX_RATIO_DT_L0_TH_HIGH +235 0x3A98 //TX_RATIO_DT_H_TH_CUT +236 0x7FFF //TX_MIN_EQ_RE_EST_13 +237 0x0000 //TX_DTD_THR1_7 +238 0x0000 //TX_DTD_THR2_7 +239 0x0800 //TX_DT_RESRV_7 +240 0x0800 //TX_DT_RESRV_8 +241 0x0000 //TX_DT_RESRV_9 +242 0xF600 //TX_THR_SN_EST_0 +243 0xFA00 //TX_THR_SN_EST_1 +244 0xFA00 //TX_THR_SN_EST_2 +245 0xF800 //TX_THR_SN_EST_3 +246 0xF800 //TX_THR_SN_EST_4 +247 0xF800 //TX_THR_SN_EST_5 +248 0xF800 //TX_THR_SN_EST_6 +249 0xF700 //TX_THR_SN_EST_7 +250 0x0000 //TX_DELTA_THR_SN_EST_0 +251 0x0200 //TX_DELTA_THR_SN_EST_1 +252 0x0200 //TX_DELTA_THR_SN_EST_2 +253 0x0200 //TX_DELTA_THR_SN_EST_3 +254 0x0100 //TX_DELTA_THR_SN_EST_4 +255 0x0200 //TX_DELTA_THR_SN_EST_5 +256 0x0100 //TX_DELTA_THR_SN_EST_6 +257 0x0200 //TX_DELTA_THR_SN_EST_7 +258 0x4000 //TX_LAMBDA_NN_EST_0 +259 0x4000 //TX_LAMBDA_NN_EST_1 +260 0x4000 //TX_LAMBDA_NN_EST_2 +261 0x4000 //TX_LAMBDA_NN_EST_3 +262 0x4000 //TX_LAMBDA_NN_EST_4 +263 0x4000 //TX_LAMBDA_NN_EST_5 +264 0x4000 //TX_LAMBDA_NN_EST_6 +265 0x4000 //TX_LAMBDA_NN_EST_7 +266 0x0400 //TX_N_SN_EST +267 0x001E //TX_INBEAM_T +268 0x0041 //TX_INBEAMHOLDT +269 0x2000 //TX_G_STRICT +270 0x2000 //TX_EQ_THR_BF +271 0x799A //TX_LAMBDA_EQ_BF +272 0x1000 //TX_NE_RTO_TH +273 0x1000 //TX_NE_RTO_TH_L +274 0x1000 //TX_MAINREFRTOH_TH_H +275 0x0600 //TX_MAINREFRTOH_TH_L +276 0x2000 //TX_MAINREFRTO_TH_H +277 0x1400 //TX_MAINREFRTO_TH_L +278 0x0000 //TX_MAINREFRTO_TH_EQ +279 0x1000 //TX_B_POST_FLT_0 +280 0x1000 //TX_B_POST_FLT_1 +281 0x0014 //TX_NS_LVL_CTRL_0 +282 0x002C //TX_NS_LVL_CTRL_1 +283 0x0016 //TX_NS_LVL_CTRL_2 +284 0x0018 //TX_NS_LVL_CTRL_3 +285 0x0016 //TX_NS_LVL_CTRL_4 +286 0x0012 //TX_NS_LVL_CTRL_5 +287 0x0016 //TX_NS_LVL_CTRL_6 +288 0x0017 //TX_NS_LVL_CTRL_7 +289 0x000E //TX_MIN_GAIN_S_0 +290 0x000D //TX_MIN_GAIN_S_1 +291 0x0012 //TX_MIN_GAIN_S_2 +292 0x0010 //TX_MIN_GAIN_S_3 +293 0x0012 //TX_MIN_GAIN_S_4 +294 0x0012 //TX_MIN_GAIN_S_5 +295 0x0012 //TX_MIN_GAIN_S_6 +296 0x0012 //TX_MIN_GAIN_S_7 +297 0x6000 //TX_NMOS_SUP +298 0x0000 //TX_NS_MAX_PRI_SNR_TH +299 0x0000 //TX_NMOS_SUP_MENSA +300 0x7FFF //TX_SNRI_SUP_0 +301 0x6000 //TX_SNRI_SUP_1 +302 0x6000 //TX_SNRI_SUP_2 +303 0x6000 //TX_SNRI_SUP_3 +304 0x6000 //TX_SNRI_SUP_4 +305 0x6000 //TX_SNRI_SUP_5 +306 0x6000 //TX_SNRI_SUP_6 +307 0x6000 //TX_SNRI_SUP_7 +308 0x6000 //TX_THR_LFNS +309 0x0017 //TX_G_LFNS +310 0x09C4 //TX_GAIN0_NTH +311 0x000A //TX_MUSIC_MORENS +312 0x7FFF //TX_A_POST_FILT_0 +313 0x2000 //TX_A_POST_FILT_1 +314 0x4000 //TX_A_POST_FILT_S_0 +315 0x4000 //TX_A_POST_FILT_S_1 +316 0x4000 //TX_A_POST_FILT_S_2 +317 0x4000 //TX_A_POST_FILT_S_3 +318 0x4000 //TX_A_POST_FILT_S_4 +319 0x4000 //TX_A_POST_FILT_S_5 +320 0x5000 //TX_A_POST_FILT_S_6 +321 0x7000 //TX_A_POST_FILT_S_7 +322 0x1000 //TX_B_POST_FILT_0 +323 0x1000 //TX_B_POST_FILT_1 +324 0x2000 //TX_B_POST_FILT_2 +325 0x2000 //TX_B_POST_FILT_3 +326 0x2000 //TX_B_POST_FILT_4 +327 0x1000 //TX_B_POST_FILT_5 +328 0x3000 //TX_B_POST_FILT_6 +329 0x3000 //TX_B_POST_FILT_7 +330 0x1000 //TX_B_LESSCUT_RTO_S_0 +331 0x1000 //TX_B_LESSCUT_RTO_S_1 +332 0x1000 //TX_B_LESSCUT_RTO_S_2 +333 0x1000 //TX_B_LESSCUT_RTO_S_3 +334 0x1000 //TX_B_LESSCUT_RTO_S_4 +335 0x1000 //TX_B_LESSCUT_RTO_S_5 +336 0x1000 //TX_B_LESSCUT_RTO_S_6 +337 0x1000 //TX_B_LESSCUT_RTO_S_7 +338 0x7E14 //TX_LAMBDA_PFILT +339 0x7C29 //TX_LAMBDA_PFILT_S_0 +340 0x7C29 //TX_LAMBDA_PFILT_S_1 +341 0x7C29 //TX_LAMBDA_PFILT_S_2 +342 0x7C29 //TX_LAMBDA_PFILT_S_3 +343 0x7C29 //TX_LAMBDA_PFILT_S_4 +344 0x7C29 //TX_LAMBDA_PFILT_S_5 +345 0x7C29 //TX_LAMBDA_PFILT_S_6 +346 0x7C29 //TX_LAMBDA_PFILT_S_7 +347 0x07D0 //TX_K_PEPPER +348 0x0800 //TX_A_PEPPER +349 0x1D4C //TX_K_PEPPER_HF +350 0x0400 //TX_A_PEPPER_HF +351 0x0001 //TX_HMNC_BST_FLG +352 0x4000 //TX_HMNC_BST_THR +353 0x0800 //TX_DT_BINVAD_TH_0 +354 0x0800 //TX_DT_BINVAD_TH_1 +355 0x0800 //TX_DT_BINVAD_TH_2 +356 0x0800 //TX_DT_BINVAD_TH_3 +357 0x0000 //TX_DT_BINVAD_ENDF +358 0x1000 //TX_C_POST_FLT_DT +359 0x7FFF //TX_NS_B_POST_FLT_LESSCUT +360 0x0100 //TX_DT_BOOST +361 0x0000 //TX_BF_SGRAD_FLG +362 0x0005 //TX_BF_DVG_TH +363 0x001E //TX_SN_C_F +364 0x0000 //TX_K_APT +365 0x0001 //TX_NOISEDET +366 0x0190 //TX_NDETCT +367 0x000A //TX_NOISE_TH_0 +368 0x7FFF //TX_NOISE_TH_0_2 +369 0x7FFF //TX_NOISE_TH_0_3 +370 0x00C6 //TX_NOISE_TH_1 +371 0x0DAC //TX_NOISE_TH_2 +372 0x2260 //TX_NOISE_TH_3 +373 0x7080 //TX_NOISE_TH_4 +374 0x57E4 //TX_NOISE_TH_5 +375 0x4BD6 //TX_NOISE_TH_5_2 +376 0x0001 //TX_NOISE_TH_5_3 +377 0x4E20 //TX_NOISE_TH_5_4 +378 0x1194 //TX_NOISE_TH_6 +379 0x0014 //TX_MINENOISE_TH +380 0xD508 //TX_MORENS_TFMASK_TH +381 0x0001 //TX_DRC_QUIET_FLOOR +382 0x6D60 //TX_RATIODTL_CUT_TH +383 0x0DAC //TX_DT_CUT_K1 +384 0x00A5 //TX_OUT_ENER_S_TH_CLEAN +385 0x00A5 //TX_OUT_ENER_S_TH_LESSCLEAN +386 0x00A5 //TX_OUT_ENER_S_TH_NOISY +387 0x0029 //TX_OUT_ENER_TH_NOISE +388 0x0200 //TX_OUT_ENER_TH_SPEECH +389 0x2000 //TX_SN_NPB_GAIN +390 0x0000 //TX_NN_NPB_GAIN +391 0x3000 //TX_POST_MASK_SUP_HSNE +392 0x07D0 //TX_TAIL_DET_TH +393 0x4000 //TX_B_LESSCUT_RTO_WTA +394 0x0000 //TX_MEL_G_R +395 0x0080 //TX_SUPHIGH_TH +396 0x0000 //TX_MASK_G_R +397 0x0002 //TX_EXTRA_NS_L +398 0x1800 //TX_C_POST_FLT_MASK +399 0x7FFF //TX_A_POST_FLT_WNS +400 0x0148 //TX_MIN_G_LOW300HZ +401 0x0004 //TX_MAXLEVEL_CNG +402 0x00B4 //TX_STN_NOISE_TH +403 0x4000 //TX_POST_MASK_SUP +404 0x7FFF //TX_POST_MASK_ADJUST +405 0x00C8 //TX_NS_ENOISE_MIC0_TH +406 0x0014 //TX_MINENOISE_MIC0_TH +407 0x012C //TX_MINENOISE_MIC0_S_TH +408 0x2900 //TX_MIN_G_CTRL_SSNS +409 0x0800 //TX_METAL_RTO_THR +410 0x0FA0 //TX_NS_FP_K_METAL +411 0x3A98 //TX_NOISEDET_BOOST_TH +412 0x0FA0 //TX_NSMOOTH_TH +413 0x0000 //TX_NS_RESRV_8 +414 0x1800 //TX_RHO_UPB +415 0x2328 //TX_N_HOLD_HS +416 0x006E //TX_N_RHO_BFR0 +417 0x7FFF //TX_LAMBDA_ARSP_EST +418 0x0100 //TX_EXTRA_GAIN_MICBLOCK +419 0x0333 //TX_THR_STD_NSR +420 0x019A //TX_THR_STD_PLH +421 0x03E8 //TX_N_HOLD_STD +422 0x0066 //TX_THR_STD_RHO +423 0x2800 //TX_BF_RESET_THR_HS +424 0x0CCD //TX_SB_RTO_MEAN_TH +425 0x0300 //TX_SB_RHO_MEAN_TH_NTALK +426 0x2000 //TX_SB_RTO_MEAN_TH_ABN +427 0x2EE0 //TX_SB_RTO_MEAN_TH_RUB +428 0x0990 //TX_WTA_EN_RTO_TH +429 0x1400 //TX_TOP_ENER_TH_F +430 0x0100 //TX_DESIRED_TALK_HOLDT +431 0x0800 //TX_MIC_BLOCK_FACTOR +432 0x0000 //TX_NSEST_BFRLRNRDC +433 0x0000 //TX_THR_POST_FLT_HS +434 0x0010 //TX_HS_VAD_BIN +435 0x2666 //TX_THR_VAD_HS +436 0x2CCD //TX_MEAN_RTO_MIN_TH2 +437 0x0032 //TX_SILENCE_T +438 0x0000 //TX_A_POST_FLT_WTA +439 0x799A //TX_LAMBDA_PFLT_WTA +440 0x051E //TX_SB_RHO_MEAN2_TH +441 0x02F0 //TX_SB_RHO_MEAN3_TH +442 0x0000 //TX_HS_RESRV_4 +443 0x0000 //TX_HS_RESRV_5 +444 0x0001 //TX_DOA_VAD_THR_1 +445 0x003C //TX_DOA_VAD_THR_2 +446 0x0028 //TX_DOA_VAD_THR1_0 +447 0x0028 //TX_DOA_VAD_THR1_1 +448 0x0000 //TX_SRC_DOA_RNG_LOW_0A +449 0x001E //TX_SRC_DOA_RNG_HIGH_0A +450 0x005A //TX_DFLT_SRC_DOA_0A +451 0x0000 //TX_SRC_DOA_RNG_LOW_0B +452 0x0000 //TX_SRC_DOA_RNG_HIGH_0B +453 0x0000 //TX_DFLT_SRC_DOA_0B +454 0x0000 //TX_SRC_DOA_RNG_LOW_0C +455 0x0000 //TX_SRC_DOA_RNG_HIGH_0C +456 0x0000 //TX_DFLT_SRC_DOA_0C +457 0x0000 //TX_SRC_DOA_RNG_LOW_0D +458 0x0000 //TX_SRC_DOA_RNG_HIGH_0D +459 0x0000 //TX_DFLT_SRC_DOA_0D +460 0x0000 //TX_SRC_DOA_RNG_LOW_1A +461 0x00B4 //TX_SRC_DOA_RNG_HIGH_1A +462 0x005A //TX_DFLT_SRC_DOA_1A +463 0x0000 //TX_SRC_DOA_RNG_LOW_1B +464 0x00B4 //TX_SRC_DOA_RNG_HIGH_1B +465 0x005A //TX_DFLT_SRC_DOA_1B +466 0x0000 //TX_SRC_DOA_RNG_LOW_1C +467 0x00B4 //TX_SRC_DOA_RNG_HIGH_1C +468 0x005A //TX_DFLT_SRC_DOA_1C +469 0x0000 //TX_SRC_DOA_RNG_LOW_1D +470 0x00B4 //TX_SRC_DOA_RNG_HIGH_1D +471 0x005A //TX_DFLT_SRC_DOA_1D +472 0x0100 //TX_BF_HOLDOFF_T +473 0x7FFF //TX_DOA_COST_FACTOR +474 0x0D9A //TX_MAINTOREFR_TH0 +475 0x071C //TX_DOA_TRK_THR +476 0x012C //TX_DOA_TRACK_HT +477 0x0200 //TX_N1_HOLD_HF +478 0x0100 //TX_N2_HOLD_HF +479 0x2A3D //TX_BF_RESET_THR_HF +480 0x7333 //TX_DOA_SMOOTH +481 0x0800 //TX_MU_BF +482 0x0800 //TX_BF_MU_LF_B2 +483 0x0040 //TX_BF_FC_END_BIN_B2 +484 0x0020 //TX_BF_FC_END_BIN +485 0x0000 //TX_HF_RESRV_25 +486 0x0000 //TX_HF_RESRV_26 +487 0x0007 //TX_N_DOA_SEED +488 0x0001 //TX_FINE_DOA_SEARCH_FLG +489 0x0000 //TX_HF_RESRV_27 +490 0x038E //TX_DLT_SRC_DOA_RNG +491 0x0200 //TX_BF_MU_LF +492 0x0000 //TX_DFLT_SRC_LOC_0 +493 0x7FFF //TX_DFLT_SRC_LOC_1 +494 0x0000 //TX_DFLT_SRC_LOC_2 +495 0x038E //TX_DOA_TRACK_VADTH +496 0x0000 //TX_DOA_TRACK_NEW +497 0x0300 //TX_NOR_OFF_THR +498 0x7C00 //TX_MORE_ON_700HZ_THR +499 0x2000 //TX_MU_BF_ADPT_NS +500 0x0000 //TX_ADAPT_LEN +501 0x6666 //TX_MORE_SNS +502 0x0000 //TX_NOR_OFF_TH1 +503 0x0000 //TX_WIDE_MASK_TH +504 0xD333 //TX_SUBSNRATIOHIGH4MEANBCK_THR +505 0x6000 //TX_C_POST_FLT_CUT +506 0x2000 //TX_RADIODTLV +507 0x0320 //TX_POWER_LINEIN_TH +508 0x0014 //TX_FE_VADCOUNT_TH_FC +509 0x0000 //TX_ECHO_SUPP_FC +510 0x0C80 //TX_ECHO_TH +511 0x6666 //TX_MIC_TO_BFGAIN +512 0x0000 //TX_MICTOBFGAIN0 +513 0x0000 //TX_FASTMUE_TH +514 0x2CCC //TX_DEREVERB_LF_MU +515 0x3200 //TX_DEREVERB_HF_MU +516 0x0007 //TX_DEREVERB_DELAY +517 0x0004 //TX_DEREVERB_COEF_LEN +518 0x0003 //TX_DEREVERB_DNR +519 0x0000 //TX_DEREVERB_ALPHA +520 0x0000 //TX_DEREVERB_BETA +521 0x3A98 //TX_GSC_RTOL_TH +522 0x3A98 //TX_GSC_RTOH_TH +523 0x7E2C //TX_WIDE2_MEANHTH +524 0x0000 //TX_DR_RESRV_5 +525 0x0000 //TX_DR_RESRV_6 +526 0x0000 //TX_DR_RESRV_7 +527 0x0000 //TX_DR_RESRV_8 +528 0x1333 //TX_WIND_MARK_TH +529 0x399A //TX_CORR_THR +530 0x0004 //TX_SNR_THR +531 0x0010 //TX_ENGY_THR +532 0x1770 //TX_CORR_HIGH_TH +533 0x6000 //TX_ENGY_THR_2 +534 0x3400 //TX_MEAN_RTO_THR +535 0x0028 //TX_WNS_ENOISE_MIC0_TH +536 0x3000 //TX_RATIOMICL_TH +537 0x7FFF //TX_CALIG_HS +538 0x0000 //TX_LVL_CTRL +539 0x0010 //TX_WIND_SUPRTO +540 0x0014 //TX_WNS_MIN_G +541 0x0600 //TX_WNS_B_POST_FLT +542 0x3000 //TX_RATIOMICH_TH +543 0xD120 //TX_WIND_INBEAM_L_TH +544 0x0FA0 //TX_WIND_INBEAM_H_TH +545 0x2000 //TX_WNS_RESRV_0 +546 0x59D8 //TX_WNS_RESRV_1 +547 0x0200 //TX_WNS_RESRV_2 +548 0x0000 //TX_WNS_RESRV_3 +549 0x0000 //TX_WNS_RESRV_4 +550 0x0000 //TX_WNS_RESRV_5 +551 0x0000 //TX_WNS_RESRV_6 +552 0x0000 //TX_PB_B_POST_FLT_LESSCUT +553 0x0070 //TX_BF_LESSCUT_BBIN +554 0x0070 //TX_BF_LESSCUT_EBIN +555 0x0010 //TX_POSTBFB0 +556 0x0070 //TX_POSTBFB +557 0x00B0 //TX_POSTBFE +558 0x0E66 //TX_SPEECH_SNR_TH +559 0x0050 //TX_PB_MAX_PRI_SNR_TH +560 0x770A //TX_MAX_PRI_SNR_TH_L +561 0x0000 //TX_PFGAIN +562 0x0000 //TX_MAINTOREFR_TH +563 0x0000 //TX_SAM_MARK +564 0x0000 //TX_PB_RESRV_0 +565 0x0000 //TX_PB_RESRV_1 +566 0x0030 //TX_FDEQ_SUBNUM +567 0x5C54 //TX_FDEQ_GAIN_0 +568 0x5048 //TX_FDEQ_GAIN_1 +569 0x4C4C //TX_FDEQ_GAIN_2 +570 0x494D //TX_FDEQ_GAIN_3 +571 0x4442 //TX_FDEQ_GAIN_4 +572 0x4448 //TX_FDEQ_GAIN_5 +573 0x4C53 //TX_FDEQ_GAIN_6 +574 0x6244 //TX_FDEQ_GAIN_7 +575 0x4348 //TX_FDEQ_GAIN_8 +576 0x4848 //TX_FDEQ_GAIN_9 +577 0x4A49 //TX_FDEQ_GAIN_10 +578 0x4E4A //TX_FDEQ_GAIN_11 +579 0x4840 //TX_FDEQ_GAIN_12 +580 0x4040 //TX_FDEQ_GAIN_13 +581 0x4054 //TX_FDEQ_GAIN_14 +582 0x687A //TX_FDEQ_GAIN_15 +583 0x4848 //TX_FDEQ_GAIN_16 +584 0x4848 //TX_FDEQ_GAIN_17 +585 0x4848 //TX_FDEQ_GAIN_18 +586 0x4848 //TX_FDEQ_GAIN_19 +587 0x4848 //TX_FDEQ_GAIN_20 +588 0x4848 //TX_FDEQ_GAIN_21 +589 0x4848 //TX_FDEQ_GAIN_22 +590 0x4848 //TX_FDEQ_GAIN_23 +591 0x0202 //TX_FDEQ_BIN_0 +592 0x0104 //TX_FDEQ_BIN_1 +593 0x0502 //TX_FDEQ_BIN_2 +594 0x0202 //TX_FDEQ_BIN_3 +595 0x0504 //TX_FDEQ_BIN_4 +596 0x0708 //TX_FDEQ_BIN_5 +597 0x0808 //TX_FDEQ_BIN_6 +598 0x050E //TX_FDEQ_BIN_7 +599 0x0B0C //TX_FDEQ_BIN_8 +600 0x0F0F //TX_FDEQ_BIN_9 +601 0x0E0D //TX_FDEQ_BIN_10 +602 0x0F28 //TX_FDEQ_BIN_11 +603 0x111B //TX_FDEQ_BIN_12 +604 0x291E //TX_FDEQ_BIN_13 +605 0x1E10 //TX_FDEQ_BIN_14 +606 0x1810 //TX_FDEQ_BIN_15 +607 0x1021 //TX_FDEQ_BIN_16 +608 0x1000 //TX_FDEQ_BIN_17 +609 0x0000 //TX_FDEQ_BIN_18 +610 0x0000 //TX_FDEQ_BIN_19 +611 0x0000 //TX_FDEQ_BIN_20 +612 0x0000 //TX_FDEQ_BIN_21 +613 0x0000 //TX_FDEQ_BIN_22 +614 0x0000 //TX_FDEQ_BIN_23 +615 0x0000 //TX_FDEQ_PADDING +616 0x0030 //TX_PREEQ_SUBNUM_MIC0 +617 0x4848 //TX_PREEQ_GAIN_MIC0_0 +618 0x4848 //TX_PREEQ_GAIN_MIC0_1 +619 0x4848 //TX_PREEQ_GAIN_MIC0_2 +620 0x4848 //TX_PREEQ_GAIN_MIC0_3 +621 0x4848 //TX_PREEQ_GAIN_MIC0_4 +622 0x4848 //TX_PREEQ_GAIN_MIC0_5 +623 0x4848 //TX_PREEQ_GAIN_MIC0_6 +624 0x4848 //TX_PREEQ_GAIN_MIC0_7 +625 0x4848 //TX_PREEQ_GAIN_MIC0_8 +626 0x4848 //TX_PREEQ_GAIN_MIC0_9 +627 0x4848 //TX_PREEQ_GAIN_MIC0_10 +628 0x4848 //TX_PREEQ_GAIN_MIC0_11 +629 0x4848 //TX_PREEQ_GAIN_MIC0_12 +630 0x4848 //TX_PREEQ_GAIN_MIC0_13 +631 0x4848 //TX_PREEQ_GAIN_MIC0_14 +632 0x4848 //TX_PREEQ_GAIN_MIC0_15 +633 0x4848 //TX_PREEQ_GAIN_MIC0_16 +634 0x4848 //TX_PREEQ_GAIN_MIC0_17 +635 0x4848 //TX_PREEQ_GAIN_MIC0_18 +636 0x4848 //TX_PREEQ_GAIN_MIC0_19 +637 0x4848 //TX_PREEQ_GAIN_MIC0_20 +638 0x4848 //TX_PREEQ_GAIN_MIC0_21 +639 0x4848 //TX_PREEQ_GAIN_MIC0_22 +640 0x4848 //TX_PREEQ_GAIN_MIC0_23 +641 0x251A //TX_PREEQ_BIN_MIC0_0 +642 0x0F0F //TX_PREEQ_BIN_MIC0_1 +643 0x0C0C //TX_PREEQ_BIN_MIC0_2 +644 0x0C0F //TX_PREEQ_BIN_MIC0_3 +645 0x0F0F //TX_PREEQ_BIN_MIC0_4 +646 0x0F09 //TX_PREEQ_BIN_MIC0_5 +647 0x0909 //TX_PREEQ_BIN_MIC0_6 +648 0x0908 //TX_PREEQ_BIN_MIC0_7 +649 0x070F //TX_PREEQ_BIN_MIC0_8 +650 0x1F08 //TX_PREEQ_BIN_MIC0_9 +651 0x0808 //TX_PREEQ_BIN_MIC0_10 +652 0x0920 //TX_PREEQ_BIN_MIC0_11 +653 0x2020 //TX_PREEQ_BIN_MIC0_12 +654 0x2021 //TX_PREEQ_BIN_MIC0_13 +655 0x0000 //TX_PREEQ_BIN_MIC0_14 +656 0x0000 //TX_PREEQ_BIN_MIC0_15 +657 0x0000 //TX_PREEQ_BIN_MIC0_16 +658 0x0000 //TX_PREEQ_BIN_MIC0_17 +659 0x0000 //TX_PREEQ_BIN_MIC0_18 +660 0x0000 //TX_PREEQ_BIN_MIC0_19 +661 0x0000 //TX_PREEQ_BIN_MIC0_20 +662 0x0000 //TX_PREEQ_BIN_MIC0_21 +663 0x0000 //TX_PREEQ_BIN_MIC0_22 +664 0x0000 //TX_PREEQ_BIN_MIC0_23 +665 0x0030 //TX_PREEQ_SUBNUM_MIC1 +666 0x4848 //TX_PREEQ_GAIN_MIC1_0 +667 0x4848 //TX_PREEQ_GAIN_MIC1_1 +668 0x4848 //TX_PREEQ_GAIN_MIC1_2 +669 0x4848 //TX_PREEQ_GAIN_MIC1_3 +670 0x4848 //TX_PREEQ_GAIN_MIC1_4 +671 0x4848 //TX_PREEQ_GAIN_MIC1_5 +672 0x494A //TX_PREEQ_GAIN_MIC1_6 +673 0x4B4C //TX_PREEQ_GAIN_MIC1_7 +674 0x4D4E //TX_PREEQ_GAIN_MIC1_8 +675 0x4F52 //TX_PREEQ_GAIN_MIC1_9 +676 0x5355 //TX_PREEQ_GAIN_MIC1_10 +677 0x585C //TX_PREEQ_GAIN_MIC1_11 +678 0x616A //TX_PREEQ_GAIN_MIC1_12 +679 0x726E //TX_PREEQ_GAIN_MIC1_13 +680 0x5C48 //TX_PREEQ_GAIN_MIC1_14 +681 0x3B38 //TX_PREEQ_GAIN_MIC1_15 +682 0x4848 //TX_PREEQ_GAIN_MIC1_16 +683 0x4848 //TX_PREEQ_GAIN_MIC1_17 +684 0x4848 //TX_PREEQ_GAIN_MIC1_18 +685 0x4848 //TX_PREEQ_GAIN_MIC1_19 +686 0x4848 //TX_PREEQ_GAIN_MIC1_20 +687 0x4848 //TX_PREEQ_GAIN_MIC1_21 +688 0x4848 //TX_PREEQ_GAIN_MIC1_22 +689 0x4848 //TX_PREEQ_GAIN_MIC1_23 +690 0x0202 //TX_PREEQ_BIN_MIC1_0 +691 0x0203 //TX_PREEQ_BIN_MIC1_1 +692 0x0303 //TX_PREEQ_BIN_MIC1_2 +693 0x0304 //TX_PREEQ_BIN_MIC1_3 +694 0x0405 //TX_PREEQ_BIN_MIC1_4 +695 0x0506 //TX_PREEQ_BIN_MIC1_5 +696 0x0708 //TX_PREEQ_BIN_MIC1_6 +697 0x090A //TX_PREEQ_BIN_MIC1_7 +698 0x0B0C //TX_PREEQ_BIN_MIC1_8 +699 0x0D0E //TX_PREEQ_BIN_MIC1_9 +700 0x1013 //TX_PREEQ_BIN_MIC1_10 +701 0x1719 //TX_PREEQ_BIN_MIC1_11 +702 0x1B1E //TX_PREEQ_BIN_MIC1_12 +703 0x1E1E //TX_PREEQ_BIN_MIC1_13 +704 0x1E28 //TX_PREEQ_BIN_MIC1_14 +705 0x3042 //TX_PREEQ_BIN_MIC1_15 +706 0x0000 //TX_PREEQ_BIN_MIC1_16 +707 0x0000 //TX_PREEQ_BIN_MIC1_17 +708 0x0000 //TX_PREEQ_BIN_MIC1_18 +709 0x0000 //TX_PREEQ_BIN_MIC1_19 +710 0x0000 //TX_PREEQ_BIN_MIC1_20 +711 0x0000 //TX_PREEQ_BIN_MIC1_21 +712 0x0000 //TX_PREEQ_BIN_MIC1_22 +713 0x0000 //TX_PREEQ_BIN_MIC1_23 +714 0x0030 //TX_PREEQ_SUBNUM_MIC2 +715 0x4848 //TX_PREEQ_GAIN_MIC2_0 +716 0x4848 //TX_PREEQ_GAIN_MIC2_1 +717 0x4848 //TX_PREEQ_GAIN_MIC2_2 +718 0x4848 //TX_PREEQ_GAIN_MIC2_3 +719 0x4848 //TX_PREEQ_GAIN_MIC2_4 +720 0x4848 //TX_PREEQ_GAIN_MIC2_5 +721 0x4848 //TX_PREEQ_GAIN_MIC2_6 +722 0x4848 //TX_PREEQ_GAIN_MIC2_7 +723 0x4848 //TX_PREEQ_GAIN_MIC2_8 +724 0x4848 //TX_PREEQ_GAIN_MIC2_9 +725 0x4848 //TX_PREEQ_GAIN_MIC2_10 +726 0x4848 //TX_PREEQ_GAIN_MIC2_11 +727 0x4848 //TX_PREEQ_GAIN_MIC2_12 +728 0x4848 //TX_PREEQ_GAIN_MIC2_13 +729 0x4848 //TX_PREEQ_GAIN_MIC2_14 +730 0x4848 //TX_PREEQ_GAIN_MIC2_15 +731 0x4848 //TX_PREEQ_GAIN_MIC2_16 +732 0x4848 //TX_PREEQ_GAIN_MIC2_17 +733 0x4848 //TX_PREEQ_GAIN_MIC2_18 +734 0x4848 //TX_PREEQ_GAIN_MIC2_19 +735 0x4848 //TX_PREEQ_GAIN_MIC2_20 +736 0x4848 //TX_PREEQ_GAIN_MIC2_21 +737 0x4848 //TX_PREEQ_GAIN_MIC2_22 +738 0x4848 //TX_PREEQ_GAIN_MIC2_23 +739 0x0608 //TX_PREEQ_BIN_MIC2_0 +740 0x0808 //TX_PREEQ_BIN_MIC2_1 +741 0x0808 //TX_PREEQ_BIN_MIC2_2 +742 0x0808 //TX_PREEQ_BIN_MIC2_3 +743 0x0808 //TX_PREEQ_BIN_MIC2_4 +744 0x0808 //TX_PREEQ_BIN_MIC2_5 +745 0x0808 //TX_PREEQ_BIN_MIC2_6 +746 0x0808 //TX_PREEQ_BIN_MIC2_7 +747 0x0808 //TX_PREEQ_BIN_MIC2_8 +748 0x0808 //TX_PREEQ_BIN_MIC2_9 +749 0x0808 //TX_PREEQ_BIN_MIC2_10 +750 0x0808 //TX_PREEQ_BIN_MIC2_11 +751 0x0808 //TX_PREEQ_BIN_MIC2_12 +752 0x0808 //TX_PREEQ_BIN_MIC2_13 +753 0x0808 //TX_PREEQ_BIN_MIC2_14 +754 0x0200 //TX_PREEQ_BIN_MIC2_15 +755 0x0000 //TX_PREEQ_BIN_MIC2_16 +756 0x0000 //TX_PREEQ_BIN_MIC2_17 +757 0x0000 //TX_PREEQ_BIN_MIC2_18 +758 0x0000 //TX_PREEQ_BIN_MIC2_19 +759 0x0000 //TX_PREEQ_BIN_MIC2_20 +760 0x0000 //TX_PREEQ_BIN_MIC2_21 +761 0x0000 //TX_PREEQ_BIN_MIC2_22 +762 0x0000 //TX_PREEQ_BIN_MIC2_23 +763 0x0006 //TX_MASKING_ABILITY +764 0x0800 //TX_NND_WEIGHT +765 0x0050 //TX_MIC_CALIBRATION_0 +766 0x0056 //TX_MIC_CALIBRATION_1 +767 0x0050 //TX_MIC_CALIBRATION_2 +768 0x0050 //TX_MIC_CALIBRATION_3 +769 0x0046 //TX_MIC_PWR_BIAS_0 +770 0x0042 //TX_MIC_PWR_BIAS_1 +771 0x0046 //TX_MIC_PWR_BIAS_2 +772 0x0046 //TX_MIC_PWR_BIAS_3 +773 0x0000 //TX_GAIN_LIMIT_0 +774 0x0006 //TX_GAIN_LIMIT_1 +775 0x0000 //TX_GAIN_LIMIT_2 +776 0x0000 //TX_GAIN_LIMIT_3 +777 0x7F5B //TX_BVE_NOVAD0_ALPHADOWN +778 0x7FDE //TX_BVE_VAD0_ALPHAUP +779 0x7F3A //TX_BVE_VAD0_ALPHADOWN +780 0x2000 //TX_BVE_GAINWEIGHT_NOFEVADLI +781 0x7F5B //TX_BVE_FEVADLI_ALPHA +782 0x7F19 //TX_BVE_NOVAD0_ALPHAUP +783 0x1000 //TX_TDDRC_ALPHA_UP_01 +784 0x1000 //TX_TDDRC_ALPHA_UP_02 +785 0x1000 //TX_TDDRC_ALPHA_UP_03 +786 0x1000 //TX_TDDRC_ALPHA_UP_04 +787 0x7EB8 //TX_TDDRC_ALPHA_DWN_01 +788 0x7EB8 //TX_TDDRC_ALPHA_DWN_02 +789 0x7EB8 //TX_TDDRC_ALPHA_DWN_03 +790 0x7EB8 //TX_TDDRC_ALPHA_DWN_04 +791 0x7FFF //TX_TDDRC_TD_DRC_LIMIT +792 0x0800 //TX_TDDRC_POST_LIMIT_GAIN +793 0x0000 //TX_TDDRC_RESRV_0 +794 0x0000 //TX_TDDRC_RESRV_1 +795 0x0018 //TX_FDDRC_BAND_MARGIN_0 +796 0x0030 //TX_FDDRC_BAND_MARGIN_1 +797 0x0050 //TX_FDDRC_BAND_MARGIN_2 +798 0x0080 //TX_FDDRC_BAND_MARGIN_3 +799 0x0007 //TX_FDDRC_BLOCK_EXP +800 0x5000 //TX_FDDRC_THRD_2_0 +801 0x5000 //TX_FDDRC_THRD_2_1 +802 0x5000 //TX_FDDRC_THRD_2_2 +803 0x5000 //TX_FDDRC_THRD_2_3 +804 0x6400 //TX_FDDRC_THRD_3_0 +805 0x6400 //TX_FDDRC_THRD_3_1 +806 0x6400 //TX_FDDRC_THRD_3_2 +807 0x6400 //TX_FDDRC_THRD_3_3 +808 0x2000 //TX_FDDRC_SLANT_0_0 +809 0x2000 //TX_FDDRC_SLANT_0_1 +810 0x2000 //TX_FDDRC_SLANT_0_2 +811 0x2000 //TX_FDDRC_SLANT_0_3 +812 0x5333 //TX_FDDRC_SLANT_1_0 +813 0x5333 //TX_FDDRC_SLANT_1_1 +814 0x5333 //TX_FDDRC_SLANT_1_2 +815 0x5333 //TX_FDDRC_SLANT_1_3 +816 0x0010 //TX_DEADMIC_SILENCE_TH +817 0x0600 //TX_MIC_DEGRADE_TH +818 0x0078 //TX_DEADMIC_CNT +819 0x0078 //TX_MIC_DEGRADE_CNT +820 0x0000 //TX_FDDRC_RESRV_4 +821 0x0000 //TX_FDDRC_RESRV_5 +822 0x0000 //TX_FDDRC_RESRV_6 +823 0x7FFF //TX_KS_NOISEPASTE_FACTOR +824 0x0001 //TX_KS_CONFIG +825 0x7FFF //TX_KS_GAIN_MIN +826 0x0000 //TX_KS_RESRV_0 +827 0x0000 //TX_KS_RESRV_1 +828 0x0000 //TX_KS_RESRV_2 +829 0x7C00 //TX_LAMBDA_PKA_FP +830 0x2000 //TX_TPKA_FP +831 0x0080 //TX_MIN_G_FP +832 0x2000 //TX_MAX_G_FP +833 0x0FA0 //TX_FFP_FP_K_METAL +834 0x4000 //TX_A_POST_FLT_FP +835 0x0F5C //TX_RTO_OUTBEAM_TH +836 0x4CCD //TX_TPKA_FP_THD +837 0x0000 //TX_MAX_G_FP_BLK +838 0x0000 //TX_FFP_FADEIN +839 0x0000 //TX_FFP_FADEOUT +840 0x0000 //TX_WHISPERCTH +841 0x0000 //TX_WHISPERHOLDT +842 0x0000 //TX_WHISP_ENTHH +843 0x0000 //TX_WHISP_ENTHL +844 0x0000 //TX_WHISP_RTOTH +845 0x0000 //TX_WHISP_RTOTH2 +846 0x0096 //TX_MUTE_PERIOD +847 0x0000 //TX_FADE_IN_PERIOD +848 0x0100 //TX_FFP_RESRV_2 +849 0x0020 //TX_FFP_RESRV_3 +850 0x0000 //TX_FFP_RESRV_4 +851 0x0000 //TX_FFP_RESRV_5 +852 0x0000 //TX_FFP_RESRV_6 +853 0x0002 //TX_FILTINDX +854 0x0002 //TX_TDDRC_THRD_0 +855 0x0003 //TX_TDDRC_THRD_1 +856 0x1500 //TX_TDDRC_THRD_2 +857 0x1500 //TX_TDDRC_THRD_3 +858 0x3000 //TX_TDDRC_SLANT_0 +859 0x6E00 //TX_TDDRC_SLANT_1 +860 0x1000 //TX_TDDRC_ALPHA_UP_00 +861 0x7EB8 //TX_TDDRC_ALPHA_DWN_00 +862 0x0000 //TX_TDDRC_HMNC_FLAG +863 0x199A //TX_TDDRC_HMNC_GAIN +864 0x0000 //TX_TDDRC_SMT_FLAG +865 0x0CCD //TX_TDDRC_SMT_W +866 0x0650 //TX_TDDRC_DRC_GAIN +867 0x7FFF //TX_TDDRC_LMT_THRD +868 0x0000 //TX_TDDRC_LMT_ALPHA +869 0x0000 //TX_TFMASKLTH +870 0x0000 //TX_TFMASKLTHL +871 0x0CCD //TX_TFMASKHTH +872 0xECCD //TX_TFMASKLTH_BINVAD +873 0xFCCD //TX_TFMASKLTH_NS_EST +874 0xF800 //TX_TFMASKLTH_DOA +875 0x0CCD //TX_TFMASKTH_BLESSCUT +876 0x1000 //TX_B_LESSCUT_RTO_MASK +877 0x2000 //TX_SB_RHO_MEAN_TH_ABN +878 0x2000 //TX_B_POST_FLT_MASK +879 0x0000 //TX_B_POST_FLT_MASK1 +880 0x6333 //TX_GAIN_WIND_MASK +881 0x0000 //TX_TFMASK_BFSTRICT_MUSIC +882 0x0000 //TX_TFMASK_BFSTRICT_NOMUSIC +883 0x7333 //TX_FASTNS_OUTIN_TH +884 0x0CCD //TX_FASTNS_TFMASK_TH +885 0x0CCD //TX_FASTNS_TFMASKBIN_TH1 +886 0x0CCD //TX_FASTNS_TFMASKBIN_TH2 +887 0x0CCD //TX_FASTNS_TFMASKBIN_TH3 +888 0x0028 //TX_FASTNS_ARSPC_TH +889 0xC000 //TX_FASTNS_MASK5_TH +890 0x0810 //TX_POSTSSA_MIN_G_VR_MASK +891 0x1000 //TX_A_LESSCUT_RTO_MASK +892 0x1770 //TX_FASTNS_NOISETH +893 0xC000 //TX_FASTNS_SSA_THLFL +894 0xC000 //TX_FASTNS_SSA_THHFL +895 0xCCCC //TX_FASTNS_SSA_THLFH +896 0xD999 //TX_FASTNS_SSA_THHFH +897 0x2339 //TX_SENDFUNC_REG_MICMUTE +898 0x0021 //TX_SENDFUNC_REG_MICMUTE1 +899 0x02BC //TX_MICMUTE_RATIO_THR +900 0x0140 //TX_MICMUTE_AMP_THR +901 0x0004 //TX_MICMUTE_HPF_IND +902 0x00C0 //TX_MICMUTE_LOG_EYR_TH +903 0x0008 //TX_MICMUTE_CVG_TIME +904 0x0008 //TX_MICMUTE_RELEASE_TIME +905 0x01FE //TX_MIC_VOLUME_MIC0MUTE +906 0x0020 //TX_MICMUTE_EPD_OFFSET_0 +907 0x001E //TX_MICMUTE_FRQ_AEC_L +908 0x7999 //TX_MICMUTE_EAD_THR +909 0x7FFF //TX_MICMUTE_LAMBDA_CB_NLE +910 0x7FFF //TX_MICMUTE_LAMBDA_RE_EST +911 0x4000 //TX_DTD_THR1_MICMUTE_0 +912 0x7000 //TX_DTD_THR1_MICMUTE_1 +913 0x7FFF //TX_DTD_THR1_MICMUTE_2 +914 0x7FFF //TX_DTD_THR1_MICMUTE_3 +915 0x6CCC //TX_DTD_THR2_MICMUTE_0 +916 0x0400 //TX_MICMUTE_MIN_EQ_RE_EST_0 +917 0x0400 //TX_MICMUTE_MIN_EQ_RE_EST_1 +918 0x1000 //TX_MICMUTE_MIN_EQ_RE_EST_2 +919 0x7FFF //TX_MICMUTE_MIN_EQ_RE_EST_3 +920 0x7FFF //TX_MICMUTE_MIN_EQ_RE_EST_4 +921 0x4000 //TX_MICMUTE_C_POST_FLT +922 0x03E8 //TX_MICMUTE_DT_CUT_K +923 0x0001 //TX_MICMUTE_DT_CUT_THR +924 0x03E8 //TX_MICMUTE_DT_CUT_K2 +925 0x0001 //TX_MICMUTE_DT_CUT_THR2 +926 0x0064 //TX_MICMUTE_DT2_HOLD_N +927 0x1000 //TX_MICMUTE_RATIODTH_THCUT +928 0x1000 //TX_MICMUTE_B_POST_FLT_ECHOL +929 0x7FFF //TX_MICMUTE_B_POST_FLT_ECHOH +930 0x0400 //TX_MICMUTE_C_POST_FLT_MASK +931 0x7999 //TX_MICMUTE_RATIODTL_CUT_TH +932 0x0258 //TX_MICMUTE_DT_CUT_K1 +933 0x0800 //TX_MICMUTE_N2_SN_EST +934 0xFC00 //TX_MICMUTE_THR_SN_EST_0 +935 0x001C //TX_MICMUTE_MIN_G_CTRL_0 +936 0x6000 //TX_MICMUTE_A_POST_FILT_S_0 +937 0x7000 //TX_MICMUTE_B_POST_FILT_0 +938 0x2710 //TX_MIC1RUB_AMP_THR +939 0x0010 //TX_MIC1MUTE_RATIO_THR +940 0x0450 //TX_MIC1MUTE_AMP_THR +941 0x0008 //TX_MIC1MUTE_CVG_TIME +942 0x0008 //TX_MIC1MUTE_RELEASE_TIME +943 0x0000 //TX_AMS_RESRV_01 +944 0x0000 //TX_AMS_RESRV_02 +945 0x0000 //TX_AMS_RESRV_03 +946 0x0000 //TX_AMS_RESRV_04 +947 0x0000 //TX_AMS_RESRV_05 +948 0x0000 //TX_AMS_RESRV_06 +949 0x0000 //TX_AMS_RESRV_07 +950 0x0000 //TX_AMS_RESRV_08 +951 0x0000 //TX_AMS_RESRV_09 +952 0x0000 //TX_AMS_RESRV_10 +953 0x0000 //TX_AMS_RESRV_11 +954 0x0000 //TX_AMS_RESRV_12 +955 0x0000 //TX_AMS_RESRV_13 +956 0x0000 //TX_AMS_RESRV_14 +957 0x0000 //TX_AMS_RESRV_15 +958 0x0000 //TX_AMS_RESRV_16 +959 0x0000 //TX_AMS_RESRV_17 +960 0x0000 //TX_AMS_RESRV_18 +961 0x0000 //TX_AMS_RESRV_19 +#RX +0 0x203C //RX_RECVFUNC_MODE_0 +1 0x0000 //RX_RECVFUNC_MODE_1 +2 0x0003 //RX_SAMPLINGFREQ_SIG +3 0x0003 //RX_SAMPLINGFREQ_PROC +4 0x000A //RX_FRAME_SZ +5 0x0000 //RX_DELAY_OPT +6 0x1000 //RX_TDDRC_ALPHA_UP_1 +7 0x1000 //RX_TDDRC_ALPHA_UP_2 +8 0x1000 //RX_TDDRC_ALPHA_UP_3 +9 0x1000 //RX_TDDRC_ALPHA_UP_4 +10 0x05AA //RX_PGA +11 0x7FFF //RX_A_HP +12 0x4000 //RX_B_PE +13 0x5800 //RX_THR_PITCH_DET_0 +14 0x5000 //RX_THR_PITCH_DET_1 +15 0x4000 //RX_THR_PITCH_DET_2 +16 0x0008 //RX_PITCH_BFR_LEN +17 0x0003 //RX_SBD_PITCH_DET +18 0x0100 //RX_PP_RESRV_0 +19 0x0020 //RX_PP_RESRV_1 +20 0x0600 //RX_N_SN_EST +21 0x000C //RX_N2_SN_EST +22 0x000F //RX_NS_LVL_CTRL +23 0xF800 //RX_THR_SN_EST +24 0x7E00 //RX_LAMBDA_PFILT +25 0x000A //RX_FENS_RESRV_0 +26 0x0190 //RX_FENS_RESRV_1 +27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +30 0x0002 //RX_EXTRA_NS_L +31 0x0800 //RX_EXTRA_NS_A +32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +33 0x7000 //RX_TDDRC_LIMITER_THRD +34 0x0800 //RX_TDDRC_LIMITER_GAIN +35 0x199A //RX_A_POST_FLT +36 0x0000 //RX_LMT_THRD +37 0x4000 //RX_LMT_ALPHA +38 0x0020 //RX_FDEQ_SUBNUM +39 0x483E //RX_FDEQ_GAIN_0 +40 0x3E3E //RX_FDEQ_GAIN_1 +41 0x3E4C //RX_FDEQ_GAIN_2 +42 0x5064 //RX_FDEQ_GAIN_3 +43 0x7076 //RX_FDEQ_GAIN_4 +44 0x897A //RX_FDEQ_GAIN_5 +45 0x7C80 //RX_FDEQ_GAIN_6 +46 0x8888 //RX_FDEQ_GAIN_7 +47 0x949C //RX_FDEQ_GAIN_8 +48 0x96A4 //RX_FDEQ_GAIN_9 +49 0xA9A0 //RX_FDEQ_GAIN_10 +50 0x9487 //RX_FDEQ_GAIN_11 +51 0x6F64 //RX_FDEQ_GAIN_12 +52 0x625A //RX_FDEQ_GAIN_13 +53 0x5D80 //RX_FDEQ_GAIN_14 +54 0x8890 //RX_FDEQ_GAIN_15 +55 0x4848 //RX_FDEQ_GAIN_16 +56 0x4848 //RX_FDEQ_GAIN_17 +57 0x4848 //RX_FDEQ_GAIN_18 +58 0x4848 //RX_FDEQ_GAIN_19 +59 0x4848 //RX_FDEQ_GAIN_20 +60 0x4848 //RX_FDEQ_GAIN_21 +61 0x4848 //RX_FDEQ_GAIN_22 +62 0x4848 //RX_FDEQ_GAIN_23 +63 0x0202 //RX_FDEQ_BIN_0 +64 0x0202 //RX_FDEQ_BIN_1 +65 0x0301 //RX_FDEQ_BIN_2 +66 0x0404 //RX_FDEQ_BIN_3 +67 0x0406 //RX_FDEQ_BIN_4 +68 0x0109 //RX_FDEQ_BIN_5 +69 0x0708 //RX_FDEQ_BIN_6 +70 0x090A //RX_FDEQ_BIN_7 +71 0x0B0C //RX_FDEQ_BIN_8 +72 0x0D0E //RX_FDEQ_BIN_9 +73 0x1013 //RX_FDEQ_BIN_10 +74 0x1719 //RX_FDEQ_BIN_11 +75 0x1B0F //RX_FDEQ_BIN_12 +76 0x141E //RX_FDEQ_BIN_13 +77 0x3728 //RX_FDEQ_BIN_14 +78 0x282C //RX_FDEQ_BIN_15 +79 0x0000 //RX_FDEQ_BIN_16 +80 0x0000 //RX_FDEQ_BIN_17 +81 0x0000 //RX_FDEQ_BIN_18 +82 0x0000 //RX_FDEQ_BIN_19 +83 0x0000 //RX_FDEQ_BIN_20 +84 0x0000 //RX_FDEQ_BIN_21 +85 0x0000 //RX_FDEQ_BIN_22 +86 0x0000 //RX_FDEQ_BIN_23 +87 0x4000 //RX_FDEQ_RESRV_0 +88 0x0320 //RX_FDEQ_RESRV_1 +89 0x0018 //RX_FDDRC_BAND_MARGIN_0 +90 0x0030 //RX_FDDRC_BAND_MARGIN_1 +91 0x0050 //RX_FDDRC_BAND_MARGIN_2 +92 0x0080 //RX_FDDRC_BAND_MARGIN_3 +93 0x0007 //RX_FDDRC_BLOCK_EXP +94 0x5000 //RX_FDDRC_THRD_2_0 +95 0x5000 //RX_FDDRC_THRD_2_1 +96 0x5000 //RX_FDDRC_THRD_2_2 +97 0x5000 //RX_FDDRC_THRD_2_3 +98 0x6400 //RX_FDDRC_THRD_3_0 +99 0x6400 //RX_FDDRC_THRD_3_1 +100 0x6400 //RX_FDDRC_THRD_3_2 +101 0x6400 //RX_FDDRC_THRD_3_3 +102 0x2000 //RX_FDDRC_SLANT_0_0 +103 0x2000 //RX_FDDRC_SLANT_0_1 +104 0x2000 //RX_FDDRC_SLANT_0_2 +105 0x2000 //RX_FDDRC_SLANT_0_3 +106 0x5333 //RX_FDDRC_SLANT_1_0 +107 0x5333 //RX_FDDRC_SLANT_1_1 +108 0x5333 //RX_FDDRC_SLANT_1_2 +109 0x5333 //RX_FDDRC_SLANT_1_3 +110 0x0000 //RX_FDDRC_RESRV_0 +111 0x0002 //RX_FILTINDX +112 0x0001 //RX_TDDRC_THRD_0 +113 0x0002 //RX_TDDRC_THRD_1 +114 0x1800 //RX_TDDRC_THRD_2 +115 0x1800 //RX_TDDRC_THRD_3 +116 0x7FFF //RX_TDDRC_SLANT_0 +117 0x7FFF //RX_TDDRC_SLANT_1 +118 0x1000 //RX_TDDRC_ALPHA_UP_0 +119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +120 0x0000 //RX_TDDRC_HMNC_FLAG +121 0x199A //RX_TDDRC_HMNC_GAIN +122 0x0001 //RX_TDDRC_SMT_FLAG +123 0x0CCD //RX_TDDRC_SMT_W +124 0x0551 //RX_TDDRC_DRC_GAIN +125 0x7C00 //RX_LAMBDA_PKA_FP +126 0x13E0 //RX_TPKA_FP +127 0x0080 //RX_MIN_G_FP +128 0x2000 //RX_MAX_G_FP +129 0x0100 //RX_SPK_VOL +130 0x0000 //RX_VOL_RESRV_0 +131 0x0000 //RX_MAXLEVEL_CNG +132 0x3000 //RX_BWE_UV_TH +133 0x3000 //RX_BWE_UV_TH2 +134 0x1800 //RX_BWE_UV_TH3 +135 0x1000 //RX_BWE_V_TH +136 0x04CD //RX_BWE_GAIN1_V_TH1 +137 0x0F33 //RX_BWE_GAIN1_V_TH2 +138 0x7333 //RX_BWE_UV_EQ +139 0x199A //RX_BWE_V_EQ +140 0x7333 //RX_BWE_TONE_TH +141 0x0004 //RX_BWE_UV_HOLD_T +142 0x6CCD //RX_BWE_GAIN2_ALPHA +143 0x799A //RX_BWE_GAIN3_ALPHA +144 0x001E //RX_BWE_CUTOFF +145 0x3000 //RX_BWE_GAINFILL +146 0x3200 //RX_BWE_MAXTH_TONE +147 0x2000 //RX_BWE_EQ_0 +148 0x2000 //RX_BWE_EQ_1 +149 0x2000 //RX_BWE_EQ_2 +150 0x2000 //RX_BWE_EQ_3 +151 0x2000 //RX_BWE_EQ_4 +152 0x2000 //RX_BWE_EQ_5 +153 0x2000 //RX_BWE_EQ_6 +154 0x0000 //RX_BWE_RESRV_0 +155 0x0000 //RX_BWE_RESRV_1 +156 0x0000 //RX_BWE_RESRV_2 +#VOL 0 +6 0x1000 //RX_TDDRC_ALPHA_UP_1 +7 0x1000 //RX_TDDRC_ALPHA_UP_2 +8 0x1000 //RX_TDDRC_ALPHA_UP_3 +9 0x1000 //RX_TDDRC_ALPHA_UP_4 +27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +33 0x7000 //RX_TDDRC_LIMITER_THRD +34 0x0800 //RX_TDDRC_LIMITER_GAIN +112 0x0001 //RX_TDDRC_THRD_0 +113 0x0002 //RX_TDDRC_THRD_1 +114 0x1800 //RX_TDDRC_THRD_2 +115 0x1800 //RX_TDDRC_THRD_3 +116 0x7FFF //RX_TDDRC_SLANT_0 +117 0x7FFF //RX_TDDRC_SLANT_1 +118 0x1000 //RX_TDDRC_ALPHA_UP_0 +119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +120 0x0000 //RX_TDDRC_HMNC_FLAG +121 0x199A //RX_TDDRC_HMNC_GAIN +122 0x0001 //RX_TDDRC_SMT_FLAG +123 0x0CCD //RX_TDDRC_SMT_W +124 0x056F //RX_TDDRC_DRC_GAIN +38 0x0020 //RX_FDEQ_SUBNUM +39 0x483E //RX_FDEQ_GAIN_0 +40 0x3E3E //RX_FDEQ_GAIN_1 +41 0x3E4C //RX_FDEQ_GAIN_2 +42 0x586E //RX_FDEQ_GAIN_3 +43 0x8496 //RX_FDEQ_GAIN_4 +44 0x968E //RX_FDEQ_GAIN_5 +45 0x8488 //RX_FDEQ_GAIN_6 +46 0x8884 //RX_FDEQ_GAIN_7 +47 0x9CA4 //RX_FDEQ_GAIN_8 +48 0x98A8 //RX_FDEQ_GAIN_9 +49 0xBEB8 //RX_FDEQ_GAIN_10 +50 0x918D //RX_FDEQ_GAIN_11 +51 0x7566 //RX_FDEQ_GAIN_12 +52 0x6460 //RX_FDEQ_GAIN_13 +53 0x6174 //RX_FDEQ_GAIN_14 +54 0x7890 //RX_FDEQ_GAIN_15 +55 0x4848 //RX_FDEQ_GAIN_16 +56 0x4848 //RX_FDEQ_GAIN_17 +57 0x4848 //RX_FDEQ_GAIN_18 +58 0x4848 //RX_FDEQ_GAIN_19 +59 0x4848 //RX_FDEQ_GAIN_20 +60 0x4848 //RX_FDEQ_GAIN_21 +61 0x4848 //RX_FDEQ_GAIN_22 +62 0x4848 //RX_FDEQ_GAIN_23 +63 0x0202 //RX_FDEQ_BIN_0 +64 0x0202 //RX_FDEQ_BIN_1 +65 0x0301 //RX_FDEQ_BIN_2 +66 0x0404 //RX_FDEQ_BIN_3 +67 0x0406 //RX_FDEQ_BIN_4 +68 0x0109 //RX_FDEQ_BIN_5 +69 0x0708 //RX_FDEQ_BIN_6 +70 0x090A //RX_FDEQ_BIN_7 +71 0x0B0C //RX_FDEQ_BIN_8 +72 0x0D09 //RX_FDEQ_BIN_9 +73 0x0819 //RX_FDEQ_BIN_10 +74 0x1E19 //RX_FDEQ_BIN_11 +75 0x1B0F //RX_FDEQ_BIN_12 +76 0x141E //RX_FDEQ_BIN_13 +77 0x3728 //RX_FDEQ_BIN_14 +78 0x282C //RX_FDEQ_BIN_15 +79 0x0000 //RX_FDEQ_BIN_16 +80 0x0000 //RX_FDEQ_BIN_17 +81 0x0000 //RX_FDEQ_BIN_18 +82 0x0000 //RX_FDEQ_BIN_19 +83 0x0000 //RX_FDEQ_BIN_20 +84 0x0000 //RX_FDEQ_BIN_21 +85 0x0000 //RX_FDEQ_BIN_22 +86 0x0000 //RX_FDEQ_BIN_23 +87 0x4000 //RX_FDEQ_RESRV_0 +88 0x0320 //RX_FDEQ_RESRV_1 +89 0x0018 //RX_FDDRC_BAND_MARGIN_0 +90 0x0030 //RX_FDDRC_BAND_MARGIN_1 +91 0x0050 //RX_FDDRC_BAND_MARGIN_2 +92 0x0080 //RX_FDDRC_BAND_MARGIN_3 +93 0x0007 //RX_FDDRC_BLOCK_EXP +94 0x5000 //RX_FDDRC_THRD_2_0 +95 0x5000 //RX_FDDRC_THRD_2_1 +96 0x5000 //RX_FDDRC_THRD_2_2 +97 0x5000 //RX_FDDRC_THRD_2_3 +98 0x6400 //RX_FDDRC_THRD_3_0 +99 0x6400 //RX_FDDRC_THRD_3_1 +100 0x6400 //RX_FDDRC_THRD_3_2 +101 0x6400 //RX_FDDRC_THRD_3_3 +102 0x2000 //RX_FDDRC_SLANT_0_0 +103 0x2000 //RX_FDDRC_SLANT_0_1 +104 0x2000 //RX_FDDRC_SLANT_0_2 +105 0x2000 //RX_FDDRC_SLANT_0_3 +106 0x5333 //RX_FDDRC_SLANT_1_0 +107 0x5333 //RX_FDDRC_SLANT_1_1 +108 0x5333 //RX_FDDRC_SLANT_1_2 +109 0x5333 //RX_FDDRC_SLANT_1_3 +110 0x0000 //RX_FDDRC_RESRV_0 +129 0x000A //RX_SPK_VOL +130 0x0000 //RX_VOL_RESRV_0 +#VOL 1 +6 0x1000 //RX_TDDRC_ALPHA_UP_1 +7 0x1000 //RX_TDDRC_ALPHA_UP_2 +8 0x1000 //RX_TDDRC_ALPHA_UP_3 +9 0x1000 //RX_TDDRC_ALPHA_UP_4 +27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +33 0x7000 //RX_TDDRC_LIMITER_THRD +34 0x0800 //RX_TDDRC_LIMITER_GAIN +112 0x0001 //RX_TDDRC_THRD_0 +113 0x0002 //RX_TDDRC_THRD_1 +114 0x1800 //RX_TDDRC_THRD_2 +115 0x1800 //RX_TDDRC_THRD_3 +116 0x7FFF //RX_TDDRC_SLANT_0 +117 0x7FFF //RX_TDDRC_SLANT_1 +118 0x1000 //RX_TDDRC_ALPHA_UP_0 +119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +120 0x0000 //RX_TDDRC_HMNC_FLAG +121 0x199A //RX_TDDRC_HMNC_GAIN +122 0x0001 //RX_TDDRC_SMT_FLAG +123 0x0CCD //RX_TDDRC_SMT_W +124 0x056F //RX_TDDRC_DRC_GAIN +38 0x0020 //RX_FDEQ_SUBNUM +39 0x483E //RX_FDEQ_GAIN_0 +40 0x3E3E //RX_FDEQ_GAIN_1 +41 0x3E4C //RX_FDEQ_GAIN_2 +42 0x586E //RX_FDEQ_GAIN_3 +43 0x8496 //RX_FDEQ_GAIN_4 +44 0x968E //RX_FDEQ_GAIN_5 +45 0x8488 //RX_FDEQ_GAIN_6 +46 0x8884 //RX_FDEQ_GAIN_7 +47 0x9CA4 //RX_FDEQ_GAIN_8 +48 0x98A8 //RX_FDEQ_GAIN_9 +49 0xBEB8 //RX_FDEQ_GAIN_10 +50 0x918D //RX_FDEQ_GAIN_11 +51 0x7566 //RX_FDEQ_GAIN_12 +52 0x6460 //RX_FDEQ_GAIN_13 +53 0x6174 //RX_FDEQ_GAIN_14 +54 0x7890 //RX_FDEQ_GAIN_15 +55 0x4848 //RX_FDEQ_GAIN_16 +56 0x4848 //RX_FDEQ_GAIN_17 +57 0x4848 //RX_FDEQ_GAIN_18 +58 0x4848 //RX_FDEQ_GAIN_19 +59 0x4848 //RX_FDEQ_GAIN_20 +60 0x4848 //RX_FDEQ_GAIN_21 +61 0x4848 //RX_FDEQ_GAIN_22 +62 0x4848 //RX_FDEQ_GAIN_23 +63 0x0202 //RX_FDEQ_BIN_0 +64 0x0202 //RX_FDEQ_BIN_1 +65 0x0301 //RX_FDEQ_BIN_2 +66 0x0404 //RX_FDEQ_BIN_3 +67 0x0406 //RX_FDEQ_BIN_4 +68 0x0109 //RX_FDEQ_BIN_5 +69 0x0708 //RX_FDEQ_BIN_6 +70 0x090A //RX_FDEQ_BIN_7 +71 0x0B0C //RX_FDEQ_BIN_8 +72 0x0D09 //RX_FDEQ_BIN_9 +73 0x0819 //RX_FDEQ_BIN_10 +74 0x1E19 //RX_FDEQ_BIN_11 +75 0x1B0F //RX_FDEQ_BIN_12 +76 0x141E //RX_FDEQ_BIN_13 +77 0x3728 //RX_FDEQ_BIN_14 +78 0x282C //RX_FDEQ_BIN_15 +79 0x0000 //RX_FDEQ_BIN_16 +80 0x0000 //RX_FDEQ_BIN_17 +81 0x0000 //RX_FDEQ_BIN_18 +82 0x0000 //RX_FDEQ_BIN_19 +83 0x0000 //RX_FDEQ_BIN_20 +84 0x0000 //RX_FDEQ_BIN_21 +85 0x0000 //RX_FDEQ_BIN_22 +86 0x0000 //RX_FDEQ_BIN_23 +87 0x4000 //RX_FDEQ_RESRV_0 +88 0x0320 //RX_FDEQ_RESRV_1 +89 0x0018 //RX_FDDRC_BAND_MARGIN_0 +90 0x0030 //RX_FDDRC_BAND_MARGIN_1 +91 0x0050 //RX_FDDRC_BAND_MARGIN_2 +92 0x0080 //RX_FDDRC_BAND_MARGIN_3 +93 0x0007 //RX_FDDRC_BLOCK_EXP +94 0x5000 //RX_FDDRC_THRD_2_0 +95 0x5000 //RX_FDDRC_THRD_2_1 +96 0x5000 //RX_FDDRC_THRD_2_2 +97 0x5000 //RX_FDDRC_THRD_2_3 +98 0x6400 //RX_FDDRC_THRD_3_0 +99 0x6400 //RX_FDDRC_THRD_3_1 +100 0x6400 //RX_FDDRC_THRD_3_2 +101 0x6400 //RX_FDDRC_THRD_3_3 +102 0x2000 //RX_FDDRC_SLANT_0_0 +103 0x2000 //RX_FDDRC_SLANT_0_1 +104 0x2000 //RX_FDDRC_SLANT_0_2 +105 0x2000 //RX_FDDRC_SLANT_0_3 +106 0x5333 //RX_FDDRC_SLANT_1_0 +107 0x5333 //RX_FDDRC_SLANT_1_1 +108 0x5333 //RX_FDDRC_SLANT_1_2 +109 0x5333 //RX_FDDRC_SLANT_1_3 +110 0x0000 //RX_FDDRC_RESRV_0 +129 0x0010 //RX_SPK_VOL +130 0x0000 //RX_VOL_RESRV_0 +#VOL 2 +6 0x1000 //RX_TDDRC_ALPHA_UP_1 +7 0x1000 //RX_TDDRC_ALPHA_UP_2 +8 0x1000 //RX_TDDRC_ALPHA_UP_3 +9 0x1000 //RX_TDDRC_ALPHA_UP_4 +27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +33 0x7000 //RX_TDDRC_LIMITER_THRD +34 0x0800 //RX_TDDRC_LIMITER_GAIN +112 0x0001 //RX_TDDRC_THRD_0 +113 0x0002 //RX_TDDRC_THRD_1 +114 0x1800 //RX_TDDRC_THRD_2 +115 0x1800 //RX_TDDRC_THRD_3 +116 0x7FFF //RX_TDDRC_SLANT_0 +117 0x7FFF //RX_TDDRC_SLANT_1 +118 0x1000 //RX_TDDRC_ALPHA_UP_0 +119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +120 0x0000 //RX_TDDRC_HMNC_FLAG +121 0x199A //RX_TDDRC_HMNC_GAIN +122 0x0001 //RX_TDDRC_SMT_FLAG +123 0x0CCD //RX_TDDRC_SMT_W +124 0x056F //RX_TDDRC_DRC_GAIN +38 0x0020 //RX_FDEQ_SUBNUM +39 0x483E //RX_FDEQ_GAIN_0 +40 0x3E3E //RX_FDEQ_GAIN_1 +41 0x3E4C //RX_FDEQ_GAIN_2 +42 0x586E //RX_FDEQ_GAIN_3 +43 0x8496 //RX_FDEQ_GAIN_4 +44 0x968E //RX_FDEQ_GAIN_5 +45 0x8488 //RX_FDEQ_GAIN_6 +46 0x8884 //RX_FDEQ_GAIN_7 +47 0x9CA4 //RX_FDEQ_GAIN_8 +48 0x98A8 //RX_FDEQ_GAIN_9 +49 0xBEB8 //RX_FDEQ_GAIN_10 +50 0x918D //RX_FDEQ_GAIN_11 +51 0x7566 //RX_FDEQ_GAIN_12 +52 0x6460 //RX_FDEQ_GAIN_13 +53 0x6174 //RX_FDEQ_GAIN_14 +54 0x7890 //RX_FDEQ_GAIN_15 +55 0x4848 //RX_FDEQ_GAIN_16 +56 0x4848 //RX_FDEQ_GAIN_17 +57 0x4848 //RX_FDEQ_GAIN_18 +58 0x4848 //RX_FDEQ_GAIN_19 +59 0x4848 //RX_FDEQ_GAIN_20 +60 0x4848 //RX_FDEQ_GAIN_21 +61 0x4848 //RX_FDEQ_GAIN_22 +62 0x4848 //RX_FDEQ_GAIN_23 +63 0x0202 //RX_FDEQ_BIN_0 +64 0x0202 //RX_FDEQ_BIN_1 +65 0x0301 //RX_FDEQ_BIN_2 +66 0x0404 //RX_FDEQ_BIN_3 +67 0x0406 //RX_FDEQ_BIN_4 +68 0x0109 //RX_FDEQ_BIN_5 +69 0x0708 //RX_FDEQ_BIN_6 +70 0x090A //RX_FDEQ_BIN_7 +71 0x0B0C //RX_FDEQ_BIN_8 +72 0x0D09 //RX_FDEQ_BIN_9 +73 0x0819 //RX_FDEQ_BIN_10 +74 0x1E19 //RX_FDEQ_BIN_11 +75 0x1B0F //RX_FDEQ_BIN_12 +76 0x141E //RX_FDEQ_BIN_13 +77 0x3728 //RX_FDEQ_BIN_14 +78 0x282C //RX_FDEQ_BIN_15 +79 0x0000 //RX_FDEQ_BIN_16 +80 0x0000 //RX_FDEQ_BIN_17 +81 0x0000 //RX_FDEQ_BIN_18 +82 0x0000 //RX_FDEQ_BIN_19 +83 0x0000 //RX_FDEQ_BIN_20 +84 0x0000 //RX_FDEQ_BIN_21 +85 0x0000 //RX_FDEQ_BIN_22 +86 0x0000 //RX_FDEQ_BIN_23 +87 0x4000 //RX_FDEQ_RESRV_0 +88 0x0320 //RX_FDEQ_RESRV_1 +89 0x0018 //RX_FDDRC_BAND_MARGIN_0 +90 0x0030 //RX_FDDRC_BAND_MARGIN_1 +91 0x0050 //RX_FDDRC_BAND_MARGIN_2 +92 0x0080 //RX_FDDRC_BAND_MARGIN_3 +93 0x0007 //RX_FDDRC_BLOCK_EXP +94 0x5000 //RX_FDDRC_THRD_2_0 +95 0x5000 //RX_FDDRC_THRD_2_1 +96 0x5000 //RX_FDDRC_THRD_2_2 +97 0x5000 //RX_FDDRC_THRD_2_3 +98 0x6400 //RX_FDDRC_THRD_3_0 +99 0x6400 //RX_FDDRC_THRD_3_1 +100 0x6400 //RX_FDDRC_THRD_3_2 +101 0x6400 //RX_FDDRC_THRD_3_3 +102 0x2000 //RX_FDDRC_SLANT_0_0 +103 0x2000 //RX_FDDRC_SLANT_0_1 +104 0x2000 //RX_FDDRC_SLANT_0_2 +105 0x2000 //RX_FDDRC_SLANT_0_3 +106 0x5333 //RX_FDDRC_SLANT_1_0 +107 0x5333 //RX_FDDRC_SLANT_1_1 +108 0x5333 //RX_FDDRC_SLANT_1_2 +109 0x5333 //RX_FDDRC_SLANT_1_3 +110 0x0000 //RX_FDDRC_RESRV_0 +129 0x001B //RX_SPK_VOL +130 0x0000 //RX_VOL_RESRV_0 +#VOL 3 +6 0x1000 //RX_TDDRC_ALPHA_UP_1 +7 0x1000 //RX_TDDRC_ALPHA_UP_2 +8 0x1000 //RX_TDDRC_ALPHA_UP_3 +9 0x1000 //RX_TDDRC_ALPHA_UP_4 +27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +33 0x7000 //RX_TDDRC_LIMITER_THRD +34 0x0800 //RX_TDDRC_LIMITER_GAIN +112 0x0001 //RX_TDDRC_THRD_0 +113 0x0002 //RX_TDDRC_THRD_1 +114 0x1800 //RX_TDDRC_THRD_2 +115 0x1800 //RX_TDDRC_THRD_3 +116 0x7FFF //RX_TDDRC_SLANT_0 +117 0x7FFF //RX_TDDRC_SLANT_1 +118 0x1000 //RX_TDDRC_ALPHA_UP_0 +119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +120 0x0000 //RX_TDDRC_HMNC_FLAG +121 0x199A //RX_TDDRC_HMNC_GAIN +122 0x0001 //RX_TDDRC_SMT_FLAG +123 0x0CCD //RX_TDDRC_SMT_W +124 0x056F //RX_TDDRC_DRC_GAIN +38 0x0020 //RX_FDEQ_SUBNUM +39 0x483E //RX_FDEQ_GAIN_0 +40 0x3E3E //RX_FDEQ_GAIN_1 +41 0x3E4C //RX_FDEQ_GAIN_2 +42 0x586E //RX_FDEQ_GAIN_3 +43 0x8496 //RX_FDEQ_GAIN_4 +44 0x968E //RX_FDEQ_GAIN_5 +45 0x8488 //RX_FDEQ_GAIN_6 +46 0x8884 //RX_FDEQ_GAIN_7 +47 0x9CA4 //RX_FDEQ_GAIN_8 +48 0x98A8 //RX_FDEQ_GAIN_9 +49 0xBEB8 //RX_FDEQ_GAIN_10 +50 0x918D //RX_FDEQ_GAIN_11 +51 0x7566 //RX_FDEQ_GAIN_12 +52 0x6460 //RX_FDEQ_GAIN_13 +53 0x6174 //RX_FDEQ_GAIN_14 +54 0x7890 //RX_FDEQ_GAIN_15 +55 0x4848 //RX_FDEQ_GAIN_16 +56 0x4848 //RX_FDEQ_GAIN_17 +57 0x4848 //RX_FDEQ_GAIN_18 +58 0x4848 //RX_FDEQ_GAIN_19 +59 0x4848 //RX_FDEQ_GAIN_20 +60 0x4848 //RX_FDEQ_GAIN_21 +61 0x4848 //RX_FDEQ_GAIN_22 +62 0x4848 //RX_FDEQ_GAIN_23 +63 0x0202 //RX_FDEQ_BIN_0 +64 0x0202 //RX_FDEQ_BIN_1 +65 0x0301 //RX_FDEQ_BIN_2 +66 0x0404 //RX_FDEQ_BIN_3 +67 0x0406 //RX_FDEQ_BIN_4 +68 0x0109 //RX_FDEQ_BIN_5 +69 0x0708 //RX_FDEQ_BIN_6 +70 0x090A //RX_FDEQ_BIN_7 +71 0x0B0C //RX_FDEQ_BIN_8 +72 0x0D09 //RX_FDEQ_BIN_9 +73 0x0819 //RX_FDEQ_BIN_10 +74 0x1E19 //RX_FDEQ_BIN_11 +75 0x1B0F //RX_FDEQ_BIN_12 +76 0x141E //RX_FDEQ_BIN_13 +77 0x3728 //RX_FDEQ_BIN_14 +78 0x282C //RX_FDEQ_BIN_15 +79 0x0000 //RX_FDEQ_BIN_16 +80 0x0000 //RX_FDEQ_BIN_17 +81 0x0000 //RX_FDEQ_BIN_18 +82 0x0000 //RX_FDEQ_BIN_19 +83 0x0000 //RX_FDEQ_BIN_20 +84 0x0000 //RX_FDEQ_BIN_21 +85 0x0000 //RX_FDEQ_BIN_22 +86 0x0000 //RX_FDEQ_BIN_23 +87 0x4000 //RX_FDEQ_RESRV_0 +88 0x0320 //RX_FDEQ_RESRV_1 +89 0x0018 //RX_FDDRC_BAND_MARGIN_0 +90 0x0030 //RX_FDDRC_BAND_MARGIN_1 +91 0x0050 //RX_FDDRC_BAND_MARGIN_2 +92 0x0080 //RX_FDDRC_BAND_MARGIN_3 +93 0x0007 //RX_FDDRC_BLOCK_EXP +94 0x5000 //RX_FDDRC_THRD_2_0 +95 0x5000 //RX_FDDRC_THRD_2_1 +96 0x5000 //RX_FDDRC_THRD_2_2 +97 0x5000 //RX_FDDRC_THRD_2_3 +98 0x6400 //RX_FDDRC_THRD_3_0 +99 0x6400 //RX_FDDRC_THRD_3_1 +100 0x6400 //RX_FDDRC_THRD_3_2 +101 0x6400 //RX_FDDRC_THRD_3_3 +102 0x2000 //RX_FDDRC_SLANT_0_0 +103 0x2000 //RX_FDDRC_SLANT_0_1 +104 0x2000 //RX_FDDRC_SLANT_0_2 +105 0x2000 //RX_FDDRC_SLANT_0_3 +106 0x5333 //RX_FDDRC_SLANT_1_0 +107 0x5333 //RX_FDDRC_SLANT_1_1 +108 0x5333 //RX_FDDRC_SLANT_1_2 +109 0x5333 //RX_FDDRC_SLANT_1_3 +110 0x0000 //RX_FDDRC_RESRV_0 +129 0x0035 //RX_SPK_VOL +130 0x0000 //RX_VOL_RESRV_0 +#VOL 4 +6 0x1000 //RX_TDDRC_ALPHA_UP_1 +7 0x1000 //RX_TDDRC_ALPHA_UP_2 +8 0x1000 //RX_TDDRC_ALPHA_UP_3 +9 0x1000 //RX_TDDRC_ALPHA_UP_4 +27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +33 0x7000 //RX_TDDRC_LIMITER_THRD +34 0x0800 //RX_TDDRC_LIMITER_GAIN +112 0x0001 //RX_TDDRC_THRD_0 +113 0x0002 //RX_TDDRC_THRD_1 +114 0x1800 //RX_TDDRC_THRD_2 +115 0x1800 //RX_TDDRC_THRD_3 +116 0x7FFF //RX_TDDRC_SLANT_0 +117 0x7FFF //RX_TDDRC_SLANT_1 +118 0x1000 //RX_TDDRC_ALPHA_UP_0 +119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +120 0x0000 //RX_TDDRC_HMNC_FLAG +121 0x199A //RX_TDDRC_HMNC_GAIN +122 0x0001 //RX_TDDRC_SMT_FLAG +123 0x0CCD //RX_TDDRC_SMT_W +124 0x056F //RX_TDDRC_DRC_GAIN +38 0x0020 //RX_FDEQ_SUBNUM +39 0x483E //RX_FDEQ_GAIN_0 +40 0x3E3E //RX_FDEQ_GAIN_1 +41 0x3E4C //RX_FDEQ_GAIN_2 +42 0x586E //RX_FDEQ_GAIN_3 +43 0x8496 //RX_FDEQ_GAIN_4 +44 0x968E //RX_FDEQ_GAIN_5 +45 0x8488 //RX_FDEQ_GAIN_6 +46 0x8884 //RX_FDEQ_GAIN_7 +47 0x9CA4 //RX_FDEQ_GAIN_8 +48 0x98A8 //RX_FDEQ_GAIN_9 +49 0xBEB8 //RX_FDEQ_GAIN_10 +50 0x918D //RX_FDEQ_GAIN_11 +51 0x7566 //RX_FDEQ_GAIN_12 +52 0x6460 //RX_FDEQ_GAIN_13 +53 0x6174 //RX_FDEQ_GAIN_14 +54 0x7890 //RX_FDEQ_GAIN_15 +55 0x4848 //RX_FDEQ_GAIN_16 +56 0x4848 //RX_FDEQ_GAIN_17 +57 0x4848 //RX_FDEQ_GAIN_18 +58 0x4848 //RX_FDEQ_GAIN_19 +59 0x4848 //RX_FDEQ_GAIN_20 +60 0x4848 //RX_FDEQ_GAIN_21 +61 0x4848 //RX_FDEQ_GAIN_22 +62 0x4848 //RX_FDEQ_GAIN_23 +63 0x0202 //RX_FDEQ_BIN_0 +64 0x0202 //RX_FDEQ_BIN_1 +65 0x0301 //RX_FDEQ_BIN_2 +66 0x0404 //RX_FDEQ_BIN_3 +67 0x0406 //RX_FDEQ_BIN_4 +68 0x0109 //RX_FDEQ_BIN_5 +69 0x0708 //RX_FDEQ_BIN_6 +70 0x090A //RX_FDEQ_BIN_7 +71 0x0B0C //RX_FDEQ_BIN_8 +72 0x0D09 //RX_FDEQ_BIN_9 +73 0x0819 //RX_FDEQ_BIN_10 +74 0x1E19 //RX_FDEQ_BIN_11 +75 0x1B0F //RX_FDEQ_BIN_12 +76 0x141E //RX_FDEQ_BIN_13 +77 0x3728 //RX_FDEQ_BIN_14 +78 0x282C //RX_FDEQ_BIN_15 +79 0x0000 //RX_FDEQ_BIN_16 +80 0x0000 //RX_FDEQ_BIN_17 +81 0x0000 //RX_FDEQ_BIN_18 +82 0x0000 //RX_FDEQ_BIN_19 +83 0x0000 //RX_FDEQ_BIN_20 +84 0x0000 //RX_FDEQ_BIN_21 +85 0x0000 //RX_FDEQ_BIN_22 +86 0x0000 //RX_FDEQ_BIN_23 +87 0x4000 //RX_FDEQ_RESRV_0 +88 0x0320 //RX_FDEQ_RESRV_1 +89 0x0018 //RX_FDDRC_BAND_MARGIN_0 +90 0x0030 //RX_FDDRC_BAND_MARGIN_1 +91 0x0050 //RX_FDDRC_BAND_MARGIN_2 +92 0x0080 //RX_FDDRC_BAND_MARGIN_3 +93 0x0007 //RX_FDDRC_BLOCK_EXP +94 0x5000 //RX_FDDRC_THRD_2_0 +95 0x5000 //RX_FDDRC_THRD_2_1 +96 0x5000 //RX_FDDRC_THRD_2_2 +97 0x5000 //RX_FDDRC_THRD_2_3 +98 0x6400 //RX_FDDRC_THRD_3_0 +99 0x6400 //RX_FDDRC_THRD_3_1 +100 0x6400 //RX_FDDRC_THRD_3_2 +101 0x6400 //RX_FDDRC_THRD_3_3 +102 0x2000 //RX_FDDRC_SLANT_0_0 +103 0x2000 //RX_FDDRC_SLANT_0_1 +104 0x2000 //RX_FDDRC_SLANT_0_2 +105 0x2000 //RX_FDDRC_SLANT_0_3 +106 0x5333 //RX_FDDRC_SLANT_1_0 +107 0x5333 //RX_FDDRC_SLANT_1_1 +108 0x5333 //RX_FDDRC_SLANT_1_2 +109 0x5333 //RX_FDDRC_SLANT_1_3 +110 0x0000 //RX_FDDRC_RESRV_0 +129 0x0047 //RX_SPK_VOL +130 0x0000 //RX_VOL_RESRV_0 +#VOL 5 +6 0x1000 //RX_TDDRC_ALPHA_UP_1 +7 0x1000 //RX_TDDRC_ALPHA_UP_2 +8 0x1000 //RX_TDDRC_ALPHA_UP_3 +9 0x1000 //RX_TDDRC_ALPHA_UP_4 +27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +33 0x7000 //RX_TDDRC_LIMITER_THRD +34 0x0800 //RX_TDDRC_LIMITER_GAIN +112 0x0001 //RX_TDDRC_THRD_0 +113 0x0002 //RX_TDDRC_THRD_1 +114 0x1800 //RX_TDDRC_THRD_2 +115 0x1800 //RX_TDDRC_THRD_3 +116 0x7FFF //RX_TDDRC_SLANT_0 +117 0x7FFF //RX_TDDRC_SLANT_1 +118 0x1000 //RX_TDDRC_ALPHA_UP_0 +119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +120 0x0000 //RX_TDDRC_HMNC_FLAG +121 0x199A //RX_TDDRC_HMNC_GAIN +122 0x0001 //RX_TDDRC_SMT_FLAG +123 0x0CCD //RX_TDDRC_SMT_W +124 0x056F //RX_TDDRC_DRC_GAIN +38 0x0020 //RX_FDEQ_SUBNUM +39 0x483E //RX_FDEQ_GAIN_0 +40 0x3E3E //RX_FDEQ_GAIN_1 +41 0x3E4C //RX_FDEQ_GAIN_2 +42 0x586E //RX_FDEQ_GAIN_3 +43 0x8496 //RX_FDEQ_GAIN_4 +44 0x968E //RX_FDEQ_GAIN_5 +45 0x8488 //RX_FDEQ_GAIN_6 +46 0x8884 //RX_FDEQ_GAIN_7 +47 0x9CA4 //RX_FDEQ_GAIN_8 +48 0x98A8 //RX_FDEQ_GAIN_9 +49 0xBEB8 //RX_FDEQ_GAIN_10 +50 0x918D //RX_FDEQ_GAIN_11 +51 0x7566 //RX_FDEQ_GAIN_12 +52 0x6460 //RX_FDEQ_GAIN_13 +53 0x6174 //RX_FDEQ_GAIN_14 +54 0x7890 //RX_FDEQ_GAIN_15 +55 0x4848 //RX_FDEQ_GAIN_16 +56 0x4848 //RX_FDEQ_GAIN_17 +57 0x4848 //RX_FDEQ_GAIN_18 +58 0x4848 //RX_FDEQ_GAIN_19 +59 0x4848 //RX_FDEQ_GAIN_20 +60 0x4848 //RX_FDEQ_GAIN_21 +61 0x4848 //RX_FDEQ_GAIN_22 +62 0x4848 //RX_FDEQ_GAIN_23 +63 0x0202 //RX_FDEQ_BIN_0 +64 0x0202 //RX_FDEQ_BIN_1 +65 0x0301 //RX_FDEQ_BIN_2 +66 0x0404 //RX_FDEQ_BIN_3 +67 0x0406 //RX_FDEQ_BIN_4 +68 0x0109 //RX_FDEQ_BIN_5 +69 0x0708 //RX_FDEQ_BIN_6 +70 0x090A //RX_FDEQ_BIN_7 +71 0x0B0C //RX_FDEQ_BIN_8 +72 0x0D09 //RX_FDEQ_BIN_9 +73 0x0819 //RX_FDEQ_BIN_10 +74 0x1E19 //RX_FDEQ_BIN_11 +75 0x1B0F //RX_FDEQ_BIN_12 +76 0x141E //RX_FDEQ_BIN_13 +77 0x3728 //RX_FDEQ_BIN_14 +78 0x282C //RX_FDEQ_BIN_15 +79 0x0000 //RX_FDEQ_BIN_16 +80 0x0000 //RX_FDEQ_BIN_17 +81 0x0000 //RX_FDEQ_BIN_18 +82 0x0000 //RX_FDEQ_BIN_19 +83 0x0000 //RX_FDEQ_BIN_20 +84 0x0000 //RX_FDEQ_BIN_21 +85 0x0000 //RX_FDEQ_BIN_22 +86 0x0000 //RX_FDEQ_BIN_23 +87 0x4000 //RX_FDEQ_RESRV_0 +88 0x0320 //RX_FDEQ_RESRV_1 +89 0x0018 //RX_FDDRC_BAND_MARGIN_0 +90 0x0030 //RX_FDDRC_BAND_MARGIN_1 +91 0x0050 //RX_FDDRC_BAND_MARGIN_2 +92 0x0080 //RX_FDDRC_BAND_MARGIN_3 +93 0x0007 //RX_FDDRC_BLOCK_EXP +94 0x5000 //RX_FDDRC_THRD_2_0 +95 0x5000 //RX_FDDRC_THRD_2_1 +96 0x5000 //RX_FDDRC_THRD_2_2 +97 0x5000 //RX_FDDRC_THRD_2_3 +98 0x6400 //RX_FDDRC_THRD_3_0 +99 0x6400 //RX_FDDRC_THRD_3_1 +100 0x6400 //RX_FDDRC_THRD_3_2 +101 0x6400 //RX_FDDRC_THRD_3_3 +102 0x2000 //RX_FDDRC_SLANT_0_0 +103 0x2000 //RX_FDDRC_SLANT_0_1 +104 0x2000 //RX_FDDRC_SLANT_0_2 +105 0x2000 //RX_FDDRC_SLANT_0_3 +106 0x5333 //RX_FDDRC_SLANT_1_0 +107 0x5333 //RX_FDDRC_SLANT_1_1 +108 0x5333 //RX_FDDRC_SLANT_1_2 +109 0x5333 //RX_FDDRC_SLANT_1_3 +110 0x0000 //RX_FDDRC_RESRV_0 +129 0x0076 //RX_SPK_VOL +130 0x0000 //RX_VOL_RESRV_0 +#VOL 6 +6 0x1000 //RX_TDDRC_ALPHA_UP_1 +7 0x1000 //RX_TDDRC_ALPHA_UP_2 +8 0x1000 //RX_TDDRC_ALPHA_UP_3 +9 0x1000 //RX_TDDRC_ALPHA_UP_4 +27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +33 0x7000 //RX_TDDRC_LIMITER_THRD +34 0x0800 //RX_TDDRC_LIMITER_GAIN +112 0x0001 //RX_TDDRC_THRD_0 +113 0x0002 //RX_TDDRC_THRD_1 +114 0x1800 //RX_TDDRC_THRD_2 +115 0x1800 //RX_TDDRC_THRD_3 +116 0x7FFF //RX_TDDRC_SLANT_0 +117 0x7FFF //RX_TDDRC_SLANT_1 +118 0x1000 //RX_TDDRC_ALPHA_UP_0 +119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +120 0x0000 //RX_TDDRC_HMNC_FLAG +121 0x199A //RX_TDDRC_HMNC_GAIN +122 0x0001 //RX_TDDRC_SMT_FLAG +123 0x0CCD //RX_TDDRC_SMT_W +124 0x056F //RX_TDDRC_DRC_GAIN +38 0x0020 //RX_FDEQ_SUBNUM +39 0x483E //RX_FDEQ_GAIN_0 +40 0x3E3E //RX_FDEQ_GAIN_1 +41 0x3E4C //RX_FDEQ_GAIN_2 +42 0x586E //RX_FDEQ_GAIN_3 +43 0x8496 //RX_FDEQ_GAIN_4 +44 0x968E //RX_FDEQ_GAIN_5 +45 0x8488 //RX_FDEQ_GAIN_6 +46 0x8884 //RX_FDEQ_GAIN_7 +47 0x9CA4 //RX_FDEQ_GAIN_8 +48 0x98A8 //RX_FDEQ_GAIN_9 +49 0xBEB8 //RX_FDEQ_GAIN_10 +50 0x918D //RX_FDEQ_GAIN_11 +51 0x7566 //RX_FDEQ_GAIN_12 +52 0x6460 //RX_FDEQ_GAIN_13 +53 0x6174 //RX_FDEQ_GAIN_14 +54 0x7890 //RX_FDEQ_GAIN_15 +55 0x4848 //RX_FDEQ_GAIN_16 +56 0x4848 //RX_FDEQ_GAIN_17 +57 0x4848 //RX_FDEQ_GAIN_18 +58 0x4848 //RX_FDEQ_GAIN_19 +59 0x4848 //RX_FDEQ_GAIN_20 +60 0x4848 //RX_FDEQ_GAIN_21 +61 0x4848 //RX_FDEQ_GAIN_22 +62 0x4848 //RX_FDEQ_GAIN_23 +63 0x0202 //RX_FDEQ_BIN_0 +64 0x0202 //RX_FDEQ_BIN_1 +65 0x0301 //RX_FDEQ_BIN_2 +66 0x0404 //RX_FDEQ_BIN_3 +67 0x0406 //RX_FDEQ_BIN_4 +68 0x0109 //RX_FDEQ_BIN_5 +69 0x0708 //RX_FDEQ_BIN_6 +70 0x090A //RX_FDEQ_BIN_7 +71 0x0B0C //RX_FDEQ_BIN_8 +72 0x0D09 //RX_FDEQ_BIN_9 +73 0x0819 //RX_FDEQ_BIN_10 +74 0x1E19 //RX_FDEQ_BIN_11 +75 0x1B0F //RX_FDEQ_BIN_12 +76 0x141E //RX_FDEQ_BIN_13 +77 0x3728 //RX_FDEQ_BIN_14 +78 0x282C //RX_FDEQ_BIN_15 +79 0x0000 //RX_FDEQ_BIN_16 +80 0x0000 //RX_FDEQ_BIN_17 +81 0x0000 //RX_FDEQ_BIN_18 +82 0x0000 //RX_FDEQ_BIN_19 +83 0x0000 //RX_FDEQ_BIN_20 +84 0x0000 //RX_FDEQ_BIN_21 +85 0x0000 //RX_FDEQ_BIN_22 +86 0x0000 //RX_FDEQ_BIN_23 +87 0x4000 //RX_FDEQ_RESRV_0 +88 0x0320 //RX_FDEQ_RESRV_1 +89 0x0018 //RX_FDDRC_BAND_MARGIN_0 +90 0x0030 //RX_FDDRC_BAND_MARGIN_1 +91 0x0050 //RX_FDDRC_BAND_MARGIN_2 +92 0x0080 //RX_FDDRC_BAND_MARGIN_3 +93 0x0007 //RX_FDDRC_BLOCK_EXP +94 0x5000 //RX_FDDRC_THRD_2_0 +95 0x5000 //RX_FDDRC_THRD_2_1 +96 0x5000 //RX_FDDRC_THRD_2_2 +97 0x5000 //RX_FDDRC_THRD_2_3 +98 0x6400 //RX_FDDRC_THRD_3_0 +99 0x6400 //RX_FDDRC_THRD_3_1 +100 0x6400 //RX_FDDRC_THRD_3_2 +101 0x6400 //RX_FDDRC_THRD_3_3 +102 0x2000 //RX_FDDRC_SLANT_0_0 +103 0x2000 //RX_FDDRC_SLANT_0_1 +104 0x2000 //RX_FDDRC_SLANT_0_2 +105 0x2000 //RX_FDDRC_SLANT_0_3 +106 0x5333 //RX_FDDRC_SLANT_1_0 +107 0x5333 //RX_FDDRC_SLANT_1_1 +108 0x5333 //RX_FDDRC_SLANT_1_2 +109 0x5333 //RX_FDDRC_SLANT_1_3 +110 0x0000 //RX_FDDRC_RESRV_0 +129 0x0100 //RX_SPK_VOL +130 0x0000 //RX_VOL_RESRV_0 +#RX 2 +157 0x003C //RX_RECVFUNC_MODE_0 +158 0x0000 //RX_RECVFUNC_MODE_1 +159 0x0003 //RX_SAMPLINGFREQ_SIG +160 0x0003 //RX_SAMPLINGFREQ_PROC +161 0x000A //RX_FRAME_SZ +162 0x0000 //RX_DELAY_OPT +163 0x1000 //RX_TDDRC_ALPHA_UP_1 +164 0x1000 //RX_TDDRC_ALPHA_UP_2 +165 0x1000 //RX_TDDRC_ALPHA_UP_3 +166 0x1000 //RX_TDDRC_ALPHA_UP_4 +167 0x05AA //RX_PGA +168 0x7FFF //RX_A_HP +169 0x4000 //RX_B_PE +170 0x5800 //RX_THR_PITCH_DET_0 +171 0x5000 //RX_THR_PITCH_DET_1 +172 0x4000 //RX_THR_PITCH_DET_2 +173 0x0008 //RX_PITCH_BFR_LEN +174 0x0003 //RX_SBD_PITCH_DET +175 0x0100 //RX_PP_RESRV_0 +176 0x0020 //RX_PP_RESRV_1 +177 0x0600 //RX_N_SN_EST +178 0x000C //RX_N2_SN_EST +179 0x000F //RX_NS_LVL_CTRL +180 0xF800 //RX_THR_SN_EST +181 0x7E00 //RX_LAMBDA_PFILT +182 0x000A //RX_FENS_RESRV_0 +183 0x0190 //RX_FENS_RESRV_1 +184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +187 0x0002 //RX_EXTRA_NS_L +188 0x0800 //RX_EXTRA_NS_A +189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +190 0x7000 //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +192 0x199A //RX_A_POST_FLT +193 0x0000 //RX_LMT_THRD +194 0x4000 //RX_LMT_ALPHA +195 0x0020 //RX_FDEQ_SUBNUM +196 0x483E //RX_FDEQ_GAIN_0 +197 0x3E3E //RX_FDEQ_GAIN_1 +198 0x3E4C //RX_FDEQ_GAIN_2 +199 0x5064 //RX_FDEQ_GAIN_3 +200 0x7076 //RX_FDEQ_GAIN_4 +201 0x897A //RX_FDEQ_GAIN_5 +202 0x7C80 //RX_FDEQ_GAIN_6 +203 0x8888 //RX_FDEQ_GAIN_7 +204 0x949C //RX_FDEQ_GAIN_8 +205 0x96A4 //RX_FDEQ_GAIN_9 +206 0xA9A0 //RX_FDEQ_GAIN_10 +207 0x9487 //RX_FDEQ_GAIN_11 +208 0x6F64 //RX_FDEQ_GAIN_12 +209 0x625A //RX_FDEQ_GAIN_13 +210 0x5D80 //RX_FDEQ_GAIN_14 +211 0x8890 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0202 //RX_FDEQ_BIN_0 +221 0x0202 //RX_FDEQ_BIN_1 +222 0x0301 //RX_FDEQ_BIN_2 +223 0x0404 //RX_FDEQ_BIN_3 +224 0x0406 //RX_FDEQ_BIN_4 +225 0x0109 //RX_FDEQ_BIN_5 +226 0x0708 //RX_FDEQ_BIN_6 +227 0x090A //RX_FDEQ_BIN_7 +228 0x0B0C //RX_FDEQ_BIN_8 +229 0x0D0E //RX_FDEQ_BIN_9 +230 0x1013 //RX_FDEQ_BIN_10 +231 0x1719 //RX_FDEQ_BIN_11 +232 0x1B0F //RX_FDEQ_BIN_12 +233 0x141E //RX_FDEQ_BIN_13 +234 0x3728 //RX_FDEQ_BIN_14 +235 0x282C //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x4000 //RX_FDEQ_RESRV_0 +245 0x0320 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0030 //RX_FDDRC_BAND_MARGIN_1 +248 0x0050 //RX_FDDRC_BAND_MARGIN_2 +249 0x0080 //RX_FDDRC_BAND_MARGIN_3 +250 0x0007 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x5000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x6400 //RX_FDDRC_THRD_3_2 +258 0x6400 //RX_FDDRC_THRD_3_3 +259 0x2000 //RX_FDDRC_SLANT_0_0 +260 0x2000 //RX_FDDRC_SLANT_0_1 +261 0x2000 //RX_FDDRC_SLANT_0_2 +262 0x2000 //RX_FDDRC_SLANT_0_3 +263 0x5333 //RX_FDDRC_SLANT_1_0 +264 0x5333 //RX_FDDRC_SLANT_1_1 +265 0x5333 //RX_FDDRC_SLANT_1_2 +266 0x5333 //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +268 0x0002 //RX_FILTINDX +269 0x0001 //RX_TDDRC_THRD_0 +270 0x0002 //RX_TDDRC_THRD_1 +271 0x1800 //RX_TDDRC_THRD_2 +272 0x1800 //RX_TDDRC_THRD_3 +273 0x7FFF //RX_TDDRC_SLANT_0 +274 0x7FFF //RX_TDDRC_SLANT_1 +275 0x1000 //RX_TDDRC_ALPHA_UP_0 +276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x199A //RX_TDDRC_HMNC_GAIN +279 0x0001 //RX_TDDRC_SMT_FLAG +280 0x0CCD //RX_TDDRC_SMT_W +281 0x0551 //RX_TDDRC_DRC_GAIN +282 0x7C00 //RX_LAMBDA_PKA_FP +283 0x13E0 //RX_TPKA_FP +284 0x0080 //RX_MIN_G_FP +285 0x2000 //RX_MAX_G_FP +286 0x0100 //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 +288 0x0000 //RX_MAXLEVEL_CNG +289 0x3000 //RX_BWE_UV_TH +290 0x3000 //RX_BWE_UV_TH2 +291 0x1800 //RX_BWE_UV_TH3 +292 0x1000 //RX_BWE_V_TH +293 0x04CD //RX_BWE_GAIN1_V_TH1 +294 0x0F33 //RX_BWE_GAIN1_V_TH2 +295 0x7333 //RX_BWE_UV_EQ +296 0x199A //RX_BWE_V_EQ +297 0x7333 //RX_BWE_TONE_TH +298 0x0004 //RX_BWE_UV_HOLD_T +299 0x6CCD //RX_BWE_GAIN2_ALPHA +300 0x799A //RX_BWE_GAIN3_ALPHA +301 0x001E //RX_BWE_CUTOFF +302 0x3000 //RX_BWE_GAINFILL +303 0x3200 //RX_BWE_MAXTH_TONE +304 0x2000 //RX_BWE_EQ_0 +305 0x2000 //RX_BWE_EQ_1 +306 0x2000 //RX_BWE_EQ_2 +307 0x2000 //RX_BWE_EQ_3 +308 0x2000 //RX_BWE_EQ_4 +309 0x2000 //RX_BWE_EQ_5 +310 0x2000 //RX_BWE_EQ_6 +311 0x0000 //RX_BWE_RESRV_0 +312 0x0000 //RX_BWE_RESRV_1 +313 0x0000 //RX_BWE_RESRV_2 +#VOL 0 +163 0x1000 //RX_TDDRC_ALPHA_UP_1 +164 0x1000 //RX_TDDRC_ALPHA_UP_2 +165 0x1000 //RX_TDDRC_ALPHA_UP_3 +166 0x1000 //RX_TDDRC_ALPHA_UP_4 +184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +190 0x7000 //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +269 0x0001 //RX_TDDRC_THRD_0 +270 0x0002 //RX_TDDRC_THRD_1 +271 0x1800 //RX_TDDRC_THRD_2 +272 0x1800 //RX_TDDRC_THRD_3 +273 0x7FFF //RX_TDDRC_SLANT_0 +274 0x7FFF //RX_TDDRC_SLANT_1 +275 0x1000 //RX_TDDRC_ALPHA_UP_0 +276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x199A //RX_TDDRC_HMNC_GAIN +279 0x0001 //RX_TDDRC_SMT_FLAG +280 0x0CCD //RX_TDDRC_SMT_W +281 0x0551 //RX_TDDRC_DRC_GAIN +195 0x0020 //RX_FDEQ_SUBNUM +196 0x483E //RX_FDEQ_GAIN_0 +197 0x3E3E //RX_FDEQ_GAIN_1 +198 0x3E4C //RX_FDEQ_GAIN_2 +199 0x5064 //RX_FDEQ_GAIN_3 +200 0x7076 //RX_FDEQ_GAIN_4 +201 0x897A //RX_FDEQ_GAIN_5 +202 0x7C80 //RX_FDEQ_GAIN_6 +203 0x8888 //RX_FDEQ_GAIN_7 +204 0x949C //RX_FDEQ_GAIN_8 +205 0x96A4 //RX_FDEQ_GAIN_9 +206 0xA9A0 //RX_FDEQ_GAIN_10 +207 0x9487 //RX_FDEQ_GAIN_11 +208 0x6F64 //RX_FDEQ_GAIN_12 +209 0x625A //RX_FDEQ_GAIN_13 +210 0x5D80 //RX_FDEQ_GAIN_14 +211 0x8890 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0202 //RX_FDEQ_BIN_0 +221 0x0202 //RX_FDEQ_BIN_1 +222 0x0301 //RX_FDEQ_BIN_2 +223 0x0404 //RX_FDEQ_BIN_3 +224 0x0406 //RX_FDEQ_BIN_4 +225 0x0109 //RX_FDEQ_BIN_5 +226 0x0708 //RX_FDEQ_BIN_6 +227 0x090A //RX_FDEQ_BIN_7 +228 0x0B0C //RX_FDEQ_BIN_8 +229 0x0D0E //RX_FDEQ_BIN_9 +230 0x1013 //RX_FDEQ_BIN_10 +231 0x1719 //RX_FDEQ_BIN_11 +232 0x1B0F //RX_FDEQ_BIN_12 +233 0x141E //RX_FDEQ_BIN_13 +234 0x3728 //RX_FDEQ_BIN_14 +235 0x282C //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x4000 //RX_FDEQ_RESRV_0 +245 0x0320 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0030 //RX_FDDRC_BAND_MARGIN_1 +248 0x0050 //RX_FDDRC_BAND_MARGIN_2 +249 0x0080 //RX_FDDRC_BAND_MARGIN_3 +250 0x0007 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x5000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x6400 //RX_FDDRC_THRD_3_2 +258 0x6400 //RX_FDDRC_THRD_3_3 +259 0x2000 //RX_FDDRC_SLANT_0_0 +260 0x2000 //RX_FDDRC_SLANT_0_1 +261 0x2000 //RX_FDDRC_SLANT_0_2 +262 0x2000 //RX_FDDRC_SLANT_0_3 +263 0x5333 //RX_FDDRC_SLANT_1_0 +264 0x5333 //RX_FDDRC_SLANT_1_1 +265 0x5333 //RX_FDDRC_SLANT_1_2 +266 0x5333 //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +286 0x000A //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 +#VOL 1 +163 0x1000 //RX_TDDRC_ALPHA_UP_1 +164 0x1000 //RX_TDDRC_ALPHA_UP_2 +165 0x1000 //RX_TDDRC_ALPHA_UP_3 +166 0x1000 //RX_TDDRC_ALPHA_UP_4 +184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +190 0x7000 //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +269 0x0001 //RX_TDDRC_THRD_0 +270 0x0002 //RX_TDDRC_THRD_1 +271 0x1800 //RX_TDDRC_THRD_2 +272 0x1800 //RX_TDDRC_THRD_3 +273 0x7FFF //RX_TDDRC_SLANT_0 +274 0x7FFF //RX_TDDRC_SLANT_1 +275 0x1000 //RX_TDDRC_ALPHA_UP_0 +276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x199A //RX_TDDRC_HMNC_GAIN +279 0x0001 //RX_TDDRC_SMT_FLAG +280 0x0CCD //RX_TDDRC_SMT_W +281 0x0551 //RX_TDDRC_DRC_GAIN +195 0x0020 //RX_FDEQ_SUBNUM +196 0x483E //RX_FDEQ_GAIN_0 +197 0x3E3E //RX_FDEQ_GAIN_1 +198 0x3E4C //RX_FDEQ_GAIN_2 +199 0x5064 //RX_FDEQ_GAIN_3 +200 0x7076 //RX_FDEQ_GAIN_4 +201 0x897A //RX_FDEQ_GAIN_5 +202 0x7C80 //RX_FDEQ_GAIN_6 +203 0x8888 //RX_FDEQ_GAIN_7 +204 0x949C //RX_FDEQ_GAIN_8 +205 0x96A4 //RX_FDEQ_GAIN_9 +206 0xA9A0 //RX_FDEQ_GAIN_10 +207 0x9487 //RX_FDEQ_GAIN_11 +208 0x6F64 //RX_FDEQ_GAIN_12 +209 0x625A //RX_FDEQ_GAIN_13 +210 0x5D80 //RX_FDEQ_GAIN_14 +211 0x8890 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0202 //RX_FDEQ_BIN_0 +221 0x0202 //RX_FDEQ_BIN_1 +222 0x0301 //RX_FDEQ_BIN_2 +223 0x0404 //RX_FDEQ_BIN_3 +224 0x0406 //RX_FDEQ_BIN_4 +225 0x0109 //RX_FDEQ_BIN_5 +226 0x0708 //RX_FDEQ_BIN_6 +227 0x090A //RX_FDEQ_BIN_7 +228 0x0B0C //RX_FDEQ_BIN_8 +229 0x0D0E //RX_FDEQ_BIN_9 +230 0x1013 //RX_FDEQ_BIN_10 +231 0x1719 //RX_FDEQ_BIN_11 +232 0x1B0F //RX_FDEQ_BIN_12 +233 0x141E //RX_FDEQ_BIN_13 +234 0x3728 //RX_FDEQ_BIN_14 +235 0x282C //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x4000 //RX_FDEQ_RESRV_0 +245 0x0320 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0030 //RX_FDDRC_BAND_MARGIN_1 +248 0x0050 //RX_FDDRC_BAND_MARGIN_2 +249 0x0080 //RX_FDDRC_BAND_MARGIN_3 +250 0x0007 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x5000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x6400 //RX_FDDRC_THRD_3_2 +258 0x6400 //RX_FDDRC_THRD_3_3 +259 0x2000 //RX_FDDRC_SLANT_0_0 +260 0x2000 //RX_FDDRC_SLANT_0_1 +261 0x2000 //RX_FDDRC_SLANT_0_2 +262 0x2000 //RX_FDDRC_SLANT_0_3 +263 0x5333 //RX_FDDRC_SLANT_1_0 +264 0x5333 //RX_FDDRC_SLANT_1_1 +265 0x5333 //RX_FDDRC_SLANT_1_2 +266 0x5333 //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +286 0x0010 //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 +#VOL 2 +163 0x1000 //RX_TDDRC_ALPHA_UP_1 +164 0x1000 //RX_TDDRC_ALPHA_UP_2 +165 0x1000 //RX_TDDRC_ALPHA_UP_3 +166 0x1000 //RX_TDDRC_ALPHA_UP_4 +184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +190 0x7000 //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +269 0x0001 //RX_TDDRC_THRD_0 +270 0x0002 //RX_TDDRC_THRD_1 +271 0x1800 //RX_TDDRC_THRD_2 +272 0x1800 //RX_TDDRC_THRD_3 +273 0x7FFF //RX_TDDRC_SLANT_0 +274 0x7FFF //RX_TDDRC_SLANT_1 +275 0x1000 //RX_TDDRC_ALPHA_UP_0 +276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x199A //RX_TDDRC_HMNC_GAIN +279 0x0001 //RX_TDDRC_SMT_FLAG +280 0x0CCD //RX_TDDRC_SMT_W +281 0x0551 //RX_TDDRC_DRC_GAIN +195 0x0020 //RX_FDEQ_SUBNUM +196 0x483E //RX_FDEQ_GAIN_0 +197 0x3E3E //RX_FDEQ_GAIN_1 +198 0x3E4C //RX_FDEQ_GAIN_2 +199 0x5064 //RX_FDEQ_GAIN_3 +200 0x7076 //RX_FDEQ_GAIN_4 +201 0x897A //RX_FDEQ_GAIN_5 +202 0x7C80 //RX_FDEQ_GAIN_6 +203 0x8888 //RX_FDEQ_GAIN_7 +204 0x949C //RX_FDEQ_GAIN_8 +205 0x96A4 //RX_FDEQ_GAIN_9 +206 0xA9A0 //RX_FDEQ_GAIN_10 +207 0x9487 //RX_FDEQ_GAIN_11 +208 0x6F64 //RX_FDEQ_GAIN_12 +209 0x625A //RX_FDEQ_GAIN_13 +210 0x5D80 //RX_FDEQ_GAIN_14 +211 0x8890 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0202 //RX_FDEQ_BIN_0 +221 0x0202 //RX_FDEQ_BIN_1 +222 0x0301 //RX_FDEQ_BIN_2 +223 0x0404 //RX_FDEQ_BIN_3 +224 0x0406 //RX_FDEQ_BIN_4 +225 0x0109 //RX_FDEQ_BIN_5 +226 0x0708 //RX_FDEQ_BIN_6 +227 0x090A //RX_FDEQ_BIN_7 +228 0x0B0C //RX_FDEQ_BIN_8 +229 0x0D0E //RX_FDEQ_BIN_9 +230 0x1013 //RX_FDEQ_BIN_10 +231 0x1719 //RX_FDEQ_BIN_11 +232 0x1B0F //RX_FDEQ_BIN_12 +233 0x141E //RX_FDEQ_BIN_13 +234 0x3728 //RX_FDEQ_BIN_14 +235 0x282C //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x4000 //RX_FDEQ_RESRV_0 +245 0x0320 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0030 //RX_FDDRC_BAND_MARGIN_1 +248 0x0050 //RX_FDDRC_BAND_MARGIN_2 +249 0x0080 //RX_FDDRC_BAND_MARGIN_3 +250 0x0007 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x5000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x6400 //RX_FDDRC_THRD_3_2 +258 0x6400 //RX_FDDRC_THRD_3_3 +259 0x2000 //RX_FDDRC_SLANT_0_0 +260 0x2000 //RX_FDDRC_SLANT_0_1 +261 0x2000 //RX_FDDRC_SLANT_0_2 +262 0x2000 //RX_FDDRC_SLANT_0_3 +263 0x5333 //RX_FDDRC_SLANT_1_0 +264 0x5333 //RX_FDDRC_SLANT_1_1 +265 0x5333 //RX_FDDRC_SLANT_1_2 +266 0x5333 //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +286 0x001B //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 +#VOL 3 +163 0x1000 //RX_TDDRC_ALPHA_UP_1 +164 0x1000 //RX_TDDRC_ALPHA_UP_2 +165 0x1000 //RX_TDDRC_ALPHA_UP_3 +166 0x1000 //RX_TDDRC_ALPHA_UP_4 +184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +190 0x7000 //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +269 0x0001 //RX_TDDRC_THRD_0 +270 0x0002 //RX_TDDRC_THRD_1 +271 0x1800 //RX_TDDRC_THRD_2 +272 0x1800 //RX_TDDRC_THRD_3 +273 0x7FFF //RX_TDDRC_SLANT_0 +274 0x7FFF //RX_TDDRC_SLANT_1 +275 0x1000 //RX_TDDRC_ALPHA_UP_0 +276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x199A //RX_TDDRC_HMNC_GAIN +279 0x0001 //RX_TDDRC_SMT_FLAG +280 0x0CCD //RX_TDDRC_SMT_W +281 0x0551 //RX_TDDRC_DRC_GAIN +195 0x0020 //RX_FDEQ_SUBNUM +196 0x483E //RX_FDEQ_GAIN_0 +197 0x3E3E //RX_FDEQ_GAIN_1 +198 0x3E4C //RX_FDEQ_GAIN_2 +199 0x5064 //RX_FDEQ_GAIN_3 +200 0x7076 //RX_FDEQ_GAIN_4 +201 0x897A //RX_FDEQ_GAIN_5 +202 0x7C80 //RX_FDEQ_GAIN_6 +203 0x8888 //RX_FDEQ_GAIN_7 +204 0x949C //RX_FDEQ_GAIN_8 +205 0x96A4 //RX_FDEQ_GAIN_9 +206 0xA9A0 //RX_FDEQ_GAIN_10 +207 0x9487 //RX_FDEQ_GAIN_11 +208 0x6F64 //RX_FDEQ_GAIN_12 +209 0x625A //RX_FDEQ_GAIN_13 +210 0x5D80 //RX_FDEQ_GAIN_14 +211 0x8890 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0202 //RX_FDEQ_BIN_0 +221 0x0202 //RX_FDEQ_BIN_1 +222 0x0301 //RX_FDEQ_BIN_2 +223 0x0404 //RX_FDEQ_BIN_3 +224 0x0406 //RX_FDEQ_BIN_4 +225 0x0109 //RX_FDEQ_BIN_5 +226 0x0708 //RX_FDEQ_BIN_6 +227 0x090A //RX_FDEQ_BIN_7 +228 0x0B0C //RX_FDEQ_BIN_8 +229 0x0D0E //RX_FDEQ_BIN_9 +230 0x1013 //RX_FDEQ_BIN_10 +231 0x1719 //RX_FDEQ_BIN_11 +232 0x1B0F //RX_FDEQ_BIN_12 +233 0x141E //RX_FDEQ_BIN_13 +234 0x3728 //RX_FDEQ_BIN_14 +235 0x282C //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x4000 //RX_FDEQ_RESRV_0 +245 0x0320 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0030 //RX_FDDRC_BAND_MARGIN_1 +248 0x0050 //RX_FDDRC_BAND_MARGIN_2 +249 0x0080 //RX_FDDRC_BAND_MARGIN_3 +250 0x0007 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x5000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x6400 //RX_FDDRC_THRD_3_2 +258 0x6400 //RX_FDDRC_THRD_3_3 +259 0x2000 //RX_FDDRC_SLANT_0_0 +260 0x2000 //RX_FDDRC_SLANT_0_1 +261 0x2000 //RX_FDDRC_SLANT_0_2 +262 0x2000 //RX_FDDRC_SLANT_0_3 +263 0x5333 //RX_FDDRC_SLANT_1_0 +264 0x5333 //RX_FDDRC_SLANT_1_1 +265 0x5333 //RX_FDDRC_SLANT_1_2 +266 0x5333 //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +286 0x0032 //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 +#VOL 4 +163 0x1000 //RX_TDDRC_ALPHA_UP_1 +164 0x1000 //RX_TDDRC_ALPHA_UP_2 +165 0x1000 //RX_TDDRC_ALPHA_UP_3 +166 0x1000 //RX_TDDRC_ALPHA_UP_4 +184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +190 0x7000 //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +269 0x0001 //RX_TDDRC_THRD_0 +270 0x0002 //RX_TDDRC_THRD_1 +271 0x1800 //RX_TDDRC_THRD_2 +272 0x1800 //RX_TDDRC_THRD_3 +273 0x7FFF //RX_TDDRC_SLANT_0 +274 0x7FFF //RX_TDDRC_SLANT_1 +275 0x1000 //RX_TDDRC_ALPHA_UP_0 +276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x199A //RX_TDDRC_HMNC_GAIN +279 0x0001 //RX_TDDRC_SMT_FLAG +280 0x0CCD //RX_TDDRC_SMT_W +281 0x0551 //RX_TDDRC_DRC_GAIN +195 0x0020 //RX_FDEQ_SUBNUM +196 0x483E //RX_FDEQ_GAIN_0 +197 0x3E3E //RX_FDEQ_GAIN_1 +198 0x3E4C //RX_FDEQ_GAIN_2 +199 0x5064 //RX_FDEQ_GAIN_3 +200 0x7076 //RX_FDEQ_GAIN_4 +201 0x897A //RX_FDEQ_GAIN_5 +202 0x7C80 //RX_FDEQ_GAIN_6 +203 0x8888 //RX_FDEQ_GAIN_7 +204 0x949C //RX_FDEQ_GAIN_8 +205 0x96A4 //RX_FDEQ_GAIN_9 +206 0xA9A0 //RX_FDEQ_GAIN_10 +207 0x9487 //RX_FDEQ_GAIN_11 +208 0x6F64 //RX_FDEQ_GAIN_12 +209 0x625A //RX_FDEQ_GAIN_13 +210 0x5D80 //RX_FDEQ_GAIN_14 +211 0x8890 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0202 //RX_FDEQ_BIN_0 +221 0x0202 //RX_FDEQ_BIN_1 +222 0x0301 //RX_FDEQ_BIN_2 +223 0x0404 //RX_FDEQ_BIN_3 +224 0x0406 //RX_FDEQ_BIN_4 +225 0x0109 //RX_FDEQ_BIN_5 +226 0x0708 //RX_FDEQ_BIN_6 +227 0x090A //RX_FDEQ_BIN_7 +228 0x0B0C //RX_FDEQ_BIN_8 +229 0x0D0E //RX_FDEQ_BIN_9 +230 0x1013 //RX_FDEQ_BIN_10 +231 0x1719 //RX_FDEQ_BIN_11 +232 0x1B0F //RX_FDEQ_BIN_12 +233 0x141E //RX_FDEQ_BIN_13 +234 0x3728 //RX_FDEQ_BIN_14 +235 0x282C //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x4000 //RX_FDEQ_RESRV_0 +245 0x0320 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0030 //RX_FDDRC_BAND_MARGIN_1 +248 0x0050 //RX_FDDRC_BAND_MARGIN_2 +249 0x0080 //RX_FDDRC_BAND_MARGIN_3 +250 0x0007 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x5000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x6400 //RX_FDDRC_THRD_3_2 +258 0x6400 //RX_FDDRC_THRD_3_3 +259 0x2000 //RX_FDDRC_SLANT_0_0 +260 0x2000 //RX_FDDRC_SLANT_0_1 +261 0x2000 //RX_FDDRC_SLANT_0_2 +262 0x2000 //RX_FDDRC_SLANT_0_3 +263 0x5333 //RX_FDDRC_SLANT_1_0 +264 0x5333 //RX_FDDRC_SLANT_1_1 +265 0x5333 //RX_FDDRC_SLANT_1_2 +266 0x5333 //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +286 0x0047 //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 +#VOL 5 +163 0x1000 //RX_TDDRC_ALPHA_UP_1 +164 0x1000 //RX_TDDRC_ALPHA_UP_2 +165 0x1000 //RX_TDDRC_ALPHA_UP_3 +166 0x1000 //RX_TDDRC_ALPHA_UP_4 +184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +190 0x7000 //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +269 0x0001 //RX_TDDRC_THRD_0 +270 0x0002 //RX_TDDRC_THRD_1 +271 0x1800 //RX_TDDRC_THRD_2 +272 0x1800 //RX_TDDRC_THRD_3 +273 0x7FFF //RX_TDDRC_SLANT_0 +274 0x7FFF //RX_TDDRC_SLANT_1 +275 0x1000 //RX_TDDRC_ALPHA_UP_0 +276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x199A //RX_TDDRC_HMNC_GAIN +279 0x0001 //RX_TDDRC_SMT_FLAG +280 0x0CCD //RX_TDDRC_SMT_W +281 0x0551 //RX_TDDRC_DRC_GAIN +195 0x0020 //RX_FDEQ_SUBNUM +196 0x483E //RX_FDEQ_GAIN_0 +197 0x3E3E //RX_FDEQ_GAIN_1 +198 0x3E4C //RX_FDEQ_GAIN_2 +199 0x5064 //RX_FDEQ_GAIN_3 +200 0x7076 //RX_FDEQ_GAIN_4 +201 0x897A //RX_FDEQ_GAIN_5 +202 0x7C80 //RX_FDEQ_GAIN_6 +203 0x8888 //RX_FDEQ_GAIN_7 +204 0x949C //RX_FDEQ_GAIN_8 +205 0x96A4 //RX_FDEQ_GAIN_9 +206 0xA9A0 //RX_FDEQ_GAIN_10 +207 0x9487 //RX_FDEQ_GAIN_11 +208 0x6F64 //RX_FDEQ_GAIN_12 +209 0x625A //RX_FDEQ_GAIN_13 +210 0x5D80 //RX_FDEQ_GAIN_14 +211 0x8890 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0202 //RX_FDEQ_BIN_0 +221 0x0202 //RX_FDEQ_BIN_1 +222 0x0301 //RX_FDEQ_BIN_2 +223 0x0404 //RX_FDEQ_BIN_3 +224 0x0406 //RX_FDEQ_BIN_4 +225 0x0109 //RX_FDEQ_BIN_5 +226 0x0708 //RX_FDEQ_BIN_6 +227 0x090A //RX_FDEQ_BIN_7 +228 0x0B0C //RX_FDEQ_BIN_8 +229 0x0D0E //RX_FDEQ_BIN_9 +230 0x1013 //RX_FDEQ_BIN_10 +231 0x1719 //RX_FDEQ_BIN_11 +232 0x1B0F //RX_FDEQ_BIN_12 +233 0x141E //RX_FDEQ_BIN_13 +234 0x3728 //RX_FDEQ_BIN_14 +235 0x282C //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x4000 //RX_FDEQ_RESRV_0 +245 0x0320 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0030 //RX_FDDRC_BAND_MARGIN_1 +248 0x0050 //RX_FDDRC_BAND_MARGIN_2 +249 0x0080 //RX_FDDRC_BAND_MARGIN_3 +250 0x0007 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x5000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x6400 //RX_FDDRC_THRD_3_2 +258 0x6400 //RX_FDDRC_THRD_3_3 +259 0x2000 //RX_FDDRC_SLANT_0_0 +260 0x2000 //RX_FDDRC_SLANT_0_1 +261 0x2000 //RX_FDDRC_SLANT_0_2 +262 0x2000 //RX_FDDRC_SLANT_0_3 +263 0x5333 //RX_FDDRC_SLANT_1_0 +264 0x5333 //RX_FDDRC_SLANT_1_1 +265 0x5333 //RX_FDDRC_SLANT_1_2 +266 0x5333 //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +286 0x0076 //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 +#VOL 6 +163 0x1000 //RX_TDDRC_ALPHA_UP_1 +164 0x1000 //RX_TDDRC_ALPHA_UP_2 +165 0x1000 //RX_TDDRC_ALPHA_UP_3 +166 0x1000 //RX_TDDRC_ALPHA_UP_4 +184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +190 0x7000 //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +269 0x0001 //RX_TDDRC_THRD_0 +270 0x0002 //RX_TDDRC_THRD_1 +271 0x1800 //RX_TDDRC_THRD_2 +272 0x1800 //RX_TDDRC_THRD_3 +273 0x7FFF //RX_TDDRC_SLANT_0 +274 0x7FFF //RX_TDDRC_SLANT_1 +275 0x1000 //RX_TDDRC_ALPHA_UP_0 +276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x199A //RX_TDDRC_HMNC_GAIN +279 0x0001 //RX_TDDRC_SMT_FLAG +280 0x0CCD //RX_TDDRC_SMT_W +281 0x0551 //RX_TDDRC_DRC_GAIN +195 0x0020 //RX_FDEQ_SUBNUM +196 0x483E //RX_FDEQ_GAIN_0 +197 0x3E3E //RX_FDEQ_GAIN_1 +198 0x3E4C //RX_FDEQ_GAIN_2 +199 0x5064 //RX_FDEQ_GAIN_3 +200 0x7076 //RX_FDEQ_GAIN_4 +201 0x897A //RX_FDEQ_GAIN_5 +202 0x7C80 //RX_FDEQ_GAIN_6 +203 0x8888 //RX_FDEQ_GAIN_7 +204 0x949C //RX_FDEQ_GAIN_8 +205 0x96A4 //RX_FDEQ_GAIN_9 +206 0xA9A0 //RX_FDEQ_GAIN_10 +207 0x9487 //RX_FDEQ_GAIN_11 +208 0x6F64 //RX_FDEQ_GAIN_12 +209 0x625A //RX_FDEQ_GAIN_13 +210 0x5D80 //RX_FDEQ_GAIN_14 +211 0x8890 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0202 //RX_FDEQ_BIN_0 +221 0x0202 //RX_FDEQ_BIN_1 +222 0x0301 //RX_FDEQ_BIN_2 +223 0x0404 //RX_FDEQ_BIN_3 +224 0x0406 //RX_FDEQ_BIN_4 +225 0x0109 //RX_FDEQ_BIN_5 +226 0x0708 //RX_FDEQ_BIN_6 +227 0x090A //RX_FDEQ_BIN_7 +228 0x0B0C //RX_FDEQ_BIN_8 +229 0x0D0E //RX_FDEQ_BIN_9 +230 0x1013 //RX_FDEQ_BIN_10 +231 0x1719 //RX_FDEQ_BIN_11 +232 0x1B0F //RX_FDEQ_BIN_12 +233 0x141E //RX_FDEQ_BIN_13 +234 0x3728 //RX_FDEQ_BIN_14 +235 0x282C //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x4000 //RX_FDEQ_RESRV_0 +245 0x0320 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0030 //RX_FDDRC_BAND_MARGIN_1 +248 0x0050 //RX_FDDRC_BAND_MARGIN_2 +249 0x0080 //RX_FDDRC_BAND_MARGIN_3 +250 0x0007 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x5000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x6400 //RX_FDDRC_THRD_3_2 +258 0x6400 //RX_FDDRC_THRD_3_3 +259 0x2000 //RX_FDDRC_SLANT_0_0 +260 0x2000 //RX_FDDRC_SLANT_0_1 +261 0x2000 //RX_FDDRC_SLANT_0_2 +262 0x2000 //RX_FDDRC_SLANT_0_3 +263 0x5333 //RX_FDDRC_SLANT_1_0 +264 0x5333 //RX_FDDRC_SLANT_1_1 +265 0x5333 //RX_FDDRC_SLANT_1_2 +266 0x5333 //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +286 0x0100 //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 + +#CASE_NAME HANDSET-HANDSET-TMOBILE_US-FB +#PARAM_MODE Full +#PARAM_TYPE TX+2RX +#TOTAL_CUSTOM_STEP 7+7 +#TX +0 0x0000 //TX_OPERATION_MODE_0 +1 0x0000 //TX_OPERATION_MODE_1 +2 0x0026 //TX_PATCH_REG +3 0x6B7E //TX_SENDFUNC_MODE_0 +4 0x0001 //TX_SENDFUNC_MODE_1 +5 0x0002 //TX_NUM_MIC +6 0x0004 //TX_SAMPLINGFREQ_SIG +7 0x0004 //TX_SAMPLINGFREQ_PROC +8 0x000A //TX_FRAME_SZ_SIG +9 0x000A //TX_FRAME_SZ +10 0x0000 //TX_DELAY_OPT +11 0x0028 //TX_MAX_TAIL_LENGTH +12 0x0001 //TX_NUM_LOUTCHN +13 0x0001 //TX_MAXNUM_AECREF +14 0x0000 //TX_DBG_FUNC_REG +15 0x0000 //TX_DBG_FUNC_REG1 +16 0x0000 //TX_SYS_RESRV_0 +17 0x0000 //TX_SYS_RESRV_1 +18 0x0000 //TX_SYS_RESRV_2 +19 0x0000 //TX_SYS_RESRV_3 +20 0x0000 //TX_DIST2REF0 +21 0x00A3 //TX_DIST2REF1 +22 0x0000 //TX_DIST2REF_02 +23 0x0000 //TX_DIST2REF_03 +24 0x0000 //TX_DIST2REF_04 +25 0x0000 //TX_DIST2REF_05 +26 0x0000 //TX_MMIC +27 0x1000 //TX_PGA_0 +28 0x1000 //TX_PGA_1 +29 0x1000 //TX_PGA_2 +30 0x0000 //TX_PGA_3 +31 0x0000 //TX_PGA_4 +32 0x0000 //TX_PGA_5 +33 0x0000 //TX_MIC_PAIRS +34 0x0000 //TX_MIC_PAIRS_HS +35 0x0002 //TX_MICS_FOR_BF +36 0x0000 //TX_MIC_PAIRS_FORL1 +37 0x0002 //TX_MICS_OF_PAIR0 +38 0x0002 //TX_MICS_OF_PAIR1 +39 0x0002 //TX_MICS_OF_PAIR2 +40 0x0002 //TX_MICS_OF_PAIR3 +41 0x0000 //TX_MIC_DATA_SRC0 +42 0x0002 //TX_MIC_DATA_SRC1 +43 0x0001 //TX_MIC_DATA_SRC2 +44 0x0000 //TX_MIC_DATA_SRC3 +45 0x0000 //TX_MIC_PAIR_CH_04 +46 0x0000 //TX_MIC_PAIR_CH_05 +47 0x0000 //TX_MIC_PAIR_CH_10 +48 0x0000 //TX_MIC_PAIR_CH_11 +49 0x0000 //TX_MIC_PAIR_CH_12 +50 0x0000 //TX_MIC_PAIR_CH_13 +51 0x0000 //TX_MIC_PAIR_CH_14 +52 0x05DC //TX_HD_BIN_MASK +53 0x0010 //TX_HD_SUBAND_MASK +54 0x19A1 //TX_HD_FRAME_AVG_MASK +55 0x0320 //TX_HD_MIN_FRQ +56 0x1000 //TX_HD_ALPHA_PSD +57 0x1100 //TX_T_PHPR1 +58 0x0000 //TX_T_PHPR2 +59 0x0000 //TX_T_PTPR +60 0x0000 //TX_T_PNPR +61 0x0000 //TX_T_PAPR1 +62 0xEE6C //TX_T_PSDVAT +63 0x0800 //TX_CNT +64 0x4000 //TX_ANTI_HOWL_GAIN +65 0x0001 //TX_MICFORBFMARK_0 +66 0x0001 //TX_MICFORBFMARK_1 +67 0x0001 //TX_MICFORBFMARK_2 +68 0x0001 //TX_MICFORBFMARK_3 +69 0x0001 //TX_MICFORBFMARK_4 +70 0x0001 //TX_MICFORBFMARK_5 +71 0x0000 //TX_DIST2REF_10 +72 0x3A66 //TX_DIST2REF_11 +73 0x0000 //TX_DIST2REF2 +74 0x0000 //TX_DIST2REF_13 +75 0x0000 //TX_DIST2REF_14 +76 0x0000 //TX_DIST2REF_15 +77 0x0000 //TX_DIST2REF_20 +78 0x0000 //TX_DIST2REF_21 +79 0x0000 //TX_DIST2REF_22 +80 0x0000 //TX_DIST2REF_23 +81 0x0000 //TX_DIST2REF_24 +82 0x0000 //TX_DIST2REF_25 +83 0x0000 //TX_DIST2REF_30 +84 0x0000 //TX_DIST2REF_31 +85 0x0000 //TX_DIST2REF_32 +86 0x0000 //TX_DIST2REF_33 +87 0x0000 //TX_DIST2REF_34 +88 0x0000 //TX_DIST2REF_35 +89 0x0000 //TX_MIC_LOC_00 +90 0x0000 //TX_MIC_LOC_01 +91 0x0000 //TX_MIC_LOC_02 +92 0x0000 //TX_MIC_LOC_03 +93 0x0000 //TX_MIC_LOC_04 +94 0x0000 //TX_MIC_LOC_05 +95 0x0000 //TX_MIC_LOC_10 +96 0x0000 //TX_MIC_LOC_11 +97 0x0000 //TX_MIC_LOC_12 +98 0x0000 //TX_MIC_LOC_13 +99 0x0000 //TX_MIC_LOC_14 +100 0x0000 //TX_MIC_LOC_15 +101 0x0000 //TX_MIC_LOC_20 +102 0x0000 //TX_MIC_LOC_21 +103 0x0000 //TX_MIC_LOC_22 +104 0x0000 //TX_MIC_LOC_23 +105 0x0000 //TX_MIC_LOC_24 +106 0x0000 //TX_MIC_LOC_25 +107 0x0200 //TX_MIC_REFBLK_VOLUME +108 0x0AAC //TX_MIC_BLOCK_VOLUME +109 0x0000 //TX_INVERSE_MASK +110 0x0000 //TX_ADCS_MASK +111 0x04D0 //TX_ADCS_GAIN +112 0x4000 //TX_NFC_GAINFAC +113 0x0000 //TX_MAINMIC_BLKFACTOR +114 0x0000 //TX_REFMIC_BLKFACTOR +115 0x0000 //TX_BLMIC_BLKFACTOR +116 0x0000 //TX_BRMIC_BLKFACTOR +117 0x0031 //TX_MICBLK_START_BIN +118 0x0060 //TX_MICBLK_END_BIN +119 0x0015 //TX_MICBLK_FE_HOLD +120 0xFFF2 //TX_MICBLK_MR_EXP_TH +121 0xFFF2 //TX_MICBLK_LR_EXP_TH +122 0x0000 //TX_FENE_HOLD +123 0x4000 //TX_FE_ENER_TH_MTS +124 0x0004 //TX_FE_ENER_TH_EXP +125 0x6000 //TX_C_POST_FLT_MIC_MAINBLK +126 0x6000 //TX_C_POST_FLT_MIC_REFBLK +127 0x0010 //TX_MIC_BLOCK_N +128 0x7E56 //TX_A_HP +129 0x4000 //TX_B_PE +130 0x1800 //TX_THR_PITCH_DET_0 +131 0x1000 //TX_THR_PITCH_DET_1 +132 0x0800 //TX_THR_PITCH_DET_2 +133 0x0008 //TX_PITCH_BFR_LEN +134 0x0003 //TX_SBD_PITCH_DET +135 0x0050 //TX_TD_AEC_L +136 0x4000 //TX_MU0_UNP_TD_AEC +137 0x1000 //TX_MU0_PTD_TD_AEC +138 0x0000 //TX_PP_RESRV_0 +139 0x2A94 //TX_PP_RESRV_1 +140 0x55F0 //TX_PP_RESRV_2 +141 0x0000 //TX_PP_RESRV_3 +142 0x0000 //TX_PP_RESRV_4 +143 0x0000 //TX_PP_RESRV_5 +144 0x0000 //TX_PP_RESRV_6 +145 0x0000 //TX_PP_RESRV_7 +146 0x0028 //TX_TAIL_LENGTH +147 0x0080 //TX_AEC_REF_GAIN_0 +148 0x0800 //TX_AEC_REF_GAIN_1 +149 0x0800 //TX_AEC_REF_GAIN_2 +150 0x7900 //TX_EAD_THR +151 0x2000 //TX_THR_RE_EST +152 0x0400 //TX_MIN_EQ_RE_EST_0 +153 0x0400 //TX_MIN_EQ_RE_EST_1 +154 0x0800 //TX_MIN_EQ_RE_EST_2 +155 0x0800 //TX_MIN_EQ_RE_EST_3 +156 0x1000 //TX_MIN_EQ_RE_EST_4 +157 0x1000 //TX_MIN_EQ_RE_EST_5 +158 0x1000 //TX_MIN_EQ_RE_EST_6 +159 0x1000 //TX_MIN_EQ_RE_EST_7 +160 0x1000 //TX_MIN_EQ_RE_EST_8 +161 0x1000 //TX_MIN_EQ_RE_EST_9 +162 0x1000 //TX_MIN_EQ_RE_EST_10 +163 0x1000 //TX_MIN_EQ_RE_EST_11 +164 0x1000 //TX_MIN_EQ_RE_EST_12 +165 0x3000 //TX_LAMBDA_RE_EST +166 0x1000 //TX_LAMBDA_CB_NLE +167 0x1800 //TX_C_POST_FLT +168 0x4000 //TX_GAIN_NP +169 0x003C //TX_SE_HOLD_N +170 0x0046 //TX_DT_HOLD_N +171 0x03E8 //TX_DT2_HOLD_N +172 0x6666 //TX_AEC_RESRV_0 +173 0x0000 //TX_AEC_RESRV_1 +174 0x0014 //TX_AEC_RESRV_2 +175 0x0000 //TX_MIC_DELAY_LENGTH +176 0x0000 //TX_REF_DELAY_LENGTH +177 0x0000 //TX_ADD_LINEIN_GAINL +178 0x0000 //TX_ADD_LINEIN_GAINH +179 0x0000 //TX_MIN_EQ_RE_EST_14 +180 0x0000 //TX_DTD_THR1_8 +181 0x7FFF //TX_DTD_THR2_8 +182 0x0000 //TX_DTD_MIC_BLK2 +183 0x0008 //TX_FRQ_LIN_LEN +184 0x7FFF //TX_FRQ_AEC_LEN_RHO +185 0x6000 //TX_MU0_UNP_FRQ_AEC +186 0x4000 //TX_MU0_PTD_FRQ_AEC +187 0x000A //TX_MINENOISETH +188 0x0800 //TX_MU0_RE_EST +189 0x0001 //TX_AEC_NUM_CH +190 0x0000 //TX_BIGECHOATTENUATION_MAX +191 0x2000 //TX_A_POST_FLT_MICBLK +192 0x0000 //TX_BLKENERTH +193 0x0000 //TX_BLKENERHIGHTH +194 0x0000 //TX_NORMENERTH +195 0x0000 //TX_NORMENERHIGHTH +196 0x0000 //TX_NORMENERHIGHTHL +197 0x7000 //TX_DTD_THR1_0 +198 0x7000 //TX_DTD_THR1_1 +199 0x7000 //TX_DTD_THR1_2 +200 0x7F00 //TX_DTD_THR1_3 +201 0x7F00 //TX_DTD_THR1_4 +202 0x7F00 //TX_DTD_THR1_5 +203 0x7F00 //TX_DTD_THR1_6 +204 0x2000 //TX_DTD_THR2_0 +205 0x2000 //TX_DTD_THR2_1 +206 0x2000 //TX_DTD_THR2_2 +207 0x1000 //TX_DTD_THR2_3 +208 0x1000 //TX_DTD_THR2_4 +209 0x1000 //TX_DTD_THR2_5 +210 0x1000 //TX_DTD_THR2_6 +211 0x6000 //TX_DTD_THR3 +212 0x0177 //TX_SPK_CUT_K +213 0x1B58 //TX_DT_CUT_K +214 0x0100 //TX_DT_CUT_THR +215 0x04EB //TX_COMFORT_G +216 0x01F4 //TX_POWER_YOUT_TH +217 0x4000 //TX_FDPFGAINECHO +218 0x0000 //TX_DTD_HD_THR +219 0x0000 //TX_SPK_CUT_K_S +220 0x0000 //TX_DTD_MIC_BLK +221 0x0400 //TX_ADPT_STRICT_L +222 0x0200 //TX_ADPT_STRICT_H +223 0x0C00 //TX_RATIO_DT_L_TH_LOW +224 0x2000 //TX_RATIO_DT_H_TH_LOW +225 0x1800 //TX_RATIO_DT_L_TH_HIGH +226 0x3000 //TX_RATIO_DT_H_TH_HIGH +227 0x0A00 //TX_RATIO_DT_L0_TH +228 0x7000 //TX_B_POST_FILT_ECHO_L +229 0x7FFF //TX_B_POST_FILT_ECHO_H +230 0x0200 //TX_MIN_G_CTRL_ECHO +231 0x7FFF //TX_B_LESSCUT_RTO_ECHO +232 0x0000 //TX_EPD_OFFSET_00 +233 0x0000 //TX_EPD_OFFST_01 +234 0x1388 //TX_RATIO_DT_L0_TH_HIGH +235 0x3A98 //TX_RATIO_DT_H_TH_CUT +236 0x7FFF //TX_MIN_EQ_RE_EST_13 +237 0x0000 //TX_DTD_THR1_7 +238 0x0000 //TX_DTD_THR2_7 +239 0x0800 //TX_DT_RESRV_7 +240 0x0800 //TX_DT_RESRV_8 +241 0x0000 //TX_DT_RESRV_9 +242 0xF600 //TX_THR_SN_EST_0 +243 0xFA00 //TX_THR_SN_EST_1 +244 0xFA00 //TX_THR_SN_EST_2 +245 0xF800 //TX_THR_SN_EST_3 +246 0xF800 //TX_THR_SN_EST_4 +247 0xF800 //TX_THR_SN_EST_5 +248 0xF800 //TX_THR_SN_EST_6 +249 0xF700 //TX_THR_SN_EST_7 +250 0x0000 //TX_DELTA_THR_SN_EST_0 +251 0x0200 //TX_DELTA_THR_SN_EST_1 +252 0x0200 //TX_DELTA_THR_SN_EST_2 +253 0x0200 //TX_DELTA_THR_SN_EST_3 +254 0x0100 //TX_DELTA_THR_SN_EST_4 +255 0x0200 //TX_DELTA_THR_SN_EST_5 +256 0x0100 //TX_DELTA_THR_SN_EST_6 +257 0x0200 //TX_DELTA_THR_SN_EST_7 +258 0x4000 //TX_LAMBDA_NN_EST_0 +259 0x4000 //TX_LAMBDA_NN_EST_1 +260 0x4000 //TX_LAMBDA_NN_EST_2 +261 0x4000 //TX_LAMBDA_NN_EST_3 +262 0x4000 //TX_LAMBDA_NN_EST_4 +263 0x4000 //TX_LAMBDA_NN_EST_5 +264 0x4000 //TX_LAMBDA_NN_EST_6 +265 0x4000 //TX_LAMBDA_NN_EST_7 +266 0x0400 //TX_N_SN_EST +267 0x001E //TX_INBEAM_T +268 0x0041 //TX_INBEAMHOLDT +269 0x2000 //TX_G_STRICT +270 0x2000 //TX_EQ_THR_BF +271 0x799A //TX_LAMBDA_EQ_BF +272 0x1000 //TX_NE_RTO_TH +273 0x1000 //TX_NE_RTO_TH_L +274 0x1000 //TX_MAINREFRTOH_TH_H +275 0x0600 //TX_MAINREFRTOH_TH_L +276 0x2000 //TX_MAINREFRTO_TH_H +277 0x1400 //TX_MAINREFRTO_TH_L +278 0x0000 //TX_MAINREFRTO_TH_EQ +279 0x1000 //TX_B_POST_FLT_0 +280 0x2000 //TX_B_POST_FLT_1 +281 0x0014 //TX_NS_LVL_CTRL_0 +282 0x0016 //TX_NS_LVL_CTRL_1 +283 0x0016 //TX_NS_LVL_CTRL_2 +284 0x0018 //TX_NS_LVL_CTRL_3 +285 0x0016 //TX_NS_LVL_CTRL_4 +286 0x0012 //TX_NS_LVL_CTRL_5 +287 0x0016 //TX_NS_LVL_CTRL_6 +288 0x0017 //TX_NS_LVL_CTRL_7 +289 0x000E //TX_MIN_GAIN_S_0 +290 0x0007 //TX_MIN_GAIN_S_1 +291 0x0012 //TX_MIN_GAIN_S_2 +292 0x0010 //TX_MIN_GAIN_S_3 +293 0x0012 //TX_MIN_GAIN_S_4 +294 0x0012 //TX_MIN_GAIN_S_5 +295 0x0012 //TX_MIN_GAIN_S_6 +296 0x0012 //TX_MIN_GAIN_S_7 +297 0x6000 //TX_NMOS_SUP +298 0x0000 //TX_NS_MAX_PRI_SNR_TH +299 0x0000 //TX_NMOS_SUP_MENSA +300 0x7FFF //TX_SNRI_SUP_0 +301 0x6000 //TX_SNRI_SUP_1 +302 0x6000 //TX_SNRI_SUP_2 +303 0x6000 //TX_SNRI_SUP_3 +304 0x6000 //TX_SNRI_SUP_4 +305 0x6000 //TX_SNRI_SUP_5 +306 0x6000 //TX_SNRI_SUP_6 +307 0x6000 //TX_SNRI_SUP_7 +308 0x6000 //TX_THR_LFNS +309 0x0017 //TX_G_LFNS +310 0x09C4 //TX_GAIN0_NTH +311 0x000A //TX_MUSIC_MORENS +312 0x7FFF //TX_A_POST_FILT_0 +313 0x2000 //TX_A_POST_FILT_1 +314 0x4000 //TX_A_POST_FILT_S_0 +315 0x4000 //TX_A_POST_FILT_S_1 +316 0x4000 //TX_A_POST_FILT_S_2 +317 0x4000 //TX_A_POST_FILT_S_3 +318 0x4000 //TX_A_POST_FILT_S_4 +319 0x4000 //TX_A_POST_FILT_S_5 +320 0x5000 //TX_A_POST_FILT_S_6 +321 0x7000 //TX_A_POST_FILT_S_7 +322 0x1000 //TX_B_POST_FILT_0 +323 0x2000 //TX_B_POST_FILT_1 +324 0x2000 //TX_B_POST_FILT_2 +325 0x2000 //TX_B_POST_FILT_3 +326 0x2000 //TX_B_POST_FILT_4 +327 0x2000 //TX_B_POST_FILT_5 +328 0x3000 //TX_B_POST_FILT_6 +329 0x3000 //TX_B_POST_FILT_7 +330 0x1000 //TX_B_LESSCUT_RTO_S_0 +331 0x1000 //TX_B_LESSCUT_RTO_S_1 +332 0x1000 //TX_B_LESSCUT_RTO_S_2 +333 0x1000 //TX_B_LESSCUT_RTO_S_3 +334 0x1000 //TX_B_LESSCUT_RTO_S_4 +335 0x1000 //TX_B_LESSCUT_RTO_S_5 +336 0x1000 //TX_B_LESSCUT_RTO_S_6 +337 0x1000 //TX_B_LESSCUT_RTO_S_7 +338 0x7E14 //TX_LAMBDA_PFILT +339 0x7C29 //TX_LAMBDA_PFILT_S_0 +340 0x7C29 //TX_LAMBDA_PFILT_S_1 +341 0x7C29 //TX_LAMBDA_PFILT_S_2 +342 0x7C29 //TX_LAMBDA_PFILT_S_3 +343 0x7C29 //TX_LAMBDA_PFILT_S_4 +344 0x7C29 //TX_LAMBDA_PFILT_S_5 +345 0x7C29 //TX_LAMBDA_PFILT_S_6 +346 0x7C29 //TX_LAMBDA_PFILT_S_7 +347 0x07D0 //TX_K_PEPPER +348 0x0800 //TX_A_PEPPER +349 0x1D4C //TX_K_PEPPER_HF +350 0x0400 //TX_A_PEPPER_HF +351 0x0001 //TX_HMNC_BST_FLG +352 0x4000 //TX_HMNC_BST_THR +353 0x0800 //TX_DT_BINVAD_TH_0 +354 0x0800 //TX_DT_BINVAD_TH_1 +355 0x0800 //TX_DT_BINVAD_TH_2 +356 0x0800 //TX_DT_BINVAD_TH_3 +357 0x0000 //TX_DT_BINVAD_ENDF +358 0x1000 //TX_C_POST_FLT_DT +359 0x7FFF //TX_NS_B_POST_FLT_LESSCUT +360 0x0100 //TX_DT_BOOST +361 0x0000 //TX_BF_SGRAD_FLG +362 0x0005 //TX_BF_DVG_TH +363 0x001E //TX_SN_C_F +364 0x0000 //TX_K_APT +365 0x0001 //TX_NOISEDET +366 0x0190 //TX_NDETCT +367 0x000A //TX_NOISE_TH_0 +368 0x1B58 //TX_NOISE_TH_0_2 +369 0x2134 //TX_NOISE_TH_0_3 +370 0x00C6 //TX_NOISE_TH_1 +371 0x0DAC //TX_NOISE_TH_2 +372 0x2EE0 //TX_NOISE_TH_3 +373 0x47E0 //TX_NOISE_TH_4 +374 0x57E4 //TX_NOISE_TH_5 +375 0x4BD6 //TX_NOISE_TH_5_2 +376 0x0001 //TX_NOISE_TH_5_3 +377 0x4E20 //TX_NOISE_TH_5_4 +378 0x39DF //TX_NOISE_TH_6 +379 0x0014 //TX_MINENOISE_TH +380 0xD508 //TX_MORENS_TFMASK_TH +381 0x0001 //TX_DRC_QUIET_FLOOR +382 0x6D60 //TX_RATIODTL_CUT_TH +383 0x1482 //TX_DT_CUT_K1 +384 0x00A5 //TX_OUT_ENER_S_TH_CLEAN +385 0x00A5 //TX_OUT_ENER_S_TH_LESSCLEAN +386 0x00A5 //TX_OUT_ENER_S_TH_NOISY +387 0x0029 //TX_OUT_ENER_TH_NOISE +388 0x0200 //TX_OUT_ENER_TH_SPEECH +389 0x2000 //TX_SN_NPB_GAIN +390 0x0000 //TX_NN_NPB_GAIN +391 0x3000 //TX_POST_MASK_SUP_HSNE +392 0x07D0 //TX_TAIL_DET_TH +393 0x4000 //TX_B_LESSCUT_RTO_WTA +394 0x0000 //TX_MEL_G_R +395 0x0080 //TX_SUPHIGH_TH +396 0x0000 //TX_MASK_G_R +397 0x0002 //TX_EXTRA_NS_L +398 0x1800 //TX_C_POST_FLT_MASK +399 0x7FFF //TX_A_POST_FLT_WNS +400 0x0148 //TX_MIN_G_LOW300HZ +401 0x0004 //TX_MAXLEVEL_CNG +402 0x00B4 //TX_STN_NOISE_TH +403 0x4000 //TX_POST_MASK_SUP +404 0x7FFF //TX_POST_MASK_ADJUST +405 0x00C8 //TX_NS_ENOISE_MIC0_TH +406 0x0014 //TX_MINENOISE_MIC0_TH +407 0x012C //TX_MINENOISE_MIC0_S_TH +408 0x2900 //TX_MIN_G_CTRL_SSNS +409 0x0800 //TX_METAL_RTO_THR +410 0x0FA0 //TX_NS_FP_K_METAL +411 0x3A98 //TX_NOISEDET_BOOST_TH +412 0x0FA0 //TX_NSMOOTH_TH +413 0x0000 //TX_NS_RESRV_8 +414 0x1800 //TX_RHO_UPB +415 0x2328 //TX_N_HOLD_HS +416 0x006E //TX_N_RHO_BFR0 +417 0x7FFF //TX_LAMBDA_ARSP_EST +418 0x0100 //TX_EXTRA_GAIN_MICBLOCK +419 0x0333 //TX_THR_STD_NSR +420 0x019A //TX_THR_STD_PLH +421 0x03E8 //TX_N_HOLD_STD +422 0x0066 //TX_THR_STD_RHO +423 0x2800 //TX_BF_RESET_THR_HS +424 0x0CCD //TX_SB_RTO_MEAN_TH +425 0x0300 //TX_SB_RHO_MEAN_TH_NTALK +426 0x2000 //TX_SB_RTO_MEAN_TH_ABN +427 0x2EE0 //TX_SB_RTO_MEAN_TH_RUB +428 0x0990 //TX_WTA_EN_RTO_TH +429 0x1400 //TX_TOP_ENER_TH_F +430 0x0100 //TX_DESIRED_TALK_HOLDT +431 0x0800 //TX_MIC_BLOCK_FACTOR +432 0x0000 //TX_NSEST_BFRLRNRDC +433 0x0000 //TX_THR_POST_FLT_HS +434 0x0010 //TX_HS_VAD_BIN +435 0x2666 //TX_THR_VAD_HS +436 0x2CCD //TX_MEAN_RTO_MIN_TH2 +437 0x0032 //TX_SILENCE_T +438 0x0000 //TX_A_POST_FLT_WTA +439 0x799A //TX_LAMBDA_PFLT_WTA +440 0x051E //TX_SB_RHO_MEAN2_TH +441 0x051E //TX_SB_RHO_MEAN3_TH +442 0x0000 //TX_HS_RESRV_4 +443 0x0000 //TX_HS_RESRV_5 +444 0x0001 //TX_DOA_VAD_THR_1 +445 0x003C //TX_DOA_VAD_THR_2 +446 0x0028 //TX_DOA_VAD_THR1_0 +447 0x0028 //TX_DOA_VAD_THR1_1 +448 0x0000 //TX_SRC_DOA_RNG_LOW_0A +449 0x001E //TX_SRC_DOA_RNG_HIGH_0A +450 0x005A //TX_DFLT_SRC_DOA_0A +451 0x0000 //TX_SRC_DOA_RNG_LOW_0B +452 0x0000 //TX_SRC_DOA_RNG_HIGH_0B +453 0x0000 //TX_DFLT_SRC_DOA_0B +454 0x0000 //TX_SRC_DOA_RNG_LOW_0C +455 0x0000 //TX_SRC_DOA_RNG_HIGH_0C +456 0x0000 //TX_DFLT_SRC_DOA_0C +457 0x0000 //TX_SRC_DOA_RNG_LOW_0D +458 0x0000 //TX_SRC_DOA_RNG_HIGH_0D +459 0x0000 //TX_DFLT_SRC_DOA_0D +460 0x0000 //TX_SRC_DOA_RNG_LOW_1A +461 0x00B4 //TX_SRC_DOA_RNG_HIGH_1A +462 0x005A //TX_DFLT_SRC_DOA_1A +463 0x0000 //TX_SRC_DOA_RNG_LOW_1B +464 0x00B4 //TX_SRC_DOA_RNG_HIGH_1B +465 0x005A //TX_DFLT_SRC_DOA_1B +466 0x0000 //TX_SRC_DOA_RNG_LOW_1C +467 0x00B4 //TX_SRC_DOA_RNG_HIGH_1C +468 0x005A //TX_DFLT_SRC_DOA_1C +469 0x0000 //TX_SRC_DOA_RNG_LOW_1D +470 0x00B4 //TX_SRC_DOA_RNG_HIGH_1D +471 0x005A //TX_DFLT_SRC_DOA_1D +472 0x0100 //TX_BF_HOLDOFF_T +473 0x7FFF //TX_DOA_COST_FACTOR +474 0x0D9A //TX_MAINTOREFR_TH0 +475 0x071C //TX_DOA_TRK_THR +476 0x012C //TX_DOA_TRACK_HT +477 0x0200 //TX_N1_HOLD_HF +478 0x0100 //TX_N2_HOLD_HF +479 0x2A3D //TX_BF_RESET_THR_HF +480 0x7333 //TX_DOA_SMOOTH +481 0x0800 //TX_MU_BF +482 0x0800 //TX_BF_MU_LF_B2 +483 0x0040 //TX_BF_FC_END_BIN_B2 +484 0x0020 //TX_BF_FC_END_BIN +485 0x0000 //TX_HF_RESRV_25 +486 0x0000 //TX_HF_RESRV_26 +487 0x0007 //TX_N_DOA_SEED +488 0x0001 //TX_FINE_DOA_SEARCH_FLG +489 0x0000 //TX_HF_RESRV_27 +490 0x038E //TX_DLT_SRC_DOA_RNG +491 0x0200 //TX_BF_MU_LF +492 0x0000 //TX_DFLT_SRC_LOC_0 +493 0x7FFF //TX_DFLT_SRC_LOC_1 +494 0x0000 //TX_DFLT_SRC_LOC_2 +495 0x038E //TX_DOA_TRACK_VADTH +496 0x0000 //TX_DOA_TRACK_NEW +497 0x0300 //TX_NOR_OFF_THR +498 0x7C00 //TX_MORE_ON_700HZ_THR +499 0x2000 //TX_MU_BF_ADPT_NS +500 0x0000 //TX_ADAPT_LEN +501 0x6666 //TX_MORE_SNS +502 0x0000 //TX_NOR_OFF_TH1 +503 0x0000 //TX_WIDE_MASK_TH +504 0xD333 //TX_SUBSNRATIOHIGH4MEANBCK_THR +505 0x6000 //TX_C_POST_FLT_CUT +506 0x2000 //TX_RADIODTLV +507 0x0320 //TX_POWER_LINEIN_TH +508 0x0014 //TX_FE_VADCOUNT_TH_FC +509 0x0000 //TX_ECHO_SUPP_FC +510 0x0C80 //TX_ECHO_TH +511 0x6666 //TX_MIC_TO_BFGAIN +512 0x0000 //TX_MICTOBFGAIN0 +513 0x0000 //TX_FASTMUE_TH +514 0x2CCC //TX_DEREVERB_LF_MU +515 0x3200 //TX_DEREVERB_HF_MU +516 0x0007 //TX_DEREVERB_DELAY +517 0x0004 //TX_DEREVERB_COEF_LEN +518 0x0003 //TX_DEREVERB_DNR +519 0x0000 //TX_DEREVERB_ALPHA +520 0x0000 //TX_DEREVERB_BETA +521 0x7FFF //TX_GSC_RTOL_TH +522 0x7FFF //TX_GSC_RTOH_TH +523 0x7E2C //TX_WIDE2_MEANHTH +524 0x0000 //TX_DR_RESRV_5 +525 0x0000 //TX_DR_RESRV_6 +526 0x0000 //TX_DR_RESRV_7 +527 0x0000 //TX_DR_RESRV_8 +528 0x1333 //TX_WIND_MARK_TH +529 0x399A //TX_CORR_THR +530 0x0004 //TX_SNR_THR +531 0x0010 //TX_ENGY_THR +532 0x1770 //TX_CORR_HIGH_TH +533 0x6000 //TX_ENGY_THR_2 +534 0x3400 //TX_MEAN_RTO_THR +535 0x0028 //TX_WNS_ENOISE_MIC0_TH +536 0x3000 //TX_RATIOMICL_TH +537 0x7FFF //TX_CALIG_HS +538 0x0000 //TX_LVL_CTRL +539 0x0010 //TX_WIND_SUPRTO +540 0x0014 //TX_WNS_MIN_G +541 0x0600 //TX_WNS_B_POST_FLT +542 0x3000 //TX_RATIOMICH_TH +543 0xD120 //TX_WIND_INBEAM_L_TH +544 0x0FA0 //TX_WIND_INBEAM_H_TH +545 0x2000 //TX_WNS_RESRV_0 +546 0x59D8 //TX_WNS_RESRV_1 +547 0x0200 //TX_WNS_RESRV_2 +548 0x0000 //TX_WNS_RESRV_3 +549 0x0000 //TX_WNS_RESRV_4 +550 0x0000 //TX_WNS_RESRV_5 +551 0x0000 //TX_WNS_RESRV_6 +552 0x0000 //TX_PB_B_POST_FLT_LESSCUT +553 0x0070 //TX_BF_LESSCUT_BBIN +554 0x0070 //TX_BF_LESSCUT_EBIN +555 0x0010 //TX_POSTBFB0 +556 0x0070 //TX_POSTBFB +557 0x00B0 //TX_POSTBFE +558 0x0E66 //TX_SPEECH_SNR_TH +559 0x0050 //TX_PB_MAX_PRI_SNR_TH +560 0x770A //TX_MAX_PRI_SNR_TH_L +561 0x0000 //TX_PFGAIN +562 0x0000 //TX_MAINTOREFR_TH +563 0x0000 //TX_SAM_MARK +564 0x0000 //TX_PB_RESRV_0 +565 0x0000 //TX_PB_RESRV_1 +566 0x0030 //TX_FDEQ_SUBNUM +567 0x4C4A //TX_FDEQ_GAIN_0 +568 0x4B4F //TX_FDEQ_GAIN_1 +569 0x504B //TX_FDEQ_GAIN_2 +570 0x4A4C //TX_FDEQ_GAIN_3 +571 0x4A49 //TX_FDEQ_GAIN_4 +572 0x4F48 //TX_FDEQ_GAIN_5 +573 0x4A4E //TX_FDEQ_GAIN_6 +574 0x534E //TX_FDEQ_GAIN_7 +575 0x494F //TX_FDEQ_GAIN_8 +576 0x5E6E //TX_FDEQ_GAIN_9 +577 0x787A //TX_FDEQ_GAIN_10 +578 0x6A58 //TX_FDEQ_GAIN_11 +579 0x5051 //TX_FDEQ_GAIN_12 +580 0x5156 //TX_FDEQ_GAIN_13 +581 0x6168 //TX_FDEQ_GAIN_14 +582 0x7678 //TX_FDEQ_GAIN_15 +583 0x7A87 //TX_FDEQ_GAIN_16 +584 0x9898 //TX_FDEQ_GAIN_17 +585 0x9898 //TX_FDEQ_GAIN_18 +586 0x9848 //TX_FDEQ_GAIN_19 +587 0x4848 //TX_FDEQ_GAIN_20 +588 0x4848 //TX_FDEQ_GAIN_21 +589 0x4848 //TX_FDEQ_GAIN_22 +590 0x4848 //TX_FDEQ_GAIN_23 +591 0x0F03 //TX_FDEQ_BIN_0 +592 0x0909 //TX_FDEQ_BIN_1 +593 0x080F //TX_FDEQ_BIN_2 +594 0x0609 //TX_FDEQ_BIN_3 +595 0x0F03 //TX_FDEQ_BIN_4 +596 0x1402 //TX_FDEQ_BIN_5 +597 0x0E13 //TX_FDEQ_BIN_6 +598 0x110F //TX_FDEQ_BIN_7 +599 0x0E0F //TX_FDEQ_BIN_8 +600 0x0E0F //TX_FDEQ_BIN_9 +601 0x080D //TX_FDEQ_BIN_10 +602 0x0F0F //TX_FDEQ_BIN_11 +603 0x0F0F //TX_FDEQ_BIN_12 +604 0x0A0F //TX_FDEQ_BIN_13 +605 0x0809 //TX_FDEQ_BIN_14 +606 0x0A0B //TX_FDEQ_BIN_15 +607 0x0C0D //TX_FDEQ_BIN_16 +608 0x0E0F //TX_FDEQ_BIN_17 +609 0x1013 //TX_FDEQ_BIN_18 +610 0x0A00 //TX_FDEQ_BIN_19 +611 0x0000 //TX_FDEQ_BIN_20 +612 0x0000 //TX_FDEQ_BIN_21 +613 0x0000 //TX_FDEQ_BIN_22 +614 0x0000 //TX_FDEQ_BIN_23 +615 0x0000 //TX_FDEQ_PADDING +616 0x0030 //TX_PREEQ_SUBNUM_MIC0 +617 0x4848 //TX_PREEQ_GAIN_MIC0_0 +618 0x4848 //TX_PREEQ_GAIN_MIC0_1 +619 0x4848 //TX_PREEQ_GAIN_MIC0_2 +620 0x4848 //TX_PREEQ_GAIN_MIC0_3 +621 0x4848 //TX_PREEQ_GAIN_MIC0_4 +622 0x4848 //TX_PREEQ_GAIN_MIC0_5 +623 0x4848 //TX_PREEQ_GAIN_MIC0_6 +624 0x4848 //TX_PREEQ_GAIN_MIC0_7 +625 0x4848 //TX_PREEQ_GAIN_MIC0_8 +626 0x4848 //TX_PREEQ_GAIN_MIC0_9 +627 0x4848 //TX_PREEQ_GAIN_MIC0_10 +628 0x4848 //TX_PREEQ_GAIN_MIC0_11 +629 0x4848 //TX_PREEQ_GAIN_MIC0_12 +630 0x4848 //TX_PREEQ_GAIN_MIC0_13 +631 0x4848 //TX_PREEQ_GAIN_MIC0_14 +632 0x4848 //TX_PREEQ_GAIN_MIC0_15 +633 0x4848 //TX_PREEQ_GAIN_MIC0_16 +634 0x4848 //TX_PREEQ_GAIN_MIC0_17 +635 0x4848 //TX_PREEQ_GAIN_MIC0_18 +636 0x4848 //TX_PREEQ_GAIN_MIC0_19 +637 0x4848 //TX_PREEQ_GAIN_MIC0_20 +638 0x4848 //TX_PREEQ_GAIN_MIC0_21 +639 0x4848 //TX_PREEQ_GAIN_MIC0_22 +640 0x4848 //TX_PREEQ_GAIN_MIC0_23 +641 0x1812 //TX_PREEQ_BIN_MIC0_0 +642 0x0A0A //TX_PREEQ_BIN_MIC0_1 +643 0x0808 //TX_PREEQ_BIN_MIC0_2 +644 0x080A //TX_PREEQ_BIN_MIC0_3 +645 0x0B09 //TX_PREEQ_BIN_MIC0_4 +646 0x0A06 //TX_PREEQ_BIN_MIC0_5 +647 0x0606 //TX_PREEQ_BIN_MIC0_6 +648 0x0605 //TX_PREEQ_BIN_MIC0_7 +649 0x050A //TX_PREEQ_BIN_MIC0_8 +650 0x1505 //TX_PREEQ_BIN_MIC0_9 +651 0x0506 //TX_PREEQ_BIN_MIC0_10 +652 0x0615 //TX_PREEQ_BIN_MIC0_11 +653 0x1516 //TX_PREEQ_BIN_MIC0_12 +654 0x2021 //TX_PREEQ_BIN_MIC0_13 +655 0x2021 //TX_PREEQ_BIN_MIC0_14 +656 0x2021 //TX_PREEQ_BIN_MIC0_15 +657 0x0800 //TX_PREEQ_BIN_MIC0_16 +658 0x0000 //TX_PREEQ_BIN_MIC0_17 +659 0x0000 //TX_PREEQ_BIN_MIC0_18 +660 0x0000 //TX_PREEQ_BIN_MIC0_19 +661 0x0000 //TX_PREEQ_BIN_MIC0_20 +662 0x0000 //TX_PREEQ_BIN_MIC0_21 +663 0x0000 //TX_PREEQ_BIN_MIC0_22 +664 0x0000 //TX_PREEQ_BIN_MIC0_23 +665 0x0030 //TX_PREEQ_SUBNUM_MIC1 +666 0x4848 //TX_PREEQ_GAIN_MIC1_0 +667 0x4848 //TX_PREEQ_GAIN_MIC1_1 +668 0x4848 //TX_PREEQ_GAIN_MIC1_2 +669 0x4848 //TX_PREEQ_GAIN_MIC1_3 +670 0x4848 //TX_PREEQ_GAIN_MIC1_4 +671 0x4848 //TX_PREEQ_GAIN_MIC1_5 +672 0x4A4C //TX_PREEQ_GAIN_MIC1_6 +673 0x4E50 //TX_PREEQ_GAIN_MIC1_7 +674 0x5456 //TX_PREEQ_GAIN_MIC1_8 +675 0x585C //TX_PREEQ_GAIN_MIC1_9 +676 0x5C64 //TX_PREEQ_GAIN_MIC1_10 +677 0x7478 //TX_PREEQ_GAIN_MIC1_11 +678 0x705C //TX_PREEQ_GAIN_MIC1_12 +679 0x4838 //TX_PREEQ_GAIN_MIC1_13 +680 0x3C70 //TX_PREEQ_GAIN_MIC1_14 +681 0x4848 //TX_PREEQ_GAIN_MIC1_15 +682 0x4848 //TX_PREEQ_GAIN_MIC1_16 +683 0x4848 //TX_PREEQ_GAIN_MIC1_17 +684 0x4848 //TX_PREEQ_GAIN_MIC1_18 +685 0x4848 //TX_PREEQ_GAIN_MIC1_19 +686 0x4848 //TX_PREEQ_GAIN_MIC1_20 +687 0x4848 //TX_PREEQ_GAIN_MIC1_21 +688 0x4848 //TX_PREEQ_GAIN_MIC1_22 +689 0x4848 //TX_PREEQ_GAIN_MIC1_23 +690 0x0202 //TX_PREEQ_BIN_MIC1_0 +691 0x0203 //TX_PREEQ_BIN_MIC1_1 +692 0x0303 //TX_PREEQ_BIN_MIC1_2 +693 0x0304 //TX_PREEQ_BIN_MIC1_3 +694 0x0405 //TX_PREEQ_BIN_MIC1_4 +695 0x0506 //TX_PREEQ_BIN_MIC1_5 +696 0x0708 //TX_PREEQ_BIN_MIC1_6 +697 0x0909 //TX_PREEQ_BIN_MIC1_7 +698 0x090B //TX_PREEQ_BIN_MIC1_8 +699 0x0C10 //TX_PREEQ_BIN_MIC1_9 +700 0x1013 //TX_PREEQ_BIN_MIC1_10 +701 0x1414 //TX_PREEQ_BIN_MIC1_11 +702 0x1414 //TX_PREEQ_BIN_MIC1_12 +703 0x1C1E //TX_PREEQ_BIN_MIC1_13 +704 0x1E28 //TX_PREEQ_BIN_MIC1_14 +705 0x462C //TX_PREEQ_BIN_MIC1_15 +706 0x0000 //TX_PREEQ_BIN_MIC1_16 +707 0x0000 //TX_PREEQ_BIN_MIC1_17 +708 0x0000 //TX_PREEQ_BIN_MIC1_18 +709 0x0000 //TX_PREEQ_BIN_MIC1_19 +710 0x0000 //TX_PREEQ_BIN_MIC1_20 +711 0x0000 //TX_PREEQ_BIN_MIC1_21 +712 0x0000 //TX_PREEQ_BIN_MIC1_22 +713 0x0000 //TX_PREEQ_BIN_MIC1_23 +714 0x0030 //TX_PREEQ_SUBNUM_MIC2 +715 0x4848 //TX_PREEQ_GAIN_MIC2_0 +716 0x4848 //TX_PREEQ_GAIN_MIC2_1 +717 0x4848 //TX_PREEQ_GAIN_MIC2_2 +718 0x4848 //TX_PREEQ_GAIN_MIC2_3 +719 0x4848 //TX_PREEQ_GAIN_MIC2_4 +720 0x4848 //TX_PREEQ_GAIN_MIC2_5 +721 0x4848 //TX_PREEQ_GAIN_MIC2_6 +722 0x4848 //TX_PREEQ_GAIN_MIC2_7 +723 0x4848 //TX_PREEQ_GAIN_MIC2_8 +724 0x4848 //TX_PREEQ_GAIN_MIC2_9 +725 0x4848 //TX_PREEQ_GAIN_MIC2_10 +726 0x4848 //TX_PREEQ_GAIN_MIC2_11 +727 0x4848 //TX_PREEQ_GAIN_MIC2_12 +728 0x4848 //TX_PREEQ_GAIN_MIC2_13 +729 0x4848 //TX_PREEQ_GAIN_MIC2_14 +730 0x4848 //TX_PREEQ_GAIN_MIC2_15 +731 0x4848 //TX_PREEQ_GAIN_MIC2_16 +732 0x4848 //TX_PREEQ_GAIN_MIC2_17 +733 0x4848 //TX_PREEQ_GAIN_MIC2_18 +734 0x4848 //TX_PREEQ_GAIN_MIC2_19 +735 0x4848 //TX_PREEQ_GAIN_MIC2_20 +736 0x4848 //TX_PREEQ_GAIN_MIC2_21 +737 0x4848 //TX_PREEQ_GAIN_MIC2_22 +738 0x4848 //TX_PREEQ_GAIN_MIC2_23 +739 0x0E10 //TX_PREEQ_BIN_MIC2_0 +740 0x1010 //TX_PREEQ_BIN_MIC2_1 +741 0x1010 //TX_PREEQ_BIN_MIC2_2 +742 0x1010 //TX_PREEQ_BIN_MIC2_3 +743 0x1010 //TX_PREEQ_BIN_MIC2_4 +744 0x1010 //TX_PREEQ_BIN_MIC2_5 +745 0x1010 //TX_PREEQ_BIN_MIC2_6 +746 0x1010 //TX_PREEQ_BIN_MIC2_7 +747 0x1010 //TX_PREEQ_BIN_MIC2_8 +748 0x1010 //TX_PREEQ_BIN_MIC2_9 +749 0x1010 //TX_PREEQ_BIN_MIC2_10 +750 0x1010 //TX_PREEQ_BIN_MIC2_11 +751 0x1010 //TX_PREEQ_BIN_MIC2_12 +752 0x1010 //TX_PREEQ_BIN_MIC2_13 +753 0x1010 //TX_PREEQ_BIN_MIC2_14 +754 0x0200 //TX_PREEQ_BIN_MIC2_15 +755 0x0000 //TX_PREEQ_BIN_MIC2_16 +756 0x0000 //TX_PREEQ_BIN_MIC2_17 +757 0x0000 //TX_PREEQ_BIN_MIC2_18 +758 0x0000 //TX_PREEQ_BIN_MIC2_19 +759 0x0000 //TX_PREEQ_BIN_MIC2_20 +760 0x0000 //TX_PREEQ_BIN_MIC2_21 +761 0x0000 //TX_PREEQ_BIN_MIC2_22 +762 0x0000 //TX_PREEQ_BIN_MIC2_23 +763 0x0006 //TX_MASKING_ABILITY +764 0x2000 //TX_NND_WEIGHT +765 0x0060 //TX_MIC_CALIBRATION_0 +766 0x0060 //TX_MIC_CALIBRATION_1 +767 0x0070 //TX_MIC_CALIBRATION_2 +768 0x0070 //TX_MIC_CALIBRATION_3 +769 0x0050 //TX_MIC_PWR_BIAS_0 +770 0x0040 //TX_MIC_PWR_BIAS_1 +771 0x0040 //TX_MIC_PWR_BIAS_2 +772 0x0040 //TX_MIC_PWR_BIAS_3 +773 0x0009 //TX_GAIN_LIMIT_0 +774 0x000F //TX_GAIN_LIMIT_1 +775 0x000F //TX_GAIN_LIMIT_2 +776 0x000F //TX_GAIN_LIMIT_3 +777 0x7F5B //TX_BVE_NOVAD0_ALPHADOWN +778 0x7FDE //TX_BVE_VAD0_ALPHAUP +779 0x7F3A //TX_BVE_VAD0_ALPHADOWN +780 0x2000 //TX_BVE_GAINWEIGHT_NOFEVADLI +781 0x7F5B //TX_BVE_FEVADLI_ALPHA +782 0x7F19 //TX_BVE_NOVAD0_ALPHAUP +783 0x1000 //TX_TDDRC_ALPHA_UP_01 +784 0x1000 //TX_TDDRC_ALPHA_UP_02 +785 0x1000 //TX_TDDRC_ALPHA_UP_03 +786 0x1000 //TX_TDDRC_ALPHA_UP_04 +787 0x7EB8 //TX_TDDRC_ALPHA_DWN_01 +788 0x7EB8 //TX_TDDRC_ALPHA_DWN_02 +789 0x7EB8 //TX_TDDRC_ALPHA_DWN_03 +790 0x7EB8 //TX_TDDRC_ALPHA_DWN_04 +791 0x7FFF //TX_TDDRC_TD_DRC_LIMIT +792 0x0800 //TX_TDDRC_POST_LIMIT_GAIN +793 0x0000 //TX_TDDRC_RESRV_0 +794 0x0000 //TX_TDDRC_RESRV_1 +795 0x0018 //TX_FDDRC_BAND_MARGIN_0 +796 0x0030 //TX_FDDRC_BAND_MARGIN_1 +797 0x0050 //TX_FDDRC_BAND_MARGIN_2 +798 0x0080 //TX_FDDRC_BAND_MARGIN_3 +799 0x0007 //TX_FDDRC_BLOCK_EXP +800 0x5000 //TX_FDDRC_THRD_2_0 +801 0x5000 //TX_FDDRC_THRD_2_1 +802 0x5000 //TX_FDDRC_THRD_2_2 +803 0x5000 //TX_FDDRC_THRD_2_3 +804 0x6400 //TX_FDDRC_THRD_3_0 +805 0x6400 //TX_FDDRC_THRD_3_1 +806 0x6400 //TX_FDDRC_THRD_3_2 +807 0x6400 //TX_FDDRC_THRD_3_3 +808 0x2000 //TX_FDDRC_SLANT_0_0 +809 0x2000 //TX_FDDRC_SLANT_0_1 +810 0x2000 //TX_FDDRC_SLANT_0_2 +811 0x2000 //TX_FDDRC_SLANT_0_3 +812 0x5333 //TX_FDDRC_SLANT_1_0 +813 0x5333 //TX_FDDRC_SLANT_1_1 +814 0x5333 //TX_FDDRC_SLANT_1_2 +815 0x5333 //TX_FDDRC_SLANT_1_3 +816 0x0010 //TX_DEADMIC_SILENCE_TH +817 0x0600 //TX_MIC_DEGRADE_TH +818 0x0078 //TX_DEADMIC_CNT +819 0x0078 //TX_MIC_DEGRADE_CNT +820 0x0000 //TX_FDDRC_RESRV_4 +821 0x0000 //TX_FDDRC_RESRV_5 +822 0x0000 //TX_FDDRC_RESRV_6 +823 0x7FFF //TX_KS_NOISEPASTE_FACTOR +824 0x0001 //TX_KS_CONFIG +825 0x7FFF //TX_KS_GAIN_MIN +826 0x0000 //TX_KS_RESRV_0 +827 0x0000 //TX_KS_RESRV_1 +828 0x0000 //TX_KS_RESRV_2 +829 0x7C00 //TX_LAMBDA_PKA_FP +830 0x2000 //TX_TPKA_FP +831 0x0080 //TX_MIN_G_FP +832 0x2000 //TX_MAX_G_FP +833 0x0FA0 //TX_FFP_FP_K_METAL +834 0x4000 //TX_A_POST_FLT_FP +835 0x0F5C //TX_RTO_OUTBEAM_TH +836 0x4CCD //TX_TPKA_FP_THD +837 0x0000 //TX_MAX_G_FP_BLK +838 0x0000 //TX_FFP_FADEIN +839 0x0000 //TX_FFP_FADEOUT +840 0x0000 //TX_WHISPERCTH +841 0x0000 //TX_WHISPERHOLDT +842 0x0000 //TX_WHISP_ENTHH +843 0x0000 //TX_WHISP_ENTHL +844 0x0000 //TX_WHISP_RTOTH +845 0x0000 //TX_WHISP_RTOTH2 +846 0x0096 //TX_MUTE_PERIOD +847 0x0000 //TX_FADE_IN_PERIOD +848 0x0100 //TX_FFP_RESRV_2 +849 0x0020 //TX_FFP_RESRV_3 +850 0x0000 //TX_FFP_RESRV_4 +851 0x0000 //TX_FFP_RESRV_5 +852 0x0000 //TX_FFP_RESRV_6 +853 0x0002 //TX_FILTINDX +854 0x0000 //TX_TDDRC_THRD_0 +855 0x0000 //TX_TDDRC_THRD_1 +856 0x1800 //TX_TDDRC_THRD_2 +857 0x1800 //TX_TDDRC_THRD_3 +858 0x3000 //TX_TDDRC_SLANT_0 +859 0x7E00 //TX_TDDRC_SLANT_1 +860 0x1000 //TX_TDDRC_ALPHA_UP_00 +861 0x7EB8 //TX_TDDRC_ALPHA_DWN_00 +862 0x0000 //TX_TDDRC_HMNC_FLAG +863 0x199A //TX_TDDRC_HMNC_GAIN +864 0x0000 //TX_TDDRC_SMT_FLAG +865 0x0CCD //TX_TDDRC_SMT_W +866 0x0504 //TX_TDDRC_DRC_GAIN +867 0x7FFF //TX_TDDRC_LMT_THRD +868 0x0000 //TX_TDDRC_LMT_ALPHA +869 0x0000 //TX_TFMASKLTH +870 0x0000 //TX_TFMASKLTHL +871 0x0CCD //TX_TFMASKHTH +872 0xECCD //TX_TFMASKLTH_BINVAD +873 0xFCCD //TX_TFMASKLTH_NS_EST +874 0xF800 //TX_TFMASKLTH_DOA +875 0x0CCD //TX_TFMASKTH_BLESSCUT +876 0x1000 //TX_B_LESSCUT_RTO_MASK +877 0x2000 //TX_SB_RHO_MEAN_TH_ABN +878 0x2000 //TX_B_POST_FLT_MASK +879 0x0000 //TX_B_POST_FLT_MASK1 +880 0x6333 //TX_GAIN_WIND_MASK +881 0x0000 //TX_TFMASK_BFSTRICT_MUSIC +882 0x0000 //TX_TFMASK_BFSTRICT_NOMUSIC +883 0x7333 //TX_FASTNS_OUTIN_TH +884 0x0CCD //TX_FASTNS_TFMASK_TH +885 0x0CCD //TX_FASTNS_TFMASKBIN_TH1 +886 0x0CCD //TX_FASTNS_TFMASKBIN_TH2 +887 0x0CCD //TX_FASTNS_TFMASKBIN_TH3 +888 0x0028 //TX_FASTNS_ARSPC_TH +889 0xC000 //TX_FASTNS_MASK5_TH +890 0x0810 //TX_POSTSSA_MIN_G_VR_MASK +891 0x1000 //TX_A_LESSCUT_RTO_MASK +892 0x1770 //TX_FASTNS_NOISETH +893 0xC000 //TX_FASTNS_SSA_THLFL +894 0xC000 //TX_FASTNS_SSA_THHFL +895 0xCCCC //TX_FASTNS_SSA_THLFH +896 0xD999 //TX_FASTNS_SSA_THHFH +897 0x2339 //TX_SENDFUNC_REG_MICMUTE +898 0x0021 //TX_SENDFUNC_REG_MICMUTE1 +899 0x02BC //TX_MICMUTE_RATIO_THR +900 0x0140 //TX_MICMUTE_AMP_THR +901 0x0004 //TX_MICMUTE_HPF_IND +902 0x00C0 //TX_MICMUTE_LOG_EYR_TH +903 0x0008 //TX_MICMUTE_CVG_TIME +904 0x0008 //TX_MICMUTE_RELEASE_TIME +905 0x01FE //TX_MIC_VOLUME_MIC0MUTE +906 0x0020 //TX_MICMUTE_EPD_OFFSET_0 +907 0x001E //TX_MICMUTE_FRQ_AEC_L +908 0x7999 //TX_MICMUTE_EAD_THR +909 0x7FFF //TX_MICMUTE_LAMBDA_CB_NLE +910 0x7FFF //TX_MICMUTE_LAMBDA_RE_EST +911 0x4000 //TX_DTD_THR1_MICMUTE_0 +912 0x7000 //TX_DTD_THR1_MICMUTE_1 +913 0x7FFF //TX_DTD_THR1_MICMUTE_2 +914 0x7FFF //TX_DTD_THR1_MICMUTE_3 +915 0x6CCC //TX_DTD_THR2_MICMUTE_0 +916 0x0400 //TX_MICMUTE_MIN_EQ_RE_EST_0 +917 0x0400 //TX_MICMUTE_MIN_EQ_RE_EST_1 +918 0x1000 //TX_MICMUTE_MIN_EQ_RE_EST_2 +919 0x7FFF //TX_MICMUTE_MIN_EQ_RE_EST_3 +920 0x7FFF //TX_MICMUTE_MIN_EQ_RE_EST_4 +921 0x4000 //TX_MICMUTE_C_POST_FLT +922 0x03E8 //TX_MICMUTE_DT_CUT_K +923 0x0001 //TX_MICMUTE_DT_CUT_THR +924 0x03E8 //TX_MICMUTE_DT_CUT_K2 +925 0x0001 //TX_MICMUTE_DT_CUT_THR2 +926 0x0064 //TX_MICMUTE_DT2_HOLD_N +927 0x1000 //TX_MICMUTE_RATIODTH_THCUT +928 0x1000 //TX_MICMUTE_B_POST_FLT_ECHOL +929 0x7FFF //TX_MICMUTE_B_POST_FLT_ECHOH +930 0x0400 //TX_MICMUTE_C_POST_FLT_MASK +931 0x7999 //TX_MICMUTE_RATIODTL_CUT_TH +932 0x0258 //TX_MICMUTE_DT_CUT_K1 +933 0x0800 //TX_MICMUTE_N2_SN_EST +934 0xFC00 //TX_MICMUTE_THR_SN_EST_0 +935 0x001C //TX_MICMUTE_MIN_G_CTRL_0 +936 0x6000 //TX_MICMUTE_A_POST_FILT_S_0 +937 0x7000 //TX_MICMUTE_B_POST_FILT_0 +938 0x2710 //TX_MIC1RUB_AMP_THR +939 0x0010 //TX_MIC1MUTE_RATIO_THR +940 0x0450 //TX_MIC1MUTE_AMP_THR +941 0x0008 //TX_MIC1MUTE_CVG_TIME +942 0x0008 //TX_MIC1MUTE_RELEASE_TIME +943 0x0000 //TX_AMS_RESRV_01 +944 0x0000 //TX_AMS_RESRV_02 +945 0x0000 //TX_AMS_RESRV_03 +946 0x0000 //TX_AMS_RESRV_04 +947 0x0000 //TX_AMS_RESRV_05 +948 0x0000 //TX_AMS_RESRV_06 +949 0x0000 //TX_AMS_RESRV_07 +950 0x0000 //TX_AMS_RESRV_08 +951 0x0000 //TX_AMS_RESRV_09 +952 0x0000 //TX_AMS_RESRV_10 +953 0x0000 //TX_AMS_RESRV_11 +954 0x0000 //TX_AMS_RESRV_12 +955 0x0000 //TX_AMS_RESRV_13 +956 0x0000 //TX_AMS_RESRV_14 +957 0x0000 //TX_AMS_RESRV_15 +958 0x0000 //TX_AMS_RESRV_16 +959 0x0000 //TX_AMS_RESRV_17 +960 0x0000 //TX_AMS_RESRV_18 +961 0x0000 //TX_AMS_RESRV_19 +#RX +0 0x202C //RX_RECVFUNC_MODE_0 +1 0x0000 //RX_RECVFUNC_MODE_1 +2 0x0004 //RX_SAMPLINGFREQ_SIG +3 0x0004 //RX_SAMPLINGFREQ_PROC +4 0x000A //RX_FRAME_SZ +5 0x0000 //RX_DELAY_OPT +6 0x1000 //RX_TDDRC_ALPHA_UP_1 +7 0x1000 //RX_TDDRC_ALPHA_UP_2 +8 0x1000 //RX_TDDRC_ALPHA_UP_3 +9 0x1000 //RX_TDDRC_ALPHA_UP_4 +10 0x0722 //RX_PGA +11 0x7FFF //RX_A_HP +12 0x4000 //RX_B_PE +13 0x5800 //RX_THR_PITCH_DET_0 +14 0x5000 //RX_THR_PITCH_DET_1 +15 0x4000 //RX_THR_PITCH_DET_2 +16 0x0008 //RX_PITCH_BFR_LEN +17 0x0003 //RX_SBD_PITCH_DET +18 0x0100 //RX_PP_RESRV_0 +19 0x0020 //RX_PP_RESRV_1 +20 0x0600 //RX_N_SN_EST +21 0x000C //RX_N2_SN_EST +22 0x000F //RX_NS_LVL_CTRL +23 0xF800 //RX_THR_SN_EST +24 0x7E00 //RX_LAMBDA_PFILT +25 0x000A //RX_FENS_RESRV_0 +26 0x0190 //RX_FENS_RESRV_1 +27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +30 0x0002 //RX_EXTRA_NS_L +31 0x0800 //RX_EXTRA_NS_A +32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +33 0x7000 //RX_TDDRC_LIMITER_THRD +34 0x0800 //RX_TDDRC_LIMITER_GAIN +35 0x199A //RX_A_POST_FLT +36 0x0000 //RX_LMT_THRD +37 0x4000 //RX_LMT_ALPHA +38 0x0020 //RX_FDEQ_SUBNUM +39 0x4E4E //RX_FDEQ_GAIN_0 +40 0x4E56 //RX_FDEQ_GAIN_1 +41 0x6878 //RX_FDEQ_GAIN_2 +42 0x8088 //RX_FDEQ_GAIN_3 +43 0x848B //RX_FDEQ_GAIN_4 +44 0x8F8E //RX_FDEQ_GAIN_5 +45 0x9494 //RX_FDEQ_GAIN_6 +46 0x96A0 //RX_FDEQ_GAIN_7 +47 0xB8A0 //RX_FDEQ_GAIN_8 +48 0xA99D //RX_FDEQ_GAIN_9 +49 0x9D6A //RX_FDEQ_GAIN_10 +50 0x626B //RX_FDEQ_GAIN_11 +51 0x6C78 //RX_FDEQ_GAIN_12 +52 0x7884 //RX_FDEQ_GAIN_13 +53 0x9098 //RX_FDEQ_GAIN_14 +54 0x9CAC //RX_FDEQ_GAIN_15 +55 0x4848 //RX_FDEQ_GAIN_16 +56 0x4848 //RX_FDEQ_GAIN_17 +57 0x4848 //RX_FDEQ_GAIN_18 +58 0x4848 //RX_FDEQ_GAIN_19 +59 0x4848 //RX_FDEQ_GAIN_20 +60 0x4848 //RX_FDEQ_GAIN_21 +61 0x4848 //RX_FDEQ_GAIN_22 +62 0x4848 //RX_FDEQ_GAIN_23 +63 0x0202 //RX_FDEQ_BIN_0 +64 0x0202 //RX_FDEQ_BIN_1 +65 0x0302 //RX_FDEQ_BIN_2 +66 0x0304 //RX_FDEQ_BIN_3 +67 0x0405 //RX_FDEQ_BIN_4 +68 0x0506 //RX_FDEQ_BIN_5 +69 0x0708 //RX_FDEQ_BIN_6 +70 0x090A //RX_FDEQ_BIN_7 +71 0x0B0C //RX_FDEQ_BIN_8 +72 0x0D0E //RX_FDEQ_BIN_9 +73 0x1013 //RX_FDEQ_BIN_10 +74 0x1719 //RX_FDEQ_BIN_11 +75 0x1B1E //RX_FDEQ_BIN_12 +76 0x1E1E //RX_FDEQ_BIN_13 +77 0x1E28 //RX_FDEQ_BIN_14 +78 0x282C //RX_FDEQ_BIN_15 +79 0x0000 //RX_FDEQ_BIN_16 +80 0x0000 //RX_FDEQ_BIN_17 +81 0x0000 //RX_FDEQ_BIN_18 +82 0x0000 //RX_FDEQ_BIN_19 +83 0x0000 //RX_FDEQ_BIN_20 +84 0x0000 //RX_FDEQ_BIN_21 +85 0x0000 //RX_FDEQ_BIN_22 +86 0x0000 //RX_FDEQ_BIN_23 +87 0x4000 //RX_FDEQ_RESRV_0 +88 0x0320 //RX_FDEQ_RESRV_1 +89 0x0018 //RX_FDDRC_BAND_MARGIN_0 +90 0x0030 //RX_FDDRC_BAND_MARGIN_1 +91 0x0050 //RX_FDDRC_BAND_MARGIN_2 +92 0x0080 //RX_FDDRC_BAND_MARGIN_3 +93 0x0007 //RX_FDDRC_BLOCK_EXP +94 0x5000 //RX_FDDRC_THRD_2_0 +95 0x5000 //RX_FDDRC_THRD_2_1 +96 0x5000 //RX_FDDRC_THRD_2_2 +97 0x5000 //RX_FDDRC_THRD_2_3 +98 0x6400 //RX_FDDRC_THRD_3_0 +99 0x6400 //RX_FDDRC_THRD_3_1 +100 0x6400 //RX_FDDRC_THRD_3_2 +101 0x6400 //RX_FDDRC_THRD_3_3 +102 0x2000 //RX_FDDRC_SLANT_0_0 +103 0x2000 //RX_FDDRC_SLANT_0_1 +104 0x2000 //RX_FDDRC_SLANT_0_2 +105 0x2000 //RX_FDDRC_SLANT_0_3 +106 0x5333 //RX_FDDRC_SLANT_1_0 +107 0x5333 //RX_FDDRC_SLANT_1_1 +108 0x5333 //RX_FDDRC_SLANT_1_2 +109 0x5333 //RX_FDDRC_SLANT_1_3 +110 0x0000 //RX_FDDRC_RESRV_0 +111 0x0002 //RX_FILTINDX +112 0x0000 //RX_TDDRC_THRD_0 +113 0x0000 //RX_TDDRC_THRD_1 +114 0x1800 //RX_TDDRC_THRD_2 +115 0x1800 //RX_TDDRC_THRD_3 +116 0x3000 //RX_TDDRC_SLANT_0 +117 0x6E00 //RX_TDDRC_SLANT_1 +118 0x1000 //RX_TDDRC_ALPHA_UP_0 +119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +120 0x0000 //RX_TDDRC_HMNC_FLAG +121 0x199A //RX_TDDRC_HMNC_GAIN +122 0x0001 //RX_TDDRC_SMT_FLAG +123 0x0CCD //RX_TDDRC_SMT_W +124 0x02FD //RX_TDDRC_DRC_GAIN +125 0x7C00 //RX_LAMBDA_PKA_FP +126 0x1964 //RX_TPKA_FP +127 0x0080 //RX_MIN_G_FP +128 0x2000 //RX_MAX_G_FP +129 0x000D //RX_SPK_VOL +130 0x0000 //RX_VOL_RESRV_0 +131 0x0000 //RX_MAXLEVEL_CNG +132 0x3000 //RX_BWE_UV_TH +133 0x3000 //RX_BWE_UV_TH2 +134 0x1800 //RX_BWE_UV_TH3 +135 0x1000 //RX_BWE_V_TH +136 0x04CD //RX_BWE_GAIN1_V_TH1 +137 0x0F33 //RX_BWE_GAIN1_V_TH2 +138 0x7333 //RX_BWE_UV_EQ +139 0x199A //RX_BWE_V_EQ +140 0x7333 //RX_BWE_TONE_TH +141 0x0004 //RX_BWE_UV_HOLD_T +142 0x6CCD //RX_BWE_GAIN2_ALPHA +143 0x799A //RX_BWE_GAIN3_ALPHA +144 0x001E //RX_BWE_CUTOFF +145 0x3000 //RX_BWE_GAINFILL +146 0x3200 //RX_BWE_MAXTH_TONE +147 0x2000 //RX_BWE_EQ_0 +148 0x2000 //RX_BWE_EQ_1 +149 0x2000 //RX_BWE_EQ_2 +150 0x2000 //RX_BWE_EQ_3 +151 0x2000 //RX_BWE_EQ_4 +152 0x2000 //RX_BWE_EQ_5 +153 0x2000 //RX_BWE_EQ_6 +154 0x0000 //RX_BWE_RESRV_0 +155 0x0000 //RX_BWE_RESRV_1 +156 0x0000 //RX_BWE_RESRV_2 +#VOL 0 +6 0x1000 //RX_TDDRC_ALPHA_UP_1 +7 0x1000 //RX_TDDRC_ALPHA_UP_2 +8 0x1000 //RX_TDDRC_ALPHA_UP_3 +9 0x1000 //RX_TDDRC_ALPHA_UP_4 +27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +33 0x7000 //RX_TDDRC_LIMITER_THRD +34 0x0800 //RX_TDDRC_LIMITER_GAIN +112 0x0000 //RX_TDDRC_THRD_0 +113 0x0000 //RX_TDDRC_THRD_1 +114 0x1800 //RX_TDDRC_THRD_2 +115 0x1800 //RX_TDDRC_THRD_3 +116 0x3000 //RX_TDDRC_SLANT_0 +117 0x6E00 //RX_TDDRC_SLANT_1 +118 0x1000 //RX_TDDRC_ALPHA_UP_0 +119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +120 0x0000 //RX_TDDRC_HMNC_FLAG +121 0x199A //RX_TDDRC_HMNC_GAIN +122 0x0001 //RX_TDDRC_SMT_FLAG +123 0x0CCD //RX_TDDRC_SMT_W +124 0x02FD //RX_TDDRC_DRC_GAIN +38 0x0020 //RX_FDEQ_SUBNUM +39 0x4E4E //RX_FDEQ_GAIN_0 +40 0x4E56 //RX_FDEQ_GAIN_1 +41 0x6878 //RX_FDEQ_GAIN_2 +42 0x8088 //RX_FDEQ_GAIN_3 +43 0x848B //RX_FDEQ_GAIN_4 +44 0x8F8E //RX_FDEQ_GAIN_5 +45 0x9494 //RX_FDEQ_GAIN_6 +46 0x96A0 //RX_FDEQ_GAIN_7 +47 0xB8A0 //RX_FDEQ_GAIN_8 +48 0xA99D //RX_FDEQ_GAIN_9 +49 0x9D6A //RX_FDEQ_GAIN_10 +50 0x626B //RX_FDEQ_GAIN_11 +51 0x6C78 //RX_FDEQ_GAIN_12 +52 0x7884 //RX_FDEQ_GAIN_13 +53 0x9098 //RX_FDEQ_GAIN_14 +54 0x9CAC //RX_FDEQ_GAIN_15 +55 0x4848 //RX_FDEQ_GAIN_16 +56 0x4848 //RX_FDEQ_GAIN_17 +57 0x4848 //RX_FDEQ_GAIN_18 +58 0x4848 //RX_FDEQ_GAIN_19 +59 0x4848 //RX_FDEQ_GAIN_20 +60 0x4848 //RX_FDEQ_GAIN_21 +61 0x4848 //RX_FDEQ_GAIN_22 +62 0x4848 //RX_FDEQ_GAIN_23 +63 0x0202 //RX_FDEQ_BIN_0 +64 0x0202 //RX_FDEQ_BIN_1 +65 0x0302 //RX_FDEQ_BIN_2 +66 0x0304 //RX_FDEQ_BIN_3 +67 0x0405 //RX_FDEQ_BIN_4 +68 0x0506 //RX_FDEQ_BIN_5 +69 0x0708 //RX_FDEQ_BIN_6 +70 0x090A //RX_FDEQ_BIN_7 +71 0x0B0C //RX_FDEQ_BIN_8 +72 0x0D0E //RX_FDEQ_BIN_9 +73 0x1013 //RX_FDEQ_BIN_10 +74 0x1719 //RX_FDEQ_BIN_11 +75 0x1B1E //RX_FDEQ_BIN_12 +76 0x1E1E //RX_FDEQ_BIN_13 +77 0x1E28 //RX_FDEQ_BIN_14 +78 0x282C //RX_FDEQ_BIN_15 +79 0x0000 //RX_FDEQ_BIN_16 +80 0x0000 //RX_FDEQ_BIN_17 +81 0x0000 //RX_FDEQ_BIN_18 +82 0x0000 //RX_FDEQ_BIN_19 +83 0x0000 //RX_FDEQ_BIN_20 +84 0x0000 //RX_FDEQ_BIN_21 +85 0x0000 //RX_FDEQ_BIN_22 +86 0x0000 //RX_FDEQ_BIN_23 +87 0x4000 //RX_FDEQ_RESRV_0 +88 0x0320 //RX_FDEQ_RESRV_1 +89 0x0018 //RX_FDDRC_BAND_MARGIN_0 +90 0x0030 //RX_FDDRC_BAND_MARGIN_1 +91 0x0050 //RX_FDDRC_BAND_MARGIN_2 +92 0x0080 //RX_FDDRC_BAND_MARGIN_3 +93 0x0007 //RX_FDDRC_BLOCK_EXP +94 0x5000 //RX_FDDRC_THRD_2_0 +95 0x5000 //RX_FDDRC_THRD_2_1 +96 0x5000 //RX_FDDRC_THRD_2_2 +97 0x5000 //RX_FDDRC_THRD_2_3 +98 0x6400 //RX_FDDRC_THRD_3_0 +99 0x6400 //RX_FDDRC_THRD_3_1 +100 0x6400 //RX_FDDRC_THRD_3_2 +101 0x6400 //RX_FDDRC_THRD_3_3 +102 0x2000 //RX_FDDRC_SLANT_0_0 +103 0x2000 //RX_FDDRC_SLANT_0_1 +104 0x2000 //RX_FDDRC_SLANT_0_2 +105 0x2000 //RX_FDDRC_SLANT_0_3 +106 0x5333 //RX_FDDRC_SLANT_1_0 +107 0x5333 //RX_FDDRC_SLANT_1_1 +108 0x5333 //RX_FDDRC_SLANT_1_2 +109 0x5333 //RX_FDDRC_SLANT_1_3 +110 0x0000 //RX_FDDRC_RESRV_0 +129 0x000D //RX_SPK_VOL +130 0x0000 //RX_VOL_RESRV_0 +#VOL 1 +6 0x1000 //RX_TDDRC_ALPHA_UP_1 +7 0x1000 //RX_TDDRC_ALPHA_UP_2 +8 0x1000 //RX_TDDRC_ALPHA_UP_3 +9 0x1000 //RX_TDDRC_ALPHA_UP_4 +27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +33 0x7000 //RX_TDDRC_LIMITER_THRD +34 0x0800 //RX_TDDRC_LIMITER_GAIN +112 0x0000 //RX_TDDRC_THRD_0 +113 0x0000 //RX_TDDRC_THRD_1 +114 0x1800 //RX_TDDRC_THRD_2 +115 0x1800 //RX_TDDRC_THRD_3 +116 0x3000 //RX_TDDRC_SLANT_0 +117 0x6E00 //RX_TDDRC_SLANT_1 +118 0x1000 //RX_TDDRC_ALPHA_UP_0 +119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +120 0x0000 //RX_TDDRC_HMNC_FLAG +121 0x199A //RX_TDDRC_HMNC_GAIN +122 0x0001 //RX_TDDRC_SMT_FLAG +123 0x0CCD //RX_TDDRC_SMT_W +124 0x02FD //RX_TDDRC_DRC_GAIN +38 0x0020 //RX_FDEQ_SUBNUM +39 0x4E4E //RX_FDEQ_GAIN_0 +40 0x4E56 //RX_FDEQ_GAIN_1 +41 0x6878 //RX_FDEQ_GAIN_2 +42 0x8088 //RX_FDEQ_GAIN_3 +43 0x848B //RX_FDEQ_GAIN_4 +44 0x8F8E //RX_FDEQ_GAIN_5 +45 0x9494 //RX_FDEQ_GAIN_6 +46 0x96A0 //RX_FDEQ_GAIN_7 +47 0xB8A0 //RX_FDEQ_GAIN_8 +48 0xA99D //RX_FDEQ_GAIN_9 +49 0x9D6A //RX_FDEQ_GAIN_10 +50 0x626B //RX_FDEQ_GAIN_11 +51 0x6C78 //RX_FDEQ_GAIN_12 +52 0x7884 //RX_FDEQ_GAIN_13 +53 0x9098 //RX_FDEQ_GAIN_14 +54 0x9CAC //RX_FDEQ_GAIN_15 +55 0x4848 //RX_FDEQ_GAIN_16 +56 0x4848 //RX_FDEQ_GAIN_17 +57 0x4848 //RX_FDEQ_GAIN_18 +58 0x4848 //RX_FDEQ_GAIN_19 +59 0x4848 //RX_FDEQ_GAIN_20 +60 0x4848 //RX_FDEQ_GAIN_21 +61 0x4848 //RX_FDEQ_GAIN_22 +62 0x4848 //RX_FDEQ_GAIN_23 +63 0x0202 //RX_FDEQ_BIN_0 +64 0x0202 //RX_FDEQ_BIN_1 +65 0x0302 //RX_FDEQ_BIN_2 +66 0x0304 //RX_FDEQ_BIN_3 +67 0x0405 //RX_FDEQ_BIN_4 +68 0x0506 //RX_FDEQ_BIN_5 +69 0x0708 //RX_FDEQ_BIN_6 +70 0x090A //RX_FDEQ_BIN_7 +71 0x0B0C //RX_FDEQ_BIN_8 +72 0x0D0E //RX_FDEQ_BIN_9 +73 0x1013 //RX_FDEQ_BIN_10 +74 0x1719 //RX_FDEQ_BIN_11 +75 0x1B1E //RX_FDEQ_BIN_12 +76 0x1E1E //RX_FDEQ_BIN_13 +77 0x1E28 //RX_FDEQ_BIN_14 +78 0x282C //RX_FDEQ_BIN_15 +79 0x0000 //RX_FDEQ_BIN_16 +80 0x0000 //RX_FDEQ_BIN_17 +81 0x0000 //RX_FDEQ_BIN_18 +82 0x0000 //RX_FDEQ_BIN_19 +83 0x0000 //RX_FDEQ_BIN_20 +84 0x0000 //RX_FDEQ_BIN_21 +85 0x0000 //RX_FDEQ_BIN_22 +86 0x0000 //RX_FDEQ_BIN_23 +87 0x4000 //RX_FDEQ_RESRV_0 +88 0x0320 //RX_FDEQ_RESRV_1 +89 0x0018 //RX_FDDRC_BAND_MARGIN_0 +90 0x0030 //RX_FDDRC_BAND_MARGIN_1 +91 0x0050 //RX_FDDRC_BAND_MARGIN_2 +92 0x0080 //RX_FDDRC_BAND_MARGIN_3 +93 0x0007 //RX_FDDRC_BLOCK_EXP +94 0x5000 //RX_FDDRC_THRD_2_0 +95 0x5000 //RX_FDDRC_THRD_2_1 +96 0x5000 //RX_FDDRC_THRD_2_2 +97 0x5000 //RX_FDDRC_THRD_2_3 +98 0x6400 //RX_FDDRC_THRD_3_0 +99 0x6400 //RX_FDDRC_THRD_3_1 +100 0x6400 //RX_FDDRC_THRD_3_2 +101 0x6400 //RX_FDDRC_THRD_3_3 +102 0x2000 //RX_FDDRC_SLANT_0_0 +103 0x2000 //RX_FDDRC_SLANT_0_1 +104 0x2000 //RX_FDDRC_SLANT_0_2 +105 0x2000 //RX_FDDRC_SLANT_0_3 +106 0x5333 //RX_FDDRC_SLANT_1_0 +107 0x5333 //RX_FDDRC_SLANT_1_1 +108 0x5333 //RX_FDDRC_SLANT_1_2 +109 0x5333 //RX_FDDRC_SLANT_1_3 +110 0x0000 //RX_FDDRC_RESRV_0 +129 0x0016 //RX_SPK_VOL +130 0x0000 //RX_VOL_RESRV_0 +#VOL 2 +6 0x1000 //RX_TDDRC_ALPHA_UP_1 +7 0x1000 //RX_TDDRC_ALPHA_UP_2 +8 0x1000 //RX_TDDRC_ALPHA_UP_3 +9 0x1000 //RX_TDDRC_ALPHA_UP_4 +27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +33 0x7000 //RX_TDDRC_LIMITER_THRD +34 0x0800 //RX_TDDRC_LIMITER_GAIN +112 0x0000 //RX_TDDRC_THRD_0 +113 0x0000 //RX_TDDRC_THRD_1 +114 0x1800 //RX_TDDRC_THRD_2 +115 0x1800 //RX_TDDRC_THRD_3 +116 0x3000 //RX_TDDRC_SLANT_0 +117 0x6E00 //RX_TDDRC_SLANT_1 +118 0x1000 //RX_TDDRC_ALPHA_UP_0 +119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +120 0x0000 //RX_TDDRC_HMNC_FLAG +121 0x199A //RX_TDDRC_HMNC_GAIN +122 0x0001 //RX_TDDRC_SMT_FLAG +123 0x0CCD //RX_TDDRC_SMT_W +124 0x02FD //RX_TDDRC_DRC_GAIN +38 0x0020 //RX_FDEQ_SUBNUM +39 0x4E4E //RX_FDEQ_GAIN_0 +40 0x4E56 //RX_FDEQ_GAIN_1 +41 0x6878 //RX_FDEQ_GAIN_2 +42 0x8088 //RX_FDEQ_GAIN_3 +43 0x848B //RX_FDEQ_GAIN_4 +44 0x8F8E //RX_FDEQ_GAIN_5 +45 0x9494 //RX_FDEQ_GAIN_6 +46 0x96A0 //RX_FDEQ_GAIN_7 +47 0xB8A0 //RX_FDEQ_GAIN_8 +48 0xA99D //RX_FDEQ_GAIN_9 +49 0x9D6A //RX_FDEQ_GAIN_10 +50 0x626B //RX_FDEQ_GAIN_11 +51 0x6C78 //RX_FDEQ_GAIN_12 +52 0x7884 //RX_FDEQ_GAIN_13 +53 0x9098 //RX_FDEQ_GAIN_14 +54 0x9CAC //RX_FDEQ_GAIN_15 +55 0x4848 //RX_FDEQ_GAIN_16 +56 0x4848 //RX_FDEQ_GAIN_17 +57 0x4848 //RX_FDEQ_GAIN_18 +58 0x4848 //RX_FDEQ_GAIN_19 +59 0x4848 //RX_FDEQ_GAIN_20 +60 0x4848 //RX_FDEQ_GAIN_21 +61 0x4848 //RX_FDEQ_GAIN_22 +62 0x4848 //RX_FDEQ_GAIN_23 +63 0x0202 //RX_FDEQ_BIN_0 +64 0x0202 //RX_FDEQ_BIN_1 +65 0x0302 //RX_FDEQ_BIN_2 +66 0x0304 //RX_FDEQ_BIN_3 +67 0x0405 //RX_FDEQ_BIN_4 +68 0x0506 //RX_FDEQ_BIN_5 +69 0x0708 //RX_FDEQ_BIN_6 +70 0x090A //RX_FDEQ_BIN_7 +71 0x0B0C //RX_FDEQ_BIN_8 +72 0x0D0E //RX_FDEQ_BIN_9 +73 0x1013 //RX_FDEQ_BIN_10 +74 0x1719 //RX_FDEQ_BIN_11 +75 0x1B1E //RX_FDEQ_BIN_12 +76 0x1E1E //RX_FDEQ_BIN_13 +77 0x1E28 //RX_FDEQ_BIN_14 +78 0x282C //RX_FDEQ_BIN_15 +79 0x0000 //RX_FDEQ_BIN_16 +80 0x0000 //RX_FDEQ_BIN_17 +81 0x0000 //RX_FDEQ_BIN_18 +82 0x0000 //RX_FDEQ_BIN_19 +83 0x0000 //RX_FDEQ_BIN_20 +84 0x0000 //RX_FDEQ_BIN_21 +85 0x0000 //RX_FDEQ_BIN_22 +86 0x0000 //RX_FDEQ_BIN_23 +87 0x4000 //RX_FDEQ_RESRV_0 +88 0x0320 //RX_FDEQ_RESRV_1 +89 0x0018 //RX_FDDRC_BAND_MARGIN_0 +90 0x0030 //RX_FDDRC_BAND_MARGIN_1 +91 0x0050 //RX_FDDRC_BAND_MARGIN_2 +92 0x0080 //RX_FDDRC_BAND_MARGIN_3 +93 0x0007 //RX_FDDRC_BLOCK_EXP +94 0x5000 //RX_FDDRC_THRD_2_0 +95 0x5000 //RX_FDDRC_THRD_2_1 +96 0x5000 //RX_FDDRC_THRD_2_2 +97 0x5000 //RX_FDDRC_THRD_2_3 +98 0x6400 //RX_FDDRC_THRD_3_0 +99 0x6400 //RX_FDDRC_THRD_3_1 +100 0x6400 //RX_FDDRC_THRD_3_2 +101 0x6400 //RX_FDDRC_THRD_3_3 +102 0x2000 //RX_FDDRC_SLANT_0_0 +103 0x2000 //RX_FDDRC_SLANT_0_1 +104 0x2000 //RX_FDDRC_SLANT_0_2 +105 0x2000 //RX_FDDRC_SLANT_0_3 +106 0x5333 //RX_FDDRC_SLANT_1_0 +107 0x5333 //RX_FDDRC_SLANT_1_1 +108 0x5333 //RX_FDDRC_SLANT_1_2 +109 0x5333 //RX_FDDRC_SLANT_1_3 +110 0x0000 //RX_FDDRC_RESRV_0 +129 0x0024 //RX_SPK_VOL +130 0x0000 //RX_VOL_RESRV_0 +#VOL 3 +6 0x1000 //RX_TDDRC_ALPHA_UP_1 +7 0x1000 //RX_TDDRC_ALPHA_UP_2 +8 0x1000 //RX_TDDRC_ALPHA_UP_3 +9 0x1000 //RX_TDDRC_ALPHA_UP_4 +27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +33 0x7000 //RX_TDDRC_LIMITER_THRD +34 0x0800 //RX_TDDRC_LIMITER_GAIN +112 0x0000 //RX_TDDRC_THRD_0 +113 0x0000 //RX_TDDRC_THRD_1 +114 0x1800 //RX_TDDRC_THRD_2 +115 0x1800 //RX_TDDRC_THRD_3 +116 0x3000 //RX_TDDRC_SLANT_0 +117 0x6E00 //RX_TDDRC_SLANT_1 +118 0x1000 //RX_TDDRC_ALPHA_UP_0 +119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +120 0x0000 //RX_TDDRC_HMNC_FLAG +121 0x199A //RX_TDDRC_HMNC_GAIN +122 0x0001 //RX_TDDRC_SMT_FLAG +123 0x0CCD //RX_TDDRC_SMT_W +124 0x02FD //RX_TDDRC_DRC_GAIN +38 0x0020 //RX_FDEQ_SUBNUM +39 0x4E4E //RX_FDEQ_GAIN_0 +40 0x4E56 //RX_FDEQ_GAIN_1 +41 0x6878 //RX_FDEQ_GAIN_2 +42 0x8088 //RX_FDEQ_GAIN_3 +43 0x848B //RX_FDEQ_GAIN_4 +44 0x8F8E //RX_FDEQ_GAIN_5 +45 0x9494 //RX_FDEQ_GAIN_6 +46 0x96A0 //RX_FDEQ_GAIN_7 +47 0xB8A0 //RX_FDEQ_GAIN_8 +48 0xA99D //RX_FDEQ_GAIN_9 +49 0x9D6A //RX_FDEQ_GAIN_10 +50 0x626B //RX_FDEQ_GAIN_11 +51 0x6C78 //RX_FDEQ_GAIN_12 +52 0x7884 //RX_FDEQ_GAIN_13 +53 0x9098 //RX_FDEQ_GAIN_14 +54 0x9CAC //RX_FDEQ_GAIN_15 +55 0x4848 //RX_FDEQ_GAIN_16 +56 0x4848 //RX_FDEQ_GAIN_17 +57 0x4848 //RX_FDEQ_GAIN_18 +58 0x4848 //RX_FDEQ_GAIN_19 +59 0x4848 //RX_FDEQ_GAIN_20 +60 0x4848 //RX_FDEQ_GAIN_21 +61 0x4848 //RX_FDEQ_GAIN_22 +62 0x4848 //RX_FDEQ_GAIN_23 +63 0x0202 //RX_FDEQ_BIN_0 +64 0x0202 //RX_FDEQ_BIN_1 +65 0x0302 //RX_FDEQ_BIN_2 +66 0x0304 //RX_FDEQ_BIN_3 +67 0x0405 //RX_FDEQ_BIN_4 +68 0x0506 //RX_FDEQ_BIN_5 +69 0x0708 //RX_FDEQ_BIN_6 +70 0x090A //RX_FDEQ_BIN_7 +71 0x0B0C //RX_FDEQ_BIN_8 +72 0x0D0E //RX_FDEQ_BIN_9 +73 0x1013 //RX_FDEQ_BIN_10 +74 0x1719 //RX_FDEQ_BIN_11 +75 0x1B1E //RX_FDEQ_BIN_12 +76 0x1E1E //RX_FDEQ_BIN_13 +77 0x1E28 //RX_FDEQ_BIN_14 +78 0x282C //RX_FDEQ_BIN_15 +79 0x0000 //RX_FDEQ_BIN_16 +80 0x0000 //RX_FDEQ_BIN_17 +81 0x0000 //RX_FDEQ_BIN_18 +82 0x0000 //RX_FDEQ_BIN_19 +83 0x0000 //RX_FDEQ_BIN_20 +84 0x0000 //RX_FDEQ_BIN_21 +85 0x0000 //RX_FDEQ_BIN_22 +86 0x0000 //RX_FDEQ_BIN_23 +87 0x4000 //RX_FDEQ_RESRV_0 +88 0x0320 //RX_FDEQ_RESRV_1 +89 0x0018 //RX_FDDRC_BAND_MARGIN_0 +90 0x0030 //RX_FDDRC_BAND_MARGIN_1 +91 0x0050 //RX_FDDRC_BAND_MARGIN_2 +92 0x0080 //RX_FDDRC_BAND_MARGIN_3 +93 0x0007 //RX_FDDRC_BLOCK_EXP +94 0x5000 //RX_FDDRC_THRD_2_0 +95 0x5000 //RX_FDDRC_THRD_2_1 +96 0x5000 //RX_FDDRC_THRD_2_2 +97 0x5000 //RX_FDDRC_THRD_2_3 +98 0x6400 //RX_FDDRC_THRD_3_0 +99 0x6400 //RX_FDDRC_THRD_3_1 +100 0x6400 //RX_FDDRC_THRD_3_2 +101 0x6400 //RX_FDDRC_THRD_3_3 +102 0x2000 //RX_FDDRC_SLANT_0_0 +103 0x2000 //RX_FDDRC_SLANT_0_1 +104 0x2000 //RX_FDDRC_SLANT_0_2 +105 0x2000 //RX_FDDRC_SLANT_0_3 +106 0x5333 //RX_FDDRC_SLANT_1_0 +107 0x5333 //RX_FDDRC_SLANT_1_1 +108 0x5333 //RX_FDDRC_SLANT_1_2 +109 0x5333 //RX_FDDRC_SLANT_1_3 +110 0x0000 //RX_FDDRC_RESRV_0 +129 0x003A //RX_SPK_VOL +130 0x0000 //RX_VOL_RESRV_0 +#VOL 4 +6 0x1000 //RX_TDDRC_ALPHA_UP_1 +7 0x1000 //RX_TDDRC_ALPHA_UP_2 +8 0x1000 //RX_TDDRC_ALPHA_UP_3 +9 0x1000 //RX_TDDRC_ALPHA_UP_4 +27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +33 0x7000 //RX_TDDRC_LIMITER_THRD +34 0x0800 //RX_TDDRC_LIMITER_GAIN +112 0x0000 //RX_TDDRC_THRD_0 +113 0x0000 //RX_TDDRC_THRD_1 +114 0x1800 //RX_TDDRC_THRD_2 +115 0x1800 //RX_TDDRC_THRD_3 +116 0x3000 //RX_TDDRC_SLANT_0 +117 0x6E00 //RX_TDDRC_SLANT_1 +118 0x1000 //RX_TDDRC_ALPHA_UP_0 +119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +120 0x0000 //RX_TDDRC_HMNC_FLAG +121 0x199A //RX_TDDRC_HMNC_GAIN +122 0x0001 //RX_TDDRC_SMT_FLAG +123 0x0CCD //RX_TDDRC_SMT_W +124 0x02FD //RX_TDDRC_DRC_GAIN +38 0x0020 //RX_FDEQ_SUBNUM +39 0x4E4E //RX_FDEQ_GAIN_0 +40 0x4E56 //RX_FDEQ_GAIN_1 +41 0x6878 //RX_FDEQ_GAIN_2 +42 0x8088 //RX_FDEQ_GAIN_3 +43 0x848B //RX_FDEQ_GAIN_4 +44 0x8F8E //RX_FDEQ_GAIN_5 +45 0x9494 //RX_FDEQ_GAIN_6 +46 0x96A0 //RX_FDEQ_GAIN_7 +47 0xB8A0 //RX_FDEQ_GAIN_8 +48 0xA99D //RX_FDEQ_GAIN_9 +49 0x9D6A //RX_FDEQ_GAIN_10 +50 0x626B //RX_FDEQ_GAIN_11 +51 0x6C78 //RX_FDEQ_GAIN_12 +52 0x7884 //RX_FDEQ_GAIN_13 +53 0x9098 //RX_FDEQ_GAIN_14 +54 0x9CAC //RX_FDEQ_GAIN_15 +55 0x4848 //RX_FDEQ_GAIN_16 +56 0x4848 //RX_FDEQ_GAIN_17 +57 0x4848 //RX_FDEQ_GAIN_18 +58 0x4848 //RX_FDEQ_GAIN_19 +59 0x4848 //RX_FDEQ_GAIN_20 +60 0x4848 //RX_FDEQ_GAIN_21 +61 0x4848 //RX_FDEQ_GAIN_22 +62 0x4848 //RX_FDEQ_GAIN_23 +63 0x0202 //RX_FDEQ_BIN_0 +64 0x0202 //RX_FDEQ_BIN_1 +65 0x0302 //RX_FDEQ_BIN_2 +66 0x0304 //RX_FDEQ_BIN_3 +67 0x0405 //RX_FDEQ_BIN_4 +68 0x0506 //RX_FDEQ_BIN_5 +69 0x0708 //RX_FDEQ_BIN_6 +70 0x090A //RX_FDEQ_BIN_7 +71 0x0B0C //RX_FDEQ_BIN_8 +72 0x0D0E //RX_FDEQ_BIN_9 +73 0x1013 //RX_FDEQ_BIN_10 +74 0x1719 //RX_FDEQ_BIN_11 +75 0x1B1E //RX_FDEQ_BIN_12 +76 0x1E1E //RX_FDEQ_BIN_13 +77 0x1E28 //RX_FDEQ_BIN_14 +78 0x282C //RX_FDEQ_BIN_15 +79 0x0000 //RX_FDEQ_BIN_16 +80 0x0000 //RX_FDEQ_BIN_17 +81 0x0000 //RX_FDEQ_BIN_18 +82 0x0000 //RX_FDEQ_BIN_19 +83 0x0000 //RX_FDEQ_BIN_20 +84 0x0000 //RX_FDEQ_BIN_21 +85 0x0000 //RX_FDEQ_BIN_22 +86 0x0000 //RX_FDEQ_BIN_23 +87 0x4000 //RX_FDEQ_RESRV_0 +88 0x0320 //RX_FDEQ_RESRV_1 +89 0x0018 //RX_FDDRC_BAND_MARGIN_0 +90 0x0030 //RX_FDDRC_BAND_MARGIN_1 +91 0x0050 //RX_FDDRC_BAND_MARGIN_2 +92 0x0080 //RX_FDDRC_BAND_MARGIN_3 +93 0x0007 //RX_FDDRC_BLOCK_EXP +94 0x5000 //RX_FDDRC_THRD_2_0 +95 0x5000 //RX_FDDRC_THRD_2_1 +96 0x5000 //RX_FDDRC_THRD_2_2 +97 0x5000 //RX_FDDRC_THRD_2_3 +98 0x6400 //RX_FDDRC_THRD_3_0 +99 0x6400 //RX_FDDRC_THRD_3_1 +100 0x6400 //RX_FDDRC_THRD_3_2 +101 0x6400 //RX_FDDRC_THRD_3_3 +102 0x2000 //RX_FDDRC_SLANT_0_0 +103 0x2000 //RX_FDDRC_SLANT_0_1 +104 0x2000 //RX_FDDRC_SLANT_0_2 +105 0x2000 //RX_FDDRC_SLANT_0_3 +106 0x5333 //RX_FDDRC_SLANT_1_0 +107 0x5333 //RX_FDDRC_SLANT_1_1 +108 0x5333 //RX_FDDRC_SLANT_1_2 +109 0x5333 //RX_FDDRC_SLANT_1_3 +110 0x0000 //RX_FDDRC_RESRV_0 +129 0x0059 //RX_SPK_VOL +130 0x0000 //RX_VOL_RESRV_0 +#VOL 5 +6 0x1000 //RX_TDDRC_ALPHA_UP_1 +7 0x1000 //RX_TDDRC_ALPHA_UP_2 +8 0x1000 //RX_TDDRC_ALPHA_UP_3 +9 0x1000 //RX_TDDRC_ALPHA_UP_4 +27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +33 0x7000 //RX_TDDRC_LIMITER_THRD +34 0x0800 //RX_TDDRC_LIMITER_GAIN +112 0x0000 //RX_TDDRC_THRD_0 +113 0x0000 //RX_TDDRC_THRD_1 +114 0x1800 //RX_TDDRC_THRD_2 +115 0x1800 //RX_TDDRC_THRD_3 +116 0x3000 //RX_TDDRC_SLANT_0 +117 0x6E00 //RX_TDDRC_SLANT_1 +118 0x1000 //RX_TDDRC_ALPHA_UP_0 +119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +120 0x0000 //RX_TDDRC_HMNC_FLAG +121 0x199A //RX_TDDRC_HMNC_GAIN +122 0x0001 //RX_TDDRC_SMT_FLAG +123 0x0CCD //RX_TDDRC_SMT_W +124 0x02FD //RX_TDDRC_DRC_GAIN +38 0x0020 //RX_FDEQ_SUBNUM +39 0x4E4E //RX_FDEQ_GAIN_0 +40 0x4E56 //RX_FDEQ_GAIN_1 +41 0x6878 //RX_FDEQ_GAIN_2 +42 0x8088 //RX_FDEQ_GAIN_3 +43 0x848B //RX_FDEQ_GAIN_4 +44 0x8F8E //RX_FDEQ_GAIN_5 +45 0x9494 //RX_FDEQ_GAIN_6 +46 0x96A0 //RX_FDEQ_GAIN_7 +47 0xB8A0 //RX_FDEQ_GAIN_8 +48 0xA99D //RX_FDEQ_GAIN_9 +49 0x9D6A //RX_FDEQ_GAIN_10 +50 0x626B //RX_FDEQ_GAIN_11 +51 0x6C78 //RX_FDEQ_GAIN_12 +52 0x7884 //RX_FDEQ_GAIN_13 +53 0x9098 //RX_FDEQ_GAIN_14 +54 0x9CAC //RX_FDEQ_GAIN_15 +55 0x4848 //RX_FDEQ_GAIN_16 +56 0x4848 //RX_FDEQ_GAIN_17 +57 0x4848 //RX_FDEQ_GAIN_18 +58 0x4848 //RX_FDEQ_GAIN_19 +59 0x4848 //RX_FDEQ_GAIN_20 +60 0x4848 //RX_FDEQ_GAIN_21 +61 0x4848 //RX_FDEQ_GAIN_22 +62 0x4848 //RX_FDEQ_GAIN_23 +63 0x0202 //RX_FDEQ_BIN_0 +64 0x0202 //RX_FDEQ_BIN_1 +65 0x0302 //RX_FDEQ_BIN_2 +66 0x0304 //RX_FDEQ_BIN_3 +67 0x0405 //RX_FDEQ_BIN_4 +68 0x0506 //RX_FDEQ_BIN_5 +69 0x0708 //RX_FDEQ_BIN_6 +70 0x090A //RX_FDEQ_BIN_7 +71 0x0B0C //RX_FDEQ_BIN_8 +72 0x0D0E //RX_FDEQ_BIN_9 +73 0x1013 //RX_FDEQ_BIN_10 +74 0x1719 //RX_FDEQ_BIN_11 +75 0x1B1E //RX_FDEQ_BIN_12 +76 0x1E1E //RX_FDEQ_BIN_13 +77 0x1E28 //RX_FDEQ_BIN_14 +78 0x282C //RX_FDEQ_BIN_15 +79 0x0000 //RX_FDEQ_BIN_16 +80 0x0000 //RX_FDEQ_BIN_17 +81 0x0000 //RX_FDEQ_BIN_18 +82 0x0000 //RX_FDEQ_BIN_19 +83 0x0000 //RX_FDEQ_BIN_20 +84 0x0000 //RX_FDEQ_BIN_21 +85 0x0000 //RX_FDEQ_BIN_22 +86 0x0000 //RX_FDEQ_BIN_23 +87 0x4000 //RX_FDEQ_RESRV_0 +88 0x0320 //RX_FDEQ_RESRV_1 +89 0x0018 //RX_FDDRC_BAND_MARGIN_0 +90 0x0030 //RX_FDDRC_BAND_MARGIN_1 +91 0x0050 //RX_FDDRC_BAND_MARGIN_2 +92 0x0080 //RX_FDDRC_BAND_MARGIN_3 +93 0x0007 //RX_FDDRC_BLOCK_EXP +94 0x5000 //RX_FDDRC_THRD_2_0 +95 0x5000 //RX_FDDRC_THRD_2_1 +96 0x5000 //RX_FDDRC_THRD_2_2 +97 0x5000 //RX_FDDRC_THRD_2_3 +98 0x6400 //RX_FDDRC_THRD_3_0 +99 0x6400 //RX_FDDRC_THRD_3_1 +100 0x6400 //RX_FDDRC_THRD_3_2 +101 0x6400 //RX_FDDRC_THRD_3_3 +102 0x2000 //RX_FDDRC_SLANT_0_0 +103 0x2000 //RX_FDDRC_SLANT_0_1 +104 0x2000 //RX_FDDRC_SLANT_0_2 +105 0x2000 //RX_FDDRC_SLANT_0_3 +106 0x5333 //RX_FDDRC_SLANT_1_0 +107 0x5333 //RX_FDDRC_SLANT_1_1 +108 0x5333 //RX_FDDRC_SLANT_1_2 +109 0x5333 //RX_FDDRC_SLANT_1_3 +110 0x0000 //RX_FDDRC_RESRV_0 +129 0x0090 //RX_SPK_VOL +130 0x0000 //RX_VOL_RESRV_0 +#VOL 6 +6 0x1000 //RX_TDDRC_ALPHA_UP_1 +7 0x1000 //RX_TDDRC_ALPHA_UP_2 +8 0x1000 //RX_TDDRC_ALPHA_UP_3 +9 0x1000 //RX_TDDRC_ALPHA_UP_4 +27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +33 0x7000 //RX_TDDRC_LIMITER_THRD +34 0x0800 //RX_TDDRC_LIMITER_GAIN +112 0x0000 //RX_TDDRC_THRD_0 +113 0x0000 //RX_TDDRC_THRD_1 +114 0x1800 //RX_TDDRC_THRD_2 +115 0x1800 //RX_TDDRC_THRD_3 +116 0x3000 //RX_TDDRC_SLANT_0 +117 0x6E00 //RX_TDDRC_SLANT_1 +118 0x1000 //RX_TDDRC_ALPHA_UP_0 +119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +120 0x0000 //RX_TDDRC_HMNC_FLAG +121 0x199A //RX_TDDRC_HMNC_GAIN +122 0x0001 //RX_TDDRC_SMT_FLAG +123 0x0CCD //RX_TDDRC_SMT_W +124 0x02FD //RX_TDDRC_DRC_GAIN +38 0x0020 //RX_FDEQ_SUBNUM +39 0x4E4E //RX_FDEQ_GAIN_0 +40 0x4E56 //RX_FDEQ_GAIN_1 +41 0x6878 //RX_FDEQ_GAIN_2 +42 0x8088 //RX_FDEQ_GAIN_3 +43 0x848B //RX_FDEQ_GAIN_4 +44 0x8F8E //RX_FDEQ_GAIN_5 +45 0x9494 //RX_FDEQ_GAIN_6 +46 0x96A0 //RX_FDEQ_GAIN_7 +47 0xB8A0 //RX_FDEQ_GAIN_8 +48 0xA99D //RX_FDEQ_GAIN_9 +49 0x9D6A //RX_FDEQ_GAIN_10 +50 0x626B //RX_FDEQ_GAIN_11 +51 0x6C78 //RX_FDEQ_GAIN_12 +52 0x7884 //RX_FDEQ_GAIN_13 +53 0x9098 //RX_FDEQ_GAIN_14 +54 0x9CAC //RX_FDEQ_GAIN_15 +55 0x4848 //RX_FDEQ_GAIN_16 +56 0x4848 //RX_FDEQ_GAIN_17 +57 0x4848 //RX_FDEQ_GAIN_18 +58 0x4848 //RX_FDEQ_GAIN_19 +59 0x4848 //RX_FDEQ_GAIN_20 +60 0x4848 //RX_FDEQ_GAIN_21 +61 0x4848 //RX_FDEQ_GAIN_22 +62 0x4848 //RX_FDEQ_GAIN_23 +63 0x0202 //RX_FDEQ_BIN_0 +64 0x0202 //RX_FDEQ_BIN_1 +65 0x0302 //RX_FDEQ_BIN_2 +66 0x0304 //RX_FDEQ_BIN_3 +67 0x0405 //RX_FDEQ_BIN_4 +68 0x0506 //RX_FDEQ_BIN_5 +69 0x0708 //RX_FDEQ_BIN_6 +70 0x090A //RX_FDEQ_BIN_7 +71 0x0B0C //RX_FDEQ_BIN_8 +72 0x0D0E //RX_FDEQ_BIN_9 +73 0x1013 //RX_FDEQ_BIN_10 +74 0x1719 //RX_FDEQ_BIN_11 +75 0x1B1E //RX_FDEQ_BIN_12 +76 0x1E1E //RX_FDEQ_BIN_13 +77 0x1E28 //RX_FDEQ_BIN_14 +78 0x282C //RX_FDEQ_BIN_15 +79 0x0000 //RX_FDEQ_BIN_16 +80 0x0000 //RX_FDEQ_BIN_17 +81 0x0000 //RX_FDEQ_BIN_18 +82 0x0000 //RX_FDEQ_BIN_19 +83 0x0000 //RX_FDEQ_BIN_20 +84 0x0000 //RX_FDEQ_BIN_21 +85 0x0000 //RX_FDEQ_BIN_22 +86 0x0000 //RX_FDEQ_BIN_23 +87 0x4000 //RX_FDEQ_RESRV_0 +88 0x0320 //RX_FDEQ_RESRV_1 +89 0x0018 //RX_FDDRC_BAND_MARGIN_0 +90 0x0030 //RX_FDDRC_BAND_MARGIN_1 +91 0x0050 //RX_FDDRC_BAND_MARGIN_2 +92 0x0080 //RX_FDDRC_BAND_MARGIN_3 +93 0x0007 //RX_FDDRC_BLOCK_EXP +94 0x5000 //RX_FDDRC_THRD_2_0 +95 0x5000 //RX_FDDRC_THRD_2_1 +96 0x5000 //RX_FDDRC_THRD_2_2 +97 0x5000 //RX_FDDRC_THRD_2_3 +98 0x6400 //RX_FDDRC_THRD_3_0 +99 0x6400 //RX_FDDRC_THRD_3_1 +100 0x6400 //RX_FDDRC_THRD_3_2 +101 0x6400 //RX_FDDRC_THRD_3_3 +102 0x2000 //RX_FDDRC_SLANT_0_0 +103 0x2000 //RX_FDDRC_SLANT_0_1 +104 0x2000 //RX_FDDRC_SLANT_0_2 +105 0x2000 //RX_FDDRC_SLANT_0_3 +106 0x5333 //RX_FDDRC_SLANT_1_0 +107 0x5333 //RX_FDDRC_SLANT_1_1 +108 0x5333 //RX_FDDRC_SLANT_1_2 +109 0x5333 //RX_FDDRC_SLANT_1_3 +110 0x0000 //RX_FDDRC_RESRV_0 +129 0x0100 //RX_SPK_VOL +130 0x0000 //RX_VOL_RESRV_0 +#RX 2 +157 0x002C //RX_RECVFUNC_MODE_0 +158 0x0000 //RX_RECVFUNC_MODE_1 +159 0x0004 //RX_SAMPLINGFREQ_SIG +160 0x0004 //RX_SAMPLINGFREQ_PROC +161 0x000A //RX_FRAME_SZ +162 0x0000 //RX_DELAY_OPT +163 0x1000 //RX_TDDRC_ALPHA_UP_1 +164 0x1000 //RX_TDDRC_ALPHA_UP_2 +165 0x1000 //RX_TDDRC_ALPHA_UP_3 +166 0x1000 //RX_TDDRC_ALPHA_UP_4 +167 0x0722 //RX_PGA +168 0x7FFF //RX_A_HP +169 0x4000 //RX_B_PE +170 0x5800 //RX_THR_PITCH_DET_0 +171 0x5000 //RX_THR_PITCH_DET_1 +172 0x4000 //RX_THR_PITCH_DET_2 +173 0x0008 //RX_PITCH_BFR_LEN +174 0x0003 //RX_SBD_PITCH_DET +175 0x0100 //RX_PP_RESRV_0 +176 0x0020 //RX_PP_RESRV_1 +177 0x0600 //RX_N_SN_EST +178 0x000C //RX_N2_SN_EST +179 0x000F //RX_NS_LVL_CTRL +180 0xF800 //RX_THR_SN_EST +181 0x7E00 //RX_LAMBDA_PFILT +182 0x000A //RX_FENS_RESRV_0 +183 0x0190 //RX_FENS_RESRV_1 +184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +187 0x0002 //RX_EXTRA_NS_L +188 0x0800 //RX_EXTRA_NS_A +189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +190 0x7000 //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +192 0x199A //RX_A_POST_FLT +193 0x0000 //RX_LMT_THRD +194 0x4000 //RX_LMT_ALPHA +195 0x0020 //RX_FDEQ_SUBNUM +196 0x4E4E //RX_FDEQ_GAIN_0 +197 0x4E56 //RX_FDEQ_GAIN_1 +198 0x6878 //RX_FDEQ_GAIN_2 +199 0x8088 //RX_FDEQ_GAIN_3 +200 0x848B //RX_FDEQ_GAIN_4 +201 0x8F8E //RX_FDEQ_GAIN_5 +202 0x9494 //RX_FDEQ_GAIN_6 +203 0x96A0 //RX_FDEQ_GAIN_7 +204 0xB8A0 //RX_FDEQ_GAIN_8 +205 0xA99D //RX_FDEQ_GAIN_9 +206 0x9D6A //RX_FDEQ_GAIN_10 +207 0x626B //RX_FDEQ_GAIN_11 +208 0x6C78 //RX_FDEQ_GAIN_12 +209 0x7884 //RX_FDEQ_GAIN_13 +210 0x9098 //RX_FDEQ_GAIN_14 +211 0x9CAC //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0202 //RX_FDEQ_BIN_0 +221 0x0202 //RX_FDEQ_BIN_1 +222 0x0302 //RX_FDEQ_BIN_2 +223 0x0304 //RX_FDEQ_BIN_3 +224 0x0405 //RX_FDEQ_BIN_4 +225 0x0506 //RX_FDEQ_BIN_5 +226 0x0708 //RX_FDEQ_BIN_6 +227 0x090A //RX_FDEQ_BIN_7 +228 0x0B0C //RX_FDEQ_BIN_8 +229 0x0D0E //RX_FDEQ_BIN_9 +230 0x1013 //RX_FDEQ_BIN_10 +231 0x1719 //RX_FDEQ_BIN_11 +232 0x1B1E //RX_FDEQ_BIN_12 +233 0x1E1E //RX_FDEQ_BIN_13 +234 0x1E28 //RX_FDEQ_BIN_14 +235 0x282C //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x4000 //RX_FDEQ_RESRV_0 +245 0x0320 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0030 //RX_FDDRC_BAND_MARGIN_1 +248 0x0050 //RX_FDDRC_BAND_MARGIN_2 +249 0x0080 //RX_FDDRC_BAND_MARGIN_3 +250 0x0007 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x5000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x6400 //RX_FDDRC_THRD_3_2 +258 0x6400 //RX_FDDRC_THRD_3_3 +259 0x2000 //RX_FDDRC_SLANT_0_0 +260 0x2000 //RX_FDDRC_SLANT_0_1 +261 0x2000 //RX_FDDRC_SLANT_0_2 +262 0x2000 //RX_FDDRC_SLANT_0_3 +263 0x5333 //RX_FDDRC_SLANT_1_0 +264 0x5333 //RX_FDDRC_SLANT_1_1 +265 0x5333 //RX_FDDRC_SLANT_1_2 +266 0x5333 //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +268 0x0002 //RX_FILTINDX +269 0x0000 //RX_TDDRC_THRD_0 +270 0x0000 //RX_TDDRC_THRD_1 +271 0x1800 //RX_TDDRC_THRD_2 +272 0x1800 //RX_TDDRC_THRD_3 +273 0x3000 //RX_TDDRC_SLANT_0 +274 0x6E00 //RX_TDDRC_SLANT_1 +275 0x1000 //RX_TDDRC_ALPHA_UP_0 +276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x199A //RX_TDDRC_HMNC_GAIN +279 0x0001 //RX_TDDRC_SMT_FLAG +280 0x0CCD //RX_TDDRC_SMT_W +281 0x02FD //RX_TDDRC_DRC_GAIN +282 0x7C00 //RX_LAMBDA_PKA_FP +283 0x1964 //RX_TPKA_FP +284 0x0080 //RX_MIN_G_FP +285 0x2000 //RX_MAX_G_FP +286 0x000D //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 +288 0x0000 //RX_MAXLEVEL_CNG +289 0x3000 //RX_BWE_UV_TH +290 0x3000 //RX_BWE_UV_TH2 +291 0x1800 //RX_BWE_UV_TH3 +292 0x1000 //RX_BWE_V_TH +293 0x04CD //RX_BWE_GAIN1_V_TH1 +294 0x0F33 //RX_BWE_GAIN1_V_TH2 +295 0x7333 //RX_BWE_UV_EQ +296 0x199A //RX_BWE_V_EQ +297 0x7333 //RX_BWE_TONE_TH +298 0x0004 //RX_BWE_UV_HOLD_T +299 0x6CCD //RX_BWE_GAIN2_ALPHA +300 0x799A //RX_BWE_GAIN3_ALPHA +301 0x001E //RX_BWE_CUTOFF +302 0x3000 //RX_BWE_GAINFILL +303 0x3200 //RX_BWE_MAXTH_TONE +304 0x2000 //RX_BWE_EQ_0 +305 0x2000 //RX_BWE_EQ_1 +306 0x2000 //RX_BWE_EQ_2 +307 0x2000 //RX_BWE_EQ_3 +308 0x2000 //RX_BWE_EQ_4 +309 0x2000 //RX_BWE_EQ_5 +310 0x2000 //RX_BWE_EQ_6 +311 0x0000 //RX_BWE_RESRV_0 +312 0x0000 //RX_BWE_RESRV_1 +313 0x0000 //RX_BWE_RESRV_2 +#VOL 0 +163 0x1000 //RX_TDDRC_ALPHA_UP_1 +164 0x1000 //RX_TDDRC_ALPHA_UP_2 +165 0x1000 //RX_TDDRC_ALPHA_UP_3 +166 0x1000 //RX_TDDRC_ALPHA_UP_4 +184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +190 0x7000 //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +269 0x0000 //RX_TDDRC_THRD_0 +270 0x0000 //RX_TDDRC_THRD_1 +271 0x1800 //RX_TDDRC_THRD_2 +272 0x1800 //RX_TDDRC_THRD_3 +273 0x3000 //RX_TDDRC_SLANT_0 +274 0x6E00 //RX_TDDRC_SLANT_1 +275 0x1000 //RX_TDDRC_ALPHA_UP_0 +276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x199A //RX_TDDRC_HMNC_GAIN +279 0x0001 //RX_TDDRC_SMT_FLAG +280 0x0CCD //RX_TDDRC_SMT_W +281 0x02FD //RX_TDDRC_DRC_GAIN +195 0x0020 //RX_FDEQ_SUBNUM +196 0x4E4E //RX_FDEQ_GAIN_0 +197 0x4E56 //RX_FDEQ_GAIN_1 +198 0x6878 //RX_FDEQ_GAIN_2 +199 0x8088 //RX_FDEQ_GAIN_3 +200 0x848B //RX_FDEQ_GAIN_4 +201 0x8F8E //RX_FDEQ_GAIN_5 +202 0x9494 //RX_FDEQ_GAIN_6 +203 0x96A0 //RX_FDEQ_GAIN_7 +204 0xB8A0 //RX_FDEQ_GAIN_8 +205 0xA99D //RX_FDEQ_GAIN_9 +206 0x9D6A //RX_FDEQ_GAIN_10 +207 0x626B //RX_FDEQ_GAIN_11 +208 0x6C78 //RX_FDEQ_GAIN_12 +209 0x7884 //RX_FDEQ_GAIN_13 +210 0x9098 //RX_FDEQ_GAIN_14 +211 0x9CAC //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0202 //RX_FDEQ_BIN_0 +221 0x0202 //RX_FDEQ_BIN_1 +222 0x0302 //RX_FDEQ_BIN_2 +223 0x0304 //RX_FDEQ_BIN_3 +224 0x0405 //RX_FDEQ_BIN_4 +225 0x0506 //RX_FDEQ_BIN_5 +226 0x0708 //RX_FDEQ_BIN_6 +227 0x090A //RX_FDEQ_BIN_7 +228 0x0B0C //RX_FDEQ_BIN_8 +229 0x0D0E //RX_FDEQ_BIN_9 +230 0x1013 //RX_FDEQ_BIN_10 +231 0x1719 //RX_FDEQ_BIN_11 +232 0x1B1E //RX_FDEQ_BIN_12 +233 0x1E1E //RX_FDEQ_BIN_13 +234 0x1E28 //RX_FDEQ_BIN_14 +235 0x282C //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x4000 //RX_FDEQ_RESRV_0 +245 0x0320 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0030 //RX_FDDRC_BAND_MARGIN_1 +248 0x0050 //RX_FDDRC_BAND_MARGIN_2 +249 0x0080 //RX_FDDRC_BAND_MARGIN_3 +250 0x0007 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x5000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x6400 //RX_FDDRC_THRD_3_2 +258 0x6400 //RX_FDDRC_THRD_3_3 +259 0x2000 //RX_FDDRC_SLANT_0_0 +260 0x2000 //RX_FDDRC_SLANT_0_1 +261 0x2000 //RX_FDDRC_SLANT_0_2 +262 0x2000 //RX_FDDRC_SLANT_0_3 +263 0x5333 //RX_FDDRC_SLANT_1_0 +264 0x5333 //RX_FDDRC_SLANT_1_1 +265 0x5333 //RX_FDDRC_SLANT_1_2 +266 0x5333 //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +286 0x000D //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 +#VOL 1 +163 0x1000 //RX_TDDRC_ALPHA_UP_1 +164 0x1000 //RX_TDDRC_ALPHA_UP_2 +165 0x1000 //RX_TDDRC_ALPHA_UP_3 +166 0x1000 //RX_TDDRC_ALPHA_UP_4 +184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +190 0x7000 //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +269 0x0000 //RX_TDDRC_THRD_0 +270 0x0000 //RX_TDDRC_THRD_1 +271 0x1800 //RX_TDDRC_THRD_2 +272 0x1800 //RX_TDDRC_THRD_3 +273 0x3000 //RX_TDDRC_SLANT_0 +274 0x6E00 //RX_TDDRC_SLANT_1 +275 0x1000 //RX_TDDRC_ALPHA_UP_0 +276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x199A //RX_TDDRC_HMNC_GAIN +279 0x0001 //RX_TDDRC_SMT_FLAG +280 0x0CCD //RX_TDDRC_SMT_W +281 0x02FD //RX_TDDRC_DRC_GAIN +195 0x0020 //RX_FDEQ_SUBNUM +196 0x4E4E //RX_FDEQ_GAIN_0 +197 0x4E56 //RX_FDEQ_GAIN_1 +198 0x6878 //RX_FDEQ_GAIN_2 +199 0x8088 //RX_FDEQ_GAIN_3 +200 0x848B //RX_FDEQ_GAIN_4 +201 0x8F8E //RX_FDEQ_GAIN_5 +202 0x9494 //RX_FDEQ_GAIN_6 +203 0x96A0 //RX_FDEQ_GAIN_7 +204 0xB8A0 //RX_FDEQ_GAIN_8 +205 0xA99D //RX_FDEQ_GAIN_9 +206 0x9D6A //RX_FDEQ_GAIN_10 +207 0x626B //RX_FDEQ_GAIN_11 +208 0x6C78 //RX_FDEQ_GAIN_12 +209 0x7884 //RX_FDEQ_GAIN_13 +210 0x9098 //RX_FDEQ_GAIN_14 +211 0x9CAC //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0202 //RX_FDEQ_BIN_0 +221 0x0202 //RX_FDEQ_BIN_1 +222 0x0302 //RX_FDEQ_BIN_2 +223 0x0304 //RX_FDEQ_BIN_3 +224 0x0405 //RX_FDEQ_BIN_4 +225 0x0506 //RX_FDEQ_BIN_5 +226 0x0708 //RX_FDEQ_BIN_6 +227 0x090A //RX_FDEQ_BIN_7 +228 0x0B0C //RX_FDEQ_BIN_8 +229 0x0D0E //RX_FDEQ_BIN_9 +230 0x1013 //RX_FDEQ_BIN_10 +231 0x1719 //RX_FDEQ_BIN_11 +232 0x1B1E //RX_FDEQ_BIN_12 +233 0x1E1E //RX_FDEQ_BIN_13 +234 0x1E28 //RX_FDEQ_BIN_14 +235 0x282C //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x4000 //RX_FDEQ_RESRV_0 +245 0x0320 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0030 //RX_FDDRC_BAND_MARGIN_1 +248 0x0050 //RX_FDDRC_BAND_MARGIN_2 +249 0x0080 //RX_FDDRC_BAND_MARGIN_3 +250 0x0007 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x5000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x6400 //RX_FDDRC_THRD_3_2 +258 0x6400 //RX_FDDRC_THRD_3_3 +259 0x2000 //RX_FDDRC_SLANT_0_0 +260 0x2000 //RX_FDDRC_SLANT_0_1 +261 0x2000 //RX_FDDRC_SLANT_0_2 +262 0x2000 //RX_FDDRC_SLANT_0_3 +263 0x5333 //RX_FDDRC_SLANT_1_0 +264 0x5333 //RX_FDDRC_SLANT_1_1 +265 0x5333 //RX_FDDRC_SLANT_1_2 +266 0x5333 //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +286 0x0016 //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 +#VOL 2 +163 0x1000 //RX_TDDRC_ALPHA_UP_1 +164 0x1000 //RX_TDDRC_ALPHA_UP_2 +165 0x1000 //RX_TDDRC_ALPHA_UP_3 +166 0x1000 //RX_TDDRC_ALPHA_UP_4 +184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +190 0x7000 //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +269 0x0000 //RX_TDDRC_THRD_0 +270 0x0000 //RX_TDDRC_THRD_1 +271 0x1800 //RX_TDDRC_THRD_2 +272 0x1800 //RX_TDDRC_THRD_3 +273 0x3000 //RX_TDDRC_SLANT_0 +274 0x6E00 //RX_TDDRC_SLANT_1 +275 0x1000 //RX_TDDRC_ALPHA_UP_0 +276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x199A //RX_TDDRC_HMNC_GAIN +279 0x0001 //RX_TDDRC_SMT_FLAG +280 0x0CCD //RX_TDDRC_SMT_W +281 0x02FD //RX_TDDRC_DRC_GAIN +195 0x0020 //RX_FDEQ_SUBNUM +196 0x4E4E //RX_FDEQ_GAIN_0 +197 0x4E56 //RX_FDEQ_GAIN_1 +198 0x6878 //RX_FDEQ_GAIN_2 +199 0x8088 //RX_FDEQ_GAIN_3 +200 0x848B //RX_FDEQ_GAIN_4 +201 0x8F8E //RX_FDEQ_GAIN_5 +202 0x9494 //RX_FDEQ_GAIN_6 +203 0x96A0 //RX_FDEQ_GAIN_7 +204 0xB8A0 //RX_FDEQ_GAIN_8 +205 0xA99D //RX_FDEQ_GAIN_9 +206 0x9D6A //RX_FDEQ_GAIN_10 +207 0x626B //RX_FDEQ_GAIN_11 +208 0x6C78 //RX_FDEQ_GAIN_12 +209 0x7884 //RX_FDEQ_GAIN_13 +210 0x9098 //RX_FDEQ_GAIN_14 +211 0x9CAC //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0202 //RX_FDEQ_BIN_0 +221 0x0202 //RX_FDEQ_BIN_1 +222 0x0302 //RX_FDEQ_BIN_2 +223 0x0304 //RX_FDEQ_BIN_3 +224 0x0405 //RX_FDEQ_BIN_4 +225 0x0506 //RX_FDEQ_BIN_5 +226 0x0708 //RX_FDEQ_BIN_6 +227 0x090A //RX_FDEQ_BIN_7 +228 0x0B0C //RX_FDEQ_BIN_8 +229 0x0D0E //RX_FDEQ_BIN_9 +230 0x1013 //RX_FDEQ_BIN_10 +231 0x1719 //RX_FDEQ_BIN_11 +232 0x1B1E //RX_FDEQ_BIN_12 +233 0x1E1E //RX_FDEQ_BIN_13 +234 0x1E28 //RX_FDEQ_BIN_14 +235 0x282C //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x4000 //RX_FDEQ_RESRV_0 +245 0x0320 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0030 //RX_FDDRC_BAND_MARGIN_1 +248 0x0050 //RX_FDDRC_BAND_MARGIN_2 +249 0x0080 //RX_FDDRC_BAND_MARGIN_3 +250 0x0007 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x5000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x6400 //RX_FDDRC_THRD_3_2 +258 0x6400 //RX_FDDRC_THRD_3_3 +259 0x2000 //RX_FDDRC_SLANT_0_0 +260 0x2000 //RX_FDDRC_SLANT_0_1 +261 0x2000 //RX_FDDRC_SLANT_0_2 +262 0x2000 //RX_FDDRC_SLANT_0_3 +263 0x5333 //RX_FDDRC_SLANT_1_0 +264 0x5333 //RX_FDDRC_SLANT_1_1 +265 0x5333 //RX_FDDRC_SLANT_1_2 +266 0x5333 //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +286 0x0024 //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 +#VOL 3 +163 0x1000 //RX_TDDRC_ALPHA_UP_1 +164 0x1000 //RX_TDDRC_ALPHA_UP_2 +165 0x1000 //RX_TDDRC_ALPHA_UP_3 +166 0x1000 //RX_TDDRC_ALPHA_UP_4 +184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +190 0x7000 //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +269 0x0000 //RX_TDDRC_THRD_0 +270 0x0000 //RX_TDDRC_THRD_1 +271 0x1800 //RX_TDDRC_THRD_2 +272 0x1800 //RX_TDDRC_THRD_3 +273 0x3000 //RX_TDDRC_SLANT_0 +274 0x6E00 //RX_TDDRC_SLANT_1 +275 0x1000 //RX_TDDRC_ALPHA_UP_0 +276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x199A //RX_TDDRC_HMNC_GAIN +279 0x0001 //RX_TDDRC_SMT_FLAG +280 0x0CCD //RX_TDDRC_SMT_W +281 0x02FD //RX_TDDRC_DRC_GAIN +195 0x0020 //RX_FDEQ_SUBNUM +196 0x4E4E //RX_FDEQ_GAIN_0 +197 0x4E56 //RX_FDEQ_GAIN_1 +198 0x6878 //RX_FDEQ_GAIN_2 +199 0x8088 //RX_FDEQ_GAIN_3 +200 0x848B //RX_FDEQ_GAIN_4 +201 0x8F8E //RX_FDEQ_GAIN_5 +202 0x9494 //RX_FDEQ_GAIN_6 +203 0x96A0 //RX_FDEQ_GAIN_7 +204 0xB8A0 //RX_FDEQ_GAIN_8 +205 0xA99D //RX_FDEQ_GAIN_9 +206 0x9D6A //RX_FDEQ_GAIN_10 +207 0x626B //RX_FDEQ_GAIN_11 +208 0x6C78 //RX_FDEQ_GAIN_12 +209 0x7884 //RX_FDEQ_GAIN_13 +210 0x9098 //RX_FDEQ_GAIN_14 +211 0x9CAC //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0202 //RX_FDEQ_BIN_0 +221 0x0202 //RX_FDEQ_BIN_1 +222 0x0302 //RX_FDEQ_BIN_2 +223 0x0304 //RX_FDEQ_BIN_3 +224 0x0405 //RX_FDEQ_BIN_4 +225 0x0506 //RX_FDEQ_BIN_5 +226 0x0708 //RX_FDEQ_BIN_6 +227 0x090A //RX_FDEQ_BIN_7 +228 0x0B0C //RX_FDEQ_BIN_8 +229 0x0D0E //RX_FDEQ_BIN_9 +230 0x1013 //RX_FDEQ_BIN_10 +231 0x1719 //RX_FDEQ_BIN_11 +232 0x1B1E //RX_FDEQ_BIN_12 +233 0x1E1E //RX_FDEQ_BIN_13 +234 0x1E28 //RX_FDEQ_BIN_14 +235 0x282C //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x4000 //RX_FDEQ_RESRV_0 +245 0x0320 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0030 //RX_FDDRC_BAND_MARGIN_1 +248 0x0050 //RX_FDDRC_BAND_MARGIN_2 +249 0x0080 //RX_FDDRC_BAND_MARGIN_3 +250 0x0007 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x5000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x6400 //RX_FDDRC_THRD_3_2 +258 0x6400 //RX_FDDRC_THRD_3_3 +259 0x2000 //RX_FDDRC_SLANT_0_0 +260 0x2000 //RX_FDDRC_SLANT_0_1 +261 0x2000 //RX_FDDRC_SLANT_0_2 +262 0x2000 //RX_FDDRC_SLANT_0_3 +263 0x5333 //RX_FDDRC_SLANT_1_0 +264 0x5333 //RX_FDDRC_SLANT_1_1 +265 0x5333 //RX_FDDRC_SLANT_1_2 +266 0x5333 //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +286 0x003A //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 +#VOL 4 +163 0x1000 //RX_TDDRC_ALPHA_UP_1 +164 0x1000 //RX_TDDRC_ALPHA_UP_2 +165 0x1000 //RX_TDDRC_ALPHA_UP_3 +166 0x1000 //RX_TDDRC_ALPHA_UP_4 +184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +190 0x7000 //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +269 0x0000 //RX_TDDRC_THRD_0 +270 0x0000 //RX_TDDRC_THRD_1 +271 0x1800 //RX_TDDRC_THRD_2 +272 0x1800 //RX_TDDRC_THRD_3 +273 0x3000 //RX_TDDRC_SLANT_0 +274 0x6E00 //RX_TDDRC_SLANT_1 +275 0x1000 //RX_TDDRC_ALPHA_UP_0 +276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x199A //RX_TDDRC_HMNC_GAIN +279 0x0001 //RX_TDDRC_SMT_FLAG +280 0x0CCD //RX_TDDRC_SMT_W +281 0x02FD //RX_TDDRC_DRC_GAIN +195 0x0020 //RX_FDEQ_SUBNUM +196 0x4E4E //RX_FDEQ_GAIN_0 +197 0x4E56 //RX_FDEQ_GAIN_1 +198 0x6878 //RX_FDEQ_GAIN_2 +199 0x8088 //RX_FDEQ_GAIN_3 +200 0x848B //RX_FDEQ_GAIN_4 +201 0x8F8E //RX_FDEQ_GAIN_5 +202 0x9494 //RX_FDEQ_GAIN_6 +203 0x96A0 //RX_FDEQ_GAIN_7 +204 0xB8A0 //RX_FDEQ_GAIN_8 +205 0xA99D //RX_FDEQ_GAIN_9 +206 0x9D6A //RX_FDEQ_GAIN_10 +207 0x626B //RX_FDEQ_GAIN_11 +208 0x6C78 //RX_FDEQ_GAIN_12 +209 0x7884 //RX_FDEQ_GAIN_13 +210 0x9098 //RX_FDEQ_GAIN_14 +211 0x9CAC //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0202 //RX_FDEQ_BIN_0 +221 0x0202 //RX_FDEQ_BIN_1 +222 0x0302 //RX_FDEQ_BIN_2 +223 0x0304 //RX_FDEQ_BIN_3 +224 0x0405 //RX_FDEQ_BIN_4 +225 0x0506 //RX_FDEQ_BIN_5 +226 0x0708 //RX_FDEQ_BIN_6 +227 0x090A //RX_FDEQ_BIN_7 +228 0x0B0C //RX_FDEQ_BIN_8 +229 0x0D0E //RX_FDEQ_BIN_9 +230 0x1013 //RX_FDEQ_BIN_10 +231 0x1719 //RX_FDEQ_BIN_11 +232 0x1B1E //RX_FDEQ_BIN_12 +233 0x1E1E //RX_FDEQ_BIN_13 +234 0x1E28 //RX_FDEQ_BIN_14 +235 0x282C //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x4000 //RX_FDEQ_RESRV_0 +245 0x0320 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0030 //RX_FDDRC_BAND_MARGIN_1 +248 0x0050 //RX_FDDRC_BAND_MARGIN_2 +249 0x0080 //RX_FDDRC_BAND_MARGIN_3 +250 0x0007 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x5000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x6400 //RX_FDDRC_THRD_3_2 +258 0x6400 //RX_FDDRC_THRD_3_3 +259 0x2000 //RX_FDDRC_SLANT_0_0 +260 0x2000 //RX_FDDRC_SLANT_0_1 +261 0x2000 //RX_FDDRC_SLANT_0_2 +262 0x2000 //RX_FDDRC_SLANT_0_3 +263 0x5333 //RX_FDDRC_SLANT_1_0 +264 0x5333 //RX_FDDRC_SLANT_1_1 +265 0x5333 //RX_FDDRC_SLANT_1_2 +266 0x5333 //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +286 0x0059 //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 +#VOL 5 +163 0x1000 //RX_TDDRC_ALPHA_UP_1 +164 0x1000 //RX_TDDRC_ALPHA_UP_2 +165 0x1000 //RX_TDDRC_ALPHA_UP_3 +166 0x1000 //RX_TDDRC_ALPHA_UP_4 +184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +190 0x7000 //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +269 0x0000 //RX_TDDRC_THRD_0 +270 0x0000 //RX_TDDRC_THRD_1 +271 0x1800 //RX_TDDRC_THRD_2 +272 0x1800 //RX_TDDRC_THRD_3 +273 0x3000 //RX_TDDRC_SLANT_0 +274 0x6E00 //RX_TDDRC_SLANT_1 +275 0x1000 //RX_TDDRC_ALPHA_UP_0 +276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x199A //RX_TDDRC_HMNC_GAIN +279 0x0001 //RX_TDDRC_SMT_FLAG +280 0x0CCD //RX_TDDRC_SMT_W +281 0x02FD //RX_TDDRC_DRC_GAIN +195 0x0020 //RX_FDEQ_SUBNUM +196 0x4E4E //RX_FDEQ_GAIN_0 +197 0x4E56 //RX_FDEQ_GAIN_1 +198 0x6878 //RX_FDEQ_GAIN_2 +199 0x8088 //RX_FDEQ_GAIN_3 +200 0x848B //RX_FDEQ_GAIN_4 +201 0x8F8E //RX_FDEQ_GAIN_5 +202 0x9494 //RX_FDEQ_GAIN_6 +203 0x96A0 //RX_FDEQ_GAIN_7 +204 0xB8A0 //RX_FDEQ_GAIN_8 +205 0xA99D //RX_FDEQ_GAIN_9 +206 0x9D6A //RX_FDEQ_GAIN_10 +207 0x626B //RX_FDEQ_GAIN_11 +208 0x6C78 //RX_FDEQ_GAIN_12 +209 0x7884 //RX_FDEQ_GAIN_13 +210 0x9098 //RX_FDEQ_GAIN_14 +211 0x9CAC //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0202 //RX_FDEQ_BIN_0 +221 0x0202 //RX_FDEQ_BIN_1 +222 0x0302 //RX_FDEQ_BIN_2 +223 0x0304 //RX_FDEQ_BIN_3 +224 0x0405 //RX_FDEQ_BIN_4 +225 0x0506 //RX_FDEQ_BIN_5 +226 0x0708 //RX_FDEQ_BIN_6 +227 0x090A //RX_FDEQ_BIN_7 +228 0x0B0C //RX_FDEQ_BIN_8 +229 0x0D0E //RX_FDEQ_BIN_9 +230 0x1013 //RX_FDEQ_BIN_10 +231 0x1719 //RX_FDEQ_BIN_11 +232 0x1B1E //RX_FDEQ_BIN_12 +233 0x1E1E //RX_FDEQ_BIN_13 +234 0x1E28 //RX_FDEQ_BIN_14 +235 0x282C //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x4000 //RX_FDEQ_RESRV_0 +245 0x0320 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0030 //RX_FDDRC_BAND_MARGIN_1 +248 0x0050 //RX_FDDRC_BAND_MARGIN_2 +249 0x0080 //RX_FDDRC_BAND_MARGIN_3 +250 0x0007 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x5000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x6400 //RX_FDDRC_THRD_3_2 +258 0x6400 //RX_FDDRC_THRD_3_3 +259 0x2000 //RX_FDDRC_SLANT_0_0 +260 0x2000 //RX_FDDRC_SLANT_0_1 +261 0x2000 //RX_FDDRC_SLANT_0_2 +262 0x2000 //RX_FDDRC_SLANT_0_3 +263 0x5333 //RX_FDDRC_SLANT_1_0 +264 0x5333 //RX_FDDRC_SLANT_1_1 +265 0x5333 //RX_FDDRC_SLANT_1_2 +266 0x5333 //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +286 0x0090 //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 +#VOL 6 +163 0x1000 //RX_TDDRC_ALPHA_UP_1 +164 0x1000 //RX_TDDRC_ALPHA_UP_2 +165 0x1000 //RX_TDDRC_ALPHA_UP_3 +166 0x1000 //RX_TDDRC_ALPHA_UP_4 +184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +190 0x7000 //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +269 0x0000 //RX_TDDRC_THRD_0 +270 0x0000 //RX_TDDRC_THRD_1 +271 0x1800 //RX_TDDRC_THRD_2 +272 0x1800 //RX_TDDRC_THRD_3 +273 0x3000 //RX_TDDRC_SLANT_0 +274 0x6E00 //RX_TDDRC_SLANT_1 +275 0x1000 //RX_TDDRC_ALPHA_UP_0 +276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x199A //RX_TDDRC_HMNC_GAIN +279 0x0001 //RX_TDDRC_SMT_FLAG +280 0x0CCD //RX_TDDRC_SMT_W +281 0x02FD //RX_TDDRC_DRC_GAIN +195 0x0020 //RX_FDEQ_SUBNUM +196 0x4E4E //RX_FDEQ_GAIN_0 +197 0x4E56 //RX_FDEQ_GAIN_1 +198 0x6878 //RX_FDEQ_GAIN_2 +199 0x8088 //RX_FDEQ_GAIN_3 +200 0x848B //RX_FDEQ_GAIN_4 +201 0x8F8E //RX_FDEQ_GAIN_5 +202 0x9494 //RX_FDEQ_GAIN_6 +203 0x96A0 //RX_FDEQ_GAIN_7 +204 0xB8A0 //RX_FDEQ_GAIN_8 +205 0xA99D //RX_FDEQ_GAIN_9 +206 0x9D6A //RX_FDEQ_GAIN_10 +207 0x626B //RX_FDEQ_GAIN_11 +208 0x6C78 //RX_FDEQ_GAIN_12 +209 0x7884 //RX_FDEQ_GAIN_13 +210 0x9098 //RX_FDEQ_GAIN_14 +211 0x9CAC //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0202 //RX_FDEQ_BIN_0 +221 0x0202 //RX_FDEQ_BIN_1 +222 0x0302 //RX_FDEQ_BIN_2 +223 0x0304 //RX_FDEQ_BIN_3 +224 0x0405 //RX_FDEQ_BIN_4 +225 0x0506 //RX_FDEQ_BIN_5 +226 0x0708 //RX_FDEQ_BIN_6 +227 0x090A //RX_FDEQ_BIN_7 +228 0x0B0C //RX_FDEQ_BIN_8 +229 0x0D0E //RX_FDEQ_BIN_9 +230 0x1013 //RX_FDEQ_BIN_10 +231 0x1719 //RX_FDEQ_BIN_11 +232 0x1B1E //RX_FDEQ_BIN_12 +233 0x1E1E //RX_FDEQ_BIN_13 +234 0x1E28 //RX_FDEQ_BIN_14 +235 0x282C //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x4000 //RX_FDEQ_RESRV_0 +245 0x0320 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0030 //RX_FDDRC_BAND_MARGIN_1 +248 0x0050 //RX_FDDRC_BAND_MARGIN_2 +249 0x0080 //RX_FDDRC_BAND_MARGIN_3 +250 0x0007 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x5000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x6400 //RX_FDDRC_THRD_3_2 +258 0x6400 //RX_FDDRC_THRD_3_3 +259 0x2000 //RX_FDDRC_SLANT_0_0 +260 0x2000 //RX_FDDRC_SLANT_0_1 +261 0x2000 //RX_FDDRC_SLANT_0_2 +262 0x2000 //RX_FDDRC_SLANT_0_3 +263 0x5333 //RX_FDDRC_SLANT_1_0 +264 0x5333 //RX_FDDRC_SLANT_1_1 +265 0x5333 //RX_FDDRC_SLANT_1_2 +266 0x5333 //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +286 0x0100 //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 + +#CASE_NAME HANDSET-HANDSET_HAC-TMOBILE_US-NB +#PARAM_MODE Full +#PARAM_TYPE TX+2RX +#TOTAL_CUSTOM_STEP 7+7 +#TX +0 0x0000 //TX_OPERATION_MODE_0 +1 0x0000 //TX_OPERATION_MODE_1 +2 0x0076 //TX_PATCH_REG +3 0x6F7E //TX_SENDFUNC_MODE_0 +4 0x0001 //TX_SENDFUNC_MODE_1 +5 0x0002 //TX_NUM_MIC +6 0x0000 //TX_SAMPLINGFREQ_SIG +7 0x0000 //TX_SAMPLINGFREQ_PROC +8 0x000A //TX_FRAME_SZ_SIG +9 0x000A //TX_FRAME_SZ +10 0x0000 //TX_DELAY_OPT +11 0x0028 //TX_MAX_TAIL_LENGTH +12 0x0001 //TX_NUM_LOUTCHN +13 0x0001 //TX_MAXNUM_AECREF +14 0x0000 //TX_DBG_FUNC_REG +15 0x0000 //TX_DBG_FUNC_REG1 +16 0x0000 //TX_SYS_RESRV_0 +17 0x0000 //TX_SYS_RESRV_1 +18 0x0000 //TX_SYS_RESRV_2 +19 0x0000 //TX_SYS_RESRV_3 +20 0x0000 //TX_DIST2REF0 +21 0x00A3 //TX_DIST2REF1 +22 0x0000 //TX_DIST2REF_02 +23 0x0000 //TX_DIST2REF_03 +24 0x0000 //TX_DIST2REF_04 +25 0x0000 //TX_DIST2REF_05 +26 0x0000 //TX_MMIC +27 0x1000 //TX_PGA_0 +28 0x1000 //TX_PGA_1 +29 0x1000 //TX_PGA_2 +30 0x0000 //TX_PGA_3 +31 0x0000 //TX_PGA_4 +32 0x0000 //TX_PGA_5 +33 0x0000 //TX_MIC_PAIRS +34 0x0000 //TX_MIC_PAIRS_HS +35 0x0002 //TX_MICS_FOR_BF +36 0x0000 //TX_MIC_PAIRS_FORL1 +37 0x0002 //TX_MICS_OF_PAIR0 +38 0x0002 //TX_MICS_OF_PAIR1 +39 0x0002 //TX_MICS_OF_PAIR2 +40 0x0002 //TX_MICS_OF_PAIR3 +41 0x0000 //TX_MIC_DATA_SRC0 +42 0x0002 //TX_MIC_DATA_SRC1 +43 0x0001 //TX_MIC_DATA_SRC2 +44 0x0000 //TX_MIC_DATA_SRC3 +45 0x0000 //TX_MIC_PAIR_CH_04 +46 0x0000 //TX_MIC_PAIR_CH_05 +47 0x0000 //TX_MIC_PAIR_CH_10 +48 0x0000 //TX_MIC_PAIR_CH_11 +49 0x0000 //TX_MIC_PAIR_CH_12 +50 0x0000 //TX_MIC_PAIR_CH_13 +51 0x0000 //TX_MIC_PAIR_CH_14 +52 0x05DC //TX_HD_BIN_MASK +53 0x0010 //TX_HD_SUBAND_MASK +54 0x19A1 //TX_HD_FRAME_AVG_MASK +55 0x0320 //TX_HD_MIN_FRQ +56 0x1000 //TX_HD_ALPHA_PSD +57 0x1100 //TX_T_PHPR1 +58 0x0000 //TX_T_PHPR2 +59 0x0000 //TX_T_PTPR +60 0x0000 //TX_T_PNPR +61 0x0000 //TX_T_PAPR1 +62 0xEE6C //TX_T_PSDVAT +63 0x0800 //TX_CNT +64 0x4000 //TX_ANTI_HOWL_GAIN +65 0x0001 //TX_MICFORBFMARK_0 +66 0x0001 //TX_MICFORBFMARK_1 +67 0x0001 //TX_MICFORBFMARK_2 +68 0x0001 //TX_MICFORBFMARK_3 +69 0x0001 //TX_MICFORBFMARK_4 +70 0x0001 //TX_MICFORBFMARK_5 +71 0x0000 //TX_DIST2REF_10 +72 0x3A66 //TX_DIST2REF_11 +73 0x0000 //TX_DIST2REF2 +74 0x0000 //TX_DIST2REF_13 +75 0x0000 //TX_DIST2REF_14 +76 0x0000 //TX_DIST2REF_15 +77 0x0000 //TX_DIST2REF_20 +78 0x0000 //TX_DIST2REF_21 +79 0x0000 //TX_DIST2REF_22 +80 0x0000 //TX_DIST2REF_23 +81 0x0000 //TX_DIST2REF_24 +82 0x0000 //TX_DIST2REF_25 +83 0x0000 //TX_DIST2REF_30 +84 0x0000 //TX_DIST2REF_31 +85 0x0000 //TX_DIST2REF_32 +86 0x0000 //TX_DIST2REF_33 +87 0x0000 //TX_DIST2REF_34 +88 0x0000 //TX_DIST2REF_35 +89 0x0000 //TX_MIC_LOC_00 +90 0x0000 //TX_MIC_LOC_01 +91 0x0000 //TX_MIC_LOC_02 +92 0x0000 //TX_MIC_LOC_03 +93 0x0000 //TX_MIC_LOC_04 +94 0x0000 //TX_MIC_LOC_05 +95 0x0000 //TX_MIC_LOC_10 +96 0x0000 //TX_MIC_LOC_11 +97 0x0000 //TX_MIC_LOC_12 +98 0x0000 //TX_MIC_LOC_13 +99 0x0000 //TX_MIC_LOC_14 +100 0x0000 //TX_MIC_LOC_15 +101 0x0000 //TX_MIC_LOC_20 +102 0x0000 //TX_MIC_LOC_21 +103 0x0000 //TX_MIC_LOC_22 +104 0x0000 //TX_MIC_LOC_23 +105 0x0000 //TX_MIC_LOC_24 +106 0x0000 //TX_MIC_LOC_25 +107 0x0200 //TX_MIC_REFBLK_VOLUME +108 0x0AAC //TX_MIC_BLOCK_VOLUME +109 0x0000 //TX_INVERSE_MASK +110 0x0000 //TX_ADCS_MASK +111 0x04D0 //TX_ADCS_GAIN +112 0x4000 //TX_NFC_GAINFAC +113 0x0000 //TX_MAINMIC_BLKFACTOR +114 0x0000 //TX_REFMIC_BLKFACTOR +115 0x0000 //TX_BLMIC_BLKFACTOR +116 0x0000 //TX_BRMIC_BLKFACTOR +117 0x0031 //TX_MICBLK_START_BIN +118 0x0060 //TX_MICBLK_END_BIN +119 0x0015 //TX_MICBLK_FE_HOLD +120 0xFFF2 //TX_MICBLK_MR_EXP_TH +121 0xFFF2 //TX_MICBLK_LR_EXP_TH +122 0x0000 //TX_FENE_HOLD +123 0x4000 //TX_FE_ENER_TH_MTS +124 0x0004 //TX_FE_ENER_TH_EXP +125 0x6000 //TX_C_POST_FLT_MIC_MAINBLK +126 0x6000 //TX_C_POST_FLT_MIC_REFBLK +127 0x0010 //TX_MIC_BLOCK_N +128 0x7646 //TX_A_HP +129 0x4000 //TX_B_PE +130 0x1800 //TX_THR_PITCH_DET_0 +131 0x1000 //TX_THR_PITCH_DET_1 +132 0x0800 //TX_THR_PITCH_DET_2 +133 0x0008 //TX_PITCH_BFR_LEN +134 0x0003 //TX_SBD_PITCH_DET +135 0x0050 //TX_TD_AEC_L +136 0x4000 //TX_MU0_UNP_TD_AEC +137 0x1000 //TX_MU0_PTD_TD_AEC +138 0x0000 //TX_PP_RESRV_0 +139 0x2A94 //TX_PP_RESRV_1 +140 0x55F0 //TX_PP_RESRV_2 +141 0x0000 //TX_PP_RESRV_3 +142 0x0000 //TX_PP_RESRV_4 +143 0x0000 //TX_PP_RESRV_5 +144 0x0000 //TX_PP_RESRV_6 +145 0x0000 //TX_PP_RESRV_7 +146 0x0028 //TX_TAIL_LENGTH +147 0x0800 //TX_AEC_REF_GAIN_0 +148 0x0800 //TX_AEC_REF_GAIN_1 +149 0x0800 //TX_AEC_REF_GAIN_2 +150 0x6000 //TX_EAD_THR +151 0x2000 //TX_THR_RE_EST +152 0x0100 //TX_MIN_EQ_RE_EST_0 +153 0x0100 //TX_MIN_EQ_RE_EST_1 +154 0x0100 //TX_MIN_EQ_RE_EST_2 +155 0x0200 //TX_MIN_EQ_RE_EST_3 +156 0x0200 //TX_MIN_EQ_RE_EST_4 +157 0x0200 //TX_MIN_EQ_RE_EST_5 +158 0x0200 //TX_MIN_EQ_RE_EST_6 +159 0x0200 //TX_MIN_EQ_RE_EST_7 +160 0x1000 //TX_MIN_EQ_RE_EST_8 +161 0x1000 //TX_MIN_EQ_RE_EST_9 +162 0x1000 //TX_MIN_EQ_RE_EST_10 +163 0x0400 //TX_MIN_EQ_RE_EST_11 +164 0x1000 //TX_MIN_EQ_RE_EST_12 +165 0x3000 //TX_LAMBDA_RE_EST +166 0x1000 //TX_LAMBDA_CB_NLE +167 0x0400 //TX_C_POST_FLT +168 0x4000 //TX_GAIN_NP +169 0x003C //TX_SE_HOLD_N +170 0x0046 //TX_DT_HOLD_N +171 0x03E8 //TX_DT2_HOLD_N +172 0x6666 //TX_AEC_RESRV_0 +173 0x0000 //TX_AEC_RESRV_1 +174 0x0014 //TX_AEC_RESRV_2 +175 0x0000 //TX_MIC_DELAY_LENGTH +176 0x0000 //TX_REF_DELAY_LENGTH +177 0x0000 //TX_ADD_LINEIN_GAINL +178 0x0000 //TX_ADD_LINEIN_GAINH +179 0x0000 //TX_MIN_EQ_RE_EST_14 +180 0x0000 //TX_DTD_THR1_8 +181 0x7FFF //TX_DTD_THR2_8 +182 0x0000 //TX_DTD_MIC_BLK2 +183 0x0008 //TX_FRQ_LIN_LEN +184 0x7FFF //TX_FRQ_AEC_LEN_RHO +185 0x6000 //TX_MU0_UNP_FRQ_AEC +186 0x4000 //TX_MU0_PTD_FRQ_AEC +187 0x000A //TX_MINENOISETH +188 0x0800 //TX_MU0_RE_EST +189 0x0001 //TX_AEC_NUM_CH +190 0x0000 //TX_BIGECHOATTENUATION_MAX +191 0x2000 //TX_A_POST_FLT_MICBLK +192 0x0000 //TX_BLKENERTH +193 0x0000 //TX_BLKENERHIGHTH +194 0x0000 //TX_NORMENERTH +195 0x0000 //TX_NORMENERHIGHTH +196 0x0000 //TX_NORMENERHIGHTHL +197 0x7B00 //TX_DTD_THR1_0 +198 0x7B00 //TX_DTD_THR1_1 +199 0x7B00 //TX_DTD_THR1_2 +200 0x7B00 //TX_DTD_THR1_3 +201 0x7B00 //TX_DTD_THR1_4 +202 0x7B00 //TX_DTD_THR1_5 +203 0x7B00 //TX_DTD_THR1_6 +204 0x1000 //TX_DTD_THR2_0 +205 0x1000 //TX_DTD_THR2_1 +206 0x1000 //TX_DTD_THR2_2 +207 0x1000 //TX_DTD_THR2_3 +208 0x1000 //TX_DTD_THR2_4 +209 0x1000 //TX_DTD_THR2_5 +210 0x1000 //TX_DTD_THR2_6 +211 0x7FFF //TX_DTD_THR3 +212 0x0000 //TX_SPK_CUT_K +213 0x0FA0 //TX_DT_CUT_K +214 0x0100 //TX_DT_CUT_THR +215 0x04EB //TX_COMFORT_G +216 0x01F4 //TX_POWER_YOUT_TH +217 0x4000 //TX_FDPFGAINECHO +218 0x0000 //TX_DTD_HD_THR +219 0x0000 //TX_SPK_CUT_K_S +220 0x0000 //TX_DTD_MIC_BLK +221 0x0400 //TX_ADPT_STRICT_L +222 0x0200 //TX_ADPT_STRICT_H +223 0x0000 //TX_RATIO_DT_L_TH_LOW +224 0x0000 //TX_RATIO_DT_H_TH_LOW +225 0x0000 //TX_RATIO_DT_L_TH_HIGH +226 0x0000 //TX_RATIO_DT_H_TH_HIGH +227 0x0000 //TX_RATIO_DT_L0_TH +228 0x2000 //TX_B_POST_FILT_ECHO_L +229 0x2000 //TX_B_POST_FILT_ECHO_H +230 0x0200 //TX_MIN_G_CTRL_ECHO +231 0x7FFF //TX_B_LESSCUT_RTO_ECHO +232 0x0000 //TX_EPD_OFFSET_00 +233 0x0000 //TX_EPD_OFFST_01 +234 0x0000 //TX_RATIO_DT_L0_TH_HIGH +235 0x3A98 //TX_RATIO_DT_H_TH_CUT +236 0x7FFF //TX_MIN_EQ_RE_EST_13 +237 0x0000 //TX_DTD_THR1_7 +238 0x0000 //TX_DTD_THR2_7 +239 0x0800 //TX_DT_RESRV_7 +240 0x0800 //TX_DT_RESRV_8 +241 0x0000 //TX_DT_RESRV_9 +242 0xF800 //TX_THR_SN_EST_0 +243 0xF800 //TX_THR_SN_EST_1 +244 0xFA00 //TX_THR_SN_EST_2 +245 0xF900 //TX_THR_SN_EST_3 +246 0xF900 //TX_THR_SN_EST_4 +247 0xFA00 //TX_THR_SN_EST_5 +248 0xF800 //TX_THR_SN_EST_6 +249 0xF700 //TX_THR_SN_EST_7 +250 0x0000 //TX_DELTA_THR_SN_EST_0 +251 0x0100 //TX_DELTA_THR_SN_EST_1 +252 0x0200 //TX_DELTA_THR_SN_EST_2 +253 0x01A0 //TX_DELTA_THR_SN_EST_3 +254 0x0100 //TX_DELTA_THR_SN_EST_4 +255 0x0000 //TX_DELTA_THR_SN_EST_5 +256 0x01A0 //TX_DELTA_THR_SN_EST_6 +257 0x0200 //TX_DELTA_THR_SN_EST_7 +258 0x4000 //TX_LAMBDA_NN_EST_0 +259 0x3000 //TX_LAMBDA_NN_EST_1 +260 0x4000 //TX_LAMBDA_NN_EST_2 +261 0x3000 //TX_LAMBDA_NN_EST_3 +262 0x3000 //TX_LAMBDA_NN_EST_4 +263 0x4000 //TX_LAMBDA_NN_EST_5 +264 0x4000 //TX_LAMBDA_NN_EST_6 +265 0x4000 //TX_LAMBDA_NN_EST_7 +266 0x0400 //TX_N_SN_EST +267 0x001E //TX_INBEAM_T +268 0x0041 //TX_INBEAMHOLDT +269 0x2000 //TX_G_STRICT +270 0x0000 //TX_EQ_THR_BF +271 0x799A //TX_LAMBDA_EQ_BF +272 0x3000 //TX_NE_RTO_TH +273 0x1000 //TX_NE_RTO_TH_L +274 0x3000 //TX_MAINREFRTOH_TH_H +275 0x1000 //TX_MAINREFRTOH_TH_L +276 0x3000 //TX_MAINREFRTO_TH_H +277 0x1000 //TX_MAINREFRTO_TH_L +278 0x0200 //TX_MAINREFRTO_TH_EQ +279 0x4000 //TX_B_POST_FLT_0 +280 0x4000 //TX_B_POST_FLT_1 +281 0x0014 //TX_NS_LVL_CTRL_0 +282 0x0019 //TX_NS_LVL_CTRL_1 +283 0x0017 //TX_NS_LVL_CTRL_2 +284 0x0017 //TX_NS_LVL_CTRL_3 +285 0x0019 //TX_NS_LVL_CTRL_4 +286 0x0014 //TX_NS_LVL_CTRL_5 +287 0x001B //TX_NS_LVL_CTRL_6 +288 0x0010 //TX_NS_LVL_CTRL_7 +289 0x0010 //TX_MIN_GAIN_S_0 +290 0x000C //TX_MIN_GAIN_S_1 +291 0x0010 //TX_MIN_GAIN_S_2 +292 0x0010 //TX_MIN_GAIN_S_3 +293 0x000C //TX_MIN_GAIN_S_4 +294 0x0014 //TX_MIN_GAIN_S_5 +295 0x000C //TX_MIN_GAIN_S_6 +296 0x0014 //TX_MIN_GAIN_S_7 +297 0x5000 //TX_NMOS_SUP +298 0x0000 //TX_NS_MAX_PRI_SNR_TH +299 0x0000 //TX_NMOS_SUP_MENSA +300 0x4000 //TX_SNRI_SUP_0 +301 0x4000 //TX_SNRI_SUP_1 +302 0x4000 //TX_SNRI_SUP_2 +303 0x4000 //TX_SNRI_SUP_3 +304 0x4000 //TX_SNRI_SUP_4 +305 0x7FFF //TX_SNRI_SUP_5 +306 0x4000 //TX_SNRI_SUP_6 +307 0x3000 //TX_SNRI_SUP_7 +308 0x3000 //TX_THR_LFNS +309 0x001A //TX_G_LFNS +310 0x09C4 //TX_GAIN0_NTH +311 0x000A //TX_MUSIC_MORENS +312 0x7FFF //TX_A_POST_FILT_0 +313 0x2000 //TX_A_POST_FILT_1 +314 0x2000 //TX_A_POST_FILT_S_0 +315 0x6000 //TX_A_POST_FILT_S_1 +316 0x5000 //TX_A_POST_FILT_S_2 +317 0x2000 //TX_A_POST_FILT_S_3 +318 0x6000 //TX_A_POST_FILT_S_4 +319 0x2000 //TX_A_POST_FILT_S_5 +320 0x7000 //TX_A_POST_FILT_S_6 +321 0x7000 //TX_A_POST_FILT_S_7 +322 0x4000 //TX_B_POST_FILT_0 +323 0x4000 //TX_B_POST_FILT_1 +324 0x5000 //TX_B_POST_FILT_2 +325 0x4000 //TX_B_POST_FILT_3 +326 0x4000 //TX_B_POST_FILT_4 +327 0x4000 //TX_B_POST_FILT_5 +328 0x4000 //TX_B_POST_FILT_6 +329 0x2000 //TX_B_POST_FILT_7 +330 0x7FFF //TX_B_LESSCUT_RTO_S_0 +331 0x1000 //TX_B_LESSCUT_RTO_S_1 +332 0x1000 //TX_B_LESSCUT_RTO_S_2 +333 0x1000 //TX_B_LESSCUT_RTO_S_3 +334 0x1000 //TX_B_LESSCUT_RTO_S_4 +335 0x1000 //TX_B_LESSCUT_RTO_S_5 +336 0x1000 //TX_B_LESSCUT_RTO_S_6 +337 0x1000 //TX_B_LESSCUT_RTO_S_7 +338 0x7E14 //TX_LAMBDA_PFILT +339 0x7C29 //TX_LAMBDA_PFILT_S_0 +340 0x7200 //TX_LAMBDA_PFILT_S_1 +341 0x7900 //TX_LAMBDA_PFILT_S_2 +342 0x7400 //TX_LAMBDA_PFILT_S_3 +343 0x7200 //TX_LAMBDA_PFILT_S_4 +344 0x7C29 //TX_LAMBDA_PFILT_S_5 +345 0x7C29 //TX_LAMBDA_PFILT_S_6 +346 0x7C29 //TX_LAMBDA_PFILT_S_7 +347 0x0200 //TX_K_PEPPER +348 0x0800 //TX_A_PEPPER +349 0x0C80 //TX_K_PEPPER_HF +350 0x0400 //TX_A_PEPPER_HF +351 0x0001 //TX_HMNC_BST_FLG +352 0x4000 //TX_HMNC_BST_THR +353 0x0800 //TX_DT_BINVAD_TH_0 +354 0x0800 //TX_DT_BINVAD_TH_1 +355 0x0800 //TX_DT_BINVAD_TH_2 +356 0x0800 //TX_DT_BINVAD_TH_3 +357 0x0000 //TX_DT_BINVAD_ENDF +358 0x1000 //TX_C_POST_FLT_DT +359 0x7FFF //TX_NS_B_POST_FLT_LESSCUT +360 0x0100 //TX_DT_BOOST +361 0x0000 //TX_BF_SGRAD_FLG +362 0x0005 //TX_BF_DVG_TH +363 0x001E //TX_SN_C_F +364 0x0000 //TX_K_APT +365 0x0001 //TX_NOISEDET +366 0x0190 //TX_NDETCT +367 0x0004 //TX_NOISE_TH_0 +368 0x1B58 //TX_NOISE_TH_0_2 +369 0x2134 //TX_NOISE_TH_0_3 +370 0x0320 //TX_NOISE_TH_1 +371 0x022C //TX_NOISE_TH_2 +372 0x2710 //TX_NOISE_TH_3 +373 0x6B6C //TX_NOISE_TH_4 +374 0x7FFF //TX_NOISE_TH_5 +375 0x7FFF //TX_NOISE_TH_5_2 +376 0x0000 //TX_NOISE_TH_5_3 +377 0x0000 //TX_NOISE_TH_5_4 +378 0x07D0 //TX_NOISE_TH_6 +379 0x0004 //TX_MINENOISE_TH +380 0xD508 //TX_MORENS_TFMASK_TH +381 0x0001 //TX_DRC_QUIET_FLOOR +382 0x6D60 //TX_RATIODTL_CUT_TH +383 0x0DAC //TX_DT_CUT_K1 +384 0x00A5 //TX_OUT_ENER_S_TH_CLEAN +385 0x00A5 //TX_OUT_ENER_S_TH_LESSCLEAN +386 0x00A5 //TX_OUT_ENER_S_TH_NOISY +387 0x0029 //TX_OUT_ENER_TH_NOISE +388 0x00CE //TX_OUT_ENER_TH_SPEECH +389 0x2000 //TX_SN_NPB_GAIN +390 0x0000 //TX_NN_NPB_GAIN +391 0x3000 //TX_POST_MASK_SUP_HSNE +392 0x07D0 //TX_TAIL_DET_TH +393 0x4000 //TX_B_LESSCUT_RTO_WTA +394 0x0000 //TX_MEL_G_R +395 0x0080 //TX_SUPHIGH_TH +396 0x0000 //TX_MASK_G_R +397 0x0002 //TX_EXTRA_NS_L +398 0x1800 //TX_C_POST_FLT_MASK +399 0x7FFF //TX_A_POST_FLT_WNS +400 0x0148 //TX_MIN_G_LOW300HZ +401 0x0001 //TX_MAXLEVEL_CNG +402 0x00B4 //TX_STN_NOISE_TH +403 0x4000 //TX_POST_MASK_SUP +404 0x7FFF //TX_POST_MASK_ADJUST +405 0x000A //TX_NS_ENOISE_MIC0_TH +406 0x0004 //TX_MINENOISE_MIC0_TH +407 0x0014 //TX_MINENOISE_MIC0_S_TH +408 0x4900 //TX_MIN_G_CTRL_SSNS +409 0x0400 //TX_METAL_RTO_THR +410 0x0FA0 //TX_NS_FP_K_METAL +411 0x3A98 //TX_NOISEDET_BOOST_TH +412 0x0FA0 //TX_NSMOOTH_TH +413 0x0000 //TX_NS_RESRV_8 +414 0x1800 //TX_RHO_UPB +415 0x2328 //TX_N_HOLD_HS +416 0x006E //TX_N_RHO_BFR0 +417 0x7FFF //TX_LAMBDA_ARSP_EST +418 0x0100 //TX_EXTRA_GAIN_MICBLOCK +419 0x0333 //TX_THR_STD_NSR +420 0x019A //TX_THR_STD_PLH +421 0x03E8 //TX_N_HOLD_STD +422 0x0066 //TX_THR_STD_RHO +423 0x4000 //TX_BF_RESET_THR_HS +424 0x0CCD //TX_SB_RTO_MEAN_TH +425 0x0280 //TX_SB_RHO_MEAN_TH_NTALK +426 0x3800 //TX_SB_RTO_MEAN_TH_ABN +427 0x2EE0 //TX_SB_RTO_MEAN_TH_RUB +428 0x0990 //TX_WTA_EN_RTO_TH +429 0x1400 //TX_TOP_ENER_TH_F +430 0x0100 //TX_DESIRED_TALK_HOLDT +431 0x0800 //TX_MIC_BLOCK_FACTOR +432 0x0000 //TX_NSEST_BFRLRNRDC +433 0x0000 //TX_THR_POST_FLT_HS +434 0x0010 //TX_HS_VAD_BIN +435 0x2666 //TX_THR_VAD_HS +436 0x2CCD //TX_MEAN_RTO_MIN_TH2 +437 0x0032 //TX_SILENCE_T +438 0x0000 //TX_A_POST_FLT_WTA +439 0x799A //TX_LAMBDA_PFLT_WTA +440 0x0000 //TX_SB_RHO_MEAN2_TH +441 0x0640 //TX_SB_RHO_MEAN3_TH +442 0x0000 //TX_HS_RESRV_4 +443 0x0000 //TX_HS_RESRV_5 +444 0x003C //TX_DOA_VAD_THR_1 +445 0x003C //TX_DOA_VAD_THR_2 +446 0x0028 //TX_DOA_VAD_THR1_0 +447 0x0028 //TX_DOA_VAD_THR1_1 +448 0x0000 //TX_SRC_DOA_RNG_LOW_0A +449 0x00B4 //TX_SRC_DOA_RNG_HIGH_0A +450 0x005A //TX_DFLT_SRC_DOA_0A +451 0x0000 //TX_SRC_DOA_RNG_LOW_0B +452 0x0000 //TX_SRC_DOA_RNG_HIGH_0B +453 0x0000 //TX_DFLT_SRC_DOA_0B +454 0x0000 //TX_SRC_DOA_RNG_LOW_0C +455 0x0000 //TX_SRC_DOA_RNG_HIGH_0C +456 0x0000 //TX_DFLT_SRC_DOA_0C +457 0x0000 //TX_SRC_DOA_RNG_LOW_0D +458 0x0000 //TX_SRC_DOA_RNG_HIGH_0D +459 0x0000 //TX_DFLT_SRC_DOA_0D +460 0x0000 //TX_SRC_DOA_RNG_LOW_1A +461 0x00B4 //TX_SRC_DOA_RNG_HIGH_1A +462 0x005A //TX_DFLT_SRC_DOA_1A +463 0x0000 //TX_SRC_DOA_RNG_LOW_1B +464 0x00B4 //TX_SRC_DOA_RNG_HIGH_1B +465 0x005A //TX_DFLT_SRC_DOA_1B +466 0x0000 //TX_SRC_DOA_RNG_LOW_1C +467 0x00B4 //TX_SRC_DOA_RNG_HIGH_1C +468 0x005A //TX_DFLT_SRC_DOA_1C +469 0x0000 //TX_SRC_DOA_RNG_LOW_1D +470 0x00B4 //TX_SRC_DOA_RNG_HIGH_1D +471 0x005A //TX_DFLT_SRC_DOA_1D +472 0x0100 //TX_BF_HOLDOFF_T +473 0x7FFF //TX_DOA_COST_FACTOR +474 0x0D9A //TX_MAINTOREFR_TH0 +475 0x071C //TX_DOA_TRK_THR +476 0x012C //TX_DOA_TRACK_HT +477 0x0200 //TX_N1_HOLD_HF +478 0x0100 //TX_N2_HOLD_HF +479 0x2A3D //TX_BF_RESET_THR_HF +480 0x7333 //TX_DOA_SMOOTH +481 0x0800 //TX_MU_BF +482 0x0800 //TX_BF_MU_LF_B2 +483 0x0040 //TX_BF_FC_END_BIN_B2 +484 0x0020 //TX_BF_FC_END_BIN +485 0x0000 //TX_HF_RESRV_25 +486 0x0000 //TX_HF_RESRV_26 +487 0x0007 //TX_N_DOA_SEED +488 0x0001 //TX_FINE_DOA_SEARCH_FLG +489 0x0000 //TX_HF_RESRV_27 +490 0x038E //TX_DLT_SRC_DOA_RNG +491 0x0200 //TX_BF_MU_LF +492 0x0000 //TX_DFLT_SRC_LOC_0 +493 0x7FFF //TX_DFLT_SRC_LOC_1 +494 0x0000 //TX_DFLT_SRC_LOC_2 +495 0x038E //TX_DOA_TRACK_VADTH +496 0x0000 //TX_DOA_TRACK_NEW +497 0x01E0 //TX_NOR_OFF_THR +498 0x7C00 //TX_MORE_ON_700HZ_THR +499 0x2000 //TX_MU_BF_ADPT_NS +500 0x0000 //TX_ADAPT_LEN +501 0x6666 //TX_MORE_SNS +502 0x0000 //TX_NOR_OFF_TH1 +503 0x0000 //TX_WIDE_MASK_TH +504 0xD333 //TX_SUBSNRATIOHIGH4MEANBCK_THR +505 0x6000 //TX_C_POST_FLT_CUT +506 0x2000 //TX_RADIODTLV +507 0x0320 //TX_POWER_LINEIN_TH +508 0x0014 //TX_FE_VADCOUNT_TH_FC +509 0x0000 //TX_ECHO_SUPP_FC +510 0x0C80 //TX_ECHO_TH +511 0x6666 //TX_MIC_TO_BFGAIN +512 0x0000 //TX_MICTOBFGAIN0 +513 0x0000 //TX_FASTMUE_TH +514 0x3000 //TX_DEREVERB_LF_MU +515 0x34CD //TX_DEREVERB_HF_MU +516 0x0007 //TX_DEREVERB_DELAY +517 0x0004 //TX_DEREVERB_COEF_LEN +518 0x0003 //TX_DEREVERB_DNR +519 0x0000 //TX_DEREVERB_ALPHA +520 0x0000 //TX_DEREVERB_BETA +521 0x3A98 //TX_GSC_RTOL_TH +522 0x3A98 //TX_GSC_RTOH_TH +523 0x7E2C //TX_WIDE2_MEANHTH +524 0x0000 //TX_DR_RESRV_5 +525 0x0000 //TX_DR_RESRV_6 +526 0x0000 //TX_DR_RESRV_7 +527 0x0000 //TX_DR_RESRV_8 +528 0x1333 //TX_WIND_MARK_TH +529 0x399A //TX_CORR_THR +530 0x0004 //TX_SNR_THR +531 0x0010 //TX_ENGY_THR +532 0x1770 //TX_CORR_HIGH_TH +533 0x6000 //TX_ENGY_THR_2 +534 0x3400 //TX_MEAN_RTO_THR +535 0x0028 //TX_WNS_ENOISE_MIC0_TH +536 0x3000 //TX_RATIOMICL_TH +537 0x7FFF //TX_CALIG_HS +538 0x0000 //TX_LVL_CTRL +539 0x0014 //TX_WIND_SUPRTO +540 0x001A //TX_WNS_MIN_G +541 0x0600 //TX_WNS_B_POST_FLT +542 0x2800 //TX_RATIOMICH_TH +543 0xD120 //TX_WIND_INBEAM_L_TH +544 0x0FA0 //TX_WIND_INBEAM_H_TH +545 0x2000 //TX_WNS_RESRV_0 +546 0x59D8 //TX_WNS_RESRV_1 +547 0x0080 //TX_WNS_RESRV_2 +548 0x0000 //TX_WNS_RESRV_3 +549 0x0000 //TX_WNS_RESRV_4 +550 0x0000 //TX_WNS_RESRV_5 +551 0x0000 //TX_WNS_RESRV_6 +552 0x0000 //TX_PB_B_POST_FLT_LESSCUT +553 0x0070 //TX_BF_LESSCUT_BBIN +554 0x0070 //TX_BF_LESSCUT_EBIN +555 0x0010 //TX_POSTBFB0 +556 0x0070 //TX_POSTBFB +557 0x00B0 //TX_POSTBFE +558 0x0E66 //TX_SPEECH_SNR_TH +559 0x0050 //TX_PB_MAX_PRI_SNR_TH +560 0x770A //TX_MAX_PRI_SNR_TH_L +561 0x0000 //TX_PFGAIN +562 0x0000 //TX_MAINTOREFR_TH +563 0x0000 //TX_SAM_MARK +564 0x0000 //TX_PB_RESRV_0 +565 0x0000 //TX_PB_RESRV_1 +566 0x0018 //TX_FDEQ_SUBNUM +567 0x6C60 //TX_FDEQ_GAIN_0 +568 0x584F //TX_FDEQ_GAIN_1 +569 0x4F4E //TX_FDEQ_GAIN_2 +570 0x474A //TX_FDEQ_GAIN_3 +571 0x473F //TX_FDEQ_GAIN_4 +572 0x4240 //TX_FDEQ_GAIN_5 +573 0x4040 //TX_FDEQ_GAIN_6 +574 0x3630 //TX_FDEQ_GAIN_7 +575 0x2726 //TX_FDEQ_GAIN_8 +576 0x383C //TX_FDEQ_GAIN_9 +577 0x4848 //TX_FDEQ_GAIN_10 +578 0x4848 //TX_FDEQ_GAIN_11 +579 0x4848 //TX_FDEQ_GAIN_12 +580 0x4848 //TX_FDEQ_GAIN_13 +581 0x4848 //TX_FDEQ_GAIN_14 +582 0x4848 //TX_FDEQ_GAIN_15 +583 0x4848 //TX_FDEQ_GAIN_16 +584 0x4848 //TX_FDEQ_GAIN_17 +585 0x4848 //TX_FDEQ_GAIN_18 +586 0x4848 //TX_FDEQ_GAIN_19 +587 0x4848 //TX_FDEQ_GAIN_20 +588 0x4848 //TX_FDEQ_GAIN_21 +589 0x4848 //TX_FDEQ_GAIN_22 +590 0x4848 //TX_FDEQ_GAIN_23 +591 0x0202 //TX_FDEQ_BIN_0 +592 0x0104 //TX_FDEQ_BIN_1 +593 0x0502 //TX_FDEQ_BIN_2 +594 0x0202 //TX_FDEQ_BIN_3 +595 0x0504 //TX_FDEQ_BIN_4 +596 0x0708 //TX_FDEQ_BIN_5 +597 0x0808 //TX_FDEQ_BIN_6 +598 0x050E //TX_FDEQ_BIN_7 +599 0x0B0C //TX_FDEQ_BIN_8 +600 0x0F09 //TX_FDEQ_BIN_9 +601 0x0000 //TX_FDEQ_BIN_10 +602 0x0000 //TX_FDEQ_BIN_11 +603 0x0000 //TX_FDEQ_BIN_12 +604 0x0000 //TX_FDEQ_BIN_13 +605 0x0000 //TX_FDEQ_BIN_14 +606 0x0000 //TX_FDEQ_BIN_15 +607 0x0000 //TX_FDEQ_BIN_16 +608 0x0000 //TX_FDEQ_BIN_17 +609 0x0000 //TX_FDEQ_BIN_18 +610 0x0000 //TX_FDEQ_BIN_19 +611 0x0000 //TX_FDEQ_BIN_20 +612 0x0000 //TX_FDEQ_BIN_21 +613 0x0000 //TX_FDEQ_BIN_22 +614 0x0000 //TX_FDEQ_BIN_23 +615 0x0000 //TX_FDEQ_PADDING +616 0x0030 //TX_PREEQ_SUBNUM_MIC0 +617 0x4848 //TX_PREEQ_GAIN_MIC0_0 +618 0x4848 //TX_PREEQ_GAIN_MIC0_1 +619 0x4848 //TX_PREEQ_GAIN_MIC0_2 +620 0x4848 //TX_PREEQ_GAIN_MIC0_3 +621 0x4848 //TX_PREEQ_GAIN_MIC0_4 +622 0x4848 //TX_PREEQ_GAIN_MIC0_5 +623 0x4848 //TX_PREEQ_GAIN_MIC0_6 +624 0x4848 //TX_PREEQ_GAIN_MIC0_7 +625 0x4848 //TX_PREEQ_GAIN_MIC0_8 +626 0x4848 //TX_PREEQ_GAIN_MIC0_9 +627 0x4848 //TX_PREEQ_GAIN_MIC0_10 +628 0x4848 //TX_PREEQ_GAIN_MIC0_11 +629 0x4848 //TX_PREEQ_GAIN_MIC0_12 +630 0x4848 //TX_PREEQ_GAIN_MIC0_13 +631 0x4848 //TX_PREEQ_GAIN_MIC0_14 +632 0x4848 //TX_PREEQ_GAIN_MIC0_15 +633 0x4848 //TX_PREEQ_GAIN_MIC0_16 +634 0x4848 //TX_PREEQ_GAIN_MIC0_17 +635 0x4848 //TX_PREEQ_GAIN_MIC0_18 +636 0x4848 //TX_PREEQ_GAIN_MIC0_19 +637 0x4848 //TX_PREEQ_GAIN_MIC0_20 +638 0x4848 //TX_PREEQ_GAIN_MIC0_21 +639 0x4848 //TX_PREEQ_GAIN_MIC0_22 +640 0x4848 //TX_PREEQ_GAIN_MIC0_23 +641 0x251A //TX_PREEQ_BIN_MIC0_0 +642 0x0F0F //TX_PREEQ_BIN_MIC0_1 +643 0x0C08 //TX_PREEQ_BIN_MIC0_2 +644 0x0700 //TX_PREEQ_BIN_MIC0_3 +645 0x0000 //TX_PREEQ_BIN_MIC0_4 +646 0x0000 //TX_PREEQ_BIN_MIC0_5 +647 0x0000 //TX_PREEQ_BIN_MIC0_6 +648 0x0000 //TX_PREEQ_BIN_MIC0_7 +649 0x0000 //TX_PREEQ_BIN_MIC0_8 +650 0x0000 //TX_PREEQ_BIN_MIC0_9 +651 0x0000 //TX_PREEQ_BIN_MIC0_10 +652 0x0000 //TX_PREEQ_BIN_MIC0_11 +653 0x0000 //TX_PREEQ_BIN_MIC0_12 +654 0x0000 //TX_PREEQ_BIN_MIC0_13 +655 0x0000 //TX_PREEQ_BIN_MIC0_14 +656 0x0000 //TX_PREEQ_BIN_MIC0_15 +657 0x0000 //TX_PREEQ_BIN_MIC0_16 +658 0x0000 //TX_PREEQ_BIN_MIC0_17 +659 0x0000 //TX_PREEQ_BIN_MIC0_18 +660 0x0000 //TX_PREEQ_BIN_MIC0_19 +661 0x0000 //TX_PREEQ_BIN_MIC0_20 +662 0x0000 //TX_PREEQ_BIN_MIC0_21 +663 0x0000 //TX_PREEQ_BIN_MIC0_22 +664 0x0000 //TX_PREEQ_BIN_MIC0_23 +665 0x0030 //TX_PREEQ_SUBNUM_MIC1 +666 0x4848 //TX_PREEQ_GAIN_MIC1_0 +667 0x4848 //TX_PREEQ_GAIN_MIC1_1 +668 0x4848 //TX_PREEQ_GAIN_MIC1_2 +669 0x4848 //TX_PREEQ_GAIN_MIC1_3 +670 0x4848 //TX_PREEQ_GAIN_MIC1_4 +671 0x4848 //TX_PREEQ_GAIN_MIC1_5 +672 0x494A //TX_PREEQ_GAIN_MIC1_6 +673 0x4B4C //TX_PREEQ_GAIN_MIC1_7 +674 0x4D4E //TX_PREEQ_GAIN_MIC1_8 +675 0x4F51 //TX_PREEQ_GAIN_MIC1_9 +676 0x4848 //TX_PREEQ_GAIN_MIC1_10 +677 0x4848 //TX_PREEQ_GAIN_MIC1_11 +678 0x4848 //TX_PREEQ_GAIN_MIC1_12 +679 0x4848 //TX_PREEQ_GAIN_MIC1_13 +680 0x4848 //TX_PREEQ_GAIN_MIC1_14 +681 0x4848 //TX_PREEQ_GAIN_MIC1_15 +682 0x4848 //TX_PREEQ_GAIN_MIC1_16 +683 0x4848 //TX_PREEQ_GAIN_MIC1_17 +684 0x4848 //TX_PREEQ_GAIN_MIC1_18 +685 0x4848 //TX_PREEQ_GAIN_MIC1_19 +686 0x4848 //TX_PREEQ_GAIN_MIC1_20 +687 0x4848 //TX_PREEQ_GAIN_MIC1_21 +688 0x4848 //TX_PREEQ_GAIN_MIC1_22 +689 0x4848 //TX_PREEQ_GAIN_MIC1_23 +690 0x0202 //TX_PREEQ_BIN_MIC1_0 +691 0x0203 //TX_PREEQ_BIN_MIC1_1 +692 0x0303 //TX_PREEQ_BIN_MIC1_2 +693 0x0304 //TX_PREEQ_BIN_MIC1_3 +694 0x0405 //TX_PREEQ_BIN_MIC1_4 +695 0x0506 //TX_PREEQ_BIN_MIC1_5 +696 0x0708 //TX_PREEQ_BIN_MIC1_6 +697 0x090A //TX_PREEQ_BIN_MIC1_7 +698 0x0B0C //TX_PREEQ_BIN_MIC1_8 +699 0x0D0E //TX_PREEQ_BIN_MIC1_9 +700 0x0000 //TX_PREEQ_BIN_MIC1_10 +701 0x0000 //TX_PREEQ_BIN_MIC1_11 +702 0x0000 //TX_PREEQ_BIN_MIC1_12 +703 0x0000 //TX_PREEQ_BIN_MIC1_13 +704 0x0000 //TX_PREEQ_BIN_MIC1_14 +705 0x0000 //TX_PREEQ_BIN_MIC1_15 +706 0x0000 //TX_PREEQ_BIN_MIC1_16 +707 0x0000 //TX_PREEQ_BIN_MIC1_17 +708 0x0000 //TX_PREEQ_BIN_MIC1_18 +709 0x0000 //TX_PREEQ_BIN_MIC1_19 +710 0x0000 //TX_PREEQ_BIN_MIC1_20 +711 0x0000 //TX_PREEQ_BIN_MIC1_21 +712 0x0000 //TX_PREEQ_BIN_MIC1_22 +713 0x0000 //TX_PREEQ_BIN_MIC1_23 +714 0x0030 //TX_PREEQ_SUBNUM_MIC2 +715 0x4848 //TX_PREEQ_GAIN_MIC2_0 +716 0x4848 //TX_PREEQ_GAIN_MIC2_1 +717 0x4848 //TX_PREEQ_GAIN_MIC2_2 +718 0x4848 //TX_PREEQ_GAIN_MIC2_3 +719 0x4848 //TX_PREEQ_GAIN_MIC2_4 +720 0x4848 //TX_PREEQ_GAIN_MIC2_5 +721 0x4848 //TX_PREEQ_GAIN_MIC2_6 +722 0x4848 //TX_PREEQ_GAIN_MIC2_7 +723 0x4848 //TX_PREEQ_GAIN_MIC2_8 +724 0x4848 //TX_PREEQ_GAIN_MIC2_9 +725 0x4848 //TX_PREEQ_GAIN_MIC2_10 +726 0x4848 //TX_PREEQ_GAIN_MIC2_11 +727 0x4848 //TX_PREEQ_GAIN_MIC2_12 +728 0x4848 //TX_PREEQ_GAIN_MIC2_13 +729 0x4848 //TX_PREEQ_GAIN_MIC2_14 +730 0x4848 //TX_PREEQ_GAIN_MIC2_15 +731 0x4848 //TX_PREEQ_GAIN_MIC2_16 +732 0x4848 //TX_PREEQ_GAIN_MIC2_17 +733 0x4848 //TX_PREEQ_GAIN_MIC2_18 +734 0x4848 //TX_PREEQ_GAIN_MIC2_19 +735 0x4848 //TX_PREEQ_GAIN_MIC2_20 +736 0x4848 //TX_PREEQ_GAIN_MIC2_21 +737 0x4848 //TX_PREEQ_GAIN_MIC2_22 +738 0x4848 //TX_PREEQ_GAIN_MIC2_23 +739 0x0608 //TX_PREEQ_BIN_MIC2_0 +740 0x0808 //TX_PREEQ_BIN_MIC2_1 +741 0x0808 //TX_PREEQ_BIN_MIC2_2 +742 0x0808 //TX_PREEQ_BIN_MIC2_3 +743 0x0808 //TX_PREEQ_BIN_MIC2_4 +744 0x0808 //TX_PREEQ_BIN_MIC2_5 +745 0x0808 //TX_PREEQ_BIN_MIC2_6 +746 0x0808 //TX_PREEQ_BIN_MIC2_7 +747 0x0808 //TX_PREEQ_BIN_MIC2_8 +748 0x0808 //TX_PREEQ_BIN_MIC2_9 +749 0x0808 //TX_PREEQ_BIN_MIC2_10 +750 0x0808 //TX_PREEQ_BIN_MIC2_11 +751 0x0808 //TX_PREEQ_BIN_MIC2_12 +752 0x0808 //TX_PREEQ_BIN_MIC2_13 +753 0x0808 //TX_PREEQ_BIN_MIC2_14 +754 0x0200 //TX_PREEQ_BIN_MIC2_15 +755 0x0000 //TX_PREEQ_BIN_MIC2_16 +756 0x0000 //TX_PREEQ_BIN_MIC2_17 +757 0x0000 //TX_PREEQ_BIN_MIC2_18 +758 0x0000 //TX_PREEQ_BIN_MIC2_19 +759 0x0000 //TX_PREEQ_BIN_MIC2_20 +760 0x0000 //TX_PREEQ_BIN_MIC2_21 +761 0x0000 //TX_PREEQ_BIN_MIC2_22 +762 0x0000 //TX_PREEQ_BIN_MIC2_23 +763 0x0006 //TX_MASKING_ABILITY +764 0x0800 //TX_NND_WEIGHT +765 0x0065 //TX_MIC_CALIBRATION_0 +766 0x0065 //TX_MIC_CALIBRATION_1 +767 0x0065 //TX_MIC_CALIBRATION_2 +768 0x0065 //TX_MIC_CALIBRATION_3 +769 0x0044 //TX_MIC_PWR_BIAS_0 +770 0x0044 //TX_MIC_PWR_BIAS_1 +771 0x0044 //TX_MIC_PWR_BIAS_2 +772 0x0044 //TX_MIC_PWR_BIAS_3 +773 0x0000 //TX_GAIN_LIMIT_0 +774 0x0000 //TX_GAIN_LIMIT_1 +775 0x0007 //TX_GAIN_LIMIT_2 +776 0x0007 //TX_GAIN_LIMIT_3 +777 0x7F5B //TX_BVE_NOVAD0_ALPHADOWN +778 0x7FDE //TX_BVE_VAD0_ALPHAUP +779 0x7F3A //TX_BVE_VAD0_ALPHADOWN +780 0x2000 //TX_BVE_GAINWEIGHT_NOFEVADLI +781 0x7F5B //TX_BVE_FEVADLI_ALPHA +782 0x7F19 //TX_BVE_NOVAD0_ALPHAUP +783 0x1000 //TX_TDDRC_ALPHA_UP_01 +784 0x1000 //TX_TDDRC_ALPHA_UP_02 +785 0x1000 //TX_TDDRC_ALPHA_UP_03 +786 0x1000 //TX_TDDRC_ALPHA_UP_04 +787 0x7EB8 //TX_TDDRC_ALPHA_DWN_01 +788 0x7EB8 //TX_TDDRC_ALPHA_DWN_02 +789 0x7EB8 //TX_TDDRC_ALPHA_DWN_03 +790 0x7EB8 //TX_TDDRC_ALPHA_DWN_04 +791 0x7FFF //TX_TDDRC_TD_DRC_LIMIT +792 0x0800 //TX_TDDRC_POST_LIMIT_GAIN +793 0x0000 //TX_TDDRC_RESRV_0 +794 0x0000 //TX_TDDRC_RESRV_1 +795 0x0018 //TX_FDDRC_BAND_MARGIN_0 +796 0x0030 //TX_FDDRC_BAND_MARGIN_1 +797 0x0050 //TX_FDDRC_BAND_MARGIN_2 +798 0x0080 //TX_FDDRC_BAND_MARGIN_3 +799 0x0007 //TX_FDDRC_BLOCK_EXP +800 0x5000 //TX_FDDRC_THRD_2_0 +801 0x5000 //TX_FDDRC_THRD_2_1 +802 0x5000 //TX_FDDRC_THRD_2_2 +803 0x5000 //TX_FDDRC_THRD_2_3 +804 0x6400 //TX_FDDRC_THRD_3_0 +805 0x6400 //TX_FDDRC_THRD_3_1 +806 0x6400 //TX_FDDRC_THRD_3_2 +807 0x6400 //TX_FDDRC_THRD_3_3 +808 0x2000 //TX_FDDRC_SLANT_0_0 +809 0x2000 //TX_FDDRC_SLANT_0_1 +810 0x2000 //TX_FDDRC_SLANT_0_2 +811 0x2000 //TX_FDDRC_SLANT_0_3 +812 0x5333 //TX_FDDRC_SLANT_1_0 +813 0x5333 //TX_FDDRC_SLANT_1_1 +814 0x5333 //TX_FDDRC_SLANT_1_2 +815 0x5333 //TX_FDDRC_SLANT_1_3 +816 0x0010 //TX_DEADMIC_SILENCE_TH +817 0x0600 //TX_MIC_DEGRADE_TH +818 0x0078 //TX_DEADMIC_CNT +819 0x0078 //TX_MIC_DEGRADE_CNT +820 0x0000 //TX_FDDRC_RESRV_4 +821 0x0000 //TX_FDDRC_RESRV_5 +822 0x0000 //TX_FDDRC_RESRV_6 +823 0x7FFF //TX_KS_NOISEPASTE_FACTOR +824 0x0001 //TX_KS_CONFIG +825 0x7FFF //TX_KS_GAIN_MIN +826 0x0000 //TX_KS_RESRV_0 +827 0x0000 //TX_KS_RESRV_1 +828 0x0000 //TX_KS_RESRV_2 +829 0x7C00 //TX_LAMBDA_PKA_FP +830 0x2000 //TX_TPKA_FP +831 0x0080 //TX_MIN_G_FP +832 0x2000 //TX_MAX_G_FP +833 0x0FA0 //TX_FFP_FP_K_METAL +834 0x4000 //TX_A_POST_FLT_FP +835 0x0F5C //TX_RTO_OUTBEAM_TH +836 0x4CCD //TX_TPKA_FP_THD +837 0x0000 //TX_MAX_G_FP_BLK +838 0x0000 //TX_FFP_FADEIN +839 0x0000 //TX_FFP_FADEOUT +840 0x0000 //TX_WHISPERCTH +841 0x0000 //TX_WHISPERHOLDT +842 0x0000 //TX_WHISP_ENTHH +843 0x0000 //TX_WHISP_ENTHL +844 0x0000 //TX_WHISP_RTOTH +845 0x0000 //TX_WHISP_RTOTH2 +846 0x0096 //TX_MUTE_PERIOD +847 0x0000 //TX_FADE_IN_PERIOD +848 0x0100 //TX_FFP_RESRV_2 +849 0x0020 //TX_FFP_RESRV_3 +850 0x0000 //TX_FFP_RESRV_4 +851 0x0000 //TX_FFP_RESRV_5 +852 0x0000 //TX_FFP_RESRV_6 +853 0x0002 //TX_FILTINDX +854 0x0000 //TX_TDDRC_THRD_0 +855 0x0010 //TX_TDDRC_THRD_1 +856 0x1500 //TX_TDDRC_THRD_2 +857 0x1500 //TX_TDDRC_THRD_3 +858 0x3000 //TX_TDDRC_SLANT_0 +859 0x6E00 //TX_TDDRC_SLANT_1 +860 0x1000 //TX_TDDRC_ALPHA_UP_00 +861 0x7EB8 //TX_TDDRC_ALPHA_DWN_00 +862 0x0000 //TX_TDDRC_HMNC_FLAG +863 0x199A //TX_TDDRC_HMNC_GAIN +864 0x0000 //TX_TDDRC_SMT_FLAG +865 0x0CCD //TX_TDDRC_SMT_W +866 0x05A0 //TX_TDDRC_DRC_GAIN +867 0x7FFF //TX_TDDRC_LMT_THRD +868 0x0000 //TX_TDDRC_LMT_ALPHA +869 0x0000 //TX_TFMASKLTH +870 0x0000 //TX_TFMASKLTHL +871 0x0CCD //TX_TFMASKHTH +872 0x0CCD //TX_TFMASKLTH_BINVAD +873 0xF333 //TX_TFMASKLTH_NS_EST +874 0xF800 //TX_TFMASKLTH_DOA +875 0x0CCD //TX_TFMASKTH_BLESSCUT +876 0x1000 //TX_B_LESSCUT_RTO_MASK +877 0x3800 //TX_SB_RHO_MEAN_TH_ABN +878 0x2000 //TX_B_POST_FLT_MASK +879 0x0000 //TX_B_POST_FLT_MASK1 +880 0x6333 //TX_GAIN_WIND_MASK +881 0x7FFF //TX_TFMASK_BFSTRICT_MUSIC +882 0x0000 //TX_TFMASK_BFSTRICT_NOMUSIC +883 0x7333 //TX_FASTNS_OUTIN_TH +884 0x0CCD //TX_FASTNS_TFMASK_TH +885 0x0CCD //TX_FASTNS_TFMASKBIN_TH1 +886 0x0CCD //TX_FASTNS_TFMASKBIN_TH2 +887 0x0CCD //TX_FASTNS_TFMASKBIN_TH3 +888 0x0028 //TX_FASTNS_ARSPC_TH +889 0xC000 //TX_FASTNS_MASK5_TH +890 0x0810 //TX_POSTSSA_MIN_G_VR_MASK +891 0x1000 //TX_A_LESSCUT_RTO_MASK +892 0x1770 //TX_FASTNS_NOISETH +893 0xC000 //TX_FASTNS_SSA_THLFL +894 0xC000 //TX_FASTNS_SSA_THHFL +895 0xCCCC //TX_FASTNS_SSA_THLFH +896 0xD999 //TX_FASTNS_SSA_THHFH +897 0x2339 //TX_SENDFUNC_REG_MICMUTE +898 0x0021 //TX_SENDFUNC_REG_MICMUTE1 +899 0x02BC //TX_MICMUTE_RATIO_THR +900 0x0140 //TX_MICMUTE_AMP_THR +901 0x0004 //TX_MICMUTE_HPF_IND +902 0x00C0 //TX_MICMUTE_LOG_EYR_TH +903 0x0008 //TX_MICMUTE_CVG_TIME +904 0x0008 //TX_MICMUTE_RELEASE_TIME +905 0x01FE //TX_MIC_VOLUME_MIC0MUTE +906 0x0020 //TX_MICMUTE_EPD_OFFSET_0 +907 0x001E //TX_MICMUTE_FRQ_AEC_L +908 0x7999 //TX_MICMUTE_EAD_THR +909 0x7FFF //TX_MICMUTE_LAMBDA_CB_NLE +910 0x7FFF //TX_MICMUTE_LAMBDA_RE_EST +911 0x4000 //TX_DTD_THR1_MICMUTE_0 +912 0x7000 //TX_DTD_THR1_MICMUTE_1 +913 0x7FFF //TX_DTD_THR1_MICMUTE_2 +914 0x7FFF //TX_DTD_THR1_MICMUTE_3 +915 0x6CCC //TX_DTD_THR2_MICMUTE_0 +916 0x0400 //TX_MICMUTE_MIN_EQ_RE_EST_0 +917 0x0400 //TX_MICMUTE_MIN_EQ_RE_EST_1 +918 0x1000 //TX_MICMUTE_MIN_EQ_RE_EST_2 +919 0x7FFF //TX_MICMUTE_MIN_EQ_RE_EST_3 +920 0x7FFF //TX_MICMUTE_MIN_EQ_RE_EST_4 +921 0x4000 //TX_MICMUTE_C_POST_FLT +922 0x03E8 //TX_MICMUTE_DT_CUT_K +923 0x0001 //TX_MICMUTE_DT_CUT_THR +924 0x03E8 //TX_MICMUTE_DT_CUT_K2 +925 0x0001 //TX_MICMUTE_DT_CUT_THR2 +926 0x0064 //TX_MICMUTE_DT2_HOLD_N +927 0x1000 //TX_MICMUTE_RATIODTH_THCUT +928 0x1000 //TX_MICMUTE_B_POST_FLT_ECHOL +929 0x7FFF //TX_MICMUTE_B_POST_FLT_ECHOH +930 0x0400 //TX_MICMUTE_C_POST_FLT_MASK +931 0x7999 //TX_MICMUTE_RATIODTL_CUT_TH +932 0x0258 //TX_MICMUTE_DT_CUT_K1 +933 0x0800 //TX_MICMUTE_N2_SN_EST +934 0xFC00 //TX_MICMUTE_THR_SN_EST_0 +935 0x001C //TX_MICMUTE_MIN_G_CTRL_0 +936 0x6000 //TX_MICMUTE_A_POST_FILT_S_0 +937 0x7000 //TX_MICMUTE_B_POST_FILT_0 +938 0x2710 //TX_MIC1RUB_AMP_THR +939 0x0010 //TX_MIC1MUTE_RATIO_THR +940 0x0450 //TX_MIC1MUTE_AMP_THR +941 0x0008 //TX_MIC1MUTE_CVG_TIME +942 0x0008 //TX_MIC1MUTE_RELEASE_TIME +943 0x0000 //TX_AMS_RESRV_01 +944 0x0000 //TX_AMS_RESRV_02 +945 0x0000 //TX_AMS_RESRV_03 +946 0x0000 //TX_AMS_RESRV_04 +947 0x0000 //TX_AMS_RESRV_05 +948 0x0000 //TX_AMS_RESRV_06 +949 0x0000 //TX_AMS_RESRV_07 +950 0x0000 //TX_AMS_RESRV_08 +951 0x0000 //TX_AMS_RESRV_09 +952 0x0000 //TX_AMS_RESRV_10 +953 0x0000 //TX_AMS_RESRV_11 +954 0x0000 //TX_AMS_RESRV_12 +955 0x0000 //TX_AMS_RESRV_13 +956 0x0000 //TX_AMS_RESRV_14 +957 0x0000 //TX_AMS_RESRV_15 +958 0x0000 //TX_AMS_RESRV_16 +959 0x0000 //TX_AMS_RESRV_17 +960 0x0000 //TX_AMS_RESRV_18 +961 0x0000 //TX_AMS_RESRV_19 +#RX +0 0x000C //RX_RECVFUNC_MODE_0 +1 0x0000 //RX_RECVFUNC_MODE_1 +2 0x0000 //RX_SAMPLINGFREQ_SIG +3 0x0000 //RX_SAMPLINGFREQ_PROC +4 0x000A //RX_FRAME_SZ +5 0x0000 //RX_DELAY_OPT +6 0x1000 //RX_TDDRC_ALPHA_UP_1 +7 0x1000 //RX_TDDRC_ALPHA_UP_2 +8 0x1000 //RX_TDDRC_ALPHA_UP_3 +9 0x1000 //RX_TDDRC_ALPHA_UP_4 +10 0x0800 //RX_PGA +11 0x7FFF //RX_A_HP +12 0x4000 //RX_B_PE +13 0x7800 //RX_THR_PITCH_DET_0 +14 0x7000 //RX_THR_PITCH_DET_1 +15 0x6000 //RX_THR_PITCH_DET_2 +16 0x0008 //RX_PITCH_BFR_LEN +17 0x0003 //RX_SBD_PITCH_DET +18 0x0100 //RX_PP_RESRV_0 +19 0x0020 //RX_PP_RESRV_1 +20 0x0400 //RX_N_SN_EST +21 0x000C //RX_N2_SN_EST +22 0x0014 //RX_NS_LVL_CTRL +23 0xF800 //RX_THR_SN_EST +24 0x7E00 //RX_LAMBDA_PFILT +25 0x000A //RX_FENS_RESRV_0 +26 0x0190 //RX_FENS_RESRV_1 +27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +30 0x0002 //RX_EXTRA_NS_L +31 0x0800 //RX_EXTRA_NS_A +32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +33 0x7000 //RX_TDDRC_LIMITER_THRD +34 0x0800 //RX_TDDRC_LIMITER_GAIN +35 0x199A //RX_A_POST_FLT +36 0x0000 //RX_LMT_THRD +37 0x4000 //RX_LMT_ALPHA +38 0x0030 //RX_FDEQ_SUBNUM +39 0x4848 //RX_FDEQ_GAIN_0 +40 0x4848 //RX_FDEQ_GAIN_1 +41 0x4844 //RX_FDEQ_GAIN_2 +42 0x4A4C //RX_FDEQ_GAIN_3 +43 0x4E50 //RX_FDEQ_GAIN_4 +44 0x5254 //RX_FDEQ_GAIN_5 +45 0x5658 //RX_FDEQ_GAIN_6 +46 0x5A5C //RX_FDEQ_GAIN_7 +47 0x5C5C //RX_FDEQ_GAIN_8 +48 0x5C5C //RX_FDEQ_GAIN_9 +49 0x5C5C //RX_FDEQ_GAIN_10 +50 0x5C48 //RX_FDEQ_GAIN_11 +51 0x4848 //RX_FDEQ_GAIN_12 +52 0x4848 //RX_FDEQ_GAIN_13 +53 0x4848 //RX_FDEQ_GAIN_14 +54 0x4848 //RX_FDEQ_GAIN_15 +55 0x4848 //RX_FDEQ_GAIN_16 +56 0x4848 //RX_FDEQ_GAIN_17 +57 0x4848 //RX_FDEQ_GAIN_18 +58 0x4848 //RX_FDEQ_GAIN_19 +59 0x4848 //RX_FDEQ_GAIN_20 +60 0x4848 //RX_FDEQ_GAIN_21 +61 0x4848 //RX_FDEQ_GAIN_22 +62 0x4848 //RX_FDEQ_GAIN_23 +63 0x0202 //RX_FDEQ_BIN_0 +64 0x0203 //RX_FDEQ_BIN_1 +65 0x0402 //RX_FDEQ_BIN_2 +66 0x0303 //RX_FDEQ_BIN_3 +67 0x0303 //RX_FDEQ_BIN_4 +68 0x0303 //RX_FDEQ_BIN_5 +69 0x0303 //RX_FDEQ_BIN_6 +70 0x0303 //RX_FDEQ_BIN_7 +71 0x0A0A //RX_FDEQ_BIN_8 +72 0x0A0E //RX_FDEQ_BIN_9 +73 0x0000 //RX_FDEQ_BIN_10 +74 0x0000 //RX_FDEQ_BIN_11 +75 0x0000 //RX_FDEQ_BIN_12 +76 0x0000 //RX_FDEQ_BIN_13 +77 0x0000 //RX_FDEQ_BIN_14 +78 0x0000 //RX_FDEQ_BIN_15 +79 0x0000 //RX_FDEQ_BIN_16 +80 0x0000 //RX_FDEQ_BIN_17 +81 0x0000 //RX_FDEQ_BIN_18 +82 0x0000 //RX_FDEQ_BIN_19 +83 0x0000 //RX_FDEQ_BIN_20 +84 0x0000 //RX_FDEQ_BIN_21 +85 0x0000 //RX_FDEQ_BIN_22 +86 0x0000 //RX_FDEQ_BIN_23 +87 0x4000 //RX_FDEQ_RESRV_0 +88 0x0320 //RX_FDEQ_RESRV_1 +89 0x0018 //RX_FDDRC_BAND_MARGIN_0 +90 0x0030 //RX_FDDRC_BAND_MARGIN_1 +91 0x0050 //RX_FDDRC_BAND_MARGIN_2 +92 0x0080 //RX_FDDRC_BAND_MARGIN_3 +93 0x0007 //RX_FDDRC_BLOCK_EXP +94 0x5000 //RX_FDDRC_THRD_2_0 +95 0x5000 //RX_FDDRC_THRD_2_1 +96 0x5000 //RX_FDDRC_THRD_2_2 +97 0x5000 //RX_FDDRC_THRD_2_3 +98 0x6400 //RX_FDDRC_THRD_3_0 +99 0x6400 //RX_FDDRC_THRD_3_1 +100 0x6400 //RX_FDDRC_THRD_3_2 +101 0x6400 //RX_FDDRC_THRD_3_3 +102 0x2000 //RX_FDDRC_SLANT_0_0 +103 0x2000 //RX_FDDRC_SLANT_0_1 +104 0x2000 //RX_FDDRC_SLANT_0_2 +105 0x2000 //RX_FDDRC_SLANT_0_3 +106 0x5333 //RX_FDDRC_SLANT_1_0 +107 0x5333 //RX_FDDRC_SLANT_1_1 +108 0x5333 //RX_FDDRC_SLANT_1_2 +109 0x5333 //RX_FDDRC_SLANT_1_3 +110 0x0000 //RX_FDDRC_RESRV_0 +111 0x0002 //RX_FILTINDX +112 0x0000 //RX_TDDRC_THRD_0 +113 0x0000 //RX_TDDRC_THRD_1 +114 0x1800 //RX_TDDRC_THRD_2 +115 0x1800 //RX_TDDRC_THRD_3 +116 0x3000 //RX_TDDRC_SLANT_0 +117 0x6E00 //RX_TDDRC_SLANT_1 +118 0x1000 //RX_TDDRC_ALPHA_UP_0 +119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +120 0x0000 //RX_TDDRC_HMNC_FLAG +121 0x199A //RX_TDDRC_HMNC_GAIN +122 0x0001 //RX_TDDRC_SMT_FLAG +123 0x0CCD //RX_TDDRC_SMT_W +124 0x0360 //RX_TDDRC_DRC_GAIN +125 0x7C00 //RX_LAMBDA_PKA_FP +126 0x2000 //RX_TPKA_FP +127 0x2000 //RX_MIN_G_FP +128 0x0080 //RX_MAX_G_FP +129 0x0100 //RX_SPK_VOL +130 0x0000 //RX_VOL_RESRV_0 +131 0x0000 //RX_MAXLEVEL_CNG +132 0x3000 //RX_BWE_UV_TH +133 0x3000 //RX_BWE_UV_TH2 +134 0x1800 //RX_BWE_UV_TH3 +135 0x1000 //RX_BWE_V_TH +136 0x04CD //RX_BWE_GAIN1_V_TH1 +137 0x0F33 //RX_BWE_GAIN1_V_TH2 +138 0x7333 //RX_BWE_UV_EQ +139 0x199A //RX_BWE_V_EQ +140 0x7333 //RX_BWE_TONE_TH +141 0x0004 //RX_BWE_UV_HOLD_T +142 0x6CCD //RX_BWE_GAIN2_ALPHA +143 0x799A //RX_BWE_GAIN3_ALPHA +144 0x001E //RX_BWE_CUTOFF +145 0x3000 //RX_BWE_GAINFILL +146 0x3200 //RX_BWE_MAXTH_TONE +147 0x2000 //RX_BWE_EQ_0 +148 0x2000 //RX_BWE_EQ_1 +149 0x2000 //RX_BWE_EQ_2 +150 0x2000 //RX_BWE_EQ_3 +151 0x2000 //RX_BWE_EQ_4 +152 0x2000 //RX_BWE_EQ_5 +153 0x2000 //RX_BWE_EQ_6 +154 0x0000 //RX_BWE_RESRV_0 +155 0x0000 //RX_BWE_RESRV_1 +156 0x0000 //RX_BWE_RESRV_2 +#VOL 0 +6 0x1000 //RX_TDDRC_ALPHA_UP_1 +7 0x1000 //RX_TDDRC_ALPHA_UP_2 +8 0x1000 //RX_TDDRC_ALPHA_UP_3 +9 0x1000 //RX_TDDRC_ALPHA_UP_4 +27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +33 0x7000 //RX_TDDRC_LIMITER_THRD +34 0x0800 //RX_TDDRC_LIMITER_GAIN +112 0x0000 //RX_TDDRC_THRD_0 +113 0x0000 //RX_TDDRC_THRD_1 +114 0x1800 //RX_TDDRC_THRD_2 +115 0x1800 //RX_TDDRC_THRD_3 +116 0x3000 //RX_TDDRC_SLANT_0 +117 0x6E00 //RX_TDDRC_SLANT_1 +118 0x1000 //RX_TDDRC_ALPHA_UP_0 +119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +120 0x0000 //RX_TDDRC_HMNC_FLAG +121 0x199A //RX_TDDRC_HMNC_GAIN +122 0x0001 //RX_TDDRC_SMT_FLAG +123 0x0CCD //RX_TDDRC_SMT_W +124 0x0360 //RX_TDDRC_DRC_GAIN +38 0x0030 //RX_FDEQ_SUBNUM +39 0x4848 //RX_FDEQ_GAIN_0 +40 0x4848 //RX_FDEQ_GAIN_1 +41 0x4844 //RX_FDEQ_GAIN_2 +42 0x4A4C //RX_FDEQ_GAIN_3 +43 0x4E50 //RX_FDEQ_GAIN_4 +44 0x5254 //RX_FDEQ_GAIN_5 +45 0x5658 //RX_FDEQ_GAIN_6 +46 0x5A5C //RX_FDEQ_GAIN_7 +47 0x5C5C //RX_FDEQ_GAIN_8 +48 0x5C5C //RX_FDEQ_GAIN_9 +49 0x5C5C //RX_FDEQ_GAIN_10 +50 0x5C48 //RX_FDEQ_GAIN_11 +51 0x4848 //RX_FDEQ_GAIN_12 +52 0x4848 //RX_FDEQ_GAIN_13 +53 0x4848 //RX_FDEQ_GAIN_14 +54 0x4848 //RX_FDEQ_GAIN_15 +55 0x4848 //RX_FDEQ_GAIN_16 +56 0x4848 //RX_FDEQ_GAIN_17 +57 0x4848 //RX_FDEQ_GAIN_18 +58 0x4848 //RX_FDEQ_GAIN_19 +59 0x4848 //RX_FDEQ_GAIN_20 +60 0x4848 //RX_FDEQ_GAIN_21 +61 0x4848 //RX_FDEQ_GAIN_22 +62 0x4848 //RX_FDEQ_GAIN_23 +63 0x0202 //RX_FDEQ_BIN_0 +64 0x0203 //RX_FDEQ_BIN_1 +65 0x0402 //RX_FDEQ_BIN_2 +66 0x0303 //RX_FDEQ_BIN_3 +67 0x0303 //RX_FDEQ_BIN_4 +68 0x0303 //RX_FDEQ_BIN_5 +69 0x0303 //RX_FDEQ_BIN_6 +70 0x0303 //RX_FDEQ_BIN_7 +71 0x0A0A //RX_FDEQ_BIN_8 +72 0x0A0E //RX_FDEQ_BIN_9 +73 0x0000 //RX_FDEQ_BIN_10 +74 0x0000 //RX_FDEQ_BIN_11 +75 0x0000 //RX_FDEQ_BIN_12 +76 0x0000 //RX_FDEQ_BIN_13 +77 0x0000 //RX_FDEQ_BIN_14 +78 0x0000 //RX_FDEQ_BIN_15 +79 0x0000 //RX_FDEQ_BIN_16 +80 0x0000 //RX_FDEQ_BIN_17 +81 0x0000 //RX_FDEQ_BIN_18 +82 0x0000 //RX_FDEQ_BIN_19 +83 0x0000 //RX_FDEQ_BIN_20 +84 0x0000 //RX_FDEQ_BIN_21 +85 0x0000 //RX_FDEQ_BIN_22 +86 0x0000 //RX_FDEQ_BIN_23 +87 0x4000 //RX_FDEQ_RESRV_0 +88 0x0320 //RX_FDEQ_RESRV_1 +89 0x0018 //RX_FDDRC_BAND_MARGIN_0 +90 0x0030 //RX_FDDRC_BAND_MARGIN_1 +91 0x0050 //RX_FDDRC_BAND_MARGIN_2 +92 0x0080 //RX_FDDRC_BAND_MARGIN_3 +93 0x0007 //RX_FDDRC_BLOCK_EXP +94 0x5000 //RX_FDDRC_THRD_2_0 +95 0x5000 //RX_FDDRC_THRD_2_1 +96 0x5000 //RX_FDDRC_THRD_2_2 +97 0x5000 //RX_FDDRC_THRD_2_3 +98 0x6400 //RX_FDDRC_THRD_3_0 +99 0x6400 //RX_FDDRC_THRD_3_1 +100 0x6400 //RX_FDDRC_THRD_3_2 +101 0x6400 //RX_FDDRC_THRD_3_3 +102 0x2000 //RX_FDDRC_SLANT_0_0 +103 0x2000 //RX_FDDRC_SLANT_0_1 +104 0x2000 //RX_FDDRC_SLANT_0_2 +105 0x2000 //RX_FDDRC_SLANT_0_3 +106 0x5333 //RX_FDDRC_SLANT_1_0 +107 0x5333 //RX_FDDRC_SLANT_1_1 +108 0x5333 //RX_FDDRC_SLANT_1_2 +109 0x5333 //RX_FDDRC_SLANT_1_3 +110 0x0000 //RX_FDDRC_RESRV_0 +129 0x0100 //RX_SPK_VOL +130 0x0000 //RX_VOL_RESRV_0 +#VOL 1 +6 0x1000 //RX_TDDRC_ALPHA_UP_1 +7 0x1000 //RX_TDDRC_ALPHA_UP_2 +8 0x1000 //RX_TDDRC_ALPHA_UP_3 +9 0x1000 //RX_TDDRC_ALPHA_UP_4 +27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +33 0x7000 //RX_TDDRC_LIMITER_THRD +34 0x0800 //RX_TDDRC_LIMITER_GAIN +112 0x0000 //RX_TDDRC_THRD_0 +113 0x0000 //RX_TDDRC_THRD_1 +114 0x1800 //RX_TDDRC_THRD_2 +115 0x1800 //RX_TDDRC_THRD_3 +116 0x3000 //RX_TDDRC_SLANT_0 +117 0x6E00 //RX_TDDRC_SLANT_1 +118 0x1000 //RX_TDDRC_ALPHA_UP_0 +119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +120 0x0000 //RX_TDDRC_HMNC_FLAG +121 0x199A //RX_TDDRC_HMNC_GAIN +122 0x0001 //RX_TDDRC_SMT_FLAG +123 0x0CCD //RX_TDDRC_SMT_W +124 0x0360 //RX_TDDRC_DRC_GAIN +38 0x0030 //RX_FDEQ_SUBNUM +39 0x4848 //RX_FDEQ_GAIN_0 +40 0x4848 //RX_FDEQ_GAIN_1 +41 0x4844 //RX_FDEQ_GAIN_2 +42 0x4A4C //RX_FDEQ_GAIN_3 +43 0x4E50 //RX_FDEQ_GAIN_4 +44 0x5254 //RX_FDEQ_GAIN_5 +45 0x5658 //RX_FDEQ_GAIN_6 +46 0x5A5C //RX_FDEQ_GAIN_7 +47 0x5C5C //RX_FDEQ_GAIN_8 +48 0x5C5C //RX_FDEQ_GAIN_9 +49 0x5C5C //RX_FDEQ_GAIN_10 +50 0x5C48 //RX_FDEQ_GAIN_11 +51 0x4848 //RX_FDEQ_GAIN_12 +52 0x4848 //RX_FDEQ_GAIN_13 +53 0x4848 //RX_FDEQ_GAIN_14 +54 0x4848 //RX_FDEQ_GAIN_15 +55 0x4848 //RX_FDEQ_GAIN_16 +56 0x4848 //RX_FDEQ_GAIN_17 +57 0x4848 //RX_FDEQ_GAIN_18 +58 0x4848 //RX_FDEQ_GAIN_19 +59 0x4848 //RX_FDEQ_GAIN_20 +60 0x4848 //RX_FDEQ_GAIN_21 +61 0x4848 //RX_FDEQ_GAIN_22 +62 0x4848 //RX_FDEQ_GAIN_23 +63 0x0202 //RX_FDEQ_BIN_0 +64 0x0203 //RX_FDEQ_BIN_1 +65 0x0402 //RX_FDEQ_BIN_2 +66 0x0303 //RX_FDEQ_BIN_3 +67 0x0303 //RX_FDEQ_BIN_4 +68 0x0303 //RX_FDEQ_BIN_5 +69 0x0303 //RX_FDEQ_BIN_6 +70 0x0303 //RX_FDEQ_BIN_7 +71 0x0A0A //RX_FDEQ_BIN_8 +72 0x0A0E //RX_FDEQ_BIN_9 +73 0x0000 //RX_FDEQ_BIN_10 +74 0x0000 //RX_FDEQ_BIN_11 +75 0x0000 //RX_FDEQ_BIN_12 +76 0x0000 //RX_FDEQ_BIN_13 +77 0x0000 //RX_FDEQ_BIN_14 +78 0x0000 //RX_FDEQ_BIN_15 +79 0x0000 //RX_FDEQ_BIN_16 +80 0x0000 //RX_FDEQ_BIN_17 +81 0x0000 //RX_FDEQ_BIN_18 +82 0x0000 //RX_FDEQ_BIN_19 +83 0x0000 //RX_FDEQ_BIN_20 +84 0x0000 //RX_FDEQ_BIN_21 +85 0x0000 //RX_FDEQ_BIN_22 +86 0x0000 //RX_FDEQ_BIN_23 +87 0x4000 //RX_FDEQ_RESRV_0 +88 0x0320 //RX_FDEQ_RESRV_1 +89 0x0018 //RX_FDDRC_BAND_MARGIN_0 +90 0x0030 //RX_FDDRC_BAND_MARGIN_1 +91 0x0050 //RX_FDDRC_BAND_MARGIN_2 +92 0x0080 //RX_FDDRC_BAND_MARGIN_3 +93 0x0007 //RX_FDDRC_BLOCK_EXP +94 0x5000 //RX_FDDRC_THRD_2_0 +95 0x5000 //RX_FDDRC_THRD_2_1 +96 0x5000 //RX_FDDRC_THRD_2_2 +97 0x5000 //RX_FDDRC_THRD_2_3 +98 0x6400 //RX_FDDRC_THRD_3_0 +99 0x6400 //RX_FDDRC_THRD_3_1 +100 0x6400 //RX_FDDRC_THRD_3_2 +101 0x6400 //RX_FDDRC_THRD_3_3 +102 0x2000 //RX_FDDRC_SLANT_0_0 +103 0x2000 //RX_FDDRC_SLANT_0_1 +104 0x2000 //RX_FDDRC_SLANT_0_2 +105 0x2000 //RX_FDDRC_SLANT_0_3 +106 0x5333 //RX_FDDRC_SLANT_1_0 +107 0x5333 //RX_FDDRC_SLANT_1_1 +108 0x5333 //RX_FDDRC_SLANT_1_2 +109 0x5333 //RX_FDDRC_SLANT_1_3 +110 0x0000 //RX_FDDRC_RESRV_0 +129 0x0100 //RX_SPK_VOL +130 0x0000 //RX_VOL_RESRV_0 +#VOL 2 +6 0x1000 //RX_TDDRC_ALPHA_UP_1 +7 0x1000 //RX_TDDRC_ALPHA_UP_2 +8 0x1000 //RX_TDDRC_ALPHA_UP_3 +9 0x1000 //RX_TDDRC_ALPHA_UP_4 +27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +33 0x7000 //RX_TDDRC_LIMITER_THRD +34 0x0800 //RX_TDDRC_LIMITER_GAIN +112 0x0000 //RX_TDDRC_THRD_0 +113 0x0000 //RX_TDDRC_THRD_1 +114 0x1800 //RX_TDDRC_THRD_2 +115 0x1800 //RX_TDDRC_THRD_3 +116 0x3000 //RX_TDDRC_SLANT_0 +117 0x6E00 //RX_TDDRC_SLANT_1 +118 0x1000 //RX_TDDRC_ALPHA_UP_0 +119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +120 0x0000 //RX_TDDRC_HMNC_FLAG +121 0x199A //RX_TDDRC_HMNC_GAIN +122 0x0001 //RX_TDDRC_SMT_FLAG +123 0x0CCD //RX_TDDRC_SMT_W +124 0x0360 //RX_TDDRC_DRC_GAIN +38 0x0030 //RX_FDEQ_SUBNUM +39 0x4848 //RX_FDEQ_GAIN_0 +40 0x4848 //RX_FDEQ_GAIN_1 +41 0x4844 //RX_FDEQ_GAIN_2 +42 0x4A4C //RX_FDEQ_GAIN_3 +43 0x4E50 //RX_FDEQ_GAIN_4 +44 0x5254 //RX_FDEQ_GAIN_5 +45 0x5658 //RX_FDEQ_GAIN_6 +46 0x5A5C //RX_FDEQ_GAIN_7 +47 0x5C5C //RX_FDEQ_GAIN_8 +48 0x5C5C //RX_FDEQ_GAIN_9 +49 0x5C5C //RX_FDEQ_GAIN_10 +50 0x5C48 //RX_FDEQ_GAIN_11 +51 0x4848 //RX_FDEQ_GAIN_12 +52 0x4848 //RX_FDEQ_GAIN_13 +53 0x4848 //RX_FDEQ_GAIN_14 +54 0x4848 //RX_FDEQ_GAIN_15 +55 0x4848 //RX_FDEQ_GAIN_16 +56 0x4848 //RX_FDEQ_GAIN_17 +57 0x4848 //RX_FDEQ_GAIN_18 +58 0x4848 //RX_FDEQ_GAIN_19 +59 0x4848 //RX_FDEQ_GAIN_20 +60 0x4848 //RX_FDEQ_GAIN_21 +61 0x4848 //RX_FDEQ_GAIN_22 +62 0x4848 //RX_FDEQ_GAIN_23 +63 0x0202 //RX_FDEQ_BIN_0 +64 0x0203 //RX_FDEQ_BIN_1 +65 0x0402 //RX_FDEQ_BIN_2 +66 0x0303 //RX_FDEQ_BIN_3 +67 0x0303 //RX_FDEQ_BIN_4 +68 0x0303 //RX_FDEQ_BIN_5 +69 0x0303 //RX_FDEQ_BIN_6 +70 0x0303 //RX_FDEQ_BIN_7 +71 0x0A0A //RX_FDEQ_BIN_8 +72 0x0A0E //RX_FDEQ_BIN_9 +73 0x0000 //RX_FDEQ_BIN_10 +74 0x0000 //RX_FDEQ_BIN_11 +75 0x0000 //RX_FDEQ_BIN_12 +76 0x0000 //RX_FDEQ_BIN_13 +77 0x0000 //RX_FDEQ_BIN_14 +78 0x0000 //RX_FDEQ_BIN_15 +79 0x0000 //RX_FDEQ_BIN_16 +80 0x0000 //RX_FDEQ_BIN_17 +81 0x0000 //RX_FDEQ_BIN_18 +82 0x0000 //RX_FDEQ_BIN_19 +83 0x0000 //RX_FDEQ_BIN_20 +84 0x0000 //RX_FDEQ_BIN_21 +85 0x0000 //RX_FDEQ_BIN_22 +86 0x0000 //RX_FDEQ_BIN_23 +87 0x4000 //RX_FDEQ_RESRV_0 +88 0x0320 //RX_FDEQ_RESRV_1 +89 0x0018 //RX_FDDRC_BAND_MARGIN_0 +90 0x0030 //RX_FDDRC_BAND_MARGIN_1 +91 0x0050 //RX_FDDRC_BAND_MARGIN_2 +92 0x0080 //RX_FDDRC_BAND_MARGIN_3 +93 0x0007 //RX_FDDRC_BLOCK_EXP +94 0x5000 //RX_FDDRC_THRD_2_0 +95 0x5000 //RX_FDDRC_THRD_2_1 +96 0x5000 //RX_FDDRC_THRD_2_2 +97 0x5000 //RX_FDDRC_THRD_2_3 +98 0x6400 //RX_FDDRC_THRD_3_0 +99 0x6400 //RX_FDDRC_THRD_3_1 +100 0x6400 //RX_FDDRC_THRD_3_2 +101 0x6400 //RX_FDDRC_THRD_3_3 +102 0x2000 //RX_FDDRC_SLANT_0_0 +103 0x2000 //RX_FDDRC_SLANT_0_1 +104 0x2000 //RX_FDDRC_SLANT_0_2 +105 0x2000 //RX_FDDRC_SLANT_0_3 +106 0x5333 //RX_FDDRC_SLANT_1_0 +107 0x5333 //RX_FDDRC_SLANT_1_1 +108 0x5333 //RX_FDDRC_SLANT_1_2 +109 0x5333 //RX_FDDRC_SLANT_1_3 +110 0x0000 //RX_FDDRC_RESRV_0 +129 0x0100 //RX_SPK_VOL +130 0x0000 //RX_VOL_RESRV_0 +#VOL 3 +6 0x1000 //RX_TDDRC_ALPHA_UP_1 +7 0x1000 //RX_TDDRC_ALPHA_UP_2 +8 0x1000 //RX_TDDRC_ALPHA_UP_3 +9 0x1000 //RX_TDDRC_ALPHA_UP_4 +27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +33 0x7000 //RX_TDDRC_LIMITER_THRD +34 0x0800 //RX_TDDRC_LIMITER_GAIN +112 0x0000 //RX_TDDRC_THRD_0 +113 0x0000 //RX_TDDRC_THRD_1 +114 0x1800 //RX_TDDRC_THRD_2 +115 0x1800 //RX_TDDRC_THRD_3 +116 0x3000 //RX_TDDRC_SLANT_0 +117 0x6E00 //RX_TDDRC_SLANT_1 +118 0x1000 //RX_TDDRC_ALPHA_UP_0 +119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +120 0x0000 //RX_TDDRC_HMNC_FLAG +121 0x199A //RX_TDDRC_HMNC_GAIN +122 0x0001 //RX_TDDRC_SMT_FLAG +123 0x0CCD //RX_TDDRC_SMT_W +124 0x0360 //RX_TDDRC_DRC_GAIN +38 0x0030 //RX_FDEQ_SUBNUM +39 0x4848 //RX_FDEQ_GAIN_0 +40 0x4848 //RX_FDEQ_GAIN_1 +41 0x4844 //RX_FDEQ_GAIN_2 +42 0x4A4C //RX_FDEQ_GAIN_3 +43 0x4E50 //RX_FDEQ_GAIN_4 +44 0x5254 //RX_FDEQ_GAIN_5 +45 0x5658 //RX_FDEQ_GAIN_6 +46 0x5A5C //RX_FDEQ_GAIN_7 +47 0x5C5C //RX_FDEQ_GAIN_8 +48 0x5C5C //RX_FDEQ_GAIN_9 +49 0x5C5C //RX_FDEQ_GAIN_10 +50 0x5C48 //RX_FDEQ_GAIN_11 +51 0x4848 //RX_FDEQ_GAIN_12 +52 0x4848 //RX_FDEQ_GAIN_13 +53 0x4848 //RX_FDEQ_GAIN_14 +54 0x4848 //RX_FDEQ_GAIN_15 +55 0x4848 //RX_FDEQ_GAIN_16 +56 0x4848 //RX_FDEQ_GAIN_17 +57 0x4848 //RX_FDEQ_GAIN_18 +58 0x4848 //RX_FDEQ_GAIN_19 +59 0x4848 //RX_FDEQ_GAIN_20 +60 0x4848 //RX_FDEQ_GAIN_21 +61 0x4848 //RX_FDEQ_GAIN_22 +62 0x4848 //RX_FDEQ_GAIN_23 +63 0x0202 //RX_FDEQ_BIN_0 +64 0x0203 //RX_FDEQ_BIN_1 +65 0x0402 //RX_FDEQ_BIN_2 +66 0x0303 //RX_FDEQ_BIN_3 +67 0x0303 //RX_FDEQ_BIN_4 +68 0x0303 //RX_FDEQ_BIN_5 +69 0x0303 //RX_FDEQ_BIN_6 +70 0x0303 //RX_FDEQ_BIN_7 +71 0x0A0A //RX_FDEQ_BIN_8 +72 0x0A0E //RX_FDEQ_BIN_9 +73 0x0000 //RX_FDEQ_BIN_10 +74 0x0000 //RX_FDEQ_BIN_11 +75 0x0000 //RX_FDEQ_BIN_12 +76 0x0000 //RX_FDEQ_BIN_13 +77 0x0000 //RX_FDEQ_BIN_14 +78 0x0000 //RX_FDEQ_BIN_15 +79 0x0000 //RX_FDEQ_BIN_16 +80 0x0000 //RX_FDEQ_BIN_17 +81 0x0000 //RX_FDEQ_BIN_18 +82 0x0000 //RX_FDEQ_BIN_19 +83 0x0000 //RX_FDEQ_BIN_20 +84 0x0000 //RX_FDEQ_BIN_21 +85 0x0000 //RX_FDEQ_BIN_22 +86 0x0000 //RX_FDEQ_BIN_23 +87 0x4000 //RX_FDEQ_RESRV_0 +88 0x0320 //RX_FDEQ_RESRV_1 +89 0x0018 //RX_FDDRC_BAND_MARGIN_0 +90 0x0030 //RX_FDDRC_BAND_MARGIN_1 +91 0x0050 //RX_FDDRC_BAND_MARGIN_2 +92 0x0080 //RX_FDDRC_BAND_MARGIN_3 +93 0x0007 //RX_FDDRC_BLOCK_EXP +94 0x5000 //RX_FDDRC_THRD_2_0 +95 0x5000 //RX_FDDRC_THRD_2_1 +96 0x5000 //RX_FDDRC_THRD_2_2 +97 0x5000 //RX_FDDRC_THRD_2_3 +98 0x6400 //RX_FDDRC_THRD_3_0 +99 0x6400 //RX_FDDRC_THRD_3_1 +100 0x6400 //RX_FDDRC_THRD_3_2 +101 0x6400 //RX_FDDRC_THRD_3_3 +102 0x2000 //RX_FDDRC_SLANT_0_0 +103 0x2000 //RX_FDDRC_SLANT_0_1 +104 0x2000 //RX_FDDRC_SLANT_0_2 +105 0x2000 //RX_FDDRC_SLANT_0_3 +106 0x5333 //RX_FDDRC_SLANT_1_0 +107 0x5333 //RX_FDDRC_SLANT_1_1 +108 0x5333 //RX_FDDRC_SLANT_1_2 +109 0x5333 //RX_FDDRC_SLANT_1_3 +110 0x0000 //RX_FDDRC_RESRV_0 +129 0x0100 //RX_SPK_VOL +130 0x0000 //RX_VOL_RESRV_0 +#VOL 4 +6 0x1000 //RX_TDDRC_ALPHA_UP_1 +7 0x1000 //RX_TDDRC_ALPHA_UP_2 +8 0x1000 //RX_TDDRC_ALPHA_UP_3 +9 0x1000 //RX_TDDRC_ALPHA_UP_4 +27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +33 0x7000 //RX_TDDRC_LIMITER_THRD +34 0x0800 //RX_TDDRC_LIMITER_GAIN +112 0x0000 //RX_TDDRC_THRD_0 +113 0x0000 //RX_TDDRC_THRD_1 +114 0x1800 //RX_TDDRC_THRD_2 +115 0x1800 //RX_TDDRC_THRD_3 +116 0x3000 //RX_TDDRC_SLANT_0 +117 0x6E00 //RX_TDDRC_SLANT_1 +118 0x1000 //RX_TDDRC_ALPHA_UP_0 +119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +120 0x0000 //RX_TDDRC_HMNC_FLAG +121 0x199A //RX_TDDRC_HMNC_GAIN +122 0x0001 //RX_TDDRC_SMT_FLAG +123 0x0CCD //RX_TDDRC_SMT_W +124 0x0360 //RX_TDDRC_DRC_GAIN +38 0x0030 //RX_FDEQ_SUBNUM +39 0x4848 //RX_FDEQ_GAIN_0 +40 0x4848 //RX_FDEQ_GAIN_1 +41 0x4844 //RX_FDEQ_GAIN_2 +42 0x4A4C //RX_FDEQ_GAIN_3 +43 0x4E50 //RX_FDEQ_GAIN_4 +44 0x5254 //RX_FDEQ_GAIN_5 +45 0x5658 //RX_FDEQ_GAIN_6 +46 0x5A5C //RX_FDEQ_GAIN_7 +47 0x5C5C //RX_FDEQ_GAIN_8 +48 0x5C5C //RX_FDEQ_GAIN_9 +49 0x5C5C //RX_FDEQ_GAIN_10 +50 0x5C48 //RX_FDEQ_GAIN_11 +51 0x4848 //RX_FDEQ_GAIN_12 +52 0x4848 //RX_FDEQ_GAIN_13 +53 0x4848 //RX_FDEQ_GAIN_14 +54 0x4848 //RX_FDEQ_GAIN_15 +55 0x4848 //RX_FDEQ_GAIN_16 +56 0x4848 //RX_FDEQ_GAIN_17 +57 0x4848 //RX_FDEQ_GAIN_18 +58 0x4848 //RX_FDEQ_GAIN_19 +59 0x4848 //RX_FDEQ_GAIN_20 +60 0x4848 //RX_FDEQ_GAIN_21 +61 0x4848 //RX_FDEQ_GAIN_22 +62 0x4848 //RX_FDEQ_GAIN_23 +63 0x0202 //RX_FDEQ_BIN_0 +64 0x0203 //RX_FDEQ_BIN_1 +65 0x0402 //RX_FDEQ_BIN_2 +66 0x0303 //RX_FDEQ_BIN_3 +67 0x0303 //RX_FDEQ_BIN_4 +68 0x0303 //RX_FDEQ_BIN_5 +69 0x0303 //RX_FDEQ_BIN_6 +70 0x0303 //RX_FDEQ_BIN_7 +71 0x0A0A //RX_FDEQ_BIN_8 +72 0x0A0E //RX_FDEQ_BIN_9 +73 0x0000 //RX_FDEQ_BIN_10 +74 0x0000 //RX_FDEQ_BIN_11 +75 0x0000 //RX_FDEQ_BIN_12 +76 0x0000 //RX_FDEQ_BIN_13 +77 0x0000 //RX_FDEQ_BIN_14 +78 0x0000 //RX_FDEQ_BIN_15 +79 0x0000 //RX_FDEQ_BIN_16 +80 0x0000 //RX_FDEQ_BIN_17 +81 0x0000 //RX_FDEQ_BIN_18 +82 0x0000 //RX_FDEQ_BIN_19 +83 0x0000 //RX_FDEQ_BIN_20 +84 0x0000 //RX_FDEQ_BIN_21 +85 0x0000 //RX_FDEQ_BIN_22 +86 0x0000 //RX_FDEQ_BIN_23 +87 0x4000 //RX_FDEQ_RESRV_0 +88 0x0320 //RX_FDEQ_RESRV_1 +89 0x0018 //RX_FDDRC_BAND_MARGIN_0 +90 0x0030 //RX_FDDRC_BAND_MARGIN_1 +91 0x0050 //RX_FDDRC_BAND_MARGIN_2 +92 0x0080 //RX_FDDRC_BAND_MARGIN_3 +93 0x0007 //RX_FDDRC_BLOCK_EXP +94 0x5000 //RX_FDDRC_THRD_2_0 +95 0x5000 //RX_FDDRC_THRD_2_1 +96 0x5000 //RX_FDDRC_THRD_2_2 +97 0x5000 //RX_FDDRC_THRD_2_3 +98 0x6400 //RX_FDDRC_THRD_3_0 +99 0x6400 //RX_FDDRC_THRD_3_1 +100 0x6400 //RX_FDDRC_THRD_3_2 +101 0x6400 //RX_FDDRC_THRD_3_3 +102 0x2000 //RX_FDDRC_SLANT_0_0 +103 0x2000 //RX_FDDRC_SLANT_0_1 +104 0x2000 //RX_FDDRC_SLANT_0_2 +105 0x2000 //RX_FDDRC_SLANT_0_3 +106 0x5333 //RX_FDDRC_SLANT_1_0 +107 0x5333 //RX_FDDRC_SLANT_1_1 +108 0x5333 //RX_FDDRC_SLANT_1_2 +109 0x5333 //RX_FDDRC_SLANT_1_3 +110 0x0000 //RX_FDDRC_RESRV_0 +129 0x0100 //RX_SPK_VOL +130 0x0000 //RX_VOL_RESRV_0 +#VOL 5 +6 0x1000 //RX_TDDRC_ALPHA_UP_1 +7 0x1000 //RX_TDDRC_ALPHA_UP_2 +8 0x1000 //RX_TDDRC_ALPHA_UP_3 +9 0x1000 //RX_TDDRC_ALPHA_UP_4 +27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +33 0x7000 //RX_TDDRC_LIMITER_THRD +34 0x0800 //RX_TDDRC_LIMITER_GAIN +112 0x0000 //RX_TDDRC_THRD_0 +113 0x0000 //RX_TDDRC_THRD_1 +114 0x1800 //RX_TDDRC_THRD_2 +115 0x1800 //RX_TDDRC_THRD_3 +116 0x3000 //RX_TDDRC_SLANT_0 +117 0x6E00 //RX_TDDRC_SLANT_1 +118 0x1000 //RX_TDDRC_ALPHA_UP_0 +119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +120 0x0000 //RX_TDDRC_HMNC_FLAG +121 0x199A //RX_TDDRC_HMNC_GAIN +122 0x0001 //RX_TDDRC_SMT_FLAG +123 0x0CCD //RX_TDDRC_SMT_W +124 0x0360 //RX_TDDRC_DRC_GAIN +38 0x0030 //RX_FDEQ_SUBNUM +39 0x4848 //RX_FDEQ_GAIN_0 +40 0x4848 //RX_FDEQ_GAIN_1 +41 0x4844 //RX_FDEQ_GAIN_2 +42 0x4A4C //RX_FDEQ_GAIN_3 +43 0x4E50 //RX_FDEQ_GAIN_4 +44 0x5254 //RX_FDEQ_GAIN_5 +45 0x5658 //RX_FDEQ_GAIN_6 +46 0x5A5C //RX_FDEQ_GAIN_7 +47 0x5C5C //RX_FDEQ_GAIN_8 +48 0x5C5C //RX_FDEQ_GAIN_9 +49 0x5C5C //RX_FDEQ_GAIN_10 +50 0x5C48 //RX_FDEQ_GAIN_11 +51 0x4848 //RX_FDEQ_GAIN_12 +52 0x4848 //RX_FDEQ_GAIN_13 +53 0x4848 //RX_FDEQ_GAIN_14 +54 0x4848 //RX_FDEQ_GAIN_15 +55 0x4848 //RX_FDEQ_GAIN_16 +56 0x4848 //RX_FDEQ_GAIN_17 +57 0x4848 //RX_FDEQ_GAIN_18 +58 0x4848 //RX_FDEQ_GAIN_19 +59 0x4848 //RX_FDEQ_GAIN_20 +60 0x4848 //RX_FDEQ_GAIN_21 +61 0x4848 //RX_FDEQ_GAIN_22 +62 0x4848 //RX_FDEQ_GAIN_23 +63 0x0202 //RX_FDEQ_BIN_0 +64 0x0203 //RX_FDEQ_BIN_1 +65 0x0402 //RX_FDEQ_BIN_2 +66 0x0303 //RX_FDEQ_BIN_3 +67 0x0303 //RX_FDEQ_BIN_4 +68 0x0303 //RX_FDEQ_BIN_5 +69 0x0303 //RX_FDEQ_BIN_6 +70 0x0303 //RX_FDEQ_BIN_7 +71 0x0A0A //RX_FDEQ_BIN_8 +72 0x0A0E //RX_FDEQ_BIN_9 +73 0x0000 //RX_FDEQ_BIN_10 +74 0x0000 //RX_FDEQ_BIN_11 +75 0x0000 //RX_FDEQ_BIN_12 +76 0x0000 //RX_FDEQ_BIN_13 +77 0x0000 //RX_FDEQ_BIN_14 +78 0x0000 //RX_FDEQ_BIN_15 +79 0x0000 //RX_FDEQ_BIN_16 +80 0x0000 //RX_FDEQ_BIN_17 +81 0x0000 //RX_FDEQ_BIN_18 +82 0x0000 //RX_FDEQ_BIN_19 +83 0x0000 //RX_FDEQ_BIN_20 +84 0x0000 //RX_FDEQ_BIN_21 +85 0x0000 //RX_FDEQ_BIN_22 +86 0x0000 //RX_FDEQ_BIN_23 +87 0x4000 //RX_FDEQ_RESRV_0 +88 0x0320 //RX_FDEQ_RESRV_1 +89 0x0018 //RX_FDDRC_BAND_MARGIN_0 +90 0x0030 //RX_FDDRC_BAND_MARGIN_1 +91 0x0050 //RX_FDDRC_BAND_MARGIN_2 +92 0x0080 //RX_FDDRC_BAND_MARGIN_3 +93 0x0007 //RX_FDDRC_BLOCK_EXP +94 0x5000 //RX_FDDRC_THRD_2_0 +95 0x5000 //RX_FDDRC_THRD_2_1 +96 0x5000 //RX_FDDRC_THRD_2_2 +97 0x5000 //RX_FDDRC_THRD_2_3 +98 0x6400 //RX_FDDRC_THRD_3_0 +99 0x6400 //RX_FDDRC_THRD_3_1 +100 0x6400 //RX_FDDRC_THRD_3_2 +101 0x6400 //RX_FDDRC_THRD_3_3 +102 0x2000 //RX_FDDRC_SLANT_0_0 +103 0x2000 //RX_FDDRC_SLANT_0_1 +104 0x2000 //RX_FDDRC_SLANT_0_2 +105 0x2000 //RX_FDDRC_SLANT_0_3 +106 0x5333 //RX_FDDRC_SLANT_1_0 +107 0x5333 //RX_FDDRC_SLANT_1_1 +108 0x5333 //RX_FDDRC_SLANT_1_2 +109 0x5333 //RX_FDDRC_SLANT_1_3 +110 0x0000 //RX_FDDRC_RESRV_0 +129 0x0100 //RX_SPK_VOL +130 0x0000 //RX_VOL_RESRV_0 +#VOL 6 +6 0x1000 //RX_TDDRC_ALPHA_UP_1 +7 0x1000 //RX_TDDRC_ALPHA_UP_2 +8 0x1000 //RX_TDDRC_ALPHA_UP_3 +9 0x1000 //RX_TDDRC_ALPHA_UP_4 +27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +33 0x7000 //RX_TDDRC_LIMITER_THRD +34 0x0800 //RX_TDDRC_LIMITER_GAIN +112 0x0000 //RX_TDDRC_THRD_0 +113 0x0000 //RX_TDDRC_THRD_1 +114 0x1800 //RX_TDDRC_THRD_2 +115 0x1800 //RX_TDDRC_THRD_3 +116 0x3000 //RX_TDDRC_SLANT_0 +117 0x6E00 //RX_TDDRC_SLANT_1 +118 0x1000 //RX_TDDRC_ALPHA_UP_0 +119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +120 0x0000 //RX_TDDRC_HMNC_FLAG +121 0x199A //RX_TDDRC_HMNC_GAIN +122 0x0001 //RX_TDDRC_SMT_FLAG +123 0x0CCD //RX_TDDRC_SMT_W +124 0x0360 //RX_TDDRC_DRC_GAIN +38 0x0030 //RX_FDEQ_SUBNUM +39 0x4848 //RX_FDEQ_GAIN_0 +40 0x4848 //RX_FDEQ_GAIN_1 +41 0x4844 //RX_FDEQ_GAIN_2 +42 0x4A4C //RX_FDEQ_GAIN_3 +43 0x4E50 //RX_FDEQ_GAIN_4 +44 0x5254 //RX_FDEQ_GAIN_5 +45 0x5658 //RX_FDEQ_GAIN_6 +46 0x5A5C //RX_FDEQ_GAIN_7 +47 0x5C5C //RX_FDEQ_GAIN_8 +48 0x5C5C //RX_FDEQ_GAIN_9 +49 0x5C5C //RX_FDEQ_GAIN_10 +50 0x5C48 //RX_FDEQ_GAIN_11 +51 0x4848 //RX_FDEQ_GAIN_12 +52 0x4848 //RX_FDEQ_GAIN_13 +53 0x4848 //RX_FDEQ_GAIN_14 +54 0x4848 //RX_FDEQ_GAIN_15 +55 0x4848 //RX_FDEQ_GAIN_16 +56 0x4848 //RX_FDEQ_GAIN_17 +57 0x4848 //RX_FDEQ_GAIN_18 +58 0x4848 //RX_FDEQ_GAIN_19 +59 0x4848 //RX_FDEQ_GAIN_20 +60 0x4848 //RX_FDEQ_GAIN_21 +61 0x4848 //RX_FDEQ_GAIN_22 +62 0x4848 //RX_FDEQ_GAIN_23 +63 0x0202 //RX_FDEQ_BIN_0 +64 0x0203 //RX_FDEQ_BIN_1 +65 0x0402 //RX_FDEQ_BIN_2 +66 0x0303 //RX_FDEQ_BIN_3 +67 0x0303 //RX_FDEQ_BIN_4 +68 0x0303 //RX_FDEQ_BIN_5 +69 0x0303 //RX_FDEQ_BIN_6 +70 0x0303 //RX_FDEQ_BIN_7 +71 0x0A0A //RX_FDEQ_BIN_8 +72 0x0A0E //RX_FDEQ_BIN_9 +73 0x0000 //RX_FDEQ_BIN_10 +74 0x0000 //RX_FDEQ_BIN_11 +75 0x0000 //RX_FDEQ_BIN_12 +76 0x0000 //RX_FDEQ_BIN_13 +77 0x0000 //RX_FDEQ_BIN_14 +78 0x0000 //RX_FDEQ_BIN_15 +79 0x0000 //RX_FDEQ_BIN_16 +80 0x0000 //RX_FDEQ_BIN_17 +81 0x0000 //RX_FDEQ_BIN_18 +82 0x0000 //RX_FDEQ_BIN_19 +83 0x0000 //RX_FDEQ_BIN_20 +84 0x0000 //RX_FDEQ_BIN_21 +85 0x0000 //RX_FDEQ_BIN_22 +86 0x0000 //RX_FDEQ_BIN_23 +87 0x4000 //RX_FDEQ_RESRV_0 +88 0x0320 //RX_FDEQ_RESRV_1 +89 0x0018 //RX_FDDRC_BAND_MARGIN_0 +90 0x0030 //RX_FDDRC_BAND_MARGIN_1 +91 0x0050 //RX_FDDRC_BAND_MARGIN_2 +92 0x0080 //RX_FDDRC_BAND_MARGIN_3 +93 0x0007 //RX_FDDRC_BLOCK_EXP +94 0x5000 //RX_FDDRC_THRD_2_0 +95 0x5000 //RX_FDDRC_THRD_2_1 +96 0x5000 //RX_FDDRC_THRD_2_2 +97 0x5000 //RX_FDDRC_THRD_2_3 +98 0x6400 //RX_FDDRC_THRD_3_0 +99 0x6400 //RX_FDDRC_THRD_3_1 +100 0x6400 //RX_FDDRC_THRD_3_2 +101 0x6400 //RX_FDDRC_THRD_3_3 +102 0x2000 //RX_FDDRC_SLANT_0_0 +103 0x2000 //RX_FDDRC_SLANT_0_1 +104 0x2000 //RX_FDDRC_SLANT_0_2 +105 0x2000 //RX_FDDRC_SLANT_0_3 +106 0x5333 //RX_FDDRC_SLANT_1_0 +107 0x5333 //RX_FDDRC_SLANT_1_1 +108 0x5333 //RX_FDDRC_SLANT_1_2 +109 0x5333 //RX_FDDRC_SLANT_1_3 +110 0x0000 //RX_FDDRC_RESRV_0 +129 0x0100 //RX_SPK_VOL +130 0x0000 //RX_VOL_RESRV_0 +#RX 2 +157 0x000C //RX_RECVFUNC_MODE_0 +158 0x0000 //RX_RECVFUNC_MODE_1 +159 0x0000 //RX_SAMPLINGFREQ_SIG +160 0x0000 //RX_SAMPLINGFREQ_PROC +161 0x000A //RX_FRAME_SZ +162 0x0000 //RX_DELAY_OPT +163 0x1000 //RX_TDDRC_ALPHA_UP_1 +164 0x1000 //RX_TDDRC_ALPHA_UP_2 +165 0x1000 //RX_TDDRC_ALPHA_UP_3 +166 0x1000 //RX_TDDRC_ALPHA_UP_4 +167 0x0800 //RX_PGA +168 0x7FFF //RX_A_HP +169 0x4000 //RX_B_PE +170 0x7800 //RX_THR_PITCH_DET_0 +171 0x7000 //RX_THR_PITCH_DET_1 +172 0x6000 //RX_THR_PITCH_DET_2 +173 0x0008 //RX_PITCH_BFR_LEN +174 0x0003 //RX_SBD_PITCH_DET +175 0x0100 //RX_PP_RESRV_0 +176 0x0020 //RX_PP_RESRV_1 +177 0x0400 //RX_N_SN_EST +178 0x000C //RX_N2_SN_EST +179 0x0014 //RX_NS_LVL_CTRL +180 0xF800 //RX_THR_SN_EST +181 0x7E00 //RX_LAMBDA_PFILT +182 0x000A //RX_FENS_RESRV_0 +183 0x0190 //RX_FENS_RESRV_1 +184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +187 0x0002 //RX_EXTRA_NS_L +188 0x0800 //RX_EXTRA_NS_A +189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +190 0x7000 //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +192 0x199A //RX_A_POST_FLT +193 0x0000 //RX_LMT_THRD +194 0x4000 //RX_LMT_ALPHA +195 0x0030 //RX_FDEQ_SUBNUM +196 0x4848 //RX_FDEQ_GAIN_0 +197 0x4848 //RX_FDEQ_GAIN_1 +198 0x4844 //RX_FDEQ_GAIN_2 +199 0x4A4C //RX_FDEQ_GAIN_3 +200 0x4E50 //RX_FDEQ_GAIN_4 +201 0x5254 //RX_FDEQ_GAIN_5 +202 0x5658 //RX_FDEQ_GAIN_6 +203 0x5A5C //RX_FDEQ_GAIN_7 +204 0x5C5C //RX_FDEQ_GAIN_8 +205 0x5C5C //RX_FDEQ_GAIN_9 +206 0x5C5C //RX_FDEQ_GAIN_10 +207 0x5C48 //RX_FDEQ_GAIN_11 +208 0x4848 //RX_FDEQ_GAIN_12 +209 0x4848 //RX_FDEQ_GAIN_13 +210 0x4848 //RX_FDEQ_GAIN_14 +211 0x4848 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0202 //RX_FDEQ_BIN_0 +221 0x0203 //RX_FDEQ_BIN_1 +222 0x0402 //RX_FDEQ_BIN_2 +223 0x0303 //RX_FDEQ_BIN_3 +224 0x0303 //RX_FDEQ_BIN_4 +225 0x0303 //RX_FDEQ_BIN_5 +226 0x0303 //RX_FDEQ_BIN_6 +227 0x0303 //RX_FDEQ_BIN_7 +228 0x0A0A //RX_FDEQ_BIN_8 +229 0x0A0E //RX_FDEQ_BIN_9 +230 0x0000 //RX_FDEQ_BIN_10 +231 0x0000 //RX_FDEQ_BIN_11 +232 0x0000 //RX_FDEQ_BIN_12 +233 0x0000 //RX_FDEQ_BIN_13 +234 0x0000 //RX_FDEQ_BIN_14 +235 0x0000 //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x4000 //RX_FDEQ_RESRV_0 +245 0x0320 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0030 //RX_FDDRC_BAND_MARGIN_1 +248 0x0050 //RX_FDDRC_BAND_MARGIN_2 +249 0x0080 //RX_FDDRC_BAND_MARGIN_3 +250 0x0007 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x5000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x6400 //RX_FDDRC_THRD_3_2 +258 0x6400 //RX_FDDRC_THRD_3_3 +259 0x2000 //RX_FDDRC_SLANT_0_0 +260 0x2000 //RX_FDDRC_SLANT_0_1 +261 0x2000 //RX_FDDRC_SLANT_0_2 +262 0x2000 //RX_FDDRC_SLANT_0_3 +263 0x5333 //RX_FDDRC_SLANT_1_0 +264 0x5333 //RX_FDDRC_SLANT_1_1 +265 0x5333 //RX_FDDRC_SLANT_1_2 +266 0x5333 //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +268 0x0002 //RX_FILTINDX +269 0x0000 //RX_TDDRC_THRD_0 +270 0x0000 //RX_TDDRC_THRD_1 +271 0x1800 //RX_TDDRC_THRD_2 +272 0x1800 //RX_TDDRC_THRD_3 +273 0x3000 //RX_TDDRC_SLANT_0 +274 0x6E00 //RX_TDDRC_SLANT_1 +275 0x1000 //RX_TDDRC_ALPHA_UP_0 +276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x199A //RX_TDDRC_HMNC_GAIN +279 0x0001 //RX_TDDRC_SMT_FLAG +280 0x0CCD //RX_TDDRC_SMT_W +281 0x0360 //RX_TDDRC_DRC_GAIN +282 0x7C00 //RX_LAMBDA_PKA_FP +283 0x2000 //RX_TPKA_FP +284 0x2000 //RX_MIN_G_FP +285 0x0080 //RX_MAX_G_FP +286 0x0100 //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 +288 0x0000 //RX_MAXLEVEL_CNG +289 0x3000 //RX_BWE_UV_TH +290 0x3000 //RX_BWE_UV_TH2 +291 0x1800 //RX_BWE_UV_TH3 +292 0x1000 //RX_BWE_V_TH +293 0x04CD //RX_BWE_GAIN1_V_TH1 +294 0x0F33 //RX_BWE_GAIN1_V_TH2 +295 0x7333 //RX_BWE_UV_EQ +296 0x199A //RX_BWE_V_EQ +297 0x7333 //RX_BWE_TONE_TH +298 0x0004 //RX_BWE_UV_HOLD_T +299 0x6CCD //RX_BWE_GAIN2_ALPHA +300 0x799A //RX_BWE_GAIN3_ALPHA +301 0x001E //RX_BWE_CUTOFF +302 0x3000 //RX_BWE_GAINFILL +303 0x3200 //RX_BWE_MAXTH_TONE +304 0x2000 //RX_BWE_EQ_0 +305 0x2000 //RX_BWE_EQ_1 +306 0x2000 //RX_BWE_EQ_2 +307 0x2000 //RX_BWE_EQ_3 +308 0x2000 //RX_BWE_EQ_4 +309 0x2000 //RX_BWE_EQ_5 +310 0x2000 //RX_BWE_EQ_6 +311 0x0000 //RX_BWE_RESRV_0 +312 0x0000 //RX_BWE_RESRV_1 +313 0x0000 //RX_BWE_RESRV_2 +#VOL 0 +163 0x1000 //RX_TDDRC_ALPHA_UP_1 +164 0x1000 //RX_TDDRC_ALPHA_UP_2 +165 0x1000 //RX_TDDRC_ALPHA_UP_3 +166 0x1000 //RX_TDDRC_ALPHA_UP_4 +184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +190 0x7000 //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +269 0x0000 //RX_TDDRC_THRD_0 +270 0x0000 //RX_TDDRC_THRD_1 +271 0x1800 //RX_TDDRC_THRD_2 +272 0x1800 //RX_TDDRC_THRD_3 +273 0x3000 //RX_TDDRC_SLANT_0 +274 0x6E00 //RX_TDDRC_SLANT_1 +275 0x1000 //RX_TDDRC_ALPHA_UP_0 +276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x199A //RX_TDDRC_HMNC_GAIN +279 0x0001 //RX_TDDRC_SMT_FLAG +280 0x0CCD //RX_TDDRC_SMT_W +281 0x0360 //RX_TDDRC_DRC_GAIN +195 0x0030 //RX_FDEQ_SUBNUM +196 0x4848 //RX_FDEQ_GAIN_0 +197 0x4848 //RX_FDEQ_GAIN_1 +198 0x4844 //RX_FDEQ_GAIN_2 +199 0x4A4C //RX_FDEQ_GAIN_3 +200 0x4E50 //RX_FDEQ_GAIN_4 +201 0x5254 //RX_FDEQ_GAIN_5 +202 0x5658 //RX_FDEQ_GAIN_6 +203 0x5A5C //RX_FDEQ_GAIN_7 +204 0x5C5C //RX_FDEQ_GAIN_8 +205 0x5C5C //RX_FDEQ_GAIN_9 +206 0x5C5C //RX_FDEQ_GAIN_10 +207 0x5C48 //RX_FDEQ_GAIN_11 +208 0x4848 //RX_FDEQ_GAIN_12 +209 0x4848 //RX_FDEQ_GAIN_13 +210 0x4848 //RX_FDEQ_GAIN_14 +211 0x4848 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0202 //RX_FDEQ_BIN_0 +221 0x0203 //RX_FDEQ_BIN_1 +222 0x0402 //RX_FDEQ_BIN_2 +223 0x0303 //RX_FDEQ_BIN_3 +224 0x0303 //RX_FDEQ_BIN_4 +225 0x0303 //RX_FDEQ_BIN_5 +226 0x0303 //RX_FDEQ_BIN_6 +227 0x0303 //RX_FDEQ_BIN_7 +228 0x0A0A //RX_FDEQ_BIN_8 +229 0x0A0E //RX_FDEQ_BIN_9 +230 0x0000 //RX_FDEQ_BIN_10 +231 0x0000 //RX_FDEQ_BIN_11 +232 0x0000 //RX_FDEQ_BIN_12 +233 0x0000 //RX_FDEQ_BIN_13 +234 0x0000 //RX_FDEQ_BIN_14 +235 0x0000 //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x4000 //RX_FDEQ_RESRV_0 +245 0x0320 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0030 //RX_FDDRC_BAND_MARGIN_1 +248 0x0050 //RX_FDDRC_BAND_MARGIN_2 +249 0x0080 //RX_FDDRC_BAND_MARGIN_3 +250 0x0007 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x5000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x6400 //RX_FDDRC_THRD_3_2 +258 0x6400 //RX_FDDRC_THRD_3_3 +259 0x2000 //RX_FDDRC_SLANT_0_0 +260 0x2000 //RX_FDDRC_SLANT_0_1 +261 0x2000 //RX_FDDRC_SLANT_0_2 +262 0x2000 //RX_FDDRC_SLANT_0_3 +263 0x5333 //RX_FDDRC_SLANT_1_0 +264 0x5333 //RX_FDDRC_SLANT_1_1 +265 0x5333 //RX_FDDRC_SLANT_1_2 +266 0x5333 //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +286 0x0100 //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 +#VOL 1 +163 0x1000 //RX_TDDRC_ALPHA_UP_1 +164 0x1000 //RX_TDDRC_ALPHA_UP_2 +165 0x1000 //RX_TDDRC_ALPHA_UP_3 +166 0x1000 //RX_TDDRC_ALPHA_UP_4 +184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +190 0x7000 //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +269 0x0000 //RX_TDDRC_THRD_0 +270 0x0000 //RX_TDDRC_THRD_1 +271 0x1800 //RX_TDDRC_THRD_2 +272 0x1800 //RX_TDDRC_THRD_3 +273 0x3000 //RX_TDDRC_SLANT_0 +274 0x6E00 //RX_TDDRC_SLANT_1 +275 0x1000 //RX_TDDRC_ALPHA_UP_0 +276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x199A //RX_TDDRC_HMNC_GAIN +279 0x0001 //RX_TDDRC_SMT_FLAG +280 0x0CCD //RX_TDDRC_SMT_W +281 0x0360 //RX_TDDRC_DRC_GAIN +195 0x0030 //RX_FDEQ_SUBNUM +196 0x4848 //RX_FDEQ_GAIN_0 +197 0x4848 //RX_FDEQ_GAIN_1 +198 0x4844 //RX_FDEQ_GAIN_2 +199 0x4A4C //RX_FDEQ_GAIN_3 +200 0x4E50 //RX_FDEQ_GAIN_4 +201 0x5254 //RX_FDEQ_GAIN_5 +202 0x5658 //RX_FDEQ_GAIN_6 +203 0x5A5C //RX_FDEQ_GAIN_7 +204 0x5C5C //RX_FDEQ_GAIN_8 +205 0x5C5C //RX_FDEQ_GAIN_9 +206 0x5C5C //RX_FDEQ_GAIN_10 +207 0x5C48 //RX_FDEQ_GAIN_11 +208 0x4848 //RX_FDEQ_GAIN_12 +209 0x4848 //RX_FDEQ_GAIN_13 +210 0x4848 //RX_FDEQ_GAIN_14 +211 0x4848 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0202 //RX_FDEQ_BIN_0 +221 0x0203 //RX_FDEQ_BIN_1 +222 0x0402 //RX_FDEQ_BIN_2 +223 0x0303 //RX_FDEQ_BIN_3 +224 0x0303 //RX_FDEQ_BIN_4 +225 0x0303 //RX_FDEQ_BIN_5 +226 0x0303 //RX_FDEQ_BIN_6 +227 0x0303 //RX_FDEQ_BIN_7 +228 0x0A0A //RX_FDEQ_BIN_8 +229 0x0A0E //RX_FDEQ_BIN_9 +230 0x0000 //RX_FDEQ_BIN_10 +231 0x0000 //RX_FDEQ_BIN_11 +232 0x0000 //RX_FDEQ_BIN_12 +233 0x0000 //RX_FDEQ_BIN_13 +234 0x0000 //RX_FDEQ_BIN_14 +235 0x0000 //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x4000 //RX_FDEQ_RESRV_0 +245 0x0320 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0030 //RX_FDDRC_BAND_MARGIN_1 +248 0x0050 //RX_FDDRC_BAND_MARGIN_2 +249 0x0080 //RX_FDDRC_BAND_MARGIN_3 +250 0x0007 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x5000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x6400 //RX_FDDRC_THRD_3_2 +258 0x6400 //RX_FDDRC_THRD_3_3 +259 0x2000 //RX_FDDRC_SLANT_0_0 +260 0x2000 //RX_FDDRC_SLANT_0_1 +261 0x2000 //RX_FDDRC_SLANT_0_2 +262 0x2000 //RX_FDDRC_SLANT_0_3 +263 0x5333 //RX_FDDRC_SLANT_1_0 +264 0x5333 //RX_FDDRC_SLANT_1_1 +265 0x5333 //RX_FDDRC_SLANT_1_2 +266 0x5333 //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +286 0x0100 //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 +#VOL 2 +163 0x1000 //RX_TDDRC_ALPHA_UP_1 +164 0x1000 //RX_TDDRC_ALPHA_UP_2 +165 0x1000 //RX_TDDRC_ALPHA_UP_3 +166 0x1000 //RX_TDDRC_ALPHA_UP_4 +184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +190 0x7000 //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +269 0x0000 //RX_TDDRC_THRD_0 +270 0x0000 //RX_TDDRC_THRD_1 +271 0x1800 //RX_TDDRC_THRD_2 +272 0x1800 //RX_TDDRC_THRD_3 +273 0x3000 //RX_TDDRC_SLANT_0 +274 0x6E00 //RX_TDDRC_SLANT_1 +275 0x1000 //RX_TDDRC_ALPHA_UP_0 +276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x199A //RX_TDDRC_HMNC_GAIN +279 0x0001 //RX_TDDRC_SMT_FLAG +280 0x0CCD //RX_TDDRC_SMT_W +281 0x0360 //RX_TDDRC_DRC_GAIN +195 0x0030 //RX_FDEQ_SUBNUM +196 0x4848 //RX_FDEQ_GAIN_0 +197 0x4848 //RX_FDEQ_GAIN_1 +198 0x4844 //RX_FDEQ_GAIN_2 +199 0x4A4C //RX_FDEQ_GAIN_3 +200 0x4E50 //RX_FDEQ_GAIN_4 +201 0x5254 //RX_FDEQ_GAIN_5 +202 0x5658 //RX_FDEQ_GAIN_6 +203 0x5A5C //RX_FDEQ_GAIN_7 +204 0x5C5C //RX_FDEQ_GAIN_8 +205 0x5C5C //RX_FDEQ_GAIN_9 +206 0x5C5C //RX_FDEQ_GAIN_10 +207 0x5C48 //RX_FDEQ_GAIN_11 +208 0x4848 //RX_FDEQ_GAIN_12 +209 0x4848 //RX_FDEQ_GAIN_13 +210 0x4848 //RX_FDEQ_GAIN_14 +211 0x4848 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0202 //RX_FDEQ_BIN_0 +221 0x0203 //RX_FDEQ_BIN_1 +222 0x0402 //RX_FDEQ_BIN_2 +223 0x0303 //RX_FDEQ_BIN_3 +224 0x0303 //RX_FDEQ_BIN_4 +225 0x0303 //RX_FDEQ_BIN_5 +226 0x0303 //RX_FDEQ_BIN_6 +227 0x0303 //RX_FDEQ_BIN_7 +228 0x0A0A //RX_FDEQ_BIN_8 +229 0x0A0E //RX_FDEQ_BIN_9 +230 0x0000 //RX_FDEQ_BIN_10 +231 0x0000 //RX_FDEQ_BIN_11 +232 0x0000 //RX_FDEQ_BIN_12 +233 0x0000 //RX_FDEQ_BIN_13 +234 0x0000 //RX_FDEQ_BIN_14 +235 0x0000 //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x4000 //RX_FDEQ_RESRV_0 +245 0x0320 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0030 //RX_FDDRC_BAND_MARGIN_1 +248 0x0050 //RX_FDDRC_BAND_MARGIN_2 +249 0x0080 //RX_FDDRC_BAND_MARGIN_3 +250 0x0007 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x5000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x6400 //RX_FDDRC_THRD_3_2 +258 0x6400 //RX_FDDRC_THRD_3_3 +259 0x2000 //RX_FDDRC_SLANT_0_0 +260 0x2000 //RX_FDDRC_SLANT_0_1 +261 0x2000 //RX_FDDRC_SLANT_0_2 +262 0x2000 //RX_FDDRC_SLANT_0_3 +263 0x5333 //RX_FDDRC_SLANT_1_0 +264 0x5333 //RX_FDDRC_SLANT_1_1 +265 0x5333 //RX_FDDRC_SLANT_1_2 +266 0x5333 //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +286 0x0100 //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 +#VOL 3 +163 0x1000 //RX_TDDRC_ALPHA_UP_1 +164 0x1000 //RX_TDDRC_ALPHA_UP_2 +165 0x1000 //RX_TDDRC_ALPHA_UP_3 +166 0x1000 //RX_TDDRC_ALPHA_UP_4 +184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +190 0x7000 //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +269 0x0000 //RX_TDDRC_THRD_0 +270 0x0000 //RX_TDDRC_THRD_1 +271 0x1800 //RX_TDDRC_THRD_2 +272 0x1800 //RX_TDDRC_THRD_3 +273 0x3000 //RX_TDDRC_SLANT_0 +274 0x6E00 //RX_TDDRC_SLANT_1 +275 0x1000 //RX_TDDRC_ALPHA_UP_0 +276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x199A //RX_TDDRC_HMNC_GAIN +279 0x0001 //RX_TDDRC_SMT_FLAG +280 0x0CCD //RX_TDDRC_SMT_W +281 0x0360 //RX_TDDRC_DRC_GAIN +195 0x0030 //RX_FDEQ_SUBNUM +196 0x4848 //RX_FDEQ_GAIN_0 +197 0x4848 //RX_FDEQ_GAIN_1 +198 0x4844 //RX_FDEQ_GAIN_2 +199 0x4A4C //RX_FDEQ_GAIN_3 +200 0x4E50 //RX_FDEQ_GAIN_4 +201 0x5254 //RX_FDEQ_GAIN_5 +202 0x5658 //RX_FDEQ_GAIN_6 +203 0x5A5C //RX_FDEQ_GAIN_7 +204 0x5C5C //RX_FDEQ_GAIN_8 +205 0x5C5C //RX_FDEQ_GAIN_9 +206 0x5C5C //RX_FDEQ_GAIN_10 +207 0x5C48 //RX_FDEQ_GAIN_11 +208 0x4848 //RX_FDEQ_GAIN_12 +209 0x4848 //RX_FDEQ_GAIN_13 +210 0x4848 //RX_FDEQ_GAIN_14 +211 0x4848 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0202 //RX_FDEQ_BIN_0 +221 0x0203 //RX_FDEQ_BIN_1 +222 0x0402 //RX_FDEQ_BIN_2 +223 0x0303 //RX_FDEQ_BIN_3 +224 0x0303 //RX_FDEQ_BIN_4 +225 0x0303 //RX_FDEQ_BIN_5 +226 0x0303 //RX_FDEQ_BIN_6 +227 0x0303 //RX_FDEQ_BIN_7 +228 0x0A0A //RX_FDEQ_BIN_8 +229 0x0A0E //RX_FDEQ_BIN_9 +230 0x0000 //RX_FDEQ_BIN_10 +231 0x0000 //RX_FDEQ_BIN_11 +232 0x0000 //RX_FDEQ_BIN_12 +233 0x0000 //RX_FDEQ_BIN_13 +234 0x0000 //RX_FDEQ_BIN_14 +235 0x0000 //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x4000 //RX_FDEQ_RESRV_0 +245 0x0320 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0030 //RX_FDDRC_BAND_MARGIN_1 +248 0x0050 //RX_FDDRC_BAND_MARGIN_2 +249 0x0080 //RX_FDDRC_BAND_MARGIN_3 +250 0x0007 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x5000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x6400 //RX_FDDRC_THRD_3_2 +258 0x6400 //RX_FDDRC_THRD_3_3 +259 0x2000 //RX_FDDRC_SLANT_0_0 +260 0x2000 //RX_FDDRC_SLANT_0_1 +261 0x2000 //RX_FDDRC_SLANT_0_2 +262 0x2000 //RX_FDDRC_SLANT_0_3 +263 0x5333 //RX_FDDRC_SLANT_1_0 +264 0x5333 //RX_FDDRC_SLANT_1_1 +265 0x5333 //RX_FDDRC_SLANT_1_2 +266 0x5333 //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +286 0x0100 //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 +#VOL 4 +163 0x1000 //RX_TDDRC_ALPHA_UP_1 +164 0x1000 //RX_TDDRC_ALPHA_UP_2 +165 0x1000 //RX_TDDRC_ALPHA_UP_3 +166 0x1000 //RX_TDDRC_ALPHA_UP_4 +184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +190 0x7000 //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +269 0x0000 //RX_TDDRC_THRD_0 +270 0x0000 //RX_TDDRC_THRD_1 +271 0x1800 //RX_TDDRC_THRD_2 +272 0x1800 //RX_TDDRC_THRD_3 +273 0x3000 //RX_TDDRC_SLANT_0 +274 0x6E00 //RX_TDDRC_SLANT_1 +275 0x1000 //RX_TDDRC_ALPHA_UP_0 +276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x199A //RX_TDDRC_HMNC_GAIN +279 0x0001 //RX_TDDRC_SMT_FLAG +280 0x0CCD //RX_TDDRC_SMT_W +281 0x0360 //RX_TDDRC_DRC_GAIN +195 0x0030 //RX_FDEQ_SUBNUM +196 0x4848 //RX_FDEQ_GAIN_0 +197 0x4848 //RX_FDEQ_GAIN_1 +198 0x4844 //RX_FDEQ_GAIN_2 +199 0x4A4C //RX_FDEQ_GAIN_3 +200 0x4E50 //RX_FDEQ_GAIN_4 +201 0x5254 //RX_FDEQ_GAIN_5 +202 0x5658 //RX_FDEQ_GAIN_6 +203 0x5A5C //RX_FDEQ_GAIN_7 +204 0x5C5C //RX_FDEQ_GAIN_8 +205 0x5C5C //RX_FDEQ_GAIN_9 +206 0x5C5C //RX_FDEQ_GAIN_10 +207 0x5C48 //RX_FDEQ_GAIN_11 +208 0x4848 //RX_FDEQ_GAIN_12 +209 0x4848 //RX_FDEQ_GAIN_13 +210 0x4848 //RX_FDEQ_GAIN_14 +211 0x4848 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0202 //RX_FDEQ_BIN_0 +221 0x0203 //RX_FDEQ_BIN_1 +222 0x0402 //RX_FDEQ_BIN_2 +223 0x0303 //RX_FDEQ_BIN_3 +224 0x0303 //RX_FDEQ_BIN_4 +225 0x0303 //RX_FDEQ_BIN_5 +226 0x0303 //RX_FDEQ_BIN_6 +227 0x0303 //RX_FDEQ_BIN_7 +228 0x0A0A //RX_FDEQ_BIN_8 +229 0x0A0E //RX_FDEQ_BIN_9 +230 0x0000 //RX_FDEQ_BIN_10 +231 0x0000 //RX_FDEQ_BIN_11 +232 0x0000 //RX_FDEQ_BIN_12 +233 0x0000 //RX_FDEQ_BIN_13 +234 0x0000 //RX_FDEQ_BIN_14 +235 0x0000 //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x4000 //RX_FDEQ_RESRV_0 +245 0x0320 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0030 //RX_FDDRC_BAND_MARGIN_1 +248 0x0050 //RX_FDDRC_BAND_MARGIN_2 +249 0x0080 //RX_FDDRC_BAND_MARGIN_3 +250 0x0007 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x5000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x6400 //RX_FDDRC_THRD_3_2 +258 0x6400 //RX_FDDRC_THRD_3_3 +259 0x2000 //RX_FDDRC_SLANT_0_0 +260 0x2000 //RX_FDDRC_SLANT_0_1 +261 0x2000 //RX_FDDRC_SLANT_0_2 +262 0x2000 //RX_FDDRC_SLANT_0_3 +263 0x5333 //RX_FDDRC_SLANT_1_0 +264 0x5333 //RX_FDDRC_SLANT_1_1 +265 0x5333 //RX_FDDRC_SLANT_1_2 +266 0x5333 //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +286 0x0100 //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 +#VOL 5 +163 0x1000 //RX_TDDRC_ALPHA_UP_1 +164 0x1000 //RX_TDDRC_ALPHA_UP_2 +165 0x1000 //RX_TDDRC_ALPHA_UP_3 +166 0x1000 //RX_TDDRC_ALPHA_UP_4 +184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +190 0x7000 //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +269 0x0000 //RX_TDDRC_THRD_0 +270 0x0000 //RX_TDDRC_THRD_1 +271 0x1800 //RX_TDDRC_THRD_2 +272 0x1800 //RX_TDDRC_THRD_3 +273 0x3000 //RX_TDDRC_SLANT_0 +274 0x6E00 //RX_TDDRC_SLANT_1 +275 0x1000 //RX_TDDRC_ALPHA_UP_0 +276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x199A //RX_TDDRC_HMNC_GAIN +279 0x0001 //RX_TDDRC_SMT_FLAG +280 0x0CCD //RX_TDDRC_SMT_W +281 0x0360 //RX_TDDRC_DRC_GAIN +195 0x0030 //RX_FDEQ_SUBNUM +196 0x4848 //RX_FDEQ_GAIN_0 +197 0x4848 //RX_FDEQ_GAIN_1 +198 0x4844 //RX_FDEQ_GAIN_2 +199 0x4A4C //RX_FDEQ_GAIN_3 +200 0x4E50 //RX_FDEQ_GAIN_4 +201 0x5254 //RX_FDEQ_GAIN_5 +202 0x5658 //RX_FDEQ_GAIN_6 +203 0x5A5C //RX_FDEQ_GAIN_7 +204 0x5C5C //RX_FDEQ_GAIN_8 +205 0x5C5C //RX_FDEQ_GAIN_9 +206 0x5C5C //RX_FDEQ_GAIN_10 +207 0x5C48 //RX_FDEQ_GAIN_11 +208 0x4848 //RX_FDEQ_GAIN_12 +209 0x4848 //RX_FDEQ_GAIN_13 +210 0x4848 //RX_FDEQ_GAIN_14 +211 0x4848 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0202 //RX_FDEQ_BIN_0 +221 0x0203 //RX_FDEQ_BIN_1 +222 0x0402 //RX_FDEQ_BIN_2 +223 0x0303 //RX_FDEQ_BIN_3 +224 0x0303 //RX_FDEQ_BIN_4 +225 0x0303 //RX_FDEQ_BIN_5 +226 0x0303 //RX_FDEQ_BIN_6 +227 0x0303 //RX_FDEQ_BIN_7 +228 0x0A0A //RX_FDEQ_BIN_8 +229 0x0A0E //RX_FDEQ_BIN_9 +230 0x0000 //RX_FDEQ_BIN_10 +231 0x0000 //RX_FDEQ_BIN_11 +232 0x0000 //RX_FDEQ_BIN_12 +233 0x0000 //RX_FDEQ_BIN_13 +234 0x0000 //RX_FDEQ_BIN_14 +235 0x0000 //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x4000 //RX_FDEQ_RESRV_0 +245 0x0320 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0030 //RX_FDDRC_BAND_MARGIN_1 +248 0x0050 //RX_FDDRC_BAND_MARGIN_2 +249 0x0080 //RX_FDDRC_BAND_MARGIN_3 +250 0x0007 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x5000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x6400 //RX_FDDRC_THRD_3_2 +258 0x6400 //RX_FDDRC_THRD_3_3 +259 0x2000 //RX_FDDRC_SLANT_0_0 +260 0x2000 //RX_FDDRC_SLANT_0_1 +261 0x2000 //RX_FDDRC_SLANT_0_2 +262 0x2000 //RX_FDDRC_SLANT_0_3 +263 0x5333 //RX_FDDRC_SLANT_1_0 +264 0x5333 //RX_FDDRC_SLANT_1_1 +265 0x5333 //RX_FDDRC_SLANT_1_2 +266 0x5333 //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +286 0x0100 //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 +#VOL 6 +163 0x1000 //RX_TDDRC_ALPHA_UP_1 +164 0x1000 //RX_TDDRC_ALPHA_UP_2 +165 0x1000 //RX_TDDRC_ALPHA_UP_3 +166 0x1000 //RX_TDDRC_ALPHA_UP_4 +184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +190 0x7000 //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +269 0x0000 //RX_TDDRC_THRD_0 +270 0x0000 //RX_TDDRC_THRD_1 +271 0x1800 //RX_TDDRC_THRD_2 +272 0x1800 //RX_TDDRC_THRD_3 +273 0x3000 //RX_TDDRC_SLANT_0 +274 0x6E00 //RX_TDDRC_SLANT_1 +275 0x1000 //RX_TDDRC_ALPHA_UP_0 +276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x199A //RX_TDDRC_HMNC_GAIN +279 0x0001 //RX_TDDRC_SMT_FLAG +280 0x0CCD //RX_TDDRC_SMT_W +281 0x0360 //RX_TDDRC_DRC_GAIN +195 0x0030 //RX_FDEQ_SUBNUM +196 0x4848 //RX_FDEQ_GAIN_0 +197 0x4848 //RX_FDEQ_GAIN_1 +198 0x4844 //RX_FDEQ_GAIN_2 +199 0x4A4C //RX_FDEQ_GAIN_3 +200 0x4E50 //RX_FDEQ_GAIN_4 +201 0x5254 //RX_FDEQ_GAIN_5 +202 0x5658 //RX_FDEQ_GAIN_6 +203 0x5A5C //RX_FDEQ_GAIN_7 +204 0x5C5C //RX_FDEQ_GAIN_8 +205 0x5C5C //RX_FDEQ_GAIN_9 +206 0x5C5C //RX_FDEQ_GAIN_10 +207 0x5C48 //RX_FDEQ_GAIN_11 +208 0x4848 //RX_FDEQ_GAIN_12 +209 0x4848 //RX_FDEQ_GAIN_13 +210 0x4848 //RX_FDEQ_GAIN_14 +211 0x4848 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0202 //RX_FDEQ_BIN_0 +221 0x0203 //RX_FDEQ_BIN_1 +222 0x0402 //RX_FDEQ_BIN_2 +223 0x0303 //RX_FDEQ_BIN_3 +224 0x0303 //RX_FDEQ_BIN_4 +225 0x0303 //RX_FDEQ_BIN_5 +226 0x0303 //RX_FDEQ_BIN_6 +227 0x0303 //RX_FDEQ_BIN_7 +228 0x0A0A //RX_FDEQ_BIN_8 +229 0x0A0E //RX_FDEQ_BIN_9 +230 0x0000 //RX_FDEQ_BIN_10 +231 0x0000 //RX_FDEQ_BIN_11 +232 0x0000 //RX_FDEQ_BIN_12 +233 0x0000 //RX_FDEQ_BIN_13 +234 0x0000 //RX_FDEQ_BIN_14 +235 0x0000 //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x4000 //RX_FDEQ_RESRV_0 +245 0x0320 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0030 //RX_FDDRC_BAND_MARGIN_1 +248 0x0050 //RX_FDDRC_BAND_MARGIN_2 +249 0x0080 //RX_FDDRC_BAND_MARGIN_3 +250 0x0007 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x5000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x6400 //RX_FDDRC_THRD_3_2 +258 0x6400 //RX_FDDRC_THRD_3_3 +259 0x2000 //RX_FDDRC_SLANT_0_0 +260 0x2000 //RX_FDDRC_SLANT_0_1 +261 0x2000 //RX_FDDRC_SLANT_0_2 +262 0x2000 //RX_FDDRC_SLANT_0_3 +263 0x5333 //RX_FDDRC_SLANT_1_0 +264 0x5333 //RX_FDDRC_SLANT_1_1 +265 0x5333 //RX_FDDRC_SLANT_1_2 +266 0x5333 //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +286 0x0100 //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 + +#CASE_NAME HANDSET-HANDSET_HAC-TMOBILE_US-WB +#PARAM_MODE Full +#PARAM_TYPE TX+2RX +#TOTAL_CUSTOM_STEP 7+7 +#TX +0 0x0000 //TX_OPERATION_MODE_0 +1 0x0000 //TX_OPERATION_MODE_1 +2 0x0036 //TX_PATCH_REG +3 0x2F7E //TX_SENDFUNC_MODE_0 +4 0x0001 //TX_SENDFUNC_MODE_1 +5 0x0002 //TX_NUM_MIC +6 0x0001 //TX_SAMPLINGFREQ_SIG +7 0x0001 //TX_SAMPLINGFREQ_PROC +8 0x000A //TX_FRAME_SZ_SIG +9 0x000A //TX_FRAME_SZ +10 0x0000 //TX_DELAY_OPT +11 0x0028 //TX_MAX_TAIL_LENGTH +12 0x0001 //TX_NUM_LOUTCHN +13 0x0001 //TX_MAXNUM_AECREF +14 0x0000 //TX_DBG_FUNC_REG +15 0x0000 //TX_DBG_FUNC_REG1 +16 0x0000 //TX_SYS_RESRV_0 +17 0x0000 //TX_SYS_RESRV_1 +18 0x0000 //TX_SYS_RESRV_2 +19 0x0000 //TX_SYS_RESRV_3 +20 0x0000 //TX_DIST2REF0 +21 0x00A3 //TX_DIST2REF1 +22 0x0000 //TX_DIST2REF_02 +23 0x0000 //TX_DIST2REF_03 +24 0x0000 //TX_DIST2REF_04 +25 0x0000 //TX_DIST2REF_05 +26 0x0000 //TX_MMIC +27 0x1000 //TX_PGA_0 +28 0x1000 //TX_PGA_1 +29 0x1000 //TX_PGA_2 +30 0x0000 //TX_PGA_3 +31 0x0000 //TX_PGA_4 +32 0x0000 //TX_PGA_5 +33 0x0000 //TX_MIC_PAIRS +34 0x0000 //TX_MIC_PAIRS_HS +35 0x0002 //TX_MICS_FOR_BF +36 0x0000 //TX_MIC_PAIRS_FORL1 +37 0x0002 //TX_MICS_OF_PAIR0 +38 0x0002 //TX_MICS_OF_PAIR1 +39 0x0002 //TX_MICS_OF_PAIR2 +40 0x0002 //TX_MICS_OF_PAIR3 +41 0x0000 //TX_MIC_DATA_SRC0 +42 0x0002 //TX_MIC_DATA_SRC1 +43 0x0001 //TX_MIC_DATA_SRC2 +44 0x0000 //TX_MIC_DATA_SRC3 +45 0x0000 //TX_MIC_PAIR_CH_04 +46 0x0000 //TX_MIC_PAIR_CH_05 +47 0x0000 //TX_MIC_PAIR_CH_10 +48 0x0000 //TX_MIC_PAIR_CH_11 +49 0x0000 //TX_MIC_PAIR_CH_12 +50 0x0000 //TX_MIC_PAIR_CH_13 +51 0x0000 //TX_MIC_PAIR_CH_14 +52 0x05DC //TX_HD_BIN_MASK +53 0x0010 //TX_HD_SUBAND_MASK +54 0x19A1 //TX_HD_FRAME_AVG_MASK +55 0x0320 //TX_HD_MIN_FRQ +56 0x1000 //TX_HD_ALPHA_PSD +57 0x1100 //TX_T_PHPR1 +58 0x0000 //TX_T_PHPR2 +59 0x0000 //TX_T_PTPR +60 0x0000 //TX_T_PNPR +61 0x0000 //TX_T_PAPR1 +62 0xEE6C //TX_T_PSDVAT +63 0x0800 //TX_CNT +64 0x4000 //TX_ANTI_HOWL_GAIN +65 0x0001 //TX_MICFORBFMARK_0 +66 0x0001 //TX_MICFORBFMARK_1 +67 0x0001 //TX_MICFORBFMARK_2 +68 0x0001 //TX_MICFORBFMARK_3 +69 0x0001 //TX_MICFORBFMARK_4 +70 0x0001 //TX_MICFORBFMARK_5 +71 0x0000 //TX_DIST2REF_10 +72 0x3A66 //TX_DIST2REF_11 +73 0x0000 //TX_DIST2REF2 +74 0x0000 //TX_DIST2REF_13 +75 0x0000 //TX_DIST2REF_14 +76 0x0000 //TX_DIST2REF_15 +77 0x0000 //TX_DIST2REF_20 +78 0x0000 //TX_DIST2REF_21 +79 0x0000 //TX_DIST2REF_22 +80 0x0000 //TX_DIST2REF_23 +81 0x0000 //TX_DIST2REF_24 +82 0x0000 //TX_DIST2REF_25 +83 0x0000 //TX_DIST2REF_30 +84 0x0000 //TX_DIST2REF_31 +85 0x0000 //TX_DIST2REF_32 +86 0x0000 //TX_DIST2REF_33 +87 0x0000 //TX_DIST2REF_34 +88 0x0000 //TX_DIST2REF_35 +89 0x0000 //TX_MIC_LOC_00 +90 0x0000 //TX_MIC_LOC_01 +91 0x0000 //TX_MIC_LOC_02 +92 0x0000 //TX_MIC_LOC_03 +93 0x0000 //TX_MIC_LOC_04 +94 0x0000 //TX_MIC_LOC_05 +95 0x0000 //TX_MIC_LOC_10 +96 0x0000 //TX_MIC_LOC_11 +97 0x0000 //TX_MIC_LOC_12 +98 0x0000 //TX_MIC_LOC_13 +99 0x0000 //TX_MIC_LOC_14 +100 0x0000 //TX_MIC_LOC_15 +101 0x0000 //TX_MIC_LOC_20 +102 0x0000 //TX_MIC_LOC_21 +103 0x0000 //TX_MIC_LOC_22 +104 0x0000 //TX_MIC_LOC_23 +105 0x0000 //TX_MIC_LOC_24 +106 0x0000 //TX_MIC_LOC_25 +107 0x0800 //TX_MIC_REFBLK_VOLUME +108 0x0AAC //TX_MIC_BLOCK_VOLUME +109 0x0000 //TX_INVERSE_MASK +110 0x0000 //TX_ADCS_MASK +111 0x04D0 //TX_ADCS_GAIN +112 0x4000 //TX_NFC_GAINFAC +113 0x0000 //TX_MAINMIC_BLKFACTOR +114 0x0000 //TX_REFMIC_BLKFACTOR +115 0x0000 //TX_BLMIC_BLKFACTOR +116 0x0000 //TX_BRMIC_BLKFACTOR +117 0x0031 //TX_MICBLK_START_BIN +118 0x0060 //TX_MICBLK_END_BIN +119 0x0015 //TX_MICBLK_FE_HOLD +120 0xFFF2 //TX_MICBLK_MR_EXP_TH +121 0xFFF2 //TX_MICBLK_LR_EXP_TH +122 0x0000 //TX_FENE_HOLD +123 0x4000 //TX_FE_ENER_TH_MTS +124 0x0004 //TX_FE_ENER_TH_EXP +125 0x6000 //TX_C_POST_FLT_MIC_MAINBLK +126 0x6000 //TX_C_POST_FLT_MIC_REFBLK +127 0x0010 //TX_MIC_BLOCK_N +128 0x7B02 //TX_A_HP +129 0x4000 //TX_B_PE +130 0x1800 //TX_THR_PITCH_DET_0 +131 0x1000 //TX_THR_PITCH_DET_1 +132 0x0800 //TX_THR_PITCH_DET_2 +133 0x0008 //TX_PITCH_BFR_LEN +134 0x0003 //TX_SBD_PITCH_DET +135 0x0050 //TX_TD_AEC_L +136 0x4000 //TX_MU0_UNP_TD_AEC +137 0x1000 //TX_MU0_PTD_TD_AEC +138 0x0000 //TX_PP_RESRV_0 +139 0x2A94 //TX_PP_RESRV_1 +140 0x55F0 //TX_PP_RESRV_2 +141 0x0000 //TX_PP_RESRV_3 +142 0x0000 //TX_PP_RESRV_4 +143 0x0000 //TX_PP_RESRV_5 +144 0x0000 //TX_PP_RESRV_6 +145 0x0000 //TX_PP_RESRV_7 +146 0x0028 //TX_TAIL_LENGTH +147 0x0800 //TX_AEC_REF_GAIN_0 +148 0x0800 //TX_AEC_REF_GAIN_1 +149 0x0800 //TX_AEC_REF_GAIN_2 +150 0x6000 //TX_EAD_THR +151 0x2000 //TX_THR_RE_EST +152 0x0100 //TX_MIN_EQ_RE_EST_0 +153 0x0100 //TX_MIN_EQ_RE_EST_1 +154 0x0100 //TX_MIN_EQ_RE_EST_2 +155 0x0200 //TX_MIN_EQ_RE_EST_3 +156 0x0200 //TX_MIN_EQ_RE_EST_4 +157 0x0200 //TX_MIN_EQ_RE_EST_5 +158 0x0200 //TX_MIN_EQ_RE_EST_6 +159 0x0200 //TX_MIN_EQ_RE_EST_7 +160 0x1000 //TX_MIN_EQ_RE_EST_8 +161 0x1000 //TX_MIN_EQ_RE_EST_9 +162 0x1000 //TX_MIN_EQ_RE_EST_10 +163 0x0400 //TX_MIN_EQ_RE_EST_11 +164 0x1000 //TX_MIN_EQ_RE_EST_12 +165 0x3000 //TX_LAMBDA_RE_EST +166 0x1000 //TX_LAMBDA_CB_NLE +167 0x0400 //TX_C_POST_FLT +168 0x4000 //TX_GAIN_NP +169 0x003C //TX_SE_HOLD_N +170 0x0046 //TX_DT_HOLD_N +171 0x03E8 //TX_DT2_HOLD_N +172 0x6666 //TX_AEC_RESRV_0 +173 0x0000 //TX_AEC_RESRV_1 +174 0x0014 //TX_AEC_RESRV_2 +175 0x0000 //TX_MIC_DELAY_LENGTH +176 0x0000 //TX_REF_DELAY_LENGTH +177 0x0000 //TX_ADD_LINEIN_GAINL +178 0x0000 //TX_ADD_LINEIN_GAINH +179 0x0000 //TX_MIN_EQ_RE_EST_14 +180 0x0000 //TX_DTD_THR1_8 +181 0x7FFF //TX_DTD_THR2_8 +182 0x0000 //TX_DTD_MIC_BLK2 +183 0x0008 //TX_FRQ_LIN_LEN +184 0x7FFF //TX_FRQ_AEC_LEN_RHO +185 0x6000 //TX_MU0_UNP_FRQ_AEC +186 0x4000 //TX_MU0_PTD_FRQ_AEC +187 0x000A //TX_MINENOISETH +188 0x0800 //TX_MU0_RE_EST +189 0x0001 //TX_AEC_NUM_CH +190 0x0000 //TX_BIGECHOATTENUATION_MAX +191 0x2000 //TX_A_POST_FLT_MICBLK +192 0x0000 //TX_BLKENERTH +193 0x0000 //TX_BLKENERHIGHTH +194 0x0000 //TX_NORMENERTH +195 0x0000 //TX_NORMENERHIGHTH +196 0x0000 //TX_NORMENERHIGHTHL +197 0x7000 //TX_DTD_THR1_0 +198 0x7000 //TX_DTD_THR1_1 +199 0x7000 //TX_DTD_THR1_2 +200 0x7F00 //TX_DTD_THR1_3 +201 0x7F00 //TX_DTD_THR1_4 +202 0x7F00 //TX_DTD_THR1_5 +203 0x7F00 //TX_DTD_THR1_6 +204 0x2000 //TX_DTD_THR2_0 +205 0x2000 //TX_DTD_THR2_1 +206 0x2000 //TX_DTD_THR2_2 +207 0x1000 //TX_DTD_THR2_3 +208 0x1000 //TX_DTD_THR2_4 +209 0x1000 //TX_DTD_THR2_5 +210 0x1000 //TX_DTD_THR2_6 +211 0x7FFF //TX_DTD_THR3 +212 0x0000 //TX_SPK_CUT_K +213 0x1B58 //TX_DT_CUT_K +214 0x0100 //TX_DT_CUT_THR +215 0x04EB //TX_COMFORT_G +216 0x01F4 //TX_POWER_YOUT_TH +217 0x4000 //TX_FDPFGAINECHO +218 0x0000 //TX_DTD_HD_THR +219 0x0000 //TX_SPK_CUT_K_S +220 0x0000 //TX_DTD_MIC_BLK +221 0x0400 //TX_ADPT_STRICT_L +222 0x0200 //TX_ADPT_STRICT_H +223 0x0000 //TX_RATIO_DT_L_TH_LOW +224 0x0000 //TX_RATIO_DT_H_TH_LOW +225 0x0000 //TX_RATIO_DT_L_TH_HIGH +226 0x0000 //TX_RATIO_DT_H_TH_HIGH +227 0x0000 //TX_RATIO_DT_L0_TH +228 0x2000 //TX_B_POST_FILT_ECHO_L +229 0x2000 //TX_B_POST_FILT_ECHO_H +230 0x0200 //TX_MIN_G_CTRL_ECHO +231 0x7FFF //TX_B_LESSCUT_RTO_ECHO +232 0x0000 //TX_EPD_OFFSET_00 +233 0x0000 //TX_EPD_OFFST_01 +234 0x0000 //TX_RATIO_DT_L0_TH_HIGH +235 0x3A98 //TX_RATIO_DT_H_TH_CUT +236 0x7FFF //TX_MIN_EQ_RE_EST_13 +237 0x0000 //TX_DTD_THR1_7 +238 0x0000 //TX_DTD_THR2_7 +239 0x0800 //TX_DT_RESRV_7 +240 0x0800 //TX_DT_RESRV_8 +241 0x0000 //TX_DT_RESRV_9 +242 0xF600 //TX_THR_SN_EST_0 +243 0xFA00 //TX_THR_SN_EST_1 +244 0xFB00 //TX_THR_SN_EST_2 +245 0xF800 //TX_THR_SN_EST_3 +246 0xFA00 //TX_THR_SN_EST_4 +247 0xF800 //TX_THR_SN_EST_5 +248 0xF800 //TX_THR_SN_EST_6 +249 0xF700 //TX_THR_SN_EST_7 +250 0x0000 //TX_DELTA_THR_SN_EST_0 +251 0x01A0 //TX_DELTA_THR_SN_EST_1 +252 0x0200 //TX_DELTA_THR_SN_EST_2 +253 0x0200 //TX_DELTA_THR_SN_EST_3 +254 0x0100 //TX_DELTA_THR_SN_EST_4 +255 0x0200 //TX_DELTA_THR_SN_EST_5 +256 0x0100 //TX_DELTA_THR_SN_EST_6 +257 0x0200 //TX_DELTA_THR_SN_EST_7 +258 0x4000 //TX_LAMBDA_NN_EST_0 +259 0x5000 //TX_LAMBDA_NN_EST_1 +260 0x4000 //TX_LAMBDA_NN_EST_2 +261 0x4000 //TX_LAMBDA_NN_EST_3 +262 0x4000 //TX_LAMBDA_NN_EST_4 +263 0x4000 //TX_LAMBDA_NN_EST_5 +264 0x4000 //TX_LAMBDA_NN_EST_6 +265 0x4000 //TX_LAMBDA_NN_EST_7 +266 0x0400 //TX_N_SN_EST +267 0x001E //TX_INBEAM_T +268 0x0041 //TX_INBEAMHOLDT +269 0x2000 //TX_G_STRICT +270 0x0000 //TX_EQ_THR_BF +271 0x799A //TX_LAMBDA_EQ_BF +272 0x1000 //TX_NE_RTO_TH +273 0x1000 //TX_NE_RTO_TH_L +274 0x2000 //TX_MAINREFRTOH_TH_H +275 0x1400 //TX_MAINREFRTOH_TH_L +276 0x2000 //TX_MAINREFRTO_TH_H +277 0x1400 //TX_MAINREFRTO_TH_L +278 0x0000 //TX_MAINREFRTO_TH_EQ +279 0x1000 //TX_B_POST_FLT_0 +280 0x4000 //TX_B_POST_FLT_1 +281 0x0018 //TX_NS_LVL_CTRL_0 +282 0x0019 //TX_NS_LVL_CTRL_1 +283 0x0018 //TX_NS_LVL_CTRL_2 +284 0x0019 //TX_NS_LVL_CTRL_3 +285 0x001A //TX_NS_LVL_CTRL_4 +286 0x001E //TX_NS_LVL_CTRL_5 +287 0x001C //TX_NS_LVL_CTRL_6 +288 0x001C //TX_NS_LVL_CTRL_7 +289 0x000E //TX_MIN_GAIN_S_0 +290 0x0012 //TX_MIN_GAIN_S_1 +291 0x0012 //TX_MIN_GAIN_S_2 +292 0x0012 //TX_MIN_GAIN_S_3 +293 0x0018 //TX_MIN_GAIN_S_4 +294 0x0018 //TX_MIN_GAIN_S_5 +295 0x0018 //TX_MIN_GAIN_S_6 +296 0x0018 //TX_MIN_GAIN_S_7 +297 0x5000 //TX_NMOS_SUP +298 0x0000 //TX_NS_MAX_PRI_SNR_TH +299 0x0000 //TX_NMOS_SUP_MENSA +300 0x7FFF //TX_SNRI_SUP_0 +301 0x5000 //TX_SNRI_SUP_1 +302 0x4000 //TX_SNRI_SUP_2 +303 0x4000 //TX_SNRI_SUP_3 +304 0x4000 //TX_SNRI_SUP_4 +305 0x4000 //TX_SNRI_SUP_5 +306 0x4000 //TX_SNRI_SUP_6 +307 0x4000 //TX_SNRI_SUP_7 +308 0x4000 //TX_THR_LFNS +309 0x0018 //TX_G_LFNS +310 0x09C4 //TX_GAIN0_NTH +311 0x000A //TX_MUSIC_MORENS +312 0x7FFF //TX_A_POST_FILT_0 +313 0x2000 //TX_A_POST_FILT_1 +314 0x7000 //TX_A_POST_FILT_S_0 +315 0x3000 //TX_A_POST_FILT_S_1 +316 0x3000 //TX_A_POST_FILT_S_2 +317 0x2000 //TX_A_POST_FILT_S_3 +318 0x7000 //TX_A_POST_FILT_S_4 +319 0x7000 //TX_A_POST_FILT_S_5 +320 0x7000 //TX_A_POST_FILT_S_6 +321 0x7000 //TX_A_POST_FILT_S_7 +322 0x1000 //TX_B_POST_FILT_0 +323 0x4000 //TX_B_POST_FILT_1 +324 0x4000 //TX_B_POST_FILT_2 +325 0x4000 //TX_B_POST_FILT_3 +326 0x4000 //TX_B_POST_FILT_4 +327 0x4000 //TX_B_POST_FILT_5 +328 0x5000 //TX_B_POST_FILT_6 +329 0x4000 //TX_B_POST_FILT_7 +330 0x4000 //TX_B_LESSCUT_RTO_S_0 +331 0x6000 //TX_B_LESSCUT_RTO_S_1 +332 0x6000 //TX_B_LESSCUT_RTO_S_2 +333 0x6000 //TX_B_LESSCUT_RTO_S_3 +334 0x7FFF //TX_B_LESSCUT_RTO_S_4 +335 0x6000 //TX_B_LESSCUT_RTO_S_5 +336 0x6000 //TX_B_LESSCUT_RTO_S_6 +337 0x7FFF //TX_B_LESSCUT_RTO_S_7 +338 0x7C29 //TX_LAMBDA_PFILT +339 0x7C29 //TX_LAMBDA_PFILT_S_0 +340 0x7C29 //TX_LAMBDA_PFILT_S_1 +341 0x7C29 //TX_LAMBDA_PFILT_S_2 +342 0x7C29 //TX_LAMBDA_PFILT_S_3 +343 0x7C29 //TX_LAMBDA_PFILT_S_4 +344 0x7C29 //TX_LAMBDA_PFILT_S_5 +345 0x7C29 //TX_LAMBDA_PFILT_S_6 +346 0x7C29 //TX_LAMBDA_PFILT_S_7 +347 0x0200 //TX_K_PEPPER +348 0x0600 //TX_A_PEPPER +349 0x1D4C //TX_K_PEPPER_HF +350 0x0400 //TX_A_PEPPER_HF +351 0x0001 //TX_HMNC_BST_FLG +352 0x4000 //TX_HMNC_BST_THR +353 0x0800 //TX_DT_BINVAD_TH_0 +354 0x0800 //TX_DT_BINVAD_TH_1 +355 0x0800 //TX_DT_BINVAD_TH_2 +356 0x0800 //TX_DT_BINVAD_TH_3 +357 0x0000 //TX_DT_BINVAD_ENDF +358 0x1000 //TX_C_POST_FLT_DT +359 0x7FFF //TX_NS_B_POST_FLT_LESSCUT +360 0x0100 //TX_DT_BOOST +361 0x0000 //TX_BF_SGRAD_FLG +362 0x0005 //TX_BF_DVG_TH +363 0x001E //TX_SN_C_F +364 0x0000 //TX_K_APT +365 0x0001 //TX_NOISEDET +366 0x0190 //TX_NDETCT +367 0x000A //TX_NOISE_TH_0 +368 0x7FFF //TX_NOISE_TH_0_2 +369 0x7FFF //TX_NOISE_TH_0_3 +370 0x0139 //TX_NOISE_TH_1 +371 0x0479 //TX_NOISE_TH_2 +372 0x2328 //TX_NOISE_TH_3 +373 0x4422 //TX_NOISE_TH_4 +374 0x5586 //TX_NOISE_TH_5 +375 0x4425 //TX_NOISE_TH_5_2 +376 0x0032 //TX_NOISE_TH_5_3 +377 0x4E20 //TX_NOISE_TH_5_4 +378 0x21E8 //TX_NOISE_TH_6 +379 0x0014 //TX_MINENOISE_TH +380 0xD508 //TX_MORENS_TFMASK_TH +381 0x0001 //TX_DRC_QUIET_FLOOR +382 0x6D60 //TX_RATIODTL_CUT_TH +383 0x0DAC //TX_DT_CUT_K1 +384 0x00A5 //TX_OUT_ENER_S_TH_CLEAN +385 0x00A5 //TX_OUT_ENER_S_TH_LESSCLEAN +386 0x00A5 //TX_OUT_ENER_S_TH_NOISY +387 0x0029 //TX_OUT_ENER_TH_NOISE +388 0x00CE //TX_OUT_ENER_TH_SPEECH +389 0x2000 //TX_SN_NPB_GAIN +390 0x0000 //TX_NN_NPB_GAIN +391 0x3000 //TX_POST_MASK_SUP_HSNE +392 0x07D0 //TX_TAIL_DET_TH +393 0x4000 //TX_B_LESSCUT_RTO_WTA +394 0x0000 //TX_MEL_G_R +395 0x0080 //TX_SUPHIGH_TH +396 0x4000 //TX_MASK_G_R +397 0x0002 //TX_EXTRA_NS_L +398 0x1800 //TX_C_POST_FLT_MASK +399 0x7FFF //TX_A_POST_FLT_WNS +400 0x0148 //TX_MIN_G_LOW300HZ +401 0x0004 //TX_MAXLEVEL_CNG +402 0x00B4 //TX_STN_NOISE_TH +403 0x4000 //TX_POST_MASK_SUP +404 0x7FFF //TX_POST_MASK_ADJUST +405 0x00C8 //TX_NS_ENOISE_MIC0_TH +406 0x0014 //TX_MINENOISE_MIC0_TH +407 0x012C //TX_MINENOISE_MIC0_S_TH +408 0x4900 //TX_MIN_G_CTRL_SSNS +409 0x1000 //TX_METAL_RTO_THR +410 0x0FA0 //TX_NS_FP_K_METAL +411 0x3A98 //TX_NOISEDET_BOOST_TH +412 0x0FA0 //TX_NSMOOTH_TH +413 0x0000 //TX_NS_RESRV_8 +414 0x1800 //TX_RHO_UPB +415 0x2328 //TX_N_HOLD_HS +416 0x006E //TX_N_RHO_BFR0 +417 0x7FFF //TX_LAMBDA_ARSP_EST +418 0x0100 //TX_EXTRA_GAIN_MICBLOCK +419 0x0333 //TX_THR_STD_NSR +420 0x019A //TX_THR_STD_PLH +421 0x03E8 //TX_N_HOLD_STD +422 0x0066 //TX_THR_STD_RHO +423 0x2800 //TX_BF_RESET_THR_HS +424 0x0CCD //TX_SB_RTO_MEAN_TH +425 0x0300 //TX_SB_RHO_MEAN_TH_NTALK +426 0x1C00 //TX_SB_RTO_MEAN_TH_ABN +427 0x2EE0 //TX_SB_RTO_MEAN_TH_RUB +428 0x0000 //TX_WTA_EN_RTO_TH +429 0x1400 //TX_TOP_ENER_TH_F +430 0x0100 //TX_DESIRED_TALK_HOLDT +431 0x0800 //TX_MIC_BLOCK_FACTOR +432 0x0000 //TX_NSEST_BFRLRNRDC +433 0x0000 //TX_THR_POST_FLT_HS +434 0x0010 //TX_HS_VAD_BIN +435 0x2666 //TX_THR_VAD_HS +436 0x2CCD //TX_MEAN_RTO_MIN_TH2 +437 0x0032 //TX_SILENCE_T +438 0x0000 //TX_A_POST_FLT_WTA +439 0x799A //TX_LAMBDA_PFLT_WTA +440 0x05A8 //TX_SB_RHO_MEAN2_TH +441 0x0384 //TX_SB_RHO_MEAN3_TH +442 0x0000 //TX_HS_RESRV_4 +443 0x0000 //TX_HS_RESRV_5 +444 0x0001 //TX_DOA_VAD_THR_1 +445 0x003C //TX_DOA_VAD_THR_2 +446 0x0028 //TX_DOA_VAD_THR1_0 +447 0x0028 //TX_DOA_VAD_THR1_1 +448 0x0000 //TX_SRC_DOA_RNG_LOW_0A +449 0x001E //TX_SRC_DOA_RNG_HIGH_0A +450 0x005A //TX_DFLT_SRC_DOA_0A +451 0x0000 //TX_SRC_DOA_RNG_LOW_0B +452 0x0000 //TX_SRC_DOA_RNG_HIGH_0B +453 0x0000 //TX_DFLT_SRC_DOA_0B +454 0x0000 //TX_SRC_DOA_RNG_LOW_0C +455 0x0000 //TX_SRC_DOA_RNG_HIGH_0C +456 0x0000 //TX_DFLT_SRC_DOA_0C +457 0x0000 //TX_SRC_DOA_RNG_LOW_0D +458 0x0000 //TX_SRC_DOA_RNG_HIGH_0D +459 0x0000 //TX_DFLT_SRC_DOA_0D +460 0x0000 //TX_SRC_DOA_RNG_LOW_1A +461 0x00B4 //TX_SRC_DOA_RNG_HIGH_1A +462 0x005A //TX_DFLT_SRC_DOA_1A +463 0x0000 //TX_SRC_DOA_RNG_LOW_1B +464 0x00B4 //TX_SRC_DOA_RNG_HIGH_1B +465 0x005A //TX_DFLT_SRC_DOA_1B +466 0x0000 //TX_SRC_DOA_RNG_LOW_1C +467 0x00B4 //TX_SRC_DOA_RNG_HIGH_1C +468 0x005A //TX_DFLT_SRC_DOA_1C +469 0x0000 //TX_SRC_DOA_RNG_LOW_1D +470 0x00B4 //TX_SRC_DOA_RNG_HIGH_1D +471 0x005A //TX_DFLT_SRC_DOA_1D +472 0x0100 //TX_BF_HOLDOFF_T +473 0x7FFF //TX_DOA_COST_FACTOR +474 0x0D9A //TX_MAINTOREFR_TH0 +475 0x071C //TX_DOA_TRK_THR +476 0x012C //TX_DOA_TRACK_HT +477 0x0200 //TX_N1_HOLD_HF +478 0x0100 //TX_N2_HOLD_HF +479 0x2A3D //TX_BF_RESET_THR_HF +480 0x7333 //TX_DOA_SMOOTH +481 0x0800 //TX_MU_BF +482 0x0800 //TX_BF_MU_LF_B2 +483 0x0040 //TX_BF_FC_END_BIN_B2 +484 0x0020 //TX_BF_FC_END_BIN +485 0x0000 //TX_HF_RESRV_25 +486 0x0000 //TX_HF_RESRV_26 +487 0x0007 //TX_N_DOA_SEED +488 0x0001 //TX_FINE_DOA_SEARCH_FLG +489 0x0000 //TX_HF_RESRV_27 +490 0x038E //TX_DLT_SRC_DOA_RNG +491 0x0200 //TX_BF_MU_LF +492 0x0000 //TX_DFLT_SRC_LOC_0 +493 0x7FFF //TX_DFLT_SRC_LOC_1 +494 0x0000 //TX_DFLT_SRC_LOC_2 +495 0x038E //TX_DOA_TRACK_VADTH +496 0x0000 //TX_DOA_TRACK_NEW +497 0x0280 //TX_NOR_OFF_THR +498 0x7C00 //TX_MORE_ON_700HZ_THR +499 0x0200 //TX_MU_BF_ADPT_NS +500 0x0000 //TX_ADAPT_LEN +501 0x6666 //TX_MORE_SNS +502 0x0000 //TX_NOR_OFF_TH1 +503 0x0000 //TX_WIDE_MASK_TH +504 0xD333 //TX_SUBSNRATIOHIGH4MEANBCK_THR +505 0x6000 //TX_C_POST_FLT_CUT +506 0x2000 //TX_RADIODTLV +507 0x0320 //TX_POWER_LINEIN_TH +508 0x0014 //TX_FE_VADCOUNT_TH_FC +509 0x0000 //TX_ECHO_SUPP_FC +510 0x0C80 //TX_ECHO_TH +511 0x6666 //TX_MIC_TO_BFGAIN +512 0x0000 //TX_MICTOBFGAIN0 +513 0x0000 //TX_FASTMUE_TH +514 0x3000 //TX_DEREVERB_LF_MU +515 0x34CD //TX_DEREVERB_HF_MU +516 0x0007 //TX_DEREVERB_DELAY +517 0x0004 //TX_DEREVERB_COEF_LEN +518 0x0003 //TX_DEREVERB_DNR +519 0x0000 //TX_DEREVERB_ALPHA +520 0x0000 //TX_DEREVERB_BETA +521 0x0000 //TX_GSC_RTOL_TH +522 0x0000 //TX_GSC_RTOH_TH +523 0x7E2C //TX_WIDE2_MEANHTH +524 0x0000 //TX_DR_RESRV_5 +525 0x0000 //TX_DR_RESRV_6 +526 0x0000 //TX_DR_RESRV_7 +527 0x0000 //TX_DR_RESRV_8 +528 0x1333 //TX_WIND_MARK_TH +529 0x399A //TX_CORR_THR +530 0x0004 //TX_SNR_THR +531 0x0010 //TX_ENGY_THR +532 0x1770 //TX_CORR_HIGH_TH +533 0x6000 //TX_ENGY_THR_2 +534 0x3400 //TX_MEAN_RTO_THR +535 0x0028 //TX_WNS_ENOISE_MIC0_TH +536 0x3000 //TX_RATIOMICL_TH +537 0x7FFF //TX_CALIG_HS +538 0x0000 //TX_LVL_CTRL +539 0x0010 //TX_WIND_SUPRTO +540 0x0014 //TX_WNS_MIN_G +541 0x0600 //TX_WNS_B_POST_FLT +542 0x3000 //TX_RATIOMICH_TH +543 0xD120 //TX_WIND_INBEAM_L_TH +544 0x0FA0 //TX_WIND_INBEAM_H_TH +545 0x2000 //TX_WNS_RESRV_0 +546 0x59D8 //TX_WNS_RESRV_1 +547 0x0200 //TX_WNS_RESRV_2 +548 0x0000 //TX_WNS_RESRV_3 +549 0x0000 //TX_WNS_RESRV_4 +550 0x0000 //TX_WNS_RESRV_5 +551 0x0000 //TX_WNS_RESRV_6 +552 0x0000 //TX_PB_B_POST_FLT_LESSCUT +553 0x0070 //TX_BF_LESSCUT_BBIN +554 0x0070 //TX_BF_LESSCUT_EBIN +555 0x0010 //TX_POSTBFB0 +556 0x0070 //TX_POSTBFB +557 0x00B0 //TX_POSTBFE +558 0x0E66 //TX_SPEECH_SNR_TH +559 0x0050 //TX_PB_MAX_PRI_SNR_TH +560 0x770A //TX_MAX_PRI_SNR_TH_L +561 0x0000 //TX_PFGAIN +562 0x0000 //TX_MAINTOREFR_TH +563 0x0000 //TX_SAM_MARK +564 0x0000 //TX_PB_RESRV_0 +565 0x0000 //TX_PB_RESRV_1 +566 0x0030 //TX_FDEQ_SUBNUM +567 0x5C54 //TX_FDEQ_GAIN_0 +568 0x5048 //TX_FDEQ_GAIN_1 +569 0x4C4C //TX_FDEQ_GAIN_2 +570 0x474A //TX_FDEQ_GAIN_3 +571 0x473F //TX_FDEQ_GAIN_4 +572 0x4245 //TX_FDEQ_GAIN_5 +573 0x4B53 //TX_FDEQ_GAIN_6 +574 0x564A //TX_FDEQ_GAIN_7 +575 0x3D3A //TX_FDEQ_GAIN_8 +576 0x3B3C //TX_FDEQ_GAIN_9 +577 0x3C36 //TX_FDEQ_GAIN_10 +578 0x3636 //TX_FDEQ_GAIN_11 +579 0x3D3E //TX_FDEQ_GAIN_12 +580 0x4548 //TX_FDEQ_GAIN_13 +581 0x4848 //TX_FDEQ_GAIN_14 +582 0x4848 //TX_FDEQ_GAIN_15 +583 0x4848 //TX_FDEQ_GAIN_16 +584 0x4848 //TX_FDEQ_GAIN_17 +585 0x4848 //TX_FDEQ_GAIN_18 +586 0x4848 //TX_FDEQ_GAIN_19 +587 0x4848 //TX_FDEQ_GAIN_20 +588 0x4848 //TX_FDEQ_GAIN_21 +589 0x4848 //TX_FDEQ_GAIN_22 +590 0x4848 //TX_FDEQ_GAIN_23 +591 0x0202 //TX_FDEQ_BIN_0 +592 0x0104 //TX_FDEQ_BIN_1 +593 0x0502 //TX_FDEQ_BIN_2 +594 0x0202 //TX_FDEQ_BIN_3 +595 0x0504 //TX_FDEQ_BIN_4 +596 0x0708 //TX_FDEQ_BIN_5 +597 0x0808 //TX_FDEQ_BIN_6 +598 0x050E //TX_FDEQ_BIN_7 +599 0x0B0C //TX_FDEQ_BIN_8 +600 0x0F0F //TX_FDEQ_BIN_9 +601 0x0F0F //TX_FDEQ_BIN_10 +602 0x0F28 //TX_FDEQ_BIN_11 +603 0x0611 //TX_FDEQ_BIN_12 +604 0x0000 //TX_FDEQ_BIN_13 +605 0x0000 //TX_FDEQ_BIN_14 +606 0x0000 //TX_FDEQ_BIN_15 +607 0x0000 //TX_FDEQ_BIN_16 +608 0x0000 //TX_FDEQ_BIN_17 +609 0x0000 //TX_FDEQ_BIN_18 +610 0x0000 //TX_FDEQ_BIN_19 +611 0x0000 //TX_FDEQ_BIN_20 +612 0x0000 //TX_FDEQ_BIN_21 +613 0x0000 //TX_FDEQ_BIN_22 +614 0x0000 //TX_FDEQ_BIN_23 +615 0x0000 //TX_FDEQ_PADDING +616 0x0030 //TX_PREEQ_SUBNUM_MIC0 +617 0x4848 //TX_PREEQ_GAIN_MIC0_0 +618 0x4848 //TX_PREEQ_GAIN_MIC0_1 +619 0x4848 //TX_PREEQ_GAIN_MIC0_2 +620 0x4848 //TX_PREEQ_GAIN_MIC0_3 +621 0x4848 //TX_PREEQ_GAIN_MIC0_4 +622 0x4848 //TX_PREEQ_GAIN_MIC0_5 +623 0x4848 //TX_PREEQ_GAIN_MIC0_6 +624 0x4848 //TX_PREEQ_GAIN_MIC0_7 +625 0x4848 //TX_PREEQ_GAIN_MIC0_8 +626 0x4848 //TX_PREEQ_GAIN_MIC0_9 +627 0x4848 //TX_PREEQ_GAIN_MIC0_10 +628 0x4848 //TX_PREEQ_GAIN_MIC0_11 +629 0x4848 //TX_PREEQ_GAIN_MIC0_12 +630 0x4848 //TX_PREEQ_GAIN_MIC0_13 +631 0x4848 //TX_PREEQ_GAIN_MIC0_14 +632 0x4848 //TX_PREEQ_GAIN_MIC0_15 +633 0x4848 //TX_PREEQ_GAIN_MIC0_16 +634 0x4848 //TX_PREEQ_GAIN_MIC0_17 +635 0x4848 //TX_PREEQ_GAIN_MIC0_18 +636 0x4848 //TX_PREEQ_GAIN_MIC0_19 +637 0x4848 //TX_PREEQ_GAIN_MIC0_20 +638 0x4848 //TX_PREEQ_GAIN_MIC0_21 +639 0x4848 //TX_PREEQ_GAIN_MIC0_22 +640 0x4848 //TX_PREEQ_GAIN_MIC0_23 +641 0x251A //TX_PREEQ_BIN_MIC0_0 +642 0x0F0F //TX_PREEQ_BIN_MIC0_1 +643 0x0C0C //TX_PREEQ_BIN_MIC0_2 +644 0x0C0F //TX_PREEQ_BIN_MIC0_3 +645 0x0F0F //TX_PREEQ_BIN_MIC0_4 +646 0x0F09 //TX_PREEQ_BIN_MIC0_5 +647 0x0909 //TX_PREEQ_BIN_MIC0_6 +648 0x0908 //TX_PREEQ_BIN_MIC0_7 +649 0x0700 //TX_PREEQ_BIN_MIC0_8 +650 0x0000 //TX_PREEQ_BIN_MIC0_9 +651 0x0000 //TX_PREEQ_BIN_MIC0_10 +652 0x0000 //TX_PREEQ_BIN_MIC0_11 +653 0x0000 //TX_PREEQ_BIN_MIC0_12 +654 0x0000 //TX_PREEQ_BIN_MIC0_13 +655 0x0000 //TX_PREEQ_BIN_MIC0_14 +656 0x0000 //TX_PREEQ_BIN_MIC0_15 +657 0x0000 //TX_PREEQ_BIN_MIC0_16 +658 0x0000 //TX_PREEQ_BIN_MIC0_17 +659 0x0000 //TX_PREEQ_BIN_MIC0_18 +660 0x0000 //TX_PREEQ_BIN_MIC0_19 +661 0x0000 //TX_PREEQ_BIN_MIC0_20 +662 0x0000 //TX_PREEQ_BIN_MIC0_21 +663 0x0000 //TX_PREEQ_BIN_MIC0_22 +664 0x0000 //TX_PREEQ_BIN_MIC0_23 +665 0x0030 //TX_PREEQ_SUBNUM_MIC1 +666 0x4848 //TX_PREEQ_GAIN_MIC1_0 +667 0x4848 //TX_PREEQ_GAIN_MIC1_1 +668 0x4848 //TX_PREEQ_GAIN_MIC1_2 +669 0x4848 //TX_PREEQ_GAIN_MIC1_3 +670 0x4848 //TX_PREEQ_GAIN_MIC1_4 +671 0x4848 //TX_PREEQ_GAIN_MIC1_5 +672 0x494A //TX_PREEQ_GAIN_MIC1_6 +673 0x4B4C //TX_PREEQ_GAIN_MIC1_7 +674 0x4D4E //TX_PREEQ_GAIN_MIC1_8 +675 0x5051 //TX_PREEQ_GAIN_MIC1_9 +676 0x5255 //TX_PREEQ_GAIN_MIC1_10 +677 0x585A //TX_PREEQ_GAIN_MIC1_11 +678 0x5C5F //TX_PREEQ_GAIN_MIC1_12 +679 0x636A //TX_PREEQ_GAIN_MIC1_13 +680 0x4848 //TX_PREEQ_GAIN_MIC1_14 +681 0x4848 //TX_PREEQ_GAIN_MIC1_15 +682 0x4848 //TX_PREEQ_GAIN_MIC1_16 +683 0x4848 //TX_PREEQ_GAIN_MIC1_17 +684 0x4848 //TX_PREEQ_GAIN_MIC1_18 +685 0x4848 //TX_PREEQ_GAIN_MIC1_19 +686 0x4848 //TX_PREEQ_GAIN_MIC1_20 +687 0x4848 //TX_PREEQ_GAIN_MIC1_21 +688 0x4848 //TX_PREEQ_GAIN_MIC1_22 +689 0x4848 //TX_PREEQ_GAIN_MIC1_23 +690 0x0202 //TX_PREEQ_BIN_MIC1_0 +691 0x0203 //TX_PREEQ_BIN_MIC1_1 +692 0x0303 //TX_PREEQ_BIN_MIC1_2 +693 0x0304 //TX_PREEQ_BIN_MIC1_3 +694 0x0405 //TX_PREEQ_BIN_MIC1_4 +695 0x0506 //TX_PREEQ_BIN_MIC1_5 +696 0x0708 //TX_PREEQ_BIN_MIC1_6 +697 0x090A //TX_PREEQ_BIN_MIC1_7 +698 0x0B0C //TX_PREEQ_BIN_MIC1_8 +699 0x0D0E //TX_PREEQ_BIN_MIC1_9 +700 0x0F10 //TX_PREEQ_BIN_MIC1_10 +701 0x1011 //TX_PREEQ_BIN_MIC1_11 +702 0x1104 //TX_PREEQ_BIN_MIC1_12 +703 0x101B //TX_PREEQ_BIN_MIC1_13 +704 0x0000 //TX_PREEQ_BIN_MIC1_14 +705 0x0000 //TX_PREEQ_BIN_MIC1_15 +706 0x0000 //TX_PREEQ_BIN_MIC1_16 +707 0x0000 //TX_PREEQ_BIN_MIC1_17 +708 0x0000 //TX_PREEQ_BIN_MIC1_18 +709 0x0000 //TX_PREEQ_BIN_MIC1_19 +710 0x0000 //TX_PREEQ_BIN_MIC1_20 +711 0x0000 //TX_PREEQ_BIN_MIC1_21 +712 0x0000 //TX_PREEQ_BIN_MIC1_22 +713 0x0000 //TX_PREEQ_BIN_MIC1_23 +714 0x0030 //TX_PREEQ_SUBNUM_MIC2 +715 0x4848 //TX_PREEQ_GAIN_MIC2_0 +716 0x4848 //TX_PREEQ_GAIN_MIC2_1 +717 0x4848 //TX_PREEQ_GAIN_MIC2_2 +718 0x4848 //TX_PREEQ_GAIN_MIC2_3 +719 0x4848 //TX_PREEQ_GAIN_MIC2_4 +720 0x4848 //TX_PREEQ_GAIN_MIC2_5 +721 0x4848 //TX_PREEQ_GAIN_MIC2_6 +722 0x4848 //TX_PREEQ_GAIN_MIC2_7 +723 0x4848 //TX_PREEQ_GAIN_MIC2_8 +724 0x4848 //TX_PREEQ_GAIN_MIC2_9 +725 0x4848 //TX_PREEQ_GAIN_MIC2_10 +726 0x4848 //TX_PREEQ_GAIN_MIC2_11 +727 0x4848 //TX_PREEQ_GAIN_MIC2_12 +728 0x4848 //TX_PREEQ_GAIN_MIC2_13 +729 0x4848 //TX_PREEQ_GAIN_MIC2_14 +730 0x4848 //TX_PREEQ_GAIN_MIC2_15 +731 0x4848 //TX_PREEQ_GAIN_MIC2_16 +732 0x4848 //TX_PREEQ_GAIN_MIC2_17 +733 0x4848 //TX_PREEQ_GAIN_MIC2_18 +734 0x4848 //TX_PREEQ_GAIN_MIC2_19 +735 0x4848 //TX_PREEQ_GAIN_MIC2_20 +736 0x4848 //TX_PREEQ_GAIN_MIC2_21 +737 0x4848 //TX_PREEQ_GAIN_MIC2_22 +738 0x4848 //TX_PREEQ_GAIN_MIC2_23 +739 0x0608 //TX_PREEQ_BIN_MIC2_0 +740 0x0808 //TX_PREEQ_BIN_MIC2_1 +741 0x0808 //TX_PREEQ_BIN_MIC2_2 +742 0x0808 //TX_PREEQ_BIN_MIC2_3 +743 0x0808 //TX_PREEQ_BIN_MIC2_4 +744 0x0808 //TX_PREEQ_BIN_MIC2_5 +745 0x0808 //TX_PREEQ_BIN_MIC2_6 +746 0x0808 //TX_PREEQ_BIN_MIC2_7 +747 0x0808 //TX_PREEQ_BIN_MIC2_8 +748 0x0808 //TX_PREEQ_BIN_MIC2_9 +749 0x0808 //TX_PREEQ_BIN_MIC2_10 +750 0x0808 //TX_PREEQ_BIN_MIC2_11 +751 0x0808 //TX_PREEQ_BIN_MIC2_12 +752 0x0808 //TX_PREEQ_BIN_MIC2_13 +753 0x0808 //TX_PREEQ_BIN_MIC2_14 +754 0x0200 //TX_PREEQ_BIN_MIC2_15 +755 0x0000 //TX_PREEQ_BIN_MIC2_16 +756 0x0000 //TX_PREEQ_BIN_MIC2_17 +757 0x0000 //TX_PREEQ_BIN_MIC2_18 +758 0x0000 //TX_PREEQ_BIN_MIC2_19 +759 0x0000 //TX_PREEQ_BIN_MIC2_20 +760 0x0000 //TX_PREEQ_BIN_MIC2_21 +761 0x0000 //TX_PREEQ_BIN_MIC2_22 +762 0x0000 //TX_PREEQ_BIN_MIC2_23 +763 0x0006 //TX_MASKING_ABILITY +764 0x0800 //TX_NND_WEIGHT +765 0x0062 //TX_MIC_CALIBRATION_0 +766 0x0062 //TX_MIC_CALIBRATION_1 +767 0x0062 //TX_MIC_CALIBRATION_2 +768 0x0062 //TX_MIC_CALIBRATION_3 +769 0x0046 //TX_MIC_PWR_BIAS_0 +770 0x0046 //TX_MIC_PWR_BIAS_1 +771 0x0046 //TX_MIC_PWR_BIAS_2 +772 0x0046 //TX_MIC_PWR_BIAS_3 +773 0x0000 //TX_GAIN_LIMIT_0 +774 0x0000 //TX_GAIN_LIMIT_1 +775 0x0006 //TX_GAIN_LIMIT_2 +776 0x0007 //TX_GAIN_LIMIT_3 +777 0x7F5B //TX_BVE_NOVAD0_ALPHADOWN +778 0x7FDE //TX_BVE_VAD0_ALPHAUP +779 0x7F3A //TX_BVE_VAD0_ALPHADOWN +780 0x2000 //TX_BVE_GAINWEIGHT_NOFEVADLI +781 0x7F5B //TX_BVE_FEVADLI_ALPHA +782 0x7F19 //TX_BVE_NOVAD0_ALPHAUP +783 0x1000 //TX_TDDRC_ALPHA_UP_01 +784 0x1000 //TX_TDDRC_ALPHA_UP_02 +785 0x1000 //TX_TDDRC_ALPHA_UP_03 +786 0x1000 //TX_TDDRC_ALPHA_UP_04 +787 0x7EB8 //TX_TDDRC_ALPHA_DWN_01 +788 0x7EB8 //TX_TDDRC_ALPHA_DWN_02 +789 0x7EB8 //TX_TDDRC_ALPHA_DWN_03 +790 0x7EB8 //TX_TDDRC_ALPHA_DWN_04 +791 0x7FFF //TX_TDDRC_TD_DRC_LIMIT +792 0x0800 //TX_TDDRC_POST_LIMIT_GAIN +793 0x0000 //TX_TDDRC_RESRV_0 +794 0x0000 //TX_TDDRC_RESRV_1 +795 0x0018 //TX_FDDRC_BAND_MARGIN_0 +796 0x0030 //TX_FDDRC_BAND_MARGIN_1 +797 0x0050 //TX_FDDRC_BAND_MARGIN_2 +798 0x0080 //TX_FDDRC_BAND_MARGIN_3 +799 0x0007 //TX_FDDRC_BLOCK_EXP +800 0x5000 //TX_FDDRC_THRD_2_0 +801 0x5000 //TX_FDDRC_THRD_2_1 +802 0x5000 //TX_FDDRC_THRD_2_2 +803 0x5000 //TX_FDDRC_THRD_2_3 +804 0x6400 //TX_FDDRC_THRD_3_0 +805 0x6400 //TX_FDDRC_THRD_3_1 +806 0x6400 //TX_FDDRC_THRD_3_2 +807 0x6400 //TX_FDDRC_THRD_3_3 +808 0x2000 //TX_FDDRC_SLANT_0_0 +809 0x2000 //TX_FDDRC_SLANT_0_1 +810 0x2000 //TX_FDDRC_SLANT_0_2 +811 0x2000 //TX_FDDRC_SLANT_0_3 +812 0x5333 //TX_FDDRC_SLANT_1_0 +813 0x5333 //TX_FDDRC_SLANT_1_1 +814 0x5333 //TX_FDDRC_SLANT_1_2 +815 0x5333 //TX_FDDRC_SLANT_1_3 +816 0x0010 //TX_DEADMIC_SILENCE_TH +817 0x0600 //TX_MIC_DEGRADE_TH +818 0x0078 //TX_DEADMIC_CNT +819 0x0078 //TX_MIC_DEGRADE_CNT +820 0x0000 //TX_FDDRC_RESRV_4 +821 0x0000 //TX_FDDRC_RESRV_5 +822 0x0000 //TX_FDDRC_RESRV_6 +823 0x7FFF //TX_KS_NOISEPASTE_FACTOR +824 0x0001 //TX_KS_CONFIG +825 0x7FFF //TX_KS_GAIN_MIN +826 0x0000 //TX_KS_RESRV_0 +827 0x0000 //TX_KS_RESRV_1 +828 0x0000 //TX_KS_RESRV_2 +829 0x7C00 //TX_LAMBDA_PKA_FP +830 0x2000 //TX_TPKA_FP +831 0x0080 //TX_MIN_G_FP +832 0x2000 //TX_MAX_G_FP +833 0x0FA0 //TX_FFP_FP_K_METAL +834 0x4000 //TX_A_POST_FLT_FP +835 0x0F5C //TX_RTO_OUTBEAM_TH +836 0x4CCD //TX_TPKA_FP_THD +837 0x0000 //TX_MAX_G_FP_BLK +838 0x0000 //TX_FFP_FADEIN +839 0x0000 //TX_FFP_FADEOUT +840 0x0000 //TX_WHISPERCTH +841 0x0000 //TX_WHISPERHOLDT +842 0x0000 //TX_WHISP_ENTHH +843 0x0000 //TX_WHISP_ENTHL +844 0x0000 //TX_WHISP_RTOTH +845 0x0000 //TX_WHISP_RTOTH2 +846 0x0096 //TX_MUTE_PERIOD +847 0x0000 //TX_FADE_IN_PERIOD +848 0x0100 //TX_FFP_RESRV_2 +849 0x0020 //TX_FFP_RESRV_3 +850 0x0000 //TX_FFP_RESRV_4 +851 0x0000 //TX_FFP_RESRV_5 +852 0x0000 //TX_FFP_RESRV_6 +853 0x0002 //TX_FILTINDX +854 0x0002 //TX_TDDRC_THRD_0 +855 0x0003 //TX_TDDRC_THRD_1 +856 0x1500 //TX_TDDRC_THRD_2 +857 0x1500 //TX_TDDRC_THRD_3 +858 0x3000 //TX_TDDRC_SLANT_0 +859 0x6E00 //TX_TDDRC_SLANT_1 +860 0x1000 //TX_TDDRC_ALPHA_UP_00 +861 0x7EB8 //TX_TDDRC_ALPHA_DWN_00 +862 0x0000 //TX_TDDRC_HMNC_FLAG +863 0x199A //TX_TDDRC_HMNC_GAIN +864 0x0000 //TX_TDDRC_SMT_FLAG +865 0x0CCD //TX_TDDRC_SMT_W +866 0x05A0 //TX_TDDRC_DRC_GAIN +867 0x7FFF //TX_TDDRC_LMT_THRD +868 0x0000 //TX_TDDRC_LMT_ALPHA +869 0x0000 //TX_TFMASKLTH +870 0x0000 //TX_TFMASKLTHL +871 0x0CCD //TX_TFMASKHTH +872 0x199A //TX_TFMASKLTH_BINVAD +873 0xFCCD //TX_TFMASKLTH_NS_EST +874 0xF800 //TX_TFMASKLTH_DOA +875 0x0CCD //TX_TFMASKTH_BLESSCUT +876 0x2000 //TX_B_LESSCUT_RTO_MASK +877 0x1C00 //TX_SB_RHO_MEAN_TH_ABN +878 0x2000 //TX_B_POST_FLT_MASK +879 0x0000 //TX_B_POST_FLT_MASK1 +880 0x6333 //TX_GAIN_WIND_MASK +881 0x0000 //TX_TFMASK_BFSTRICT_MUSIC +882 0x0000 //TX_TFMASK_BFSTRICT_NOMUSIC +883 0x7333 //TX_FASTNS_OUTIN_TH +884 0x0CCD //TX_FASTNS_TFMASK_TH +885 0x0CCD //TX_FASTNS_TFMASKBIN_TH1 +886 0x0CCD //TX_FASTNS_TFMASKBIN_TH2 +887 0x0CCD //TX_FASTNS_TFMASKBIN_TH3 +888 0x00C8 //TX_FASTNS_ARSPC_TH +889 0xC000 //TX_FASTNS_MASK5_TH +890 0x0810 //TX_POSTSSA_MIN_G_VR_MASK +891 0x1000 //TX_A_LESSCUT_RTO_MASK +892 0x1770 //TX_FASTNS_NOISETH +893 0xC000 //TX_FASTNS_SSA_THLFL +894 0xC000 //TX_FASTNS_SSA_THHFL +895 0xCCCC //TX_FASTNS_SSA_THLFH +896 0xD999 //TX_FASTNS_SSA_THHFH +897 0x2339 //TX_SENDFUNC_REG_MICMUTE +898 0x0021 //TX_SENDFUNC_REG_MICMUTE1 +899 0x02BC //TX_MICMUTE_RATIO_THR +900 0x0140 //TX_MICMUTE_AMP_THR +901 0x0004 //TX_MICMUTE_HPF_IND +902 0x00C0 //TX_MICMUTE_LOG_EYR_TH +903 0x0008 //TX_MICMUTE_CVG_TIME +904 0x0008 //TX_MICMUTE_RELEASE_TIME +905 0x01FE //TX_MIC_VOLUME_MIC0MUTE +906 0x0020 //TX_MICMUTE_EPD_OFFSET_0 +907 0x001E //TX_MICMUTE_FRQ_AEC_L +908 0x7999 //TX_MICMUTE_EAD_THR +909 0x7FFF //TX_MICMUTE_LAMBDA_CB_NLE +910 0x7FFF //TX_MICMUTE_LAMBDA_RE_EST +911 0x4000 //TX_DTD_THR1_MICMUTE_0 +912 0x7000 //TX_DTD_THR1_MICMUTE_1 +913 0x7FFF //TX_DTD_THR1_MICMUTE_2 +914 0x7FFF //TX_DTD_THR1_MICMUTE_3 +915 0x6CCC //TX_DTD_THR2_MICMUTE_0 +916 0x0400 //TX_MICMUTE_MIN_EQ_RE_EST_0 +917 0x0400 //TX_MICMUTE_MIN_EQ_RE_EST_1 +918 0x1000 //TX_MICMUTE_MIN_EQ_RE_EST_2 +919 0x7FFF //TX_MICMUTE_MIN_EQ_RE_EST_3 +920 0x7FFF //TX_MICMUTE_MIN_EQ_RE_EST_4 +921 0x4000 //TX_MICMUTE_C_POST_FLT +922 0x03E8 //TX_MICMUTE_DT_CUT_K +923 0x0001 //TX_MICMUTE_DT_CUT_THR +924 0x03E8 //TX_MICMUTE_DT_CUT_K2 +925 0x0001 //TX_MICMUTE_DT_CUT_THR2 +926 0x0064 //TX_MICMUTE_DT2_HOLD_N +927 0x1000 //TX_MICMUTE_RATIODTH_THCUT +928 0x1000 //TX_MICMUTE_B_POST_FLT_ECHOL +929 0x7FFF //TX_MICMUTE_B_POST_FLT_ECHOH +930 0x0400 //TX_MICMUTE_C_POST_FLT_MASK +931 0x7999 //TX_MICMUTE_RATIODTL_CUT_TH +932 0x0258 //TX_MICMUTE_DT_CUT_K1 +933 0x0800 //TX_MICMUTE_N2_SN_EST +934 0xFC00 //TX_MICMUTE_THR_SN_EST_0 +935 0x001C //TX_MICMUTE_MIN_G_CTRL_0 +936 0x6000 //TX_MICMUTE_A_POST_FILT_S_0 +937 0x7000 //TX_MICMUTE_B_POST_FILT_0 +938 0x2710 //TX_MIC1RUB_AMP_THR +939 0x0010 //TX_MIC1MUTE_RATIO_THR +940 0x0450 //TX_MIC1MUTE_AMP_THR +941 0x0008 //TX_MIC1MUTE_CVG_TIME +942 0x0008 //TX_MIC1MUTE_RELEASE_TIME +943 0x0000 //TX_AMS_RESRV_01 +944 0x0000 //TX_AMS_RESRV_02 +945 0x0000 //TX_AMS_RESRV_03 +946 0x0000 //TX_AMS_RESRV_04 +947 0x0000 //TX_AMS_RESRV_05 +948 0x0000 //TX_AMS_RESRV_06 +949 0x0000 //TX_AMS_RESRV_07 +950 0x0000 //TX_AMS_RESRV_08 +951 0x0000 //TX_AMS_RESRV_09 +952 0x0000 //TX_AMS_RESRV_10 +953 0x0000 //TX_AMS_RESRV_11 +954 0x0000 //TX_AMS_RESRV_12 +955 0x0000 //TX_AMS_RESRV_13 +956 0x0000 //TX_AMS_RESRV_14 +957 0x0000 //TX_AMS_RESRV_15 +958 0x0000 //TX_AMS_RESRV_16 +959 0x0000 //TX_AMS_RESRV_17 +960 0x0000 //TX_AMS_RESRV_18 +961 0x0000 //TX_AMS_RESRV_19 +#RX +0 0x000C //RX_RECVFUNC_MODE_0 +1 0x0000 //RX_RECVFUNC_MODE_1 +2 0x0001 //RX_SAMPLINGFREQ_SIG +3 0x0001 //RX_SAMPLINGFREQ_PROC +4 0x000A //RX_FRAME_SZ +5 0x0000 //RX_DELAY_OPT +6 0x1000 //RX_TDDRC_ALPHA_UP_1 +7 0x1000 //RX_TDDRC_ALPHA_UP_2 +8 0x1000 //RX_TDDRC_ALPHA_UP_3 +9 0x1000 //RX_TDDRC_ALPHA_UP_4 +10 0x0800 //RX_PGA +11 0x7FFF //RX_A_HP +12 0x4000 //RX_B_PE +13 0x7800 //RX_THR_PITCH_DET_0 +14 0x7000 //RX_THR_PITCH_DET_1 +15 0x6000 //RX_THR_PITCH_DET_2 +16 0x0008 //RX_PITCH_BFR_LEN +17 0x0003 //RX_SBD_PITCH_DET +18 0x0100 //RX_PP_RESRV_0 +19 0x0020 //RX_PP_RESRV_1 +20 0x0400 //RX_N_SN_EST +21 0x000C //RX_N2_SN_EST +22 0x0014 //RX_NS_LVL_CTRL +23 0xF800 //RX_THR_SN_EST +24 0x7E00 //RX_LAMBDA_PFILT +25 0x000A //RX_FENS_RESRV_0 +26 0x0190 //RX_FENS_RESRV_1 +27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +30 0x0002 //RX_EXTRA_NS_L +31 0x0800 //RX_EXTRA_NS_A +32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +33 0x7000 //RX_TDDRC_LIMITER_THRD +34 0x0800 //RX_TDDRC_LIMITER_GAIN +35 0x199A //RX_A_POST_FLT +36 0x0000 //RX_LMT_THRD +37 0x4000 //RX_LMT_ALPHA +38 0x0030 //RX_FDEQ_SUBNUM +39 0x4848 //RX_FDEQ_GAIN_0 +40 0x4848 //RX_FDEQ_GAIN_1 +41 0x4844 //RX_FDEQ_GAIN_2 +42 0x4A4C //RX_FDEQ_GAIN_3 +43 0x4E50 //RX_FDEQ_GAIN_4 +44 0x5254 //RX_FDEQ_GAIN_5 +45 0x5658 //RX_FDEQ_GAIN_6 +46 0x5A5C //RX_FDEQ_GAIN_7 +47 0x5C5C //RX_FDEQ_GAIN_8 +48 0x5C5C //RX_FDEQ_GAIN_9 +49 0x5C5C //RX_FDEQ_GAIN_10 +50 0x5C5C //RX_FDEQ_GAIN_11 +51 0x5C5C //RX_FDEQ_GAIN_12 +52 0x5C5C //RX_FDEQ_GAIN_13 +53 0x4848 //RX_FDEQ_GAIN_14 +54 0x4848 //RX_FDEQ_GAIN_15 +55 0x4848 //RX_FDEQ_GAIN_16 +56 0x4848 //RX_FDEQ_GAIN_17 +57 0x4848 //RX_FDEQ_GAIN_18 +58 0x4848 //RX_FDEQ_GAIN_19 +59 0x4848 //RX_FDEQ_GAIN_20 +60 0x4848 //RX_FDEQ_GAIN_21 +61 0x4848 //RX_FDEQ_GAIN_22 +62 0x4848 //RX_FDEQ_GAIN_23 +63 0x0202 //RX_FDEQ_BIN_0 +64 0x0203 //RX_FDEQ_BIN_1 +65 0x0402 //RX_FDEQ_BIN_2 +66 0x0505 //RX_FDEQ_BIN_3 +67 0x0505 //RX_FDEQ_BIN_4 +68 0x0505 //RX_FDEQ_BIN_5 +69 0x0505 //RX_FDEQ_BIN_6 +70 0x0505 //RX_FDEQ_BIN_7 +71 0x160C //RX_FDEQ_BIN_8 +72 0x0D0E //RX_FDEQ_BIN_9 +73 0x0E0F //RX_FDEQ_BIN_10 +74 0x0F10 //RX_FDEQ_BIN_11 +75 0x1011 //RX_FDEQ_BIN_12 +76 0x1104 //RX_FDEQ_BIN_13 +77 0x0000 //RX_FDEQ_BIN_14 +78 0x0000 //RX_FDEQ_BIN_15 +79 0x0000 //RX_FDEQ_BIN_16 +80 0x0000 //RX_FDEQ_BIN_17 +81 0x0000 //RX_FDEQ_BIN_18 +82 0x0000 //RX_FDEQ_BIN_19 +83 0x0000 //RX_FDEQ_BIN_20 +84 0x0000 //RX_FDEQ_BIN_21 +85 0x0000 //RX_FDEQ_BIN_22 +86 0x0000 //RX_FDEQ_BIN_23 +87 0x4000 //RX_FDEQ_RESRV_0 +88 0x0320 //RX_FDEQ_RESRV_1 +89 0x0018 //RX_FDDRC_BAND_MARGIN_0 +90 0x0030 //RX_FDDRC_BAND_MARGIN_1 +91 0x0050 //RX_FDDRC_BAND_MARGIN_2 +92 0x0080 //RX_FDDRC_BAND_MARGIN_3 +93 0x0007 //RX_FDDRC_BLOCK_EXP +94 0x5000 //RX_FDDRC_THRD_2_0 +95 0x5000 //RX_FDDRC_THRD_2_1 +96 0x5000 //RX_FDDRC_THRD_2_2 +97 0x5000 //RX_FDDRC_THRD_2_3 +98 0x6400 //RX_FDDRC_THRD_3_0 +99 0x6400 //RX_FDDRC_THRD_3_1 +100 0x6400 //RX_FDDRC_THRD_3_2 +101 0x6400 //RX_FDDRC_THRD_3_3 +102 0x2000 //RX_FDDRC_SLANT_0_0 +103 0x2000 //RX_FDDRC_SLANT_0_1 +104 0x2000 //RX_FDDRC_SLANT_0_2 +105 0x2000 //RX_FDDRC_SLANT_0_3 +106 0x5333 //RX_FDDRC_SLANT_1_0 +107 0x5333 //RX_FDDRC_SLANT_1_1 +108 0x5333 //RX_FDDRC_SLANT_1_2 +109 0x5333 //RX_FDDRC_SLANT_1_3 +110 0x0000 //RX_FDDRC_RESRV_0 +111 0x0002 //RX_FILTINDX +112 0x0000 //RX_TDDRC_THRD_0 +113 0x0000 //RX_TDDRC_THRD_1 +114 0x1800 //RX_TDDRC_THRD_2 +115 0x1800 //RX_TDDRC_THRD_3 +116 0x3000 //RX_TDDRC_SLANT_0 +117 0x6E00 //RX_TDDRC_SLANT_1 +118 0x1000 //RX_TDDRC_ALPHA_UP_0 +119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +120 0x0000 //RX_TDDRC_HMNC_FLAG +121 0x199A //RX_TDDRC_HMNC_GAIN +122 0x0001 //RX_TDDRC_SMT_FLAG +123 0x0CCD //RX_TDDRC_SMT_W +124 0x0400 //RX_TDDRC_DRC_GAIN +125 0x7C00 //RX_LAMBDA_PKA_FP +126 0x2000 //RX_TPKA_FP +127 0x2000 //RX_MIN_G_FP +128 0x0080 //RX_MAX_G_FP +129 0x0100 //RX_SPK_VOL +130 0x0000 //RX_VOL_RESRV_0 +131 0x0000 //RX_MAXLEVEL_CNG +132 0x3000 //RX_BWE_UV_TH +133 0x3000 //RX_BWE_UV_TH2 +134 0x1800 //RX_BWE_UV_TH3 +135 0x1000 //RX_BWE_V_TH +136 0x04CD //RX_BWE_GAIN1_V_TH1 +137 0x0F33 //RX_BWE_GAIN1_V_TH2 +138 0x7333 //RX_BWE_UV_EQ +139 0x199A //RX_BWE_V_EQ +140 0x7333 //RX_BWE_TONE_TH +141 0x0004 //RX_BWE_UV_HOLD_T +142 0x6CCD //RX_BWE_GAIN2_ALPHA +143 0x799A //RX_BWE_GAIN3_ALPHA +144 0x001E //RX_BWE_CUTOFF +145 0x3000 //RX_BWE_GAINFILL +146 0x3200 //RX_BWE_MAXTH_TONE +147 0x2000 //RX_BWE_EQ_0 +148 0x2000 //RX_BWE_EQ_1 +149 0x2000 //RX_BWE_EQ_2 +150 0x2000 //RX_BWE_EQ_3 +151 0x2000 //RX_BWE_EQ_4 +152 0x2000 //RX_BWE_EQ_5 +153 0x2000 //RX_BWE_EQ_6 +154 0x0000 //RX_BWE_RESRV_0 +155 0x0000 //RX_BWE_RESRV_1 +156 0x0000 //RX_BWE_RESRV_2 +#VOL 0 +6 0x1000 //RX_TDDRC_ALPHA_UP_1 +7 0x1000 //RX_TDDRC_ALPHA_UP_2 +8 0x1000 //RX_TDDRC_ALPHA_UP_3 +9 0x1000 //RX_TDDRC_ALPHA_UP_4 +27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +33 0x7000 //RX_TDDRC_LIMITER_THRD +34 0x0800 //RX_TDDRC_LIMITER_GAIN +112 0x0000 //RX_TDDRC_THRD_0 +113 0x0000 //RX_TDDRC_THRD_1 +114 0x1800 //RX_TDDRC_THRD_2 +115 0x1800 //RX_TDDRC_THRD_3 +116 0x3000 //RX_TDDRC_SLANT_0 +117 0x6E00 //RX_TDDRC_SLANT_1 +118 0x1000 //RX_TDDRC_ALPHA_UP_0 +119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +120 0x0000 //RX_TDDRC_HMNC_FLAG +121 0x199A //RX_TDDRC_HMNC_GAIN +122 0x0001 //RX_TDDRC_SMT_FLAG +123 0x0CCD //RX_TDDRC_SMT_W +124 0x0400 //RX_TDDRC_DRC_GAIN +38 0x0030 //RX_FDEQ_SUBNUM +39 0x4848 //RX_FDEQ_GAIN_0 +40 0x4848 //RX_FDEQ_GAIN_1 +41 0x4844 //RX_FDEQ_GAIN_2 +42 0x4A4C //RX_FDEQ_GAIN_3 +43 0x4E50 //RX_FDEQ_GAIN_4 +44 0x5254 //RX_FDEQ_GAIN_5 +45 0x5658 //RX_FDEQ_GAIN_6 +46 0x5A5C //RX_FDEQ_GAIN_7 +47 0x5C5C //RX_FDEQ_GAIN_8 +48 0x5C5C //RX_FDEQ_GAIN_9 +49 0x5C5C //RX_FDEQ_GAIN_10 +50 0x5C5C //RX_FDEQ_GAIN_11 +51 0x5C5C //RX_FDEQ_GAIN_12 +52 0x5C5C //RX_FDEQ_GAIN_13 +53 0x4848 //RX_FDEQ_GAIN_14 +54 0x4848 //RX_FDEQ_GAIN_15 +55 0x4848 //RX_FDEQ_GAIN_16 +56 0x4848 //RX_FDEQ_GAIN_17 +57 0x4848 //RX_FDEQ_GAIN_18 +58 0x4848 //RX_FDEQ_GAIN_19 +59 0x4848 //RX_FDEQ_GAIN_20 +60 0x4848 //RX_FDEQ_GAIN_21 +61 0x4848 //RX_FDEQ_GAIN_22 +62 0x4848 //RX_FDEQ_GAIN_23 +63 0x0202 //RX_FDEQ_BIN_0 +64 0x0203 //RX_FDEQ_BIN_1 +65 0x0402 //RX_FDEQ_BIN_2 +66 0x0505 //RX_FDEQ_BIN_3 +67 0x0505 //RX_FDEQ_BIN_4 +68 0x0505 //RX_FDEQ_BIN_5 +69 0x0505 //RX_FDEQ_BIN_6 +70 0x0505 //RX_FDEQ_BIN_7 +71 0x160C //RX_FDEQ_BIN_8 +72 0x0D0E //RX_FDEQ_BIN_9 +73 0x0E0F //RX_FDEQ_BIN_10 +74 0x0F10 //RX_FDEQ_BIN_11 +75 0x1011 //RX_FDEQ_BIN_12 +76 0x1104 //RX_FDEQ_BIN_13 +77 0x0000 //RX_FDEQ_BIN_14 +78 0x0000 //RX_FDEQ_BIN_15 +79 0x0000 //RX_FDEQ_BIN_16 +80 0x0000 //RX_FDEQ_BIN_17 +81 0x0000 //RX_FDEQ_BIN_18 +82 0x0000 //RX_FDEQ_BIN_19 +83 0x0000 //RX_FDEQ_BIN_20 +84 0x0000 //RX_FDEQ_BIN_21 +85 0x0000 //RX_FDEQ_BIN_22 +86 0x0000 //RX_FDEQ_BIN_23 +87 0x4000 //RX_FDEQ_RESRV_0 +88 0x0320 //RX_FDEQ_RESRV_1 +89 0x0018 //RX_FDDRC_BAND_MARGIN_0 +90 0x0030 //RX_FDDRC_BAND_MARGIN_1 +91 0x0050 //RX_FDDRC_BAND_MARGIN_2 +92 0x0080 //RX_FDDRC_BAND_MARGIN_3 +93 0x0007 //RX_FDDRC_BLOCK_EXP +94 0x5000 //RX_FDDRC_THRD_2_0 +95 0x5000 //RX_FDDRC_THRD_2_1 +96 0x5000 //RX_FDDRC_THRD_2_2 +97 0x5000 //RX_FDDRC_THRD_2_3 +98 0x6400 //RX_FDDRC_THRD_3_0 +99 0x6400 //RX_FDDRC_THRD_3_1 +100 0x6400 //RX_FDDRC_THRD_3_2 +101 0x6400 //RX_FDDRC_THRD_3_3 +102 0x2000 //RX_FDDRC_SLANT_0_0 +103 0x2000 //RX_FDDRC_SLANT_0_1 +104 0x2000 //RX_FDDRC_SLANT_0_2 +105 0x2000 //RX_FDDRC_SLANT_0_3 +106 0x5333 //RX_FDDRC_SLANT_1_0 +107 0x5333 //RX_FDDRC_SLANT_1_1 +108 0x5333 //RX_FDDRC_SLANT_1_2 +109 0x5333 //RX_FDDRC_SLANT_1_3 +110 0x0000 //RX_FDDRC_RESRV_0 +129 0x0100 //RX_SPK_VOL +130 0x0000 //RX_VOL_RESRV_0 +#VOL 1 +6 0x1000 //RX_TDDRC_ALPHA_UP_1 +7 0x1000 //RX_TDDRC_ALPHA_UP_2 +8 0x1000 //RX_TDDRC_ALPHA_UP_3 +9 0x1000 //RX_TDDRC_ALPHA_UP_4 +27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +33 0x7000 //RX_TDDRC_LIMITER_THRD +34 0x0800 //RX_TDDRC_LIMITER_GAIN +112 0x0000 //RX_TDDRC_THRD_0 +113 0x0000 //RX_TDDRC_THRD_1 +114 0x1800 //RX_TDDRC_THRD_2 +115 0x1800 //RX_TDDRC_THRD_3 +116 0x3000 //RX_TDDRC_SLANT_0 +117 0x6E00 //RX_TDDRC_SLANT_1 +118 0x1000 //RX_TDDRC_ALPHA_UP_0 +119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +120 0x0000 //RX_TDDRC_HMNC_FLAG +121 0x199A //RX_TDDRC_HMNC_GAIN +122 0x0001 //RX_TDDRC_SMT_FLAG +123 0x0CCD //RX_TDDRC_SMT_W +124 0x0400 //RX_TDDRC_DRC_GAIN +38 0x0030 //RX_FDEQ_SUBNUM +39 0x4848 //RX_FDEQ_GAIN_0 +40 0x4848 //RX_FDEQ_GAIN_1 +41 0x4844 //RX_FDEQ_GAIN_2 +42 0x4A4C //RX_FDEQ_GAIN_3 +43 0x4E50 //RX_FDEQ_GAIN_4 +44 0x5254 //RX_FDEQ_GAIN_5 +45 0x5658 //RX_FDEQ_GAIN_6 +46 0x5A5C //RX_FDEQ_GAIN_7 +47 0x5C5C //RX_FDEQ_GAIN_8 +48 0x5C5C //RX_FDEQ_GAIN_9 +49 0x5C5C //RX_FDEQ_GAIN_10 +50 0x5C5C //RX_FDEQ_GAIN_11 +51 0x5C5C //RX_FDEQ_GAIN_12 +52 0x5C5C //RX_FDEQ_GAIN_13 +53 0x4848 //RX_FDEQ_GAIN_14 +54 0x4848 //RX_FDEQ_GAIN_15 +55 0x4848 //RX_FDEQ_GAIN_16 +56 0x4848 //RX_FDEQ_GAIN_17 +57 0x4848 //RX_FDEQ_GAIN_18 +58 0x4848 //RX_FDEQ_GAIN_19 +59 0x4848 //RX_FDEQ_GAIN_20 +60 0x4848 //RX_FDEQ_GAIN_21 +61 0x4848 //RX_FDEQ_GAIN_22 +62 0x4848 //RX_FDEQ_GAIN_23 +63 0x0202 //RX_FDEQ_BIN_0 +64 0x0203 //RX_FDEQ_BIN_1 +65 0x0402 //RX_FDEQ_BIN_2 +66 0x0505 //RX_FDEQ_BIN_3 +67 0x0505 //RX_FDEQ_BIN_4 +68 0x0505 //RX_FDEQ_BIN_5 +69 0x0505 //RX_FDEQ_BIN_6 +70 0x0505 //RX_FDEQ_BIN_7 +71 0x160C //RX_FDEQ_BIN_8 +72 0x0D0E //RX_FDEQ_BIN_9 +73 0x0E0F //RX_FDEQ_BIN_10 +74 0x0F10 //RX_FDEQ_BIN_11 +75 0x1011 //RX_FDEQ_BIN_12 +76 0x1104 //RX_FDEQ_BIN_13 +77 0x0000 //RX_FDEQ_BIN_14 +78 0x0000 //RX_FDEQ_BIN_15 +79 0x0000 //RX_FDEQ_BIN_16 +80 0x0000 //RX_FDEQ_BIN_17 +81 0x0000 //RX_FDEQ_BIN_18 +82 0x0000 //RX_FDEQ_BIN_19 +83 0x0000 //RX_FDEQ_BIN_20 +84 0x0000 //RX_FDEQ_BIN_21 +85 0x0000 //RX_FDEQ_BIN_22 +86 0x0000 //RX_FDEQ_BIN_23 +87 0x4000 //RX_FDEQ_RESRV_0 +88 0x0320 //RX_FDEQ_RESRV_1 +89 0x0018 //RX_FDDRC_BAND_MARGIN_0 +90 0x0030 //RX_FDDRC_BAND_MARGIN_1 +91 0x0050 //RX_FDDRC_BAND_MARGIN_2 +92 0x0080 //RX_FDDRC_BAND_MARGIN_3 +93 0x0007 //RX_FDDRC_BLOCK_EXP +94 0x5000 //RX_FDDRC_THRD_2_0 +95 0x5000 //RX_FDDRC_THRD_2_1 +96 0x5000 //RX_FDDRC_THRD_2_2 +97 0x5000 //RX_FDDRC_THRD_2_3 +98 0x6400 //RX_FDDRC_THRD_3_0 +99 0x6400 //RX_FDDRC_THRD_3_1 +100 0x6400 //RX_FDDRC_THRD_3_2 +101 0x6400 //RX_FDDRC_THRD_3_3 +102 0x2000 //RX_FDDRC_SLANT_0_0 +103 0x2000 //RX_FDDRC_SLANT_0_1 +104 0x2000 //RX_FDDRC_SLANT_0_2 +105 0x2000 //RX_FDDRC_SLANT_0_3 +106 0x5333 //RX_FDDRC_SLANT_1_0 +107 0x5333 //RX_FDDRC_SLANT_1_1 +108 0x5333 //RX_FDDRC_SLANT_1_2 +109 0x5333 //RX_FDDRC_SLANT_1_3 +110 0x0000 //RX_FDDRC_RESRV_0 +129 0x0100 //RX_SPK_VOL +130 0x0000 //RX_VOL_RESRV_0 +#VOL 2 +6 0x1000 //RX_TDDRC_ALPHA_UP_1 +7 0x1000 //RX_TDDRC_ALPHA_UP_2 +8 0x1000 //RX_TDDRC_ALPHA_UP_3 +9 0x1000 //RX_TDDRC_ALPHA_UP_4 +27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +33 0x7000 //RX_TDDRC_LIMITER_THRD +34 0x0800 //RX_TDDRC_LIMITER_GAIN +112 0x0000 //RX_TDDRC_THRD_0 +113 0x0000 //RX_TDDRC_THRD_1 +114 0x1800 //RX_TDDRC_THRD_2 +115 0x1800 //RX_TDDRC_THRD_3 +116 0x3000 //RX_TDDRC_SLANT_0 +117 0x6E00 //RX_TDDRC_SLANT_1 +118 0x1000 //RX_TDDRC_ALPHA_UP_0 +119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +120 0x0000 //RX_TDDRC_HMNC_FLAG +121 0x199A //RX_TDDRC_HMNC_GAIN +122 0x0001 //RX_TDDRC_SMT_FLAG +123 0x0CCD //RX_TDDRC_SMT_W +124 0x0400 //RX_TDDRC_DRC_GAIN +38 0x0030 //RX_FDEQ_SUBNUM +39 0x4848 //RX_FDEQ_GAIN_0 +40 0x4848 //RX_FDEQ_GAIN_1 +41 0x4844 //RX_FDEQ_GAIN_2 +42 0x4A4C //RX_FDEQ_GAIN_3 +43 0x4E50 //RX_FDEQ_GAIN_4 +44 0x5254 //RX_FDEQ_GAIN_5 +45 0x5658 //RX_FDEQ_GAIN_6 +46 0x5A5C //RX_FDEQ_GAIN_7 +47 0x5C5C //RX_FDEQ_GAIN_8 +48 0x5C5C //RX_FDEQ_GAIN_9 +49 0x5C5C //RX_FDEQ_GAIN_10 +50 0x5C5C //RX_FDEQ_GAIN_11 +51 0x5C5C //RX_FDEQ_GAIN_12 +52 0x5C5C //RX_FDEQ_GAIN_13 +53 0x4848 //RX_FDEQ_GAIN_14 +54 0x4848 //RX_FDEQ_GAIN_15 +55 0x4848 //RX_FDEQ_GAIN_16 +56 0x4848 //RX_FDEQ_GAIN_17 +57 0x4848 //RX_FDEQ_GAIN_18 +58 0x4848 //RX_FDEQ_GAIN_19 +59 0x4848 //RX_FDEQ_GAIN_20 +60 0x4848 //RX_FDEQ_GAIN_21 +61 0x4848 //RX_FDEQ_GAIN_22 +62 0x4848 //RX_FDEQ_GAIN_23 +63 0x0202 //RX_FDEQ_BIN_0 +64 0x0203 //RX_FDEQ_BIN_1 +65 0x0402 //RX_FDEQ_BIN_2 +66 0x0505 //RX_FDEQ_BIN_3 +67 0x0505 //RX_FDEQ_BIN_4 +68 0x0505 //RX_FDEQ_BIN_5 +69 0x0505 //RX_FDEQ_BIN_6 +70 0x0505 //RX_FDEQ_BIN_7 +71 0x160C //RX_FDEQ_BIN_8 +72 0x0D0E //RX_FDEQ_BIN_9 +73 0x0E0F //RX_FDEQ_BIN_10 +74 0x0F10 //RX_FDEQ_BIN_11 +75 0x1011 //RX_FDEQ_BIN_12 +76 0x1104 //RX_FDEQ_BIN_13 +77 0x0000 //RX_FDEQ_BIN_14 +78 0x0000 //RX_FDEQ_BIN_15 +79 0x0000 //RX_FDEQ_BIN_16 +80 0x0000 //RX_FDEQ_BIN_17 +81 0x0000 //RX_FDEQ_BIN_18 +82 0x0000 //RX_FDEQ_BIN_19 +83 0x0000 //RX_FDEQ_BIN_20 +84 0x0000 //RX_FDEQ_BIN_21 +85 0x0000 //RX_FDEQ_BIN_22 +86 0x0000 //RX_FDEQ_BIN_23 +87 0x4000 //RX_FDEQ_RESRV_0 +88 0x0320 //RX_FDEQ_RESRV_1 +89 0x0018 //RX_FDDRC_BAND_MARGIN_0 +90 0x0030 //RX_FDDRC_BAND_MARGIN_1 +91 0x0050 //RX_FDDRC_BAND_MARGIN_2 +92 0x0080 //RX_FDDRC_BAND_MARGIN_3 +93 0x0007 //RX_FDDRC_BLOCK_EXP +94 0x5000 //RX_FDDRC_THRD_2_0 +95 0x5000 //RX_FDDRC_THRD_2_1 +96 0x5000 //RX_FDDRC_THRD_2_2 +97 0x5000 //RX_FDDRC_THRD_2_3 +98 0x6400 //RX_FDDRC_THRD_3_0 +99 0x6400 //RX_FDDRC_THRD_3_1 +100 0x6400 //RX_FDDRC_THRD_3_2 +101 0x6400 //RX_FDDRC_THRD_3_3 +102 0x2000 //RX_FDDRC_SLANT_0_0 +103 0x2000 //RX_FDDRC_SLANT_0_1 +104 0x2000 //RX_FDDRC_SLANT_0_2 +105 0x2000 //RX_FDDRC_SLANT_0_3 +106 0x5333 //RX_FDDRC_SLANT_1_0 +107 0x5333 //RX_FDDRC_SLANT_1_1 +108 0x5333 //RX_FDDRC_SLANT_1_2 +109 0x5333 //RX_FDDRC_SLANT_1_3 +110 0x0000 //RX_FDDRC_RESRV_0 +129 0x0100 //RX_SPK_VOL +130 0x0000 //RX_VOL_RESRV_0 +#VOL 3 +6 0x1000 //RX_TDDRC_ALPHA_UP_1 +7 0x1000 //RX_TDDRC_ALPHA_UP_2 +8 0x1000 //RX_TDDRC_ALPHA_UP_3 +9 0x1000 //RX_TDDRC_ALPHA_UP_4 +27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +33 0x7000 //RX_TDDRC_LIMITER_THRD +34 0x0800 //RX_TDDRC_LIMITER_GAIN +112 0x0000 //RX_TDDRC_THRD_0 +113 0x0000 //RX_TDDRC_THRD_1 +114 0x1800 //RX_TDDRC_THRD_2 +115 0x1800 //RX_TDDRC_THRD_3 +116 0x3000 //RX_TDDRC_SLANT_0 +117 0x6E00 //RX_TDDRC_SLANT_1 +118 0x1000 //RX_TDDRC_ALPHA_UP_0 +119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +120 0x0000 //RX_TDDRC_HMNC_FLAG +121 0x199A //RX_TDDRC_HMNC_GAIN +122 0x0001 //RX_TDDRC_SMT_FLAG +123 0x0CCD //RX_TDDRC_SMT_W +124 0x0400 //RX_TDDRC_DRC_GAIN +38 0x0030 //RX_FDEQ_SUBNUM +39 0x4848 //RX_FDEQ_GAIN_0 +40 0x4848 //RX_FDEQ_GAIN_1 +41 0x4844 //RX_FDEQ_GAIN_2 +42 0x4A4C //RX_FDEQ_GAIN_3 +43 0x4E50 //RX_FDEQ_GAIN_4 +44 0x5254 //RX_FDEQ_GAIN_5 +45 0x5658 //RX_FDEQ_GAIN_6 +46 0x5A5C //RX_FDEQ_GAIN_7 +47 0x5C5C //RX_FDEQ_GAIN_8 +48 0x5C5C //RX_FDEQ_GAIN_9 +49 0x5C5C //RX_FDEQ_GAIN_10 +50 0x5C5C //RX_FDEQ_GAIN_11 +51 0x5C5C //RX_FDEQ_GAIN_12 +52 0x5C5C //RX_FDEQ_GAIN_13 +53 0x4848 //RX_FDEQ_GAIN_14 +54 0x4848 //RX_FDEQ_GAIN_15 +55 0x4848 //RX_FDEQ_GAIN_16 +56 0x4848 //RX_FDEQ_GAIN_17 +57 0x4848 //RX_FDEQ_GAIN_18 +58 0x4848 //RX_FDEQ_GAIN_19 +59 0x4848 //RX_FDEQ_GAIN_20 +60 0x4848 //RX_FDEQ_GAIN_21 +61 0x4848 //RX_FDEQ_GAIN_22 +62 0x4848 //RX_FDEQ_GAIN_23 +63 0x0202 //RX_FDEQ_BIN_0 +64 0x0203 //RX_FDEQ_BIN_1 +65 0x0402 //RX_FDEQ_BIN_2 +66 0x0505 //RX_FDEQ_BIN_3 +67 0x0505 //RX_FDEQ_BIN_4 +68 0x0505 //RX_FDEQ_BIN_5 +69 0x0505 //RX_FDEQ_BIN_6 +70 0x0505 //RX_FDEQ_BIN_7 +71 0x160C //RX_FDEQ_BIN_8 +72 0x0D0E //RX_FDEQ_BIN_9 +73 0x0E0F //RX_FDEQ_BIN_10 +74 0x0F10 //RX_FDEQ_BIN_11 +75 0x1011 //RX_FDEQ_BIN_12 +76 0x1104 //RX_FDEQ_BIN_13 +77 0x0000 //RX_FDEQ_BIN_14 +78 0x0000 //RX_FDEQ_BIN_15 +79 0x0000 //RX_FDEQ_BIN_16 +80 0x0000 //RX_FDEQ_BIN_17 +81 0x0000 //RX_FDEQ_BIN_18 +82 0x0000 //RX_FDEQ_BIN_19 +83 0x0000 //RX_FDEQ_BIN_20 +84 0x0000 //RX_FDEQ_BIN_21 +85 0x0000 //RX_FDEQ_BIN_22 +86 0x0000 //RX_FDEQ_BIN_23 +87 0x4000 //RX_FDEQ_RESRV_0 +88 0x0320 //RX_FDEQ_RESRV_1 +89 0x0018 //RX_FDDRC_BAND_MARGIN_0 +90 0x0030 //RX_FDDRC_BAND_MARGIN_1 +91 0x0050 //RX_FDDRC_BAND_MARGIN_2 +92 0x0080 //RX_FDDRC_BAND_MARGIN_3 +93 0x0007 //RX_FDDRC_BLOCK_EXP +94 0x5000 //RX_FDDRC_THRD_2_0 +95 0x5000 //RX_FDDRC_THRD_2_1 +96 0x5000 //RX_FDDRC_THRD_2_2 +97 0x5000 //RX_FDDRC_THRD_2_3 +98 0x6400 //RX_FDDRC_THRD_3_0 +99 0x6400 //RX_FDDRC_THRD_3_1 +100 0x6400 //RX_FDDRC_THRD_3_2 +101 0x6400 //RX_FDDRC_THRD_3_3 +102 0x2000 //RX_FDDRC_SLANT_0_0 +103 0x2000 //RX_FDDRC_SLANT_0_1 +104 0x2000 //RX_FDDRC_SLANT_0_2 +105 0x2000 //RX_FDDRC_SLANT_0_3 +106 0x5333 //RX_FDDRC_SLANT_1_0 +107 0x5333 //RX_FDDRC_SLANT_1_1 +108 0x5333 //RX_FDDRC_SLANT_1_2 +109 0x5333 //RX_FDDRC_SLANT_1_3 +110 0x0000 //RX_FDDRC_RESRV_0 +129 0x0100 //RX_SPK_VOL +130 0x0000 //RX_VOL_RESRV_0 +#VOL 4 +6 0x1000 //RX_TDDRC_ALPHA_UP_1 +7 0x1000 //RX_TDDRC_ALPHA_UP_2 +8 0x1000 //RX_TDDRC_ALPHA_UP_3 +9 0x1000 //RX_TDDRC_ALPHA_UP_4 +27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +33 0x7000 //RX_TDDRC_LIMITER_THRD +34 0x0800 //RX_TDDRC_LIMITER_GAIN +112 0x0000 //RX_TDDRC_THRD_0 +113 0x0000 //RX_TDDRC_THRD_1 +114 0x1800 //RX_TDDRC_THRD_2 +115 0x1800 //RX_TDDRC_THRD_3 +116 0x3000 //RX_TDDRC_SLANT_0 +117 0x6E00 //RX_TDDRC_SLANT_1 +118 0x1000 //RX_TDDRC_ALPHA_UP_0 +119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +120 0x0000 //RX_TDDRC_HMNC_FLAG +121 0x199A //RX_TDDRC_HMNC_GAIN +122 0x0001 //RX_TDDRC_SMT_FLAG +123 0x0CCD //RX_TDDRC_SMT_W +124 0x0400 //RX_TDDRC_DRC_GAIN +38 0x0030 //RX_FDEQ_SUBNUM +39 0x4848 //RX_FDEQ_GAIN_0 +40 0x4848 //RX_FDEQ_GAIN_1 +41 0x4844 //RX_FDEQ_GAIN_2 +42 0x4A4C //RX_FDEQ_GAIN_3 +43 0x4E50 //RX_FDEQ_GAIN_4 +44 0x5254 //RX_FDEQ_GAIN_5 +45 0x5658 //RX_FDEQ_GAIN_6 +46 0x5A5C //RX_FDEQ_GAIN_7 +47 0x5C5C //RX_FDEQ_GAIN_8 +48 0x5C5C //RX_FDEQ_GAIN_9 +49 0x5C5C //RX_FDEQ_GAIN_10 +50 0x5C5C //RX_FDEQ_GAIN_11 +51 0x5C5C //RX_FDEQ_GAIN_12 +52 0x5C5C //RX_FDEQ_GAIN_13 +53 0x4848 //RX_FDEQ_GAIN_14 +54 0x4848 //RX_FDEQ_GAIN_15 +55 0x4848 //RX_FDEQ_GAIN_16 +56 0x4848 //RX_FDEQ_GAIN_17 +57 0x4848 //RX_FDEQ_GAIN_18 +58 0x4848 //RX_FDEQ_GAIN_19 +59 0x4848 //RX_FDEQ_GAIN_20 +60 0x4848 //RX_FDEQ_GAIN_21 +61 0x4848 //RX_FDEQ_GAIN_22 +62 0x4848 //RX_FDEQ_GAIN_23 +63 0x0202 //RX_FDEQ_BIN_0 +64 0x0203 //RX_FDEQ_BIN_1 +65 0x0402 //RX_FDEQ_BIN_2 +66 0x0505 //RX_FDEQ_BIN_3 +67 0x0505 //RX_FDEQ_BIN_4 +68 0x0505 //RX_FDEQ_BIN_5 +69 0x0505 //RX_FDEQ_BIN_6 +70 0x0505 //RX_FDEQ_BIN_7 +71 0x160C //RX_FDEQ_BIN_8 +72 0x0D0E //RX_FDEQ_BIN_9 +73 0x0E0F //RX_FDEQ_BIN_10 +74 0x0F10 //RX_FDEQ_BIN_11 +75 0x1011 //RX_FDEQ_BIN_12 +76 0x1104 //RX_FDEQ_BIN_13 +77 0x0000 //RX_FDEQ_BIN_14 +78 0x0000 //RX_FDEQ_BIN_15 +79 0x0000 //RX_FDEQ_BIN_16 +80 0x0000 //RX_FDEQ_BIN_17 +81 0x0000 //RX_FDEQ_BIN_18 +82 0x0000 //RX_FDEQ_BIN_19 +83 0x0000 //RX_FDEQ_BIN_20 +84 0x0000 //RX_FDEQ_BIN_21 +85 0x0000 //RX_FDEQ_BIN_22 +86 0x0000 //RX_FDEQ_BIN_23 +87 0x4000 //RX_FDEQ_RESRV_0 +88 0x0320 //RX_FDEQ_RESRV_1 +89 0x0018 //RX_FDDRC_BAND_MARGIN_0 +90 0x0030 //RX_FDDRC_BAND_MARGIN_1 +91 0x0050 //RX_FDDRC_BAND_MARGIN_2 +92 0x0080 //RX_FDDRC_BAND_MARGIN_3 +93 0x0007 //RX_FDDRC_BLOCK_EXP +94 0x5000 //RX_FDDRC_THRD_2_0 +95 0x5000 //RX_FDDRC_THRD_2_1 +96 0x5000 //RX_FDDRC_THRD_2_2 +97 0x5000 //RX_FDDRC_THRD_2_3 +98 0x6400 //RX_FDDRC_THRD_3_0 +99 0x6400 //RX_FDDRC_THRD_3_1 +100 0x6400 //RX_FDDRC_THRD_3_2 +101 0x6400 //RX_FDDRC_THRD_3_3 +102 0x2000 //RX_FDDRC_SLANT_0_0 +103 0x2000 //RX_FDDRC_SLANT_0_1 +104 0x2000 //RX_FDDRC_SLANT_0_2 +105 0x2000 //RX_FDDRC_SLANT_0_3 +106 0x5333 //RX_FDDRC_SLANT_1_0 +107 0x5333 //RX_FDDRC_SLANT_1_1 +108 0x5333 //RX_FDDRC_SLANT_1_2 +109 0x5333 //RX_FDDRC_SLANT_1_3 +110 0x0000 //RX_FDDRC_RESRV_0 +129 0x0100 //RX_SPK_VOL +130 0x0000 //RX_VOL_RESRV_0 +#VOL 5 +6 0x1000 //RX_TDDRC_ALPHA_UP_1 +7 0x1000 //RX_TDDRC_ALPHA_UP_2 +8 0x1000 //RX_TDDRC_ALPHA_UP_3 +9 0x1000 //RX_TDDRC_ALPHA_UP_4 +27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +33 0x7000 //RX_TDDRC_LIMITER_THRD +34 0x0800 //RX_TDDRC_LIMITER_GAIN +112 0x0000 //RX_TDDRC_THRD_0 +113 0x0000 //RX_TDDRC_THRD_1 +114 0x1800 //RX_TDDRC_THRD_2 +115 0x1800 //RX_TDDRC_THRD_3 +116 0x3000 //RX_TDDRC_SLANT_0 +117 0x6E00 //RX_TDDRC_SLANT_1 +118 0x1000 //RX_TDDRC_ALPHA_UP_0 +119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +120 0x0000 //RX_TDDRC_HMNC_FLAG +121 0x199A //RX_TDDRC_HMNC_GAIN +122 0x0001 //RX_TDDRC_SMT_FLAG +123 0x0CCD //RX_TDDRC_SMT_W +124 0x0400 //RX_TDDRC_DRC_GAIN +38 0x0030 //RX_FDEQ_SUBNUM +39 0x4848 //RX_FDEQ_GAIN_0 +40 0x4848 //RX_FDEQ_GAIN_1 +41 0x4844 //RX_FDEQ_GAIN_2 +42 0x4A4C //RX_FDEQ_GAIN_3 +43 0x4E50 //RX_FDEQ_GAIN_4 +44 0x5254 //RX_FDEQ_GAIN_5 +45 0x5658 //RX_FDEQ_GAIN_6 +46 0x5A5C //RX_FDEQ_GAIN_7 +47 0x5C5C //RX_FDEQ_GAIN_8 +48 0x5C5C //RX_FDEQ_GAIN_9 +49 0x5C5C //RX_FDEQ_GAIN_10 +50 0x5C5C //RX_FDEQ_GAIN_11 +51 0x5C5C //RX_FDEQ_GAIN_12 +52 0x5C5C //RX_FDEQ_GAIN_13 +53 0x4848 //RX_FDEQ_GAIN_14 +54 0x4848 //RX_FDEQ_GAIN_15 +55 0x4848 //RX_FDEQ_GAIN_16 +56 0x4848 //RX_FDEQ_GAIN_17 +57 0x4848 //RX_FDEQ_GAIN_18 +58 0x4848 //RX_FDEQ_GAIN_19 +59 0x4848 //RX_FDEQ_GAIN_20 +60 0x4848 //RX_FDEQ_GAIN_21 +61 0x4848 //RX_FDEQ_GAIN_22 +62 0x4848 //RX_FDEQ_GAIN_23 +63 0x0202 //RX_FDEQ_BIN_0 +64 0x0203 //RX_FDEQ_BIN_1 +65 0x0402 //RX_FDEQ_BIN_2 +66 0x0505 //RX_FDEQ_BIN_3 +67 0x0505 //RX_FDEQ_BIN_4 +68 0x0505 //RX_FDEQ_BIN_5 +69 0x0505 //RX_FDEQ_BIN_6 +70 0x0505 //RX_FDEQ_BIN_7 +71 0x160C //RX_FDEQ_BIN_8 +72 0x0D0E //RX_FDEQ_BIN_9 +73 0x0E0F //RX_FDEQ_BIN_10 +74 0x0F10 //RX_FDEQ_BIN_11 +75 0x1011 //RX_FDEQ_BIN_12 +76 0x1104 //RX_FDEQ_BIN_13 +77 0x0000 //RX_FDEQ_BIN_14 +78 0x0000 //RX_FDEQ_BIN_15 +79 0x0000 //RX_FDEQ_BIN_16 +80 0x0000 //RX_FDEQ_BIN_17 +81 0x0000 //RX_FDEQ_BIN_18 +82 0x0000 //RX_FDEQ_BIN_19 +83 0x0000 //RX_FDEQ_BIN_20 +84 0x0000 //RX_FDEQ_BIN_21 +85 0x0000 //RX_FDEQ_BIN_22 +86 0x0000 //RX_FDEQ_BIN_23 +87 0x4000 //RX_FDEQ_RESRV_0 +88 0x0320 //RX_FDEQ_RESRV_1 +89 0x0018 //RX_FDDRC_BAND_MARGIN_0 +90 0x0030 //RX_FDDRC_BAND_MARGIN_1 +91 0x0050 //RX_FDDRC_BAND_MARGIN_2 +92 0x0080 //RX_FDDRC_BAND_MARGIN_3 +93 0x0007 //RX_FDDRC_BLOCK_EXP +94 0x5000 //RX_FDDRC_THRD_2_0 +95 0x5000 //RX_FDDRC_THRD_2_1 +96 0x5000 //RX_FDDRC_THRD_2_2 +97 0x5000 //RX_FDDRC_THRD_2_3 +98 0x6400 //RX_FDDRC_THRD_3_0 +99 0x6400 //RX_FDDRC_THRD_3_1 +100 0x6400 //RX_FDDRC_THRD_3_2 +101 0x6400 //RX_FDDRC_THRD_3_3 +102 0x2000 //RX_FDDRC_SLANT_0_0 +103 0x2000 //RX_FDDRC_SLANT_0_1 +104 0x2000 //RX_FDDRC_SLANT_0_2 +105 0x2000 //RX_FDDRC_SLANT_0_3 +106 0x5333 //RX_FDDRC_SLANT_1_0 +107 0x5333 //RX_FDDRC_SLANT_1_1 +108 0x5333 //RX_FDDRC_SLANT_1_2 +109 0x5333 //RX_FDDRC_SLANT_1_3 +110 0x0000 //RX_FDDRC_RESRV_0 +129 0x0100 //RX_SPK_VOL +130 0x0000 //RX_VOL_RESRV_0 +#VOL 6 +6 0x1000 //RX_TDDRC_ALPHA_UP_1 +7 0x1000 //RX_TDDRC_ALPHA_UP_2 +8 0x1000 //RX_TDDRC_ALPHA_UP_3 +9 0x1000 //RX_TDDRC_ALPHA_UP_4 +27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +33 0x7000 //RX_TDDRC_LIMITER_THRD +34 0x0800 //RX_TDDRC_LIMITER_GAIN +112 0x0000 //RX_TDDRC_THRD_0 +113 0x0000 //RX_TDDRC_THRD_1 +114 0x1800 //RX_TDDRC_THRD_2 +115 0x1800 //RX_TDDRC_THRD_3 +116 0x3000 //RX_TDDRC_SLANT_0 +117 0x6E00 //RX_TDDRC_SLANT_1 +118 0x1000 //RX_TDDRC_ALPHA_UP_0 +119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +120 0x0000 //RX_TDDRC_HMNC_FLAG +121 0x199A //RX_TDDRC_HMNC_GAIN +122 0x0001 //RX_TDDRC_SMT_FLAG +123 0x0CCD //RX_TDDRC_SMT_W +124 0x0400 //RX_TDDRC_DRC_GAIN +38 0x0030 //RX_FDEQ_SUBNUM +39 0x4848 //RX_FDEQ_GAIN_0 +40 0x4848 //RX_FDEQ_GAIN_1 +41 0x4844 //RX_FDEQ_GAIN_2 +42 0x4A4C //RX_FDEQ_GAIN_3 +43 0x4E50 //RX_FDEQ_GAIN_4 +44 0x5254 //RX_FDEQ_GAIN_5 +45 0x5658 //RX_FDEQ_GAIN_6 +46 0x5A5C //RX_FDEQ_GAIN_7 +47 0x5C5C //RX_FDEQ_GAIN_8 +48 0x5C5C //RX_FDEQ_GAIN_9 +49 0x5C5C //RX_FDEQ_GAIN_10 +50 0x5C5C //RX_FDEQ_GAIN_11 +51 0x5C5C //RX_FDEQ_GAIN_12 +52 0x5C5C //RX_FDEQ_GAIN_13 +53 0x4848 //RX_FDEQ_GAIN_14 +54 0x4848 //RX_FDEQ_GAIN_15 +55 0x4848 //RX_FDEQ_GAIN_16 +56 0x4848 //RX_FDEQ_GAIN_17 +57 0x4848 //RX_FDEQ_GAIN_18 +58 0x4848 //RX_FDEQ_GAIN_19 +59 0x4848 //RX_FDEQ_GAIN_20 +60 0x4848 //RX_FDEQ_GAIN_21 +61 0x4848 //RX_FDEQ_GAIN_22 +62 0x4848 //RX_FDEQ_GAIN_23 +63 0x0202 //RX_FDEQ_BIN_0 +64 0x0203 //RX_FDEQ_BIN_1 +65 0x0402 //RX_FDEQ_BIN_2 +66 0x0505 //RX_FDEQ_BIN_3 +67 0x0505 //RX_FDEQ_BIN_4 +68 0x0505 //RX_FDEQ_BIN_5 +69 0x0505 //RX_FDEQ_BIN_6 +70 0x0505 //RX_FDEQ_BIN_7 +71 0x160C //RX_FDEQ_BIN_8 +72 0x0D0E //RX_FDEQ_BIN_9 +73 0x0E0F //RX_FDEQ_BIN_10 +74 0x0F10 //RX_FDEQ_BIN_11 +75 0x1011 //RX_FDEQ_BIN_12 +76 0x1104 //RX_FDEQ_BIN_13 +77 0x0000 //RX_FDEQ_BIN_14 +78 0x0000 //RX_FDEQ_BIN_15 +79 0x0000 //RX_FDEQ_BIN_16 +80 0x0000 //RX_FDEQ_BIN_17 +81 0x0000 //RX_FDEQ_BIN_18 +82 0x0000 //RX_FDEQ_BIN_19 +83 0x0000 //RX_FDEQ_BIN_20 +84 0x0000 //RX_FDEQ_BIN_21 +85 0x0000 //RX_FDEQ_BIN_22 +86 0x0000 //RX_FDEQ_BIN_23 +87 0x4000 //RX_FDEQ_RESRV_0 +88 0x0320 //RX_FDEQ_RESRV_1 +89 0x0018 //RX_FDDRC_BAND_MARGIN_0 +90 0x0030 //RX_FDDRC_BAND_MARGIN_1 +91 0x0050 //RX_FDDRC_BAND_MARGIN_2 +92 0x0080 //RX_FDDRC_BAND_MARGIN_3 +93 0x0007 //RX_FDDRC_BLOCK_EXP +94 0x5000 //RX_FDDRC_THRD_2_0 +95 0x5000 //RX_FDDRC_THRD_2_1 +96 0x5000 //RX_FDDRC_THRD_2_2 +97 0x5000 //RX_FDDRC_THRD_2_3 +98 0x6400 //RX_FDDRC_THRD_3_0 +99 0x6400 //RX_FDDRC_THRD_3_1 +100 0x6400 //RX_FDDRC_THRD_3_2 +101 0x6400 //RX_FDDRC_THRD_3_3 +102 0x2000 //RX_FDDRC_SLANT_0_0 +103 0x2000 //RX_FDDRC_SLANT_0_1 +104 0x2000 //RX_FDDRC_SLANT_0_2 +105 0x2000 //RX_FDDRC_SLANT_0_3 +106 0x5333 //RX_FDDRC_SLANT_1_0 +107 0x5333 //RX_FDDRC_SLANT_1_1 +108 0x5333 //RX_FDDRC_SLANT_1_2 +109 0x5333 //RX_FDDRC_SLANT_1_3 +110 0x0000 //RX_FDDRC_RESRV_0 +129 0x0100 //RX_SPK_VOL +130 0x0000 //RX_VOL_RESRV_0 +#RX 2 +157 0x000C //RX_RECVFUNC_MODE_0 +158 0x0000 //RX_RECVFUNC_MODE_1 +159 0x0001 //RX_SAMPLINGFREQ_SIG +160 0x0001 //RX_SAMPLINGFREQ_PROC +161 0x000A //RX_FRAME_SZ +162 0x0000 //RX_DELAY_OPT +163 0x1000 //RX_TDDRC_ALPHA_UP_1 +164 0x1000 //RX_TDDRC_ALPHA_UP_2 +165 0x1000 //RX_TDDRC_ALPHA_UP_3 +166 0x1000 //RX_TDDRC_ALPHA_UP_4 +167 0x0800 //RX_PGA +168 0x7FFF //RX_A_HP +169 0x4000 //RX_B_PE +170 0x7800 //RX_THR_PITCH_DET_0 +171 0x7000 //RX_THR_PITCH_DET_1 +172 0x6000 //RX_THR_PITCH_DET_2 +173 0x0008 //RX_PITCH_BFR_LEN +174 0x0003 //RX_SBD_PITCH_DET +175 0x0100 //RX_PP_RESRV_0 +176 0x0020 //RX_PP_RESRV_1 +177 0x0400 //RX_N_SN_EST +178 0x000C //RX_N2_SN_EST +179 0x0014 //RX_NS_LVL_CTRL +180 0xF800 //RX_THR_SN_EST +181 0x7E00 //RX_LAMBDA_PFILT +182 0x000A //RX_FENS_RESRV_0 +183 0x0190 //RX_FENS_RESRV_1 +184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +187 0x0002 //RX_EXTRA_NS_L +188 0x0800 //RX_EXTRA_NS_A +189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +190 0x7000 //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +192 0x199A //RX_A_POST_FLT +193 0x0000 //RX_LMT_THRD +194 0x4000 //RX_LMT_ALPHA +195 0x0030 //RX_FDEQ_SUBNUM +196 0x4848 //RX_FDEQ_GAIN_0 +197 0x4848 //RX_FDEQ_GAIN_1 +198 0x4844 //RX_FDEQ_GAIN_2 +199 0x4A4C //RX_FDEQ_GAIN_3 +200 0x4E50 //RX_FDEQ_GAIN_4 +201 0x5254 //RX_FDEQ_GAIN_5 +202 0x5658 //RX_FDEQ_GAIN_6 +203 0x5A5C //RX_FDEQ_GAIN_7 +204 0x5C5C //RX_FDEQ_GAIN_8 +205 0x5C5C //RX_FDEQ_GAIN_9 +206 0x5C5C //RX_FDEQ_GAIN_10 +207 0x5C5C //RX_FDEQ_GAIN_11 +208 0x5C5C //RX_FDEQ_GAIN_12 +209 0x5C5C //RX_FDEQ_GAIN_13 +210 0x4848 //RX_FDEQ_GAIN_14 +211 0x4848 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0202 //RX_FDEQ_BIN_0 +221 0x0203 //RX_FDEQ_BIN_1 +222 0x0402 //RX_FDEQ_BIN_2 +223 0x0505 //RX_FDEQ_BIN_3 +224 0x0505 //RX_FDEQ_BIN_4 +225 0x0505 //RX_FDEQ_BIN_5 +226 0x0505 //RX_FDEQ_BIN_6 +227 0x0505 //RX_FDEQ_BIN_7 +228 0x160C //RX_FDEQ_BIN_8 +229 0x0D0E //RX_FDEQ_BIN_9 +230 0x0E0F //RX_FDEQ_BIN_10 +231 0x0F10 //RX_FDEQ_BIN_11 +232 0x1011 //RX_FDEQ_BIN_12 +233 0x1104 //RX_FDEQ_BIN_13 +234 0x0000 //RX_FDEQ_BIN_14 +235 0x0000 //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x4000 //RX_FDEQ_RESRV_0 +245 0x0320 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0030 //RX_FDDRC_BAND_MARGIN_1 +248 0x0050 //RX_FDDRC_BAND_MARGIN_2 +249 0x0080 //RX_FDDRC_BAND_MARGIN_3 +250 0x0007 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x5000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x6400 //RX_FDDRC_THRD_3_2 +258 0x6400 //RX_FDDRC_THRD_3_3 +259 0x2000 //RX_FDDRC_SLANT_0_0 +260 0x2000 //RX_FDDRC_SLANT_0_1 +261 0x2000 //RX_FDDRC_SLANT_0_2 +262 0x2000 //RX_FDDRC_SLANT_0_3 +263 0x5333 //RX_FDDRC_SLANT_1_0 +264 0x5333 //RX_FDDRC_SLANT_1_1 +265 0x5333 //RX_FDDRC_SLANT_1_2 +266 0x5333 //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +268 0x0002 //RX_FILTINDX +269 0x0000 //RX_TDDRC_THRD_0 +270 0x0000 //RX_TDDRC_THRD_1 +271 0x1800 //RX_TDDRC_THRD_2 +272 0x1800 //RX_TDDRC_THRD_3 +273 0x3000 //RX_TDDRC_SLANT_0 +274 0x6E00 //RX_TDDRC_SLANT_1 +275 0x1000 //RX_TDDRC_ALPHA_UP_0 +276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x199A //RX_TDDRC_HMNC_GAIN +279 0x0001 //RX_TDDRC_SMT_FLAG +280 0x0CCD //RX_TDDRC_SMT_W +281 0x0400 //RX_TDDRC_DRC_GAIN +282 0x7C00 //RX_LAMBDA_PKA_FP +283 0x2000 //RX_TPKA_FP +284 0x2000 //RX_MIN_G_FP +285 0x0080 //RX_MAX_G_FP +286 0x0100 //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 +288 0x0000 //RX_MAXLEVEL_CNG +289 0x3000 //RX_BWE_UV_TH +290 0x3000 //RX_BWE_UV_TH2 +291 0x1800 //RX_BWE_UV_TH3 +292 0x1000 //RX_BWE_V_TH +293 0x04CD //RX_BWE_GAIN1_V_TH1 +294 0x0F33 //RX_BWE_GAIN1_V_TH2 +295 0x7333 //RX_BWE_UV_EQ +296 0x199A //RX_BWE_V_EQ +297 0x7333 //RX_BWE_TONE_TH +298 0x0004 //RX_BWE_UV_HOLD_T +299 0x6CCD //RX_BWE_GAIN2_ALPHA +300 0x799A //RX_BWE_GAIN3_ALPHA +301 0x001E //RX_BWE_CUTOFF +302 0x3000 //RX_BWE_GAINFILL +303 0x3200 //RX_BWE_MAXTH_TONE +304 0x2000 //RX_BWE_EQ_0 +305 0x2000 //RX_BWE_EQ_1 +306 0x2000 //RX_BWE_EQ_2 +307 0x2000 //RX_BWE_EQ_3 +308 0x2000 //RX_BWE_EQ_4 +309 0x2000 //RX_BWE_EQ_5 +310 0x2000 //RX_BWE_EQ_6 +311 0x0000 //RX_BWE_RESRV_0 +312 0x0000 //RX_BWE_RESRV_1 +313 0x0000 //RX_BWE_RESRV_2 +#VOL 0 +163 0x1000 //RX_TDDRC_ALPHA_UP_1 +164 0x1000 //RX_TDDRC_ALPHA_UP_2 +165 0x1000 //RX_TDDRC_ALPHA_UP_3 +166 0x1000 //RX_TDDRC_ALPHA_UP_4 +184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +190 0x7000 //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +269 0x0000 //RX_TDDRC_THRD_0 +270 0x0000 //RX_TDDRC_THRD_1 +271 0x1800 //RX_TDDRC_THRD_2 +272 0x1800 //RX_TDDRC_THRD_3 +273 0x3000 //RX_TDDRC_SLANT_0 +274 0x6E00 //RX_TDDRC_SLANT_1 +275 0x1000 //RX_TDDRC_ALPHA_UP_0 +276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x199A //RX_TDDRC_HMNC_GAIN +279 0x0001 //RX_TDDRC_SMT_FLAG +280 0x0CCD //RX_TDDRC_SMT_W +281 0x0400 //RX_TDDRC_DRC_GAIN +195 0x0030 //RX_FDEQ_SUBNUM +196 0x4848 //RX_FDEQ_GAIN_0 +197 0x4848 //RX_FDEQ_GAIN_1 +198 0x4844 //RX_FDEQ_GAIN_2 +199 0x4A4C //RX_FDEQ_GAIN_3 +200 0x4E50 //RX_FDEQ_GAIN_4 +201 0x5254 //RX_FDEQ_GAIN_5 +202 0x5658 //RX_FDEQ_GAIN_6 +203 0x5A5C //RX_FDEQ_GAIN_7 +204 0x5C5C //RX_FDEQ_GAIN_8 +205 0x5C5C //RX_FDEQ_GAIN_9 +206 0x5C5C //RX_FDEQ_GAIN_10 +207 0x5C5C //RX_FDEQ_GAIN_11 +208 0x5C5C //RX_FDEQ_GAIN_12 +209 0x5C5C //RX_FDEQ_GAIN_13 +210 0x4848 //RX_FDEQ_GAIN_14 +211 0x4848 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0202 //RX_FDEQ_BIN_0 +221 0x0203 //RX_FDEQ_BIN_1 +222 0x0402 //RX_FDEQ_BIN_2 +223 0x0505 //RX_FDEQ_BIN_3 +224 0x0505 //RX_FDEQ_BIN_4 +225 0x0505 //RX_FDEQ_BIN_5 +226 0x0505 //RX_FDEQ_BIN_6 +227 0x0505 //RX_FDEQ_BIN_7 +228 0x160C //RX_FDEQ_BIN_8 +229 0x0D0E //RX_FDEQ_BIN_9 +230 0x0E0F //RX_FDEQ_BIN_10 +231 0x0F10 //RX_FDEQ_BIN_11 +232 0x1011 //RX_FDEQ_BIN_12 +233 0x1104 //RX_FDEQ_BIN_13 +234 0x0000 //RX_FDEQ_BIN_14 +235 0x0000 //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x4000 //RX_FDEQ_RESRV_0 +245 0x0320 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0030 //RX_FDDRC_BAND_MARGIN_1 +248 0x0050 //RX_FDDRC_BAND_MARGIN_2 +249 0x0080 //RX_FDDRC_BAND_MARGIN_3 +250 0x0007 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x5000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x6400 //RX_FDDRC_THRD_3_2 +258 0x6400 //RX_FDDRC_THRD_3_3 +259 0x2000 //RX_FDDRC_SLANT_0_0 +260 0x2000 //RX_FDDRC_SLANT_0_1 +261 0x2000 //RX_FDDRC_SLANT_0_2 +262 0x2000 //RX_FDDRC_SLANT_0_3 +263 0x5333 //RX_FDDRC_SLANT_1_0 +264 0x5333 //RX_FDDRC_SLANT_1_1 +265 0x5333 //RX_FDDRC_SLANT_1_2 +266 0x5333 //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +286 0x0100 //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 +#VOL 1 +163 0x1000 //RX_TDDRC_ALPHA_UP_1 +164 0x1000 //RX_TDDRC_ALPHA_UP_2 +165 0x1000 //RX_TDDRC_ALPHA_UP_3 +166 0x1000 //RX_TDDRC_ALPHA_UP_4 +184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +190 0x7000 //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +269 0x0000 //RX_TDDRC_THRD_0 +270 0x0000 //RX_TDDRC_THRD_1 +271 0x1800 //RX_TDDRC_THRD_2 +272 0x1800 //RX_TDDRC_THRD_3 +273 0x3000 //RX_TDDRC_SLANT_0 +274 0x6E00 //RX_TDDRC_SLANT_1 +275 0x1000 //RX_TDDRC_ALPHA_UP_0 +276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x199A //RX_TDDRC_HMNC_GAIN +279 0x0001 //RX_TDDRC_SMT_FLAG +280 0x0CCD //RX_TDDRC_SMT_W +281 0x0400 //RX_TDDRC_DRC_GAIN +195 0x0030 //RX_FDEQ_SUBNUM +196 0x4848 //RX_FDEQ_GAIN_0 +197 0x4848 //RX_FDEQ_GAIN_1 +198 0x4844 //RX_FDEQ_GAIN_2 +199 0x4A4C //RX_FDEQ_GAIN_3 +200 0x4E50 //RX_FDEQ_GAIN_4 +201 0x5254 //RX_FDEQ_GAIN_5 +202 0x5658 //RX_FDEQ_GAIN_6 +203 0x5A5C //RX_FDEQ_GAIN_7 +204 0x5C5C //RX_FDEQ_GAIN_8 +205 0x5C5C //RX_FDEQ_GAIN_9 +206 0x5C5C //RX_FDEQ_GAIN_10 +207 0x5C5C //RX_FDEQ_GAIN_11 +208 0x5C5C //RX_FDEQ_GAIN_12 +209 0x5C5C //RX_FDEQ_GAIN_13 +210 0x4848 //RX_FDEQ_GAIN_14 +211 0x4848 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0202 //RX_FDEQ_BIN_0 +221 0x0203 //RX_FDEQ_BIN_1 +222 0x0402 //RX_FDEQ_BIN_2 +223 0x0505 //RX_FDEQ_BIN_3 +224 0x0505 //RX_FDEQ_BIN_4 +225 0x0505 //RX_FDEQ_BIN_5 +226 0x0505 //RX_FDEQ_BIN_6 +227 0x0505 //RX_FDEQ_BIN_7 +228 0x160C //RX_FDEQ_BIN_8 +229 0x0D0E //RX_FDEQ_BIN_9 +230 0x0E0F //RX_FDEQ_BIN_10 +231 0x0F10 //RX_FDEQ_BIN_11 +232 0x1011 //RX_FDEQ_BIN_12 +233 0x1104 //RX_FDEQ_BIN_13 +234 0x0000 //RX_FDEQ_BIN_14 +235 0x0000 //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x4000 //RX_FDEQ_RESRV_0 +245 0x0320 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0030 //RX_FDDRC_BAND_MARGIN_1 +248 0x0050 //RX_FDDRC_BAND_MARGIN_2 +249 0x0080 //RX_FDDRC_BAND_MARGIN_3 +250 0x0007 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x5000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x6400 //RX_FDDRC_THRD_3_2 +258 0x6400 //RX_FDDRC_THRD_3_3 +259 0x2000 //RX_FDDRC_SLANT_0_0 +260 0x2000 //RX_FDDRC_SLANT_0_1 +261 0x2000 //RX_FDDRC_SLANT_0_2 +262 0x2000 //RX_FDDRC_SLANT_0_3 +263 0x5333 //RX_FDDRC_SLANT_1_0 +264 0x5333 //RX_FDDRC_SLANT_1_1 +265 0x5333 //RX_FDDRC_SLANT_1_2 +266 0x5333 //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +286 0x0100 //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 +#VOL 2 +163 0x1000 //RX_TDDRC_ALPHA_UP_1 +164 0x1000 //RX_TDDRC_ALPHA_UP_2 +165 0x1000 //RX_TDDRC_ALPHA_UP_3 +166 0x1000 //RX_TDDRC_ALPHA_UP_4 +184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +190 0x7000 //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +269 0x0000 //RX_TDDRC_THRD_0 +270 0x0000 //RX_TDDRC_THRD_1 +271 0x1800 //RX_TDDRC_THRD_2 +272 0x1800 //RX_TDDRC_THRD_3 +273 0x3000 //RX_TDDRC_SLANT_0 +274 0x6E00 //RX_TDDRC_SLANT_1 +275 0x1000 //RX_TDDRC_ALPHA_UP_0 +276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x199A //RX_TDDRC_HMNC_GAIN +279 0x0001 //RX_TDDRC_SMT_FLAG +280 0x0CCD //RX_TDDRC_SMT_W +281 0x0400 //RX_TDDRC_DRC_GAIN +195 0x0030 //RX_FDEQ_SUBNUM +196 0x4848 //RX_FDEQ_GAIN_0 +197 0x4848 //RX_FDEQ_GAIN_1 +198 0x4844 //RX_FDEQ_GAIN_2 +199 0x4A4C //RX_FDEQ_GAIN_3 +200 0x4E50 //RX_FDEQ_GAIN_4 +201 0x5254 //RX_FDEQ_GAIN_5 +202 0x5658 //RX_FDEQ_GAIN_6 +203 0x5A5C //RX_FDEQ_GAIN_7 +204 0x5C5C //RX_FDEQ_GAIN_8 +205 0x5C5C //RX_FDEQ_GAIN_9 +206 0x5C5C //RX_FDEQ_GAIN_10 +207 0x5C5C //RX_FDEQ_GAIN_11 +208 0x5C5C //RX_FDEQ_GAIN_12 +209 0x5C5C //RX_FDEQ_GAIN_13 +210 0x4848 //RX_FDEQ_GAIN_14 +211 0x4848 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0202 //RX_FDEQ_BIN_0 +221 0x0203 //RX_FDEQ_BIN_1 +222 0x0402 //RX_FDEQ_BIN_2 +223 0x0505 //RX_FDEQ_BIN_3 +224 0x0505 //RX_FDEQ_BIN_4 +225 0x0505 //RX_FDEQ_BIN_5 +226 0x0505 //RX_FDEQ_BIN_6 +227 0x0505 //RX_FDEQ_BIN_7 +228 0x160C //RX_FDEQ_BIN_8 +229 0x0D0E //RX_FDEQ_BIN_9 +230 0x0E0F //RX_FDEQ_BIN_10 +231 0x0F10 //RX_FDEQ_BIN_11 +232 0x1011 //RX_FDEQ_BIN_12 +233 0x1104 //RX_FDEQ_BIN_13 +234 0x0000 //RX_FDEQ_BIN_14 +235 0x0000 //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x4000 //RX_FDEQ_RESRV_0 +245 0x0320 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0030 //RX_FDDRC_BAND_MARGIN_1 +248 0x0050 //RX_FDDRC_BAND_MARGIN_2 +249 0x0080 //RX_FDDRC_BAND_MARGIN_3 +250 0x0007 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x5000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x6400 //RX_FDDRC_THRD_3_2 +258 0x6400 //RX_FDDRC_THRD_3_3 +259 0x2000 //RX_FDDRC_SLANT_0_0 +260 0x2000 //RX_FDDRC_SLANT_0_1 +261 0x2000 //RX_FDDRC_SLANT_0_2 +262 0x2000 //RX_FDDRC_SLANT_0_3 +263 0x5333 //RX_FDDRC_SLANT_1_0 +264 0x5333 //RX_FDDRC_SLANT_1_1 +265 0x5333 //RX_FDDRC_SLANT_1_2 +266 0x5333 //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +286 0x0100 //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 +#VOL 3 +163 0x1000 //RX_TDDRC_ALPHA_UP_1 +164 0x1000 //RX_TDDRC_ALPHA_UP_2 +165 0x1000 //RX_TDDRC_ALPHA_UP_3 +166 0x1000 //RX_TDDRC_ALPHA_UP_4 +184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +190 0x7000 //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +269 0x0000 //RX_TDDRC_THRD_0 +270 0x0000 //RX_TDDRC_THRD_1 +271 0x1800 //RX_TDDRC_THRD_2 +272 0x1800 //RX_TDDRC_THRD_3 +273 0x3000 //RX_TDDRC_SLANT_0 +274 0x6E00 //RX_TDDRC_SLANT_1 +275 0x1000 //RX_TDDRC_ALPHA_UP_0 +276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x199A //RX_TDDRC_HMNC_GAIN +279 0x0001 //RX_TDDRC_SMT_FLAG +280 0x0CCD //RX_TDDRC_SMT_W +281 0x0400 //RX_TDDRC_DRC_GAIN +195 0x0030 //RX_FDEQ_SUBNUM +196 0x4848 //RX_FDEQ_GAIN_0 +197 0x4848 //RX_FDEQ_GAIN_1 +198 0x4844 //RX_FDEQ_GAIN_2 +199 0x4A4C //RX_FDEQ_GAIN_3 +200 0x4E50 //RX_FDEQ_GAIN_4 +201 0x5254 //RX_FDEQ_GAIN_5 +202 0x5658 //RX_FDEQ_GAIN_6 +203 0x5A5C //RX_FDEQ_GAIN_7 +204 0x5C5C //RX_FDEQ_GAIN_8 +205 0x5C5C //RX_FDEQ_GAIN_9 +206 0x5C5C //RX_FDEQ_GAIN_10 +207 0x5C5C //RX_FDEQ_GAIN_11 +208 0x5C5C //RX_FDEQ_GAIN_12 +209 0x5C5C //RX_FDEQ_GAIN_13 +210 0x4848 //RX_FDEQ_GAIN_14 +211 0x4848 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0202 //RX_FDEQ_BIN_0 +221 0x0203 //RX_FDEQ_BIN_1 +222 0x0402 //RX_FDEQ_BIN_2 +223 0x0505 //RX_FDEQ_BIN_3 +224 0x0505 //RX_FDEQ_BIN_4 +225 0x0505 //RX_FDEQ_BIN_5 +226 0x0505 //RX_FDEQ_BIN_6 +227 0x0505 //RX_FDEQ_BIN_7 +228 0x160C //RX_FDEQ_BIN_8 +229 0x0D0E //RX_FDEQ_BIN_9 +230 0x0E0F //RX_FDEQ_BIN_10 +231 0x0F10 //RX_FDEQ_BIN_11 +232 0x1011 //RX_FDEQ_BIN_12 +233 0x1104 //RX_FDEQ_BIN_13 +234 0x0000 //RX_FDEQ_BIN_14 +235 0x0000 //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x4000 //RX_FDEQ_RESRV_0 +245 0x0320 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0030 //RX_FDDRC_BAND_MARGIN_1 +248 0x0050 //RX_FDDRC_BAND_MARGIN_2 +249 0x0080 //RX_FDDRC_BAND_MARGIN_3 +250 0x0007 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x5000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x6400 //RX_FDDRC_THRD_3_2 +258 0x6400 //RX_FDDRC_THRD_3_3 +259 0x2000 //RX_FDDRC_SLANT_0_0 +260 0x2000 //RX_FDDRC_SLANT_0_1 +261 0x2000 //RX_FDDRC_SLANT_0_2 +262 0x2000 //RX_FDDRC_SLANT_0_3 +263 0x5333 //RX_FDDRC_SLANT_1_0 +264 0x5333 //RX_FDDRC_SLANT_1_1 +265 0x5333 //RX_FDDRC_SLANT_1_2 +266 0x5333 //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +286 0x0100 //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 +#VOL 4 +163 0x1000 //RX_TDDRC_ALPHA_UP_1 +164 0x1000 //RX_TDDRC_ALPHA_UP_2 +165 0x1000 //RX_TDDRC_ALPHA_UP_3 +166 0x1000 //RX_TDDRC_ALPHA_UP_4 +184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +190 0x7000 //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +269 0x0000 //RX_TDDRC_THRD_0 +270 0x0000 //RX_TDDRC_THRD_1 +271 0x1800 //RX_TDDRC_THRD_2 +272 0x1800 //RX_TDDRC_THRD_3 +273 0x3000 //RX_TDDRC_SLANT_0 +274 0x6E00 //RX_TDDRC_SLANT_1 +275 0x1000 //RX_TDDRC_ALPHA_UP_0 +276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x199A //RX_TDDRC_HMNC_GAIN +279 0x0001 //RX_TDDRC_SMT_FLAG +280 0x0CCD //RX_TDDRC_SMT_W +281 0x0400 //RX_TDDRC_DRC_GAIN +195 0x0030 //RX_FDEQ_SUBNUM +196 0x4848 //RX_FDEQ_GAIN_0 +197 0x4848 //RX_FDEQ_GAIN_1 +198 0x4844 //RX_FDEQ_GAIN_2 +199 0x4A4C //RX_FDEQ_GAIN_3 +200 0x4E50 //RX_FDEQ_GAIN_4 +201 0x5254 //RX_FDEQ_GAIN_5 +202 0x5658 //RX_FDEQ_GAIN_6 +203 0x5A5C //RX_FDEQ_GAIN_7 +204 0x5C5C //RX_FDEQ_GAIN_8 +205 0x5C5C //RX_FDEQ_GAIN_9 +206 0x5C5C //RX_FDEQ_GAIN_10 +207 0x5C5C //RX_FDEQ_GAIN_11 +208 0x5C5C //RX_FDEQ_GAIN_12 +209 0x5C5C //RX_FDEQ_GAIN_13 +210 0x4848 //RX_FDEQ_GAIN_14 +211 0x4848 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0202 //RX_FDEQ_BIN_0 +221 0x0203 //RX_FDEQ_BIN_1 +222 0x0402 //RX_FDEQ_BIN_2 +223 0x0505 //RX_FDEQ_BIN_3 +224 0x0505 //RX_FDEQ_BIN_4 +225 0x0505 //RX_FDEQ_BIN_5 +226 0x0505 //RX_FDEQ_BIN_6 +227 0x0505 //RX_FDEQ_BIN_7 +228 0x160C //RX_FDEQ_BIN_8 +229 0x0D0E //RX_FDEQ_BIN_9 +230 0x0E0F //RX_FDEQ_BIN_10 +231 0x0F10 //RX_FDEQ_BIN_11 +232 0x1011 //RX_FDEQ_BIN_12 +233 0x1104 //RX_FDEQ_BIN_13 +234 0x0000 //RX_FDEQ_BIN_14 +235 0x0000 //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x4000 //RX_FDEQ_RESRV_0 +245 0x0320 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0030 //RX_FDDRC_BAND_MARGIN_1 +248 0x0050 //RX_FDDRC_BAND_MARGIN_2 +249 0x0080 //RX_FDDRC_BAND_MARGIN_3 +250 0x0007 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x5000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x6400 //RX_FDDRC_THRD_3_2 +258 0x6400 //RX_FDDRC_THRD_3_3 +259 0x2000 //RX_FDDRC_SLANT_0_0 +260 0x2000 //RX_FDDRC_SLANT_0_1 +261 0x2000 //RX_FDDRC_SLANT_0_2 +262 0x2000 //RX_FDDRC_SLANT_0_3 +263 0x5333 //RX_FDDRC_SLANT_1_0 +264 0x5333 //RX_FDDRC_SLANT_1_1 +265 0x5333 //RX_FDDRC_SLANT_1_2 +266 0x5333 //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +286 0x0100 //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 +#VOL 5 +163 0x1000 //RX_TDDRC_ALPHA_UP_1 +164 0x1000 //RX_TDDRC_ALPHA_UP_2 +165 0x1000 //RX_TDDRC_ALPHA_UP_3 +166 0x1000 //RX_TDDRC_ALPHA_UP_4 +184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +190 0x7000 //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +269 0x0000 //RX_TDDRC_THRD_0 +270 0x0000 //RX_TDDRC_THRD_1 +271 0x1800 //RX_TDDRC_THRD_2 +272 0x1800 //RX_TDDRC_THRD_3 +273 0x3000 //RX_TDDRC_SLANT_0 +274 0x6E00 //RX_TDDRC_SLANT_1 +275 0x1000 //RX_TDDRC_ALPHA_UP_0 +276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x199A //RX_TDDRC_HMNC_GAIN +279 0x0001 //RX_TDDRC_SMT_FLAG +280 0x0CCD //RX_TDDRC_SMT_W +281 0x0400 //RX_TDDRC_DRC_GAIN +195 0x0030 //RX_FDEQ_SUBNUM +196 0x4848 //RX_FDEQ_GAIN_0 +197 0x4848 //RX_FDEQ_GAIN_1 +198 0x4844 //RX_FDEQ_GAIN_2 +199 0x4A4C //RX_FDEQ_GAIN_3 +200 0x4E50 //RX_FDEQ_GAIN_4 +201 0x5254 //RX_FDEQ_GAIN_5 +202 0x5658 //RX_FDEQ_GAIN_6 +203 0x5A5C //RX_FDEQ_GAIN_7 +204 0x5C5C //RX_FDEQ_GAIN_8 +205 0x5C5C //RX_FDEQ_GAIN_9 +206 0x5C5C //RX_FDEQ_GAIN_10 +207 0x5C5C //RX_FDEQ_GAIN_11 +208 0x5C5C //RX_FDEQ_GAIN_12 +209 0x5C5C //RX_FDEQ_GAIN_13 +210 0x4848 //RX_FDEQ_GAIN_14 +211 0x4848 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0202 //RX_FDEQ_BIN_0 +221 0x0203 //RX_FDEQ_BIN_1 +222 0x0402 //RX_FDEQ_BIN_2 +223 0x0505 //RX_FDEQ_BIN_3 +224 0x0505 //RX_FDEQ_BIN_4 +225 0x0505 //RX_FDEQ_BIN_5 +226 0x0505 //RX_FDEQ_BIN_6 +227 0x0505 //RX_FDEQ_BIN_7 +228 0x160C //RX_FDEQ_BIN_8 +229 0x0D0E //RX_FDEQ_BIN_9 +230 0x0E0F //RX_FDEQ_BIN_10 +231 0x0F10 //RX_FDEQ_BIN_11 +232 0x1011 //RX_FDEQ_BIN_12 +233 0x1104 //RX_FDEQ_BIN_13 +234 0x0000 //RX_FDEQ_BIN_14 +235 0x0000 //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x4000 //RX_FDEQ_RESRV_0 +245 0x0320 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0030 //RX_FDDRC_BAND_MARGIN_1 +248 0x0050 //RX_FDDRC_BAND_MARGIN_2 +249 0x0080 //RX_FDDRC_BAND_MARGIN_3 +250 0x0007 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x5000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x6400 //RX_FDDRC_THRD_3_2 +258 0x6400 //RX_FDDRC_THRD_3_3 +259 0x2000 //RX_FDDRC_SLANT_0_0 +260 0x2000 //RX_FDDRC_SLANT_0_1 +261 0x2000 //RX_FDDRC_SLANT_0_2 +262 0x2000 //RX_FDDRC_SLANT_0_3 +263 0x5333 //RX_FDDRC_SLANT_1_0 +264 0x5333 //RX_FDDRC_SLANT_1_1 +265 0x5333 //RX_FDDRC_SLANT_1_2 +266 0x5333 //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +286 0x0100 //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 +#VOL 6 +163 0x1000 //RX_TDDRC_ALPHA_UP_1 +164 0x1000 //RX_TDDRC_ALPHA_UP_2 +165 0x1000 //RX_TDDRC_ALPHA_UP_3 +166 0x1000 //RX_TDDRC_ALPHA_UP_4 +184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +190 0x7000 //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +269 0x0000 //RX_TDDRC_THRD_0 +270 0x0000 //RX_TDDRC_THRD_1 +271 0x1800 //RX_TDDRC_THRD_2 +272 0x1800 //RX_TDDRC_THRD_3 +273 0x3000 //RX_TDDRC_SLANT_0 +274 0x6E00 //RX_TDDRC_SLANT_1 +275 0x1000 //RX_TDDRC_ALPHA_UP_0 +276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x199A //RX_TDDRC_HMNC_GAIN +279 0x0001 //RX_TDDRC_SMT_FLAG +280 0x0CCD //RX_TDDRC_SMT_W +281 0x0400 //RX_TDDRC_DRC_GAIN +195 0x0030 //RX_FDEQ_SUBNUM +196 0x4848 //RX_FDEQ_GAIN_0 +197 0x4848 //RX_FDEQ_GAIN_1 +198 0x4844 //RX_FDEQ_GAIN_2 +199 0x4A4C //RX_FDEQ_GAIN_3 +200 0x4E50 //RX_FDEQ_GAIN_4 +201 0x5254 //RX_FDEQ_GAIN_5 +202 0x5658 //RX_FDEQ_GAIN_6 +203 0x5A5C //RX_FDEQ_GAIN_7 +204 0x5C5C //RX_FDEQ_GAIN_8 +205 0x5C5C //RX_FDEQ_GAIN_9 +206 0x5C5C //RX_FDEQ_GAIN_10 +207 0x5C5C //RX_FDEQ_GAIN_11 +208 0x5C5C //RX_FDEQ_GAIN_12 +209 0x5C5C //RX_FDEQ_GAIN_13 +210 0x4848 //RX_FDEQ_GAIN_14 +211 0x4848 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0202 //RX_FDEQ_BIN_0 +221 0x0203 //RX_FDEQ_BIN_1 +222 0x0402 //RX_FDEQ_BIN_2 +223 0x0505 //RX_FDEQ_BIN_3 +224 0x0505 //RX_FDEQ_BIN_4 +225 0x0505 //RX_FDEQ_BIN_5 +226 0x0505 //RX_FDEQ_BIN_6 +227 0x0505 //RX_FDEQ_BIN_7 +228 0x160C //RX_FDEQ_BIN_8 +229 0x0D0E //RX_FDEQ_BIN_9 +230 0x0E0F //RX_FDEQ_BIN_10 +231 0x0F10 //RX_FDEQ_BIN_11 +232 0x1011 //RX_FDEQ_BIN_12 +233 0x1104 //RX_FDEQ_BIN_13 +234 0x0000 //RX_FDEQ_BIN_14 +235 0x0000 //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x4000 //RX_FDEQ_RESRV_0 +245 0x0320 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0030 //RX_FDDRC_BAND_MARGIN_1 +248 0x0050 //RX_FDDRC_BAND_MARGIN_2 +249 0x0080 //RX_FDDRC_BAND_MARGIN_3 +250 0x0007 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x5000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x6400 //RX_FDDRC_THRD_3_2 +258 0x6400 //RX_FDDRC_THRD_3_3 +259 0x2000 //RX_FDDRC_SLANT_0_0 +260 0x2000 //RX_FDDRC_SLANT_0_1 +261 0x2000 //RX_FDDRC_SLANT_0_2 +262 0x2000 //RX_FDDRC_SLANT_0_3 +263 0x5333 //RX_FDDRC_SLANT_1_0 +264 0x5333 //RX_FDDRC_SLANT_1_1 +265 0x5333 //RX_FDDRC_SLANT_1_2 +266 0x5333 //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +286 0x0100 //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 + +#CASE_NAME HANDSET-HANDSET_HAC-TMOBILE_US-SWB +#PARAM_MODE Full +#PARAM_TYPE TX+2RX +#TOTAL_CUSTOM_STEP 7+7 +#TX +0 0x0000 //TX_OPERATION_MODE_0 +1 0x0000 //TX_OPERATION_MODE_1 +2 0x0076 //TX_PATCH_REG +3 0x6F7E //TX_SENDFUNC_MODE_0 +4 0x0001 //TX_SENDFUNC_MODE_1 +5 0x0002 //TX_NUM_MIC +6 0x0003 //TX_SAMPLINGFREQ_SIG +7 0x0003 //TX_SAMPLINGFREQ_PROC +8 0x000A //TX_FRAME_SZ_SIG +9 0x000A //TX_FRAME_SZ +10 0x0000 //TX_DELAY_OPT +11 0x0028 //TX_MAX_TAIL_LENGTH +12 0x0001 //TX_NUM_LOUTCHN +13 0x0001 //TX_MAXNUM_AECREF +14 0x0000 //TX_DBG_FUNC_REG +15 0x0000 //TX_DBG_FUNC_REG1 +16 0x0000 //TX_SYS_RESRV_0 +17 0x0000 //TX_SYS_RESRV_1 +18 0x0000 //TX_SYS_RESRV_2 +19 0x0000 //TX_SYS_RESRV_3 +20 0x0000 //TX_DIST2REF0 +21 0x00A3 //TX_DIST2REF1 +22 0x0000 //TX_DIST2REF_02 +23 0x0000 //TX_DIST2REF_03 +24 0x0000 //TX_DIST2REF_04 +25 0x0000 //TX_DIST2REF_05 +26 0x0000 //TX_MMIC +27 0x1000 //TX_PGA_0 +28 0x1000 //TX_PGA_1 +29 0x1000 //TX_PGA_2 +30 0x0000 //TX_PGA_3 +31 0x0000 //TX_PGA_4 +32 0x0000 //TX_PGA_5 +33 0x0000 //TX_MIC_PAIRS +34 0x0000 //TX_MIC_PAIRS_HS +35 0x0002 //TX_MICS_FOR_BF +36 0x0000 //TX_MIC_PAIRS_FORL1 +37 0x0002 //TX_MICS_OF_PAIR0 +38 0x0002 //TX_MICS_OF_PAIR1 +39 0x0002 //TX_MICS_OF_PAIR2 +40 0x0002 //TX_MICS_OF_PAIR3 +41 0x0000 //TX_MIC_DATA_SRC0 +42 0x0002 //TX_MIC_DATA_SRC1 +43 0x0001 //TX_MIC_DATA_SRC2 +44 0x0000 //TX_MIC_DATA_SRC3 +45 0x0000 //TX_MIC_PAIR_CH_04 +46 0x0000 //TX_MIC_PAIR_CH_05 +47 0x0000 //TX_MIC_PAIR_CH_10 +48 0x0000 //TX_MIC_PAIR_CH_11 +49 0x0000 //TX_MIC_PAIR_CH_12 +50 0x0000 //TX_MIC_PAIR_CH_13 +51 0x0000 //TX_MIC_PAIR_CH_14 +52 0x05DC //TX_HD_BIN_MASK +53 0x0010 //TX_HD_SUBAND_MASK +54 0x19A1 //TX_HD_FRAME_AVG_MASK +55 0x0320 //TX_HD_MIN_FRQ +56 0x1000 //TX_HD_ALPHA_PSD +57 0x1100 //TX_T_PHPR1 +58 0x0000 //TX_T_PHPR2 +59 0x0000 //TX_T_PTPR +60 0x0000 //TX_T_PNPR +61 0x0000 //TX_T_PAPR1 +62 0xEE6C //TX_T_PSDVAT +63 0x0800 //TX_CNT +64 0x4000 //TX_ANTI_HOWL_GAIN +65 0x0001 //TX_MICFORBFMARK_0 +66 0x0001 //TX_MICFORBFMARK_1 +67 0x0001 //TX_MICFORBFMARK_2 +68 0x0001 //TX_MICFORBFMARK_3 +69 0x0001 //TX_MICFORBFMARK_4 +70 0x0001 //TX_MICFORBFMARK_5 +71 0x0000 //TX_DIST2REF_10 +72 0x3A66 //TX_DIST2REF_11 +73 0x0000 //TX_DIST2REF2 +74 0x0000 //TX_DIST2REF_13 +75 0x0000 //TX_DIST2REF_14 +76 0x0000 //TX_DIST2REF_15 +77 0x0000 //TX_DIST2REF_20 +78 0x0000 //TX_DIST2REF_21 +79 0x0000 //TX_DIST2REF_22 +80 0x0000 //TX_DIST2REF_23 +81 0x0000 //TX_DIST2REF_24 +82 0x0000 //TX_DIST2REF_25 +83 0x0000 //TX_DIST2REF_30 +84 0x0000 //TX_DIST2REF_31 +85 0x0000 //TX_DIST2REF_32 +86 0x0000 //TX_DIST2REF_33 +87 0x0000 //TX_DIST2REF_34 +88 0x0000 //TX_DIST2REF_35 +89 0x0000 //TX_MIC_LOC_00 +90 0x0000 //TX_MIC_LOC_01 +91 0x0000 //TX_MIC_LOC_02 +92 0x0000 //TX_MIC_LOC_03 +93 0x0000 //TX_MIC_LOC_04 +94 0x0000 //TX_MIC_LOC_05 +95 0x0000 //TX_MIC_LOC_10 +96 0x0000 //TX_MIC_LOC_11 +97 0x0000 //TX_MIC_LOC_12 +98 0x0000 //TX_MIC_LOC_13 +99 0x0000 //TX_MIC_LOC_14 +100 0x0000 //TX_MIC_LOC_15 +101 0x0000 //TX_MIC_LOC_20 +102 0x0000 //TX_MIC_LOC_21 +103 0x0000 //TX_MIC_LOC_22 +104 0x0000 //TX_MIC_LOC_23 +105 0x0000 //TX_MIC_LOC_24 +106 0x0000 //TX_MIC_LOC_25 +107 0x0200 //TX_MIC_REFBLK_VOLUME +108 0x0AAC //TX_MIC_BLOCK_VOLUME +109 0x0000 //TX_INVERSE_MASK +110 0x0000 //TX_ADCS_MASK +111 0x04D0 //TX_ADCS_GAIN +112 0x4000 //TX_NFC_GAINFAC +113 0x0000 //TX_MAINMIC_BLKFACTOR +114 0x0000 //TX_REFMIC_BLKFACTOR +115 0x0000 //TX_BLMIC_BLKFACTOR +116 0x0000 //TX_BRMIC_BLKFACTOR +117 0x0031 //TX_MICBLK_START_BIN +118 0x0060 //TX_MICBLK_END_BIN +119 0x0015 //TX_MICBLK_FE_HOLD +120 0xFFF2 //TX_MICBLK_MR_EXP_TH +121 0xFFF2 //TX_MICBLK_LR_EXP_TH +122 0x0000 //TX_FENE_HOLD +123 0x4000 //TX_FE_ENER_TH_MTS +124 0x0004 //TX_FE_ENER_TH_EXP +125 0x6000 //TX_C_POST_FLT_MIC_MAINBLK +126 0x6000 //TX_C_POST_FLT_MIC_REFBLK +127 0x0010 //TX_MIC_BLOCK_N +128 0x7E56 //TX_A_HP +129 0x4000 //TX_B_PE +130 0x1800 //TX_THR_PITCH_DET_0 +131 0x1000 //TX_THR_PITCH_DET_1 +132 0x0800 //TX_THR_PITCH_DET_2 +133 0x0008 //TX_PITCH_BFR_LEN +134 0x0003 //TX_SBD_PITCH_DET +135 0x0050 //TX_TD_AEC_L +136 0x4000 //TX_MU0_UNP_TD_AEC +137 0x1000 //TX_MU0_PTD_TD_AEC +138 0x0000 //TX_PP_RESRV_0 +139 0x2A94 //TX_PP_RESRV_1 +140 0x55F0 //TX_PP_RESRV_2 +141 0x0000 //TX_PP_RESRV_3 +142 0x0000 //TX_PP_RESRV_4 +143 0x0000 //TX_PP_RESRV_5 +144 0x0000 //TX_PP_RESRV_6 +145 0x0000 //TX_PP_RESRV_7 +146 0x0028 //TX_TAIL_LENGTH +147 0x0080 //TX_AEC_REF_GAIN_0 +148 0x0800 //TX_AEC_REF_GAIN_1 +149 0x0800 //TX_AEC_REF_GAIN_2 +150 0x7900 //TX_EAD_THR +151 0x2000 //TX_THR_RE_EST +152 0x0400 //TX_MIN_EQ_RE_EST_0 +153 0x0400 //TX_MIN_EQ_RE_EST_1 +154 0x0800 //TX_MIN_EQ_RE_EST_2 +155 0x0800 //TX_MIN_EQ_RE_EST_3 +156 0x1000 //TX_MIN_EQ_RE_EST_4 +157 0x1000 //TX_MIN_EQ_RE_EST_5 +158 0x1000 //TX_MIN_EQ_RE_EST_6 +159 0x1000 //TX_MIN_EQ_RE_EST_7 +160 0x1000 //TX_MIN_EQ_RE_EST_8 +161 0x1000 //TX_MIN_EQ_RE_EST_9 +162 0x1000 //TX_MIN_EQ_RE_EST_10 +163 0x1000 //TX_MIN_EQ_RE_EST_11 +164 0x1000 //TX_MIN_EQ_RE_EST_12 +165 0x3000 //TX_LAMBDA_RE_EST +166 0x1000 //TX_LAMBDA_CB_NLE +167 0x1800 //TX_C_POST_FLT +168 0x4000 //TX_GAIN_NP +169 0x003C //TX_SE_HOLD_N +170 0x0046 //TX_DT_HOLD_N +171 0x03E8 //TX_DT2_HOLD_N +172 0x6666 //TX_AEC_RESRV_0 +173 0x0000 //TX_AEC_RESRV_1 +174 0x0014 //TX_AEC_RESRV_2 +175 0x0000 //TX_MIC_DELAY_LENGTH +176 0x0000 //TX_REF_DELAY_LENGTH +177 0x0000 //TX_ADD_LINEIN_GAINL +178 0x0000 //TX_ADD_LINEIN_GAINH +179 0x0000 //TX_MIN_EQ_RE_EST_14 +180 0x0000 //TX_DTD_THR1_8 +181 0x7FFF //TX_DTD_THR2_8 +182 0x0000 //TX_DTD_MIC_BLK2 +183 0x0008 //TX_FRQ_LIN_LEN +184 0x7FFF //TX_FRQ_AEC_LEN_RHO +185 0x6000 //TX_MU0_UNP_FRQ_AEC +186 0x4000 //TX_MU0_PTD_FRQ_AEC +187 0x000A //TX_MINENOISETH +188 0x0800 //TX_MU0_RE_EST +189 0x0001 //TX_AEC_NUM_CH +190 0x0000 //TX_BIGECHOATTENUATION_MAX +191 0x2000 //TX_A_POST_FLT_MICBLK +192 0x0000 //TX_BLKENERTH +193 0x0000 //TX_BLKENERHIGHTH +194 0x0000 //TX_NORMENERTH +195 0x0000 //TX_NORMENERHIGHTH +196 0x0000 //TX_NORMENERHIGHTHL +197 0x7000 //TX_DTD_THR1_0 +198 0x7000 //TX_DTD_THR1_1 +199 0x7000 //TX_DTD_THR1_2 +200 0x7F00 //TX_DTD_THR1_3 +201 0x7F00 //TX_DTD_THR1_4 +202 0x7F00 //TX_DTD_THR1_5 +203 0x7F00 //TX_DTD_THR1_6 +204 0x2000 //TX_DTD_THR2_0 +205 0x2000 //TX_DTD_THR2_1 +206 0x2000 //TX_DTD_THR2_2 +207 0x1000 //TX_DTD_THR2_3 +208 0x1000 //TX_DTD_THR2_4 +209 0x1000 //TX_DTD_THR2_5 +210 0x1000 //TX_DTD_THR2_6 +211 0x6000 //TX_DTD_THR3 +212 0x0177 //TX_SPK_CUT_K +213 0x1B58 //TX_DT_CUT_K +214 0x0100 //TX_DT_CUT_THR +215 0x04EB //TX_COMFORT_G +216 0x01F4 //TX_POWER_YOUT_TH +217 0x4000 //TX_FDPFGAINECHO +218 0x0000 //TX_DTD_HD_THR +219 0x0000 //TX_SPK_CUT_K_S +220 0x0000 //TX_DTD_MIC_BLK +221 0x0400 //TX_ADPT_STRICT_L +222 0x0200 //TX_ADPT_STRICT_H +223 0x0C00 //TX_RATIO_DT_L_TH_LOW +224 0x2000 //TX_RATIO_DT_H_TH_LOW +225 0x1800 //TX_RATIO_DT_L_TH_HIGH +226 0x3000 //TX_RATIO_DT_H_TH_HIGH +227 0x0A00 //TX_RATIO_DT_L0_TH +228 0x7000 //TX_B_POST_FILT_ECHO_L +229 0x7FFF //TX_B_POST_FILT_ECHO_H +230 0x0200 //TX_MIN_G_CTRL_ECHO +231 0x7FFF //TX_B_LESSCUT_RTO_ECHO +232 0x0000 //TX_EPD_OFFSET_00 +233 0x0000 //TX_EPD_OFFST_01 +234 0x1388 //TX_RATIO_DT_L0_TH_HIGH +235 0x3A98 //TX_RATIO_DT_H_TH_CUT +236 0x7FFF //TX_MIN_EQ_RE_EST_13 +237 0x0000 //TX_DTD_THR1_7 +238 0x0000 //TX_DTD_THR2_7 +239 0x0800 //TX_DT_RESRV_7 +240 0x0800 //TX_DT_RESRV_8 +241 0x0000 //TX_DT_RESRV_9 +242 0xF600 //TX_THR_SN_EST_0 +243 0xFA00 //TX_THR_SN_EST_1 +244 0xFA00 //TX_THR_SN_EST_2 +245 0xF800 //TX_THR_SN_EST_3 +246 0xF800 //TX_THR_SN_EST_4 +247 0xF800 //TX_THR_SN_EST_5 +248 0xF800 //TX_THR_SN_EST_6 +249 0xF700 //TX_THR_SN_EST_7 +250 0x0000 //TX_DELTA_THR_SN_EST_0 +251 0x0200 //TX_DELTA_THR_SN_EST_1 +252 0x0200 //TX_DELTA_THR_SN_EST_2 +253 0x0200 //TX_DELTA_THR_SN_EST_3 +254 0x0100 //TX_DELTA_THR_SN_EST_4 +255 0x0200 //TX_DELTA_THR_SN_EST_5 +256 0x0100 //TX_DELTA_THR_SN_EST_6 +257 0x0200 //TX_DELTA_THR_SN_EST_7 +258 0x4000 //TX_LAMBDA_NN_EST_0 +259 0x4000 //TX_LAMBDA_NN_EST_1 +260 0x4000 //TX_LAMBDA_NN_EST_2 +261 0x4000 //TX_LAMBDA_NN_EST_3 +262 0x4000 //TX_LAMBDA_NN_EST_4 +263 0x4000 //TX_LAMBDA_NN_EST_5 +264 0x4000 //TX_LAMBDA_NN_EST_6 +265 0x4000 //TX_LAMBDA_NN_EST_7 +266 0x0400 //TX_N_SN_EST +267 0x001E //TX_INBEAM_T +268 0x0041 //TX_INBEAMHOLDT +269 0x2000 //TX_G_STRICT +270 0x2000 //TX_EQ_THR_BF +271 0x799A //TX_LAMBDA_EQ_BF +272 0x1000 //TX_NE_RTO_TH +273 0x1000 //TX_NE_RTO_TH_L +274 0x1000 //TX_MAINREFRTOH_TH_H +275 0x0600 //TX_MAINREFRTOH_TH_L +276 0x2000 //TX_MAINREFRTO_TH_H +277 0x1400 //TX_MAINREFRTO_TH_L +278 0x0000 //TX_MAINREFRTO_TH_EQ +279 0x1000 //TX_B_POST_FLT_0 +280 0x1000 //TX_B_POST_FLT_1 +281 0x0014 //TX_NS_LVL_CTRL_0 +282 0x002C //TX_NS_LVL_CTRL_1 +283 0x0016 //TX_NS_LVL_CTRL_2 +284 0x0018 //TX_NS_LVL_CTRL_3 +285 0x0016 //TX_NS_LVL_CTRL_4 +286 0x0012 //TX_NS_LVL_CTRL_5 +287 0x0016 //TX_NS_LVL_CTRL_6 +288 0x0017 //TX_NS_LVL_CTRL_7 +289 0x000E //TX_MIN_GAIN_S_0 +290 0x000D //TX_MIN_GAIN_S_1 +291 0x0012 //TX_MIN_GAIN_S_2 +292 0x0010 //TX_MIN_GAIN_S_3 +293 0x0012 //TX_MIN_GAIN_S_4 +294 0x0012 //TX_MIN_GAIN_S_5 +295 0x0012 //TX_MIN_GAIN_S_6 +296 0x0012 //TX_MIN_GAIN_S_7 +297 0x6000 //TX_NMOS_SUP +298 0x0000 //TX_NS_MAX_PRI_SNR_TH +299 0x0000 //TX_NMOS_SUP_MENSA +300 0x7FFF //TX_SNRI_SUP_0 +301 0x6000 //TX_SNRI_SUP_1 +302 0x6000 //TX_SNRI_SUP_2 +303 0x6000 //TX_SNRI_SUP_3 +304 0x6000 //TX_SNRI_SUP_4 +305 0x6000 //TX_SNRI_SUP_5 +306 0x6000 //TX_SNRI_SUP_6 +307 0x6000 //TX_SNRI_SUP_7 +308 0x6000 //TX_THR_LFNS +309 0x0017 //TX_G_LFNS +310 0x09C4 //TX_GAIN0_NTH +311 0x000A //TX_MUSIC_MORENS +312 0x7FFF //TX_A_POST_FILT_0 +313 0x2000 //TX_A_POST_FILT_1 +314 0x4000 //TX_A_POST_FILT_S_0 +315 0x4000 //TX_A_POST_FILT_S_1 +316 0x4000 //TX_A_POST_FILT_S_2 +317 0x4000 //TX_A_POST_FILT_S_3 +318 0x4000 //TX_A_POST_FILT_S_4 +319 0x4000 //TX_A_POST_FILT_S_5 +320 0x5000 //TX_A_POST_FILT_S_6 +321 0x7000 //TX_A_POST_FILT_S_7 +322 0x1000 //TX_B_POST_FILT_0 +323 0x1000 //TX_B_POST_FILT_1 +324 0x2000 //TX_B_POST_FILT_2 +325 0x2000 //TX_B_POST_FILT_3 +326 0x2000 //TX_B_POST_FILT_4 +327 0x1000 //TX_B_POST_FILT_5 +328 0x3000 //TX_B_POST_FILT_6 +329 0x3000 //TX_B_POST_FILT_7 +330 0x1000 //TX_B_LESSCUT_RTO_S_0 +331 0x1000 //TX_B_LESSCUT_RTO_S_1 +332 0x1000 //TX_B_LESSCUT_RTO_S_2 +333 0x1000 //TX_B_LESSCUT_RTO_S_3 +334 0x1000 //TX_B_LESSCUT_RTO_S_4 +335 0x1000 //TX_B_LESSCUT_RTO_S_5 +336 0x1000 //TX_B_LESSCUT_RTO_S_6 +337 0x1000 //TX_B_LESSCUT_RTO_S_7 +338 0x7E14 //TX_LAMBDA_PFILT +339 0x7C29 //TX_LAMBDA_PFILT_S_0 +340 0x7C29 //TX_LAMBDA_PFILT_S_1 +341 0x7C29 //TX_LAMBDA_PFILT_S_2 +342 0x7C29 //TX_LAMBDA_PFILT_S_3 +343 0x7C29 //TX_LAMBDA_PFILT_S_4 +344 0x7C29 //TX_LAMBDA_PFILT_S_5 +345 0x7C29 //TX_LAMBDA_PFILT_S_6 +346 0x7C29 //TX_LAMBDA_PFILT_S_7 +347 0x07D0 //TX_K_PEPPER +348 0x0800 //TX_A_PEPPER +349 0x1D4C //TX_K_PEPPER_HF +350 0x0400 //TX_A_PEPPER_HF +351 0x0001 //TX_HMNC_BST_FLG +352 0x4000 //TX_HMNC_BST_THR +353 0x0800 //TX_DT_BINVAD_TH_0 +354 0x0800 //TX_DT_BINVAD_TH_1 +355 0x0800 //TX_DT_BINVAD_TH_2 +356 0x0800 //TX_DT_BINVAD_TH_3 +357 0x0000 //TX_DT_BINVAD_ENDF +358 0x1000 //TX_C_POST_FLT_DT +359 0x7FFF //TX_NS_B_POST_FLT_LESSCUT +360 0x0100 //TX_DT_BOOST +361 0x0000 //TX_BF_SGRAD_FLG +362 0x0005 //TX_BF_DVG_TH +363 0x001E //TX_SN_C_F +364 0x0000 //TX_K_APT +365 0x0001 //TX_NOISEDET +366 0x0190 //TX_NDETCT +367 0x000A //TX_NOISE_TH_0 +368 0x7FFF //TX_NOISE_TH_0_2 +369 0x7FFF //TX_NOISE_TH_0_3 +370 0x00C6 //TX_NOISE_TH_1 +371 0x0DAC //TX_NOISE_TH_2 +372 0x2260 //TX_NOISE_TH_3 +373 0x7080 //TX_NOISE_TH_4 +374 0x57E4 //TX_NOISE_TH_5 +375 0x4BD6 //TX_NOISE_TH_5_2 +376 0x0001 //TX_NOISE_TH_5_3 +377 0x4E20 //TX_NOISE_TH_5_4 +378 0x1194 //TX_NOISE_TH_6 +379 0x0014 //TX_MINENOISE_TH +380 0xD508 //TX_MORENS_TFMASK_TH +381 0x0001 //TX_DRC_QUIET_FLOOR +382 0x6D60 //TX_RATIODTL_CUT_TH +383 0x0DAC //TX_DT_CUT_K1 +384 0x00A5 //TX_OUT_ENER_S_TH_CLEAN +385 0x00A5 //TX_OUT_ENER_S_TH_LESSCLEAN +386 0x00A5 //TX_OUT_ENER_S_TH_NOISY +387 0x0029 //TX_OUT_ENER_TH_NOISE +388 0x0200 //TX_OUT_ENER_TH_SPEECH +389 0x2000 //TX_SN_NPB_GAIN +390 0x0000 //TX_NN_NPB_GAIN +391 0x3000 //TX_POST_MASK_SUP_HSNE +392 0x07D0 //TX_TAIL_DET_TH +393 0x4000 //TX_B_LESSCUT_RTO_WTA +394 0x0000 //TX_MEL_G_R +395 0x0080 //TX_SUPHIGH_TH +396 0x0000 //TX_MASK_G_R +397 0x0002 //TX_EXTRA_NS_L +398 0x1800 //TX_C_POST_FLT_MASK +399 0x7FFF //TX_A_POST_FLT_WNS +400 0x0148 //TX_MIN_G_LOW300HZ +401 0x0004 //TX_MAXLEVEL_CNG +402 0x00B4 //TX_STN_NOISE_TH +403 0x4000 //TX_POST_MASK_SUP +404 0x7FFF //TX_POST_MASK_ADJUST +405 0x00C8 //TX_NS_ENOISE_MIC0_TH +406 0x0014 //TX_MINENOISE_MIC0_TH +407 0x012C //TX_MINENOISE_MIC0_S_TH +408 0x2900 //TX_MIN_G_CTRL_SSNS +409 0x0800 //TX_METAL_RTO_THR +410 0x0FA0 //TX_NS_FP_K_METAL +411 0x3A98 //TX_NOISEDET_BOOST_TH +412 0x0FA0 //TX_NSMOOTH_TH +413 0x0000 //TX_NS_RESRV_8 +414 0x1800 //TX_RHO_UPB +415 0x2328 //TX_N_HOLD_HS +416 0x006E //TX_N_RHO_BFR0 +417 0x7FFF //TX_LAMBDA_ARSP_EST +418 0x0100 //TX_EXTRA_GAIN_MICBLOCK +419 0x0333 //TX_THR_STD_NSR +420 0x019A //TX_THR_STD_PLH +421 0x03E8 //TX_N_HOLD_STD +422 0x0066 //TX_THR_STD_RHO +423 0x2800 //TX_BF_RESET_THR_HS +424 0x0CCD //TX_SB_RTO_MEAN_TH +425 0x0300 //TX_SB_RHO_MEAN_TH_NTALK +426 0x2000 //TX_SB_RTO_MEAN_TH_ABN +427 0x2EE0 //TX_SB_RTO_MEAN_TH_RUB +428 0x0990 //TX_WTA_EN_RTO_TH +429 0x1400 //TX_TOP_ENER_TH_F +430 0x0100 //TX_DESIRED_TALK_HOLDT +431 0x0800 //TX_MIC_BLOCK_FACTOR +432 0x0000 //TX_NSEST_BFRLRNRDC +433 0x0000 //TX_THR_POST_FLT_HS +434 0x0010 //TX_HS_VAD_BIN +435 0x2666 //TX_THR_VAD_HS +436 0x2CCD //TX_MEAN_RTO_MIN_TH2 +437 0x0032 //TX_SILENCE_T +438 0x0000 //TX_A_POST_FLT_WTA +439 0x799A //TX_LAMBDA_PFLT_WTA +440 0x051E //TX_SB_RHO_MEAN2_TH +441 0x02F0 //TX_SB_RHO_MEAN3_TH +442 0x0000 //TX_HS_RESRV_4 +443 0x0000 //TX_HS_RESRV_5 +444 0x0001 //TX_DOA_VAD_THR_1 +445 0x003C //TX_DOA_VAD_THR_2 +446 0x0028 //TX_DOA_VAD_THR1_0 +447 0x0028 //TX_DOA_VAD_THR1_1 +448 0x0000 //TX_SRC_DOA_RNG_LOW_0A +449 0x001E //TX_SRC_DOA_RNG_HIGH_0A +450 0x005A //TX_DFLT_SRC_DOA_0A +451 0x0000 //TX_SRC_DOA_RNG_LOW_0B +452 0x0000 //TX_SRC_DOA_RNG_HIGH_0B +453 0x0000 //TX_DFLT_SRC_DOA_0B +454 0x0000 //TX_SRC_DOA_RNG_LOW_0C +455 0x0000 //TX_SRC_DOA_RNG_HIGH_0C +456 0x0000 //TX_DFLT_SRC_DOA_0C +457 0x0000 //TX_SRC_DOA_RNG_LOW_0D +458 0x0000 //TX_SRC_DOA_RNG_HIGH_0D +459 0x0000 //TX_DFLT_SRC_DOA_0D +460 0x0000 //TX_SRC_DOA_RNG_LOW_1A +461 0x00B4 //TX_SRC_DOA_RNG_HIGH_1A +462 0x005A //TX_DFLT_SRC_DOA_1A +463 0x0000 //TX_SRC_DOA_RNG_LOW_1B +464 0x00B4 //TX_SRC_DOA_RNG_HIGH_1B +465 0x005A //TX_DFLT_SRC_DOA_1B +466 0x0000 //TX_SRC_DOA_RNG_LOW_1C +467 0x00B4 //TX_SRC_DOA_RNG_HIGH_1C +468 0x005A //TX_DFLT_SRC_DOA_1C +469 0x0000 //TX_SRC_DOA_RNG_LOW_1D +470 0x00B4 //TX_SRC_DOA_RNG_HIGH_1D +471 0x005A //TX_DFLT_SRC_DOA_1D +472 0x0100 //TX_BF_HOLDOFF_T +473 0x7FFF //TX_DOA_COST_FACTOR +474 0x0D9A //TX_MAINTOREFR_TH0 +475 0x071C //TX_DOA_TRK_THR +476 0x012C //TX_DOA_TRACK_HT +477 0x0200 //TX_N1_HOLD_HF +478 0x0100 //TX_N2_HOLD_HF +479 0x2A3D //TX_BF_RESET_THR_HF +480 0x7333 //TX_DOA_SMOOTH +481 0x0800 //TX_MU_BF +482 0x0800 //TX_BF_MU_LF_B2 +483 0x0040 //TX_BF_FC_END_BIN_B2 +484 0x0020 //TX_BF_FC_END_BIN +485 0x0000 //TX_HF_RESRV_25 +486 0x0000 //TX_HF_RESRV_26 +487 0x0007 //TX_N_DOA_SEED +488 0x0001 //TX_FINE_DOA_SEARCH_FLG +489 0x0000 //TX_HF_RESRV_27 +490 0x038E //TX_DLT_SRC_DOA_RNG +491 0x0200 //TX_BF_MU_LF +492 0x0000 //TX_DFLT_SRC_LOC_0 +493 0x7FFF //TX_DFLT_SRC_LOC_1 +494 0x0000 //TX_DFLT_SRC_LOC_2 +495 0x038E //TX_DOA_TRACK_VADTH +496 0x0000 //TX_DOA_TRACK_NEW +497 0x0300 //TX_NOR_OFF_THR +498 0x7C00 //TX_MORE_ON_700HZ_THR +499 0x2000 //TX_MU_BF_ADPT_NS +500 0x0000 //TX_ADAPT_LEN +501 0x6666 //TX_MORE_SNS +502 0x0000 //TX_NOR_OFF_TH1 +503 0x0000 //TX_WIDE_MASK_TH +504 0xD333 //TX_SUBSNRATIOHIGH4MEANBCK_THR +505 0x6000 //TX_C_POST_FLT_CUT +506 0x2000 //TX_RADIODTLV +507 0x0320 //TX_POWER_LINEIN_TH +508 0x0014 //TX_FE_VADCOUNT_TH_FC +509 0x0000 //TX_ECHO_SUPP_FC +510 0x0C80 //TX_ECHO_TH +511 0x6666 //TX_MIC_TO_BFGAIN +512 0x0000 //TX_MICTOBFGAIN0 +513 0x0000 //TX_FASTMUE_TH +514 0x2CCC //TX_DEREVERB_LF_MU +515 0x3200 //TX_DEREVERB_HF_MU +516 0x0007 //TX_DEREVERB_DELAY +517 0x0004 //TX_DEREVERB_COEF_LEN +518 0x0003 //TX_DEREVERB_DNR +519 0x0000 //TX_DEREVERB_ALPHA +520 0x0000 //TX_DEREVERB_BETA +521 0x3A98 //TX_GSC_RTOL_TH +522 0x3A98 //TX_GSC_RTOH_TH +523 0x7E2C //TX_WIDE2_MEANHTH +524 0x0000 //TX_DR_RESRV_5 +525 0x0000 //TX_DR_RESRV_6 +526 0x0000 //TX_DR_RESRV_7 +527 0x0000 //TX_DR_RESRV_8 +528 0x1333 //TX_WIND_MARK_TH +529 0x399A //TX_CORR_THR +530 0x0004 //TX_SNR_THR +531 0x0010 //TX_ENGY_THR +532 0x1770 //TX_CORR_HIGH_TH +533 0x6000 //TX_ENGY_THR_2 +534 0x3400 //TX_MEAN_RTO_THR +535 0x0028 //TX_WNS_ENOISE_MIC0_TH +536 0x3000 //TX_RATIOMICL_TH +537 0x7FFF //TX_CALIG_HS +538 0x0000 //TX_LVL_CTRL +539 0x0010 //TX_WIND_SUPRTO +540 0x0014 //TX_WNS_MIN_G +541 0x0600 //TX_WNS_B_POST_FLT +542 0x3000 //TX_RATIOMICH_TH +543 0xD120 //TX_WIND_INBEAM_L_TH +544 0x0FA0 //TX_WIND_INBEAM_H_TH +545 0x2000 //TX_WNS_RESRV_0 +546 0x59D8 //TX_WNS_RESRV_1 +547 0x0200 //TX_WNS_RESRV_2 +548 0x0000 //TX_WNS_RESRV_3 +549 0x0000 //TX_WNS_RESRV_4 +550 0x0000 //TX_WNS_RESRV_5 +551 0x0000 //TX_WNS_RESRV_6 +552 0x0000 //TX_PB_B_POST_FLT_LESSCUT +553 0x0070 //TX_BF_LESSCUT_BBIN +554 0x0070 //TX_BF_LESSCUT_EBIN +555 0x0010 //TX_POSTBFB0 +556 0x0070 //TX_POSTBFB +557 0x00B0 //TX_POSTBFE +558 0x0E66 //TX_SPEECH_SNR_TH +559 0x0050 //TX_PB_MAX_PRI_SNR_TH +560 0x770A //TX_MAX_PRI_SNR_TH_L +561 0x0000 //TX_PFGAIN +562 0x0000 //TX_MAINTOREFR_TH +563 0x0000 //TX_SAM_MARK +564 0x0000 //TX_PB_RESRV_0 +565 0x0000 //TX_PB_RESRV_1 +566 0x0030 //TX_FDEQ_SUBNUM +567 0x5C54 //TX_FDEQ_GAIN_0 +568 0x5048 //TX_FDEQ_GAIN_1 +569 0x4C4C //TX_FDEQ_GAIN_2 +570 0x494D //TX_FDEQ_GAIN_3 +571 0x4442 //TX_FDEQ_GAIN_4 +572 0x4448 //TX_FDEQ_GAIN_5 +573 0x4C53 //TX_FDEQ_GAIN_6 +574 0x6244 //TX_FDEQ_GAIN_7 +575 0x4348 //TX_FDEQ_GAIN_8 +576 0x4848 //TX_FDEQ_GAIN_9 +577 0x4A49 //TX_FDEQ_GAIN_10 +578 0x4E4A //TX_FDEQ_GAIN_11 +579 0x4840 //TX_FDEQ_GAIN_12 +580 0x4040 //TX_FDEQ_GAIN_13 +581 0x4054 //TX_FDEQ_GAIN_14 +582 0x687A //TX_FDEQ_GAIN_15 +583 0x4848 //TX_FDEQ_GAIN_16 +584 0x4848 //TX_FDEQ_GAIN_17 +585 0x4848 //TX_FDEQ_GAIN_18 +586 0x4848 //TX_FDEQ_GAIN_19 +587 0x4848 //TX_FDEQ_GAIN_20 +588 0x4848 //TX_FDEQ_GAIN_21 +589 0x4848 //TX_FDEQ_GAIN_22 +590 0x4848 //TX_FDEQ_GAIN_23 +591 0x0202 //TX_FDEQ_BIN_0 +592 0x0104 //TX_FDEQ_BIN_1 +593 0x0502 //TX_FDEQ_BIN_2 +594 0x0202 //TX_FDEQ_BIN_3 +595 0x0504 //TX_FDEQ_BIN_4 +596 0x0708 //TX_FDEQ_BIN_5 +597 0x0808 //TX_FDEQ_BIN_6 +598 0x050E //TX_FDEQ_BIN_7 +599 0x0B0C //TX_FDEQ_BIN_8 +600 0x0F0F //TX_FDEQ_BIN_9 +601 0x0E0D //TX_FDEQ_BIN_10 +602 0x0F28 //TX_FDEQ_BIN_11 +603 0x111B //TX_FDEQ_BIN_12 +604 0x291E //TX_FDEQ_BIN_13 +605 0x1E10 //TX_FDEQ_BIN_14 +606 0x1810 //TX_FDEQ_BIN_15 +607 0x1021 //TX_FDEQ_BIN_16 +608 0x1000 //TX_FDEQ_BIN_17 +609 0x0000 //TX_FDEQ_BIN_18 +610 0x0000 //TX_FDEQ_BIN_19 +611 0x0000 //TX_FDEQ_BIN_20 +612 0x0000 //TX_FDEQ_BIN_21 +613 0x0000 //TX_FDEQ_BIN_22 +614 0x0000 //TX_FDEQ_BIN_23 +615 0x0000 //TX_FDEQ_PADDING +616 0x0030 //TX_PREEQ_SUBNUM_MIC0 +617 0x4848 //TX_PREEQ_GAIN_MIC0_0 +618 0x4848 //TX_PREEQ_GAIN_MIC0_1 +619 0x4848 //TX_PREEQ_GAIN_MIC0_2 +620 0x4848 //TX_PREEQ_GAIN_MIC0_3 +621 0x4848 //TX_PREEQ_GAIN_MIC0_4 +622 0x4848 //TX_PREEQ_GAIN_MIC0_5 +623 0x4848 //TX_PREEQ_GAIN_MIC0_6 +624 0x4848 //TX_PREEQ_GAIN_MIC0_7 +625 0x4848 //TX_PREEQ_GAIN_MIC0_8 +626 0x4848 //TX_PREEQ_GAIN_MIC0_9 +627 0x4848 //TX_PREEQ_GAIN_MIC0_10 +628 0x4848 //TX_PREEQ_GAIN_MIC0_11 +629 0x4848 //TX_PREEQ_GAIN_MIC0_12 +630 0x4848 //TX_PREEQ_GAIN_MIC0_13 +631 0x4848 //TX_PREEQ_GAIN_MIC0_14 +632 0x4848 //TX_PREEQ_GAIN_MIC0_15 +633 0x4848 //TX_PREEQ_GAIN_MIC0_16 +634 0x4848 //TX_PREEQ_GAIN_MIC0_17 +635 0x4848 //TX_PREEQ_GAIN_MIC0_18 +636 0x4848 //TX_PREEQ_GAIN_MIC0_19 +637 0x4848 //TX_PREEQ_GAIN_MIC0_20 +638 0x4848 //TX_PREEQ_GAIN_MIC0_21 +639 0x4848 //TX_PREEQ_GAIN_MIC0_22 +640 0x4848 //TX_PREEQ_GAIN_MIC0_23 +641 0x251A //TX_PREEQ_BIN_MIC0_0 +642 0x0F0F //TX_PREEQ_BIN_MIC0_1 +643 0x0C0C //TX_PREEQ_BIN_MIC0_2 +644 0x0C0F //TX_PREEQ_BIN_MIC0_3 +645 0x0F0F //TX_PREEQ_BIN_MIC0_4 +646 0x0F09 //TX_PREEQ_BIN_MIC0_5 +647 0x0909 //TX_PREEQ_BIN_MIC0_6 +648 0x0908 //TX_PREEQ_BIN_MIC0_7 +649 0x070F //TX_PREEQ_BIN_MIC0_8 +650 0x1F08 //TX_PREEQ_BIN_MIC0_9 +651 0x0808 //TX_PREEQ_BIN_MIC0_10 +652 0x0920 //TX_PREEQ_BIN_MIC0_11 +653 0x2020 //TX_PREEQ_BIN_MIC0_12 +654 0x2021 //TX_PREEQ_BIN_MIC0_13 +655 0x0000 //TX_PREEQ_BIN_MIC0_14 +656 0x0000 //TX_PREEQ_BIN_MIC0_15 +657 0x0000 //TX_PREEQ_BIN_MIC0_16 +658 0x0000 //TX_PREEQ_BIN_MIC0_17 +659 0x0000 //TX_PREEQ_BIN_MIC0_18 +660 0x0000 //TX_PREEQ_BIN_MIC0_19 +661 0x0000 //TX_PREEQ_BIN_MIC0_20 +662 0x0000 //TX_PREEQ_BIN_MIC0_21 +663 0x0000 //TX_PREEQ_BIN_MIC0_22 +664 0x0000 //TX_PREEQ_BIN_MIC0_23 +665 0x0030 //TX_PREEQ_SUBNUM_MIC1 +666 0x4848 //TX_PREEQ_GAIN_MIC1_0 +667 0x4848 //TX_PREEQ_GAIN_MIC1_1 +668 0x4848 //TX_PREEQ_GAIN_MIC1_2 +669 0x4848 //TX_PREEQ_GAIN_MIC1_3 +670 0x4848 //TX_PREEQ_GAIN_MIC1_4 +671 0x4848 //TX_PREEQ_GAIN_MIC1_5 +672 0x494A //TX_PREEQ_GAIN_MIC1_6 +673 0x4B4C //TX_PREEQ_GAIN_MIC1_7 +674 0x4D4E //TX_PREEQ_GAIN_MIC1_8 +675 0x4F52 //TX_PREEQ_GAIN_MIC1_9 +676 0x5355 //TX_PREEQ_GAIN_MIC1_10 +677 0x585C //TX_PREEQ_GAIN_MIC1_11 +678 0x616A //TX_PREEQ_GAIN_MIC1_12 +679 0x726E //TX_PREEQ_GAIN_MIC1_13 +680 0x5C48 //TX_PREEQ_GAIN_MIC1_14 +681 0x3B38 //TX_PREEQ_GAIN_MIC1_15 +682 0x4848 //TX_PREEQ_GAIN_MIC1_16 +683 0x4848 //TX_PREEQ_GAIN_MIC1_17 +684 0x4848 //TX_PREEQ_GAIN_MIC1_18 +685 0x4848 //TX_PREEQ_GAIN_MIC1_19 +686 0x4848 //TX_PREEQ_GAIN_MIC1_20 +687 0x4848 //TX_PREEQ_GAIN_MIC1_21 +688 0x4848 //TX_PREEQ_GAIN_MIC1_22 +689 0x4848 //TX_PREEQ_GAIN_MIC1_23 +690 0x0202 //TX_PREEQ_BIN_MIC1_0 +691 0x0203 //TX_PREEQ_BIN_MIC1_1 +692 0x0303 //TX_PREEQ_BIN_MIC1_2 +693 0x0304 //TX_PREEQ_BIN_MIC1_3 +694 0x0405 //TX_PREEQ_BIN_MIC1_4 +695 0x0506 //TX_PREEQ_BIN_MIC1_5 +696 0x0708 //TX_PREEQ_BIN_MIC1_6 +697 0x090A //TX_PREEQ_BIN_MIC1_7 +698 0x0B0C //TX_PREEQ_BIN_MIC1_8 +699 0x0D0E //TX_PREEQ_BIN_MIC1_9 +700 0x1013 //TX_PREEQ_BIN_MIC1_10 +701 0x1719 //TX_PREEQ_BIN_MIC1_11 +702 0x1B1E //TX_PREEQ_BIN_MIC1_12 +703 0x1E1E //TX_PREEQ_BIN_MIC1_13 +704 0x1E28 //TX_PREEQ_BIN_MIC1_14 +705 0x3042 //TX_PREEQ_BIN_MIC1_15 +706 0x0000 //TX_PREEQ_BIN_MIC1_16 +707 0x0000 //TX_PREEQ_BIN_MIC1_17 +708 0x0000 //TX_PREEQ_BIN_MIC1_18 +709 0x0000 //TX_PREEQ_BIN_MIC1_19 +710 0x0000 //TX_PREEQ_BIN_MIC1_20 +711 0x0000 //TX_PREEQ_BIN_MIC1_21 +712 0x0000 //TX_PREEQ_BIN_MIC1_22 +713 0x0000 //TX_PREEQ_BIN_MIC1_23 +714 0x0030 //TX_PREEQ_SUBNUM_MIC2 +715 0x4848 //TX_PREEQ_GAIN_MIC2_0 +716 0x4848 //TX_PREEQ_GAIN_MIC2_1 +717 0x4848 //TX_PREEQ_GAIN_MIC2_2 +718 0x4848 //TX_PREEQ_GAIN_MIC2_3 +719 0x4848 //TX_PREEQ_GAIN_MIC2_4 +720 0x4848 //TX_PREEQ_GAIN_MIC2_5 +721 0x4848 //TX_PREEQ_GAIN_MIC2_6 +722 0x4848 //TX_PREEQ_GAIN_MIC2_7 +723 0x4848 //TX_PREEQ_GAIN_MIC2_8 +724 0x4848 //TX_PREEQ_GAIN_MIC2_9 +725 0x4848 //TX_PREEQ_GAIN_MIC2_10 +726 0x4848 //TX_PREEQ_GAIN_MIC2_11 +727 0x4848 //TX_PREEQ_GAIN_MIC2_12 +728 0x4848 //TX_PREEQ_GAIN_MIC2_13 +729 0x4848 //TX_PREEQ_GAIN_MIC2_14 +730 0x4848 //TX_PREEQ_GAIN_MIC2_15 +731 0x4848 //TX_PREEQ_GAIN_MIC2_16 +732 0x4848 //TX_PREEQ_GAIN_MIC2_17 +733 0x4848 //TX_PREEQ_GAIN_MIC2_18 +734 0x4848 //TX_PREEQ_GAIN_MIC2_19 +735 0x4848 //TX_PREEQ_GAIN_MIC2_20 +736 0x4848 //TX_PREEQ_GAIN_MIC2_21 +737 0x4848 //TX_PREEQ_GAIN_MIC2_22 +738 0x4848 //TX_PREEQ_GAIN_MIC2_23 +739 0x0608 //TX_PREEQ_BIN_MIC2_0 +740 0x0808 //TX_PREEQ_BIN_MIC2_1 +741 0x0808 //TX_PREEQ_BIN_MIC2_2 +742 0x0808 //TX_PREEQ_BIN_MIC2_3 +743 0x0808 //TX_PREEQ_BIN_MIC2_4 +744 0x0808 //TX_PREEQ_BIN_MIC2_5 +745 0x0808 //TX_PREEQ_BIN_MIC2_6 +746 0x0808 //TX_PREEQ_BIN_MIC2_7 +747 0x0808 //TX_PREEQ_BIN_MIC2_8 +748 0x0808 //TX_PREEQ_BIN_MIC2_9 +749 0x0808 //TX_PREEQ_BIN_MIC2_10 +750 0x0808 //TX_PREEQ_BIN_MIC2_11 +751 0x0808 //TX_PREEQ_BIN_MIC2_12 +752 0x0808 //TX_PREEQ_BIN_MIC2_13 +753 0x0808 //TX_PREEQ_BIN_MIC2_14 +754 0x0200 //TX_PREEQ_BIN_MIC2_15 +755 0x0000 //TX_PREEQ_BIN_MIC2_16 +756 0x0000 //TX_PREEQ_BIN_MIC2_17 +757 0x0000 //TX_PREEQ_BIN_MIC2_18 +758 0x0000 //TX_PREEQ_BIN_MIC2_19 +759 0x0000 //TX_PREEQ_BIN_MIC2_20 +760 0x0000 //TX_PREEQ_BIN_MIC2_21 +761 0x0000 //TX_PREEQ_BIN_MIC2_22 +762 0x0000 //TX_PREEQ_BIN_MIC2_23 +763 0x0006 //TX_MASKING_ABILITY +764 0x0800 //TX_NND_WEIGHT +765 0x0050 //TX_MIC_CALIBRATION_0 +766 0x0056 //TX_MIC_CALIBRATION_1 +767 0x0050 //TX_MIC_CALIBRATION_2 +768 0x0050 //TX_MIC_CALIBRATION_3 +769 0x0046 //TX_MIC_PWR_BIAS_0 +770 0x0042 //TX_MIC_PWR_BIAS_1 +771 0x0046 //TX_MIC_PWR_BIAS_2 +772 0x0046 //TX_MIC_PWR_BIAS_3 +773 0x0000 //TX_GAIN_LIMIT_0 +774 0x0006 //TX_GAIN_LIMIT_1 +775 0x0000 //TX_GAIN_LIMIT_2 +776 0x0000 //TX_GAIN_LIMIT_3 +777 0x7F5B //TX_BVE_NOVAD0_ALPHADOWN +778 0x7FDE //TX_BVE_VAD0_ALPHAUP +779 0x7F3A //TX_BVE_VAD0_ALPHADOWN +780 0x2000 //TX_BVE_GAINWEIGHT_NOFEVADLI +781 0x7F5B //TX_BVE_FEVADLI_ALPHA +782 0x7F19 //TX_BVE_NOVAD0_ALPHAUP +783 0x1000 //TX_TDDRC_ALPHA_UP_01 +784 0x1000 //TX_TDDRC_ALPHA_UP_02 +785 0x1000 //TX_TDDRC_ALPHA_UP_03 +786 0x1000 //TX_TDDRC_ALPHA_UP_04 +787 0x7EB8 //TX_TDDRC_ALPHA_DWN_01 +788 0x7EB8 //TX_TDDRC_ALPHA_DWN_02 +789 0x7EB8 //TX_TDDRC_ALPHA_DWN_03 +790 0x7EB8 //TX_TDDRC_ALPHA_DWN_04 +791 0x7FFF //TX_TDDRC_TD_DRC_LIMIT +792 0x0800 //TX_TDDRC_POST_LIMIT_GAIN +793 0x0000 //TX_TDDRC_RESRV_0 +794 0x0000 //TX_TDDRC_RESRV_1 +795 0x0018 //TX_FDDRC_BAND_MARGIN_0 +796 0x0030 //TX_FDDRC_BAND_MARGIN_1 +797 0x0050 //TX_FDDRC_BAND_MARGIN_2 +798 0x0080 //TX_FDDRC_BAND_MARGIN_3 +799 0x0007 //TX_FDDRC_BLOCK_EXP +800 0x5000 //TX_FDDRC_THRD_2_0 +801 0x5000 //TX_FDDRC_THRD_2_1 +802 0x5000 //TX_FDDRC_THRD_2_2 +803 0x5000 //TX_FDDRC_THRD_2_3 +804 0x6400 //TX_FDDRC_THRD_3_0 +805 0x6400 //TX_FDDRC_THRD_3_1 +806 0x6400 //TX_FDDRC_THRD_3_2 +807 0x6400 //TX_FDDRC_THRD_3_3 +808 0x2000 //TX_FDDRC_SLANT_0_0 +809 0x2000 //TX_FDDRC_SLANT_0_1 +810 0x2000 //TX_FDDRC_SLANT_0_2 +811 0x2000 //TX_FDDRC_SLANT_0_3 +812 0x5333 //TX_FDDRC_SLANT_1_0 +813 0x5333 //TX_FDDRC_SLANT_1_1 +814 0x5333 //TX_FDDRC_SLANT_1_2 +815 0x5333 //TX_FDDRC_SLANT_1_3 +816 0x0010 //TX_DEADMIC_SILENCE_TH +817 0x0600 //TX_MIC_DEGRADE_TH +818 0x0078 //TX_DEADMIC_CNT +819 0x0078 //TX_MIC_DEGRADE_CNT +820 0x0000 //TX_FDDRC_RESRV_4 +821 0x0000 //TX_FDDRC_RESRV_5 +822 0x0000 //TX_FDDRC_RESRV_6 +823 0x7FFF //TX_KS_NOISEPASTE_FACTOR +824 0x0001 //TX_KS_CONFIG +825 0x7FFF //TX_KS_GAIN_MIN +826 0x0000 //TX_KS_RESRV_0 +827 0x0000 //TX_KS_RESRV_1 +828 0x0000 //TX_KS_RESRV_2 +829 0x7C00 //TX_LAMBDA_PKA_FP +830 0x2000 //TX_TPKA_FP +831 0x0080 //TX_MIN_G_FP +832 0x2000 //TX_MAX_G_FP +833 0x0FA0 //TX_FFP_FP_K_METAL +834 0x4000 //TX_A_POST_FLT_FP +835 0x0F5C //TX_RTO_OUTBEAM_TH +836 0x4CCD //TX_TPKA_FP_THD +837 0x0000 //TX_MAX_G_FP_BLK +838 0x0000 //TX_FFP_FADEIN +839 0x0000 //TX_FFP_FADEOUT +840 0x0000 //TX_WHISPERCTH +841 0x0000 //TX_WHISPERHOLDT +842 0x0000 //TX_WHISP_ENTHH +843 0x0000 //TX_WHISP_ENTHL +844 0x0000 //TX_WHISP_RTOTH +845 0x0000 //TX_WHISP_RTOTH2 +846 0x0096 //TX_MUTE_PERIOD +847 0x0000 //TX_FADE_IN_PERIOD +848 0x0100 //TX_FFP_RESRV_2 +849 0x0020 //TX_FFP_RESRV_3 +850 0x0000 //TX_FFP_RESRV_4 +851 0x0000 //TX_FFP_RESRV_5 +852 0x0000 //TX_FFP_RESRV_6 +853 0x0002 //TX_FILTINDX +854 0x0002 //TX_TDDRC_THRD_0 +855 0x0003 //TX_TDDRC_THRD_1 +856 0x1500 //TX_TDDRC_THRD_2 +857 0x1500 //TX_TDDRC_THRD_3 +858 0x3000 //TX_TDDRC_SLANT_0 +859 0x6E00 //TX_TDDRC_SLANT_1 +860 0x1000 //TX_TDDRC_ALPHA_UP_00 +861 0x7EB8 //TX_TDDRC_ALPHA_DWN_00 +862 0x0000 //TX_TDDRC_HMNC_FLAG +863 0x199A //TX_TDDRC_HMNC_GAIN +864 0x0000 //TX_TDDRC_SMT_FLAG +865 0x0CCD //TX_TDDRC_SMT_W +866 0x0650 //TX_TDDRC_DRC_GAIN +867 0x7FFF //TX_TDDRC_LMT_THRD +868 0x0000 //TX_TDDRC_LMT_ALPHA +869 0x0000 //TX_TFMASKLTH +870 0x0000 //TX_TFMASKLTHL +871 0x0CCD //TX_TFMASKHTH +872 0xECCD //TX_TFMASKLTH_BINVAD +873 0xFCCD //TX_TFMASKLTH_NS_EST +874 0xF800 //TX_TFMASKLTH_DOA +875 0x0CCD //TX_TFMASKTH_BLESSCUT +876 0x1000 //TX_B_LESSCUT_RTO_MASK +877 0x2000 //TX_SB_RHO_MEAN_TH_ABN +878 0x2000 //TX_B_POST_FLT_MASK +879 0x0000 //TX_B_POST_FLT_MASK1 +880 0x6333 //TX_GAIN_WIND_MASK +881 0x0000 //TX_TFMASK_BFSTRICT_MUSIC +882 0x0000 //TX_TFMASK_BFSTRICT_NOMUSIC +883 0x7333 //TX_FASTNS_OUTIN_TH +884 0x0CCD //TX_FASTNS_TFMASK_TH +885 0x0CCD //TX_FASTNS_TFMASKBIN_TH1 +886 0x0CCD //TX_FASTNS_TFMASKBIN_TH2 +887 0x0CCD //TX_FASTNS_TFMASKBIN_TH3 +888 0x0028 //TX_FASTNS_ARSPC_TH +889 0xC000 //TX_FASTNS_MASK5_TH +890 0x0810 //TX_POSTSSA_MIN_G_VR_MASK +891 0x1000 //TX_A_LESSCUT_RTO_MASK +892 0x1770 //TX_FASTNS_NOISETH +893 0xC000 //TX_FASTNS_SSA_THLFL +894 0xC000 //TX_FASTNS_SSA_THHFL +895 0xCCCC //TX_FASTNS_SSA_THLFH +896 0xD999 //TX_FASTNS_SSA_THHFH +897 0x2339 //TX_SENDFUNC_REG_MICMUTE +898 0x0021 //TX_SENDFUNC_REG_MICMUTE1 +899 0x02BC //TX_MICMUTE_RATIO_THR +900 0x0140 //TX_MICMUTE_AMP_THR +901 0x0004 //TX_MICMUTE_HPF_IND +902 0x00C0 //TX_MICMUTE_LOG_EYR_TH +903 0x0008 //TX_MICMUTE_CVG_TIME +904 0x0008 //TX_MICMUTE_RELEASE_TIME +905 0x01FE //TX_MIC_VOLUME_MIC0MUTE +906 0x0020 //TX_MICMUTE_EPD_OFFSET_0 +907 0x001E //TX_MICMUTE_FRQ_AEC_L +908 0x7999 //TX_MICMUTE_EAD_THR +909 0x7FFF //TX_MICMUTE_LAMBDA_CB_NLE +910 0x7FFF //TX_MICMUTE_LAMBDA_RE_EST +911 0x4000 //TX_DTD_THR1_MICMUTE_0 +912 0x7000 //TX_DTD_THR1_MICMUTE_1 +913 0x7FFF //TX_DTD_THR1_MICMUTE_2 +914 0x7FFF //TX_DTD_THR1_MICMUTE_3 +915 0x6CCC //TX_DTD_THR2_MICMUTE_0 +916 0x0400 //TX_MICMUTE_MIN_EQ_RE_EST_0 +917 0x0400 //TX_MICMUTE_MIN_EQ_RE_EST_1 +918 0x1000 //TX_MICMUTE_MIN_EQ_RE_EST_2 +919 0x7FFF //TX_MICMUTE_MIN_EQ_RE_EST_3 +920 0x7FFF //TX_MICMUTE_MIN_EQ_RE_EST_4 +921 0x4000 //TX_MICMUTE_C_POST_FLT +922 0x03E8 //TX_MICMUTE_DT_CUT_K +923 0x0001 //TX_MICMUTE_DT_CUT_THR +924 0x03E8 //TX_MICMUTE_DT_CUT_K2 +925 0x0001 //TX_MICMUTE_DT_CUT_THR2 +926 0x0064 //TX_MICMUTE_DT2_HOLD_N +927 0x1000 //TX_MICMUTE_RATIODTH_THCUT +928 0x1000 //TX_MICMUTE_B_POST_FLT_ECHOL +929 0x7FFF //TX_MICMUTE_B_POST_FLT_ECHOH +930 0x0400 //TX_MICMUTE_C_POST_FLT_MASK +931 0x7999 //TX_MICMUTE_RATIODTL_CUT_TH +932 0x0258 //TX_MICMUTE_DT_CUT_K1 +933 0x0800 //TX_MICMUTE_N2_SN_EST +934 0xFC00 //TX_MICMUTE_THR_SN_EST_0 +935 0x001C //TX_MICMUTE_MIN_G_CTRL_0 +936 0x6000 //TX_MICMUTE_A_POST_FILT_S_0 +937 0x7000 //TX_MICMUTE_B_POST_FILT_0 +938 0x2710 //TX_MIC1RUB_AMP_THR +939 0x0010 //TX_MIC1MUTE_RATIO_THR +940 0x0450 //TX_MIC1MUTE_AMP_THR +941 0x0008 //TX_MIC1MUTE_CVG_TIME +942 0x0008 //TX_MIC1MUTE_RELEASE_TIME +943 0x0000 //TX_AMS_RESRV_01 +944 0x0000 //TX_AMS_RESRV_02 +945 0x0000 //TX_AMS_RESRV_03 +946 0x0000 //TX_AMS_RESRV_04 +947 0x0000 //TX_AMS_RESRV_05 +948 0x0000 //TX_AMS_RESRV_06 +949 0x0000 //TX_AMS_RESRV_07 +950 0x0000 //TX_AMS_RESRV_08 +951 0x0000 //TX_AMS_RESRV_09 +952 0x0000 //TX_AMS_RESRV_10 +953 0x0000 //TX_AMS_RESRV_11 +954 0x0000 //TX_AMS_RESRV_12 +955 0x0000 //TX_AMS_RESRV_13 +956 0x0000 //TX_AMS_RESRV_14 +957 0x0000 //TX_AMS_RESRV_15 +958 0x0000 //TX_AMS_RESRV_16 +959 0x0000 //TX_AMS_RESRV_17 +960 0x0000 //TX_AMS_RESRV_18 +961 0x0000 //TX_AMS_RESRV_19 +#RX +0 0x000C //RX_RECVFUNC_MODE_0 +1 0x0000 //RX_RECVFUNC_MODE_1 +2 0x0003 //RX_SAMPLINGFREQ_SIG +3 0x0003 //RX_SAMPLINGFREQ_PROC +4 0x000A //RX_FRAME_SZ +5 0x0000 //RX_DELAY_OPT +6 0x1000 //RX_TDDRC_ALPHA_UP_1 +7 0x1000 //RX_TDDRC_ALPHA_UP_2 +8 0x1000 //RX_TDDRC_ALPHA_UP_3 +9 0x1000 //RX_TDDRC_ALPHA_UP_4 +10 0x0800 //RX_PGA +11 0x7FFF //RX_A_HP +12 0x4000 //RX_B_PE +13 0x5800 //RX_THR_PITCH_DET_0 +14 0x5000 //RX_THR_PITCH_DET_1 +15 0x4000 //RX_THR_PITCH_DET_2 +16 0x0008 //RX_PITCH_BFR_LEN +17 0x0003 //RX_SBD_PITCH_DET +18 0x0100 //RX_PP_RESRV_0 +19 0x0020 //RX_PP_RESRV_1 +20 0x0600 //RX_N_SN_EST +21 0x000C //RX_N2_SN_EST +22 0x000F //RX_NS_LVL_CTRL +23 0xF800 //RX_THR_SN_EST +24 0x7E00 //RX_LAMBDA_PFILT +25 0x000A //RX_FENS_RESRV_0 +26 0x0190 //RX_FENS_RESRV_1 +27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +30 0x0002 //RX_EXTRA_NS_L +31 0x0800 //RX_EXTRA_NS_A +32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +33 0x7000 //RX_TDDRC_LIMITER_THRD +34 0x0800 //RX_TDDRC_LIMITER_GAIN +35 0x199A //RX_A_POST_FLT +36 0x0000 //RX_LMT_THRD +37 0x4000 //RX_LMT_ALPHA +38 0x0030 //RX_FDEQ_SUBNUM +39 0x4848 //RX_FDEQ_GAIN_0 +40 0x4848 //RX_FDEQ_GAIN_1 +41 0x4844 //RX_FDEQ_GAIN_2 +42 0x4B4D //RX_FDEQ_GAIN_3 +43 0x4E50 //RX_FDEQ_GAIN_4 +44 0x5254 //RX_FDEQ_GAIN_5 +45 0x5658 //RX_FDEQ_GAIN_6 +46 0x5C60 //RX_FDEQ_GAIN_7 +47 0x6468 //RX_FDEQ_GAIN_8 +48 0x6C70 //RX_FDEQ_GAIN_9 +49 0x7474 //RX_FDEQ_GAIN_10 +50 0x7474 //RX_FDEQ_GAIN_11 +51 0x7474 //RX_FDEQ_GAIN_12 +52 0x7474 //RX_FDEQ_GAIN_13 +53 0x7474 //RX_FDEQ_GAIN_14 +54 0x7474 //RX_FDEQ_GAIN_15 +55 0x4848 //RX_FDEQ_GAIN_16 +56 0x4848 //RX_FDEQ_GAIN_17 +57 0x4848 //RX_FDEQ_GAIN_18 +58 0x4848 //RX_FDEQ_GAIN_19 +59 0x4848 //RX_FDEQ_GAIN_20 +60 0x4848 //RX_FDEQ_GAIN_21 +61 0x4848 //RX_FDEQ_GAIN_22 +62 0x4848 //RX_FDEQ_GAIN_23 +63 0x0202 //RX_FDEQ_BIN_0 +64 0x0203 //RX_FDEQ_BIN_1 +65 0x0402 //RX_FDEQ_BIN_2 +66 0x0304 //RX_FDEQ_BIN_3 +67 0x0405 //RX_FDEQ_BIN_4 +68 0x0506 //RX_FDEQ_BIN_5 +69 0x0708 //RX_FDEQ_BIN_6 +70 0x090A //RX_FDEQ_BIN_7 +71 0x0B0C //RX_FDEQ_BIN_8 +72 0x0D0E //RX_FDEQ_BIN_9 +73 0x1214 //RX_FDEQ_BIN_10 +74 0x1E1E //RX_FDEQ_BIN_11 +75 0x1E1E //RX_FDEQ_BIN_12 +76 0x1E1E //RX_FDEQ_BIN_13 +77 0x1E1E //RX_FDEQ_BIN_14 +78 0x202C //RX_FDEQ_BIN_15 +79 0x0000 //RX_FDEQ_BIN_16 +80 0x0000 //RX_FDEQ_BIN_17 +81 0x0000 //RX_FDEQ_BIN_18 +82 0x0000 //RX_FDEQ_BIN_19 +83 0x0000 //RX_FDEQ_BIN_20 +84 0x0000 //RX_FDEQ_BIN_21 +85 0x0000 //RX_FDEQ_BIN_22 +86 0x0000 //RX_FDEQ_BIN_23 +87 0x4000 //RX_FDEQ_RESRV_0 +88 0x0320 //RX_FDEQ_RESRV_1 +89 0x0018 //RX_FDDRC_BAND_MARGIN_0 +90 0x0030 //RX_FDDRC_BAND_MARGIN_1 +91 0x0050 //RX_FDDRC_BAND_MARGIN_2 +92 0x0080 //RX_FDDRC_BAND_MARGIN_3 +93 0x0007 //RX_FDDRC_BLOCK_EXP +94 0x5000 //RX_FDDRC_THRD_2_0 +95 0x5000 //RX_FDDRC_THRD_2_1 +96 0x5000 //RX_FDDRC_THRD_2_2 +97 0x5000 //RX_FDDRC_THRD_2_3 +98 0x6400 //RX_FDDRC_THRD_3_0 +99 0x6400 //RX_FDDRC_THRD_3_1 +100 0x6400 //RX_FDDRC_THRD_3_2 +101 0x6400 //RX_FDDRC_THRD_3_3 +102 0x2000 //RX_FDDRC_SLANT_0_0 +103 0x2000 //RX_FDDRC_SLANT_0_1 +104 0x2000 //RX_FDDRC_SLANT_0_2 +105 0x2000 //RX_FDDRC_SLANT_0_3 +106 0x5333 //RX_FDDRC_SLANT_1_0 +107 0x5333 //RX_FDDRC_SLANT_1_1 +108 0x5333 //RX_FDDRC_SLANT_1_2 +109 0x5333 //RX_FDDRC_SLANT_1_3 +110 0x0000 //RX_FDDRC_RESRV_0 +111 0x0002 //RX_FILTINDX +112 0x0000 //RX_TDDRC_THRD_0 +113 0x0000 //RX_TDDRC_THRD_1 +114 0x1800 //RX_TDDRC_THRD_2 +115 0x1800 //RX_TDDRC_THRD_3 +116 0x3000 //RX_TDDRC_SLANT_0 +117 0x6E00 //RX_TDDRC_SLANT_1 +118 0x1000 //RX_TDDRC_ALPHA_UP_0 +119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +120 0x0000 //RX_TDDRC_HMNC_FLAG +121 0x199A //RX_TDDRC_HMNC_GAIN +122 0x0001 //RX_TDDRC_SMT_FLAG +123 0x0CCD //RX_TDDRC_SMT_W +124 0x01E0 //RX_TDDRC_DRC_GAIN +125 0x7C00 //RX_LAMBDA_PKA_FP +126 0x2000 //RX_TPKA_FP +127 0x2000 //RX_MIN_G_FP +128 0x0080 //RX_MAX_G_FP +129 0x0100 //RX_SPK_VOL +130 0x0000 //RX_VOL_RESRV_0 +131 0x0000 //RX_MAXLEVEL_CNG +132 0x3000 //RX_BWE_UV_TH +133 0x3000 //RX_BWE_UV_TH2 +134 0x1800 //RX_BWE_UV_TH3 +135 0x1000 //RX_BWE_V_TH +136 0x04CD //RX_BWE_GAIN1_V_TH1 +137 0x0F33 //RX_BWE_GAIN1_V_TH2 +138 0x7333 //RX_BWE_UV_EQ +139 0x199A //RX_BWE_V_EQ +140 0x7333 //RX_BWE_TONE_TH +141 0x0004 //RX_BWE_UV_HOLD_T +142 0x6CCD //RX_BWE_GAIN2_ALPHA +143 0x799A //RX_BWE_GAIN3_ALPHA +144 0x001E //RX_BWE_CUTOFF +145 0x3000 //RX_BWE_GAINFILL +146 0x3200 //RX_BWE_MAXTH_TONE +147 0x2000 //RX_BWE_EQ_0 +148 0x2000 //RX_BWE_EQ_1 +149 0x2000 //RX_BWE_EQ_2 +150 0x2000 //RX_BWE_EQ_3 +151 0x2000 //RX_BWE_EQ_4 +152 0x2000 //RX_BWE_EQ_5 +153 0x2000 //RX_BWE_EQ_6 +154 0x0000 //RX_BWE_RESRV_0 +155 0x0000 //RX_BWE_RESRV_1 +156 0x0000 //RX_BWE_RESRV_2 +#VOL 0 +6 0x1000 //RX_TDDRC_ALPHA_UP_1 +7 0x1000 //RX_TDDRC_ALPHA_UP_2 +8 0x1000 //RX_TDDRC_ALPHA_UP_3 +9 0x1000 //RX_TDDRC_ALPHA_UP_4 +27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +33 0x7000 //RX_TDDRC_LIMITER_THRD +34 0x0800 //RX_TDDRC_LIMITER_GAIN +112 0x0000 //RX_TDDRC_THRD_0 +113 0x0000 //RX_TDDRC_THRD_1 +114 0x1800 //RX_TDDRC_THRD_2 +115 0x1800 //RX_TDDRC_THRD_3 +116 0x3000 //RX_TDDRC_SLANT_0 +117 0x6E00 //RX_TDDRC_SLANT_1 +118 0x1000 //RX_TDDRC_ALPHA_UP_0 +119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +120 0x0000 //RX_TDDRC_HMNC_FLAG +121 0x199A //RX_TDDRC_HMNC_GAIN +122 0x0001 //RX_TDDRC_SMT_FLAG +123 0x0CCD //RX_TDDRC_SMT_W +124 0x01E0 //RX_TDDRC_DRC_GAIN +38 0x0030 //RX_FDEQ_SUBNUM +39 0x4848 //RX_FDEQ_GAIN_0 +40 0x4848 //RX_FDEQ_GAIN_1 +41 0x4844 //RX_FDEQ_GAIN_2 +42 0x4B4D //RX_FDEQ_GAIN_3 +43 0x4E50 //RX_FDEQ_GAIN_4 +44 0x5254 //RX_FDEQ_GAIN_5 +45 0x5658 //RX_FDEQ_GAIN_6 +46 0x5C60 //RX_FDEQ_GAIN_7 +47 0x6468 //RX_FDEQ_GAIN_8 +48 0x6C70 //RX_FDEQ_GAIN_9 +49 0x7474 //RX_FDEQ_GAIN_10 +50 0x7474 //RX_FDEQ_GAIN_11 +51 0x7474 //RX_FDEQ_GAIN_12 +52 0x7474 //RX_FDEQ_GAIN_13 +53 0x7474 //RX_FDEQ_GAIN_14 +54 0x7474 //RX_FDEQ_GAIN_15 +55 0x4848 //RX_FDEQ_GAIN_16 +56 0x4848 //RX_FDEQ_GAIN_17 +57 0x4848 //RX_FDEQ_GAIN_18 +58 0x4848 //RX_FDEQ_GAIN_19 +59 0x4848 //RX_FDEQ_GAIN_20 +60 0x4848 //RX_FDEQ_GAIN_21 +61 0x4848 //RX_FDEQ_GAIN_22 +62 0x4848 //RX_FDEQ_GAIN_23 +63 0x0202 //RX_FDEQ_BIN_0 +64 0x0203 //RX_FDEQ_BIN_1 +65 0x0402 //RX_FDEQ_BIN_2 +66 0x0304 //RX_FDEQ_BIN_3 +67 0x0405 //RX_FDEQ_BIN_4 +68 0x0506 //RX_FDEQ_BIN_5 +69 0x0708 //RX_FDEQ_BIN_6 +70 0x090A //RX_FDEQ_BIN_7 +71 0x0B0C //RX_FDEQ_BIN_8 +72 0x0D0E //RX_FDEQ_BIN_9 +73 0x1214 //RX_FDEQ_BIN_10 +74 0x1E1E //RX_FDEQ_BIN_11 +75 0x1E1E //RX_FDEQ_BIN_12 +76 0x1E1E //RX_FDEQ_BIN_13 +77 0x1E1E //RX_FDEQ_BIN_14 +78 0x202C //RX_FDEQ_BIN_15 +79 0x0000 //RX_FDEQ_BIN_16 +80 0x0000 //RX_FDEQ_BIN_17 +81 0x0000 //RX_FDEQ_BIN_18 +82 0x0000 //RX_FDEQ_BIN_19 +83 0x0000 //RX_FDEQ_BIN_20 +84 0x0000 //RX_FDEQ_BIN_21 +85 0x0000 //RX_FDEQ_BIN_22 +86 0x0000 //RX_FDEQ_BIN_23 +87 0x4000 //RX_FDEQ_RESRV_0 +88 0x0320 //RX_FDEQ_RESRV_1 +89 0x0018 //RX_FDDRC_BAND_MARGIN_0 +90 0x0030 //RX_FDDRC_BAND_MARGIN_1 +91 0x0050 //RX_FDDRC_BAND_MARGIN_2 +92 0x0080 //RX_FDDRC_BAND_MARGIN_3 +93 0x0007 //RX_FDDRC_BLOCK_EXP +94 0x5000 //RX_FDDRC_THRD_2_0 +95 0x5000 //RX_FDDRC_THRD_2_1 +96 0x5000 //RX_FDDRC_THRD_2_2 +97 0x5000 //RX_FDDRC_THRD_2_3 +98 0x6400 //RX_FDDRC_THRD_3_0 +99 0x6400 //RX_FDDRC_THRD_3_1 +100 0x6400 //RX_FDDRC_THRD_3_2 +101 0x6400 //RX_FDDRC_THRD_3_3 +102 0x2000 //RX_FDDRC_SLANT_0_0 +103 0x2000 //RX_FDDRC_SLANT_0_1 +104 0x2000 //RX_FDDRC_SLANT_0_2 +105 0x2000 //RX_FDDRC_SLANT_0_3 +106 0x5333 //RX_FDDRC_SLANT_1_0 +107 0x5333 //RX_FDDRC_SLANT_1_1 +108 0x5333 //RX_FDDRC_SLANT_1_2 +109 0x5333 //RX_FDDRC_SLANT_1_3 +110 0x0000 //RX_FDDRC_RESRV_0 +129 0x0100 //RX_SPK_VOL +130 0x0000 //RX_VOL_RESRV_0 +#VOL 1 +6 0x1000 //RX_TDDRC_ALPHA_UP_1 +7 0x1000 //RX_TDDRC_ALPHA_UP_2 +8 0x1000 //RX_TDDRC_ALPHA_UP_3 +9 0x1000 //RX_TDDRC_ALPHA_UP_4 +27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +33 0x7000 //RX_TDDRC_LIMITER_THRD +34 0x0800 //RX_TDDRC_LIMITER_GAIN +112 0x0000 //RX_TDDRC_THRD_0 +113 0x0000 //RX_TDDRC_THRD_1 +114 0x1800 //RX_TDDRC_THRD_2 +115 0x1800 //RX_TDDRC_THRD_3 +116 0x3000 //RX_TDDRC_SLANT_0 +117 0x6E00 //RX_TDDRC_SLANT_1 +118 0x1000 //RX_TDDRC_ALPHA_UP_0 +119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +120 0x0000 //RX_TDDRC_HMNC_FLAG +121 0x199A //RX_TDDRC_HMNC_GAIN +122 0x0001 //RX_TDDRC_SMT_FLAG +123 0x0CCD //RX_TDDRC_SMT_W +124 0x01E0 //RX_TDDRC_DRC_GAIN +38 0x0030 //RX_FDEQ_SUBNUM +39 0x4848 //RX_FDEQ_GAIN_0 +40 0x4848 //RX_FDEQ_GAIN_1 +41 0x4844 //RX_FDEQ_GAIN_2 +42 0x4B4D //RX_FDEQ_GAIN_3 +43 0x4E50 //RX_FDEQ_GAIN_4 +44 0x5254 //RX_FDEQ_GAIN_5 +45 0x5658 //RX_FDEQ_GAIN_6 +46 0x5C60 //RX_FDEQ_GAIN_7 +47 0x6468 //RX_FDEQ_GAIN_8 +48 0x6C70 //RX_FDEQ_GAIN_9 +49 0x7474 //RX_FDEQ_GAIN_10 +50 0x7474 //RX_FDEQ_GAIN_11 +51 0x7474 //RX_FDEQ_GAIN_12 +52 0x7474 //RX_FDEQ_GAIN_13 +53 0x7474 //RX_FDEQ_GAIN_14 +54 0x7474 //RX_FDEQ_GAIN_15 +55 0x4848 //RX_FDEQ_GAIN_16 +56 0x4848 //RX_FDEQ_GAIN_17 +57 0x4848 //RX_FDEQ_GAIN_18 +58 0x4848 //RX_FDEQ_GAIN_19 +59 0x4848 //RX_FDEQ_GAIN_20 +60 0x4848 //RX_FDEQ_GAIN_21 +61 0x4848 //RX_FDEQ_GAIN_22 +62 0x4848 //RX_FDEQ_GAIN_23 +63 0x0202 //RX_FDEQ_BIN_0 +64 0x0203 //RX_FDEQ_BIN_1 +65 0x0402 //RX_FDEQ_BIN_2 +66 0x0304 //RX_FDEQ_BIN_3 +67 0x0405 //RX_FDEQ_BIN_4 +68 0x0506 //RX_FDEQ_BIN_5 +69 0x0708 //RX_FDEQ_BIN_6 +70 0x090A //RX_FDEQ_BIN_7 +71 0x0B0C //RX_FDEQ_BIN_8 +72 0x0D0E //RX_FDEQ_BIN_9 +73 0x1214 //RX_FDEQ_BIN_10 +74 0x1E1E //RX_FDEQ_BIN_11 +75 0x1E1E //RX_FDEQ_BIN_12 +76 0x1E1E //RX_FDEQ_BIN_13 +77 0x1E1E //RX_FDEQ_BIN_14 +78 0x202C //RX_FDEQ_BIN_15 +79 0x0000 //RX_FDEQ_BIN_16 +80 0x0000 //RX_FDEQ_BIN_17 +81 0x0000 //RX_FDEQ_BIN_18 +82 0x0000 //RX_FDEQ_BIN_19 +83 0x0000 //RX_FDEQ_BIN_20 +84 0x0000 //RX_FDEQ_BIN_21 +85 0x0000 //RX_FDEQ_BIN_22 +86 0x0000 //RX_FDEQ_BIN_23 +87 0x4000 //RX_FDEQ_RESRV_0 +88 0x0320 //RX_FDEQ_RESRV_1 +89 0x0018 //RX_FDDRC_BAND_MARGIN_0 +90 0x0030 //RX_FDDRC_BAND_MARGIN_1 +91 0x0050 //RX_FDDRC_BAND_MARGIN_2 +92 0x0080 //RX_FDDRC_BAND_MARGIN_3 +93 0x0007 //RX_FDDRC_BLOCK_EXP +94 0x5000 //RX_FDDRC_THRD_2_0 +95 0x5000 //RX_FDDRC_THRD_2_1 +96 0x5000 //RX_FDDRC_THRD_2_2 +97 0x5000 //RX_FDDRC_THRD_2_3 +98 0x6400 //RX_FDDRC_THRD_3_0 +99 0x6400 //RX_FDDRC_THRD_3_1 +100 0x6400 //RX_FDDRC_THRD_3_2 +101 0x6400 //RX_FDDRC_THRD_3_3 +102 0x2000 //RX_FDDRC_SLANT_0_0 +103 0x2000 //RX_FDDRC_SLANT_0_1 +104 0x2000 //RX_FDDRC_SLANT_0_2 +105 0x2000 //RX_FDDRC_SLANT_0_3 +106 0x5333 //RX_FDDRC_SLANT_1_0 +107 0x5333 //RX_FDDRC_SLANT_1_1 +108 0x5333 //RX_FDDRC_SLANT_1_2 +109 0x5333 //RX_FDDRC_SLANT_1_3 +110 0x0000 //RX_FDDRC_RESRV_0 +129 0x0100 //RX_SPK_VOL +130 0x0000 //RX_VOL_RESRV_0 +#VOL 2 +6 0x1000 //RX_TDDRC_ALPHA_UP_1 +7 0x1000 //RX_TDDRC_ALPHA_UP_2 +8 0x1000 //RX_TDDRC_ALPHA_UP_3 +9 0x1000 //RX_TDDRC_ALPHA_UP_4 +27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +33 0x7000 //RX_TDDRC_LIMITER_THRD +34 0x0800 //RX_TDDRC_LIMITER_GAIN +112 0x0000 //RX_TDDRC_THRD_0 +113 0x0000 //RX_TDDRC_THRD_1 +114 0x1800 //RX_TDDRC_THRD_2 +115 0x1800 //RX_TDDRC_THRD_3 +116 0x3000 //RX_TDDRC_SLANT_0 +117 0x6E00 //RX_TDDRC_SLANT_1 +118 0x1000 //RX_TDDRC_ALPHA_UP_0 +119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +120 0x0000 //RX_TDDRC_HMNC_FLAG +121 0x199A //RX_TDDRC_HMNC_GAIN +122 0x0001 //RX_TDDRC_SMT_FLAG +123 0x0CCD //RX_TDDRC_SMT_W +124 0x01E0 //RX_TDDRC_DRC_GAIN +38 0x0030 //RX_FDEQ_SUBNUM +39 0x4848 //RX_FDEQ_GAIN_0 +40 0x4848 //RX_FDEQ_GAIN_1 +41 0x4844 //RX_FDEQ_GAIN_2 +42 0x4B4D //RX_FDEQ_GAIN_3 +43 0x4E50 //RX_FDEQ_GAIN_4 +44 0x5254 //RX_FDEQ_GAIN_5 +45 0x5658 //RX_FDEQ_GAIN_6 +46 0x5C60 //RX_FDEQ_GAIN_7 +47 0x6468 //RX_FDEQ_GAIN_8 +48 0x6C70 //RX_FDEQ_GAIN_9 +49 0x7474 //RX_FDEQ_GAIN_10 +50 0x7474 //RX_FDEQ_GAIN_11 +51 0x7474 //RX_FDEQ_GAIN_12 +52 0x7474 //RX_FDEQ_GAIN_13 +53 0x7474 //RX_FDEQ_GAIN_14 +54 0x7474 //RX_FDEQ_GAIN_15 +55 0x4848 //RX_FDEQ_GAIN_16 +56 0x4848 //RX_FDEQ_GAIN_17 +57 0x4848 //RX_FDEQ_GAIN_18 +58 0x4848 //RX_FDEQ_GAIN_19 +59 0x4848 //RX_FDEQ_GAIN_20 +60 0x4848 //RX_FDEQ_GAIN_21 +61 0x4848 //RX_FDEQ_GAIN_22 +62 0x4848 //RX_FDEQ_GAIN_23 +63 0x0202 //RX_FDEQ_BIN_0 +64 0x0203 //RX_FDEQ_BIN_1 +65 0x0402 //RX_FDEQ_BIN_2 +66 0x0304 //RX_FDEQ_BIN_3 +67 0x0405 //RX_FDEQ_BIN_4 +68 0x0506 //RX_FDEQ_BIN_5 +69 0x0708 //RX_FDEQ_BIN_6 +70 0x090A //RX_FDEQ_BIN_7 +71 0x0B0C //RX_FDEQ_BIN_8 +72 0x0D0E //RX_FDEQ_BIN_9 +73 0x1214 //RX_FDEQ_BIN_10 +74 0x1E1E //RX_FDEQ_BIN_11 +75 0x1E1E //RX_FDEQ_BIN_12 +76 0x1E1E //RX_FDEQ_BIN_13 +77 0x1E1E //RX_FDEQ_BIN_14 +78 0x202C //RX_FDEQ_BIN_15 +79 0x0000 //RX_FDEQ_BIN_16 +80 0x0000 //RX_FDEQ_BIN_17 +81 0x0000 //RX_FDEQ_BIN_18 +82 0x0000 //RX_FDEQ_BIN_19 +83 0x0000 //RX_FDEQ_BIN_20 +84 0x0000 //RX_FDEQ_BIN_21 +85 0x0000 //RX_FDEQ_BIN_22 +86 0x0000 //RX_FDEQ_BIN_23 +87 0x4000 //RX_FDEQ_RESRV_0 +88 0x0320 //RX_FDEQ_RESRV_1 +89 0x0018 //RX_FDDRC_BAND_MARGIN_0 +90 0x0030 //RX_FDDRC_BAND_MARGIN_1 +91 0x0050 //RX_FDDRC_BAND_MARGIN_2 +92 0x0080 //RX_FDDRC_BAND_MARGIN_3 +93 0x0007 //RX_FDDRC_BLOCK_EXP +94 0x5000 //RX_FDDRC_THRD_2_0 +95 0x5000 //RX_FDDRC_THRD_2_1 +96 0x5000 //RX_FDDRC_THRD_2_2 +97 0x5000 //RX_FDDRC_THRD_2_3 +98 0x6400 //RX_FDDRC_THRD_3_0 +99 0x6400 //RX_FDDRC_THRD_3_1 +100 0x6400 //RX_FDDRC_THRD_3_2 +101 0x6400 //RX_FDDRC_THRD_3_3 +102 0x2000 //RX_FDDRC_SLANT_0_0 +103 0x2000 //RX_FDDRC_SLANT_0_1 +104 0x2000 //RX_FDDRC_SLANT_0_2 +105 0x2000 //RX_FDDRC_SLANT_0_3 +106 0x5333 //RX_FDDRC_SLANT_1_0 +107 0x5333 //RX_FDDRC_SLANT_1_1 +108 0x5333 //RX_FDDRC_SLANT_1_2 +109 0x5333 //RX_FDDRC_SLANT_1_3 +110 0x0000 //RX_FDDRC_RESRV_0 +129 0x0100 //RX_SPK_VOL +130 0x0000 //RX_VOL_RESRV_0 +#VOL 3 +6 0x1000 //RX_TDDRC_ALPHA_UP_1 +7 0x1000 //RX_TDDRC_ALPHA_UP_2 +8 0x1000 //RX_TDDRC_ALPHA_UP_3 +9 0x1000 //RX_TDDRC_ALPHA_UP_4 +27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +33 0x7000 //RX_TDDRC_LIMITER_THRD +34 0x0800 //RX_TDDRC_LIMITER_GAIN +112 0x0000 //RX_TDDRC_THRD_0 +113 0x0000 //RX_TDDRC_THRD_1 +114 0x1800 //RX_TDDRC_THRD_2 +115 0x1800 //RX_TDDRC_THRD_3 +116 0x3000 //RX_TDDRC_SLANT_0 +117 0x6E00 //RX_TDDRC_SLANT_1 +118 0x1000 //RX_TDDRC_ALPHA_UP_0 +119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +120 0x0000 //RX_TDDRC_HMNC_FLAG +121 0x199A //RX_TDDRC_HMNC_GAIN +122 0x0001 //RX_TDDRC_SMT_FLAG +123 0x0CCD //RX_TDDRC_SMT_W +124 0x01E0 //RX_TDDRC_DRC_GAIN +38 0x0030 //RX_FDEQ_SUBNUM +39 0x4848 //RX_FDEQ_GAIN_0 +40 0x4848 //RX_FDEQ_GAIN_1 +41 0x4844 //RX_FDEQ_GAIN_2 +42 0x4B4D //RX_FDEQ_GAIN_3 +43 0x4E50 //RX_FDEQ_GAIN_4 +44 0x5254 //RX_FDEQ_GAIN_5 +45 0x5658 //RX_FDEQ_GAIN_6 +46 0x5C60 //RX_FDEQ_GAIN_7 +47 0x6468 //RX_FDEQ_GAIN_8 +48 0x6C70 //RX_FDEQ_GAIN_9 +49 0x7474 //RX_FDEQ_GAIN_10 +50 0x7474 //RX_FDEQ_GAIN_11 +51 0x7474 //RX_FDEQ_GAIN_12 +52 0x7474 //RX_FDEQ_GAIN_13 +53 0x7474 //RX_FDEQ_GAIN_14 +54 0x7474 //RX_FDEQ_GAIN_15 +55 0x4848 //RX_FDEQ_GAIN_16 +56 0x4848 //RX_FDEQ_GAIN_17 +57 0x4848 //RX_FDEQ_GAIN_18 +58 0x4848 //RX_FDEQ_GAIN_19 +59 0x4848 //RX_FDEQ_GAIN_20 +60 0x4848 //RX_FDEQ_GAIN_21 +61 0x4848 //RX_FDEQ_GAIN_22 +62 0x4848 //RX_FDEQ_GAIN_23 +63 0x0202 //RX_FDEQ_BIN_0 +64 0x0203 //RX_FDEQ_BIN_1 +65 0x0402 //RX_FDEQ_BIN_2 +66 0x0304 //RX_FDEQ_BIN_3 +67 0x0405 //RX_FDEQ_BIN_4 +68 0x0506 //RX_FDEQ_BIN_5 +69 0x0708 //RX_FDEQ_BIN_6 +70 0x090A //RX_FDEQ_BIN_7 +71 0x0B0C //RX_FDEQ_BIN_8 +72 0x0D0E //RX_FDEQ_BIN_9 +73 0x1214 //RX_FDEQ_BIN_10 +74 0x1E1E //RX_FDEQ_BIN_11 +75 0x1E1E //RX_FDEQ_BIN_12 +76 0x1E1E //RX_FDEQ_BIN_13 +77 0x1E1E //RX_FDEQ_BIN_14 +78 0x202C //RX_FDEQ_BIN_15 +79 0x0000 //RX_FDEQ_BIN_16 +80 0x0000 //RX_FDEQ_BIN_17 +81 0x0000 //RX_FDEQ_BIN_18 +82 0x0000 //RX_FDEQ_BIN_19 +83 0x0000 //RX_FDEQ_BIN_20 +84 0x0000 //RX_FDEQ_BIN_21 +85 0x0000 //RX_FDEQ_BIN_22 +86 0x0000 //RX_FDEQ_BIN_23 +87 0x4000 //RX_FDEQ_RESRV_0 +88 0x0320 //RX_FDEQ_RESRV_1 +89 0x0018 //RX_FDDRC_BAND_MARGIN_0 +90 0x0030 //RX_FDDRC_BAND_MARGIN_1 +91 0x0050 //RX_FDDRC_BAND_MARGIN_2 +92 0x0080 //RX_FDDRC_BAND_MARGIN_3 +93 0x0007 //RX_FDDRC_BLOCK_EXP +94 0x5000 //RX_FDDRC_THRD_2_0 +95 0x5000 //RX_FDDRC_THRD_2_1 +96 0x5000 //RX_FDDRC_THRD_2_2 +97 0x5000 //RX_FDDRC_THRD_2_3 +98 0x6400 //RX_FDDRC_THRD_3_0 +99 0x6400 //RX_FDDRC_THRD_3_1 +100 0x6400 //RX_FDDRC_THRD_3_2 +101 0x6400 //RX_FDDRC_THRD_3_3 +102 0x2000 //RX_FDDRC_SLANT_0_0 +103 0x2000 //RX_FDDRC_SLANT_0_1 +104 0x2000 //RX_FDDRC_SLANT_0_2 +105 0x2000 //RX_FDDRC_SLANT_0_3 +106 0x5333 //RX_FDDRC_SLANT_1_0 +107 0x5333 //RX_FDDRC_SLANT_1_1 +108 0x5333 //RX_FDDRC_SLANT_1_2 +109 0x5333 //RX_FDDRC_SLANT_1_3 +110 0x0000 //RX_FDDRC_RESRV_0 +129 0x0100 //RX_SPK_VOL +130 0x0000 //RX_VOL_RESRV_0 +#VOL 4 +6 0x1000 //RX_TDDRC_ALPHA_UP_1 +7 0x1000 //RX_TDDRC_ALPHA_UP_2 +8 0x1000 //RX_TDDRC_ALPHA_UP_3 +9 0x1000 //RX_TDDRC_ALPHA_UP_4 +27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +33 0x7000 //RX_TDDRC_LIMITER_THRD +34 0x0800 //RX_TDDRC_LIMITER_GAIN +112 0x0000 //RX_TDDRC_THRD_0 +113 0x0000 //RX_TDDRC_THRD_1 +114 0x1800 //RX_TDDRC_THRD_2 +115 0x1800 //RX_TDDRC_THRD_3 +116 0x3000 //RX_TDDRC_SLANT_0 +117 0x6E00 //RX_TDDRC_SLANT_1 +118 0x1000 //RX_TDDRC_ALPHA_UP_0 +119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +120 0x0000 //RX_TDDRC_HMNC_FLAG +121 0x199A //RX_TDDRC_HMNC_GAIN +122 0x0001 //RX_TDDRC_SMT_FLAG +123 0x0CCD //RX_TDDRC_SMT_W +124 0x01E0 //RX_TDDRC_DRC_GAIN +38 0x0030 //RX_FDEQ_SUBNUM +39 0x4848 //RX_FDEQ_GAIN_0 +40 0x4848 //RX_FDEQ_GAIN_1 +41 0x4844 //RX_FDEQ_GAIN_2 +42 0x4B4D //RX_FDEQ_GAIN_3 +43 0x4E50 //RX_FDEQ_GAIN_4 +44 0x5254 //RX_FDEQ_GAIN_5 +45 0x5658 //RX_FDEQ_GAIN_6 +46 0x5C60 //RX_FDEQ_GAIN_7 +47 0x6468 //RX_FDEQ_GAIN_8 +48 0x6C70 //RX_FDEQ_GAIN_9 +49 0x7474 //RX_FDEQ_GAIN_10 +50 0x7474 //RX_FDEQ_GAIN_11 +51 0x7474 //RX_FDEQ_GAIN_12 +52 0x7474 //RX_FDEQ_GAIN_13 +53 0x7474 //RX_FDEQ_GAIN_14 +54 0x7474 //RX_FDEQ_GAIN_15 +55 0x4848 //RX_FDEQ_GAIN_16 +56 0x4848 //RX_FDEQ_GAIN_17 +57 0x4848 //RX_FDEQ_GAIN_18 +58 0x4848 //RX_FDEQ_GAIN_19 +59 0x4848 //RX_FDEQ_GAIN_20 +60 0x4848 //RX_FDEQ_GAIN_21 +61 0x4848 //RX_FDEQ_GAIN_22 +62 0x4848 //RX_FDEQ_GAIN_23 +63 0x0202 //RX_FDEQ_BIN_0 +64 0x0203 //RX_FDEQ_BIN_1 +65 0x0402 //RX_FDEQ_BIN_2 +66 0x0304 //RX_FDEQ_BIN_3 +67 0x0405 //RX_FDEQ_BIN_4 +68 0x0506 //RX_FDEQ_BIN_5 +69 0x0708 //RX_FDEQ_BIN_6 +70 0x090A //RX_FDEQ_BIN_7 +71 0x0B0C //RX_FDEQ_BIN_8 +72 0x0D0E //RX_FDEQ_BIN_9 +73 0x1214 //RX_FDEQ_BIN_10 +74 0x1E1E //RX_FDEQ_BIN_11 +75 0x1E1E //RX_FDEQ_BIN_12 +76 0x1E1E //RX_FDEQ_BIN_13 +77 0x1E1E //RX_FDEQ_BIN_14 +78 0x202C //RX_FDEQ_BIN_15 +79 0x0000 //RX_FDEQ_BIN_16 +80 0x0000 //RX_FDEQ_BIN_17 +81 0x0000 //RX_FDEQ_BIN_18 +82 0x0000 //RX_FDEQ_BIN_19 +83 0x0000 //RX_FDEQ_BIN_20 +84 0x0000 //RX_FDEQ_BIN_21 +85 0x0000 //RX_FDEQ_BIN_22 +86 0x0000 //RX_FDEQ_BIN_23 +87 0x4000 //RX_FDEQ_RESRV_0 +88 0x0320 //RX_FDEQ_RESRV_1 +89 0x0018 //RX_FDDRC_BAND_MARGIN_0 +90 0x0030 //RX_FDDRC_BAND_MARGIN_1 +91 0x0050 //RX_FDDRC_BAND_MARGIN_2 +92 0x0080 //RX_FDDRC_BAND_MARGIN_3 +93 0x0007 //RX_FDDRC_BLOCK_EXP +94 0x5000 //RX_FDDRC_THRD_2_0 +95 0x5000 //RX_FDDRC_THRD_2_1 +96 0x5000 //RX_FDDRC_THRD_2_2 +97 0x5000 //RX_FDDRC_THRD_2_3 +98 0x6400 //RX_FDDRC_THRD_3_0 +99 0x6400 //RX_FDDRC_THRD_3_1 +100 0x6400 //RX_FDDRC_THRD_3_2 +101 0x6400 //RX_FDDRC_THRD_3_3 +102 0x2000 //RX_FDDRC_SLANT_0_0 +103 0x2000 //RX_FDDRC_SLANT_0_1 +104 0x2000 //RX_FDDRC_SLANT_0_2 +105 0x2000 //RX_FDDRC_SLANT_0_3 +106 0x5333 //RX_FDDRC_SLANT_1_0 +107 0x5333 //RX_FDDRC_SLANT_1_1 +108 0x5333 //RX_FDDRC_SLANT_1_2 +109 0x5333 //RX_FDDRC_SLANT_1_3 +110 0x0000 //RX_FDDRC_RESRV_0 +129 0x0100 //RX_SPK_VOL +130 0x0000 //RX_VOL_RESRV_0 +#VOL 5 +6 0x1000 //RX_TDDRC_ALPHA_UP_1 +7 0x1000 //RX_TDDRC_ALPHA_UP_2 +8 0x1000 //RX_TDDRC_ALPHA_UP_3 +9 0x1000 //RX_TDDRC_ALPHA_UP_4 +27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +33 0x7000 //RX_TDDRC_LIMITER_THRD +34 0x0800 //RX_TDDRC_LIMITER_GAIN +112 0x0000 //RX_TDDRC_THRD_0 +113 0x0000 //RX_TDDRC_THRD_1 +114 0x1800 //RX_TDDRC_THRD_2 +115 0x1800 //RX_TDDRC_THRD_3 +116 0x3000 //RX_TDDRC_SLANT_0 +117 0x6E00 //RX_TDDRC_SLANT_1 +118 0x1000 //RX_TDDRC_ALPHA_UP_0 +119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +120 0x0000 //RX_TDDRC_HMNC_FLAG +121 0x199A //RX_TDDRC_HMNC_GAIN +122 0x0001 //RX_TDDRC_SMT_FLAG +123 0x0CCD //RX_TDDRC_SMT_W +124 0x01E0 //RX_TDDRC_DRC_GAIN +38 0x0030 //RX_FDEQ_SUBNUM +39 0x4848 //RX_FDEQ_GAIN_0 +40 0x4848 //RX_FDEQ_GAIN_1 +41 0x4844 //RX_FDEQ_GAIN_2 +42 0x4B4D //RX_FDEQ_GAIN_3 +43 0x4E50 //RX_FDEQ_GAIN_4 +44 0x5254 //RX_FDEQ_GAIN_5 +45 0x5658 //RX_FDEQ_GAIN_6 +46 0x5C60 //RX_FDEQ_GAIN_7 +47 0x6468 //RX_FDEQ_GAIN_8 +48 0x6C70 //RX_FDEQ_GAIN_9 +49 0x7474 //RX_FDEQ_GAIN_10 +50 0x7474 //RX_FDEQ_GAIN_11 +51 0x7474 //RX_FDEQ_GAIN_12 +52 0x7474 //RX_FDEQ_GAIN_13 +53 0x7474 //RX_FDEQ_GAIN_14 +54 0x7474 //RX_FDEQ_GAIN_15 +55 0x4848 //RX_FDEQ_GAIN_16 +56 0x4848 //RX_FDEQ_GAIN_17 +57 0x4848 //RX_FDEQ_GAIN_18 +58 0x4848 //RX_FDEQ_GAIN_19 +59 0x4848 //RX_FDEQ_GAIN_20 +60 0x4848 //RX_FDEQ_GAIN_21 +61 0x4848 //RX_FDEQ_GAIN_22 +62 0x4848 //RX_FDEQ_GAIN_23 +63 0x0202 //RX_FDEQ_BIN_0 +64 0x0203 //RX_FDEQ_BIN_1 +65 0x0402 //RX_FDEQ_BIN_2 +66 0x0304 //RX_FDEQ_BIN_3 +67 0x0405 //RX_FDEQ_BIN_4 +68 0x0506 //RX_FDEQ_BIN_5 +69 0x0708 //RX_FDEQ_BIN_6 +70 0x090A //RX_FDEQ_BIN_7 +71 0x0B0C //RX_FDEQ_BIN_8 +72 0x0D0E //RX_FDEQ_BIN_9 +73 0x1214 //RX_FDEQ_BIN_10 +74 0x1E1E //RX_FDEQ_BIN_11 +75 0x1E1E //RX_FDEQ_BIN_12 +76 0x1E1E //RX_FDEQ_BIN_13 +77 0x1E1E //RX_FDEQ_BIN_14 +78 0x202C //RX_FDEQ_BIN_15 +79 0x0000 //RX_FDEQ_BIN_16 +80 0x0000 //RX_FDEQ_BIN_17 +81 0x0000 //RX_FDEQ_BIN_18 +82 0x0000 //RX_FDEQ_BIN_19 +83 0x0000 //RX_FDEQ_BIN_20 +84 0x0000 //RX_FDEQ_BIN_21 +85 0x0000 //RX_FDEQ_BIN_22 +86 0x0000 //RX_FDEQ_BIN_23 +87 0x4000 //RX_FDEQ_RESRV_0 +88 0x0320 //RX_FDEQ_RESRV_1 +89 0x0018 //RX_FDDRC_BAND_MARGIN_0 +90 0x0030 //RX_FDDRC_BAND_MARGIN_1 +91 0x0050 //RX_FDDRC_BAND_MARGIN_2 +92 0x0080 //RX_FDDRC_BAND_MARGIN_3 +93 0x0007 //RX_FDDRC_BLOCK_EXP +94 0x5000 //RX_FDDRC_THRD_2_0 +95 0x5000 //RX_FDDRC_THRD_2_1 +96 0x5000 //RX_FDDRC_THRD_2_2 +97 0x5000 //RX_FDDRC_THRD_2_3 +98 0x6400 //RX_FDDRC_THRD_3_0 +99 0x6400 //RX_FDDRC_THRD_3_1 +100 0x6400 //RX_FDDRC_THRD_3_2 +101 0x6400 //RX_FDDRC_THRD_3_3 +102 0x2000 //RX_FDDRC_SLANT_0_0 +103 0x2000 //RX_FDDRC_SLANT_0_1 +104 0x2000 //RX_FDDRC_SLANT_0_2 +105 0x2000 //RX_FDDRC_SLANT_0_3 +106 0x5333 //RX_FDDRC_SLANT_1_0 +107 0x5333 //RX_FDDRC_SLANT_1_1 +108 0x5333 //RX_FDDRC_SLANT_1_2 +109 0x5333 //RX_FDDRC_SLANT_1_3 +110 0x0000 //RX_FDDRC_RESRV_0 +129 0x0100 //RX_SPK_VOL +130 0x0000 //RX_VOL_RESRV_0 +#VOL 6 +6 0x1000 //RX_TDDRC_ALPHA_UP_1 +7 0x1000 //RX_TDDRC_ALPHA_UP_2 +8 0x1000 //RX_TDDRC_ALPHA_UP_3 +9 0x1000 //RX_TDDRC_ALPHA_UP_4 +27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +33 0x7000 //RX_TDDRC_LIMITER_THRD +34 0x0800 //RX_TDDRC_LIMITER_GAIN +112 0x0000 //RX_TDDRC_THRD_0 +113 0x0000 //RX_TDDRC_THRD_1 +114 0x1800 //RX_TDDRC_THRD_2 +115 0x1800 //RX_TDDRC_THRD_3 +116 0x3000 //RX_TDDRC_SLANT_0 +117 0x6E00 //RX_TDDRC_SLANT_1 +118 0x1000 //RX_TDDRC_ALPHA_UP_0 +119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +120 0x0000 //RX_TDDRC_HMNC_FLAG +121 0x199A //RX_TDDRC_HMNC_GAIN +122 0x0001 //RX_TDDRC_SMT_FLAG +123 0x0CCD //RX_TDDRC_SMT_W +124 0x01E0 //RX_TDDRC_DRC_GAIN +38 0x0030 //RX_FDEQ_SUBNUM +39 0x4848 //RX_FDEQ_GAIN_0 +40 0x4848 //RX_FDEQ_GAIN_1 +41 0x4844 //RX_FDEQ_GAIN_2 +42 0x4B4D //RX_FDEQ_GAIN_3 +43 0x4E50 //RX_FDEQ_GAIN_4 +44 0x5254 //RX_FDEQ_GAIN_5 +45 0x5658 //RX_FDEQ_GAIN_6 +46 0x5C60 //RX_FDEQ_GAIN_7 +47 0x6468 //RX_FDEQ_GAIN_8 +48 0x6C70 //RX_FDEQ_GAIN_9 +49 0x7474 //RX_FDEQ_GAIN_10 +50 0x7474 //RX_FDEQ_GAIN_11 +51 0x7474 //RX_FDEQ_GAIN_12 +52 0x7474 //RX_FDEQ_GAIN_13 +53 0x7474 //RX_FDEQ_GAIN_14 +54 0x7474 //RX_FDEQ_GAIN_15 +55 0x4848 //RX_FDEQ_GAIN_16 +56 0x4848 //RX_FDEQ_GAIN_17 +57 0x4848 //RX_FDEQ_GAIN_18 +58 0x4848 //RX_FDEQ_GAIN_19 +59 0x4848 //RX_FDEQ_GAIN_20 +60 0x4848 //RX_FDEQ_GAIN_21 +61 0x4848 //RX_FDEQ_GAIN_22 +62 0x4848 //RX_FDEQ_GAIN_23 +63 0x0202 //RX_FDEQ_BIN_0 +64 0x0203 //RX_FDEQ_BIN_1 +65 0x0402 //RX_FDEQ_BIN_2 +66 0x0304 //RX_FDEQ_BIN_3 +67 0x0405 //RX_FDEQ_BIN_4 +68 0x0506 //RX_FDEQ_BIN_5 +69 0x0708 //RX_FDEQ_BIN_6 +70 0x090A //RX_FDEQ_BIN_7 +71 0x0B0C //RX_FDEQ_BIN_8 +72 0x0D0E //RX_FDEQ_BIN_9 +73 0x1214 //RX_FDEQ_BIN_10 +74 0x1E1E //RX_FDEQ_BIN_11 +75 0x1E1E //RX_FDEQ_BIN_12 +76 0x1E1E //RX_FDEQ_BIN_13 +77 0x1E1E //RX_FDEQ_BIN_14 +78 0x202C //RX_FDEQ_BIN_15 +79 0x0000 //RX_FDEQ_BIN_16 +80 0x0000 //RX_FDEQ_BIN_17 +81 0x0000 //RX_FDEQ_BIN_18 +82 0x0000 //RX_FDEQ_BIN_19 +83 0x0000 //RX_FDEQ_BIN_20 +84 0x0000 //RX_FDEQ_BIN_21 +85 0x0000 //RX_FDEQ_BIN_22 +86 0x0000 //RX_FDEQ_BIN_23 +87 0x4000 //RX_FDEQ_RESRV_0 +88 0x0320 //RX_FDEQ_RESRV_1 +89 0x0018 //RX_FDDRC_BAND_MARGIN_0 +90 0x0030 //RX_FDDRC_BAND_MARGIN_1 +91 0x0050 //RX_FDDRC_BAND_MARGIN_2 +92 0x0080 //RX_FDDRC_BAND_MARGIN_3 +93 0x0007 //RX_FDDRC_BLOCK_EXP +94 0x5000 //RX_FDDRC_THRD_2_0 +95 0x5000 //RX_FDDRC_THRD_2_1 +96 0x5000 //RX_FDDRC_THRD_2_2 +97 0x5000 //RX_FDDRC_THRD_2_3 +98 0x6400 //RX_FDDRC_THRD_3_0 +99 0x6400 //RX_FDDRC_THRD_3_1 +100 0x6400 //RX_FDDRC_THRD_3_2 +101 0x6400 //RX_FDDRC_THRD_3_3 +102 0x2000 //RX_FDDRC_SLANT_0_0 +103 0x2000 //RX_FDDRC_SLANT_0_1 +104 0x2000 //RX_FDDRC_SLANT_0_2 +105 0x2000 //RX_FDDRC_SLANT_0_3 +106 0x5333 //RX_FDDRC_SLANT_1_0 +107 0x5333 //RX_FDDRC_SLANT_1_1 +108 0x5333 //RX_FDDRC_SLANT_1_2 +109 0x5333 //RX_FDDRC_SLANT_1_3 +110 0x0000 //RX_FDDRC_RESRV_0 +129 0x0100 //RX_SPK_VOL +130 0x0000 //RX_VOL_RESRV_0 +#RX 2 +157 0x000C //RX_RECVFUNC_MODE_0 +158 0x0000 //RX_RECVFUNC_MODE_1 +159 0x0003 //RX_SAMPLINGFREQ_SIG +160 0x0003 //RX_SAMPLINGFREQ_PROC +161 0x000A //RX_FRAME_SZ +162 0x0000 //RX_DELAY_OPT +163 0x1000 //RX_TDDRC_ALPHA_UP_1 +164 0x1000 //RX_TDDRC_ALPHA_UP_2 +165 0x1000 //RX_TDDRC_ALPHA_UP_3 +166 0x1000 //RX_TDDRC_ALPHA_UP_4 +167 0x0800 //RX_PGA +168 0x7FFF //RX_A_HP +169 0x4000 //RX_B_PE +170 0x5800 //RX_THR_PITCH_DET_0 +171 0x5000 //RX_THR_PITCH_DET_1 +172 0x4000 //RX_THR_PITCH_DET_2 +173 0x0008 //RX_PITCH_BFR_LEN +174 0x0003 //RX_SBD_PITCH_DET +175 0x0100 //RX_PP_RESRV_0 +176 0x0020 //RX_PP_RESRV_1 +177 0x0600 //RX_N_SN_EST +178 0x000C //RX_N2_SN_EST +179 0x000F //RX_NS_LVL_CTRL +180 0xF800 //RX_THR_SN_EST +181 0x7E00 //RX_LAMBDA_PFILT +182 0x000A //RX_FENS_RESRV_0 +183 0x0190 //RX_FENS_RESRV_1 +184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +187 0x0002 //RX_EXTRA_NS_L +188 0x0800 //RX_EXTRA_NS_A +189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +190 0x7000 //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +192 0x199A //RX_A_POST_FLT +193 0x0000 //RX_LMT_THRD +194 0x4000 //RX_LMT_ALPHA +195 0x0030 //RX_FDEQ_SUBNUM +196 0x4848 //RX_FDEQ_GAIN_0 +197 0x4848 //RX_FDEQ_GAIN_1 +198 0x4844 //RX_FDEQ_GAIN_2 +199 0x4B4D //RX_FDEQ_GAIN_3 +200 0x4E50 //RX_FDEQ_GAIN_4 +201 0x5254 //RX_FDEQ_GAIN_5 +202 0x5658 //RX_FDEQ_GAIN_6 +203 0x5C60 //RX_FDEQ_GAIN_7 +204 0x6468 //RX_FDEQ_GAIN_8 +205 0x6C70 //RX_FDEQ_GAIN_9 +206 0x7474 //RX_FDEQ_GAIN_10 +207 0x7474 //RX_FDEQ_GAIN_11 +208 0x7474 //RX_FDEQ_GAIN_12 +209 0x7474 //RX_FDEQ_GAIN_13 +210 0x7474 //RX_FDEQ_GAIN_14 +211 0x7474 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0202 //RX_FDEQ_BIN_0 +221 0x0203 //RX_FDEQ_BIN_1 +222 0x0402 //RX_FDEQ_BIN_2 +223 0x0304 //RX_FDEQ_BIN_3 +224 0x0405 //RX_FDEQ_BIN_4 +225 0x0506 //RX_FDEQ_BIN_5 +226 0x0708 //RX_FDEQ_BIN_6 +227 0x090A //RX_FDEQ_BIN_7 +228 0x0B0C //RX_FDEQ_BIN_8 +229 0x0D0E //RX_FDEQ_BIN_9 +230 0x1214 //RX_FDEQ_BIN_10 +231 0x1E1E //RX_FDEQ_BIN_11 +232 0x1E1E //RX_FDEQ_BIN_12 +233 0x1E1E //RX_FDEQ_BIN_13 +234 0x1E1E //RX_FDEQ_BIN_14 +235 0x202C //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x4000 //RX_FDEQ_RESRV_0 +245 0x0320 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0030 //RX_FDDRC_BAND_MARGIN_1 +248 0x0050 //RX_FDDRC_BAND_MARGIN_2 +249 0x0080 //RX_FDDRC_BAND_MARGIN_3 +250 0x0007 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x5000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x6400 //RX_FDDRC_THRD_3_2 +258 0x6400 //RX_FDDRC_THRD_3_3 +259 0x2000 //RX_FDDRC_SLANT_0_0 +260 0x2000 //RX_FDDRC_SLANT_0_1 +261 0x2000 //RX_FDDRC_SLANT_0_2 +262 0x2000 //RX_FDDRC_SLANT_0_3 +263 0x5333 //RX_FDDRC_SLANT_1_0 +264 0x5333 //RX_FDDRC_SLANT_1_1 +265 0x5333 //RX_FDDRC_SLANT_1_2 +266 0x5333 //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +268 0x0002 //RX_FILTINDX +269 0x0000 //RX_TDDRC_THRD_0 +270 0x0000 //RX_TDDRC_THRD_1 +271 0x1800 //RX_TDDRC_THRD_2 +272 0x1800 //RX_TDDRC_THRD_3 +273 0x3000 //RX_TDDRC_SLANT_0 +274 0x6E00 //RX_TDDRC_SLANT_1 +275 0x1000 //RX_TDDRC_ALPHA_UP_0 +276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x199A //RX_TDDRC_HMNC_GAIN +279 0x0001 //RX_TDDRC_SMT_FLAG +280 0x0CCD //RX_TDDRC_SMT_W +281 0x01E0 //RX_TDDRC_DRC_GAIN +282 0x7C00 //RX_LAMBDA_PKA_FP +283 0x2000 //RX_TPKA_FP +284 0x2000 //RX_MIN_G_FP +285 0x0080 //RX_MAX_G_FP +286 0x0100 //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 +288 0x0000 //RX_MAXLEVEL_CNG +289 0x3000 //RX_BWE_UV_TH +290 0x3000 //RX_BWE_UV_TH2 +291 0x1800 //RX_BWE_UV_TH3 +292 0x1000 //RX_BWE_V_TH +293 0x04CD //RX_BWE_GAIN1_V_TH1 +294 0x0F33 //RX_BWE_GAIN1_V_TH2 +295 0x7333 //RX_BWE_UV_EQ +296 0x199A //RX_BWE_V_EQ +297 0x7333 //RX_BWE_TONE_TH +298 0x0004 //RX_BWE_UV_HOLD_T +299 0x6CCD //RX_BWE_GAIN2_ALPHA +300 0x799A //RX_BWE_GAIN3_ALPHA +301 0x001E //RX_BWE_CUTOFF +302 0x3000 //RX_BWE_GAINFILL +303 0x3200 //RX_BWE_MAXTH_TONE +304 0x2000 //RX_BWE_EQ_0 +305 0x2000 //RX_BWE_EQ_1 +306 0x2000 //RX_BWE_EQ_2 +307 0x2000 //RX_BWE_EQ_3 +308 0x2000 //RX_BWE_EQ_4 +309 0x2000 //RX_BWE_EQ_5 +310 0x2000 //RX_BWE_EQ_6 +311 0x0000 //RX_BWE_RESRV_0 +312 0x0000 //RX_BWE_RESRV_1 +313 0x0000 //RX_BWE_RESRV_2 +#VOL 0 +163 0x1000 //RX_TDDRC_ALPHA_UP_1 +164 0x1000 //RX_TDDRC_ALPHA_UP_2 +165 0x1000 //RX_TDDRC_ALPHA_UP_3 +166 0x1000 //RX_TDDRC_ALPHA_UP_4 +184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +190 0x7000 //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +269 0x0000 //RX_TDDRC_THRD_0 +270 0x0000 //RX_TDDRC_THRD_1 +271 0x1800 //RX_TDDRC_THRD_2 +272 0x1800 //RX_TDDRC_THRD_3 +273 0x3000 //RX_TDDRC_SLANT_0 +274 0x6E00 //RX_TDDRC_SLANT_1 +275 0x1000 //RX_TDDRC_ALPHA_UP_0 +276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x199A //RX_TDDRC_HMNC_GAIN +279 0x0001 //RX_TDDRC_SMT_FLAG +280 0x0CCD //RX_TDDRC_SMT_W +281 0x01E0 //RX_TDDRC_DRC_GAIN +195 0x0030 //RX_FDEQ_SUBNUM +196 0x4848 //RX_FDEQ_GAIN_0 +197 0x4848 //RX_FDEQ_GAIN_1 +198 0x4844 //RX_FDEQ_GAIN_2 +199 0x4B4D //RX_FDEQ_GAIN_3 +200 0x4E50 //RX_FDEQ_GAIN_4 +201 0x5254 //RX_FDEQ_GAIN_5 +202 0x5658 //RX_FDEQ_GAIN_6 +203 0x5C60 //RX_FDEQ_GAIN_7 +204 0x6468 //RX_FDEQ_GAIN_8 +205 0x6C70 //RX_FDEQ_GAIN_9 +206 0x7474 //RX_FDEQ_GAIN_10 +207 0x7474 //RX_FDEQ_GAIN_11 +208 0x7474 //RX_FDEQ_GAIN_12 +209 0x7474 //RX_FDEQ_GAIN_13 +210 0x7474 //RX_FDEQ_GAIN_14 +211 0x7474 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0202 //RX_FDEQ_BIN_0 +221 0x0203 //RX_FDEQ_BIN_1 +222 0x0402 //RX_FDEQ_BIN_2 +223 0x0304 //RX_FDEQ_BIN_3 +224 0x0405 //RX_FDEQ_BIN_4 +225 0x0506 //RX_FDEQ_BIN_5 +226 0x0708 //RX_FDEQ_BIN_6 +227 0x090A //RX_FDEQ_BIN_7 +228 0x0B0C //RX_FDEQ_BIN_8 +229 0x0D0E //RX_FDEQ_BIN_9 +230 0x1214 //RX_FDEQ_BIN_10 +231 0x1E1E //RX_FDEQ_BIN_11 +232 0x1E1E //RX_FDEQ_BIN_12 +233 0x1E1E //RX_FDEQ_BIN_13 +234 0x1E1E //RX_FDEQ_BIN_14 +235 0x202C //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x4000 //RX_FDEQ_RESRV_0 +245 0x0320 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0030 //RX_FDDRC_BAND_MARGIN_1 +248 0x0050 //RX_FDDRC_BAND_MARGIN_2 +249 0x0080 //RX_FDDRC_BAND_MARGIN_3 +250 0x0007 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x5000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x6400 //RX_FDDRC_THRD_3_2 +258 0x6400 //RX_FDDRC_THRD_3_3 +259 0x2000 //RX_FDDRC_SLANT_0_0 +260 0x2000 //RX_FDDRC_SLANT_0_1 +261 0x2000 //RX_FDDRC_SLANT_0_2 +262 0x2000 //RX_FDDRC_SLANT_0_3 +263 0x5333 //RX_FDDRC_SLANT_1_0 +264 0x5333 //RX_FDDRC_SLANT_1_1 +265 0x5333 //RX_FDDRC_SLANT_1_2 +266 0x5333 //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +286 0x0100 //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 +#VOL 1 +163 0x1000 //RX_TDDRC_ALPHA_UP_1 +164 0x1000 //RX_TDDRC_ALPHA_UP_2 +165 0x1000 //RX_TDDRC_ALPHA_UP_3 +166 0x1000 //RX_TDDRC_ALPHA_UP_4 +184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +190 0x7000 //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +269 0x0000 //RX_TDDRC_THRD_0 +270 0x0000 //RX_TDDRC_THRD_1 +271 0x1800 //RX_TDDRC_THRD_2 +272 0x1800 //RX_TDDRC_THRD_3 +273 0x3000 //RX_TDDRC_SLANT_0 +274 0x6E00 //RX_TDDRC_SLANT_1 +275 0x1000 //RX_TDDRC_ALPHA_UP_0 +276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x199A //RX_TDDRC_HMNC_GAIN +279 0x0001 //RX_TDDRC_SMT_FLAG +280 0x0CCD //RX_TDDRC_SMT_W +281 0x01E0 //RX_TDDRC_DRC_GAIN +195 0x0030 //RX_FDEQ_SUBNUM +196 0x4848 //RX_FDEQ_GAIN_0 +197 0x4848 //RX_FDEQ_GAIN_1 +198 0x4844 //RX_FDEQ_GAIN_2 +199 0x4B4D //RX_FDEQ_GAIN_3 +200 0x4E50 //RX_FDEQ_GAIN_4 +201 0x5254 //RX_FDEQ_GAIN_5 +202 0x5658 //RX_FDEQ_GAIN_6 +203 0x5C60 //RX_FDEQ_GAIN_7 +204 0x6468 //RX_FDEQ_GAIN_8 +205 0x6C70 //RX_FDEQ_GAIN_9 +206 0x7474 //RX_FDEQ_GAIN_10 +207 0x7474 //RX_FDEQ_GAIN_11 +208 0x7474 //RX_FDEQ_GAIN_12 +209 0x7474 //RX_FDEQ_GAIN_13 +210 0x7474 //RX_FDEQ_GAIN_14 +211 0x7474 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0202 //RX_FDEQ_BIN_0 +221 0x0203 //RX_FDEQ_BIN_1 +222 0x0402 //RX_FDEQ_BIN_2 +223 0x0304 //RX_FDEQ_BIN_3 +224 0x0405 //RX_FDEQ_BIN_4 +225 0x0506 //RX_FDEQ_BIN_5 +226 0x0708 //RX_FDEQ_BIN_6 +227 0x090A //RX_FDEQ_BIN_7 +228 0x0B0C //RX_FDEQ_BIN_8 +229 0x0D0E //RX_FDEQ_BIN_9 +230 0x1214 //RX_FDEQ_BIN_10 +231 0x1E1E //RX_FDEQ_BIN_11 +232 0x1E1E //RX_FDEQ_BIN_12 +233 0x1E1E //RX_FDEQ_BIN_13 +234 0x1E1E //RX_FDEQ_BIN_14 +235 0x202C //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x4000 //RX_FDEQ_RESRV_0 +245 0x0320 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0030 //RX_FDDRC_BAND_MARGIN_1 +248 0x0050 //RX_FDDRC_BAND_MARGIN_2 +249 0x0080 //RX_FDDRC_BAND_MARGIN_3 +250 0x0007 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x5000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x6400 //RX_FDDRC_THRD_3_2 +258 0x6400 //RX_FDDRC_THRD_3_3 +259 0x2000 //RX_FDDRC_SLANT_0_0 +260 0x2000 //RX_FDDRC_SLANT_0_1 +261 0x2000 //RX_FDDRC_SLANT_0_2 +262 0x2000 //RX_FDDRC_SLANT_0_3 +263 0x5333 //RX_FDDRC_SLANT_1_0 +264 0x5333 //RX_FDDRC_SLANT_1_1 +265 0x5333 //RX_FDDRC_SLANT_1_2 +266 0x5333 //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +286 0x0100 //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 +#VOL 2 +163 0x1000 //RX_TDDRC_ALPHA_UP_1 +164 0x1000 //RX_TDDRC_ALPHA_UP_2 +165 0x1000 //RX_TDDRC_ALPHA_UP_3 +166 0x1000 //RX_TDDRC_ALPHA_UP_4 +184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +190 0x7000 //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +269 0x0000 //RX_TDDRC_THRD_0 +270 0x0000 //RX_TDDRC_THRD_1 +271 0x1800 //RX_TDDRC_THRD_2 +272 0x1800 //RX_TDDRC_THRD_3 +273 0x3000 //RX_TDDRC_SLANT_0 +274 0x6E00 //RX_TDDRC_SLANT_1 +275 0x1000 //RX_TDDRC_ALPHA_UP_0 +276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x199A //RX_TDDRC_HMNC_GAIN +279 0x0001 //RX_TDDRC_SMT_FLAG +280 0x0CCD //RX_TDDRC_SMT_W +281 0x01E0 //RX_TDDRC_DRC_GAIN +195 0x0030 //RX_FDEQ_SUBNUM +196 0x4848 //RX_FDEQ_GAIN_0 +197 0x4848 //RX_FDEQ_GAIN_1 +198 0x4844 //RX_FDEQ_GAIN_2 +199 0x4B4D //RX_FDEQ_GAIN_3 +200 0x4E50 //RX_FDEQ_GAIN_4 +201 0x5254 //RX_FDEQ_GAIN_5 +202 0x5658 //RX_FDEQ_GAIN_6 +203 0x5C60 //RX_FDEQ_GAIN_7 +204 0x6468 //RX_FDEQ_GAIN_8 +205 0x6C70 //RX_FDEQ_GAIN_9 +206 0x7474 //RX_FDEQ_GAIN_10 +207 0x7474 //RX_FDEQ_GAIN_11 +208 0x7474 //RX_FDEQ_GAIN_12 +209 0x7474 //RX_FDEQ_GAIN_13 +210 0x7474 //RX_FDEQ_GAIN_14 +211 0x7474 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0202 //RX_FDEQ_BIN_0 +221 0x0203 //RX_FDEQ_BIN_1 +222 0x0402 //RX_FDEQ_BIN_2 +223 0x0304 //RX_FDEQ_BIN_3 +224 0x0405 //RX_FDEQ_BIN_4 +225 0x0506 //RX_FDEQ_BIN_5 +226 0x0708 //RX_FDEQ_BIN_6 +227 0x090A //RX_FDEQ_BIN_7 +228 0x0B0C //RX_FDEQ_BIN_8 +229 0x0D0E //RX_FDEQ_BIN_9 +230 0x1214 //RX_FDEQ_BIN_10 +231 0x1E1E //RX_FDEQ_BIN_11 +232 0x1E1E //RX_FDEQ_BIN_12 +233 0x1E1E //RX_FDEQ_BIN_13 +234 0x1E1E //RX_FDEQ_BIN_14 +235 0x202C //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x4000 //RX_FDEQ_RESRV_0 +245 0x0320 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0030 //RX_FDDRC_BAND_MARGIN_1 +248 0x0050 //RX_FDDRC_BAND_MARGIN_2 +249 0x0080 //RX_FDDRC_BAND_MARGIN_3 +250 0x0007 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x5000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x6400 //RX_FDDRC_THRD_3_2 +258 0x6400 //RX_FDDRC_THRD_3_3 +259 0x2000 //RX_FDDRC_SLANT_0_0 +260 0x2000 //RX_FDDRC_SLANT_0_1 +261 0x2000 //RX_FDDRC_SLANT_0_2 +262 0x2000 //RX_FDDRC_SLANT_0_3 +263 0x5333 //RX_FDDRC_SLANT_1_0 +264 0x5333 //RX_FDDRC_SLANT_1_1 +265 0x5333 //RX_FDDRC_SLANT_1_2 +266 0x5333 //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +286 0x0100 //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 +#VOL 3 +163 0x1000 //RX_TDDRC_ALPHA_UP_1 +164 0x1000 //RX_TDDRC_ALPHA_UP_2 +165 0x1000 //RX_TDDRC_ALPHA_UP_3 +166 0x1000 //RX_TDDRC_ALPHA_UP_4 +184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +190 0x7000 //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +269 0x0000 //RX_TDDRC_THRD_0 +270 0x0000 //RX_TDDRC_THRD_1 +271 0x1800 //RX_TDDRC_THRD_2 +272 0x1800 //RX_TDDRC_THRD_3 +273 0x3000 //RX_TDDRC_SLANT_0 +274 0x6E00 //RX_TDDRC_SLANT_1 +275 0x1000 //RX_TDDRC_ALPHA_UP_0 +276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x199A //RX_TDDRC_HMNC_GAIN +279 0x0001 //RX_TDDRC_SMT_FLAG +280 0x0CCD //RX_TDDRC_SMT_W +281 0x01E0 //RX_TDDRC_DRC_GAIN +195 0x0030 //RX_FDEQ_SUBNUM +196 0x4848 //RX_FDEQ_GAIN_0 +197 0x4848 //RX_FDEQ_GAIN_1 +198 0x4844 //RX_FDEQ_GAIN_2 +199 0x4B4D //RX_FDEQ_GAIN_3 +200 0x4E50 //RX_FDEQ_GAIN_4 +201 0x5254 //RX_FDEQ_GAIN_5 +202 0x5658 //RX_FDEQ_GAIN_6 +203 0x5C60 //RX_FDEQ_GAIN_7 +204 0x6468 //RX_FDEQ_GAIN_8 +205 0x6C70 //RX_FDEQ_GAIN_9 +206 0x7474 //RX_FDEQ_GAIN_10 +207 0x7474 //RX_FDEQ_GAIN_11 +208 0x7474 //RX_FDEQ_GAIN_12 +209 0x7474 //RX_FDEQ_GAIN_13 +210 0x7474 //RX_FDEQ_GAIN_14 +211 0x7474 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0202 //RX_FDEQ_BIN_0 +221 0x0203 //RX_FDEQ_BIN_1 +222 0x0402 //RX_FDEQ_BIN_2 +223 0x0304 //RX_FDEQ_BIN_3 +224 0x0405 //RX_FDEQ_BIN_4 +225 0x0506 //RX_FDEQ_BIN_5 +226 0x0708 //RX_FDEQ_BIN_6 +227 0x090A //RX_FDEQ_BIN_7 +228 0x0B0C //RX_FDEQ_BIN_8 +229 0x0D0E //RX_FDEQ_BIN_9 +230 0x1214 //RX_FDEQ_BIN_10 +231 0x1E1E //RX_FDEQ_BIN_11 +232 0x1E1E //RX_FDEQ_BIN_12 +233 0x1E1E //RX_FDEQ_BIN_13 +234 0x1E1E //RX_FDEQ_BIN_14 +235 0x202C //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x4000 //RX_FDEQ_RESRV_0 +245 0x0320 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0030 //RX_FDDRC_BAND_MARGIN_1 +248 0x0050 //RX_FDDRC_BAND_MARGIN_2 +249 0x0080 //RX_FDDRC_BAND_MARGIN_3 +250 0x0007 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x5000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x6400 //RX_FDDRC_THRD_3_2 +258 0x6400 //RX_FDDRC_THRD_3_3 +259 0x2000 //RX_FDDRC_SLANT_0_0 +260 0x2000 //RX_FDDRC_SLANT_0_1 +261 0x2000 //RX_FDDRC_SLANT_0_2 +262 0x2000 //RX_FDDRC_SLANT_0_3 +263 0x5333 //RX_FDDRC_SLANT_1_0 +264 0x5333 //RX_FDDRC_SLANT_1_1 +265 0x5333 //RX_FDDRC_SLANT_1_2 +266 0x5333 //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +286 0x0100 //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 +#VOL 4 +163 0x1000 //RX_TDDRC_ALPHA_UP_1 +164 0x1000 //RX_TDDRC_ALPHA_UP_2 +165 0x1000 //RX_TDDRC_ALPHA_UP_3 +166 0x1000 //RX_TDDRC_ALPHA_UP_4 +184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +190 0x7000 //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +269 0x0000 //RX_TDDRC_THRD_0 +270 0x0000 //RX_TDDRC_THRD_1 +271 0x1800 //RX_TDDRC_THRD_2 +272 0x1800 //RX_TDDRC_THRD_3 +273 0x3000 //RX_TDDRC_SLANT_0 +274 0x6E00 //RX_TDDRC_SLANT_1 +275 0x1000 //RX_TDDRC_ALPHA_UP_0 +276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x199A //RX_TDDRC_HMNC_GAIN +279 0x0001 //RX_TDDRC_SMT_FLAG +280 0x0CCD //RX_TDDRC_SMT_W +281 0x01E0 //RX_TDDRC_DRC_GAIN +195 0x0030 //RX_FDEQ_SUBNUM +196 0x4848 //RX_FDEQ_GAIN_0 +197 0x4848 //RX_FDEQ_GAIN_1 +198 0x4844 //RX_FDEQ_GAIN_2 +199 0x4B4D //RX_FDEQ_GAIN_3 +200 0x4E50 //RX_FDEQ_GAIN_4 +201 0x5254 //RX_FDEQ_GAIN_5 +202 0x5658 //RX_FDEQ_GAIN_6 +203 0x5C60 //RX_FDEQ_GAIN_7 +204 0x6468 //RX_FDEQ_GAIN_8 +205 0x6C70 //RX_FDEQ_GAIN_9 +206 0x7474 //RX_FDEQ_GAIN_10 +207 0x7474 //RX_FDEQ_GAIN_11 +208 0x7474 //RX_FDEQ_GAIN_12 +209 0x7474 //RX_FDEQ_GAIN_13 +210 0x7474 //RX_FDEQ_GAIN_14 +211 0x7474 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0202 //RX_FDEQ_BIN_0 +221 0x0203 //RX_FDEQ_BIN_1 +222 0x0402 //RX_FDEQ_BIN_2 +223 0x0304 //RX_FDEQ_BIN_3 +224 0x0405 //RX_FDEQ_BIN_4 +225 0x0506 //RX_FDEQ_BIN_5 +226 0x0708 //RX_FDEQ_BIN_6 +227 0x090A //RX_FDEQ_BIN_7 +228 0x0B0C //RX_FDEQ_BIN_8 +229 0x0D0E //RX_FDEQ_BIN_9 +230 0x1214 //RX_FDEQ_BIN_10 +231 0x1E1E //RX_FDEQ_BIN_11 +232 0x1E1E //RX_FDEQ_BIN_12 +233 0x1E1E //RX_FDEQ_BIN_13 +234 0x1E1E //RX_FDEQ_BIN_14 +235 0x202C //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x4000 //RX_FDEQ_RESRV_0 +245 0x0320 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0030 //RX_FDDRC_BAND_MARGIN_1 +248 0x0050 //RX_FDDRC_BAND_MARGIN_2 +249 0x0080 //RX_FDDRC_BAND_MARGIN_3 +250 0x0007 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x5000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x6400 //RX_FDDRC_THRD_3_2 +258 0x6400 //RX_FDDRC_THRD_3_3 +259 0x2000 //RX_FDDRC_SLANT_0_0 +260 0x2000 //RX_FDDRC_SLANT_0_1 +261 0x2000 //RX_FDDRC_SLANT_0_2 +262 0x2000 //RX_FDDRC_SLANT_0_3 +263 0x5333 //RX_FDDRC_SLANT_1_0 +264 0x5333 //RX_FDDRC_SLANT_1_1 +265 0x5333 //RX_FDDRC_SLANT_1_2 +266 0x5333 //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +286 0x0100 //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 +#VOL 5 +163 0x1000 //RX_TDDRC_ALPHA_UP_1 +164 0x1000 //RX_TDDRC_ALPHA_UP_2 +165 0x1000 //RX_TDDRC_ALPHA_UP_3 +166 0x1000 //RX_TDDRC_ALPHA_UP_4 +184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +190 0x7000 //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +269 0x0000 //RX_TDDRC_THRD_0 +270 0x0000 //RX_TDDRC_THRD_1 +271 0x1800 //RX_TDDRC_THRD_2 +272 0x1800 //RX_TDDRC_THRD_3 +273 0x3000 //RX_TDDRC_SLANT_0 +274 0x6E00 //RX_TDDRC_SLANT_1 +275 0x1000 //RX_TDDRC_ALPHA_UP_0 +276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x199A //RX_TDDRC_HMNC_GAIN +279 0x0001 //RX_TDDRC_SMT_FLAG +280 0x0CCD //RX_TDDRC_SMT_W +281 0x01E0 //RX_TDDRC_DRC_GAIN +195 0x0030 //RX_FDEQ_SUBNUM +196 0x4848 //RX_FDEQ_GAIN_0 +197 0x4848 //RX_FDEQ_GAIN_1 +198 0x4844 //RX_FDEQ_GAIN_2 +199 0x4B4D //RX_FDEQ_GAIN_3 +200 0x4E50 //RX_FDEQ_GAIN_4 +201 0x5254 //RX_FDEQ_GAIN_5 +202 0x5658 //RX_FDEQ_GAIN_6 +203 0x5C60 //RX_FDEQ_GAIN_7 +204 0x6468 //RX_FDEQ_GAIN_8 +205 0x6C70 //RX_FDEQ_GAIN_9 +206 0x7474 //RX_FDEQ_GAIN_10 +207 0x7474 //RX_FDEQ_GAIN_11 +208 0x7474 //RX_FDEQ_GAIN_12 +209 0x7474 //RX_FDEQ_GAIN_13 +210 0x7474 //RX_FDEQ_GAIN_14 +211 0x7474 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0202 //RX_FDEQ_BIN_0 +221 0x0203 //RX_FDEQ_BIN_1 +222 0x0402 //RX_FDEQ_BIN_2 +223 0x0304 //RX_FDEQ_BIN_3 +224 0x0405 //RX_FDEQ_BIN_4 +225 0x0506 //RX_FDEQ_BIN_5 +226 0x0708 //RX_FDEQ_BIN_6 +227 0x090A //RX_FDEQ_BIN_7 +228 0x0B0C //RX_FDEQ_BIN_8 +229 0x0D0E //RX_FDEQ_BIN_9 +230 0x1214 //RX_FDEQ_BIN_10 +231 0x1E1E //RX_FDEQ_BIN_11 +232 0x1E1E //RX_FDEQ_BIN_12 +233 0x1E1E //RX_FDEQ_BIN_13 +234 0x1E1E //RX_FDEQ_BIN_14 +235 0x202C //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x4000 //RX_FDEQ_RESRV_0 +245 0x0320 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0030 //RX_FDDRC_BAND_MARGIN_1 +248 0x0050 //RX_FDDRC_BAND_MARGIN_2 +249 0x0080 //RX_FDDRC_BAND_MARGIN_3 +250 0x0007 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x5000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x6400 //RX_FDDRC_THRD_3_2 +258 0x6400 //RX_FDDRC_THRD_3_3 +259 0x2000 //RX_FDDRC_SLANT_0_0 +260 0x2000 //RX_FDDRC_SLANT_0_1 +261 0x2000 //RX_FDDRC_SLANT_0_2 +262 0x2000 //RX_FDDRC_SLANT_0_3 +263 0x5333 //RX_FDDRC_SLANT_1_0 +264 0x5333 //RX_FDDRC_SLANT_1_1 +265 0x5333 //RX_FDDRC_SLANT_1_2 +266 0x5333 //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +286 0x0100 //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 +#VOL 6 +163 0x1000 //RX_TDDRC_ALPHA_UP_1 +164 0x1000 //RX_TDDRC_ALPHA_UP_2 +165 0x1000 //RX_TDDRC_ALPHA_UP_3 +166 0x1000 //RX_TDDRC_ALPHA_UP_4 +184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +190 0x7000 //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +269 0x0000 //RX_TDDRC_THRD_0 +270 0x0000 //RX_TDDRC_THRD_1 +271 0x1800 //RX_TDDRC_THRD_2 +272 0x1800 //RX_TDDRC_THRD_3 +273 0x3000 //RX_TDDRC_SLANT_0 +274 0x6E00 //RX_TDDRC_SLANT_1 +275 0x1000 //RX_TDDRC_ALPHA_UP_0 +276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x199A //RX_TDDRC_HMNC_GAIN +279 0x0001 //RX_TDDRC_SMT_FLAG +280 0x0CCD //RX_TDDRC_SMT_W +281 0x01E0 //RX_TDDRC_DRC_GAIN +195 0x0030 //RX_FDEQ_SUBNUM +196 0x4848 //RX_FDEQ_GAIN_0 +197 0x4848 //RX_FDEQ_GAIN_1 +198 0x4844 //RX_FDEQ_GAIN_2 +199 0x4B4D //RX_FDEQ_GAIN_3 +200 0x4E50 //RX_FDEQ_GAIN_4 +201 0x5254 //RX_FDEQ_GAIN_5 +202 0x5658 //RX_FDEQ_GAIN_6 +203 0x5C60 //RX_FDEQ_GAIN_7 +204 0x6468 //RX_FDEQ_GAIN_8 +205 0x6C70 //RX_FDEQ_GAIN_9 +206 0x7474 //RX_FDEQ_GAIN_10 +207 0x7474 //RX_FDEQ_GAIN_11 +208 0x7474 //RX_FDEQ_GAIN_12 +209 0x7474 //RX_FDEQ_GAIN_13 +210 0x7474 //RX_FDEQ_GAIN_14 +211 0x7474 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0202 //RX_FDEQ_BIN_0 +221 0x0203 //RX_FDEQ_BIN_1 +222 0x0402 //RX_FDEQ_BIN_2 +223 0x0304 //RX_FDEQ_BIN_3 +224 0x0405 //RX_FDEQ_BIN_4 +225 0x0506 //RX_FDEQ_BIN_5 +226 0x0708 //RX_FDEQ_BIN_6 +227 0x090A //RX_FDEQ_BIN_7 +228 0x0B0C //RX_FDEQ_BIN_8 +229 0x0D0E //RX_FDEQ_BIN_9 +230 0x1214 //RX_FDEQ_BIN_10 +231 0x1E1E //RX_FDEQ_BIN_11 +232 0x1E1E //RX_FDEQ_BIN_12 +233 0x1E1E //RX_FDEQ_BIN_13 +234 0x1E1E //RX_FDEQ_BIN_14 +235 0x202C //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x4000 //RX_FDEQ_RESRV_0 +245 0x0320 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0030 //RX_FDDRC_BAND_MARGIN_1 +248 0x0050 //RX_FDDRC_BAND_MARGIN_2 +249 0x0080 //RX_FDDRC_BAND_MARGIN_3 +250 0x0007 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x5000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x6400 //RX_FDDRC_THRD_3_2 +258 0x6400 //RX_FDDRC_THRD_3_3 +259 0x2000 //RX_FDDRC_SLANT_0_0 +260 0x2000 //RX_FDDRC_SLANT_0_1 +261 0x2000 //RX_FDDRC_SLANT_0_2 +262 0x2000 //RX_FDDRC_SLANT_0_3 +263 0x5333 //RX_FDDRC_SLANT_1_0 +264 0x5333 //RX_FDDRC_SLANT_1_1 +265 0x5333 //RX_FDDRC_SLANT_1_2 +266 0x5333 //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +286 0x0100 //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 + +#CASE_NAME HANDSET-HANDSET_HAC-TMOBILE_US-FB +#PARAM_MODE Full +#PARAM_TYPE TX+2RX +#TOTAL_CUSTOM_STEP 7+7 +#TX +0 0x0000 //TX_OPERATION_MODE_0 +1 0x0000 //TX_OPERATION_MODE_1 +2 0x0026 //TX_PATCH_REG +3 0x6B7E //TX_SENDFUNC_MODE_0 +4 0x0001 //TX_SENDFUNC_MODE_1 +5 0x0002 //TX_NUM_MIC +6 0x0004 //TX_SAMPLINGFREQ_SIG +7 0x0004 //TX_SAMPLINGFREQ_PROC +8 0x000A //TX_FRAME_SZ_SIG +9 0x000A //TX_FRAME_SZ +10 0x0000 //TX_DELAY_OPT +11 0x0028 //TX_MAX_TAIL_LENGTH +12 0x0001 //TX_NUM_LOUTCHN +13 0x0001 //TX_MAXNUM_AECREF +14 0x0000 //TX_DBG_FUNC_REG +15 0x0000 //TX_DBG_FUNC_REG1 +16 0x0000 //TX_SYS_RESRV_0 +17 0x0000 //TX_SYS_RESRV_1 +18 0x0000 //TX_SYS_RESRV_2 +19 0x0000 //TX_SYS_RESRV_3 +20 0x0000 //TX_DIST2REF0 +21 0x00A3 //TX_DIST2REF1 +22 0x0000 //TX_DIST2REF_02 +23 0x0000 //TX_DIST2REF_03 +24 0x0000 //TX_DIST2REF_04 +25 0x0000 //TX_DIST2REF_05 +26 0x0000 //TX_MMIC +27 0x1000 //TX_PGA_0 +28 0x1000 //TX_PGA_1 +29 0x1000 //TX_PGA_2 +30 0x0000 //TX_PGA_3 +31 0x0000 //TX_PGA_4 +32 0x0000 //TX_PGA_5 +33 0x0000 //TX_MIC_PAIRS +34 0x0000 //TX_MIC_PAIRS_HS +35 0x0002 //TX_MICS_FOR_BF +36 0x0000 //TX_MIC_PAIRS_FORL1 +37 0x0002 //TX_MICS_OF_PAIR0 +38 0x0002 //TX_MICS_OF_PAIR1 +39 0x0002 //TX_MICS_OF_PAIR2 +40 0x0002 //TX_MICS_OF_PAIR3 +41 0x0000 //TX_MIC_DATA_SRC0 +42 0x0002 //TX_MIC_DATA_SRC1 +43 0x0001 //TX_MIC_DATA_SRC2 +44 0x0000 //TX_MIC_DATA_SRC3 +45 0x0000 //TX_MIC_PAIR_CH_04 +46 0x0000 //TX_MIC_PAIR_CH_05 +47 0x0000 //TX_MIC_PAIR_CH_10 +48 0x0000 //TX_MIC_PAIR_CH_11 +49 0x0000 //TX_MIC_PAIR_CH_12 +50 0x0000 //TX_MIC_PAIR_CH_13 +51 0x0000 //TX_MIC_PAIR_CH_14 +52 0x05DC //TX_HD_BIN_MASK +53 0x0010 //TX_HD_SUBAND_MASK +54 0x19A1 //TX_HD_FRAME_AVG_MASK +55 0x0320 //TX_HD_MIN_FRQ +56 0x1000 //TX_HD_ALPHA_PSD +57 0x1100 //TX_T_PHPR1 +58 0x0000 //TX_T_PHPR2 +59 0x0000 //TX_T_PTPR +60 0x0000 //TX_T_PNPR +61 0x0000 //TX_T_PAPR1 +62 0xEE6C //TX_T_PSDVAT +63 0x0800 //TX_CNT +64 0x4000 //TX_ANTI_HOWL_GAIN +65 0x0001 //TX_MICFORBFMARK_0 +66 0x0001 //TX_MICFORBFMARK_1 +67 0x0001 //TX_MICFORBFMARK_2 +68 0x0001 //TX_MICFORBFMARK_3 +69 0x0001 //TX_MICFORBFMARK_4 +70 0x0001 //TX_MICFORBFMARK_5 +71 0x0000 //TX_DIST2REF_10 +72 0x3A66 //TX_DIST2REF_11 +73 0x0000 //TX_DIST2REF2 +74 0x0000 //TX_DIST2REF_13 +75 0x0000 //TX_DIST2REF_14 +76 0x0000 //TX_DIST2REF_15 +77 0x0000 //TX_DIST2REF_20 +78 0x0000 //TX_DIST2REF_21 +79 0x0000 //TX_DIST2REF_22 +80 0x0000 //TX_DIST2REF_23 +81 0x0000 //TX_DIST2REF_24 +82 0x0000 //TX_DIST2REF_25 +83 0x0000 //TX_DIST2REF_30 +84 0x0000 //TX_DIST2REF_31 +85 0x0000 //TX_DIST2REF_32 +86 0x0000 //TX_DIST2REF_33 +87 0x0000 //TX_DIST2REF_34 +88 0x0000 //TX_DIST2REF_35 +89 0x0000 //TX_MIC_LOC_00 +90 0x0000 //TX_MIC_LOC_01 +91 0x0000 //TX_MIC_LOC_02 +92 0x0000 //TX_MIC_LOC_03 +93 0x0000 //TX_MIC_LOC_04 +94 0x0000 //TX_MIC_LOC_05 +95 0x0000 //TX_MIC_LOC_10 +96 0x0000 //TX_MIC_LOC_11 +97 0x0000 //TX_MIC_LOC_12 +98 0x0000 //TX_MIC_LOC_13 +99 0x0000 //TX_MIC_LOC_14 +100 0x0000 //TX_MIC_LOC_15 +101 0x0000 //TX_MIC_LOC_20 +102 0x0000 //TX_MIC_LOC_21 +103 0x0000 //TX_MIC_LOC_22 +104 0x0000 //TX_MIC_LOC_23 +105 0x0000 //TX_MIC_LOC_24 +106 0x0000 //TX_MIC_LOC_25 +107 0x0200 //TX_MIC_REFBLK_VOLUME +108 0x0AAC //TX_MIC_BLOCK_VOLUME +109 0x0000 //TX_INVERSE_MASK +110 0x0000 //TX_ADCS_MASK +111 0x04D0 //TX_ADCS_GAIN +112 0x4000 //TX_NFC_GAINFAC +113 0x0000 //TX_MAINMIC_BLKFACTOR +114 0x0000 //TX_REFMIC_BLKFACTOR +115 0x0000 //TX_BLMIC_BLKFACTOR +116 0x0000 //TX_BRMIC_BLKFACTOR +117 0x0031 //TX_MICBLK_START_BIN +118 0x0060 //TX_MICBLK_END_BIN +119 0x0015 //TX_MICBLK_FE_HOLD +120 0xFFF2 //TX_MICBLK_MR_EXP_TH +121 0xFFF2 //TX_MICBLK_LR_EXP_TH +122 0x0000 //TX_FENE_HOLD +123 0x4000 //TX_FE_ENER_TH_MTS +124 0x0004 //TX_FE_ENER_TH_EXP +125 0x6000 //TX_C_POST_FLT_MIC_MAINBLK +126 0x6000 //TX_C_POST_FLT_MIC_REFBLK +127 0x0010 //TX_MIC_BLOCK_N +128 0x7E56 //TX_A_HP +129 0x4000 //TX_B_PE +130 0x1800 //TX_THR_PITCH_DET_0 +131 0x1000 //TX_THR_PITCH_DET_1 +132 0x0800 //TX_THR_PITCH_DET_2 +133 0x0008 //TX_PITCH_BFR_LEN +134 0x0003 //TX_SBD_PITCH_DET +135 0x0050 //TX_TD_AEC_L +136 0x4000 //TX_MU0_UNP_TD_AEC +137 0x1000 //TX_MU0_PTD_TD_AEC +138 0x0000 //TX_PP_RESRV_0 +139 0x2A94 //TX_PP_RESRV_1 +140 0x55F0 //TX_PP_RESRV_2 +141 0x0000 //TX_PP_RESRV_3 +142 0x0000 //TX_PP_RESRV_4 +143 0x0000 //TX_PP_RESRV_5 +144 0x0000 //TX_PP_RESRV_6 +145 0x0000 //TX_PP_RESRV_7 +146 0x0028 //TX_TAIL_LENGTH +147 0x0080 //TX_AEC_REF_GAIN_0 +148 0x0800 //TX_AEC_REF_GAIN_1 +149 0x0800 //TX_AEC_REF_GAIN_2 +150 0x7900 //TX_EAD_THR +151 0x2000 //TX_THR_RE_EST +152 0x0400 //TX_MIN_EQ_RE_EST_0 +153 0x0400 //TX_MIN_EQ_RE_EST_1 +154 0x0800 //TX_MIN_EQ_RE_EST_2 +155 0x0800 //TX_MIN_EQ_RE_EST_3 +156 0x1000 //TX_MIN_EQ_RE_EST_4 +157 0x1000 //TX_MIN_EQ_RE_EST_5 +158 0x1000 //TX_MIN_EQ_RE_EST_6 +159 0x1000 //TX_MIN_EQ_RE_EST_7 +160 0x1000 //TX_MIN_EQ_RE_EST_8 +161 0x1000 //TX_MIN_EQ_RE_EST_9 +162 0x1000 //TX_MIN_EQ_RE_EST_10 +163 0x1000 //TX_MIN_EQ_RE_EST_11 +164 0x1000 //TX_MIN_EQ_RE_EST_12 +165 0x3000 //TX_LAMBDA_RE_EST +166 0x1000 //TX_LAMBDA_CB_NLE +167 0x1800 //TX_C_POST_FLT +168 0x4000 //TX_GAIN_NP +169 0x003C //TX_SE_HOLD_N +170 0x0046 //TX_DT_HOLD_N +171 0x03E8 //TX_DT2_HOLD_N +172 0x6666 //TX_AEC_RESRV_0 +173 0x0000 //TX_AEC_RESRV_1 +174 0x0014 //TX_AEC_RESRV_2 +175 0x0000 //TX_MIC_DELAY_LENGTH +176 0x0000 //TX_REF_DELAY_LENGTH +177 0x0000 //TX_ADD_LINEIN_GAINL +178 0x0000 //TX_ADD_LINEIN_GAINH +179 0x0000 //TX_MIN_EQ_RE_EST_14 +180 0x0000 //TX_DTD_THR1_8 +181 0x7FFF //TX_DTD_THR2_8 +182 0x0000 //TX_DTD_MIC_BLK2 +183 0x0008 //TX_FRQ_LIN_LEN +184 0x7FFF //TX_FRQ_AEC_LEN_RHO +185 0x6000 //TX_MU0_UNP_FRQ_AEC +186 0x4000 //TX_MU0_PTD_FRQ_AEC +187 0x000A //TX_MINENOISETH +188 0x0800 //TX_MU0_RE_EST +189 0x0001 //TX_AEC_NUM_CH +190 0x0000 //TX_BIGECHOATTENUATION_MAX +191 0x2000 //TX_A_POST_FLT_MICBLK +192 0x0000 //TX_BLKENERTH +193 0x0000 //TX_BLKENERHIGHTH +194 0x0000 //TX_NORMENERTH +195 0x0000 //TX_NORMENERHIGHTH +196 0x0000 //TX_NORMENERHIGHTHL +197 0x7000 //TX_DTD_THR1_0 +198 0x7000 //TX_DTD_THR1_1 +199 0x7000 //TX_DTD_THR1_2 +200 0x7F00 //TX_DTD_THR1_3 +201 0x7F00 //TX_DTD_THR1_4 +202 0x7F00 //TX_DTD_THR1_5 +203 0x7F00 //TX_DTD_THR1_6 +204 0x2000 //TX_DTD_THR2_0 +205 0x2000 //TX_DTD_THR2_1 +206 0x2000 //TX_DTD_THR2_2 +207 0x1000 //TX_DTD_THR2_3 +208 0x1000 //TX_DTD_THR2_4 +209 0x1000 //TX_DTD_THR2_5 +210 0x1000 //TX_DTD_THR2_6 +211 0x6000 //TX_DTD_THR3 +212 0x0177 //TX_SPK_CUT_K +213 0x1B58 //TX_DT_CUT_K +214 0x0100 //TX_DT_CUT_THR +215 0x04EB //TX_COMFORT_G +216 0x01F4 //TX_POWER_YOUT_TH +217 0x4000 //TX_FDPFGAINECHO +218 0x0000 //TX_DTD_HD_THR +219 0x0000 //TX_SPK_CUT_K_S +220 0x0000 //TX_DTD_MIC_BLK +221 0x0400 //TX_ADPT_STRICT_L +222 0x0200 //TX_ADPT_STRICT_H +223 0x0C00 //TX_RATIO_DT_L_TH_LOW +224 0x2000 //TX_RATIO_DT_H_TH_LOW +225 0x1800 //TX_RATIO_DT_L_TH_HIGH +226 0x3000 //TX_RATIO_DT_H_TH_HIGH +227 0x0A00 //TX_RATIO_DT_L0_TH +228 0x7000 //TX_B_POST_FILT_ECHO_L +229 0x7FFF //TX_B_POST_FILT_ECHO_H +230 0x0200 //TX_MIN_G_CTRL_ECHO +231 0x7FFF //TX_B_LESSCUT_RTO_ECHO +232 0x0000 //TX_EPD_OFFSET_00 +233 0x0000 //TX_EPD_OFFST_01 +234 0x1388 //TX_RATIO_DT_L0_TH_HIGH +235 0x3A98 //TX_RATIO_DT_H_TH_CUT +236 0x7FFF //TX_MIN_EQ_RE_EST_13 +237 0x0000 //TX_DTD_THR1_7 +238 0x0000 //TX_DTD_THR2_7 +239 0x0800 //TX_DT_RESRV_7 +240 0x0800 //TX_DT_RESRV_8 +241 0x0000 //TX_DT_RESRV_9 +242 0xF600 //TX_THR_SN_EST_0 +243 0xFA00 //TX_THR_SN_EST_1 +244 0xFA00 //TX_THR_SN_EST_2 +245 0xF800 //TX_THR_SN_EST_3 +246 0xF800 //TX_THR_SN_EST_4 +247 0xF800 //TX_THR_SN_EST_5 +248 0xF800 //TX_THR_SN_EST_6 +249 0xF700 //TX_THR_SN_EST_7 +250 0x0000 //TX_DELTA_THR_SN_EST_0 +251 0x0200 //TX_DELTA_THR_SN_EST_1 +252 0x0200 //TX_DELTA_THR_SN_EST_2 +253 0x0200 //TX_DELTA_THR_SN_EST_3 +254 0x0100 //TX_DELTA_THR_SN_EST_4 +255 0x0200 //TX_DELTA_THR_SN_EST_5 +256 0x0100 //TX_DELTA_THR_SN_EST_6 +257 0x0200 //TX_DELTA_THR_SN_EST_7 +258 0x4000 //TX_LAMBDA_NN_EST_0 +259 0x4000 //TX_LAMBDA_NN_EST_1 +260 0x4000 //TX_LAMBDA_NN_EST_2 +261 0x4000 //TX_LAMBDA_NN_EST_3 +262 0x4000 //TX_LAMBDA_NN_EST_4 +263 0x4000 //TX_LAMBDA_NN_EST_5 +264 0x4000 //TX_LAMBDA_NN_EST_6 +265 0x4000 //TX_LAMBDA_NN_EST_7 +266 0x0400 //TX_N_SN_EST +267 0x001E //TX_INBEAM_T +268 0x0041 //TX_INBEAMHOLDT +269 0x2000 //TX_G_STRICT +270 0x2000 //TX_EQ_THR_BF +271 0x799A //TX_LAMBDA_EQ_BF +272 0x1000 //TX_NE_RTO_TH +273 0x1000 //TX_NE_RTO_TH_L +274 0x1000 //TX_MAINREFRTOH_TH_H +275 0x0600 //TX_MAINREFRTOH_TH_L +276 0x2000 //TX_MAINREFRTO_TH_H +277 0x1400 //TX_MAINREFRTO_TH_L +278 0x0000 //TX_MAINREFRTO_TH_EQ +279 0x1000 //TX_B_POST_FLT_0 +280 0x2000 //TX_B_POST_FLT_1 +281 0x0014 //TX_NS_LVL_CTRL_0 +282 0x0016 //TX_NS_LVL_CTRL_1 +283 0x0016 //TX_NS_LVL_CTRL_2 +284 0x0018 //TX_NS_LVL_CTRL_3 +285 0x0016 //TX_NS_LVL_CTRL_4 +286 0x0012 //TX_NS_LVL_CTRL_5 +287 0x0016 //TX_NS_LVL_CTRL_6 +288 0x0017 //TX_NS_LVL_CTRL_7 +289 0x000E //TX_MIN_GAIN_S_0 +290 0x0007 //TX_MIN_GAIN_S_1 +291 0x0012 //TX_MIN_GAIN_S_2 +292 0x0010 //TX_MIN_GAIN_S_3 +293 0x0012 //TX_MIN_GAIN_S_4 +294 0x0012 //TX_MIN_GAIN_S_5 +295 0x0012 //TX_MIN_GAIN_S_6 +296 0x0012 //TX_MIN_GAIN_S_7 +297 0x6000 //TX_NMOS_SUP +298 0x0000 //TX_NS_MAX_PRI_SNR_TH +299 0x0000 //TX_NMOS_SUP_MENSA +300 0x7FFF //TX_SNRI_SUP_0 +301 0x6000 //TX_SNRI_SUP_1 +302 0x6000 //TX_SNRI_SUP_2 +303 0x6000 //TX_SNRI_SUP_3 +304 0x6000 //TX_SNRI_SUP_4 +305 0x6000 //TX_SNRI_SUP_5 +306 0x6000 //TX_SNRI_SUP_6 +307 0x6000 //TX_SNRI_SUP_7 +308 0x6000 //TX_THR_LFNS +309 0x0017 //TX_G_LFNS +310 0x09C4 //TX_GAIN0_NTH +311 0x000A //TX_MUSIC_MORENS +312 0x7FFF //TX_A_POST_FILT_0 +313 0x2000 //TX_A_POST_FILT_1 +314 0x4000 //TX_A_POST_FILT_S_0 +315 0x4000 //TX_A_POST_FILT_S_1 +316 0x4000 //TX_A_POST_FILT_S_2 +317 0x4000 //TX_A_POST_FILT_S_3 +318 0x4000 //TX_A_POST_FILT_S_4 +319 0x4000 //TX_A_POST_FILT_S_5 +320 0x5000 //TX_A_POST_FILT_S_6 +321 0x7000 //TX_A_POST_FILT_S_7 +322 0x1000 //TX_B_POST_FILT_0 +323 0x2000 //TX_B_POST_FILT_1 +324 0x2000 //TX_B_POST_FILT_2 +325 0x2000 //TX_B_POST_FILT_3 +326 0x2000 //TX_B_POST_FILT_4 +327 0x2000 //TX_B_POST_FILT_5 +328 0x3000 //TX_B_POST_FILT_6 +329 0x3000 //TX_B_POST_FILT_7 +330 0x1000 //TX_B_LESSCUT_RTO_S_0 +331 0x1000 //TX_B_LESSCUT_RTO_S_1 +332 0x1000 //TX_B_LESSCUT_RTO_S_2 +333 0x1000 //TX_B_LESSCUT_RTO_S_3 +334 0x1000 //TX_B_LESSCUT_RTO_S_4 +335 0x1000 //TX_B_LESSCUT_RTO_S_5 +336 0x1000 //TX_B_LESSCUT_RTO_S_6 +337 0x1000 //TX_B_LESSCUT_RTO_S_7 +338 0x7E14 //TX_LAMBDA_PFILT +339 0x7C29 //TX_LAMBDA_PFILT_S_0 +340 0x7C29 //TX_LAMBDA_PFILT_S_1 +341 0x7C29 //TX_LAMBDA_PFILT_S_2 +342 0x7C29 //TX_LAMBDA_PFILT_S_3 +343 0x7C29 //TX_LAMBDA_PFILT_S_4 +344 0x7C29 //TX_LAMBDA_PFILT_S_5 +345 0x7C29 //TX_LAMBDA_PFILT_S_6 +346 0x7C29 //TX_LAMBDA_PFILT_S_7 +347 0x07D0 //TX_K_PEPPER +348 0x0800 //TX_A_PEPPER +349 0x1D4C //TX_K_PEPPER_HF +350 0x0400 //TX_A_PEPPER_HF +351 0x0001 //TX_HMNC_BST_FLG +352 0x4000 //TX_HMNC_BST_THR +353 0x0800 //TX_DT_BINVAD_TH_0 +354 0x0800 //TX_DT_BINVAD_TH_1 +355 0x0800 //TX_DT_BINVAD_TH_2 +356 0x0800 //TX_DT_BINVAD_TH_3 +357 0x0000 //TX_DT_BINVAD_ENDF +358 0x1000 //TX_C_POST_FLT_DT +359 0x7FFF //TX_NS_B_POST_FLT_LESSCUT +360 0x0100 //TX_DT_BOOST +361 0x0000 //TX_BF_SGRAD_FLG +362 0x0005 //TX_BF_DVG_TH +363 0x001E //TX_SN_C_F +364 0x0000 //TX_K_APT +365 0x0001 //TX_NOISEDET +366 0x0190 //TX_NDETCT +367 0x000A //TX_NOISE_TH_0 +368 0x1B58 //TX_NOISE_TH_0_2 +369 0x2134 //TX_NOISE_TH_0_3 +370 0x00C6 //TX_NOISE_TH_1 +371 0x0DAC //TX_NOISE_TH_2 +372 0x2EE0 //TX_NOISE_TH_3 +373 0x47E0 //TX_NOISE_TH_4 +374 0x57E4 //TX_NOISE_TH_5 +375 0x4BD6 //TX_NOISE_TH_5_2 +376 0x0001 //TX_NOISE_TH_5_3 +377 0x4E20 //TX_NOISE_TH_5_4 +378 0x39DF //TX_NOISE_TH_6 +379 0x0014 //TX_MINENOISE_TH +380 0xD508 //TX_MORENS_TFMASK_TH +381 0x0001 //TX_DRC_QUIET_FLOOR +382 0x6D60 //TX_RATIODTL_CUT_TH +383 0x1482 //TX_DT_CUT_K1 +384 0x00A5 //TX_OUT_ENER_S_TH_CLEAN +385 0x00A5 //TX_OUT_ENER_S_TH_LESSCLEAN +386 0x00A5 //TX_OUT_ENER_S_TH_NOISY +387 0x0029 //TX_OUT_ENER_TH_NOISE +388 0x0200 //TX_OUT_ENER_TH_SPEECH +389 0x2000 //TX_SN_NPB_GAIN +390 0x0000 //TX_NN_NPB_GAIN +391 0x3000 //TX_POST_MASK_SUP_HSNE +392 0x07D0 //TX_TAIL_DET_TH +393 0x4000 //TX_B_LESSCUT_RTO_WTA +394 0x0000 //TX_MEL_G_R +395 0x0080 //TX_SUPHIGH_TH +396 0x0000 //TX_MASK_G_R +397 0x0002 //TX_EXTRA_NS_L +398 0x1800 //TX_C_POST_FLT_MASK +399 0x7FFF //TX_A_POST_FLT_WNS +400 0x0148 //TX_MIN_G_LOW300HZ +401 0x0004 //TX_MAXLEVEL_CNG +402 0x00B4 //TX_STN_NOISE_TH +403 0x4000 //TX_POST_MASK_SUP +404 0x7FFF //TX_POST_MASK_ADJUST +405 0x00C8 //TX_NS_ENOISE_MIC0_TH +406 0x0014 //TX_MINENOISE_MIC0_TH +407 0x012C //TX_MINENOISE_MIC0_S_TH +408 0x2900 //TX_MIN_G_CTRL_SSNS +409 0x0800 //TX_METAL_RTO_THR +410 0x0FA0 //TX_NS_FP_K_METAL +411 0x3A98 //TX_NOISEDET_BOOST_TH +412 0x0FA0 //TX_NSMOOTH_TH +413 0x0000 //TX_NS_RESRV_8 +414 0x1800 //TX_RHO_UPB +415 0x2328 //TX_N_HOLD_HS +416 0x006E //TX_N_RHO_BFR0 +417 0x7FFF //TX_LAMBDA_ARSP_EST +418 0x0100 //TX_EXTRA_GAIN_MICBLOCK +419 0x0333 //TX_THR_STD_NSR +420 0x019A //TX_THR_STD_PLH +421 0x03E8 //TX_N_HOLD_STD +422 0x0066 //TX_THR_STD_RHO +423 0x2800 //TX_BF_RESET_THR_HS +424 0x0CCD //TX_SB_RTO_MEAN_TH +425 0x0300 //TX_SB_RHO_MEAN_TH_NTALK +426 0x2000 //TX_SB_RTO_MEAN_TH_ABN +427 0x2EE0 //TX_SB_RTO_MEAN_TH_RUB +428 0x0990 //TX_WTA_EN_RTO_TH +429 0x1400 //TX_TOP_ENER_TH_F +430 0x0100 //TX_DESIRED_TALK_HOLDT +431 0x0800 //TX_MIC_BLOCK_FACTOR +432 0x0000 //TX_NSEST_BFRLRNRDC +433 0x0000 //TX_THR_POST_FLT_HS +434 0x0010 //TX_HS_VAD_BIN +435 0x2666 //TX_THR_VAD_HS +436 0x2CCD //TX_MEAN_RTO_MIN_TH2 +437 0x0032 //TX_SILENCE_T +438 0x0000 //TX_A_POST_FLT_WTA +439 0x799A //TX_LAMBDA_PFLT_WTA +440 0x051E //TX_SB_RHO_MEAN2_TH +441 0x051E //TX_SB_RHO_MEAN3_TH +442 0x0000 //TX_HS_RESRV_4 +443 0x0000 //TX_HS_RESRV_5 +444 0x0001 //TX_DOA_VAD_THR_1 +445 0x003C //TX_DOA_VAD_THR_2 +446 0x0028 //TX_DOA_VAD_THR1_0 +447 0x0028 //TX_DOA_VAD_THR1_1 +448 0x0000 //TX_SRC_DOA_RNG_LOW_0A +449 0x001E //TX_SRC_DOA_RNG_HIGH_0A +450 0x005A //TX_DFLT_SRC_DOA_0A +451 0x0000 //TX_SRC_DOA_RNG_LOW_0B +452 0x0000 //TX_SRC_DOA_RNG_HIGH_0B +453 0x0000 //TX_DFLT_SRC_DOA_0B +454 0x0000 //TX_SRC_DOA_RNG_LOW_0C +455 0x0000 //TX_SRC_DOA_RNG_HIGH_0C +456 0x0000 //TX_DFLT_SRC_DOA_0C +457 0x0000 //TX_SRC_DOA_RNG_LOW_0D +458 0x0000 //TX_SRC_DOA_RNG_HIGH_0D +459 0x0000 //TX_DFLT_SRC_DOA_0D +460 0x0000 //TX_SRC_DOA_RNG_LOW_1A +461 0x00B4 //TX_SRC_DOA_RNG_HIGH_1A +462 0x005A //TX_DFLT_SRC_DOA_1A +463 0x0000 //TX_SRC_DOA_RNG_LOW_1B +464 0x00B4 //TX_SRC_DOA_RNG_HIGH_1B +465 0x005A //TX_DFLT_SRC_DOA_1B +466 0x0000 //TX_SRC_DOA_RNG_LOW_1C +467 0x00B4 //TX_SRC_DOA_RNG_HIGH_1C +468 0x005A //TX_DFLT_SRC_DOA_1C +469 0x0000 //TX_SRC_DOA_RNG_LOW_1D +470 0x00B4 //TX_SRC_DOA_RNG_HIGH_1D +471 0x005A //TX_DFLT_SRC_DOA_1D +472 0x0100 //TX_BF_HOLDOFF_T +473 0x7FFF //TX_DOA_COST_FACTOR +474 0x0D9A //TX_MAINTOREFR_TH0 +475 0x071C //TX_DOA_TRK_THR +476 0x012C //TX_DOA_TRACK_HT +477 0x0200 //TX_N1_HOLD_HF +478 0x0100 //TX_N2_HOLD_HF +479 0x2A3D //TX_BF_RESET_THR_HF +480 0x7333 //TX_DOA_SMOOTH +481 0x0800 //TX_MU_BF +482 0x0800 //TX_BF_MU_LF_B2 +483 0x0040 //TX_BF_FC_END_BIN_B2 +484 0x0020 //TX_BF_FC_END_BIN +485 0x0000 //TX_HF_RESRV_25 +486 0x0000 //TX_HF_RESRV_26 +487 0x0007 //TX_N_DOA_SEED +488 0x0001 //TX_FINE_DOA_SEARCH_FLG +489 0x0000 //TX_HF_RESRV_27 +490 0x038E //TX_DLT_SRC_DOA_RNG +491 0x0200 //TX_BF_MU_LF +492 0x0000 //TX_DFLT_SRC_LOC_0 +493 0x7FFF //TX_DFLT_SRC_LOC_1 +494 0x0000 //TX_DFLT_SRC_LOC_2 +495 0x038E //TX_DOA_TRACK_VADTH +496 0x0000 //TX_DOA_TRACK_NEW +497 0x0300 //TX_NOR_OFF_THR +498 0x7C00 //TX_MORE_ON_700HZ_THR +499 0x2000 //TX_MU_BF_ADPT_NS +500 0x0000 //TX_ADAPT_LEN +501 0x6666 //TX_MORE_SNS +502 0x0000 //TX_NOR_OFF_TH1 +503 0x0000 //TX_WIDE_MASK_TH +504 0xD333 //TX_SUBSNRATIOHIGH4MEANBCK_THR +505 0x6000 //TX_C_POST_FLT_CUT +506 0x2000 //TX_RADIODTLV +507 0x0320 //TX_POWER_LINEIN_TH +508 0x0014 //TX_FE_VADCOUNT_TH_FC +509 0x0000 //TX_ECHO_SUPP_FC +510 0x0C80 //TX_ECHO_TH +511 0x6666 //TX_MIC_TO_BFGAIN +512 0x0000 //TX_MICTOBFGAIN0 +513 0x0000 //TX_FASTMUE_TH +514 0x2CCC //TX_DEREVERB_LF_MU +515 0x3200 //TX_DEREVERB_HF_MU +516 0x0007 //TX_DEREVERB_DELAY +517 0x0004 //TX_DEREVERB_COEF_LEN +518 0x0003 //TX_DEREVERB_DNR +519 0x0000 //TX_DEREVERB_ALPHA +520 0x0000 //TX_DEREVERB_BETA +521 0x7FFF //TX_GSC_RTOL_TH +522 0x7FFF //TX_GSC_RTOH_TH +523 0x7E2C //TX_WIDE2_MEANHTH +524 0x0000 //TX_DR_RESRV_5 +525 0x0000 //TX_DR_RESRV_6 +526 0x0000 //TX_DR_RESRV_7 +527 0x0000 //TX_DR_RESRV_8 +528 0x1333 //TX_WIND_MARK_TH +529 0x399A //TX_CORR_THR +530 0x0004 //TX_SNR_THR +531 0x0010 //TX_ENGY_THR +532 0x1770 //TX_CORR_HIGH_TH +533 0x6000 //TX_ENGY_THR_2 +534 0x3400 //TX_MEAN_RTO_THR +535 0x0028 //TX_WNS_ENOISE_MIC0_TH +536 0x3000 //TX_RATIOMICL_TH +537 0x7FFF //TX_CALIG_HS +538 0x0000 //TX_LVL_CTRL +539 0x0010 //TX_WIND_SUPRTO +540 0x0014 //TX_WNS_MIN_G +541 0x0600 //TX_WNS_B_POST_FLT +542 0x3000 //TX_RATIOMICH_TH +543 0xD120 //TX_WIND_INBEAM_L_TH +544 0x0FA0 //TX_WIND_INBEAM_H_TH +545 0x2000 //TX_WNS_RESRV_0 +546 0x59D8 //TX_WNS_RESRV_1 +547 0x0200 //TX_WNS_RESRV_2 +548 0x0000 //TX_WNS_RESRV_3 +549 0x0000 //TX_WNS_RESRV_4 +550 0x0000 //TX_WNS_RESRV_5 +551 0x0000 //TX_WNS_RESRV_6 +552 0x0000 //TX_PB_B_POST_FLT_LESSCUT +553 0x0070 //TX_BF_LESSCUT_BBIN +554 0x0070 //TX_BF_LESSCUT_EBIN +555 0x0010 //TX_POSTBFB0 +556 0x0070 //TX_POSTBFB +557 0x00B0 //TX_POSTBFE +558 0x0E66 //TX_SPEECH_SNR_TH +559 0x0050 //TX_PB_MAX_PRI_SNR_TH +560 0x770A //TX_MAX_PRI_SNR_TH_L +561 0x0000 //TX_PFGAIN +562 0x0000 //TX_MAINTOREFR_TH +563 0x0000 //TX_SAM_MARK +564 0x0000 //TX_PB_RESRV_0 +565 0x0000 //TX_PB_RESRV_1 +566 0x0030 //TX_FDEQ_SUBNUM +567 0x4C4A //TX_FDEQ_GAIN_0 +568 0x4B4F //TX_FDEQ_GAIN_1 +569 0x504B //TX_FDEQ_GAIN_2 +570 0x4A4C //TX_FDEQ_GAIN_3 +571 0x4A49 //TX_FDEQ_GAIN_4 +572 0x4F48 //TX_FDEQ_GAIN_5 +573 0x4A4E //TX_FDEQ_GAIN_6 +574 0x534E //TX_FDEQ_GAIN_7 +575 0x494F //TX_FDEQ_GAIN_8 +576 0x5E6E //TX_FDEQ_GAIN_9 +577 0x787A //TX_FDEQ_GAIN_10 +578 0x6A58 //TX_FDEQ_GAIN_11 +579 0x5051 //TX_FDEQ_GAIN_12 +580 0x5156 //TX_FDEQ_GAIN_13 +581 0x6168 //TX_FDEQ_GAIN_14 +582 0x7678 //TX_FDEQ_GAIN_15 +583 0x7A87 //TX_FDEQ_GAIN_16 +584 0x9898 //TX_FDEQ_GAIN_17 +585 0x9898 //TX_FDEQ_GAIN_18 +586 0x9848 //TX_FDEQ_GAIN_19 +587 0x4848 //TX_FDEQ_GAIN_20 +588 0x4848 //TX_FDEQ_GAIN_21 +589 0x4848 //TX_FDEQ_GAIN_22 +590 0x4848 //TX_FDEQ_GAIN_23 +591 0x0F03 //TX_FDEQ_BIN_0 +592 0x0909 //TX_FDEQ_BIN_1 +593 0x080F //TX_FDEQ_BIN_2 +594 0x0609 //TX_FDEQ_BIN_3 +595 0x0F03 //TX_FDEQ_BIN_4 +596 0x1402 //TX_FDEQ_BIN_5 +597 0x0E13 //TX_FDEQ_BIN_6 +598 0x110F //TX_FDEQ_BIN_7 +599 0x0E0F //TX_FDEQ_BIN_8 +600 0x0E0F //TX_FDEQ_BIN_9 +601 0x080D //TX_FDEQ_BIN_10 +602 0x0F0F //TX_FDEQ_BIN_11 +603 0x0F0F //TX_FDEQ_BIN_12 +604 0x0A0F //TX_FDEQ_BIN_13 +605 0x0809 //TX_FDEQ_BIN_14 +606 0x0A0B //TX_FDEQ_BIN_15 +607 0x0C0D //TX_FDEQ_BIN_16 +608 0x0E0F //TX_FDEQ_BIN_17 +609 0x1013 //TX_FDEQ_BIN_18 +610 0x0A00 //TX_FDEQ_BIN_19 +611 0x0000 //TX_FDEQ_BIN_20 +612 0x0000 //TX_FDEQ_BIN_21 +613 0x0000 //TX_FDEQ_BIN_22 +614 0x0000 //TX_FDEQ_BIN_23 +615 0x0000 //TX_FDEQ_PADDING +616 0x0030 //TX_PREEQ_SUBNUM_MIC0 +617 0x4848 //TX_PREEQ_GAIN_MIC0_0 +618 0x4848 //TX_PREEQ_GAIN_MIC0_1 +619 0x4848 //TX_PREEQ_GAIN_MIC0_2 +620 0x4848 //TX_PREEQ_GAIN_MIC0_3 +621 0x4848 //TX_PREEQ_GAIN_MIC0_4 +622 0x4848 //TX_PREEQ_GAIN_MIC0_5 +623 0x4848 //TX_PREEQ_GAIN_MIC0_6 +624 0x4848 //TX_PREEQ_GAIN_MIC0_7 +625 0x4848 //TX_PREEQ_GAIN_MIC0_8 +626 0x4848 //TX_PREEQ_GAIN_MIC0_9 +627 0x4848 //TX_PREEQ_GAIN_MIC0_10 +628 0x4848 //TX_PREEQ_GAIN_MIC0_11 +629 0x4848 //TX_PREEQ_GAIN_MIC0_12 +630 0x4848 //TX_PREEQ_GAIN_MIC0_13 +631 0x4848 //TX_PREEQ_GAIN_MIC0_14 +632 0x4848 //TX_PREEQ_GAIN_MIC0_15 +633 0x4848 //TX_PREEQ_GAIN_MIC0_16 +634 0x4848 //TX_PREEQ_GAIN_MIC0_17 +635 0x4848 //TX_PREEQ_GAIN_MIC0_18 +636 0x4848 //TX_PREEQ_GAIN_MIC0_19 +637 0x4848 //TX_PREEQ_GAIN_MIC0_20 +638 0x4848 //TX_PREEQ_GAIN_MIC0_21 +639 0x4848 //TX_PREEQ_GAIN_MIC0_22 +640 0x4848 //TX_PREEQ_GAIN_MIC0_23 +641 0x1812 //TX_PREEQ_BIN_MIC0_0 +642 0x0A0A //TX_PREEQ_BIN_MIC0_1 +643 0x0808 //TX_PREEQ_BIN_MIC0_2 +644 0x080A //TX_PREEQ_BIN_MIC0_3 +645 0x0B09 //TX_PREEQ_BIN_MIC0_4 +646 0x0A06 //TX_PREEQ_BIN_MIC0_5 +647 0x0606 //TX_PREEQ_BIN_MIC0_6 +648 0x0605 //TX_PREEQ_BIN_MIC0_7 +649 0x050A //TX_PREEQ_BIN_MIC0_8 +650 0x1505 //TX_PREEQ_BIN_MIC0_9 +651 0x0506 //TX_PREEQ_BIN_MIC0_10 +652 0x0615 //TX_PREEQ_BIN_MIC0_11 +653 0x1516 //TX_PREEQ_BIN_MIC0_12 +654 0x2021 //TX_PREEQ_BIN_MIC0_13 +655 0x2021 //TX_PREEQ_BIN_MIC0_14 +656 0x2021 //TX_PREEQ_BIN_MIC0_15 +657 0x0800 //TX_PREEQ_BIN_MIC0_16 +658 0x0000 //TX_PREEQ_BIN_MIC0_17 +659 0x0000 //TX_PREEQ_BIN_MIC0_18 +660 0x0000 //TX_PREEQ_BIN_MIC0_19 +661 0x0000 //TX_PREEQ_BIN_MIC0_20 +662 0x0000 //TX_PREEQ_BIN_MIC0_21 +663 0x0000 //TX_PREEQ_BIN_MIC0_22 +664 0x0000 //TX_PREEQ_BIN_MIC0_23 +665 0x0030 //TX_PREEQ_SUBNUM_MIC1 +666 0x4848 //TX_PREEQ_GAIN_MIC1_0 +667 0x4848 //TX_PREEQ_GAIN_MIC1_1 +668 0x4848 //TX_PREEQ_GAIN_MIC1_2 +669 0x4848 //TX_PREEQ_GAIN_MIC1_3 +670 0x4848 //TX_PREEQ_GAIN_MIC1_4 +671 0x4848 //TX_PREEQ_GAIN_MIC1_5 +672 0x4A4C //TX_PREEQ_GAIN_MIC1_6 +673 0x4E50 //TX_PREEQ_GAIN_MIC1_7 +674 0x5456 //TX_PREEQ_GAIN_MIC1_8 +675 0x585C //TX_PREEQ_GAIN_MIC1_9 +676 0x5C64 //TX_PREEQ_GAIN_MIC1_10 +677 0x7478 //TX_PREEQ_GAIN_MIC1_11 +678 0x705C //TX_PREEQ_GAIN_MIC1_12 +679 0x4838 //TX_PREEQ_GAIN_MIC1_13 +680 0x3C70 //TX_PREEQ_GAIN_MIC1_14 +681 0x4848 //TX_PREEQ_GAIN_MIC1_15 +682 0x4848 //TX_PREEQ_GAIN_MIC1_16 +683 0x4848 //TX_PREEQ_GAIN_MIC1_17 +684 0x4848 //TX_PREEQ_GAIN_MIC1_18 +685 0x4848 //TX_PREEQ_GAIN_MIC1_19 +686 0x4848 //TX_PREEQ_GAIN_MIC1_20 +687 0x4848 //TX_PREEQ_GAIN_MIC1_21 +688 0x4848 //TX_PREEQ_GAIN_MIC1_22 +689 0x4848 //TX_PREEQ_GAIN_MIC1_23 +690 0x0202 //TX_PREEQ_BIN_MIC1_0 +691 0x0203 //TX_PREEQ_BIN_MIC1_1 +692 0x0303 //TX_PREEQ_BIN_MIC1_2 +693 0x0304 //TX_PREEQ_BIN_MIC1_3 +694 0x0405 //TX_PREEQ_BIN_MIC1_4 +695 0x0506 //TX_PREEQ_BIN_MIC1_5 +696 0x0708 //TX_PREEQ_BIN_MIC1_6 +697 0x0909 //TX_PREEQ_BIN_MIC1_7 +698 0x090B //TX_PREEQ_BIN_MIC1_8 +699 0x0C10 //TX_PREEQ_BIN_MIC1_9 +700 0x1013 //TX_PREEQ_BIN_MIC1_10 +701 0x1414 //TX_PREEQ_BIN_MIC1_11 +702 0x1414 //TX_PREEQ_BIN_MIC1_12 +703 0x1C1E //TX_PREEQ_BIN_MIC1_13 +704 0x1E28 //TX_PREEQ_BIN_MIC1_14 +705 0x462C //TX_PREEQ_BIN_MIC1_15 +706 0x0000 //TX_PREEQ_BIN_MIC1_16 +707 0x0000 //TX_PREEQ_BIN_MIC1_17 +708 0x0000 //TX_PREEQ_BIN_MIC1_18 +709 0x0000 //TX_PREEQ_BIN_MIC1_19 +710 0x0000 //TX_PREEQ_BIN_MIC1_20 +711 0x0000 //TX_PREEQ_BIN_MIC1_21 +712 0x0000 //TX_PREEQ_BIN_MIC1_22 +713 0x0000 //TX_PREEQ_BIN_MIC1_23 +714 0x0030 //TX_PREEQ_SUBNUM_MIC2 +715 0x4848 //TX_PREEQ_GAIN_MIC2_0 +716 0x4848 //TX_PREEQ_GAIN_MIC2_1 +717 0x4848 //TX_PREEQ_GAIN_MIC2_2 +718 0x4848 //TX_PREEQ_GAIN_MIC2_3 +719 0x4848 //TX_PREEQ_GAIN_MIC2_4 +720 0x4848 //TX_PREEQ_GAIN_MIC2_5 +721 0x4848 //TX_PREEQ_GAIN_MIC2_6 +722 0x4848 //TX_PREEQ_GAIN_MIC2_7 +723 0x4848 //TX_PREEQ_GAIN_MIC2_8 +724 0x4848 //TX_PREEQ_GAIN_MIC2_9 +725 0x4848 //TX_PREEQ_GAIN_MIC2_10 +726 0x4848 //TX_PREEQ_GAIN_MIC2_11 +727 0x4848 //TX_PREEQ_GAIN_MIC2_12 +728 0x4848 //TX_PREEQ_GAIN_MIC2_13 +729 0x4848 //TX_PREEQ_GAIN_MIC2_14 +730 0x4848 //TX_PREEQ_GAIN_MIC2_15 +731 0x4848 //TX_PREEQ_GAIN_MIC2_16 +732 0x4848 //TX_PREEQ_GAIN_MIC2_17 +733 0x4848 //TX_PREEQ_GAIN_MIC2_18 +734 0x4848 //TX_PREEQ_GAIN_MIC2_19 +735 0x4848 //TX_PREEQ_GAIN_MIC2_20 +736 0x4848 //TX_PREEQ_GAIN_MIC2_21 +737 0x4848 //TX_PREEQ_GAIN_MIC2_22 +738 0x4848 //TX_PREEQ_GAIN_MIC2_23 +739 0x0E10 //TX_PREEQ_BIN_MIC2_0 +740 0x1010 //TX_PREEQ_BIN_MIC2_1 +741 0x1010 //TX_PREEQ_BIN_MIC2_2 +742 0x1010 //TX_PREEQ_BIN_MIC2_3 +743 0x1010 //TX_PREEQ_BIN_MIC2_4 +744 0x1010 //TX_PREEQ_BIN_MIC2_5 +745 0x1010 //TX_PREEQ_BIN_MIC2_6 +746 0x1010 //TX_PREEQ_BIN_MIC2_7 +747 0x1010 //TX_PREEQ_BIN_MIC2_8 +748 0x1010 //TX_PREEQ_BIN_MIC2_9 +749 0x1010 //TX_PREEQ_BIN_MIC2_10 +750 0x1010 //TX_PREEQ_BIN_MIC2_11 +751 0x1010 //TX_PREEQ_BIN_MIC2_12 +752 0x1010 //TX_PREEQ_BIN_MIC2_13 +753 0x1010 //TX_PREEQ_BIN_MIC2_14 +754 0x0200 //TX_PREEQ_BIN_MIC2_15 +755 0x0000 //TX_PREEQ_BIN_MIC2_16 +756 0x0000 //TX_PREEQ_BIN_MIC2_17 +757 0x0000 //TX_PREEQ_BIN_MIC2_18 +758 0x0000 //TX_PREEQ_BIN_MIC2_19 +759 0x0000 //TX_PREEQ_BIN_MIC2_20 +760 0x0000 //TX_PREEQ_BIN_MIC2_21 +761 0x0000 //TX_PREEQ_BIN_MIC2_22 +762 0x0000 //TX_PREEQ_BIN_MIC2_23 +763 0x0006 //TX_MASKING_ABILITY +764 0x2000 //TX_NND_WEIGHT +765 0x0060 //TX_MIC_CALIBRATION_0 +766 0x0060 //TX_MIC_CALIBRATION_1 +767 0x0070 //TX_MIC_CALIBRATION_2 +768 0x0070 //TX_MIC_CALIBRATION_3 +769 0x0050 //TX_MIC_PWR_BIAS_0 +770 0x0040 //TX_MIC_PWR_BIAS_1 +771 0x0040 //TX_MIC_PWR_BIAS_2 +772 0x0040 //TX_MIC_PWR_BIAS_3 +773 0x0009 //TX_GAIN_LIMIT_0 +774 0x000F //TX_GAIN_LIMIT_1 +775 0x000F //TX_GAIN_LIMIT_2 +776 0x000F //TX_GAIN_LIMIT_3 +777 0x7F5B //TX_BVE_NOVAD0_ALPHADOWN +778 0x7FDE //TX_BVE_VAD0_ALPHAUP +779 0x7F3A //TX_BVE_VAD0_ALPHADOWN +780 0x2000 //TX_BVE_GAINWEIGHT_NOFEVADLI +781 0x7F5B //TX_BVE_FEVADLI_ALPHA +782 0x7F19 //TX_BVE_NOVAD0_ALPHAUP +783 0x1000 //TX_TDDRC_ALPHA_UP_01 +784 0x1000 //TX_TDDRC_ALPHA_UP_02 +785 0x1000 //TX_TDDRC_ALPHA_UP_03 +786 0x1000 //TX_TDDRC_ALPHA_UP_04 +787 0x7EB8 //TX_TDDRC_ALPHA_DWN_01 +788 0x7EB8 //TX_TDDRC_ALPHA_DWN_02 +789 0x7EB8 //TX_TDDRC_ALPHA_DWN_03 +790 0x7EB8 //TX_TDDRC_ALPHA_DWN_04 +791 0x7FFF //TX_TDDRC_TD_DRC_LIMIT +792 0x0800 //TX_TDDRC_POST_LIMIT_GAIN +793 0x0000 //TX_TDDRC_RESRV_0 +794 0x0000 //TX_TDDRC_RESRV_1 +795 0x0018 //TX_FDDRC_BAND_MARGIN_0 +796 0x0030 //TX_FDDRC_BAND_MARGIN_1 +797 0x0050 //TX_FDDRC_BAND_MARGIN_2 +798 0x0080 //TX_FDDRC_BAND_MARGIN_3 +799 0x0007 //TX_FDDRC_BLOCK_EXP +800 0x5000 //TX_FDDRC_THRD_2_0 +801 0x5000 //TX_FDDRC_THRD_2_1 +802 0x5000 //TX_FDDRC_THRD_2_2 +803 0x5000 //TX_FDDRC_THRD_2_3 +804 0x6400 //TX_FDDRC_THRD_3_0 +805 0x6400 //TX_FDDRC_THRD_3_1 +806 0x6400 //TX_FDDRC_THRD_3_2 +807 0x6400 //TX_FDDRC_THRD_3_3 +808 0x2000 //TX_FDDRC_SLANT_0_0 +809 0x2000 //TX_FDDRC_SLANT_0_1 +810 0x2000 //TX_FDDRC_SLANT_0_2 +811 0x2000 //TX_FDDRC_SLANT_0_3 +812 0x5333 //TX_FDDRC_SLANT_1_0 +813 0x5333 //TX_FDDRC_SLANT_1_1 +814 0x5333 //TX_FDDRC_SLANT_1_2 +815 0x5333 //TX_FDDRC_SLANT_1_3 +816 0x0010 //TX_DEADMIC_SILENCE_TH +817 0x0600 //TX_MIC_DEGRADE_TH +818 0x0078 //TX_DEADMIC_CNT +819 0x0078 //TX_MIC_DEGRADE_CNT +820 0x0000 //TX_FDDRC_RESRV_4 +821 0x0000 //TX_FDDRC_RESRV_5 +822 0x0000 //TX_FDDRC_RESRV_6 +823 0x7FFF //TX_KS_NOISEPASTE_FACTOR +824 0x0001 //TX_KS_CONFIG +825 0x7FFF //TX_KS_GAIN_MIN +826 0x0000 //TX_KS_RESRV_0 +827 0x0000 //TX_KS_RESRV_1 +828 0x0000 //TX_KS_RESRV_2 +829 0x7C00 //TX_LAMBDA_PKA_FP +830 0x2000 //TX_TPKA_FP +831 0x0080 //TX_MIN_G_FP +832 0x2000 //TX_MAX_G_FP +833 0x0FA0 //TX_FFP_FP_K_METAL +834 0x4000 //TX_A_POST_FLT_FP +835 0x0F5C //TX_RTO_OUTBEAM_TH +836 0x4CCD //TX_TPKA_FP_THD +837 0x0000 //TX_MAX_G_FP_BLK +838 0x0000 //TX_FFP_FADEIN +839 0x0000 //TX_FFP_FADEOUT +840 0x0000 //TX_WHISPERCTH +841 0x0000 //TX_WHISPERHOLDT +842 0x0000 //TX_WHISP_ENTHH +843 0x0000 //TX_WHISP_ENTHL +844 0x0000 //TX_WHISP_RTOTH +845 0x0000 //TX_WHISP_RTOTH2 +846 0x0096 //TX_MUTE_PERIOD +847 0x0000 //TX_FADE_IN_PERIOD +848 0x0100 //TX_FFP_RESRV_2 +849 0x0020 //TX_FFP_RESRV_3 +850 0x0000 //TX_FFP_RESRV_4 +851 0x0000 //TX_FFP_RESRV_5 +852 0x0000 //TX_FFP_RESRV_6 +853 0x0002 //TX_FILTINDX +854 0x0000 //TX_TDDRC_THRD_0 +855 0x0000 //TX_TDDRC_THRD_1 +856 0x1800 //TX_TDDRC_THRD_2 +857 0x1800 //TX_TDDRC_THRD_3 +858 0x3000 //TX_TDDRC_SLANT_0 +859 0x7E00 //TX_TDDRC_SLANT_1 +860 0x1000 //TX_TDDRC_ALPHA_UP_00 +861 0x7EB8 //TX_TDDRC_ALPHA_DWN_00 +862 0x0000 //TX_TDDRC_HMNC_FLAG +863 0x199A //TX_TDDRC_HMNC_GAIN +864 0x0000 //TX_TDDRC_SMT_FLAG +865 0x0CCD //TX_TDDRC_SMT_W +866 0x0504 //TX_TDDRC_DRC_GAIN +867 0x7FFF //TX_TDDRC_LMT_THRD +868 0x0000 //TX_TDDRC_LMT_ALPHA +869 0x0000 //TX_TFMASKLTH +870 0x0000 //TX_TFMASKLTHL +871 0x0CCD //TX_TFMASKHTH +872 0xECCD //TX_TFMASKLTH_BINVAD +873 0xFCCD //TX_TFMASKLTH_NS_EST +874 0xF800 //TX_TFMASKLTH_DOA +875 0x0CCD //TX_TFMASKTH_BLESSCUT +876 0x1000 //TX_B_LESSCUT_RTO_MASK +877 0x2000 //TX_SB_RHO_MEAN_TH_ABN +878 0x2000 //TX_B_POST_FLT_MASK +879 0x0000 //TX_B_POST_FLT_MASK1 +880 0x6333 //TX_GAIN_WIND_MASK +881 0x0000 //TX_TFMASK_BFSTRICT_MUSIC +882 0x0000 //TX_TFMASK_BFSTRICT_NOMUSIC +883 0x7333 //TX_FASTNS_OUTIN_TH +884 0x0CCD //TX_FASTNS_TFMASK_TH +885 0x0CCD //TX_FASTNS_TFMASKBIN_TH1 +886 0x0CCD //TX_FASTNS_TFMASKBIN_TH2 +887 0x0CCD //TX_FASTNS_TFMASKBIN_TH3 +888 0x0028 //TX_FASTNS_ARSPC_TH +889 0xC000 //TX_FASTNS_MASK5_TH +890 0x0810 //TX_POSTSSA_MIN_G_VR_MASK +891 0x1000 //TX_A_LESSCUT_RTO_MASK +892 0x1770 //TX_FASTNS_NOISETH +893 0xC000 //TX_FASTNS_SSA_THLFL +894 0xC000 //TX_FASTNS_SSA_THHFL +895 0xCCCC //TX_FASTNS_SSA_THLFH +896 0xD999 //TX_FASTNS_SSA_THHFH +897 0x2339 //TX_SENDFUNC_REG_MICMUTE +898 0x0021 //TX_SENDFUNC_REG_MICMUTE1 +899 0x02BC //TX_MICMUTE_RATIO_THR +900 0x0140 //TX_MICMUTE_AMP_THR +901 0x0004 //TX_MICMUTE_HPF_IND +902 0x00C0 //TX_MICMUTE_LOG_EYR_TH +903 0x0008 //TX_MICMUTE_CVG_TIME +904 0x0008 //TX_MICMUTE_RELEASE_TIME +905 0x01FE //TX_MIC_VOLUME_MIC0MUTE +906 0x0020 //TX_MICMUTE_EPD_OFFSET_0 +907 0x001E //TX_MICMUTE_FRQ_AEC_L +908 0x7999 //TX_MICMUTE_EAD_THR +909 0x7FFF //TX_MICMUTE_LAMBDA_CB_NLE +910 0x7FFF //TX_MICMUTE_LAMBDA_RE_EST +911 0x4000 //TX_DTD_THR1_MICMUTE_0 +912 0x7000 //TX_DTD_THR1_MICMUTE_1 +913 0x7FFF //TX_DTD_THR1_MICMUTE_2 +914 0x7FFF //TX_DTD_THR1_MICMUTE_3 +915 0x6CCC //TX_DTD_THR2_MICMUTE_0 +916 0x0400 //TX_MICMUTE_MIN_EQ_RE_EST_0 +917 0x0400 //TX_MICMUTE_MIN_EQ_RE_EST_1 +918 0x1000 //TX_MICMUTE_MIN_EQ_RE_EST_2 +919 0x7FFF //TX_MICMUTE_MIN_EQ_RE_EST_3 +920 0x7FFF //TX_MICMUTE_MIN_EQ_RE_EST_4 +921 0x4000 //TX_MICMUTE_C_POST_FLT +922 0x03E8 //TX_MICMUTE_DT_CUT_K +923 0x0001 //TX_MICMUTE_DT_CUT_THR +924 0x03E8 //TX_MICMUTE_DT_CUT_K2 +925 0x0001 //TX_MICMUTE_DT_CUT_THR2 +926 0x0064 //TX_MICMUTE_DT2_HOLD_N +927 0x1000 //TX_MICMUTE_RATIODTH_THCUT +928 0x1000 //TX_MICMUTE_B_POST_FLT_ECHOL +929 0x7FFF //TX_MICMUTE_B_POST_FLT_ECHOH +930 0x0400 //TX_MICMUTE_C_POST_FLT_MASK +931 0x7999 //TX_MICMUTE_RATIODTL_CUT_TH +932 0x0258 //TX_MICMUTE_DT_CUT_K1 +933 0x0800 //TX_MICMUTE_N2_SN_EST +934 0xFC00 //TX_MICMUTE_THR_SN_EST_0 +935 0x001C //TX_MICMUTE_MIN_G_CTRL_0 +936 0x6000 //TX_MICMUTE_A_POST_FILT_S_0 +937 0x7000 //TX_MICMUTE_B_POST_FILT_0 +938 0x2710 //TX_MIC1RUB_AMP_THR +939 0x0010 //TX_MIC1MUTE_RATIO_THR +940 0x0450 //TX_MIC1MUTE_AMP_THR +941 0x0008 //TX_MIC1MUTE_CVG_TIME +942 0x0008 //TX_MIC1MUTE_RELEASE_TIME +943 0x0000 //TX_AMS_RESRV_01 +944 0x0000 //TX_AMS_RESRV_02 +945 0x0000 //TX_AMS_RESRV_03 +946 0x0000 //TX_AMS_RESRV_04 +947 0x0000 //TX_AMS_RESRV_05 +948 0x0000 //TX_AMS_RESRV_06 +949 0x0000 //TX_AMS_RESRV_07 +950 0x0000 //TX_AMS_RESRV_08 +951 0x0000 //TX_AMS_RESRV_09 +952 0x0000 //TX_AMS_RESRV_10 +953 0x0000 //TX_AMS_RESRV_11 +954 0x0000 //TX_AMS_RESRV_12 +955 0x0000 //TX_AMS_RESRV_13 +956 0x0000 //TX_AMS_RESRV_14 +957 0x0000 //TX_AMS_RESRV_15 +958 0x0000 //TX_AMS_RESRV_16 +959 0x0000 //TX_AMS_RESRV_17 +960 0x0000 //TX_AMS_RESRV_18 +961 0x0000 //TX_AMS_RESRV_19 +#RX +0 0x000C //RX_RECVFUNC_MODE_0 +1 0x0000 //RX_RECVFUNC_MODE_1 +2 0x0004 //RX_SAMPLINGFREQ_SIG +3 0x0004 //RX_SAMPLINGFREQ_PROC +4 0x000A //RX_FRAME_SZ +5 0x0000 //RX_DELAY_OPT +6 0x1000 //RX_TDDRC_ALPHA_UP_1 +7 0x1000 //RX_TDDRC_ALPHA_UP_2 +8 0x1000 //RX_TDDRC_ALPHA_UP_3 +9 0x1000 //RX_TDDRC_ALPHA_UP_4 +10 0x0800 //RX_PGA +11 0x7FFF //RX_A_HP +12 0x4000 //RX_B_PE +13 0x5800 //RX_THR_PITCH_DET_0 +14 0x5000 //RX_THR_PITCH_DET_1 +15 0x4000 //RX_THR_PITCH_DET_2 +16 0x0008 //RX_PITCH_BFR_LEN +17 0x0003 //RX_SBD_PITCH_DET +18 0x0100 //RX_PP_RESRV_0 +19 0x0020 //RX_PP_RESRV_1 +20 0x0600 //RX_N_SN_EST +21 0x000C //RX_N2_SN_EST +22 0x000F //RX_NS_LVL_CTRL +23 0xF800 //RX_THR_SN_EST +24 0x7E00 //RX_LAMBDA_PFILT +25 0x000A //RX_FENS_RESRV_0 +26 0x0190 //RX_FENS_RESRV_1 +27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +30 0x0002 //RX_EXTRA_NS_L +31 0x0800 //RX_EXTRA_NS_A +32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +33 0x7000 //RX_TDDRC_LIMITER_THRD +34 0x0800 //RX_TDDRC_LIMITER_GAIN +35 0x199A //RX_A_POST_FLT +36 0x0000 //RX_LMT_THRD +37 0x4000 //RX_LMT_ALPHA +38 0x0030 //RX_FDEQ_SUBNUM +39 0x4848 //RX_FDEQ_GAIN_0 +40 0x4848 //RX_FDEQ_GAIN_1 +41 0x4844 //RX_FDEQ_GAIN_2 +42 0x4B4D //RX_FDEQ_GAIN_3 +43 0x4E50 //RX_FDEQ_GAIN_4 +44 0x5254 //RX_FDEQ_GAIN_5 +45 0x5658 //RX_FDEQ_GAIN_6 +46 0x5C60 //RX_FDEQ_GAIN_7 +47 0x6468 //RX_FDEQ_GAIN_8 +48 0x6C70 //RX_FDEQ_GAIN_9 +49 0x7474 //RX_FDEQ_GAIN_10 +50 0x7474 //RX_FDEQ_GAIN_11 +51 0x7474 //RX_FDEQ_GAIN_12 +52 0x7474 //RX_FDEQ_GAIN_13 +53 0x7474 //RX_FDEQ_GAIN_14 +54 0x7474 //RX_FDEQ_GAIN_15 +55 0x4848 //RX_FDEQ_GAIN_16 +56 0x4848 //RX_FDEQ_GAIN_17 +57 0x4848 //RX_FDEQ_GAIN_18 +58 0x4848 //RX_FDEQ_GAIN_19 +59 0x4848 //RX_FDEQ_GAIN_20 +60 0x4848 //RX_FDEQ_GAIN_21 +61 0x4848 //RX_FDEQ_GAIN_22 +62 0x4848 //RX_FDEQ_GAIN_23 +63 0x0202 //RX_FDEQ_BIN_0 +64 0x0203 //RX_FDEQ_BIN_1 +65 0x0402 //RX_FDEQ_BIN_2 +66 0x0304 //RX_FDEQ_BIN_3 +67 0x0405 //RX_FDEQ_BIN_4 +68 0x0506 //RX_FDEQ_BIN_5 +69 0x0708 //RX_FDEQ_BIN_6 +70 0x090A //RX_FDEQ_BIN_7 +71 0x0B0C //RX_FDEQ_BIN_8 +72 0x0D0E //RX_FDEQ_BIN_9 +73 0x1214 //RX_FDEQ_BIN_10 +74 0x1E1E //RX_FDEQ_BIN_11 +75 0x1E1E //RX_FDEQ_BIN_12 +76 0x1E1E //RX_FDEQ_BIN_13 +77 0x1E1E //RX_FDEQ_BIN_14 +78 0x202C //RX_FDEQ_BIN_15 +79 0x0000 //RX_FDEQ_BIN_16 +80 0x0000 //RX_FDEQ_BIN_17 +81 0x0000 //RX_FDEQ_BIN_18 +82 0x0000 //RX_FDEQ_BIN_19 +83 0x0000 //RX_FDEQ_BIN_20 +84 0x0000 //RX_FDEQ_BIN_21 +85 0x0000 //RX_FDEQ_BIN_22 +86 0x0000 //RX_FDEQ_BIN_23 +87 0x4000 //RX_FDEQ_RESRV_0 +88 0x0320 //RX_FDEQ_RESRV_1 +89 0x0018 //RX_FDDRC_BAND_MARGIN_0 +90 0x0030 //RX_FDDRC_BAND_MARGIN_1 +91 0x0050 //RX_FDDRC_BAND_MARGIN_2 +92 0x0080 //RX_FDDRC_BAND_MARGIN_3 +93 0x0007 //RX_FDDRC_BLOCK_EXP +94 0x5000 //RX_FDDRC_THRD_2_0 +95 0x5000 //RX_FDDRC_THRD_2_1 +96 0x5000 //RX_FDDRC_THRD_2_2 +97 0x5000 //RX_FDDRC_THRD_2_3 +98 0x6400 //RX_FDDRC_THRD_3_0 +99 0x6400 //RX_FDDRC_THRD_3_1 +100 0x6400 //RX_FDDRC_THRD_3_2 +101 0x6400 //RX_FDDRC_THRD_3_3 +102 0x2000 //RX_FDDRC_SLANT_0_0 +103 0x2000 //RX_FDDRC_SLANT_0_1 +104 0x2000 //RX_FDDRC_SLANT_0_2 +105 0x2000 //RX_FDDRC_SLANT_0_3 +106 0x5333 //RX_FDDRC_SLANT_1_0 +107 0x5333 //RX_FDDRC_SLANT_1_1 +108 0x5333 //RX_FDDRC_SLANT_1_2 +109 0x5333 //RX_FDDRC_SLANT_1_3 +110 0x0000 //RX_FDDRC_RESRV_0 +111 0x0002 //RX_FILTINDX +112 0x0000 //RX_TDDRC_THRD_0 +113 0x0000 //RX_TDDRC_THRD_1 +114 0x1800 //RX_TDDRC_THRD_2 +115 0x1800 //RX_TDDRC_THRD_3 +116 0x3000 //RX_TDDRC_SLANT_0 +117 0x6E00 //RX_TDDRC_SLANT_1 +118 0x1000 //RX_TDDRC_ALPHA_UP_0 +119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +120 0x0000 //RX_TDDRC_HMNC_FLAG +121 0x199A //RX_TDDRC_HMNC_GAIN +122 0x0001 //RX_TDDRC_SMT_FLAG +123 0x0CCD //RX_TDDRC_SMT_W +124 0x01E0 //RX_TDDRC_DRC_GAIN +125 0x7C00 //RX_LAMBDA_PKA_FP +126 0x2000 //RX_TPKA_FP +127 0x2000 //RX_MIN_G_FP +128 0x0080 //RX_MAX_G_FP +129 0x0100 //RX_SPK_VOL +130 0x0000 //RX_VOL_RESRV_0 +131 0x0000 //RX_MAXLEVEL_CNG +132 0x3000 //RX_BWE_UV_TH +133 0x3000 //RX_BWE_UV_TH2 +134 0x1800 //RX_BWE_UV_TH3 +135 0x1000 //RX_BWE_V_TH +136 0x04CD //RX_BWE_GAIN1_V_TH1 +137 0x0F33 //RX_BWE_GAIN1_V_TH2 +138 0x7333 //RX_BWE_UV_EQ +139 0x199A //RX_BWE_V_EQ +140 0x7333 //RX_BWE_TONE_TH +141 0x0004 //RX_BWE_UV_HOLD_T +142 0x6CCD //RX_BWE_GAIN2_ALPHA +143 0x799A //RX_BWE_GAIN3_ALPHA +144 0x001E //RX_BWE_CUTOFF +145 0x3000 //RX_BWE_GAINFILL +146 0x3200 //RX_BWE_MAXTH_TONE +147 0x2000 //RX_BWE_EQ_0 +148 0x2000 //RX_BWE_EQ_1 +149 0x2000 //RX_BWE_EQ_2 +150 0x2000 //RX_BWE_EQ_3 +151 0x2000 //RX_BWE_EQ_4 +152 0x2000 //RX_BWE_EQ_5 +153 0x2000 //RX_BWE_EQ_6 +154 0x0000 //RX_BWE_RESRV_0 +155 0x0000 //RX_BWE_RESRV_1 +156 0x0000 //RX_BWE_RESRV_2 +#VOL 0 +6 0x1000 //RX_TDDRC_ALPHA_UP_1 +7 0x1000 //RX_TDDRC_ALPHA_UP_2 +8 0x1000 //RX_TDDRC_ALPHA_UP_3 +9 0x1000 //RX_TDDRC_ALPHA_UP_4 +27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +33 0x7000 //RX_TDDRC_LIMITER_THRD +34 0x0800 //RX_TDDRC_LIMITER_GAIN +112 0x0000 //RX_TDDRC_THRD_0 +113 0x0000 //RX_TDDRC_THRD_1 +114 0x1800 //RX_TDDRC_THRD_2 +115 0x1800 //RX_TDDRC_THRD_3 +116 0x3000 //RX_TDDRC_SLANT_0 +117 0x6E00 //RX_TDDRC_SLANT_1 +118 0x1000 //RX_TDDRC_ALPHA_UP_0 +119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +120 0x0000 //RX_TDDRC_HMNC_FLAG +121 0x199A //RX_TDDRC_HMNC_GAIN +122 0x0001 //RX_TDDRC_SMT_FLAG +123 0x0CCD //RX_TDDRC_SMT_W +124 0x01E0 //RX_TDDRC_DRC_GAIN +38 0x0030 //RX_FDEQ_SUBNUM +39 0x4848 //RX_FDEQ_GAIN_0 +40 0x4848 //RX_FDEQ_GAIN_1 +41 0x4844 //RX_FDEQ_GAIN_2 +42 0x4B4D //RX_FDEQ_GAIN_3 +43 0x4E50 //RX_FDEQ_GAIN_4 +44 0x5254 //RX_FDEQ_GAIN_5 +45 0x5658 //RX_FDEQ_GAIN_6 +46 0x5C60 //RX_FDEQ_GAIN_7 +47 0x6468 //RX_FDEQ_GAIN_8 +48 0x6C70 //RX_FDEQ_GAIN_9 +49 0x7474 //RX_FDEQ_GAIN_10 +50 0x7474 //RX_FDEQ_GAIN_11 +51 0x7474 //RX_FDEQ_GAIN_12 +52 0x7474 //RX_FDEQ_GAIN_13 +53 0x7474 //RX_FDEQ_GAIN_14 +54 0x7474 //RX_FDEQ_GAIN_15 +55 0x4848 //RX_FDEQ_GAIN_16 +56 0x4848 //RX_FDEQ_GAIN_17 +57 0x4848 //RX_FDEQ_GAIN_18 +58 0x4848 //RX_FDEQ_GAIN_19 +59 0x4848 //RX_FDEQ_GAIN_20 +60 0x4848 //RX_FDEQ_GAIN_21 +61 0x4848 //RX_FDEQ_GAIN_22 +62 0x4848 //RX_FDEQ_GAIN_23 +63 0x0202 //RX_FDEQ_BIN_0 +64 0x0203 //RX_FDEQ_BIN_1 +65 0x0402 //RX_FDEQ_BIN_2 +66 0x0304 //RX_FDEQ_BIN_3 +67 0x0405 //RX_FDEQ_BIN_4 +68 0x0506 //RX_FDEQ_BIN_5 +69 0x0708 //RX_FDEQ_BIN_6 +70 0x090A //RX_FDEQ_BIN_7 +71 0x0B0C //RX_FDEQ_BIN_8 +72 0x0D0E //RX_FDEQ_BIN_9 +73 0x1214 //RX_FDEQ_BIN_10 +74 0x1E1E //RX_FDEQ_BIN_11 +75 0x1E1E //RX_FDEQ_BIN_12 +76 0x1E1E //RX_FDEQ_BIN_13 +77 0x1E1E //RX_FDEQ_BIN_14 +78 0x202C //RX_FDEQ_BIN_15 +79 0x0000 //RX_FDEQ_BIN_16 +80 0x0000 //RX_FDEQ_BIN_17 +81 0x0000 //RX_FDEQ_BIN_18 +82 0x0000 //RX_FDEQ_BIN_19 +83 0x0000 //RX_FDEQ_BIN_20 +84 0x0000 //RX_FDEQ_BIN_21 +85 0x0000 //RX_FDEQ_BIN_22 +86 0x0000 //RX_FDEQ_BIN_23 +87 0x4000 //RX_FDEQ_RESRV_0 +88 0x0320 //RX_FDEQ_RESRV_1 +89 0x0018 //RX_FDDRC_BAND_MARGIN_0 +90 0x0030 //RX_FDDRC_BAND_MARGIN_1 +91 0x0050 //RX_FDDRC_BAND_MARGIN_2 +92 0x0080 //RX_FDDRC_BAND_MARGIN_3 +93 0x0007 //RX_FDDRC_BLOCK_EXP +94 0x5000 //RX_FDDRC_THRD_2_0 +95 0x5000 //RX_FDDRC_THRD_2_1 +96 0x5000 //RX_FDDRC_THRD_2_2 +97 0x5000 //RX_FDDRC_THRD_2_3 +98 0x6400 //RX_FDDRC_THRD_3_0 +99 0x6400 //RX_FDDRC_THRD_3_1 +100 0x6400 //RX_FDDRC_THRD_3_2 +101 0x6400 //RX_FDDRC_THRD_3_3 +102 0x2000 //RX_FDDRC_SLANT_0_0 +103 0x2000 //RX_FDDRC_SLANT_0_1 +104 0x2000 //RX_FDDRC_SLANT_0_2 +105 0x2000 //RX_FDDRC_SLANT_0_3 +106 0x5333 //RX_FDDRC_SLANT_1_0 +107 0x5333 //RX_FDDRC_SLANT_1_1 +108 0x5333 //RX_FDDRC_SLANT_1_2 +109 0x5333 //RX_FDDRC_SLANT_1_3 +110 0x0000 //RX_FDDRC_RESRV_0 +129 0x0100 //RX_SPK_VOL +130 0x0000 //RX_VOL_RESRV_0 +#VOL 1 +6 0x1000 //RX_TDDRC_ALPHA_UP_1 +7 0x1000 //RX_TDDRC_ALPHA_UP_2 +8 0x1000 //RX_TDDRC_ALPHA_UP_3 +9 0x1000 //RX_TDDRC_ALPHA_UP_4 +27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +33 0x7000 //RX_TDDRC_LIMITER_THRD +34 0x0800 //RX_TDDRC_LIMITER_GAIN +112 0x0000 //RX_TDDRC_THRD_0 +113 0x0000 //RX_TDDRC_THRD_1 +114 0x1800 //RX_TDDRC_THRD_2 +115 0x1800 //RX_TDDRC_THRD_3 +116 0x3000 //RX_TDDRC_SLANT_0 +117 0x6E00 //RX_TDDRC_SLANT_1 +118 0x1000 //RX_TDDRC_ALPHA_UP_0 +119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +120 0x0000 //RX_TDDRC_HMNC_FLAG +121 0x199A //RX_TDDRC_HMNC_GAIN +122 0x0001 //RX_TDDRC_SMT_FLAG +123 0x0CCD //RX_TDDRC_SMT_W +124 0x01E0 //RX_TDDRC_DRC_GAIN +38 0x0030 //RX_FDEQ_SUBNUM +39 0x4848 //RX_FDEQ_GAIN_0 +40 0x4848 //RX_FDEQ_GAIN_1 +41 0x4844 //RX_FDEQ_GAIN_2 +42 0x4B4D //RX_FDEQ_GAIN_3 +43 0x4E50 //RX_FDEQ_GAIN_4 +44 0x5254 //RX_FDEQ_GAIN_5 +45 0x5658 //RX_FDEQ_GAIN_6 +46 0x5C60 //RX_FDEQ_GAIN_7 +47 0x6468 //RX_FDEQ_GAIN_8 +48 0x6C70 //RX_FDEQ_GAIN_9 +49 0x7474 //RX_FDEQ_GAIN_10 +50 0x7474 //RX_FDEQ_GAIN_11 +51 0x7474 //RX_FDEQ_GAIN_12 +52 0x7474 //RX_FDEQ_GAIN_13 +53 0x7474 //RX_FDEQ_GAIN_14 +54 0x7474 //RX_FDEQ_GAIN_15 +55 0x4848 //RX_FDEQ_GAIN_16 +56 0x4848 //RX_FDEQ_GAIN_17 +57 0x4848 //RX_FDEQ_GAIN_18 +58 0x4848 //RX_FDEQ_GAIN_19 +59 0x4848 //RX_FDEQ_GAIN_20 +60 0x4848 //RX_FDEQ_GAIN_21 +61 0x4848 //RX_FDEQ_GAIN_22 +62 0x4848 //RX_FDEQ_GAIN_23 +63 0x0202 //RX_FDEQ_BIN_0 +64 0x0203 //RX_FDEQ_BIN_1 +65 0x0402 //RX_FDEQ_BIN_2 +66 0x0304 //RX_FDEQ_BIN_3 +67 0x0405 //RX_FDEQ_BIN_4 +68 0x0506 //RX_FDEQ_BIN_5 +69 0x0708 //RX_FDEQ_BIN_6 +70 0x090A //RX_FDEQ_BIN_7 +71 0x0B0C //RX_FDEQ_BIN_8 +72 0x0D0E //RX_FDEQ_BIN_9 +73 0x1214 //RX_FDEQ_BIN_10 +74 0x1E1E //RX_FDEQ_BIN_11 +75 0x1E1E //RX_FDEQ_BIN_12 +76 0x1E1E //RX_FDEQ_BIN_13 +77 0x1E1E //RX_FDEQ_BIN_14 +78 0x202C //RX_FDEQ_BIN_15 +79 0x0000 //RX_FDEQ_BIN_16 +80 0x0000 //RX_FDEQ_BIN_17 +81 0x0000 //RX_FDEQ_BIN_18 +82 0x0000 //RX_FDEQ_BIN_19 +83 0x0000 //RX_FDEQ_BIN_20 +84 0x0000 //RX_FDEQ_BIN_21 +85 0x0000 //RX_FDEQ_BIN_22 +86 0x0000 //RX_FDEQ_BIN_23 +87 0x4000 //RX_FDEQ_RESRV_0 +88 0x0320 //RX_FDEQ_RESRV_1 +89 0x0018 //RX_FDDRC_BAND_MARGIN_0 +90 0x0030 //RX_FDDRC_BAND_MARGIN_1 +91 0x0050 //RX_FDDRC_BAND_MARGIN_2 +92 0x0080 //RX_FDDRC_BAND_MARGIN_3 +93 0x0007 //RX_FDDRC_BLOCK_EXP +94 0x5000 //RX_FDDRC_THRD_2_0 +95 0x5000 //RX_FDDRC_THRD_2_1 +96 0x5000 //RX_FDDRC_THRD_2_2 +97 0x5000 //RX_FDDRC_THRD_2_3 +98 0x6400 //RX_FDDRC_THRD_3_0 +99 0x6400 //RX_FDDRC_THRD_3_1 +100 0x6400 //RX_FDDRC_THRD_3_2 +101 0x6400 //RX_FDDRC_THRD_3_3 +102 0x2000 //RX_FDDRC_SLANT_0_0 +103 0x2000 //RX_FDDRC_SLANT_0_1 +104 0x2000 //RX_FDDRC_SLANT_0_2 +105 0x2000 //RX_FDDRC_SLANT_0_3 +106 0x5333 //RX_FDDRC_SLANT_1_0 +107 0x5333 //RX_FDDRC_SLANT_1_1 +108 0x5333 //RX_FDDRC_SLANT_1_2 +109 0x5333 //RX_FDDRC_SLANT_1_3 +110 0x0000 //RX_FDDRC_RESRV_0 +129 0x0100 //RX_SPK_VOL +130 0x0000 //RX_VOL_RESRV_0 +#VOL 2 +6 0x1000 //RX_TDDRC_ALPHA_UP_1 +7 0x1000 //RX_TDDRC_ALPHA_UP_2 +8 0x1000 //RX_TDDRC_ALPHA_UP_3 +9 0x1000 //RX_TDDRC_ALPHA_UP_4 +27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +33 0x7000 //RX_TDDRC_LIMITER_THRD +34 0x0800 //RX_TDDRC_LIMITER_GAIN +112 0x0000 //RX_TDDRC_THRD_0 +113 0x0000 //RX_TDDRC_THRD_1 +114 0x1800 //RX_TDDRC_THRD_2 +115 0x1800 //RX_TDDRC_THRD_3 +116 0x3000 //RX_TDDRC_SLANT_0 +117 0x6E00 //RX_TDDRC_SLANT_1 +118 0x1000 //RX_TDDRC_ALPHA_UP_0 +119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +120 0x0000 //RX_TDDRC_HMNC_FLAG +121 0x199A //RX_TDDRC_HMNC_GAIN +122 0x0001 //RX_TDDRC_SMT_FLAG +123 0x0CCD //RX_TDDRC_SMT_W +124 0x01E0 //RX_TDDRC_DRC_GAIN +38 0x0030 //RX_FDEQ_SUBNUM +39 0x4848 //RX_FDEQ_GAIN_0 +40 0x4848 //RX_FDEQ_GAIN_1 +41 0x4844 //RX_FDEQ_GAIN_2 +42 0x4B4D //RX_FDEQ_GAIN_3 +43 0x4E50 //RX_FDEQ_GAIN_4 +44 0x5254 //RX_FDEQ_GAIN_5 +45 0x5658 //RX_FDEQ_GAIN_6 +46 0x5C60 //RX_FDEQ_GAIN_7 +47 0x6468 //RX_FDEQ_GAIN_8 +48 0x6C70 //RX_FDEQ_GAIN_9 +49 0x7474 //RX_FDEQ_GAIN_10 +50 0x7474 //RX_FDEQ_GAIN_11 +51 0x7474 //RX_FDEQ_GAIN_12 +52 0x7474 //RX_FDEQ_GAIN_13 +53 0x7474 //RX_FDEQ_GAIN_14 +54 0x7474 //RX_FDEQ_GAIN_15 +55 0x4848 //RX_FDEQ_GAIN_16 +56 0x4848 //RX_FDEQ_GAIN_17 +57 0x4848 //RX_FDEQ_GAIN_18 +58 0x4848 //RX_FDEQ_GAIN_19 +59 0x4848 //RX_FDEQ_GAIN_20 +60 0x4848 //RX_FDEQ_GAIN_21 +61 0x4848 //RX_FDEQ_GAIN_22 +62 0x4848 //RX_FDEQ_GAIN_23 +63 0x0202 //RX_FDEQ_BIN_0 +64 0x0203 //RX_FDEQ_BIN_1 +65 0x0402 //RX_FDEQ_BIN_2 +66 0x0304 //RX_FDEQ_BIN_3 +67 0x0405 //RX_FDEQ_BIN_4 +68 0x0506 //RX_FDEQ_BIN_5 +69 0x0708 //RX_FDEQ_BIN_6 +70 0x090A //RX_FDEQ_BIN_7 +71 0x0B0C //RX_FDEQ_BIN_8 +72 0x0D0E //RX_FDEQ_BIN_9 +73 0x1214 //RX_FDEQ_BIN_10 +74 0x1E1E //RX_FDEQ_BIN_11 +75 0x1E1E //RX_FDEQ_BIN_12 +76 0x1E1E //RX_FDEQ_BIN_13 +77 0x1E1E //RX_FDEQ_BIN_14 +78 0x202C //RX_FDEQ_BIN_15 +79 0x0000 //RX_FDEQ_BIN_16 +80 0x0000 //RX_FDEQ_BIN_17 +81 0x0000 //RX_FDEQ_BIN_18 +82 0x0000 //RX_FDEQ_BIN_19 +83 0x0000 //RX_FDEQ_BIN_20 +84 0x0000 //RX_FDEQ_BIN_21 +85 0x0000 //RX_FDEQ_BIN_22 +86 0x0000 //RX_FDEQ_BIN_23 +87 0x4000 //RX_FDEQ_RESRV_0 +88 0x0320 //RX_FDEQ_RESRV_1 +89 0x0018 //RX_FDDRC_BAND_MARGIN_0 +90 0x0030 //RX_FDDRC_BAND_MARGIN_1 +91 0x0050 //RX_FDDRC_BAND_MARGIN_2 +92 0x0080 //RX_FDDRC_BAND_MARGIN_3 +93 0x0007 //RX_FDDRC_BLOCK_EXP +94 0x5000 //RX_FDDRC_THRD_2_0 +95 0x5000 //RX_FDDRC_THRD_2_1 +96 0x5000 //RX_FDDRC_THRD_2_2 +97 0x5000 //RX_FDDRC_THRD_2_3 +98 0x6400 //RX_FDDRC_THRD_3_0 +99 0x6400 //RX_FDDRC_THRD_3_1 +100 0x6400 //RX_FDDRC_THRD_3_2 +101 0x6400 //RX_FDDRC_THRD_3_3 +102 0x2000 //RX_FDDRC_SLANT_0_0 +103 0x2000 //RX_FDDRC_SLANT_0_1 +104 0x2000 //RX_FDDRC_SLANT_0_2 +105 0x2000 //RX_FDDRC_SLANT_0_3 +106 0x5333 //RX_FDDRC_SLANT_1_0 +107 0x5333 //RX_FDDRC_SLANT_1_1 +108 0x5333 //RX_FDDRC_SLANT_1_2 +109 0x5333 //RX_FDDRC_SLANT_1_3 +110 0x0000 //RX_FDDRC_RESRV_0 +129 0x0100 //RX_SPK_VOL +130 0x0000 //RX_VOL_RESRV_0 +#VOL 3 +6 0x1000 //RX_TDDRC_ALPHA_UP_1 +7 0x1000 //RX_TDDRC_ALPHA_UP_2 +8 0x1000 //RX_TDDRC_ALPHA_UP_3 +9 0x1000 //RX_TDDRC_ALPHA_UP_4 +27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +33 0x7000 //RX_TDDRC_LIMITER_THRD +34 0x0800 //RX_TDDRC_LIMITER_GAIN +112 0x0000 //RX_TDDRC_THRD_0 +113 0x0000 //RX_TDDRC_THRD_1 +114 0x1800 //RX_TDDRC_THRD_2 +115 0x1800 //RX_TDDRC_THRD_3 +116 0x3000 //RX_TDDRC_SLANT_0 +117 0x6E00 //RX_TDDRC_SLANT_1 +118 0x1000 //RX_TDDRC_ALPHA_UP_0 +119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +120 0x0000 //RX_TDDRC_HMNC_FLAG +121 0x199A //RX_TDDRC_HMNC_GAIN +122 0x0001 //RX_TDDRC_SMT_FLAG +123 0x0CCD //RX_TDDRC_SMT_W +124 0x01E0 //RX_TDDRC_DRC_GAIN +38 0x0030 //RX_FDEQ_SUBNUM +39 0x4848 //RX_FDEQ_GAIN_0 +40 0x4848 //RX_FDEQ_GAIN_1 +41 0x4844 //RX_FDEQ_GAIN_2 +42 0x4B4D //RX_FDEQ_GAIN_3 +43 0x4E50 //RX_FDEQ_GAIN_4 +44 0x5254 //RX_FDEQ_GAIN_5 +45 0x5658 //RX_FDEQ_GAIN_6 +46 0x5C60 //RX_FDEQ_GAIN_7 +47 0x6468 //RX_FDEQ_GAIN_8 +48 0x6C70 //RX_FDEQ_GAIN_9 +49 0x7474 //RX_FDEQ_GAIN_10 +50 0x7474 //RX_FDEQ_GAIN_11 +51 0x7474 //RX_FDEQ_GAIN_12 +52 0x7474 //RX_FDEQ_GAIN_13 +53 0x7474 //RX_FDEQ_GAIN_14 +54 0x7474 //RX_FDEQ_GAIN_15 +55 0x4848 //RX_FDEQ_GAIN_16 +56 0x4848 //RX_FDEQ_GAIN_17 +57 0x4848 //RX_FDEQ_GAIN_18 +58 0x4848 //RX_FDEQ_GAIN_19 +59 0x4848 //RX_FDEQ_GAIN_20 +60 0x4848 //RX_FDEQ_GAIN_21 +61 0x4848 //RX_FDEQ_GAIN_22 +62 0x4848 //RX_FDEQ_GAIN_23 +63 0x0202 //RX_FDEQ_BIN_0 +64 0x0203 //RX_FDEQ_BIN_1 +65 0x0402 //RX_FDEQ_BIN_2 +66 0x0304 //RX_FDEQ_BIN_3 +67 0x0405 //RX_FDEQ_BIN_4 +68 0x0506 //RX_FDEQ_BIN_5 +69 0x0708 //RX_FDEQ_BIN_6 +70 0x090A //RX_FDEQ_BIN_7 +71 0x0B0C //RX_FDEQ_BIN_8 +72 0x0D0E //RX_FDEQ_BIN_9 +73 0x1214 //RX_FDEQ_BIN_10 +74 0x1E1E //RX_FDEQ_BIN_11 +75 0x1E1E //RX_FDEQ_BIN_12 +76 0x1E1E //RX_FDEQ_BIN_13 +77 0x1E1E //RX_FDEQ_BIN_14 +78 0x202C //RX_FDEQ_BIN_15 +79 0x0000 //RX_FDEQ_BIN_16 +80 0x0000 //RX_FDEQ_BIN_17 +81 0x0000 //RX_FDEQ_BIN_18 +82 0x0000 //RX_FDEQ_BIN_19 +83 0x0000 //RX_FDEQ_BIN_20 +84 0x0000 //RX_FDEQ_BIN_21 +85 0x0000 //RX_FDEQ_BIN_22 +86 0x0000 //RX_FDEQ_BIN_23 +87 0x4000 //RX_FDEQ_RESRV_0 +88 0x0320 //RX_FDEQ_RESRV_1 +89 0x0018 //RX_FDDRC_BAND_MARGIN_0 +90 0x0030 //RX_FDDRC_BAND_MARGIN_1 +91 0x0050 //RX_FDDRC_BAND_MARGIN_2 +92 0x0080 //RX_FDDRC_BAND_MARGIN_3 +93 0x0007 //RX_FDDRC_BLOCK_EXP +94 0x5000 //RX_FDDRC_THRD_2_0 +95 0x5000 //RX_FDDRC_THRD_2_1 +96 0x5000 //RX_FDDRC_THRD_2_2 +97 0x5000 //RX_FDDRC_THRD_2_3 +98 0x6400 //RX_FDDRC_THRD_3_0 +99 0x6400 //RX_FDDRC_THRD_3_1 +100 0x6400 //RX_FDDRC_THRD_3_2 +101 0x6400 //RX_FDDRC_THRD_3_3 +102 0x2000 //RX_FDDRC_SLANT_0_0 +103 0x2000 //RX_FDDRC_SLANT_0_1 +104 0x2000 //RX_FDDRC_SLANT_0_2 +105 0x2000 //RX_FDDRC_SLANT_0_3 +106 0x5333 //RX_FDDRC_SLANT_1_0 +107 0x5333 //RX_FDDRC_SLANT_1_1 +108 0x5333 //RX_FDDRC_SLANT_1_2 +109 0x5333 //RX_FDDRC_SLANT_1_3 +110 0x0000 //RX_FDDRC_RESRV_0 +129 0x0100 //RX_SPK_VOL +130 0x0000 //RX_VOL_RESRV_0 +#VOL 4 +6 0x1000 //RX_TDDRC_ALPHA_UP_1 +7 0x1000 //RX_TDDRC_ALPHA_UP_2 +8 0x1000 //RX_TDDRC_ALPHA_UP_3 +9 0x1000 //RX_TDDRC_ALPHA_UP_4 +27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +33 0x7000 //RX_TDDRC_LIMITER_THRD +34 0x0800 //RX_TDDRC_LIMITER_GAIN +112 0x0000 //RX_TDDRC_THRD_0 +113 0x0000 //RX_TDDRC_THRD_1 +114 0x1800 //RX_TDDRC_THRD_2 +115 0x1800 //RX_TDDRC_THRD_3 +116 0x3000 //RX_TDDRC_SLANT_0 +117 0x6E00 //RX_TDDRC_SLANT_1 +118 0x1000 //RX_TDDRC_ALPHA_UP_0 +119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +120 0x0000 //RX_TDDRC_HMNC_FLAG +121 0x199A //RX_TDDRC_HMNC_GAIN +122 0x0001 //RX_TDDRC_SMT_FLAG +123 0x0CCD //RX_TDDRC_SMT_W +124 0x01E0 //RX_TDDRC_DRC_GAIN +38 0x0030 //RX_FDEQ_SUBNUM +39 0x4848 //RX_FDEQ_GAIN_0 +40 0x4848 //RX_FDEQ_GAIN_1 +41 0x4844 //RX_FDEQ_GAIN_2 +42 0x4B4D //RX_FDEQ_GAIN_3 +43 0x4E50 //RX_FDEQ_GAIN_4 +44 0x5254 //RX_FDEQ_GAIN_5 +45 0x5658 //RX_FDEQ_GAIN_6 +46 0x5C60 //RX_FDEQ_GAIN_7 +47 0x6468 //RX_FDEQ_GAIN_8 +48 0x6C70 //RX_FDEQ_GAIN_9 +49 0x7474 //RX_FDEQ_GAIN_10 +50 0x7474 //RX_FDEQ_GAIN_11 +51 0x7474 //RX_FDEQ_GAIN_12 +52 0x7474 //RX_FDEQ_GAIN_13 +53 0x7474 //RX_FDEQ_GAIN_14 +54 0x7474 //RX_FDEQ_GAIN_15 +55 0x4848 //RX_FDEQ_GAIN_16 +56 0x4848 //RX_FDEQ_GAIN_17 +57 0x4848 //RX_FDEQ_GAIN_18 +58 0x4848 //RX_FDEQ_GAIN_19 +59 0x4848 //RX_FDEQ_GAIN_20 +60 0x4848 //RX_FDEQ_GAIN_21 +61 0x4848 //RX_FDEQ_GAIN_22 +62 0x4848 //RX_FDEQ_GAIN_23 +63 0x0202 //RX_FDEQ_BIN_0 +64 0x0203 //RX_FDEQ_BIN_1 +65 0x0402 //RX_FDEQ_BIN_2 +66 0x0304 //RX_FDEQ_BIN_3 +67 0x0405 //RX_FDEQ_BIN_4 +68 0x0506 //RX_FDEQ_BIN_5 +69 0x0708 //RX_FDEQ_BIN_6 +70 0x090A //RX_FDEQ_BIN_7 +71 0x0B0C //RX_FDEQ_BIN_8 +72 0x0D0E //RX_FDEQ_BIN_9 +73 0x1214 //RX_FDEQ_BIN_10 +74 0x1E1E //RX_FDEQ_BIN_11 +75 0x1E1E //RX_FDEQ_BIN_12 +76 0x1E1E //RX_FDEQ_BIN_13 +77 0x1E1E //RX_FDEQ_BIN_14 +78 0x202C //RX_FDEQ_BIN_15 +79 0x0000 //RX_FDEQ_BIN_16 +80 0x0000 //RX_FDEQ_BIN_17 +81 0x0000 //RX_FDEQ_BIN_18 +82 0x0000 //RX_FDEQ_BIN_19 +83 0x0000 //RX_FDEQ_BIN_20 +84 0x0000 //RX_FDEQ_BIN_21 +85 0x0000 //RX_FDEQ_BIN_22 +86 0x0000 //RX_FDEQ_BIN_23 +87 0x4000 //RX_FDEQ_RESRV_0 +88 0x0320 //RX_FDEQ_RESRV_1 +89 0x0018 //RX_FDDRC_BAND_MARGIN_0 +90 0x0030 //RX_FDDRC_BAND_MARGIN_1 +91 0x0050 //RX_FDDRC_BAND_MARGIN_2 +92 0x0080 //RX_FDDRC_BAND_MARGIN_3 +93 0x0007 //RX_FDDRC_BLOCK_EXP +94 0x5000 //RX_FDDRC_THRD_2_0 +95 0x5000 //RX_FDDRC_THRD_2_1 +96 0x5000 //RX_FDDRC_THRD_2_2 +97 0x5000 //RX_FDDRC_THRD_2_3 +98 0x6400 //RX_FDDRC_THRD_3_0 +99 0x6400 //RX_FDDRC_THRD_3_1 +100 0x6400 //RX_FDDRC_THRD_3_2 +101 0x6400 //RX_FDDRC_THRD_3_3 +102 0x2000 //RX_FDDRC_SLANT_0_0 +103 0x2000 //RX_FDDRC_SLANT_0_1 +104 0x2000 //RX_FDDRC_SLANT_0_2 +105 0x2000 //RX_FDDRC_SLANT_0_3 +106 0x5333 //RX_FDDRC_SLANT_1_0 +107 0x5333 //RX_FDDRC_SLANT_1_1 +108 0x5333 //RX_FDDRC_SLANT_1_2 +109 0x5333 //RX_FDDRC_SLANT_1_3 +110 0x0000 //RX_FDDRC_RESRV_0 +129 0x0100 //RX_SPK_VOL +130 0x0000 //RX_VOL_RESRV_0 +#VOL 5 +6 0x1000 //RX_TDDRC_ALPHA_UP_1 +7 0x1000 //RX_TDDRC_ALPHA_UP_2 +8 0x1000 //RX_TDDRC_ALPHA_UP_3 +9 0x1000 //RX_TDDRC_ALPHA_UP_4 +27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +33 0x7000 //RX_TDDRC_LIMITER_THRD +34 0x0800 //RX_TDDRC_LIMITER_GAIN +112 0x0000 //RX_TDDRC_THRD_0 +113 0x0000 //RX_TDDRC_THRD_1 +114 0x1800 //RX_TDDRC_THRD_2 +115 0x1800 //RX_TDDRC_THRD_3 +116 0x3000 //RX_TDDRC_SLANT_0 +117 0x6E00 //RX_TDDRC_SLANT_1 +118 0x1000 //RX_TDDRC_ALPHA_UP_0 +119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +120 0x0000 //RX_TDDRC_HMNC_FLAG +121 0x199A //RX_TDDRC_HMNC_GAIN +122 0x0001 //RX_TDDRC_SMT_FLAG +123 0x0CCD //RX_TDDRC_SMT_W +124 0x01E0 //RX_TDDRC_DRC_GAIN +38 0x0030 //RX_FDEQ_SUBNUM +39 0x4848 //RX_FDEQ_GAIN_0 +40 0x4848 //RX_FDEQ_GAIN_1 +41 0x4844 //RX_FDEQ_GAIN_2 +42 0x4B4D //RX_FDEQ_GAIN_3 +43 0x4E50 //RX_FDEQ_GAIN_4 +44 0x5254 //RX_FDEQ_GAIN_5 +45 0x5658 //RX_FDEQ_GAIN_6 +46 0x5C60 //RX_FDEQ_GAIN_7 +47 0x6468 //RX_FDEQ_GAIN_8 +48 0x6C70 //RX_FDEQ_GAIN_9 +49 0x7474 //RX_FDEQ_GAIN_10 +50 0x7474 //RX_FDEQ_GAIN_11 +51 0x7474 //RX_FDEQ_GAIN_12 +52 0x7474 //RX_FDEQ_GAIN_13 +53 0x7474 //RX_FDEQ_GAIN_14 +54 0x7474 //RX_FDEQ_GAIN_15 +55 0x4848 //RX_FDEQ_GAIN_16 +56 0x4848 //RX_FDEQ_GAIN_17 +57 0x4848 //RX_FDEQ_GAIN_18 +58 0x4848 //RX_FDEQ_GAIN_19 +59 0x4848 //RX_FDEQ_GAIN_20 +60 0x4848 //RX_FDEQ_GAIN_21 +61 0x4848 //RX_FDEQ_GAIN_22 +62 0x4848 //RX_FDEQ_GAIN_23 +63 0x0202 //RX_FDEQ_BIN_0 +64 0x0203 //RX_FDEQ_BIN_1 +65 0x0402 //RX_FDEQ_BIN_2 +66 0x0304 //RX_FDEQ_BIN_3 +67 0x0405 //RX_FDEQ_BIN_4 +68 0x0506 //RX_FDEQ_BIN_5 +69 0x0708 //RX_FDEQ_BIN_6 +70 0x090A //RX_FDEQ_BIN_7 +71 0x0B0C //RX_FDEQ_BIN_8 +72 0x0D0E //RX_FDEQ_BIN_9 +73 0x1214 //RX_FDEQ_BIN_10 +74 0x1E1E //RX_FDEQ_BIN_11 +75 0x1E1E //RX_FDEQ_BIN_12 +76 0x1E1E //RX_FDEQ_BIN_13 +77 0x1E1E //RX_FDEQ_BIN_14 +78 0x202C //RX_FDEQ_BIN_15 +79 0x0000 //RX_FDEQ_BIN_16 +80 0x0000 //RX_FDEQ_BIN_17 +81 0x0000 //RX_FDEQ_BIN_18 +82 0x0000 //RX_FDEQ_BIN_19 +83 0x0000 //RX_FDEQ_BIN_20 +84 0x0000 //RX_FDEQ_BIN_21 +85 0x0000 //RX_FDEQ_BIN_22 +86 0x0000 //RX_FDEQ_BIN_23 +87 0x4000 //RX_FDEQ_RESRV_0 +88 0x0320 //RX_FDEQ_RESRV_1 +89 0x0018 //RX_FDDRC_BAND_MARGIN_0 +90 0x0030 //RX_FDDRC_BAND_MARGIN_1 +91 0x0050 //RX_FDDRC_BAND_MARGIN_2 +92 0x0080 //RX_FDDRC_BAND_MARGIN_3 +93 0x0007 //RX_FDDRC_BLOCK_EXP +94 0x5000 //RX_FDDRC_THRD_2_0 +95 0x5000 //RX_FDDRC_THRD_2_1 +96 0x5000 //RX_FDDRC_THRD_2_2 +97 0x5000 //RX_FDDRC_THRD_2_3 +98 0x6400 //RX_FDDRC_THRD_3_0 +99 0x6400 //RX_FDDRC_THRD_3_1 +100 0x6400 //RX_FDDRC_THRD_3_2 +101 0x6400 //RX_FDDRC_THRD_3_3 +102 0x2000 //RX_FDDRC_SLANT_0_0 +103 0x2000 //RX_FDDRC_SLANT_0_1 +104 0x2000 //RX_FDDRC_SLANT_0_2 +105 0x2000 //RX_FDDRC_SLANT_0_3 +106 0x5333 //RX_FDDRC_SLANT_1_0 +107 0x5333 //RX_FDDRC_SLANT_1_1 +108 0x5333 //RX_FDDRC_SLANT_1_2 +109 0x5333 //RX_FDDRC_SLANT_1_3 +110 0x0000 //RX_FDDRC_RESRV_0 +129 0x0100 //RX_SPK_VOL +130 0x0000 //RX_VOL_RESRV_0 +#VOL 6 +6 0x1000 //RX_TDDRC_ALPHA_UP_1 +7 0x1000 //RX_TDDRC_ALPHA_UP_2 +8 0x1000 //RX_TDDRC_ALPHA_UP_3 +9 0x1000 //RX_TDDRC_ALPHA_UP_4 +27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +33 0x7000 //RX_TDDRC_LIMITER_THRD +34 0x0800 //RX_TDDRC_LIMITER_GAIN +112 0x0000 //RX_TDDRC_THRD_0 +113 0x0000 //RX_TDDRC_THRD_1 +114 0x1800 //RX_TDDRC_THRD_2 +115 0x1800 //RX_TDDRC_THRD_3 +116 0x3000 //RX_TDDRC_SLANT_0 +117 0x6E00 //RX_TDDRC_SLANT_1 +118 0x1000 //RX_TDDRC_ALPHA_UP_0 +119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +120 0x0000 //RX_TDDRC_HMNC_FLAG +121 0x199A //RX_TDDRC_HMNC_GAIN +122 0x0001 //RX_TDDRC_SMT_FLAG +123 0x0CCD //RX_TDDRC_SMT_W +124 0x01E0 //RX_TDDRC_DRC_GAIN +38 0x0030 //RX_FDEQ_SUBNUM +39 0x4848 //RX_FDEQ_GAIN_0 +40 0x4848 //RX_FDEQ_GAIN_1 +41 0x4844 //RX_FDEQ_GAIN_2 +42 0x4B4D //RX_FDEQ_GAIN_3 +43 0x4E50 //RX_FDEQ_GAIN_4 +44 0x5254 //RX_FDEQ_GAIN_5 +45 0x5658 //RX_FDEQ_GAIN_6 +46 0x5C60 //RX_FDEQ_GAIN_7 +47 0x6468 //RX_FDEQ_GAIN_8 +48 0x6C70 //RX_FDEQ_GAIN_9 +49 0x7474 //RX_FDEQ_GAIN_10 +50 0x7474 //RX_FDEQ_GAIN_11 +51 0x7474 //RX_FDEQ_GAIN_12 +52 0x7474 //RX_FDEQ_GAIN_13 +53 0x7474 //RX_FDEQ_GAIN_14 +54 0x7474 //RX_FDEQ_GAIN_15 +55 0x4848 //RX_FDEQ_GAIN_16 +56 0x4848 //RX_FDEQ_GAIN_17 +57 0x4848 //RX_FDEQ_GAIN_18 +58 0x4848 //RX_FDEQ_GAIN_19 +59 0x4848 //RX_FDEQ_GAIN_20 +60 0x4848 //RX_FDEQ_GAIN_21 +61 0x4848 //RX_FDEQ_GAIN_22 +62 0x4848 //RX_FDEQ_GAIN_23 +63 0x0202 //RX_FDEQ_BIN_0 +64 0x0203 //RX_FDEQ_BIN_1 +65 0x0402 //RX_FDEQ_BIN_2 +66 0x0304 //RX_FDEQ_BIN_3 +67 0x0405 //RX_FDEQ_BIN_4 +68 0x0506 //RX_FDEQ_BIN_5 +69 0x0708 //RX_FDEQ_BIN_6 +70 0x090A //RX_FDEQ_BIN_7 +71 0x0B0C //RX_FDEQ_BIN_8 +72 0x0D0E //RX_FDEQ_BIN_9 +73 0x1214 //RX_FDEQ_BIN_10 +74 0x1E1E //RX_FDEQ_BIN_11 +75 0x1E1E //RX_FDEQ_BIN_12 +76 0x1E1E //RX_FDEQ_BIN_13 +77 0x1E1E //RX_FDEQ_BIN_14 +78 0x202C //RX_FDEQ_BIN_15 +79 0x0000 //RX_FDEQ_BIN_16 +80 0x0000 //RX_FDEQ_BIN_17 +81 0x0000 //RX_FDEQ_BIN_18 +82 0x0000 //RX_FDEQ_BIN_19 +83 0x0000 //RX_FDEQ_BIN_20 +84 0x0000 //RX_FDEQ_BIN_21 +85 0x0000 //RX_FDEQ_BIN_22 +86 0x0000 //RX_FDEQ_BIN_23 +87 0x4000 //RX_FDEQ_RESRV_0 +88 0x0320 //RX_FDEQ_RESRV_1 +89 0x0018 //RX_FDDRC_BAND_MARGIN_0 +90 0x0030 //RX_FDDRC_BAND_MARGIN_1 +91 0x0050 //RX_FDDRC_BAND_MARGIN_2 +92 0x0080 //RX_FDDRC_BAND_MARGIN_3 +93 0x0007 //RX_FDDRC_BLOCK_EXP +94 0x5000 //RX_FDDRC_THRD_2_0 +95 0x5000 //RX_FDDRC_THRD_2_1 +96 0x5000 //RX_FDDRC_THRD_2_2 +97 0x5000 //RX_FDDRC_THRD_2_3 +98 0x6400 //RX_FDDRC_THRD_3_0 +99 0x6400 //RX_FDDRC_THRD_3_1 +100 0x6400 //RX_FDDRC_THRD_3_2 +101 0x6400 //RX_FDDRC_THRD_3_3 +102 0x2000 //RX_FDDRC_SLANT_0_0 +103 0x2000 //RX_FDDRC_SLANT_0_1 +104 0x2000 //RX_FDDRC_SLANT_0_2 +105 0x2000 //RX_FDDRC_SLANT_0_3 +106 0x5333 //RX_FDDRC_SLANT_1_0 +107 0x5333 //RX_FDDRC_SLANT_1_1 +108 0x5333 //RX_FDDRC_SLANT_1_2 +109 0x5333 //RX_FDDRC_SLANT_1_3 +110 0x0000 //RX_FDDRC_RESRV_0 +129 0x0100 //RX_SPK_VOL +130 0x0000 //RX_VOL_RESRV_0 +#RX 2 +157 0x000C //RX_RECVFUNC_MODE_0 +158 0x0000 //RX_RECVFUNC_MODE_1 +159 0x0004 //RX_SAMPLINGFREQ_SIG +160 0x0004 //RX_SAMPLINGFREQ_PROC +161 0x000A //RX_FRAME_SZ +162 0x0000 //RX_DELAY_OPT +163 0x1000 //RX_TDDRC_ALPHA_UP_1 +164 0x1000 //RX_TDDRC_ALPHA_UP_2 +165 0x1000 //RX_TDDRC_ALPHA_UP_3 +166 0x1000 //RX_TDDRC_ALPHA_UP_4 +167 0x0800 //RX_PGA +168 0x7FFF //RX_A_HP +169 0x4000 //RX_B_PE +170 0x5800 //RX_THR_PITCH_DET_0 +171 0x5000 //RX_THR_PITCH_DET_1 +172 0x4000 //RX_THR_PITCH_DET_2 +173 0x0008 //RX_PITCH_BFR_LEN +174 0x0003 //RX_SBD_PITCH_DET +175 0x0100 //RX_PP_RESRV_0 +176 0x0020 //RX_PP_RESRV_1 +177 0x0600 //RX_N_SN_EST +178 0x000C //RX_N2_SN_EST +179 0x000F //RX_NS_LVL_CTRL +180 0xF800 //RX_THR_SN_EST +181 0x7E00 //RX_LAMBDA_PFILT +182 0x000A //RX_FENS_RESRV_0 +183 0x0190 //RX_FENS_RESRV_1 +184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +187 0x0002 //RX_EXTRA_NS_L +188 0x0800 //RX_EXTRA_NS_A +189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +190 0x7000 //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +192 0x199A //RX_A_POST_FLT +193 0x0000 //RX_LMT_THRD +194 0x4000 //RX_LMT_ALPHA +195 0x0030 //RX_FDEQ_SUBNUM +196 0x4848 //RX_FDEQ_GAIN_0 +197 0x4848 //RX_FDEQ_GAIN_1 +198 0x4844 //RX_FDEQ_GAIN_2 +199 0x4B4D //RX_FDEQ_GAIN_3 +200 0x4E50 //RX_FDEQ_GAIN_4 +201 0x5254 //RX_FDEQ_GAIN_5 +202 0x5658 //RX_FDEQ_GAIN_6 +203 0x5C60 //RX_FDEQ_GAIN_7 +204 0x6468 //RX_FDEQ_GAIN_8 +205 0x6C70 //RX_FDEQ_GAIN_9 +206 0x7474 //RX_FDEQ_GAIN_10 +207 0x7474 //RX_FDEQ_GAIN_11 +208 0x7474 //RX_FDEQ_GAIN_12 +209 0x7474 //RX_FDEQ_GAIN_13 +210 0x7474 //RX_FDEQ_GAIN_14 +211 0x7474 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0202 //RX_FDEQ_BIN_0 +221 0x0203 //RX_FDEQ_BIN_1 +222 0x0402 //RX_FDEQ_BIN_2 +223 0x0304 //RX_FDEQ_BIN_3 +224 0x0405 //RX_FDEQ_BIN_4 +225 0x0506 //RX_FDEQ_BIN_5 +226 0x0708 //RX_FDEQ_BIN_6 +227 0x090A //RX_FDEQ_BIN_7 +228 0x0B0C //RX_FDEQ_BIN_8 +229 0x0D0E //RX_FDEQ_BIN_9 +230 0x1214 //RX_FDEQ_BIN_10 +231 0x1E1E //RX_FDEQ_BIN_11 +232 0x1E1E //RX_FDEQ_BIN_12 +233 0x1E1E //RX_FDEQ_BIN_13 +234 0x1E1E //RX_FDEQ_BIN_14 +235 0x202C //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x4000 //RX_FDEQ_RESRV_0 +245 0x0320 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0030 //RX_FDDRC_BAND_MARGIN_1 +248 0x0050 //RX_FDDRC_BAND_MARGIN_2 +249 0x0080 //RX_FDDRC_BAND_MARGIN_3 +250 0x0007 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x5000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x6400 //RX_FDDRC_THRD_3_2 +258 0x6400 //RX_FDDRC_THRD_3_3 +259 0x2000 //RX_FDDRC_SLANT_0_0 +260 0x2000 //RX_FDDRC_SLANT_0_1 +261 0x2000 //RX_FDDRC_SLANT_0_2 +262 0x2000 //RX_FDDRC_SLANT_0_3 +263 0x5333 //RX_FDDRC_SLANT_1_0 +264 0x5333 //RX_FDDRC_SLANT_1_1 +265 0x5333 //RX_FDDRC_SLANT_1_2 +266 0x5333 //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +268 0x0002 //RX_FILTINDX +269 0x0000 //RX_TDDRC_THRD_0 +270 0x0000 //RX_TDDRC_THRD_1 +271 0x1800 //RX_TDDRC_THRD_2 +272 0x1800 //RX_TDDRC_THRD_3 +273 0x3000 //RX_TDDRC_SLANT_0 +274 0x6E00 //RX_TDDRC_SLANT_1 +275 0x1000 //RX_TDDRC_ALPHA_UP_0 +276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x199A //RX_TDDRC_HMNC_GAIN +279 0x0001 //RX_TDDRC_SMT_FLAG +280 0x0CCD //RX_TDDRC_SMT_W +281 0x01E0 //RX_TDDRC_DRC_GAIN +282 0x7C00 //RX_LAMBDA_PKA_FP +283 0x2000 //RX_TPKA_FP +284 0x2000 //RX_MIN_G_FP +285 0x0080 //RX_MAX_G_FP +286 0x0100 //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 +288 0x0000 //RX_MAXLEVEL_CNG +289 0x3000 //RX_BWE_UV_TH +290 0x3000 //RX_BWE_UV_TH2 +291 0x1800 //RX_BWE_UV_TH3 +292 0x1000 //RX_BWE_V_TH +293 0x04CD //RX_BWE_GAIN1_V_TH1 +294 0x0F33 //RX_BWE_GAIN1_V_TH2 +295 0x7333 //RX_BWE_UV_EQ +296 0x199A //RX_BWE_V_EQ +297 0x7333 //RX_BWE_TONE_TH +298 0x0004 //RX_BWE_UV_HOLD_T +299 0x6CCD //RX_BWE_GAIN2_ALPHA +300 0x799A //RX_BWE_GAIN3_ALPHA +301 0x001E //RX_BWE_CUTOFF +302 0x3000 //RX_BWE_GAINFILL +303 0x3200 //RX_BWE_MAXTH_TONE +304 0x2000 //RX_BWE_EQ_0 +305 0x2000 //RX_BWE_EQ_1 +306 0x2000 //RX_BWE_EQ_2 +307 0x2000 //RX_BWE_EQ_3 +308 0x2000 //RX_BWE_EQ_4 +309 0x2000 //RX_BWE_EQ_5 +310 0x2000 //RX_BWE_EQ_6 +311 0x0000 //RX_BWE_RESRV_0 +312 0x0000 //RX_BWE_RESRV_1 +313 0x0000 //RX_BWE_RESRV_2 +#VOL 0 +163 0x1000 //RX_TDDRC_ALPHA_UP_1 +164 0x1000 //RX_TDDRC_ALPHA_UP_2 +165 0x1000 //RX_TDDRC_ALPHA_UP_3 +166 0x1000 //RX_TDDRC_ALPHA_UP_4 +184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +190 0x7000 //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +269 0x0000 //RX_TDDRC_THRD_0 +270 0x0000 //RX_TDDRC_THRD_1 +271 0x1800 //RX_TDDRC_THRD_2 +272 0x1800 //RX_TDDRC_THRD_3 +273 0x3000 //RX_TDDRC_SLANT_0 +274 0x6E00 //RX_TDDRC_SLANT_1 +275 0x1000 //RX_TDDRC_ALPHA_UP_0 +276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x199A //RX_TDDRC_HMNC_GAIN +279 0x0001 //RX_TDDRC_SMT_FLAG +280 0x0CCD //RX_TDDRC_SMT_W +281 0x01E0 //RX_TDDRC_DRC_GAIN +195 0x0030 //RX_FDEQ_SUBNUM +196 0x4848 //RX_FDEQ_GAIN_0 +197 0x4848 //RX_FDEQ_GAIN_1 +198 0x4844 //RX_FDEQ_GAIN_2 +199 0x4B4D //RX_FDEQ_GAIN_3 +200 0x4E50 //RX_FDEQ_GAIN_4 +201 0x5254 //RX_FDEQ_GAIN_5 +202 0x5658 //RX_FDEQ_GAIN_6 +203 0x5C60 //RX_FDEQ_GAIN_7 +204 0x6468 //RX_FDEQ_GAIN_8 +205 0x6C70 //RX_FDEQ_GAIN_9 +206 0x7474 //RX_FDEQ_GAIN_10 +207 0x7474 //RX_FDEQ_GAIN_11 +208 0x7474 //RX_FDEQ_GAIN_12 +209 0x7474 //RX_FDEQ_GAIN_13 +210 0x7474 //RX_FDEQ_GAIN_14 +211 0x7474 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0202 //RX_FDEQ_BIN_0 +221 0x0203 //RX_FDEQ_BIN_1 +222 0x0402 //RX_FDEQ_BIN_2 +223 0x0304 //RX_FDEQ_BIN_3 +224 0x0405 //RX_FDEQ_BIN_4 +225 0x0506 //RX_FDEQ_BIN_5 +226 0x0708 //RX_FDEQ_BIN_6 +227 0x090A //RX_FDEQ_BIN_7 +228 0x0B0C //RX_FDEQ_BIN_8 +229 0x0D0E //RX_FDEQ_BIN_9 +230 0x1214 //RX_FDEQ_BIN_10 +231 0x1E1E //RX_FDEQ_BIN_11 +232 0x1E1E //RX_FDEQ_BIN_12 +233 0x1E1E //RX_FDEQ_BIN_13 +234 0x1E1E //RX_FDEQ_BIN_14 +235 0x202C //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x4000 //RX_FDEQ_RESRV_0 +245 0x0320 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0030 //RX_FDDRC_BAND_MARGIN_1 +248 0x0050 //RX_FDDRC_BAND_MARGIN_2 +249 0x0080 //RX_FDDRC_BAND_MARGIN_3 +250 0x0007 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x5000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x6400 //RX_FDDRC_THRD_3_2 +258 0x6400 //RX_FDDRC_THRD_3_3 +259 0x2000 //RX_FDDRC_SLANT_0_0 +260 0x2000 //RX_FDDRC_SLANT_0_1 +261 0x2000 //RX_FDDRC_SLANT_0_2 +262 0x2000 //RX_FDDRC_SLANT_0_3 +263 0x5333 //RX_FDDRC_SLANT_1_0 +264 0x5333 //RX_FDDRC_SLANT_1_1 +265 0x5333 //RX_FDDRC_SLANT_1_2 +266 0x5333 //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +286 0x0100 //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 +#VOL 1 +163 0x1000 //RX_TDDRC_ALPHA_UP_1 +164 0x1000 //RX_TDDRC_ALPHA_UP_2 +165 0x1000 //RX_TDDRC_ALPHA_UP_3 +166 0x1000 //RX_TDDRC_ALPHA_UP_4 +184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +190 0x7000 //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +269 0x0000 //RX_TDDRC_THRD_0 +270 0x0000 //RX_TDDRC_THRD_1 +271 0x1800 //RX_TDDRC_THRD_2 +272 0x1800 //RX_TDDRC_THRD_3 +273 0x3000 //RX_TDDRC_SLANT_0 +274 0x6E00 //RX_TDDRC_SLANT_1 +275 0x1000 //RX_TDDRC_ALPHA_UP_0 +276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x199A //RX_TDDRC_HMNC_GAIN +279 0x0001 //RX_TDDRC_SMT_FLAG +280 0x0CCD //RX_TDDRC_SMT_W +281 0x01E0 //RX_TDDRC_DRC_GAIN +195 0x0030 //RX_FDEQ_SUBNUM +196 0x4848 //RX_FDEQ_GAIN_0 +197 0x4848 //RX_FDEQ_GAIN_1 +198 0x4844 //RX_FDEQ_GAIN_2 +199 0x4B4D //RX_FDEQ_GAIN_3 +200 0x4E50 //RX_FDEQ_GAIN_4 +201 0x5254 //RX_FDEQ_GAIN_5 +202 0x5658 //RX_FDEQ_GAIN_6 +203 0x5C60 //RX_FDEQ_GAIN_7 +204 0x6468 //RX_FDEQ_GAIN_8 +205 0x6C70 //RX_FDEQ_GAIN_9 +206 0x7474 //RX_FDEQ_GAIN_10 +207 0x7474 //RX_FDEQ_GAIN_11 +208 0x7474 //RX_FDEQ_GAIN_12 +209 0x7474 //RX_FDEQ_GAIN_13 +210 0x7474 //RX_FDEQ_GAIN_14 +211 0x7474 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0202 //RX_FDEQ_BIN_0 +221 0x0203 //RX_FDEQ_BIN_1 +222 0x0402 //RX_FDEQ_BIN_2 +223 0x0304 //RX_FDEQ_BIN_3 +224 0x0405 //RX_FDEQ_BIN_4 +225 0x0506 //RX_FDEQ_BIN_5 +226 0x0708 //RX_FDEQ_BIN_6 +227 0x090A //RX_FDEQ_BIN_7 +228 0x0B0C //RX_FDEQ_BIN_8 +229 0x0D0E //RX_FDEQ_BIN_9 +230 0x1214 //RX_FDEQ_BIN_10 +231 0x1E1E //RX_FDEQ_BIN_11 +232 0x1E1E //RX_FDEQ_BIN_12 +233 0x1E1E //RX_FDEQ_BIN_13 +234 0x1E1E //RX_FDEQ_BIN_14 +235 0x202C //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x4000 //RX_FDEQ_RESRV_0 +245 0x0320 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0030 //RX_FDDRC_BAND_MARGIN_1 +248 0x0050 //RX_FDDRC_BAND_MARGIN_2 +249 0x0080 //RX_FDDRC_BAND_MARGIN_3 +250 0x0007 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x5000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x6400 //RX_FDDRC_THRD_3_2 +258 0x6400 //RX_FDDRC_THRD_3_3 +259 0x2000 //RX_FDDRC_SLANT_0_0 +260 0x2000 //RX_FDDRC_SLANT_0_1 +261 0x2000 //RX_FDDRC_SLANT_0_2 +262 0x2000 //RX_FDDRC_SLANT_0_3 +263 0x5333 //RX_FDDRC_SLANT_1_0 +264 0x5333 //RX_FDDRC_SLANT_1_1 +265 0x5333 //RX_FDDRC_SLANT_1_2 +266 0x5333 //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +286 0x0100 //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 +#VOL 2 +163 0x1000 //RX_TDDRC_ALPHA_UP_1 +164 0x1000 //RX_TDDRC_ALPHA_UP_2 +165 0x1000 //RX_TDDRC_ALPHA_UP_3 +166 0x1000 //RX_TDDRC_ALPHA_UP_4 +184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +190 0x7000 //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +269 0x0000 //RX_TDDRC_THRD_0 +270 0x0000 //RX_TDDRC_THRD_1 +271 0x1800 //RX_TDDRC_THRD_2 +272 0x1800 //RX_TDDRC_THRD_3 +273 0x3000 //RX_TDDRC_SLANT_0 +274 0x6E00 //RX_TDDRC_SLANT_1 +275 0x1000 //RX_TDDRC_ALPHA_UP_0 +276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x199A //RX_TDDRC_HMNC_GAIN +279 0x0001 //RX_TDDRC_SMT_FLAG +280 0x0CCD //RX_TDDRC_SMT_W +281 0x01E0 //RX_TDDRC_DRC_GAIN +195 0x0030 //RX_FDEQ_SUBNUM +196 0x4848 //RX_FDEQ_GAIN_0 +197 0x4848 //RX_FDEQ_GAIN_1 +198 0x4844 //RX_FDEQ_GAIN_2 +199 0x4B4D //RX_FDEQ_GAIN_3 +200 0x4E50 //RX_FDEQ_GAIN_4 +201 0x5254 //RX_FDEQ_GAIN_5 +202 0x5658 //RX_FDEQ_GAIN_6 +203 0x5C60 //RX_FDEQ_GAIN_7 +204 0x6468 //RX_FDEQ_GAIN_8 +205 0x6C70 //RX_FDEQ_GAIN_9 +206 0x7474 //RX_FDEQ_GAIN_10 +207 0x7474 //RX_FDEQ_GAIN_11 +208 0x7474 //RX_FDEQ_GAIN_12 +209 0x7474 //RX_FDEQ_GAIN_13 +210 0x7474 //RX_FDEQ_GAIN_14 +211 0x7474 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0202 //RX_FDEQ_BIN_0 +221 0x0203 //RX_FDEQ_BIN_1 +222 0x0402 //RX_FDEQ_BIN_2 +223 0x0304 //RX_FDEQ_BIN_3 +224 0x0405 //RX_FDEQ_BIN_4 +225 0x0506 //RX_FDEQ_BIN_5 +226 0x0708 //RX_FDEQ_BIN_6 +227 0x090A //RX_FDEQ_BIN_7 +228 0x0B0C //RX_FDEQ_BIN_8 +229 0x0D0E //RX_FDEQ_BIN_9 +230 0x1214 //RX_FDEQ_BIN_10 +231 0x1E1E //RX_FDEQ_BIN_11 +232 0x1E1E //RX_FDEQ_BIN_12 +233 0x1E1E //RX_FDEQ_BIN_13 +234 0x1E1E //RX_FDEQ_BIN_14 +235 0x202C //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x4000 //RX_FDEQ_RESRV_0 +245 0x0320 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0030 //RX_FDDRC_BAND_MARGIN_1 +248 0x0050 //RX_FDDRC_BAND_MARGIN_2 +249 0x0080 //RX_FDDRC_BAND_MARGIN_3 +250 0x0007 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x5000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x6400 //RX_FDDRC_THRD_3_2 +258 0x6400 //RX_FDDRC_THRD_3_3 +259 0x2000 //RX_FDDRC_SLANT_0_0 +260 0x2000 //RX_FDDRC_SLANT_0_1 +261 0x2000 //RX_FDDRC_SLANT_0_2 +262 0x2000 //RX_FDDRC_SLANT_0_3 +263 0x5333 //RX_FDDRC_SLANT_1_0 +264 0x5333 //RX_FDDRC_SLANT_1_1 +265 0x5333 //RX_FDDRC_SLANT_1_2 +266 0x5333 //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +286 0x0100 //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 +#VOL 3 +163 0x1000 //RX_TDDRC_ALPHA_UP_1 +164 0x1000 //RX_TDDRC_ALPHA_UP_2 +165 0x1000 //RX_TDDRC_ALPHA_UP_3 +166 0x1000 //RX_TDDRC_ALPHA_UP_4 +184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +190 0x7000 //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +269 0x0000 //RX_TDDRC_THRD_0 +270 0x0000 //RX_TDDRC_THRD_1 +271 0x1800 //RX_TDDRC_THRD_2 +272 0x1800 //RX_TDDRC_THRD_3 +273 0x3000 //RX_TDDRC_SLANT_0 +274 0x6E00 //RX_TDDRC_SLANT_1 +275 0x1000 //RX_TDDRC_ALPHA_UP_0 +276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x199A //RX_TDDRC_HMNC_GAIN +279 0x0001 //RX_TDDRC_SMT_FLAG +280 0x0CCD //RX_TDDRC_SMT_W +281 0x01E0 //RX_TDDRC_DRC_GAIN +195 0x0030 //RX_FDEQ_SUBNUM +196 0x4848 //RX_FDEQ_GAIN_0 +197 0x4848 //RX_FDEQ_GAIN_1 +198 0x4844 //RX_FDEQ_GAIN_2 +199 0x4B4D //RX_FDEQ_GAIN_3 +200 0x4E50 //RX_FDEQ_GAIN_4 +201 0x5254 //RX_FDEQ_GAIN_5 +202 0x5658 //RX_FDEQ_GAIN_6 +203 0x5C60 //RX_FDEQ_GAIN_7 +204 0x6468 //RX_FDEQ_GAIN_8 +205 0x6C70 //RX_FDEQ_GAIN_9 +206 0x7474 //RX_FDEQ_GAIN_10 +207 0x7474 //RX_FDEQ_GAIN_11 +208 0x7474 //RX_FDEQ_GAIN_12 +209 0x7474 //RX_FDEQ_GAIN_13 +210 0x7474 //RX_FDEQ_GAIN_14 +211 0x7474 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0202 //RX_FDEQ_BIN_0 +221 0x0203 //RX_FDEQ_BIN_1 +222 0x0402 //RX_FDEQ_BIN_2 +223 0x0304 //RX_FDEQ_BIN_3 +224 0x0405 //RX_FDEQ_BIN_4 +225 0x0506 //RX_FDEQ_BIN_5 +226 0x0708 //RX_FDEQ_BIN_6 +227 0x090A //RX_FDEQ_BIN_7 +228 0x0B0C //RX_FDEQ_BIN_8 +229 0x0D0E //RX_FDEQ_BIN_9 +230 0x1214 //RX_FDEQ_BIN_10 +231 0x1E1E //RX_FDEQ_BIN_11 +232 0x1E1E //RX_FDEQ_BIN_12 +233 0x1E1E //RX_FDEQ_BIN_13 +234 0x1E1E //RX_FDEQ_BIN_14 +235 0x202C //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x4000 //RX_FDEQ_RESRV_0 +245 0x0320 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0030 //RX_FDDRC_BAND_MARGIN_1 +248 0x0050 //RX_FDDRC_BAND_MARGIN_2 +249 0x0080 //RX_FDDRC_BAND_MARGIN_3 +250 0x0007 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x5000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x6400 //RX_FDDRC_THRD_3_2 +258 0x6400 //RX_FDDRC_THRD_3_3 +259 0x2000 //RX_FDDRC_SLANT_0_0 +260 0x2000 //RX_FDDRC_SLANT_0_1 +261 0x2000 //RX_FDDRC_SLANT_0_2 +262 0x2000 //RX_FDDRC_SLANT_0_3 +263 0x5333 //RX_FDDRC_SLANT_1_0 +264 0x5333 //RX_FDDRC_SLANT_1_1 +265 0x5333 //RX_FDDRC_SLANT_1_2 +266 0x5333 //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +286 0x0100 //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 +#VOL 4 +163 0x1000 //RX_TDDRC_ALPHA_UP_1 +164 0x1000 //RX_TDDRC_ALPHA_UP_2 +165 0x1000 //RX_TDDRC_ALPHA_UP_3 +166 0x1000 //RX_TDDRC_ALPHA_UP_4 +184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +190 0x7000 //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +269 0x0000 //RX_TDDRC_THRD_0 +270 0x0000 //RX_TDDRC_THRD_1 +271 0x1800 //RX_TDDRC_THRD_2 +272 0x1800 //RX_TDDRC_THRD_3 +273 0x3000 //RX_TDDRC_SLANT_0 +274 0x6E00 //RX_TDDRC_SLANT_1 +275 0x1000 //RX_TDDRC_ALPHA_UP_0 +276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x199A //RX_TDDRC_HMNC_GAIN +279 0x0001 //RX_TDDRC_SMT_FLAG +280 0x0CCD //RX_TDDRC_SMT_W +281 0x01E0 //RX_TDDRC_DRC_GAIN +195 0x0030 //RX_FDEQ_SUBNUM +196 0x4848 //RX_FDEQ_GAIN_0 +197 0x4848 //RX_FDEQ_GAIN_1 +198 0x4844 //RX_FDEQ_GAIN_2 +199 0x4B4D //RX_FDEQ_GAIN_3 +200 0x4E50 //RX_FDEQ_GAIN_4 +201 0x5254 //RX_FDEQ_GAIN_5 +202 0x5658 //RX_FDEQ_GAIN_6 +203 0x5C60 //RX_FDEQ_GAIN_7 +204 0x6468 //RX_FDEQ_GAIN_8 +205 0x6C70 //RX_FDEQ_GAIN_9 +206 0x7474 //RX_FDEQ_GAIN_10 +207 0x7474 //RX_FDEQ_GAIN_11 +208 0x7474 //RX_FDEQ_GAIN_12 +209 0x7474 //RX_FDEQ_GAIN_13 +210 0x7474 //RX_FDEQ_GAIN_14 +211 0x7474 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0202 //RX_FDEQ_BIN_0 +221 0x0203 //RX_FDEQ_BIN_1 +222 0x0402 //RX_FDEQ_BIN_2 +223 0x0304 //RX_FDEQ_BIN_3 +224 0x0405 //RX_FDEQ_BIN_4 +225 0x0506 //RX_FDEQ_BIN_5 +226 0x0708 //RX_FDEQ_BIN_6 +227 0x090A //RX_FDEQ_BIN_7 +228 0x0B0C //RX_FDEQ_BIN_8 +229 0x0D0E //RX_FDEQ_BIN_9 +230 0x1214 //RX_FDEQ_BIN_10 +231 0x1E1E //RX_FDEQ_BIN_11 +232 0x1E1E //RX_FDEQ_BIN_12 +233 0x1E1E //RX_FDEQ_BIN_13 +234 0x1E1E //RX_FDEQ_BIN_14 +235 0x202C //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x4000 //RX_FDEQ_RESRV_0 +245 0x0320 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0030 //RX_FDDRC_BAND_MARGIN_1 +248 0x0050 //RX_FDDRC_BAND_MARGIN_2 +249 0x0080 //RX_FDDRC_BAND_MARGIN_3 +250 0x0007 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x5000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x6400 //RX_FDDRC_THRD_3_2 +258 0x6400 //RX_FDDRC_THRD_3_3 +259 0x2000 //RX_FDDRC_SLANT_0_0 +260 0x2000 //RX_FDDRC_SLANT_0_1 +261 0x2000 //RX_FDDRC_SLANT_0_2 +262 0x2000 //RX_FDDRC_SLANT_0_3 +263 0x5333 //RX_FDDRC_SLANT_1_0 +264 0x5333 //RX_FDDRC_SLANT_1_1 +265 0x5333 //RX_FDDRC_SLANT_1_2 +266 0x5333 //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +286 0x0100 //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 +#VOL 5 +163 0x1000 //RX_TDDRC_ALPHA_UP_1 +164 0x1000 //RX_TDDRC_ALPHA_UP_2 +165 0x1000 //RX_TDDRC_ALPHA_UP_3 +166 0x1000 //RX_TDDRC_ALPHA_UP_4 +184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +190 0x7000 //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +269 0x0000 //RX_TDDRC_THRD_0 +270 0x0000 //RX_TDDRC_THRD_1 +271 0x1800 //RX_TDDRC_THRD_2 +272 0x1800 //RX_TDDRC_THRD_3 +273 0x3000 //RX_TDDRC_SLANT_0 +274 0x6E00 //RX_TDDRC_SLANT_1 +275 0x1000 //RX_TDDRC_ALPHA_UP_0 +276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x199A //RX_TDDRC_HMNC_GAIN +279 0x0001 //RX_TDDRC_SMT_FLAG +280 0x0CCD //RX_TDDRC_SMT_W +281 0x01E0 //RX_TDDRC_DRC_GAIN +195 0x0030 //RX_FDEQ_SUBNUM +196 0x4848 //RX_FDEQ_GAIN_0 +197 0x4848 //RX_FDEQ_GAIN_1 +198 0x4844 //RX_FDEQ_GAIN_2 +199 0x4B4D //RX_FDEQ_GAIN_3 +200 0x4E50 //RX_FDEQ_GAIN_4 +201 0x5254 //RX_FDEQ_GAIN_5 +202 0x5658 //RX_FDEQ_GAIN_6 +203 0x5C60 //RX_FDEQ_GAIN_7 +204 0x6468 //RX_FDEQ_GAIN_8 +205 0x6C70 //RX_FDEQ_GAIN_9 +206 0x7474 //RX_FDEQ_GAIN_10 +207 0x7474 //RX_FDEQ_GAIN_11 +208 0x7474 //RX_FDEQ_GAIN_12 +209 0x7474 //RX_FDEQ_GAIN_13 +210 0x7474 //RX_FDEQ_GAIN_14 +211 0x7474 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0202 //RX_FDEQ_BIN_0 +221 0x0203 //RX_FDEQ_BIN_1 +222 0x0402 //RX_FDEQ_BIN_2 +223 0x0304 //RX_FDEQ_BIN_3 +224 0x0405 //RX_FDEQ_BIN_4 +225 0x0506 //RX_FDEQ_BIN_5 +226 0x0708 //RX_FDEQ_BIN_6 +227 0x090A //RX_FDEQ_BIN_7 +228 0x0B0C //RX_FDEQ_BIN_8 +229 0x0D0E //RX_FDEQ_BIN_9 +230 0x1214 //RX_FDEQ_BIN_10 +231 0x1E1E //RX_FDEQ_BIN_11 +232 0x1E1E //RX_FDEQ_BIN_12 +233 0x1E1E //RX_FDEQ_BIN_13 +234 0x1E1E //RX_FDEQ_BIN_14 +235 0x202C //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x4000 //RX_FDEQ_RESRV_0 +245 0x0320 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0030 //RX_FDDRC_BAND_MARGIN_1 +248 0x0050 //RX_FDDRC_BAND_MARGIN_2 +249 0x0080 //RX_FDDRC_BAND_MARGIN_3 +250 0x0007 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x5000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x6400 //RX_FDDRC_THRD_3_2 +258 0x6400 //RX_FDDRC_THRD_3_3 +259 0x2000 //RX_FDDRC_SLANT_0_0 +260 0x2000 //RX_FDDRC_SLANT_0_1 +261 0x2000 //RX_FDDRC_SLANT_0_2 +262 0x2000 //RX_FDDRC_SLANT_0_3 +263 0x5333 //RX_FDDRC_SLANT_1_0 +264 0x5333 //RX_FDDRC_SLANT_1_1 +265 0x5333 //RX_FDDRC_SLANT_1_2 +266 0x5333 //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +286 0x0100 //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 +#VOL 6 +163 0x1000 //RX_TDDRC_ALPHA_UP_1 +164 0x1000 //RX_TDDRC_ALPHA_UP_2 +165 0x1000 //RX_TDDRC_ALPHA_UP_3 +166 0x1000 //RX_TDDRC_ALPHA_UP_4 +184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +190 0x7000 //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +269 0x0000 //RX_TDDRC_THRD_0 +270 0x0000 //RX_TDDRC_THRD_1 +271 0x1800 //RX_TDDRC_THRD_2 +272 0x1800 //RX_TDDRC_THRD_3 +273 0x3000 //RX_TDDRC_SLANT_0 +274 0x6E00 //RX_TDDRC_SLANT_1 +275 0x1000 //RX_TDDRC_ALPHA_UP_0 +276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x199A //RX_TDDRC_HMNC_GAIN +279 0x0001 //RX_TDDRC_SMT_FLAG +280 0x0CCD //RX_TDDRC_SMT_W +281 0x01E0 //RX_TDDRC_DRC_GAIN +195 0x0030 //RX_FDEQ_SUBNUM +196 0x4848 //RX_FDEQ_GAIN_0 +197 0x4848 //RX_FDEQ_GAIN_1 +198 0x4844 //RX_FDEQ_GAIN_2 +199 0x4B4D //RX_FDEQ_GAIN_3 +200 0x4E50 //RX_FDEQ_GAIN_4 +201 0x5254 //RX_FDEQ_GAIN_5 +202 0x5658 //RX_FDEQ_GAIN_6 +203 0x5C60 //RX_FDEQ_GAIN_7 +204 0x6468 //RX_FDEQ_GAIN_8 +205 0x6C70 //RX_FDEQ_GAIN_9 +206 0x7474 //RX_FDEQ_GAIN_10 +207 0x7474 //RX_FDEQ_GAIN_11 +208 0x7474 //RX_FDEQ_GAIN_12 +209 0x7474 //RX_FDEQ_GAIN_13 +210 0x7474 //RX_FDEQ_GAIN_14 +211 0x7474 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0202 //RX_FDEQ_BIN_0 +221 0x0203 //RX_FDEQ_BIN_1 +222 0x0402 //RX_FDEQ_BIN_2 +223 0x0304 //RX_FDEQ_BIN_3 +224 0x0405 //RX_FDEQ_BIN_4 +225 0x0506 //RX_FDEQ_BIN_5 +226 0x0708 //RX_FDEQ_BIN_6 +227 0x090A //RX_FDEQ_BIN_7 +228 0x0B0C //RX_FDEQ_BIN_8 +229 0x0D0E //RX_FDEQ_BIN_9 +230 0x1214 //RX_FDEQ_BIN_10 +231 0x1E1E //RX_FDEQ_BIN_11 +232 0x1E1E //RX_FDEQ_BIN_12 +233 0x1E1E //RX_FDEQ_BIN_13 +234 0x1E1E //RX_FDEQ_BIN_14 +235 0x202C //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x4000 //RX_FDEQ_RESRV_0 +245 0x0320 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0030 //RX_FDDRC_BAND_MARGIN_1 +248 0x0050 //RX_FDDRC_BAND_MARGIN_2 +249 0x0080 //RX_FDDRC_BAND_MARGIN_3 +250 0x0007 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x5000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x6400 //RX_FDDRC_THRD_3_2 +258 0x6400 //RX_FDDRC_THRD_3_3 +259 0x2000 //RX_FDDRC_SLANT_0_0 +260 0x2000 //RX_FDDRC_SLANT_0_1 +261 0x2000 //RX_FDDRC_SLANT_0_2 +262 0x2000 //RX_FDDRC_SLANT_0_3 +263 0x5333 //RX_FDDRC_SLANT_1_0 +264 0x5333 //RX_FDDRC_SLANT_1_1 +265 0x5333 //RX_FDDRC_SLANT_1_2 +266 0x5333 //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +286 0x0100 //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 + +#CASE_NAME HANDSET-HANDSET-RESERVE2-SWB +#PARAM_MODE Full +#PARAM_TYPE TX+2RX +#TOTAL_CUSTOM_STEP 7+7 +#TX +0 0x0000 //TX_OPERATION_MODE_0 +1 0x0000 //TX_OPERATION_MODE_1 +2 0x0076 //TX_PATCH_REG +3 0x6F7E //TX_SENDFUNC_MODE_0 +4 0x0001 //TX_SENDFUNC_MODE_1 +5 0x0002 //TX_NUM_MIC +6 0x0003 //TX_SAMPLINGFREQ_SIG +7 0x0003 //TX_SAMPLINGFREQ_PROC +8 0x000A //TX_FRAME_SZ_SIG +9 0x000A //TX_FRAME_SZ +10 0x0000 //TX_DELAY_OPT +11 0x0028 //TX_MAX_TAIL_LENGTH +12 0x0001 //TX_NUM_LOUTCHN +13 0x0001 //TX_MAXNUM_AECREF +14 0x0000 //TX_DBG_FUNC_REG +15 0x0000 //TX_DBG_FUNC_REG1 +16 0x0000 //TX_SYS_RESRV_0 +17 0x0000 //TX_SYS_RESRV_1 +18 0x0000 //TX_SYS_RESRV_2 +19 0x0000 //TX_SYS_RESRV_3 +20 0x0000 //TX_DIST2REF0 +21 0x00A3 //TX_DIST2REF1 +22 0x0000 //TX_DIST2REF_02 +23 0x0000 //TX_DIST2REF_03 +24 0x0000 //TX_DIST2REF_04 +25 0x0000 //TX_DIST2REF_05 +26 0x0000 //TX_MMIC +27 0x1000 //TX_PGA_0 +28 0x1000 //TX_PGA_1 +29 0x1000 //TX_PGA_2 +30 0x0000 //TX_PGA_3 +31 0x0000 //TX_PGA_4 +32 0x0000 //TX_PGA_5 +33 0x0000 //TX_MIC_PAIRS +34 0x0000 //TX_MIC_PAIRS_HS +35 0x0002 //TX_MICS_FOR_BF +36 0x0000 //TX_MIC_PAIRS_FORL1 +37 0x0002 //TX_MICS_OF_PAIR0 +38 0x0002 //TX_MICS_OF_PAIR1 +39 0x0002 //TX_MICS_OF_PAIR2 +40 0x0002 //TX_MICS_OF_PAIR3 +41 0x0000 //TX_MIC_DATA_SRC0 +42 0x0002 //TX_MIC_DATA_SRC1 +43 0x0001 //TX_MIC_DATA_SRC2 +44 0x0000 //TX_MIC_DATA_SRC3 +45 0x0000 //TX_MIC_PAIR_CH_04 +46 0x0000 //TX_MIC_PAIR_CH_05 +47 0x0000 //TX_MIC_PAIR_CH_10 +48 0x0000 //TX_MIC_PAIR_CH_11 +49 0x0000 //TX_MIC_PAIR_CH_12 +50 0x0000 //TX_MIC_PAIR_CH_13 +51 0x0000 //TX_MIC_PAIR_CH_14 +52 0x05DC //TX_HD_BIN_MASK +53 0x0010 //TX_HD_SUBAND_MASK +54 0x19A1 //TX_HD_FRAME_AVG_MASK +55 0x0320 //TX_HD_MIN_FRQ +56 0x1000 //TX_HD_ALPHA_PSD +57 0x1100 //TX_T_PHPR1 +58 0x0000 //TX_T_PHPR2 +59 0x0000 //TX_T_PTPR +60 0x0000 //TX_T_PNPR +61 0x0000 //TX_T_PAPR1 +62 0xEE6C //TX_T_PSDVAT +63 0x0800 //TX_CNT +64 0x4000 //TX_ANTI_HOWL_GAIN +65 0x0001 //TX_MICFORBFMARK_0 +66 0x0001 //TX_MICFORBFMARK_1 +67 0x0001 //TX_MICFORBFMARK_2 +68 0x0001 //TX_MICFORBFMARK_3 +69 0x0001 //TX_MICFORBFMARK_4 +70 0x0001 //TX_MICFORBFMARK_5 +71 0x0000 //TX_DIST2REF_10 +72 0x3A66 //TX_DIST2REF_11 +73 0x0000 //TX_DIST2REF2 +74 0x0000 //TX_DIST2REF_13 +75 0x0000 //TX_DIST2REF_14 +76 0x0000 //TX_DIST2REF_15 +77 0x0000 //TX_DIST2REF_20 +78 0x0000 //TX_DIST2REF_21 +79 0x0000 //TX_DIST2REF_22 +80 0x0000 //TX_DIST2REF_23 +81 0x0000 //TX_DIST2REF_24 +82 0x0000 //TX_DIST2REF_25 +83 0x0000 //TX_DIST2REF_30 +84 0x0000 //TX_DIST2REF_31 +85 0x0000 //TX_DIST2REF_32 +86 0x0000 //TX_DIST2REF_33 +87 0x0000 //TX_DIST2REF_34 +88 0x0000 //TX_DIST2REF_35 +89 0x0000 //TX_MIC_LOC_00 +90 0x0000 //TX_MIC_LOC_01 +91 0x0000 //TX_MIC_LOC_02 +92 0x0000 //TX_MIC_LOC_03 +93 0x0000 //TX_MIC_LOC_04 +94 0x0000 //TX_MIC_LOC_05 +95 0x0000 //TX_MIC_LOC_10 +96 0x0000 //TX_MIC_LOC_11 +97 0x0000 //TX_MIC_LOC_12 +98 0x0000 //TX_MIC_LOC_13 +99 0x0000 //TX_MIC_LOC_14 +100 0x0000 //TX_MIC_LOC_15 +101 0x0000 //TX_MIC_LOC_20 +102 0x0000 //TX_MIC_LOC_21 +103 0x0000 //TX_MIC_LOC_22 +104 0x0000 //TX_MIC_LOC_23 +105 0x0000 //TX_MIC_LOC_24 +106 0x0000 //TX_MIC_LOC_25 +107 0x0200 //TX_MIC_REFBLK_VOLUME +108 0x0AAC //TX_MIC_BLOCK_VOLUME +109 0x0000 //TX_INVERSE_MASK +110 0x0000 //TX_ADCS_MASK +111 0x04D0 //TX_ADCS_GAIN +112 0x4000 //TX_NFC_GAINFAC +113 0x0000 //TX_MAINMIC_BLKFACTOR +114 0x0000 //TX_REFMIC_BLKFACTOR +115 0x0000 //TX_BLMIC_BLKFACTOR +116 0x0000 //TX_BRMIC_BLKFACTOR +117 0x0031 //TX_MICBLK_START_BIN +118 0x0060 //TX_MICBLK_END_BIN +119 0x0015 //TX_MICBLK_FE_HOLD +120 0xFFF2 //TX_MICBLK_MR_EXP_TH +121 0xFFF2 //TX_MICBLK_LR_EXP_TH +122 0x0000 //TX_FENE_HOLD +123 0x4000 //TX_FE_ENER_TH_MTS +124 0x0004 //TX_FE_ENER_TH_EXP +125 0x6000 //TX_C_POST_FLT_MIC_MAINBLK +126 0x6000 //TX_C_POST_FLT_MIC_REFBLK +127 0x0010 //TX_MIC_BLOCK_N +128 0x7E56 //TX_A_HP +129 0x4000 //TX_B_PE +130 0x1800 //TX_THR_PITCH_DET_0 +131 0x1000 //TX_THR_PITCH_DET_1 +132 0x0800 //TX_THR_PITCH_DET_2 +133 0x0008 //TX_PITCH_BFR_LEN +134 0x0003 //TX_SBD_PITCH_DET +135 0x0050 //TX_TD_AEC_L +136 0x4000 //TX_MU0_UNP_TD_AEC +137 0x1000 //TX_MU0_PTD_TD_AEC +138 0x0000 //TX_PP_RESRV_0 +139 0x2A94 //TX_PP_RESRV_1 +140 0x55F0 //TX_PP_RESRV_2 +141 0x0000 //TX_PP_RESRV_3 +142 0x0000 //TX_PP_RESRV_4 +143 0x0000 //TX_PP_RESRV_5 +144 0x0000 //TX_PP_RESRV_6 +145 0x0000 //TX_PP_RESRV_7 +146 0x0028 //TX_TAIL_LENGTH +147 0x0080 //TX_AEC_REF_GAIN_0 +148 0x0800 //TX_AEC_REF_GAIN_1 +149 0x0800 //TX_AEC_REF_GAIN_2 +150 0x7900 //TX_EAD_THR +151 0x2000 //TX_THR_RE_EST +152 0x0400 //TX_MIN_EQ_RE_EST_0 +153 0x0400 //TX_MIN_EQ_RE_EST_1 +154 0x0800 //TX_MIN_EQ_RE_EST_2 +155 0x0800 //TX_MIN_EQ_RE_EST_3 +156 0x1000 //TX_MIN_EQ_RE_EST_4 +157 0x1000 //TX_MIN_EQ_RE_EST_5 +158 0x1000 //TX_MIN_EQ_RE_EST_6 +159 0x1000 //TX_MIN_EQ_RE_EST_7 +160 0x1000 //TX_MIN_EQ_RE_EST_8 +161 0x1000 //TX_MIN_EQ_RE_EST_9 +162 0x1000 //TX_MIN_EQ_RE_EST_10 +163 0x1000 //TX_MIN_EQ_RE_EST_11 +164 0x1000 //TX_MIN_EQ_RE_EST_12 +165 0x3000 //TX_LAMBDA_RE_EST +166 0x1000 //TX_LAMBDA_CB_NLE +167 0x1800 //TX_C_POST_FLT +168 0x4000 //TX_GAIN_NP +169 0x003C //TX_SE_HOLD_N +170 0x0046 //TX_DT_HOLD_N +171 0x03E8 //TX_DT2_HOLD_N +172 0x6666 //TX_AEC_RESRV_0 +173 0x0000 //TX_AEC_RESRV_1 +174 0x0014 //TX_AEC_RESRV_2 +175 0x0000 //TX_MIC_DELAY_LENGTH +176 0x0000 //TX_REF_DELAY_LENGTH +177 0x0000 //TX_ADD_LINEIN_GAINL +178 0x0000 //TX_ADD_LINEIN_GAINH +179 0x0000 //TX_MIN_EQ_RE_EST_14 +180 0x0000 //TX_DTD_THR1_8 +181 0x7FFF //TX_DTD_THR2_8 +182 0x0000 //TX_DTD_MIC_BLK2 +183 0x0008 //TX_FRQ_LIN_LEN +184 0x7FFF //TX_FRQ_AEC_LEN_RHO +185 0x6000 //TX_MU0_UNP_FRQ_AEC +186 0x4000 //TX_MU0_PTD_FRQ_AEC +187 0x000A //TX_MINENOISETH +188 0x0800 //TX_MU0_RE_EST +189 0x0001 //TX_AEC_NUM_CH +190 0x0000 //TX_BIGECHOATTENUATION_MAX +191 0x2000 //TX_A_POST_FLT_MICBLK +192 0x0000 //TX_BLKENERTH +193 0x0000 //TX_BLKENERHIGHTH +194 0x0000 //TX_NORMENERTH +195 0x0000 //TX_NORMENERHIGHTH +196 0x0000 //TX_NORMENERHIGHTHL +197 0x7000 //TX_DTD_THR1_0 +198 0x7000 //TX_DTD_THR1_1 +199 0x7000 //TX_DTD_THR1_2 +200 0x7F00 //TX_DTD_THR1_3 +201 0x7F00 //TX_DTD_THR1_4 +202 0x7F00 //TX_DTD_THR1_5 +203 0x7F00 //TX_DTD_THR1_6 +204 0x2000 //TX_DTD_THR2_0 +205 0x2000 //TX_DTD_THR2_1 +206 0x2000 //TX_DTD_THR2_2 +207 0x1000 //TX_DTD_THR2_3 +208 0x1000 //TX_DTD_THR2_4 +209 0x1000 //TX_DTD_THR2_5 +210 0x1000 //TX_DTD_THR2_6 +211 0x6000 //TX_DTD_THR3 +212 0x0177 //TX_SPK_CUT_K +213 0x1B58 //TX_DT_CUT_K +214 0x0100 //TX_DT_CUT_THR +215 0x04EB //TX_COMFORT_G +216 0x01F4 //TX_POWER_YOUT_TH +217 0x4000 //TX_FDPFGAINECHO +218 0x0000 //TX_DTD_HD_THR +219 0x0000 //TX_SPK_CUT_K_S +220 0x0000 //TX_DTD_MIC_BLK +221 0x0400 //TX_ADPT_STRICT_L +222 0x0200 //TX_ADPT_STRICT_H +223 0x0C00 //TX_RATIO_DT_L_TH_LOW +224 0x2000 //TX_RATIO_DT_H_TH_LOW +225 0x1800 //TX_RATIO_DT_L_TH_HIGH +226 0x3000 //TX_RATIO_DT_H_TH_HIGH +227 0x0A00 //TX_RATIO_DT_L0_TH +228 0x7000 //TX_B_POST_FILT_ECHO_L +229 0x7FFF //TX_B_POST_FILT_ECHO_H +230 0x0200 //TX_MIN_G_CTRL_ECHO +231 0x7FFF //TX_B_LESSCUT_RTO_ECHO +232 0x0000 //TX_EPD_OFFSET_00 +233 0x0000 //TX_EPD_OFFST_01 +234 0x1388 //TX_RATIO_DT_L0_TH_HIGH +235 0x3A98 //TX_RATIO_DT_H_TH_CUT +236 0x7FFF //TX_MIN_EQ_RE_EST_13 +237 0x0000 //TX_DTD_THR1_7 +238 0x0000 //TX_DTD_THR2_7 +239 0x0800 //TX_DT_RESRV_7 +240 0x0800 //TX_DT_RESRV_8 +241 0x0000 //TX_DT_RESRV_9 +242 0xF600 //TX_THR_SN_EST_0 +243 0xFA00 //TX_THR_SN_EST_1 +244 0xFA00 //TX_THR_SN_EST_2 +245 0xF800 //TX_THR_SN_EST_3 +246 0xF800 //TX_THR_SN_EST_4 +247 0xF800 //TX_THR_SN_EST_5 +248 0xF800 //TX_THR_SN_EST_6 +249 0xF700 //TX_THR_SN_EST_7 +250 0x0000 //TX_DELTA_THR_SN_EST_0 +251 0x0200 //TX_DELTA_THR_SN_EST_1 +252 0x0200 //TX_DELTA_THR_SN_EST_2 +253 0x0200 //TX_DELTA_THR_SN_EST_3 +254 0x0100 //TX_DELTA_THR_SN_EST_4 +255 0x0200 //TX_DELTA_THR_SN_EST_5 +256 0x0100 //TX_DELTA_THR_SN_EST_6 +257 0x0200 //TX_DELTA_THR_SN_EST_7 +258 0x4000 //TX_LAMBDA_NN_EST_0 +259 0x4000 //TX_LAMBDA_NN_EST_1 +260 0x4000 //TX_LAMBDA_NN_EST_2 +261 0x4000 //TX_LAMBDA_NN_EST_3 +262 0x4000 //TX_LAMBDA_NN_EST_4 +263 0x4000 //TX_LAMBDA_NN_EST_5 +264 0x4000 //TX_LAMBDA_NN_EST_6 +265 0x4000 //TX_LAMBDA_NN_EST_7 +266 0x0400 //TX_N_SN_EST +267 0x001E //TX_INBEAM_T +268 0x0041 //TX_INBEAMHOLDT +269 0x2000 //TX_G_STRICT +270 0x2000 //TX_EQ_THR_BF +271 0x799A //TX_LAMBDA_EQ_BF +272 0x1000 //TX_NE_RTO_TH +273 0x1000 //TX_NE_RTO_TH_L +274 0x1000 //TX_MAINREFRTOH_TH_H +275 0x0600 //TX_MAINREFRTOH_TH_L +276 0x2000 //TX_MAINREFRTO_TH_H +277 0x1400 //TX_MAINREFRTO_TH_L +278 0x0000 //TX_MAINREFRTO_TH_EQ +279 0x1000 //TX_B_POST_FLT_0 +280 0x1000 //TX_B_POST_FLT_1 +281 0x0014 //TX_NS_LVL_CTRL_0 +282 0x002C //TX_NS_LVL_CTRL_1 +283 0x0016 //TX_NS_LVL_CTRL_2 +284 0x0018 //TX_NS_LVL_CTRL_3 +285 0x0016 //TX_NS_LVL_CTRL_4 +286 0x0012 //TX_NS_LVL_CTRL_5 +287 0x0016 //TX_NS_LVL_CTRL_6 +288 0x0017 //TX_NS_LVL_CTRL_7 +289 0x000E //TX_MIN_GAIN_S_0 +290 0x000D //TX_MIN_GAIN_S_1 +291 0x0012 //TX_MIN_GAIN_S_2 +292 0x0010 //TX_MIN_GAIN_S_3 +293 0x0012 //TX_MIN_GAIN_S_4 +294 0x0012 //TX_MIN_GAIN_S_5 +295 0x0012 //TX_MIN_GAIN_S_6 +296 0x0012 //TX_MIN_GAIN_S_7 +297 0x6000 //TX_NMOS_SUP +298 0x0000 //TX_NS_MAX_PRI_SNR_TH +299 0x0000 //TX_NMOS_SUP_MENSA +300 0x7FFF //TX_SNRI_SUP_0 +301 0x6000 //TX_SNRI_SUP_1 +302 0x6000 //TX_SNRI_SUP_2 +303 0x6000 //TX_SNRI_SUP_3 +304 0x6000 //TX_SNRI_SUP_4 +305 0x6000 //TX_SNRI_SUP_5 +306 0x6000 //TX_SNRI_SUP_6 +307 0x6000 //TX_SNRI_SUP_7 +308 0x6000 //TX_THR_LFNS +309 0x0017 //TX_G_LFNS +310 0x09C4 //TX_GAIN0_NTH +311 0x000A //TX_MUSIC_MORENS +312 0x7FFF //TX_A_POST_FILT_0 +313 0x2000 //TX_A_POST_FILT_1 +314 0x4000 //TX_A_POST_FILT_S_0 +315 0x4000 //TX_A_POST_FILT_S_1 +316 0x4000 //TX_A_POST_FILT_S_2 +317 0x4000 //TX_A_POST_FILT_S_3 +318 0x4000 //TX_A_POST_FILT_S_4 +319 0x4000 //TX_A_POST_FILT_S_5 +320 0x5000 //TX_A_POST_FILT_S_6 +321 0x7000 //TX_A_POST_FILT_S_7 +322 0x1000 //TX_B_POST_FILT_0 +323 0x1000 //TX_B_POST_FILT_1 +324 0x2000 //TX_B_POST_FILT_2 +325 0x2000 //TX_B_POST_FILT_3 +326 0x2000 //TX_B_POST_FILT_4 +327 0x1000 //TX_B_POST_FILT_5 +328 0x3000 //TX_B_POST_FILT_6 +329 0x3000 //TX_B_POST_FILT_7 +330 0x1000 //TX_B_LESSCUT_RTO_S_0 +331 0x1000 //TX_B_LESSCUT_RTO_S_1 +332 0x1000 //TX_B_LESSCUT_RTO_S_2 +333 0x1000 //TX_B_LESSCUT_RTO_S_3 +334 0x1000 //TX_B_LESSCUT_RTO_S_4 +335 0x1000 //TX_B_LESSCUT_RTO_S_5 +336 0x1000 //TX_B_LESSCUT_RTO_S_6 +337 0x1000 //TX_B_LESSCUT_RTO_S_7 +338 0x7E14 //TX_LAMBDA_PFILT +339 0x7C29 //TX_LAMBDA_PFILT_S_0 +340 0x7C29 //TX_LAMBDA_PFILT_S_1 +341 0x7C29 //TX_LAMBDA_PFILT_S_2 +342 0x7C29 //TX_LAMBDA_PFILT_S_3 +343 0x7C29 //TX_LAMBDA_PFILT_S_4 +344 0x7C29 //TX_LAMBDA_PFILT_S_5 +345 0x7C29 //TX_LAMBDA_PFILT_S_6 +346 0x7C29 //TX_LAMBDA_PFILT_S_7 +347 0x07D0 //TX_K_PEPPER +348 0x0800 //TX_A_PEPPER +349 0x1D4C //TX_K_PEPPER_HF +350 0x0400 //TX_A_PEPPER_HF +351 0x0001 //TX_HMNC_BST_FLG +352 0x4000 //TX_HMNC_BST_THR +353 0x0800 //TX_DT_BINVAD_TH_0 +354 0x0800 //TX_DT_BINVAD_TH_1 +355 0x0800 //TX_DT_BINVAD_TH_2 +356 0x0800 //TX_DT_BINVAD_TH_3 +357 0x0000 //TX_DT_BINVAD_ENDF +358 0x1000 //TX_C_POST_FLT_DT +359 0x7FFF //TX_NS_B_POST_FLT_LESSCUT +360 0x0100 //TX_DT_BOOST +361 0x0000 //TX_BF_SGRAD_FLG +362 0x0005 //TX_BF_DVG_TH +363 0x001E //TX_SN_C_F +364 0x0000 //TX_K_APT +365 0x0001 //TX_NOISEDET +366 0x0190 //TX_NDETCT +367 0x000A //TX_NOISE_TH_0 +368 0x7FFF //TX_NOISE_TH_0_2 +369 0x7FFF //TX_NOISE_TH_0_3 +370 0x00C6 //TX_NOISE_TH_1 +371 0x0DAC //TX_NOISE_TH_2 +372 0x2260 //TX_NOISE_TH_3 +373 0x7080 //TX_NOISE_TH_4 +374 0x57E4 //TX_NOISE_TH_5 +375 0x4BD6 //TX_NOISE_TH_5_2 +376 0x0001 //TX_NOISE_TH_5_3 +377 0x4E20 //TX_NOISE_TH_5_4 +378 0x1194 //TX_NOISE_TH_6 +379 0x0014 //TX_MINENOISE_TH +380 0xD508 //TX_MORENS_TFMASK_TH +381 0x0001 //TX_DRC_QUIET_FLOOR +382 0x6D60 //TX_RATIODTL_CUT_TH +383 0x0DAC //TX_DT_CUT_K1 +384 0x00A5 //TX_OUT_ENER_S_TH_CLEAN +385 0x00A5 //TX_OUT_ENER_S_TH_LESSCLEAN +386 0x00A5 //TX_OUT_ENER_S_TH_NOISY +387 0x0029 //TX_OUT_ENER_TH_NOISE +388 0x0200 //TX_OUT_ENER_TH_SPEECH +389 0x2000 //TX_SN_NPB_GAIN +390 0x0000 //TX_NN_NPB_GAIN +391 0x3000 //TX_POST_MASK_SUP_HSNE +392 0x07D0 //TX_TAIL_DET_TH +393 0x4000 //TX_B_LESSCUT_RTO_WTA +394 0x0000 //TX_MEL_G_R +395 0x0080 //TX_SUPHIGH_TH +396 0x0000 //TX_MASK_G_R +397 0x0002 //TX_EXTRA_NS_L +398 0x1800 //TX_C_POST_FLT_MASK +399 0x7FFF //TX_A_POST_FLT_WNS +400 0x0148 //TX_MIN_G_LOW300HZ +401 0x0004 //TX_MAXLEVEL_CNG +402 0x00B4 //TX_STN_NOISE_TH +403 0x4000 //TX_POST_MASK_SUP +404 0x7FFF //TX_POST_MASK_ADJUST +405 0x00C8 //TX_NS_ENOISE_MIC0_TH +406 0x0014 //TX_MINENOISE_MIC0_TH +407 0x012C //TX_MINENOISE_MIC0_S_TH +408 0x2900 //TX_MIN_G_CTRL_SSNS +409 0x0800 //TX_METAL_RTO_THR +410 0x0FA0 //TX_NS_FP_K_METAL +411 0x3A98 //TX_NOISEDET_BOOST_TH +412 0x0FA0 //TX_NSMOOTH_TH +413 0x0000 //TX_NS_RESRV_8 +414 0x1800 //TX_RHO_UPB +415 0x2328 //TX_N_HOLD_HS +416 0x006E //TX_N_RHO_BFR0 +417 0x7FFF //TX_LAMBDA_ARSP_EST +418 0x0100 //TX_EXTRA_GAIN_MICBLOCK +419 0x0333 //TX_THR_STD_NSR +420 0x019A //TX_THR_STD_PLH +421 0x03E8 //TX_N_HOLD_STD +422 0x0066 //TX_THR_STD_RHO +423 0x2800 //TX_BF_RESET_THR_HS +424 0x0CCD //TX_SB_RTO_MEAN_TH +425 0x0300 //TX_SB_RHO_MEAN_TH_NTALK +426 0x2000 //TX_SB_RTO_MEAN_TH_ABN +427 0x2EE0 //TX_SB_RTO_MEAN_TH_RUB +428 0x0990 //TX_WTA_EN_RTO_TH +429 0x1400 //TX_TOP_ENER_TH_F +430 0x0100 //TX_DESIRED_TALK_HOLDT +431 0x0800 //TX_MIC_BLOCK_FACTOR +432 0x0000 //TX_NSEST_BFRLRNRDC +433 0x0000 //TX_THR_POST_FLT_HS +434 0x0010 //TX_HS_VAD_BIN +435 0x2666 //TX_THR_VAD_HS +436 0x2CCD //TX_MEAN_RTO_MIN_TH2 +437 0x0032 //TX_SILENCE_T +438 0x0000 //TX_A_POST_FLT_WTA +439 0x799A //TX_LAMBDA_PFLT_WTA +440 0x051E //TX_SB_RHO_MEAN2_TH +441 0x02F0 //TX_SB_RHO_MEAN3_TH +442 0x0000 //TX_HS_RESRV_4 +443 0x0000 //TX_HS_RESRV_5 +444 0x0001 //TX_DOA_VAD_THR_1 +445 0x003C //TX_DOA_VAD_THR_2 +446 0x0028 //TX_DOA_VAD_THR1_0 +447 0x0028 //TX_DOA_VAD_THR1_1 +448 0x0000 //TX_SRC_DOA_RNG_LOW_0A +449 0x001E //TX_SRC_DOA_RNG_HIGH_0A +450 0x005A //TX_DFLT_SRC_DOA_0A +451 0x0000 //TX_SRC_DOA_RNG_LOW_0B +452 0x0000 //TX_SRC_DOA_RNG_HIGH_0B +453 0x0000 //TX_DFLT_SRC_DOA_0B +454 0x0000 //TX_SRC_DOA_RNG_LOW_0C +455 0x0000 //TX_SRC_DOA_RNG_HIGH_0C +456 0x0000 //TX_DFLT_SRC_DOA_0C +457 0x0000 //TX_SRC_DOA_RNG_LOW_0D +458 0x0000 //TX_SRC_DOA_RNG_HIGH_0D +459 0x0000 //TX_DFLT_SRC_DOA_0D +460 0x0000 //TX_SRC_DOA_RNG_LOW_1A +461 0x00B4 //TX_SRC_DOA_RNG_HIGH_1A +462 0x005A //TX_DFLT_SRC_DOA_1A +463 0x0000 //TX_SRC_DOA_RNG_LOW_1B +464 0x00B4 //TX_SRC_DOA_RNG_HIGH_1B +465 0x005A //TX_DFLT_SRC_DOA_1B +466 0x0000 //TX_SRC_DOA_RNG_LOW_1C +467 0x00B4 //TX_SRC_DOA_RNG_HIGH_1C +468 0x005A //TX_DFLT_SRC_DOA_1C +469 0x0000 //TX_SRC_DOA_RNG_LOW_1D +470 0x00B4 //TX_SRC_DOA_RNG_HIGH_1D +471 0x005A //TX_DFLT_SRC_DOA_1D +472 0x0100 //TX_BF_HOLDOFF_T +473 0x7FFF //TX_DOA_COST_FACTOR +474 0x0D9A //TX_MAINTOREFR_TH0 +475 0x071C //TX_DOA_TRK_THR +476 0x012C //TX_DOA_TRACK_HT +477 0x0200 //TX_N1_HOLD_HF +478 0x0100 //TX_N2_HOLD_HF +479 0x2A3D //TX_BF_RESET_THR_HF +480 0x7333 //TX_DOA_SMOOTH +481 0x0800 //TX_MU_BF +482 0x0800 //TX_BF_MU_LF_B2 +483 0x0040 //TX_BF_FC_END_BIN_B2 +484 0x0020 //TX_BF_FC_END_BIN +485 0x0000 //TX_HF_RESRV_25 +486 0x0000 //TX_HF_RESRV_26 +487 0x0007 //TX_N_DOA_SEED +488 0x0001 //TX_FINE_DOA_SEARCH_FLG +489 0x0000 //TX_HF_RESRV_27 +490 0x038E //TX_DLT_SRC_DOA_RNG +491 0x0200 //TX_BF_MU_LF +492 0x0000 //TX_DFLT_SRC_LOC_0 +493 0x7FFF //TX_DFLT_SRC_LOC_1 +494 0x0000 //TX_DFLT_SRC_LOC_2 +495 0x038E //TX_DOA_TRACK_VADTH +496 0x0000 //TX_DOA_TRACK_NEW +497 0x0300 //TX_NOR_OFF_THR +498 0x7C00 //TX_MORE_ON_700HZ_THR +499 0x2000 //TX_MU_BF_ADPT_NS +500 0x0000 //TX_ADAPT_LEN +501 0x6666 //TX_MORE_SNS +502 0x0000 //TX_NOR_OFF_TH1 +503 0x0000 //TX_WIDE_MASK_TH +504 0xD333 //TX_SUBSNRATIOHIGH4MEANBCK_THR +505 0x6000 //TX_C_POST_FLT_CUT +506 0x2000 //TX_RADIODTLV +507 0x0320 //TX_POWER_LINEIN_TH +508 0x0014 //TX_FE_VADCOUNT_TH_FC +509 0x0000 //TX_ECHO_SUPP_FC +510 0x0C80 //TX_ECHO_TH +511 0x6666 //TX_MIC_TO_BFGAIN +512 0x0000 //TX_MICTOBFGAIN0 +513 0x0000 //TX_FASTMUE_TH +514 0x2CCC //TX_DEREVERB_LF_MU +515 0x3200 //TX_DEREVERB_HF_MU +516 0x0007 //TX_DEREVERB_DELAY +517 0x0004 //TX_DEREVERB_COEF_LEN +518 0x0003 //TX_DEREVERB_DNR +519 0x0000 //TX_DEREVERB_ALPHA +520 0x0000 //TX_DEREVERB_BETA +521 0x3A98 //TX_GSC_RTOL_TH +522 0x3A98 //TX_GSC_RTOH_TH +523 0x7E2C //TX_WIDE2_MEANHTH +524 0x0000 //TX_DR_RESRV_5 +525 0x0000 //TX_DR_RESRV_6 +526 0x0000 //TX_DR_RESRV_7 +527 0x0000 //TX_DR_RESRV_8 +528 0x1333 //TX_WIND_MARK_TH +529 0x399A //TX_CORR_THR +530 0x0004 //TX_SNR_THR +531 0x0010 //TX_ENGY_THR +532 0x1770 //TX_CORR_HIGH_TH +533 0x6000 //TX_ENGY_THR_2 +534 0x3400 //TX_MEAN_RTO_THR +535 0x0028 //TX_WNS_ENOISE_MIC0_TH +536 0x3000 //TX_RATIOMICL_TH +537 0x7FFF //TX_CALIG_HS +538 0x0000 //TX_LVL_CTRL +539 0x0010 //TX_WIND_SUPRTO +540 0x0014 //TX_WNS_MIN_G +541 0x0600 //TX_WNS_B_POST_FLT +542 0x3000 //TX_RATIOMICH_TH +543 0xD120 //TX_WIND_INBEAM_L_TH +544 0x0FA0 //TX_WIND_INBEAM_H_TH +545 0x2000 //TX_WNS_RESRV_0 +546 0x59D8 //TX_WNS_RESRV_1 +547 0x0200 //TX_WNS_RESRV_2 +548 0x0000 //TX_WNS_RESRV_3 +549 0x0000 //TX_WNS_RESRV_4 +550 0x0000 //TX_WNS_RESRV_5 +551 0x0000 //TX_WNS_RESRV_6 +552 0x0000 //TX_PB_B_POST_FLT_LESSCUT +553 0x0070 //TX_BF_LESSCUT_BBIN +554 0x0070 //TX_BF_LESSCUT_EBIN +555 0x0010 //TX_POSTBFB0 +556 0x0070 //TX_POSTBFB +557 0x00B0 //TX_POSTBFE +558 0x0E66 //TX_SPEECH_SNR_TH +559 0x0050 //TX_PB_MAX_PRI_SNR_TH +560 0x770A //TX_MAX_PRI_SNR_TH_L +561 0x0000 //TX_PFGAIN +562 0x0000 //TX_MAINTOREFR_TH +563 0x0000 //TX_SAM_MARK +564 0x0000 //TX_PB_RESRV_0 +565 0x0000 //TX_PB_RESRV_1 +566 0x0030 //TX_FDEQ_SUBNUM +567 0x5C54 //TX_FDEQ_GAIN_0 +568 0x5048 //TX_FDEQ_GAIN_1 +569 0x4C4C //TX_FDEQ_GAIN_2 +570 0x494D //TX_FDEQ_GAIN_3 +571 0x4442 //TX_FDEQ_GAIN_4 +572 0x4448 //TX_FDEQ_GAIN_5 +573 0x4C53 //TX_FDEQ_GAIN_6 +574 0x6244 //TX_FDEQ_GAIN_7 +575 0x4348 //TX_FDEQ_GAIN_8 +576 0x4848 //TX_FDEQ_GAIN_9 +577 0x4A49 //TX_FDEQ_GAIN_10 +578 0x4E4A //TX_FDEQ_GAIN_11 +579 0x4840 //TX_FDEQ_GAIN_12 +580 0x4040 //TX_FDEQ_GAIN_13 +581 0x4054 //TX_FDEQ_GAIN_14 +582 0x687A //TX_FDEQ_GAIN_15 +583 0x4848 //TX_FDEQ_GAIN_16 +584 0x4848 //TX_FDEQ_GAIN_17 +585 0x4848 //TX_FDEQ_GAIN_18 +586 0x4848 //TX_FDEQ_GAIN_19 +587 0x4848 //TX_FDEQ_GAIN_20 +588 0x4848 //TX_FDEQ_GAIN_21 +589 0x4848 //TX_FDEQ_GAIN_22 +590 0x4848 //TX_FDEQ_GAIN_23 +591 0x0202 //TX_FDEQ_BIN_0 +592 0x0104 //TX_FDEQ_BIN_1 +593 0x0502 //TX_FDEQ_BIN_2 +594 0x0202 //TX_FDEQ_BIN_3 +595 0x0504 //TX_FDEQ_BIN_4 +596 0x0708 //TX_FDEQ_BIN_5 +597 0x0808 //TX_FDEQ_BIN_6 +598 0x050E //TX_FDEQ_BIN_7 +599 0x0B0C //TX_FDEQ_BIN_8 +600 0x0F0F //TX_FDEQ_BIN_9 +601 0x0E0D //TX_FDEQ_BIN_10 +602 0x0F28 //TX_FDEQ_BIN_11 +603 0x111B //TX_FDEQ_BIN_12 +604 0x291E //TX_FDEQ_BIN_13 +605 0x1E10 //TX_FDEQ_BIN_14 +606 0x1810 //TX_FDEQ_BIN_15 +607 0x1021 //TX_FDEQ_BIN_16 +608 0x1000 //TX_FDEQ_BIN_17 +609 0x0000 //TX_FDEQ_BIN_18 +610 0x0000 //TX_FDEQ_BIN_19 +611 0x0000 //TX_FDEQ_BIN_20 +612 0x0000 //TX_FDEQ_BIN_21 +613 0x0000 //TX_FDEQ_BIN_22 +614 0x0000 //TX_FDEQ_BIN_23 +615 0x0000 //TX_FDEQ_PADDING +616 0x0030 //TX_PREEQ_SUBNUM_MIC0 +617 0x4848 //TX_PREEQ_GAIN_MIC0_0 +618 0x4848 //TX_PREEQ_GAIN_MIC0_1 +619 0x4848 //TX_PREEQ_GAIN_MIC0_2 +620 0x4848 //TX_PREEQ_GAIN_MIC0_3 +621 0x4848 //TX_PREEQ_GAIN_MIC0_4 +622 0x4848 //TX_PREEQ_GAIN_MIC0_5 +623 0x4848 //TX_PREEQ_GAIN_MIC0_6 +624 0x4848 //TX_PREEQ_GAIN_MIC0_7 +625 0x4848 //TX_PREEQ_GAIN_MIC0_8 +626 0x4848 //TX_PREEQ_GAIN_MIC0_9 +627 0x4848 //TX_PREEQ_GAIN_MIC0_10 +628 0x4848 //TX_PREEQ_GAIN_MIC0_11 +629 0x4848 //TX_PREEQ_GAIN_MIC0_12 +630 0x4848 //TX_PREEQ_GAIN_MIC0_13 +631 0x4848 //TX_PREEQ_GAIN_MIC0_14 +632 0x4848 //TX_PREEQ_GAIN_MIC0_15 +633 0x4848 //TX_PREEQ_GAIN_MIC0_16 +634 0x4848 //TX_PREEQ_GAIN_MIC0_17 +635 0x4848 //TX_PREEQ_GAIN_MIC0_18 +636 0x4848 //TX_PREEQ_GAIN_MIC0_19 +637 0x4848 //TX_PREEQ_GAIN_MIC0_20 +638 0x4848 //TX_PREEQ_GAIN_MIC0_21 +639 0x4848 //TX_PREEQ_GAIN_MIC0_22 +640 0x4848 //TX_PREEQ_GAIN_MIC0_23 +641 0x251A //TX_PREEQ_BIN_MIC0_0 +642 0x0F0F //TX_PREEQ_BIN_MIC0_1 +643 0x0C0C //TX_PREEQ_BIN_MIC0_2 +644 0x0C0F //TX_PREEQ_BIN_MIC0_3 +645 0x0F0F //TX_PREEQ_BIN_MIC0_4 +646 0x0F09 //TX_PREEQ_BIN_MIC0_5 +647 0x0909 //TX_PREEQ_BIN_MIC0_6 +648 0x0908 //TX_PREEQ_BIN_MIC0_7 +649 0x070F //TX_PREEQ_BIN_MIC0_8 +650 0x1F08 //TX_PREEQ_BIN_MIC0_9 +651 0x0808 //TX_PREEQ_BIN_MIC0_10 +652 0x0920 //TX_PREEQ_BIN_MIC0_11 +653 0x2020 //TX_PREEQ_BIN_MIC0_12 +654 0x2021 //TX_PREEQ_BIN_MIC0_13 +655 0x0000 //TX_PREEQ_BIN_MIC0_14 +656 0x0000 //TX_PREEQ_BIN_MIC0_15 +657 0x0000 //TX_PREEQ_BIN_MIC0_16 +658 0x0000 //TX_PREEQ_BIN_MIC0_17 +659 0x0000 //TX_PREEQ_BIN_MIC0_18 +660 0x0000 //TX_PREEQ_BIN_MIC0_19 +661 0x0000 //TX_PREEQ_BIN_MIC0_20 +662 0x0000 //TX_PREEQ_BIN_MIC0_21 +663 0x0000 //TX_PREEQ_BIN_MIC0_22 +664 0x0000 //TX_PREEQ_BIN_MIC0_23 +665 0x0030 //TX_PREEQ_SUBNUM_MIC1 +666 0x4848 //TX_PREEQ_GAIN_MIC1_0 +667 0x4848 //TX_PREEQ_GAIN_MIC1_1 +668 0x4848 //TX_PREEQ_GAIN_MIC1_2 +669 0x4848 //TX_PREEQ_GAIN_MIC1_3 +670 0x4848 //TX_PREEQ_GAIN_MIC1_4 +671 0x4848 //TX_PREEQ_GAIN_MIC1_5 +672 0x494A //TX_PREEQ_GAIN_MIC1_6 +673 0x4B4C //TX_PREEQ_GAIN_MIC1_7 +674 0x4D4E //TX_PREEQ_GAIN_MIC1_8 +675 0x4F52 //TX_PREEQ_GAIN_MIC1_9 +676 0x5355 //TX_PREEQ_GAIN_MIC1_10 +677 0x585C //TX_PREEQ_GAIN_MIC1_11 +678 0x616A //TX_PREEQ_GAIN_MIC1_12 +679 0x726E //TX_PREEQ_GAIN_MIC1_13 +680 0x5C48 //TX_PREEQ_GAIN_MIC1_14 +681 0x3B38 //TX_PREEQ_GAIN_MIC1_15 +682 0x4848 //TX_PREEQ_GAIN_MIC1_16 +683 0x4848 //TX_PREEQ_GAIN_MIC1_17 +684 0x4848 //TX_PREEQ_GAIN_MIC1_18 +685 0x4848 //TX_PREEQ_GAIN_MIC1_19 +686 0x4848 //TX_PREEQ_GAIN_MIC1_20 +687 0x4848 //TX_PREEQ_GAIN_MIC1_21 +688 0x4848 //TX_PREEQ_GAIN_MIC1_22 +689 0x4848 //TX_PREEQ_GAIN_MIC1_23 +690 0x0202 //TX_PREEQ_BIN_MIC1_0 +691 0x0203 //TX_PREEQ_BIN_MIC1_1 +692 0x0303 //TX_PREEQ_BIN_MIC1_2 +693 0x0304 //TX_PREEQ_BIN_MIC1_3 +694 0x0405 //TX_PREEQ_BIN_MIC1_4 +695 0x0506 //TX_PREEQ_BIN_MIC1_5 +696 0x0708 //TX_PREEQ_BIN_MIC1_6 +697 0x090A //TX_PREEQ_BIN_MIC1_7 +698 0x0B0C //TX_PREEQ_BIN_MIC1_8 +699 0x0D0E //TX_PREEQ_BIN_MIC1_9 +700 0x1013 //TX_PREEQ_BIN_MIC1_10 +701 0x1719 //TX_PREEQ_BIN_MIC1_11 +702 0x1B1E //TX_PREEQ_BIN_MIC1_12 +703 0x1E1E //TX_PREEQ_BIN_MIC1_13 +704 0x1E28 //TX_PREEQ_BIN_MIC1_14 +705 0x3042 //TX_PREEQ_BIN_MIC1_15 +706 0x0000 //TX_PREEQ_BIN_MIC1_16 +707 0x0000 //TX_PREEQ_BIN_MIC1_17 +708 0x0000 //TX_PREEQ_BIN_MIC1_18 +709 0x0000 //TX_PREEQ_BIN_MIC1_19 +710 0x0000 //TX_PREEQ_BIN_MIC1_20 +711 0x0000 //TX_PREEQ_BIN_MIC1_21 +712 0x0000 //TX_PREEQ_BIN_MIC1_22 +713 0x0000 //TX_PREEQ_BIN_MIC1_23 +714 0x0030 //TX_PREEQ_SUBNUM_MIC2 +715 0x4848 //TX_PREEQ_GAIN_MIC2_0 +716 0x4848 //TX_PREEQ_GAIN_MIC2_1 +717 0x4848 //TX_PREEQ_GAIN_MIC2_2 +718 0x4848 //TX_PREEQ_GAIN_MIC2_3 +719 0x4848 //TX_PREEQ_GAIN_MIC2_4 +720 0x4848 //TX_PREEQ_GAIN_MIC2_5 +721 0x4848 //TX_PREEQ_GAIN_MIC2_6 +722 0x4848 //TX_PREEQ_GAIN_MIC2_7 +723 0x4848 //TX_PREEQ_GAIN_MIC2_8 +724 0x4848 //TX_PREEQ_GAIN_MIC2_9 +725 0x4848 //TX_PREEQ_GAIN_MIC2_10 +726 0x4848 //TX_PREEQ_GAIN_MIC2_11 +727 0x4848 //TX_PREEQ_GAIN_MIC2_12 +728 0x4848 //TX_PREEQ_GAIN_MIC2_13 +729 0x4848 //TX_PREEQ_GAIN_MIC2_14 +730 0x4848 //TX_PREEQ_GAIN_MIC2_15 +731 0x4848 //TX_PREEQ_GAIN_MIC2_16 +732 0x4848 //TX_PREEQ_GAIN_MIC2_17 +733 0x4848 //TX_PREEQ_GAIN_MIC2_18 +734 0x4848 //TX_PREEQ_GAIN_MIC2_19 +735 0x4848 //TX_PREEQ_GAIN_MIC2_20 +736 0x4848 //TX_PREEQ_GAIN_MIC2_21 +737 0x4848 //TX_PREEQ_GAIN_MIC2_22 +738 0x4848 //TX_PREEQ_GAIN_MIC2_23 +739 0x0608 //TX_PREEQ_BIN_MIC2_0 +740 0x0808 //TX_PREEQ_BIN_MIC2_1 +741 0x0808 //TX_PREEQ_BIN_MIC2_2 +742 0x0808 //TX_PREEQ_BIN_MIC2_3 +743 0x0808 //TX_PREEQ_BIN_MIC2_4 +744 0x0808 //TX_PREEQ_BIN_MIC2_5 +745 0x0808 //TX_PREEQ_BIN_MIC2_6 +746 0x0808 //TX_PREEQ_BIN_MIC2_7 +747 0x0808 //TX_PREEQ_BIN_MIC2_8 +748 0x0808 //TX_PREEQ_BIN_MIC2_9 +749 0x0808 //TX_PREEQ_BIN_MIC2_10 +750 0x0808 //TX_PREEQ_BIN_MIC2_11 +751 0x0808 //TX_PREEQ_BIN_MIC2_12 +752 0x0808 //TX_PREEQ_BIN_MIC2_13 +753 0x0808 //TX_PREEQ_BIN_MIC2_14 +754 0x0200 //TX_PREEQ_BIN_MIC2_15 +755 0x0000 //TX_PREEQ_BIN_MIC2_16 +756 0x0000 //TX_PREEQ_BIN_MIC2_17 +757 0x0000 //TX_PREEQ_BIN_MIC2_18 +758 0x0000 //TX_PREEQ_BIN_MIC2_19 +759 0x0000 //TX_PREEQ_BIN_MIC2_20 +760 0x0000 //TX_PREEQ_BIN_MIC2_21 +761 0x0000 //TX_PREEQ_BIN_MIC2_22 +762 0x0000 //TX_PREEQ_BIN_MIC2_23 +763 0x0006 //TX_MASKING_ABILITY +764 0x0800 //TX_NND_WEIGHT +765 0x0050 //TX_MIC_CALIBRATION_0 +766 0x0056 //TX_MIC_CALIBRATION_1 +767 0x0050 //TX_MIC_CALIBRATION_2 +768 0x0050 //TX_MIC_CALIBRATION_3 +769 0x0046 //TX_MIC_PWR_BIAS_0 +770 0x0042 //TX_MIC_PWR_BIAS_1 +771 0x0046 //TX_MIC_PWR_BIAS_2 +772 0x0046 //TX_MIC_PWR_BIAS_3 +773 0x0000 //TX_GAIN_LIMIT_0 +774 0x0006 //TX_GAIN_LIMIT_1 +775 0x0000 //TX_GAIN_LIMIT_2 +776 0x0000 //TX_GAIN_LIMIT_3 +777 0x7F5B //TX_BVE_NOVAD0_ALPHADOWN +778 0x7FDE //TX_BVE_VAD0_ALPHAUP +779 0x7F3A //TX_BVE_VAD0_ALPHADOWN +780 0x2000 //TX_BVE_GAINWEIGHT_NOFEVADLI +781 0x7F5B //TX_BVE_FEVADLI_ALPHA +782 0x7F19 //TX_BVE_NOVAD0_ALPHAUP +783 0x1000 //TX_TDDRC_ALPHA_UP_01 +784 0x1000 //TX_TDDRC_ALPHA_UP_02 +785 0x1000 //TX_TDDRC_ALPHA_UP_03 +786 0x1000 //TX_TDDRC_ALPHA_UP_04 +787 0x7EB8 //TX_TDDRC_ALPHA_DWN_01 +788 0x7EB8 //TX_TDDRC_ALPHA_DWN_02 +789 0x7EB8 //TX_TDDRC_ALPHA_DWN_03 +790 0x7EB8 //TX_TDDRC_ALPHA_DWN_04 +791 0x7FFF //TX_TDDRC_TD_DRC_LIMIT +792 0x0800 //TX_TDDRC_POST_LIMIT_GAIN +793 0x0000 //TX_TDDRC_RESRV_0 +794 0x0000 //TX_TDDRC_RESRV_1 +795 0x0018 //TX_FDDRC_BAND_MARGIN_0 +796 0x0030 //TX_FDDRC_BAND_MARGIN_1 +797 0x0050 //TX_FDDRC_BAND_MARGIN_2 +798 0x0080 //TX_FDDRC_BAND_MARGIN_3 +799 0x0007 //TX_FDDRC_BLOCK_EXP +800 0x5000 //TX_FDDRC_THRD_2_0 +801 0x5000 //TX_FDDRC_THRD_2_1 +802 0x5000 //TX_FDDRC_THRD_2_2 +803 0x5000 //TX_FDDRC_THRD_2_3 +804 0x6400 //TX_FDDRC_THRD_3_0 +805 0x6400 //TX_FDDRC_THRD_3_1 +806 0x6400 //TX_FDDRC_THRD_3_2 +807 0x6400 //TX_FDDRC_THRD_3_3 +808 0x2000 //TX_FDDRC_SLANT_0_0 +809 0x2000 //TX_FDDRC_SLANT_0_1 +810 0x2000 //TX_FDDRC_SLANT_0_2 +811 0x2000 //TX_FDDRC_SLANT_0_3 +812 0x5333 //TX_FDDRC_SLANT_1_0 +813 0x5333 //TX_FDDRC_SLANT_1_1 +814 0x5333 //TX_FDDRC_SLANT_1_2 +815 0x5333 //TX_FDDRC_SLANT_1_3 +816 0x0010 //TX_DEADMIC_SILENCE_TH +817 0x0600 //TX_MIC_DEGRADE_TH +818 0x0078 //TX_DEADMIC_CNT +819 0x0078 //TX_MIC_DEGRADE_CNT +820 0x0000 //TX_FDDRC_RESRV_4 +821 0x0000 //TX_FDDRC_RESRV_5 +822 0x0000 //TX_FDDRC_RESRV_6 +823 0x7FFF //TX_KS_NOISEPASTE_FACTOR +824 0x0001 //TX_KS_CONFIG +825 0x7FFF //TX_KS_GAIN_MIN +826 0x0000 //TX_KS_RESRV_0 +827 0x0000 //TX_KS_RESRV_1 +828 0x0000 //TX_KS_RESRV_2 +829 0x7C00 //TX_LAMBDA_PKA_FP +830 0x2000 //TX_TPKA_FP +831 0x0080 //TX_MIN_G_FP +832 0x2000 //TX_MAX_G_FP +833 0x0FA0 //TX_FFP_FP_K_METAL +834 0x4000 //TX_A_POST_FLT_FP +835 0x0F5C //TX_RTO_OUTBEAM_TH +836 0x4CCD //TX_TPKA_FP_THD +837 0x0000 //TX_MAX_G_FP_BLK +838 0x0000 //TX_FFP_FADEIN +839 0x0000 //TX_FFP_FADEOUT +840 0x0000 //TX_WHISPERCTH +841 0x0000 //TX_WHISPERHOLDT +842 0x0000 //TX_WHISP_ENTHH +843 0x0000 //TX_WHISP_ENTHL +844 0x0000 //TX_WHISP_RTOTH +845 0x0000 //TX_WHISP_RTOTH2 +846 0x0096 //TX_MUTE_PERIOD +847 0x0000 //TX_FADE_IN_PERIOD +848 0x0100 //TX_FFP_RESRV_2 +849 0x0020 //TX_FFP_RESRV_3 +850 0x0000 //TX_FFP_RESRV_4 +851 0x0000 //TX_FFP_RESRV_5 +852 0x0000 //TX_FFP_RESRV_6 +853 0x0002 //TX_FILTINDX +854 0x0002 //TX_TDDRC_THRD_0 +855 0x0003 //TX_TDDRC_THRD_1 +856 0x1500 //TX_TDDRC_THRD_2 +857 0x1500 //TX_TDDRC_THRD_3 +858 0x3000 //TX_TDDRC_SLANT_0 +859 0x6E00 //TX_TDDRC_SLANT_1 +860 0x1000 //TX_TDDRC_ALPHA_UP_00 +861 0x7EB8 //TX_TDDRC_ALPHA_DWN_00 +862 0x0000 //TX_TDDRC_HMNC_FLAG +863 0x199A //TX_TDDRC_HMNC_GAIN +864 0x0000 //TX_TDDRC_SMT_FLAG +865 0x0CCD //TX_TDDRC_SMT_W +866 0x0650 //TX_TDDRC_DRC_GAIN +867 0x7FFF //TX_TDDRC_LMT_THRD +868 0x0000 //TX_TDDRC_LMT_ALPHA +869 0x0000 //TX_TFMASKLTH +870 0x0000 //TX_TFMASKLTHL +871 0x0CCD //TX_TFMASKHTH +872 0xECCD //TX_TFMASKLTH_BINVAD +873 0xFCCD //TX_TFMASKLTH_NS_EST +874 0xF800 //TX_TFMASKLTH_DOA +875 0x0CCD //TX_TFMASKTH_BLESSCUT +876 0x1000 //TX_B_LESSCUT_RTO_MASK +877 0x2000 //TX_SB_RHO_MEAN_TH_ABN +878 0x2000 //TX_B_POST_FLT_MASK +879 0x0000 //TX_B_POST_FLT_MASK1 +880 0x6333 //TX_GAIN_WIND_MASK +881 0x0000 //TX_TFMASK_BFSTRICT_MUSIC +882 0x0000 //TX_TFMASK_BFSTRICT_NOMUSIC +883 0x7333 //TX_FASTNS_OUTIN_TH +884 0x0CCD //TX_FASTNS_TFMASK_TH +885 0x0CCD //TX_FASTNS_TFMASKBIN_TH1 +886 0x0CCD //TX_FASTNS_TFMASKBIN_TH2 +887 0x0CCD //TX_FASTNS_TFMASKBIN_TH3 +888 0x0028 //TX_FASTNS_ARSPC_TH +889 0xC000 //TX_FASTNS_MASK5_TH +890 0x0810 //TX_POSTSSA_MIN_G_VR_MASK +891 0x1000 //TX_A_LESSCUT_RTO_MASK +892 0x1770 //TX_FASTNS_NOISETH +893 0xC000 //TX_FASTNS_SSA_THLFL +894 0xC000 //TX_FASTNS_SSA_THHFL +895 0xCCCC //TX_FASTNS_SSA_THLFH +896 0xD999 //TX_FASTNS_SSA_THHFH +897 0x2339 //TX_SENDFUNC_REG_MICMUTE +898 0x0021 //TX_SENDFUNC_REG_MICMUTE1 +899 0x02BC //TX_MICMUTE_RATIO_THR +900 0x0140 //TX_MICMUTE_AMP_THR +901 0x0004 //TX_MICMUTE_HPF_IND +902 0x00C0 //TX_MICMUTE_LOG_EYR_TH +903 0x0008 //TX_MICMUTE_CVG_TIME +904 0x0008 //TX_MICMUTE_RELEASE_TIME +905 0x01FE //TX_MIC_VOLUME_MIC0MUTE +906 0x0020 //TX_MICMUTE_EPD_OFFSET_0 +907 0x001E //TX_MICMUTE_FRQ_AEC_L +908 0x7999 //TX_MICMUTE_EAD_THR +909 0x7FFF //TX_MICMUTE_LAMBDA_CB_NLE +910 0x7FFF //TX_MICMUTE_LAMBDA_RE_EST +911 0x4000 //TX_DTD_THR1_MICMUTE_0 +912 0x7000 //TX_DTD_THR1_MICMUTE_1 +913 0x7FFF //TX_DTD_THR1_MICMUTE_2 +914 0x7FFF //TX_DTD_THR1_MICMUTE_3 +915 0x6CCC //TX_DTD_THR2_MICMUTE_0 +916 0x0400 //TX_MICMUTE_MIN_EQ_RE_EST_0 +917 0x0400 //TX_MICMUTE_MIN_EQ_RE_EST_1 +918 0x1000 //TX_MICMUTE_MIN_EQ_RE_EST_2 +919 0x7FFF //TX_MICMUTE_MIN_EQ_RE_EST_3 +920 0x7FFF //TX_MICMUTE_MIN_EQ_RE_EST_4 +921 0x4000 //TX_MICMUTE_C_POST_FLT +922 0x03E8 //TX_MICMUTE_DT_CUT_K +923 0x0001 //TX_MICMUTE_DT_CUT_THR +924 0x03E8 //TX_MICMUTE_DT_CUT_K2 +925 0x0001 //TX_MICMUTE_DT_CUT_THR2 +926 0x0064 //TX_MICMUTE_DT2_HOLD_N +927 0x1000 //TX_MICMUTE_RATIODTH_THCUT +928 0x1000 //TX_MICMUTE_B_POST_FLT_ECHOL +929 0x7FFF //TX_MICMUTE_B_POST_FLT_ECHOH +930 0x0400 //TX_MICMUTE_C_POST_FLT_MASK +931 0x7999 //TX_MICMUTE_RATIODTL_CUT_TH +932 0x0258 //TX_MICMUTE_DT_CUT_K1 +933 0x0800 //TX_MICMUTE_N2_SN_EST +934 0xFC00 //TX_MICMUTE_THR_SN_EST_0 +935 0x001C //TX_MICMUTE_MIN_G_CTRL_0 +936 0x6000 //TX_MICMUTE_A_POST_FILT_S_0 +937 0x7000 //TX_MICMUTE_B_POST_FILT_0 +938 0x2710 //TX_MIC1RUB_AMP_THR +939 0x0010 //TX_MIC1MUTE_RATIO_THR +940 0x0450 //TX_MIC1MUTE_AMP_THR +941 0x0008 //TX_MIC1MUTE_CVG_TIME +942 0x0008 //TX_MIC1MUTE_RELEASE_TIME +943 0x0000 //TX_AMS_RESRV_01 +944 0x0000 //TX_AMS_RESRV_02 +945 0x0000 //TX_AMS_RESRV_03 +946 0x0000 //TX_AMS_RESRV_04 +947 0x0000 //TX_AMS_RESRV_05 +948 0x0000 //TX_AMS_RESRV_06 +949 0x0000 //TX_AMS_RESRV_07 +950 0x0000 //TX_AMS_RESRV_08 +951 0x0000 //TX_AMS_RESRV_09 +952 0x0000 //TX_AMS_RESRV_10 +953 0x0000 //TX_AMS_RESRV_11 +954 0x0000 //TX_AMS_RESRV_12 +955 0x0000 //TX_AMS_RESRV_13 +956 0x0000 //TX_AMS_RESRV_14 +957 0x0000 //TX_AMS_RESRV_15 +958 0x0000 //TX_AMS_RESRV_16 +959 0x0000 //TX_AMS_RESRV_17 +960 0x0000 //TX_AMS_RESRV_18 +961 0x0000 //TX_AMS_RESRV_19 +#RX +0 0x203C //RX_RECVFUNC_MODE_0 +1 0x0000 //RX_RECVFUNC_MODE_1 +2 0x0003 //RX_SAMPLINGFREQ_SIG +3 0x0003 //RX_SAMPLINGFREQ_PROC +4 0x000A //RX_FRAME_SZ +5 0x0000 //RX_DELAY_OPT +6 0x1000 //RX_TDDRC_ALPHA_UP_1 +7 0x1000 //RX_TDDRC_ALPHA_UP_2 +8 0x1000 //RX_TDDRC_ALPHA_UP_3 +9 0x1000 //RX_TDDRC_ALPHA_UP_4 +10 0x05AA //RX_PGA +11 0x7FFF //RX_A_HP +12 0x4000 //RX_B_PE +13 0x5800 //RX_THR_PITCH_DET_0 +14 0x5000 //RX_THR_PITCH_DET_1 +15 0x4000 //RX_THR_PITCH_DET_2 +16 0x0008 //RX_PITCH_BFR_LEN +17 0x0003 //RX_SBD_PITCH_DET +18 0x0100 //RX_PP_RESRV_0 +19 0x0020 //RX_PP_RESRV_1 +20 0x0600 //RX_N_SN_EST +21 0x000C //RX_N2_SN_EST +22 0x000F //RX_NS_LVL_CTRL +23 0xF800 //RX_THR_SN_EST +24 0x7E00 //RX_LAMBDA_PFILT +25 0x000A //RX_FENS_RESRV_0 +26 0x0190 //RX_FENS_RESRV_1 +27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +30 0x0002 //RX_EXTRA_NS_L +31 0x0800 //RX_EXTRA_NS_A +32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +33 0x7000 //RX_TDDRC_LIMITER_THRD +34 0x0800 //RX_TDDRC_LIMITER_GAIN +35 0x199A //RX_A_POST_FLT +36 0x0000 //RX_LMT_THRD +37 0x4000 //RX_LMT_ALPHA +38 0x0020 //RX_FDEQ_SUBNUM +39 0x483E //RX_FDEQ_GAIN_0 +40 0x3E3E //RX_FDEQ_GAIN_1 +41 0x3E4C //RX_FDEQ_GAIN_2 +42 0x5064 //RX_FDEQ_GAIN_3 +43 0x7076 //RX_FDEQ_GAIN_4 +44 0x897A //RX_FDEQ_GAIN_5 +45 0x7C80 //RX_FDEQ_GAIN_6 +46 0x8888 //RX_FDEQ_GAIN_7 +47 0x949C //RX_FDEQ_GAIN_8 +48 0x96A4 //RX_FDEQ_GAIN_9 +49 0xA9A0 //RX_FDEQ_GAIN_10 +50 0x9487 //RX_FDEQ_GAIN_11 +51 0x6F64 //RX_FDEQ_GAIN_12 +52 0x625A //RX_FDEQ_GAIN_13 +53 0x5D80 //RX_FDEQ_GAIN_14 +54 0x8890 //RX_FDEQ_GAIN_15 +55 0x4848 //RX_FDEQ_GAIN_16 +56 0x4848 //RX_FDEQ_GAIN_17 +57 0x4848 //RX_FDEQ_GAIN_18 +58 0x4848 //RX_FDEQ_GAIN_19 +59 0x4848 //RX_FDEQ_GAIN_20 +60 0x4848 //RX_FDEQ_GAIN_21 +61 0x4848 //RX_FDEQ_GAIN_22 +62 0x4848 //RX_FDEQ_GAIN_23 +63 0x0202 //RX_FDEQ_BIN_0 +64 0x0202 //RX_FDEQ_BIN_1 +65 0x0301 //RX_FDEQ_BIN_2 +66 0x0404 //RX_FDEQ_BIN_3 +67 0x0406 //RX_FDEQ_BIN_4 +68 0x0109 //RX_FDEQ_BIN_5 +69 0x0708 //RX_FDEQ_BIN_6 +70 0x090A //RX_FDEQ_BIN_7 +71 0x0B0C //RX_FDEQ_BIN_8 +72 0x0D0E //RX_FDEQ_BIN_9 +73 0x1013 //RX_FDEQ_BIN_10 +74 0x1719 //RX_FDEQ_BIN_11 +75 0x1B0F //RX_FDEQ_BIN_12 +76 0x141E //RX_FDEQ_BIN_13 +77 0x3728 //RX_FDEQ_BIN_14 +78 0x282C //RX_FDEQ_BIN_15 +79 0x0000 //RX_FDEQ_BIN_16 +80 0x0000 //RX_FDEQ_BIN_17 +81 0x0000 //RX_FDEQ_BIN_18 +82 0x0000 //RX_FDEQ_BIN_19 +83 0x0000 //RX_FDEQ_BIN_20 +84 0x0000 //RX_FDEQ_BIN_21 +85 0x0000 //RX_FDEQ_BIN_22 +86 0x0000 //RX_FDEQ_BIN_23 +87 0x4000 //RX_FDEQ_RESRV_0 +88 0x0320 //RX_FDEQ_RESRV_1 +89 0x0018 //RX_FDDRC_BAND_MARGIN_0 +90 0x0030 //RX_FDDRC_BAND_MARGIN_1 +91 0x0050 //RX_FDDRC_BAND_MARGIN_2 +92 0x0080 //RX_FDDRC_BAND_MARGIN_3 +93 0x0007 //RX_FDDRC_BLOCK_EXP +94 0x5000 //RX_FDDRC_THRD_2_0 +95 0x5000 //RX_FDDRC_THRD_2_1 +96 0x5000 //RX_FDDRC_THRD_2_2 +97 0x5000 //RX_FDDRC_THRD_2_3 +98 0x6400 //RX_FDDRC_THRD_3_0 +99 0x6400 //RX_FDDRC_THRD_3_1 +100 0x6400 //RX_FDDRC_THRD_3_2 +101 0x6400 //RX_FDDRC_THRD_3_3 +102 0x2000 //RX_FDDRC_SLANT_0_0 +103 0x2000 //RX_FDDRC_SLANT_0_1 +104 0x2000 //RX_FDDRC_SLANT_0_2 +105 0x2000 //RX_FDDRC_SLANT_0_3 +106 0x5333 //RX_FDDRC_SLANT_1_0 +107 0x5333 //RX_FDDRC_SLANT_1_1 +108 0x5333 //RX_FDDRC_SLANT_1_2 +109 0x5333 //RX_FDDRC_SLANT_1_3 +110 0x0000 //RX_FDDRC_RESRV_0 +111 0x0002 //RX_FILTINDX +112 0x0001 //RX_TDDRC_THRD_0 +113 0x0002 //RX_TDDRC_THRD_1 +114 0x1800 //RX_TDDRC_THRD_2 +115 0x1800 //RX_TDDRC_THRD_3 +116 0x7FFF //RX_TDDRC_SLANT_0 +117 0x7FFF //RX_TDDRC_SLANT_1 +118 0x1000 //RX_TDDRC_ALPHA_UP_0 +119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +120 0x0000 //RX_TDDRC_HMNC_FLAG +121 0x199A //RX_TDDRC_HMNC_GAIN +122 0x0001 //RX_TDDRC_SMT_FLAG +123 0x0CCD //RX_TDDRC_SMT_W +124 0x0551 //RX_TDDRC_DRC_GAIN +125 0x7C00 //RX_LAMBDA_PKA_FP +126 0x13E0 //RX_TPKA_FP +127 0x0080 //RX_MIN_G_FP +128 0x2000 //RX_MAX_G_FP +129 0x0100 //RX_SPK_VOL +130 0x0000 //RX_VOL_RESRV_0 +131 0x0000 //RX_MAXLEVEL_CNG +132 0x3000 //RX_BWE_UV_TH +133 0x3000 //RX_BWE_UV_TH2 +134 0x1800 //RX_BWE_UV_TH3 +135 0x1000 //RX_BWE_V_TH +136 0x04CD //RX_BWE_GAIN1_V_TH1 +137 0x0F33 //RX_BWE_GAIN1_V_TH2 +138 0x7333 //RX_BWE_UV_EQ +139 0x199A //RX_BWE_V_EQ +140 0x7333 //RX_BWE_TONE_TH +141 0x0004 //RX_BWE_UV_HOLD_T +142 0x6CCD //RX_BWE_GAIN2_ALPHA +143 0x799A //RX_BWE_GAIN3_ALPHA +144 0x001E //RX_BWE_CUTOFF +145 0x3000 //RX_BWE_GAINFILL +146 0x3200 //RX_BWE_MAXTH_TONE +147 0x2000 //RX_BWE_EQ_0 +148 0x2000 //RX_BWE_EQ_1 +149 0x2000 //RX_BWE_EQ_2 +150 0x2000 //RX_BWE_EQ_3 +151 0x2000 //RX_BWE_EQ_4 +152 0x2000 //RX_BWE_EQ_5 +153 0x2000 //RX_BWE_EQ_6 +154 0x0000 //RX_BWE_RESRV_0 +155 0x0000 //RX_BWE_RESRV_1 +156 0x0000 //RX_BWE_RESRV_2 +#VOL 0 +6 0x1000 //RX_TDDRC_ALPHA_UP_1 +7 0x1000 //RX_TDDRC_ALPHA_UP_2 +8 0x1000 //RX_TDDRC_ALPHA_UP_3 +9 0x1000 //RX_TDDRC_ALPHA_UP_4 +27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +33 0x7000 //RX_TDDRC_LIMITER_THRD +34 0x0800 //RX_TDDRC_LIMITER_GAIN +112 0x0001 //RX_TDDRC_THRD_0 +113 0x0002 //RX_TDDRC_THRD_1 +114 0x1800 //RX_TDDRC_THRD_2 +115 0x1800 //RX_TDDRC_THRD_3 +116 0x7FFF //RX_TDDRC_SLANT_0 +117 0x7FFF //RX_TDDRC_SLANT_1 +118 0x1000 //RX_TDDRC_ALPHA_UP_0 +119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +120 0x0000 //RX_TDDRC_HMNC_FLAG +121 0x199A //RX_TDDRC_HMNC_GAIN +122 0x0001 //RX_TDDRC_SMT_FLAG +123 0x0CCD //RX_TDDRC_SMT_W +124 0x056F //RX_TDDRC_DRC_GAIN +38 0x0020 //RX_FDEQ_SUBNUM +39 0x483E //RX_FDEQ_GAIN_0 +40 0x3E3E //RX_FDEQ_GAIN_1 +41 0x3E4C //RX_FDEQ_GAIN_2 +42 0x586E //RX_FDEQ_GAIN_3 +43 0x8496 //RX_FDEQ_GAIN_4 +44 0x968E //RX_FDEQ_GAIN_5 +45 0x8488 //RX_FDEQ_GAIN_6 +46 0x8884 //RX_FDEQ_GAIN_7 +47 0x9CA4 //RX_FDEQ_GAIN_8 +48 0x98A8 //RX_FDEQ_GAIN_9 +49 0xBEB8 //RX_FDEQ_GAIN_10 +50 0x918D //RX_FDEQ_GAIN_11 +51 0x7566 //RX_FDEQ_GAIN_12 +52 0x6460 //RX_FDEQ_GAIN_13 +53 0x6174 //RX_FDEQ_GAIN_14 +54 0x7890 //RX_FDEQ_GAIN_15 +55 0x4848 //RX_FDEQ_GAIN_16 +56 0x4848 //RX_FDEQ_GAIN_17 +57 0x4848 //RX_FDEQ_GAIN_18 +58 0x4848 //RX_FDEQ_GAIN_19 +59 0x4848 //RX_FDEQ_GAIN_20 +60 0x4848 //RX_FDEQ_GAIN_21 +61 0x4848 //RX_FDEQ_GAIN_22 +62 0x4848 //RX_FDEQ_GAIN_23 +63 0x0202 //RX_FDEQ_BIN_0 +64 0x0202 //RX_FDEQ_BIN_1 +65 0x0301 //RX_FDEQ_BIN_2 +66 0x0404 //RX_FDEQ_BIN_3 +67 0x0406 //RX_FDEQ_BIN_4 +68 0x0109 //RX_FDEQ_BIN_5 +69 0x0708 //RX_FDEQ_BIN_6 +70 0x090A //RX_FDEQ_BIN_7 +71 0x0B0C //RX_FDEQ_BIN_8 +72 0x0D09 //RX_FDEQ_BIN_9 +73 0x0819 //RX_FDEQ_BIN_10 +74 0x1E19 //RX_FDEQ_BIN_11 +75 0x1B0F //RX_FDEQ_BIN_12 +76 0x141E //RX_FDEQ_BIN_13 +77 0x3728 //RX_FDEQ_BIN_14 +78 0x282C //RX_FDEQ_BIN_15 +79 0x0000 //RX_FDEQ_BIN_16 +80 0x0000 //RX_FDEQ_BIN_17 +81 0x0000 //RX_FDEQ_BIN_18 +82 0x0000 //RX_FDEQ_BIN_19 +83 0x0000 //RX_FDEQ_BIN_20 +84 0x0000 //RX_FDEQ_BIN_21 +85 0x0000 //RX_FDEQ_BIN_22 +86 0x0000 //RX_FDEQ_BIN_23 +87 0x4000 //RX_FDEQ_RESRV_0 +88 0x0320 //RX_FDEQ_RESRV_1 +89 0x0018 //RX_FDDRC_BAND_MARGIN_0 +90 0x0030 //RX_FDDRC_BAND_MARGIN_1 +91 0x0050 //RX_FDDRC_BAND_MARGIN_2 +92 0x0080 //RX_FDDRC_BAND_MARGIN_3 +93 0x0007 //RX_FDDRC_BLOCK_EXP +94 0x5000 //RX_FDDRC_THRD_2_0 +95 0x5000 //RX_FDDRC_THRD_2_1 +96 0x5000 //RX_FDDRC_THRD_2_2 +97 0x5000 //RX_FDDRC_THRD_2_3 +98 0x6400 //RX_FDDRC_THRD_3_0 +99 0x6400 //RX_FDDRC_THRD_3_1 +100 0x6400 //RX_FDDRC_THRD_3_2 +101 0x6400 //RX_FDDRC_THRD_3_3 +102 0x2000 //RX_FDDRC_SLANT_0_0 +103 0x2000 //RX_FDDRC_SLANT_0_1 +104 0x2000 //RX_FDDRC_SLANT_0_2 +105 0x2000 //RX_FDDRC_SLANT_0_3 +106 0x5333 //RX_FDDRC_SLANT_1_0 +107 0x5333 //RX_FDDRC_SLANT_1_1 +108 0x5333 //RX_FDDRC_SLANT_1_2 +109 0x5333 //RX_FDDRC_SLANT_1_3 +110 0x0000 //RX_FDDRC_RESRV_0 +129 0x000A //RX_SPK_VOL +130 0x0000 //RX_VOL_RESRV_0 +#VOL 1 +6 0x1000 //RX_TDDRC_ALPHA_UP_1 +7 0x1000 //RX_TDDRC_ALPHA_UP_2 +8 0x1000 //RX_TDDRC_ALPHA_UP_3 +9 0x1000 //RX_TDDRC_ALPHA_UP_4 +27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +33 0x7000 //RX_TDDRC_LIMITER_THRD +34 0x0800 //RX_TDDRC_LIMITER_GAIN +112 0x0001 //RX_TDDRC_THRD_0 +113 0x0002 //RX_TDDRC_THRD_1 +114 0x1800 //RX_TDDRC_THRD_2 +115 0x1800 //RX_TDDRC_THRD_3 +116 0x7FFF //RX_TDDRC_SLANT_0 +117 0x7FFF //RX_TDDRC_SLANT_1 +118 0x1000 //RX_TDDRC_ALPHA_UP_0 +119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +120 0x0000 //RX_TDDRC_HMNC_FLAG +121 0x199A //RX_TDDRC_HMNC_GAIN +122 0x0001 //RX_TDDRC_SMT_FLAG +123 0x0CCD //RX_TDDRC_SMT_W +124 0x056F //RX_TDDRC_DRC_GAIN +38 0x0020 //RX_FDEQ_SUBNUM +39 0x483E //RX_FDEQ_GAIN_0 +40 0x3E3E //RX_FDEQ_GAIN_1 +41 0x3E4C //RX_FDEQ_GAIN_2 +42 0x586E //RX_FDEQ_GAIN_3 +43 0x8496 //RX_FDEQ_GAIN_4 +44 0x968E //RX_FDEQ_GAIN_5 +45 0x8488 //RX_FDEQ_GAIN_6 +46 0x8884 //RX_FDEQ_GAIN_7 +47 0x9CA4 //RX_FDEQ_GAIN_8 +48 0x98A8 //RX_FDEQ_GAIN_9 +49 0xBEB8 //RX_FDEQ_GAIN_10 +50 0x918D //RX_FDEQ_GAIN_11 +51 0x7566 //RX_FDEQ_GAIN_12 +52 0x6460 //RX_FDEQ_GAIN_13 +53 0x6174 //RX_FDEQ_GAIN_14 +54 0x7890 //RX_FDEQ_GAIN_15 +55 0x4848 //RX_FDEQ_GAIN_16 +56 0x4848 //RX_FDEQ_GAIN_17 +57 0x4848 //RX_FDEQ_GAIN_18 +58 0x4848 //RX_FDEQ_GAIN_19 +59 0x4848 //RX_FDEQ_GAIN_20 +60 0x4848 //RX_FDEQ_GAIN_21 +61 0x4848 //RX_FDEQ_GAIN_22 +62 0x4848 //RX_FDEQ_GAIN_23 +63 0x0202 //RX_FDEQ_BIN_0 +64 0x0202 //RX_FDEQ_BIN_1 +65 0x0301 //RX_FDEQ_BIN_2 +66 0x0404 //RX_FDEQ_BIN_3 +67 0x0406 //RX_FDEQ_BIN_4 +68 0x0109 //RX_FDEQ_BIN_5 +69 0x0708 //RX_FDEQ_BIN_6 +70 0x090A //RX_FDEQ_BIN_7 +71 0x0B0C //RX_FDEQ_BIN_8 +72 0x0D09 //RX_FDEQ_BIN_9 +73 0x0819 //RX_FDEQ_BIN_10 +74 0x1E19 //RX_FDEQ_BIN_11 +75 0x1B0F //RX_FDEQ_BIN_12 +76 0x141E //RX_FDEQ_BIN_13 +77 0x3728 //RX_FDEQ_BIN_14 +78 0x282C //RX_FDEQ_BIN_15 +79 0x0000 //RX_FDEQ_BIN_16 +80 0x0000 //RX_FDEQ_BIN_17 +81 0x0000 //RX_FDEQ_BIN_18 +82 0x0000 //RX_FDEQ_BIN_19 +83 0x0000 //RX_FDEQ_BIN_20 +84 0x0000 //RX_FDEQ_BIN_21 +85 0x0000 //RX_FDEQ_BIN_22 +86 0x0000 //RX_FDEQ_BIN_23 +87 0x4000 //RX_FDEQ_RESRV_0 +88 0x0320 //RX_FDEQ_RESRV_1 +89 0x0018 //RX_FDDRC_BAND_MARGIN_0 +90 0x0030 //RX_FDDRC_BAND_MARGIN_1 +91 0x0050 //RX_FDDRC_BAND_MARGIN_2 +92 0x0080 //RX_FDDRC_BAND_MARGIN_3 +93 0x0007 //RX_FDDRC_BLOCK_EXP +94 0x5000 //RX_FDDRC_THRD_2_0 +95 0x5000 //RX_FDDRC_THRD_2_1 +96 0x5000 //RX_FDDRC_THRD_2_2 +97 0x5000 //RX_FDDRC_THRD_2_3 +98 0x6400 //RX_FDDRC_THRD_3_0 +99 0x6400 //RX_FDDRC_THRD_3_1 +100 0x6400 //RX_FDDRC_THRD_3_2 +101 0x6400 //RX_FDDRC_THRD_3_3 +102 0x2000 //RX_FDDRC_SLANT_0_0 +103 0x2000 //RX_FDDRC_SLANT_0_1 +104 0x2000 //RX_FDDRC_SLANT_0_2 +105 0x2000 //RX_FDDRC_SLANT_0_3 +106 0x5333 //RX_FDDRC_SLANT_1_0 +107 0x5333 //RX_FDDRC_SLANT_1_1 +108 0x5333 //RX_FDDRC_SLANT_1_2 +109 0x5333 //RX_FDDRC_SLANT_1_3 +110 0x0000 //RX_FDDRC_RESRV_0 +129 0x0010 //RX_SPK_VOL +130 0x0000 //RX_VOL_RESRV_0 +#VOL 2 +6 0x1000 //RX_TDDRC_ALPHA_UP_1 +7 0x1000 //RX_TDDRC_ALPHA_UP_2 +8 0x1000 //RX_TDDRC_ALPHA_UP_3 +9 0x1000 //RX_TDDRC_ALPHA_UP_4 +27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +33 0x7000 //RX_TDDRC_LIMITER_THRD +34 0x0800 //RX_TDDRC_LIMITER_GAIN +112 0x0001 //RX_TDDRC_THRD_0 +113 0x0002 //RX_TDDRC_THRD_1 +114 0x1800 //RX_TDDRC_THRD_2 +115 0x1800 //RX_TDDRC_THRD_3 +116 0x7FFF //RX_TDDRC_SLANT_0 +117 0x7FFF //RX_TDDRC_SLANT_1 +118 0x1000 //RX_TDDRC_ALPHA_UP_0 +119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +120 0x0000 //RX_TDDRC_HMNC_FLAG +121 0x199A //RX_TDDRC_HMNC_GAIN +122 0x0001 //RX_TDDRC_SMT_FLAG +123 0x0CCD //RX_TDDRC_SMT_W +124 0x056F //RX_TDDRC_DRC_GAIN +38 0x0020 //RX_FDEQ_SUBNUM +39 0x483E //RX_FDEQ_GAIN_0 +40 0x3E3E //RX_FDEQ_GAIN_1 +41 0x3E4C //RX_FDEQ_GAIN_2 +42 0x586E //RX_FDEQ_GAIN_3 +43 0x8496 //RX_FDEQ_GAIN_4 +44 0x968E //RX_FDEQ_GAIN_5 +45 0x8488 //RX_FDEQ_GAIN_6 +46 0x8884 //RX_FDEQ_GAIN_7 +47 0x9CA4 //RX_FDEQ_GAIN_8 +48 0x98A8 //RX_FDEQ_GAIN_9 +49 0xBEB8 //RX_FDEQ_GAIN_10 +50 0x918D //RX_FDEQ_GAIN_11 +51 0x7566 //RX_FDEQ_GAIN_12 +52 0x6460 //RX_FDEQ_GAIN_13 +53 0x6174 //RX_FDEQ_GAIN_14 +54 0x7890 //RX_FDEQ_GAIN_15 +55 0x4848 //RX_FDEQ_GAIN_16 +56 0x4848 //RX_FDEQ_GAIN_17 +57 0x4848 //RX_FDEQ_GAIN_18 +58 0x4848 //RX_FDEQ_GAIN_19 +59 0x4848 //RX_FDEQ_GAIN_20 +60 0x4848 //RX_FDEQ_GAIN_21 +61 0x4848 //RX_FDEQ_GAIN_22 +62 0x4848 //RX_FDEQ_GAIN_23 +63 0x0202 //RX_FDEQ_BIN_0 +64 0x0202 //RX_FDEQ_BIN_1 +65 0x0301 //RX_FDEQ_BIN_2 +66 0x0404 //RX_FDEQ_BIN_3 +67 0x0406 //RX_FDEQ_BIN_4 +68 0x0109 //RX_FDEQ_BIN_5 +69 0x0708 //RX_FDEQ_BIN_6 +70 0x090A //RX_FDEQ_BIN_7 +71 0x0B0C //RX_FDEQ_BIN_8 +72 0x0D09 //RX_FDEQ_BIN_9 +73 0x0819 //RX_FDEQ_BIN_10 +74 0x1E19 //RX_FDEQ_BIN_11 +75 0x1B0F //RX_FDEQ_BIN_12 +76 0x141E //RX_FDEQ_BIN_13 +77 0x3728 //RX_FDEQ_BIN_14 +78 0x282C //RX_FDEQ_BIN_15 +79 0x0000 //RX_FDEQ_BIN_16 +80 0x0000 //RX_FDEQ_BIN_17 +81 0x0000 //RX_FDEQ_BIN_18 +82 0x0000 //RX_FDEQ_BIN_19 +83 0x0000 //RX_FDEQ_BIN_20 +84 0x0000 //RX_FDEQ_BIN_21 +85 0x0000 //RX_FDEQ_BIN_22 +86 0x0000 //RX_FDEQ_BIN_23 +87 0x4000 //RX_FDEQ_RESRV_0 +88 0x0320 //RX_FDEQ_RESRV_1 +89 0x0018 //RX_FDDRC_BAND_MARGIN_0 +90 0x0030 //RX_FDDRC_BAND_MARGIN_1 +91 0x0050 //RX_FDDRC_BAND_MARGIN_2 +92 0x0080 //RX_FDDRC_BAND_MARGIN_3 +93 0x0007 //RX_FDDRC_BLOCK_EXP +94 0x5000 //RX_FDDRC_THRD_2_0 +95 0x5000 //RX_FDDRC_THRD_2_1 +96 0x5000 //RX_FDDRC_THRD_2_2 +97 0x5000 //RX_FDDRC_THRD_2_3 +98 0x6400 //RX_FDDRC_THRD_3_0 +99 0x6400 //RX_FDDRC_THRD_3_1 +100 0x6400 //RX_FDDRC_THRD_3_2 +101 0x6400 //RX_FDDRC_THRD_3_3 +102 0x2000 //RX_FDDRC_SLANT_0_0 +103 0x2000 //RX_FDDRC_SLANT_0_1 +104 0x2000 //RX_FDDRC_SLANT_0_2 +105 0x2000 //RX_FDDRC_SLANT_0_3 +106 0x5333 //RX_FDDRC_SLANT_1_0 +107 0x5333 //RX_FDDRC_SLANT_1_1 +108 0x5333 //RX_FDDRC_SLANT_1_2 +109 0x5333 //RX_FDDRC_SLANT_1_3 +110 0x0000 //RX_FDDRC_RESRV_0 +129 0x001B //RX_SPK_VOL +130 0x0000 //RX_VOL_RESRV_0 +#VOL 3 +6 0x1000 //RX_TDDRC_ALPHA_UP_1 +7 0x1000 //RX_TDDRC_ALPHA_UP_2 +8 0x1000 //RX_TDDRC_ALPHA_UP_3 +9 0x1000 //RX_TDDRC_ALPHA_UP_4 +27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +33 0x7000 //RX_TDDRC_LIMITER_THRD +34 0x0800 //RX_TDDRC_LIMITER_GAIN +112 0x0001 //RX_TDDRC_THRD_0 +113 0x0002 //RX_TDDRC_THRD_1 +114 0x1800 //RX_TDDRC_THRD_2 +115 0x1800 //RX_TDDRC_THRD_3 +116 0x7FFF //RX_TDDRC_SLANT_0 +117 0x7FFF //RX_TDDRC_SLANT_1 +118 0x1000 //RX_TDDRC_ALPHA_UP_0 +119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +120 0x0000 //RX_TDDRC_HMNC_FLAG +121 0x199A //RX_TDDRC_HMNC_GAIN +122 0x0001 //RX_TDDRC_SMT_FLAG +123 0x0CCD //RX_TDDRC_SMT_W +124 0x056F //RX_TDDRC_DRC_GAIN +38 0x0020 //RX_FDEQ_SUBNUM +39 0x483E //RX_FDEQ_GAIN_0 +40 0x3E3E //RX_FDEQ_GAIN_1 +41 0x3E4C //RX_FDEQ_GAIN_2 +42 0x586E //RX_FDEQ_GAIN_3 +43 0x8496 //RX_FDEQ_GAIN_4 +44 0x968E //RX_FDEQ_GAIN_5 +45 0x8488 //RX_FDEQ_GAIN_6 +46 0x8884 //RX_FDEQ_GAIN_7 +47 0x9CA4 //RX_FDEQ_GAIN_8 +48 0x98A8 //RX_FDEQ_GAIN_9 +49 0xBEB8 //RX_FDEQ_GAIN_10 +50 0x918D //RX_FDEQ_GAIN_11 +51 0x7566 //RX_FDEQ_GAIN_12 +52 0x6460 //RX_FDEQ_GAIN_13 +53 0x6174 //RX_FDEQ_GAIN_14 +54 0x7890 //RX_FDEQ_GAIN_15 +55 0x4848 //RX_FDEQ_GAIN_16 +56 0x4848 //RX_FDEQ_GAIN_17 +57 0x4848 //RX_FDEQ_GAIN_18 +58 0x4848 //RX_FDEQ_GAIN_19 +59 0x4848 //RX_FDEQ_GAIN_20 +60 0x4848 //RX_FDEQ_GAIN_21 +61 0x4848 //RX_FDEQ_GAIN_22 +62 0x4848 //RX_FDEQ_GAIN_23 +63 0x0202 //RX_FDEQ_BIN_0 +64 0x0202 //RX_FDEQ_BIN_1 +65 0x0301 //RX_FDEQ_BIN_2 +66 0x0404 //RX_FDEQ_BIN_3 +67 0x0406 //RX_FDEQ_BIN_4 +68 0x0109 //RX_FDEQ_BIN_5 +69 0x0708 //RX_FDEQ_BIN_6 +70 0x090A //RX_FDEQ_BIN_7 +71 0x0B0C //RX_FDEQ_BIN_8 +72 0x0D09 //RX_FDEQ_BIN_9 +73 0x0819 //RX_FDEQ_BIN_10 +74 0x1E19 //RX_FDEQ_BIN_11 +75 0x1B0F //RX_FDEQ_BIN_12 +76 0x141E //RX_FDEQ_BIN_13 +77 0x3728 //RX_FDEQ_BIN_14 +78 0x282C //RX_FDEQ_BIN_15 +79 0x0000 //RX_FDEQ_BIN_16 +80 0x0000 //RX_FDEQ_BIN_17 +81 0x0000 //RX_FDEQ_BIN_18 +82 0x0000 //RX_FDEQ_BIN_19 +83 0x0000 //RX_FDEQ_BIN_20 +84 0x0000 //RX_FDEQ_BIN_21 +85 0x0000 //RX_FDEQ_BIN_22 +86 0x0000 //RX_FDEQ_BIN_23 +87 0x4000 //RX_FDEQ_RESRV_0 +88 0x0320 //RX_FDEQ_RESRV_1 +89 0x0018 //RX_FDDRC_BAND_MARGIN_0 +90 0x0030 //RX_FDDRC_BAND_MARGIN_1 +91 0x0050 //RX_FDDRC_BAND_MARGIN_2 +92 0x0080 //RX_FDDRC_BAND_MARGIN_3 +93 0x0007 //RX_FDDRC_BLOCK_EXP +94 0x5000 //RX_FDDRC_THRD_2_0 +95 0x5000 //RX_FDDRC_THRD_2_1 +96 0x5000 //RX_FDDRC_THRD_2_2 +97 0x5000 //RX_FDDRC_THRD_2_3 +98 0x6400 //RX_FDDRC_THRD_3_0 +99 0x6400 //RX_FDDRC_THRD_3_1 +100 0x6400 //RX_FDDRC_THRD_3_2 +101 0x6400 //RX_FDDRC_THRD_3_3 +102 0x2000 //RX_FDDRC_SLANT_0_0 +103 0x2000 //RX_FDDRC_SLANT_0_1 +104 0x2000 //RX_FDDRC_SLANT_0_2 +105 0x2000 //RX_FDDRC_SLANT_0_3 +106 0x5333 //RX_FDDRC_SLANT_1_0 +107 0x5333 //RX_FDDRC_SLANT_1_1 +108 0x5333 //RX_FDDRC_SLANT_1_2 +109 0x5333 //RX_FDDRC_SLANT_1_3 +110 0x0000 //RX_FDDRC_RESRV_0 +129 0x0035 //RX_SPK_VOL +130 0x0000 //RX_VOL_RESRV_0 +#VOL 4 +6 0x1000 //RX_TDDRC_ALPHA_UP_1 +7 0x1000 //RX_TDDRC_ALPHA_UP_2 +8 0x1000 //RX_TDDRC_ALPHA_UP_3 +9 0x1000 //RX_TDDRC_ALPHA_UP_4 +27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +33 0x7000 //RX_TDDRC_LIMITER_THRD +34 0x0800 //RX_TDDRC_LIMITER_GAIN +112 0x0001 //RX_TDDRC_THRD_0 +113 0x0002 //RX_TDDRC_THRD_1 +114 0x1800 //RX_TDDRC_THRD_2 +115 0x1800 //RX_TDDRC_THRD_3 +116 0x7FFF //RX_TDDRC_SLANT_0 +117 0x7FFF //RX_TDDRC_SLANT_1 +118 0x1000 //RX_TDDRC_ALPHA_UP_0 +119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +120 0x0000 //RX_TDDRC_HMNC_FLAG +121 0x199A //RX_TDDRC_HMNC_GAIN +122 0x0001 //RX_TDDRC_SMT_FLAG +123 0x0CCD //RX_TDDRC_SMT_W +124 0x056F //RX_TDDRC_DRC_GAIN +38 0x0020 //RX_FDEQ_SUBNUM +39 0x483E //RX_FDEQ_GAIN_0 +40 0x3E3E //RX_FDEQ_GAIN_1 +41 0x3E4C //RX_FDEQ_GAIN_2 +42 0x586E //RX_FDEQ_GAIN_3 +43 0x8496 //RX_FDEQ_GAIN_4 +44 0x968E //RX_FDEQ_GAIN_5 +45 0x8488 //RX_FDEQ_GAIN_6 +46 0x8884 //RX_FDEQ_GAIN_7 +47 0x9CA4 //RX_FDEQ_GAIN_8 +48 0x98A8 //RX_FDEQ_GAIN_9 +49 0xBEB8 //RX_FDEQ_GAIN_10 +50 0x918D //RX_FDEQ_GAIN_11 +51 0x7566 //RX_FDEQ_GAIN_12 +52 0x6460 //RX_FDEQ_GAIN_13 +53 0x6174 //RX_FDEQ_GAIN_14 +54 0x7890 //RX_FDEQ_GAIN_15 +55 0x4848 //RX_FDEQ_GAIN_16 +56 0x4848 //RX_FDEQ_GAIN_17 +57 0x4848 //RX_FDEQ_GAIN_18 +58 0x4848 //RX_FDEQ_GAIN_19 +59 0x4848 //RX_FDEQ_GAIN_20 +60 0x4848 //RX_FDEQ_GAIN_21 +61 0x4848 //RX_FDEQ_GAIN_22 +62 0x4848 //RX_FDEQ_GAIN_23 +63 0x0202 //RX_FDEQ_BIN_0 +64 0x0202 //RX_FDEQ_BIN_1 +65 0x0301 //RX_FDEQ_BIN_2 +66 0x0404 //RX_FDEQ_BIN_3 +67 0x0406 //RX_FDEQ_BIN_4 +68 0x0109 //RX_FDEQ_BIN_5 +69 0x0708 //RX_FDEQ_BIN_6 +70 0x090A //RX_FDEQ_BIN_7 +71 0x0B0C //RX_FDEQ_BIN_8 +72 0x0D09 //RX_FDEQ_BIN_9 +73 0x0819 //RX_FDEQ_BIN_10 +74 0x1E19 //RX_FDEQ_BIN_11 +75 0x1B0F //RX_FDEQ_BIN_12 +76 0x141E //RX_FDEQ_BIN_13 +77 0x3728 //RX_FDEQ_BIN_14 +78 0x282C //RX_FDEQ_BIN_15 +79 0x0000 //RX_FDEQ_BIN_16 +80 0x0000 //RX_FDEQ_BIN_17 +81 0x0000 //RX_FDEQ_BIN_18 +82 0x0000 //RX_FDEQ_BIN_19 +83 0x0000 //RX_FDEQ_BIN_20 +84 0x0000 //RX_FDEQ_BIN_21 +85 0x0000 //RX_FDEQ_BIN_22 +86 0x0000 //RX_FDEQ_BIN_23 +87 0x4000 //RX_FDEQ_RESRV_0 +88 0x0320 //RX_FDEQ_RESRV_1 +89 0x0018 //RX_FDDRC_BAND_MARGIN_0 +90 0x0030 //RX_FDDRC_BAND_MARGIN_1 +91 0x0050 //RX_FDDRC_BAND_MARGIN_2 +92 0x0080 //RX_FDDRC_BAND_MARGIN_3 +93 0x0007 //RX_FDDRC_BLOCK_EXP +94 0x5000 //RX_FDDRC_THRD_2_0 +95 0x5000 //RX_FDDRC_THRD_2_1 +96 0x5000 //RX_FDDRC_THRD_2_2 +97 0x5000 //RX_FDDRC_THRD_2_3 +98 0x6400 //RX_FDDRC_THRD_3_0 +99 0x6400 //RX_FDDRC_THRD_3_1 +100 0x6400 //RX_FDDRC_THRD_3_2 +101 0x6400 //RX_FDDRC_THRD_3_3 +102 0x2000 //RX_FDDRC_SLANT_0_0 +103 0x2000 //RX_FDDRC_SLANT_0_1 +104 0x2000 //RX_FDDRC_SLANT_0_2 +105 0x2000 //RX_FDDRC_SLANT_0_3 +106 0x5333 //RX_FDDRC_SLANT_1_0 +107 0x5333 //RX_FDDRC_SLANT_1_1 +108 0x5333 //RX_FDDRC_SLANT_1_2 +109 0x5333 //RX_FDDRC_SLANT_1_3 +110 0x0000 //RX_FDDRC_RESRV_0 +129 0x0047 //RX_SPK_VOL +130 0x0000 //RX_VOL_RESRV_0 +#VOL 5 +6 0x1000 //RX_TDDRC_ALPHA_UP_1 +7 0x1000 //RX_TDDRC_ALPHA_UP_2 +8 0x1000 //RX_TDDRC_ALPHA_UP_3 +9 0x1000 //RX_TDDRC_ALPHA_UP_4 +27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +33 0x7000 //RX_TDDRC_LIMITER_THRD +34 0x0800 //RX_TDDRC_LIMITER_GAIN +112 0x0001 //RX_TDDRC_THRD_0 +113 0x0002 //RX_TDDRC_THRD_1 +114 0x1800 //RX_TDDRC_THRD_2 +115 0x1800 //RX_TDDRC_THRD_3 +116 0x7FFF //RX_TDDRC_SLANT_0 +117 0x7FFF //RX_TDDRC_SLANT_1 +118 0x1000 //RX_TDDRC_ALPHA_UP_0 +119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +120 0x0000 //RX_TDDRC_HMNC_FLAG +121 0x199A //RX_TDDRC_HMNC_GAIN +122 0x0001 //RX_TDDRC_SMT_FLAG +123 0x0CCD //RX_TDDRC_SMT_W +124 0x056F //RX_TDDRC_DRC_GAIN +38 0x0020 //RX_FDEQ_SUBNUM +39 0x483E //RX_FDEQ_GAIN_0 +40 0x3E3E //RX_FDEQ_GAIN_1 +41 0x3E4C //RX_FDEQ_GAIN_2 +42 0x586E //RX_FDEQ_GAIN_3 +43 0x8496 //RX_FDEQ_GAIN_4 +44 0x968E //RX_FDEQ_GAIN_5 +45 0x8488 //RX_FDEQ_GAIN_6 +46 0x8884 //RX_FDEQ_GAIN_7 +47 0x9CA4 //RX_FDEQ_GAIN_8 +48 0x98A8 //RX_FDEQ_GAIN_9 +49 0xBEB8 //RX_FDEQ_GAIN_10 +50 0x918D //RX_FDEQ_GAIN_11 +51 0x7566 //RX_FDEQ_GAIN_12 +52 0x6460 //RX_FDEQ_GAIN_13 +53 0x6174 //RX_FDEQ_GAIN_14 +54 0x7890 //RX_FDEQ_GAIN_15 +55 0x4848 //RX_FDEQ_GAIN_16 +56 0x4848 //RX_FDEQ_GAIN_17 +57 0x4848 //RX_FDEQ_GAIN_18 +58 0x4848 //RX_FDEQ_GAIN_19 +59 0x4848 //RX_FDEQ_GAIN_20 +60 0x4848 //RX_FDEQ_GAIN_21 +61 0x4848 //RX_FDEQ_GAIN_22 +62 0x4848 //RX_FDEQ_GAIN_23 +63 0x0202 //RX_FDEQ_BIN_0 +64 0x0202 //RX_FDEQ_BIN_1 +65 0x0301 //RX_FDEQ_BIN_2 +66 0x0404 //RX_FDEQ_BIN_3 +67 0x0406 //RX_FDEQ_BIN_4 +68 0x0109 //RX_FDEQ_BIN_5 +69 0x0708 //RX_FDEQ_BIN_6 +70 0x090A //RX_FDEQ_BIN_7 +71 0x0B0C //RX_FDEQ_BIN_8 +72 0x0D09 //RX_FDEQ_BIN_9 +73 0x0819 //RX_FDEQ_BIN_10 +74 0x1E19 //RX_FDEQ_BIN_11 +75 0x1B0F //RX_FDEQ_BIN_12 +76 0x141E //RX_FDEQ_BIN_13 +77 0x3728 //RX_FDEQ_BIN_14 +78 0x282C //RX_FDEQ_BIN_15 +79 0x0000 //RX_FDEQ_BIN_16 +80 0x0000 //RX_FDEQ_BIN_17 +81 0x0000 //RX_FDEQ_BIN_18 +82 0x0000 //RX_FDEQ_BIN_19 +83 0x0000 //RX_FDEQ_BIN_20 +84 0x0000 //RX_FDEQ_BIN_21 +85 0x0000 //RX_FDEQ_BIN_22 +86 0x0000 //RX_FDEQ_BIN_23 +87 0x4000 //RX_FDEQ_RESRV_0 +88 0x0320 //RX_FDEQ_RESRV_1 +89 0x0018 //RX_FDDRC_BAND_MARGIN_0 +90 0x0030 //RX_FDDRC_BAND_MARGIN_1 +91 0x0050 //RX_FDDRC_BAND_MARGIN_2 +92 0x0080 //RX_FDDRC_BAND_MARGIN_3 +93 0x0007 //RX_FDDRC_BLOCK_EXP +94 0x5000 //RX_FDDRC_THRD_2_0 +95 0x5000 //RX_FDDRC_THRD_2_1 +96 0x5000 //RX_FDDRC_THRD_2_2 +97 0x5000 //RX_FDDRC_THRD_2_3 +98 0x6400 //RX_FDDRC_THRD_3_0 +99 0x6400 //RX_FDDRC_THRD_3_1 +100 0x6400 //RX_FDDRC_THRD_3_2 +101 0x6400 //RX_FDDRC_THRD_3_3 +102 0x2000 //RX_FDDRC_SLANT_0_0 +103 0x2000 //RX_FDDRC_SLANT_0_1 +104 0x2000 //RX_FDDRC_SLANT_0_2 +105 0x2000 //RX_FDDRC_SLANT_0_3 +106 0x5333 //RX_FDDRC_SLANT_1_0 +107 0x5333 //RX_FDDRC_SLANT_1_1 +108 0x5333 //RX_FDDRC_SLANT_1_2 +109 0x5333 //RX_FDDRC_SLANT_1_3 +110 0x0000 //RX_FDDRC_RESRV_0 +129 0x0076 //RX_SPK_VOL +130 0x0000 //RX_VOL_RESRV_0 +#VOL 6 +6 0x1000 //RX_TDDRC_ALPHA_UP_1 +7 0x1000 //RX_TDDRC_ALPHA_UP_2 +8 0x1000 //RX_TDDRC_ALPHA_UP_3 +9 0x1000 //RX_TDDRC_ALPHA_UP_4 +27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +33 0x7000 //RX_TDDRC_LIMITER_THRD +34 0x0800 //RX_TDDRC_LIMITER_GAIN +112 0x0001 //RX_TDDRC_THRD_0 +113 0x0002 //RX_TDDRC_THRD_1 +114 0x1800 //RX_TDDRC_THRD_2 +115 0x1800 //RX_TDDRC_THRD_3 +116 0x7FFF //RX_TDDRC_SLANT_0 +117 0x7FFF //RX_TDDRC_SLANT_1 +118 0x1000 //RX_TDDRC_ALPHA_UP_0 +119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +120 0x0000 //RX_TDDRC_HMNC_FLAG +121 0x199A //RX_TDDRC_HMNC_GAIN +122 0x0001 //RX_TDDRC_SMT_FLAG +123 0x0CCD //RX_TDDRC_SMT_W +124 0x056F //RX_TDDRC_DRC_GAIN +38 0x0020 //RX_FDEQ_SUBNUM +39 0x483E //RX_FDEQ_GAIN_0 +40 0x3E3E //RX_FDEQ_GAIN_1 +41 0x3E4C //RX_FDEQ_GAIN_2 +42 0x586E //RX_FDEQ_GAIN_3 +43 0x8496 //RX_FDEQ_GAIN_4 +44 0x968E //RX_FDEQ_GAIN_5 +45 0x8488 //RX_FDEQ_GAIN_6 +46 0x8884 //RX_FDEQ_GAIN_7 +47 0x9CA4 //RX_FDEQ_GAIN_8 +48 0x98A8 //RX_FDEQ_GAIN_9 +49 0xBEB8 //RX_FDEQ_GAIN_10 +50 0x918D //RX_FDEQ_GAIN_11 +51 0x7566 //RX_FDEQ_GAIN_12 +52 0x6460 //RX_FDEQ_GAIN_13 +53 0x6174 //RX_FDEQ_GAIN_14 +54 0x7890 //RX_FDEQ_GAIN_15 +55 0x4848 //RX_FDEQ_GAIN_16 +56 0x4848 //RX_FDEQ_GAIN_17 +57 0x4848 //RX_FDEQ_GAIN_18 +58 0x4848 //RX_FDEQ_GAIN_19 +59 0x4848 //RX_FDEQ_GAIN_20 +60 0x4848 //RX_FDEQ_GAIN_21 +61 0x4848 //RX_FDEQ_GAIN_22 +62 0x4848 //RX_FDEQ_GAIN_23 +63 0x0202 //RX_FDEQ_BIN_0 +64 0x0202 //RX_FDEQ_BIN_1 +65 0x0301 //RX_FDEQ_BIN_2 +66 0x0404 //RX_FDEQ_BIN_3 +67 0x0406 //RX_FDEQ_BIN_4 +68 0x0109 //RX_FDEQ_BIN_5 +69 0x0708 //RX_FDEQ_BIN_6 +70 0x090A //RX_FDEQ_BIN_7 +71 0x0B0C //RX_FDEQ_BIN_8 +72 0x0D09 //RX_FDEQ_BIN_9 +73 0x0819 //RX_FDEQ_BIN_10 +74 0x1E19 //RX_FDEQ_BIN_11 +75 0x1B0F //RX_FDEQ_BIN_12 +76 0x141E //RX_FDEQ_BIN_13 +77 0x3728 //RX_FDEQ_BIN_14 +78 0x282C //RX_FDEQ_BIN_15 +79 0x0000 //RX_FDEQ_BIN_16 +80 0x0000 //RX_FDEQ_BIN_17 +81 0x0000 //RX_FDEQ_BIN_18 +82 0x0000 //RX_FDEQ_BIN_19 +83 0x0000 //RX_FDEQ_BIN_20 +84 0x0000 //RX_FDEQ_BIN_21 +85 0x0000 //RX_FDEQ_BIN_22 +86 0x0000 //RX_FDEQ_BIN_23 +87 0x4000 //RX_FDEQ_RESRV_0 +88 0x0320 //RX_FDEQ_RESRV_1 +89 0x0018 //RX_FDDRC_BAND_MARGIN_0 +90 0x0030 //RX_FDDRC_BAND_MARGIN_1 +91 0x0050 //RX_FDDRC_BAND_MARGIN_2 +92 0x0080 //RX_FDDRC_BAND_MARGIN_3 +93 0x0007 //RX_FDDRC_BLOCK_EXP +94 0x5000 //RX_FDDRC_THRD_2_0 +95 0x5000 //RX_FDDRC_THRD_2_1 +96 0x5000 //RX_FDDRC_THRD_2_2 +97 0x5000 //RX_FDDRC_THRD_2_3 +98 0x6400 //RX_FDDRC_THRD_3_0 +99 0x6400 //RX_FDDRC_THRD_3_1 +100 0x6400 //RX_FDDRC_THRD_3_2 +101 0x6400 //RX_FDDRC_THRD_3_3 +102 0x2000 //RX_FDDRC_SLANT_0_0 +103 0x2000 //RX_FDDRC_SLANT_0_1 +104 0x2000 //RX_FDDRC_SLANT_0_2 +105 0x2000 //RX_FDDRC_SLANT_0_3 +106 0x5333 //RX_FDDRC_SLANT_1_0 +107 0x5333 //RX_FDDRC_SLANT_1_1 +108 0x5333 //RX_FDDRC_SLANT_1_2 +109 0x5333 //RX_FDDRC_SLANT_1_3 +110 0x0000 //RX_FDDRC_RESRV_0 +129 0x0100 //RX_SPK_VOL +130 0x0000 //RX_VOL_RESRV_0 +#RX 2 +157 0x003C //RX_RECVFUNC_MODE_0 +158 0x0000 //RX_RECVFUNC_MODE_1 +159 0x0003 //RX_SAMPLINGFREQ_SIG +160 0x0003 //RX_SAMPLINGFREQ_PROC +161 0x000A //RX_FRAME_SZ +162 0x0000 //RX_DELAY_OPT +163 0x1000 //RX_TDDRC_ALPHA_UP_1 +164 0x1000 //RX_TDDRC_ALPHA_UP_2 +165 0x1000 //RX_TDDRC_ALPHA_UP_3 +166 0x1000 //RX_TDDRC_ALPHA_UP_4 +167 0x05AA //RX_PGA +168 0x7FFF //RX_A_HP +169 0x4000 //RX_B_PE +170 0x5800 //RX_THR_PITCH_DET_0 +171 0x5000 //RX_THR_PITCH_DET_1 +172 0x4000 //RX_THR_PITCH_DET_2 +173 0x0008 //RX_PITCH_BFR_LEN +174 0x0003 //RX_SBD_PITCH_DET +175 0x0100 //RX_PP_RESRV_0 +176 0x0020 //RX_PP_RESRV_1 +177 0x0600 //RX_N_SN_EST +178 0x000C //RX_N2_SN_EST +179 0x000F //RX_NS_LVL_CTRL +180 0xF800 //RX_THR_SN_EST +181 0x7E00 //RX_LAMBDA_PFILT +182 0x000A //RX_FENS_RESRV_0 +183 0x0190 //RX_FENS_RESRV_1 +184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +187 0x0002 //RX_EXTRA_NS_L +188 0x0800 //RX_EXTRA_NS_A +189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +190 0x7000 //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +192 0x199A //RX_A_POST_FLT +193 0x0000 //RX_LMT_THRD +194 0x4000 //RX_LMT_ALPHA +195 0x0020 //RX_FDEQ_SUBNUM +196 0x483E //RX_FDEQ_GAIN_0 +197 0x3E3E //RX_FDEQ_GAIN_1 +198 0x3E4C //RX_FDEQ_GAIN_2 +199 0x5064 //RX_FDEQ_GAIN_3 +200 0x7076 //RX_FDEQ_GAIN_4 +201 0x897A //RX_FDEQ_GAIN_5 +202 0x7C80 //RX_FDEQ_GAIN_6 +203 0x8888 //RX_FDEQ_GAIN_7 +204 0x949C //RX_FDEQ_GAIN_8 +205 0x96A4 //RX_FDEQ_GAIN_9 +206 0xA9A0 //RX_FDEQ_GAIN_10 +207 0x9487 //RX_FDEQ_GAIN_11 +208 0x6F64 //RX_FDEQ_GAIN_12 +209 0x625A //RX_FDEQ_GAIN_13 +210 0x5D80 //RX_FDEQ_GAIN_14 +211 0x8890 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0202 //RX_FDEQ_BIN_0 +221 0x0202 //RX_FDEQ_BIN_1 +222 0x0301 //RX_FDEQ_BIN_2 +223 0x0404 //RX_FDEQ_BIN_3 +224 0x0406 //RX_FDEQ_BIN_4 +225 0x0109 //RX_FDEQ_BIN_5 +226 0x0708 //RX_FDEQ_BIN_6 +227 0x090A //RX_FDEQ_BIN_7 +228 0x0B0C //RX_FDEQ_BIN_8 +229 0x0D0E //RX_FDEQ_BIN_9 +230 0x1013 //RX_FDEQ_BIN_10 +231 0x1719 //RX_FDEQ_BIN_11 +232 0x1B0F //RX_FDEQ_BIN_12 +233 0x141E //RX_FDEQ_BIN_13 +234 0x3728 //RX_FDEQ_BIN_14 +235 0x282C //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x4000 //RX_FDEQ_RESRV_0 +245 0x0320 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0030 //RX_FDDRC_BAND_MARGIN_1 +248 0x0050 //RX_FDDRC_BAND_MARGIN_2 +249 0x0080 //RX_FDDRC_BAND_MARGIN_3 +250 0x0007 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x5000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x6400 //RX_FDDRC_THRD_3_2 +258 0x6400 //RX_FDDRC_THRD_3_3 +259 0x2000 //RX_FDDRC_SLANT_0_0 +260 0x2000 //RX_FDDRC_SLANT_0_1 +261 0x2000 //RX_FDDRC_SLANT_0_2 +262 0x2000 //RX_FDDRC_SLANT_0_3 +263 0x5333 //RX_FDDRC_SLANT_1_0 +264 0x5333 //RX_FDDRC_SLANT_1_1 +265 0x5333 //RX_FDDRC_SLANT_1_2 +266 0x5333 //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +268 0x0002 //RX_FILTINDX +269 0x0001 //RX_TDDRC_THRD_0 +270 0x0002 //RX_TDDRC_THRD_1 +271 0x1800 //RX_TDDRC_THRD_2 +272 0x1800 //RX_TDDRC_THRD_3 +273 0x7FFF //RX_TDDRC_SLANT_0 +274 0x7FFF //RX_TDDRC_SLANT_1 +275 0x1000 //RX_TDDRC_ALPHA_UP_0 +276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x199A //RX_TDDRC_HMNC_GAIN +279 0x0001 //RX_TDDRC_SMT_FLAG +280 0x0CCD //RX_TDDRC_SMT_W +281 0x0551 //RX_TDDRC_DRC_GAIN +282 0x7C00 //RX_LAMBDA_PKA_FP +283 0x13E0 //RX_TPKA_FP +284 0x0080 //RX_MIN_G_FP +285 0x2000 //RX_MAX_G_FP +286 0x0100 //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 +288 0x0000 //RX_MAXLEVEL_CNG +289 0x3000 //RX_BWE_UV_TH +290 0x3000 //RX_BWE_UV_TH2 +291 0x1800 //RX_BWE_UV_TH3 +292 0x1000 //RX_BWE_V_TH +293 0x04CD //RX_BWE_GAIN1_V_TH1 +294 0x0F33 //RX_BWE_GAIN1_V_TH2 +295 0x7333 //RX_BWE_UV_EQ +296 0x199A //RX_BWE_V_EQ +297 0x7333 //RX_BWE_TONE_TH +298 0x0004 //RX_BWE_UV_HOLD_T +299 0x6CCD //RX_BWE_GAIN2_ALPHA +300 0x799A //RX_BWE_GAIN3_ALPHA +301 0x001E //RX_BWE_CUTOFF +302 0x3000 //RX_BWE_GAINFILL +303 0x3200 //RX_BWE_MAXTH_TONE +304 0x2000 //RX_BWE_EQ_0 +305 0x2000 //RX_BWE_EQ_1 +306 0x2000 //RX_BWE_EQ_2 +307 0x2000 //RX_BWE_EQ_3 +308 0x2000 //RX_BWE_EQ_4 +309 0x2000 //RX_BWE_EQ_5 +310 0x2000 //RX_BWE_EQ_6 +311 0x0000 //RX_BWE_RESRV_0 +312 0x0000 //RX_BWE_RESRV_1 +313 0x0000 //RX_BWE_RESRV_2 +#VOL 0 +163 0x1000 //RX_TDDRC_ALPHA_UP_1 +164 0x1000 //RX_TDDRC_ALPHA_UP_2 +165 0x1000 //RX_TDDRC_ALPHA_UP_3 +166 0x1000 //RX_TDDRC_ALPHA_UP_4 +184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +190 0x7000 //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +269 0x0001 //RX_TDDRC_THRD_0 +270 0x0002 //RX_TDDRC_THRD_1 +271 0x1800 //RX_TDDRC_THRD_2 +272 0x1800 //RX_TDDRC_THRD_3 +273 0x7FFF //RX_TDDRC_SLANT_0 +274 0x7FFF //RX_TDDRC_SLANT_1 +275 0x1000 //RX_TDDRC_ALPHA_UP_0 +276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x199A //RX_TDDRC_HMNC_GAIN +279 0x0001 //RX_TDDRC_SMT_FLAG +280 0x0CCD //RX_TDDRC_SMT_W +281 0x0551 //RX_TDDRC_DRC_GAIN +195 0x0020 //RX_FDEQ_SUBNUM +196 0x483E //RX_FDEQ_GAIN_0 +197 0x3E3E //RX_FDEQ_GAIN_1 +198 0x3E4C //RX_FDEQ_GAIN_2 +199 0x5064 //RX_FDEQ_GAIN_3 +200 0x7076 //RX_FDEQ_GAIN_4 +201 0x897A //RX_FDEQ_GAIN_5 +202 0x7C80 //RX_FDEQ_GAIN_6 +203 0x8888 //RX_FDEQ_GAIN_7 +204 0x949C //RX_FDEQ_GAIN_8 +205 0x96A4 //RX_FDEQ_GAIN_9 +206 0xA9A0 //RX_FDEQ_GAIN_10 +207 0x9487 //RX_FDEQ_GAIN_11 +208 0x6F64 //RX_FDEQ_GAIN_12 +209 0x625A //RX_FDEQ_GAIN_13 +210 0x5D80 //RX_FDEQ_GAIN_14 +211 0x8890 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0202 //RX_FDEQ_BIN_0 +221 0x0202 //RX_FDEQ_BIN_1 +222 0x0301 //RX_FDEQ_BIN_2 +223 0x0404 //RX_FDEQ_BIN_3 +224 0x0406 //RX_FDEQ_BIN_4 +225 0x0109 //RX_FDEQ_BIN_5 +226 0x0708 //RX_FDEQ_BIN_6 +227 0x090A //RX_FDEQ_BIN_7 +228 0x0B0C //RX_FDEQ_BIN_8 +229 0x0D0E //RX_FDEQ_BIN_9 +230 0x1013 //RX_FDEQ_BIN_10 +231 0x1719 //RX_FDEQ_BIN_11 +232 0x1B0F //RX_FDEQ_BIN_12 +233 0x141E //RX_FDEQ_BIN_13 +234 0x3728 //RX_FDEQ_BIN_14 +235 0x282C //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x4000 //RX_FDEQ_RESRV_0 +245 0x0320 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0030 //RX_FDDRC_BAND_MARGIN_1 +248 0x0050 //RX_FDDRC_BAND_MARGIN_2 +249 0x0080 //RX_FDDRC_BAND_MARGIN_3 +250 0x0007 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x5000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x6400 //RX_FDDRC_THRD_3_2 +258 0x6400 //RX_FDDRC_THRD_3_3 +259 0x2000 //RX_FDDRC_SLANT_0_0 +260 0x2000 //RX_FDDRC_SLANT_0_1 +261 0x2000 //RX_FDDRC_SLANT_0_2 +262 0x2000 //RX_FDDRC_SLANT_0_3 +263 0x5333 //RX_FDDRC_SLANT_1_0 +264 0x5333 //RX_FDDRC_SLANT_1_1 +265 0x5333 //RX_FDDRC_SLANT_1_2 +266 0x5333 //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +286 0x000A //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 +#VOL 1 +163 0x1000 //RX_TDDRC_ALPHA_UP_1 +164 0x1000 //RX_TDDRC_ALPHA_UP_2 +165 0x1000 //RX_TDDRC_ALPHA_UP_3 +166 0x1000 //RX_TDDRC_ALPHA_UP_4 +184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +190 0x7000 //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +269 0x0001 //RX_TDDRC_THRD_0 +270 0x0002 //RX_TDDRC_THRD_1 +271 0x1800 //RX_TDDRC_THRD_2 +272 0x1800 //RX_TDDRC_THRD_3 +273 0x7FFF //RX_TDDRC_SLANT_0 +274 0x7FFF //RX_TDDRC_SLANT_1 +275 0x1000 //RX_TDDRC_ALPHA_UP_0 +276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x199A //RX_TDDRC_HMNC_GAIN +279 0x0001 //RX_TDDRC_SMT_FLAG +280 0x0CCD //RX_TDDRC_SMT_W +281 0x0551 //RX_TDDRC_DRC_GAIN +195 0x0020 //RX_FDEQ_SUBNUM +196 0x483E //RX_FDEQ_GAIN_0 +197 0x3E3E //RX_FDEQ_GAIN_1 +198 0x3E4C //RX_FDEQ_GAIN_2 +199 0x5064 //RX_FDEQ_GAIN_3 +200 0x7076 //RX_FDEQ_GAIN_4 +201 0x897A //RX_FDEQ_GAIN_5 +202 0x7C80 //RX_FDEQ_GAIN_6 +203 0x8888 //RX_FDEQ_GAIN_7 +204 0x949C //RX_FDEQ_GAIN_8 +205 0x96A4 //RX_FDEQ_GAIN_9 +206 0xA9A0 //RX_FDEQ_GAIN_10 +207 0x9487 //RX_FDEQ_GAIN_11 +208 0x6F64 //RX_FDEQ_GAIN_12 +209 0x625A //RX_FDEQ_GAIN_13 +210 0x5D80 //RX_FDEQ_GAIN_14 +211 0x8890 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0202 //RX_FDEQ_BIN_0 +221 0x0202 //RX_FDEQ_BIN_1 +222 0x0301 //RX_FDEQ_BIN_2 +223 0x0404 //RX_FDEQ_BIN_3 +224 0x0406 //RX_FDEQ_BIN_4 +225 0x0109 //RX_FDEQ_BIN_5 +226 0x0708 //RX_FDEQ_BIN_6 +227 0x090A //RX_FDEQ_BIN_7 +228 0x0B0C //RX_FDEQ_BIN_8 +229 0x0D0E //RX_FDEQ_BIN_9 +230 0x1013 //RX_FDEQ_BIN_10 +231 0x1719 //RX_FDEQ_BIN_11 +232 0x1B0F //RX_FDEQ_BIN_12 +233 0x141E //RX_FDEQ_BIN_13 +234 0x3728 //RX_FDEQ_BIN_14 +235 0x282C //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x4000 //RX_FDEQ_RESRV_0 +245 0x0320 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0030 //RX_FDDRC_BAND_MARGIN_1 +248 0x0050 //RX_FDDRC_BAND_MARGIN_2 +249 0x0080 //RX_FDDRC_BAND_MARGIN_3 +250 0x0007 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x5000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x6400 //RX_FDDRC_THRD_3_2 +258 0x6400 //RX_FDDRC_THRD_3_3 +259 0x2000 //RX_FDDRC_SLANT_0_0 +260 0x2000 //RX_FDDRC_SLANT_0_1 +261 0x2000 //RX_FDDRC_SLANT_0_2 +262 0x2000 //RX_FDDRC_SLANT_0_3 +263 0x5333 //RX_FDDRC_SLANT_1_0 +264 0x5333 //RX_FDDRC_SLANT_1_1 +265 0x5333 //RX_FDDRC_SLANT_1_2 +266 0x5333 //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +286 0x0010 //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 +#VOL 2 +163 0x1000 //RX_TDDRC_ALPHA_UP_1 +164 0x1000 //RX_TDDRC_ALPHA_UP_2 +165 0x1000 //RX_TDDRC_ALPHA_UP_3 +166 0x1000 //RX_TDDRC_ALPHA_UP_4 +184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +190 0x7000 //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +269 0x0001 //RX_TDDRC_THRD_0 +270 0x0002 //RX_TDDRC_THRD_1 +271 0x1800 //RX_TDDRC_THRD_2 +272 0x1800 //RX_TDDRC_THRD_3 +273 0x7FFF //RX_TDDRC_SLANT_0 +274 0x7FFF //RX_TDDRC_SLANT_1 +275 0x1000 //RX_TDDRC_ALPHA_UP_0 +276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x199A //RX_TDDRC_HMNC_GAIN +279 0x0001 //RX_TDDRC_SMT_FLAG +280 0x0CCD //RX_TDDRC_SMT_W +281 0x0551 //RX_TDDRC_DRC_GAIN +195 0x0020 //RX_FDEQ_SUBNUM +196 0x483E //RX_FDEQ_GAIN_0 +197 0x3E3E //RX_FDEQ_GAIN_1 +198 0x3E4C //RX_FDEQ_GAIN_2 +199 0x5064 //RX_FDEQ_GAIN_3 +200 0x7076 //RX_FDEQ_GAIN_4 +201 0x897A //RX_FDEQ_GAIN_5 +202 0x7C80 //RX_FDEQ_GAIN_6 +203 0x8888 //RX_FDEQ_GAIN_7 +204 0x949C //RX_FDEQ_GAIN_8 +205 0x96A4 //RX_FDEQ_GAIN_9 +206 0xA9A0 //RX_FDEQ_GAIN_10 +207 0x9487 //RX_FDEQ_GAIN_11 +208 0x6F64 //RX_FDEQ_GAIN_12 +209 0x625A //RX_FDEQ_GAIN_13 +210 0x5D80 //RX_FDEQ_GAIN_14 +211 0x8890 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0202 //RX_FDEQ_BIN_0 +221 0x0202 //RX_FDEQ_BIN_1 +222 0x0301 //RX_FDEQ_BIN_2 +223 0x0404 //RX_FDEQ_BIN_3 +224 0x0406 //RX_FDEQ_BIN_4 +225 0x0109 //RX_FDEQ_BIN_5 +226 0x0708 //RX_FDEQ_BIN_6 +227 0x090A //RX_FDEQ_BIN_7 +228 0x0B0C //RX_FDEQ_BIN_8 +229 0x0D0E //RX_FDEQ_BIN_9 +230 0x1013 //RX_FDEQ_BIN_10 +231 0x1719 //RX_FDEQ_BIN_11 +232 0x1B0F //RX_FDEQ_BIN_12 +233 0x141E //RX_FDEQ_BIN_13 +234 0x3728 //RX_FDEQ_BIN_14 +235 0x282C //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x4000 //RX_FDEQ_RESRV_0 +245 0x0320 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0030 //RX_FDDRC_BAND_MARGIN_1 +248 0x0050 //RX_FDDRC_BAND_MARGIN_2 +249 0x0080 //RX_FDDRC_BAND_MARGIN_3 +250 0x0007 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x5000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x6400 //RX_FDDRC_THRD_3_2 +258 0x6400 //RX_FDDRC_THRD_3_3 +259 0x2000 //RX_FDDRC_SLANT_0_0 +260 0x2000 //RX_FDDRC_SLANT_0_1 +261 0x2000 //RX_FDDRC_SLANT_0_2 +262 0x2000 //RX_FDDRC_SLANT_0_3 +263 0x5333 //RX_FDDRC_SLANT_1_0 +264 0x5333 //RX_FDDRC_SLANT_1_1 +265 0x5333 //RX_FDDRC_SLANT_1_2 +266 0x5333 //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +286 0x001B //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 +#VOL 3 +163 0x1000 //RX_TDDRC_ALPHA_UP_1 +164 0x1000 //RX_TDDRC_ALPHA_UP_2 +165 0x1000 //RX_TDDRC_ALPHA_UP_3 +166 0x1000 //RX_TDDRC_ALPHA_UP_4 +184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +190 0x7000 //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +269 0x0001 //RX_TDDRC_THRD_0 +270 0x0002 //RX_TDDRC_THRD_1 +271 0x1800 //RX_TDDRC_THRD_2 +272 0x1800 //RX_TDDRC_THRD_3 +273 0x7FFF //RX_TDDRC_SLANT_0 +274 0x7FFF //RX_TDDRC_SLANT_1 +275 0x1000 //RX_TDDRC_ALPHA_UP_0 +276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x199A //RX_TDDRC_HMNC_GAIN +279 0x0001 //RX_TDDRC_SMT_FLAG +280 0x0CCD //RX_TDDRC_SMT_W +281 0x0551 //RX_TDDRC_DRC_GAIN +195 0x0020 //RX_FDEQ_SUBNUM +196 0x483E //RX_FDEQ_GAIN_0 +197 0x3E3E //RX_FDEQ_GAIN_1 +198 0x3E4C //RX_FDEQ_GAIN_2 +199 0x5064 //RX_FDEQ_GAIN_3 +200 0x7076 //RX_FDEQ_GAIN_4 +201 0x897A //RX_FDEQ_GAIN_5 +202 0x7C80 //RX_FDEQ_GAIN_6 +203 0x8888 //RX_FDEQ_GAIN_7 +204 0x949C //RX_FDEQ_GAIN_8 +205 0x96A4 //RX_FDEQ_GAIN_9 +206 0xA9A0 //RX_FDEQ_GAIN_10 +207 0x9487 //RX_FDEQ_GAIN_11 +208 0x6F64 //RX_FDEQ_GAIN_12 +209 0x625A //RX_FDEQ_GAIN_13 +210 0x5D80 //RX_FDEQ_GAIN_14 +211 0x8890 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0202 //RX_FDEQ_BIN_0 +221 0x0202 //RX_FDEQ_BIN_1 +222 0x0301 //RX_FDEQ_BIN_2 +223 0x0404 //RX_FDEQ_BIN_3 +224 0x0406 //RX_FDEQ_BIN_4 +225 0x0109 //RX_FDEQ_BIN_5 +226 0x0708 //RX_FDEQ_BIN_6 +227 0x090A //RX_FDEQ_BIN_7 +228 0x0B0C //RX_FDEQ_BIN_8 +229 0x0D0E //RX_FDEQ_BIN_9 +230 0x1013 //RX_FDEQ_BIN_10 +231 0x1719 //RX_FDEQ_BIN_11 +232 0x1B0F //RX_FDEQ_BIN_12 +233 0x141E //RX_FDEQ_BIN_13 +234 0x3728 //RX_FDEQ_BIN_14 +235 0x282C //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x4000 //RX_FDEQ_RESRV_0 +245 0x0320 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0030 //RX_FDDRC_BAND_MARGIN_1 +248 0x0050 //RX_FDDRC_BAND_MARGIN_2 +249 0x0080 //RX_FDDRC_BAND_MARGIN_3 +250 0x0007 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x5000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x6400 //RX_FDDRC_THRD_3_2 +258 0x6400 //RX_FDDRC_THRD_3_3 +259 0x2000 //RX_FDDRC_SLANT_0_0 +260 0x2000 //RX_FDDRC_SLANT_0_1 +261 0x2000 //RX_FDDRC_SLANT_0_2 +262 0x2000 //RX_FDDRC_SLANT_0_3 +263 0x5333 //RX_FDDRC_SLANT_1_0 +264 0x5333 //RX_FDDRC_SLANT_1_1 +265 0x5333 //RX_FDDRC_SLANT_1_2 +266 0x5333 //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +286 0x0032 //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 +#VOL 4 +163 0x1000 //RX_TDDRC_ALPHA_UP_1 +164 0x1000 //RX_TDDRC_ALPHA_UP_2 +165 0x1000 //RX_TDDRC_ALPHA_UP_3 +166 0x1000 //RX_TDDRC_ALPHA_UP_4 +184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +190 0x7000 //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +269 0x0001 //RX_TDDRC_THRD_0 +270 0x0002 //RX_TDDRC_THRD_1 +271 0x1800 //RX_TDDRC_THRD_2 +272 0x1800 //RX_TDDRC_THRD_3 +273 0x7FFF //RX_TDDRC_SLANT_0 +274 0x7FFF //RX_TDDRC_SLANT_1 +275 0x1000 //RX_TDDRC_ALPHA_UP_0 +276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x199A //RX_TDDRC_HMNC_GAIN +279 0x0001 //RX_TDDRC_SMT_FLAG +280 0x0CCD //RX_TDDRC_SMT_W +281 0x0551 //RX_TDDRC_DRC_GAIN +195 0x0020 //RX_FDEQ_SUBNUM +196 0x483E //RX_FDEQ_GAIN_0 +197 0x3E3E //RX_FDEQ_GAIN_1 +198 0x3E4C //RX_FDEQ_GAIN_2 +199 0x5064 //RX_FDEQ_GAIN_3 +200 0x7076 //RX_FDEQ_GAIN_4 +201 0x897A //RX_FDEQ_GAIN_5 +202 0x7C80 //RX_FDEQ_GAIN_6 +203 0x8888 //RX_FDEQ_GAIN_7 +204 0x949C //RX_FDEQ_GAIN_8 +205 0x96A4 //RX_FDEQ_GAIN_9 +206 0xA9A0 //RX_FDEQ_GAIN_10 +207 0x9487 //RX_FDEQ_GAIN_11 +208 0x6F64 //RX_FDEQ_GAIN_12 +209 0x625A //RX_FDEQ_GAIN_13 +210 0x5D80 //RX_FDEQ_GAIN_14 +211 0x8890 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0202 //RX_FDEQ_BIN_0 +221 0x0202 //RX_FDEQ_BIN_1 +222 0x0301 //RX_FDEQ_BIN_2 +223 0x0404 //RX_FDEQ_BIN_3 +224 0x0406 //RX_FDEQ_BIN_4 +225 0x0109 //RX_FDEQ_BIN_5 +226 0x0708 //RX_FDEQ_BIN_6 +227 0x090A //RX_FDEQ_BIN_7 +228 0x0B0C //RX_FDEQ_BIN_8 +229 0x0D0E //RX_FDEQ_BIN_9 +230 0x1013 //RX_FDEQ_BIN_10 +231 0x1719 //RX_FDEQ_BIN_11 +232 0x1B0F //RX_FDEQ_BIN_12 +233 0x141E //RX_FDEQ_BIN_13 +234 0x3728 //RX_FDEQ_BIN_14 +235 0x282C //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x4000 //RX_FDEQ_RESRV_0 +245 0x0320 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0030 //RX_FDDRC_BAND_MARGIN_1 +248 0x0050 //RX_FDDRC_BAND_MARGIN_2 +249 0x0080 //RX_FDDRC_BAND_MARGIN_3 +250 0x0007 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x5000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x6400 //RX_FDDRC_THRD_3_2 +258 0x6400 //RX_FDDRC_THRD_3_3 +259 0x2000 //RX_FDDRC_SLANT_0_0 +260 0x2000 //RX_FDDRC_SLANT_0_1 +261 0x2000 //RX_FDDRC_SLANT_0_2 +262 0x2000 //RX_FDDRC_SLANT_0_3 +263 0x5333 //RX_FDDRC_SLANT_1_0 +264 0x5333 //RX_FDDRC_SLANT_1_1 +265 0x5333 //RX_FDDRC_SLANT_1_2 +266 0x5333 //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +286 0x0047 //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 +#VOL 5 +163 0x1000 //RX_TDDRC_ALPHA_UP_1 +164 0x1000 //RX_TDDRC_ALPHA_UP_2 +165 0x1000 //RX_TDDRC_ALPHA_UP_3 +166 0x1000 //RX_TDDRC_ALPHA_UP_4 +184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +190 0x7000 //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +269 0x0001 //RX_TDDRC_THRD_0 +270 0x0002 //RX_TDDRC_THRD_1 +271 0x1800 //RX_TDDRC_THRD_2 +272 0x1800 //RX_TDDRC_THRD_3 +273 0x7FFF //RX_TDDRC_SLANT_0 +274 0x7FFF //RX_TDDRC_SLANT_1 +275 0x1000 //RX_TDDRC_ALPHA_UP_0 +276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x199A //RX_TDDRC_HMNC_GAIN +279 0x0001 //RX_TDDRC_SMT_FLAG +280 0x0CCD //RX_TDDRC_SMT_W +281 0x0551 //RX_TDDRC_DRC_GAIN +195 0x0020 //RX_FDEQ_SUBNUM +196 0x483E //RX_FDEQ_GAIN_0 +197 0x3E3E //RX_FDEQ_GAIN_1 +198 0x3E4C //RX_FDEQ_GAIN_2 +199 0x5064 //RX_FDEQ_GAIN_3 +200 0x7076 //RX_FDEQ_GAIN_4 +201 0x897A //RX_FDEQ_GAIN_5 +202 0x7C80 //RX_FDEQ_GAIN_6 +203 0x8888 //RX_FDEQ_GAIN_7 +204 0x949C //RX_FDEQ_GAIN_8 +205 0x96A4 //RX_FDEQ_GAIN_9 +206 0xA9A0 //RX_FDEQ_GAIN_10 +207 0x9487 //RX_FDEQ_GAIN_11 +208 0x6F64 //RX_FDEQ_GAIN_12 +209 0x625A //RX_FDEQ_GAIN_13 +210 0x5D80 //RX_FDEQ_GAIN_14 +211 0x8890 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0202 //RX_FDEQ_BIN_0 +221 0x0202 //RX_FDEQ_BIN_1 +222 0x0301 //RX_FDEQ_BIN_2 +223 0x0404 //RX_FDEQ_BIN_3 +224 0x0406 //RX_FDEQ_BIN_4 +225 0x0109 //RX_FDEQ_BIN_5 +226 0x0708 //RX_FDEQ_BIN_6 +227 0x090A //RX_FDEQ_BIN_7 +228 0x0B0C //RX_FDEQ_BIN_8 +229 0x0D0E //RX_FDEQ_BIN_9 +230 0x1013 //RX_FDEQ_BIN_10 +231 0x1719 //RX_FDEQ_BIN_11 +232 0x1B0F //RX_FDEQ_BIN_12 +233 0x141E //RX_FDEQ_BIN_13 +234 0x3728 //RX_FDEQ_BIN_14 +235 0x282C //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x4000 //RX_FDEQ_RESRV_0 +245 0x0320 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0030 //RX_FDDRC_BAND_MARGIN_1 +248 0x0050 //RX_FDDRC_BAND_MARGIN_2 +249 0x0080 //RX_FDDRC_BAND_MARGIN_3 +250 0x0007 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x5000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x6400 //RX_FDDRC_THRD_3_2 +258 0x6400 //RX_FDDRC_THRD_3_3 +259 0x2000 //RX_FDDRC_SLANT_0_0 +260 0x2000 //RX_FDDRC_SLANT_0_1 +261 0x2000 //RX_FDDRC_SLANT_0_2 +262 0x2000 //RX_FDDRC_SLANT_0_3 +263 0x5333 //RX_FDDRC_SLANT_1_0 +264 0x5333 //RX_FDDRC_SLANT_1_1 +265 0x5333 //RX_FDDRC_SLANT_1_2 +266 0x5333 //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +286 0x0076 //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 +#VOL 6 +163 0x1000 //RX_TDDRC_ALPHA_UP_1 +164 0x1000 //RX_TDDRC_ALPHA_UP_2 +165 0x1000 //RX_TDDRC_ALPHA_UP_3 +166 0x1000 //RX_TDDRC_ALPHA_UP_4 +184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +190 0x7000 //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +269 0x0001 //RX_TDDRC_THRD_0 +270 0x0002 //RX_TDDRC_THRD_1 +271 0x1800 //RX_TDDRC_THRD_2 +272 0x1800 //RX_TDDRC_THRD_3 +273 0x7FFF //RX_TDDRC_SLANT_0 +274 0x7FFF //RX_TDDRC_SLANT_1 +275 0x1000 //RX_TDDRC_ALPHA_UP_0 +276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x199A //RX_TDDRC_HMNC_GAIN +279 0x0001 //RX_TDDRC_SMT_FLAG +280 0x0CCD //RX_TDDRC_SMT_W +281 0x0551 //RX_TDDRC_DRC_GAIN +195 0x0020 //RX_FDEQ_SUBNUM +196 0x483E //RX_FDEQ_GAIN_0 +197 0x3E3E //RX_FDEQ_GAIN_1 +198 0x3E4C //RX_FDEQ_GAIN_2 +199 0x5064 //RX_FDEQ_GAIN_3 +200 0x7076 //RX_FDEQ_GAIN_4 +201 0x897A //RX_FDEQ_GAIN_5 +202 0x7C80 //RX_FDEQ_GAIN_6 +203 0x8888 //RX_FDEQ_GAIN_7 +204 0x949C //RX_FDEQ_GAIN_8 +205 0x96A4 //RX_FDEQ_GAIN_9 +206 0xA9A0 //RX_FDEQ_GAIN_10 +207 0x9487 //RX_FDEQ_GAIN_11 +208 0x6F64 //RX_FDEQ_GAIN_12 +209 0x625A //RX_FDEQ_GAIN_13 +210 0x5D80 //RX_FDEQ_GAIN_14 +211 0x8890 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0202 //RX_FDEQ_BIN_0 +221 0x0202 //RX_FDEQ_BIN_1 +222 0x0301 //RX_FDEQ_BIN_2 +223 0x0404 //RX_FDEQ_BIN_3 +224 0x0406 //RX_FDEQ_BIN_4 +225 0x0109 //RX_FDEQ_BIN_5 +226 0x0708 //RX_FDEQ_BIN_6 +227 0x090A //RX_FDEQ_BIN_7 +228 0x0B0C //RX_FDEQ_BIN_8 +229 0x0D0E //RX_FDEQ_BIN_9 +230 0x1013 //RX_FDEQ_BIN_10 +231 0x1719 //RX_FDEQ_BIN_11 +232 0x1B0F //RX_FDEQ_BIN_12 +233 0x141E //RX_FDEQ_BIN_13 +234 0x3728 //RX_FDEQ_BIN_14 +235 0x282C //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x4000 //RX_FDEQ_RESRV_0 +245 0x0320 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0030 //RX_FDDRC_BAND_MARGIN_1 +248 0x0050 //RX_FDDRC_BAND_MARGIN_2 +249 0x0080 //RX_FDDRC_BAND_MARGIN_3 +250 0x0007 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x5000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x6400 //RX_FDDRC_THRD_3_2 +258 0x6400 //RX_FDDRC_THRD_3_3 +259 0x2000 //RX_FDDRC_SLANT_0_0 +260 0x2000 //RX_FDDRC_SLANT_0_1 +261 0x2000 //RX_FDDRC_SLANT_0_2 +262 0x2000 //RX_FDDRC_SLANT_0_3 +263 0x5333 //RX_FDDRC_SLANT_1_0 +264 0x5333 //RX_FDDRC_SLANT_1_1 +265 0x5333 //RX_FDDRC_SLANT_1_2 +266 0x5333 //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +286 0x0100 //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 + +#CASE_NAME HANDSET-HANDSET-CUSTOM1-SWB +#PARAM_MODE Simple +#PARAM_TYPE TX+2RX +#TOTAL_CUSTOM_STEP 7+7 +#TX +0 0x0000 //TX_OPERATION_MODE_0 +1 0x0000 //TX_OPERATION_MODE_1 +2 0x0076 //TX_PATCH_REG +3 0x6F76 //TX_SENDFUNC_MODE_0 +4 0x0001 //TX_SENDFUNC_MODE_1 +5 0x0002 //TX_NUM_MIC +6 0x0003 //TX_SAMPLINGFREQ_SIG +7 0x0003 //TX_SAMPLINGFREQ_PROC +8 0x000A //TX_FRAME_SZ_SIG +9 0x000A //TX_FRAME_SZ +10 0x0000 //TX_DELAY_OPT +11 0x0028 //TX_MAX_TAIL_LENGTH +12 0x0001 //TX_NUM_LOUTCHN +13 0x0001 //TX_MAXNUM_AECREF +14 0x0000 //TX_DBG_FUNC_REG +15 0x0000 //TX_DBG_FUNC_REG1 +16 0x0000 //TX_SYS_RESRV_0 +17 0x0000 //TX_SYS_RESRV_1 +18 0x0000 //TX_SYS_RESRV_2 +19 0x0000 //TX_SYS_RESRV_3 +20 0x0000 //TX_DIST2REF0 +21 0x00A3 //TX_DIST2REF1 +22 0x0000 //TX_DIST2REF_02 +23 0x0000 //TX_DIST2REF_03 +24 0x0000 //TX_DIST2REF_04 +25 0x0000 //TX_DIST2REF_05 +26 0x0000 //TX_MMIC +27 0x1000 //TX_PGA_0 +28 0x1000 //TX_PGA_1 +29 0x1000 //TX_PGA_2 +30 0x0000 //TX_PGA_3 +31 0x0000 //TX_PGA_4 +32 0x0000 //TX_PGA_5 +33 0x0000 //TX_MIC_PAIRS +34 0x0000 //TX_MIC_PAIRS_HS +35 0x0002 //TX_MICS_FOR_BF +36 0x0000 //TX_MIC_PAIRS_FORL1 +37 0x0002 //TX_MICS_OF_PAIR0 +38 0x0002 //TX_MICS_OF_PAIR1 +39 0x0002 //TX_MICS_OF_PAIR2 +40 0x0002 //TX_MICS_OF_PAIR3 +41 0x0000 //TX_MIC_DATA_SRC0 +42 0x0002 //TX_MIC_DATA_SRC1 +43 0x0001 //TX_MIC_DATA_SRC2 +44 0x0000 //TX_MIC_DATA_SRC3 +45 0x0000 //TX_MIC_PAIR_CH_04 +46 0x0000 //TX_MIC_PAIR_CH_05 +47 0x0000 //TX_MIC_PAIR_CH_10 +48 0x0000 //TX_MIC_PAIR_CH_11 +49 0x0000 //TX_MIC_PAIR_CH_12 +50 0x0000 //TX_MIC_PAIR_CH_13 +51 0x0000 //TX_MIC_PAIR_CH_14 +52 0x05DC //TX_HD_BIN_MASK +53 0x0010 //TX_HD_SUBAND_MASK +54 0x19A1 //TX_HD_FRAME_AVG_MASK +55 0x0320 //TX_HD_MIN_FRQ +56 0x1000 //TX_HD_ALPHA_PSD +57 0x1100 //TX_T_PHPR1 +58 0x0000 //TX_T_PHPR2 +59 0x0000 //TX_T_PTPR +60 0x0000 //TX_T_PNPR +61 0x0000 //TX_T_PAPR1 +62 0xEE6C //TX_T_PSDVAT +63 0x0800 //TX_CNT +64 0x4000 //TX_ANTI_HOWL_GAIN +65 0x0001 //TX_MICFORBFMARK_0 +66 0x0001 //TX_MICFORBFMARK_1 +67 0x0001 //TX_MICFORBFMARK_2 +68 0x0001 //TX_MICFORBFMARK_3 +69 0x0001 //TX_MICFORBFMARK_4 +70 0x0001 //TX_MICFORBFMARK_5 +71 0x0000 //TX_DIST2REF_10 +72 0x3A66 //TX_DIST2REF_11 +73 0x0000 //TX_DIST2REF2 +74 0x0000 //TX_DIST2REF_13 +75 0x0000 //TX_DIST2REF_14 +76 0x0000 //TX_DIST2REF_15 +77 0x0000 //TX_DIST2REF_20 +78 0x0000 //TX_DIST2REF_21 +79 0x0000 //TX_DIST2REF_22 +80 0x0000 //TX_DIST2REF_23 +81 0x0000 //TX_DIST2REF_24 +82 0x0000 //TX_DIST2REF_25 +83 0x0000 //TX_DIST2REF_30 +84 0x0000 //TX_DIST2REF_31 +85 0x0000 //TX_DIST2REF_32 +86 0x0000 //TX_DIST2REF_33 +87 0x0000 //TX_DIST2REF_34 +88 0x0000 //TX_DIST2REF_35 +89 0x0000 //TX_MIC_LOC_00 +90 0x0000 //TX_MIC_LOC_01 +91 0x0000 //TX_MIC_LOC_02 +92 0x0000 //TX_MIC_LOC_03 +93 0x0000 //TX_MIC_LOC_04 +94 0x0000 //TX_MIC_LOC_05 +95 0x0000 //TX_MIC_LOC_10 +96 0x0000 //TX_MIC_LOC_11 +97 0x0000 //TX_MIC_LOC_12 +98 0x0000 //TX_MIC_LOC_13 +99 0x0000 //TX_MIC_LOC_14 +100 0x0000 //TX_MIC_LOC_15 +101 0x0000 //TX_MIC_LOC_20 +102 0x0000 //TX_MIC_LOC_21 +103 0x0000 //TX_MIC_LOC_22 +104 0x0000 //TX_MIC_LOC_23 +105 0x0000 //TX_MIC_LOC_24 +106 0x0000 //TX_MIC_LOC_25 +107 0x0200 //TX_MIC_REFBLK_VOLUME +108 0x0AAC //TX_MIC_BLOCK_VOLUME +109 0x0000 //TX_INVERSE_MASK +110 0x0000 //TX_ADCS_MASK +111 0x04D0 //TX_ADCS_GAIN +112 0x4000 //TX_NFC_GAINFAC +113 0x0000 //TX_MAINMIC_BLKFACTOR +114 0x0000 //TX_REFMIC_BLKFACTOR +115 0x0000 //TX_BLMIC_BLKFACTOR +116 0x0000 //TX_BRMIC_BLKFACTOR +117 0x0031 //TX_MICBLK_START_BIN +118 0x0060 //TX_MICBLK_END_BIN +119 0x0015 //TX_MICBLK_FE_HOLD +120 0xFFF2 //TX_MICBLK_MR_EXP_TH +121 0xFFF2 //TX_MICBLK_LR_EXP_TH +122 0x0000 //TX_FENE_HOLD +123 0x4000 //TX_FE_ENER_TH_MTS +124 0x0004 //TX_FE_ENER_TH_EXP +125 0x6000 //TX_C_POST_FLT_MIC_MAINBLK +126 0x6000 //TX_C_POST_FLT_MIC_REFBLK +127 0x0010 //TX_MIC_BLOCK_N +128 0x7E56 //TX_A_HP +129 0x4000 //TX_B_PE +130 0x1800 //TX_THR_PITCH_DET_0 +131 0x1000 //TX_THR_PITCH_DET_1 +132 0x0800 //TX_THR_PITCH_DET_2 +133 0x0008 //TX_PITCH_BFR_LEN +134 0x0003 //TX_SBD_PITCH_DET +135 0x0050 //TX_TD_AEC_L +136 0x4000 //TX_MU0_UNP_TD_AEC +137 0x1000 //TX_MU0_PTD_TD_AEC +138 0x0000 //TX_PP_RESRV_0 +139 0x2A94 //TX_PP_RESRV_1 +140 0x55F0 //TX_PP_RESRV_2 +141 0x0000 //TX_PP_RESRV_3 +142 0x0000 //TX_PP_RESRV_4 +143 0x0000 //TX_PP_RESRV_5 +144 0x0000 //TX_PP_RESRV_6 +145 0x0000 //TX_PP_RESRV_7 +146 0x0028 //TX_TAIL_LENGTH +147 0x0080 //TX_AEC_REF_GAIN_0 +148 0x0800 //TX_AEC_REF_GAIN_1 +149 0x0800 //TX_AEC_REF_GAIN_2 +150 0x7900 //TX_EAD_THR +151 0x2000 //TX_THR_RE_EST +152 0x0400 //TX_MIN_EQ_RE_EST_0 +153 0x0400 //TX_MIN_EQ_RE_EST_1 +154 0x0800 //TX_MIN_EQ_RE_EST_2 +155 0x0800 //TX_MIN_EQ_RE_EST_3 +156 0x1000 //TX_MIN_EQ_RE_EST_4 +157 0x1000 //TX_MIN_EQ_RE_EST_5 +158 0x1000 //TX_MIN_EQ_RE_EST_6 +159 0x1000 //TX_MIN_EQ_RE_EST_7 +160 0x1000 //TX_MIN_EQ_RE_EST_8 +161 0x1000 //TX_MIN_EQ_RE_EST_9 +162 0x1000 //TX_MIN_EQ_RE_EST_10 +163 0x1000 //TX_MIN_EQ_RE_EST_11 +164 0x1000 //TX_MIN_EQ_RE_EST_12 +165 0x3000 //TX_LAMBDA_RE_EST +166 0x1000 //TX_LAMBDA_CB_NLE +167 0x1800 //TX_C_POST_FLT +168 0x4000 //TX_GAIN_NP +169 0x003C //TX_SE_HOLD_N +170 0x0046 //TX_DT_HOLD_N +171 0x03E8 //TX_DT2_HOLD_N +172 0x6666 //TX_AEC_RESRV_0 +173 0x0000 //TX_AEC_RESRV_1 +174 0x0014 //TX_AEC_RESRV_2 +175 0x0000 //TX_MIC_DELAY_LENGTH +176 0x0000 //TX_REF_DELAY_LENGTH +177 0x0000 //TX_ADD_LINEIN_GAINL +178 0x0000 //TX_ADD_LINEIN_GAINH +179 0x0000 //TX_MIN_EQ_RE_EST_14 +180 0x0000 //TX_DTD_THR1_8 +181 0x7FFF //TX_DTD_THR2_8 +182 0x0000 //TX_DTD_MIC_BLK2 +183 0x0008 //TX_FRQ_LIN_LEN +184 0x7FFF //TX_FRQ_AEC_LEN_RHO +185 0x6000 //TX_MU0_UNP_FRQ_AEC +186 0x4000 //TX_MU0_PTD_FRQ_AEC +187 0x000A //TX_MINENOISETH +188 0x0800 //TX_MU0_RE_EST +189 0x0001 //TX_AEC_NUM_CH +190 0x0000 //TX_BIGECHOATTENUATION_MAX +191 0x2000 //TX_A_POST_FLT_MICBLK +192 0x0000 //TX_BLKENERTH +193 0x0000 //TX_BLKENERHIGHTH +194 0x0000 //TX_NORMENERTH +195 0x0000 //TX_NORMENERHIGHTH +196 0x0000 //TX_NORMENERHIGHTHL +197 0x7000 //TX_DTD_THR1_0 +198 0x7000 //TX_DTD_THR1_1 +199 0x7000 //TX_DTD_THR1_2 +200 0x7F00 //TX_DTD_THR1_3 +201 0x7F00 //TX_DTD_THR1_4 +202 0x7F00 //TX_DTD_THR1_5 +203 0x7F00 //TX_DTD_THR1_6 +204 0x2000 //TX_DTD_THR2_0 +205 0x2000 //TX_DTD_THR2_1 +206 0x2000 //TX_DTD_THR2_2 +207 0x1000 //TX_DTD_THR2_3 +208 0x1000 //TX_DTD_THR2_4 +209 0x1000 //TX_DTD_THR2_5 +210 0x1000 //TX_DTD_THR2_6 +211 0x6000 //TX_DTD_THR3 +212 0x0177 //TX_SPK_CUT_K +213 0x1B58 //TX_DT_CUT_K +214 0x0100 //TX_DT_CUT_THR +215 0x04EB //TX_COMFORT_G +216 0x01F4 //TX_POWER_YOUT_TH +217 0x4000 //TX_FDPFGAINECHO +218 0x0000 //TX_DTD_HD_THR +219 0x0000 //TX_SPK_CUT_K_S +220 0x0000 //TX_DTD_MIC_BLK +221 0x0400 //TX_ADPT_STRICT_L +222 0x0200 //TX_ADPT_STRICT_H +223 0x0C00 //TX_RATIO_DT_L_TH_LOW +224 0x2000 //TX_RATIO_DT_H_TH_LOW +225 0x1800 //TX_RATIO_DT_L_TH_HIGH +226 0x3000 //TX_RATIO_DT_H_TH_HIGH +227 0x0A00 //TX_RATIO_DT_L0_TH +228 0x7000 //TX_B_POST_FILT_ECHO_L +229 0x7FFF //TX_B_POST_FILT_ECHO_H +230 0x0200 //TX_MIN_G_CTRL_ECHO +231 0x7FFF //TX_B_LESSCUT_RTO_ECHO +232 0x0000 //TX_EPD_OFFSET_00 +233 0x0000 //TX_EPD_OFFST_01 +234 0x1388 //TX_RATIO_DT_L0_TH_HIGH +235 0x3A98 //TX_RATIO_DT_H_TH_CUT +236 0x7FFF //TX_MIN_EQ_RE_EST_13 +237 0x0000 //TX_DTD_THR1_7 +238 0x0000 //TX_DTD_THR2_7 +239 0x0800 //TX_DT_RESRV_7 +240 0x0800 //TX_DT_RESRV_8 +241 0x0000 //TX_DT_RESRV_9 +242 0xF600 //TX_THR_SN_EST_0 +243 0xFA00 //TX_THR_SN_EST_1 +244 0xFA00 //TX_THR_SN_EST_2 +245 0xF800 //TX_THR_SN_EST_3 +246 0xF800 //TX_THR_SN_EST_4 +247 0xF800 //TX_THR_SN_EST_5 +248 0xF800 //TX_THR_SN_EST_6 +249 0xF700 //TX_THR_SN_EST_7 +250 0x0000 //TX_DELTA_THR_SN_EST_0 +251 0x0200 //TX_DELTA_THR_SN_EST_1 +252 0x0200 //TX_DELTA_THR_SN_EST_2 +253 0x0200 //TX_DELTA_THR_SN_EST_3 +254 0x0100 //TX_DELTA_THR_SN_EST_4 +255 0x0200 //TX_DELTA_THR_SN_EST_5 +256 0x0100 //TX_DELTA_THR_SN_EST_6 +257 0x0200 //TX_DELTA_THR_SN_EST_7 +258 0x4000 //TX_LAMBDA_NN_EST_0 +259 0x4000 //TX_LAMBDA_NN_EST_1 +260 0x4000 //TX_LAMBDA_NN_EST_2 +261 0x4000 //TX_LAMBDA_NN_EST_3 +262 0x4000 //TX_LAMBDA_NN_EST_4 +263 0x4000 //TX_LAMBDA_NN_EST_5 +264 0x4000 //TX_LAMBDA_NN_EST_6 +265 0x4000 //TX_LAMBDA_NN_EST_7 +266 0x0400 //TX_N_SN_EST +267 0x001E //TX_INBEAM_T +268 0x0041 //TX_INBEAMHOLDT +269 0x2000 //TX_G_STRICT +270 0x2000 //TX_EQ_THR_BF +271 0x799A //TX_LAMBDA_EQ_BF +272 0x1000 //TX_NE_RTO_TH +273 0x1000 //TX_NE_RTO_TH_L +274 0x1000 //TX_MAINREFRTOH_TH_H +275 0x0600 //TX_MAINREFRTOH_TH_L +276 0x2000 //TX_MAINREFRTO_TH_H +277 0x1400 //TX_MAINREFRTO_TH_L +278 0x0000 //TX_MAINREFRTO_TH_EQ +279 0x1000 //TX_B_POST_FLT_0 +280 0x1000 //TX_B_POST_FLT_1 +281 0x0014 //TX_NS_LVL_CTRL_0 +282 0x002C //TX_NS_LVL_CTRL_1 +283 0x0016 //TX_NS_LVL_CTRL_2 +284 0x0018 //TX_NS_LVL_CTRL_3 +285 0x0016 //TX_NS_LVL_CTRL_4 +286 0x0012 //TX_NS_LVL_CTRL_5 +287 0x0016 //TX_NS_LVL_CTRL_6 +288 0x0017 //TX_NS_LVL_CTRL_7 +289 0x000E //TX_MIN_GAIN_S_0 +290 0x000D //TX_MIN_GAIN_S_1 +291 0x0012 //TX_MIN_GAIN_S_2 +292 0x0010 //TX_MIN_GAIN_S_3 +293 0x0012 //TX_MIN_GAIN_S_4 +294 0x0012 //TX_MIN_GAIN_S_5 +295 0x0012 //TX_MIN_GAIN_S_6 +296 0x0012 //TX_MIN_GAIN_S_7 +297 0x6000 //TX_NMOS_SUP +298 0x0000 //TX_NS_MAX_PRI_SNR_TH +299 0x0000 //TX_NMOS_SUP_MENSA +300 0x7FFF //TX_SNRI_SUP_0 +301 0x6000 //TX_SNRI_SUP_1 +302 0x6000 //TX_SNRI_SUP_2 +303 0x6000 //TX_SNRI_SUP_3 +304 0x6000 //TX_SNRI_SUP_4 +305 0x6000 //TX_SNRI_SUP_5 +306 0x6000 //TX_SNRI_SUP_6 +307 0x6000 //TX_SNRI_SUP_7 +308 0x6000 //TX_THR_LFNS +309 0x0017 //TX_G_LFNS +310 0x09C4 //TX_GAIN0_NTH +311 0x000A //TX_MUSIC_MORENS +312 0x7FFF //TX_A_POST_FILT_0 +313 0x2000 //TX_A_POST_FILT_1 +314 0x4000 //TX_A_POST_FILT_S_0 +315 0x4000 //TX_A_POST_FILT_S_1 +316 0x4000 //TX_A_POST_FILT_S_2 +317 0x4000 //TX_A_POST_FILT_S_3 +318 0x4000 //TX_A_POST_FILT_S_4 +319 0x4000 //TX_A_POST_FILT_S_5 +320 0x5000 //TX_A_POST_FILT_S_6 +321 0x7000 //TX_A_POST_FILT_S_7 +322 0x1000 //TX_B_POST_FILT_0 +323 0x1000 //TX_B_POST_FILT_1 +324 0x2000 //TX_B_POST_FILT_2 +325 0x2000 //TX_B_POST_FILT_3 +326 0x2000 //TX_B_POST_FILT_4 +327 0x1000 //TX_B_POST_FILT_5 +328 0x3000 //TX_B_POST_FILT_6 +329 0x3000 //TX_B_POST_FILT_7 +330 0x1000 //TX_B_LESSCUT_RTO_S_0 +331 0x1000 //TX_B_LESSCUT_RTO_S_1 +332 0x1000 //TX_B_LESSCUT_RTO_S_2 +333 0x1000 //TX_B_LESSCUT_RTO_S_3 +334 0x1000 //TX_B_LESSCUT_RTO_S_4 +335 0x1000 //TX_B_LESSCUT_RTO_S_5 +336 0x1000 //TX_B_LESSCUT_RTO_S_6 +337 0x1000 //TX_B_LESSCUT_RTO_S_7 +338 0x7E14 //TX_LAMBDA_PFILT +339 0x7C29 //TX_LAMBDA_PFILT_S_0 +340 0x7C29 //TX_LAMBDA_PFILT_S_1 +341 0x7C29 //TX_LAMBDA_PFILT_S_2 +342 0x7C29 //TX_LAMBDA_PFILT_S_3 +343 0x7C29 //TX_LAMBDA_PFILT_S_4 +344 0x7C29 //TX_LAMBDA_PFILT_S_5 +345 0x7C29 //TX_LAMBDA_PFILT_S_6 +346 0x7C29 //TX_LAMBDA_PFILT_S_7 +347 0x07D0 //TX_K_PEPPER +348 0x0800 //TX_A_PEPPER +349 0x1D4C //TX_K_PEPPER_HF +350 0x0400 //TX_A_PEPPER_HF +351 0x0001 //TX_HMNC_BST_FLG +352 0x4000 //TX_HMNC_BST_THR +353 0x0800 //TX_DT_BINVAD_TH_0 +354 0x0800 //TX_DT_BINVAD_TH_1 +355 0x0800 //TX_DT_BINVAD_TH_2 +356 0x0800 //TX_DT_BINVAD_TH_3 +357 0x0000 //TX_DT_BINVAD_ENDF +358 0x1000 //TX_C_POST_FLT_DT +359 0x7FFF //TX_NS_B_POST_FLT_LESSCUT +360 0x0100 //TX_DT_BOOST +361 0x0000 //TX_BF_SGRAD_FLG +362 0x0005 //TX_BF_DVG_TH +363 0x001E //TX_SN_C_F +364 0x0000 //TX_K_APT +365 0x0001 //TX_NOISEDET +366 0x0190 //TX_NDETCT +367 0x000A //TX_NOISE_TH_0 +368 0x7FFF //TX_NOISE_TH_0_2 +369 0x7FFF //TX_NOISE_TH_0_3 +370 0x00C6 //TX_NOISE_TH_1 +371 0x0DAC //TX_NOISE_TH_2 +372 0x2260 //TX_NOISE_TH_3 +373 0x7080 //TX_NOISE_TH_4 +374 0x57E4 //TX_NOISE_TH_5 +375 0x4BD6 //TX_NOISE_TH_5_2 +376 0x0001 //TX_NOISE_TH_5_3 +377 0x4E20 //TX_NOISE_TH_5_4 +378 0x1194 //TX_NOISE_TH_6 +379 0x0014 //TX_MINENOISE_TH +380 0xD508 //TX_MORENS_TFMASK_TH +381 0x0001 //TX_DRC_QUIET_FLOOR +382 0x6D60 //TX_RATIODTL_CUT_TH +383 0x0DAC //TX_DT_CUT_K1 +384 0x00A5 //TX_OUT_ENER_S_TH_CLEAN +385 0x00A5 //TX_OUT_ENER_S_TH_LESSCLEAN +386 0x00A5 //TX_OUT_ENER_S_TH_NOISY +387 0x0029 //TX_OUT_ENER_TH_NOISE +388 0x0200 //TX_OUT_ENER_TH_SPEECH +389 0x2000 //TX_SN_NPB_GAIN +390 0x0000 //TX_NN_NPB_GAIN +391 0x3000 //TX_POST_MASK_SUP_HSNE +392 0x07D0 //TX_TAIL_DET_TH +393 0x4000 //TX_B_LESSCUT_RTO_WTA +394 0x0000 //TX_MEL_G_R +395 0x0080 //TX_SUPHIGH_TH +396 0x0000 //TX_MASK_G_R +397 0x0002 //TX_EXTRA_NS_L +398 0x1800 //TX_C_POST_FLT_MASK +399 0x7FFF //TX_A_POST_FLT_WNS +400 0x0148 //TX_MIN_G_LOW300HZ +401 0x0004 //TX_MAXLEVEL_CNG +402 0x00B4 //TX_STN_NOISE_TH +403 0x4000 //TX_POST_MASK_SUP +404 0x7FFF //TX_POST_MASK_ADJUST +405 0x00C8 //TX_NS_ENOISE_MIC0_TH +406 0x0014 //TX_MINENOISE_MIC0_TH +407 0x012C //TX_MINENOISE_MIC0_S_TH +408 0x2900 //TX_MIN_G_CTRL_SSNS +409 0x0800 //TX_METAL_RTO_THR +410 0x0FA0 //TX_NS_FP_K_METAL +411 0x3A98 //TX_NOISEDET_BOOST_TH +412 0x0FA0 //TX_NSMOOTH_TH +413 0x0000 //TX_NS_RESRV_8 +414 0x1800 //TX_RHO_UPB +415 0x2328 //TX_N_HOLD_HS +416 0x006E //TX_N_RHO_BFR0 +417 0x7FFF //TX_LAMBDA_ARSP_EST +418 0x0100 //TX_EXTRA_GAIN_MICBLOCK +419 0x0333 //TX_THR_STD_NSR +420 0x019A //TX_THR_STD_PLH +421 0x03E8 //TX_N_HOLD_STD +422 0x0066 //TX_THR_STD_RHO +423 0x2800 //TX_BF_RESET_THR_HS +424 0x0CCD //TX_SB_RTO_MEAN_TH +425 0x0300 //TX_SB_RHO_MEAN_TH_NTALK +426 0x2000 //TX_SB_RTO_MEAN_TH_ABN +427 0x2EE0 //TX_SB_RTO_MEAN_TH_RUB +428 0x0990 //TX_WTA_EN_RTO_TH +429 0x1400 //TX_TOP_ENER_TH_F +430 0x0100 //TX_DESIRED_TALK_HOLDT +431 0x0800 //TX_MIC_BLOCK_FACTOR +432 0x0000 //TX_NSEST_BFRLRNRDC +433 0x0000 //TX_THR_POST_FLT_HS +434 0x0010 //TX_HS_VAD_BIN +435 0x2666 //TX_THR_VAD_HS +436 0x2CCD //TX_MEAN_RTO_MIN_TH2 +437 0x0032 //TX_SILENCE_T +438 0x0000 //TX_A_POST_FLT_WTA +439 0x799A //TX_LAMBDA_PFLT_WTA +440 0x051E //TX_SB_RHO_MEAN2_TH +441 0x02F0 //TX_SB_RHO_MEAN3_TH +442 0x0000 //TX_HS_RESRV_4 +443 0x0000 //TX_HS_RESRV_5 +444 0x0001 //TX_DOA_VAD_THR_1 +445 0x003C //TX_DOA_VAD_THR_2 +446 0x0028 //TX_DOA_VAD_THR1_0 +447 0x0028 //TX_DOA_VAD_THR1_1 +448 0x0000 //TX_SRC_DOA_RNG_LOW_0A +449 0x001E //TX_SRC_DOA_RNG_HIGH_0A +450 0x005A //TX_DFLT_SRC_DOA_0A +451 0x0000 //TX_SRC_DOA_RNG_LOW_0B +452 0x0000 //TX_SRC_DOA_RNG_HIGH_0B +453 0x0000 //TX_DFLT_SRC_DOA_0B +454 0x0000 //TX_SRC_DOA_RNG_LOW_0C +455 0x0000 //TX_SRC_DOA_RNG_HIGH_0C +456 0x0000 //TX_DFLT_SRC_DOA_0C +457 0x0000 //TX_SRC_DOA_RNG_LOW_0D +458 0x0000 //TX_SRC_DOA_RNG_HIGH_0D +459 0x0000 //TX_DFLT_SRC_DOA_0D +460 0x0000 //TX_SRC_DOA_RNG_LOW_1A +461 0x00B4 //TX_SRC_DOA_RNG_HIGH_1A +462 0x005A //TX_DFLT_SRC_DOA_1A +463 0x0000 //TX_SRC_DOA_RNG_LOW_1B +464 0x00B4 //TX_SRC_DOA_RNG_HIGH_1B +465 0x005A //TX_DFLT_SRC_DOA_1B +466 0x0000 //TX_SRC_DOA_RNG_LOW_1C +467 0x00B4 //TX_SRC_DOA_RNG_HIGH_1C +468 0x005A //TX_DFLT_SRC_DOA_1C +469 0x0000 //TX_SRC_DOA_RNG_LOW_1D +470 0x00B4 //TX_SRC_DOA_RNG_HIGH_1D +471 0x005A //TX_DFLT_SRC_DOA_1D +472 0x0100 //TX_BF_HOLDOFF_T +473 0x7FFF //TX_DOA_COST_FACTOR +474 0x0D9A //TX_MAINTOREFR_TH0 +475 0x071C //TX_DOA_TRK_THR +476 0x012C //TX_DOA_TRACK_HT +477 0x0200 //TX_N1_HOLD_HF +478 0x0100 //TX_N2_HOLD_HF +479 0x2A3D //TX_BF_RESET_THR_HF +480 0x7333 //TX_DOA_SMOOTH +481 0x0800 //TX_MU_BF +482 0x0800 //TX_BF_MU_LF_B2 +483 0x0040 //TX_BF_FC_END_BIN_B2 +484 0x0020 //TX_BF_FC_END_BIN +485 0x0000 //TX_HF_RESRV_25 +486 0x0000 //TX_HF_RESRV_26 +487 0x0007 //TX_N_DOA_SEED +488 0x0001 //TX_FINE_DOA_SEARCH_FLG +489 0x0000 //TX_HF_RESRV_27 +490 0x038E //TX_DLT_SRC_DOA_RNG +491 0x0200 //TX_BF_MU_LF +492 0x0000 //TX_DFLT_SRC_LOC_0 +493 0x7FFF //TX_DFLT_SRC_LOC_1 +494 0x0000 //TX_DFLT_SRC_LOC_2 +495 0x038E //TX_DOA_TRACK_VADTH +496 0x0000 //TX_DOA_TRACK_NEW +497 0x0300 //TX_NOR_OFF_THR +498 0x7C00 //TX_MORE_ON_700HZ_THR +499 0x2000 //TX_MU_BF_ADPT_NS +500 0x0000 //TX_ADAPT_LEN +501 0x6666 //TX_MORE_SNS +502 0x0000 //TX_NOR_OFF_TH1 +503 0x0000 //TX_WIDE_MASK_TH +504 0xD333 //TX_SUBSNRATIOHIGH4MEANBCK_THR +505 0x6000 //TX_C_POST_FLT_CUT +506 0x2000 //TX_RADIODTLV +507 0x0320 //TX_POWER_LINEIN_TH +508 0x0014 //TX_FE_VADCOUNT_TH_FC +509 0x0000 //TX_ECHO_SUPP_FC +510 0x0C80 //TX_ECHO_TH +511 0x6666 //TX_MIC_TO_BFGAIN +512 0x0000 //TX_MICTOBFGAIN0 +513 0x0000 //TX_FASTMUE_TH +514 0x2CCC //TX_DEREVERB_LF_MU +515 0x3200 //TX_DEREVERB_HF_MU +516 0x0007 //TX_DEREVERB_DELAY +517 0x0004 //TX_DEREVERB_COEF_LEN +518 0x0003 //TX_DEREVERB_DNR +519 0x0000 //TX_DEREVERB_ALPHA +520 0x0000 //TX_DEREVERB_BETA +521 0x3A98 //TX_GSC_RTOL_TH +522 0x3A98 //TX_GSC_RTOH_TH +523 0x7E2C //TX_WIDE2_MEANHTH +524 0x0000 //TX_DR_RESRV_5 +525 0x0000 //TX_DR_RESRV_6 +526 0x0000 //TX_DR_RESRV_7 +527 0x0000 //TX_DR_RESRV_8 +528 0x1333 //TX_WIND_MARK_TH +529 0x399A //TX_CORR_THR +530 0x0004 //TX_SNR_THR +531 0x0010 //TX_ENGY_THR +532 0x1770 //TX_CORR_HIGH_TH +533 0x6000 //TX_ENGY_THR_2 +534 0x3400 //TX_MEAN_RTO_THR +535 0x0028 //TX_WNS_ENOISE_MIC0_TH +536 0x3000 //TX_RATIOMICL_TH +537 0x7FFF //TX_CALIG_HS +538 0x0000 //TX_LVL_CTRL +539 0x0010 //TX_WIND_SUPRTO +540 0x0014 //TX_WNS_MIN_G +541 0x0600 //TX_WNS_B_POST_FLT +542 0x3000 //TX_RATIOMICH_TH +543 0xD120 //TX_WIND_INBEAM_L_TH +544 0x0FA0 //TX_WIND_INBEAM_H_TH +545 0x2000 //TX_WNS_RESRV_0 +546 0x59D8 //TX_WNS_RESRV_1 +547 0x0200 //TX_WNS_RESRV_2 +548 0x0000 //TX_WNS_RESRV_3 +549 0x0000 //TX_WNS_RESRV_4 +550 0x0000 //TX_WNS_RESRV_5 +551 0x0000 //TX_WNS_RESRV_6 +552 0x0000 //TX_PB_B_POST_FLT_LESSCUT +553 0x0070 //TX_BF_LESSCUT_BBIN +554 0x0070 //TX_BF_LESSCUT_EBIN +555 0x0010 //TX_POSTBFB0 +556 0x0070 //TX_POSTBFB +557 0x00B0 //TX_POSTBFE +558 0x0E66 //TX_SPEECH_SNR_TH +559 0x0050 //TX_PB_MAX_PRI_SNR_TH +560 0x770A //TX_MAX_PRI_SNR_TH_L +561 0x0000 //TX_PFGAIN +562 0x0000 //TX_MAINTOREFR_TH +563 0x0000 //TX_SAM_MARK +564 0x0000 //TX_PB_RESRV_0 +565 0x0000 //TX_PB_RESRV_1 +566 0x0030 //TX_FDEQ_SUBNUM +567 0x5C54 //TX_FDEQ_GAIN_0 +568 0x5048 //TX_FDEQ_GAIN_1 +569 0x4C4C //TX_FDEQ_GAIN_2 +570 0x494D //TX_FDEQ_GAIN_3 +571 0x4442 //TX_FDEQ_GAIN_4 +572 0x4448 //TX_FDEQ_GAIN_5 +573 0x4C53 //TX_FDEQ_GAIN_6 +574 0x6244 //TX_FDEQ_GAIN_7 +575 0x4348 //TX_FDEQ_GAIN_8 +576 0x4848 //TX_FDEQ_GAIN_9 +577 0x4A49 //TX_FDEQ_GAIN_10 +578 0x4E4A //TX_FDEQ_GAIN_11 +579 0x4840 //TX_FDEQ_GAIN_12 +580 0x4040 //TX_FDEQ_GAIN_13 +581 0x4054 //TX_FDEQ_GAIN_14 +582 0x687A //TX_FDEQ_GAIN_15 +583 0x4848 //TX_FDEQ_GAIN_16 +584 0x4848 //TX_FDEQ_GAIN_17 +585 0x4848 //TX_FDEQ_GAIN_18 +586 0x4848 //TX_FDEQ_GAIN_19 +587 0x4848 //TX_FDEQ_GAIN_20 +588 0x4848 //TX_FDEQ_GAIN_21 +589 0x4848 //TX_FDEQ_GAIN_22 +590 0x4848 //TX_FDEQ_GAIN_23 +591 0x0202 //TX_FDEQ_BIN_0 +592 0x0104 //TX_FDEQ_BIN_1 +593 0x0502 //TX_FDEQ_BIN_2 +594 0x0202 //TX_FDEQ_BIN_3 +595 0x0504 //TX_FDEQ_BIN_4 +596 0x0708 //TX_FDEQ_BIN_5 +597 0x0808 //TX_FDEQ_BIN_6 +598 0x050E //TX_FDEQ_BIN_7 +599 0x0B0C //TX_FDEQ_BIN_8 +600 0x0F0F //TX_FDEQ_BIN_9 +601 0x0E0D //TX_FDEQ_BIN_10 +602 0x0F28 //TX_FDEQ_BIN_11 +603 0x111B //TX_FDEQ_BIN_12 +604 0x291E //TX_FDEQ_BIN_13 +605 0x1E10 //TX_FDEQ_BIN_14 +606 0x1810 //TX_FDEQ_BIN_15 +607 0x1021 //TX_FDEQ_BIN_16 +608 0x1000 //TX_FDEQ_BIN_17 +609 0x0000 //TX_FDEQ_BIN_18 +610 0x0000 //TX_FDEQ_BIN_19 +611 0x0000 //TX_FDEQ_BIN_20 +612 0x0000 //TX_FDEQ_BIN_21 +613 0x0000 //TX_FDEQ_BIN_22 +614 0x0000 //TX_FDEQ_BIN_23 +615 0x0000 //TX_FDEQ_PADDING +616 0x0030 //TX_PREEQ_SUBNUM_MIC0 +617 0x4848 //TX_PREEQ_GAIN_MIC0_0 +618 0x4848 //TX_PREEQ_GAIN_MIC0_1 +619 0x4848 //TX_PREEQ_GAIN_MIC0_2 +620 0x4848 //TX_PREEQ_GAIN_MIC0_3 +621 0x4848 //TX_PREEQ_GAIN_MIC0_4 +622 0x4848 //TX_PREEQ_GAIN_MIC0_5 +623 0x4848 //TX_PREEQ_GAIN_MIC0_6 +624 0x4848 //TX_PREEQ_GAIN_MIC0_7 +625 0x4848 //TX_PREEQ_GAIN_MIC0_8 +626 0x4848 //TX_PREEQ_GAIN_MIC0_9 +627 0x4848 //TX_PREEQ_GAIN_MIC0_10 +628 0x4848 //TX_PREEQ_GAIN_MIC0_11 +629 0x4848 //TX_PREEQ_GAIN_MIC0_12 +630 0x4848 //TX_PREEQ_GAIN_MIC0_13 +631 0x4848 //TX_PREEQ_GAIN_MIC0_14 +632 0x4848 //TX_PREEQ_GAIN_MIC0_15 +633 0x4848 //TX_PREEQ_GAIN_MIC0_16 +634 0x4848 //TX_PREEQ_GAIN_MIC0_17 +635 0x4848 //TX_PREEQ_GAIN_MIC0_18 +636 0x4848 //TX_PREEQ_GAIN_MIC0_19 +637 0x4848 //TX_PREEQ_GAIN_MIC0_20 +638 0x4848 //TX_PREEQ_GAIN_MIC0_21 +639 0x4848 //TX_PREEQ_GAIN_MIC0_22 +640 0x4848 //TX_PREEQ_GAIN_MIC0_23 +641 0x251A //TX_PREEQ_BIN_MIC0_0 +642 0x0F0F //TX_PREEQ_BIN_MIC0_1 +643 0x0C0C //TX_PREEQ_BIN_MIC0_2 +644 0x0C0F //TX_PREEQ_BIN_MIC0_3 +645 0x0F0F //TX_PREEQ_BIN_MIC0_4 +646 0x0F09 //TX_PREEQ_BIN_MIC0_5 +647 0x0909 //TX_PREEQ_BIN_MIC0_6 +648 0x0908 //TX_PREEQ_BIN_MIC0_7 +649 0x070F //TX_PREEQ_BIN_MIC0_8 +650 0x1F08 //TX_PREEQ_BIN_MIC0_9 +651 0x0808 //TX_PREEQ_BIN_MIC0_10 +652 0x0920 //TX_PREEQ_BIN_MIC0_11 +653 0x2020 //TX_PREEQ_BIN_MIC0_12 +654 0x2021 //TX_PREEQ_BIN_MIC0_13 +655 0x0000 //TX_PREEQ_BIN_MIC0_14 +656 0x0000 //TX_PREEQ_BIN_MIC0_15 +657 0x0000 //TX_PREEQ_BIN_MIC0_16 +658 0x0000 //TX_PREEQ_BIN_MIC0_17 +659 0x0000 //TX_PREEQ_BIN_MIC0_18 +660 0x0000 //TX_PREEQ_BIN_MIC0_19 +661 0x0000 //TX_PREEQ_BIN_MIC0_20 +662 0x0000 //TX_PREEQ_BIN_MIC0_21 +663 0x0000 //TX_PREEQ_BIN_MIC0_22 +664 0x0000 //TX_PREEQ_BIN_MIC0_23 +665 0x0030 //TX_PREEQ_SUBNUM_MIC1 +666 0x4848 //TX_PREEQ_GAIN_MIC1_0 +667 0x4848 //TX_PREEQ_GAIN_MIC1_1 +668 0x4848 //TX_PREEQ_GAIN_MIC1_2 +669 0x4848 //TX_PREEQ_GAIN_MIC1_3 +670 0x4848 //TX_PREEQ_GAIN_MIC1_4 +671 0x4848 //TX_PREEQ_GAIN_MIC1_5 +672 0x494A //TX_PREEQ_GAIN_MIC1_6 +673 0x4B4C //TX_PREEQ_GAIN_MIC1_7 +674 0x4D4E //TX_PREEQ_GAIN_MIC1_8 +675 0x4F52 //TX_PREEQ_GAIN_MIC1_9 +676 0x5355 //TX_PREEQ_GAIN_MIC1_10 +677 0x585C //TX_PREEQ_GAIN_MIC1_11 +678 0x616A //TX_PREEQ_GAIN_MIC1_12 +679 0x726E //TX_PREEQ_GAIN_MIC1_13 +680 0x5C48 //TX_PREEQ_GAIN_MIC1_14 +681 0x3B38 //TX_PREEQ_GAIN_MIC1_15 +682 0x4848 //TX_PREEQ_GAIN_MIC1_16 +683 0x4848 //TX_PREEQ_GAIN_MIC1_17 +684 0x4848 //TX_PREEQ_GAIN_MIC1_18 +685 0x4848 //TX_PREEQ_GAIN_MIC1_19 +686 0x4848 //TX_PREEQ_GAIN_MIC1_20 +687 0x4848 //TX_PREEQ_GAIN_MIC1_21 +688 0x4848 //TX_PREEQ_GAIN_MIC1_22 +689 0x4848 //TX_PREEQ_GAIN_MIC1_23 +690 0x0202 //TX_PREEQ_BIN_MIC1_0 +691 0x0203 //TX_PREEQ_BIN_MIC1_1 +692 0x0303 //TX_PREEQ_BIN_MIC1_2 +693 0x0304 //TX_PREEQ_BIN_MIC1_3 +694 0x0405 //TX_PREEQ_BIN_MIC1_4 +695 0x0506 //TX_PREEQ_BIN_MIC1_5 +696 0x0708 //TX_PREEQ_BIN_MIC1_6 +697 0x090A //TX_PREEQ_BIN_MIC1_7 +698 0x0B0C //TX_PREEQ_BIN_MIC1_8 +699 0x0D0E //TX_PREEQ_BIN_MIC1_9 +700 0x1013 //TX_PREEQ_BIN_MIC1_10 +701 0x1719 //TX_PREEQ_BIN_MIC1_11 +702 0x1B1E //TX_PREEQ_BIN_MIC1_12 +703 0x1E1E //TX_PREEQ_BIN_MIC1_13 +704 0x1E28 //TX_PREEQ_BIN_MIC1_14 +705 0x3042 //TX_PREEQ_BIN_MIC1_15 +706 0x0000 //TX_PREEQ_BIN_MIC1_16 +707 0x0000 //TX_PREEQ_BIN_MIC1_17 +708 0x0000 //TX_PREEQ_BIN_MIC1_18 +709 0x0000 //TX_PREEQ_BIN_MIC1_19 +710 0x0000 //TX_PREEQ_BIN_MIC1_20 +711 0x0000 //TX_PREEQ_BIN_MIC1_21 +712 0x0000 //TX_PREEQ_BIN_MIC1_22 +713 0x0000 //TX_PREEQ_BIN_MIC1_23 +714 0x0030 //TX_PREEQ_SUBNUM_MIC2 +715 0x4848 //TX_PREEQ_GAIN_MIC2_0 +716 0x4848 //TX_PREEQ_GAIN_MIC2_1 +717 0x4848 //TX_PREEQ_GAIN_MIC2_2 +718 0x4848 //TX_PREEQ_GAIN_MIC2_3 +719 0x4848 //TX_PREEQ_GAIN_MIC2_4 +720 0x4848 //TX_PREEQ_GAIN_MIC2_5 +721 0x4848 //TX_PREEQ_GAIN_MIC2_6 +722 0x4848 //TX_PREEQ_GAIN_MIC2_7 +723 0x4848 //TX_PREEQ_GAIN_MIC2_8 +724 0x4848 //TX_PREEQ_GAIN_MIC2_9 +725 0x4848 //TX_PREEQ_GAIN_MIC2_10 +726 0x4848 //TX_PREEQ_GAIN_MIC2_11 +727 0x4848 //TX_PREEQ_GAIN_MIC2_12 +728 0x4848 //TX_PREEQ_GAIN_MIC2_13 +729 0x4848 //TX_PREEQ_GAIN_MIC2_14 +730 0x4848 //TX_PREEQ_GAIN_MIC2_15 +731 0x4848 //TX_PREEQ_GAIN_MIC2_16 +732 0x4848 //TX_PREEQ_GAIN_MIC2_17 +733 0x4848 //TX_PREEQ_GAIN_MIC2_18 +734 0x4848 //TX_PREEQ_GAIN_MIC2_19 +735 0x4848 //TX_PREEQ_GAIN_MIC2_20 +736 0x4848 //TX_PREEQ_GAIN_MIC2_21 +737 0x4848 //TX_PREEQ_GAIN_MIC2_22 +738 0x4848 //TX_PREEQ_GAIN_MIC2_23 +739 0x0608 //TX_PREEQ_BIN_MIC2_0 +740 0x0808 //TX_PREEQ_BIN_MIC2_1 +741 0x0808 //TX_PREEQ_BIN_MIC2_2 +742 0x0808 //TX_PREEQ_BIN_MIC2_3 +743 0x0808 //TX_PREEQ_BIN_MIC2_4 +744 0x0808 //TX_PREEQ_BIN_MIC2_5 +745 0x0808 //TX_PREEQ_BIN_MIC2_6 +746 0x0808 //TX_PREEQ_BIN_MIC2_7 +747 0x0808 //TX_PREEQ_BIN_MIC2_8 +748 0x0808 //TX_PREEQ_BIN_MIC2_9 +749 0x0808 //TX_PREEQ_BIN_MIC2_10 +750 0x0808 //TX_PREEQ_BIN_MIC2_11 +751 0x0808 //TX_PREEQ_BIN_MIC2_12 +752 0x0808 //TX_PREEQ_BIN_MIC2_13 +753 0x0808 //TX_PREEQ_BIN_MIC2_14 +754 0x0200 //TX_PREEQ_BIN_MIC2_15 +755 0x0000 //TX_PREEQ_BIN_MIC2_16 +756 0x0000 //TX_PREEQ_BIN_MIC2_17 +757 0x0000 //TX_PREEQ_BIN_MIC2_18 +758 0x0000 //TX_PREEQ_BIN_MIC2_19 +759 0x0000 //TX_PREEQ_BIN_MIC2_20 +760 0x0000 //TX_PREEQ_BIN_MIC2_21 +761 0x0000 //TX_PREEQ_BIN_MIC2_22 +762 0x0000 //TX_PREEQ_BIN_MIC2_23 +763 0x0006 //TX_MASKING_ABILITY +764 0x0800 //TX_NND_WEIGHT +765 0x0050 //TX_MIC_CALIBRATION_0 +766 0x0056 //TX_MIC_CALIBRATION_1 +767 0x0050 //TX_MIC_CALIBRATION_2 +768 0x0050 //TX_MIC_CALIBRATION_3 +769 0x0046 //TX_MIC_PWR_BIAS_0 +770 0x0042 //TX_MIC_PWR_BIAS_1 +771 0x0046 //TX_MIC_PWR_BIAS_2 +772 0x0046 //TX_MIC_PWR_BIAS_3 +773 0x0000 //TX_GAIN_LIMIT_0 +774 0x0006 //TX_GAIN_LIMIT_1 +775 0x0000 //TX_GAIN_LIMIT_2 +776 0x0000 //TX_GAIN_LIMIT_3 +777 0x7F5B //TX_BVE_NOVAD0_ALPHADOWN +778 0x7FDE //TX_BVE_VAD0_ALPHAUP +779 0x7F3A //TX_BVE_VAD0_ALPHADOWN +780 0x2000 //TX_BVE_GAINWEIGHT_NOFEVADLI +781 0x7F5B //TX_BVE_FEVADLI_ALPHA +782 0x7F19 //TX_BVE_NOVAD0_ALPHAUP +783 0x1000 //TX_TDDRC_ALPHA_UP_01 +784 0x1000 //TX_TDDRC_ALPHA_UP_02 +785 0x1000 //TX_TDDRC_ALPHA_UP_03 +786 0x1000 //TX_TDDRC_ALPHA_UP_04 +787 0x7EB8 //TX_TDDRC_ALPHA_DWN_01 +788 0x7EB8 //TX_TDDRC_ALPHA_DWN_02 +789 0x7EB8 //TX_TDDRC_ALPHA_DWN_03 +790 0x7EB8 //TX_TDDRC_ALPHA_DWN_04 +791 0x7FFF //TX_TDDRC_TD_DRC_LIMIT +792 0x0800 //TX_TDDRC_POST_LIMIT_GAIN +793 0x0000 //TX_TDDRC_RESRV_0 +794 0x0000 //TX_TDDRC_RESRV_1 +795 0x0018 //TX_FDDRC_BAND_MARGIN_0 +796 0x0030 //TX_FDDRC_BAND_MARGIN_1 +797 0x0050 //TX_FDDRC_BAND_MARGIN_2 +798 0x0080 //TX_FDDRC_BAND_MARGIN_3 +799 0x0007 //TX_FDDRC_BLOCK_EXP +800 0x5000 //TX_FDDRC_THRD_2_0 +801 0x5000 //TX_FDDRC_THRD_2_1 +802 0x5000 //TX_FDDRC_THRD_2_2 +803 0x5000 //TX_FDDRC_THRD_2_3 +804 0x6400 //TX_FDDRC_THRD_3_0 +805 0x6400 //TX_FDDRC_THRD_3_1 +806 0x6400 //TX_FDDRC_THRD_3_2 +807 0x6400 //TX_FDDRC_THRD_3_3 +808 0x2000 //TX_FDDRC_SLANT_0_0 +809 0x2000 //TX_FDDRC_SLANT_0_1 +810 0x2000 //TX_FDDRC_SLANT_0_2 +811 0x2000 //TX_FDDRC_SLANT_0_3 +812 0x5333 //TX_FDDRC_SLANT_1_0 +813 0x5333 //TX_FDDRC_SLANT_1_1 +814 0x5333 //TX_FDDRC_SLANT_1_2 +815 0x5333 //TX_FDDRC_SLANT_1_3 +816 0x0010 //TX_DEADMIC_SILENCE_TH +817 0x0600 //TX_MIC_DEGRADE_TH +818 0x0078 //TX_DEADMIC_CNT +819 0x0078 //TX_MIC_DEGRADE_CNT +820 0x0000 //TX_FDDRC_RESRV_4 +821 0x0000 //TX_FDDRC_RESRV_5 +822 0x0000 //TX_FDDRC_RESRV_6 +823 0x7FFF //TX_KS_NOISEPASTE_FACTOR +824 0x0001 //TX_KS_CONFIG +825 0x7FFF //TX_KS_GAIN_MIN +826 0x0000 //TX_KS_RESRV_0 +827 0x0000 //TX_KS_RESRV_1 +828 0x0000 //TX_KS_RESRV_2 +829 0x7C00 //TX_LAMBDA_PKA_FP +830 0x2000 //TX_TPKA_FP +831 0x0080 //TX_MIN_G_FP +832 0x2000 //TX_MAX_G_FP +833 0x0FA0 //TX_FFP_FP_K_METAL +834 0x4000 //TX_A_POST_FLT_FP +835 0x0F5C //TX_RTO_OUTBEAM_TH +836 0x4CCD //TX_TPKA_FP_THD +837 0x0000 //TX_MAX_G_FP_BLK +838 0x0000 //TX_FFP_FADEIN +839 0x0000 //TX_FFP_FADEOUT +840 0x0000 //TX_WHISPERCTH +841 0x0000 //TX_WHISPERHOLDT +842 0x0000 //TX_WHISP_ENTHH +843 0x0000 //TX_WHISP_ENTHL +844 0x0000 //TX_WHISP_RTOTH +845 0x0000 //TX_WHISP_RTOTH2 +846 0x0096 //TX_MUTE_PERIOD +847 0x0000 //TX_FADE_IN_PERIOD +848 0x0100 //TX_FFP_RESRV_2 +849 0x0020 //TX_FFP_RESRV_3 +850 0x0000 //TX_FFP_RESRV_4 +851 0x0000 //TX_FFP_RESRV_5 +852 0x0000 //TX_FFP_RESRV_6 +853 0x0002 //TX_FILTINDX +854 0x0002 //TX_TDDRC_THRD_0 +855 0x0003 //TX_TDDRC_THRD_1 +856 0x1500 //TX_TDDRC_THRD_2 +857 0x1500 //TX_TDDRC_THRD_3 +858 0x3000 //TX_TDDRC_SLANT_0 +859 0x6E00 //TX_TDDRC_SLANT_1 +860 0x1000 //TX_TDDRC_ALPHA_UP_00 +861 0x7EB8 //TX_TDDRC_ALPHA_DWN_00 +862 0x0000 //TX_TDDRC_HMNC_FLAG +863 0x199A //TX_TDDRC_HMNC_GAIN +864 0x0000 //TX_TDDRC_SMT_FLAG +865 0x0CCD //TX_TDDRC_SMT_W +866 0x0650 //TX_TDDRC_DRC_GAIN +867 0x7FFF //TX_TDDRC_LMT_THRD +868 0x0000 //TX_TDDRC_LMT_ALPHA +869 0x0000 //TX_TFMASKLTH +870 0x0000 //TX_TFMASKLTHL +871 0x0CCD //TX_TFMASKHTH +872 0xECCD //TX_TFMASKLTH_BINVAD +873 0xFCCD //TX_TFMASKLTH_NS_EST +874 0xF800 //TX_TFMASKLTH_DOA +875 0x0CCD //TX_TFMASKTH_BLESSCUT +876 0x1000 //TX_B_LESSCUT_RTO_MASK +877 0x2000 //TX_SB_RHO_MEAN_TH_ABN +878 0x2000 //TX_B_POST_FLT_MASK +879 0x0000 //TX_B_POST_FLT_MASK1 +880 0x6333 //TX_GAIN_WIND_MASK +881 0x0000 //TX_TFMASK_BFSTRICT_MUSIC +882 0x0000 //TX_TFMASK_BFSTRICT_NOMUSIC +883 0x7333 //TX_FASTNS_OUTIN_TH +884 0x0CCD //TX_FASTNS_TFMASK_TH +885 0x0CCD //TX_FASTNS_TFMASKBIN_TH1 +886 0x0CCD //TX_FASTNS_TFMASKBIN_TH2 +887 0x0CCD //TX_FASTNS_TFMASKBIN_TH3 +888 0x0028 //TX_FASTNS_ARSPC_TH +889 0xC000 //TX_FASTNS_MASK5_TH +890 0x0810 //TX_POSTSSA_MIN_G_VR_MASK +891 0x1000 //TX_A_LESSCUT_RTO_MASK +892 0x1770 //TX_FASTNS_NOISETH +893 0xC000 //TX_FASTNS_SSA_THLFL +894 0xC000 //TX_FASTNS_SSA_THHFL +895 0xCCCC //TX_FASTNS_SSA_THLFH +896 0xD999 //TX_FASTNS_SSA_THHFH +897 0x2339 //TX_SENDFUNC_REG_MICMUTE +898 0x0021 //TX_SENDFUNC_REG_MICMUTE1 +899 0x02BC //TX_MICMUTE_RATIO_THR +900 0x0140 //TX_MICMUTE_AMP_THR +901 0x0004 //TX_MICMUTE_HPF_IND +902 0x00C0 //TX_MICMUTE_LOG_EYR_TH +903 0x0008 //TX_MICMUTE_CVG_TIME +904 0x0008 //TX_MICMUTE_RELEASE_TIME +905 0x01FE //TX_MIC_VOLUME_MIC0MUTE +906 0x0020 //TX_MICMUTE_EPD_OFFSET_0 +907 0x001E //TX_MICMUTE_FRQ_AEC_L +908 0x7999 //TX_MICMUTE_EAD_THR +909 0x7FFF //TX_MICMUTE_LAMBDA_CB_NLE +910 0x7FFF //TX_MICMUTE_LAMBDA_RE_EST +911 0x4000 //TX_DTD_THR1_MICMUTE_0 +912 0x7000 //TX_DTD_THR1_MICMUTE_1 +913 0x7FFF //TX_DTD_THR1_MICMUTE_2 +914 0x7FFF //TX_DTD_THR1_MICMUTE_3 +915 0x6CCC //TX_DTD_THR2_MICMUTE_0 +916 0x0400 //TX_MICMUTE_MIN_EQ_RE_EST_0 +917 0x0400 //TX_MICMUTE_MIN_EQ_RE_EST_1 +918 0x1000 //TX_MICMUTE_MIN_EQ_RE_EST_2 +919 0x7FFF //TX_MICMUTE_MIN_EQ_RE_EST_3 +920 0x7FFF //TX_MICMUTE_MIN_EQ_RE_EST_4 +921 0x4000 //TX_MICMUTE_C_POST_FLT +922 0x03E8 //TX_MICMUTE_DT_CUT_K +923 0x0001 //TX_MICMUTE_DT_CUT_THR +924 0x03E8 //TX_MICMUTE_DT_CUT_K2 +925 0x0001 //TX_MICMUTE_DT_CUT_THR2 +926 0x0064 //TX_MICMUTE_DT2_HOLD_N +927 0x1000 //TX_MICMUTE_RATIODTH_THCUT +928 0x1000 //TX_MICMUTE_B_POST_FLT_ECHOL +929 0x7FFF //TX_MICMUTE_B_POST_FLT_ECHOH +930 0x0400 //TX_MICMUTE_C_POST_FLT_MASK +931 0x7999 //TX_MICMUTE_RATIODTL_CUT_TH +932 0x0258 //TX_MICMUTE_DT_CUT_K1 +933 0x0800 //TX_MICMUTE_N2_SN_EST +934 0xFC00 //TX_MICMUTE_THR_SN_EST_0 +935 0x001C //TX_MICMUTE_MIN_G_CTRL_0 +936 0x6000 //TX_MICMUTE_A_POST_FILT_S_0 +937 0x7000 //TX_MICMUTE_B_POST_FILT_0 +938 0x2710 //TX_MIC1RUB_AMP_THR +939 0x0010 //TX_MIC1MUTE_RATIO_THR +940 0x0450 //TX_MIC1MUTE_AMP_THR +941 0x0008 //TX_MIC1MUTE_CVG_TIME +942 0x0008 //TX_MIC1MUTE_RELEASE_TIME +943 0x0000 //TX_AMS_RESRV_01 +944 0x0000 //TX_AMS_RESRV_02 +945 0x0000 //TX_AMS_RESRV_03 +946 0x0000 //TX_AMS_RESRV_04 +947 0x0000 //TX_AMS_RESRV_05 +948 0x0000 //TX_AMS_RESRV_06 +949 0x0000 //TX_AMS_RESRV_07 +950 0x0000 //TX_AMS_RESRV_08 +951 0x0000 //TX_AMS_RESRV_09 +952 0x0000 //TX_AMS_RESRV_10 +953 0x0000 //TX_AMS_RESRV_11 +954 0x0000 //TX_AMS_RESRV_12 +955 0x0000 //TX_AMS_RESRV_13 +956 0x0000 //TX_AMS_RESRV_14 +957 0x0000 //TX_AMS_RESRV_15 +958 0x0000 //TX_AMS_RESRV_16 +959 0x0000 //TX_AMS_RESRV_17 +960 0x0000 //TX_AMS_RESRV_18 +961 0x0000 //TX_AMS_RESRV_19 +#RX +0 0x203C //RX_RECVFUNC_MODE_0 +1 0x0000 //RX_RECVFUNC_MODE_1 +2 0x0003 //RX_SAMPLINGFREQ_SIG +3 0x0003 //RX_SAMPLINGFREQ_PROC +4 0x000A //RX_FRAME_SZ +5 0x0000 //RX_DELAY_OPT +6 0x1000 //RX_TDDRC_ALPHA_UP_1 +7 0x1000 //RX_TDDRC_ALPHA_UP_2 +8 0x1000 //RX_TDDRC_ALPHA_UP_3 +9 0x1000 //RX_TDDRC_ALPHA_UP_4 +10 0x05AA //RX_PGA +11 0x7FFF //RX_A_HP +12 0x4000 //RX_B_PE +13 0x5800 //RX_THR_PITCH_DET_0 +14 0x5000 //RX_THR_PITCH_DET_1 +15 0x4000 //RX_THR_PITCH_DET_2 +16 0x0008 //RX_PITCH_BFR_LEN +17 0x0003 //RX_SBD_PITCH_DET +18 0x0100 //RX_PP_RESRV_0 +19 0x0020 //RX_PP_RESRV_1 +20 0x0600 //RX_N_SN_EST +21 0x000C //RX_N2_SN_EST +22 0x000F //RX_NS_LVL_CTRL +23 0xF800 //RX_THR_SN_EST +24 0x7E00 //RX_LAMBDA_PFILT +25 0x000A //RX_FENS_RESRV_0 +26 0x0190 //RX_FENS_RESRV_1 +27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +30 0x0002 //RX_EXTRA_NS_L +31 0x0800 //RX_EXTRA_NS_A +32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +33 0x7000 //RX_TDDRC_LIMITER_THRD +34 0x0800 //RX_TDDRC_LIMITER_GAIN +35 0x199A //RX_A_POST_FLT +36 0x0000 //RX_LMT_THRD +37 0x4000 //RX_LMT_ALPHA +38 0x0020 //RX_FDEQ_SUBNUM +39 0x483E //RX_FDEQ_GAIN_0 +40 0x3E3E //RX_FDEQ_GAIN_1 +41 0x3E4C //RX_FDEQ_GAIN_2 +42 0x5064 //RX_FDEQ_GAIN_3 +43 0x7076 //RX_FDEQ_GAIN_4 +44 0x897A //RX_FDEQ_GAIN_5 +45 0x7C80 //RX_FDEQ_GAIN_6 +46 0x8888 //RX_FDEQ_GAIN_7 +47 0x949C //RX_FDEQ_GAIN_8 +48 0x96A4 //RX_FDEQ_GAIN_9 +49 0xA9A0 //RX_FDEQ_GAIN_10 +50 0x9487 //RX_FDEQ_GAIN_11 +51 0x6F64 //RX_FDEQ_GAIN_12 +52 0x625A //RX_FDEQ_GAIN_13 +53 0x5D80 //RX_FDEQ_GAIN_14 +54 0x8890 //RX_FDEQ_GAIN_15 +55 0x4848 //RX_FDEQ_GAIN_16 +56 0x4848 //RX_FDEQ_GAIN_17 +57 0x4848 //RX_FDEQ_GAIN_18 +58 0x4848 //RX_FDEQ_GAIN_19 +59 0x4848 //RX_FDEQ_GAIN_20 +60 0x4848 //RX_FDEQ_GAIN_21 +61 0x4848 //RX_FDEQ_GAIN_22 +62 0x4848 //RX_FDEQ_GAIN_23 +63 0x0202 //RX_FDEQ_BIN_0 +64 0x0202 //RX_FDEQ_BIN_1 +65 0x0301 //RX_FDEQ_BIN_2 +66 0x0404 //RX_FDEQ_BIN_3 +67 0x0406 //RX_FDEQ_BIN_4 +68 0x0109 //RX_FDEQ_BIN_5 +69 0x0708 //RX_FDEQ_BIN_6 +70 0x090A //RX_FDEQ_BIN_7 +71 0x0B0C //RX_FDEQ_BIN_8 +72 0x0D0E //RX_FDEQ_BIN_9 +73 0x1013 //RX_FDEQ_BIN_10 +74 0x1719 //RX_FDEQ_BIN_11 +75 0x1B0F //RX_FDEQ_BIN_12 +76 0x141E //RX_FDEQ_BIN_13 +77 0x3728 //RX_FDEQ_BIN_14 +78 0x282C //RX_FDEQ_BIN_15 +79 0x0000 //RX_FDEQ_BIN_16 +80 0x0000 //RX_FDEQ_BIN_17 +81 0x0000 //RX_FDEQ_BIN_18 +82 0x0000 //RX_FDEQ_BIN_19 +83 0x0000 //RX_FDEQ_BIN_20 +84 0x0000 //RX_FDEQ_BIN_21 +85 0x0000 //RX_FDEQ_BIN_22 +86 0x0000 //RX_FDEQ_BIN_23 +87 0x4000 //RX_FDEQ_RESRV_0 +88 0x0320 //RX_FDEQ_RESRV_1 +89 0x0018 //RX_FDDRC_BAND_MARGIN_0 +90 0x0030 //RX_FDDRC_BAND_MARGIN_1 +91 0x0050 //RX_FDDRC_BAND_MARGIN_2 +92 0x0080 //RX_FDDRC_BAND_MARGIN_3 +93 0x0007 //RX_FDDRC_BLOCK_EXP +94 0x5000 //RX_FDDRC_THRD_2_0 +95 0x5000 //RX_FDDRC_THRD_2_1 +96 0x5000 //RX_FDDRC_THRD_2_2 +97 0x5000 //RX_FDDRC_THRD_2_3 +98 0x6400 //RX_FDDRC_THRD_3_0 +99 0x6400 //RX_FDDRC_THRD_3_1 +100 0x6400 //RX_FDDRC_THRD_3_2 +101 0x6400 //RX_FDDRC_THRD_3_3 +102 0x2000 //RX_FDDRC_SLANT_0_0 +103 0x2000 //RX_FDDRC_SLANT_0_1 +104 0x2000 //RX_FDDRC_SLANT_0_2 +105 0x2000 //RX_FDDRC_SLANT_0_3 +106 0x5333 //RX_FDDRC_SLANT_1_0 +107 0x5333 //RX_FDDRC_SLANT_1_1 +108 0x5333 //RX_FDDRC_SLANT_1_2 +109 0x5333 //RX_FDDRC_SLANT_1_3 +110 0x0000 //RX_FDDRC_RESRV_0 +111 0x0002 //RX_FILTINDX +112 0x0001 //RX_TDDRC_THRD_0 +113 0x0002 //RX_TDDRC_THRD_1 +114 0x1800 //RX_TDDRC_THRD_2 +115 0x1800 //RX_TDDRC_THRD_3 +116 0x7FFF //RX_TDDRC_SLANT_0 +117 0x7FFF //RX_TDDRC_SLANT_1 +118 0x1000 //RX_TDDRC_ALPHA_UP_0 +119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +120 0x0000 //RX_TDDRC_HMNC_FLAG +121 0x199A //RX_TDDRC_HMNC_GAIN +122 0x0001 //RX_TDDRC_SMT_FLAG +123 0x0CCD //RX_TDDRC_SMT_W +124 0x0551 //RX_TDDRC_DRC_GAIN +125 0x7C00 //RX_LAMBDA_PKA_FP +126 0x13E0 //RX_TPKA_FP +127 0x0080 //RX_MIN_G_FP +128 0x2000 //RX_MAX_G_FP +129 0x0100 //RX_SPK_VOL +130 0x0000 //RX_VOL_RESRV_0 +131 0x0000 //RX_MAXLEVEL_CNG +132 0x3000 //RX_BWE_UV_TH +133 0x3000 //RX_BWE_UV_TH2 +134 0x1800 //RX_BWE_UV_TH3 +135 0x1000 //RX_BWE_V_TH +136 0x04CD //RX_BWE_GAIN1_V_TH1 +137 0x0F33 //RX_BWE_GAIN1_V_TH2 +138 0x7333 //RX_BWE_UV_EQ +139 0x199A //RX_BWE_V_EQ +140 0x7333 //RX_BWE_TONE_TH +141 0x0004 //RX_BWE_UV_HOLD_T +142 0x6CCD //RX_BWE_GAIN2_ALPHA +143 0x799A //RX_BWE_GAIN3_ALPHA +144 0x001E //RX_BWE_CUTOFF +145 0x3000 //RX_BWE_GAINFILL +146 0x3200 //RX_BWE_MAXTH_TONE +147 0x2000 //RX_BWE_EQ_0 +148 0x2000 //RX_BWE_EQ_1 +149 0x2000 //RX_BWE_EQ_2 +150 0x2000 //RX_BWE_EQ_3 +151 0x2000 //RX_BWE_EQ_4 +152 0x2000 //RX_BWE_EQ_5 +153 0x2000 //RX_BWE_EQ_6 +154 0x0000 //RX_BWE_RESRV_0 +155 0x0000 //RX_BWE_RESRV_1 +156 0x0000 //RX_BWE_RESRV_2 +#VOL 0 +6 0x1000 //RX_TDDRC_ALPHA_UP_1 +7 0x1000 //RX_TDDRC_ALPHA_UP_2 +8 0x1000 //RX_TDDRC_ALPHA_UP_3 +9 0x1000 //RX_TDDRC_ALPHA_UP_4 +27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +33 0x7000 //RX_TDDRC_LIMITER_THRD +34 0x0800 //RX_TDDRC_LIMITER_GAIN +112 0x0001 //RX_TDDRC_THRD_0 +113 0x0002 //RX_TDDRC_THRD_1 +114 0x1800 //RX_TDDRC_THRD_2 +115 0x1800 //RX_TDDRC_THRD_3 +116 0x7FFF //RX_TDDRC_SLANT_0 +117 0x7FFF //RX_TDDRC_SLANT_1 +118 0x1000 //RX_TDDRC_ALPHA_UP_0 +119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +120 0x0000 //RX_TDDRC_HMNC_FLAG +121 0x199A //RX_TDDRC_HMNC_GAIN +122 0x0001 //RX_TDDRC_SMT_FLAG +123 0x0CCD //RX_TDDRC_SMT_W +124 0x056F //RX_TDDRC_DRC_GAIN +38 0x0020 //RX_FDEQ_SUBNUM +39 0x483E //RX_FDEQ_GAIN_0 +40 0x3E3E //RX_FDEQ_GAIN_1 +41 0x3E4C //RX_FDEQ_GAIN_2 +42 0x586E //RX_FDEQ_GAIN_3 +43 0x8496 //RX_FDEQ_GAIN_4 +44 0x968E //RX_FDEQ_GAIN_5 +45 0x8488 //RX_FDEQ_GAIN_6 +46 0x8884 //RX_FDEQ_GAIN_7 +47 0x9CA4 //RX_FDEQ_GAIN_8 +48 0x98A8 //RX_FDEQ_GAIN_9 +49 0xBEB8 //RX_FDEQ_GAIN_10 +50 0x918D //RX_FDEQ_GAIN_11 +51 0x7566 //RX_FDEQ_GAIN_12 +52 0x6460 //RX_FDEQ_GAIN_13 +53 0x6174 //RX_FDEQ_GAIN_14 +54 0x7890 //RX_FDEQ_GAIN_15 +55 0x4848 //RX_FDEQ_GAIN_16 +56 0x4848 //RX_FDEQ_GAIN_17 +57 0x4848 //RX_FDEQ_GAIN_18 +58 0x4848 //RX_FDEQ_GAIN_19 +59 0x4848 //RX_FDEQ_GAIN_20 +60 0x4848 //RX_FDEQ_GAIN_21 +61 0x4848 //RX_FDEQ_GAIN_22 +62 0x4848 //RX_FDEQ_GAIN_23 +63 0x0202 //RX_FDEQ_BIN_0 +64 0x0202 //RX_FDEQ_BIN_1 +65 0x0301 //RX_FDEQ_BIN_2 +66 0x0404 //RX_FDEQ_BIN_3 +67 0x0406 //RX_FDEQ_BIN_4 +68 0x0109 //RX_FDEQ_BIN_5 +69 0x0708 //RX_FDEQ_BIN_6 +70 0x090A //RX_FDEQ_BIN_7 +71 0x0B0C //RX_FDEQ_BIN_8 +72 0x0D09 //RX_FDEQ_BIN_9 +73 0x0819 //RX_FDEQ_BIN_10 +74 0x1E19 //RX_FDEQ_BIN_11 +75 0x1B0F //RX_FDEQ_BIN_12 +76 0x141E //RX_FDEQ_BIN_13 +77 0x3728 //RX_FDEQ_BIN_14 +78 0x282C //RX_FDEQ_BIN_15 +79 0x0000 //RX_FDEQ_BIN_16 +80 0x0000 //RX_FDEQ_BIN_17 +81 0x0000 //RX_FDEQ_BIN_18 +82 0x0000 //RX_FDEQ_BIN_19 +83 0x0000 //RX_FDEQ_BIN_20 +84 0x0000 //RX_FDEQ_BIN_21 +85 0x0000 //RX_FDEQ_BIN_22 +86 0x0000 //RX_FDEQ_BIN_23 +87 0x4000 //RX_FDEQ_RESRV_0 +88 0x0320 //RX_FDEQ_RESRV_1 +89 0x0018 //RX_FDDRC_BAND_MARGIN_0 +90 0x0030 //RX_FDDRC_BAND_MARGIN_1 +91 0x0050 //RX_FDDRC_BAND_MARGIN_2 +92 0x0080 //RX_FDDRC_BAND_MARGIN_3 +93 0x0007 //RX_FDDRC_BLOCK_EXP +94 0x5000 //RX_FDDRC_THRD_2_0 +95 0x5000 //RX_FDDRC_THRD_2_1 +96 0x5000 //RX_FDDRC_THRD_2_2 +97 0x5000 //RX_FDDRC_THRD_2_3 +98 0x6400 //RX_FDDRC_THRD_3_0 +99 0x6400 //RX_FDDRC_THRD_3_1 +100 0x6400 //RX_FDDRC_THRD_3_2 +101 0x6400 //RX_FDDRC_THRD_3_3 +102 0x2000 //RX_FDDRC_SLANT_0_0 +103 0x2000 //RX_FDDRC_SLANT_0_1 +104 0x2000 //RX_FDDRC_SLANT_0_2 +105 0x2000 //RX_FDDRC_SLANT_0_3 +106 0x5333 //RX_FDDRC_SLANT_1_0 +107 0x5333 //RX_FDDRC_SLANT_1_1 +108 0x5333 //RX_FDDRC_SLANT_1_2 +109 0x5333 //RX_FDDRC_SLANT_1_3 +110 0x0000 //RX_FDDRC_RESRV_0 +129 0x000A //RX_SPK_VOL +130 0x0000 //RX_VOL_RESRV_0 +#VOL 1 +6 0x1000 //RX_TDDRC_ALPHA_UP_1 +7 0x1000 //RX_TDDRC_ALPHA_UP_2 +8 0x1000 //RX_TDDRC_ALPHA_UP_3 +9 0x1000 //RX_TDDRC_ALPHA_UP_4 +27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +33 0x7000 //RX_TDDRC_LIMITER_THRD +34 0x0800 //RX_TDDRC_LIMITER_GAIN +112 0x0001 //RX_TDDRC_THRD_0 +113 0x0002 //RX_TDDRC_THRD_1 +114 0x1800 //RX_TDDRC_THRD_2 +115 0x1800 //RX_TDDRC_THRD_3 +116 0x7FFF //RX_TDDRC_SLANT_0 +117 0x7FFF //RX_TDDRC_SLANT_1 +118 0x1000 //RX_TDDRC_ALPHA_UP_0 +119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +120 0x0000 //RX_TDDRC_HMNC_FLAG +121 0x199A //RX_TDDRC_HMNC_GAIN +122 0x0001 //RX_TDDRC_SMT_FLAG +123 0x0CCD //RX_TDDRC_SMT_W +124 0x056F //RX_TDDRC_DRC_GAIN +38 0x0020 //RX_FDEQ_SUBNUM +39 0x483E //RX_FDEQ_GAIN_0 +40 0x3E3E //RX_FDEQ_GAIN_1 +41 0x3E4C //RX_FDEQ_GAIN_2 +42 0x586E //RX_FDEQ_GAIN_3 +43 0x8496 //RX_FDEQ_GAIN_4 +44 0x968E //RX_FDEQ_GAIN_5 +45 0x8488 //RX_FDEQ_GAIN_6 +46 0x8884 //RX_FDEQ_GAIN_7 +47 0x9CA4 //RX_FDEQ_GAIN_8 +48 0x98A8 //RX_FDEQ_GAIN_9 +49 0xBEB8 //RX_FDEQ_GAIN_10 +50 0x918D //RX_FDEQ_GAIN_11 +51 0x7566 //RX_FDEQ_GAIN_12 +52 0x6460 //RX_FDEQ_GAIN_13 +53 0x6174 //RX_FDEQ_GAIN_14 +54 0x7890 //RX_FDEQ_GAIN_15 +55 0x4848 //RX_FDEQ_GAIN_16 +56 0x4848 //RX_FDEQ_GAIN_17 +57 0x4848 //RX_FDEQ_GAIN_18 +58 0x4848 //RX_FDEQ_GAIN_19 +59 0x4848 //RX_FDEQ_GAIN_20 +60 0x4848 //RX_FDEQ_GAIN_21 +61 0x4848 //RX_FDEQ_GAIN_22 +62 0x4848 //RX_FDEQ_GAIN_23 +63 0x0202 //RX_FDEQ_BIN_0 +64 0x0202 //RX_FDEQ_BIN_1 +65 0x0301 //RX_FDEQ_BIN_2 +66 0x0404 //RX_FDEQ_BIN_3 +67 0x0406 //RX_FDEQ_BIN_4 +68 0x0109 //RX_FDEQ_BIN_5 +69 0x0708 //RX_FDEQ_BIN_6 +70 0x090A //RX_FDEQ_BIN_7 +71 0x0B0C //RX_FDEQ_BIN_8 +72 0x0D09 //RX_FDEQ_BIN_9 +73 0x0819 //RX_FDEQ_BIN_10 +74 0x1E19 //RX_FDEQ_BIN_11 +75 0x1B0F //RX_FDEQ_BIN_12 +76 0x141E //RX_FDEQ_BIN_13 +77 0x3728 //RX_FDEQ_BIN_14 +78 0x282C //RX_FDEQ_BIN_15 +79 0x0000 //RX_FDEQ_BIN_16 +80 0x0000 //RX_FDEQ_BIN_17 +81 0x0000 //RX_FDEQ_BIN_18 +82 0x0000 //RX_FDEQ_BIN_19 +83 0x0000 //RX_FDEQ_BIN_20 +84 0x0000 //RX_FDEQ_BIN_21 +85 0x0000 //RX_FDEQ_BIN_22 +86 0x0000 //RX_FDEQ_BIN_23 +87 0x4000 //RX_FDEQ_RESRV_0 +88 0x0320 //RX_FDEQ_RESRV_1 +89 0x0018 //RX_FDDRC_BAND_MARGIN_0 +90 0x0030 //RX_FDDRC_BAND_MARGIN_1 +91 0x0050 //RX_FDDRC_BAND_MARGIN_2 +92 0x0080 //RX_FDDRC_BAND_MARGIN_3 +93 0x0007 //RX_FDDRC_BLOCK_EXP +94 0x5000 //RX_FDDRC_THRD_2_0 +95 0x5000 //RX_FDDRC_THRD_2_1 +96 0x5000 //RX_FDDRC_THRD_2_2 +97 0x5000 //RX_FDDRC_THRD_2_3 +98 0x6400 //RX_FDDRC_THRD_3_0 +99 0x6400 //RX_FDDRC_THRD_3_1 +100 0x6400 //RX_FDDRC_THRD_3_2 +101 0x6400 //RX_FDDRC_THRD_3_3 +102 0x2000 //RX_FDDRC_SLANT_0_0 +103 0x2000 //RX_FDDRC_SLANT_0_1 +104 0x2000 //RX_FDDRC_SLANT_0_2 +105 0x2000 //RX_FDDRC_SLANT_0_3 +106 0x5333 //RX_FDDRC_SLANT_1_0 +107 0x5333 //RX_FDDRC_SLANT_1_1 +108 0x5333 //RX_FDDRC_SLANT_1_2 +109 0x5333 //RX_FDDRC_SLANT_1_3 +110 0x0000 //RX_FDDRC_RESRV_0 +129 0x0010 //RX_SPK_VOL +130 0x0000 //RX_VOL_RESRV_0 +#VOL 2 +6 0x1000 //RX_TDDRC_ALPHA_UP_1 +7 0x1000 //RX_TDDRC_ALPHA_UP_2 +8 0x1000 //RX_TDDRC_ALPHA_UP_3 +9 0x1000 //RX_TDDRC_ALPHA_UP_4 +27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +33 0x7000 //RX_TDDRC_LIMITER_THRD +34 0x0800 //RX_TDDRC_LIMITER_GAIN +112 0x0001 //RX_TDDRC_THRD_0 +113 0x0002 //RX_TDDRC_THRD_1 +114 0x1800 //RX_TDDRC_THRD_2 +115 0x1800 //RX_TDDRC_THRD_3 +116 0x7FFF //RX_TDDRC_SLANT_0 +117 0x7FFF //RX_TDDRC_SLANT_1 +118 0x1000 //RX_TDDRC_ALPHA_UP_0 +119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +120 0x0000 //RX_TDDRC_HMNC_FLAG +121 0x199A //RX_TDDRC_HMNC_GAIN +122 0x0001 //RX_TDDRC_SMT_FLAG +123 0x0CCD //RX_TDDRC_SMT_W +124 0x056F //RX_TDDRC_DRC_GAIN +38 0x0020 //RX_FDEQ_SUBNUM +39 0x483E //RX_FDEQ_GAIN_0 +40 0x3E3E //RX_FDEQ_GAIN_1 +41 0x3E4C //RX_FDEQ_GAIN_2 +42 0x586E //RX_FDEQ_GAIN_3 +43 0x8496 //RX_FDEQ_GAIN_4 +44 0x968E //RX_FDEQ_GAIN_5 +45 0x8488 //RX_FDEQ_GAIN_6 +46 0x8884 //RX_FDEQ_GAIN_7 +47 0x9CA4 //RX_FDEQ_GAIN_8 +48 0x98A8 //RX_FDEQ_GAIN_9 +49 0xBEB8 //RX_FDEQ_GAIN_10 +50 0x918D //RX_FDEQ_GAIN_11 +51 0x7566 //RX_FDEQ_GAIN_12 +52 0x6460 //RX_FDEQ_GAIN_13 +53 0x6174 //RX_FDEQ_GAIN_14 +54 0x7890 //RX_FDEQ_GAIN_15 +55 0x4848 //RX_FDEQ_GAIN_16 +56 0x4848 //RX_FDEQ_GAIN_17 +57 0x4848 //RX_FDEQ_GAIN_18 +58 0x4848 //RX_FDEQ_GAIN_19 +59 0x4848 //RX_FDEQ_GAIN_20 +60 0x4848 //RX_FDEQ_GAIN_21 +61 0x4848 //RX_FDEQ_GAIN_22 +62 0x4848 //RX_FDEQ_GAIN_23 +63 0x0202 //RX_FDEQ_BIN_0 +64 0x0202 //RX_FDEQ_BIN_1 +65 0x0301 //RX_FDEQ_BIN_2 +66 0x0404 //RX_FDEQ_BIN_3 +67 0x0406 //RX_FDEQ_BIN_4 +68 0x0109 //RX_FDEQ_BIN_5 +69 0x0708 //RX_FDEQ_BIN_6 +70 0x090A //RX_FDEQ_BIN_7 +71 0x0B0C //RX_FDEQ_BIN_8 +72 0x0D09 //RX_FDEQ_BIN_9 +73 0x0819 //RX_FDEQ_BIN_10 +74 0x1E19 //RX_FDEQ_BIN_11 +75 0x1B0F //RX_FDEQ_BIN_12 +76 0x141E //RX_FDEQ_BIN_13 +77 0x3728 //RX_FDEQ_BIN_14 +78 0x282C //RX_FDEQ_BIN_15 +79 0x0000 //RX_FDEQ_BIN_16 +80 0x0000 //RX_FDEQ_BIN_17 +81 0x0000 //RX_FDEQ_BIN_18 +82 0x0000 //RX_FDEQ_BIN_19 +83 0x0000 //RX_FDEQ_BIN_20 +84 0x0000 //RX_FDEQ_BIN_21 +85 0x0000 //RX_FDEQ_BIN_22 +86 0x0000 //RX_FDEQ_BIN_23 +87 0x4000 //RX_FDEQ_RESRV_0 +88 0x0320 //RX_FDEQ_RESRV_1 +89 0x0018 //RX_FDDRC_BAND_MARGIN_0 +90 0x0030 //RX_FDDRC_BAND_MARGIN_1 +91 0x0050 //RX_FDDRC_BAND_MARGIN_2 +92 0x0080 //RX_FDDRC_BAND_MARGIN_3 +93 0x0007 //RX_FDDRC_BLOCK_EXP +94 0x5000 //RX_FDDRC_THRD_2_0 +95 0x5000 //RX_FDDRC_THRD_2_1 +96 0x5000 //RX_FDDRC_THRD_2_2 +97 0x5000 //RX_FDDRC_THRD_2_3 +98 0x6400 //RX_FDDRC_THRD_3_0 +99 0x6400 //RX_FDDRC_THRD_3_1 +100 0x6400 //RX_FDDRC_THRD_3_2 +101 0x6400 //RX_FDDRC_THRD_3_3 +102 0x2000 //RX_FDDRC_SLANT_0_0 +103 0x2000 //RX_FDDRC_SLANT_0_1 +104 0x2000 //RX_FDDRC_SLANT_0_2 +105 0x2000 //RX_FDDRC_SLANT_0_3 +106 0x5333 //RX_FDDRC_SLANT_1_0 +107 0x5333 //RX_FDDRC_SLANT_1_1 +108 0x5333 //RX_FDDRC_SLANT_1_2 +109 0x5333 //RX_FDDRC_SLANT_1_3 +110 0x0000 //RX_FDDRC_RESRV_0 +129 0x001B //RX_SPK_VOL +130 0x0000 //RX_VOL_RESRV_0 +#VOL 3 +6 0x1000 //RX_TDDRC_ALPHA_UP_1 +7 0x1000 //RX_TDDRC_ALPHA_UP_2 +8 0x1000 //RX_TDDRC_ALPHA_UP_3 +9 0x1000 //RX_TDDRC_ALPHA_UP_4 +27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +33 0x7000 //RX_TDDRC_LIMITER_THRD +34 0x0800 //RX_TDDRC_LIMITER_GAIN +112 0x0001 //RX_TDDRC_THRD_0 +113 0x0002 //RX_TDDRC_THRD_1 +114 0x1800 //RX_TDDRC_THRD_2 +115 0x1800 //RX_TDDRC_THRD_3 +116 0x7FFF //RX_TDDRC_SLANT_0 +117 0x7FFF //RX_TDDRC_SLANT_1 +118 0x1000 //RX_TDDRC_ALPHA_UP_0 +119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +120 0x0000 //RX_TDDRC_HMNC_FLAG +121 0x199A //RX_TDDRC_HMNC_GAIN +122 0x0001 //RX_TDDRC_SMT_FLAG +123 0x0CCD //RX_TDDRC_SMT_W +124 0x056F //RX_TDDRC_DRC_GAIN +38 0x0020 //RX_FDEQ_SUBNUM +39 0x483E //RX_FDEQ_GAIN_0 +40 0x3E3E //RX_FDEQ_GAIN_1 +41 0x3E4C //RX_FDEQ_GAIN_2 +42 0x586E //RX_FDEQ_GAIN_3 +43 0x8496 //RX_FDEQ_GAIN_4 +44 0x968E //RX_FDEQ_GAIN_5 +45 0x8488 //RX_FDEQ_GAIN_6 +46 0x8884 //RX_FDEQ_GAIN_7 +47 0x9CA4 //RX_FDEQ_GAIN_8 +48 0x98A8 //RX_FDEQ_GAIN_9 +49 0xBEB8 //RX_FDEQ_GAIN_10 +50 0x918D //RX_FDEQ_GAIN_11 +51 0x7566 //RX_FDEQ_GAIN_12 +52 0x6460 //RX_FDEQ_GAIN_13 +53 0x6174 //RX_FDEQ_GAIN_14 +54 0x7890 //RX_FDEQ_GAIN_15 +55 0x4848 //RX_FDEQ_GAIN_16 +56 0x4848 //RX_FDEQ_GAIN_17 +57 0x4848 //RX_FDEQ_GAIN_18 +58 0x4848 //RX_FDEQ_GAIN_19 +59 0x4848 //RX_FDEQ_GAIN_20 +60 0x4848 //RX_FDEQ_GAIN_21 +61 0x4848 //RX_FDEQ_GAIN_22 +62 0x4848 //RX_FDEQ_GAIN_23 +63 0x0202 //RX_FDEQ_BIN_0 +64 0x0202 //RX_FDEQ_BIN_1 +65 0x0301 //RX_FDEQ_BIN_2 +66 0x0404 //RX_FDEQ_BIN_3 +67 0x0406 //RX_FDEQ_BIN_4 +68 0x0109 //RX_FDEQ_BIN_5 +69 0x0708 //RX_FDEQ_BIN_6 +70 0x090A //RX_FDEQ_BIN_7 +71 0x0B0C //RX_FDEQ_BIN_8 +72 0x0D09 //RX_FDEQ_BIN_9 +73 0x0819 //RX_FDEQ_BIN_10 +74 0x1E19 //RX_FDEQ_BIN_11 +75 0x1B0F //RX_FDEQ_BIN_12 +76 0x141E //RX_FDEQ_BIN_13 +77 0x3728 //RX_FDEQ_BIN_14 +78 0x282C //RX_FDEQ_BIN_15 +79 0x0000 //RX_FDEQ_BIN_16 +80 0x0000 //RX_FDEQ_BIN_17 +81 0x0000 //RX_FDEQ_BIN_18 +82 0x0000 //RX_FDEQ_BIN_19 +83 0x0000 //RX_FDEQ_BIN_20 +84 0x0000 //RX_FDEQ_BIN_21 +85 0x0000 //RX_FDEQ_BIN_22 +86 0x0000 //RX_FDEQ_BIN_23 +87 0x4000 //RX_FDEQ_RESRV_0 +88 0x0320 //RX_FDEQ_RESRV_1 +89 0x0018 //RX_FDDRC_BAND_MARGIN_0 +90 0x0030 //RX_FDDRC_BAND_MARGIN_1 +91 0x0050 //RX_FDDRC_BAND_MARGIN_2 +92 0x0080 //RX_FDDRC_BAND_MARGIN_3 +93 0x0007 //RX_FDDRC_BLOCK_EXP +94 0x5000 //RX_FDDRC_THRD_2_0 +95 0x5000 //RX_FDDRC_THRD_2_1 +96 0x5000 //RX_FDDRC_THRD_2_2 +97 0x5000 //RX_FDDRC_THRD_2_3 +98 0x6400 //RX_FDDRC_THRD_3_0 +99 0x6400 //RX_FDDRC_THRD_3_1 +100 0x6400 //RX_FDDRC_THRD_3_2 +101 0x6400 //RX_FDDRC_THRD_3_3 +102 0x2000 //RX_FDDRC_SLANT_0_0 +103 0x2000 //RX_FDDRC_SLANT_0_1 +104 0x2000 //RX_FDDRC_SLANT_0_2 +105 0x2000 //RX_FDDRC_SLANT_0_3 +106 0x5333 //RX_FDDRC_SLANT_1_0 +107 0x5333 //RX_FDDRC_SLANT_1_1 +108 0x5333 //RX_FDDRC_SLANT_1_2 +109 0x5333 //RX_FDDRC_SLANT_1_3 +110 0x0000 //RX_FDDRC_RESRV_0 +129 0x0035 //RX_SPK_VOL +130 0x0000 //RX_VOL_RESRV_0 +#VOL 4 +6 0x1000 //RX_TDDRC_ALPHA_UP_1 +7 0x1000 //RX_TDDRC_ALPHA_UP_2 +8 0x1000 //RX_TDDRC_ALPHA_UP_3 +9 0x1000 //RX_TDDRC_ALPHA_UP_4 +27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +33 0x7000 //RX_TDDRC_LIMITER_THRD +34 0x0800 //RX_TDDRC_LIMITER_GAIN +112 0x0001 //RX_TDDRC_THRD_0 +113 0x0002 //RX_TDDRC_THRD_1 +114 0x1800 //RX_TDDRC_THRD_2 +115 0x1800 //RX_TDDRC_THRD_3 +116 0x7FFF //RX_TDDRC_SLANT_0 +117 0x7FFF //RX_TDDRC_SLANT_1 +118 0x1000 //RX_TDDRC_ALPHA_UP_0 +119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +120 0x0000 //RX_TDDRC_HMNC_FLAG +121 0x199A //RX_TDDRC_HMNC_GAIN +122 0x0001 //RX_TDDRC_SMT_FLAG +123 0x0CCD //RX_TDDRC_SMT_W +124 0x056F //RX_TDDRC_DRC_GAIN +38 0x0020 //RX_FDEQ_SUBNUM +39 0x483E //RX_FDEQ_GAIN_0 +40 0x3E3E //RX_FDEQ_GAIN_1 +41 0x3E4C //RX_FDEQ_GAIN_2 +42 0x586E //RX_FDEQ_GAIN_3 +43 0x8496 //RX_FDEQ_GAIN_4 +44 0x968E //RX_FDEQ_GAIN_5 +45 0x8488 //RX_FDEQ_GAIN_6 +46 0x8884 //RX_FDEQ_GAIN_7 +47 0x9CA4 //RX_FDEQ_GAIN_8 +48 0x98A8 //RX_FDEQ_GAIN_9 +49 0xBEB8 //RX_FDEQ_GAIN_10 +50 0x918D //RX_FDEQ_GAIN_11 +51 0x7566 //RX_FDEQ_GAIN_12 +52 0x6460 //RX_FDEQ_GAIN_13 +53 0x6174 //RX_FDEQ_GAIN_14 +54 0x7890 //RX_FDEQ_GAIN_15 +55 0x4848 //RX_FDEQ_GAIN_16 +56 0x4848 //RX_FDEQ_GAIN_17 +57 0x4848 //RX_FDEQ_GAIN_18 +58 0x4848 //RX_FDEQ_GAIN_19 +59 0x4848 //RX_FDEQ_GAIN_20 +60 0x4848 //RX_FDEQ_GAIN_21 +61 0x4848 //RX_FDEQ_GAIN_22 +62 0x4848 //RX_FDEQ_GAIN_23 +63 0x0202 //RX_FDEQ_BIN_0 +64 0x0202 //RX_FDEQ_BIN_1 +65 0x0301 //RX_FDEQ_BIN_2 +66 0x0404 //RX_FDEQ_BIN_3 +67 0x0406 //RX_FDEQ_BIN_4 +68 0x0109 //RX_FDEQ_BIN_5 +69 0x0708 //RX_FDEQ_BIN_6 +70 0x090A //RX_FDEQ_BIN_7 +71 0x0B0C //RX_FDEQ_BIN_8 +72 0x0D09 //RX_FDEQ_BIN_9 +73 0x0819 //RX_FDEQ_BIN_10 +74 0x1E19 //RX_FDEQ_BIN_11 +75 0x1B0F //RX_FDEQ_BIN_12 +76 0x141E //RX_FDEQ_BIN_13 +77 0x3728 //RX_FDEQ_BIN_14 +78 0x282C //RX_FDEQ_BIN_15 +79 0x0000 //RX_FDEQ_BIN_16 +80 0x0000 //RX_FDEQ_BIN_17 +81 0x0000 //RX_FDEQ_BIN_18 +82 0x0000 //RX_FDEQ_BIN_19 +83 0x0000 //RX_FDEQ_BIN_20 +84 0x0000 //RX_FDEQ_BIN_21 +85 0x0000 //RX_FDEQ_BIN_22 +86 0x0000 //RX_FDEQ_BIN_23 +87 0x4000 //RX_FDEQ_RESRV_0 +88 0x0320 //RX_FDEQ_RESRV_1 +89 0x0018 //RX_FDDRC_BAND_MARGIN_0 +90 0x0030 //RX_FDDRC_BAND_MARGIN_1 +91 0x0050 //RX_FDDRC_BAND_MARGIN_2 +92 0x0080 //RX_FDDRC_BAND_MARGIN_3 +93 0x0007 //RX_FDDRC_BLOCK_EXP +94 0x5000 //RX_FDDRC_THRD_2_0 +95 0x5000 //RX_FDDRC_THRD_2_1 +96 0x5000 //RX_FDDRC_THRD_2_2 +97 0x5000 //RX_FDDRC_THRD_2_3 +98 0x6400 //RX_FDDRC_THRD_3_0 +99 0x6400 //RX_FDDRC_THRD_3_1 +100 0x6400 //RX_FDDRC_THRD_3_2 +101 0x6400 //RX_FDDRC_THRD_3_3 +102 0x2000 //RX_FDDRC_SLANT_0_0 +103 0x2000 //RX_FDDRC_SLANT_0_1 +104 0x2000 //RX_FDDRC_SLANT_0_2 +105 0x2000 //RX_FDDRC_SLANT_0_3 +106 0x5333 //RX_FDDRC_SLANT_1_0 +107 0x5333 //RX_FDDRC_SLANT_1_1 +108 0x5333 //RX_FDDRC_SLANT_1_2 +109 0x5333 //RX_FDDRC_SLANT_1_3 +110 0x0000 //RX_FDDRC_RESRV_0 +129 0x0047 //RX_SPK_VOL +130 0x0000 //RX_VOL_RESRV_0 +#VOL 5 +6 0x1000 //RX_TDDRC_ALPHA_UP_1 +7 0x1000 //RX_TDDRC_ALPHA_UP_2 +8 0x1000 //RX_TDDRC_ALPHA_UP_3 +9 0x1000 //RX_TDDRC_ALPHA_UP_4 +27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +33 0x7000 //RX_TDDRC_LIMITER_THRD +34 0x0800 //RX_TDDRC_LIMITER_GAIN +112 0x0001 //RX_TDDRC_THRD_0 +113 0x0002 //RX_TDDRC_THRD_1 +114 0x1800 //RX_TDDRC_THRD_2 +115 0x1800 //RX_TDDRC_THRD_3 +116 0x7FFF //RX_TDDRC_SLANT_0 +117 0x7FFF //RX_TDDRC_SLANT_1 +118 0x1000 //RX_TDDRC_ALPHA_UP_0 +119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +120 0x0000 //RX_TDDRC_HMNC_FLAG +121 0x199A //RX_TDDRC_HMNC_GAIN +122 0x0001 //RX_TDDRC_SMT_FLAG +123 0x0CCD //RX_TDDRC_SMT_W +124 0x056F //RX_TDDRC_DRC_GAIN +38 0x0020 //RX_FDEQ_SUBNUM +39 0x483E //RX_FDEQ_GAIN_0 +40 0x3E3E //RX_FDEQ_GAIN_1 +41 0x3E4C //RX_FDEQ_GAIN_2 +42 0x586E //RX_FDEQ_GAIN_3 +43 0x8496 //RX_FDEQ_GAIN_4 +44 0x968E //RX_FDEQ_GAIN_5 +45 0x8488 //RX_FDEQ_GAIN_6 +46 0x8884 //RX_FDEQ_GAIN_7 +47 0x9CA4 //RX_FDEQ_GAIN_8 +48 0x98A8 //RX_FDEQ_GAIN_9 +49 0xBEB8 //RX_FDEQ_GAIN_10 +50 0x918D //RX_FDEQ_GAIN_11 +51 0x7566 //RX_FDEQ_GAIN_12 +52 0x6460 //RX_FDEQ_GAIN_13 +53 0x6174 //RX_FDEQ_GAIN_14 +54 0x7890 //RX_FDEQ_GAIN_15 +55 0x4848 //RX_FDEQ_GAIN_16 +56 0x4848 //RX_FDEQ_GAIN_17 +57 0x4848 //RX_FDEQ_GAIN_18 +58 0x4848 //RX_FDEQ_GAIN_19 +59 0x4848 //RX_FDEQ_GAIN_20 +60 0x4848 //RX_FDEQ_GAIN_21 +61 0x4848 //RX_FDEQ_GAIN_22 +62 0x4848 //RX_FDEQ_GAIN_23 +63 0x0202 //RX_FDEQ_BIN_0 +64 0x0202 //RX_FDEQ_BIN_1 +65 0x0301 //RX_FDEQ_BIN_2 +66 0x0404 //RX_FDEQ_BIN_3 +67 0x0406 //RX_FDEQ_BIN_4 +68 0x0109 //RX_FDEQ_BIN_5 +69 0x0708 //RX_FDEQ_BIN_6 +70 0x090A //RX_FDEQ_BIN_7 +71 0x0B0C //RX_FDEQ_BIN_8 +72 0x0D09 //RX_FDEQ_BIN_9 +73 0x0819 //RX_FDEQ_BIN_10 +74 0x1E19 //RX_FDEQ_BIN_11 +75 0x1B0F //RX_FDEQ_BIN_12 +76 0x141E //RX_FDEQ_BIN_13 +77 0x3728 //RX_FDEQ_BIN_14 +78 0x282C //RX_FDEQ_BIN_15 +79 0x0000 //RX_FDEQ_BIN_16 +80 0x0000 //RX_FDEQ_BIN_17 +81 0x0000 //RX_FDEQ_BIN_18 +82 0x0000 //RX_FDEQ_BIN_19 +83 0x0000 //RX_FDEQ_BIN_20 +84 0x0000 //RX_FDEQ_BIN_21 +85 0x0000 //RX_FDEQ_BIN_22 +86 0x0000 //RX_FDEQ_BIN_23 +87 0x4000 //RX_FDEQ_RESRV_0 +88 0x0320 //RX_FDEQ_RESRV_1 +89 0x0018 //RX_FDDRC_BAND_MARGIN_0 +90 0x0030 //RX_FDDRC_BAND_MARGIN_1 +91 0x0050 //RX_FDDRC_BAND_MARGIN_2 +92 0x0080 //RX_FDDRC_BAND_MARGIN_3 +93 0x0007 //RX_FDDRC_BLOCK_EXP +94 0x5000 //RX_FDDRC_THRD_2_0 +95 0x5000 //RX_FDDRC_THRD_2_1 +96 0x5000 //RX_FDDRC_THRD_2_2 +97 0x5000 //RX_FDDRC_THRD_2_3 +98 0x6400 //RX_FDDRC_THRD_3_0 +99 0x6400 //RX_FDDRC_THRD_3_1 +100 0x6400 //RX_FDDRC_THRD_3_2 +101 0x6400 //RX_FDDRC_THRD_3_3 +102 0x2000 //RX_FDDRC_SLANT_0_0 +103 0x2000 //RX_FDDRC_SLANT_0_1 +104 0x2000 //RX_FDDRC_SLANT_0_2 +105 0x2000 //RX_FDDRC_SLANT_0_3 +106 0x5333 //RX_FDDRC_SLANT_1_0 +107 0x5333 //RX_FDDRC_SLANT_1_1 +108 0x5333 //RX_FDDRC_SLANT_1_2 +109 0x5333 //RX_FDDRC_SLANT_1_3 +110 0x0000 //RX_FDDRC_RESRV_0 +129 0x0076 //RX_SPK_VOL +130 0x0000 //RX_VOL_RESRV_0 +#VOL 6 +6 0x1000 //RX_TDDRC_ALPHA_UP_1 +7 0x1000 //RX_TDDRC_ALPHA_UP_2 +8 0x1000 //RX_TDDRC_ALPHA_UP_3 +9 0x1000 //RX_TDDRC_ALPHA_UP_4 +27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +33 0x7000 //RX_TDDRC_LIMITER_THRD +34 0x0800 //RX_TDDRC_LIMITER_GAIN +112 0x0001 //RX_TDDRC_THRD_0 +113 0x0002 //RX_TDDRC_THRD_1 +114 0x1800 //RX_TDDRC_THRD_2 +115 0x1800 //RX_TDDRC_THRD_3 +116 0x7FFF //RX_TDDRC_SLANT_0 +117 0x7FFF //RX_TDDRC_SLANT_1 +118 0x1000 //RX_TDDRC_ALPHA_UP_0 +119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +120 0x0000 //RX_TDDRC_HMNC_FLAG +121 0x199A //RX_TDDRC_HMNC_GAIN +122 0x0001 //RX_TDDRC_SMT_FLAG +123 0x0CCD //RX_TDDRC_SMT_W +124 0x056F //RX_TDDRC_DRC_GAIN +38 0x0020 //RX_FDEQ_SUBNUM +39 0x483E //RX_FDEQ_GAIN_0 +40 0x3E3E //RX_FDEQ_GAIN_1 +41 0x3E4C //RX_FDEQ_GAIN_2 +42 0x586E //RX_FDEQ_GAIN_3 +43 0x8496 //RX_FDEQ_GAIN_4 +44 0x968E //RX_FDEQ_GAIN_5 +45 0x8488 //RX_FDEQ_GAIN_6 +46 0x8884 //RX_FDEQ_GAIN_7 +47 0x9CA4 //RX_FDEQ_GAIN_8 +48 0x98A8 //RX_FDEQ_GAIN_9 +49 0xBEB8 //RX_FDEQ_GAIN_10 +50 0x918D //RX_FDEQ_GAIN_11 +51 0x7566 //RX_FDEQ_GAIN_12 +52 0x6460 //RX_FDEQ_GAIN_13 +53 0x6174 //RX_FDEQ_GAIN_14 +54 0x7890 //RX_FDEQ_GAIN_15 +55 0x4848 //RX_FDEQ_GAIN_16 +56 0x4848 //RX_FDEQ_GAIN_17 +57 0x4848 //RX_FDEQ_GAIN_18 +58 0x4848 //RX_FDEQ_GAIN_19 +59 0x4848 //RX_FDEQ_GAIN_20 +60 0x4848 //RX_FDEQ_GAIN_21 +61 0x4848 //RX_FDEQ_GAIN_22 +62 0x4848 //RX_FDEQ_GAIN_23 +63 0x0202 //RX_FDEQ_BIN_0 +64 0x0202 //RX_FDEQ_BIN_1 +65 0x0301 //RX_FDEQ_BIN_2 +66 0x0404 //RX_FDEQ_BIN_3 +67 0x0406 //RX_FDEQ_BIN_4 +68 0x0109 //RX_FDEQ_BIN_5 +69 0x0708 //RX_FDEQ_BIN_6 +70 0x090A //RX_FDEQ_BIN_7 +71 0x0B0C //RX_FDEQ_BIN_8 +72 0x0D09 //RX_FDEQ_BIN_9 +73 0x0819 //RX_FDEQ_BIN_10 +74 0x1E19 //RX_FDEQ_BIN_11 +75 0x1B0F //RX_FDEQ_BIN_12 +76 0x141E //RX_FDEQ_BIN_13 +77 0x3728 //RX_FDEQ_BIN_14 +78 0x282C //RX_FDEQ_BIN_15 +79 0x0000 //RX_FDEQ_BIN_16 +80 0x0000 //RX_FDEQ_BIN_17 +81 0x0000 //RX_FDEQ_BIN_18 +82 0x0000 //RX_FDEQ_BIN_19 +83 0x0000 //RX_FDEQ_BIN_20 +84 0x0000 //RX_FDEQ_BIN_21 +85 0x0000 //RX_FDEQ_BIN_22 +86 0x0000 //RX_FDEQ_BIN_23 +87 0x4000 //RX_FDEQ_RESRV_0 +88 0x0320 //RX_FDEQ_RESRV_1 +89 0x0018 //RX_FDDRC_BAND_MARGIN_0 +90 0x0030 //RX_FDDRC_BAND_MARGIN_1 +91 0x0050 //RX_FDDRC_BAND_MARGIN_2 +92 0x0080 //RX_FDDRC_BAND_MARGIN_3 +93 0x0007 //RX_FDDRC_BLOCK_EXP +94 0x5000 //RX_FDDRC_THRD_2_0 +95 0x5000 //RX_FDDRC_THRD_2_1 +96 0x5000 //RX_FDDRC_THRD_2_2 +97 0x5000 //RX_FDDRC_THRD_2_3 +98 0x6400 //RX_FDDRC_THRD_3_0 +99 0x6400 //RX_FDDRC_THRD_3_1 +100 0x6400 //RX_FDDRC_THRD_3_2 +101 0x6400 //RX_FDDRC_THRD_3_3 +102 0x2000 //RX_FDDRC_SLANT_0_0 +103 0x2000 //RX_FDDRC_SLANT_0_1 +104 0x2000 //RX_FDDRC_SLANT_0_2 +105 0x2000 //RX_FDDRC_SLANT_0_3 +106 0x5333 //RX_FDDRC_SLANT_1_0 +107 0x5333 //RX_FDDRC_SLANT_1_1 +108 0x5333 //RX_FDDRC_SLANT_1_2 +109 0x5333 //RX_FDDRC_SLANT_1_3 +110 0x0000 //RX_FDDRC_RESRV_0 +129 0x0100 //RX_SPK_VOL +130 0x0000 //RX_VOL_RESRV_0 +#RX 2 +157 0x003C //RX_RECVFUNC_MODE_0 +158 0x0000 //RX_RECVFUNC_MODE_1 +159 0x0003 //RX_SAMPLINGFREQ_SIG +160 0x0003 //RX_SAMPLINGFREQ_PROC +161 0x000A //RX_FRAME_SZ +162 0x0000 //RX_DELAY_OPT +163 0x1000 //RX_TDDRC_ALPHA_UP_1 +164 0x1000 //RX_TDDRC_ALPHA_UP_2 +165 0x1000 //RX_TDDRC_ALPHA_UP_3 +166 0x1000 //RX_TDDRC_ALPHA_UP_4 +167 0x05AA //RX_PGA +168 0x7FFF //RX_A_HP +169 0x4000 //RX_B_PE +170 0x5800 //RX_THR_PITCH_DET_0 +171 0x5000 //RX_THR_PITCH_DET_1 +172 0x4000 //RX_THR_PITCH_DET_2 +173 0x0008 //RX_PITCH_BFR_LEN +174 0x0003 //RX_SBD_PITCH_DET +175 0x0100 //RX_PP_RESRV_0 +176 0x0020 //RX_PP_RESRV_1 +177 0x0600 //RX_N_SN_EST +178 0x000C //RX_N2_SN_EST +179 0x000F //RX_NS_LVL_CTRL +180 0xF800 //RX_THR_SN_EST +181 0x7E00 //RX_LAMBDA_PFILT +182 0x000A //RX_FENS_RESRV_0 +183 0x0190 //RX_FENS_RESRV_1 +184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +187 0x0002 //RX_EXTRA_NS_L +188 0x0800 //RX_EXTRA_NS_A +189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +190 0x7000 //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +192 0x199A //RX_A_POST_FLT +193 0x0000 //RX_LMT_THRD +194 0x4000 //RX_LMT_ALPHA +195 0x0020 //RX_FDEQ_SUBNUM +196 0x483E //RX_FDEQ_GAIN_0 +197 0x3E3E //RX_FDEQ_GAIN_1 +198 0x3E4C //RX_FDEQ_GAIN_2 +199 0x5064 //RX_FDEQ_GAIN_3 +200 0x7076 //RX_FDEQ_GAIN_4 +201 0x897A //RX_FDEQ_GAIN_5 +202 0x7C80 //RX_FDEQ_GAIN_6 +203 0x8888 //RX_FDEQ_GAIN_7 +204 0x949C //RX_FDEQ_GAIN_8 +205 0x96A4 //RX_FDEQ_GAIN_9 +206 0xA9A0 //RX_FDEQ_GAIN_10 +207 0x9487 //RX_FDEQ_GAIN_11 +208 0x6F64 //RX_FDEQ_GAIN_12 +209 0x625A //RX_FDEQ_GAIN_13 +210 0x5D80 //RX_FDEQ_GAIN_14 +211 0x8890 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0202 //RX_FDEQ_BIN_0 +221 0x0202 //RX_FDEQ_BIN_1 +222 0x0301 //RX_FDEQ_BIN_2 +223 0x0404 //RX_FDEQ_BIN_3 +224 0x0406 //RX_FDEQ_BIN_4 +225 0x0109 //RX_FDEQ_BIN_5 +226 0x0708 //RX_FDEQ_BIN_6 +227 0x090A //RX_FDEQ_BIN_7 +228 0x0B0C //RX_FDEQ_BIN_8 +229 0x0D0E //RX_FDEQ_BIN_9 +230 0x1013 //RX_FDEQ_BIN_10 +231 0x1719 //RX_FDEQ_BIN_11 +232 0x1B0F //RX_FDEQ_BIN_12 +233 0x141E //RX_FDEQ_BIN_13 +234 0x3728 //RX_FDEQ_BIN_14 +235 0x282C //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x4000 //RX_FDEQ_RESRV_0 +245 0x0320 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0030 //RX_FDDRC_BAND_MARGIN_1 +248 0x0050 //RX_FDDRC_BAND_MARGIN_2 +249 0x0080 //RX_FDDRC_BAND_MARGIN_3 +250 0x0007 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x5000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x6400 //RX_FDDRC_THRD_3_2 +258 0x6400 //RX_FDDRC_THRD_3_3 +259 0x2000 //RX_FDDRC_SLANT_0_0 +260 0x2000 //RX_FDDRC_SLANT_0_1 +261 0x2000 //RX_FDDRC_SLANT_0_2 +262 0x2000 //RX_FDDRC_SLANT_0_3 +263 0x5333 //RX_FDDRC_SLANT_1_0 +264 0x5333 //RX_FDDRC_SLANT_1_1 +265 0x5333 //RX_FDDRC_SLANT_1_2 +266 0x5333 //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +268 0x0002 //RX_FILTINDX +269 0x0001 //RX_TDDRC_THRD_0 +270 0x0002 //RX_TDDRC_THRD_1 +271 0x1800 //RX_TDDRC_THRD_2 +272 0x1800 //RX_TDDRC_THRD_3 +273 0x7FFF //RX_TDDRC_SLANT_0 +274 0x7FFF //RX_TDDRC_SLANT_1 +275 0x1000 //RX_TDDRC_ALPHA_UP_0 +276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x199A //RX_TDDRC_HMNC_GAIN +279 0x0001 //RX_TDDRC_SMT_FLAG +280 0x0CCD //RX_TDDRC_SMT_W +281 0x0551 //RX_TDDRC_DRC_GAIN +282 0x7C00 //RX_LAMBDA_PKA_FP +283 0x13E0 //RX_TPKA_FP +284 0x0080 //RX_MIN_G_FP +285 0x2000 //RX_MAX_G_FP +286 0x0100 //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 +288 0x0000 //RX_MAXLEVEL_CNG +289 0x3000 //RX_BWE_UV_TH +290 0x3000 //RX_BWE_UV_TH2 +291 0x1800 //RX_BWE_UV_TH3 +292 0x1000 //RX_BWE_V_TH +293 0x04CD //RX_BWE_GAIN1_V_TH1 +294 0x0F33 //RX_BWE_GAIN1_V_TH2 +295 0x7333 //RX_BWE_UV_EQ +296 0x199A //RX_BWE_V_EQ +297 0x7333 //RX_BWE_TONE_TH +298 0x0004 //RX_BWE_UV_HOLD_T +299 0x6CCD //RX_BWE_GAIN2_ALPHA +300 0x799A //RX_BWE_GAIN3_ALPHA +301 0x001E //RX_BWE_CUTOFF +302 0x3000 //RX_BWE_GAINFILL +303 0x3200 //RX_BWE_MAXTH_TONE +304 0x2000 //RX_BWE_EQ_0 +305 0x2000 //RX_BWE_EQ_1 +306 0x2000 //RX_BWE_EQ_2 +307 0x2000 //RX_BWE_EQ_3 +308 0x2000 //RX_BWE_EQ_4 +309 0x2000 //RX_BWE_EQ_5 +310 0x2000 //RX_BWE_EQ_6 +311 0x0000 //RX_BWE_RESRV_0 +312 0x0000 //RX_BWE_RESRV_1 +313 0x0000 //RX_BWE_RESRV_2 +#VOL 0 +163 0x1000 //RX_TDDRC_ALPHA_UP_1 +164 0x1000 //RX_TDDRC_ALPHA_UP_2 +165 0x1000 //RX_TDDRC_ALPHA_UP_3 +166 0x1000 //RX_TDDRC_ALPHA_UP_4 +184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +190 0x7000 //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +269 0x0001 //RX_TDDRC_THRD_0 +270 0x0002 //RX_TDDRC_THRD_1 +271 0x1800 //RX_TDDRC_THRD_2 +272 0x1800 //RX_TDDRC_THRD_3 +273 0x7FFF //RX_TDDRC_SLANT_0 +274 0x7FFF //RX_TDDRC_SLANT_1 +275 0x1000 //RX_TDDRC_ALPHA_UP_0 +276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x199A //RX_TDDRC_HMNC_GAIN +279 0x0001 //RX_TDDRC_SMT_FLAG +280 0x0CCD //RX_TDDRC_SMT_W +281 0x0551 //RX_TDDRC_DRC_GAIN +195 0x0020 //RX_FDEQ_SUBNUM +196 0x483E //RX_FDEQ_GAIN_0 +197 0x3E3E //RX_FDEQ_GAIN_1 +198 0x3E4C //RX_FDEQ_GAIN_2 +199 0x5064 //RX_FDEQ_GAIN_3 +200 0x7076 //RX_FDEQ_GAIN_4 +201 0x897A //RX_FDEQ_GAIN_5 +202 0x7C80 //RX_FDEQ_GAIN_6 +203 0x8888 //RX_FDEQ_GAIN_7 +204 0x949C //RX_FDEQ_GAIN_8 +205 0x96A4 //RX_FDEQ_GAIN_9 +206 0xA9A0 //RX_FDEQ_GAIN_10 +207 0x9487 //RX_FDEQ_GAIN_11 +208 0x6F64 //RX_FDEQ_GAIN_12 +209 0x625A //RX_FDEQ_GAIN_13 +210 0x5D80 //RX_FDEQ_GAIN_14 +211 0x8890 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0202 //RX_FDEQ_BIN_0 +221 0x0202 //RX_FDEQ_BIN_1 +222 0x0301 //RX_FDEQ_BIN_2 +223 0x0404 //RX_FDEQ_BIN_3 +224 0x0406 //RX_FDEQ_BIN_4 +225 0x0109 //RX_FDEQ_BIN_5 +226 0x0708 //RX_FDEQ_BIN_6 +227 0x090A //RX_FDEQ_BIN_7 +228 0x0B0C //RX_FDEQ_BIN_8 +229 0x0D0E //RX_FDEQ_BIN_9 +230 0x1013 //RX_FDEQ_BIN_10 +231 0x1719 //RX_FDEQ_BIN_11 +232 0x1B0F //RX_FDEQ_BIN_12 +233 0x141E //RX_FDEQ_BIN_13 +234 0x3728 //RX_FDEQ_BIN_14 +235 0x282C //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x4000 //RX_FDEQ_RESRV_0 +245 0x0320 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0030 //RX_FDDRC_BAND_MARGIN_1 +248 0x0050 //RX_FDDRC_BAND_MARGIN_2 +249 0x0080 //RX_FDDRC_BAND_MARGIN_3 +250 0x0007 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x5000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x6400 //RX_FDDRC_THRD_3_2 +258 0x6400 //RX_FDDRC_THRD_3_3 +259 0x2000 //RX_FDDRC_SLANT_0_0 +260 0x2000 //RX_FDDRC_SLANT_0_1 +261 0x2000 //RX_FDDRC_SLANT_0_2 +262 0x2000 //RX_FDDRC_SLANT_0_3 +263 0x5333 //RX_FDDRC_SLANT_1_0 +264 0x5333 //RX_FDDRC_SLANT_1_1 +265 0x5333 //RX_FDDRC_SLANT_1_2 +266 0x5333 //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +286 0x000A //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 +#VOL 1 +163 0x1000 //RX_TDDRC_ALPHA_UP_1 +164 0x1000 //RX_TDDRC_ALPHA_UP_2 +165 0x1000 //RX_TDDRC_ALPHA_UP_3 +166 0x1000 //RX_TDDRC_ALPHA_UP_4 +184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +190 0x7000 //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +269 0x0001 //RX_TDDRC_THRD_0 +270 0x0002 //RX_TDDRC_THRD_1 +271 0x1800 //RX_TDDRC_THRD_2 +272 0x1800 //RX_TDDRC_THRD_3 +273 0x7FFF //RX_TDDRC_SLANT_0 +274 0x7FFF //RX_TDDRC_SLANT_1 +275 0x1000 //RX_TDDRC_ALPHA_UP_0 +276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x199A //RX_TDDRC_HMNC_GAIN +279 0x0001 //RX_TDDRC_SMT_FLAG +280 0x0CCD //RX_TDDRC_SMT_W +281 0x0551 //RX_TDDRC_DRC_GAIN +195 0x0020 //RX_FDEQ_SUBNUM +196 0x483E //RX_FDEQ_GAIN_0 +197 0x3E3E //RX_FDEQ_GAIN_1 +198 0x3E4C //RX_FDEQ_GAIN_2 +199 0x5064 //RX_FDEQ_GAIN_3 +200 0x7076 //RX_FDEQ_GAIN_4 +201 0x897A //RX_FDEQ_GAIN_5 +202 0x7C80 //RX_FDEQ_GAIN_6 +203 0x8888 //RX_FDEQ_GAIN_7 +204 0x949C //RX_FDEQ_GAIN_8 +205 0x96A4 //RX_FDEQ_GAIN_9 +206 0xA9A0 //RX_FDEQ_GAIN_10 +207 0x9487 //RX_FDEQ_GAIN_11 +208 0x6F64 //RX_FDEQ_GAIN_12 +209 0x625A //RX_FDEQ_GAIN_13 +210 0x5D80 //RX_FDEQ_GAIN_14 +211 0x8890 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0202 //RX_FDEQ_BIN_0 +221 0x0202 //RX_FDEQ_BIN_1 +222 0x0301 //RX_FDEQ_BIN_2 +223 0x0404 //RX_FDEQ_BIN_3 +224 0x0406 //RX_FDEQ_BIN_4 +225 0x0109 //RX_FDEQ_BIN_5 +226 0x0708 //RX_FDEQ_BIN_6 +227 0x090A //RX_FDEQ_BIN_7 +228 0x0B0C //RX_FDEQ_BIN_8 +229 0x0D0E //RX_FDEQ_BIN_9 +230 0x1013 //RX_FDEQ_BIN_10 +231 0x1719 //RX_FDEQ_BIN_11 +232 0x1B0F //RX_FDEQ_BIN_12 +233 0x141E //RX_FDEQ_BIN_13 +234 0x3728 //RX_FDEQ_BIN_14 +235 0x282C //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x4000 //RX_FDEQ_RESRV_0 +245 0x0320 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0030 //RX_FDDRC_BAND_MARGIN_1 +248 0x0050 //RX_FDDRC_BAND_MARGIN_2 +249 0x0080 //RX_FDDRC_BAND_MARGIN_3 +250 0x0007 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x5000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x6400 //RX_FDDRC_THRD_3_2 +258 0x6400 //RX_FDDRC_THRD_3_3 +259 0x2000 //RX_FDDRC_SLANT_0_0 +260 0x2000 //RX_FDDRC_SLANT_0_1 +261 0x2000 //RX_FDDRC_SLANT_0_2 +262 0x2000 //RX_FDDRC_SLANT_0_3 +263 0x5333 //RX_FDDRC_SLANT_1_0 +264 0x5333 //RX_FDDRC_SLANT_1_1 +265 0x5333 //RX_FDDRC_SLANT_1_2 +266 0x5333 //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +286 0x0010 //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 +#VOL 2 +163 0x1000 //RX_TDDRC_ALPHA_UP_1 +164 0x1000 //RX_TDDRC_ALPHA_UP_2 +165 0x1000 //RX_TDDRC_ALPHA_UP_3 +166 0x1000 //RX_TDDRC_ALPHA_UP_4 +184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +190 0x7000 //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +269 0x0001 //RX_TDDRC_THRD_0 +270 0x0002 //RX_TDDRC_THRD_1 +271 0x1800 //RX_TDDRC_THRD_2 +272 0x1800 //RX_TDDRC_THRD_3 +273 0x7FFF //RX_TDDRC_SLANT_0 +274 0x7FFF //RX_TDDRC_SLANT_1 +275 0x1000 //RX_TDDRC_ALPHA_UP_0 +276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x199A //RX_TDDRC_HMNC_GAIN +279 0x0001 //RX_TDDRC_SMT_FLAG +280 0x0CCD //RX_TDDRC_SMT_W +281 0x0551 //RX_TDDRC_DRC_GAIN +195 0x0020 //RX_FDEQ_SUBNUM +196 0x483E //RX_FDEQ_GAIN_0 +197 0x3E3E //RX_FDEQ_GAIN_1 +198 0x3E4C //RX_FDEQ_GAIN_2 +199 0x5064 //RX_FDEQ_GAIN_3 +200 0x7076 //RX_FDEQ_GAIN_4 +201 0x897A //RX_FDEQ_GAIN_5 +202 0x7C80 //RX_FDEQ_GAIN_6 +203 0x8888 //RX_FDEQ_GAIN_7 +204 0x949C //RX_FDEQ_GAIN_8 +205 0x96A4 //RX_FDEQ_GAIN_9 +206 0xA9A0 //RX_FDEQ_GAIN_10 +207 0x9487 //RX_FDEQ_GAIN_11 +208 0x6F64 //RX_FDEQ_GAIN_12 +209 0x625A //RX_FDEQ_GAIN_13 +210 0x5D80 //RX_FDEQ_GAIN_14 +211 0x8890 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0202 //RX_FDEQ_BIN_0 +221 0x0202 //RX_FDEQ_BIN_1 +222 0x0301 //RX_FDEQ_BIN_2 +223 0x0404 //RX_FDEQ_BIN_3 +224 0x0406 //RX_FDEQ_BIN_4 +225 0x0109 //RX_FDEQ_BIN_5 +226 0x0708 //RX_FDEQ_BIN_6 +227 0x090A //RX_FDEQ_BIN_7 +228 0x0B0C //RX_FDEQ_BIN_8 +229 0x0D0E //RX_FDEQ_BIN_9 +230 0x1013 //RX_FDEQ_BIN_10 +231 0x1719 //RX_FDEQ_BIN_11 +232 0x1B0F //RX_FDEQ_BIN_12 +233 0x141E //RX_FDEQ_BIN_13 +234 0x3728 //RX_FDEQ_BIN_14 +235 0x282C //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x4000 //RX_FDEQ_RESRV_0 +245 0x0320 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0030 //RX_FDDRC_BAND_MARGIN_1 +248 0x0050 //RX_FDDRC_BAND_MARGIN_2 +249 0x0080 //RX_FDDRC_BAND_MARGIN_3 +250 0x0007 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x5000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x6400 //RX_FDDRC_THRD_3_2 +258 0x6400 //RX_FDDRC_THRD_3_3 +259 0x2000 //RX_FDDRC_SLANT_0_0 +260 0x2000 //RX_FDDRC_SLANT_0_1 +261 0x2000 //RX_FDDRC_SLANT_0_2 +262 0x2000 //RX_FDDRC_SLANT_0_3 +263 0x5333 //RX_FDDRC_SLANT_1_0 +264 0x5333 //RX_FDDRC_SLANT_1_1 +265 0x5333 //RX_FDDRC_SLANT_1_2 +266 0x5333 //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +286 0x001B //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 +#VOL 3 +163 0x1000 //RX_TDDRC_ALPHA_UP_1 +164 0x1000 //RX_TDDRC_ALPHA_UP_2 +165 0x1000 //RX_TDDRC_ALPHA_UP_3 +166 0x1000 //RX_TDDRC_ALPHA_UP_4 +184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +190 0x7000 //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +269 0x0001 //RX_TDDRC_THRD_0 +270 0x0002 //RX_TDDRC_THRD_1 +271 0x1800 //RX_TDDRC_THRD_2 +272 0x1800 //RX_TDDRC_THRD_3 +273 0x7FFF //RX_TDDRC_SLANT_0 +274 0x7FFF //RX_TDDRC_SLANT_1 +275 0x1000 //RX_TDDRC_ALPHA_UP_0 +276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x199A //RX_TDDRC_HMNC_GAIN +279 0x0001 //RX_TDDRC_SMT_FLAG +280 0x0CCD //RX_TDDRC_SMT_W +281 0x0551 //RX_TDDRC_DRC_GAIN +195 0x0020 //RX_FDEQ_SUBNUM +196 0x483E //RX_FDEQ_GAIN_0 +197 0x3E3E //RX_FDEQ_GAIN_1 +198 0x3E4C //RX_FDEQ_GAIN_2 +199 0x5064 //RX_FDEQ_GAIN_3 +200 0x7076 //RX_FDEQ_GAIN_4 +201 0x897A //RX_FDEQ_GAIN_5 +202 0x7C80 //RX_FDEQ_GAIN_6 +203 0x8888 //RX_FDEQ_GAIN_7 +204 0x949C //RX_FDEQ_GAIN_8 +205 0x96A4 //RX_FDEQ_GAIN_9 +206 0xA9A0 //RX_FDEQ_GAIN_10 +207 0x9487 //RX_FDEQ_GAIN_11 +208 0x6F64 //RX_FDEQ_GAIN_12 +209 0x625A //RX_FDEQ_GAIN_13 +210 0x5D80 //RX_FDEQ_GAIN_14 +211 0x8890 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0202 //RX_FDEQ_BIN_0 +221 0x0202 //RX_FDEQ_BIN_1 +222 0x0301 //RX_FDEQ_BIN_2 +223 0x0404 //RX_FDEQ_BIN_3 +224 0x0406 //RX_FDEQ_BIN_4 +225 0x0109 //RX_FDEQ_BIN_5 +226 0x0708 //RX_FDEQ_BIN_6 +227 0x090A //RX_FDEQ_BIN_7 +228 0x0B0C //RX_FDEQ_BIN_8 +229 0x0D0E //RX_FDEQ_BIN_9 +230 0x1013 //RX_FDEQ_BIN_10 +231 0x1719 //RX_FDEQ_BIN_11 +232 0x1B0F //RX_FDEQ_BIN_12 +233 0x141E //RX_FDEQ_BIN_13 +234 0x3728 //RX_FDEQ_BIN_14 +235 0x282C //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x4000 //RX_FDEQ_RESRV_0 +245 0x0320 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0030 //RX_FDDRC_BAND_MARGIN_1 +248 0x0050 //RX_FDDRC_BAND_MARGIN_2 +249 0x0080 //RX_FDDRC_BAND_MARGIN_3 +250 0x0007 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x5000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x6400 //RX_FDDRC_THRD_3_2 +258 0x6400 //RX_FDDRC_THRD_3_3 +259 0x2000 //RX_FDDRC_SLANT_0_0 +260 0x2000 //RX_FDDRC_SLANT_0_1 +261 0x2000 //RX_FDDRC_SLANT_0_2 +262 0x2000 //RX_FDDRC_SLANT_0_3 +263 0x5333 //RX_FDDRC_SLANT_1_0 +264 0x5333 //RX_FDDRC_SLANT_1_1 +265 0x5333 //RX_FDDRC_SLANT_1_2 +266 0x5333 //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +286 0x0032 //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 +#VOL 4 +163 0x1000 //RX_TDDRC_ALPHA_UP_1 +164 0x1000 //RX_TDDRC_ALPHA_UP_2 +165 0x1000 //RX_TDDRC_ALPHA_UP_3 +166 0x1000 //RX_TDDRC_ALPHA_UP_4 +184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +190 0x7000 //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +269 0x0001 //RX_TDDRC_THRD_0 +270 0x0002 //RX_TDDRC_THRD_1 +271 0x1800 //RX_TDDRC_THRD_2 +272 0x1800 //RX_TDDRC_THRD_3 +273 0x7FFF //RX_TDDRC_SLANT_0 +274 0x7FFF //RX_TDDRC_SLANT_1 +275 0x1000 //RX_TDDRC_ALPHA_UP_0 +276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x199A //RX_TDDRC_HMNC_GAIN +279 0x0001 //RX_TDDRC_SMT_FLAG +280 0x0CCD //RX_TDDRC_SMT_W +281 0x0551 //RX_TDDRC_DRC_GAIN +195 0x0020 //RX_FDEQ_SUBNUM +196 0x483E //RX_FDEQ_GAIN_0 +197 0x3E3E //RX_FDEQ_GAIN_1 +198 0x3E4C //RX_FDEQ_GAIN_2 +199 0x5064 //RX_FDEQ_GAIN_3 +200 0x7076 //RX_FDEQ_GAIN_4 +201 0x897A //RX_FDEQ_GAIN_5 +202 0x7C80 //RX_FDEQ_GAIN_6 +203 0x8888 //RX_FDEQ_GAIN_7 +204 0x949C //RX_FDEQ_GAIN_8 +205 0x96A4 //RX_FDEQ_GAIN_9 +206 0xA9A0 //RX_FDEQ_GAIN_10 +207 0x9487 //RX_FDEQ_GAIN_11 +208 0x6F64 //RX_FDEQ_GAIN_12 +209 0x625A //RX_FDEQ_GAIN_13 +210 0x5D80 //RX_FDEQ_GAIN_14 +211 0x8890 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0202 //RX_FDEQ_BIN_0 +221 0x0202 //RX_FDEQ_BIN_1 +222 0x0301 //RX_FDEQ_BIN_2 +223 0x0404 //RX_FDEQ_BIN_3 +224 0x0406 //RX_FDEQ_BIN_4 +225 0x0109 //RX_FDEQ_BIN_5 +226 0x0708 //RX_FDEQ_BIN_6 +227 0x090A //RX_FDEQ_BIN_7 +228 0x0B0C //RX_FDEQ_BIN_8 +229 0x0D0E //RX_FDEQ_BIN_9 +230 0x1013 //RX_FDEQ_BIN_10 +231 0x1719 //RX_FDEQ_BIN_11 +232 0x1B0F //RX_FDEQ_BIN_12 +233 0x141E //RX_FDEQ_BIN_13 +234 0x3728 //RX_FDEQ_BIN_14 +235 0x282C //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x4000 //RX_FDEQ_RESRV_0 +245 0x0320 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0030 //RX_FDDRC_BAND_MARGIN_1 +248 0x0050 //RX_FDDRC_BAND_MARGIN_2 +249 0x0080 //RX_FDDRC_BAND_MARGIN_3 +250 0x0007 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x5000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x6400 //RX_FDDRC_THRD_3_2 +258 0x6400 //RX_FDDRC_THRD_3_3 +259 0x2000 //RX_FDDRC_SLANT_0_0 +260 0x2000 //RX_FDDRC_SLANT_0_1 +261 0x2000 //RX_FDDRC_SLANT_0_2 +262 0x2000 //RX_FDDRC_SLANT_0_3 +263 0x5333 //RX_FDDRC_SLANT_1_0 +264 0x5333 //RX_FDDRC_SLANT_1_1 +265 0x5333 //RX_FDDRC_SLANT_1_2 +266 0x5333 //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +286 0x0047 //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 +#VOL 5 +163 0x1000 //RX_TDDRC_ALPHA_UP_1 +164 0x1000 //RX_TDDRC_ALPHA_UP_2 +165 0x1000 //RX_TDDRC_ALPHA_UP_3 +166 0x1000 //RX_TDDRC_ALPHA_UP_4 +184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +190 0x7000 //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +269 0x0001 //RX_TDDRC_THRD_0 +270 0x0002 //RX_TDDRC_THRD_1 +271 0x1800 //RX_TDDRC_THRD_2 +272 0x1800 //RX_TDDRC_THRD_3 +273 0x7FFF //RX_TDDRC_SLANT_0 +274 0x7FFF //RX_TDDRC_SLANT_1 +275 0x1000 //RX_TDDRC_ALPHA_UP_0 +276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x199A //RX_TDDRC_HMNC_GAIN +279 0x0001 //RX_TDDRC_SMT_FLAG +280 0x0CCD //RX_TDDRC_SMT_W +281 0x0551 //RX_TDDRC_DRC_GAIN +195 0x0020 //RX_FDEQ_SUBNUM +196 0x483E //RX_FDEQ_GAIN_0 +197 0x3E3E //RX_FDEQ_GAIN_1 +198 0x3E4C //RX_FDEQ_GAIN_2 +199 0x5064 //RX_FDEQ_GAIN_3 +200 0x7076 //RX_FDEQ_GAIN_4 +201 0x897A //RX_FDEQ_GAIN_5 +202 0x7C80 //RX_FDEQ_GAIN_6 +203 0x8888 //RX_FDEQ_GAIN_7 +204 0x949C //RX_FDEQ_GAIN_8 +205 0x96A4 //RX_FDEQ_GAIN_9 +206 0xA9A0 //RX_FDEQ_GAIN_10 +207 0x9487 //RX_FDEQ_GAIN_11 +208 0x6F64 //RX_FDEQ_GAIN_12 +209 0x625A //RX_FDEQ_GAIN_13 +210 0x5D80 //RX_FDEQ_GAIN_14 +211 0x8890 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0202 //RX_FDEQ_BIN_0 +221 0x0202 //RX_FDEQ_BIN_1 +222 0x0301 //RX_FDEQ_BIN_2 +223 0x0404 //RX_FDEQ_BIN_3 +224 0x0406 //RX_FDEQ_BIN_4 +225 0x0109 //RX_FDEQ_BIN_5 +226 0x0708 //RX_FDEQ_BIN_6 +227 0x090A //RX_FDEQ_BIN_7 +228 0x0B0C //RX_FDEQ_BIN_8 +229 0x0D0E //RX_FDEQ_BIN_9 +230 0x1013 //RX_FDEQ_BIN_10 +231 0x1719 //RX_FDEQ_BIN_11 +232 0x1B0F //RX_FDEQ_BIN_12 +233 0x141E //RX_FDEQ_BIN_13 +234 0x3728 //RX_FDEQ_BIN_14 +235 0x282C //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x4000 //RX_FDEQ_RESRV_0 +245 0x0320 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0030 //RX_FDDRC_BAND_MARGIN_1 +248 0x0050 //RX_FDDRC_BAND_MARGIN_2 +249 0x0080 //RX_FDDRC_BAND_MARGIN_3 +250 0x0007 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x5000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x6400 //RX_FDDRC_THRD_3_2 +258 0x6400 //RX_FDDRC_THRD_3_3 +259 0x2000 //RX_FDDRC_SLANT_0_0 +260 0x2000 //RX_FDDRC_SLANT_0_1 +261 0x2000 //RX_FDDRC_SLANT_0_2 +262 0x2000 //RX_FDDRC_SLANT_0_3 +263 0x5333 //RX_FDDRC_SLANT_1_0 +264 0x5333 //RX_FDDRC_SLANT_1_1 +265 0x5333 //RX_FDDRC_SLANT_1_2 +266 0x5333 //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +286 0x0076 //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 +#VOL 6 +163 0x1000 //RX_TDDRC_ALPHA_UP_1 +164 0x1000 //RX_TDDRC_ALPHA_UP_2 +165 0x1000 //RX_TDDRC_ALPHA_UP_3 +166 0x1000 //RX_TDDRC_ALPHA_UP_4 +184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +190 0x7000 //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +269 0x0001 //RX_TDDRC_THRD_0 +270 0x0002 //RX_TDDRC_THRD_1 +271 0x1800 //RX_TDDRC_THRD_2 +272 0x1800 //RX_TDDRC_THRD_3 +273 0x7FFF //RX_TDDRC_SLANT_0 +274 0x7FFF //RX_TDDRC_SLANT_1 +275 0x1000 //RX_TDDRC_ALPHA_UP_0 +276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x199A //RX_TDDRC_HMNC_GAIN +279 0x0001 //RX_TDDRC_SMT_FLAG +280 0x0CCD //RX_TDDRC_SMT_W +281 0x0551 //RX_TDDRC_DRC_GAIN +195 0x0020 //RX_FDEQ_SUBNUM +196 0x483E //RX_FDEQ_GAIN_0 +197 0x3E3E //RX_FDEQ_GAIN_1 +198 0x3E4C //RX_FDEQ_GAIN_2 +199 0x5064 //RX_FDEQ_GAIN_3 +200 0x7076 //RX_FDEQ_GAIN_4 +201 0x897A //RX_FDEQ_GAIN_5 +202 0x7C80 //RX_FDEQ_GAIN_6 +203 0x8888 //RX_FDEQ_GAIN_7 +204 0x949C //RX_FDEQ_GAIN_8 +205 0x96A4 //RX_FDEQ_GAIN_9 +206 0xA9A0 //RX_FDEQ_GAIN_10 +207 0x9487 //RX_FDEQ_GAIN_11 +208 0x6F64 //RX_FDEQ_GAIN_12 +209 0x625A //RX_FDEQ_GAIN_13 +210 0x5D80 //RX_FDEQ_GAIN_14 +211 0x8890 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0202 //RX_FDEQ_BIN_0 +221 0x0202 //RX_FDEQ_BIN_1 +222 0x0301 //RX_FDEQ_BIN_2 +223 0x0404 //RX_FDEQ_BIN_3 +224 0x0406 //RX_FDEQ_BIN_4 +225 0x0109 //RX_FDEQ_BIN_5 +226 0x0708 //RX_FDEQ_BIN_6 +227 0x090A //RX_FDEQ_BIN_7 +228 0x0B0C //RX_FDEQ_BIN_8 +229 0x0D0E //RX_FDEQ_BIN_9 +230 0x1013 //RX_FDEQ_BIN_10 +231 0x1719 //RX_FDEQ_BIN_11 +232 0x1B0F //RX_FDEQ_BIN_12 +233 0x141E //RX_FDEQ_BIN_13 +234 0x3728 //RX_FDEQ_BIN_14 +235 0x282C //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x4000 //RX_FDEQ_RESRV_0 +245 0x0320 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0030 //RX_FDDRC_BAND_MARGIN_1 +248 0x0050 //RX_FDDRC_BAND_MARGIN_2 +249 0x0080 //RX_FDDRC_BAND_MARGIN_3 +250 0x0007 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x5000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x6400 //RX_FDDRC_THRD_3_2 +258 0x6400 //RX_FDDRC_THRD_3_3 +259 0x2000 //RX_FDDRC_SLANT_0_0 +260 0x2000 //RX_FDDRC_SLANT_0_1 +261 0x2000 //RX_FDDRC_SLANT_0_2 +262 0x2000 //RX_FDDRC_SLANT_0_3 +263 0x5333 //RX_FDDRC_SLANT_1_0 +264 0x5333 //RX_FDDRC_SLANT_1_1 +265 0x5333 //RX_FDDRC_SLANT_1_2 +266 0x5333 //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +286 0x0100 //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 + +#CASE_NAME HANDSET-HANDSET-CUSTOM2-SWB +#PARAM_MODE Simple +#PARAM_TYPE TX+2RX +#TOTAL_CUSTOM_STEP 7+7 +#TX +0 0x0000 //TX_OPERATION_MODE_0 +1 0x0000 //TX_OPERATION_MODE_1 +2 0x0076 //TX_PATCH_REG +3 0x6F5E //TX_SENDFUNC_MODE_0 +4 0x0001 //TX_SENDFUNC_MODE_1 +5 0x0002 //TX_NUM_MIC +6 0x0003 //TX_SAMPLINGFREQ_SIG +7 0x0003 //TX_SAMPLINGFREQ_PROC +8 0x000A //TX_FRAME_SZ_SIG +9 0x000A //TX_FRAME_SZ +10 0x0000 //TX_DELAY_OPT +11 0x0028 //TX_MAX_TAIL_LENGTH +12 0x0001 //TX_NUM_LOUTCHN +13 0x0001 //TX_MAXNUM_AECREF +14 0x0000 //TX_DBG_FUNC_REG +15 0x0000 //TX_DBG_FUNC_REG1 +16 0x0000 //TX_SYS_RESRV_0 +17 0x0000 //TX_SYS_RESRV_1 +18 0x0000 //TX_SYS_RESRV_2 +19 0x0000 //TX_SYS_RESRV_3 +20 0x0000 //TX_DIST2REF0 +21 0x00A3 //TX_DIST2REF1 +22 0x0000 //TX_DIST2REF_02 +23 0x0000 //TX_DIST2REF_03 +24 0x0000 //TX_DIST2REF_04 +25 0x0000 //TX_DIST2REF_05 +26 0x0000 //TX_MMIC +27 0x1000 //TX_PGA_0 +28 0x1000 //TX_PGA_1 +29 0x1000 //TX_PGA_2 +30 0x0000 //TX_PGA_3 +31 0x0000 //TX_PGA_4 +32 0x0000 //TX_PGA_5 +33 0x0000 //TX_MIC_PAIRS +34 0x0000 //TX_MIC_PAIRS_HS +35 0x0002 //TX_MICS_FOR_BF +36 0x0000 //TX_MIC_PAIRS_FORL1 +37 0x0002 //TX_MICS_OF_PAIR0 +38 0x0002 //TX_MICS_OF_PAIR1 +39 0x0002 //TX_MICS_OF_PAIR2 +40 0x0002 //TX_MICS_OF_PAIR3 +41 0x0000 //TX_MIC_DATA_SRC0 +42 0x0002 //TX_MIC_DATA_SRC1 +43 0x0001 //TX_MIC_DATA_SRC2 +44 0x0000 //TX_MIC_DATA_SRC3 +45 0x0000 //TX_MIC_PAIR_CH_04 +46 0x0000 //TX_MIC_PAIR_CH_05 +47 0x0000 //TX_MIC_PAIR_CH_10 +48 0x0000 //TX_MIC_PAIR_CH_11 +49 0x0000 //TX_MIC_PAIR_CH_12 +50 0x0000 //TX_MIC_PAIR_CH_13 +51 0x0000 //TX_MIC_PAIR_CH_14 +52 0x05DC //TX_HD_BIN_MASK +53 0x0010 //TX_HD_SUBAND_MASK +54 0x19A1 //TX_HD_FRAME_AVG_MASK +55 0x0320 //TX_HD_MIN_FRQ +56 0x1000 //TX_HD_ALPHA_PSD +57 0x1100 //TX_T_PHPR1 +58 0x0000 //TX_T_PHPR2 +59 0x0000 //TX_T_PTPR +60 0x0000 //TX_T_PNPR +61 0x0000 //TX_T_PAPR1 +62 0xEE6C //TX_T_PSDVAT +63 0x0800 //TX_CNT +64 0x4000 //TX_ANTI_HOWL_GAIN +65 0x0001 //TX_MICFORBFMARK_0 +66 0x0001 //TX_MICFORBFMARK_1 +67 0x0001 //TX_MICFORBFMARK_2 +68 0x0001 //TX_MICFORBFMARK_3 +69 0x0001 //TX_MICFORBFMARK_4 +70 0x0001 //TX_MICFORBFMARK_5 +71 0x0000 //TX_DIST2REF_10 +72 0x3A66 //TX_DIST2REF_11 +73 0x0000 //TX_DIST2REF2 +74 0x0000 //TX_DIST2REF_13 +75 0x0000 //TX_DIST2REF_14 +76 0x0000 //TX_DIST2REF_15 +77 0x0000 //TX_DIST2REF_20 +78 0x0000 //TX_DIST2REF_21 +79 0x0000 //TX_DIST2REF_22 +80 0x0000 //TX_DIST2REF_23 +81 0x0000 //TX_DIST2REF_24 +82 0x0000 //TX_DIST2REF_25 +83 0x0000 //TX_DIST2REF_30 +84 0x0000 //TX_DIST2REF_31 +85 0x0000 //TX_DIST2REF_32 +86 0x0000 //TX_DIST2REF_33 +87 0x0000 //TX_DIST2REF_34 +88 0x0000 //TX_DIST2REF_35 +89 0x0000 //TX_MIC_LOC_00 +90 0x0000 //TX_MIC_LOC_01 +91 0x0000 //TX_MIC_LOC_02 +92 0x0000 //TX_MIC_LOC_03 +93 0x0000 //TX_MIC_LOC_04 +94 0x0000 //TX_MIC_LOC_05 +95 0x0000 //TX_MIC_LOC_10 +96 0x0000 //TX_MIC_LOC_11 +97 0x0000 //TX_MIC_LOC_12 +98 0x0000 //TX_MIC_LOC_13 +99 0x0000 //TX_MIC_LOC_14 +100 0x0000 //TX_MIC_LOC_15 +101 0x0000 //TX_MIC_LOC_20 +102 0x0000 //TX_MIC_LOC_21 +103 0x0000 //TX_MIC_LOC_22 +104 0x0000 //TX_MIC_LOC_23 +105 0x0000 //TX_MIC_LOC_24 +106 0x0000 //TX_MIC_LOC_25 +107 0x0200 //TX_MIC_REFBLK_VOLUME +108 0x0AAC //TX_MIC_BLOCK_VOLUME +109 0x0000 //TX_INVERSE_MASK +110 0x0000 //TX_ADCS_MASK +111 0x04D0 //TX_ADCS_GAIN +112 0x4000 //TX_NFC_GAINFAC +113 0x0000 //TX_MAINMIC_BLKFACTOR +114 0x0000 //TX_REFMIC_BLKFACTOR +115 0x0000 //TX_BLMIC_BLKFACTOR +116 0x0000 //TX_BRMIC_BLKFACTOR +117 0x0031 //TX_MICBLK_START_BIN +118 0x0060 //TX_MICBLK_END_BIN +119 0x0015 //TX_MICBLK_FE_HOLD +120 0xFFF2 //TX_MICBLK_MR_EXP_TH +121 0xFFF2 //TX_MICBLK_LR_EXP_TH +122 0x0000 //TX_FENE_HOLD +123 0x4000 //TX_FE_ENER_TH_MTS +124 0x0004 //TX_FE_ENER_TH_EXP +125 0x6000 //TX_C_POST_FLT_MIC_MAINBLK +126 0x6000 //TX_C_POST_FLT_MIC_REFBLK +127 0x0010 //TX_MIC_BLOCK_N +128 0x7E56 //TX_A_HP +129 0x4000 //TX_B_PE +130 0x1800 //TX_THR_PITCH_DET_0 +131 0x1000 //TX_THR_PITCH_DET_1 +132 0x0800 //TX_THR_PITCH_DET_2 +133 0x0008 //TX_PITCH_BFR_LEN +134 0x0003 //TX_SBD_PITCH_DET +135 0x0050 //TX_TD_AEC_L +136 0x4000 //TX_MU0_UNP_TD_AEC +137 0x1000 //TX_MU0_PTD_TD_AEC +138 0x0000 //TX_PP_RESRV_0 +139 0x2A94 //TX_PP_RESRV_1 +140 0x55F0 //TX_PP_RESRV_2 +141 0x0000 //TX_PP_RESRV_3 +142 0x0000 //TX_PP_RESRV_4 +143 0x0000 //TX_PP_RESRV_5 +144 0x0000 //TX_PP_RESRV_6 +145 0x0000 //TX_PP_RESRV_7 +146 0x0028 //TX_TAIL_LENGTH +147 0x0080 //TX_AEC_REF_GAIN_0 +148 0x0800 //TX_AEC_REF_GAIN_1 +149 0x0800 //TX_AEC_REF_GAIN_2 +150 0x7900 //TX_EAD_THR +151 0x2000 //TX_THR_RE_EST +152 0x0400 //TX_MIN_EQ_RE_EST_0 +153 0x0400 //TX_MIN_EQ_RE_EST_1 +154 0x0800 //TX_MIN_EQ_RE_EST_2 +155 0x0800 //TX_MIN_EQ_RE_EST_3 +156 0x1000 //TX_MIN_EQ_RE_EST_4 +157 0x1000 //TX_MIN_EQ_RE_EST_5 +158 0x1000 //TX_MIN_EQ_RE_EST_6 +159 0x1000 //TX_MIN_EQ_RE_EST_7 +160 0x1000 //TX_MIN_EQ_RE_EST_8 +161 0x1000 //TX_MIN_EQ_RE_EST_9 +162 0x1000 //TX_MIN_EQ_RE_EST_10 +163 0x1000 //TX_MIN_EQ_RE_EST_11 +164 0x1000 //TX_MIN_EQ_RE_EST_12 +165 0x3000 //TX_LAMBDA_RE_EST +166 0x1000 //TX_LAMBDA_CB_NLE +167 0x1800 //TX_C_POST_FLT +168 0x4000 //TX_GAIN_NP +169 0x003C //TX_SE_HOLD_N +170 0x0046 //TX_DT_HOLD_N +171 0x03E8 //TX_DT2_HOLD_N +172 0x6666 //TX_AEC_RESRV_0 +173 0x0000 //TX_AEC_RESRV_1 +174 0x0014 //TX_AEC_RESRV_2 +175 0x0000 //TX_MIC_DELAY_LENGTH +176 0x0000 //TX_REF_DELAY_LENGTH +177 0x0000 //TX_ADD_LINEIN_GAINL +178 0x0000 //TX_ADD_LINEIN_GAINH +179 0x0000 //TX_MIN_EQ_RE_EST_14 +180 0x0000 //TX_DTD_THR1_8 +181 0x7FFF //TX_DTD_THR2_8 +182 0x0000 //TX_DTD_MIC_BLK2 +183 0x0008 //TX_FRQ_LIN_LEN +184 0x7FFF //TX_FRQ_AEC_LEN_RHO +185 0x6000 //TX_MU0_UNP_FRQ_AEC +186 0x4000 //TX_MU0_PTD_FRQ_AEC +187 0x000A //TX_MINENOISETH +188 0x0800 //TX_MU0_RE_EST +189 0x0001 //TX_AEC_NUM_CH +190 0x0000 //TX_BIGECHOATTENUATION_MAX +191 0x2000 //TX_A_POST_FLT_MICBLK +192 0x0000 //TX_BLKENERTH +193 0x0000 //TX_BLKENERHIGHTH +194 0x0000 //TX_NORMENERTH +195 0x0000 //TX_NORMENERHIGHTH +196 0x0000 //TX_NORMENERHIGHTHL +197 0x7000 //TX_DTD_THR1_0 +198 0x7000 //TX_DTD_THR1_1 +199 0x7000 //TX_DTD_THR1_2 +200 0x7F00 //TX_DTD_THR1_3 +201 0x7F00 //TX_DTD_THR1_4 +202 0x7F00 //TX_DTD_THR1_5 +203 0x7F00 //TX_DTD_THR1_6 +204 0x2000 //TX_DTD_THR2_0 +205 0x2000 //TX_DTD_THR2_1 +206 0x2000 //TX_DTD_THR2_2 +207 0x1000 //TX_DTD_THR2_3 +208 0x1000 //TX_DTD_THR2_4 +209 0x1000 //TX_DTD_THR2_5 +210 0x1000 //TX_DTD_THR2_6 +211 0x6000 //TX_DTD_THR3 +212 0x0177 //TX_SPK_CUT_K +213 0x1B58 //TX_DT_CUT_K +214 0x0100 //TX_DT_CUT_THR +215 0x04EB //TX_COMFORT_G +216 0x01F4 //TX_POWER_YOUT_TH +217 0x4000 //TX_FDPFGAINECHO +218 0x0000 //TX_DTD_HD_THR +219 0x0000 //TX_SPK_CUT_K_S +220 0x0000 //TX_DTD_MIC_BLK +221 0x0400 //TX_ADPT_STRICT_L +222 0x0200 //TX_ADPT_STRICT_H +223 0x0C00 //TX_RATIO_DT_L_TH_LOW +224 0x2000 //TX_RATIO_DT_H_TH_LOW +225 0x1800 //TX_RATIO_DT_L_TH_HIGH +226 0x3000 //TX_RATIO_DT_H_TH_HIGH +227 0x0A00 //TX_RATIO_DT_L0_TH +228 0x7000 //TX_B_POST_FILT_ECHO_L +229 0x7FFF //TX_B_POST_FILT_ECHO_H +230 0x0200 //TX_MIN_G_CTRL_ECHO +231 0x7FFF //TX_B_LESSCUT_RTO_ECHO +232 0x0000 //TX_EPD_OFFSET_00 +233 0x0000 //TX_EPD_OFFST_01 +234 0x1388 //TX_RATIO_DT_L0_TH_HIGH +235 0x3A98 //TX_RATIO_DT_H_TH_CUT +236 0x7FFF //TX_MIN_EQ_RE_EST_13 +237 0x0000 //TX_DTD_THR1_7 +238 0x0000 //TX_DTD_THR2_7 +239 0x0800 //TX_DT_RESRV_7 +240 0x0800 //TX_DT_RESRV_8 +241 0x0000 //TX_DT_RESRV_9 +242 0xF600 //TX_THR_SN_EST_0 +243 0xFA00 //TX_THR_SN_EST_1 +244 0xFA00 //TX_THR_SN_EST_2 +245 0xF800 //TX_THR_SN_EST_3 +246 0xF800 //TX_THR_SN_EST_4 +247 0xF800 //TX_THR_SN_EST_5 +248 0xF800 //TX_THR_SN_EST_6 +249 0xF700 //TX_THR_SN_EST_7 +250 0x0000 //TX_DELTA_THR_SN_EST_0 +251 0x0200 //TX_DELTA_THR_SN_EST_1 +252 0x0200 //TX_DELTA_THR_SN_EST_2 +253 0x0200 //TX_DELTA_THR_SN_EST_3 +254 0x0100 //TX_DELTA_THR_SN_EST_4 +255 0x0200 //TX_DELTA_THR_SN_EST_5 +256 0x0100 //TX_DELTA_THR_SN_EST_6 +257 0x0200 //TX_DELTA_THR_SN_EST_7 +258 0x4000 //TX_LAMBDA_NN_EST_0 +259 0x4000 //TX_LAMBDA_NN_EST_1 +260 0x4000 //TX_LAMBDA_NN_EST_2 +261 0x4000 //TX_LAMBDA_NN_EST_3 +262 0x4000 //TX_LAMBDA_NN_EST_4 +263 0x4000 //TX_LAMBDA_NN_EST_5 +264 0x4000 //TX_LAMBDA_NN_EST_6 +265 0x4000 //TX_LAMBDA_NN_EST_7 +266 0x0400 //TX_N_SN_EST +267 0x001E //TX_INBEAM_T +268 0x0041 //TX_INBEAMHOLDT +269 0x2000 //TX_G_STRICT +270 0x2000 //TX_EQ_THR_BF +271 0x799A //TX_LAMBDA_EQ_BF +272 0x1000 //TX_NE_RTO_TH +273 0x1000 //TX_NE_RTO_TH_L +274 0x1000 //TX_MAINREFRTOH_TH_H +275 0x0600 //TX_MAINREFRTOH_TH_L +276 0x2000 //TX_MAINREFRTO_TH_H +277 0x1400 //TX_MAINREFRTO_TH_L +278 0x0000 //TX_MAINREFRTO_TH_EQ +279 0x1000 //TX_B_POST_FLT_0 +280 0x1000 //TX_B_POST_FLT_1 +281 0x0014 //TX_NS_LVL_CTRL_0 +282 0x002C //TX_NS_LVL_CTRL_1 +283 0x0016 //TX_NS_LVL_CTRL_2 +284 0x0018 //TX_NS_LVL_CTRL_3 +285 0x0016 //TX_NS_LVL_CTRL_4 +286 0x0012 //TX_NS_LVL_CTRL_5 +287 0x0016 //TX_NS_LVL_CTRL_6 +288 0x0017 //TX_NS_LVL_CTRL_7 +289 0x000E //TX_MIN_GAIN_S_0 +290 0x000D //TX_MIN_GAIN_S_1 +291 0x0012 //TX_MIN_GAIN_S_2 +292 0x0010 //TX_MIN_GAIN_S_3 +293 0x0012 //TX_MIN_GAIN_S_4 +294 0x0012 //TX_MIN_GAIN_S_5 +295 0x0012 //TX_MIN_GAIN_S_6 +296 0x0012 //TX_MIN_GAIN_S_7 +297 0x6000 //TX_NMOS_SUP +298 0x0000 //TX_NS_MAX_PRI_SNR_TH +299 0x0000 //TX_NMOS_SUP_MENSA +300 0x7FFF //TX_SNRI_SUP_0 +301 0x6000 //TX_SNRI_SUP_1 +302 0x6000 //TX_SNRI_SUP_2 +303 0x6000 //TX_SNRI_SUP_3 +304 0x6000 //TX_SNRI_SUP_4 +305 0x6000 //TX_SNRI_SUP_5 +306 0x6000 //TX_SNRI_SUP_6 +307 0x6000 //TX_SNRI_SUP_7 +308 0x6000 //TX_THR_LFNS +309 0x0017 //TX_G_LFNS +310 0x09C4 //TX_GAIN0_NTH +311 0x000A //TX_MUSIC_MORENS +312 0x7FFF //TX_A_POST_FILT_0 +313 0x2000 //TX_A_POST_FILT_1 +314 0x4000 //TX_A_POST_FILT_S_0 +315 0x4000 //TX_A_POST_FILT_S_1 +316 0x4000 //TX_A_POST_FILT_S_2 +317 0x4000 //TX_A_POST_FILT_S_3 +318 0x4000 //TX_A_POST_FILT_S_4 +319 0x4000 //TX_A_POST_FILT_S_5 +320 0x5000 //TX_A_POST_FILT_S_6 +321 0x7000 //TX_A_POST_FILT_S_7 +322 0x1000 //TX_B_POST_FILT_0 +323 0x1000 //TX_B_POST_FILT_1 +324 0x2000 //TX_B_POST_FILT_2 +325 0x2000 //TX_B_POST_FILT_3 +326 0x2000 //TX_B_POST_FILT_4 +327 0x1000 //TX_B_POST_FILT_5 +328 0x3000 //TX_B_POST_FILT_6 +329 0x3000 //TX_B_POST_FILT_7 +330 0x1000 //TX_B_LESSCUT_RTO_S_0 +331 0x1000 //TX_B_LESSCUT_RTO_S_1 +332 0x1000 //TX_B_LESSCUT_RTO_S_2 +333 0x1000 //TX_B_LESSCUT_RTO_S_3 +334 0x1000 //TX_B_LESSCUT_RTO_S_4 +335 0x1000 //TX_B_LESSCUT_RTO_S_5 +336 0x1000 //TX_B_LESSCUT_RTO_S_6 +337 0x1000 //TX_B_LESSCUT_RTO_S_7 +338 0x7E14 //TX_LAMBDA_PFILT +339 0x7C29 //TX_LAMBDA_PFILT_S_0 +340 0x7C29 //TX_LAMBDA_PFILT_S_1 +341 0x7C29 //TX_LAMBDA_PFILT_S_2 +342 0x7C29 //TX_LAMBDA_PFILT_S_3 +343 0x7C29 //TX_LAMBDA_PFILT_S_4 +344 0x7C29 //TX_LAMBDA_PFILT_S_5 +345 0x7C29 //TX_LAMBDA_PFILT_S_6 +346 0x7C29 //TX_LAMBDA_PFILT_S_7 +347 0x07D0 //TX_K_PEPPER +348 0x0800 //TX_A_PEPPER +349 0x1D4C //TX_K_PEPPER_HF +350 0x0400 //TX_A_PEPPER_HF +351 0x0001 //TX_HMNC_BST_FLG +352 0x4000 //TX_HMNC_BST_THR +353 0x0800 //TX_DT_BINVAD_TH_0 +354 0x0800 //TX_DT_BINVAD_TH_1 +355 0x0800 //TX_DT_BINVAD_TH_2 +356 0x0800 //TX_DT_BINVAD_TH_3 +357 0x0000 //TX_DT_BINVAD_ENDF +358 0x1000 //TX_C_POST_FLT_DT +359 0x7FFF //TX_NS_B_POST_FLT_LESSCUT +360 0x0100 //TX_DT_BOOST +361 0x0000 //TX_BF_SGRAD_FLG +362 0x0005 //TX_BF_DVG_TH +363 0x001E //TX_SN_C_F +364 0x0000 //TX_K_APT +365 0x0001 //TX_NOISEDET +366 0x0190 //TX_NDETCT +367 0x000A //TX_NOISE_TH_0 +368 0x7FFF //TX_NOISE_TH_0_2 +369 0x7FFF //TX_NOISE_TH_0_3 +370 0x00C6 //TX_NOISE_TH_1 +371 0x0DAC //TX_NOISE_TH_2 +372 0x2260 //TX_NOISE_TH_3 +373 0x7080 //TX_NOISE_TH_4 +374 0x57E4 //TX_NOISE_TH_5 +375 0x4BD6 //TX_NOISE_TH_5_2 +376 0x0001 //TX_NOISE_TH_5_3 +377 0x4E20 //TX_NOISE_TH_5_4 +378 0x1194 //TX_NOISE_TH_6 +379 0x0014 //TX_MINENOISE_TH +380 0xD508 //TX_MORENS_TFMASK_TH +381 0x0001 //TX_DRC_QUIET_FLOOR +382 0x6D60 //TX_RATIODTL_CUT_TH +383 0x0DAC //TX_DT_CUT_K1 +384 0x00A5 //TX_OUT_ENER_S_TH_CLEAN +385 0x00A5 //TX_OUT_ENER_S_TH_LESSCLEAN +386 0x00A5 //TX_OUT_ENER_S_TH_NOISY +387 0x0029 //TX_OUT_ENER_TH_NOISE +388 0x0200 //TX_OUT_ENER_TH_SPEECH +389 0x2000 //TX_SN_NPB_GAIN +390 0x0000 //TX_NN_NPB_GAIN +391 0x3000 //TX_POST_MASK_SUP_HSNE +392 0x07D0 //TX_TAIL_DET_TH +393 0x4000 //TX_B_LESSCUT_RTO_WTA +394 0x0000 //TX_MEL_G_R +395 0x0080 //TX_SUPHIGH_TH +396 0x0000 //TX_MASK_G_R +397 0x0002 //TX_EXTRA_NS_L +398 0x1800 //TX_C_POST_FLT_MASK +399 0x7FFF //TX_A_POST_FLT_WNS +400 0x0148 //TX_MIN_G_LOW300HZ +401 0x0004 //TX_MAXLEVEL_CNG +402 0x00B4 //TX_STN_NOISE_TH +403 0x4000 //TX_POST_MASK_SUP +404 0x7FFF //TX_POST_MASK_ADJUST +405 0x00C8 //TX_NS_ENOISE_MIC0_TH +406 0x0014 //TX_MINENOISE_MIC0_TH +407 0x012C //TX_MINENOISE_MIC0_S_TH +408 0x2900 //TX_MIN_G_CTRL_SSNS +409 0x0800 //TX_METAL_RTO_THR +410 0x0FA0 //TX_NS_FP_K_METAL +411 0x3A98 //TX_NOISEDET_BOOST_TH +412 0x0FA0 //TX_NSMOOTH_TH +413 0x0000 //TX_NS_RESRV_8 +414 0x1800 //TX_RHO_UPB +415 0x2328 //TX_N_HOLD_HS +416 0x006E //TX_N_RHO_BFR0 +417 0x7FFF //TX_LAMBDA_ARSP_EST +418 0x0100 //TX_EXTRA_GAIN_MICBLOCK +419 0x0333 //TX_THR_STD_NSR +420 0x019A //TX_THR_STD_PLH +421 0x03E8 //TX_N_HOLD_STD +422 0x0066 //TX_THR_STD_RHO +423 0x2800 //TX_BF_RESET_THR_HS +424 0x0CCD //TX_SB_RTO_MEAN_TH +425 0x0300 //TX_SB_RHO_MEAN_TH_NTALK +426 0x2000 //TX_SB_RTO_MEAN_TH_ABN +427 0x2EE0 //TX_SB_RTO_MEAN_TH_RUB +428 0x0990 //TX_WTA_EN_RTO_TH +429 0x1400 //TX_TOP_ENER_TH_F +430 0x0100 //TX_DESIRED_TALK_HOLDT +431 0x0800 //TX_MIC_BLOCK_FACTOR +432 0x0000 //TX_NSEST_BFRLRNRDC +433 0x0000 //TX_THR_POST_FLT_HS +434 0x0010 //TX_HS_VAD_BIN +435 0x2666 //TX_THR_VAD_HS +436 0x2CCD //TX_MEAN_RTO_MIN_TH2 +437 0x0032 //TX_SILENCE_T +438 0x0000 //TX_A_POST_FLT_WTA +439 0x799A //TX_LAMBDA_PFLT_WTA +440 0x051E //TX_SB_RHO_MEAN2_TH +441 0x02F0 //TX_SB_RHO_MEAN3_TH +442 0x0000 //TX_HS_RESRV_4 +443 0x0000 //TX_HS_RESRV_5 +444 0x0001 //TX_DOA_VAD_THR_1 +445 0x003C //TX_DOA_VAD_THR_2 +446 0x0028 //TX_DOA_VAD_THR1_0 +447 0x0028 //TX_DOA_VAD_THR1_1 +448 0x0000 //TX_SRC_DOA_RNG_LOW_0A +449 0x001E //TX_SRC_DOA_RNG_HIGH_0A +450 0x005A //TX_DFLT_SRC_DOA_0A +451 0x0000 //TX_SRC_DOA_RNG_LOW_0B +452 0x0000 //TX_SRC_DOA_RNG_HIGH_0B +453 0x0000 //TX_DFLT_SRC_DOA_0B +454 0x0000 //TX_SRC_DOA_RNG_LOW_0C +455 0x0000 //TX_SRC_DOA_RNG_HIGH_0C +456 0x0000 //TX_DFLT_SRC_DOA_0C +457 0x0000 //TX_SRC_DOA_RNG_LOW_0D +458 0x0000 //TX_SRC_DOA_RNG_HIGH_0D +459 0x0000 //TX_DFLT_SRC_DOA_0D +460 0x0000 //TX_SRC_DOA_RNG_LOW_1A +461 0x00B4 //TX_SRC_DOA_RNG_HIGH_1A +462 0x005A //TX_DFLT_SRC_DOA_1A +463 0x0000 //TX_SRC_DOA_RNG_LOW_1B +464 0x00B4 //TX_SRC_DOA_RNG_HIGH_1B +465 0x005A //TX_DFLT_SRC_DOA_1B +466 0x0000 //TX_SRC_DOA_RNG_LOW_1C +467 0x00B4 //TX_SRC_DOA_RNG_HIGH_1C +468 0x005A //TX_DFLT_SRC_DOA_1C +469 0x0000 //TX_SRC_DOA_RNG_LOW_1D +470 0x00B4 //TX_SRC_DOA_RNG_HIGH_1D +471 0x005A //TX_DFLT_SRC_DOA_1D +472 0x0100 //TX_BF_HOLDOFF_T +473 0x7FFF //TX_DOA_COST_FACTOR +474 0x0D9A //TX_MAINTOREFR_TH0 +475 0x071C //TX_DOA_TRK_THR +476 0x012C //TX_DOA_TRACK_HT +477 0x0200 //TX_N1_HOLD_HF +478 0x0100 //TX_N2_HOLD_HF +479 0x2A3D //TX_BF_RESET_THR_HF +480 0x7333 //TX_DOA_SMOOTH +481 0x0800 //TX_MU_BF +482 0x0800 //TX_BF_MU_LF_B2 +483 0x0040 //TX_BF_FC_END_BIN_B2 +484 0x0020 //TX_BF_FC_END_BIN +485 0x0000 //TX_HF_RESRV_25 +486 0x0000 //TX_HF_RESRV_26 +487 0x0007 //TX_N_DOA_SEED +488 0x0001 //TX_FINE_DOA_SEARCH_FLG +489 0x0000 //TX_HF_RESRV_27 +490 0x038E //TX_DLT_SRC_DOA_RNG +491 0x0200 //TX_BF_MU_LF +492 0x0000 //TX_DFLT_SRC_LOC_0 +493 0x7FFF //TX_DFLT_SRC_LOC_1 +494 0x0000 //TX_DFLT_SRC_LOC_2 +495 0x038E //TX_DOA_TRACK_VADTH +496 0x0000 //TX_DOA_TRACK_NEW +497 0x0300 //TX_NOR_OFF_THR +498 0x7C00 //TX_MORE_ON_700HZ_THR +499 0x2000 //TX_MU_BF_ADPT_NS +500 0x0000 //TX_ADAPT_LEN +501 0x6666 //TX_MORE_SNS +502 0x0000 //TX_NOR_OFF_TH1 +503 0x0000 //TX_WIDE_MASK_TH +504 0xD333 //TX_SUBSNRATIOHIGH4MEANBCK_THR +505 0x6000 //TX_C_POST_FLT_CUT +506 0x2000 //TX_RADIODTLV +507 0x0320 //TX_POWER_LINEIN_TH +508 0x0014 //TX_FE_VADCOUNT_TH_FC +509 0x0000 //TX_ECHO_SUPP_FC +510 0x0C80 //TX_ECHO_TH +511 0x6666 //TX_MIC_TO_BFGAIN +512 0x0000 //TX_MICTOBFGAIN0 +513 0x0000 //TX_FASTMUE_TH +514 0x2CCC //TX_DEREVERB_LF_MU +515 0x3200 //TX_DEREVERB_HF_MU +516 0x0007 //TX_DEREVERB_DELAY +517 0x0004 //TX_DEREVERB_COEF_LEN +518 0x0003 //TX_DEREVERB_DNR +519 0x0000 //TX_DEREVERB_ALPHA +520 0x0000 //TX_DEREVERB_BETA +521 0x3A98 //TX_GSC_RTOL_TH +522 0x3A98 //TX_GSC_RTOH_TH +523 0x7E2C //TX_WIDE2_MEANHTH +524 0x0000 //TX_DR_RESRV_5 +525 0x0000 //TX_DR_RESRV_6 +526 0x0000 //TX_DR_RESRV_7 +527 0x0000 //TX_DR_RESRV_8 +528 0x1333 //TX_WIND_MARK_TH +529 0x399A //TX_CORR_THR +530 0x0004 //TX_SNR_THR +531 0x0010 //TX_ENGY_THR +532 0x1770 //TX_CORR_HIGH_TH +533 0x6000 //TX_ENGY_THR_2 +534 0x3400 //TX_MEAN_RTO_THR +535 0x0028 //TX_WNS_ENOISE_MIC0_TH +536 0x3000 //TX_RATIOMICL_TH +537 0x7FFF //TX_CALIG_HS +538 0x0000 //TX_LVL_CTRL +539 0x0010 //TX_WIND_SUPRTO +540 0x0014 //TX_WNS_MIN_G +541 0x0600 //TX_WNS_B_POST_FLT +542 0x3000 //TX_RATIOMICH_TH +543 0xD120 //TX_WIND_INBEAM_L_TH +544 0x0FA0 //TX_WIND_INBEAM_H_TH +545 0x2000 //TX_WNS_RESRV_0 +546 0x59D8 //TX_WNS_RESRV_1 +547 0x0200 //TX_WNS_RESRV_2 +548 0x0000 //TX_WNS_RESRV_3 +549 0x0000 //TX_WNS_RESRV_4 +550 0x0000 //TX_WNS_RESRV_5 +551 0x0000 //TX_WNS_RESRV_6 +552 0x0000 //TX_PB_B_POST_FLT_LESSCUT +553 0x0070 //TX_BF_LESSCUT_BBIN +554 0x0070 //TX_BF_LESSCUT_EBIN +555 0x0010 //TX_POSTBFB0 +556 0x0070 //TX_POSTBFB +557 0x00B0 //TX_POSTBFE +558 0x0E66 //TX_SPEECH_SNR_TH +559 0x0050 //TX_PB_MAX_PRI_SNR_TH +560 0x770A //TX_MAX_PRI_SNR_TH_L +561 0x0000 //TX_PFGAIN +562 0x0000 //TX_MAINTOREFR_TH +563 0x0000 //TX_SAM_MARK +564 0x0000 //TX_PB_RESRV_0 +565 0x0000 //TX_PB_RESRV_1 +566 0x0030 //TX_FDEQ_SUBNUM +567 0x5C54 //TX_FDEQ_GAIN_0 +568 0x5048 //TX_FDEQ_GAIN_1 +569 0x4C4C //TX_FDEQ_GAIN_2 +570 0x494D //TX_FDEQ_GAIN_3 +571 0x4442 //TX_FDEQ_GAIN_4 +572 0x4448 //TX_FDEQ_GAIN_5 +573 0x4C53 //TX_FDEQ_GAIN_6 +574 0x6244 //TX_FDEQ_GAIN_7 +575 0x4348 //TX_FDEQ_GAIN_8 +576 0x4848 //TX_FDEQ_GAIN_9 +577 0x4A49 //TX_FDEQ_GAIN_10 +578 0x4E4A //TX_FDEQ_GAIN_11 +579 0x4840 //TX_FDEQ_GAIN_12 +580 0x4040 //TX_FDEQ_GAIN_13 +581 0x4054 //TX_FDEQ_GAIN_14 +582 0x687A //TX_FDEQ_GAIN_15 +583 0x4848 //TX_FDEQ_GAIN_16 +584 0x4848 //TX_FDEQ_GAIN_17 +585 0x4848 //TX_FDEQ_GAIN_18 +586 0x4848 //TX_FDEQ_GAIN_19 +587 0x4848 //TX_FDEQ_GAIN_20 +588 0x4848 //TX_FDEQ_GAIN_21 +589 0x4848 //TX_FDEQ_GAIN_22 +590 0x4848 //TX_FDEQ_GAIN_23 +591 0x0202 //TX_FDEQ_BIN_0 +592 0x0104 //TX_FDEQ_BIN_1 +593 0x0502 //TX_FDEQ_BIN_2 +594 0x0202 //TX_FDEQ_BIN_3 +595 0x0504 //TX_FDEQ_BIN_4 +596 0x0708 //TX_FDEQ_BIN_5 +597 0x0808 //TX_FDEQ_BIN_6 +598 0x050E //TX_FDEQ_BIN_7 +599 0x0B0C //TX_FDEQ_BIN_8 +600 0x0F0F //TX_FDEQ_BIN_9 +601 0x0E0D //TX_FDEQ_BIN_10 +602 0x0F28 //TX_FDEQ_BIN_11 +603 0x111B //TX_FDEQ_BIN_12 +604 0x291E //TX_FDEQ_BIN_13 +605 0x1E10 //TX_FDEQ_BIN_14 +606 0x1810 //TX_FDEQ_BIN_15 +607 0x1021 //TX_FDEQ_BIN_16 +608 0x1000 //TX_FDEQ_BIN_17 +609 0x0000 //TX_FDEQ_BIN_18 +610 0x0000 //TX_FDEQ_BIN_19 +611 0x0000 //TX_FDEQ_BIN_20 +612 0x0000 //TX_FDEQ_BIN_21 +613 0x0000 //TX_FDEQ_BIN_22 +614 0x0000 //TX_FDEQ_BIN_23 +615 0x0000 //TX_FDEQ_PADDING +616 0x0030 //TX_PREEQ_SUBNUM_MIC0 +617 0x4848 //TX_PREEQ_GAIN_MIC0_0 +618 0x4848 //TX_PREEQ_GAIN_MIC0_1 +619 0x4848 //TX_PREEQ_GAIN_MIC0_2 +620 0x4848 //TX_PREEQ_GAIN_MIC0_3 +621 0x4848 //TX_PREEQ_GAIN_MIC0_4 +622 0x4848 //TX_PREEQ_GAIN_MIC0_5 +623 0x4848 //TX_PREEQ_GAIN_MIC0_6 +624 0x4848 //TX_PREEQ_GAIN_MIC0_7 +625 0x4848 //TX_PREEQ_GAIN_MIC0_8 +626 0x4848 //TX_PREEQ_GAIN_MIC0_9 +627 0x4848 //TX_PREEQ_GAIN_MIC0_10 +628 0x4848 //TX_PREEQ_GAIN_MIC0_11 +629 0x4848 //TX_PREEQ_GAIN_MIC0_12 +630 0x4848 //TX_PREEQ_GAIN_MIC0_13 +631 0x4848 //TX_PREEQ_GAIN_MIC0_14 +632 0x4848 //TX_PREEQ_GAIN_MIC0_15 +633 0x4848 //TX_PREEQ_GAIN_MIC0_16 +634 0x4848 //TX_PREEQ_GAIN_MIC0_17 +635 0x4848 //TX_PREEQ_GAIN_MIC0_18 +636 0x4848 //TX_PREEQ_GAIN_MIC0_19 +637 0x4848 //TX_PREEQ_GAIN_MIC0_20 +638 0x4848 //TX_PREEQ_GAIN_MIC0_21 +639 0x4848 //TX_PREEQ_GAIN_MIC0_22 +640 0x4848 //TX_PREEQ_GAIN_MIC0_23 +641 0x251A //TX_PREEQ_BIN_MIC0_0 +642 0x0F0F //TX_PREEQ_BIN_MIC0_1 +643 0x0C0C //TX_PREEQ_BIN_MIC0_2 +644 0x0C0F //TX_PREEQ_BIN_MIC0_3 +645 0x0F0F //TX_PREEQ_BIN_MIC0_4 +646 0x0F09 //TX_PREEQ_BIN_MIC0_5 +647 0x0909 //TX_PREEQ_BIN_MIC0_6 +648 0x0908 //TX_PREEQ_BIN_MIC0_7 +649 0x070F //TX_PREEQ_BIN_MIC0_8 +650 0x1F08 //TX_PREEQ_BIN_MIC0_9 +651 0x0808 //TX_PREEQ_BIN_MIC0_10 +652 0x0920 //TX_PREEQ_BIN_MIC0_11 +653 0x2020 //TX_PREEQ_BIN_MIC0_12 +654 0x2021 //TX_PREEQ_BIN_MIC0_13 +655 0x0000 //TX_PREEQ_BIN_MIC0_14 +656 0x0000 //TX_PREEQ_BIN_MIC0_15 +657 0x0000 //TX_PREEQ_BIN_MIC0_16 +658 0x0000 //TX_PREEQ_BIN_MIC0_17 +659 0x0000 //TX_PREEQ_BIN_MIC0_18 +660 0x0000 //TX_PREEQ_BIN_MIC0_19 +661 0x0000 //TX_PREEQ_BIN_MIC0_20 +662 0x0000 //TX_PREEQ_BIN_MIC0_21 +663 0x0000 //TX_PREEQ_BIN_MIC0_22 +664 0x0000 //TX_PREEQ_BIN_MIC0_23 +665 0x0030 //TX_PREEQ_SUBNUM_MIC1 +666 0x4848 //TX_PREEQ_GAIN_MIC1_0 +667 0x4848 //TX_PREEQ_GAIN_MIC1_1 +668 0x4848 //TX_PREEQ_GAIN_MIC1_2 +669 0x4848 //TX_PREEQ_GAIN_MIC1_3 +670 0x4848 //TX_PREEQ_GAIN_MIC1_4 +671 0x4848 //TX_PREEQ_GAIN_MIC1_5 +672 0x494A //TX_PREEQ_GAIN_MIC1_6 +673 0x4B4C //TX_PREEQ_GAIN_MIC1_7 +674 0x4D4E //TX_PREEQ_GAIN_MIC1_8 +675 0x4F52 //TX_PREEQ_GAIN_MIC1_9 +676 0x5355 //TX_PREEQ_GAIN_MIC1_10 +677 0x585C //TX_PREEQ_GAIN_MIC1_11 +678 0x616A //TX_PREEQ_GAIN_MIC1_12 +679 0x726E //TX_PREEQ_GAIN_MIC1_13 +680 0x5C48 //TX_PREEQ_GAIN_MIC1_14 +681 0x3B38 //TX_PREEQ_GAIN_MIC1_15 +682 0x4848 //TX_PREEQ_GAIN_MIC1_16 +683 0x4848 //TX_PREEQ_GAIN_MIC1_17 +684 0x4848 //TX_PREEQ_GAIN_MIC1_18 +685 0x4848 //TX_PREEQ_GAIN_MIC1_19 +686 0x4848 //TX_PREEQ_GAIN_MIC1_20 +687 0x4848 //TX_PREEQ_GAIN_MIC1_21 +688 0x4848 //TX_PREEQ_GAIN_MIC1_22 +689 0x4848 //TX_PREEQ_GAIN_MIC1_23 +690 0x0202 //TX_PREEQ_BIN_MIC1_0 +691 0x0203 //TX_PREEQ_BIN_MIC1_1 +692 0x0303 //TX_PREEQ_BIN_MIC1_2 +693 0x0304 //TX_PREEQ_BIN_MIC1_3 +694 0x0405 //TX_PREEQ_BIN_MIC1_4 +695 0x0506 //TX_PREEQ_BIN_MIC1_5 +696 0x0708 //TX_PREEQ_BIN_MIC1_6 +697 0x090A //TX_PREEQ_BIN_MIC1_7 +698 0x0B0C //TX_PREEQ_BIN_MIC1_8 +699 0x0D0E //TX_PREEQ_BIN_MIC1_9 +700 0x1013 //TX_PREEQ_BIN_MIC1_10 +701 0x1719 //TX_PREEQ_BIN_MIC1_11 +702 0x1B1E //TX_PREEQ_BIN_MIC1_12 +703 0x1E1E //TX_PREEQ_BIN_MIC1_13 +704 0x1E28 //TX_PREEQ_BIN_MIC1_14 +705 0x3042 //TX_PREEQ_BIN_MIC1_15 +706 0x0000 //TX_PREEQ_BIN_MIC1_16 +707 0x0000 //TX_PREEQ_BIN_MIC1_17 +708 0x0000 //TX_PREEQ_BIN_MIC1_18 +709 0x0000 //TX_PREEQ_BIN_MIC1_19 +710 0x0000 //TX_PREEQ_BIN_MIC1_20 +711 0x0000 //TX_PREEQ_BIN_MIC1_21 +712 0x0000 //TX_PREEQ_BIN_MIC1_22 +713 0x0000 //TX_PREEQ_BIN_MIC1_23 +714 0x0030 //TX_PREEQ_SUBNUM_MIC2 +715 0x4848 //TX_PREEQ_GAIN_MIC2_0 +716 0x4848 //TX_PREEQ_GAIN_MIC2_1 +717 0x4848 //TX_PREEQ_GAIN_MIC2_2 +718 0x4848 //TX_PREEQ_GAIN_MIC2_3 +719 0x4848 //TX_PREEQ_GAIN_MIC2_4 +720 0x4848 //TX_PREEQ_GAIN_MIC2_5 +721 0x4848 //TX_PREEQ_GAIN_MIC2_6 +722 0x4848 //TX_PREEQ_GAIN_MIC2_7 +723 0x4848 //TX_PREEQ_GAIN_MIC2_8 +724 0x4848 //TX_PREEQ_GAIN_MIC2_9 +725 0x4848 //TX_PREEQ_GAIN_MIC2_10 +726 0x4848 //TX_PREEQ_GAIN_MIC2_11 +727 0x4848 //TX_PREEQ_GAIN_MIC2_12 +728 0x4848 //TX_PREEQ_GAIN_MIC2_13 +729 0x4848 //TX_PREEQ_GAIN_MIC2_14 +730 0x4848 //TX_PREEQ_GAIN_MIC2_15 +731 0x4848 //TX_PREEQ_GAIN_MIC2_16 +732 0x4848 //TX_PREEQ_GAIN_MIC2_17 +733 0x4848 //TX_PREEQ_GAIN_MIC2_18 +734 0x4848 //TX_PREEQ_GAIN_MIC2_19 +735 0x4848 //TX_PREEQ_GAIN_MIC2_20 +736 0x4848 //TX_PREEQ_GAIN_MIC2_21 +737 0x4848 //TX_PREEQ_GAIN_MIC2_22 +738 0x4848 //TX_PREEQ_GAIN_MIC2_23 +739 0x0608 //TX_PREEQ_BIN_MIC2_0 +740 0x0808 //TX_PREEQ_BIN_MIC2_1 +741 0x0808 //TX_PREEQ_BIN_MIC2_2 +742 0x0808 //TX_PREEQ_BIN_MIC2_3 +743 0x0808 //TX_PREEQ_BIN_MIC2_4 +744 0x0808 //TX_PREEQ_BIN_MIC2_5 +745 0x0808 //TX_PREEQ_BIN_MIC2_6 +746 0x0808 //TX_PREEQ_BIN_MIC2_7 +747 0x0808 //TX_PREEQ_BIN_MIC2_8 +748 0x0808 //TX_PREEQ_BIN_MIC2_9 +749 0x0808 //TX_PREEQ_BIN_MIC2_10 +750 0x0808 //TX_PREEQ_BIN_MIC2_11 +751 0x0808 //TX_PREEQ_BIN_MIC2_12 +752 0x0808 //TX_PREEQ_BIN_MIC2_13 +753 0x0808 //TX_PREEQ_BIN_MIC2_14 +754 0x0200 //TX_PREEQ_BIN_MIC2_15 +755 0x0000 //TX_PREEQ_BIN_MIC2_16 +756 0x0000 //TX_PREEQ_BIN_MIC2_17 +757 0x0000 //TX_PREEQ_BIN_MIC2_18 +758 0x0000 //TX_PREEQ_BIN_MIC2_19 +759 0x0000 //TX_PREEQ_BIN_MIC2_20 +760 0x0000 //TX_PREEQ_BIN_MIC2_21 +761 0x0000 //TX_PREEQ_BIN_MIC2_22 +762 0x0000 //TX_PREEQ_BIN_MIC2_23 +763 0x0006 //TX_MASKING_ABILITY +764 0x0800 //TX_NND_WEIGHT +765 0x0050 //TX_MIC_CALIBRATION_0 +766 0x0056 //TX_MIC_CALIBRATION_1 +767 0x0050 //TX_MIC_CALIBRATION_2 +768 0x0050 //TX_MIC_CALIBRATION_3 +769 0x0046 //TX_MIC_PWR_BIAS_0 +770 0x0042 //TX_MIC_PWR_BIAS_1 +771 0x0046 //TX_MIC_PWR_BIAS_2 +772 0x0046 //TX_MIC_PWR_BIAS_3 +773 0x0000 //TX_GAIN_LIMIT_0 +774 0x0006 //TX_GAIN_LIMIT_1 +775 0x0000 //TX_GAIN_LIMIT_2 +776 0x0000 //TX_GAIN_LIMIT_3 +777 0x7F5B //TX_BVE_NOVAD0_ALPHADOWN +778 0x7FDE //TX_BVE_VAD0_ALPHAUP +779 0x7F3A //TX_BVE_VAD0_ALPHADOWN +780 0x2000 //TX_BVE_GAINWEIGHT_NOFEVADLI +781 0x7F5B //TX_BVE_FEVADLI_ALPHA +782 0x7F19 //TX_BVE_NOVAD0_ALPHAUP +783 0x1000 //TX_TDDRC_ALPHA_UP_01 +784 0x1000 //TX_TDDRC_ALPHA_UP_02 +785 0x1000 //TX_TDDRC_ALPHA_UP_03 +786 0x1000 //TX_TDDRC_ALPHA_UP_04 +787 0x7EB8 //TX_TDDRC_ALPHA_DWN_01 +788 0x7EB8 //TX_TDDRC_ALPHA_DWN_02 +789 0x7EB8 //TX_TDDRC_ALPHA_DWN_03 +790 0x7EB8 //TX_TDDRC_ALPHA_DWN_04 +791 0x7FFF //TX_TDDRC_TD_DRC_LIMIT +792 0x0800 //TX_TDDRC_POST_LIMIT_GAIN +793 0x0000 //TX_TDDRC_RESRV_0 +794 0x0000 //TX_TDDRC_RESRV_1 +795 0x0018 //TX_FDDRC_BAND_MARGIN_0 +796 0x0030 //TX_FDDRC_BAND_MARGIN_1 +797 0x0050 //TX_FDDRC_BAND_MARGIN_2 +798 0x0080 //TX_FDDRC_BAND_MARGIN_3 +799 0x0007 //TX_FDDRC_BLOCK_EXP +800 0x5000 //TX_FDDRC_THRD_2_0 +801 0x5000 //TX_FDDRC_THRD_2_1 +802 0x5000 //TX_FDDRC_THRD_2_2 +803 0x5000 //TX_FDDRC_THRD_2_3 +804 0x6400 //TX_FDDRC_THRD_3_0 +805 0x6400 //TX_FDDRC_THRD_3_1 +806 0x6400 //TX_FDDRC_THRD_3_2 +807 0x6400 //TX_FDDRC_THRD_3_3 +808 0x2000 //TX_FDDRC_SLANT_0_0 +809 0x2000 //TX_FDDRC_SLANT_0_1 +810 0x2000 //TX_FDDRC_SLANT_0_2 +811 0x2000 //TX_FDDRC_SLANT_0_3 +812 0x5333 //TX_FDDRC_SLANT_1_0 +813 0x5333 //TX_FDDRC_SLANT_1_1 +814 0x5333 //TX_FDDRC_SLANT_1_2 +815 0x5333 //TX_FDDRC_SLANT_1_3 +816 0x0010 //TX_DEADMIC_SILENCE_TH +817 0x0600 //TX_MIC_DEGRADE_TH +818 0x0078 //TX_DEADMIC_CNT +819 0x0078 //TX_MIC_DEGRADE_CNT +820 0x0000 //TX_FDDRC_RESRV_4 +821 0x0000 //TX_FDDRC_RESRV_5 +822 0x0000 //TX_FDDRC_RESRV_6 +823 0x7FFF //TX_KS_NOISEPASTE_FACTOR +824 0x0001 //TX_KS_CONFIG +825 0x7FFF //TX_KS_GAIN_MIN +826 0x0000 //TX_KS_RESRV_0 +827 0x0000 //TX_KS_RESRV_1 +828 0x0000 //TX_KS_RESRV_2 +829 0x7C00 //TX_LAMBDA_PKA_FP +830 0x2000 //TX_TPKA_FP +831 0x0080 //TX_MIN_G_FP +832 0x2000 //TX_MAX_G_FP +833 0x0FA0 //TX_FFP_FP_K_METAL +834 0x4000 //TX_A_POST_FLT_FP +835 0x0F5C //TX_RTO_OUTBEAM_TH +836 0x4CCD //TX_TPKA_FP_THD +837 0x0000 //TX_MAX_G_FP_BLK +838 0x0000 //TX_FFP_FADEIN +839 0x0000 //TX_FFP_FADEOUT +840 0x0000 //TX_WHISPERCTH +841 0x0000 //TX_WHISPERHOLDT +842 0x0000 //TX_WHISP_ENTHH +843 0x0000 //TX_WHISP_ENTHL +844 0x0000 //TX_WHISP_RTOTH +845 0x0000 //TX_WHISP_RTOTH2 +846 0x0096 //TX_MUTE_PERIOD +847 0x0000 //TX_FADE_IN_PERIOD +848 0x0100 //TX_FFP_RESRV_2 +849 0x0020 //TX_FFP_RESRV_3 +850 0x0000 //TX_FFP_RESRV_4 +851 0x0000 //TX_FFP_RESRV_5 +852 0x0000 //TX_FFP_RESRV_6 +853 0x0002 //TX_FILTINDX +854 0x0002 //TX_TDDRC_THRD_0 +855 0x0003 //TX_TDDRC_THRD_1 +856 0x1500 //TX_TDDRC_THRD_2 +857 0x1500 //TX_TDDRC_THRD_3 +858 0x3000 //TX_TDDRC_SLANT_0 +859 0x6E00 //TX_TDDRC_SLANT_1 +860 0x1000 //TX_TDDRC_ALPHA_UP_00 +861 0x7EB8 //TX_TDDRC_ALPHA_DWN_00 +862 0x0000 //TX_TDDRC_HMNC_FLAG +863 0x199A //TX_TDDRC_HMNC_GAIN +864 0x0000 //TX_TDDRC_SMT_FLAG +865 0x0CCD //TX_TDDRC_SMT_W +866 0x0650 //TX_TDDRC_DRC_GAIN +867 0x7FFF //TX_TDDRC_LMT_THRD +868 0x0000 //TX_TDDRC_LMT_ALPHA +869 0x0000 //TX_TFMASKLTH +870 0x0000 //TX_TFMASKLTHL +871 0x0CCD //TX_TFMASKHTH +872 0xECCD //TX_TFMASKLTH_BINVAD +873 0xFCCD //TX_TFMASKLTH_NS_EST +874 0xF800 //TX_TFMASKLTH_DOA +875 0x0CCD //TX_TFMASKTH_BLESSCUT +876 0x1000 //TX_B_LESSCUT_RTO_MASK +877 0x2000 //TX_SB_RHO_MEAN_TH_ABN +878 0x2000 //TX_B_POST_FLT_MASK +879 0x0000 //TX_B_POST_FLT_MASK1 +880 0x6333 //TX_GAIN_WIND_MASK +881 0x0000 //TX_TFMASK_BFSTRICT_MUSIC +882 0x0000 //TX_TFMASK_BFSTRICT_NOMUSIC +883 0x7333 //TX_FASTNS_OUTIN_TH +884 0x0CCD //TX_FASTNS_TFMASK_TH +885 0x0CCD //TX_FASTNS_TFMASKBIN_TH1 +886 0x0CCD //TX_FASTNS_TFMASKBIN_TH2 +887 0x0CCD //TX_FASTNS_TFMASKBIN_TH3 +888 0x0028 //TX_FASTNS_ARSPC_TH +889 0xC000 //TX_FASTNS_MASK5_TH +890 0x0810 //TX_POSTSSA_MIN_G_VR_MASK +891 0x1000 //TX_A_LESSCUT_RTO_MASK +892 0x1770 //TX_FASTNS_NOISETH +893 0xC000 //TX_FASTNS_SSA_THLFL +894 0xC000 //TX_FASTNS_SSA_THHFL +895 0xCCCC //TX_FASTNS_SSA_THLFH +896 0xD999 //TX_FASTNS_SSA_THHFH +897 0x2339 //TX_SENDFUNC_REG_MICMUTE +898 0x0021 //TX_SENDFUNC_REG_MICMUTE1 +899 0x02BC //TX_MICMUTE_RATIO_THR +900 0x0140 //TX_MICMUTE_AMP_THR +901 0x0004 //TX_MICMUTE_HPF_IND +902 0x00C0 //TX_MICMUTE_LOG_EYR_TH +903 0x0008 //TX_MICMUTE_CVG_TIME +904 0x0008 //TX_MICMUTE_RELEASE_TIME +905 0x01FE //TX_MIC_VOLUME_MIC0MUTE +906 0x0020 //TX_MICMUTE_EPD_OFFSET_0 +907 0x001E //TX_MICMUTE_FRQ_AEC_L +908 0x7999 //TX_MICMUTE_EAD_THR +909 0x7FFF //TX_MICMUTE_LAMBDA_CB_NLE +910 0x7FFF //TX_MICMUTE_LAMBDA_RE_EST +911 0x4000 //TX_DTD_THR1_MICMUTE_0 +912 0x7000 //TX_DTD_THR1_MICMUTE_1 +913 0x7FFF //TX_DTD_THR1_MICMUTE_2 +914 0x7FFF //TX_DTD_THR1_MICMUTE_3 +915 0x6CCC //TX_DTD_THR2_MICMUTE_0 +916 0x0400 //TX_MICMUTE_MIN_EQ_RE_EST_0 +917 0x0400 //TX_MICMUTE_MIN_EQ_RE_EST_1 +918 0x1000 //TX_MICMUTE_MIN_EQ_RE_EST_2 +919 0x7FFF //TX_MICMUTE_MIN_EQ_RE_EST_3 +920 0x7FFF //TX_MICMUTE_MIN_EQ_RE_EST_4 +921 0x4000 //TX_MICMUTE_C_POST_FLT +922 0x03E8 //TX_MICMUTE_DT_CUT_K +923 0x0001 //TX_MICMUTE_DT_CUT_THR +924 0x03E8 //TX_MICMUTE_DT_CUT_K2 +925 0x0001 //TX_MICMUTE_DT_CUT_THR2 +926 0x0064 //TX_MICMUTE_DT2_HOLD_N +927 0x1000 //TX_MICMUTE_RATIODTH_THCUT +928 0x1000 //TX_MICMUTE_B_POST_FLT_ECHOL +929 0x7FFF //TX_MICMUTE_B_POST_FLT_ECHOH +930 0x0400 //TX_MICMUTE_C_POST_FLT_MASK +931 0x7999 //TX_MICMUTE_RATIODTL_CUT_TH +932 0x0258 //TX_MICMUTE_DT_CUT_K1 +933 0x0800 //TX_MICMUTE_N2_SN_EST +934 0xFC00 //TX_MICMUTE_THR_SN_EST_0 +935 0x001C //TX_MICMUTE_MIN_G_CTRL_0 +936 0x6000 //TX_MICMUTE_A_POST_FILT_S_0 +937 0x7000 //TX_MICMUTE_B_POST_FILT_0 +938 0x2710 //TX_MIC1RUB_AMP_THR +939 0x0010 //TX_MIC1MUTE_RATIO_THR +940 0x0450 //TX_MIC1MUTE_AMP_THR +941 0x0008 //TX_MIC1MUTE_CVG_TIME +942 0x0008 //TX_MIC1MUTE_RELEASE_TIME +943 0x0000 //TX_AMS_RESRV_01 +944 0x0000 //TX_AMS_RESRV_02 +945 0x0000 //TX_AMS_RESRV_03 +946 0x0000 //TX_AMS_RESRV_04 +947 0x0000 //TX_AMS_RESRV_05 +948 0x0000 //TX_AMS_RESRV_06 +949 0x0000 //TX_AMS_RESRV_07 +950 0x0000 //TX_AMS_RESRV_08 +951 0x0000 //TX_AMS_RESRV_09 +952 0x0000 //TX_AMS_RESRV_10 +953 0x0000 //TX_AMS_RESRV_11 +954 0x0000 //TX_AMS_RESRV_12 +955 0x0000 //TX_AMS_RESRV_13 +956 0x0000 //TX_AMS_RESRV_14 +957 0x0000 //TX_AMS_RESRV_15 +958 0x0000 //TX_AMS_RESRV_16 +959 0x0000 //TX_AMS_RESRV_17 +960 0x0000 //TX_AMS_RESRV_18 +961 0x0000 //TX_AMS_RESRV_19 +#RX +0 0x203C //RX_RECVFUNC_MODE_0 +1 0x0000 //RX_RECVFUNC_MODE_1 +2 0x0003 //RX_SAMPLINGFREQ_SIG +3 0x0003 //RX_SAMPLINGFREQ_PROC +4 0x000A //RX_FRAME_SZ +5 0x0000 //RX_DELAY_OPT +6 0x1000 //RX_TDDRC_ALPHA_UP_1 +7 0x1000 //RX_TDDRC_ALPHA_UP_2 +8 0x1000 //RX_TDDRC_ALPHA_UP_3 +9 0x1000 //RX_TDDRC_ALPHA_UP_4 +10 0x05AA //RX_PGA +11 0x7FFF //RX_A_HP +12 0x4000 //RX_B_PE +13 0x5800 //RX_THR_PITCH_DET_0 +14 0x5000 //RX_THR_PITCH_DET_1 +15 0x4000 //RX_THR_PITCH_DET_2 +16 0x0008 //RX_PITCH_BFR_LEN +17 0x0003 //RX_SBD_PITCH_DET +18 0x0100 //RX_PP_RESRV_0 +19 0x0020 //RX_PP_RESRV_1 +20 0x0600 //RX_N_SN_EST +21 0x000C //RX_N2_SN_EST +22 0x000F //RX_NS_LVL_CTRL +23 0xF800 //RX_THR_SN_EST +24 0x7E00 //RX_LAMBDA_PFILT +25 0x000A //RX_FENS_RESRV_0 +26 0x0190 //RX_FENS_RESRV_1 +27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +30 0x0002 //RX_EXTRA_NS_L +31 0x0800 //RX_EXTRA_NS_A +32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +33 0x7000 //RX_TDDRC_LIMITER_THRD +34 0x0800 //RX_TDDRC_LIMITER_GAIN +35 0x199A //RX_A_POST_FLT +36 0x0000 //RX_LMT_THRD +37 0x4000 //RX_LMT_ALPHA +38 0x0020 //RX_FDEQ_SUBNUM +39 0x483E //RX_FDEQ_GAIN_0 +40 0x3E3E //RX_FDEQ_GAIN_1 +41 0x3E4C //RX_FDEQ_GAIN_2 +42 0x5064 //RX_FDEQ_GAIN_3 +43 0x7076 //RX_FDEQ_GAIN_4 +44 0x897A //RX_FDEQ_GAIN_5 +45 0x7C80 //RX_FDEQ_GAIN_6 +46 0x8888 //RX_FDEQ_GAIN_7 +47 0x949C //RX_FDEQ_GAIN_8 +48 0x96A4 //RX_FDEQ_GAIN_9 +49 0xA9A0 //RX_FDEQ_GAIN_10 +50 0x9487 //RX_FDEQ_GAIN_11 +51 0x6F64 //RX_FDEQ_GAIN_12 +52 0x625A //RX_FDEQ_GAIN_13 +53 0x5D80 //RX_FDEQ_GAIN_14 +54 0x8890 //RX_FDEQ_GAIN_15 +55 0x4848 //RX_FDEQ_GAIN_16 +56 0x4848 //RX_FDEQ_GAIN_17 +57 0x4848 //RX_FDEQ_GAIN_18 +58 0x4848 //RX_FDEQ_GAIN_19 +59 0x4848 //RX_FDEQ_GAIN_20 +60 0x4848 //RX_FDEQ_GAIN_21 +61 0x4848 //RX_FDEQ_GAIN_22 +62 0x4848 //RX_FDEQ_GAIN_23 +63 0x0202 //RX_FDEQ_BIN_0 +64 0x0202 //RX_FDEQ_BIN_1 +65 0x0301 //RX_FDEQ_BIN_2 +66 0x0404 //RX_FDEQ_BIN_3 +67 0x0406 //RX_FDEQ_BIN_4 +68 0x0109 //RX_FDEQ_BIN_5 +69 0x0708 //RX_FDEQ_BIN_6 +70 0x090A //RX_FDEQ_BIN_7 +71 0x0B0C //RX_FDEQ_BIN_8 +72 0x0D0E //RX_FDEQ_BIN_9 +73 0x1013 //RX_FDEQ_BIN_10 +74 0x1719 //RX_FDEQ_BIN_11 +75 0x1B0F //RX_FDEQ_BIN_12 +76 0x141E //RX_FDEQ_BIN_13 +77 0x3728 //RX_FDEQ_BIN_14 +78 0x282C //RX_FDEQ_BIN_15 +79 0x0000 //RX_FDEQ_BIN_16 +80 0x0000 //RX_FDEQ_BIN_17 +81 0x0000 //RX_FDEQ_BIN_18 +82 0x0000 //RX_FDEQ_BIN_19 +83 0x0000 //RX_FDEQ_BIN_20 +84 0x0000 //RX_FDEQ_BIN_21 +85 0x0000 //RX_FDEQ_BIN_22 +86 0x0000 //RX_FDEQ_BIN_23 +87 0x4000 //RX_FDEQ_RESRV_0 +88 0x0320 //RX_FDEQ_RESRV_1 +89 0x0018 //RX_FDDRC_BAND_MARGIN_0 +90 0x0030 //RX_FDDRC_BAND_MARGIN_1 +91 0x0050 //RX_FDDRC_BAND_MARGIN_2 +92 0x0080 //RX_FDDRC_BAND_MARGIN_3 +93 0x0007 //RX_FDDRC_BLOCK_EXP +94 0x5000 //RX_FDDRC_THRD_2_0 +95 0x5000 //RX_FDDRC_THRD_2_1 +96 0x5000 //RX_FDDRC_THRD_2_2 +97 0x5000 //RX_FDDRC_THRD_2_3 +98 0x6400 //RX_FDDRC_THRD_3_0 +99 0x6400 //RX_FDDRC_THRD_3_1 +100 0x6400 //RX_FDDRC_THRD_3_2 +101 0x6400 //RX_FDDRC_THRD_3_3 +102 0x2000 //RX_FDDRC_SLANT_0_0 +103 0x2000 //RX_FDDRC_SLANT_0_1 +104 0x2000 //RX_FDDRC_SLANT_0_2 +105 0x2000 //RX_FDDRC_SLANT_0_3 +106 0x5333 //RX_FDDRC_SLANT_1_0 +107 0x5333 //RX_FDDRC_SLANT_1_1 +108 0x5333 //RX_FDDRC_SLANT_1_2 +109 0x5333 //RX_FDDRC_SLANT_1_3 +110 0x0000 //RX_FDDRC_RESRV_0 +111 0x0002 //RX_FILTINDX +112 0x0001 //RX_TDDRC_THRD_0 +113 0x0002 //RX_TDDRC_THRD_1 +114 0x1800 //RX_TDDRC_THRD_2 +115 0x1800 //RX_TDDRC_THRD_3 +116 0x7FFF //RX_TDDRC_SLANT_0 +117 0x7FFF //RX_TDDRC_SLANT_1 +118 0x1000 //RX_TDDRC_ALPHA_UP_0 +119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +120 0x0000 //RX_TDDRC_HMNC_FLAG +121 0x199A //RX_TDDRC_HMNC_GAIN +122 0x0001 //RX_TDDRC_SMT_FLAG +123 0x0CCD //RX_TDDRC_SMT_W +124 0x0551 //RX_TDDRC_DRC_GAIN +125 0x7C00 //RX_LAMBDA_PKA_FP +126 0x13E0 //RX_TPKA_FP +127 0x0080 //RX_MIN_G_FP +128 0x2000 //RX_MAX_G_FP +129 0x0100 //RX_SPK_VOL +130 0x0000 //RX_VOL_RESRV_0 +131 0x0000 //RX_MAXLEVEL_CNG +132 0x3000 //RX_BWE_UV_TH +133 0x3000 //RX_BWE_UV_TH2 +134 0x1800 //RX_BWE_UV_TH3 +135 0x1000 //RX_BWE_V_TH +136 0x04CD //RX_BWE_GAIN1_V_TH1 +137 0x0F33 //RX_BWE_GAIN1_V_TH2 +138 0x7333 //RX_BWE_UV_EQ +139 0x199A //RX_BWE_V_EQ +140 0x7333 //RX_BWE_TONE_TH +141 0x0004 //RX_BWE_UV_HOLD_T +142 0x6CCD //RX_BWE_GAIN2_ALPHA +143 0x799A //RX_BWE_GAIN3_ALPHA +144 0x001E //RX_BWE_CUTOFF +145 0x3000 //RX_BWE_GAINFILL +146 0x3200 //RX_BWE_MAXTH_TONE +147 0x2000 //RX_BWE_EQ_0 +148 0x2000 //RX_BWE_EQ_1 +149 0x2000 //RX_BWE_EQ_2 +150 0x2000 //RX_BWE_EQ_3 +151 0x2000 //RX_BWE_EQ_4 +152 0x2000 //RX_BWE_EQ_5 +153 0x2000 //RX_BWE_EQ_6 +154 0x0000 //RX_BWE_RESRV_0 +155 0x0000 //RX_BWE_RESRV_1 +156 0x0000 //RX_BWE_RESRV_2 +#VOL 0 +6 0x1000 //RX_TDDRC_ALPHA_UP_1 +7 0x1000 //RX_TDDRC_ALPHA_UP_2 +8 0x1000 //RX_TDDRC_ALPHA_UP_3 +9 0x1000 //RX_TDDRC_ALPHA_UP_4 +27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +33 0x7000 //RX_TDDRC_LIMITER_THRD +34 0x0800 //RX_TDDRC_LIMITER_GAIN +112 0x0001 //RX_TDDRC_THRD_0 +113 0x0002 //RX_TDDRC_THRD_1 +114 0x1800 //RX_TDDRC_THRD_2 +115 0x1800 //RX_TDDRC_THRD_3 +116 0x7FFF //RX_TDDRC_SLANT_0 +117 0x7FFF //RX_TDDRC_SLANT_1 +118 0x1000 //RX_TDDRC_ALPHA_UP_0 +119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +120 0x0000 //RX_TDDRC_HMNC_FLAG +121 0x199A //RX_TDDRC_HMNC_GAIN +122 0x0001 //RX_TDDRC_SMT_FLAG +123 0x0CCD //RX_TDDRC_SMT_W +124 0x056F //RX_TDDRC_DRC_GAIN +38 0x0020 //RX_FDEQ_SUBNUM +39 0x483E //RX_FDEQ_GAIN_0 +40 0x3E3E //RX_FDEQ_GAIN_1 +41 0x3E4C //RX_FDEQ_GAIN_2 +42 0x586E //RX_FDEQ_GAIN_3 +43 0x8496 //RX_FDEQ_GAIN_4 +44 0x968E //RX_FDEQ_GAIN_5 +45 0x8488 //RX_FDEQ_GAIN_6 +46 0x8884 //RX_FDEQ_GAIN_7 +47 0x9CA4 //RX_FDEQ_GAIN_8 +48 0x98A8 //RX_FDEQ_GAIN_9 +49 0xBEB8 //RX_FDEQ_GAIN_10 +50 0x918D //RX_FDEQ_GAIN_11 +51 0x7566 //RX_FDEQ_GAIN_12 +52 0x6460 //RX_FDEQ_GAIN_13 +53 0x6174 //RX_FDEQ_GAIN_14 +54 0x7890 //RX_FDEQ_GAIN_15 +55 0x4848 //RX_FDEQ_GAIN_16 +56 0x4848 //RX_FDEQ_GAIN_17 +57 0x4848 //RX_FDEQ_GAIN_18 +58 0x4848 //RX_FDEQ_GAIN_19 +59 0x4848 //RX_FDEQ_GAIN_20 +60 0x4848 //RX_FDEQ_GAIN_21 +61 0x4848 //RX_FDEQ_GAIN_22 +62 0x4848 //RX_FDEQ_GAIN_23 +63 0x0202 //RX_FDEQ_BIN_0 +64 0x0202 //RX_FDEQ_BIN_1 +65 0x0301 //RX_FDEQ_BIN_2 +66 0x0404 //RX_FDEQ_BIN_3 +67 0x0406 //RX_FDEQ_BIN_4 +68 0x0109 //RX_FDEQ_BIN_5 +69 0x0708 //RX_FDEQ_BIN_6 +70 0x090A //RX_FDEQ_BIN_7 +71 0x0B0C //RX_FDEQ_BIN_8 +72 0x0D09 //RX_FDEQ_BIN_9 +73 0x0819 //RX_FDEQ_BIN_10 +74 0x1E19 //RX_FDEQ_BIN_11 +75 0x1B0F //RX_FDEQ_BIN_12 +76 0x141E //RX_FDEQ_BIN_13 +77 0x3728 //RX_FDEQ_BIN_14 +78 0x282C //RX_FDEQ_BIN_15 +79 0x0000 //RX_FDEQ_BIN_16 +80 0x0000 //RX_FDEQ_BIN_17 +81 0x0000 //RX_FDEQ_BIN_18 +82 0x0000 //RX_FDEQ_BIN_19 +83 0x0000 //RX_FDEQ_BIN_20 +84 0x0000 //RX_FDEQ_BIN_21 +85 0x0000 //RX_FDEQ_BIN_22 +86 0x0000 //RX_FDEQ_BIN_23 +87 0x4000 //RX_FDEQ_RESRV_0 +88 0x0320 //RX_FDEQ_RESRV_1 +89 0x0018 //RX_FDDRC_BAND_MARGIN_0 +90 0x0030 //RX_FDDRC_BAND_MARGIN_1 +91 0x0050 //RX_FDDRC_BAND_MARGIN_2 +92 0x0080 //RX_FDDRC_BAND_MARGIN_3 +93 0x0007 //RX_FDDRC_BLOCK_EXP +94 0x5000 //RX_FDDRC_THRD_2_0 +95 0x5000 //RX_FDDRC_THRD_2_1 +96 0x5000 //RX_FDDRC_THRD_2_2 +97 0x5000 //RX_FDDRC_THRD_2_3 +98 0x6400 //RX_FDDRC_THRD_3_0 +99 0x6400 //RX_FDDRC_THRD_3_1 +100 0x6400 //RX_FDDRC_THRD_3_2 +101 0x6400 //RX_FDDRC_THRD_3_3 +102 0x2000 //RX_FDDRC_SLANT_0_0 +103 0x2000 //RX_FDDRC_SLANT_0_1 +104 0x2000 //RX_FDDRC_SLANT_0_2 +105 0x2000 //RX_FDDRC_SLANT_0_3 +106 0x5333 //RX_FDDRC_SLANT_1_0 +107 0x5333 //RX_FDDRC_SLANT_1_1 +108 0x5333 //RX_FDDRC_SLANT_1_2 +109 0x5333 //RX_FDDRC_SLANT_1_3 +110 0x0000 //RX_FDDRC_RESRV_0 +129 0x000A //RX_SPK_VOL +130 0x0000 //RX_VOL_RESRV_0 +#VOL 1 +6 0x1000 //RX_TDDRC_ALPHA_UP_1 +7 0x1000 //RX_TDDRC_ALPHA_UP_2 +8 0x1000 //RX_TDDRC_ALPHA_UP_3 +9 0x1000 //RX_TDDRC_ALPHA_UP_4 +27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +33 0x7000 //RX_TDDRC_LIMITER_THRD +34 0x0800 //RX_TDDRC_LIMITER_GAIN +112 0x0001 //RX_TDDRC_THRD_0 +113 0x0002 //RX_TDDRC_THRD_1 +114 0x1800 //RX_TDDRC_THRD_2 +115 0x1800 //RX_TDDRC_THRD_3 +116 0x7FFF //RX_TDDRC_SLANT_0 +117 0x7FFF //RX_TDDRC_SLANT_1 +118 0x1000 //RX_TDDRC_ALPHA_UP_0 +119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +120 0x0000 //RX_TDDRC_HMNC_FLAG +121 0x199A //RX_TDDRC_HMNC_GAIN +122 0x0001 //RX_TDDRC_SMT_FLAG +123 0x0CCD //RX_TDDRC_SMT_W +124 0x056F //RX_TDDRC_DRC_GAIN +38 0x0020 //RX_FDEQ_SUBNUM +39 0x483E //RX_FDEQ_GAIN_0 +40 0x3E3E //RX_FDEQ_GAIN_1 +41 0x3E4C //RX_FDEQ_GAIN_2 +42 0x586E //RX_FDEQ_GAIN_3 +43 0x8496 //RX_FDEQ_GAIN_4 +44 0x968E //RX_FDEQ_GAIN_5 +45 0x8488 //RX_FDEQ_GAIN_6 +46 0x8884 //RX_FDEQ_GAIN_7 +47 0x9CA4 //RX_FDEQ_GAIN_8 +48 0x98A8 //RX_FDEQ_GAIN_9 +49 0xBEB8 //RX_FDEQ_GAIN_10 +50 0x918D //RX_FDEQ_GAIN_11 +51 0x7566 //RX_FDEQ_GAIN_12 +52 0x6460 //RX_FDEQ_GAIN_13 +53 0x6174 //RX_FDEQ_GAIN_14 +54 0x7890 //RX_FDEQ_GAIN_15 +55 0x4848 //RX_FDEQ_GAIN_16 +56 0x4848 //RX_FDEQ_GAIN_17 +57 0x4848 //RX_FDEQ_GAIN_18 +58 0x4848 //RX_FDEQ_GAIN_19 +59 0x4848 //RX_FDEQ_GAIN_20 +60 0x4848 //RX_FDEQ_GAIN_21 +61 0x4848 //RX_FDEQ_GAIN_22 +62 0x4848 //RX_FDEQ_GAIN_23 +63 0x0202 //RX_FDEQ_BIN_0 +64 0x0202 //RX_FDEQ_BIN_1 +65 0x0301 //RX_FDEQ_BIN_2 +66 0x0404 //RX_FDEQ_BIN_3 +67 0x0406 //RX_FDEQ_BIN_4 +68 0x0109 //RX_FDEQ_BIN_5 +69 0x0708 //RX_FDEQ_BIN_6 +70 0x090A //RX_FDEQ_BIN_7 +71 0x0B0C //RX_FDEQ_BIN_8 +72 0x0D09 //RX_FDEQ_BIN_9 +73 0x0819 //RX_FDEQ_BIN_10 +74 0x1E19 //RX_FDEQ_BIN_11 +75 0x1B0F //RX_FDEQ_BIN_12 +76 0x141E //RX_FDEQ_BIN_13 +77 0x3728 //RX_FDEQ_BIN_14 +78 0x282C //RX_FDEQ_BIN_15 +79 0x0000 //RX_FDEQ_BIN_16 +80 0x0000 //RX_FDEQ_BIN_17 +81 0x0000 //RX_FDEQ_BIN_18 +82 0x0000 //RX_FDEQ_BIN_19 +83 0x0000 //RX_FDEQ_BIN_20 +84 0x0000 //RX_FDEQ_BIN_21 +85 0x0000 //RX_FDEQ_BIN_22 +86 0x0000 //RX_FDEQ_BIN_23 +87 0x4000 //RX_FDEQ_RESRV_0 +88 0x0320 //RX_FDEQ_RESRV_1 +89 0x0018 //RX_FDDRC_BAND_MARGIN_0 +90 0x0030 //RX_FDDRC_BAND_MARGIN_1 +91 0x0050 //RX_FDDRC_BAND_MARGIN_2 +92 0x0080 //RX_FDDRC_BAND_MARGIN_3 +93 0x0007 //RX_FDDRC_BLOCK_EXP +94 0x5000 //RX_FDDRC_THRD_2_0 +95 0x5000 //RX_FDDRC_THRD_2_1 +96 0x5000 //RX_FDDRC_THRD_2_2 +97 0x5000 //RX_FDDRC_THRD_2_3 +98 0x6400 //RX_FDDRC_THRD_3_0 +99 0x6400 //RX_FDDRC_THRD_3_1 +100 0x6400 //RX_FDDRC_THRD_3_2 +101 0x6400 //RX_FDDRC_THRD_3_3 +102 0x2000 //RX_FDDRC_SLANT_0_0 +103 0x2000 //RX_FDDRC_SLANT_0_1 +104 0x2000 //RX_FDDRC_SLANT_0_2 +105 0x2000 //RX_FDDRC_SLANT_0_3 +106 0x5333 //RX_FDDRC_SLANT_1_0 +107 0x5333 //RX_FDDRC_SLANT_1_1 +108 0x5333 //RX_FDDRC_SLANT_1_2 +109 0x5333 //RX_FDDRC_SLANT_1_3 +110 0x0000 //RX_FDDRC_RESRV_0 +129 0x0010 //RX_SPK_VOL +130 0x0000 //RX_VOL_RESRV_0 +#VOL 2 +6 0x1000 //RX_TDDRC_ALPHA_UP_1 +7 0x1000 //RX_TDDRC_ALPHA_UP_2 +8 0x1000 //RX_TDDRC_ALPHA_UP_3 +9 0x1000 //RX_TDDRC_ALPHA_UP_4 +27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +33 0x7000 //RX_TDDRC_LIMITER_THRD +34 0x0800 //RX_TDDRC_LIMITER_GAIN +112 0x0001 //RX_TDDRC_THRD_0 +113 0x0002 //RX_TDDRC_THRD_1 +114 0x1800 //RX_TDDRC_THRD_2 +115 0x1800 //RX_TDDRC_THRD_3 +116 0x7FFF //RX_TDDRC_SLANT_0 +117 0x7FFF //RX_TDDRC_SLANT_1 +118 0x1000 //RX_TDDRC_ALPHA_UP_0 +119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +120 0x0000 //RX_TDDRC_HMNC_FLAG +121 0x199A //RX_TDDRC_HMNC_GAIN +122 0x0001 //RX_TDDRC_SMT_FLAG +123 0x0CCD //RX_TDDRC_SMT_W +124 0x056F //RX_TDDRC_DRC_GAIN +38 0x0020 //RX_FDEQ_SUBNUM +39 0x483E //RX_FDEQ_GAIN_0 +40 0x3E3E //RX_FDEQ_GAIN_1 +41 0x3E4C //RX_FDEQ_GAIN_2 +42 0x586E //RX_FDEQ_GAIN_3 +43 0x8496 //RX_FDEQ_GAIN_4 +44 0x968E //RX_FDEQ_GAIN_5 +45 0x8488 //RX_FDEQ_GAIN_6 +46 0x8884 //RX_FDEQ_GAIN_7 +47 0x9CA4 //RX_FDEQ_GAIN_8 +48 0x98A8 //RX_FDEQ_GAIN_9 +49 0xBEB8 //RX_FDEQ_GAIN_10 +50 0x918D //RX_FDEQ_GAIN_11 +51 0x7566 //RX_FDEQ_GAIN_12 +52 0x6460 //RX_FDEQ_GAIN_13 +53 0x6174 //RX_FDEQ_GAIN_14 +54 0x7890 //RX_FDEQ_GAIN_15 +55 0x4848 //RX_FDEQ_GAIN_16 +56 0x4848 //RX_FDEQ_GAIN_17 +57 0x4848 //RX_FDEQ_GAIN_18 +58 0x4848 //RX_FDEQ_GAIN_19 +59 0x4848 //RX_FDEQ_GAIN_20 +60 0x4848 //RX_FDEQ_GAIN_21 +61 0x4848 //RX_FDEQ_GAIN_22 +62 0x4848 //RX_FDEQ_GAIN_23 +63 0x0202 //RX_FDEQ_BIN_0 +64 0x0202 //RX_FDEQ_BIN_1 +65 0x0301 //RX_FDEQ_BIN_2 +66 0x0404 //RX_FDEQ_BIN_3 +67 0x0406 //RX_FDEQ_BIN_4 +68 0x0109 //RX_FDEQ_BIN_5 +69 0x0708 //RX_FDEQ_BIN_6 +70 0x090A //RX_FDEQ_BIN_7 +71 0x0B0C //RX_FDEQ_BIN_8 +72 0x0D09 //RX_FDEQ_BIN_9 +73 0x0819 //RX_FDEQ_BIN_10 +74 0x1E19 //RX_FDEQ_BIN_11 +75 0x1B0F //RX_FDEQ_BIN_12 +76 0x141E //RX_FDEQ_BIN_13 +77 0x3728 //RX_FDEQ_BIN_14 +78 0x282C //RX_FDEQ_BIN_15 +79 0x0000 //RX_FDEQ_BIN_16 +80 0x0000 //RX_FDEQ_BIN_17 +81 0x0000 //RX_FDEQ_BIN_18 +82 0x0000 //RX_FDEQ_BIN_19 +83 0x0000 //RX_FDEQ_BIN_20 +84 0x0000 //RX_FDEQ_BIN_21 +85 0x0000 //RX_FDEQ_BIN_22 +86 0x0000 //RX_FDEQ_BIN_23 +87 0x4000 //RX_FDEQ_RESRV_0 +88 0x0320 //RX_FDEQ_RESRV_1 +89 0x0018 //RX_FDDRC_BAND_MARGIN_0 +90 0x0030 //RX_FDDRC_BAND_MARGIN_1 +91 0x0050 //RX_FDDRC_BAND_MARGIN_2 +92 0x0080 //RX_FDDRC_BAND_MARGIN_3 +93 0x0007 //RX_FDDRC_BLOCK_EXP +94 0x5000 //RX_FDDRC_THRD_2_0 +95 0x5000 //RX_FDDRC_THRD_2_1 +96 0x5000 //RX_FDDRC_THRD_2_2 +97 0x5000 //RX_FDDRC_THRD_2_3 +98 0x6400 //RX_FDDRC_THRD_3_0 +99 0x6400 //RX_FDDRC_THRD_3_1 +100 0x6400 //RX_FDDRC_THRD_3_2 +101 0x6400 //RX_FDDRC_THRD_3_3 +102 0x2000 //RX_FDDRC_SLANT_0_0 +103 0x2000 //RX_FDDRC_SLANT_0_1 +104 0x2000 //RX_FDDRC_SLANT_0_2 +105 0x2000 //RX_FDDRC_SLANT_0_3 +106 0x5333 //RX_FDDRC_SLANT_1_0 +107 0x5333 //RX_FDDRC_SLANT_1_1 +108 0x5333 //RX_FDDRC_SLANT_1_2 +109 0x5333 //RX_FDDRC_SLANT_1_3 +110 0x0000 //RX_FDDRC_RESRV_0 +129 0x001B //RX_SPK_VOL +130 0x0000 //RX_VOL_RESRV_0 +#VOL 3 +6 0x1000 //RX_TDDRC_ALPHA_UP_1 +7 0x1000 //RX_TDDRC_ALPHA_UP_2 +8 0x1000 //RX_TDDRC_ALPHA_UP_3 +9 0x1000 //RX_TDDRC_ALPHA_UP_4 +27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +33 0x7000 //RX_TDDRC_LIMITER_THRD +34 0x0800 //RX_TDDRC_LIMITER_GAIN +112 0x0001 //RX_TDDRC_THRD_0 +113 0x0002 //RX_TDDRC_THRD_1 +114 0x1800 //RX_TDDRC_THRD_2 +115 0x1800 //RX_TDDRC_THRD_3 +116 0x7FFF //RX_TDDRC_SLANT_0 +117 0x7FFF //RX_TDDRC_SLANT_1 +118 0x1000 //RX_TDDRC_ALPHA_UP_0 +119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +120 0x0000 //RX_TDDRC_HMNC_FLAG +121 0x199A //RX_TDDRC_HMNC_GAIN +122 0x0001 //RX_TDDRC_SMT_FLAG +123 0x0CCD //RX_TDDRC_SMT_W +124 0x056F //RX_TDDRC_DRC_GAIN +38 0x0020 //RX_FDEQ_SUBNUM +39 0x483E //RX_FDEQ_GAIN_0 +40 0x3E3E //RX_FDEQ_GAIN_1 +41 0x3E4C //RX_FDEQ_GAIN_2 +42 0x586E //RX_FDEQ_GAIN_3 +43 0x8496 //RX_FDEQ_GAIN_4 +44 0x968E //RX_FDEQ_GAIN_5 +45 0x8488 //RX_FDEQ_GAIN_6 +46 0x8884 //RX_FDEQ_GAIN_7 +47 0x9CA4 //RX_FDEQ_GAIN_8 +48 0x98A8 //RX_FDEQ_GAIN_9 +49 0xBEB8 //RX_FDEQ_GAIN_10 +50 0x918D //RX_FDEQ_GAIN_11 +51 0x7566 //RX_FDEQ_GAIN_12 +52 0x6460 //RX_FDEQ_GAIN_13 +53 0x6174 //RX_FDEQ_GAIN_14 +54 0x7890 //RX_FDEQ_GAIN_15 +55 0x4848 //RX_FDEQ_GAIN_16 +56 0x4848 //RX_FDEQ_GAIN_17 +57 0x4848 //RX_FDEQ_GAIN_18 +58 0x4848 //RX_FDEQ_GAIN_19 +59 0x4848 //RX_FDEQ_GAIN_20 +60 0x4848 //RX_FDEQ_GAIN_21 +61 0x4848 //RX_FDEQ_GAIN_22 +62 0x4848 //RX_FDEQ_GAIN_23 +63 0x0202 //RX_FDEQ_BIN_0 +64 0x0202 //RX_FDEQ_BIN_1 +65 0x0301 //RX_FDEQ_BIN_2 +66 0x0404 //RX_FDEQ_BIN_3 +67 0x0406 //RX_FDEQ_BIN_4 +68 0x0109 //RX_FDEQ_BIN_5 +69 0x0708 //RX_FDEQ_BIN_6 +70 0x090A //RX_FDEQ_BIN_7 +71 0x0B0C //RX_FDEQ_BIN_8 +72 0x0D09 //RX_FDEQ_BIN_9 +73 0x0819 //RX_FDEQ_BIN_10 +74 0x1E19 //RX_FDEQ_BIN_11 +75 0x1B0F //RX_FDEQ_BIN_12 +76 0x141E //RX_FDEQ_BIN_13 +77 0x3728 //RX_FDEQ_BIN_14 +78 0x282C //RX_FDEQ_BIN_15 +79 0x0000 //RX_FDEQ_BIN_16 +80 0x0000 //RX_FDEQ_BIN_17 +81 0x0000 //RX_FDEQ_BIN_18 +82 0x0000 //RX_FDEQ_BIN_19 +83 0x0000 //RX_FDEQ_BIN_20 +84 0x0000 //RX_FDEQ_BIN_21 +85 0x0000 //RX_FDEQ_BIN_22 +86 0x0000 //RX_FDEQ_BIN_23 +87 0x4000 //RX_FDEQ_RESRV_0 +88 0x0320 //RX_FDEQ_RESRV_1 +89 0x0018 //RX_FDDRC_BAND_MARGIN_0 +90 0x0030 //RX_FDDRC_BAND_MARGIN_1 +91 0x0050 //RX_FDDRC_BAND_MARGIN_2 +92 0x0080 //RX_FDDRC_BAND_MARGIN_3 +93 0x0007 //RX_FDDRC_BLOCK_EXP +94 0x5000 //RX_FDDRC_THRD_2_0 +95 0x5000 //RX_FDDRC_THRD_2_1 +96 0x5000 //RX_FDDRC_THRD_2_2 +97 0x5000 //RX_FDDRC_THRD_2_3 +98 0x6400 //RX_FDDRC_THRD_3_0 +99 0x6400 //RX_FDDRC_THRD_3_1 +100 0x6400 //RX_FDDRC_THRD_3_2 +101 0x6400 //RX_FDDRC_THRD_3_3 +102 0x2000 //RX_FDDRC_SLANT_0_0 +103 0x2000 //RX_FDDRC_SLANT_0_1 +104 0x2000 //RX_FDDRC_SLANT_0_2 +105 0x2000 //RX_FDDRC_SLANT_0_3 +106 0x5333 //RX_FDDRC_SLANT_1_0 +107 0x5333 //RX_FDDRC_SLANT_1_1 +108 0x5333 //RX_FDDRC_SLANT_1_2 +109 0x5333 //RX_FDDRC_SLANT_1_3 +110 0x0000 //RX_FDDRC_RESRV_0 +129 0x0035 //RX_SPK_VOL +130 0x0000 //RX_VOL_RESRV_0 +#VOL 4 +6 0x1000 //RX_TDDRC_ALPHA_UP_1 +7 0x1000 //RX_TDDRC_ALPHA_UP_2 +8 0x1000 //RX_TDDRC_ALPHA_UP_3 +9 0x1000 //RX_TDDRC_ALPHA_UP_4 +27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +33 0x7000 //RX_TDDRC_LIMITER_THRD +34 0x0800 //RX_TDDRC_LIMITER_GAIN +112 0x0001 //RX_TDDRC_THRD_0 +113 0x0002 //RX_TDDRC_THRD_1 +114 0x1800 //RX_TDDRC_THRD_2 +115 0x1800 //RX_TDDRC_THRD_3 +116 0x7FFF //RX_TDDRC_SLANT_0 +117 0x7FFF //RX_TDDRC_SLANT_1 +118 0x1000 //RX_TDDRC_ALPHA_UP_0 +119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +120 0x0000 //RX_TDDRC_HMNC_FLAG +121 0x199A //RX_TDDRC_HMNC_GAIN +122 0x0001 //RX_TDDRC_SMT_FLAG +123 0x0CCD //RX_TDDRC_SMT_W +124 0x056F //RX_TDDRC_DRC_GAIN +38 0x0020 //RX_FDEQ_SUBNUM +39 0x483E //RX_FDEQ_GAIN_0 +40 0x3E3E //RX_FDEQ_GAIN_1 +41 0x3E4C //RX_FDEQ_GAIN_2 +42 0x586E //RX_FDEQ_GAIN_3 +43 0x8496 //RX_FDEQ_GAIN_4 +44 0x968E //RX_FDEQ_GAIN_5 +45 0x8488 //RX_FDEQ_GAIN_6 +46 0x8884 //RX_FDEQ_GAIN_7 +47 0x9CA4 //RX_FDEQ_GAIN_8 +48 0x98A8 //RX_FDEQ_GAIN_9 +49 0xBEB8 //RX_FDEQ_GAIN_10 +50 0x918D //RX_FDEQ_GAIN_11 +51 0x7566 //RX_FDEQ_GAIN_12 +52 0x6460 //RX_FDEQ_GAIN_13 +53 0x6174 //RX_FDEQ_GAIN_14 +54 0x7890 //RX_FDEQ_GAIN_15 +55 0x4848 //RX_FDEQ_GAIN_16 +56 0x4848 //RX_FDEQ_GAIN_17 +57 0x4848 //RX_FDEQ_GAIN_18 +58 0x4848 //RX_FDEQ_GAIN_19 +59 0x4848 //RX_FDEQ_GAIN_20 +60 0x4848 //RX_FDEQ_GAIN_21 +61 0x4848 //RX_FDEQ_GAIN_22 +62 0x4848 //RX_FDEQ_GAIN_23 +63 0x0202 //RX_FDEQ_BIN_0 +64 0x0202 //RX_FDEQ_BIN_1 +65 0x0301 //RX_FDEQ_BIN_2 +66 0x0404 //RX_FDEQ_BIN_3 +67 0x0406 //RX_FDEQ_BIN_4 +68 0x0109 //RX_FDEQ_BIN_5 +69 0x0708 //RX_FDEQ_BIN_6 +70 0x090A //RX_FDEQ_BIN_7 +71 0x0B0C //RX_FDEQ_BIN_8 +72 0x0D09 //RX_FDEQ_BIN_9 +73 0x0819 //RX_FDEQ_BIN_10 +74 0x1E19 //RX_FDEQ_BIN_11 +75 0x1B0F //RX_FDEQ_BIN_12 +76 0x141E //RX_FDEQ_BIN_13 +77 0x3728 //RX_FDEQ_BIN_14 +78 0x282C //RX_FDEQ_BIN_15 +79 0x0000 //RX_FDEQ_BIN_16 +80 0x0000 //RX_FDEQ_BIN_17 +81 0x0000 //RX_FDEQ_BIN_18 +82 0x0000 //RX_FDEQ_BIN_19 +83 0x0000 //RX_FDEQ_BIN_20 +84 0x0000 //RX_FDEQ_BIN_21 +85 0x0000 //RX_FDEQ_BIN_22 +86 0x0000 //RX_FDEQ_BIN_23 +87 0x4000 //RX_FDEQ_RESRV_0 +88 0x0320 //RX_FDEQ_RESRV_1 +89 0x0018 //RX_FDDRC_BAND_MARGIN_0 +90 0x0030 //RX_FDDRC_BAND_MARGIN_1 +91 0x0050 //RX_FDDRC_BAND_MARGIN_2 +92 0x0080 //RX_FDDRC_BAND_MARGIN_3 +93 0x0007 //RX_FDDRC_BLOCK_EXP +94 0x5000 //RX_FDDRC_THRD_2_0 +95 0x5000 //RX_FDDRC_THRD_2_1 +96 0x5000 //RX_FDDRC_THRD_2_2 +97 0x5000 //RX_FDDRC_THRD_2_3 +98 0x6400 //RX_FDDRC_THRD_3_0 +99 0x6400 //RX_FDDRC_THRD_3_1 +100 0x6400 //RX_FDDRC_THRD_3_2 +101 0x6400 //RX_FDDRC_THRD_3_3 +102 0x2000 //RX_FDDRC_SLANT_0_0 +103 0x2000 //RX_FDDRC_SLANT_0_1 +104 0x2000 //RX_FDDRC_SLANT_0_2 +105 0x2000 //RX_FDDRC_SLANT_0_3 +106 0x5333 //RX_FDDRC_SLANT_1_0 +107 0x5333 //RX_FDDRC_SLANT_1_1 +108 0x5333 //RX_FDDRC_SLANT_1_2 +109 0x5333 //RX_FDDRC_SLANT_1_3 +110 0x0000 //RX_FDDRC_RESRV_0 +129 0x0047 //RX_SPK_VOL +130 0x0000 //RX_VOL_RESRV_0 +#VOL 5 +6 0x1000 //RX_TDDRC_ALPHA_UP_1 +7 0x1000 //RX_TDDRC_ALPHA_UP_2 +8 0x1000 //RX_TDDRC_ALPHA_UP_3 +9 0x1000 //RX_TDDRC_ALPHA_UP_4 +27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +33 0x7000 //RX_TDDRC_LIMITER_THRD +34 0x0800 //RX_TDDRC_LIMITER_GAIN +112 0x0001 //RX_TDDRC_THRD_0 +113 0x0002 //RX_TDDRC_THRD_1 +114 0x1800 //RX_TDDRC_THRD_2 +115 0x1800 //RX_TDDRC_THRD_3 +116 0x7FFF //RX_TDDRC_SLANT_0 +117 0x7FFF //RX_TDDRC_SLANT_1 +118 0x1000 //RX_TDDRC_ALPHA_UP_0 +119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +120 0x0000 //RX_TDDRC_HMNC_FLAG +121 0x199A //RX_TDDRC_HMNC_GAIN +122 0x0001 //RX_TDDRC_SMT_FLAG +123 0x0CCD //RX_TDDRC_SMT_W +124 0x056F //RX_TDDRC_DRC_GAIN +38 0x0020 //RX_FDEQ_SUBNUM +39 0x483E //RX_FDEQ_GAIN_0 +40 0x3E3E //RX_FDEQ_GAIN_1 +41 0x3E4C //RX_FDEQ_GAIN_2 +42 0x586E //RX_FDEQ_GAIN_3 +43 0x8496 //RX_FDEQ_GAIN_4 +44 0x968E //RX_FDEQ_GAIN_5 +45 0x8488 //RX_FDEQ_GAIN_6 +46 0x8884 //RX_FDEQ_GAIN_7 +47 0x9CA4 //RX_FDEQ_GAIN_8 +48 0x98A8 //RX_FDEQ_GAIN_9 +49 0xBEB8 //RX_FDEQ_GAIN_10 +50 0x918D //RX_FDEQ_GAIN_11 +51 0x7566 //RX_FDEQ_GAIN_12 +52 0x6460 //RX_FDEQ_GAIN_13 +53 0x6174 //RX_FDEQ_GAIN_14 +54 0x7890 //RX_FDEQ_GAIN_15 +55 0x4848 //RX_FDEQ_GAIN_16 +56 0x4848 //RX_FDEQ_GAIN_17 +57 0x4848 //RX_FDEQ_GAIN_18 +58 0x4848 //RX_FDEQ_GAIN_19 +59 0x4848 //RX_FDEQ_GAIN_20 +60 0x4848 //RX_FDEQ_GAIN_21 +61 0x4848 //RX_FDEQ_GAIN_22 +62 0x4848 //RX_FDEQ_GAIN_23 +63 0x0202 //RX_FDEQ_BIN_0 +64 0x0202 //RX_FDEQ_BIN_1 +65 0x0301 //RX_FDEQ_BIN_2 +66 0x0404 //RX_FDEQ_BIN_3 +67 0x0406 //RX_FDEQ_BIN_4 +68 0x0109 //RX_FDEQ_BIN_5 +69 0x0708 //RX_FDEQ_BIN_6 +70 0x090A //RX_FDEQ_BIN_7 +71 0x0B0C //RX_FDEQ_BIN_8 +72 0x0D09 //RX_FDEQ_BIN_9 +73 0x0819 //RX_FDEQ_BIN_10 +74 0x1E19 //RX_FDEQ_BIN_11 +75 0x1B0F //RX_FDEQ_BIN_12 +76 0x141E //RX_FDEQ_BIN_13 +77 0x3728 //RX_FDEQ_BIN_14 +78 0x282C //RX_FDEQ_BIN_15 +79 0x0000 //RX_FDEQ_BIN_16 +80 0x0000 //RX_FDEQ_BIN_17 +81 0x0000 //RX_FDEQ_BIN_18 +82 0x0000 //RX_FDEQ_BIN_19 +83 0x0000 //RX_FDEQ_BIN_20 +84 0x0000 //RX_FDEQ_BIN_21 +85 0x0000 //RX_FDEQ_BIN_22 +86 0x0000 //RX_FDEQ_BIN_23 +87 0x4000 //RX_FDEQ_RESRV_0 +88 0x0320 //RX_FDEQ_RESRV_1 +89 0x0018 //RX_FDDRC_BAND_MARGIN_0 +90 0x0030 //RX_FDDRC_BAND_MARGIN_1 +91 0x0050 //RX_FDDRC_BAND_MARGIN_2 +92 0x0080 //RX_FDDRC_BAND_MARGIN_3 +93 0x0007 //RX_FDDRC_BLOCK_EXP +94 0x5000 //RX_FDDRC_THRD_2_0 +95 0x5000 //RX_FDDRC_THRD_2_1 +96 0x5000 //RX_FDDRC_THRD_2_2 +97 0x5000 //RX_FDDRC_THRD_2_3 +98 0x6400 //RX_FDDRC_THRD_3_0 +99 0x6400 //RX_FDDRC_THRD_3_1 +100 0x6400 //RX_FDDRC_THRD_3_2 +101 0x6400 //RX_FDDRC_THRD_3_3 +102 0x2000 //RX_FDDRC_SLANT_0_0 +103 0x2000 //RX_FDDRC_SLANT_0_1 +104 0x2000 //RX_FDDRC_SLANT_0_2 +105 0x2000 //RX_FDDRC_SLANT_0_3 +106 0x5333 //RX_FDDRC_SLANT_1_0 +107 0x5333 //RX_FDDRC_SLANT_1_1 +108 0x5333 //RX_FDDRC_SLANT_1_2 +109 0x5333 //RX_FDDRC_SLANT_1_3 +110 0x0000 //RX_FDDRC_RESRV_0 +129 0x0076 //RX_SPK_VOL +130 0x0000 //RX_VOL_RESRV_0 +#VOL 6 +6 0x1000 //RX_TDDRC_ALPHA_UP_1 +7 0x1000 //RX_TDDRC_ALPHA_UP_2 +8 0x1000 //RX_TDDRC_ALPHA_UP_3 +9 0x1000 //RX_TDDRC_ALPHA_UP_4 +27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +33 0x7000 //RX_TDDRC_LIMITER_THRD +34 0x0800 //RX_TDDRC_LIMITER_GAIN +112 0x0001 //RX_TDDRC_THRD_0 +113 0x0002 //RX_TDDRC_THRD_1 +114 0x1800 //RX_TDDRC_THRD_2 +115 0x1800 //RX_TDDRC_THRD_3 +116 0x7FFF //RX_TDDRC_SLANT_0 +117 0x7FFF //RX_TDDRC_SLANT_1 +118 0x1000 //RX_TDDRC_ALPHA_UP_0 +119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +120 0x0000 //RX_TDDRC_HMNC_FLAG +121 0x199A //RX_TDDRC_HMNC_GAIN +122 0x0001 //RX_TDDRC_SMT_FLAG +123 0x0CCD //RX_TDDRC_SMT_W +124 0x056F //RX_TDDRC_DRC_GAIN +38 0x0020 //RX_FDEQ_SUBNUM +39 0x483E //RX_FDEQ_GAIN_0 +40 0x3E3E //RX_FDEQ_GAIN_1 +41 0x3E4C //RX_FDEQ_GAIN_2 +42 0x586E //RX_FDEQ_GAIN_3 +43 0x8496 //RX_FDEQ_GAIN_4 +44 0x968E //RX_FDEQ_GAIN_5 +45 0x8488 //RX_FDEQ_GAIN_6 +46 0x8884 //RX_FDEQ_GAIN_7 +47 0x9CA4 //RX_FDEQ_GAIN_8 +48 0x98A8 //RX_FDEQ_GAIN_9 +49 0xBEB8 //RX_FDEQ_GAIN_10 +50 0x918D //RX_FDEQ_GAIN_11 +51 0x7566 //RX_FDEQ_GAIN_12 +52 0x6460 //RX_FDEQ_GAIN_13 +53 0x6174 //RX_FDEQ_GAIN_14 +54 0x7890 //RX_FDEQ_GAIN_15 +55 0x4848 //RX_FDEQ_GAIN_16 +56 0x4848 //RX_FDEQ_GAIN_17 +57 0x4848 //RX_FDEQ_GAIN_18 +58 0x4848 //RX_FDEQ_GAIN_19 +59 0x4848 //RX_FDEQ_GAIN_20 +60 0x4848 //RX_FDEQ_GAIN_21 +61 0x4848 //RX_FDEQ_GAIN_22 +62 0x4848 //RX_FDEQ_GAIN_23 +63 0x0202 //RX_FDEQ_BIN_0 +64 0x0202 //RX_FDEQ_BIN_1 +65 0x0301 //RX_FDEQ_BIN_2 +66 0x0404 //RX_FDEQ_BIN_3 +67 0x0406 //RX_FDEQ_BIN_4 +68 0x0109 //RX_FDEQ_BIN_5 +69 0x0708 //RX_FDEQ_BIN_6 +70 0x090A //RX_FDEQ_BIN_7 +71 0x0B0C //RX_FDEQ_BIN_8 +72 0x0D09 //RX_FDEQ_BIN_9 +73 0x0819 //RX_FDEQ_BIN_10 +74 0x1E19 //RX_FDEQ_BIN_11 +75 0x1B0F //RX_FDEQ_BIN_12 +76 0x141E //RX_FDEQ_BIN_13 +77 0x3728 //RX_FDEQ_BIN_14 +78 0x282C //RX_FDEQ_BIN_15 +79 0x0000 //RX_FDEQ_BIN_16 +80 0x0000 //RX_FDEQ_BIN_17 +81 0x0000 //RX_FDEQ_BIN_18 +82 0x0000 //RX_FDEQ_BIN_19 +83 0x0000 //RX_FDEQ_BIN_20 +84 0x0000 //RX_FDEQ_BIN_21 +85 0x0000 //RX_FDEQ_BIN_22 +86 0x0000 //RX_FDEQ_BIN_23 +87 0x4000 //RX_FDEQ_RESRV_0 +88 0x0320 //RX_FDEQ_RESRV_1 +89 0x0018 //RX_FDDRC_BAND_MARGIN_0 +90 0x0030 //RX_FDDRC_BAND_MARGIN_1 +91 0x0050 //RX_FDDRC_BAND_MARGIN_2 +92 0x0080 //RX_FDDRC_BAND_MARGIN_3 +93 0x0007 //RX_FDDRC_BLOCK_EXP +94 0x5000 //RX_FDDRC_THRD_2_0 +95 0x5000 //RX_FDDRC_THRD_2_1 +96 0x5000 //RX_FDDRC_THRD_2_2 +97 0x5000 //RX_FDDRC_THRD_2_3 +98 0x6400 //RX_FDDRC_THRD_3_0 +99 0x6400 //RX_FDDRC_THRD_3_1 +100 0x6400 //RX_FDDRC_THRD_3_2 +101 0x6400 //RX_FDDRC_THRD_3_3 +102 0x2000 //RX_FDDRC_SLANT_0_0 +103 0x2000 //RX_FDDRC_SLANT_0_1 +104 0x2000 //RX_FDDRC_SLANT_0_2 +105 0x2000 //RX_FDDRC_SLANT_0_3 +106 0x5333 //RX_FDDRC_SLANT_1_0 +107 0x5333 //RX_FDDRC_SLANT_1_1 +108 0x5333 //RX_FDDRC_SLANT_1_2 +109 0x5333 //RX_FDDRC_SLANT_1_3 +110 0x0000 //RX_FDDRC_RESRV_0 +129 0x0100 //RX_SPK_VOL +130 0x0000 //RX_VOL_RESRV_0 +#RX 2 +157 0x003C //RX_RECVFUNC_MODE_0 +158 0x0000 //RX_RECVFUNC_MODE_1 +159 0x0003 //RX_SAMPLINGFREQ_SIG +160 0x0003 //RX_SAMPLINGFREQ_PROC +161 0x000A //RX_FRAME_SZ +162 0x0000 //RX_DELAY_OPT +163 0x1000 //RX_TDDRC_ALPHA_UP_1 +164 0x1000 //RX_TDDRC_ALPHA_UP_2 +165 0x1000 //RX_TDDRC_ALPHA_UP_3 +166 0x1000 //RX_TDDRC_ALPHA_UP_4 +167 0x05AA //RX_PGA +168 0x7FFF //RX_A_HP +169 0x4000 //RX_B_PE +170 0x5800 //RX_THR_PITCH_DET_0 +171 0x5000 //RX_THR_PITCH_DET_1 +172 0x4000 //RX_THR_PITCH_DET_2 +173 0x0008 //RX_PITCH_BFR_LEN +174 0x0003 //RX_SBD_PITCH_DET +175 0x0100 //RX_PP_RESRV_0 +176 0x0020 //RX_PP_RESRV_1 +177 0x0600 //RX_N_SN_EST +178 0x000C //RX_N2_SN_EST +179 0x000F //RX_NS_LVL_CTRL +180 0xF800 //RX_THR_SN_EST +181 0x7E00 //RX_LAMBDA_PFILT +182 0x000A //RX_FENS_RESRV_0 +183 0x0190 //RX_FENS_RESRV_1 +184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +187 0x0002 //RX_EXTRA_NS_L +188 0x0800 //RX_EXTRA_NS_A +189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +190 0x7000 //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +192 0x199A //RX_A_POST_FLT +193 0x0000 //RX_LMT_THRD +194 0x4000 //RX_LMT_ALPHA +195 0x0020 //RX_FDEQ_SUBNUM +196 0x483E //RX_FDEQ_GAIN_0 +197 0x3E3E //RX_FDEQ_GAIN_1 +198 0x3E4C //RX_FDEQ_GAIN_2 +199 0x5064 //RX_FDEQ_GAIN_3 +200 0x7076 //RX_FDEQ_GAIN_4 +201 0x897A //RX_FDEQ_GAIN_5 +202 0x7C80 //RX_FDEQ_GAIN_6 +203 0x8888 //RX_FDEQ_GAIN_7 +204 0x949C //RX_FDEQ_GAIN_8 +205 0x96A4 //RX_FDEQ_GAIN_9 +206 0xA9A0 //RX_FDEQ_GAIN_10 +207 0x9487 //RX_FDEQ_GAIN_11 +208 0x6F64 //RX_FDEQ_GAIN_12 +209 0x625A //RX_FDEQ_GAIN_13 +210 0x5D80 //RX_FDEQ_GAIN_14 +211 0x8890 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0202 //RX_FDEQ_BIN_0 +221 0x0202 //RX_FDEQ_BIN_1 +222 0x0301 //RX_FDEQ_BIN_2 +223 0x0404 //RX_FDEQ_BIN_3 +224 0x0406 //RX_FDEQ_BIN_4 +225 0x0109 //RX_FDEQ_BIN_5 +226 0x0708 //RX_FDEQ_BIN_6 +227 0x090A //RX_FDEQ_BIN_7 +228 0x0B0C //RX_FDEQ_BIN_8 +229 0x0D0E //RX_FDEQ_BIN_9 +230 0x1013 //RX_FDEQ_BIN_10 +231 0x1719 //RX_FDEQ_BIN_11 +232 0x1B0F //RX_FDEQ_BIN_12 +233 0x141E //RX_FDEQ_BIN_13 +234 0x3728 //RX_FDEQ_BIN_14 +235 0x282C //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x4000 //RX_FDEQ_RESRV_0 +245 0x0320 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0030 //RX_FDDRC_BAND_MARGIN_1 +248 0x0050 //RX_FDDRC_BAND_MARGIN_2 +249 0x0080 //RX_FDDRC_BAND_MARGIN_3 +250 0x0007 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x5000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x6400 //RX_FDDRC_THRD_3_2 +258 0x6400 //RX_FDDRC_THRD_3_3 +259 0x2000 //RX_FDDRC_SLANT_0_0 +260 0x2000 //RX_FDDRC_SLANT_0_1 +261 0x2000 //RX_FDDRC_SLANT_0_2 +262 0x2000 //RX_FDDRC_SLANT_0_3 +263 0x5333 //RX_FDDRC_SLANT_1_0 +264 0x5333 //RX_FDDRC_SLANT_1_1 +265 0x5333 //RX_FDDRC_SLANT_1_2 +266 0x5333 //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +268 0x0002 //RX_FILTINDX +269 0x0001 //RX_TDDRC_THRD_0 +270 0x0002 //RX_TDDRC_THRD_1 +271 0x1800 //RX_TDDRC_THRD_2 +272 0x1800 //RX_TDDRC_THRD_3 +273 0x7FFF //RX_TDDRC_SLANT_0 +274 0x7FFF //RX_TDDRC_SLANT_1 +275 0x1000 //RX_TDDRC_ALPHA_UP_0 +276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x199A //RX_TDDRC_HMNC_GAIN +279 0x0001 //RX_TDDRC_SMT_FLAG +280 0x0CCD //RX_TDDRC_SMT_W +281 0x0551 //RX_TDDRC_DRC_GAIN +282 0x7C00 //RX_LAMBDA_PKA_FP +283 0x13E0 //RX_TPKA_FP +284 0x0080 //RX_MIN_G_FP +285 0x2000 //RX_MAX_G_FP +286 0x0100 //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 +288 0x0000 //RX_MAXLEVEL_CNG +289 0x3000 //RX_BWE_UV_TH +290 0x3000 //RX_BWE_UV_TH2 +291 0x1800 //RX_BWE_UV_TH3 +292 0x1000 //RX_BWE_V_TH +293 0x04CD //RX_BWE_GAIN1_V_TH1 +294 0x0F33 //RX_BWE_GAIN1_V_TH2 +295 0x7333 //RX_BWE_UV_EQ +296 0x199A //RX_BWE_V_EQ +297 0x7333 //RX_BWE_TONE_TH +298 0x0004 //RX_BWE_UV_HOLD_T +299 0x6CCD //RX_BWE_GAIN2_ALPHA +300 0x799A //RX_BWE_GAIN3_ALPHA +301 0x001E //RX_BWE_CUTOFF +302 0x3000 //RX_BWE_GAINFILL +303 0x3200 //RX_BWE_MAXTH_TONE +304 0x2000 //RX_BWE_EQ_0 +305 0x2000 //RX_BWE_EQ_1 +306 0x2000 //RX_BWE_EQ_2 +307 0x2000 //RX_BWE_EQ_3 +308 0x2000 //RX_BWE_EQ_4 +309 0x2000 //RX_BWE_EQ_5 +310 0x2000 //RX_BWE_EQ_6 +311 0x0000 //RX_BWE_RESRV_0 +312 0x0000 //RX_BWE_RESRV_1 +313 0x0000 //RX_BWE_RESRV_2 +#VOL 0 +163 0x1000 //RX_TDDRC_ALPHA_UP_1 +164 0x1000 //RX_TDDRC_ALPHA_UP_2 +165 0x1000 //RX_TDDRC_ALPHA_UP_3 +166 0x1000 //RX_TDDRC_ALPHA_UP_4 +184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +190 0x7000 //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +269 0x0001 //RX_TDDRC_THRD_0 +270 0x0002 //RX_TDDRC_THRD_1 +271 0x1800 //RX_TDDRC_THRD_2 +272 0x1800 //RX_TDDRC_THRD_3 +273 0x7FFF //RX_TDDRC_SLANT_0 +274 0x7FFF //RX_TDDRC_SLANT_1 +275 0x1000 //RX_TDDRC_ALPHA_UP_0 +276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x199A //RX_TDDRC_HMNC_GAIN +279 0x0001 //RX_TDDRC_SMT_FLAG +280 0x0CCD //RX_TDDRC_SMT_W +281 0x0551 //RX_TDDRC_DRC_GAIN +195 0x0020 //RX_FDEQ_SUBNUM +196 0x483E //RX_FDEQ_GAIN_0 +197 0x3E3E //RX_FDEQ_GAIN_1 +198 0x3E4C //RX_FDEQ_GAIN_2 +199 0x5064 //RX_FDEQ_GAIN_3 +200 0x7076 //RX_FDEQ_GAIN_4 +201 0x897A //RX_FDEQ_GAIN_5 +202 0x7C80 //RX_FDEQ_GAIN_6 +203 0x8888 //RX_FDEQ_GAIN_7 +204 0x949C //RX_FDEQ_GAIN_8 +205 0x96A4 //RX_FDEQ_GAIN_9 +206 0xA9A0 //RX_FDEQ_GAIN_10 +207 0x9487 //RX_FDEQ_GAIN_11 +208 0x6F64 //RX_FDEQ_GAIN_12 +209 0x625A //RX_FDEQ_GAIN_13 +210 0x5D80 //RX_FDEQ_GAIN_14 +211 0x8890 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0202 //RX_FDEQ_BIN_0 +221 0x0202 //RX_FDEQ_BIN_1 +222 0x0301 //RX_FDEQ_BIN_2 +223 0x0404 //RX_FDEQ_BIN_3 +224 0x0406 //RX_FDEQ_BIN_4 +225 0x0109 //RX_FDEQ_BIN_5 +226 0x0708 //RX_FDEQ_BIN_6 +227 0x090A //RX_FDEQ_BIN_7 +228 0x0B0C //RX_FDEQ_BIN_8 +229 0x0D0E //RX_FDEQ_BIN_9 +230 0x1013 //RX_FDEQ_BIN_10 +231 0x1719 //RX_FDEQ_BIN_11 +232 0x1B0F //RX_FDEQ_BIN_12 +233 0x141E //RX_FDEQ_BIN_13 +234 0x3728 //RX_FDEQ_BIN_14 +235 0x282C //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x4000 //RX_FDEQ_RESRV_0 +245 0x0320 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0030 //RX_FDDRC_BAND_MARGIN_1 +248 0x0050 //RX_FDDRC_BAND_MARGIN_2 +249 0x0080 //RX_FDDRC_BAND_MARGIN_3 +250 0x0007 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x5000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x6400 //RX_FDDRC_THRD_3_2 +258 0x6400 //RX_FDDRC_THRD_3_3 +259 0x2000 //RX_FDDRC_SLANT_0_0 +260 0x2000 //RX_FDDRC_SLANT_0_1 +261 0x2000 //RX_FDDRC_SLANT_0_2 +262 0x2000 //RX_FDDRC_SLANT_0_3 +263 0x5333 //RX_FDDRC_SLANT_1_0 +264 0x5333 //RX_FDDRC_SLANT_1_1 +265 0x5333 //RX_FDDRC_SLANT_1_2 +266 0x5333 //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +286 0x000A //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 +#VOL 1 +163 0x1000 //RX_TDDRC_ALPHA_UP_1 +164 0x1000 //RX_TDDRC_ALPHA_UP_2 +165 0x1000 //RX_TDDRC_ALPHA_UP_3 +166 0x1000 //RX_TDDRC_ALPHA_UP_4 +184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +190 0x7000 //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +269 0x0001 //RX_TDDRC_THRD_0 +270 0x0002 //RX_TDDRC_THRD_1 +271 0x1800 //RX_TDDRC_THRD_2 +272 0x1800 //RX_TDDRC_THRD_3 +273 0x7FFF //RX_TDDRC_SLANT_0 +274 0x7FFF //RX_TDDRC_SLANT_1 +275 0x1000 //RX_TDDRC_ALPHA_UP_0 +276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x199A //RX_TDDRC_HMNC_GAIN +279 0x0001 //RX_TDDRC_SMT_FLAG +280 0x0CCD //RX_TDDRC_SMT_W +281 0x0551 //RX_TDDRC_DRC_GAIN +195 0x0020 //RX_FDEQ_SUBNUM +196 0x483E //RX_FDEQ_GAIN_0 +197 0x3E3E //RX_FDEQ_GAIN_1 +198 0x3E4C //RX_FDEQ_GAIN_2 +199 0x5064 //RX_FDEQ_GAIN_3 +200 0x7076 //RX_FDEQ_GAIN_4 +201 0x897A //RX_FDEQ_GAIN_5 +202 0x7C80 //RX_FDEQ_GAIN_6 +203 0x8888 //RX_FDEQ_GAIN_7 +204 0x949C //RX_FDEQ_GAIN_8 +205 0x96A4 //RX_FDEQ_GAIN_9 +206 0xA9A0 //RX_FDEQ_GAIN_10 +207 0x9487 //RX_FDEQ_GAIN_11 +208 0x6F64 //RX_FDEQ_GAIN_12 +209 0x625A //RX_FDEQ_GAIN_13 +210 0x5D80 //RX_FDEQ_GAIN_14 +211 0x8890 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0202 //RX_FDEQ_BIN_0 +221 0x0202 //RX_FDEQ_BIN_1 +222 0x0301 //RX_FDEQ_BIN_2 +223 0x0404 //RX_FDEQ_BIN_3 +224 0x0406 //RX_FDEQ_BIN_4 +225 0x0109 //RX_FDEQ_BIN_5 +226 0x0708 //RX_FDEQ_BIN_6 +227 0x090A //RX_FDEQ_BIN_7 +228 0x0B0C //RX_FDEQ_BIN_8 +229 0x0D0E //RX_FDEQ_BIN_9 +230 0x1013 //RX_FDEQ_BIN_10 +231 0x1719 //RX_FDEQ_BIN_11 +232 0x1B0F //RX_FDEQ_BIN_12 +233 0x141E //RX_FDEQ_BIN_13 +234 0x3728 //RX_FDEQ_BIN_14 +235 0x282C //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x4000 //RX_FDEQ_RESRV_0 +245 0x0320 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0030 //RX_FDDRC_BAND_MARGIN_1 +248 0x0050 //RX_FDDRC_BAND_MARGIN_2 +249 0x0080 //RX_FDDRC_BAND_MARGIN_3 +250 0x0007 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x5000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x6400 //RX_FDDRC_THRD_3_2 +258 0x6400 //RX_FDDRC_THRD_3_3 +259 0x2000 //RX_FDDRC_SLANT_0_0 +260 0x2000 //RX_FDDRC_SLANT_0_1 +261 0x2000 //RX_FDDRC_SLANT_0_2 +262 0x2000 //RX_FDDRC_SLANT_0_3 +263 0x5333 //RX_FDDRC_SLANT_1_0 +264 0x5333 //RX_FDDRC_SLANT_1_1 +265 0x5333 //RX_FDDRC_SLANT_1_2 +266 0x5333 //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +286 0x0010 //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 +#VOL 2 +163 0x1000 //RX_TDDRC_ALPHA_UP_1 +164 0x1000 //RX_TDDRC_ALPHA_UP_2 +165 0x1000 //RX_TDDRC_ALPHA_UP_3 +166 0x1000 //RX_TDDRC_ALPHA_UP_4 +184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +190 0x7000 //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +269 0x0001 //RX_TDDRC_THRD_0 +270 0x0002 //RX_TDDRC_THRD_1 +271 0x1800 //RX_TDDRC_THRD_2 +272 0x1800 //RX_TDDRC_THRD_3 +273 0x7FFF //RX_TDDRC_SLANT_0 +274 0x7FFF //RX_TDDRC_SLANT_1 +275 0x1000 //RX_TDDRC_ALPHA_UP_0 +276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x199A //RX_TDDRC_HMNC_GAIN +279 0x0001 //RX_TDDRC_SMT_FLAG +280 0x0CCD //RX_TDDRC_SMT_W +281 0x0551 //RX_TDDRC_DRC_GAIN +195 0x0020 //RX_FDEQ_SUBNUM +196 0x483E //RX_FDEQ_GAIN_0 +197 0x3E3E //RX_FDEQ_GAIN_1 +198 0x3E4C //RX_FDEQ_GAIN_2 +199 0x5064 //RX_FDEQ_GAIN_3 +200 0x7076 //RX_FDEQ_GAIN_4 +201 0x897A //RX_FDEQ_GAIN_5 +202 0x7C80 //RX_FDEQ_GAIN_6 +203 0x8888 //RX_FDEQ_GAIN_7 +204 0x949C //RX_FDEQ_GAIN_8 +205 0x96A4 //RX_FDEQ_GAIN_9 +206 0xA9A0 //RX_FDEQ_GAIN_10 +207 0x9487 //RX_FDEQ_GAIN_11 +208 0x6F64 //RX_FDEQ_GAIN_12 +209 0x625A //RX_FDEQ_GAIN_13 +210 0x5D80 //RX_FDEQ_GAIN_14 +211 0x8890 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0202 //RX_FDEQ_BIN_0 +221 0x0202 //RX_FDEQ_BIN_1 +222 0x0301 //RX_FDEQ_BIN_2 +223 0x0404 //RX_FDEQ_BIN_3 +224 0x0406 //RX_FDEQ_BIN_4 +225 0x0109 //RX_FDEQ_BIN_5 +226 0x0708 //RX_FDEQ_BIN_6 +227 0x090A //RX_FDEQ_BIN_7 +228 0x0B0C //RX_FDEQ_BIN_8 +229 0x0D0E //RX_FDEQ_BIN_9 +230 0x1013 //RX_FDEQ_BIN_10 +231 0x1719 //RX_FDEQ_BIN_11 +232 0x1B0F //RX_FDEQ_BIN_12 +233 0x141E //RX_FDEQ_BIN_13 +234 0x3728 //RX_FDEQ_BIN_14 +235 0x282C //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x4000 //RX_FDEQ_RESRV_0 +245 0x0320 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0030 //RX_FDDRC_BAND_MARGIN_1 +248 0x0050 //RX_FDDRC_BAND_MARGIN_2 +249 0x0080 //RX_FDDRC_BAND_MARGIN_3 +250 0x0007 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x5000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x6400 //RX_FDDRC_THRD_3_2 +258 0x6400 //RX_FDDRC_THRD_3_3 +259 0x2000 //RX_FDDRC_SLANT_0_0 +260 0x2000 //RX_FDDRC_SLANT_0_1 +261 0x2000 //RX_FDDRC_SLANT_0_2 +262 0x2000 //RX_FDDRC_SLANT_0_3 +263 0x5333 //RX_FDDRC_SLANT_1_0 +264 0x5333 //RX_FDDRC_SLANT_1_1 +265 0x5333 //RX_FDDRC_SLANT_1_2 +266 0x5333 //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +286 0x001B //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 +#VOL 3 +163 0x1000 //RX_TDDRC_ALPHA_UP_1 +164 0x1000 //RX_TDDRC_ALPHA_UP_2 +165 0x1000 //RX_TDDRC_ALPHA_UP_3 +166 0x1000 //RX_TDDRC_ALPHA_UP_4 +184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +190 0x7000 //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +269 0x0001 //RX_TDDRC_THRD_0 +270 0x0002 //RX_TDDRC_THRD_1 +271 0x1800 //RX_TDDRC_THRD_2 +272 0x1800 //RX_TDDRC_THRD_3 +273 0x7FFF //RX_TDDRC_SLANT_0 +274 0x7FFF //RX_TDDRC_SLANT_1 +275 0x1000 //RX_TDDRC_ALPHA_UP_0 +276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x199A //RX_TDDRC_HMNC_GAIN +279 0x0001 //RX_TDDRC_SMT_FLAG +280 0x0CCD //RX_TDDRC_SMT_W +281 0x0551 //RX_TDDRC_DRC_GAIN +195 0x0020 //RX_FDEQ_SUBNUM +196 0x483E //RX_FDEQ_GAIN_0 +197 0x3E3E //RX_FDEQ_GAIN_1 +198 0x3E4C //RX_FDEQ_GAIN_2 +199 0x5064 //RX_FDEQ_GAIN_3 +200 0x7076 //RX_FDEQ_GAIN_4 +201 0x897A //RX_FDEQ_GAIN_5 +202 0x7C80 //RX_FDEQ_GAIN_6 +203 0x8888 //RX_FDEQ_GAIN_7 +204 0x949C //RX_FDEQ_GAIN_8 +205 0x96A4 //RX_FDEQ_GAIN_9 +206 0xA9A0 //RX_FDEQ_GAIN_10 +207 0x9487 //RX_FDEQ_GAIN_11 +208 0x6F64 //RX_FDEQ_GAIN_12 +209 0x625A //RX_FDEQ_GAIN_13 +210 0x5D80 //RX_FDEQ_GAIN_14 +211 0x8890 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0202 //RX_FDEQ_BIN_0 +221 0x0202 //RX_FDEQ_BIN_1 +222 0x0301 //RX_FDEQ_BIN_2 +223 0x0404 //RX_FDEQ_BIN_3 +224 0x0406 //RX_FDEQ_BIN_4 +225 0x0109 //RX_FDEQ_BIN_5 +226 0x0708 //RX_FDEQ_BIN_6 +227 0x090A //RX_FDEQ_BIN_7 +228 0x0B0C //RX_FDEQ_BIN_8 +229 0x0D0E //RX_FDEQ_BIN_9 +230 0x1013 //RX_FDEQ_BIN_10 +231 0x1719 //RX_FDEQ_BIN_11 +232 0x1B0F //RX_FDEQ_BIN_12 +233 0x141E //RX_FDEQ_BIN_13 +234 0x3728 //RX_FDEQ_BIN_14 +235 0x282C //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x4000 //RX_FDEQ_RESRV_0 +245 0x0320 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0030 //RX_FDDRC_BAND_MARGIN_1 +248 0x0050 //RX_FDDRC_BAND_MARGIN_2 +249 0x0080 //RX_FDDRC_BAND_MARGIN_3 +250 0x0007 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x5000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x6400 //RX_FDDRC_THRD_3_2 +258 0x6400 //RX_FDDRC_THRD_3_3 +259 0x2000 //RX_FDDRC_SLANT_0_0 +260 0x2000 //RX_FDDRC_SLANT_0_1 +261 0x2000 //RX_FDDRC_SLANT_0_2 +262 0x2000 //RX_FDDRC_SLANT_0_3 +263 0x5333 //RX_FDDRC_SLANT_1_0 +264 0x5333 //RX_FDDRC_SLANT_1_1 +265 0x5333 //RX_FDDRC_SLANT_1_2 +266 0x5333 //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +286 0x0032 //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 +#VOL 4 +163 0x1000 //RX_TDDRC_ALPHA_UP_1 +164 0x1000 //RX_TDDRC_ALPHA_UP_2 +165 0x1000 //RX_TDDRC_ALPHA_UP_3 +166 0x1000 //RX_TDDRC_ALPHA_UP_4 +184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +190 0x7000 //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +269 0x0001 //RX_TDDRC_THRD_0 +270 0x0002 //RX_TDDRC_THRD_1 +271 0x1800 //RX_TDDRC_THRD_2 +272 0x1800 //RX_TDDRC_THRD_3 +273 0x7FFF //RX_TDDRC_SLANT_0 +274 0x7FFF //RX_TDDRC_SLANT_1 +275 0x1000 //RX_TDDRC_ALPHA_UP_0 +276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x199A //RX_TDDRC_HMNC_GAIN +279 0x0001 //RX_TDDRC_SMT_FLAG +280 0x0CCD //RX_TDDRC_SMT_W +281 0x0551 //RX_TDDRC_DRC_GAIN +195 0x0020 //RX_FDEQ_SUBNUM +196 0x483E //RX_FDEQ_GAIN_0 +197 0x3E3E //RX_FDEQ_GAIN_1 +198 0x3E4C //RX_FDEQ_GAIN_2 +199 0x5064 //RX_FDEQ_GAIN_3 +200 0x7076 //RX_FDEQ_GAIN_4 +201 0x897A //RX_FDEQ_GAIN_5 +202 0x7C80 //RX_FDEQ_GAIN_6 +203 0x8888 //RX_FDEQ_GAIN_7 +204 0x949C //RX_FDEQ_GAIN_8 +205 0x96A4 //RX_FDEQ_GAIN_9 +206 0xA9A0 //RX_FDEQ_GAIN_10 +207 0x9487 //RX_FDEQ_GAIN_11 +208 0x6F64 //RX_FDEQ_GAIN_12 +209 0x625A //RX_FDEQ_GAIN_13 +210 0x5D80 //RX_FDEQ_GAIN_14 +211 0x8890 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0202 //RX_FDEQ_BIN_0 +221 0x0202 //RX_FDEQ_BIN_1 +222 0x0301 //RX_FDEQ_BIN_2 +223 0x0404 //RX_FDEQ_BIN_3 +224 0x0406 //RX_FDEQ_BIN_4 +225 0x0109 //RX_FDEQ_BIN_5 +226 0x0708 //RX_FDEQ_BIN_6 +227 0x090A //RX_FDEQ_BIN_7 +228 0x0B0C //RX_FDEQ_BIN_8 +229 0x0D0E //RX_FDEQ_BIN_9 +230 0x1013 //RX_FDEQ_BIN_10 +231 0x1719 //RX_FDEQ_BIN_11 +232 0x1B0F //RX_FDEQ_BIN_12 +233 0x141E //RX_FDEQ_BIN_13 +234 0x3728 //RX_FDEQ_BIN_14 +235 0x282C //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x4000 //RX_FDEQ_RESRV_0 +245 0x0320 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0030 //RX_FDDRC_BAND_MARGIN_1 +248 0x0050 //RX_FDDRC_BAND_MARGIN_2 +249 0x0080 //RX_FDDRC_BAND_MARGIN_3 +250 0x0007 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x5000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x6400 //RX_FDDRC_THRD_3_2 +258 0x6400 //RX_FDDRC_THRD_3_3 +259 0x2000 //RX_FDDRC_SLANT_0_0 +260 0x2000 //RX_FDDRC_SLANT_0_1 +261 0x2000 //RX_FDDRC_SLANT_0_2 +262 0x2000 //RX_FDDRC_SLANT_0_3 +263 0x5333 //RX_FDDRC_SLANT_1_0 +264 0x5333 //RX_FDDRC_SLANT_1_1 +265 0x5333 //RX_FDDRC_SLANT_1_2 +266 0x5333 //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +286 0x0047 //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 +#VOL 5 +163 0x1000 //RX_TDDRC_ALPHA_UP_1 +164 0x1000 //RX_TDDRC_ALPHA_UP_2 +165 0x1000 //RX_TDDRC_ALPHA_UP_3 +166 0x1000 //RX_TDDRC_ALPHA_UP_4 +184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +190 0x7000 //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +269 0x0001 //RX_TDDRC_THRD_0 +270 0x0002 //RX_TDDRC_THRD_1 +271 0x1800 //RX_TDDRC_THRD_2 +272 0x1800 //RX_TDDRC_THRD_3 +273 0x7FFF //RX_TDDRC_SLANT_0 +274 0x7FFF //RX_TDDRC_SLANT_1 +275 0x1000 //RX_TDDRC_ALPHA_UP_0 +276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x199A //RX_TDDRC_HMNC_GAIN +279 0x0001 //RX_TDDRC_SMT_FLAG +280 0x0CCD //RX_TDDRC_SMT_W +281 0x0551 //RX_TDDRC_DRC_GAIN +195 0x0020 //RX_FDEQ_SUBNUM +196 0x483E //RX_FDEQ_GAIN_0 +197 0x3E3E //RX_FDEQ_GAIN_1 +198 0x3E4C //RX_FDEQ_GAIN_2 +199 0x5064 //RX_FDEQ_GAIN_3 +200 0x7076 //RX_FDEQ_GAIN_4 +201 0x897A //RX_FDEQ_GAIN_5 +202 0x7C80 //RX_FDEQ_GAIN_6 +203 0x8888 //RX_FDEQ_GAIN_7 +204 0x949C //RX_FDEQ_GAIN_8 +205 0x96A4 //RX_FDEQ_GAIN_9 +206 0xA9A0 //RX_FDEQ_GAIN_10 +207 0x9487 //RX_FDEQ_GAIN_11 +208 0x6F64 //RX_FDEQ_GAIN_12 +209 0x625A //RX_FDEQ_GAIN_13 +210 0x5D80 //RX_FDEQ_GAIN_14 +211 0x8890 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0202 //RX_FDEQ_BIN_0 +221 0x0202 //RX_FDEQ_BIN_1 +222 0x0301 //RX_FDEQ_BIN_2 +223 0x0404 //RX_FDEQ_BIN_3 +224 0x0406 //RX_FDEQ_BIN_4 +225 0x0109 //RX_FDEQ_BIN_5 +226 0x0708 //RX_FDEQ_BIN_6 +227 0x090A //RX_FDEQ_BIN_7 +228 0x0B0C //RX_FDEQ_BIN_8 +229 0x0D0E //RX_FDEQ_BIN_9 +230 0x1013 //RX_FDEQ_BIN_10 +231 0x1719 //RX_FDEQ_BIN_11 +232 0x1B0F //RX_FDEQ_BIN_12 +233 0x141E //RX_FDEQ_BIN_13 +234 0x3728 //RX_FDEQ_BIN_14 +235 0x282C //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x4000 //RX_FDEQ_RESRV_0 +245 0x0320 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0030 //RX_FDDRC_BAND_MARGIN_1 +248 0x0050 //RX_FDDRC_BAND_MARGIN_2 +249 0x0080 //RX_FDDRC_BAND_MARGIN_3 +250 0x0007 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x5000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x6400 //RX_FDDRC_THRD_3_2 +258 0x6400 //RX_FDDRC_THRD_3_3 +259 0x2000 //RX_FDDRC_SLANT_0_0 +260 0x2000 //RX_FDDRC_SLANT_0_1 +261 0x2000 //RX_FDDRC_SLANT_0_2 +262 0x2000 //RX_FDDRC_SLANT_0_3 +263 0x5333 //RX_FDDRC_SLANT_1_0 +264 0x5333 //RX_FDDRC_SLANT_1_1 +265 0x5333 //RX_FDDRC_SLANT_1_2 +266 0x5333 //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +286 0x0076 //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 +#VOL 6 +163 0x1000 //RX_TDDRC_ALPHA_UP_1 +164 0x1000 //RX_TDDRC_ALPHA_UP_2 +165 0x1000 //RX_TDDRC_ALPHA_UP_3 +166 0x1000 //RX_TDDRC_ALPHA_UP_4 +184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +190 0x7000 //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +269 0x0001 //RX_TDDRC_THRD_0 +270 0x0002 //RX_TDDRC_THRD_1 +271 0x1800 //RX_TDDRC_THRD_2 +272 0x1800 //RX_TDDRC_THRD_3 +273 0x7FFF //RX_TDDRC_SLANT_0 +274 0x7FFF //RX_TDDRC_SLANT_1 +275 0x1000 //RX_TDDRC_ALPHA_UP_0 +276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x199A //RX_TDDRC_HMNC_GAIN +279 0x0001 //RX_TDDRC_SMT_FLAG +280 0x0CCD //RX_TDDRC_SMT_W +281 0x0551 //RX_TDDRC_DRC_GAIN +195 0x0020 //RX_FDEQ_SUBNUM +196 0x483E //RX_FDEQ_GAIN_0 +197 0x3E3E //RX_FDEQ_GAIN_1 +198 0x3E4C //RX_FDEQ_GAIN_2 +199 0x5064 //RX_FDEQ_GAIN_3 +200 0x7076 //RX_FDEQ_GAIN_4 +201 0x897A //RX_FDEQ_GAIN_5 +202 0x7C80 //RX_FDEQ_GAIN_6 +203 0x8888 //RX_FDEQ_GAIN_7 +204 0x949C //RX_FDEQ_GAIN_8 +205 0x96A4 //RX_FDEQ_GAIN_9 +206 0xA9A0 //RX_FDEQ_GAIN_10 +207 0x9487 //RX_FDEQ_GAIN_11 +208 0x6F64 //RX_FDEQ_GAIN_12 +209 0x625A //RX_FDEQ_GAIN_13 +210 0x5D80 //RX_FDEQ_GAIN_14 +211 0x8890 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0202 //RX_FDEQ_BIN_0 +221 0x0202 //RX_FDEQ_BIN_1 +222 0x0301 //RX_FDEQ_BIN_2 +223 0x0404 //RX_FDEQ_BIN_3 +224 0x0406 //RX_FDEQ_BIN_4 +225 0x0109 //RX_FDEQ_BIN_5 +226 0x0708 //RX_FDEQ_BIN_6 +227 0x090A //RX_FDEQ_BIN_7 +228 0x0B0C //RX_FDEQ_BIN_8 +229 0x0D0E //RX_FDEQ_BIN_9 +230 0x1013 //RX_FDEQ_BIN_10 +231 0x1719 //RX_FDEQ_BIN_11 +232 0x1B0F //RX_FDEQ_BIN_12 +233 0x141E //RX_FDEQ_BIN_13 +234 0x3728 //RX_FDEQ_BIN_14 +235 0x282C //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x4000 //RX_FDEQ_RESRV_0 +245 0x0320 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0030 //RX_FDDRC_BAND_MARGIN_1 +248 0x0050 //RX_FDDRC_BAND_MARGIN_2 +249 0x0080 //RX_FDDRC_BAND_MARGIN_3 +250 0x0007 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x5000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x6400 //RX_FDDRC_THRD_3_2 +258 0x6400 //RX_FDDRC_THRD_3_3 +259 0x2000 //RX_FDDRC_SLANT_0_0 +260 0x2000 //RX_FDDRC_SLANT_0_1 +261 0x2000 //RX_FDDRC_SLANT_0_2 +262 0x2000 //RX_FDDRC_SLANT_0_3 +263 0x5333 //RX_FDDRC_SLANT_1_0 +264 0x5333 //RX_FDDRC_SLANT_1_1 +265 0x5333 //RX_FDDRC_SLANT_1_2 +266 0x5333 //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +286 0x0100 //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 + +#CASE_NAME HANDSET-HANDSET-RESERVE1-SWB +#PARAM_MODE Simple +#PARAM_TYPE TX+2RX +#TOTAL_CUSTOM_STEP 7+7 +#TX +0 0x0000 //TX_OPERATION_MODE_0 +1 0x0000 //TX_OPERATION_MODE_1 +2 0x0076 //TX_PATCH_REG +3 0x6F56 //TX_SENDFUNC_MODE_0 +4 0x0001 //TX_SENDFUNC_MODE_1 +5 0x0002 //TX_NUM_MIC +6 0x0003 //TX_SAMPLINGFREQ_SIG +7 0x0003 //TX_SAMPLINGFREQ_PROC +8 0x000A //TX_FRAME_SZ_SIG +9 0x000A //TX_FRAME_SZ +10 0x0000 //TX_DELAY_OPT +11 0x0028 //TX_MAX_TAIL_LENGTH +12 0x0001 //TX_NUM_LOUTCHN +13 0x0001 //TX_MAXNUM_AECREF +14 0x0000 //TX_DBG_FUNC_REG +15 0x0000 //TX_DBG_FUNC_REG1 +16 0x0000 //TX_SYS_RESRV_0 +17 0x0000 //TX_SYS_RESRV_1 +18 0x0000 //TX_SYS_RESRV_2 +19 0x0000 //TX_SYS_RESRV_3 +20 0x0000 //TX_DIST2REF0 +21 0x00A3 //TX_DIST2REF1 +22 0x0000 //TX_DIST2REF_02 +23 0x0000 //TX_DIST2REF_03 +24 0x0000 //TX_DIST2REF_04 +25 0x0000 //TX_DIST2REF_05 +26 0x0000 //TX_MMIC +27 0x1000 //TX_PGA_0 +28 0x1000 //TX_PGA_1 +29 0x1000 //TX_PGA_2 +30 0x0000 //TX_PGA_3 +31 0x0000 //TX_PGA_4 +32 0x0000 //TX_PGA_5 +33 0x0000 //TX_MIC_PAIRS +34 0x0000 //TX_MIC_PAIRS_HS +35 0x0002 //TX_MICS_FOR_BF +36 0x0000 //TX_MIC_PAIRS_FORL1 +37 0x0002 //TX_MICS_OF_PAIR0 +38 0x0002 //TX_MICS_OF_PAIR1 +39 0x0002 //TX_MICS_OF_PAIR2 +40 0x0002 //TX_MICS_OF_PAIR3 +41 0x0000 //TX_MIC_DATA_SRC0 +42 0x0002 //TX_MIC_DATA_SRC1 +43 0x0001 //TX_MIC_DATA_SRC2 +44 0x0000 //TX_MIC_DATA_SRC3 +45 0x0000 //TX_MIC_PAIR_CH_04 +46 0x0000 //TX_MIC_PAIR_CH_05 +47 0x0000 //TX_MIC_PAIR_CH_10 +48 0x0000 //TX_MIC_PAIR_CH_11 +49 0x0000 //TX_MIC_PAIR_CH_12 +50 0x0000 //TX_MIC_PAIR_CH_13 +51 0x0000 //TX_MIC_PAIR_CH_14 +52 0x05DC //TX_HD_BIN_MASK +53 0x0010 //TX_HD_SUBAND_MASK +54 0x19A1 //TX_HD_FRAME_AVG_MASK +55 0x0320 //TX_HD_MIN_FRQ +56 0x1000 //TX_HD_ALPHA_PSD +57 0x1100 //TX_T_PHPR1 +58 0x0000 //TX_T_PHPR2 +59 0x0000 //TX_T_PTPR +60 0x0000 //TX_T_PNPR +61 0x0000 //TX_T_PAPR1 +62 0xEE6C //TX_T_PSDVAT +63 0x0800 //TX_CNT +64 0x4000 //TX_ANTI_HOWL_GAIN +65 0x0001 //TX_MICFORBFMARK_0 +66 0x0001 //TX_MICFORBFMARK_1 +67 0x0001 //TX_MICFORBFMARK_2 +68 0x0001 //TX_MICFORBFMARK_3 +69 0x0001 //TX_MICFORBFMARK_4 +70 0x0001 //TX_MICFORBFMARK_5 +71 0x0000 //TX_DIST2REF_10 +72 0x3A66 //TX_DIST2REF_11 +73 0x0000 //TX_DIST2REF2 +74 0x0000 //TX_DIST2REF_13 +75 0x0000 //TX_DIST2REF_14 +76 0x0000 //TX_DIST2REF_15 +77 0x0000 //TX_DIST2REF_20 +78 0x0000 //TX_DIST2REF_21 +79 0x0000 //TX_DIST2REF_22 +80 0x0000 //TX_DIST2REF_23 +81 0x0000 //TX_DIST2REF_24 +82 0x0000 //TX_DIST2REF_25 +83 0x0000 //TX_DIST2REF_30 +84 0x0000 //TX_DIST2REF_31 +85 0x0000 //TX_DIST2REF_32 +86 0x0000 //TX_DIST2REF_33 +87 0x0000 //TX_DIST2REF_34 +88 0x0000 //TX_DIST2REF_35 +89 0x0000 //TX_MIC_LOC_00 +90 0x0000 //TX_MIC_LOC_01 +91 0x0000 //TX_MIC_LOC_02 +92 0x0000 //TX_MIC_LOC_03 +93 0x0000 //TX_MIC_LOC_04 +94 0x0000 //TX_MIC_LOC_05 +95 0x0000 //TX_MIC_LOC_10 +96 0x0000 //TX_MIC_LOC_11 +97 0x0000 //TX_MIC_LOC_12 +98 0x0000 //TX_MIC_LOC_13 +99 0x0000 //TX_MIC_LOC_14 +100 0x0000 //TX_MIC_LOC_15 +101 0x0000 //TX_MIC_LOC_20 +102 0x0000 //TX_MIC_LOC_21 +103 0x0000 //TX_MIC_LOC_22 +104 0x0000 //TX_MIC_LOC_23 +105 0x0000 //TX_MIC_LOC_24 +106 0x0000 //TX_MIC_LOC_25 +107 0x0200 //TX_MIC_REFBLK_VOLUME +108 0x0AAC //TX_MIC_BLOCK_VOLUME +109 0x0000 //TX_INVERSE_MASK +110 0x0000 //TX_ADCS_MASK +111 0x04D0 //TX_ADCS_GAIN +112 0x4000 //TX_NFC_GAINFAC +113 0x0000 //TX_MAINMIC_BLKFACTOR +114 0x0000 //TX_REFMIC_BLKFACTOR +115 0x0000 //TX_BLMIC_BLKFACTOR +116 0x0000 //TX_BRMIC_BLKFACTOR +117 0x0031 //TX_MICBLK_START_BIN +118 0x0060 //TX_MICBLK_END_BIN +119 0x0015 //TX_MICBLK_FE_HOLD +120 0xFFF2 //TX_MICBLK_MR_EXP_TH +121 0xFFF2 //TX_MICBLK_LR_EXP_TH +122 0x0000 //TX_FENE_HOLD +123 0x4000 //TX_FE_ENER_TH_MTS +124 0x0004 //TX_FE_ENER_TH_EXP +125 0x6000 //TX_C_POST_FLT_MIC_MAINBLK +126 0x6000 //TX_C_POST_FLT_MIC_REFBLK +127 0x0010 //TX_MIC_BLOCK_N +128 0x7E56 //TX_A_HP +129 0x4000 //TX_B_PE +130 0x1800 //TX_THR_PITCH_DET_0 +131 0x1000 //TX_THR_PITCH_DET_1 +132 0x0800 //TX_THR_PITCH_DET_2 +133 0x0008 //TX_PITCH_BFR_LEN +134 0x0003 //TX_SBD_PITCH_DET +135 0x0050 //TX_TD_AEC_L +136 0x4000 //TX_MU0_UNP_TD_AEC +137 0x1000 //TX_MU0_PTD_TD_AEC +138 0x0000 //TX_PP_RESRV_0 +139 0x2A94 //TX_PP_RESRV_1 +140 0x55F0 //TX_PP_RESRV_2 +141 0x0000 //TX_PP_RESRV_3 +142 0x0000 //TX_PP_RESRV_4 +143 0x0000 //TX_PP_RESRV_5 +144 0x0000 //TX_PP_RESRV_6 +145 0x0000 //TX_PP_RESRV_7 +146 0x0028 //TX_TAIL_LENGTH +147 0x0080 //TX_AEC_REF_GAIN_0 +148 0x0800 //TX_AEC_REF_GAIN_1 +149 0x0800 //TX_AEC_REF_GAIN_2 +150 0x7900 //TX_EAD_THR +151 0x2000 //TX_THR_RE_EST +152 0x0400 //TX_MIN_EQ_RE_EST_0 +153 0x0400 //TX_MIN_EQ_RE_EST_1 +154 0x0800 //TX_MIN_EQ_RE_EST_2 +155 0x0800 //TX_MIN_EQ_RE_EST_3 +156 0x1000 //TX_MIN_EQ_RE_EST_4 +157 0x1000 //TX_MIN_EQ_RE_EST_5 +158 0x1000 //TX_MIN_EQ_RE_EST_6 +159 0x1000 //TX_MIN_EQ_RE_EST_7 +160 0x1000 //TX_MIN_EQ_RE_EST_8 +161 0x1000 //TX_MIN_EQ_RE_EST_9 +162 0x1000 //TX_MIN_EQ_RE_EST_10 +163 0x1000 //TX_MIN_EQ_RE_EST_11 +164 0x1000 //TX_MIN_EQ_RE_EST_12 +165 0x3000 //TX_LAMBDA_RE_EST +166 0x1000 //TX_LAMBDA_CB_NLE +167 0x1800 //TX_C_POST_FLT +168 0x4000 //TX_GAIN_NP +169 0x003C //TX_SE_HOLD_N +170 0x0046 //TX_DT_HOLD_N +171 0x03E8 //TX_DT2_HOLD_N +172 0x6666 //TX_AEC_RESRV_0 +173 0x0000 //TX_AEC_RESRV_1 +174 0x0014 //TX_AEC_RESRV_2 +175 0x0000 //TX_MIC_DELAY_LENGTH +176 0x0000 //TX_REF_DELAY_LENGTH +177 0x0000 //TX_ADD_LINEIN_GAINL +178 0x0000 //TX_ADD_LINEIN_GAINH +179 0x0000 //TX_MIN_EQ_RE_EST_14 +180 0x0000 //TX_DTD_THR1_8 +181 0x7FFF //TX_DTD_THR2_8 +182 0x0000 //TX_DTD_MIC_BLK2 +183 0x0008 //TX_FRQ_LIN_LEN +184 0x7FFF //TX_FRQ_AEC_LEN_RHO +185 0x6000 //TX_MU0_UNP_FRQ_AEC +186 0x4000 //TX_MU0_PTD_FRQ_AEC +187 0x000A //TX_MINENOISETH +188 0x0800 //TX_MU0_RE_EST +189 0x0001 //TX_AEC_NUM_CH +190 0x0000 //TX_BIGECHOATTENUATION_MAX +191 0x2000 //TX_A_POST_FLT_MICBLK +192 0x0000 //TX_BLKENERTH +193 0x0000 //TX_BLKENERHIGHTH +194 0x0000 //TX_NORMENERTH +195 0x0000 //TX_NORMENERHIGHTH +196 0x0000 //TX_NORMENERHIGHTHL +197 0x7000 //TX_DTD_THR1_0 +198 0x7000 //TX_DTD_THR1_1 +199 0x7000 //TX_DTD_THR1_2 +200 0x7F00 //TX_DTD_THR1_3 +201 0x7F00 //TX_DTD_THR1_4 +202 0x7F00 //TX_DTD_THR1_5 +203 0x7F00 //TX_DTD_THR1_6 +204 0x2000 //TX_DTD_THR2_0 +205 0x2000 //TX_DTD_THR2_1 +206 0x2000 //TX_DTD_THR2_2 +207 0x1000 //TX_DTD_THR2_3 +208 0x1000 //TX_DTD_THR2_4 +209 0x1000 //TX_DTD_THR2_5 +210 0x1000 //TX_DTD_THR2_6 +211 0x6000 //TX_DTD_THR3 +212 0x0177 //TX_SPK_CUT_K +213 0x1B58 //TX_DT_CUT_K +214 0x0100 //TX_DT_CUT_THR +215 0x04EB //TX_COMFORT_G +216 0x01F4 //TX_POWER_YOUT_TH +217 0x4000 //TX_FDPFGAINECHO +218 0x0000 //TX_DTD_HD_THR +219 0x0000 //TX_SPK_CUT_K_S +220 0x0000 //TX_DTD_MIC_BLK +221 0x0400 //TX_ADPT_STRICT_L +222 0x0200 //TX_ADPT_STRICT_H +223 0x0C00 //TX_RATIO_DT_L_TH_LOW +224 0x2000 //TX_RATIO_DT_H_TH_LOW +225 0x1800 //TX_RATIO_DT_L_TH_HIGH +226 0x3000 //TX_RATIO_DT_H_TH_HIGH +227 0x0A00 //TX_RATIO_DT_L0_TH +228 0x7000 //TX_B_POST_FILT_ECHO_L +229 0x7FFF //TX_B_POST_FILT_ECHO_H +230 0x0200 //TX_MIN_G_CTRL_ECHO +231 0x7FFF //TX_B_LESSCUT_RTO_ECHO +232 0x0000 //TX_EPD_OFFSET_00 +233 0x0000 //TX_EPD_OFFST_01 +234 0x1388 //TX_RATIO_DT_L0_TH_HIGH +235 0x3A98 //TX_RATIO_DT_H_TH_CUT +236 0x7FFF //TX_MIN_EQ_RE_EST_13 +237 0x0000 //TX_DTD_THR1_7 +238 0x0000 //TX_DTD_THR2_7 +239 0x0800 //TX_DT_RESRV_7 +240 0x0800 //TX_DT_RESRV_8 +241 0x0000 //TX_DT_RESRV_9 +242 0xF600 //TX_THR_SN_EST_0 +243 0xFA00 //TX_THR_SN_EST_1 +244 0xFA00 //TX_THR_SN_EST_2 +245 0xF800 //TX_THR_SN_EST_3 +246 0xF800 //TX_THR_SN_EST_4 +247 0xF800 //TX_THR_SN_EST_5 +248 0xF800 //TX_THR_SN_EST_6 +249 0xF700 //TX_THR_SN_EST_7 +250 0x0000 //TX_DELTA_THR_SN_EST_0 +251 0x0200 //TX_DELTA_THR_SN_EST_1 +252 0x0200 //TX_DELTA_THR_SN_EST_2 +253 0x0200 //TX_DELTA_THR_SN_EST_3 +254 0x0100 //TX_DELTA_THR_SN_EST_4 +255 0x0200 //TX_DELTA_THR_SN_EST_5 +256 0x0100 //TX_DELTA_THR_SN_EST_6 +257 0x0200 //TX_DELTA_THR_SN_EST_7 +258 0x4000 //TX_LAMBDA_NN_EST_0 +259 0x4000 //TX_LAMBDA_NN_EST_1 +260 0x4000 //TX_LAMBDA_NN_EST_2 +261 0x4000 //TX_LAMBDA_NN_EST_3 +262 0x4000 //TX_LAMBDA_NN_EST_4 +263 0x4000 //TX_LAMBDA_NN_EST_5 +264 0x4000 //TX_LAMBDA_NN_EST_6 +265 0x4000 //TX_LAMBDA_NN_EST_7 +266 0x0400 //TX_N_SN_EST +267 0x001E //TX_INBEAM_T +268 0x0041 //TX_INBEAMHOLDT +269 0x2000 //TX_G_STRICT +270 0x2000 //TX_EQ_THR_BF +271 0x799A //TX_LAMBDA_EQ_BF +272 0x1000 //TX_NE_RTO_TH +273 0x1000 //TX_NE_RTO_TH_L +274 0x1000 //TX_MAINREFRTOH_TH_H +275 0x0600 //TX_MAINREFRTOH_TH_L +276 0x2000 //TX_MAINREFRTO_TH_H +277 0x1400 //TX_MAINREFRTO_TH_L +278 0x0000 //TX_MAINREFRTO_TH_EQ +279 0x1000 //TX_B_POST_FLT_0 +280 0x1000 //TX_B_POST_FLT_1 +281 0x0014 //TX_NS_LVL_CTRL_0 +282 0x002C //TX_NS_LVL_CTRL_1 +283 0x0016 //TX_NS_LVL_CTRL_2 +284 0x0018 //TX_NS_LVL_CTRL_3 +285 0x0016 //TX_NS_LVL_CTRL_4 +286 0x0012 //TX_NS_LVL_CTRL_5 +287 0x0016 //TX_NS_LVL_CTRL_6 +288 0x0017 //TX_NS_LVL_CTRL_7 +289 0x000E //TX_MIN_GAIN_S_0 +290 0x000D //TX_MIN_GAIN_S_1 +291 0x0012 //TX_MIN_GAIN_S_2 +292 0x0010 //TX_MIN_GAIN_S_3 +293 0x0012 //TX_MIN_GAIN_S_4 +294 0x0012 //TX_MIN_GAIN_S_5 +295 0x0012 //TX_MIN_GAIN_S_6 +296 0x0012 //TX_MIN_GAIN_S_7 +297 0x6000 //TX_NMOS_SUP +298 0x0000 //TX_NS_MAX_PRI_SNR_TH +299 0x0000 //TX_NMOS_SUP_MENSA +300 0x7FFF //TX_SNRI_SUP_0 +301 0x6000 //TX_SNRI_SUP_1 +302 0x6000 //TX_SNRI_SUP_2 +303 0x6000 //TX_SNRI_SUP_3 +304 0x6000 //TX_SNRI_SUP_4 +305 0x6000 //TX_SNRI_SUP_5 +306 0x6000 //TX_SNRI_SUP_6 +307 0x6000 //TX_SNRI_SUP_7 +308 0x6000 //TX_THR_LFNS +309 0x0017 //TX_G_LFNS +310 0x09C4 //TX_GAIN0_NTH +311 0x000A //TX_MUSIC_MORENS +312 0x7FFF //TX_A_POST_FILT_0 +313 0x2000 //TX_A_POST_FILT_1 +314 0x4000 //TX_A_POST_FILT_S_0 +315 0x4000 //TX_A_POST_FILT_S_1 +316 0x4000 //TX_A_POST_FILT_S_2 +317 0x4000 //TX_A_POST_FILT_S_3 +318 0x4000 //TX_A_POST_FILT_S_4 +319 0x4000 //TX_A_POST_FILT_S_5 +320 0x5000 //TX_A_POST_FILT_S_6 +321 0x7000 //TX_A_POST_FILT_S_7 +322 0x1000 //TX_B_POST_FILT_0 +323 0x1000 //TX_B_POST_FILT_1 +324 0x2000 //TX_B_POST_FILT_2 +325 0x2000 //TX_B_POST_FILT_3 +326 0x2000 //TX_B_POST_FILT_4 +327 0x1000 //TX_B_POST_FILT_5 +328 0x3000 //TX_B_POST_FILT_6 +329 0x3000 //TX_B_POST_FILT_7 +330 0x1000 //TX_B_LESSCUT_RTO_S_0 +331 0x1000 //TX_B_LESSCUT_RTO_S_1 +332 0x1000 //TX_B_LESSCUT_RTO_S_2 +333 0x1000 //TX_B_LESSCUT_RTO_S_3 +334 0x1000 //TX_B_LESSCUT_RTO_S_4 +335 0x1000 //TX_B_LESSCUT_RTO_S_5 +336 0x1000 //TX_B_LESSCUT_RTO_S_6 +337 0x1000 //TX_B_LESSCUT_RTO_S_7 +338 0x7E14 //TX_LAMBDA_PFILT +339 0x7C29 //TX_LAMBDA_PFILT_S_0 +340 0x7C29 //TX_LAMBDA_PFILT_S_1 +341 0x7C29 //TX_LAMBDA_PFILT_S_2 +342 0x7C29 //TX_LAMBDA_PFILT_S_3 +343 0x7C29 //TX_LAMBDA_PFILT_S_4 +344 0x7C29 //TX_LAMBDA_PFILT_S_5 +345 0x7C29 //TX_LAMBDA_PFILT_S_6 +346 0x7C29 //TX_LAMBDA_PFILT_S_7 +347 0x07D0 //TX_K_PEPPER +348 0x0800 //TX_A_PEPPER +349 0x1D4C //TX_K_PEPPER_HF +350 0x0400 //TX_A_PEPPER_HF +351 0x0001 //TX_HMNC_BST_FLG +352 0x4000 //TX_HMNC_BST_THR +353 0x0800 //TX_DT_BINVAD_TH_0 +354 0x0800 //TX_DT_BINVAD_TH_1 +355 0x0800 //TX_DT_BINVAD_TH_2 +356 0x0800 //TX_DT_BINVAD_TH_3 +357 0x0000 //TX_DT_BINVAD_ENDF +358 0x1000 //TX_C_POST_FLT_DT +359 0x7FFF //TX_NS_B_POST_FLT_LESSCUT +360 0x0100 //TX_DT_BOOST +361 0x0000 //TX_BF_SGRAD_FLG +362 0x0005 //TX_BF_DVG_TH +363 0x001E //TX_SN_C_F +364 0x0000 //TX_K_APT +365 0x0001 //TX_NOISEDET +366 0x0190 //TX_NDETCT +367 0x000A //TX_NOISE_TH_0 +368 0x7FFF //TX_NOISE_TH_0_2 +369 0x7FFF //TX_NOISE_TH_0_3 +370 0x00C6 //TX_NOISE_TH_1 +371 0x0DAC //TX_NOISE_TH_2 +372 0x2260 //TX_NOISE_TH_3 +373 0x7080 //TX_NOISE_TH_4 +374 0x57E4 //TX_NOISE_TH_5 +375 0x4BD6 //TX_NOISE_TH_5_2 +376 0x0001 //TX_NOISE_TH_5_3 +377 0x4E20 //TX_NOISE_TH_5_4 +378 0x1194 //TX_NOISE_TH_6 +379 0x0014 //TX_MINENOISE_TH +380 0xD508 //TX_MORENS_TFMASK_TH +381 0x0001 //TX_DRC_QUIET_FLOOR +382 0x6D60 //TX_RATIODTL_CUT_TH +383 0x0DAC //TX_DT_CUT_K1 +384 0x00A5 //TX_OUT_ENER_S_TH_CLEAN +385 0x00A5 //TX_OUT_ENER_S_TH_LESSCLEAN +386 0x00A5 //TX_OUT_ENER_S_TH_NOISY +387 0x0029 //TX_OUT_ENER_TH_NOISE +388 0x0200 //TX_OUT_ENER_TH_SPEECH +389 0x2000 //TX_SN_NPB_GAIN +390 0x0000 //TX_NN_NPB_GAIN +391 0x3000 //TX_POST_MASK_SUP_HSNE +392 0x07D0 //TX_TAIL_DET_TH +393 0x4000 //TX_B_LESSCUT_RTO_WTA +394 0x0000 //TX_MEL_G_R +395 0x0080 //TX_SUPHIGH_TH +396 0x0000 //TX_MASK_G_R +397 0x0002 //TX_EXTRA_NS_L +398 0x1800 //TX_C_POST_FLT_MASK +399 0x7FFF //TX_A_POST_FLT_WNS +400 0x0148 //TX_MIN_G_LOW300HZ +401 0x0004 //TX_MAXLEVEL_CNG +402 0x00B4 //TX_STN_NOISE_TH +403 0x4000 //TX_POST_MASK_SUP +404 0x7FFF //TX_POST_MASK_ADJUST +405 0x00C8 //TX_NS_ENOISE_MIC0_TH +406 0x0014 //TX_MINENOISE_MIC0_TH +407 0x012C //TX_MINENOISE_MIC0_S_TH +408 0x2900 //TX_MIN_G_CTRL_SSNS +409 0x0800 //TX_METAL_RTO_THR +410 0x0FA0 //TX_NS_FP_K_METAL +411 0x3A98 //TX_NOISEDET_BOOST_TH +412 0x0FA0 //TX_NSMOOTH_TH +413 0x0000 //TX_NS_RESRV_8 +414 0x1800 //TX_RHO_UPB +415 0x2328 //TX_N_HOLD_HS +416 0x006E //TX_N_RHO_BFR0 +417 0x7FFF //TX_LAMBDA_ARSP_EST +418 0x0100 //TX_EXTRA_GAIN_MICBLOCK +419 0x0333 //TX_THR_STD_NSR +420 0x019A //TX_THR_STD_PLH +421 0x03E8 //TX_N_HOLD_STD +422 0x0066 //TX_THR_STD_RHO +423 0x2800 //TX_BF_RESET_THR_HS +424 0x0CCD //TX_SB_RTO_MEAN_TH +425 0x0300 //TX_SB_RHO_MEAN_TH_NTALK +426 0x2000 //TX_SB_RTO_MEAN_TH_ABN +427 0x2EE0 //TX_SB_RTO_MEAN_TH_RUB +428 0x0990 //TX_WTA_EN_RTO_TH +429 0x1400 //TX_TOP_ENER_TH_F +430 0x0100 //TX_DESIRED_TALK_HOLDT +431 0x0800 //TX_MIC_BLOCK_FACTOR +432 0x0000 //TX_NSEST_BFRLRNRDC +433 0x0000 //TX_THR_POST_FLT_HS +434 0x0010 //TX_HS_VAD_BIN +435 0x2666 //TX_THR_VAD_HS +436 0x2CCD //TX_MEAN_RTO_MIN_TH2 +437 0x0032 //TX_SILENCE_T +438 0x0000 //TX_A_POST_FLT_WTA +439 0x799A //TX_LAMBDA_PFLT_WTA +440 0x051E //TX_SB_RHO_MEAN2_TH +441 0x02F0 //TX_SB_RHO_MEAN3_TH +442 0x0000 //TX_HS_RESRV_4 +443 0x0000 //TX_HS_RESRV_5 +444 0x0001 //TX_DOA_VAD_THR_1 +445 0x003C //TX_DOA_VAD_THR_2 +446 0x0028 //TX_DOA_VAD_THR1_0 +447 0x0028 //TX_DOA_VAD_THR1_1 +448 0x0000 //TX_SRC_DOA_RNG_LOW_0A +449 0x001E //TX_SRC_DOA_RNG_HIGH_0A +450 0x005A //TX_DFLT_SRC_DOA_0A +451 0x0000 //TX_SRC_DOA_RNG_LOW_0B +452 0x0000 //TX_SRC_DOA_RNG_HIGH_0B +453 0x0000 //TX_DFLT_SRC_DOA_0B +454 0x0000 //TX_SRC_DOA_RNG_LOW_0C +455 0x0000 //TX_SRC_DOA_RNG_HIGH_0C +456 0x0000 //TX_DFLT_SRC_DOA_0C +457 0x0000 //TX_SRC_DOA_RNG_LOW_0D +458 0x0000 //TX_SRC_DOA_RNG_HIGH_0D +459 0x0000 //TX_DFLT_SRC_DOA_0D +460 0x0000 //TX_SRC_DOA_RNG_LOW_1A +461 0x00B4 //TX_SRC_DOA_RNG_HIGH_1A +462 0x005A //TX_DFLT_SRC_DOA_1A +463 0x0000 //TX_SRC_DOA_RNG_LOW_1B +464 0x00B4 //TX_SRC_DOA_RNG_HIGH_1B +465 0x005A //TX_DFLT_SRC_DOA_1B +466 0x0000 //TX_SRC_DOA_RNG_LOW_1C +467 0x00B4 //TX_SRC_DOA_RNG_HIGH_1C +468 0x005A //TX_DFLT_SRC_DOA_1C +469 0x0000 //TX_SRC_DOA_RNG_LOW_1D +470 0x00B4 //TX_SRC_DOA_RNG_HIGH_1D +471 0x005A //TX_DFLT_SRC_DOA_1D +472 0x0100 //TX_BF_HOLDOFF_T +473 0x7FFF //TX_DOA_COST_FACTOR +474 0x0D9A //TX_MAINTOREFR_TH0 +475 0x071C //TX_DOA_TRK_THR +476 0x012C //TX_DOA_TRACK_HT +477 0x0200 //TX_N1_HOLD_HF +478 0x0100 //TX_N2_HOLD_HF +479 0x2A3D //TX_BF_RESET_THR_HF +480 0x7333 //TX_DOA_SMOOTH +481 0x0800 //TX_MU_BF +482 0x0800 //TX_BF_MU_LF_B2 +483 0x0040 //TX_BF_FC_END_BIN_B2 +484 0x0020 //TX_BF_FC_END_BIN +485 0x0000 //TX_HF_RESRV_25 +486 0x0000 //TX_HF_RESRV_26 +487 0x0007 //TX_N_DOA_SEED +488 0x0001 //TX_FINE_DOA_SEARCH_FLG +489 0x0000 //TX_HF_RESRV_27 +490 0x038E //TX_DLT_SRC_DOA_RNG +491 0x0200 //TX_BF_MU_LF +492 0x0000 //TX_DFLT_SRC_LOC_0 +493 0x7FFF //TX_DFLT_SRC_LOC_1 +494 0x0000 //TX_DFLT_SRC_LOC_2 +495 0x038E //TX_DOA_TRACK_VADTH +496 0x0000 //TX_DOA_TRACK_NEW +497 0x0300 //TX_NOR_OFF_THR +498 0x7C00 //TX_MORE_ON_700HZ_THR +499 0x2000 //TX_MU_BF_ADPT_NS +500 0x0000 //TX_ADAPT_LEN +501 0x6666 //TX_MORE_SNS +502 0x0000 //TX_NOR_OFF_TH1 +503 0x0000 //TX_WIDE_MASK_TH +504 0xD333 //TX_SUBSNRATIOHIGH4MEANBCK_THR +505 0x6000 //TX_C_POST_FLT_CUT +506 0x2000 //TX_RADIODTLV +507 0x0320 //TX_POWER_LINEIN_TH +508 0x0014 //TX_FE_VADCOUNT_TH_FC +509 0x0000 //TX_ECHO_SUPP_FC +510 0x0C80 //TX_ECHO_TH +511 0x6666 //TX_MIC_TO_BFGAIN +512 0x0000 //TX_MICTOBFGAIN0 +513 0x0000 //TX_FASTMUE_TH +514 0x2CCC //TX_DEREVERB_LF_MU +515 0x3200 //TX_DEREVERB_HF_MU +516 0x0007 //TX_DEREVERB_DELAY +517 0x0004 //TX_DEREVERB_COEF_LEN +518 0x0003 //TX_DEREVERB_DNR +519 0x0000 //TX_DEREVERB_ALPHA +520 0x0000 //TX_DEREVERB_BETA +521 0x3A98 //TX_GSC_RTOL_TH +522 0x3A98 //TX_GSC_RTOH_TH +523 0x7E2C //TX_WIDE2_MEANHTH +524 0x0000 //TX_DR_RESRV_5 +525 0x0000 //TX_DR_RESRV_6 +526 0x0000 //TX_DR_RESRV_7 +527 0x0000 //TX_DR_RESRV_8 +528 0x1333 //TX_WIND_MARK_TH +529 0x399A //TX_CORR_THR +530 0x0004 //TX_SNR_THR +531 0x0010 //TX_ENGY_THR +532 0x1770 //TX_CORR_HIGH_TH +533 0x6000 //TX_ENGY_THR_2 +534 0x3400 //TX_MEAN_RTO_THR +535 0x0028 //TX_WNS_ENOISE_MIC0_TH +536 0x3000 //TX_RATIOMICL_TH +537 0x7FFF //TX_CALIG_HS +538 0x0000 //TX_LVL_CTRL +539 0x0010 //TX_WIND_SUPRTO +540 0x0014 //TX_WNS_MIN_G +541 0x0600 //TX_WNS_B_POST_FLT +542 0x3000 //TX_RATIOMICH_TH +543 0xD120 //TX_WIND_INBEAM_L_TH +544 0x0FA0 //TX_WIND_INBEAM_H_TH +545 0x2000 //TX_WNS_RESRV_0 +546 0x59D8 //TX_WNS_RESRV_1 +547 0x0200 //TX_WNS_RESRV_2 +548 0x0000 //TX_WNS_RESRV_3 +549 0x0000 //TX_WNS_RESRV_4 +550 0x0000 //TX_WNS_RESRV_5 +551 0x0000 //TX_WNS_RESRV_6 +552 0x0000 //TX_PB_B_POST_FLT_LESSCUT +553 0x0070 //TX_BF_LESSCUT_BBIN +554 0x0070 //TX_BF_LESSCUT_EBIN +555 0x0010 //TX_POSTBFB0 +556 0x0070 //TX_POSTBFB +557 0x00B0 //TX_POSTBFE +558 0x0E66 //TX_SPEECH_SNR_TH +559 0x0050 //TX_PB_MAX_PRI_SNR_TH +560 0x770A //TX_MAX_PRI_SNR_TH_L +561 0x0000 //TX_PFGAIN +562 0x0000 //TX_MAINTOREFR_TH +563 0x0000 //TX_SAM_MARK +564 0x0000 //TX_PB_RESRV_0 +565 0x0000 //TX_PB_RESRV_1 +566 0x0030 //TX_FDEQ_SUBNUM +567 0x5C54 //TX_FDEQ_GAIN_0 +568 0x5048 //TX_FDEQ_GAIN_1 +569 0x4C4C //TX_FDEQ_GAIN_2 +570 0x494D //TX_FDEQ_GAIN_3 +571 0x4442 //TX_FDEQ_GAIN_4 +572 0x4448 //TX_FDEQ_GAIN_5 +573 0x4C53 //TX_FDEQ_GAIN_6 +574 0x6244 //TX_FDEQ_GAIN_7 +575 0x4348 //TX_FDEQ_GAIN_8 +576 0x4848 //TX_FDEQ_GAIN_9 +577 0x4A49 //TX_FDEQ_GAIN_10 +578 0x4E4A //TX_FDEQ_GAIN_11 +579 0x4840 //TX_FDEQ_GAIN_12 +580 0x4040 //TX_FDEQ_GAIN_13 +581 0x4054 //TX_FDEQ_GAIN_14 +582 0x687A //TX_FDEQ_GAIN_15 +583 0x4848 //TX_FDEQ_GAIN_16 +584 0x4848 //TX_FDEQ_GAIN_17 +585 0x4848 //TX_FDEQ_GAIN_18 +586 0x4848 //TX_FDEQ_GAIN_19 +587 0x4848 //TX_FDEQ_GAIN_20 +588 0x4848 //TX_FDEQ_GAIN_21 +589 0x4848 //TX_FDEQ_GAIN_22 +590 0x4848 //TX_FDEQ_GAIN_23 +591 0x0202 //TX_FDEQ_BIN_0 +592 0x0104 //TX_FDEQ_BIN_1 +593 0x0502 //TX_FDEQ_BIN_2 +594 0x0202 //TX_FDEQ_BIN_3 +595 0x0504 //TX_FDEQ_BIN_4 +596 0x0708 //TX_FDEQ_BIN_5 +597 0x0808 //TX_FDEQ_BIN_6 +598 0x050E //TX_FDEQ_BIN_7 +599 0x0B0C //TX_FDEQ_BIN_8 +600 0x0F0F //TX_FDEQ_BIN_9 +601 0x0E0D //TX_FDEQ_BIN_10 +602 0x0F28 //TX_FDEQ_BIN_11 +603 0x111B //TX_FDEQ_BIN_12 +604 0x291E //TX_FDEQ_BIN_13 +605 0x1E10 //TX_FDEQ_BIN_14 +606 0x1810 //TX_FDEQ_BIN_15 +607 0x1021 //TX_FDEQ_BIN_16 +608 0x1000 //TX_FDEQ_BIN_17 +609 0x0000 //TX_FDEQ_BIN_18 +610 0x0000 //TX_FDEQ_BIN_19 +611 0x0000 //TX_FDEQ_BIN_20 +612 0x0000 //TX_FDEQ_BIN_21 +613 0x0000 //TX_FDEQ_BIN_22 +614 0x0000 //TX_FDEQ_BIN_23 +615 0x0000 //TX_FDEQ_PADDING +616 0x0030 //TX_PREEQ_SUBNUM_MIC0 +617 0x4848 //TX_PREEQ_GAIN_MIC0_0 +618 0x4848 //TX_PREEQ_GAIN_MIC0_1 +619 0x4848 //TX_PREEQ_GAIN_MIC0_2 +620 0x4848 //TX_PREEQ_GAIN_MIC0_3 +621 0x4848 //TX_PREEQ_GAIN_MIC0_4 +622 0x4848 //TX_PREEQ_GAIN_MIC0_5 +623 0x4848 //TX_PREEQ_GAIN_MIC0_6 +624 0x4848 //TX_PREEQ_GAIN_MIC0_7 +625 0x4848 //TX_PREEQ_GAIN_MIC0_8 +626 0x4848 //TX_PREEQ_GAIN_MIC0_9 +627 0x4848 //TX_PREEQ_GAIN_MIC0_10 +628 0x4848 //TX_PREEQ_GAIN_MIC0_11 +629 0x4848 //TX_PREEQ_GAIN_MIC0_12 +630 0x4848 //TX_PREEQ_GAIN_MIC0_13 +631 0x4848 //TX_PREEQ_GAIN_MIC0_14 +632 0x4848 //TX_PREEQ_GAIN_MIC0_15 +633 0x4848 //TX_PREEQ_GAIN_MIC0_16 +634 0x4848 //TX_PREEQ_GAIN_MIC0_17 +635 0x4848 //TX_PREEQ_GAIN_MIC0_18 +636 0x4848 //TX_PREEQ_GAIN_MIC0_19 +637 0x4848 //TX_PREEQ_GAIN_MIC0_20 +638 0x4848 //TX_PREEQ_GAIN_MIC0_21 +639 0x4848 //TX_PREEQ_GAIN_MIC0_22 +640 0x4848 //TX_PREEQ_GAIN_MIC0_23 +641 0x251A //TX_PREEQ_BIN_MIC0_0 +642 0x0F0F //TX_PREEQ_BIN_MIC0_1 +643 0x0C0C //TX_PREEQ_BIN_MIC0_2 +644 0x0C0F //TX_PREEQ_BIN_MIC0_3 +645 0x0F0F //TX_PREEQ_BIN_MIC0_4 +646 0x0F09 //TX_PREEQ_BIN_MIC0_5 +647 0x0909 //TX_PREEQ_BIN_MIC0_6 +648 0x0908 //TX_PREEQ_BIN_MIC0_7 +649 0x070F //TX_PREEQ_BIN_MIC0_8 +650 0x1F08 //TX_PREEQ_BIN_MIC0_9 +651 0x0808 //TX_PREEQ_BIN_MIC0_10 +652 0x0920 //TX_PREEQ_BIN_MIC0_11 +653 0x2020 //TX_PREEQ_BIN_MIC0_12 +654 0x2021 //TX_PREEQ_BIN_MIC0_13 +655 0x0000 //TX_PREEQ_BIN_MIC0_14 +656 0x0000 //TX_PREEQ_BIN_MIC0_15 +657 0x0000 //TX_PREEQ_BIN_MIC0_16 +658 0x0000 //TX_PREEQ_BIN_MIC0_17 +659 0x0000 //TX_PREEQ_BIN_MIC0_18 +660 0x0000 //TX_PREEQ_BIN_MIC0_19 +661 0x0000 //TX_PREEQ_BIN_MIC0_20 +662 0x0000 //TX_PREEQ_BIN_MIC0_21 +663 0x0000 //TX_PREEQ_BIN_MIC0_22 +664 0x0000 //TX_PREEQ_BIN_MIC0_23 +665 0x0030 //TX_PREEQ_SUBNUM_MIC1 +666 0x4848 //TX_PREEQ_GAIN_MIC1_0 +667 0x4848 //TX_PREEQ_GAIN_MIC1_1 +668 0x4848 //TX_PREEQ_GAIN_MIC1_2 +669 0x4848 //TX_PREEQ_GAIN_MIC1_3 +670 0x4848 //TX_PREEQ_GAIN_MIC1_4 +671 0x4848 //TX_PREEQ_GAIN_MIC1_5 +672 0x494A //TX_PREEQ_GAIN_MIC1_6 +673 0x4B4C //TX_PREEQ_GAIN_MIC1_7 +674 0x4D4E //TX_PREEQ_GAIN_MIC1_8 +675 0x4F52 //TX_PREEQ_GAIN_MIC1_9 +676 0x5355 //TX_PREEQ_GAIN_MIC1_10 +677 0x585C //TX_PREEQ_GAIN_MIC1_11 +678 0x616A //TX_PREEQ_GAIN_MIC1_12 +679 0x726E //TX_PREEQ_GAIN_MIC1_13 +680 0x5C48 //TX_PREEQ_GAIN_MIC1_14 +681 0x3B38 //TX_PREEQ_GAIN_MIC1_15 +682 0x4848 //TX_PREEQ_GAIN_MIC1_16 +683 0x4848 //TX_PREEQ_GAIN_MIC1_17 +684 0x4848 //TX_PREEQ_GAIN_MIC1_18 +685 0x4848 //TX_PREEQ_GAIN_MIC1_19 +686 0x4848 //TX_PREEQ_GAIN_MIC1_20 +687 0x4848 //TX_PREEQ_GAIN_MIC1_21 +688 0x4848 //TX_PREEQ_GAIN_MIC1_22 +689 0x4848 //TX_PREEQ_GAIN_MIC1_23 +690 0x0202 //TX_PREEQ_BIN_MIC1_0 +691 0x0203 //TX_PREEQ_BIN_MIC1_1 +692 0x0303 //TX_PREEQ_BIN_MIC1_2 +693 0x0304 //TX_PREEQ_BIN_MIC1_3 +694 0x0405 //TX_PREEQ_BIN_MIC1_4 +695 0x0506 //TX_PREEQ_BIN_MIC1_5 +696 0x0708 //TX_PREEQ_BIN_MIC1_6 +697 0x090A //TX_PREEQ_BIN_MIC1_7 +698 0x0B0C //TX_PREEQ_BIN_MIC1_8 +699 0x0D0E //TX_PREEQ_BIN_MIC1_9 +700 0x1013 //TX_PREEQ_BIN_MIC1_10 +701 0x1719 //TX_PREEQ_BIN_MIC1_11 +702 0x1B1E //TX_PREEQ_BIN_MIC1_12 +703 0x1E1E //TX_PREEQ_BIN_MIC1_13 +704 0x1E28 //TX_PREEQ_BIN_MIC1_14 +705 0x3042 //TX_PREEQ_BIN_MIC1_15 +706 0x0000 //TX_PREEQ_BIN_MIC1_16 +707 0x0000 //TX_PREEQ_BIN_MIC1_17 +708 0x0000 //TX_PREEQ_BIN_MIC1_18 +709 0x0000 //TX_PREEQ_BIN_MIC1_19 +710 0x0000 //TX_PREEQ_BIN_MIC1_20 +711 0x0000 //TX_PREEQ_BIN_MIC1_21 +712 0x0000 //TX_PREEQ_BIN_MIC1_22 +713 0x0000 //TX_PREEQ_BIN_MIC1_23 +714 0x0030 //TX_PREEQ_SUBNUM_MIC2 +715 0x4848 //TX_PREEQ_GAIN_MIC2_0 +716 0x4848 //TX_PREEQ_GAIN_MIC2_1 +717 0x4848 //TX_PREEQ_GAIN_MIC2_2 +718 0x4848 //TX_PREEQ_GAIN_MIC2_3 +719 0x4848 //TX_PREEQ_GAIN_MIC2_4 +720 0x4848 //TX_PREEQ_GAIN_MIC2_5 +721 0x4848 //TX_PREEQ_GAIN_MIC2_6 +722 0x4848 //TX_PREEQ_GAIN_MIC2_7 +723 0x4848 //TX_PREEQ_GAIN_MIC2_8 +724 0x4848 //TX_PREEQ_GAIN_MIC2_9 +725 0x4848 //TX_PREEQ_GAIN_MIC2_10 +726 0x4848 //TX_PREEQ_GAIN_MIC2_11 +727 0x4848 //TX_PREEQ_GAIN_MIC2_12 +728 0x4848 //TX_PREEQ_GAIN_MIC2_13 +729 0x4848 //TX_PREEQ_GAIN_MIC2_14 +730 0x4848 //TX_PREEQ_GAIN_MIC2_15 +731 0x4848 //TX_PREEQ_GAIN_MIC2_16 +732 0x4848 //TX_PREEQ_GAIN_MIC2_17 +733 0x4848 //TX_PREEQ_GAIN_MIC2_18 +734 0x4848 //TX_PREEQ_GAIN_MIC2_19 +735 0x4848 //TX_PREEQ_GAIN_MIC2_20 +736 0x4848 //TX_PREEQ_GAIN_MIC2_21 +737 0x4848 //TX_PREEQ_GAIN_MIC2_22 +738 0x4848 //TX_PREEQ_GAIN_MIC2_23 +739 0x0608 //TX_PREEQ_BIN_MIC2_0 +740 0x0808 //TX_PREEQ_BIN_MIC2_1 +741 0x0808 //TX_PREEQ_BIN_MIC2_2 +742 0x0808 //TX_PREEQ_BIN_MIC2_3 +743 0x0808 //TX_PREEQ_BIN_MIC2_4 +744 0x0808 //TX_PREEQ_BIN_MIC2_5 +745 0x0808 //TX_PREEQ_BIN_MIC2_6 +746 0x0808 //TX_PREEQ_BIN_MIC2_7 +747 0x0808 //TX_PREEQ_BIN_MIC2_8 +748 0x0808 //TX_PREEQ_BIN_MIC2_9 +749 0x0808 //TX_PREEQ_BIN_MIC2_10 +750 0x0808 //TX_PREEQ_BIN_MIC2_11 +751 0x0808 //TX_PREEQ_BIN_MIC2_12 +752 0x0808 //TX_PREEQ_BIN_MIC2_13 +753 0x0808 //TX_PREEQ_BIN_MIC2_14 +754 0x0200 //TX_PREEQ_BIN_MIC2_15 +755 0x0000 //TX_PREEQ_BIN_MIC2_16 +756 0x0000 //TX_PREEQ_BIN_MIC2_17 +757 0x0000 //TX_PREEQ_BIN_MIC2_18 +758 0x0000 //TX_PREEQ_BIN_MIC2_19 +759 0x0000 //TX_PREEQ_BIN_MIC2_20 +760 0x0000 //TX_PREEQ_BIN_MIC2_21 +761 0x0000 //TX_PREEQ_BIN_MIC2_22 +762 0x0000 //TX_PREEQ_BIN_MIC2_23 +763 0x0006 //TX_MASKING_ABILITY +764 0x0800 //TX_NND_WEIGHT +765 0x0050 //TX_MIC_CALIBRATION_0 +766 0x0056 //TX_MIC_CALIBRATION_1 +767 0x0050 //TX_MIC_CALIBRATION_2 +768 0x0050 //TX_MIC_CALIBRATION_3 +769 0x0046 //TX_MIC_PWR_BIAS_0 +770 0x0042 //TX_MIC_PWR_BIAS_1 +771 0x0046 //TX_MIC_PWR_BIAS_2 +772 0x0046 //TX_MIC_PWR_BIAS_3 +773 0x0000 //TX_GAIN_LIMIT_0 +774 0x0006 //TX_GAIN_LIMIT_1 +775 0x0000 //TX_GAIN_LIMIT_2 +776 0x0000 //TX_GAIN_LIMIT_3 +777 0x7F5B //TX_BVE_NOVAD0_ALPHADOWN +778 0x7FDE //TX_BVE_VAD0_ALPHAUP +779 0x7F3A //TX_BVE_VAD0_ALPHADOWN +780 0x2000 //TX_BVE_GAINWEIGHT_NOFEVADLI +781 0x7F5B //TX_BVE_FEVADLI_ALPHA +782 0x7F19 //TX_BVE_NOVAD0_ALPHAUP +783 0x1000 //TX_TDDRC_ALPHA_UP_01 +784 0x1000 //TX_TDDRC_ALPHA_UP_02 +785 0x1000 //TX_TDDRC_ALPHA_UP_03 +786 0x1000 //TX_TDDRC_ALPHA_UP_04 +787 0x7EB8 //TX_TDDRC_ALPHA_DWN_01 +788 0x7EB8 //TX_TDDRC_ALPHA_DWN_02 +789 0x7EB8 //TX_TDDRC_ALPHA_DWN_03 +790 0x7EB8 //TX_TDDRC_ALPHA_DWN_04 +791 0x7FFF //TX_TDDRC_TD_DRC_LIMIT +792 0x0800 //TX_TDDRC_POST_LIMIT_GAIN +793 0x0000 //TX_TDDRC_RESRV_0 +794 0x0000 //TX_TDDRC_RESRV_1 +795 0x0018 //TX_FDDRC_BAND_MARGIN_0 +796 0x0030 //TX_FDDRC_BAND_MARGIN_1 +797 0x0050 //TX_FDDRC_BAND_MARGIN_2 +798 0x0080 //TX_FDDRC_BAND_MARGIN_3 +799 0x0007 //TX_FDDRC_BLOCK_EXP +800 0x5000 //TX_FDDRC_THRD_2_0 +801 0x5000 //TX_FDDRC_THRD_2_1 +802 0x5000 //TX_FDDRC_THRD_2_2 +803 0x5000 //TX_FDDRC_THRD_2_3 +804 0x6400 //TX_FDDRC_THRD_3_0 +805 0x6400 //TX_FDDRC_THRD_3_1 +806 0x6400 //TX_FDDRC_THRD_3_2 +807 0x6400 //TX_FDDRC_THRD_3_3 +808 0x2000 //TX_FDDRC_SLANT_0_0 +809 0x2000 //TX_FDDRC_SLANT_0_1 +810 0x2000 //TX_FDDRC_SLANT_0_2 +811 0x2000 //TX_FDDRC_SLANT_0_3 +812 0x5333 //TX_FDDRC_SLANT_1_0 +813 0x5333 //TX_FDDRC_SLANT_1_1 +814 0x5333 //TX_FDDRC_SLANT_1_2 +815 0x5333 //TX_FDDRC_SLANT_1_3 +816 0x0010 //TX_DEADMIC_SILENCE_TH +817 0x0600 //TX_MIC_DEGRADE_TH +818 0x0078 //TX_DEADMIC_CNT +819 0x0078 //TX_MIC_DEGRADE_CNT +820 0x0000 //TX_FDDRC_RESRV_4 +821 0x0000 //TX_FDDRC_RESRV_5 +822 0x0000 //TX_FDDRC_RESRV_6 +823 0x7FFF //TX_KS_NOISEPASTE_FACTOR +824 0x0001 //TX_KS_CONFIG +825 0x7FFF //TX_KS_GAIN_MIN +826 0x0000 //TX_KS_RESRV_0 +827 0x0000 //TX_KS_RESRV_1 +828 0x0000 //TX_KS_RESRV_2 +829 0x7C00 //TX_LAMBDA_PKA_FP +830 0x2000 //TX_TPKA_FP +831 0x0080 //TX_MIN_G_FP +832 0x2000 //TX_MAX_G_FP +833 0x0FA0 //TX_FFP_FP_K_METAL +834 0x4000 //TX_A_POST_FLT_FP +835 0x0F5C //TX_RTO_OUTBEAM_TH +836 0x4CCD //TX_TPKA_FP_THD +837 0x0000 //TX_MAX_G_FP_BLK +838 0x0000 //TX_FFP_FADEIN +839 0x0000 //TX_FFP_FADEOUT +840 0x0000 //TX_WHISPERCTH +841 0x0000 //TX_WHISPERHOLDT +842 0x0000 //TX_WHISP_ENTHH +843 0x0000 //TX_WHISP_ENTHL +844 0x0000 //TX_WHISP_RTOTH +845 0x0000 //TX_WHISP_RTOTH2 +846 0x0096 //TX_MUTE_PERIOD +847 0x0000 //TX_FADE_IN_PERIOD +848 0x0100 //TX_FFP_RESRV_2 +849 0x0020 //TX_FFP_RESRV_3 +850 0x0000 //TX_FFP_RESRV_4 +851 0x0000 //TX_FFP_RESRV_5 +852 0x0000 //TX_FFP_RESRV_6 +853 0x0002 //TX_FILTINDX +854 0x0002 //TX_TDDRC_THRD_0 +855 0x0003 //TX_TDDRC_THRD_1 +856 0x1500 //TX_TDDRC_THRD_2 +857 0x1500 //TX_TDDRC_THRD_3 +858 0x3000 //TX_TDDRC_SLANT_0 +859 0x6E00 //TX_TDDRC_SLANT_1 +860 0x1000 //TX_TDDRC_ALPHA_UP_00 +861 0x7EB8 //TX_TDDRC_ALPHA_DWN_00 +862 0x0000 //TX_TDDRC_HMNC_FLAG +863 0x199A //TX_TDDRC_HMNC_GAIN +864 0x0000 //TX_TDDRC_SMT_FLAG +865 0x0CCD //TX_TDDRC_SMT_W +866 0x0650 //TX_TDDRC_DRC_GAIN +867 0x7FFF //TX_TDDRC_LMT_THRD +868 0x0000 //TX_TDDRC_LMT_ALPHA +869 0x0000 //TX_TFMASKLTH +870 0x0000 //TX_TFMASKLTHL +871 0x0CCD //TX_TFMASKHTH +872 0xECCD //TX_TFMASKLTH_BINVAD +873 0xFCCD //TX_TFMASKLTH_NS_EST +874 0xF800 //TX_TFMASKLTH_DOA +875 0x0CCD //TX_TFMASKTH_BLESSCUT +876 0x1000 //TX_B_LESSCUT_RTO_MASK +877 0x2000 //TX_SB_RHO_MEAN_TH_ABN +878 0x2000 //TX_B_POST_FLT_MASK +879 0x0000 //TX_B_POST_FLT_MASK1 +880 0x6333 //TX_GAIN_WIND_MASK +881 0x0000 //TX_TFMASK_BFSTRICT_MUSIC +882 0x0000 //TX_TFMASK_BFSTRICT_NOMUSIC +883 0x7333 //TX_FASTNS_OUTIN_TH +884 0x0CCD //TX_FASTNS_TFMASK_TH +885 0x0CCD //TX_FASTNS_TFMASKBIN_TH1 +886 0x0CCD //TX_FASTNS_TFMASKBIN_TH2 +887 0x0CCD //TX_FASTNS_TFMASKBIN_TH3 +888 0x0028 //TX_FASTNS_ARSPC_TH +889 0xC000 //TX_FASTNS_MASK5_TH +890 0x0810 //TX_POSTSSA_MIN_G_VR_MASK +891 0x1000 //TX_A_LESSCUT_RTO_MASK +892 0x1770 //TX_FASTNS_NOISETH +893 0xC000 //TX_FASTNS_SSA_THLFL +894 0xC000 //TX_FASTNS_SSA_THHFL +895 0xCCCC //TX_FASTNS_SSA_THLFH +896 0xD999 //TX_FASTNS_SSA_THHFH +897 0x2339 //TX_SENDFUNC_REG_MICMUTE +898 0x0021 //TX_SENDFUNC_REG_MICMUTE1 +899 0x02BC //TX_MICMUTE_RATIO_THR +900 0x0140 //TX_MICMUTE_AMP_THR +901 0x0004 //TX_MICMUTE_HPF_IND +902 0x00C0 //TX_MICMUTE_LOG_EYR_TH +903 0x0008 //TX_MICMUTE_CVG_TIME +904 0x0008 //TX_MICMUTE_RELEASE_TIME +905 0x01FE //TX_MIC_VOLUME_MIC0MUTE +906 0x0020 //TX_MICMUTE_EPD_OFFSET_0 +907 0x001E //TX_MICMUTE_FRQ_AEC_L +908 0x7999 //TX_MICMUTE_EAD_THR +909 0x7FFF //TX_MICMUTE_LAMBDA_CB_NLE +910 0x7FFF //TX_MICMUTE_LAMBDA_RE_EST +911 0x4000 //TX_DTD_THR1_MICMUTE_0 +912 0x7000 //TX_DTD_THR1_MICMUTE_1 +913 0x7FFF //TX_DTD_THR1_MICMUTE_2 +914 0x7FFF //TX_DTD_THR1_MICMUTE_3 +915 0x6CCC //TX_DTD_THR2_MICMUTE_0 +916 0x0400 //TX_MICMUTE_MIN_EQ_RE_EST_0 +917 0x0400 //TX_MICMUTE_MIN_EQ_RE_EST_1 +918 0x1000 //TX_MICMUTE_MIN_EQ_RE_EST_2 +919 0x7FFF //TX_MICMUTE_MIN_EQ_RE_EST_3 +920 0x7FFF //TX_MICMUTE_MIN_EQ_RE_EST_4 +921 0x4000 //TX_MICMUTE_C_POST_FLT +922 0x03E8 //TX_MICMUTE_DT_CUT_K +923 0x0001 //TX_MICMUTE_DT_CUT_THR +924 0x03E8 //TX_MICMUTE_DT_CUT_K2 +925 0x0001 //TX_MICMUTE_DT_CUT_THR2 +926 0x0064 //TX_MICMUTE_DT2_HOLD_N +927 0x1000 //TX_MICMUTE_RATIODTH_THCUT +928 0x1000 //TX_MICMUTE_B_POST_FLT_ECHOL +929 0x7FFF //TX_MICMUTE_B_POST_FLT_ECHOH +930 0x0400 //TX_MICMUTE_C_POST_FLT_MASK +931 0x7999 //TX_MICMUTE_RATIODTL_CUT_TH +932 0x0258 //TX_MICMUTE_DT_CUT_K1 +933 0x0800 //TX_MICMUTE_N2_SN_EST +934 0xFC00 //TX_MICMUTE_THR_SN_EST_0 +935 0x001C //TX_MICMUTE_MIN_G_CTRL_0 +936 0x6000 //TX_MICMUTE_A_POST_FILT_S_0 +937 0x7000 //TX_MICMUTE_B_POST_FILT_0 +938 0x2710 //TX_MIC1RUB_AMP_THR +939 0x0010 //TX_MIC1MUTE_RATIO_THR +940 0x0450 //TX_MIC1MUTE_AMP_THR +941 0x0008 //TX_MIC1MUTE_CVG_TIME +942 0x0008 //TX_MIC1MUTE_RELEASE_TIME +943 0x0000 //TX_AMS_RESRV_01 +944 0x0000 //TX_AMS_RESRV_02 +945 0x0000 //TX_AMS_RESRV_03 +946 0x0000 //TX_AMS_RESRV_04 +947 0x0000 //TX_AMS_RESRV_05 +948 0x0000 //TX_AMS_RESRV_06 +949 0x0000 //TX_AMS_RESRV_07 +950 0x0000 //TX_AMS_RESRV_08 +951 0x0000 //TX_AMS_RESRV_09 +952 0x0000 //TX_AMS_RESRV_10 +953 0x0000 //TX_AMS_RESRV_11 +954 0x0000 //TX_AMS_RESRV_12 +955 0x0000 //TX_AMS_RESRV_13 +956 0x0000 //TX_AMS_RESRV_14 +957 0x0000 //TX_AMS_RESRV_15 +958 0x0000 //TX_AMS_RESRV_16 +959 0x0000 //TX_AMS_RESRV_17 +960 0x0000 //TX_AMS_RESRV_18 +961 0x0000 //TX_AMS_RESRV_19 +#RX +0 0x203C //RX_RECVFUNC_MODE_0 +1 0x0000 //RX_RECVFUNC_MODE_1 +2 0x0003 //RX_SAMPLINGFREQ_SIG +3 0x0003 //RX_SAMPLINGFREQ_PROC +4 0x000A //RX_FRAME_SZ +5 0x0000 //RX_DELAY_OPT +6 0x1000 //RX_TDDRC_ALPHA_UP_1 +7 0x1000 //RX_TDDRC_ALPHA_UP_2 +8 0x1000 //RX_TDDRC_ALPHA_UP_3 +9 0x1000 //RX_TDDRC_ALPHA_UP_4 +10 0x05AA //RX_PGA +11 0x7FFF //RX_A_HP +12 0x4000 //RX_B_PE +13 0x5800 //RX_THR_PITCH_DET_0 +14 0x5000 //RX_THR_PITCH_DET_1 +15 0x4000 //RX_THR_PITCH_DET_2 +16 0x0008 //RX_PITCH_BFR_LEN +17 0x0003 //RX_SBD_PITCH_DET +18 0x0100 //RX_PP_RESRV_0 +19 0x0020 //RX_PP_RESRV_1 +20 0x0600 //RX_N_SN_EST +21 0x000C //RX_N2_SN_EST +22 0x000F //RX_NS_LVL_CTRL +23 0xF800 //RX_THR_SN_EST +24 0x7E00 //RX_LAMBDA_PFILT +25 0x000A //RX_FENS_RESRV_0 +26 0x0190 //RX_FENS_RESRV_1 +27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +30 0x0002 //RX_EXTRA_NS_L +31 0x0800 //RX_EXTRA_NS_A +32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +33 0x7000 //RX_TDDRC_LIMITER_THRD +34 0x0800 //RX_TDDRC_LIMITER_GAIN +35 0x199A //RX_A_POST_FLT +36 0x0000 //RX_LMT_THRD +37 0x4000 //RX_LMT_ALPHA +38 0x0020 //RX_FDEQ_SUBNUM +39 0x483E //RX_FDEQ_GAIN_0 +40 0x3E3E //RX_FDEQ_GAIN_1 +41 0x3E4C //RX_FDEQ_GAIN_2 +42 0x5064 //RX_FDEQ_GAIN_3 +43 0x7076 //RX_FDEQ_GAIN_4 +44 0x897A //RX_FDEQ_GAIN_5 +45 0x7C80 //RX_FDEQ_GAIN_6 +46 0x8888 //RX_FDEQ_GAIN_7 +47 0x949C //RX_FDEQ_GAIN_8 +48 0x96A4 //RX_FDEQ_GAIN_9 +49 0xA9A0 //RX_FDEQ_GAIN_10 +50 0x9487 //RX_FDEQ_GAIN_11 +51 0x6F64 //RX_FDEQ_GAIN_12 +52 0x625A //RX_FDEQ_GAIN_13 +53 0x5D80 //RX_FDEQ_GAIN_14 +54 0x8890 //RX_FDEQ_GAIN_15 +55 0x4848 //RX_FDEQ_GAIN_16 +56 0x4848 //RX_FDEQ_GAIN_17 +57 0x4848 //RX_FDEQ_GAIN_18 +58 0x4848 //RX_FDEQ_GAIN_19 +59 0x4848 //RX_FDEQ_GAIN_20 +60 0x4848 //RX_FDEQ_GAIN_21 +61 0x4848 //RX_FDEQ_GAIN_22 +62 0x4848 //RX_FDEQ_GAIN_23 +63 0x0202 //RX_FDEQ_BIN_0 +64 0x0202 //RX_FDEQ_BIN_1 +65 0x0301 //RX_FDEQ_BIN_2 +66 0x0404 //RX_FDEQ_BIN_3 +67 0x0406 //RX_FDEQ_BIN_4 +68 0x0109 //RX_FDEQ_BIN_5 +69 0x0708 //RX_FDEQ_BIN_6 +70 0x090A //RX_FDEQ_BIN_7 +71 0x0B0C //RX_FDEQ_BIN_8 +72 0x0D0E //RX_FDEQ_BIN_9 +73 0x1013 //RX_FDEQ_BIN_10 +74 0x1719 //RX_FDEQ_BIN_11 +75 0x1B0F //RX_FDEQ_BIN_12 +76 0x141E //RX_FDEQ_BIN_13 +77 0x3728 //RX_FDEQ_BIN_14 +78 0x282C //RX_FDEQ_BIN_15 +79 0x0000 //RX_FDEQ_BIN_16 +80 0x0000 //RX_FDEQ_BIN_17 +81 0x0000 //RX_FDEQ_BIN_18 +82 0x0000 //RX_FDEQ_BIN_19 +83 0x0000 //RX_FDEQ_BIN_20 +84 0x0000 //RX_FDEQ_BIN_21 +85 0x0000 //RX_FDEQ_BIN_22 +86 0x0000 //RX_FDEQ_BIN_23 +87 0x4000 //RX_FDEQ_RESRV_0 +88 0x0320 //RX_FDEQ_RESRV_1 +89 0x0018 //RX_FDDRC_BAND_MARGIN_0 +90 0x0030 //RX_FDDRC_BAND_MARGIN_1 +91 0x0050 //RX_FDDRC_BAND_MARGIN_2 +92 0x0080 //RX_FDDRC_BAND_MARGIN_3 +93 0x0007 //RX_FDDRC_BLOCK_EXP +94 0x5000 //RX_FDDRC_THRD_2_0 +95 0x5000 //RX_FDDRC_THRD_2_1 +96 0x5000 //RX_FDDRC_THRD_2_2 +97 0x5000 //RX_FDDRC_THRD_2_3 +98 0x6400 //RX_FDDRC_THRD_3_0 +99 0x6400 //RX_FDDRC_THRD_3_1 +100 0x6400 //RX_FDDRC_THRD_3_2 +101 0x6400 //RX_FDDRC_THRD_3_3 +102 0x2000 //RX_FDDRC_SLANT_0_0 +103 0x2000 //RX_FDDRC_SLANT_0_1 +104 0x2000 //RX_FDDRC_SLANT_0_2 +105 0x2000 //RX_FDDRC_SLANT_0_3 +106 0x5333 //RX_FDDRC_SLANT_1_0 +107 0x5333 //RX_FDDRC_SLANT_1_1 +108 0x5333 //RX_FDDRC_SLANT_1_2 +109 0x5333 //RX_FDDRC_SLANT_1_3 +110 0x0000 //RX_FDDRC_RESRV_0 +111 0x0002 //RX_FILTINDX +112 0x0001 //RX_TDDRC_THRD_0 +113 0x0002 //RX_TDDRC_THRD_1 +114 0x1800 //RX_TDDRC_THRD_2 +115 0x1800 //RX_TDDRC_THRD_3 +116 0x7FFF //RX_TDDRC_SLANT_0 +117 0x7FFF //RX_TDDRC_SLANT_1 +118 0x1000 //RX_TDDRC_ALPHA_UP_0 +119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +120 0x0000 //RX_TDDRC_HMNC_FLAG +121 0x199A //RX_TDDRC_HMNC_GAIN +122 0x0001 //RX_TDDRC_SMT_FLAG +123 0x0CCD //RX_TDDRC_SMT_W +124 0x0551 //RX_TDDRC_DRC_GAIN +125 0x7C00 //RX_LAMBDA_PKA_FP +126 0x13E0 //RX_TPKA_FP +127 0x0080 //RX_MIN_G_FP +128 0x2000 //RX_MAX_G_FP +129 0x0100 //RX_SPK_VOL +130 0x0000 //RX_VOL_RESRV_0 +131 0x0000 //RX_MAXLEVEL_CNG +132 0x3000 //RX_BWE_UV_TH +133 0x3000 //RX_BWE_UV_TH2 +134 0x1800 //RX_BWE_UV_TH3 +135 0x1000 //RX_BWE_V_TH +136 0x04CD //RX_BWE_GAIN1_V_TH1 +137 0x0F33 //RX_BWE_GAIN1_V_TH2 +138 0x7333 //RX_BWE_UV_EQ +139 0x199A //RX_BWE_V_EQ +140 0x7333 //RX_BWE_TONE_TH +141 0x0004 //RX_BWE_UV_HOLD_T +142 0x6CCD //RX_BWE_GAIN2_ALPHA +143 0x799A //RX_BWE_GAIN3_ALPHA +144 0x001E //RX_BWE_CUTOFF +145 0x3000 //RX_BWE_GAINFILL +146 0x3200 //RX_BWE_MAXTH_TONE +147 0x2000 //RX_BWE_EQ_0 +148 0x2000 //RX_BWE_EQ_1 +149 0x2000 //RX_BWE_EQ_2 +150 0x2000 //RX_BWE_EQ_3 +151 0x2000 //RX_BWE_EQ_4 +152 0x2000 //RX_BWE_EQ_5 +153 0x2000 //RX_BWE_EQ_6 +154 0x0000 //RX_BWE_RESRV_0 +155 0x0000 //RX_BWE_RESRV_1 +156 0x0000 //RX_BWE_RESRV_2 +#VOL 0 +6 0x1000 //RX_TDDRC_ALPHA_UP_1 +7 0x1000 //RX_TDDRC_ALPHA_UP_2 +8 0x1000 //RX_TDDRC_ALPHA_UP_3 +9 0x1000 //RX_TDDRC_ALPHA_UP_4 +27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +33 0x7000 //RX_TDDRC_LIMITER_THRD +34 0x0800 //RX_TDDRC_LIMITER_GAIN +112 0x0001 //RX_TDDRC_THRD_0 +113 0x0002 //RX_TDDRC_THRD_1 +114 0x1800 //RX_TDDRC_THRD_2 +115 0x1800 //RX_TDDRC_THRD_3 +116 0x7FFF //RX_TDDRC_SLANT_0 +117 0x7FFF //RX_TDDRC_SLANT_1 +118 0x1000 //RX_TDDRC_ALPHA_UP_0 +119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +120 0x0000 //RX_TDDRC_HMNC_FLAG +121 0x199A //RX_TDDRC_HMNC_GAIN +122 0x0001 //RX_TDDRC_SMT_FLAG +123 0x0CCD //RX_TDDRC_SMT_W +124 0x056F //RX_TDDRC_DRC_GAIN +38 0x0020 //RX_FDEQ_SUBNUM +39 0x483E //RX_FDEQ_GAIN_0 +40 0x3E3E //RX_FDEQ_GAIN_1 +41 0x3E4C //RX_FDEQ_GAIN_2 +42 0x586E //RX_FDEQ_GAIN_3 +43 0x8496 //RX_FDEQ_GAIN_4 +44 0x968E //RX_FDEQ_GAIN_5 +45 0x8488 //RX_FDEQ_GAIN_6 +46 0x8884 //RX_FDEQ_GAIN_7 +47 0x9CA4 //RX_FDEQ_GAIN_8 +48 0x98A8 //RX_FDEQ_GAIN_9 +49 0xBEB8 //RX_FDEQ_GAIN_10 +50 0x918D //RX_FDEQ_GAIN_11 +51 0x7566 //RX_FDEQ_GAIN_12 +52 0x6460 //RX_FDEQ_GAIN_13 +53 0x6174 //RX_FDEQ_GAIN_14 +54 0x7890 //RX_FDEQ_GAIN_15 +55 0x4848 //RX_FDEQ_GAIN_16 +56 0x4848 //RX_FDEQ_GAIN_17 +57 0x4848 //RX_FDEQ_GAIN_18 +58 0x4848 //RX_FDEQ_GAIN_19 +59 0x4848 //RX_FDEQ_GAIN_20 +60 0x4848 //RX_FDEQ_GAIN_21 +61 0x4848 //RX_FDEQ_GAIN_22 +62 0x4848 //RX_FDEQ_GAIN_23 +63 0x0202 //RX_FDEQ_BIN_0 +64 0x0202 //RX_FDEQ_BIN_1 +65 0x0301 //RX_FDEQ_BIN_2 +66 0x0404 //RX_FDEQ_BIN_3 +67 0x0406 //RX_FDEQ_BIN_4 +68 0x0109 //RX_FDEQ_BIN_5 +69 0x0708 //RX_FDEQ_BIN_6 +70 0x090A //RX_FDEQ_BIN_7 +71 0x0B0C //RX_FDEQ_BIN_8 +72 0x0D09 //RX_FDEQ_BIN_9 +73 0x0819 //RX_FDEQ_BIN_10 +74 0x1E19 //RX_FDEQ_BIN_11 +75 0x1B0F //RX_FDEQ_BIN_12 +76 0x141E //RX_FDEQ_BIN_13 +77 0x3728 //RX_FDEQ_BIN_14 +78 0x282C //RX_FDEQ_BIN_15 +79 0x0000 //RX_FDEQ_BIN_16 +80 0x0000 //RX_FDEQ_BIN_17 +81 0x0000 //RX_FDEQ_BIN_18 +82 0x0000 //RX_FDEQ_BIN_19 +83 0x0000 //RX_FDEQ_BIN_20 +84 0x0000 //RX_FDEQ_BIN_21 +85 0x0000 //RX_FDEQ_BIN_22 +86 0x0000 //RX_FDEQ_BIN_23 +87 0x4000 //RX_FDEQ_RESRV_0 +88 0x0320 //RX_FDEQ_RESRV_1 +89 0x0018 //RX_FDDRC_BAND_MARGIN_0 +90 0x0030 //RX_FDDRC_BAND_MARGIN_1 +91 0x0050 //RX_FDDRC_BAND_MARGIN_2 +92 0x0080 //RX_FDDRC_BAND_MARGIN_3 +93 0x0007 //RX_FDDRC_BLOCK_EXP +94 0x5000 //RX_FDDRC_THRD_2_0 +95 0x5000 //RX_FDDRC_THRD_2_1 +96 0x5000 //RX_FDDRC_THRD_2_2 +97 0x5000 //RX_FDDRC_THRD_2_3 +98 0x6400 //RX_FDDRC_THRD_3_0 +99 0x6400 //RX_FDDRC_THRD_3_1 +100 0x6400 //RX_FDDRC_THRD_3_2 +101 0x6400 //RX_FDDRC_THRD_3_3 +102 0x2000 //RX_FDDRC_SLANT_0_0 +103 0x2000 //RX_FDDRC_SLANT_0_1 +104 0x2000 //RX_FDDRC_SLANT_0_2 +105 0x2000 //RX_FDDRC_SLANT_0_3 +106 0x5333 //RX_FDDRC_SLANT_1_0 +107 0x5333 //RX_FDDRC_SLANT_1_1 +108 0x5333 //RX_FDDRC_SLANT_1_2 +109 0x5333 //RX_FDDRC_SLANT_1_3 +110 0x0000 //RX_FDDRC_RESRV_0 +129 0x000A //RX_SPK_VOL +130 0x0000 //RX_VOL_RESRV_0 +#VOL 1 +6 0x1000 //RX_TDDRC_ALPHA_UP_1 +7 0x1000 //RX_TDDRC_ALPHA_UP_2 +8 0x1000 //RX_TDDRC_ALPHA_UP_3 +9 0x1000 //RX_TDDRC_ALPHA_UP_4 +27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +33 0x7000 //RX_TDDRC_LIMITER_THRD +34 0x0800 //RX_TDDRC_LIMITER_GAIN +112 0x0001 //RX_TDDRC_THRD_0 +113 0x0002 //RX_TDDRC_THRD_1 +114 0x1800 //RX_TDDRC_THRD_2 +115 0x1800 //RX_TDDRC_THRD_3 +116 0x7FFF //RX_TDDRC_SLANT_0 +117 0x7FFF //RX_TDDRC_SLANT_1 +118 0x1000 //RX_TDDRC_ALPHA_UP_0 +119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +120 0x0000 //RX_TDDRC_HMNC_FLAG +121 0x199A //RX_TDDRC_HMNC_GAIN +122 0x0001 //RX_TDDRC_SMT_FLAG +123 0x0CCD //RX_TDDRC_SMT_W +124 0x056F //RX_TDDRC_DRC_GAIN +38 0x0020 //RX_FDEQ_SUBNUM +39 0x483E //RX_FDEQ_GAIN_0 +40 0x3E3E //RX_FDEQ_GAIN_1 +41 0x3E4C //RX_FDEQ_GAIN_2 +42 0x586E //RX_FDEQ_GAIN_3 +43 0x8496 //RX_FDEQ_GAIN_4 +44 0x968E //RX_FDEQ_GAIN_5 +45 0x8488 //RX_FDEQ_GAIN_6 +46 0x8884 //RX_FDEQ_GAIN_7 +47 0x9CA4 //RX_FDEQ_GAIN_8 +48 0x98A8 //RX_FDEQ_GAIN_9 +49 0xBEB8 //RX_FDEQ_GAIN_10 +50 0x918D //RX_FDEQ_GAIN_11 +51 0x7566 //RX_FDEQ_GAIN_12 +52 0x6460 //RX_FDEQ_GAIN_13 +53 0x6174 //RX_FDEQ_GAIN_14 +54 0x7890 //RX_FDEQ_GAIN_15 +55 0x4848 //RX_FDEQ_GAIN_16 +56 0x4848 //RX_FDEQ_GAIN_17 +57 0x4848 //RX_FDEQ_GAIN_18 +58 0x4848 //RX_FDEQ_GAIN_19 +59 0x4848 //RX_FDEQ_GAIN_20 +60 0x4848 //RX_FDEQ_GAIN_21 +61 0x4848 //RX_FDEQ_GAIN_22 +62 0x4848 //RX_FDEQ_GAIN_23 +63 0x0202 //RX_FDEQ_BIN_0 +64 0x0202 //RX_FDEQ_BIN_1 +65 0x0301 //RX_FDEQ_BIN_2 +66 0x0404 //RX_FDEQ_BIN_3 +67 0x0406 //RX_FDEQ_BIN_4 +68 0x0109 //RX_FDEQ_BIN_5 +69 0x0708 //RX_FDEQ_BIN_6 +70 0x090A //RX_FDEQ_BIN_7 +71 0x0B0C //RX_FDEQ_BIN_8 +72 0x0D09 //RX_FDEQ_BIN_9 +73 0x0819 //RX_FDEQ_BIN_10 +74 0x1E19 //RX_FDEQ_BIN_11 +75 0x1B0F //RX_FDEQ_BIN_12 +76 0x141E //RX_FDEQ_BIN_13 +77 0x3728 //RX_FDEQ_BIN_14 +78 0x282C //RX_FDEQ_BIN_15 +79 0x0000 //RX_FDEQ_BIN_16 +80 0x0000 //RX_FDEQ_BIN_17 +81 0x0000 //RX_FDEQ_BIN_18 +82 0x0000 //RX_FDEQ_BIN_19 +83 0x0000 //RX_FDEQ_BIN_20 +84 0x0000 //RX_FDEQ_BIN_21 +85 0x0000 //RX_FDEQ_BIN_22 +86 0x0000 //RX_FDEQ_BIN_23 +87 0x4000 //RX_FDEQ_RESRV_0 +88 0x0320 //RX_FDEQ_RESRV_1 +89 0x0018 //RX_FDDRC_BAND_MARGIN_0 +90 0x0030 //RX_FDDRC_BAND_MARGIN_1 +91 0x0050 //RX_FDDRC_BAND_MARGIN_2 +92 0x0080 //RX_FDDRC_BAND_MARGIN_3 +93 0x0007 //RX_FDDRC_BLOCK_EXP +94 0x5000 //RX_FDDRC_THRD_2_0 +95 0x5000 //RX_FDDRC_THRD_2_1 +96 0x5000 //RX_FDDRC_THRD_2_2 +97 0x5000 //RX_FDDRC_THRD_2_3 +98 0x6400 //RX_FDDRC_THRD_3_0 +99 0x6400 //RX_FDDRC_THRD_3_1 +100 0x6400 //RX_FDDRC_THRD_3_2 +101 0x6400 //RX_FDDRC_THRD_3_3 +102 0x2000 //RX_FDDRC_SLANT_0_0 +103 0x2000 //RX_FDDRC_SLANT_0_1 +104 0x2000 //RX_FDDRC_SLANT_0_2 +105 0x2000 //RX_FDDRC_SLANT_0_3 +106 0x5333 //RX_FDDRC_SLANT_1_0 +107 0x5333 //RX_FDDRC_SLANT_1_1 +108 0x5333 //RX_FDDRC_SLANT_1_2 +109 0x5333 //RX_FDDRC_SLANT_1_3 +110 0x0000 //RX_FDDRC_RESRV_0 +129 0x0010 //RX_SPK_VOL +130 0x0000 //RX_VOL_RESRV_0 +#VOL 2 +6 0x1000 //RX_TDDRC_ALPHA_UP_1 +7 0x1000 //RX_TDDRC_ALPHA_UP_2 +8 0x1000 //RX_TDDRC_ALPHA_UP_3 +9 0x1000 //RX_TDDRC_ALPHA_UP_4 +27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +33 0x7000 //RX_TDDRC_LIMITER_THRD +34 0x0800 //RX_TDDRC_LIMITER_GAIN +112 0x0001 //RX_TDDRC_THRD_0 +113 0x0002 //RX_TDDRC_THRD_1 +114 0x1800 //RX_TDDRC_THRD_2 +115 0x1800 //RX_TDDRC_THRD_3 +116 0x7FFF //RX_TDDRC_SLANT_0 +117 0x7FFF //RX_TDDRC_SLANT_1 +118 0x1000 //RX_TDDRC_ALPHA_UP_0 +119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +120 0x0000 //RX_TDDRC_HMNC_FLAG +121 0x199A //RX_TDDRC_HMNC_GAIN +122 0x0001 //RX_TDDRC_SMT_FLAG +123 0x0CCD //RX_TDDRC_SMT_W +124 0x056F //RX_TDDRC_DRC_GAIN +38 0x0020 //RX_FDEQ_SUBNUM +39 0x483E //RX_FDEQ_GAIN_0 +40 0x3E3E //RX_FDEQ_GAIN_1 +41 0x3E4C //RX_FDEQ_GAIN_2 +42 0x586E //RX_FDEQ_GAIN_3 +43 0x8496 //RX_FDEQ_GAIN_4 +44 0x968E //RX_FDEQ_GAIN_5 +45 0x8488 //RX_FDEQ_GAIN_6 +46 0x8884 //RX_FDEQ_GAIN_7 +47 0x9CA4 //RX_FDEQ_GAIN_8 +48 0x98A8 //RX_FDEQ_GAIN_9 +49 0xBEB8 //RX_FDEQ_GAIN_10 +50 0x918D //RX_FDEQ_GAIN_11 +51 0x7566 //RX_FDEQ_GAIN_12 +52 0x6460 //RX_FDEQ_GAIN_13 +53 0x6174 //RX_FDEQ_GAIN_14 +54 0x7890 //RX_FDEQ_GAIN_15 +55 0x4848 //RX_FDEQ_GAIN_16 +56 0x4848 //RX_FDEQ_GAIN_17 +57 0x4848 //RX_FDEQ_GAIN_18 +58 0x4848 //RX_FDEQ_GAIN_19 +59 0x4848 //RX_FDEQ_GAIN_20 +60 0x4848 //RX_FDEQ_GAIN_21 +61 0x4848 //RX_FDEQ_GAIN_22 +62 0x4848 //RX_FDEQ_GAIN_23 +63 0x0202 //RX_FDEQ_BIN_0 +64 0x0202 //RX_FDEQ_BIN_1 +65 0x0301 //RX_FDEQ_BIN_2 +66 0x0404 //RX_FDEQ_BIN_3 +67 0x0406 //RX_FDEQ_BIN_4 +68 0x0109 //RX_FDEQ_BIN_5 +69 0x0708 //RX_FDEQ_BIN_6 +70 0x090A //RX_FDEQ_BIN_7 +71 0x0B0C //RX_FDEQ_BIN_8 +72 0x0D09 //RX_FDEQ_BIN_9 +73 0x0819 //RX_FDEQ_BIN_10 +74 0x1E19 //RX_FDEQ_BIN_11 +75 0x1B0F //RX_FDEQ_BIN_12 +76 0x141E //RX_FDEQ_BIN_13 +77 0x3728 //RX_FDEQ_BIN_14 +78 0x282C //RX_FDEQ_BIN_15 +79 0x0000 //RX_FDEQ_BIN_16 +80 0x0000 //RX_FDEQ_BIN_17 +81 0x0000 //RX_FDEQ_BIN_18 +82 0x0000 //RX_FDEQ_BIN_19 +83 0x0000 //RX_FDEQ_BIN_20 +84 0x0000 //RX_FDEQ_BIN_21 +85 0x0000 //RX_FDEQ_BIN_22 +86 0x0000 //RX_FDEQ_BIN_23 +87 0x4000 //RX_FDEQ_RESRV_0 +88 0x0320 //RX_FDEQ_RESRV_1 +89 0x0018 //RX_FDDRC_BAND_MARGIN_0 +90 0x0030 //RX_FDDRC_BAND_MARGIN_1 +91 0x0050 //RX_FDDRC_BAND_MARGIN_2 +92 0x0080 //RX_FDDRC_BAND_MARGIN_3 +93 0x0007 //RX_FDDRC_BLOCK_EXP +94 0x5000 //RX_FDDRC_THRD_2_0 +95 0x5000 //RX_FDDRC_THRD_2_1 +96 0x5000 //RX_FDDRC_THRD_2_2 +97 0x5000 //RX_FDDRC_THRD_2_3 +98 0x6400 //RX_FDDRC_THRD_3_0 +99 0x6400 //RX_FDDRC_THRD_3_1 +100 0x6400 //RX_FDDRC_THRD_3_2 +101 0x6400 //RX_FDDRC_THRD_3_3 +102 0x2000 //RX_FDDRC_SLANT_0_0 +103 0x2000 //RX_FDDRC_SLANT_0_1 +104 0x2000 //RX_FDDRC_SLANT_0_2 +105 0x2000 //RX_FDDRC_SLANT_0_3 +106 0x5333 //RX_FDDRC_SLANT_1_0 +107 0x5333 //RX_FDDRC_SLANT_1_1 +108 0x5333 //RX_FDDRC_SLANT_1_2 +109 0x5333 //RX_FDDRC_SLANT_1_3 +110 0x0000 //RX_FDDRC_RESRV_0 +129 0x001B //RX_SPK_VOL +130 0x0000 //RX_VOL_RESRV_0 +#VOL 3 +6 0x1000 //RX_TDDRC_ALPHA_UP_1 +7 0x1000 //RX_TDDRC_ALPHA_UP_2 +8 0x1000 //RX_TDDRC_ALPHA_UP_3 +9 0x1000 //RX_TDDRC_ALPHA_UP_4 +27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +33 0x7000 //RX_TDDRC_LIMITER_THRD +34 0x0800 //RX_TDDRC_LIMITER_GAIN +112 0x0001 //RX_TDDRC_THRD_0 +113 0x0002 //RX_TDDRC_THRD_1 +114 0x1800 //RX_TDDRC_THRD_2 +115 0x1800 //RX_TDDRC_THRD_3 +116 0x7FFF //RX_TDDRC_SLANT_0 +117 0x7FFF //RX_TDDRC_SLANT_1 +118 0x1000 //RX_TDDRC_ALPHA_UP_0 +119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +120 0x0000 //RX_TDDRC_HMNC_FLAG +121 0x199A //RX_TDDRC_HMNC_GAIN +122 0x0001 //RX_TDDRC_SMT_FLAG +123 0x0CCD //RX_TDDRC_SMT_W +124 0x056F //RX_TDDRC_DRC_GAIN +38 0x0020 //RX_FDEQ_SUBNUM +39 0x483E //RX_FDEQ_GAIN_0 +40 0x3E3E //RX_FDEQ_GAIN_1 +41 0x3E4C //RX_FDEQ_GAIN_2 +42 0x586E //RX_FDEQ_GAIN_3 +43 0x8496 //RX_FDEQ_GAIN_4 +44 0x968E //RX_FDEQ_GAIN_5 +45 0x8488 //RX_FDEQ_GAIN_6 +46 0x8884 //RX_FDEQ_GAIN_7 +47 0x9CA4 //RX_FDEQ_GAIN_8 +48 0x98A8 //RX_FDEQ_GAIN_9 +49 0xBEB8 //RX_FDEQ_GAIN_10 +50 0x918D //RX_FDEQ_GAIN_11 +51 0x7566 //RX_FDEQ_GAIN_12 +52 0x6460 //RX_FDEQ_GAIN_13 +53 0x6174 //RX_FDEQ_GAIN_14 +54 0x7890 //RX_FDEQ_GAIN_15 +55 0x4848 //RX_FDEQ_GAIN_16 +56 0x4848 //RX_FDEQ_GAIN_17 +57 0x4848 //RX_FDEQ_GAIN_18 +58 0x4848 //RX_FDEQ_GAIN_19 +59 0x4848 //RX_FDEQ_GAIN_20 +60 0x4848 //RX_FDEQ_GAIN_21 +61 0x4848 //RX_FDEQ_GAIN_22 +62 0x4848 //RX_FDEQ_GAIN_23 +63 0x0202 //RX_FDEQ_BIN_0 +64 0x0202 //RX_FDEQ_BIN_1 +65 0x0301 //RX_FDEQ_BIN_2 +66 0x0404 //RX_FDEQ_BIN_3 +67 0x0406 //RX_FDEQ_BIN_4 +68 0x0109 //RX_FDEQ_BIN_5 +69 0x0708 //RX_FDEQ_BIN_6 +70 0x090A //RX_FDEQ_BIN_7 +71 0x0B0C //RX_FDEQ_BIN_8 +72 0x0D09 //RX_FDEQ_BIN_9 +73 0x0819 //RX_FDEQ_BIN_10 +74 0x1E19 //RX_FDEQ_BIN_11 +75 0x1B0F //RX_FDEQ_BIN_12 +76 0x141E //RX_FDEQ_BIN_13 +77 0x3728 //RX_FDEQ_BIN_14 +78 0x282C //RX_FDEQ_BIN_15 +79 0x0000 //RX_FDEQ_BIN_16 +80 0x0000 //RX_FDEQ_BIN_17 +81 0x0000 //RX_FDEQ_BIN_18 +82 0x0000 //RX_FDEQ_BIN_19 +83 0x0000 //RX_FDEQ_BIN_20 +84 0x0000 //RX_FDEQ_BIN_21 +85 0x0000 //RX_FDEQ_BIN_22 +86 0x0000 //RX_FDEQ_BIN_23 +87 0x4000 //RX_FDEQ_RESRV_0 +88 0x0320 //RX_FDEQ_RESRV_1 +89 0x0018 //RX_FDDRC_BAND_MARGIN_0 +90 0x0030 //RX_FDDRC_BAND_MARGIN_1 +91 0x0050 //RX_FDDRC_BAND_MARGIN_2 +92 0x0080 //RX_FDDRC_BAND_MARGIN_3 +93 0x0007 //RX_FDDRC_BLOCK_EXP +94 0x5000 //RX_FDDRC_THRD_2_0 +95 0x5000 //RX_FDDRC_THRD_2_1 +96 0x5000 //RX_FDDRC_THRD_2_2 +97 0x5000 //RX_FDDRC_THRD_2_3 +98 0x6400 //RX_FDDRC_THRD_3_0 +99 0x6400 //RX_FDDRC_THRD_3_1 +100 0x6400 //RX_FDDRC_THRD_3_2 +101 0x6400 //RX_FDDRC_THRD_3_3 +102 0x2000 //RX_FDDRC_SLANT_0_0 +103 0x2000 //RX_FDDRC_SLANT_0_1 +104 0x2000 //RX_FDDRC_SLANT_0_2 +105 0x2000 //RX_FDDRC_SLANT_0_3 +106 0x5333 //RX_FDDRC_SLANT_1_0 +107 0x5333 //RX_FDDRC_SLANT_1_1 +108 0x5333 //RX_FDDRC_SLANT_1_2 +109 0x5333 //RX_FDDRC_SLANT_1_3 +110 0x0000 //RX_FDDRC_RESRV_0 +129 0x0035 //RX_SPK_VOL +130 0x0000 //RX_VOL_RESRV_0 +#VOL 4 +6 0x1000 //RX_TDDRC_ALPHA_UP_1 +7 0x1000 //RX_TDDRC_ALPHA_UP_2 +8 0x1000 //RX_TDDRC_ALPHA_UP_3 +9 0x1000 //RX_TDDRC_ALPHA_UP_4 +27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +33 0x7000 //RX_TDDRC_LIMITER_THRD +34 0x0800 //RX_TDDRC_LIMITER_GAIN +112 0x0001 //RX_TDDRC_THRD_0 +113 0x0002 //RX_TDDRC_THRD_1 +114 0x1800 //RX_TDDRC_THRD_2 +115 0x1800 //RX_TDDRC_THRD_3 +116 0x7FFF //RX_TDDRC_SLANT_0 +117 0x7FFF //RX_TDDRC_SLANT_1 +118 0x1000 //RX_TDDRC_ALPHA_UP_0 +119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +120 0x0000 //RX_TDDRC_HMNC_FLAG +121 0x199A //RX_TDDRC_HMNC_GAIN +122 0x0001 //RX_TDDRC_SMT_FLAG +123 0x0CCD //RX_TDDRC_SMT_W +124 0x056F //RX_TDDRC_DRC_GAIN +38 0x0020 //RX_FDEQ_SUBNUM +39 0x483E //RX_FDEQ_GAIN_0 +40 0x3E3E //RX_FDEQ_GAIN_1 +41 0x3E4C //RX_FDEQ_GAIN_2 +42 0x586E //RX_FDEQ_GAIN_3 +43 0x8496 //RX_FDEQ_GAIN_4 +44 0x968E //RX_FDEQ_GAIN_5 +45 0x8488 //RX_FDEQ_GAIN_6 +46 0x8884 //RX_FDEQ_GAIN_7 +47 0x9CA4 //RX_FDEQ_GAIN_8 +48 0x98A8 //RX_FDEQ_GAIN_9 +49 0xBEB8 //RX_FDEQ_GAIN_10 +50 0x918D //RX_FDEQ_GAIN_11 +51 0x7566 //RX_FDEQ_GAIN_12 +52 0x6460 //RX_FDEQ_GAIN_13 +53 0x6174 //RX_FDEQ_GAIN_14 +54 0x7890 //RX_FDEQ_GAIN_15 +55 0x4848 //RX_FDEQ_GAIN_16 +56 0x4848 //RX_FDEQ_GAIN_17 +57 0x4848 //RX_FDEQ_GAIN_18 +58 0x4848 //RX_FDEQ_GAIN_19 +59 0x4848 //RX_FDEQ_GAIN_20 +60 0x4848 //RX_FDEQ_GAIN_21 +61 0x4848 //RX_FDEQ_GAIN_22 +62 0x4848 //RX_FDEQ_GAIN_23 +63 0x0202 //RX_FDEQ_BIN_0 +64 0x0202 //RX_FDEQ_BIN_1 +65 0x0301 //RX_FDEQ_BIN_2 +66 0x0404 //RX_FDEQ_BIN_3 +67 0x0406 //RX_FDEQ_BIN_4 +68 0x0109 //RX_FDEQ_BIN_5 +69 0x0708 //RX_FDEQ_BIN_6 +70 0x090A //RX_FDEQ_BIN_7 +71 0x0B0C //RX_FDEQ_BIN_8 +72 0x0D09 //RX_FDEQ_BIN_9 +73 0x0819 //RX_FDEQ_BIN_10 +74 0x1E19 //RX_FDEQ_BIN_11 +75 0x1B0F //RX_FDEQ_BIN_12 +76 0x141E //RX_FDEQ_BIN_13 +77 0x3728 //RX_FDEQ_BIN_14 +78 0x282C //RX_FDEQ_BIN_15 +79 0x0000 //RX_FDEQ_BIN_16 +80 0x0000 //RX_FDEQ_BIN_17 +81 0x0000 //RX_FDEQ_BIN_18 +82 0x0000 //RX_FDEQ_BIN_19 +83 0x0000 //RX_FDEQ_BIN_20 +84 0x0000 //RX_FDEQ_BIN_21 +85 0x0000 //RX_FDEQ_BIN_22 +86 0x0000 //RX_FDEQ_BIN_23 +87 0x4000 //RX_FDEQ_RESRV_0 +88 0x0320 //RX_FDEQ_RESRV_1 +89 0x0018 //RX_FDDRC_BAND_MARGIN_0 +90 0x0030 //RX_FDDRC_BAND_MARGIN_1 +91 0x0050 //RX_FDDRC_BAND_MARGIN_2 +92 0x0080 //RX_FDDRC_BAND_MARGIN_3 +93 0x0007 //RX_FDDRC_BLOCK_EXP +94 0x5000 //RX_FDDRC_THRD_2_0 +95 0x5000 //RX_FDDRC_THRD_2_1 +96 0x5000 //RX_FDDRC_THRD_2_2 +97 0x5000 //RX_FDDRC_THRD_2_3 +98 0x6400 //RX_FDDRC_THRD_3_0 +99 0x6400 //RX_FDDRC_THRD_3_1 +100 0x6400 //RX_FDDRC_THRD_3_2 +101 0x6400 //RX_FDDRC_THRD_3_3 +102 0x2000 //RX_FDDRC_SLANT_0_0 +103 0x2000 //RX_FDDRC_SLANT_0_1 +104 0x2000 //RX_FDDRC_SLANT_0_2 +105 0x2000 //RX_FDDRC_SLANT_0_3 +106 0x5333 //RX_FDDRC_SLANT_1_0 +107 0x5333 //RX_FDDRC_SLANT_1_1 +108 0x5333 //RX_FDDRC_SLANT_1_2 +109 0x5333 //RX_FDDRC_SLANT_1_3 +110 0x0000 //RX_FDDRC_RESRV_0 +129 0x0047 //RX_SPK_VOL +130 0x0000 //RX_VOL_RESRV_0 +#VOL 5 +6 0x1000 //RX_TDDRC_ALPHA_UP_1 +7 0x1000 //RX_TDDRC_ALPHA_UP_2 +8 0x1000 //RX_TDDRC_ALPHA_UP_3 +9 0x1000 //RX_TDDRC_ALPHA_UP_4 +27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +33 0x7000 //RX_TDDRC_LIMITER_THRD +34 0x0800 //RX_TDDRC_LIMITER_GAIN +112 0x0001 //RX_TDDRC_THRD_0 +113 0x0002 //RX_TDDRC_THRD_1 +114 0x1800 //RX_TDDRC_THRD_2 +115 0x1800 //RX_TDDRC_THRD_3 +116 0x7FFF //RX_TDDRC_SLANT_0 +117 0x7FFF //RX_TDDRC_SLANT_1 +118 0x1000 //RX_TDDRC_ALPHA_UP_0 +119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +120 0x0000 //RX_TDDRC_HMNC_FLAG +121 0x199A //RX_TDDRC_HMNC_GAIN +122 0x0001 //RX_TDDRC_SMT_FLAG +123 0x0CCD //RX_TDDRC_SMT_W +124 0x056F //RX_TDDRC_DRC_GAIN +38 0x0020 //RX_FDEQ_SUBNUM +39 0x483E //RX_FDEQ_GAIN_0 +40 0x3E3E //RX_FDEQ_GAIN_1 +41 0x3E4C //RX_FDEQ_GAIN_2 +42 0x586E //RX_FDEQ_GAIN_3 +43 0x8496 //RX_FDEQ_GAIN_4 +44 0x968E //RX_FDEQ_GAIN_5 +45 0x8488 //RX_FDEQ_GAIN_6 +46 0x8884 //RX_FDEQ_GAIN_7 +47 0x9CA4 //RX_FDEQ_GAIN_8 +48 0x98A8 //RX_FDEQ_GAIN_9 +49 0xBEB8 //RX_FDEQ_GAIN_10 +50 0x918D //RX_FDEQ_GAIN_11 +51 0x7566 //RX_FDEQ_GAIN_12 +52 0x6460 //RX_FDEQ_GAIN_13 +53 0x6174 //RX_FDEQ_GAIN_14 +54 0x7890 //RX_FDEQ_GAIN_15 +55 0x4848 //RX_FDEQ_GAIN_16 +56 0x4848 //RX_FDEQ_GAIN_17 +57 0x4848 //RX_FDEQ_GAIN_18 +58 0x4848 //RX_FDEQ_GAIN_19 +59 0x4848 //RX_FDEQ_GAIN_20 +60 0x4848 //RX_FDEQ_GAIN_21 +61 0x4848 //RX_FDEQ_GAIN_22 +62 0x4848 //RX_FDEQ_GAIN_23 +63 0x0202 //RX_FDEQ_BIN_0 +64 0x0202 //RX_FDEQ_BIN_1 +65 0x0301 //RX_FDEQ_BIN_2 +66 0x0404 //RX_FDEQ_BIN_3 +67 0x0406 //RX_FDEQ_BIN_4 +68 0x0109 //RX_FDEQ_BIN_5 +69 0x0708 //RX_FDEQ_BIN_6 +70 0x090A //RX_FDEQ_BIN_7 +71 0x0B0C //RX_FDEQ_BIN_8 +72 0x0D09 //RX_FDEQ_BIN_9 +73 0x0819 //RX_FDEQ_BIN_10 +74 0x1E19 //RX_FDEQ_BIN_11 +75 0x1B0F //RX_FDEQ_BIN_12 +76 0x141E //RX_FDEQ_BIN_13 +77 0x3728 //RX_FDEQ_BIN_14 +78 0x282C //RX_FDEQ_BIN_15 +79 0x0000 //RX_FDEQ_BIN_16 +80 0x0000 //RX_FDEQ_BIN_17 +81 0x0000 //RX_FDEQ_BIN_18 +82 0x0000 //RX_FDEQ_BIN_19 +83 0x0000 //RX_FDEQ_BIN_20 +84 0x0000 //RX_FDEQ_BIN_21 +85 0x0000 //RX_FDEQ_BIN_22 +86 0x0000 //RX_FDEQ_BIN_23 +87 0x4000 //RX_FDEQ_RESRV_0 +88 0x0320 //RX_FDEQ_RESRV_1 +89 0x0018 //RX_FDDRC_BAND_MARGIN_0 +90 0x0030 //RX_FDDRC_BAND_MARGIN_1 +91 0x0050 //RX_FDDRC_BAND_MARGIN_2 +92 0x0080 //RX_FDDRC_BAND_MARGIN_3 +93 0x0007 //RX_FDDRC_BLOCK_EXP +94 0x5000 //RX_FDDRC_THRD_2_0 +95 0x5000 //RX_FDDRC_THRD_2_1 +96 0x5000 //RX_FDDRC_THRD_2_2 +97 0x5000 //RX_FDDRC_THRD_2_3 +98 0x6400 //RX_FDDRC_THRD_3_0 +99 0x6400 //RX_FDDRC_THRD_3_1 +100 0x6400 //RX_FDDRC_THRD_3_2 +101 0x6400 //RX_FDDRC_THRD_3_3 +102 0x2000 //RX_FDDRC_SLANT_0_0 +103 0x2000 //RX_FDDRC_SLANT_0_1 +104 0x2000 //RX_FDDRC_SLANT_0_2 +105 0x2000 //RX_FDDRC_SLANT_0_3 +106 0x5333 //RX_FDDRC_SLANT_1_0 +107 0x5333 //RX_FDDRC_SLANT_1_1 +108 0x5333 //RX_FDDRC_SLANT_1_2 +109 0x5333 //RX_FDDRC_SLANT_1_3 +110 0x0000 //RX_FDDRC_RESRV_0 +129 0x0076 //RX_SPK_VOL +130 0x0000 //RX_VOL_RESRV_0 +#VOL 6 +6 0x1000 //RX_TDDRC_ALPHA_UP_1 +7 0x1000 //RX_TDDRC_ALPHA_UP_2 +8 0x1000 //RX_TDDRC_ALPHA_UP_3 +9 0x1000 //RX_TDDRC_ALPHA_UP_4 +27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +33 0x7000 //RX_TDDRC_LIMITER_THRD +34 0x0800 //RX_TDDRC_LIMITER_GAIN +112 0x0001 //RX_TDDRC_THRD_0 +113 0x0002 //RX_TDDRC_THRD_1 +114 0x1800 //RX_TDDRC_THRD_2 +115 0x1800 //RX_TDDRC_THRD_3 +116 0x7FFF //RX_TDDRC_SLANT_0 +117 0x7FFF //RX_TDDRC_SLANT_1 +118 0x1000 //RX_TDDRC_ALPHA_UP_0 +119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +120 0x0000 //RX_TDDRC_HMNC_FLAG +121 0x199A //RX_TDDRC_HMNC_GAIN +122 0x0001 //RX_TDDRC_SMT_FLAG +123 0x0CCD //RX_TDDRC_SMT_W +124 0x056F //RX_TDDRC_DRC_GAIN +38 0x0020 //RX_FDEQ_SUBNUM +39 0x483E //RX_FDEQ_GAIN_0 +40 0x3E3E //RX_FDEQ_GAIN_1 +41 0x3E4C //RX_FDEQ_GAIN_2 +42 0x586E //RX_FDEQ_GAIN_3 +43 0x8496 //RX_FDEQ_GAIN_4 +44 0x968E //RX_FDEQ_GAIN_5 +45 0x8488 //RX_FDEQ_GAIN_6 +46 0x8884 //RX_FDEQ_GAIN_7 +47 0x9CA4 //RX_FDEQ_GAIN_8 +48 0x98A8 //RX_FDEQ_GAIN_9 +49 0xBEB8 //RX_FDEQ_GAIN_10 +50 0x918D //RX_FDEQ_GAIN_11 +51 0x7566 //RX_FDEQ_GAIN_12 +52 0x6460 //RX_FDEQ_GAIN_13 +53 0x6174 //RX_FDEQ_GAIN_14 +54 0x7890 //RX_FDEQ_GAIN_15 +55 0x4848 //RX_FDEQ_GAIN_16 +56 0x4848 //RX_FDEQ_GAIN_17 +57 0x4848 //RX_FDEQ_GAIN_18 +58 0x4848 //RX_FDEQ_GAIN_19 +59 0x4848 //RX_FDEQ_GAIN_20 +60 0x4848 //RX_FDEQ_GAIN_21 +61 0x4848 //RX_FDEQ_GAIN_22 +62 0x4848 //RX_FDEQ_GAIN_23 +63 0x0202 //RX_FDEQ_BIN_0 +64 0x0202 //RX_FDEQ_BIN_1 +65 0x0301 //RX_FDEQ_BIN_2 +66 0x0404 //RX_FDEQ_BIN_3 +67 0x0406 //RX_FDEQ_BIN_4 +68 0x0109 //RX_FDEQ_BIN_5 +69 0x0708 //RX_FDEQ_BIN_6 +70 0x090A //RX_FDEQ_BIN_7 +71 0x0B0C //RX_FDEQ_BIN_8 +72 0x0D09 //RX_FDEQ_BIN_9 +73 0x0819 //RX_FDEQ_BIN_10 +74 0x1E19 //RX_FDEQ_BIN_11 +75 0x1B0F //RX_FDEQ_BIN_12 +76 0x141E //RX_FDEQ_BIN_13 +77 0x3728 //RX_FDEQ_BIN_14 +78 0x282C //RX_FDEQ_BIN_15 +79 0x0000 //RX_FDEQ_BIN_16 +80 0x0000 //RX_FDEQ_BIN_17 +81 0x0000 //RX_FDEQ_BIN_18 +82 0x0000 //RX_FDEQ_BIN_19 +83 0x0000 //RX_FDEQ_BIN_20 +84 0x0000 //RX_FDEQ_BIN_21 +85 0x0000 //RX_FDEQ_BIN_22 +86 0x0000 //RX_FDEQ_BIN_23 +87 0x4000 //RX_FDEQ_RESRV_0 +88 0x0320 //RX_FDEQ_RESRV_1 +89 0x0018 //RX_FDDRC_BAND_MARGIN_0 +90 0x0030 //RX_FDDRC_BAND_MARGIN_1 +91 0x0050 //RX_FDDRC_BAND_MARGIN_2 +92 0x0080 //RX_FDDRC_BAND_MARGIN_3 +93 0x0007 //RX_FDDRC_BLOCK_EXP +94 0x5000 //RX_FDDRC_THRD_2_0 +95 0x5000 //RX_FDDRC_THRD_2_1 +96 0x5000 //RX_FDDRC_THRD_2_2 +97 0x5000 //RX_FDDRC_THRD_2_3 +98 0x6400 //RX_FDDRC_THRD_3_0 +99 0x6400 //RX_FDDRC_THRD_3_1 +100 0x6400 //RX_FDDRC_THRD_3_2 +101 0x6400 //RX_FDDRC_THRD_3_3 +102 0x2000 //RX_FDDRC_SLANT_0_0 +103 0x2000 //RX_FDDRC_SLANT_0_1 +104 0x2000 //RX_FDDRC_SLANT_0_2 +105 0x2000 //RX_FDDRC_SLANT_0_3 +106 0x5333 //RX_FDDRC_SLANT_1_0 +107 0x5333 //RX_FDDRC_SLANT_1_1 +108 0x5333 //RX_FDDRC_SLANT_1_2 +109 0x5333 //RX_FDDRC_SLANT_1_3 +110 0x0000 //RX_FDDRC_RESRV_0 +129 0x0100 //RX_SPK_VOL +130 0x0000 //RX_VOL_RESRV_0 +#RX 2 +157 0x003C //RX_RECVFUNC_MODE_0 +158 0x0000 //RX_RECVFUNC_MODE_1 +159 0x0003 //RX_SAMPLINGFREQ_SIG +160 0x0003 //RX_SAMPLINGFREQ_PROC +161 0x000A //RX_FRAME_SZ +162 0x0000 //RX_DELAY_OPT +163 0x1000 //RX_TDDRC_ALPHA_UP_1 +164 0x1000 //RX_TDDRC_ALPHA_UP_2 +165 0x1000 //RX_TDDRC_ALPHA_UP_3 +166 0x1000 //RX_TDDRC_ALPHA_UP_4 +167 0x05AA //RX_PGA +168 0x7FFF //RX_A_HP +169 0x4000 //RX_B_PE +170 0x5800 //RX_THR_PITCH_DET_0 +171 0x5000 //RX_THR_PITCH_DET_1 +172 0x4000 //RX_THR_PITCH_DET_2 +173 0x0008 //RX_PITCH_BFR_LEN +174 0x0003 //RX_SBD_PITCH_DET +175 0x0100 //RX_PP_RESRV_0 +176 0x0020 //RX_PP_RESRV_1 +177 0x0600 //RX_N_SN_EST +178 0x000C //RX_N2_SN_EST +179 0x000F //RX_NS_LVL_CTRL +180 0xF800 //RX_THR_SN_EST +181 0x7E00 //RX_LAMBDA_PFILT +182 0x000A //RX_FENS_RESRV_0 +183 0x0190 //RX_FENS_RESRV_1 +184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +187 0x0002 //RX_EXTRA_NS_L +188 0x0800 //RX_EXTRA_NS_A +189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +190 0x7000 //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +192 0x199A //RX_A_POST_FLT +193 0x0000 //RX_LMT_THRD +194 0x4000 //RX_LMT_ALPHA +195 0x0020 //RX_FDEQ_SUBNUM +196 0x483E //RX_FDEQ_GAIN_0 +197 0x3E3E //RX_FDEQ_GAIN_1 +198 0x3E4C //RX_FDEQ_GAIN_2 +199 0x5064 //RX_FDEQ_GAIN_3 +200 0x7076 //RX_FDEQ_GAIN_4 +201 0x897A //RX_FDEQ_GAIN_5 +202 0x7C80 //RX_FDEQ_GAIN_6 +203 0x8888 //RX_FDEQ_GAIN_7 +204 0x949C //RX_FDEQ_GAIN_8 +205 0x96A4 //RX_FDEQ_GAIN_9 +206 0xA9A0 //RX_FDEQ_GAIN_10 +207 0x9487 //RX_FDEQ_GAIN_11 +208 0x6F64 //RX_FDEQ_GAIN_12 +209 0x625A //RX_FDEQ_GAIN_13 +210 0x5D80 //RX_FDEQ_GAIN_14 +211 0x8890 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0202 //RX_FDEQ_BIN_0 +221 0x0202 //RX_FDEQ_BIN_1 +222 0x0301 //RX_FDEQ_BIN_2 +223 0x0404 //RX_FDEQ_BIN_3 +224 0x0406 //RX_FDEQ_BIN_4 +225 0x0109 //RX_FDEQ_BIN_5 +226 0x0708 //RX_FDEQ_BIN_6 +227 0x090A //RX_FDEQ_BIN_7 +228 0x0B0C //RX_FDEQ_BIN_8 +229 0x0D0E //RX_FDEQ_BIN_9 +230 0x1013 //RX_FDEQ_BIN_10 +231 0x1719 //RX_FDEQ_BIN_11 +232 0x1B0F //RX_FDEQ_BIN_12 +233 0x141E //RX_FDEQ_BIN_13 +234 0x3728 //RX_FDEQ_BIN_14 +235 0x282C //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x4000 //RX_FDEQ_RESRV_0 +245 0x0320 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0030 //RX_FDDRC_BAND_MARGIN_1 +248 0x0050 //RX_FDDRC_BAND_MARGIN_2 +249 0x0080 //RX_FDDRC_BAND_MARGIN_3 +250 0x0007 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x5000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x6400 //RX_FDDRC_THRD_3_2 +258 0x6400 //RX_FDDRC_THRD_3_3 +259 0x2000 //RX_FDDRC_SLANT_0_0 +260 0x2000 //RX_FDDRC_SLANT_0_1 +261 0x2000 //RX_FDDRC_SLANT_0_2 +262 0x2000 //RX_FDDRC_SLANT_0_3 +263 0x5333 //RX_FDDRC_SLANT_1_0 +264 0x5333 //RX_FDDRC_SLANT_1_1 +265 0x5333 //RX_FDDRC_SLANT_1_2 +266 0x5333 //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +268 0x0002 //RX_FILTINDX +269 0x0001 //RX_TDDRC_THRD_0 +270 0x0002 //RX_TDDRC_THRD_1 +271 0x1800 //RX_TDDRC_THRD_2 +272 0x1800 //RX_TDDRC_THRD_3 +273 0x7FFF //RX_TDDRC_SLANT_0 +274 0x7FFF //RX_TDDRC_SLANT_1 +275 0x1000 //RX_TDDRC_ALPHA_UP_0 +276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x199A //RX_TDDRC_HMNC_GAIN +279 0x0001 //RX_TDDRC_SMT_FLAG +280 0x0CCD //RX_TDDRC_SMT_W +281 0x0551 //RX_TDDRC_DRC_GAIN +282 0x7C00 //RX_LAMBDA_PKA_FP +283 0x13E0 //RX_TPKA_FP +284 0x0080 //RX_MIN_G_FP +285 0x2000 //RX_MAX_G_FP +286 0x0100 //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 +288 0x0000 //RX_MAXLEVEL_CNG +289 0x3000 //RX_BWE_UV_TH +290 0x3000 //RX_BWE_UV_TH2 +291 0x1800 //RX_BWE_UV_TH3 +292 0x1000 //RX_BWE_V_TH +293 0x04CD //RX_BWE_GAIN1_V_TH1 +294 0x0F33 //RX_BWE_GAIN1_V_TH2 +295 0x7333 //RX_BWE_UV_EQ +296 0x199A //RX_BWE_V_EQ +297 0x7333 //RX_BWE_TONE_TH +298 0x0004 //RX_BWE_UV_HOLD_T +299 0x6CCD //RX_BWE_GAIN2_ALPHA +300 0x799A //RX_BWE_GAIN3_ALPHA +301 0x001E //RX_BWE_CUTOFF +302 0x3000 //RX_BWE_GAINFILL +303 0x3200 //RX_BWE_MAXTH_TONE +304 0x2000 //RX_BWE_EQ_0 +305 0x2000 //RX_BWE_EQ_1 +306 0x2000 //RX_BWE_EQ_2 +307 0x2000 //RX_BWE_EQ_3 +308 0x2000 //RX_BWE_EQ_4 +309 0x2000 //RX_BWE_EQ_5 +310 0x2000 //RX_BWE_EQ_6 +311 0x0000 //RX_BWE_RESRV_0 +312 0x0000 //RX_BWE_RESRV_1 +313 0x0000 //RX_BWE_RESRV_2 +#VOL 0 +163 0x1000 //RX_TDDRC_ALPHA_UP_1 +164 0x1000 //RX_TDDRC_ALPHA_UP_2 +165 0x1000 //RX_TDDRC_ALPHA_UP_3 +166 0x1000 //RX_TDDRC_ALPHA_UP_4 +184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +190 0x7000 //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +269 0x0001 //RX_TDDRC_THRD_0 +270 0x0002 //RX_TDDRC_THRD_1 +271 0x1800 //RX_TDDRC_THRD_2 +272 0x1800 //RX_TDDRC_THRD_3 +273 0x7FFF //RX_TDDRC_SLANT_0 +274 0x7FFF //RX_TDDRC_SLANT_1 +275 0x1000 //RX_TDDRC_ALPHA_UP_0 +276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x199A //RX_TDDRC_HMNC_GAIN +279 0x0001 //RX_TDDRC_SMT_FLAG +280 0x0CCD //RX_TDDRC_SMT_W +281 0x0551 //RX_TDDRC_DRC_GAIN +195 0x0020 //RX_FDEQ_SUBNUM +196 0x483E //RX_FDEQ_GAIN_0 +197 0x3E3E //RX_FDEQ_GAIN_1 +198 0x3E4C //RX_FDEQ_GAIN_2 +199 0x5064 //RX_FDEQ_GAIN_3 +200 0x7076 //RX_FDEQ_GAIN_4 +201 0x897A //RX_FDEQ_GAIN_5 +202 0x7C80 //RX_FDEQ_GAIN_6 +203 0x8888 //RX_FDEQ_GAIN_7 +204 0x949C //RX_FDEQ_GAIN_8 +205 0x96A4 //RX_FDEQ_GAIN_9 +206 0xA9A0 //RX_FDEQ_GAIN_10 +207 0x9487 //RX_FDEQ_GAIN_11 +208 0x6F64 //RX_FDEQ_GAIN_12 +209 0x625A //RX_FDEQ_GAIN_13 +210 0x5D80 //RX_FDEQ_GAIN_14 +211 0x8890 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0202 //RX_FDEQ_BIN_0 +221 0x0202 //RX_FDEQ_BIN_1 +222 0x0301 //RX_FDEQ_BIN_2 +223 0x0404 //RX_FDEQ_BIN_3 +224 0x0406 //RX_FDEQ_BIN_4 +225 0x0109 //RX_FDEQ_BIN_5 +226 0x0708 //RX_FDEQ_BIN_6 +227 0x090A //RX_FDEQ_BIN_7 +228 0x0B0C //RX_FDEQ_BIN_8 +229 0x0D0E //RX_FDEQ_BIN_9 +230 0x1013 //RX_FDEQ_BIN_10 +231 0x1719 //RX_FDEQ_BIN_11 +232 0x1B0F //RX_FDEQ_BIN_12 +233 0x141E //RX_FDEQ_BIN_13 +234 0x3728 //RX_FDEQ_BIN_14 +235 0x282C //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x4000 //RX_FDEQ_RESRV_0 +245 0x0320 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0030 //RX_FDDRC_BAND_MARGIN_1 +248 0x0050 //RX_FDDRC_BAND_MARGIN_2 +249 0x0080 //RX_FDDRC_BAND_MARGIN_3 +250 0x0007 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x5000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x6400 //RX_FDDRC_THRD_3_2 +258 0x6400 //RX_FDDRC_THRD_3_3 +259 0x2000 //RX_FDDRC_SLANT_0_0 +260 0x2000 //RX_FDDRC_SLANT_0_1 +261 0x2000 //RX_FDDRC_SLANT_0_2 +262 0x2000 //RX_FDDRC_SLANT_0_3 +263 0x5333 //RX_FDDRC_SLANT_1_0 +264 0x5333 //RX_FDDRC_SLANT_1_1 +265 0x5333 //RX_FDDRC_SLANT_1_2 +266 0x5333 //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +286 0x000A //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 +#VOL 1 +163 0x1000 //RX_TDDRC_ALPHA_UP_1 +164 0x1000 //RX_TDDRC_ALPHA_UP_2 +165 0x1000 //RX_TDDRC_ALPHA_UP_3 +166 0x1000 //RX_TDDRC_ALPHA_UP_4 +184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +190 0x7000 //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +269 0x0001 //RX_TDDRC_THRD_0 +270 0x0002 //RX_TDDRC_THRD_1 +271 0x1800 //RX_TDDRC_THRD_2 +272 0x1800 //RX_TDDRC_THRD_3 +273 0x7FFF //RX_TDDRC_SLANT_0 +274 0x7FFF //RX_TDDRC_SLANT_1 +275 0x1000 //RX_TDDRC_ALPHA_UP_0 +276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x199A //RX_TDDRC_HMNC_GAIN +279 0x0001 //RX_TDDRC_SMT_FLAG +280 0x0CCD //RX_TDDRC_SMT_W +281 0x0551 //RX_TDDRC_DRC_GAIN +195 0x0020 //RX_FDEQ_SUBNUM +196 0x483E //RX_FDEQ_GAIN_0 +197 0x3E3E //RX_FDEQ_GAIN_1 +198 0x3E4C //RX_FDEQ_GAIN_2 +199 0x5064 //RX_FDEQ_GAIN_3 +200 0x7076 //RX_FDEQ_GAIN_4 +201 0x897A //RX_FDEQ_GAIN_5 +202 0x7C80 //RX_FDEQ_GAIN_6 +203 0x8888 //RX_FDEQ_GAIN_7 +204 0x949C //RX_FDEQ_GAIN_8 +205 0x96A4 //RX_FDEQ_GAIN_9 +206 0xA9A0 //RX_FDEQ_GAIN_10 +207 0x9487 //RX_FDEQ_GAIN_11 +208 0x6F64 //RX_FDEQ_GAIN_12 +209 0x625A //RX_FDEQ_GAIN_13 +210 0x5D80 //RX_FDEQ_GAIN_14 +211 0x8890 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0202 //RX_FDEQ_BIN_0 +221 0x0202 //RX_FDEQ_BIN_1 +222 0x0301 //RX_FDEQ_BIN_2 +223 0x0404 //RX_FDEQ_BIN_3 +224 0x0406 //RX_FDEQ_BIN_4 +225 0x0109 //RX_FDEQ_BIN_5 +226 0x0708 //RX_FDEQ_BIN_6 +227 0x090A //RX_FDEQ_BIN_7 +228 0x0B0C //RX_FDEQ_BIN_8 +229 0x0D0E //RX_FDEQ_BIN_9 +230 0x1013 //RX_FDEQ_BIN_10 +231 0x1719 //RX_FDEQ_BIN_11 +232 0x1B0F //RX_FDEQ_BIN_12 +233 0x141E //RX_FDEQ_BIN_13 +234 0x3728 //RX_FDEQ_BIN_14 +235 0x282C //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x4000 //RX_FDEQ_RESRV_0 +245 0x0320 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0030 //RX_FDDRC_BAND_MARGIN_1 +248 0x0050 //RX_FDDRC_BAND_MARGIN_2 +249 0x0080 //RX_FDDRC_BAND_MARGIN_3 +250 0x0007 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x5000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x6400 //RX_FDDRC_THRD_3_2 +258 0x6400 //RX_FDDRC_THRD_3_3 +259 0x2000 //RX_FDDRC_SLANT_0_0 +260 0x2000 //RX_FDDRC_SLANT_0_1 +261 0x2000 //RX_FDDRC_SLANT_0_2 +262 0x2000 //RX_FDDRC_SLANT_0_3 +263 0x5333 //RX_FDDRC_SLANT_1_0 +264 0x5333 //RX_FDDRC_SLANT_1_1 +265 0x5333 //RX_FDDRC_SLANT_1_2 +266 0x5333 //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +286 0x0010 //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 +#VOL 2 +163 0x1000 //RX_TDDRC_ALPHA_UP_1 +164 0x1000 //RX_TDDRC_ALPHA_UP_2 +165 0x1000 //RX_TDDRC_ALPHA_UP_3 +166 0x1000 //RX_TDDRC_ALPHA_UP_4 +184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +190 0x7000 //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +269 0x0001 //RX_TDDRC_THRD_0 +270 0x0002 //RX_TDDRC_THRD_1 +271 0x1800 //RX_TDDRC_THRD_2 +272 0x1800 //RX_TDDRC_THRD_3 +273 0x7FFF //RX_TDDRC_SLANT_0 +274 0x7FFF //RX_TDDRC_SLANT_1 +275 0x1000 //RX_TDDRC_ALPHA_UP_0 +276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x199A //RX_TDDRC_HMNC_GAIN +279 0x0001 //RX_TDDRC_SMT_FLAG +280 0x0CCD //RX_TDDRC_SMT_W +281 0x0551 //RX_TDDRC_DRC_GAIN +195 0x0020 //RX_FDEQ_SUBNUM +196 0x483E //RX_FDEQ_GAIN_0 +197 0x3E3E //RX_FDEQ_GAIN_1 +198 0x3E4C //RX_FDEQ_GAIN_2 +199 0x5064 //RX_FDEQ_GAIN_3 +200 0x7076 //RX_FDEQ_GAIN_4 +201 0x897A //RX_FDEQ_GAIN_5 +202 0x7C80 //RX_FDEQ_GAIN_6 +203 0x8888 //RX_FDEQ_GAIN_7 +204 0x949C //RX_FDEQ_GAIN_8 +205 0x96A4 //RX_FDEQ_GAIN_9 +206 0xA9A0 //RX_FDEQ_GAIN_10 +207 0x9487 //RX_FDEQ_GAIN_11 +208 0x6F64 //RX_FDEQ_GAIN_12 +209 0x625A //RX_FDEQ_GAIN_13 +210 0x5D80 //RX_FDEQ_GAIN_14 +211 0x8890 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0202 //RX_FDEQ_BIN_0 +221 0x0202 //RX_FDEQ_BIN_1 +222 0x0301 //RX_FDEQ_BIN_2 +223 0x0404 //RX_FDEQ_BIN_3 +224 0x0406 //RX_FDEQ_BIN_4 +225 0x0109 //RX_FDEQ_BIN_5 +226 0x0708 //RX_FDEQ_BIN_6 +227 0x090A //RX_FDEQ_BIN_7 +228 0x0B0C //RX_FDEQ_BIN_8 +229 0x0D0E //RX_FDEQ_BIN_9 +230 0x1013 //RX_FDEQ_BIN_10 +231 0x1719 //RX_FDEQ_BIN_11 +232 0x1B0F //RX_FDEQ_BIN_12 +233 0x141E //RX_FDEQ_BIN_13 +234 0x3728 //RX_FDEQ_BIN_14 +235 0x282C //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x4000 //RX_FDEQ_RESRV_0 +245 0x0320 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0030 //RX_FDDRC_BAND_MARGIN_1 +248 0x0050 //RX_FDDRC_BAND_MARGIN_2 +249 0x0080 //RX_FDDRC_BAND_MARGIN_3 +250 0x0007 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x5000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x6400 //RX_FDDRC_THRD_3_2 +258 0x6400 //RX_FDDRC_THRD_3_3 +259 0x2000 //RX_FDDRC_SLANT_0_0 +260 0x2000 //RX_FDDRC_SLANT_0_1 +261 0x2000 //RX_FDDRC_SLANT_0_2 +262 0x2000 //RX_FDDRC_SLANT_0_3 +263 0x5333 //RX_FDDRC_SLANT_1_0 +264 0x5333 //RX_FDDRC_SLANT_1_1 +265 0x5333 //RX_FDDRC_SLANT_1_2 +266 0x5333 //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +286 0x001B //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 +#VOL 3 +163 0x1000 //RX_TDDRC_ALPHA_UP_1 +164 0x1000 //RX_TDDRC_ALPHA_UP_2 +165 0x1000 //RX_TDDRC_ALPHA_UP_3 +166 0x1000 //RX_TDDRC_ALPHA_UP_4 +184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +190 0x7000 //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +269 0x0001 //RX_TDDRC_THRD_0 +270 0x0002 //RX_TDDRC_THRD_1 +271 0x1800 //RX_TDDRC_THRD_2 +272 0x1800 //RX_TDDRC_THRD_3 +273 0x7FFF //RX_TDDRC_SLANT_0 +274 0x7FFF //RX_TDDRC_SLANT_1 +275 0x1000 //RX_TDDRC_ALPHA_UP_0 +276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x199A //RX_TDDRC_HMNC_GAIN +279 0x0001 //RX_TDDRC_SMT_FLAG +280 0x0CCD //RX_TDDRC_SMT_W +281 0x0551 //RX_TDDRC_DRC_GAIN +195 0x0020 //RX_FDEQ_SUBNUM +196 0x483E //RX_FDEQ_GAIN_0 +197 0x3E3E //RX_FDEQ_GAIN_1 +198 0x3E4C //RX_FDEQ_GAIN_2 +199 0x5064 //RX_FDEQ_GAIN_3 +200 0x7076 //RX_FDEQ_GAIN_4 +201 0x897A //RX_FDEQ_GAIN_5 +202 0x7C80 //RX_FDEQ_GAIN_6 +203 0x8888 //RX_FDEQ_GAIN_7 +204 0x949C //RX_FDEQ_GAIN_8 +205 0x96A4 //RX_FDEQ_GAIN_9 +206 0xA9A0 //RX_FDEQ_GAIN_10 +207 0x9487 //RX_FDEQ_GAIN_11 +208 0x6F64 //RX_FDEQ_GAIN_12 +209 0x625A //RX_FDEQ_GAIN_13 +210 0x5D80 //RX_FDEQ_GAIN_14 +211 0x8890 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0202 //RX_FDEQ_BIN_0 +221 0x0202 //RX_FDEQ_BIN_1 +222 0x0301 //RX_FDEQ_BIN_2 +223 0x0404 //RX_FDEQ_BIN_3 +224 0x0406 //RX_FDEQ_BIN_4 +225 0x0109 //RX_FDEQ_BIN_5 +226 0x0708 //RX_FDEQ_BIN_6 +227 0x090A //RX_FDEQ_BIN_7 +228 0x0B0C //RX_FDEQ_BIN_8 +229 0x0D0E //RX_FDEQ_BIN_9 +230 0x1013 //RX_FDEQ_BIN_10 +231 0x1719 //RX_FDEQ_BIN_11 +232 0x1B0F //RX_FDEQ_BIN_12 +233 0x141E //RX_FDEQ_BIN_13 +234 0x3728 //RX_FDEQ_BIN_14 +235 0x282C //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x4000 //RX_FDEQ_RESRV_0 +245 0x0320 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0030 //RX_FDDRC_BAND_MARGIN_1 +248 0x0050 //RX_FDDRC_BAND_MARGIN_2 +249 0x0080 //RX_FDDRC_BAND_MARGIN_3 +250 0x0007 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x5000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x6400 //RX_FDDRC_THRD_3_2 +258 0x6400 //RX_FDDRC_THRD_3_3 +259 0x2000 //RX_FDDRC_SLANT_0_0 +260 0x2000 //RX_FDDRC_SLANT_0_1 +261 0x2000 //RX_FDDRC_SLANT_0_2 +262 0x2000 //RX_FDDRC_SLANT_0_3 +263 0x5333 //RX_FDDRC_SLANT_1_0 +264 0x5333 //RX_FDDRC_SLANT_1_1 +265 0x5333 //RX_FDDRC_SLANT_1_2 +266 0x5333 //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +286 0x0032 //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 +#VOL 4 +163 0x1000 //RX_TDDRC_ALPHA_UP_1 +164 0x1000 //RX_TDDRC_ALPHA_UP_2 +165 0x1000 //RX_TDDRC_ALPHA_UP_3 +166 0x1000 //RX_TDDRC_ALPHA_UP_4 +184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +190 0x7000 //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +269 0x0001 //RX_TDDRC_THRD_0 +270 0x0002 //RX_TDDRC_THRD_1 +271 0x1800 //RX_TDDRC_THRD_2 +272 0x1800 //RX_TDDRC_THRD_3 +273 0x7FFF //RX_TDDRC_SLANT_0 +274 0x7FFF //RX_TDDRC_SLANT_1 +275 0x1000 //RX_TDDRC_ALPHA_UP_0 +276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x199A //RX_TDDRC_HMNC_GAIN +279 0x0001 //RX_TDDRC_SMT_FLAG +280 0x0CCD //RX_TDDRC_SMT_W +281 0x0551 //RX_TDDRC_DRC_GAIN +195 0x0020 //RX_FDEQ_SUBNUM +196 0x483E //RX_FDEQ_GAIN_0 +197 0x3E3E //RX_FDEQ_GAIN_1 +198 0x3E4C //RX_FDEQ_GAIN_2 +199 0x5064 //RX_FDEQ_GAIN_3 +200 0x7076 //RX_FDEQ_GAIN_4 +201 0x897A //RX_FDEQ_GAIN_5 +202 0x7C80 //RX_FDEQ_GAIN_6 +203 0x8888 //RX_FDEQ_GAIN_7 +204 0x949C //RX_FDEQ_GAIN_8 +205 0x96A4 //RX_FDEQ_GAIN_9 +206 0xA9A0 //RX_FDEQ_GAIN_10 +207 0x9487 //RX_FDEQ_GAIN_11 +208 0x6F64 //RX_FDEQ_GAIN_12 +209 0x625A //RX_FDEQ_GAIN_13 +210 0x5D80 //RX_FDEQ_GAIN_14 +211 0x8890 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0202 //RX_FDEQ_BIN_0 +221 0x0202 //RX_FDEQ_BIN_1 +222 0x0301 //RX_FDEQ_BIN_2 +223 0x0404 //RX_FDEQ_BIN_3 +224 0x0406 //RX_FDEQ_BIN_4 +225 0x0109 //RX_FDEQ_BIN_5 +226 0x0708 //RX_FDEQ_BIN_6 +227 0x090A //RX_FDEQ_BIN_7 +228 0x0B0C //RX_FDEQ_BIN_8 +229 0x0D0E //RX_FDEQ_BIN_9 +230 0x1013 //RX_FDEQ_BIN_10 +231 0x1719 //RX_FDEQ_BIN_11 +232 0x1B0F //RX_FDEQ_BIN_12 +233 0x141E //RX_FDEQ_BIN_13 +234 0x3728 //RX_FDEQ_BIN_14 +235 0x282C //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x4000 //RX_FDEQ_RESRV_0 +245 0x0320 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0030 //RX_FDDRC_BAND_MARGIN_1 +248 0x0050 //RX_FDDRC_BAND_MARGIN_2 +249 0x0080 //RX_FDDRC_BAND_MARGIN_3 +250 0x0007 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x5000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x6400 //RX_FDDRC_THRD_3_2 +258 0x6400 //RX_FDDRC_THRD_3_3 +259 0x2000 //RX_FDDRC_SLANT_0_0 +260 0x2000 //RX_FDDRC_SLANT_0_1 +261 0x2000 //RX_FDDRC_SLANT_0_2 +262 0x2000 //RX_FDDRC_SLANT_0_3 +263 0x5333 //RX_FDDRC_SLANT_1_0 +264 0x5333 //RX_FDDRC_SLANT_1_1 +265 0x5333 //RX_FDDRC_SLANT_1_2 +266 0x5333 //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +286 0x0047 //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 +#VOL 5 +163 0x1000 //RX_TDDRC_ALPHA_UP_1 +164 0x1000 //RX_TDDRC_ALPHA_UP_2 +165 0x1000 //RX_TDDRC_ALPHA_UP_3 +166 0x1000 //RX_TDDRC_ALPHA_UP_4 +184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +190 0x7000 //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +269 0x0001 //RX_TDDRC_THRD_0 +270 0x0002 //RX_TDDRC_THRD_1 +271 0x1800 //RX_TDDRC_THRD_2 +272 0x1800 //RX_TDDRC_THRD_3 +273 0x7FFF //RX_TDDRC_SLANT_0 +274 0x7FFF //RX_TDDRC_SLANT_1 +275 0x1000 //RX_TDDRC_ALPHA_UP_0 +276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x199A //RX_TDDRC_HMNC_GAIN +279 0x0001 //RX_TDDRC_SMT_FLAG +280 0x0CCD //RX_TDDRC_SMT_W +281 0x0551 //RX_TDDRC_DRC_GAIN +195 0x0020 //RX_FDEQ_SUBNUM +196 0x483E //RX_FDEQ_GAIN_0 +197 0x3E3E //RX_FDEQ_GAIN_1 +198 0x3E4C //RX_FDEQ_GAIN_2 +199 0x5064 //RX_FDEQ_GAIN_3 +200 0x7076 //RX_FDEQ_GAIN_4 +201 0x897A //RX_FDEQ_GAIN_5 +202 0x7C80 //RX_FDEQ_GAIN_6 +203 0x8888 //RX_FDEQ_GAIN_7 +204 0x949C //RX_FDEQ_GAIN_8 +205 0x96A4 //RX_FDEQ_GAIN_9 +206 0xA9A0 //RX_FDEQ_GAIN_10 +207 0x9487 //RX_FDEQ_GAIN_11 +208 0x6F64 //RX_FDEQ_GAIN_12 +209 0x625A //RX_FDEQ_GAIN_13 +210 0x5D80 //RX_FDEQ_GAIN_14 +211 0x8890 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0202 //RX_FDEQ_BIN_0 +221 0x0202 //RX_FDEQ_BIN_1 +222 0x0301 //RX_FDEQ_BIN_2 +223 0x0404 //RX_FDEQ_BIN_3 +224 0x0406 //RX_FDEQ_BIN_4 +225 0x0109 //RX_FDEQ_BIN_5 +226 0x0708 //RX_FDEQ_BIN_6 +227 0x090A //RX_FDEQ_BIN_7 +228 0x0B0C //RX_FDEQ_BIN_8 +229 0x0D0E //RX_FDEQ_BIN_9 +230 0x1013 //RX_FDEQ_BIN_10 +231 0x1719 //RX_FDEQ_BIN_11 +232 0x1B0F //RX_FDEQ_BIN_12 +233 0x141E //RX_FDEQ_BIN_13 +234 0x3728 //RX_FDEQ_BIN_14 +235 0x282C //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x4000 //RX_FDEQ_RESRV_0 +245 0x0320 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0030 //RX_FDDRC_BAND_MARGIN_1 +248 0x0050 //RX_FDDRC_BAND_MARGIN_2 +249 0x0080 //RX_FDDRC_BAND_MARGIN_3 +250 0x0007 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x5000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x6400 //RX_FDDRC_THRD_3_2 +258 0x6400 //RX_FDDRC_THRD_3_3 +259 0x2000 //RX_FDDRC_SLANT_0_0 +260 0x2000 //RX_FDDRC_SLANT_0_1 +261 0x2000 //RX_FDDRC_SLANT_0_2 +262 0x2000 //RX_FDDRC_SLANT_0_3 +263 0x5333 //RX_FDDRC_SLANT_1_0 +264 0x5333 //RX_FDDRC_SLANT_1_1 +265 0x5333 //RX_FDDRC_SLANT_1_2 +266 0x5333 //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +286 0x0076 //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 +#VOL 6 +163 0x1000 //RX_TDDRC_ALPHA_UP_1 +164 0x1000 //RX_TDDRC_ALPHA_UP_2 +165 0x1000 //RX_TDDRC_ALPHA_UP_3 +166 0x1000 //RX_TDDRC_ALPHA_UP_4 +184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +190 0x7000 //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +269 0x0001 //RX_TDDRC_THRD_0 +270 0x0002 //RX_TDDRC_THRD_1 +271 0x1800 //RX_TDDRC_THRD_2 +272 0x1800 //RX_TDDRC_THRD_3 +273 0x7FFF //RX_TDDRC_SLANT_0 +274 0x7FFF //RX_TDDRC_SLANT_1 +275 0x1000 //RX_TDDRC_ALPHA_UP_0 +276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x199A //RX_TDDRC_HMNC_GAIN +279 0x0001 //RX_TDDRC_SMT_FLAG +280 0x0CCD //RX_TDDRC_SMT_W +281 0x0551 //RX_TDDRC_DRC_GAIN +195 0x0020 //RX_FDEQ_SUBNUM +196 0x483E //RX_FDEQ_GAIN_0 +197 0x3E3E //RX_FDEQ_GAIN_1 +198 0x3E4C //RX_FDEQ_GAIN_2 +199 0x5064 //RX_FDEQ_GAIN_3 +200 0x7076 //RX_FDEQ_GAIN_4 +201 0x897A //RX_FDEQ_GAIN_5 +202 0x7C80 //RX_FDEQ_GAIN_6 +203 0x8888 //RX_FDEQ_GAIN_7 +204 0x949C //RX_FDEQ_GAIN_8 +205 0x96A4 //RX_FDEQ_GAIN_9 +206 0xA9A0 //RX_FDEQ_GAIN_10 +207 0x9487 //RX_FDEQ_GAIN_11 +208 0x6F64 //RX_FDEQ_GAIN_12 +209 0x625A //RX_FDEQ_GAIN_13 +210 0x5D80 //RX_FDEQ_GAIN_14 +211 0x8890 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0202 //RX_FDEQ_BIN_0 +221 0x0202 //RX_FDEQ_BIN_1 +222 0x0301 //RX_FDEQ_BIN_2 +223 0x0404 //RX_FDEQ_BIN_3 +224 0x0406 //RX_FDEQ_BIN_4 +225 0x0109 //RX_FDEQ_BIN_5 +226 0x0708 //RX_FDEQ_BIN_6 +227 0x090A //RX_FDEQ_BIN_7 +228 0x0B0C //RX_FDEQ_BIN_8 +229 0x0D0E //RX_FDEQ_BIN_9 +230 0x1013 //RX_FDEQ_BIN_10 +231 0x1719 //RX_FDEQ_BIN_11 +232 0x1B0F //RX_FDEQ_BIN_12 +233 0x141E //RX_FDEQ_BIN_13 +234 0x3728 //RX_FDEQ_BIN_14 +235 0x282C //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x4000 //RX_FDEQ_RESRV_0 +245 0x0320 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0030 //RX_FDDRC_BAND_MARGIN_1 +248 0x0050 //RX_FDDRC_BAND_MARGIN_2 +249 0x0080 //RX_FDDRC_BAND_MARGIN_3 +250 0x0007 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x5000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x6400 //RX_FDDRC_THRD_3_2 +258 0x6400 //RX_FDDRC_THRD_3_3 +259 0x2000 //RX_FDDRC_SLANT_0_0 +260 0x2000 //RX_FDDRC_SLANT_0_1 +261 0x2000 //RX_FDDRC_SLANT_0_2 +262 0x2000 //RX_FDDRC_SLANT_0_3 +263 0x5333 //RX_FDDRC_SLANT_1_0 +264 0x5333 //RX_FDDRC_SLANT_1_1 +265 0x5333 //RX_FDDRC_SLANT_1_2 +266 0x5333 //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +286 0x0100 //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 + +#CASE_NAME HANDSET-HANDSET_HAC-RESERVE2-SWB +#PARAM_MODE Simple +#PARAM_TYPE TX+2RX +#TOTAL_CUSTOM_STEP 7+7 +#TX +0 0x0000 //TX_OPERATION_MODE_0 +1 0x0000 //TX_OPERATION_MODE_1 +2 0x0076 //TX_PATCH_REG +3 0x6F7E //TX_SENDFUNC_MODE_0 +4 0x0001 //TX_SENDFUNC_MODE_1 +5 0x0002 //TX_NUM_MIC +6 0x0003 //TX_SAMPLINGFREQ_SIG +7 0x0003 //TX_SAMPLINGFREQ_PROC +8 0x000A //TX_FRAME_SZ_SIG +9 0x000A //TX_FRAME_SZ +10 0x0000 //TX_DELAY_OPT +11 0x0028 //TX_MAX_TAIL_LENGTH +12 0x0001 //TX_NUM_LOUTCHN +13 0x0001 //TX_MAXNUM_AECREF +14 0x0000 //TX_DBG_FUNC_REG +15 0x0000 //TX_DBG_FUNC_REG1 +16 0x0000 //TX_SYS_RESRV_0 +17 0x0000 //TX_SYS_RESRV_1 +18 0x0000 //TX_SYS_RESRV_2 +19 0x0000 //TX_SYS_RESRV_3 +20 0x0000 //TX_DIST2REF0 +21 0x00A3 //TX_DIST2REF1 +22 0x0000 //TX_DIST2REF_02 +23 0x0000 //TX_DIST2REF_03 +24 0x0000 //TX_DIST2REF_04 +25 0x0000 //TX_DIST2REF_05 +26 0x0000 //TX_MMIC +27 0x1000 //TX_PGA_0 +28 0x1000 //TX_PGA_1 +29 0x1000 //TX_PGA_2 +30 0x0000 //TX_PGA_3 +31 0x0000 //TX_PGA_4 +32 0x0000 //TX_PGA_5 +33 0x0000 //TX_MIC_PAIRS +34 0x0000 //TX_MIC_PAIRS_HS +35 0x0002 //TX_MICS_FOR_BF +36 0x0000 //TX_MIC_PAIRS_FORL1 +37 0x0002 //TX_MICS_OF_PAIR0 +38 0x0002 //TX_MICS_OF_PAIR1 +39 0x0002 //TX_MICS_OF_PAIR2 +40 0x0002 //TX_MICS_OF_PAIR3 +41 0x0000 //TX_MIC_DATA_SRC0 +42 0x0002 //TX_MIC_DATA_SRC1 +43 0x0001 //TX_MIC_DATA_SRC2 +44 0x0000 //TX_MIC_DATA_SRC3 +45 0x0000 //TX_MIC_PAIR_CH_04 +46 0x0000 //TX_MIC_PAIR_CH_05 +47 0x0000 //TX_MIC_PAIR_CH_10 +48 0x0000 //TX_MIC_PAIR_CH_11 +49 0x0000 //TX_MIC_PAIR_CH_12 +50 0x0000 //TX_MIC_PAIR_CH_13 +51 0x0000 //TX_MIC_PAIR_CH_14 +52 0x05DC //TX_HD_BIN_MASK +53 0x0010 //TX_HD_SUBAND_MASK +54 0x19A1 //TX_HD_FRAME_AVG_MASK +55 0x0320 //TX_HD_MIN_FRQ +56 0x1000 //TX_HD_ALPHA_PSD +57 0x1100 //TX_T_PHPR1 +58 0x0000 //TX_T_PHPR2 +59 0x0000 //TX_T_PTPR +60 0x0000 //TX_T_PNPR +61 0x0000 //TX_T_PAPR1 +62 0xEE6C //TX_T_PSDVAT +63 0x0800 //TX_CNT +64 0x4000 //TX_ANTI_HOWL_GAIN +65 0x0001 //TX_MICFORBFMARK_0 +66 0x0001 //TX_MICFORBFMARK_1 +67 0x0001 //TX_MICFORBFMARK_2 +68 0x0001 //TX_MICFORBFMARK_3 +69 0x0001 //TX_MICFORBFMARK_4 +70 0x0001 //TX_MICFORBFMARK_5 +71 0x0000 //TX_DIST2REF_10 +72 0x3A66 //TX_DIST2REF_11 +73 0x0000 //TX_DIST2REF2 +74 0x0000 //TX_DIST2REF_13 +75 0x0000 //TX_DIST2REF_14 +76 0x0000 //TX_DIST2REF_15 +77 0x0000 //TX_DIST2REF_20 +78 0x0000 //TX_DIST2REF_21 +79 0x0000 //TX_DIST2REF_22 +80 0x0000 //TX_DIST2REF_23 +81 0x0000 //TX_DIST2REF_24 +82 0x0000 //TX_DIST2REF_25 +83 0x0000 //TX_DIST2REF_30 +84 0x0000 //TX_DIST2REF_31 +85 0x0000 //TX_DIST2REF_32 +86 0x0000 //TX_DIST2REF_33 +87 0x0000 //TX_DIST2REF_34 +88 0x0000 //TX_DIST2REF_35 +89 0x0000 //TX_MIC_LOC_00 +90 0x0000 //TX_MIC_LOC_01 +91 0x0000 //TX_MIC_LOC_02 +92 0x0000 //TX_MIC_LOC_03 +93 0x0000 //TX_MIC_LOC_04 +94 0x0000 //TX_MIC_LOC_05 +95 0x0000 //TX_MIC_LOC_10 +96 0x0000 //TX_MIC_LOC_11 +97 0x0000 //TX_MIC_LOC_12 +98 0x0000 //TX_MIC_LOC_13 +99 0x0000 //TX_MIC_LOC_14 +100 0x0000 //TX_MIC_LOC_15 +101 0x0000 //TX_MIC_LOC_20 +102 0x0000 //TX_MIC_LOC_21 +103 0x0000 //TX_MIC_LOC_22 +104 0x0000 //TX_MIC_LOC_23 +105 0x0000 //TX_MIC_LOC_24 +106 0x0000 //TX_MIC_LOC_25 +107 0x0200 //TX_MIC_REFBLK_VOLUME +108 0x0AAC //TX_MIC_BLOCK_VOLUME +109 0x0000 //TX_INVERSE_MASK +110 0x0000 //TX_ADCS_MASK +111 0x04D0 //TX_ADCS_GAIN +112 0x4000 //TX_NFC_GAINFAC +113 0x0000 //TX_MAINMIC_BLKFACTOR +114 0x0000 //TX_REFMIC_BLKFACTOR +115 0x0000 //TX_BLMIC_BLKFACTOR +116 0x0000 //TX_BRMIC_BLKFACTOR +117 0x0031 //TX_MICBLK_START_BIN +118 0x0060 //TX_MICBLK_END_BIN +119 0x0015 //TX_MICBLK_FE_HOLD +120 0xFFF2 //TX_MICBLK_MR_EXP_TH +121 0xFFF2 //TX_MICBLK_LR_EXP_TH +122 0x0000 //TX_FENE_HOLD +123 0x4000 //TX_FE_ENER_TH_MTS +124 0x0004 //TX_FE_ENER_TH_EXP +125 0x6000 //TX_C_POST_FLT_MIC_MAINBLK +126 0x6000 //TX_C_POST_FLT_MIC_REFBLK +127 0x0010 //TX_MIC_BLOCK_N +128 0x7E56 //TX_A_HP +129 0x4000 //TX_B_PE +130 0x1800 //TX_THR_PITCH_DET_0 +131 0x1000 //TX_THR_PITCH_DET_1 +132 0x0800 //TX_THR_PITCH_DET_2 +133 0x0008 //TX_PITCH_BFR_LEN +134 0x0003 //TX_SBD_PITCH_DET +135 0x0050 //TX_TD_AEC_L +136 0x4000 //TX_MU0_UNP_TD_AEC +137 0x1000 //TX_MU0_PTD_TD_AEC +138 0x0000 //TX_PP_RESRV_0 +139 0x2A94 //TX_PP_RESRV_1 +140 0x55F0 //TX_PP_RESRV_2 +141 0x0000 //TX_PP_RESRV_3 +142 0x0000 //TX_PP_RESRV_4 +143 0x0000 //TX_PP_RESRV_5 +144 0x0000 //TX_PP_RESRV_6 +145 0x0000 //TX_PP_RESRV_7 +146 0x0028 //TX_TAIL_LENGTH +147 0x0080 //TX_AEC_REF_GAIN_0 +148 0x0800 //TX_AEC_REF_GAIN_1 +149 0x0800 //TX_AEC_REF_GAIN_2 +150 0x7900 //TX_EAD_THR +151 0x2000 //TX_THR_RE_EST +152 0x0400 //TX_MIN_EQ_RE_EST_0 +153 0x0400 //TX_MIN_EQ_RE_EST_1 +154 0x0800 //TX_MIN_EQ_RE_EST_2 +155 0x0800 //TX_MIN_EQ_RE_EST_3 +156 0x1000 //TX_MIN_EQ_RE_EST_4 +157 0x1000 //TX_MIN_EQ_RE_EST_5 +158 0x1000 //TX_MIN_EQ_RE_EST_6 +159 0x1000 //TX_MIN_EQ_RE_EST_7 +160 0x1000 //TX_MIN_EQ_RE_EST_8 +161 0x1000 //TX_MIN_EQ_RE_EST_9 +162 0x1000 //TX_MIN_EQ_RE_EST_10 +163 0x1000 //TX_MIN_EQ_RE_EST_11 +164 0x1000 //TX_MIN_EQ_RE_EST_12 +165 0x3000 //TX_LAMBDA_RE_EST +166 0x1000 //TX_LAMBDA_CB_NLE +167 0x1800 //TX_C_POST_FLT +168 0x4000 //TX_GAIN_NP +169 0x003C //TX_SE_HOLD_N +170 0x0046 //TX_DT_HOLD_N +171 0x03E8 //TX_DT2_HOLD_N +172 0x6666 //TX_AEC_RESRV_0 +173 0x0000 //TX_AEC_RESRV_1 +174 0x0014 //TX_AEC_RESRV_2 +175 0x0000 //TX_MIC_DELAY_LENGTH +176 0x0000 //TX_REF_DELAY_LENGTH +177 0x0000 //TX_ADD_LINEIN_GAINL +178 0x0000 //TX_ADD_LINEIN_GAINH +179 0x0000 //TX_MIN_EQ_RE_EST_14 +180 0x0000 //TX_DTD_THR1_8 +181 0x7FFF //TX_DTD_THR2_8 +182 0x0000 //TX_DTD_MIC_BLK2 +183 0x0008 //TX_FRQ_LIN_LEN +184 0x7FFF //TX_FRQ_AEC_LEN_RHO +185 0x6000 //TX_MU0_UNP_FRQ_AEC +186 0x4000 //TX_MU0_PTD_FRQ_AEC +187 0x000A //TX_MINENOISETH +188 0x0800 //TX_MU0_RE_EST +189 0x0001 //TX_AEC_NUM_CH +190 0x0000 //TX_BIGECHOATTENUATION_MAX +191 0x2000 //TX_A_POST_FLT_MICBLK +192 0x0000 //TX_BLKENERTH +193 0x0000 //TX_BLKENERHIGHTH +194 0x0000 //TX_NORMENERTH +195 0x0000 //TX_NORMENERHIGHTH +196 0x0000 //TX_NORMENERHIGHTHL +197 0x7000 //TX_DTD_THR1_0 +198 0x7000 //TX_DTD_THR1_1 +199 0x7000 //TX_DTD_THR1_2 +200 0x7F00 //TX_DTD_THR1_3 +201 0x7F00 //TX_DTD_THR1_4 +202 0x7F00 //TX_DTD_THR1_5 +203 0x7F00 //TX_DTD_THR1_6 +204 0x2000 //TX_DTD_THR2_0 +205 0x2000 //TX_DTD_THR2_1 +206 0x2000 //TX_DTD_THR2_2 +207 0x1000 //TX_DTD_THR2_3 +208 0x1000 //TX_DTD_THR2_4 +209 0x1000 //TX_DTD_THR2_5 +210 0x1000 //TX_DTD_THR2_6 +211 0x6000 //TX_DTD_THR3 +212 0x0177 //TX_SPK_CUT_K +213 0x1B58 //TX_DT_CUT_K +214 0x0100 //TX_DT_CUT_THR +215 0x04EB //TX_COMFORT_G +216 0x01F4 //TX_POWER_YOUT_TH +217 0x4000 //TX_FDPFGAINECHO +218 0x0000 //TX_DTD_HD_THR +219 0x0000 //TX_SPK_CUT_K_S +220 0x0000 //TX_DTD_MIC_BLK +221 0x0400 //TX_ADPT_STRICT_L +222 0x0200 //TX_ADPT_STRICT_H +223 0x0C00 //TX_RATIO_DT_L_TH_LOW +224 0x2000 //TX_RATIO_DT_H_TH_LOW +225 0x1800 //TX_RATIO_DT_L_TH_HIGH +226 0x3000 //TX_RATIO_DT_H_TH_HIGH +227 0x0A00 //TX_RATIO_DT_L0_TH +228 0x7000 //TX_B_POST_FILT_ECHO_L +229 0x7FFF //TX_B_POST_FILT_ECHO_H +230 0x0200 //TX_MIN_G_CTRL_ECHO +231 0x7FFF //TX_B_LESSCUT_RTO_ECHO +232 0x0000 //TX_EPD_OFFSET_00 +233 0x0000 //TX_EPD_OFFST_01 +234 0x1388 //TX_RATIO_DT_L0_TH_HIGH +235 0x3A98 //TX_RATIO_DT_H_TH_CUT +236 0x7FFF //TX_MIN_EQ_RE_EST_13 +237 0x0000 //TX_DTD_THR1_7 +238 0x0000 //TX_DTD_THR2_7 +239 0x0800 //TX_DT_RESRV_7 +240 0x0800 //TX_DT_RESRV_8 +241 0x0000 //TX_DT_RESRV_9 +242 0xF600 //TX_THR_SN_EST_0 +243 0xFA00 //TX_THR_SN_EST_1 +244 0xFA00 //TX_THR_SN_EST_2 +245 0xF800 //TX_THR_SN_EST_3 +246 0xF800 //TX_THR_SN_EST_4 +247 0xF800 //TX_THR_SN_EST_5 +248 0xF800 //TX_THR_SN_EST_6 +249 0xF700 //TX_THR_SN_EST_7 +250 0x0000 //TX_DELTA_THR_SN_EST_0 +251 0x0200 //TX_DELTA_THR_SN_EST_1 +252 0x0200 //TX_DELTA_THR_SN_EST_2 +253 0x0200 //TX_DELTA_THR_SN_EST_3 +254 0x0100 //TX_DELTA_THR_SN_EST_4 +255 0x0200 //TX_DELTA_THR_SN_EST_5 +256 0x0100 //TX_DELTA_THR_SN_EST_6 +257 0x0200 //TX_DELTA_THR_SN_EST_7 +258 0x4000 //TX_LAMBDA_NN_EST_0 +259 0x4000 //TX_LAMBDA_NN_EST_1 +260 0x4000 //TX_LAMBDA_NN_EST_2 +261 0x4000 //TX_LAMBDA_NN_EST_3 +262 0x4000 //TX_LAMBDA_NN_EST_4 +263 0x4000 //TX_LAMBDA_NN_EST_5 +264 0x4000 //TX_LAMBDA_NN_EST_6 +265 0x4000 //TX_LAMBDA_NN_EST_7 +266 0x0400 //TX_N_SN_EST +267 0x001E //TX_INBEAM_T +268 0x0041 //TX_INBEAMHOLDT +269 0x2000 //TX_G_STRICT +270 0x2000 //TX_EQ_THR_BF +271 0x799A //TX_LAMBDA_EQ_BF +272 0x1000 //TX_NE_RTO_TH +273 0x1000 //TX_NE_RTO_TH_L +274 0x1000 //TX_MAINREFRTOH_TH_H +275 0x0600 //TX_MAINREFRTOH_TH_L +276 0x2000 //TX_MAINREFRTO_TH_H +277 0x1400 //TX_MAINREFRTO_TH_L +278 0x0000 //TX_MAINREFRTO_TH_EQ +279 0x1000 //TX_B_POST_FLT_0 +280 0x1000 //TX_B_POST_FLT_1 +281 0x0014 //TX_NS_LVL_CTRL_0 +282 0x002C //TX_NS_LVL_CTRL_1 +283 0x0016 //TX_NS_LVL_CTRL_2 +284 0x0018 //TX_NS_LVL_CTRL_3 +285 0x0016 //TX_NS_LVL_CTRL_4 +286 0x0012 //TX_NS_LVL_CTRL_5 +287 0x0016 //TX_NS_LVL_CTRL_6 +288 0x0017 //TX_NS_LVL_CTRL_7 +289 0x000E //TX_MIN_GAIN_S_0 +290 0x000D //TX_MIN_GAIN_S_1 +291 0x0012 //TX_MIN_GAIN_S_2 +292 0x0010 //TX_MIN_GAIN_S_3 +293 0x0012 //TX_MIN_GAIN_S_4 +294 0x0012 //TX_MIN_GAIN_S_5 +295 0x0012 //TX_MIN_GAIN_S_6 +296 0x0012 //TX_MIN_GAIN_S_7 +297 0x6000 //TX_NMOS_SUP +298 0x0000 //TX_NS_MAX_PRI_SNR_TH +299 0x0000 //TX_NMOS_SUP_MENSA +300 0x7FFF //TX_SNRI_SUP_0 +301 0x6000 //TX_SNRI_SUP_1 +302 0x6000 //TX_SNRI_SUP_2 +303 0x6000 //TX_SNRI_SUP_3 +304 0x6000 //TX_SNRI_SUP_4 +305 0x6000 //TX_SNRI_SUP_5 +306 0x6000 //TX_SNRI_SUP_6 +307 0x6000 //TX_SNRI_SUP_7 +308 0x6000 //TX_THR_LFNS +309 0x0017 //TX_G_LFNS +310 0x09C4 //TX_GAIN0_NTH +311 0x000A //TX_MUSIC_MORENS +312 0x7FFF //TX_A_POST_FILT_0 +313 0x2000 //TX_A_POST_FILT_1 +314 0x4000 //TX_A_POST_FILT_S_0 +315 0x4000 //TX_A_POST_FILT_S_1 +316 0x4000 //TX_A_POST_FILT_S_2 +317 0x4000 //TX_A_POST_FILT_S_3 +318 0x4000 //TX_A_POST_FILT_S_4 +319 0x4000 //TX_A_POST_FILT_S_5 +320 0x5000 //TX_A_POST_FILT_S_6 +321 0x7000 //TX_A_POST_FILT_S_7 +322 0x1000 //TX_B_POST_FILT_0 +323 0x1000 //TX_B_POST_FILT_1 +324 0x2000 //TX_B_POST_FILT_2 +325 0x2000 //TX_B_POST_FILT_3 +326 0x2000 //TX_B_POST_FILT_4 +327 0x1000 //TX_B_POST_FILT_5 +328 0x3000 //TX_B_POST_FILT_6 +329 0x3000 //TX_B_POST_FILT_7 +330 0x1000 //TX_B_LESSCUT_RTO_S_0 +331 0x1000 //TX_B_LESSCUT_RTO_S_1 +332 0x1000 //TX_B_LESSCUT_RTO_S_2 +333 0x1000 //TX_B_LESSCUT_RTO_S_3 +334 0x1000 //TX_B_LESSCUT_RTO_S_4 +335 0x1000 //TX_B_LESSCUT_RTO_S_5 +336 0x1000 //TX_B_LESSCUT_RTO_S_6 +337 0x1000 //TX_B_LESSCUT_RTO_S_7 +338 0x7E14 //TX_LAMBDA_PFILT +339 0x7C29 //TX_LAMBDA_PFILT_S_0 +340 0x7C29 //TX_LAMBDA_PFILT_S_1 +341 0x7C29 //TX_LAMBDA_PFILT_S_2 +342 0x7C29 //TX_LAMBDA_PFILT_S_3 +343 0x7C29 //TX_LAMBDA_PFILT_S_4 +344 0x7C29 //TX_LAMBDA_PFILT_S_5 +345 0x7C29 //TX_LAMBDA_PFILT_S_6 +346 0x7C29 //TX_LAMBDA_PFILT_S_7 +347 0x07D0 //TX_K_PEPPER +348 0x0800 //TX_A_PEPPER +349 0x1D4C //TX_K_PEPPER_HF +350 0x0400 //TX_A_PEPPER_HF +351 0x0001 //TX_HMNC_BST_FLG +352 0x4000 //TX_HMNC_BST_THR +353 0x0800 //TX_DT_BINVAD_TH_0 +354 0x0800 //TX_DT_BINVAD_TH_1 +355 0x0800 //TX_DT_BINVAD_TH_2 +356 0x0800 //TX_DT_BINVAD_TH_3 +357 0x0000 //TX_DT_BINVAD_ENDF +358 0x1000 //TX_C_POST_FLT_DT +359 0x7FFF //TX_NS_B_POST_FLT_LESSCUT +360 0x0100 //TX_DT_BOOST +361 0x0000 //TX_BF_SGRAD_FLG +362 0x0005 //TX_BF_DVG_TH +363 0x001E //TX_SN_C_F +364 0x0000 //TX_K_APT +365 0x0001 //TX_NOISEDET +366 0x0190 //TX_NDETCT +367 0x000A //TX_NOISE_TH_0 +368 0x7FFF //TX_NOISE_TH_0_2 +369 0x7FFF //TX_NOISE_TH_0_3 +370 0x00C6 //TX_NOISE_TH_1 +371 0x0DAC //TX_NOISE_TH_2 +372 0x2260 //TX_NOISE_TH_3 +373 0x7080 //TX_NOISE_TH_4 +374 0x57E4 //TX_NOISE_TH_5 +375 0x4BD6 //TX_NOISE_TH_5_2 +376 0x0001 //TX_NOISE_TH_5_3 +377 0x4E20 //TX_NOISE_TH_5_4 +378 0x1194 //TX_NOISE_TH_6 +379 0x0014 //TX_MINENOISE_TH +380 0xD508 //TX_MORENS_TFMASK_TH +381 0x0001 //TX_DRC_QUIET_FLOOR +382 0x6D60 //TX_RATIODTL_CUT_TH +383 0x0DAC //TX_DT_CUT_K1 +384 0x00A5 //TX_OUT_ENER_S_TH_CLEAN +385 0x00A5 //TX_OUT_ENER_S_TH_LESSCLEAN +386 0x00A5 //TX_OUT_ENER_S_TH_NOISY +387 0x0029 //TX_OUT_ENER_TH_NOISE +388 0x0200 //TX_OUT_ENER_TH_SPEECH +389 0x2000 //TX_SN_NPB_GAIN +390 0x0000 //TX_NN_NPB_GAIN +391 0x3000 //TX_POST_MASK_SUP_HSNE +392 0x07D0 //TX_TAIL_DET_TH +393 0x4000 //TX_B_LESSCUT_RTO_WTA +394 0x0000 //TX_MEL_G_R +395 0x0080 //TX_SUPHIGH_TH +396 0x0000 //TX_MASK_G_R +397 0x0002 //TX_EXTRA_NS_L +398 0x1800 //TX_C_POST_FLT_MASK +399 0x7FFF //TX_A_POST_FLT_WNS +400 0x0148 //TX_MIN_G_LOW300HZ +401 0x0004 //TX_MAXLEVEL_CNG +402 0x00B4 //TX_STN_NOISE_TH +403 0x4000 //TX_POST_MASK_SUP +404 0x7FFF //TX_POST_MASK_ADJUST +405 0x00C8 //TX_NS_ENOISE_MIC0_TH +406 0x0014 //TX_MINENOISE_MIC0_TH +407 0x012C //TX_MINENOISE_MIC0_S_TH +408 0x2900 //TX_MIN_G_CTRL_SSNS +409 0x0800 //TX_METAL_RTO_THR +410 0x0FA0 //TX_NS_FP_K_METAL +411 0x3A98 //TX_NOISEDET_BOOST_TH +412 0x0FA0 //TX_NSMOOTH_TH +413 0x0000 //TX_NS_RESRV_8 +414 0x1800 //TX_RHO_UPB +415 0x2328 //TX_N_HOLD_HS +416 0x006E //TX_N_RHO_BFR0 +417 0x7FFF //TX_LAMBDA_ARSP_EST +418 0x0100 //TX_EXTRA_GAIN_MICBLOCK +419 0x0333 //TX_THR_STD_NSR +420 0x019A //TX_THR_STD_PLH +421 0x03E8 //TX_N_HOLD_STD +422 0x0066 //TX_THR_STD_RHO +423 0x2800 //TX_BF_RESET_THR_HS +424 0x0CCD //TX_SB_RTO_MEAN_TH +425 0x0300 //TX_SB_RHO_MEAN_TH_NTALK +426 0x2000 //TX_SB_RTO_MEAN_TH_ABN +427 0x2EE0 //TX_SB_RTO_MEAN_TH_RUB +428 0x0990 //TX_WTA_EN_RTO_TH +429 0x1400 //TX_TOP_ENER_TH_F +430 0x0100 //TX_DESIRED_TALK_HOLDT +431 0x0800 //TX_MIC_BLOCK_FACTOR +432 0x0000 //TX_NSEST_BFRLRNRDC +433 0x0000 //TX_THR_POST_FLT_HS +434 0x0010 //TX_HS_VAD_BIN +435 0x2666 //TX_THR_VAD_HS +436 0x2CCD //TX_MEAN_RTO_MIN_TH2 +437 0x0032 //TX_SILENCE_T +438 0x0000 //TX_A_POST_FLT_WTA +439 0x799A //TX_LAMBDA_PFLT_WTA +440 0x051E //TX_SB_RHO_MEAN2_TH +441 0x02F0 //TX_SB_RHO_MEAN3_TH +442 0x0000 //TX_HS_RESRV_4 +443 0x0000 //TX_HS_RESRV_5 +444 0x0001 //TX_DOA_VAD_THR_1 +445 0x003C //TX_DOA_VAD_THR_2 +446 0x0028 //TX_DOA_VAD_THR1_0 +447 0x0028 //TX_DOA_VAD_THR1_1 +448 0x0000 //TX_SRC_DOA_RNG_LOW_0A +449 0x001E //TX_SRC_DOA_RNG_HIGH_0A +450 0x005A //TX_DFLT_SRC_DOA_0A +451 0x0000 //TX_SRC_DOA_RNG_LOW_0B +452 0x0000 //TX_SRC_DOA_RNG_HIGH_0B +453 0x0000 //TX_DFLT_SRC_DOA_0B +454 0x0000 //TX_SRC_DOA_RNG_LOW_0C +455 0x0000 //TX_SRC_DOA_RNG_HIGH_0C +456 0x0000 //TX_DFLT_SRC_DOA_0C +457 0x0000 //TX_SRC_DOA_RNG_LOW_0D +458 0x0000 //TX_SRC_DOA_RNG_HIGH_0D +459 0x0000 //TX_DFLT_SRC_DOA_0D +460 0x0000 //TX_SRC_DOA_RNG_LOW_1A +461 0x00B4 //TX_SRC_DOA_RNG_HIGH_1A +462 0x005A //TX_DFLT_SRC_DOA_1A +463 0x0000 //TX_SRC_DOA_RNG_LOW_1B +464 0x00B4 //TX_SRC_DOA_RNG_HIGH_1B +465 0x005A //TX_DFLT_SRC_DOA_1B +466 0x0000 //TX_SRC_DOA_RNG_LOW_1C +467 0x00B4 //TX_SRC_DOA_RNG_HIGH_1C +468 0x005A //TX_DFLT_SRC_DOA_1C +469 0x0000 //TX_SRC_DOA_RNG_LOW_1D +470 0x00B4 //TX_SRC_DOA_RNG_HIGH_1D +471 0x005A //TX_DFLT_SRC_DOA_1D +472 0x0100 //TX_BF_HOLDOFF_T +473 0x7FFF //TX_DOA_COST_FACTOR +474 0x0D9A //TX_MAINTOREFR_TH0 +475 0x071C //TX_DOA_TRK_THR +476 0x012C //TX_DOA_TRACK_HT +477 0x0200 //TX_N1_HOLD_HF +478 0x0100 //TX_N2_HOLD_HF +479 0x2A3D //TX_BF_RESET_THR_HF +480 0x7333 //TX_DOA_SMOOTH +481 0x0800 //TX_MU_BF +482 0x0800 //TX_BF_MU_LF_B2 +483 0x0040 //TX_BF_FC_END_BIN_B2 +484 0x0020 //TX_BF_FC_END_BIN +485 0x0000 //TX_HF_RESRV_25 +486 0x0000 //TX_HF_RESRV_26 +487 0x0007 //TX_N_DOA_SEED +488 0x0001 //TX_FINE_DOA_SEARCH_FLG +489 0x0000 //TX_HF_RESRV_27 +490 0x038E //TX_DLT_SRC_DOA_RNG +491 0x0200 //TX_BF_MU_LF +492 0x0000 //TX_DFLT_SRC_LOC_0 +493 0x7FFF //TX_DFLT_SRC_LOC_1 +494 0x0000 //TX_DFLT_SRC_LOC_2 +495 0x038E //TX_DOA_TRACK_VADTH +496 0x0000 //TX_DOA_TRACK_NEW +497 0x0300 //TX_NOR_OFF_THR +498 0x7C00 //TX_MORE_ON_700HZ_THR +499 0x2000 //TX_MU_BF_ADPT_NS +500 0x0000 //TX_ADAPT_LEN +501 0x6666 //TX_MORE_SNS +502 0x0000 //TX_NOR_OFF_TH1 +503 0x0000 //TX_WIDE_MASK_TH +504 0xD333 //TX_SUBSNRATIOHIGH4MEANBCK_THR +505 0x6000 //TX_C_POST_FLT_CUT +506 0x2000 //TX_RADIODTLV +507 0x0320 //TX_POWER_LINEIN_TH +508 0x0014 //TX_FE_VADCOUNT_TH_FC +509 0x0000 //TX_ECHO_SUPP_FC +510 0x0C80 //TX_ECHO_TH +511 0x6666 //TX_MIC_TO_BFGAIN +512 0x0000 //TX_MICTOBFGAIN0 +513 0x0000 //TX_FASTMUE_TH +514 0x2CCC //TX_DEREVERB_LF_MU +515 0x3200 //TX_DEREVERB_HF_MU +516 0x0007 //TX_DEREVERB_DELAY +517 0x0004 //TX_DEREVERB_COEF_LEN +518 0x0003 //TX_DEREVERB_DNR +519 0x0000 //TX_DEREVERB_ALPHA +520 0x0000 //TX_DEREVERB_BETA +521 0x3A98 //TX_GSC_RTOL_TH +522 0x3A98 //TX_GSC_RTOH_TH +523 0x7E2C //TX_WIDE2_MEANHTH +524 0x0000 //TX_DR_RESRV_5 +525 0x0000 //TX_DR_RESRV_6 +526 0x0000 //TX_DR_RESRV_7 +527 0x0000 //TX_DR_RESRV_8 +528 0x1333 //TX_WIND_MARK_TH +529 0x399A //TX_CORR_THR +530 0x0004 //TX_SNR_THR +531 0x0010 //TX_ENGY_THR +532 0x1770 //TX_CORR_HIGH_TH +533 0x6000 //TX_ENGY_THR_2 +534 0x3400 //TX_MEAN_RTO_THR +535 0x0028 //TX_WNS_ENOISE_MIC0_TH +536 0x3000 //TX_RATIOMICL_TH +537 0x7FFF //TX_CALIG_HS +538 0x0000 //TX_LVL_CTRL +539 0x0010 //TX_WIND_SUPRTO +540 0x0014 //TX_WNS_MIN_G +541 0x0600 //TX_WNS_B_POST_FLT +542 0x3000 //TX_RATIOMICH_TH +543 0xD120 //TX_WIND_INBEAM_L_TH +544 0x0FA0 //TX_WIND_INBEAM_H_TH +545 0x2000 //TX_WNS_RESRV_0 +546 0x59D8 //TX_WNS_RESRV_1 +547 0x0200 //TX_WNS_RESRV_2 +548 0x0000 //TX_WNS_RESRV_3 +549 0x0000 //TX_WNS_RESRV_4 +550 0x0000 //TX_WNS_RESRV_5 +551 0x0000 //TX_WNS_RESRV_6 +552 0x0000 //TX_PB_B_POST_FLT_LESSCUT +553 0x0070 //TX_BF_LESSCUT_BBIN +554 0x0070 //TX_BF_LESSCUT_EBIN +555 0x0010 //TX_POSTBFB0 +556 0x0070 //TX_POSTBFB +557 0x00B0 //TX_POSTBFE +558 0x0E66 //TX_SPEECH_SNR_TH +559 0x0050 //TX_PB_MAX_PRI_SNR_TH +560 0x770A //TX_MAX_PRI_SNR_TH_L +561 0x0000 //TX_PFGAIN +562 0x0000 //TX_MAINTOREFR_TH +563 0x0000 //TX_SAM_MARK +564 0x0000 //TX_PB_RESRV_0 +565 0x0000 //TX_PB_RESRV_1 +566 0x0030 //TX_FDEQ_SUBNUM +567 0x5C54 //TX_FDEQ_GAIN_0 +568 0x5048 //TX_FDEQ_GAIN_1 +569 0x4C4C //TX_FDEQ_GAIN_2 +570 0x494D //TX_FDEQ_GAIN_3 +571 0x4442 //TX_FDEQ_GAIN_4 +572 0x4448 //TX_FDEQ_GAIN_5 +573 0x4C53 //TX_FDEQ_GAIN_6 +574 0x6244 //TX_FDEQ_GAIN_7 +575 0x4348 //TX_FDEQ_GAIN_8 +576 0x4848 //TX_FDEQ_GAIN_9 +577 0x4A49 //TX_FDEQ_GAIN_10 +578 0x4E4A //TX_FDEQ_GAIN_11 +579 0x4840 //TX_FDEQ_GAIN_12 +580 0x4040 //TX_FDEQ_GAIN_13 +581 0x4054 //TX_FDEQ_GAIN_14 +582 0x687A //TX_FDEQ_GAIN_15 +583 0x4848 //TX_FDEQ_GAIN_16 +584 0x4848 //TX_FDEQ_GAIN_17 +585 0x4848 //TX_FDEQ_GAIN_18 +586 0x4848 //TX_FDEQ_GAIN_19 +587 0x4848 //TX_FDEQ_GAIN_20 +588 0x4848 //TX_FDEQ_GAIN_21 +589 0x4848 //TX_FDEQ_GAIN_22 +590 0x4848 //TX_FDEQ_GAIN_23 +591 0x0202 //TX_FDEQ_BIN_0 +592 0x0104 //TX_FDEQ_BIN_1 +593 0x0502 //TX_FDEQ_BIN_2 +594 0x0202 //TX_FDEQ_BIN_3 +595 0x0504 //TX_FDEQ_BIN_4 +596 0x0708 //TX_FDEQ_BIN_5 +597 0x0808 //TX_FDEQ_BIN_6 +598 0x050E //TX_FDEQ_BIN_7 +599 0x0B0C //TX_FDEQ_BIN_8 +600 0x0F0F //TX_FDEQ_BIN_9 +601 0x0E0D //TX_FDEQ_BIN_10 +602 0x0F28 //TX_FDEQ_BIN_11 +603 0x111B //TX_FDEQ_BIN_12 +604 0x291E //TX_FDEQ_BIN_13 +605 0x1E10 //TX_FDEQ_BIN_14 +606 0x1810 //TX_FDEQ_BIN_15 +607 0x1021 //TX_FDEQ_BIN_16 +608 0x1000 //TX_FDEQ_BIN_17 +609 0x0000 //TX_FDEQ_BIN_18 +610 0x0000 //TX_FDEQ_BIN_19 +611 0x0000 //TX_FDEQ_BIN_20 +612 0x0000 //TX_FDEQ_BIN_21 +613 0x0000 //TX_FDEQ_BIN_22 +614 0x0000 //TX_FDEQ_BIN_23 +615 0x0000 //TX_FDEQ_PADDING +616 0x0030 //TX_PREEQ_SUBNUM_MIC0 +617 0x4848 //TX_PREEQ_GAIN_MIC0_0 +618 0x4848 //TX_PREEQ_GAIN_MIC0_1 +619 0x4848 //TX_PREEQ_GAIN_MIC0_2 +620 0x4848 //TX_PREEQ_GAIN_MIC0_3 +621 0x4848 //TX_PREEQ_GAIN_MIC0_4 +622 0x4848 //TX_PREEQ_GAIN_MIC0_5 +623 0x4848 //TX_PREEQ_GAIN_MIC0_6 +624 0x4848 //TX_PREEQ_GAIN_MIC0_7 +625 0x4848 //TX_PREEQ_GAIN_MIC0_8 +626 0x4848 //TX_PREEQ_GAIN_MIC0_9 +627 0x4848 //TX_PREEQ_GAIN_MIC0_10 +628 0x4848 //TX_PREEQ_GAIN_MIC0_11 +629 0x4848 //TX_PREEQ_GAIN_MIC0_12 +630 0x4848 //TX_PREEQ_GAIN_MIC0_13 +631 0x4848 //TX_PREEQ_GAIN_MIC0_14 +632 0x4848 //TX_PREEQ_GAIN_MIC0_15 +633 0x4848 //TX_PREEQ_GAIN_MIC0_16 +634 0x4848 //TX_PREEQ_GAIN_MIC0_17 +635 0x4848 //TX_PREEQ_GAIN_MIC0_18 +636 0x4848 //TX_PREEQ_GAIN_MIC0_19 +637 0x4848 //TX_PREEQ_GAIN_MIC0_20 +638 0x4848 //TX_PREEQ_GAIN_MIC0_21 +639 0x4848 //TX_PREEQ_GAIN_MIC0_22 +640 0x4848 //TX_PREEQ_GAIN_MIC0_23 +641 0x251A //TX_PREEQ_BIN_MIC0_0 +642 0x0F0F //TX_PREEQ_BIN_MIC0_1 +643 0x0C0C //TX_PREEQ_BIN_MIC0_2 +644 0x0C0F //TX_PREEQ_BIN_MIC0_3 +645 0x0F0F //TX_PREEQ_BIN_MIC0_4 +646 0x0F09 //TX_PREEQ_BIN_MIC0_5 +647 0x0909 //TX_PREEQ_BIN_MIC0_6 +648 0x0908 //TX_PREEQ_BIN_MIC0_7 +649 0x070F //TX_PREEQ_BIN_MIC0_8 +650 0x1F08 //TX_PREEQ_BIN_MIC0_9 +651 0x0808 //TX_PREEQ_BIN_MIC0_10 +652 0x0920 //TX_PREEQ_BIN_MIC0_11 +653 0x2020 //TX_PREEQ_BIN_MIC0_12 +654 0x2021 //TX_PREEQ_BIN_MIC0_13 +655 0x0000 //TX_PREEQ_BIN_MIC0_14 +656 0x0000 //TX_PREEQ_BIN_MIC0_15 +657 0x0000 //TX_PREEQ_BIN_MIC0_16 +658 0x0000 //TX_PREEQ_BIN_MIC0_17 +659 0x0000 //TX_PREEQ_BIN_MIC0_18 +660 0x0000 //TX_PREEQ_BIN_MIC0_19 +661 0x0000 //TX_PREEQ_BIN_MIC0_20 +662 0x0000 //TX_PREEQ_BIN_MIC0_21 +663 0x0000 //TX_PREEQ_BIN_MIC0_22 +664 0x0000 //TX_PREEQ_BIN_MIC0_23 +665 0x0030 //TX_PREEQ_SUBNUM_MIC1 +666 0x4848 //TX_PREEQ_GAIN_MIC1_0 +667 0x4848 //TX_PREEQ_GAIN_MIC1_1 +668 0x4848 //TX_PREEQ_GAIN_MIC1_2 +669 0x4848 //TX_PREEQ_GAIN_MIC1_3 +670 0x4848 //TX_PREEQ_GAIN_MIC1_4 +671 0x4848 //TX_PREEQ_GAIN_MIC1_5 +672 0x494A //TX_PREEQ_GAIN_MIC1_6 +673 0x4B4C //TX_PREEQ_GAIN_MIC1_7 +674 0x4D4E //TX_PREEQ_GAIN_MIC1_8 +675 0x4F52 //TX_PREEQ_GAIN_MIC1_9 +676 0x5355 //TX_PREEQ_GAIN_MIC1_10 +677 0x585C //TX_PREEQ_GAIN_MIC1_11 +678 0x616A //TX_PREEQ_GAIN_MIC1_12 +679 0x726E //TX_PREEQ_GAIN_MIC1_13 +680 0x5C48 //TX_PREEQ_GAIN_MIC1_14 +681 0x3B38 //TX_PREEQ_GAIN_MIC1_15 +682 0x4848 //TX_PREEQ_GAIN_MIC1_16 +683 0x4848 //TX_PREEQ_GAIN_MIC1_17 +684 0x4848 //TX_PREEQ_GAIN_MIC1_18 +685 0x4848 //TX_PREEQ_GAIN_MIC1_19 +686 0x4848 //TX_PREEQ_GAIN_MIC1_20 +687 0x4848 //TX_PREEQ_GAIN_MIC1_21 +688 0x4848 //TX_PREEQ_GAIN_MIC1_22 +689 0x4848 //TX_PREEQ_GAIN_MIC1_23 +690 0x0202 //TX_PREEQ_BIN_MIC1_0 +691 0x0203 //TX_PREEQ_BIN_MIC1_1 +692 0x0303 //TX_PREEQ_BIN_MIC1_2 +693 0x0304 //TX_PREEQ_BIN_MIC1_3 +694 0x0405 //TX_PREEQ_BIN_MIC1_4 +695 0x0506 //TX_PREEQ_BIN_MIC1_5 +696 0x0708 //TX_PREEQ_BIN_MIC1_6 +697 0x090A //TX_PREEQ_BIN_MIC1_7 +698 0x0B0C //TX_PREEQ_BIN_MIC1_8 +699 0x0D0E //TX_PREEQ_BIN_MIC1_9 +700 0x1013 //TX_PREEQ_BIN_MIC1_10 +701 0x1719 //TX_PREEQ_BIN_MIC1_11 +702 0x1B1E //TX_PREEQ_BIN_MIC1_12 +703 0x1E1E //TX_PREEQ_BIN_MIC1_13 +704 0x1E28 //TX_PREEQ_BIN_MIC1_14 +705 0x3042 //TX_PREEQ_BIN_MIC1_15 +706 0x0000 //TX_PREEQ_BIN_MIC1_16 +707 0x0000 //TX_PREEQ_BIN_MIC1_17 +708 0x0000 //TX_PREEQ_BIN_MIC1_18 +709 0x0000 //TX_PREEQ_BIN_MIC1_19 +710 0x0000 //TX_PREEQ_BIN_MIC1_20 +711 0x0000 //TX_PREEQ_BIN_MIC1_21 +712 0x0000 //TX_PREEQ_BIN_MIC1_22 +713 0x0000 //TX_PREEQ_BIN_MIC1_23 +714 0x0030 //TX_PREEQ_SUBNUM_MIC2 +715 0x4848 //TX_PREEQ_GAIN_MIC2_0 +716 0x4848 //TX_PREEQ_GAIN_MIC2_1 +717 0x4848 //TX_PREEQ_GAIN_MIC2_2 +718 0x4848 //TX_PREEQ_GAIN_MIC2_3 +719 0x4848 //TX_PREEQ_GAIN_MIC2_4 +720 0x4848 //TX_PREEQ_GAIN_MIC2_5 +721 0x4848 //TX_PREEQ_GAIN_MIC2_6 +722 0x4848 //TX_PREEQ_GAIN_MIC2_7 +723 0x4848 //TX_PREEQ_GAIN_MIC2_8 +724 0x4848 //TX_PREEQ_GAIN_MIC2_9 +725 0x4848 //TX_PREEQ_GAIN_MIC2_10 +726 0x4848 //TX_PREEQ_GAIN_MIC2_11 +727 0x4848 //TX_PREEQ_GAIN_MIC2_12 +728 0x4848 //TX_PREEQ_GAIN_MIC2_13 +729 0x4848 //TX_PREEQ_GAIN_MIC2_14 +730 0x4848 //TX_PREEQ_GAIN_MIC2_15 +731 0x4848 //TX_PREEQ_GAIN_MIC2_16 +732 0x4848 //TX_PREEQ_GAIN_MIC2_17 +733 0x4848 //TX_PREEQ_GAIN_MIC2_18 +734 0x4848 //TX_PREEQ_GAIN_MIC2_19 +735 0x4848 //TX_PREEQ_GAIN_MIC2_20 +736 0x4848 //TX_PREEQ_GAIN_MIC2_21 +737 0x4848 //TX_PREEQ_GAIN_MIC2_22 +738 0x4848 //TX_PREEQ_GAIN_MIC2_23 +739 0x0608 //TX_PREEQ_BIN_MIC2_0 +740 0x0808 //TX_PREEQ_BIN_MIC2_1 +741 0x0808 //TX_PREEQ_BIN_MIC2_2 +742 0x0808 //TX_PREEQ_BIN_MIC2_3 +743 0x0808 //TX_PREEQ_BIN_MIC2_4 +744 0x0808 //TX_PREEQ_BIN_MIC2_5 +745 0x0808 //TX_PREEQ_BIN_MIC2_6 +746 0x0808 //TX_PREEQ_BIN_MIC2_7 +747 0x0808 //TX_PREEQ_BIN_MIC2_8 +748 0x0808 //TX_PREEQ_BIN_MIC2_9 +749 0x0808 //TX_PREEQ_BIN_MIC2_10 +750 0x0808 //TX_PREEQ_BIN_MIC2_11 +751 0x0808 //TX_PREEQ_BIN_MIC2_12 +752 0x0808 //TX_PREEQ_BIN_MIC2_13 +753 0x0808 //TX_PREEQ_BIN_MIC2_14 +754 0x0200 //TX_PREEQ_BIN_MIC2_15 +755 0x0000 //TX_PREEQ_BIN_MIC2_16 +756 0x0000 //TX_PREEQ_BIN_MIC2_17 +757 0x0000 //TX_PREEQ_BIN_MIC2_18 +758 0x0000 //TX_PREEQ_BIN_MIC2_19 +759 0x0000 //TX_PREEQ_BIN_MIC2_20 +760 0x0000 //TX_PREEQ_BIN_MIC2_21 +761 0x0000 //TX_PREEQ_BIN_MIC2_22 +762 0x0000 //TX_PREEQ_BIN_MIC2_23 +763 0x0006 //TX_MASKING_ABILITY +764 0x0800 //TX_NND_WEIGHT +765 0x0050 //TX_MIC_CALIBRATION_0 +766 0x0056 //TX_MIC_CALIBRATION_1 +767 0x0050 //TX_MIC_CALIBRATION_2 +768 0x0050 //TX_MIC_CALIBRATION_3 +769 0x0046 //TX_MIC_PWR_BIAS_0 +770 0x0042 //TX_MIC_PWR_BIAS_1 +771 0x0046 //TX_MIC_PWR_BIAS_2 +772 0x0046 //TX_MIC_PWR_BIAS_3 +773 0x0000 //TX_GAIN_LIMIT_0 +774 0x0006 //TX_GAIN_LIMIT_1 +775 0x0000 //TX_GAIN_LIMIT_2 +776 0x0000 //TX_GAIN_LIMIT_3 +777 0x7F5B //TX_BVE_NOVAD0_ALPHADOWN +778 0x7FDE //TX_BVE_VAD0_ALPHAUP +779 0x7F3A //TX_BVE_VAD0_ALPHADOWN +780 0x2000 //TX_BVE_GAINWEIGHT_NOFEVADLI +781 0x7F5B //TX_BVE_FEVADLI_ALPHA +782 0x7F19 //TX_BVE_NOVAD0_ALPHAUP +783 0x1000 //TX_TDDRC_ALPHA_UP_01 +784 0x1000 //TX_TDDRC_ALPHA_UP_02 +785 0x1000 //TX_TDDRC_ALPHA_UP_03 +786 0x1000 //TX_TDDRC_ALPHA_UP_04 +787 0x7EB8 //TX_TDDRC_ALPHA_DWN_01 +788 0x7EB8 //TX_TDDRC_ALPHA_DWN_02 +789 0x7EB8 //TX_TDDRC_ALPHA_DWN_03 +790 0x7EB8 //TX_TDDRC_ALPHA_DWN_04 +791 0x7FFF //TX_TDDRC_TD_DRC_LIMIT +792 0x0800 //TX_TDDRC_POST_LIMIT_GAIN +793 0x0000 //TX_TDDRC_RESRV_0 +794 0x0000 //TX_TDDRC_RESRV_1 +795 0x0018 //TX_FDDRC_BAND_MARGIN_0 +796 0x0030 //TX_FDDRC_BAND_MARGIN_1 +797 0x0050 //TX_FDDRC_BAND_MARGIN_2 +798 0x0080 //TX_FDDRC_BAND_MARGIN_3 +799 0x0007 //TX_FDDRC_BLOCK_EXP +800 0x5000 //TX_FDDRC_THRD_2_0 +801 0x5000 //TX_FDDRC_THRD_2_1 +802 0x5000 //TX_FDDRC_THRD_2_2 +803 0x5000 //TX_FDDRC_THRD_2_3 +804 0x6400 //TX_FDDRC_THRD_3_0 +805 0x6400 //TX_FDDRC_THRD_3_1 +806 0x6400 //TX_FDDRC_THRD_3_2 +807 0x6400 //TX_FDDRC_THRD_3_3 +808 0x2000 //TX_FDDRC_SLANT_0_0 +809 0x2000 //TX_FDDRC_SLANT_0_1 +810 0x2000 //TX_FDDRC_SLANT_0_2 +811 0x2000 //TX_FDDRC_SLANT_0_3 +812 0x5333 //TX_FDDRC_SLANT_1_0 +813 0x5333 //TX_FDDRC_SLANT_1_1 +814 0x5333 //TX_FDDRC_SLANT_1_2 +815 0x5333 //TX_FDDRC_SLANT_1_3 +816 0x0010 //TX_DEADMIC_SILENCE_TH +817 0x0600 //TX_MIC_DEGRADE_TH +818 0x0078 //TX_DEADMIC_CNT +819 0x0078 //TX_MIC_DEGRADE_CNT +820 0x0000 //TX_FDDRC_RESRV_4 +821 0x0000 //TX_FDDRC_RESRV_5 +822 0x0000 //TX_FDDRC_RESRV_6 +823 0x7FFF //TX_KS_NOISEPASTE_FACTOR +824 0x0001 //TX_KS_CONFIG +825 0x7FFF //TX_KS_GAIN_MIN +826 0x0000 //TX_KS_RESRV_0 +827 0x0000 //TX_KS_RESRV_1 +828 0x0000 //TX_KS_RESRV_2 +829 0x7C00 //TX_LAMBDA_PKA_FP +830 0x2000 //TX_TPKA_FP +831 0x0080 //TX_MIN_G_FP +832 0x2000 //TX_MAX_G_FP +833 0x0FA0 //TX_FFP_FP_K_METAL +834 0x4000 //TX_A_POST_FLT_FP +835 0x0F5C //TX_RTO_OUTBEAM_TH +836 0x4CCD //TX_TPKA_FP_THD +837 0x0000 //TX_MAX_G_FP_BLK +838 0x0000 //TX_FFP_FADEIN +839 0x0000 //TX_FFP_FADEOUT +840 0x0000 //TX_WHISPERCTH +841 0x0000 //TX_WHISPERHOLDT +842 0x0000 //TX_WHISP_ENTHH +843 0x0000 //TX_WHISP_ENTHL +844 0x0000 //TX_WHISP_RTOTH +845 0x0000 //TX_WHISP_RTOTH2 +846 0x0096 //TX_MUTE_PERIOD +847 0x0000 //TX_FADE_IN_PERIOD +848 0x0100 //TX_FFP_RESRV_2 +849 0x0020 //TX_FFP_RESRV_3 +850 0x0000 //TX_FFP_RESRV_4 +851 0x0000 //TX_FFP_RESRV_5 +852 0x0000 //TX_FFP_RESRV_6 +853 0x0002 //TX_FILTINDX +854 0x0002 //TX_TDDRC_THRD_0 +855 0x0003 //TX_TDDRC_THRD_1 +856 0x1500 //TX_TDDRC_THRD_2 +857 0x1500 //TX_TDDRC_THRD_3 +858 0x3000 //TX_TDDRC_SLANT_0 +859 0x6E00 //TX_TDDRC_SLANT_1 +860 0x1000 //TX_TDDRC_ALPHA_UP_00 +861 0x7EB8 //TX_TDDRC_ALPHA_DWN_00 +862 0x0000 //TX_TDDRC_HMNC_FLAG +863 0x199A //TX_TDDRC_HMNC_GAIN +864 0x0000 //TX_TDDRC_SMT_FLAG +865 0x0CCD //TX_TDDRC_SMT_W +866 0x0650 //TX_TDDRC_DRC_GAIN +867 0x7FFF //TX_TDDRC_LMT_THRD +868 0x0000 //TX_TDDRC_LMT_ALPHA +869 0x0000 //TX_TFMASKLTH +870 0x0000 //TX_TFMASKLTHL +871 0x0CCD //TX_TFMASKHTH +872 0xECCD //TX_TFMASKLTH_BINVAD +873 0xFCCD //TX_TFMASKLTH_NS_EST +874 0xF800 //TX_TFMASKLTH_DOA +875 0x0CCD //TX_TFMASKTH_BLESSCUT +876 0x1000 //TX_B_LESSCUT_RTO_MASK +877 0x2000 //TX_SB_RHO_MEAN_TH_ABN +878 0x2000 //TX_B_POST_FLT_MASK +879 0x0000 //TX_B_POST_FLT_MASK1 +880 0x6333 //TX_GAIN_WIND_MASK +881 0x0000 //TX_TFMASK_BFSTRICT_MUSIC +882 0x0000 //TX_TFMASK_BFSTRICT_NOMUSIC +883 0x7333 //TX_FASTNS_OUTIN_TH +884 0x0CCD //TX_FASTNS_TFMASK_TH +885 0x0CCD //TX_FASTNS_TFMASKBIN_TH1 +886 0x0CCD //TX_FASTNS_TFMASKBIN_TH2 +887 0x0CCD //TX_FASTNS_TFMASKBIN_TH3 +888 0x0028 //TX_FASTNS_ARSPC_TH +889 0xC000 //TX_FASTNS_MASK5_TH +890 0x0810 //TX_POSTSSA_MIN_G_VR_MASK +891 0x1000 //TX_A_LESSCUT_RTO_MASK +892 0x1770 //TX_FASTNS_NOISETH +893 0xC000 //TX_FASTNS_SSA_THLFL +894 0xC000 //TX_FASTNS_SSA_THHFL +895 0xCCCC //TX_FASTNS_SSA_THLFH +896 0xD999 //TX_FASTNS_SSA_THHFH +897 0x2339 //TX_SENDFUNC_REG_MICMUTE +898 0x0021 //TX_SENDFUNC_REG_MICMUTE1 +899 0x02BC //TX_MICMUTE_RATIO_THR +900 0x0140 //TX_MICMUTE_AMP_THR +901 0x0004 //TX_MICMUTE_HPF_IND +902 0x00C0 //TX_MICMUTE_LOG_EYR_TH +903 0x0008 //TX_MICMUTE_CVG_TIME +904 0x0008 //TX_MICMUTE_RELEASE_TIME +905 0x01FE //TX_MIC_VOLUME_MIC0MUTE +906 0x0020 //TX_MICMUTE_EPD_OFFSET_0 +907 0x001E //TX_MICMUTE_FRQ_AEC_L +908 0x7999 //TX_MICMUTE_EAD_THR +909 0x7FFF //TX_MICMUTE_LAMBDA_CB_NLE +910 0x7FFF //TX_MICMUTE_LAMBDA_RE_EST +911 0x4000 //TX_DTD_THR1_MICMUTE_0 +912 0x7000 //TX_DTD_THR1_MICMUTE_1 +913 0x7FFF //TX_DTD_THR1_MICMUTE_2 +914 0x7FFF //TX_DTD_THR1_MICMUTE_3 +915 0x6CCC //TX_DTD_THR2_MICMUTE_0 +916 0x0400 //TX_MICMUTE_MIN_EQ_RE_EST_0 +917 0x0400 //TX_MICMUTE_MIN_EQ_RE_EST_1 +918 0x1000 //TX_MICMUTE_MIN_EQ_RE_EST_2 +919 0x7FFF //TX_MICMUTE_MIN_EQ_RE_EST_3 +920 0x7FFF //TX_MICMUTE_MIN_EQ_RE_EST_4 +921 0x4000 //TX_MICMUTE_C_POST_FLT +922 0x03E8 //TX_MICMUTE_DT_CUT_K +923 0x0001 //TX_MICMUTE_DT_CUT_THR +924 0x03E8 //TX_MICMUTE_DT_CUT_K2 +925 0x0001 //TX_MICMUTE_DT_CUT_THR2 +926 0x0064 //TX_MICMUTE_DT2_HOLD_N +927 0x1000 //TX_MICMUTE_RATIODTH_THCUT +928 0x1000 //TX_MICMUTE_B_POST_FLT_ECHOL +929 0x7FFF //TX_MICMUTE_B_POST_FLT_ECHOH +930 0x0400 //TX_MICMUTE_C_POST_FLT_MASK +931 0x7999 //TX_MICMUTE_RATIODTL_CUT_TH +932 0x0258 //TX_MICMUTE_DT_CUT_K1 +933 0x0800 //TX_MICMUTE_N2_SN_EST +934 0xFC00 //TX_MICMUTE_THR_SN_EST_0 +935 0x001C //TX_MICMUTE_MIN_G_CTRL_0 +936 0x6000 //TX_MICMUTE_A_POST_FILT_S_0 +937 0x7000 //TX_MICMUTE_B_POST_FILT_0 +938 0x2710 //TX_MIC1RUB_AMP_THR +939 0x0010 //TX_MIC1MUTE_RATIO_THR +940 0x0450 //TX_MIC1MUTE_AMP_THR +941 0x0008 //TX_MIC1MUTE_CVG_TIME +942 0x0008 //TX_MIC1MUTE_RELEASE_TIME +943 0x0000 //TX_AMS_RESRV_01 +944 0x0000 //TX_AMS_RESRV_02 +945 0x0000 //TX_AMS_RESRV_03 +946 0x0000 //TX_AMS_RESRV_04 +947 0x0000 //TX_AMS_RESRV_05 +948 0x0000 //TX_AMS_RESRV_06 +949 0x0000 //TX_AMS_RESRV_07 +950 0x0000 //TX_AMS_RESRV_08 +951 0x0000 //TX_AMS_RESRV_09 +952 0x0000 //TX_AMS_RESRV_10 +953 0x0000 //TX_AMS_RESRV_11 +954 0x0000 //TX_AMS_RESRV_12 +955 0x0000 //TX_AMS_RESRV_13 +956 0x0000 //TX_AMS_RESRV_14 +957 0x0000 //TX_AMS_RESRV_15 +958 0x0000 //TX_AMS_RESRV_16 +959 0x0000 //TX_AMS_RESRV_17 +960 0x0000 //TX_AMS_RESRV_18 +961 0x0000 //TX_AMS_RESRV_19 +#RX +0 0x000C //RX_RECVFUNC_MODE_0 +1 0x0000 //RX_RECVFUNC_MODE_1 +2 0x0003 //RX_SAMPLINGFREQ_SIG +3 0x0003 //RX_SAMPLINGFREQ_PROC +4 0x000A //RX_FRAME_SZ +5 0x0000 //RX_DELAY_OPT +6 0x1000 //RX_TDDRC_ALPHA_UP_1 +7 0x1000 //RX_TDDRC_ALPHA_UP_2 +8 0x1000 //RX_TDDRC_ALPHA_UP_3 +9 0x1000 //RX_TDDRC_ALPHA_UP_4 +10 0x0800 //RX_PGA +11 0x7FFF //RX_A_HP +12 0x4000 //RX_B_PE +13 0x5800 //RX_THR_PITCH_DET_0 +14 0x5000 //RX_THR_PITCH_DET_1 +15 0x4000 //RX_THR_PITCH_DET_2 +16 0x0008 //RX_PITCH_BFR_LEN +17 0x0003 //RX_SBD_PITCH_DET +18 0x0100 //RX_PP_RESRV_0 +19 0x0020 //RX_PP_RESRV_1 +20 0x0600 //RX_N_SN_EST +21 0x000C //RX_N2_SN_EST +22 0x000F //RX_NS_LVL_CTRL +23 0xF800 //RX_THR_SN_EST +24 0x7E00 //RX_LAMBDA_PFILT +25 0x000A //RX_FENS_RESRV_0 +26 0x0190 //RX_FENS_RESRV_1 +27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +30 0x0002 //RX_EXTRA_NS_L +31 0x0800 //RX_EXTRA_NS_A +32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +33 0x7000 //RX_TDDRC_LIMITER_THRD +34 0x0800 //RX_TDDRC_LIMITER_GAIN +35 0x199A //RX_A_POST_FLT +36 0x0000 //RX_LMT_THRD +37 0x4000 //RX_LMT_ALPHA +38 0x0030 //RX_FDEQ_SUBNUM +39 0x4848 //RX_FDEQ_GAIN_0 +40 0x4848 //RX_FDEQ_GAIN_1 +41 0x4844 //RX_FDEQ_GAIN_2 +42 0x4B4D //RX_FDEQ_GAIN_3 +43 0x4E50 //RX_FDEQ_GAIN_4 +44 0x5254 //RX_FDEQ_GAIN_5 +45 0x5658 //RX_FDEQ_GAIN_6 +46 0x5C60 //RX_FDEQ_GAIN_7 +47 0x6468 //RX_FDEQ_GAIN_8 +48 0x6C70 //RX_FDEQ_GAIN_9 +49 0x7474 //RX_FDEQ_GAIN_10 +50 0x7474 //RX_FDEQ_GAIN_11 +51 0x7474 //RX_FDEQ_GAIN_12 +52 0x7474 //RX_FDEQ_GAIN_13 +53 0x7474 //RX_FDEQ_GAIN_14 +54 0x7474 //RX_FDEQ_GAIN_15 +55 0x4848 //RX_FDEQ_GAIN_16 +56 0x4848 //RX_FDEQ_GAIN_17 +57 0x4848 //RX_FDEQ_GAIN_18 +58 0x4848 //RX_FDEQ_GAIN_19 +59 0x4848 //RX_FDEQ_GAIN_20 +60 0x4848 //RX_FDEQ_GAIN_21 +61 0x4848 //RX_FDEQ_GAIN_22 +62 0x4848 //RX_FDEQ_GAIN_23 +63 0x0202 //RX_FDEQ_BIN_0 +64 0x0203 //RX_FDEQ_BIN_1 +65 0x0402 //RX_FDEQ_BIN_2 +66 0x0304 //RX_FDEQ_BIN_3 +67 0x0405 //RX_FDEQ_BIN_4 +68 0x0506 //RX_FDEQ_BIN_5 +69 0x0708 //RX_FDEQ_BIN_6 +70 0x090A //RX_FDEQ_BIN_7 +71 0x0B0C //RX_FDEQ_BIN_8 +72 0x0D0E //RX_FDEQ_BIN_9 +73 0x1214 //RX_FDEQ_BIN_10 +74 0x1E1E //RX_FDEQ_BIN_11 +75 0x1E1E //RX_FDEQ_BIN_12 +76 0x1E1E //RX_FDEQ_BIN_13 +77 0x1E1E //RX_FDEQ_BIN_14 +78 0x202C //RX_FDEQ_BIN_15 +79 0x0000 //RX_FDEQ_BIN_16 +80 0x0000 //RX_FDEQ_BIN_17 +81 0x0000 //RX_FDEQ_BIN_18 +82 0x0000 //RX_FDEQ_BIN_19 +83 0x0000 //RX_FDEQ_BIN_20 +84 0x0000 //RX_FDEQ_BIN_21 +85 0x0000 //RX_FDEQ_BIN_22 +86 0x0000 //RX_FDEQ_BIN_23 +87 0x4000 //RX_FDEQ_RESRV_0 +88 0x0320 //RX_FDEQ_RESRV_1 +89 0x0018 //RX_FDDRC_BAND_MARGIN_0 +90 0x0030 //RX_FDDRC_BAND_MARGIN_1 +91 0x0050 //RX_FDDRC_BAND_MARGIN_2 +92 0x0080 //RX_FDDRC_BAND_MARGIN_3 +93 0x0007 //RX_FDDRC_BLOCK_EXP +94 0x5000 //RX_FDDRC_THRD_2_0 +95 0x5000 //RX_FDDRC_THRD_2_1 +96 0x5000 //RX_FDDRC_THRD_2_2 +97 0x5000 //RX_FDDRC_THRD_2_3 +98 0x6400 //RX_FDDRC_THRD_3_0 +99 0x6400 //RX_FDDRC_THRD_3_1 +100 0x6400 //RX_FDDRC_THRD_3_2 +101 0x6400 //RX_FDDRC_THRD_3_3 +102 0x2000 //RX_FDDRC_SLANT_0_0 +103 0x2000 //RX_FDDRC_SLANT_0_1 +104 0x2000 //RX_FDDRC_SLANT_0_2 +105 0x2000 //RX_FDDRC_SLANT_0_3 +106 0x5333 //RX_FDDRC_SLANT_1_0 +107 0x5333 //RX_FDDRC_SLANT_1_1 +108 0x5333 //RX_FDDRC_SLANT_1_2 +109 0x5333 //RX_FDDRC_SLANT_1_3 +110 0x0000 //RX_FDDRC_RESRV_0 +111 0x0002 //RX_FILTINDX +112 0x0000 //RX_TDDRC_THRD_0 +113 0x0000 //RX_TDDRC_THRD_1 +114 0x1800 //RX_TDDRC_THRD_2 +115 0x1800 //RX_TDDRC_THRD_3 +116 0x3000 //RX_TDDRC_SLANT_0 +117 0x6E00 //RX_TDDRC_SLANT_1 +118 0x1000 //RX_TDDRC_ALPHA_UP_0 +119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +120 0x0000 //RX_TDDRC_HMNC_FLAG +121 0x199A //RX_TDDRC_HMNC_GAIN +122 0x0001 //RX_TDDRC_SMT_FLAG +123 0x0CCD //RX_TDDRC_SMT_W +124 0x01E0 //RX_TDDRC_DRC_GAIN +125 0x7C00 //RX_LAMBDA_PKA_FP +126 0x2000 //RX_TPKA_FP +127 0x2000 //RX_MIN_G_FP +128 0x0080 //RX_MAX_G_FP +129 0x0100 //RX_SPK_VOL +130 0x0000 //RX_VOL_RESRV_0 +131 0x0000 //RX_MAXLEVEL_CNG +132 0x3000 //RX_BWE_UV_TH +133 0x3000 //RX_BWE_UV_TH2 +134 0x1800 //RX_BWE_UV_TH3 +135 0x1000 //RX_BWE_V_TH +136 0x04CD //RX_BWE_GAIN1_V_TH1 +137 0x0F33 //RX_BWE_GAIN1_V_TH2 +138 0x7333 //RX_BWE_UV_EQ +139 0x199A //RX_BWE_V_EQ +140 0x7333 //RX_BWE_TONE_TH +141 0x0004 //RX_BWE_UV_HOLD_T +142 0x6CCD //RX_BWE_GAIN2_ALPHA +143 0x799A //RX_BWE_GAIN3_ALPHA +144 0x001E //RX_BWE_CUTOFF +145 0x3000 //RX_BWE_GAINFILL +146 0x3200 //RX_BWE_MAXTH_TONE +147 0x2000 //RX_BWE_EQ_0 +148 0x2000 //RX_BWE_EQ_1 +149 0x2000 //RX_BWE_EQ_2 +150 0x2000 //RX_BWE_EQ_3 +151 0x2000 //RX_BWE_EQ_4 +152 0x2000 //RX_BWE_EQ_5 +153 0x2000 //RX_BWE_EQ_6 +154 0x0000 //RX_BWE_RESRV_0 +155 0x0000 //RX_BWE_RESRV_1 +156 0x0000 //RX_BWE_RESRV_2 +#VOL 0 +6 0x1000 //RX_TDDRC_ALPHA_UP_1 +7 0x1000 //RX_TDDRC_ALPHA_UP_2 +8 0x1000 //RX_TDDRC_ALPHA_UP_3 +9 0x1000 //RX_TDDRC_ALPHA_UP_4 +27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +33 0x7000 //RX_TDDRC_LIMITER_THRD +34 0x0800 //RX_TDDRC_LIMITER_GAIN +112 0x0000 //RX_TDDRC_THRD_0 +113 0x0000 //RX_TDDRC_THRD_1 +114 0x1800 //RX_TDDRC_THRD_2 +115 0x1800 //RX_TDDRC_THRD_3 +116 0x3000 //RX_TDDRC_SLANT_0 +117 0x6E00 //RX_TDDRC_SLANT_1 +118 0x1000 //RX_TDDRC_ALPHA_UP_0 +119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +120 0x0000 //RX_TDDRC_HMNC_FLAG +121 0x199A //RX_TDDRC_HMNC_GAIN +122 0x0001 //RX_TDDRC_SMT_FLAG +123 0x0CCD //RX_TDDRC_SMT_W +124 0x01E0 //RX_TDDRC_DRC_GAIN +38 0x0030 //RX_FDEQ_SUBNUM +39 0x4848 //RX_FDEQ_GAIN_0 +40 0x4848 //RX_FDEQ_GAIN_1 +41 0x4844 //RX_FDEQ_GAIN_2 +42 0x4B4D //RX_FDEQ_GAIN_3 +43 0x4E50 //RX_FDEQ_GAIN_4 +44 0x5254 //RX_FDEQ_GAIN_5 +45 0x5658 //RX_FDEQ_GAIN_6 +46 0x5C60 //RX_FDEQ_GAIN_7 +47 0x6468 //RX_FDEQ_GAIN_8 +48 0x6C70 //RX_FDEQ_GAIN_9 +49 0x7474 //RX_FDEQ_GAIN_10 +50 0x7474 //RX_FDEQ_GAIN_11 +51 0x7474 //RX_FDEQ_GAIN_12 +52 0x7474 //RX_FDEQ_GAIN_13 +53 0x7474 //RX_FDEQ_GAIN_14 +54 0x7474 //RX_FDEQ_GAIN_15 +55 0x4848 //RX_FDEQ_GAIN_16 +56 0x4848 //RX_FDEQ_GAIN_17 +57 0x4848 //RX_FDEQ_GAIN_18 +58 0x4848 //RX_FDEQ_GAIN_19 +59 0x4848 //RX_FDEQ_GAIN_20 +60 0x4848 //RX_FDEQ_GAIN_21 +61 0x4848 //RX_FDEQ_GAIN_22 +62 0x4848 //RX_FDEQ_GAIN_23 +63 0x0202 //RX_FDEQ_BIN_0 +64 0x0203 //RX_FDEQ_BIN_1 +65 0x0402 //RX_FDEQ_BIN_2 +66 0x0304 //RX_FDEQ_BIN_3 +67 0x0405 //RX_FDEQ_BIN_4 +68 0x0506 //RX_FDEQ_BIN_5 +69 0x0708 //RX_FDEQ_BIN_6 +70 0x090A //RX_FDEQ_BIN_7 +71 0x0B0C //RX_FDEQ_BIN_8 +72 0x0D0E //RX_FDEQ_BIN_9 +73 0x1214 //RX_FDEQ_BIN_10 +74 0x1E1E //RX_FDEQ_BIN_11 +75 0x1E1E //RX_FDEQ_BIN_12 +76 0x1E1E //RX_FDEQ_BIN_13 +77 0x1E1E //RX_FDEQ_BIN_14 +78 0x202C //RX_FDEQ_BIN_15 +79 0x0000 //RX_FDEQ_BIN_16 +80 0x0000 //RX_FDEQ_BIN_17 +81 0x0000 //RX_FDEQ_BIN_18 +82 0x0000 //RX_FDEQ_BIN_19 +83 0x0000 //RX_FDEQ_BIN_20 +84 0x0000 //RX_FDEQ_BIN_21 +85 0x0000 //RX_FDEQ_BIN_22 +86 0x0000 //RX_FDEQ_BIN_23 +87 0x4000 //RX_FDEQ_RESRV_0 +88 0x0320 //RX_FDEQ_RESRV_1 +89 0x0018 //RX_FDDRC_BAND_MARGIN_0 +90 0x0030 //RX_FDDRC_BAND_MARGIN_1 +91 0x0050 //RX_FDDRC_BAND_MARGIN_2 +92 0x0080 //RX_FDDRC_BAND_MARGIN_3 +93 0x0007 //RX_FDDRC_BLOCK_EXP +94 0x5000 //RX_FDDRC_THRD_2_0 +95 0x5000 //RX_FDDRC_THRD_2_1 +96 0x5000 //RX_FDDRC_THRD_2_2 +97 0x5000 //RX_FDDRC_THRD_2_3 +98 0x6400 //RX_FDDRC_THRD_3_0 +99 0x6400 //RX_FDDRC_THRD_3_1 +100 0x6400 //RX_FDDRC_THRD_3_2 +101 0x6400 //RX_FDDRC_THRD_3_3 +102 0x2000 //RX_FDDRC_SLANT_0_0 +103 0x2000 //RX_FDDRC_SLANT_0_1 +104 0x2000 //RX_FDDRC_SLANT_0_2 +105 0x2000 //RX_FDDRC_SLANT_0_3 +106 0x5333 //RX_FDDRC_SLANT_1_0 +107 0x5333 //RX_FDDRC_SLANT_1_1 +108 0x5333 //RX_FDDRC_SLANT_1_2 +109 0x5333 //RX_FDDRC_SLANT_1_3 +110 0x0000 //RX_FDDRC_RESRV_0 +129 0x0100 //RX_SPK_VOL +130 0x0000 //RX_VOL_RESRV_0 +#VOL 1 +6 0x1000 //RX_TDDRC_ALPHA_UP_1 +7 0x1000 //RX_TDDRC_ALPHA_UP_2 +8 0x1000 //RX_TDDRC_ALPHA_UP_3 +9 0x1000 //RX_TDDRC_ALPHA_UP_4 +27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +33 0x7000 //RX_TDDRC_LIMITER_THRD +34 0x0800 //RX_TDDRC_LIMITER_GAIN +112 0x0000 //RX_TDDRC_THRD_0 +113 0x0000 //RX_TDDRC_THRD_1 +114 0x1800 //RX_TDDRC_THRD_2 +115 0x1800 //RX_TDDRC_THRD_3 +116 0x3000 //RX_TDDRC_SLANT_0 +117 0x6E00 //RX_TDDRC_SLANT_1 +118 0x1000 //RX_TDDRC_ALPHA_UP_0 +119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +120 0x0000 //RX_TDDRC_HMNC_FLAG +121 0x199A //RX_TDDRC_HMNC_GAIN +122 0x0001 //RX_TDDRC_SMT_FLAG +123 0x0CCD //RX_TDDRC_SMT_W +124 0x01E0 //RX_TDDRC_DRC_GAIN +38 0x0030 //RX_FDEQ_SUBNUM +39 0x4848 //RX_FDEQ_GAIN_0 +40 0x4848 //RX_FDEQ_GAIN_1 +41 0x4844 //RX_FDEQ_GAIN_2 +42 0x4B4D //RX_FDEQ_GAIN_3 +43 0x4E50 //RX_FDEQ_GAIN_4 +44 0x5254 //RX_FDEQ_GAIN_5 +45 0x5658 //RX_FDEQ_GAIN_6 +46 0x5C60 //RX_FDEQ_GAIN_7 +47 0x6468 //RX_FDEQ_GAIN_8 +48 0x6C70 //RX_FDEQ_GAIN_9 +49 0x7474 //RX_FDEQ_GAIN_10 +50 0x7474 //RX_FDEQ_GAIN_11 +51 0x7474 //RX_FDEQ_GAIN_12 +52 0x7474 //RX_FDEQ_GAIN_13 +53 0x7474 //RX_FDEQ_GAIN_14 +54 0x7474 //RX_FDEQ_GAIN_15 +55 0x4848 //RX_FDEQ_GAIN_16 +56 0x4848 //RX_FDEQ_GAIN_17 +57 0x4848 //RX_FDEQ_GAIN_18 +58 0x4848 //RX_FDEQ_GAIN_19 +59 0x4848 //RX_FDEQ_GAIN_20 +60 0x4848 //RX_FDEQ_GAIN_21 +61 0x4848 //RX_FDEQ_GAIN_22 +62 0x4848 //RX_FDEQ_GAIN_23 +63 0x0202 //RX_FDEQ_BIN_0 +64 0x0203 //RX_FDEQ_BIN_1 +65 0x0402 //RX_FDEQ_BIN_2 +66 0x0304 //RX_FDEQ_BIN_3 +67 0x0405 //RX_FDEQ_BIN_4 +68 0x0506 //RX_FDEQ_BIN_5 +69 0x0708 //RX_FDEQ_BIN_6 +70 0x090A //RX_FDEQ_BIN_7 +71 0x0B0C //RX_FDEQ_BIN_8 +72 0x0D0E //RX_FDEQ_BIN_9 +73 0x1214 //RX_FDEQ_BIN_10 +74 0x1E1E //RX_FDEQ_BIN_11 +75 0x1E1E //RX_FDEQ_BIN_12 +76 0x1E1E //RX_FDEQ_BIN_13 +77 0x1E1E //RX_FDEQ_BIN_14 +78 0x202C //RX_FDEQ_BIN_15 +79 0x0000 //RX_FDEQ_BIN_16 +80 0x0000 //RX_FDEQ_BIN_17 +81 0x0000 //RX_FDEQ_BIN_18 +82 0x0000 //RX_FDEQ_BIN_19 +83 0x0000 //RX_FDEQ_BIN_20 +84 0x0000 //RX_FDEQ_BIN_21 +85 0x0000 //RX_FDEQ_BIN_22 +86 0x0000 //RX_FDEQ_BIN_23 +87 0x4000 //RX_FDEQ_RESRV_0 +88 0x0320 //RX_FDEQ_RESRV_1 +89 0x0018 //RX_FDDRC_BAND_MARGIN_0 +90 0x0030 //RX_FDDRC_BAND_MARGIN_1 +91 0x0050 //RX_FDDRC_BAND_MARGIN_2 +92 0x0080 //RX_FDDRC_BAND_MARGIN_3 +93 0x0007 //RX_FDDRC_BLOCK_EXP +94 0x5000 //RX_FDDRC_THRD_2_0 +95 0x5000 //RX_FDDRC_THRD_2_1 +96 0x5000 //RX_FDDRC_THRD_2_2 +97 0x5000 //RX_FDDRC_THRD_2_3 +98 0x6400 //RX_FDDRC_THRD_3_0 +99 0x6400 //RX_FDDRC_THRD_3_1 +100 0x6400 //RX_FDDRC_THRD_3_2 +101 0x6400 //RX_FDDRC_THRD_3_3 +102 0x2000 //RX_FDDRC_SLANT_0_0 +103 0x2000 //RX_FDDRC_SLANT_0_1 +104 0x2000 //RX_FDDRC_SLANT_0_2 +105 0x2000 //RX_FDDRC_SLANT_0_3 +106 0x5333 //RX_FDDRC_SLANT_1_0 +107 0x5333 //RX_FDDRC_SLANT_1_1 +108 0x5333 //RX_FDDRC_SLANT_1_2 +109 0x5333 //RX_FDDRC_SLANT_1_3 +110 0x0000 //RX_FDDRC_RESRV_0 +129 0x0100 //RX_SPK_VOL +130 0x0000 //RX_VOL_RESRV_0 +#VOL 2 +6 0x1000 //RX_TDDRC_ALPHA_UP_1 +7 0x1000 //RX_TDDRC_ALPHA_UP_2 +8 0x1000 //RX_TDDRC_ALPHA_UP_3 +9 0x1000 //RX_TDDRC_ALPHA_UP_4 +27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +33 0x7000 //RX_TDDRC_LIMITER_THRD +34 0x0800 //RX_TDDRC_LIMITER_GAIN +112 0x0000 //RX_TDDRC_THRD_0 +113 0x0000 //RX_TDDRC_THRD_1 +114 0x1800 //RX_TDDRC_THRD_2 +115 0x1800 //RX_TDDRC_THRD_3 +116 0x3000 //RX_TDDRC_SLANT_0 +117 0x6E00 //RX_TDDRC_SLANT_1 +118 0x1000 //RX_TDDRC_ALPHA_UP_0 +119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +120 0x0000 //RX_TDDRC_HMNC_FLAG +121 0x199A //RX_TDDRC_HMNC_GAIN +122 0x0001 //RX_TDDRC_SMT_FLAG +123 0x0CCD //RX_TDDRC_SMT_W +124 0x01E0 //RX_TDDRC_DRC_GAIN +38 0x0030 //RX_FDEQ_SUBNUM +39 0x4848 //RX_FDEQ_GAIN_0 +40 0x4848 //RX_FDEQ_GAIN_1 +41 0x4844 //RX_FDEQ_GAIN_2 +42 0x4B4D //RX_FDEQ_GAIN_3 +43 0x4E50 //RX_FDEQ_GAIN_4 +44 0x5254 //RX_FDEQ_GAIN_5 +45 0x5658 //RX_FDEQ_GAIN_6 +46 0x5C60 //RX_FDEQ_GAIN_7 +47 0x6468 //RX_FDEQ_GAIN_8 +48 0x6C70 //RX_FDEQ_GAIN_9 +49 0x7474 //RX_FDEQ_GAIN_10 +50 0x7474 //RX_FDEQ_GAIN_11 +51 0x7474 //RX_FDEQ_GAIN_12 +52 0x7474 //RX_FDEQ_GAIN_13 +53 0x7474 //RX_FDEQ_GAIN_14 +54 0x7474 //RX_FDEQ_GAIN_15 +55 0x4848 //RX_FDEQ_GAIN_16 +56 0x4848 //RX_FDEQ_GAIN_17 +57 0x4848 //RX_FDEQ_GAIN_18 +58 0x4848 //RX_FDEQ_GAIN_19 +59 0x4848 //RX_FDEQ_GAIN_20 +60 0x4848 //RX_FDEQ_GAIN_21 +61 0x4848 //RX_FDEQ_GAIN_22 +62 0x4848 //RX_FDEQ_GAIN_23 +63 0x0202 //RX_FDEQ_BIN_0 +64 0x0203 //RX_FDEQ_BIN_1 +65 0x0402 //RX_FDEQ_BIN_2 +66 0x0304 //RX_FDEQ_BIN_3 +67 0x0405 //RX_FDEQ_BIN_4 +68 0x0506 //RX_FDEQ_BIN_5 +69 0x0708 //RX_FDEQ_BIN_6 +70 0x090A //RX_FDEQ_BIN_7 +71 0x0B0C //RX_FDEQ_BIN_8 +72 0x0D0E //RX_FDEQ_BIN_9 +73 0x1214 //RX_FDEQ_BIN_10 +74 0x1E1E //RX_FDEQ_BIN_11 +75 0x1E1E //RX_FDEQ_BIN_12 +76 0x1E1E //RX_FDEQ_BIN_13 +77 0x1E1E //RX_FDEQ_BIN_14 +78 0x202C //RX_FDEQ_BIN_15 +79 0x0000 //RX_FDEQ_BIN_16 +80 0x0000 //RX_FDEQ_BIN_17 +81 0x0000 //RX_FDEQ_BIN_18 +82 0x0000 //RX_FDEQ_BIN_19 +83 0x0000 //RX_FDEQ_BIN_20 +84 0x0000 //RX_FDEQ_BIN_21 +85 0x0000 //RX_FDEQ_BIN_22 +86 0x0000 //RX_FDEQ_BIN_23 +87 0x4000 //RX_FDEQ_RESRV_0 +88 0x0320 //RX_FDEQ_RESRV_1 +89 0x0018 //RX_FDDRC_BAND_MARGIN_0 +90 0x0030 //RX_FDDRC_BAND_MARGIN_1 +91 0x0050 //RX_FDDRC_BAND_MARGIN_2 +92 0x0080 //RX_FDDRC_BAND_MARGIN_3 +93 0x0007 //RX_FDDRC_BLOCK_EXP +94 0x5000 //RX_FDDRC_THRD_2_0 +95 0x5000 //RX_FDDRC_THRD_2_1 +96 0x5000 //RX_FDDRC_THRD_2_2 +97 0x5000 //RX_FDDRC_THRD_2_3 +98 0x6400 //RX_FDDRC_THRD_3_0 +99 0x6400 //RX_FDDRC_THRD_3_1 +100 0x6400 //RX_FDDRC_THRD_3_2 +101 0x6400 //RX_FDDRC_THRD_3_3 +102 0x2000 //RX_FDDRC_SLANT_0_0 +103 0x2000 //RX_FDDRC_SLANT_0_1 +104 0x2000 //RX_FDDRC_SLANT_0_2 +105 0x2000 //RX_FDDRC_SLANT_0_3 +106 0x5333 //RX_FDDRC_SLANT_1_0 +107 0x5333 //RX_FDDRC_SLANT_1_1 +108 0x5333 //RX_FDDRC_SLANT_1_2 +109 0x5333 //RX_FDDRC_SLANT_1_3 +110 0x0000 //RX_FDDRC_RESRV_0 +129 0x0100 //RX_SPK_VOL +130 0x0000 //RX_VOL_RESRV_0 +#VOL 3 +6 0x1000 //RX_TDDRC_ALPHA_UP_1 +7 0x1000 //RX_TDDRC_ALPHA_UP_2 +8 0x1000 //RX_TDDRC_ALPHA_UP_3 +9 0x1000 //RX_TDDRC_ALPHA_UP_4 +27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +33 0x7000 //RX_TDDRC_LIMITER_THRD +34 0x0800 //RX_TDDRC_LIMITER_GAIN +112 0x0000 //RX_TDDRC_THRD_0 +113 0x0000 //RX_TDDRC_THRD_1 +114 0x1800 //RX_TDDRC_THRD_2 +115 0x1800 //RX_TDDRC_THRD_3 +116 0x3000 //RX_TDDRC_SLANT_0 +117 0x6E00 //RX_TDDRC_SLANT_1 +118 0x1000 //RX_TDDRC_ALPHA_UP_0 +119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +120 0x0000 //RX_TDDRC_HMNC_FLAG +121 0x199A //RX_TDDRC_HMNC_GAIN +122 0x0001 //RX_TDDRC_SMT_FLAG +123 0x0CCD //RX_TDDRC_SMT_W +124 0x01E0 //RX_TDDRC_DRC_GAIN +38 0x0030 //RX_FDEQ_SUBNUM +39 0x4848 //RX_FDEQ_GAIN_0 +40 0x4848 //RX_FDEQ_GAIN_1 +41 0x4844 //RX_FDEQ_GAIN_2 +42 0x4B4D //RX_FDEQ_GAIN_3 +43 0x4E50 //RX_FDEQ_GAIN_4 +44 0x5254 //RX_FDEQ_GAIN_5 +45 0x5658 //RX_FDEQ_GAIN_6 +46 0x5C60 //RX_FDEQ_GAIN_7 +47 0x6468 //RX_FDEQ_GAIN_8 +48 0x6C70 //RX_FDEQ_GAIN_9 +49 0x7474 //RX_FDEQ_GAIN_10 +50 0x7474 //RX_FDEQ_GAIN_11 +51 0x7474 //RX_FDEQ_GAIN_12 +52 0x7474 //RX_FDEQ_GAIN_13 +53 0x7474 //RX_FDEQ_GAIN_14 +54 0x7474 //RX_FDEQ_GAIN_15 +55 0x4848 //RX_FDEQ_GAIN_16 +56 0x4848 //RX_FDEQ_GAIN_17 +57 0x4848 //RX_FDEQ_GAIN_18 +58 0x4848 //RX_FDEQ_GAIN_19 +59 0x4848 //RX_FDEQ_GAIN_20 +60 0x4848 //RX_FDEQ_GAIN_21 +61 0x4848 //RX_FDEQ_GAIN_22 +62 0x4848 //RX_FDEQ_GAIN_23 +63 0x0202 //RX_FDEQ_BIN_0 +64 0x0203 //RX_FDEQ_BIN_1 +65 0x0402 //RX_FDEQ_BIN_2 +66 0x0304 //RX_FDEQ_BIN_3 +67 0x0405 //RX_FDEQ_BIN_4 +68 0x0506 //RX_FDEQ_BIN_5 +69 0x0708 //RX_FDEQ_BIN_6 +70 0x090A //RX_FDEQ_BIN_7 +71 0x0B0C //RX_FDEQ_BIN_8 +72 0x0D0E //RX_FDEQ_BIN_9 +73 0x1214 //RX_FDEQ_BIN_10 +74 0x1E1E //RX_FDEQ_BIN_11 +75 0x1E1E //RX_FDEQ_BIN_12 +76 0x1E1E //RX_FDEQ_BIN_13 +77 0x1E1E //RX_FDEQ_BIN_14 +78 0x202C //RX_FDEQ_BIN_15 +79 0x0000 //RX_FDEQ_BIN_16 +80 0x0000 //RX_FDEQ_BIN_17 +81 0x0000 //RX_FDEQ_BIN_18 +82 0x0000 //RX_FDEQ_BIN_19 +83 0x0000 //RX_FDEQ_BIN_20 +84 0x0000 //RX_FDEQ_BIN_21 +85 0x0000 //RX_FDEQ_BIN_22 +86 0x0000 //RX_FDEQ_BIN_23 +87 0x4000 //RX_FDEQ_RESRV_0 +88 0x0320 //RX_FDEQ_RESRV_1 +89 0x0018 //RX_FDDRC_BAND_MARGIN_0 +90 0x0030 //RX_FDDRC_BAND_MARGIN_1 +91 0x0050 //RX_FDDRC_BAND_MARGIN_2 +92 0x0080 //RX_FDDRC_BAND_MARGIN_3 +93 0x0007 //RX_FDDRC_BLOCK_EXP +94 0x5000 //RX_FDDRC_THRD_2_0 +95 0x5000 //RX_FDDRC_THRD_2_1 +96 0x5000 //RX_FDDRC_THRD_2_2 +97 0x5000 //RX_FDDRC_THRD_2_3 +98 0x6400 //RX_FDDRC_THRD_3_0 +99 0x6400 //RX_FDDRC_THRD_3_1 +100 0x6400 //RX_FDDRC_THRD_3_2 +101 0x6400 //RX_FDDRC_THRD_3_3 +102 0x2000 //RX_FDDRC_SLANT_0_0 +103 0x2000 //RX_FDDRC_SLANT_0_1 +104 0x2000 //RX_FDDRC_SLANT_0_2 +105 0x2000 //RX_FDDRC_SLANT_0_3 +106 0x5333 //RX_FDDRC_SLANT_1_0 +107 0x5333 //RX_FDDRC_SLANT_1_1 +108 0x5333 //RX_FDDRC_SLANT_1_2 +109 0x5333 //RX_FDDRC_SLANT_1_3 +110 0x0000 //RX_FDDRC_RESRV_0 +129 0x0100 //RX_SPK_VOL +130 0x0000 //RX_VOL_RESRV_0 +#VOL 4 +6 0x1000 //RX_TDDRC_ALPHA_UP_1 +7 0x1000 //RX_TDDRC_ALPHA_UP_2 +8 0x1000 //RX_TDDRC_ALPHA_UP_3 +9 0x1000 //RX_TDDRC_ALPHA_UP_4 +27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +33 0x7000 //RX_TDDRC_LIMITER_THRD +34 0x0800 //RX_TDDRC_LIMITER_GAIN +112 0x0000 //RX_TDDRC_THRD_0 +113 0x0000 //RX_TDDRC_THRD_1 +114 0x1800 //RX_TDDRC_THRD_2 +115 0x1800 //RX_TDDRC_THRD_3 +116 0x3000 //RX_TDDRC_SLANT_0 +117 0x6E00 //RX_TDDRC_SLANT_1 +118 0x1000 //RX_TDDRC_ALPHA_UP_0 +119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +120 0x0000 //RX_TDDRC_HMNC_FLAG +121 0x199A //RX_TDDRC_HMNC_GAIN +122 0x0001 //RX_TDDRC_SMT_FLAG +123 0x0CCD //RX_TDDRC_SMT_W +124 0x01E0 //RX_TDDRC_DRC_GAIN +38 0x0030 //RX_FDEQ_SUBNUM +39 0x4848 //RX_FDEQ_GAIN_0 +40 0x4848 //RX_FDEQ_GAIN_1 +41 0x4844 //RX_FDEQ_GAIN_2 +42 0x4B4D //RX_FDEQ_GAIN_3 +43 0x4E50 //RX_FDEQ_GAIN_4 +44 0x5254 //RX_FDEQ_GAIN_5 +45 0x5658 //RX_FDEQ_GAIN_6 +46 0x5C60 //RX_FDEQ_GAIN_7 +47 0x6468 //RX_FDEQ_GAIN_8 +48 0x6C70 //RX_FDEQ_GAIN_9 +49 0x7474 //RX_FDEQ_GAIN_10 +50 0x7474 //RX_FDEQ_GAIN_11 +51 0x7474 //RX_FDEQ_GAIN_12 +52 0x7474 //RX_FDEQ_GAIN_13 +53 0x7474 //RX_FDEQ_GAIN_14 +54 0x7474 //RX_FDEQ_GAIN_15 +55 0x4848 //RX_FDEQ_GAIN_16 +56 0x4848 //RX_FDEQ_GAIN_17 +57 0x4848 //RX_FDEQ_GAIN_18 +58 0x4848 //RX_FDEQ_GAIN_19 +59 0x4848 //RX_FDEQ_GAIN_20 +60 0x4848 //RX_FDEQ_GAIN_21 +61 0x4848 //RX_FDEQ_GAIN_22 +62 0x4848 //RX_FDEQ_GAIN_23 +63 0x0202 //RX_FDEQ_BIN_0 +64 0x0203 //RX_FDEQ_BIN_1 +65 0x0402 //RX_FDEQ_BIN_2 +66 0x0304 //RX_FDEQ_BIN_3 +67 0x0405 //RX_FDEQ_BIN_4 +68 0x0506 //RX_FDEQ_BIN_5 +69 0x0708 //RX_FDEQ_BIN_6 +70 0x090A //RX_FDEQ_BIN_7 +71 0x0B0C //RX_FDEQ_BIN_8 +72 0x0D0E //RX_FDEQ_BIN_9 +73 0x1214 //RX_FDEQ_BIN_10 +74 0x1E1E //RX_FDEQ_BIN_11 +75 0x1E1E //RX_FDEQ_BIN_12 +76 0x1E1E //RX_FDEQ_BIN_13 +77 0x1E1E //RX_FDEQ_BIN_14 +78 0x202C //RX_FDEQ_BIN_15 +79 0x0000 //RX_FDEQ_BIN_16 +80 0x0000 //RX_FDEQ_BIN_17 +81 0x0000 //RX_FDEQ_BIN_18 +82 0x0000 //RX_FDEQ_BIN_19 +83 0x0000 //RX_FDEQ_BIN_20 +84 0x0000 //RX_FDEQ_BIN_21 +85 0x0000 //RX_FDEQ_BIN_22 +86 0x0000 //RX_FDEQ_BIN_23 +87 0x4000 //RX_FDEQ_RESRV_0 +88 0x0320 //RX_FDEQ_RESRV_1 +89 0x0018 //RX_FDDRC_BAND_MARGIN_0 +90 0x0030 //RX_FDDRC_BAND_MARGIN_1 +91 0x0050 //RX_FDDRC_BAND_MARGIN_2 +92 0x0080 //RX_FDDRC_BAND_MARGIN_3 +93 0x0007 //RX_FDDRC_BLOCK_EXP +94 0x5000 //RX_FDDRC_THRD_2_0 +95 0x5000 //RX_FDDRC_THRD_2_1 +96 0x5000 //RX_FDDRC_THRD_2_2 +97 0x5000 //RX_FDDRC_THRD_2_3 +98 0x6400 //RX_FDDRC_THRD_3_0 +99 0x6400 //RX_FDDRC_THRD_3_1 +100 0x6400 //RX_FDDRC_THRD_3_2 +101 0x6400 //RX_FDDRC_THRD_3_3 +102 0x2000 //RX_FDDRC_SLANT_0_0 +103 0x2000 //RX_FDDRC_SLANT_0_1 +104 0x2000 //RX_FDDRC_SLANT_0_2 +105 0x2000 //RX_FDDRC_SLANT_0_3 +106 0x5333 //RX_FDDRC_SLANT_1_0 +107 0x5333 //RX_FDDRC_SLANT_1_1 +108 0x5333 //RX_FDDRC_SLANT_1_2 +109 0x5333 //RX_FDDRC_SLANT_1_3 +110 0x0000 //RX_FDDRC_RESRV_0 +129 0x0100 //RX_SPK_VOL +130 0x0000 //RX_VOL_RESRV_0 +#VOL 5 +6 0x1000 //RX_TDDRC_ALPHA_UP_1 +7 0x1000 //RX_TDDRC_ALPHA_UP_2 +8 0x1000 //RX_TDDRC_ALPHA_UP_3 +9 0x1000 //RX_TDDRC_ALPHA_UP_4 +27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +33 0x7000 //RX_TDDRC_LIMITER_THRD +34 0x0800 //RX_TDDRC_LIMITER_GAIN +112 0x0000 //RX_TDDRC_THRD_0 +113 0x0000 //RX_TDDRC_THRD_1 +114 0x1800 //RX_TDDRC_THRD_2 +115 0x1800 //RX_TDDRC_THRD_3 +116 0x3000 //RX_TDDRC_SLANT_0 +117 0x6E00 //RX_TDDRC_SLANT_1 +118 0x1000 //RX_TDDRC_ALPHA_UP_0 +119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +120 0x0000 //RX_TDDRC_HMNC_FLAG +121 0x199A //RX_TDDRC_HMNC_GAIN +122 0x0001 //RX_TDDRC_SMT_FLAG +123 0x0CCD //RX_TDDRC_SMT_W +124 0x01E0 //RX_TDDRC_DRC_GAIN +38 0x0030 //RX_FDEQ_SUBNUM +39 0x4848 //RX_FDEQ_GAIN_0 +40 0x4848 //RX_FDEQ_GAIN_1 +41 0x4844 //RX_FDEQ_GAIN_2 +42 0x4B4D //RX_FDEQ_GAIN_3 +43 0x4E50 //RX_FDEQ_GAIN_4 +44 0x5254 //RX_FDEQ_GAIN_5 +45 0x5658 //RX_FDEQ_GAIN_6 +46 0x5C60 //RX_FDEQ_GAIN_7 +47 0x6468 //RX_FDEQ_GAIN_8 +48 0x6C70 //RX_FDEQ_GAIN_9 +49 0x7474 //RX_FDEQ_GAIN_10 +50 0x7474 //RX_FDEQ_GAIN_11 +51 0x7474 //RX_FDEQ_GAIN_12 +52 0x7474 //RX_FDEQ_GAIN_13 +53 0x7474 //RX_FDEQ_GAIN_14 +54 0x7474 //RX_FDEQ_GAIN_15 +55 0x4848 //RX_FDEQ_GAIN_16 +56 0x4848 //RX_FDEQ_GAIN_17 +57 0x4848 //RX_FDEQ_GAIN_18 +58 0x4848 //RX_FDEQ_GAIN_19 +59 0x4848 //RX_FDEQ_GAIN_20 +60 0x4848 //RX_FDEQ_GAIN_21 +61 0x4848 //RX_FDEQ_GAIN_22 +62 0x4848 //RX_FDEQ_GAIN_23 +63 0x0202 //RX_FDEQ_BIN_0 +64 0x0203 //RX_FDEQ_BIN_1 +65 0x0402 //RX_FDEQ_BIN_2 +66 0x0304 //RX_FDEQ_BIN_3 +67 0x0405 //RX_FDEQ_BIN_4 +68 0x0506 //RX_FDEQ_BIN_5 +69 0x0708 //RX_FDEQ_BIN_6 +70 0x090A //RX_FDEQ_BIN_7 +71 0x0B0C //RX_FDEQ_BIN_8 +72 0x0D0E //RX_FDEQ_BIN_9 +73 0x1214 //RX_FDEQ_BIN_10 +74 0x1E1E //RX_FDEQ_BIN_11 +75 0x1E1E //RX_FDEQ_BIN_12 +76 0x1E1E //RX_FDEQ_BIN_13 +77 0x1E1E //RX_FDEQ_BIN_14 +78 0x202C //RX_FDEQ_BIN_15 +79 0x0000 //RX_FDEQ_BIN_16 +80 0x0000 //RX_FDEQ_BIN_17 +81 0x0000 //RX_FDEQ_BIN_18 +82 0x0000 //RX_FDEQ_BIN_19 +83 0x0000 //RX_FDEQ_BIN_20 +84 0x0000 //RX_FDEQ_BIN_21 +85 0x0000 //RX_FDEQ_BIN_22 +86 0x0000 //RX_FDEQ_BIN_23 +87 0x4000 //RX_FDEQ_RESRV_0 +88 0x0320 //RX_FDEQ_RESRV_1 +89 0x0018 //RX_FDDRC_BAND_MARGIN_0 +90 0x0030 //RX_FDDRC_BAND_MARGIN_1 +91 0x0050 //RX_FDDRC_BAND_MARGIN_2 +92 0x0080 //RX_FDDRC_BAND_MARGIN_3 +93 0x0007 //RX_FDDRC_BLOCK_EXP +94 0x5000 //RX_FDDRC_THRD_2_0 +95 0x5000 //RX_FDDRC_THRD_2_1 +96 0x5000 //RX_FDDRC_THRD_2_2 +97 0x5000 //RX_FDDRC_THRD_2_3 +98 0x6400 //RX_FDDRC_THRD_3_0 +99 0x6400 //RX_FDDRC_THRD_3_1 +100 0x6400 //RX_FDDRC_THRD_3_2 +101 0x6400 //RX_FDDRC_THRD_3_3 +102 0x2000 //RX_FDDRC_SLANT_0_0 +103 0x2000 //RX_FDDRC_SLANT_0_1 +104 0x2000 //RX_FDDRC_SLANT_0_2 +105 0x2000 //RX_FDDRC_SLANT_0_3 +106 0x5333 //RX_FDDRC_SLANT_1_0 +107 0x5333 //RX_FDDRC_SLANT_1_1 +108 0x5333 //RX_FDDRC_SLANT_1_2 +109 0x5333 //RX_FDDRC_SLANT_1_3 +110 0x0000 //RX_FDDRC_RESRV_0 +129 0x0100 //RX_SPK_VOL +130 0x0000 //RX_VOL_RESRV_0 +#VOL 6 +6 0x1000 //RX_TDDRC_ALPHA_UP_1 +7 0x1000 //RX_TDDRC_ALPHA_UP_2 +8 0x1000 //RX_TDDRC_ALPHA_UP_3 +9 0x1000 //RX_TDDRC_ALPHA_UP_4 +27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +33 0x7000 //RX_TDDRC_LIMITER_THRD +34 0x0800 //RX_TDDRC_LIMITER_GAIN +112 0x0000 //RX_TDDRC_THRD_0 +113 0x0000 //RX_TDDRC_THRD_1 +114 0x1800 //RX_TDDRC_THRD_2 +115 0x1800 //RX_TDDRC_THRD_3 +116 0x3000 //RX_TDDRC_SLANT_0 +117 0x6E00 //RX_TDDRC_SLANT_1 +118 0x1000 //RX_TDDRC_ALPHA_UP_0 +119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +120 0x0000 //RX_TDDRC_HMNC_FLAG +121 0x199A //RX_TDDRC_HMNC_GAIN +122 0x0001 //RX_TDDRC_SMT_FLAG +123 0x0CCD //RX_TDDRC_SMT_W +124 0x01E0 //RX_TDDRC_DRC_GAIN +38 0x0030 //RX_FDEQ_SUBNUM +39 0x4848 //RX_FDEQ_GAIN_0 +40 0x4848 //RX_FDEQ_GAIN_1 +41 0x4844 //RX_FDEQ_GAIN_2 +42 0x4B4D //RX_FDEQ_GAIN_3 +43 0x4E50 //RX_FDEQ_GAIN_4 +44 0x5254 //RX_FDEQ_GAIN_5 +45 0x5658 //RX_FDEQ_GAIN_6 +46 0x5C60 //RX_FDEQ_GAIN_7 +47 0x6468 //RX_FDEQ_GAIN_8 +48 0x6C70 //RX_FDEQ_GAIN_9 +49 0x7474 //RX_FDEQ_GAIN_10 +50 0x7474 //RX_FDEQ_GAIN_11 +51 0x7474 //RX_FDEQ_GAIN_12 +52 0x7474 //RX_FDEQ_GAIN_13 +53 0x7474 //RX_FDEQ_GAIN_14 +54 0x7474 //RX_FDEQ_GAIN_15 +55 0x4848 //RX_FDEQ_GAIN_16 +56 0x4848 //RX_FDEQ_GAIN_17 +57 0x4848 //RX_FDEQ_GAIN_18 +58 0x4848 //RX_FDEQ_GAIN_19 +59 0x4848 //RX_FDEQ_GAIN_20 +60 0x4848 //RX_FDEQ_GAIN_21 +61 0x4848 //RX_FDEQ_GAIN_22 +62 0x4848 //RX_FDEQ_GAIN_23 +63 0x0202 //RX_FDEQ_BIN_0 +64 0x0203 //RX_FDEQ_BIN_1 +65 0x0402 //RX_FDEQ_BIN_2 +66 0x0304 //RX_FDEQ_BIN_3 +67 0x0405 //RX_FDEQ_BIN_4 +68 0x0506 //RX_FDEQ_BIN_5 +69 0x0708 //RX_FDEQ_BIN_6 +70 0x090A //RX_FDEQ_BIN_7 +71 0x0B0C //RX_FDEQ_BIN_8 +72 0x0D0E //RX_FDEQ_BIN_9 +73 0x1214 //RX_FDEQ_BIN_10 +74 0x1E1E //RX_FDEQ_BIN_11 +75 0x1E1E //RX_FDEQ_BIN_12 +76 0x1E1E //RX_FDEQ_BIN_13 +77 0x1E1E //RX_FDEQ_BIN_14 +78 0x202C //RX_FDEQ_BIN_15 +79 0x0000 //RX_FDEQ_BIN_16 +80 0x0000 //RX_FDEQ_BIN_17 +81 0x0000 //RX_FDEQ_BIN_18 +82 0x0000 //RX_FDEQ_BIN_19 +83 0x0000 //RX_FDEQ_BIN_20 +84 0x0000 //RX_FDEQ_BIN_21 +85 0x0000 //RX_FDEQ_BIN_22 +86 0x0000 //RX_FDEQ_BIN_23 +87 0x4000 //RX_FDEQ_RESRV_0 +88 0x0320 //RX_FDEQ_RESRV_1 +89 0x0018 //RX_FDDRC_BAND_MARGIN_0 +90 0x0030 //RX_FDDRC_BAND_MARGIN_1 +91 0x0050 //RX_FDDRC_BAND_MARGIN_2 +92 0x0080 //RX_FDDRC_BAND_MARGIN_3 +93 0x0007 //RX_FDDRC_BLOCK_EXP +94 0x5000 //RX_FDDRC_THRD_2_0 +95 0x5000 //RX_FDDRC_THRD_2_1 +96 0x5000 //RX_FDDRC_THRD_2_2 +97 0x5000 //RX_FDDRC_THRD_2_3 +98 0x6400 //RX_FDDRC_THRD_3_0 +99 0x6400 //RX_FDDRC_THRD_3_1 +100 0x6400 //RX_FDDRC_THRD_3_2 +101 0x6400 //RX_FDDRC_THRD_3_3 +102 0x2000 //RX_FDDRC_SLANT_0_0 +103 0x2000 //RX_FDDRC_SLANT_0_1 +104 0x2000 //RX_FDDRC_SLANT_0_2 +105 0x2000 //RX_FDDRC_SLANT_0_3 +106 0x5333 //RX_FDDRC_SLANT_1_0 +107 0x5333 //RX_FDDRC_SLANT_1_1 +108 0x5333 //RX_FDDRC_SLANT_1_2 +109 0x5333 //RX_FDDRC_SLANT_1_3 +110 0x0000 //RX_FDDRC_RESRV_0 +129 0x0100 //RX_SPK_VOL +130 0x0000 //RX_VOL_RESRV_0 +#RX 2 +157 0x000C //RX_RECVFUNC_MODE_0 +158 0x0000 //RX_RECVFUNC_MODE_1 +159 0x0003 //RX_SAMPLINGFREQ_SIG +160 0x0003 //RX_SAMPLINGFREQ_PROC +161 0x000A //RX_FRAME_SZ +162 0x0000 //RX_DELAY_OPT +163 0x1000 //RX_TDDRC_ALPHA_UP_1 +164 0x1000 //RX_TDDRC_ALPHA_UP_2 +165 0x1000 //RX_TDDRC_ALPHA_UP_3 +166 0x1000 //RX_TDDRC_ALPHA_UP_4 +167 0x0800 //RX_PGA +168 0x7FFF //RX_A_HP +169 0x4000 //RX_B_PE +170 0x5800 //RX_THR_PITCH_DET_0 +171 0x5000 //RX_THR_PITCH_DET_1 +172 0x4000 //RX_THR_PITCH_DET_2 +173 0x0008 //RX_PITCH_BFR_LEN +174 0x0003 //RX_SBD_PITCH_DET +175 0x0100 //RX_PP_RESRV_0 +176 0x0020 //RX_PP_RESRV_1 +177 0x0600 //RX_N_SN_EST +178 0x000C //RX_N2_SN_EST +179 0x000F //RX_NS_LVL_CTRL +180 0xF800 //RX_THR_SN_EST +181 0x7E00 //RX_LAMBDA_PFILT +182 0x000A //RX_FENS_RESRV_0 +183 0x0190 //RX_FENS_RESRV_1 +184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +187 0x0002 //RX_EXTRA_NS_L +188 0x0800 //RX_EXTRA_NS_A +189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +190 0x7000 //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +192 0x199A //RX_A_POST_FLT +193 0x0000 //RX_LMT_THRD +194 0x4000 //RX_LMT_ALPHA +195 0x0030 //RX_FDEQ_SUBNUM +196 0x4848 //RX_FDEQ_GAIN_0 +197 0x4848 //RX_FDEQ_GAIN_1 +198 0x4844 //RX_FDEQ_GAIN_2 +199 0x4B4D //RX_FDEQ_GAIN_3 +200 0x4E50 //RX_FDEQ_GAIN_4 +201 0x5254 //RX_FDEQ_GAIN_5 +202 0x5658 //RX_FDEQ_GAIN_6 +203 0x5C60 //RX_FDEQ_GAIN_7 +204 0x6468 //RX_FDEQ_GAIN_8 +205 0x6C70 //RX_FDEQ_GAIN_9 +206 0x7474 //RX_FDEQ_GAIN_10 +207 0x7474 //RX_FDEQ_GAIN_11 +208 0x7474 //RX_FDEQ_GAIN_12 +209 0x7474 //RX_FDEQ_GAIN_13 +210 0x7474 //RX_FDEQ_GAIN_14 +211 0x7474 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0202 //RX_FDEQ_BIN_0 +221 0x0203 //RX_FDEQ_BIN_1 +222 0x0402 //RX_FDEQ_BIN_2 +223 0x0304 //RX_FDEQ_BIN_3 +224 0x0405 //RX_FDEQ_BIN_4 +225 0x0506 //RX_FDEQ_BIN_5 +226 0x0708 //RX_FDEQ_BIN_6 +227 0x090A //RX_FDEQ_BIN_7 +228 0x0B0C //RX_FDEQ_BIN_8 +229 0x0D0E //RX_FDEQ_BIN_9 +230 0x1214 //RX_FDEQ_BIN_10 +231 0x1E1E //RX_FDEQ_BIN_11 +232 0x1E1E //RX_FDEQ_BIN_12 +233 0x1E1E //RX_FDEQ_BIN_13 +234 0x1E1E //RX_FDEQ_BIN_14 +235 0x202C //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x4000 //RX_FDEQ_RESRV_0 +245 0x0320 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0030 //RX_FDDRC_BAND_MARGIN_1 +248 0x0050 //RX_FDDRC_BAND_MARGIN_2 +249 0x0080 //RX_FDDRC_BAND_MARGIN_3 +250 0x0007 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x5000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x6400 //RX_FDDRC_THRD_3_2 +258 0x6400 //RX_FDDRC_THRD_3_3 +259 0x2000 //RX_FDDRC_SLANT_0_0 +260 0x2000 //RX_FDDRC_SLANT_0_1 +261 0x2000 //RX_FDDRC_SLANT_0_2 +262 0x2000 //RX_FDDRC_SLANT_0_3 +263 0x5333 //RX_FDDRC_SLANT_1_0 +264 0x5333 //RX_FDDRC_SLANT_1_1 +265 0x5333 //RX_FDDRC_SLANT_1_2 +266 0x5333 //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +268 0x0002 //RX_FILTINDX +269 0x0000 //RX_TDDRC_THRD_0 +270 0x0000 //RX_TDDRC_THRD_1 +271 0x1800 //RX_TDDRC_THRD_2 +272 0x1800 //RX_TDDRC_THRD_3 +273 0x3000 //RX_TDDRC_SLANT_0 +274 0x6E00 //RX_TDDRC_SLANT_1 +275 0x1000 //RX_TDDRC_ALPHA_UP_0 +276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x199A //RX_TDDRC_HMNC_GAIN +279 0x0001 //RX_TDDRC_SMT_FLAG +280 0x0CCD //RX_TDDRC_SMT_W +281 0x01E0 //RX_TDDRC_DRC_GAIN +282 0x7C00 //RX_LAMBDA_PKA_FP +283 0x2000 //RX_TPKA_FP +284 0x2000 //RX_MIN_G_FP +285 0x0080 //RX_MAX_G_FP +286 0x0100 //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 +288 0x0000 //RX_MAXLEVEL_CNG +289 0x3000 //RX_BWE_UV_TH +290 0x3000 //RX_BWE_UV_TH2 +291 0x1800 //RX_BWE_UV_TH3 +292 0x1000 //RX_BWE_V_TH +293 0x04CD //RX_BWE_GAIN1_V_TH1 +294 0x0F33 //RX_BWE_GAIN1_V_TH2 +295 0x7333 //RX_BWE_UV_EQ +296 0x199A //RX_BWE_V_EQ +297 0x7333 //RX_BWE_TONE_TH +298 0x0004 //RX_BWE_UV_HOLD_T +299 0x6CCD //RX_BWE_GAIN2_ALPHA +300 0x799A //RX_BWE_GAIN3_ALPHA +301 0x001E //RX_BWE_CUTOFF +302 0x3000 //RX_BWE_GAINFILL +303 0x3200 //RX_BWE_MAXTH_TONE +304 0x2000 //RX_BWE_EQ_0 +305 0x2000 //RX_BWE_EQ_1 +306 0x2000 //RX_BWE_EQ_2 +307 0x2000 //RX_BWE_EQ_3 +308 0x2000 //RX_BWE_EQ_4 +309 0x2000 //RX_BWE_EQ_5 +310 0x2000 //RX_BWE_EQ_6 +311 0x0000 //RX_BWE_RESRV_0 +312 0x0000 //RX_BWE_RESRV_1 +313 0x0000 //RX_BWE_RESRV_2 +#VOL 0 +163 0x1000 //RX_TDDRC_ALPHA_UP_1 +164 0x1000 //RX_TDDRC_ALPHA_UP_2 +165 0x1000 //RX_TDDRC_ALPHA_UP_3 +166 0x1000 //RX_TDDRC_ALPHA_UP_4 +184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +190 0x7000 //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +269 0x0000 //RX_TDDRC_THRD_0 +270 0x0000 //RX_TDDRC_THRD_1 +271 0x1800 //RX_TDDRC_THRD_2 +272 0x1800 //RX_TDDRC_THRD_3 +273 0x3000 //RX_TDDRC_SLANT_0 +274 0x6E00 //RX_TDDRC_SLANT_1 +275 0x1000 //RX_TDDRC_ALPHA_UP_0 +276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x199A //RX_TDDRC_HMNC_GAIN +279 0x0001 //RX_TDDRC_SMT_FLAG +280 0x0CCD //RX_TDDRC_SMT_W +281 0x01E0 //RX_TDDRC_DRC_GAIN +195 0x0030 //RX_FDEQ_SUBNUM +196 0x4848 //RX_FDEQ_GAIN_0 +197 0x4848 //RX_FDEQ_GAIN_1 +198 0x4844 //RX_FDEQ_GAIN_2 +199 0x4B4D //RX_FDEQ_GAIN_3 +200 0x4E50 //RX_FDEQ_GAIN_4 +201 0x5254 //RX_FDEQ_GAIN_5 +202 0x5658 //RX_FDEQ_GAIN_6 +203 0x5C60 //RX_FDEQ_GAIN_7 +204 0x6468 //RX_FDEQ_GAIN_8 +205 0x6C70 //RX_FDEQ_GAIN_9 +206 0x7474 //RX_FDEQ_GAIN_10 +207 0x7474 //RX_FDEQ_GAIN_11 +208 0x7474 //RX_FDEQ_GAIN_12 +209 0x7474 //RX_FDEQ_GAIN_13 +210 0x7474 //RX_FDEQ_GAIN_14 +211 0x7474 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0202 //RX_FDEQ_BIN_0 +221 0x0203 //RX_FDEQ_BIN_1 +222 0x0402 //RX_FDEQ_BIN_2 +223 0x0304 //RX_FDEQ_BIN_3 +224 0x0405 //RX_FDEQ_BIN_4 +225 0x0506 //RX_FDEQ_BIN_5 +226 0x0708 //RX_FDEQ_BIN_6 +227 0x090A //RX_FDEQ_BIN_7 +228 0x0B0C //RX_FDEQ_BIN_8 +229 0x0D0E //RX_FDEQ_BIN_9 +230 0x1214 //RX_FDEQ_BIN_10 +231 0x1E1E //RX_FDEQ_BIN_11 +232 0x1E1E //RX_FDEQ_BIN_12 +233 0x1E1E //RX_FDEQ_BIN_13 +234 0x1E1E //RX_FDEQ_BIN_14 +235 0x202C //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x4000 //RX_FDEQ_RESRV_0 +245 0x0320 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0030 //RX_FDDRC_BAND_MARGIN_1 +248 0x0050 //RX_FDDRC_BAND_MARGIN_2 +249 0x0080 //RX_FDDRC_BAND_MARGIN_3 +250 0x0007 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x5000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x6400 //RX_FDDRC_THRD_3_2 +258 0x6400 //RX_FDDRC_THRD_3_3 +259 0x2000 //RX_FDDRC_SLANT_0_0 +260 0x2000 //RX_FDDRC_SLANT_0_1 +261 0x2000 //RX_FDDRC_SLANT_0_2 +262 0x2000 //RX_FDDRC_SLANT_0_3 +263 0x5333 //RX_FDDRC_SLANT_1_0 +264 0x5333 //RX_FDDRC_SLANT_1_1 +265 0x5333 //RX_FDDRC_SLANT_1_2 +266 0x5333 //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +286 0x0100 //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 +#VOL 1 +163 0x1000 //RX_TDDRC_ALPHA_UP_1 +164 0x1000 //RX_TDDRC_ALPHA_UP_2 +165 0x1000 //RX_TDDRC_ALPHA_UP_3 +166 0x1000 //RX_TDDRC_ALPHA_UP_4 +184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +190 0x7000 //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +269 0x0000 //RX_TDDRC_THRD_0 +270 0x0000 //RX_TDDRC_THRD_1 +271 0x1800 //RX_TDDRC_THRD_2 +272 0x1800 //RX_TDDRC_THRD_3 +273 0x3000 //RX_TDDRC_SLANT_0 +274 0x6E00 //RX_TDDRC_SLANT_1 +275 0x1000 //RX_TDDRC_ALPHA_UP_0 +276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x199A //RX_TDDRC_HMNC_GAIN +279 0x0001 //RX_TDDRC_SMT_FLAG +280 0x0CCD //RX_TDDRC_SMT_W +281 0x01E0 //RX_TDDRC_DRC_GAIN +195 0x0030 //RX_FDEQ_SUBNUM +196 0x4848 //RX_FDEQ_GAIN_0 +197 0x4848 //RX_FDEQ_GAIN_1 +198 0x4844 //RX_FDEQ_GAIN_2 +199 0x4B4D //RX_FDEQ_GAIN_3 +200 0x4E50 //RX_FDEQ_GAIN_4 +201 0x5254 //RX_FDEQ_GAIN_5 +202 0x5658 //RX_FDEQ_GAIN_6 +203 0x5C60 //RX_FDEQ_GAIN_7 +204 0x6468 //RX_FDEQ_GAIN_8 +205 0x6C70 //RX_FDEQ_GAIN_9 +206 0x7474 //RX_FDEQ_GAIN_10 +207 0x7474 //RX_FDEQ_GAIN_11 +208 0x7474 //RX_FDEQ_GAIN_12 +209 0x7474 //RX_FDEQ_GAIN_13 +210 0x7474 //RX_FDEQ_GAIN_14 +211 0x7474 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0202 //RX_FDEQ_BIN_0 +221 0x0203 //RX_FDEQ_BIN_1 +222 0x0402 //RX_FDEQ_BIN_2 +223 0x0304 //RX_FDEQ_BIN_3 +224 0x0405 //RX_FDEQ_BIN_4 +225 0x0506 //RX_FDEQ_BIN_5 +226 0x0708 //RX_FDEQ_BIN_6 +227 0x090A //RX_FDEQ_BIN_7 +228 0x0B0C //RX_FDEQ_BIN_8 +229 0x0D0E //RX_FDEQ_BIN_9 +230 0x1214 //RX_FDEQ_BIN_10 +231 0x1E1E //RX_FDEQ_BIN_11 +232 0x1E1E //RX_FDEQ_BIN_12 +233 0x1E1E //RX_FDEQ_BIN_13 +234 0x1E1E //RX_FDEQ_BIN_14 +235 0x202C //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x4000 //RX_FDEQ_RESRV_0 +245 0x0320 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0030 //RX_FDDRC_BAND_MARGIN_1 +248 0x0050 //RX_FDDRC_BAND_MARGIN_2 +249 0x0080 //RX_FDDRC_BAND_MARGIN_3 +250 0x0007 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x5000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x6400 //RX_FDDRC_THRD_3_2 +258 0x6400 //RX_FDDRC_THRD_3_3 +259 0x2000 //RX_FDDRC_SLANT_0_0 +260 0x2000 //RX_FDDRC_SLANT_0_1 +261 0x2000 //RX_FDDRC_SLANT_0_2 +262 0x2000 //RX_FDDRC_SLANT_0_3 +263 0x5333 //RX_FDDRC_SLANT_1_0 +264 0x5333 //RX_FDDRC_SLANT_1_1 +265 0x5333 //RX_FDDRC_SLANT_1_2 +266 0x5333 //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +286 0x0100 //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 +#VOL 2 +163 0x1000 //RX_TDDRC_ALPHA_UP_1 +164 0x1000 //RX_TDDRC_ALPHA_UP_2 +165 0x1000 //RX_TDDRC_ALPHA_UP_3 +166 0x1000 //RX_TDDRC_ALPHA_UP_4 +184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +190 0x7000 //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +269 0x0000 //RX_TDDRC_THRD_0 +270 0x0000 //RX_TDDRC_THRD_1 +271 0x1800 //RX_TDDRC_THRD_2 +272 0x1800 //RX_TDDRC_THRD_3 +273 0x3000 //RX_TDDRC_SLANT_0 +274 0x6E00 //RX_TDDRC_SLANT_1 +275 0x1000 //RX_TDDRC_ALPHA_UP_0 +276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x199A //RX_TDDRC_HMNC_GAIN +279 0x0001 //RX_TDDRC_SMT_FLAG +280 0x0CCD //RX_TDDRC_SMT_W +281 0x01E0 //RX_TDDRC_DRC_GAIN +195 0x0030 //RX_FDEQ_SUBNUM +196 0x4848 //RX_FDEQ_GAIN_0 +197 0x4848 //RX_FDEQ_GAIN_1 +198 0x4844 //RX_FDEQ_GAIN_2 +199 0x4B4D //RX_FDEQ_GAIN_3 +200 0x4E50 //RX_FDEQ_GAIN_4 +201 0x5254 //RX_FDEQ_GAIN_5 +202 0x5658 //RX_FDEQ_GAIN_6 +203 0x5C60 //RX_FDEQ_GAIN_7 +204 0x6468 //RX_FDEQ_GAIN_8 +205 0x6C70 //RX_FDEQ_GAIN_9 +206 0x7474 //RX_FDEQ_GAIN_10 +207 0x7474 //RX_FDEQ_GAIN_11 +208 0x7474 //RX_FDEQ_GAIN_12 +209 0x7474 //RX_FDEQ_GAIN_13 +210 0x7474 //RX_FDEQ_GAIN_14 +211 0x7474 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0202 //RX_FDEQ_BIN_0 +221 0x0203 //RX_FDEQ_BIN_1 +222 0x0402 //RX_FDEQ_BIN_2 +223 0x0304 //RX_FDEQ_BIN_3 +224 0x0405 //RX_FDEQ_BIN_4 +225 0x0506 //RX_FDEQ_BIN_5 +226 0x0708 //RX_FDEQ_BIN_6 +227 0x090A //RX_FDEQ_BIN_7 +228 0x0B0C //RX_FDEQ_BIN_8 +229 0x0D0E //RX_FDEQ_BIN_9 +230 0x1214 //RX_FDEQ_BIN_10 +231 0x1E1E //RX_FDEQ_BIN_11 +232 0x1E1E //RX_FDEQ_BIN_12 +233 0x1E1E //RX_FDEQ_BIN_13 +234 0x1E1E //RX_FDEQ_BIN_14 +235 0x202C //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x4000 //RX_FDEQ_RESRV_0 +245 0x0320 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0030 //RX_FDDRC_BAND_MARGIN_1 +248 0x0050 //RX_FDDRC_BAND_MARGIN_2 +249 0x0080 //RX_FDDRC_BAND_MARGIN_3 +250 0x0007 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x5000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x6400 //RX_FDDRC_THRD_3_2 +258 0x6400 //RX_FDDRC_THRD_3_3 +259 0x2000 //RX_FDDRC_SLANT_0_0 +260 0x2000 //RX_FDDRC_SLANT_0_1 +261 0x2000 //RX_FDDRC_SLANT_0_2 +262 0x2000 //RX_FDDRC_SLANT_0_3 +263 0x5333 //RX_FDDRC_SLANT_1_0 +264 0x5333 //RX_FDDRC_SLANT_1_1 +265 0x5333 //RX_FDDRC_SLANT_1_2 +266 0x5333 //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +286 0x0100 //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 +#VOL 3 +163 0x1000 //RX_TDDRC_ALPHA_UP_1 +164 0x1000 //RX_TDDRC_ALPHA_UP_2 +165 0x1000 //RX_TDDRC_ALPHA_UP_3 +166 0x1000 //RX_TDDRC_ALPHA_UP_4 +184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +190 0x7000 //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +269 0x0000 //RX_TDDRC_THRD_0 +270 0x0000 //RX_TDDRC_THRD_1 +271 0x1800 //RX_TDDRC_THRD_2 +272 0x1800 //RX_TDDRC_THRD_3 +273 0x3000 //RX_TDDRC_SLANT_0 +274 0x6E00 //RX_TDDRC_SLANT_1 +275 0x1000 //RX_TDDRC_ALPHA_UP_0 +276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x199A //RX_TDDRC_HMNC_GAIN +279 0x0001 //RX_TDDRC_SMT_FLAG +280 0x0CCD //RX_TDDRC_SMT_W +281 0x01E0 //RX_TDDRC_DRC_GAIN +195 0x0030 //RX_FDEQ_SUBNUM +196 0x4848 //RX_FDEQ_GAIN_0 +197 0x4848 //RX_FDEQ_GAIN_1 +198 0x4844 //RX_FDEQ_GAIN_2 +199 0x4B4D //RX_FDEQ_GAIN_3 +200 0x4E50 //RX_FDEQ_GAIN_4 +201 0x5254 //RX_FDEQ_GAIN_5 +202 0x5658 //RX_FDEQ_GAIN_6 +203 0x5C60 //RX_FDEQ_GAIN_7 +204 0x6468 //RX_FDEQ_GAIN_8 +205 0x6C70 //RX_FDEQ_GAIN_9 +206 0x7474 //RX_FDEQ_GAIN_10 +207 0x7474 //RX_FDEQ_GAIN_11 +208 0x7474 //RX_FDEQ_GAIN_12 +209 0x7474 //RX_FDEQ_GAIN_13 +210 0x7474 //RX_FDEQ_GAIN_14 +211 0x7474 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0202 //RX_FDEQ_BIN_0 +221 0x0203 //RX_FDEQ_BIN_1 +222 0x0402 //RX_FDEQ_BIN_2 +223 0x0304 //RX_FDEQ_BIN_3 +224 0x0405 //RX_FDEQ_BIN_4 +225 0x0506 //RX_FDEQ_BIN_5 +226 0x0708 //RX_FDEQ_BIN_6 +227 0x090A //RX_FDEQ_BIN_7 +228 0x0B0C //RX_FDEQ_BIN_8 +229 0x0D0E //RX_FDEQ_BIN_9 +230 0x1214 //RX_FDEQ_BIN_10 +231 0x1E1E //RX_FDEQ_BIN_11 +232 0x1E1E //RX_FDEQ_BIN_12 +233 0x1E1E //RX_FDEQ_BIN_13 +234 0x1E1E //RX_FDEQ_BIN_14 +235 0x202C //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x4000 //RX_FDEQ_RESRV_0 +245 0x0320 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0030 //RX_FDDRC_BAND_MARGIN_1 +248 0x0050 //RX_FDDRC_BAND_MARGIN_2 +249 0x0080 //RX_FDDRC_BAND_MARGIN_3 +250 0x0007 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x5000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x6400 //RX_FDDRC_THRD_3_2 +258 0x6400 //RX_FDDRC_THRD_3_3 +259 0x2000 //RX_FDDRC_SLANT_0_0 +260 0x2000 //RX_FDDRC_SLANT_0_1 +261 0x2000 //RX_FDDRC_SLANT_0_2 +262 0x2000 //RX_FDDRC_SLANT_0_3 +263 0x5333 //RX_FDDRC_SLANT_1_0 +264 0x5333 //RX_FDDRC_SLANT_1_1 +265 0x5333 //RX_FDDRC_SLANT_1_2 +266 0x5333 //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +286 0x0100 //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 +#VOL 4 +163 0x1000 //RX_TDDRC_ALPHA_UP_1 +164 0x1000 //RX_TDDRC_ALPHA_UP_2 +165 0x1000 //RX_TDDRC_ALPHA_UP_3 +166 0x1000 //RX_TDDRC_ALPHA_UP_4 +184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +190 0x7000 //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +269 0x0000 //RX_TDDRC_THRD_0 +270 0x0000 //RX_TDDRC_THRD_1 +271 0x1800 //RX_TDDRC_THRD_2 +272 0x1800 //RX_TDDRC_THRD_3 +273 0x3000 //RX_TDDRC_SLANT_0 +274 0x6E00 //RX_TDDRC_SLANT_1 +275 0x1000 //RX_TDDRC_ALPHA_UP_0 +276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x199A //RX_TDDRC_HMNC_GAIN +279 0x0001 //RX_TDDRC_SMT_FLAG +280 0x0CCD //RX_TDDRC_SMT_W +281 0x01E0 //RX_TDDRC_DRC_GAIN +195 0x0030 //RX_FDEQ_SUBNUM +196 0x4848 //RX_FDEQ_GAIN_0 +197 0x4848 //RX_FDEQ_GAIN_1 +198 0x4844 //RX_FDEQ_GAIN_2 +199 0x4B4D //RX_FDEQ_GAIN_3 +200 0x4E50 //RX_FDEQ_GAIN_4 +201 0x5254 //RX_FDEQ_GAIN_5 +202 0x5658 //RX_FDEQ_GAIN_6 +203 0x5C60 //RX_FDEQ_GAIN_7 +204 0x6468 //RX_FDEQ_GAIN_8 +205 0x6C70 //RX_FDEQ_GAIN_9 +206 0x7474 //RX_FDEQ_GAIN_10 +207 0x7474 //RX_FDEQ_GAIN_11 +208 0x7474 //RX_FDEQ_GAIN_12 +209 0x7474 //RX_FDEQ_GAIN_13 +210 0x7474 //RX_FDEQ_GAIN_14 +211 0x7474 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0202 //RX_FDEQ_BIN_0 +221 0x0203 //RX_FDEQ_BIN_1 +222 0x0402 //RX_FDEQ_BIN_2 +223 0x0304 //RX_FDEQ_BIN_3 +224 0x0405 //RX_FDEQ_BIN_4 +225 0x0506 //RX_FDEQ_BIN_5 +226 0x0708 //RX_FDEQ_BIN_6 +227 0x090A //RX_FDEQ_BIN_7 +228 0x0B0C //RX_FDEQ_BIN_8 +229 0x0D0E //RX_FDEQ_BIN_9 +230 0x1214 //RX_FDEQ_BIN_10 +231 0x1E1E //RX_FDEQ_BIN_11 +232 0x1E1E //RX_FDEQ_BIN_12 +233 0x1E1E //RX_FDEQ_BIN_13 +234 0x1E1E //RX_FDEQ_BIN_14 +235 0x202C //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x4000 //RX_FDEQ_RESRV_0 +245 0x0320 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0030 //RX_FDDRC_BAND_MARGIN_1 +248 0x0050 //RX_FDDRC_BAND_MARGIN_2 +249 0x0080 //RX_FDDRC_BAND_MARGIN_3 +250 0x0007 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x5000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x6400 //RX_FDDRC_THRD_3_2 +258 0x6400 //RX_FDDRC_THRD_3_3 +259 0x2000 //RX_FDDRC_SLANT_0_0 +260 0x2000 //RX_FDDRC_SLANT_0_1 +261 0x2000 //RX_FDDRC_SLANT_0_2 +262 0x2000 //RX_FDDRC_SLANT_0_3 +263 0x5333 //RX_FDDRC_SLANT_1_0 +264 0x5333 //RX_FDDRC_SLANT_1_1 +265 0x5333 //RX_FDDRC_SLANT_1_2 +266 0x5333 //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +286 0x0100 //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 +#VOL 5 +163 0x1000 //RX_TDDRC_ALPHA_UP_1 +164 0x1000 //RX_TDDRC_ALPHA_UP_2 +165 0x1000 //RX_TDDRC_ALPHA_UP_3 +166 0x1000 //RX_TDDRC_ALPHA_UP_4 +184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +190 0x7000 //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +269 0x0000 //RX_TDDRC_THRD_0 +270 0x0000 //RX_TDDRC_THRD_1 +271 0x1800 //RX_TDDRC_THRD_2 +272 0x1800 //RX_TDDRC_THRD_3 +273 0x3000 //RX_TDDRC_SLANT_0 +274 0x6E00 //RX_TDDRC_SLANT_1 +275 0x1000 //RX_TDDRC_ALPHA_UP_0 +276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x199A //RX_TDDRC_HMNC_GAIN +279 0x0001 //RX_TDDRC_SMT_FLAG +280 0x0CCD //RX_TDDRC_SMT_W +281 0x01E0 //RX_TDDRC_DRC_GAIN +195 0x0030 //RX_FDEQ_SUBNUM +196 0x4848 //RX_FDEQ_GAIN_0 +197 0x4848 //RX_FDEQ_GAIN_1 +198 0x4844 //RX_FDEQ_GAIN_2 +199 0x4B4D //RX_FDEQ_GAIN_3 +200 0x4E50 //RX_FDEQ_GAIN_4 +201 0x5254 //RX_FDEQ_GAIN_5 +202 0x5658 //RX_FDEQ_GAIN_6 +203 0x5C60 //RX_FDEQ_GAIN_7 +204 0x6468 //RX_FDEQ_GAIN_8 +205 0x6C70 //RX_FDEQ_GAIN_9 +206 0x7474 //RX_FDEQ_GAIN_10 +207 0x7474 //RX_FDEQ_GAIN_11 +208 0x7474 //RX_FDEQ_GAIN_12 +209 0x7474 //RX_FDEQ_GAIN_13 +210 0x7474 //RX_FDEQ_GAIN_14 +211 0x7474 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0202 //RX_FDEQ_BIN_0 +221 0x0203 //RX_FDEQ_BIN_1 +222 0x0402 //RX_FDEQ_BIN_2 +223 0x0304 //RX_FDEQ_BIN_3 +224 0x0405 //RX_FDEQ_BIN_4 +225 0x0506 //RX_FDEQ_BIN_5 +226 0x0708 //RX_FDEQ_BIN_6 +227 0x090A //RX_FDEQ_BIN_7 +228 0x0B0C //RX_FDEQ_BIN_8 +229 0x0D0E //RX_FDEQ_BIN_9 +230 0x1214 //RX_FDEQ_BIN_10 +231 0x1E1E //RX_FDEQ_BIN_11 +232 0x1E1E //RX_FDEQ_BIN_12 +233 0x1E1E //RX_FDEQ_BIN_13 +234 0x1E1E //RX_FDEQ_BIN_14 +235 0x202C //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x4000 //RX_FDEQ_RESRV_0 +245 0x0320 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0030 //RX_FDDRC_BAND_MARGIN_1 +248 0x0050 //RX_FDDRC_BAND_MARGIN_2 +249 0x0080 //RX_FDDRC_BAND_MARGIN_3 +250 0x0007 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x5000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x6400 //RX_FDDRC_THRD_3_2 +258 0x6400 //RX_FDDRC_THRD_3_3 +259 0x2000 //RX_FDDRC_SLANT_0_0 +260 0x2000 //RX_FDDRC_SLANT_0_1 +261 0x2000 //RX_FDDRC_SLANT_0_2 +262 0x2000 //RX_FDDRC_SLANT_0_3 +263 0x5333 //RX_FDDRC_SLANT_1_0 +264 0x5333 //RX_FDDRC_SLANT_1_1 +265 0x5333 //RX_FDDRC_SLANT_1_2 +266 0x5333 //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +286 0x0100 //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 +#VOL 6 +163 0x1000 //RX_TDDRC_ALPHA_UP_1 +164 0x1000 //RX_TDDRC_ALPHA_UP_2 +165 0x1000 //RX_TDDRC_ALPHA_UP_3 +166 0x1000 //RX_TDDRC_ALPHA_UP_4 +184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +190 0x7000 //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +269 0x0000 //RX_TDDRC_THRD_0 +270 0x0000 //RX_TDDRC_THRD_1 +271 0x1800 //RX_TDDRC_THRD_2 +272 0x1800 //RX_TDDRC_THRD_3 +273 0x3000 //RX_TDDRC_SLANT_0 +274 0x6E00 //RX_TDDRC_SLANT_1 +275 0x1000 //RX_TDDRC_ALPHA_UP_0 +276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x199A //RX_TDDRC_HMNC_GAIN +279 0x0001 //RX_TDDRC_SMT_FLAG +280 0x0CCD //RX_TDDRC_SMT_W +281 0x01E0 //RX_TDDRC_DRC_GAIN +195 0x0030 //RX_FDEQ_SUBNUM +196 0x4848 //RX_FDEQ_GAIN_0 +197 0x4848 //RX_FDEQ_GAIN_1 +198 0x4844 //RX_FDEQ_GAIN_2 +199 0x4B4D //RX_FDEQ_GAIN_3 +200 0x4E50 //RX_FDEQ_GAIN_4 +201 0x5254 //RX_FDEQ_GAIN_5 +202 0x5658 //RX_FDEQ_GAIN_6 +203 0x5C60 //RX_FDEQ_GAIN_7 +204 0x6468 //RX_FDEQ_GAIN_8 +205 0x6C70 //RX_FDEQ_GAIN_9 +206 0x7474 //RX_FDEQ_GAIN_10 +207 0x7474 //RX_FDEQ_GAIN_11 +208 0x7474 //RX_FDEQ_GAIN_12 +209 0x7474 //RX_FDEQ_GAIN_13 +210 0x7474 //RX_FDEQ_GAIN_14 +211 0x7474 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0202 //RX_FDEQ_BIN_0 +221 0x0203 //RX_FDEQ_BIN_1 +222 0x0402 //RX_FDEQ_BIN_2 +223 0x0304 //RX_FDEQ_BIN_3 +224 0x0405 //RX_FDEQ_BIN_4 +225 0x0506 //RX_FDEQ_BIN_5 +226 0x0708 //RX_FDEQ_BIN_6 +227 0x090A //RX_FDEQ_BIN_7 +228 0x0B0C //RX_FDEQ_BIN_8 +229 0x0D0E //RX_FDEQ_BIN_9 +230 0x1214 //RX_FDEQ_BIN_10 +231 0x1E1E //RX_FDEQ_BIN_11 +232 0x1E1E //RX_FDEQ_BIN_12 +233 0x1E1E //RX_FDEQ_BIN_13 +234 0x1E1E //RX_FDEQ_BIN_14 +235 0x202C //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x4000 //RX_FDEQ_RESRV_0 +245 0x0320 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0030 //RX_FDDRC_BAND_MARGIN_1 +248 0x0050 //RX_FDDRC_BAND_MARGIN_2 +249 0x0080 //RX_FDDRC_BAND_MARGIN_3 +250 0x0007 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x5000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x6400 //RX_FDDRC_THRD_3_2 +258 0x6400 //RX_FDDRC_THRD_3_3 +259 0x2000 //RX_FDDRC_SLANT_0_0 +260 0x2000 //RX_FDDRC_SLANT_0_1 +261 0x2000 //RX_FDDRC_SLANT_0_2 +262 0x2000 //RX_FDDRC_SLANT_0_3 +263 0x5333 //RX_FDDRC_SLANT_1_0 +264 0x5333 //RX_FDDRC_SLANT_1_1 +265 0x5333 //RX_FDDRC_SLANT_1_2 +266 0x5333 //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +286 0x0100 //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 diff --git a/audio/panther/tuning/fortemedia/HANDSFREE.dat b/audio/panther/tuning/fortemedia/HANDSFREE.dat index 3c14fa7..0a17fba 100644 Binary files a/audio/panther/tuning/fortemedia/HANDSFREE.dat and b/audio/panther/tuning/fortemedia/HANDSFREE.dat differ diff --git a/audio/panther/tuning/fortemedia/HANDSFREE.mods b/audio/panther/tuning/fortemedia/HANDSFREE.mods index b528ddc..4a3f64c 100644 --- a/audio/panther/tuning/fortemedia/HANDSFREE.mods +++ b/audio/panther/tuning/fortemedia/HANDSFREE.mods @@ -1,11 +1,12 @@ #PLATFORM_NAME gChip #EXPORT_FLAG HANDSFREE -#SINGLE_API_VER 1.1.6 -#SAVE_TIME 2021-12-20 16:28:16 +#SINGLE_API_VER 1.2.0 +#SAVE_TIME 2022-02-22 11:05:57 #CASE_NAME HANDSFREE-HANDSFREE-RESERVE1-FB -#PARAM_TYPE TX+RX -#TOTAL_CUSTOM_STEP 7 +#PARAM_MODE FULL +#PARAM_TYPE TX+2RX +#TOTAL_CUSTOM_STEP 7+7 #TX 0 0x0001 //TX_OPERATION_MODE_0 1 0x0001 //TX_OPERATION_MODE_1 @@ -258,11 +259,11 @@ 248 0xF800 //TX_THR_SN_EST_6 249 0xF800 //TX_THR_SN_EST_7 250 0x0100 //TX_DELTA_THR_SN_EST_0 -251 0x0200 //TX_DELTA_THR_SN_EST_1 -252 0x0100 //TX_DELTA_THR_SN_EST_2 -253 0x0200 //TX_DELTA_THR_SN_EST_3 +251 0x0100 //TX_DELTA_THR_SN_EST_1 +252 0x0200 //TX_DELTA_THR_SN_EST_2 +253 0x0100 //TX_DELTA_THR_SN_EST_3 254 0x0100 //TX_DELTA_THR_SN_EST_4 -255 0x0100 //TX_DELTA_THR_SN_EST_5 +255 0x0200 //TX_DELTA_THR_SN_EST_5 256 0x0200 //TX_DELTA_THR_SN_EST_6 257 0x0200 //TX_DELTA_THR_SN_EST_7 258 0x4000 //TX_LAMBDA_NN_EST_0 @@ -290,11 +291,11 @@ 280 0x1000 //TX_B_POST_FLT_1 281 0x0010 //TX_NS_LVL_CTRL_0 282 0x0014 //TX_NS_LVL_CTRL_1 -283 0x0014 //TX_NS_LVL_CTRL_2 -284 0x0018 //TX_NS_LVL_CTRL_3 -285 0x0016 //TX_NS_LVL_CTRL_4 -286 0x0014 //TX_NS_LVL_CTRL_5 -287 0x0011 //TX_NS_LVL_CTRL_6 +283 0x0018 //TX_NS_LVL_CTRL_2 +284 0x0016 //TX_NS_LVL_CTRL_3 +285 0x0014 //TX_NS_LVL_CTRL_4 +286 0x0011 //TX_NS_LVL_CTRL_5 +287 0x0014 //TX_NS_LVL_CTRL_6 288 0x0011 //TX_NS_LVL_CTRL_7 289 0x000F //TX_MIN_GAIN_S_0 290 0x0010 //TX_MIN_GAIN_S_1 @@ -312,8 +313,8 @@ 302 0x4000 //TX_SNRI_SUP_2 303 0x4000 //TX_SNRI_SUP_3 304 0x4000 //TX_SNRI_SUP_4 -305 0x4000 //TX_SNRI_SUP_5 -306 0x50C0 //TX_SNRI_SUP_6 +305 0x50C0 //TX_SNRI_SUP_5 +306 0x4000 //TX_SNRI_SUP_6 307 0x7FFF //TX_SNRI_SUP_7 308 0x7FFF //TX_THR_LFNS 309 0x0018 //TX_G_LFNS @@ -322,19 +323,19 @@ 312 0x7FFF //TX_A_POST_FILT_0 313 0x2000 //TX_A_POST_FILT_1 314 0x5000 //TX_A_POST_FILT_S_0 -315 0x6000 //TX_A_POST_FILT_S_1 -316 0x4C00 //TX_A_POST_FILT_S_2 -317 0x4000 //TX_A_POST_FILT_S_3 -318 0x6000 //TX_A_POST_FILT_S_4 -319 0x4000 //TX_A_POST_FILT_S_5 -320 0x5000 //TX_A_POST_FILT_S_6 +315 0x4C00 //TX_A_POST_FILT_S_1 +316 0x4000 //TX_A_POST_FILT_S_2 +317 0x6000 //TX_A_POST_FILT_S_3 +318 0x4000 //TX_A_POST_FILT_S_4 +319 0x5000 //TX_A_POST_FILT_S_5 +320 0x6000 //TX_A_POST_FILT_S_6 321 0x7000 //TX_A_POST_FILT_S_7 322 0x2000 //TX_B_POST_FILT_0 -323 0x1000 //TX_B_POST_FILT_1 +323 0x2000 //TX_B_POST_FILT_1 324 0x2000 //TX_B_POST_FILT_2 -325 0x2000 //TX_B_POST_FILT_3 +325 0x4000 //TX_B_POST_FILT_3 326 0x4000 //TX_B_POST_FILT_4 -327 0x4000 //TX_B_POST_FILT_5 +327 0x1000 //TX_B_POST_FILT_5 328 0x1000 //TX_B_POST_FILT_6 329 0x2000 //TX_B_POST_FILT_7 330 0x4000 //TX_B_LESSCUT_RTO_S_0 @@ -342,14 +343,14 @@ 332 0x7FFF //TX_B_LESSCUT_RTO_S_2 333 0x7FFF //TX_B_LESSCUT_RTO_S_3 334 0x7FFF //TX_B_LESSCUT_RTO_S_4 -335 0x7FFF //TX_B_LESSCUT_RTO_S_5 -336 0x6000 //TX_B_LESSCUT_RTO_S_6 +335 0x6000 //TX_B_LESSCUT_RTO_S_5 +336 0x7FFF //TX_B_LESSCUT_RTO_S_6 337 0x7FFF //TX_B_LESSCUT_RTO_S_7 338 0x7C00 //TX_LAMBDA_PFILT 339 0x7C00 //TX_LAMBDA_PFILT_S_0 340 0x7C00 //TX_LAMBDA_PFILT_S_1 -341 0x7C00 //TX_LAMBDA_PFILT_S_2 -342 0x7A00 //TX_LAMBDA_PFILT_S_3 +341 0x7A00 //TX_LAMBDA_PFILT_S_2 +342 0x7C00 //TX_LAMBDA_PFILT_S_3 343 0x7C00 //TX_LAMBDA_PFILT_S_4 344 0x7C00 //TX_LAMBDA_PFILT_S_5 345 0x7C00 //TX_LAMBDA_PFILT_S_6 @@ -387,10 +388,10 @@ 377 0x7FFF //TX_NOISE_TH_5_4 378 0x2710 //TX_NOISE_TH_6 379 0x0033 //TX_MINENOISE_TH -380 0x4000 //TX_MINENOISE_MIC0_TH_MTS -381 0xFFEE //TX_MINENOISE_MIC0_TH_EXP -382 0x6000 //TX_MINENOISE_MIC0_S_TH_MTS -383 0xFFF3 //TX_MINENOISE_MIC0_S_TH_EXP +380 0xD508 //TX_MORENS_TFMASK_TH +381 0x0001 //TX_DRC_QUIET_FLOOR +382 0x7999 //TX_RATIODTL_CUT_TH +383 0x0119 //TX_DT_CUT_K1 384 0x0666 //TX_OUT_ENER_S_TH_CLEAN 385 0x0666 //TX_OUT_ENER_S_TH_LESSCLEAN 386 0x0333 //TX_OUT_ENER_S_TH_NOISY @@ -398,15 +399,15 @@ 388 0x0333 //TX_OUT_ENER_TH_SPEECH 389 0x2000 //TX_SN_NPB_GAIN 390 0x0000 //TX_NN_NPB_GAIN -391 0x0000 //TX_CSX_ALPHA_0 -392 0x0000 //TX_CSX_ALPHA_1 -393 0x0000 //TX_CSX_ALPHA_2 -394 0x0000 //TX_CSX_ALPHA_3 -395 0x0800 //TX_MU_ARSP_EST -396 0x00C8 //TX_P_OUTBEAM_MIN_TH +391 0x7FFF //TX_POST_MASK_SUP_HSNE +392 0x1388 //TX_TAIL_DET_TH +393 0x4000 //TX_B_LESSCUT_RTO_WTA +394 0x0000 //TX_MEL_G_R +395 0x0080 //TX_SUPHIGH_TH +396 0x0000 //TX_MASK_G_R 397 0x0002 //TX_EXTRA_NS_L -398 0x0800 //TX_EXTRA_NS_A -399 0x0005 //TX_VR_NOISE_FLOOR_TH +398 0x1800 //TX_C_POST_FLT_MASK +399 0x4000 //TX_A_POST_FLT_WNS 400 0x0148 //TX_MIN_G_LOW300HZ 401 0x0002 //TX_MAXLEVEL_CNG 402 0x00B4 //TX_STN_NOISE_TH @@ -521,16 +522,16 @@ 511 0x6666 //TX_MIC_TO_BFGAIN 512 0x0000 //TX_MICTOBFGAIN0 513 0x0000 //TX_FASTMUE_TH -514 0x0000 //TX_DERVB_LEN_0 -515 0x0000 //TX_DERVB_LEN_1 -516 0x0000 //TX_RHO_DERVB -517 0x0000 //TX_MIC_INDX_DERVB -518 0x0000 //TX_MU_DERVB -519 0x0000 //TX_DR_RESRV_0 -520 0x0000 //TX_DR_RESRV_1 -521 0x0000 //TX_DR_RESRV_2 -522 0x0000 //TX_DR_RESRV_3 -523 0x0000 //TX_DR_RESRV_4 +514 0x3000 //TX_DEREVERB_LF_MU +515 0x34CD //TX_DEREVERB_HF_MU +516 0x0007 //TX_DEREVERB_DELAY +517 0x0004 //TX_DEREVERB_COEF_LEN +518 0x0003 //TX_DEREVERB_DNR +519 0x0000 //TX_DEREVERB_ALPHA +520 0x0000 //TX_DEREVERB_BETA +521 0x3A98 //TX_GSC_RTOL_TH +522 0x3A98 //TX_GSC_RTOH_TH +523 0x7E2C //TX_WIDE2_MEANHTH 524 0x0000 //TX_DR_RESRV_5 525 0x0000 //TX_DR_RESRV_6 526 0x0000 //TX_DR_RESRV_7 @@ -904,6 +905,71 @@ 894 0xC000 //TX_FASTNS_SSA_THHFL 895 0xCCCC //TX_FASTNS_SSA_THLFH 896 0xD999 //TX_FASTNS_SSA_THHFH +897 0x2339 //TX_SENDFUNC_REG_MICMUTE +898 0x0021 //TX_SENDFUNC_REG_MICMUTE1 +899 0x02BC //TX_MICMUTE_RATIO_THR +900 0x0140 //TX_MICMUTE_AMP_THR +901 0x0004 //TX_MICMUTE_HPF_IND +902 0x00C0 //TX_MICMUTE_LOG_EYR_TH +903 0x0008 //TX_MICMUTE_CVG_TIME +904 0x0008 //TX_MICMUTE_RELEASE_TIME +905 0x01FE //TX_MIC_VOLUME_MIC0MUTE +906 0x0020 //TX_MICMUTE_EPD_OFFSET_0 +907 0x001E //TX_MICMUTE_FRQ_AEC_L +908 0x7999 //TX_MICMUTE_EAD_THR +909 0x7FFF //TX_MICMUTE_LAMBDA_CB_NLE +910 0x7FFF //TX_MICMUTE_LAMBDA_RE_EST +911 0x4000 //TX_DTD_THR1_MICMUTE_0 +912 0x7000 //TX_DTD_THR1_MICMUTE_1 +913 0x7FFF //TX_DTD_THR1_MICMUTE_2 +914 0x7FFF //TX_DTD_THR1_MICMUTE_3 +915 0x6CCC //TX_DTD_THR2_MICMUTE_0 +916 0x0400 //TX_MICMUTE_MIN_EQ_RE_EST_0 +917 0x0400 //TX_MICMUTE_MIN_EQ_RE_EST_1 +918 0x1000 //TX_MICMUTE_MIN_EQ_RE_EST_2 +919 0x7FFF //TX_MICMUTE_MIN_EQ_RE_EST_3 +920 0x7FFF //TX_MICMUTE_MIN_EQ_RE_EST_4 +921 0x4000 //TX_MICMUTE_C_POST_FLT +922 0x03E8 //TX_MICMUTE_DT_CUT_K +923 0x0001 //TX_MICMUTE_DT_CUT_THR +924 0x03E8 //TX_MICMUTE_DT_CUT_K2 +925 0x0001 //TX_MICMUTE_DT_CUT_THR2 +926 0x0064 //TX_MICMUTE_DT2_HOLD_N +927 0x1000 //TX_MICMUTE_RATIODTH_THCUT +928 0x1000 //TX_MICMUTE_B_POST_FLT_ECHOL +929 0x7FFF //TX_MICMUTE_B_POST_FLT_ECHOH +930 0x0400 //TX_MICMUTE_C_POST_FLT_MASK +931 0x7999 //TX_MICMUTE_RATIODTL_CUT_TH +932 0x0258 //TX_MICMUTE_DT_CUT_K1 +933 0x0800 //TX_MICMUTE_N2_SN_EST +934 0xFC00 //TX_MICMUTE_THR_SN_EST_0 +935 0x001C //TX_MICMUTE_MIN_G_CTRL_0 +936 0x6000 //TX_MICMUTE_A_POST_FILT_S_0 +937 0x7000 //TX_MICMUTE_B_POST_FILT_0 +938 0x2710 //TX_MIC1RUB_AMP_THR +939 0x0010 //TX_MIC1MUTE_RATIO_THR +940 0x0450 //TX_MIC1MUTE_AMP_THR +941 0x0008 //TX_MIC1MUTE_CVG_TIME +942 0x0008 //TX_MIC1MUTE_RELEASE_TIME +943 0x0000 //TX_AMS_RESRV_01 +944 0x0000 //TX_AMS_RESRV_02 +945 0x0000 //TX_AMS_RESRV_03 +946 0x0000 //TX_AMS_RESRV_04 +947 0x0000 //TX_AMS_RESRV_05 +948 0x0000 //TX_AMS_RESRV_06 +949 0x0000 //TX_AMS_RESRV_07 +950 0x0000 //TX_AMS_RESRV_08 +951 0x0000 //TX_AMS_RESRV_09 +952 0x0000 //TX_AMS_RESRV_10 +953 0x0000 //TX_AMS_RESRV_11 +954 0x0000 //TX_AMS_RESRV_12 +955 0x0000 //TX_AMS_RESRV_13 +956 0x0000 //TX_AMS_RESRV_14 +957 0x0000 //TX_AMS_RESRV_15 +958 0x0000 //TX_AMS_RESRV_16 +959 0x0000 //TX_AMS_RESRV_17 +960 0x0000 //TX_AMS_RESRV_18 +961 0x0000 //TX_AMS_RESRV_19 #RX 0 0x006C //RX_RECVFUNC_MODE_0 1 0x0000 //RX_RECVFUNC_MODE_1 @@ -1755,10 +1821,862 @@ 110 0x0000 //RX_FDDRC_RESRV_0 129 0x0100 //RX_SPK_VOL 130 0x0000 //RX_VOL_RESRV_0 +#RX 2 +157 0x006C //RX_RECVFUNC_MODE_0 +158 0x0000 //RX_RECVFUNC_MODE_1 +159 0x0004 //RX_SAMPLINGFREQ_SIG +160 0x0004 //RX_SAMPLINGFREQ_PROC +161 0x000A //RX_FRAME_SZ +162 0x0000 //RX_DELAY_OPT +163 0x4000 //RX_TDDRC_ALPHA_UP_1 +164 0x4000 //RX_TDDRC_ALPHA_UP_2 +165 0x4000 //RX_TDDRC_ALPHA_UP_3 +166 0x4000 //RX_TDDRC_ALPHA_UP_4 +167 0x065B //RX_PGA +168 0x7E56 //RX_A_HP +169 0x4000 //RX_B_PE +170 0x7800 //RX_THR_PITCH_DET_0 +171 0x7000 //RX_THR_PITCH_DET_1 +172 0x6000 //RX_THR_PITCH_DET_2 +173 0x0008 //RX_PITCH_BFR_LEN +174 0x0003 //RX_SBD_PITCH_DET +175 0x0100 //RX_PP_RESRV_0 +176 0x0020 //RX_PP_RESRV_1 +177 0x0400 //RX_N_SN_EST +178 0x000C //RX_N2_SN_EST +179 0x0014 //RX_NS_LVL_CTRL +180 0xF400 //RX_THR_SN_EST +181 0x7E00 //RX_LAMBDA_PFILT +182 0x00C8 //RX_FENS_RESRV_0 +183 0x0190 //RX_FENS_RESRV_1 +184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +187 0x0002 //RX_EXTRA_NS_L +188 0x0800 //RX_EXTRA_NS_A +189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +190 0x7FFF //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +192 0x199A //RX_A_POST_FLT +193 0x0000 //RX_LMT_THRD +194 0x4000 //RX_LMT_ALPHA +195 0x0020 //RX_FDEQ_SUBNUM +196 0x4848 //RX_FDEQ_GAIN_0 +197 0x4848 //RX_FDEQ_GAIN_1 +198 0x4848 //RX_FDEQ_GAIN_2 +199 0x4870 //RX_FDEQ_GAIN_3 +200 0x4848 //RX_FDEQ_GAIN_4 +201 0x4848 //RX_FDEQ_GAIN_5 +202 0x4850 //RX_FDEQ_GAIN_6 +203 0x485C //RX_FDEQ_GAIN_7 +204 0x5C60 //RX_FDEQ_GAIN_8 +205 0x685C //RX_FDEQ_GAIN_9 +206 0x5640 //RX_FDEQ_GAIN_10 +207 0x4040 //RX_FDEQ_GAIN_11 +208 0x5C58 //RX_FDEQ_GAIN_12 +209 0x5C60 //RX_FDEQ_GAIN_13 +210 0x6060 //RX_FDEQ_GAIN_14 +211 0x6060 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0202 //RX_FDEQ_BIN_0 +221 0x0203 //RX_FDEQ_BIN_1 +222 0x0303 //RX_FDEQ_BIN_2 +223 0x0402 //RX_FDEQ_BIN_3 +224 0x0504 //RX_FDEQ_BIN_4 +225 0x0209 //RX_FDEQ_BIN_5 +226 0x0808 //RX_FDEQ_BIN_6 +227 0x090A //RX_FDEQ_BIN_7 +228 0x0B0C //RX_FDEQ_BIN_8 +229 0x0D0E //RX_FDEQ_BIN_9 +230 0x1013 //RX_FDEQ_BIN_10 +231 0x1719 //RX_FDEQ_BIN_11 +232 0x1B1E //RX_FDEQ_BIN_12 +233 0x1E1E //RX_FDEQ_BIN_13 +234 0x1E28 //RX_FDEQ_BIN_14 +235 0x282C //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x4000 //RX_FDEQ_RESRV_0 +245 0x0320 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0030 //RX_FDDRC_BAND_MARGIN_1 +248 0x0050 //RX_FDDRC_BAND_MARGIN_2 +249 0x0080 //RX_FDDRC_BAND_MARGIN_3 +250 0x0004 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x2000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x2000 //RX_FDDRC_THRD_3_2 +258 0x5000 //RX_FDDRC_THRD_3_3 +259 0x4000 //RX_FDDRC_SLANT_0_0 +260 0x4000 //RX_FDDRC_SLANT_0_1 +261 0x4000 //RX_FDDRC_SLANT_0_2 +262 0x4000 //RX_FDDRC_SLANT_0_3 +263 0x7FFF //RX_FDDRC_SLANT_1_0 +264 0x7FFF //RX_FDDRC_SLANT_1_1 +265 0x7FFF //RX_FDDRC_SLANT_1_2 +266 0x7FFF //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +268 0x0002 //RX_FILTINDX +269 0x0001 //RX_TDDRC_THRD_0 +270 0x0002 //RX_TDDRC_THRD_1 +271 0x1800 //RX_TDDRC_THRD_2 +272 0x1800 //RX_TDDRC_THRD_3 +273 0x6000 //RX_TDDRC_SLANT_0 +274 0x6E00 //RX_TDDRC_SLANT_1 +275 0x4000 //RX_TDDRC_ALPHA_UP_0 +276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x199A //RX_TDDRC_HMNC_GAIN +279 0x0001 //RX_TDDRC_SMT_FLAG +280 0x0CCD //RX_TDDRC_SMT_W +281 0x03C3 //RX_TDDRC_DRC_GAIN +282 0x7C00 //RX_LAMBDA_PKA_FP +283 0x2000 //RX_TPKA_FP +284 0x2000 //RX_MIN_G_FP +285 0x0080 //RX_MAX_G_FP +286 0x0012 //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 +288 0x0000 //RX_MAXLEVEL_CNG +289 0x3000 //RX_BWE_UV_TH +290 0x3000 //RX_BWE_UV_TH2 +291 0x1800 //RX_BWE_UV_TH3 +292 0x1000 //RX_BWE_V_TH +293 0x04CD //RX_BWE_GAIN1_V_TH1 +294 0x0F33 //RX_BWE_GAIN1_V_TH2 +295 0x7333 //RX_BWE_UV_EQ +296 0x199A //RX_BWE_V_EQ +297 0x7333 //RX_BWE_TONE_TH +298 0x0004 //RX_BWE_UV_HOLD_T +299 0x6CCD //RX_BWE_GAIN2_ALPHA +300 0x799A //RX_BWE_GAIN3_ALPHA +301 0x001E //RX_BWE_CUTOFF +302 0x3000 //RX_BWE_GAINFILL +303 0x3200 //RX_BWE_MAXTH_TONE +304 0x2000 //RX_BWE_EQ_0 +305 0x2000 //RX_BWE_EQ_1 +306 0x2000 //RX_BWE_EQ_2 +307 0x2000 //RX_BWE_EQ_3 +308 0x2000 //RX_BWE_EQ_4 +309 0x2000 //RX_BWE_EQ_5 +310 0x2000 //RX_BWE_EQ_6 +311 0x0000 //RX_BWE_RESRV_0 +312 0x0000 //RX_BWE_RESRV_1 +313 0x0000 //RX_BWE_RESRV_2 +#VOL 0 +163 0x4000 //RX_TDDRC_ALPHA_UP_1 +164 0x4000 //RX_TDDRC_ALPHA_UP_2 +165 0x4000 //RX_TDDRC_ALPHA_UP_3 +166 0x4000 //RX_TDDRC_ALPHA_UP_4 +184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +190 0x7FFF //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +269 0x0001 //RX_TDDRC_THRD_0 +270 0x0002 //RX_TDDRC_THRD_1 +271 0x1800 //RX_TDDRC_THRD_2 +272 0x1800 //RX_TDDRC_THRD_3 +273 0x6000 //RX_TDDRC_SLANT_0 +274 0x6E00 //RX_TDDRC_SLANT_1 +275 0x4000 //RX_TDDRC_ALPHA_UP_0 +276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x199A //RX_TDDRC_HMNC_GAIN +279 0x0001 //RX_TDDRC_SMT_FLAG +280 0x0CCD //RX_TDDRC_SMT_W +281 0x03C3 //RX_TDDRC_DRC_GAIN +195 0x0020 //RX_FDEQ_SUBNUM +196 0x4848 //RX_FDEQ_GAIN_0 +197 0x4848 //RX_FDEQ_GAIN_1 +198 0x4848 //RX_FDEQ_GAIN_2 +199 0x4870 //RX_FDEQ_GAIN_3 +200 0x4848 //RX_FDEQ_GAIN_4 +201 0x4848 //RX_FDEQ_GAIN_5 +202 0x4850 //RX_FDEQ_GAIN_6 +203 0x485C //RX_FDEQ_GAIN_7 +204 0x5C60 //RX_FDEQ_GAIN_8 +205 0x685C //RX_FDEQ_GAIN_9 +206 0x5640 //RX_FDEQ_GAIN_10 +207 0x4040 //RX_FDEQ_GAIN_11 +208 0x5C58 //RX_FDEQ_GAIN_12 +209 0x5C60 //RX_FDEQ_GAIN_13 +210 0x6060 //RX_FDEQ_GAIN_14 +211 0x6060 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0202 //RX_FDEQ_BIN_0 +221 0x0203 //RX_FDEQ_BIN_1 +222 0x0303 //RX_FDEQ_BIN_2 +223 0x0402 //RX_FDEQ_BIN_3 +224 0x0504 //RX_FDEQ_BIN_4 +225 0x0209 //RX_FDEQ_BIN_5 +226 0x0808 //RX_FDEQ_BIN_6 +227 0x090A //RX_FDEQ_BIN_7 +228 0x0B0C //RX_FDEQ_BIN_8 +229 0x0D0E //RX_FDEQ_BIN_9 +230 0x1013 //RX_FDEQ_BIN_10 +231 0x1719 //RX_FDEQ_BIN_11 +232 0x1B1E //RX_FDEQ_BIN_12 +233 0x1E1E //RX_FDEQ_BIN_13 +234 0x1E28 //RX_FDEQ_BIN_14 +235 0x282C //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x4000 //RX_FDEQ_RESRV_0 +245 0x0320 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0030 //RX_FDDRC_BAND_MARGIN_1 +248 0x0050 //RX_FDDRC_BAND_MARGIN_2 +249 0x0080 //RX_FDDRC_BAND_MARGIN_3 +250 0x0004 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x2000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x2000 //RX_FDDRC_THRD_3_2 +258 0x5000 //RX_FDDRC_THRD_3_3 +259 0x4000 //RX_FDDRC_SLANT_0_0 +260 0x4000 //RX_FDDRC_SLANT_0_1 +261 0x4000 //RX_FDDRC_SLANT_0_2 +262 0x4000 //RX_FDDRC_SLANT_0_3 +263 0x7FFF //RX_FDDRC_SLANT_1_0 +264 0x7FFF //RX_FDDRC_SLANT_1_1 +265 0x7FFF //RX_FDDRC_SLANT_1_2 +266 0x7FFF //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +286 0x0012 //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 +#VOL 1 +163 0x4000 //RX_TDDRC_ALPHA_UP_1 +164 0x4000 //RX_TDDRC_ALPHA_UP_2 +165 0x4000 //RX_TDDRC_ALPHA_UP_3 +166 0x4000 //RX_TDDRC_ALPHA_UP_4 +184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +190 0x7FFF //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +269 0x0001 //RX_TDDRC_THRD_0 +270 0x0002 //RX_TDDRC_THRD_1 +271 0x1800 //RX_TDDRC_THRD_2 +272 0x1800 //RX_TDDRC_THRD_3 +273 0x6000 //RX_TDDRC_SLANT_0 +274 0x6E00 //RX_TDDRC_SLANT_1 +275 0x4000 //RX_TDDRC_ALPHA_UP_0 +276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x199A //RX_TDDRC_HMNC_GAIN +279 0x0001 //RX_TDDRC_SMT_FLAG +280 0x0CCD //RX_TDDRC_SMT_W +281 0x03C3 //RX_TDDRC_DRC_GAIN +195 0x0020 //RX_FDEQ_SUBNUM +196 0x4848 //RX_FDEQ_GAIN_0 +197 0x4848 //RX_FDEQ_GAIN_1 +198 0x4848 //RX_FDEQ_GAIN_2 +199 0x4870 //RX_FDEQ_GAIN_3 +200 0x4848 //RX_FDEQ_GAIN_4 +201 0x4848 //RX_FDEQ_GAIN_5 +202 0x4850 //RX_FDEQ_GAIN_6 +203 0x485C //RX_FDEQ_GAIN_7 +204 0x5C60 //RX_FDEQ_GAIN_8 +205 0x685C //RX_FDEQ_GAIN_9 +206 0x5640 //RX_FDEQ_GAIN_10 +207 0x4040 //RX_FDEQ_GAIN_11 +208 0x5C58 //RX_FDEQ_GAIN_12 +209 0x5C60 //RX_FDEQ_GAIN_13 +210 0x6060 //RX_FDEQ_GAIN_14 +211 0x6060 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0202 //RX_FDEQ_BIN_0 +221 0x0203 //RX_FDEQ_BIN_1 +222 0x0303 //RX_FDEQ_BIN_2 +223 0x0402 //RX_FDEQ_BIN_3 +224 0x0504 //RX_FDEQ_BIN_4 +225 0x0209 //RX_FDEQ_BIN_5 +226 0x0808 //RX_FDEQ_BIN_6 +227 0x090A //RX_FDEQ_BIN_7 +228 0x0B0C //RX_FDEQ_BIN_8 +229 0x0D0E //RX_FDEQ_BIN_9 +230 0x1013 //RX_FDEQ_BIN_10 +231 0x1719 //RX_FDEQ_BIN_11 +232 0x1B1E //RX_FDEQ_BIN_12 +233 0x1E1E //RX_FDEQ_BIN_13 +234 0x1E28 //RX_FDEQ_BIN_14 +235 0x282C //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x4000 //RX_FDEQ_RESRV_0 +245 0x0320 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0030 //RX_FDDRC_BAND_MARGIN_1 +248 0x0050 //RX_FDDRC_BAND_MARGIN_2 +249 0x0080 //RX_FDDRC_BAND_MARGIN_3 +250 0x0004 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x2000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x2000 //RX_FDDRC_THRD_3_2 +258 0x5000 //RX_FDDRC_THRD_3_3 +259 0x4000 //RX_FDDRC_SLANT_0_0 +260 0x4000 //RX_FDDRC_SLANT_0_1 +261 0x4000 //RX_FDDRC_SLANT_0_2 +262 0x4000 //RX_FDDRC_SLANT_0_3 +263 0x7FFF //RX_FDDRC_SLANT_1_0 +264 0x7FFF //RX_FDDRC_SLANT_1_1 +265 0x7FFF //RX_FDDRC_SLANT_1_2 +266 0x7FFF //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +286 0x001A //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 +#VOL 2 +163 0x4000 //RX_TDDRC_ALPHA_UP_1 +164 0x4000 //RX_TDDRC_ALPHA_UP_2 +165 0x4000 //RX_TDDRC_ALPHA_UP_3 +166 0x4000 //RX_TDDRC_ALPHA_UP_4 +184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +190 0x7FFF //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +269 0x0001 //RX_TDDRC_THRD_0 +270 0x0002 //RX_TDDRC_THRD_1 +271 0x1800 //RX_TDDRC_THRD_2 +272 0x1800 //RX_TDDRC_THRD_3 +273 0x6000 //RX_TDDRC_SLANT_0 +274 0x6E00 //RX_TDDRC_SLANT_1 +275 0x4000 //RX_TDDRC_ALPHA_UP_0 +276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x199A //RX_TDDRC_HMNC_GAIN +279 0x0001 //RX_TDDRC_SMT_FLAG +280 0x0CCD //RX_TDDRC_SMT_W +281 0x03C3 //RX_TDDRC_DRC_GAIN +195 0x0020 //RX_FDEQ_SUBNUM +196 0x4848 //RX_FDEQ_GAIN_0 +197 0x4848 //RX_FDEQ_GAIN_1 +198 0x4848 //RX_FDEQ_GAIN_2 +199 0x4870 //RX_FDEQ_GAIN_3 +200 0x4848 //RX_FDEQ_GAIN_4 +201 0x4848 //RX_FDEQ_GAIN_5 +202 0x4850 //RX_FDEQ_GAIN_6 +203 0x485C //RX_FDEQ_GAIN_7 +204 0x5C60 //RX_FDEQ_GAIN_8 +205 0x685C //RX_FDEQ_GAIN_9 +206 0x5640 //RX_FDEQ_GAIN_10 +207 0x4040 //RX_FDEQ_GAIN_11 +208 0x5C58 //RX_FDEQ_GAIN_12 +209 0x5C60 //RX_FDEQ_GAIN_13 +210 0x6060 //RX_FDEQ_GAIN_14 +211 0x6060 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0202 //RX_FDEQ_BIN_0 +221 0x0203 //RX_FDEQ_BIN_1 +222 0x0303 //RX_FDEQ_BIN_2 +223 0x0402 //RX_FDEQ_BIN_3 +224 0x0504 //RX_FDEQ_BIN_4 +225 0x0209 //RX_FDEQ_BIN_5 +226 0x0808 //RX_FDEQ_BIN_6 +227 0x090A //RX_FDEQ_BIN_7 +228 0x0B0C //RX_FDEQ_BIN_8 +229 0x0D0E //RX_FDEQ_BIN_9 +230 0x1013 //RX_FDEQ_BIN_10 +231 0x1719 //RX_FDEQ_BIN_11 +232 0x1B1E //RX_FDEQ_BIN_12 +233 0x1E1E //RX_FDEQ_BIN_13 +234 0x1E28 //RX_FDEQ_BIN_14 +235 0x282C //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x4000 //RX_FDEQ_RESRV_0 +245 0x0320 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0030 //RX_FDDRC_BAND_MARGIN_1 +248 0x0050 //RX_FDDRC_BAND_MARGIN_2 +249 0x0080 //RX_FDDRC_BAND_MARGIN_3 +250 0x0004 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x2000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x2000 //RX_FDDRC_THRD_3_2 +258 0x5000 //RX_FDDRC_THRD_3_3 +259 0x4000 //RX_FDDRC_SLANT_0_0 +260 0x4000 //RX_FDDRC_SLANT_0_1 +261 0x4000 //RX_FDDRC_SLANT_0_2 +262 0x4000 //RX_FDDRC_SLANT_0_3 +263 0x7FFF //RX_FDDRC_SLANT_1_0 +264 0x7FFF //RX_FDDRC_SLANT_1_1 +265 0x7FFF //RX_FDDRC_SLANT_1_2 +266 0x7FFF //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +286 0x0025 //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 +#VOL 3 +163 0x4000 //RX_TDDRC_ALPHA_UP_1 +164 0x4000 //RX_TDDRC_ALPHA_UP_2 +165 0x4000 //RX_TDDRC_ALPHA_UP_3 +166 0x4000 //RX_TDDRC_ALPHA_UP_4 +184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +190 0x7FFF //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +269 0x0001 //RX_TDDRC_THRD_0 +270 0x0002 //RX_TDDRC_THRD_1 +271 0x1800 //RX_TDDRC_THRD_2 +272 0x1800 //RX_TDDRC_THRD_3 +273 0x6000 //RX_TDDRC_SLANT_0 +274 0x6E00 //RX_TDDRC_SLANT_1 +275 0x4000 //RX_TDDRC_ALPHA_UP_0 +276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x199A //RX_TDDRC_HMNC_GAIN +279 0x0001 //RX_TDDRC_SMT_FLAG +280 0x0CCD //RX_TDDRC_SMT_W +281 0x03C3 //RX_TDDRC_DRC_GAIN +195 0x0020 //RX_FDEQ_SUBNUM +196 0x4848 //RX_FDEQ_GAIN_0 +197 0x4848 //RX_FDEQ_GAIN_1 +198 0x4848 //RX_FDEQ_GAIN_2 +199 0x4870 //RX_FDEQ_GAIN_3 +200 0x4848 //RX_FDEQ_GAIN_4 +201 0x4848 //RX_FDEQ_GAIN_5 +202 0x4850 //RX_FDEQ_GAIN_6 +203 0x485C //RX_FDEQ_GAIN_7 +204 0x5C60 //RX_FDEQ_GAIN_8 +205 0x685C //RX_FDEQ_GAIN_9 +206 0x5640 //RX_FDEQ_GAIN_10 +207 0x4040 //RX_FDEQ_GAIN_11 +208 0x5C58 //RX_FDEQ_GAIN_12 +209 0x5C60 //RX_FDEQ_GAIN_13 +210 0x6060 //RX_FDEQ_GAIN_14 +211 0x6060 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0202 //RX_FDEQ_BIN_0 +221 0x0203 //RX_FDEQ_BIN_1 +222 0x0303 //RX_FDEQ_BIN_2 +223 0x0402 //RX_FDEQ_BIN_3 +224 0x0504 //RX_FDEQ_BIN_4 +225 0x0209 //RX_FDEQ_BIN_5 +226 0x0808 //RX_FDEQ_BIN_6 +227 0x090A //RX_FDEQ_BIN_7 +228 0x0B0C //RX_FDEQ_BIN_8 +229 0x0D0E //RX_FDEQ_BIN_9 +230 0x1013 //RX_FDEQ_BIN_10 +231 0x1719 //RX_FDEQ_BIN_11 +232 0x1B1E //RX_FDEQ_BIN_12 +233 0x1E1E //RX_FDEQ_BIN_13 +234 0x1E28 //RX_FDEQ_BIN_14 +235 0x282C //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x4000 //RX_FDEQ_RESRV_0 +245 0x0320 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0030 //RX_FDDRC_BAND_MARGIN_1 +248 0x0050 //RX_FDDRC_BAND_MARGIN_2 +249 0x0080 //RX_FDDRC_BAND_MARGIN_3 +250 0x0004 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x2000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x2000 //RX_FDDRC_THRD_3_2 +258 0x5000 //RX_FDDRC_THRD_3_3 +259 0x4000 //RX_FDDRC_SLANT_0_0 +260 0x4000 //RX_FDDRC_SLANT_0_1 +261 0x4000 //RX_FDDRC_SLANT_0_2 +262 0x4000 //RX_FDDRC_SLANT_0_3 +263 0x7FFF //RX_FDDRC_SLANT_1_0 +264 0x7FFF //RX_FDDRC_SLANT_1_1 +265 0x7FFF //RX_FDDRC_SLANT_1_2 +266 0x7FFF //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +286 0x0034 //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 +#VOL 4 +163 0x4000 //RX_TDDRC_ALPHA_UP_1 +164 0x4000 //RX_TDDRC_ALPHA_UP_2 +165 0x4000 //RX_TDDRC_ALPHA_UP_3 +166 0x4000 //RX_TDDRC_ALPHA_UP_4 +184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +190 0x7FFF //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +269 0x0001 //RX_TDDRC_THRD_0 +270 0x0002 //RX_TDDRC_THRD_1 +271 0x1800 //RX_TDDRC_THRD_2 +272 0x1800 //RX_TDDRC_THRD_3 +273 0x6000 //RX_TDDRC_SLANT_0 +274 0x6E00 //RX_TDDRC_SLANT_1 +275 0x4000 //RX_TDDRC_ALPHA_UP_0 +276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x199A //RX_TDDRC_HMNC_GAIN +279 0x0001 //RX_TDDRC_SMT_FLAG +280 0x0CCD //RX_TDDRC_SMT_W +281 0x03C3 //RX_TDDRC_DRC_GAIN +195 0x0020 //RX_FDEQ_SUBNUM +196 0x4848 //RX_FDEQ_GAIN_0 +197 0x4848 //RX_FDEQ_GAIN_1 +198 0x4848 //RX_FDEQ_GAIN_2 +199 0x4870 //RX_FDEQ_GAIN_3 +200 0x4848 //RX_FDEQ_GAIN_4 +201 0x4848 //RX_FDEQ_GAIN_5 +202 0x4850 //RX_FDEQ_GAIN_6 +203 0x485C //RX_FDEQ_GAIN_7 +204 0x5C60 //RX_FDEQ_GAIN_8 +205 0x685C //RX_FDEQ_GAIN_9 +206 0x5640 //RX_FDEQ_GAIN_10 +207 0x4040 //RX_FDEQ_GAIN_11 +208 0x5C58 //RX_FDEQ_GAIN_12 +209 0x5C60 //RX_FDEQ_GAIN_13 +210 0x6060 //RX_FDEQ_GAIN_14 +211 0x6060 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0202 //RX_FDEQ_BIN_0 +221 0x0203 //RX_FDEQ_BIN_1 +222 0x0303 //RX_FDEQ_BIN_2 +223 0x0402 //RX_FDEQ_BIN_3 +224 0x0504 //RX_FDEQ_BIN_4 +225 0x0209 //RX_FDEQ_BIN_5 +226 0x0808 //RX_FDEQ_BIN_6 +227 0x090A //RX_FDEQ_BIN_7 +228 0x0B0C //RX_FDEQ_BIN_8 +229 0x0D0E //RX_FDEQ_BIN_9 +230 0x1013 //RX_FDEQ_BIN_10 +231 0x1719 //RX_FDEQ_BIN_11 +232 0x1B1E //RX_FDEQ_BIN_12 +233 0x1E1E //RX_FDEQ_BIN_13 +234 0x1E28 //RX_FDEQ_BIN_14 +235 0x282C //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x4000 //RX_FDEQ_RESRV_0 +245 0x0320 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0030 //RX_FDDRC_BAND_MARGIN_1 +248 0x0050 //RX_FDDRC_BAND_MARGIN_2 +249 0x0080 //RX_FDDRC_BAND_MARGIN_3 +250 0x0004 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x2000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x2000 //RX_FDDRC_THRD_3_2 +258 0x5000 //RX_FDDRC_THRD_3_3 +259 0x4000 //RX_FDDRC_SLANT_0_0 +260 0x4000 //RX_FDDRC_SLANT_0_1 +261 0x4000 //RX_FDDRC_SLANT_0_2 +262 0x4000 //RX_FDDRC_SLANT_0_3 +263 0x7FFF //RX_FDDRC_SLANT_1_0 +264 0x7FFF //RX_FDDRC_SLANT_1_1 +265 0x7FFF //RX_FDDRC_SLANT_1_2 +266 0x7FFF //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +286 0x004D //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 +#VOL 5 +163 0x4000 //RX_TDDRC_ALPHA_UP_1 +164 0x4000 //RX_TDDRC_ALPHA_UP_2 +165 0x4000 //RX_TDDRC_ALPHA_UP_3 +166 0x4000 //RX_TDDRC_ALPHA_UP_4 +184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +190 0x7FFF //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +269 0x0001 //RX_TDDRC_THRD_0 +270 0x0002 //RX_TDDRC_THRD_1 +271 0x1800 //RX_TDDRC_THRD_2 +272 0x1800 //RX_TDDRC_THRD_3 +273 0x6000 //RX_TDDRC_SLANT_0 +274 0x6E00 //RX_TDDRC_SLANT_1 +275 0x4000 //RX_TDDRC_ALPHA_UP_0 +276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x199A //RX_TDDRC_HMNC_GAIN +279 0x0001 //RX_TDDRC_SMT_FLAG +280 0x0CCD //RX_TDDRC_SMT_W +281 0x03C3 //RX_TDDRC_DRC_GAIN +195 0x0020 //RX_FDEQ_SUBNUM +196 0x4848 //RX_FDEQ_GAIN_0 +197 0x4848 //RX_FDEQ_GAIN_1 +198 0x4848 //RX_FDEQ_GAIN_2 +199 0x4870 //RX_FDEQ_GAIN_3 +200 0x4848 //RX_FDEQ_GAIN_4 +201 0x4848 //RX_FDEQ_GAIN_5 +202 0x4850 //RX_FDEQ_GAIN_6 +203 0x485C //RX_FDEQ_GAIN_7 +204 0x5C60 //RX_FDEQ_GAIN_8 +205 0x685C //RX_FDEQ_GAIN_9 +206 0x5640 //RX_FDEQ_GAIN_10 +207 0x4040 //RX_FDEQ_GAIN_11 +208 0x5C58 //RX_FDEQ_GAIN_12 +209 0x5C60 //RX_FDEQ_GAIN_13 +210 0x6060 //RX_FDEQ_GAIN_14 +211 0x6060 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0202 //RX_FDEQ_BIN_0 +221 0x0203 //RX_FDEQ_BIN_1 +222 0x0303 //RX_FDEQ_BIN_2 +223 0x0402 //RX_FDEQ_BIN_3 +224 0x0504 //RX_FDEQ_BIN_4 +225 0x0209 //RX_FDEQ_BIN_5 +226 0x0808 //RX_FDEQ_BIN_6 +227 0x090A //RX_FDEQ_BIN_7 +228 0x0B0C //RX_FDEQ_BIN_8 +229 0x0D0E //RX_FDEQ_BIN_9 +230 0x1013 //RX_FDEQ_BIN_10 +231 0x1719 //RX_FDEQ_BIN_11 +232 0x1B1E //RX_FDEQ_BIN_12 +233 0x1E1E //RX_FDEQ_BIN_13 +234 0x1E28 //RX_FDEQ_BIN_14 +235 0x282C //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x4000 //RX_FDEQ_RESRV_0 +245 0x0320 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0030 //RX_FDDRC_BAND_MARGIN_1 +248 0x0050 //RX_FDDRC_BAND_MARGIN_2 +249 0x0080 //RX_FDDRC_BAND_MARGIN_3 +250 0x0004 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x2000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x2000 //RX_FDDRC_THRD_3_2 +258 0x5000 //RX_FDDRC_THRD_3_3 +259 0x4000 //RX_FDDRC_SLANT_0_0 +260 0x4000 //RX_FDDRC_SLANT_0_1 +261 0x4000 //RX_FDDRC_SLANT_0_2 +262 0x4000 //RX_FDDRC_SLANT_0_3 +263 0x7FFF //RX_FDDRC_SLANT_1_0 +264 0x7FFF //RX_FDDRC_SLANT_1_1 +265 0x7FFF //RX_FDDRC_SLANT_1_2 +266 0x7FFF //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +286 0x0074 //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 +#VOL 6 +163 0x4000 //RX_TDDRC_ALPHA_UP_1 +164 0x4000 //RX_TDDRC_ALPHA_UP_2 +165 0x4000 //RX_TDDRC_ALPHA_UP_3 +166 0x4000 //RX_TDDRC_ALPHA_UP_4 +184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +190 0x7FFF //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +269 0x0001 //RX_TDDRC_THRD_0 +270 0x0002 //RX_TDDRC_THRD_1 +271 0x1800 //RX_TDDRC_THRD_2 +272 0x1800 //RX_TDDRC_THRD_3 +273 0x6000 //RX_TDDRC_SLANT_0 +274 0x6E00 //RX_TDDRC_SLANT_1 +275 0x4000 //RX_TDDRC_ALPHA_UP_0 +276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x199A //RX_TDDRC_HMNC_GAIN +279 0x0001 //RX_TDDRC_SMT_FLAG +280 0x0CCD //RX_TDDRC_SMT_W +281 0x03C3 //RX_TDDRC_DRC_GAIN +195 0x0020 //RX_FDEQ_SUBNUM +196 0x4848 //RX_FDEQ_GAIN_0 +197 0x4848 //RX_FDEQ_GAIN_1 +198 0x4848 //RX_FDEQ_GAIN_2 +199 0x4870 //RX_FDEQ_GAIN_3 +200 0x4848 //RX_FDEQ_GAIN_4 +201 0x4848 //RX_FDEQ_GAIN_5 +202 0x4850 //RX_FDEQ_GAIN_6 +203 0x485C //RX_FDEQ_GAIN_7 +204 0x5C60 //RX_FDEQ_GAIN_8 +205 0x685C //RX_FDEQ_GAIN_9 +206 0x5640 //RX_FDEQ_GAIN_10 +207 0x4040 //RX_FDEQ_GAIN_11 +208 0x5C58 //RX_FDEQ_GAIN_12 +209 0x5C60 //RX_FDEQ_GAIN_13 +210 0x6060 //RX_FDEQ_GAIN_14 +211 0x6060 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0202 //RX_FDEQ_BIN_0 +221 0x0203 //RX_FDEQ_BIN_1 +222 0x0303 //RX_FDEQ_BIN_2 +223 0x0402 //RX_FDEQ_BIN_3 +224 0x0504 //RX_FDEQ_BIN_4 +225 0x0209 //RX_FDEQ_BIN_5 +226 0x0808 //RX_FDEQ_BIN_6 +227 0x090A //RX_FDEQ_BIN_7 +228 0x0B0C //RX_FDEQ_BIN_8 +229 0x0D0E //RX_FDEQ_BIN_9 +230 0x1013 //RX_FDEQ_BIN_10 +231 0x1719 //RX_FDEQ_BIN_11 +232 0x1B1E //RX_FDEQ_BIN_12 +233 0x1E1E //RX_FDEQ_BIN_13 +234 0x1E28 //RX_FDEQ_BIN_14 +235 0x282C //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x4000 //RX_FDEQ_RESRV_0 +245 0x0320 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0030 //RX_FDDRC_BAND_MARGIN_1 +248 0x0050 //RX_FDDRC_BAND_MARGIN_2 +249 0x0080 //RX_FDDRC_BAND_MARGIN_3 +250 0x0004 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x2000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x2000 //RX_FDDRC_THRD_3_2 +258 0x5000 //RX_FDDRC_THRD_3_3 +259 0x4000 //RX_FDDRC_SLANT_0_0 +260 0x4000 //RX_FDDRC_SLANT_0_1 +261 0x4000 //RX_FDDRC_SLANT_0_2 +262 0x4000 //RX_FDDRC_SLANT_0_3 +263 0x7FFF //RX_FDDRC_SLANT_1_0 +264 0x7FFF //RX_FDDRC_SLANT_1_1 +265 0x7FFF //RX_FDDRC_SLANT_1_2 +266 0x7FFF //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +286 0x0100 //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 #CASE_NAME HANDSFREE-HANDSFREE-CUSTOM2-FB -#PARAM_TYPE TX+RX -#TOTAL_CUSTOM_STEP 7 +#PARAM_MODE FULL +#PARAM_TYPE TX+2RX +#TOTAL_CUSTOM_STEP 7+7 #TX 0 0x0001 //TX_OPERATION_MODE_0 1 0x0001 //TX_OPERATION_MODE_1 @@ -2011,11 +2929,11 @@ 248 0xF800 //TX_THR_SN_EST_6 249 0xF800 //TX_THR_SN_EST_7 250 0x0100 //TX_DELTA_THR_SN_EST_0 -251 0x0200 //TX_DELTA_THR_SN_EST_1 -252 0x0100 //TX_DELTA_THR_SN_EST_2 -253 0x0200 //TX_DELTA_THR_SN_EST_3 +251 0x0100 //TX_DELTA_THR_SN_EST_1 +252 0x0200 //TX_DELTA_THR_SN_EST_2 +253 0x0100 //TX_DELTA_THR_SN_EST_3 254 0x0100 //TX_DELTA_THR_SN_EST_4 -255 0x0100 //TX_DELTA_THR_SN_EST_5 +255 0x0200 //TX_DELTA_THR_SN_EST_5 256 0x0200 //TX_DELTA_THR_SN_EST_6 257 0x0200 //TX_DELTA_THR_SN_EST_7 258 0x4000 //TX_LAMBDA_NN_EST_0 @@ -2043,11 +2961,11 @@ 280 0x1000 //TX_B_POST_FLT_1 281 0x0010 //TX_NS_LVL_CTRL_0 282 0x0014 //TX_NS_LVL_CTRL_1 -283 0x0014 //TX_NS_LVL_CTRL_2 -284 0x0018 //TX_NS_LVL_CTRL_3 -285 0x0016 //TX_NS_LVL_CTRL_4 -286 0x0014 //TX_NS_LVL_CTRL_5 -287 0x0011 //TX_NS_LVL_CTRL_6 +283 0x0018 //TX_NS_LVL_CTRL_2 +284 0x0016 //TX_NS_LVL_CTRL_3 +285 0x0014 //TX_NS_LVL_CTRL_4 +286 0x0011 //TX_NS_LVL_CTRL_5 +287 0x0014 //TX_NS_LVL_CTRL_6 288 0x0011 //TX_NS_LVL_CTRL_7 289 0x000F //TX_MIN_GAIN_S_0 290 0x0010 //TX_MIN_GAIN_S_1 @@ -2065,8 +2983,8 @@ 302 0x4000 //TX_SNRI_SUP_2 303 0x4000 //TX_SNRI_SUP_3 304 0x4000 //TX_SNRI_SUP_4 -305 0x4000 //TX_SNRI_SUP_5 -306 0x50C0 //TX_SNRI_SUP_6 +305 0x50C0 //TX_SNRI_SUP_5 +306 0x4000 //TX_SNRI_SUP_6 307 0x7FFF //TX_SNRI_SUP_7 308 0x7FFF //TX_THR_LFNS 309 0x0018 //TX_G_LFNS @@ -2075,19 +2993,19 @@ 312 0x7FFF //TX_A_POST_FILT_0 313 0x2000 //TX_A_POST_FILT_1 314 0x5000 //TX_A_POST_FILT_S_0 -315 0x6000 //TX_A_POST_FILT_S_1 -316 0x4C00 //TX_A_POST_FILT_S_2 -317 0x4000 //TX_A_POST_FILT_S_3 -318 0x6000 //TX_A_POST_FILT_S_4 -319 0x4000 //TX_A_POST_FILT_S_5 -320 0x5000 //TX_A_POST_FILT_S_6 +315 0x4C00 //TX_A_POST_FILT_S_1 +316 0x4000 //TX_A_POST_FILT_S_2 +317 0x6000 //TX_A_POST_FILT_S_3 +318 0x4000 //TX_A_POST_FILT_S_4 +319 0x5000 //TX_A_POST_FILT_S_5 +320 0x6000 //TX_A_POST_FILT_S_6 321 0x7000 //TX_A_POST_FILT_S_7 322 0x2000 //TX_B_POST_FILT_0 -323 0x1000 //TX_B_POST_FILT_1 +323 0x2000 //TX_B_POST_FILT_1 324 0x2000 //TX_B_POST_FILT_2 -325 0x2000 //TX_B_POST_FILT_3 +325 0x4000 //TX_B_POST_FILT_3 326 0x4000 //TX_B_POST_FILT_4 -327 0x4000 //TX_B_POST_FILT_5 +327 0x1000 //TX_B_POST_FILT_5 328 0x1000 //TX_B_POST_FILT_6 329 0x2000 //TX_B_POST_FILT_7 330 0x4000 //TX_B_LESSCUT_RTO_S_0 @@ -2095,14 +3013,14 @@ 332 0x7FFF //TX_B_LESSCUT_RTO_S_2 333 0x7FFF //TX_B_LESSCUT_RTO_S_3 334 0x7FFF //TX_B_LESSCUT_RTO_S_4 -335 0x7FFF //TX_B_LESSCUT_RTO_S_5 -336 0x6000 //TX_B_LESSCUT_RTO_S_6 +335 0x6000 //TX_B_LESSCUT_RTO_S_5 +336 0x7FFF //TX_B_LESSCUT_RTO_S_6 337 0x7FFF //TX_B_LESSCUT_RTO_S_7 338 0x7C00 //TX_LAMBDA_PFILT 339 0x7C00 //TX_LAMBDA_PFILT_S_0 340 0x7C00 //TX_LAMBDA_PFILT_S_1 -341 0x7C00 //TX_LAMBDA_PFILT_S_2 -342 0x7A00 //TX_LAMBDA_PFILT_S_3 +341 0x7A00 //TX_LAMBDA_PFILT_S_2 +342 0x7C00 //TX_LAMBDA_PFILT_S_3 343 0x7C00 //TX_LAMBDA_PFILT_S_4 344 0x7C00 //TX_LAMBDA_PFILT_S_5 345 0x7C00 //TX_LAMBDA_PFILT_S_6 @@ -2140,10 +3058,10 @@ 377 0x7FFF //TX_NOISE_TH_5_4 378 0x2710 //TX_NOISE_TH_6 379 0x0033 //TX_MINENOISE_TH -380 0x4000 //TX_MINENOISE_MIC0_TH_MTS -381 0xFFEE //TX_MINENOISE_MIC0_TH_EXP -382 0x6000 //TX_MINENOISE_MIC0_S_TH_MTS -383 0xFFF3 //TX_MINENOISE_MIC0_S_TH_EXP +380 0xD508 //TX_MORENS_TFMASK_TH +381 0x0001 //TX_DRC_QUIET_FLOOR +382 0x7999 //TX_RATIODTL_CUT_TH +383 0x0119 //TX_DT_CUT_K1 384 0x0666 //TX_OUT_ENER_S_TH_CLEAN 385 0x0666 //TX_OUT_ENER_S_TH_LESSCLEAN 386 0x0333 //TX_OUT_ENER_S_TH_NOISY @@ -2151,15 +3069,15 @@ 388 0x0333 //TX_OUT_ENER_TH_SPEECH 389 0x2000 //TX_SN_NPB_GAIN 390 0x0000 //TX_NN_NPB_GAIN -391 0x0000 //TX_CSX_ALPHA_0 -392 0x0000 //TX_CSX_ALPHA_1 -393 0x0000 //TX_CSX_ALPHA_2 -394 0x0000 //TX_CSX_ALPHA_3 -395 0x0800 //TX_MU_ARSP_EST -396 0x00C8 //TX_P_OUTBEAM_MIN_TH +391 0x7FFF //TX_POST_MASK_SUP_HSNE +392 0x1388 //TX_TAIL_DET_TH +393 0x4000 //TX_B_LESSCUT_RTO_WTA +394 0x0000 //TX_MEL_G_R +395 0x0080 //TX_SUPHIGH_TH +396 0x0000 //TX_MASK_G_R 397 0x0002 //TX_EXTRA_NS_L -398 0x0800 //TX_EXTRA_NS_A -399 0x0005 //TX_VR_NOISE_FLOOR_TH +398 0x1800 //TX_C_POST_FLT_MASK +399 0x4000 //TX_A_POST_FLT_WNS 400 0x0148 //TX_MIN_G_LOW300HZ 401 0x0002 //TX_MAXLEVEL_CNG 402 0x00B4 //TX_STN_NOISE_TH @@ -2274,16 +3192,16 @@ 511 0x6666 //TX_MIC_TO_BFGAIN 512 0x0000 //TX_MICTOBFGAIN0 513 0x0000 //TX_FASTMUE_TH -514 0x0000 //TX_DERVB_LEN_0 -515 0x0000 //TX_DERVB_LEN_1 -516 0x0000 //TX_RHO_DERVB -517 0x0000 //TX_MIC_INDX_DERVB -518 0x0000 //TX_MU_DERVB -519 0x0000 //TX_DR_RESRV_0 -520 0x0000 //TX_DR_RESRV_1 -521 0x0000 //TX_DR_RESRV_2 -522 0x0000 //TX_DR_RESRV_3 -523 0x0000 //TX_DR_RESRV_4 +514 0x3000 //TX_DEREVERB_LF_MU +515 0x34CD //TX_DEREVERB_HF_MU +516 0x0007 //TX_DEREVERB_DELAY +517 0x0004 //TX_DEREVERB_COEF_LEN +518 0x0003 //TX_DEREVERB_DNR +519 0x0000 //TX_DEREVERB_ALPHA +520 0x0000 //TX_DEREVERB_BETA +521 0x3A98 //TX_GSC_RTOL_TH +522 0x3A98 //TX_GSC_RTOH_TH +523 0x7E2C //TX_WIDE2_MEANHTH 524 0x0000 //TX_DR_RESRV_5 525 0x0000 //TX_DR_RESRV_6 526 0x0000 //TX_DR_RESRV_7 @@ -2657,6 +3575,71 @@ 894 0xC000 //TX_FASTNS_SSA_THHFL 895 0xCCCC //TX_FASTNS_SSA_THLFH 896 0xD999 //TX_FASTNS_SSA_THHFH +897 0x2339 //TX_SENDFUNC_REG_MICMUTE +898 0x0021 //TX_SENDFUNC_REG_MICMUTE1 +899 0x02BC //TX_MICMUTE_RATIO_THR +900 0x0140 //TX_MICMUTE_AMP_THR +901 0x0004 //TX_MICMUTE_HPF_IND +902 0x00C0 //TX_MICMUTE_LOG_EYR_TH +903 0x0008 //TX_MICMUTE_CVG_TIME +904 0x0008 //TX_MICMUTE_RELEASE_TIME +905 0x01FE //TX_MIC_VOLUME_MIC0MUTE +906 0x0020 //TX_MICMUTE_EPD_OFFSET_0 +907 0x001E //TX_MICMUTE_FRQ_AEC_L +908 0x7999 //TX_MICMUTE_EAD_THR +909 0x7FFF //TX_MICMUTE_LAMBDA_CB_NLE +910 0x7FFF //TX_MICMUTE_LAMBDA_RE_EST +911 0x4000 //TX_DTD_THR1_MICMUTE_0 +912 0x7000 //TX_DTD_THR1_MICMUTE_1 +913 0x7FFF //TX_DTD_THR1_MICMUTE_2 +914 0x7FFF //TX_DTD_THR1_MICMUTE_3 +915 0x6CCC //TX_DTD_THR2_MICMUTE_0 +916 0x0400 //TX_MICMUTE_MIN_EQ_RE_EST_0 +917 0x0400 //TX_MICMUTE_MIN_EQ_RE_EST_1 +918 0x1000 //TX_MICMUTE_MIN_EQ_RE_EST_2 +919 0x7FFF //TX_MICMUTE_MIN_EQ_RE_EST_3 +920 0x7FFF //TX_MICMUTE_MIN_EQ_RE_EST_4 +921 0x4000 //TX_MICMUTE_C_POST_FLT +922 0x03E8 //TX_MICMUTE_DT_CUT_K +923 0x0001 //TX_MICMUTE_DT_CUT_THR +924 0x03E8 //TX_MICMUTE_DT_CUT_K2 +925 0x0001 //TX_MICMUTE_DT_CUT_THR2 +926 0x0064 //TX_MICMUTE_DT2_HOLD_N +927 0x1000 //TX_MICMUTE_RATIODTH_THCUT +928 0x1000 //TX_MICMUTE_B_POST_FLT_ECHOL +929 0x7FFF //TX_MICMUTE_B_POST_FLT_ECHOH +930 0x0400 //TX_MICMUTE_C_POST_FLT_MASK +931 0x7999 //TX_MICMUTE_RATIODTL_CUT_TH +932 0x0258 //TX_MICMUTE_DT_CUT_K1 +933 0x0800 //TX_MICMUTE_N2_SN_EST +934 0xFC00 //TX_MICMUTE_THR_SN_EST_0 +935 0x001C //TX_MICMUTE_MIN_G_CTRL_0 +936 0x6000 //TX_MICMUTE_A_POST_FILT_S_0 +937 0x7000 //TX_MICMUTE_B_POST_FILT_0 +938 0x2710 //TX_MIC1RUB_AMP_THR +939 0x0010 //TX_MIC1MUTE_RATIO_THR +940 0x0450 //TX_MIC1MUTE_AMP_THR +941 0x0008 //TX_MIC1MUTE_CVG_TIME +942 0x0008 //TX_MIC1MUTE_RELEASE_TIME +943 0x0000 //TX_AMS_RESRV_01 +944 0x0000 //TX_AMS_RESRV_02 +945 0x0000 //TX_AMS_RESRV_03 +946 0x0000 //TX_AMS_RESRV_04 +947 0x0000 //TX_AMS_RESRV_05 +948 0x0000 //TX_AMS_RESRV_06 +949 0x0000 //TX_AMS_RESRV_07 +950 0x0000 //TX_AMS_RESRV_08 +951 0x0000 //TX_AMS_RESRV_09 +952 0x0000 //TX_AMS_RESRV_10 +953 0x0000 //TX_AMS_RESRV_11 +954 0x0000 //TX_AMS_RESRV_12 +955 0x0000 //TX_AMS_RESRV_13 +956 0x0000 //TX_AMS_RESRV_14 +957 0x0000 //TX_AMS_RESRV_15 +958 0x0000 //TX_AMS_RESRV_16 +959 0x0000 //TX_AMS_RESRV_17 +960 0x0000 //TX_AMS_RESRV_18 +961 0x0000 //TX_AMS_RESRV_19 #RX 0 0x006C //RX_RECVFUNC_MODE_0 1 0x0000 //RX_RECVFUNC_MODE_1 @@ -3508,10 +4491,862 @@ 110 0x0000 //RX_FDDRC_RESRV_0 129 0x0100 //RX_SPK_VOL 130 0x0000 //RX_VOL_RESRV_0 +#RX 2 +157 0x006C //RX_RECVFUNC_MODE_0 +158 0x0000 //RX_RECVFUNC_MODE_1 +159 0x0004 //RX_SAMPLINGFREQ_SIG +160 0x0004 //RX_SAMPLINGFREQ_PROC +161 0x000A //RX_FRAME_SZ +162 0x0000 //RX_DELAY_OPT +163 0x4000 //RX_TDDRC_ALPHA_UP_1 +164 0x4000 //RX_TDDRC_ALPHA_UP_2 +165 0x4000 //RX_TDDRC_ALPHA_UP_3 +166 0x4000 //RX_TDDRC_ALPHA_UP_4 +167 0x065B //RX_PGA +168 0x7E56 //RX_A_HP +169 0x4000 //RX_B_PE +170 0x7800 //RX_THR_PITCH_DET_0 +171 0x7000 //RX_THR_PITCH_DET_1 +172 0x6000 //RX_THR_PITCH_DET_2 +173 0x0008 //RX_PITCH_BFR_LEN +174 0x0003 //RX_SBD_PITCH_DET +175 0x0100 //RX_PP_RESRV_0 +176 0x0020 //RX_PP_RESRV_1 +177 0x0400 //RX_N_SN_EST +178 0x000C //RX_N2_SN_EST +179 0x0014 //RX_NS_LVL_CTRL +180 0xF400 //RX_THR_SN_EST +181 0x7E00 //RX_LAMBDA_PFILT +182 0x00C8 //RX_FENS_RESRV_0 +183 0x0190 //RX_FENS_RESRV_1 +184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +187 0x0002 //RX_EXTRA_NS_L +188 0x0800 //RX_EXTRA_NS_A +189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +190 0x7FFF //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +192 0x199A //RX_A_POST_FLT +193 0x0000 //RX_LMT_THRD +194 0x4000 //RX_LMT_ALPHA +195 0x0020 //RX_FDEQ_SUBNUM +196 0x4848 //RX_FDEQ_GAIN_0 +197 0x4848 //RX_FDEQ_GAIN_1 +198 0x4848 //RX_FDEQ_GAIN_2 +199 0x4870 //RX_FDEQ_GAIN_3 +200 0x4848 //RX_FDEQ_GAIN_4 +201 0x4848 //RX_FDEQ_GAIN_5 +202 0x4850 //RX_FDEQ_GAIN_6 +203 0x485C //RX_FDEQ_GAIN_7 +204 0x5C60 //RX_FDEQ_GAIN_8 +205 0x685C //RX_FDEQ_GAIN_9 +206 0x5640 //RX_FDEQ_GAIN_10 +207 0x4040 //RX_FDEQ_GAIN_11 +208 0x5C58 //RX_FDEQ_GAIN_12 +209 0x5C60 //RX_FDEQ_GAIN_13 +210 0x6060 //RX_FDEQ_GAIN_14 +211 0x6060 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0202 //RX_FDEQ_BIN_0 +221 0x0203 //RX_FDEQ_BIN_1 +222 0x0303 //RX_FDEQ_BIN_2 +223 0x0402 //RX_FDEQ_BIN_3 +224 0x0504 //RX_FDEQ_BIN_4 +225 0x0209 //RX_FDEQ_BIN_5 +226 0x0808 //RX_FDEQ_BIN_6 +227 0x090A //RX_FDEQ_BIN_7 +228 0x0B0C //RX_FDEQ_BIN_8 +229 0x0D0E //RX_FDEQ_BIN_9 +230 0x1013 //RX_FDEQ_BIN_10 +231 0x1719 //RX_FDEQ_BIN_11 +232 0x1B1E //RX_FDEQ_BIN_12 +233 0x1E1E //RX_FDEQ_BIN_13 +234 0x1E28 //RX_FDEQ_BIN_14 +235 0x282C //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x4000 //RX_FDEQ_RESRV_0 +245 0x0320 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0030 //RX_FDDRC_BAND_MARGIN_1 +248 0x0050 //RX_FDDRC_BAND_MARGIN_2 +249 0x0080 //RX_FDDRC_BAND_MARGIN_3 +250 0x0004 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x2000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x2000 //RX_FDDRC_THRD_3_2 +258 0x5000 //RX_FDDRC_THRD_3_3 +259 0x4000 //RX_FDDRC_SLANT_0_0 +260 0x4000 //RX_FDDRC_SLANT_0_1 +261 0x4000 //RX_FDDRC_SLANT_0_2 +262 0x4000 //RX_FDDRC_SLANT_0_3 +263 0x7FFF //RX_FDDRC_SLANT_1_0 +264 0x7FFF //RX_FDDRC_SLANT_1_1 +265 0x7FFF //RX_FDDRC_SLANT_1_2 +266 0x7FFF //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +268 0x0002 //RX_FILTINDX +269 0x0001 //RX_TDDRC_THRD_0 +270 0x0002 //RX_TDDRC_THRD_1 +271 0x1800 //RX_TDDRC_THRD_2 +272 0x1800 //RX_TDDRC_THRD_3 +273 0x6000 //RX_TDDRC_SLANT_0 +274 0x6E00 //RX_TDDRC_SLANT_1 +275 0x4000 //RX_TDDRC_ALPHA_UP_0 +276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x199A //RX_TDDRC_HMNC_GAIN +279 0x0001 //RX_TDDRC_SMT_FLAG +280 0x0CCD //RX_TDDRC_SMT_W +281 0x03C3 //RX_TDDRC_DRC_GAIN +282 0x7C00 //RX_LAMBDA_PKA_FP +283 0x2000 //RX_TPKA_FP +284 0x2000 //RX_MIN_G_FP +285 0x0080 //RX_MAX_G_FP +286 0x0012 //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 +288 0x0000 //RX_MAXLEVEL_CNG +289 0x3000 //RX_BWE_UV_TH +290 0x3000 //RX_BWE_UV_TH2 +291 0x1800 //RX_BWE_UV_TH3 +292 0x1000 //RX_BWE_V_TH +293 0x04CD //RX_BWE_GAIN1_V_TH1 +294 0x0F33 //RX_BWE_GAIN1_V_TH2 +295 0x7333 //RX_BWE_UV_EQ +296 0x199A //RX_BWE_V_EQ +297 0x7333 //RX_BWE_TONE_TH +298 0x0004 //RX_BWE_UV_HOLD_T +299 0x6CCD //RX_BWE_GAIN2_ALPHA +300 0x799A //RX_BWE_GAIN3_ALPHA +301 0x001E //RX_BWE_CUTOFF +302 0x3000 //RX_BWE_GAINFILL +303 0x3200 //RX_BWE_MAXTH_TONE +304 0x2000 //RX_BWE_EQ_0 +305 0x2000 //RX_BWE_EQ_1 +306 0x2000 //RX_BWE_EQ_2 +307 0x2000 //RX_BWE_EQ_3 +308 0x2000 //RX_BWE_EQ_4 +309 0x2000 //RX_BWE_EQ_5 +310 0x2000 //RX_BWE_EQ_6 +311 0x0000 //RX_BWE_RESRV_0 +312 0x0000 //RX_BWE_RESRV_1 +313 0x0000 //RX_BWE_RESRV_2 +#VOL 0 +163 0x4000 //RX_TDDRC_ALPHA_UP_1 +164 0x4000 //RX_TDDRC_ALPHA_UP_2 +165 0x4000 //RX_TDDRC_ALPHA_UP_3 +166 0x4000 //RX_TDDRC_ALPHA_UP_4 +184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +190 0x7FFF //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +269 0x0001 //RX_TDDRC_THRD_0 +270 0x0002 //RX_TDDRC_THRD_1 +271 0x1800 //RX_TDDRC_THRD_2 +272 0x1800 //RX_TDDRC_THRD_3 +273 0x6000 //RX_TDDRC_SLANT_0 +274 0x6E00 //RX_TDDRC_SLANT_1 +275 0x4000 //RX_TDDRC_ALPHA_UP_0 +276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x199A //RX_TDDRC_HMNC_GAIN +279 0x0001 //RX_TDDRC_SMT_FLAG +280 0x0CCD //RX_TDDRC_SMT_W +281 0x03C3 //RX_TDDRC_DRC_GAIN +195 0x0020 //RX_FDEQ_SUBNUM +196 0x4848 //RX_FDEQ_GAIN_0 +197 0x4848 //RX_FDEQ_GAIN_1 +198 0x4848 //RX_FDEQ_GAIN_2 +199 0x4870 //RX_FDEQ_GAIN_3 +200 0x4848 //RX_FDEQ_GAIN_4 +201 0x4848 //RX_FDEQ_GAIN_5 +202 0x4850 //RX_FDEQ_GAIN_6 +203 0x485C //RX_FDEQ_GAIN_7 +204 0x5C60 //RX_FDEQ_GAIN_8 +205 0x685C //RX_FDEQ_GAIN_9 +206 0x5640 //RX_FDEQ_GAIN_10 +207 0x4040 //RX_FDEQ_GAIN_11 +208 0x5C58 //RX_FDEQ_GAIN_12 +209 0x5C60 //RX_FDEQ_GAIN_13 +210 0x6060 //RX_FDEQ_GAIN_14 +211 0x6060 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0202 //RX_FDEQ_BIN_0 +221 0x0203 //RX_FDEQ_BIN_1 +222 0x0303 //RX_FDEQ_BIN_2 +223 0x0402 //RX_FDEQ_BIN_3 +224 0x0504 //RX_FDEQ_BIN_4 +225 0x0209 //RX_FDEQ_BIN_5 +226 0x0808 //RX_FDEQ_BIN_6 +227 0x090A //RX_FDEQ_BIN_7 +228 0x0B0C //RX_FDEQ_BIN_8 +229 0x0D0E //RX_FDEQ_BIN_9 +230 0x1013 //RX_FDEQ_BIN_10 +231 0x1719 //RX_FDEQ_BIN_11 +232 0x1B1E //RX_FDEQ_BIN_12 +233 0x1E1E //RX_FDEQ_BIN_13 +234 0x1E28 //RX_FDEQ_BIN_14 +235 0x282C //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x4000 //RX_FDEQ_RESRV_0 +245 0x0320 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0030 //RX_FDDRC_BAND_MARGIN_1 +248 0x0050 //RX_FDDRC_BAND_MARGIN_2 +249 0x0080 //RX_FDDRC_BAND_MARGIN_3 +250 0x0004 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x2000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x2000 //RX_FDDRC_THRD_3_2 +258 0x5000 //RX_FDDRC_THRD_3_3 +259 0x4000 //RX_FDDRC_SLANT_0_0 +260 0x4000 //RX_FDDRC_SLANT_0_1 +261 0x4000 //RX_FDDRC_SLANT_0_2 +262 0x4000 //RX_FDDRC_SLANT_0_3 +263 0x7FFF //RX_FDDRC_SLANT_1_0 +264 0x7FFF //RX_FDDRC_SLANT_1_1 +265 0x7FFF //RX_FDDRC_SLANT_1_2 +266 0x7FFF //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +286 0x0012 //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 +#VOL 1 +163 0x4000 //RX_TDDRC_ALPHA_UP_1 +164 0x4000 //RX_TDDRC_ALPHA_UP_2 +165 0x4000 //RX_TDDRC_ALPHA_UP_3 +166 0x4000 //RX_TDDRC_ALPHA_UP_4 +184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +190 0x7FFF //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +269 0x0001 //RX_TDDRC_THRD_0 +270 0x0002 //RX_TDDRC_THRD_1 +271 0x1800 //RX_TDDRC_THRD_2 +272 0x1800 //RX_TDDRC_THRD_3 +273 0x6000 //RX_TDDRC_SLANT_0 +274 0x6E00 //RX_TDDRC_SLANT_1 +275 0x4000 //RX_TDDRC_ALPHA_UP_0 +276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x199A //RX_TDDRC_HMNC_GAIN +279 0x0001 //RX_TDDRC_SMT_FLAG +280 0x0CCD //RX_TDDRC_SMT_W +281 0x03C3 //RX_TDDRC_DRC_GAIN +195 0x0020 //RX_FDEQ_SUBNUM +196 0x4848 //RX_FDEQ_GAIN_0 +197 0x4848 //RX_FDEQ_GAIN_1 +198 0x4848 //RX_FDEQ_GAIN_2 +199 0x4870 //RX_FDEQ_GAIN_3 +200 0x4848 //RX_FDEQ_GAIN_4 +201 0x4848 //RX_FDEQ_GAIN_5 +202 0x4850 //RX_FDEQ_GAIN_6 +203 0x485C //RX_FDEQ_GAIN_7 +204 0x5C60 //RX_FDEQ_GAIN_8 +205 0x685C //RX_FDEQ_GAIN_9 +206 0x5640 //RX_FDEQ_GAIN_10 +207 0x4040 //RX_FDEQ_GAIN_11 +208 0x5C58 //RX_FDEQ_GAIN_12 +209 0x5C60 //RX_FDEQ_GAIN_13 +210 0x6060 //RX_FDEQ_GAIN_14 +211 0x6060 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0202 //RX_FDEQ_BIN_0 +221 0x0203 //RX_FDEQ_BIN_1 +222 0x0303 //RX_FDEQ_BIN_2 +223 0x0402 //RX_FDEQ_BIN_3 +224 0x0504 //RX_FDEQ_BIN_4 +225 0x0209 //RX_FDEQ_BIN_5 +226 0x0808 //RX_FDEQ_BIN_6 +227 0x090A //RX_FDEQ_BIN_7 +228 0x0B0C //RX_FDEQ_BIN_8 +229 0x0D0E //RX_FDEQ_BIN_9 +230 0x1013 //RX_FDEQ_BIN_10 +231 0x1719 //RX_FDEQ_BIN_11 +232 0x1B1E //RX_FDEQ_BIN_12 +233 0x1E1E //RX_FDEQ_BIN_13 +234 0x1E28 //RX_FDEQ_BIN_14 +235 0x282C //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x4000 //RX_FDEQ_RESRV_0 +245 0x0320 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0030 //RX_FDDRC_BAND_MARGIN_1 +248 0x0050 //RX_FDDRC_BAND_MARGIN_2 +249 0x0080 //RX_FDDRC_BAND_MARGIN_3 +250 0x0004 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x2000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x2000 //RX_FDDRC_THRD_3_2 +258 0x5000 //RX_FDDRC_THRD_3_3 +259 0x4000 //RX_FDDRC_SLANT_0_0 +260 0x4000 //RX_FDDRC_SLANT_0_1 +261 0x4000 //RX_FDDRC_SLANT_0_2 +262 0x4000 //RX_FDDRC_SLANT_0_3 +263 0x7FFF //RX_FDDRC_SLANT_1_0 +264 0x7FFF //RX_FDDRC_SLANT_1_1 +265 0x7FFF //RX_FDDRC_SLANT_1_2 +266 0x7FFF //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +286 0x001A //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 +#VOL 2 +163 0x4000 //RX_TDDRC_ALPHA_UP_1 +164 0x4000 //RX_TDDRC_ALPHA_UP_2 +165 0x4000 //RX_TDDRC_ALPHA_UP_3 +166 0x4000 //RX_TDDRC_ALPHA_UP_4 +184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +190 0x7FFF //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +269 0x0001 //RX_TDDRC_THRD_0 +270 0x0002 //RX_TDDRC_THRD_1 +271 0x1800 //RX_TDDRC_THRD_2 +272 0x1800 //RX_TDDRC_THRD_3 +273 0x6000 //RX_TDDRC_SLANT_0 +274 0x6E00 //RX_TDDRC_SLANT_1 +275 0x4000 //RX_TDDRC_ALPHA_UP_0 +276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x199A //RX_TDDRC_HMNC_GAIN +279 0x0001 //RX_TDDRC_SMT_FLAG +280 0x0CCD //RX_TDDRC_SMT_W +281 0x03C3 //RX_TDDRC_DRC_GAIN +195 0x0020 //RX_FDEQ_SUBNUM +196 0x4848 //RX_FDEQ_GAIN_0 +197 0x4848 //RX_FDEQ_GAIN_1 +198 0x4848 //RX_FDEQ_GAIN_2 +199 0x4870 //RX_FDEQ_GAIN_3 +200 0x4848 //RX_FDEQ_GAIN_4 +201 0x4848 //RX_FDEQ_GAIN_5 +202 0x4850 //RX_FDEQ_GAIN_6 +203 0x485C //RX_FDEQ_GAIN_7 +204 0x5C60 //RX_FDEQ_GAIN_8 +205 0x685C //RX_FDEQ_GAIN_9 +206 0x5640 //RX_FDEQ_GAIN_10 +207 0x4040 //RX_FDEQ_GAIN_11 +208 0x5C58 //RX_FDEQ_GAIN_12 +209 0x5C60 //RX_FDEQ_GAIN_13 +210 0x6060 //RX_FDEQ_GAIN_14 +211 0x6060 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0202 //RX_FDEQ_BIN_0 +221 0x0203 //RX_FDEQ_BIN_1 +222 0x0303 //RX_FDEQ_BIN_2 +223 0x0402 //RX_FDEQ_BIN_3 +224 0x0504 //RX_FDEQ_BIN_4 +225 0x0209 //RX_FDEQ_BIN_5 +226 0x0808 //RX_FDEQ_BIN_6 +227 0x090A //RX_FDEQ_BIN_7 +228 0x0B0C //RX_FDEQ_BIN_8 +229 0x0D0E //RX_FDEQ_BIN_9 +230 0x1013 //RX_FDEQ_BIN_10 +231 0x1719 //RX_FDEQ_BIN_11 +232 0x1B1E //RX_FDEQ_BIN_12 +233 0x1E1E //RX_FDEQ_BIN_13 +234 0x1E28 //RX_FDEQ_BIN_14 +235 0x282C //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x4000 //RX_FDEQ_RESRV_0 +245 0x0320 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0030 //RX_FDDRC_BAND_MARGIN_1 +248 0x0050 //RX_FDDRC_BAND_MARGIN_2 +249 0x0080 //RX_FDDRC_BAND_MARGIN_3 +250 0x0004 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x2000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x2000 //RX_FDDRC_THRD_3_2 +258 0x5000 //RX_FDDRC_THRD_3_3 +259 0x4000 //RX_FDDRC_SLANT_0_0 +260 0x4000 //RX_FDDRC_SLANT_0_1 +261 0x4000 //RX_FDDRC_SLANT_0_2 +262 0x4000 //RX_FDDRC_SLANT_0_3 +263 0x7FFF //RX_FDDRC_SLANT_1_0 +264 0x7FFF //RX_FDDRC_SLANT_1_1 +265 0x7FFF //RX_FDDRC_SLANT_1_2 +266 0x7FFF //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +286 0x0025 //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 +#VOL 3 +163 0x4000 //RX_TDDRC_ALPHA_UP_1 +164 0x4000 //RX_TDDRC_ALPHA_UP_2 +165 0x4000 //RX_TDDRC_ALPHA_UP_3 +166 0x4000 //RX_TDDRC_ALPHA_UP_4 +184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +190 0x7FFF //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +269 0x0001 //RX_TDDRC_THRD_0 +270 0x0002 //RX_TDDRC_THRD_1 +271 0x1800 //RX_TDDRC_THRD_2 +272 0x1800 //RX_TDDRC_THRD_3 +273 0x6000 //RX_TDDRC_SLANT_0 +274 0x6E00 //RX_TDDRC_SLANT_1 +275 0x4000 //RX_TDDRC_ALPHA_UP_0 +276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x199A //RX_TDDRC_HMNC_GAIN +279 0x0001 //RX_TDDRC_SMT_FLAG +280 0x0CCD //RX_TDDRC_SMT_W +281 0x03C3 //RX_TDDRC_DRC_GAIN +195 0x0020 //RX_FDEQ_SUBNUM +196 0x4848 //RX_FDEQ_GAIN_0 +197 0x4848 //RX_FDEQ_GAIN_1 +198 0x4848 //RX_FDEQ_GAIN_2 +199 0x4870 //RX_FDEQ_GAIN_3 +200 0x4848 //RX_FDEQ_GAIN_4 +201 0x4848 //RX_FDEQ_GAIN_5 +202 0x4850 //RX_FDEQ_GAIN_6 +203 0x485C //RX_FDEQ_GAIN_7 +204 0x5C60 //RX_FDEQ_GAIN_8 +205 0x685C //RX_FDEQ_GAIN_9 +206 0x5640 //RX_FDEQ_GAIN_10 +207 0x4040 //RX_FDEQ_GAIN_11 +208 0x5C58 //RX_FDEQ_GAIN_12 +209 0x5C60 //RX_FDEQ_GAIN_13 +210 0x6060 //RX_FDEQ_GAIN_14 +211 0x6060 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0202 //RX_FDEQ_BIN_0 +221 0x0203 //RX_FDEQ_BIN_1 +222 0x0303 //RX_FDEQ_BIN_2 +223 0x0402 //RX_FDEQ_BIN_3 +224 0x0504 //RX_FDEQ_BIN_4 +225 0x0209 //RX_FDEQ_BIN_5 +226 0x0808 //RX_FDEQ_BIN_6 +227 0x090A //RX_FDEQ_BIN_7 +228 0x0B0C //RX_FDEQ_BIN_8 +229 0x0D0E //RX_FDEQ_BIN_9 +230 0x1013 //RX_FDEQ_BIN_10 +231 0x1719 //RX_FDEQ_BIN_11 +232 0x1B1E //RX_FDEQ_BIN_12 +233 0x1E1E //RX_FDEQ_BIN_13 +234 0x1E28 //RX_FDEQ_BIN_14 +235 0x282C //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x4000 //RX_FDEQ_RESRV_0 +245 0x0320 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0030 //RX_FDDRC_BAND_MARGIN_1 +248 0x0050 //RX_FDDRC_BAND_MARGIN_2 +249 0x0080 //RX_FDDRC_BAND_MARGIN_3 +250 0x0004 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x2000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x2000 //RX_FDDRC_THRD_3_2 +258 0x5000 //RX_FDDRC_THRD_3_3 +259 0x4000 //RX_FDDRC_SLANT_0_0 +260 0x4000 //RX_FDDRC_SLANT_0_1 +261 0x4000 //RX_FDDRC_SLANT_0_2 +262 0x4000 //RX_FDDRC_SLANT_0_3 +263 0x7FFF //RX_FDDRC_SLANT_1_0 +264 0x7FFF //RX_FDDRC_SLANT_1_1 +265 0x7FFF //RX_FDDRC_SLANT_1_2 +266 0x7FFF //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +286 0x0034 //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 +#VOL 4 +163 0x4000 //RX_TDDRC_ALPHA_UP_1 +164 0x4000 //RX_TDDRC_ALPHA_UP_2 +165 0x4000 //RX_TDDRC_ALPHA_UP_3 +166 0x4000 //RX_TDDRC_ALPHA_UP_4 +184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +190 0x7FFF //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +269 0x0001 //RX_TDDRC_THRD_0 +270 0x0002 //RX_TDDRC_THRD_1 +271 0x1800 //RX_TDDRC_THRD_2 +272 0x1800 //RX_TDDRC_THRD_3 +273 0x6000 //RX_TDDRC_SLANT_0 +274 0x6E00 //RX_TDDRC_SLANT_1 +275 0x4000 //RX_TDDRC_ALPHA_UP_0 +276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x199A //RX_TDDRC_HMNC_GAIN +279 0x0001 //RX_TDDRC_SMT_FLAG +280 0x0CCD //RX_TDDRC_SMT_W +281 0x03C3 //RX_TDDRC_DRC_GAIN +195 0x0020 //RX_FDEQ_SUBNUM +196 0x4848 //RX_FDEQ_GAIN_0 +197 0x4848 //RX_FDEQ_GAIN_1 +198 0x4848 //RX_FDEQ_GAIN_2 +199 0x4870 //RX_FDEQ_GAIN_3 +200 0x4848 //RX_FDEQ_GAIN_4 +201 0x4848 //RX_FDEQ_GAIN_5 +202 0x4850 //RX_FDEQ_GAIN_6 +203 0x485C //RX_FDEQ_GAIN_7 +204 0x5C60 //RX_FDEQ_GAIN_8 +205 0x685C //RX_FDEQ_GAIN_9 +206 0x5640 //RX_FDEQ_GAIN_10 +207 0x4040 //RX_FDEQ_GAIN_11 +208 0x5C58 //RX_FDEQ_GAIN_12 +209 0x5C60 //RX_FDEQ_GAIN_13 +210 0x6060 //RX_FDEQ_GAIN_14 +211 0x6060 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0202 //RX_FDEQ_BIN_0 +221 0x0203 //RX_FDEQ_BIN_1 +222 0x0303 //RX_FDEQ_BIN_2 +223 0x0402 //RX_FDEQ_BIN_3 +224 0x0504 //RX_FDEQ_BIN_4 +225 0x0209 //RX_FDEQ_BIN_5 +226 0x0808 //RX_FDEQ_BIN_6 +227 0x090A //RX_FDEQ_BIN_7 +228 0x0B0C //RX_FDEQ_BIN_8 +229 0x0D0E //RX_FDEQ_BIN_9 +230 0x1013 //RX_FDEQ_BIN_10 +231 0x1719 //RX_FDEQ_BIN_11 +232 0x1B1E //RX_FDEQ_BIN_12 +233 0x1E1E //RX_FDEQ_BIN_13 +234 0x1E28 //RX_FDEQ_BIN_14 +235 0x282C //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x4000 //RX_FDEQ_RESRV_0 +245 0x0320 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0030 //RX_FDDRC_BAND_MARGIN_1 +248 0x0050 //RX_FDDRC_BAND_MARGIN_2 +249 0x0080 //RX_FDDRC_BAND_MARGIN_3 +250 0x0004 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x2000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x2000 //RX_FDDRC_THRD_3_2 +258 0x5000 //RX_FDDRC_THRD_3_3 +259 0x4000 //RX_FDDRC_SLANT_0_0 +260 0x4000 //RX_FDDRC_SLANT_0_1 +261 0x4000 //RX_FDDRC_SLANT_0_2 +262 0x4000 //RX_FDDRC_SLANT_0_3 +263 0x7FFF //RX_FDDRC_SLANT_1_0 +264 0x7FFF //RX_FDDRC_SLANT_1_1 +265 0x7FFF //RX_FDDRC_SLANT_1_2 +266 0x7FFF //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +286 0x004D //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 +#VOL 5 +163 0x4000 //RX_TDDRC_ALPHA_UP_1 +164 0x4000 //RX_TDDRC_ALPHA_UP_2 +165 0x4000 //RX_TDDRC_ALPHA_UP_3 +166 0x4000 //RX_TDDRC_ALPHA_UP_4 +184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +190 0x7FFF //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +269 0x0001 //RX_TDDRC_THRD_0 +270 0x0002 //RX_TDDRC_THRD_1 +271 0x1800 //RX_TDDRC_THRD_2 +272 0x1800 //RX_TDDRC_THRD_3 +273 0x6000 //RX_TDDRC_SLANT_0 +274 0x6E00 //RX_TDDRC_SLANT_1 +275 0x4000 //RX_TDDRC_ALPHA_UP_0 +276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x199A //RX_TDDRC_HMNC_GAIN +279 0x0001 //RX_TDDRC_SMT_FLAG +280 0x0CCD //RX_TDDRC_SMT_W +281 0x03C3 //RX_TDDRC_DRC_GAIN +195 0x0020 //RX_FDEQ_SUBNUM +196 0x4848 //RX_FDEQ_GAIN_0 +197 0x4848 //RX_FDEQ_GAIN_1 +198 0x4848 //RX_FDEQ_GAIN_2 +199 0x4870 //RX_FDEQ_GAIN_3 +200 0x4848 //RX_FDEQ_GAIN_4 +201 0x4848 //RX_FDEQ_GAIN_5 +202 0x4850 //RX_FDEQ_GAIN_6 +203 0x485C //RX_FDEQ_GAIN_7 +204 0x5C60 //RX_FDEQ_GAIN_8 +205 0x685C //RX_FDEQ_GAIN_9 +206 0x5640 //RX_FDEQ_GAIN_10 +207 0x4040 //RX_FDEQ_GAIN_11 +208 0x5C58 //RX_FDEQ_GAIN_12 +209 0x5C60 //RX_FDEQ_GAIN_13 +210 0x6060 //RX_FDEQ_GAIN_14 +211 0x6060 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0202 //RX_FDEQ_BIN_0 +221 0x0203 //RX_FDEQ_BIN_1 +222 0x0303 //RX_FDEQ_BIN_2 +223 0x0402 //RX_FDEQ_BIN_3 +224 0x0504 //RX_FDEQ_BIN_4 +225 0x0209 //RX_FDEQ_BIN_5 +226 0x0808 //RX_FDEQ_BIN_6 +227 0x090A //RX_FDEQ_BIN_7 +228 0x0B0C //RX_FDEQ_BIN_8 +229 0x0D0E //RX_FDEQ_BIN_9 +230 0x1013 //RX_FDEQ_BIN_10 +231 0x1719 //RX_FDEQ_BIN_11 +232 0x1B1E //RX_FDEQ_BIN_12 +233 0x1E1E //RX_FDEQ_BIN_13 +234 0x1E28 //RX_FDEQ_BIN_14 +235 0x282C //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x4000 //RX_FDEQ_RESRV_0 +245 0x0320 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0030 //RX_FDDRC_BAND_MARGIN_1 +248 0x0050 //RX_FDDRC_BAND_MARGIN_2 +249 0x0080 //RX_FDDRC_BAND_MARGIN_3 +250 0x0004 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x2000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x2000 //RX_FDDRC_THRD_3_2 +258 0x5000 //RX_FDDRC_THRD_3_3 +259 0x4000 //RX_FDDRC_SLANT_0_0 +260 0x4000 //RX_FDDRC_SLANT_0_1 +261 0x4000 //RX_FDDRC_SLANT_0_2 +262 0x4000 //RX_FDDRC_SLANT_0_3 +263 0x7FFF //RX_FDDRC_SLANT_1_0 +264 0x7FFF //RX_FDDRC_SLANT_1_1 +265 0x7FFF //RX_FDDRC_SLANT_1_2 +266 0x7FFF //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +286 0x0074 //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 +#VOL 6 +163 0x4000 //RX_TDDRC_ALPHA_UP_1 +164 0x4000 //RX_TDDRC_ALPHA_UP_2 +165 0x4000 //RX_TDDRC_ALPHA_UP_3 +166 0x4000 //RX_TDDRC_ALPHA_UP_4 +184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +190 0x7FFF //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +269 0x0001 //RX_TDDRC_THRD_0 +270 0x0002 //RX_TDDRC_THRD_1 +271 0x1800 //RX_TDDRC_THRD_2 +272 0x1800 //RX_TDDRC_THRD_3 +273 0x6000 //RX_TDDRC_SLANT_0 +274 0x6E00 //RX_TDDRC_SLANT_1 +275 0x4000 //RX_TDDRC_ALPHA_UP_0 +276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x199A //RX_TDDRC_HMNC_GAIN +279 0x0001 //RX_TDDRC_SMT_FLAG +280 0x0CCD //RX_TDDRC_SMT_W +281 0x03C3 //RX_TDDRC_DRC_GAIN +195 0x0020 //RX_FDEQ_SUBNUM +196 0x4848 //RX_FDEQ_GAIN_0 +197 0x4848 //RX_FDEQ_GAIN_1 +198 0x4848 //RX_FDEQ_GAIN_2 +199 0x4870 //RX_FDEQ_GAIN_3 +200 0x4848 //RX_FDEQ_GAIN_4 +201 0x4848 //RX_FDEQ_GAIN_5 +202 0x4850 //RX_FDEQ_GAIN_6 +203 0x485C //RX_FDEQ_GAIN_7 +204 0x5C60 //RX_FDEQ_GAIN_8 +205 0x685C //RX_FDEQ_GAIN_9 +206 0x5640 //RX_FDEQ_GAIN_10 +207 0x4040 //RX_FDEQ_GAIN_11 +208 0x5C58 //RX_FDEQ_GAIN_12 +209 0x5C60 //RX_FDEQ_GAIN_13 +210 0x6060 //RX_FDEQ_GAIN_14 +211 0x6060 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0202 //RX_FDEQ_BIN_0 +221 0x0203 //RX_FDEQ_BIN_1 +222 0x0303 //RX_FDEQ_BIN_2 +223 0x0402 //RX_FDEQ_BIN_3 +224 0x0504 //RX_FDEQ_BIN_4 +225 0x0209 //RX_FDEQ_BIN_5 +226 0x0808 //RX_FDEQ_BIN_6 +227 0x090A //RX_FDEQ_BIN_7 +228 0x0B0C //RX_FDEQ_BIN_8 +229 0x0D0E //RX_FDEQ_BIN_9 +230 0x1013 //RX_FDEQ_BIN_10 +231 0x1719 //RX_FDEQ_BIN_11 +232 0x1B1E //RX_FDEQ_BIN_12 +233 0x1E1E //RX_FDEQ_BIN_13 +234 0x1E28 //RX_FDEQ_BIN_14 +235 0x282C //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x4000 //RX_FDEQ_RESRV_0 +245 0x0320 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0030 //RX_FDDRC_BAND_MARGIN_1 +248 0x0050 //RX_FDDRC_BAND_MARGIN_2 +249 0x0080 //RX_FDDRC_BAND_MARGIN_3 +250 0x0004 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x2000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x2000 //RX_FDDRC_THRD_3_2 +258 0x5000 //RX_FDDRC_THRD_3_3 +259 0x4000 //RX_FDDRC_SLANT_0_0 +260 0x4000 //RX_FDDRC_SLANT_0_1 +261 0x4000 //RX_FDDRC_SLANT_0_2 +262 0x4000 //RX_FDDRC_SLANT_0_3 +263 0x7FFF //RX_FDDRC_SLANT_1_0 +264 0x7FFF //RX_FDDRC_SLANT_1_1 +265 0x7FFF //RX_FDDRC_SLANT_1_2 +266 0x7FFF //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +286 0x0100 //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 #CASE_NAME HANDSFREE-HANDSFREE-CUSTOM1-FB -#PARAM_TYPE TX+RX -#TOTAL_CUSTOM_STEP 7 +#PARAM_MODE FULL +#PARAM_TYPE TX+2RX +#TOTAL_CUSTOM_STEP 7+7 #TX 0 0x0001 //TX_OPERATION_MODE_0 1 0x0001 //TX_OPERATION_MODE_1 @@ -3764,11 +5599,11 @@ 248 0xF800 //TX_THR_SN_EST_6 249 0xF800 //TX_THR_SN_EST_7 250 0x0100 //TX_DELTA_THR_SN_EST_0 -251 0x0200 //TX_DELTA_THR_SN_EST_1 -252 0x0100 //TX_DELTA_THR_SN_EST_2 -253 0x0200 //TX_DELTA_THR_SN_EST_3 +251 0x0100 //TX_DELTA_THR_SN_EST_1 +252 0x0200 //TX_DELTA_THR_SN_EST_2 +253 0x0100 //TX_DELTA_THR_SN_EST_3 254 0x0100 //TX_DELTA_THR_SN_EST_4 -255 0x0100 //TX_DELTA_THR_SN_EST_5 +255 0x0200 //TX_DELTA_THR_SN_EST_5 256 0x0200 //TX_DELTA_THR_SN_EST_6 257 0x0200 //TX_DELTA_THR_SN_EST_7 258 0x4000 //TX_LAMBDA_NN_EST_0 @@ -3796,11 +5631,11 @@ 280 0x1000 //TX_B_POST_FLT_1 281 0x0010 //TX_NS_LVL_CTRL_0 282 0x0014 //TX_NS_LVL_CTRL_1 -283 0x0014 //TX_NS_LVL_CTRL_2 -284 0x0018 //TX_NS_LVL_CTRL_3 -285 0x0016 //TX_NS_LVL_CTRL_4 -286 0x0014 //TX_NS_LVL_CTRL_5 -287 0x0011 //TX_NS_LVL_CTRL_6 +283 0x0018 //TX_NS_LVL_CTRL_2 +284 0x0016 //TX_NS_LVL_CTRL_3 +285 0x0014 //TX_NS_LVL_CTRL_4 +286 0x0011 //TX_NS_LVL_CTRL_5 +287 0x0014 //TX_NS_LVL_CTRL_6 288 0x0011 //TX_NS_LVL_CTRL_7 289 0x000F //TX_MIN_GAIN_S_0 290 0x0010 //TX_MIN_GAIN_S_1 @@ -3818,8 +5653,8 @@ 302 0x4000 //TX_SNRI_SUP_2 303 0x4000 //TX_SNRI_SUP_3 304 0x4000 //TX_SNRI_SUP_4 -305 0x4000 //TX_SNRI_SUP_5 -306 0x50C0 //TX_SNRI_SUP_6 +305 0x50C0 //TX_SNRI_SUP_5 +306 0x4000 //TX_SNRI_SUP_6 307 0x7FFF //TX_SNRI_SUP_7 308 0x7FFF //TX_THR_LFNS 309 0x0018 //TX_G_LFNS @@ -3828,19 +5663,19 @@ 312 0x7FFF //TX_A_POST_FILT_0 313 0x2000 //TX_A_POST_FILT_1 314 0x5000 //TX_A_POST_FILT_S_0 -315 0x6000 //TX_A_POST_FILT_S_1 -316 0x4C00 //TX_A_POST_FILT_S_2 -317 0x4000 //TX_A_POST_FILT_S_3 -318 0x6000 //TX_A_POST_FILT_S_4 -319 0x4000 //TX_A_POST_FILT_S_5 -320 0x5000 //TX_A_POST_FILT_S_6 +315 0x4C00 //TX_A_POST_FILT_S_1 +316 0x4000 //TX_A_POST_FILT_S_2 +317 0x6000 //TX_A_POST_FILT_S_3 +318 0x4000 //TX_A_POST_FILT_S_4 +319 0x5000 //TX_A_POST_FILT_S_5 +320 0x6000 //TX_A_POST_FILT_S_6 321 0x7000 //TX_A_POST_FILT_S_7 322 0x2000 //TX_B_POST_FILT_0 -323 0x1000 //TX_B_POST_FILT_1 +323 0x2000 //TX_B_POST_FILT_1 324 0x2000 //TX_B_POST_FILT_2 -325 0x2000 //TX_B_POST_FILT_3 +325 0x4000 //TX_B_POST_FILT_3 326 0x4000 //TX_B_POST_FILT_4 -327 0x4000 //TX_B_POST_FILT_5 +327 0x1000 //TX_B_POST_FILT_5 328 0x1000 //TX_B_POST_FILT_6 329 0x2000 //TX_B_POST_FILT_7 330 0x4000 //TX_B_LESSCUT_RTO_S_0 @@ -3848,14 +5683,14 @@ 332 0x7FFF //TX_B_LESSCUT_RTO_S_2 333 0x7FFF //TX_B_LESSCUT_RTO_S_3 334 0x7FFF //TX_B_LESSCUT_RTO_S_4 -335 0x7FFF //TX_B_LESSCUT_RTO_S_5 -336 0x6000 //TX_B_LESSCUT_RTO_S_6 +335 0x6000 //TX_B_LESSCUT_RTO_S_5 +336 0x7FFF //TX_B_LESSCUT_RTO_S_6 337 0x7FFF //TX_B_LESSCUT_RTO_S_7 338 0x7C00 //TX_LAMBDA_PFILT 339 0x7C00 //TX_LAMBDA_PFILT_S_0 340 0x7C00 //TX_LAMBDA_PFILT_S_1 -341 0x7C00 //TX_LAMBDA_PFILT_S_2 -342 0x7A00 //TX_LAMBDA_PFILT_S_3 +341 0x7A00 //TX_LAMBDA_PFILT_S_2 +342 0x7C00 //TX_LAMBDA_PFILT_S_3 343 0x7C00 //TX_LAMBDA_PFILT_S_4 344 0x7C00 //TX_LAMBDA_PFILT_S_5 345 0x7C00 //TX_LAMBDA_PFILT_S_6 @@ -3893,10 +5728,10 @@ 377 0x7FFF //TX_NOISE_TH_5_4 378 0x2710 //TX_NOISE_TH_6 379 0x0033 //TX_MINENOISE_TH -380 0x4000 //TX_MINENOISE_MIC0_TH_MTS -381 0xFFEE //TX_MINENOISE_MIC0_TH_EXP -382 0x6000 //TX_MINENOISE_MIC0_S_TH_MTS -383 0xFFF3 //TX_MINENOISE_MIC0_S_TH_EXP +380 0xD508 //TX_MORENS_TFMASK_TH +381 0x0001 //TX_DRC_QUIET_FLOOR +382 0x7999 //TX_RATIODTL_CUT_TH +383 0x0119 //TX_DT_CUT_K1 384 0x0666 //TX_OUT_ENER_S_TH_CLEAN 385 0x0666 //TX_OUT_ENER_S_TH_LESSCLEAN 386 0x0333 //TX_OUT_ENER_S_TH_NOISY @@ -3904,15 +5739,15 @@ 388 0x0333 //TX_OUT_ENER_TH_SPEECH 389 0x2000 //TX_SN_NPB_GAIN 390 0x0000 //TX_NN_NPB_GAIN -391 0x0000 //TX_CSX_ALPHA_0 -392 0x0000 //TX_CSX_ALPHA_1 -393 0x0000 //TX_CSX_ALPHA_2 -394 0x0000 //TX_CSX_ALPHA_3 -395 0x0800 //TX_MU_ARSP_EST -396 0x00C8 //TX_P_OUTBEAM_MIN_TH +391 0x7FFF //TX_POST_MASK_SUP_HSNE +392 0x1388 //TX_TAIL_DET_TH +393 0x4000 //TX_B_LESSCUT_RTO_WTA +394 0x0000 //TX_MEL_G_R +395 0x0080 //TX_SUPHIGH_TH +396 0x0000 //TX_MASK_G_R 397 0x0002 //TX_EXTRA_NS_L -398 0x0800 //TX_EXTRA_NS_A -399 0x0005 //TX_VR_NOISE_FLOOR_TH +398 0x1800 //TX_C_POST_FLT_MASK +399 0x4000 //TX_A_POST_FLT_WNS 400 0x0148 //TX_MIN_G_LOW300HZ 401 0x0002 //TX_MAXLEVEL_CNG 402 0x00B4 //TX_STN_NOISE_TH @@ -4027,16 +5862,16 @@ 511 0x6666 //TX_MIC_TO_BFGAIN 512 0x0000 //TX_MICTOBFGAIN0 513 0x0000 //TX_FASTMUE_TH -514 0x0000 //TX_DERVB_LEN_0 -515 0x0000 //TX_DERVB_LEN_1 -516 0x0000 //TX_RHO_DERVB -517 0x0000 //TX_MIC_INDX_DERVB -518 0x0000 //TX_MU_DERVB -519 0x0000 //TX_DR_RESRV_0 -520 0x0000 //TX_DR_RESRV_1 -521 0x0000 //TX_DR_RESRV_2 -522 0x0000 //TX_DR_RESRV_3 -523 0x0000 //TX_DR_RESRV_4 +514 0x3000 //TX_DEREVERB_LF_MU +515 0x34CD //TX_DEREVERB_HF_MU +516 0x0007 //TX_DEREVERB_DELAY +517 0x0004 //TX_DEREVERB_COEF_LEN +518 0x0003 //TX_DEREVERB_DNR +519 0x0000 //TX_DEREVERB_ALPHA +520 0x0000 //TX_DEREVERB_BETA +521 0x3A98 //TX_GSC_RTOL_TH +522 0x3A98 //TX_GSC_RTOH_TH +523 0x7E2C //TX_WIDE2_MEANHTH 524 0x0000 //TX_DR_RESRV_5 525 0x0000 //TX_DR_RESRV_6 526 0x0000 //TX_DR_RESRV_7 @@ -4410,6 +6245,71 @@ 894 0xC000 //TX_FASTNS_SSA_THHFL 895 0xCCCC //TX_FASTNS_SSA_THLFH 896 0xD999 //TX_FASTNS_SSA_THHFH +897 0x2339 //TX_SENDFUNC_REG_MICMUTE +898 0x0021 //TX_SENDFUNC_REG_MICMUTE1 +899 0x02BC //TX_MICMUTE_RATIO_THR +900 0x0140 //TX_MICMUTE_AMP_THR +901 0x0004 //TX_MICMUTE_HPF_IND +902 0x00C0 //TX_MICMUTE_LOG_EYR_TH +903 0x0008 //TX_MICMUTE_CVG_TIME +904 0x0008 //TX_MICMUTE_RELEASE_TIME +905 0x01FE //TX_MIC_VOLUME_MIC0MUTE +906 0x0020 //TX_MICMUTE_EPD_OFFSET_0 +907 0x001E //TX_MICMUTE_FRQ_AEC_L +908 0x7999 //TX_MICMUTE_EAD_THR +909 0x7FFF //TX_MICMUTE_LAMBDA_CB_NLE +910 0x7FFF //TX_MICMUTE_LAMBDA_RE_EST +911 0x4000 //TX_DTD_THR1_MICMUTE_0 +912 0x7000 //TX_DTD_THR1_MICMUTE_1 +913 0x7FFF //TX_DTD_THR1_MICMUTE_2 +914 0x7FFF //TX_DTD_THR1_MICMUTE_3 +915 0x6CCC //TX_DTD_THR2_MICMUTE_0 +916 0x0400 //TX_MICMUTE_MIN_EQ_RE_EST_0 +917 0x0400 //TX_MICMUTE_MIN_EQ_RE_EST_1 +918 0x1000 //TX_MICMUTE_MIN_EQ_RE_EST_2 +919 0x7FFF //TX_MICMUTE_MIN_EQ_RE_EST_3 +920 0x7FFF //TX_MICMUTE_MIN_EQ_RE_EST_4 +921 0x4000 //TX_MICMUTE_C_POST_FLT +922 0x03E8 //TX_MICMUTE_DT_CUT_K +923 0x0001 //TX_MICMUTE_DT_CUT_THR +924 0x03E8 //TX_MICMUTE_DT_CUT_K2 +925 0x0001 //TX_MICMUTE_DT_CUT_THR2 +926 0x0064 //TX_MICMUTE_DT2_HOLD_N +927 0x1000 //TX_MICMUTE_RATIODTH_THCUT +928 0x1000 //TX_MICMUTE_B_POST_FLT_ECHOL +929 0x7FFF //TX_MICMUTE_B_POST_FLT_ECHOH +930 0x0400 //TX_MICMUTE_C_POST_FLT_MASK +931 0x7999 //TX_MICMUTE_RATIODTL_CUT_TH +932 0x0258 //TX_MICMUTE_DT_CUT_K1 +933 0x0800 //TX_MICMUTE_N2_SN_EST +934 0xFC00 //TX_MICMUTE_THR_SN_EST_0 +935 0x001C //TX_MICMUTE_MIN_G_CTRL_0 +936 0x6000 //TX_MICMUTE_A_POST_FILT_S_0 +937 0x7000 //TX_MICMUTE_B_POST_FILT_0 +938 0x2710 //TX_MIC1RUB_AMP_THR +939 0x0010 //TX_MIC1MUTE_RATIO_THR +940 0x0450 //TX_MIC1MUTE_AMP_THR +941 0x0008 //TX_MIC1MUTE_CVG_TIME +942 0x0008 //TX_MIC1MUTE_RELEASE_TIME +943 0x0000 //TX_AMS_RESRV_01 +944 0x0000 //TX_AMS_RESRV_02 +945 0x0000 //TX_AMS_RESRV_03 +946 0x0000 //TX_AMS_RESRV_04 +947 0x0000 //TX_AMS_RESRV_05 +948 0x0000 //TX_AMS_RESRV_06 +949 0x0000 //TX_AMS_RESRV_07 +950 0x0000 //TX_AMS_RESRV_08 +951 0x0000 //TX_AMS_RESRV_09 +952 0x0000 //TX_AMS_RESRV_10 +953 0x0000 //TX_AMS_RESRV_11 +954 0x0000 //TX_AMS_RESRV_12 +955 0x0000 //TX_AMS_RESRV_13 +956 0x0000 //TX_AMS_RESRV_14 +957 0x0000 //TX_AMS_RESRV_15 +958 0x0000 //TX_AMS_RESRV_16 +959 0x0000 //TX_AMS_RESRV_17 +960 0x0000 //TX_AMS_RESRV_18 +961 0x0000 //TX_AMS_RESRV_19 #RX 0 0x006C //RX_RECVFUNC_MODE_0 1 0x0000 //RX_RECVFUNC_MODE_1 @@ -5261,14 +7161,866 @@ 110 0x0000 //RX_FDDRC_RESRV_0 129 0x0100 //RX_SPK_VOL 130 0x0000 //RX_VOL_RESRV_0 +#RX 2 +157 0x006C //RX_RECVFUNC_MODE_0 +158 0x0000 //RX_RECVFUNC_MODE_1 +159 0x0004 //RX_SAMPLINGFREQ_SIG +160 0x0004 //RX_SAMPLINGFREQ_PROC +161 0x000A //RX_FRAME_SZ +162 0x0000 //RX_DELAY_OPT +163 0x4000 //RX_TDDRC_ALPHA_UP_1 +164 0x4000 //RX_TDDRC_ALPHA_UP_2 +165 0x4000 //RX_TDDRC_ALPHA_UP_3 +166 0x4000 //RX_TDDRC_ALPHA_UP_4 +167 0x065B //RX_PGA +168 0x7E56 //RX_A_HP +169 0x4000 //RX_B_PE +170 0x7800 //RX_THR_PITCH_DET_0 +171 0x7000 //RX_THR_PITCH_DET_1 +172 0x6000 //RX_THR_PITCH_DET_2 +173 0x0008 //RX_PITCH_BFR_LEN +174 0x0003 //RX_SBD_PITCH_DET +175 0x0100 //RX_PP_RESRV_0 +176 0x0020 //RX_PP_RESRV_1 +177 0x0400 //RX_N_SN_EST +178 0x000C //RX_N2_SN_EST +179 0x0014 //RX_NS_LVL_CTRL +180 0xF400 //RX_THR_SN_EST +181 0x7E00 //RX_LAMBDA_PFILT +182 0x00C8 //RX_FENS_RESRV_0 +183 0x0190 //RX_FENS_RESRV_1 +184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +187 0x0002 //RX_EXTRA_NS_L +188 0x0800 //RX_EXTRA_NS_A +189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +190 0x7FFF //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +192 0x199A //RX_A_POST_FLT +193 0x0000 //RX_LMT_THRD +194 0x4000 //RX_LMT_ALPHA +195 0x0020 //RX_FDEQ_SUBNUM +196 0x4848 //RX_FDEQ_GAIN_0 +197 0x4848 //RX_FDEQ_GAIN_1 +198 0x4848 //RX_FDEQ_GAIN_2 +199 0x4870 //RX_FDEQ_GAIN_3 +200 0x4848 //RX_FDEQ_GAIN_4 +201 0x4848 //RX_FDEQ_GAIN_5 +202 0x4850 //RX_FDEQ_GAIN_6 +203 0x485C //RX_FDEQ_GAIN_7 +204 0x5C60 //RX_FDEQ_GAIN_8 +205 0x685C //RX_FDEQ_GAIN_9 +206 0x5640 //RX_FDEQ_GAIN_10 +207 0x4040 //RX_FDEQ_GAIN_11 +208 0x5C58 //RX_FDEQ_GAIN_12 +209 0x5C60 //RX_FDEQ_GAIN_13 +210 0x6060 //RX_FDEQ_GAIN_14 +211 0x6060 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0202 //RX_FDEQ_BIN_0 +221 0x0203 //RX_FDEQ_BIN_1 +222 0x0303 //RX_FDEQ_BIN_2 +223 0x0402 //RX_FDEQ_BIN_3 +224 0x0504 //RX_FDEQ_BIN_4 +225 0x0209 //RX_FDEQ_BIN_5 +226 0x0808 //RX_FDEQ_BIN_6 +227 0x090A //RX_FDEQ_BIN_7 +228 0x0B0C //RX_FDEQ_BIN_8 +229 0x0D0E //RX_FDEQ_BIN_9 +230 0x1013 //RX_FDEQ_BIN_10 +231 0x1719 //RX_FDEQ_BIN_11 +232 0x1B1E //RX_FDEQ_BIN_12 +233 0x1E1E //RX_FDEQ_BIN_13 +234 0x1E28 //RX_FDEQ_BIN_14 +235 0x282C //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x4000 //RX_FDEQ_RESRV_0 +245 0x0320 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0030 //RX_FDDRC_BAND_MARGIN_1 +248 0x0050 //RX_FDDRC_BAND_MARGIN_2 +249 0x0080 //RX_FDDRC_BAND_MARGIN_3 +250 0x0004 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x2000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x2000 //RX_FDDRC_THRD_3_2 +258 0x5000 //RX_FDDRC_THRD_3_3 +259 0x4000 //RX_FDDRC_SLANT_0_0 +260 0x4000 //RX_FDDRC_SLANT_0_1 +261 0x4000 //RX_FDDRC_SLANT_0_2 +262 0x4000 //RX_FDDRC_SLANT_0_3 +263 0x7FFF //RX_FDDRC_SLANT_1_0 +264 0x7FFF //RX_FDDRC_SLANT_1_1 +265 0x7FFF //RX_FDDRC_SLANT_1_2 +266 0x7FFF //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +268 0x0002 //RX_FILTINDX +269 0x0001 //RX_TDDRC_THRD_0 +270 0x0002 //RX_TDDRC_THRD_1 +271 0x1800 //RX_TDDRC_THRD_2 +272 0x1800 //RX_TDDRC_THRD_3 +273 0x6000 //RX_TDDRC_SLANT_0 +274 0x6E00 //RX_TDDRC_SLANT_1 +275 0x4000 //RX_TDDRC_ALPHA_UP_0 +276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x199A //RX_TDDRC_HMNC_GAIN +279 0x0001 //RX_TDDRC_SMT_FLAG +280 0x0CCD //RX_TDDRC_SMT_W +281 0x03C3 //RX_TDDRC_DRC_GAIN +282 0x7C00 //RX_LAMBDA_PKA_FP +283 0x2000 //RX_TPKA_FP +284 0x2000 //RX_MIN_G_FP +285 0x0080 //RX_MAX_G_FP +286 0x0012 //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 +288 0x0000 //RX_MAXLEVEL_CNG +289 0x3000 //RX_BWE_UV_TH +290 0x3000 //RX_BWE_UV_TH2 +291 0x1800 //RX_BWE_UV_TH3 +292 0x1000 //RX_BWE_V_TH +293 0x04CD //RX_BWE_GAIN1_V_TH1 +294 0x0F33 //RX_BWE_GAIN1_V_TH2 +295 0x7333 //RX_BWE_UV_EQ +296 0x199A //RX_BWE_V_EQ +297 0x7333 //RX_BWE_TONE_TH +298 0x0004 //RX_BWE_UV_HOLD_T +299 0x6CCD //RX_BWE_GAIN2_ALPHA +300 0x799A //RX_BWE_GAIN3_ALPHA +301 0x001E //RX_BWE_CUTOFF +302 0x3000 //RX_BWE_GAINFILL +303 0x3200 //RX_BWE_MAXTH_TONE +304 0x2000 //RX_BWE_EQ_0 +305 0x2000 //RX_BWE_EQ_1 +306 0x2000 //RX_BWE_EQ_2 +307 0x2000 //RX_BWE_EQ_3 +308 0x2000 //RX_BWE_EQ_4 +309 0x2000 //RX_BWE_EQ_5 +310 0x2000 //RX_BWE_EQ_6 +311 0x0000 //RX_BWE_RESRV_0 +312 0x0000 //RX_BWE_RESRV_1 +313 0x0000 //RX_BWE_RESRV_2 +#VOL 0 +163 0x4000 //RX_TDDRC_ALPHA_UP_1 +164 0x4000 //RX_TDDRC_ALPHA_UP_2 +165 0x4000 //RX_TDDRC_ALPHA_UP_3 +166 0x4000 //RX_TDDRC_ALPHA_UP_4 +184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +190 0x7FFF //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +269 0x0001 //RX_TDDRC_THRD_0 +270 0x0002 //RX_TDDRC_THRD_1 +271 0x1800 //RX_TDDRC_THRD_2 +272 0x1800 //RX_TDDRC_THRD_3 +273 0x6000 //RX_TDDRC_SLANT_0 +274 0x6E00 //RX_TDDRC_SLANT_1 +275 0x4000 //RX_TDDRC_ALPHA_UP_0 +276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x199A //RX_TDDRC_HMNC_GAIN +279 0x0001 //RX_TDDRC_SMT_FLAG +280 0x0CCD //RX_TDDRC_SMT_W +281 0x03C3 //RX_TDDRC_DRC_GAIN +195 0x0020 //RX_FDEQ_SUBNUM +196 0x4848 //RX_FDEQ_GAIN_0 +197 0x4848 //RX_FDEQ_GAIN_1 +198 0x4848 //RX_FDEQ_GAIN_2 +199 0x4870 //RX_FDEQ_GAIN_3 +200 0x4848 //RX_FDEQ_GAIN_4 +201 0x4848 //RX_FDEQ_GAIN_5 +202 0x4850 //RX_FDEQ_GAIN_6 +203 0x485C //RX_FDEQ_GAIN_7 +204 0x5C60 //RX_FDEQ_GAIN_8 +205 0x685C //RX_FDEQ_GAIN_9 +206 0x5640 //RX_FDEQ_GAIN_10 +207 0x4040 //RX_FDEQ_GAIN_11 +208 0x5C58 //RX_FDEQ_GAIN_12 +209 0x5C60 //RX_FDEQ_GAIN_13 +210 0x6060 //RX_FDEQ_GAIN_14 +211 0x6060 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0202 //RX_FDEQ_BIN_0 +221 0x0203 //RX_FDEQ_BIN_1 +222 0x0303 //RX_FDEQ_BIN_2 +223 0x0402 //RX_FDEQ_BIN_3 +224 0x0504 //RX_FDEQ_BIN_4 +225 0x0209 //RX_FDEQ_BIN_5 +226 0x0808 //RX_FDEQ_BIN_6 +227 0x090A //RX_FDEQ_BIN_7 +228 0x0B0C //RX_FDEQ_BIN_8 +229 0x0D0E //RX_FDEQ_BIN_9 +230 0x1013 //RX_FDEQ_BIN_10 +231 0x1719 //RX_FDEQ_BIN_11 +232 0x1B1E //RX_FDEQ_BIN_12 +233 0x1E1E //RX_FDEQ_BIN_13 +234 0x1E28 //RX_FDEQ_BIN_14 +235 0x282C //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x4000 //RX_FDEQ_RESRV_0 +245 0x0320 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0030 //RX_FDDRC_BAND_MARGIN_1 +248 0x0050 //RX_FDDRC_BAND_MARGIN_2 +249 0x0080 //RX_FDDRC_BAND_MARGIN_3 +250 0x0004 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x2000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x2000 //RX_FDDRC_THRD_3_2 +258 0x5000 //RX_FDDRC_THRD_3_3 +259 0x4000 //RX_FDDRC_SLANT_0_0 +260 0x4000 //RX_FDDRC_SLANT_0_1 +261 0x4000 //RX_FDDRC_SLANT_0_2 +262 0x4000 //RX_FDDRC_SLANT_0_3 +263 0x7FFF //RX_FDDRC_SLANT_1_0 +264 0x7FFF //RX_FDDRC_SLANT_1_1 +265 0x7FFF //RX_FDDRC_SLANT_1_2 +266 0x7FFF //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +286 0x0012 //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 +#VOL 1 +163 0x4000 //RX_TDDRC_ALPHA_UP_1 +164 0x4000 //RX_TDDRC_ALPHA_UP_2 +165 0x4000 //RX_TDDRC_ALPHA_UP_3 +166 0x4000 //RX_TDDRC_ALPHA_UP_4 +184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +190 0x7FFF //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +269 0x0001 //RX_TDDRC_THRD_0 +270 0x0002 //RX_TDDRC_THRD_1 +271 0x1800 //RX_TDDRC_THRD_2 +272 0x1800 //RX_TDDRC_THRD_3 +273 0x6000 //RX_TDDRC_SLANT_0 +274 0x6E00 //RX_TDDRC_SLANT_1 +275 0x4000 //RX_TDDRC_ALPHA_UP_0 +276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x199A //RX_TDDRC_HMNC_GAIN +279 0x0001 //RX_TDDRC_SMT_FLAG +280 0x0CCD //RX_TDDRC_SMT_W +281 0x03C3 //RX_TDDRC_DRC_GAIN +195 0x0020 //RX_FDEQ_SUBNUM +196 0x4848 //RX_FDEQ_GAIN_0 +197 0x4848 //RX_FDEQ_GAIN_1 +198 0x4848 //RX_FDEQ_GAIN_2 +199 0x4870 //RX_FDEQ_GAIN_3 +200 0x4848 //RX_FDEQ_GAIN_4 +201 0x4848 //RX_FDEQ_GAIN_5 +202 0x4850 //RX_FDEQ_GAIN_6 +203 0x485C //RX_FDEQ_GAIN_7 +204 0x5C60 //RX_FDEQ_GAIN_8 +205 0x685C //RX_FDEQ_GAIN_9 +206 0x5640 //RX_FDEQ_GAIN_10 +207 0x4040 //RX_FDEQ_GAIN_11 +208 0x5C58 //RX_FDEQ_GAIN_12 +209 0x5C60 //RX_FDEQ_GAIN_13 +210 0x6060 //RX_FDEQ_GAIN_14 +211 0x6060 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0202 //RX_FDEQ_BIN_0 +221 0x0203 //RX_FDEQ_BIN_1 +222 0x0303 //RX_FDEQ_BIN_2 +223 0x0402 //RX_FDEQ_BIN_3 +224 0x0504 //RX_FDEQ_BIN_4 +225 0x0209 //RX_FDEQ_BIN_5 +226 0x0808 //RX_FDEQ_BIN_6 +227 0x090A //RX_FDEQ_BIN_7 +228 0x0B0C //RX_FDEQ_BIN_8 +229 0x0D0E //RX_FDEQ_BIN_9 +230 0x1013 //RX_FDEQ_BIN_10 +231 0x1719 //RX_FDEQ_BIN_11 +232 0x1B1E //RX_FDEQ_BIN_12 +233 0x1E1E //RX_FDEQ_BIN_13 +234 0x1E28 //RX_FDEQ_BIN_14 +235 0x282C //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x4000 //RX_FDEQ_RESRV_0 +245 0x0320 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0030 //RX_FDDRC_BAND_MARGIN_1 +248 0x0050 //RX_FDDRC_BAND_MARGIN_2 +249 0x0080 //RX_FDDRC_BAND_MARGIN_3 +250 0x0004 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x2000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x2000 //RX_FDDRC_THRD_3_2 +258 0x5000 //RX_FDDRC_THRD_3_3 +259 0x4000 //RX_FDDRC_SLANT_0_0 +260 0x4000 //RX_FDDRC_SLANT_0_1 +261 0x4000 //RX_FDDRC_SLANT_0_2 +262 0x4000 //RX_FDDRC_SLANT_0_3 +263 0x7FFF //RX_FDDRC_SLANT_1_0 +264 0x7FFF //RX_FDDRC_SLANT_1_1 +265 0x7FFF //RX_FDDRC_SLANT_1_2 +266 0x7FFF //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +286 0x001A //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 +#VOL 2 +163 0x4000 //RX_TDDRC_ALPHA_UP_1 +164 0x4000 //RX_TDDRC_ALPHA_UP_2 +165 0x4000 //RX_TDDRC_ALPHA_UP_3 +166 0x4000 //RX_TDDRC_ALPHA_UP_4 +184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +190 0x7FFF //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +269 0x0001 //RX_TDDRC_THRD_0 +270 0x0002 //RX_TDDRC_THRD_1 +271 0x1800 //RX_TDDRC_THRD_2 +272 0x1800 //RX_TDDRC_THRD_3 +273 0x6000 //RX_TDDRC_SLANT_0 +274 0x6E00 //RX_TDDRC_SLANT_1 +275 0x4000 //RX_TDDRC_ALPHA_UP_0 +276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x199A //RX_TDDRC_HMNC_GAIN +279 0x0001 //RX_TDDRC_SMT_FLAG +280 0x0CCD //RX_TDDRC_SMT_W +281 0x03C3 //RX_TDDRC_DRC_GAIN +195 0x0020 //RX_FDEQ_SUBNUM +196 0x4848 //RX_FDEQ_GAIN_0 +197 0x4848 //RX_FDEQ_GAIN_1 +198 0x4848 //RX_FDEQ_GAIN_2 +199 0x4870 //RX_FDEQ_GAIN_3 +200 0x4848 //RX_FDEQ_GAIN_4 +201 0x4848 //RX_FDEQ_GAIN_5 +202 0x4850 //RX_FDEQ_GAIN_6 +203 0x485C //RX_FDEQ_GAIN_7 +204 0x5C60 //RX_FDEQ_GAIN_8 +205 0x685C //RX_FDEQ_GAIN_9 +206 0x5640 //RX_FDEQ_GAIN_10 +207 0x4040 //RX_FDEQ_GAIN_11 +208 0x5C58 //RX_FDEQ_GAIN_12 +209 0x5C60 //RX_FDEQ_GAIN_13 +210 0x6060 //RX_FDEQ_GAIN_14 +211 0x6060 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0202 //RX_FDEQ_BIN_0 +221 0x0203 //RX_FDEQ_BIN_1 +222 0x0303 //RX_FDEQ_BIN_2 +223 0x0402 //RX_FDEQ_BIN_3 +224 0x0504 //RX_FDEQ_BIN_4 +225 0x0209 //RX_FDEQ_BIN_5 +226 0x0808 //RX_FDEQ_BIN_6 +227 0x090A //RX_FDEQ_BIN_7 +228 0x0B0C //RX_FDEQ_BIN_8 +229 0x0D0E //RX_FDEQ_BIN_9 +230 0x1013 //RX_FDEQ_BIN_10 +231 0x1719 //RX_FDEQ_BIN_11 +232 0x1B1E //RX_FDEQ_BIN_12 +233 0x1E1E //RX_FDEQ_BIN_13 +234 0x1E28 //RX_FDEQ_BIN_14 +235 0x282C //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x4000 //RX_FDEQ_RESRV_0 +245 0x0320 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0030 //RX_FDDRC_BAND_MARGIN_1 +248 0x0050 //RX_FDDRC_BAND_MARGIN_2 +249 0x0080 //RX_FDDRC_BAND_MARGIN_3 +250 0x0004 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x2000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x2000 //RX_FDDRC_THRD_3_2 +258 0x5000 //RX_FDDRC_THRD_3_3 +259 0x4000 //RX_FDDRC_SLANT_0_0 +260 0x4000 //RX_FDDRC_SLANT_0_1 +261 0x4000 //RX_FDDRC_SLANT_0_2 +262 0x4000 //RX_FDDRC_SLANT_0_3 +263 0x7FFF //RX_FDDRC_SLANT_1_0 +264 0x7FFF //RX_FDDRC_SLANT_1_1 +265 0x7FFF //RX_FDDRC_SLANT_1_2 +266 0x7FFF //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +286 0x0025 //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 +#VOL 3 +163 0x4000 //RX_TDDRC_ALPHA_UP_1 +164 0x4000 //RX_TDDRC_ALPHA_UP_2 +165 0x4000 //RX_TDDRC_ALPHA_UP_3 +166 0x4000 //RX_TDDRC_ALPHA_UP_4 +184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +190 0x7FFF //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +269 0x0001 //RX_TDDRC_THRD_0 +270 0x0002 //RX_TDDRC_THRD_1 +271 0x1800 //RX_TDDRC_THRD_2 +272 0x1800 //RX_TDDRC_THRD_3 +273 0x6000 //RX_TDDRC_SLANT_0 +274 0x6E00 //RX_TDDRC_SLANT_1 +275 0x4000 //RX_TDDRC_ALPHA_UP_0 +276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x199A //RX_TDDRC_HMNC_GAIN +279 0x0001 //RX_TDDRC_SMT_FLAG +280 0x0CCD //RX_TDDRC_SMT_W +281 0x03C3 //RX_TDDRC_DRC_GAIN +195 0x0020 //RX_FDEQ_SUBNUM +196 0x4848 //RX_FDEQ_GAIN_0 +197 0x4848 //RX_FDEQ_GAIN_1 +198 0x4848 //RX_FDEQ_GAIN_2 +199 0x4870 //RX_FDEQ_GAIN_3 +200 0x4848 //RX_FDEQ_GAIN_4 +201 0x4848 //RX_FDEQ_GAIN_5 +202 0x4850 //RX_FDEQ_GAIN_6 +203 0x485C //RX_FDEQ_GAIN_7 +204 0x5C60 //RX_FDEQ_GAIN_8 +205 0x685C //RX_FDEQ_GAIN_9 +206 0x5640 //RX_FDEQ_GAIN_10 +207 0x4040 //RX_FDEQ_GAIN_11 +208 0x5C58 //RX_FDEQ_GAIN_12 +209 0x5C60 //RX_FDEQ_GAIN_13 +210 0x6060 //RX_FDEQ_GAIN_14 +211 0x6060 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0202 //RX_FDEQ_BIN_0 +221 0x0203 //RX_FDEQ_BIN_1 +222 0x0303 //RX_FDEQ_BIN_2 +223 0x0402 //RX_FDEQ_BIN_3 +224 0x0504 //RX_FDEQ_BIN_4 +225 0x0209 //RX_FDEQ_BIN_5 +226 0x0808 //RX_FDEQ_BIN_6 +227 0x090A //RX_FDEQ_BIN_7 +228 0x0B0C //RX_FDEQ_BIN_8 +229 0x0D0E //RX_FDEQ_BIN_9 +230 0x1013 //RX_FDEQ_BIN_10 +231 0x1719 //RX_FDEQ_BIN_11 +232 0x1B1E //RX_FDEQ_BIN_12 +233 0x1E1E //RX_FDEQ_BIN_13 +234 0x1E28 //RX_FDEQ_BIN_14 +235 0x282C //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x4000 //RX_FDEQ_RESRV_0 +245 0x0320 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0030 //RX_FDDRC_BAND_MARGIN_1 +248 0x0050 //RX_FDDRC_BAND_MARGIN_2 +249 0x0080 //RX_FDDRC_BAND_MARGIN_3 +250 0x0004 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x2000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x2000 //RX_FDDRC_THRD_3_2 +258 0x5000 //RX_FDDRC_THRD_3_3 +259 0x4000 //RX_FDDRC_SLANT_0_0 +260 0x4000 //RX_FDDRC_SLANT_0_1 +261 0x4000 //RX_FDDRC_SLANT_0_2 +262 0x4000 //RX_FDDRC_SLANT_0_3 +263 0x7FFF //RX_FDDRC_SLANT_1_0 +264 0x7FFF //RX_FDDRC_SLANT_1_1 +265 0x7FFF //RX_FDDRC_SLANT_1_2 +266 0x7FFF //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +286 0x0034 //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 +#VOL 4 +163 0x4000 //RX_TDDRC_ALPHA_UP_1 +164 0x4000 //RX_TDDRC_ALPHA_UP_2 +165 0x4000 //RX_TDDRC_ALPHA_UP_3 +166 0x4000 //RX_TDDRC_ALPHA_UP_4 +184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +190 0x7FFF //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +269 0x0001 //RX_TDDRC_THRD_0 +270 0x0002 //RX_TDDRC_THRD_1 +271 0x1800 //RX_TDDRC_THRD_2 +272 0x1800 //RX_TDDRC_THRD_3 +273 0x6000 //RX_TDDRC_SLANT_0 +274 0x6E00 //RX_TDDRC_SLANT_1 +275 0x4000 //RX_TDDRC_ALPHA_UP_0 +276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x199A //RX_TDDRC_HMNC_GAIN +279 0x0001 //RX_TDDRC_SMT_FLAG +280 0x0CCD //RX_TDDRC_SMT_W +281 0x03C3 //RX_TDDRC_DRC_GAIN +195 0x0020 //RX_FDEQ_SUBNUM +196 0x4848 //RX_FDEQ_GAIN_0 +197 0x4848 //RX_FDEQ_GAIN_1 +198 0x4848 //RX_FDEQ_GAIN_2 +199 0x4870 //RX_FDEQ_GAIN_3 +200 0x4848 //RX_FDEQ_GAIN_4 +201 0x4848 //RX_FDEQ_GAIN_5 +202 0x4850 //RX_FDEQ_GAIN_6 +203 0x485C //RX_FDEQ_GAIN_7 +204 0x5C60 //RX_FDEQ_GAIN_8 +205 0x685C //RX_FDEQ_GAIN_9 +206 0x5640 //RX_FDEQ_GAIN_10 +207 0x4040 //RX_FDEQ_GAIN_11 +208 0x5C58 //RX_FDEQ_GAIN_12 +209 0x5C60 //RX_FDEQ_GAIN_13 +210 0x6060 //RX_FDEQ_GAIN_14 +211 0x6060 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0202 //RX_FDEQ_BIN_0 +221 0x0203 //RX_FDEQ_BIN_1 +222 0x0303 //RX_FDEQ_BIN_2 +223 0x0402 //RX_FDEQ_BIN_3 +224 0x0504 //RX_FDEQ_BIN_4 +225 0x0209 //RX_FDEQ_BIN_5 +226 0x0808 //RX_FDEQ_BIN_6 +227 0x090A //RX_FDEQ_BIN_7 +228 0x0B0C //RX_FDEQ_BIN_8 +229 0x0D0E //RX_FDEQ_BIN_9 +230 0x1013 //RX_FDEQ_BIN_10 +231 0x1719 //RX_FDEQ_BIN_11 +232 0x1B1E //RX_FDEQ_BIN_12 +233 0x1E1E //RX_FDEQ_BIN_13 +234 0x1E28 //RX_FDEQ_BIN_14 +235 0x282C //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x4000 //RX_FDEQ_RESRV_0 +245 0x0320 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0030 //RX_FDDRC_BAND_MARGIN_1 +248 0x0050 //RX_FDDRC_BAND_MARGIN_2 +249 0x0080 //RX_FDDRC_BAND_MARGIN_3 +250 0x0004 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x2000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x2000 //RX_FDDRC_THRD_3_2 +258 0x5000 //RX_FDDRC_THRD_3_3 +259 0x4000 //RX_FDDRC_SLANT_0_0 +260 0x4000 //RX_FDDRC_SLANT_0_1 +261 0x4000 //RX_FDDRC_SLANT_0_2 +262 0x4000 //RX_FDDRC_SLANT_0_3 +263 0x7FFF //RX_FDDRC_SLANT_1_0 +264 0x7FFF //RX_FDDRC_SLANT_1_1 +265 0x7FFF //RX_FDDRC_SLANT_1_2 +266 0x7FFF //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +286 0x004D //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 +#VOL 5 +163 0x4000 //RX_TDDRC_ALPHA_UP_1 +164 0x4000 //RX_TDDRC_ALPHA_UP_2 +165 0x4000 //RX_TDDRC_ALPHA_UP_3 +166 0x4000 //RX_TDDRC_ALPHA_UP_4 +184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +190 0x7FFF //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +269 0x0001 //RX_TDDRC_THRD_0 +270 0x0002 //RX_TDDRC_THRD_1 +271 0x1800 //RX_TDDRC_THRD_2 +272 0x1800 //RX_TDDRC_THRD_3 +273 0x6000 //RX_TDDRC_SLANT_0 +274 0x6E00 //RX_TDDRC_SLANT_1 +275 0x4000 //RX_TDDRC_ALPHA_UP_0 +276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x199A //RX_TDDRC_HMNC_GAIN +279 0x0001 //RX_TDDRC_SMT_FLAG +280 0x0CCD //RX_TDDRC_SMT_W +281 0x03C3 //RX_TDDRC_DRC_GAIN +195 0x0020 //RX_FDEQ_SUBNUM +196 0x4848 //RX_FDEQ_GAIN_0 +197 0x4848 //RX_FDEQ_GAIN_1 +198 0x4848 //RX_FDEQ_GAIN_2 +199 0x4870 //RX_FDEQ_GAIN_3 +200 0x4848 //RX_FDEQ_GAIN_4 +201 0x4848 //RX_FDEQ_GAIN_5 +202 0x4850 //RX_FDEQ_GAIN_6 +203 0x485C //RX_FDEQ_GAIN_7 +204 0x5C60 //RX_FDEQ_GAIN_8 +205 0x685C //RX_FDEQ_GAIN_9 +206 0x5640 //RX_FDEQ_GAIN_10 +207 0x4040 //RX_FDEQ_GAIN_11 +208 0x5C58 //RX_FDEQ_GAIN_12 +209 0x5C60 //RX_FDEQ_GAIN_13 +210 0x6060 //RX_FDEQ_GAIN_14 +211 0x6060 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0202 //RX_FDEQ_BIN_0 +221 0x0203 //RX_FDEQ_BIN_1 +222 0x0303 //RX_FDEQ_BIN_2 +223 0x0402 //RX_FDEQ_BIN_3 +224 0x0504 //RX_FDEQ_BIN_4 +225 0x0209 //RX_FDEQ_BIN_5 +226 0x0808 //RX_FDEQ_BIN_6 +227 0x090A //RX_FDEQ_BIN_7 +228 0x0B0C //RX_FDEQ_BIN_8 +229 0x0D0E //RX_FDEQ_BIN_9 +230 0x1013 //RX_FDEQ_BIN_10 +231 0x1719 //RX_FDEQ_BIN_11 +232 0x1B1E //RX_FDEQ_BIN_12 +233 0x1E1E //RX_FDEQ_BIN_13 +234 0x1E28 //RX_FDEQ_BIN_14 +235 0x282C //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x4000 //RX_FDEQ_RESRV_0 +245 0x0320 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0030 //RX_FDDRC_BAND_MARGIN_1 +248 0x0050 //RX_FDDRC_BAND_MARGIN_2 +249 0x0080 //RX_FDDRC_BAND_MARGIN_3 +250 0x0004 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x2000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x2000 //RX_FDDRC_THRD_3_2 +258 0x5000 //RX_FDDRC_THRD_3_3 +259 0x4000 //RX_FDDRC_SLANT_0_0 +260 0x4000 //RX_FDDRC_SLANT_0_1 +261 0x4000 //RX_FDDRC_SLANT_0_2 +262 0x4000 //RX_FDDRC_SLANT_0_3 +263 0x7FFF //RX_FDDRC_SLANT_1_0 +264 0x7FFF //RX_FDDRC_SLANT_1_1 +265 0x7FFF //RX_FDDRC_SLANT_1_2 +266 0x7FFF //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +286 0x0074 //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 +#VOL 6 +163 0x4000 //RX_TDDRC_ALPHA_UP_1 +164 0x4000 //RX_TDDRC_ALPHA_UP_2 +165 0x4000 //RX_TDDRC_ALPHA_UP_3 +166 0x4000 //RX_TDDRC_ALPHA_UP_4 +184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +190 0x7FFF //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +269 0x0001 //RX_TDDRC_THRD_0 +270 0x0002 //RX_TDDRC_THRD_1 +271 0x1800 //RX_TDDRC_THRD_2 +272 0x1800 //RX_TDDRC_THRD_3 +273 0x6000 //RX_TDDRC_SLANT_0 +274 0x6E00 //RX_TDDRC_SLANT_1 +275 0x4000 //RX_TDDRC_ALPHA_UP_0 +276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x199A //RX_TDDRC_HMNC_GAIN +279 0x0001 //RX_TDDRC_SMT_FLAG +280 0x0CCD //RX_TDDRC_SMT_W +281 0x03C3 //RX_TDDRC_DRC_GAIN +195 0x0020 //RX_FDEQ_SUBNUM +196 0x4848 //RX_FDEQ_GAIN_0 +197 0x4848 //RX_FDEQ_GAIN_1 +198 0x4848 //RX_FDEQ_GAIN_2 +199 0x4870 //RX_FDEQ_GAIN_3 +200 0x4848 //RX_FDEQ_GAIN_4 +201 0x4848 //RX_FDEQ_GAIN_5 +202 0x4850 //RX_FDEQ_GAIN_6 +203 0x485C //RX_FDEQ_GAIN_7 +204 0x5C60 //RX_FDEQ_GAIN_8 +205 0x685C //RX_FDEQ_GAIN_9 +206 0x5640 //RX_FDEQ_GAIN_10 +207 0x4040 //RX_FDEQ_GAIN_11 +208 0x5C58 //RX_FDEQ_GAIN_12 +209 0x5C60 //RX_FDEQ_GAIN_13 +210 0x6060 //RX_FDEQ_GAIN_14 +211 0x6060 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0202 //RX_FDEQ_BIN_0 +221 0x0203 //RX_FDEQ_BIN_1 +222 0x0303 //RX_FDEQ_BIN_2 +223 0x0402 //RX_FDEQ_BIN_3 +224 0x0504 //RX_FDEQ_BIN_4 +225 0x0209 //RX_FDEQ_BIN_5 +226 0x0808 //RX_FDEQ_BIN_6 +227 0x090A //RX_FDEQ_BIN_7 +228 0x0B0C //RX_FDEQ_BIN_8 +229 0x0D0E //RX_FDEQ_BIN_9 +230 0x1013 //RX_FDEQ_BIN_10 +231 0x1719 //RX_FDEQ_BIN_11 +232 0x1B1E //RX_FDEQ_BIN_12 +233 0x1E1E //RX_FDEQ_BIN_13 +234 0x1E28 //RX_FDEQ_BIN_14 +235 0x282C //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x4000 //RX_FDEQ_RESRV_0 +245 0x0320 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0030 //RX_FDDRC_BAND_MARGIN_1 +248 0x0050 //RX_FDDRC_BAND_MARGIN_2 +249 0x0080 //RX_FDDRC_BAND_MARGIN_3 +250 0x0004 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x2000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x2000 //RX_FDDRC_THRD_3_2 +258 0x5000 //RX_FDDRC_THRD_3_3 +259 0x4000 //RX_FDDRC_SLANT_0_0 +260 0x4000 //RX_FDDRC_SLANT_0_1 +261 0x4000 //RX_FDDRC_SLANT_0_2 +262 0x4000 //RX_FDDRC_SLANT_0_3 +263 0x7FFF //RX_FDDRC_SLANT_1_0 +264 0x7FFF //RX_FDDRC_SLANT_1_1 +265 0x7FFF //RX_FDDRC_SLANT_1_2 +266 0x7FFF //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +286 0x0100 //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 #CASE_NAME HANDSFREE-HANDSFREE-VOICE_GENERIC-NB -#PARAM_TYPE TX+RX -#TOTAL_CUSTOM_STEP 7 +#PARAM_MODE FULL +#PARAM_TYPE TX+2RX +#TOTAL_CUSTOM_STEP 7+7 #TX 0 0x0001 //TX_OPERATION_MODE_0 1 0x0001 //TX_OPERATION_MODE_1 -2 0x0033 //TX_PATCH_REG +2 0x0073 //TX_PATCH_REG 3 0x2F7C //TX_SENDFUNC_MODE_0 4 0x0001 //TX_SENDFUNC_MODE_1 5 0x0003 //TX_NUM_MIC @@ -5416,7 +8168,7 @@ 147 0x0100 //TX_AEC_REF_GAIN_0 148 0x0800 //TX_AEC_REF_GAIN_1 149 0x0800 //TX_AEC_REF_GAIN_2 -150 0x7500 //TX_EAD_THR +150 0x7A00 //TX_EAD_THR 151 0x1000 //TX_THR_RE_EST 152 0x0200 //TX_MIN_EQ_RE_EST_0 153 0x0200 //TX_MIN_EQ_RE_EST_1 @@ -5437,7 +8189,7 @@ 168 0x2000 //TX_GAIN_NP 169 0x0180 //TX_SE_HOLD_N 170 0x00C8 //TX_DT_HOLD_N -171 0x05DC //TX_DT2_HOLD_N +171 0x0200 //TX_DT2_HOLD_N 172 0x6666 //TX_AEC_RESRV_0 173 0x0000 //TX_AEC_RESRV_1 174 0x0014 //TX_AEC_RESRV_2 @@ -5463,10 +8215,10 @@ 194 0x0000 //TX_NORMENERTH 195 0x0000 //TX_NORMENERHIGHTH 196 0x0000 //TX_NORMENERHIGHTHL -197 0x6590 //TX_DTD_THR1_0 -198 0x6590 //TX_DTD_THR1_1 -199 0x6590 //TX_DTD_THR1_2 -200 0x7FF0 //TX_DTD_THR1_3 +197 0x7148 //TX_DTD_THR1_0 +198 0x7148 //TX_DTD_THR1_1 +199 0x7148 //TX_DTD_THR1_2 +200 0x5DC0 //TX_DTD_THR1_3 201 0x7FF0 //TX_DTD_THR1_4 202 0x7FF0 //TX_DTD_THR1_5 203 0x7FF0 //TX_DTD_THR1_6 @@ -5494,7 +8246,7 @@ 225 0x1770 //TX_RATIO_DT_L_TH_HIGH 226 0x4E20 //TX_RATIO_DT_H_TH_HIGH 227 0x09C4 //TX_RATIO_DT_L0_TH -228 0x0800 //TX_B_POST_FILT_ECHO_L +228 0x2000 //TX_B_POST_FILT_ECHO_L 229 0x2000 //TX_B_POST_FILT_ECHO_H 230 0x0200 //TX_MIN_G_CTRL_ECHO 231 0x1000 //TX_B_LESSCUT_RTO_ECHO @@ -5517,12 +8269,12 @@ 248 0xF800 //TX_THR_SN_EST_6 249 0xF800 //TX_THR_SN_EST_7 250 0x0050 //TX_DELTA_THR_SN_EST_0 -251 0x01A0 //TX_DELTA_THR_SN_EST_1 +251 0x0200 //TX_DELTA_THR_SN_EST_1 252 0x0200 //TX_DELTA_THR_SN_EST_2 -253 0x0200 //TX_DELTA_THR_SN_EST_3 -254 0x0100 //TX_DELTA_THR_SN_EST_4 +253 0x0100 //TX_DELTA_THR_SN_EST_3 +254 0x0200 //TX_DELTA_THR_SN_EST_4 255 0x0200 //TX_DELTA_THR_SN_EST_5 -256 0x0200 //TX_DELTA_THR_SN_EST_6 +256 0x01A0 //TX_DELTA_THR_SN_EST_6 257 0x0200 //TX_DELTA_THR_SN_EST_7 258 0x4000 //TX_LAMBDA_NN_EST_0 259 0x4000 //TX_LAMBDA_NN_EST_1 @@ -5548,29 +8300,29 @@ 279 0x1000 //TX_B_POST_FLT_0 280 0x1000 //TX_B_POST_FLT_1 281 0x0010 //TX_NS_LVL_CTRL_0 -282 0x0012 //TX_NS_LVL_CTRL_1 -283 0x0017 //TX_NS_LVL_CTRL_2 -284 0x0015 //TX_NS_LVL_CTRL_3 +282 0x0017 //TX_NS_LVL_CTRL_1 +283 0x0015 //TX_NS_LVL_CTRL_2 +284 0x0012 //TX_NS_LVL_CTRL_3 285 0x0012 //TX_NS_LVL_CTRL_4 -286 0x0012 //TX_NS_LVL_CTRL_5 -287 0x0011 //TX_NS_LVL_CTRL_6 +286 0x0011 //TX_NS_LVL_CTRL_5 +287 0x0012 //TX_NS_LVL_CTRL_6 288 0x0011 //TX_NS_LVL_CTRL_7 -289 0x000F //TX_MIN_GAIN_S_0 -290 0x000F //TX_MIN_GAIN_S_1 -291 0x000D //TX_MIN_GAIN_S_2 -292 0x000F //TX_MIN_GAIN_S_3 -293 0x000F //TX_MIN_GAIN_S_4 -294 0x000F //TX_MIN_GAIN_S_5 -295 0x0010 //TX_MIN_GAIN_S_6 -296 0x000F //TX_MIN_GAIN_S_7 +289 0x0018 //TX_MIN_GAIN_S_0 +290 0x0018 //TX_MIN_GAIN_S_1 +291 0x0018 //TX_MIN_GAIN_S_2 +292 0x0018 //TX_MIN_GAIN_S_3 +293 0x0018 //TX_MIN_GAIN_S_4 +294 0x0018 //TX_MIN_GAIN_S_5 +295 0x0018 //TX_MIN_GAIN_S_6 +296 0x0018 //TX_MIN_GAIN_S_7 297 0x4000 //TX_NMOS_SUP 298 0x0000 //TX_NS_MAX_PRI_SNR_TH 299 0x0000 //TX_NMOS_SUP_MENSA 300 0x7FFF //TX_SNRI_SUP_0 -301 0x4000 //TX_SNRI_SUP_1 -302 0x1000 //TX_SNRI_SUP_2 -303 0x4000 //TX_SNRI_SUP_3 -304 0x2400 //TX_SNRI_SUP_4 +301 0x1000 //TX_SNRI_SUP_1 +302 0x4000 //TX_SNRI_SUP_2 +303 0x2400 //TX_SNRI_SUP_3 +304 0x4000 //TX_SNRI_SUP_4 305 0x4000 //TX_SNRI_SUP_5 306 0x4000 //TX_SNRI_SUP_6 307 0x7FFF //TX_SNRI_SUP_7 @@ -5580,20 +8332,20 @@ 311 0x000A //TX_MUSIC_MORENS 312 0x7FFF //TX_A_POST_FILT_0 313 0x2000 //TX_A_POST_FILT_1 -314 0x4000 //TX_A_POST_FILT_S_0 -315 0x5000 //TX_A_POST_FILT_S_1 -316 0x2000 //TX_A_POST_FILT_S_2 -317 0x4000 //TX_A_POST_FILT_S_3 -318 0x1000 //TX_A_POST_FILT_S_4 -319 0x3000 //TX_A_POST_FILT_S_5 -320 0x5000 //TX_A_POST_FILT_S_6 -321 0x7000 //TX_A_POST_FILT_S_7 +314 0x7FFF //TX_A_POST_FILT_S_0 +315 0x7FFF //TX_A_POST_FILT_S_1 +316 0x7FFF //TX_A_POST_FILT_S_2 +317 0x7FFF //TX_A_POST_FILT_S_3 +318 0x7FFF //TX_A_POST_FILT_S_4 +319 0x7FFF //TX_A_POST_FILT_S_5 +320 0x7FFF //TX_A_POST_FILT_S_6 +321 0x7FFF //TX_A_POST_FILT_S_7 322 0x1000 //TX_B_POST_FILT_0 323 0x1000 //TX_B_POST_FILT_1 324 0x1000 //TX_B_POST_FILT_2 -325 0x1000 //TX_B_POST_FILT_3 -326 0x5000 //TX_B_POST_FILT_4 -327 0x3000 //TX_B_POST_FILT_5 +325 0x5000 //TX_B_POST_FILT_3 +326 0x3000 //TX_B_POST_FILT_4 +327 0x1000 //TX_B_POST_FILT_5 328 0x1000 //TX_B_POST_FILT_6 329 0x2000 //TX_B_POST_FILT_7 330 0x4000 //TX_B_LESSCUT_RTO_S_0 @@ -5605,14 +8357,14 @@ 336 0x6000 //TX_B_LESSCUT_RTO_S_6 337 0x7FFF //TX_B_LESSCUT_RTO_S_7 338 0x7E00 //TX_LAMBDA_PFILT -339 0x7D00 //TX_LAMBDA_PFILT_S_0 -340 0x7900 //TX_LAMBDA_PFILT_S_1 -341 0x7400 //TX_LAMBDA_PFILT_S_2 -342 0x7900 //TX_LAMBDA_PFILT_S_3 -343 0x7000 //TX_LAMBDA_PFILT_S_4 -344 0x7D00 //TX_LAMBDA_PFILT_S_5 -345 0x7D00 //TX_LAMBDA_PFILT_S_6 -346 0x7D00 //TX_LAMBDA_PFILT_S_7 +339 0x7E00 //TX_LAMBDA_PFILT_S_0 +340 0x7E00 //TX_LAMBDA_PFILT_S_1 +341 0x7E00 //TX_LAMBDA_PFILT_S_2 +342 0x7E00 //TX_LAMBDA_PFILT_S_3 +343 0x7E00 //TX_LAMBDA_PFILT_S_4 +344 0x7E00 //TX_LAMBDA_PFILT_S_5 +345 0x7E00 //TX_LAMBDA_PFILT_S_6 +346 0x7E00 //TX_LAMBDA_PFILT_S_7 347 0x0200 //TX_K_PEPPER 348 0x0800 //TX_A_PEPPER 349 0x1EAA //TX_K_PEPPER_HF @@ -5646,10 +8398,10 @@ 377 0x7FFF //TX_NOISE_TH_5_4 378 0x0FA0 //TX_NOISE_TH_6 379 0x000A //TX_MINENOISE_TH -380 0x4000 //TX_MINENOISE_MIC0_TH_MTS -381 0xFFEE //TX_MINENOISE_MIC0_TH_EXP -382 0x6000 //TX_MINENOISE_MIC0_S_TH_MTS -383 0xFFF3 //TX_MINENOISE_MIC0_S_TH_EXP +380 0xD508 //TX_MORENS_TFMASK_TH +381 0x0001 //TX_DRC_QUIET_FLOOR +382 0x3A98 //TX_RATIODTL_CUT_TH +383 0x0DAC //TX_DT_CUT_K1 384 0x0666 //TX_OUT_ENER_S_TH_CLEAN 385 0x0666 //TX_OUT_ENER_S_TH_LESSCLEAN 386 0x0333 //TX_OUT_ENER_S_TH_NOISY @@ -5657,15 +8409,15 @@ 388 0x1000 //TX_OUT_ENER_TH_SPEECH 389 0x2000 //TX_SN_NPB_GAIN 390 0x0000 //TX_NN_NPB_GAIN -391 0x0000 //TX_CSX_ALPHA_0 -392 0x0000 //TX_CSX_ALPHA_1 -393 0x0000 //TX_CSX_ALPHA_2 -394 0x0000 //TX_CSX_ALPHA_3 -395 0x0800 //TX_MU_ARSP_EST -396 0x00C8 //TX_P_OUTBEAM_MIN_TH +391 0x7FFF //TX_POST_MASK_SUP_HSNE +392 0x7000 //TX_TAIL_DET_TH +393 0x4000 //TX_B_LESSCUT_RTO_WTA +394 0x0000 //TX_MEL_G_R +395 0x0080 //TX_SUPHIGH_TH +396 0x0000 //TX_MASK_G_R 397 0x0002 //TX_EXTRA_NS_L -398 0x0800 //TX_EXTRA_NS_A -399 0x0005 //TX_VR_NOISE_FLOOR_TH +398 0x1800 //TX_C_POST_FLT_MASK +399 0x7FFF //TX_A_POST_FLT_WNS 400 0x0148 //TX_MIN_G_LOW300HZ 401 0x0001 //TX_MAXLEVEL_CNG 402 0x00B4 //TX_STN_NOISE_TH @@ -5775,21 +8527,21 @@ 506 0x2000 //TX_RADIODTLV 507 0x0320 //TX_POWER_LINEIN_TH 508 0x0014 //TX_FE_VADCOUNT_TH_FC -509 0x0000 //TX_ECHO_SUPP_FC +509 0x000A //TX_ECHO_SUPP_FC 510 0x0C80 //TX_ECHO_TH 511 0x6666 //TX_MIC_TO_BFGAIN 512 0x0000 //TX_MICTOBFGAIN0 513 0x0000 //TX_FASTMUE_TH -514 0x0000 //TX_DERVB_LEN_0 -515 0x0000 //TX_DERVB_LEN_1 -516 0x0000 //TX_RHO_DERVB -517 0x0000 //TX_MIC_INDX_DERVB -518 0x0000 //TX_MU_DERVB -519 0x0000 //TX_DR_RESRV_0 -520 0x0000 //TX_DR_RESRV_1 -521 0x0000 //TX_DR_RESRV_2 -522 0x0000 //TX_DR_RESRV_3 -523 0x0000 //TX_DR_RESRV_4 +514 0x3000 //TX_DEREVERB_LF_MU +515 0x34CD //TX_DEREVERB_HF_MU +516 0x0007 //TX_DEREVERB_DELAY +517 0x0004 //TX_DEREVERB_COEF_LEN +518 0x0003 //TX_DEREVERB_DNR +519 0x0000 //TX_DEREVERB_ALPHA +520 0x0000 //TX_DEREVERB_BETA +521 0x3A98 //TX_GSC_RTOL_TH +522 0x3A98 //TX_GSC_RTOH_TH +523 0x7E2C //TX_WIDE2_MEANHTH 524 0x0000 //TX_DR_RESRV_5 525 0x0000 //TX_DR_RESRV_6 526 0x0000 //TX_DR_RESRV_7 @@ -5834,15 +8586,15 @@ 565 0x0000 //TX_PB_RESRV_1 566 0x0014 //TX_FDEQ_SUBNUM 567 0x5250 //TX_FDEQ_GAIN_0 -568 0x4C48 //TX_FDEQ_GAIN_1 +568 0x4848 //TX_FDEQ_GAIN_1 569 0x4848 //TX_FDEQ_GAIN_2 570 0x4A43 //TX_FDEQ_GAIN_3 571 0x374B //TX_FDEQ_GAIN_4 572 0x3444 //TX_FDEQ_GAIN_5 573 0x433C //TX_FDEQ_GAIN_6 -574 0x403C //TX_FDEQ_GAIN_7 -575 0x2627 //TX_FDEQ_GAIN_8 -576 0x2929 //TX_FDEQ_GAIN_9 +574 0x3A37 //TX_FDEQ_GAIN_7 +575 0x2A2A //TX_FDEQ_GAIN_8 +576 0x2C2C //TX_FDEQ_GAIN_9 577 0x4848 //TX_FDEQ_GAIN_10 578 0x4848 //TX_FDEQ_GAIN_11 579 0x4848 //TX_FDEQ_GAIN_12 @@ -5939,9 +8691,9 @@ 670 0x4848 //TX_PREEQ_GAIN_MIC1_4 671 0x4848 //TX_PREEQ_GAIN_MIC1_5 672 0x4848 //TX_PREEQ_GAIN_MIC1_6 -673 0x4848 //TX_PREEQ_GAIN_MIC1_7 -674 0x4849 //TX_PREEQ_GAIN_MIC1_8 -675 0x4A4B //TX_PREEQ_GAIN_MIC1_9 +673 0x4A4A //TX_PREEQ_GAIN_MIC1_7 +674 0x4B4B //TX_PREEQ_GAIN_MIC1_8 +675 0x4D4E //TX_PREEQ_GAIN_MIC1_9 676 0x4848 //TX_PREEQ_GAIN_MIC1_10 677 0x4848 //TX_PREEQ_GAIN_MIC1_11 678 0x4848 //TX_PREEQ_GAIN_MIC1_12 @@ -5987,8 +8739,8 @@ 718 0x4848 //TX_PREEQ_GAIN_MIC2_3 719 0x4848 //TX_PREEQ_GAIN_MIC2_4 720 0x4848 //TX_PREEQ_GAIN_MIC2_5 -721 0x4848 //TX_PREEQ_GAIN_MIC2_6 -722 0x4849 //TX_PREEQ_GAIN_MIC2_7 +721 0x484A //TX_PREEQ_GAIN_MIC2_6 +722 0x4B4B //TX_PREEQ_GAIN_MIC2_7 723 0x4B4C //TX_PREEQ_GAIN_MIC2_8 724 0x4D50 //TX_PREEQ_GAIN_MIC2_9 725 0x4848 //TX_PREEQ_GAIN_MIC2_10 @@ -6132,7 +8884,7 @@ 863 0x199A //TX_TDDRC_HMNC_GAIN 864 0x0000 //TX_TDDRC_SMT_FLAG 865 0x0CCD //TX_TDDRC_SMT_W -866 0x0A00 //TX_TDDRC_DRC_GAIN +866 0x0A98 //TX_TDDRC_DRC_GAIN 867 0x7FFF //TX_TDDRC_LMT_THRD 868 0x0000 //TX_TDDRC_LMT_ALPHA 869 0x0000 //TX_TFMASKLTH @@ -6157,14 +8909,79 @@ 888 0x0028 //TX_FASTNS_ARSPC_TH 889 0xC000 //TX_FASTNS_MASK5_TH 890 0x4848 //TX_POSTSSA_MIN_G_VR_MASK -891 0x7FFF //TX_A_LESSCUT_RTO_MASK +891 0x1000 //TX_A_LESSCUT_RTO_MASK 892 0x1770 //TX_FASTNS_NOISETH 893 0xC000 //TX_FASTNS_SSA_THLFL 894 0xC000 //TX_FASTNS_SSA_THHFL 895 0xCCCC //TX_FASTNS_SSA_THLFH 896 0xD999 //TX_FASTNS_SSA_THHFH +897 0x2339 //TX_SENDFUNC_REG_MICMUTE +898 0x0021 //TX_SENDFUNC_REG_MICMUTE1 +899 0x02BC //TX_MICMUTE_RATIO_THR +900 0x0140 //TX_MICMUTE_AMP_THR +901 0x0004 //TX_MICMUTE_HPF_IND +902 0x00C0 //TX_MICMUTE_LOG_EYR_TH +903 0x0008 //TX_MICMUTE_CVG_TIME +904 0x0008 //TX_MICMUTE_RELEASE_TIME +905 0x01FE //TX_MIC_VOLUME_MIC0MUTE +906 0x0020 //TX_MICMUTE_EPD_OFFSET_0 +907 0x001E //TX_MICMUTE_FRQ_AEC_L +908 0x7999 //TX_MICMUTE_EAD_THR +909 0x7FFF //TX_MICMUTE_LAMBDA_CB_NLE +910 0x7FFF //TX_MICMUTE_LAMBDA_RE_EST +911 0x4000 //TX_DTD_THR1_MICMUTE_0 +912 0x7000 //TX_DTD_THR1_MICMUTE_1 +913 0x7FFF //TX_DTD_THR1_MICMUTE_2 +914 0x7FFF //TX_DTD_THR1_MICMUTE_3 +915 0x6CCC //TX_DTD_THR2_MICMUTE_0 +916 0x0400 //TX_MICMUTE_MIN_EQ_RE_EST_0 +917 0x0400 //TX_MICMUTE_MIN_EQ_RE_EST_1 +918 0x1000 //TX_MICMUTE_MIN_EQ_RE_EST_2 +919 0x7FFF //TX_MICMUTE_MIN_EQ_RE_EST_3 +920 0x7FFF //TX_MICMUTE_MIN_EQ_RE_EST_4 +921 0x4000 //TX_MICMUTE_C_POST_FLT +922 0x03E8 //TX_MICMUTE_DT_CUT_K +923 0x0001 //TX_MICMUTE_DT_CUT_THR +924 0x03E8 //TX_MICMUTE_DT_CUT_K2 +925 0x0001 //TX_MICMUTE_DT_CUT_THR2 +926 0x0064 //TX_MICMUTE_DT2_HOLD_N +927 0x1000 //TX_MICMUTE_RATIODTH_THCUT +928 0x1000 //TX_MICMUTE_B_POST_FLT_ECHOL +929 0x7FFF //TX_MICMUTE_B_POST_FLT_ECHOH +930 0x0400 //TX_MICMUTE_C_POST_FLT_MASK +931 0x7999 //TX_MICMUTE_RATIODTL_CUT_TH +932 0x0258 //TX_MICMUTE_DT_CUT_K1 +933 0x0800 //TX_MICMUTE_N2_SN_EST +934 0xFC00 //TX_MICMUTE_THR_SN_EST_0 +935 0x001C //TX_MICMUTE_MIN_G_CTRL_0 +936 0x6000 //TX_MICMUTE_A_POST_FILT_S_0 +937 0x7000 //TX_MICMUTE_B_POST_FILT_0 +938 0x2710 //TX_MIC1RUB_AMP_THR +939 0x0010 //TX_MIC1MUTE_RATIO_THR +940 0x0450 //TX_MIC1MUTE_AMP_THR +941 0x0008 //TX_MIC1MUTE_CVG_TIME +942 0x0008 //TX_MIC1MUTE_RELEASE_TIME +943 0x0000 //TX_AMS_RESRV_01 +944 0x0000 //TX_AMS_RESRV_02 +945 0x0000 //TX_AMS_RESRV_03 +946 0x0000 //TX_AMS_RESRV_04 +947 0x0000 //TX_AMS_RESRV_05 +948 0x0000 //TX_AMS_RESRV_06 +949 0x0000 //TX_AMS_RESRV_07 +950 0x0000 //TX_AMS_RESRV_08 +951 0x0000 //TX_AMS_RESRV_09 +952 0x0000 //TX_AMS_RESRV_10 +953 0x0000 //TX_AMS_RESRV_11 +954 0x0000 //TX_AMS_RESRV_12 +955 0x0000 //TX_AMS_RESRV_13 +956 0x0000 //TX_AMS_RESRV_14 +957 0x0000 //TX_AMS_RESRV_15 +958 0x0000 //TX_AMS_RESRV_16 +959 0x0000 //TX_AMS_RESRV_17 +960 0x0000 //TX_AMS_RESRV_18 +961 0x0000 //TX_AMS_RESRV_19 #RX -0 0x027C //RX_RECVFUNC_MODE_0 +0 0x206C //RX_RECVFUNC_MODE_0 1 0x0000 //RX_RECVFUNC_MODE_1 2 0x0000 //RX_SAMPLINGFREQ_SIG 3 0x0000 //RX_SAMPLINGFREQ_PROC @@ -6203,16 +9020,16 @@ 36 0x0000 //RX_LMT_THRD 37 0x4000 //RX_LMT_ALPHA 38 0x0014 //RX_FDEQ_SUBNUM -39 0x8080 //RX_FDEQ_GAIN_0 -40 0x8054 //RX_FDEQ_GAIN_1 -41 0x5050 //RX_FDEQ_GAIN_2 -42 0x5058 //RX_FDEQ_GAIN_3 -43 0x5C70 //RX_FDEQ_GAIN_4 -44 0x4848 //RX_FDEQ_GAIN_5 -45 0x484C //RX_FDEQ_GAIN_6 -46 0x4848 //RX_FDEQ_GAIN_7 -47 0x485A //RX_FDEQ_GAIN_8 -48 0x5A58 //RX_FDEQ_GAIN_9 +39 0x5252 //RX_FDEQ_GAIN_0 +40 0x4E4F //RX_FDEQ_GAIN_1 +41 0x4743 //RX_FDEQ_GAIN_2 +42 0x454C //RX_FDEQ_GAIN_3 +43 0x4C49 //RX_FDEQ_GAIN_4 +44 0x584A //RX_FDEQ_GAIN_5 +45 0x4642 //RX_FDEQ_GAIN_6 +46 0x4043 //RX_FDEQ_GAIN_7 +47 0x454A //RX_FDEQ_GAIN_8 +48 0x4C53 //RX_FDEQ_GAIN_9 49 0x4848 //RX_FDEQ_GAIN_10 50 0x4848 //RX_FDEQ_GAIN_11 51 0x4848 //RX_FDEQ_GAIN_12 @@ -6231,8 +9048,8 @@ 64 0x0203 //RX_FDEQ_BIN_1 65 0x0303 //RX_FDEQ_BIN_2 66 0x0304 //RX_FDEQ_BIN_3 -67 0x0604 //RX_FDEQ_BIN_4 -68 0x0406 //RX_FDEQ_BIN_5 +67 0x0503 //RX_FDEQ_BIN_4 +68 0x0107 //RX_FDEQ_BIN_5 69 0x0708 //RX_FDEQ_BIN_6 70 0x090A //RX_FDEQ_BIN_7 71 0x0B0C //RX_FDEQ_BIN_8 @@ -6288,7 +9105,7 @@ 121 0x199A //RX_TDDRC_HMNC_GAIN 122 0x0001 //RX_TDDRC_SMT_FLAG 123 0x0CCD //RX_TDDRC_SMT_W -124 0x0780 //RX_TDDRC_DRC_GAIN +124 0x02D2 //RX_TDDRC_DRC_GAIN 125 0x7C00 //RX_LAMBDA_PKA_FP 126 0x2000 //RX_TPKA_FP 127 0x2000 //RX_MIN_G_FP @@ -6344,18 +9161,18 @@ 121 0x199A //RX_TDDRC_HMNC_GAIN 122 0x0001 //RX_TDDRC_SMT_FLAG 123 0x0CCD //RX_TDDRC_SMT_W -124 0x0780 //RX_TDDRC_DRC_GAIN +124 0x032A //RX_TDDRC_DRC_GAIN 38 0x0014 //RX_FDEQ_SUBNUM -39 0x8080 //RX_FDEQ_GAIN_0 -40 0x8054 //RX_FDEQ_GAIN_1 -41 0x5050 //RX_FDEQ_GAIN_2 -42 0x5058 //RX_FDEQ_GAIN_3 -43 0x5C70 //RX_FDEQ_GAIN_4 -44 0x4848 //RX_FDEQ_GAIN_5 -45 0x484C //RX_FDEQ_GAIN_6 -46 0x4848 //RX_FDEQ_GAIN_7 -47 0x485A //RX_FDEQ_GAIN_8 -48 0x5A58 //RX_FDEQ_GAIN_9 +39 0x6059 //RX_FDEQ_GAIN_0 +40 0x4343 //RX_FDEQ_GAIN_1 +41 0x4343 //RX_FDEQ_GAIN_2 +42 0x454C //RX_FDEQ_GAIN_3 +43 0x4C4C //RX_FDEQ_GAIN_4 +44 0x584D //RX_FDEQ_GAIN_5 +45 0x4C4C //RX_FDEQ_GAIN_6 +46 0x4C3B //RX_FDEQ_GAIN_7 +47 0x3A3F //RX_FDEQ_GAIN_8 +48 0x4C53 //RX_FDEQ_GAIN_9 49 0x4848 //RX_FDEQ_GAIN_10 50 0x4848 //RX_FDEQ_GAIN_11 51 0x4848 //RX_FDEQ_GAIN_12 @@ -6374,8 +9191,8 @@ 64 0x0203 //RX_FDEQ_BIN_1 65 0x0303 //RX_FDEQ_BIN_2 66 0x0304 //RX_FDEQ_BIN_3 -67 0x0604 //RX_FDEQ_BIN_4 -68 0x0406 //RX_FDEQ_BIN_5 +67 0x0503 //RX_FDEQ_BIN_4 +68 0x0107 //RX_FDEQ_BIN_5 69 0x0708 //RX_FDEQ_BIN_6 70 0x090A //RX_FDEQ_BIN_7 71 0x0B0C //RX_FDEQ_BIN_8 @@ -6443,18 +9260,18 @@ 121 0x199A //RX_TDDRC_HMNC_GAIN 122 0x0001 //RX_TDDRC_SMT_FLAG 123 0x0CCD //RX_TDDRC_SMT_W -124 0x0780 //RX_TDDRC_DRC_GAIN +124 0x032A //RX_TDDRC_DRC_GAIN 38 0x0014 //RX_FDEQ_SUBNUM -39 0x8080 //RX_FDEQ_GAIN_0 -40 0x8054 //RX_FDEQ_GAIN_1 -41 0x5050 //RX_FDEQ_GAIN_2 -42 0x5058 //RX_FDEQ_GAIN_3 -43 0x5C70 //RX_FDEQ_GAIN_4 -44 0x4848 //RX_FDEQ_GAIN_5 -45 0x484C //RX_FDEQ_GAIN_6 -46 0x4848 //RX_FDEQ_GAIN_7 -47 0x485A //RX_FDEQ_GAIN_8 -48 0x5A58 //RX_FDEQ_GAIN_9 +39 0x6059 //RX_FDEQ_GAIN_0 +40 0x4343 //RX_FDEQ_GAIN_1 +41 0x4343 //RX_FDEQ_GAIN_2 +42 0x454C //RX_FDEQ_GAIN_3 +43 0x4C4C //RX_FDEQ_GAIN_4 +44 0x584D //RX_FDEQ_GAIN_5 +45 0x4C4C //RX_FDEQ_GAIN_6 +46 0x4C3B //RX_FDEQ_GAIN_7 +47 0x3A3F //RX_FDEQ_GAIN_8 +48 0x4C53 //RX_FDEQ_GAIN_9 49 0x4848 //RX_FDEQ_GAIN_10 50 0x4848 //RX_FDEQ_GAIN_11 51 0x4848 //RX_FDEQ_GAIN_12 @@ -6473,8 +9290,8 @@ 64 0x0203 //RX_FDEQ_BIN_1 65 0x0303 //RX_FDEQ_BIN_2 66 0x0304 //RX_FDEQ_BIN_3 -67 0x0604 //RX_FDEQ_BIN_4 -68 0x0406 //RX_FDEQ_BIN_5 +67 0x0503 //RX_FDEQ_BIN_4 +68 0x0107 //RX_FDEQ_BIN_5 69 0x0708 //RX_FDEQ_BIN_6 70 0x090A //RX_FDEQ_BIN_7 71 0x0B0C //RX_FDEQ_BIN_8 @@ -6542,18 +9359,18 @@ 121 0x199A //RX_TDDRC_HMNC_GAIN 122 0x0001 //RX_TDDRC_SMT_FLAG 123 0x0CCD //RX_TDDRC_SMT_W -124 0x0780 //RX_TDDRC_DRC_GAIN +124 0x032A //RX_TDDRC_DRC_GAIN 38 0x0014 //RX_FDEQ_SUBNUM -39 0x8080 //RX_FDEQ_GAIN_0 -40 0x8054 //RX_FDEQ_GAIN_1 -41 0x5050 //RX_FDEQ_GAIN_2 -42 0x5058 //RX_FDEQ_GAIN_3 -43 0x5C70 //RX_FDEQ_GAIN_4 -44 0x4848 //RX_FDEQ_GAIN_5 -45 0x484C //RX_FDEQ_GAIN_6 -46 0x4848 //RX_FDEQ_GAIN_7 -47 0x485A //RX_FDEQ_GAIN_8 -48 0x5A58 //RX_FDEQ_GAIN_9 +39 0x6059 //RX_FDEQ_GAIN_0 +40 0x4343 //RX_FDEQ_GAIN_1 +41 0x4343 //RX_FDEQ_GAIN_2 +42 0x454C //RX_FDEQ_GAIN_3 +43 0x4C4C //RX_FDEQ_GAIN_4 +44 0x584D //RX_FDEQ_GAIN_5 +45 0x4C4C //RX_FDEQ_GAIN_6 +46 0x4C3B //RX_FDEQ_GAIN_7 +47 0x3A3F //RX_FDEQ_GAIN_8 +48 0x4C53 //RX_FDEQ_GAIN_9 49 0x4848 //RX_FDEQ_GAIN_10 50 0x4848 //RX_FDEQ_GAIN_11 51 0x4848 //RX_FDEQ_GAIN_12 @@ -6572,8 +9389,8 @@ 64 0x0203 //RX_FDEQ_BIN_1 65 0x0303 //RX_FDEQ_BIN_2 66 0x0304 //RX_FDEQ_BIN_3 -67 0x0604 //RX_FDEQ_BIN_4 -68 0x0406 //RX_FDEQ_BIN_5 +67 0x0503 //RX_FDEQ_BIN_4 +68 0x0107 //RX_FDEQ_BIN_5 69 0x0708 //RX_FDEQ_BIN_6 70 0x090A //RX_FDEQ_BIN_7 71 0x0B0C //RX_FDEQ_BIN_8 @@ -6641,18 +9458,18 @@ 121 0x199A //RX_TDDRC_HMNC_GAIN 122 0x0001 //RX_TDDRC_SMT_FLAG 123 0x0CCD //RX_TDDRC_SMT_W -124 0x0780 //RX_TDDRC_DRC_GAIN +124 0x032A //RX_TDDRC_DRC_GAIN 38 0x0014 //RX_FDEQ_SUBNUM -39 0x8080 //RX_FDEQ_GAIN_0 -40 0x8054 //RX_FDEQ_GAIN_1 -41 0x5050 //RX_FDEQ_GAIN_2 -42 0x5058 //RX_FDEQ_GAIN_3 -43 0x5C70 //RX_FDEQ_GAIN_4 -44 0x4848 //RX_FDEQ_GAIN_5 -45 0x484C //RX_FDEQ_GAIN_6 -46 0x4848 //RX_FDEQ_GAIN_7 -47 0x485A //RX_FDEQ_GAIN_8 -48 0x5A58 //RX_FDEQ_GAIN_9 +39 0x6059 //RX_FDEQ_GAIN_0 +40 0x4343 //RX_FDEQ_GAIN_1 +41 0x4343 //RX_FDEQ_GAIN_2 +42 0x454C //RX_FDEQ_GAIN_3 +43 0x4C4C //RX_FDEQ_GAIN_4 +44 0x584D //RX_FDEQ_GAIN_5 +45 0x4C4C //RX_FDEQ_GAIN_6 +46 0x4C3B //RX_FDEQ_GAIN_7 +47 0x3A3F //RX_FDEQ_GAIN_8 +48 0x4C53 //RX_FDEQ_GAIN_9 49 0x4848 //RX_FDEQ_GAIN_10 50 0x4848 //RX_FDEQ_GAIN_11 51 0x4848 //RX_FDEQ_GAIN_12 @@ -6671,8 +9488,8 @@ 64 0x0203 //RX_FDEQ_BIN_1 65 0x0303 //RX_FDEQ_BIN_2 66 0x0304 //RX_FDEQ_BIN_3 -67 0x0604 //RX_FDEQ_BIN_4 -68 0x0406 //RX_FDEQ_BIN_5 +67 0x0503 //RX_FDEQ_BIN_4 +68 0x0107 //RX_FDEQ_BIN_5 69 0x0708 //RX_FDEQ_BIN_6 70 0x090A //RX_FDEQ_BIN_7 71 0x0B0C //RX_FDEQ_BIN_8 @@ -6740,18 +9557,18 @@ 121 0x199A //RX_TDDRC_HMNC_GAIN 122 0x0001 //RX_TDDRC_SMT_FLAG 123 0x0CCD //RX_TDDRC_SMT_W -124 0x0780 //RX_TDDRC_DRC_GAIN +124 0x032A //RX_TDDRC_DRC_GAIN 38 0x0014 //RX_FDEQ_SUBNUM -39 0x8080 //RX_FDEQ_GAIN_0 -40 0x8054 //RX_FDEQ_GAIN_1 -41 0x5050 //RX_FDEQ_GAIN_2 -42 0x5058 //RX_FDEQ_GAIN_3 -43 0x5C70 //RX_FDEQ_GAIN_4 -44 0x4848 //RX_FDEQ_GAIN_5 -45 0x484C //RX_FDEQ_GAIN_6 -46 0x4848 //RX_FDEQ_GAIN_7 -47 0x485A //RX_FDEQ_GAIN_8 -48 0x5A58 //RX_FDEQ_GAIN_9 +39 0x6059 //RX_FDEQ_GAIN_0 +40 0x4343 //RX_FDEQ_GAIN_1 +41 0x4343 //RX_FDEQ_GAIN_2 +42 0x454C //RX_FDEQ_GAIN_3 +43 0x4C4C //RX_FDEQ_GAIN_4 +44 0x584D //RX_FDEQ_GAIN_5 +45 0x4C4C //RX_FDEQ_GAIN_6 +46 0x4C3B //RX_FDEQ_GAIN_7 +47 0x3A3F //RX_FDEQ_GAIN_8 +48 0x4C53 //RX_FDEQ_GAIN_9 49 0x4848 //RX_FDEQ_GAIN_10 50 0x4848 //RX_FDEQ_GAIN_11 51 0x4848 //RX_FDEQ_GAIN_12 @@ -6770,8 +9587,8 @@ 64 0x0203 //RX_FDEQ_BIN_1 65 0x0303 //RX_FDEQ_BIN_2 66 0x0304 //RX_FDEQ_BIN_3 -67 0x0604 //RX_FDEQ_BIN_4 -68 0x0406 //RX_FDEQ_BIN_5 +67 0x0503 //RX_FDEQ_BIN_4 +68 0x0107 //RX_FDEQ_BIN_5 69 0x0708 //RX_FDEQ_BIN_6 70 0x090A //RX_FDEQ_BIN_7 71 0x0B0C //RX_FDEQ_BIN_8 @@ -6839,18 +9656,18 @@ 121 0x199A //RX_TDDRC_HMNC_GAIN 122 0x0001 //RX_TDDRC_SMT_FLAG 123 0x0CCD //RX_TDDRC_SMT_W -124 0x0780 //RX_TDDRC_DRC_GAIN +124 0x032A //RX_TDDRC_DRC_GAIN 38 0x0014 //RX_FDEQ_SUBNUM -39 0x8080 //RX_FDEQ_GAIN_0 -40 0x8054 //RX_FDEQ_GAIN_1 -41 0x5050 //RX_FDEQ_GAIN_2 -42 0x5058 //RX_FDEQ_GAIN_3 -43 0x5C70 //RX_FDEQ_GAIN_4 -44 0x4848 //RX_FDEQ_GAIN_5 -45 0x484C //RX_FDEQ_GAIN_6 -46 0x4848 //RX_FDEQ_GAIN_7 -47 0x485A //RX_FDEQ_GAIN_8 -48 0x5A58 //RX_FDEQ_GAIN_9 +39 0x6059 //RX_FDEQ_GAIN_0 +40 0x4343 //RX_FDEQ_GAIN_1 +41 0x4343 //RX_FDEQ_GAIN_2 +42 0x454C //RX_FDEQ_GAIN_3 +43 0x4C4C //RX_FDEQ_GAIN_4 +44 0x584D //RX_FDEQ_GAIN_5 +45 0x4C4C //RX_FDEQ_GAIN_6 +46 0x4C3B //RX_FDEQ_GAIN_7 +47 0x3A3F //RX_FDEQ_GAIN_8 +48 0x4C53 //RX_FDEQ_GAIN_9 49 0x4848 //RX_FDEQ_GAIN_10 50 0x4848 //RX_FDEQ_GAIN_11 51 0x4848 //RX_FDEQ_GAIN_12 @@ -6869,8 +9686,8 @@ 64 0x0203 //RX_FDEQ_BIN_1 65 0x0303 //RX_FDEQ_BIN_2 66 0x0304 //RX_FDEQ_BIN_3 -67 0x0604 //RX_FDEQ_BIN_4 -68 0x0406 //RX_FDEQ_BIN_5 +67 0x0503 //RX_FDEQ_BIN_4 +68 0x0107 //RX_FDEQ_BIN_5 69 0x0708 //RX_FDEQ_BIN_6 70 0x090A //RX_FDEQ_BIN_7 71 0x0B0C //RX_FDEQ_BIN_8 @@ -6938,18 +9755,18 @@ 121 0x199A //RX_TDDRC_HMNC_GAIN 122 0x0001 //RX_TDDRC_SMT_FLAG 123 0x0CCD //RX_TDDRC_SMT_W -124 0x0780 //RX_TDDRC_DRC_GAIN +124 0x032A //RX_TDDRC_DRC_GAIN 38 0x0014 //RX_FDEQ_SUBNUM -39 0x8080 //RX_FDEQ_GAIN_0 -40 0x8054 //RX_FDEQ_GAIN_1 -41 0x5050 //RX_FDEQ_GAIN_2 -42 0x5058 //RX_FDEQ_GAIN_3 -43 0x5C70 //RX_FDEQ_GAIN_4 -44 0x4848 //RX_FDEQ_GAIN_5 -45 0x484C //RX_FDEQ_GAIN_6 -46 0x4848 //RX_FDEQ_GAIN_7 -47 0x485A //RX_FDEQ_GAIN_8 -48 0x5A58 //RX_FDEQ_GAIN_9 +39 0x6059 //RX_FDEQ_GAIN_0 +40 0x4343 //RX_FDEQ_GAIN_1 +41 0x4343 //RX_FDEQ_GAIN_2 +42 0x454C //RX_FDEQ_GAIN_3 +43 0x4C4C //RX_FDEQ_GAIN_4 +44 0x584D //RX_FDEQ_GAIN_5 +45 0x4C4C //RX_FDEQ_GAIN_6 +46 0x4C3B //RX_FDEQ_GAIN_7 +47 0x3A3F //RX_FDEQ_GAIN_8 +48 0x4C53 //RX_FDEQ_GAIN_9 49 0x4848 //RX_FDEQ_GAIN_10 50 0x4848 //RX_FDEQ_GAIN_11 51 0x4848 //RX_FDEQ_GAIN_12 @@ -6968,8 +9785,8 @@ 64 0x0203 //RX_FDEQ_BIN_1 65 0x0303 //RX_FDEQ_BIN_2 66 0x0304 //RX_FDEQ_BIN_3 -67 0x0604 //RX_FDEQ_BIN_4 -68 0x0406 //RX_FDEQ_BIN_5 +67 0x0503 //RX_FDEQ_BIN_4 +68 0x0107 //RX_FDEQ_BIN_5 69 0x0708 //RX_FDEQ_BIN_6 70 0x090A //RX_FDEQ_BIN_7 71 0x0B0C //RX_FDEQ_BIN_8 @@ -7014,10 +9831,862 @@ 110 0x0000 //RX_FDDRC_RESRV_0 129 0x0100 //RX_SPK_VOL 130 0x0000 //RX_VOL_RESRV_0 +#RX 2 +157 0x027C //RX_RECVFUNC_MODE_0 +158 0x0000 //RX_RECVFUNC_MODE_1 +159 0x0000 //RX_SAMPLINGFREQ_SIG +160 0x0000 //RX_SAMPLINGFREQ_PROC +161 0x000A //RX_FRAME_SZ +162 0x0000 //RX_DELAY_OPT +163 0x1000 //RX_TDDRC_ALPHA_UP_1 +164 0x1000 //RX_TDDRC_ALPHA_UP_2 +165 0x1000 //RX_TDDRC_ALPHA_UP_3 +166 0x1000 //RX_TDDRC_ALPHA_UP_4 +167 0x0800 //RX_PGA +168 0x7652 //RX_A_HP +169 0x4000 //RX_B_PE +170 0x7800 //RX_THR_PITCH_DET_0 +171 0x7000 //RX_THR_PITCH_DET_1 +172 0x6000 //RX_THR_PITCH_DET_2 +173 0x0008 //RX_PITCH_BFR_LEN +174 0x0003 //RX_SBD_PITCH_DET +175 0x0100 //RX_PP_RESRV_0 +176 0x0020 //RX_PP_RESRV_1 +177 0x0400 //RX_N_SN_EST +178 0x000C //RX_N2_SN_EST +179 0x0010 //RX_NS_LVL_CTRL +180 0xF800 //RX_THR_SN_EST +181 0x7E00 //RX_LAMBDA_PFILT +182 0x000A //RX_FENS_RESRV_0 +183 0x0190 //RX_FENS_RESRV_1 +184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +185 0x4000 //RX_TDDRC_ALPHA_DWN_2 +186 0x4000 //RX_TDDRC_ALPHA_DWN_3 +187 0x0002 //RX_EXTRA_NS_L +188 0x0800 //RX_EXTRA_NS_A +189 0x4000 //RX_TDDRC_ALPHA_DWN_4 +190 0x7214 //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +192 0x199A //RX_A_POST_FLT +193 0x0000 //RX_LMT_THRD +194 0x4000 //RX_LMT_ALPHA +195 0x0014 //RX_FDEQ_SUBNUM +196 0x8080 //RX_FDEQ_GAIN_0 +197 0x8054 //RX_FDEQ_GAIN_1 +198 0x5050 //RX_FDEQ_GAIN_2 +199 0x5058 //RX_FDEQ_GAIN_3 +200 0x5C70 //RX_FDEQ_GAIN_4 +201 0x4848 //RX_FDEQ_GAIN_5 +202 0x484C //RX_FDEQ_GAIN_6 +203 0x4848 //RX_FDEQ_GAIN_7 +204 0x485A //RX_FDEQ_GAIN_8 +205 0x5A58 //RX_FDEQ_GAIN_9 +206 0x4848 //RX_FDEQ_GAIN_10 +207 0x4848 //RX_FDEQ_GAIN_11 +208 0x4848 //RX_FDEQ_GAIN_12 +209 0x4848 //RX_FDEQ_GAIN_13 +210 0x4848 //RX_FDEQ_GAIN_14 +211 0x4848 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0202 //RX_FDEQ_BIN_0 +221 0x0203 //RX_FDEQ_BIN_1 +222 0x0303 //RX_FDEQ_BIN_2 +223 0x0304 //RX_FDEQ_BIN_3 +224 0x0604 //RX_FDEQ_BIN_4 +225 0x0406 //RX_FDEQ_BIN_5 +226 0x0708 //RX_FDEQ_BIN_6 +227 0x090A //RX_FDEQ_BIN_7 +228 0x0B0C //RX_FDEQ_BIN_8 +229 0x0D08 //RX_FDEQ_BIN_9 +230 0x0000 //RX_FDEQ_BIN_10 +231 0x0000 //RX_FDEQ_BIN_11 +232 0x0000 //RX_FDEQ_BIN_12 +233 0x0000 //RX_FDEQ_BIN_13 +234 0x0000 //RX_FDEQ_BIN_14 +235 0x0000 //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x4000 //RX_FDEQ_RESRV_0 +245 0x0320 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0035 //RX_FDDRC_BAND_MARGIN_1 +248 0x0060 //RX_FDDRC_BAND_MARGIN_2 +249 0x0080 //RX_FDDRC_BAND_MARGIN_3 +250 0x0004 //RX_FDDRC_BLOCK_EXP +251 0x0600 //RX_FDDRC_THRD_2_0 +252 0x0600 //RX_FDDRC_THRD_2_1 +253 0x0600 //RX_FDDRC_THRD_2_2 +254 0x0600 //RX_FDDRC_THRD_2_3 +255 0x0800 //RX_FDDRC_THRD_3_0 +256 0x0800 //RX_FDDRC_THRD_3_1 +257 0x0800 //RX_FDDRC_THRD_3_2 +258 0x0800 //RX_FDDRC_THRD_3_3 +259 0x0000 //RX_FDDRC_SLANT_0_0 +260 0x0000 //RX_FDDRC_SLANT_0_1 +261 0x0000 //RX_FDDRC_SLANT_0_2 +262 0x0000 //RX_FDDRC_SLANT_0_3 +263 0x7FFF //RX_FDDRC_SLANT_1_0 +264 0x7FFF //RX_FDDRC_SLANT_1_1 +265 0x7FFF //RX_FDDRC_SLANT_1_2 +266 0x7FFF //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +268 0x0005 //RX_FILTINDX +269 0x0002 //RX_TDDRC_THRD_0 +270 0x0004 //RX_TDDRC_THRD_1 +271 0x1A00 //RX_TDDRC_THRD_2 +272 0x1A00 //RX_TDDRC_THRD_3 +273 0x7FFF //RX_TDDRC_SLANT_0 +274 0x7FFF //RX_TDDRC_SLANT_1 +275 0x1000 //RX_TDDRC_ALPHA_UP_0 +276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x199A //RX_TDDRC_HMNC_GAIN +279 0x0001 //RX_TDDRC_SMT_FLAG +280 0x0CCD //RX_TDDRC_SMT_W +281 0x0780 //RX_TDDRC_DRC_GAIN +282 0x7C00 //RX_LAMBDA_PKA_FP +283 0x2000 //RX_TPKA_FP +284 0x2000 //RX_MIN_G_FP +285 0x0080 //RX_MAX_G_FP +286 0x0100 //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 +288 0x0000 //RX_MAXLEVEL_CNG +289 0x3000 //RX_BWE_UV_TH +290 0x3000 //RX_BWE_UV_TH2 +291 0x1800 //RX_BWE_UV_TH3 +292 0x1000 //RX_BWE_V_TH +293 0x04CD //RX_BWE_GAIN1_V_TH1 +294 0x0F33 //RX_BWE_GAIN1_V_TH2 +295 0x7333 //RX_BWE_UV_EQ +296 0x199A //RX_BWE_V_EQ +297 0x7333 //RX_BWE_TONE_TH +298 0x0004 //RX_BWE_UV_HOLD_T +299 0x6CCD //RX_BWE_GAIN2_ALPHA +300 0x799A //RX_BWE_GAIN3_ALPHA +301 0x001E //RX_BWE_CUTOFF +302 0x3000 //RX_BWE_GAINFILL +303 0x3200 //RX_BWE_MAXTH_TONE +304 0x2000 //RX_BWE_EQ_0 +305 0x2000 //RX_BWE_EQ_1 +306 0x2000 //RX_BWE_EQ_2 +307 0x2000 //RX_BWE_EQ_3 +308 0x2000 //RX_BWE_EQ_4 +309 0x2000 //RX_BWE_EQ_5 +310 0x2000 //RX_BWE_EQ_6 +311 0x0000 //RX_BWE_RESRV_0 +312 0x0000 //RX_BWE_RESRV_1 +313 0x0000 //RX_BWE_RESRV_2 +#VOL 0 +163 0x1000 //RX_TDDRC_ALPHA_UP_1 +164 0x1000 //RX_TDDRC_ALPHA_UP_2 +165 0x1000 //RX_TDDRC_ALPHA_UP_3 +166 0x1000 //RX_TDDRC_ALPHA_UP_4 +184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +185 0x4000 //RX_TDDRC_ALPHA_DWN_2 +186 0x4000 //RX_TDDRC_ALPHA_DWN_3 +189 0x4000 //RX_TDDRC_ALPHA_DWN_4 +190 0x7214 //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +269 0x0002 //RX_TDDRC_THRD_0 +270 0x0004 //RX_TDDRC_THRD_1 +271 0x1A00 //RX_TDDRC_THRD_2 +272 0x1A00 //RX_TDDRC_THRD_3 +273 0x7FFF //RX_TDDRC_SLANT_0 +274 0x7FFF //RX_TDDRC_SLANT_1 +275 0x1000 //RX_TDDRC_ALPHA_UP_0 +276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x199A //RX_TDDRC_HMNC_GAIN +279 0x0001 //RX_TDDRC_SMT_FLAG +280 0x0CCD //RX_TDDRC_SMT_W +281 0x0780 //RX_TDDRC_DRC_GAIN +195 0x0014 //RX_FDEQ_SUBNUM +196 0x8080 //RX_FDEQ_GAIN_0 +197 0x8054 //RX_FDEQ_GAIN_1 +198 0x5050 //RX_FDEQ_GAIN_2 +199 0x5058 //RX_FDEQ_GAIN_3 +200 0x5C70 //RX_FDEQ_GAIN_4 +201 0x4848 //RX_FDEQ_GAIN_5 +202 0x484C //RX_FDEQ_GAIN_6 +203 0x4848 //RX_FDEQ_GAIN_7 +204 0x485A //RX_FDEQ_GAIN_8 +205 0x5A58 //RX_FDEQ_GAIN_9 +206 0x4848 //RX_FDEQ_GAIN_10 +207 0x4848 //RX_FDEQ_GAIN_11 +208 0x4848 //RX_FDEQ_GAIN_12 +209 0x4848 //RX_FDEQ_GAIN_13 +210 0x4848 //RX_FDEQ_GAIN_14 +211 0x4848 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0202 //RX_FDEQ_BIN_0 +221 0x0203 //RX_FDEQ_BIN_1 +222 0x0303 //RX_FDEQ_BIN_2 +223 0x0304 //RX_FDEQ_BIN_3 +224 0x0604 //RX_FDEQ_BIN_4 +225 0x0406 //RX_FDEQ_BIN_5 +226 0x0708 //RX_FDEQ_BIN_6 +227 0x090A //RX_FDEQ_BIN_7 +228 0x0B0C //RX_FDEQ_BIN_8 +229 0x0D08 //RX_FDEQ_BIN_9 +230 0x0000 //RX_FDEQ_BIN_10 +231 0x0000 //RX_FDEQ_BIN_11 +232 0x0000 //RX_FDEQ_BIN_12 +233 0x0000 //RX_FDEQ_BIN_13 +234 0x0000 //RX_FDEQ_BIN_14 +235 0x0000 //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x4000 //RX_FDEQ_RESRV_0 +245 0x0320 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0035 //RX_FDDRC_BAND_MARGIN_1 +248 0x0060 //RX_FDDRC_BAND_MARGIN_2 +249 0x0080 //RX_FDDRC_BAND_MARGIN_3 +250 0x0004 //RX_FDDRC_BLOCK_EXP +251 0x0600 //RX_FDDRC_THRD_2_0 +252 0x0600 //RX_FDDRC_THRD_2_1 +253 0x0600 //RX_FDDRC_THRD_2_2 +254 0x0600 //RX_FDDRC_THRD_2_3 +255 0x0800 //RX_FDDRC_THRD_3_0 +256 0x0800 //RX_FDDRC_THRD_3_1 +257 0x0800 //RX_FDDRC_THRD_3_2 +258 0x0800 //RX_FDDRC_THRD_3_3 +259 0x0000 //RX_FDDRC_SLANT_0_0 +260 0x0000 //RX_FDDRC_SLANT_0_1 +261 0x0000 //RX_FDDRC_SLANT_0_2 +262 0x0000 //RX_FDDRC_SLANT_0_3 +263 0x7FFF //RX_FDDRC_SLANT_1_0 +264 0x7FFF //RX_FDDRC_SLANT_1_1 +265 0x7FFF //RX_FDDRC_SLANT_1_2 +266 0x7FFF //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +286 0x0015 //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 +#VOL 1 +163 0x1000 //RX_TDDRC_ALPHA_UP_1 +164 0x1000 //RX_TDDRC_ALPHA_UP_2 +165 0x1000 //RX_TDDRC_ALPHA_UP_3 +166 0x1000 //RX_TDDRC_ALPHA_UP_4 +184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +185 0x4000 //RX_TDDRC_ALPHA_DWN_2 +186 0x4000 //RX_TDDRC_ALPHA_DWN_3 +189 0x4000 //RX_TDDRC_ALPHA_DWN_4 +190 0x7214 //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +269 0x0002 //RX_TDDRC_THRD_0 +270 0x0004 //RX_TDDRC_THRD_1 +271 0x1A00 //RX_TDDRC_THRD_2 +272 0x1A00 //RX_TDDRC_THRD_3 +273 0x7FFF //RX_TDDRC_SLANT_0 +274 0x7FFF //RX_TDDRC_SLANT_1 +275 0x1000 //RX_TDDRC_ALPHA_UP_0 +276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x199A //RX_TDDRC_HMNC_GAIN +279 0x0001 //RX_TDDRC_SMT_FLAG +280 0x0CCD //RX_TDDRC_SMT_W +281 0x0780 //RX_TDDRC_DRC_GAIN +195 0x0014 //RX_FDEQ_SUBNUM +196 0x8080 //RX_FDEQ_GAIN_0 +197 0x8054 //RX_FDEQ_GAIN_1 +198 0x5050 //RX_FDEQ_GAIN_2 +199 0x5058 //RX_FDEQ_GAIN_3 +200 0x5C70 //RX_FDEQ_GAIN_4 +201 0x4848 //RX_FDEQ_GAIN_5 +202 0x484C //RX_FDEQ_GAIN_6 +203 0x4848 //RX_FDEQ_GAIN_7 +204 0x485A //RX_FDEQ_GAIN_8 +205 0x5A58 //RX_FDEQ_GAIN_9 +206 0x4848 //RX_FDEQ_GAIN_10 +207 0x4848 //RX_FDEQ_GAIN_11 +208 0x4848 //RX_FDEQ_GAIN_12 +209 0x4848 //RX_FDEQ_GAIN_13 +210 0x4848 //RX_FDEQ_GAIN_14 +211 0x4848 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0202 //RX_FDEQ_BIN_0 +221 0x0203 //RX_FDEQ_BIN_1 +222 0x0303 //RX_FDEQ_BIN_2 +223 0x0304 //RX_FDEQ_BIN_3 +224 0x0604 //RX_FDEQ_BIN_4 +225 0x0406 //RX_FDEQ_BIN_5 +226 0x0708 //RX_FDEQ_BIN_6 +227 0x090A //RX_FDEQ_BIN_7 +228 0x0B0C //RX_FDEQ_BIN_8 +229 0x0D08 //RX_FDEQ_BIN_9 +230 0x0000 //RX_FDEQ_BIN_10 +231 0x0000 //RX_FDEQ_BIN_11 +232 0x0000 //RX_FDEQ_BIN_12 +233 0x0000 //RX_FDEQ_BIN_13 +234 0x0000 //RX_FDEQ_BIN_14 +235 0x0000 //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x4000 //RX_FDEQ_RESRV_0 +245 0x0320 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0035 //RX_FDDRC_BAND_MARGIN_1 +248 0x0060 //RX_FDDRC_BAND_MARGIN_2 +249 0x0080 //RX_FDDRC_BAND_MARGIN_3 +250 0x0004 //RX_FDDRC_BLOCK_EXP +251 0x0600 //RX_FDDRC_THRD_2_0 +252 0x0600 //RX_FDDRC_THRD_2_1 +253 0x0600 //RX_FDDRC_THRD_2_2 +254 0x0600 //RX_FDDRC_THRD_2_3 +255 0x0800 //RX_FDDRC_THRD_3_0 +256 0x0800 //RX_FDDRC_THRD_3_1 +257 0x0800 //RX_FDDRC_THRD_3_2 +258 0x0800 //RX_FDDRC_THRD_3_3 +259 0x0000 //RX_FDDRC_SLANT_0_0 +260 0x0000 //RX_FDDRC_SLANT_0_1 +261 0x0000 //RX_FDDRC_SLANT_0_2 +262 0x0000 //RX_FDDRC_SLANT_0_3 +263 0x7FFF //RX_FDDRC_SLANT_1_0 +264 0x7FFF //RX_FDDRC_SLANT_1_1 +265 0x7FFF //RX_FDDRC_SLANT_1_2 +266 0x7FFF //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +286 0x001E //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 +#VOL 2 +163 0x1000 //RX_TDDRC_ALPHA_UP_1 +164 0x1000 //RX_TDDRC_ALPHA_UP_2 +165 0x1000 //RX_TDDRC_ALPHA_UP_3 +166 0x1000 //RX_TDDRC_ALPHA_UP_4 +184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +185 0x4000 //RX_TDDRC_ALPHA_DWN_2 +186 0x4000 //RX_TDDRC_ALPHA_DWN_3 +189 0x4000 //RX_TDDRC_ALPHA_DWN_4 +190 0x7214 //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +269 0x0002 //RX_TDDRC_THRD_0 +270 0x0004 //RX_TDDRC_THRD_1 +271 0x1A00 //RX_TDDRC_THRD_2 +272 0x1A00 //RX_TDDRC_THRD_3 +273 0x7FFF //RX_TDDRC_SLANT_0 +274 0x7FFF //RX_TDDRC_SLANT_1 +275 0x1000 //RX_TDDRC_ALPHA_UP_0 +276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x199A //RX_TDDRC_HMNC_GAIN +279 0x0001 //RX_TDDRC_SMT_FLAG +280 0x0CCD //RX_TDDRC_SMT_W +281 0x0780 //RX_TDDRC_DRC_GAIN +195 0x0014 //RX_FDEQ_SUBNUM +196 0x8080 //RX_FDEQ_GAIN_0 +197 0x8054 //RX_FDEQ_GAIN_1 +198 0x5050 //RX_FDEQ_GAIN_2 +199 0x5058 //RX_FDEQ_GAIN_3 +200 0x5C70 //RX_FDEQ_GAIN_4 +201 0x4848 //RX_FDEQ_GAIN_5 +202 0x484C //RX_FDEQ_GAIN_6 +203 0x4848 //RX_FDEQ_GAIN_7 +204 0x485A //RX_FDEQ_GAIN_8 +205 0x5A58 //RX_FDEQ_GAIN_9 +206 0x4848 //RX_FDEQ_GAIN_10 +207 0x4848 //RX_FDEQ_GAIN_11 +208 0x4848 //RX_FDEQ_GAIN_12 +209 0x4848 //RX_FDEQ_GAIN_13 +210 0x4848 //RX_FDEQ_GAIN_14 +211 0x4848 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0202 //RX_FDEQ_BIN_0 +221 0x0203 //RX_FDEQ_BIN_1 +222 0x0303 //RX_FDEQ_BIN_2 +223 0x0304 //RX_FDEQ_BIN_3 +224 0x0604 //RX_FDEQ_BIN_4 +225 0x0406 //RX_FDEQ_BIN_5 +226 0x0708 //RX_FDEQ_BIN_6 +227 0x090A //RX_FDEQ_BIN_7 +228 0x0B0C //RX_FDEQ_BIN_8 +229 0x0D08 //RX_FDEQ_BIN_9 +230 0x0000 //RX_FDEQ_BIN_10 +231 0x0000 //RX_FDEQ_BIN_11 +232 0x0000 //RX_FDEQ_BIN_12 +233 0x0000 //RX_FDEQ_BIN_13 +234 0x0000 //RX_FDEQ_BIN_14 +235 0x0000 //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x4000 //RX_FDEQ_RESRV_0 +245 0x0320 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0035 //RX_FDDRC_BAND_MARGIN_1 +248 0x0060 //RX_FDDRC_BAND_MARGIN_2 +249 0x0080 //RX_FDDRC_BAND_MARGIN_3 +250 0x0004 //RX_FDDRC_BLOCK_EXP +251 0x0600 //RX_FDDRC_THRD_2_0 +252 0x0600 //RX_FDDRC_THRD_2_1 +253 0x0600 //RX_FDDRC_THRD_2_2 +254 0x0600 //RX_FDDRC_THRD_2_3 +255 0x0800 //RX_FDDRC_THRD_3_0 +256 0x0800 //RX_FDDRC_THRD_3_1 +257 0x0800 //RX_FDDRC_THRD_3_2 +258 0x0800 //RX_FDDRC_THRD_3_3 +259 0x0000 //RX_FDDRC_SLANT_0_0 +260 0x0000 //RX_FDDRC_SLANT_0_1 +261 0x0000 //RX_FDDRC_SLANT_0_2 +262 0x0000 //RX_FDDRC_SLANT_0_3 +263 0x7FFF //RX_FDDRC_SLANT_1_0 +264 0x7FFF //RX_FDDRC_SLANT_1_1 +265 0x7FFF //RX_FDDRC_SLANT_1_2 +266 0x7FFF //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +286 0x002A //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 +#VOL 3 +163 0x1000 //RX_TDDRC_ALPHA_UP_1 +164 0x1000 //RX_TDDRC_ALPHA_UP_2 +165 0x1000 //RX_TDDRC_ALPHA_UP_3 +166 0x1000 //RX_TDDRC_ALPHA_UP_4 +184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +185 0x4000 //RX_TDDRC_ALPHA_DWN_2 +186 0x4000 //RX_TDDRC_ALPHA_DWN_3 +189 0x4000 //RX_TDDRC_ALPHA_DWN_4 +190 0x7214 //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +269 0x0002 //RX_TDDRC_THRD_0 +270 0x0004 //RX_TDDRC_THRD_1 +271 0x1A00 //RX_TDDRC_THRD_2 +272 0x1A00 //RX_TDDRC_THRD_3 +273 0x7FFF //RX_TDDRC_SLANT_0 +274 0x7FFF //RX_TDDRC_SLANT_1 +275 0x1000 //RX_TDDRC_ALPHA_UP_0 +276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x199A //RX_TDDRC_HMNC_GAIN +279 0x0001 //RX_TDDRC_SMT_FLAG +280 0x0CCD //RX_TDDRC_SMT_W +281 0x0780 //RX_TDDRC_DRC_GAIN +195 0x0014 //RX_FDEQ_SUBNUM +196 0x8080 //RX_FDEQ_GAIN_0 +197 0x8054 //RX_FDEQ_GAIN_1 +198 0x5050 //RX_FDEQ_GAIN_2 +199 0x5058 //RX_FDEQ_GAIN_3 +200 0x5C70 //RX_FDEQ_GAIN_4 +201 0x4848 //RX_FDEQ_GAIN_5 +202 0x484C //RX_FDEQ_GAIN_6 +203 0x4848 //RX_FDEQ_GAIN_7 +204 0x485A //RX_FDEQ_GAIN_8 +205 0x5A58 //RX_FDEQ_GAIN_9 +206 0x4848 //RX_FDEQ_GAIN_10 +207 0x4848 //RX_FDEQ_GAIN_11 +208 0x4848 //RX_FDEQ_GAIN_12 +209 0x4848 //RX_FDEQ_GAIN_13 +210 0x4848 //RX_FDEQ_GAIN_14 +211 0x4848 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0202 //RX_FDEQ_BIN_0 +221 0x0203 //RX_FDEQ_BIN_1 +222 0x0303 //RX_FDEQ_BIN_2 +223 0x0304 //RX_FDEQ_BIN_3 +224 0x0604 //RX_FDEQ_BIN_4 +225 0x0406 //RX_FDEQ_BIN_5 +226 0x0708 //RX_FDEQ_BIN_6 +227 0x090A //RX_FDEQ_BIN_7 +228 0x0B0C //RX_FDEQ_BIN_8 +229 0x0D08 //RX_FDEQ_BIN_9 +230 0x0000 //RX_FDEQ_BIN_10 +231 0x0000 //RX_FDEQ_BIN_11 +232 0x0000 //RX_FDEQ_BIN_12 +233 0x0000 //RX_FDEQ_BIN_13 +234 0x0000 //RX_FDEQ_BIN_14 +235 0x0000 //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x4000 //RX_FDEQ_RESRV_0 +245 0x0320 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0035 //RX_FDDRC_BAND_MARGIN_1 +248 0x0060 //RX_FDDRC_BAND_MARGIN_2 +249 0x0080 //RX_FDDRC_BAND_MARGIN_3 +250 0x0004 //RX_FDDRC_BLOCK_EXP +251 0x0600 //RX_FDDRC_THRD_2_0 +252 0x0600 //RX_FDDRC_THRD_2_1 +253 0x0600 //RX_FDDRC_THRD_2_2 +254 0x0600 //RX_FDDRC_THRD_2_3 +255 0x0800 //RX_FDDRC_THRD_3_0 +256 0x0800 //RX_FDDRC_THRD_3_1 +257 0x0800 //RX_FDDRC_THRD_3_2 +258 0x0800 //RX_FDDRC_THRD_3_3 +259 0x0000 //RX_FDDRC_SLANT_0_0 +260 0x0000 //RX_FDDRC_SLANT_0_1 +261 0x0000 //RX_FDDRC_SLANT_0_2 +262 0x0000 //RX_FDDRC_SLANT_0_3 +263 0x7FFF //RX_FDDRC_SLANT_1_0 +264 0x7FFF //RX_FDDRC_SLANT_1_1 +265 0x7FFF //RX_FDDRC_SLANT_1_2 +266 0x7FFF //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +286 0x003C //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 +#VOL 4 +163 0x1000 //RX_TDDRC_ALPHA_UP_1 +164 0x1000 //RX_TDDRC_ALPHA_UP_2 +165 0x1000 //RX_TDDRC_ALPHA_UP_3 +166 0x1000 //RX_TDDRC_ALPHA_UP_4 +184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +185 0x4000 //RX_TDDRC_ALPHA_DWN_2 +186 0x4000 //RX_TDDRC_ALPHA_DWN_3 +189 0x4000 //RX_TDDRC_ALPHA_DWN_4 +190 0x7214 //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +269 0x0002 //RX_TDDRC_THRD_0 +270 0x0004 //RX_TDDRC_THRD_1 +271 0x1A00 //RX_TDDRC_THRD_2 +272 0x1A00 //RX_TDDRC_THRD_3 +273 0x7FFF //RX_TDDRC_SLANT_0 +274 0x7FFF //RX_TDDRC_SLANT_1 +275 0x1000 //RX_TDDRC_ALPHA_UP_0 +276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x199A //RX_TDDRC_HMNC_GAIN +279 0x0001 //RX_TDDRC_SMT_FLAG +280 0x0CCD //RX_TDDRC_SMT_W +281 0x0780 //RX_TDDRC_DRC_GAIN +195 0x0014 //RX_FDEQ_SUBNUM +196 0x8080 //RX_FDEQ_GAIN_0 +197 0x8054 //RX_FDEQ_GAIN_1 +198 0x5050 //RX_FDEQ_GAIN_2 +199 0x5058 //RX_FDEQ_GAIN_3 +200 0x5C70 //RX_FDEQ_GAIN_4 +201 0x4848 //RX_FDEQ_GAIN_5 +202 0x484C //RX_FDEQ_GAIN_6 +203 0x4848 //RX_FDEQ_GAIN_7 +204 0x485A //RX_FDEQ_GAIN_8 +205 0x5A58 //RX_FDEQ_GAIN_9 +206 0x4848 //RX_FDEQ_GAIN_10 +207 0x4848 //RX_FDEQ_GAIN_11 +208 0x4848 //RX_FDEQ_GAIN_12 +209 0x4848 //RX_FDEQ_GAIN_13 +210 0x4848 //RX_FDEQ_GAIN_14 +211 0x4848 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0202 //RX_FDEQ_BIN_0 +221 0x0203 //RX_FDEQ_BIN_1 +222 0x0303 //RX_FDEQ_BIN_2 +223 0x0304 //RX_FDEQ_BIN_3 +224 0x0604 //RX_FDEQ_BIN_4 +225 0x0406 //RX_FDEQ_BIN_5 +226 0x0708 //RX_FDEQ_BIN_6 +227 0x090A //RX_FDEQ_BIN_7 +228 0x0B0C //RX_FDEQ_BIN_8 +229 0x0D08 //RX_FDEQ_BIN_9 +230 0x0000 //RX_FDEQ_BIN_10 +231 0x0000 //RX_FDEQ_BIN_11 +232 0x0000 //RX_FDEQ_BIN_12 +233 0x0000 //RX_FDEQ_BIN_13 +234 0x0000 //RX_FDEQ_BIN_14 +235 0x0000 //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x4000 //RX_FDEQ_RESRV_0 +245 0x0320 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0035 //RX_FDDRC_BAND_MARGIN_1 +248 0x0060 //RX_FDDRC_BAND_MARGIN_2 +249 0x0080 //RX_FDDRC_BAND_MARGIN_3 +250 0x0004 //RX_FDDRC_BLOCK_EXP +251 0x0600 //RX_FDDRC_THRD_2_0 +252 0x0600 //RX_FDDRC_THRD_2_1 +253 0x0600 //RX_FDDRC_THRD_2_2 +254 0x0600 //RX_FDDRC_THRD_2_3 +255 0x0800 //RX_FDDRC_THRD_3_0 +256 0x0800 //RX_FDDRC_THRD_3_1 +257 0x0800 //RX_FDDRC_THRD_3_2 +258 0x0800 //RX_FDDRC_THRD_3_3 +259 0x0000 //RX_FDDRC_SLANT_0_0 +260 0x0000 //RX_FDDRC_SLANT_0_1 +261 0x0000 //RX_FDDRC_SLANT_0_2 +262 0x0000 //RX_FDDRC_SLANT_0_3 +263 0x7FFF //RX_FDDRC_SLANT_1_0 +264 0x7FFF //RX_FDDRC_SLANT_1_1 +265 0x7FFF //RX_FDDRC_SLANT_1_2 +266 0x7FFF //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +286 0x0058 //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 +#VOL 5 +163 0x1000 //RX_TDDRC_ALPHA_UP_1 +164 0x1000 //RX_TDDRC_ALPHA_UP_2 +165 0x1000 //RX_TDDRC_ALPHA_UP_3 +166 0x1000 //RX_TDDRC_ALPHA_UP_4 +184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +185 0x4000 //RX_TDDRC_ALPHA_DWN_2 +186 0x4000 //RX_TDDRC_ALPHA_DWN_3 +189 0x4000 //RX_TDDRC_ALPHA_DWN_4 +190 0x7214 //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +269 0x0002 //RX_TDDRC_THRD_0 +270 0x0004 //RX_TDDRC_THRD_1 +271 0x1A00 //RX_TDDRC_THRD_2 +272 0x1A00 //RX_TDDRC_THRD_3 +273 0x7FFF //RX_TDDRC_SLANT_0 +274 0x7FFF //RX_TDDRC_SLANT_1 +275 0x1000 //RX_TDDRC_ALPHA_UP_0 +276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x199A //RX_TDDRC_HMNC_GAIN +279 0x0001 //RX_TDDRC_SMT_FLAG +280 0x0CCD //RX_TDDRC_SMT_W +281 0x0780 //RX_TDDRC_DRC_GAIN +195 0x0014 //RX_FDEQ_SUBNUM +196 0x8080 //RX_FDEQ_GAIN_0 +197 0x8054 //RX_FDEQ_GAIN_1 +198 0x5050 //RX_FDEQ_GAIN_2 +199 0x5058 //RX_FDEQ_GAIN_3 +200 0x5C70 //RX_FDEQ_GAIN_4 +201 0x4848 //RX_FDEQ_GAIN_5 +202 0x484C //RX_FDEQ_GAIN_6 +203 0x4848 //RX_FDEQ_GAIN_7 +204 0x485A //RX_FDEQ_GAIN_8 +205 0x5A58 //RX_FDEQ_GAIN_9 +206 0x4848 //RX_FDEQ_GAIN_10 +207 0x4848 //RX_FDEQ_GAIN_11 +208 0x4848 //RX_FDEQ_GAIN_12 +209 0x4848 //RX_FDEQ_GAIN_13 +210 0x4848 //RX_FDEQ_GAIN_14 +211 0x4848 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0202 //RX_FDEQ_BIN_0 +221 0x0203 //RX_FDEQ_BIN_1 +222 0x0303 //RX_FDEQ_BIN_2 +223 0x0304 //RX_FDEQ_BIN_3 +224 0x0604 //RX_FDEQ_BIN_4 +225 0x0406 //RX_FDEQ_BIN_5 +226 0x0708 //RX_FDEQ_BIN_6 +227 0x090A //RX_FDEQ_BIN_7 +228 0x0B0C //RX_FDEQ_BIN_8 +229 0x0D08 //RX_FDEQ_BIN_9 +230 0x0000 //RX_FDEQ_BIN_10 +231 0x0000 //RX_FDEQ_BIN_11 +232 0x0000 //RX_FDEQ_BIN_12 +233 0x0000 //RX_FDEQ_BIN_13 +234 0x0000 //RX_FDEQ_BIN_14 +235 0x0000 //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x4000 //RX_FDEQ_RESRV_0 +245 0x0320 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0035 //RX_FDDRC_BAND_MARGIN_1 +248 0x0060 //RX_FDDRC_BAND_MARGIN_2 +249 0x0080 //RX_FDDRC_BAND_MARGIN_3 +250 0x0004 //RX_FDDRC_BLOCK_EXP +251 0x0600 //RX_FDDRC_THRD_2_0 +252 0x0600 //RX_FDDRC_THRD_2_1 +253 0x0600 //RX_FDDRC_THRD_2_2 +254 0x0600 //RX_FDDRC_THRD_2_3 +255 0x0800 //RX_FDDRC_THRD_3_0 +256 0x0800 //RX_FDDRC_THRD_3_1 +257 0x0800 //RX_FDDRC_THRD_3_2 +258 0x0800 //RX_FDDRC_THRD_3_3 +259 0x0000 //RX_FDDRC_SLANT_0_0 +260 0x0000 //RX_FDDRC_SLANT_0_1 +261 0x0000 //RX_FDDRC_SLANT_0_2 +262 0x0000 //RX_FDDRC_SLANT_0_3 +263 0x7FFF //RX_FDDRC_SLANT_1_0 +264 0x7FFF //RX_FDDRC_SLANT_1_1 +265 0x7FFF //RX_FDDRC_SLANT_1_2 +266 0x7FFF //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +286 0x0082 //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 +#VOL 6 +163 0x1000 //RX_TDDRC_ALPHA_UP_1 +164 0x1000 //RX_TDDRC_ALPHA_UP_2 +165 0x1000 //RX_TDDRC_ALPHA_UP_3 +166 0x1000 //RX_TDDRC_ALPHA_UP_4 +184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +185 0x4000 //RX_TDDRC_ALPHA_DWN_2 +186 0x4000 //RX_TDDRC_ALPHA_DWN_3 +189 0x4000 //RX_TDDRC_ALPHA_DWN_4 +190 0x7214 //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +269 0x0002 //RX_TDDRC_THRD_0 +270 0x0004 //RX_TDDRC_THRD_1 +271 0x1A00 //RX_TDDRC_THRD_2 +272 0x1A00 //RX_TDDRC_THRD_3 +273 0x7FFF //RX_TDDRC_SLANT_0 +274 0x7FFF //RX_TDDRC_SLANT_1 +275 0x1000 //RX_TDDRC_ALPHA_UP_0 +276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x199A //RX_TDDRC_HMNC_GAIN +279 0x0001 //RX_TDDRC_SMT_FLAG +280 0x0CCD //RX_TDDRC_SMT_W +281 0x0780 //RX_TDDRC_DRC_GAIN +195 0x0014 //RX_FDEQ_SUBNUM +196 0x8080 //RX_FDEQ_GAIN_0 +197 0x8054 //RX_FDEQ_GAIN_1 +198 0x5050 //RX_FDEQ_GAIN_2 +199 0x5058 //RX_FDEQ_GAIN_3 +200 0x5C70 //RX_FDEQ_GAIN_4 +201 0x4848 //RX_FDEQ_GAIN_5 +202 0x484C //RX_FDEQ_GAIN_6 +203 0x4848 //RX_FDEQ_GAIN_7 +204 0x485A //RX_FDEQ_GAIN_8 +205 0x5A58 //RX_FDEQ_GAIN_9 +206 0x4848 //RX_FDEQ_GAIN_10 +207 0x4848 //RX_FDEQ_GAIN_11 +208 0x4848 //RX_FDEQ_GAIN_12 +209 0x4848 //RX_FDEQ_GAIN_13 +210 0x4848 //RX_FDEQ_GAIN_14 +211 0x4848 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0202 //RX_FDEQ_BIN_0 +221 0x0203 //RX_FDEQ_BIN_1 +222 0x0303 //RX_FDEQ_BIN_2 +223 0x0304 //RX_FDEQ_BIN_3 +224 0x0604 //RX_FDEQ_BIN_4 +225 0x0406 //RX_FDEQ_BIN_5 +226 0x0708 //RX_FDEQ_BIN_6 +227 0x090A //RX_FDEQ_BIN_7 +228 0x0B0C //RX_FDEQ_BIN_8 +229 0x0D08 //RX_FDEQ_BIN_9 +230 0x0000 //RX_FDEQ_BIN_10 +231 0x0000 //RX_FDEQ_BIN_11 +232 0x0000 //RX_FDEQ_BIN_12 +233 0x0000 //RX_FDEQ_BIN_13 +234 0x0000 //RX_FDEQ_BIN_14 +235 0x0000 //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x4000 //RX_FDEQ_RESRV_0 +245 0x0320 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0035 //RX_FDDRC_BAND_MARGIN_1 +248 0x0060 //RX_FDDRC_BAND_MARGIN_2 +249 0x0080 //RX_FDDRC_BAND_MARGIN_3 +250 0x0004 //RX_FDDRC_BLOCK_EXP +251 0x0600 //RX_FDDRC_THRD_2_0 +252 0x0600 //RX_FDDRC_THRD_2_1 +253 0x0600 //RX_FDDRC_THRD_2_2 +254 0x0600 //RX_FDDRC_THRD_2_3 +255 0x0800 //RX_FDDRC_THRD_3_0 +256 0x0800 //RX_FDDRC_THRD_3_1 +257 0x0800 //RX_FDDRC_THRD_3_2 +258 0x0800 //RX_FDDRC_THRD_3_3 +259 0x0000 //RX_FDDRC_SLANT_0_0 +260 0x0000 //RX_FDDRC_SLANT_0_1 +261 0x0000 //RX_FDDRC_SLANT_0_2 +262 0x0000 //RX_FDDRC_SLANT_0_3 +263 0x7FFF //RX_FDDRC_SLANT_1_0 +264 0x7FFF //RX_FDDRC_SLANT_1_1 +265 0x7FFF //RX_FDDRC_SLANT_1_2 +266 0x7FFF //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +286 0x0100 //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 #CASE_NAME HANDSFREE-HANDSFREE-VOICE_GENERIC-WB -#PARAM_TYPE TX+RX -#TOTAL_CUSTOM_STEP 7 +#PARAM_MODE FULL +#PARAM_TYPE TX+2RX +#TOTAL_CUSTOM_STEP 7+7 #TX 0 0x0001 //TX_OPERATION_MODE_0 1 0x0001 //TX_OPERATION_MODE_1 @@ -7169,7 +10838,7 @@ 147 0x0300 //TX_AEC_REF_GAIN_0 148 0x0800 //TX_AEC_REF_GAIN_1 149 0x0800 //TX_AEC_REF_GAIN_2 -150 0x6800 //TX_EAD_THR +150 0x6C00 //TX_EAD_THR 151 0x1000 //TX_THR_RE_EST 152 0x0200 //TX_MIN_EQ_RE_EST_0 153 0x0100 //TX_MIN_EQ_RE_EST_1 @@ -7242,18 +10911,18 @@ 220 0x0000 //TX_DTD_MIC_BLK 221 0x023E //TX_ADPT_STRICT_L 222 0x023E //TX_ADPT_STRICT_H -223 0x0BB8 //TX_RATIO_DT_L_TH_LOW +223 0x03E8 //TX_RATIO_DT_L_TH_LOW 224 0x3A98 //TX_RATIO_DT_H_TH_LOW -225 0x1770 //TX_RATIO_DT_L_TH_HIGH +225 0x0578 //TX_RATIO_DT_L_TH_HIGH 226 0x4E20 //TX_RATIO_DT_H_TH_HIGH -227 0x09C4 //TX_RATIO_DT_L0_TH -228 0x2000 //TX_B_POST_FILT_ECHO_L +227 0x0001 //TX_RATIO_DT_L0_TH +228 0x7FFF //TX_B_POST_FILT_ECHO_L 229 0x7FFF //TX_B_POST_FILT_ECHO_H 230 0x0200 //TX_MIN_G_CTRL_ECHO 231 0x1000 //TX_B_LESSCUT_RTO_ECHO 232 0x0000 //TX_EPD_OFFSET_00 233 0x0000 //TX_EPD_OFFST_01 -234 0x1388 //TX_RATIO_DT_L0_TH_HIGH +234 0x03E8 //TX_RATIO_DT_L0_TH_HIGH 235 0x7FFF //TX_RATIO_DT_H_TH_CUT 236 0x7FFF //TX_MIN_EQ_RE_EST_13 237 0x0000 //TX_DTD_THR1_7 @@ -7270,11 +10939,11 @@ 248 0xF800 //TX_THR_SN_EST_6 249 0xF800 //TX_THR_SN_EST_7 250 0x0100 //TX_DELTA_THR_SN_EST_0 -251 0x0200 //TX_DELTA_THR_SN_EST_1 -252 0x0100 //TX_DELTA_THR_SN_EST_2 -253 0x0200 //TX_DELTA_THR_SN_EST_3 +251 0x0100 //TX_DELTA_THR_SN_EST_1 +252 0x0200 //TX_DELTA_THR_SN_EST_2 +253 0x0100 //TX_DELTA_THR_SN_EST_3 254 0x0100 //TX_DELTA_THR_SN_EST_4 -255 0x0100 //TX_DELTA_THR_SN_EST_5 +255 0x0200 //TX_DELTA_THR_SN_EST_5 256 0x0200 //TX_DELTA_THR_SN_EST_6 257 0x0200 //TX_DELTA_THR_SN_EST_7 258 0x4000 //TX_LAMBDA_NN_EST_0 @@ -7302,11 +10971,11 @@ 280 0x1000 //TX_B_POST_FLT_1 281 0x0010 //TX_NS_LVL_CTRL_0 282 0x0014 //TX_NS_LVL_CTRL_1 -283 0x0014 //TX_NS_LVL_CTRL_2 -284 0x0018 //TX_NS_LVL_CTRL_3 -285 0x0016 //TX_NS_LVL_CTRL_4 -286 0x0014 //TX_NS_LVL_CTRL_5 -287 0x0011 //TX_NS_LVL_CTRL_6 +283 0x0018 //TX_NS_LVL_CTRL_2 +284 0x0016 //TX_NS_LVL_CTRL_3 +285 0x0014 //TX_NS_LVL_CTRL_4 +286 0x0011 //TX_NS_LVL_CTRL_5 +287 0x0014 //TX_NS_LVL_CTRL_6 288 0x0011 //TX_NS_LVL_CTRL_7 289 0x000F //TX_MIN_GAIN_S_0 290 0x0010 //TX_MIN_GAIN_S_1 @@ -7324,8 +10993,8 @@ 302 0x4000 //TX_SNRI_SUP_2 303 0x4000 //TX_SNRI_SUP_3 304 0x4000 //TX_SNRI_SUP_4 -305 0x4000 //TX_SNRI_SUP_5 -306 0x50C0 //TX_SNRI_SUP_6 +305 0x50C0 //TX_SNRI_SUP_5 +306 0x4000 //TX_SNRI_SUP_6 307 0x7FFF //TX_SNRI_SUP_7 308 0x7FFF //TX_THR_LFNS 309 0x0018 //TX_G_LFNS @@ -7334,19 +11003,19 @@ 312 0x7FFF //TX_A_POST_FILT_0 313 0x2000 //TX_A_POST_FILT_1 314 0x5000 //TX_A_POST_FILT_S_0 -315 0x6000 //TX_A_POST_FILT_S_1 -316 0x4C00 //TX_A_POST_FILT_S_2 -317 0x4000 //TX_A_POST_FILT_S_3 -318 0x6000 //TX_A_POST_FILT_S_4 -319 0x4000 //TX_A_POST_FILT_S_5 -320 0x5000 //TX_A_POST_FILT_S_6 +315 0x4C00 //TX_A_POST_FILT_S_1 +316 0x4000 //TX_A_POST_FILT_S_2 +317 0x6000 //TX_A_POST_FILT_S_3 +318 0x4000 //TX_A_POST_FILT_S_4 +319 0x5000 //TX_A_POST_FILT_S_5 +320 0x6000 //TX_A_POST_FILT_S_6 321 0x7000 //TX_A_POST_FILT_S_7 322 0x2000 //TX_B_POST_FILT_0 -323 0x1000 //TX_B_POST_FILT_1 +323 0x2000 //TX_B_POST_FILT_1 324 0x2000 //TX_B_POST_FILT_2 -325 0x2000 //TX_B_POST_FILT_3 +325 0x4000 //TX_B_POST_FILT_3 326 0x4000 //TX_B_POST_FILT_4 -327 0x4000 //TX_B_POST_FILT_5 +327 0x1000 //TX_B_POST_FILT_5 328 0x1000 //TX_B_POST_FILT_6 329 0x2000 //TX_B_POST_FILT_7 330 0x4000 //TX_B_LESSCUT_RTO_S_0 @@ -7354,14 +11023,14 @@ 332 0x7FFF //TX_B_LESSCUT_RTO_S_2 333 0x7FFF //TX_B_LESSCUT_RTO_S_3 334 0x7FFF //TX_B_LESSCUT_RTO_S_4 -335 0x7FFF //TX_B_LESSCUT_RTO_S_5 -336 0x6000 //TX_B_LESSCUT_RTO_S_6 +335 0x6000 //TX_B_LESSCUT_RTO_S_5 +336 0x7FFF //TX_B_LESSCUT_RTO_S_6 337 0x7FFF //TX_B_LESSCUT_RTO_S_7 338 0x7C00 //TX_LAMBDA_PFILT 339 0x7C00 //TX_LAMBDA_PFILT_S_0 340 0x7C00 //TX_LAMBDA_PFILT_S_1 -341 0x7C00 //TX_LAMBDA_PFILT_S_2 -342 0x7A00 //TX_LAMBDA_PFILT_S_3 +341 0x7A00 //TX_LAMBDA_PFILT_S_2 +342 0x7C00 //TX_LAMBDA_PFILT_S_3 343 0x7C00 //TX_LAMBDA_PFILT_S_4 344 0x7C00 //TX_LAMBDA_PFILT_S_5 345 0x7C00 //TX_LAMBDA_PFILT_S_6 @@ -7399,10 +11068,10 @@ 377 0x7FFF //TX_NOISE_TH_5_4 378 0x0F0A //TX_NOISE_TH_6 379 0x0033 //TX_MINENOISE_TH -380 0x4000 //TX_MINENOISE_MIC0_TH_MTS -381 0xFFEE //TX_MINENOISE_MIC0_TH_EXP -382 0x6000 //TX_MINENOISE_MIC0_S_TH_MTS -383 0xFFF3 //TX_MINENOISE_MIC0_S_TH_EXP +380 0xD508 //TX_MORENS_TFMASK_TH +381 0x0001 //TX_DRC_QUIET_FLOOR +382 0x7999 //TX_RATIODTL_CUT_TH +383 0x0119 //TX_DT_CUT_K1 384 0x0666 //TX_OUT_ENER_S_TH_CLEAN 385 0x0666 //TX_OUT_ENER_S_TH_LESSCLEAN 386 0x0333 //TX_OUT_ENER_S_TH_NOISY @@ -7410,15 +11079,15 @@ 388 0x0333 //TX_OUT_ENER_TH_SPEECH 389 0x2000 //TX_SN_NPB_GAIN 390 0x0000 //TX_NN_NPB_GAIN -391 0x0000 //TX_CSX_ALPHA_0 -392 0x0000 //TX_CSX_ALPHA_1 -393 0x0000 //TX_CSX_ALPHA_2 -394 0x0000 //TX_CSX_ALPHA_3 -395 0x0800 //TX_MU_ARSP_EST -396 0x00C8 //TX_P_OUTBEAM_MIN_TH +391 0x7FFF //TX_POST_MASK_SUP_HSNE +392 0x7FFF //TX_TAIL_DET_TH +393 0x4000 //TX_B_LESSCUT_RTO_WTA +394 0x0000 //TX_MEL_G_R +395 0x0080 //TX_SUPHIGH_TH +396 0x0000 //TX_MASK_G_R 397 0x0002 //TX_EXTRA_NS_L -398 0x0800 //TX_EXTRA_NS_A -399 0x0005 //TX_VR_NOISE_FLOOR_TH +398 0x1800 //TX_C_POST_FLT_MASK +399 0x4000 //TX_A_POST_FLT_WNS 400 0x0148 //TX_MIN_G_LOW300HZ 401 0x0001 //TX_MAXLEVEL_CNG 402 0x00B4 //TX_STN_NOISE_TH @@ -7528,21 +11197,21 @@ 506 0x2000 //TX_RADIODTLV 507 0x0320 //TX_POWER_LINEIN_TH 508 0x0014 //TX_FE_VADCOUNT_TH_FC -509 0x0000 //TX_ECHO_SUPP_FC +509 0x000A //TX_ECHO_SUPP_FC 510 0x0C80 //TX_ECHO_TH 511 0x6666 //TX_MIC_TO_BFGAIN 512 0x0000 //TX_MICTOBFGAIN0 513 0x0000 //TX_FASTMUE_TH -514 0x0000 //TX_DERVB_LEN_0 -515 0x0000 //TX_DERVB_LEN_1 -516 0x0000 //TX_RHO_DERVB -517 0x0000 //TX_MIC_INDX_DERVB -518 0x0000 //TX_MU_DERVB -519 0x0000 //TX_DR_RESRV_0 -520 0x0000 //TX_DR_RESRV_1 -521 0x0000 //TX_DR_RESRV_2 -522 0x0000 //TX_DR_RESRV_3 -523 0x0000 //TX_DR_RESRV_4 +514 0x3000 //TX_DEREVERB_LF_MU +515 0x34CD //TX_DEREVERB_HF_MU +516 0x0007 //TX_DEREVERB_DELAY +517 0x0004 //TX_DEREVERB_COEF_LEN +518 0x0003 //TX_DEREVERB_DNR +519 0x0000 //TX_DEREVERB_ALPHA +520 0x0000 //TX_DEREVERB_BETA +521 0x3A98 //TX_GSC_RTOL_TH +522 0x3A98 //TX_GSC_RTOH_TH +523 0x7E2C //TX_WIDE2_MEANHTH 524 0x0000 //TX_DR_RESRV_5 525 0x0000 //TX_DR_RESRV_6 526 0x0000 //TX_DR_RESRV_7 @@ -7586,14 +11255,14 @@ 564 0x0000 //TX_PB_RESRV_0 565 0x0000 //TX_PB_RESRV_1 566 0x0020 //TX_FDEQ_SUBNUM -567 0x5050 //TX_FDEQ_GAIN_0 -568 0x544B //TX_FDEQ_GAIN_1 -569 0x4B4B //TX_FDEQ_GAIN_2 -570 0x4B48 //TX_FDEQ_GAIN_3 -571 0x4848 //TX_FDEQ_GAIN_4 -572 0x4850 //TX_FDEQ_GAIN_5 -573 0x5458 //TX_FDEQ_GAIN_6 -574 0x5A4C //TX_FDEQ_GAIN_7 +567 0x5048 //TX_FDEQ_GAIN_0 +568 0x4848 //TX_FDEQ_GAIN_1 +569 0x4A4F //TX_FDEQ_GAIN_2 +570 0x4E48 //TX_FDEQ_GAIN_3 +571 0x4444 //TX_FDEQ_GAIN_4 +572 0x444B //TX_FDEQ_GAIN_5 +573 0x4E50 //TX_FDEQ_GAIN_6 +574 0x544D //TX_FDEQ_GAIN_7 575 0x464C //TX_FDEQ_GAIN_8 576 0x4844 //TX_FDEQ_GAIN_9 577 0x393C //TX_FDEQ_GAIN_10 @@ -7692,13 +11361,13 @@ 670 0x4848 //TX_PREEQ_GAIN_MIC1_4 671 0x4848 //TX_PREEQ_GAIN_MIC1_5 672 0x4848 //TX_PREEQ_GAIN_MIC1_6 -673 0x4848 //TX_PREEQ_GAIN_MIC1_7 -674 0x4848 //TX_PREEQ_GAIN_MIC1_8 -675 0x4A4B //TX_PREEQ_GAIN_MIC1_9 -676 0x4B4A //TX_PREEQ_GAIN_MIC1_10 -677 0x4848 //TX_PREEQ_GAIN_MIC1_11 -678 0x494C //TX_PREEQ_GAIN_MIC1_12 -679 0x4C4C //TX_PREEQ_GAIN_MIC1_13 +673 0x484A //TX_PREEQ_GAIN_MIC1_7 +674 0x4A4B //TX_PREEQ_GAIN_MIC1_8 +675 0x4C4E //TX_PREEQ_GAIN_MIC1_9 +676 0x4E4F //TX_PREEQ_GAIN_MIC1_10 +677 0x5052 //TX_PREEQ_GAIN_MIC1_11 +678 0x5454 //TX_PREEQ_GAIN_MIC1_12 +679 0x5454 //TX_PREEQ_GAIN_MIC1_13 680 0x4848 //TX_PREEQ_GAIN_MIC1_14 681 0x4848 //TX_PREEQ_GAIN_MIC1_15 682 0x4848 //TX_PREEQ_GAIN_MIC1_16 @@ -7737,19 +11406,19 @@ 715 0x4848 //TX_PREEQ_GAIN_MIC2_0 716 0x4848 //TX_PREEQ_GAIN_MIC2_1 717 0x4848 //TX_PREEQ_GAIN_MIC2_2 -718 0x4848 //TX_PREEQ_GAIN_MIC2_3 -719 0x494A //TX_PREEQ_GAIN_MIC2_4 +718 0x484A //TX_PREEQ_GAIN_MIC2_3 +719 0x4B4A //TX_PREEQ_GAIN_MIC2_4 720 0x4B4C //TX_PREEQ_GAIN_MIC2_5 -721 0x4D4D //TX_PREEQ_GAIN_MIC2_6 -722 0x4E4F //TX_PREEQ_GAIN_MIC2_7 -723 0x4F50 //TX_PREEQ_GAIN_MIC2_8 +721 0x4C4D //TX_PREEQ_GAIN_MIC2_6 +722 0x4F50 //TX_PREEQ_GAIN_MIC2_7 +723 0x5050 //TX_PREEQ_GAIN_MIC2_8 724 0x5051 //TX_PREEQ_GAIN_MIC2_9 725 0x5252 //TX_PREEQ_GAIN_MIC2_10 726 0x5253 //TX_PREEQ_GAIN_MIC2_11 -727 0x5353 //TX_PREEQ_GAIN_MIC2_12 +727 0x5454 //TX_PREEQ_GAIN_MIC2_12 728 0x5454 //TX_PREEQ_GAIN_MIC2_13 729 0x5455 //TX_PREEQ_GAIN_MIC2_14 -730 0x5657 //TX_PREEQ_GAIN_MIC2_15 +730 0x5555 //TX_PREEQ_GAIN_MIC2_15 731 0x4848 //TX_PREEQ_GAIN_MIC2_16 732 0x4848 //TX_PREEQ_GAIN_MIC2_17 733 0x4848 //TX_PREEQ_GAIN_MIC2_18 @@ -7910,14 +11579,79 @@ 888 0x0028 //TX_FASTNS_ARSPC_TH 889 0xC000 //TX_FASTNS_MASK5_TH 890 0x4848 //TX_POSTSSA_MIN_G_VR_MASK -891 0x1000 //TX_A_LESSCUT_RTO_MASK +891 0x4000 //TX_A_LESSCUT_RTO_MASK 892 0x1770 //TX_FASTNS_NOISETH 893 0xC000 //TX_FASTNS_SSA_THLFL 894 0xC000 //TX_FASTNS_SSA_THHFL 895 0xCCCC //TX_FASTNS_SSA_THLFH 896 0xD999 //TX_FASTNS_SSA_THHFH +897 0x2339 //TX_SENDFUNC_REG_MICMUTE +898 0x0021 //TX_SENDFUNC_REG_MICMUTE1 +899 0x02BC //TX_MICMUTE_RATIO_THR +900 0x0140 //TX_MICMUTE_AMP_THR +901 0x0004 //TX_MICMUTE_HPF_IND +902 0x00C0 //TX_MICMUTE_LOG_EYR_TH +903 0x0008 //TX_MICMUTE_CVG_TIME +904 0x0008 //TX_MICMUTE_RELEASE_TIME +905 0x01FE //TX_MIC_VOLUME_MIC0MUTE +906 0x0020 //TX_MICMUTE_EPD_OFFSET_0 +907 0x001E //TX_MICMUTE_FRQ_AEC_L +908 0x7999 //TX_MICMUTE_EAD_THR +909 0x7FFF //TX_MICMUTE_LAMBDA_CB_NLE +910 0x7FFF //TX_MICMUTE_LAMBDA_RE_EST +911 0x4000 //TX_DTD_THR1_MICMUTE_0 +912 0x7000 //TX_DTD_THR1_MICMUTE_1 +913 0x7FFF //TX_DTD_THR1_MICMUTE_2 +914 0x7FFF //TX_DTD_THR1_MICMUTE_3 +915 0x6CCC //TX_DTD_THR2_MICMUTE_0 +916 0x0400 //TX_MICMUTE_MIN_EQ_RE_EST_0 +917 0x0400 //TX_MICMUTE_MIN_EQ_RE_EST_1 +918 0x1000 //TX_MICMUTE_MIN_EQ_RE_EST_2 +919 0x7FFF //TX_MICMUTE_MIN_EQ_RE_EST_3 +920 0x7FFF //TX_MICMUTE_MIN_EQ_RE_EST_4 +921 0x4000 //TX_MICMUTE_C_POST_FLT +922 0x03E8 //TX_MICMUTE_DT_CUT_K +923 0x0001 //TX_MICMUTE_DT_CUT_THR +924 0x03E8 //TX_MICMUTE_DT_CUT_K2 +925 0x0001 //TX_MICMUTE_DT_CUT_THR2 +926 0x0064 //TX_MICMUTE_DT2_HOLD_N +927 0x1000 //TX_MICMUTE_RATIODTH_THCUT +928 0x1000 //TX_MICMUTE_B_POST_FLT_ECHOL +929 0x7FFF //TX_MICMUTE_B_POST_FLT_ECHOH +930 0x0400 //TX_MICMUTE_C_POST_FLT_MASK +931 0x7999 //TX_MICMUTE_RATIODTL_CUT_TH +932 0x0258 //TX_MICMUTE_DT_CUT_K1 +933 0x0800 //TX_MICMUTE_N2_SN_EST +934 0xFC00 //TX_MICMUTE_THR_SN_EST_0 +935 0x001C //TX_MICMUTE_MIN_G_CTRL_0 +936 0x6000 //TX_MICMUTE_A_POST_FILT_S_0 +937 0x7000 //TX_MICMUTE_B_POST_FILT_0 +938 0x2710 //TX_MIC1RUB_AMP_THR +939 0x0010 //TX_MIC1MUTE_RATIO_THR +940 0x0450 //TX_MIC1MUTE_AMP_THR +941 0x0008 //TX_MIC1MUTE_CVG_TIME +942 0x0008 //TX_MIC1MUTE_RELEASE_TIME +943 0x0000 //TX_AMS_RESRV_01 +944 0x0000 //TX_AMS_RESRV_02 +945 0x0000 //TX_AMS_RESRV_03 +946 0x0000 //TX_AMS_RESRV_04 +947 0x0000 //TX_AMS_RESRV_05 +948 0x0000 //TX_AMS_RESRV_06 +949 0x0000 //TX_AMS_RESRV_07 +950 0x0000 //TX_AMS_RESRV_08 +951 0x0000 //TX_AMS_RESRV_09 +952 0x0000 //TX_AMS_RESRV_10 +953 0x0000 //TX_AMS_RESRV_11 +954 0x0000 //TX_AMS_RESRV_12 +955 0x0000 //TX_AMS_RESRV_13 +956 0x0000 //TX_AMS_RESRV_14 +957 0x0000 //TX_AMS_RESRV_15 +958 0x0000 //TX_AMS_RESRV_16 +959 0x0000 //TX_AMS_RESRV_17 +960 0x0000 //TX_AMS_RESRV_18 +961 0x0000 //TX_AMS_RESRV_19 #RX -0 0x027C //RX_RECVFUNC_MODE_0 +0 0x206C //RX_RECVFUNC_MODE_0 1 0x0000 //RX_RECVFUNC_MODE_1 2 0x0001 //RX_SAMPLINGFREQ_SIG 3 0x0001 //RX_SAMPLINGFREQ_PROC @@ -7956,20 +11690,20 @@ 36 0x0000 //RX_LMT_THRD 37 0x4000 //RX_LMT_ALPHA 38 0x001C //RX_FDEQ_SUBNUM -39 0x6868 //RX_FDEQ_GAIN_0 -40 0x6858 //RX_FDEQ_GAIN_1 -41 0x5858 //RX_FDEQ_GAIN_2 -42 0x5858 //RX_FDEQ_GAIN_3 -43 0x5C5C //RX_FDEQ_GAIN_4 -44 0x5C54 //RX_FDEQ_GAIN_5 -45 0x544C //RX_FDEQ_GAIN_6 -46 0x4A48 //RX_FDEQ_GAIN_7 -47 0x4860 //RX_FDEQ_GAIN_8 -48 0x6068 //RX_FDEQ_GAIN_9 -49 0x6C6C //RX_FDEQ_GAIN_10 -50 0x6C68 //RX_FDEQ_GAIN_11 -51 0x5A5A //RX_FDEQ_GAIN_12 -52 0x5A5C //RX_FDEQ_GAIN_13 +39 0x4848 //RX_FDEQ_GAIN_0 +40 0x4844 //RX_FDEQ_GAIN_1 +41 0x3E3B //RX_FDEQ_GAIN_2 +42 0x4143 //RX_FDEQ_GAIN_3 +43 0x4348 //RX_FDEQ_GAIN_4 +44 0x4848 //RX_FDEQ_GAIN_5 +45 0x4848 //RX_FDEQ_GAIN_6 +46 0x4848 //RX_FDEQ_GAIN_7 +47 0x4848 //RX_FDEQ_GAIN_8 +48 0x4848 //RX_FDEQ_GAIN_9 +49 0x4848 //RX_FDEQ_GAIN_10 +50 0x4E56 //RX_FDEQ_GAIN_11 +51 0x595C //RX_FDEQ_GAIN_12 +52 0x5959 //RX_FDEQ_GAIN_13 53 0x4848 //RX_FDEQ_GAIN_14 54 0x4848 //RX_FDEQ_GAIN_15 55 0x4848 //RX_FDEQ_GAIN_16 @@ -8041,12 +11775,12 @@ 121 0x199A //RX_TDDRC_HMNC_GAIN 122 0x0001 //RX_TDDRC_SMT_FLAG 123 0x0CCD //RX_TDDRC_SMT_W -124 0x0715 //RX_TDDRC_DRC_GAIN +124 0x0284 //RX_TDDRC_DRC_GAIN 125 0x7C00 //RX_LAMBDA_PKA_FP 126 0x2000 //RX_TPKA_FP 127 0x2000 //RX_MIN_G_FP 128 0x0080 //RX_MAX_G_FP -129 0x0011 //RX_SPK_VOL +129 0x0100 //RX_SPK_VOL 130 0x0000 //RX_VOL_RESRV_0 131 0x0000 //RX_MAXLEVEL_CNG 132 0x3000 //RX_BWE_UV_TH @@ -8097,22 +11831,22 @@ 121 0x199A //RX_TDDRC_HMNC_GAIN 122 0x0001 //RX_TDDRC_SMT_FLAG 123 0x0CCD //RX_TDDRC_SMT_W -124 0x0715 //RX_TDDRC_DRC_GAIN +124 0x02FD //RX_TDDRC_DRC_GAIN 38 0x001C //RX_FDEQ_SUBNUM -39 0x6868 //RX_FDEQ_GAIN_0 -40 0x6858 //RX_FDEQ_GAIN_1 -41 0x5858 //RX_FDEQ_GAIN_2 -42 0x5858 //RX_FDEQ_GAIN_3 -43 0x5C5C //RX_FDEQ_GAIN_4 -44 0x5C54 //RX_FDEQ_GAIN_5 -45 0x544C //RX_FDEQ_GAIN_6 -46 0x4A48 //RX_FDEQ_GAIN_7 -47 0x4860 //RX_FDEQ_GAIN_8 -48 0x6068 //RX_FDEQ_GAIN_9 -49 0x6C6C //RX_FDEQ_GAIN_10 -50 0x6C68 //RX_FDEQ_GAIN_11 -51 0x5A5A //RX_FDEQ_GAIN_12 -52 0x5A5C //RX_FDEQ_GAIN_13 +39 0x5B51 //RX_FDEQ_GAIN_0 +40 0x4844 //RX_FDEQ_GAIN_1 +41 0x3E3B //RX_FDEQ_GAIN_2 +42 0x4143 //RX_FDEQ_GAIN_3 +43 0x4348 //RX_FDEQ_GAIN_4 +44 0x4848 //RX_FDEQ_GAIN_5 +45 0x4856 //RX_FDEQ_GAIN_6 +46 0x5F59 //RX_FDEQ_GAIN_7 +47 0x5148 //RX_FDEQ_GAIN_8 +48 0x4C5A //RX_FDEQ_GAIN_9 +49 0x6055 //RX_FDEQ_GAIN_10 +50 0x4E4E //RX_FDEQ_GAIN_11 +51 0x4E4E //RX_FDEQ_GAIN_12 +52 0x5262 //RX_FDEQ_GAIN_13 53 0x4848 //RX_FDEQ_GAIN_14 54 0x4848 //RX_FDEQ_GAIN_15 55 0x4848 //RX_FDEQ_GAIN_16 @@ -8196,22 +11930,22 @@ 121 0x199A //RX_TDDRC_HMNC_GAIN 122 0x0001 //RX_TDDRC_SMT_FLAG 123 0x0CCD //RX_TDDRC_SMT_W -124 0x0715 //RX_TDDRC_DRC_GAIN +124 0x02FD //RX_TDDRC_DRC_GAIN 38 0x001C //RX_FDEQ_SUBNUM -39 0x6868 //RX_FDEQ_GAIN_0 -40 0x6858 //RX_FDEQ_GAIN_1 -41 0x5858 //RX_FDEQ_GAIN_2 -42 0x5858 //RX_FDEQ_GAIN_3 -43 0x5C5C //RX_FDEQ_GAIN_4 -44 0x5C54 //RX_FDEQ_GAIN_5 -45 0x544C //RX_FDEQ_GAIN_6 -46 0x4A48 //RX_FDEQ_GAIN_7 -47 0x4860 //RX_FDEQ_GAIN_8 -48 0x6068 //RX_FDEQ_GAIN_9 -49 0x6C6C //RX_FDEQ_GAIN_10 -50 0x6C68 //RX_FDEQ_GAIN_11 -51 0x5A5A //RX_FDEQ_GAIN_12 -52 0x5A5C //RX_FDEQ_GAIN_13 +39 0x5B51 //RX_FDEQ_GAIN_0 +40 0x4844 //RX_FDEQ_GAIN_1 +41 0x3E3B //RX_FDEQ_GAIN_2 +42 0x4143 //RX_FDEQ_GAIN_3 +43 0x4348 //RX_FDEQ_GAIN_4 +44 0x4848 //RX_FDEQ_GAIN_5 +45 0x4856 //RX_FDEQ_GAIN_6 +46 0x5F59 //RX_FDEQ_GAIN_7 +47 0x5148 //RX_FDEQ_GAIN_8 +48 0x4C5A //RX_FDEQ_GAIN_9 +49 0x6055 //RX_FDEQ_GAIN_10 +50 0x4E4E //RX_FDEQ_GAIN_11 +51 0x4E4E //RX_FDEQ_GAIN_12 +52 0x5262 //RX_FDEQ_GAIN_13 53 0x4848 //RX_FDEQ_GAIN_14 54 0x4848 //RX_FDEQ_GAIN_15 55 0x4848 //RX_FDEQ_GAIN_16 @@ -8295,22 +12029,22 @@ 121 0x199A //RX_TDDRC_HMNC_GAIN 122 0x0001 //RX_TDDRC_SMT_FLAG 123 0x0CCD //RX_TDDRC_SMT_W -124 0x0715 //RX_TDDRC_DRC_GAIN +124 0x02FD //RX_TDDRC_DRC_GAIN 38 0x001C //RX_FDEQ_SUBNUM -39 0x6868 //RX_FDEQ_GAIN_0 -40 0x6858 //RX_FDEQ_GAIN_1 -41 0x5858 //RX_FDEQ_GAIN_2 -42 0x5858 //RX_FDEQ_GAIN_3 -43 0x5C5C //RX_FDEQ_GAIN_4 -44 0x5C54 //RX_FDEQ_GAIN_5 -45 0x544C //RX_FDEQ_GAIN_6 -46 0x4A48 //RX_FDEQ_GAIN_7 -47 0x4860 //RX_FDEQ_GAIN_8 -48 0x6068 //RX_FDEQ_GAIN_9 -49 0x6C6C //RX_FDEQ_GAIN_10 -50 0x6C68 //RX_FDEQ_GAIN_11 -51 0x5A5A //RX_FDEQ_GAIN_12 -52 0x5A5C //RX_FDEQ_GAIN_13 +39 0x5B51 //RX_FDEQ_GAIN_0 +40 0x4844 //RX_FDEQ_GAIN_1 +41 0x3E3B //RX_FDEQ_GAIN_2 +42 0x4143 //RX_FDEQ_GAIN_3 +43 0x4348 //RX_FDEQ_GAIN_4 +44 0x4848 //RX_FDEQ_GAIN_5 +45 0x4856 //RX_FDEQ_GAIN_6 +46 0x5F59 //RX_FDEQ_GAIN_7 +47 0x5148 //RX_FDEQ_GAIN_8 +48 0x4C5A //RX_FDEQ_GAIN_9 +49 0x6055 //RX_FDEQ_GAIN_10 +50 0x4E4E //RX_FDEQ_GAIN_11 +51 0x4E4E //RX_FDEQ_GAIN_12 +52 0x5262 //RX_FDEQ_GAIN_13 53 0x4848 //RX_FDEQ_GAIN_14 54 0x4848 //RX_FDEQ_GAIN_15 55 0x4848 //RX_FDEQ_GAIN_16 @@ -8394,22 +12128,22 @@ 121 0x199A //RX_TDDRC_HMNC_GAIN 122 0x0001 //RX_TDDRC_SMT_FLAG 123 0x0CCD //RX_TDDRC_SMT_W -124 0x0715 //RX_TDDRC_DRC_GAIN +124 0x02FD //RX_TDDRC_DRC_GAIN 38 0x001C //RX_FDEQ_SUBNUM -39 0x6868 //RX_FDEQ_GAIN_0 -40 0x6858 //RX_FDEQ_GAIN_1 -41 0x5858 //RX_FDEQ_GAIN_2 -42 0x5858 //RX_FDEQ_GAIN_3 -43 0x5C5C //RX_FDEQ_GAIN_4 -44 0x5C54 //RX_FDEQ_GAIN_5 -45 0x544C //RX_FDEQ_GAIN_6 -46 0x4A48 //RX_FDEQ_GAIN_7 -47 0x4860 //RX_FDEQ_GAIN_8 -48 0x6068 //RX_FDEQ_GAIN_9 -49 0x6C6C //RX_FDEQ_GAIN_10 -50 0x6C68 //RX_FDEQ_GAIN_11 -51 0x5A5A //RX_FDEQ_GAIN_12 -52 0x5A5C //RX_FDEQ_GAIN_13 +39 0x5B51 //RX_FDEQ_GAIN_0 +40 0x4844 //RX_FDEQ_GAIN_1 +41 0x3E3B //RX_FDEQ_GAIN_2 +42 0x4143 //RX_FDEQ_GAIN_3 +43 0x4348 //RX_FDEQ_GAIN_4 +44 0x4848 //RX_FDEQ_GAIN_5 +45 0x4856 //RX_FDEQ_GAIN_6 +46 0x5F59 //RX_FDEQ_GAIN_7 +47 0x5148 //RX_FDEQ_GAIN_8 +48 0x4C5A //RX_FDEQ_GAIN_9 +49 0x6055 //RX_FDEQ_GAIN_10 +50 0x4E4E //RX_FDEQ_GAIN_11 +51 0x4E4E //RX_FDEQ_GAIN_12 +52 0x5262 //RX_FDEQ_GAIN_13 53 0x4848 //RX_FDEQ_GAIN_14 54 0x4848 //RX_FDEQ_GAIN_15 55 0x4848 //RX_FDEQ_GAIN_16 @@ -8493,22 +12227,22 @@ 121 0x199A //RX_TDDRC_HMNC_GAIN 122 0x0001 //RX_TDDRC_SMT_FLAG 123 0x0CCD //RX_TDDRC_SMT_W -124 0x0715 //RX_TDDRC_DRC_GAIN +124 0x02FD //RX_TDDRC_DRC_GAIN 38 0x001C //RX_FDEQ_SUBNUM -39 0x6868 //RX_FDEQ_GAIN_0 -40 0x6858 //RX_FDEQ_GAIN_1 -41 0x5858 //RX_FDEQ_GAIN_2 -42 0x5858 //RX_FDEQ_GAIN_3 -43 0x5C5C //RX_FDEQ_GAIN_4 -44 0x8854 //RX_FDEQ_GAIN_5 -45 0x5448 //RX_FDEQ_GAIN_6 -46 0x4848 //RX_FDEQ_GAIN_7 -47 0x4860 //RX_FDEQ_GAIN_8 -48 0x6068 //RX_FDEQ_GAIN_9 -49 0x7070 //RX_FDEQ_GAIN_10 -50 0x8070 //RX_FDEQ_GAIN_11 -51 0x6060 //RX_FDEQ_GAIN_12 -52 0x7070 //RX_FDEQ_GAIN_13 +39 0x5B51 //RX_FDEQ_GAIN_0 +40 0x4844 //RX_FDEQ_GAIN_1 +41 0x3E3B //RX_FDEQ_GAIN_2 +42 0x4143 //RX_FDEQ_GAIN_3 +43 0x4348 //RX_FDEQ_GAIN_4 +44 0x4848 //RX_FDEQ_GAIN_5 +45 0x4856 //RX_FDEQ_GAIN_6 +46 0x5F59 //RX_FDEQ_GAIN_7 +47 0x5148 //RX_FDEQ_GAIN_8 +48 0x4C5A //RX_FDEQ_GAIN_9 +49 0x6055 //RX_FDEQ_GAIN_10 +50 0x4E4E //RX_FDEQ_GAIN_11 +51 0x4E4E //RX_FDEQ_GAIN_12 +52 0x5262 //RX_FDEQ_GAIN_13 53 0x4848 //RX_FDEQ_GAIN_14 54 0x4848 //RX_FDEQ_GAIN_15 55 0x4848 //RX_FDEQ_GAIN_16 @@ -8592,22 +12326,22 @@ 121 0x199A //RX_TDDRC_HMNC_GAIN 122 0x0001 //RX_TDDRC_SMT_FLAG 123 0x0CCD //RX_TDDRC_SMT_W -124 0x0715 //RX_TDDRC_DRC_GAIN +124 0x02FD //RX_TDDRC_DRC_GAIN 38 0x001C //RX_FDEQ_SUBNUM -39 0x6868 //RX_FDEQ_GAIN_0 -40 0x6858 //RX_FDEQ_GAIN_1 -41 0x5858 //RX_FDEQ_GAIN_2 -42 0x5858 //RX_FDEQ_GAIN_3 -43 0x5C5C //RX_FDEQ_GAIN_4 -44 0x8854 //RX_FDEQ_GAIN_5 -45 0x5448 //RX_FDEQ_GAIN_6 -46 0x4848 //RX_FDEQ_GAIN_7 -47 0x4860 //RX_FDEQ_GAIN_8 -48 0x6068 //RX_FDEQ_GAIN_9 -49 0x7070 //RX_FDEQ_GAIN_10 -50 0x8070 //RX_FDEQ_GAIN_11 -51 0x6060 //RX_FDEQ_GAIN_12 -52 0x7070 //RX_FDEQ_GAIN_13 +39 0x5B51 //RX_FDEQ_GAIN_0 +40 0x4844 //RX_FDEQ_GAIN_1 +41 0x3E3B //RX_FDEQ_GAIN_2 +42 0x4143 //RX_FDEQ_GAIN_3 +43 0x4348 //RX_FDEQ_GAIN_4 +44 0x4848 //RX_FDEQ_GAIN_5 +45 0x4856 //RX_FDEQ_GAIN_6 +46 0x5F59 //RX_FDEQ_GAIN_7 +47 0x5148 //RX_FDEQ_GAIN_8 +48 0x4C5A //RX_FDEQ_GAIN_9 +49 0x6055 //RX_FDEQ_GAIN_10 +50 0x4E4E //RX_FDEQ_GAIN_11 +51 0x4E4E //RX_FDEQ_GAIN_12 +52 0x5262 //RX_FDEQ_GAIN_13 53 0x4848 //RX_FDEQ_GAIN_14 54 0x4848 //RX_FDEQ_GAIN_15 55 0x4848 //RX_FDEQ_GAIN_16 @@ -8691,22 +12425,22 @@ 121 0x199A //RX_TDDRC_HMNC_GAIN 122 0x0001 //RX_TDDRC_SMT_FLAG 123 0x0CCD //RX_TDDRC_SMT_W -124 0x0715 //RX_TDDRC_DRC_GAIN +124 0x02FD //RX_TDDRC_DRC_GAIN 38 0x001C //RX_FDEQ_SUBNUM -39 0x6868 //RX_FDEQ_GAIN_0 -40 0x6864 //RX_FDEQ_GAIN_1 -41 0x7070 //RX_FDEQ_GAIN_2 -42 0x6058 //RX_FDEQ_GAIN_3 -43 0x5C5C //RX_FDEQ_GAIN_4 -44 0x8854 //RX_FDEQ_GAIN_5 -45 0x5448 //RX_FDEQ_GAIN_6 -46 0x4848 //RX_FDEQ_GAIN_7 -47 0x4860 //RX_FDEQ_GAIN_8 -48 0x6068 //RX_FDEQ_GAIN_9 -49 0x7070 //RX_FDEQ_GAIN_10 -50 0x8070 //RX_FDEQ_GAIN_11 -51 0x6060 //RX_FDEQ_GAIN_12 -52 0x7070 //RX_FDEQ_GAIN_13 +39 0x5B51 //RX_FDEQ_GAIN_0 +40 0x4844 //RX_FDEQ_GAIN_1 +41 0x3E3B //RX_FDEQ_GAIN_2 +42 0x4143 //RX_FDEQ_GAIN_3 +43 0x4348 //RX_FDEQ_GAIN_4 +44 0x4848 //RX_FDEQ_GAIN_5 +45 0x4856 //RX_FDEQ_GAIN_6 +46 0x5F59 //RX_FDEQ_GAIN_7 +47 0x5148 //RX_FDEQ_GAIN_8 +48 0x4C5A //RX_FDEQ_GAIN_9 +49 0x6055 //RX_FDEQ_GAIN_10 +50 0x4E4E //RX_FDEQ_GAIN_11 +51 0x4E4E //RX_FDEQ_GAIN_12 +52 0x5262 //RX_FDEQ_GAIN_13 53 0x4848 //RX_FDEQ_GAIN_14 54 0x4848 //RX_FDEQ_GAIN_15 55 0x4848 //RX_FDEQ_GAIN_16 @@ -8767,14 +12501,866 @@ 110 0x0000 //RX_FDDRC_RESRV_0 129 0x0100 //RX_SPK_VOL 130 0x0000 //RX_VOL_RESRV_0 +#RX 2 +157 0x027C //RX_RECVFUNC_MODE_0 +158 0x0000 //RX_RECVFUNC_MODE_1 +159 0x0001 //RX_SAMPLINGFREQ_SIG +160 0x0001 //RX_SAMPLINGFREQ_PROC +161 0x000A //RX_FRAME_SZ +162 0x0000 //RX_DELAY_OPT +163 0x6000 //RX_TDDRC_ALPHA_UP_1 +164 0x6000 //RX_TDDRC_ALPHA_UP_2 +165 0x6000 //RX_TDDRC_ALPHA_UP_3 +166 0x1000 //RX_TDDRC_ALPHA_UP_4 +167 0x0800 //RX_PGA +168 0x7B02 //RX_A_HP +169 0x4000 //RX_B_PE +170 0x7800 //RX_THR_PITCH_DET_0 +171 0x7000 //RX_THR_PITCH_DET_1 +172 0x6000 //RX_THR_PITCH_DET_2 +173 0x0008 //RX_PITCH_BFR_LEN +174 0x0003 //RX_SBD_PITCH_DET +175 0x0100 //RX_PP_RESRV_0 +176 0x0020 //RX_PP_RESRV_1 +177 0x0400 //RX_N_SN_EST +178 0x000C //RX_N2_SN_EST +179 0x0010 //RX_NS_LVL_CTRL +180 0xF800 //RX_THR_SN_EST +181 0x7E00 //RX_LAMBDA_PFILT +182 0x000A //RX_FENS_RESRV_0 +183 0x0190 //RX_FENS_RESRV_1 +184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +187 0x0002 //RX_EXTRA_NS_L +188 0x0800 //RX_EXTRA_NS_A +189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +190 0x7214 //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +192 0x199A //RX_A_POST_FLT +193 0x0000 //RX_LMT_THRD +194 0x4000 //RX_LMT_ALPHA +195 0x001C //RX_FDEQ_SUBNUM +196 0x6868 //RX_FDEQ_GAIN_0 +197 0x6858 //RX_FDEQ_GAIN_1 +198 0x5858 //RX_FDEQ_GAIN_2 +199 0x5858 //RX_FDEQ_GAIN_3 +200 0x5C5C //RX_FDEQ_GAIN_4 +201 0x5C54 //RX_FDEQ_GAIN_5 +202 0x544C //RX_FDEQ_GAIN_6 +203 0x4A48 //RX_FDEQ_GAIN_7 +204 0x4860 //RX_FDEQ_GAIN_8 +205 0x6068 //RX_FDEQ_GAIN_9 +206 0x6C6C //RX_FDEQ_GAIN_10 +207 0x6C68 //RX_FDEQ_GAIN_11 +208 0x5A5A //RX_FDEQ_GAIN_12 +209 0x5A5C //RX_FDEQ_GAIN_13 +210 0x4848 //RX_FDEQ_GAIN_14 +211 0x4848 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0202 //RX_FDEQ_BIN_0 +221 0x0203 //RX_FDEQ_BIN_1 +222 0x0303 //RX_FDEQ_BIN_2 +223 0x0304 //RX_FDEQ_BIN_3 +224 0x0404 //RX_FDEQ_BIN_4 +225 0x0204 //RX_FDEQ_BIN_5 +226 0x0A0A //RX_FDEQ_BIN_6 +227 0x0A0A //RX_FDEQ_BIN_7 +228 0x0B0C //RX_FDEQ_BIN_8 +229 0x0D0E //RX_FDEQ_BIN_9 +230 0x0E0F //RX_FDEQ_BIN_10 +231 0x0F10 //RX_FDEQ_BIN_11 +232 0x1011 //RX_FDEQ_BIN_12 +233 0x1104 //RX_FDEQ_BIN_13 +234 0x0000 //RX_FDEQ_BIN_14 +235 0x0000 //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x4000 //RX_FDEQ_RESRV_0 +245 0x0320 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0035 //RX_FDDRC_BAND_MARGIN_1 +248 0x00D5 //RX_FDDRC_BAND_MARGIN_2 +249 0x0120 //RX_FDDRC_BAND_MARGIN_3 +250 0x0004 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x2000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x2000 //RX_FDDRC_THRD_3_2 +258 0x5000 //RX_FDDRC_THRD_3_3 +259 0x4000 //RX_FDDRC_SLANT_0_0 +260 0x4000 //RX_FDDRC_SLANT_0_1 +261 0x4000 //RX_FDDRC_SLANT_0_2 +262 0x4000 //RX_FDDRC_SLANT_0_3 +263 0x7FFF //RX_FDDRC_SLANT_1_0 +264 0x7FFF //RX_FDDRC_SLANT_1_1 +265 0x7FFF //RX_FDDRC_SLANT_1_2 +266 0x7FFF //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +268 0x0002 //RX_FILTINDX +269 0x0002 //RX_TDDRC_THRD_0 +270 0x0004 //RX_TDDRC_THRD_1 +271 0x1C00 //RX_TDDRC_THRD_2 +272 0x1C00 //RX_TDDRC_THRD_3 +273 0x7FFF //RX_TDDRC_SLANT_0 +274 0x7FFF //RX_TDDRC_SLANT_1 +275 0x6000 //RX_TDDRC_ALPHA_UP_0 +276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x199A //RX_TDDRC_HMNC_GAIN +279 0x0001 //RX_TDDRC_SMT_FLAG +280 0x0CCD //RX_TDDRC_SMT_W +281 0x0715 //RX_TDDRC_DRC_GAIN +282 0x7C00 //RX_LAMBDA_PKA_FP +283 0x2000 //RX_TPKA_FP +284 0x2000 //RX_MIN_G_FP +285 0x0080 //RX_MAX_G_FP +286 0x0011 //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 +288 0x0000 //RX_MAXLEVEL_CNG +289 0x3000 //RX_BWE_UV_TH +290 0x3000 //RX_BWE_UV_TH2 +291 0x1800 //RX_BWE_UV_TH3 +292 0x1000 //RX_BWE_V_TH +293 0x04CD //RX_BWE_GAIN1_V_TH1 +294 0x0F33 //RX_BWE_GAIN1_V_TH2 +295 0x7333 //RX_BWE_UV_EQ +296 0x199A //RX_BWE_V_EQ +297 0x7333 //RX_BWE_TONE_TH +298 0x0004 //RX_BWE_UV_HOLD_T +299 0x6CCD //RX_BWE_GAIN2_ALPHA +300 0x799A //RX_BWE_GAIN3_ALPHA +301 0x001E //RX_BWE_CUTOFF +302 0x3000 //RX_BWE_GAINFILL +303 0x3200 //RX_BWE_MAXTH_TONE +304 0x2000 //RX_BWE_EQ_0 +305 0x2000 //RX_BWE_EQ_1 +306 0x2000 //RX_BWE_EQ_2 +307 0x2000 //RX_BWE_EQ_3 +308 0x2000 //RX_BWE_EQ_4 +309 0x2000 //RX_BWE_EQ_5 +310 0x2000 //RX_BWE_EQ_6 +311 0x0000 //RX_BWE_RESRV_0 +312 0x0000 //RX_BWE_RESRV_1 +313 0x0000 //RX_BWE_RESRV_2 +#VOL 0 +163 0x6000 //RX_TDDRC_ALPHA_UP_1 +164 0x6000 //RX_TDDRC_ALPHA_UP_2 +165 0x6000 //RX_TDDRC_ALPHA_UP_3 +166 0x1000 //RX_TDDRC_ALPHA_UP_4 +184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +190 0x7214 //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +269 0x0002 //RX_TDDRC_THRD_0 +270 0x0004 //RX_TDDRC_THRD_1 +271 0x1C00 //RX_TDDRC_THRD_2 +272 0x1C00 //RX_TDDRC_THRD_3 +273 0x7FFF //RX_TDDRC_SLANT_0 +274 0x7FFF //RX_TDDRC_SLANT_1 +275 0x6000 //RX_TDDRC_ALPHA_UP_0 +276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x199A //RX_TDDRC_HMNC_GAIN +279 0x0001 //RX_TDDRC_SMT_FLAG +280 0x0CCD //RX_TDDRC_SMT_W +281 0x0715 //RX_TDDRC_DRC_GAIN +195 0x001C //RX_FDEQ_SUBNUM +196 0x6868 //RX_FDEQ_GAIN_0 +197 0x6858 //RX_FDEQ_GAIN_1 +198 0x5858 //RX_FDEQ_GAIN_2 +199 0x5858 //RX_FDEQ_GAIN_3 +200 0x5C5C //RX_FDEQ_GAIN_4 +201 0x5C54 //RX_FDEQ_GAIN_5 +202 0x544C //RX_FDEQ_GAIN_6 +203 0x4A48 //RX_FDEQ_GAIN_7 +204 0x4860 //RX_FDEQ_GAIN_8 +205 0x6068 //RX_FDEQ_GAIN_9 +206 0x6C6C //RX_FDEQ_GAIN_10 +207 0x6C68 //RX_FDEQ_GAIN_11 +208 0x5A5A //RX_FDEQ_GAIN_12 +209 0x5A5C //RX_FDEQ_GAIN_13 +210 0x4848 //RX_FDEQ_GAIN_14 +211 0x4848 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0202 //RX_FDEQ_BIN_0 +221 0x0203 //RX_FDEQ_BIN_1 +222 0x0303 //RX_FDEQ_BIN_2 +223 0x0304 //RX_FDEQ_BIN_3 +224 0x0404 //RX_FDEQ_BIN_4 +225 0x0204 //RX_FDEQ_BIN_5 +226 0x0A0A //RX_FDEQ_BIN_6 +227 0x0A0A //RX_FDEQ_BIN_7 +228 0x0B0C //RX_FDEQ_BIN_8 +229 0x0D0E //RX_FDEQ_BIN_9 +230 0x0E0F //RX_FDEQ_BIN_10 +231 0x0F10 //RX_FDEQ_BIN_11 +232 0x1011 //RX_FDEQ_BIN_12 +233 0x1104 //RX_FDEQ_BIN_13 +234 0x0000 //RX_FDEQ_BIN_14 +235 0x0000 //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x4000 //RX_FDEQ_RESRV_0 +245 0x0320 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0035 //RX_FDDRC_BAND_MARGIN_1 +248 0x00D5 //RX_FDDRC_BAND_MARGIN_2 +249 0x0120 //RX_FDDRC_BAND_MARGIN_3 +250 0x0004 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x2000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x2000 //RX_FDDRC_THRD_3_2 +258 0x5000 //RX_FDDRC_THRD_3_3 +259 0x4000 //RX_FDDRC_SLANT_0_0 +260 0x4000 //RX_FDDRC_SLANT_0_1 +261 0x4000 //RX_FDDRC_SLANT_0_2 +262 0x4000 //RX_FDDRC_SLANT_0_3 +263 0x7FFF //RX_FDDRC_SLANT_1_0 +264 0x7FFF //RX_FDDRC_SLANT_1_1 +265 0x7FFF //RX_FDDRC_SLANT_1_2 +266 0x7FFF //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +286 0x0011 //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 +#VOL 1 +163 0x6000 //RX_TDDRC_ALPHA_UP_1 +164 0x6000 //RX_TDDRC_ALPHA_UP_2 +165 0x6000 //RX_TDDRC_ALPHA_UP_3 +166 0x1000 //RX_TDDRC_ALPHA_UP_4 +184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +190 0x7214 //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +269 0x0002 //RX_TDDRC_THRD_0 +270 0x0004 //RX_TDDRC_THRD_1 +271 0x1C00 //RX_TDDRC_THRD_2 +272 0x1C00 //RX_TDDRC_THRD_3 +273 0x7FFF //RX_TDDRC_SLANT_0 +274 0x7FFF //RX_TDDRC_SLANT_1 +275 0x6000 //RX_TDDRC_ALPHA_UP_0 +276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x199A //RX_TDDRC_HMNC_GAIN +279 0x0001 //RX_TDDRC_SMT_FLAG +280 0x0CCD //RX_TDDRC_SMT_W +281 0x0715 //RX_TDDRC_DRC_GAIN +195 0x001C //RX_FDEQ_SUBNUM +196 0x6868 //RX_FDEQ_GAIN_0 +197 0x6858 //RX_FDEQ_GAIN_1 +198 0x5858 //RX_FDEQ_GAIN_2 +199 0x5858 //RX_FDEQ_GAIN_3 +200 0x5C5C //RX_FDEQ_GAIN_4 +201 0x5C54 //RX_FDEQ_GAIN_5 +202 0x544C //RX_FDEQ_GAIN_6 +203 0x4A48 //RX_FDEQ_GAIN_7 +204 0x4860 //RX_FDEQ_GAIN_8 +205 0x6068 //RX_FDEQ_GAIN_9 +206 0x6C6C //RX_FDEQ_GAIN_10 +207 0x6C68 //RX_FDEQ_GAIN_11 +208 0x5A5A //RX_FDEQ_GAIN_12 +209 0x5A5C //RX_FDEQ_GAIN_13 +210 0x4848 //RX_FDEQ_GAIN_14 +211 0x4848 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0202 //RX_FDEQ_BIN_0 +221 0x0203 //RX_FDEQ_BIN_1 +222 0x0303 //RX_FDEQ_BIN_2 +223 0x0304 //RX_FDEQ_BIN_3 +224 0x0404 //RX_FDEQ_BIN_4 +225 0x0204 //RX_FDEQ_BIN_5 +226 0x0A0A //RX_FDEQ_BIN_6 +227 0x0A0A //RX_FDEQ_BIN_7 +228 0x0B0C //RX_FDEQ_BIN_8 +229 0x0D0E //RX_FDEQ_BIN_9 +230 0x0E0F //RX_FDEQ_BIN_10 +231 0x0F10 //RX_FDEQ_BIN_11 +232 0x1011 //RX_FDEQ_BIN_12 +233 0x1104 //RX_FDEQ_BIN_13 +234 0x0000 //RX_FDEQ_BIN_14 +235 0x0000 //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x4000 //RX_FDEQ_RESRV_0 +245 0x0320 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0035 //RX_FDDRC_BAND_MARGIN_1 +248 0x00D5 //RX_FDDRC_BAND_MARGIN_2 +249 0x0120 //RX_FDDRC_BAND_MARGIN_3 +250 0x0004 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x2000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x2000 //RX_FDDRC_THRD_3_2 +258 0x5000 //RX_FDDRC_THRD_3_3 +259 0x4000 //RX_FDDRC_SLANT_0_0 +260 0x4000 //RX_FDDRC_SLANT_0_1 +261 0x4000 //RX_FDDRC_SLANT_0_2 +262 0x4000 //RX_FDDRC_SLANT_0_3 +263 0x7FFF //RX_FDDRC_SLANT_1_0 +264 0x7FFF //RX_FDDRC_SLANT_1_1 +265 0x7FFF //RX_FDDRC_SLANT_1_2 +266 0x7FFF //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +286 0x0019 //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 +#VOL 2 +163 0x6000 //RX_TDDRC_ALPHA_UP_1 +164 0x6000 //RX_TDDRC_ALPHA_UP_2 +165 0x6000 //RX_TDDRC_ALPHA_UP_3 +166 0x1000 //RX_TDDRC_ALPHA_UP_4 +184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +190 0x7214 //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +269 0x0002 //RX_TDDRC_THRD_0 +270 0x0004 //RX_TDDRC_THRD_1 +271 0x1C00 //RX_TDDRC_THRD_2 +272 0x1C00 //RX_TDDRC_THRD_3 +273 0x7FFF //RX_TDDRC_SLANT_0 +274 0x7FFF //RX_TDDRC_SLANT_1 +275 0x6000 //RX_TDDRC_ALPHA_UP_0 +276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x199A //RX_TDDRC_HMNC_GAIN +279 0x0001 //RX_TDDRC_SMT_FLAG +280 0x0CCD //RX_TDDRC_SMT_W +281 0x0715 //RX_TDDRC_DRC_GAIN +195 0x001C //RX_FDEQ_SUBNUM +196 0x6868 //RX_FDEQ_GAIN_0 +197 0x6858 //RX_FDEQ_GAIN_1 +198 0x5858 //RX_FDEQ_GAIN_2 +199 0x5858 //RX_FDEQ_GAIN_3 +200 0x5C5C //RX_FDEQ_GAIN_4 +201 0x5C54 //RX_FDEQ_GAIN_5 +202 0x544C //RX_FDEQ_GAIN_6 +203 0x4A48 //RX_FDEQ_GAIN_7 +204 0x4860 //RX_FDEQ_GAIN_8 +205 0x6068 //RX_FDEQ_GAIN_9 +206 0x6C6C //RX_FDEQ_GAIN_10 +207 0x6C68 //RX_FDEQ_GAIN_11 +208 0x5A5A //RX_FDEQ_GAIN_12 +209 0x5A5C //RX_FDEQ_GAIN_13 +210 0x4848 //RX_FDEQ_GAIN_14 +211 0x4848 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0202 //RX_FDEQ_BIN_0 +221 0x0203 //RX_FDEQ_BIN_1 +222 0x0303 //RX_FDEQ_BIN_2 +223 0x0304 //RX_FDEQ_BIN_3 +224 0x0404 //RX_FDEQ_BIN_4 +225 0x0204 //RX_FDEQ_BIN_5 +226 0x0A0A //RX_FDEQ_BIN_6 +227 0x0A0A //RX_FDEQ_BIN_7 +228 0x0B0C //RX_FDEQ_BIN_8 +229 0x0D0E //RX_FDEQ_BIN_9 +230 0x0E0F //RX_FDEQ_BIN_10 +231 0x0F10 //RX_FDEQ_BIN_11 +232 0x1011 //RX_FDEQ_BIN_12 +233 0x1104 //RX_FDEQ_BIN_13 +234 0x0000 //RX_FDEQ_BIN_14 +235 0x0000 //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x4000 //RX_FDEQ_RESRV_0 +245 0x0320 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0035 //RX_FDDRC_BAND_MARGIN_1 +248 0x00D5 //RX_FDDRC_BAND_MARGIN_2 +249 0x0120 //RX_FDDRC_BAND_MARGIN_3 +250 0x0004 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x2000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x2000 //RX_FDDRC_THRD_3_2 +258 0x5000 //RX_FDDRC_THRD_3_3 +259 0x4000 //RX_FDDRC_SLANT_0_0 +260 0x4000 //RX_FDDRC_SLANT_0_1 +261 0x4000 //RX_FDDRC_SLANT_0_2 +262 0x4000 //RX_FDDRC_SLANT_0_3 +263 0x7FFF //RX_FDDRC_SLANT_1_0 +264 0x7FFF //RX_FDDRC_SLANT_1_1 +265 0x7FFF //RX_FDDRC_SLANT_1_2 +266 0x7FFF //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +286 0x0024 //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 +#VOL 3 +163 0x6000 //RX_TDDRC_ALPHA_UP_1 +164 0x6000 //RX_TDDRC_ALPHA_UP_2 +165 0x6000 //RX_TDDRC_ALPHA_UP_3 +166 0x1000 //RX_TDDRC_ALPHA_UP_4 +184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +190 0x7214 //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +269 0x0002 //RX_TDDRC_THRD_0 +270 0x0004 //RX_TDDRC_THRD_1 +271 0x1C00 //RX_TDDRC_THRD_2 +272 0x1C00 //RX_TDDRC_THRD_3 +273 0x7FFF //RX_TDDRC_SLANT_0 +274 0x7FFF //RX_TDDRC_SLANT_1 +275 0x6000 //RX_TDDRC_ALPHA_UP_0 +276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x199A //RX_TDDRC_HMNC_GAIN +279 0x0001 //RX_TDDRC_SMT_FLAG +280 0x0CCD //RX_TDDRC_SMT_W +281 0x0715 //RX_TDDRC_DRC_GAIN +195 0x001C //RX_FDEQ_SUBNUM +196 0x6868 //RX_FDEQ_GAIN_0 +197 0x6858 //RX_FDEQ_GAIN_1 +198 0x5858 //RX_FDEQ_GAIN_2 +199 0x5858 //RX_FDEQ_GAIN_3 +200 0x5C5C //RX_FDEQ_GAIN_4 +201 0x5C54 //RX_FDEQ_GAIN_5 +202 0x544C //RX_FDEQ_GAIN_6 +203 0x4A48 //RX_FDEQ_GAIN_7 +204 0x4860 //RX_FDEQ_GAIN_8 +205 0x6068 //RX_FDEQ_GAIN_9 +206 0x6C6C //RX_FDEQ_GAIN_10 +207 0x6C68 //RX_FDEQ_GAIN_11 +208 0x5A5A //RX_FDEQ_GAIN_12 +209 0x5A5C //RX_FDEQ_GAIN_13 +210 0x4848 //RX_FDEQ_GAIN_14 +211 0x4848 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0202 //RX_FDEQ_BIN_0 +221 0x0203 //RX_FDEQ_BIN_1 +222 0x0303 //RX_FDEQ_BIN_2 +223 0x0304 //RX_FDEQ_BIN_3 +224 0x0404 //RX_FDEQ_BIN_4 +225 0x0204 //RX_FDEQ_BIN_5 +226 0x0A0A //RX_FDEQ_BIN_6 +227 0x0A0A //RX_FDEQ_BIN_7 +228 0x0B0C //RX_FDEQ_BIN_8 +229 0x0D0E //RX_FDEQ_BIN_9 +230 0x0E0F //RX_FDEQ_BIN_10 +231 0x0F10 //RX_FDEQ_BIN_11 +232 0x1011 //RX_FDEQ_BIN_12 +233 0x1104 //RX_FDEQ_BIN_13 +234 0x0000 //RX_FDEQ_BIN_14 +235 0x0000 //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x4000 //RX_FDEQ_RESRV_0 +245 0x0320 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0035 //RX_FDDRC_BAND_MARGIN_1 +248 0x00D5 //RX_FDDRC_BAND_MARGIN_2 +249 0x0120 //RX_FDDRC_BAND_MARGIN_3 +250 0x0004 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x2000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x2000 //RX_FDDRC_THRD_3_2 +258 0x5000 //RX_FDDRC_THRD_3_3 +259 0x4000 //RX_FDDRC_SLANT_0_0 +260 0x4000 //RX_FDDRC_SLANT_0_1 +261 0x4000 //RX_FDDRC_SLANT_0_2 +262 0x4000 //RX_FDDRC_SLANT_0_3 +263 0x7FFF //RX_FDDRC_SLANT_1_0 +264 0x7FFF //RX_FDDRC_SLANT_1_1 +265 0x7FFF //RX_FDDRC_SLANT_1_2 +266 0x7FFF //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +286 0x0033 //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 +#VOL 4 +163 0x6000 //RX_TDDRC_ALPHA_UP_1 +164 0x6000 //RX_TDDRC_ALPHA_UP_2 +165 0x6000 //RX_TDDRC_ALPHA_UP_3 +166 0x1000 //RX_TDDRC_ALPHA_UP_4 +184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +190 0x7214 //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +269 0x0002 //RX_TDDRC_THRD_0 +270 0x0004 //RX_TDDRC_THRD_1 +271 0x1C00 //RX_TDDRC_THRD_2 +272 0x1C00 //RX_TDDRC_THRD_3 +273 0x7FFF //RX_TDDRC_SLANT_0 +274 0x7FFF //RX_TDDRC_SLANT_1 +275 0x6000 //RX_TDDRC_ALPHA_UP_0 +276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x199A //RX_TDDRC_HMNC_GAIN +279 0x0001 //RX_TDDRC_SMT_FLAG +280 0x0CCD //RX_TDDRC_SMT_W +281 0x0715 //RX_TDDRC_DRC_GAIN +195 0x001C //RX_FDEQ_SUBNUM +196 0x6868 //RX_FDEQ_GAIN_0 +197 0x6858 //RX_FDEQ_GAIN_1 +198 0x5858 //RX_FDEQ_GAIN_2 +199 0x5858 //RX_FDEQ_GAIN_3 +200 0x5C5C //RX_FDEQ_GAIN_4 +201 0x8854 //RX_FDEQ_GAIN_5 +202 0x5448 //RX_FDEQ_GAIN_6 +203 0x4848 //RX_FDEQ_GAIN_7 +204 0x4860 //RX_FDEQ_GAIN_8 +205 0x6068 //RX_FDEQ_GAIN_9 +206 0x7070 //RX_FDEQ_GAIN_10 +207 0x8070 //RX_FDEQ_GAIN_11 +208 0x6060 //RX_FDEQ_GAIN_12 +209 0x7070 //RX_FDEQ_GAIN_13 +210 0x4848 //RX_FDEQ_GAIN_14 +211 0x4848 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0202 //RX_FDEQ_BIN_0 +221 0x0203 //RX_FDEQ_BIN_1 +222 0x0303 //RX_FDEQ_BIN_2 +223 0x0304 //RX_FDEQ_BIN_3 +224 0x0404 //RX_FDEQ_BIN_4 +225 0x0204 //RX_FDEQ_BIN_5 +226 0x0A0A //RX_FDEQ_BIN_6 +227 0x0A0A //RX_FDEQ_BIN_7 +228 0x0B0C //RX_FDEQ_BIN_8 +229 0x0D0E //RX_FDEQ_BIN_9 +230 0x0E0F //RX_FDEQ_BIN_10 +231 0x0F10 //RX_FDEQ_BIN_11 +232 0x1011 //RX_FDEQ_BIN_12 +233 0x1104 //RX_FDEQ_BIN_13 +234 0x0000 //RX_FDEQ_BIN_14 +235 0x0000 //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x4000 //RX_FDEQ_RESRV_0 +245 0x0320 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0035 //RX_FDDRC_BAND_MARGIN_1 +248 0x00D5 //RX_FDDRC_BAND_MARGIN_2 +249 0x0120 //RX_FDDRC_BAND_MARGIN_3 +250 0x0004 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x2000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x2000 //RX_FDDRC_THRD_3_2 +258 0x5000 //RX_FDDRC_THRD_3_3 +259 0x4000 //RX_FDDRC_SLANT_0_0 +260 0x4000 //RX_FDDRC_SLANT_0_1 +261 0x4000 //RX_FDDRC_SLANT_0_2 +262 0x4000 //RX_FDDRC_SLANT_0_3 +263 0x7FFF //RX_FDDRC_SLANT_1_0 +264 0x7FFF //RX_FDDRC_SLANT_1_1 +265 0x7FFF //RX_FDDRC_SLANT_1_2 +266 0x7FFF //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +286 0x0049 //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 +#VOL 5 +163 0x6000 //RX_TDDRC_ALPHA_UP_1 +164 0x6000 //RX_TDDRC_ALPHA_UP_2 +165 0x6000 //RX_TDDRC_ALPHA_UP_3 +166 0x1000 //RX_TDDRC_ALPHA_UP_4 +184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +190 0x7214 //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +269 0x0002 //RX_TDDRC_THRD_0 +270 0x0004 //RX_TDDRC_THRD_1 +271 0x1C00 //RX_TDDRC_THRD_2 +272 0x1C00 //RX_TDDRC_THRD_3 +273 0x7FFF //RX_TDDRC_SLANT_0 +274 0x7FFF //RX_TDDRC_SLANT_1 +275 0x6000 //RX_TDDRC_ALPHA_UP_0 +276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x199A //RX_TDDRC_HMNC_GAIN +279 0x0001 //RX_TDDRC_SMT_FLAG +280 0x0CCD //RX_TDDRC_SMT_W +281 0x0715 //RX_TDDRC_DRC_GAIN +195 0x001C //RX_FDEQ_SUBNUM +196 0x6868 //RX_FDEQ_GAIN_0 +197 0x6858 //RX_FDEQ_GAIN_1 +198 0x5858 //RX_FDEQ_GAIN_2 +199 0x5858 //RX_FDEQ_GAIN_3 +200 0x5C5C //RX_FDEQ_GAIN_4 +201 0x8854 //RX_FDEQ_GAIN_5 +202 0x5448 //RX_FDEQ_GAIN_6 +203 0x4848 //RX_FDEQ_GAIN_7 +204 0x4860 //RX_FDEQ_GAIN_8 +205 0x6068 //RX_FDEQ_GAIN_9 +206 0x7070 //RX_FDEQ_GAIN_10 +207 0x8070 //RX_FDEQ_GAIN_11 +208 0x6060 //RX_FDEQ_GAIN_12 +209 0x7070 //RX_FDEQ_GAIN_13 +210 0x4848 //RX_FDEQ_GAIN_14 +211 0x4848 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0202 //RX_FDEQ_BIN_0 +221 0x0203 //RX_FDEQ_BIN_1 +222 0x0303 //RX_FDEQ_BIN_2 +223 0x0304 //RX_FDEQ_BIN_3 +224 0x0404 //RX_FDEQ_BIN_4 +225 0x0204 //RX_FDEQ_BIN_5 +226 0x0A0A //RX_FDEQ_BIN_6 +227 0x0A0A //RX_FDEQ_BIN_7 +228 0x0B0C //RX_FDEQ_BIN_8 +229 0x0D0E //RX_FDEQ_BIN_9 +230 0x0E0F //RX_FDEQ_BIN_10 +231 0x0F10 //RX_FDEQ_BIN_11 +232 0x1011 //RX_FDEQ_BIN_12 +233 0x1104 //RX_FDEQ_BIN_13 +234 0x0000 //RX_FDEQ_BIN_14 +235 0x0000 //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x4000 //RX_FDEQ_RESRV_0 +245 0x0320 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0035 //RX_FDDRC_BAND_MARGIN_1 +248 0x00D5 //RX_FDDRC_BAND_MARGIN_2 +249 0x0120 //RX_FDDRC_BAND_MARGIN_3 +250 0x0004 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x2000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x2000 //RX_FDDRC_THRD_3_2 +258 0x5000 //RX_FDDRC_THRD_3_3 +259 0x4000 //RX_FDDRC_SLANT_0_0 +260 0x4000 //RX_FDDRC_SLANT_0_1 +261 0x4000 //RX_FDDRC_SLANT_0_2 +262 0x4000 //RX_FDDRC_SLANT_0_3 +263 0x7FFF //RX_FDDRC_SLANT_1_0 +264 0x7FFF //RX_FDDRC_SLANT_1_1 +265 0x7FFF //RX_FDDRC_SLANT_1_2 +266 0x7FFF //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +286 0x0074 //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 +#VOL 6 +163 0x6000 //RX_TDDRC_ALPHA_UP_1 +164 0x6000 //RX_TDDRC_ALPHA_UP_2 +165 0x6000 //RX_TDDRC_ALPHA_UP_3 +166 0x1000 //RX_TDDRC_ALPHA_UP_4 +184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +190 0x7214 //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +269 0x0002 //RX_TDDRC_THRD_0 +270 0x0004 //RX_TDDRC_THRD_1 +271 0x1C00 //RX_TDDRC_THRD_2 +272 0x1C00 //RX_TDDRC_THRD_3 +273 0x7FFF //RX_TDDRC_SLANT_0 +274 0x7FFF //RX_TDDRC_SLANT_1 +275 0x6000 //RX_TDDRC_ALPHA_UP_0 +276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x199A //RX_TDDRC_HMNC_GAIN +279 0x0001 //RX_TDDRC_SMT_FLAG +280 0x0CCD //RX_TDDRC_SMT_W +281 0x0715 //RX_TDDRC_DRC_GAIN +195 0x001C //RX_FDEQ_SUBNUM +196 0x6868 //RX_FDEQ_GAIN_0 +197 0x6864 //RX_FDEQ_GAIN_1 +198 0x7070 //RX_FDEQ_GAIN_2 +199 0x6058 //RX_FDEQ_GAIN_3 +200 0x5C5C //RX_FDEQ_GAIN_4 +201 0x8854 //RX_FDEQ_GAIN_5 +202 0x5448 //RX_FDEQ_GAIN_6 +203 0x4848 //RX_FDEQ_GAIN_7 +204 0x4860 //RX_FDEQ_GAIN_8 +205 0x6068 //RX_FDEQ_GAIN_9 +206 0x7070 //RX_FDEQ_GAIN_10 +207 0x8070 //RX_FDEQ_GAIN_11 +208 0x6060 //RX_FDEQ_GAIN_12 +209 0x7070 //RX_FDEQ_GAIN_13 +210 0x4848 //RX_FDEQ_GAIN_14 +211 0x4848 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0202 //RX_FDEQ_BIN_0 +221 0x0203 //RX_FDEQ_BIN_1 +222 0x0303 //RX_FDEQ_BIN_2 +223 0x0304 //RX_FDEQ_BIN_3 +224 0x0404 //RX_FDEQ_BIN_4 +225 0x0204 //RX_FDEQ_BIN_5 +226 0x0A0A //RX_FDEQ_BIN_6 +227 0x0A0A //RX_FDEQ_BIN_7 +228 0x0B0C //RX_FDEQ_BIN_8 +229 0x0D0E //RX_FDEQ_BIN_9 +230 0x0E0F //RX_FDEQ_BIN_10 +231 0x0F10 //RX_FDEQ_BIN_11 +232 0x1011 //RX_FDEQ_BIN_12 +233 0x1104 //RX_FDEQ_BIN_13 +234 0x0000 //RX_FDEQ_BIN_14 +235 0x0000 //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x4000 //RX_FDEQ_RESRV_0 +245 0x0320 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0035 //RX_FDDRC_BAND_MARGIN_1 +248 0x00D5 //RX_FDDRC_BAND_MARGIN_2 +249 0x0120 //RX_FDDRC_BAND_MARGIN_3 +250 0x0004 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x2000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x2000 //RX_FDDRC_THRD_3_2 +258 0x5000 //RX_FDDRC_THRD_3_3 +259 0x4000 //RX_FDDRC_SLANT_0_0 +260 0x4000 //RX_FDDRC_SLANT_0_1 +261 0x4000 //RX_FDDRC_SLANT_0_2 +262 0x4000 //RX_FDDRC_SLANT_0_3 +263 0x7FFF //RX_FDDRC_SLANT_1_0 +264 0x7FFF //RX_FDDRC_SLANT_1_1 +265 0x7FFF //RX_FDDRC_SLANT_1_2 +266 0x7FFF //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +286 0x0100 //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 #CASE_NAME HANDSFREE-HANDSFREE-VOICE_GENERIC-SWB -#PARAM_TYPE TX+RX -#TOTAL_CUSTOM_STEP 7 +#PARAM_MODE FULL +#PARAM_TYPE TX+2RX +#TOTAL_CUSTOM_STEP 7+7 #TX 0 0x0001 //TX_OPERATION_MODE_0 1 0x0001 //TX_OPERATION_MODE_1 -2 0x0033 //TX_PATCH_REG +2 0x0073 //TX_PATCH_REG 3 0x2F7C //TX_SENDFUNC_MODE_0 4 0x0001 //TX_SENDFUNC_MODE_1 5 0x0003 //TX_NUM_MIC @@ -8998,10 +13584,10 @@ 223 0x0BB8 //TX_RATIO_DT_L_TH_LOW 224 0x3A98 //TX_RATIO_DT_H_TH_LOW 225 0x1F40 //TX_RATIO_DT_L_TH_HIGH -226 0x6590 //TX_RATIO_DT_H_TH_HIGH +226 0x5014 //TX_RATIO_DT_H_TH_HIGH 227 0x09C4 //TX_RATIO_DT_L0_TH -228 0x2000 //TX_B_POST_FILT_ECHO_L -229 0x1000 //TX_B_POST_FILT_ECHO_H +228 0x7FFF //TX_B_POST_FILT_ECHO_L +229 0x7FFF //TX_B_POST_FILT_ECHO_H 230 0x0200 //TX_MIN_G_CTRL_ECHO 231 0x1000 //TX_B_LESSCUT_RTO_ECHO 232 0x0000 //TX_EPD_OFFSET_00 @@ -9025,10 +13611,10 @@ 250 0x0100 //TX_DELTA_THR_SN_EST_0 251 0x0100 //TX_DELTA_THR_SN_EST_1 252 0x0100 //TX_DELTA_THR_SN_EST_2 -253 0x0100 //TX_DELTA_THR_SN_EST_3 -254 0x0000 //TX_DELTA_THR_SN_EST_4 -255 0x0100 //TX_DELTA_THR_SN_EST_5 -256 0x0200 //TX_DELTA_THR_SN_EST_6 +253 0x0000 //TX_DELTA_THR_SN_EST_3 +254 0x0100 //TX_DELTA_THR_SN_EST_4 +255 0x0200 //TX_DELTA_THR_SN_EST_5 +256 0x0100 //TX_DELTA_THR_SN_EST_6 257 0x0200 //TX_DELTA_THR_SN_EST_7 258 0x4000 //TX_LAMBDA_NN_EST_0 259 0x4000 //TX_LAMBDA_NN_EST_1 @@ -9055,51 +13641,51 @@ 280 0x1000 //TX_B_POST_FLT_1 281 0x0010 //TX_NS_LVL_CTRL_0 282 0x003C //TX_NS_LVL_CTRL_1 -283 0x003C //TX_NS_LVL_CTRL_2 -284 0x0024 //TX_NS_LVL_CTRL_3 -285 0x003C //TX_NS_LVL_CTRL_4 -286 0x0014 //TX_NS_LVL_CTRL_5 -287 0x0011 //TX_NS_LVL_CTRL_6 +283 0x0024 //TX_NS_LVL_CTRL_2 +284 0x003C //TX_NS_LVL_CTRL_3 +285 0x0014 //TX_NS_LVL_CTRL_4 +286 0x0011 //TX_NS_LVL_CTRL_5 +287 0x003C //TX_NS_LVL_CTRL_6 288 0x0011 //TX_NS_LVL_CTRL_7 -289 0x000F //TX_MIN_GAIN_S_0 -290 0x0010 //TX_MIN_GAIN_S_1 -291 0x0010 //TX_MIN_GAIN_S_2 -292 0x0010 //TX_MIN_GAIN_S_3 -293 0x0010 //TX_MIN_GAIN_S_4 -294 0x0010 //TX_MIN_GAIN_S_5 -295 0x0010 //TX_MIN_GAIN_S_6 -296 0x000F //TX_MIN_GAIN_S_7 +289 0x0020 //TX_MIN_GAIN_S_0 +290 0x0020 //TX_MIN_GAIN_S_1 +291 0x0020 //TX_MIN_GAIN_S_2 +292 0x0020 //TX_MIN_GAIN_S_3 +293 0x0020 //TX_MIN_GAIN_S_4 +294 0x0020 //TX_MIN_GAIN_S_5 +295 0x0020 //TX_MIN_GAIN_S_6 +296 0x0020 //TX_MIN_GAIN_S_7 297 0x6000 //TX_NMOS_SUP 298 0x0000 //TX_NS_MAX_PRI_SNR_TH 299 0x0000 //TX_NMOS_SUP_MENSA 300 0x7FFF //TX_SNRI_SUP_0 -301 0x1400 //TX_SNRI_SUP_1 -302 0x1400 //TX_SNRI_SUP_2 -303 0x1400 //TX_SNRI_SUP_3 +301 0x4000 //TX_SNRI_SUP_1 +302 0x4000 //TX_SNRI_SUP_2 +303 0x4000 //TX_SNRI_SUP_3 304 0x4000 //TX_SNRI_SUP_4 305 0x4000 //TX_SNRI_SUP_5 -306 0x50C0 //TX_SNRI_SUP_6 -307 0x7FFF //TX_SNRI_SUP_7 +306 0x4000 //TX_SNRI_SUP_6 +307 0x4000 //TX_SNRI_SUP_7 308 0x7FFF //TX_THR_LFNS 309 0x0018 //TX_G_LFNS 310 0x09C4 //TX_GAIN0_NTH 311 0x000A //TX_MUSIC_MORENS 312 0x7FFF //TX_A_POST_FILT_0 313 0x2000 //TX_A_POST_FILT_1 -314 0x5000 //TX_A_POST_FILT_S_0 -315 0x7C00 //TX_A_POST_FILT_S_1 -316 0x4C00 //TX_A_POST_FILT_S_2 -317 0x4000 //TX_A_POST_FILT_S_3 -318 0x6000 //TX_A_POST_FILT_S_4 -319 0x4000 //TX_A_POST_FILT_S_5 -320 0x5000 //TX_A_POST_FILT_S_6 -321 0x7000 //TX_A_POST_FILT_S_7 +314 0x7FFF //TX_A_POST_FILT_S_0 +315 0x7FFF //TX_A_POST_FILT_S_1 +316 0x7FFF //TX_A_POST_FILT_S_2 +317 0x7FFF //TX_A_POST_FILT_S_3 +318 0x7FFF //TX_A_POST_FILT_S_4 +319 0x7FFF //TX_A_POST_FILT_S_5 +320 0x7FFF //TX_A_POST_FILT_S_6 +321 0x7FFF //TX_A_POST_FILT_S_7 322 0x2000 //TX_B_POST_FILT_0 -323 0x1000 //TX_B_POST_FILT_1 +323 0x6000 //TX_B_POST_FILT_1 324 0x6000 //TX_B_POST_FILT_2 325 0x6000 //TX_B_POST_FILT_3 -326 0x6000 //TX_B_POST_FILT_4 -327 0x4000 //TX_B_POST_FILT_5 +326 0x4000 //TX_B_POST_FILT_4 +327 0x1000 //TX_B_POST_FILT_5 328 0x1000 //TX_B_POST_FILT_6 329 0x2000 //TX_B_POST_FILT_7 330 0x4000 //TX_B_LESSCUT_RTO_S_0 @@ -9107,18 +13693,18 @@ 332 0x7FFF //TX_B_LESSCUT_RTO_S_2 333 0x7FFF //TX_B_LESSCUT_RTO_S_3 334 0x7FFF //TX_B_LESSCUT_RTO_S_4 -335 0x7FFF //TX_B_LESSCUT_RTO_S_5 -336 0x6000 //TX_B_LESSCUT_RTO_S_6 +335 0x6000 //TX_B_LESSCUT_RTO_S_5 +336 0x7FFF //TX_B_LESSCUT_RTO_S_6 337 0x7FFF //TX_B_LESSCUT_RTO_S_7 -338 0x7C00 //TX_LAMBDA_PFILT -339 0x7D00 //TX_LAMBDA_PFILT_S_0 -340 0x7D00 //TX_LAMBDA_PFILT_S_1 -341 0x7D00 //TX_LAMBDA_PFILT_S_2 -342 0x7D00 //TX_LAMBDA_PFILT_S_3 -343 0x7D00 //TX_LAMBDA_PFILT_S_4 -344 0x7D00 //TX_LAMBDA_PFILT_S_5 -345 0x7D00 //TX_LAMBDA_PFILT_S_6 -346 0x7D00 //TX_LAMBDA_PFILT_S_7 +338 0x7F00 //TX_LAMBDA_PFILT +339 0x7F00 //TX_LAMBDA_PFILT_S_0 +340 0x7F00 //TX_LAMBDA_PFILT_S_1 +341 0x7F00 //TX_LAMBDA_PFILT_S_2 +342 0x7F00 //TX_LAMBDA_PFILT_S_3 +343 0x7F00 //TX_LAMBDA_PFILT_S_4 +344 0x7F00 //TX_LAMBDA_PFILT_S_5 +345 0x7F00 //TX_LAMBDA_PFILT_S_6 +346 0x7F00 //TX_LAMBDA_PFILT_S_7 347 0x0200 //TX_K_PEPPER 348 0x0400 //TX_A_PEPPER 349 0x1EAA //TX_K_PEPPER_HF @@ -9152,10 +13738,10 @@ 377 0x7FFF //TX_NOISE_TH_5_4 378 0x0DAC //TX_NOISE_TH_6 379 0x0050 //TX_MINENOISE_TH -380 0x4000 //TX_MINENOISE_MIC0_TH_MTS -381 0xFFEE //TX_MINENOISE_MIC0_TH_EXP -382 0x6000 //TX_MINENOISE_MIC0_S_TH_MTS -383 0xFFF3 //TX_MINENOISE_MIC0_S_TH_EXP +380 0xD508 //TX_MORENS_TFMASK_TH +381 0x0001 //TX_DRC_QUIET_FLOOR +382 0x3A98 //TX_RATIODTL_CUT_TH +383 0x07D0 //TX_DT_CUT_K1 384 0x0666 //TX_OUT_ENER_S_TH_CLEAN 385 0x0666 //TX_OUT_ENER_S_TH_LESSCLEAN 386 0x0333 //TX_OUT_ENER_S_TH_NOISY @@ -9163,15 +13749,15 @@ 388 0x0333 //TX_OUT_ENER_TH_SPEECH 389 0x2000 //TX_SN_NPB_GAIN 390 0x0000 //TX_NN_NPB_GAIN -391 0x0000 //TX_CSX_ALPHA_0 -392 0x0000 //TX_CSX_ALPHA_1 -393 0x0000 //TX_CSX_ALPHA_2 -394 0x0000 //TX_CSX_ALPHA_3 -395 0x0800 //TX_MU_ARSP_EST -396 0x00C8 //TX_P_OUTBEAM_MIN_TH +391 0x7FFF //TX_POST_MASK_SUP_HSNE +392 0x1388 //TX_TAIL_DET_TH +393 0x4000 //TX_B_LESSCUT_RTO_WTA +394 0x0000 //TX_MEL_G_R +395 0x0080 //TX_SUPHIGH_TH +396 0x0000 //TX_MASK_G_R 397 0x0002 //TX_EXTRA_NS_L -398 0x0800 //TX_EXTRA_NS_A -399 0x0005 //TX_VR_NOISE_FLOOR_TH +398 0x1800 //TX_C_POST_FLT_MASK +399 0x7FFF //TX_A_POST_FLT_WNS 400 0x0148 //TX_MIN_G_LOW300HZ 401 0x0001 //TX_MAXLEVEL_CNG 402 0x00B4 //TX_STN_NOISE_TH @@ -9281,21 +13867,21 @@ 506 0x2000 //TX_RADIODTLV 507 0x0320 //TX_POWER_LINEIN_TH 508 0x0014 //TX_FE_VADCOUNT_TH_FC -509 0x0000 //TX_ECHO_SUPP_FC +509 0x000A //TX_ECHO_SUPP_FC 510 0x0C80 //TX_ECHO_TH 511 0x6666 //TX_MIC_TO_BFGAIN 512 0x0000 //TX_MICTOBFGAIN0 513 0x0000 //TX_FASTMUE_TH -514 0x0000 //TX_DERVB_LEN_0 -515 0x0000 //TX_DERVB_LEN_1 -516 0x0000 //TX_RHO_DERVB -517 0x0000 //TX_MIC_INDX_DERVB -518 0x0000 //TX_MU_DERVB -519 0x0000 //TX_DR_RESRV_0 -520 0x0000 //TX_DR_RESRV_1 -521 0x0000 //TX_DR_RESRV_2 -522 0x0000 //TX_DR_RESRV_3 -523 0x0000 //TX_DR_RESRV_4 +514 0x3000 //TX_DEREVERB_LF_MU +515 0x34CD //TX_DEREVERB_HF_MU +516 0x0007 //TX_DEREVERB_DELAY +517 0x0004 //TX_DEREVERB_COEF_LEN +518 0x0003 //TX_DEREVERB_DNR +519 0x0000 //TX_DEREVERB_ALPHA +520 0x0000 //TX_DEREVERB_BETA +521 0x3A98 //TX_GSC_RTOL_TH +522 0x3A98 //TX_GSC_RTOH_TH +523 0x7E2C //TX_WIDE2_MEANHTH 524 0x0000 //TX_DR_RESRV_5 525 0x0000 //TX_DR_RESRV_6 526 0x0000 //TX_DR_RESRV_7 @@ -9343,18 +13929,18 @@ 568 0x4848 //TX_FDEQ_GAIN_1 569 0x4850 //TX_FDEQ_GAIN_2 570 0x5050 //TX_FDEQ_GAIN_3 -571 0x4B4B //TX_FDEQ_GAIN_4 -572 0x4B4E //TX_FDEQ_GAIN_5 -573 0x4E5E //TX_FDEQ_GAIN_6 -574 0x584E //TX_FDEQ_GAIN_7 +571 0x4B48 //TX_FDEQ_GAIN_4 +572 0x484B //TX_FDEQ_GAIN_5 +573 0x4B5C //TX_FDEQ_GAIN_6 +574 0x564E //TX_FDEQ_GAIN_7 575 0x4C4E //TX_FDEQ_GAIN_8 576 0x4E45 //TX_FDEQ_GAIN_9 577 0x494A //TX_FDEQ_GAIN_10 578 0x534D //TX_FDEQ_GAIN_11 -579 0x5C5C //TX_FDEQ_GAIN_12 -580 0x5F77 //TX_FDEQ_GAIN_13 -581 0x788F //TX_FDEQ_GAIN_14 -582 0x929A //TX_FDEQ_GAIN_15 +579 0x5C57 //TX_FDEQ_GAIN_12 +580 0x5667 //TX_FDEQ_GAIN_13 +581 0x6778 //TX_FDEQ_GAIN_14 +582 0x8087 //TX_FDEQ_GAIN_15 583 0x4848 //TX_FDEQ_GAIN_16 584 0x4848 //TX_FDEQ_GAIN_17 585 0x4848 //TX_FDEQ_GAIN_18 @@ -9445,16 +14031,16 @@ 670 0x4848 //TX_PREEQ_GAIN_MIC1_4 671 0x4848 //TX_PREEQ_GAIN_MIC1_5 672 0x4848 //TX_PREEQ_GAIN_MIC1_6 -673 0x4848 //TX_PREEQ_GAIN_MIC1_7 -674 0x4848 //TX_PREEQ_GAIN_MIC1_8 -675 0x494A //TX_PREEQ_GAIN_MIC1_9 -676 0x4B4B //TX_PREEQ_GAIN_MIC1_10 -677 0x4B48 //TX_PREEQ_GAIN_MIC1_11 -678 0x4D4C //TX_PREEQ_GAIN_MIC1_12 -679 0x4A48 //TX_PREEQ_GAIN_MIC1_13 -680 0x4840 //TX_PREEQ_GAIN_MIC1_14 -681 0x3434 //TX_PREEQ_GAIN_MIC1_15 -682 0x3C48 //TX_PREEQ_GAIN_MIC1_16 +673 0x4849 //TX_PREEQ_GAIN_MIC1_7 +674 0x4A4A //TX_PREEQ_GAIN_MIC1_8 +675 0x4B4D //TX_PREEQ_GAIN_MIC1_9 +676 0x4E4F //TX_PREEQ_GAIN_MIC1_10 +677 0x5052 //TX_PREEQ_GAIN_MIC1_11 +678 0x5354 //TX_PREEQ_GAIN_MIC1_12 +679 0x5454 //TX_PREEQ_GAIN_MIC1_13 +680 0x5653 //TX_PREEQ_GAIN_MIC1_14 +681 0x4C48 //TX_PREEQ_GAIN_MIC1_15 +682 0x4444 //TX_PREEQ_GAIN_MIC1_16 683 0x4848 //TX_PREEQ_GAIN_MIC1_17 684 0x4848 //TX_PREEQ_GAIN_MIC1_18 685 0x4848 //TX_PREEQ_GAIN_MIC1_19 @@ -9493,16 +14079,16 @@ 718 0x4848 //TX_PREEQ_GAIN_MIC2_3 719 0x4848 //TX_PREEQ_GAIN_MIC2_4 720 0x4848 //TX_PREEQ_GAIN_MIC2_5 -721 0x484A //TX_PREEQ_GAIN_MIC2_6 -722 0x4B4D //TX_PREEQ_GAIN_MIC2_7 +721 0x494B //TX_PREEQ_GAIN_MIC2_6 +722 0x4C4D //TX_PREEQ_GAIN_MIC2_7 723 0x4E4F //TX_PREEQ_GAIN_MIC2_8 724 0x5051 //TX_PREEQ_GAIN_MIC2_9 -725 0x5253 //TX_PREEQ_GAIN_MIC2_10 -726 0x5456 //TX_PREEQ_GAIN_MIC2_11 -727 0x5251 //TX_PREEQ_GAIN_MIC2_12 -728 0x4F48 //TX_PREEQ_GAIN_MIC2_13 -729 0x423C //TX_PREEQ_GAIN_MIC2_14 -730 0x3C48 //TX_PREEQ_GAIN_MIC2_15 +725 0x5255 //TX_PREEQ_GAIN_MIC2_10 +726 0x5754 //TX_PREEQ_GAIN_MIC2_11 +727 0x5454 //TX_PREEQ_GAIN_MIC2_12 +728 0x544F //TX_PREEQ_GAIN_MIC2_13 +729 0x463D //TX_PREEQ_GAIN_MIC2_14 +730 0x4A48 //TX_PREEQ_GAIN_MIC2_15 731 0x4848 //TX_PREEQ_GAIN_MIC2_16 732 0x4848 //TX_PREEQ_GAIN_MIC2_17 733 0x4848 //TX_PREEQ_GAIN_MIC2_18 @@ -9669,8 +14255,73 @@ 894 0xC000 //TX_FASTNS_SSA_THHFL 895 0xCCCC //TX_FASTNS_SSA_THLFH 896 0xD999 //TX_FASTNS_SSA_THHFH +897 0x2339 //TX_SENDFUNC_REG_MICMUTE +898 0x0021 //TX_SENDFUNC_REG_MICMUTE1 +899 0x02BC //TX_MICMUTE_RATIO_THR +900 0x0140 //TX_MICMUTE_AMP_THR +901 0x0004 //TX_MICMUTE_HPF_IND +902 0x00C0 //TX_MICMUTE_LOG_EYR_TH +903 0x0008 //TX_MICMUTE_CVG_TIME +904 0x0008 //TX_MICMUTE_RELEASE_TIME +905 0x01FE //TX_MIC_VOLUME_MIC0MUTE +906 0x0020 //TX_MICMUTE_EPD_OFFSET_0 +907 0x001E //TX_MICMUTE_FRQ_AEC_L +908 0x7999 //TX_MICMUTE_EAD_THR +909 0x7FFF //TX_MICMUTE_LAMBDA_CB_NLE +910 0x7FFF //TX_MICMUTE_LAMBDA_RE_EST +911 0x4000 //TX_DTD_THR1_MICMUTE_0 +912 0x7000 //TX_DTD_THR1_MICMUTE_1 +913 0x7FFF //TX_DTD_THR1_MICMUTE_2 +914 0x7FFF //TX_DTD_THR1_MICMUTE_3 +915 0x6CCC //TX_DTD_THR2_MICMUTE_0 +916 0x0400 //TX_MICMUTE_MIN_EQ_RE_EST_0 +917 0x0400 //TX_MICMUTE_MIN_EQ_RE_EST_1 +918 0x1000 //TX_MICMUTE_MIN_EQ_RE_EST_2 +919 0x7FFF //TX_MICMUTE_MIN_EQ_RE_EST_3 +920 0x7FFF //TX_MICMUTE_MIN_EQ_RE_EST_4 +921 0x4000 //TX_MICMUTE_C_POST_FLT +922 0x03E8 //TX_MICMUTE_DT_CUT_K +923 0x0001 //TX_MICMUTE_DT_CUT_THR +924 0x03E8 //TX_MICMUTE_DT_CUT_K2 +925 0x0001 //TX_MICMUTE_DT_CUT_THR2 +926 0x0064 //TX_MICMUTE_DT2_HOLD_N +927 0x1000 //TX_MICMUTE_RATIODTH_THCUT +928 0x1000 //TX_MICMUTE_B_POST_FLT_ECHOL +929 0x7FFF //TX_MICMUTE_B_POST_FLT_ECHOH +930 0x0400 //TX_MICMUTE_C_POST_FLT_MASK +931 0x7999 //TX_MICMUTE_RATIODTL_CUT_TH +932 0x0258 //TX_MICMUTE_DT_CUT_K1 +933 0x0800 //TX_MICMUTE_N2_SN_EST +934 0xFC00 //TX_MICMUTE_THR_SN_EST_0 +935 0x001C //TX_MICMUTE_MIN_G_CTRL_0 +936 0x6000 //TX_MICMUTE_A_POST_FILT_S_0 +937 0x7000 //TX_MICMUTE_B_POST_FILT_0 +938 0x2710 //TX_MIC1RUB_AMP_THR +939 0x0010 //TX_MIC1MUTE_RATIO_THR +940 0x0450 //TX_MIC1MUTE_AMP_THR +941 0x0008 //TX_MIC1MUTE_CVG_TIME +942 0x0008 //TX_MIC1MUTE_RELEASE_TIME +943 0x0000 //TX_AMS_RESRV_01 +944 0x0000 //TX_AMS_RESRV_02 +945 0x0000 //TX_AMS_RESRV_03 +946 0x0000 //TX_AMS_RESRV_04 +947 0x0000 //TX_AMS_RESRV_05 +948 0x0000 //TX_AMS_RESRV_06 +949 0x0000 //TX_AMS_RESRV_07 +950 0x0000 //TX_AMS_RESRV_08 +951 0x0000 //TX_AMS_RESRV_09 +952 0x0000 //TX_AMS_RESRV_10 +953 0x0000 //TX_AMS_RESRV_11 +954 0x0000 //TX_AMS_RESRV_12 +955 0x0000 //TX_AMS_RESRV_13 +956 0x0000 //TX_AMS_RESRV_14 +957 0x0000 //TX_AMS_RESRV_15 +958 0x0000 //TX_AMS_RESRV_16 +959 0x0000 //TX_AMS_RESRV_17 +960 0x0000 //TX_AMS_RESRV_18 +961 0x0000 //TX_AMS_RESRV_19 #RX -0 0x027C //RX_RECVFUNC_MODE_0 +0 0x206C //RX_RECVFUNC_MODE_0 1 0x0000 //RX_RECVFUNC_MODE_1 2 0x0003 //RX_SAMPLINGFREQ_SIG 3 0x0003 //RX_SAMPLINGFREQ_PROC @@ -9710,21 +14361,21 @@ 37 0x4000 //RX_LMT_ALPHA 38 0x0020 //RX_FDEQ_SUBNUM 39 0x4848 //RX_FDEQ_GAIN_0 -40 0x4848 //RX_FDEQ_GAIN_1 -41 0x4848 //RX_FDEQ_GAIN_2 -42 0x4848 //RX_FDEQ_GAIN_3 -43 0x4848 //RX_FDEQ_GAIN_4 -44 0x4848 //RX_FDEQ_GAIN_5 -45 0x4850 //RX_FDEQ_GAIN_6 -46 0x4848 //RX_FDEQ_GAIN_7 -47 0x4860 //RX_FDEQ_GAIN_8 -48 0x7468 //RX_FDEQ_GAIN_9 -49 0x6060 //RX_FDEQ_GAIN_10 -50 0x6060 //RX_FDEQ_GAIN_11 -51 0x5C54 //RX_FDEQ_GAIN_12 -52 0x5450 //RX_FDEQ_GAIN_13 -53 0x5050 //RX_FDEQ_GAIN_14 -54 0x5860 //RX_FDEQ_GAIN_15 +40 0x3B3B //RX_FDEQ_GAIN_1 +41 0x3942 //RX_FDEQ_GAIN_2 +42 0x4645 //RX_FDEQ_GAIN_3 +43 0x494A //RX_FDEQ_GAIN_4 +44 0x5D5A //RX_FDEQ_GAIN_5 +45 0x5B5B //RX_FDEQ_GAIN_6 +46 0x5A51 //RX_FDEQ_GAIN_7 +47 0x514F //RX_FDEQ_GAIN_8 +48 0x5568 //RX_FDEQ_GAIN_9 +49 0x7460 //RX_FDEQ_GAIN_10 +50 0x544E //RX_FDEQ_GAIN_11 +51 0x4848 //RX_FDEQ_GAIN_12 +52 0x484A //RX_FDEQ_GAIN_13 +53 0x5155 //RX_FDEQ_GAIN_14 +54 0x577B //RX_FDEQ_GAIN_15 55 0x4848 //RX_FDEQ_GAIN_16 56 0x4848 //RX_FDEQ_GAIN_17 57 0x4848 //RX_FDEQ_GAIN_18 @@ -9794,12 +14445,12 @@ 121 0x199A //RX_TDDRC_HMNC_GAIN 122 0x0001 //RX_TDDRC_SMT_FLAG 123 0x0CCD //RX_TDDRC_SMT_W -124 0x0550 //RX_TDDRC_DRC_GAIN +124 0x032A //RX_TDDRC_DRC_GAIN 125 0x7C00 //RX_LAMBDA_PKA_FP 126 0x2000 //RX_TPKA_FP 127 0x2000 //RX_MIN_G_FP 128 0x0080 //RX_MAX_G_FP -129 0x0014 //RX_SPK_VOL +129 0x0100 //RX_SPK_VOL 130 0x0000 //RX_VOL_RESRV_0 131 0x0000 //RX_MAXLEVEL_CNG 132 0x3000 //RX_BWE_UV_TH @@ -9850,24 +14501,24 @@ 121 0x199A //RX_TDDRC_HMNC_GAIN 122 0x0001 //RX_TDDRC_SMT_FLAG 123 0x0CCD //RX_TDDRC_SMT_W -124 0x0550 //RX_TDDRC_DRC_GAIN +124 0x032A //RX_TDDRC_DRC_GAIN 38 0x0020 //RX_FDEQ_SUBNUM 39 0x4848 //RX_FDEQ_GAIN_0 -40 0x4848 //RX_FDEQ_GAIN_1 -41 0x4848 //RX_FDEQ_GAIN_2 -42 0x4848 //RX_FDEQ_GAIN_3 -43 0x4848 //RX_FDEQ_GAIN_4 -44 0x4848 //RX_FDEQ_GAIN_5 -45 0x4850 //RX_FDEQ_GAIN_6 -46 0x4848 //RX_FDEQ_GAIN_7 -47 0x4860 //RX_FDEQ_GAIN_8 -48 0x7468 //RX_FDEQ_GAIN_9 -49 0x6060 //RX_FDEQ_GAIN_10 -50 0x6060 //RX_FDEQ_GAIN_11 -51 0x5C54 //RX_FDEQ_GAIN_12 -52 0x5450 //RX_FDEQ_GAIN_13 -53 0x5050 //RX_FDEQ_GAIN_14 -54 0x5860 //RX_FDEQ_GAIN_15 +40 0x3B3B //RX_FDEQ_GAIN_1 +41 0x3942 //RX_FDEQ_GAIN_2 +42 0x4645 //RX_FDEQ_GAIN_3 +43 0x494A //RX_FDEQ_GAIN_4 +44 0x5D5A //RX_FDEQ_GAIN_5 +45 0x5B5B //RX_FDEQ_GAIN_6 +46 0x5A51 //RX_FDEQ_GAIN_7 +47 0x514F //RX_FDEQ_GAIN_8 +48 0x5568 //RX_FDEQ_GAIN_9 +49 0x7460 //RX_FDEQ_GAIN_10 +50 0x544E //RX_FDEQ_GAIN_11 +51 0x4848 //RX_FDEQ_GAIN_12 +52 0x484A //RX_FDEQ_GAIN_13 +53 0x5155 //RX_FDEQ_GAIN_14 +54 0x577B //RX_FDEQ_GAIN_15 55 0x4848 //RX_FDEQ_GAIN_16 56 0x4848 //RX_FDEQ_GAIN_17 57 0x4848 //RX_FDEQ_GAIN_18 @@ -9924,7 +14575,7 @@ 108 0x7FFF //RX_FDDRC_SLANT_1_2 109 0x7FFF //RX_FDDRC_SLANT_1_3 110 0x0000 //RX_FDDRC_RESRV_0 -129 0x0014 //RX_SPK_VOL +129 0x0100 //RX_SPK_VOL 130 0x0000 //RX_VOL_RESRV_0 #VOL 1 6 0x6000 //RX_TDDRC_ALPHA_UP_1 @@ -9949,24 +14600,24 @@ 121 0x199A //RX_TDDRC_HMNC_GAIN 122 0x0001 //RX_TDDRC_SMT_FLAG 123 0x0CCD //RX_TDDRC_SMT_W -124 0x0550 //RX_TDDRC_DRC_GAIN +124 0x032A //RX_TDDRC_DRC_GAIN 38 0x0020 //RX_FDEQ_SUBNUM 39 0x4848 //RX_FDEQ_GAIN_0 -40 0x4848 //RX_FDEQ_GAIN_1 -41 0x4848 //RX_FDEQ_GAIN_2 -42 0x4848 //RX_FDEQ_GAIN_3 -43 0x4848 //RX_FDEQ_GAIN_4 -44 0x4848 //RX_FDEQ_GAIN_5 -45 0x4850 //RX_FDEQ_GAIN_6 -46 0x4848 //RX_FDEQ_GAIN_7 -47 0x4860 //RX_FDEQ_GAIN_8 -48 0x7468 //RX_FDEQ_GAIN_9 -49 0x6060 //RX_FDEQ_GAIN_10 -50 0x6060 //RX_FDEQ_GAIN_11 -51 0x5C54 //RX_FDEQ_GAIN_12 -52 0x5450 //RX_FDEQ_GAIN_13 -53 0x5050 //RX_FDEQ_GAIN_14 -54 0x5860 //RX_FDEQ_GAIN_15 +40 0x3B3B //RX_FDEQ_GAIN_1 +41 0x3942 //RX_FDEQ_GAIN_2 +42 0x4645 //RX_FDEQ_GAIN_3 +43 0x494A //RX_FDEQ_GAIN_4 +44 0x5D5A //RX_FDEQ_GAIN_5 +45 0x5B5B //RX_FDEQ_GAIN_6 +46 0x5A51 //RX_FDEQ_GAIN_7 +47 0x514F //RX_FDEQ_GAIN_8 +48 0x5568 //RX_FDEQ_GAIN_9 +49 0x7460 //RX_FDEQ_GAIN_10 +50 0x544E //RX_FDEQ_GAIN_11 +51 0x4848 //RX_FDEQ_GAIN_12 +52 0x484A //RX_FDEQ_GAIN_13 +53 0x5155 //RX_FDEQ_GAIN_14 +54 0x577B //RX_FDEQ_GAIN_15 55 0x4848 //RX_FDEQ_GAIN_16 56 0x4848 //RX_FDEQ_GAIN_17 57 0x4848 //RX_FDEQ_GAIN_18 @@ -10048,24 +14699,24 @@ 121 0x199A //RX_TDDRC_HMNC_GAIN 122 0x0001 //RX_TDDRC_SMT_FLAG 123 0x0CCD //RX_TDDRC_SMT_W -124 0x0550 //RX_TDDRC_DRC_GAIN +124 0x032A //RX_TDDRC_DRC_GAIN 38 0x0020 //RX_FDEQ_SUBNUM 39 0x4848 //RX_FDEQ_GAIN_0 -40 0x4848 //RX_FDEQ_GAIN_1 -41 0x4848 //RX_FDEQ_GAIN_2 -42 0x4848 //RX_FDEQ_GAIN_3 -43 0x4848 //RX_FDEQ_GAIN_4 -44 0x4848 //RX_FDEQ_GAIN_5 -45 0x4850 //RX_FDEQ_GAIN_6 -46 0x4848 //RX_FDEQ_GAIN_7 -47 0x4860 //RX_FDEQ_GAIN_8 -48 0x7468 //RX_FDEQ_GAIN_9 -49 0x6060 //RX_FDEQ_GAIN_10 -50 0x6060 //RX_FDEQ_GAIN_11 -51 0x5C54 //RX_FDEQ_GAIN_12 -52 0x5450 //RX_FDEQ_GAIN_13 -53 0x5050 //RX_FDEQ_GAIN_14 -54 0x5860 //RX_FDEQ_GAIN_15 +40 0x3B3B //RX_FDEQ_GAIN_1 +41 0x3942 //RX_FDEQ_GAIN_2 +42 0x4645 //RX_FDEQ_GAIN_3 +43 0x494A //RX_FDEQ_GAIN_4 +44 0x5D5A //RX_FDEQ_GAIN_5 +45 0x5B5B //RX_FDEQ_GAIN_6 +46 0x5A51 //RX_FDEQ_GAIN_7 +47 0x514F //RX_FDEQ_GAIN_8 +48 0x5568 //RX_FDEQ_GAIN_9 +49 0x7460 //RX_FDEQ_GAIN_10 +50 0x544E //RX_FDEQ_GAIN_11 +51 0x4848 //RX_FDEQ_GAIN_12 +52 0x484A //RX_FDEQ_GAIN_13 +53 0x5155 //RX_FDEQ_GAIN_14 +54 0x577B //RX_FDEQ_GAIN_15 55 0x4848 //RX_FDEQ_GAIN_16 56 0x4848 //RX_FDEQ_GAIN_17 57 0x4848 //RX_FDEQ_GAIN_18 @@ -10147,24 +14798,24 @@ 121 0x199A //RX_TDDRC_HMNC_GAIN 122 0x0001 //RX_TDDRC_SMT_FLAG 123 0x0CCD //RX_TDDRC_SMT_W -124 0x0550 //RX_TDDRC_DRC_GAIN +124 0x032A //RX_TDDRC_DRC_GAIN 38 0x0020 //RX_FDEQ_SUBNUM 39 0x4848 //RX_FDEQ_GAIN_0 -40 0x4848 //RX_FDEQ_GAIN_1 -41 0x4848 //RX_FDEQ_GAIN_2 -42 0x4848 //RX_FDEQ_GAIN_3 -43 0x4848 //RX_FDEQ_GAIN_4 -44 0x4848 //RX_FDEQ_GAIN_5 -45 0x4850 //RX_FDEQ_GAIN_6 -46 0x4848 //RX_FDEQ_GAIN_7 -47 0x4860 //RX_FDEQ_GAIN_8 -48 0x7468 //RX_FDEQ_GAIN_9 -49 0x6060 //RX_FDEQ_GAIN_10 -50 0x6060 //RX_FDEQ_GAIN_11 -51 0x5C54 //RX_FDEQ_GAIN_12 -52 0x5450 //RX_FDEQ_GAIN_13 -53 0x5050 //RX_FDEQ_GAIN_14 -54 0x5860 //RX_FDEQ_GAIN_15 +40 0x3B3B //RX_FDEQ_GAIN_1 +41 0x3942 //RX_FDEQ_GAIN_2 +42 0x4645 //RX_FDEQ_GAIN_3 +43 0x494A //RX_FDEQ_GAIN_4 +44 0x5D5A //RX_FDEQ_GAIN_5 +45 0x5B5B //RX_FDEQ_GAIN_6 +46 0x5A51 //RX_FDEQ_GAIN_7 +47 0x514F //RX_FDEQ_GAIN_8 +48 0x5568 //RX_FDEQ_GAIN_9 +49 0x7460 //RX_FDEQ_GAIN_10 +50 0x544E //RX_FDEQ_GAIN_11 +51 0x4848 //RX_FDEQ_GAIN_12 +52 0x484A //RX_FDEQ_GAIN_13 +53 0x5155 //RX_FDEQ_GAIN_14 +54 0x577B //RX_FDEQ_GAIN_15 55 0x4848 //RX_FDEQ_GAIN_16 56 0x4848 //RX_FDEQ_GAIN_17 57 0x4848 //RX_FDEQ_GAIN_18 @@ -10246,24 +14897,24 @@ 121 0x199A //RX_TDDRC_HMNC_GAIN 122 0x0001 //RX_TDDRC_SMT_FLAG 123 0x0CCD //RX_TDDRC_SMT_W -124 0x0550 //RX_TDDRC_DRC_GAIN +124 0x032A //RX_TDDRC_DRC_GAIN 38 0x0020 //RX_FDEQ_SUBNUM 39 0x4848 //RX_FDEQ_GAIN_0 -40 0x4848 //RX_FDEQ_GAIN_1 -41 0x4848 //RX_FDEQ_GAIN_2 -42 0x4848 //RX_FDEQ_GAIN_3 -43 0x5454 //RX_FDEQ_GAIN_4 -44 0x7C54 //RX_FDEQ_GAIN_5 -45 0x4850 //RX_FDEQ_GAIN_6 -46 0x4848 //RX_FDEQ_GAIN_7 -47 0x4860 //RX_FDEQ_GAIN_8 -48 0x7468 //RX_FDEQ_GAIN_9 -49 0x6060 //RX_FDEQ_GAIN_10 -50 0x6060 //RX_FDEQ_GAIN_11 -51 0x5C54 //RX_FDEQ_GAIN_12 -52 0x5450 //RX_FDEQ_GAIN_13 -53 0x5050 //RX_FDEQ_GAIN_14 -54 0x5860 //RX_FDEQ_GAIN_15 +40 0x3B3B //RX_FDEQ_GAIN_1 +41 0x3942 //RX_FDEQ_GAIN_2 +42 0x4645 //RX_FDEQ_GAIN_3 +43 0x494A //RX_FDEQ_GAIN_4 +44 0x5D5A //RX_FDEQ_GAIN_5 +45 0x5B5B //RX_FDEQ_GAIN_6 +46 0x5A51 //RX_FDEQ_GAIN_7 +47 0x514F //RX_FDEQ_GAIN_8 +48 0x5568 //RX_FDEQ_GAIN_9 +49 0x7460 //RX_FDEQ_GAIN_10 +50 0x544E //RX_FDEQ_GAIN_11 +51 0x4848 //RX_FDEQ_GAIN_12 +52 0x484A //RX_FDEQ_GAIN_13 +53 0x5155 //RX_FDEQ_GAIN_14 +54 0x577B //RX_FDEQ_GAIN_15 55 0x4848 //RX_FDEQ_GAIN_16 56 0x4848 //RX_FDEQ_GAIN_17 57 0x4848 //RX_FDEQ_GAIN_18 @@ -10345,24 +14996,24 @@ 121 0x199A //RX_TDDRC_HMNC_GAIN 122 0x0001 //RX_TDDRC_SMT_FLAG 123 0x0CCD //RX_TDDRC_SMT_W -124 0x0550 //RX_TDDRC_DRC_GAIN +124 0x032A //RX_TDDRC_DRC_GAIN 38 0x0020 //RX_FDEQ_SUBNUM 39 0x4848 //RX_FDEQ_GAIN_0 -40 0x4848 //RX_FDEQ_GAIN_1 -41 0x4848 //RX_FDEQ_GAIN_2 -42 0x4848 //RX_FDEQ_GAIN_3 -43 0x5454 //RX_FDEQ_GAIN_4 -44 0x7C54 //RX_FDEQ_GAIN_5 -45 0x4850 //RX_FDEQ_GAIN_6 -46 0x4848 //RX_FDEQ_GAIN_7 -47 0x4860 //RX_FDEQ_GAIN_8 -48 0x7468 //RX_FDEQ_GAIN_9 -49 0x6060 //RX_FDEQ_GAIN_10 -50 0x6060 //RX_FDEQ_GAIN_11 -51 0x5C54 //RX_FDEQ_GAIN_12 -52 0x5450 //RX_FDEQ_GAIN_13 -53 0x5050 //RX_FDEQ_GAIN_14 -54 0x5860 //RX_FDEQ_GAIN_15 +40 0x3B3B //RX_FDEQ_GAIN_1 +41 0x3942 //RX_FDEQ_GAIN_2 +42 0x4645 //RX_FDEQ_GAIN_3 +43 0x494A //RX_FDEQ_GAIN_4 +44 0x5D5A //RX_FDEQ_GAIN_5 +45 0x5B5B //RX_FDEQ_GAIN_6 +46 0x5A51 //RX_FDEQ_GAIN_7 +47 0x514F //RX_FDEQ_GAIN_8 +48 0x5568 //RX_FDEQ_GAIN_9 +49 0x7460 //RX_FDEQ_GAIN_10 +50 0x544E //RX_FDEQ_GAIN_11 +51 0x4848 //RX_FDEQ_GAIN_12 +52 0x484A //RX_FDEQ_GAIN_13 +53 0x5155 //RX_FDEQ_GAIN_14 +54 0x577B //RX_FDEQ_GAIN_15 55 0x4848 //RX_FDEQ_GAIN_16 56 0x4848 //RX_FDEQ_GAIN_17 57 0x4848 //RX_FDEQ_GAIN_18 @@ -10444,24 +15095,24 @@ 121 0x199A //RX_TDDRC_HMNC_GAIN 122 0x0001 //RX_TDDRC_SMT_FLAG 123 0x0CCD //RX_TDDRC_SMT_W -124 0x0550 //RX_TDDRC_DRC_GAIN +124 0x032A //RX_TDDRC_DRC_GAIN 38 0x0020 //RX_FDEQ_SUBNUM 39 0x4848 //RX_FDEQ_GAIN_0 -40 0x4848 //RX_FDEQ_GAIN_1 -41 0x4848 //RX_FDEQ_GAIN_2 -42 0x4848 //RX_FDEQ_GAIN_3 -43 0x5454 //RX_FDEQ_GAIN_4 -44 0x7C54 //RX_FDEQ_GAIN_5 -45 0x4850 //RX_FDEQ_GAIN_6 -46 0x4848 //RX_FDEQ_GAIN_7 -47 0x4860 //RX_FDEQ_GAIN_8 -48 0x7468 //RX_FDEQ_GAIN_9 -49 0x6060 //RX_FDEQ_GAIN_10 -50 0x6060 //RX_FDEQ_GAIN_11 -51 0x5C54 //RX_FDEQ_GAIN_12 -52 0x5450 //RX_FDEQ_GAIN_13 -53 0x5050 //RX_FDEQ_GAIN_14 -54 0x5860 //RX_FDEQ_GAIN_15 +40 0x3B3B //RX_FDEQ_GAIN_1 +41 0x3942 //RX_FDEQ_GAIN_2 +42 0x4645 //RX_FDEQ_GAIN_3 +43 0x494A //RX_FDEQ_GAIN_4 +44 0x5D5A //RX_FDEQ_GAIN_5 +45 0x5B5B //RX_FDEQ_GAIN_6 +46 0x5A51 //RX_FDEQ_GAIN_7 +47 0x514F //RX_FDEQ_GAIN_8 +48 0x5568 //RX_FDEQ_GAIN_9 +49 0x7460 //RX_FDEQ_GAIN_10 +50 0x544E //RX_FDEQ_GAIN_11 +51 0x4848 //RX_FDEQ_GAIN_12 +52 0x484A //RX_FDEQ_GAIN_13 +53 0x5155 //RX_FDEQ_GAIN_14 +54 0x577B //RX_FDEQ_GAIN_15 55 0x4848 //RX_FDEQ_GAIN_16 56 0x4848 //RX_FDEQ_GAIN_17 57 0x4848 //RX_FDEQ_GAIN_18 @@ -10520,10 +15171,862 @@ 110 0x0000 //RX_FDDRC_RESRV_0 129 0x0100 //RX_SPK_VOL 130 0x0000 //RX_VOL_RESRV_0 +#RX 2 +157 0x027C //RX_RECVFUNC_MODE_0 +158 0x0000 //RX_RECVFUNC_MODE_1 +159 0x0003 //RX_SAMPLINGFREQ_SIG +160 0x0003 //RX_SAMPLINGFREQ_PROC +161 0x000A //RX_FRAME_SZ +162 0x0000 //RX_DELAY_OPT +163 0x6000 //RX_TDDRC_ALPHA_UP_1 +164 0x6000 //RX_TDDRC_ALPHA_UP_2 +165 0x6000 //RX_TDDRC_ALPHA_UP_3 +166 0x1000 //RX_TDDRC_ALPHA_UP_4 +167 0x0800 //RX_PGA +168 0x7652 //RX_A_HP +169 0x4000 //RX_B_PE +170 0x7800 //RX_THR_PITCH_DET_0 +171 0x7000 //RX_THR_PITCH_DET_1 +172 0x6000 //RX_THR_PITCH_DET_2 +173 0x0008 //RX_PITCH_BFR_LEN +174 0x0003 //RX_SBD_PITCH_DET +175 0x0100 //RX_PP_RESRV_0 +176 0x0020 //RX_PP_RESRV_1 +177 0x0400 //RX_N_SN_EST +178 0x000C //RX_N2_SN_EST +179 0x0010 //RX_NS_LVL_CTRL +180 0xF800 //RX_THR_SN_EST +181 0x7E00 //RX_LAMBDA_PFILT +182 0x000A //RX_FENS_RESRV_0 +183 0x0190 //RX_FENS_RESRV_1 +184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +187 0x0002 //RX_EXTRA_NS_L +188 0x0800 //RX_EXTRA_NS_A +189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +190 0x7214 //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +192 0x199A //RX_A_POST_FLT +193 0x0000 //RX_LMT_THRD +194 0x4000 //RX_LMT_ALPHA +195 0x0020 //RX_FDEQ_SUBNUM +196 0x4848 //RX_FDEQ_GAIN_0 +197 0x4848 //RX_FDEQ_GAIN_1 +198 0x4848 //RX_FDEQ_GAIN_2 +199 0x4848 //RX_FDEQ_GAIN_3 +200 0x4848 //RX_FDEQ_GAIN_4 +201 0x4848 //RX_FDEQ_GAIN_5 +202 0x4850 //RX_FDEQ_GAIN_6 +203 0x4848 //RX_FDEQ_GAIN_7 +204 0x4860 //RX_FDEQ_GAIN_8 +205 0x7468 //RX_FDEQ_GAIN_9 +206 0x6060 //RX_FDEQ_GAIN_10 +207 0x6060 //RX_FDEQ_GAIN_11 +208 0x5C54 //RX_FDEQ_GAIN_12 +209 0x5450 //RX_FDEQ_GAIN_13 +210 0x5050 //RX_FDEQ_GAIN_14 +211 0x5860 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0202 //RX_FDEQ_BIN_0 +221 0x0203 //RX_FDEQ_BIN_1 +222 0x0303 //RX_FDEQ_BIN_2 +223 0x0304 //RX_FDEQ_BIN_3 +224 0x0404 //RX_FDEQ_BIN_4 +225 0x0308 //RX_FDEQ_BIN_5 +226 0x0808 //RX_FDEQ_BIN_6 +227 0x090A //RX_FDEQ_BIN_7 +228 0x0B0C //RX_FDEQ_BIN_8 +229 0x0D0E //RX_FDEQ_BIN_9 +230 0x1013 //RX_FDEQ_BIN_10 +231 0x1719 //RX_FDEQ_BIN_11 +232 0x1B1E //RX_FDEQ_BIN_12 +233 0x1E1E //RX_FDEQ_BIN_13 +234 0x1E28 //RX_FDEQ_BIN_14 +235 0x282C //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x4000 //RX_FDEQ_RESRV_0 +245 0x0320 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0035 //RX_FDDRC_BAND_MARGIN_1 +248 0x00D5 //RX_FDDRC_BAND_MARGIN_2 +249 0x0120 //RX_FDDRC_BAND_MARGIN_3 +250 0x0004 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x2000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x2000 //RX_FDDRC_THRD_3_2 +258 0x5000 //RX_FDDRC_THRD_3_3 +259 0x4000 //RX_FDDRC_SLANT_0_0 +260 0x4000 //RX_FDDRC_SLANT_0_1 +261 0x4000 //RX_FDDRC_SLANT_0_2 +262 0x4000 //RX_FDDRC_SLANT_0_3 +263 0x7FFF //RX_FDDRC_SLANT_1_0 +264 0x7FFF //RX_FDDRC_SLANT_1_1 +265 0x7FFF //RX_FDDRC_SLANT_1_2 +266 0x7FFF //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +268 0x0002 //RX_FILTINDX +269 0x0002 //RX_TDDRC_THRD_0 +270 0x0004 //RX_TDDRC_THRD_1 +271 0x1A00 //RX_TDDRC_THRD_2 +272 0x1A00 //RX_TDDRC_THRD_3 +273 0x7EB8 //RX_TDDRC_SLANT_0 +274 0x2500 //RX_TDDRC_SLANT_1 +275 0x6000 //RX_TDDRC_ALPHA_UP_0 +276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x199A //RX_TDDRC_HMNC_GAIN +279 0x0001 //RX_TDDRC_SMT_FLAG +280 0x0CCD //RX_TDDRC_SMT_W +281 0x0550 //RX_TDDRC_DRC_GAIN +282 0x7C00 //RX_LAMBDA_PKA_FP +283 0x2000 //RX_TPKA_FP +284 0x2000 //RX_MIN_G_FP +285 0x0080 //RX_MAX_G_FP +286 0x0014 //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 +288 0x0000 //RX_MAXLEVEL_CNG +289 0x3000 //RX_BWE_UV_TH +290 0x3000 //RX_BWE_UV_TH2 +291 0x1800 //RX_BWE_UV_TH3 +292 0x1000 //RX_BWE_V_TH +293 0x04CD //RX_BWE_GAIN1_V_TH1 +294 0x0F33 //RX_BWE_GAIN1_V_TH2 +295 0x7333 //RX_BWE_UV_EQ +296 0x199A //RX_BWE_V_EQ +297 0x7333 //RX_BWE_TONE_TH +298 0x0004 //RX_BWE_UV_HOLD_T +299 0x6CCD //RX_BWE_GAIN2_ALPHA +300 0x799A //RX_BWE_GAIN3_ALPHA +301 0x001E //RX_BWE_CUTOFF +302 0x3000 //RX_BWE_GAINFILL +303 0x3200 //RX_BWE_MAXTH_TONE +304 0x2000 //RX_BWE_EQ_0 +305 0x2000 //RX_BWE_EQ_1 +306 0x2000 //RX_BWE_EQ_2 +307 0x2000 //RX_BWE_EQ_3 +308 0x2000 //RX_BWE_EQ_4 +309 0x2000 //RX_BWE_EQ_5 +310 0x2000 //RX_BWE_EQ_6 +311 0x0000 //RX_BWE_RESRV_0 +312 0x0000 //RX_BWE_RESRV_1 +313 0x0000 //RX_BWE_RESRV_2 +#VOL 0 +163 0x6000 //RX_TDDRC_ALPHA_UP_1 +164 0x6000 //RX_TDDRC_ALPHA_UP_2 +165 0x6000 //RX_TDDRC_ALPHA_UP_3 +166 0x1000 //RX_TDDRC_ALPHA_UP_4 +184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +190 0x7214 //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +269 0x0002 //RX_TDDRC_THRD_0 +270 0x0004 //RX_TDDRC_THRD_1 +271 0x1A00 //RX_TDDRC_THRD_2 +272 0x1A00 //RX_TDDRC_THRD_3 +273 0x7EB8 //RX_TDDRC_SLANT_0 +274 0x2500 //RX_TDDRC_SLANT_1 +275 0x6000 //RX_TDDRC_ALPHA_UP_0 +276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x199A //RX_TDDRC_HMNC_GAIN +279 0x0001 //RX_TDDRC_SMT_FLAG +280 0x0CCD //RX_TDDRC_SMT_W +281 0x0550 //RX_TDDRC_DRC_GAIN +195 0x0020 //RX_FDEQ_SUBNUM +196 0x4848 //RX_FDEQ_GAIN_0 +197 0x4848 //RX_FDEQ_GAIN_1 +198 0x4848 //RX_FDEQ_GAIN_2 +199 0x4848 //RX_FDEQ_GAIN_3 +200 0x4848 //RX_FDEQ_GAIN_4 +201 0x4848 //RX_FDEQ_GAIN_5 +202 0x4850 //RX_FDEQ_GAIN_6 +203 0x4848 //RX_FDEQ_GAIN_7 +204 0x4860 //RX_FDEQ_GAIN_8 +205 0x7468 //RX_FDEQ_GAIN_9 +206 0x6060 //RX_FDEQ_GAIN_10 +207 0x6060 //RX_FDEQ_GAIN_11 +208 0x5C54 //RX_FDEQ_GAIN_12 +209 0x5450 //RX_FDEQ_GAIN_13 +210 0x5050 //RX_FDEQ_GAIN_14 +211 0x5860 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0202 //RX_FDEQ_BIN_0 +221 0x0203 //RX_FDEQ_BIN_1 +222 0x0303 //RX_FDEQ_BIN_2 +223 0x0304 //RX_FDEQ_BIN_3 +224 0x0404 //RX_FDEQ_BIN_4 +225 0x0308 //RX_FDEQ_BIN_5 +226 0x0808 //RX_FDEQ_BIN_6 +227 0x090A //RX_FDEQ_BIN_7 +228 0x0B0C //RX_FDEQ_BIN_8 +229 0x0D0E //RX_FDEQ_BIN_9 +230 0x1013 //RX_FDEQ_BIN_10 +231 0x1719 //RX_FDEQ_BIN_11 +232 0x1B1E //RX_FDEQ_BIN_12 +233 0x1E1E //RX_FDEQ_BIN_13 +234 0x1E28 //RX_FDEQ_BIN_14 +235 0x282C //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x4000 //RX_FDEQ_RESRV_0 +245 0x0320 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0035 //RX_FDDRC_BAND_MARGIN_1 +248 0x00D5 //RX_FDDRC_BAND_MARGIN_2 +249 0x0120 //RX_FDDRC_BAND_MARGIN_3 +250 0x0004 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x2000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x2000 //RX_FDDRC_THRD_3_2 +258 0x5000 //RX_FDDRC_THRD_3_3 +259 0x4000 //RX_FDDRC_SLANT_0_0 +260 0x4000 //RX_FDDRC_SLANT_0_1 +261 0x4000 //RX_FDDRC_SLANT_0_2 +262 0x4000 //RX_FDDRC_SLANT_0_3 +263 0x7FFF //RX_FDDRC_SLANT_1_0 +264 0x7FFF //RX_FDDRC_SLANT_1_1 +265 0x7FFF //RX_FDDRC_SLANT_1_2 +266 0x7FFF //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +286 0x0014 //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 +#VOL 1 +163 0x6000 //RX_TDDRC_ALPHA_UP_1 +164 0x6000 //RX_TDDRC_ALPHA_UP_2 +165 0x6000 //RX_TDDRC_ALPHA_UP_3 +166 0x1000 //RX_TDDRC_ALPHA_UP_4 +184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +190 0x7214 //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +269 0x0002 //RX_TDDRC_THRD_0 +270 0x0004 //RX_TDDRC_THRD_1 +271 0x1A00 //RX_TDDRC_THRD_2 +272 0x1A00 //RX_TDDRC_THRD_3 +273 0x7EB8 //RX_TDDRC_SLANT_0 +274 0x2500 //RX_TDDRC_SLANT_1 +275 0x6000 //RX_TDDRC_ALPHA_UP_0 +276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x199A //RX_TDDRC_HMNC_GAIN +279 0x0001 //RX_TDDRC_SMT_FLAG +280 0x0CCD //RX_TDDRC_SMT_W +281 0x0550 //RX_TDDRC_DRC_GAIN +195 0x0020 //RX_FDEQ_SUBNUM +196 0x4848 //RX_FDEQ_GAIN_0 +197 0x4848 //RX_FDEQ_GAIN_1 +198 0x4848 //RX_FDEQ_GAIN_2 +199 0x4848 //RX_FDEQ_GAIN_3 +200 0x4848 //RX_FDEQ_GAIN_4 +201 0x4848 //RX_FDEQ_GAIN_5 +202 0x4850 //RX_FDEQ_GAIN_6 +203 0x4848 //RX_FDEQ_GAIN_7 +204 0x4860 //RX_FDEQ_GAIN_8 +205 0x7468 //RX_FDEQ_GAIN_9 +206 0x6060 //RX_FDEQ_GAIN_10 +207 0x6060 //RX_FDEQ_GAIN_11 +208 0x5C54 //RX_FDEQ_GAIN_12 +209 0x5450 //RX_FDEQ_GAIN_13 +210 0x5050 //RX_FDEQ_GAIN_14 +211 0x5860 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0202 //RX_FDEQ_BIN_0 +221 0x0203 //RX_FDEQ_BIN_1 +222 0x0303 //RX_FDEQ_BIN_2 +223 0x0304 //RX_FDEQ_BIN_3 +224 0x0404 //RX_FDEQ_BIN_4 +225 0x0308 //RX_FDEQ_BIN_5 +226 0x0808 //RX_FDEQ_BIN_6 +227 0x090A //RX_FDEQ_BIN_7 +228 0x0B0C //RX_FDEQ_BIN_8 +229 0x0D0E //RX_FDEQ_BIN_9 +230 0x1013 //RX_FDEQ_BIN_10 +231 0x1719 //RX_FDEQ_BIN_11 +232 0x1B1E //RX_FDEQ_BIN_12 +233 0x1E1E //RX_FDEQ_BIN_13 +234 0x1E28 //RX_FDEQ_BIN_14 +235 0x282C //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x4000 //RX_FDEQ_RESRV_0 +245 0x0320 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0035 //RX_FDDRC_BAND_MARGIN_1 +248 0x00D5 //RX_FDDRC_BAND_MARGIN_2 +249 0x0120 //RX_FDDRC_BAND_MARGIN_3 +250 0x0004 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x2000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x2000 //RX_FDDRC_THRD_3_2 +258 0x5000 //RX_FDDRC_THRD_3_3 +259 0x4000 //RX_FDDRC_SLANT_0_0 +260 0x4000 //RX_FDDRC_SLANT_0_1 +261 0x4000 //RX_FDDRC_SLANT_0_2 +262 0x4000 //RX_FDDRC_SLANT_0_3 +263 0x7FFF //RX_FDDRC_SLANT_1_0 +264 0x7FFF //RX_FDDRC_SLANT_1_1 +265 0x7FFF //RX_FDDRC_SLANT_1_2 +266 0x7FFF //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +286 0x001D //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 +#VOL 2 +163 0x6000 //RX_TDDRC_ALPHA_UP_1 +164 0x6000 //RX_TDDRC_ALPHA_UP_2 +165 0x6000 //RX_TDDRC_ALPHA_UP_3 +166 0x1000 //RX_TDDRC_ALPHA_UP_4 +184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +190 0x7214 //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +269 0x0002 //RX_TDDRC_THRD_0 +270 0x0004 //RX_TDDRC_THRD_1 +271 0x1A00 //RX_TDDRC_THRD_2 +272 0x1A00 //RX_TDDRC_THRD_3 +273 0x7EB8 //RX_TDDRC_SLANT_0 +274 0x2500 //RX_TDDRC_SLANT_1 +275 0x6000 //RX_TDDRC_ALPHA_UP_0 +276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x199A //RX_TDDRC_HMNC_GAIN +279 0x0001 //RX_TDDRC_SMT_FLAG +280 0x0CCD //RX_TDDRC_SMT_W +281 0x0550 //RX_TDDRC_DRC_GAIN +195 0x0020 //RX_FDEQ_SUBNUM +196 0x4848 //RX_FDEQ_GAIN_0 +197 0x4848 //RX_FDEQ_GAIN_1 +198 0x4848 //RX_FDEQ_GAIN_2 +199 0x4848 //RX_FDEQ_GAIN_3 +200 0x4848 //RX_FDEQ_GAIN_4 +201 0x4848 //RX_FDEQ_GAIN_5 +202 0x4850 //RX_FDEQ_GAIN_6 +203 0x4848 //RX_FDEQ_GAIN_7 +204 0x4860 //RX_FDEQ_GAIN_8 +205 0x7468 //RX_FDEQ_GAIN_9 +206 0x6060 //RX_FDEQ_GAIN_10 +207 0x6060 //RX_FDEQ_GAIN_11 +208 0x5C54 //RX_FDEQ_GAIN_12 +209 0x5450 //RX_FDEQ_GAIN_13 +210 0x5050 //RX_FDEQ_GAIN_14 +211 0x5860 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0202 //RX_FDEQ_BIN_0 +221 0x0203 //RX_FDEQ_BIN_1 +222 0x0303 //RX_FDEQ_BIN_2 +223 0x0304 //RX_FDEQ_BIN_3 +224 0x0404 //RX_FDEQ_BIN_4 +225 0x0308 //RX_FDEQ_BIN_5 +226 0x0808 //RX_FDEQ_BIN_6 +227 0x090A //RX_FDEQ_BIN_7 +228 0x0B0C //RX_FDEQ_BIN_8 +229 0x0D0E //RX_FDEQ_BIN_9 +230 0x1013 //RX_FDEQ_BIN_10 +231 0x1719 //RX_FDEQ_BIN_11 +232 0x1B1E //RX_FDEQ_BIN_12 +233 0x1E1E //RX_FDEQ_BIN_13 +234 0x1E28 //RX_FDEQ_BIN_14 +235 0x282C //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x4000 //RX_FDEQ_RESRV_0 +245 0x0320 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0035 //RX_FDDRC_BAND_MARGIN_1 +248 0x00D5 //RX_FDDRC_BAND_MARGIN_2 +249 0x0120 //RX_FDDRC_BAND_MARGIN_3 +250 0x0004 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x2000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x2000 //RX_FDDRC_THRD_3_2 +258 0x5000 //RX_FDDRC_THRD_3_3 +259 0x4000 //RX_FDDRC_SLANT_0_0 +260 0x4000 //RX_FDDRC_SLANT_0_1 +261 0x4000 //RX_FDDRC_SLANT_0_2 +262 0x4000 //RX_FDDRC_SLANT_0_3 +263 0x7FFF //RX_FDDRC_SLANT_1_0 +264 0x7FFF //RX_FDDRC_SLANT_1_1 +265 0x7FFF //RX_FDDRC_SLANT_1_2 +266 0x7FFF //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +286 0x0029 //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 +#VOL 3 +163 0x6000 //RX_TDDRC_ALPHA_UP_1 +164 0x6000 //RX_TDDRC_ALPHA_UP_2 +165 0x6000 //RX_TDDRC_ALPHA_UP_3 +166 0x1000 //RX_TDDRC_ALPHA_UP_4 +184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +190 0x7214 //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +269 0x0002 //RX_TDDRC_THRD_0 +270 0x0004 //RX_TDDRC_THRD_1 +271 0x1A00 //RX_TDDRC_THRD_2 +272 0x1A00 //RX_TDDRC_THRD_3 +273 0x7EB8 //RX_TDDRC_SLANT_0 +274 0x2500 //RX_TDDRC_SLANT_1 +275 0x6000 //RX_TDDRC_ALPHA_UP_0 +276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x199A //RX_TDDRC_HMNC_GAIN +279 0x0001 //RX_TDDRC_SMT_FLAG +280 0x0CCD //RX_TDDRC_SMT_W +281 0x0550 //RX_TDDRC_DRC_GAIN +195 0x0020 //RX_FDEQ_SUBNUM +196 0x4848 //RX_FDEQ_GAIN_0 +197 0x4848 //RX_FDEQ_GAIN_1 +198 0x4848 //RX_FDEQ_GAIN_2 +199 0x4848 //RX_FDEQ_GAIN_3 +200 0x4848 //RX_FDEQ_GAIN_4 +201 0x4848 //RX_FDEQ_GAIN_5 +202 0x4850 //RX_FDEQ_GAIN_6 +203 0x4848 //RX_FDEQ_GAIN_7 +204 0x4860 //RX_FDEQ_GAIN_8 +205 0x7468 //RX_FDEQ_GAIN_9 +206 0x6060 //RX_FDEQ_GAIN_10 +207 0x6060 //RX_FDEQ_GAIN_11 +208 0x5C54 //RX_FDEQ_GAIN_12 +209 0x5450 //RX_FDEQ_GAIN_13 +210 0x5050 //RX_FDEQ_GAIN_14 +211 0x5860 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0202 //RX_FDEQ_BIN_0 +221 0x0203 //RX_FDEQ_BIN_1 +222 0x0303 //RX_FDEQ_BIN_2 +223 0x0304 //RX_FDEQ_BIN_3 +224 0x0404 //RX_FDEQ_BIN_4 +225 0x0308 //RX_FDEQ_BIN_5 +226 0x0808 //RX_FDEQ_BIN_6 +227 0x090A //RX_FDEQ_BIN_7 +228 0x0B0C //RX_FDEQ_BIN_8 +229 0x0D0E //RX_FDEQ_BIN_9 +230 0x1013 //RX_FDEQ_BIN_10 +231 0x1719 //RX_FDEQ_BIN_11 +232 0x1B1E //RX_FDEQ_BIN_12 +233 0x1E1E //RX_FDEQ_BIN_13 +234 0x1E28 //RX_FDEQ_BIN_14 +235 0x282C //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x4000 //RX_FDEQ_RESRV_0 +245 0x0320 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0035 //RX_FDDRC_BAND_MARGIN_1 +248 0x00D5 //RX_FDDRC_BAND_MARGIN_2 +249 0x0120 //RX_FDDRC_BAND_MARGIN_3 +250 0x0004 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x2000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x2000 //RX_FDDRC_THRD_3_2 +258 0x5000 //RX_FDDRC_THRD_3_3 +259 0x4000 //RX_FDDRC_SLANT_0_0 +260 0x4000 //RX_FDDRC_SLANT_0_1 +261 0x4000 //RX_FDDRC_SLANT_0_2 +262 0x4000 //RX_FDDRC_SLANT_0_3 +263 0x7FFF //RX_FDDRC_SLANT_1_0 +264 0x7FFF //RX_FDDRC_SLANT_1_1 +265 0x7FFF //RX_FDDRC_SLANT_1_2 +266 0x7FFF //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +286 0x0039 //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 +#VOL 4 +163 0x6000 //RX_TDDRC_ALPHA_UP_1 +164 0x6000 //RX_TDDRC_ALPHA_UP_2 +165 0x6000 //RX_TDDRC_ALPHA_UP_3 +166 0x1000 //RX_TDDRC_ALPHA_UP_4 +184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +190 0x7214 //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +269 0x0002 //RX_TDDRC_THRD_0 +270 0x0004 //RX_TDDRC_THRD_1 +271 0x1A00 //RX_TDDRC_THRD_2 +272 0x1A00 //RX_TDDRC_THRD_3 +273 0x7EB8 //RX_TDDRC_SLANT_0 +274 0x2500 //RX_TDDRC_SLANT_1 +275 0x6000 //RX_TDDRC_ALPHA_UP_0 +276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x199A //RX_TDDRC_HMNC_GAIN +279 0x0001 //RX_TDDRC_SMT_FLAG +280 0x0CCD //RX_TDDRC_SMT_W +281 0x0550 //RX_TDDRC_DRC_GAIN +195 0x0020 //RX_FDEQ_SUBNUM +196 0x4848 //RX_FDEQ_GAIN_0 +197 0x4848 //RX_FDEQ_GAIN_1 +198 0x4848 //RX_FDEQ_GAIN_2 +199 0x4848 //RX_FDEQ_GAIN_3 +200 0x5454 //RX_FDEQ_GAIN_4 +201 0x7C54 //RX_FDEQ_GAIN_5 +202 0x4850 //RX_FDEQ_GAIN_6 +203 0x4848 //RX_FDEQ_GAIN_7 +204 0x4860 //RX_FDEQ_GAIN_8 +205 0x7468 //RX_FDEQ_GAIN_9 +206 0x6060 //RX_FDEQ_GAIN_10 +207 0x6060 //RX_FDEQ_GAIN_11 +208 0x5C54 //RX_FDEQ_GAIN_12 +209 0x5450 //RX_FDEQ_GAIN_13 +210 0x5050 //RX_FDEQ_GAIN_14 +211 0x5860 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0202 //RX_FDEQ_BIN_0 +221 0x0203 //RX_FDEQ_BIN_1 +222 0x0303 //RX_FDEQ_BIN_2 +223 0x0304 //RX_FDEQ_BIN_3 +224 0x0404 //RX_FDEQ_BIN_4 +225 0x0308 //RX_FDEQ_BIN_5 +226 0x0808 //RX_FDEQ_BIN_6 +227 0x090A //RX_FDEQ_BIN_7 +228 0x0B0C //RX_FDEQ_BIN_8 +229 0x0D0E //RX_FDEQ_BIN_9 +230 0x1013 //RX_FDEQ_BIN_10 +231 0x1719 //RX_FDEQ_BIN_11 +232 0x1B1E //RX_FDEQ_BIN_12 +233 0x1E1E //RX_FDEQ_BIN_13 +234 0x1E28 //RX_FDEQ_BIN_14 +235 0x282C //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x4000 //RX_FDEQ_RESRV_0 +245 0x0320 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0035 //RX_FDDRC_BAND_MARGIN_1 +248 0x00D5 //RX_FDDRC_BAND_MARGIN_2 +249 0x0120 //RX_FDDRC_BAND_MARGIN_3 +250 0x0004 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x2000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x2000 //RX_FDDRC_THRD_3_2 +258 0x5000 //RX_FDDRC_THRD_3_3 +259 0x4000 //RX_FDDRC_SLANT_0_0 +260 0x4000 //RX_FDDRC_SLANT_0_1 +261 0x4000 //RX_FDDRC_SLANT_0_2 +262 0x4000 //RX_FDDRC_SLANT_0_3 +263 0x7FFF //RX_FDDRC_SLANT_1_0 +264 0x7FFF //RX_FDDRC_SLANT_1_1 +265 0x7FFF //RX_FDDRC_SLANT_1_2 +266 0x7FFF //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +286 0x005F //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 +#VOL 5 +163 0x6000 //RX_TDDRC_ALPHA_UP_1 +164 0x6000 //RX_TDDRC_ALPHA_UP_2 +165 0x6000 //RX_TDDRC_ALPHA_UP_3 +166 0x1000 //RX_TDDRC_ALPHA_UP_4 +184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +190 0x7214 //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +269 0x0002 //RX_TDDRC_THRD_0 +270 0x0004 //RX_TDDRC_THRD_1 +271 0x1A00 //RX_TDDRC_THRD_2 +272 0x1A00 //RX_TDDRC_THRD_3 +273 0x7EB8 //RX_TDDRC_SLANT_0 +274 0x2500 //RX_TDDRC_SLANT_1 +275 0x6000 //RX_TDDRC_ALPHA_UP_0 +276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x199A //RX_TDDRC_HMNC_GAIN +279 0x0001 //RX_TDDRC_SMT_FLAG +280 0x0CCD //RX_TDDRC_SMT_W +281 0x0550 //RX_TDDRC_DRC_GAIN +195 0x0020 //RX_FDEQ_SUBNUM +196 0x4848 //RX_FDEQ_GAIN_0 +197 0x4848 //RX_FDEQ_GAIN_1 +198 0x4848 //RX_FDEQ_GAIN_2 +199 0x4848 //RX_FDEQ_GAIN_3 +200 0x5454 //RX_FDEQ_GAIN_4 +201 0x7C54 //RX_FDEQ_GAIN_5 +202 0x4850 //RX_FDEQ_GAIN_6 +203 0x4848 //RX_FDEQ_GAIN_7 +204 0x4860 //RX_FDEQ_GAIN_8 +205 0x7468 //RX_FDEQ_GAIN_9 +206 0x6060 //RX_FDEQ_GAIN_10 +207 0x6060 //RX_FDEQ_GAIN_11 +208 0x5C54 //RX_FDEQ_GAIN_12 +209 0x5450 //RX_FDEQ_GAIN_13 +210 0x5050 //RX_FDEQ_GAIN_14 +211 0x5860 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0202 //RX_FDEQ_BIN_0 +221 0x0203 //RX_FDEQ_BIN_1 +222 0x0303 //RX_FDEQ_BIN_2 +223 0x0304 //RX_FDEQ_BIN_3 +224 0x0404 //RX_FDEQ_BIN_4 +225 0x0308 //RX_FDEQ_BIN_5 +226 0x0808 //RX_FDEQ_BIN_6 +227 0x090A //RX_FDEQ_BIN_7 +228 0x0B0C //RX_FDEQ_BIN_8 +229 0x0D0E //RX_FDEQ_BIN_9 +230 0x1013 //RX_FDEQ_BIN_10 +231 0x1719 //RX_FDEQ_BIN_11 +232 0x1B1E //RX_FDEQ_BIN_12 +233 0x1E1E //RX_FDEQ_BIN_13 +234 0x1E28 //RX_FDEQ_BIN_14 +235 0x282C //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x4000 //RX_FDEQ_RESRV_0 +245 0x0320 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0035 //RX_FDDRC_BAND_MARGIN_1 +248 0x00D5 //RX_FDDRC_BAND_MARGIN_2 +249 0x0120 //RX_FDDRC_BAND_MARGIN_3 +250 0x0004 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x2000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x2000 //RX_FDDRC_THRD_3_2 +258 0x5000 //RX_FDDRC_THRD_3_3 +259 0x4000 //RX_FDDRC_SLANT_0_0 +260 0x4000 //RX_FDDRC_SLANT_0_1 +261 0x4000 //RX_FDDRC_SLANT_0_2 +262 0x4000 //RX_FDDRC_SLANT_0_3 +263 0x7FFF //RX_FDDRC_SLANT_1_0 +264 0x7FFF //RX_FDDRC_SLANT_1_1 +265 0x7FFF //RX_FDDRC_SLANT_1_2 +266 0x7FFF //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +286 0x008E //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 +#VOL 6 +163 0x6000 //RX_TDDRC_ALPHA_UP_1 +164 0x6000 //RX_TDDRC_ALPHA_UP_2 +165 0x6000 //RX_TDDRC_ALPHA_UP_3 +166 0x1000 //RX_TDDRC_ALPHA_UP_4 +184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +190 0x7214 //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +269 0x0002 //RX_TDDRC_THRD_0 +270 0x0004 //RX_TDDRC_THRD_1 +271 0x1A00 //RX_TDDRC_THRD_2 +272 0x1A00 //RX_TDDRC_THRD_3 +273 0x7EB8 //RX_TDDRC_SLANT_0 +274 0x2500 //RX_TDDRC_SLANT_1 +275 0x6000 //RX_TDDRC_ALPHA_UP_0 +276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x199A //RX_TDDRC_HMNC_GAIN +279 0x0001 //RX_TDDRC_SMT_FLAG +280 0x0CCD //RX_TDDRC_SMT_W +281 0x0550 //RX_TDDRC_DRC_GAIN +195 0x0020 //RX_FDEQ_SUBNUM +196 0x4848 //RX_FDEQ_GAIN_0 +197 0x4848 //RX_FDEQ_GAIN_1 +198 0x4848 //RX_FDEQ_GAIN_2 +199 0x4848 //RX_FDEQ_GAIN_3 +200 0x5454 //RX_FDEQ_GAIN_4 +201 0x7C54 //RX_FDEQ_GAIN_5 +202 0x4850 //RX_FDEQ_GAIN_6 +203 0x4848 //RX_FDEQ_GAIN_7 +204 0x4860 //RX_FDEQ_GAIN_8 +205 0x7468 //RX_FDEQ_GAIN_9 +206 0x6060 //RX_FDEQ_GAIN_10 +207 0x6060 //RX_FDEQ_GAIN_11 +208 0x5C54 //RX_FDEQ_GAIN_12 +209 0x5450 //RX_FDEQ_GAIN_13 +210 0x5050 //RX_FDEQ_GAIN_14 +211 0x5860 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0202 //RX_FDEQ_BIN_0 +221 0x0203 //RX_FDEQ_BIN_1 +222 0x0303 //RX_FDEQ_BIN_2 +223 0x0304 //RX_FDEQ_BIN_3 +224 0x0404 //RX_FDEQ_BIN_4 +225 0x0308 //RX_FDEQ_BIN_5 +226 0x0808 //RX_FDEQ_BIN_6 +227 0x090A //RX_FDEQ_BIN_7 +228 0x0B0C //RX_FDEQ_BIN_8 +229 0x0D0E //RX_FDEQ_BIN_9 +230 0x1013 //RX_FDEQ_BIN_10 +231 0x1719 //RX_FDEQ_BIN_11 +232 0x1B1E //RX_FDEQ_BIN_12 +233 0x1E1E //RX_FDEQ_BIN_13 +234 0x1E28 //RX_FDEQ_BIN_14 +235 0x282C //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x4000 //RX_FDEQ_RESRV_0 +245 0x0320 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0035 //RX_FDDRC_BAND_MARGIN_1 +248 0x00D5 //RX_FDDRC_BAND_MARGIN_2 +249 0x0120 //RX_FDDRC_BAND_MARGIN_3 +250 0x0004 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x2000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x2000 //RX_FDDRC_THRD_3_2 +258 0x5000 //RX_FDDRC_THRD_3_3 +259 0x4000 //RX_FDDRC_SLANT_0_0 +260 0x4000 //RX_FDDRC_SLANT_0_1 +261 0x4000 //RX_FDDRC_SLANT_0_2 +262 0x4000 //RX_FDDRC_SLANT_0_3 +263 0x7FFF //RX_FDDRC_SLANT_1_0 +264 0x7FFF //RX_FDDRC_SLANT_1_1 +265 0x7FFF //RX_FDDRC_SLANT_1_2 +266 0x7FFF //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +286 0x0100 //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 #CASE_NAME HANDSFREE-HANDSFREE-VOICE_GENERIC-FB -#PARAM_TYPE TX+RX -#TOTAL_CUSTOM_STEP 7 +#PARAM_MODE FULL +#PARAM_TYPE TX+2RX +#TOTAL_CUSTOM_STEP 7+7 #TX 0 0x0001 //TX_OPERATION_MODE_0 1 0x0001 //TX_OPERATION_MODE_1 @@ -10776,11 +16279,11 @@ 248 0xF800 //TX_THR_SN_EST_6 249 0xF800 //TX_THR_SN_EST_7 250 0x0100 //TX_DELTA_THR_SN_EST_0 -251 0x0200 //TX_DELTA_THR_SN_EST_1 -252 0x0100 //TX_DELTA_THR_SN_EST_2 -253 0x0200 //TX_DELTA_THR_SN_EST_3 +251 0x0100 //TX_DELTA_THR_SN_EST_1 +252 0x0200 //TX_DELTA_THR_SN_EST_2 +253 0x0100 //TX_DELTA_THR_SN_EST_3 254 0x0100 //TX_DELTA_THR_SN_EST_4 -255 0x0100 //TX_DELTA_THR_SN_EST_5 +255 0x0200 //TX_DELTA_THR_SN_EST_5 256 0x0200 //TX_DELTA_THR_SN_EST_6 257 0x0200 //TX_DELTA_THR_SN_EST_7 258 0x4000 //TX_LAMBDA_NN_EST_0 @@ -10808,11 +16311,11 @@ 280 0x1000 //TX_B_POST_FLT_1 281 0x0010 //TX_NS_LVL_CTRL_0 282 0x0014 //TX_NS_LVL_CTRL_1 -283 0x0014 //TX_NS_LVL_CTRL_2 -284 0x0018 //TX_NS_LVL_CTRL_3 -285 0x0016 //TX_NS_LVL_CTRL_4 -286 0x0014 //TX_NS_LVL_CTRL_5 -287 0x0011 //TX_NS_LVL_CTRL_6 +283 0x0018 //TX_NS_LVL_CTRL_2 +284 0x0016 //TX_NS_LVL_CTRL_3 +285 0x0014 //TX_NS_LVL_CTRL_4 +286 0x0011 //TX_NS_LVL_CTRL_5 +287 0x0014 //TX_NS_LVL_CTRL_6 288 0x0011 //TX_NS_LVL_CTRL_7 289 0x000F //TX_MIN_GAIN_S_0 290 0x0010 //TX_MIN_GAIN_S_1 @@ -10830,8 +16333,8 @@ 302 0x4000 //TX_SNRI_SUP_2 303 0x4000 //TX_SNRI_SUP_3 304 0x4000 //TX_SNRI_SUP_4 -305 0x4000 //TX_SNRI_SUP_5 -306 0x50C0 //TX_SNRI_SUP_6 +305 0x50C0 //TX_SNRI_SUP_5 +306 0x4000 //TX_SNRI_SUP_6 307 0x7FFF //TX_SNRI_SUP_7 308 0x7FFF //TX_THR_LFNS 309 0x0018 //TX_G_LFNS @@ -10840,19 +16343,19 @@ 312 0x7FFF //TX_A_POST_FILT_0 313 0x2000 //TX_A_POST_FILT_1 314 0x5000 //TX_A_POST_FILT_S_0 -315 0x6000 //TX_A_POST_FILT_S_1 -316 0x4C00 //TX_A_POST_FILT_S_2 -317 0x4000 //TX_A_POST_FILT_S_3 -318 0x6000 //TX_A_POST_FILT_S_4 -319 0x4000 //TX_A_POST_FILT_S_5 -320 0x5000 //TX_A_POST_FILT_S_6 +315 0x4C00 //TX_A_POST_FILT_S_1 +316 0x4000 //TX_A_POST_FILT_S_2 +317 0x6000 //TX_A_POST_FILT_S_3 +318 0x4000 //TX_A_POST_FILT_S_4 +319 0x5000 //TX_A_POST_FILT_S_5 +320 0x6000 //TX_A_POST_FILT_S_6 321 0x7000 //TX_A_POST_FILT_S_7 322 0x2000 //TX_B_POST_FILT_0 -323 0x1000 //TX_B_POST_FILT_1 +323 0x2000 //TX_B_POST_FILT_1 324 0x2000 //TX_B_POST_FILT_2 -325 0x2000 //TX_B_POST_FILT_3 +325 0x4000 //TX_B_POST_FILT_3 326 0x4000 //TX_B_POST_FILT_4 -327 0x4000 //TX_B_POST_FILT_5 +327 0x1000 //TX_B_POST_FILT_5 328 0x1000 //TX_B_POST_FILT_6 329 0x2000 //TX_B_POST_FILT_7 330 0x4000 //TX_B_LESSCUT_RTO_S_0 @@ -10860,14 +16363,14 @@ 332 0x7FFF //TX_B_LESSCUT_RTO_S_2 333 0x7FFF //TX_B_LESSCUT_RTO_S_3 334 0x7FFF //TX_B_LESSCUT_RTO_S_4 -335 0x7FFF //TX_B_LESSCUT_RTO_S_5 -336 0x6000 //TX_B_LESSCUT_RTO_S_6 +335 0x6000 //TX_B_LESSCUT_RTO_S_5 +336 0x7FFF //TX_B_LESSCUT_RTO_S_6 337 0x7FFF //TX_B_LESSCUT_RTO_S_7 338 0x7C00 //TX_LAMBDA_PFILT 339 0x7C00 //TX_LAMBDA_PFILT_S_0 340 0x7C00 //TX_LAMBDA_PFILT_S_1 -341 0x7C00 //TX_LAMBDA_PFILT_S_2 -342 0x7A00 //TX_LAMBDA_PFILT_S_3 +341 0x7A00 //TX_LAMBDA_PFILT_S_2 +342 0x7C00 //TX_LAMBDA_PFILT_S_3 343 0x7C00 //TX_LAMBDA_PFILT_S_4 344 0x7C00 //TX_LAMBDA_PFILT_S_5 345 0x7C00 //TX_LAMBDA_PFILT_S_6 @@ -10905,10 +16408,10 @@ 377 0x7FFF //TX_NOISE_TH_5_4 378 0x2710 //TX_NOISE_TH_6 379 0x0033 //TX_MINENOISE_TH -380 0x4000 //TX_MINENOISE_MIC0_TH_MTS -381 0xFFEE //TX_MINENOISE_MIC0_TH_EXP -382 0x6000 //TX_MINENOISE_MIC0_S_TH_MTS -383 0xFFF3 //TX_MINENOISE_MIC0_S_TH_EXP +380 0xD508 //TX_MORENS_TFMASK_TH +381 0x0001 //TX_DRC_QUIET_FLOOR +382 0x7999 //TX_RATIODTL_CUT_TH +383 0x0119 //TX_DT_CUT_K1 384 0x0666 //TX_OUT_ENER_S_TH_CLEAN 385 0x0666 //TX_OUT_ENER_S_TH_LESSCLEAN 386 0x0333 //TX_OUT_ENER_S_TH_NOISY @@ -10916,15 +16419,15 @@ 388 0x0333 //TX_OUT_ENER_TH_SPEECH 389 0x2000 //TX_SN_NPB_GAIN 390 0x0000 //TX_NN_NPB_GAIN -391 0x0000 //TX_CSX_ALPHA_0 -392 0x0000 //TX_CSX_ALPHA_1 -393 0x0000 //TX_CSX_ALPHA_2 -394 0x0000 //TX_CSX_ALPHA_3 -395 0x0800 //TX_MU_ARSP_EST -396 0x00C8 //TX_P_OUTBEAM_MIN_TH +391 0x7FFF //TX_POST_MASK_SUP_HSNE +392 0x1388 //TX_TAIL_DET_TH +393 0x4000 //TX_B_LESSCUT_RTO_WTA +394 0x0000 //TX_MEL_G_R +395 0x0080 //TX_SUPHIGH_TH +396 0x0000 //TX_MASK_G_R 397 0x0002 //TX_EXTRA_NS_L -398 0x0800 //TX_EXTRA_NS_A -399 0x0005 //TX_VR_NOISE_FLOOR_TH +398 0x1800 //TX_C_POST_FLT_MASK +399 0x4000 //TX_A_POST_FLT_WNS 400 0x0148 //TX_MIN_G_LOW300HZ 401 0x0002 //TX_MAXLEVEL_CNG 402 0x00B4 //TX_STN_NOISE_TH @@ -11039,16 +16542,16 @@ 511 0x6666 //TX_MIC_TO_BFGAIN 512 0x0000 //TX_MICTOBFGAIN0 513 0x0000 //TX_FASTMUE_TH -514 0x0000 //TX_DERVB_LEN_0 -515 0x0000 //TX_DERVB_LEN_1 -516 0x0000 //TX_RHO_DERVB -517 0x0000 //TX_MIC_INDX_DERVB -518 0x0000 //TX_MU_DERVB -519 0x0000 //TX_DR_RESRV_0 -520 0x0000 //TX_DR_RESRV_1 -521 0x0000 //TX_DR_RESRV_2 -522 0x0000 //TX_DR_RESRV_3 -523 0x0000 //TX_DR_RESRV_4 +514 0x3000 //TX_DEREVERB_LF_MU +515 0x34CD //TX_DEREVERB_HF_MU +516 0x0007 //TX_DEREVERB_DELAY +517 0x0004 //TX_DEREVERB_COEF_LEN +518 0x0003 //TX_DEREVERB_DNR +519 0x0000 //TX_DEREVERB_ALPHA +520 0x0000 //TX_DEREVERB_BETA +521 0x3A98 //TX_GSC_RTOL_TH +522 0x3A98 //TX_GSC_RTOH_TH +523 0x7E2C //TX_WIDE2_MEANHTH 524 0x0000 //TX_DR_RESRV_5 525 0x0000 //TX_DR_RESRV_6 526 0x0000 //TX_DR_RESRV_7 @@ -11422,6 +16925,71 @@ 894 0xC000 //TX_FASTNS_SSA_THHFL 895 0xCCCC //TX_FASTNS_SSA_THLFH 896 0xD999 //TX_FASTNS_SSA_THHFH +897 0x2339 //TX_SENDFUNC_REG_MICMUTE +898 0x0021 //TX_SENDFUNC_REG_MICMUTE1 +899 0x02BC //TX_MICMUTE_RATIO_THR +900 0x0140 //TX_MICMUTE_AMP_THR +901 0x0004 //TX_MICMUTE_HPF_IND +902 0x00C0 //TX_MICMUTE_LOG_EYR_TH +903 0x0008 //TX_MICMUTE_CVG_TIME +904 0x0008 //TX_MICMUTE_RELEASE_TIME +905 0x01FE //TX_MIC_VOLUME_MIC0MUTE +906 0x0020 //TX_MICMUTE_EPD_OFFSET_0 +907 0x001E //TX_MICMUTE_FRQ_AEC_L +908 0x7999 //TX_MICMUTE_EAD_THR +909 0x7FFF //TX_MICMUTE_LAMBDA_CB_NLE +910 0x7FFF //TX_MICMUTE_LAMBDA_RE_EST +911 0x4000 //TX_DTD_THR1_MICMUTE_0 +912 0x7000 //TX_DTD_THR1_MICMUTE_1 +913 0x7FFF //TX_DTD_THR1_MICMUTE_2 +914 0x7FFF //TX_DTD_THR1_MICMUTE_3 +915 0x6CCC //TX_DTD_THR2_MICMUTE_0 +916 0x0400 //TX_MICMUTE_MIN_EQ_RE_EST_0 +917 0x0400 //TX_MICMUTE_MIN_EQ_RE_EST_1 +918 0x1000 //TX_MICMUTE_MIN_EQ_RE_EST_2 +919 0x7FFF //TX_MICMUTE_MIN_EQ_RE_EST_3 +920 0x7FFF //TX_MICMUTE_MIN_EQ_RE_EST_4 +921 0x4000 //TX_MICMUTE_C_POST_FLT +922 0x03E8 //TX_MICMUTE_DT_CUT_K +923 0x0001 //TX_MICMUTE_DT_CUT_THR +924 0x03E8 //TX_MICMUTE_DT_CUT_K2 +925 0x0001 //TX_MICMUTE_DT_CUT_THR2 +926 0x0064 //TX_MICMUTE_DT2_HOLD_N +927 0x1000 //TX_MICMUTE_RATIODTH_THCUT +928 0x1000 //TX_MICMUTE_B_POST_FLT_ECHOL +929 0x7FFF //TX_MICMUTE_B_POST_FLT_ECHOH +930 0x0400 //TX_MICMUTE_C_POST_FLT_MASK +931 0x7999 //TX_MICMUTE_RATIODTL_CUT_TH +932 0x0258 //TX_MICMUTE_DT_CUT_K1 +933 0x0800 //TX_MICMUTE_N2_SN_EST +934 0xFC00 //TX_MICMUTE_THR_SN_EST_0 +935 0x001C //TX_MICMUTE_MIN_G_CTRL_0 +936 0x6000 //TX_MICMUTE_A_POST_FILT_S_0 +937 0x7000 //TX_MICMUTE_B_POST_FILT_0 +938 0x2710 //TX_MIC1RUB_AMP_THR +939 0x0010 //TX_MIC1MUTE_RATIO_THR +940 0x0450 //TX_MIC1MUTE_AMP_THR +941 0x0008 //TX_MIC1MUTE_CVG_TIME +942 0x0008 //TX_MIC1MUTE_RELEASE_TIME +943 0x0000 //TX_AMS_RESRV_01 +944 0x0000 //TX_AMS_RESRV_02 +945 0x0000 //TX_AMS_RESRV_03 +946 0x0000 //TX_AMS_RESRV_04 +947 0x0000 //TX_AMS_RESRV_05 +948 0x0000 //TX_AMS_RESRV_06 +949 0x0000 //TX_AMS_RESRV_07 +950 0x0000 //TX_AMS_RESRV_08 +951 0x0000 //TX_AMS_RESRV_09 +952 0x0000 //TX_AMS_RESRV_10 +953 0x0000 //TX_AMS_RESRV_11 +954 0x0000 //TX_AMS_RESRV_12 +955 0x0000 //TX_AMS_RESRV_13 +956 0x0000 //TX_AMS_RESRV_14 +957 0x0000 //TX_AMS_RESRV_15 +958 0x0000 //TX_AMS_RESRV_16 +959 0x0000 //TX_AMS_RESRV_17 +960 0x0000 //TX_AMS_RESRV_18 +961 0x0000 //TX_AMS_RESRV_19 #RX 0 0x006C //RX_RECVFUNC_MODE_0 1 0x0000 //RX_RECVFUNC_MODE_1 @@ -12273,4 +17841,11535 @@ 110 0x0000 //RX_FDDRC_RESRV_0 129 0x0100 //RX_SPK_VOL 130 0x0000 //RX_VOL_RESRV_0 +#RX 2 +157 0x006C //_ +158 0x0000 //_ +159 0x0004 //_ +160 0x0004 //_ +161 0x000A //_ +162 0x0000 //_ +163 0x4000 //_ +164 0x4000 //_ +165 0x4000 //_ +166 0x4000 //_ +167 0x065B //_ +168 0x7E56 //_ +169 0x4000 //_ +170 0x7800 //_ +171 0x7000 //_ +172 0x6000 //_ +173 0x0008 //_ +174 0x0003 //_ +175 0x0100 //_ +176 0x0020 //_ +177 0x0400 //_ +178 0x000C //_ +179 0x0014 //_ +180 0xF400 //_ +181 0x7E00 //_ +182 0x000A //_ +183 0x0190 //_ +184 0x7EB8 //_ +185 0x7EB8 //_ +186 0x7EB8 //_ +187 0x0002 //_ +188 0x0800 //_ +189 0x7EB8 //_ +190 0x7FFF //_ +191 0x0800 //_ +192 0x199A //_ +193 0x0000 //_ +194 0x4000 //_ +195 0x0020 //_ +196 0x4848 //_ +197 0x4848 //_ +198 0x4848 //_ +199 0x4870 //_ +200 0x4848 //_ +201 0x4848 //_ +202 0x4850 //_ +203 0x485C //_ +204 0x5C60 //_ +205 0x685C //_ +206 0x5640 //_ +207 0x4040 //_ +208 0x5C58 //_ +209 0x5C60 //_ +210 0x6060 //_ +211 0x6060 //_ +212 0x4848 //_ +213 0x4848 //_ +214 0x4848 //_ +215 0x4848 //_ +216 0x4848 //_ +217 0x4848 //_ +218 0x4848 //_ +219 0x4848 //_ +220 0x0202 //_ +221 0x0203 //_ +222 0x0303 //_ +223 0x0402 //_ +224 0x0504 //_ +225 0x0209 //_ +226 0x0808 //_ +227 0x090A //_ +228 0x0B0C //_ +229 0x0D0E //_ +230 0x1013 //_ +231 0x1719 //_ +232 0x1B1E //_ +233 0x1E1E //_ +234 0x1E28 //_ +235 0x282C //_ +236 0x0000 //_ +237 0x0000 //_ +238 0x0000 //_ +239 0x0000 //_ +240 0x0000 //_ +241 0x0000 //_ +242 0x0000 //_ +243 0x0000 //_ +244 0x4000 //_ +245 0x0320 //_ +246 0x0018 //_ +247 0x0030 //_ +248 0x0050 //_ +249 0x0080 //_ +250 0x0004 //_ +251 0x5000 //_ +252 0x5000 //_ +253 0x2000 //_ +254 0x5000 //_ +255 0x6400 //_ +256 0x6400 //_ +257 0x2000 //_ +258 0x5000 //_ +259 0x4000 //_ +260 0x4000 //_ +261 0x4000 //_ +262 0x4000 //_ +263 0x7FFF //_ +264 0x7FFF //_ +265 0x7FFF //_ +266 0x7FFF //_ +267 0x0000 //_ +268 0x0002 //_ +269 0x0001 //_ +270 0x0002 //_ +271 0x1800 //_ +272 0x1800 //_ +273 0x6000 //_ +274 0x6E00 //_ +275 0x4000 //_ +276 0x7EB8 //_ +277 0x0000 //_ +278 0x199A //_ +279 0x0001 //_ +280 0x0CCD //_ +281 0x03C3 //_ +282 0x7C00 //_ +283 0x2000 //_ +284 0x2000 //_ +285 0x0080 //_ +286 0x0012 //_ +287 0x0000 //_ +288 0x0000 //_ +289 0x3000 //_ +290 0x3000 //_ +291 0x1800 //_ +292 0x1000 //_ +293 0x04CD //_ +294 0x0F33 //_ +295 0x7333 //_ +296 0x199A //_ +297 0x7333 //_ +298 0x0004 //_ +299 0x6CCD //_ +300 0x799A //_ +301 0x001E //_ +302 0x3000 //_ +303 0x3200 //_ +304 0x2000 //_ +305 0x2000 //_ +306 0x2000 //_ +307 0x2000 //_ +308 0x2000 //_ +309 0x2000 //_ +310 0x2000 //_ +311 0x0000 //_ +312 0x0000 //_ +313 0x0000 //_ +#VOL 0 +163 0x4000 //RX_TDDRC_ALPHA_UP_1 +164 0x4000 //RX_TDDRC_ALPHA_UP_2 +165 0x4000 //RX_TDDRC_ALPHA_UP_3 +166 0x4000 //RX_TDDRC_ALPHA_UP_4 +184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +190 0x7FFF //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +269 0x0001 //RX_TDDRC_THRD_0 +270 0x0002 //RX_TDDRC_THRD_1 +271 0x1800 //RX_TDDRC_THRD_2 +272 0x1800 //RX_TDDRC_THRD_3 +273 0x6000 //RX_TDDRC_SLANT_0 +274 0x6E00 //RX_TDDRC_SLANT_1 +275 0x4000 //RX_TDDRC_ALPHA_UP_0 +276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x199A //RX_TDDRC_HMNC_GAIN +279 0x0001 //RX_TDDRC_SMT_FLAG +280 0x0CCD //RX_TDDRC_SMT_W +281 0x03C3 //RX_TDDRC_DRC_GAIN +195 0x0020 //RX_FDEQ_SUBNUM +196 0x4848 //RX_FDEQ_GAIN_0 +197 0x4848 //RX_FDEQ_GAIN_1 +198 0x4848 //RX_FDEQ_GAIN_2 +199 0x4870 //RX_FDEQ_GAIN_3 +200 0x4848 //RX_FDEQ_GAIN_4 +201 0x4848 //RX_FDEQ_GAIN_5 +202 0x4850 //RX_FDEQ_GAIN_6 +203 0x485C //RX_FDEQ_GAIN_7 +204 0x5C60 //RX_FDEQ_GAIN_8 +205 0x685C //RX_FDEQ_GAIN_9 +206 0x5640 //RX_FDEQ_GAIN_10 +207 0x4040 //RX_FDEQ_GAIN_11 +208 0x5C58 //RX_FDEQ_GAIN_12 +209 0x5C60 //RX_FDEQ_GAIN_13 +210 0x6060 //RX_FDEQ_GAIN_14 +211 0x6060 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0202 //RX_FDEQ_BIN_0 +221 0x0203 //RX_FDEQ_BIN_1 +222 0x0303 //RX_FDEQ_BIN_2 +223 0x0402 //RX_FDEQ_BIN_3 +224 0x0504 //RX_FDEQ_BIN_4 +225 0x0209 //RX_FDEQ_BIN_5 +226 0x0808 //RX_FDEQ_BIN_6 +227 0x090A //RX_FDEQ_BIN_7 +228 0x0B0C //RX_FDEQ_BIN_8 +229 0x0D0E //RX_FDEQ_BIN_9 +230 0x1013 //RX_FDEQ_BIN_10 +231 0x1719 //RX_FDEQ_BIN_11 +232 0x1B1E //RX_FDEQ_BIN_12 +233 0x1E1E //RX_FDEQ_BIN_13 +234 0x1E28 //RX_FDEQ_BIN_14 +235 0x282C //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x4000 //RX_FDEQ_RESRV_0 +245 0x0320 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0030 //RX_FDDRC_BAND_MARGIN_1 +248 0x0050 //RX_FDDRC_BAND_MARGIN_2 +249 0x0080 //RX_FDDRC_BAND_MARGIN_3 +250 0x0004 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x2000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x2000 //RX_FDDRC_THRD_3_2 +258 0x5000 //RX_FDDRC_THRD_3_3 +259 0x4000 //RX_FDDRC_SLANT_0_0 +260 0x4000 //RX_FDDRC_SLANT_0_1 +261 0x4000 //RX_FDDRC_SLANT_0_2 +262 0x4000 //RX_FDDRC_SLANT_0_3 +263 0x7FFF //RX_FDDRC_SLANT_1_0 +264 0x7FFF //RX_FDDRC_SLANT_1_1 +265 0x7FFF //RX_FDDRC_SLANT_1_2 +266 0x7FFF //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +286 0x0012 //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 +#VOL 1 +163 0x4000 //RX_TDDRC_ALPHA_UP_1 +164 0x4000 //RX_TDDRC_ALPHA_UP_2 +165 0x4000 //RX_TDDRC_ALPHA_UP_3 +166 0x4000 //RX_TDDRC_ALPHA_UP_4 +184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +190 0x7FFF //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +269 0x0001 //RX_TDDRC_THRD_0 +270 0x0002 //RX_TDDRC_THRD_1 +271 0x1800 //RX_TDDRC_THRD_2 +272 0x1800 //RX_TDDRC_THRD_3 +273 0x6000 //RX_TDDRC_SLANT_0 +274 0x6E00 //RX_TDDRC_SLANT_1 +275 0x4000 //RX_TDDRC_ALPHA_UP_0 +276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x199A //RX_TDDRC_HMNC_GAIN +279 0x0001 //RX_TDDRC_SMT_FLAG +280 0x0CCD //RX_TDDRC_SMT_W +281 0x03C3 //RX_TDDRC_DRC_GAIN +195 0x0020 //RX_FDEQ_SUBNUM +196 0x4848 //RX_FDEQ_GAIN_0 +197 0x4848 //RX_FDEQ_GAIN_1 +198 0x4848 //RX_FDEQ_GAIN_2 +199 0x4870 //RX_FDEQ_GAIN_3 +200 0x4848 //RX_FDEQ_GAIN_4 +201 0x4848 //RX_FDEQ_GAIN_5 +202 0x4850 //RX_FDEQ_GAIN_6 +203 0x485C //RX_FDEQ_GAIN_7 +204 0x5C60 //RX_FDEQ_GAIN_8 +205 0x685C //RX_FDEQ_GAIN_9 +206 0x5640 //RX_FDEQ_GAIN_10 +207 0x4040 //RX_FDEQ_GAIN_11 +208 0x5C58 //RX_FDEQ_GAIN_12 +209 0x5C60 //RX_FDEQ_GAIN_13 +210 0x6060 //RX_FDEQ_GAIN_14 +211 0x6060 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0202 //RX_FDEQ_BIN_0 +221 0x0203 //RX_FDEQ_BIN_1 +222 0x0303 //RX_FDEQ_BIN_2 +223 0x0402 //RX_FDEQ_BIN_3 +224 0x0504 //RX_FDEQ_BIN_4 +225 0x0209 //RX_FDEQ_BIN_5 +226 0x0808 //RX_FDEQ_BIN_6 +227 0x090A //RX_FDEQ_BIN_7 +228 0x0B0C //RX_FDEQ_BIN_8 +229 0x0D0E //RX_FDEQ_BIN_9 +230 0x1013 //RX_FDEQ_BIN_10 +231 0x1719 //RX_FDEQ_BIN_11 +232 0x1B1E //RX_FDEQ_BIN_12 +233 0x1E1E //RX_FDEQ_BIN_13 +234 0x1E28 //RX_FDEQ_BIN_14 +235 0x282C //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x4000 //RX_FDEQ_RESRV_0 +245 0x0320 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0030 //RX_FDDRC_BAND_MARGIN_1 +248 0x0050 //RX_FDDRC_BAND_MARGIN_2 +249 0x0080 //RX_FDDRC_BAND_MARGIN_3 +250 0x0004 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x2000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x2000 //RX_FDDRC_THRD_3_2 +258 0x5000 //RX_FDDRC_THRD_3_3 +259 0x4000 //RX_FDDRC_SLANT_0_0 +260 0x4000 //RX_FDDRC_SLANT_0_1 +261 0x4000 //RX_FDDRC_SLANT_0_2 +262 0x4000 //RX_FDDRC_SLANT_0_3 +263 0x7FFF //RX_FDDRC_SLANT_1_0 +264 0x7FFF //RX_FDDRC_SLANT_1_1 +265 0x7FFF //RX_FDDRC_SLANT_1_2 +266 0x7FFF //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +286 0x001A //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 +#VOL 2 +163 0x4000 //RX_TDDRC_ALPHA_UP_1 +164 0x4000 //RX_TDDRC_ALPHA_UP_2 +165 0x4000 //RX_TDDRC_ALPHA_UP_3 +166 0x4000 //RX_TDDRC_ALPHA_UP_4 +184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +190 0x7FFF //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +269 0x0001 //RX_TDDRC_THRD_0 +270 0x0002 //RX_TDDRC_THRD_1 +271 0x1800 //RX_TDDRC_THRD_2 +272 0x1800 //RX_TDDRC_THRD_3 +273 0x6000 //RX_TDDRC_SLANT_0 +274 0x6E00 //RX_TDDRC_SLANT_1 +275 0x4000 //RX_TDDRC_ALPHA_UP_0 +276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x199A //RX_TDDRC_HMNC_GAIN +279 0x0001 //RX_TDDRC_SMT_FLAG +280 0x0CCD //RX_TDDRC_SMT_W +281 0x03C3 //RX_TDDRC_DRC_GAIN +195 0x0020 //RX_FDEQ_SUBNUM +196 0x4848 //RX_FDEQ_GAIN_0 +197 0x4848 //RX_FDEQ_GAIN_1 +198 0x4848 //RX_FDEQ_GAIN_2 +199 0x4870 //RX_FDEQ_GAIN_3 +200 0x4848 //RX_FDEQ_GAIN_4 +201 0x4848 //RX_FDEQ_GAIN_5 +202 0x4850 //RX_FDEQ_GAIN_6 +203 0x485C //RX_FDEQ_GAIN_7 +204 0x5C60 //RX_FDEQ_GAIN_8 +205 0x685C //RX_FDEQ_GAIN_9 +206 0x5640 //RX_FDEQ_GAIN_10 +207 0x4040 //RX_FDEQ_GAIN_11 +208 0x5C58 //RX_FDEQ_GAIN_12 +209 0x5C60 //RX_FDEQ_GAIN_13 +210 0x6060 //RX_FDEQ_GAIN_14 +211 0x6060 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0202 //RX_FDEQ_BIN_0 +221 0x0203 //RX_FDEQ_BIN_1 +222 0x0303 //RX_FDEQ_BIN_2 +223 0x0402 //RX_FDEQ_BIN_3 +224 0x0504 //RX_FDEQ_BIN_4 +225 0x0209 //RX_FDEQ_BIN_5 +226 0x0808 //RX_FDEQ_BIN_6 +227 0x090A //RX_FDEQ_BIN_7 +228 0x0B0C //RX_FDEQ_BIN_8 +229 0x0D0E //RX_FDEQ_BIN_9 +230 0x1013 //RX_FDEQ_BIN_10 +231 0x1719 //RX_FDEQ_BIN_11 +232 0x1B1E //RX_FDEQ_BIN_12 +233 0x1E1E //RX_FDEQ_BIN_13 +234 0x1E28 //RX_FDEQ_BIN_14 +235 0x282C //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x4000 //RX_FDEQ_RESRV_0 +245 0x0320 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0030 //RX_FDDRC_BAND_MARGIN_1 +248 0x0050 //RX_FDDRC_BAND_MARGIN_2 +249 0x0080 //RX_FDDRC_BAND_MARGIN_3 +250 0x0004 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x2000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x2000 //RX_FDDRC_THRD_3_2 +258 0x5000 //RX_FDDRC_THRD_3_3 +259 0x4000 //RX_FDDRC_SLANT_0_0 +260 0x4000 //RX_FDDRC_SLANT_0_1 +261 0x4000 //RX_FDDRC_SLANT_0_2 +262 0x4000 //RX_FDDRC_SLANT_0_3 +263 0x7FFF //RX_FDDRC_SLANT_1_0 +264 0x7FFF //RX_FDDRC_SLANT_1_1 +265 0x7FFF //RX_FDDRC_SLANT_1_2 +266 0x7FFF //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +286 0x0025 //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 +#VOL 3 +163 0x4000 //RX_TDDRC_ALPHA_UP_1 +164 0x4000 //RX_TDDRC_ALPHA_UP_2 +165 0x4000 //RX_TDDRC_ALPHA_UP_3 +166 0x4000 //RX_TDDRC_ALPHA_UP_4 +184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +190 0x7FFF //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +269 0x0001 //RX_TDDRC_THRD_0 +270 0x0002 //RX_TDDRC_THRD_1 +271 0x1800 //RX_TDDRC_THRD_2 +272 0x1800 //RX_TDDRC_THRD_3 +273 0x6000 //RX_TDDRC_SLANT_0 +274 0x6E00 //RX_TDDRC_SLANT_1 +275 0x4000 //RX_TDDRC_ALPHA_UP_0 +276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x199A //RX_TDDRC_HMNC_GAIN +279 0x0001 //RX_TDDRC_SMT_FLAG +280 0x0CCD //RX_TDDRC_SMT_W +281 0x03C3 //RX_TDDRC_DRC_GAIN +195 0x0020 //RX_FDEQ_SUBNUM +196 0x4848 //RX_FDEQ_GAIN_0 +197 0x4848 //RX_FDEQ_GAIN_1 +198 0x4848 //RX_FDEQ_GAIN_2 +199 0x4870 //RX_FDEQ_GAIN_3 +200 0x4848 //RX_FDEQ_GAIN_4 +201 0x4848 //RX_FDEQ_GAIN_5 +202 0x4850 //RX_FDEQ_GAIN_6 +203 0x485C //RX_FDEQ_GAIN_7 +204 0x5C60 //RX_FDEQ_GAIN_8 +205 0x685C //RX_FDEQ_GAIN_9 +206 0x5640 //RX_FDEQ_GAIN_10 +207 0x4040 //RX_FDEQ_GAIN_11 +208 0x5C58 //RX_FDEQ_GAIN_12 +209 0x5C60 //RX_FDEQ_GAIN_13 +210 0x6060 //RX_FDEQ_GAIN_14 +211 0x6060 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0202 //RX_FDEQ_BIN_0 +221 0x0203 //RX_FDEQ_BIN_1 +222 0x0303 //RX_FDEQ_BIN_2 +223 0x0402 //RX_FDEQ_BIN_3 +224 0x0504 //RX_FDEQ_BIN_4 +225 0x0209 //RX_FDEQ_BIN_5 +226 0x0808 //RX_FDEQ_BIN_6 +227 0x090A //RX_FDEQ_BIN_7 +228 0x0B0C //RX_FDEQ_BIN_8 +229 0x0D0E //RX_FDEQ_BIN_9 +230 0x1013 //RX_FDEQ_BIN_10 +231 0x1719 //RX_FDEQ_BIN_11 +232 0x1B1E //RX_FDEQ_BIN_12 +233 0x1E1E //RX_FDEQ_BIN_13 +234 0x1E28 //RX_FDEQ_BIN_14 +235 0x282C //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x4000 //RX_FDEQ_RESRV_0 +245 0x0320 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0030 //RX_FDDRC_BAND_MARGIN_1 +248 0x0050 //RX_FDDRC_BAND_MARGIN_2 +249 0x0080 //RX_FDDRC_BAND_MARGIN_3 +250 0x0004 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x2000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x2000 //RX_FDDRC_THRD_3_2 +258 0x5000 //RX_FDDRC_THRD_3_3 +259 0x4000 //RX_FDDRC_SLANT_0_0 +260 0x4000 //RX_FDDRC_SLANT_0_1 +261 0x4000 //RX_FDDRC_SLANT_0_2 +262 0x4000 //RX_FDDRC_SLANT_0_3 +263 0x7FFF //RX_FDDRC_SLANT_1_0 +264 0x7FFF //RX_FDDRC_SLANT_1_1 +265 0x7FFF //RX_FDDRC_SLANT_1_2 +266 0x7FFF //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +286 0x0034 //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 +#VOL 4 +163 0x4000 //RX_TDDRC_ALPHA_UP_1 +164 0x4000 //RX_TDDRC_ALPHA_UP_2 +165 0x4000 //RX_TDDRC_ALPHA_UP_3 +166 0x4000 //RX_TDDRC_ALPHA_UP_4 +184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +190 0x7FFF //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +269 0x0001 //RX_TDDRC_THRD_0 +270 0x0002 //RX_TDDRC_THRD_1 +271 0x1800 //RX_TDDRC_THRD_2 +272 0x1800 //RX_TDDRC_THRD_3 +273 0x6000 //RX_TDDRC_SLANT_0 +274 0x6E00 //RX_TDDRC_SLANT_1 +275 0x4000 //RX_TDDRC_ALPHA_UP_0 +276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x199A //RX_TDDRC_HMNC_GAIN +279 0x0001 //RX_TDDRC_SMT_FLAG +280 0x0CCD //RX_TDDRC_SMT_W +281 0x03C3 //RX_TDDRC_DRC_GAIN +195 0x0020 //RX_FDEQ_SUBNUM +196 0x4848 //RX_FDEQ_GAIN_0 +197 0x4848 //RX_FDEQ_GAIN_1 +198 0x4848 //RX_FDEQ_GAIN_2 +199 0x4870 //RX_FDEQ_GAIN_3 +200 0x4848 //RX_FDEQ_GAIN_4 +201 0x4848 //RX_FDEQ_GAIN_5 +202 0x4850 //RX_FDEQ_GAIN_6 +203 0x485C //RX_FDEQ_GAIN_7 +204 0x5C60 //RX_FDEQ_GAIN_8 +205 0x685C //RX_FDEQ_GAIN_9 +206 0x5640 //RX_FDEQ_GAIN_10 +207 0x4040 //RX_FDEQ_GAIN_11 +208 0x5C58 //RX_FDEQ_GAIN_12 +209 0x5C60 //RX_FDEQ_GAIN_13 +210 0x6060 //RX_FDEQ_GAIN_14 +211 0x6060 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0202 //RX_FDEQ_BIN_0 +221 0x0203 //RX_FDEQ_BIN_1 +222 0x0303 //RX_FDEQ_BIN_2 +223 0x0402 //RX_FDEQ_BIN_3 +224 0x0504 //RX_FDEQ_BIN_4 +225 0x0209 //RX_FDEQ_BIN_5 +226 0x0808 //RX_FDEQ_BIN_6 +227 0x090A //RX_FDEQ_BIN_7 +228 0x0B0C //RX_FDEQ_BIN_8 +229 0x0D0E //RX_FDEQ_BIN_9 +230 0x1013 //RX_FDEQ_BIN_10 +231 0x1719 //RX_FDEQ_BIN_11 +232 0x1B1E //RX_FDEQ_BIN_12 +233 0x1E1E //RX_FDEQ_BIN_13 +234 0x1E28 //RX_FDEQ_BIN_14 +235 0x282C //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x4000 //RX_FDEQ_RESRV_0 +245 0x0320 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0030 //RX_FDDRC_BAND_MARGIN_1 +248 0x0050 //RX_FDDRC_BAND_MARGIN_2 +249 0x0080 //RX_FDDRC_BAND_MARGIN_3 +250 0x0004 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x2000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x2000 //RX_FDDRC_THRD_3_2 +258 0x5000 //RX_FDDRC_THRD_3_3 +259 0x4000 //RX_FDDRC_SLANT_0_0 +260 0x4000 //RX_FDDRC_SLANT_0_1 +261 0x4000 //RX_FDDRC_SLANT_0_2 +262 0x4000 //RX_FDDRC_SLANT_0_3 +263 0x7FFF //RX_FDDRC_SLANT_1_0 +264 0x7FFF //RX_FDDRC_SLANT_1_1 +265 0x7FFF //RX_FDDRC_SLANT_1_2 +266 0x7FFF //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +286 0x004D //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 +#VOL 5 +163 0x4000 //RX_TDDRC_ALPHA_UP_1 +164 0x4000 //RX_TDDRC_ALPHA_UP_2 +165 0x4000 //RX_TDDRC_ALPHA_UP_3 +166 0x4000 //RX_TDDRC_ALPHA_UP_4 +184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +190 0x7FFF //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +269 0x0001 //RX_TDDRC_THRD_0 +270 0x0002 //RX_TDDRC_THRD_1 +271 0x1800 //RX_TDDRC_THRD_2 +272 0x1800 //RX_TDDRC_THRD_3 +273 0x6000 //RX_TDDRC_SLANT_0 +274 0x6E00 //RX_TDDRC_SLANT_1 +275 0x4000 //RX_TDDRC_ALPHA_UP_0 +276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x199A //RX_TDDRC_HMNC_GAIN +279 0x0001 //RX_TDDRC_SMT_FLAG +280 0x0CCD //RX_TDDRC_SMT_W +281 0x03C3 //RX_TDDRC_DRC_GAIN +195 0x0020 //RX_FDEQ_SUBNUM +196 0x4848 //RX_FDEQ_GAIN_0 +197 0x4848 //RX_FDEQ_GAIN_1 +198 0x4848 //RX_FDEQ_GAIN_2 +199 0x4870 //RX_FDEQ_GAIN_3 +200 0x4848 //RX_FDEQ_GAIN_4 +201 0x4848 //RX_FDEQ_GAIN_5 +202 0x4850 //RX_FDEQ_GAIN_6 +203 0x485C //RX_FDEQ_GAIN_7 +204 0x5C60 //RX_FDEQ_GAIN_8 +205 0x685C //RX_FDEQ_GAIN_9 +206 0x5640 //RX_FDEQ_GAIN_10 +207 0x4040 //RX_FDEQ_GAIN_11 +208 0x5C58 //RX_FDEQ_GAIN_12 +209 0x5C60 //RX_FDEQ_GAIN_13 +210 0x6060 //RX_FDEQ_GAIN_14 +211 0x6060 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0202 //RX_FDEQ_BIN_0 +221 0x0203 //RX_FDEQ_BIN_1 +222 0x0303 //RX_FDEQ_BIN_2 +223 0x0402 //RX_FDEQ_BIN_3 +224 0x0504 //RX_FDEQ_BIN_4 +225 0x0209 //RX_FDEQ_BIN_5 +226 0x0808 //RX_FDEQ_BIN_6 +227 0x090A //RX_FDEQ_BIN_7 +228 0x0B0C //RX_FDEQ_BIN_8 +229 0x0D0E //RX_FDEQ_BIN_9 +230 0x1013 //RX_FDEQ_BIN_10 +231 0x1719 //RX_FDEQ_BIN_11 +232 0x1B1E //RX_FDEQ_BIN_12 +233 0x1E1E //RX_FDEQ_BIN_13 +234 0x1E28 //RX_FDEQ_BIN_14 +235 0x282C //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x4000 //RX_FDEQ_RESRV_0 +245 0x0320 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0030 //RX_FDDRC_BAND_MARGIN_1 +248 0x0050 //RX_FDDRC_BAND_MARGIN_2 +249 0x0080 //RX_FDDRC_BAND_MARGIN_3 +250 0x0004 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x2000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x2000 //RX_FDDRC_THRD_3_2 +258 0x5000 //RX_FDDRC_THRD_3_3 +259 0x4000 //RX_FDDRC_SLANT_0_0 +260 0x4000 //RX_FDDRC_SLANT_0_1 +261 0x4000 //RX_FDDRC_SLANT_0_2 +262 0x4000 //RX_FDDRC_SLANT_0_3 +263 0x7FFF //RX_FDDRC_SLANT_1_0 +264 0x7FFF //RX_FDDRC_SLANT_1_1 +265 0x7FFF //RX_FDDRC_SLANT_1_2 +266 0x7FFF //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +286 0x0074 //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 +#VOL 6 +163 0x4000 //RX_TDDRC_ALPHA_UP_1 +164 0x4000 //RX_TDDRC_ALPHA_UP_2 +165 0x4000 //RX_TDDRC_ALPHA_UP_3 +166 0x4000 //RX_TDDRC_ALPHA_UP_4 +184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +190 0x7FFF //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +269 0x0001 //RX_TDDRC_THRD_0 +270 0x0002 //RX_TDDRC_THRD_1 +271 0x1800 //RX_TDDRC_THRD_2 +272 0x1800 //RX_TDDRC_THRD_3 +273 0x6000 //RX_TDDRC_SLANT_0 +274 0x6E00 //RX_TDDRC_SLANT_1 +275 0x4000 //RX_TDDRC_ALPHA_UP_0 +276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x199A //RX_TDDRC_HMNC_GAIN +279 0x0001 //RX_TDDRC_SMT_FLAG +280 0x0CCD //RX_TDDRC_SMT_W +281 0x03C3 //RX_TDDRC_DRC_GAIN +195 0x0020 //RX_FDEQ_SUBNUM +196 0x4848 //RX_FDEQ_GAIN_0 +197 0x4848 //RX_FDEQ_GAIN_1 +198 0x4848 //RX_FDEQ_GAIN_2 +199 0x4870 //RX_FDEQ_GAIN_3 +200 0x4848 //RX_FDEQ_GAIN_4 +201 0x4848 //RX_FDEQ_GAIN_5 +202 0x4850 //RX_FDEQ_GAIN_6 +203 0x485C //RX_FDEQ_GAIN_7 +204 0x5C60 //RX_FDEQ_GAIN_8 +205 0x685C //RX_FDEQ_GAIN_9 +206 0x5640 //RX_FDEQ_GAIN_10 +207 0x4040 //RX_FDEQ_GAIN_11 +208 0x5C58 //RX_FDEQ_GAIN_12 +209 0x5C60 //RX_FDEQ_GAIN_13 +210 0x6060 //RX_FDEQ_GAIN_14 +211 0x6060 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0202 //RX_FDEQ_BIN_0 +221 0x0203 //RX_FDEQ_BIN_1 +222 0x0303 //RX_FDEQ_BIN_2 +223 0x0402 //RX_FDEQ_BIN_3 +224 0x0504 //RX_FDEQ_BIN_4 +225 0x0209 //RX_FDEQ_BIN_5 +226 0x0808 //RX_FDEQ_BIN_6 +227 0x090A //RX_FDEQ_BIN_7 +228 0x0B0C //RX_FDEQ_BIN_8 +229 0x0D0E //RX_FDEQ_BIN_9 +230 0x1013 //RX_FDEQ_BIN_10 +231 0x1719 //RX_FDEQ_BIN_11 +232 0x1B1E //RX_FDEQ_BIN_12 +233 0x1E1E //RX_FDEQ_BIN_13 +234 0x1E28 //RX_FDEQ_BIN_14 +235 0x282C //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x4000 //RX_FDEQ_RESRV_0 +245 0x0320 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0030 //RX_FDDRC_BAND_MARGIN_1 +248 0x0050 //RX_FDDRC_BAND_MARGIN_2 +249 0x0080 //RX_FDDRC_BAND_MARGIN_3 +250 0x0004 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x2000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x2000 //RX_FDDRC_THRD_3_2 +258 0x5000 //RX_FDDRC_THRD_3_3 +259 0x4000 //RX_FDDRC_SLANT_0_0 +260 0x4000 //RX_FDDRC_SLANT_0_1 +261 0x4000 //RX_FDDRC_SLANT_0_2 +262 0x4000 //RX_FDDRC_SLANT_0_3 +263 0x7FFF //RX_FDDRC_SLANT_1_0 +264 0x7FFF //RX_FDDRC_SLANT_1_1 +265 0x7FFF //RX_FDDRC_SLANT_1_2 +266 0x7FFF //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +286 0x0100 //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 + +#CASE_NAME HANDSFREE-HANDSFREE-RESERVE2-SWB +#PARAM_MODE Simple +#PARAM_TYPE TX+2RX +#TOTAL_CUSTOM_STEP 7+7 +#TX +0 0x0001 //TX_OPERATION_MODE_0 +1 0x0001 //TX_OPERATION_MODE_1 +2 0x0073 //TX_PATCH_REG +3 0x2F7C //TX_SENDFUNC_MODE_0 +4 0x0001 //TX_SENDFUNC_MODE_1 +5 0x0003 //TX_NUM_MIC +6 0x0003 //TX_SAMPLINGFREQ_SIG +7 0x0003 //TX_SAMPLINGFREQ_PROC +8 0x000A //TX_FRAME_SZ_SIG +9 0x000A //TX_FRAME_SZ +10 0x0000 //TX_DELAY_OPT +11 0x0028 //TX_MAX_TAIL_LENGTH +12 0x0001 //TX_NUM_LOUTCHN +13 0x0001 //TX_MAXNUM_AECREF +14 0x0000 //TX_DBG_FUNC_REG +15 0x0000 //TX_DBG_FUNC_REG1 +16 0x0000 //TX_SYS_RESRV_0 +17 0x0000 //TX_SYS_RESRV_1 +18 0x0000 //TX_SYS_RESRV_2 +19 0x0000 //TX_SYS_RESRV_3 +20 0x0000 //TX_DIST2REF0 +21 0x009C //TX_DIST2REF1 +22 0x0019 //TX_DIST2REF_02 +23 0x0000 //TX_DIST2REF_03 +24 0x0000 //TX_DIST2REF_04 +25 0x0000 //TX_DIST2REF_05 +26 0x0000 //TX_MMIC +27 0x1000 //TX_PGA_0 +28 0x1000 //TX_PGA_1 +29 0x1000 //TX_PGA_2 +30 0x0000 //TX_PGA_3 +31 0x0000 //TX_PGA_4 +32 0x0000 //TX_PGA_5 +33 0x0001 //TX_MIC_PAIRS +34 0x0000 //TX_MIC_PAIRS_HS +35 0x0002 //TX_MICS_FOR_BF +36 0x0000 //TX_MIC_PAIRS_FORL1 +37 0x0002 //TX_MICS_OF_PAIR0 +38 0x0002 //TX_MICS_OF_PAIR1 +39 0x0002 //TX_MICS_OF_PAIR2 +40 0x0002 //TX_MICS_OF_PAIR3 +41 0x0000 //TX_MIC_DATA_SRC0 +42 0x0002 //TX_MIC_DATA_SRC1 +43 0x0001 //TX_MIC_DATA_SRC2 +44 0x0000 //TX_MIC_DATA_SRC3 +45 0x0000 //TX_MIC_PAIR_CH_04 +46 0x0000 //TX_MIC_PAIR_CH_05 +47 0x0000 //TX_MIC_PAIR_CH_10 +48 0x0000 //TX_MIC_PAIR_CH_11 +49 0x0000 //TX_MIC_PAIR_CH_12 +50 0x0000 //TX_MIC_PAIR_CH_13 +51 0x0000 //TX_MIC_PAIR_CH_14 +52 0x05DC //TX_HD_BIN_MASK +53 0x0010 //TX_HD_SUBAND_MASK +54 0x19A1 //TX_HD_FRAME_AVG_MASK +55 0x0320 //TX_HD_MIN_FRQ +56 0x1000 //TX_HD_ALPHA_PSD +57 0x1100 //TX_T_PHPR1 +58 0x0000 //TX_T_PHPR2 +59 0x0000 //TX_T_PTPR +60 0x0000 //TX_T_PNPR +61 0x0000 //TX_T_PAPR1 +62 0xEE6C //TX_T_PSDVAT +63 0x0800 //TX_CNT +64 0x4000 //TX_ANTI_HOWL_GAIN +65 0x0001 //TX_MICFORBFMARK_0 +66 0x0001 //TX_MICFORBFMARK_1 +67 0x0001 //TX_MICFORBFMARK_2 +68 0x0001 //TX_MICFORBFMARK_3 +69 0x0001 //TX_MICFORBFMARK_4 +70 0x0001 //TX_MICFORBFMARK_5 +71 0x0000 //TX_DIST2REF_10 +72 0x3B33 //TX_DIST2REF_11 +73 0x0A70 //TX_DIST2REF2 +74 0x0000 //TX_DIST2REF_13 +75 0x0000 //TX_DIST2REF_14 +76 0x0000 //TX_DIST2REF_15 +77 0x0000 //TX_DIST2REF_20 +78 0x0000 //TX_DIST2REF_21 +79 0x0000 //TX_DIST2REF_22 +80 0x0000 //TX_DIST2REF_23 +81 0x0000 //TX_DIST2REF_24 +82 0x0000 //TX_DIST2REF_25 +83 0x0000 //TX_DIST2REF_30 +84 0x0000 //TX_DIST2REF_31 +85 0x0000 //TX_DIST2REF_32 +86 0x0000 //TX_DIST2REF_33 +87 0x0000 //TX_DIST2REF_34 +88 0x0000 //TX_DIST2REF_35 +89 0x0000 //TX_MIC_LOC_00 +90 0x0000 //TX_MIC_LOC_01 +91 0x0000 //TX_MIC_LOC_02 +92 0x0000 //TX_MIC_LOC_03 +93 0x0000 //TX_MIC_LOC_04 +94 0x0000 //TX_MIC_LOC_05 +95 0x0000 //TX_MIC_LOC_10 +96 0x0000 //TX_MIC_LOC_11 +97 0x0000 //TX_MIC_LOC_12 +98 0x0000 //TX_MIC_LOC_13 +99 0x0000 //TX_MIC_LOC_14 +100 0x0000 //TX_MIC_LOC_15 +101 0x0000 //TX_MIC_LOC_20 +102 0x0000 //TX_MIC_LOC_21 +103 0x0000 //TX_MIC_LOC_22 +104 0x0000 //TX_MIC_LOC_23 +105 0x0000 //TX_MIC_LOC_24 +106 0x0000 //TX_MIC_LOC_25 +107 0x0800 //TX_MIC_REFBLK_VOLUME +108 0x0CAE //TX_MIC_BLOCK_VOLUME +109 0x0000 //TX_INVERSE_MASK +110 0x0000 //TX_ADCS_MASK +111 0x04D0 //TX_ADCS_GAIN +112 0x4000 //TX_NFC_GAINFAC +113 0x0000 //TX_MAINMIC_BLKFACTOR +114 0x0000 //TX_REFMIC_BLKFACTOR +115 0x0000 //TX_BLMIC_BLKFACTOR +116 0x0000 //TX_BRMIC_BLKFACTOR +117 0x0031 //TX_MICBLK_START_BIN +118 0x0060 //TX_MICBLK_END_BIN +119 0x0015 //TX_MICBLK_FE_HOLD +120 0xFFF2 //TX_MICBLK_MR_EXP_TH +121 0xFFF2 //TX_MICBLK_LR_EXP_TH +122 0x0015 //TX_FENE_HOLD +123 0x4000 //TX_FE_ENER_TH_MTS +124 0x0004 //TX_FE_ENER_TH_EXP +125 0x6000 //TX_C_POST_FLT_MIC_MAINBLK +126 0x6000 //TX_C_POST_FLT_MIC_REFBLK +127 0x0010 //TX_MIC_BLOCK_N +128 0x7B02 //TX_A_HP +129 0x4000 //TX_B_PE +130 0x5000 //TX_THR_PITCH_DET_0 +131 0x4800 //TX_THR_PITCH_DET_1 +132 0x4000 //TX_THR_PITCH_DET_2 +133 0x0008 //TX_PITCH_BFR_LEN +134 0x0003 //TX_SBD_PITCH_DET +135 0x0050 //TX_TD_AEC_L +136 0x4000 //TX_MU0_UNP_TD_AEC +137 0x1000 //TX_MU0_PTD_TD_AEC +138 0x0000 //TX_PP_RESRV_0 +139 0x2A94 //TX_PP_RESRV_1 +140 0x55F0 //TX_PP_RESRV_2 +141 0x0000 //TX_PP_RESRV_3 +142 0x0000 //TX_PP_RESRV_4 +143 0x0000 //TX_PP_RESRV_5 +144 0x0000 //TX_PP_RESRV_6 +145 0x0000 //TX_PP_RESRV_7 +146 0x0028 //TX_TAIL_LENGTH +147 0x0400 //TX_AEC_REF_GAIN_0 +148 0x0800 //TX_AEC_REF_GAIN_1 +149 0x0800 //TX_AEC_REF_GAIN_2 +150 0x7600 //TX_EAD_THR +151 0x1000 //TX_THR_RE_EST +152 0x2000 //TX_MIN_EQ_RE_EST_0 +153 0x0600 //TX_MIN_EQ_RE_EST_1 +154 0x3000 //TX_MIN_EQ_RE_EST_2 +155 0x3000 //TX_MIN_EQ_RE_EST_3 +156 0x3000 //TX_MIN_EQ_RE_EST_4 +157 0x3000 //TX_MIN_EQ_RE_EST_5 +158 0x3000 //TX_MIN_EQ_RE_EST_6 +159 0x1000 //TX_MIN_EQ_RE_EST_7 +160 0x7800 //TX_MIN_EQ_RE_EST_8 +161 0x7800 //TX_MIN_EQ_RE_EST_9 +162 0x7800 //TX_MIN_EQ_RE_EST_10 +163 0x7800 //TX_MIN_EQ_RE_EST_11 +164 0x7800 //TX_MIN_EQ_RE_EST_12 +165 0x4000 //TX_LAMBDA_RE_EST +166 0x3000 //TX_LAMBDA_CB_NLE +167 0x7FFF //TX_C_POST_FLT +168 0x4000 //TX_GAIN_NP +169 0x0180 //TX_SE_HOLD_N +170 0x00C8 //TX_DT_HOLD_N +171 0x05DC //TX_DT2_HOLD_N +172 0x6666 //TX_AEC_RESRV_0 +173 0x0000 //TX_AEC_RESRV_1 +174 0x0014 //TX_AEC_RESRV_2 +175 0x0000 //TX_MIC_DELAY_LENGTH +176 0x0000 //TX_REF_DELAY_LENGTH +177 0x0000 //TX_ADD_LINEIN_GAINL +178 0x0000 //TX_ADD_LINEIN_GAINH +179 0x0000 //TX_MIN_EQ_RE_EST_14 +180 0x0000 //TX_DTD_THR1_8 +181 0x7FFF //TX_DTD_THR2_8 +182 0x0000 //TX_DTD_MIC_BLK2 +183 0x0008 //TX_FRQ_LIN_LEN +184 0x7FFF //TX_FRQ_AEC_LEN_RHO +185 0x6000 //TX_MU0_UNP_FRQ_AEC +186 0x4000 //TX_MU0_PTD_FRQ_AEC +187 0x000A //TX_MINENOISETH +188 0x0800 //TX_MU0_RE_EST +189 0x0001 //TX_AEC_NUM_CH +190 0x0000 //TX_BIGECHOATTENUATION_MAX +191 0x2000 //TX_A_POST_FLT_MICBLK +192 0x0000 //TX_BLKENERTH +193 0x0000 //TX_BLKENERHIGHTH +194 0x0000 //TX_NORMENERTH +195 0x0000 //TX_NORMENERHIGHTH +196 0x0000 //TX_NORMENERHIGHTHL +197 0x7FF0 //TX_DTD_THR1_0 +198 0x7FF0 //TX_DTD_THR1_1 +199 0x7FF0 //TX_DTD_THR1_2 +200 0x7FF0 //TX_DTD_THR1_3 +201 0x7FF0 //TX_DTD_THR1_4 +202 0x7FF0 //TX_DTD_THR1_5 +203 0x7FF0 //TX_DTD_THR1_6 +204 0x7E00 //TX_DTD_THR2_0 +205 0x7E00 //TX_DTD_THR2_1 +206 0x5000 //TX_DTD_THR2_2 +207 0x5000 //TX_DTD_THR2_3 +208 0x5000 //TX_DTD_THR2_4 +209 0x5000 //TX_DTD_THR2_5 +210 0x5000 //TX_DTD_THR2_6 +211 0x7FFF //TX_DTD_THR3 +212 0x0000 //TX_SPK_CUT_K +213 0x36B0 //TX_DT_CUT_K +214 0x0100 //TX_DT_CUT_THR +215 0x04EB //TX_COMFORT_G +216 0x01F4 //TX_POWER_YOUT_TH +217 0x4000 //TX_FDPFGAINECHO +218 0x0000 //TX_DTD_HD_THR +219 0x0000 //TX_SPK_CUT_K_S +220 0x7FFF //TX_DTD_MIC_BLK +221 0x023E //TX_ADPT_STRICT_L +222 0x023E //TX_ADPT_STRICT_H +223 0x0BB8 //TX_RATIO_DT_L_TH_LOW +224 0x3A98 //TX_RATIO_DT_H_TH_LOW +225 0x1F40 //TX_RATIO_DT_L_TH_HIGH +226 0x5014 //TX_RATIO_DT_H_TH_HIGH +227 0x09C4 //TX_RATIO_DT_L0_TH +228 0x7FFF //TX_B_POST_FILT_ECHO_L +229 0x7FFF //TX_B_POST_FILT_ECHO_H +230 0x0200 //TX_MIN_G_CTRL_ECHO +231 0x1000 //TX_B_LESSCUT_RTO_ECHO +232 0x0000 //TX_EPD_OFFSET_00 +233 0x0000 //TX_EPD_OFFST_01 +234 0x2328 //TX_RATIO_DT_L0_TH_HIGH +235 0x7FFF //TX_RATIO_DT_H_TH_CUT +236 0x7FFF //TX_MIN_EQ_RE_EST_13 +237 0x0000 //TX_DTD_THR1_7 +238 0x0000 //TX_DTD_THR2_7 +239 0x0800 //TX_DT_RESRV_7 +240 0x0800 //TX_DT_RESRV_8 +241 0x0000 //TX_DT_RESRV_9 +242 0xF800 //TX_THR_SN_EST_0 +243 0xFA00 //TX_THR_SN_EST_1 +244 0xFA00 //TX_THR_SN_EST_2 +245 0xFA00 //TX_THR_SN_EST_3 +246 0xF800 //TX_THR_SN_EST_4 +247 0xFA00 //TX_THR_SN_EST_5 +248 0xF800 //TX_THR_SN_EST_6 +249 0xF800 //TX_THR_SN_EST_7 +250 0x0100 //TX_DELTA_THR_SN_EST_0 +251 0x0100 //TX_DELTA_THR_SN_EST_1 +252 0x0100 //TX_DELTA_THR_SN_EST_2 +253 0x0000 //TX_DELTA_THR_SN_EST_3 +254 0x0100 //TX_DELTA_THR_SN_EST_4 +255 0x0200 //TX_DELTA_THR_SN_EST_5 +256 0x0100 //TX_DELTA_THR_SN_EST_6 +257 0x0200 //TX_DELTA_THR_SN_EST_7 +258 0x4000 //TX_LAMBDA_NN_EST_0 +259 0x4000 //TX_LAMBDA_NN_EST_1 +260 0x4000 //TX_LAMBDA_NN_EST_2 +261 0x4000 //TX_LAMBDA_NN_EST_3 +262 0x4000 //TX_LAMBDA_NN_EST_4 +263 0x4000 //TX_LAMBDA_NN_EST_5 +264 0x4000 //TX_LAMBDA_NN_EST_6 +265 0x4000 //TX_LAMBDA_NN_EST_7 +266 0x0400 //TX_N_SN_EST +267 0x001E //TX_INBEAM_T +268 0x0041 //TX_INBEAMHOLDT +269 0x2000 //TX_G_STRICT +270 0x2000 //TX_EQ_THR_BF +271 0x799A //TX_LAMBDA_EQ_BF +272 0x1000 //TX_NE_RTO_TH +273 0x0400 //TX_NE_RTO_TH_L +274 0x0800 //TX_MAINREFRTOH_TH_H +275 0x0800 //TX_MAINREFRTOH_TH_L +276 0x0800 //TX_MAINREFRTO_TH_H +277 0x0800 //TX_MAINREFRTO_TH_L +278 0x0200 //TX_MAINREFRTO_TH_EQ +279 0x2000 //TX_B_POST_FLT_0 +280 0x1000 //TX_B_POST_FLT_1 +281 0x0010 //TX_NS_LVL_CTRL_0 +282 0x003C //TX_NS_LVL_CTRL_1 +283 0x0024 //TX_NS_LVL_CTRL_2 +284 0x003C //TX_NS_LVL_CTRL_3 +285 0x0014 //TX_NS_LVL_CTRL_4 +286 0x0011 //TX_NS_LVL_CTRL_5 +287 0x003C //TX_NS_LVL_CTRL_6 +288 0x0011 //TX_NS_LVL_CTRL_7 +289 0x0020 //TX_MIN_GAIN_S_0 +290 0x0020 //TX_MIN_GAIN_S_1 +291 0x0020 //TX_MIN_GAIN_S_2 +292 0x0020 //TX_MIN_GAIN_S_3 +293 0x0020 //TX_MIN_GAIN_S_4 +294 0x0020 //TX_MIN_GAIN_S_5 +295 0x0020 //TX_MIN_GAIN_S_6 +296 0x0020 //TX_MIN_GAIN_S_7 +297 0x6000 //TX_NMOS_SUP +298 0x0000 //TX_NS_MAX_PRI_SNR_TH +299 0x0000 //TX_NMOS_SUP_MENSA +300 0x7FFF //TX_SNRI_SUP_0 +301 0x4000 //TX_SNRI_SUP_1 +302 0x4000 //TX_SNRI_SUP_2 +303 0x4000 //TX_SNRI_SUP_3 +304 0x4000 //TX_SNRI_SUP_4 +305 0x4000 //TX_SNRI_SUP_5 +306 0x4000 //TX_SNRI_SUP_6 +307 0x4000 //TX_SNRI_SUP_7 +308 0x7FFF //TX_THR_LFNS +309 0x0018 //TX_G_LFNS +310 0x09C4 //TX_GAIN0_NTH +311 0x000A //TX_MUSIC_MORENS +312 0x7FFF //TX_A_POST_FILT_0 +313 0x2000 //TX_A_POST_FILT_1 +314 0x7FFF //TX_A_POST_FILT_S_0 +315 0x7FFF //TX_A_POST_FILT_S_1 +316 0x7FFF //TX_A_POST_FILT_S_2 +317 0x7FFF //TX_A_POST_FILT_S_3 +318 0x7FFF //TX_A_POST_FILT_S_4 +319 0x7FFF //TX_A_POST_FILT_S_5 +320 0x7FFF //TX_A_POST_FILT_S_6 +321 0x7FFF //TX_A_POST_FILT_S_7 +322 0x2000 //TX_B_POST_FILT_0 +323 0x6000 //TX_B_POST_FILT_1 +324 0x6000 //TX_B_POST_FILT_2 +325 0x6000 //TX_B_POST_FILT_3 +326 0x4000 //TX_B_POST_FILT_4 +327 0x1000 //TX_B_POST_FILT_5 +328 0x1000 //TX_B_POST_FILT_6 +329 0x2000 //TX_B_POST_FILT_7 +330 0x4000 //TX_B_LESSCUT_RTO_S_0 +331 0x7FFF //TX_B_LESSCUT_RTO_S_1 +332 0x7FFF //TX_B_LESSCUT_RTO_S_2 +333 0x7FFF //TX_B_LESSCUT_RTO_S_3 +334 0x7FFF //TX_B_LESSCUT_RTO_S_4 +335 0x6000 //TX_B_LESSCUT_RTO_S_5 +336 0x7FFF //TX_B_LESSCUT_RTO_S_6 +337 0x7FFF //TX_B_LESSCUT_RTO_S_7 +338 0x7F00 //TX_LAMBDA_PFILT +339 0x7F00 //TX_LAMBDA_PFILT_S_0 +340 0x7F00 //TX_LAMBDA_PFILT_S_1 +341 0x7F00 //TX_LAMBDA_PFILT_S_2 +342 0x7F00 //TX_LAMBDA_PFILT_S_3 +343 0x7F00 //TX_LAMBDA_PFILT_S_4 +344 0x7F00 //TX_LAMBDA_PFILT_S_5 +345 0x7F00 //TX_LAMBDA_PFILT_S_6 +346 0x7F00 //TX_LAMBDA_PFILT_S_7 +347 0x0200 //TX_K_PEPPER +348 0x0400 //TX_A_PEPPER +349 0x1EAA //TX_K_PEPPER_HF +350 0x0600 //TX_A_PEPPER_HF +351 0x0001 //TX_HMNC_BST_FLG +352 0x0200 //TX_HMNC_BST_THR +353 0x0040 //TX_DT_BINVAD_TH_0 +354 0x0040 //TX_DT_BINVAD_TH_1 +355 0x0100 //TX_DT_BINVAD_TH_2 +356 0x0100 //TX_DT_BINVAD_TH_3 +357 0x36B0 //TX_DT_BINVAD_ENDF +358 0x0200 //TX_C_POST_FLT_DT +359 0x0CCD //TX_NS_B_POST_FLT_LESSCUT +360 0x0140 //TX_DT_BOOST +361 0x0000 //TX_BF_SGRAD_FLG +362 0x0005 //TX_BF_DVG_TH +363 0x001E //TX_SN_C_F +364 0x0000 //TX_K_APT +365 0x0001 //TX_NOISEDET +366 0x0064 //TX_NDETCT +367 0x0050 //TX_NOISE_TH_0 +368 0x7FFF //TX_NOISE_TH_0_2 +369 0x7FFF //TX_NOISE_TH_0_3 +370 0x07D0 //TX_NOISE_TH_1 +371 0x01F4 //TX_NOISE_TH_2 +372 0x36B0 //TX_NOISE_TH_3 +373 0x2710 //TX_NOISE_TH_4 +374 0x2CEC //TX_NOISE_TH_5 +375 0x7FFF //TX_NOISE_TH_5_2 +376 0x0000 //TX_NOISE_TH_5_3 +377 0x7FFF //TX_NOISE_TH_5_4 +378 0x0DAC //TX_NOISE_TH_6 +379 0x0050 //TX_MINENOISE_TH +380 0xD508 //TX_MORENS_TFMASK_TH +381 0x0001 //TX_DRC_QUIET_FLOOR +382 0x3A98 //TX_RATIODTL_CUT_TH +383 0x07D0 //TX_DT_CUT_K1 +384 0x0666 //TX_OUT_ENER_S_TH_CLEAN +385 0x0666 //TX_OUT_ENER_S_TH_LESSCLEAN +386 0x0333 //TX_OUT_ENER_S_TH_NOISY +387 0x019A //TX_OUT_ENER_TH_NOISE +388 0x0333 //TX_OUT_ENER_TH_SPEECH +389 0x2000 //TX_SN_NPB_GAIN +390 0x0000 //TX_NN_NPB_GAIN +391 0x7FFF //TX_POST_MASK_SUP_HSNE +392 0x1388 //TX_TAIL_DET_TH +393 0x4000 //TX_B_LESSCUT_RTO_WTA +394 0x0000 //TX_MEL_G_R +395 0x0080 //TX_SUPHIGH_TH +396 0x0000 //TX_MASK_G_R +397 0x0002 //TX_EXTRA_NS_L +398 0x1800 //TX_C_POST_FLT_MASK +399 0x7FFF //TX_A_POST_FLT_WNS +400 0x0148 //TX_MIN_G_LOW300HZ +401 0x0001 //TX_MAXLEVEL_CNG +402 0x00B4 //TX_STN_NOISE_TH +403 0x4000 //TX_POST_MASK_SUP +404 0x7FFF //TX_POST_MASK_ADJUST +405 0x00C8 //TX_NS_ENOISE_MIC0_TH +406 0x0050 //TX_MINENOISE_MIC0_TH +407 0x012C //TX_MINENOISE_MIC0_S_TH +408 0x4000 //TX_MIN_G_CTRL_SSNS +409 0x0000 //TX_METAL_RTO_THR +410 0x4848 //TX_NS_FP_K_METAL +411 0x3A98 //TX_NOISEDET_BOOST_TH +412 0x0FA0 //TX_NSMOOTH_TH +413 0x0000 //TX_NS_RESRV_8 +414 0x1800 //TX_RHO_UPB +415 0x0BB8 //TX_N_HOLD_HS +416 0x0050 //TX_N_RHO_BFR0 +417 0x7FFF //TX_LAMBDA_ARSP_EST +418 0x0100 //TX_EXTRA_GAIN_MICBLOCK +419 0x0CCD //TX_THR_STD_NSR +420 0x019A //TX_THR_STD_PLH +421 0x2AF8 //TX_N_HOLD_STD +422 0x0066 //TX_THR_STD_RHO +423 0x2000 //TX_BF_RESET_THR_HS +424 0x09C4 //TX_SB_RTO_MEAN_TH +425 0x0000 //TX_SB_RHO_MEAN_TH_NTALK +426 0x3800 //TX_SB_RTO_MEAN_TH_ABN +427 0x2EE0 //TX_SB_RTO_MEAN_TH_RUB +428 0x0000 //TX_WTA_EN_RTO_TH +429 0x0000 //TX_TOP_ENER_TH_F +430 0x0000 //TX_DESIRED_TALK_HOLDT +431 0x0800 //TX_MIC_BLOCK_FACTOR +432 0x0000 //TX_NSEST_BFRLRNRDC +433 0x0000 //TX_THR_POST_FLT_HS +434 0x0010 //TX_HS_VAD_BIN +435 0x2666 //TX_THR_VAD_HS +436 0x2CCD //TX_MEAN_RTO_MIN_TH2 +437 0x0032 //TX_SILENCE_T +438 0x0000 //TX_A_POST_FLT_WTA +439 0x799A //TX_LAMBDA_PFLT_WTA +440 0x0000 //TX_SB_RHO_MEAN2_TH +441 0x0190 //TX_SB_RHO_MEAN3_TH +442 0x0000 //TX_HS_RESRV_4 +443 0x0000 //TX_HS_RESRV_5 +444 0x003C //TX_DOA_VAD_THR_1 +445 0x0000 //TX_DOA_VAD_THR_2 +446 0x0028 //TX_DOA_VAD_THR1_0 +447 0x0028 //TX_DOA_VAD_THR1_1 +448 0x0000 //TX_SRC_DOA_RNG_LOW_0A +449 0x00B4 //TX_SRC_DOA_RNG_HIGH_0A +450 0x005A //TX_DFLT_SRC_DOA_0A +451 0x0000 //TX_SRC_DOA_RNG_LOW_0B +452 0x0000 //TX_SRC_DOA_RNG_HIGH_0B +453 0x0000 //TX_DFLT_SRC_DOA_0B +454 0x0000 //TX_SRC_DOA_RNG_LOW_0C +455 0x0000 //TX_SRC_DOA_RNG_HIGH_0C +456 0x0000 //TX_DFLT_SRC_DOA_0C +457 0x0000 //TX_SRC_DOA_RNG_LOW_0D +458 0x0000 //TX_SRC_DOA_RNG_HIGH_0D +459 0x0000 //TX_DFLT_SRC_DOA_0D +460 0x0000 //TX_SRC_DOA_RNG_LOW_1A +461 0x00B4 //TX_SRC_DOA_RNG_HIGH_1A +462 0x005A //TX_DFLT_SRC_DOA_1A +463 0x0000 //TX_SRC_DOA_RNG_LOW_1B +464 0x00B4 //TX_SRC_DOA_RNG_HIGH_1B +465 0x005A //TX_DFLT_SRC_DOA_1B +466 0x0000 //TX_SRC_DOA_RNG_LOW_1C +467 0x00B4 //TX_SRC_DOA_RNG_HIGH_1C +468 0x005A //TX_DFLT_SRC_DOA_1C +469 0x0000 //TX_SRC_DOA_RNG_LOW_1D +470 0x00B4 //TX_SRC_DOA_RNG_HIGH_1D +471 0x005A //TX_DFLT_SRC_DOA_1D +472 0x0100 //TX_BF_HOLDOFF_T +473 0x7FFF //TX_DOA_COST_FACTOR +474 0x4000 //TX_MAINTOREFR_TH0 +475 0x071C //TX_DOA_TRK_THR +476 0x012C //TX_DOA_TRACK_HT +477 0x0200 //TX_N1_HOLD_HF +478 0x0100 //TX_N2_HOLD_HF +479 0x3000 //TX_BF_RESET_THR_HF +480 0x7333 //TX_DOA_SMOOTH +481 0x0800 //TX_MU_BF +482 0x0800 //TX_BF_MU_LF_B2 +483 0x0040 //TX_BF_FC_END_BIN_B2 +484 0x0020 //TX_BF_FC_END_BIN +485 0x0000 //TX_HF_RESRV_25 +486 0x0000 //TX_HF_RESRV_26 +487 0x0007 //TX_N_DOA_SEED +488 0x0001 //TX_FINE_DOA_SEARCH_FLG +489 0x0000 //TX_HF_RESRV_27 +490 0x038E //TX_DLT_SRC_DOA_RNG +491 0x0200 //TX_BF_MU_LF +492 0x0000 //TX_DFLT_SRC_LOC_0 +493 0x7FFF //TX_DFLT_SRC_LOC_1 +494 0x0000 //TX_DFLT_SRC_LOC_2 +495 0x038E //TX_DOA_TRACK_VADTH +496 0x0000 //TX_DOA_TRACK_NEW +497 0x0230 //TX_NOR_OFF_THR +498 0x0CCD //TX_MORE_ON_700HZ_THR +499 0x0000 //TX_MU_BF_ADPT_NS +500 0x0000 //TX_ADAPT_LEN +501 0x2000 //TX_MORE_SNS +502 0x0000 //TX_NOR_OFF_TH1 +503 0x0000 //TX_WIDE_MASK_TH +504 0x4650 //TX_SUBSNRATIOHIGH4MEANBCK_THR +505 0x4000 //TX_C_POST_FLT_CUT +506 0x2000 //TX_RADIODTLV +507 0x0320 //TX_POWER_LINEIN_TH +508 0x0014 //TX_FE_VADCOUNT_TH_FC +509 0x000A //TX_ECHO_SUPP_FC +510 0x0C80 //TX_ECHO_TH +511 0x6666 //TX_MIC_TO_BFGAIN +512 0x0000 //TX_MICTOBFGAIN0 +513 0x0000 //TX_FASTMUE_TH +514 0x3000 //TX_DEREVERB_LF_MU +515 0x34CD //TX_DEREVERB_HF_MU +516 0x0007 //TX_DEREVERB_DELAY +517 0x0004 //TX_DEREVERB_COEF_LEN +518 0x0003 //TX_DEREVERB_DNR +519 0x0000 //TX_DEREVERB_ALPHA +520 0x0000 //TX_DEREVERB_BETA +521 0x3A98 //TX_GSC_RTOL_TH +522 0x3A98 //TX_GSC_RTOH_TH +523 0x7E2C //TX_WIDE2_MEANHTH +524 0x0000 //TX_DR_RESRV_5 +525 0x0000 //TX_DR_RESRV_6 +526 0x0000 //TX_DR_RESRV_7 +527 0x0000 //TX_DR_RESRV_8 +528 0x1333 //TX_WIND_MARK_TH +529 0x399A //TX_CORR_THR +530 0x0004 //TX_SNR_THR +531 0x0010 //TX_ENGY_THR +532 0x1770 //TX_CORR_HIGH_TH +533 0x6000 //TX_ENGY_THR_2 +534 0x3400 //TX_MEAN_RTO_THR +535 0x0028 //TX_WNS_ENOISE_MIC0_TH +536 0x3000 //TX_RATIOMICL_TH +537 0x64CD //TX_CALIG_HS +538 0x0000 //TX_LVL_CTRL +539 0x0014 //TX_WIND_SUPRTO +540 0x000A //TX_WNS_MIN_G +541 0x0000 //TX_WNS_B_POST_FLT +542 0x2800 //TX_RATIOMICH_TH +543 0xD120 //TX_WIND_INBEAM_L_TH +544 0x0FA0 //TX_WIND_INBEAM_H_TH +545 0x2000 //TX_WNS_RESRV_0 +546 0x59D8 //TX_WNS_RESRV_1 +547 0x0000 //TX_WNS_RESRV_2 +548 0x0000 //TX_WNS_RESRV_3 +549 0x0000 //TX_WNS_RESRV_4 +550 0x0000 //TX_WNS_RESRV_5 +551 0x0000 //TX_WNS_RESRV_6 +552 0x0000 //TX_PB_B_POST_FLT_LESSCUT +553 0x0070 //TX_BF_LESSCUT_BBIN +554 0x0070 //TX_BF_LESSCUT_EBIN +555 0x0010 //TX_POSTBFB0 +556 0x0070 //TX_POSTBFB +557 0x00B0 //TX_POSTBFE +558 0x0E66 //TX_SPEECH_SNR_TH +559 0x0050 //TX_PB_MAX_PRI_SNR_TH +560 0x770A //TX_MAX_PRI_SNR_TH_L +561 0x0000 //TX_PFGAIN +562 0x0000 //TX_MAINTOREFR_TH +563 0x0000 //TX_SAM_MARK +564 0x0000 //TX_PB_RESRV_0 +565 0x0000 //TX_PB_RESRV_1 +566 0x0020 //TX_FDEQ_SUBNUM +567 0x4848 //TX_FDEQ_GAIN_0 +568 0x4848 //TX_FDEQ_GAIN_1 +569 0x4850 //TX_FDEQ_GAIN_2 +570 0x5050 //TX_FDEQ_GAIN_3 +571 0x4B48 //TX_FDEQ_GAIN_4 +572 0x484B //TX_FDEQ_GAIN_5 +573 0x4B5C //TX_FDEQ_GAIN_6 +574 0x564E //TX_FDEQ_GAIN_7 +575 0x4C4E //TX_FDEQ_GAIN_8 +576 0x4E45 //TX_FDEQ_GAIN_9 +577 0x494A //TX_FDEQ_GAIN_10 +578 0x534D //TX_FDEQ_GAIN_11 +579 0x5C57 //TX_FDEQ_GAIN_12 +580 0x5667 //TX_FDEQ_GAIN_13 +581 0x6778 //TX_FDEQ_GAIN_14 +582 0x8087 //TX_FDEQ_GAIN_15 +583 0x4848 //TX_FDEQ_GAIN_16 +584 0x4848 //TX_FDEQ_GAIN_17 +585 0x4848 //TX_FDEQ_GAIN_18 +586 0x4848 //TX_FDEQ_GAIN_19 +587 0x4848 //TX_FDEQ_GAIN_20 +588 0x4848 //TX_FDEQ_GAIN_21 +589 0x4848 //TX_FDEQ_GAIN_22 +590 0x4848 //TX_FDEQ_GAIN_23 +591 0x0202 //TX_FDEQ_BIN_0 +592 0x0203 //TX_FDEQ_BIN_1 +593 0x0303 //TX_FDEQ_BIN_2 +594 0x0304 //TX_FDEQ_BIN_3 +595 0x0405 //TX_FDEQ_BIN_4 +596 0x0506 //TX_FDEQ_BIN_5 +597 0x0708 //TX_FDEQ_BIN_6 +598 0x090A //TX_FDEQ_BIN_7 +599 0x0B0C //TX_FDEQ_BIN_8 +600 0x0D0E //TX_FDEQ_BIN_9 +601 0x1013 //TX_FDEQ_BIN_10 +602 0x1719 //TX_FDEQ_BIN_11 +603 0x1B1E //TX_FDEQ_BIN_12 +604 0x1E1E //TX_FDEQ_BIN_13 +605 0x1E28 //TX_FDEQ_BIN_14 +606 0x282C //TX_FDEQ_BIN_15 +607 0x0000 //TX_FDEQ_BIN_16 +608 0x0000 //TX_FDEQ_BIN_17 +609 0x0000 //TX_FDEQ_BIN_18 +610 0x0000 //TX_FDEQ_BIN_19 +611 0x0000 //TX_FDEQ_BIN_20 +612 0x0000 //TX_FDEQ_BIN_21 +613 0x0000 //TX_FDEQ_BIN_22 +614 0x0000 //TX_FDEQ_BIN_23 +615 0x0000 //TX_FDEQ_PADDING +616 0x0030 //TX_PREEQ_SUBNUM_MIC0 +617 0x4848 //TX_PREEQ_GAIN_MIC0_0 +618 0x4848 //TX_PREEQ_GAIN_MIC0_1 +619 0x4848 //TX_PREEQ_GAIN_MIC0_2 +620 0x4848 //TX_PREEQ_GAIN_MIC0_3 +621 0x4848 //TX_PREEQ_GAIN_MIC0_4 +622 0x4848 //TX_PREEQ_GAIN_MIC0_5 +623 0x4848 //TX_PREEQ_GAIN_MIC0_6 +624 0x4848 //TX_PREEQ_GAIN_MIC0_7 +625 0x4848 //TX_PREEQ_GAIN_MIC0_8 +626 0x4848 //TX_PREEQ_GAIN_MIC0_9 +627 0x4848 //TX_PREEQ_GAIN_MIC0_10 +628 0x4848 //TX_PREEQ_GAIN_MIC0_11 +629 0x4848 //TX_PREEQ_GAIN_MIC0_12 +630 0x4848 //TX_PREEQ_GAIN_MIC0_13 +631 0x4848 //TX_PREEQ_GAIN_MIC0_14 +632 0x4848 //TX_PREEQ_GAIN_MIC0_15 +633 0x4848 //TX_PREEQ_GAIN_MIC0_16 +634 0x4848 //TX_PREEQ_GAIN_MIC0_17 +635 0x4848 //TX_PREEQ_GAIN_MIC0_18 +636 0x4848 //TX_PREEQ_GAIN_MIC0_19 +637 0x4848 //TX_PREEQ_GAIN_MIC0_20 +638 0x4848 //TX_PREEQ_GAIN_MIC0_21 +639 0x4848 //TX_PREEQ_GAIN_MIC0_22 +640 0x4848 //TX_PREEQ_GAIN_MIC0_23 +641 0x0202 //TX_PREEQ_BIN_MIC0_0 +642 0x0203 //TX_PREEQ_BIN_MIC0_1 +643 0x0303 //TX_PREEQ_BIN_MIC0_2 +644 0x0304 //TX_PREEQ_BIN_MIC0_3 +645 0x0405 //TX_PREEQ_BIN_MIC0_4 +646 0x0506 //TX_PREEQ_BIN_MIC0_5 +647 0x0808 //TX_PREEQ_BIN_MIC0_6 +648 0x0809 //TX_PREEQ_BIN_MIC0_7 +649 0x0A0A //TX_PREEQ_BIN_MIC0_8 +650 0x0C10 //TX_PREEQ_BIN_MIC0_9 +651 0x1013 //TX_PREEQ_BIN_MIC0_10 +652 0x1414 //TX_PREEQ_BIN_MIC0_11 +653 0x261E //TX_PREEQ_BIN_MIC0_12 +654 0x1E14 //TX_PREEQ_BIN_MIC0_13 +655 0x1414 //TX_PREEQ_BIN_MIC0_14 +656 0x2814 //TX_PREEQ_BIN_MIC0_15 +657 0x401E //TX_PREEQ_BIN_MIC0_16 +658 0x0000 //TX_PREEQ_BIN_MIC0_17 +659 0x0000 //TX_PREEQ_BIN_MIC0_18 +660 0x0000 //TX_PREEQ_BIN_MIC0_19 +661 0x0000 //TX_PREEQ_BIN_MIC0_20 +662 0x0000 //TX_PREEQ_BIN_MIC0_21 +663 0x0000 //TX_PREEQ_BIN_MIC0_22 +664 0x0000 //TX_PREEQ_BIN_MIC0_23 +665 0x0030 //TX_PREEQ_SUBNUM_MIC1 +666 0x4848 //TX_PREEQ_GAIN_MIC1_0 +667 0x4848 //TX_PREEQ_GAIN_MIC1_1 +668 0x4848 //TX_PREEQ_GAIN_MIC1_2 +669 0x4848 //TX_PREEQ_GAIN_MIC1_3 +670 0x4848 //TX_PREEQ_GAIN_MIC1_4 +671 0x4848 //TX_PREEQ_GAIN_MIC1_5 +672 0x4848 //TX_PREEQ_GAIN_MIC1_6 +673 0x4849 //TX_PREEQ_GAIN_MIC1_7 +674 0x4A4A //TX_PREEQ_GAIN_MIC1_8 +675 0x4B4D //TX_PREEQ_GAIN_MIC1_9 +676 0x4E4F //TX_PREEQ_GAIN_MIC1_10 +677 0x5052 //TX_PREEQ_GAIN_MIC1_11 +678 0x5354 //TX_PREEQ_GAIN_MIC1_12 +679 0x5454 //TX_PREEQ_GAIN_MIC1_13 +680 0x5653 //TX_PREEQ_GAIN_MIC1_14 +681 0x4C48 //TX_PREEQ_GAIN_MIC1_15 +682 0x4444 //TX_PREEQ_GAIN_MIC1_16 +683 0x4848 //TX_PREEQ_GAIN_MIC1_17 +684 0x4848 //TX_PREEQ_GAIN_MIC1_18 +685 0x4848 //TX_PREEQ_GAIN_MIC1_19 +686 0x4848 //TX_PREEQ_GAIN_MIC1_20 +687 0x4848 //TX_PREEQ_GAIN_MIC1_21 +688 0x4848 //TX_PREEQ_GAIN_MIC1_22 +689 0x4848 //TX_PREEQ_GAIN_MIC1_23 +690 0x0202 //TX_PREEQ_BIN_MIC1_0 +691 0x0203 //TX_PREEQ_BIN_MIC1_1 +692 0x0303 //TX_PREEQ_BIN_MIC1_2 +693 0x0304 //TX_PREEQ_BIN_MIC1_3 +694 0x0405 //TX_PREEQ_BIN_MIC1_4 +695 0x0506 //TX_PREEQ_BIN_MIC1_5 +696 0x0808 //TX_PREEQ_BIN_MIC1_6 +697 0x0809 //TX_PREEQ_BIN_MIC1_7 +698 0x0A0A //TX_PREEQ_BIN_MIC1_8 +699 0x0C10 //TX_PREEQ_BIN_MIC1_9 +700 0x1013 //TX_PREEQ_BIN_MIC1_10 +701 0x1414 //TX_PREEQ_BIN_MIC1_11 +702 0x261E //TX_PREEQ_BIN_MIC1_12 +703 0x1E14 //TX_PREEQ_BIN_MIC1_13 +704 0x1414 //TX_PREEQ_BIN_MIC1_14 +705 0x2814 //TX_PREEQ_BIN_MIC1_15 +706 0x401E //TX_PREEQ_BIN_MIC1_16 +707 0x0000 //TX_PREEQ_BIN_MIC1_17 +708 0x0000 //TX_PREEQ_BIN_MIC1_18 +709 0x0000 //TX_PREEQ_BIN_MIC1_19 +710 0x0000 //TX_PREEQ_BIN_MIC1_20 +711 0x0000 //TX_PREEQ_BIN_MIC1_21 +712 0x0000 //TX_PREEQ_BIN_MIC1_22 +713 0x0000 //TX_PREEQ_BIN_MIC1_23 +714 0x0020 //TX_PREEQ_SUBNUM_MIC2 +715 0x4848 //TX_PREEQ_GAIN_MIC2_0 +716 0x4848 //TX_PREEQ_GAIN_MIC2_1 +717 0x4848 //TX_PREEQ_GAIN_MIC2_2 +718 0x4848 //TX_PREEQ_GAIN_MIC2_3 +719 0x4848 //TX_PREEQ_GAIN_MIC2_4 +720 0x4848 //TX_PREEQ_GAIN_MIC2_5 +721 0x494B //TX_PREEQ_GAIN_MIC2_6 +722 0x4C4D //TX_PREEQ_GAIN_MIC2_7 +723 0x4E4F //TX_PREEQ_GAIN_MIC2_8 +724 0x5051 //TX_PREEQ_GAIN_MIC2_9 +725 0x5255 //TX_PREEQ_GAIN_MIC2_10 +726 0x5754 //TX_PREEQ_GAIN_MIC2_11 +727 0x5454 //TX_PREEQ_GAIN_MIC2_12 +728 0x544F //TX_PREEQ_GAIN_MIC2_13 +729 0x463D //TX_PREEQ_GAIN_MIC2_14 +730 0x4A48 //TX_PREEQ_GAIN_MIC2_15 +731 0x4848 //TX_PREEQ_GAIN_MIC2_16 +732 0x4848 //TX_PREEQ_GAIN_MIC2_17 +733 0x4848 //TX_PREEQ_GAIN_MIC2_18 +734 0x4848 //TX_PREEQ_GAIN_MIC2_19 +735 0x4848 //TX_PREEQ_GAIN_MIC2_20 +736 0x4848 //TX_PREEQ_GAIN_MIC2_21 +737 0x4848 //TX_PREEQ_GAIN_MIC2_22 +738 0x4848 //TX_PREEQ_GAIN_MIC2_23 +739 0x0203 //TX_PREEQ_BIN_MIC2_0 +740 0x0303 //TX_PREEQ_BIN_MIC2_1 +741 0x0304 //TX_PREEQ_BIN_MIC2_2 +742 0x0405 //TX_PREEQ_BIN_MIC2_3 +743 0x0506 //TX_PREEQ_BIN_MIC2_4 +744 0x0808 //TX_PREEQ_BIN_MIC2_5 +745 0x0809 //TX_PREEQ_BIN_MIC2_6 +746 0x0A0A //TX_PREEQ_BIN_MIC2_7 +747 0x0C10 //TX_PREEQ_BIN_MIC2_8 +748 0x1013 //TX_PREEQ_BIN_MIC2_9 +749 0x1414 //TX_PREEQ_BIN_MIC2_10 +750 0x261E //TX_PREEQ_BIN_MIC2_11 +751 0x1E14 //TX_PREEQ_BIN_MIC2_12 +752 0x1414 //TX_PREEQ_BIN_MIC2_13 +753 0x2814 //TX_PREEQ_BIN_MIC2_14 +754 0x4022 //TX_PREEQ_BIN_MIC2_15 +755 0x0000 //TX_PREEQ_BIN_MIC2_16 +756 0x0000 //TX_PREEQ_BIN_MIC2_17 +757 0x0000 //TX_PREEQ_BIN_MIC2_18 +758 0x0000 //TX_PREEQ_BIN_MIC2_19 +759 0x0000 //TX_PREEQ_BIN_MIC2_20 +760 0x0000 //TX_PREEQ_BIN_MIC2_21 +761 0x0000 //TX_PREEQ_BIN_MIC2_22 +762 0x0000 //TX_PREEQ_BIN_MIC2_23 +763 0x0006 //TX_MASKING_ABILITY +764 0x0800 //TX_NND_WEIGHT +765 0x0050 //TX_MIC_CALIBRATION_0 +766 0x0065 //TX_MIC_CALIBRATION_1 +767 0x0050 //TX_MIC_CALIBRATION_2 +768 0x0050 //TX_MIC_CALIBRATION_3 +769 0x0046 //TX_MIC_PWR_BIAS_0 +770 0x0040 //TX_MIC_PWR_BIAS_1 +771 0x0046 //TX_MIC_PWR_BIAS_2 +772 0x0046 //TX_MIC_PWR_BIAS_3 +773 0x0000 //TX_GAIN_LIMIT_0 +774 0x000F //TX_GAIN_LIMIT_1 +775 0x0000 //TX_GAIN_LIMIT_2 +776 0x0000 //TX_GAIN_LIMIT_3 +777 0x7F5B //TX_BVE_NOVAD0_ALPHADOWN +778 0x7FDE //TX_BVE_VAD0_ALPHAUP +779 0x7F3A //TX_BVE_VAD0_ALPHADOWN +780 0x2000 //TX_BVE_GAINWEIGHT_NOFEVADLI +781 0x7F5B //TX_BVE_FEVADLI_ALPHA +782 0x7F19 //TX_BVE_NOVAD0_ALPHAUP +783 0x0800 //TX_TDDRC_ALPHA_UP_01 +784 0x0800 //TX_TDDRC_ALPHA_UP_02 +785 0x0800 //TX_TDDRC_ALPHA_UP_03 +786 0x0800 //TX_TDDRC_ALPHA_UP_04 +787 0x7EB8 //TX_TDDRC_ALPHA_DWN_01 +788 0x7EB8 //TX_TDDRC_ALPHA_DWN_02 +789 0x7EB8 //TX_TDDRC_ALPHA_DWN_03 +790 0x7EB8 //TX_TDDRC_ALPHA_DWN_04 +791 0x7FFF //TX_TDDRC_TD_DRC_LIMIT +792 0x0800 //TX_TDDRC_POST_LIMIT_GAIN +793 0x0000 //TX_TDDRC_RESRV_0 +794 0x0000 //TX_TDDRC_RESRV_1 +795 0x0018 //TX_FDDRC_BAND_MARGIN_0 +796 0x0030 //TX_FDDRC_BAND_MARGIN_1 +797 0x0050 //TX_FDDRC_BAND_MARGIN_2 +798 0x0080 //TX_FDDRC_BAND_MARGIN_3 +799 0x0007 //TX_FDDRC_BLOCK_EXP +800 0x5000 //TX_FDDRC_THRD_2_0 +801 0x5000 //TX_FDDRC_THRD_2_1 +802 0x5000 //TX_FDDRC_THRD_2_2 +803 0x5000 //TX_FDDRC_THRD_2_3 +804 0x6400 //TX_FDDRC_THRD_3_0 +805 0x6400 //TX_FDDRC_THRD_3_1 +806 0x6400 //TX_FDDRC_THRD_3_2 +807 0x6400 //TX_FDDRC_THRD_3_3 +808 0x2000 //TX_FDDRC_SLANT_0_0 +809 0x2000 //TX_FDDRC_SLANT_0_1 +810 0x2000 //TX_FDDRC_SLANT_0_2 +811 0x2000 //TX_FDDRC_SLANT_0_3 +812 0x5333 //TX_FDDRC_SLANT_1_0 +813 0x5333 //TX_FDDRC_SLANT_1_1 +814 0x5333 //TX_FDDRC_SLANT_1_2 +815 0x5333 //TX_FDDRC_SLANT_1_3 +816 0x0010 //TX_DEADMIC_SILENCE_TH +817 0x0600 //TX_MIC_DEGRADE_TH +818 0x0078 //TX_DEADMIC_CNT +819 0x0078 //TX_MIC_DEGRADE_CNT +820 0x0000 //TX_FDDRC_RESRV_4 +821 0x0000 //TX_FDDRC_RESRV_5 +822 0x0000 //TX_FDDRC_RESRV_6 +823 0x7FFF //TX_KS_NOISEPASTE_FACTOR +824 0x0001 //TX_KS_CONFIG +825 0x7FFF //TX_KS_GAIN_MIN +826 0x0000 //TX_KS_RESRV_0 +827 0x0000 //TX_KS_RESRV_1 +828 0x0000 //TX_KS_RESRV_2 +829 0x7C00 //TX_LAMBDA_PKA_FP +830 0x2000 //TX_TPKA_FP +831 0x0080 //TX_MIN_G_FP +832 0x2000 //TX_MAX_G_FP +833 0x4848 //TX_FFP_FP_K_METAL +834 0x4000 //TX_A_POST_FLT_FP +835 0x0F5C //TX_RTO_OUTBEAM_TH +836 0x4CCD //TX_TPKA_FP_THD +837 0x0000 //TX_MAX_G_FP_BLK +838 0x0000 //TX_FFP_FADEIN +839 0x0000 //TX_FFP_FADEOUT +840 0x0000 //TX_WHISPERCTH +841 0x0000 //TX_WHISPERHOLDT +842 0x0000 //TX_WHISP_ENTHH +843 0x0000 //TX_WHISP_ENTHL +844 0x0000 //TX_WHISP_RTOTH +845 0x0000 //TX_WHISP_RTOTH2 +846 0x0096 //TX_MUTE_PERIOD +847 0x0000 //TX_FADE_IN_PERIOD +848 0x0100 //TX_FFP_RESRV_2 +849 0x0020 //TX_FFP_RESRV_3 +850 0x0000 //TX_FFP_RESRV_4 +851 0x0000 //TX_FFP_RESRV_5 +852 0x0000 //TX_FFP_RESRV_6 +853 0x0002 //TX_FILTINDX +854 0x0003 //TX_TDDRC_THRD_0 +855 0x0004 //TX_TDDRC_THRD_1 +856 0x1000 //TX_TDDRC_THRD_2 +857 0x1000 //TX_TDDRC_THRD_3 +858 0x6000 //TX_TDDRC_SLANT_0 +859 0x6000 //TX_TDDRC_SLANT_1 +860 0x0800 //TX_TDDRC_ALPHA_UP_00 +861 0x7EB8 //TX_TDDRC_ALPHA_DWN_00 +862 0x0000 //TX_TDDRC_HMNC_FLAG +863 0x199A //TX_TDDRC_HMNC_GAIN +864 0x0000 //TX_TDDRC_SMT_FLAG +865 0x0CCD //TX_TDDRC_SMT_W +866 0x0E21 //TX_TDDRC_DRC_GAIN +867 0x7FFF //TX_TDDRC_LMT_THRD +868 0x0000 //TX_TDDRC_LMT_ALPHA +869 0x0000 //TX_TFMASKLTH +870 0x0000 //TX_TFMASKLTHL +871 0x0CCD //TX_TFMASKHTH +872 0x0CCD //TX_TFMASKLTH_BINVAD +873 0xF333 //TX_TFMASKLTH_NS_EST +874 0x2CCD //TX_TFMASKLTH_DOA +875 0xECCD //TX_TFMASKTH_BLESSCUT +876 0x1000 //TX_B_LESSCUT_RTO_MASK +877 0x3800 //TX_SB_RHO_MEAN_TH_ABN +878 0x2000 //TX_B_POST_FLT_MASK +879 0x0000 //TX_B_POST_FLT_MASK1 +880 0x5333 //TX_GAIN_WIND_MASK +881 0x7FFF //TX_TFMASK_BFSTRICT_MUSIC +882 0x0000 //TX_TFMASK_BFSTRICT_NOMUSIC +883 0x7333 //TX_FASTNS_OUTIN_TH +884 0x0CCD //TX_FASTNS_TFMASK_TH +885 0x0CCD //TX_FASTNS_TFMASKBIN_TH1 +886 0x0CCD //TX_FASTNS_TFMASKBIN_TH2 +887 0x0CCD //TX_FASTNS_TFMASKBIN_TH3 +888 0x00C8 //TX_FASTNS_ARSPC_TH +889 0xC000 //TX_FASTNS_MASK5_TH +890 0x4848 //TX_POSTSSA_MIN_G_VR_MASK +891 0x4000 //TX_A_LESSCUT_RTO_MASK +892 0x1770 //TX_FASTNS_NOISETH +893 0xC000 //TX_FASTNS_SSA_THLFL +894 0xC000 //TX_FASTNS_SSA_THHFL +895 0xCCCC //TX_FASTNS_SSA_THLFH +896 0xD999 //TX_FASTNS_SSA_THHFH +897 0x2339 //TX_SENDFUNC_REG_MICMUTE +898 0x0021 //TX_SENDFUNC_REG_MICMUTE1 +899 0x02BC //TX_MICMUTE_RATIO_THR +900 0x0140 //TX_MICMUTE_AMP_THR +901 0x0004 //TX_MICMUTE_HPF_IND +902 0x00C0 //TX_MICMUTE_LOG_EYR_TH +903 0x0008 //TX_MICMUTE_CVG_TIME +904 0x0008 //TX_MICMUTE_RELEASE_TIME +905 0x01FE //TX_MIC_VOLUME_MIC0MUTE +906 0x0020 //TX_MICMUTE_EPD_OFFSET_0 +907 0x001E //TX_MICMUTE_FRQ_AEC_L +908 0x7999 //TX_MICMUTE_EAD_THR +909 0x7FFF //TX_MICMUTE_LAMBDA_CB_NLE +910 0x7FFF //TX_MICMUTE_LAMBDA_RE_EST +911 0x4000 //TX_DTD_THR1_MICMUTE_0 +912 0x7000 //TX_DTD_THR1_MICMUTE_1 +913 0x7FFF //TX_DTD_THR1_MICMUTE_2 +914 0x7FFF //TX_DTD_THR1_MICMUTE_3 +915 0x6CCC //TX_DTD_THR2_MICMUTE_0 +916 0x0400 //TX_MICMUTE_MIN_EQ_RE_EST_0 +917 0x0400 //TX_MICMUTE_MIN_EQ_RE_EST_1 +918 0x1000 //TX_MICMUTE_MIN_EQ_RE_EST_2 +919 0x7FFF //TX_MICMUTE_MIN_EQ_RE_EST_3 +920 0x7FFF //TX_MICMUTE_MIN_EQ_RE_EST_4 +921 0x4000 //TX_MICMUTE_C_POST_FLT +922 0x03E8 //TX_MICMUTE_DT_CUT_K +923 0x0001 //TX_MICMUTE_DT_CUT_THR +924 0x03E8 //TX_MICMUTE_DT_CUT_K2 +925 0x0001 //TX_MICMUTE_DT_CUT_THR2 +926 0x0064 //TX_MICMUTE_DT2_HOLD_N +927 0x1000 //TX_MICMUTE_RATIODTH_THCUT +928 0x1000 //TX_MICMUTE_B_POST_FLT_ECHOL +929 0x7FFF //TX_MICMUTE_B_POST_FLT_ECHOH +930 0x0400 //TX_MICMUTE_C_POST_FLT_MASK +931 0x7999 //TX_MICMUTE_RATIODTL_CUT_TH +932 0x0258 //TX_MICMUTE_DT_CUT_K1 +933 0x0800 //TX_MICMUTE_N2_SN_EST +934 0xFC00 //TX_MICMUTE_THR_SN_EST_0 +935 0x001C //TX_MICMUTE_MIN_G_CTRL_0 +936 0x6000 //TX_MICMUTE_A_POST_FILT_S_0 +937 0x7000 //TX_MICMUTE_B_POST_FILT_0 +938 0x2710 //TX_MIC1RUB_AMP_THR +939 0x0010 //TX_MIC1MUTE_RATIO_THR +940 0x0450 //TX_MIC1MUTE_AMP_THR +941 0x0008 //TX_MIC1MUTE_CVG_TIME +942 0x0008 //TX_MIC1MUTE_RELEASE_TIME +943 0x0000 //TX_AMS_RESRV_01 +944 0x0000 //TX_AMS_RESRV_02 +945 0x0000 //TX_AMS_RESRV_03 +946 0x0000 //TX_AMS_RESRV_04 +947 0x0000 //TX_AMS_RESRV_05 +948 0x0000 //TX_AMS_RESRV_06 +949 0x0000 //TX_AMS_RESRV_07 +950 0x0000 //TX_AMS_RESRV_08 +951 0x0000 //TX_AMS_RESRV_09 +952 0x0000 //TX_AMS_RESRV_10 +953 0x0000 //TX_AMS_RESRV_11 +954 0x0000 //TX_AMS_RESRV_12 +955 0x0000 //TX_AMS_RESRV_13 +956 0x0000 //TX_AMS_RESRV_14 +957 0x0000 //TX_AMS_RESRV_15 +958 0x0000 //TX_AMS_RESRV_16 +959 0x0000 //TX_AMS_RESRV_17 +960 0x0000 //TX_AMS_RESRV_18 +961 0x0000 //TX_AMS_RESRV_19 +#RX +0 0x206C //RX_RECVFUNC_MODE_0 +1 0x0000 //RX_RECVFUNC_MODE_1 +2 0x0003 //RX_SAMPLINGFREQ_SIG +3 0x0003 //RX_SAMPLINGFREQ_PROC +4 0x000A //RX_FRAME_SZ +5 0x0000 //RX_DELAY_OPT +6 0x6000 //RX_TDDRC_ALPHA_UP_1 +7 0x6000 //RX_TDDRC_ALPHA_UP_2 +8 0x6000 //RX_TDDRC_ALPHA_UP_3 +9 0x1000 //RX_TDDRC_ALPHA_UP_4 +10 0x0800 //RX_PGA +11 0x7652 //RX_A_HP +12 0x4000 //RX_B_PE +13 0x7800 //RX_THR_PITCH_DET_0 +14 0x7000 //RX_THR_PITCH_DET_1 +15 0x6000 //RX_THR_PITCH_DET_2 +16 0x0008 //RX_PITCH_BFR_LEN +17 0x0003 //RX_SBD_PITCH_DET +18 0x0100 //RX_PP_RESRV_0 +19 0x0020 //RX_PP_RESRV_1 +20 0x0400 //RX_N_SN_EST +21 0x000C //RX_N2_SN_EST +22 0x0010 //RX_NS_LVL_CTRL +23 0xF800 //RX_THR_SN_EST +24 0x7E00 //RX_LAMBDA_PFILT +25 0x000A //RX_FENS_RESRV_0 +26 0x0190 //RX_FENS_RESRV_1 +27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +30 0x0002 //RX_EXTRA_NS_L +31 0x0800 //RX_EXTRA_NS_A +32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +33 0x7214 //RX_TDDRC_LIMITER_THRD +34 0x0800 //RX_TDDRC_LIMITER_GAIN +35 0x199A //RX_A_POST_FLT +36 0x0000 //RX_LMT_THRD +37 0x4000 //RX_LMT_ALPHA +38 0x0020 //RX_FDEQ_SUBNUM +39 0x4848 //RX_FDEQ_GAIN_0 +40 0x3B3B //RX_FDEQ_GAIN_1 +41 0x3942 //RX_FDEQ_GAIN_2 +42 0x4645 //RX_FDEQ_GAIN_3 +43 0x494A //RX_FDEQ_GAIN_4 +44 0x5D5A //RX_FDEQ_GAIN_5 +45 0x5B5B //RX_FDEQ_GAIN_6 +46 0x5A51 //RX_FDEQ_GAIN_7 +47 0x514F //RX_FDEQ_GAIN_8 +48 0x5568 //RX_FDEQ_GAIN_9 +49 0x7460 //RX_FDEQ_GAIN_10 +50 0x544E //RX_FDEQ_GAIN_11 +51 0x4848 //RX_FDEQ_GAIN_12 +52 0x484A //RX_FDEQ_GAIN_13 +53 0x5155 //RX_FDEQ_GAIN_14 +54 0x577B //RX_FDEQ_GAIN_15 +55 0x4848 //RX_FDEQ_GAIN_16 +56 0x4848 //RX_FDEQ_GAIN_17 +57 0x4848 //RX_FDEQ_GAIN_18 +58 0x4848 //RX_FDEQ_GAIN_19 +59 0x4848 //RX_FDEQ_GAIN_20 +60 0x4848 //RX_FDEQ_GAIN_21 +61 0x4848 //RX_FDEQ_GAIN_22 +62 0x4848 //RX_FDEQ_GAIN_23 +63 0x0202 //RX_FDEQ_BIN_0 +64 0x0203 //RX_FDEQ_BIN_1 +65 0x0303 //RX_FDEQ_BIN_2 +66 0x0304 //RX_FDEQ_BIN_3 +67 0x0404 //RX_FDEQ_BIN_4 +68 0x0308 //RX_FDEQ_BIN_5 +69 0x0808 //RX_FDEQ_BIN_6 +70 0x090A //RX_FDEQ_BIN_7 +71 0x0B0C //RX_FDEQ_BIN_8 +72 0x0D0E //RX_FDEQ_BIN_9 +73 0x1013 //RX_FDEQ_BIN_10 +74 0x1719 //RX_FDEQ_BIN_11 +75 0x1B1E //RX_FDEQ_BIN_12 +76 0x1E1E //RX_FDEQ_BIN_13 +77 0x1E28 //RX_FDEQ_BIN_14 +78 0x282C //RX_FDEQ_BIN_15 +79 0x0000 //RX_FDEQ_BIN_16 +80 0x0000 //RX_FDEQ_BIN_17 +81 0x0000 //RX_FDEQ_BIN_18 +82 0x0000 //RX_FDEQ_BIN_19 +83 0x0000 //RX_FDEQ_BIN_20 +84 0x0000 //RX_FDEQ_BIN_21 +85 0x0000 //RX_FDEQ_BIN_22 +86 0x0000 //RX_FDEQ_BIN_23 +87 0x4000 //RX_FDEQ_RESRV_0 +88 0x0320 //RX_FDEQ_RESRV_1 +89 0x0018 //RX_FDDRC_BAND_MARGIN_0 +90 0x0035 //RX_FDDRC_BAND_MARGIN_1 +91 0x00D5 //RX_FDDRC_BAND_MARGIN_2 +92 0x0120 //RX_FDDRC_BAND_MARGIN_3 +93 0x0004 //RX_FDDRC_BLOCK_EXP +94 0x5000 //RX_FDDRC_THRD_2_0 +95 0x5000 //RX_FDDRC_THRD_2_1 +96 0x2000 //RX_FDDRC_THRD_2_2 +97 0x5000 //RX_FDDRC_THRD_2_3 +98 0x6400 //RX_FDDRC_THRD_3_0 +99 0x6400 //RX_FDDRC_THRD_3_1 +100 0x2000 //RX_FDDRC_THRD_3_2 +101 0x5000 //RX_FDDRC_THRD_3_3 +102 0x4000 //RX_FDDRC_SLANT_0_0 +103 0x4000 //RX_FDDRC_SLANT_0_1 +104 0x4000 //RX_FDDRC_SLANT_0_2 +105 0x4000 //RX_FDDRC_SLANT_0_3 +106 0x7FFF //RX_FDDRC_SLANT_1_0 +107 0x7FFF //RX_FDDRC_SLANT_1_1 +108 0x7FFF //RX_FDDRC_SLANT_1_2 +109 0x7FFF //RX_FDDRC_SLANT_1_3 +110 0x0000 //RX_FDDRC_RESRV_0 +111 0x0002 //RX_FILTINDX +112 0x0002 //RX_TDDRC_THRD_0 +113 0x0004 //RX_TDDRC_THRD_1 +114 0x1A00 //RX_TDDRC_THRD_2 +115 0x1A00 //RX_TDDRC_THRD_3 +116 0x7EB8 //RX_TDDRC_SLANT_0 +117 0x2500 //RX_TDDRC_SLANT_1 +118 0x6000 //RX_TDDRC_ALPHA_UP_0 +119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +120 0x0000 //RX_TDDRC_HMNC_FLAG +121 0x199A //RX_TDDRC_HMNC_GAIN +122 0x0001 //RX_TDDRC_SMT_FLAG +123 0x0CCD //RX_TDDRC_SMT_W +124 0x032A //RX_TDDRC_DRC_GAIN +125 0x7C00 //RX_LAMBDA_PKA_FP +126 0x2000 //RX_TPKA_FP +127 0x2000 //RX_MIN_G_FP +128 0x0080 //RX_MAX_G_FP +129 0x0100 //RX_SPK_VOL +130 0x0000 //RX_VOL_RESRV_0 +131 0x0000 //RX_MAXLEVEL_CNG +132 0x3000 //RX_BWE_UV_TH +133 0x3000 //RX_BWE_UV_TH2 +134 0x1800 //RX_BWE_UV_TH3 +135 0x1000 //RX_BWE_V_TH +136 0x04CD //RX_BWE_GAIN1_V_TH1 +137 0x0F33 //RX_BWE_GAIN1_V_TH2 +138 0x7333 //RX_BWE_UV_EQ +139 0x199A //RX_BWE_V_EQ +140 0x7333 //RX_BWE_TONE_TH +141 0x0004 //RX_BWE_UV_HOLD_T +142 0x6CCD //RX_BWE_GAIN2_ALPHA +143 0x799A //RX_BWE_GAIN3_ALPHA +144 0x001E //RX_BWE_CUTOFF +145 0x3000 //RX_BWE_GAINFILL +146 0x3200 //RX_BWE_MAXTH_TONE +147 0x2000 //RX_BWE_EQ_0 +148 0x2000 //RX_BWE_EQ_1 +149 0x2000 //RX_BWE_EQ_2 +150 0x2000 //RX_BWE_EQ_3 +151 0x2000 //RX_BWE_EQ_4 +152 0x2000 //RX_BWE_EQ_5 +153 0x2000 //RX_BWE_EQ_6 +154 0x0000 //RX_BWE_RESRV_0 +155 0x0000 //RX_BWE_RESRV_1 +156 0x0000 //RX_BWE_RESRV_2 +#VOL 0 +6 0x6000 //RX_TDDRC_ALPHA_UP_1 +7 0x6000 //RX_TDDRC_ALPHA_UP_2 +8 0x6000 //RX_TDDRC_ALPHA_UP_3 +9 0x1000 //RX_TDDRC_ALPHA_UP_4 +27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +33 0x7214 //RX_TDDRC_LIMITER_THRD +34 0x0800 //RX_TDDRC_LIMITER_GAIN +112 0x0002 //RX_TDDRC_THRD_0 +113 0x0004 //RX_TDDRC_THRD_1 +114 0x1A00 //RX_TDDRC_THRD_2 +115 0x1A00 //RX_TDDRC_THRD_3 +116 0x7EB8 //RX_TDDRC_SLANT_0 +117 0x2500 //RX_TDDRC_SLANT_1 +118 0x6000 //RX_TDDRC_ALPHA_UP_0 +119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +120 0x0000 //RX_TDDRC_HMNC_FLAG +121 0x199A //RX_TDDRC_HMNC_GAIN +122 0x0001 //RX_TDDRC_SMT_FLAG +123 0x0CCD //RX_TDDRC_SMT_W +124 0x032A //RX_TDDRC_DRC_GAIN +38 0x0020 //RX_FDEQ_SUBNUM +39 0x4848 //RX_FDEQ_GAIN_0 +40 0x3B3B //RX_FDEQ_GAIN_1 +41 0x3942 //RX_FDEQ_GAIN_2 +42 0x4645 //RX_FDEQ_GAIN_3 +43 0x494A //RX_FDEQ_GAIN_4 +44 0x5D5A //RX_FDEQ_GAIN_5 +45 0x5B5B //RX_FDEQ_GAIN_6 +46 0x5A51 //RX_FDEQ_GAIN_7 +47 0x514F //RX_FDEQ_GAIN_8 +48 0x5568 //RX_FDEQ_GAIN_9 +49 0x7460 //RX_FDEQ_GAIN_10 +50 0x544E //RX_FDEQ_GAIN_11 +51 0x4848 //RX_FDEQ_GAIN_12 +52 0x484A //RX_FDEQ_GAIN_13 +53 0x5155 //RX_FDEQ_GAIN_14 +54 0x577B //RX_FDEQ_GAIN_15 +55 0x4848 //RX_FDEQ_GAIN_16 +56 0x4848 //RX_FDEQ_GAIN_17 +57 0x4848 //RX_FDEQ_GAIN_18 +58 0x4848 //RX_FDEQ_GAIN_19 +59 0x4848 //RX_FDEQ_GAIN_20 +60 0x4848 //RX_FDEQ_GAIN_21 +61 0x4848 //RX_FDEQ_GAIN_22 +62 0x4848 //RX_FDEQ_GAIN_23 +63 0x0202 //RX_FDEQ_BIN_0 +64 0x0203 //RX_FDEQ_BIN_1 +65 0x0303 //RX_FDEQ_BIN_2 +66 0x0304 //RX_FDEQ_BIN_3 +67 0x0404 //RX_FDEQ_BIN_4 +68 0x0308 //RX_FDEQ_BIN_5 +69 0x0808 //RX_FDEQ_BIN_6 +70 0x090A //RX_FDEQ_BIN_7 +71 0x0B0C //RX_FDEQ_BIN_8 +72 0x0D0E //RX_FDEQ_BIN_9 +73 0x1013 //RX_FDEQ_BIN_10 +74 0x1719 //RX_FDEQ_BIN_11 +75 0x1B1E //RX_FDEQ_BIN_12 +76 0x1E1E //RX_FDEQ_BIN_13 +77 0x1E28 //RX_FDEQ_BIN_14 +78 0x282C //RX_FDEQ_BIN_15 +79 0x0000 //RX_FDEQ_BIN_16 +80 0x0000 //RX_FDEQ_BIN_17 +81 0x0000 //RX_FDEQ_BIN_18 +82 0x0000 //RX_FDEQ_BIN_19 +83 0x0000 //RX_FDEQ_BIN_20 +84 0x0000 //RX_FDEQ_BIN_21 +85 0x0000 //RX_FDEQ_BIN_22 +86 0x0000 //RX_FDEQ_BIN_23 +87 0x4000 //RX_FDEQ_RESRV_0 +88 0x0320 //RX_FDEQ_RESRV_1 +89 0x0018 //RX_FDDRC_BAND_MARGIN_0 +90 0x0035 //RX_FDDRC_BAND_MARGIN_1 +91 0x00D5 //RX_FDDRC_BAND_MARGIN_2 +92 0x0120 //RX_FDDRC_BAND_MARGIN_3 +93 0x0004 //RX_FDDRC_BLOCK_EXP +94 0x5000 //RX_FDDRC_THRD_2_0 +95 0x5000 //RX_FDDRC_THRD_2_1 +96 0x2000 //RX_FDDRC_THRD_2_2 +97 0x5000 //RX_FDDRC_THRD_2_3 +98 0x6400 //RX_FDDRC_THRD_3_0 +99 0x6400 //RX_FDDRC_THRD_3_1 +100 0x2000 //RX_FDDRC_THRD_3_2 +101 0x5000 //RX_FDDRC_THRD_3_3 +102 0x4000 //RX_FDDRC_SLANT_0_0 +103 0x4000 //RX_FDDRC_SLANT_0_1 +104 0x4000 //RX_FDDRC_SLANT_0_2 +105 0x4000 //RX_FDDRC_SLANT_0_3 +106 0x7FFF //RX_FDDRC_SLANT_1_0 +107 0x7FFF //RX_FDDRC_SLANT_1_1 +108 0x7FFF //RX_FDDRC_SLANT_1_2 +109 0x7FFF //RX_FDDRC_SLANT_1_3 +110 0x0000 //RX_FDDRC_RESRV_0 +129 0x0100 //RX_SPK_VOL +130 0x0000 //RX_VOL_RESRV_0 +#VOL 1 +6 0x6000 //RX_TDDRC_ALPHA_UP_1 +7 0x6000 //RX_TDDRC_ALPHA_UP_2 +8 0x6000 //RX_TDDRC_ALPHA_UP_3 +9 0x1000 //RX_TDDRC_ALPHA_UP_4 +27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +33 0x7214 //RX_TDDRC_LIMITER_THRD +34 0x0800 //RX_TDDRC_LIMITER_GAIN +112 0x0002 //RX_TDDRC_THRD_0 +113 0x0004 //RX_TDDRC_THRD_1 +114 0x1A00 //RX_TDDRC_THRD_2 +115 0x1A00 //RX_TDDRC_THRD_3 +116 0x7EB8 //RX_TDDRC_SLANT_0 +117 0x2500 //RX_TDDRC_SLANT_1 +118 0x6000 //RX_TDDRC_ALPHA_UP_0 +119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +120 0x0000 //RX_TDDRC_HMNC_FLAG +121 0x199A //RX_TDDRC_HMNC_GAIN +122 0x0001 //RX_TDDRC_SMT_FLAG +123 0x0CCD //RX_TDDRC_SMT_W +124 0x032A //RX_TDDRC_DRC_GAIN +38 0x0020 //RX_FDEQ_SUBNUM +39 0x4848 //RX_FDEQ_GAIN_0 +40 0x3B3B //RX_FDEQ_GAIN_1 +41 0x3942 //RX_FDEQ_GAIN_2 +42 0x4645 //RX_FDEQ_GAIN_3 +43 0x494A //RX_FDEQ_GAIN_4 +44 0x5D5A //RX_FDEQ_GAIN_5 +45 0x5B5B //RX_FDEQ_GAIN_6 +46 0x5A51 //RX_FDEQ_GAIN_7 +47 0x514F //RX_FDEQ_GAIN_8 +48 0x5568 //RX_FDEQ_GAIN_9 +49 0x7460 //RX_FDEQ_GAIN_10 +50 0x544E //RX_FDEQ_GAIN_11 +51 0x4848 //RX_FDEQ_GAIN_12 +52 0x484A //RX_FDEQ_GAIN_13 +53 0x5155 //RX_FDEQ_GAIN_14 +54 0x577B //RX_FDEQ_GAIN_15 +55 0x4848 //RX_FDEQ_GAIN_16 +56 0x4848 //RX_FDEQ_GAIN_17 +57 0x4848 //RX_FDEQ_GAIN_18 +58 0x4848 //RX_FDEQ_GAIN_19 +59 0x4848 //RX_FDEQ_GAIN_20 +60 0x4848 //RX_FDEQ_GAIN_21 +61 0x4848 //RX_FDEQ_GAIN_22 +62 0x4848 //RX_FDEQ_GAIN_23 +63 0x0202 //RX_FDEQ_BIN_0 +64 0x0203 //RX_FDEQ_BIN_1 +65 0x0303 //RX_FDEQ_BIN_2 +66 0x0304 //RX_FDEQ_BIN_3 +67 0x0404 //RX_FDEQ_BIN_4 +68 0x0308 //RX_FDEQ_BIN_5 +69 0x0808 //RX_FDEQ_BIN_6 +70 0x090A //RX_FDEQ_BIN_7 +71 0x0B0C //RX_FDEQ_BIN_8 +72 0x0D0E //RX_FDEQ_BIN_9 +73 0x1013 //RX_FDEQ_BIN_10 +74 0x1719 //RX_FDEQ_BIN_11 +75 0x1B1E //RX_FDEQ_BIN_12 +76 0x1E1E //RX_FDEQ_BIN_13 +77 0x1E28 //RX_FDEQ_BIN_14 +78 0x282C //RX_FDEQ_BIN_15 +79 0x0000 //RX_FDEQ_BIN_16 +80 0x0000 //RX_FDEQ_BIN_17 +81 0x0000 //RX_FDEQ_BIN_18 +82 0x0000 //RX_FDEQ_BIN_19 +83 0x0000 //RX_FDEQ_BIN_20 +84 0x0000 //RX_FDEQ_BIN_21 +85 0x0000 //RX_FDEQ_BIN_22 +86 0x0000 //RX_FDEQ_BIN_23 +87 0x4000 //RX_FDEQ_RESRV_0 +88 0x0320 //RX_FDEQ_RESRV_1 +89 0x0018 //RX_FDDRC_BAND_MARGIN_0 +90 0x0035 //RX_FDDRC_BAND_MARGIN_1 +91 0x00D5 //RX_FDDRC_BAND_MARGIN_2 +92 0x0120 //RX_FDDRC_BAND_MARGIN_3 +93 0x0004 //RX_FDDRC_BLOCK_EXP +94 0x5000 //RX_FDDRC_THRD_2_0 +95 0x5000 //RX_FDDRC_THRD_2_1 +96 0x2000 //RX_FDDRC_THRD_2_2 +97 0x5000 //RX_FDDRC_THRD_2_3 +98 0x6400 //RX_FDDRC_THRD_3_0 +99 0x6400 //RX_FDDRC_THRD_3_1 +100 0x2000 //RX_FDDRC_THRD_3_2 +101 0x5000 //RX_FDDRC_THRD_3_3 +102 0x4000 //RX_FDDRC_SLANT_0_0 +103 0x4000 //RX_FDDRC_SLANT_0_1 +104 0x4000 //RX_FDDRC_SLANT_0_2 +105 0x4000 //RX_FDDRC_SLANT_0_3 +106 0x7FFF //RX_FDDRC_SLANT_1_0 +107 0x7FFF //RX_FDDRC_SLANT_1_1 +108 0x7FFF //RX_FDDRC_SLANT_1_2 +109 0x7FFF //RX_FDDRC_SLANT_1_3 +110 0x0000 //RX_FDDRC_RESRV_0 +129 0x001D //RX_SPK_VOL +130 0x0000 //RX_VOL_RESRV_0 +#VOL 2 +6 0x6000 //RX_TDDRC_ALPHA_UP_1 +7 0x6000 //RX_TDDRC_ALPHA_UP_2 +8 0x6000 //RX_TDDRC_ALPHA_UP_3 +9 0x1000 //RX_TDDRC_ALPHA_UP_4 +27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +33 0x7214 //RX_TDDRC_LIMITER_THRD +34 0x0800 //RX_TDDRC_LIMITER_GAIN +112 0x0002 //RX_TDDRC_THRD_0 +113 0x0004 //RX_TDDRC_THRD_1 +114 0x1A00 //RX_TDDRC_THRD_2 +115 0x1A00 //RX_TDDRC_THRD_3 +116 0x7EB8 //RX_TDDRC_SLANT_0 +117 0x2500 //RX_TDDRC_SLANT_1 +118 0x6000 //RX_TDDRC_ALPHA_UP_0 +119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +120 0x0000 //RX_TDDRC_HMNC_FLAG +121 0x199A //RX_TDDRC_HMNC_GAIN +122 0x0001 //RX_TDDRC_SMT_FLAG +123 0x0CCD //RX_TDDRC_SMT_W +124 0x032A //RX_TDDRC_DRC_GAIN +38 0x0020 //RX_FDEQ_SUBNUM +39 0x4848 //RX_FDEQ_GAIN_0 +40 0x3B3B //RX_FDEQ_GAIN_1 +41 0x3942 //RX_FDEQ_GAIN_2 +42 0x4645 //RX_FDEQ_GAIN_3 +43 0x494A //RX_FDEQ_GAIN_4 +44 0x5D5A //RX_FDEQ_GAIN_5 +45 0x5B5B //RX_FDEQ_GAIN_6 +46 0x5A51 //RX_FDEQ_GAIN_7 +47 0x514F //RX_FDEQ_GAIN_8 +48 0x5568 //RX_FDEQ_GAIN_9 +49 0x7460 //RX_FDEQ_GAIN_10 +50 0x544E //RX_FDEQ_GAIN_11 +51 0x4848 //RX_FDEQ_GAIN_12 +52 0x484A //RX_FDEQ_GAIN_13 +53 0x5155 //RX_FDEQ_GAIN_14 +54 0x577B //RX_FDEQ_GAIN_15 +55 0x4848 //RX_FDEQ_GAIN_16 +56 0x4848 //RX_FDEQ_GAIN_17 +57 0x4848 //RX_FDEQ_GAIN_18 +58 0x4848 //RX_FDEQ_GAIN_19 +59 0x4848 //RX_FDEQ_GAIN_20 +60 0x4848 //RX_FDEQ_GAIN_21 +61 0x4848 //RX_FDEQ_GAIN_22 +62 0x4848 //RX_FDEQ_GAIN_23 +63 0x0202 //RX_FDEQ_BIN_0 +64 0x0203 //RX_FDEQ_BIN_1 +65 0x0303 //RX_FDEQ_BIN_2 +66 0x0304 //RX_FDEQ_BIN_3 +67 0x0404 //RX_FDEQ_BIN_4 +68 0x0308 //RX_FDEQ_BIN_5 +69 0x0808 //RX_FDEQ_BIN_6 +70 0x090A //RX_FDEQ_BIN_7 +71 0x0B0C //RX_FDEQ_BIN_8 +72 0x0D0E //RX_FDEQ_BIN_9 +73 0x1013 //RX_FDEQ_BIN_10 +74 0x1719 //RX_FDEQ_BIN_11 +75 0x1B1E //RX_FDEQ_BIN_12 +76 0x1E1E //RX_FDEQ_BIN_13 +77 0x1E28 //RX_FDEQ_BIN_14 +78 0x282C //RX_FDEQ_BIN_15 +79 0x0000 //RX_FDEQ_BIN_16 +80 0x0000 //RX_FDEQ_BIN_17 +81 0x0000 //RX_FDEQ_BIN_18 +82 0x0000 //RX_FDEQ_BIN_19 +83 0x0000 //RX_FDEQ_BIN_20 +84 0x0000 //RX_FDEQ_BIN_21 +85 0x0000 //RX_FDEQ_BIN_22 +86 0x0000 //RX_FDEQ_BIN_23 +87 0x4000 //RX_FDEQ_RESRV_0 +88 0x0320 //RX_FDEQ_RESRV_1 +89 0x0018 //RX_FDDRC_BAND_MARGIN_0 +90 0x0035 //RX_FDDRC_BAND_MARGIN_1 +91 0x00D5 //RX_FDDRC_BAND_MARGIN_2 +92 0x0120 //RX_FDDRC_BAND_MARGIN_3 +93 0x0004 //RX_FDDRC_BLOCK_EXP +94 0x5000 //RX_FDDRC_THRD_2_0 +95 0x5000 //RX_FDDRC_THRD_2_1 +96 0x2000 //RX_FDDRC_THRD_2_2 +97 0x5000 //RX_FDDRC_THRD_2_3 +98 0x6400 //RX_FDDRC_THRD_3_0 +99 0x6400 //RX_FDDRC_THRD_3_1 +100 0x2000 //RX_FDDRC_THRD_3_2 +101 0x5000 //RX_FDDRC_THRD_3_3 +102 0x4000 //RX_FDDRC_SLANT_0_0 +103 0x4000 //RX_FDDRC_SLANT_0_1 +104 0x4000 //RX_FDDRC_SLANT_0_2 +105 0x4000 //RX_FDDRC_SLANT_0_3 +106 0x7FFF //RX_FDDRC_SLANT_1_0 +107 0x7FFF //RX_FDDRC_SLANT_1_1 +108 0x7FFF //RX_FDDRC_SLANT_1_2 +109 0x7FFF //RX_FDDRC_SLANT_1_3 +110 0x0000 //RX_FDDRC_RESRV_0 +129 0x0029 //RX_SPK_VOL +130 0x0000 //RX_VOL_RESRV_0 +#VOL 3 +6 0x6000 //RX_TDDRC_ALPHA_UP_1 +7 0x6000 //RX_TDDRC_ALPHA_UP_2 +8 0x6000 //RX_TDDRC_ALPHA_UP_3 +9 0x1000 //RX_TDDRC_ALPHA_UP_4 +27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +33 0x7214 //RX_TDDRC_LIMITER_THRD +34 0x0800 //RX_TDDRC_LIMITER_GAIN +112 0x0002 //RX_TDDRC_THRD_0 +113 0x0004 //RX_TDDRC_THRD_1 +114 0x1A00 //RX_TDDRC_THRD_2 +115 0x1A00 //RX_TDDRC_THRD_3 +116 0x7EB8 //RX_TDDRC_SLANT_0 +117 0x2500 //RX_TDDRC_SLANT_1 +118 0x6000 //RX_TDDRC_ALPHA_UP_0 +119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +120 0x0000 //RX_TDDRC_HMNC_FLAG +121 0x199A //RX_TDDRC_HMNC_GAIN +122 0x0001 //RX_TDDRC_SMT_FLAG +123 0x0CCD //RX_TDDRC_SMT_W +124 0x032A //RX_TDDRC_DRC_GAIN +38 0x0020 //RX_FDEQ_SUBNUM +39 0x4848 //RX_FDEQ_GAIN_0 +40 0x3B3B //RX_FDEQ_GAIN_1 +41 0x3942 //RX_FDEQ_GAIN_2 +42 0x4645 //RX_FDEQ_GAIN_3 +43 0x494A //RX_FDEQ_GAIN_4 +44 0x5D5A //RX_FDEQ_GAIN_5 +45 0x5B5B //RX_FDEQ_GAIN_6 +46 0x5A51 //RX_FDEQ_GAIN_7 +47 0x514F //RX_FDEQ_GAIN_8 +48 0x5568 //RX_FDEQ_GAIN_9 +49 0x7460 //RX_FDEQ_GAIN_10 +50 0x544E //RX_FDEQ_GAIN_11 +51 0x4848 //RX_FDEQ_GAIN_12 +52 0x484A //RX_FDEQ_GAIN_13 +53 0x5155 //RX_FDEQ_GAIN_14 +54 0x577B //RX_FDEQ_GAIN_15 +55 0x4848 //RX_FDEQ_GAIN_16 +56 0x4848 //RX_FDEQ_GAIN_17 +57 0x4848 //RX_FDEQ_GAIN_18 +58 0x4848 //RX_FDEQ_GAIN_19 +59 0x4848 //RX_FDEQ_GAIN_20 +60 0x4848 //RX_FDEQ_GAIN_21 +61 0x4848 //RX_FDEQ_GAIN_22 +62 0x4848 //RX_FDEQ_GAIN_23 +63 0x0202 //RX_FDEQ_BIN_0 +64 0x0203 //RX_FDEQ_BIN_1 +65 0x0303 //RX_FDEQ_BIN_2 +66 0x0304 //RX_FDEQ_BIN_3 +67 0x0404 //RX_FDEQ_BIN_4 +68 0x0308 //RX_FDEQ_BIN_5 +69 0x0808 //RX_FDEQ_BIN_6 +70 0x090A //RX_FDEQ_BIN_7 +71 0x0B0C //RX_FDEQ_BIN_8 +72 0x0D0E //RX_FDEQ_BIN_9 +73 0x1013 //RX_FDEQ_BIN_10 +74 0x1719 //RX_FDEQ_BIN_11 +75 0x1B1E //RX_FDEQ_BIN_12 +76 0x1E1E //RX_FDEQ_BIN_13 +77 0x1E28 //RX_FDEQ_BIN_14 +78 0x282C //RX_FDEQ_BIN_15 +79 0x0000 //RX_FDEQ_BIN_16 +80 0x0000 //RX_FDEQ_BIN_17 +81 0x0000 //RX_FDEQ_BIN_18 +82 0x0000 //RX_FDEQ_BIN_19 +83 0x0000 //RX_FDEQ_BIN_20 +84 0x0000 //RX_FDEQ_BIN_21 +85 0x0000 //RX_FDEQ_BIN_22 +86 0x0000 //RX_FDEQ_BIN_23 +87 0x4000 //RX_FDEQ_RESRV_0 +88 0x0320 //RX_FDEQ_RESRV_1 +89 0x0018 //RX_FDDRC_BAND_MARGIN_0 +90 0x0035 //RX_FDDRC_BAND_MARGIN_1 +91 0x00D5 //RX_FDDRC_BAND_MARGIN_2 +92 0x0120 //RX_FDDRC_BAND_MARGIN_3 +93 0x0004 //RX_FDDRC_BLOCK_EXP +94 0x5000 //RX_FDDRC_THRD_2_0 +95 0x5000 //RX_FDDRC_THRD_2_1 +96 0x2000 //RX_FDDRC_THRD_2_2 +97 0x5000 //RX_FDDRC_THRD_2_3 +98 0x6400 //RX_FDDRC_THRD_3_0 +99 0x6400 //RX_FDDRC_THRD_3_1 +100 0x2000 //RX_FDDRC_THRD_3_2 +101 0x5000 //RX_FDDRC_THRD_3_3 +102 0x4000 //RX_FDDRC_SLANT_0_0 +103 0x4000 //RX_FDDRC_SLANT_0_1 +104 0x4000 //RX_FDDRC_SLANT_0_2 +105 0x4000 //RX_FDDRC_SLANT_0_3 +106 0x7FFF //RX_FDDRC_SLANT_1_0 +107 0x7FFF //RX_FDDRC_SLANT_1_1 +108 0x7FFF //RX_FDDRC_SLANT_1_2 +109 0x7FFF //RX_FDDRC_SLANT_1_3 +110 0x0000 //RX_FDDRC_RESRV_0 +129 0x0039 //RX_SPK_VOL +130 0x0000 //RX_VOL_RESRV_0 +#VOL 4 +6 0x6000 //RX_TDDRC_ALPHA_UP_1 +7 0x6000 //RX_TDDRC_ALPHA_UP_2 +8 0x6000 //RX_TDDRC_ALPHA_UP_3 +9 0x1000 //RX_TDDRC_ALPHA_UP_4 +27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +33 0x7214 //RX_TDDRC_LIMITER_THRD +34 0x0800 //RX_TDDRC_LIMITER_GAIN +112 0x0002 //RX_TDDRC_THRD_0 +113 0x0004 //RX_TDDRC_THRD_1 +114 0x1A00 //RX_TDDRC_THRD_2 +115 0x1A00 //RX_TDDRC_THRD_3 +116 0x7EB8 //RX_TDDRC_SLANT_0 +117 0x2500 //RX_TDDRC_SLANT_1 +118 0x6000 //RX_TDDRC_ALPHA_UP_0 +119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +120 0x0000 //RX_TDDRC_HMNC_FLAG +121 0x199A //RX_TDDRC_HMNC_GAIN +122 0x0001 //RX_TDDRC_SMT_FLAG +123 0x0CCD //RX_TDDRC_SMT_W +124 0x032A //RX_TDDRC_DRC_GAIN +38 0x0020 //RX_FDEQ_SUBNUM +39 0x4848 //RX_FDEQ_GAIN_0 +40 0x3B3B //RX_FDEQ_GAIN_1 +41 0x3942 //RX_FDEQ_GAIN_2 +42 0x4645 //RX_FDEQ_GAIN_3 +43 0x494A //RX_FDEQ_GAIN_4 +44 0x5D5A //RX_FDEQ_GAIN_5 +45 0x5B5B //RX_FDEQ_GAIN_6 +46 0x5A51 //RX_FDEQ_GAIN_7 +47 0x514F //RX_FDEQ_GAIN_8 +48 0x5568 //RX_FDEQ_GAIN_9 +49 0x7460 //RX_FDEQ_GAIN_10 +50 0x544E //RX_FDEQ_GAIN_11 +51 0x4848 //RX_FDEQ_GAIN_12 +52 0x484A //RX_FDEQ_GAIN_13 +53 0x5155 //RX_FDEQ_GAIN_14 +54 0x577B //RX_FDEQ_GAIN_15 +55 0x4848 //RX_FDEQ_GAIN_16 +56 0x4848 //RX_FDEQ_GAIN_17 +57 0x4848 //RX_FDEQ_GAIN_18 +58 0x4848 //RX_FDEQ_GAIN_19 +59 0x4848 //RX_FDEQ_GAIN_20 +60 0x4848 //RX_FDEQ_GAIN_21 +61 0x4848 //RX_FDEQ_GAIN_22 +62 0x4848 //RX_FDEQ_GAIN_23 +63 0x0202 //RX_FDEQ_BIN_0 +64 0x0203 //RX_FDEQ_BIN_1 +65 0x0303 //RX_FDEQ_BIN_2 +66 0x0304 //RX_FDEQ_BIN_3 +67 0x0404 //RX_FDEQ_BIN_4 +68 0x0308 //RX_FDEQ_BIN_5 +69 0x0808 //RX_FDEQ_BIN_6 +70 0x090A //RX_FDEQ_BIN_7 +71 0x0B0C //RX_FDEQ_BIN_8 +72 0x0D0E //RX_FDEQ_BIN_9 +73 0x1013 //RX_FDEQ_BIN_10 +74 0x1719 //RX_FDEQ_BIN_11 +75 0x1B1E //RX_FDEQ_BIN_12 +76 0x1E1E //RX_FDEQ_BIN_13 +77 0x1E28 //RX_FDEQ_BIN_14 +78 0x282C //RX_FDEQ_BIN_15 +79 0x0000 //RX_FDEQ_BIN_16 +80 0x0000 //RX_FDEQ_BIN_17 +81 0x0000 //RX_FDEQ_BIN_18 +82 0x0000 //RX_FDEQ_BIN_19 +83 0x0000 //RX_FDEQ_BIN_20 +84 0x0000 //RX_FDEQ_BIN_21 +85 0x0000 //RX_FDEQ_BIN_22 +86 0x0000 //RX_FDEQ_BIN_23 +87 0x4000 //RX_FDEQ_RESRV_0 +88 0x0320 //RX_FDEQ_RESRV_1 +89 0x0018 //RX_FDDRC_BAND_MARGIN_0 +90 0x0035 //RX_FDDRC_BAND_MARGIN_1 +91 0x00D5 //RX_FDDRC_BAND_MARGIN_2 +92 0x0120 //RX_FDDRC_BAND_MARGIN_3 +93 0x0004 //RX_FDDRC_BLOCK_EXP +94 0x5000 //RX_FDDRC_THRD_2_0 +95 0x5000 //RX_FDDRC_THRD_2_1 +96 0x2000 //RX_FDDRC_THRD_2_2 +97 0x5000 //RX_FDDRC_THRD_2_3 +98 0x6400 //RX_FDDRC_THRD_3_0 +99 0x6400 //RX_FDDRC_THRD_3_1 +100 0x2000 //RX_FDDRC_THRD_3_2 +101 0x5000 //RX_FDDRC_THRD_3_3 +102 0x4000 //RX_FDDRC_SLANT_0_0 +103 0x4000 //RX_FDDRC_SLANT_0_1 +104 0x4000 //RX_FDDRC_SLANT_0_2 +105 0x4000 //RX_FDDRC_SLANT_0_3 +106 0x7FFF //RX_FDDRC_SLANT_1_0 +107 0x7FFF //RX_FDDRC_SLANT_1_1 +108 0x7FFF //RX_FDDRC_SLANT_1_2 +109 0x7FFF //RX_FDDRC_SLANT_1_3 +110 0x0000 //RX_FDDRC_RESRV_0 +129 0x005F //RX_SPK_VOL +130 0x0000 //RX_VOL_RESRV_0 +#VOL 5 +6 0x6000 //RX_TDDRC_ALPHA_UP_1 +7 0x6000 //RX_TDDRC_ALPHA_UP_2 +8 0x6000 //RX_TDDRC_ALPHA_UP_3 +9 0x1000 //RX_TDDRC_ALPHA_UP_4 +27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +33 0x7214 //RX_TDDRC_LIMITER_THRD +34 0x0800 //RX_TDDRC_LIMITER_GAIN +112 0x0002 //RX_TDDRC_THRD_0 +113 0x0004 //RX_TDDRC_THRD_1 +114 0x1A00 //RX_TDDRC_THRD_2 +115 0x1A00 //RX_TDDRC_THRD_3 +116 0x7EB8 //RX_TDDRC_SLANT_0 +117 0x2500 //RX_TDDRC_SLANT_1 +118 0x6000 //RX_TDDRC_ALPHA_UP_0 +119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +120 0x0000 //RX_TDDRC_HMNC_FLAG +121 0x199A //RX_TDDRC_HMNC_GAIN +122 0x0001 //RX_TDDRC_SMT_FLAG +123 0x0CCD //RX_TDDRC_SMT_W +124 0x032A //RX_TDDRC_DRC_GAIN +38 0x0020 //RX_FDEQ_SUBNUM +39 0x4848 //RX_FDEQ_GAIN_0 +40 0x3B3B //RX_FDEQ_GAIN_1 +41 0x3942 //RX_FDEQ_GAIN_2 +42 0x4645 //RX_FDEQ_GAIN_3 +43 0x494A //RX_FDEQ_GAIN_4 +44 0x5D5A //RX_FDEQ_GAIN_5 +45 0x5B5B //RX_FDEQ_GAIN_6 +46 0x5A51 //RX_FDEQ_GAIN_7 +47 0x514F //RX_FDEQ_GAIN_8 +48 0x5568 //RX_FDEQ_GAIN_9 +49 0x7460 //RX_FDEQ_GAIN_10 +50 0x544E //RX_FDEQ_GAIN_11 +51 0x4848 //RX_FDEQ_GAIN_12 +52 0x484A //RX_FDEQ_GAIN_13 +53 0x5155 //RX_FDEQ_GAIN_14 +54 0x577B //RX_FDEQ_GAIN_15 +55 0x4848 //RX_FDEQ_GAIN_16 +56 0x4848 //RX_FDEQ_GAIN_17 +57 0x4848 //RX_FDEQ_GAIN_18 +58 0x4848 //RX_FDEQ_GAIN_19 +59 0x4848 //RX_FDEQ_GAIN_20 +60 0x4848 //RX_FDEQ_GAIN_21 +61 0x4848 //RX_FDEQ_GAIN_22 +62 0x4848 //RX_FDEQ_GAIN_23 +63 0x0202 //RX_FDEQ_BIN_0 +64 0x0203 //RX_FDEQ_BIN_1 +65 0x0303 //RX_FDEQ_BIN_2 +66 0x0304 //RX_FDEQ_BIN_3 +67 0x0404 //RX_FDEQ_BIN_4 +68 0x0308 //RX_FDEQ_BIN_5 +69 0x0808 //RX_FDEQ_BIN_6 +70 0x090A //RX_FDEQ_BIN_7 +71 0x0B0C //RX_FDEQ_BIN_8 +72 0x0D0E //RX_FDEQ_BIN_9 +73 0x1013 //RX_FDEQ_BIN_10 +74 0x1719 //RX_FDEQ_BIN_11 +75 0x1B1E //RX_FDEQ_BIN_12 +76 0x1E1E //RX_FDEQ_BIN_13 +77 0x1E28 //RX_FDEQ_BIN_14 +78 0x282C //RX_FDEQ_BIN_15 +79 0x0000 //RX_FDEQ_BIN_16 +80 0x0000 //RX_FDEQ_BIN_17 +81 0x0000 //RX_FDEQ_BIN_18 +82 0x0000 //RX_FDEQ_BIN_19 +83 0x0000 //RX_FDEQ_BIN_20 +84 0x0000 //RX_FDEQ_BIN_21 +85 0x0000 //RX_FDEQ_BIN_22 +86 0x0000 //RX_FDEQ_BIN_23 +87 0x4000 //RX_FDEQ_RESRV_0 +88 0x0320 //RX_FDEQ_RESRV_1 +89 0x0018 //RX_FDDRC_BAND_MARGIN_0 +90 0x0035 //RX_FDDRC_BAND_MARGIN_1 +91 0x00D5 //RX_FDDRC_BAND_MARGIN_2 +92 0x0120 //RX_FDDRC_BAND_MARGIN_3 +93 0x0004 //RX_FDDRC_BLOCK_EXP +94 0x5000 //RX_FDDRC_THRD_2_0 +95 0x5000 //RX_FDDRC_THRD_2_1 +96 0x2000 //RX_FDDRC_THRD_2_2 +97 0x5000 //RX_FDDRC_THRD_2_3 +98 0x6400 //RX_FDDRC_THRD_3_0 +99 0x6400 //RX_FDDRC_THRD_3_1 +100 0x2000 //RX_FDDRC_THRD_3_2 +101 0x5000 //RX_FDDRC_THRD_3_3 +102 0x4000 //RX_FDDRC_SLANT_0_0 +103 0x4000 //RX_FDDRC_SLANT_0_1 +104 0x4000 //RX_FDDRC_SLANT_0_2 +105 0x4000 //RX_FDDRC_SLANT_0_3 +106 0x7FFF //RX_FDDRC_SLANT_1_0 +107 0x7FFF //RX_FDDRC_SLANT_1_1 +108 0x7FFF //RX_FDDRC_SLANT_1_2 +109 0x7FFF //RX_FDDRC_SLANT_1_3 +110 0x0000 //RX_FDDRC_RESRV_0 +129 0x008E //RX_SPK_VOL +130 0x0000 //RX_VOL_RESRV_0 +#VOL 6 +6 0x6000 //RX_TDDRC_ALPHA_UP_1 +7 0x6000 //RX_TDDRC_ALPHA_UP_2 +8 0x6000 //RX_TDDRC_ALPHA_UP_3 +9 0x1000 //RX_TDDRC_ALPHA_UP_4 +27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +33 0x7214 //RX_TDDRC_LIMITER_THRD +34 0x0800 //RX_TDDRC_LIMITER_GAIN +112 0x0002 //RX_TDDRC_THRD_0 +113 0x0004 //RX_TDDRC_THRD_1 +114 0x1A00 //RX_TDDRC_THRD_2 +115 0x1A00 //RX_TDDRC_THRD_3 +116 0x7EB8 //RX_TDDRC_SLANT_0 +117 0x2500 //RX_TDDRC_SLANT_1 +118 0x6000 //RX_TDDRC_ALPHA_UP_0 +119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +120 0x0000 //RX_TDDRC_HMNC_FLAG +121 0x199A //RX_TDDRC_HMNC_GAIN +122 0x0001 //RX_TDDRC_SMT_FLAG +123 0x0CCD //RX_TDDRC_SMT_W +124 0x032A //RX_TDDRC_DRC_GAIN +38 0x0020 //RX_FDEQ_SUBNUM +39 0x4848 //RX_FDEQ_GAIN_0 +40 0x3B3B //RX_FDEQ_GAIN_1 +41 0x3942 //RX_FDEQ_GAIN_2 +42 0x4645 //RX_FDEQ_GAIN_3 +43 0x494A //RX_FDEQ_GAIN_4 +44 0x5D5A //RX_FDEQ_GAIN_5 +45 0x5B5B //RX_FDEQ_GAIN_6 +46 0x5A51 //RX_FDEQ_GAIN_7 +47 0x514F //RX_FDEQ_GAIN_8 +48 0x5568 //RX_FDEQ_GAIN_9 +49 0x7460 //RX_FDEQ_GAIN_10 +50 0x544E //RX_FDEQ_GAIN_11 +51 0x4848 //RX_FDEQ_GAIN_12 +52 0x484A //RX_FDEQ_GAIN_13 +53 0x5155 //RX_FDEQ_GAIN_14 +54 0x577B //RX_FDEQ_GAIN_15 +55 0x4848 //RX_FDEQ_GAIN_16 +56 0x4848 //RX_FDEQ_GAIN_17 +57 0x4848 //RX_FDEQ_GAIN_18 +58 0x4848 //RX_FDEQ_GAIN_19 +59 0x4848 //RX_FDEQ_GAIN_20 +60 0x4848 //RX_FDEQ_GAIN_21 +61 0x4848 //RX_FDEQ_GAIN_22 +62 0x4848 //RX_FDEQ_GAIN_23 +63 0x0202 //RX_FDEQ_BIN_0 +64 0x0203 //RX_FDEQ_BIN_1 +65 0x0303 //RX_FDEQ_BIN_2 +66 0x0304 //RX_FDEQ_BIN_3 +67 0x0404 //RX_FDEQ_BIN_4 +68 0x0308 //RX_FDEQ_BIN_5 +69 0x0808 //RX_FDEQ_BIN_6 +70 0x090A //RX_FDEQ_BIN_7 +71 0x0B0C //RX_FDEQ_BIN_8 +72 0x0D0E //RX_FDEQ_BIN_9 +73 0x1013 //RX_FDEQ_BIN_10 +74 0x1719 //RX_FDEQ_BIN_11 +75 0x1B1E //RX_FDEQ_BIN_12 +76 0x1E1E //RX_FDEQ_BIN_13 +77 0x1E28 //RX_FDEQ_BIN_14 +78 0x282C //RX_FDEQ_BIN_15 +79 0x0000 //RX_FDEQ_BIN_16 +80 0x0000 //RX_FDEQ_BIN_17 +81 0x0000 //RX_FDEQ_BIN_18 +82 0x0000 //RX_FDEQ_BIN_19 +83 0x0000 //RX_FDEQ_BIN_20 +84 0x0000 //RX_FDEQ_BIN_21 +85 0x0000 //RX_FDEQ_BIN_22 +86 0x0000 //RX_FDEQ_BIN_23 +87 0x4000 //RX_FDEQ_RESRV_0 +88 0x0320 //RX_FDEQ_RESRV_1 +89 0x0018 //RX_FDDRC_BAND_MARGIN_0 +90 0x0035 //RX_FDDRC_BAND_MARGIN_1 +91 0x00D5 //RX_FDDRC_BAND_MARGIN_2 +92 0x0120 //RX_FDDRC_BAND_MARGIN_3 +93 0x0004 //RX_FDDRC_BLOCK_EXP +94 0x5000 //RX_FDDRC_THRD_2_0 +95 0x5000 //RX_FDDRC_THRD_2_1 +96 0x2000 //RX_FDDRC_THRD_2_2 +97 0x5000 //RX_FDDRC_THRD_2_3 +98 0x6400 //RX_FDDRC_THRD_3_0 +99 0x6400 //RX_FDDRC_THRD_3_1 +100 0x2000 //RX_FDDRC_THRD_3_2 +101 0x5000 //RX_FDDRC_THRD_3_3 +102 0x4000 //RX_FDDRC_SLANT_0_0 +103 0x4000 //RX_FDDRC_SLANT_0_1 +104 0x4000 //RX_FDDRC_SLANT_0_2 +105 0x4000 //RX_FDDRC_SLANT_0_3 +106 0x7FFF //RX_FDDRC_SLANT_1_0 +107 0x7FFF //RX_FDDRC_SLANT_1_1 +108 0x7FFF //RX_FDDRC_SLANT_1_2 +109 0x7FFF //RX_FDDRC_SLANT_1_3 +110 0x0000 //RX_FDDRC_RESRV_0 +129 0x0100 //RX_SPK_VOL +130 0x0000 //RX_VOL_RESRV_0 +#RX 2 +157 0x027C //RX_RECVFUNC_MODE_0 +158 0x0000 //RX_RECVFUNC_MODE_1 +159 0x0003 //RX_SAMPLINGFREQ_SIG +160 0x0003 //RX_SAMPLINGFREQ_PROC +161 0x000A //RX_FRAME_SZ +162 0x0000 //RX_DELAY_OPT +163 0x6000 //RX_TDDRC_ALPHA_UP_1 +164 0x6000 //RX_TDDRC_ALPHA_UP_2 +165 0x6000 //RX_TDDRC_ALPHA_UP_3 +166 0x1000 //RX_TDDRC_ALPHA_UP_4 +167 0x0800 //RX_PGA +168 0x7652 //RX_A_HP +169 0x4000 //RX_B_PE +170 0x7800 //RX_THR_PITCH_DET_0 +171 0x7000 //RX_THR_PITCH_DET_1 +172 0x6000 //RX_THR_PITCH_DET_2 +173 0x0008 //RX_PITCH_BFR_LEN +174 0x0003 //RX_SBD_PITCH_DET +175 0x0100 //RX_PP_RESRV_0 +176 0x0020 //RX_PP_RESRV_1 +177 0x0400 //RX_N_SN_EST +178 0x000C //RX_N2_SN_EST +179 0x0010 //RX_NS_LVL_CTRL +180 0xF800 //RX_THR_SN_EST +181 0x7E00 //RX_LAMBDA_PFILT +182 0x000A //RX_FENS_RESRV_0 +183 0x0190 //RX_FENS_RESRV_1 +184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +187 0x0002 //RX_EXTRA_NS_L +188 0x0800 //RX_EXTRA_NS_A +189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +190 0x7214 //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +192 0x199A //RX_A_POST_FLT +193 0x0000 //RX_LMT_THRD +194 0x4000 //RX_LMT_ALPHA +195 0x0020 //RX_FDEQ_SUBNUM +196 0x4848 //RX_FDEQ_GAIN_0 +197 0x4848 //RX_FDEQ_GAIN_1 +198 0x4848 //RX_FDEQ_GAIN_2 +199 0x4848 //RX_FDEQ_GAIN_3 +200 0x4848 //RX_FDEQ_GAIN_4 +201 0x4848 //RX_FDEQ_GAIN_5 +202 0x4850 //RX_FDEQ_GAIN_6 +203 0x4848 //RX_FDEQ_GAIN_7 +204 0x4860 //RX_FDEQ_GAIN_8 +205 0x7468 //RX_FDEQ_GAIN_9 +206 0x6060 //RX_FDEQ_GAIN_10 +207 0x6060 //RX_FDEQ_GAIN_11 +208 0x5C54 //RX_FDEQ_GAIN_12 +209 0x5450 //RX_FDEQ_GAIN_13 +210 0x5050 //RX_FDEQ_GAIN_14 +211 0x5860 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0202 //RX_FDEQ_BIN_0 +221 0x0203 //RX_FDEQ_BIN_1 +222 0x0303 //RX_FDEQ_BIN_2 +223 0x0304 //RX_FDEQ_BIN_3 +224 0x0404 //RX_FDEQ_BIN_4 +225 0x0308 //RX_FDEQ_BIN_5 +226 0x0808 //RX_FDEQ_BIN_6 +227 0x090A //RX_FDEQ_BIN_7 +228 0x0B0C //RX_FDEQ_BIN_8 +229 0x0D0E //RX_FDEQ_BIN_9 +230 0x1013 //RX_FDEQ_BIN_10 +231 0x1719 //RX_FDEQ_BIN_11 +232 0x1B1E //RX_FDEQ_BIN_12 +233 0x1E1E //RX_FDEQ_BIN_13 +234 0x1E28 //RX_FDEQ_BIN_14 +235 0x282C //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x4000 //RX_FDEQ_RESRV_0 +245 0x0320 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0035 //RX_FDDRC_BAND_MARGIN_1 +248 0x00D5 //RX_FDDRC_BAND_MARGIN_2 +249 0x0120 //RX_FDDRC_BAND_MARGIN_3 +250 0x0004 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x2000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x2000 //RX_FDDRC_THRD_3_2 +258 0x5000 //RX_FDDRC_THRD_3_3 +259 0x4000 //RX_FDDRC_SLANT_0_0 +260 0x4000 //RX_FDDRC_SLANT_0_1 +261 0x4000 //RX_FDDRC_SLANT_0_2 +262 0x4000 //RX_FDDRC_SLANT_0_3 +263 0x7FFF //RX_FDDRC_SLANT_1_0 +264 0x7FFF //RX_FDDRC_SLANT_1_1 +265 0x7FFF //RX_FDDRC_SLANT_1_2 +266 0x7FFF //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +268 0x0002 //RX_FILTINDX +269 0x0002 //RX_TDDRC_THRD_0 +270 0x0004 //RX_TDDRC_THRD_1 +271 0x1A00 //RX_TDDRC_THRD_2 +272 0x1A00 //RX_TDDRC_THRD_3 +273 0x7EB8 //RX_TDDRC_SLANT_0 +274 0x2500 //RX_TDDRC_SLANT_1 +275 0x6000 //RX_TDDRC_ALPHA_UP_0 +276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x199A //RX_TDDRC_HMNC_GAIN +279 0x0001 //RX_TDDRC_SMT_FLAG +280 0x0CCD //RX_TDDRC_SMT_W +281 0x0550 //RX_TDDRC_DRC_GAIN +282 0x7C00 //RX_LAMBDA_PKA_FP +283 0x2000 //RX_TPKA_FP +284 0x2000 //RX_MIN_G_FP +285 0x0080 //RX_MAX_G_FP +286 0x0014 //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 +288 0x0000 //RX_MAXLEVEL_CNG +289 0x3000 //RX_BWE_UV_TH +290 0x3000 //RX_BWE_UV_TH2 +291 0x1800 //RX_BWE_UV_TH3 +292 0x1000 //RX_BWE_V_TH +293 0x04CD //RX_BWE_GAIN1_V_TH1 +294 0x0F33 //RX_BWE_GAIN1_V_TH2 +295 0x7333 //RX_BWE_UV_EQ +296 0x199A //RX_BWE_V_EQ +297 0x7333 //RX_BWE_TONE_TH +298 0x0004 //RX_BWE_UV_HOLD_T +299 0x6CCD //RX_BWE_GAIN2_ALPHA +300 0x799A //RX_BWE_GAIN3_ALPHA +301 0x001E //RX_BWE_CUTOFF +302 0x3000 //RX_BWE_GAINFILL +303 0x3200 //RX_BWE_MAXTH_TONE +304 0x2000 //RX_BWE_EQ_0 +305 0x2000 //RX_BWE_EQ_1 +306 0x2000 //RX_BWE_EQ_2 +307 0x2000 //RX_BWE_EQ_3 +308 0x2000 //RX_BWE_EQ_4 +309 0x2000 //RX_BWE_EQ_5 +310 0x2000 //RX_BWE_EQ_6 +311 0x0000 //RX_BWE_RESRV_0 +312 0x0000 //RX_BWE_RESRV_1 +313 0x0000 //RX_BWE_RESRV_2 +#VOL 0 +163 0x6000 //RX_TDDRC_ALPHA_UP_1 +164 0x6000 //RX_TDDRC_ALPHA_UP_2 +165 0x6000 //RX_TDDRC_ALPHA_UP_3 +166 0x1000 //RX_TDDRC_ALPHA_UP_4 +184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +190 0x7214 //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +269 0x0002 //RX_TDDRC_THRD_0 +270 0x0004 //RX_TDDRC_THRD_1 +271 0x1A00 //RX_TDDRC_THRD_2 +272 0x1A00 //RX_TDDRC_THRD_3 +273 0x7EB8 //RX_TDDRC_SLANT_0 +274 0x2500 //RX_TDDRC_SLANT_1 +275 0x6000 //RX_TDDRC_ALPHA_UP_0 +276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x199A //RX_TDDRC_HMNC_GAIN +279 0x0001 //RX_TDDRC_SMT_FLAG +280 0x0CCD //RX_TDDRC_SMT_W +281 0x0550 //RX_TDDRC_DRC_GAIN +195 0x0020 //RX_FDEQ_SUBNUM +196 0x4848 //RX_FDEQ_GAIN_0 +197 0x4848 //RX_FDEQ_GAIN_1 +198 0x4848 //RX_FDEQ_GAIN_2 +199 0x4848 //RX_FDEQ_GAIN_3 +200 0x4848 //RX_FDEQ_GAIN_4 +201 0x4848 //RX_FDEQ_GAIN_5 +202 0x4850 //RX_FDEQ_GAIN_6 +203 0x4848 //RX_FDEQ_GAIN_7 +204 0x4860 //RX_FDEQ_GAIN_8 +205 0x7468 //RX_FDEQ_GAIN_9 +206 0x6060 //RX_FDEQ_GAIN_10 +207 0x6060 //RX_FDEQ_GAIN_11 +208 0x5C54 //RX_FDEQ_GAIN_12 +209 0x5450 //RX_FDEQ_GAIN_13 +210 0x5050 //RX_FDEQ_GAIN_14 +211 0x5860 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0202 //RX_FDEQ_BIN_0 +221 0x0203 //RX_FDEQ_BIN_1 +222 0x0303 //RX_FDEQ_BIN_2 +223 0x0304 //RX_FDEQ_BIN_3 +224 0x0404 //RX_FDEQ_BIN_4 +225 0x0308 //RX_FDEQ_BIN_5 +226 0x0808 //RX_FDEQ_BIN_6 +227 0x090A //RX_FDEQ_BIN_7 +228 0x0B0C //RX_FDEQ_BIN_8 +229 0x0D0E //RX_FDEQ_BIN_9 +230 0x1013 //RX_FDEQ_BIN_10 +231 0x1719 //RX_FDEQ_BIN_11 +232 0x1B1E //RX_FDEQ_BIN_12 +233 0x1E1E //RX_FDEQ_BIN_13 +234 0x1E28 //RX_FDEQ_BIN_14 +235 0x282C //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x4000 //RX_FDEQ_RESRV_0 +245 0x0320 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0035 //RX_FDDRC_BAND_MARGIN_1 +248 0x00D5 //RX_FDDRC_BAND_MARGIN_2 +249 0x0120 //RX_FDDRC_BAND_MARGIN_3 +250 0x0004 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x2000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x2000 //RX_FDDRC_THRD_3_2 +258 0x5000 //RX_FDDRC_THRD_3_3 +259 0x4000 //RX_FDDRC_SLANT_0_0 +260 0x4000 //RX_FDDRC_SLANT_0_1 +261 0x4000 //RX_FDDRC_SLANT_0_2 +262 0x4000 //RX_FDDRC_SLANT_0_3 +263 0x7FFF //RX_FDDRC_SLANT_1_0 +264 0x7FFF //RX_FDDRC_SLANT_1_1 +265 0x7FFF //RX_FDDRC_SLANT_1_2 +266 0x7FFF //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +286 0x0014 //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 +#VOL 1 +163 0x6000 //RX_TDDRC_ALPHA_UP_1 +164 0x6000 //RX_TDDRC_ALPHA_UP_2 +165 0x6000 //RX_TDDRC_ALPHA_UP_3 +166 0x1000 //RX_TDDRC_ALPHA_UP_4 +184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +190 0x7214 //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +269 0x0002 //RX_TDDRC_THRD_0 +270 0x0004 //RX_TDDRC_THRD_1 +271 0x1A00 //RX_TDDRC_THRD_2 +272 0x1A00 //RX_TDDRC_THRD_3 +273 0x7EB8 //RX_TDDRC_SLANT_0 +274 0x2500 //RX_TDDRC_SLANT_1 +275 0x6000 //RX_TDDRC_ALPHA_UP_0 +276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x199A //RX_TDDRC_HMNC_GAIN +279 0x0001 //RX_TDDRC_SMT_FLAG +280 0x0CCD //RX_TDDRC_SMT_W +281 0x0550 //RX_TDDRC_DRC_GAIN +195 0x0020 //RX_FDEQ_SUBNUM +196 0x4848 //RX_FDEQ_GAIN_0 +197 0x4848 //RX_FDEQ_GAIN_1 +198 0x4848 //RX_FDEQ_GAIN_2 +199 0x4848 //RX_FDEQ_GAIN_3 +200 0x4848 //RX_FDEQ_GAIN_4 +201 0x4848 //RX_FDEQ_GAIN_5 +202 0x4850 //RX_FDEQ_GAIN_6 +203 0x4848 //RX_FDEQ_GAIN_7 +204 0x4860 //RX_FDEQ_GAIN_8 +205 0x7468 //RX_FDEQ_GAIN_9 +206 0x6060 //RX_FDEQ_GAIN_10 +207 0x6060 //RX_FDEQ_GAIN_11 +208 0x5C54 //RX_FDEQ_GAIN_12 +209 0x5450 //RX_FDEQ_GAIN_13 +210 0x5050 //RX_FDEQ_GAIN_14 +211 0x5860 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0202 //RX_FDEQ_BIN_0 +221 0x0203 //RX_FDEQ_BIN_1 +222 0x0303 //RX_FDEQ_BIN_2 +223 0x0304 //RX_FDEQ_BIN_3 +224 0x0404 //RX_FDEQ_BIN_4 +225 0x0308 //RX_FDEQ_BIN_5 +226 0x0808 //RX_FDEQ_BIN_6 +227 0x090A //RX_FDEQ_BIN_7 +228 0x0B0C //RX_FDEQ_BIN_8 +229 0x0D0E //RX_FDEQ_BIN_9 +230 0x1013 //RX_FDEQ_BIN_10 +231 0x1719 //RX_FDEQ_BIN_11 +232 0x1B1E //RX_FDEQ_BIN_12 +233 0x1E1E //RX_FDEQ_BIN_13 +234 0x1E28 //RX_FDEQ_BIN_14 +235 0x282C //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x4000 //RX_FDEQ_RESRV_0 +245 0x0320 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0035 //RX_FDDRC_BAND_MARGIN_1 +248 0x00D5 //RX_FDDRC_BAND_MARGIN_2 +249 0x0120 //RX_FDDRC_BAND_MARGIN_3 +250 0x0004 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x2000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x2000 //RX_FDDRC_THRD_3_2 +258 0x5000 //RX_FDDRC_THRD_3_3 +259 0x4000 //RX_FDDRC_SLANT_0_0 +260 0x4000 //RX_FDDRC_SLANT_0_1 +261 0x4000 //RX_FDDRC_SLANT_0_2 +262 0x4000 //RX_FDDRC_SLANT_0_3 +263 0x7FFF //RX_FDDRC_SLANT_1_0 +264 0x7FFF //RX_FDDRC_SLANT_1_1 +265 0x7FFF //RX_FDDRC_SLANT_1_2 +266 0x7FFF //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +286 0x001D //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 +#VOL 2 +163 0x6000 //RX_TDDRC_ALPHA_UP_1 +164 0x6000 //RX_TDDRC_ALPHA_UP_2 +165 0x6000 //RX_TDDRC_ALPHA_UP_3 +166 0x1000 //RX_TDDRC_ALPHA_UP_4 +184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +190 0x7214 //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +269 0x0002 //RX_TDDRC_THRD_0 +270 0x0004 //RX_TDDRC_THRD_1 +271 0x1A00 //RX_TDDRC_THRD_2 +272 0x1A00 //RX_TDDRC_THRD_3 +273 0x7EB8 //RX_TDDRC_SLANT_0 +274 0x2500 //RX_TDDRC_SLANT_1 +275 0x6000 //RX_TDDRC_ALPHA_UP_0 +276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x199A //RX_TDDRC_HMNC_GAIN +279 0x0001 //RX_TDDRC_SMT_FLAG +280 0x0CCD //RX_TDDRC_SMT_W +281 0x0550 //RX_TDDRC_DRC_GAIN +195 0x0020 //RX_FDEQ_SUBNUM +196 0x4848 //RX_FDEQ_GAIN_0 +197 0x4848 //RX_FDEQ_GAIN_1 +198 0x4848 //RX_FDEQ_GAIN_2 +199 0x4848 //RX_FDEQ_GAIN_3 +200 0x4848 //RX_FDEQ_GAIN_4 +201 0x4848 //RX_FDEQ_GAIN_5 +202 0x4850 //RX_FDEQ_GAIN_6 +203 0x4848 //RX_FDEQ_GAIN_7 +204 0x4860 //RX_FDEQ_GAIN_8 +205 0x7468 //RX_FDEQ_GAIN_9 +206 0x6060 //RX_FDEQ_GAIN_10 +207 0x6060 //RX_FDEQ_GAIN_11 +208 0x5C54 //RX_FDEQ_GAIN_12 +209 0x5450 //RX_FDEQ_GAIN_13 +210 0x5050 //RX_FDEQ_GAIN_14 +211 0x5860 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0202 //RX_FDEQ_BIN_0 +221 0x0203 //RX_FDEQ_BIN_1 +222 0x0303 //RX_FDEQ_BIN_2 +223 0x0304 //RX_FDEQ_BIN_3 +224 0x0404 //RX_FDEQ_BIN_4 +225 0x0308 //RX_FDEQ_BIN_5 +226 0x0808 //RX_FDEQ_BIN_6 +227 0x090A //RX_FDEQ_BIN_7 +228 0x0B0C //RX_FDEQ_BIN_8 +229 0x0D0E //RX_FDEQ_BIN_9 +230 0x1013 //RX_FDEQ_BIN_10 +231 0x1719 //RX_FDEQ_BIN_11 +232 0x1B1E //RX_FDEQ_BIN_12 +233 0x1E1E //RX_FDEQ_BIN_13 +234 0x1E28 //RX_FDEQ_BIN_14 +235 0x282C //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x4000 //RX_FDEQ_RESRV_0 +245 0x0320 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0035 //RX_FDDRC_BAND_MARGIN_1 +248 0x00D5 //RX_FDDRC_BAND_MARGIN_2 +249 0x0120 //RX_FDDRC_BAND_MARGIN_3 +250 0x0004 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x2000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x2000 //RX_FDDRC_THRD_3_2 +258 0x5000 //RX_FDDRC_THRD_3_3 +259 0x4000 //RX_FDDRC_SLANT_0_0 +260 0x4000 //RX_FDDRC_SLANT_0_1 +261 0x4000 //RX_FDDRC_SLANT_0_2 +262 0x4000 //RX_FDDRC_SLANT_0_3 +263 0x7FFF //RX_FDDRC_SLANT_1_0 +264 0x7FFF //RX_FDDRC_SLANT_1_1 +265 0x7FFF //RX_FDDRC_SLANT_1_2 +266 0x7FFF //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +286 0x0029 //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 +#VOL 3 +163 0x6000 //RX_TDDRC_ALPHA_UP_1 +164 0x6000 //RX_TDDRC_ALPHA_UP_2 +165 0x6000 //RX_TDDRC_ALPHA_UP_3 +166 0x1000 //RX_TDDRC_ALPHA_UP_4 +184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +190 0x7214 //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +269 0x0002 //RX_TDDRC_THRD_0 +270 0x0004 //RX_TDDRC_THRD_1 +271 0x1A00 //RX_TDDRC_THRD_2 +272 0x1A00 //RX_TDDRC_THRD_3 +273 0x7EB8 //RX_TDDRC_SLANT_0 +274 0x2500 //RX_TDDRC_SLANT_1 +275 0x6000 //RX_TDDRC_ALPHA_UP_0 +276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x199A //RX_TDDRC_HMNC_GAIN +279 0x0001 //RX_TDDRC_SMT_FLAG +280 0x0CCD //RX_TDDRC_SMT_W +281 0x0550 //RX_TDDRC_DRC_GAIN +195 0x0020 //RX_FDEQ_SUBNUM +196 0x4848 //RX_FDEQ_GAIN_0 +197 0x4848 //RX_FDEQ_GAIN_1 +198 0x4848 //RX_FDEQ_GAIN_2 +199 0x4848 //RX_FDEQ_GAIN_3 +200 0x4848 //RX_FDEQ_GAIN_4 +201 0x4848 //RX_FDEQ_GAIN_5 +202 0x4850 //RX_FDEQ_GAIN_6 +203 0x4848 //RX_FDEQ_GAIN_7 +204 0x4860 //RX_FDEQ_GAIN_8 +205 0x7468 //RX_FDEQ_GAIN_9 +206 0x6060 //RX_FDEQ_GAIN_10 +207 0x6060 //RX_FDEQ_GAIN_11 +208 0x5C54 //RX_FDEQ_GAIN_12 +209 0x5450 //RX_FDEQ_GAIN_13 +210 0x5050 //RX_FDEQ_GAIN_14 +211 0x5860 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0202 //RX_FDEQ_BIN_0 +221 0x0203 //RX_FDEQ_BIN_1 +222 0x0303 //RX_FDEQ_BIN_2 +223 0x0304 //RX_FDEQ_BIN_3 +224 0x0404 //RX_FDEQ_BIN_4 +225 0x0308 //RX_FDEQ_BIN_5 +226 0x0808 //RX_FDEQ_BIN_6 +227 0x090A //RX_FDEQ_BIN_7 +228 0x0B0C //RX_FDEQ_BIN_8 +229 0x0D0E //RX_FDEQ_BIN_9 +230 0x1013 //RX_FDEQ_BIN_10 +231 0x1719 //RX_FDEQ_BIN_11 +232 0x1B1E //RX_FDEQ_BIN_12 +233 0x1E1E //RX_FDEQ_BIN_13 +234 0x1E28 //RX_FDEQ_BIN_14 +235 0x282C //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x4000 //RX_FDEQ_RESRV_0 +245 0x0320 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0035 //RX_FDDRC_BAND_MARGIN_1 +248 0x00D5 //RX_FDDRC_BAND_MARGIN_2 +249 0x0120 //RX_FDDRC_BAND_MARGIN_3 +250 0x0004 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x2000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x2000 //RX_FDDRC_THRD_3_2 +258 0x5000 //RX_FDDRC_THRD_3_3 +259 0x4000 //RX_FDDRC_SLANT_0_0 +260 0x4000 //RX_FDDRC_SLANT_0_1 +261 0x4000 //RX_FDDRC_SLANT_0_2 +262 0x4000 //RX_FDDRC_SLANT_0_3 +263 0x7FFF //RX_FDDRC_SLANT_1_0 +264 0x7FFF //RX_FDDRC_SLANT_1_1 +265 0x7FFF //RX_FDDRC_SLANT_1_2 +266 0x7FFF //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +286 0x0039 //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 +#VOL 4 +163 0x6000 //RX_TDDRC_ALPHA_UP_1 +164 0x6000 //RX_TDDRC_ALPHA_UP_2 +165 0x6000 //RX_TDDRC_ALPHA_UP_3 +166 0x1000 //RX_TDDRC_ALPHA_UP_4 +184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +190 0x7214 //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +269 0x0002 //RX_TDDRC_THRD_0 +270 0x0004 //RX_TDDRC_THRD_1 +271 0x1A00 //RX_TDDRC_THRD_2 +272 0x1A00 //RX_TDDRC_THRD_3 +273 0x7EB8 //RX_TDDRC_SLANT_0 +274 0x2500 //RX_TDDRC_SLANT_1 +275 0x6000 //RX_TDDRC_ALPHA_UP_0 +276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x199A //RX_TDDRC_HMNC_GAIN +279 0x0001 //RX_TDDRC_SMT_FLAG +280 0x0CCD //RX_TDDRC_SMT_W +281 0x0550 //RX_TDDRC_DRC_GAIN +195 0x0020 //RX_FDEQ_SUBNUM +196 0x4848 //RX_FDEQ_GAIN_0 +197 0x4848 //RX_FDEQ_GAIN_1 +198 0x4848 //RX_FDEQ_GAIN_2 +199 0x4848 //RX_FDEQ_GAIN_3 +200 0x5454 //RX_FDEQ_GAIN_4 +201 0x7C54 //RX_FDEQ_GAIN_5 +202 0x4850 //RX_FDEQ_GAIN_6 +203 0x4848 //RX_FDEQ_GAIN_7 +204 0x4860 //RX_FDEQ_GAIN_8 +205 0x7468 //RX_FDEQ_GAIN_9 +206 0x6060 //RX_FDEQ_GAIN_10 +207 0x6060 //RX_FDEQ_GAIN_11 +208 0x5C54 //RX_FDEQ_GAIN_12 +209 0x5450 //RX_FDEQ_GAIN_13 +210 0x5050 //RX_FDEQ_GAIN_14 +211 0x5860 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0202 //RX_FDEQ_BIN_0 +221 0x0203 //RX_FDEQ_BIN_1 +222 0x0303 //RX_FDEQ_BIN_2 +223 0x0304 //RX_FDEQ_BIN_3 +224 0x0404 //RX_FDEQ_BIN_4 +225 0x0308 //RX_FDEQ_BIN_5 +226 0x0808 //RX_FDEQ_BIN_6 +227 0x090A //RX_FDEQ_BIN_7 +228 0x0B0C //RX_FDEQ_BIN_8 +229 0x0D0E //RX_FDEQ_BIN_9 +230 0x1013 //RX_FDEQ_BIN_10 +231 0x1719 //RX_FDEQ_BIN_11 +232 0x1B1E //RX_FDEQ_BIN_12 +233 0x1E1E //RX_FDEQ_BIN_13 +234 0x1E28 //RX_FDEQ_BIN_14 +235 0x282C //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x4000 //RX_FDEQ_RESRV_0 +245 0x0320 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0035 //RX_FDDRC_BAND_MARGIN_1 +248 0x00D5 //RX_FDDRC_BAND_MARGIN_2 +249 0x0120 //RX_FDDRC_BAND_MARGIN_3 +250 0x0004 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x2000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x2000 //RX_FDDRC_THRD_3_2 +258 0x5000 //RX_FDDRC_THRD_3_3 +259 0x4000 //RX_FDDRC_SLANT_0_0 +260 0x4000 //RX_FDDRC_SLANT_0_1 +261 0x4000 //RX_FDDRC_SLANT_0_2 +262 0x4000 //RX_FDDRC_SLANT_0_3 +263 0x7FFF //RX_FDDRC_SLANT_1_0 +264 0x7FFF //RX_FDDRC_SLANT_1_1 +265 0x7FFF //RX_FDDRC_SLANT_1_2 +266 0x7FFF //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +286 0x005F //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 +#VOL 5 +163 0x6000 //RX_TDDRC_ALPHA_UP_1 +164 0x6000 //RX_TDDRC_ALPHA_UP_2 +165 0x6000 //RX_TDDRC_ALPHA_UP_3 +166 0x1000 //RX_TDDRC_ALPHA_UP_4 +184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +190 0x7214 //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +269 0x0002 //RX_TDDRC_THRD_0 +270 0x0004 //RX_TDDRC_THRD_1 +271 0x1A00 //RX_TDDRC_THRD_2 +272 0x1A00 //RX_TDDRC_THRD_3 +273 0x7EB8 //RX_TDDRC_SLANT_0 +274 0x2500 //RX_TDDRC_SLANT_1 +275 0x6000 //RX_TDDRC_ALPHA_UP_0 +276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x199A //RX_TDDRC_HMNC_GAIN +279 0x0001 //RX_TDDRC_SMT_FLAG +280 0x0CCD //RX_TDDRC_SMT_W +281 0x0550 //RX_TDDRC_DRC_GAIN +195 0x0020 //RX_FDEQ_SUBNUM +196 0x4848 //RX_FDEQ_GAIN_0 +197 0x4848 //RX_FDEQ_GAIN_1 +198 0x4848 //RX_FDEQ_GAIN_2 +199 0x4848 //RX_FDEQ_GAIN_3 +200 0x5454 //RX_FDEQ_GAIN_4 +201 0x7C54 //RX_FDEQ_GAIN_5 +202 0x4850 //RX_FDEQ_GAIN_6 +203 0x4848 //RX_FDEQ_GAIN_7 +204 0x4860 //RX_FDEQ_GAIN_8 +205 0x7468 //RX_FDEQ_GAIN_9 +206 0x6060 //RX_FDEQ_GAIN_10 +207 0x6060 //RX_FDEQ_GAIN_11 +208 0x5C54 //RX_FDEQ_GAIN_12 +209 0x5450 //RX_FDEQ_GAIN_13 +210 0x5050 //RX_FDEQ_GAIN_14 +211 0x5860 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0202 //RX_FDEQ_BIN_0 +221 0x0203 //RX_FDEQ_BIN_1 +222 0x0303 //RX_FDEQ_BIN_2 +223 0x0304 //RX_FDEQ_BIN_3 +224 0x0404 //RX_FDEQ_BIN_4 +225 0x0308 //RX_FDEQ_BIN_5 +226 0x0808 //RX_FDEQ_BIN_6 +227 0x090A //RX_FDEQ_BIN_7 +228 0x0B0C //RX_FDEQ_BIN_8 +229 0x0D0E //RX_FDEQ_BIN_9 +230 0x1013 //RX_FDEQ_BIN_10 +231 0x1719 //RX_FDEQ_BIN_11 +232 0x1B1E //RX_FDEQ_BIN_12 +233 0x1E1E //RX_FDEQ_BIN_13 +234 0x1E28 //RX_FDEQ_BIN_14 +235 0x282C //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x4000 //RX_FDEQ_RESRV_0 +245 0x0320 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0035 //RX_FDDRC_BAND_MARGIN_1 +248 0x00D5 //RX_FDDRC_BAND_MARGIN_2 +249 0x0120 //RX_FDDRC_BAND_MARGIN_3 +250 0x0004 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x2000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x2000 //RX_FDDRC_THRD_3_2 +258 0x5000 //RX_FDDRC_THRD_3_3 +259 0x4000 //RX_FDDRC_SLANT_0_0 +260 0x4000 //RX_FDDRC_SLANT_0_1 +261 0x4000 //RX_FDDRC_SLANT_0_2 +262 0x4000 //RX_FDDRC_SLANT_0_3 +263 0x7FFF //RX_FDDRC_SLANT_1_0 +264 0x7FFF //RX_FDDRC_SLANT_1_1 +265 0x7FFF //RX_FDDRC_SLANT_1_2 +266 0x7FFF //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +286 0x008E //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 +#VOL 6 +163 0x6000 //RX_TDDRC_ALPHA_UP_1 +164 0x6000 //RX_TDDRC_ALPHA_UP_2 +165 0x6000 //RX_TDDRC_ALPHA_UP_3 +166 0x1000 //RX_TDDRC_ALPHA_UP_4 +184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +190 0x7214 //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +269 0x0002 //RX_TDDRC_THRD_0 +270 0x0004 //RX_TDDRC_THRD_1 +271 0x1A00 //RX_TDDRC_THRD_2 +272 0x1A00 //RX_TDDRC_THRD_3 +273 0x7EB8 //RX_TDDRC_SLANT_0 +274 0x2500 //RX_TDDRC_SLANT_1 +275 0x6000 //RX_TDDRC_ALPHA_UP_0 +276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x199A //RX_TDDRC_HMNC_GAIN +279 0x0001 //RX_TDDRC_SMT_FLAG +280 0x0CCD //RX_TDDRC_SMT_W +281 0x0550 //RX_TDDRC_DRC_GAIN +195 0x0020 //RX_FDEQ_SUBNUM +196 0x4848 //RX_FDEQ_GAIN_0 +197 0x4848 //RX_FDEQ_GAIN_1 +198 0x4848 //RX_FDEQ_GAIN_2 +199 0x4848 //RX_FDEQ_GAIN_3 +200 0x5454 //RX_FDEQ_GAIN_4 +201 0x7C54 //RX_FDEQ_GAIN_5 +202 0x4850 //RX_FDEQ_GAIN_6 +203 0x4848 //RX_FDEQ_GAIN_7 +204 0x4860 //RX_FDEQ_GAIN_8 +205 0x7468 //RX_FDEQ_GAIN_9 +206 0x6060 //RX_FDEQ_GAIN_10 +207 0x6060 //RX_FDEQ_GAIN_11 +208 0x5C54 //RX_FDEQ_GAIN_12 +209 0x5450 //RX_FDEQ_GAIN_13 +210 0x5050 //RX_FDEQ_GAIN_14 +211 0x5860 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0202 //RX_FDEQ_BIN_0 +221 0x0203 //RX_FDEQ_BIN_1 +222 0x0303 //RX_FDEQ_BIN_2 +223 0x0304 //RX_FDEQ_BIN_3 +224 0x0404 //RX_FDEQ_BIN_4 +225 0x0308 //RX_FDEQ_BIN_5 +226 0x0808 //RX_FDEQ_BIN_6 +227 0x090A //RX_FDEQ_BIN_7 +228 0x0B0C //RX_FDEQ_BIN_8 +229 0x0D0E //RX_FDEQ_BIN_9 +230 0x1013 //RX_FDEQ_BIN_10 +231 0x1719 //RX_FDEQ_BIN_11 +232 0x1B1E //RX_FDEQ_BIN_12 +233 0x1E1E //RX_FDEQ_BIN_13 +234 0x1E28 //RX_FDEQ_BIN_14 +235 0x282C //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x4000 //RX_FDEQ_RESRV_0 +245 0x0320 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0035 //RX_FDDRC_BAND_MARGIN_1 +248 0x00D5 //RX_FDDRC_BAND_MARGIN_2 +249 0x0120 //RX_FDDRC_BAND_MARGIN_3 +250 0x0004 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x2000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x2000 //RX_FDDRC_THRD_3_2 +258 0x5000 //RX_FDDRC_THRD_3_3 +259 0x4000 //RX_FDDRC_SLANT_0_0 +260 0x4000 //RX_FDDRC_SLANT_0_1 +261 0x4000 //RX_FDDRC_SLANT_0_2 +262 0x4000 //RX_FDDRC_SLANT_0_3 +263 0x7FFF //RX_FDDRC_SLANT_1_0 +264 0x7FFF //RX_FDDRC_SLANT_1_1 +265 0x7FFF //RX_FDDRC_SLANT_1_2 +266 0x7FFF //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +286 0x0100 //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 + +#CASE_NAME HANDSFREE-HANDSFREE-CUSTOM1-SWB +#PARAM_MODE Simple +#PARAM_TYPE TX+2RX +#TOTAL_CUSTOM_STEP 7+7 +#TX +0 0x0001 //TX_OPERATION_MODE_0 +1 0x0001 //TX_OPERATION_MODE_1 +2 0x0073 //TX_PATCH_REG +3 0x6B74 //TX_SENDFUNC_MODE_0 +4 0x0001 //TX_SENDFUNC_MODE_1 +5 0x0003 //TX_NUM_MIC +6 0x0003 //TX_SAMPLINGFREQ_SIG +7 0x0003 //TX_SAMPLINGFREQ_PROC +8 0x000A //TX_FRAME_SZ_SIG +9 0x000A //TX_FRAME_SZ +10 0x0000 //TX_DELAY_OPT +11 0x0028 //TX_MAX_TAIL_LENGTH +12 0x0001 //TX_NUM_LOUTCHN +13 0x0001 //TX_MAXNUM_AECREF +14 0x0000 //TX_DBG_FUNC_REG +15 0x0000 //TX_DBG_FUNC_REG1 +16 0x0000 //TX_SYS_RESRV_0 +17 0x0000 //TX_SYS_RESRV_1 +18 0x0000 //TX_SYS_RESRV_2 +19 0x0000 //TX_SYS_RESRV_3 +20 0x0000 //TX_DIST2REF0 +21 0x009C //TX_DIST2REF1 +22 0x0019 //TX_DIST2REF_02 +23 0x0000 //TX_DIST2REF_03 +24 0x0000 //TX_DIST2REF_04 +25 0x0000 //TX_DIST2REF_05 +26 0x0000 //TX_MMIC +27 0x1000 //TX_PGA_0 +28 0x1000 //TX_PGA_1 +29 0x1000 //TX_PGA_2 +30 0x0000 //TX_PGA_3 +31 0x0000 //TX_PGA_4 +32 0x0000 //TX_PGA_5 +33 0x0001 //TX_MIC_PAIRS +34 0x0000 //TX_MIC_PAIRS_HS +35 0x0002 //TX_MICS_FOR_BF +36 0x0000 //TX_MIC_PAIRS_FORL1 +37 0x0002 //TX_MICS_OF_PAIR0 +38 0x0002 //TX_MICS_OF_PAIR1 +39 0x0002 //TX_MICS_OF_PAIR2 +40 0x0002 //TX_MICS_OF_PAIR3 +41 0x0000 //TX_MIC_DATA_SRC0 +42 0x0002 //TX_MIC_DATA_SRC1 +43 0x0001 //TX_MIC_DATA_SRC2 +44 0x0000 //TX_MIC_DATA_SRC3 +45 0x0000 //TX_MIC_PAIR_CH_04 +46 0x0000 //TX_MIC_PAIR_CH_05 +47 0x0000 //TX_MIC_PAIR_CH_10 +48 0x0000 //TX_MIC_PAIR_CH_11 +49 0x0000 //TX_MIC_PAIR_CH_12 +50 0x0000 //TX_MIC_PAIR_CH_13 +51 0x0000 //TX_MIC_PAIR_CH_14 +52 0x05DC //TX_HD_BIN_MASK +53 0x0010 //TX_HD_SUBAND_MASK +54 0x19A1 //TX_HD_FRAME_AVG_MASK +55 0x0320 //TX_HD_MIN_FRQ +56 0x1000 //TX_HD_ALPHA_PSD +57 0x1100 //TX_T_PHPR1 +58 0x0000 //TX_T_PHPR2 +59 0x0000 //TX_T_PTPR +60 0x0000 //TX_T_PNPR +61 0x0000 //TX_T_PAPR1 +62 0xEE6C //TX_T_PSDVAT +63 0x0800 //TX_CNT +64 0x4000 //TX_ANTI_HOWL_GAIN +65 0x0001 //TX_MICFORBFMARK_0 +66 0x0001 //TX_MICFORBFMARK_1 +67 0x0001 //TX_MICFORBFMARK_2 +68 0x0001 //TX_MICFORBFMARK_3 +69 0x0001 //TX_MICFORBFMARK_4 +70 0x0001 //TX_MICFORBFMARK_5 +71 0x0000 //TX_DIST2REF_10 +72 0x3B33 //TX_DIST2REF_11 +73 0x0A70 //TX_DIST2REF2 +74 0x0000 //TX_DIST2REF_13 +75 0x0000 //TX_DIST2REF_14 +76 0x0000 //TX_DIST2REF_15 +77 0x0000 //TX_DIST2REF_20 +78 0x0000 //TX_DIST2REF_21 +79 0x0000 //TX_DIST2REF_22 +80 0x0000 //TX_DIST2REF_23 +81 0x0000 //TX_DIST2REF_24 +82 0x0000 //TX_DIST2REF_25 +83 0x0000 //TX_DIST2REF_30 +84 0x0000 //TX_DIST2REF_31 +85 0x0000 //TX_DIST2REF_32 +86 0x0000 //TX_DIST2REF_33 +87 0x0000 //TX_DIST2REF_34 +88 0x0000 //TX_DIST2REF_35 +89 0x0000 //TX_MIC_LOC_00 +90 0x0000 //TX_MIC_LOC_01 +91 0x0000 //TX_MIC_LOC_02 +92 0x0000 //TX_MIC_LOC_03 +93 0x0000 //TX_MIC_LOC_04 +94 0x0000 //TX_MIC_LOC_05 +95 0x0000 //TX_MIC_LOC_10 +96 0x0000 //TX_MIC_LOC_11 +97 0x0000 //TX_MIC_LOC_12 +98 0x0000 //TX_MIC_LOC_13 +99 0x0000 //TX_MIC_LOC_14 +100 0x0000 //TX_MIC_LOC_15 +101 0x0000 //TX_MIC_LOC_20 +102 0x0000 //TX_MIC_LOC_21 +103 0x0000 //TX_MIC_LOC_22 +104 0x0000 //TX_MIC_LOC_23 +105 0x0000 //TX_MIC_LOC_24 +106 0x0000 //TX_MIC_LOC_25 +107 0x0800 //TX_MIC_REFBLK_VOLUME +108 0x0CAE //TX_MIC_BLOCK_VOLUME +109 0x0000 //TX_INVERSE_MASK +110 0x0000 //TX_ADCS_MASK +111 0x04D0 //TX_ADCS_GAIN +112 0x4000 //TX_NFC_GAINFAC +113 0x0000 //TX_MAINMIC_BLKFACTOR +114 0x0000 //TX_REFMIC_BLKFACTOR +115 0x0000 //TX_BLMIC_BLKFACTOR +116 0x0000 //TX_BRMIC_BLKFACTOR +117 0x0031 //TX_MICBLK_START_BIN +118 0x0060 //TX_MICBLK_END_BIN +119 0x0015 //TX_MICBLK_FE_HOLD +120 0xFFF2 //TX_MICBLK_MR_EXP_TH +121 0xFFF2 //TX_MICBLK_LR_EXP_TH +122 0x0015 //TX_FENE_HOLD +123 0x4000 //TX_FE_ENER_TH_MTS +124 0x0004 //TX_FE_ENER_TH_EXP +125 0x6000 //TX_C_POST_FLT_MIC_MAINBLK +126 0x6000 //TX_C_POST_FLT_MIC_REFBLK +127 0x0010 //TX_MIC_BLOCK_N +128 0x7B02 //TX_A_HP +129 0x4000 //TX_B_PE +130 0x5000 //TX_THR_PITCH_DET_0 +131 0x4800 //TX_THR_PITCH_DET_1 +132 0x4000 //TX_THR_PITCH_DET_2 +133 0x0008 //TX_PITCH_BFR_LEN +134 0x0003 //TX_SBD_PITCH_DET +135 0x0050 //TX_TD_AEC_L +136 0x4000 //TX_MU0_UNP_TD_AEC +137 0x1000 //TX_MU0_PTD_TD_AEC +138 0x0000 //TX_PP_RESRV_0 +139 0x2A94 //TX_PP_RESRV_1 +140 0x55F0 //TX_PP_RESRV_2 +141 0x0000 //TX_PP_RESRV_3 +142 0x0000 //TX_PP_RESRV_4 +143 0x0000 //TX_PP_RESRV_5 +144 0x0000 //TX_PP_RESRV_6 +145 0x0000 //TX_PP_RESRV_7 +146 0x0028 //TX_TAIL_LENGTH +147 0x0400 //TX_AEC_REF_GAIN_0 +148 0x0800 //TX_AEC_REF_GAIN_1 +149 0x0800 //TX_AEC_REF_GAIN_2 +150 0x7600 //TX_EAD_THR +151 0x1000 //TX_THR_RE_EST +152 0x2000 //TX_MIN_EQ_RE_EST_0 +153 0x0600 //TX_MIN_EQ_RE_EST_1 +154 0x3000 //TX_MIN_EQ_RE_EST_2 +155 0x3000 //TX_MIN_EQ_RE_EST_3 +156 0x3000 //TX_MIN_EQ_RE_EST_4 +157 0x3000 //TX_MIN_EQ_RE_EST_5 +158 0x3000 //TX_MIN_EQ_RE_EST_6 +159 0x1000 //TX_MIN_EQ_RE_EST_7 +160 0x7800 //TX_MIN_EQ_RE_EST_8 +161 0x7800 //TX_MIN_EQ_RE_EST_9 +162 0x7800 //TX_MIN_EQ_RE_EST_10 +163 0x7800 //TX_MIN_EQ_RE_EST_11 +164 0x7800 //TX_MIN_EQ_RE_EST_12 +165 0x4000 //TX_LAMBDA_RE_EST +166 0x3000 //TX_LAMBDA_CB_NLE +167 0x7FFF //TX_C_POST_FLT +168 0x4000 //TX_GAIN_NP +169 0x0180 //TX_SE_HOLD_N +170 0x00C8 //TX_DT_HOLD_N +171 0x05DC //TX_DT2_HOLD_N +172 0x6666 //TX_AEC_RESRV_0 +173 0x0000 //TX_AEC_RESRV_1 +174 0x0014 //TX_AEC_RESRV_2 +175 0x0000 //TX_MIC_DELAY_LENGTH +176 0x0000 //TX_REF_DELAY_LENGTH +177 0x0000 //TX_ADD_LINEIN_GAINL +178 0x0000 //TX_ADD_LINEIN_GAINH +179 0x0000 //TX_MIN_EQ_RE_EST_14 +180 0x0000 //TX_DTD_THR1_8 +181 0x7FFF //TX_DTD_THR2_8 +182 0x0000 //TX_DTD_MIC_BLK2 +183 0x0008 //TX_FRQ_LIN_LEN +184 0x7FFF //TX_FRQ_AEC_LEN_RHO +185 0x6000 //TX_MU0_UNP_FRQ_AEC +186 0x4000 //TX_MU0_PTD_FRQ_AEC +187 0x000A //TX_MINENOISETH +188 0x0800 //TX_MU0_RE_EST +189 0x0001 //TX_AEC_NUM_CH +190 0x0000 //TX_BIGECHOATTENUATION_MAX +191 0x2000 //TX_A_POST_FLT_MICBLK +192 0x0000 //TX_BLKENERTH +193 0x0000 //TX_BLKENERHIGHTH +194 0x0000 //TX_NORMENERTH +195 0x0000 //TX_NORMENERHIGHTH +196 0x0000 //TX_NORMENERHIGHTHL +197 0x7FF0 //TX_DTD_THR1_0 +198 0x7FF0 //TX_DTD_THR1_1 +199 0x7FF0 //TX_DTD_THR1_2 +200 0x7FF0 //TX_DTD_THR1_3 +201 0x7FF0 //TX_DTD_THR1_4 +202 0x7FF0 //TX_DTD_THR1_5 +203 0x7FF0 //TX_DTD_THR1_6 +204 0x7E00 //TX_DTD_THR2_0 +205 0x7E00 //TX_DTD_THR2_1 +206 0x5000 //TX_DTD_THR2_2 +207 0x5000 //TX_DTD_THR2_3 +208 0x5000 //TX_DTD_THR2_4 +209 0x5000 //TX_DTD_THR2_5 +210 0x5000 //TX_DTD_THR2_6 +211 0x7FFF //TX_DTD_THR3 +212 0x0000 //TX_SPK_CUT_K +213 0x36B0 //TX_DT_CUT_K +214 0x0100 //TX_DT_CUT_THR +215 0x04EB //TX_COMFORT_G +216 0x01F4 //TX_POWER_YOUT_TH +217 0x4000 //TX_FDPFGAINECHO +218 0x0000 //TX_DTD_HD_THR +219 0x0000 //TX_SPK_CUT_K_S +220 0x7FFF //TX_DTD_MIC_BLK +221 0x023E //TX_ADPT_STRICT_L +222 0x023E //TX_ADPT_STRICT_H +223 0x0BB8 //TX_RATIO_DT_L_TH_LOW +224 0x3A98 //TX_RATIO_DT_H_TH_LOW +225 0x1F40 //TX_RATIO_DT_L_TH_HIGH +226 0x5014 //TX_RATIO_DT_H_TH_HIGH +227 0x09C4 //TX_RATIO_DT_L0_TH +228 0x7FFF //TX_B_POST_FILT_ECHO_L +229 0x7FFF //TX_B_POST_FILT_ECHO_H +230 0x0200 //TX_MIN_G_CTRL_ECHO +231 0x1000 //TX_B_LESSCUT_RTO_ECHO +232 0x0000 //TX_EPD_OFFSET_00 +233 0x0000 //TX_EPD_OFFST_01 +234 0x2328 //TX_RATIO_DT_L0_TH_HIGH +235 0x7FFF //TX_RATIO_DT_H_TH_CUT +236 0x7FFF //TX_MIN_EQ_RE_EST_13 +237 0x0000 //TX_DTD_THR1_7 +238 0x0000 //TX_DTD_THR2_7 +239 0x0800 //TX_DT_RESRV_7 +240 0x0800 //TX_DT_RESRV_8 +241 0x0000 //TX_DT_RESRV_9 +242 0xF800 //TX_THR_SN_EST_0 +243 0xFA00 //TX_THR_SN_EST_1 +244 0xFA00 //TX_THR_SN_EST_2 +245 0xFA00 //TX_THR_SN_EST_3 +246 0xF800 //TX_THR_SN_EST_4 +247 0xFA00 //TX_THR_SN_EST_5 +248 0xF800 //TX_THR_SN_EST_6 +249 0xF800 //TX_THR_SN_EST_7 +250 0x0100 //TX_DELTA_THR_SN_EST_0 +251 0x0100 //TX_DELTA_THR_SN_EST_1 +252 0x0100 //TX_DELTA_THR_SN_EST_2 +253 0x0000 //TX_DELTA_THR_SN_EST_3 +254 0x0100 //TX_DELTA_THR_SN_EST_4 +255 0x0200 //TX_DELTA_THR_SN_EST_5 +256 0x0100 //TX_DELTA_THR_SN_EST_6 +257 0x0200 //TX_DELTA_THR_SN_EST_7 +258 0x4000 //TX_LAMBDA_NN_EST_0 +259 0x4000 //TX_LAMBDA_NN_EST_1 +260 0x4000 //TX_LAMBDA_NN_EST_2 +261 0x4000 //TX_LAMBDA_NN_EST_3 +262 0x4000 //TX_LAMBDA_NN_EST_4 +263 0x4000 //TX_LAMBDA_NN_EST_5 +264 0x4000 //TX_LAMBDA_NN_EST_6 +265 0x4000 //TX_LAMBDA_NN_EST_7 +266 0x0400 //TX_N_SN_EST +267 0x001E //TX_INBEAM_T +268 0x0041 //TX_INBEAMHOLDT +269 0x2000 //TX_G_STRICT +270 0x2000 //TX_EQ_THR_BF +271 0x799A //TX_LAMBDA_EQ_BF +272 0x1000 //TX_NE_RTO_TH +273 0x0400 //TX_NE_RTO_TH_L +274 0x0800 //TX_MAINREFRTOH_TH_H +275 0x0800 //TX_MAINREFRTOH_TH_L +276 0x0800 //TX_MAINREFRTO_TH_H +277 0x0800 //TX_MAINREFRTO_TH_L +278 0x0200 //TX_MAINREFRTO_TH_EQ +279 0x2000 //TX_B_POST_FLT_0 +280 0x1000 //TX_B_POST_FLT_1 +281 0x0010 //TX_NS_LVL_CTRL_0 +282 0x003C //TX_NS_LVL_CTRL_1 +283 0x0024 //TX_NS_LVL_CTRL_2 +284 0x003C //TX_NS_LVL_CTRL_3 +285 0x0014 //TX_NS_LVL_CTRL_4 +286 0x0011 //TX_NS_LVL_CTRL_5 +287 0x003C //TX_NS_LVL_CTRL_6 +288 0x0011 //TX_NS_LVL_CTRL_7 +289 0x0020 //TX_MIN_GAIN_S_0 +290 0x0020 //TX_MIN_GAIN_S_1 +291 0x0020 //TX_MIN_GAIN_S_2 +292 0x0020 //TX_MIN_GAIN_S_3 +293 0x0020 //TX_MIN_GAIN_S_4 +294 0x0020 //TX_MIN_GAIN_S_5 +295 0x0020 //TX_MIN_GAIN_S_6 +296 0x0020 //TX_MIN_GAIN_S_7 +297 0x6000 //TX_NMOS_SUP +298 0x0000 //TX_NS_MAX_PRI_SNR_TH +299 0x0000 //TX_NMOS_SUP_MENSA +300 0x7FFF //TX_SNRI_SUP_0 +301 0x4000 //TX_SNRI_SUP_1 +302 0x4000 //TX_SNRI_SUP_2 +303 0x4000 //TX_SNRI_SUP_3 +304 0x4000 //TX_SNRI_SUP_4 +305 0x4000 //TX_SNRI_SUP_5 +306 0x4000 //TX_SNRI_SUP_6 +307 0x4000 //TX_SNRI_SUP_7 +308 0x7FFF //TX_THR_LFNS +309 0x0018 //TX_G_LFNS +310 0x09C4 //TX_GAIN0_NTH +311 0x000A //TX_MUSIC_MORENS +312 0x7FFF //TX_A_POST_FILT_0 +313 0x2000 //TX_A_POST_FILT_1 +314 0x7FFF //TX_A_POST_FILT_S_0 +315 0x7FFF //TX_A_POST_FILT_S_1 +316 0x7FFF //TX_A_POST_FILT_S_2 +317 0x7FFF //TX_A_POST_FILT_S_3 +318 0x7FFF //TX_A_POST_FILT_S_4 +319 0x7FFF //TX_A_POST_FILT_S_5 +320 0x7FFF //TX_A_POST_FILT_S_6 +321 0x7FFF //TX_A_POST_FILT_S_7 +322 0x2000 //TX_B_POST_FILT_0 +323 0x6000 //TX_B_POST_FILT_1 +324 0x6000 //TX_B_POST_FILT_2 +325 0x6000 //TX_B_POST_FILT_3 +326 0x4000 //TX_B_POST_FILT_4 +327 0x1000 //TX_B_POST_FILT_5 +328 0x1000 //TX_B_POST_FILT_6 +329 0x2000 //TX_B_POST_FILT_7 +330 0x4000 //TX_B_LESSCUT_RTO_S_0 +331 0x7FFF //TX_B_LESSCUT_RTO_S_1 +332 0x7FFF //TX_B_LESSCUT_RTO_S_2 +333 0x7FFF //TX_B_LESSCUT_RTO_S_3 +334 0x7FFF //TX_B_LESSCUT_RTO_S_4 +335 0x6000 //TX_B_LESSCUT_RTO_S_5 +336 0x7FFF //TX_B_LESSCUT_RTO_S_6 +337 0x7FFF //TX_B_LESSCUT_RTO_S_7 +338 0x7F00 //TX_LAMBDA_PFILT +339 0x7F00 //TX_LAMBDA_PFILT_S_0 +340 0x7F00 //TX_LAMBDA_PFILT_S_1 +341 0x7F00 //TX_LAMBDA_PFILT_S_2 +342 0x7F00 //TX_LAMBDA_PFILT_S_3 +343 0x7F00 //TX_LAMBDA_PFILT_S_4 +344 0x7F00 //TX_LAMBDA_PFILT_S_5 +345 0x7F00 //TX_LAMBDA_PFILT_S_6 +346 0x7F00 //TX_LAMBDA_PFILT_S_7 +347 0x0200 //TX_K_PEPPER +348 0x0400 //TX_A_PEPPER +349 0x1EAA //TX_K_PEPPER_HF +350 0x0600 //TX_A_PEPPER_HF +351 0x0001 //TX_HMNC_BST_FLG +352 0x0200 //TX_HMNC_BST_THR +353 0x0040 //TX_DT_BINVAD_TH_0 +354 0x0040 //TX_DT_BINVAD_TH_1 +355 0x0100 //TX_DT_BINVAD_TH_2 +356 0x0100 //TX_DT_BINVAD_TH_3 +357 0x36B0 //TX_DT_BINVAD_ENDF +358 0x0200 //TX_C_POST_FLT_DT +359 0x0CCD //TX_NS_B_POST_FLT_LESSCUT +360 0x0140 //TX_DT_BOOST +361 0x0000 //TX_BF_SGRAD_FLG +362 0x0005 //TX_BF_DVG_TH +363 0x001E //TX_SN_C_F +364 0x0000 //TX_K_APT +365 0x0001 //TX_NOISEDET +366 0x0064 //TX_NDETCT +367 0x0050 //TX_NOISE_TH_0 +368 0x7FFF //TX_NOISE_TH_0_2 +369 0x7FFF //TX_NOISE_TH_0_3 +370 0x07D0 //TX_NOISE_TH_1 +371 0x01F4 //TX_NOISE_TH_2 +372 0x36B0 //TX_NOISE_TH_3 +373 0x2710 //TX_NOISE_TH_4 +374 0x2CEC //TX_NOISE_TH_5 +375 0x7FFF //TX_NOISE_TH_5_2 +376 0x0000 //TX_NOISE_TH_5_3 +377 0x7FFF //TX_NOISE_TH_5_4 +378 0x0DAC //TX_NOISE_TH_6 +379 0x0050 //TX_MINENOISE_TH +380 0xD508 //TX_MORENS_TFMASK_TH +381 0x0001 //TX_DRC_QUIET_FLOOR +382 0x3A98 //TX_RATIODTL_CUT_TH +383 0x07D0 //TX_DT_CUT_K1 +384 0x0666 //TX_OUT_ENER_S_TH_CLEAN +385 0x0666 //TX_OUT_ENER_S_TH_LESSCLEAN +386 0x0333 //TX_OUT_ENER_S_TH_NOISY +387 0x019A //TX_OUT_ENER_TH_NOISE +388 0x0333 //TX_OUT_ENER_TH_SPEECH +389 0x2000 //TX_SN_NPB_GAIN +390 0x0000 //TX_NN_NPB_GAIN +391 0x7FFF //TX_POST_MASK_SUP_HSNE +392 0x1388 //TX_TAIL_DET_TH +393 0x4000 //TX_B_LESSCUT_RTO_WTA +394 0x0000 //TX_MEL_G_R +395 0x0080 //TX_SUPHIGH_TH +396 0x0000 //TX_MASK_G_R +397 0x0002 //TX_EXTRA_NS_L +398 0x1800 //TX_C_POST_FLT_MASK +399 0x7FFF //TX_A_POST_FLT_WNS +400 0x0148 //TX_MIN_G_LOW300HZ +401 0x0001 //TX_MAXLEVEL_CNG +402 0x00B4 //TX_STN_NOISE_TH +403 0x4000 //TX_POST_MASK_SUP +404 0x7FFF //TX_POST_MASK_ADJUST +405 0x00C8 //TX_NS_ENOISE_MIC0_TH +406 0x0050 //TX_MINENOISE_MIC0_TH +407 0x012C //TX_MINENOISE_MIC0_S_TH +408 0x4000 //TX_MIN_G_CTRL_SSNS +409 0x0000 //TX_METAL_RTO_THR +410 0x4848 //TX_NS_FP_K_METAL +411 0x3A98 //TX_NOISEDET_BOOST_TH +412 0x0FA0 //TX_NSMOOTH_TH +413 0x0000 //TX_NS_RESRV_8 +414 0x1800 //TX_RHO_UPB +415 0x0BB8 //TX_N_HOLD_HS +416 0x0050 //TX_N_RHO_BFR0 +417 0x7FFF //TX_LAMBDA_ARSP_EST +418 0x0100 //TX_EXTRA_GAIN_MICBLOCK +419 0x0CCD //TX_THR_STD_NSR +420 0x019A //TX_THR_STD_PLH +421 0x2AF8 //TX_N_HOLD_STD +422 0x0066 //TX_THR_STD_RHO +423 0x2000 //TX_BF_RESET_THR_HS +424 0x09C4 //TX_SB_RTO_MEAN_TH +425 0x0000 //TX_SB_RHO_MEAN_TH_NTALK +426 0x3800 //TX_SB_RTO_MEAN_TH_ABN +427 0x2EE0 //TX_SB_RTO_MEAN_TH_RUB +428 0x0000 //TX_WTA_EN_RTO_TH +429 0x0000 //TX_TOP_ENER_TH_F +430 0x0000 //TX_DESIRED_TALK_HOLDT +431 0x0800 //TX_MIC_BLOCK_FACTOR +432 0x0000 //TX_NSEST_BFRLRNRDC +433 0x0000 //TX_THR_POST_FLT_HS +434 0x0010 //TX_HS_VAD_BIN +435 0x2666 //TX_THR_VAD_HS +436 0x2CCD //TX_MEAN_RTO_MIN_TH2 +437 0x0032 //TX_SILENCE_T +438 0x0000 //TX_A_POST_FLT_WTA +439 0x799A //TX_LAMBDA_PFLT_WTA +440 0x0000 //TX_SB_RHO_MEAN2_TH +441 0x0190 //TX_SB_RHO_MEAN3_TH +442 0x0000 //TX_HS_RESRV_4 +443 0x0000 //TX_HS_RESRV_5 +444 0x003C //TX_DOA_VAD_THR_1 +445 0x0000 //TX_DOA_VAD_THR_2 +446 0x0028 //TX_DOA_VAD_THR1_0 +447 0x0028 //TX_DOA_VAD_THR1_1 +448 0x0000 //TX_SRC_DOA_RNG_LOW_0A +449 0x00B4 //TX_SRC_DOA_RNG_HIGH_0A +450 0x005A //TX_DFLT_SRC_DOA_0A +451 0x0000 //TX_SRC_DOA_RNG_LOW_0B +452 0x0000 //TX_SRC_DOA_RNG_HIGH_0B +453 0x0000 //TX_DFLT_SRC_DOA_0B +454 0x0000 //TX_SRC_DOA_RNG_LOW_0C +455 0x0000 //TX_SRC_DOA_RNG_HIGH_0C +456 0x0000 //TX_DFLT_SRC_DOA_0C +457 0x0000 //TX_SRC_DOA_RNG_LOW_0D +458 0x0000 //TX_SRC_DOA_RNG_HIGH_0D +459 0x0000 //TX_DFLT_SRC_DOA_0D +460 0x0000 //TX_SRC_DOA_RNG_LOW_1A +461 0x00B4 //TX_SRC_DOA_RNG_HIGH_1A +462 0x005A //TX_DFLT_SRC_DOA_1A +463 0x0000 //TX_SRC_DOA_RNG_LOW_1B +464 0x00B4 //TX_SRC_DOA_RNG_HIGH_1B +465 0x005A //TX_DFLT_SRC_DOA_1B +466 0x0000 //TX_SRC_DOA_RNG_LOW_1C +467 0x00B4 //TX_SRC_DOA_RNG_HIGH_1C +468 0x005A //TX_DFLT_SRC_DOA_1C +469 0x0000 //TX_SRC_DOA_RNG_LOW_1D +470 0x00B4 //TX_SRC_DOA_RNG_HIGH_1D +471 0x005A //TX_DFLT_SRC_DOA_1D +472 0x0100 //TX_BF_HOLDOFF_T +473 0x7FFF //TX_DOA_COST_FACTOR +474 0x4000 //TX_MAINTOREFR_TH0 +475 0x071C //TX_DOA_TRK_THR +476 0x012C //TX_DOA_TRACK_HT +477 0x0200 //TX_N1_HOLD_HF +478 0x0100 //TX_N2_HOLD_HF +479 0x3000 //TX_BF_RESET_THR_HF +480 0x7333 //TX_DOA_SMOOTH +481 0x0800 //TX_MU_BF +482 0x0800 //TX_BF_MU_LF_B2 +483 0x0040 //TX_BF_FC_END_BIN_B2 +484 0x0020 //TX_BF_FC_END_BIN +485 0x0000 //TX_HF_RESRV_25 +486 0x0000 //TX_HF_RESRV_26 +487 0x0007 //TX_N_DOA_SEED +488 0x0001 //TX_FINE_DOA_SEARCH_FLG +489 0x0000 //TX_HF_RESRV_27 +490 0x038E //TX_DLT_SRC_DOA_RNG +491 0x0200 //TX_BF_MU_LF +492 0x0000 //TX_DFLT_SRC_LOC_0 +493 0x7FFF //TX_DFLT_SRC_LOC_1 +494 0x0000 //TX_DFLT_SRC_LOC_2 +495 0x038E //TX_DOA_TRACK_VADTH +496 0x0000 //TX_DOA_TRACK_NEW +497 0x0230 //TX_NOR_OFF_THR +498 0x0CCD //TX_MORE_ON_700HZ_THR +499 0x0000 //TX_MU_BF_ADPT_NS +500 0x0000 //TX_ADAPT_LEN +501 0x2000 //TX_MORE_SNS +502 0x0000 //TX_NOR_OFF_TH1 +503 0x0000 //TX_WIDE_MASK_TH +504 0x4650 //TX_SUBSNRATIOHIGH4MEANBCK_THR +505 0x4000 //TX_C_POST_FLT_CUT +506 0x2000 //TX_RADIODTLV +507 0x0320 //TX_POWER_LINEIN_TH +508 0x0014 //TX_FE_VADCOUNT_TH_FC +509 0x000A //TX_ECHO_SUPP_FC +510 0x0C80 //TX_ECHO_TH +511 0x6666 //TX_MIC_TO_BFGAIN +512 0x0000 //TX_MICTOBFGAIN0 +513 0x0000 //TX_FASTMUE_TH +514 0x3000 //TX_DEREVERB_LF_MU +515 0x34CD //TX_DEREVERB_HF_MU +516 0x0007 //TX_DEREVERB_DELAY +517 0x0004 //TX_DEREVERB_COEF_LEN +518 0x0003 //TX_DEREVERB_DNR +519 0x0000 //TX_DEREVERB_ALPHA +520 0x0000 //TX_DEREVERB_BETA +521 0x3A98 //TX_GSC_RTOL_TH +522 0x3A98 //TX_GSC_RTOH_TH +523 0x7E2C //TX_WIDE2_MEANHTH +524 0x0000 //TX_DR_RESRV_5 +525 0x0000 //TX_DR_RESRV_6 +526 0x0000 //TX_DR_RESRV_7 +527 0x0000 //TX_DR_RESRV_8 +528 0x1333 //TX_WIND_MARK_TH +529 0x399A //TX_CORR_THR +530 0x0004 //TX_SNR_THR +531 0x0010 //TX_ENGY_THR +532 0x1770 //TX_CORR_HIGH_TH +533 0x6000 //TX_ENGY_THR_2 +534 0x3400 //TX_MEAN_RTO_THR +535 0x0028 //TX_WNS_ENOISE_MIC0_TH +536 0x3000 //TX_RATIOMICL_TH +537 0x64CD //TX_CALIG_HS +538 0x0000 //TX_LVL_CTRL +539 0x0014 //TX_WIND_SUPRTO +540 0x000A //TX_WNS_MIN_G +541 0x0000 //TX_WNS_B_POST_FLT +542 0x2800 //TX_RATIOMICH_TH +543 0xD120 //TX_WIND_INBEAM_L_TH +544 0x0FA0 //TX_WIND_INBEAM_H_TH +545 0x2000 //TX_WNS_RESRV_0 +546 0x59D8 //TX_WNS_RESRV_1 +547 0x0000 //TX_WNS_RESRV_2 +548 0x0000 //TX_WNS_RESRV_3 +549 0x0000 //TX_WNS_RESRV_4 +550 0x0000 //TX_WNS_RESRV_5 +551 0x0000 //TX_WNS_RESRV_6 +552 0x0000 //TX_PB_B_POST_FLT_LESSCUT +553 0x0070 //TX_BF_LESSCUT_BBIN +554 0x0070 //TX_BF_LESSCUT_EBIN +555 0x0010 //TX_POSTBFB0 +556 0x0070 //TX_POSTBFB +557 0x00B0 //TX_POSTBFE +558 0x0E66 //TX_SPEECH_SNR_TH +559 0x0050 //TX_PB_MAX_PRI_SNR_TH +560 0x770A //TX_MAX_PRI_SNR_TH_L +561 0x0000 //TX_PFGAIN +562 0x0000 //TX_MAINTOREFR_TH +563 0x0000 //TX_SAM_MARK +564 0x0000 //TX_PB_RESRV_0 +565 0x0000 //TX_PB_RESRV_1 +566 0x0020 //TX_FDEQ_SUBNUM +567 0x4848 //TX_FDEQ_GAIN_0 +568 0x4848 //TX_FDEQ_GAIN_1 +569 0x4850 //TX_FDEQ_GAIN_2 +570 0x5050 //TX_FDEQ_GAIN_3 +571 0x4B48 //TX_FDEQ_GAIN_4 +572 0x484B //TX_FDEQ_GAIN_5 +573 0x4B5C //TX_FDEQ_GAIN_6 +574 0x564E //TX_FDEQ_GAIN_7 +575 0x4C4E //TX_FDEQ_GAIN_8 +576 0x4E45 //TX_FDEQ_GAIN_9 +577 0x494A //TX_FDEQ_GAIN_10 +578 0x534D //TX_FDEQ_GAIN_11 +579 0x5C57 //TX_FDEQ_GAIN_12 +580 0x5667 //TX_FDEQ_GAIN_13 +581 0x6778 //TX_FDEQ_GAIN_14 +582 0x8087 //TX_FDEQ_GAIN_15 +583 0x4848 //TX_FDEQ_GAIN_16 +584 0x4848 //TX_FDEQ_GAIN_17 +585 0x4848 //TX_FDEQ_GAIN_18 +586 0x4848 //TX_FDEQ_GAIN_19 +587 0x4848 //TX_FDEQ_GAIN_20 +588 0x4848 //TX_FDEQ_GAIN_21 +589 0x4848 //TX_FDEQ_GAIN_22 +590 0x4848 //TX_FDEQ_GAIN_23 +591 0x0202 //TX_FDEQ_BIN_0 +592 0x0203 //TX_FDEQ_BIN_1 +593 0x0303 //TX_FDEQ_BIN_2 +594 0x0304 //TX_FDEQ_BIN_3 +595 0x0405 //TX_FDEQ_BIN_4 +596 0x0506 //TX_FDEQ_BIN_5 +597 0x0708 //TX_FDEQ_BIN_6 +598 0x090A //TX_FDEQ_BIN_7 +599 0x0B0C //TX_FDEQ_BIN_8 +600 0x0D0E //TX_FDEQ_BIN_9 +601 0x1013 //TX_FDEQ_BIN_10 +602 0x1719 //TX_FDEQ_BIN_11 +603 0x1B1E //TX_FDEQ_BIN_12 +604 0x1E1E //TX_FDEQ_BIN_13 +605 0x1E28 //TX_FDEQ_BIN_14 +606 0x282C //TX_FDEQ_BIN_15 +607 0x0000 //TX_FDEQ_BIN_16 +608 0x0000 //TX_FDEQ_BIN_17 +609 0x0000 //TX_FDEQ_BIN_18 +610 0x0000 //TX_FDEQ_BIN_19 +611 0x0000 //TX_FDEQ_BIN_20 +612 0x0000 //TX_FDEQ_BIN_21 +613 0x0000 //TX_FDEQ_BIN_22 +614 0x0000 //TX_FDEQ_BIN_23 +615 0x0000 //TX_FDEQ_PADDING +616 0x0030 //TX_PREEQ_SUBNUM_MIC0 +617 0x4848 //TX_PREEQ_GAIN_MIC0_0 +618 0x4848 //TX_PREEQ_GAIN_MIC0_1 +619 0x4848 //TX_PREEQ_GAIN_MIC0_2 +620 0x4848 //TX_PREEQ_GAIN_MIC0_3 +621 0x4848 //TX_PREEQ_GAIN_MIC0_4 +622 0x4848 //TX_PREEQ_GAIN_MIC0_5 +623 0x4848 //TX_PREEQ_GAIN_MIC0_6 +624 0x4848 //TX_PREEQ_GAIN_MIC0_7 +625 0x4848 //TX_PREEQ_GAIN_MIC0_8 +626 0x4848 //TX_PREEQ_GAIN_MIC0_9 +627 0x4848 //TX_PREEQ_GAIN_MIC0_10 +628 0x4848 //TX_PREEQ_GAIN_MIC0_11 +629 0x4848 //TX_PREEQ_GAIN_MIC0_12 +630 0x4848 //TX_PREEQ_GAIN_MIC0_13 +631 0x4848 //TX_PREEQ_GAIN_MIC0_14 +632 0x4848 //TX_PREEQ_GAIN_MIC0_15 +633 0x4848 //TX_PREEQ_GAIN_MIC0_16 +634 0x4848 //TX_PREEQ_GAIN_MIC0_17 +635 0x4848 //TX_PREEQ_GAIN_MIC0_18 +636 0x4848 //TX_PREEQ_GAIN_MIC0_19 +637 0x4848 //TX_PREEQ_GAIN_MIC0_20 +638 0x4848 //TX_PREEQ_GAIN_MIC0_21 +639 0x4848 //TX_PREEQ_GAIN_MIC0_22 +640 0x4848 //TX_PREEQ_GAIN_MIC0_23 +641 0x0202 //TX_PREEQ_BIN_MIC0_0 +642 0x0203 //TX_PREEQ_BIN_MIC0_1 +643 0x0303 //TX_PREEQ_BIN_MIC0_2 +644 0x0304 //TX_PREEQ_BIN_MIC0_3 +645 0x0405 //TX_PREEQ_BIN_MIC0_4 +646 0x0506 //TX_PREEQ_BIN_MIC0_5 +647 0x0808 //TX_PREEQ_BIN_MIC0_6 +648 0x0809 //TX_PREEQ_BIN_MIC0_7 +649 0x0A0A //TX_PREEQ_BIN_MIC0_8 +650 0x0C10 //TX_PREEQ_BIN_MIC0_9 +651 0x1013 //TX_PREEQ_BIN_MIC0_10 +652 0x1414 //TX_PREEQ_BIN_MIC0_11 +653 0x261E //TX_PREEQ_BIN_MIC0_12 +654 0x1E14 //TX_PREEQ_BIN_MIC0_13 +655 0x1414 //TX_PREEQ_BIN_MIC0_14 +656 0x2814 //TX_PREEQ_BIN_MIC0_15 +657 0x401E //TX_PREEQ_BIN_MIC0_16 +658 0x0000 //TX_PREEQ_BIN_MIC0_17 +659 0x0000 //TX_PREEQ_BIN_MIC0_18 +660 0x0000 //TX_PREEQ_BIN_MIC0_19 +661 0x0000 //TX_PREEQ_BIN_MIC0_20 +662 0x0000 //TX_PREEQ_BIN_MIC0_21 +663 0x0000 //TX_PREEQ_BIN_MIC0_22 +664 0x0000 //TX_PREEQ_BIN_MIC0_23 +665 0x0030 //TX_PREEQ_SUBNUM_MIC1 +666 0x4848 //TX_PREEQ_GAIN_MIC1_0 +667 0x4848 //TX_PREEQ_GAIN_MIC1_1 +668 0x4848 //TX_PREEQ_GAIN_MIC1_2 +669 0x4848 //TX_PREEQ_GAIN_MIC1_3 +670 0x4848 //TX_PREEQ_GAIN_MIC1_4 +671 0x4848 //TX_PREEQ_GAIN_MIC1_5 +672 0x4848 //TX_PREEQ_GAIN_MIC1_6 +673 0x4849 //TX_PREEQ_GAIN_MIC1_7 +674 0x4A4A //TX_PREEQ_GAIN_MIC1_8 +675 0x4B4D //TX_PREEQ_GAIN_MIC1_9 +676 0x4E4F //TX_PREEQ_GAIN_MIC1_10 +677 0x5052 //TX_PREEQ_GAIN_MIC1_11 +678 0x5354 //TX_PREEQ_GAIN_MIC1_12 +679 0x5454 //TX_PREEQ_GAIN_MIC1_13 +680 0x5653 //TX_PREEQ_GAIN_MIC1_14 +681 0x4C48 //TX_PREEQ_GAIN_MIC1_15 +682 0x4444 //TX_PREEQ_GAIN_MIC1_16 +683 0x4848 //TX_PREEQ_GAIN_MIC1_17 +684 0x4848 //TX_PREEQ_GAIN_MIC1_18 +685 0x4848 //TX_PREEQ_GAIN_MIC1_19 +686 0x4848 //TX_PREEQ_GAIN_MIC1_20 +687 0x4848 //TX_PREEQ_GAIN_MIC1_21 +688 0x4848 //TX_PREEQ_GAIN_MIC1_22 +689 0x4848 //TX_PREEQ_GAIN_MIC1_23 +690 0x0202 //TX_PREEQ_BIN_MIC1_0 +691 0x0203 //TX_PREEQ_BIN_MIC1_1 +692 0x0303 //TX_PREEQ_BIN_MIC1_2 +693 0x0304 //TX_PREEQ_BIN_MIC1_3 +694 0x0405 //TX_PREEQ_BIN_MIC1_4 +695 0x0506 //TX_PREEQ_BIN_MIC1_5 +696 0x0808 //TX_PREEQ_BIN_MIC1_6 +697 0x0809 //TX_PREEQ_BIN_MIC1_7 +698 0x0A0A //TX_PREEQ_BIN_MIC1_8 +699 0x0C10 //TX_PREEQ_BIN_MIC1_9 +700 0x1013 //TX_PREEQ_BIN_MIC1_10 +701 0x1414 //TX_PREEQ_BIN_MIC1_11 +702 0x261E //TX_PREEQ_BIN_MIC1_12 +703 0x1E14 //TX_PREEQ_BIN_MIC1_13 +704 0x1414 //TX_PREEQ_BIN_MIC1_14 +705 0x2814 //TX_PREEQ_BIN_MIC1_15 +706 0x401E //TX_PREEQ_BIN_MIC1_16 +707 0x0000 //TX_PREEQ_BIN_MIC1_17 +708 0x0000 //TX_PREEQ_BIN_MIC1_18 +709 0x0000 //TX_PREEQ_BIN_MIC1_19 +710 0x0000 //TX_PREEQ_BIN_MIC1_20 +711 0x0000 //TX_PREEQ_BIN_MIC1_21 +712 0x0000 //TX_PREEQ_BIN_MIC1_22 +713 0x0000 //TX_PREEQ_BIN_MIC1_23 +714 0x0020 //TX_PREEQ_SUBNUM_MIC2 +715 0x4848 //TX_PREEQ_GAIN_MIC2_0 +716 0x4848 //TX_PREEQ_GAIN_MIC2_1 +717 0x4848 //TX_PREEQ_GAIN_MIC2_2 +718 0x4848 //TX_PREEQ_GAIN_MIC2_3 +719 0x4848 //TX_PREEQ_GAIN_MIC2_4 +720 0x4848 //TX_PREEQ_GAIN_MIC2_5 +721 0x494B //TX_PREEQ_GAIN_MIC2_6 +722 0x4C4D //TX_PREEQ_GAIN_MIC2_7 +723 0x4E4F //TX_PREEQ_GAIN_MIC2_8 +724 0x5051 //TX_PREEQ_GAIN_MIC2_9 +725 0x5255 //TX_PREEQ_GAIN_MIC2_10 +726 0x5754 //TX_PREEQ_GAIN_MIC2_11 +727 0x5454 //TX_PREEQ_GAIN_MIC2_12 +728 0x544F //TX_PREEQ_GAIN_MIC2_13 +729 0x463D //TX_PREEQ_GAIN_MIC2_14 +730 0x4A48 //TX_PREEQ_GAIN_MIC2_15 +731 0x4848 //TX_PREEQ_GAIN_MIC2_16 +732 0x4848 //TX_PREEQ_GAIN_MIC2_17 +733 0x4848 //TX_PREEQ_GAIN_MIC2_18 +734 0x4848 //TX_PREEQ_GAIN_MIC2_19 +735 0x4848 //TX_PREEQ_GAIN_MIC2_20 +736 0x4848 //TX_PREEQ_GAIN_MIC2_21 +737 0x4848 //TX_PREEQ_GAIN_MIC2_22 +738 0x4848 //TX_PREEQ_GAIN_MIC2_23 +739 0x0203 //TX_PREEQ_BIN_MIC2_0 +740 0x0303 //TX_PREEQ_BIN_MIC2_1 +741 0x0304 //TX_PREEQ_BIN_MIC2_2 +742 0x0405 //TX_PREEQ_BIN_MIC2_3 +743 0x0506 //TX_PREEQ_BIN_MIC2_4 +744 0x0808 //TX_PREEQ_BIN_MIC2_5 +745 0x0809 //TX_PREEQ_BIN_MIC2_6 +746 0x0A0A //TX_PREEQ_BIN_MIC2_7 +747 0x0C10 //TX_PREEQ_BIN_MIC2_8 +748 0x1013 //TX_PREEQ_BIN_MIC2_9 +749 0x1414 //TX_PREEQ_BIN_MIC2_10 +750 0x261E //TX_PREEQ_BIN_MIC2_11 +751 0x1E14 //TX_PREEQ_BIN_MIC2_12 +752 0x1414 //TX_PREEQ_BIN_MIC2_13 +753 0x2814 //TX_PREEQ_BIN_MIC2_14 +754 0x4022 //TX_PREEQ_BIN_MIC2_15 +755 0x0000 //TX_PREEQ_BIN_MIC2_16 +756 0x0000 //TX_PREEQ_BIN_MIC2_17 +757 0x0000 //TX_PREEQ_BIN_MIC2_18 +758 0x0000 //TX_PREEQ_BIN_MIC2_19 +759 0x0000 //TX_PREEQ_BIN_MIC2_20 +760 0x0000 //TX_PREEQ_BIN_MIC2_21 +761 0x0000 //TX_PREEQ_BIN_MIC2_22 +762 0x0000 //TX_PREEQ_BIN_MIC2_23 +763 0x0006 //TX_MASKING_ABILITY +764 0x0800 //TX_NND_WEIGHT +765 0x0050 //TX_MIC_CALIBRATION_0 +766 0x0065 //TX_MIC_CALIBRATION_1 +767 0x0050 //TX_MIC_CALIBRATION_2 +768 0x0050 //TX_MIC_CALIBRATION_3 +769 0x0046 //TX_MIC_PWR_BIAS_0 +770 0x0040 //TX_MIC_PWR_BIAS_1 +771 0x0046 //TX_MIC_PWR_BIAS_2 +772 0x0046 //TX_MIC_PWR_BIAS_3 +773 0x0000 //TX_GAIN_LIMIT_0 +774 0x000F //TX_GAIN_LIMIT_1 +775 0x0000 //TX_GAIN_LIMIT_2 +776 0x0000 //TX_GAIN_LIMIT_3 +777 0x7F5B //TX_BVE_NOVAD0_ALPHADOWN +778 0x7FDE //TX_BVE_VAD0_ALPHAUP +779 0x7F3A //TX_BVE_VAD0_ALPHADOWN +780 0x2000 //TX_BVE_GAINWEIGHT_NOFEVADLI +781 0x7F5B //TX_BVE_FEVADLI_ALPHA +782 0x7F19 //TX_BVE_NOVAD0_ALPHAUP +783 0x0800 //TX_TDDRC_ALPHA_UP_01 +784 0x0800 //TX_TDDRC_ALPHA_UP_02 +785 0x0800 //TX_TDDRC_ALPHA_UP_03 +786 0x0800 //TX_TDDRC_ALPHA_UP_04 +787 0x7EB8 //TX_TDDRC_ALPHA_DWN_01 +788 0x7EB8 //TX_TDDRC_ALPHA_DWN_02 +789 0x7EB8 //TX_TDDRC_ALPHA_DWN_03 +790 0x7EB8 //TX_TDDRC_ALPHA_DWN_04 +791 0x7FFF //TX_TDDRC_TD_DRC_LIMIT +792 0x0800 //TX_TDDRC_POST_LIMIT_GAIN +793 0x0000 //TX_TDDRC_RESRV_0 +794 0x0000 //TX_TDDRC_RESRV_1 +795 0x0018 //TX_FDDRC_BAND_MARGIN_0 +796 0x0030 //TX_FDDRC_BAND_MARGIN_1 +797 0x0050 //TX_FDDRC_BAND_MARGIN_2 +798 0x0080 //TX_FDDRC_BAND_MARGIN_3 +799 0x0007 //TX_FDDRC_BLOCK_EXP +800 0x5000 //TX_FDDRC_THRD_2_0 +801 0x5000 //TX_FDDRC_THRD_2_1 +802 0x5000 //TX_FDDRC_THRD_2_2 +803 0x5000 //TX_FDDRC_THRD_2_3 +804 0x6400 //TX_FDDRC_THRD_3_0 +805 0x6400 //TX_FDDRC_THRD_3_1 +806 0x6400 //TX_FDDRC_THRD_3_2 +807 0x6400 //TX_FDDRC_THRD_3_3 +808 0x2000 //TX_FDDRC_SLANT_0_0 +809 0x2000 //TX_FDDRC_SLANT_0_1 +810 0x2000 //TX_FDDRC_SLANT_0_2 +811 0x2000 //TX_FDDRC_SLANT_0_3 +812 0x5333 //TX_FDDRC_SLANT_1_0 +813 0x5333 //TX_FDDRC_SLANT_1_1 +814 0x5333 //TX_FDDRC_SLANT_1_2 +815 0x5333 //TX_FDDRC_SLANT_1_3 +816 0x0010 //TX_DEADMIC_SILENCE_TH +817 0x0600 //TX_MIC_DEGRADE_TH +818 0x0078 //TX_DEADMIC_CNT +819 0x0078 //TX_MIC_DEGRADE_CNT +820 0x0000 //TX_FDDRC_RESRV_4 +821 0x0000 //TX_FDDRC_RESRV_5 +822 0x0000 //TX_FDDRC_RESRV_6 +823 0x7FFF //TX_KS_NOISEPASTE_FACTOR +824 0x0001 //TX_KS_CONFIG +825 0x7FFF //TX_KS_GAIN_MIN +826 0x0000 //TX_KS_RESRV_0 +827 0x0000 //TX_KS_RESRV_1 +828 0x0000 //TX_KS_RESRV_2 +829 0x7C00 //TX_LAMBDA_PKA_FP +830 0x2000 //TX_TPKA_FP +831 0x0080 //TX_MIN_G_FP +832 0x2000 //TX_MAX_G_FP +833 0x4848 //TX_FFP_FP_K_METAL +834 0x4000 //TX_A_POST_FLT_FP +835 0x0F5C //TX_RTO_OUTBEAM_TH +836 0x4CCD //TX_TPKA_FP_THD +837 0x0000 //TX_MAX_G_FP_BLK +838 0x0000 //TX_FFP_FADEIN +839 0x0000 //TX_FFP_FADEOUT +840 0x0000 //TX_WHISPERCTH +841 0x0000 //TX_WHISPERHOLDT +842 0x0000 //TX_WHISP_ENTHH +843 0x0000 //TX_WHISP_ENTHL +844 0x0000 //TX_WHISP_RTOTH +845 0x0000 //TX_WHISP_RTOTH2 +846 0x0096 //TX_MUTE_PERIOD +847 0x0000 //TX_FADE_IN_PERIOD +848 0x0100 //TX_FFP_RESRV_2 +849 0x0020 //TX_FFP_RESRV_3 +850 0x0000 //TX_FFP_RESRV_4 +851 0x0000 //TX_FFP_RESRV_5 +852 0x0000 //TX_FFP_RESRV_6 +853 0x0002 //TX_FILTINDX +854 0x0003 //TX_TDDRC_THRD_0 +855 0x0004 //TX_TDDRC_THRD_1 +856 0x1000 //TX_TDDRC_THRD_2 +857 0x1000 //TX_TDDRC_THRD_3 +858 0x6000 //TX_TDDRC_SLANT_0 +859 0x6000 //TX_TDDRC_SLANT_1 +860 0x0800 //TX_TDDRC_ALPHA_UP_00 +861 0x7EB8 //TX_TDDRC_ALPHA_DWN_00 +862 0x0000 //TX_TDDRC_HMNC_FLAG +863 0x199A //TX_TDDRC_HMNC_GAIN +864 0x0000 //TX_TDDRC_SMT_FLAG +865 0x0CCD //TX_TDDRC_SMT_W +866 0x0E21 //TX_TDDRC_DRC_GAIN +867 0x7FFF //TX_TDDRC_LMT_THRD +868 0x0000 //TX_TDDRC_LMT_ALPHA +869 0x0000 //TX_TFMASKLTH +870 0x0000 //TX_TFMASKLTHL +871 0x0CCD //TX_TFMASKHTH +872 0x0CCD //TX_TFMASKLTH_BINVAD +873 0xF333 //TX_TFMASKLTH_NS_EST +874 0x2CCD //TX_TFMASKLTH_DOA +875 0xECCD //TX_TFMASKTH_BLESSCUT +876 0x1000 //TX_B_LESSCUT_RTO_MASK +877 0x3800 //TX_SB_RHO_MEAN_TH_ABN +878 0x2000 //TX_B_POST_FLT_MASK +879 0x0000 //TX_B_POST_FLT_MASK1 +880 0x5333 //TX_GAIN_WIND_MASK +881 0x7FFF //TX_TFMASK_BFSTRICT_MUSIC +882 0x0000 //TX_TFMASK_BFSTRICT_NOMUSIC +883 0x7333 //TX_FASTNS_OUTIN_TH +884 0x0CCD //TX_FASTNS_TFMASK_TH +885 0x0CCD //TX_FASTNS_TFMASKBIN_TH1 +886 0x0CCD //TX_FASTNS_TFMASKBIN_TH2 +887 0x0CCD //TX_FASTNS_TFMASKBIN_TH3 +888 0x00C8 //TX_FASTNS_ARSPC_TH +889 0xC000 //TX_FASTNS_MASK5_TH +890 0x4848 //TX_POSTSSA_MIN_G_VR_MASK +891 0x4000 //TX_A_LESSCUT_RTO_MASK +892 0x1770 //TX_FASTNS_NOISETH +893 0xC000 //TX_FASTNS_SSA_THLFL +894 0xC000 //TX_FASTNS_SSA_THHFL +895 0xCCCC //TX_FASTNS_SSA_THLFH +896 0xD999 //TX_FASTNS_SSA_THHFH +897 0x2339 //TX_SENDFUNC_REG_MICMUTE +898 0x0021 //TX_SENDFUNC_REG_MICMUTE1 +899 0x02BC //TX_MICMUTE_RATIO_THR +900 0x0140 //TX_MICMUTE_AMP_THR +901 0x0004 //TX_MICMUTE_HPF_IND +902 0x00C0 //TX_MICMUTE_LOG_EYR_TH +903 0x0008 //TX_MICMUTE_CVG_TIME +904 0x0008 //TX_MICMUTE_RELEASE_TIME +905 0x01FE //TX_MIC_VOLUME_MIC0MUTE +906 0x0020 //TX_MICMUTE_EPD_OFFSET_0 +907 0x001E //TX_MICMUTE_FRQ_AEC_L +908 0x7999 //TX_MICMUTE_EAD_THR +909 0x7FFF //TX_MICMUTE_LAMBDA_CB_NLE +910 0x7FFF //TX_MICMUTE_LAMBDA_RE_EST +911 0x4000 //TX_DTD_THR1_MICMUTE_0 +912 0x7000 //TX_DTD_THR1_MICMUTE_1 +913 0x7FFF //TX_DTD_THR1_MICMUTE_2 +914 0x7FFF //TX_DTD_THR1_MICMUTE_3 +915 0x6CCC //TX_DTD_THR2_MICMUTE_0 +916 0x0400 //TX_MICMUTE_MIN_EQ_RE_EST_0 +917 0x0400 //TX_MICMUTE_MIN_EQ_RE_EST_1 +918 0x1000 //TX_MICMUTE_MIN_EQ_RE_EST_2 +919 0x7FFF //TX_MICMUTE_MIN_EQ_RE_EST_3 +920 0x7FFF //TX_MICMUTE_MIN_EQ_RE_EST_4 +921 0x4000 //TX_MICMUTE_C_POST_FLT +922 0x03E8 //TX_MICMUTE_DT_CUT_K +923 0x0001 //TX_MICMUTE_DT_CUT_THR +924 0x03E8 //TX_MICMUTE_DT_CUT_K2 +925 0x0001 //TX_MICMUTE_DT_CUT_THR2 +926 0x0064 //TX_MICMUTE_DT2_HOLD_N +927 0x1000 //TX_MICMUTE_RATIODTH_THCUT +928 0x1000 //TX_MICMUTE_B_POST_FLT_ECHOL +929 0x7FFF //TX_MICMUTE_B_POST_FLT_ECHOH +930 0x0400 //TX_MICMUTE_C_POST_FLT_MASK +931 0x7999 //TX_MICMUTE_RATIODTL_CUT_TH +932 0x0258 //TX_MICMUTE_DT_CUT_K1 +933 0x0800 //TX_MICMUTE_N2_SN_EST +934 0xFC00 //TX_MICMUTE_THR_SN_EST_0 +935 0x001C //TX_MICMUTE_MIN_G_CTRL_0 +936 0x6000 //TX_MICMUTE_A_POST_FILT_S_0 +937 0x7000 //TX_MICMUTE_B_POST_FILT_0 +938 0x2710 //TX_MIC1RUB_AMP_THR +939 0x0010 //TX_MIC1MUTE_RATIO_THR +940 0x0450 //TX_MIC1MUTE_AMP_THR +941 0x0008 //TX_MIC1MUTE_CVG_TIME +942 0x0008 //TX_MIC1MUTE_RELEASE_TIME +943 0x0000 //TX_AMS_RESRV_01 +944 0x0000 //TX_AMS_RESRV_02 +945 0x0000 //TX_AMS_RESRV_03 +946 0x0000 //TX_AMS_RESRV_04 +947 0x0000 //TX_AMS_RESRV_05 +948 0x0000 //TX_AMS_RESRV_06 +949 0x0000 //TX_AMS_RESRV_07 +950 0x0000 //TX_AMS_RESRV_08 +951 0x0000 //TX_AMS_RESRV_09 +952 0x0000 //TX_AMS_RESRV_10 +953 0x0000 //TX_AMS_RESRV_11 +954 0x0000 //TX_AMS_RESRV_12 +955 0x0000 //TX_AMS_RESRV_13 +956 0x0000 //TX_AMS_RESRV_14 +957 0x0000 //TX_AMS_RESRV_15 +958 0x0000 //TX_AMS_RESRV_16 +959 0x0000 //TX_AMS_RESRV_17 +960 0x0000 //TX_AMS_RESRV_18 +961 0x0000 //TX_AMS_RESRV_19 +#RX +0 0x206C //RX_RECVFUNC_MODE_0 +1 0x0000 //RX_RECVFUNC_MODE_1 +2 0x0003 //RX_SAMPLINGFREQ_SIG +3 0x0003 //RX_SAMPLINGFREQ_PROC +4 0x000A //RX_FRAME_SZ +5 0x0000 //RX_DELAY_OPT +6 0x6000 //RX_TDDRC_ALPHA_UP_1 +7 0x6000 //RX_TDDRC_ALPHA_UP_2 +8 0x6000 //RX_TDDRC_ALPHA_UP_3 +9 0x1000 //RX_TDDRC_ALPHA_UP_4 +10 0x0800 //RX_PGA +11 0x7652 //RX_A_HP +12 0x4000 //RX_B_PE +13 0x7800 //RX_THR_PITCH_DET_0 +14 0x7000 //RX_THR_PITCH_DET_1 +15 0x6000 //RX_THR_PITCH_DET_2 +16 0x0008 //RX_PITCH_BFR_LEN +17 0x0003 //RX_SBD_PITCH_DET +18 0x0100 //RX_PP_RESRV_0 +19 0x0020 //RX_PP_RESRV_1 +20 0x0400 //RX_N_SN_EST +21 0x000C //RX_N2_SN_EST +22 0x0010 //RX_NS_LVL_CTRL +23 0xF800 //RX_THR_SN_EST +24 0x7E00 //RX_LAMBDA_PFILT +25 0x000A //RX_FENS_RESRV_0 +26 0x0190 //RX_FENS_RESRV_1 +27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +30 0x0002 //RX_EXTRA_NS_L +31 0x0800 //RX_EXTRA_NS_A +32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +33 0x7214 //RX_TDDRC_LIMITER_THRD +34 0x0800 //RX_TDDRC_LIMITER_GAIN +35 0x199A //RX_A_POST_FLT +36 0x0000 //RX_LMT_THRD +37 0x4000 //RX_LMT_ALPHA +38 0x0020 //RX_FDEQ_SUBNUM +39 0x4848 //RX_FDEQ_GAIN_0 +40 0x3B3B //RX_FDEQ_GAIN_1 +41 0x3942 //RX_FDEQ_GAIN_2 +42 0x4645 //RX_FDEQ_GAIN_3 +43 0x494A //RX_FDEQ_GAIN_4 +44 0x5D5A //RX_FDEQ_GAIN_5 +45 0x5B5B //RX_FDEQ_GAIN_6 +46 0x5A51 //RX_FDEQ_GAIN_7 +47 0x514F //RX_FDEQ_GAIN_8 +48 0x5568 //RX_FDEQ_GAIN_9 +49 0x7460 //RX_FDEQ_GAIN_10 +50 0x544E //RX_FDEQ_GAIN_11 +51 0x4848 //RX_FDEQ_GAIN_12 +52 0x484A //RX_FDEQ_GAIN_13 +53 0x5155 //RX_FDEQ_GAIN_14 +54 0x577B //RX_FDEQ_GAIN_15 +55 0x4848 //RX_FDEQ_GAIN_16 +56 0x4848 //RX_FDEQ_GAIN_17 +57 0x4848 //RX_FDEQ_GAIN_18 +58 0x4848 //RX_FDEQ_GAIN_19 +59 0x4848 //RX_FDEQ_GAIN_20 +60 0x4848 //RX_FDEQ_GAIN_21 +61 0x4848 //RX_FDEQ_GAIN_22 +62 0x4848 //RX_FDEQ_GAIN_23 +63 0x0202 //RX_FDEQ_BIN_0 +64 0x0203 //RX_FDEQ_BIN_1 +65 0x0303 //RX_FDEQ_BIN_2 +66 0x0304 //RX_FDEQ_BIN_3 +67 0x0404 //RX_FDEQ_BIN_4 +68 0x0308 //RX_FDEQ_BIN_5 +69 0x0808 //RX_FDEQ_BIN_6 +70 0x090A //RX_FDEQ_BIN_7 +71 0x0B0C //RX_FDEQ_BIN_8 +72 0x0D0E //RX_FDEQ_BIN_9 +73 0x1013 //RX_FDEQ_BIN_10 +74 0x1719 //RX_FDEQ_BIN_11 +75 0x1B1E //RX_FDEQ_BIN_12 +76 0x1E1E //RX_FDEQ_BIN_13 +77 0x1E28 //RX_FDEQ_BIN_14 +78 0x282C //RX_FDEQ_BIN_15 +79 0x0000 //RX_FDEQ_BIN_16 +80 0x0000 //RX_FDEQ_BIN_17 +81 0x0000 //RX_FDEQ_BIN_18 +82 0x0000 //RX_FDEQ_BIN_19 +83 0x0000 //RX_FDEQ_BIN_20 +84 0x0000 //RX_FDEQ_BIN_21 +85 0x0000 //RX_FDEQ_BIN_22 +86 0x0000 //RX_FDEQ_BIN_23 +87 0x4000 //RX_FDEQ_RESRV_0 +88 0x0320 //RX_FDEQ_RESRV_1 +89 0x0018 //RX_FDDRC_BAND_MARGIN_0 +90 0x0035 //RX_FDDRC_BAND_MARGIN_1 +91 0x00D5 //RX_FDDRC_BAND_MARGIN_2 +92 0x0120 //RX_FDDRC_BAND_MARGIN_3 +93 0x0004 //RX_FDDRC_BLOCK_EXP +94 0x5000 //RX_FDDRC_THRD_2_0 +95 0x5000 //RX_FDDRC_THRD_2_1 +96 0x2000 //RX_FDDRC_THRD_2_2 +97 0x5000 //RX_FDDRC_THRD_2_3 +98 0x6400 //RX_FDDRC_THRD_3_0 +99 0x6400 //RX_FDDRC_THRD_3_1 +100 0x2000 //RX_FDDRC_THRD_3_2 +101 0x5000 //RX_FDDRC_THRD_3_3 +102 0x4000 //RX_FDDRC_SLANT_0_0 +103 0x4000 //RX_FDDRC_SLANT_0_1 +104 0x4000 //RX_FDDRC_SLANT_0_2 +105 0x4000 //RX_FDDRC_SLANT_0_3 +106 0x7FFF //RX_FDDRC_SLANT_1_0 +107 0x7FFF //RX_FDDRC_SLANT_1_1 +108 0x7FFF //RX_FDDRC_SLANT_1_2 +109 0x7FFF //RX_FDDRC_SLANT_1_3 +110 0x0000 //RX_FDDRC_RESRV_0 +111 0x0002 //RX_FILTINDX +112 0x0002 //RX_TDDRC_THRD_0 +113 0x0004 //RX_TDDRC_THRD_1 +114 0x1A00 //RX_TDDRC_THRD_2 +115 0x1A00 //RX_TDDRC_THRD_3 +116 0x7EB8 //RX_TDDRC_SLANT_0 +117 0x2500 //RX_TDDRC_SLANT_1 +118 0x6000 //RX_TDDRC_ALPHA_UP_0 +119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +120 0x0000 //RX_TDDRC_HMNC_FLAG +121 0x199A //RX_TDDRC_HMNC_GAIN +122 0x0001 //RX_TDDRC_SMT_FLAG +123 0x0CCD //RX_TDDRC_SMT_W +124 0x032A //RX_TDDRC_DRC_GAIN +125 0x7C00 //RX_LAMBDA_PKA_FP +126 0x2000 //RX_TPKA_FP +127 0x2000 //RX_MIN_G_FP +128 0x0080 //RX_MAX_G_FP +129 0x0100 //RX_SPK_VOL +130 0x0000 //RX_VOL_RESRV_0 +131 0x0000 //RX_MAXLEVEL_CNG +132 0x3000 //RX_BWE_UV_TH +133 0x3000 //RX_BWE_UV_TH2 +134 0x1800 //RX_BWE_UV_TH3 +135 0x1000 //RX_BWE_V_TH +136 0x04CD //RX_BWE_GAIN1_V_TH1 +137 0x0F33 //RX_BWE_GAIN1_V_TH2 +138 0x7333 //RX_BWE_UV_EQ +139 0x199A //RX_BWE_V_EQ +140 0x7333 //RX_BWE_TONE_TH +141 0x0004 //RX_BWE_UV_HOLD_T +142 0x6CCD //RX_BWE_GAIN2_ALPHA +143 0x799A //RX_BWE_GAIN3_ALPHA +144 0x001E //RX_BWE_CUTOFF +145 0x3000 //RX_BWE_GAINFILL +146 0x3200 //RX_BWE_MAXTH_TONE +147 0x2000 //RX_BWE_EQ_0 +148 0x2000 //RX_BWE_EQ_1 +149 0x2000 //RX_BWE_EQ_2 +150 0x2000 //RX_BWE_EQ_3 +151 0x2000 //RX_BWE_EQ_4 +152 0x2000 //RX_BWE_EQ_5 +153 0x2000 //RX_BWE_EQ_6 +154 0x0000 //RX_BWE_RESRV_0 +155 0x0000 //RX_BWE_RESRV_1 +156 0x0000 //RX_BWE_RESRV_2 +#VOL 0 +6 0x6000 //RX_TDDRC_ALPHA_UP_1 +7 0x6000 //RX_TDDRC_ALPHA_UP_2 +8 0x6000 //RX_TDDRC_ALPHA_UP_3 +9 0x1000 //RX_TDDRC_ALPHA_UP_4 +27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +33 0x7214 //RX_TDDRC_LIMITER_THRD +34 0x0800 //RX_TDDRC_LIMITER_GAIN +112 0x0002 //RX_TDDRC_THRD_0 +113 0x0004 //RX_TDDRC_THRD_1 +114 0x1A00 //RX_TDDRC_THRD_2 +115 0x1A00 //RX_TDDRC_THRD_3 +116 0x7EB8 //RX_TDDRC_SLANT_0 +117 0x2500 //RX_TDDRC_SLANT_1 +118 0x6000 //RX_TDDRC_ALPHA_UP_0 +119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +120 0x0000 //RX_TDDRC_HMNC_FLAG +121 0x199A //RX_TDDRC_HMNC_GAIN +122 0x0001 //RX_TDDRC_SMT_FLAG +123 0x0CCD //RX_TDDRC_SMT_W +124 0x032A //RX_TDDRC_DRC_GAIN +38 0x0020 //RX_FDEQ_SUBNUM +39 0x4848 //RX_FDEQ_GAIN_0 +40 0x3B3B //RX_FDEQ_GAIN_1 +41 0x3942 //RX_FDEQ_GAIN_2 +42 0x4645 //RX_FDEQ_GAIN_3 +43 0x494A //RX_FDEQ_GAIN_4 +44 0x5D5A //RX_FDEQ_GAIN_5 +45 0x5B5B //RX_FDEQ_GAIN_6 +46 0x5A51 //RX_FDEQ_GAIN_7 +47 0x514F //RX_FDEQ_GAIN_8 +48 0x5568 //RX_FDEQ_GAIN_9 +49 0x7460 //RX_FDEQ_GAIN_10 +50 0x544E //RX_FDEQ_GAIN_11 +51 0x4848 //RX_FDEQ_GAIN_12 +52 0x484A //RX_FDEQ_GAIN_13 +53 0x5155 //RX_FDEQ_GAIN_14 +54 0x577B //RX_FDEQ_GAIN_15 +55 0x4848 //RX_FDEQ_GAIN_16 +56 0x4848 //RX_FDEQ_GAIN_17 +57 0x4848 //RX_FDEQ_GAIN_18 +58 0x4848 //RX_FDEQ_GAIN_19 +59 0x4848 //RX_FDEQ_GAIN_20 +60 0x4848 //RX_FDEQ_GAIN_21 +61 0x4848 //RX_FDEQ_GAIN_22 +62 0x4848 //RX_FDEQ_GAIN_23 +63 0x0202 //RX_FDEQ_BIN_0 +64 0x0203 //RX_FDEQ_BIN_1 +65 0x0303 //RX_FDEQ_BIN_2 +66 0x0304 //RX_FDEQ_BIN_3 +67 0x0404 //RX_FDEQ_BIN_4 +68 0x0308 //RX_FDEQ_BIN_5 +69 0x0808 //RX_FDEQ_BIN_6 +70 0x090A //RX_FDEQ_BIN_7 +71 0x0B0C //RX_FDEQ_BIN_8 +72 0x0D0E //RX_FDEQ_BIN_9 +73 0x1013 //RX_FDEQ_BIN_10 +74 0x1719 //RX_FDEQ_BIN_11 +75 0x1B1E //RX_FDEQ_BIN_12 +76 0x1E1E //RX_FDEQ_BIN_13 +77 0x1E28 //RX_FDEQ_BIN_14 +78 0x282C //RX_FDEQ_BIN_15 +79 0x0000 //RX_FDEQ_BIN_16 +80 0x0000 //RX_FDEQ_BIN_17 +81 0x0000 //RX_FDEQ_BIN_18 +82 0x0000 //RX_FDEQ_BIN_19 +83 0x0000 //RX_FDEQ_BIN_20 +84 0x0000 //RX_FDEQ_BIN_21 +85 0x0000 //RX_FDEQ_BIN_22 +86 0x0000 //RX_FDEQ_BIN_23 +87 0x4000 //RX_FDEQ_RESRV_0 +88 0x0320 //RX_FDEQ_RESRV_1 +89 0x0018 //RX_FDDRC_BAND_MARGIN_0 +90 0x0035 //RX_FDDRC_BAND_MARGIN_1 +91 0x00D5 //RX_FDDRC_BAND_MARGIN_2 +92 0x0120 //RX_FDDRC_BAND_MARGIN_3 +93 0x0004 //RX_FDDRC_BLOCK_EXP +94 0x5000 //RX_FDDRC_THRD_2_0 +95 0x5000 //RX_FDDRC_THRD_2_1 +96 0x2000 //RX_FDDRC_THRD_2_2 +97 0x5000 //RX_FDDRC_THRD_2_3 +98 0x6400 //RX_FDDRC_THRD_3_0 +99 0x6400 //RX_FDDRC_THRD_3_1 +100 0x2000 //RX_FDDRC_THRD_3_2 +101 0x5000 //RX_FDDRC_THRD_3_3 +102 0x4000 //RX_FDDRC_SLANT_0_0 +103 0x4000 //RX_FDDRC_SLANT_0_1 +104 0x4000 //RX_FDDRC_SLANT_0_2 +105 0x4000 //RX_FDDRC_SLANT_0_3 +106 0x7FFF //RX_FDDRC_SLANT_1_0 +107 0x7FFF //RX_FDDRC_SLANT_1_1 +108 0x7FFF //RX_FDDRC_SLANT_1_2 +109 0x7FFF //RX_FDDRC_SLANT_1_3 +110 0x0000 //RX_FDDRC_RESRV_0 +129 0x0100 //RX_SPK_VOL +130 0x0000 //RX_VOL_RESRV_0 +#VOL 1 +6 0x6000 //RX_TDDRC_ALPHA_UP_1 +7 0x6000 //RX_TDDRC_ALPHA_UP_2 +8 0x6000 //RX_TDDRC_ALPHA_UP_3 +9 0x1000 //RX_TDDRC_ALPHA_UP_4 +27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +33 0x7214 //RX_TDDRC_LIMITER_THRD +34 0x0800 //RX_TDDRC_LIMITER_GAIN +112 0x0002 //RX_TDDRC_THRD_0 +113 0x0004 //RX_TDDRC_THRD_1 +114 0x1A00 //RX_TDDRC_THRD_2 +115 0x1A00 //RX_TDDRC_THRD_3 +116 0x7EB8 //RX_TDDRC_SLANT_0 +117 0x2500 //RX_TDDRC_SLANT_1 +118 0x6000 //RX_TDDRC_ALPHA_UP_0 +119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +120 0x0000 //RX_TDDRC_HMNC_FLAG +121 0x199A //RX_TDDRC_HMNC_GAIN +122 0x0001 //RX_TDDRC_SMT_FLAG +123 0x0CCD //RX_TDDRC_SMT_W +124 0x032A //RX_TDDRC_DRC_GAIN +38 0x0020 //RX_FDEQ_SUBNUM +39 0x4848 //RX_FDEQ_GAIN_0 +40 0x3B3B //RX_FDEQ_GAIN_1 +41 0x3942 //RX_FDEQ_GAIN_2 +42 0x4645 //RX_FDEQ_GAIN_3 +43 0x494A //RX_FDEQ_GAIN_4 +44 0x5D5A //RX_FDEQ_GAIN_5 +45 0x5B5B //RX_FDEQ_GAIN_6 +46 0x5A51 //RX_FDEQ_GAIN_7 +47 0x514F //RX_FDEQ_GAIN_8 +48 0x5568 //RX_FDEQ_GAIN_9 +49 0x7460 //RX_FDEQ_GAIN_10 +50 0x544E //RX_FDEQ_GAIN_11 +51 0x4848 //RX_FDEQ_GAIN_12 +52 0x484A //RX_FDEQ_GAIN_13 +53 0x5155 //RX_FDEQ_GAIN_14 +54 0x577B //RX_FDEQ_GAIN_15 +55 0x4848 //RX_FDEQ_GAIN_16 +56 0x4848 //RX_FDEQ_GAIN_17 +57 0x4848 //RX_FDEQ_GAIN_18 +58 0x4848 //RX_FDEQ_GAIN_19 +59 0x4848 //RX_FDEQ_GAIN_20 +60 0x4848 //RX_FDEQ_GAIN_21 +61 0x4848 //RX_FDEQ_GAIN_22 +62 0x4848 //RX_FDEQ_GAIN_23 +63 0x0202 //RX_FDEQ_BIN_0 +64 0x0203 //RX_FDEQ_BIN_1 +65 0x0303 //RX_FDEQ_BIN_2 +66 0x0304 //RX_FDEQ_BIN_3 +67 0x0404 //RX_FDEQ_BIN_4 +68 0x0308 //RX_FDEQ_BIN_5 +69 0x0808 //RX_FDEQ_BIN_6 +70 0x090A //RX_FDEQ_BIN_7 +71 0x0B0C //RX_FDEQ_BIN_8 +72 0x0D0E //RX_FDEQ_BIN_9 +73 0x1013 //RX_FDEQ_BIN_10 +74 0x1719 //RX_FDEQ_BIN_11 +75 0x1B1E //RX_FDEQ_BIN_12 +76 0x1E1E //RX_FDEQ_BIN_13 +77 0x1E28 //RX_FDEQ_BIN_14 +78 0x282C //RX_FDEQ_BIN_15 +79 0x0000 //RX_FDEQ_BIN_16 +80 0x0000 //RX_FDEQ_BIN_17 +81 0x0000 //RX_FDEQ_BIN_18 +82 0x0000 //RX_FDEQ_BIN_19 +83 0x0000 //RX_FDEQ_BIN_20 +84 0x0000 //RX_FDEQ_BIN_21 +85 0x0000 //RX_FDEQ_BIN_22 +86 0x0000 //RX_FDEQ_BIN_23 +87 0x4000 //RX_FDEQ_RESRV_0 +88 0x0320 //RX_FDEQ_RESRV_1 +89 0x0018 //RX_FDDRC_BAND_MARGIN_0 +90 0x0035 //RX_FDDRC_BAND_MARGIN_1 +91 0x00D5 //RX_FDDRC_BAND_MARGIN_2 +92 0x0120 //RX_FDDRC_BAND_MARGIN_3 +93 0x0004 //RX_FDDRC_BLOCK_EXP +94 0x5000 //RX_FDDRC_THRD_2_0 +95 0x5000 //RX_FDDRC_THRD_2_1 +96 0x2000 //RX_FDDRC_THRD_2_2 +97 0x5000 //RX_FDDRC_THRD_2_3 +98 0x6400 //RX_FDDRC_THRD_3_0 +99 0x6400 //RX_FDDRC_THRD_3_1 +100 0x2000 //RX_FDDRC_THRD_3_2 +101 0x5000 //RX_FDDRC_THRD_3_3 +102 0x4000 //RX_FDDRC_SLANT_0_0 +103 0x4000 //RX_FDDRC_SLANT_0_1 +104 0x4000 //RX_FDDRC_SLANT_0_2 +105 0x4000 //RX_FDDRC_SLANT_0_3 +106 0x7FFF //RX_FDDRC_SLANT_1_0 +107 0x7FFF //RX_FDDRC_SLANT_1_1 +108 0x7FFF //RX_FDDRC_SLANT_1_2 +109 0x7FFF //RX_FDDRC_SLANT_1_3 +110 0x0000 //RX_FDDRC_RESRV_0 +129 0x001D //RX_SPK_VOL +130 0x0000 //RX_VOL_RESRV_0 +#VOL 2 +6 0x6000 //RX_TDDRC_ALPHA_UP_1 +7 0x6000 //RX_TDDRC_ALPHA_UP_2 +8 0x6000 //RX_TDDRC_ALPHA_UP_3 +9 0x1000 //RX_TDDRC_ALPHA_UP_4 +27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +33 0x7214 //RX_TDDRC_LIMITER_THRD +34 0x0800 //RX_TDDRC_LIMITER_GAIN +112 0x0002 //RX_TDDRC_THRD_0 +113 0x0004 //RX_TDDRC_THRD_1 +114 0x1A00 //RX_TDDRC_THRD_2 +115 0x1A00 //RX_TDDRC_THRD_3 +116 0x7EB8 //RX_TDDRC_SLANT_0 +117 0x2500 //RX_TDDRC_SLANT_1 +118 0x6000 //RX_TDDRC_ALPHA_UP_0 +119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +120 0x0000 //RX_TDDRC_HMNC_FLAG +121 0x199A //RX_TDDRC_HMNC_GAIN +122 0x0001 //RX_TDDRC_SMT_FLAG +123 0x0CCD //RX_TDDRC_SMT_W +124 0x032A //RX_TDDRC_DRC_GAIN +38 0x0020 //RX_FDEQ_SUBNUM +39 0x4848 //RX_FDEQ_GAIN_0 +40 0x3B3B //RX_FDEQ_GAIN_1 +41 0x3942 //RX_FDEQ_GAIN_2 +42 0x4645 //RX_FDEQ_GAIN_3 +43 0x494A //RX_FDEQ_GAIN_4 +44 0x5D5A //RX_FDEQ_GAIN_5 +45 0x5B5B //RX_FDEQ_GAIN_6 +46 0x5A51 //RX_FDEQ_GAIN_7 +47 0x514F //RX_FDEQ_GAIN_8 +48 0x5568 //RX_FDEQ_GAIN_9 +49 0x7460 //RX_FDEQ_GAIN_10 +50 0x544E //RX_FDEQ_GAIN_11 +51 0x4848 //RX_FDEQ_GAIN_12 +52 0x484A //RX_FDEQ_GAIN_13 +53 0x5155 //RX_FDEQ_GAIN_14 +54 0x577B //RX_FDEQ_GAIN_15 +55 0x4848 //RX_FDEQ_GAIN_16 +56 0x4848 //RX_FDEQ_GAIN_17 +57 0x4848 //RX_FDEQ_GAIN_18 +58 0x4848 //RX_FDEQ_GAIN_19 +59 0x4848 //RX_FDEQ_GAIN_20 +60 0x4848 //RX_FDEQ_GAIN_21 +61 0x4848 //RX_FDEQ_GAIN_22 +62 0x4848 //RX_FDEQ_GAIN_23 +63 0x0202 //RX_FDEQ_BIN_0 +64 0x0203 //RX_FDEQ_BIN_1 +65 0x0303 //RX_FDEQ_BIN_2 +66 0x0304 //RX_FDEQ_BIN_3 +67 0x0404 //RX_FDEQ_BIN_4 +68 0x0308 //RX_FDEQ_BIN_5 +69 0x0808 //RX_FDEQ_BIN_6 +70 0x090A //RX_FDEQ_BIN_7 +71 0x0B0C //RX_FDEQ_BIN_8 +72 0x0D0E //RX_FDEQ_BIN_9 +73 0x1013 //RX_FDEQ_BIN_10 +74 0x1719 //RX_FDEQ_BIN_11 +75 0x1B1E //RX_FDEQ_BIN_12 +76 0x1E1E //RX_FDEQ_BIN_13 +77 0x1E28 //RX_FDEQ_BIN_14 +78 0x282C //RX_FDEQ_BIN_15 +79 0x0000 //RX_FDEQ_BIN_16 +80 0x0000 //RX_FDEQ_BIN_17 +81 0x0000 //RX_FDEQ_BIN_18 +82 0x0000 //RX_FDEQ_BIN_19 +83 0x0000 //RX_FDEQ_BIN_20 +84 0x0000 //RX_FDEQ_BIN_21 +85 0x0000 //RX_FDEQ_BIN_22 +86 0x0000 //RX_FDEQ_BIN_23 +87 0x4000 //RX_FDEQ_RESRV_0 +88 0x0320 //RX_FDEQ_RESRV_1 +89 0x0018 //RX_FDDRC_BAND_MARGIN_0 +90 0x0035 //RX_FDDRC_BAND_MARGIN_1 +91 0x00D5 //RX_FDDRC_BAND_MARGIN_2 +92 0x0120 //RX_FDDRC_BAND_MARGIN_3 +93 0x0004 //RX_FDDRC_BLOCK_EXP +94 0x5000 //RX_FDDRC_THRD_2_0 +95 0x5000 //RX_FDDRC_THRD_2_1 +96 0x2000 //RX_FDDRC_THRD_2_2 +97 0x5000 //RX_FDDRC_THRD_2_3 +98 0x6400 //RX_FDDRC_THRD_3_0 +99 0x6400 //RX_FDDRC_THRD_3_1 +100 0x2000 //RX_FDDRC_THRD_3_2 +101 0x5000 //RX_FDDRC_THRD_3_3 +102 0x4000 //RX_FDDRC_SLANT_0_0 +103 0x4000 //RX_FDDRC_SLANT_0_1 +104 0x4000 //RX_FDDRC_SLANT_0_2 +105 0x4000 //RX_FDDRC_SLANT_0_3 +106 0x7FFF //RX_FDDRC_SLANT_1_0 +107 0x7FFF //RX_FDDRC_SLANT_1_1 +108 0x7FFF //RX_FDDRC_SLANT_1_2 +109 0x7FFF //RX_FDDRC_SLANT_1_3 +110 0x0000 //RX_FDDRC_RESRV_0 +129 0x0029 //RX_SPK_VOL +130 0x0000 //RX_VOL_RESRV_0 +#VOL 3 +6 0x6000 //RX_TDDRC_ALPHA_UP_1 +7 0x6000 //RX_TDDRC_ALPHA_UP_2 +8 0x6000 //RX_TDDRC_ALPHA_UP_3 +9 0x1000 //RX_TDDRC_ALPHA_UP_4 +27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +33 0x7214 //RX_TDDRC_LIMITER_THRD +34 0x0800 //RX_TDDRC_LIMITER_GAIN +112 0x0002 //RX_TDDRC_THRD_0 +113 0x0004 //RX_TDDRC_THRD_1 +114 0x1A00 //RX_TDDRC_THRD_2 +115 0x1A00 //RX_TDDRC_THRD_3 +116 0x7EB8 //RX_TDDRC_SLANT_0 +117 0x2500 //RX_TDDRC_SLANT_1 +118 0x6000 //RX_TDDRC_ALPHA_UP_0 +119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +120 0x0000 //RX_TDDRC_HMNC_FLAG +121 0x199A //RX_TDDRC_HMNC_GAIN +122 0x0001 //RX_TDDRC_SMT_FLAG +123 0x0CCD //RX_TDDRC_SMT_W +124 0x032A //RX_TDDRC_DRC_GAIN +38 0x0020 //RX_FDEQ_SUBNUM +39 0x4848 //RX_FDEQ_GAIN_0 +40 0x3B3B //RX_FDEQ_GAIN_1 +41 0x3942 //RX_FDEQ_GAIN_2 +42 0x4645 //RX_FDEQ_GAIN_3 +43 0x494A //RX_FDEQ_GAIN_4 +44 0x5D5A //RX_FDEQ_GAIN_5 +45 0x5B5B //RX_FDEQ_GAIN_6 +46 0x5A51 //RX_FDEQ_GAIN_7 +47 0x514F //RX_FDEQ_GAIN_8 +48 0x5568 //RX_FDEQ_GAIN_9 +49 0x7460 //RX_FDEQ_GAIN_10 +50 0x544E //RX_FDEQ_GAIN_11 +51 0x4848 //RX_FDEQ_GAIN_12 +52 0x484A //RX_FDEQ_GAIN_13 +53 0x5155 //RX_FDEQ_GAIN_14 +54 0x577B //RX_FDEQ_GAIN_15 +55 0x4848 //RX_FDEQ_GAIN_16 +56 0x4848 //RX_FDEQ_GAIN_17 +57 0x4848 //RX_FDEQ_GAIN_18 +58 0x4848 //RX_FDEQ_GAIN_19 +59 0x4848 //RX_FDEQ_GAIN_20 +60 0x4848 //RX_FDEQ_GAIN_21 +61 0x4848 //RX_FDEQ_GAIN_22 +62 0x4848 //RX_FDEQ_GAIN_23 +63 0x0202 //RX_FDEQ_BIN_0 +64 0x0203 //RX_FDEQ_BIN_1 +65 0x0303 //RX_FDEQ_BIN_2 +66 0x0304 //RX_FDEQ_BIN_3 +67 0x0404 //RX_FDEQ_BIN_4 +68 0x0308 //RX_FDEQ_BIN_5 +69 0x0808 //RX_FDEQ_BIN_6 +70 0x090A //RX_FDEQ_BIN_7 +71 0x0B0C //RX_FDEQ_BIN_8 +72 0x0D0E //RX_FDEQ_BIN_9 +73 0x1013 //RX_FDEQ_BIN_10 +74 0x1719 //RX_FDEQ_BIN_11 +75 0x1B1E //RX_FDEQ_BIN_12 +76 0x1E1E //RX_FDEQ_BIN_13 +77 0x1E28 //RX_FDEQ_BIN_14 +78 0x282C //RX_FDEQ_BIN_15 +79 0x0000 //RX_FDEQ_BIN_16 +80 0x0000 //RX_FDEQ_BIN_17 +81 0x0000 //RX_FDEQ_BIN_18 +82 0x0000 //RX_FDEQ_BIN_19 +83 0x0000 //RX_FDEQ_BIN_20 +84 0x0000 //RX_FDEQ_BIN_21 +85 0x0000 //RX_FDEQ_BIN_22 +86 0x0000 //RX_FDEQ_BIN_23 +87 0x4000 //RX_FDEQ_RESRV_0 +88 0x0320 //RX_FDEQ_RESRV_1 +89 0x0018 //RX_FDDRC_BAND_MARGIN_0 +90 0x0035 //RX_FDDRC_BAND_MARGIN_1 +91 0x00D5 //RX_FDDRC_BAND_MARGIN_2 +92 0x0120 //RX_FDDRC_BAND_MARGIN_3 +93 0x0004 //RX_FDDRC_BLOCK_EXP +94 0x5000 //RX_FDDRC_THRD_2_0 +95 0x5000 //RX_FDDRC_THRD_2_1 +96 0x2000 //RX_FDDRC_THRD_2_2 +97 0x5000 //RX_FDDRC_THRD_2_3 +98 0x6400 //RX_FDDRC_THRD_3_0 +99 0x6400 //RX_FDDRC_THRD_3_1 +100 0x2000 //RX_FDDRC_THRD_3_2 +101 0x5000 //RX_FDDRC_THRD_3_3 +102 0x4000 //RX_FDDRC_SLANT_0_0 +103 0x4000 //RX_FDDRC_SLANT_0_1 +104 0x4000 //RX_FDDRC_SLANT_0_2 +105 0x4000 //RX_FDDRC_SLANT_0_3 +106 0x7FFF //RX_FDDRC_SLANT_1_0 +107 0x7FFF //RX_FDDRC_SLANT_1_1 +108 0x7FFF //RX_FDDRC_SLANT_1_2 +109 0x7FFF //RX_FDDRC_SLANT_1_3 +110 0x0000 //RX_FDDRC_RESRV_0 +129 0x0039 //RX_SPK_VOL +130 0x0000 //RX_VOL_RESRV_0 +#VOL 4 +6 0x6000 //RX_TDDRC_ALPHA_UP_1 +7 0x6000 //RX_TDDRC_ALPHA_UP_2 +8 0x6000 //RX_TDDRC_ALPHA_UP_3 +9 0x1000 //RX_TDDRC_ALPHA_UP_4 +27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +33 0x7214 //RX_TDDRC_LIMITER_THRD +34 0x0800 //RX_TDDRC_LIMITER_GAIN +112 0x0002 //RX_TDDRC_THRD_0 +113 0x0004 //RX_TDDRC_THRD_1 +114 0x1A00 //RX_TDDRC_THRD_2 +115 0x1A00 //RX_TDDRC_THRD_3 +116 0x7EB8 //RX_TDDRC_SLANT_0 +117 0x2500 //RX_TDDRC_SLANT_1 +118 0x6000 //RX_TDDRC_ALPHA_UP_0 +119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +120 0x0000 //RX_TDDRC_HMNC_FLAG +121 0x199A //RX_TDDRC_HMNC_GAIN +122 0x0001 //RX_TDDRC_SMT_FLAG +123 0x0CCD //RX_TDDRC_SMT_W +124 0x032A //RX_TDDRC_DRC_GAIN +38 0x0020 //RX_FDEQ_SUBNUM +39 0x4848 //RX_FDEQ_GAIN_0 +40 0x3B3B //RX_FDEQ_GAIN_1 +41 0x3942 //RX_FDEQ_GAIN_2 +42 0x4645 //RX_FDEQ_GAIN_3 +43 0x494A //RX_FDEQ_GAIN_4 +44 0x5D5A //RX_FDEQ_GAIN_5 +45 0x5B5B //RX_FDEQ_GAIN_6 +46 0x5A51 //RX_FDEQ_GAIN_7 +47 0x514F //RX_FDEQ_GAIN_8 +48 0x5568 //RX_FDEQ_GAIN_9 +49 0x7460 //RX_FDEQ_GAIN_10 +50 0x544E //RX_FDEQ_GAIN_11 +51 0x4848 //RX_FDEQ_GAIN_12 +52 0x484A //RX_FDEQ_GAIN_13 +53 0x5155 //RX_FDEQ_GAIN_14 +54 0x577B //RX_FDEQ_GAIN_15 +55 0x4848 //RX_FDEQ_GAIN_16 +56 0x4848 //RX_FDEQ_GAIN_17 +57 0x4848 //RX_FDEQ_GAIN_18 +58 0x4848 //RX_FDEQ_GAIN_19 +59 0x4848 //RX_FDEQ_GAIN_20 +60 0x4848 //RX_FDEQ_GAIN_21 +61 0x4848 //RX_FDEQ_GAIN_22 +62 0x4848 //RX_FDEQ_GAIN_23 +63 0x0202 //RX_FDEQ_BIN_0 +64 0x0203 //RX_FDEQ_BIN_1 +65 0x0303 //RX_FDEQ_BIN_2 +66 0x0304 //RX_FDEQ_BIN_3 +67 0x0404 //RX_FDEQ_BIN_4 +68 0x0308 //RX_FDEQ_BIN_5 +69 0x0808 //RX_FDEQ_BIN_6 +70 0x090A //RX_FDEQ_BIN_7 +71 0x0B0C //RX_FDEQ_BIN_8 +72 0x0D0E //RX_FDEQ_BIN_9 +73 0x1013 //RX_FDEQ_BIN_10 +74 0x1719 //RX_FDEQ_BIN_11 +75 0x1B1E //RX_FDEQ_BIN_12 +76 0x1E1E //RX_FDEQ_BIN_13 +77 0x1E28 //RX_FDEQ_BIN_14 +78 0x282C //RX_FDEQ_BIN_15 +79 0x0000 //RX_FDEQ_BIN_16 +80 0x0000 //RX_FDEQ_BIN_17 +81 0x0000 //RX_FDEQ_BIN_18 +82 0x0000 //RX_FDEQ_BIN_19 +83 0x0000 //RX_FDEQ_BIN_20 +84 0x0000 //RX_FDEQ_BIN_21 +85 0x0000 //RX_FDEQ_BIN_22 +86 0x0000 //RX_FDEQ_BIN_23 +87 0x4000 //RX_FDEQ_RESRV_0 +88 0x0320 //RX_FDEQ_RESRV_1 +89 0x0018 //RX_FDDRC_BAND_MARGIN_0 +90 0x0035 //RX_FDDRC_BAND_MARGIN_1 +91 0x00D5 //RX_FDDRC_BAND_MARGIN_2 +92 0x0120 //RX_FDDRC_BAND_MARGIN_3 +93 0x0004 //RX_FDDRC_BLOCK_EXP +94 0x5000 //RX_FDDRC_THRD_2_0 +95 0x5000 //RX_FDDRC_THRD_2_1 +96 0x2000 //RX_FDDRC_THRD_2_2 +97 0x5000 //RX_FDDRC_THRD_2_3 +98 0x6400 //RX_FDDRC_THRD_3_0 +99 0x6400 //RX_FDDRC_THRD_3_1 +100 0x2000 //RX_FDDRC_THRD_3_2 +101 0x5000 //RX_FDDRC_THRD_3_3 +102 0x4000 //RX_FDDRC_SLANT_0_0 +103 0x4000 //RX_FDDRC_SLANT_0_1 +104 0x4000 //RX_FDDRC_SLANT_0_2 +105 0x4000 //RX_FDDRC_SLANT_0_3 +106 0x7FFF //RX_FDDRC_SLANT_1_0 +107 0x7FFF //RX_FDDRC_SLANT_1_1 +108 0x7FFF //RX_FDDRC_SLANT_1_2 +109 0x7FFF //RX_FDDRC_SLANT_1_3 +110 0x0000 //RX_FDDRC_RESRV_0 +129 0x005F //RX_SPK_VOL +130 0x0000 //RX_VOL_RESRV_0 +#VOL 5 +6 0x6000 //RX_TDDRC_ALPHA_UP_1 +7 0x6000 //RX_TDDRC_ALPHA_UP_2 +8 0x6000 //RX_TDDRC_ALPHA_UP_3 +9 0x1000 //RX_TDDRC_ALPHA_UP_4 +27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +33 0x7214 //RX_TDDRC_LIMITER_THRD +34 0x0800 //RX_TDDRC_LIMITER_GAIN +112 0x0002 //RX_TDDRC_THRD_0 +113 0x0004 //RX_TDDRC_THRD_1 +114 0x1A00 //RX_TDDRC_THRD_2 +115 0x1A00 //RX_TDDRC_THRD_3 +116 0x7EB8 //RX_TDDRC_SLANT_0 +117 0x2500 //RX_TDDRC_SLANT_1 +118 0x6000 //RX_TDDRC_ALPHA_UP_0 +119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +120 0x0000 //RX_TDDRC_HMNC_FLAG +121 0x199A //RX_TDDRC_HMNC_GAIN +122 0x0001 //RX_TDDRC_SMT_FLAG +123 0x0CCD //RX_TDDRC_SMT_W +124 0x032A //RX_TDDRC_DRC_GAIN +38 0x0020 //RX_FDEQ_SUBNUM +39 0x4848 //RX_FDEQ_GAIN_0 +40 0x3B3B //RX_FDEQ_GAIN_1 +41 0x3942 //RX_FDEQ_GAIN_2 +42 0x4645 //RX_FDEQ_GAIN_3 +43 0x494A //RX_FDEQ_GAIN_4 +44 0x5D5A //RX_FDEQ_GAIN_5 +45 0x5B5B //RX_FDEQ_GAIN_6 +46 0x5A51 //RX_FDEQ_GAIN_7 +47 0x514F //RX_FDEQ_GAIN_8 +48 0x5568 //RX_FDEQ_GAIN_9 +49 0x7460 //RX_FDEQ_GAIN_10 +50 0x544E //RX_FDEQ_GAIN_11 +51 0x4848 //RX_FDEQ_GAIN_12 +52 0x484A //RX_FDEQ_GAIN_13 +53 0x5155 //RX_FDEQ_GAIN_14 +54 0x577B //RX_FDEQ_GAIN_15 +55 0x4848 //RX_FDEQ_GAIN_16 +56 0x4848 //RX_FDEQ_GAIN_17 +57 0x4848 //RX_FDEQ_GAIN_18 +58 0x4848 //RX_FDEQ_GAIN_19 +59 0x4848 //RX_FDEQ_GAIN_20 +60 0x4848 //RX_FDEQ_GAIN_21 +61 0x4848 //RX_FDEQ_GAIN_22 +62 0x4848 //RX_FDEQ_GAIN_23 +63 0x0202 //RX_FDEQ_BIN_0 +64 0x0203 //RX_FDEQ_BIN_1 +65 0x0303 //RX_FDEQ_BIN_2 +66 0x0304 //RX_FDEQ_BIN_3 +67 0x0404 //RX_FDEQ_BIN_4 +68 0x0308 //RX_FDEQ_BIN_5 +69 0x0808 //RX_FDEQ_BIN_6 +70 0x090A //RX_FDEQ_BIN_7 +71 0x0B0C //RX_FDEQ_BIN_8 +72 0x0D0E //RX_FDEQ_BIN_9 +73 0x1013 //RX_FDEQ_BIN_10 +74 0x1719 //RX_FDEQ_BIN_11 +75 0x1B1E //RX_FDEQ_BIN_12 +76 0x1E1E //RX_FDEQ_BIN_13 +77 0x1E28 //RX_FDEQ_BIN_14 +78 0x282C //RX_FDEQ_BIN_15 +79 0x0000 //RX_FDEQ_BIN_16 +80 0x0000 //RX_FDEQ_BIN_17 +81 0x0000 //RX_FDEQ_BIN_18 +82 0x0000 //RX_FDEQ_BIN_19 +83 0x0000 //RX_FDEQ_BIN_20 +84 0x0000 //RX_FDEQ_BIN_21 +85 0x0000 //RX_FDEQ_BIN_22 +86 0x0000 //RX_FDEQ_BIN_23 +87 0x4000 //RX_FDEQ_RESRV_0 +88 0x0320 //RX_FDEQ_RESRV_1 +89 0x0018 //RX_FDDRC_BAND_MARGIN_0 +90 0x0035 //RX_FDDRC_BAND_MARGIN_1 +91 0x00D5 //RX_FDDRC_BAND_MARGIN_2 +92 0x0120 //RX_FDDRC_BAND_MARGIN_3 +93 0x0004 //RX_FDDRC_BLOCK_EXP +94 0x5000 //RX_FDDRC_THRD_2_0 +95 0x5000 //RX_FDDRC_THRD_2_1 +96 0x2000 //RX_FDDRC_THRD_2_2 +97 0x5000 //RX_FDDRC_THRD_2_3 +98 0x6400 //RX_FDDRC_THRD_3_0 +99 0x6400 //RX_FDDRC_THRD_3_1 +100 0x2000 //RX_FDDRC_THRD_3_2 +101 0x5000 //RX_FDDRC_THRD_3_3 +102 0x4000 //RX_FDDRC_SLANT_0_0 +103 0x4000 //RX_FDDRC_SLANT_0_1 +104 0x4000 //RX_FDDRC_SLANT_0_2 +105 0x4000 //RX_FDDRC_SLANT_0_3 +106 0x7FFF //RX_FDDRC_SLANT_1_0 +107 0x7FFF //RX_FDDRC_SLANT_1_1 +108 0x7FFF //RX_FDDRC_SLANT_1_2 +109 0x7FFF //RX_FDDRC_SLANT_1_3 +110 0x0000 //RX_FDDRC_RESRV_0 +129 0x008E //RX_SPK_VOL +130 0x0000 //RX_VOL_RESRV_0 +#VOL 6 +6 0x6000 //RX_TDDRC_ALPHA_UP_1 +7 0x6000 //RX_TDDRC_ALPHA_UP_2 +8 0x6000 //RX_TDDRC_ALPHA_UP_3 +9 0x1000 //RX_TDDRC_ALPHA_UP_4 +27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +33 0x7214 //RX_TDDRC_LIMITER_THRD +34 0x0800 //RX_TDDRC_LIMITER_GAIN +112 0x0002 //RX_TDDRC_THRD_0 +113 0x0004 //RX_TDDRC_THRD_1 +114 0x1A00 //RX_TDDRC_THRD_2 +115 0x1A00 //RX_TDDRC_THRD_3 +116 0x7EB8 //RX_TDDRC_SLANT_0 +117 0x2500 //RX_TDDRC_SLANT_1 +118 0x6000 //RX_TDDRC_ALPHA_UP_0 +119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +120 0x0000 //RX_TDDRC_HMNC_FLAG +121 0x199A //RX_TDDRC_HMNC_GAIN +122 0x0001 //RX_TDDRC_SMT_FLAG +123 0x0CCD //RX_TDDRC_SMT_W +124 0x032A //RX_TDDRC_DRC_GAIN +38 0x0020 //RX_FDEQ_SUBNUM +39 0x4848 //RX_FDEQ_GAIN_0 +40 0x3B3B //RX_FDEQ_GAIN_1 +41 0x3942 //RX_FDEQ_GAIN_2 +42 0x4645 //RX_FDEQ_GAIN_3 +43 0x494A //RX_FDEQ_GAIN_4 +44 0x5D5A //RX_FDEQ_GAIN_5 +45 0x5B5B //RX_FDEQ_GAIN_6 +46 0x5A51 //RX_FDEQ_GAIN_7 +47 0x514F //RX_FDEQ_GAIN_8 +48 0x5568 //RX_FDEQ_GAIN_9 +49 0x7460 //RX_FDEQ_GAIN_10 +50 0x544E //RX_FDEQ_GAIN_11 +51 0x4848 //RX_FDEQ_GAIN_12 +52 0x484A //RX_FDEQ_GAIN_13 +53 0x5155 //RX_FDEQ_GAIN_14 +54 0x577B //RX_FDEQ_GAIN_15 +55 0x4848 //RX_FDEQ_GAIN_16 +56 0x4848 //RX_FDEQ_GAIN_17 +57 0x4848 //RX_FDEQ_GAIN_18 +58 0x4848 //RX_FDEQ_GAIN_19 +59 0x4848 //RX_FDEQ_GAIN_20 +60 0x4848 //RX_FDEQ_GAIN_21 +61 0x4848 //RX_FDEQ_GAIN_22 +62 0x4848 //RX_FDEQ_GAIN_23 +63 0x0202 //RX_FDEQ_BIN_0 +64 0x0203 //RX_FDEQ_BIN_1 +65 0x0303 //RX_FDEQ_BIN_2 +66 0x0304 //RX_FDEQ_BIN_3 +67 0x0404 //RX_FDEQ_BIN_4 +68 0x0308 //RX_FDEQ_BIN_5 +69 0x0808 //RX_FDEQ_BIN_6 +70 0x090A //RX_FDEQ_BIN_7 +71 0x0B0C //RX_FDEQ_BIN_8 +72 0x0D0E //RX_FDEQ_BIN_9 +73 0x1013 //RX_FDEQ_BIN_10 +74 0x1719 //RX_FDEQ_BIN_11 +75 0x1B1E //RX_FDEQ_BIN_12 +76 0x1E1E //RX_FDEQ_BIN_13 +77 0x1E28 //RX_FDEQ_BIN_14 +78 0x282C //RX_FDEQ_BIN_15 +79 0x0000 //RX_FDEQ_BIN_16 +80 0x0000 //RX_FDEQ_BIN_17 +81 0x0000 //RX_FDEQ_BIN_18 +82 0x0000 //RX_FDEQ_BIN_19 +83 0x0000 //RX_FDEQ_BIN_20 +84 0x0000 //RX_FDEQ_BIN_21 +85 0x0000 //RX_FDEQ_BIN_22 +86 0x0000 //RX_FDEQ_BIN_23 +87 0x4000 //RX_FDEQ_RESRV_0 +88 0x0320 //RX_FDEQ_RESRV_1 +89 0x0018 //RX_FDDRC_BAND_MARGIN_0 +90 0x0035 //RX_FDDRC_BAND_MARGIN_1 +91 0x00D5 //RX_FDDRC_BAND_MARGIN_2 +92 0x0120 //RX_FDDRC_BAND_MARGIN_3 +93 0x0004 //RX_FDDRC_BLOCK_EXP +94 0x5000 //RX_FDDRC_THRD_2_0 +95 0x5000 //RX_FDDRC_THRD_2_1 +96 0x2000 //RX_FDDRC_THRD_2_2 +97 0x5000 //RX_FDDRC_THRD_2_3 +98 0x6400 //RX_FDDRC_THRD_3_0 +99 0x6400 //RX_FDDRC_THRD_3_1 +100 0x2000 //RX_FDDRC_THRD_3_2 +101 0x5000 //RX_FDDRC_THRD_3_3 +102 0x4000 //RX_FDDRC_SLANT_0_0 +103 0x4000 //RX_FDDRC_SLANT_0_1 +104 0x4000 //RX_FDDRC_SLANT_0_2 +105 0x4000 //RX_FDDRC_SLANT_0_3 +106 0x7FFF //RX_FDDRC_SLANT_1_0 +107 0x7FFF //RX_FDDRC_SLANT_1_1 +108 0x7FFF //RX_FDDRC_SLANT_1_2 +109 0x7FFF //RX_FDDRC_SLANT_1_3 +110 0x0000 //RX_FDDRC_RESRV_0 +129 0x0100 //RX_SPK_VOL +130 0x0000 //RX_VOL_RESRV_0 +#RX 2 +157 0x027C //RX_RECVFUNC_MODE_0 +158 0x0000 //RX_RECVFUNC_MODE_1 +159 0x0003 //RX_SAMPLINGFREQ_SIG +160 0x0003 //RX_SAMPLINGFREQ_PROC +161 0x000A //RX_FRAME_SZ +162 0x0000 //RX_DELAY_OPT +163 0x6000 //RX_TDDRC_ALPHA_UP_1 +164 0x6000 //RX_TDDRC_ALPHA_UP_2 +165 0x6000 //RX_TDDRC_ALPHA_UP_3 +166 0x1000 //RX_TDDRC_ALPHA_UP_4 +167 0x0800 //RX_PGA +168 0x7652 //RX_A_HP +169 0x4000 //RX_B_PE +170 0x7800 //RX_THR_PITCH_DET_0 +171 0x7000 //RX_THR_PITCH_DET_1 +172 0x6000 //RX_THR_PITCH_DET_2 +173 0x0008 //RX_PITCH_BFR_LEN +174 0x0003 //RX_SBD_PITCH_DET +175 0x0100 //RX_PP_RESRV_0 +176 0x0020 //RX_PP_RESRV_1 +177 0x0400 //RX_N_SN_EST +178 0x000C //RX_N2_SN_EST +179 0x0010 //RX_NS_LVL_CTRL +180 0xF800 //RX_THR_SN_EST +181 0x7E00 //RX_LAMBDA_PFILT +182 0x000A //RX_FENS_RESRV_0 +183 0x0190 //RX_FENS_RESRV_1 +184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +187 0x0002 //RX_EXTRA_NS_L +188 0x0800 //RX_EXTRA_NS_A +189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +190 0x7214 //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +192 0x199A //RX_A_POST_FLT +193 0x0000 //RX_LMT_THRD +194 0x4000 //RX_LMT_ALPHA +195 0x0020 //RX_FDEQ_SUBNUM +196 0x4848 //RX_FDEQ_GAIN_0 +197 0x4848 //RX_FDEQ_GAIN_1 +198 0x4848 //RX_FDEQ_GAIN_2 +199 0x4848 //RX_FDEQ_GAIN_3 +200 0x4848 //RX_FDEQ_GAIN_4 +201 0x4848 //RX_FDEQ_GAIN_5 +202 0x4850 //RX_FDEQ_GAIN_6 +203 0x4848 //RX_FDEQ_GAIN_7 +204 0x4860 //RX_FDEQ_GAIN_8 +205 0x7468 //RX_FDEQ_GAIN_9 +206 0x6060 //RX_FDEQ_GAIN_10 +207 0x6060 //RX_FDEQ_GAIN_11 +208 0x5C54 //RX_FDEQ_GAIN_12 +209 0x5450 //RX_FDEQ_GAIN_13 +210 0x5050 //RX_FDEQ_GAIN_14 +211 0x5860 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0202 //RX_FDEQ_BIN_0 +221 0x0203 //RX_FDEQ_BIN_1 +222 0x0303 //RX_FDEQ_BIN_2 +223 0x0304 //RX_FDEQ_BIN_3 +224 0x0404 //RX_FDEQ_BIN_4 +225 0x0308 //RX_FDEQ_BIN_5 +226 0x0808 //RX_FDEQ_BIN_6 +227 0x090A //RX_FDEQ_BIN_7 +228 0x0B0C //RX_FDEQ_BIN_8 +229 0x0D0E //RX_FDEQ_BIN_9 +230 0x1013 //RX_FDEQ_BIN_10 +231 0x1719 //RX_FDEQ_BIN_11 +232 0x1B1E //RX_FDEQ_BIN_12 +233 0x1E1E //RX_FDEQ_BIN_13 +234 0x1E28 //RX_FDEQ_BIN_14 +235 0x282C //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x4000 //RX_FDEQ_RESRV_0 +245 0x0320 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0035 //RX_FDDRC_BAND_MARGIN_1 +248 0x00D5 //RX_FDDRC_BAND_MARGIN_2 +249 0x0120 //RX_FDDRC_BAND_MARGIN_3 +250 0x0004 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x2000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x2000 //RX_FDDRC_THRD_3_2 +258 0x5000 //RX_FDDRC_THRD_3_3 +259 0x4000 //RX_FDDRC_SLANT_0_0 +260 0x4000 //RX_FDDRC_SLANT_0_1 +261 0x4000 //RX_FDDRC_SLANT_0_2 +262 0x4000 //RX_FDDRC_SLANT_0_3 +263 0x7FFF //RX_FDDRC_SLANT_1_0 +264 0x7FFF //RX_FDDRC_SLANT_1_1 +265 0x7FFF //RX_FDDRC_SLANT_1_2 +266 0x7FFF //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +268 0x0002 //RX_FILTINDX +269 0x0002 //RX_TDDRC_THRD_0 +270 0x0004 //RX_TDDRC_THRD_1 +271 0x1A00 //RX_TDDRC_THRD_2 +272 0x1A00 //RX_TDDRC_THRD_3 +273 0x7EB8 //RX_TDDRC_SLANT_0 +274 0x2500 //RX_TDDRC_SLANT_1 +275 0x6000 //RX_TDDRC_ALPHA_UP_0 +276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x199A //RX_TDDRC_HMNC_GAIN +279 0x0001 //RX_TDDRC_SMT_FLAG +280 0x0CCD //RX_TDDRC_SMT_W +281 0x0550 //RX_TDDRC_DRC_GAIN +282 0x7C00 //RX_LAMBDA_PKA_FP +283 0x2000 //RX_TPKA_FP +284 0x2000 //RX_MIN_G_FP +285 0x0080 //RX_MAX_G_FP +286 0x0014 //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 +288 0x0000 //RX_MAXLEVEL_CNG +289 0x3000 //RX_BWE_UV_TH +290 0x3000 //RX_BWE_UV_TH2 +291 0x1800 //RX_BWE_UV_TH3 +292 0x1000 //RX_BWE_V_TH +293 0x04CD //RX_BWE_GAIN1_V_TH1 +294 0x0F33 //RX_BWE_GAIN1_V_TH2 +295 0x7333 //RX_BWE_UV_EQ +296 0x199A //RX_BWE_V_EQ +297 0x7333 //RX_BWE_TONE_TH +298 0x0004 //RX_BWE_UV_HOLD_T +299 0x6CCD //RX_BWE_GAIN2_ALPHA +300 0x799A //RX_BWE_GAIN3_ALPHA +301 0x001E //RX_BWE_CUTOFF +302 0x3000 //RX_BWE_GAINFILL +303 0x3200 //RX_BWE_MAXTH_TONE +304 0x2000 //RX_BWE_EQ_0 +305 0x2000 //RX_BWE_EQ_1 +306 0x2000 //RX_BWE_EQ_2 +307 0x2000 //RX_BWE_EQ_3 +308 0x2000 //RX_BWE_EQ_4 +309 0x2000 //RX_BWE_EQ_5 +310 0x2000 //RX_BWE_EQ_6 +311 0x0000 //RX_BWE_RESRV_0 +312 0x0000 //RX_BWE_RESRV_1 +313 0x0000 //RX_BWE_RESRV_2 +#VOL 0 +163 0x6000 //RX_TDDRC_ALPHA_UP_1 +164 0x6000 //RX_TDDRC_ALPHA_UP_2 +165 0x6000 //RX_TDDRC_ALPHA_UP_3 +166 0x1000 //RX_TDDRC_ALPHA_UP_4 +184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +190 0x7214 //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +269 0x0002 //RX_TDDRC_THRD_0 +270 0x0004 //RX_TDDRC_THRD_1 +271 0x1A00 //RX_TDDRC_THRD_2 +272 0x1A00 //RX_TDDRC_THRD_3 +273 0x7EB8 //RX_TDDRC_SLANT_0 +274 0x2500 //RX_TDDRC_SLANT_1 +275 0x6000 //RX_TDDRC_ALPHA_UP_0 +276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x199A //RX_TDDRC_HMNC_GAIN +279 0x0001 //RX_TDDRC_SMT_FLAG +280 0x0CCD //RX_TDDRC_SMT_W +281 0x0550 //RX_TDDRC_DRC_GAIN +195 0x0020 //RX_FDEQ_SUBNUM +196 0x4848 //RX_FDEQ_GAIN_0 +197 0x4848 //RX_FDEQ_GAIN_1 +198 0x4848 //RX_FDEQ_GAIN_2 +199 0x4848 //RX_FDEQ_GAIN_3 +200 0x4848 //RX_FDEQ_GAIN_4 +201 0x4848 //RX_FDEQ_GAIN_5 +202 0x4850 //RX_FDEQ_GAIN_6 +203 0x4848 //RX_FDEQ_GAIN_7 +204 0x4860 //RX_FDEQ_GAIN_8 +205 0x7468 //RX_FDEQ_GAIN_9 +206 0x6060 //RX_FDEQ_GAIN_10 +207 0x6060 //RX_FDEQ_GAIN_11 +208 0x5C54 //RX_FDEQ_GAIN_12 +209 0x5450 //RX_FDEQ_GAIN_13 +210 0x5050 //RX_FDEQ_GAIN_14 +211 0x5860 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0202 //RX_FDEQ_BIN_0 +221 0x0203 //RX_FDEQ_BIN_1 +222 0x0303 //RX_FDEQ_BIN_2 +223 0x0304 //RX_FDEQ_BIN_3 +224 0x0404 //RX_FDEQ_BIN_4 +225 0x0308 //RX_FDEQ_BIN_5 +226 0x0808 //RX_FDEQ_BIN_6 +227 0x090A //RX_FDEQ_BIN_7 +228 0x0B0C //RX_FDEQ_BIN_8 +229 0x0D0E //RX_FDEQ_BIN_9 +230 0x1013 //RX_FDEQ_BIN_10 +231 0x1719 //RX_FDEQ_BIN_11 +232 0x1B1E //RX_FDEQ_BIN_12 +233 0x1E1E //RX_FDEQ_BIN_13 +234 0x1E28 //RX_FDEQ_BIN_14 +235 0x282C //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x4000 //RX_FDEQ_RESRV_0 +245 0x0320 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0035 //RX_FDDRC_BAND_MARGIN_1 +248 0x00D5 //RX_FDDRC_BAND_MARGIN_2 +249 0x0120 //RX_FDDRC_BAND_MARGIN_3 +250 0x0004 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x2000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x2000 //RX_FDDRC_THRD_3_2 +258 0x5000 //RX_FDDRC_THRD_3_3 +259 0x4000 //RX_FDDRC_SLANT_0_0 +260 0x4000 //RX_FDDRC_SLANT_0_1 +261 0x4000 //RX_FDDRC_SLANT_0_2 +262 0x4000 //RX_FDDRC_SLANT_0_3 +263 0x7FFF //RX_FDDRC_SLANT_1_0 +264 0x7FFF //RX_FDDRC_SLANT_1_1 +265 0x7FFF //RX_FDDRC_SLANT_1_2 +266 0x7FFF //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +286 0x0014 //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 +#VOL 1 +163 0x6000 //RX_TDDRC_ALPHA_UP_1 +164 0x6000 //RX_TDDRC_ALPHA_UP_2 +165 0x6000 //RX_TDDRC_ALPHA_UP_3 +166 0x1000 //RX_TDDRC_ALPHA_UP_4 +184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +190 0x7214 //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +269 0x0002 //RX_TDDRC_THRD_0 +270 0x0004 //RX_TDDRC_THRD_1 +271 0x1A00 //RX_TDDRC_THRD_2 +272 0x1A00 //RX_TDDRC_THRD_3 +273 0x7EB8 //RX_TDDRC_SLANT_0 +274 0x2500 //RX_TDDRC_SLANT_1 +275 0x6000 //RX_TDDRC_ALPHA_UP_0 +276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x199A //RX_TDDRC_HMNC_GAIN +279 0x0001 //RX_TDDRC_SMT_FLAG +280 0x0CCD //RX_TDDRC_SMT_W +281 0x0550 //RX_TDDRC_DRC_GAIN +195 0x0020 //RX_FDEQ_SUBNUM +196 0x4848 //RX_FDEQ_GAIN_0 +197 0x4848 //RX_FDEQ_GAIN_1 +198 0x4848 //RX_FDEQ_GAIN_2 +199 0x4848 //RX_FDEQ_GAIN_3 +200 0x4848 //RX_FDEQ_GAIN_4 +201 0x4848 //RX_FDEQ_GAIN_5 +202 0x4850 //RX_FDEQ_GAIN_6 +203 0x4848 //RX_FDEQ_GAIN_7 +204 0x4860 //RX_FDEQ_GAIN_8 +205 0x7468 //RX_FDEQ_GAIN_9 +206 0x6060 //RX_FDEQ_GAIN_10 +207 0x6060 //RX_FDEQ_GAIN_11 +208 0x5C54 //RX_FDEQ_GAIN_12 +209 0x5450 //RX_FDEQ_GAIN_13 +210 0x5050 //RX_FDEQ_GAIN_14 +211 0x5860 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0202 //RX_FDEQ_BIN_0 +221 0x0203 //RX_FDEQ_BIN_1 +222 0x0303 //RX_FDEQ_BIN_2 +223 0x0304 //RX_FDEQ_BIN_3 +224 0x0404 //RX_FDEQ_BIN_4 +225 0x0308 //RX_FDEQ_BIN_5 +226 0x0808 //RX_FDEQ_BIN_6 +227 0x090A //RX_FDEQ_BIN_7 +228 0x0B0C //RX_FDEQ_BIN_8 +229 0x0D0E //RX_FDEQ_BIN_9 +230 0x1013 //RX_FDEQ_BIN_10 +231 0x1719 //RX_FDEQ_BIN_11 +232 0x1B1E //RX_FDEQ_BIN_12 +233 0x1E1E //RX_FDEQ_BIN_13 +234 0x1E28 //RX_FDEQ_BIN_14 +235 0x282C //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x4000 //RX_FDEQ_RESRV_0 +245 0x0320 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0035 //RX_FDDRC_BAND_MARGIN_1 +248 0x00D5 //RX_FDDRC_BAND_MARGIN_2 +249 0x0120 //RX_FDDRC_BAND_MARGIN_3 +250 0x0004 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x2000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x2000 //RX_FDDRC_THRD_3_2 +258 0x5000 //RX_FDDRC_THRD_3_3 +259 0x4000 //RX_FDDRC_SLANT_0_0 +260 0x4000 //RX_FDDRC_SLANT_0_1 +261 0x4000 //RX_FDDRC_SLANT_0_2 +262 0x4000 //RX_FDDRC_SLANT_0_3 +263 0x7FFF //RX_FDDRC_SLANT_1_0 +264 0x7FFF //RX_FDDRC_SLANT_1_1 +265 0x7FFF //RX_FDDRC_SLANT_1_2 +266 0x7FFF //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +286 0x001D //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 +#VOL 2 +163 0x6000 //RX_TDDRC_ALPHA_UP_1 +164 0x6000 //RX_TDDRC_ALPHA_UP_2 +165 0x6000 //RX_TDDRC_ALPHA_UP_3 +166 0x1000 //RX_TDDRC_ALPHA_UP_4 +184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +190 0x7214 //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +269 0x0002 //RX_TDDRC_THRD_0 +270 0x0004 //RX_TDDRC_THRD_1 +271 0x1A00 //RX_TDDRC_THRD_2 +272 0x1A00 //RX_TDDRC_THRD_3 +273 0x7EB8 //RX_TDDRC_SLANT_0 +274 0x2500 //RX_TDDRC_SLANT_1 +275 0x6000 //RX_TDDRC_ALPHA_UP_0 +276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x199A //RX_TDDRC_HMNC_GAIN +279 0x0001 //RX_TDDRC_SMT_FLAG +280 0x0CCD //RX_TDDRC_SMT_W +281 0x0550 //RX_TDDRC_DRC_GAIN +195 0x0020 //RX_FDEQ_SUBNUM +196 0x4848 //RX_FDEQ_GAIN_0 +197 0x4848 //RX_FDEQ_GAIN_1 +198 0x4848 //RX_FDEQ_GAIN_2 +199 0x4848 //RX_FDEQ_GAIN_3 +200 0x4848 //RX_FDEQ_GAIN_4 +201 0x4848 //RX_FDEQ_GAIN_5 +202 0x4850 //RX_FDEQ_GAIN_6 +203 0x4848 //RX_FDEQ_GAIN_7 +204 0x4860 //RX_FDEQ_GAIN_8 +205 0x7468 //RX_FDEQ_GAIN_9 +206 0x6060 //RX_FDEQ_GAIN_10 +207 0x6060 //RX_FDEQ_GAIN_11 +208 0x5C54 //RX_FDEQ_GAIN_12 +209 0x5450 //RX_FDEQ_GAIN_13 +210 0x5050 //RX_FDEQ_GAIN_14 +211 0x5860 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0202 //RX_FDEQ_BIN_0 +221 0x0203 //RX_FDEQ_BIN_1 +222 0x0303 //RX_FDEQ_BIN_2 +223 0x0304 //RX_FDEQ_BIN_3 +224 0x0404 //RX_FDEQ_BIN_4 +225 0x0308 //RX_FDEQ_BIN_5 +226 0x0808 //RX_FDEQ_BIN_6 +227 0x090A //RX_FDEQ_BIN_7 +228 0x0B0C //RX_FDEQ_BIN_8 +229 0x0D0E //RX_FDEQ_BIN_9 +230 0x1013 //RX_FDEQ_BIN_10 +231 0x1719 //RX_FDEQ_BIN_11 +232 0x1B1E //RX_FDEQ_BIN_12 +233 0x1E1E //RX_FDEQ_BIN_13 +234 0x1E28 //RX_FDEQ_BIN_14 +235 0x282C //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x4000 //RX_FDEQ_RESRV_0 +245 0x0320 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0035 //RX_FDDRC_BAND_MARGIN_1 +248 0x00D5 //RX_FDDRC_BAND_MARGIN_2 +249 0x0120 //RX_FDDRC_BAND_MARGIN_3 +250 0x0004 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x2000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x2000 //RX_FDDRC_THRD_3_2 +258 0x5000 //RX_FDDRC_THRD_3_3 +259 0x4000 //RX_FDDRC_SLANT_0_0 +260 0x4000 //RX_FDDRC_SLANT_0_1 +261 0x4000 //RX_FDDRC_SLANT_0_2 +262 0x4000 //RX_FDDRC_SLANT_0_3 +263 0x7FFF //RX_FDDRC_SLANT_1_0 +264 0x7FFF //RX_FDDRC_SLANT_1_1 +265 0x7FFF //RX_FDDRC_SLANT_1_2 +266 0x7FFF //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +286 0x0029 //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 +#VOL 3 +163 0x6000 //RX_TDDRC_ALPHA_UP_1 +164 0x6000 //RX_TDDRC_ALPHA_UP_2 +165 0x6000 //RX_TDDRC_ALPHA_UP_3 +166 0x1000 //RX_TDDRC_ALPHA_UP_4 +184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +190 0x7214 //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +269 0x0002 //RX_TDDRC_THRD_0 +270 0x0004 //RX_TDDRC_THRD_1 +271 0x1A00 //RX_TDDRC_THRD_2 +272 0x1A00 //RX_TDDRC_THRD_3 +273 0x7EB8 //RX_TDDRC_SLANT_0 +274 0x2500 //RX_TDDRC_SLANT_1 +275 0x6000 //RX_TDDRC_ALPHA_UP_0 +276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x199A //RX_TDDRC_HMNC_GAIN +279 0x0001 //RX_TDDRC_SMT_FLAG +280 0x0CCD //RX_TDDRC_SMT_W +281 0x0550 //RX_TDDRC_DRC_GAIN +195 0x0020 //RX_FDEQ_SUBNUM +196 0x4848 //RX_FDEQ_GAIN_0 +197 0x4848 //RX_FDEQ_GAIN_1 +198 0x4848 //RX_FDEQ_GAIN_2 +199 0x4848 //RX_FDEQ_GAIN_3 +200 0x4848 //RX_FDEQ_GAIN_4 +201 0x4848 //RX_FDEQ_GAIN_5 +202 0x4850 //RX_FDEQ_GAIN_6 +203 0x4848 //RX_FDEQ_GAIN_7 +204 0x4860 //RX_FDEQ_GAIN_8 +205 0x7468 //RX_FDEQ_GAIN_9 +206 0x6060 //RX_FDEQ_GAIN_10 +207 0x6060 //RX_FDEQ_GAIN_11 +208 0x5C54 //RX_FDEQ_GAIN_12 +209 0x5450 //RX_FDEQ_GAIN_13 +210 0x5050 //RX_FDEQ_GAIN_14 +211 0x5860 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0202 //RX_FDEQ_BIN_0 +221 0x0203 //RX_FDEQ_BIN_1 +222 0x0303 //RX_FDEQ_BIN_2 +223 0x0304 //RX_FDEQ_BIN_3 +224 0x0404 //RX_FDEQ_BIN_4 +225 0x0308 //RX_FDEQ_BIN_5 +226 0x0808 //RX_FDEQ_BIN_6 +227 0x090A //RX_FDEQ_BIN_7 +228 0x0B0C //RX_FDEQ_BIN_8 +229 0x0D0E //RX_FDEQ_BIN_9 +230 0x1013 //RX_FDEQ_BIN_10 +231 0x1719 //RX_FDEQ_BIN_11 +232 0x1B1E //RX_FDEQ_BIN_12 +233 0x1E1E //RX_FDEQ_BIN_13 +234 0x1E28 //RX_FDEQ_BIN_14 +235 0x282C //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x4000 //RX_FDEQ_RESRV_0 +245 0x0320 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0035 //RX_FDDRC_BAND_MARGIN_1 +248 0x00D5 //RX_FDDRC_BAND_MARGIN_2 +249 0x0120 //RX_FDDRC_BAND_MARGIN_3 +250 0x0004 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x2000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x2000 //RX_FDDRC_THRD_3_2 +258 0x5000 //RX_FDDRC_THRD_3_3 +259 0x4000 //RX_FDDRC_SLANT_0_0 +260 0x4000 //RX_FDDRC_SLANT_0_1 +261 0x4000 //RX_FDDRC_SLANT_0_2 +262 0x4000 //RX_FDDRC_SLANT_0_3 +263 0x7FFF //RX_FDDRC_SLANT_1_0 +264 0x7FFF //RX_FDDRC_SLANT_1_1 +265 0x7FFF //RX_FDDRC_SLANT_1_2 +266 0x7FFF //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +286 0x0039 //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 +#VOL 4 +163 0x6000 //RX_TDDRC_ALPHA_UP_1 +164 0x6000 //RX_TDDRC_ALPHA_UP_2 +165 0x6000 //RX_TDDRC_ALPHA_UP_3 +166 0x1000 //RX_TDDRC_ALPHA_UP_4 +184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +190 0x7214 //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +269 0x0002 //RX_TDDRC_THRD_0 +270 0x0004 //RX_TDDRC_THRD_1 +271 0x1A00 //RX_TDDRC_THRD_2 +272 0x1A00 //RX_TDDRC_THRD_3 +273 0x7EB8 //RX_TDDRC_SLANT_0 +274 0x2500 //RX_TDDRC_SLANT_1 +275 0x6000 //RX_TDDRC_ALPHA_UP_0 +276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x199A //RX_TDDRC_HMNC_GAIN +279 0x0001 //RX_TDDRC_SMT_FLAG +280 0x0CCD //RX_TDDRC_SMT_W +281 0x0550 //RX_TDDRC_DRC_GAIN +195 0x0020 //RX_FDEQ_SUBNUM +196 0x4848 //RX_FDEQ_GAIN_0 +197 0x4848 //RX_FDEQ_GAIN_1 +198 0x4848 //RX_FDEQ_GAIN_2 +199 0x4848 //RX_FDEQ_GAIN_3 +200 0x5454 //RX_FDEQ_GAIN_4 +201 0x7C54 //RX_FDEQ_GAIN_5 +202 0x4850 //RX_FDEQ_GAIN_6 +203 0x4848 //RX_FDEQ_GAIN_7 +204 0x4860 //RX_FDEQ_GAIN_8 +205 0x7468 //RX_FDEQ_GAIN_9 +206 0x6060 //RX_FDEQ_GAIN_10 +207 0x6060 //RX_FDEQ_GAIN_11 +208 0x5C54 //RX_FDEQ_GAIN_12 +209 0x5450 //RX_FDEQ_GAIN_13 +210 0x5050 //RX_FDEQ_GAIN_14 +211 0x5860 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0202 //RX_FDEQ_BIN_0 +221 0x0203 //RX_FDEQ_BIN_1 +222 0x0303 //RX_FDEQ_BIN_2 +223 0x0304 //RX_FDEQ_BIN_3 +224 0x0404 //RX_FDEQ_BIN_4 +225 0x0308 //RX_FDEQ_BIN_5 +226 0x0808 //RX_FDEQ_BIN_6 +227 0x090A //RX_FDEQ_BIN_7 +228 0x0B0C //RX_FDEQ_BIN_8 +229 0x0D0E //RX_FDEQ_BIN_9 +230 0x1013 //RX_FDEQ_BIN_10 +231 0x1719 //RX_FDEQ_BIN_11 +232 0x1B1E //RX_FDEQ_BIN_12 +233 0x1E1E //RX_FDEQ_BIN_13 +234 0x1E28 //RX_FDEQ_BIN_14 +235 0x282C //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x4000 //RX_FDEQ_RESRV_0 +245 0x0320 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0035 //RX_FDDRC_BAND_MARGIN_1 +248 0x00D5 //RX_FDDRC_BAND_MARGIN_2 +249 0x0120 //RX_FDDRC_BAND_MARGIN_3 +250 0x0004 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x2000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x2000 //RX_FDDRC_THRD_3_2 +258 0x5000 //RX_FDDRC_THRD_3_3 +259 0x4000 //RX_FDDRC_SLANT_0_0 +260 0x4000 //RX_FDDRC_SLANT_0_1 +261 0x4000 //RX_FDDRC_SLANT_0_2 +262 0x4000 //RX_FDDRC_SLANT_0_3 +263 0x7FFF //RX_FDDRC_SLANT_1_0 +264 0x7FFF //RX_FDDRC_SLANT_1_1 +265 0x7FFF //RX_FDDRC_SLANT_1_2 +266 0x7FFF //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +286 0x005F //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 +#VOL 5 +163 0x6000 //RX_TDDRC_ALPHA_UP_1 +164 0x6000 //RX_TDDRC_ALPHA_UP_2 +165 0x6000 //RX_TDDRC_ALPHA_UP_3 +166 0x1000 //RX_TDDRC_ALPHA_UP_4 +184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +190 0x7214 //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +269 0x0002 //RX_TDDRC_THRD_0 +270 0x0004 //RX_TDDRC_THRD_1 +271 0x1A00 //RX_TDDRC_THRD_2 +272 0x1A00 //RX_TDDRC_THRD_3 +273 0x7EB8 //RX_TDDRC_SLANT_0 +274 0x2500 //RX_TDDRC_SLANT_1 +275 0x6000 //RX_TDDRC_ALPHA_UP_0 +276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x199A //RX_TDDRC_HMNC_GAIN +279 0x0001 //RX_TDDRC_SMT_FLAG +280 0x0CCD //RX_TDDRC_SMT_W +281 0x0550 //RX_TDDRC_DRC_GAIN +195 0x0020 //RX_FDEQ_SUBNUM +196 0x4848 //RX_FDEQ_GAIN_0 +197 0x4848 //RX_FDEQ_GAIN_1 +198 0x4848 //RX_FDEQ_GAIN_2 +199 0x4848 //RX_FDEQ_GAIN_3 +200 0x5454 //RX_FDEQ_GAIN_4 +201 0x7C54 //RX_FDEQ_GAIN_5 +202 0x4850 //RX_FDEQ_GAIN_6 +203 0x4848 //RX_FDEQ_GAIN_7 +204 0x4860 //RX_FDEQ_GAIN_8 +205 0x7468 //RX_FDEQ_GAIN_9 +206 0x6060 //RX_FDEQ_GAIN_10 +207 0x6060 //RX_FDEQ_GAIN_11 +208 0x5C54 //RX_FDEQ_GAIN_12 +209 0x5450 //RX_FDEQ_GAIN_13 +210 0x5050 //RX_FDEQ_GAIN_14 +211 0x5860 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0202 //RX_FDEQ_BIN_0 +221 0x0203 //RX_FDEQ_BIN_1 +222 0x0303 //RX_FDEQ_BIN_2 +223 0x0304 //RX_FDEQ_BIN_3 +224 0x0404 //RX_FDEQ_BIN_4 +225 0x0308 //RX_FDEQ_BIN_5 +226 0x0808 //RX_FDEQ_BIN_6 +227 0x090A //RX_FDEQ_BIN_7 +228 0x0B0C //RX_FDEQ_BIN_8 +229 0x0D0E //RX_FDEQ_BIN_9 +230 0x1013 //RX_FDEQ_BIN_10 +231 0x1719 //RX_FDEQ_BIN_11 +232 0x1B1E //RX_FDEQ_BIN_12 +233 0x1E1E //RX_FDEQ_BIN_13 +234 0x1E28 //RX_FDEQ_BIN_14 +235 0x282C //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x4000 //RX_FDEQ_RESRV_0 +245 0x0320 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0035 //RX_FDDRC_BAND_MARGIN_1 +248 0x00D5 //RX_FDDRC_BAND_MARGIN_2 +249 0x0120 //RX_FDDRC_BAND_MARGIN_3 +250 0x0004 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x2000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x2000 //RX_FDDRC_THRD_3_2 +258 0x5000 //RX_FDDRC_THRD_3_3 +259 0x4000 //RX_FDDRC_SLANT_0_0 +260 0x4000 //RX_FDDRC_SLANT_0_1 +261 0x4000 //RX_FDDRC_SLANT_0_2 +262 0x4000 //RX_FDDRC_SLANT_0_3 +263 0x7FFF //RX_FDDRC_SLANT_1_0 +264 0x7FFF //RX_FDDRC_SLANT_1_1 +265 0x7FFF //RX_FDDRC_SLANT_1_2 +266 0x7FFF //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +286 0x008E //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 +#VOL 6 +163 0x6000 //RX_TDDRC_ALPHA_UP_1 +164 0x6000 //RX_TDDRC_ALPHA_UP_2 +165 0x6000 //RX_TDDRC_ALPHA_UP_3 +166 0x1000 //RX_TDDRC_ALPHA_UP_4 +184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +190 0x7214 //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +269 0x0002 //RX_TDDRC_THRD_0 +270 0x0004 //RX_TDDRC_THRD_1 +271 0x1A00 //RX_TDDRC_THRD_2 +272 0x1A00 //RX_TDDRC_THRD_3 +273 0x7EB8 //RX_TDDRC_SLANT_0 +274 0x2500 //RX_TDDRC_SLANT_1 +275 0x6000 //RX_TDDRC_ALPHA_UP_0 +276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x199A //RX_TDDRC_HMNC_GAIN +279 0x0001 //RX_TDDRC_SMT_FLAG +280 0x0CCD //RX_TDDRC_SMT_W +281 0x0550 //RX_TDDRC_DRC_GAIN +195 0x0020 //RX_FDEQ_SUBNUM +196 0x4848 //RX_FDEQ_GAIN_0 +197 0x4848 //RX_FDEQ_GAIN_1 +198 0x4848 //RX_FDEQ_GAIN_2 +199 0x4848 //RX_FDEQ_GAIN_3 +200 0x5454 //RX_FDEQ_GAIN_4 +201 0x7C54 //RX_FDEQ_GAIN_5 +202 0x4850 //RX_FDEQ_GAIN_6 +203 0x4848 //RX_FDEQ_GAIN_7 +204 0x4860 //RX_FDEQ_GAIN_8 +205 0x7468 //RX_FDEQ_GAIN_9 +206 0x6060 //RX_FDEQ_GAIN_10 +207 0x6060 //RX_FDEQ_GAIN_11 +208 0x5C54 //RX_FDEQ_GAIN_12 +209 0x5450 //RX_FDEQ_GAIN_13 +210 0x5050 //RX_FDEQ_GAIN_14 +211 0x5860 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0202 //RX_FDEQ_BIN_0 +221 0x0203 //RX_FDEQ_BIN_1 +222 0x0303 //RX_FDEQ_BIN_2 +223 0x0304 //RX_FDEQ_BIN_3 +224 0x0404 //RX_FDEQ_BIN_4 +225 0x0308 //RX_FDEQ_BIN_5 +226 0x0808 //RX_FDEQ_BIN_6 +227 0x090A //RX_FDEQ_BIN_7 +228 0x0B0C //RX_FDEQ_BIN_8 +229 0x0D0E //RX_FDEQ_BIN_9 +230 0x1013 //RX_FDEQ_BIN_10 +231 0x1719 //RX_FDEQ_BIN_11 +232 0x1B1E //RX_FDEQ_BIN_12 +233 0x1E1E //RX_FDEQ_BIN_13 +234 0x1E28 //RX_FDEQ_BIN_14 +235 0x282C //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x4000 //RX_FDEQ_RESRV_0 +245 0x0320 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0035 //RX_FDDRC_BAND_MARGIN_1 +248 0x00D5 //RX_FDDRC_BAND_MARGIN_2 +249 0x0120 //RX_FDDRC_BAND_MARGIN_3 +250 0x0004 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x2000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x2000 //RX_FDDRC_THRD_3_2 +258 0x5000 //RX_FDDRC_THRD_3_3 +259 0x4000 //RX_FDDRC_SLANT_0_0 +260 0x4000 //RX_FDDRC_SLANT_0_1 +261 0x4000 //RX_FDDRC_SLANT_0_2 +262 0x4000 //RX_FDDRC_SLANT_0_3 +263 0x7FFF //RX_FDDRC_SLANT_1_0 +264 0x7FFF //RX_FDDRC_SLANT_1_1 +265 0x7FFF //RX_FDDRC_SLANT_1_2 +266 0x7FFF //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +286 0x0100 //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 + +#CASE_NAME HANDSFREE-HANDSFREE-CUSTOM2-SWB +#PARAM_MODE Simple +#PARAM_TYPE TX+2RX +#TOTAL_CUSTOM_STEP 7+7 +#TX +0 0x0001 //TX_OPERATION_MODE_0 +1 0x0001 //TX_OPERATION_MODE_1 +2 0x0073 //TX_PATCH_REG +3 0x6B5C //TX_SENDFUNC_MODE_0 +4 0x0001 //TX_SENDFUNC_MODE_1 +5 0x0003 //TX_NUM_MIC +6 0x0003 //TX_SAMPLINGFREQ_SIG +7 0x0003 //TX_SAMPLINGFREQ_PROC +8 0x000A //TX_FRAME_SZ_SIG +9 0x000A //TX_FRAME_SZ +10 0x0000 //TX_DELAY_OPT +11 0x0028 //TX_MAX_TAIL_LENGTH +12 0x0001 //TX_NUM_LOUTCHN +13 0x0001 //TX_MAXNUM_AECREF +14 0x0000 //TX_DBG_FUNC_REG +15 0x0000 //TX_DBG_FUNC_REG1 +16 0x0000 //TX_SYS_RESRV_0 +17 0x0000 //TX_SYS_RESRV_1 +18 0x0000 //TX_SYS_RESRV_2 +19 0x0000 //TX_SYS_RESRV_3 +20 0x0000 //TX_DIST2REF0 +21 0x009C //TX_DIST2REF1 +22 0x0019 //TX_DIST2REF_02 +23 0x0000 //TX_DIST2REF_03 +24 0x0000 //TX_DIST2REF_04 +25 0x0000 //TX_DIST2REF_05 +26 0x0000 //TX_MMIC +27 0x1000 //TX_PGA_0 +28 0x1000 //TX_PGA_1 +29 0x1000 //TX_PGA_2 +30 0x0000 //TX_PGA_3 +31 0x0000 //TX_PGA_4 +32 0x0000 //TX_PGA_5 +33 0x0001 //TX_MIC_PAIRS +34 0x0000 //TX_MIC_PAIRS_HS +35 0x0002 //TX_MICS_FOR_BF +36 0x0000 //TX_MIC_PAIRS_FORL1 +37 0x0002 //TX_MICS_OF_PAIR0 +38 0x0002 //TX_MICS_OF_PAIR1 +39 0x0002 //TX_MICS_OF_PAIR2 +40 0x0002 //TX_MICS_OF_PAIR3 +41 0x0000 //TX_MIC_DATA_SRC0 +42 0x0002 //TX_MIC_DATA_SRC1 +43 0x0001 //TX_MIC_DATA_SRC2 +44 0x0000 //TX_MIC_DATA_SRC3 +45 0x0000 //TX_MIC_PAIR_CH_04 +46 0x0000 //TX_MIC_PAIR_CH_05 +47 0x0000 //TX_MIC_PAIR_CH_10 +48 0x0000 //TX_MIC_PAIR_CH_11 +49 0x0000 //TX_MIC_PAIR_CH_12 +50 0x0000 //TX_MIC_PAIR_CH_13 +51 0x0000 //TX_MIC_PAIR_CH_14 +52 0x05DC //TX_HD_BIN_MASK +53 0x0010 //TX_HD_SUBAND_MASK +54 0x19A1 //TX_HD_FRAME_AVG_MASK +55 0x0320 //TX_HD_MIN_FRQ +56 0x1000 //TX_HD_ALPHA_PSD +57 0x1100 //TX_T_PHPR1 +58 0x0000 //TX_T_PHPR2 +59 0x0000 //TX_T_PTPR +60 0x0000 //TX_T_PNPR +61 0x0000 //TX_T_PAPR1 +62 0xEE6C //TX_T_PSDVAT +63 0x0800 //TX_CNT +64 0x4000 //TX_ANTI_HOWL_GAIN +65 0x0001 //TX_MICFORBFMARK_0 +66 0x0001 //TX_MICFORBFMARK_1 +67 0x0001 //TX_MICFORBFMARK_2 +68 0x0001 //TX_MICFORBFMARK_3 +69 0x0001 //TX_MICFORBFMARK_4 +70 0x0001 //TX_MICFORBFMARK_5 +71 0x0000 //TX_DIST2REF_10 +72 0x3B33 //TX_DIST2REF_11 +73 0x0A70 //TX_DIST2REF2 +74 0x0000 //TX_DIST2REF_13 +75 0x0000 //TX_DIST2REF_14 +76 0x0000 //TX_DIST2REF_15 +77 0x0000 //TX_DIST2REF_20 +78 0x0000 //TX_DIST2REF_21 +79 0x0000 //TX_DIST2REF_22 +80 0x0000 //TX_DIST2REF_23 +81 0x0000 //TX_DIST2REF_24 +82 0x0000 //TX_DIST2REF_25 +83 0x0000 //TX_DIST2REF_30 +84 0x0000 //TX_DIST2REF_31 +85 0x0000 //TX_DIST2REF_32 +86 0x0000 //TX_DIST2REF_33 +87 0x0000 //TX_DIST2REF_34 +88 0x0000 //TX_DIST2REF_35 +89 0x0000 //TX_MIC_LOC_00 +90 0x0000 //TX_MIC_LOC_01 +91 0x0000 //TX_MIC_LOC_02 +92 0x0000 //TX_MIC_LOC_03 +93 0x0000 //TX_MIC_LOC_04 +94 0x0000 //TX_MIC_LOC_05 +95 0x0000 //TX_MIC_LOC_10 +96 0x0000 //TX_MIC_LOC_11 +97 0x0000 //TX_MIC_LOC_12 +98 0x0000 //TX_MIC_LOC_13 +99 0x0000 //TX_MIC_LOC_14 +100 0x0000 //TX_MIC_LOC_15 +101 0x0000 //TX_MIC_LOC_20 +102 0x0000 //TX_MIC_LOC_21 +103 0x0000 //TX_MIC_LOC_22 +104 0x0000 //TX_MIC_LOC_23 +105 0x0000 //TX_MIC_LOC_24 +106 0x0000 //TX_MIC_LOC_25 +107 0x0800 //TX_MIC_REFBLK_VOLUME +108 0x0CAE //TX_MIC_BLOCK_VOLUME +109 0x0000 //TX_INVERSE_MASK +110 0x0000 //TX_ADCS_MASK +111 0x04D0 //TX_ADCS_GAIN +112 0x4000 //TX_NFC_GAINFAC +113 0x0000 //TX_MAINMIC_BLKFACTOR +114 0x0000 //TX_REFMIC_BLKFACTOR +115 0x0000 //TX_BLMIC_BLKFACTOR +116 0x0000 //TX_BRMIC_BLKFACTOR +117 0x0031 //TX_MICBLK_START_BIN +118 0x0060 //TX_MICBLK_END_BIN +119 0x0015 //TX_MICBLK_FE_HOLD +120 0xFFF2 //TX_MICBLK_MR_EXP_TH +121 0xFFF2 //TX_MICBLK_LR_EXP_TH +122 0x0015 //TX_FENE_HOLD +123 0x4000 //TX_FE_ENER_TH_MTS +124 0x0004 //TX_FE_ENER_TH_EXP +125 0x6000 //TX_C_POST_FLT_MIC_MAINBLK +126 0x6000 //TX_C_POST_FLT_MIC_REFBLK +127 0x0010 //TX_MIC_BLOCK_N +128 0x7B02 //TX_A_HP +129 0x4000 //TX_B_PE +130 0x5000 //TX_THR_PITCH_DET_0 +131 0x4800 //TX_THR_PITCH_DET_1 +132 0x4000 //TX_THR_PITCH_DET_2 +133 0x0008 //TX_PITCH_BFR_LEN +134 0x0003 //TX_SBD_PITCH_DET +135 0x0050 //TX_TD_AEC_L +136 0x4000 //TX_MU0_UNP_TD_AEC +137 0x1000 //TX_MU0_PTD_TD_AEC +138 0x0000 //TX_PP_RESRV_0 +139 0x2A94 //TX_PP_RESRV_1 +140 0x55F0 //TX_PP_RESRV_2 +141 0x0000 //TX_PP_RESRV_3 +142 0x0000 //TX_PP_RESRV_4 +143 0x0000 //TX_PP_RESRV_5 +144 0x0000 //TX_PP_RESRV_6 +145 0x0000 //TX_PP_RESRV_7 +146 0x0028 //TX_TAIL_LENGTH +147 0x0400 //TX_AEC_REF_GAIN_0 +148 0x0800 //TX_AEC_REF_GAIN_1 +149 0x0800 //TX_AEC_REF_GAIN_2 +150 0x7600 //TX_EAD_THR +151 0x1000 //TX_THR_RE_EST +152 0x2000 //TX_MIN_EQ_RE_EST_0 +153 0x0600 //TX_MIN_EQ_RE_EST_1 +154 0x3000 //TX_MIN_EQ_RE_EST_2 +155 0x3000 //TX_MIN_EQ_RE_EST_3 +156 0x3000 //TX_MIN_EQ_RE_EST_4 +157 0x3000 //TX_MIN_EQ_RE_EST_5 +158 0x3000 //TX_MIN_EQ_RE_EST_6 +159 0x1000 //TX_MIN_EQ_RE_EST_7 +160 0x7800 //TX_MIN_EQ_RE_EST_8 +161 0x7800 //TX_MIN_EQ_RE_EST_9 +162 0x7800 //TX_MIN_EQ_RE_EST_10 +163 0x7800 //TX_MIN_EQ_RE_EST_11 +164 0x7800 //TX_MIN_EQ_RE_EST_12 +165 0x4000 //TX_LAMBDA_RE_EST +166 0x3000 //TX_LAMBDA_CB_NLE +167 0x7FFF //TX_C_POST_FLT +168 0x4000 //TX_GAIN_NP +169 0x0180 //TX_SE_HOLD_N +170 0x00C8 //TX_DT_HOLD_N +171 0x05DC //TX_DT2_HOLD_N +172 0x6666 //TX_AEC_RESRV_0 +173 0x0000 //TX_AEC_RESRV_1 +174 0x0014 //TX_AEC_RESRV_2 +175 0x0000 //TX_MIC_DELAY_LENGTH +176 0x0000 //TX_REF_DELAY_LENGTH +177 0x0000 //TX_ADD_LINEIN_GAINL +178 0x0000 //TX_ADD_LINEIN_GAINH +179 0x0000 //TX_MIN_EQ_RE_EST_14 +180 0x0000 //TX_DTD_THR1_8 +181 0x7FFF //TX_DTD_THR2_8 +182 0x0000 //TX_DTD_MIC_BLK2 +183 0x0008 //TX_FRQ_LIN_LEN +184 0x7FFF //TX_FRQ_AEC_LEN_RHO +185 0x6000 //TX_MU0_UNP_FRQ_AEC +186 0x4000 //TX_MU0_PTD_FRQ_AEC +187 0x000A //TX_MINENOISETH +188 0x0800 //TX_MU0_RE_EST +189 0x0001 //TX_AEC_NUM_CH +190 0x0000 //TX_BIGECHOATTENUATION_MAX +191 0x2000 //TX_A_POST_FLT_MICBLK +192 0x0000 //TX_BLKENERTH +193 0x0000 //TX_BLKENERHIGHTH +194 0x0000 //TX_NORMENERTH +195 0x0000 //TX_NORMENERHIGHTH +196 0x0000 //TX_NORMENERHIGHTHL +197 0x7FF0 //TX_DTD_THR1_0 +198 0x7FF0 //TX_DTD_THR1_1 +199 0x7FF0 //TX_DTD_THR1_2 +200 0x7FF0 //TX_DTD_THR1_3 +201 0x7FF0 //TX_DTD_THR1_4 +202 0x7FF0 //TX_DTD_THR1_5 +203 0x7FF0 //TX_DTD_THR1_6 +204 0x7E00 //TX_DTD_THR2_0 +205 0x7E00 //TX_DTD_THR2_1 +206 0x5000 //TX_DTD_THR2_2 +207 0x5000 //TX_DTD_THR2_3 +208 0x5000 //TX_DTD_THR2_4 +209 0x5000 //TX_DTD_THR2_5 +210 0x5000 //TX_DTD_THR2_6 +211 0x7FFF //TX_DTD_THR3 +212 0x0000 //TX_SPK_CUT_K +213 0x36B0 //TX_DT_CUT_K +214 0x0100 //TX_DT_CUT_THR +215 0x04EB //TX_COMFORT_G +216 0x01F4 //TX_POWER_YOUT_TH +217 0x4000 //TX_FDPFGAINECHO +218 0x0000 //TX_DTD_HD_THR +219 0x0000 //TX_SPK_CUT_K_S +220 0x7FFF //TX_DTD_MIC_BLK +221 0x023E //TX_ADPT_STRICT_L +222 0x023E //TX_ADPT_STRICT_H +223 0x0BB8 //TX_RATIO_DT_L_TH_LOW +224 0x3A98 //TX_RATIO_DT_H_TH_LOW +225 0x1F40 //TX_RATIO_DT_L_TH_HIGH +226 0x5014 //TX_RATIO_DT_H_TH_HIGH +227 0x09C4 //TX_RATIO_DT_L0_TH +228 0x7FFF //TX_B_POST_FILT_ECHO_L +229 0x7FFF //TX_B_POST_FILT_ECHO_H +230 0x0200 //TX_MIN_G_CTRL_ECHO +231 0x1000 //TX_B_LESSCUT_RTO_ECHO +232 0x0000 //TX_EPD_OFFSET_00 +233 0x0000 //TX_EPD_OFFST_01 +234 0x2328 //TX_RATIO_DT_L0_TH_HIGH +235 0x7FFF //TX_RATIO_DT_H_TH_CUT +236 0x7FFF //TX_MIN_EQ_RE_EST_13 +237 0x0000 //TX_DTD_THR1_7 +238 0x0000 //TX_DTD_THR2_7 +239 0x0800 //TX_DT_RESRV_7 +240 0x0800 //TX_DT_RESRV_8 +241 0x0000 //TX_DT_RESRV_9 +242 0xF800 //TX_THR_SN_EST_0 +243 0xFA00 //TX_THR_SN_EST_1 +244 0xFA00 //TX_THR_SN_EST_2 +245 0xFA00 //TX_THR_SN_EST_3 +246 0xF800 //TX_THR_SN_EST_4 +247 0xFA00 //TX_THR_SN_EST_5 +248 0xF800 //TX_THR_SN_EST_6 +249 0xF800 //TX_THR_SN_EST_7 +250 0x0100 //TX_DELTA_THR_SN_EST_0 +251 0x0100 //TX_DELTA_THR_SN_EST_1 +252 0x0100 //TX_DELTA_THR_SN_EST_2 +253 0x0000 //TX_DELTA_THR_SN_EST_3 +254 0x0100 //TX_DELTA_THR_SN_EST_4 +255 0x0200 //TX_DELTA_THR_SN_EST_5 +256 0x0100 //TX_DELTA_THR_SN_EST_6 +257 0x0200 //TX_DELTA_THR_SN_EST_7 +258 0x4000 //TX_LAMBDA_NN_EST_0 +259 0x4000 //TX_LAMBDA_NN_EST_1 +260 0x4000 //TX_LAMBDA_NN_EST_2 +261 0x4000 //TX_LAMBDA_NN_EST_3 +262 0x4000 //TX_LAMBDA_NN_EST_4 +263 0x4000 //TX_LAMBDA_NN_EST_5 +264 0x4000 //TX_LAMBDA_NN_EST_6 +265 0x4000 //TX_LAMBDA_NN_EST_7 +266 0x0400 //TX_N_SN_EST +267 0x001E //TX_INBEAM_T +268 0x0041 //TX_INBEAMHOLDT +269 0x2000 //TX_G_STRICT +270 0x2000 //TX_EQ_THR_BF +271 0x799A //TX_LAMBDA_EQ_BF +272 0x1000 //TX_NE_RTO_TH +273 0x0400 //TX_NE_RTO_TH_L +274 0x0800 //TX_MAINREFRTOH_TH_H +275 0x0800 //TX_MAINREFRTOH_TH_L +276 0x0800 //TX_MAINREFRTO_TH_H +277 0x0800 //TX_MAINREFRTO_TH_L +278 0x0200 //TX_MAINREFRTO_TH_EQ +279 0x2000 //TX_B_POST_FLT_0 +280 0x1000 //TX_B_POST_FLT_1 +281 0x0010 //TX_NS_LVL_CTRL_0 +282 0x003C //TX_NS_LVL_CTRL_1 +283 0x0024 //TX_NS_LVL_CTRL_2 +284 0x003C //TX_NS_LVL_CTRL_3 +285 0x0014 //TX_NS_LVL_CTRL_4 +286 0x0011 //TX_NS_LVL_CTRL_5 +287 0x003C //TX_NS_LVL_CTRL_6 +288 0x0011 //TX_NS_LVL_CTRL_7 +289 0x0020 //TX_MIN_GAIN_S_0 +290 0x0020 //TX_MIN_GAIN_S_1 +291 0x0020 //TX_MIN_GAIN_S_2 +292 0x0020 //TX_MIN_GAIN_S_3 +293 0x0020 //TX_MIN_GAIN_S_4 +294 0x0020 //TX_MIN_GAIN_S_5 +295 0x0020 //TX_MIN_GAIN_S_6 +296 0x0020 //TX_MIN_GAIN_S_7 +297 0x6000 //TX_NMOS_SUP +298 0x0000 //TX_NS_MAX_PRI_SNR_TH +299 0x0000 //TX_NMOS_SUP_MENSA +300 0x7FFF //TX_SNRI_SUP_0 +301 0x4000 //TX_SNRI_SUP_1 +302 0x4000 //TX_SNRI_SUP_2 +303 0x4000 //TX_SNRI_SUP_3 +304 0x4000 //TX_SNRI_SUP_4 +305 0x4000 //TX_SNRI_SUP_5 +306 0x4000 //TX_SNRI_SUP_6 +307 0x4000 //TX_SNRI_SUP_7 +308 0x7FFF //TX_THR_LFNS +309 0x0018 //TX_G_LFNS +310 0x09C4 //TX_GAIN0_NTH +311 0x000A //TX_MUSIC_MORENS +312 0x7FFF //TX_A_POST_FILT_0 +313 0x2000 //TX_A_POST_FILT_1 +314 0x7FFF //TX_A_POST_FILT_S_0 +315 0x7FFF //TX_A_POST_FILT_S_1 +316 0x7FFF //TX_A_POST_FILT_S_2 +317 0x7FFF //TX_A_POST_FILT_S_3 +318 0x7FFF //TX_A_POST_FILT_S_4 +319 0x7FFF //TX_A_POST_FILT_S_5 +320 0x7FFF //TX_A_POST_FILT_S_6 +321 0x7FFF //TX_A_POST_FILT_S_7 +322 0x2000 //TX_B_POST_FILT_0 +323 0x6000 //TX_B_POST_FILT_1 +324 0x6000 //TX_B_POST_FILT_2 +325 0x6000 //TX_B_POST_FILT_3 +326 0x4000 //TX_B_POST_FILT_4 +327 0x1000 //TX_B_POST_FILT_5 +328 0x1000 //TX_B_POST_FILT_6 +329 0x2000 //TX_B_POST_FILT_7 +330 0x4000 //TX_B_LESSCUT_RTO_S_0 +331 0x7FFF //TX_B_LESSCUT_RTO_S_1 +332 0x7FFF //TX_B_LESSCUT_RTO_S_2 +333 0x7FFF //TX_B_LESSCUT_RTO_S_3 +334 0x7FFF //TX_B_LESSCUT_RTO_S_4 +335 0x6000 //TX_B_LESSCUT_RTO_S_5 +336 0x7FFF //TX_B_LESSCUT_RTO_S_6 +337 0x7FFF //TX_B_LESSCUT_RTO_S_7 +338 0x7F00 //TX_LAMBDA_PFILT +339 0x7F00 //TX_LAMBDA_PFILT_S_0 +340 0x7F00 //TX_LAMBDA_PFILT_S_1 +341 0x7F00 //TX_LAMBDA_PFILT_S_2 +342 0x7F00 //TX_LAMBDA_PFILT_S_3 +343 0x7F00 //TX_LAMBDA_PFILT_S_4 +344 0x7F00 //TX_LAMBDA_PFILT_S_5 +345 0x7F00 //TX_LAMBDA_PFILT_S_6 +346 0x7F00 //TX_LAMBDA_PFILT_S_7 +347 0x0200 //TX_K_PEPPER +348 0x0400 //TX_A_PEPPER +349 0x1EAA //TX_K_PEPPER_HF +350 0x0600 //TX_A_PEPPER_HF +351 0x0001 //TX_HMNC_BST_FLG +352 0x0200 //TX_HMNC_BST_THR +353 0x0040 //TX_DT_BINVAD_TH_0 +354 0x0040 //TX_DT_BINVAD_TH_1 +355 0x0100 //TX_DT_BINVAD_TH_2 +356 0x0100 //TX_DT_BINVAD_TH_3 +357 0x36B0 //TX_DT_BINVAD_ENDF +358 0x0200 //TX_C_POST_FLT_DT +359 0x0CCD //TX_NS_B_POST_FLT_LESSCUT +360 0x0140 //TX_DT_BOOST +361 0x0000 //TX_BF_SGRAD_FLG +362 0x0005 //TX_BF_DVG_TH +363 0x001E //TX_SN_C_F +364 0x0000 //TX_K_APT +365 0x0001 //TX_NOISEDET +366 0x0064 //TX_NDETCT +367 0x0050 //TX_NOISE_TH_0 +368 0x7FFF //TX_NOISE_TH_0_2 +369 0x7FFF //TX_NOISE_TH_0_3 +370 0x07D0 //TX_NOISE_TH_1 +371 0x01F4 //TX_NOISE_TH_2 +372 0x36B0 //TX_NOISE_TH_3 +373 0x2710 //TX_NOISE_TH_4 +374 0x2CEC //TX_NOISE_TH_5 +375 0x7FFF //TX_NOISE_TH_5_2 +376 0x0000 //TX_NOISE_TH_5_3 +377 0x7FFF //TX_NOISE_TH_5_4 +378 0x0DAC //TX_NOISE_TH_6 +379 0x0050 //TX_MINENOISE_TH +380 0xD508 //TX_MORENS_TFMASK_TH +381 0x0001 //TX_DRC_QUIET_FLOOR +382 0x3A98 //TX_RATIODTL_CUT_TH +383 0x07D0 //TX_DT_CUT_K1 +384 0x0666 //TX_OUT_ENER_S_TH_CLEAN +385 0x0666 //TX_OUT_ENER_S_TH_LESSCLEAN +386 0x0333 //TX_OUT_ENER_S_TH_NOISY +387 0x019A //TX_OUT_ENER_TH_NOISE +388 0x0333 //TX_OUT_ENER_TH_SPEECH +389 0x2000 //TX_SN_NPB_GAIN +390 0x0000 //TX_NN_NPB_GAIN +391 0x7FFF //TX_POST_MASK_SUP_HSNE +392 0x1388 //TX_TAIL_DET_TH +393 0x4000 //TX_B_LESSCUT_RTO_WTA +394 0x0000 //TX_MEL_G_R +395 0x0080 //TX_SUPHIGH_TH +396 0x0000 //TX_MASK_G_R +397 0x0002 //TX_EXTRA_NS_L +398 0x1800 //TX_C_POST_FLT_MASK +399 0x7FFF //TX_A_POST_FLT_WNS +400 0x0148 //TX_MIN_G_LOW300HZ +401 0x0001 //TX_MAXLEVEL_CNG +402 0x00B4 //TX_STN_NOISE_TH +403 0x4000 //TX_POST_MASK_SUP +404 0x7FFF //TX_POST_MASK_ADJUST +405 0x00C8 //TX_NS_ENOISE_MIC0_TH +406 0x0050 //TX_MINENOISE_MIC0_TH +407 0x012C //TX_MINENOISE_MIC0_S_TH +408 0x4000 //TX_MIN_G_CTRL_SSNS +409 0x0000 //TX_METAL_RTO_THR +410 0x4848 //TX_NS_FP_K_METAL +411 0x3A98 //TX_NOISEDET_BOOST_TH +412 0x0FA0 //TX_NSMOOTH_TH +413 0x0000 //TX_NS_RESRV_8 +414 0x1800 //TX_RHO_UPB +415 0x0BB8 //TX_N_HOLD_HS +416 0x0050 //TX_N_RHO_BFR0 +417 0x7FFF //TX_LAMBDA_ARSP_EST +418 0x0100 //TX_EXTRA_GAIN_MICBLOCK +419 0x0CCD //TX_THR_STD_NSR +420 0x019A //TX_THR_STD_PLH +421 0x2AF8 //TX_N_HOLD_STD +422 0x0066 //TX_THR_STD_RHO +423 0x2000 //TX_BF_RESET_THR_HS +424 0x09C4 //TX_SB_RTO_MEAN_TH +425 0x0000 //TX_SB_RHO_MEAN_TH_NTALK +426 0x3800 //TX_SB_RTO_MEAN_TH_ABN +427 0x2EE0 //TX_SB_RTO_MEAN_TH_RUB +428 0x0000 //TX_WTA_EN_RTO_TH +429 0x0000 //TX_TOP_ENER_TH_F +430 0x0000 //TX_DESIRED_TALK_HOLDT +431 0x0800 //TX_MIC_BLOCK_FACTOR +432 0x0000 //TX_NSEST_BFRLRNRDC +433 0x0000 //TX_THR_POST_FLT_HS +434 0x0010 //TX_HS_VAD_BIN +435 0x2666 //TX_THR_VAD_HS +436 0x2CCD //TX_MEAN_RTO_MIN_TH2 +437 0x0032 //TX_SILENCE_T +438 0x0000 //TX_A_POST_FLT_WTA +439 0x799A //TX_LAMBDA_PFLT_WTA +440 0x0000 //TX_SB_RHO_MEAN2_TH +441 0x0190 //TX_SB_RHO_MEAN3_TH +442 0x0000 //TX_HS_RESRV_4 +443 0x0000 //TX_HS_RESRV_5 +444 0x003C //TX_DOA_VAD_THR_1 +445 0x0000 //TX_DOA_VAD_THR_2 +446 0x0028 //TX_DOA_VAD_THR1_0 +447 0x0028 //TX_DOA_VAD_THR1_1 +448 0x0000 //TX_SRC_DOA_RNG_LOW_0A +449 0x00B4 //TX_SRC_DOA_RNG_HIGH_0A +450 0x005A //TX_DFLT_SRC_DOA_0A +451 0x0000 //TX_SRC_DOA_RNG_LOW_0B +452 0x0000 //TX_SRC_DOA_RNG_HIGH_0B +453 0x0000 //TX_DFLT_SRC_DOA_0B +454 0x0000 //TX_SRC_DOA_RNG_LOW_0C +455 0x0000 //TX_SRC_DOA_RNG_HIGH_0C +456 0x0000 //TX_DFLT_SRC_DOA_0C +457 0x0000 //TX_SRC_DOA_RNG_LOW_0D +458 0x0000 //TX_SRC_DOA_RNG_HIGH_0D +459 0x0000 //TX_DFLT_SRC_DOA_0D +460 0x0000 //TX_SRC_DOA_RNG_LOW_1A +461 0x00B4 //TX_SRC_DOA_RNG_HIGH_1A +462 0x005A //TX_DFLT_SRC_DOA_1A +463 0x0000 //TX_SRC_DOA_RNG_LOW_1B +464 0x00B4 //TX_SRC_DOA_RNG_HIGH_1B +465 0x005A //TX_DFLT_SRC_DOA_1B +466 0x0000 //TX_SRC_DOA_RNG_LOW_1C +467 0x00B4 //TX_SRC_DOA_RNG_HIGH_1C +468 0x005A //TX_DFLT_SRC_DOA_1C +469 0x0000 //TX_SRC_DOA_RNG_LOW_1D +470 0x00B4 //TX_SRC_DOA_RNG_HIGH_1D +471 0x005A //TX_DFLT_SRC_DOA_1D +472 0x0100 //TX_BF_HOLDOFF_T +473 0x7FFF //TX_DOA_COST_FACTOR +474 0x4000 //TX_MAINTOREFR_TH0 +475 0x071C //TX_DOA_TRK_THR +476 0x012C //TX_DOA_TRACK_HT +477 0x0200 //TX_N1_HOLD_HF +478 0x0100 //TX_N2_HOLD_HF +479 0x3000 //TX_BF_RESET_THR_HF +480 0x7333 //TX_DOA_SMOOTH +481 0x0800 //TX_MU_BF +482 0x0800 //TX_BF_MU_LF_B2 +483 0x0040 //TX_BF_FC_END_BIN_B2 +484 0x0020 //TX_BF_FC_END_BIN +485 0x0000 //TX_HF_RESRV_25 +486 0x0000 //TX_HF_RESRV_26 +487 0x0007 //TX_N_DOA_SEED +488 0x0001 //TX_FINE_DOA_SEARCH_FLG +489 0x0000 //TX_HF_RESRV_27 +490 0x038E //TX_DLT_SRC_DOA_RNG +491 0x0200 //TX_BF_MU_LF +492 0x0000 //TX_DFLT_SRC_LOC_0 +493 0x7FFF //TX_DFLT_SRC_LOC_1 +494 0x0000 //TX_DFLT_SRC_LOC_2 +495 0x038E //TX_DOA_TRACK_VADTH +496 0x0000 //TX_DOA_TRACK_NEW +497 0x0230 //TX_NOR_OFF_THR +498 0x0CCD //TX_MORE_ON_700HZ_THR +499 0x0000 //TX_MU_BF_ADPT_NS +500 0x0000 //TX_ADAPT_LEN +501 0x2000 //TX_MORE_SNS +502 0x0000 //TX_NOR_OFF_TH1 +503 0x0000 //TX_WIDE_MASK_TH +504 0x4650 //TX_SUBSNRATIOHIGH4MEANBCK_THR +505 0x4000 //TX_C_POST_FLT_CUT +506 0x2000 //TX_RADIODTLV +507 0x0320 //TX_POWER_LINEIN_TH +508 0x0014 //TX_FE_VADCOUNT_TH_FC +509 0x000A //TX_ECHO_SUPP_FC +510 0x0C80 //TX_ECHO_TH +511 0x6666 //TX_MIC_TO_BFGAIN +512 0x0000 //TX_MICTOBFGAIN0 +513 0x0000 //TX_FASTMUE_TH +514 0x3000 //TX_DEREVERB_LF_MU +515 0x34CD //TX_DEREVERB_HF_MU +516 0x0007 //TX_DEREVERB_DELAY +517 0x0004 //TX_DEREVERB_COEF_LEN +518 0x0003 //TX_DEREVERB_DNR +519 0x0000 //TX_DEREVERB_ALPHA +520 0x0000 //TX_DEREVERB_BETA +521 0x3A98 //TX_GSC_RTOL_TH +522 0x3A98 //TX_GSC_RTOH_TH +523 0x7E2C //TX_WIDE2_MEANHTH +524 0x0000 //TX_DR_RESRV_5 +525 0x0000 //TX_DR_RESRV_6 +526 0x0000 //TX_DR_RESRV_7 +527 0x0000 //TX_DR_RESRV_8 +528 0x1333 //TX_WIND_MARK_TH +529 0x399A //TX_CORR_THR +530 0x0004 //TX_SNR_THR +531 0x0010 //TX_ENGY_THR +532 0x1770 //TX_CORR_HIGH_TH +533 0x6000 //TX_ENGY_THR_2 +534 0x3400 //TX_MEAN_RTO_THR +535 0x0028 //TX_WNS_ENOISE_MIC0_TH +536 0x3000 //TX_RATIOMICL_TH +537 0x64CD //TX_CALIG_HS +538 0x0000 //TX_LVL_CTRL +539 0x0014 //TX_WIND_SUPRTO +540 0x000A //TX_WNS_MIN_G +541 0x0000 //TX_WNS_B_POST_FLT +542 0x2800 //TX_RATIOMICH_TH +543 0xD120 //TX_WIND_INBEAM_L_TH +544 0x0FA0 //TX_WIND_INBEAM_H_TH +545 0x2000 //TX_WNS_RESRV_0 +546 0x59D8 //TX_WNS_RESRV_1 +547 0x0000 //TX_WNS_RESRV_2 +548 0x0000 //TX_WNS_RESRV_3 +549 0x0000 //TX_WNS_RESRV_4 +550 0x0000 //TX_WNS_RESRV_5 +551 0x0000 //TX_WNS_RESRV_6 +552 0x0000 //TX_PB_B_POST_FLT_LESSCUT +553 0x0070 //TX_BF_LESSCUT_BBIN +554 0x0070 //TX_BF_LESSCUT_EBIN +555 0x0010 //TX_POSTBFB0 +556 0x0070 //TX_POSTBFB +557 0x00B0 //TX_POSTBFE +558 0x0E66 //TX_SPEECH_SNR_TH +559 0x0050 //TX_PB_MAX_PRI_SNR_TH +560 0x770A //TX_MAX_PRI_SNR_TH_L +561 0x0000 //TX_PFGAIN +562 0x0000 //TX_MAINTOREFR_TH +563 0x0000 //TX_SAM_MARK +564 0x0000 //TX_PB_RESRV_0 +565 0x0000 //TX_PB_RESRV_1 +566 0x0020 //TX_FDEQ_SUBNUM +567 0x4848 //TX_FDEQ_GAIN_0 +568 0x4848 //TX_FDEQ_GAIN_1 +569 0x4850 //TX_FDEQ_GAIN_2 +570 0x5050 //TX_FDEQ_GAIN_3 +571 0x4B48 //TX_FDEQ_GAIN_4 +572 0x484B //TX_FDEQ_GAIN_5 +573 0x4B5C //TX_FDEQ_GAIN_6 +574 0x564E //TX_FDEQ_GAIN_7 +575 0x4C4E //TX_FDEQ_GAIN_8 +576 0x4E45 //TX_FDEQ_GAIN_9 +577 0x494A //TX_FDEQ_GAIN_10 +578 0x534D //TX_FDEQ_GAIN_11 +579 0x5C57 //TX_FDEQ_GAIN_12 +580 0x5667 //TX_FDEQ_GAIN_13 +581 0x6778 //TX_FDEQ_GAIN_14 +582 0x8087 //TX_FDEQ_GAIN_15 +583 0x4848 //TX_FDEQ_GAIN_16 +584 0x4848 //TX_FDEQ_GAIN_17 +585 0x4848 //TX_FDEQ_GAIN_18 +586 0x4848 //TX_FDEQ_GAIN_19 +587 0x4848 //TX_FDEQ_GAIN_20 +588 0x4848 //TX_FDEQ_GAIN_21 +589 0x4848 //TX_FDEQ_GAIN_22 +590 0x4848 //TX_FDEQ_GAIN_23 +591 0x0202 //TX_FDEQ_BIN_0 +592 0x0203 //TX_FDEQ_BIN_1 +593 0x0303 //TX_FDEQ_BIN_2 +594 0x0304 //TX_FDEQ_BIN_3 +595 0x0405 //TX_FDEQ_BIN_4 +596 0x0506 //TX_FDEQ_BIN_5 +597 0x0708 //TX_FDEQ_BIN_6 +598 0x090A //TX_FDEQ_BIN_7 +599 0x0B0C //TX_FDEQ_BIN_8 +600 0x0D0E //TX_FDEQ_BIN_9 +601 0x1013 //TX_FDEQ_BIN_10 +602 0x1719 //TX_FDEQ_BIN_11 +603 0x1B1E //TX_FDEQ_BIN_12 +604 0x1E1E //TX_FDEQ_BIN_13 +605 0x1E28 //TX_FDEQ_BIN_14 +606 0x282C //TX_FDEQ_BIN_15 +607 0x0000 //TX_FDEQ_BIN_16 +608 0x0000 //TX_FDEQ_BIN_17 +609 0x0000 //TX_FDEQ_BIN_18 +610 0x0000 //TX_FDEQ_BIN_19 +611 0x0000 //TX_FDEQ_BIN_20 +612 0x0000 //TX_FDEQ_BIN_21 +613 0x0000 //TX_FDEQ_BIN_22 +614 0x0000 //TX_FDEQ_BIN_23 +615 0x0000 //TX_FDEQ_PADDING +616 0x0030 //TX_PREEQ_SUBNUM_MIC0 +617 0x4848 //TX_PREEQ_GAIN_MIC0_0 +618 0x4848 //TX_PREEQ_GAIN_MIC0_1 +619 0x4848 //TX_PREEQ_GAIN_MIC0_2 +620 0x4848 //TX_PREEQ_GAIN_MIC0_3 +621 0x4848 //TX_PREEQ_GAIN_MIC0_4 +622 0x4848 //TX_PREEQ_GAIN_MIC0_5 +623 0x4848 //TX_PREEQ_GAIN_MIC0_6 +624 0x4848 //TX_PREEQ_GAIN_MIC0_7 +625 0x4848 //TX_PREEQ_GAIN_MIC0_8 +626 0x4848 //TX_PREEQ_GAIN_MIC0_9 +627 0x4848 //TX_PREEQ_GAIN_MIC0_10 +628 0x4848 //TX_PREEQ_GAIN_MIC0_11 +629 0x4848 //TX_PREEQ_GAIN_MIC0_12 +630 0x4848 //TX_PREEQ_GAIN_MIC0_13 +631 0x4848 //TX_PREEQ_GAIN_MIC0_14 +632 0x4848 //TX_PREEQ_GAIN_MIC0_15 +633 0x4848 //TX_PREEQ_GAIN_MIC0_16 +634 0x4848 //TX_PREEQ_GAIN_MIC0_17 +635 0x4848 //TX_PREEQ_GAIN_MIC0_18 +636 0x4848 //TX_PREEQ_GAIN_MIC0_19 +637 0x4848 //TX_PREEQ_GAIN_MIC0_20 +638 0x4848 //TX_PREEQ_GAIN_MIC0_21 +639 0x4848 //TX_PREEQ_GAIN_MIC0_22 +640 0x4848 //TX_PREEQ_GAIN_MIC0_23 +641 0x0202 //TX_PREEQ_BIN_MIC0_0 +642 0x0203 //TX_PREEQ_BIN_MIC0_1 +643 0x0303 //TX_PREEQ_BIN_MIC0_2 +644 0x0304 //TX_PREEQ_BIN_MIC0_3 +645 0x0405 //TX_PREEQ_BIN_MIC0_4 +646 0x0506 //TX_PREEQ_BIN_MIC0_5 +647 0x0808 //TX_PREEQ_BIN_MIC0_6 +648 0x0809 //TX_PREEQ_BIN_MIC0_7 +649 0x0A0A //TX_PREEQ_BIN_MIC0_8 +650 0x0C10 //TX_PREEQ_BIN_MIC0_9 +651 0x1013 //TX_PREEQ_BIN_MIC0_10 +652 0x1414 //TX_PREEQ_BIN_MIC0_11 +653 0x261E //TX_PREEQ_BIN_MIC0_12 +654 0x1E14 //TX_PREEQ_BIN_MIC0_13 +655 0x1414 //TX_PREEQ_BIN_MIC0_14 +656 0x2814 //TX_PREEQ_BIN_MIC0_15 +657 0x401E //TX_PREEQ_BIN_MIC0_16 +658 0x0000 //TX_PREEQ_BIN_MIC0_17 +659 0x0000 //TX_PREEQ_BIN_MIC0_18 +660 0x0000 //TX_PREEQ_BIN_MIC0_19 +661 0x0000 //TX_PREEQ_BIN_MIC0_20 +662 0x0000 //TX_PREEQ_BIN_MIC0_21 +663 0x0000 //TX_PREEQ_BIN_MIC0_22 +664 0x0000 //TX_PREEQ_BIN_MIC0_23 +665 0x0030 //TX_PREEQ_SUBNUM_MIC1 +666 0x4848 //TX_PREEQ_GAIN_MIC1_0 +667 0x4848 //TX_PREEQ_GAIN_MIC1_1 +668 0x4848 //TX_PREEQ_GAIN_MIC1_2 +669 0x4848 //TX_PREEQ_GAIN_MIC1_3 +670 0x4848 //TX_PREEQ_GAIN_MIC1_4 +671 0x4848 //TX_PREEQ_GAIN_MIC1_5 +672 0x4848 //TX_PREEQ_GAIN_MIC1_6 +673 0x4849 //TX_PREEQ_GAIN_MIC1_7 +674 0x4A4A //TX_PREEQ_GAIN_MIC1_8 +675 0x4B4D //TX_PREEQ_GAIN_MIC1_9 +676 0x4E4F //TX_PREEQ_GAIN_MIC1_10 +677 0x5052 //TX_PREEQ_GAIN_MIC1_11 +678 0x5354 //TX_PREEQ_GAIN_MIC1_12 +679 0x5454 //TX_PREEQ_GAIN_MIC1_13 +680 0x5653 //TX_PREEQ_GAIN_MIC1_14 +681 0x4C48 //TX_PREEQ_GAIN_MIC1_15 +682 0x4444 //TX_PREEQ_GAIN_MIC1_16 +683 0x4848 //TX_PREEQ_GAIN_MIC1_17 +684 0x4848 //TX_PREEQ_GAIN_MIC1_18 +685 0x4848 //TX_PREEQ_GAIN_MIC1_19 +686 0x4848 //TX_PREEQ_GAIN_MIC1_20 +687 0x4848 //TX_PREEQ_GAIN_MIC1_21 +688 0x4848 //TX_PREEQ_GAIN_MIC1_22 +689 0x4848 //TX_PREEQ_GAIN_MIC1_23 +690 0x0202 //TX_PREEQ_BIN_MIC1_0 +691 0x0203 //TX_PREEQ_BIN_MIC1_1 +692 0x0303 //TX_PREEQ_BIN_MIC1_2 +693 0x0304 //TX_PREEQ_BIN_MIC1_3 +694 0x0405 //TX_PREEQ_BIN_MIC1_4 +695 0x0506 //TX_PREEQ_BIN_MIC1_5 +696 0x0808 //TX_PREEQ_BIN_MIC1_6 +697 0x0809 //TX_PREEQ_BIN_MIC1_7 +698 0x0A0A //TX_PREEQ_BIN_MIC1_8 +699 0x0C10 //TX_PREEQ_BIN_MIC1_9 +700 0x1013 //TX_PREEQ_BIN_MIC1_10 +701 0x1414 //TX_PREEQ_BIN_MIC1_11 +702 0x261E //TX_PREEQ_BIN_MIC1_12 +703 0x1E14 //TX_PREEQ_BIN_MIC1_13 +704 0x1414 //TX_PREEQ_BIN_MIC1_14 +705 0x2814 //TX_PREEQ_BIN_MIC1_15 +706 0x401E //TX_PREEQ_BIN_MIC1_16 +707 0x0000 //TX_PREEQ_BIN_MIC1_17 +708 0x0000 //TX_PREEQ_BIN_MIC1_18 +709 0x0000 //TX_PREEQ_BIN_MIC1_19 +710 0x0000 //TX_PREEQ_BIN_MIC1_20 +711 0x0000 //TX_PREEQ_BIN_MIC1_21 +712 0x0000 //TX_PREEQ_BIN_MIC1_22 +713 0x0000 //TX_PREEQ_BIN_MIC1_23 +714 0x0020 //TX_PREEQ_SUBNUM_MIC2 +715 0x4848 //TX_PREEQ_GAIN_MIC2_0 +716 0x4848 //TX_PREEQ_GAIN_MIC2_1 +717 0x4848 //TX_PREEQ_GAIN_MIC2_2 +718 0x4848 //TX_PREEQ_GAIN_MIC2_3 +719 0x4848 //TX_PREEQ_GAIN_MIC2_4 +720 0x4848 //TX_PREEQ_GAIN_MIC2_5 +721 0x494B //TX_PREEQ_GAIN_MIC2_6 +722 0x4C4D //TX_PREEQ_GAIN_MIC2_7 +723 0x4E4F //TX_PREEQ_GAIN_MIC2_8 +724 0x5051 //TX_PREEQ_GAIN_MIC2_9 +725 0x5255 //TX_PREEQ_GAIN_MIC2_10 +726 0x5754 //TX_PREEQ_GAIN_MIC2_11 +727 0x5454 //TX_PREEQ_GAIN_MIC2_12 +728 0x544F //TX_PREEQ_GAIN_MIC2_13 +729 0x463D //TX_PREEQ_GAIN_MIC2_14 +730 0x4A48 //TX_PREEQ_GAIN_MIC2_15 +731 0x4848 //TX_PREEQ_GAIN_MIC2_16 +732 0x4848 //TX_PREEQ_GAIN_MIC2_17 +733 0x4848 //TX_PREEQ_GAIN_MIC2_18 +734 0x4848 //TX_PREEQ_GAIN_MIC2_19 +735 0x4848 //TX_PREEQ_GAIN_MIC2_20 +736 0x4848 //TX_PREEQ_GAIN_MIC2_21 +737 0x4848 //TX_PREEQ_GAIN_MIC2_22 +738 0x4848 //TX_PREEQ_GAIN_MIC2_23 +739 0x0203 //TX_PREEQ_BIN_MIC2_0 +740 0x0303 //TX_PREEQ_BIN_MIC2_1 +741 0x0304 //TX_PREEQ_BIN_MIC2_2 +742 0x0405 //TX_PREEQ_BIN_MIC2_3 +743 0x0506 //TX_PREEQ_BIN_MIC2_4 +744 0x0808 //TX_PREEQ_BIN_MIC2_5 +745 0x0809 //TX_PREEQ_BIN_MIC2_6 +746 0x0A0A //TX_PREEQ_BIN_MIC2_7 +747 0x0C10 //TX_PREEQ_BIN_MIC2_8 +748 0x1013 //TX_PREEQ_BIN_MIC2_9 +749 0x1414 //TX_PREEQ_BIN_MIC2_10 +750 0x261E //TX_PREEQ_BIN_MIC2_11 +751 0x1E14 //TX_PREEQ_BIN_MIC2_12 +752 0x1414 //TX_PREEQ_BIN_MIC2_13 +753 0x2814 //TX_PREEQ_BIN_MIC2_14 +754 0x4022 //TX_PREEQ_BIN_MIC2_15 +755 0x0000 //TX_PREEQ_BIN_MIC2_16 +756 0x0000 //TX_PREEQ_BIN_MIC2_17 +757 0x0000 //TX_PREEQ_BIN_MIC2_18 +758 0x0000 //TX_PREEQ_BIN_MIC2_19 +759 0x0000 //TX_PREEQ_BIN_MIC2_20 +760 0x0000 //TX_PREEQ_BIN_MIC2_21 +761 0x0000 //TX_PREEQ_BIN_MIC2_22 +762 0x0000 //TX_PREEQ_BIN_MIC2_23 +763 0x0006 //TX_MASKING_ABILITY +764 0x0800 //TX_NND_WEIGHT +765 0x0050 //TX_MIC_CALIBRATION_0 +766 0x0065 //TX_MIC_CALIBRATION_1 +767 0x0050 //TX_MIC_CALIBRATION_2 +768 0x0050 //TX_MIC_CALIBRATION_3 +769 0x0046 //TX_MIC_PWR_BIAS_0 +770 0x0040 //TX_MIC_PWR_BIAS_1 +771 0x0046 //TX_MIC_PWR_BIAS_2 +772 0x0046 //TX_MIC_PWR_BIAS_3 +773 0x0000 //TX_GAIN_LIMIT_0 +774 0x000F //TX_GAIN_LIMIT_1 +775 0x0000 //TX_GAIN_LIMIT_2 +776 0x0000 //TX_GAIN_LIMIT_3 +777 0x7F5B //TX_BVE_NOVAD0_ALPHADOWN +778 0x7FDE //TX_BVE_VAD0_ALPHAUP +779 0x7F3A //TX_BVE_VAD0_ALPHADOWN +780 0x2000 //TX_BVE_GAINWEIGHT_NOFEVADLI +781 0x7F5B //TX_BVE_FEVADLI_ALPHA +782 0x7F19 //TX_BVE_NOVAD0_ALPHAUP +783 0x0800 //TX_TDDRC_ALPHA_UP_01 +784 0x0800 //TX_TDDRC_ALPHA_UP_02 +785 0x0800 //TX_TDDRC_ALPHA_UP_03 +786 0x0800 //TX_TDDRC_ALPHA_UP_04 +787 0x7EB8 //TX_TDDRC_ALPHA_DWN_01 +788 0x7EB8 //TX_TDDRC_ALPHA_DWN_02 +789 0x7EB8 //TX_TDDRC_ALPHA_DWN_03 +790 0x7EB8 //TX_TDDRC_ALPHA_DWN_04 +791 0x7FFF //TX_TDDRC_TD_DRC_LIMIT +792 0x0800 //TX_TDDRC_POST_LIMIT_GAIN +793 0x0000 //TX_TDDRC_RESRV_0 +794 0x0000 //TX_TDDRC_RESRV_1 +795 0x0018 //TX_FDDRC_BAND_MARGIN_0 +796 0x0030 //TX_FDDRC_BAND_MARGIN_1 +797 0x0050 //TX_FDDRC_BAND_MARGIN_2 +798 0x0080 //TX_FDDRC_BAND_MARGIN_3 +799 0x0007 //TX_FDDRC_BLOCK_EXP +800 0x5000 //TX_FDDRC_THRD_2_0 +801 0x5000 //TX_FDDRC_THRD_2_1 +802 0x5000 //TX_FDDRC_THRD_2_2 +803 0x5000 //TX_FDDRC_THRD_2_3 +804 0x6400 //TX_FDDRC_THRD_3_0 +805 0x6400 //TX_FDDRC_THRD_3_1 +806 0x6400 //TX_FDDRC_THRD_3_2 +807 0x6400 //TX_FDDRC_THRD_3_3 +808 0x2000 //TX_FDDRC_SLANT_0_0 +809 0x2000 //TX_FDDRC_SLANT_0_1 +810 0x2000 //TX_FDDRC_SLANT_0_2 +811 0x2000 //TX_FDDRC_SLANT_0_3 +812 0x5333 //TX_FDDRC_SLANT_1_0 +813 0x5333 //TX_FDDRC_SLANT_1_1 +814 0x5333 //TX_FDDRC_SLANT_1_2 +815 0x5333 //TX_FDDRC_SLANT_1_3 +816 0x0010 //TX_DEADMIC_SILENCE_TH +817 0x0600 //TX_MIC_DEGRADE_TH +818 0x0078 //TX_DEADMIC_CNT +819 0x0078 //TX_MIC_DEGRADE_CNT +820 0x0000 //TX_FDDRC_RESRV_4 +821 0x0000 //TX_FDDRC_RESRV_5 +822 0x0000 //TX_FDDRC_RESRV_6 +823 0x7FFF //TX_KS_NOISEPASTE_FACTOR +824 0x0001 //TX_KS_CONFIG +825 0x7FFF //TX_KS_GAIN_MIN +826 0x0000 //TX_KS_RESRV_0 +827 0x0000 //TX_KS_RESRV_1 +828 0x0000 //TX_KS_RESRV_2 +829 0x7C00 //TX_LAMBDA_PKA_FP +830 0x2000 //TX_TPKA_FP +831 0x0080 //TX_MIN_G_FP +832 0x2000 //TX_MAX_G_FP +833 0x4848 //TX_FFP_FP_K_METAL +834 0x4000 //TX_A_POST_FLT_FP +835 0x0F5C //TX_RTO_OUTBEAM_TH +836 0x4CCD //TX_TPKA_FP_THD +837 0x0000 //TX_MAX_G_FP_BLK +838 0x0000 //TX_FFP_FADEIN +839 0x0000 //TX_FFP_FADEOUT +840 0x0000 //TX_WHISPERCTH +841 0x0000 //TX_WHISPERHOLDT +842 0x0000 //TX_WHISP_ENTHH +843 0x0000 //TX_WHISP_ENTHL +844 0x0000 //TX_WHISP_RTOTH +845 0x0000 //TX_WHISP_RTOTH2 +846 0x0096 //TX_MUTE_PERIOD +847 0x0000 //TX_FADE_IN_PERIOD +848 0x0100 //TX_FFP_RESRV_2 +849 0x0020 //TX_FFP_RESRV_3 +850 0x0000 //TX_FFP_RESRV_4 +851 0x0000 //TX_FFP_RESRV_5 +852 0x0000 //TX_FFP_RESRV_6 +853 0x0002 //TX_FILTINDX +854 0x0003 //TX_TDDRC_THRD_0 +855 0x0004 //TX_TDDRC_THRD_1 +856 0x1000 //TX_TDDRC_THRD_2 +857 0x1000 //TX_TDDRC_THRD_3 +858 0x6000 //TX_TDDRC_SLANT_0 +859 0x6000 //TX_TDDRC_SLANT_1 +860 0x0800 //TX_TDDRC_ALPHA_UP_00 +861 0x7EB8 //TX_TDDRC_ALPHA_DWN_00 +862 0x0000 //TX_TDDRC_HMNC_FLAG +863 0x199A //TX_TDDRC_HMNC_GAIN +864 0x0000 //TX_TDDRC_SMT_FLAG +865 0x0CCD //TX_TDDRC_SMT_W +866 0x0E21 //TX_TDDRC_DRC_GAIN +867 0x7FFF //TX_TDDRC_LMT_THRD +868 0x0000 //TX_TDDRC_LMT_ALPHA +869 0x0000 //TX_TFMASKLTH +870 0x0000 //TX_TFMASKLTHL +871 0x0CCD //TX_TFMASKHTH +872 0x0CCD //TX_TFMASKLTH_BINVAD +873 0xF333 //TX_TFMASKLTH_NS_EST +874 0x2CCD //TX_TFMASKLTH_DOA +875 0xECCD //TX_TFMASKTH_BLESSCUT +876 0x1000 //TX_B_LESSCUT_RTO_MASK +877 0x3800 //TX_SB_RHO_MEAN_TH_ABN +878 0x2000 //TX_B_POST_FLT_MASK +879 0x0000 //TX_B_POST_FLT_MASK1 +880 0x5333 //TX_GAIN_WIND_MASK +881 0x7FFF //TX_TFMASK_BFSTRICT_MUSIC +882 0x0000 //TX_TFMASK_BFSTRICT_NOMUSIC +883 0x7333 //TX_FASTNS_OUTIN_TH +884 0x0CCD //TX_FASTNS_TFMASK_TH +885 0x0CCD //TX_FASTNS_TFMASKBIN_TH1 +886 0x0CCD //TX_FASTNS_TFMASKBIN_TH2 +887 0x0CCD //TX_FASTNS_TFMASKBIN_TH3 +888 0x00C8 //TX_FASTNS_ARSPC_TH +889 0xC000 //TX_FASTNS_MASK5_TH +890 0x4848 //TX_POSTSSA_MIN_G_VR_MASK +891 0x4000 //TX_A_LESSCUT_RTO_MASK +892 0x1770 //TX_FASTNS_NOISETH +893 0xC000 //TX_FASTNS_SSA_THLFL +894 0xC000 //TX_FASTNS_SSA_THHFL +895 0xCCCC //TX_FASTNS_SSA_THLFH +896 0xD999 //TX_FASTNS_SSA_THHFH +897 0x2339 //TX_SENDFUNC_REG_MICMUTE +898 0x0021 //TX_SENDFUNC_REG_MICMUTE1 +899 0x02BC //TX_MICMUTE_RATIO_THR +900 0x0140 //TX_MICMUTE_AMP_THR +901 0x0004 //TX_MICMUTE_HPF_IND +902 0x00C0 //TX_MICMUTE_LOG_EYR_TH +903 0x0008 //TX_MICMUTE_CVG_TIME +904 0x0008 //TX_MICMUTE_RELEASE_TIME +905 0x01FE //TX_MIC_VOLUME_MIC0MUTE +906 0x0020 //TX_MICMUTE_EPD_OFFSET_0 +907 0x001E //TX_MICMUTE_FRQ_AEC_L +908 0x7999 //TX_MICMUTE_EAD_THR +909 0x7FFF //TX_MICMUTE_LAMBDA_CB_NLE +910 0x7FFF //TX_MICMUTE_LAMBDA_RE_EST +911 0x4000 //TX_DTD_THR1_MICMUTE_0 +912 0x7000 //TX_DTD_THR1_MICMUTE_1 +913 0x7FFF //TX_DTD_THR1_MICMUTE_2 +914 0x7FFF //TX_DTD_THR1_MICMUTE_3 +915 0x6CCC //TX_DTD_THR2_MICMUTE_0 +916 0x0400 //TX_MICMUTE_MIN_EQ_RE_EST_0 +917 0x0400 //TX_MICMUTE_MIN_EQ_RE_EST_1 +918 0x1000 //TX_MICMUTE_MIN_EQ_RE_EST_2 +919 0x7FFF //TX_MICMUTE_MIN_EQ_RE_EST_3 +920 0x7FFF //TX_MICMUTE_MIN_EQ_RE_EST_4 +921 0x4000 //TX_MICMUTE_C_POST_FLT +922 0x03E8 //TX_MICMUTE_DT_CUT_K +923 0x0001 //TX_MICMUTE_DT_CUT_THR +924 0x03E8 //TX_MICMUTE_DT_CUT_K2 +925 0x0001 //TX_MICMUTE_DT_CUT_THR2 +926 0x0064 //TX_MICMUTE_DT2_HOLD_N +927 0x1000 //TX_MICMUTE_RATIODTH_THCUT +928 0x1000 //TX_MICMUTE_B_POST_FLT_ECHOL +929 0x7FFF //TX_MICMUTE_B_POST_FLT_ECHOH +930 0x0400 //TX_MICMUTE_C_POST_FLT_MASK +931 0x7999 //TX_MICMUTE_RATIODTL_CUT_TH +932 0x0258 //TX_MICMUTE_DT_CUT_K1 +933 0x0800 //TX_MICMUTE_N2_SN_EST +934 0xFC00 //TX_MICMUTE_THR_SN_EST_0 +935 0x001C //TX_MICMUTE_MIN_G_CTRL_0 +936 0x6000 //TX_MICMUTE_A_POST_FILT_S_0 +937 0x7000 //TX_MICMUTE_B_POST_FILT_0 +938 0x2710 //TX_MIC1RUB_AMP_THR +939 0x0010 //TX_MIC1MUTE_RATIO_THR +940 0x0450 //TX_MIC1MUTE_AMP_THR +941 0x0008 //TX_MIC1MUTE_CVG_TIME +942 0x0008 //TX_MIC1MUTE_RELEASE_TIME +943 0x0000 //TX_AMS_RESRV_01 +944 0x0000 //TX_AMS_RESRV_02 +945 0x0000 //TX_AMS_RESRV_03 +946 0x0000 //TX_AMS_RESRV_04 +947 0x0000 //TX_AMS_RESRV_05 +948 0x0000 //TX_AMS_RESRV_06 +949 0x0000 //TX_AMS_RESRV_07 +950 0x0000 //TX_AMS_RESRV_08 +951 0x0000 //TX_AMS_RESRV_09 +952 0x0000 //TX_AMS_RESRV_10 +953 0x0000 //TX_AMS_RESRV_11 +954 0x0000 //TX_AMS_RESRV_12 +955 0x0000 //TX_AMS_RESRV_13 +956 0x0000 //TX_AMS_RESRV_14 +957 0x0000 //TX_AMS_RESRV_15 +958 0x0000 //TX_AMS_RESRV_16 +959 0x0000 //TX_AMS_RESRV_17 +960 0x0000 //TX_AMS_RESRV_18 +961 0x0000 //TX_AMS_RESRV_19 +#RX +0 0x206C //RX_RECVFUNC_MODE_0 +1 0x0000 //RX_RECVFUNC_MODE_1 +2 0x0003 //RX_SAMPLINGFREQ_SIG +3 0x0003 //RX_SAMPLINGFREQ_PROC +4 0x000A //RX_FRAME_SZ +5 0x0000 //RX_DELAY_OPT +6 0x6000 //RX_TDDRC_ALPHA_UP_1 +7 0x6000 //RX_TDDRC_ALPHA_UP_2 +8 0x6000 //RX_TDDRC_ALPHA_UP_3 +9 0x1000 //RX_TDDRC_ALPHA_UP_4 +10 0x0800 //RX_PGA +11 0x7652 //RX_A_HP +12 0x4000 //RX_B_PE +13 0x7800 //RX_THR_PITCH_DET_0 +14 0x7000 //RX_THR_PITCH_DET_1 +15 0x6000 //RX_THR_PITCH_DET_2 +16 0x0008 //RX_PITCH_BFR_LEN +17 0x0003 //RX_SBD_PITCH_DET +18 0x0100 //RX_PP_RESRV_0 +19 0x0020 //RX_PP_RESRV_1 +20 0x0400 //RX_N_SN_EST +21 0x000C //RX_N2_SN_EST +22 0x0010 //RX_NS_LVL_CTRL +23 0xF800 //RX_THR_SN_EST +24 0x7E00 //RX_LAMBDA_PFILT +25 0x000A //RX_FENS_RESRV_0 +26 0x0190 //RX_FENS_RESRV_1 +27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +30 0x0002 //RX_EXTRA_NS_L +31 0x0800 //RX_EXTRA_NS_A +32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +33 0x7214 //RX_TDDRC_LIMITER_THRD +34 0x0800 //RX_TDDRC_LIMITER_GAIN +35 0x199A //RX_A_POST_FLT +36 0x0000 //RX_LMT_THRD +37 0x4000 //RX_LMT_ALPHA +38 0x0020 //RX_FDEQ_SUBNUM +39 0x4848 //RX_FDEQ_GAIN_0 +40 0x3B3B //RX_FDEQ_GAIN_1 +41 0x3942 //RX_FDEQ_GAIN_2 +42 0x4645 //RX_FDEQ_GAIN_3 +43 0x494A //RX_FDEQ_GAIN_4 +44 0x5D5A //RX_FDEQ_GAIN_5 +45 0x5B5B //RX_FDEQ_GAIN_6 +46 0x5A51 //RX_FDEQ_GAIN_7 +47 0x514F //RX_FDEQ_GAIN_8 +48 0x5568 //RX_FDEQ_GAIN_9 +49 0x7460 //RX_FDEQ_GAIN_10 +50 0x544E //RX_FDEQ_GAIN_11 +51 0x4848 //RX_FDEQ_GAIN_12 +52 0x484A //RX_FDEQ_GAIN_13 +53 0x5155 //RX_FDEQ_GAIN_14 +54 0x577B //RX_FDEQ_GAIN_15 +55 0x4848 //RX_FDEQ_GAIN_16 +56 0x4848 //RX_FDEQ_GAIN_17 +57 0x4848 //RX_FDEQ_GAIN_18 +58 0x4848 //RX_FDEQ_GAIN_19 +59 0x4848 //RX_FDEQ_GAIN_20 +60 0x4848 //RX_FDEQ_GAIN_21 +61 0x4848 //RX_FDEQ_GAIN_22 +62 0x4848 //RX_FDEQ_GAIN_23 +63 0x0202 //RX_FDEQ_BIN_0 +64 0x0203 //RX_FDEQ_BIN_1 +65 0x0303 //RX_FDEQ_BIN_2 +66 0x0304 //RX_FDEQ_BIN_3 +67 0x0404 //RX_FDEQ_BIN_4 +68 0x0308 //RX_FDEQ_BIN_5 +69 0x0808 //RX_FDEQ_BIN_6 +70 0x090A //RX_FDEQ_BIN_7 +71 0x0B0C //RX_FDEQ_BIN_8 +72 0x0D0E //RX_FDEQ_BIN_9 +73 0x1013 //RX_FDEQ_BIN_10 +74 0x1719 //RX_FDEQ_BIN_11 +75 0x1B1E //RX_FDEQ_BIN_12 +76 0x1E1E //RX_FDEQ_BIN_13 +77 0x1E28 //RX_FDEQ_BIN_14 +78 0x282C //RX_FDEQ_BIN_15 +79 0x0000 //RX_FDEQ_BIN_16 +80 0x0000 //RX_FDEQ_BIN_17 +81 0x0000 //RX_FDEQ_BIN_18 +82 0x0000 //RX_FDEQ_BIN_19 +83 0x0000 //RX_FDEQ_BIN_20 +84 0x0000 //RX_FDEQ_BIN_21 +85 0x0000 //RX_FDEQ_BIN_22 +86 0x0000 //RX_FDEQ_BIN_23 +87 0x4000 //RX_FDEQ_RESRV_0 +88 0x0320 //RX_FDEQ_RESRV_1 +89 0x0018 //RX_FDDRC_BAND_MARGIN_0 +90 0x0035 //RX_FDDRC_BAND_MARGIN_1 +91 0x00D5 //RX_FDDRC_BAND_MARGIN_2 +92 0x0120 //RX_FDDRC_BAND_MARGIN_3 +93 0x0004 //RX_FDDRC_BLOCK_EXP +94 0x5000 //RX_FDDRC_THRD_2_0 +95 0x5000 //RX_FDDRC_THRD_2_1 +96 0x2000 //RX_FDDRC_THRD_2_2 +97 0x5000 //RX_FDDRC_THRD_2_3 +98 0x6400 //RX_FDDRC_THRD_3_0 +99 0x6400 //RX_FDDRC_THRD_3_1 +100 0x2000 //RX_FDDRC_THRD_3_2 +101 0x5000 //RX_FDDRC_THRD_3_3 +102 0x4000 //RX_FDDRC_SLANT_0_0 +103 0x4000 //RX_FDDRC_SLANT_0_1 +104 0x4000 //RX_FDDRC_SLANT_0_2 +105 0x4000 //RX_FDDRC_SLANT_0_3 +106 0x7FFF //RX_FDDRC_SLANT_1_0 +107 0x7FFF //RX_FDDRC_SLANT_1_1 +108 0x7FFF //RX_FDDRC_SLANT_1_2 +109 0x7FFF //RX_FDDRC_SLANT_1_3 +110 0x0000 //RX_FDDRC_RESRV_0 +111 0x0002 //RX_FILTINDX +112 0x0002 //RX_TDDRC_THRD_0 +113 0x0004 //RX_TDDRC_THRD_1 +114 0x1A00 //RX_TDDRC_THRD_2 +115 0x1A00 //RX_TDDRC_THRD_3 +116 0x7EB8 //RX_TDDRC_SLANT_0 +117 0x2500 //RX_TDDRC_SLANT_1 +118 0x6000 //RX_TDDRC_ALPHA_UP_0 +119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +120 0x0000 //RX_TDDRC_HMNC_FLAG +121 0x199A //RX_TDDRC_HMNC_GAIN +122 0x0001 //RX_TDDRC_SMT_FLAG +123 0x0CCD //RX_TDDRC_SMT_W +124 0x032A //RX_TDDRC_DRC_GAIN +125 0x7C00 //RX_LAMBDA_PKA_FP +126 0x2000 //RX_TPKA_FP +127 0x2000 //RX_MIN_G_FP +128 0x0080 //RX_MAX_G_FP +129 0x0100 //RX_SPK_VOL +130 0x0000 //RX_VOL_RESRV_0 +131 0x0000 //RX_MAXLEVEL_CNG +132 0x3000 //RX_BWE_UV_TH +133 0x3000 //RX_BWE_UV_TH2 +134 0x1800 //RX_BWE_UV_TH3 +135 0x1000 //RX_BWE_V_TH +136 0x04CD //RX_BWE_GAIN1_V_TH1 +137 0x0F33 //RX_BWE_GAIN1_V_TH2 +138 0x7333 //RX_BWE_UV_EQ +139 0x199A //RX_BWE_V_EQ +140 0x7333 //RX_BWE_TONE_TH +141 0x0004 //RX_BWE_UV_HOLD_T +142 0x6CCD //RX_BWE_GAIN2_ALPHA +143 0x799A //RX_BWE_GAIN3_ALPHA +144 0x001E //RX_BWE_CUTOFF +145 0x3000 //RX_BWE_GAINFILL +146 0x3200 //RX_BWE_MAXTH_TONE +147 0x2000 //RX_BWE_EQ_0 +148 0x2000 //RX_BWE_EQ_1 +149 0x2000 //RX_BWE_EQ_2 +150 0x2000 //RX_BWE_EQ_3 +151 0x2000 //RX_BWE_EQ_4 +152 0x2000 //RX_BWE_EQ_5 +153 0x2000 //RX_BWE_EQ_6 +154 0x0000 //RX_BWE_RESRV_0 +155 0x0000 //RX_BWE_RESRV_1 +156 0x0000 //RX_BWE_RESRV_2 +#VOL 0 +6 0x6000 //RX_TDDRC_ALPHA_UP_1 +7 0x6000 //RX_TDDRC_ALPHA_UP_2 +8 0x6000 //RX_TDDRC_ALPHA_UP_3 +9 0x1000 //RX_TDDRC_ALPHA_UP_4 +27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +33 0x7214 //RX_TDDRC_LIMITER_THRD +34 0x0800 //RX_TDDRC_LIMITER_GAIN +112 0x0002 //RX_TDDRC_THRD_0 +113 0x0004 //RX_TDDRC_THRD_1 +114 0x1A00 //RX_TDDRC_THRD_2 +115 0x1A00 //RX_TDDRC_THRD_3 +116 0x7EB8 //RX_TDDRC_SLANT_0 +117 0x2500 //RX_TDDRC_SLANT_1 +118 0x6000 //RX_TDDRC_ALPHA_UP_0 +119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +120 0x0000 //RX_TDDRC_HMNC_FLAG +121 0x199A //RX_TDDRC_HMNC_GAIN +122 0x0001 //RX_TDDRC_SMT_FLAG +123 0x0CCD //RX_TDDRC_SMT_W +124 0x032A //RX_TDDRC_DRC_GAIN +38 0x0020 //RX_FDEQ_SUBNUM +39 0x4848 //RX_FDEQ_GAIN_0 +40 0x3B3B //RX_FDEQ_GAIN_1 +41 0x3942 //RX_FDEQ_GAIN_2 +42 0x4645 //RX_FDEQ_GAIN_3 +43 0x494A //RX_FDEQ_GAIN_4 +44 0x5D5A //RX_FDEQ_GAIN_5 +45 0x5B5B //RX_FDEQ_GAIN_6 +46 0x5A51 //RX_FDEQ_GAIN_7 +47 0x514F //RX_FDEQ_GAIN_8 +48 0x5568 //RX_FDEQ_GAIN_9 +49 0x7460 //RX_FDEQ_GAIN_10 +50 0x544E //RX_FDEQ_GAIN_11 +51 0x4848 //RX_FDEQ_GAIN_12 +52 0x484A //RX_FDEQ_GAIN_13 +53 0x5155 //RX_FDEQ_GAIN_14 +54 0x577B //RX_FDEQ_GAIN_15 +55 0x4848 //RX_FDEQ_GAIN_16 +56 0x4848 //RX_FDEQ_GAIN_17 +57 0x4848 //RX_FDEQ_GAIN_18 +58 0x4848 //RX_FDEQ_GAIN_19 +59 0x4848 //RX_FDEQ_GAIN_20 +60 0x4848 //RX_FDEQ_GAIN_21 +61 0x4848 //RX_FDEQ_GAIN_22 +62 0x4848 //RX_FDEQ_GAIN_23 +63 0x0202 //RX_FDEQ_BIN_0 +64 0x0203 //RX_FDEQ_BIN_1 +65 0x0303 //RX_FDEQ_BIN_2 +66 0x0304 //RX_FDEQ_BIN_3 +67 0x0404 //RX_FDEQ_BIN_4 +68 0x0308 //RX_FDEQ_BIN_5 +69 0x0808 //RX_FDEQ_BIN_6 +70 0x090A //RX_FDEQ_BIN_7 +71 0x0B0C //RX_FDEQ_BIN_8 +72 0x0D0E //RX_FDEQ_BIN_9 +73 0x1013 //RX_FDEQ_BIN_10 +74 0x1719 //RX_FDEQ_BIN_11 +75 0x1B1E //RX_FDEQ_BIN_12 +76 0x1E1E //RX_FDEQ_BIN_13 +77 0x1E28 //RX_FDEQ_BIN_14 +78 0x282C //RX_FDEQ_BIN_15 +79 0x0000 //RX_FDEQ_BIN_16 +80 0x0000 //RX_FDEQ_BIN_17 +81 0x0000 //RX_FDEQ_BIN_18 +82 0x0000 //RX_FDEQ_BIN_19 +83 0x0000 //RX_FDEQ_BIN_20 +84 0x0000 //RX_FDEQ_BIN_21 +85 0x0000 //RX_FDEQ_BIN_22 +86 0x0000 //RX_FDEQ_BIN_23 +87 0x4000 //RX_FDEQ_RESRV_0 +88 0x0320 //RX_FDEQ_RESRV_1 +89 0x0018 //RX_FDDRC_BAND_MARGIN_0 +90 0x0035 //RX_FDDRC_BAND_MARGIN_1 +91 0x00D5 //RX_FDDRC_BAND_MARGIN_2 +92 0x0120 //RX_FDDRC_BAND_MARGIN_3 +93 0x0004 //RX_FDDRC_BLOCK_EXP +94 0x5000 //RX_FDDRC_THRD_2_0 +95 0x5000 //RX_FDDRC_THRD_2_1 +96 0x2000 //RX_FDDRC_THRD_2_2 +97 0x5000 //RX_FDDRC_THRD_2_3 +98 0x6400 //RX_FDDRC_THRD_3_0 +99 0x6400 //RX_FDDRC_THRD_3_1 +100 0x2000 //RX_FDDRC_THRD_3_2 +101 0x5000 //RX_FDDRC_THRD_3_3 +102 0x4000 //RX_FDDRC_SLANT_0_0 +103 0x4000 //RX_FDDRC_SLANT_0_1 +104 0x4000 //RX_FDDRC_SLANT_0_2 +105 0x4000 //RX_FDDRC_SLANT_0_3 +106 0x7FFF //RX_FDDRC_SLANT_1_0 +107 0x7FFF //RX_FDDRC_SLANT_1_1 +108 0x7FFF //RX_FDDRC_SLANT_1_2 +109 0x7FFF //RX_FDDRC_SLANT_1_3 +110 0x0000 //RX_FDDRC_RESRV_0 +129 0x0100 //RX_SPK_VOL +130 0x0000 //RX_VOL_RESRV_0 +#VOL 1 +6 0x6000 //RX_TDDRC_ALPHA_UP_1 +7 0x6000 //RX_TDDRC_ALPHA_UP_2 +8 0x6000 //RX_TDDRC_ALPHA_UP_3 +9 0x1000 //RX_TDDRC_ALPHA_UP_4 +27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +33 0x7214 //RX_TDDRC_LIMITER_THRD +34 0x0800 //RX_TDDRC_LIMITER_GAIN +112 0x0002 //RX_TDDRC_THRD_0 +113 0x0004 //RX_TDDRC_THRD_1 +114 0x1A00 //RX_TDDRC_THRD_2 +115 0x1A00 //RX_TDDRC_THRD_3 +116 0x7EB8 //RX_TDDRC_SLANT_0 +117 0x2500 //RX_TDDRC_SLANT_1 +118 0x6000 //RX_TDDRC_ALPHA_UP_0 +119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +120 0x0000 //RX_TDDRC_HMNC_FLAG +121 0x199A //RX_TDDRC_HMNC_GAIN +122 0x0001 //RX_TDDRC_SMT_FLAG +123 0x0CCD //RX_TDDRC_SMT_W +124 0x032A //RX_TDDRC_DRC_GAIN +38 0x0020 //RX_FDEQ_SUBNUM +39 0x4848 //RX_FDEQ_GAIN_0 +40 0x3B3B //RX_FDEQ_GAIN_1 +41 0x3942 //RX_FDEQ_GAIN_2 +42 0x4645 //RX_FDEQ_GAIN_3 +43 0x494A //RX_FDEQ_GAIN_4 +44 0x5D5A //RX_FDEQ_GAIN_5 +45 0x5B5B //RX_FDEQ_GAIN_6 +46 0x5A51 //RX_FDEQ_GAIN_7 +47 0x514F //RX_FDEQ_GAIN_8 +48 0x5568 //RX_FDEQ_GAIN_9 +49 0x7460 //RX_FDEQ_GAIN_10 +50 0x544E //RX_FDEQ_GAIN_11 +51 0x4848 //RX_FDEQ_GAIN_12 +52 0x484A //RX_FDEQ_GAIN_13 +53 0x5155 //RX_FDEQ_GAIN_14 +54 0x577B //RX_FDEQ_GAIN_15 +55 0x4848 //RX_FDEQ_GAIN_16 +56 0x4848 //RX_FDEQ_GAIN_17 +57 0x4848 //RX_FDEQ_GAIN_18 +58 0x4848 //RX_FDEQ_GAIN_19 +59 0x4848 //RX_FDEQ_GAIN_20 +60 0x4848 //RX_FDEQ_GAIN_21 +61 0x4848 //RX_FDEQ_GAIN_22 +62 0x4848 //RX_FDEQ_GAIN_23 +63 0x0202 //RX_FDEQ_BIN_0 +64 0x0203 //RX_FDEQ_BIN_1 +65 0x0303 //RX_FDEQ_BIN_2 +66 0x0304 //RX_FDEQ_BIN_3 +67 0x0404 //RX_FDEQ_BIN_4 +68 0x0308 //RX_FDEQ_BIN_5 +69 0x0808 //RX_FDEQ_BIN_6 +70 0x090A //RX_FDEQ_BIN_7 +71 0x0B0C //RX_FDEQ_BIN_8 +72 0x0D0E //RX_FDEQ_BIN_9 +73 0x1013 //RX_FDEQ_BIN_10 +74 0x1719 //RX_FDEQ_BIN_11 +75 0x1B1E //RX_FDEQ_BIN_12 +76 0x1E1E //RX_FDEQ_BIN_13 +77 0x1E28 //RX_FDEQ_BIN_14 +78 0x282C //RX_FDEQ_BIN_15 +79 0x0000 //RX_FDEQ_BIN_16 +80 0x0000 //RX_FDEQ_BIN_17 +81 0x0000 //RX_FDEQ_BIN_18 +82 0x0000 //RX_FDEQ_BIN_19 +83 0x0000 //RX_FDEQ_BIN_20 +84 0x0000 //RX_FDEQ_BIN_21 +85 0x0000 //RX_FDEQ_BIN_22 +86 0x0000 //RX_FDEQ_BIN_23 +87 0x4000 //RX_FDEQ_RESRV_0 +88 0x0320 //RX_FDEQ_RESRV_1 +89 0x0018 //RX_FDDRC_BAND_MARGIN_0 +90 0x0035 //RX_FDDRC_BAND_MARGIN_1 +91 0x00D5 //RX_FDDRC_BAND_MARGIN_2 +92 0x0120 //RX_FDDRC_BAND_MARGIN_3 +93 0x0004 //RX_FDDRC_BLOCK_EXP +94 0x5000 //RX_FDDRC_THRD_2_0 +95 0x5000 //RX_FDDRC_THRD_2_1 +96 0x2000 //RX_FDDRC_THRD_2_2 +97 0x5000 //RX_FDDRC_THRD_2_3 +98 0x6400 //RX_FDDRC_THRD_3_0 +99 0x6400 //RX_FDDRC_THRD_3_1 +100 0x2000 //RX_FDDRC_THRD_3_2 +101 0x5000 //RX_FDDRC_THRD_3_3 +102 0x4000 //RX_FDDRC_SLANT_0_0 +103 0x4000 //RX_FDDRC_SLANT_0_1 +104 0x4000 //RX_FDDRC_SLANT_0_2 +105 0x4000 //RX_FDDRC_SLANT_0_3 +106 0x7FFF //RX_FDDRC_SLANT_1_0 +107 0x7FFF //RX_FDDRC_SLANT_1_1 +108 0x7FFF //RX_FDDRC_SLANT_1_2 +109 0x7FFF //RX_FDDRC_SLANT_1_3 +110 0x0000 //RX_FDDRC_RESRV_0 +129 0x001D //RX_SPK_VOL +130 0x0000 //RX_VOL_RESRV_0 +#VOL 2 +6 0x6000 //RX_TDDRC_ALPHA_UP_1 +7 0x6000 //RX_TDDRC_ALPHA_UP_2 +8 0x6000 //RX_TDDRC_ALPHA_UP_3 +9 0x1000 //RX_TDDRC_ALPHA_UP_4 +27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +33 0x7214 //RX_TDDRC_LIMITER_THRD +34 0x0800 //RX_TDDRC_LIMITER_GAIN +112 0x0002 //RX_TDDRC_THRD_0 +113 0x0004 //RX_TDDRC_THRD_1 +114 0x1A00 //RX_TDDRC_THRD_2 +115 0x1A00 //RX_TDDRC_THRD_3 +116 0x7EB8 //RX_TDDRC_SLANT_0 +117 0x2500 //RX_TDDRC_SLANT_1 +118 0x6000 //RX_TDDRC_ALPHA_UP_0 +119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +120 0x0000 //RX_TDDRC_HMNC_FLAG +121 0x199A //RX_TDDRC_HMNC_GAIN +122 0x0001 //RX_TDDRC_SMT_FLAG +123 0x0CCD //RX_TDDRC_SMT_W +124 0x032A //RX_TDDRC_DRC_GAIN +38 0x0020 //RX_FDEQ_SUBNUM +39 0x4848 //RX_FDEQ_GAIN_0 +40 0x3B3B //RX_FDEQ_GAIN_1 +41 0x3942 //RX_FDEQ_GAIN_2 +42 0x4645 //RX_FDEQ_GAIN_3 +43 0x494A //RX_FDEQ_GAIN_4 +44 0x5D5A //RX_FDEQ_GAIN_5 +45 0x5B5B //RX_FDEQ_GAIN_6 +46 0x5A51 //RX_FDEQ_GAIN_7 +47 0x514F //RX_FDEQ_GAIN_8 +48 0x5568 //RX_FDEQ_GAIN_9 +49 0x7460 //RX_FDEQ_GAIN_10 +50 0x544E //RX_FDEQ_GAIN_11 +51 0x4848 //RX_FDEQ_GAIN_12 +52 0x484A //RX_FDEQ_GAIN_13 +53 0x5155 //RX_FDEQ_GAIN_14 +54 0x577B //RX_FDEQ_GAIN_15 +55 0x4848 //RX_FDEQ_GAIN_16 +56 0x4848 //RX_FDEQ_GAIN_17 +57 0x4848 //RX_FDEQ_GAIN_18 +58 0x4848 //RX_FDEQ_GAIN_19 +59 0x4848 //RX_FDEQ_GAIN_20 +60 0x4848 //RX_FDEQ_GAIN_21 +61 0x4848 //RX_FDEQ_GAIN_22 +62 0x4848 //RX_FDEQ_GAIN_23 +63 0x0202 //RX_FDEQ_BIN_0 +64 0x0203 //RX_FDEQ_BIN_1 +65 0x0303 //RX_FDEQ_BIN_2 +66 0x0304 //RX_FDEQ_BIN_3 +67 0x0404 //RX_FDEQ_BIN_4 +68 0x0308 //RX_FDEQ_BIN_5 +69 0x0808 //RX_FDEQ_BIN_6 +70 0x090A //RX_FDEQ_BIN_7 +71 0x0B0C //RX_FDEQ_BIN_8 +72 0x0D0E //RX_FDEQ_BIN_9 +73 0x1013 //RX_FDEQ_BIN_10 +74 0x1719 //RX_FDEQ_BIN_11 +75 0x1B1E //RX_FDEQ_BIN_12 +76 0x1E1E //RX_FDEQ_BIN_13 +77 0x1E28 //RX_FDEQ_BIN_14 +78 0x282C //RX_FDEQ_BIN_15 +79 0x0000 //RX_FDEQ_BIN_16 +80 0x0000 //RX_FDEQ_BIN_17 +81 0x0000 //RX_FDEQ_BIN_18 +82 0x0000 //RX_FDEQ_BIN_19 +83 0x0000 //RX_FDEQ_BIN_20 +84 0x0000 //RX_FDEQ_BIN_21 +85 0x0000 //RX_FDEQ_BIN_22 +86 0x0000 //RX_FDEQ_BIN_23 +87 0x4000 //RX_FDEQ_RESRV_0 +88 0x0320 //RX_FDEQ_RESRV_1 +89 0x0018 //RX_FDDRC_BAND_MARGIN_0 +90 0x0035 //RX_FDDRC_BAND_MARGIN_1 +91 0x00D5 //RX_FDDRC_BAND_MARGIN_2 +92 0x0120 //RX_FDDRC_BAND_MARGIN_3 +93 0x0004 //RX_FDDRC_BLOCK_EXP +94 0x5000 //RX_FDDRC_THRD_2_0 +95 0x5000 //RX_FDDRC_THRD_2_1 +96 0x2000 //RX_FDDRC_THRD_2_2 +97 0x5000 //RX_FDDRC_THRD_2_3 +98 0x6400 //RX_FDDRC_THRD_3_0 +99 0x6400 //RX_FDDRC_THRD_3_1 +100 0x2000 //RX_FDDRC_THRD_3_2 +101 0x5000 //RX_FDDRC_THRD_3_3 +102 0x4000 //RX_FDDRC_SLANT_0_0 +103 0x4000 //RX_FDDRC_SLANT_0_1 +104 0x4000 //RX_FDDRC_SLANT_0_2 +105 0x4000 //RX_FDDRC_SLANT_0_3 +106 0x7FFF //RX_FDDRC_SLANT_1_0 +107 0x7FFF //RX_FDDRC_SLANT_1_1 +108 0x7FFF //RX_FDDRC_SLANT_1_2 +109 0x7FFF //RX_FDDRC_SLANT_1_3 +110 0x0000 //RX_FDDRC_RESRV_0 +129 0x0029 //RX_SPK_VOL +130 0x0000 //RX_VOL_RESRV_0 +#VOL 3 +6 0x6000 //RX_TDDRC_ALPHA_UP_1 +7 0x6000 //RX_TDDRC_ALPHA_UP_2 +8 0x6000 //RX_TDDRC_ALPHA_UP_3 +9 0x1000 //RX_TDDRC_ALPHA_UP_4 +27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +33 0x7214 //RX_TDDRC_LIMITER_THRD +34 0x0800 //RX_TDDRC_LIMITER_GAIN +112 0x0002 //RX_TDDRC_THRD_0 +113 0x0004 //RX_TDDRC_THRD_1 +114 0x1A00 //RX_TDDRC_THRD_2 +115 0x1A00 //RX_TDDRC_THRD_3 +116 0x7EB8 //RX_TDDRC_SLANT_0 +117 0x2500 //RX_TDDRC_SLANT_1 +118 0x6000 //RX_TDDRC_ALPHA_UP_0 +119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +120 0x0000 //RX_TDDRC_HMNC_FLAG +121 0x199A //RX_TDDRC_HMNC_GAIN +122 0x0001 //RX_TDDRC_SMT_FLAG +123 0x0CCD //RX_TDDRC_SMT_W +124 0x032A //RX_TDDRC_DRC_GAIN +38 0x0020 //RX_FDEQ_SUBNUM +39 0x4848 //RX_FDEQ_GAIN_0 +40 0x3B3B //RX_FDEQ_GAIN_1 +41 0x3942 //RX_FDEQ_GAIN_2 +42 0x4645 //RX_FDEQ_GAIN_3 +43 0x494A //RX_FDEQ_GAIN_4 +44 0x5D5A //RX_FDEQ_GAIN_5 +45 0x5B5B //RX_FDEQ_GAIN_6 +46 0x5A51 //RX_FDEQ_GAIN_7 +47 0x514F //RX_FDEQ_GAIN_8 +48 0x5568 //RX_FDEQ_GAIN_9 +49 0x7460 //RX_FDEQ_GAIN_10 +50 0x544E //RX_FDEQ_GAIN_11 +51 0x4848 //RX_FDEQ_GAIN_12 +52 0x484A //RX_FDEQ_GAIN_13 +53 0x5155 //RX_FDEQ_GAIN_14 +54 0x577B //RX_FDEQ_GAIN_15 +55 0x4848 //RX_FDEQ_GAIN_16 +56 0x4848 //RX_FDEQ_GAIN_17 +57 0x4848 //RX_FDEQ_GAIN_18 +58 0x4848 //RX_FDEQ_GAIN_19 +59 0x4848 //RX_FDEQ_GAIN_20 +60 0x4848 //RX_FDEQ_GAIN_21 +61 0x4848 //RX_FDEQ_GAIN_22 +62 0x4848 //RX_FDEQ_GAIN_23 +63 0x0202 //RX_FDEQ_BIN_0 +64 0x0203 //RX_FDEQ_BIN_1 +65 0x0303 //RX_FDEQ_BIN_2 +66 0x0304 //RX_FDEQ_BIN_3 +67 0x0404 //RX_FDEQ_BIN_4 +68 0x0308 //RX_FDEQ_BIN_5 +69 0x0808 //RX_FDEQ_BIN_6 +70 0x090A //RX_FDEQ_BIN_7 +71 0x0B0C //RX_FDEQ_BIN_8 +72 0x0D0E //RX_FDEQ_BIN_9 +73 0x1013 //RX_FDEQ_BIN_10 +74 0x1719 //RX_FDEQ_BIN_11 +75 0x1B1E //RX_FDEQ_BIN_12 +76 0x1E1E //RX_FDEQ_BIN_13 +77 0x1E28 //RX_FDEQ_BIN_14 +78 0x282C //RX_FDEQ_BIN_15 +79 0x0000 //RX_FDEQ_BIN_16 +80 0x0000 //RX_FDEQ_BIN_17 +81 0x0000 //RX_FDEQ_BIN_18 +82 0x0000 //RX_FDEQ_BIN_19 +83 0x0000 //RX_FDEQ_BIN_20 +84 0x0000 //RX_FDEQ_BIN_21 +85 0x0000 //RX_FDEQ_BIN_22 +86 0x0000 //RX_FDEQ_BIN_23 +87 0x4000 //RX_FDEQ_RESRV_0 +88 0x0320 //RX_FDEQ_RESRV_1 +89 0x0018 //RX_FDDRC_BAND_MARGIN_0 +90 0x0035 //RX_FDDRC_BAND_MARGIN_1 +91 0x00D5 //RX_FDDRC_BAND_MARGIN_2 +92 0x0120 //RX_FDDRC_BAND_MARGIN_3 +93 0x0004 //RX_FDDRC_BLOCK_EXP +94 0x5000 //RX_FDDRC_THRD_2_0 +95 0x5000 //RX_FDDRC_THRD_2_1 +96 0x2000 //RX_FDDRC_THRD_2_2 +97 0x5000 //RX_FDDRC_THRD_2_3 +98 0x6400 //RX_FDDRC_THRD_3_0 +99 0x6400 //RX_FDDRC_THRD_3_1 +100 0x2000 //RX_FDDRC_THRD_3_2 +101 0x5000 //RX_FDDRC_THRD_3_3 +102 0x4000 //RX_FDDRC_SLANT_0_0 +103 0x4000 //RX_FDDRC_SLANT_0_1 +104 0x4000 //RX_FDDRC_SLANT_0_2 +105 0x4000 //RX_FDDRC_SLANT_0_3 +106 0x7FFF //RX_FDDRC_SLANT_1_0 +107 0x7FFF //RX_FDDRC_SLANT_1_1 +108 0x7FFF //RX_FDDRC_SLANT_1_2 +109 0x7FFF //RX_FDDRC_SLANT_1_3 +110 0x0000 //RX_FDDRC_RESRV_0 +129 0x0039 //RX_SPK_VOL +130 0x0000 //RX_VOL_RESRV_0 +#VOL 4 +6 0x6000 //RX_TDDRC_ALPHA_UP_1 +7 0x6000 //RX_TDDRC_ALPHA_UP_2 +8 0x6000 //RX_TDDRC_ALPHA_UP_3 +9 0x1000 //RX_TDDRC_ALPHA_UP_4 +27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +33 0x7214 //RX_TDDRC_LIMITER_THRD +34 0x0800 //RX_TDDRC_LIMITER_GAIN +112 0x0002 //RX_TDDRC_THRD_0 +113 0x0004 //RX_TDDRC_THRD_1 +114 0x1A00 //RX_TDDRC_THRD_2 +115 0x1A00 //RX_TDDRC_THRD_3 +116 0x7EB8 //RX_TDDRC_SLANT_0 +117 0x2500 //RX_TDDRC_SLANT_1 +118 0x6000 //RX_TDDRC_ALPHA_UP_0 +119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +120 0x0000 //RX_TDDRC_HMNC_FLAG +121 0x199A //RX_TDDRC_HMNC_GAIN +122 0x0001 //RX_TDDRC_SMT_FLAG +123 0x0CCD //RX_TDDRC_SMT_W +124 0x032A //RX_TDDRC_DRC_GAIN +38 0x0020 //RX_FDEQ_SUBNUM +39 0x4848 //RX_FDEQ_GAIN_0 +40 0x3B3B //RX_FDEQ_GAIN_1 +41 0x3942 //RX_FDEQ_GAIN_2 +42 0x4645 //RX_FDEQ_GAIN_3 +43 0x494A //RX_FDEQ_GAIN_4 +44 0x5D5A //RX_FDEQ_GAIN_5 +45 0x5B5B //RX_FDEQ_GAIN_6 +46 0x5A51 //RX_FDEQ_GAIN_7 +47 0x514F //RX_FDEQ_GAIN_8 +48 0x5568 //RX_FDEQ_GAIN_9 +49 0x7460 //RX_FDEQ_GAIN_10 +50 0x544E //RX_FDEQ_GAIN_11 +51 0x4848 //RX_FDEQ_GAIN_12 +52 0x484A //RX_FDEQ_GAIN_13 +53 0x5155 //RX_FDEQ_GAIN_14 +54 0x577B //RX_FDEQ_GAIN_15 +55 0x4848 //RX_FDEQ_GAIN_16 +56 0x4848 //RX_FDEQ_GAIN_17 +57 0x4848 //RX_FDEQ_GAIN_18 +58 0x4848 //RX_FDEQ_GAIN_19 +59 0x4848 //RX_FDEQ_GAIN_20 +60 0x4848 //RX_FDEQ_GAIN_21 +61 0x4848 //RX_FDEQ_GAIN_22 +62 0x4848 //RX_FDEQ_GAIN_23 +63 0x0202 //RX_FDEQ_BIN_0 +64 0x0203 //RX_FDEQ_BIN_1 +65 0x0303 //RX_FDEQ_BIN_2 +66 0x0304 //RX_FDEQ_BIN_3 +67 0x0404 //RX_FDEQ_BIN_4 +68 0x0308 //RX_FDEQ_BIN_5 +69 0x0808 //RX_FDEQ_BIN_6 +70 0x090A //RX_FDEQ_BIN_7 +71 0x0B0C //RX_FDEQ_BIN_8 +72 0x0D0E //RX_FDEQ_BIN_9 +73 0x1013 //RX_FDEQ_BIN_10 +74 0x1719 //RX_FDEQ_BIN_11 +75 0x1B1E //RX_FDEQ_BIN_12 +76 0x1E1E //RX_FDEQ_BIN_13 +77 0x1E28 //RX_FDEQ_BIN_14 +78 0x282C //RX_FDEQ_BIN_15 +79 0x0000 //RX_FDEQ_BIN_16 +80 0x0000 //RX_FDEQ_BIN_17 +81 0x0000 //RX_FDEQ_BIN_18 +82 0x0000 //RX_FDEQ_BIN_19 +83 0x0000 //RX_FDEQ_BIN_20 +84 0x0000 //RX_FDEQ_BIN_21 +85 0x0000 //RX_FDEQ_BIN_22 +86 0x0000 //RX_FDEQ_BIN_23 +87 0x4000 //RX_FDEQ_RESRV_0 +88 0x0320 //RX_FDEQ_RESRV_1 +89 0x0018 //RX_FDDRC_BAND_MARGIN_0 +90 0x0035 //RX_FDDRC_BAND_MARGIN_1 +91 0x00D5 //RX_FDDRC_BAND_MARGIN_2 +92 0x0120 //RX_FDDRC_BAND_MARGIN_3 +93 0x0004 //RX_FDDRC_BLOCK_EXP +94 0x5000 //RX_FDDRC_THRD_2_0 +95 0x5000 //RX_FDDRC_THRD_2_1 +96 0x2000 //RX_FDDRC_THRD_2_2 +97 0x5000 //RX_FDDRC_THRD_2_3 +98 0x6400 //RX_FDDRC_THRD_3_0 +99 0x6400 //RX_FDDRC_THRD_3_1 +100 0x2000 //RX_FDDRC_THRD_3_2 +101 0x5000 //RX_FDDRC_THRD_3_3 +102 0x4000 //RX_FDDRC_SLANT_0_0 +103 0x4000 //RX_FDDRC_SLANT_0_1 +104 0x4000 //RX_FDDRC_SLANT_0_2 +105 0x4000 //RX_FDDRC_SLANT_0_3 +106 0x7FFF //RX_FDDRC_SLANT_1_0 +107 0x7FFF //RX_FDDRC_SLANT_1_1 +108 0x7FFF //RX_FDDRC_SLANT_1_2 +109 0x7FFF //RX_FDDRC_SLANT_1_3 +110 0x0000 //RX_FDDRC_RESRV_0 +129 0x005F //RX_SPK_VOL +130 0x0000 //RX_VOL_RESRV_0 +#VOL 5 +6 0x6000 //RX_TDDRC_ALPHA_UP_1 +7 0x6000 //RX_TDDRC_ALPHA_UP_2 +8 0x6000 //RX_TDDRC_ALPHA_UP_3 +9 0x1000 //RX_TDDRC_ALPHA_UP_4 +27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +33 0x7214 //RX_TDDRC_LIMITER_THRD +34 0x0800 //RX_TDDRC_LIMITER_GAIN +112 0x0002 //RX_TDDRC_THRD_0 +113 0x0004 //RX_TDDRC_THRD_1 +114 0x1A00 //RX_TDDRC_THRD_2 +115 0x1A00 //RX_TDDRC_THRD_3 +116 0x7EB8 //RX_TDDRC_SLANT_0 +117 0x2500 //RX_TDDRC_SLANT_1 +118 0x6000 //RX_TDDRC_ALPHA_UP_0 +119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +120 0x0000 //RX_TDDRC_HMNC_FLAG +121 0x199A //RX_TDDRC_HMNC_GAIN +122 0x0001 //RX_TDDRC_SMT_FLAG +123 0x0CCD //RX_TDDRC_SMT_W +124 0x032A //RX_TDDRC_DRC_GAIN +38 0x0020 //RX_FDEQ_SUBNUM +39 0x4848 //RX_FDEQ_GAIN_0 +40 0x3B3B //RX_FDEQ_GAIN_1 +41 0x3942 //RX_FDEQ_GAIN_2 +42 0x4645 //RX_FDEQ_GAIN_3 +43 0x494A //RX_FDEQ_GAIN_4 +44 0x5D5A //RX_FDEQ_GAIN_5 +45 0x5B5B //RX_FDEQ_GAIN_6 +46 0x5A51 //RX_FDEQ_GAIN_7 +47 0x514F //RX_FDEQ_GAIN_8 +48 0x5568 //RX_FDEQ_GAIN_9 +49 0x7460 //RX_FDEQ_GAIN_10 +50 0x544E //RX_FDEQ_GAIN_11 +51 0x4848 //RX_FDEQ_GAIN_12 +52 0x484A //RX_FDEQ_GAIN_13 +53 0x5155 //RX_FDEQ_GAIN_14 +54 0x577B //RX_FDEQ_GAIN_15 +55 0x4848 //RX_FDEQ_GAIN_16 +56 0x4848 //RX_FDEQ_GAIN_17 +57 0x4848 //RX_FDEQ_GAIN_18 +58 0x4848 //RX_FDEQ_GAIN_19 +59 0x4848 //RX_FDEQ_GAIN_20 +60 0x4848 //RX_FDEQ_GAIN_21 +61 0x4848 //RX_FDEQ_GAIN_22 +62 0x4848 //RX_FDEQ_GAIN_23 +63 0x0202 //RX_FDEQ_BIN_0 +64 0x0203 //RX_FDEQ_BIN_1 +65 0x0303 //RX_FDEQ_BIN_2 +66 0x0304 //RX_FDEQ_BIN_3 +67 0x0404 //RX_FDEQ_BIN_4 +68 0x0308 //RX_FDEQ_BIN_5 +69 0x0808 //RX_FDEQ_BIN_6 +70 0x090A //RX_FDEQ_BIN_7 +71 0x0B0C //RX_FDEQ_BIN_8 +72 0x0D0E //RX_FDEQ_BIN_9 +73 0x1013 //RX_FDEQ_BIN_10 +74 0x1719 //RX_FDEQ_BIN_11 +75 0x1B1E //RX_FDEQ_BIN_12 +76 0x1E1E //RX_FDEQ_BIN_13 +77 0x1E28 //RX_FDEQ_BIN_14 +78 0x282C //RX_FDEQ_BIN_15 +79 0x0000 //RX_FDEQ_BIN_16 +80 0x0000 //RX_FDEQ_BIN_17 +81 0x0000 //RX_FDEQ_BIN_18 +82 0x0000 //RX_FDEQ_BIN_19 +83 0x0000 //RX_FDEQ_BIN_20 +84 0x0000 //RX_FDEQ_BIN_21 +85 0x0000 //RX_FDEQ_BIN_22 +86 0x0000 //RX_FDEQ_BIN_23 +87 0x4000 //RX_FDEQ_RESRV_0 +88 0x0320 //RX_FDEQ_RESRV_1 +89 0x0018 //RX_FDDRC_BAND_MARGIN_0 +90 0x0035 //RX_FDDRC_BAND_MARGIN_1 +91 0x00D5 //RX_FDDRC_BAND_MARGIN_2 +92 0x0120 //RX_FDDRC_BAND_MARGIN_3 +93 0x0004 //RX_FDDRC_BLOCK_EXP +94 0x5000 //RX_FDDRC_THRD_2_0 +95 0x5000 //RX_FDDRC_THRD_2_1 +96 0x2000 //RX_FDDRC_THRD_2_2 +97 0x5000 //RX_FDDRC_THRD_2_3 +98 0x6400 //RX_FDDRC_THRD_3_0 +99 0x6400 //RX_FDDRC_THRD_3_1 +100 0x2000 //RX_FDDRC_THRD_3_2 +101 0x5000 //RX_FDDRC_THRD_3_3 +102 0x4000 //RX_FDDRC_SLANT_0_0 +103 0x4000 //RX_FDDRC_SLANT_0_1 +104 0x4000 //RX_FDDRC_SLANT_0_2 +105 0x4000 //RX_FDDRC_SLANT_0_3 +106 0x7FFF //RX_FDDRC_SLANT_1_0 +107 0x7FFF //RX_FDDRC_SLANT_1_1 +108 0x7FFF //RX_FDDRC_SLANT_1_2 +109 0x7FFF //RX_FDDRC_SLANT_1_3 +110 0x0000 //RX_FDDRC_RESRV_0 +129 0x008E //RX_SPK_VOL +130 0x0000 //RX_VOL_RESRV_0 +#VOL 6 +6 0x6000 //RX_TDDRC_ALPHA_UP_1 +7 0x6000 //RX_TDDRC_ALPHA_UP_2 +8 0x6000 //RX_TDDRC_ALPHA_UP_3 +9 0x1000 //RX_TDDRC_ALPHA_UP_4 +27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +33 0x7214 //RX_TDDRC_LIMITER_THRD +34 0x0800 //RX_TDDRC_LIMITER_GAIN +112 0x0002 //RX_TDDRC_THRD_0 +113 0x0004 //RX_TDDRC_THRD_1 +114 0x1A00 //RX_TDDRC_THRD_2 +115 0x1A00 //RX_TDDRC_THRD_3 +116 0x7EB8 //RX_TDDRC_SLANT_0 +117 0x2500 //RX_TDDRC_SLANT_1 +118 0x6000 //RX_TDDRC_ALPHA_UP_0 +119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +120 0x0000 //RX_TDDRC_HMNC_FLAG +121 0x199A //RX_TDDRC_HMNC_GAIN +122 0x0001 //RX_TDDRC_SMT_FLAG +123 0x0CCD //RX_TDDRC_SMT_W +124 0x032A //RX_TDDRC_DRC_GAIN +38 0x0020 //RX_FDEQ_SUBNUM +39 0x4848 //RX_FDEQ_GAIN_0 +40 0x3B3B //RX_FDEQ_GAIN_1 +41 0x3942 //RX_FDEQ_GAIN_2 +42 0x4645 //RX_FDEQ_GAIN_3 +43 0x494A //RX_FDEQ_GAIN_4 +44 0x5D5A //RX_FDEQ_GAIN_5 +45 0x5B5B //RX_FDEQ_GAIN_6 +46 0x5A51 //RX_FDEQ_GAIN_7 +47 0x514F //RX_FDEQ_GAIN_8 +48 0x5568 //RX_FDEQ_GAIN_9 +49 0x7460 //RX_FDEQ_GAIN_10 +50 0x544E //RX_FDEQ_GAIN_11 +51 0x4848 //RX_FDEQ_GAIN_12 +52 0x484A //RX_FDEQ_GAIN_13 +53 0x5155 //RX_FDEQ_GAIN_14 +54 0x577B //RX_FDEQ_GAIN_15 +55 0x4848 //RX_FDEQ_GAIN_16 +56 0x4848 //RX_FDEQ_GAIN_17 +57 0x4848 //RX_FDEQ_GAIN_18 +58 0x4848 //RX_FDEQ_GAIN_19 +59 0x4848 //RX_FDEQ_GAIN_20 +60 0x4848 //RX_FDEQ_GAIN_21 +61 0x4848 //RX_FDEQ_GAIN_22 +62 0x4848 //RX_FDEQ_GAIN_23 +63 0x0202 //RX_FDEQ_BIN_0 +64 0x0203 //RX_FDEQ_BIN_1 +65 0x0303 //RX_FDEQ_BIN_2 +66 0x0304 //RX_FDEQ_BIN_3 +67 0x0404 //RX_FDEQ_BIN_4 +68 0x0308 //RX_FDEQ_BIN_5 +69 0x0808 //RX_FDEQ_BIN_6 +70 0x090A //RX_FDEQ_BIN_7 +71 0x0B0C //RX_FDEQ_BIN_8 +72 0x0D0E //RX_FDEQ_BIN_9 +73 0x1013 //RX_FDEQ_BIN_10 +74 0x1719 //RX_FDEQ_BIN_11 +75 0x1B1E //RX_FDEQ_BIN_12 +76 0x1E1E //RX_FDEQ_BIN_13 +77 0x1E28 //RX_FDEQ_BIN_14 +78 0x282C //RX_FDEQ_BIN_15 +79 0x0000 //RX_FDEQ_BIN_16 +80 0x0000 //RX_FDEQ_BIN_17 +81 0x0000 //RX_FDEQ_BIN_18 +82 0x0000 //RX_FDEQ_BIN_19 +83 0x0000 //RX_FDEQ_BIN_20 +84 0x0000 //RX_FDEQ_BIN_21 +85 0x0000 //RX_FDEQ_BIN_22 +86 0x0000 //RX_FDEQ_BIN_23 +87 0x4000 //RX_FDEQ_RESRV_0 +88 0x0320 //RX_FDEQ_RESRV_1 +89 0x0018 //RX_FDDRC_BAND_MARGIN_0 +90 0x0035 //RX_FDDRC_BAND_MARGIN_1 +91 0x00D5 //RX_FDDRC_BAND_MARGIN_2 +92 0x0120 //RX_FDDRC_BAND_MARGIN_3 +93 0x0004 //RX_FDDRC_BLOCK_EXP +94 0x5000 //RX_FDDRC_THRD_2_0 +95 0x5000 //RX_FDDRC_THRD_2_1 +96 0x2000 //RX_FDDRC_THRD_2_2 +97 0x5000 //RX_FDDRC_THRD_2_3 +98 0x6400 //RX_FDDRC_THRD_3_0 +99 0x6400 //RX_FDDRC_THRD_3_1 +100 0x2000 //RX_FDDRC_THRD_3_2 +101 0x5000 //RX_FDDRC_THRD_3_3 +102 0x4000 //RX_FDDRC_SLANT_0_0 +103 0x4000 //RX_FDDRC_SLANT_0_1 +104 0x4000 //RX_FDDRC_SLANT_0_2 +105 0x4000 //RX_FDDRC_SLANT_0_3 +106 0x7FFF //RX_FDDRC_SLANT_1_0 +107 0x7FFF //RX_FDDRC_SLANT_1_1 +108 0x7FFF //RX_FDDRC_SLANT_1_2 +109 0x7FFF //RX_FDDRC_SLANT_1_3 +110 0x0000 //RX_FDDRC_RESRV_0 +129 0x0100 //RX_SPK_VOL +130 0x0000 //RX_VOL_RESRV_0 +#RX 2 +157 0x027C //RX_RECVFUNC_MODE_0 +158 0x0000 //RX_RECVFUNC_MODE_1 +159 0x0003 //RX_SAMPLINGFREQ_SIG +160 0x0003 //RX_SAMPLINGFREQ_PROC +161 0x000A //RX_FRAME_SZ +162 0x0000 //RX_DELAY_OPT +163 0x6000 //RX_TDDRC_ALPHA_UP_1 +164 0x6000 //RX_TDDRC_ALPHA_UP_2 +165 0x6000 //RX_TDDRC_ALPHA_UP_3 +166 0x1000 //RX_TDDRC_ALPHA_UP_4 +167 0x0800 //RX_PGA +168 0x7652 //RX_A_HP +169 0x4000 //RX_B_PE +170 0x7800 //RX_THR_PITCH_DET_0 +171 0x7000 //RX_THR_PITCH_DET_1 +172 0x6000 //RX_THR_PITCH_DET_2 +173 0x0008 //RX_PITCH_BFR_LEN +174 0x0003 //RX_SBD_PITCH_DET +175 0x0100 //RX_PP_RESRV_0 +176 0x0020 //RX_PP_RESRV_1 +177 0x0400 //RX_N_SN_EST +178 0x000C //RX_N2_SN_EST +179 0x0010 //RX_NS_LVL_CTRL +180 0xF800 //RX_THR_SN_EST +181 0x7E00 //RX_LAMBDA_PFILT +182 0x000A //RX_FENS_RESRV_0 +183 0x0190 //RX_FENS_RESRV_1 +184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +187 0x0002 //RX_EXTRA_NS_L +188 0x0800 //RX_EXTRA_NS_A +189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +190 0x7214 //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +192 0x199A //RX_A_POST_FLT +193 0x0000 //RX_LMT_THRD +194 0x4000 //RX_LMT_ALPHA +195 0x0020 //RX_FDEQ_SUBNUM +196 0x4848 //RX_FDEQ_GAIN_0 +197 0x4848 //RX_FDEQ_GAIN_1 +198 0x4848 //RX_FDEQ_GAIN_2 +199 0x4848 //RX_FDEQ_GAIN_3 +200 0x4848 //RX_FDEQ_GAIN_4 +201 0x4848 //RX_FDEQ_GAIN_5 +202 0x4850 //RX_FDEQ_GAIN_6 +203 0x4848 //RX_FDEQ_GAIN_7 +204 0x4860 //RX_FDEQ_GAIN_8 +205 0x7468 //RX_FDEQ_GAIN_9 +206 0x6060 //RX_FDEQ_GAIN_10 +207 0x6060 //RX_FDEQ_GAIN_11 +208 0x5C54 //RX_FDEQ_GAIN_12 +209 0x5450 //RX_FDEQ_GAIN_13 +210 0x5050 //RX_FDEQ_GAIN_14 +211 0x5860 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0202 //RX_FDEQ_BIN_0 +221 0x0203 //RX_FDEQ_BIN_1 +222 0x0303 //RX_FDEQ_BIN_2 +223 0x0304 //RX_FDEQ_BIN_3 +224 0x0404 //RX_FDEQ_BIN_4 +225 0x0308 //RX_FDEQ_BIN_5 +226 0x0808 //RX_FDEQ_BIN_6 +227 0x090A //RX_FDEQ_BIN_7 +228 0x0B0C //RX_FDEQ_BIN_8 +229 0x0D0E //RX_FDEQ_BIN_9 +230 0x1013 //RX_FDEQ_BIN_10 +231 0x1719 //RX_FDEQ_BIN_11 +232 0x1B1E //RX_FDEQ_BIN_12 +233 0x1E1E //RX_FDEQ_BIN_13 +234 0x1E28 //RX_FDEQ_BIN_14 +235 0x282C //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x4000 //RX_FDEQ_RESRV_0 +245 0x0320 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0035 //RX_FDDRC_BAND_MARGIN_1 +248 0x00D5 //RX_FDDRC_BAND_MARGIN_2 +249 0x0120 //RX_FDDRC_BAND_MARGIN_3 +250 0x0004 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x2000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x2000 //RX_FDDRC_THRD_3_2 +258 0x5000 //RX_FDDRC_THRD_3_3 +259 0x4000 //RX_FDDRC_SLANT_0_0 +260 0x4000 //RX_FDDRC_SLANT_0_1 +261 0x4000 //RX_FDDRC_SLANT_0_2 +262 0x4000 //RX_FDDRC_SLANT_0_3 +263 0x7FFF //RX_FDDRC_SLANT_1_0 +264 0x7FFF //RX_FDDRC_SLANT_1_1 +265 0x7FFF //RX_FDDRC_SLANT_1_2 +266 0x7FFF //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +268 0x0002 //RX_FILTINDX +269 0x0002 //RX_TDDRC_THRD_0 +270 0x0004 //RX_TDDRC_THRD_1 +271 0x1A00 //RX_TDDRC_THRD_2 +272 0x1A00 //RX_TDDRC_THRD_3 +273 0x7EB8 //RX_TDDRC_SLANT_0 +274 0x2500 //RX_TDDRC_SLANT_1 +275 0x6000 //RX_TDDRC_ALPHA_UP_0 +276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x199A //RX_TDDRC_HMNC_GAIN +279 0x0001 //RX_TDDRC_SMT_FLAG +280 0x0CCD //RX_TDDRC_SMT_W +281 0x0550 //RX_TDDRC_DRC_GAIN +282 0x7C00 //RX_LAMBDA_PKA_FP +283 0x2000 //RX_TPKA_FP +284 0x2000 //RX_MIN_G_FP +285 0x0080 //RX_MAX_G_FP +286 0x0014 //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 +288 0x0000 //RX_MAXLEVEL_CNG +289 0x3000 //RX_BWE_UV_TH +290 0x3000 //RX_BWE_UV_TH2 +291 0x1800 //RX_BWE_UV_TH3 +292 0x1000 //RX_BWE_V_TH +293 0x04CD //RX_BWE_GAIN1_V_TH1 +294 0x0F33 //RX_BWE_GAIN1_V_TH2 +295 0x7333 //RX_BWE_UV_EQ +296 0x199A //RX_BWE_V_EQ +297 0x7333 //RX_BWE_TONE_TH +298 0x0004 //RX_BWE_UV_HOLD_T +299 0x6CCD //RX_BWE_GAIN2_ALPHA +300 0x799A //RX_BWE_GAIN3_ALPHA +301 0x001E //RX_BWE_CUTOFF +302 0x3000 //RX_BWE_GAINFILL +303 0x3200 //RX_BWE_MAXTH_TONE +304 0x2000 //RX_BWE_EQ_0 +305 0x2000 //RX_BWE_EQ_1 +306 0x2000 //RX_BWE_EQ_2 +307 0x2000 //RX_BWE_EQ_3 +308 0x2000 //RX_BWE_EQ_4 +309 0x2000 //RX_BWE_EQ_5 +310 0x2000 //RX_BWE_EQ_6 +311 0x0000 //RX_BWE_RESRV_0 +312 0x0000 //RX_BWE_RESRV_1 +313 0x0000 //RX_BWE_RESRV_2 +#VOL 0 +163 0x6000 //RX_TDDRC_ALPHA_UP_1 +164 0x6000 //RX_TDDRC_ALPHA_UP_2 +165 0x6000 //RX_TDDRC_ALPHA_UP_3 +166 0x1000 //RX_TDDRC_ALPHA_UP_4 +184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +190 0x7214 //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +269 0x0002 //RX_TDDRC_THRD_0 +270 0x0004 //RX_TDDRC_THRD_1 +271 0x1A00 //RX_TDDRC_THRD_2 +272 0x1A00 //RX_TDDRC_THRD_3 +273 0x7EB8 //RX_TDDRC_SLANT_0 +274 0x2500 //RX_TDDRC_SLANT_1 +275 0x6000 //RX_TDDRC_ALPHA_UP_0 +276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x199A //RX_TDDRC_HMNC_GAIN +279 0x0001 //RX_TDDRC_SMT_FLAG +280 0x0CCD //RX_TDDRC_SMT_W +281 0x0550 //RX_TDDRC_DRC_GAIN +195 0x0020 //RX_FDEQ_SUBNUM +196 0x4848 //RX_FDEQ_GAIN_0 +197 0x4848 //RX_FDEQ_GAIN_1 +198 0x4848 //RX_FDEQ_GAIN_2 +199 0x4848 //RX_FDEQ_GAIN_3 +200 0x4848 //RX_FDEQ_GAIN_4 +201 0x4848 //RX_FDEQ_GAIN_5 +202 0x4850 //RX_FDEQ_GAIN_6 +203 0x4848 //RX_FDEQ_GAIN_7 +204 0x4860 //RX_FDEQ_GAIN_8 +205 0x7468 //RX_FDEQ_GAIN_9 +206 0x6060 //RX_FDEQ_GAIN_10 +207 0x6060 //RX_FDEQ_GAIN_11 +208 0x5C54 //RX_FDEQ_GAIN_12 +209 0x5450 //RX_FDEQ_GAIN_13 +210 0x5050 //RX_FDEQ_GAIN_14 +211 0x5860 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0202 //RX_FDEQ_BIN_0 +221 0x0203 //RX_FDEQ_BIN_1 +222 0x0303 //RX_FDEQ_BIN_2 +223 0x0304 //RX_FDEQ_BIN_3 +224 0x0404 //RX_FDEQ_BIN_4 +225 0x0308 //RX_FDEQ_BIN_5 +226 0x0808 //RX_FDEQ_BIN_6 +227 0x090A //RX_FDEQ_BIN_7 +228 0x0B0C //RX_FDEQ_BIN_8 +229 0x0D0E //RX_FDEQ_BIN_9 +230 0x1013 //RX_FDEQ_BIN_10 +231 0x1719 //RX_FDEQ_BIN_11 +232 0x1B1E //RX_FDEQ_BIN_12 +233 0x1E1E //RX_FDEQ_BIN_13 +234 0x1E28 //RX_FDEQ_BIN_14 +235 0x282C //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x4000 //RX_FDEQ_RESRV_0 +245 0x0320 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0035 //RX_FDDRC_BAND_MARGIN_1 +248 0x00D5 //RX_FDDRC_BAND_MARGIN_2 +249 0x0120 //RX_FDDRC_BAND_MARGIN_3 +250 0x0004 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x2000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x2000 //RX_FDDRC_THRD_3_2 +258 0x5000 //RX_FDDRC_THRD_3_3 +259 0x4000 //RX_FDDRC_SLANT_0_0 +260 0x4000 //RX_FDDRC_SLANT_0_1 +261 0x4000 //RX_FDDRC_SLANT_0_2 +262 0x4000 //RX_FDDRC_SLANT_0_3 +263 0x7FFF //RX_FDDRC_SLANT_1_0 +264 0x7FFF //RX_FDDRC_SLANT_1_1 +265 0x7FFF //RX_FDDRC_SLANT_1_2 +266 0x7FFF //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +286 0x0014 //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 +#VOL 1 +163 0x6000 //RX_TDDRC_ALPHA_UP_1 +164 0x6000 //RX_TDDRC_ALPHA_UP_2 +165 0x6000 //RX_TDDRC_ALPHA_UP_3 +166 0x1000 //RX_TDDRC_ALPHA_UP_4 +184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +190 0x7214 //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +269 0x0002 //RX_TDDRC_THRD_0 +270 0x0004 //RX_TDDRC_THRD_1 +271 0x1A00 //RX_TDDRC_THRD_2 +272 0x1A00 //RX_TDDRC_THRD_3 +273 0x7EB8 //RX_TDDRC_SLANT_0 +274 0x2500 //RX_TDDRC_SLANT_1 +275 0x6000 //RX_TDDRC_ALPHA_UP_0 +276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x199A //RX_TDDRC_HMNC_GAIN +279 0x0001 //RX_TDDRC_SMT_FLAG +280 0x0CCD //RX_TDDRC_SMT_W +281 0x0550 //RX_TDDRC_DRC_GAIN +195 0x0020 //RX_FDEQ_SUBNUM +196 0x4848 //RX_FDEQ_GAIN_0 +197 0x4848 //RX_FDEQ_GAIN_1 +198 0x4848 //RX_FDEQ_GAIN_2 +199 0x4848 //RX_FDEQ_GAIN_3 +200 0x4848 //RX_FDEQ_GAIN_4 +201 0x4848 //RX_FDEQ_GAIN_5 +202 0x4850 //RX_FDEQ_GAIN_6 +203 0x4848 //RX_FDEQ_GAIN_7 +204 0x4860 //RX_FDEQ_GAIN_8 +205 0x7468 //RX_FDEQ_GAIN_9 +206 0x6060 //RX_FDEQ_GAIN_10 +207 0x6060 //RX_FDEQ_GAIN_11 +208 0x5C54 //RX_FDEQ_GAIN_12 +209 0x5450 //RX_FDEQ_GAIN_13 +210 0x5050 //RX_FDEQ_GAIN_14 +211 0x5860 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0202 //RX_FDEQ_BIN_0 +221 0x0203 //RX_FDEQ_BIN_1 +222 0x0303 //RX_FDEQ_BIN_2 +223 0x0304 //RX_FDEQ_BIN_3 +224 0x0404 //RX_FDEQ_BIN_4 +225 0x0308 //RX_FDEQ_BIN_5 +226 0x0808 //RX_FDEQ_BIN_6 +227 0x090A //RX_FDEQ_BIN_7 +228 0x0B0C //RX_FDEQ_BIN_8 +229 0x0D0E //RX_FDEQ_BIN_9 +230 0x1013 //RX_FDEQ_BIN_10 +231 0x1719 //RX_FDEQ_BIN_11 +232 0x1B1E //RX_FDEQ_BIN_12 +233 0x1E1E //RX_FDEQ_BIN_13 +234 0x1E28 //RX_FDEQ_BIN_14 +235 0x282C //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x4000 //RX_FDEQ_RESRV_0 +245 0x0320 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0035 //RX_FDDRC_BAND_MARGIN_1 +248 0x00D5 //RX_FDDRC_BAND_MARGIN_2 +249 0x0120 //RX_FDDRC_BAND_MARGIN_3 +250 0x0004 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x2000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x2000 //RX_FDDRC_THRD_3_2 +258 0x5000 //RX_FDDRC_THRD_3_3 +259 0x4000 //RX_FDDRC_SLANT_0_0 +260 0x4000 //RX_FDDRC_SLANT_0_1 +261 0x4000 //RX_FDDRC_SLANT_0_2 +262 0x4000 //RX_FDDRC_SLANT_0_3 +263 0x7FFF //RX_FDDRC_SLANT_1_0 +264 0x7FFF //RX_FDDRC_SLANT_1_1 +265 0x7FFF //RX_FDDRC_SLANT_1_2 +266 0x7FFF //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +286 0x001D //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 +#VOL 2 +163 0x6000 //RX_TDDRC_ALPHA_UP_1 +164 0x6000 //RX_TDDRC_ALPHA_UP_2 +165 0x6000 //RX_TDDRC_ALPHA_UP_3 +166 0x1000 //RX_TDDRC_ALPHA_UP_4 +184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +190 0x7214 //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +269 0x0002 //RX_TDDRC_THRD_0 +270 0x0004 //RX_TDDRC_THRD_1 +271 0x1A00 //RX_TDDRC_THRD_2 +272 0x1A00 //RX_TDDRC_THRD_3 +273 0x7EB8 //RX_TDDRC_SLANT_0 +274 0x2500 //RX_TDDRC_SLANT_1 +275 0x6000 //RX_TDDRC_ALPHA_UP_0 +276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x199A //RX_TDDRC_HMNC_GAIN +279 0x0001 //RX_TDDRC_SMT_FLAG +280 0x0CCD //RX_TDDRC_SMT_W +281 0x0550 //RX_TDDRC_DRC_GAIN +195 0x0020 //RX_FDEQ_SUBNUM +196 0x4848 //RX_FDEQ_GAIN_0 +197 0x4848 //RX_FDEQ_GAIN_1 +198 0x4848 //RX_FDEQ_GAIN_2 +199 0x4848 //RX_FDEQ_GAIN_3 +200 0x4848 //RX_FDEQ_GAIN_4 +201 0x4848 //RX_FDEQ_GAIN_5 +202 0x4850 //RX_FDEQ_GAIN_6 +203 0x4848 //RX_FDEQ_GAIN_7 +204 0x4860 //RX_FDEQ_GAIN_8 +205 0x7468 //RX_FDEQ_GAIN_9 +206 0x6060 //RX_FDEQ_GAIN_10 +207 0x6060 //RX_FDEQ_GAIN_11 +208 0x5C54 //RX_FDEQ_GAIN_12 +209 0x5450 //RX_FDEQ_GAIN_13 +210 0x5050 //RX_FDEQ_GAIN_14 +211 0x5860 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0202 //RX_FDEQ_BIN_0 +221 0x0203 //RX_FDEQ_BIN_1 +222 0x0303 //RX_FDEQ_BIN_2 +223 0x0304 //RX_FDEQ_BIN_3 +224 0x0404 //RX_FDEQ_BIN_4 +225 0x0308 //RX_FDEQ_BIN_5 +226 0x0808 //RX_FDEQ_BIN_6 +227 0x090A //RX_FDEQ_BIN_7 +228 0x0B0C //RX_FDEQ_BIN_8 +229 0x0D0E //RX_FDEQ_BIN_9 +230 0x1013 //RX_FDEQ_BIN_10 +231 0x1719 //RX_FDEQ_BIN_11 +232 0x1B1E //RX_FDEQ_BIN_12 +233 0x1E1E //RX_FDEQ_BIN_13 +234 0x1E28 //RX_FDEQ_BIN_14 +235 0x282C //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x4000 //RX_FDEQ_RESRV_0 +245 0x0320 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0035 //RX_FDDRC_BAND_MARGIN_1 +248 0x00D5 //RX_FDDRC_BAND_MARGIN_2 +249 0x0120 //RX_FDDRC_BAND_MARGIN_3 +250 0x0004 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x2000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x2000 //RX_FDDRC_THRD_3_2 +258 0x5000 //RX_FDDRC_THRD_3_3 +259 0x4000 //RX_FDDRC_SLANT_0_0 +260 0x4000 //RX_FDDRC_SLANT_0_1 +261 0x4000 //RX_FDDRC_SLANT_0_2 +262 0x4000 //RX_FDDRC_SLANT_0_3 +263 0x7FFF //RX_FDDRC_SLANT_1_0 +264 0x7FFF //RX_FDDRC_SLANT_1_1 +265 0x7FFF //RX_FDDRC_SLANT_1_2 +266 0x7FFF //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +286 0x0029 //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 +#VOL 3 +163 0x6000 //RX_TDDRC_ALPHA_UP_1 +164 0x6000 //RX_TDDRC_ALPHA_UP_2 +165 0x6000 //RX_TDDRC_ALPHA_UP_3 +166 0x1000 //RX_TDDRC_ALPHA_UP_4 +184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +190 0x7214 //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +269 0x0002 //RX_TDDRC_THRD_0 +270 0x0004 //RX_TDDRC_THRD_1 +271 0x1A00 //RX_TDDRC_THRD_2 +272 0x1A00 //RX_TDDRC_THRD_3 +273 0x7EB8 //RX_TDDRC_SLANT_0 +274 0x2500 //RX_TDDRC_SLANT_1 +275 0x6000 //RX_TDDRC_ALPHA_UP_0 +276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x199A //RX_TDDRC_HMNC_GAIN +279 0x0001 //RX_TDDRC_SMT_FLAG +280 0x0CCD //RX_TDDRC_SMT_W +281 0x0550 //RX_TDDRC_DRC_GAIN +195 0x0020 //RX_FDEQ_SUBNUM +196 0x4848 //RX_FDEQ_GAIN_0 +197 0x4848 //RX_FDEQ_GAIN_1 +198 0x4848 //RX_FDEQ_GAIN_2 +199 0x4848 //RX_FDEQ_GAIN_3 +200 0x4848 //RX_FDEQ_GAIN_4 +201 0x4848 //RX_FDEQ_GAIN_5 +202 0x4850 //RX_FDEQ_GAIN_6 +203 0x4848 //RX_FDEQ_GAIN_7 +204 0x4860 //RX_FDEQ_GAIN_8 +205 0x7468 //RX_FDEQ_GAIN_9 +206 0x6060 //RX_FDEQ_GAIN_10 +207 0x6060 //RX_FDEQ_GAIN_11 +208 0x5C54 //RX_FDEQ_GAIN_12 +209 0x5450 //RX_FDEQ_GAIN_13 +210 0x5050 //RX_FDEQ_GAIN_14 +211 0x5860 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0202 //RX_FDEQ_BIN_0 +221 0x0203 //RX_FDEQ_BIN_1 +222 0x0303 //RX_FDEQ_BIN_2 +223 0x0304 //RX_FDEQ_BIN_3 +224 0x0404 //RX_FDEQ_BIN_4 +225 0x0308 //RX_FDEQ_BIN_5 +226 0x0808 //RX_FDEQ_BIN_6 +227 0x090A //RX_FDEQ_BIN_7 +228 0x0B0C //RX_FDEQ_BIN_8 +229 0x0D0E //RX_FDEQ_BIN_9 +230 0x1013 //RX_FDEQ_BIN_10 +231 0x1719 //RX_FDEQ_BIN_11 +232 0x1B1E //RX_FDEQ_BIN_12 +233 0x1E1E //RX_FDEQ_BIN_13 +234 0x1E28 //RX_FDEQ_BIN_14 +235 0x282C //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x4000 //RX_FDEQ_RESRV_0 +245 0x0320 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0035 //RX_FDDRC_BAND_MARGIN_1 +248 0x00D5 //RX_FDDRC_BAND_MARGIN_2 +249 0x0120 //RX_FDDRC_BAND_MARGIN_3 +250 0x0004 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x2000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x2000 //RX_FDDRC_THRD_3_2 +258 0x5000 //RX_FDDRC_THRD_3_3 +259 0x4000 //RX_FDDRC_SLANT_0_0 +260 0x4000 //RX_FDDRC_SLANT_0_1 +261 0x4000 //RX_FDDRC_SLANT_0_2 +262 0x4000 //RX_FDDRC_SLANT_0_3 +263 0x7FFF //RX_FDDRC_SLANT_1_0 +264 0x7FFF //RX_FDDRC_SLANT_1_1 +265 0x7FFF //RX_FDDRC_SLANT_1_2 +266 0x7FFF //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +286 0x0039 //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 +#VOL 4 +163 0x6000 //RX_TDDRC_ALPHA_UP_1 +164 0x6000 //RX_TDDRC_ALPHA_UP_2 +165 0x6000 //RX_TDDRC_ALPHA_UP_3 +166 0x1000 //RX_TDDRC_ALPHA_UP_4 +184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +190 0x7214 //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +269 0x0002 //RX_TDDRC_THRD_0 +270 0x0004 //RX_TDDRC_THRD_1 +271 0x1A00 //RX_TDDRC_THRD_2 +272 0x1A00 //RX_TDDRC_THRD_3 +273 0x7EB8 //RX_TDDRC_SLANT_0 +274 0x2500 //RX_TDDRC_SLANT_1 +275 0x6000 //RX_TDDRC_ALPHA_UP_0 +276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x199A //RX_TDDRC_HMNC_GAIN +279 0x0001 //RX_TDDRC_SMT_FLAG +280 0x0CCD //RX_TDDRC_SMT_W +281 0x0550 //RX_TDDRC_DRC_GAIN +195 0x0020 //RX_FDEQ_SUBNUM +196 0x4848 //RX_FDEQ_GAIN_0 +197 0x4848 //RX_FDEQ_GAIN_1 +198 0x4848 //RX_FDEQ_GAIN_2 +199 0x4848 //RX_FDEQ_GAIN_3 +200 0x5454 //RX_FDEQ_GAIN_4 +201 0x7C54 //RX_FDEQ_GAIN_5 +202 0x4850 //RX_FDEQ_GAIN_6 +203 0x4848 //RX_FDEQ_GAIN_7 +204 0x4860 //RX_FDEQ_GAIN_8 +205 0x7468 //RX_FDEQ_GAIN_9 +206 0x6060 //RX_FDEQ_GAIN_10 +207 0x6060 //RX_FDEQ_GAIN_11 +208 0x5C54 //RX_FDEQ_GAIN_12 +209 0x5450 //RX_FDEQ_GAIN_13 +210 0x5050 //RX_FDEQ_GAIN_14 +211 0x5860 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0202 //RX_FDEQ_BIN_0 +221 0x0203 //RX_FDEQ_BIN_1 +222 0x0303 //RX_FDEQ_BIN_2 +223 0x0304 //RX_FDEQ_BIN_3 +224 0x0404 //RX_FDEQ_BIN_4 +225 0x0308 //RX_FDEQ_BIN_5 +226 0x0808 //RX_FDEQ_BIN_6 +227 0x090A //RX_FDEQ_BIN_7 +228 0x0B0C //RX_FDEQ_BIN_8 +229 0x0D0E //RX_FDEQ_BIN_9 +230 0x1013 //RX_FDEQ_BIN_10 +231 0x1719 //RX_FDEQ_BIN_11 +232 0x1B1E //RX_FDEQ_BIN_12 +233 0x1E1E //RX_FDEQ_BIN_13 +234 0x1E28 //RX_FDEQ_BIN_14 +235 0x282C //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x4000 //RX_FDEQ_RESRV_0 +245 0x0320 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0035 //RX_FDDRC_BAND_MARGIN_1 +248 0x00D5 //RX_FDDRC_BAND_MARGIN_2 +249 0x0120 //RX_FDDRC_BAND_MARGIN_3 +250 0x0004 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x2000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x2000 //RX_FDDRC_THRD_3_2 +258 0x5000 //RX_FDDRC_THRD_3_3 +259 0x4000 //RX_FDDRC_SLANT_0_0 +260 0x4000 //RX_FDDRC_SLANT_0_1 +261 0x4000 //RX_FDDRC_SLANT_0_2 +262 0x4000 //RX_FDDRC_SLANT_0_3 +263 0x7FFF //RX_FDDRC_SLANT_1_0 +264 0x7FFF //RX_FDDRC_SLANT_1_1 +265 0x7FFF //RX_FDDRC_SLANT_1_2 +266 0x7FFF //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +286 0x005F //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 +#VOL 5 +163 0x6000 //RX_TDDRC_ALPHA_UP_1 +164 0x6000 //RX_TDDRC_ALPHA_UP_2 +165 0x6000 //RX_TDDRC_ALPHA_UP_3 +166 0x1000 //RX_TDDRC_ALPHA_UP_4 +184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +190 0x7214 //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +269 0x0002 //RX_TDDRC_THRD_0 +270 0x0004 //RX_TDDRC_THRD_1 +271 0x1A00 //RX_TDDRC_THRD_2 +272 0x1A00 //RX_TDDRC_THRD_3 +273 0x7EB8 //RX_TDDRC_SLANT_0 +274 0x2500 //RX_TDDRC_SLANT_1 +275 0x6000 //RX_TDDRC_ALPHA_UP_0 +276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x199A //RX_TDDRC_HMNC_GAIN +279 0x0001 //RX_TDDRC_SMT_FLAG +280 0x0CCD //RX_TDDRC_SMT_W +281 0x0550 //RX_TDDRC_DRC_GAIN +195 0x0020 //RX_FDEQ_SUBNUM +196 0x4848 //RX_FDEQ_GAIN_0 +197 0x4848 //RX_FDEQ_GAIN_1 +198 0x4848 //RX_FDEQ_GAIN_2 +199 0x4848 //RX_FDEQ_GAIN_3 +200 0x5454 //RX_FDEQ_GAIN_4 +201 0x7C54 //RX_FDEQ_GAIN_5 +202 0x4850 //RX_FDEQ_GAIN_6 +203 0x4848 //RX_FDEQ_GAIN_7 +204 0x4860 //RX_FDEQ_GAIN_8 +205 0x7468 //RX_FDEQ_GAIN_9 +206 0x6060 //RX_FDEQ_GAIN_10 +207 0x6060 //RX_FDEQ_GAIN_11 +208 0x5C54 //RX_FDEQ_GAIN_12 +209 0x5450 //RX_FDEQ_GAIN_13 +210 0x5050 //RX_FDEQ_GAIN_14 +211 0x5860 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0202 //RX_FDEQ_BIN_0 +221 0x0203 //RX_FDEQ_BIN_1 +222 0x0303 //RX_FDEQ_BIN_2 +223 0x0304 //RX_FDEQ_BIN_3 +224 0x0404 //RX_FDEQ_BIN_4 +225 0x0308 //RX_FDEQ_BIN_5 +226 0x0808 //RX_FDEQ_BIN_6 +227 0x090A //RX_FDEQ_BIN_7 +228 0x0B0C //RX_FDEQ_BIN_8 +229 0x0D0E //RX_FDEQ_BIN_9 +230 0x1013 //RX_FDEQ_BIN_10 +231 0x1719 //RX_FDEQ_BIN_11 +232 0x1B1E //RX_FDEQ_BIN_12 +233 0x1E1E //RX_FDEQ_BIN_13 +234 0x1E28 //RX_FDEQ_BIN_14 +235 0x282C //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x4000 //RX_FDEQ_RESRV_0 +245 0x0320 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0035 //RX_FDDRC_BAND_MARGIN_1 +248 0x00D5 //RX_FDDRC_BAND_MARGIN_2 +249 0x0120 //RX_FDDRC_BAND_MARGIN_3 +250 0x0004 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x2000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x2000 //RX_FDDRC_THRD_3_2 +258 0x5000 //RX_FDDRC_THRD_3_3 +259 0x4000 //RX_FDDRC_SLANT_0_0 +260 0x4000 //RX_FDDRC_SLANT_0_1 +261 0x4000 //RX_FDDRC_SLANT_0_2 +262 0x4000 //RX_FDDRC_SLANT_0_3 +263 0x7FFF //RX_FDDRC_SLANT_1_0 +264 0x7FFF //RX_FDDRC_SLANT_1_1 +265 0x7FFF //RX_FDDRC_SLANT_1_2 +266 0x7FFF //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +286 0x008E //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 +#VOL 6 +163 0x6000 //RX_TDDRC_ALPHA_UP_1 +164 0x6000 //RX_TDDRC_ALPHA_UP_2 +165 0x6000 //RX_TDDRC_ALPHA_UP_3 +166 0x1000 //RX_TDDRC_ALPHA_UP_4 +184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +190 0x7214 //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +269 0x0002 //RX_TDDRC_THRD_0 +270 0x0004 //RX_TDDRC_THRD_1 +271 0x1A00 //RX_TDDRC_THRD_2 +272 0x1A00 //RX_TDDRC_THRD_3 +273 0x7EB8 //RX_TDDRC_SLANT_0 +274 0x2500 //RX_TDDRC_SLANT_1 +275 0x6000 //RX_TDDRC_ALPHA_UP_0 +276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x199A //RX_TDDRC_HMNC_GAIN +279 0x0001 //RX_TDDRC_SMT_FLAG +280 0x0CCD //RX_TDDRC_SMT_W +281 0x0550 //RX_TDDRC_DRC_GAIN +195 0x0020 //RX_FDEQ_SUBNUM +196 0x4848 //RX_FDEQ_GAIN_0 +197 0x4848 //RX_FDEQ_GAIN_1 +198 0x4848 //RX_FDEQ_GAIN_2 +199 0x4848 //RX_FDEQ_GAIN_3 +200 0x5454 //RX_FDEQ_GAIN_4 +201 0x7C54 //RX_FDEQ_GAIN_5 +202 0x4850 //RX_FDEQ_GAIN_6 +203 0x4848 //RX_FDEQ_GAIN_7 +204 0x4860 //RX_FDEQ_GAIN_8 +205 0x7468 //RX_FDEQ_GAIN_9 +206 0x6060 //RX_FDEQ_GAIN_10 +207 0x6060 //RX_FDEQ_GAIN_11 +208 0x5C54 //RX_FDEQ_GAIN_12 +209 0x5450 //RX_FDEQ_GAIN_13 +210 0x5050 //RX_FDEQ_GAIN_14 +211 0x5860 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0202 //RX_FDEQ_BIN_0 +221 0x0203 //RX_FDEQ_BIN_1 +222 0x0303 //RX_FDEQ_BIN_2 +223 0x0304 //RX_FDEQ_BIN_3 +224 0x0404 //RX_FDEQ_BIN_4 +225 0x0308 //RX_FDEQ_BIN_5 +226 0x0808 //RX_FDEQ_BIN_6 +227 0x090A //RX_FDEQ_BIN_7 +228 0x0B0C //RX_FDEQ_BIN_8 +229 0x0D0E //RX_FDEQ_BIN_9 +230 0x1013 //RX_FDEQ_BIN_10 +231 0x1719 //RX_FDEQ_BIN_11 +232 0x1B1E //RX_FDEQ_BIN_12 +233 0x1E1E //RX_FDEQ_BIN_13 +234 0x1E28 //RX_FDEQ_BIN_14 +235 0x282C //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x4000 //RX_FDEQ_RESRV_0 +245 0x0320 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0035 //RX_FDDRC_BAND_MARGIN_1 +248 0x00D5 //RX_FDDRC_BAND_MARGIN_2 +249 0x0120 //RX_FDDRC_BAND_MARGIN_3 +250 0x0004 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x2000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x2000 //RX_FDDRC_THRD_3_2 +258 0x5000 //RX_FDDRC_THRD_3_3 +259 0x4000 //RX_FDDRC_SLANT_0_0 +260 0x4000 //RX_FDDRC_SLANT_0_1 +261 0x4000 //RX_FDDRC_SLANT_0_2 +262 0x4000 //RX_FDDRC_SLANT_0_3 +263 0x7FFF //RX_FDDRC_SLANT_1_0 +264 0x7FFF //RX_FDDRC_SLANT_1_1 +265 0x7FFF //RX_FDDRC_SLANT_1_2 +266 0x7FFF //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +286 0x0100 //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 + +#CASE_NAME HANDSFREE-HANDSFREE-RESERVE1-SWB +#PARAM_MODE Simple +#PARAM_TYPE TX+2RX +#TOTAL_CUSTOM_STEP 7+7 +#TX +0 0x0001 //TX_OPERATION_MODE_0 +1 0x0001 //TX_OPERATION_MODE_1 +2 0x0073 //TX_PATCH_REG +3 0x6B54 //TX_SENDFUNC_MODE_0 +4 0x0001 //TX_SENDFUNC_MODE_1 +5 0x0003 //TX_NUM_MIC +6 0x0003 //TX_SAMPLINGFREQ_SIG +7 0x0003 //TX_SAMPLINGFREQ_PROC +8 0x000A //TX_FRAME_SZ_SIG +9 0x000A //TX_FRAME_SZ +10 0x0000 //TX_DELAY_OPT +11 0x0028 //TX_MAX_TAIL_LENGTH +12 0x0001 //TX_NUM_LOUTCHN +13 0x0001 //TX_MAXNUM_AECREF +14 0x0000 //TX_DBG_FUNC_REG +15 0x0000 //TX_DBG_FUNC_REG1 +16 0x0000 //TX_SYS_RESRV_0 +17 0x0000 //TX_SYS_RESRV_1 +18 0x0000 //TX_SYS_RESRV_2 +19 0x0000 //TX_SYS_RESRV_3 +20 0x0000 //TX_DIST2REF0 +21 0x009C //TX_DIST2REF1 +22 0x0019 //TX_DIST2REF_02 +23 0x0000 //TX_DIST2REF_03 +24 0x0000 //TX_DIST2REF_04 +25 0x0000 //TX_DIST2REF_05 +26 0x0000 //TX_MMIC +27 0x1000 //TX_PGA_0 +28 0x1000 //TX_PGA_1 +29 0x1000 //TX_PGA_2 +30 0x0000 //TX_PGA_3 +31 0x0000 //TX_PGA_4 +32 0x0000 //TX_PGA_5 +33 0x0001 //TX_MIC_PAIRS +34 0x0000 //TX_MIC_PAIRS_HS +35 0x0002 //TX_MICS_FOR_BF +36 0x0000 //TX_MIC_PAIRS_FORL1 +37 0x0002 //TX_MICS_OF_PAIR0 +38 0x0002 //TX_MICS_OF_PAIR1 +39 0x0002 //TX_MICS_OF_PAIR2 +40 0x0002 //TX_MICS_OF_PAIR3 +41 0x0000 //TX_MIC_DATA_SRC0 +42 0x0002 //TX_MIC_DATA_SRC1 +43 0x0001 //TX_MIC_DATA_SRC2 +44 0x0000 //TX_MIC_DATA_SRC3 +45 0x0000 //TX_MIC_PAIR_CH_04 +46 0x0000 //TX_MIC_PAIR_CH_05 +47 0x0000 //TX_MIC_PAIR_CH_10 +48 0x0000 //TX_MIC_PAIR_CH_11 +49 0x0000 //TX_MIC_PAIR_CH_12 +50 0x0000 //TX_MIC_PAIR_CH_13 +51 0x0000 //TX_MIC_PAIR_CH_14 +52 0x05DC //TX_HD_BIN_MASK +53 0x0010 //TX_HD_SUBAND_MASK +54 0x19A1 //TX_HD_FRAME_AVG_MASK +55 0x0320 //TX_HD_MIN_FRQ +56 0x1000 //TX_HD_ALPHA_PSD +57 0x1100 //TX_T_PHPR1 +58 0x0000 //TX_T_PHPR2 +59 0x0000 //TX_T_PTPR +60 0x0000 //TX_T_PNPR +61 0x0000 //TX_T_PAPR1 +62 0xEE6C //TX_T_PSDVAT +63 0x0800 //TX_CNT +64 0x4000 //TX_ANTI_HOWL_GAIN +65 0x0001 //TX_MICFORBFMARK_0 +66 0x0001 //TX_MICFORBFMARK_1 +67 0x0001 //TX_MICFORBFMARK_2 +68 0x0001 //TX_MICFORBFMARK_3 +69 0x0001 //TX_MICFORBFMARK_4 +70 0x0001 //TX_MICFORBFMARK_5 +71 0x0000 //TX_DIST2REF_10 +72 0x3B33 //TX_DIST2REF_11 +73 0x0A70 //TX_DIST2REF2 +74 0x0000 //TX_DIST2REF_13 +75 0x0000 //TX_DIST2REF_14 +76 0x0000 //TX_DIST2REF_15 +77 0x0000 //TX_DIST2REF_20 +78 0x0000 //TX_DIST2REF_21 +79 0x0000 //TX_DIST2REF_22 +80 0x0000 //TX_DIST2REF_23 +81 0x0000 //TX_DIST2REF_24 +82 0x0000 //TX_DIST2REF_25 +83 0x0000 //TX_DIST2REF_30 +84 0x0000 //TX_DIST2REF_31 +85 0x0000 //TX_DIST2REF_32 +86 0x0000 //TX_DIST2REF_33 +87 0x0000 //TX_DIST2REF_34 +88 0x0000 //TX_DIST2REF_35 +89 0x0000 //TX_MIC_LOC_00 +90 0x0000 //TX_MIC_LOC_01 +91 0x0000 //TX_MIC_LOC_02 +92 0x0000 //TX_MIC_LOC_03 +93 0x0000 //TX_MIC_LOC_04 +94 0x0000 //TX_MIC_LOC_05 +95 0x0000 //TX_MIC_LOC_10 +96 0x0000 //TX_MIC_LOC_11 +97 0x0000 //TX_MIC_LOC_12 +98 0x0000 //TX_MIC_LOC_13 +99 0x0000 //TX_MIC_LOC_14 +100 0x0000 //TX_MIC_LOC_15 +101 0x0000 //TX_MIC_LOC_20 +102 0x0000 //TX_MIC_LOC_21 +103 0x0000 //TX_MIC_LOC_22 +104 0x0000 //TX_MIC_LOC_23 +105 0x0000 //TX_MIC_LOC_24 +106 0x0000 //TX_MIC_LOC_25 +107 0x0800 //TX_MIC_REFBLK_VOLUME +108 0x0CAE //TX_MIC_BLOCK_VOLUME +109 0x0000 //TX_INVERSE_MASK +110 0x0000 //TX_ADCS_MASK +111 0x04D0 //TX_ADCS_GAIN +112 0x4000 //TX_NFC_GAINFAC +113 0x0000 //TX_MAINMIC_BLKFACTOR +114 0x0000 //TX_REFMIC_BLKFACTOR +115 0x0000 //TX_BLMIC_BLKFACTOR +116 0x0000 //TX_BRMIC_BLKFACTOR +117 0x0031 //TX_MICBLK_START_BIN +118 0x0060 //TX_MICBLK_END_BIN +119 0x0015 //TX_MICBLK_FE_HOLD +120 0xFFF2 //TX_MICBLK_MR_EXP_TH +121 0xFFF2 //TX_MICBLK_LR_EXP_TH +122 0x0015 //TX_FENE_HOLD +123 0x4000 //TX_FE_ENER_TH_MTS +124 0x0004 //TX_FE_ENER_TH_EXP +125 0x6000 //TX_C_POST_FLT_MIC_MAINBLK +126 0x6000 //TX_C_POST_FLT_MIC_REFBLK +127 0x0010 //TX_MIC_BLOCK_N +128 0x7B02 //TX_A_HP +129 0x4000 //TX_B_PE +130 0x5000 //TX_THR_PITCH_DET_0 +131 0x4800 //TX_THR_PITCH_DET_1 +132 0x4000 //TX_THR_PITCH_DET_2 +133 0x0008 //TX_PITCH_BFR_LEN +134 0x0003 //TX_SBD_PITCH_DET +135 0x0050 //TX_TD_AEC_L +136 0x4000 //TX_MU0_UNP_TD_AEC +137 0x1000 //TX_MU0_PTD_TD_AEC +138 0x0000 //TX_PP_RESRV_0 +139 0x2A94 //TX_PP_RESRV_1 +140 0x55F0 //TX_PP_RESRV_2 +141 0x0000 //TX_PP_RESRV_3 +142 0x0000 //TX_PP_RESRV_4 +143 0x0000 //TX_PP_RESRV_5 +144 0x0000 //TX_PP_RESRV_6 +145 0x0000 //TX_PP_RESRV_7 +146 0x0028 //TX_TAIL_LENGTH +147 0x0400 //TX_AEC_REF_GAIN_0 +148 0x0800 //TX_AEC_REF_GAIN_1 +149 0x0800 //TX_AEC_REF_GAIN_2 +150 0x7600 //TX_EAD_THR +151 0x1000 //TX_THR_RE_EST +152 0x2000 //TX_MIN_EQ_RE_EST_0 +153 0x0600 //TX_MIN_EQ_RE_EST_1 +154 0x3000 //TX_MIN_EQ_RE_EST_2 +155 0x3000 //TX_MIN_EQ_RE_EST_3 +156 0x3000 //TX_MIN_EQ_RE_EST_4 +157 0x3000 //TX_MIN_EQ_RE_EST_5 +158 0x3000 //TX_MIN_EQ_RE_EST_6 +159 0x1000 //TX_MIN_EQ_RE_EST_7 +160 0x7800 //TX_MIN_EQ_RE_EST_8 +161 0x7800 //TX_MIN_EQ_RE_EST_9 +162 0x7800 //TX_MIN_EQ_RE_EST_10 +163 0x7800 //TX_MIN_EQ_RE_EST_11 +164 0x7800 //TX_MIN_EQ_RE_EST_12 +165 0x4000 //TX_LAMBDA_RE_EST +166 0x3000 //TX_LAMBDA_CB_NLE +167 0x7FFF //TX_C_POST_FLT +168 0x4000 //TX_GAIN_NP +169 0x0180 //TX_SE_HOLD_N +170 0x00C8 //TX_DT_HOLD_N +171 0x05DC //TX_DT2_HOLD_N +172 0x6666 //TX_AEC_RESRV_0 +173 0x0000 //TX_AEC_RESRV_1 +174 0x0014 //TX_AEC_RESRV_2 +175 0x0000 //TX_MIC_DELAY_LENGTH +176 0x0000 //TX_REF_DELAY_LENGTH +177 0x0000 //TX_ADD_LINEIN_GAINL +178 0x0000 //TX_ADD_LINEIN_GAINH +179 0x0000 //TX_MIN_EQ_RE_EST_14 +180 0x0000 //TX_DTD_THR1_8 +181 0x7FFF //TX_DTD_THR2_8 +182 0x0000 //TX_DTD_MIC_BLK2 +183 0x0008 //TX_FRQ_LIN_LEN +184 0x7FFF //TX_FRQ_AEC_LEN_RHO +185 0x6000 //TX_MU0_UNP_FRQ_AEC +186 0x4000 //TX_MU0_PTD_FRQ_AEC +187 0x000A //TX_MINENOISETH +188 0x0800 //TX_MU0_RE_EST +189 0x0001 //TX_AEC_NUM_CH +190 0x0000 //TX_BIGECHOATTENUATION_MAX +191 0x2000 //TX_A_POST_FLT_MICBLK +192 0x0000 //TX_BLKENERTH +193 0x0000 //TX_BLKENERHIGHTH +194 0x0000 //TX_NORMENERTH +195 0x0000 //TX_NORMENERHIGHTH +196 0x0000 //TX_NORMENERHIGHTHL +197 0x7FF0 //TX_DTD_THR1_0 +198 0x7FF0 //TX_DTD_THR1_1 +199 0x7FF0 //TX_DTD_THR1_2 +200 0x7FF0 //TX_DTD_THR1_3 +201 0x7FF0 //TX_DTD_THR1_4 +202 0x7FF0 //TX_DTD_THR1_5 +203 0x7FF0 //TX_DTD_THR1_6 +204 0x7E00 //TX_DTD_THR2_0 +205 0x7E00 //TX_DTD_THR2_1 +206 0x5000 //TX_DTD_THR2_2 +207 0x5000 //TX_DTD_THR2_3 +208 0x5000 //TX_DTD_THR2_4 +209 0x5000 //TX_DTD_THR2_5 +210 0x5000 //TX_DTD_THR2_6 +211 0x7FFF //TX_DTD_THR3 +212 0x0000 //TX_SPK_CUT_K +213 0x36B0 //TX_DT_CUT_K +214 0x0100 //TX_DT_CUT_THR +215 0x04EB //TX_COMFORT_G +216 0x01F4 //TX_POWER_YOUT_TH +217 0x4000 //TX_FDPFGAINECHO +218 0x0000 //TX_DTD_HD_THR +219 0x0000 //TX_SPK_CUT_K_S +220 0x7FFF //TX_DTD_MIC_BLK +221 0x023E //TX_ADPT_STRICT_L +222 0x023E //TX_ADPT_STRICT_H +223 0x0BB8 //TX_RATIO_DT_L_TH_LOW +224 0x3A98 //TX_RATIO_DT_H_TH_LOW +225 0x1F40 //TX_RATIO_DT_L_TH_HIGH +226 0x5014 //TX_RATIO_DT_H_TH_HIGH +227 0x09C4 //TX_RATIO_DT_L0_TH +228 0x7FFF //TX_B_POST_FILT_ECHO_L +229 0x7FFF //TX_B_POST_FILT_ECHO_H +230 0x0200 //TX_MIN_G_CTRL_ECHO +231 0x1000 //TX_B_LESSCUT_RTO_ECHO +232 0x0000 //TX_EPD_OFFSET_00 +233 0x0000 //TX_EPD_OFFST_01 +234 0x2328 //TX_RATIO_DT_L0_TH_HIGH +235 0x7FFF //TX_RATIO_DT_H_TH_CUT +236 0x7FFF //TX_MIN_EQ_RE_EST_13 +237 0x0000 //TX_DTD_THR1_7 +238 0x0000 //TX_DTD_THR2_7 +239 0x0800 //TX_DT_RESRV_7 +240 0x0800 //TX_DT_RESRV_8 +241 0x0000 //TX_DT_RESRV_9 +242 0xF800 //TX_THR_SN_EST_0 +243 0xFA00 //TX_THR_SN_EST_1 +244 0xFA00 //TX_THR_SN_EST_2 +245 0xFA00 //TX_THR_SN_EST_3 +246 0xF800 //TX_THR_SN_EST_4 +247 0xFA00 //TX_THR_SN_EST_5 +248 0xF800 //TX_THR_SN_EST_6 +249 0xF800 //TX_THR_SN_EST_7 +250 0x0100 //TX_DELTA_THR_SN_EST_0 +251 0x0100 //TX_DELTA_THR_SN_EST_1 +252 0x0100 //TX_DELTA_THR_SN_EST_2 +253 0x0000 //TX_DELTA_THR_SN_EST_3 +254 0x0100 //TX_DELTA_THR_SN_EST_4 +255 0x0200 //TX_DELTA_THR_SN_EST_5 +256 0x0100 //TX_DELTA_THR_SN_EST_6 +257 0x0200 //TX_DELTA_THR_SN_EST_7 +258 0x4000 //TX_LAMBDA_NN_EST_0 +259 0x4000 //TX_LAMBDA_NN_EST_1 +260 0x4000 //TX_LAMBDA_NN_EST_2 +261 0x4000 //TX_LAMBDA_NN_EST_3 +262 0x4000 //TX_LAMBDA_NN_EST_4 +263 0x4000 //TX_LAMBDA_NN_EST_5 +264 0x4000 //TX_LAMBDA_NN_EST_6 +265 0x4000 //TX_LAMBDA_NN_EST_7 +266 0x0400 //TX_N_SN_EST +267 0x001E //TX_INBEAM_T +268 0x0041 //TX_INBEAMHOLDT +269 0x2000 //TX_G_STRICT +270 0x2000 //TX_EQ_THR_BF +271 0x799A //TX_LAMBDA_EQ_BF +272 0x1000 //TX_NE_RTO_TH +273 0x0400 //TX_NE_RTO_TH_L +274 0x0800 //TX_MAINREFRTOH_TH_H +275 0x0800 //TX_MAINREFRTOH_TH_L +276 0x0800 //TX_MAINREFRTO_TH_H +277 0x0800 //TX_MAINREFRTO_TH_L +278 0x0200 //TX_MAINREFRTO_TH_EQ +279 0x2000 //TX_B_POST_FLT_0 +280 0x1000 //TX_B_POST_FLT_1 +281 0x0010 //TX_NS_LVL_CTRL_0 +282 0x003C //TX_NS_LVL_CTRL_1 +283 0x0024 //TX_NS_LVL_CTRL_2 +284 0x003C //TX_NS_LVL_CTRL_3 +285 0x0014 //TX_NS_LVL_CTRL_4 +286 0x0011 //TX_NS_LVL_CTRL_5 +287 0x003C //TX_NS_LVL_CTRL_6 +288 0x0011 //TX_NS_LVL_CTRL_7 +289 0x0020 //TX_MIN_GAIN_S_0 +290 0x0020 //TX_MIN_GAIN_S_1 +291 0x0020 //TX_MIN_GAIN_S_2 +292 0x0020 //TX_MIN_GAIN_S_3 +293 0x0020 //TX_MIN_GAIN_S_4 +294 0x0020 //TX_MIN_GAIN_S_5 +295 0x0020 //TX_MIN_GAIN_S_6 +296 0x0020 //TX_MIN_GAIN_S_7 +297 0x6000 //TX_NMOS_SUP +298 0x0000 //TX_NS_MAX_PRI_SNR_TH +299 0x0000 //TX_NMOS_SUP_MENSA +300 0x7FFF //TX_SNRI_SUP_0 +301 0x4000 //TX_SNRI_SUP_1 +302 0x4000 //TX_SNRI_SUP_2 +303 0x4000 //TX_SNRI_SUP_3 +304 0x4000 //TX_SNRI_SUP_4 +305 0x4000 //TX_SNRI_SUP_5 +306 0x4000 //TX_SNRI_SUP_6 +307 0x4000 //TX_SNRI_SUP_7 +308 0x7FFF //TX_THR_LFNS +309 0x0018 //TX_G_LFNS +310 0x09C4 //TX_GAIN0_NTH +311 0x000A //TX_MUSIC_MORENS +312 0x7FFF //TX_A_POST_FILT_0 +313 0x2000 //TX_A_POST_FILT_1 +314 0x7FFF //TX_A_POST_FILT_S_0 +315 0x7FFF //TX_A_POST_FILT_S_1 +316 0x7FFF //TX_A_POST_FILT_S_2 +317 0x7FFF //TX_A_POST_FILT_S_3 +318 0x7FFF //TX_A_POST_FILT_S_4 +319 0x7FFF //TX_A_POST_FILT_S_5 +320 0x7FFF //TX_A_POST_FILT_S_6 +321 0x7FFF //TX_A_POST_FILT_S_7 +322 0x2000 //TX_B_POST_FILT_0 +323 0x6000 //TX_B_POST_FILT_1 +324 0x6000 //TX_B_POST_FILT_2 +325 0x6000 //TX_B_POST_FILT_3 +326 0x4000 //TX_B_POST_FILT_4 +327 0x1000 //TX_B_POST_FILT_5 +328 0x1000 //TX_B_POST_FILT_6 +329 0x2000 //TX_B_POST_FILT_7 +330 0x4000 //TX_B_LESSCUT_RTO_S_0 +331 0x7FFF //TX_B_LESSCUT_RTO_S_1 +332 0x7FFF //TX_B_LESSCUT_RTO_S_2 +333 0x7FFF //TX_B_LESSCUT_RTO_S_3 +334 0x7FFF //TX_B_LESSCUT_RTO_S_4 +335 0x6000 //TX_B_LESSCUT_RTO_S_5 +336 0x7FFF //TX_B_LESSCUT_RTO_S_6 +337 0x7FFF //TX_B_LESSCUT_RTO_S_7 +338 0x7F00 //TX_LAMBDA_PFILT +339 0x7F00 //TX_LAMBDA_PFILT_S_0 +340 0x7F00 //TX_LAMBDA_PFILT_S_1 +341 0x7F00 //TX_LAMBDA_PFILT_S_2 +342 0x7F00 //TX_LAMBDA_PFILT_S_3 +343 0x7F00 //TX_LAMBDA_PFILT_S_4 +344 0x7F00 //TX_LAMBDA_PFILT_S_5 +345 0x7F00 //TX_LAMBDA_PFILT_S_6 +346 0x7F00 //TX_LAMBDA_PFILT_S_7 +347 0x0200 //TX_K_PEPPER +348 0x0400 //TX_A_PEPPER +349 0x1EAA //TX_K_PEPPER_HF +350 0x0600 //TX_A_PEPPER_HF +351 0x0001 //TX_HMNC_BST_FLG +352 0x0200 //TX_HMNC_BST_THR +353 0x0040 //TX_DT_BINVAD_TH_0 +354 0x0040 //TX_DT_BINVAD_TH_1 +355 0x0100 //TX_DT_BINVAD_TH_2 +356 0x0100 //TX_DT_BINVAD_TH_3 +357 0x36B0 //TX_DT_BINVAD_ENDF +358 0x0200 //TX_C_POST_FLT_DT +359 0x0CCD //TX_NS_B_POST_FLT_LESSCUT +360 0x0140 //TX_DT_BOOST +361 0x0000 //TX_BF_SGRAD_FLG +362 0x0005 //TX_BF_DVG_TH +363 0x001E //TX_SN_C_F +364 0x0000 //TX_K_APT +365 0x0001 //TX_NOISEDET +366 0x0064 //TX_NDETCT +367 0x0050 //TX_NOISE_TH_0 +368 0x7FFF //TX_NOISE_TH_0_2 +369 0x7FFF //TX_NOISE_TH_0_3 +370 0x07D0 //TX_NOISE_TH_1 +371 0x01F4 //TX_NOISE_TH_2 +372 0x36B0 //TX_NOISE_TH_3 +373 0x2710 //TX_NOISE_TH_4 +374 0x2CEC //TX_NOISE_TH_5 +375 0x7FFF //TX_NOISE_TH_5_2 +376 0x0000 //TX_NOISE_TH_5_3 +377 0x7FFF //TX_NOISE_TH_5_4 +378 0x0DAC //TX_NOISE_TH_6 +379 0x0050 //TX_MINENOISE_TH +380 0xD508 //TX_MORENS_TFMASK_TH +381 0x0001 //TX_DRC_QUIET_FLOOR +382 0x3A98 //TX_RATIODTL_CUT_TH +383 0x07D0 //TX_DT_CUT_K1 +384 0x0666 //TX_OUT_ENER_S_TH_CLEAN +385 0x0666 //TX_OUT_ENER_S_TH_LESSCLEAN +386 0x0333 //TX_OUT_ENER_S_TH_NOISY +387 0x019A //TX_OUT_ENER_TH_NOISE +388 0x0333 //TX_OUT_ENER_TH_SPEECH +389 0x2000 //TX_SN_NPB_GAIN +390 0x0000 //TX_NN_NPB_GAIN +391 0x7FFF //TX_POST_MASK_SUP_HSNE +392 0x1388 //TX_TAIL_DET_TH +393 0x4000 //TX_B_LESSCUT_RTO_WTA +394 0x0000 //TX_MEL_G_R +395 0x0080 //TX_SUPHIGH_TH +396 0x0000 //TX_MASK_G_R +397 0x0002 //TX_EXTRA_NS_L +398 0x1800 //TX_C_POST_FLT_MASK +399 0x7FFF //TX_A_POST_FLT_WNS +400 0x0148 //TX_MIN_G_LOW300HZ +401 0x0001 //TX_MAXLEVEL_CNG +402 0x00B4 //TX_STN_NOISE_TH +403 0x4000 //TX_POST_MASK_SUP +404 0x7FFF //TX_POST_MASK_ADJUST +405 0x00C8 //TX_NS_ENOISE_MIC0_TH +406 0x0050 //TX_MINENOISE_MIC0_TH +407 0x012C //TX_MINENOISE_MIC0_S_TH +408 0x4000 //TX_MIN_G_CTRL_SSNS +409 0x0000 //TX_METAL_RTO_THR +410 0x4848 //TX_NS_FP_K_METAL +411 0x3A98 //TX_NOISEDET_BOOST_TH +412 0x0FA0 //TX_NSMOOTH_TH +413 0x0000 //TX_NS_RESRV_8 +414 0x1800 //TX_RHO_UPB +415 0x0BB8 //TX_N_HOLD_HS +416 0x0050 //TX_N_RHO_BFR0 +417 0x7FFF //TX_LAMBDA_ARSP_EST +418 0x0100 //TX_EXTRA_GAIN_MICBLOCK +419 0x0CCD //TX_THR_STD_NSR +420 0x019A //TX_THR_STD_PLH +421 0x2AF8 //TX_N_HOLD_STD +422 0x0066 //TX_THR_STD_RHO +423 0x2000 //TX_BF_RESET_THR_HS +424 0x09C4 //TX_SB_RTO_MEAN_TH +425 0x0000 //TX_SB_RHO_MEAN_TH_NTALK +426 0x3800 //TX_SB_RTO_MEAN_TH_ABN +427 0x2EE0 //TX_SB_RTO_MEAN_TH_RUB +428 0x0000 //TX_WTA_EN_RTO_TH +429 0x0000 //TX_TOP_ENER_TH_F +430 0x0000 //TX_DESIRED_TALK_HOLDT +431 0x0800 //TX_MIC_BLOCK_FACTOR +432 0x0000 //TX_NSEST_BFRLRNRDC +433 0x0000 //TX_THR_POST_FLT_HS +434 0x0010 //TX_HS_VAD_BIN +435 0x2666 //TX_THR_VAD_HS +436 0x2CCD //TX_MEAN_RTO_MIN_TH2 +437 0x0032 //TX_SILENCE_T +438 0x0000 //TX_A_POST_FLT_WTA +439 0x799A //TX_LAMBDA_PFLT_WTA +440 0x0000 //TX_SB_RHO_MEAN2_TH +441 0x0190 //TX_SB_RHO_MEAN3_TH +442 0x0000 //TX_HS_RESRV_4 +443 0x0000 //TX_HS_RESRV_5 +444 0x003C //TX_DOA_VAD_THR_1 +445 0x0000 //TX_DOA_VAD_THR_2 +446 0x0028 //TX_DOA_VAD_THR1_0 +447 0x0028 //TX_DOA_VAD_THR1_1 +448 0x0000 //TX_SRC_DOA_RNG_LOW_0A +449 0x00B4 //TX_SRC_DOA_RNG_HIGH_0A +450 0x005A //TX_DFLT_SRC_DOA_0A +451 0x0000 //TX_SRC_DOA_RNG_LOW_0B +452 0x0000 //TX_SRC_DOA_RNG_HIGH_0B +453 0x0000 //TX_DFLT_SRC_DOA_0B +454 0x0000 //TX_SRC_DOA_RNG_LOW_0C +455 0x0000 //TX_SRC_DOA_RNG_HIGH_0C +456 0x0000 //TX_DFLT_SRC_DOA_0C +457 0x0000 //TX_SRC_DOA_RNG_LOW_0D +458 0x0000 //TX_SRC_DOA_RNG_HIGH_0D +459 0x0000 //TX_DFLT_SRC_DOA_0D +460 0x0000 //TX_SRC_DOA_RNG_LOW_1A +461 0x00B4 //TX_SRC_DOA_RNG_HIGH_1A +462 0x005A //TX_DFLT_SRC_DOA_1A +463 0x0000 //TX_SRC_DOA_RNG_LOW_1B +464 0x00B4 //TX_SRC_DOA_RNG_HIGH_1B +465 0x005A //TX_DFLT_SRC_DOA_1B +466 0x0000 //TX_SRC_DOA_RNG_LOW_1C +467 0x00B4 //TX_SRC_DOA_RNG_HIGH_1C +468 0x005A //TX_DFLT_SRC_DOA_1C +469 0x0000 //TX_SRC_DOA_RNG_LOW_1D +470 0x00B4 //TX_SRC_DOA_RNG_HIGH_1D +471 0x005A //TX_DFLT_SRC_DOA_1D +472 0x0100 //TX_BF_HOLDOFF_T +473 0x7FFF //TX_DOA_COST_FACTOR +474 0x4000 //TX_MAINTOREFR_TH0 +475 0x071C //TX_DOA_TRK_THR +476 0x012C //TX_DOA_TRACK_HT +477 0x0200 //TX_N1_HOLD_HF +478 0x0100 //TX_N2_HOLD_HF +479 0x3000 //TX_BF_RESET_THR_HF +480 0x7333 //TX_DOA_SMOOTH +481 0x0800 //TX_MU_BF +482 0x0800 //TX_BF_MU_LF_B2 +483 0x0040 //TX_BF_FC_END_BIN_B2 +484 0x0020 //TX_BF_FC_END_BIN +485 0x0000 //TX_HF_RESRV_25 +486 0x0000 //TX_HF_RESRV_26 +487 0x0007 //TX_N_DOA_SEED +488 0x0001 //TX_FINE_DOA_SEARCH_FLG +489 0x0000 //TX_HF_RESRV_27 +490 0x038E //TX_DLT_SRC_DOA_RNG +491 0x0200 //TX_BF_MU_LF +492 0x0000 //TX_DFLT_SRC_LOC_0 +493 0x7FFF //TX_DFLT_SRC_LOC_1 +494 0x0000 //TX_DFLT_SRC_LOC_2 +495 0x038E //TX_DOA_TRACK_VADTH +496 0x0000 //TX_DOA_TRACK_NEW +497 0x0230 //TX_NOR_OFF_THR +498 0x0CCD //TX_MORE_ON_700HZ_THR +499 0x0000 //TX_MU_BF_ADPT_NS +500 0x0000 //TX_ADAPT_LEN +501 0x2000 //TX_MORE_SNS +502 0x0000 //TX_NOR_OFF_TH1 +503 0x0000 //TX_WIDE_MASK_TH +504 0x4650 //TX_SUBSNRATIOHIGH4MEANBCK_THR +505 0x4000 //TX_C_POST_FLT_CUT +506 0x2000 //TX_RADIODTLV +507 0x0320 //TX_POWER_LINEIN_TH +508 0x0014 //TX_FE_VADCOUNT_TH_FC +509 0x000A //TX_ECHO_SUPP_FC +510 0x0C80 //TX_ECHO_TH +511 0x6666 //TX_MIC_TO_BFGAIN +512 0x0000 //TX_MICTOBFGAIN0 +513 0x0000 //TX_FASTMUE_TH +514 0x3000 //TX_DEREVERB_LF_MU +515 0x34CD //TX_DEREVERB_HF_MU +516 0x0007 //TX_DEREVERB_DELAY +517 0x0004 //TX_DEREVERB_COEF_LEN +518 0x0003 //TX_DEREVERB_DNR +519 0x0000 //TX_DEREVERB_ALPHA +520 0x0000 //TX_DEREVERB_BETA +521 0x3A98 //TX_GSC_RTOL_TH +522 0x3A98 //TX_GSC_RTOH_TH +523 0x7E2C //TX_WIDE2_MEANHTH +524 0x0000 //TX_DR_RESRV_5 +525 0x0000 //TX_DR_RESRV_6 +526 0x0000 //TX_DR_RESRV_7 +527 0x0000 //TX_DR_RESRV_8 +528 0x1333 //TX_WIND_MARK_TH +529 0x399A //TX_CORR_THR +530 0x0004 //TX_SNR_THR +531 0x0010 //TX_ENGY_THR +532 0x1770 //TX_CORR_HIGH_TH +533 0x6000 //TX_ENGY_THR_2 +534 0x3400 //TX_MEAN_RTO_THR +535 0x0028 //TX_WNS_ENOISE_MIC0_TH +536 0x3000 //TX_RATIOMICL_TH +537 0x64CD //TX_CALIG_HS +538 0x0000 //TX_LVL_CTRL +539 0x0014 //TX_WIND_SUPRTO +540 0x000A //TX_WNS_MIN_G +541 0x0000 //TX_WNS_B_POST_FLT +542 0x2800 //TX_RATIOMICH_TH +543 0xD120 //TX_WIND_INBEAM_L_TH +544 0x0FA0 //TX_WIND_INBEAM_H_TH +545 0x2000 //TX_WNS_RESRV_0 +546 0x59D8 //TX_WNS_RESRV_1 +547 0x0000 //TX_WNS_RESRV_2 +548 0x0000 //TX_WNS_RESRV_3 +549 0x0000 //TX_WNS_RESRV_4 +550 0x0000 //TX_WNS_RESRV_5 +551 0x0000 //TX_WNS_RESRV_6 +552 0x0000 //TX_PB_B_POST_FLT_LESSCUT +553 0x0070 //TX_BF_LESSCUT_BBIN +554 0x0070 //TX_BF_LESSCUT_EBIN +555 0x0010 //TX_POSTBFB0 +556 0x0070 //TX_POSTBFB +557 0x00B0 //TX_POSTBFE +558 0x0E66 //TX_SPEECH_SNR_TH +559 0x0050 //TX_PB_MAX_PRI_SNR_TH +560 0x770A //TX_MAX_PRI_SNR_TH_L +561 0x0000 //TX_PFGAIN +562 0x0000 //TX_MAINTOREFR_TH +563 0x0000 //TX_SAM_MARK +564 0x0000 //TX_PB_RESRV_0 +565 0x0000 //TX_PB_RESRV_1 +566 0x0020 //TX_FDEQ_SUBNUM +567 0x4848 //TX_FDEQ_GAIN_0 +568 0x4848 //TX_FDEQ_GAIN_1 +569 0x4850 //TX_FDEQ_GAIN_2 +570 0x5050 //TX_FDEQ_GAIN_3 +571 0x4B48 //TX_FDEQ_GAIN_4 +572 0x484B //TX_FDEQ_GAIN_5 +573 0x4B5C //TX_FDEQ_GAIN_6 +574 0x564E //TX_FDEQ_GAIN_7 +575 0x4C4E //TX_FDEQ_GAIN_8 +576 0x4E45 //TX_FDEQ_GAIN_9 +577 0x494A //TX_FDEQ_GAIN_10 +578 0x534D //TX_FDEQ_GAIN_11 +579 0x5C57 //TX_FDEQ_GAIN_12 +580 0x5667 //TX_FDEQ_GAIN_13 +581 0x6778 //TX_FDEQ_GAIN_14 +582 0x8087 //TX_FDEQ_GAIN_15 +583 0x4848 //TX_FDEQ_GAIN_16 +584 0x4848 //TX_FDEQ_GAIN_17 +585 0x4848 //TX_FDEQ_GAIN_18 +586 0x4848 //TX_FDEQ_GAIN_19 +587 0x4848 //TX_FDEQ_GAIN_20 +588 0x4848 //TX_FDEQ_GAIN_21 +589 0x4848 //TX_FDEQ_GAIN_22 +590 0x4848 //TX_FDEQ_GAIN_23 +591 0x0202 //TX_FDEQ_BIN_0 +592 0x0203 //TX_FDEQ_BIN_1 +593 0x0303 //TX_FDEQ_BIN_2 +594 0x0304 //TX_FDEQ_BIN_3 +595 0x0405 //TX_FDEQ_BIN_4 +596 0x0506 //TX_FDEQ_BIN_5 +597 0x0708 //TX_FDEQ_BIN_6 +598 0x090A //TX_FDEQ_BIN_7 +599 0x0B0C //TX_FDEQ_BIN_8 +600 0x0D0E //TX_FDEQ_BIN_9 +601 0x1013 //TX_FDEQ_BIN_10 +602 0x1719 //TX_FDEQ_BIN_11 +603 0x1B1E //TX_FDEQ_BIN_12 +604 0x1E1E //TX_FDEQ_BIN_13 +605 0x1E28 //TX_FDEQ_BIN_14 +606 0x282C //TX_FDEQ_BIN_15 +607 0x0000 //TX_FDEQ_BIN_16 +608 0x0000 //TX_FDEQ_BIN_17 +609 0x0000 //TX_FDEQ_BIN_18 +610 0x0000 //TX_FDEQ_BIN_19 +611 0x0000 //TX_FDEQ_BIN_20 +612 0x0000 //TX_FDEQ_BIN_21 +613 0x0000 //TX_FDEQ_BIN_22 +614 0x0000 //TX_FDEQ_BIN_23 +615 0x0000 //TX_FDEQ_PADDING +616 0x0030 //TX_PREEQ_SUBNUM_MIC0 +617 0x4848 //TX_PREEQ_GAIN_MIC0_0 +618 0x4848 //TX_PREEQ_GAIN_MIC0_1 +619 0x4848 //TX_PREEQ_GAIN_MIC0_2 +620 0x4848 //TX_PREEQ_GAIN_MIC0_3 +621 0x4848 //TX_PREEQ_GAIN_MIC0_4 +622 0x4848 //TX_PREEQ_GAIN_MIC0_5 +623 0x4848 //TX_PREEQ_GAIN_MIC0_6 +624 0x4848 //TX_PREEQ_GAIN_MIC0_7 +625 0x4848 //TX_PREEQ_GAIN_MIC0_8 +626 0x4848 //TX_PREEQ_GAIN_MIC0_9 +627 0x4848 //TX_PREEQ_GAIN_MIC0_10 +628 0x4848 //TX_PREEQ_GAIN_MIC0_11 +629 0x4848 //TX_PREEQ_GAIN_MIC0_12 +630 0x4848 //TX_PREEQ_GAIN_MIC0_13 +631 0x4848 //TX_PREEQ_GAIN_MIC0_14 +632 0x4848 //TX_PREEQ_GAIN_MIC0_15 +633 0x4848 //TX_PREEQ_GAIN_MIC0_16 +634 0x4848 //TX_PREEQ_GAIN_MIC0_17 +635 0x4848 //TX_PREEQ_GAIN_MIC0_18 +636 0x4848 //TX_PREEQ_GAIN_MIC0_19 +637 0x4848 //TX_PREEQ_GAIN_MIC0_20 +638 0x4848 //TX_PREEQ_GAIN_MIC0_21 +639 0x4848 //TX_PREEQ_GAIN_MIC0_22 +640 0x4848 //TX_PREEQ_GAIN_MIC0_23 +641 0x0202 //TX_PREEQ_BIN_MIC0_0 +642 0x0203 //TX_PREEQ_BIN_MIC0_1 +643 0x0303 //TX_PREEQ_BIN_MIC0_2 +644 0x0304 //TX_PREEQ_BIN_MIC0_3 +645 0x0405 //TX_PREEQ_BIN_MIC0_4 +646 0x0506 //TX_PREEQ_BIN_MIC0_5 +647 0x0808 //TX_PREEQ_BIN_MIC0_6 +648 0x0809 //TX_PREEQ_BIN_MIC0_7 +649 0x0A0A //TX_PREEQ_BIN_MIC0_8 +650 0x0C10 //TX_PREEQ_BIN_MIC0_9 +651 0x1013 //TX_PREEQ_BIN_MIC0_10 +652 0x1414 //TX_PREEQ_BIN_MIC0_11 +653 0x261E //TX_PREEQ_BIN_MIC0_12 +654 0x1E14 //TX_PREEQ_BIN_MIC0_13 +655 0x1414 //TX_PREEQ_BIN_MIC0_14 +656 0x2814 //TX_PREEQ_BIN_MIC0_15 +657 0x401E //TX_PREEQ_BIN_MIC0_16 +658 0x0000 //TX_PREEQ_BIN_MIC0_17 +659 0x0000 //TX_PREEQ_BIN_MIC0_18 +660 0x0000 //TX_PREEQ_BIN_MIC0_19 +661 0x0000 //TX_PREEQ_BIN_MIC0_20 +662 0x0000 //TX_PREEQ_BIN_MIC0_21 +663 0x0000 //TX_PREEQ_BIN_MIC0_22 +664 0x0000 //TX_PREEQ_BIN_MIC0_23 +665 0x0030 //TX_PREEQ_SUBNUM_MIC1 +666 0x4848 //TX_PREEQ_GAIN_MIC1_0 +667 0x4848 //TX_PREEQ_GAIN_MIC1_1 +668 0x4848 //TX_PREEQ_GAIN_MIC1_2 +669 0x4848 //TX_PREEQ_GAIN_MIC1_3 +670 0x4848 //TX_PREEQ_GAIN_MIC1_4 +671 0x4848 //TX_PREEQ_GAIN_MIC1_5 +672 0x4848 //TX_PREEQ_GAIN_MIC1_6 +673 0x4849 //TX_PREEQ_GAIN_MIC1_7 +674 0x4A4A //TX_PREEQ_GAIN_MIC1_8 +675 0x4B4D //TX_PREEQ_GAIN_MIC1_9 +676 0x4E4F //TX_PREEQ_GAIN_MIC1_10 +677 0x5052 //TX_PREEQ_GAIN_MIC1_11 +678 0x5354 //TX_PREEQ_GAIN_MIC1_12 +679 0x5454 //TX_PREEQ_GAIN_MIC1_13 +680 0x5653 //TX_PREEQ_GAIN_MIC1_14 +681 0x4C48 //TX_PREEQ_GAIN_MIC1_15 +682 0x4444 //TX_PREEQ_GAIN_MIC1_16 +683 0x4848 //TX_PREEQ_GAIN_MIC1_17 +684 0x4848 //TX_PREEQ_GAIN_MIC1_18 +685 0x4848 //TX_PREEQ_GAIN_MIC1_19 +686 0x4848 //TX_PREEQ_GAIN_MIC1_20 +687 0x4848 //TX_PREEQ_GAIN_MIC1_21 +688 0x4848 //TX_PREEQ_GAIN_MIC1_22 +689 0x4848 //TX_PREEQ_GAIN_MIC1_23 +690 0x0202 //TX_PREEQ_BIN_MIC1_0 +691 0x0203 //TX_PREEQ_BIN_MIC1_1 +692 0x0303 //TX_PREEQ_BIN_MIC1_2 +693 0x0304 //TX_PREEQ_BIN_MIC1_3 +694 0x0405 //TX_PREEQ_BIN_MIC1_4 +695 0x0506 //TX_PREEQ_BIN_MIC1_5 +696 0x0808 //TX_PREEQ_BIN_MIC1_6 +697 0x0809 //TX_PREEQ_BIN_MIC1_7 +698 0x0A0A //TX_PREEQ_BIN_MIC1_8 +699 0x0C10 //TX_PREEQ_BIN_MIC1_9 +700 0x1013 //TX_PREEQ_BIN_MIC1_10 +701 0x1414 //TX_PREEQ_BIN_MIC1_11 +702 0x261E //TX_PREEQ_BIN_MIC1_12 +703 0x1E14 //TX_PREEQ_BIN_MIC1_13 +704 0x1414 //TX_PREEQ_BIN_MIC1_14 +705 0x2814 //TX_PREEQ_BIN_MIC1_15 +706 0x401E //TX_PREEQ_BIN_MIC1_16 +707 0x0000 //TX_PREEQ_BIN_MIC1_17 +708 0x0000 //TX_PREEQ_BIN_MIC1_18 +709 0x0000 //TX_PREEQ_BIN_MIC1_19 +710 0x0000 //TX_PREEQ_BIN_MIC1_20 +711 0x0000 //TX_PREEQ_BIN_MIC1_21 +712 0x0000 //TX_PREEQ_BIN_MIC1_22 +713 0x0000 //TX_PREEQ_BIN_MIC1_23 +714 0x0020 //TX_PREEQ_SUBNUM_MIC2 +715 0x4848 //TX_PREEQ_GAIN_MIC2_0 +716 0x4848 //TX_PREEQ_GAIN_MIC2_1 +717 0x4848 //TX_PREEQ_GAIN_MIC2_2 +718 0x4848 //TX_PREEQ_GAIN_MIC2_3 +719 0x4848 //TX_PREEQ_GAIN_MIC2_4 +720 0x4848 //TX_PREEQ_GAIN_MIC2_5 +721 0x494B //TX_PREEQ_GAIN_MIC2_6 +722 0x4C4D //TX_PREEQ_GAIN_MIC2_7 +723 0x4E4F //TX_PREEQ_GAIN_MIC2_8 +724 0x5051 //TX_PREEQ_GAIN_MIC2_9 +725 0x5255 //TX_PREEQ_GAIN_MIC2_10 +726 0x5754 //TX_PREEQ_GAIN_MIC2_11 +727 0x5454 //TX_PREEQ_GAIN_MIC2_12 +728 0x544F //TX_PREEQ_GAIN_MIC2_13 +729 0x463D //TX_PREEQ_GAIN_MIC2_14 +730 0x4A48 //TX_PREEQ_GAIN_MIC2_15 +731 0x4848 //TX_PREEQ_GAIN_MIC2_16 +732 0x4848 //TX_PREEQ_GAIN_MIC2_17 +733 0x4848 //TX_PREEQ_GAIN_MIC2_18 +734 0x4848 //TX_PREEQ_GAIN_MIC2_19 +735 0x4848 //TX_PREEQ_GAIN_MIC2_20 +736 0x4848 //TX_PREEQ_GAIN_MIC2_21 +737 0x4848 //TX_PREEQ_GAIN_MIC2_22 +738 0x4848 //TX_PREEQ_GAIN_MIC2_23 +739 0x0203 //TX_PREEQ_BIN_MIC2_0 +740 0x0303 //TX_PREEQ_BIN_MIC2_1 +741 0x0304 //TX_PREEQ_BIN_MIC2_2 +742 0x0405 //TX_PREEQ_BIN_MIC2_3 +743 0x0506 //TX_PREEQ_BIN_MIC2_4 +744 0x0808 //TX_PREEQ_BIN_MIC2_5 +745 0x0809 //TX_PREEQ_BIN_MIC2_6 +746 0x0A0A //TX_PREEQ_BIN_MIC2_7 +747 0x0C10 //TX_PREEQ_BIN_MIC2_8 +748 0x1013 //TX_PREEQ_BIN_MIC2_9 +749 0x1414 //TX_PREEQ_BIN_MIC2_10 +750 0x261E //TX_PREEQ_BIN_MIC2_11 +751 0x1E14 //TX_PREEQ_BIN_MIC2_12 +752 0x1414 //TX_PREEQ_BIN_MIC2_13 +753 0x2814 //TX_PREEQ_BIN_MIC2_14 +754 0x4022 //TX_PREEQ_BIN_MIC2_15 +755 0x0000 //TX_PREEQ_BIN_MIC2_16 +756 0x0000 //TX_PREEQ_BIN_MIC2_17 +757 0x0000 //TX_PREEQ_BIN_MIC2_18 +758 0x0000 //TX_PREEQ_BIN_MIC2_19 +759 0x0000 //TX_PREEQ_BIN_MIC2_20 +760 0x0000 //TX_PREEQ_BIN_MIC2_21 +761 0x0000 //TX_PREEQ_BIN_MIC2_22 +762 0x0000 //TX_PREEQ_BIN_MIC2_23 +763 0x0006 //TX_MASKING_ABILITY +764 0x0800 //TX_NND_WEIGHT +765 0x0050 //TX_MIC_CALIBRATION_0 +766 0x0065 //TX_MIC_CALIBRATION_1 +767 0x0050 //TX_MIC_CALIBRATION_2 +768 0x0050 //TX_MIC_CALIBRATION_3 +769 0x0046 //TX_MIC_PWR_BIAS_0 +770 0x0040 //TX_MIC_PWR_BIAS_1 +771 0x0046 //TX_MIC_PWR_BIAS_2 +772 0x0046 //TX_MIC_PWR_BIAS_3 +773 0x0000 //TX_GAIN_LIMIT_0 +774 0x000F //TX_GAIN_LIMIT_1 +775 0x0000 //TX_GAIN_LIMIT_2 +776 0x0000 //TX_GAIN_LIMIT_3 +777 0x7F5B //TX_BVE_NOVAD0_ALPHADOWN +778 0x7FDE //TX_BVE_VAD0_ALPHAUP +779 0x7F3A //TX_BVE_VAD0_ALPHADOWN +780 0x2000 //TX_BVE_GAINWEIGHT_NOFEVADLI +781 0x7F5B //TX_BVE_FEVADLI_ALPHA +782 0x7F19 //TX_BVE_NOVAD0_ALPHAUP +783 0x0800 //TX_TDDRC_ALPHA_UP_01 +784 0x0800 //TX_TDDRC_ALPHA_UP_02 +785 0x0800 //TX_TDDRC_ALPHA_UP_03 +786 0x0800 //TX_TDDRC_ALPHA_UP_04 +787 0x7EB8 //TX_TDDRC_ALPHA_DWN_01 +788 0x7EB8 //TX_TDDRC_ALPHA_DWN_02 +789 0x7EB8 //TX_TDDRC_ALPHA_DWN_03 +790 0x7EB8 //TX_TDDRC_ALPHA_DWN_04 +791 0x7FFF //TX_TDDRC_TD_DRC_LIMIT +792 0x0800 //TX_TDDRC_POST_LIMIT_GAIN +793 0x0000 //TX_TDDRC_RESRV_0 +794 0x0000 //TX_TDDRC_RESRV_1 +795 0x0018 //TX_FDDRC_BAND_MARGIN_0 +796 0x0030 //TX_FDDRC_BAND_MARGIN_1 +797 0x0050 //TX_FDDRC_BAND_MARGIN_2 +798 0x0080 //TX_FDDRC_BAND_MARGIN_3 +799 0x0007 //TX_FDDRC_BLOCK_EXP +800 0x5000 //TX_FDDRC_THRD_2_0 +801 0x5000 //TX_FDDRC_THRD_2_1 +802 0x5000 //TX_FDDRC_THRD_2_2 +803 0x5000 //TX_FDDRC_THRD_2_3 +804 0x6400 //TX_FDDRC_THRD_3_0 +805 0x6400 //TX_FDDRC_THRD_3_1 +806 0x6400 //TX_FDDRC_THRD_3_2 +807 0x6400 //TX_FDDRC_THRD_3_3 +808 0x2000 //TX_FDDRC_SLANT_0_0 +809 0x2000 //TX_FDDRC_SLANT_0_1 +810 0x2000 //TX_FDDRC_SLANT_0_2 +811 0x2000 //TX_FDDRC_SLANT_0_3 +812 0x5333 //TX_FDDRC_SLANT_1_0 +813 0x5333 //TX_FDDRC_SLANT_1_1 +814 0x5333 //TX_FDDRC_SLANT_1_2 +815 0x5333 //TX_FDDRC_SLANT_1_3 +816 0x0010 //TX_DEADMIC_SILENCE_TH +817 0x0600 //TX_MIC_DEGRADE_TH +818 0x0078 //TX_DEADMIC_CNT +819 0x0078 //TX_MIC_DEGRADE_CNT +820 0x0000 //TX_FDDRC_RESRV_4 +821 0x0000 //TX_FDDRC_RESRV_5 +822 0x0000 //TX_FDDRC_RESRV_6 +823 0x7FFF //TX_KS_NOISEPASTE_FACTOR +824 0x0001 //TX_KS_CONFIG +825 0x7FFF //TX_KS_GAIN_MIN +826 0x0000 //TX_KS_RESRV_0 +827 0x0000 //TX_KS_RESRV_1 +828 0x0000 //TX_KS_RESRV_2 +829 0x7C00 //TX_LAMBDA_PKA_FP +830 0x2000 //TX_TPKA_FP +831 0x0080 //TX_MIN_G_FP +832 0x2000 //TX_MAX_G_FP +833 0x4848 //TX_FFP_FP_K_METAL +834 0x4000 //TX_A_POST_FLT_FP +835 0x0F5C //TX_RTO_OUTBEAM_TH +836 0x4CCD //TX_TPKA_FP_THD +837 0x0000 //TX_MAX_G_FP_BLK +838 0x0000 //TX_FFP_FADEIN +839 0x0000 //TX_FFP_FADEOUT +840 0x0000 //TX_WHISPERCTH +841 0x0000 //TX_WHISPERHOLDT +842 0x0000 //TX_WHISP_ENTHH +843 0x0000 //TX_WHISP_ENTHL +844 0x0000 //TX_WHISP_RTOTH +845 0x0000 //TX_WHISP_RTOTH2 +846 0x0096 //TX_MUTE_PERIOD +847 0x0000 //TX_FADE_IN_PERIOD +848 0x0100 //TX_FFP_RESRV_2 +849 0x0020 //TX_FFP_RESRV_3 +850 0x0000 //TX_FFP_RESRV_4 +851 0x0000 //TX_FFP_RESRV_5 +852 0x0000 //TX_FFP_RESRV_6 +853 0x0002 //TX_FILTINDX +854 0x0003 //TX_TDDRC_THRD_0 +855 0x0004 //TX_TDDRC_THRD_1 +856 0x1000 //TX_TDDRC_THRD_2 +857 0x1000 //TX_TDDRC_THRD_3 +858 0x6000 //TX_TDDRC_SLANT_0 +859 0x6000 //TX_TDDRC_SLANT_1 +860 0x0800 //TX_TDDRC_ALPHA_UP_00 +861 0x7EB8 //TX_TDDRC_ALPHA_DWN_00 +862 0x0000 //TX_TDDRC_HMNC_FLAG +863 0x199A //TX_TDDRC_HMNC_GAIN +864 0x0000 //TX_TDDRC_SMT_FLAG +865 0x0CCD //TX_TDDRC_SMT_W +866 0x0E21 //TX_TDDRC_DRC_GAIN +867 0x7FFF //TX_TDDRC_LMT_THRD +868 0x0000 //TX_TDDRC_LMT_ALPHA +869 0x0000 //TX_TFMASKLTH +870 0x0000 //TX_TFMASKLTHL +871 0x0CCD //TX_TFMASKHTH +872 0x0CCD //TX_TFMASKLTH_BINVAD +873 0xF333 //TX_TFMASKLTH_NS_EST +874 0x2CCD //TX_TFMASKLTH_DOA +875 0xECCD //TX_TFMASKTH_BLESSCUT +876 0x1000 //TX_B_LESSCUT_RTO_MASK +877 0x3800 //TX_SB_RHO_MEAN_TH_ABN +878 0x2000 //TX_B_POST_FLT_MASK +879 0x0000 //TX_B_POST_FLT_MASK1 +880 0x5333 //TX_GAIN_WIND_MASK +881 0x7FFF //TX_TFMASK_BFSTRICT_MUSIC +882 0x0000 //TX_TFMASK_BFSTRICT_NOMUSIC +883 0x7333 //TX_FASTNS_OUTIN_TH +884 0x0CCD //TX_FASTNS_TFMASK_TH +885 0x0CCD //TX_FASTNS_TFMASKBIN_TH1 +886 0x0CCD //TX_FASTNS_TFMASKBIN_TH2 +887 0x0CCD //TX_FASTNS_TFMASKBIN_TH3 +888 0x00C8 //TX_FASTNS_ARSPC_TH +889 0xC000 //TX_FASTNS_MASK5_TH +890 0x4848 //TX_POSTSSA_MIN_G_VR_MASK +891 0x4000 //TX_A_LESSCUT_RTO_MASK +892 0x1770 //TX_FASTNS_NOISETH +893 0xC000 //TX_FASTNS_SSA_THLFL +894 0xC000 //TX_FASTNS_SSA_THHFL +895 0xCCCC //TX_FASTNS_SSA_THLFH +896 0xD999 //TX_FASTNS_SSA_THHFH +897 0x2339 //TX_SENDFUNC_REG_MICMUTE +898 0x0021 //TX_SENDFUNC_REG_MICMUTE1 +899 0x02BC //TX_MICMUTE_RATIO_THR +900 0x0140 //TX_MICMUTE_AMP_THR +901 0x0004 //TX_MICMUTE_HPF_IND +902 0x00C0 //TX_MICMUTE_LOG_EYR_TH +903 0x0008 //TX_MICMUTE_CVG_TIME +904 0x0008 //TX_MICMUTE_RELEASE_TIME +905 0x01FE //TX_MIC_VOLUME_MIC0MUTE +906 0x0020 //TX_MICMUTE_EPD_OFFSET_0 +907 0x001E //TX_MICMUTE_FRQ_AEC_L +908 0x7999 //TX_MICMUTE_EAD_THR +909 0x7FFF //TX_MICMUTE_LAMBDA_CB_NLE +910 0x7FFF //TX_MICMUTE_LAMBDA_RE_EST +911 0x4000 //TX_DTD_THR1_MICMUTE_0 +912 0x7000 //TX_DTD_THR1_MICMUTE_1 +913 0x7FFF //TX_DTD_THR1_MICMUTE_2 +914 0x7FFF //TX_DTD_THR1_MICMUTE_3 +915 0x6CCC //TX_DTD_THR2_MICMUTE_0 +916 0x0400 //TX_MICMUTE_MIN_EQ_RE_EST_0 +917 0x0400 //TX_MICMUTE_MIN_EQ_RE_EST_1 +918 0x1000 //TX_MICMUTE_MIN_EQ_RE_EST_2 +919 0x7FFF //TX_MICMUTE_MIN_EQ_RE_EST_3 +920 0x7FFF //TX_MICMUTE_MIN_EQ_RE_EST_4 +921 0x4000 //TX_MICMUTE_C_POST_FLT +922 0x03E8 //TX_MICMUTE_DT_CUT_K +923 0x0001 //TX_MICMUTE_DT_CUT_THR +924 0x03E8 //TX_MICMUTE_DT_CUT_K2 +925 0x0001 //TX_MICMUTE_DT_CUT_THR2 +926 0x0064 //TX_MICMUTE_DT2_HOLD_N +927 0x1000 //TX_MICMUTE_RATIODTH_THCUT +928 0x1000 //TX_MICMUTE_B_POST_FLT_ECHOL +929 0x7FFF //TX_MICMUTE_B_POST_FLT_ECHOH +930 0x0400 //TX_MICMUTE_C_POST_FLT_MASK +931 0x7999 //TX_MICMUTE_RATIODTL_CUT_TH +932 0x0258 //TX_MICMUTE_DT_CUT_K1 +933 0x0800 //TX_MICMUTE_N2_SN_EST +934 0xFC00 //TX_MICMUTE_THR_SN_EST_0 +935 0x001C //TX_MICMUTE_MIN_G_CTRL_0 +936 0x6000 //TX_MICMUTE_A_POST_FILT_S_0 +937 0x7000 //TX_MICMUTE_B_POST_FILT_0 +938 0x2710 //TX_MIC1RUB_AMP_THR +939 0x0010 //TX_MIC1MUTE_RATIO_THR +940 0x0450 //TX_MIC1MUTE_AMP_THR +941 0x0008 //TX_MIC1MUTE_CVG_TIME +942 0x0008 //TX_MIC1MUTE_RELEASE_TIME +943 0x0000 //TX_AMS_RESRV_01 +944 0x0000 //TX_AMS_RESRV_02 +945 0x0000 //TX_AMS_RESRV_03 +946 0x0000 //TX_AMS_RESRV_04 +947 0x0000 //TX_AMS_RESRV_05 +948 0x0000 //TX_AMS_RESRV_06 +949 0x0000 //TX_AMS_RESRV_07 +950 0x0000 //TX_AMS_RESRV_08 +951 0x0000 //TX_AMS_RESRV_09 +952 0x0000 //TX_AMS_RESRV_10 +953 0x0000 //TX_AMS_RESRV_11 +954 0x0000 //TX_AMS_RESRV_12 +955 0x0000 //TX_AMS_RESRV_13 +956 0x0000 //TX_AMS_RESRV_14 +957 0x0000 //TX_AMS_RESRV_15 +958 0x0000 //TX_AMS_RESRV_16 +959 0x0000 //TX_AMS_RESRV_17 +960 0x0000 //TX_AMS_RESRV_18 +961 0x0000 //TX_AMS_RESRV_19 +#RX +0 0x206C //RX_RECVFUNC_MODE_0 +1 0x0000 //RX_RECVFUNC_MODE_1 +2 0x0003 //RX_SAMPLINGFREQ_SIG +3 0x0003 //RX_SAMPLINGFREQ_PROC +4 0x000A //RX_FRAME_SZ +5 0x0000 //RX_DELAY_OPT +6 0x6000 //RX_TDDRC_ALPHA_UP_1 +7 0x6000 //RX_TDDRC_ALPHA_UP_2 +8 0x6000 //RX_TDDRC_ALPHA_UP_3 +9 0x1000 //RX_TDDRC_ALPHA_UP_4 +10 0x0800 //RX_PGA +11 0x7652 //RX_A_HP +12 0x4000 //RX_B_PE +13 0x7800 //RX_THR_PITCH_DET_0 +14 0x7000 //RX_THR_PITCH_DET_1 +15 0x6000 //RX_THR_PITCH_DET_2 +16 0x0008 //RX_PITCH_BFR_LEN +17 0x0003 //RX_SBD_PITCH_DET +18 0x0100 //RX_PP_RESRV_0 +19 0x0020 //RX_PP_RESRV_1 +20 0x0400 //RX_N_SN_EST +21 0x000C //RX_N2_SN_EST +22 0x0010 //RX_NS_LVL_CTRL +23 0xF800 //RX_THR_SN_EST +24 0x7E00 //RX_LAMBDA_PFILT +25 0x000A //RX_FENS_RESRV_0 +26 0x0190 //RX_FENS_RESRV_1 +27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +30 0x0002 //RX_EXTRA_NS_L +31 0x0800 //RX_EXTRA_NS_A +32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +33 0x7214 //RX_TDDRC_LIMITER_THRD +34 0x0800 //RX_TDDRC_LIMITER_GAIN +35 0x199A //RX_A_POST_FLT +36 0x0000 //RX_LMT_THRD +37 0x4000 //RX_LMT_ALPHA +38 0x0020 //RX_FDEQ_SUBNUM +39 0x4848 //RX_FDEQ_GAIN_0 +40 0x3B3B //RX_FDEQ_GAIN_1 +41 0x3942 //RX_FDEQ_GAIN_2 +42 0x4645 //RX_FDEQ_GAIN_3 +43 0x494A //RX_FDEQ_GAIN_4 +44 0x5D5A //RX_FDEQ_GAIN_5 +45 0x5B5B //RX_FDEQ_GAIN_6 +46 0x5A51 //RX_FDEQ_GAIN_7 +47 0x514F //RX_FDEQ_GAIN_8 +48 0x5568 //RX_FDEQ_GAIN_9 +49 0x7460 //RX_FDEQ_GAIN_10 +50 0x544E //RX_FDEQ_GAIN_11 +51 0x4848 //RX_FDEQ_GAIN_12 +52 0x484A //RX_FDEQ_GAIN_13 +53 0x5155 //RX_FDEQ_GAIN_14 +54 0x577B //RX_FDEQ_GAIN_15 +55 0x4848 //RX_FDEQ_GAIN_16 +56 0x4848 //RX_FDEQ_GAIN_17 +57 0x4848 //RX_FDEQ_GAIN_18 +58 0x4848 //RX_FDEQ_GAIN_19 +59 0x4848 //RX_FDEQ_GAIN_20 +60 0x4848 //RX_FDEQ_GAIN_21 +61 0x4848 //RX_FDEQ_GAIN_22 +62 0x4848 //RX_FDEQ_GAIN_23 +63 0x0202 //RX_FDEQ_BIN_0 +64 0x0203 //RX_FDEQ_BIN_1 +65 0x0303 //RX_FDEQ_BIN_2 +66 0x0304 //RX_FDEQ_BIN_3 +67 0x0404 //RX_FDEQ_BIN_4 +68 0x0308 //RX_FDEQ_BIN_5 +69 0x0808 //RX_FDEQ_BIN_6 +70 0x090A //RX_FDEQ_BIN_7 +71 0x0B0C //RX_FDEQ_BIN_8 +72 0x0D0E //RX_FDEQ_BIN_9 +73 0x1013 //RX_FDEQ_BIN_10 +74 0x1719 //RX_FDEQ_BIN_11 +75 0x1B1E //RX_FDEQ_BIN_12 +76 0x1E1E //RX_FDEQ_BIN_13 +77 0x1E28 //RX_FDEQ_BIN_14 +78 0x282C //RX_FDEQ_BIN_15 +79 0x0000 //RX_FDEQ_BIN_16 +80 0x0000 //RX_FDEQ_BIN_17 +81 0x0000 //RX_FDEQ_BIN_18 +82 0x0000 //RX_FDEQ_BIN_19 +83 0x0000 //RX_FDEQ_BIN_20 +84 0x0000 //RX_FDEQ_BIN_21 +85 0x0000 //RX_FDEQ_BIN_22 +86 0x0000 //RX_FDEQ_BIN_23 +87 0x4000 //RX_FDEQ_RESRV_0 +88 0x0320 //RX_FDEQ_RESRV_1 +89 0x0018 //RX_FDDRC_BAND_MARGIN_0 +90 0x0035 //RX_FDDRC_BAND_MARGIN_1 +91 0x00D5 //RX_FDDRC_BAND_MARGIN_2 +92 0x0120 //RX_FDDRC_BAND_MARGIN_3 +93 0x0004 //RX_FDDRC_BLOCK_EXP +94 0x5000 //RX_FDDRC_THRD_2_0 +95 0x5000 //RX_FDDRC_THRD_2_1 +96 0x2000 //RX_FDDRC_THRD_2_2 +97 0x5000 //RX_FDDRC_THRD_2_3 +98 0x6400 //RX_FDDRC_THRD_3_0 +99 0x6400 //RX_FDDRC_THRD_3_1 +100 0x2000 //RX_FDDRC_THRD_3_2 +101 0x5000 //RX_FDDRC_THRD_3_3 +102 0x4000 //RX_FDDRC_SLANT_0_0 +103 0x4000 //RX_FDDRC_SLANT_0_1 +104 0x4000 //RX_FDDRC_SLANT_0_2 +105 0x4000 //RX_FDDRC_SLANT_0_3 +106 0x7FFF //RX_FDDRC_SLANT_1_0 +107 0x7FFF //RX_FDDRC_SLANT_1_1 +108 0x7FFF //RX_FDDRC_SLANT_1_2 +109 0x7FFF //RX_FDDRC_SLANT_1_3 +110 0x0000 //RX_FDDRC_RESRV_0 +111 0x0002 //RX_FILTINDX +112 0x0002 //RX_TDDRC_THRD_0 +113 0x0004 //RX_TDDRC_THRD_1 +114 0x1A00 //RX_TDDRC_THRD_2 +115 0x1A00 //RX_TDDRC_THRD_3 +116 0x7EB8 //RX_TDDRC_SLANT_0 +117 0x2500 //RX_TDDRC_SLANT_1 +118 0x6000 //RX_TDDRC_ALPHA_UP_0 +119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +120 0x0000 //RX_TDDRC_HMNC_FLAG +121 0x199A //RX_TDDRC_HMNC_GAIN +122 0x0001 //RX_TDDRC_SMT_FLAG +123 0x0CCD //RX_TDDRC_SMT_W +124 0x032A //RX_TDDRC_DRC_GAIN +125 0x7C00 //RX_LAMBDA_PKA_FP +126 0x2000 //RX_TPKA_FP +127 0x2000 //RX_MIN_G_FP +128 0x0080 //RX_MAX_G_FP +129 0x0100 //RX_SPK_VOL +130 0x0000 //RX_VOL_RESRV_0 +131 0x0000 //RX_MAXLEVEL_CNG +132 0x3000 //RX_BWE_UV_TH +133 0x3000 //RX_BWE_UV_TH2 +134 0x1800 //RX_BWE_UV_TH3 +135 0x1000 //RX_BWE_V_TH +136 0x04CD //RX_BWE_GAIN1_V_TH1 +137 0x0F33 //RX_BWE_GAIN1_V_TH2 +138 0x7333 //RX_BWE_UV_EQ +139 0x199A //RX_BWE_V_EQ +140 0x7333 //RX_BWE_TONE_TH +141 0x0004 //RX_BWE_UV_HOLD_T +142 0x6CCD //RX_BWE_GAIN2_ALPHA +143 0x799A //RX_BWE_GAIN3_ALPHA +144 0x001E //RX_BWE_CUTOFF +145 0x3000 //RX_BWE_GAINFILL +146 0x3200 //RX_BWE_MAXTH_TONE +147 0x2000 //RX_BWE_EQ_0 +148 0x2000 //RX_BWE_EQ_1 +149 0x2000 //RX_BWE_EQ_2 +150 0x2000 //RX_BWE_EQ_3 +151 0x2000 //RX_BWE_EQ_4 +152 0x2000 //RX_BWE_EQ_5 +153 0x2000 //RX_BWE_EQ_6 +154 0x0000 //RX_BWE_RESRV_0 +155 0x0000 //RX_BWE_RESRV_1 +156 0x0000 //RX_BWE_RESRV_2 +#VOL 0 +6 0x6000 //RX_TDDRC_ALPHA_UP_1 +7 0x6000 //RX_TDDRC_ALPHA_UP_2 +8 0x6000 //RX_TDDRC_ALPHA_UP_3 +9 0x1000 //RX_TDDRC_ALPHA_UP_4 +27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +33 0x7214 //RX_TDDRC_LIMITER_THRD +34 0x0800 //RX_TDDRC_LIMITER_GAIN +112 0x0002 //RX_TDDRC_THRD_0 +113 0x0004 //RX_TDDRC_THRD_1 +114 0x1A00 //RX_TDDRC_THRD_2 +115 0x1A00 //RX_TDDRC_THRD_3 +116 0x7EB8 //RX_TDDRC_SLANT_0 +117 0x2500 //RX_TDDRC_SLANT_1 +118 0x6000 //RX_TDDRC_ALPHA_UP_0 +119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +120 0x0000 //RX_TDDRC_HMNC_FLAG +121 0x199A //RX_TDDRC_HMNC_GAIN +122 0x0001 //RX_TDDRC_SMT_FLAG +123 0x0CCD //RX_TDDRC_SMT_W +124 0x032A //RX_TDDRC_DRC_GAIN +38 0x0020 //RX_FDEQ_SUBNUM +39 0x4848 //RX_FDEQ_GAIN_0 +40 0x3B3B //RX_FDEQ_GAIN_1 +41 0x3942 //RX_FDEQ_GAIN_2 +42 0x4645 //RX_FDEQ_GAIN_3 +43 0x494A //RX_FDEQ_GAIN_4 +44 0x5D5A //RX_FDEQ_GAIN_5 +45 0x5B5B //RX_FDEQ_GAIN_6 +46 0x5A51 //RX_FDEQ_GAIN_7 +47 0x514F //RX_FDEQ_GAIN_8 +48 0x5568 //RX_FDEQ_GAIN_9 +49 0x7460 //RX_FDEQ_GAIN_10 +50 0x544E //RX_FDEQ_GAIN_11 +51 0x4848 //RX_FDEQ_GAIN_12 +52 0x484A //RX_FDEQ_GAIN_13 +53 0x5155 //RX_FDEQ_GAIN_14 +54 0x577B //RX_FDEQ_GAIN_15 +55 0x4848 //RX_FDEQ_GAIN_16 +56 0x4848 //RX_FDEQ_GAIN_17 +57 0x4848 //RX_FDEQ_GAIN_18 +58 0x4848 //RX_FDEQ_GAIN_19 +59 0x4848 //RX_FDEQ_GAIN_20 +60 0x4848 //RX_FDEQ_GAIN_21 +61 0x4848 //RX_FDEQ_GAIN_22 +62 0x4848 //RX_FDEQ_GAIN_23 +63 0x0202 //RX_FDEQ_BIN_0 +64 0x0203 //RX_FDEQ_BIN_1 +65 0x0303 //RX_FDEQ_BIN_2 +66 0x0304 //RX_FDEQ_BIN_3 +67 0x0404 //RX_FDEQ_BIN_4 +68 0x0308 //RX_FDEQ_BIN_5 +69 0x0808 //RX_FDEQ_BIN_6 +70 0x090A //RX_FDEQ_BIN_7 +71 0x0B0C //RX_FDEQ_BIN_8 +72 0x0D0E //RX_FDEQ_BIN_9 +73 0x1013 //RX_FDEQ_BIN_10 +74 0x1719 //RX_FDEQ_BIN_11 +75 0x1B1E //RX_FDEQ_BIN_12 +76 0x1E1E //RX_FDEQ_BIN_13 +77 0x1E28 //RX_FDEQ_BIN_14 +78 0x282C //RX_FDEQ_BIN_15 +79 0x0000 //RX_FDEQ_BIN_16 +80 0x0000 //RX_FDEQ_BIN_17 +81 0x0000 //RX_FDEQ_BIN_18 +82 0x0000 //RX_FDEQ_BIN_19 +83 0x0000 //RX_FDEQ_BIN_20 +84 0x0000 //RX_FDEQ_BIN_21 +85 0x0000 //RX_FDEQ_BIN_22 +86 0x0000 //RX_FDEQ_BIN_23 +87 0x4000 //RX_FDEQ_RESRV_0 +88 0x0320 //RX_FDEQ_RESRV_1 +89 0x0018 //RX_FDDRC_BAND_MARGIN_0 +90 0x0035 //RX_FDDRC_BAND_MARGIN_1 +91 0x00D5 //RX_FDDRC_BAND_MARGIN_2 +92 0x0120 //RX_FDDRC_BAND_MARGIN_3 +93 0x0004 //RX_FDDRC_BLOCK_EXP +94 0x5000 //RX_FDDRC_THRD_2_0 +95 0x5000 //RX_FDDRC_THRD_2_1 +96 0x2000 //RX_FDDRC_THRD_2_2 +97 0x5000 //RX_FDDRC_THRD_2_3 +98 0x6400 //RX_FDDRC_THRD_3_0 +99 0x6400 //RX_FDDRC_THRD_3_1 +100 0x2000 //RX_FDDRC_THRD_3_2 +101 0x5000 //RX_FDDRC_THRD_3_3 +102 0x4000 //RX_FDDRC_SLANT_0_0 +103 0x4000 //RX_FDDRC_SLANT_0_1 +104 0x4000 //RX_FDDRC_SLANT_0_2 +105 0x4000 //RX_FDDRC_SLANT_0_3 +106 0x7FFF //RX_FDDRC_SLANT_1_0 +107 0x7FFF //RX_FDDRC_SLANT_1_1 +108 0x7FFF //RX_FDDRC_SLANT_1_2 +109 0x7FFF //RX_FDDRC_SLANT_1_3 +110 0x0000 //RX_FDDRC_RESRV_0 +129 0x0100 //RX_SPK_VOL +130 0x0000 //RX_VOL_RESRV_0 +#VOL 1 +6 0x6000 //RX_TDDRC_ALPHA_UP_1 +7 0x6000 //RX_TDDRC_ALPHA_UP_2 +8 0x6000 //RX_TDDRC_ALPHA_UP_3 +9 0x1000 //RX_TDDRC_ALPHA_UP_4 +27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +33 0x7214 //RX_TDDRC_LIMITER_THRD +34 0x0800 //RX_TDDRC_LIMITER_GAIN +112 0x0002 //RX_TDDRC_THRD_0 +113 0x0004 //RX_TDDRC_THRD_1 +114 0x1A00 //RX_TDDRC_THRD_2 +115 0x1A00 //RX_TDDRC_THRD_3 +116 0x7EB8 //RX_TDDRC_SLANT_0 +117 0x2500 //RX_TDDRC_SLANT_1 +118 0x6000 //RX_TDDRC_ALPHA_UP_0 +119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +120 0x0000 //RX_TDDRC_HMNC_FLAG +121 0x199A //RX_TDDRC_HMNC_GAIN +122 0x0001 //RX_TDDRC_SMT_FLAG +123 0x0CCD //RX_TDDRC_SMT_W +124 0x032A //RX_TDDRC_DRC_GAIN +38 0x0020 //RX_FDEQ_SUBNUM +39 0x4848 //RX_FDEQ_GAIN_0 +40 0x3B3B //RX_FDEQ_GAIN_1 +41 0x3942 //RX_FDEQ_GAIN_2 +42 0x4645 //RX_FDEQ_GAIN_3 +43 0x494A //RX_FDEQ_GAIN_4 +44 0x5D5A //RX_FDEQ_GAIN_5 +45 0x5B5B //RX_FDEQ_GAIN_6 +46 0x5A51 //RX_FDEQ_GAIN_7 +47 0x514F //RX_FDEQ_GAIN_8 +48 0x5568 //RX_FDEQ_GAIN_9 +49 0x7460 //RX_FDEQ_GAIN_10 +50 0x544E //RX_FDEQ_GAIN_11 +51 0x4848 //RX_FDEQ_GAIN_12 +52 0x484A //RX_FDEQ_GAIN_13 +53 0x5155 //RX_FDEQ_GAIN_14 +54 0x577B //RX_FDEQ_GAIN_15 +55 0x4848 //RX_FDEQ_GAIN_16 +56 0x4848 //RX_FDEQ_GAIN_17 +57 0x4848 //RX_FDEQ_GAIN_18 +58 0x4848 //RX_FDEQ_GAIN_19 +59 0x4848 //RX_FDEQ_GAIN_20 +60 0x4848 //RX_FDEQ_GAIN_21 +61 0x4848 //RX_FDEQ_GAIN_22 +62 0x4848 //RX_FDEQ_GAIN_23 +63 0x0202 //RX_FDEQ_BIN_0 +64 0x0203 //RX_FDEQ_BIN_1 +65 0x0303 //RX_FDEQ_BIN_2 +66 0x0304 //RX_FDEQ_BIN_3 +67 0x0404 //RX_FDEQ_BIN_4 +68 0x0308 //RX_FDEQ_BIN_5 +69 0x0808 //RX_FDEQ_BIN_6 +70 0x090A //RX_FDEQ_BIN_7 +71 0x0B0C //RX_FDEQ_BIN_8 +72 0x0D0E //RX_FDEQ_BIN_9 +73 0x1013 //RX_FDEQ_BIN_10 +74 0x1719 //RX_FDEQ_BIN_11 +75 0x1B1E //RX_FDEQ_BIN_12 +76 0x1E1E //RX_FDEQ_BIN_13 +77 0x1E28 //RX_FDEQ_BIN_14 +78 0x282C //RX_FDEQ_BIN_15 +79 0x0000 //RX_FDEQ_BIN_16 +80 0x0000 //RX_FDEQ_BIN_17 +81 0x0000 //RX_FDEQ_BIN_18 +82 0x0000 //RX_FDEQ_BIN_19 +83 0x0000 //RX_FDEQ_BIN_20 +84 0x0000 //RX_FDEQ_BIN_21 +85 0x0000 //RX_FDEQ_BIN_22 +86 0x0000 //RX_FDEQ_BIN_23 +87 0x4000 //RX_FDEQ_RESRV_0 +88 0x0320 //RX_FDEQ_RESRV_1 +89 0x0018 //RX_FDDRC_BAND_MARGIN_0 +90 0x0035 //RX_FDDRC_BAND_MARGIN_1 +91 0x00D5 //RX_FDDRC_BAND_MARGIN_2 +92 0x0120 //RX_FDDRC_BAND_MARGIN_3 +93 0x0004 //RX_FDDRC_BLOCK_EXP +94 0x5000 //RX_FDDRC_THRD_2_0 +95 0x5000 //RX_FDDRC_THRD_2_1 +96 0x2000 //RX_FDDRC_THRD_2_2 +97 0x5000 //RX_FDDRC_THRD_2_3 +98 0x6400 //RX_FDDRC_THRD_3_0 +99 0x6400 //RX_FDDRC_THRD_3_1 +100 0x2000 //RX_FDDRC_THRD_3_2 +101 0x5000 //RX_FDDRC_THRD_3_3 +102 0x4000 //RX_FDDRC_SLANT_0_0 +103 0x4000 //RX_FDDRC_SLANT_0_1 +104 0x4000 //RX_FDDRC_SLANT_0_2 +105 0x4000 //RX_FDDRC_SLANT_0_3 +106 0x7FFF //RX_FDDRC_SLANT_1_0 +107 0x7FFF //RX_FDDRC_SLANT_1_1 +108 0x7FFF //RX_FDDRC_SLANT_1_2 +109 0x7FFF //RX_FDDRC_SLANT_1_3 +110 0x0000 //RX_FDDRC_RESRV_0 +129 0x001D //RX_SPK_VOL +130 0x0000 //RX_VOL_RESRV_0 +#VOL 2 +6 0x6000 //RX_TDDRC_ALPHA_UP_1 +7 0x6000 //RX_TDDRC_ALPHA_UP_2 +8 0x6000 //RX_TDDRC_ALPHA_UP_3 +9 0x1000 //RX_TDDRC_ALPHA_UP_4 +27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +33 0x7214 //RX_TDDRC_LIMITER_THRD +34 0x0800 //RX_TDDRC_LIMITER_GAIN +112 0x0002 //RX_TDDRC_THRD_0 +113 0x0004 //RX_TDDRC_THRD_1 +114 0x1A00 //RX_TDDRC_THRD_2 +115 0x1A00 //RX_TDDRC_THRD_3 +116 0x7EB8 //RX_TDDRC_SLANT_0 +117 0x2500 //RX_TDDRC_SLANT_1 +118 0x6000 //RX_TDDRC_ALPHA_UP_0 +119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +120 0x0000 //RX_TDDRC_HMNC_FLAG +121 0x199A //RX_TDDRC_HMNC_GAIN +122 0x0001 //RX_TDDRC_SMT_FLAG +123 0x0CCD //RX_TDDRC_SMT_W +124 0x032A //RX_TDDRC_DRC_GAIN +38 0x0020 //RX_FDEQ_SUBNUM +39 0x4848 //RX_FDEQ_GAIN_0 +40 0x3B3B //RX_FDEQ_GAIN_1 +41 0x3942 //RX_FDEQ_GAIN_2 +42 0x4645 //RX_FDEQ_GAIN_3 +43 0x494A //RX_FDEQ_GAIN_4 +44 0x5D5A //RX_FDEQ_GAIN_5 +45 0x5B5B //RX_FDEQ_GAIN_6 +46 0x5A51 //RX_FDEQ_GAIN_7 +47 0x514F //RX_FDEQ_GAIN_8 +48 0x5568 //RX_FDEQ_GAIN_9 +49 0x7460 //RX_FDEQ_GAIN_10 +50 0x544E //RX_FDEQ_GAIN_11 +51 0x4848 //RX_FDEQ_GAIN_12 +52 0x484A //RX_FDEQ_GAIN_13 +53 0x5155 //RX_FDEQ_GAIN_14 +54 0x577B //RX_FDEQ_GAIN_15 +55 0x4848 //RX_FDEQ_GAIN_16 +56 0x4848 //RX_FDEQ_GAIN_17 +57 0x4848 //RX_FDEQ_GAIN_18 +58 0x4848 //RX_FDEQ_GAIN_19 +59 0x4848 //RX_FDEQ_GAIN_20 +60 0x4848 //RX_FDEQ_GAIN_21 +61 0x4848 //RX_FDEQ_GAIN_22 +62 0x4848 //RX_FDEQ_GAIN_23 +63 0x0202 //RX_FDEQ_BIN_0 +64 0x0203 //RX_FDEQ_BIN_1 +65 0x0303 //RX_FDEQ_BIN_2 +66 0x0304 //RX_FDEQ_BIN_3 +67 0x0404 //RX_FDEQ_BIN_4 +68 0x0308 //RX_FDEQ_BIN_5 +69 0x0808 //RX_FDEQ_BIN_6 +70 0x090A //RX_FDEQ_BIN_7 +71 0x0B0C //RX_FDEQ_BIN_8 +72 0x0D0E //RX_FDEQ_BIN_9 +73 0x1013 //RX_FDEQ_BIN_10 +74 0x1719 //RX_FDEQ_BIN_11 +75 0x1B1E //RX_FDEQ_BIN_12 +76 0x1E1E //RX_FDEQ_BIN_13 +77 0x1E28 //RX_FDEQ_BIN_14 +78 0x282C //RX_FDEQ_BIN_15 +79 0x0000 //RX_FDEQ_BIN_16 +80 0x0000 //RX_FDEQ_BIN_17 +81 0x0000 //RX_FDEQ_BIN_18 +82 0x0000 //RX_FDEQ_BIN_19 +83 0x0000 //RX_FDEQ_BIN_20 +84 0x0000 //RX_FDEQ_BIN_21 +85 0x0000 //RX_FDEQ_BIN_22 +86 0x0000 //RX_FDEQ_BIN_23 +87 0x4000 //RX_FDEQ_RESRV_0 +88 0x0320 //RX_FDEQ_RESRV_1 +89 0x0018 //RX_FDDRC_BAND_MARGIN_0 +90 0x0035 //RX_FDDRC_BAND_MARGIN_1 +91 0x00D5 //RX_FDDRC_BAND_MARGIN_2 +92 0x0120 //RX_FDDRC_BAND_MARGIN_3 +93 0x0004 //RX_FDDRC_BLOCK_EXP +94 0x5000 //RX_FDDRC_THRD_2_0 +95 0x5000 //RX_FDDRC_THRD_2_1 +96 0x2000 //RX_FDDRC_THRD_2_2 +97 0x5000 //RX_FDDRC_THRD_2_3 +98 0x6400 //RX_FDDRC_THRD_3_0 +99 0x6400 //RX_FDDRC_THRD_3_1 +100 0x2000 //RX_FDDRC_THRD_3_2 +101 0x5000 //RX_FDDRC_THRD_3_3 +102 0x4000 //RX_FDDRC_SLANT_0_0 +103 0x4000 //RX_FDDRC_SLANT_0_1 +104 0x4000 //RX_FDDRC_SLANT_0_2 +105 0x4000 //RX_FDDRC_SLANT_0_3 +106 0x7FFF //RX_FDDRC_SLANT_1_0 +107 0x7FFF //RX_FDDRC_SLANT_1_1 +108 0x7FFF //RX_FDDRC_SLANT_1_2 +109 0x7FFF //RX_FDDRC_SLANT_1_3 +110 0x0000 //RX_FDDRC_RESRV_0 +129 0x0029 //RX_SPK_VOL +130 0x0000 //RX_VOL_RESRV_0 +#VOL 3 +6 0x6000 //RX_TDDRC_ALPHA_UP_1 +7 0x6000 //RX_TDDRC_ALPHA_UP_2 +8 0x6000 //RX_TDDRC_ALPHA_UP_3 +9 0x1000 //RX_TDDRC_ALPHA_UP_4 +27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +33 0x7214 //RX_TDDRC_LIMITER_THRD +34 0x0800 //RX_TDDRC_LIMITER_GAIN +112 0x0002 //RX_TDDRC_THRD_0 +113 0x0004 //RX_TDDRC_THRD_1 +114 0x1A00 //RX_TDDRC_THRD_2 +115 0x1A00 //RX_TDDRC_THRD_3 +116 0x7EB8 //RX_TDDRC_SLANT_0 +117 0x2500 //RX_TDDRC_SLANT_1 +118 0x6000 //RX_TDDRC_ALPHA_UP_0 +119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +120 0x0000 //RX_TDDRC_HMNC_FLAG +121 0x199A //RX_TDDRC_HMNC_GAIN +122 0x0001 //RX_TDDRC_SMT_FLAG +123 0x0CCD //RX_TDDRC_SMT_W +124 0x032A //RX_TDDRC_DRC_GAIN +38 0x0020 //RX_FDEQ_SUBNUM +39 0x4848 //RX_FDEQ_GAIN_0 +40 0x3B3B //RX_FDEQ_GAIN_1 +41 0x3942 //RX_FDEQ_GAIN_2 +42 0x4645 //RX_FDEQ_GAIN_3 +43 0x494A //RX_FDEQ_GAIN_4 +44 0x5D5A //RX_FDEQ_GAIN_5 +45 0x5B5B //RX_FDEQ_GAIN_6 +46 0x5A51 //RX_FDEQ_GAIN_7 +47 0x514F //RX_FDEQ_GAIN_8 +48 0x5568 //RX_FDEQ_GAIN_9 +49 0x7460 //RX_FDEQ_GAIN_10 +50 0x544E //RX_FDEQ_GAIN_11 +51 0x4848 //RX_FDEQ_GAIN_12 +52 0x484A //RX_FDEQ_GAIN_13 +53 0x5155 //RX_FDEQ_GAIN_14 +54 0x577B //RX_FDEQ_GAIN_15 +55 0x4848 //RX_FDEQ_GAIN_16 +56 0x4848 //RX_FDEQ_GAIN_17 +57 0x4848 //RX_FDEQ_GAIN_18 +58 0x4848 //RX_FDEQ_GAIN_19 +59 0x4848 //RX_FDEQ_GAIN_20 +60 0x4848 //RX_FDEQ_GAIN_21 +61 0x4848 //RX_FDEQ_GAIN_22 +62 0x4848 //RX_FDEQ_GAIN_23 +63 0x0202 //RX_FDEQ_BIN_0 +64 0x0203 //RX_FDEQ_BIN_1 +65 0x0303 //RX_FDEQ_BIN_2 +66 0x0304 //RX_FDEQ_BIN_3 +67 0x0404 //RX_FDEQ_BIN_4 +68 0x0308 //RX_FDEQ_BIN_5 +69 0x0808 //RX_FDEQ_BIN_6 +70 0x090A //RX_FDEQ_BIN_7 +71 0x0B0C //RX_FDEQ_BIN_8 +72 0x0D0E //RX_FDEQ_BIN_9 +73 0x1013 //RX_FDEQ_BIN_10 +74 0x1719 //RX_FDEQ_BIN_11 +75 0x1B1E //RX_FDEQ_BIN_12 +76 0x1E1E //RX_FDEQ_BIN_13 +77 0x1E28 //RX_FDEQ_BIN_14 +78 0x282C //RX_FDEQ_BIN_15 +79 0x0000 //RX_FDEQ_BIN_16 +80 0x0000 //RX_FDEQ_BIN_17 +81 0x0000 //RX_FDEQ_BIN_18 +82 0x0000 //RX_FDEQ_BIN_19 +83 0x0000 //RX_FDEQ_BIN_20 +84 0x0000 //RX_FDEQ_BIN_21 +85 0x0000 //RX_FDEQ_BIN_22 +86 0x0000 //RX_FDEQ_BIN_23 +87 0x4000 //RX_FDEQ_RESRV_0 +88 0x0320 //RX_FDEQ_RESRV_1 +89 0x0018 //RX_FDDRC_BAND_MARGIN_0 +90 0x0035 //RX_FDDRC_BAND_MARGIN_1 +91 0x00D5 //RX_FDDRC_BAND_MARGIN_2 +92 0x0120 //RX_FDDRC_BAND_MARGIN_3 +93 0x0004 //RX_FDDRC_BLOCK_EXP +94 0x5000 //RX_FDDRC_THRD_2_0 +95 0x5000 //RX_FDDRC_THRD_2_1 +96 0x2000 //RX_FDDRC_THRD_2_2 +97 0x5000 //RX_FDDRC_THRD_2_3 +98 0x6400 //RX_FDDRC_THRD_3_0 +99 0x6400 //RX_FDDRC_THRD_3_1 +100 0x2000 //RX_FDDRC_THRD_3_2 +101 0x5000 //RX_FDDRC_THRD_3_3 +102 0x4000 //RX_FDDRC_SLANT_0_0 +103 0x4000 //RX_FDDRC_SLANT_0_1 +104 0x4000 //RX_FDDRC_SLANT_0_2 +105 0x4000 //RX_FDDRC_SLANT_0_3 +106 0x7FFF //RX_FDDRC_SLANT_1_0 +107 0x7FFF //RX_FDDRC_SLANT_1_1 +108 0x7FFF //RX_FDDRC_SLANT_1_2 +109 0x7FFF //RX_FDDRC_SLANT_1_3 +110 0x0000 //RX_FDDRC_RESRV_0 +129 0x0039 //RX_SPK_VOL +130 0x0000 //RX_VOL_RESRV_0 +#VOL 4 +6 0x6000 //RX_TDDRC_ALPHA_UP_1 +7 0x6000 //RX_TDDRC_ALPHA_UP_2 +8 0x6000 //RX_TDDRC_ALPHA_UP_3 +9 0x1000 //RX_TDDRC_ALPHA_UP_4 +27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +33 0x7214 //RX_TDDRC_LIMITER_THRD +34 0x0800 //RX_TDDRC_LIMITER_GAIN +112 0x0002 //RX_TDDRC_THRD_0 +113 0x0004 //RX_TDDRC_THRD_1 +114 0x1A00 //RX_TDDRC_THRD_2 +115 0x1A00 //RX_TDDRC_THRD_3 +116 0x7EB8 //RX_TDDRC_SLANT_0 +117 0x2500 //RX_TDDRC_SLANT_1 +118 0x6000 //RX_TDDRC_ALPHA_UP_0 +119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +120 0x0000 //RX_TDDRC_HMNC_FLAG +121 0x199A //RX_TDDRC_HMNC_GAIN +122 0x0001 //RX_TDDRC_SMT_FLAG +123 0x0CCD //RX_TDDRC_SMT_W +124 0x032A //RX_TDDRC_DRC_GAIN +38 0x0020 //RX_FDEQ_SUBNUM +39 0x4848 //RX_FDEQ_GAIN_0 +40 0x3B3B //RX_FDEQ_GAIN_1 +41 0x3942 //RX_FDEQ_GAIN_2 +42 0x4645 //RX_FDEQ_GAIN_3 +43 0x494A //RX_FDEQ_GAIN_4 +44 0x5D5A //RX_FDEQ_GAIN_5 +45 0x5B5B //RX_FDEQ_GAIN_6 +46 0x5A51 //RX_FDEQ_GAIN_7 +47 0x514F //RX_FDEQ_GAIN_8 +48 0x5568 //RX_FDEQ_GAIN_9 +49 0x7460 //RX_FDEQ_GAIN_10 +50 0x544E //RX_FDEQ_GAIN_11 +51 0x4848 //RX_FDEQ_GAIN_12 +52 0x484A //RX_FDEQ_GAIN_13 +53 0x5155 //RX_FDEQ_GAIN_14 +54 0x577B //RX_FDEQ_GAIN_15 +55 0x4848 //RX_FDEQ_GAIN_16 +56 0x4848 //RX_FDEQ_GAIN_17 +57 0x4848 //RX_FDEQ_GAIN_18 +58 0x4848 //RX_FDEQ_GAIN_19 +59 0x4848 //RX_FDEQ_GAIN_20 +60 0x4848 //RX_FDEQ_GAIN_21 +61 0x4848 //RX_FDEQ_GAIN_22 +62 0x4848 //RX_FDEQ_GAIN_23 +63 0x0202 //RX_FDEQ_BIN_0 +64 0x0203 //RX_FDEQ_BIN_1 +65 0x0303 //RX_FDEQ_BIN_2 +66 0x0304 //RX_FDEQ_BIN_3 +67 0x0404 //RX_FDEQ_BIN_4 +68 0x0308 //RX_FDEQ_BIN_5 +69 0x0808 //RX_FDEQ_BIN_6 +70 0x090A //RX_FDEQ_BIN_7 +71 0x0B0C //RX_FDEQ_BIN_8 +72 0x0D0E //RX_FDEQ_BIN_9 +73 0x1013 //RX_FDEQ_BIN_10 +74 0x1719 //RX_FDEQ_BIN_11 +75 0x1B1E //RX_FDEQ_BIN_12 +76 0x1E1E //RX_FDEQ_BIN_13 +77 0x1E28 //RX_FDEQ_BIN_14 +78 0x282C //RX_FDEQ_BIN_15 +79 0x0000 //RX_FDEQ_BIN_16 +80 0x0000 //RX_FDEQ_BIN_17 +81 0x0000 //RX_FDEQ_BIN_18 +82 0x0000 //RX_FDEQ_BIN_19 +83 0x0000 //RX_FDEQ_BIN_20 +84 0x0000 //RX_FDEQ_BIN_21 +85 0x0000 //RX_FDEQ_BIN_22 +86 0x0000 //RX_FDEQ_BIN_23 +87 0x4000 //RX_FDEQ_RESRV_0 +88 0x0320 //RX_FDEQ_RESRV_1 +89 0x0018 //RX_FDDRC_BAND_MARGIN_0 +90 0x0035 //RX_FDDRC_BAND_MARGIN_1 +91 0x00D5 //RX_FDDRC_BAND_MARGIN_2 +92 0x0120 //RX_FDDRC_BAND_MARGIN_3 +93 0x0004 //RX_FDDRC_BLOCK_EXP +94 0x5000 //RX_FDDRC_THRD_2_0 +95 0x5000 //RX_FDDRC_THRD_2_1 +96 0x2000 //RX_FDDRC_THRD_2_2 +97 0x5000 //RX_FDDRC_THRD_2_3 +98 0x6400 //RX_FDDRC_THRD_3_0 +99 0x6400 //RX_FDDRC_THRD_3_1 +100 0x2000 //RX_FDDRC_THRD_3_2 +101 0x5000 //RX_FDDRC_THRD_3_3 +102 0x4000 //RX_FDDRC_SLANT_0_0 +103 0x4000 //RX_FDDRC_SLANT_0_1 +104 0x4000 //RX_FDDRC_SLANT_0_2 +105 0x4000 //RX_FDDRC_SLANT_0_3 +106 0x7FFF //RX_FDDRC_SLANT_1_0 +107 0x7FFF //RX_FDDRC_SLANT_1_1 +108 0x7FFF //RX_FDDRC_SLANT_1_2 +109 0x7FFF //RX_FDDRC_SLANT_1_3 +110 0x0000 //RX_FDDRC_RESRV_0 +129 0x005F //RX_SPK_VOL +130 0x0000 //RX_VOL_RESRV_0 +#VOL 5 +6 0x6000 //RX_TDDRC_ALPHA_UP_1 +7 0x6000 //RX_TDDRC_ALPHA_UP_2 +8 0x6000 //RX_TDDRC_ALPHA_UP_3 +9 0x1000 //RX_TDDRC_ALPHA_UP_4 +27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +33 0x7214 //RX_TDDRC_LIMITER_THRD +34 0x0800 //RX_TDDRC_LIMITER_GAIN +112 0x0002 //RX_TDDRC_THRD_0 +113 0x0004 //RX_TDDRC_THRD_1 +114 0x1A00 //RX_TDDRC_THRD_2 +115 0x1A00 //RX_TDDRC_THRD_3 +116 0x7EB8 //RX_TDDRC_SLANT_0 +117 0x2500 //RX_TDDRC_SLANT_1 +118 0x6000 //RX_TDDRC_ALPHA_UP_0 +119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +120 0x0000 //RX_TDDRC_HMNC_FLAG +121 0x199A //RX_TDDRC_HMNC_GAIN +122 0x0001 //RX_TDDRC_SMT_FLAG +123 0x0CCD //RX_TDDRC_SMT_W +124 0x032A //RX_TDDRC_DRC_GAIN +38 0x0020 //RX_FDEQ_SUBNUM +39 0x4848 //RX_FDEQ_GAIN_0 +40 0x3B3B //RX_FDEQ_GAIN_1 +41 0x3942 //RX_FDEQ_GAIN_2 +42 0x4645 //RX_FDEQ_GAIN_3 +43 0x494A //RX_FDEQ_GAIN_4 +44 0x5D5A //RX_FDEQ_GAIN_5 +45 0x5B5B //RX_FDEQ_GAIN_6 +46 0x5A51 //RX_FDEQ_GAIN_7 +47 0x514F //RX_FDEQ_GAIN_8 +48 0x5568 //RX_FDEQ_GAIN_9 +49 0x7460 //RX_FDEQ_GAIN_10 +50 0x544E //RX_FDEQ_GAIN_11 +51 0x4848 //RX_FDEQ_GAIN_12 +52 0x484A //RX_FDEQ_GAIN_13 +53 0x5155 //RX_FDEQ_GAIN_14 +54 0x577B //RX_FDEQ_GAIN_15 +55 0x4848 //RX_FDEQ_GAIN_16 +56 0x4848 //RX_FDEQ_GAIN_17 +57 0x4848 //RX_FDEQ_GAIN_18 +58 0x4848 //RX_FDEQ_GAIN_19 +59 0x4848 //RX_FDEQ_GAIN_20 +60 0x4848 //RX_FDEQ_GAIN_21 +61 0x4848 //RX_FDEQ_GAIN_22 +62 0x4848 //RX_FDEQ_GAIN_23 +63 0x0202 //RX_FDEQ_BIN_0 +64 0x0203 //RX_FDEQ_BIN_1 +65 0x0303 //RX_FDEQ_BIN_2 +66 0x0304 //RX_FDEQ_BIN_3 +67 0x0404 //RX_FDEQ_BIN_4 +68 0x0308 //RX_FDEQ_BIN_5 +69 0x0808 //RX_FDEQ_BIN_6 +70 0x090A //RX_FDEQ_BIN_7 +71 0x0B0C //RX_FDEQ_BIN_8 +72 0x0D0E //RX_FDEQ_BIN_9 +73 0x1013 //RX_FDEQ_BIN_10 +74 0x1719 //RX_FDEQ_BIN_11 +75 0x1B1E //RX_FDEQ_BIN_12 +76 0x1E1E //RX_FDEQ_BIN_13 +77 0x1E28 //RX_FDEQ_BIN_14 +78 0x282C //RX_FDEQ_BIN_15 +79 0x0000 //RX_FDEQ_BIN_16 +80 0x0000 //RX_FDEQ_BIN_17 +81 0x0000 //RX_FDEQ_BIN_18 +82 0x0000 //RX_FDEQ_BIN_19 +83 0x0000 //RX_FDEQ_BIN_20 +84 0x0000 //RX_FDEQ_BIN_21 +85 0x0000 //RX_FDEQ_BIN_22 +86 0x0000 //RX_FDEQ_BIN_23 +87 0x4000 //RX_FDEQ_RESRV_0 +88 0x0320 //RX_FDEQ_RESRV_1 +89 0x0018 //RX_FDDRC_BAND_MARGIN_0 +90 0x0035 //RX_FDDRC_BAND_MARGIN_1 +91 0x00D5 //RX_FDDRC_BAND_MARGIN_2 +92 0x0120 //RX_FDDRC_BAND_MARGIN_3 +93 0x0004 //RX_FDDRC_BLOCK_EXP +94 0x5000 //RX_FDDRC_THRD_2_0 +95 0x5000 //RX_FDDRC_THRD_2_1 +96 0x2000 //RX_FDDRC_THRD_2_2 +97 0x5000 //RX_FDDRC_THRD_2_3 +98 0x6400 //RX_FDDRC_THRD_3_0 +99 0x6400 //RX_FDDRC_THRD_3_1 +100 0x2000 //RX_FDDRC_THRD_3_2 +101 0x5000 //RX_FDDRC_THRD_3_3 +102 0x4000 //RX_FDDRC_SLANT_0_0 +103 0x4000 //RX_FDDRC_SLANT_0_1 +104 0x4000 //RX_FDDRC_SLANT_0_2 +105 0x4000 //RX_FDDRC_SLANT_0_3 +106 0x7FFF //RX_FDDRC_SLANT_1_0 +107 0x7FFF //RX_FDDRC_SLANT_1_1 +108 0x7FFF //RX_FDDRC_SLANT_1_2 +109 0x7FFF //RX_FDDRC_SLANT_1_3 +110 0x0000 //RX_FDDRC_RESRV_0 +129 0x008E //RX_SPK_VOL +130 0x0000 //RX_VOL_RESRV_0 +#VOL 6 +6 0x6000 //RX_TDDRC_ALPHA_UP_1 +7 0x6000 //RX_TDDRC_ALPHA_UP_2 +8 0x6000 //RX_TDDRC_ALPHA_UP_3 +9 0x1000 //RX_TDDRC_ALPHA_UP_4 +27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +33 0x7214 //RX_TDDRC_LIMITER_THRD +34 0x0800 //RX_TDDRC_LIMITER_GAIN +112 0x0002 //RX_TDDRC_THRD_0 +113 0x0004 //RX_TDDRC_THRD_1 +114 0x1A00 //RX_TDDRC_THRD_2 +115 0x1A00 //RX_TDDRC_THRD_3 +116 0x7EB8 //RX_TDDRC_SLANT_0 +117 0x2500 //RX_TDDRC_SLANT_1 +118 0x6000 //RX_TDDRC_ALPHA_UP_0 +119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +120 0x0000 //RX_TDDRC_HMNC_FLAG +121 0x199A //RX_TDDRC_HMNC_GAIN +122 0x0001 //RX_TDDRC_SMT_FLAG +123 0x0CCD //RX_TDDRC_SMT_W +124 0x032A //RX_TDDRC_DRC_GAIN +38 0x0020 //RX_FDEQ_SUBNUM +39 0x4848 //RX_FDEQ_GAIN_0 +40 0x3B3B //RX_FDEQ_GAIN_1 +41 0x3942 //RX_FDEQ_GAIN_2 +42 0x4645 //RX_FDEQ_GAIN_3 +43 0x494A //RX_FDEQ_GAIN_4 +44 0x5D5A //RX_FDEQ_GAIN_5 +45 0x5B5B //RX_FDEQ_GAIN_6 +46 0x5A51 //RX_FDEQ_GAIN_7 +47 0x514F //RX_FDEQ_GAIN_8 +48 0x5568 //RX_FDEQ_GAIN_9 +49 0x7460 //RX_FDEQ_GAIN_10 +50 0x544E //RX_FDEQ_GAIN_11 +51 0x4848 //RX_FDEQ_GAIN_12 +52 0x484A //RX_FDEQ_GAIN_13 +53 0x5155 //RX_FDEQ_GAIN_14 +54 0x577B //RX_FDEQ_GAIN_15 +55 0x4848 //RX_FDEQ_GAIN_16 +56 0x4848 //RX_FDEQ_GAIN_17 +57 0x4848 //RX_FDEQ_GAIN_18 +58 0x4848 //RX_FDEQ_GAIN_19 +59 0x4848 //RX_FDEQ_GAIN_20 +60 0x4848 //RX_FDEQ_GAIN_21 +61 0x4848 //RX_FDEQ_GAIN_22 +62 0x4848 //RX_FDEQ_GAIN_23 +63 0x0202 //RX_FDEQ_BIN_0 +64 0x0203 //RX_FDEQ_BIN_1 +65 0x0303 //RX_FDEQ_BIN_2 +66 0x0304 //RX_FDEQ_BIN_3 +67 0x0404 //RX_FDEQ_BIN_4 +68 0x0308 //RX_FDEQ_BIN_5 +69 0x0808 //RX_FDEQ_BIN_6 +70 0x090A //RX_FDEQ_BIN_7 +71 0x0B0C //RX_FDEQ_BIN_8 +72 0x0D0E //RX_FDEQ_BIN_9 +73 0x1013 //RX_FDEQ_BIN_10 +74 0x1719 //RX_FDEQ_BIN_11 +75 0x1B1E //RX_FDEQ_BIN_12 +76 0x1E1E //RX_FDEQ_BIN_13 +77 0x1E28 //RX_FDEQ_BIN_14 +78 0x282C //RX_FDEQ_BIN_15 +79 0x0000 //RX_FDEQ_BIN_16 +80 0x0000 //RX_FDEQ_BIN_17 +81 0x0000 //RX_FDEQ_BIN_18 +82 0x0000 //RX_FDEQ_BIN_19 +83 0x0000 //RX_FDEQ_BIN_20 +84 0x0000 //RX_FDEQ_BIN_21 +85 0x0000 //RX_FDEQ_BIN_22 +86 0x0000 //RX_FDEQ_BIN_23 +87 0x4000 //RX_FDEQ_RESRV_0 +88 0x0320 //RX_FDEQ_RESRV_1 +89 0x0018 //RX_FDDRC_BAND_MARGIN_0 +90 0x0035 //RX_FDDRC_BAND_MARGIN_1 +91 0x00D5 //RX_FDDRC_BAND_MARGIN_2 +92 0x0120 //RX_FDDRC_BAND_MARGIN_3 +93 0x0004 //RX_FDDRC_BLOCK_EXP +94 0x5000 //RX_FDDRC_THRD_2_0 +95 0x5000 //RX_FDDRC_THRD_2_1 +96 0x2000 //RX_FDDRC_THRD_2_2 +97 0x5000 //RX_FDDRC_THRD_2_3 +98 0x6400 //RX_FDDRC_THRD_3_0 +99 0x6400 //RX_FDDRC_THRD_3_1 +100 0x2000 //RX_FDDRC_THRD_3_2 +101 0x5000 //RX_FDDRC_THRD_3_3 +102 0x4000 //RX_FDDRC_SLANT_0_0 +103 0x4000 //RX_FDDRC_SLANT_0_1 +104 0x4000 //RX_FDDRC_SLANT_0_2 +105 0x4000 //RX_FDDRC_SLANT_0_3 +106 0x7FFF //RX_FDDRC_SLANT_1_0 +107 0x7FFF //RX_FDDRC_SLANT_1_1 +108 0x7FFF //RX_FDDRC_SLANT_1_2 +109 0x7FFF //RX_FDDRC_SLANT_1_3 +110 0x0000 //RX_FDDRC_RESRV_0 +129 0x0100 //RX_SPK_VOL +130 0x0000 //RX_VOL_RESRV_0 +#RX 2 +157 0x027C //RX_RECVFUNC_MODE_0 +158 0x0000 //RX_RECVFUNC_MODE_1 +159 0x0003 //RX_SAMPLINGFREQ_SIG +160 0x0003 //RX_SAMPLINGFREQ_PROC +161 0x000A //RX_FRAME_SZ +162 0x0000 //RX_DELAY_OPT +163 0x6000 //RX_TDDRC_ALPHA_UP_1 +164 0x6000 //RX_TDDRC_ALPHA_UP_2 +165 0x6000 //RX_TDDRC_ALPHA_UP_3 +166 0x1000 //RX_TDDRC_ALPHA_UP_4 +167 0x0800 //RX_PGA +168 0x7652 //RX_A_HP +169 0x4000 //RX_B_PE +170 0x7800 //RX_THR_PITCH_DET_0 +171 0x7000 //RX_THR_PITCH_DET_1 +172 0x6000 //RX_THR_PITCH_DET_2 +173 0x0008 //RX_PITCH_BFR_LEN +174 0x0003 //RX_SBD_PITCH_DET +175 0x0100 //RX_PP_RESRV_0 +176 0x0020 //RX_PP_RESRV_1 +177 0x0400 //RX_N_SN_EST +178 0x000C //RX_N2_SN_EST +179 0x0010 //RX_NS_LVL_CTRL +180 0xF800 //RX_THR_SN_EST +181 0x7E00 //RX_LAMBDA_PFILT +182 0x000A //RX_FENS_RESRV_0 +183 0x0190 //RX_FENS_RESRV_1 +184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +187 0x0002 //RX_EXTRA_NS_L +188 0x0800 //RX_EXTRA_NS_A +189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +190 0x7214 //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +192 0x199A //RX_A_POST_FLT +193 0x0000 //RX_LMT_THRD +194 0x4000 //RX_LMT_ALPHA +195 0x0020 //RX_FDEQ_SUBNUM +196 0x4848 //RX_FDEQ_GAIN_0 +197 0x4848 //RX_FDEQ_GAIN_1 +198 0x4848 //RX_FDEQ_GAIN_2 +199 0x4848 //RX_FDEQ_GAIN_3 +200 0x4848 //RX_FDEQ_GAIN_4 +201 0x4848 //RX_FDEQ_GAIN_5 +202 0x4850 //RX_FDEQ_GAIN_6 +203 0x4848 //RX_FDEQ_GAIN_7 +204 0x4860 //RX_FDEQ_GAIN_8 +205 0x7468 //RX_FDEQ_GAIN_9 +206 0x6060 //RX_FDEQ_GAIN_10 +207 0x6060 //RX_FDEQ_GAIN_11 +208 0x5C54 //RX_FDEQ_GAIN_12 +209 0x5450 //RX_FDEQ_GAIN_13 +210 0x5050 //RX_FDEQ_GAIN_14 +211 0x5860 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0202 //RX_FDEQ_BIN_0 +221 0x0203 //RX_FDEQ_BIN_1 +222 0x0303 //RX_FDEQ_BIN_2 +223 0x0304 //RX_FDEQ_BIN_3 +224 0x0404 //RX_FDEQ_BIN_4 +225 0x0308 //RX_FDEQ_BIN_5 +226 0x0808 //RX_FDEQ_BIN_6 +227 0x090A //RX_FDEQ_BIN_7 +228 0x0B0C //RX_FDEQ_BIN_8 +229 0x0D0E //RX_FDEQ_BIN_9 +230 0x1013 //RX_FDEQ_BIN_10 +231 0x1719 //RX_FDEQ_BIN_11 +232 0x1B1E //RX_FDEQ_BIN_12 +233 0x1E1E //RX_FDEQ_BIN_13 +234 0x1E28 //RX_FDEQ_BIN_14 +235 0x282C //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x4000 //RX_FDEQ_RESRV_0 +245 0x0320 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0035 //RX_FDDRC_BAND_MARGIN_1 +248 0x00D5 //RX_FDDRC_BAND_MARGIN_2 +249 0x0120 //RX_FDDRC_BAND_MARGIN_3 +250 0x0004 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x2000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x2000 //RX_FDDRC_THRD_3_2 +258 0x5000 //RX_FDDRC_THRD_3_3 +259 0x4000 //RX_FDDRC_SLANT_0_0 +260 0x4000 //RX_FDDRC_SLANT_0_1 +261 0x4000 //RX_FDDRC_SLANT_0_2 +262 0x4000 //RX_FDDRC_SLANT_0_3 +263 0x7FFF //RX_FDDRC_SLANT_1_0 +264 0x7FFF //RX_FDDRC_SLANT_1_1 +265 0x7FFF //RX_FDDRC_SLANT_1_2 +266 0x7FFF //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +268 0x0002 //RX_FILTINDX +269 0x0002 //RX_TDDRC_THRD_0 +270 0x0004 //RX_TDDRC_THRD_1 +271 0x1A00 //RX_TDDRC_THRD_2 +272 0x1A00 //RX_TDDRC_THRD_3 +273 0x7EB8 //RX_TDDRC_SLANT_0 +274 0x2500 //RX_TDDRC_SLANT_1 +275 0x6000 //RX_TDDRC_ALPHA_UP_0 +276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x199A //RX_TDDRC_HMNC_GAIN +279 0x0001 //RX_TDDRC_SMT_FLAG +280 0x0CCD //RX_TDDRC_SMT_W +281 0x0550 //RX_TDDRC_DRC_GAIN +282 0x7C00 //RX_LAMBDA_PKA_FP +283 0x2000 //RX_TPKA_FP +284 0x2000 //RX_MIN_G_FP +285 0x0080 //RX_MAX_G_FP +286 0x0014 //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 +288 0x0000 //RX_MAXLEVEL_CNG +289 0x3000 //RX_BWE_UV_TH +290 0x3000 //RX_BWE_UV_TH2 +291 0x1800 //RX_BWE_UV_TH3 +292 0x1000 //RX_BWE_V_TH +293 0x04CD //RX_BWE_GAIN1_V_TH1 +294 0x0F33 //RX_BWE_GAIN1_V_TH2 +295 0x7333 //RX_BWE_UV_EQ +296 0x199A //RX_BWE_V_EQ +297 0x7333 //RX_BWE_TONE_TH +298 0x0004 //RX_BWE_UV_HOLD_T +299 0x6CCD //RX_BWE_GAIN2_ALPHA +300 0x799A //RX_BWE_GAIN3_ALPHA +301 0x001E //RX_BWE_CUTOFF +302 0x3000 //RX_BWE_GAINFILL +303 0x3200 //RX_BWE_MAXTH_TONE +304 0x2000 //RX_BWE_EQ_0 +305 0x2000 //RX_BWE_EQ_1 +306 0x2000 //RX_BWE_EQ_2 +307 0x2000 //RX_BWE_EQ_3 +308 0x2000 //RX_BWE_EQ_4 +309 0x2000 //RX_BWE_EQ_5 +310 0x2000 //RX_BWE_EQ_6 +311 0x0000 //RX_BWE_RESRV_0 +312 0x0000 //RX_BWE_RESRV_1 +313 0x0000 //RX_BWE_RESRV_2 +#VOL 0 +163 0x6000 //RX_TDDRC_ALPHA_UP_1 +164 0x6000 //RX_TDDRC_ALPHA_UP_2 +165 0x6000 //RX_TDDRC_ALPHA_UP_3 +166 0x1000 //RX_TDDRC_ALPHA_UP_4 +184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +190 0x7214 //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +269 0x0002 //RX_TDDRC_THRD_0 +270 0x0004 //RX_TDDRC_THRD_1 +271 0x1A00 //RX_TDDRC_THRD_2 +272 0x1A00 //RX_TDDRC_THRD_3 +273 0x7EB8 //RX_TDDRC_SLANT_0 +274 0x2500 //RX_TDDRC_SLANT_1 +275 0x6000 //RX_TDDRC_ALPHA_UP_0 +276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x199A //RX_TDDRC_HMNC_GAIN +279 0x0001 //RX_TDDRC_SMT_FLAG +280 0x0CCD //RX_TDDRC_SMT_W +281 0x0550 //RX_TDDRC_DRC_GAIN +195 0x0020 //RX_FDEQ_SUBNUM +196 0x4848 //RX_FDEQ_GAIN_0 +197 0x4848 //RX_FDEQ_GAIN_1 +198 0x4848 //RX_FDEQ_GAIN_2 +199 0x4848 //RX_FDEQ_GAIN_3 +200 0x4848 //RX_FDEQ_GAIN_4 +201 0x4848 //RX_FDEQ_GAIN_5 +202 0x4850 //RX_FDEQ_GAIN_6 +203 0x4848 //RX_FDEQ_GAIN_7 +204 0x4860 //RX_FDEQ_GAIN_8 +205 0x7468 //RX_FDEQ_GAIN_9 +206 0x6060 //RX_FDEQ_GAIN_10 +207 0x6060 //RX_FDEQ_GAIN_11 +208 0x5C54 //RX_FDEQ_GAIN_12 +209 0x5450 //RX_FDEQ_GAIN_13 +210 0x5050 //RX_FDEQ_GAIN_14 +211 0x5860 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0202 //RX_FDEQ_BIN_0 +221 0x0203 //RX_FDEQ_BIN_1 +222 0x0303 //RX_FDEQ_BIN_2 +223 0x0304 //RX_FDEQ_BIN_3 +224 0x0404 //RX_FDEQ_BIN_4 +225 0x0308 //RX_FDEQ_BIN_5 +226 0x0808 //RX_FDEQ_BIN_6 +227 0x090A //RX_FDEQ_BIN_7 +228 0x0B0C //RX_FDEQ_BIN_8 +229 0x0D0E //RX_FDEQ_BIN_9 +230 0x1013 //RX_FDEQ_BIN_10 +231 0x1719 //RX_FDEQ_BIN_11 +232 0x1B1E //RX_FDEQ_BIN_12 +233 0x1E1E //RX_FDEQ_BIN_13 +234 0x1E28 //RX_FDEQ_BIN_14 +235 0x282C //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x4000 //RX_FDEQ_RESRV_0 +245 0x0320 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0035 //RX_FDDRC_BAND_MARGIN_1 +248 0x00D5 //RX_FDDRC_BAND_MARGIN_2 +249 0x0120 //RX_FDDRC_BAND_MARGIN_3 +250 0x0004 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x2000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x2000 //RX_FDDRC_THRD_3_2 +258 0x5000 //RX_FDDRC_THRD_3_3 +259 0x4000 //RX_FDDRC_SLANT_0_0 +260 0x4000 //RX_FDDRC_SLANT_0_1 +261 0x4000 //RX_FDDRC_SLANT_0_2 +262 0x4000 //RX_FDDRC_SLANT_0_3 +263 0x7FFF //RX_FDDRC_SLANT_1_0 +264 0x7FFF //RX_FDDRC_SLANT_1_1 +265 0x7FFF //RX_FDDRC_SLANT_1_2 +266 0x7FFF //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +286 0x0014 //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 +#VOL 1 +163 0x6000 //RX_TDDRC_ALPHA_UP_1 +164 0x6000 //RX_TDDRC_ALPHA_UP_2 +165 0x6000 //RX_TDDRC_ALPHA_UP_3 +166 0x1000 //RX_TDDRC_ALPHA_UP_4 +184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +190 0x7214 //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +269 0x0002 //RX_TDDRC_THRD_0 +270 0x0004 //RX_TDDRC_THRD_1 +271 0x1A00 //RX_TDDRC_THRD_2 +272 0x1A00 //RX_TDDRC_THRD_3 +273 0x7EB8 //RX_TDDRC_SLANT_0 +274 0x2500 //RX_TDDRC_SLANT_1 +275 0x6000 //RX_TDDRC_ALPHA_UP_0 +276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x199A //RX_TDDRC_HMNC_GAIN +279 0x0001 //RX_TDDRC_SMT_FLAG +280 0x0CCD //RX_TDDRC_SMT_W +281 0x0550 //RX_TDDRC_DRC_GAIN +195 0x0020 //RX_FDEQ_SUBNUM +196 0x4848 //RX_FDEQ_GAIN_0 +197 0x4848 //RX_FDEQ_GAIN_1 +198 0x4848 //RX_FDEQ_GAIN_2 +199 0x4848 //RX_FDEQ_GAIN_3 +200 0x4848 //RX_FDEQ_GAIN_4 +201 0x4848 //RX_FDEQ_GAIN_5 +202 0x4850 //RX_FDEQ_GAIN_6 +203 0x4848 //RX_FDEQ_GAIN_7 +204 0x4860 //RX_FDEQ_GAIN_8 +205 0x7468 //RX_FDEQ_GAIN_9 +206 0x6060 //RX_FDEQ_GAIN_10 +207 0x6060 //RX_FDEQ_GAIN_11 +208 0x5C54 //RX_FDEQ_GAIN_12 +209 0x5450 //RX_FDEQ_GAIN_13 +210 0x5050 //RX_FDEQ_GAIN_14 +211 0x5860 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0202 //RX_FDEQ_BIN_0 +221 0x0203 //RX_FDEQ_BIN_1 +222 0x0303 //RX_FDEQ_BIN_2 +223 0x0304 //RX_FDEQ_BIN_3 +224 0x0404 //RX_FDEQ_BIN_4 +225 0x0308 //RX_FDEQ_BIN_5 +226 0x0808 //RX_FDEQ_BIN_6 +227 0x090A //RX_FDEQ_BIN_7 +228 0x0B0C //RX_FDEQ_BIN_8 +229 0x0D0E //RX_FDEQ_BIN_9 +230 0x1013 //RX_FDEQ_BIN_10 +231 0x1719 //RX_FDEQ_BIN_11 +232 0x1B1E //RX_FDEQ_BIN_12 +233 0x1E1E //RX_FDEQ_BIN_13 +234 0x1E28 //RX_FDEQ_BIN_14 +235 0x282C //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x4000 //RX_FDEQ_RESRV_0 +245 0x0320 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0035 //RX_FDDRC_BAND_MARGIN_1 +248 0x00D5 //RX_FDDRC_BAND_MARGIN_2 +249 0x0120 //RX_FDDRC_BAND_MARGIN_3 +250 0x0004 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x2000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x2000 //RX_FDDRC_THRD_3_2 +258 0x5000 //RX_FDDRC_THRD_3_3 +259 0x4000 //RX_FDDRC_SLANT_0_0 +260 0x4000 //RX_FDDRC_SLANT_0_1 +261 0x4000 //RX_FDDRC_SLANT_0_2 +262 0x4000 //RX_FDDRC_SLANT_0_3 +263 0x7FFF //RX_FDDRC_SLANT_1_0 +264 0x7FFF //RX_FDDRC_SLANT_1_1 +265 0x7FFF //RX_FDDRC_SLANT_1_2 +266 0x7FFF //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +286 0x001D //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 +#VOL 2 +163 0x6000 //RX_TDDRC_ALPHA_UP_1 +164 0x6000 //RX_TDDRC_ALPHA_UP_2 +165 0x6000 //RX_TDDRC_ALPHA_UP_3 +166 0x1000 //RX_TDDRC_ALPHA_UP_4 +184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +190 0x7214 //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +269 0x0002 //RX_TDDRC_THRD_0 +270 0x0004 //RX_TDDRC_THRD_1 +271 0x1A00 //RX_TDDRC_THRD_2 +272 0x1A00 //RX_TDDRC_THRD_3 +273 0x7EB8 //RX_TDDRC_SLANT_0 +274 0x2500 //RX_TDDRC_SLANT_1 +275 0x6000 //RX_TDDRC_ALPHA_UP_0 +276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x199A //RX_TDDRC_HMNC_GAIN +279 0x0001 //RX_TDDRC_SMT_FLAG +280 0x0CCD //RX_TDDRC_SMT_W +281 0x0550 //RX_TDDRC_DRC_GAIN +195 0x0020 //RX_FDEQ_SUBNUM +196 0x4848 //RX_FDEQ_GAIN_0 +197 0x4848 //RX_FDEQ_GAIN_1 +198 0x4848 //RX_FDEQ_GAIN_2 +199 0x4848 //RX_FDEQ_GAIN_3 +200 0x4848 //RX_FDEQ_GAIN_4 +201 0x4848 //RX_FDEQ_GAIN_5 +202 0x4850 //RX_FDEQ_GAIN_6 +203 0x4848 //RX_FDEQ_GAIN_7 +204 0x4860 //RX_FDEQ_GAIN_8 +205 0x7468 //RX_FDEQ_GAIN_9 +206 0x6060 //RX_FDEQ_GAIN_10 +207 0x6060 //RX_FDEQ_GAIN_11 +208 0x5C54 //RX_FDEQ_GAIN_12 +209 0x5450 //RX_FDEQ_GAIN_13 +210 0x5050 //RX_FDEQ_GAIN_14 +211 0x5860 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0202 //RX_FDEQ_BIN_0 +221 0x0203 //RX_FDEQ_BIN_1 +222 0x0303 //RX_FDEQ_BIN_2 +223 0x0304 //RX_FDEQ_BIN_3 +224 0x0404 //RX_FDEQ_BIN_4 +225 0x0308 //RX_FDEQ_BIN_5 +226 0x0808 //RX_FDEQ_BIN_6 +227 0x090A //RX_FDEQ_BIN_7 +228 0x0B0C //RX_FDEQ_BIN_8 +229 0x0D0E //RX_FDEQ_BIN_9 +230 0x1013 //RX_FDEQ_BIN_10 +231 0x1719 //RX_FDEQ_BIN_11 +232 0x1B1E //RX_FDEQ_BIN_12 +233 0x1E1E //RX_FDEQ_BIN_13 +234 0x1E28 //RX_FDEQ_BIN_14 +235 0x282C //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x4000 //RX_FDEQ_RESRV_0 +245 0x0320 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0035 //RX_FDDRC_BAND_MARGIN_1 +248 0x00D5 //RX_FDDRC_BAND_MARGIN_2 +249 0x0120 //RX_FDDRC_BAND_MARGIN_3 +250 0x0004 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x2000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x2000 //RX_FDDRC_THRD_3_2 +258 0x5000 //RX_FDDRC_THRD_3_3 +259 0x4000 //RX_FDDRC_SLANT_0_0 +260 0x4000 //RX_FDDRC_SLANT_0_1 +261 0x4000 //RX_FDDRC_SLANT_0_2 +262 0x4000 //RX_FDDRC_SLANT_0_3 +263 0x7FFF //RX_FDDRC_SLANT_1_0 +264 0x7FFF //RX_FDDRC_SLANT_1_1 +265 0x7FFF //RX_FDDRC_SLANT_1_2 +266 0x7FFF //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +286 0x0029 //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 +#VOL 3 +163 0x6000 //RX_TDDRC_ALPHA_UP_1 +164 0x6000 //RX_TDDRC_ALPHA_UP_2 +165 0x6000 //RX_TDDRC_ALPHA_UP_3 +166 0x1000 //RX_TDDRC_ALPHA_UP_4 +184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +190 0x7214 //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +269 0x0002 //RX_TDDRC_THRD_0 +270 0x0004 //RX_TDDRC_THRD_1 +271 0x1A00 //RX_TDDRC_THRD_2 +272 0x1A00 //RX_TDDRC_THRD_3 +273 0x7EB8 //RX_TDDRC_SLANT_0 +274 0x2500 //RX_TDDRC_SLANT_1 +275 0x6000 //RX_TDDRC_ALPHA_UP_0 +276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x199A //RX_TDDRC_HMNC_GAIN +279 0x0001 //RX_TDDRC_SMT_FLAG +280 0x0CCD //RX_TDDRC_SMT_W +281 0x0550 //RX_TDDRC_DRC_GAIN +195 0x0020 //RX_FDEQ_SUBNUM +196 0x4848 //RX_FDEQ_GAIN_0 +197 0x4848 //RX_FDEQ_GAIN_1 +198 0x4848 //RX_FDEQ_GAIN_2 +199 0x4848 //RX_FDEQ_GAIN_3 +200 0x4848 //RX_FDEQ_GAIN_4 +201 0x4848 //RX_FDEQ_GAIN_5 +202 0x4850 //RX_FDEQ_GAIN_6 +203 0x4848 //RX_FDEQ_GAIN_7 +204 0x4860 //RX_FDEQ_GAIN_8 +205 0x7468 //RX_FDEQ_GAIN_9 +206 0x6060 //RX_FDEQ_GAIN_10 +207 0x6060 //RX_FDEQ_GAIN_11 +208 0x5C54 //RX_FDEQ_GAIN_12 +209 0x5450 //RX_FDEQ_GAIN_13 +210 0x5050 //RX_FDEQ_GAIN_14 +211 0x5860 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0202 //RX_FDEQ_BIN_0 +221 0x0203 //RX_FDEQ_BIN_1 +222 0x0303 //RX_FDEQ_BIN_2 +223 0x0304 //RX_FDEQ_BIN_3 +224 0x0404 //RX_FDEQ_BIN_4 +225 0x0308 //RX_FDEQ_BIN_5 +226 0x0808 //RX_FDEQ_BIN_6 +227 0x090A //RX_FDEQ_BIN_7 +228 0x0B0C //RX_FDEQ_BIN_8 +229 0x0D0E //RX_FDEQ_BIN_9 +230 0x1013 //RX_FDEQ_BIN_10 +231 0x1719 //RX_FDEQ_BIN_11 +232 0x1B1E //RX_FDEQ_BIN_12 +233 0x1E1E //RX_FDEQ_BIN_13 +234 0x1E28 //RX_FDEQ_BIN_14 +235 0x282C //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x4000 //RX_FDEQ_RESRV_0 +245 0x0320 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0035 //RX_FDDRC_BAND_MARGIN_1 +248 0x00D5 //RX_FDDRC_BAND_MARGIN_2 +249 0x0120 //RX_FDDRC_BAND_MARGIN_3 +250 0x0004 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x2000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x2000 //RX_FDDRC_THRD_3_2 +258 0x5000 //RX_FDDRC_THRD_3_3 +259 0x4000 //RX_FDDRC_SLANT_0_0 +260 0x4000 //RX_FDDRC_SLANT_0_1 +261 0x4000 //RX_FDDRC_SLANT_0_2 +262 0x4000 //RX_FDDRC_SLANT_0_3 +263 0x7FFF //RX_FDDRC_SLANT_1_0 +264 0x7FFF //RX_FDDRC_SLANT_1_1 +265 0x7FFF //RX_FDDRC_SLANT_1_2 +266 0x7FFF //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +286 0x0039 //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 +#VOL 4 +163 0x6000 //RX_TDDRC_ALPHA_UP_1 +164 0x6000 //RX_TDDRC_ALPHA_UP_2 +165 0x6000 //RX_TDDRC_ALPHA_UP_3 +166 0x1000 //RX_TDDRC_ALPHA_UP_4 +184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +190 0x7214 //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +269 0x0002 //RX_TDDRC_THRD_0 +270 0x0004 //RX_TDDRC_THRD_1 +271 0x1A00 //RX_TDDRC_THRD_2 +272 0x1A00 //RX_TDDRC_THRD_3 +273 0x7EB8 //RX_TDDRC_SLANT_0 +274 0x2500 //RX_TDDRC_SLANT_1 +275 0x6000 //RX_TDDRC_ALPHA_UP_0 +276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x199A //RX_TDDRC_HMNC_GAIN +279 0x0001 //RX_TDDRC_SMT_FLAG +280 0x0CCD //RX_TDDRC_SMT_W +281 0x0550 //RX_TDDRC_DRC_GAIN +195 0x0020 //RX_FDEQ_SUBNUM +196 0x4848 //RX_FDEQ_GAIN_0 +197 0x4848 //RX_FDEQ_GAIN_1 +198 0x4848 //RX_FDEQ_GAIN_2 +199 0x4848 //RX_FDEQ_GAIN_3 +200 0x5454 //RX_FDEQ_GAIN_4 +201 0x7C54 //RX_FDEQ_GAIN_5 +202 0x4850 //RX_FDEQ_GAIN_6 +203 0x4848 //RX_FDEQ_GAIN_7 +204 0x4860 //RX_FDEQ_GAIN_8 +205 0x7468 //RX_FDEQ_GAIN_9 +206 0x6060 //RX_FDEQ_GAIN_10 +207 0x6060 //RX_FDEQ_GAIN_11 +208 0x5C54 //RX_FDEQ_GAIN_12 +209 0x5450 //RX_FDEQ_GAIN_13 +210 0x5050 //RX_FDEQ_GAIN_14 +211 0x5860 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0202 //RX_FDEQ_BIN_0 +221 0x0203 //RX_FDEQ_BIN_1 +222 0x0303 //RX_FDEQ_BIN_2 +223 0x0304 //RX_FDEQ_BIN_3 +224 0x0404 //RX_FDEQ_BIN_4 +225 0x0308 //RX_FDEQ_BIN_5 +226 0x0808 //RX_FDEQ_BIN_6 +227 0x090A //RX_FDEQ_BIN_7 +228 0x0B0C //RX_FDEQ_BIN_8 +229 0x0D0E //RX_FDEQ_BIN_9 +230 0x1013 //RX_FDEQ_BIN_10 +231 0x1719 //RX_FDEQ_BIN_11 +232 0x1B1E //RX_FDEQ_BIN_12 +233 0x1E1E //RX_FDEQ_BIN_13 +234 0x1E28 //RX_FDEQ_BIN_14 +235 0x282C //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x4000 //RX_FDEQ_RESRV_0 +245 0x0320 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0035 //RX_FDDRC_BAND_MARGIN_1 +248 0x00D5 //RX_FDDRC_BAND_MARGIN_2 +249 0x0120 //RX_FDDRC_BAND_MARGIN_3 +250 0x0004 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x2000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x2000 //RX_FDDRC_THRD_3_2 +258 0x5000 //RX_FDDRC_THRD_3_3 +259 0x4000 //RX_FDDRC_SLANT_0_0 +260 0x4000 //RX_FDDRC_SLANT_0_1 +261 0x4000 //RX_FDDRC_SLANT_0_2 +262 0x4000 //RX_FDDRC_SLANT_0_3 +263 0x7FFF //RX_FDDRC_SLANT_1_0 +264 0x7FFF //RX_FDDRC_SLANT_1_1 +265 0x7FFF //RX_FDDRC_SLANT_1_2 +266 0x7FFF //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +286 0x005F //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 +#VOL 5 +163 0x6000 //RX_TDDRC_ALPHA_UP_1 +164 0x6000 //RX_TDDRC_ALPHA_UP_2 +165 0x6000 //RX_TDDRC_ALPHA_UP_3 +166 0x1000 //RX_TDDRC_ALPHA_UP_4 +184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +190 0x7214 //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +269 0x0002 //RX_TDDRC_THRD_0 +270 0x0004 //RX_TDDRC_THRD_1 +271 0x1A00 //RX_TDDRC_THRD_2 +272 0x1A00 //RX_TDDRC_THRD_3 +273 0x7EB8 //RX_TDDRC_SLANT_0 +274 0x2500 //RX_TDDRC_SLANT_1 +275 0x6000 //RX_TDDRC_ALPHA_UP_0 +276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x199A //RX_TDDRC_HMNC_GAIN +279 0x0001 //RX_TDDRC_SMT_FLAG +280 0x0CCD //RX_TDDRC_SMT_W +281 0x0550 //RX_TDDRC_DRC_GAIN +195 0x0020 //RX_FDEQ_SUBNUM +196 0x4848 //RX_FDEQ_GAIN_0 +197 0x4848 //RX_FDEQ_GAIN_1 +198 0x4848 //RX_FDEQ_GAIN_2 +199 0x4848 //RX_FDEQ_GAIN_3 +200 0x5454 //RX_FDEQ_GAIN_4 +201 0x7C54 //RX_FDEQ_GAIN_5 +202 0x4850 //RX_FDEQ_GAIN_6 +203 0x4848 //RX_FDEQ_GAIN_7 +204 0x4860 //RX_FDEQ_GAIN_8 +205 0x7468 //RX_FDEQ_GAIN_9 +206 0x6060 //RX_FDEQ_GAIN_10 +207 0x6060 //RX_FDEQ_GAIN_11 +208 0x5C54 //RX_FDEQ_GAIN_12 +209 0x5450 //RX_FDEQ_GAIN_13 +210 0x5050 //RX_FDEQ_GAIN_14 +211 0x5860 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0202 //RX_FDEQ_BIN_0 +221 0x0203 //RX_FDEQ_BIN_1 +222 0x0303 //RX_FDEQ_BIN_2 +223 0x0304 //RX_FDEQ_BIN_3 +224 0x0404 //RX_FDEQ_BIN_4 +225 0x0308 //RX_FDEQ_BIN_5 +226 0x0808 //RX_FDEQ_BIN_6 +227 0x090A //RX_FDEQ_BIN_7 +228 0x0B0C //RX_FDEQ_BIN_8 +229 0x0D0E //RX_FDEQ_BIN_9 +230 0x1013 //RX_FDEQ_BIN_10 +231 0x1719 //RX_FDEQ_BIN_11 +232 0x1B1E //RX_FDEQ_BIN_12 +233 0x1E1E //RX_FDEQ_BIN_13 +234 0x1E28 //RX_FDEQ_BIN_14 +235 0x282C //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x4000 //RX_FDEQ_RESRV_0 +245 0x0320 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0035 //RX_FDDRC_BAND_MARGIN_1 +248 0x00D5 //RX_FDDRC_BAND_MARGIN_2 +249 0x0120 //RX_FDDRC_BAND_MARGIN_3 +250 0x0004 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x2000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x2000 //RX_FDDRC_THRD_3_2 +258 0x5000 //RX_FDDRC_THRD_3_3 +259 0x4000 //RX_FDDRC_SLANT_0_0 +260 0x4000 //RX_FDDRC_SLANT_0_1 +261 0x4000 //RX_FDDRC_SLANT_0_2 +262 0x4000 //RX_FDDRC_SLANT_0_3 +263 0x7FFF //RX_FDDRC_SLANT_1_0 +264 0x7FFF //RX_FDDRC_SLANT_1_1 +265 0x7FFF //RX_FDDRC_SLANT_1_2 +266 0x7FFF //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +286 0x008E //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 +#VOL 6 +163 0x6000 //RX_TDDRC_ALPHA_UP_1 +164 0x6000 //RX_TDDRC_ALPHA_UP_2 +165 0x6000 //RX_TDDRC_ALPHA_UP_3 +166 0x1000 //RX_TDDRC_ALPHA_UP_4 +184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +190 0x7214 //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +269 0x0002 //RX_TDDRC_THRD_0 +270 0x0004 //RX_TDDRC_THRD_1 +271 0x1A00 //RX_TDDRC_THRD_2 +272 0x1A00 //RX_TDDRC_THRD_3 +273 0x7EB8 //RX_TDDRC_SLANT_0 +274 0x2500 //RX_TDDRC_SLANT_1 +275 0x6000 //RX_TDDRC_ALPHA_UP_0 +276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x199A //RX_TDDRC_HMNC_GAIN +279 0x0001 //RX_TDDRC_SMT_FLAG +280 0x0CCD //RX_TDDRC_SMT_W +281 0x0550 //RX_TDDRC_DRC_GAIN +195 0x0020 //RX_FDEQ_SUBNUM +196 0x4848 //RX_FDEQ_GAIN_0 +197 0x4848 //RX_FDEQ_GAIN_1 +198 0x4848 //RX_FDEQ_GAIN_2 +199 0x4848 //RX_FDEQ_GAIN_3 +200 0x5454 //RX_FDEQ_GAIN_4 +201 0x7C54 //RX_FDEQ_GAIN_5 +202 0x4850 //RX_FDEQ_GAIN_6 +203 0x4848 //RX_FDEQ_GAIN_7 +204 0x4860 //RX_FDEQ_GAIN_8 +205 0x7468 //RX_FDEQ_GAIN_9 +206 0x6060 //RX_FDEQ_GAIN_10 +207 0x6060 //RX_FDEQ_GAIN_11 +208 0x5C54 //RX_FDEQ_GAIN_12 +209 0x5450 //RX_FDEQ_GAIN_13 +210 0x5050 //RX_FDEQ_GAIN_14 +211 0x5860 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0202 //RX_FDEQ_BIN_0 +221 0x0203 //RX_FDEQ_BIN_1 +222 0x0303 //RX_FDEQ_BIN_2 +223 0x0304 //RX_FDEQ_BIN_3 +224 0x0404 //RX_FDEQ_BIN_4 +225 0x0308 //RX_FDEQ_BIN_5 +226 0x0808 //RX_FDEQ_BIN_6 +227 0x090A //RX_FDEQ_BIN_7 +228 0x0B0C //RX_FDEQ_BIN_8 +229 0x0D0E //RX_FDEQ_BIN_9 +230 0x1013 //RX_FDEQ_BIN_10 +231 0x1719 //RX_FDEQ_BIN_11 +232 0x1B1E //RX_FDEQ_BIN_12 +233 0x1E1E //RX_FDEQ_BIN_13 +234 0x1E28 //RX_FDEQ_BIN_14 +235 0x282C //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x4000 //RX_FDEQ_RESRV_0 +245 0x0320 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0035 //RX_FDDRC_BAND_MARGIN_1 +248 0x00D5 //RX_FDDRC_BAND_MARGIN_2 +249 0x0120 //RX_FDDRC_BAND_MARGIN_3 +250 0x0004 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x2000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x2000 //RX_FDDRC_THRD_3_2 +258 0x5000 //RX_FDDRC_THRD_3_3 +259 0x4000 //RX_FDDRC_SLANT_0_0 +260 0x4000 //RX_FDDRC_SLANT_0_1 +261 0x4000 //RX_FDDRC_SLANT_0_2 +262 0x4000 //RX_FDDRC_SLANT_0_3 +263 0x7FFF //RX_FDDRC_SLANT_1_0 +264 0x7FFF //RX_FDDRC_SLANT_1_1 +265 0x7FFF //RX_FDDRC_SLANT_1_2 +266 0x7FFF //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +286 0x0100 //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 diff --git a/audio/panther/tuning/fortemedia/HEADSET.dat b/audio/panther/tuning/fortemedia/HEADSET.dat index 99a8c1c..22e3e30 100644 Binary files a/audio/panther/tuning/fortemedia/HEADSET.dat and b/audio/panther/tuning/fortemedia/HEADSET.dat differ diff --git a/audio/panther/tuning/fortemedia/HEADSET.mods b/audio/panther/tuning/fortemedia/HEADSET.mods index 59f0067..ac10ce5 100644 --- a/audio/panther/tuning/fortemedia/HEADSET.mods +++ b/audio/panther/tuning/fortemedia/HEADSET.mods @@ -1,12 +1,12 @@ #PLATFORM_NAME gChip #EXPORT_FLAG HEADSET -#SINGLE_API_VER 1.1.6 -#SAVE_TIME 2022-01-04 15:20:23 +#SINGLE_API_VER 1.2.0 +#SAVE_TIME 2022-02-11 16:30:04 #CASE_NAME HEADSET-USB_BLACKBIRD-VOICE_GENERIC-NB #PARAM_MODE FULL -#PARAM_TYPE TX+RX -#TOTAL_CUSTOM_STEP 7 +#PARAM_TYPE TX+2RX +#TOTAL_CUSTOM_STEP 7+7 #TX 0 0x0009 //TX_OPERATION_MODE_0 1 0x0009 //TX_OPERATION_MODE_1 @@ -259,12 +259,12 @@ 248 0xFA00 //TX_THR_SN_EST_6 249 0xFA00 //TX_THR_SN_EST_7 250 0x0000 //TX_DELTA_THR_SN_EST_0 -251 0x0100 //TX_DELTA_THR_SN_EST_1 -252 0x0000 //TX_DELTA_THR_SN_EST_2 -253 0x0400 //TX_DELTA_THR_SN_EST_3 +251 0x0000 //TX_DELTA_THR_SN_EST_1 +252 0x0400 //TX_DELTA_THR_SN_EST_2 +253 0x0000 //TX_DELTA_THR_SN_EST_3 254 0x0000 //TX_DELTA_THR_SN_EST_4 255 0x0000 //TX_DELTA_THR_SN_EST_5 -256 0x0000 //TX_DELTA_THR_SN_EST_6 +256 0x0100 //TX_DELTA_THR_SN_EST_6 257 0x0000 //TX_DELTA_THR_SN_EST_7 258 0x4000 //TX_LAMBDA_NN_EST_0 259 0x4000 //TX_LAMBDA_NN_EST_1 @@ -291,28 +291,28 @@ 280 0x0400 //TX_B_POST_FLT_1 281 0x0010 //TX_NS_LVL_CTRL_0 282 0x0014 //TX_NS_LVL_CTRL_1 -283 0x0014 //TX_NS_LVL_CTRL_2 -284 0x0016 //TX_NS_LVL_CTRL_3 -285 0x0014 //TX_NS_LVL_CTRL_4 +283 0x0016 //TX_NS_LVL_CTRL_2 +284 0x0014 //TX_NS_LVL_CTRL_3 +285 0x0010 //TX_NS_LVL_CTRL_4 286 0x0010 //TX_NS_LVL_CTRL_5 -287 0x0010 //TX_NS_LVL_CTRL_6 +287 0x0014 //TX_NS_LVL_CTRL_6 288 0x0010 //TX_NS_LVL_CTRL_7 289 0x000D //TX_MIN_GAIN_S_0 290 0x0012 //TX_MIN_GAIN_S_1 291 0x0012 //TX_MIN_GAIN_S_2 292 0x0012 //TX_MIN_GAIN_S_3 -293 0x0012 //TX_MIN_GAIN_S_4 +293 0x000D //TX_MIN_GAIN_S_4 294 0x000D //TX_MIN_GAIN_S_5 -295 0x000D //TX_MIN_GAIN_S_6 +295 0x0012 //TX_MIN_GAIN_S_6 296 0x000D //TX_MIN_GAIN_S_7 297 0x7FFF //TX_NMOS_SUP 298 0x0000 //TX_NS_MAX_PRI_SNR_TH 299 0x0000 //TX_NMOS_SUP_MENSA 300 0x7FFF //TX_SNRI_SUP_0 -301 0x7FFF //TX_SNRI_SUP_1 +301 0x5000 //TX_SNRI_SUP_1 302 0x5000 //TX_SNRI_SUP_2 -303 0x5000 //TX_SNRI_SUP_3 -304 0x6000 //TX_SNRI_SUP_4 +303 0x6000 //TX_SNRI_SUP_3 +304 0x7FFF //TX_SNRI_SUP_4 305 0x7FFF //TX_SNRI_SUP_5 306 0x7FFF //TX_SNRI_SUP_6 307 0x7FFF //TX_SNRI_SUP_7 @@ -323,20 +323,20 @@ 312 0x7FFF //TX_A_POST_FILT_0 313 0x2000 //TX_A_POST_FILT_1 314 0x4000 //TX_A_POST_FILT_S_0 -315 0x7FFF //TX_A_POST_FILT_S_1 -316 0x1000 //TX_A_POST_FILT_S_2 -317 0x7000 //TX_A_POST_FILT_S_3 +315 0x1000 //TX_A_POST_FILT_S_1 +316 0x7000 //TX_A_POST_FILT_S_2 +317 0x4000 //TX_A_POST_FILT_S_3 318 0x4000 //TX_A_POST_FILT_S_4 319 0x4000 //TX_A_POST_FILT_S_5 -320 0x4000 //TX_A_POST_FILT_S_6 +320 0x7FFF //TX_A_POST_FILT_S_6 321 0x4000 //TX_A_POST_FILT_S_7 322 0x0400 //TX_B_POST_FILT_0 -323 0x0400 //TX_B_POST_FILT_1 +323 0x2000 //TX_B_POST_FILT_1 324 0x2000 //TX_B_POST_FILT_2 -325 0x2000 //TX_B_POST_FILT_3 -326 0x4000 //TX_B_POST_FILT_4 +325 0x4000 //TX_B_POST_FILT_3 +326 0x2000 //TX_B_POST_FILT_4 327 0x2000 //TX_B_POST_FILT_5 -328 0x2000 //TX_B_POST_FILT_6 +328 0x0400 //TX_B_POST_FILT_6 329 0x2000 //TX_B_POST_FILT_7 330 0x7FFF //TX_B_LESSCUT_RTO_S_0 331 0x7FFF //TX_B_LESSCUT_RTO_S_1 @@ -348,12 +348,12 @@ 337 0x7FFF //TX_B_LESSCUT_RTO_S_7 338 0x7E14 //TX_LAMBDA_PFILT 339 0x7C29 //TX_LAMBDA_PFILT_S_0 -340 0x7F00 //TX_LAMBDA_PFILT_S_1 -341 0x7C29 //TX_LAMBDA_PFILT_S_2 -342 0x6000 //TX_LAMBDA_PFILT_S_3 +340 0x7C29 //TX_LAMBDA_PFILT_S_1 +341 0x6000 //TX_LAMBDA_PFILT_S_2 +342 0x7C29 //TX_LAMBDA_PFILT_S_3 343 0x7C29 //TX_LAMBDA_PFILT_S_4 344 0x7C29 //TX_LAMBDA_PFILT_S_5 -345 0x7C29 //TX_LAMBDA_PFILT_S_6 +345 0x7F00 //TX_LAMBDA_PFILT_S_6 346 0x7C29 //TX_LAMBDA_PFILT_S_7 347 0x0200 //TX_K_PEPPER 348 0x0400 //TX_A_PEPPER @@ -375,7 +375,7 @@ 364 0x0000 //TX_K_APT 365 0x0001 //TX_NOISEDET 366 0x0190 //TX_NDETCT -367 0x0029 //TX_NOISE_TH_0 +367 0x003B //TX_NOISE_TH_0 368 0x7FFF //TX_NOISE_TH_0_2 369 0x7FFF //TX_NOISE_TH_0_3 370 0x0900 //TX_NOISE_TH_1 @@ -387,11 +387,11 @@ 376 0x0000 //TX_NOISE_TH_5_3 377 0x0000 //TX_NOISE_TH_5_4 378 0x00C8 //TX_NOISE_TH_6 -379 0x0014 //TX_MINENOISE_TH -380 0x4000 //TX_MINENOISE_MIC0_TH_MTS -381 0xFFEE //TX_MINENOISE_MIC0_TH_EXP -382 0x6000 //TX_MINENOISE_MIC0_S_TH_MTS -383 0xFFF3 //TX_MINENOISE_MIC0_S_TH_EXP +379 0x00C8 //TX_MINENOISE_TH +380 0xD508 //TX_MORENS_TFMASK_TH +381 0x0001 //TX_DRC_QUIET_FLOOR +382 0x3A98 //TX_RATIODTL_CUT_TH +383 0x0DAC //TX_DT_CUT_K1 384 0x00A5 //TX_OUT_ENER_S_TH_CLEAN 385 0x00A5 //TX_OUT_ENER_S_TH_LESSCLEAN 386 0x00A5 //TX_OUT_ENER_S_TH_NOISY @@ -399,22 +399,22 @@ 388 0x00CE //TX_OUT_ENER_TH_SPEECH 389 0x2000 //TX_SN_NPB_GAIN 390 0x0000 //TX_NN_NPB_GAIN -391 0x0000 //TX_CSX_ALPHA_0 -392 0x0000 //TX_CSX_ALPHA_1 -393 0x0000 //TX_CSX_ALPHA_2 -394 0x0000 //TX_CSX_ALPHA_3 -395 0x0800 //TX_MU_ARSP_EST -396 0x00C8 //TX_P_OUTBEAM_MIN_TH +391 0x7FFF //TX_POST_MASK_SUP_HSNE +392 0x1388 //TX_TAIL_DET_TH +393 0x4000 //TX_B_LESSCUT_RTO_WTA +394 0x0000 //TX_MEL_G_R +395 0x0080 //TX_SUPHIGH_TH +396 0x0000 //TX_MASK_G_R 397 0x0002 //TX_EXTRA_NS_L -398 0x0800 //TX_EXTRA_NS_A -399 0x0005 //TX_VR_NOISE_FLOOR_TH +398 0x1800 //TX_C_POST_FLT_MASK +399 0x7FFF //TX_A_POST_FLT_WNS 400 0x0148 //TX_MIN_G_LOW300HZ 401 0x0002 //TX_MAXLEVEL_CNG 402 0x00B4 //TX_STN_NOISE_TH 403 0x4000 //TX_POST_MASK_SUP 404 0x7FFF //TX_POST_MASK_ADJUST 405 0x00C8 //TX_NS_ENOISE_MIC0_TH -406 0x0014 //TX_MINENOISE_MIC0_TH +406 0x0032 //TX_MINENOISE_MIC0_TH 407 0x012C //TX_MINENOISE_MIC0_S_TH 408 0x7FFF //TX_MIN_G_CTRL_SSNS 409 0x0000 //TX_METAL_RTO_THR @@ -522,16 +522,16 @@ 511 0x6666 //TX_MIC_TO_BFGAIN 512 0x0000 //TX_MICTOBFGAIN0 513 0x0000 //TX_FASTMUE_TH -514 0x0000 //TX_DERVB_LEN_0 -515 0x0000 //TX_DERVB_LEN_1 -516 0x0000 //TX_RHO_DERVB -517 0x0000 //TX_MIC_INDX_DERVB -518 0x0000 //TX_MU_DERVB -519 0x0000 //TX_DR_RESRV_0 -520 0x0000 //TX_DR_RESRV_1 -521 0x0000 //TX_DR_RESRV_2 -522 0x0000 //TX_DR_RESRV_3 -523 0x0000 //TX_DR_RESRV_4 +514 0xC000 //TX_DEREVERB_LF_MU +515 0xC000 //TX_DEREVERB_HF_MU +516 0xCCCC //TX_DEREVERB_DELAY +517 0xD999 //TX_DEREVERB_COEF_LEN +518 0x1F40 //TX_DEREVERB_DNR +519 0x0000 //TX_DEREVERB_ALPHA +520 0x0000 //TX_DEREVERB_BETA +521 0x0000 //TX_GSC_RTOL_TH +522 0x7000 //TX_GSC_RTOH_TH +523 0x0064 //TX_WIDE2_MEANHTH 524 0x0000 //TX_DR_RESRV_5 525 0x0000 //TX_DR_RESRV_6 526 0x0000 //TX_DR_RESRV_7 @@ -897,16 +897,81 @@ 886 0x0CCD //TX_FASTNS_TFMASKBIN_TH2 887 0x0CCD //TX_FASTNS_TFMASKBIN_TH3 888 0x0028 //TX_FASTNS_ARSPC_TH -889 0x2000 //TX_FASTNS_MASK5_TH +889 0xC000 //TX_FASTNS_MASK5_TH 890 0x4848 //TX_POSTSSA_MIN_G_VR_MASK -891 0x1000 //TX_A_LESSCUT_RTO_MASK +891 0x4000 //TX_A_LESSCUT_RTO_MASK 892 0x1770 //TX_FASTNS_NOISETH 893 0xC000 //TX_FASTNS_SSA_THLFL 894 0xC000 //TX_FASTNS_SSA_THHFL 895 0xCCCC //TX_FASTNS_SSA_THLFH 896 0xD999 //TX_FASTNS_SSA_THHFH +897 0x2339 //TX_SENDFUNC_REG_MICMUTE +898 0x0021 //TX_SENDFUNC_REG_MICMUTE1 +899 0x02BC //TX_MICMUTE_RATIO_THR +900 0x0140 //TX_MICMUTE_AMP_THR +901 0x0004 //TX_MICMUTE_HPF_IND +902 0x00C0 //TX_MICMUTE_LOG_EYR_TH +903 0x0008 //TX_MICMUTE_CVG_TIME +904 0x0008 //TX_MICMUTE_RELEASE_TIME +905 0x01FE //TX_MIC_VOLUME_MIC0MUTE +906 0x0020 //TX_MICMUTE_EPD_OFFSET_0 +907 0x001E //TX_MICMUTE_FRQ_AEC_L +908 0x7999 //TX_MICMUTE_EAD_THR +909 0x7FFF //TX_MICMUTE_LAMBDA_CB_NLE +910 0x7FFF //TX_MICMUTE_LAMBDA_RE_EST +911 0x4000 //TX_DTD_THR1_MICMUTE_0 +912 0x7000 //TX_DTD_THR1_MICMUTE_1 +913 0x7FFF //TX_DTD_THR1_MICMUTE_2 +914 0x7FFF //TX_DTD_THR1_MICMUTE_3 +915 0x6CCC //TX_DTD_THR2_MICMUTE_0 +916 0x0400 //TX_MICMUTE_MIN_EQ_RE_EST_0 +917 0x0400 //TX_MICMUTE_MIN_EQ_RE_EST_1 +918 0x1000 //TX_MICMUTE_MIN_EQ_RE_EST_2 +919 0x7FFF //TX_MICMUTE_MIN_EQ_RE_EST_3 +920 0x7FFF //TX_MICMUTE_MIN_EQ_RE_EST_4 +921 0x4000 //TX_MICMUTE_C_POST_FLT +922 0x03E8 //TX_MICMUTE_DT_CUT_K +923 0x0001 //TX_MICMUTE_DT_CUT_THR +924 0x03E8 //TX_MICMUTE_DT_CUT_K2 +925 0x0001 //TX_MICMUTE_DT_CUT_THR2 +926 0x0064 //TX_MICMUTE_DT2_HOLD_N +927 0x1000 //TX_MICMUTE_RATIODTH_THCUT +928 0x1000 //TX_MICMUTE_B_POST_FLT_ECHOL +929 0x7FFF //TX_MICMUTE_B_POST_FLT_ECHOH +930 0x0400 //TX_MICMUTE_C_POST_FLT_MASK +931 0x7999 //TX_MICMUTE_RATIODTL_CUT_TH +932 0x0258 //TX_MICMUTE_DT_CUT_K1 +933 0x0800 //TX_MICMUTE_N2_SN_EST +934 0xFC00 //TX_MICMUTE_THR_SN_EST_0 +935 0x001C //TX_MICMUTE_MIN_G_CTRL_0 +936 0x6000 //TX_MICMUTE_A_POST_FILT_S_0 +937 0x7000 //TX_MICMUTE_B_POST_FILT_0 +938 0x2710 //TX_MIC1RUB_AMP_THR +939 0x0010 //TX_MIC1MUTE_RATIO_THR +940 0x0450 //TX_MIC1MUTE_AMP_THR +941 0x0008 //TX_MIC1MUTE_CVG_TIME +942 0x0008 //TX_MIC1MUTE_RELEASE_TIME +943 0x0000 //TX_AMS_RESRV_01 +944 0x0000 //TX_AMS_RESRV_02 +945 0x0000 //TX_AMS_RESRV_03 +946 0x0000 //TX_AMS_RESRV_04 +947 0x0000 //TX_AMS_RESRV_05 +948 0x0000 //TX_AMS_RESRV_06 +949 0x0000 //TX_AMS_RESRV_07 +950 0x0000 //TX_AMS_RESRV_08 +951 0x0000 //TX_AMS_RESRV_09 +952 0x0000 //TX_AMS_RESRV_10 +953 0x0000 //TX_AMS_RESRV_11 +954 0x0000 //TX_AMS_RESRV_12 +955 0x0000 //TX_AMS_RESRV_13 +956 0x0000 //TX_AMS_RESRV_14 +957 0x0000 //TX_AMS_RESRV_15 +958 0x0000 //TX_AMS_RESRV_16 +959 0x0000 //TX_AMS_RESRV_17 +960 0x0000 //TX_AMS_RESRV_18 +961 0x0000 //TX_AMS_RESRV_19 #RX -0 0x042C //RX_RECVFUNC_MODE_0 +0 0x242C //RX_RECVFUNC_MODE_0 1 0x0000 //RX_RECVFUNC_MODE_1 2 0x0000 //RX_SAMPLINGFREQ_SIG 3 0x0000 //RX_SAMPLINGFREQ_PROC @@ -939,7 +1004,7 @@ 30 0x0002 //RX_EXTRA_NS_L 31 0x0800 //RX_EXTRA_NS_A 32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 -33 0x5FFC //RX_TDDRC_LIMITER_THRD +33 0x7220 //RX_TDDRC_LIMITER_THRD 34 0x0800 //RX_TDDRC_LIMITER_GAIN 35 0x199A //RX_A_POST_FLT 36 0x0000 //RX_LMT_THRD @@ -1020,22 +1085,22 @@ 111 0x0002 //RX_FILTINDX 112 0x0000 //RX_TDDRC_THRD_0 113 0x0000 //RX_TDDRC_THRD_1 -114 0x1C00 //RX_TDDRC_THRD_2 -115 0x1D00 //RX_TDDRC_THRD_3 -116 0x3000 //RX_TDDRC_SLANT_0 -117 0x7EB8 //RX_TDDRC_SLANT_1 +114 0x1800 //RX_TDDRC_THRD_2 +115 0x1800 //RX_TDDRC_THRD_3 +116 0x7FFF //RX_TDDRC_SLANT_0 +117 0x7FFF //RX_TDDRC_SLANT_1 118 0x3000 //RX_TDDRC_ALPHA_UP_0 119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 120 0x0000 //RX_TDDRC_HMNC_FLAG 121 0x199A //RX_TDDRC_HMNC_GAIN 122 0x0001 //RX_TDDRC_SMT_FLAG 123 0x0CCD //RX_TDDRC_SMT_W -124 0x01F4 //RX_TDDRC_DRC_GAIN +124 0x0211 //RX_TDDRC_DRC_GAIN 125 0x7C00 //RX_LAMBDA_PKA_FP 126 0x280A //RX_TPKA_FP 127 0x032D //RX_MIN_G_FP 128 0x0A00 //RX_MAX_G_FP -129 0x000A //RX_SPK_VOL +129 0x0009 //RX_SPK_VOL 130 0x0000 //RX_VOL_RESRV_0 131 0x0000 //RX_MAXLEVEL_CNG 132 0x3000 //RX_BWE_UV_TH @@ -1756,11 +1821,862 @@ 110 0x0000 //RX_FDDRC_RESRV_0 129 0x0100 //RX_SPK_VOL 130 0x0000 //RX_VOL_RESRV_0 +#RX 2 +157 0x242C //RX_RECVFUNC_MODE_0 +158 0x0000 //RX_RECVFUNC_MODE_1 +159 0x0000 //RX_SAMPLINGFREQ_SIG +160 0x0000 //RX_SAMPLINGFREQ_PROC +161 0x000A //RX_FRAME_SZ +162 0x0000 //RX_DELAY_OPT +163 0x3000 //RX_TDDRC_ALPHA_UP_1 +164 0x3000 //RX_TDDRC_ALPHA_UP_2 +165 0x3000 //RX_TDDRC_ALPHA_UP_3 +166 0x3000 //RX_TDDRC_ALPHA_UP_4 +167 0x0800 //RX_PGA +168 0x7FFF //RX_A_HP +169 0x0000 //RX_B_PE +170 0x3800 //RX_THR_PITCH_DET_0 +171 0x3000 //RX_THR_PITCH_DET_1 +172 0x2800 //RX_THR_PITCH_DET_2 +173 0x0008 //RX_PITCH_BFR_LEN +174 0x0003 //RX_SBD_PITCH_DET +175 0x0100 //RX_PP_RESRV_0 +176 0x0020 //RX_PP_RESRV_1 +177 0x0600 //RX_N_SN_EST +178 0x000C //RX_N2_SN_EST +179 0x0010 //RX_NS_LVL_CTRL +180 0xF800 //RX_THR_SN_EST +181 0x7CCD //RX_LAMBDA_PFILT +182 0x000A //RX_FENS_RESRV_0 +183 0x0190 //RX_FENS_RESRV_1 +184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +187 0x0002 //RX_EXTRA_NS_L +188 0x0800 //RX_EXTRA_NS_A +189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +190 0x7220 //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +192 0x199A //RX_A_POST_FLT +193 0x0000 //RX_LMT_THRD +194 0x4000 //RX_LMT_ALPHA +195 0x0014 //RX_FDEQ_SUBNUM +196 0x4848 //RX_FDEQ_GAIN_0 +197 0x4848 //RX_FDEQ_GAIN_1 +198 0x4848 //RX_FDEQ_GAIN_2 +199 0x4848 //RX_FDEQ_GAIN_3 +200 0x4848 //RX_FDEQ_GAIN_4 +201 0x4848 //RX_FDEQ_GAIN_5 +202 0x4848 //RX_FDEQ_GAIN_6 +203 0x4848 //RX_FDEQ_GAIN_7 +204 0x4848 //RX_FDEQ_GAIN_8 +205 0x4848 //RX_FDEQ_GAIN_9 +206 0x4848 //RX_FDEQ_GAIN_10 +207 0x4848 //RX_FDEQ_GAIN_11 +208 0x4848 //RX_FDEQ_GAIN_12 +209 0x4848 //RX_FDEQ_GAIN_13 +210 0x4848 //RX_FDEQ_GAIN_14 +211 0x4848 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0202 //RX_FDEQ_BIN_0 +221 0x0203 //RX_FDEQ_BIN_1 +222 0x0303 //RX_FDEQ_BIN_2 +223 0x0304 //RX_FDEQ_BIN_3 +224 0x0405 //RX_FDEQ_BIN_4 +225 0x0506 //RX_FDEQ_BIN_5 +226 0x0708 //RX_FDEQ_BIN_6 +227 0x090A //RX_FDEQ_BIN_7 +228 0x0B0C //RX_FDEQ_BIN_8 +229 0x0D08 //RX_FDEQ_BIN_9 +230 0x0000 //RX_FDEQ_BIN_10 +231 0x0000 //RX_FDEQ_BIN_11 +232 0x0000 //RX_FDEQ_BIN_12 +233 0x0000 //RX_FDEQ_BIN_13 +234 0x0000 //RX_FDEQ_BIN_14 +235 0x0000 //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x4000 //RX_FDEQ_RESRV_0 +245 0x0320 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0030 //RX_FDDRC_BAND_MARGIN_1 +248 0x0050 //RX_FDDRC_BAND_MARGIN_2 +249 0x0080 //RX_FDDRC_BAND_MARGIN_3 +250 0x0007 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x5000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x6400 //RX_FDDRC_THRD_3_2 +258 0x6400 //RX_FDDRC_THRD_3_3 +259 0x2000 //RX_FDDRC_SLANT_0_0 +260 0x2000 //RX_FDDRC_SLANT_0_1 +261 0x2000 //RX_FDDRC_SLANT_0_2 +262 0x2000 //RX_FDDRC_SLANT_0_3 +263 0x5333 //RX_FDDRC_SLANT_1_0 +264 0x5333 //RX_FDDRC_SLANT_1_1 +265 0x5333 //RX_FDDRC_SLANT_1_2 +266 0x5333 //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +268 0x0002 //RX_FILTINDX +269 0x0000 //RX_TDDRC_THRD_0 +270 0x0000 //RX_TDDRC_THRD_1 +271 0x1800 //RX_TDDRC_THRD_2 +272 0x1800 //RX_TDDRC_THRD_3 +273 0x7FFF //RX_TDDRC_SLANT_0 +274 0x7FFF //RX_TDDRC_SLANT_1 +275 0x3000 //RX_TDDRC_ALPHA_UP_0 +276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x199A //RX_TDDRC_HMNC_GAIN +279 0x0001 //RX_TDDRC_SMT_FLAG +280 0x0CCD //RX_TDDRC_SMT_W +281 0x0211 //RX_TDDRC_DRC_GAIN +282 0x7C00 //RX_LAMBDA_PKA_FP +283 0x280A //RX_TPKA_FP +284 0x032D //RX_MIN_G_FP +285 0x0A00 //RX_MAX_G_FP +286 0x0009 //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 +288 0x0000 //RX_MAXLEVEL_CNG +289 0x3000 //RX_BWE_UV_TH +290 0x3000 //RX_BWE_UV_TH2 +291 0x1800 //RX_BWE_UV_TH3 +292 0x1000 //RX_BWE_V_TH +293 0x04CD //RX_BWE_GAIN1_V_TH1 +294 0x0F33 //RX_BWE_GAIN1_V_TH2 +295 0x7333 //RX_BWE_UV_EQ +296 0x199A //RX_BWE_V_EQ +297 0x7333 //RX_BWE_TONE_TH +298 0x0004 //RX_BWE_UV_HOLD_T +299 0x6CCD //RX_BWE_GAIN2_ALPHA +300 0x799A //RX_BWE_GAIN3_ALPHA +301 0x001E //RX_BWE_CUTOFF +302 0x3000 //RX_BWE_GAINFILL +303 0x3200 //RX_BWE_MAXTH_TONE +304 0x2000 //RX_BWE_EQ_0 +305 0x2000 //RX_BWE_EQ_1 +306 0x2000 //RX_BWE_EQ_2 +307 0x2000 //RX_BWE_EQ_3 +308 0x2000 //RX_BWE_EQ_4 +309 0x2000 //RX_BWE_EQ_5 +310 0x2000 //RX_BWE_EQ_6 +311 0x0000 //RX_BWE_RESRV_0 +312 0x0000 //RX_BWE_RESRV_1 +313 0x0000 //RX_BWE_RESRV_2 +#VOL 0 +163 0x3000 //RX_TDDRC_ALPHA_UP_1 +164 0x3000 //RX_TDDRC_ALPHA_UP_2 +165 0x3000 //RX_TDDRC_ALPHA_UP_3 +166 0x3000 //RX_TDDRC_ALPHA_UP_4 +184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +190 0x7220 //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +269 0x0000 //RX_TDDRC_THRD_0 +270 0x0000 //RX_TDDRC_THRD_1 +271 0x1800 //RX_TDDRC_THRD_2 +272 0x1800 //RX_TDDRC_THRD_3 +273 0x7FFF //RX_TDDRC_SLANT_0 +274 0x7FFF //RX_TDDRC_SLANT_1 +275 0x3000 //RX_TDDRC_ALPHA_UP_0 +276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x199A //RX_TDDRC_HMNC_GAIN +279 0x0001 //RX_TDDRC_SMT_FLAG +280 0x0CCD //RX_TDDRC_SMT_W +281 0x0211 //RX_TDDRC_DRC_GAIN +195 0x0014 //RX_FDEQ_SUBNUM +196 0x4848 //RX_FDEQ_GAIN_0 +197 0x4848 //RX_FDEQ_GAIN_1 +198 0x4848 //RX_FDEQ_GAIN_2 +199 0x4848 //RX_FDEQ_GAIN_3 +200 0x4848 //RX_FDEQ_GAIN_4 +201 0x4848 //RX_FDEQ_GAIN_5 +202 0x4848 //RX_FDEQ_GAIN_6 +203 0x4848 //RX_FDEQ_GAIN_7 +204 0x4848 //RX_FDEQ_GAIN_8 +205 0x4848 //RX_FDEQ_GAIN_9 +206 0x4848 //RX_FDEQ_GAIN_10 +207 0x4848 //RX_FDEQ_GAIN_11 +208 0x4848 //RX_FDEQ_GAIN_12 +209 0x4848 //RX_FDEQ_GAIN_13 +210 0x4848 //RX_FDEQ_GAIN_14 +211 0x4848 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0202 //RX_FDEQ_BIN_0 +221 0x0203 //RX_FDEQ_BIN_1 +222 0x0303 //RX_FDEQ_BIN_2 +223 0x0304 //RX_FDEQ_BIN_3 +224 0x0405 //RX_FDEQ_BIN_4 +225 0x0506 //RX_FDEQ_BIN_5 +226 0x0708 //RX_FDEQ_BIN_6 +227 0x090A //RX_FDEQ_BIN_7 +228 0x0B0C //RX_FDEQ_BIN_8 +229 0x0D08 //RX_FDEQ_BIN_9 +230 0x0000 //RX_FDEQ_BIN_10 +231 0x0000 //RX_FDEQ_BIN_11 +232 0x0000 //RX_FDEQ_BIN_12 +233 0x0000 //RX_FDEQ_BIN_13 +234 0x0000 //RX_FDEQ_BIN_14 +235 0x0000 //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x4000 //RX_FDEQ_RESRV_0 +245 0x0320 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0030 //RX_FDDRC_BAND_MARGIN_1 +248 0x0050 //RX_FDDRC_BAND_MARGIN_2 +249 0x0080 //RX_FDDRC_BAND_MARGIN_3 +250 0x0007 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x5000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x6400 //RX_FDDRC_THRD_3_2 +258 0x6400 //RX_FDDRC_THRD_3_3 +259 0x2000 //RX_FDDRC_SLANT_0_0 +260 0x2000 //RX_FDDRC_SLANT_0_1 +261 0x2000 //RX_FDDRC_SLANT_0_2 +262 0x2000 //RX_FDDRC_SLANT_0_3 +263 0x5333 //RX_FDDRC_SLANT_1_0 +264 0x5333 //RX_FDDRC_SLANT_1_1 +265 0x5333 //RX_FDDRC_SLANT_1_2 +266 0x5333 //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +286 0x0009 //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 +#VOL 1 +163 0x3000 //RX_TDDRC_ALPHA_UP_1 +164 0x3000 //RX_TDDRC_ALPHA_UP_2 +165 0x3000 //RX_TDDRC_ALPHA_UP_3 +166 0x3000 //RX_TDDRC_ALPHA_UP_4 +184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +190 0x7220 //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +269 0x0000 //RX_TDDRC_THRD_0 +270 0x0000 //RX_TDDRC_THRD_1 +271 0x1800 //RX_TDDRC_THRD_2 +272 0x1800 //RX_TDDRC_THRD_3 +273 0x7FFF //RX_TDDRC_SLANT_0 +274 0x7FFF //RX_TDDRC_SLANT_1 +275 0x3000 //RX_TDDRC_ALPHA_UP_0 +276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x199A //RX_TDDRC_HMNC_GAIN +279 0x0001 //RX_TDDRC_SMT_FLAG +280 0x0CCD //RX_TDDRC_SMT_W +281 0x0211 //RX_TDDRC_DRC_GAIN +195 0x0014 //RX_FDEQ_SUBNUM +196 0x4848 //RX_FDEQ_GAIN_0 +197 0x4848 //RX_FDEQ_GAIN_1 +198 0x4848 //RX_FDEQ_GAIN_2 +199 0x4848 //RX_FDEQ_GAIN_3 +200 0x4848 //RX_FDEQ_GAIN_4 +201 0x4848 //RX_FDEQ_GAIN_5 +202 0x4848 //RX_FDEQ_GAIN_6 +203 0x4848 //RX_FDEQ_GAIN_7 +204 0x4848 //RX_FDEQ_GAIN_8 +205 0x4848 //RX_FDEQ_GAIN_9 +206 0x4848 //RX_FDEQ_GAIN_10 +207 0x4848 //RX_FDEQ_GAIN_11 +208 0x4848 //RX_FDEQ_GAIN_12 +209 0x4848 //RX_FDEQ_GAIN_13 +210 0x4848 //RX_FDEQ_GAIN_14 +211 0x4848 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0202 //RX_FDEQ_BIN_0 +221 0x0203 //RX_FDEQ_BIN_1 +222 0x0303 //RX_FDEQ_BIN_2 +223 0x0304 //RX_FDEQ_BIN_3 +224 0x0405 //RX_FDEQ_BIN_4 +225 0x0506 //RX_FDEQ_BIN_5 +226 0x0708 //RX_FDEQ_BIN_6 +227 0x090A //RX_FDEQ_BIN_7 +228 0x0B0C //RX_FDEQ_BIN_8 +229 0x0D08 //RX_FDEQ_BIN_9 +230 0x0000 //RX_FDEQ_BIN_10 +231 0x0000 //RX_FDEQ_BIN_11 +232 0x0000 //RX_FDEQ_BIN_12 +233 0x0000 //RX_FDEQ_BIN_13 +234 0x0000 //RX_FDEQ_BIN_14 +235 0x0000 //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x4000 //RX_FDEQ_RESRV_0 +245 0x0320 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0030 //RX_FDDRC_BAND_MARGIN_1 +248 0x0050 //RX_FDDRC_BAND_MARGIN_2 +249 0x0080 //RX_FDDRC_BAND_MARGIN_3 +250 0x0007 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x5000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x6400 //RX_FDDRC_THRD_3_2 +258 0x6400 //RX_FDDRC_THRD_3_3 +259 0x2000 //RX_FDDRC_SLANT_0_0 +260 0x2000 //RX_FDDRC_SLANT_0_1 +261 0x2000 //RX_FDDRC_SLANT_0_2 +262 0x2000 //RX_FDDRC_SLANT_0_3 +263 0x5333 //RX_FDDRC_SLANT_1_0 +264 0x5333 //RX_FDDRC_SLANT_1_1 +265 0x5333 //RX_FDDRC_SLANT_1_2 +266 0x5333 //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +286 0x000F //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 +#VOL 2 +163 0x3000 //RX_TDDRC_ALPHA_UP_1 +164 0x3000 //RX_TDDRC_ALPHA_UP_2 +165 0x3000 //RX_TDDRC_ALPHA_UP_3 +166 0x3000 //RX_TDDRC_ALPHA_UP_4 +184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +190 0x7220 //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +269 0x0000 //RX_TDDRC_THRD_0 +270 0x0000 //RX_TDDRC_THRD_1 +271 0x1800 //RX_TDDRC_THRD_2 +272 0x1800 //RX_TDDRC_THRD_3 +273 0x7FFF //RX_TDDRC_SLANT_0 +274 0x7FFF //RX_TDDRC_SLANT_1 +275 0x3000 //RX_TDDRC_ALPHA_UP_0 +276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x199A //RX_TDDRC_HMNC_GAIN +279 0x0001 //RX_TDDRC_SMT_FLAG +280 0x0CCD //RX_TDDRC_SMT_W +281 0x0211 //RX_TDDRC_DRC_GAIN +195 0x0014 //RX_FDEQ_SUBNUM +196 0x4848 //RX_FDEQ_GAIN_0 +197 0x4848 //RX_FDEQ_GAIN_1 +198 0x4848 //RX_FDEQ_GAIN_2 +199 0x4848 //RX_FDEQ_GAIN_3 +200 0x4848 //RX_FDEQ_GAIN_4 +201 0x4848 //RX_FDEQ_GAIN_5 +202 0x4848 //RX_FDEQ_GAIN_6 +203 0x4848 //RX_FDEQ_GAIN_7 +204 0x4848 //RX_FDEQ_GAIN_8 +205 0x4848 //RX_FDEQ_GAIN_9 +206 0x4848 //RX_FDEQ_GAIN_10 +207 0x4848 //RX_FDEQ_GAIN_11 +208 0x4848 //RX_FDEQ_GAIN_12 +209 0x4848 //RX_FDEQ_GAIN_13 +210 0x4848 //RX_FDEQ_GAIN_14 +211 0x4848 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0202 //RX_FDEQ_BIN_0 +221 0x0203 //RX_FDEQ_BIN_1 +222 0x0303 //RX_FDEQ_BIN_2 +223 0x0304 //RX_FDEQ_BIN_3 +224 0x0405 //RX_FDEQ_BIN_4 +225 0x0506 //RX_FDEQ_BIN_5 +226 0x0708 //RX_FDEQ_BIN_6 +227 0x090A //RX_FDEQ_BIN_7 +228 0x0B0C //RX_FDEQ_BIN_8 +229 0x0D08 //RX_FDEQ_BIN_9 +230 0x0000 //RX_FDEQ_BIN_10 +231 0x0000 //RX_FDEQ_BIN_11 +232 0x0000 //RX_FDEQ_BIN_12 +233 0x0000 //RX_FDEQ_BIN_13 +234 0x0000 //RX_FDEQ_BIN_14 +235 0x0000 //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x4000 //RX_FDEQ_RESRV_0 +245 0x0320 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0030 //RX_FDDRC_BAND_MARGIN_1 +248 0x0050 //RX_FDDRC_BAND_MARGIN_2 +249 0x0080 //RX_FDDRC_BAND_MARGIN_3 +250 0x0007 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x5000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x6400 //RX_FDDRC_THRD_3_2 +258 0x6400 //RX_FDDRC_THRD_3_3 +259 0x2000 //RX_FDDRC_SLANT_0_0 +260 0x2000 //RX_FDDRC_SLANT_0_1 +261 0x2000 //RX_FDDRC_SLANT_0_2 +262 0x2000 //RX_FDDRC_SLANT_0_3 +263 0x5333 //RX_FDDRC_SLANT_1_0 +264 0x5333 //RX_FDDRC_SLANT_1_1 +265 0x5333 //RX_FDDRC_SLANT_1_2 +266 0x5333 //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +286 0x0019 //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 +#VOL 3 +163 0x3000 //RX_TDDRC_ALPHA_UP_1 +164 0x3000 //RX_TDDRC_ALPHA_UP_2 +165 0x3000 //RX_TDDRC_ALPHA_UP_3 +166 0x3000 //RX_TDDRC_ALPHA_UP_4 +184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +190 0x7220 //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +269 0x0000 //RX_TDDRC_THRD_0 +270 0x0000 //RX_TDDRC_THRD_1 +271 0x1800 //RX_TDDRC_THRD_2 +272 0x1800 //RX_TDDRC_THRD_3 +273 0x7FFF //RX_TDDRC_SLANT_0 +274 0x7FFF //RX_TDDRC_SLANT_1 +275 0x3000 //RX_TDDRC_ALPHA_UP_0 +276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x199A //RX_TDDRC_HMNC_GAIN +279 0x0001 //RX_TDDRC_SMT_FLAG +280 0x0CCD //RX_TDDRC_SMT_W +281 0x0211 //RX_TDDRC_DRC_GAIN +195 0x0014 //RX_FDEQ_SUBNUM +196 0x4848 //RX_FDEQ_GAIN_0 +197 0x4848 //RX_FDEQ_GAIN_1 +198 0x4848 //RX_FDEQ_GAIN_2 +199 0x4848 //RX_FDEQ_GAIN_3 +200 0x4848 //RX_FDEQ_GAIN_4 +201 0x4848 //RX_FDEQ_GAIN_5 +202 0x4848 //RX_FDEQ_GAIN_6 +203 0x4848 //RX_FDEQ_GAIN_7 +204 0x4848 //RX_FDEQ_GAIN_8 +205 0x4848 //RX_FDEQ_GAIN_9 +206 0x4848 //RX_FDEQ_GAIN_10 +207 0x4848 //RX_FDEQ_GAIN_11 +208 0x4848 //RX_FDEQ_GAIN_12 +209 0x4848 //RX_FDEQ_GAIN_13 +210 0x4848 //RX_FDEQ_GAIN_14 +211 0x4848 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0202 //RX_FDEQ_BIN_0 +221 0x0203 //RX_FDEQ_BIN_1 +222 0x0303 //RX_FDEQ_BIN_2 +223 0x0304 //RX_FDEQ_BIN_3 +224 0x0405 //RX_FDEQ_BIN_4 +225 0x0506 //RX_FDEQ_BIN_5 +226 0x0708 //RX_FDEQ_BIN_6 +227 0x090A //RX_FDEQ_BIN_7 +228 0x0B0C //RX_FDEQ_BIN_8 +229 0x0D08 //RX_FDEQ_BIN_9 +230 0x0000 //RX_FDEQ_BIN_10 +231 0x0000 //RX_FDEQ_BIN_11 +232 0x0000 //RX_FDEQ_BIN_12 +233 0x0000 //RX_FDEQ_BIN_13 +234 0x0000 //RX_FDEQ_BIN_14 +235 0x0000 //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x4000 //RX_FDEQ_RESRV_0 +245 0x0320 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0030 //RX_FDDRC_BAND_MARGIN_1 +248 0x0050 //RX_FDDRC_BAND_MARGIN_2 +249 0x0080 //RX_FDDRC_BAND_MARGIN_3 +250 0x0007 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x5000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x6400 //RX_FDDRC_THRD_3_2 +258 0x6400 //RX_FDDRC_THRD_3_3 +259 0x2000 //RX_FDDRC_SLANT_0_0 +260 0x2000 //RX_FDDRC_SLANT_0_1 +261 0x2000 //RX_FDDRC_SLANT_0_2 +262 0x2000 //RX_FDDRC_SLANT_0_3 +263 0x5333 //RX_FDDRC_SLANT_1_0 +264 0x5333 //RX_FDDRC_SLANT_1_1 +265 0x5333 //RX_FDDRC_SLANT_1_2 +266 0x5333 //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +286 0x002B //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 +#VOL 4 +163 0x3000 //RX_TDDRC_ALPHA_UP_1 +164 0x3000 //RX_TDDRC_ALPHA_UP_2 +165 0x3000 //RX_TDDRC_ALPHA_UP_3 +166 0x3000 //RX_TDDRC_ALPHA_UP_4 +184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +190 0x7220 //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +269 0x0000 //RX_TDDRC_THRD_0 +270 0x0000 //RX_TDDRC_THRD_1 +271 0x1800 //RX_TDDRC_THRD_2 +272 0x1800 //RX_TDDRC_THRD_3 +273 0x7FFF //RX_TDDRC_SLANT_0 +274 0x7FFF //RX_TDDRC_SLANT_1 +275 0x3000 //RX_TDDRC_ALPHA_UP_0 +276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x199A //RX_TDDRC_HMNC_GAIN +279 0x0001 //RX_TDDRC_SMT_FLAG +280 0x0CCD //RX_TDDRC_SMT_W +281 0x0211 //RX_TDDRC_DRC_GAIN +195 0x0014 //RX_FDEQ_SUBNUM +196 0x4848 //RX_FDEQ_GAIN_0 +197 0x4848 //RX_FDEQ_GAIN_1 +198 0x4848 //RX_FDEQ_GAIN_2 +199 0x4848 //RX_FDEQ_GAIN_3 +200 0x4848 //RX_FDEQ_GAIN_4 +201 0x4848 //RX_FDEQ_GAIN_5 +202 0x4848 //RX_FDEQ_GAIN_6 +203 0x4848 //RX_FDEQ_GAIN_7 +204 0x4848 //RX_FDEQ_GAIN_8 +205 0x4848 //RX_FDEQ_GAIN_9 +206 0x4848 //RX_FDEQ_GAIN_10 +207 0x4848 //RX_FDEQ_GAIN_11 +208 0x4848 //RX_FDEQ_GAIN_12 +209 0x4848 //RX_FDEQ_GAIN_13 +210 0x4848 //RX_FDEQ_GAIN_14 +211 0x4848 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0202 //RX_FDEQ_BIN_0 +221 0x0203 //RX_FDEQ_BIN_1 +222 0x0303 //RX_FDEQ_BIN_2 +223 0x0304 //RX_FDEQ_BIN_3 +224 0x0405 //RX_FDEQ_BIN_4 +225 0x0506 //RX_FDEQ_BIN_5 +226 0x0708 //RX_FDEQ_BIN_6 +227 0x090A //RX_FDEQ_BIN_7 +228 0x0B0C //RX_FDEQ_BIN_8 +229 0x0D08 //RX_FDEQ_BIN_9 +230 0x0000 //RX_FDEQ_BIN_10 +231 0x0000 //RX_FDEQ_BIN_11 +232 0x0000 //RX_FDEQ_BIN_12 +233 0x0000 //RX_FDEQ_BIN_13 +234 0x0000 //RX_FDEQ_BIN_14 +235 0x0000 //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x4000 //RX_FDEQ_RESRV_0 +245 0x0320 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0030 //RX_FDDRC_BAND_MARGIN_1 +248 0x0050 //RX_FDDRC_BAND_MARGIN_2 +249 0x0080 //RX_FDDRC_BAND_MARGIN_3 +250 0x0007 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x5000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x6400 //RX_FDDRC_THRD_3_2 +258 0x6400 //RX_FDDRC_THRD_3_3 +259 0x2000 //RX_FDDRC_SLANT_0_0 +260 0x2000 //RX_FDDRC_SLANT_0_1 +261 0x2000 //RX_FDDRC_SLANT_0_2 +262 0x2000 //RX_FDDRC_SLANT_0_3 +263 0x5333 //RX_FDDRC_SLANT_1_0 +264 0x5333 //RX_FDDRC_SLANT_1_1 +265 0x5333 //RX_FDDRC_SLANT_1_2 +266 0x5333 //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +286 0x0048 //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 +#VOL 5 +163 0x3000 //RX_TDDRC_ALPHA_UP_1 +164 0x3000 //RX_TDDRC_ALPHA_UP_2 +165 0x3000 //RX_TDDRC_ALPHA_UP_3 +166 0x3000 //RX_TDDRC_ALPHA_UP_4 +184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +190 0x7220 //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +269 0x0000 //RX_TDDRC_THRD_0 +270 0x0000 //RX_TDDRC_THRD_1 +271 0x1800 //RX_TDDRC_THRD_2 +272 0x1800 //RX_TDDRC_THRD_3 +273 0x7FFF //RX_TDDRC_SLANT_0 +274 0x7FFF //RX_TDDRC_SLANT_1 +275 0x3000 //RX_TDDRC_ALPHA_UP_0 +276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x199A //RX_TDDRC_HMNC_GAIN +279 0x0001 //RX_TDDRC_SMT_FLAG +280 0x0CCD //RX_TDDRC_SMT_W +281 0x0211 //RX_TDDRC_DRC_GAIN +195 0x0014 //RX_FDEQ_SUBNUM +196 0x4848 //RX_FDEQ_GAIN_0 +197 0x4848 //RX_FDEQ_GAIN_1 +198 0x4848 //RX_FDEQ_GAIN_2 +199 0x4848 //RX_FDEQ_GAIN_3 +200 0x4848 //RX_FDEQ_GAIN_4 +201 0x4848 //RX_FDEQ_GAIN_5 +202 0x4848 //RX_FDEQ_GAIN_6 +203 0x4848 //RX_FDEQ_GAIN_7 +204 0x4848 //RX_FDEQ_GAIN_8 +205 0x4848 //RX_FDEQ_GAIN_9 +206 0x4848 //RX_FDEQ_GAIN_10 +207 0x4848 //RX_FDEQ_GAIN_11 +208 0x4848 //RX_FDEQ_GAIN_12 +209 0x4848 //RX_FDEQ_GAIN_13 +210 0x4848 //RX_FDEQ_GAIN_14 +211 0x4848 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0202 //RX_FDEQ_BIN_0 +221 0x0203 //RX_FDEQ_BIN_1 +222 0x0303 //RX_FDEQ_BIN_2 +223 0x0304 //RX_FDEQ_BIN_3 +224 0x0405 //RX_FDEQ_BIN_4 +225 0x0506 //RX_FDEQ_BIN_5 +226 0x0708 //RX_FDEQ_BIN_6 +227 0x090A //RX_FDEQ_BIN_7 +228 0x0B0C //RX_FDEQ_BIN_8 +229 0x0D08 //RX_FDEQ_BIN_9 +230 0x0000 //RX_FDEQ_BIN_10 +231 0x0000 //RX_FDEQ_BIN_11 +232 0x0000 //RX_FDEQ_BIN_12 +233 0x0000 //RX_FDEQ_BIN_13 +234 0x0000 //RX_FDEQ_BIN_14 +235 0x0000 //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x4000 //RX_FDEQ_RESRV_0 +245 0x0320 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0030 //RX_FDDRC_BAND_MARGIN_1 +248 0x0050 //RX_FDDRC_BAND_MARGIN_2 +249 0x0080 //RX_FDDRC_BAND_MARGIN_3 +250 0x0007 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x5000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x6400 //RX_FDDRC_THRD_3_2 +258 0x6400 //RX_FDDRC_THRD_3_3 +259 0x2000 //RX_FDDRC_SLANT_0_0 +260 0x2000 //RX_FDDRC_SLANT_0_1 +261 0x2000 //RX_FDDRC_SLANT_0_2 +262 0x2000 //RX_FDDRC_SLANT_0_3 +263 0x5333 //RX_FDDRC_SLANT_1_0 +264 0x5333 //RX_FDDRC_SLANT_1_1 +265 0x5333 //RX_FDDRC_SLANT_1_2 +266 0x5333 //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +286 0x007A //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 +#VOL 6 +163 0x3000 //RX_TDDRC_ALPHA_UP_1 +164 0x3000 //RX_TDDRC_ALPHA_UP_2 +165 0x3000 //RX_TDDRC_ALPHA_UP_3 +166 0x3000 //RX_TDDRC_ALPHA_UP_4 +184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +190 0x7220 //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +269 0x0000 //RX_TDDRC_THRD_0 +270 0x0000 //RX_TDDRC_THRD_1 +271 0x1800 //RX_TDDRC_THRD_2 +272 0x1800 //RX_TDDRC_THRD_3 +273 0x7FFF //RX_TDDRC_SLANT_0 +274 0x7FFF //RX_TDDRC_SLANT_1 +275 0x3000 //RX_TDDRC_ALPHA_UP_0 +276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x199A //RX_TDDRC_HMNC_GAIN +279 0x0001 //RX_TDDRC_SMT_FLAG +280 0x0CCD //RX_TDDRC_SMT_W +281 0x0211 //RX_TDDRC_DRC_GAIN +195 0x0014 //RX_FDEQ_SUBNUM +196 0x4848 //RX_FDEQ_GAIN_0 +197 0x4848 //RX_FDEQ_GAIN_1 +198 0x4848 //RX_FDEQ_GAIN_2 +199 0x4848 //RX_FDEQ_GAIN_3 +200 0x4848 //RX_FDEQ_GAIN_4 +201 0x4848 //RX_FDEQ_GAIN_5 +202 0x4848 //RX_FDEQ_GAIN_6 +203 0x4848 //RX_FDEQ_GAIN_7 +204 0x4848 //RX_FDEQ_GAIN_8 +205 0x4848 //RX_FDEQ_GAIN_9 +206 0x4848 //RX_FDEQ_GAIN_10 +207 0x4848 //RX_FDEQ_GAIN_11 +208 0x4848 //RX_FDEQ_GAIN_12 +209 0x4848 //RX_FDEQ_GAIN_13 +210 0x4848 //RX_FDEQ_GAIN_14 +211 0x4848 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0202 //RX_FDEQ_BIN_0 +221 0x0203 //RX_FDEQ_BIN_1 +222 0x0303 //RX_FDEQ_BIN_2 +223 0x0304 //RX_FDEQ_BIN_3 +224 0x0405 //RX_FDEQ_BIN_4 +225 0x0506 //RX_FDEQ_BIN_5 +226 0x0708 //RX_FDEQ_BIN_6 +227 0x090A //RX_FDEQ_BIN_7 +228 0x0B0C //RX_FDEQ_BIN_8 +229 0x0D08 //RX_FDEQ_BIN_9 +230 0x0000 //RX_FDEQ_BIN_10 +231 0x0000 //RX_FDEQ_BIN_11 +232 0x0000 //RX_FDEQ_BIN_12 +233 0x0000 //RX_FDEQ_BIN_13 +234 0x0000 //RX_FDEQ_BIN_14 +235 0x0000 //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x4000 //RX_FDEQ_RESRV_0 +245 0x0320 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0030 //RX_FDDRC_BAND_MARGIN_1 +248 0x0050 //RX_FDDRC_BAND_MARGIN_2 +249 0x0080 //RX_FDDRC_BAND_MARGIN_3 +250 0x0007 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x5000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x6400 //RX_FDDRC_THRD_3_2 +258 0x6400 //RX_FDDRC_THRD_3_3 +259 0x2000 //RX_FDDRC_SLANT_0_0 +260 0x2000 //RX_FDDRC_SLANT_0_1 +261 0x2000 //RX_FDDRC_SLANT_0_2 +262 0x2000 //RX_FDDRC_SLANT_0_3 +263 0x5333 //RX_FDDRC_SLANT_1_0 +264 0x5333 //RX_FDDRC_SLANT_1_1 +265 0x5333 //RX_FDDRC_SLANT_1_2 +266 0x5333 //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +286 0x0100 //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 #CASE_NAME HEADSET-USB_BLACKBIRD-VOICE_GENERIC-WB #PARAM_MODE FULL -#PARAM_TYPE TX+RX -#TOTAL_CUSTOM_STEP 7 +#PARAM_TYPE TX+2RX +#TOTAL_CUSTOM_STEP 7+7 #TX 0 0x0009 //TX_OPERATION_MODE_0 1 0x0009 //TX_OPERATION_MODE_1 @@ -2004,7 +2920,7 @@ 239 0x0800 //TX_DT_RESRV_7 240 0x0800 //TX_DT_RESRV_8 241 0x0000 //TX_DT_RESRV_9 -242 0xF400 //TX_THR_SN_EST_0 +242 0xFA00 //TX_THR_SN_EST_0 243 0xFA00 //TX_THR_SN_EST_1 244 0xF700 //TX_THR_SN_EST_2 245 0xFC00 //TX_THR_SN_EST_3 @@ -2013,20 +2929,20 @@ 248 0xF400 //TX_THR_SN_EST_6 249 0xF600 //TX_THR_SN_EST_7 250 0x0000 //TX_DELTA_THR_SN_EST_0 -251 0x0100 //TX_DELTA_THR_SN_EST_1 +251 0x0200 //TX_DELTA_THR_SN_EST_1 252 0x0200 //TX_DELTA_THR_SN_EST_2 -253 0x0200 //TX_DELTA_THR_SN_EST_3 -254 0x0100 //TX_DELTA_THR_SN_EST_4 +253 0x0100 //TX_DELTA_THR_SN_EST_3 +254 0x0200 //TX_DELTA_THR_SN_EST_4 255 0x0200 //TX_DELTA_THR_SN_EST_5 -256 0x0200 //TX_DELTA_THR_SN_EST_6 +256 0x0100 //TX_DELTA_THR_SN_EST_6 257 0x0200 //TX_DELTA_THR_SN_EST_7 258 0x6000 //TX_LAMBDA_NN_EST_0 -259 0x6000 //TX_LAMBDA_NN_EST_1 +259 0x4000 //TX_LAMBDA_NN_EST_1 260 0x4000 //TX_LAMBDA_NN_EST_2 261 0x4000 //TX_LAMBDA_NN_EST_3 262 0x4000 //TX_LAMBDA_NN_EST_4 263 0x4000 //TX_LAMBDA_NN_EST_5 -264 0x4000 //TX_LAMBDA_NN_EST_6 +264 0x6000 //TX_LAMBDA_NN_EST_6 265 0x4000 //TX_LAMBDA_NN_EST_7 266 0x0400 //TX_N_SN_EST 267 0x001E //TX_INBEAM_T @@ -2044,18 +2960,18 @@ 279 0x1000 //TX_B_POST_FLT_0 280 0x1000 //TX_B_POST_FLT_1 281 0x000F //TX_NS_LVL_CTRL_0 -282 0x0018 //TX_NS_LVL_CTRL_1 -283 0x0014 //TX_NS_LVL_CTRL_2 -284 0x001C //TX_NS_LVL_CTRL_3 -285 0x0012 //TX_NS_LVL_CTRL_4 +282 0x0014 //TX_NS_LVL_CTRL_1 +283 0x001C //TX_NS_LVL_CTRL_2 +284 0x0012 //TX_NS_LVL_CTRL_3 +285 0x000F //TX_NS_LVL_CTRL_4 286 0x000F //TX_NS_LVL_CTRL_5 -287 0x000F //TX_NS_LVL_CTRL_6 +287 0x0018 //TX_NS_LVL_CTRL_6 288 0x0011 //TX_NS_LVL_CTRL_7 289 0x000C //TX_MIN_GAIN_S_0 -290 0x000C //TX_MIN_GAIN_S_1 -291 0x000F //TX_MIN_GAIN_S_2 -292 0x000C //TX_MIN_GAIN_S_3 -293 0x0009 //TX_MIN_GAIN_S_4 +290 0x000F //TX_MIN_GAIN_S_1 +291 0x000C //TX_MIN_GAIN_S_2 +292 0x0009 //TX_MIN_GAIN_S_3 +293 0x000C //TX_MIN_GAIN_S_4 294 0x000C //TX_MIN_GAIN_S_5 295 0x000C //TX_MIN_GAIN_S_6 296 0x000F //TX_MIN_GAIN_S_7 @@ -2063,10 +2979,10 @@ 298 0x0000 //TX_NS_MAX_PRI_SNR_TH 299 0x0000 //TX_NMOS_SUP_MENSA 300 0x7FFF //TX_SNRI_SUP_0 -301 0x7FFF //TX_SNRI_SUP_1 -302 0x6000 //TX_SNRI_SUP_2 -303 0x2000 //TX_SNRI_SUP_3 -304 0x6000 //TX_SNRI_SUP_4 +301 0x6000 //TX_SNRI_SUP_1 +302 0x2000 //TX_SNRI_SUP_2 +303 0x6000 //TX_SNRI_SUP_3 +304 0x7FFF //TX_SNRI_SUP_4 305 0x7FFF //TX_SNRI_SUP_5 306 0x7FFF //TX_SNRI_SUP_6 307 0x7FFF //TX_SNRI_SUP_7 @@ -2077,17 +2993,17 @@ 312 0x7FFF //TX_A_POST_FILT_0 313 0x2000 //TX_A_POST_FILT_1 314 0x4000 //TX_A_POST_FILT_S_0 -315 0x4000 //TX_A_POST_FILT_S_1 +315 0x5000 //TX_A_POST_FILT_S_1 316 0x5000 //TX_A_POST_FILT_S_2 317 0x5000 //TX_A_POST_FILT_S_3 318 0x5000 //TX_A_POST_FILT_S_4 319 0x5000 //TX_A_POST_FILT_S_5 -320 0x5000 //TX_A_POST_FILT_S_6 +320 0x4000 //TX_A_POST_FILT_S_6 321 0x5000 //TX_A_POST_FILT_S_7 322 0x1000 //TX_B_POST_FILT_0 323 0x1000 //TX_B_POST_FILT_1 -324 0x1000 //TX_B_POST_FILT_2 -325 0x3000 //TX_B_POST_FILT_3 +324 0x3000 //TX_B_POST_FILT_2 +325 0x1000 //TX_B_POST_FILT_3 326 0x1000 //TX_B_POST_FILT_4 327 0x1000 //TX_B_POST_FILT_5 328 0x1000 //TX_B_POST_FILT_6 @@ -2102,12 +3018,12 @@ 337 0x7FFF //TX_B_LESSCUT_RTO_S_7 338 0x7CCD //TX_LAMBDA_PFILT 339 0x7B00 //TX_LAMBDA_PFILT_S_0 -340 0x7F00 //TX_LAMBDA_PFILT_S_1 +340 0x7B00 //TX_LAMBDA_PFILT_S_1 341 0x7B00 //TX_LAMBDA_PFILT_S_2 342 0x7B00 //TX_LAMBDA_PFILT_S_3 343 0x7B00 //TX_LAMBDA_PFILT_S_4 344 0x7B00 //TX_LAMBDA_PFILT_S_5 -345 0x7B00 //TX_LAMBDA_PFILT_S_6 +345 0x7F00 //TX_LAMBDA_PFILT_S_6 346 0x7B00 //TX_LAMBDA_PFILT_S_7 347 0x0200 //TX_K_PEPPER 348 0x0400 //TX_A_PEPPER @@ -2129,7 +3045,7 @@ 364 0x0000 //TX_K_APT 365 0x0001 //TX_NOISEDET 366 0x0190 //TX_NDETCT -367 0x0065 //TX_NOISE_TH_0 +367 0x0102 //TX_NOISE_TH_0 368 0x7FFF //TX_NOISE_TH_0_2 369 0x7FFF //TX_NOISE_TH_0_3 370 0x0900 //TX_NOISE_TH_1 @@ -2141,11 +3057,11 @@ 376 0x7FFF //TX_NOISE_TH_5_3 377 0x7FFF //TX_NOISE_TH_5_4 378 0x00FB //TX_NOISE_TH_6 -379 0x0029 //TX_MINENOISE_TH -380 0x4000 //TX_MINENOISE_MIC0_TH_MTS -381 0xFFEE //TX_MINENOISE_MIC0_TH_EXP -382 0x6000 //TX_MINENOISE_MIC0_S_TH_MTS -383 0xFFF3 //TX_MINENOISE_MIC0_S_TH_EXP +379 0x00F8 //TX_MINENOISE_TH +380 0xD508 //TX_MORENS_TFMASK_TH +381 0x0001 //TX_DRC_QUIET_FLOOR +382 0x3A98 //TX_RATIODTL_CUT_TH +383 0x0DAC //TX_DT_CUT_K1 384 0x0666 //TX_OUT_ENER_S_TH_CLEAN 385 0x0666 //TX_OUT_ENER_S_TH_LESSCLEAN 386 0x0333 //TX_OUT_ENER_S_TH_NOISY @@ -2153,22 +3069,22 @@ 388 0x0333 //TX_OUT_ENER_TH_SPEECH 389 0x2000 //TX_SN_NPB_GAIN 390 0x0000 //TX_NN_NPB_GAIN -391 0x0000 //TX_CSX_ALPHA_0 -392 0x0000 //TX_CSX_ALPHA_1 -393 0x0000 //TX_CSX_ALPHA_2 -394 0x0000 //TX_CSX_ALPHA_3 -395 0x0800 //TX_MU_ARSP_EST -396 0x00C8 //TX_P_OUTBEAM_MIN_TH +391 0x7FFF //TX_POST_MASK_SUP_HSNE +392 0x1388 //TX_TAIL_DET_TH +393 0x4000 //TX_B_LESSCUT_RTO_WTA +394 0x0000 //TX_MEL_G_R +395 0x0080 //TX_SUPHIGH_TH +396 0x0000 //TX_MASK_G_R 397 0x0002 //TX_EXTRA_NS_L -398 0x0800 //TX_EXTRA_NS_A -399 0x0005 //TX_VR_NOISE_FLOOR_TH +398 0x1800 //TX_C_POST_FLT_MASK +399 0x7FFF //TX_A_POST_FLT_WNS 400 0x0148 //TX_MIN_G_LOW300HZ 401 0x0002 //TX_MAXLEVEL_CNG 402 0x00B4 //TX_STN_NOISE_TH 403 0x4000 //TX_POST_MASK_SUP 404 0x7FFF //TX_POST_MASK_ADJUST 405 0x00C8 //TX_NS_ENOISE_MIC0_TH -406 0x0029 //TX_MINENOISE_MIC0_TH +406 0x00DC //TX_MINENOISE_MIC0_TH 407 0x012C //TX_MINENOISE_MIC0_S_TH 408 0x7FFF //TX_MIN_G_CTRL_SSNS 409 0x0800 //TX_METAL_RTO_THR @@ -2276,16 +3192,16 @@ 511 0x6666 //TX_MIC_TO_BFGAIN 512 0x0000 //TX_MICTOBFGAIN0 513 0x0000 //TX_FASTMUE_TH -514 0x0000 //TX_DERVB_LEN_0 -515 0x0000 //TX_DERVB_LEN_1 -516 0x0000 //TX_RHO_DERVB -517 0x0000 //TX_MIC_INDX_DERVB -518 0x0000 //TX_MU_DERVB -519 0x0000 //TX_DR_RESRV_0 -520 0x0000 //TX_DR_RESRV_1 -521 0x0000 //TX_DR_RESRV_2 -522 0x0000 //TX_DR_RESRV_3 -523 0x0000 //TX_DR_RESRV_4 +514 0xC000 //TX_DEREVERB_LF_MU +515 0xC000 //TX_DEREVERB_HF_MU +516 0xCCCC //TX_DEREVERB_DELAY +517 0xD999 //TX_DEREVERB_COEF_LEN +518 0x1F40 //TX_DEREVERB_DNR +519 0x0000 //TX_DEREVERB_ALPHA +520 0x0000 //TX_DEREVERB_BETA +521 0x0000 //TX_GSC_RTOL_TH +522 0x7000 //TX_GSC_RTOH_TH +523 0x0064 //TX_WIDE2_MEANHTH 524 0x0000 //TX_DR_RESRV_5 525 0x0000 //TX_DR_RESRV_6 526 0x0000 //TX_DR_RESRV_7 @@ -2659,8 +3575,73 @@ 894 0xC000 //TX_FASTNS_SSA_THHFL 895 0xCCCC //TX_FASTNS_SSA_THLFH 896 0xD999 //TX_FASTNS_SSA_THHFH +897 0x2339 //TX_SENDFUNC_REG_MICMUTE +898 0x0021 //TX_SENDFUNC_REG_MICMUTE1 +899 0x02BC //TX_MICMUTE_RATIO_THR +900 0x0140 //TX_MICMUTE_AMP_THR +901 0x0004 //TX_MICMUTE_HPF_IND +902 0x00C0 //TX_MICMUTE_LOG_EYR_TH +903 0x0008 //TX_MICMUTE_CVG_TIME +904 0x0008 //TX_MICMUTE_RELEASE_TIME +905 0x01FE //TX_MIC_VOLUME_MIC0MUTE +906 0x0020 //TX_MICMUTE_EPD_OFFSET_0 +907 0x001E //TX_MICMUTE_FRQ_AEC_L +908 0x7999 //TX_MICMUTE_EAD_THR +909 0x7FFF //TX_MICMUTE_LAMBDA_CB_NLE +910 0x7FFF //TX_MICMUTE_LAMBDA_RE_EST +911 0x4000 //TX_DTD_THR1_MICMUTE_0 +912 0x7000 //TX_DTD_THR1_MICMUTE_1 +913 0x7FFF //TX_DTD_THR1_MICMUTE_2 +914 0x7FFF //TX_DTD_THR1_MICMUTE_3 +915 0x6CCC //TX_DTD_THR2_MICMUTE_0 +916 0x0400 //TX_MICMUTE_MIN_EQ_RE_EST_0 +917 0x0400 //TX_MICMUTE_MIN_EQ_RE_EST_1 +918 0x1000 //TX_MICMUTE_MIN_EQ_RE_EST_2 +919 0x7FFF //TX_MICMUTE_MIN_EQ_RE_EST_3 +920 0x7FFF //TX_MICMUTE_MIN_EQ_RE_EST_4 +921 0x4000 //TX_MICMUTE_C_POST_FLT +922 0x03E8 //TX_MICMUTE_DT_CUT_K +923 0x0001 //TX_MICMUTE_DT_CUT_THR +924 0x03E8 //TX_MICMUTE_DT_CUT_K2 +925 0x0001 //TX_MICMUTE_DT_CUT_THR2 +926 0x0064 //TX_MICMUTE_DT2_HOLD_N +927 0x1000 //TX_MICMUTE_RATIODTH_THCUT +928 0x1000 //TX_MICMUTE_B_POST_FLT_ECHOL +929 0x7FFF //TX_MICMUTE_B_POST_FLT_ECHOH +930 0x0400 //TX_MICMUTE_C_POST_FLT_MASK +931 0x7999 //TX_MICMUTE_RATIODTL_CUT_TH +932 0x0258 //TX_MICMUTE_DT_CUT_K1 +933 0x0800 //TX_MICMUTE_N2_SN_EST +934 0xFC00 //TX_MICMUTE_THR_SN_EST_0 +935 0x001C //TX_MICMUTE_MIN_G_CTRL_0 +936 0x6000 //TX_MICMUTE_A_POST_FILT_S_0 +937 0x7000 //TX_MICMUTE_B_POST_FILT_0 +938 0x2710 //TX_MIC1RUB_AMP_THR +939 0x0010 //TX_MIC1MUTE_RATIO_THR +940 0x0450 //TX_MIC1MUTE_AMP_THR +941 0x0008 //TX_MIC1MUTE_CVG_TIME +942 0x0008 //TX_MIC1MUTE_RELEASE_TIME +943 0x0000 //TX_AMS_RESRV_01 +944 0x0000 //TX_AMS_RESRV_02 +945 0x0000 //TX_AMS_RESRV_03 +946 0x0000 //TX_AMS_RESRV_04 +947 0x0000 //TX_AMS_RESRV_05 +948 0x0000 //TX_AMS_RESRV_06 +949 0x0000 //TX_AMS_RESRV_07 +950 0x0000 //TX_AMS_RESRV_08 +951 0x0000 //TX_AMS_RESRV_09 +952 0x0000 //TX_AMS_RESRV_10 +953 0x0000 //TX_AMS_RESRV_11 +954 0x0000 //TX_AMS_RESRV_12 +955 0x0000 //TX_AMS_RESRV_13 +956 0x0000 //TX_AMS_RESRV_14 +957 0x0000 //TX_AMS_RESRV_15 +958 0x0000 //TX_AMS_RESRV_16 +959 0x0000 //TX_AMS_RESRV_17 +960 0x0000 //TX_AMS_RESRV_18 +961 0x0000 //TX_AMS_RESRV_19 #RX -0 0x042C //RX_RECVFUNC_MODE_0 +0 0x242C //RX_RECVFUNC_MODE_0 1 0x0000 //RX_RECVFUNC_MODE_1 2 0x0001 //RX_SAMPLINGFREQ_SIG 3 0x0001 //RX_SAMPLINGFREQ_PROC @@ -3510,11 +4491,862 @@ 110 0x0000 //RX_FDDRC_RESRV_0 129 0x0100 //RX_SPK_VOL 130 0x0000 //RX_VOL_RESRV_0 +#RX 2 +157 0x242C //RX_RECVFUNC_MODE_0 +158 0x0000 //RX_RECVFUNC_MODE_1 +159 0x0001 //RX_SAMPLINGFREQ_SIG +160 0x0001 //RX_SAMPLINGFREQ_PROC +161 0x000A //RX_FRAME_SZ +162 0x0000 //RX_DELAY_OPT +163 0x1000 //RX_TDDRC_ALPHA_UP_1 +164 0x1000 //RX_TDDRC_ALPHA_UP_2 +165 0x1000 //RX_TDDRC_ALPHA_UP_3 +166 0x1000 //RX_TDDRC_ALPHA_UP_4 +167 0x0800 //RX_PGA +168 0x7FFF //RX_A_HP +169 0x4000 //RX_B_PE +170 0x3800 //RX_THR_PITCH_DET_0 +171 0x3000 //RX_THR_PITCH_DET_1 +172 0x2800 //RX_THR_PITCH_DET_2 +173 0x0008 //RX_PITCH_BFR_LEN +174 0x0003 //RX_SBD_PITCH_DET +175 0x0100 //RX_PP_RESRV_0 +176 0x0020 //RX_PP_RESRV_1 +177 0x0600 //RX_N_SN_EST +178 0x000C //RX_N2_SN_EST +179 0x0010 //RX_NS_LVL_CTRL +180 0xF800 //RX_THR_SN_EST +181 0x7CCD //RX_LAMBDA_PFILT +182 0x000A //RX_FENS_RESRV_0 +183 0x0190 //RX_FENS_RESRV_1 +184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +187 0x0002 //RX_EXTRA_NS_L +188 0x0800 //RX_EXTRA_NS_A +189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +190 0x7FFF //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +192 0x199A //RX_A_POST_FLT +193 0x0000 //RX_LMT_THRD +194 0x4000 //RX_LMT_ALPHA +195 0x001C //RX_FDEQ_SUBNUM +196 0x4848 //RX_FDEQ_GAIN_0 +197 0x4848 //RX_FDEQ_GAIN_1 +198 0x4848 //RX_FDEQ_GAIN_2 +199 0x4848 //RX_FDEQ_GAIN_3 +200 0x4848 //RX_FDEQ_GAIN_4 +201 0x4848 //RX_FDEQ_GAIN_5 +202 0x484B //RX_FDEQ_GAIN_6 +203 0x4B48 //RX_FDEQ_GAIN_7 +204 0x4848 //RX_FDEQ_GAIN_8 +205 0x4848 //RX_FDEQ_GAIN_9 +206 0x4846 //RX_FDEQ_GAIN_10 +207 0x403F //RX_FDEQ_GAIN_11 +208 0x3F40 //RX_FDEQ_GAIN_12 +209 0x4248 //RX_FDEQ_GAIN_13 +210 0x4848 //RX_FDEQ_GAIN_14 +211 0x4848 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0202 //RX_FDEQ_BIN_0 +221 0x0203 //RX_FDEQ_BIN_1 +222 0x0303 //RX_FDEQ_BIN_2 +223 0x0304 //RX_FDEQ_BIN_3 +224 0x0405 //RX_FDEQ_BIN_4 +225 0x0506 //RX_FDEQ_BIN_5 +226 0x0708 //RX_FDEQ_BIN_6 +227 0x090A //RX_FDEQ_BIN_7 +228 0x0B0C //RX_FDEQ_BIN_8 +229 0x0D0E //RX_FDEQ_BIN_9 +230 0x0E0F //RX_FDEQ_BIN_10 +231 0x0F10 //RX_FDEQ_BIN_11 +232 0x1011 //RX_FDEQ_BIN_12 +233 0x1104 //RX_FDEQ_BIN_13 +234 0x0000 //RX_FDEQ_BIN_14 +235 0x0000 //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x4000 //RX_FDEQ_RESRV_0 +245 0x0320 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0030 //RX_FDDRC_BAND_MARGIN_1 +248 0x0050 //RX_FDDRC_BAND_MARGIN_2 +249 0x0080 //RX_FDDRC_BAND_MARGIN_3 +250 0x0007 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x5000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x6400 //RX_FDDRC_THRD_3_2 +258 0x6400 //RX_FDDRC_THRD_3_3 +259 0x2000 //RX_FDDRC_SLANT_0_0 +260 0x2000 //RX_FDDRC_SLANT_0_1 +261 0x2000 //RX_FDDRC_SLANT_0_2 +262 0x2000 //RX_FDDRC_SLANT_0_3 +263 0x5333 //RX_FDDRC_SLANT_1_0 +264 0x5333 //RX_FDDRC_SLANT_1_1 +265 0x5333 //RX_FDDRC_SLANT_1_2 +266 0x5333 //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +268 0x0002 //RX_FILTINDX +269 0x0000 //RX_TDDRC_THRD_0 +270 0x0000 //RX_TDDRC_THRD_1 +271 0x1C00 //RX_TDDRC_THRD_2 +272 0x1D00 //RX_TDDRC_THRD_3 +273 0x3000 //RX_TDDRC_SLANT_0 +274 0x7FFF //RX_TDDRC_SLANT_1 +275 0x1000 //RX_TDDRC_ALPHA_UP_0 +276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x199A //RX_TDDRC_HMNC_GAIN +279 0x0001 //RX_TDDRC_SMT_FLAG +280 0x0CCD //RX_TDDRC_SMT_W +281 0x01AE //RX_TDDRC_DRC_GAIN +282 0x7C00 //RX_LAMBDA_PKA_FP +283 0x280A //RX_TPKA_FP +284 0x032D //RX_MIN_G_FP +285 0x0A00 //RX_MAX_G_FP +286 0x000B //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 +288 0x0000 //RX_MAXLEVEL_CNG +289 0x3000 //RX_BWE_UV_TH +290 0x3000 //RX_BWE_UV_TH2 +291 0x1800 //RX_BWE_UV_TH3 +292 0x1000 //RX_BWE_V_TH +293 0x04CD //RX_BWE_GAIN1_V_TH1 +294 0x0F33 //RX_BWE_GAIN1_V_TH2 +295 0x7333 //RX_BWE_UV_EQ +296 0x199A //RX_BWE_V_EQ +297 0x7333 //RX_BWE_TONE_TH +298 0x0004 //RX_BWE_UV_HOLD_T +299 0x6CCD //RX_BWE_GAIN2_ALPHA +300 0x799A //RX_BWE_GAIN3_ALPHA +301 0x001E //RX_BWE_CUTOFF +302 0x3000 //RX_BWE_GAINFILL +303 0x3200 //RX_BWE_MAXTH_TONE +304 0x2000 //RX_BWE_EQ_0 +305 0x2000 //RX_BWE_EQ_1 +306 0x2000 //RX_BWE_EQ_2 +307 0x2000 //RX_BWE_EQ_3 +308 0x2000 //RX_BWE_EQ_4 +309 0x2000 //RX_BWE_EQ_5 +310 0x2000 //RX_BWE_EQ_6 +311 0x0000 //RX_BWE_RESRV_0 +312 0x0000 //RX_BWE_RESRV_1 +313 0x0000 //RX_BWE_RESRV_2 +#VOL 0 +163 0x1000 //RX_TDDRC_ALPHA_UP_1 +164 0x1000 //RX_TDDRC_ALPHA_UP_2 +165 0x1000 //RX_TDDRC_ALPHA_UP_3 +166 0x1000 //RX_TDDRC_ALPHA_UP_4 +184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +190 0x7220 //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +269 0x0000 //RX_TDDRC_THRD_0 +270 0x0000 //RX_TDDRC_THRD_1 +271 0x1800 //RX_TDDRC_THRD_2 +272 0x1800 //RX_TDDRC_THRD_3 +273 0x7FFF //RX_TDDRC_SLANT_0 +274 0x7FFF //RX_TDDRC_SLANT_1 +275 0x1000 //RX_TDDRC_ALPHA_UP_0 +276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x199A //RX_TDDRC_HMNC_GAIN +279 0x0001 //RX_TDDRC_SMT_FLAG +280 0x0CCD //RX_TDDRC_SMT_W +281 0x01A0 //RX_TDDRC_DRC_GAIN +195 0x001C //RX_FDEQ_SUBNUM +196 0x4848 //RX_FDEQ_GAIN_0 +197 0x4848 //RX_FDEQ_GAIN_1 +198 0x4848 //RX_FDEQ_GAIN_2 +199 0x4848 //RX_FDEQ_GAIN_3 +200 0x4848 //RX_FDEQ_GAIN_4 +201 0x4848 //RX_FDEQ_GAIN_5 +202 0x484B //RX_FDEQ_GAIN_6 +203 0x4B48 //RX_FDEQ_GAIN_7 +204 0x4848 //RX_FDEQ_GAIN_8 +205 0x4848 //RX_FDEQ_GAIN_9 +206 0x4846 //RX_FDEQ_GAIN_10 +207 0x403F //RX_FDEQ_GAIN_11 +208 0x3F40 //RX_FDEQ_GAIN_12 +209 0x4248 //RX_FDEQ_GAIN_13 +210 0x4848 //RX_FDEQ_GAIN_14 +211 0x4848 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0202 //RX_FDEQ_BIN_0 +221 0x0203 //RX_FDEQ_BIN_1 +222 0x0303 //RX_FDEQ_BIN_2 +223 0x0304 //RX_FDEQ_BIN_3 +224 0x0405 //RX_FDEQ_BIN_4 +225 0x0506 //RX_FDEQ_BIN_5 +226 0x0708 //RX_FDEQ_BIN_6 +227 0x090A //RX_FDEQ_BIN_7 +228 0x0B0C //RX_FDEQ_BIN_8 +229 0x0D0E //RX_FDEQ_BIN_9 +230 0x0E0F //RX_FDEQ_BIN_10 +231 0x0F10 //RX_FDEQ_BIN_11 +232 0x1011 //RX_FDEQ_BIN_12 +233 0x1104 //RX_FDEQ_BIN_13 +234 0x0000 //RX_FDEQ_BIN_14 +235 0x0000 //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x4000 //RX_FDEQ_RESRV_0 +245 0x0320 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0030 //RX_FDDRC_BAND_MARGIN_1 +248 0x0050 //RX_FDDRC_BAND_MARGIN_2 +249 0x0080 //RX_FDDRC_BAND_MARGIN_3 +250 0x0007 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x5000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x6400 //RX_FDDRC_THRD_3_2 +258 0x6400 //RX_FDDRC_THRD_3_3 +259 0x2000 //RX_FDDRC_SLANT_0_0 +260 0x2000 //RX_FDDRC_SLANT_0_1 +261 0x2000 //RX_FDDRC_SLANT_0_2 +262 0x2000 //RX_FDDRC_SLANT_0_3 +263 0x5333 //RX_FDDRC_SLANT_1_0 +264 0x5333 //RX_FDDRC_SLANT_1_1 +265 0x5333 //RX_FDDRC_SLANT_1_2 +266 0x5333 //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +286 0x000A //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 +#VOL 1 +163 0x1000 //RX_TDDRC_ALPHA_UP_1 +164 0x1000 //RX_TDDRC_ALPHA_UP_2 +165 0x1000 //RX_TDDRC_ALPHA_UP_3 +166 0x1000 //RX_TDDRC_ALPHA_UP_4 +184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +190 0x7220 //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +269 0x0000 //RX_TDDRC_THRD_0 +270 0x0000 //RX_TDDRC_THRD_1 +271 0x1800 //RX_TDDRC_THRD_2 +272 0x1800 //RX_TDDRC_THRD_3 +273 0x7FFF //RX_TDDRC_SLANT_0 +274 0x7FFF //RX_TDDRC_SLANT_1 +275 0x1000 //RX_TDDRC_ALPHA_UP_0 +276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x199A //RX_TDDRC_HMNC_GAIN +279 0x0001 //RX_TDDRC_SMT_FLAG +280 0x0CCD //RX_TDDRC_SMT_W +281 0x01A0 //RX_TDDRC_DRC_GAIN +195 0x001C //RX_FDEQ_SUBNUM +196 0x4848 //RX_FDEQ_GAIN_0 +197 0x4848 //RX_FDEQ_GAIN_1 +198 0x4848 //RX_FDEQ_GAIN_2 +199 0x4848 //RX_FDEQ_GAIN_3 +200 0x4848 //RX_FDEQ_GAIN_4 +201 0x4848 //RX_FDEQ_GAIN_5 +202 0x484B //RX_FDEQ_GAIN_6 +203 0x4B48 //RX_FDEQ_GAIN_7 +204 0x4848 //RX_FDEQ_GAIN_8 +205 0x4848 //RX_FDEQ_GAIN_9 +206 0x4846 //RX_FDEQ_GAIN_10 +207 0x403F //RX_FDEQ_GAIN_11 +208 0x3F40 //RX_FDEQ_GAIN_12 +209 0x4248 //RX_FDEQ_GAIN_13 +210 0x4848 //RX_FDEQ_GAIN_14 +211 0x4848 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0202 //RX_FDEQ_BIN_0 +221 0x0203 //RX_FDEQ_BIN_1 +222 0x0303 //RX_FDEQ_BIN_2 +223 0x0304 //RX_FDEQ_BIN_3 +224 0x0405 //RX_FDEQ_BIN_4 +225 0x0506 //RX_FDEQ_BIN_5 +226 0x0708 //RX_FDEQ_BIN_6 +227 0x090A //RX_FDEQ_BIN_7 +228 0x0B0C //RX_FDEQ_BIN_8 +229 0x0D0E //RX_FDEQ_BIN_9 +230 0x0E0F //RX_FDEQ_BIN_10 +231 0x0F10 //RX_FDEQ_BIN_11 +232 0x1011 //RX_FDEQ_BIN_12 +233 0x1104 //RX_FDEQ_BIN_13 +234 0x0000 //RX_FDEQ_BIN_14 +235 0x0000 //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x4000 //RX_FDEQ_RESRV_0 +245 0x0320 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0030 //RX_FDDRC_BAND_MARGIN_1 +248 0x0050 //RX_FDDRC_BAND_MARGIN_2 +249 0x0080 //RX_FDDRC_BAND_MARGIN_3 +250 0x0007 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x5000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x6400 //RX_FDDRC_THRD_3_2 +258 0x6400 //RX_FDDRC_THRD_3_3 +259 0x2000 //RX_FDDRC_SLANT_0_0 +260 0x2000 //RX_FDDRC_SLANT_0_1 +261 0x2000 //RX_FDDRC_SLANT_0_2 +262 0x2000 //RX_FDDRC_SLANT_0_3 +263 0x5333 //RX_FDDRC_SLANT_1_0 +264 0x5333 //RX_FDDRC_SLANT_1_1 +265 0x5333 //RX_FDDRC_SLANT_1_2 +266 0x5333 //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +286 0x0011 //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 +#VOL 2 +163 0x1000 //RX_TDDRC_ALPHA_UP_1 +164 0x1000 //RX_TDDRC_ALPHA_UP_2 +165 0x1000 //RX_TDDRC_ALPHA_UP_3 +166 0x1000 //RX_TDDRC_ALPHA_UP_4 +184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +190 0x7220 //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +269 0x0000 //RX_TDDRC_THRD_0 +270 0x0000 //RX_TDDRC_THRD_1 +271 0x1800 //RX_TDDRC_THRD_2 +272 0x1800 //RX_TDDRC_THRD_3 +273 0x7FFF //RX_TDDRC_SLANT_0 +274 0x7FFF //RX_TDDRC_SLANT_1 +275 0x1000 //RX_TDDRC_ALPHA_UP_0 +276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x199A //RX_TDDRC_HMNC_GAIN +279 0x0001 //RX_TDDRC_SMT_FLAG +280 0x0CCD //RX_TDDRC_SMT_W +281 0x01A0 //RX_TDDRC_DRC_GAIN +195 0x001C //RX_FDEQ_SUBNUM +196 0x4848 //RX_FDEQ_GAIN_0 +197 0x4848 //RX_FDEQ_GAIN_1 +198 0x4848 //RX_FDEQ_GAIN_2 +199 0x4848 //RX_FDEQ_GAIN_3 +200 0x4848 //RX_FDEQ_GAIN_4 +201 0x4848 //RX_FDEQ_GAIN_5 +202 0x484B //RX_FDEQ_GAIN_6 +203 0x4B48 //RX_FDEQ_GAIN_7 +204 0x4848 //RX_FDEQ_GAIN_8 +205 0x4848 //RX_FDEQ_GAIN_9 +206 0x4846 //RX_FDEQ_GAIN_10 +207 0x403F //RX_FDEQ_GAIN_11 +208 0x3F40 //RX_FDEQ_GAIN_12 +209 0x4248 //RX_FDEQ_GAIN_13 +210 0x4848 //RX_FDEQ_GAIN_14 +211 0x4848 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0202 //RX_FDEQ_BIN_0 +221 0x0203 //RX_FDEQ_BIN_1 +222 0x0303 //RX_FDEQ_BIN_2 +223 0x0304 //RX_FDEQ_BIN_3 +224 0x0405 //RX_FDEQ_BIN_4 +225 0x0506 //RX_FDEQ_BIN_5 +226 0x0708 //RX_FDEQ_BIN_6 +227 0x090A //RX_FDEQ_BIN_7 +228 0x0B0C //RX_FDEQ_BIN_8 +229 0x0D0E //RX_FDEQ_BIN_9 +230 0x0E0F //RX_FDEQ_BIN_10 +231 0x0F10 //RX_FDEQ_BIN_11 +232 0x1011 //RX_FDEQ_BIN_12 +233 0x1104 //RX_FDEQ_BIN_13 +234 0x0000 //RX_FDEQ_BIN_14 +235 0x0000 //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x4000 //RX_FDEQ_RESRV_0 +245 0x0320 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0030 //RX_FDDRC_BAND_MARGIN_1 +248 0x0050 //RX_FDDRC_BAND_MARGIN_2 +249 0x0080 //RX_FDDRC_BAND_MARGIN_3 +250 0x0007 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x5000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x6400 //RX_FDDRC_THRD_3_2 +258 0x6400 //RX_FDDRC_THRD_3_3 +259 0x2000 //RX_FDDRC_SLANT_0_0 +260 0x2000 //RX_FDDRC_SLANT_0_1 +261 0x2000 //RX_FDDRC_SLANT_0_2 +262 0x2000 //RX_FDDRC_SLANT_0_3 +263 0x5333 //RX_FDDRC_SLANT_1_0 +264 0x5333 //RX_FDDRC_SLANT_1_1 +265 0x5333 //RX_FDDRC_SLANT_1_2 +266 0x5333 //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +286 0x001D //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 +#VOL 3 +163 0x1000 //RX_TDDRC_ALPHA_UP_1 +164 0x1000 //RX_TDDRC_ALPHA_UP_2 +165 0x1000 //RX_TDDRC_ALPHA_UP_3 +166 0x1000 //RX_TDDRC_ALPHA_UP_4 +184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +190 0x7220 //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +269 0x0000 //RX_TDDRC_THRD_0 +270 0x0000 //RX_TDDRC_THRD_1 +271 0x1800 //RX_TDDRC_THRD_2 +272 0x1800 //RX_TDDRC_THRD_3 +273 0x7FFF //RX_TDDRC_SLANT_0 +274 0x7FFF //RX_TDDRC_SLANT_1 +275 0x1000 //RX_TDDRC_ALPHA_UP_0 +276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x199A //RX_TDDRC_HMNC_GAIN +279 0x0001 //RX_TDDRC_SMT_FLAG +280 0x0CCD //RX_TDDRC_SMT_W +281 0x01A0 //RX_TDDRC_DRC_GAIN +195 0x001C //RX_FDEQ_SUBNUM +196 0x4848 //RX_FDEQ_GAIN_0 +197 0x4848 //RX_FDEQ_GAIN_1 +198 0x4848 //RX_FDEQ_GAIN_2 +199 0x4848 //RX_FDEQ_GAIN_3 +200 0x4848 //RX_FDEQ_GAIN_4 +201 0x4848 //RX_FDEQ_GAIN_5 +202 0x484B //RX_FDEQ_GAIN_6 +203 0x4B48 //RX_FDEQ_GAIN_7 +204 0x4848 //RX_FDEQ_GAIN_8 +205 0x4848 //RX_FDEQ_GAIN_9 +206 0x4846 //RX_FDEQ_GAIN_10 +207 0x403F //RX_FDEQ_GAIN_11 +208 0x3F40 //RX_FDEQ_GAIN_12 +209 0x4248 //RX_FDEQ_GAIN_13 +210 0x4848 //RX_FDEQ_GAIN_14 +211 0x4848 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0202 //RX_FDEQ_BIN_0 +221 0x0203 //RX_FDEQ_BIN_1 +222 0x0303 //RX_FDEQ_BIN_2 +223 0x0304 //RX_FDEQ_BIN_3 +224 0x0405 //RX_FDEQ_BIN_4 +225 0x0506 //RX_FDEQ_BIN_5 +226 0x0708 //RX_FDEQ_BIN_6 +227 0x090A //RX_FDEQ_BIN_7 +228 0x0B0C //RX_FDEQ_BIN_8 +229 0x0D0E //RX_FDEQ_BIN_9 +230 0x0E0F //RX_FDEQ_BIN_10 +231 0x0F10 //RX_FDEQ_BIN_11 +232 0x1011 //RX_FDEQ_BIN_12 +233 0x1104 //RX_FDEQ_BIN_13 +234 0x0000 //RX_FDEQ_BIN_14 +235 0x0000 //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x4000 //RX_FDEQ_RESRV_0 +245 0x0320 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0030 //RX_FDDRC_BAND_MARGIN_1 +248 0x0050 //RX_FDDRC_BAND_MARGIN_2 +249 0x0080 //RX_FDDRC_BAND_MARGIN_3 +250 0x0007 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x5000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x6400 //RX_FDDRC_THRD_3_2 +258 0x6400 //RX_FDDRC_THRD_3_3 +259 0x2000 //RX_FDDRC_SLANT_0_0 +260 0x2000 //RX_FDDRC_SLANT_0_1 +261 0x2000 //RX_FDDRC_SLANT_0_2 +262 0x2000 //RX_FDDRC_SLANT_0_3 +263 0x5333 //RX_FDDRC_SLANT_1_0 +264 0x5333 //RX_FDDRC_SLANT_1_1 +265 0x5333 //RX_FDDRC_SLANT_1_2 +266 0x5333 //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +286 0x0030 //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 +#VOL 4 +163 0x1000 //RX_TDDRC_ALPHA_UP_1 +164 0x1000 //RX_TDDRC_ALPHA_UP_2 +165 0x1000 //RX_TDDRC_ALPHA_UP_3 +166 0x1000 //RX_TDDRC_ALPHA_UP_4 +184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +190 0x7220 //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +269 0x0000 //RX_TDDRC_THRD_0 +270 0x0000 //RX_TDDRC_THRD_1 +271 0x1800 //RX_TDDRC_THRD_2 +272 0x1800 //RX_TDDRC_THRD_3 +273 0x7FFF //RX_TDDRC_SLANT_0 +274 0x7FFF //RX_TDDRC_SLANT_1 +275 0x1000 //RX_TDDRC_ALPHA_UP_0 +276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x199A //RX_TDDRC_HMNC_GAIN +279 0x0001 //RX_TDDRC_SMT_FLAG +280 0x0CCD //RX_TDDRC_SMT_W +281 0x01A0 //RX_TDDRC_DRC_GAIN +195 0x001C //RX_FDEQ_SUBNUM +196 0x4848 //RX_FDEQ_GAIN_0 +197 0x4848 //RX_FDEQ_GAIN_1 +198 0x4848 //RX_FDEQ_GAIN_2 +199 0x4848 //RX_FDEQ_GAIN_3 +200 0x4848 //RX_FDEQ_GAIN_4 +201 0x4848 //RX_FDEQ_GAIN_5 +202 0x484B //RX_FDEQ_GAIN_6 +203 0x4B48 //RX_FDEQ_GAIN_7 +204 0x4848 //RX_FDEQ_GAIN_8 +205 0x4848 //RX_FDEQ_GAIN_9 +206 0x4846 //RX_FDEQ_GAIN_10 +207 0x403F //RX_FDEQ_GAIN_11 +208 0x3F40 //RX_FDEQ_GAIN_12 +209 0x4248 //RX_FDEQ_GAIN_13 +210 0x4848 //RX_FDEQ_GAIN_14 +211 0x4848 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0202 //RX_FDEQ_BIN_0 +221 0x0203 //RX_FDEQ_BIN_1 +222 0x0303 //RX_FDEQ_BIN_2 +223 0x0304 //RX_FDEQ_BIN_3 +224 0x0405 //RX_FDEQ_BIN_4 +225 0x0506 //RX_FDEQ_BIN_5 +226 0x0708 //RX_FDEQ_BIN_6 +227 0x090A //RX_FDEQ_BIN_7 +228 0x0B0C //RX_FDEQ_BIN_8 +229 0x0D0E //RX_FDEQ_BIN_9 +230 0x0E0F //RX_FDEQ_BIN_10 +231 0x0F10 //RX_FDEQ_BIN_11 +232 0x1011 //RX_FDEQ_BIN_12 +233 0x1104 //RX_FDEQ_BIN_13 +234 0x0000 //RX_FDEQ_BIN_14 +235 0x0000 //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x4000 //RX_FDEQ_RESRV_0 +245 0x0320 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0030 //RX_FDDRC_BAND_MARGIN_1 +248 0x0050 //RX_FDDRC_BAND_MARGIN_2 +249 0x0080 //RX_FDDRC_BAND_MARGIN_3 +250 0x0007 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x5000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x6400 //RX_FDDRC_THRD_3_2 +258 0x6400 //RX_FDDRC_THRD_3_3 +259 0x2000 //RX_FDDRC_SLANT_0_0 +260 0x2000 //RX_FDDRC_SLANT_0_1 +261 0x2000 //RX_FDDRC_SLANT_0_2 +262 0x2000 //RX_FDDRC_SLANT_0_3 +263 0x5333 //RX_FDDRC_SLANT_1_0 +264 0x5333 //RX_FDDRC_SLANT_1_1 +265 0x5333 //RX_FDDRC_SLANT_1_2 +266 0x5333 //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +286 0x0050 //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 +#VOL 5 +163 0x1000 //RX_TDDRC_ALPHA_UP_1 +164 0x1000 //RX_TDDRC_ALPHA_UP_2 +165 0x1000 //RX_TDDRC_ALPHA_UP_3 +166 0x1000 //RX_TDDRC_ALPHA_UP_4 +184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +190 0x7220 //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +269 0x0000 //RX_TDDRC_THRD_0 +270 0x0000 //RX_TDDRC_THRD_1 +271 0x1800 //RX_TDDRC_THRD_2 +272 0x1800 //RX_TDDRC_THRD_3 +273 0x7FFF //RX_TDDRC_SLANT_0 +274 0x7FFF //RX_TDDRC_SLANT_1 +275 0x1000 //RX_TDDRC_ALPHA_UP_0 +276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x199A //RX_TDDRC_HMNC_GAIN +279 0x0001 //RX_TDDRC_SMT_FLAG +280 0x0CCD //RX_TDDRC_SMT_W +281 0x01A0 //RX_TDDRC_DRC_GAIN +195 0x001C //RX_FDEQ_SUBNUM +196 0x4848 //RX_FDEQ_GAIN_0 +197 0x4848 //RX_FDEQ_GAIN_1 +198 0x4848 //RX_FDEQ_GAIN_2 +199 0x4848 //RX_FDEQ_GAIN_3 +200 0x4848 //RX_FDEQ_GAIN_4 +201 0x4848 //RX_FDEQ_GAIN_5 +202 0x484B //RX_FDEQ_GAIN_6 +203 0x4B48 //RX_FDEQ_GAIN_7 +204 0x4848 //RX_FDEQ_GAIN_8 +205 0x4848 //RX_FDEQ_GAIN_9 +206 0x4846 //RX_FDEQ_GAIN_10 +207 0x403F //RX_FDEQ_GAIN_11 +208 0x3F40 //RX_FDEQ_GAIN_12 +209 0x4248 //RX_FDEQ_GAIN_13 +210 0x4848 //RX_FDEQ_GAIN_14 +211 0x4848 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0202 //RX_FDEQ_BIN_0 +221 0x0203 //RX_FDEQ_BIN_1 +222 0x0303 //RX_FDEQ_BIN_2 +223 0x0304 //RX_FDEQ_BIN_3 +224 0x0405 //RX_FDEQ_BIN_4 +225 0x0506 //RX_FDEQ_BIN_5 +226 0x0708 //RX_FDEQ_BIN_6 +227 0x090A //RX_FDEQ_BIN_7 +228 0x0B0C //RX_FDEQ_BIN_8 +229 0x0D0E //RX_FDEQ_BIN_9 +230 0x0E0F //RX_FDEQ_BIN_10 +231 0x0F10 //RX_FDEQ_BIN_11 +232 0x1011 //RX_FDEQ_BIN_12 +233 0x1104 //RX_FDEQ_BIN_13 +234 0x0000 //RX_FDEQ_BIN_14 +235 0x0000 //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x4000 //RX_FDEQ_RESRV_0 +245 0x0320 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0030 //RX_FDDRC_BAND_MARGIN_1 +248 0x0050 //RX_FDDRC_BAND_MARGIN_2 +249 0x0080 //RX_FDDRC_BAND_MARGIN_3 +250 0x0007 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x5000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x6400 //RX_FDDRC_THRD_3_2 +258 0x6400 //RX_FDDRC_THRD_3_3 +259 0x2000 //RX_FDDRC_SLANT_0_0 +260 0x2000 //RX_FDDRC_SLANT_0_1 +261 0x2000 //RX_FDDRC_SLANT_0_2 +262 0x2000 //RX_FDDRC_SLANT_0_3 +263 0x5333 //RX_FDDRC_SLANT_1_0 +264 0x5333 //RX_FDDRC_SLANT_1_1 +265 0x5333 //RX_FDDRC_SLANT_1_2 +266 0x5333 //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +286 0x0087 //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 +#VOL 6 +163 0x1000 //RX_TDDRC_ALPHA_UP_1 +164 0x1000 //RX_TDDRC_ALPHA_UP_2 +165 0x1000 //RX_TDDRC_ALPHA_UP_3 +166 0x1000 //RX_TDDRC_ALPHA_UP_4 +184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +190 0x7220 //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +269 0x0000 //RX_TDDRC_THRD_0 +270 0x0000 //RX_TDDRC_THRD_1 +271 0x1800 //RX_TDDRC_THRD_2 +272 0x1800 //RX_TDDRC_THRD_3 +273 0x7FFF //RX_TDDRC_SLANT_0 +274 0x7FFF //RX_TDDRC_SLANT_1 +275 0x1000 //RX_TDDRC_ALPHA_UP_0 +276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x199A //RX_TDDRC_HMNC_GAIN +279 0x0001 //RX_TDDRC_SMT_FLAG +280 0x0CCD //RX_TDDRC_SMT_W +281 0x01A0 //RX_TDDRC_DRC_GAIN +195 0x001C //RX_FDEQ_SUBNUM +196 0x4848 //RX_FDEQ_GAIN_0 +197 0x4848 //RX_FDEQ_GAIN_1 +198 0x4848 //RX_FDEQ_GAIN_2 +199 0x4848 //RX_FDEQ_GAIN_3 +200 0x4848 //RX_FDEQ_GAIN_4 +201 0x4848 //RX_FDEQ_GAIN_5 +202 0x484B //RX_FDEQ_GAIN_6 +203 0x4B48 //RX_FDEQ_GAIN_7 +204 0x4848 //RX_FDEQ_GAIN_8 +205 0x4848 //RX_FDEQ_GAIN_9 +206 0x4846 //RX_FDEQ_GAIN_10 +207 0x403F //RX_FDEQ_GAIN_11 +208 0x3F40 //RX_FDEQ_GAIN_12 +209 0x4248 //RX_FDEQ_GAIN_13 +210 0x4848 //RX_FDEQ_GAIN_14 +211 0x4848 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0202 //RX_FDEQ_BIN_0 +221 0x0203 //RX_FDEQ_BIN_1 +222 0x0303 //RX_FDEQ_BIN_2 +223 0x0304 //RX_FDEQ_BIN_3 +224 0x0405 //RX_FDEQ_BIN_4 +225 0x0506 //RX_FDEQ_BIN_5 +226 0x0708 //RX_FDEQ_BIN_6 +227 0x090A //RX_FDEQ_BIN_7 +228 0x0B0C //RX_FDEQ_BIN_8 +229 0x0D0E //RX_FDEQ_BIN_9 +230 0x0E0F //RX_FDEQ_BIN_10 +231 0x0F10 //RX_FDEQ_BIN_11 +232 0x1011 //RX_FDEQ_BIN_12 +233 0x1104 //RX_FDEQ_BIN_13 +234 0x0000 //RX_FDEQ_BIN_14 +235 0x0000 //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x4000 //RX_FDEQ_RESRV_0 +245 0x0320 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0030 //RX_FDDRC_BAND_MARGIN_1 +248 0x0050 //RX_FDDRC_BAND_MARGIN_2 +249 0x0080 //RX_FDDRC_BAND_MARGIN_3 +250 0x0007 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x5000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x6400 //RX_FDDRC_THRD_3_2 +258 0x6400 //RX_FDDRC_THRD_3_3 +259 0x2000 //RX_FDDRC_SLANT_0_0 +260 0x2000 //RX_FDDRC_SLANT_0_1 +261 0x2000 //RX_FDDRC_SLANT_0_2 +262 0x2000 //RX_FDDRC_SLANT_0_3 +263 0x5333 //RX_FDDRC_SLANT_1_0 +264 0x5333 //RX_FDDRC_SLANT_1_1 +265 0x5333 //RX_FDDRC_SLANT_1_2 +266 0x5333 //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +286 0x0100 //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 #CASE_NAME HEADSET-USB_BLACKBIRD-VOICE_GENERIC-SWB -#PARAM_MODE FULL -#PARAM_TYPE TX+RX -#TOTAL_CUSTOM_STEP 7 +#PARAM_MODE Full +#PARAM_TYPE TX+2RX +#TOTAL_CUSTOM_STEP 7+7 #TX 0 0x0009 //TX_OPERATION_MODE_0 1 0x0001 //TX_OPERATION_MODE_1 @@ -3758,7 +5590,7 @@ 239 0x0800 //TX_DT_RESRV_7 240 0x0800 //TX_DT_RESRV_8 241 0x0000 //TX_DT_RESRV_9 -242 0xF400 //TX_THR_SN_EST_0 +242 0xFA00 //TX_THR_SN_EST_0 243 0xFA00 //TX_THR_SN_EST_1 244 0xF700 //TX_THR_SN_EST_2 245 0xFA00 //TX_THR_SN_EST_3 @@ -3767,20 +5599,20 @@ 248 0xF400 //TX_THR_SN_EST_6 249 0xF600 //TX_THR_SN_EST_7 250 0x0000 //TX_DELTA_THR_SN_EST_0 -251 0x0100 //TX_DELTA_THR_SN_EST_1 +251 0x0200 //TX_DELTA_THR_SN_EST_1 252 0x0200 //TX_DELTA_THR_SN_EST_2 -253 0x0200 //TX_DELTA_THR_SN_EST_3 -254 0x0100 //TX_DELTA_THR_SN_EST_4 +253 0x0100 //TX_DELTA_THR_SN_EST_3 +254 0x0200 //TX_DELTA_THR_SN_EST_4 255 0x0200 //TX_DELTA_THR_SN_EST_5 -256 0x0200 //TX_DELTA_THR_SN_EST_6 +256 0x0100 //TX_DELTA_THR_SN_EST_6 257 0x0200 //TX_DELTA_THR_SN_EST_7 258 0x6000 //TX_LAMBDA_NN_EST_0 -259 0x6000 //TX_LAMBDA_NN_EST_1 +259 0x4000 //TX_LAMBDA_NN_EST_1 260 0x4000 //TX_LAMBDA_NN_EST_2 261 0x4000 //TX_LAMBDA_NN_EST_3 262 0x4000 //TX_LAMBDA_NN_EST_4 263 0x4000 //TX_LAMBDA_NN_EST_5 -264 0x4000 //TX_LAMBDA_NN_EST_6 +264 0x6000 //TX_LAMBDA_NN_EST_6 265 0x4000 //TX_LAMBDA_NN_EST_7 266 0x0400 //TX_N_SN_EST 267 0x001E //TX_INBEAM_T @@ -3798,18 +5630,18 @@ 279 0x1000 //TX_B_POST_FLT_0 280 0x1000 //TX_B_POST_FLT_1 281 0x000F //TX_NS_LVL_CTRL_0 -282 0x0018 //TX_NS_LVL_CTRL_1 -283 0x0014 //TX_NS_LVL_CTRL_2 -284 0x0018 //TX_NS_LVL_CTRL_3 -285 0x0012 //TX_NS_LVL_CTRL_4 +282 0x0014 //TX_NS_LVL_CTRL_1 +283 0x0018 //TX_NS_LVL_CTRL_2 +284 0x0012 //TX_NS_LVL_CTRL_3 +285 0x000F //TX_NS_LVL_CTRL_4 286 0x000F //TX_NS_LVL_CTRL_5 -287 0x000F //TX_NS_LVL_CTRL_6 +287 0x0018 //TX_NS_LVL_CTRL_6 288 0x0011 //TX_NS_LVL_CTRL_7 289 0x000C //TX_MIN_GAIN_S_0 -290 0x000C //TX_MIN_GAIN_S_1 -291 0x000F //TX_MIN_GAIN_S_2 -292 0x000C //TX_MIN_GAIN_S_3 -293 0x0009 //TX_MIN_GAIN_S_4 +290 0x000F //TX_MIN_GAIN_S_1 +291 0x000C //TX_MIN_GAIN_S_2 +292 0x0009 //TX_MIN_GAIN_S_3 +293 0x000C //TX_MIN_GAIN_S_4 294 0x000C //TX_MIN_GAIN_S_5 295 0x000C //TX_MIN_GAIN_S_6 296 0x000F //TX_MIN_GAIN_S_7 @@ -3817,10 +5649,10 @@ 298 0x0000 //TX_NS_MAX_PRI_SNR_TH 299 0x0000 //TX_NMOS_SUP_MENSA 300 0x7FFF //TX_SNRI_SUP_0 -301 0x7FFF //TX_SNRI_SUP_1 -302 0x6000 //TX_SNRI_SUP_2 -303 0x5000 //TX_SNRI_SUP_3 -304 0x6000 //TX_SNRI_SUP_4 +301 0x6000 //TX_SNRI_SUP_1 +302 0x5000 //TX_SNRI_SUP_2 +303 0x6000 //TX_SNRI_SUP_3 +304 0x7FFF //TX_SNRI_SUP_4 305 0x7FFF //TX_SNRI_SUP_5 306 0x7FFF //TX_SNRI_SUP_6 307 0x7FFF //TX_SNRI_SUP_7 @@ -3831,17 +5663,17 @@ 312 0x7FFF //TX_A_POST_FILT_0 313 0x2000 //TX_A_POST_FILT_1 314 0x4000 //TX_A_POST_FILT_S_0 -315 0x4000 //TX_A_POST_FILT_S_1 +315 0x5000 //TX_A_POST_FILT_S_1 316 0x5000 //TX_A_POST_FILT_S_2 317 0x5000 //TX_A_POST_FILT_S_3 318 0x5000 //TX_A_POST_FILT_S_4 319 0x5000 //TX_A_POST_FILT_S_5 -320 0x5000 //TX_A_POST_FILT_S_6 +320 0x4000 //TX_A_POST_FILT_S_6 321 0x5000 //TX_A_POST_FILT_S_7 322 0x1000 //TX_B_POST_FILT_0 323 0x1000 //TX_B_POST_FILT_1 -324 0x1000 //TX_B_POST_FILT_2 -325 0x3000 //TX_B_POST_FILT_3 +324 0x3000 //TX_B_POST_FILT_2 +325 0x1000 //TX_B_POST_FILT_3 326 0x1000 //TX_B_POST_FILT_4 327 0x1000 //TX_B_POST_FILT_5 328 0x1000 //TX_B_POST_FILT_6 @@ -3856,12 +5688,12 @@ 337 0x7FFF //TX_B_LESSCUT_RTO_S_7 338 0x7CCD //TX_LAMBDA_PFILT 339 0x7B00 //TX_LAMBDA_PFILT_S_0 -340 0x7F00 //TX_LAMBDA_PFILT_S_1 -341 0x7B00 //TX_LAMBDA_PFILT_S_2 -342 0x7000 //TX_LAMBDA_PFILT_S_3 +340 0x7B00 //TX_LAMBDA_PFILT_S_1 +341 0x7000 //TX_LAMBDA_PFILT_S_2 +342 0x7B00 //TX_LAMBDA_PFILT_S_3 343 0x7B00 //TX_LAMBDA_PFILT_S_4 344 0x7B00 //TX_LAMBDA_PFILT_S_5 -345 0x7B00 //TX_LAMBDA_PFILT_S_6 +345 0x7F00 //TX_LAMBDA_PFILT_S_6 346 0x7B00 //TX_LAMBDA_PFILT_S_7 347 0x0200 //TX_K_PEPPER 348 0x0400 //TX_A_PEPPER @@ -3883,7 +5715,7 @@ 364 0x0000 //TX_K_APT 365 0x0001 //TX_NOISEDET 366 0x0190 //TX_NDETCT -367 0x0050 //TX_NOISE_TH_0 +367 0x0383 //TX_NOISE_TH_0 368 0x7FFF //TX_NOISE_TH_0_2 369 0x7FFF //TX_NOISE_TH_0_3 370 0x07D0 //TX_NOISE_TH_1 @@ -3895,11 +5727,11 @@ 376 0x7FFF //TX_NOISE_TH_5_3 377 0x7FFF //TX_NOISE_TH_5_4 378 0x044C //TX_NOISE_TH_6 -379 0x0014 //TX_MINENOISE_TH -380 0x4000 //TX_MINENOISE_MIC0_TH_MTS -381 0xFFEE //TX_MINENOISE_MIC0_TH_EXP -382 0x6000 //TX_MINENOISE_MIC0_S_TH_MTS -383 0xFFF3 //TX_MINENOISE_MIC0_S_TH_EXP +379 0x044C //TX_MINENOISE_TH +380 0xD508 //TX_MORENS_TFMASK_TH +381 0x0001 //TX_DRC_QUIET_FLOOR +382 0x3A98 //TX_RATIODTL_CUT_TH +383 0x0DAC //TX_DT_CUT_K1 384 0x0666 //TX_OUT_ENER_S_TH_CLEAN 385 0x0666 //TX_OUT_ENER_S_TH_LESSCLEAN 386 0x0333 //TX_OUT_ENER_S_TH_NOISY @@ -3907,22 +5739,22 @@ 388 0x0333 //TX_OUT_ENER_TH_SPEECH 389 0x2000 //TX_SN_NPB_GAIN 390 0x0000 //TX_NN_NPB_GAIN -391 0x0000 //TX_CSX_ALPHA_0 -392 0x0000 //TX_CSX_ALPHA_1 -393 0x0000 //TX_CSX_ALPHA_2 -394 0x0000 //TX_CSX_ALPHA_3 -395 0x0800 //TX_MU_ARSP_EST -396 0x00C8 //TX_P_OUTBEAM_MIN_TH +391 0x7FFF //TX_POST_MASK_SUP_HSNE +392 0x1388 //TX_TAIL_DET_TH +393 0x4000 //TX_B_LESSCUT_RTO_WTA +394 0x0000 //TX_MEL_G_R +395 0x0080 //TX_SUPHIGH_TH +396 0x0000 //TX_MASK_G_R 397 0x0002 //TX_EXTRA_NS_L -398 0x0800 //TX_EXTRA_NS_A -399 0x0005 //TX_VR_NOISE_FLOOR_TH +398 0x1800 //TX_C_POST_FLT_MASK +399 0x7FFF //TX_A_POST_FLT_WNS 400 0x0148 //TX_MIN_G_LOW300HZ 401 0x0004 //TX_MAXLEVEL_CNG 402 0x00B4 //TX_STN_NOISE_TH 403 0x4000 //TX_POST_MASK_SUP 404 0x7FFF //TX_POST_MASK_ADJUST 405 0x00C8 //TX_NS_ENOISE_MIC0_TH -406 0x0014 //TX_MINENOISE_MIC0_TH +406 0x02F3 //TX_MINENOISE_MIC0_TH 407 0x012C //TX_MINENOISE_MIC0_S_TH 408 0x7FFF //TX_MIN_G_CTRL_SSNS 409 0x0800 //TX_METAL_RTO_THR @@ -4030,16 +5862,16 @@ 511 0x6666 //TX_MIC_TO_BFGAIN 512 0x0000 //TX_MICTOBFGAIN0 513 0x0000 //TX_FASTMUE_TH -514 0x0000 //TX_DERVB_LEN_0 -515 0x0000 //TX_DERVB_LEN_1 -516 0x0000 //TX_RHO_DERVB -517 0x0000 //TX_MIC_INDX_DERVB -518 0x0000 //TX_MU_DERVB -519 0x0000 //TX_DR_RESRV_0 -520 0x0000 //TX_DR_RESRV_1 -521 0x0000 //TX_DR_RESRV_2 -522 0x0000 //TX_DR_RESRV_3 -523 0x0000 //TX_DR_RESRV_4 +514 0xC000 //TX_DEREVERB_LF_MU +515 0xC000 //TX_DEREVERB_HF_MU +516 0xCCCC //TX_DEREVERB_DELAY +517 0xD999 //TX_DEREVERB_COEF_LEN +518 0x1F40 //TX_DEREVERB_DNR +519 0x0000 //TX_DEREVERB_ALPHA +520 0x0000 //TX_DEREVERB_BETA +521 0x0000 //TX_GSC_RTOL_TH +522 0x7000 //TX_GSC_RTOH_TH +523 0x0064 //TX_WIDE2_MEANHTH 524 0x0000 //TX_DR_RESRV_5 525 0x0000 //TX_DR_RESRV_6 526 0x0000 //TX_DR_RESRV_7 @@ -4405,7 +6237,7 @@ 886 0x0CCD //TX_FASTNS_TFMASKBIN_TH2 887 0x0CCD //TX_FASTNS_TFMASKBIN_TH3 888 0x00C8 //TX_FASTNS_ARSPC_TH -889 0xC000 //TX_FASTNS_MASK5_TH +889 0x8000 //TX_FASTNS_MASK5_TH 890 0x4848 //TX_POSTSSA_MIN_G_VR_MASK 891 0x4000 //TX_A_LESSCUT_RTO_MASK 892 0x1770 //TX_FASTNS_NOISETH @@ -4413,8 +6245,73 @@ 894 0xC000 //TX_FASTNS_SSA_THHFL 895 0xCCCC //TX_FASTNS_SSA_THLFH 896 0xD999 //TX_FASTNS_SSA_THHFH +897 0x2339 //TX_SENDFUNC_REG_MICMUTE +898 0x0021 //TX_SENDFUNC_REG_MICMUTE1 +899 0x02BC //TX_MICMUTE_RATIO_THR +900 0x0140 //TX_MICMUTE_AMP_THR +901 0x0004 //TX_MICMUTE_HPF_IND +902 0x00C0 //TX_MICMUTE_LOG_EYR_TH +903 0x0008 //TX_MICMUTE_CVG_TIME +904 0x0008 //TX_MICMUTE_RELEASE_TIME +905 0x01FE //TX_MIC_VOLUME_MIC0MUTE +906 0x0020 //TX_MICMUTE_EPD_OFFSET_0 +907 0x001E //TX_MICMUTE_FRQ_AEC_L +908 0x7999 //TX_MICMUTE_EAD_THR +909 0x7FFF //TX_MICMUTE_LAMBDA_CB_NLE +910 0x7FFF //TX_MICMUTE_LAMBDA_RE_EST +911 0x4000 //TX_DTD_THR1_MICMUTE_0 +912 0x7000 //TX_DTD_THR1_MICMUTE_1 +913 0x7FFF //TX_DTD_THR1_MICMUTE_2 +914 0x7FFF //TX_DTD_THR1_MICMUTE_3 +915 0x6CCC //TX_DTD_THR2_MICMUTE_0 +916 0x0400 //TX_MICMUTE_MIN_EQ_RE_EST_0 +917 0x0400 //TX_MICMUTE_MIN_EQ_RE_EST_1 +918 0x1000 //TX_MICMUTE_MIN_EQ_RE_EST_2 +919 0x7FFF //TX_MICMUTE_MIN_EQ_RE_EST_3 +920 0x7FFF //TX_MICMUTE_MIN_EQ_RE_EST_4 +921 0x4000 //TX_MICMUTE_C_POST_FLT +922 0x03E8 //TX_MICMUTE_DT_CUT_K +923 0x0001 //TX_MICMUTE_DT_CUT_THR +924 0x03E8 //TX_MICMUTE_DT_CUT_K2 +925 0x0001 //TX_MICMUTE_DT_CUT_THR2 +926 0x0064 //TX_MICMUTE_DT2_HOLD_N +927 0x1000 //TX_MICMUTE_RATIODTH_THCUT +928 0x1000 //TX_MICMUTE_B_POST_FLT_ECHOL +929 0x7FFF //TX_MICMUTE_B_POST_FLT_ECHOH +930 0x0400 //TX_MICMUTE_C_POST_FLT_MASK +931 0x7999 //TX_MICMUTE_RATIODTL_CUT_TH +932 0x0258 //TX_MICMUTE_DT_CUT_K1 +933 0x0800 //TX_MICMUTE_N2_SN_EST +934 0xFC00 //TX_MICMUTE_THR_SN_EST_0 +935 0x001C //TX_MICMUTE_MIN_G_CTRL_0 +936 0x6000 //TX_MICMUTE_A_POST_FILT_S_0 +937 0x7000 //TX_MICMUTE_B_POST_FILT_0 +938 0x2710 //TX_MIC1RUB_AMP_THR +939 0x0010 //TX_MIC1MUTE_RATIO_THR +940 0x0450 //TX_MIC1MUTE_AMP_THR +941 0x0008 //TX_MIC1MUTE_CVG_TIME +942 0x0008 //TX_MIC1MUTE_RELEASE_TIME +943 0x0000 //TX_AMS_RESRV_01 +944 0x0000 //TX_AMS_RESRV_02 +945 0x0000 //TX_AMS_RESRV_03 +946 0x0000 //TX_AMS_RESRV_04 +947 0x0000 //TX_AMS_RESRV_05 +948 0x0000 //TX_AMS_RESRV_06 +949 0x0000 //TX_AMS_RESRV_07 +950 0x0000 //TX_AMS_RESRV_08 +951 0x0000 //TX_AMS_RESRV_09 +952 0x0000 //TX_AMS_RESRV_10 +953 0x0000 //TX_AMS_RESRV_11 +954 0x0000 //TX_AMS_RESRV_12 +955 0x0000 //TX_AMS_RESRV_13 +956 0x0000 //TX_AMS_RESRV_14 +957 0x0000 //TX_AMS_RESRV_15 +958 0x0000 //TX_AMS_RESRV_16 +959 0x0000 //TX_AMS_RESRV_17 +960 0x0000 //TX_AMS_RESRV_18 +961 0x0000 //TX_AMS_RESRV_19 #RX -0 0x042C //RX_RECVFUNC_MODE_0 +0 0x242C //RX_RECVFUNC_MODE_0 1 0x0000 //RX_RECVFUNC_MODE_1 2 0x0003 //RX_SAMPLINGFREQ_SIG 3 0x0003 //RX_SAMPLINGFREQ_PROC @@ -5264,11 +7161,862 @@ 110 0x0000 //RX_FDDRC_RESRV_0 129 0x0100 //RX_SPK_VOL 130 0x0000 //RX_VOL_RESRV_0 +#RX 2 +157 0x242C //RX_RECVFUNC_MODE_0 +158 0x0000 //RX_RECVFUNC_MODE_1 +159 0x0003 //RX_SAMPLINGFREQ_SIG +160 0x0003 //RX_SAMPLINGFREQ_PROC +161 0x000A //RX_FRAME_SZ +162 0x0000 //RX_DELAY_OPT +163 0x5000 //RX_TDDRC_ALPHA_UP_1 +164 0x5000 //RX_TDDRC_ALPHA_UP_2 +165 0x5000 //RX_TDDRC_ALPHA_UP_3 +166 0x2000 //RX_TDDRC_ALPHA_UP_4 +167 0x0800 //RX_PGA +168 0x7FFF //RX_A_HP +169 0x0000 //RX_B_PE +170 0x1800 //RX_THR_PITCH_DET_0 +171 0x1000 //RX_THR_PITCH_DET_1 +172 0x0800 //RX_THR_PITCH_DET_2 +173 0x0008 //RX_PITCH_BFR_LEN +174 0x0003 //RX_SBD_PITCH_DET +175 0x0100 //RX_PP_RESRV_0 +176 0x0020 //RX_PP_RESRV_1 +177 0x0400 //RX_N_SN_EST +178 0x000C //RX_N2_SN_EST +179 0x0003 //RX_NS_LVL_CTRL +180 0x9000 //RX_THR_SN_EST +181 0x7CCD //RX_LAMBDA_PFILT +182 0x000A //RX_FENS_RESRV_0 +183 0x0190 //RX_FENS_RESRV_1 +184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +187 0x0002 //RX_EXTRA_NS_L +188 0x0800 //RX_EXTRA_NS_A +189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +190 0x65AD //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +192 0x199A //RX_A_POST_FLT +193 0x0000 //RX_LMT_THRD +194 0x4000 //RX_LMT_ALPHA +195 0x0020 //RX_FDEQ_SUBNUM +196 0x4E52 //RX_FDEQ_GAIN_0 +197 0x5252 //RX_FDEQ_GAIN_1 +198 0x5252 //RX_FDEQ_GAIN_2 +199 0x5250 //RX_FDEQ_GAIN_3 +200 0x4C46 //RX_FDEQ_GAIN_4 +201 0x4748 //RX_FDEQ_GAIN_5 +202 0x5768 //RX_FDEQ_GAIN_6 +203 0x6162 //RX_FDEQ_GAIN_7 +204 0x5252 //RX_FDEQ_GAIN_8 +205 0x5256 //RX_FDEQ_GAIN_9 +206 0x5248 //RX_FDEQ_GAIN_10 +207 0x3434 //RX_FDEQ_GAIN_11 +208 0x3436 //RX_FDEQ_GAIN_12 +209 0x2A18 //RX_FDEQ_GAIN_13 +210 0x1830 //RX_FDEQ_GAIN_14 +211 0x3648 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0202 //RX_FDEQ_BIN_0 +221 0x0203 //RX_FDEQ_BIN_1 +222 0x0303 //RX_FDEQ_BIN_2 +223 0x0304 //RX_FDEQ_BIN_3 +224 0x0405 //RX_FDEQ_BIN_4 +225 0x0506 //RX_FDEQ_BIN_5 +226 0x0708 //RX_FDEQ_BIN_6 +227 0x090A //RX_FDEQ_BIN_7 +228 0x0B0C //RX_FDEQ_BIN_8 +229 0x0D0E //RX_FDEQ_BIN_9 +230 0x1013 //RX_FDEQ_BIN_10 +231 0x1719 //RX_FDEQ_BIN_11 +232 0x1B1E //RX_FDEQ_BIN_12 +233 0x1E1E //RX_FDEQ_BIN_13 +234 0x1E28 //RX_FDEQ_BIN_14 +235 0x284A //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x4000 //RX_FDEQ_RESRV_0 +245 0x0320 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0030 //RX_FDDRC_BAND_MARGIN_1 +248 0x0050 //RX_FDDRC_BAND_MARGIN_2 +249 0x0080 //RX_FDDRC_BAND_MARGIN_3 +250 0x0007 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x5000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x6400 //RX_FDDRC_THRD_3_2 +258 0x6400 //RX_FDDRC_THRD_3_3 +259 0x2000 //RX_FDDRC_SLANT_0_0 +260 0x2000 //RX_FDDRC_SLANT_0_1 +261 0x2000 //RX_FDDRC_SLANT_0_2 +262 0x2000 //RX_FDDRC_SLANT_0_3 +263 0x5333 //RX_FDDRC_SLANT_1_0 +264 0x5333 //RX_FDDRC_SLANT_1_1 +265 0x5333 //RX_FDDRC_SLANT_1_2 +266 0x5333 //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +268 0x0002 //RX_FILTINDX +269 0x0000 //RX_TDDRC_THRD_0 +270 0x0000 //RX_TDDRC_THRD_1 +271 0x1A00 //RX_TDDRC_THRD_2 +272 0x1A00 //RX_TDDRC_THRD_3 +273 0x3000 //RX_TDDRC_SLANT_0 +274 0x7EB8 //RX_TDDRC_SLANT_1 +275 0x5000 //RX_TDDRC_ALPHA_UP_0 +276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x199A //RX_TDDRC_HMNC_GAIN +279 0x0001 //RX_TDDRC_SMT_FLAG +280 0x0CCD //RX_TDDRC_SMT_W +281 0x023E //RX_TDDRC_DRC_GAIN +282 0x7C00 //RX_LAMBDA_PKA_FP +283 0x280A //RX_TPKA_FP +284 0x032D //RX_MIN_G_FP +285 0x0A00 //RX_MAX_G_FP +286 0x000B //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 +288 0x0000 //RX_MAXLEVEL_CNG +289 0x3000 //RX_BWE_UV_TH +290 0x3000 //RX_BWE_UV_TH2 +291 0x1800 //RX_BWE_UV_TH3 +292 0x1000 //RX_BWE_V_TH +293 0x04CD //RX_BWE_GAIN1_V_TH1 +294 0x0F33 //RX_BWE_GAIN1_V_TH2 +295 0x7333 //RX_BWE_UV_EQ +296 0x199A //RX_BWE_V_EQ +297 0x7333 //RX_BWE_TONE_TH +298 0x0004 //RX_BWE_UV_HOLD_T +299 0x6CCD //RX_BWE_GAIN2_ALPHA +300 0x799A //RX_BWE_GAIN3_ALPHA +301 0x001E //RX_BWE_CUTOFF +302 0x3000 //RX_BWE_GAINFILL +303 0x3200 //RX_BWE_MAXTH_TONE +304 0x2000 //RX_BWE_EQ_0 +305 0x2000 //RX_BWE_EQ_1 +306 0x2000 //RX_BWE_EQ_2 +307 0x2000 //RX_BWE_EQ_3 +308 0x2000 //RX_BWE_EQ_4 +309 0x2000 //RX_BWE_EQ_5 +310 0x2000 //RX_BWE_EQ_6 +311 0x0000 //RX_BWE_RESRV_0 +312 0x0000 //RX_BWE_RESRV_1 +313 0x0000 //RX_BWE_RESRV_2 +#VOL 0 +163 0x5000 //RX_TDDRC_ALPHA_UP_1 +164 0x5000 //RX_TDDRC_ALPHA_UP_2 +165 0x5000 //RX_TDDRC_ALPHA_UP_3 +166 0x2000 //RX_TDDRC_ALPHA_UP_4 +184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +190 0x7220 //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +269 0x0000 //RX_TDDRC_THRD_0 +270 0x0000 //RX_TDDRC_THRD_1 +271 0x1800 //RX_TDDRC_THRD_2 +272 0x1800 //RX_TDDRC_THRD_3 +273 0x7FFF //RX_TDDRC_SLANT_0 +274 0x7FFF //RX_TDDRC_SLANT_1 +275 0x5000 //RX_TDDRC_ALPHA_UP_0 +276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x199A //RX_TDDRC_HMNC_GAIN +279 0x0001 //RX_TDDRC_SMT_FLAG +280 0x0CCD //RX_TDDRC_SMT_W +281 0x0214 //RX_TDDRC_DRC_GAIN +195 0x0020 //RX_FDEQ_SUBNUM +196 0x6270 //RX_FDEQ_GAIN_0 +197 0x7A70 //RX_FDEQ_GAIN_1 +198 0x7270 //RX_FDEQ_GAIN_2 +199 0x6A70 //RX_FDEQ_GAIN_3 +200 0x645A //RX_FDEQ_GAIN_4 +201 0x5A5E //RX_FDEQ_GAIN_5 +202 0x6E72 //RX_FDEQ_GAIN_6 +203 0x7268 //RX_FDEQ_GAIN_7 +204 0x665A //RX_FDEQ_GAIN_8 +205 0x5A5A //RX_FDEQ_GAIN_9 +206 0x5A64 //RX_FDEQ_GAIN_10 +207 0x6448 //RX_FDEQ_GAIN_11 +208 0x4949 //RX_FDEQ_GAIN_12 +209 0x4848 //RX_FDEQ_GAIN_13 +210 0x4848 //RX_FDEQ_GAIN_14 +211 0x4848 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0202 //RX_FDEQ_BIN_0 +221 0x0203 //RX_FDEQ_BIN_1 +222 0x0303 //RX_FDEQ_BIN_2 +223 0x0304 //RX_FDEQ_BIN_3 +224 0x0405 //RX_FDEQ_BIN_4 +225 0x0506 //RX_FDEQ_BIN_5 +226 0x0708 //RX_FDEQ_BIN_6 +227 0x090A //RX_FDEQ_BIN_7 +228 0x0B0C //RX_FDEQ_BIN_8 +229 0x0D0E //RX_FDEQ_BIN_9 +230 0x1013 //RX_FDEQ_BIN_10 +231 0x1719 //RX_FDEQ_BIN_11 +232 0x1B1E //RX_FDEQ_BIN_12 +233 0x1E1E //RX_FDEQ_BIN_13 +234 0x1E28 //RX_FDEQ_BIN_14 +235 0x284A //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x4000 //RX_FDEQ_RESRV_0 +245 0x0320 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0030 //RX_FDDRC_BAND_MARGIN_1 +248 0x0050 //RX_FDDRC_BAND_MARGIN_2 +249 0x0080 //RX_FDDRC_BAND_MARGIN_3 +250 0x0007 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x5000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x6400 //RX_FDDRC_THRD_3_2 +258 0x6400 //RX_FDDRC_THRD_3_3 +259 0x2000 //RX_FDDRC_SLANT_0_0 +260 0x2000 //RX_FDDRC_SLANT_0_1 +261 0x2000 //RX_FDDRC_SLANT_0_2 +262 0x2000 //RX_FDDRC_SLANT_0_3 +263 0x5333 //RX_FDDRC_SLANT_1_0 +264 0x5333 //RX_FDDRC_SLANT_1_1 +265 0x5333 //RX_FDDRC_SLANT_1_2 +266 0x5333 //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +286 0x000A //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 +#VOL 1 +163 0x5000 //RX_TDDRC_ALPHA_UP_1 +164 0x5000 //RX_TDDRC_ALPHA_UP_2 +165 0x5000 //RX_TDDRC_ALPHA_UP_3 +166 0x2000 //RX_TDDRC_ALPHA_UP_4 +184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +190 0x7220 //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +269 0x0000 //RX_TDDRC_THRD_0 +270 0x0000 //RX_TDDRC_THRD_1 +271 0x1800 //RX_TDDRC_THRD_2 +272 0x1800 //RX_TDDRC_THRD_3 +273 0x7FFF //RX_TDDRC_SLANT_0 +274 0x7FFF //RX_TDDRC_SLANT_1 +275 0x5000 //RX_TDDRC_ALPHA_UP_0 +276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x199A //RX_TDDRC_HMNC_GAIN +279 0x0001 //RX_TDDRC_SMT_FLAG +280 0x0CCD //RX_TDDRC_SMT_W +281 0x0214 //RX_TDDRC_DRC_GAIN +195 0x0020 //RX_FDEQ_SUBNUM +196 0x6270 //RX_FDEQ_GAIN_0 +197 0x7A70 //RX_FDEQ_GAIN_1 +198 0x7270 //RX_FDEQ_GAIN_2 +199 0x6A70 //RX_FDEQ_GAIN_3 +200 0x645A //RX_FDEQ_GAIN_4 +201 0x5A5E //RX_FDEQ_GAIN_5 +202 0x6E72 //RX_FDEQ_GAIN_6 +203 0x7268 //RX_FDEQ_GAIN_7 +204 0x665A //RX_FDEQ_GAIN_8 +205 0x5A5A //RX_FDEQ_GAIN_9 +206 0x5A64 //RX_FDEQ_GAIN_10 +207 0x6448 //RX_FDEQ_GAIN_11 +208 0x4949 //RX_FDEQ_GAIN_12 +209 0x4848 //RX_FDEQ_GAIN_13 +210 0x4848 //RX_FDEQ_GAIN_14 +211 0x4848 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0202 //RX_FDEQ_BIN_0 +221 0x0203 //RX_FDEQ_BIN_1 +222 0x0303 //RX_FDEQ_BIN_2 +223 0x0304 //RX_FDEQ_BIN_3 +224 0x0405 //RX_FDEQ_BIN_4 +225 0x0506 //RX_FDEQ_BIN_5 +226 0x0708 //RX_FDEQ_BIN_6 +227 0x090A //RX_FDEQ_BIN_7 +228 0x0B0C //RX_FDEQ_BIN_8 +229 0x0D0E //RX_FDEQ_BIN_9 +230 0x1013 //RX_FDEQ_BIN_10 +231 0x1719 //RX_FDEQ_BIN_11 +232 0x1B1E //RX_FDEQ_BIN_12 +233 0x1E1E //RX_FDEQ_BIN_13 +234 0x1E28 //RX_FDEQ_BIN_14 +235 0x284A //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x4000 //RX_FDEQ_RESRV_0 +245 0x0320 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0030 //RX_FDDRC_BAND_MARGIN_1 +248 0x0050 //RX_FDDRC_BAND_MARGIN_2 +249 0x0080 //RX_FDDRC_BAND_MARGIN_3 +250 0x0007 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x5000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x6400 //RX_FDDRC_THRD_3_2 +258 0x6400 //RX_FDDRC_THRD_3_3 +259 0x2000 //RX_FDDRC_SLANT_0_0 +260 0x2000 //RX_FDDRC_SLANT_0_1 +261 0x2000 //RX_FDDRC_SLANT_0_2 +262 0x2000 //RX_FDDRC_SLANT_0_3 +263 0x5333 //RX_FDDRC_SLANT_1_0 +264 0x5333 //RX_FDDRC_SLANT_1_1 +265 0x5333 //RX_FDDRC_SLANT_1_2 +266 0x5333 //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +286 0x0011 //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 +#VOL 2 +163 0x5000 //RX_TDDRC_ALPHA_UP_1 +164 0x5000 //RX_TDDRC_ALPHA_UP_2 +165 0x5000 //RX_TDDRC_ALPHA_UP_3 +166 0x2000 //RX_TDDRC_ALPHA_UP_4 +184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +190 0x7220 //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +269 0x0000 //RX_TDDRC_THRD_0 +270 0x0000 //RX_TDDRC_THRD_1 +271 0x1800 //RX_TDDRC_THRD_2 +272 0x1800 //RX_TDDRC_THRD_3 +273 0x7FFF //RX_TDDRC_SLANT_0 +274 0x7FFF //RX_TDDRC_SLANT_1 +275 0x5000 //RX_TDDRC_ALPHA_UP_0 +276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x199A //RX_TDDRC_HMNC_GAIN +279 0x0001 //RX_TDDRC_SMT_FLAG +280 0x0CCD //RX_TDDRC_SMT_W +281 0x0214 //RX_TDDRC_DRC_GAIN +195 0x0020 //RX_FDEQ_SUBNUM +196 0x6270 //RX_FDEQ_GAIN_0 +197 0x7A70 //RX_FDEQ_GAIN_1 +198 0x7270 //RX_FDEQ_GAIN_2 +199 0x6A70 //RX_FDEQ_GAIN_3 +200 0x645A //RX_FDEQ_GAIN_4 +201 0x5A5E //RX_FDEQ_GAIN_5 +202 0x6E72 //RX_FDEQ_GAIN_6 +203 0x7268 //RX_FDEQ_GAIN_7 +204 0x665A //RX_FDEQ_GAIN_8 +205 0x5A5A //RX_FDEQ_GAIN_9 +206 0x5A64 //RX_FDEQ_GAIN_10 +207 0x6448 //RX_FDEQ_GAIN_11 +208 0x4949 //RX_FDEQ_GAIN_12 +209 0x4848 //RX_FDEQ_GAIN_13 +210 0x4848 //RX_FDEQ_GAIN_14 +211 0x4848 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0202 //RX_FDEQ_BIN_0 +221 0x0203 //RX_FDEQ_BIN_1 +222 0x0303 //RX_FDEQ_BIN_2 +223 0x0304 //RX_FDEQ_BIN_3 +224 0x0405 //RX_FDEQ_BIN_4 +225 0x0506 //RX_FDEQ_BIN_5 +226 0x0708 //RX_FDEQ_BIN_6 +227 0x090A //RX_FDEQ_BIN_7 +228 0x0B0C //RX_FDEQ_BIN_8 +229 0x0D0E //RX_FDEQ_BIN_9 +230 0x1013 //RX_FDEQ_BIN_10 +231 0x1719 //RX_FDEQ_BIN_11 +232 0x1B1E //RX_FDEQ_BIN_12 +233 0x1E1E //RX_FDEQ_BIN_13 +234 0x1E28 //RX_FDEQ_BIN_14 +235 0x284A //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x4000 //RX_FDEQ_RESRV_0 +245 0x0320 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0030 //RX_FDDRC_BAND_MARGIN_1 +248 0x0050 //RX_FDDRC_BAND_MARGIN_2 +249 0x0080 //RX_FDDRC_BAND_MARGIN_3 +250 0x0007 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x5000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x6400 //RX_FDDRC_THRD_3_2 +258 0x6400 //RX_FDDRC_THRD_3_3 +259 0x2000 //RX_FDDRC_SLANT_0_0 +260 0x2000 //RX_FDDRC_SLANT_0_1 +261 0x2000 //RX_FDDRC_SLANT_0_2 +262 0x2000 //RX_FDDRC_SLANT_0_3 +263 0x5333 //RX_FDDRC_SLANT_1_0 +264 0x5333 //RX_FDDRC_SLANT_1_1 +265 0x5333 //RX_FDDRC_SLANT_1_2 +266 0x5333 //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +286 0x001C //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 +#VOL 3 +163 0x5000 //RX_TDDRC_ALPHA_UP_1 +164 0x5000 //RX_TDDRC_ALPHA_UP_2 +165 0x5000 //RX_TDDRC_ALPHA_UP_3 +166 0x2000 //RX_TDDRC_ALPHA_UP_4 +184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +190 0x7220 //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +269 0x0000 //RX_TDDRC_THRD_0 +270 0x0000 //RX_TDDRC_THRD_1 +271 0x1800 //RX_TDDRC_THRD_2 +272 0x1800 //RX_TDDRC_THRD_3 +273 0x7FFF //RX_TDDRC_SLANT_0 +274 0x7FFF //RX_TDDRC_SLANT_1 +275 0x5000 //RX_TDDRC_ALPHA_UP_0 +276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x199A //RX_TDDRC_HMNC_GAIN +279 0x0001 //RX_TDDRC_SMT_FLAG +280 0x0CCD //RX_TDDRC_SMT_W +281 0x0214 //RX_TDDRC_DRC_GAIN +195 0x0020 //RX_FDEQ_SUBNUM +196 0x6270 //RX_FDEQ_GAIN_0 +197 0x7A70 //RX_FDEQ_GAIN_1 +198 0x7270 //RX_FDEQ_GAIN_2 +199 0x6A70 //RX_FDEQ_GAIN_3 +200 0x645A //RX_FDEQ_GAIN_4 +201 0x5A5E //RX_FDEQ_GAIN_5 +202 0x6E72 //RX_FDEQ_GAIN_6 +203 0x7268 //RX_FDEQ_GAIN_7 +204 0x665A //RX_FDEQ_GAIN_8 +205 0x5A5A //RX_FDEQ_GAIN_9 +206 0x5A64 //RX_FDEQ_GAIN_10 +207 0x6448 //RX_FDEQ_GAIN_11 +208 0x4949 //RX_FDEQ_GAIN_12 +209 0x4848 //RX_FDEQ_GAIN_13 +210 0x4848 //RX_FDEQ_GAIN_14 +211 0x4848 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0202 //RX_FDEQ_BIN_0 +221 0x0203 //RX_FDEQ_BIN_1 +222 0x0303 //RX_FDEQ_BIN_2 +223 0x0304 //RX_FDEQ_BIN_3 +224 0x0405 //RX_FDEQ_BIN_4 +225 0x0506 //RX_FDEQ_BIN_5 +226 0x0708 //RX_FDEQ_BIN_6 +227 0x090A //RX_FDEQ_BIN_7 +228 0x0B0C //RX_FDEQ_BIN_8 +229 0x0D0E //RX_FDEQ_BIN_9 +230 0x1013 //RX_FDEQ_BIN_10 +231 0x1719 //RX_FDEQ_BIN_11 +232 0x1B1E //RX_FDEQ_BIN_12 +233 0x1E1E //RX_FDEQ_BIN_13 +234 0x1E28 //RX_FDEQ_BIN_14 +235 0x284A //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x4000 //RX_FDEQ_RESRV_0 +245 0x0320 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0030 //RX_FDDRC_BAND_MARGIN_1 +248 0x0050 //RX_FDDRC_BAND_MARGIN_2 +249 0x0080 //RX_FDDRC_BAND_MARGIN_3 +250 0x0007 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x5000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x6400 //RX_FDDRC_THRD_3_2 +258 0x6400 //RX_FDDRC_THRD_3_3 +259 0x2000 //RX_FDDRC_SLANT_0_0 +260 0x2000 //RX_FDDRC_SLANT_0_1 +261 0x2000 //RX_FDDRC_SLANT_0_2 +262 0x2000 //RX_FDDRC_SLANT_0_3 +263 0x5333 //RX_FDDRC_SLANT_1_0 +264 0x5333 //RX_FDDRC_SLANT_1_1 +265 0x5333 //RX_FDDRC_SLANT_1_2 +266 0x5333 //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +286 0x002F //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 +#VOL 4 +163 0x5000 //RX_TDDRC_ALPHA_UP_1 +164 0x5000 //RX_TDDRC_ALPHA_UP_2 +165 0x5000 //RX_TDDRC_ALPHA_UP_3 +166 0x2000 //RX_TDDRC_ALPHA_UP_4 +184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +190 0x7220 //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +269 0x0000 //RX_TDDRC_THRD_0 +270 0x0000 //RX_TDDRC_THRD_1 +271 0x1800 //RX_TDDRC_THRD_2 +272 0x1800 //RX_TDDRC_THRD_3 +273 0x7FFF //RX_TDDRC_SLANT_0 +274 0x7FFF //RX_TDDRC_SLANT_1 +275 0x5000 //RX_TDDRC_ALPHA_UP_0 +276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x199A //RX_TDDRC_HMNC_GAIN +279 0x0001 //RX_TDDRC_SMT_FLAG +280 0x0CCD //RX_TDDRC_SMT_W +281 0x0214 //RX_TDDRC_DRC_GAIN +195 0x0020 //RX_FDEQ_SUBNUM +196 0x6270 //RX_FDEQ_GAIN_0 +197 0x7A70 //RX_FDEQ_GAIN_1 +198 0x7270 //RX_FDEQ_GAIN_2 +199 0x6A70 //RX_FDEQ_GAIN_3 +200 0x645A //RX_FDEQ_GAIN_4 +201 0x5A5E //RX_FDEQ_GAIN_5 +202 0x6E72 //RX_FDEQ_GAIN_6 +203 0x7268 //RX_FDEQ_GAIN_7 +204 0x665A //RX_FDEQ_GAIN_8 +205 0x5A5A //RX_FDEQ_GAIN_9 +206 0x5A64 //RX_FDEQ_GAIN_10 +207 0x6448 //RX_FDEQ_GAIN_11 +208 0x4949 //RX_FDEQ_GAIN_12 +209 0x4848 //RX_FDEQ_GAIN_13 +210 0x4848 //RX_FDEQ_GAIN_14 +211 0x4848 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0202 //RX_FDEQ_BIN_0 +221 0x0203 //RX_FDEQ_BIN_1 +222 0x0303 //RX_FDEQ_BIN_2 +223 0x0304 //RX_FDEQ_BIN_3 +224 0x0405 //RX_FDEQ_BIN_4 +225 0x0506 //RX_FDEQ_BIN_5 +226 0x0708 //RX_FDEQ_BIN_6 +227 0x090A //RX_FDEQ_BIN_7 +228 0x0B0C //RX_FDEQ_BIN_8 +229 0x0D0E //RX_FDEQ_BIN_9 +230 0x1013 //RX_FDEQ_BIN_10 +231 0x1719 //RX_FDEQ_BIN_11 +232 0x1B1E //RX_FDEQ_BIN_12 +233 0x1E1E //RX_FDEQ_BIN_13 +234 0x1E28 //RX_FDEQ_BIN_14 +235 0x284A //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x4000 //RX_FDEQ_RESRV_0 +245 0x0320 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0030 //RX_FDDRC_BAND_MARGIN_1 +248 0x0050 //RX_FDDRC_BAND_MARGIN_2 +249 0x0080 //RX_FDDRC_BAND_MARGIN_3 +250 0x0007 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x5000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x6400 //RX_FDDRC_THRD_3_2 +258 0x6400 //RX_FDDRC_THRD_3_3 +259 0x2000 //RX_FDDRC_SLANT_0_0 +260 0x2000 //RX_FDDRC_SLANT_0_1 +261 0x2000 //RX_FDDRC_SLANT_0_2 +262 0x2000 //RX_FDDRC_SLANT_0_3 +263 0x5333 //RX_FDDRC_SLANT_1_0 +264 0x5333 //RX_FDDRC_SLANT_1_1 +265 0x5333 //RX_FDDRC_SLANT_1_2 +266 0x5333 //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +286 0x004F //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 +#VOL 5 +163 0x5000 //RX_TDDRC_ALPHA_UP_1 +164 0x5000 //RX_TDDRC_ALPHA_UP_2 +165 0x5000 //RX_TDDRC_ALPHA_UP_3 +166 0x2000 //RX_TDDRC_ALPHA_UP_4 +184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +190 0x7220 //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +269 0x0000 //RX_TDDRC_THRD_0 +270 0x0000 //RX_TDDRC_THRD_1 +271 0x1800 //RX_TDDRC_THRD_2 +272 0x1800 //RX_TDDRC_THRD_3 +273 0x7FFF //RX_TDDRC_SLANT_0 +274 0x7FFF //RX_TDDRC_SLANT_1 +275 0x5000 //RX_TDDRC_ALPHA_UP_0 +276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x199A //RX_TDDRC_HMNC_GAIN +279 0x0001 //RX_TDDRC_SMT_FLAG +280 0x0CCD //RX_TDDRC_SMT_W +281 0x0214 //RX_TDDRC_DRC_GAIN +195 0x0020 //RX_FDEQ_SUBNUM +196 0x6270 //RX_FDEQ_GAIN_0 +197 0x7A70 //RX_FDEQ_GAIN_1 +198 0x7270 //RX_FDEQ_GAIN_2 +199 0x6A70 //RX_FDEQ_GAIN_3 +200 0x645A //RX_FDEQ_GAIN_4 +201 0x5A5E //RX_FDEQ_GAIN_5 +202 0x6E72 //RX_FDEQ_GAIN_6 +203 0x7268 //RX_FDEQ_GAIN_7 +204 0x665A //RX_FDEQ_GAIN_8 +205 0x5A5A //RX_FDEQ_GAIN_9 +206 0x5A64 //RX_FDEQ_GAIN_10 +207 0x6448 //RX_FDEQ_GAIN_11 +208 0x4949 //RX_FDEQ_GAIN_12 +209 0x4848 //RX_FDEQ_GAIN_13 +210 0x4848 //RX_FDEQ_GAIN_14 +211 0x4848 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0202 //RX_FDEQ_BIN_0 +221 0x0203 //RX_FDEQ_BIN_1 +222 0x0303 //RX_FDEQ_BIN_2 +223 0x0304 //RX_FDEQ_BIN_3 +224 0x0405 //RX_FDEQ_BIN_4 +225 0x0506 //RX_FDEQ_BIN_5 +226 0x0708 //RX_FDEQ_BIN_6 +227 0x090A //RX_FDEQ_BIN_7 +228 0x0B0C //RX_FDEQ_BIN_8 +229 0x0D0E //RX_FDEQ_BIN_9 +230 0x1013 //RX_FDEQ_BIN_10 +231 0x1719 //RX_FDEQ_BIN_11 +232 0x1B1E //RX_FDEQ_BIN_12 +233 0x1E1E //RX_FDEQ_BIN_13 +234 0x1E28 //RX_FDEQ_BIN_14 +235 0x284A //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x4000 //RX_FDEQ_RESRV_0 +245 0x0320 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0030 //RX_FDDRC_BAND_MARGIN_1 +248 0x0050 //RX_FDDRC_BAND_MARGIN_2 +249 0x0080 //RX_FDDRC_BAND_MARGIN_3 +250 0x0007 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x5000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x6400 //RX_FDDRC_THRD_3_2 +258 0x6400 //RX_FDDRC_THRD_3_3 +259 0x2000 //RX_FDDRC_SLANT_0_0 +260 0x2000 //RX_FDDRC_SLANT_0_1 +261 0x2000 //RX_FDDRC_SLANT_0_2 +262 0x2000 //RX_FDDRC_SLANT_0_3 +263 0x5333 //RX_FDDRC_SLANT_1_0 +264 0x5333 //RX_FDDRC_SLANT_1_1 +265 0x5333 //RX_FDDRC_SLANT_1_2 +266 0x5333 //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +286 0x0086 //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 +#VOL 6 +163 0x5000 //RX_TDDRC_ALPHA_UP_1 +164 0x5000 //RX_TDDRC_ALPHA_UP_2 +165 0x5000 //RX_TDDRC_ALPHA_UP_3 +166 0x2000 //RX_TDDRC_ALPHA_UP_4 +184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +190 0x7220 //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +269 0x0000 //RX_TDDRC_THRD_0 +270 0x0000 //RX_TDDRC_THRD_1 +271 0x1800 //RX_TDDRC_THRD_2 +272 0x1800 //RX_TDDRC_THRD_3 +273 0x7FFF //RX_TDDRC_SLANT_0 +274 0x7FFF //RX_TDDRC_SLANT_1 +275 0x5000 //RX_TDDRC_ALPHA_UP_0 +276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x199A //RX_TDDRC_HMNC_GAIN +279 0x0001 //RX_TDDRC_SMT_FLAG +280 0x0CCD //RX_TDDRC_SMT_W +281 0x0214 //RX_TDDRC_DRC_GAIN +195 0x0020 //RX_FDEQ_SUBNUM +196 0x6270 //RX_FDEQ_GAIN_0 +197 0x7A70 //RX_FDEQ_GAIN_1 +198 0x7270 //RX_FDEQ_GAIN_2 +199 0x6A70 //RX_FDEQ_GAIN_3 +200 0x645A //RX_FDEQ_GAIN_4 +201 0x5A5E //RX_FDEQ_GAIN_5 +202 0x6E72 //RX_FDEQ_GAIN_6 +203 0x7268 //RX_FDEQ_GAIN_7 +204 0x665A //RX_FDEQ_GAIN_8 +205 0x5A5A //RX_FDEQ_GAIN_9 +206 0x5A64 //RX_FDEQ_GAIN_10 +207 0x6448 //RX_FDEQ_GAIN_11 +208 0x4949 //RX_FDEQ_GAIN_12 +209 0x4848 //RX_FDEQ_GAIN_13 +210 0x4848 //RX_FDEQ_GAIN_14 +211 0x4848 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0202 //RX_FDEQ_BIN_0 +221 0x0203 //RX_FDEQ_BIN_1 +222 0x0303 //RX_FDEQ_BIN_2 +223 0x0304 //RX_FDEQ_BIN_3 +224 0x0405 //RX_FDEQ_BIN_4 +225 0x0506 //RX_FDEQ_BIN_5 +226 0x0708 //RX_FDEQ_BIN_6 +227 0x090A //RX_FDEQ_BIN_7 +228 0x0B0C //RX_FDEQ_BIN_8 +229 0x0D0E //RX_FDEQ_BIN_9 +230 0x1013 //RX_FDEQ_BIN_10 +231 0x1719 //RX_FDEQ_BIN_11 +232 0x1B1E //RX_FDEQ_BIN_12 +233 0x1E1E //RX_FDEQ_BIN_13 +234 0x1E28 //RX_FDEQ_BIN_14 +235 0x284A //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x4000 //RX_FDEQ_RESRV_0 +245 0x0320 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0030 //RX_FDDRC_BAND_MARGIN_1 +248 0x0050 //RX_FDDRC_BAND_MARGIN_2 +249 0x0080 //RX_FDDRC_BAND_MARGIN_3 +250 0x0007 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x5000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x6400 //RX_FDDRC_THRD_3_2 +258 0x6400 //RX_FDDRC_THRD_3_3 +259 0x2000 //RX_FDDRC_SLANT_0_0 +260 0x2000 //RX_FDDRC_SLANT_0_1 +261 0x2000 //RX_FDDRC_SLANT_0_2 +262 0x2000 //RX_FDDRC_SLANT_0_3 +263 0x5333 //RX_FDDRC_SLANT_1_0 +264 0x5333 //RX_FDDRC_SLANT_1_1 +265 0x5333 //RX_FDDRC_SLANT_1_2 +266 0x5333 //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +286 0x0100 //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 #CASE_NAME HEADSET-USB_BLACKBIRD-VOICE_GENERIC-FB -#PARAM_MODE FULL -#PARAM_TYPE TX+RX -#TOTAL_CUSTOM_STEP 7 +#PARAM_MODE Full +#PARAM_TYPE TX+2RX +#TOTAL_CUSTOM_STEP 7+7 #TX 0 0x0009 //TX_OPERATION_MODE_0 1 0x0009 //TX_OPERATION_MODE_1 @@ -5521,10 +8269,10 @@ 248 0xF600 //TX_THR_SN_EST_6 249 0xF600 //TX_THR_SN_EST_7 250 0x0200 //TX_DELTA_THR_SN_EST_0 -251 0x0200 //TX_DELTA_THR_SN_EST_1 -252 0x0400 //TX_DELTA_THR_SN_EST_2 -253 0x0300 //TX_DELTA_THR_SN_EST_3 -254 0x0600 //TX_DELTA_THR_SN_EST_4 +251 0x0400 //TX_DELTA_THR_SN_EST_1 +252 0x0300 //TX_DELTA_THR_SN_EST_2 +253 0x0600 //TX_DELTA_THR_SN_EST_3 +254 0x0200 //TX_DELTA_THR_SN_EST_4 255 0x0200 //TX_DELTA_THR_SN_EST_5 256 0x0200 //TX_DELTA_THR_SN_EST_6 257 0x0200 //TX_DELTA_THR_SN_EST_7 @@ -5552,31 +8300,31 @@ 279 0x2000 //TX_B_POST_FLT_0 280 0x2000 //TX_B_POST_FLT_1 281 0x0012 //TX_NS_LVL_CTRL_0 -282 0x0019 //TX_NS_LVL_CTRL_1 -283 0x0020 //TX_NS_LVL_CTRL_2 -284 0x0016 //TX_NS_LVL_CTRL_3 -285 0x0019 //TX_NS_LVL_CTRL_4 +282 0x0020 //TX_NS_LVL_CTRL_1 +283 0x0016 //TX_NS_LVL_CTRL_2 +284 0x0019 //TX_NS_LVL_CTRL_3 +285 0x0010 //TX_NS_LVL_CTRL_4 286 0x0010 //TX_NS_LVL_CTRL_5 -287 0x0010 //TX_NS_LVL_CTRL_6 +287 0x0019 //TX_NS_LVL_CTRL_6 288 0x0010 //TX_NS_LVL_CTRL_7 289 0x000C //TX_MIN_GAIN_S_0 -290 0x0011 //TX_MIN_GAIN_S_1 +290 0x000C //TX_MIN_GAIN_S_1 291 0x000C //TX_MIN_GAIN_S_2 -292 0x000C //TX_MIN_GAIN_S_3 -293 0x000F //TX_MIN_GAIN_S_4 +292 0x000F //TX_MIN_GAIN_S_3 +293 0x000C //TX_MIN_GAIN_S_4 294 0x000C //TX_MIN_GAIN_S_5 -295 0x000C //TX_MIN_GAIN_S_6 +295 0x0011 //TX_MIN_GAIN_S_6 296 0x000C //TX_MIN_GAIN_S_7 297 0x0800 //TX_NMOS_SUP 298 0x0000 //TX_NS_MAX_PRI_SNR_TH 299 0x0000 //TX_NMOS_SUP_MENSA 300 0x7000 //TX_SNRI_SUP_0 -301 0x6000 //TX_SNRI_SUP_1 -302 0x1000 //TX_SNRI_SUP_2 -303 0x7000 //TX_SNRI_SUP_3 -304 0x6000 //TX_SNRI_SUP_4 +301 0x1000 //TX_SNRI_SUP_1 +302 0x7000 //TX_SNRI_SUP_2 +303 0x6000 //TX_SNRI_SUP_3 +304 0x7FFF //TX_SNRI_SUP_4 305 0x7FFF //TX_SNRI_SUP_5 -306 0x7FFF //TX_SNRI_SUP_6 +306 0x6000 //TX_SNRI_SUP_6 307 0x7FFF //TX_SNRI_SUP_7 308 0x7FFF //TX_THR_LFNS 309 0x0016 //TX_G_LFNS @@ -5593,8 +8341,8 @@ 320 0x6000 //TX_A_POST_FILT_S_6 321 0x6000 //TX_A_POST_FILT_S_7 322 0x2000 //TX_B_POST_FILT_0 -323 0x2000 //TX_B_POST_FILT_1 -324 0x4000 //TX_B_POST_FILT_2 +323 0x4000 //TX_B_POST_FILT_1 +324 0x2000 //TX_B_POST_FILT_2 325 0x2000 //TX_B_POST_FILT_3 326 0x2000 //TX_B_POST_FILT_4 327 0x2000 //TX_B_POST_FILT_5 @@ -5637,7 +8385,7 @@ 364 0x0000 //TX_K_APT 365 0x0001 //TX_NOISEDET 366 0x0190 //TX_NDETCT -367 0x0020 //TX_NOISE_TH_0 +367 0x04E8 //TX_NOISE_TH_0 368 0x7FFF //TX_NOISE_TH_0_2 369 0x7FFF //TX_NOISE_TH_0_3 370 0x02A6 //TX_NOISE_TH_1 @@ -5649,11 +8397,11 @@ 376 0x0001 //TX_NOISE_TH_5_3 377 0x0000 //TX_NOISE_TH_5_4 378 0x02BC //TX_NOISE_TH_6 -379 0x0020 //TX_MINENOISE_TH -380 0x4000 //TX_MINENOISE_MIC0_TH_MTS -381 0xFFEE //TX_MINENOISE_MIC0_TH_EXP -382 0x6000 //TX_MINENOISE_MIC0_S_TH_MTS -383 0xFFF3 //TX_MINENOISE_MIC0_S_TH_EXP +379 0x02BC //TX_MINENOISE_TH +380 0xD508 //TX_MORENS_TFMASK_TH +381 0x0001 //TX_DRC_QUIET_FLOOR +382 0x3A98 //TX_RATIODTL_CUT_TH +383 0x1482 //TX_DT_CUT_K1 384 0x0666 //TX_OUT_ENER_S_TH_CLEAN 385 0x0666 //TX_OUT_ENER_S_TH_LESSCLEAN 386 0x0333 //TX_OUT_ENER_S_TH_NOISY @@ -5661,22 +8409,22 @@ 388 0x0333 //TX_OUT_ENER_TH_SPEECH 389 0x2000 //TX_SN_NPB_GAIN 390 0x0000 //TX_NN_NPB_GAIN -391 0x0000 //TX_CSX_ALPHA_0 -392 0x0000 //TX_CSX_ALPHA_1 -393 0x0000 //TX_CSX_ALPHA_2 -394 0x0000 //TX_CSX_ALPHA_3 -395 0x0800 //TX_MU_ARSP_EST -396 0x00C8 //TX_P_OUTBEAM_MIN_TH +391 0x7FFF //TX_POST_MASK_SUP_HSNE +392 0x1388 //TX_TAIL_DET_TH +393 0x4000 //TX_B_LESSCUT_RTO_WTA +394 0x0000 //TX_MEL_G_R +395 0x0080 //TX_SUPHIGH_TH +396 0x0000 //TX_MASK_G_R 397 0x0002 //TX_EXTRA_NS_L -398 0x0800 //TX_EXTRA_NS_A -399 0x0005 //TX_VR_NOISE_FLOOR_TH +398 0x1800 //TX_C_POST_FLT_MASK +399 0x7FFF //TX_A_POST_FLT_WNS 400 0x0148 //TX_MIN_G_LOW300HZ 401 0x0004 //TX_MAXLEVEL_CNG 402 0x00B4 //TX_STN_NOISE_TH 403 0x4000 //TX_POST_MASK_SUP 404 0x7FFF //TX_POST_MASK_ADJUST 405 0x00C8 //TX_NS_ENOISE_MIC0_TH -406 0x0020 //TX_MINENOISE_MIC0_TH +406 0x04E7 //TX_MINENOISE_MIC0_TH 407 0x012C //TX_MINENOISE_MIC0_S_TH 408 0x2900 //TX_MIN_G_CTRL_SSNS 409 0x0800 //TX_METAL_RTO_THR @@ -5784,16 +8532,16 @@ 511 0x6666 //TX_MIC_TO_BFGAIN 512 0x0000 //TX_MICTOBFGAIN0 513 0x0000 //TX_FASTMUE_TH -514 0x0000 //TX_DERVB_LEN_0 -515 0x0000 //TX_DERVB_LEN_1 -516 0x0000 //TX_RHO_DERVB -517 0x0000 //TX_MIC_INDX_DERVB -518 0x0000 //TX_MU_DERVB -519 0x0000 //TX_DR_RESRV_0 -520 0x0000 //TX_DR_RESRV_1 -521 0x0000 //TX_DR_RESRV_2 -522 0x0000 //TX_DR_RESRV_3 -523 0x0000 //TX_DR_RESRV_4 +514 0xC000 //TX_DEREVERB_LF_MU +515 0xC000 //TX_DEREVERB_HF_MU +516 0xCCCC //TX_DEREVERB_DELAY +517 0xD999 //TX_DEREVERB_COEF_LEN +518 0x1F40 //TX_DEREVERB_DNR +519 0x0000 //TX_DEREVERB_ALPHA +520 0x0000 //TX_DEREVERB_BETA +521 0x0000 //TX_GSC_RTOL_TH +522 0x7000 //TX_GSC_RTOH_TH +523 0x0064 //TX_WIDE2_MEANHTH 524 0x0000 //TX_DR_RESRV_5 525 0x0000 //TX_DR_RESRV_6 526 0x0000 //TX_DR_RESRV_7 @@ -6167,8 +8915,73 @@ 894 0xC000 //TX_FASTNS_SSA_THHFL 895 0xCCCC //TX_FASTNS_SSA_THLFH 896 0xD999 //TX_FASTNS_SSA_THHFH +897 0x2339 //TX_SENDFUNC_REG_MICMUTE +898 0x0021 //TX_SENDFUNC_REG_MICMUTE1 +899 0x02BC //TX_MICMUTE_RATIO_THR +900 0x0140 //TX_MICMUTE_AMP_THR +901 0x0004 //TX_MICMUTE_HPF_IND +902 0x00C0 //TX_MICMUTE_LOG_EYR_TH +903 0x0008 //TX_MICMUTE_CVG_TIME +904 0x0008 //TX_MICMUTE_RELEASE_TIME +905 0x01FE //TX_MIC_VOLUME_MIC0MUTE +906 0x0020 //TX_MICMUTE_EPD_OFFSET_0 +907 0x001E //TX_MICMUTE_FRQ_AEC_L +908 0x7999 //TX_MICMUTE_EAD_THR +909 0x7FFF //TX_MICMUTE_LAMBDA_CB_NLE +910 0x7FFF //TX_MICMUTE_LAMBDA_RE_EST +911 0x4000 //TX_DTD_THR1_MICMUTE_0 +912 0x7000 //TX_DTD_THR1_MICMUTE_1 +913 0x7FFF //TX_DTD_THR1_MICMUTE_2 +914 0x7FFF //TX_DTD_THR1_MICMUTE_3 +915 0x6CCC //TX_DTD_THR2_MICMUTE_0 +916 0x0400 //TX_MICMUTE_MIN_EQ_RE_EST_0 +917 0x0400 //TX_MICMUTE_MIN_EQ_RE_EST_1 +918 0x1000 //TX_MICMUTE_MIN_EQ_RE_EST_2 +919 0x7FFF //TX_MICMUTE_MIN_EQ_RE_EST_3 +920 0x7FFF //TX_MICMUTE_MIN_EQ_RE_EST_4 +921 0x4000 //TX_MICMUTE_C_POST_FLT +922 0x03E8 //TX_MICMUTE_DT_CUT_K +923 0x0001 //TX_MICMUTE_DT_CUT_THR +924 0x03E8 //TX_MICMUTE_DT_CUT_K2 +925 0x0001 //TX_MICMUTE_DT_CUT_THR2 +926 0x0064 //TX_MICMUTE_DT2_HOLD_N +927 0x1000 //TX_MICMUTE_RATIODTH_THCUT +928 0x1000 //TX_MICMUTE_B_POST_FLT_ECHOL +929 0x7FFF //TX_MICMUTE_B_POST_FLT_ECHOH +930 0x0400 //TX_MICMUTE_C_POST_FLT_MASK +931 0x7999 //TX_MICMUTE_RATIODTL_CUT_TH +932 0x0258 //TX_MICMUTE_DT_CUT_K1 +933 0x0800 //TX_MICMUTE_N2_SN_EST +934 0xFC00 //TX_MICMUTE_THR_SN_EST_0 +935 0x001C //TX_MICMUTE_MIN_G_CTRL_0 +936 0x6000 //TX_MICMUTE_A_POST_FILT_S_0 +937 0x7000 //TX_MICMUTE_B_POST_FILT_0 +938 0x2710 //TX_MIC1RUB_AMP_THR +939 0x0010 //TX_MIC1MUTE_RATIO_THR +940 0x0450 //TX_MIC1MUTE_AMP_THR +941 0x0008 //TX_MIC1MUTE_CVG_TIME +942 0x0008 //TX_MIC1MUTE_RELEASE_TIME +943 0x0000 //TX_AMS_RESRV_01 +944 0x0000 //TX_AMS_RESRV_02 +945 0x0000 //TX_AMS_RESRV_03 +946 0x0000 //TX_AMS_RESRV_04 +947 0x0000 //TX_AMS_RESRV_05 +948 0x0000 //TX_AMS_RESRV_06 +949 0x0000 //TX_AMS_RESRV_07 +950 0x0000 //TX_AMS_RESRV_08 +951 0x0000 //TX_AMS_RESRV_09 +952 0x0000 //TX_AMS_RESRV_10 +953 0x0000 //TX_AMS_RESRV_11 +954 0x0000 //TX_AMS_RESRV_12 +955 0x0000 //TX_AMS_RESRV_13 +956 0x0000 //TX_AMS_RESRV_14 +957 0x0000 //TX_AMS_RESRV_15 +958 0x0000 //TX_AMS_RESRV_16 +959 0x0000 //TX_AMS_RESRV_17 +960 0x0000 //TX_AMS_RESRV_18 +961 0x0000 //TX_AMS_RESRV_19 #RX -0 0x042C //RX_RECVFUNC_MODE_0 +0 0x242C //RX_RECVFUNC_MODE_0 1 0x0000 //RX_RECVFUNC_MODE_1 2 0x0004 //RX_SAMPLINGFREQ_SIG 3 0x0004 //RX_SAMPLINGFREQ_PROC @@ -6201,25 +9014,25 @@ 30 0x0002 //RX_EXTRA_NS_L 31 0x0800 //RX_EXTRA_NS_A 32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 -33 0x7FFF //RX_TDDRC_LIMITER_THRD +33 0x7220 //RX_TDDRC_LIMITER_THRD 34 0x0800 //RX_TDDRC_LIMITER_GAIN 35 0x199A //RX_A_POST_FLT 36 0x0000 //RX_LMT_THRD 37 0x4000 //RX_LMT_ALPHA 38 0x0020 //RX_FDEQ_SUBNUM -39 0x4852 //RX_FDEQ_GAIN_0 -40 0x5858 //RX_FDEQ_GAIN_1 -41 0x5C5A //RX_FDEQ_GAIN_2 -42 0x4F50 //RX_FDEQ_GAIN_3 -43 0x5A61 //RX_FDEQ_GAIN_4 -44 0x605B //RX_FDEQ_GAIN_5 -45 0x5050 //RX_FDEQ_GAIN_6 -46 0x5050 //RX_FDEQ_GAIN_7 -47 0x5044 //RX_FDEQ_GAIN_8 -48 0x3633 //RX_FDEQ_GAIN_9 -49 0x3424 //RX_FDEQ_GAIN_10 -50 0x1A24 //RX_FDEQ_GAIN_11 -51 0x2B37 //RX_FDEQ_GAIN_12 +39 0x4858 //RX_FDEQ_GAIN_0 +40 0x6265 //RX_FDEQ_GAIN_1 +41 0x6568 //RX_FDEQ_GAIN_2 +42 0x5654 //RX_FDEQ_GAIN_3 +43 0x676E //RX_FDEQ_GAIN_4 +44 0x6E6B //RX_FDEQ_GAIN_5 +45 0x5B5F //RX_FDEQ_GAIN_6 +46 0x5864 //RX_FDEQ_GAIN_7 +47 0x6548 //RX_FDEQ_GAIN_8 +48 0x4848 //RX_FDEQ_GAIN_9 +49 0x4848 //RX_FDEQ_GAIN_10 +50 0x4848 //RX_FDEQ_GAIN_11 +51 0x4848 //RX_FDEQ_GAIN_12 52 0x4848 //RX_FDEQ_GAIN_13 53 0x4848 //RX_FDEQ_GAIN_14 54 0x4848 //RX_FDEQ_GAIN_15 @@ -6282,22 +9095,22 @@ 111 0x0002 //RX_FILTINDX 112 0x0000 //RX_TDDRC_THRD_0 113 0x0000 //RX_TDDRC_THRD_1 -114 0x1200 //RX_TDDRC_THRD_2 -115 0x1900 //RX_TDDRC_THRD_3 -116 0x3000 //RX_TDDRC_SLANT_0 -117 0x6E00 //RX_TDDRC_SLANT_1 +114 0x1800 //RX_TDDRC_THRD_2 +115 0x1800 //RX_TDDRC_THRD_3 +116 0x7FFF //RX_TDDRC_SLANT_0 +117 0x7FFF //RX_TDDRC_SLANT_1 118 0x1000 //RX_TDDRC_ALPHA_UP_0 119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 120 0x0000 //RX_TDDRC_HMNC_FLAG 121 0x199A //RX_TDDRC_HMNC_GAIN 122 0x0001 //RX_TDDRC_SMT_FLAG 123 0x0CCD //RX_TDDRC_SMT_W -124 0x0240 //RX_TDDRC_DRC_GAIN +124 0x0231 //RX_TDDRC_DRC_GAIN 125 0x7C00 //RX_LAMBDA_PKA_FP 126 0x280A //RX_TPKA_FP 127 0x032D //RX_MIN_G_FP 128 0x0A00 //RX_MAX_G_FP -129 0x000A //RX_SPK_VOL +129 0x000B //RX_SPK_VOL 130 0x0000 //RX_VOL_RESRV_0 131 0x0000 //RX_MAXLEVEL_CNG 132 0x3000 //RX_BWE_UV_TH @@ -7018,11 +9831,862 @@ 110 0x0000 //RX_FDDRC_RESRV_0 129 0x0100 //RX_SPK_VOL 130 0x0000 //RX_VOL_RESRV_0 +#RX 2 +157 0x242C //RX_RECVFUNC_MODE_0 +158 0x0000 //RX_RECVFUNC_MODE_1 +159 0x0004 //RX_SAMPLINGFREQ_SIG +160 0x0004 //RX_SAMPLINGFREQ_PROC +161 0x000A //RX_FRAME_SZ +162 0x0000 //RX_DELAY_OPT +163 0x1000 //RX_TDDRC_ALPHA_UP_1 +164 0x1000 //RX_TDDRC_ALPHA_UP_2 +165 0x1000 //RX_TDDRC_ALPHA_UP_3 +166 0x1000 //RX_TDDRC_ALPHA_UP_4 +167 0x0800 //RX_PGA +168 0x7B02 //RX_A_HP +169 0x4000 //RX_B_PE +170 0x7800 //RX_THR_PITCH_DET_0 +171 0x7000 //RX_THR_PITCH_DET_1 +172 0x6000 //RX_THR_PITCH_DET_2 +173 0x0008 //RX_PITCH_BFR_LEN +174 0x0003 //RX_SBD_PITCH_DET +175 0x0100 //RX_PP_RESRV_0 +176 0x0020 //RX_PP_RESRV_1 +177 0x0500 //RX_N_SN_EST +178 0x000C //RX_N2_SN_EST +179 0x000A //RX_NS_LVL_CTRL +180 0xF600 //RX_THR_SN_EST +181 0x7000 //RX_LAMBDA_PFILT +182 0x000A //RX_FENS_RESRV_0 +183 0x0190 //RX_FENS_RESRV_1 +184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +187 0x0002 //RX_EXTRA_NS_L +188 0x0800 //RX_EXTRA_NS_A +189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +190 0x7220 //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +192 0x199A //RX_A_POST_FLT +193 0x0000 //RX_LMT_THRD +194 0x4000 //RX_LMT_ALPHA +195 0x0020 //RX_FDEQ_SUBNUM +196 0x4858 //RX_FDEQ_GAIN_0 +197 0x6265 //RX_FDEQ_GAIN_1 +198 0x6568 //RX_FDEQ_GAIN_2 +199 0x5654 //RX_FDEQ_GAIN_3 +200 0x676E //RX_FDEQ_GAIN_4 +201 0x6E6B //RX_FDEQ_GAIN_5 +202 0x5B5F //RX_FDEQ_GAIN_6 +203 0x5864 //RX_FDEQ_GAIN_7 +204 0x6548 //RX_FDEQ_GAIN_8 +205 0x4848 //RX_FDEQ_GAIN_9 +206 0x4848 //RX_FDEQ_GAIN_10 +207 0x4848 //RX_FDEQ_GAIN_11 +208 0x4848 //RX_FDEQ_GAIN_12 +209 0x4848 //RX_FDEQ_GAIN_13 +210 0x4848 //RX_FDEQ_GAIN_14 +211 0x4848 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0202 //RX_FDEQ_BIN_0 +221 0x0203 //RX_FDEQ_BIN_1 +222 0x0304 //RX_FDEQ_BIN_2 +223 0x0405 //RX_FDEQ_BIN_3 +224 0x0607 //RX_FDEQ_BIN_4 +225 0x0809 //RX_FDEQ_BIN_5 +226 0x0A0B //RX_FDEQ_BIN_6 +227 0x0C0D //RX_FDEQ_BIN_7 +228 0x0E0F //RX_FDEQ_BIN_8 +229 0x1011 //RX_FDEQ_BIN_9 +230 0x1214 //RX_FDEQ_BIN_10 +231 0x1618 //RX_FDEQ_BIN_11 +232 0x1C1C //RX_FDEQ_BIN_12 +233 0x2020 //RX_FDEQ_BIN_13 +234 0x2020 //RX_FDEQ_BIN_14 +235 0x2011 //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x4000 //RX_FDEQ_RESRV_0 +245 0x0320 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0030 //RX_FDDRC_BAND_MARGIN_1 +248 0x0050 //RX_FDDRC_BAND_MARGIN_2 +249 0x0080 //RX_FDDRC_BAND_MARGIN_3 +250 0x0007 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x5000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x6400 //RX_FDDRC_THRD_3_2 +258 0x6400 //RX_FDDRC_THRD_3_3 +259 0x2000 //RX_FDDRC_SLANT_0_0 +260 0x2000 //RX_FDDRC_SLANT_0_1 +261 0x2000 //RX_FDDRC_SLANT_0_2 +262 0x2000 //RX_FDDRC_SLANT_0_3 +263 0x5333 //RX_FDDRC_SLANT_1_0 +264 0x5333 //RX_FDDRC_SLANT_1_1 +265 0x5333 //RX_FDDRC_SLANT_1_2 +266 0x5333 //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +268 0x0002 //RX_FILTINDX +269 0x0000 //RX_TDDRC_THRD_0 +270 0x0000 //RX_TDDRC_THRD_1 +271 0x1800 //RX_TDDRC_THRD_2 +272 0x1800 //RX_TDDRC_THRD_3 +273 0x7FFF //RX_TDDRC_SLANT_0 +274 0x7FFF //RX_TDDRC_SLANT_1 +275 0x1000 //RX_TDDRC_ALPHA_UP_0 +276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x199A //RX_TDDRC_HMNC_GAIN +279 0x0001 //RX_TDDRC_SMT_FLAG +280 0x0CCD //RX_TDDRC_SMT_W +281 0x0231 //RX_TDDRC_DRC_GAIN +282 0x7C00 //RX_LAMBDA_PKA_FP +283 0x280A //RX_TPKA_FP +284 0x032D //RX_MIN_G_FP +285 0x0A00 //RX_MAX_G_FP +286 0x000B //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 +288 0x0000 //RX_MAXLEVEL_CNG +289 0x3000 //RX_BWE_UV_TH +290 0x3000 //RX_BWE_UV_TH2 +291 0x1800 //RX_BWE_UV_TH3 +292 0x1000 //RX_BWE_V_TH +293 0x04CD //RX_BWE_GAIN1_V_TH1 +294 0x0F33 //RX_BWE_GAIN1_V_TH2 +295 0x7333 //RX_BWE_UV_EQ +296 0x199A //RX_BWE_V_EQ +297 0x7333 //RX_BWE_TONE_TH +298 0x0004 //RX_BWE_UV_HOLD_T +299 0x6CCD //RX_BWE_GAIN2_ALPHA +300 0x799A //RX_BWE_GAIN3_ALPHA +301 0x001E //RX_BWE_CUTOFF +302 0x3000 //RX_BWE_GAINFILL +303 0x3200 //RX_BWE_MAXTH_TONE +304 0x2000 //RX_BWE_EQ_0 +305 0x2000 //RX_BWE_EQ_1 +306 0x2000 //RX_BWE_EQ_2 +307 0x2000 //RX_BWE_EQ_3 +308 0x2000 //RX_BWE_EQ_4 +309 0x2000 //RX_BWE_EQ_5 +310 0x2000 //RX_BWE_EQ_6 +311 0x0000 //RX_BWE_RESRV_0 +312 0x0000 //RX_BWE_RESRV_1 +313 0x0000 //RX_BWE_RESRV_2 +#VOL 0 +163 0x1000 //RX_TDDRC_ALPHA_UP_1 +164 0x1000 //RX_TDDRC_ALPHA_UP_2 +165 0x1000 //RX_TDDRC_ALPHA_UP_3 +166 0x1000 //RX_TDDRC_ALPHA_UP_4 +184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +190 0x7220 //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +269 0x0000 //RX_TDDRC_THRD_0 +270 0x0000 //RX_TDDRC_THRD_1 +271 0x1800 //RX_TDDRC_THRD_2 +272 0x1800 //RX_TDDRC_THRD_3 +273 0x7FFF //RX_TDDRC_SLANT_0 +274 0x7FFF //RX_TDDRC_SLANT_1 +275 0x1000 //RX_TDDRC_ALPHA_UP_0 +276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x199A //RX_TDDRC_HMNC_GAIN +279 0x0001 //RX_TDDRC_SMT_FLAG +280 0x0CCD //RX_TDDRC_SMT_W +281 0x0231 //RX_TDDRC_DRC_GAIN +195 0x0020 //RX_FDEQ_SUBNUM +196 0x4858 //RX_FDEQ_GAIN_0 +197 0x6265 //RX_FDEQ_GAIN_1 +198 0x6568 //RX_FDEQ_GAIN_2 +199 0x5654 //RX_FDEQ_GAIN_3 +200 0x676E //RX_FDEQ_GAIN_4 +201 0x6E6B //RX_FDEQ_GAIN_5 +202 0x5B5F //RX_FDEQ_GAIN_6 +203 0x5864 //RX_FDEQ_GAIN_7 +204 0x6548 //RX_FDEQ_GAIN_8 +205 0x4848 //RX_FDEQ_GAIN_9 +206 0x4848 //RX_FDEQ_GAIN_10 +207 0x4848 //RX_FDEQ_GAIN_11 +208 0x4848 //RX_FDEQ_GAIN_12 +209 0x4848 //RX_FDEQ_GAIN_13 +210 0x4848 //RX_FDEQ_GAIN_14 +211 0x4848 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0202 //RX_FDEQ_BIN_0 +221 0x0203 //RX_FDEQ_BIN_1 +222 0x0304 //RX_FDEQ_BIN_2 +223 0x0405 //RX_FDEQ_BIN_3 +224 0x0607 //RX_FDEQ_BIN_4 +225 0x0809 //RX_FDEQ_BIN_5 +226 0x0A0B //RX_FDEQ_BIN_6 +227 0x0C0D //RX_FDEQ_BIN_7 +228 0x0E0F //RX_FDEQ_BIN_8 +229 0x1011 //RX_FDEQ_BIN_9 +230 0x1214 //RX_FDEQ_BIN_10 +231 0x1618 //RX_FDEQ_BIN_11 +232 0x1C1C //RX_FDEQ_BIN_12 +233 0x2020 //RX_FDEQ_BIN_13 +234 0x2020 //RX_FDEQ_BIN_14 +235 0x2011 //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x4000 //RX_FDEQ_RESRV_0 +245 0x0320 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0030 //RX_FDDRC_BAND_MARGIN_1 +248 0x0050 //RX_FDDRC_BAND_MARGIN_2 +249 0x0080 //RX_FDDRC_BAND_MARGIN_3 +250 0x0007 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x5000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x6400 //RX_FDDRC_THRD_3_2 +258 0x6400 //RX_FDDRC_THRD_3_3 +259 0x2000 //RX_FDDRC_SLANT_0_0 +260 0x2000 //RX_FDDRC_SLANT_0_1 +261 0x2000 //RX_FDDRC_SLANT_0_2 +262 0x2000 //RX_FDDRC_SLANT_0_3 +263 0x5333 //RX_FDDRC_SLANT_1_0 +264 0x5333 //RX_FDDRC_SLANT_1_1 +265 0x5333 //RX_FDDRC_SLANT_1_2 +266 0x5333 //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +286 0x000B //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 +#VOL 1 +163 0x1000 //RX_TDDRC_ALPHA_UP_1 +164 0x1000 //RX_TDDRC_ALPHA_UP_2 +165 0x1000 //RX_TDDRC_ALPHA_UP_3 +166 0x1000 //RX_TDDRC_ALPHA_UP_4 +184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +190 0x7220 //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +269 0x0000 //RX_TDDRC_THRD_0 +270 0x0000 //RX_TDDRC_THRD_1 +271 0x1800 //RX_TDDRC_THRD_2 +272 0x1800 //RX_TDDRC_THRD_3 +273 0x7FFF //RX_TDDRC_SLANT_0 +274 0x7FFF //RX_TDDRC_SLANT_1 +275 0x1000 //RX_TDDRC_ALPHA_UP_0 +276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x199A //RX_TDDRC_HMNC_GAIN +279 0x0001 //RX_TDDRC_SMT_FLAG +280 0x0CCD //RX_TDDRC_SMT_W +281 0x0231 //RX_TDDRC_DRC_GAIN +195 0x0020 //RX_FDEQ_SUBNUM +196 0x4858 //RX_FDEQ_GAIN_0 +197 0x6265 //RX_FDEQ_GAIN_1 +198 0x6568 //RX_FDEQ_GAIN_2 +199 0x5654 //RX_FDEQ_GAIN_3 +200 0x676E //RX_FDEQ_GAIN_4 +201 0x6E6B //RX_FDEQ_GAIN_5 +202 0x5B5F //RX_FDEQ_GAIN_6 +203 0x5864 //RX_FDEQ_GAIN_7 +204 0x6548 //RX_FDEQ_GAIN_8 +205 0x4848 //RX_FDEQ_GAIN_9 +206 0x4848 //RX_FDEQ_GAIN_10 +207 0x4848 //RX_FDEQ_GAIN_11 +208 0x4848 //RX_FDEQ_GAIN_12 +209 0x4848 //RX_FDEQ_GAIN_13 +210 0x4848 //RX_FDEQ_GAIN_14 +211 0x4848 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0202 //RX_FDEQ_BIN_0 +221 0x0203 //RX_FDEQ_BIN_1 +222 0x0304 //RX_FDEQ_BIN_2 +223 0x0405 //RX_FDEQ_BIN_3 +224 0x0607 //RX_FDEQ_BIN_4 +225 0x0809 //RX_FDEQ_BIN_5 +226 0x0A0B //RX_FDEQ_BIN_6 +227 0x0C0D //RX_FDEQ_BIN_7 +228 0x0E0F //RX_FDEQ_BIN_8 +229 0x1011 //RX_FDEQ_BIN_9 +230 0x1214 //RX_FDEQ_BIN_10 +231 0x1618 //RX_FDEQ_BIN_11 +232 0x1C1C //RX_FDEQ_BIN_12 +233 0x2020 //RX_FDEQ_BIN_13 +234 0x2020 //RX_FDEQ_BIN_14 +235 0x2011 //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x4000 //RX_FDEQ_RESRV_0 +245 0x0320 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0030 //RX_FDDRC_BAND_MARGIN_1 +248 0x0050 //RX_FDDRC_BAND_MARGIN_2 +249 0x0080 //RX_FDDRC_BAND_MARGIN_3 +250 0x0007 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x5000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x6400 //RX_FDDRC_THRD_3_2 +258 0x6400 //RX_FDDRC_THRD_3_3 +259 0x2000 //RX_FDDRC_SLANT_0_0 +260 0x2000 //RX_FDDRC_SLANT_0_1 +261 0x2000 //RX_FDDRC_SLANT_0_2 +262 0x2000 //RX_FDDRC_SLANT_0_3 +263 0x5333 //RX_FDDRC_SLANT_1_0 +264 0x5333 //RX_FDDRC_SLANT_1_1 +265 0x5333 //RX_FDDRC_SLANT_1_2 +266 0x5333 //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +286 0x0012 //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 +#VOL 2 +163 0x1000 //RX_TDDRC_ALPHA_UP_1 +164 0x1000 //RX_TDDRC_ALPHA_UP_2 +165 0x1000 //RX_TDDRC_ALPHA_UP_3 +166 0x1000 //RX_TDDRC_ALPHA_UP_4 +184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +190 0x7220 //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +269 0x0000 //RX_TDDRC_THRD_0 +270 0x0000 //RX_TDDRC_THRD_1 +271 0x1800 //RX_TDDRC_THRD_2 +272 0x1800 //RX_TDDRC_THRD_3 +273 0x7FFF //RX_TDDRC_SLANT_0 +274 0x7FFF //RX_TDDRC_SLANT_1 +275 0x1000 //RX_TDDRC_ALPHA_UP_0 +276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x199A //RX_TDDRC_HMNC_GAIN +279 0x0001 //RX_TDDRC_SMT_FLAG +280 0x0CCD //RX_TDDRC_SMT_W +281 0x0231 //RX_TDDRC_DRC_GAIN +195 0x0020 //RX_FDEQ_SUBNUM +196 0x4858 //RX_FDEQ_GAIN_0 +197 0x6265 //RX_FDEQ_GAIN_1 +198 0x6568 //RX_FDEQ_GAIN_2 +199 0x5654 //RX_FDEQ_GAIN_3 +200 0x676E //RX_FDEQ_GAIN_4 +201 0x6E6B //RX_FDEQ_GAIN_5 +202 0x5B5F //RX_FDEQ_GAIN_6 +203 0x5864 //RX_FDEQ_GAIN_7 +204 0x6548 //RX_FDEQ_GAIN_8 +205 0x4848 //RX_FDEQ_GAIN_9 +206 0x4848 //RX_FDEQ_GAIN_10 +207 0x4848 //RX_FDEQ_GAIN_11 +208 0x4848 //RX_FDEQ_GAIN_12 +209 0x4848 //RX_FDEQ_GAIN_13 +210 0x4848 //RX_FDEQ_GAIN_14 +211 0x4848 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0202 //RX_FDEQ_BIN_0 +221 0x0203 //RX_FDEQ_BIN_1 +222 0x0304 //RX_FDEQ_BIN_2 +223 0x0405 //RX_FDEQ_BIN_3 +224 0x0607 //RX_FDEQ_BIN_4 +225 0x0809 //RX_FDEQ_BIN_5 +226 0x0A0B //RX_FDEQ_BIN_6 +227 0x0C0D //RX_FDEQ_BIN_7 +228 0x0E0F //RX_FDEQ_BIN_8 +229 0x1011 //RX_FDEQ_BIN_9 +230 0x1214 //RX_FDEQ_BIN_10 +231 0x1618 //RX_FDEQ_BIN_11 +232 0x1C1C //RX_FDEQ_BIN_12 +233 0x2020 //RX_FDEQ_BIN_13 +234 0x2020 //RX_FDEQ_BIN_14 +235 0x2011 //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x4000 //RX_FDEQ_RESRV_0 +245 0x0320 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0030 //RX_FDDRC_BAND_MARGIN_1 +248 0x0050 //RX_FDDRC_BAND_MARGIN_2 +249 0x0080 //RX_FDDRC_BAND_MARGIN_3 +250 0x0007 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x5000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x6400 //RX_FDDRC_THRD_3_2 +258 0x6400 //RX_FDDRC_THRD_3_3 +259 0x2000 //RX_FDDRC_SLANT_0_0 +260 0x2000 //RX_FDDRC_SLANT_0_1 +261 0x2000 //RX_FDDRC_SLANT_0_2 +262 0x2000 //RX_FDDRC_SLANT_0_3 +263 0x5333 //RX_FDDRC_SLANT_1_0 +264 0x5333 //RX_FDDRC_SLANT_1_1 +265 0x5333 //RX_FDDRC_SLANT_1_2 +266 0x5333 //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +286 0x001F //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 +#VOL 3 +163 0x1000 //RX_TDDRC_ALPHA_UP_1 +164 0x1000 //RX_TDDRC_ALPHA_UP_2 +165 0x1000 //RX_TDDRC_ALPHA_UP_3 +166 0x1000 //RX_TDDRC_ALPHA_UP_4 +184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +190 0x7220 //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +269 0x0000 //RX_TDDRC_THRD_0 +270 0x0000 //RX_TDDRC_THRD_1 +271 0x1800 //RX_TDDRC_THRD_2 +272 0x1800 //RX_TDDRC_THRD_3 +273 0x7FFF //RX_TDDRC_SLANT_0 +274 0x7FFF //RX_TDDRC_SLANT_1 +275 0x1000 //RX_TDDRC_ALPHA_UP_0 +276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x199A //RX_TDDRC_HMNC_GAIN +279 0x0001 //RX_TDDRC_SMT_FLAG +280 0x0CCD //RX_TDDRC_SMT_W +281 0x0231 //RX_TDDRC_DRC_GAIN +195 0x0020 //RX_FDEQ_SUBNUM +196 0x4858 //RX_FDEQ_GAIN_0 +197 0x6265 //RX_FDEQ_GAIN_1 +198 0x6568 //RX_FDEQ_GAIN_2 +199 0x5654 //RX_FDEQ_GAIN_3 +200 0x676E //RX_FDEQ_GAIN_4 +201 0x6E6B //RX_FDEQ_GAIN_5 +202 0x5B5F //RX_FDEQ_GAIN_6 +203 0x5864 //RX_FDEQ_GAIN_7 +204 0x6548 //RX_FDEQ_GAIN_8 +205 0x4848 //RX_FDEQ_GAIN_9 +206 0x4848 //RX_FDEQ_GAIN_10 +207 0x4848 //RX_FDEQ_GAIN_11 +208 0x4848 //RX_FDEQ_GAIN_12 +209 0x4848 //RX_FDEQ_GAIN_13 +210 0x4848 //RX_FDEQ_GAIN_14 +211 0x4848 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0202 //RX_FDEQ_BIN_0 +221 0x0203 //RX_FDEQ_BIN_1 +222 0x0304 //RX_FDEQ_BIN_2 +223 0x0405 //RX_FDEQ_BIN_3 +224 0x0607 //RX_FDEQ_BIN_4 +225 0x0809 //RX_FDEQ_BIN_5 +226 0x0A0B //RX_FDEQ_BIN_6 +227 0x0C0D //RX_FDEQ_BIN_7 +228 0x0E0F //RX_FDEQ_BIN_8 +229 0x1011 //RX_FDEQ_BIN_9 +230 0x1214 //RX_FDEQ_BIN_10 +231 0x1618 //RX_FDEQ_BIN_11 +232 0x1C1C //RX_FDEQ_BIN_12 +233 0x2020 //RX_FDEQ_BIN_13 +234 0x2020 //RX_FDEQ_BIN_14 +235 0x2011 //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x4000 //RX_FDEQ_RESRV_0 +245 0x0320 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0030 //RX_FDDRC_BAND_MARGIN_1 +248 0x0050 //RX_FDDRC_BAND_MARGIN_2 +249 0x0080 //RX_FDDRC_BAND_MARGIN_3 +250 0x0007 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x5000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x6400 //RX_FDDRC_THRD_3_2 +258 0x6400 //RX_FDDRC_THRD_3_3 +259 0x2000 //RX_FDDRC_SLANT_0_0 +260 0x2000 //RX_FDDRC_SLANT_0_1 +261 0x2000 //RX_FDDRC_SLANT_0_2 +262 0x2000 //RX_FDDRC_SLANT_0_3 +263 0x5333 //RX_FDDRC_SLANT_1_0 +264 0x5333 //RX_FDDRC_SLANT_1_1 +265 0x5333 //RX_FDDRC_SLANT_1_2 +266 0x5333 //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +286 0x0034 //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 +#VOL 4 +163 0x1000 //RX_TDDRC_ALPHA_UP_1 +164 0x1000 //RX_TDDRC_ALPHA_UP_2 +165 0x1000 //RX_TDDRC_ALPHA_UP_3 +166 0x1000 //RX_TDDRC_ALPHA_UP_4 +184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +190 0x7220 //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +269 0x0000 //RX_TDDRC_THRD_0 +270 0x0000 //RX_TDDRC_THRD_1 +271 0x1800 //RX_TDDRC_THRD_2 +272 0x1800 //RX_TDDRC_THRD_3 +273 0x7FFF //RX_TDDRC_SLANT_0 +274 0x7FFF //RX_TDDRC_SLANT_1 +275 0x1000 //RX_TDDRC_ALPHA_UP_0 +276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x199A //RX_TDDRC_HMNC_GAIN +279 0x0001 //RX_TDDRC_SMT_FLAG +280 0x0CCD //RX_TDDRC_SMT_W +281 0x0231 //RX_TDDRC_DRC_GAIN +195 0x0020 //RX_FDEQ_SUBNUM +196 0x4858 //RX_FDEQ_GAIN_0 +197 0x6265 //RX_FDEQ_GAIN_1 +198 0x6568 //RX_FDEQ_GAIN_2 +199 0x5654 //RX_FDEQ_GAIN_3 +200 0x676E //RX_FDEQ_GAIN_4 +201 0x6E6B //RX_FDEQ_GAIN_5 +202 0x5B5F //RX_FDEQ_GAIN_6 +203 0x5864 //RX_FDEQ_GAIN_7 +204 0x6548 //RX_FDEQ_GAIN_8 +205 0x4848 //RX_FDEQ_GAIN_9 +206 0x4848 //RX_FDEQ_GAIN_10 +207 0x4848 //RX_FDEQ_GAIN_11 +208 0x4848 //RX_FDEQ_GAIN_12 +209 0x4848 //RX_FDEQ_GAIN_13 +210 0x4848 //RX_FDEQ_GAIN_14 +211 0x4848 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0202 //RX_FDEQ_BIN_0 +221 0x0203 //RX_FDEQ_BIN_1 +222 0x0304 //RX_FDEQ_BIN_2 +223 0x0405 //RX_FDEQ_BIN_3 +224 0x0607 //RX_FDEQ_BIN_4 +225 0x0809 //RX_FDEQ_BIN_5 +226 0x0A0B //RX_FDEQ_BIN_6 +227 0x0C0D //RX_FDEQ_BIN_7 +228 0x0E0F //RX_FDEQ_BIN_8 +229 0x1011 //RX_FDEQ_BIN_9 +230 0x1214 //RX_FDEQ_BIN_10 +231 0x1618 //RX_FDEQ_BIN_11 +232 0x1C1C //RX_FDEQ_BIN_12 +233 0x2020 //RX_FDEQ_BIN_13 +234 0x2020 //RX_FDEQ_BIN_14 +235 0x2011 //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x4000 //RX_FDEQ_RESRV_0 +245 0x0320 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0030 //RX_FDDRC_BAND_MARGIN_1 +248 0x0050 //RX_FDDRC_BAND_MARGIN_2 +249 0x0080 //RX_FDDRC_BAND_MARGIN_3 +250 0x0007 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x5000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x6400 //RX_FDDRC_THRD_3_2 +258 0x6400 //RX_FDDRC_THRD_3_3 +259 0x2000 //RX_FDDRC_SLANT_0_0 +260 0x2000 //RX_FDDRC_SLANT_0_1 +261 0x2000 //RX_FDDRC_SLANT_0_2 +262 0x2000 //RX_FDDRC_SLANT_0_3 +263 0x5333 //RX_FDDRC_SLANT_1_0 +264 0x5333 //RX_FDDRC_SLANT_1_1 +265 0x5333 //RX_FDDRC_SLANT_1_2 +266 0x5333 //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +286 0x0056 //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 +#VOL 5 +163 0x1000 //RX_TDDRC_ALPHA_UP_1 +164 0x1000 //RX_TDDRC_ALPHA_UP_2 +165 0x1000 //RX_TDDRC_ALPHA_UP_3 +166 0x1000 //RX_TDDRC_ALPHA_UP_4 +184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +190 0x7220 //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +269 0x0000 //RX_TDDRC_THRD_0 +270 0x0000 //RX_TDDRC_THRD_1 +271 0x1800 //RX_TDDRC_THRD_2 +272 0x1800 //RX_TDDRC_THRD_3 +273 0x7FFF //RX_TDDRC_SLANT_0 +274 0x7FFF //RX_TDDRC_SLANT_1 +275 0x1000 //RX_TDDRC_ALPHA_UP_0 +276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x199A //RX_TDDRC_HMNC_GAIN +279 0x0001 //RX_TDDRC_SMT_FLAG +280 0x0CCD //RX_TDDRC_SMT_W +281 0x0231 //RX_TDDRC_DRC_GAIN +195 0x0020 //RX_FDEQ_SUBNUM +196 0x4858 //RX_FDEQ_GAIN_0 +197 0x6265 //RX_FDEQ_GAIN_1 +198 0x6568 //RX_FDEQ_GAIN_2 +199 0x5654 //RX_FDEQ_GAIN_3 +200 0x676E //RX_FDEQ_GAIN_4 +201 0x6E6B //RX_FDEQ_GAIN_5 +202 0x5B5F //RX_FDEQ_GAIN_6 +203 0x5864 //RX_FDEQ_GAIN_7 +204 0x6548 //RX_FDEQ_GAIN_8 +205 0x4848 //RX_FDEQ_GAIN_9 +206 0x4848 //RX_FDEQ_GAIN_10 +207 0x4848 //RX_FDEQ_GAIN_11 +208 0x4848 //RX_FDEQ_GAIN_12 +209 0x4848 //RX_FDEQ_GAIN_13 +210 0x4848 //RX_FDEQ_GAIN_14 +211 0x4848 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0202 //RX_FDEQ_BIN_0 +221 0x0203 //RX_FDEQ_BIN_1 +222 0x0304 //RX_FDEQ_BIN_2 +223 0x0405 //RX_FDEQ_BIN_3 +224 0x0607 //RX_FDEQ_BIN_4 +225 0x0809 //RX_FDEQ_BIN_5 +226 0x0A0B //RX_FDEQ_BIN_6 +227 0x0C0D //RX_FDEQ_BIN_7 +228 0x0E0F //RX_FDEQ_BIN_8 +229 0x1011 //RX_FDEQ_BIN_9 +230 0x1214 //RX_FDEQ_BIN_10 +231 0x1618 //RX_FDEQ_BIN_11 +232 0x1C1C //RX_FDEQ_BIN_12 +233 0x2020 //RX_FDEQ_BIN_13 +234 0x2020 //RX_FDEQ_BIN_14 +235 0x2011 //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x4000 //RX_FDEQ_RESRV_0 +245 0x0320 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0030 //RX_FDDRC_BAND_MARGIN_1 +248 0x0050 //RX_FDDRC_BAND_MARGIN_2 +249 0x0080 //RX_FDDRC_BAND_MARGIN_3 +250 0x0007 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x5000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x6400 //RX_FDDRC_THRD_3_2 +258 0x6400 //RX_FDDRC_THRD_3_3 +259 0x2000 //RX_FDDRC_SLANT_0_0 +260 0x2000 //RX_FDDRC_SLANT_0_1 +261 0x2000 //RX_FDDRC_SLANT_0_2 +262 0x2000 //RX_FDDRC_SLANT_0_3 +263 0x5333 //RX_FDDRC_SLANT_1_0 +264 0x5333 //RX_FDDRC_SLANT_1_1 +265 0x5333 //RX_FDDRC_SLANT_1_2 +266 0x5333 //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +286 0x0090 //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 +#VOL 6 +163 0x1000 //RX_TDDRC_ALPHA_UP_1 +164 0x1000 //RX_TDDRC_ALPHA_UP_2 +165 0x1000 //RX_TDDRC_ALPHA_UP_3 +166 0x1000 //RX_TDDRC_ALPHA_UP_4 +184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +190 0x7220 //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +269 0x0000 //RX_TDDRC_THRD_0 +270 0x0000 //RX_TDDRC_THRD_1 +271 0x1800 //RX_TDDRC_THRD_2 +272 0x1800 //RX_TDDRC_THRD_3 +273 0x7FFF //RX_TDDRC_SLANT_0 +274 0x7FFF //RX_TDDRC_SLANT_1 +275 0x1000 //RX_TDDRC_ALPHA_UP_0 +276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x199A //RX_TDDRC_HMNC_GAIN +279 0x0001 //RX_TDDRC_SMT_FLAG +280 0x0CCD //RX_TDDRC_SMT_W +281 0x0231 //RX_TDDRC_DRC_GAIN +195 0x0020 //RX_FDEQ_SUBNUM +196 0x4858 //RX_FDEQ_GAIN_0 +197 0x6265 //RX_FDEQ_GAIN_1 +198 0x6568 //RX_FDEQ_GAIN_2 +199 0x5654 //RX_FDEQ_GAIN_3 +200 0x676E //RX_FDEQ_GAIN_4 +201 0x6E6B //RX_FDEQ_GAIN_5 +202 0x5B5F //RX_FDEQ_GAIN_6 +203 0x5864 //RX_FDEQ_GAIN_7 +204 0x6548 //RX_FDEQ_GAIN_8 +205 0x4848 //RX_FDEQ_GAIN_9 +206 0x4848 //RX_FDEQ_GAIN_10 +207 0x4848 //RX_FDEQ_GAIN_11 +208 0x4848 //RX_FDEQ_GAIN_12 +209 0x4848 //RX_FDEQ_GAIN_13 +210 0x4848 //RX_FDEQ_GAIN_14 +211 0x4848 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0202 //RX_FDEQ_BIN_0 +221 0x0203 //RX_FDEQ_BIN_1 +222 0x0304 //RX_FDEQ_BIN_2 +223 0x0405 //RX_FDEQ_BIN_3 +224 0x0607 //RX_FDEQ_BIN_4 +225 0x0809 //RX_FDEQ_BIN_5 +226 0x0A0B //RX_FDEQ_BIN_6 +227 0x0C0D //RX_FDEQ_BIN_7 +228 0x0E0F //RX_FDEQ_BIN_8 +229 0x1011 //RX_FDEQ_BIN_9 +230 0x1214 //RX_FDEQ_BIN_10 +231 0x1618 //RX_FDEQ_BIN_11 +232 0x1C1C //RX_FDEQ_BIN_12 +233 0x2020 //RX_FDEQ_BIN_13 +234 0x2020 //RX_FDEQ_BIN_14 +235 0x2011 //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x4000 //RX_FDEQ_RESRV_0 +245 0x0320 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0030 //RX_FDDRC_BAND_MARGIN_1 +248 0x0050 //RX_FDDRC_BAND_MARGIN_2 +249 0x0080 //RX_FDDRC_BAND_MARGIN_3 +250 0x0007 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x5000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x6400 //RX_FDDRC_THRD_3_2 +258 0x6400 //RX_FDDRC_THRD_3_3 +259 0x2000 //RX_FDDRC_SLANT_0_0 +260 0x2000 //RX_FDDRC_SLANT_0_1 +261 0x2000 //RX_FDDRC_SLANT_0_2 +262 0x2000 //RX_FDDRC_SLANT_0_3 +263 0x5333 //RX_FDDRC_SLANT_1_0 +264 0x5333 //RX_FDDRC_SLANT_1_1 +265 0x5333 //RX_FDDRC_SLANT_1_2 +266 0x5333 //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +286 0x0100 //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 #CASE_NAME HEADSET-GOOGLE_CONDOR-VOICE_GENERIC-NB -#PARAM_MODE FULL -#PARAM_TYPE TX+RX -#TOTAL_CUSTOM_STEP 7 +#PARAM_MODE Full +#PARAM_TYPE TX+2RX +#TOTAL_CUSTOM_STEP 7+7 #TX 0 0x0009 //TX_OPERATION_MODE_0 1 0x0008 //TX_OPERATION_MODE_1 @@ -7339,20 +11003,20 @@ 312 0x7FFF //TX_A_POST_FILT_0 313 0x2000 //TX_A_POST_FILT_1 314 0x4000 //TX_A_POST_FILT_S_0 -315 0x4000 //TX_A_POST_FILT_S_1 -316 0x1000 //TX_A_POST_FILT_S_2 +315 0x1000 //TX_A_POST_FILT_S_1 +316 0x4000 //TX_A_POST_FILT_S_2 317 0x4000 //TX_A_POST_FILT_S_3 318 0x4000 //TX_A_POST_FILT_S_4 319 0x4000 //TX_A_POST_FILT_S_5 320 0x4000 //TX_A_POST_FILT_S_6 321 0x4000 //TX_A_POST_FILT_S_7 322 0x0400 //TX_B_POST_FILT_0 -323 0x0400 //TX_B_POST_FILT_1 +323 0x2000 //TX_B_POST_FILT_1 324 0x2000 //TX_B_POST_FILT_2 325 0x2000 //TX_B_POST_FILT_3 326 0x2000 //TX_B_POST_FILT_4 327 0x2000 //TX_B_POST_FILT_5 -328 0x2000 //TX_B_POST_FILT_6 +328 0x0400 //TX_B_POST_FILT_6 329 0x2000 //TX_B_POST_FILT_7 330 0x7FFF //TX_B_LESSCUT_RTO_S_0 331 0x7FFF //TX_B_LESSCUT_RTO_S_1 @@ -7391,7 +11055,7 @@ 364 0x0000 //TX_K_APT 365 0x0001 //TX_NOISEDET 366 0x0190 //TX_NDETCT -367 0x000A //TX_NOISE_TH_0 +367 0x003B //TX_NOISE_TH_0 368 0x1B58 //TX_NOISE_TH_0_2 369 0x2134 //TX_NOISE_TH_0_3 370 0x02BC //TX_NOISE_TH_1 @@ -7403,11 +11067,11 @@ 376 0x0000 //TX_NOISE_TH_5_3 377 0x0000 //TX_NOISE_TH_5_4 378 0x0032 //TX_NOISE_TH_6 -379 0x0014 //TX_MINENOISE_TH -380 0x4000 //TX_MINENOISE_MIC0_TH_MTS -381 0xFFEE //TX_MINENOISE_MIC0_TH_EXP -382 0x6000 //TX_MINENOISE_MIC0_S_TH_MTS -383 0xFFF3 //TX_MINENOISE_MIC0_S_TH_EXP +379 0x00C8 //TX_MINENOISE_TH +380 0xD508 //TX_MORENS_TFMASK_TH +381 0x0001 //TX_DRC_QUIET_FLOOR +382 0x3A98 //TX_RATIODTL_CUT_TH +383 0x0DAC //TX_DT_CUT_K1 384 0x00A5 //TX_OUT_ENER_S_TH_CLEAN 385 0x00A5 //TX_OUT_ENER_S_TH_LESSCLEAN 386 0x00A5 //TX_OUT_ENER_S_TH_NOISY @@ -7415,22 +11079,22 @@ 388 0x00CE //TX_OUT_ENER_TH_SPEECH 389 0x2000 //TX_SN_NPB_GAIN 390 0x0000 //TX_NN_NPB_GAIN -391 0x0000 //TX_CSX_ALPHA_0 -392 0x0000 //TX_CSX_ALPHA_1 -393 0x0000 //TX_CSX_ALPHA_2 -394 0x0000 //TX_CSX_ALPHA_3 -395 0x0800 //TX_MU_ARSP_EST -396 0x00C8 //TX_P_OUTBEAM_MIN_TH +391 0x7FFF //TX_POST_MASK_SUP_HSNE +392 0x1388 //TX_TAIL_DET_TH +393 0x4000 //TX_B_LESSCUT_RTO_WTA +394 0x0000 //TX_MEL_G_R +395 0x0080 //TX_SUPHIGH_TH +396 0x0000 //TX_MASK_G_R 397 0x0002 //TX_EXTRA_NS_L -398 0x0800 //TX_EXTRA_NS_A -399 0x0005 //TX_VR_NOISE_FLOOR_TH +398 0x1800 //TX_C_POST_FLT_MASK +399 0x7FFF //TX_A_POST_FLT_WNS 400 0x0148 //TX_MIN_G_LOW300HZ 401 0x0002 //TX_MAXLEVEL_CNG 402 0x00B4 //TX_STN_NOISE_TH 403 0x4000 //TX_POST_MASK_SUP 404 0x7FFF //TX_POST_MASK_ADJUST 405 0x00C8 //TX_NS_ENOISE_MIC0_TH -406 0x0014 //TX_MINENOISE_MIC0_TH +406 0x0032 //TX_MINENOISE_MIC0_TH 407 0x012C //TX_MINENOISE_MIC0_S_TH 408 0x7FFF //TX_MIN_G_CTRL_SSNS 409 0x0000 //TX_METAL_RTO_THR @@ -7538,16 +11202,16 @@ 511 0x6666 //TX_MIC_TO_BFGAIN 512 0x0000 //TX_MICTOBFGAIN0 513 0x0000 //TX_FASTMUE_TH -514 0x0000 //TX_DERVB_LEN_0 -515 0x0000 //TX_DERVB_LEN_1 -516 0x0000 //TX_RHO_DERVB -517 0x0000 //TX_MIC_INDX_DERVB -518 0x0000 //TX_MU_DERVB -519 0x0000 //TX_DR_RESRV_0 -520 0x0000 //TX_DR_RESRV_1 -521 0x0000 //TX_DR_RESRV_2 -522 0x0000 //TX_DR_RESRV_3 -523 0x0000 //TX_DR_RESRV_4 +514 0xC000 //TX_DEREVERB_LF_MU +515 0xC000 //TX_DEREVERB_HF_MU +516 0xCCCC //TX_DEREVERB_DELAY +517 0xD999 //TX_DEREVERB_COEF_LEN +518 0x1F40 //TX_DEREVERB_DNR +519 0x0000 //TX_DEREVERB_ALPHA +520 0x0000 //TX_DEREVERB_BETA +521 0x0000 //TX_GSC_RTOL_TH +522 0x7000 //TX_GSC_RTOH_TH +523 0x0064 //TX_WIDE2_MEANHTH 524 0x0000 //TX_DR_RESRV_5 525 0x0000 //TX_DR_RESRV_6 526 0x0000 //TX_DR_RESRV_7 @@ -7915,14 +11579,79 @@ 888 0x00C8 //TX_FASTNS_ARSPC_TH 889 0xC000 //TX_FASTNS_MASK5_TH 890 0x4848 //TX_POSTSSA_MIN_G_VR_MASK -891 0x7FFF //TX_A_LESSCUT_RTO_MASK +891 0x4000 //TX_A_LESSCUT_RTO_MASK 892 0x1770 //TX_FASTNS_NOISETH 893 0xC000 //TX_FASTNS_SSA_THLFL 894 0xC000 //TX_FASTNS_SSA_THHFL 895 0xCCCC //TX_FASTNS_SSA_THLFH 896 0xD999 //TX_FASTNS_SSA_THHFH +897 0x2339 //TX_SENDFUNC_REG_MICMUTE +898 0x0021 //TX_SENDFUNC_REG_MICMUTE1 +899 0x02BC //TX_MICMUTE_RATIO_THR +900 0x0140 //TX_MICMUTE_AMP_THR +901 0x0004 //TX_MICMUTE_HPF_IND +902 0x00C0 //TX_MICMUTE_LOG_EYR_TH +903 0x0008 //TX_MICMUTE_CVG_TIME +904 0x0008 //TX_MICMUTE_RELEASE_TIME +905 0x01FE //TX_MIC_VOLUME_MIC0MUTE +906 0x0020 //TX_MICMUTE_EPD_OFFSET_0 +907 0x001E //TX_MICMUTE_FRQ_AEC_L +908 0x7999 //TX_MICMUTE_EAD_THR +909 0x7FFF //TX_MICMUTE_LAMBDA_CB_NLE +910 0x7FFF //TX_MICMUTE_LAMBDA_RE_EST +911 0x4000 //TX_DTD_THR1_MICMUTE_0 +912 0x7000 //TX_DTD_THR1_MICMUTE_1 +913 0x7FFF //TX_DTD_THR1_MICMUTE_2 +914 0x7FFF //TX_DTD_THR1_MICMUTE_3 +915 0x6CCC //TX_DTD_THR2_MICMUTE_0 +916 0x0400 //TX_MICMUTE_MIN_EQ_RE_EST_0 +917 0x0400 //TX_MICMUTE_MIN_EQ_RE_EST_1 +918 0x1000 //TX_MICMUTE_MIN_EQ_RE_EST_2 +919 0x7FFF //TX_MICMUTE_MIN_EQ_RE_EST_3 +920 0x7FFF //TX_MICMUTE_MIN_EQ_RE_EST_4 +921 0x4000 //TX_MICMUTE_C_POST_FLT +922 0x03E8 //TX_MICMUTE_DT_CUT_K +923 0x0001 //TX_MICMUTE_DT_CUT_THR +924 0x03E8 //TX_MICMUTE_DT_CUT_K2 +925 0x0001 //TX_MICMUTE_DT_CUT_THR2 +926 0x0064 //TX_MICMUTE_DT2_HOLD_N +927 0x1000 //TX_MICMUTE_RATIODTH_THCUT +928 0x1000 //TX_MICMUTE_B_POST_FLT_ECHOL +929 0x7FFF //TX_MICMUTE_B_POST_FLT_ECHOH +930 0x0400 //TX_MICMUTE_C_POST_FLT_MASK +931 0x7999 //TX_MICMUTE_RATIODTL_CUT_TH +932 0x0258 //TX_MICMUTE_DT_CUT_K1 +933 0x0800 //TX_MICMUTE_N2_SN_EST +934 0xFC00 //TX_MICMUTE_THR_SN_EST_0 +935 0x001C //TX_MICMUTE_MIN_G_CTRL_0 +936 0x6000 //TX_MICMUTE_A_POST_FILT_S_0 +937 0x7000 //TX_MICMUTE_B_POST_FILT_0 +938 0x2710 //TX_MIC1RUB_AMP_THR +939 0x0010 //TX_MIC1MUTE_RATIO_THR +940 0x0450 //TX_MIC1MUTE_AMP_THR +941 0x0008 //TX_MIC1MUTE_CVG_TIME +942 0x0008 //TX_MIC1MUTE_RELEASE_TIME +943 0x0000 //TX_AMS_RESRV_01 +944 0x0000 //TX_AMS_RESRV_02 +945 0x0000 //TX_AMS_RESRV_03 +946 0x0000 //TX_AMS_RESRV_04 +947 0x0000 //TX_AMS_RESRV_05 +948 0x0000 //TX_AMS_RESRV_06 +949 0x0000 //TX_AMS_RESRV_07 +950 0x0000 //TX_AMS_RESRV_08 +951 0x0000 //TX_AMS_RESRV_09 +952 0x0000 //TX_AMS_RESRV_10 +953 0x0000 //TX_AMS_RESRV_11 +954 0x0000 //TX_AMS_RESRV_12 +955 0x0000 //TX_AMS_RESRV_13 +956 0x0000 //TX_AMS_RESRV_14 +957 0x0000 //TX_AMS_RESRV_15 +958 0x0000 //TX_AMS_RESRV_16 +959 0x0000 //TX_AMS_RESRV_17 +960 0x0000 //TX_AMS_RESRV_18 +961 0x0000 //TX_AMS_RESRV_19 #RX -0 0x002C //RX_RECVFUNC_MODE_0 +0 0x202C //RX_RECVFUNC_MODE_0 1 0x0000 //RX_RECVFUNC_MODE_1 2 0x0000 //RX_SAMPLINGFREQ_SIG 3 0x0000 //RX_SAMPLINGFREQ_PROC @@ -8772,11 +12501,862 @@ 110 0x0000 //RX_FDDRC_RESRV_0 129 0x0100 //RX_SPK_VOL 130 0x0000 //RX_VOL_RESRV_0 +#RX 2 +157 0x202C //RX_RECVFUNC_MODE_0 +158 0x0000 //RX_RECVFUNC_MODE_1 +159 0x0000 //RX_SAMPLINGFREQ_SIG +160 0x0000 //RX_SAMPLINGFREQ_PROC +161 0x000A //RX_FRAME_SZ +162 0x0000 //RX_DELAY_OPT +163 0x3000 //RX_TDDRC_ALPHA_UP_1 +164 0x3000 //RX_TDDRC_ALPHA_UP_2 +165 0x3000 //RX_TDDRC_ALPHA_UP_3 +166 0x3000 //RX_TDDRC_ALPHA_UP_4 +167 0x0800 //RX_PGA +168 0x7FFF //RX_A_HP +169 0x0000 //RX_B_PE +170 0x3800 //RX_THR_PITCH_DET_0 +171 0x3000 //RX_THR_PITCH_DET_1 +172 0x2800 //RX_THR_PITCH_DET_2 +173 0x0008 //RX_PITCH_BFR_LEN +174 0x0003 //RX_SBD_PITCH_DET +175 0x0100 //RX_PP_RESRV_0 +176 0x0020 //RX_PP_RESRV_1 +177 0x0600 //RX_N_SN_EST +178 0x000C //RX_N2_SN_EST +179 0x0010 //RX_NS_LVL_CTRL +180 0xF800 //RX_THR_SN_EST +181 0x7CCD //RX_LAMBDA_PFILT +182 0x000A //RX_FENS_RESRV_0 +183 0x0190 //RX_FENS_RESRV_1 +184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +187 0x0002 //RX_EXTRA_NS_L +188 0x0800 //RX_EXTRA_NS_A +189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +190 0x7FFF //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +192 0x199A //RX_A_POST_FLT +193 0x0000 //RX_LMT_THRD +194 0x4000 //RX_LMT_ALPHA +195 0x0014 //RX_FDEQ_SUBNUM +196 0x4848 //RX_FDEQ_GAIN_0 +197 0x4848 //RX_FDEQ_GAIN_1 +198 0x4848 //RX_FDEQ_GAIN_2 +199 0x4848 //RX_FDEQ_GAIN_3 +200 0x4848 //RX_FDEQ_GAIN_4 +201 0x4848 //RX_FDEQ_GAIN_5 +202 0x4848 //RX_FDEQ_GAIN_6 +203 0x4848 //RX_FDEQ_GAIN_7 +204 0x4848 //RX_FDEQ_GAIN_8 +205 0x4848 //RX_FDEQ_GAIN_9 +206 0x4848 //RX_FDEQ_GAIN_10 +207 0x4848 //RX_FDEQ_GAIN_11 +208 0x4848 //RX_FDEQ_GAIN_12 +209 0x4848 //RX_FDEQ_GAIN_13 +210 0x4848 //RX_FDEQ_GAIN_14 +211 0x4848 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0202 //RX_FDEQ_BIN_0 +221 0x0203 //RX_FDEQ_BIN_1 +222 0x0303 //RX_FDEQ_BIN_2 +223 0x0304 //RX_FDEQ_BIN_3 +224 0x0405 //RX_FDEQ_BIN_4 +225 0x0506 //RX_FDEQ_BIN_5 +226 0x0708 //RX_FDEQ_BIN_6 +227 0x090A //RX_FDEQ_BIN_7 +228 0x0B0C //RX_FDEQ_BIN_8 +229 0x0D08 //RX_FDEQ_BIN_9 +230 0x0000 //RX_FDEQ_BIN_10 +231 0x0000 //RX_FDEQ_BIN_11 +232 0x0000 //RX_FDEQ_BIN_12 +233 0x0000 //RX_FDEQ_BIN_13 +234 0x0000 //RX_FDEQ_BIN_14 +235 0x0000 //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x4000 //RX_FDEQ_RESRV_0 +245 0x0320 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0030 //RX_FDDRC_BAND_MARGIN_1 +248 0x0050 //RX_FDDRC_BAND_MARGIN_2 +249 0x0080 //RX_FDDRC_BAND_MARGIN_3 +250 0x0007 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x5000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x6400 //RX_FDDRC_THRD_3_2 +258 0x6400 //RX_FDDRC_THRD_3_3 +259 0x2000 //RX_FDDRC_SLANT_0_0 +260 0x2000 //RX_FDDRC_SLANT_0_1 +261 0x2000 //RX_FDDRC_SLANT_0_2 +262 0x2000 //RX_FDDRC_SLANT_0_3 +263 0x5333 //RX_FDDRC_SLANT_1_0 +264 0x5333 //RX_FDDRC_SLANT_1_1 +265 0x5333 //RX_FDDRC_SLANT_1_2 +266 0x5333 //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +268 0x0002 //RX_FILTINDX +269 0x0000 //RX_TDDRC_THRD_0 +270 0x0000 //RX_TDDRC_THRD_1 +271 0x2000 //RX_TDDRC_THRD_2 +272 0x3000 //RX_TDDRC_THRD_3 +273 0x0800 //RX_TDDRC_SLANT_0 +274 0x7EB8 //RX_TDDRC_SLANT_1 +275 0x3000 //RX_TDDRC_ALPHA_UP_0 +276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x199A //RX_TDDRC_HMNC_GAIN +279 0x0001 //RX_TDDRC_SMT_FLAG +280 0x0CCD //RX_TDDRC_SMT_W +281 0x0200 //RX_TDDRC_DRC_GAIN +282 0x7C00 //RX_LAMBDA_PKA_FP +283 0x2000 //RX_TPKA_FP +284 0x2000 //RX_MIN_G_FP +285 0x0080 //RX_MAX_G_FP +286 0x000B //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 +288 0x0000 //RX_MAXLEVEL_CNG +289 0x3000 //RX_BWE_UV_TH +290 0x3000 //RX_BWE_UV_TH2 +291 0x1800 //RX_BWE_UV_TH3 +292 0x1000 //RX_BWE_V_TH +293 0x04CD //RX_BWE_GAIN1_V_TH1 +294 0x0F33 //RX_BWE_GAIN1_V_TH2 +295 0x7333 //RX_BWE_UV_EQ +296 0x199A //RX_BWE_V_EQ +297 0x7333 //RX_BWE_TONE_TH +298 0x0004 //RX_BWE_UV_HOLD_T +299 0x6CCD //RX_BWE_GAIN2_ALPHA +300 0x799A //RX_BWE_GAIN3_ALPHA +301 0x001E //RX_BWE_CUTOFF +302 0x3000 //RX_BWE_GAINFILL +303 0x3200 //RX_BWE_MAXTH_TONE +304 0x2000 //RX_BWE_EQ_0 +305 0x2000 //RX_BWE_EQ_1 +306 0x2000 //RX_BWE_EQ_2 +307 0x2000 //RX_BWE_EQ_3 +308 0x2000 //RX_BWE_EQ_4 +309 0x2000 //RX_BWE_EQ_5 +310 0x2000 //RX_BWE_EQ_6 +311 0x0000 //RX_BWE_RESRV_0 +312 0x0000 //RX_BWE_RESRV_1 +313 0x0000 //RX_BWE_RESRV_2 +#VOL 0 +163 0x3000 //RX_TDDRC_ALPHA_UP_1 +164 0x3000 //RX_TDDRC_ALPHA_UP_2 +165 0x3000 //RX_TDDRC_ALPHA_UP_3 +166 0x3000 //RX_TDDRC_ALPHA_UP_4 +184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +190 0x7FFF //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +269 0x0000 //RX_TDDRC_THRD_0 +270 0x0000 //RX_TDDRC_THRD_1 +271 0x2000 //RX_TDDRC_THRD_2 +272 0x3000 //RX_TDDRC_THRD_3 +273 0x0800 //RX_TDDRC_SLANT_0 +274 0x7EB8 //RX_TDDRC_SLANT_1 +275 0x3000 //RX_TDDRC_ALPHA_UP_0 +276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x199A //RX_TDDRC_HMNC_GAIN +279 0x0001 //RX_TDDRC_SMT_FLAG +280 0x0CCD //RX_TDDRC_SMT_W +281 0x0200 //RX_TDDRC_DRC_GAIN +195 0x0014 //RX_FDEQ_SUBNUM +196 0x4848 //RX_FDEQ_GAIN_0 +197 0x4848 //RX_FDEQ_GAIN_1 +198 0x4848 //RX_FDEQ_GAIN_2 +199 0x4848 //RX_FDEQ_GAIN_3 +200 0x4848 //RX_FDEQ_GAIN_4 +201 0x4848 //RX_FDEQ_GAIN_5 +202 0x4848 //RX_FDEQ_GAIN_6 +203 0x4848 //RX_FDEQ_GAIN_7 +204 0x4848 //RX_FDEQ_GAIN_8 +205 0x4848 //RX_FDEQ_GAIN_9 +206 0x4848 //RX_FDEQ_GAIN_10 +207 0x4848 //RX_FDEQ_GAIN_11 +208 0x4848 //RX_FDEQ_GAIN_12 +209 0x4848 //RX_FDEQ_GAIN_13 +210 0x4848 //RX_FDEQ_GAIN_14 +211 0x4848 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0202 //RX_FDEQ_BIN_0 +221 0x0203 //RX_FDEQ_BIN_1 +222 0x0303 //RX_FDEQ_BIN_2 +223 0x0304 //RX_FDEQ_BIN_3 +224 0x0405 //RX_FDEQ_BIN_4 +225 0x0506 //RX_FDEQ_BIN_5 +226 0x0708 //RX_FDEQ_BIN_6 +227 0x090A //RX_FDEQ_BIN_7 +228 0x0B0C //RX_FDEQ_BIN_8 +229 0x0D08 //RX_FDEQ_BIN_9 +230 0x0000 //RX_FDEQ_BIN_10 +231 0x0000 //RX_FDEQ_BIN_11 +232 0x0000 //RX_FDEQ_BIN_12 +233 0x0000 //RX_FDEQ_BIN_13 +234 0x0000 //RX_FDEQ_BIN_14 +235 0x0000 //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x4000 //RX_FDEQ_RESRV_0 +245 0x0320 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0030 //RX_FDDRC_BAND_MARGIN_1 +248 0x0050 //RX_FDDRC_BAND_MARGIN_2 +249 0x0080 //RX_FDDRC_BAND_MARGIN_3 +250 0x0007 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x5000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x6400 //RX_FDDRC_THRD_3_2 +258 0x6400 //RX_FDDRC_THRD_3_3 +259 0x2000 //RX_FDDRC_SLANT_0_0 +260 0x2000 //RX_FDDRC_SLANT_0_1 +261 0x2000 //RX_FDDRC_SLANT_0_2 +262 0x2000 //RX_FDDRC_SLANT_0_3 +263 0x5333 //RX_FDDRC_SLANT_1_0 +264 0x5333 //RX_FDDRC_SLANT_1_1 +265 0x5333 //RX_FDDRC_SLANT_1_2 +266 0x5333 //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +286 0x000B //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 +#VOL 1 +163 0x3000 //RX_TDDRC_ALPHA_UP_1 +164 0x3000 //RX_TDDRC_ALPHA_UP_2 +165 0x3000 //RX_TDDRC_ALPHA_UP_3 +166 0x3000 //RX_TDDRC_ALPHA_UP_4 +184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +190 0x7FFF //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +269 0x0000 //RX_TDDRC_THRD_0 +270 0x0000 //RX_TDDRC_THRD_1 +271 0x2000 //RX_TDDRC_THRD_2 +272 0x3000 //RX_TDDRC_THRD_3 +273 0x0800 //RX_TDDRC_SLANT_0 +274 0x7EB8 //RX_TDDRC_SLANT_1 +275 0x3000 //RX_TDDRC_ALPHA_UP_0 +276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x199A //RX_TDDRC_HMNC_GAIN +279 0x0001 //RX_TDDRC_SMT_FLAG +280 0x0CCD //RX_TDDRC_SMT_W +281 0x0200 //RX_TDDRC_DRC_GAIN +195 0x0014 //RX_FDEQ_SUBNUM +196 0x4848 //RX_FDEQ_GAIN_0 +197 0x4848 //RX_FDEQ_GAIN_1 +198 0x4848 //RX_FDEQ_GAIN_2 +199 0x4848 //RX_FDEQ_GAIN_3 +200 0x4848 //RX_FDEQ_GAIN_4 +201 0x4848 //RX_FDEQ_GAIN_5 +202 0x4848 //RX_FDEQ_GAIN_6 +203 0x4848 //RX_FDEQ_GAIN_7 +204 0x4848 //RX_FDEQ_GAIN_8 +205 0x4848 //RX_FDEQ_GAIN_9 +206 0x4848 //RX_FDEQ_GAIN_10 +207 0x4848 //RX_FDEQ_GAIN_11 +208 0x4848 //RX_FDEQ_GAIN_12 +209 0x4848 //RX_FDEQ_GAIN_13 +210 0x4848 //RX_FDEQ_GAIN_14 +211 0x4848 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0202 //RX_FDEQ_BIN_0 +221 0x0203 //RX_FDEQ_BIN_1 +222 0x0303 //RX_FDEQ_BIN_2 +223 0x0304 //RX_FDEQ_BIN_3 +224 0x0405 //RX_FDEQ_BIN_4 +225 0x0506 //RX_FDEQ_BIN_5 +226 0x0708 //RX_FDEQ_BIN_6 +227 0x090A //RX_FDEQ_BIN_7 +228 0x0B0C //RX_FDEQ_BIN_8 +229 0x0D08 //RX_FDEQ_BIN_9 +230 0x0000 //RX_FDEQ_BIN_10 +231 0x0000 //RX_FDEQ_BIN_11 +232 0x0000 //RX_FDEQ_BIN_12 +233 0x0000 //RX_FDEQ_BIN_13 +234 0x0000 //RX_FDEQ_BIN_14 +235 0x0000 //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x4000 //RX_FDEQ_RESRV_0 +245 0x0320 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0030 //RX_FDDRC_BAND_MARGIN_1 +248 0x0050 //RX_FDDRC_BAND_MARGIN_2 +249 0x0080 //RX_FDDRC_BAND_MARGIN_3 +250 0x0007 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x5000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x6400 //RX_FDDRC_THRD_3_2 +258 0x6400 //RX_FDDRC_THRD_3_3 +259 0x2000 //RX_FDDRC_SLANT_0_0 +260 0x2000 //RX_FDDRC_SLANT_0_1 +261 0x2000 //RX_FDDRC_SLANT_0_2 +262 0x2000 //RX_FDDRC_SLANT_0_3 +263 0x5333 //RX_FDDRC_SLANT_1_0 +264 0x5333 //RX_FDDRC_SLANT_1_1 +265 0x5333 //RX_FDDRC_SLANT_1_2 +266 0x5333 //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +286 0x0013 //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 +#VOL 2 +163 0x3000 //RX_TDDRC_ALPHA_UP_1 +164 0x3000 //RX_TDDRC_ALPHA_UP_2 +165 0x3000 //RX_TDDRC_ALPHA_UP_3 +166 0x3000 //RX_TDDRC_ALPHA_UP_4 +184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +190 0x7FFF //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +269 0x0000 //RX_TDDRC_THRD_0 +270 0x0000 //RX_TDDRC_THRD_1 +271 0x2000 //RX_TDDRC_THRD_2 +272 0x3000 //RX_TDDRC_THRD_3 +273 0x0800 //RX_TDDRC_SLANT_0 +274 0x7EB8 //RX_TDDRC_SLANT_1 +275 0x3000 //RX_TDDRC_ALPHA_UP_0 +276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x199A //RX_TDDRC_HMNC_GAIN +279 0x0001 //RX_TDDRC_SMT_FLAG +280 0x0CCD //RX_TDDRC_SMT_W +281 0x0200 //RX_TDDRC_DRC_GAIN +195 0x0014 //RX_FDEQ_SUBNUM +196 0x4848 //RX_FDEQ_GAIN_0 +197 0x4848 //RX_FDEQ_GAIN_1 +198 0x4848 //RX_FDEQ_GAIN_2 +199 0x4848 //RX_FDEQ_GAIN_3 +200 0x4848 //RX_FDEQ_GAIN_4 +201 0x4848 //RX_FDEQ_GAIN_5 +202 0x4848 //RX_FDEQ_GAIN_6 +203 0x4848 //RX_FDEQ_GAIN_7 +204 0x4848 //RX_FDEQ_GAIN_8 +205 0x4848 //RX_FDEQ_GAIN_9 +206 0x4848 //RX_FDEQ_GAIN_10 +207 0x4848 //RX_FDEQ_GAIN_11 +208 0x4848 //RX_FDEQ_GAIN_12 +209 0x4848 //RX_FDEQ_GAIN_13 +210 0x4848 //RX_FDEQ_GAIN_14 +211 0x4848 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0202 //RX_FDEQ_BIN_0 +221 0x0203 //RX_FDEQ_BIN_1 +222 0x0303 //RX_FDEQ_BIN_2 +223 0x0304 //RX_FDEQ_BIN_3 +224 0x0405 //RX_FDEQ_BIN_4 +225 0x0506 //RX_FDEQ_BIN_5 +226 0x0708 //RX_FDEQ_BIN_6 +227 0x090A //RX_FDEQ_BIN_7 +228 0x0B0C //RX_FDEQ_BIN_8 +229 0x0D08 //RX_FDEQ_BIN_9 +230 0x0000 //RX_FDEQ_BIN_10 +231 0x0000 //RX_FDEQ_BIN_11 +232 0x0000 //RX_FDEQ_BIN_12 +233 0x0000 //RX_FDEQ_BIN_13 +234 0x0000 //RX_FDEQ_BIN_14 +235 0x0000 //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x4000 //RX_FDEQ_RESRV_0 +245 0x0320 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0030 //RX_FDDRC_BAND_MARGIN_1 +248 0x0050 //RX_FDDRC_BAND_MARGIN_2 +249 0x0080 //RX_FDDRC_BAND_MARGIN_3 +250 0x0007 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x5000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x6400 //RX_FDDRC_THRD_3_2 +258 0x6400 //RX_FDDRC_THRD_3_3 +259 0x2000 //RX_FDDRC_SLANT_0_0 +260 0x2000 //RX_FDDRC_SLANT_0_1 +261 0x2000 //RX_FDDRC_SLANT_0_2 +262 0x2000 //RX_FDDRC_SLANT_0_3 +263 0x5333 //RX_FDDRC_SLANT_1_0 +264 0x5333 //RX_FDDRC_SLANT_1_1 +265 0x5333 //RX_FDDRC_SLANT_1_2 +266 0x5333 //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +286 0x0020 //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 +#VOL 3 +163 0x3000 //RX_TDDRC_ALPHA_UP_1 +164 0x3000 //RX_TDDRC_ALPHA_UP_2 +165 0x3000 //RX_TDDRC_ALPHA_UP_3 +166 0x3000 //RX_TDDRC_ALPHA_UP_4 +184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +190 0x7FFF //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +269 0x0000 //RX_TDDRC_THRD_0 +270 0x0000 //RX_TDDRC_THRD_1 +271 0x2000 //RX_TDDRC_THRD_2 +272 0x3000 //RX_TDDRC_THRD_3 +273 0x0800 //RX_TDDRC_SLANT_0 +274 0x7EB8 //RX_TDDRC_SLANT_1 +275 0x3000 //RX_TDDRC_ALPHA_UP_0 +276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x199A //RX_TDDRC_HMNC_GAIN +279 0x0001 //RX_TDDRC_SMT_FLAG +280 0x0CCD //RX_TDDRC_SMT_W +281 0x0200 //RX_TDDRC_DRC_GAIN +195 0x0014 //RX_FDEQ_SUBNUM +196 0x4848 //RX_FDEQ_GAIN_0 +197 0x4848 //RX_FDEQ_GAIN_1 +198 0x4848 //RX_FDEQ_GAIN_2 +199 0x4848 //RX_FDEQ_GAIN_3 +200 0x4848 //RX_FDEQ_GAIN_4 +201 0x4848 //RX_FDEQ_GAIN_5 +202 0x4848 //RX_FDEQ_GAIN_6 +203 0x4848 //RX_FDEQ_GAIN_7 +204 0x4848 //RX_FDEQ_GAIN_8 +205 0x4848 //RX_FDEQ_GAIN_9 +206 0x4848 //RX_FDEQ_GAIN_10 +207 0x4848 //RX_FDEQ_GAIN_11 +208 0x4848 //RX_FDEQ_GAIN_12 +209 0x4848 //RX_FDEQ_GAIN_13 +210 0x4848 //RX_FDEQ_GAIN_14 +211 0x4848 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0202 //RX_FDEQ_BIN_0 +221 0x0203 //RX_FDEQ_BIN_1 +222 0x0303 //RX_FDEQ_BIN_2 +223 0x0304 //RX_FDEQ_BIN_3 +224 0x0405 //RX_FDEQ_BIN_4 +225 0x0506 //RX_FDEQ_BIN_5 +226 0x0708 //RX_FDEQ_BIN_6 +227 0x090A //RX_FDEQ_BIN_7 +228 0x0B0C //RX_FDEQ_BIN_8 +229 0x0D08 //RX_FDEQ_BIN_9 +230 0x0000 //RX_FDEQ_BIN_10 +231 0x0000 //RX_FDEQ_BIN_11 +232 0x0000 //RX_FDEQ_BIN_12 +233 0x0000 //RX_FDEQ_BIN_13 +234 0x0000 //RX_FDEQ_BIN_14 +235 0x0000 //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x4000 //RX_FDEQ_RESRV_0 +245 0x0320 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0030 //RX_FDDRC_BAND_MARGIN_1 +248 0x0050 //RX_FDDRC_BAND_MARGIN_2 +249 0x0080 //RX_FDDRC_BAND_MARGIN_3 +250 0x0007 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x5000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x6400 //RX_FDDRC_THRD_3_2 +258 0x6400 //RX_FDDRC_THRD_3_3 +259 0x2000 //RX_FDDRC_SLANT_0_0 +260 0x2000 //RX_FDDRC_SLANT_0_1 +261 0x2000 //RX_FDDRC_SLANT_0_2 +262 0x2000 //RX_FDDRC_SLANT_0_3 +263 0x5333 //RX_FDDRC_SLANT_1_0 +264 0x5333 //RX_FDDRC_SLANT_1_1 +265 0x5333 //RX_FDDRC_SLANT_1_2 +266 0x5333 //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +286 0x0036 //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 +#VOL 4 +163 0x3000 //RX_TDDRC_ALPHA_UP_1 +164 0x3000 //RX_TDDRC_ALPHA_UP_2 +165 0x3000 //RX_TDDRC_ALPHA_UP_3 +166 0x3000 //RX_TDDRC_ALPHA_UP_4 +184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +190 0x7FFF //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +269 0x0000 //RX_TDDRC_THRD_0 +270 0x0000 //RX_TDDRC_THRD_1 +271 0x2000 //RX_TDDRC_THRD_2 +272 0x3000 //RX_TDDRC_THRD_3 +273 0x0800 //RX_TDDRC_SLANT_0 +274 0x7EB8 //RX_TDDRC_SLANT_1 +275 0x3000 //RX_TDDRC_ALPHA_UP_0 +276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x199A //RX_TDDRC_HMNC_GAIN +279 0x0001 //RX_TDDRC_SMT_FLAG +280 0x0CCD //RX_TDDRC_SMT_W +281 0x0200 //RX_TDDRC_DRC_GAIN +195 0x0014 //RX_FDEQ_SUBNUM +196 0x4848 //RX_FDEQ_GAIN_0 +197 0x4848 //RX_FDEQ_GAIN_1 +198 0x4848 //RX_FDEQ_GAIN_2 +199 0x4848 //RX_FDEQ_GAIN_3 +200 0x4848 //RX_FDEQ_GAIN_4 +201 0x4848 //RX_FDEQ_GAIN_5 +202 0x4848 //RX_FDEQ_GAIN_6 +203 0x4848 //RX_FDEQ_GAIN_7 +204 0x4848 //RX_FDEQ_GAIN_8 +205 0x4848 //RX_FDEQ_GAIN_9 +206 0x4848 //RX_FDEQ_GAIN_10 +207 0x4848 //RX_FDEQ_GAIN_11 +208 0x4848 //RX_FDEQ_GAIN_12 +209 0x4848 //RX_FDEQ_GAIN_13 +210 0x4848 //RX_FDEQ_GAIN_14 +211 0x4848 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0202 //RX_FDEQ_BIN_0 +221 0x0203 //RX_FDEQ_BIN_1 +222 0x0303 //RX_FDEQ_BIN_2 +223 0x0304 //RX_FDEQ_BIN_3 +224 0x0405 //RX_FDEQ_BIN_4 +225 0x0506 //RX_FDEQ_BIN_5 +226 0x0708 //RX_FDEQ_BIN_6 +227 0x090A //RX_FDEQ_BIN_7 +228 0x0B0C //RX_FDEQ_BIN_8 +229 0x0D08 //RX_FDEQ_BIN_9 +230 0x0000 //RX_FDEQ_BIN_10 +231 0x0000 //RX_FDEQ_BIN_11 +232 0x0000 //RX_FDEQ_BIN_12 +233 0x0000 //RX_FDEQ_BIN_13 +234 0x0000 //RX_FDEQ_BIN_14 +235 0x0000 //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x4000 //RX_FDEQ_RESRV_0 +245 0x0320 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0030 //RX_FDDRC_BAND_MARGIN_1 +248 0x0050 //RX_FDDRC_BAND_MARGIN_2 +249 0x0080 //RX_FDDRC_BAND_MARGIN_3 +250 0x0007 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x5000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x6400 //RX_FDDRC_THRD_3_2 +258 0x6400 //RX_FDDRC_THRD_3_3 +259 0x2000 //RX_FDDRC_SLANT_0_0 +260 0x2000 //RX_FDDRC_SLANT_0_1 +261 0x2000 //RX_FDDRC_SLANT_0_2 +262 0x2000 //RX_FDDRC_SLANT_0_3 +263 0x5333 //RX_FDDRC_SLANT_1_0 +264 0x5333 //RX_FDDRC_SLANT_1_1 +265 0x5333 //RX_FDDRC_SLANT_1_2 +266 0x5333 //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +286 0x005B //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 +#VOL 5 +163 0x3000 //RX_TDDRC_ALPHA_UP_1 +164 0x3000 //RX_TDDRC_ALPHA_UP_2 +165 0x3000 //RX_TDDRC_ALPHA_UP_3 +166 0x3000 //RX_TDDRC_ALPHA_UP_4 +184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +190 0x7FFF //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +269 0x0000 //RX_TDDRC_THRD_0 +270 0x0000 //RX_TDDRC_THRD_1 +271 0x2000 //RX_TDDRC_THRD_2 +272 0x3000 //RX_TDDRC_THRD_3 +273 0x0800 //RX_TDDRC_SLANT_0 +274 0x7EB8 //RX_TDDRC_SLANT_1 +275 0x3000 //RX_TDDRC_ALPHA_UP_0 +276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x199A //RX_TDDRC_HMNC_GAIN +279 0x0001 //RX_TDDRC_SMT_FLAG +280 0x0CCD //RX_TDDRC_SMT_W +281 0x0200 //RX_TDDRC_DRC_GAIN +195 0x0014 //RX_FDEQ_SUBNUM +196 0x4848 //RX_FDEQ_GAIN_0 +197 0x4848 //RX_FDEQ_GAIN_1 +198 0x4848 //RX_FDEQ_GAIN_2 +199 0x4848 //RX_FDEQ_GAIN_3 +200 0x4848 //RX_FDEQ_GAIN_4 +201 0x4848 //RX_FDEQ_GAIN_5 +202 0x4848 //RX_FDEQ_GAIN_6 +203 0x4848 //RX_FDEQ_GAIN_7 +204 0x4848 //RX_FDEQ_GAIN_8 +205 0x4848 //RX_FDEQ_GAIN_9 +206 0x4848 //RX_FDEQ_GAIN_10 +207 0x4848 //RX_FDEQ_GAIN_11 +208 0x4848 //RX_FDEQ_GAIN_12 +209 0x4848 //RX_FDEQ_GAIN_13 +210 0x4848 //RX_FDEQ_GAIN_14 +211 0x4848 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0202 //RX_FDEQ_BIN_0 +221 0x0203 //RX_FDEQ_BIN_1 +222 0x0303 //RX_FDEQ_BIN_2 +223 0x0304 //RX_FDEQ_BIN_3 +224 0x0405 //RX_FDEQ_BIN_4 +225 0x0506 //RX_FDEQ_BIN_5 +226 0x0708 //RX_FDEQ_BIN_6 +227 0x090A //RX_FDEQ_BIN_7 +228 0x0B0C //RX_FDEQ_BIN_8 +229 0x0D08 //RX_FDEQ_BIN_9 +230 0x0000 //RX_FDEQ_BIN_10 +231 0x0000 //RX_FDEQ_BIN_11 +232 0x0000 //RX_FDEQ_BIN_12 +233 0x0000 //RX_FDEQ_BIN_13 +234 0x0000 //RX_FDEQ_BIN_14 +235 0x0000 //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x4000 //RX_FDEQ_RESRV_0 +245 0x0320 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0030 //RX_FDDRC_BAND_MARGIN_1 +248 0x0050 //RX_FDDRC_BAND_MARGIN_2 +249 0x0080 //RX_FDDRC_BAND_MARGIN_3 +250 0x0007 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x5000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x6400 //RX_FDDRC_THRD_3_2 +258 0x6400 //RX_FDDRC_THRD_3_3 +259 0x2000 //RX_FDDRC_SLANT_0_0 +260 0x2000 //RX_FDDRC_SLANT_0_1 +261 0x2000 //RX_FDDRC_SLANT_0_2 +262 0x2000 //RX_FDDRC_SLANT_0_3 +263 0x5333 //RX_FDDRC_SLANT_1_0 +264 0x5333 //RX_FDDRC_SLANT_1_1 +265 0x5333 //RX_FDDRC_SLANT_1_2 +266 0x5333 //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +286 0x0099 //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 +#VOL 6 +163 0x3000 //RX_TDDRC_ALPHA_UP_1 +164 0x3000 //RX_TDDRC_ALPHA_UP_2 +165 0x3000 //RX_TDDRC_ALPHA_UP_3 +166 0x3000 //RX_TDDRC_ALPHA_UP_4 +184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +190 0x7FFF //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +269 0x0000 //RX_TDDRC_THRD_0 +270 0x0000 //RX_TDDRC_THRD_1 +271 0x2000 //RX_TDDRC_THRD_2 +272 0x3000 //RX_TDDRC_THRD_3 +273 0x0800 //RX_TDDRC_SLANT_0 +274 0x7EB8 //RX_TDDRC_SLANT_1 +275 0x3000 //RX_TDDRC_ALPHA_UP_0 +276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x199A //RX_TDDRC_HMNC_GAIN +279 0x0001 //RX_TDDRC_SMT_FLAG +280 0x0CCD //RX_TDDRC_SMT_W +281 0x0200 //RX_TDDRC_DRC_GAIN +195 0x0014 //RX_FDEQ_SUBNUM +196 0x4848 //RX_FDEQ_GAIN_0 +197 0x4848 //RX_FDEQ_GAIN_1 +198 0x4848 //RX_FDEQ_GAIN_2 +199 0x4848 //RX_FDEQ_GAIN_3 +200 0x4848 //RX_FDEQ_GAIN_4 +201 0x4848 //RX_FDEQ_GAIN_5 +202 0x4848 //RX_FDEQ_GAIN_6 +203 0x4848 //RX_FDEQ_GAIN_7 +204 0x4848 //RX_FDEQ_GAIN_8 +205 0x4848 //RX_FDEQ_GAIN_9 +206 0x4848 //RX_FDEQ_GAIN_10 +207 0x4848 //RX_FDEQ_GAIN_11 +208 0x4848 //RX_FDEQ_GAIN_12 +209 0x4848 //RX_FDEQ_GAIN_13 +210 0x4848 //RX_FDEQ_GAIN_14 +211 0x4848 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0202 //RX_FDEQ_BIN_0 +221 0x0203 //RX_FDEQ_BIN_1 +222 0x0303 //RX_FDEQ_BIN_2 +223 0x0304 //RX_FDEQ_BIN_3 +224 0x0405 //RX_FDEQ_BIN_4 +225 0x0506 //RX_FDEQ_BIN_5 +226 0x0708 //RX_FDEQ_BIN_6 +227 0x090A //RX_FDEQ_BIN_7 +228 0x0B0C //RX_FDEQ_BIN_8 +229 0x0D08 //RX_FDEQ_BIN_9 +230 0x0000 //RX_FDEQ_BIN_10 +231 0x0000 //RX_FDEQ_BIN_11 +232 0x0000 //RX_FDEQ_BIN_12 +233 0x0000 //RX_FDEQ_BIN_13 +234 0x0000 //RX_FDEQ_BIN_14 +235 0x0000 //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x4000 //RX_FDEQ_RESRV_0 +245 0x0320 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0030 //RX_FDDRC_BAND_MARGIN_1 +248 0x0050 //RX_FDDRC_BAND_MARGIN_2 +249 0x0080 //RX_FDDRC_BAND_MARGIN_3 +250 0x0007 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x5000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x6400 //RX_FDDRC_THRD_3_2 +258 0x6400 //RX_FDDRC_THRD_3_3 +259 0x2000 //RX_FDDRC_SLANT_0_0 +260 0x2000 //RX_FDDRC_SLANT_0_1 +261 0x2000 //RX_FDDRC_SLANT_0_2 +262 0x2000 //RX_FDDRC_SLANT_0_3 +263 0x5333 //RX_FDDRC_SLANT_1_0 +264 0x5333 //RX_FDDRC_SLANT_1_1 +265 0x5333 //RX_FDDRC_SLANT_1_2 +266 0x5333 //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +286 0x0100 //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 #CASE_NAME HEADSET-GOOGLE_CONDOR-VOICE_GENERIC-WB -#PARAM_MODE FULL -#PARAM_TYPE TX+RX -#TOTAL_CUSTOM_STEP 7 +#PARAM_MODE Full +#PARAM_TYPE TX+2RX +#TOTAL_CUSTOM_STEP 7+7 #TX 0 0x0009 //TX_OPERATION_MODE_0 1 0x0008 //TX_OPERATION_MODE_1 @@ -9020,7 +13600,7 @@ 239 0x0800 //TX_DT_RESRV_7 240 0x0800 //TX_DT_RESRV_8 241 0x0000 //TX_DT_RESRV_9 -242 0xF400 //TX_THR_SN_EST_0 +242 0xFA00 //TX_THR_SN_EST_0 243 0xF400 //TX_THR_SN_EST_1 244 0xF600 //TX_THR_SN_EST_2 245 0xF400 //TX_THR_SN_EST_3 @@ -9029,20 +13609,20 @@ 248 0xF400 //TX_THR_SN_EST_6 249 0xF600 //TX_THR_SN_EST_7 250 0x0000 //TX_DELTA_THR_SN_EST_0 -251 0x0000 //TX_DELTA_THR_SN_EST_1 +251 0x0200 //TX_DELTA_THR_SN_EST_1 252 0x0200 //TX_DELTA_THR_SN_EST_2 253 0x0200 //TX_DELTA_THR_SN_EST_3 254 0x0200 //TX_DELTA_THR_SN_EST_4 255 0x0200 //TX_DELTA_THR_SN_EST_5 -256 0x0200 //TX_DELTA_THR_SN_EST_6 +256 0x0000 //TX_DELTA_THR_SN_EST_6 257 0x0200 //TX_DELTA_THR_SN_EST_7 258 0x6000 //TX_LAMBDA_NN_EST_0 -259 0x6000 //TX_LAMBDA_NN_EST_1 +259 0x4000 //TX_LAMBDA_NN_EST_1 260 0x4000 //TX_LAMBDA_NN_EST_2 261 0x4000 //TX_LAMBDA_NN_EST_3 262 0x4000 //TX_LAMBDA_NN_EST_4 263 0x4000 //TX_LAMBDA_NN_EST_5 -264 0x4000 //TX_LAMBDA_NN_EST_6 +264 0x6000 //TX_LAMBDA_NN_EST_6 265 0x4000 //TX_LAMBDA_NN_EST_7 266 0x0400 //TX_N_SN_EST 267 0x001E //TX_INBEAM_T @@ -9060,16 +13640,16 @@ 279 0x1000 //TX_B_POST_FLT_0 280 0x1000 //TX_B_POST_FLT_1 281 0x000F //TX_NS_LVL_CTRL_0 -282 0x000F //TX_NS_LVL_CTRL_1 -283 0x0011 //TX_NS_LVL_CTRL_2 +282 0x0011 //TX_NS_LVL_CTRL_1 +283 0x000F //TX_NS_LVL_CTRL_2 284 0x000F //TX_NS_LVL_CTRL_3 285 0x000F //TX_NS_LVL_CTRL_4 286 0x000F //TX_NS_LVL_CTRL_5 287 0x000F //TX_NS_LVL_CTRL_6 288 0x0011 //TX_NS_LVL_CTRL_7 289 0x000C //TX_MIN_GAIN_S_0 -290 0x000C //TX_MIN_GAIN_S_1 -291 0x000F //TX_MIN_GAIN_S_2 +290 0x000F //TX_MIN_GAIN_S_1 +291 0x000C //TX_MIN_GAIN_S_2 292 0x000C //TX_MIN_GAIN_S_3 293 0x000C //TX_MIN_GAIN_S_4 294 0x000C //TX_MIN_GAIN_S_5 @@ -9093,12 +13673,12 @@ 312 0x7FFF //TX_A_POST_FILT_0 313 0x2000 //TX_A_POST_FILT_1 314 0x4000 //TX_A_POST_FILT_S_0 -315 0x4000 //TX_A_POST_FILT_S_1 +315 0x5000 //TX_A_POST_FILT_S_1 316 0x5000 //TX_A_POST_FILT_S_2 317 0x5000 //TX_A_POST_FILT_S_3 318 0x5000 //TX_A_POST_FILT_S_4 319 0x5000 //TX_A_POST_FILT_S_5 -320 0x5000 //TX_A_POST_FILT_S_6 +320 0x4000 //TX_A_POST_FILT_S_6 321 0x5000 //TX_A_POST_FILT_S_7 322 0x1000 //TX_B_POST_FILT_0 323 0x1000 //TX_B_POST_FILT_1 @@ -9145,7 +13725,7 @@ 364 0x0000 //TX_K_APT 365 0x0001 //TX_NOISEDET 366 0x0190 //TX_NDETCT -367 0x0050 //TX_NOISE_TH_0 +367 0x0102 //TX_NOISE_TH_0 368 0x7FFF //TX_NOISE_TH_0_2 369 0x7FFF //TX_NOISE_TH_0_3 370 0x07D0 //TX_NOISE_TH_1 @@ -9157,11 +13737,11 @@ 376 0x7FFF //TX_NOISE_TH_5_3 377 0x7FFF //TX_NOISE_TH_5_4 378 0x044C //TX_NOISE_TH_6 -379 0x0014 //TX_MINENOISE_TH -380 0x4000 //TX_MINENOISE_MIC0_TH_MTS -381 0xFFEE //TX_MINENOISE_MIC0_TH_EXP -382 0x6000 //TX_MINENOISE_MIC0_S_TH_MTS -383 0xFFF3 //TX_MINENOISE_MIC0_S_TH_EXP +379 0x00F8 //TX_MINENOISE_TH +380 0xD508 //TX_MORENS_TFMASK_TH +381 0x0001 //TX_DRC_QUIET_FLOOR +382 0x3A98 //TX_RATIODTL_CUT_TH +383 0x0DAC //TX_DT_CUT_K1 384 0x0666 //TX_OUT_ENER_S_TH_CLEAN 385 0x0666 //TX_OUT_ENER_S_TH_LESSCLEAN 386 0x0333 //TX_OUT_ENER_S_TH_NOISY @@ -9169,22 +13749,22 @@ 388 0x0333 //TX_OUT_ENER_TH_SPEECH 389 0x2000 //TX_SN_NPB_GAIN 390 0x0000 //TX_NN_NPB_GAIN -391 0x0000 //TX_CSX_ALPHA_0 -392 0x0000 //TX_CSX_ALPHA_1 -393 0x0000 //TX_CSX_ALPHA_2 -394 0x0000 //TX_CSX_ALPHA_3 -395 0x0800 //TX_MU_ARSP_EST -396 0x00C8 //TX_P_OUTBEAM_MIN_TH +391 0x7FFF //TX_POST_MASK_SUP_HSNE +392 0x1388 //TX_TAIL_DET_TH +393 0x4000 //TX_B_LESSCUT_RTO_WTA +394 0x0000 //TX_MEL_G_R +395 0x0080 //TX_SUPHIGH_TH +396 0x0000 //TX_MASK_G_R 397 0x0002 //TX_EXTRA_NS_L -398 0x0800 //TX_EXTRA_NS_A -399 0x0005 //TX_VR_NOISE_FLOOR_TH +398 0x1800 //TX_C_POST_FLT_MASK +399 0x7FFF //TX_A_POST_FLT_WNS 400 0x0148 //TX_MIN_G_LOW300HZ 401 0x0002 //TX_MAXLEVEL_CNG 402 0x00B4 //TX_STN_NOISE_TH 403 0x4000 //TX_POST_MASK_SUP 404 0x7FFF //TX_POST_MASK_ADJUST 405 0x00C8 //TX_NS_ENOISE_MIC0_TH -406 0x0014 //TX_MINENOISE_MIC0_TH +406 0x00DC //TX_MINENOISE_MIC0_TH 407 0x012C //TX_MINENOISE_MIC0_S_TH 408 0x7FFF //TX_MIN_G_CTRL_SSNS 409 0x0000 //TX_METAL_RTO_THR @@ -9292,16 +13872,16 @@ 511 0x6666 //TX_MIC_TO_BFGAIN 512 0x0000 //TX_MICTOBFGAIN0 513 0x0000 //TX_FASTMUE_TH -514 0x0000 //TX_DERVB_LEN_0 -515 0x0000 //TX_DERVB_LEN_1 -516 0x0000 //TX_RHO_DERVB -517 0x0000 //TX_MIC_INDX_DERVB -518 0x0000 //TX_MU_DERVB -519 0x0000 //TX_DR_RESRV_0 -520 0x0000 //TX_DR_RESRV_1 -521 0x0000 //TX_DR_RESRV_2 -522 0x0000 //TX_DR_RESRV_3 -523 0x0000 //TX_DR_RESRV_4 +514 0xC000 //TX_DEREVERB_LF_MU +515 0xC000 //TX_DEREVERB_HF_MU +516 0xCCCC //TX_DEREVERB_DELAY +517 0xD999 //TX_DEREVERB_COEF_LEN +518 0x1F40 //TX_DEREVERB_DNR +519 0x0000 //TX_DEREVERB_ALPHA +520 0x0000 //TX_DEREVERB_BETA +521 0x0000 //TX_GSC_RTOL_TH +522 0x7000 //TX_GSC_RTOH_TH +523 0x0064 //TX_WIDE2_MEANHTH 524 0x0000 //TX_DR_RESRV_5 525 0x0000 //TX_DR_RESRV_6 526 0x0000 //TX_DR_RESRV_7 @@ -9669,14 +14249,79 @@ 888 0x00C8 //TX_FASTNS_ARSPC_TH 889 0xC000 //TX_FASTNS_MASK5_TH 890 0x4848 //TX_POSTSSA_MIN_G_VR_MASK -891 0x7FFF //TX_A_LESSCUT_RTO_MASK +891 0x4000 //TX_A_LESSCUT_RTO_MASK 892 0x1770 //TX_FASTNS_NOISETH 893 0xC000 //TX_FASTNS_SSA_THLFL 894 0xC000 //TX_FASTNS_SSA_THHFL 895 0xCCCC //TX_FASTNS_SSA_THLFH 896 0xD999 //TX_FASTNS_SSA_THHFH +897 0x2339 //TX_SENDFUNC_REG_MICMUTE +898 0x0021 //TX_SENDFUNC_REG_MICMUTE1 +899 0x02BC //TX_MICMUTE_RATIO_THR +900 0x0140 //TX_MICMUTE_AMP_THR +901 0x0004 //TX_MICMUTE_HPF_IND +902 0x00C0 //TX_MICMUTE_LOG_EYR_TH +903 0x0008 //TX_MICMUTE_CVG_TIME +904 0x0008 //TX_MICMUTE_RELEASE_TIME +905 0x01FE //TX_MIC_VOLUME_MIC0MUTE +906 0x0020 //TX_MICMUTE_EPD_OFFSET_0 +907 0x001E //TX_MICMUTE_FRQ_AEC_L +908 0x7999 //TX_MICMUTE_EAD_THR +909 0x7FFF //TX_MICMUTE_LAMBDA_CB_NLE +910 0x7FFF //TX_MICMUTE_LAMBDA_RE_EST +911 0x4000 //TX_DTD_THR1_MICMUTE_0 +912 0x7000 //TX_DTD_THR1_MICMUTE_1 +913 0x7FFF //TX_DTD_THR1_MICMUTE_2 +914 0x7FFF //TX_DTD_THR1_MICMUTE_3 +915 0x6CCC //TX_DTD_THR2_MICMUTE_0 +916 0x0400 //TX_MICMUTE_MIN_EQ_RE_EST_0 +917 0x0400 //TX_MICMUTE_MIN_EQ_RE_EST_1 +918 0x1000 //TX_MICMUTE_MIN_EQ_RE_EST_2 +919 0x7FFF //TX_MICMUTE_MIN_EQ_RE_EST_3 +920 0x7FFF //TX_MICMUTE_MIN_EQ_RE_EST_4 +921 0x4000 //TX_MICMUTE_C_POST_FLT +922 0x03E8 //TX_MICMUTE_DT_CUT_K +923 0x0001 //TX_MICMUTE_DT_CUT_THR +924 0x03E8 //TX_MICMUTE_DT_CUT_K2 +925 0x0001 //TX_MICMUTE_DT_CUT_THR2 +926 0x0064 //TX_MICMUTE_DT2_HOLD_N +927 0x1000 //TX_MICMUTE_RATIODTH_THCUT +928 0x1000 //TX_MICMUTE_B_POST_FLT_ECHOL +929 0x7FFF //TX_MICMUTE_B_POST_FLT_ECHOH +930 0x0400 //TX_MICMUTE_C_POST_FLT_MASK +931 0x7999 //TX_MICMUTE_RATIODTL_CUT_TH +932 0x0258 //TX_MICMUTE_DT_CUT_K1 +933 0x0800 //TX_MICMUTE_N2_SN_EST +934 0xFC00 //TX_MICMUTE_THR_SN_EST_0 +935 0x001C //TX_MICMUTE_MIN_G_CTRL_0 +936 0x6000 //TX_MICMUTE_A_POST_FILT_S_0 +937 0x7000 //TX_MICMUTE_B_POST_FILT_0 +938 0x2710 //TX_MIC1RUB_AMP_THR +939 0x0010 //TX_MIC1MUTE_RATIO_THR +940 0x0450 //TX_MIC1MUTE_AMP_THR +941 0x0008 //TX_MIC1MUTE_CVG_TIME +942 0x0008 //TX_MIC1MUTE_RELEASE_TIME +943 0x0000 //TX_AMS_RESRV_01 +944 0x0000 //TX_AMS_RESRV_02 +945 0x0000 //TX_AMS_RESRV_03 +946 0x0000 //TX_AMS_RESRV_04 +947 0x0000 //TX_AMS_RESRV_05 +948 0x0000 //TX_AMS_RESRV_06 +949 0x0000 //TX_AMS_RESRV_07 +950 0x0000 //TX_AMS_RESRV_08 +951 0x0000 //TX_AMS_RESRV_09 +952 0x0000 //TX_AMS_RESRV_10 +953 0x0000 //TX_AMS_RESRV_11 +954 0x0000 //TX_AMS_RESRV_12 +955 0x0000 //TX_AMS_RESRV_13 +956 0x0000 //TX_AMS_RESRV_14 +957 0x0000 //TX_AMS_RESRV_15 +958 0x0000 //TX_AMS_RESRV_16 +959 0x0000 //TX_AMS_RESRV_17 +960 0x0000 //TX_AMS_RESRV_18 +961 0x0000 //TX_AMS_RESRV_19 #RX -0 0x002C //RX_RECVFUNC_MODE_0 +0 0x202C //RX_RECVFUNC_MODE_0 1 0x0000 //RX_RECVFUNC_MODE_1 2 0x0001 //RX_SAMPLINGFREQ_SIG 3 0x0001 //RX_SAMPLINGFREQ_PROC @@ -10526,11 +15171,862 @@ 110 0x0000 //RX_FDDRC_RESRV_0 129 0x0100 //RX_SPK_VOL 130 0x0000 //RX_VOL_RESRV_0 +#RX 2 +157 0x202C //RX_RECVFUNC_MODE_0 +158 0x0000 //RX_RECVFUNC_MODE_1 +159 0x0001 //RX_SAMPLINGFREQ_SIG +160 0x0001 //RX_SAMPLINGFREQ_PROC +161 0x000A //RX_FRAME_SZ +162 0x0000 //RX_DELAY_OPT +163 0x3000 //RX_TDDRC_ALPHA_UP_1 +164 0x3000 //RX_TDDRC_ALPHA_UP_2 +165 0x3000 //RX_TDDRC_ALPHA_UP_3 +166 0x3000 //RX_TDDRC_ALPHA_UP_4 +167 0x0800 //RX_PGA +168 0x7FFF //RX_A_HP +169 0x4000 //RX_B_PE +170 0x3800 //RX_THR_PITCH_DET_0 +171 0x3000 //RX_THR_PITCH_DET_1 +172 0x2800 //RX_THR_PITCH_DET_2 +173 0x0008 //RX_PITCH_BFR_LEN +174 0x0003 //RX_SBD_PITCH_DET +175 0x0100 //RX_PP_RESRV_0 +176 0x0020 //RX_PP_RESRV_1 +177 0x0600 //RX_N_SN_EST +178 0x000C //RX_N2_SN_EST +179 0x0010 //RX_NS_LVL_CTRL +180 0xF800 //RX_THR_SN_EST +181 0x7CCD //RX_LAMBDA_PFILT +182 0x000A //RX_FENS_RESRV_0 +183 0x0190 //RX_FENS_RESRV_1 +184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +187 0x0002 //RX_EXTRA_NS_L +188 0x0800 //RX_EXTRA_NS_A +189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +190 0x7FFF //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +192 0x199A //RX_A_POST_FLT +193 0x0000 //RX_LMT_THRD +194 0x4000 //RX_LMT_ALPHA +195 0x001C //RX_FDEQ_SUBNUM +196 0x4848 //RX_FDEQ_GAIN_0 +197 0x4848 //RX_FDEQ_GAIN_1 +198 0x4848 //RX_FDEQ_GAIN_2 +199 0x4848 //RX_FDEQ_GAIN_3 +200 0x4848 //RX_FDEQ_GAIN_4 +201 0x4848 //RX_FDEQ_GAIN_5 +202 0x4848 //RX_FDEQ_GAIN_6 +203 0x4848 //RX_FDEQ_GAIN_7 +204 0x4848 //RX_FDEQ_GAIN_8 +205 0x4848 //RX_FDEQ_GAIN_9 +206 0x4848 //RX_FDEQ_GAIN_10 +207 0x4848 //RX_FDEQ_GAIN_11 +208 0x4848 //RX_FDEQ_GAIN_12 +209 0x4848 //RX_FDEQ_GAIN_13 +210 0x4848 //RX_FDEQ_GAIN_14 +211 0x4848 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0202 //RX_FDEQ_BIN_0 +221 0x0203 //RX_FDEQ_BIN_1 +222 0x0303 //RX_FDEQ_BIN_2 +223 0x0304 //RX_FDEQ_BIN_3 +224 0x0405 //RX_FDEQ_BIN_4 +225 0x0506 //RX_FDEQ_BIN_5 +226 0x0708 //RX_FDEQ_BIN_6 +227 0x090A //RX_FDEQ_BIN_7 +228 0x0B0C //RX_FDEQ_BIN_8 +229 0x0D0E //RX_FDEQ_BIN_9 +230 0x0E0F //RX_FDEQ_BIN_10 +231 0x0F10 //RX_FDEQ_BIN_11 +232 0x1011 //RX_FDEQ_BIN_12 +233 0x1104 //RX_FDEQ_BIN_13 +234 0x0000 //RX_FDEQ_BIN_14 +235 0x0000 //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x4000 //RX_FDEQ_RESRV_0 +245 0x0320 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0030 //RX_FDDRC_BAND_MARGIN_1 +248 0x0050 //RX_FDDRC_BAND_MARGIN_2 +249 0x0080 //RX_FDDRC_BAND_MARGIN_3 +250 0x0007 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x5000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x6400 //RX_FDDRC_THRD_3_2 +258 0x6400 //RX_FDDRC_THRD_3_3 +259 0x2000 //RX_FDDRC_SLANT_0_0 +260 0x2000 //RX_FDDRC_SLANT_0_1 +261 0x2000 //RX_FDDRC_SLANT_0_2 +262 0x2000 //RX_FDDRC_SLANT_0_3 +263 0x5333 //RX_FDDRC_SLANT_1_0 +264 0x5333 //RX_FDDRC_SLANT_1_1 +265 0x5333 //RX_FDDRC_SLANT_1_2 +266 0x5333 //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +268 0x0002 //RX_FILTINDX +269 0x0000 //RX_TDDRC_THRD_0 +270 0x0000 //RX_TDDRC_THRD_1 +271 0x2000 //RX_TDDRC_THRD_2 +272 0x3000 //RX_TDDRC_THRD_3 +273 0x0800 //RX_TDDRC_SLANT_0 +274 0x7EB8 //RX_TDDRC_SLANT_1 +275 0x3000 //RX_TDDRC_ALPHA_UP_0 +276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x199A //RX_TDDRC_HMNC_GAIN +279 0x0001 //RX_TDDRC_SMT_FLAG +280 0x0CCD //RX_TDDRC_SMT_W +281 0x0196 //RX_TDDRC_DRC_GAIN +282 0x7C00 //RX_LAMBDA_PKA_FP +283 0x2000 //RX_TPKA_FP +284 0x2000 //RX_MIN_G_FP +285 0x0080 //RX_MAX_G_FP +286 0x000B //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 +288 0x0000 //RX_MAXLEVEL_CNG +289 0x3000 //RX_BWE_UV_TH +290 0x3000 //RX_BWE_UV_TH2 +291 0x1800 //RX_BWE_UV_TH3 +292 0x1000 //RX_BWE_V_TH +293 0x04CD //RX_BWE_GAIN1_V_TH1 +294 0x0F33 //RX_BWE_GAIN1_V_TH2 +295 0x7333 //RX_BWE_UV_EQ +296 0x199A //RX_BWE_V_EQ +297 0x7333 //RX_BWE_TONE_TH +298 0x0004 //RX_BWE_UV_HOLD_T +299 0x6CCD //RX_BWE_GAIN2_ALPHA +300 0x799A //RX_BWE_GAIN3_ALPHA +301 0x001E //RX_BWE_CUTOFF +302 0x3000 //RX_BWE_GAINFILL +303 0x3200 //RX_BWE_MAXTH_TONE +304 0x2000 //RX_BWE_EQ_0 +305 0x2000 //RX_BWE_EQ_1 +306 0x2000 //RX_BWE_EQ_2 +307 0x2000 //RX_BWE_EQ_3 +308 0x2000 //RX_BWE_EQ_4 +309 0x2000 //RX_BWE_EQ_5 +310 0x2000 //RX_BWE_EQ_6 +311 0x0000 //RX_BWE_RESRV_0 +312 0x0000 //RX_BWE_RESRV_1 +313 0x0000 //RX_BWE_RESRV_2 +#VOL 0 +163 0x3000 //RX_TDDRC_ALPHA_UP_1 +164 0x3000 //RX_TDDRC_ALPHA_UP_2 +165 0x3000 //RX_TDDRC_ALPHA_UP_3 +166 0x3000 //RX_TDDRC_ALPHA_UP_4 +184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +190 0x7FFF //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +269 0x0000 //RX_TDDRC_THRD_0 +270 0x0000 //RX_TDDRC_THRD_1 +271 0x2000 //RX_TDDRC_THRD_2 +272 0x3000 //RX_TDDRC_THRD_3 +273 0x0800 //RX_TDDRC_SLANT_0 +274 0x7EB8 //RX_TDDRC_SLANT_1 +275 0x3000 //RX_TDDRC_ALPHA_UP_0 +276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x199A //RX_TDDRC_HMNC_GAIN +279 0x0001 //RX_TDDRC_SMT_FLAG +280 0x0CCD //RX_TDDRC_SMT_W +281 0x0196 //RX_TDDRC_DRC_GAIN +195 0x001C //RX_FDEQ_SUBNUM +196 0x4848 //RX_FDEQ_GAIN_0 +197 0x4848 //RX_FDEQ_GAIN_1 +198 0x4848 //RX_FDEQ_GAIN_2 +199 0x4848 //RX_FDEQ_GAIN_3 +200 0x4848 //RX_FDEQ_GAIN_4 +201 0x4848 //RX_FDEQ_GAIN_5 +202 0x4848 //RX_FDEQ_GAIN_6 +203 0x4848 //RX_FDEQ_GAIN_7 +204 0x4848 //RX_FDEQ_GAIN_8 +205 0x4848 //RX_FDEQ_GAIN_9 +206 0x4848 //RX_FDEQ_GAIN_10 +207 0x4848 //RX_FDEQ_GAIN_11 +208 0x4848 //RX_FDEQ_GAIN_12 +209 0x4848 //RX_FDEQ_GAIN_13 +210 0x4848 //RX_FDEQ_GAIN_14 +211 0x4848 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0202 //RX_FDEQ_BIN_0 +221 0x0203 //RX_FDEQ_BIN_1 +222 0x0303 //RX_FDEQ_BIN_2 +223 0x0304 //RX_FDEQ_BIN_3 +224 0x0405 //RX_FDEQ_BIN_4 +225 0x0506 //RX_FDEQ_BIN_5 +226 0x0708 //RX_FDEQ_BIN_6 +227 0x090A //RX_FDEQ_BIN_7 +228 0x0B0C //RX_FDEQ_BIN_8 +229 0x0D0E //RX_FDEQ_BIN_9 +230 0x0E0F //RX_FDEQ_BIN_10 +231 0x0F10 //RX_FDEQ_BIN_11 +232 0x1011 //RX_FDEQ_BIN_12 +233 0x1104 //RX_FDEQ_BIN_13 +234 0x0000 //RX_FDEQ_BIN_14 +235 0x0000 //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x4000 //RX_FDEQ_RESRV_0 +245 0x0320 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0030 //RX_FDDRC_BAND_MARGIN_1 +248 0x0050 //RX_FDDRC_BAND_MARGIN_2 +249 0x0080 //RX_FDDRC_BAND_MARGIN_3 +250 0x0007 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x5000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x6400 //RX_FDDRC_THRD_3_2 +258 0x6400 //RX_FDDRC_THRD_3_3 +259 0x2000 //RX_FDDRC_SLANT_0_0 +260 0x2000 //RX_FDDRC_SLANT_0_1 +261 0x2000 //RX_FDDRC_SLANT_0_2 +262 0x2000 //RX_FDDRC_SLANT_0_3 +263 0x5333 //RX_FDDRC_SLANT_1_0 +264 0x5333 //RX_FDDRC_SLANT_1_1 +265 0x5333 //RX_FDDRC_SLANT_1_2 +266 0x5333 //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +286 0x000B //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 +#VOL 1 +163 0x3000 //RX_TDDRC_ALPHA_UP_1 +164 0x3000 //RX_TDDRC_ALPHA_UP_2 +165 0x3000 //RX_TDDRC_ALPHA_UP_3 +166 0x3000 //RX_TDDRC_ALPHA_UP_4 +184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +190 0x7FFF //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +269 0x0000 //RX_TDDRC_THRD_0 +270 0x0000 //RX_TDDRC_THRD_1 +271 0x2000 //RX_TDDRC_THRD_2 +272 0x3000 //RX_TDDRC_THRD_3 +273 0x0800 //RX_TDDRC_SLANT_0 +274 0x7EB8 //RX_TDDRC_SLANT_1 +275 0x3000 //RX_TDDRC_ALPHA_UP_0 +276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x199A //RX_TDDRC_HMNC_GAIN +279 0x0001 //RX_TDDRC_SMT_FLAG +280 0x0CCD //RX_TDDRC_SMT_W +281 0x0196 //RX_TDDRC_DRC_GAIN +195 0x001C //RX_FDEQ_SUBNUM +196 0x4848 //RX_FDEQ_GAIN_0 +197 0x4848 //RX_FDEQ_GAIN_1 +198 0x4848 //RX_FDEQ_GAIN_2 +199 0x4848 //RX_FDEQ_GAIN_3 +200 0x4848 //RX_FDEQ_GAIN_4 +201 0x4848 //RX_FDEQ_GAIN_5 +202 0x4848 //RX_FDEQ_GAIN_6 +203 0x4848 //RX_FDEQ_GAIN_7 +204 0x4848 //RX_FDEQ_GAIN_8 +205 0x4848 //RX_FDEQ_GAIN_9 +206 0x4848 //RX_FDEQ_GAIN_10 +207 0x4848 //RX_FDEQ_GAIN_11 +208 0x4848 //RX_FDEQ_GAIN_12 +209 0x4848 //RX_FDEQ_GAIN_13 +210 0x4848 //RX_FDEQ_GAIN_14 +211 0x4848 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0202 //RX_FDEQ_BIN_0 +221 0x0203 //RX_FDEQ_BIN_1 +222 0x0303 //RX_FDEQ_BIN_2 +223 0x0304 //RX_FDEQ_BIN_3 +224 0x0405 //RX_FDEQ_BIN_4 +225 0x0506 //RX_FDEQ_BIN_5 +226 0x0708 //RX_FDEQ_BIN_6 +227 0x090A //RX_FDEQ_BIN_7 +228 0x0B0C //RX_FDEQ_BIN_8 +229 0x0D0E //RX_FDEQ_BIN_9 +230 0x0E0F //RX_FDEQ_BIN_10 +231 0x0F10 //RX_FDEQ_BIN_11 +232 0x1011 //RX_FDEQ_BIN_12 +233 0x1104 //RX_FDEQ_BIN_13 +234 0x0000 //RX_FDEQ_BIN_14 +235 0x0000 //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x4000 //RX_FDEQ_RESRV_0 +245 0x0320 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0030 //RX_FDDRC_BAND_MARGIN_1 +248 0x0050 //RX_FDDRC_BAND_MARGIN_2 +249 0x0080 //RX_FDDRC_BAND_MARGIN_3 +250 0x0007 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x5000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x6400 //RX_FDDRC_THRD_3_2 +258 0x6400 //RX_FDDRC_THRD_3_3 +259 0x2000 //RX_FDDRC_SLANT_0_0 +260 0x2000 //RX_FDDRC_SLANT_0_1 +261 0x2000 //RX_FDDRC_SLANT_0_2 +262 0x2000 //RX_FDDRC_SLANT_0_3 +263 0x5333 //RX_FDDRC_SLANT_1_0 +264 0x5333 //RX_FDDRC_SLANT_1_1 +265 0x5333 //RX_FDDRC_SLANT_1_2 +266 0x5333 //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +286 0x0013 //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 +#VOL 2 +163 0x3000 //RX_TDDRC_ALPHA_UP_1 +164 0x3000 //RX_TDDRC_ALPHA_UP_2 +165 0x3000 //RX_TDDRC_ALPHA_UP_3 +166 0x3000 //RX_TDDRC_ALPHA_UP_4 +184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +190 0x7FFF //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +269 0x0000 //RX_TDDRC_THRD_0 +270 0x0000 //RX_TDDRC_THRD_1 +271 0x2000 //RX_TDDRC_THRD_2 +272 0x3000 //RX_TDDRC_THRD_3 +273 0x0800 //RX_TDDRC_SLANT_0 +274 0x7EB8 //RX_TDDRC_SLANT_1 +275 0x3000 //RX_TDDRC_ALPHA_UP_0 +276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x199A //RX_TDDRC_HMNC_GAIN +279 0x0001 //RX_TDDRC_SMT_FLAG +280 0x0CCD //RX_TDDRC_SMT_W +281 0x0196 //RX_TDDRC_DRC_GAIN +195 0x001C //RX_FDEQ_SUBNUM +196 0x4848 //RX_FDEQ_GAIN_0 +197 0x4848 //RX_FDEQ_GAIN_1 +198 0x4848 //RX_FDEQ_GAIN_2 +199 0x4848 //RX_FDEQ_GAIN_3 +200 0x4848 //RX_FDEQ_GAIN_4 +201 0x4848 //RX_FDEQ_GAIN_5 +202 0x4848 //RX_FDEQ_GAIN_6 +203 0x4848 //RX_FDEQ_GAIN_7 +204 0x4848 //RX_FDEQ_GAIN_8 +205 0x4848 //RX_FDEQ_GAIN_9 +206 0x4848 //RX_FDEQ_GAIN_10 +207 0x4848 //RX_FDEQ_GAIN_11 +208 0x4848 //RX_FDEQ_GAIN_12 +209 0x4848 //RX_FDEQ_GAIN_13 +210 0x4848 //RX_FDEQ_GAIN_14 +211 0x4848 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0202 //RX_FDEQ_BIN_0 +221 0x0203 //RX_FDEQ_BIN_1 +222 0x0303 //RX_FDEQ_BIN_2 +223 0x0304 //RX_FDEQ_BIN_3 +224 0x0405 //RX_FDEQ_BIN_4 +225 0x0506 //RX_FDEQ_BIN_5 +226 0x0708 //RX_FDEQ_BIN_6 +227 0x090A //RX_FDEQ_BIN_7 +228 0x0B0C //RX_FDEQ_BIN_8 +229 0x0D0E //RX_FDEQ_BIN_9 +230 0x0E0F //RX_FDEQ_BIN_10 +231 0x0F10 //RX_FDEQ_BIN_11 +232 0x1011 //RX_FDEQ_BIN_12 +233 0x1104 //RX_FDEQ_BIN_13 +234 0x0000 //RX_FDEQ_BIN_14 +235 0x0000 //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x4000 //RX_FDEQ_RESRV_0 +245 0x0320 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0030 //RX_FDDRC_BAND_MARGIN_1 +248 0x0050 //RX_FDDRC_BAND_MARGIN_2 +249 0x0080 //RX_FDDRC_BAND_MARGIN_3 +250 0x0007 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x5000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x6400 //RX_FDDRC_THRD_3_2 +258 0x6400 //RX_FDDRC_THRD_3_3 +259 0x2000 //RX_FDDRC_SLANT_0_0 +260 0x2000 //RX_FDDRC_SLANT_0_1 +261 0x2000 //RX_FDDRC_SLANT_0_2 +262 0x2000 //RX_FDDRC_SLANT_0_3 +263 0x5333 //RX_FDDRC_SLANT_1_0 +264 0x5333 //RX_FDDRC_SLANT_1_1 +265 0x5333 //RX_FDDRC_SLANT_1_2 +266 0x5333 //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +286 0x0020 //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 +#VOL 3 +163 0x3000 //RX_TDDRC_ALPHA_UP_1 +164 0x3000 //RX_TDDRC_ALPHA_UP_2 +165 0x3000 //RX_TDDRC_ALPHA_UP_3 +166 0x3000 //RX_TDDRC_ALPHA_UP_4 +184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +190 0x7FFF //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +269 0x0000 //RX_TDDRC_THRD_0 +270 0x0000 //RX_TDDRC_THRD_1 +271 0x2000 //RX_TDDRC_THRD_2 +272 0x3000 //RX_TDDRC_THRD_3 +273 0x0800 //RX_TDDRC_SLANT_0 +274 0x7EB8 //RX_TDDRC_SLANT_1 +275 0x3000 //RX_TDDRC_ALPHA_UP_0 +276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x199A //RX_TDDRC_HMNC_GAIN +279 0x0001 //RX_TDDRC_SMT_FLAG +280 0x0CCD //RX_TDDRC_SMT_W +281 0x0196 //RX_TDDRC_DRC_GAIN +195 0x001C //RX_FDEQ_SUBNUM +196 0x4848 //RX_FDEQ_GAIN_0 +197 0x4848 //RX_FDEQ_GAIN_1 +198 0x4848 //RX_FDEQ_GAIN_2 +199 0x4848 //RX_FDEQ_GAIN_3 +200 0x4848 //RX_FDEQ_GAIN_4 +201 0x4848 //RX_FDEQ_GAIN_5 +202 0x4848 //RX_FDEQ_GAIN_6 +203 0x4848 //RX_FDEQ_GAIN_7 +204 0x4848 //RX_FDEQ_GAIN_8 +205 0x4848 //RX_FDEQ_GAIN_9 +206 0x4848 //RX_FDEQ_GAIN_10 +207 0x4848 //RX_FDEQ_GAIN_11 +208 0x4848 //RX_FDEQ_GAIN_12 +209 0x4848 //RX_FDEQ_GAIN_13 +210 0x4848 //RX_FDEQ_GAIN_14 +211 0x4848 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0202 //RX_FDEQ_BIN_0 +221 0x0203 //RX_FDEQ_BIN_1 +222 0x0303 //RX_FDEQ_BIN_2 +223 0x0304 //RX_FDEQ_BIN_3 +224 0x0405 //RX_FDEQ_BIN_4 +225 0x0506 //RX_FDEQ_BIN_5 +226 0x0708 //RX_FDEQ_BIN_6 +227 0x090A //RX_FDEQ_BIN_7 +228 0x0B0C //RX_FDEQ_BIN_8 +229 0x0D0E //RX_FDEQ_BIN_9 +230 0x0E0F //RX_FDEQ_BIN_10 +231 0x0F10 //RX_FDEQ_BIN_11 +232 0x1011 //RX_FDEQ_BIN_12 +233 0x1104 //RX_FDEQ_BIN_13 +234 0x0000 //RX_FDEQ_BIN_14 +235 0x0000 //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x4000 //RX_FDEQ_RESRV_0 +245 0x0320 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0030 //RX_FDDRC_BAND_MARGIN_1 +248 0x0050 //RX_FDDRC_BAND_MARGIN_2 +249 0x0080 //RX_FDDRC_BAND_MARGIN_3 +250 0x0007 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x5000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x6400 //RX_FDDRC_THRD_3_2 +258 0x6400 //RX_FDDRC_THRD_3_3 +259 0x2000 //RX_FDDRC_SLANT_0_0 +260 0x2000 //RX_FDDRC_SLANT_0_1 +261 0x2000 //RX_FDDRC_SLANT_0_2 +262 0x2000 //RX_FDDRC_SLANT_0_3 +263 0x5333 //RX_FDDRC_SLANT_1_0 +264 0x5333 //RX_FDDRC_SLANT_1_1 +265 0x5333 //RX_FDDRC_SLANT_1_2 +266 0x5333 //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +286 0x0036 //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 +#VOL 4 +163 0x3000 //RX_TDDRC_ALPHA_UP_1 +164 0x3000 //RX_TDDRC_ALPHA_UP_2 +165 0x3000 //RX_TDDRC_ALPHA_UP_3 +166 0x3000 //RX_TDDRC_ALPHA_UP_4 +184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +190 0x7FFF //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +269 0x0000 //RX_TDDRC_THRD_0 +270 0x0000 //RX_TDDRC_THRD_1 +271 0x2000 //RX_TDDRC_THRD_2 +272 0x3000 //RX_TDDRC_THRD_3 +273 0x0800 //RX_TDDRC_SLANT_0 +274 0x7EB8 //RX_TDDRC_SLANT_1 +275 0x3000 //RX_TDDRC_ALPHA_UP_0 +276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x199A //RX_TDDRC_HMNC_GAIN +279 0x0001 //RX_TDDRC_SMT_FLAG +280 0x0CCD //RX_TDDRC_SMT_W +281 0x0196 //RX_TDDRC_DRC_GAIN +195 0x001C //RX_FDEQ_SUBNUM +196 0x4848 //RX_FDEQ_GAIN_0 +197 0x4848 //RX_FDEQ_GAIN_1 +198 0x4848 //RX_FDEQ_GAIN_2 +199 0x4848 //RX_FDEQ_GAIN_3 +200 0x4848 //RX_FDEQ_GAIN_4 +201 0x4848 //RX_FDEQ_GAIN_5 +202 0x4848 //RX_FDEQ_GAIN_6 +203 0x4848 //RX_FDEQ_GAIN_7 +204 0x4848 //RX_FDEQ_GAIN_8 +205 0x4848 //RX_FDEQ_GAIN_9 +206 0x4848 //RX_FDEQ_GAIN_10 +207 0x4848 //RX_FDEQ_GAIN_11 +208 0x4848 //RX_FDEQ_GAIN_12 +209 0x4848 //RX_FDEQ_GAIN_13 +210 0x4848 //RX_FDEQ_GAIN_14 +211 0x4848 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0202 //RX_FDEQ_BIN_0 +221 0x0203 //RX_FDEQ_BIN_1 +222 0x0303 //RX_FDEQ_BIN_2 +223 0x0304 //RX_FDEQ_BIN_3 +224 0x0405 //RX_FDEQ_BIN_4 +225 0x0506 //RX_FDEQ_BIN_5 +226 0x0708 //RX_FDEQ_BIN_6 +227 0x090A //RX_FDEQ_BIN_7 +228 0x0B0C //RX_FDEQ_BIN_8 +229 0x0D0E //RX_FDEQ_BIN_9 +230 0x0E0F //RX_FDEQ_BIN_10 +231 0x0F10 //RX_FDEQ_BIN_11 +232 0x1011 //RX_FDEQ_BIN_12 +233 0x1104 //RX_FDEQ_BIN_13 +234 0x0000 //RX_FDEQ_BIN_14 +235 0x0000 //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x4000 //RX_FDEQ_RESRV_0 +245 0x0320 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0030 //RX_FDDRC_BAND_MARGIN_1 +248 0x0050 //RX_FDDRC_BAND_MARGIN_2 +249 0x0080 //RX_FDDRC_BAND_MARGIN_3 +250 0x0007 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x5000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x6400 //RX_FDDRC_THRD_3_2 +258 0x6400 //RX_FDDRC_THRD_3_3 +259 0x2000 //RX_FDDRC_SLANT_0_0 +260 0x2000 //RX_FDDRC_SLANT_0_1 +261 0x2000 //RX_FDDRC_SLANT_0_2 +262 0x2000 //RX_FDDRC_SLANT_0_3 +263 0x5333 //RX_FDDRC_SLANT_1_0 +264 0x5333 //RX_FDDRC_SLANT_1_1 +265 0x5333 //RX_FDDRC_SLANT_1_2 +266 0x5333 //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +286 0x005B //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 +#VOL 5 +163 0x3000 //RX_TDDRC_ALPHA_UP_1 +164 0x3000 //RX_TDDRC_ALPHA_UP_2 +165 0x3000 //RX_TDDRC_ALPHA_UP_3 +166 0x3000 //RX_TDDRC_ALPHA_UP_4 +184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +190 0x7FFF //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +269 0x0000 //RX_TDDRC_THRD_0 +270 0x0000 //RX_TDDRC_THRD_1 +271 0x2000 //RX_TDDRC_THRD_2 +272 0x3000 //RX_TDDRC_THRD_3 +273 0x0800 //RX_TDDRC_SLANT_0 +274 0x7EB8 //RX_TDDRC_SLANT_1 +275 0x3000 //RX_TDDRC_ALPHA_UP_0 +276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x199A //RX_TDDRC_HMNC_GAIN +279 0x0001 //RX_TDDRC_SMT_FLAG +280 0x0CCD //RX_TDDRC_SMT_W +281 0x0196 //RX_TDDRC_DRC_GAIN +195 0x001C //RX_FDEQ_SUBNUM +196 0x4848 //RX_FDEQ_GAIN_0 +197 0x4848 //RX_FDEQ_GAIN_1 +198 0x4848 //RX_FDEQ_GAIN_2 +199 0x4848 //RX_FDEQ_GAIN_3 +200 0x4848 //RX_FDEQ_GAIN_4 +201 0x4848 //RX_FDEQ_GAIN_5 +202 0x4848 //RX_FDEQ_GAIN_6 +203 0x4848 //RX_FDEQ_GAIN_7 +204 0x4848 //RX_FDEQ_GAIN_8 +205 0x4848 //RX_FDEQ_GAIN_9 +206 0x4848 //RX_FDEQ_GAIN_10 +207 0x4848 //RX_FDEQ_GAIN_11 +208 0x4848 //RX_FDEQ_GAIN_12 +209 0x4848 //RX_FDEQ_GAIN_13 +210 0x4848 //RX_FDEQ_GAIN_14 +211 0x4848 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0202 //RX_FDEQ_BIN_0 +221 0x0203 //RX_FDEQ_BIN_1 +222 0x0303 //RX_FDEQ_BIN_2 +223 0x0304 //RX_FDEQ_BIN_3 +224 0x0405 //RX_FDEQ_BIN_4 +225 0x0506 //RX_FDEQ_BIN_5 +226 0x0708 //RX_FDEQ_BIN_6 +227 0x090A //RX_FDEQ_BIN_7 +228 0x0B0C //RX_FDEQ_BIN_8 +229 0x0D0E //RX_FDEQ_BIN_9 +230 0x0E0F //RX_FDEQ_BIN_10 +231 0x0F10 //RX_FDEQ_BIN_11 +232 0x1011 //RX_FDEQ_BIN_12 +233 0x1104 //RX_FDEQ_BIN_13 +234 0x0000 //RX_FDEQ_BIN_14 +235 0x0000 //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x4000 //RX_FDEQ_RESRV_0 +245 0x0320 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0030 //RX_FDDRC_BAND_MARGIN_1 +248 0x0050 //RX_FDDRC_BAND_MARGIN_2 +249 0x0080 //RX_FDDRC_BAND_MARGIN_3 +250 0x0007 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x5000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x6400 //RX_FDDRC_THRD_3_2 +258 0x6400 //RX_FDDRC_THRD_3_3 +259 0x2000 //RX_FDDRC_SLANT_0_0 +260 0x2000 //RX_FDDRC_SLANT_0_1 +261 0x2000 //RX_FDDRC_SLANT_0_2 +262 0x2000 //RX_FDDRC_SLANT_0_3 +263 0x5333 //RX_FDDRC_SLANT_1_0 +264 0x5333 //RX_FDDRC_SLANT_1_1 +265 0x5333 //RX_FDDRC_SLANT_1_2 +266 0x5333 //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +286 0x0099 //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 +#VOL 6 +163 0x3000 //RX_TDDRC_ALPHA_UP_1 +164 0x3000 //RX_TDDRC_ALPHA_UP_2 +165 0x3000 //RX_TDDRC_ALPHA_UP_3 +166 0x3000 //RX_TDDRC_ALPHA_UP_4 +184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +190 0x7FFF //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +269 0x0000 //RX_TDDRC_THRD_0 +270 0x0000 //RX_TDDRC_THRD_1 +271 0x2000 //RX_TDDRC_THRD_2 +272 0x3000 //RX_TDDRC_THRD_3 +273 0x0800 //RX_TDDRC_SLANT_0 +274 0x7EB8 //RX_TDDRC_SLANT_1 +275 0x3000 //RX_TDDRC_ALPHA_UP_0 +276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x199A //RX_TDDRC_HMNC_GAIN +279 0x0001 //RX_TDDRC_SMT_FLAG +280 0x0CCD //RX_TDDRC_SMT_W +281 0x0196 //RX_TDDRC_DRC_GAIN +195 0x001C //RX_FDEQ_SUBNUM +196 0x4848 //RX_FDEQ_GAIN_0 +197 0x4848 //RX_FDEQ_GAIN_1 +198 0x4848 //RX_FDEQ_GAIN_2 +199 0x4848 //RX_FDEQ_GAIN_3 +200 0x4848 //RX_FDEQ_GAIN_4 +201 0x4848 //RX_FDEQ_GAIN_5 +202 0x4848 //RX_FDEQ_GAIN_6 +203 0x4848 //RX_FDEQ_GAIN_7 +204 0x4848 //RX_FDEQ_GAIN_8 +205 0x4848 //RX_FDEQ_GAIN_9 +206 0x4848 //RX_FDEQ_GAIN_10 +207 0x4848 //RX_FDEQ_GAIN_11 +208 0x4848 //RX_FDEQ_GAIN_12 +209 0x4848 //RX_FDEQ_GAIN_13 +210 0x4848 //RX_FDEQ_GAIN_14 +211 0x4848 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0202 //RX_FDEQ_BIN_0 +221 0x0203 //RX_FDEQ_BIN_1 +222 0x0303 //RX_FDEQ_BIN_2 +223 0x0304 //RX_FDEQ_BIN_3 +224 0x0405 //RX_FDEQ_BIN_4 +225 0x0506 //RX_FDEQ_BIN_5 +226 0x0708 //RX_FDEQ_BIN_6 +227 0x090A //RX_FDEQ_BIN_7 +228 0x0B0C //RX_FDEQ_BIN_8 +229 0x0D0E //RX_FDEQ_BIN_9 +230 0x0E0F //RX_FDEQ_BIN_10 +231 0x0F10 //RX_FDEQ_BIN_11 +232 0x1011 //RX_FDEQ_BIN_12 +233 0x1104 //RX_FDEQ_BIN_13 +234 0x0000 //RX_FDEQ_BIN_14 +235 0x0000 //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x4000 //RX_FDEQ_RESRV_0 +245 0x0320 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0030 //RX_FDDRC_BAND_MARGIN_1 +248 0x0050 //RX_FDDRC_BAND_MARGIN_2 +249 0x0080 //RX_FDDRC_BAND_MARGIN_3 +250 0x0007 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x5000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x6400 //RX_FDDRC_THRD_3_2 +258 0x6400 //RX_FDDRC_THRD_3_3 +259 0x2000 //RX_FDDRC_SLANT_0_0 +260 0x2000 //RX_FDDRC_SLANT_0_1 +261 0x2000 //RX_FDDRC_SLANT_0_2 +262 0x2000 //RX_FDDRC_SLANT_0_3 +263 0x5333 //RX_FDDRC_SLANT_1_0 +264 0x5333 //RX_FDDRC_SLANT_1_1 +265 0x5333 //RX_FDDRC_SLANT_1_2 +266 0x5333 //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +286 0x0100 //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 #CASE_NAME HEADSET-GOOGLE_CONDOR-VOICE_GENERIC-SWB -#PARAM_MODE FULL -#PARAM_TYPE TX+RX -#TOTAL_CUSTOM_STEP 7 +#PARAM_MODE Full +#PARAM_TYPE TX+2RX +#TOTAL_CUSTOM_STEP 7+7 #TX 0 0x0009 //TX_OPERATION_MODE_0 1 0x0001 //TX_OPERATION_MODE_1 @@ -10774,7 +16270,7 @@ 239 0x0800 //TX_DT_RESRV_7 240 0x0800 //TX_DT_RESRV_8 241 0x0000 //TX_DT_RESRV_9 -242 0xF400 //TX_THR_SN_EST_0 +242 0xFA00 //TX_THR_SN_EST_0 243 0xF400 //TX_THR_SN_EST_1 244 0xF600 //TX_THR_SN_EST_2 245 0xF400 //TX_THR_SN_EST_3 @@ -10783,20 +16279,20 @@ 248 0xF400 //TX_THR_SN_EST_6 249 0xF600 //TX_THR_SN_EST_7 250 0x0000 //TX_DELTA_THR_SN_EST_0 -251 0x0000 //TX_DELTA_THR_SN_EST_1 +251 0x0200 //TX_DELTA_THR_SN_EST_1 252 0x0200 //TX_DELTA_THR_SN_EST_2 253 0x0200 //TX_DELTA_THR_SN_EST_3 254 0x0200 //TX_DELTA_THR_SN_EST_4 255 0x0200 //TX_DELTA_THR_SN_EST_5 -256 0x0200 //TX_DELTA_THR_SN_EST_6 +256 0x0000 //TX_DELTA_THR_SN_EST_6 257 0x0200 //TX_DELTA_THR_SN_EST_7 258 0x6000 //TX_LAMBDA_NN_EST_0 -259 0x6000 //TX_LAMBDA_NN_EST_1 +259 0x4000 //TX_LAMBDA_NN_EST_1 260 0x4000 //TX_LAMBDA_NN_EST_2 261 0x4000 //TX_LAMBDA_NN_EST_3 262 0x4000 //TX_LAMBDA_NN_EST_4 263 0x4000 //TX_LAMBDA_NN_EST_5 -264 0x4000 //TX_LAMBDA_NN_EST_6 +264 0x6000 //TX_LAMBDA_NN_EST_6 265 0x4000 //TX_LAMBDA_NN_EST_7 266 0x0400 //TX_N_SN_EST 267 0x001E //TX_INBEAM_T @@ -10814,16 +16310,16 @@ 279 0x1000 //TX_B_POST_FLT_0 280 0x1000 //TX_B_POST_FLT_1 281 0x000B //TX_NS_LVL_CTRL_0 -282 0x000F //TX_NS_LVL_CTRL_1 -283 0x0011 //TX_NS_LVL_CTRL_2 +282 0x0011 //TX_NS_LVL_CTRL_1 +283 0x000F //TX_NS_LVL_CTRL_2 284 0x000F //TX_NS_LVL_CTRL_3 285 0x000F //TX_NS_LVL_CTRL_4 286 0x000F //TX_NS_LVL_CTRL_5 287 0x000F //TX_NS_LVL_CTRL_6 288 0x0011 //TX_NS_LVL_CTRL_7 289 0x000C //TX_MIN_GAIN_S_0 -290 0x000C //TX_MIN_GAIN_S_1 -291 0x000F //TX_MIN_GAIN_S_2 +290 0x000F //TX_MIN_GAIN_S_1 +291 0x000C //TX_MIN_GAIN_S_2 292 0x000C //TX_MIN_GAIN_S_3 293 0x000C //TX_MIN_GAIN_S_4 294 0x000C //TX_MIN_GAIN_S_5 @@ -10847,12 +16343,12 @@ 312 0x7FFF //TX_A_POST_FILT_0 313 0x2000 //TX_A_POST_FILT_1 314 0x2000 //TX_A_POST_FILT_S_0 -315 0x4000 //TX_A_POST_FILT_S_1 +315 0x5000 //TX_A_POST_FILT_S_1 316 0x5000 //TX_A_POST_FILT_S_2 317 0x5000 //TX_A_POST_FILT_S_3 318 0x5000 //TX_A_POST_FILT_S_4 319 0x5000 //TX_A_POST_FILT_S_5 -320 0x5000 //TX_A_POST_FILT_S_6 +320 0x4000 //TX_A_POST_FILT_S_6 321 0x5000 //TX_A_POST_FILT_S_7 322 0x1000 //TX_B_POST_FILT_0 323 0x1000 //TX_B_POST_FILT_1 @@ -10899,7 +16395,7 @@ 364 0x0000 //TX_K_APT 365 0x0001 //TX_NOISEDET 366 0x0190 //TX_NDETCT -367 0x0050 //TX_NOISE_TH_0 +367 0x0383 //TX_NOISE_TH_0 368 0x7FFF //TX_NOISE_TH_0_2 369 0x7FFF //TX_NOISE_TH_0_3 370 0x07D0 //TX_NOISE_TH_1 @@ -10911,11 +16407,11 @@ 376 0x7FFF //TX_NOISE_TH_5_3 377 0x7FFF //TX_NOISE_TH_5_4 378 0x044C //TX_NOISE_TH_6 -379 0x0014 //TX_MINENOISE_TH -380 0x4000 //TX_MINENOISE_MIC0_TH_MTS -381 0xFFEE //TX_MINENOISE_MIC0_TH_EXP -382 0x6000 //TX_MINENOISE_MIC0_S_TH_MTS -383 0xFFF3 //TX_MINENOISE_MIC0_S_TH_EXP +379 0x044C //TX_MINENOISE_TH +380 0xD508 //TX_MORENS_TFMASK_TH +381 0x0001 //TX_DRC_QUIET_FLOOR +382 0x3A98 //TX_RATIODTL_CUT_TH +383 0x0DAC //TX_DT_CUT_K1 384 0x0666 //TX_OUT_ENER_S_TH_CLEAN 385 0x0666 //TX_OUT_ENER_S_TH_LESSCLEAN 386 0x0333 //TX_OUT_ENER_S_TH_NOISY @@ -10923,22 +16419,22 @@ 388 0x0333 //TX_OUT_ENER_TH_SPEECH 389 0x2000 //TX_SN_NPB_GAIN 390 0x0000 //TX_NN_NPB_GAIN -391 0x0000 //TX_CSX_ALPHA_0 -392 0x0000 //TX_CSX_ALPHA_1 -393 0x0000 //TX_CSX_ALPHA_2 -394 0x0000 //TX_CSX_ALPHA_3 -395 0x0800 //TX_MU_ARSP_EST -396 0x00C8 //TX_P_OUTBEAM_MIN_TH +391 0x7FFF //TX_POST_MASK_SUP_HSNE +392 0x1388 //TX_TAIL_DET_TH +393 0x4000 //TX_B_LESSCUT_RTO_WTA +394 0x0000 //TX_MEL_G_R +395 0x0080 //TX_SUPHIGH_TH +396 0x0000 //TX_MASK_G_R 397 0x0002 //TX_EXTRA_NS_L -398 0x0800 //TX_EXTRA_NS_A -399 0x0005 //TX_VR_NOISE_FLOOR_TH +398 0x1800 //TX_C_POST_FLT_MASK +399 0x7FFF //TX_A_POST_FLT_WNS 400 0x0148 //TX_MIN_G_LOW300HZ 401 0x0002 //TX_MAXLEVEL_CNG 402 0x00B4 //TX_STN_NOISE_TH 403 0x4000 //TX_POST_MASK_SUP 404 0x7FFF //TX_POST_MASK_ADJUST 405 0x00C8 //TX_NS_ENOISE_MIC0_TH -406 0x0014 //TX_MINENOISE_MIC0_TH +406 0x02F3 //TX_MINENOISE_MIC0_TH 407 0x012C //TX_MINENOISE_MIC0_S_TH 408 0x2900 //TX_MIN_G_CTRL_SSNS 409 0x0800 //TX_METAL_RTO_THR @@ -11046,16 +16542,16 @@ 511 0x6666 //TX_MIC_TO_BFGAIN 512 0x0000 //TX_MICTOBFGAIN0 513 0x0000 //TX_FASTMUE_TH -514 0x0000 //TX_DERVB_LEN_0 -515 0x0000 //TX_DERVB_LEN_1 -516 0x0000 //TX_RHO_DERVB -517 0x0000 //TX_MIC_INDX_DERVB -518 0x0000 //TX_MU_DERVB -519 0x0000 //TX_DR_RESRV_0 -520 0x0000 //TX_DR_RESRV_1 -521 0x0000 //TX_DR_RESRV_2 -522 0x0000 //TX_DR_RESRV_3 -523 0x0000 //TX_DR_RESRV_4 +514 0xC000 //TX_DEREVERB_LF_MU +515 0xC000 //TX_DEREVERB_HF_MU +516 0xCCCC //TX_DEREVERB_DELAY +517 0xD999 //TX_DEREVERB_COEF_LEN +518 0x1F40 //TX_DEREVERB_DNR +519 0x0000 //TX_DEREVERB_ALPHA +520 0x0000 //TX_DEREVERB_BETA +521 0x0000 //TX_GSC_RTOL_TH +522 0x7000 //TX_GSC_RTOH_TH +523 0x0064 //TX_WIDE2_MEANHTH 524 0x0000 //TX_DR_RESRV_5 525 0x0000 //TX_DR_RESRV_6 526 0x0000 //TX_DR_RESRV_7 @@ -11421,16 +16917,81 @@ 886 0x0CCD //TX_FASTNS_TFMASKBIN_TH2 887 0x0CCD //TX_FASTNS_TFMASKBIN_TH3 888 0x0028 //TX_FASTNS_ARSPC_TH -889 0xC000 //TX_FASTNS_MASK5_TH +889 0x8000 //TX_FASTNS_MASK5_TH 890 0x4848 //TX_POSTSSA_MIN_G_VR_MASK -891 0x1000 //TX_A_LESSCUT_RTO_MASK +891 0x4000 //TX_A_LESSCUT_RTO_MASK 892 0x1770 //TX_FASTNS_NOISETH 893 0xC000 //TX_FASTNS_SSA_THLFL 894 0xC000 //TX_FASTNS_SSA_THHFL 895 0xCCCC //TX_FASTNS_SSA_THLFH 896 0xD999 //TX_FASTNS_SSA_THHFH +897 0x2339 //TX_SENDFUNC_REG_MICMUTE +898 0x0021 //TX_SENDFUNC_REG_MICMUTE1 +899 0x02BC //TX_MICMUTE_RATIO_THR +900 0x0140 //TX_MICMUTE_AMP_THR +901 0x0004 //TX_MICMUTE_HPF_IND +902 0x00C0 //TX_MICMUTE_LOG_EYR_TH +903 0x0008 //TX_MICMUTE_CVG_TIME +904 0x0008 //TX_MICMUTE_RELEASE_TIME +905 0x01FE //TX_MIC_VOLUME_MIC0MUTE +906 0x0020 //TX_MICMUTE_EPD_OFFSET_0 +907 0x001E //TX_MICMUTE_FRQ_AEC_L +908 0x7999 //TX_MICMUTE_EAD_THR +909 0x7FFF //TX_MICMUTE_LAMBDA_CB_NLE +910 0x7FFF //TX_MICMUTE_LAMBDA_RE_EST +911 0x4000 //TX_DTD_THR1_MICMUTE_0 +912 0x7000 //TX_DTD_THR1_MICMUTE_1 +913 0x7FFF //TX_DTD_THR1_MICMUTE_2 +914 0x7FFF //TX_DTD_THR1_MICMUTE_3 +915 0x6CCC //TX_DTD_THR2_MICMUTE_0 +916 0x0400 //TX_MICMUTE_MIN_EQ_RE_EST_0 +917 0x0400 //TX_MICMUTE_MIN_EQ_RE_EST_1 +918 0x1000 //TX_MICMUTE_MIN_EQ_RE_EST_2 +919 0x7FFF //TX_MICMUTE_MIN_EQ_RE_EST_3 +920 0x7FFF //TX_MICMUTE_MIN_EQ_RE_EST_4 +921 0x4000 //TX_MICMUTE_C_POST_FLT +922 0x03E8 //TX_MICMUTE_DT_CUT_K +923 0x0001 //TX_MICMUTE_DT_CUT_THR +924 0x03E8 //TX_MICMUTE_DT_CUT_K2 +925 0x0001 //TX_MICMUTE_DT_CUT_THR2 +926 0x0064 //TX_MICMUTE_DT2_HOLD_N +927 0x1000 //TX_MICMUTE_RATIODTH_THCUT +928 0x1000 //TX_MICMUTE_B_POST_FLT_ECHOL +929 0x7FFF //TX_MICMUTE_B_POST_FLT_ECHOH +930 0x0400 //TX_MICMUTE_C_POST_FLT_MASK +931 0x7999 //TX_MICMUTE_RATIODTL_CUT_TH +932 0x0258 //TX_MICMUTE_DT_CUT_K1 +933 0x0800 //TX_MICMUTE_N2_SN_EST +934 0xFC00 //TX_MICMUTE_THR_SN_EST_0 +935 0x001C //TX_MICMUTE_MIN_G_CTRL_0 +936 0x6000 //TX_MICMUTE_A_POST_FILT_S_0 +937 0x7000 //TX_MICMUTE_B_POST_FILT_0 +938 0x2710 //TX_MIC1RUB_AMP_THR +939 0x0010 //TX_MIC1MUTE_RATIO_THR +940 0x0450 //TX_MIC1MUTE_AMP_THR +941 0x0008 //TX_MIC1MUTE_CVG_TIME +942 0x0008 //TX_MIC1MUTE_RELEASE_TIME +943 0x0000 //TX_AMS_RESRV_01 +944 0x0000 //TX_AMS_RESRV_02 +945 0x0000 //TX_AMS_RESRV_03 +946 0x0000 //TX_AMS_RESRV_04 +947 0x0000 //TX_AMS_RESRV_05 +948 0x0000 //TX_AMS_RESRV_06 +949 0x0000 //TX_AMS_RESRV_07 +950 0x0000 //TX_AMS_RESRV_08 +951 0x0000 //TX_AMS_RESRV_09 +952 0x0000 //TX_AMS_RESRV_10 +953 0x0000 //TX_AMS_RESRV_11 +954 0x0000 //TX_AMS_RESRV_12 +955 0x0000 //TX_AMS_RESRV_13 +956 0x0000 //TX_AMS_RESRV_14 +957 0x0000 //TX_AMS_RESRV_15 +958 0x0000 //TX_AMS_RESRV_16 +959 0x0000 //TX_AMS_RESRV_17 +960 0x0000 //TX_AMS_RESRV_18 +961 0x0000 //TX_AMS_RESRV_19 #RX -0 0x002C //RX_RECVFUNC_MODE_0 +0 0x202C //RX_RECVFUNC_MODE_0 1 0x0000 //RX_RECVFUNC_MODE_1 2 0x0003 //RX_SAMPLINGFREQ_SIG 3 0x0003 //RX_SAMPLINGFREQ_PROC @@ -12280,11 +17841,862 @@ 110 0x0000 //RX_FDDRC_RESRV_0 129 0x0100 //RX_SPK_VOL 130 0x0000 //RX_VOL_RESRV_0 +#RX 2 +157 0x202C //RX_RECVFUNC_MODE_0 +158 0x0000 //RX_RECVFUNC_MODE_1 +159 0x0003 //RX_SAMPLINGFREQ_SIG +160 0x0003 //RX_SAMPLINGFREQ_PROC +161 0x000A //RX_FRAME_SZ +162 0x0000 //RX_DELAY_OPT +163 0x5000 //RX_TDDRC_ALPHA_UP_1 +164 0x5000 //RX_TDDRC_ALPHA_UP_2 +165 0x5000 //RX_TDDRC_ALPHA_UP_3 +166 0x2000 //RX_TDDRC_ALPHA_UP_4 +167 0x0800 //RX_PGA +168 0x7FFF //RX_A_HP +169 0x0000 //RX_B_PE +170 0x1800 //RX_THR_PITCH_DET_0 +171 0x1000 //RX_THR_PITCH_DET_1 +172 0x0800 //RX_THR_PITCH_DET_2 +173 0x0008 //RX_PITCH_BFR_LEN +174 0x0003 //RX_SBD_PITCH_DET +175 0x0100 //RX_PP_RESRV_0 +176 0x0020 //RX_PP_RESRV_1 +177 0x0400 //RX_N_SN_EST +178 0x000C //RX_N2_SN_EST +179 0x0003 //RX_NS_LVL_CTRL +180 0x9000 //RX_THR_SN_EST +181 0x7CCD //RX_LAMBDA_PFILT +182 0x000A //RX_FENS_RESRV_0 +183 0x0190 //RX_FENS_RESRV_1 +184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +187 0x0002 //RX_EXTRA_NS_L +188 0x0800 //RX_EXTRA_NS_A +189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +190 0x65AD //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +192 0x199A //RX_A_POST_FLT +193 0x0000 //RX_LMT_THRD +194 0x4000 //RX_LMT_ALPHA +195 0x0020 //RX_FDEQ_SUBNUM +196 0x4848 //RX_FDEQ_GAIN_0 +197 0x4848 //RX_FDEQ_GAIN_1 +198 0x4848 //RX_FDEQ_GAIN_2 +199 0x4848 //RX_FDEQ_GAIN_3 +200 0x4848 //RX_FDEQ_GAIN_4 +201 0x4848 //RX_FDEQ_GAIN_5 +202 0x4848 //RX_FDEQ_GAIN_6 +203 0x4848 //RX_FDEQ_GAIN_7 +204 0x4848 //RX_FDEQ_GAIN_8 +205 0x4848 //RX_FDEQ_GAIN_9 +206 0x4848 //RX_FDEQ_GAIN_10 +207 0x4848 //RX_FDEQ_GAIN_11 +208 0x4848 //RX_FDEQ_GAIN_12 +209 0x4848 //RX_FDEQ_GAIN_13 +210 0x4848 //RX_FDEQ_GAIN_14 +211 0x4848 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0202 //RX_FDEQ_BIN_0 +221 0x0203 //RX_FDEQ_BIN_1 +222 0x0303 //RX_FDEQ_BIN_2 +223 0x0304 //RX_FDEQ_BIN_3 +224 0x0405 //RX_FDEQ_BIN_4 +225 0x0506 //RX_FDEQ_BIN_5 +226 0x0708 //RX_FDEQ_BIN_6 +227 0x090A //RX_FDEQ_BIN_7 +228 0x0B0C //RX_FDEQ_BIN_8 +229 0x0D0E //RX_FDEQ_BIN_9 +230 0x1013 //RX_FDEQ_BIN_10 +231 0x1719 //RX_FDEQ_BIN_11 +232 0x1B1E //RX_FDEQ_BIN_12 +233 0x1E1E //RX_FDEQ_BIN_13 +234 0x1E28 //RX_FDEQ_BIN_14 +235 0x282C //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x4000 //RX_FDEQ_RESRV_0 +245 0x0320 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0030 //RX_FDDRC_BAND_MARGIN_1 +248 0x0050 //RX_FDDRC_BAND_MARGIN_2 +249 0x0080 //RX_FDDRC_BAND_MARGIN_3 +250 0x0007 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x5000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x6400 //RX_FDDRC_THRD_3_2 +258 0x6400 //RX_FDDRC_THRD_3_3 +259 0x2000 //RX_FDDRC_SLANT_0_0 +260 0x2000 //RX_FDDRC_SLANT_0_1 +261 0x2000 //RX_FDDRC_SLANT_0_2 +262 0x2000 //RX_FDDRC_SLANT_0_3 +263 0x5333 //RX_FDDRC_SLANT_1_0 +264 0x5333 //RX_FDDRC_SLANT_1_1 +265 0x5333 //RX_FDDRC_SLANT_1_2 +266 0x5333 //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +268 0x0002 //RX_FILTINDX +269 0x0000 //RX_TDDRC_THRD_0 +270 0x0000 //RX_TDDRC_THRD_1 +271 0x1A00 //RX_TDDRC_THRD_2 +272 0x1A00 //RX_TDDRC_THRD_3 +273 0x3000 //RX_TDDRC_SLANT_0 +274 0x7EB8 //RX_TDDRC_SLANT_1 +275 0x5000 //RX_TDDRC_ALPHA_UP_0 +276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x199A //RX_TDDRC_HMNC_GAIN +279 0x0001 //RX_TDDRC_SMT_FLAG +280 0x0CCD //RX_TDDRC_SMT_W +281 0x01C8 //RX_TDDRC_DRC_GAIN +282 0x7C00 //RX_LAMBDA_PKA_FP +283 0x2000 //RX_TPKA_FP +284 0x2000 //RX_MIN_G_FP +285 0x0080 //RX_MAX_G_FP +286 0x000B //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 +288 0x0000 //RX_MAXLEVEL_CNG +289 0x3000 //RX_BWE_UV_TH +290 0x3000 //RX_BWE_UV_TH2 +291 0x1800 //RX_BWE_UV_TH3 +292 0x1000 //RX_BWE_V_TH +293 0x04CD //RX_BWE_GAIN1_V_TH1 +294 0x0F33 //RX_BWE_GAIN1_V_TH2 +295 0x7333 //RX_BWE_UV_EQ +296 0x199A //RX_BWE_V_EQ +297 0x7333 //RX_BWE_TONE_TH +298 0x0004 //RX_BWE_UV_HOLD_T +299 0x6CCD //RX_BWE_GAIN2_ALPHA +300 0x799A //RX_BWE_GAIN3_ALPHA +301 0x001E //RX_BWE_CUTOFF +302 0x3000 //RX_BWE_GAINFILL +303 0x3200 //RX_BWE_MAXTH_TONE +304 0x2000 //RX_BWE_EQ_0 +305 0x2000 //RX_BWE_EQ_1 +306 0x2000 //RX_BWE_EQ_2 +307 0x2000 //RX_BWE_EQ_3 +308 0x2000 //RX_BWE_EQ_4 +309 0x2000 //RX_BWE_EQ_5 +310 0x2000 //RX_BWE_EQ_6 +311 0x0000 //RX_BWE_RESRV_0 +312 0x0000 //RX_BWE_RESRV_1 +313 0x0000 //RX_BWE_RESRV_2 +#VOL 0 +163 0x5000 //RX_TDDRC_ALPHA_UP_1 +164 0x5000 //RX_TDDRC_ALPHA_UP_2 +165 0x5000 //RX_TDDRC_ALPHA_UP_3 +166 0x2000 //RX_TDDRC_ALPHA_UP_4 +184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +190 0x65AD //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +269 0x0000 //RX_TDDRC_THRD_0 +270 0x0000 //RX_TDDRC_THRD_1 +271 0x1A00 //RX_TDDRC_THRD_2 +272 0x1A00 //RX_TDDRC_THRD_3 +273 0x3000 //RX_TDDRC_SLANT_0 +274 0x7EB8 //RX_TDDRC_SLANT_1 +275 0x5000 //RX_TDDRC_ALPHA_UP_0 +276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x199A //RX_TDDRC_HMNC_GAIN +279 0x0001 //RX_TDDRC_SMT_FLAG +280 0x0CCD //RX_TDDRC_SMT_W +281 0x01C8 //RX_TDDRC_DRC_GAIN +195 0x0020 //RX_FDEQ_SUBNUM +196 0x4848 //RX_FDEQ_GAIN_0 +197 0x4848 //RX_FDEQ_GAIN_1 +198 0x4848 //RX_FDEQ_GAIN_2 +199 0x4848 //RX_FDEQ_GAIN_3 +200 0x4848 //RX_FDEQ_GAIN_4 +201 0x4848 //RX_FDEQ_GAIN_5 +202 0x4848 //RX_FDEQ_GAIN_6 +203 0x4848 //RX_FDEQ_GAIN_7 +204 0x4848 //RX_FDEQ_GAIN_8 +205 0x4848 //RX_FDEQ_GAIN_9 +206 0x4848 //RX_FDEQ_GAIN_10 +207 0x4848 //RX_FDEQ_GAIN_11 +208 0x4848 //RX_FDEQ_GAIN_12 +209 0x4848 //RX_FDEQ_GAIN_13 +210 0x4848 //RX_FDEQ_GAIN_14 +211 0x4848 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0202 //RX_FDEQ_BIN_0 +221 0x0203 //RX_FDEQ_BIN_1 +222 0x0303 //RX_FDEQ_BIN_2 +223 0x0304 //RX_FDEQ_BIN_3 +224 0x0405 //RX_FDEQ_BIN_4 +225 0x0506 //RX_FDEQ_BIN_5 +226 0x0708 //RX_FDEQ_BIN_6 +227 0x090A //RX_FDEQ_BIN_7 +228 0x0B0C //RX_FDEQ_BIN_8 +229 0x0D0E //RX_FDEQ_BIN_9 +230 0x1013 //RX_FDEQ_BIN_10 +231 0x1719 //RX_FDEQ_BIN_11 +232 0x1B1E //RX_FDEQ_BIN_12 +233 0x1E1E //RX_FDEQ_BIN_13 +234 0x1E28 //RX_FDEQ_BIN_14 +235 0x282C //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x4000 //RX_FDEQ_RESRV_0 +245 0x0320 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0030 //RX_FDDRC_BAND_MARGIN_1 +248 0x0050 //RX_FDDRC_BAND_MARGIN_2 +249 0x0080 //RX_FDDRC_BAND_MARGIN_3 +250 0x0007 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x5000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x6400 //RX_FDDRC_THRD_3_2 +258 0x6400 //RX_FDDRC_THRD_3_3 +259 0x2000 //RX_FDDRC_SLANT_0_0 +260 0x2000 //RX_FDDRC_SLANT_0_1 +261 0x2000 //RX_FDDRC_SLANT_0_2 +262 0x2000 //RX_FDDRC_SLANT_0_3 +263 0x5333 //RX_FDDRC_SLANT_1_0 +264 0x5333 //RX_FDDRC_SLANT_1_1 +265 0x5333 //RX_FDDRC_SLANT_1_2 +266 0x5333 //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +286 0x000B //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 +#VOL 1 +163 0x5000 //RX_TDDRC_ALPHA_UP_1 +164 0x5000 //RX_TDDRC_ALPHA_UP_2 +165 0x5000 //RX_TDDRC_ALPHA_UP_3 +166 0x2000 //RX_TDDRC_ALPHA_UP_4 +184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +190 0x65AD //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +269 0x0000 //RX_TDDRC_THRD_0 +270 0x0000 //RX_TDDRC_THRD_1 +271 0x1A00 //RX_TDDRC_THRD_2 +272 0x1A00 //RX_TDDRC_THRD_3 +273 0x3000 //RX_TDDRC_SLANT_0 +274 0x7EB8 //RX_TDDRC_SLANT_1 +275 0x5000 //RX_TDDRC_ALPHA_UP_0 +276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x199A //RX_TDDRC_HMNC_GAIN +279 0x0001 //RX_TDDRC_SMT_FLAG +280 0x0CCD //RX_TDDRC_SMT_W +281 0x01C8 //RX_TDDRC_DRC_GAIN +195 0x0020 //RX_FDEQ_SUBNUM +196 0x4848 //RX_FDEQ_GAIN_0 +197 0x4848 //RX_FDEQ_GAIN_1 +198 0x4848 //RX_FDEQ_GAIN_2 +199 0x4848 //RX_FDEQ_GAIN_3 +200 0x4848 //RX_FDEQ_GAIN_4 +201 0x4848 //RX_FDEQ_GAIN_5 +202 0x4848 //RX_FDEQ_GAIN_6 +203 0x4848 //RX_FDEQ_GAIN_7 +204 0x4848 //RX_FDEQ_GAIN_8 +205 0x4848 //RX_FDEQ_GAIN_9 +206 0x4848 //RX_FDEQ_GAIN_10 +207 0x4848 //RX_FDEQ_GAIN_11 +208 0x4848 //RX_FDEQ_GAIN_12 +209 0x4848 //RX_FDEQ_GAIN_13 +210 0x4848 //RX_FDEQ_GAIN_14 +211 0x4848 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0202 //RX_FDEQ_BIN_0 +221 0x0203 //RX_FDEQ_BIN_1 +222 0x0303 //RX_FDEQ_BIN_2 +223 0x0304 //RX_FDEQ_BIN_3 +224 0x0405 //RX_FDEQ_BIN_4 +225 0x0506 //RX_FDEQ_BIN_5 +226 0x0708 //RX_FDEQ_BIN_6 +227 0x090A //RX_FDEQ_BIN_7 +228 0x0B0C //RX_FDEQ_BIN_8 +229 0x0D0E //RX_FDEQ_BIN_9 +230 0x1013 //RX_FDEQ_BIN_10 +231 0x1719 //RX_FDEQ_BIN_11 +232 0x1B1E //RX_FDEQ_BIN_12 +233 0x1E1E //RX_FDEQ_BIN_13 +234 0x1E28 //RX_FDEQ_BIN_14 +235 0x282C //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x4000 //RX_FDEQ_RESRV_0 +245 0x0320 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0030 //RX_FDDRC_BAND_MARGIN_1 +248 0x0050 //RX_FDDRC_BAND_MARGIN_2 +249 0x0080 //RX_FDDRC_BAND_MARGIN_3 +250 0x0007 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x5000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x6400 //RX_FDDRC_THRD_3_2 +258 0x6400 //RX_FDDRC_THRD_3_3 +259 0x2000 //RX_FDDRC_SLANT_0_0 +260 0x2000 //RX_FDDRC_SLANT_0_1 +261 0x2000 //RX_FDDRC_SLANT_0_2 +262 0x2000 //RX_FDDRC_SLANT_0_3 +263 0x5333 //RX_FDDRC_SLANT_1_0 +264 0x5333 //RX_FDDRC_SLANT_1_1 +265 0x5333 //RX_FDDRC_SLANT_1_2 +266 0x5333 //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +286 0x0013 //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 +#VOL 2 +163 0x5000 //RX_TDDRC_ALPHA_UP_1 +164 0x5000 //RX_TDDRC_ALPHA_UP_2 +165 0x5000 //RX_TDDRC_ALPHA_UP_3 +166 0x2000 //RX_TDDRC_ALPHA_UP_4 +184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +190 0x65AD //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +269 0x0000 //RX_TDDRC_THRD_0 +270 0x0000 //RX_TDDRC_THRD_1 +271 0x1A00 //RX_TDDRC_THRD_2 +272 0x1A00 //RX_TDDRC_THRD_3 +273 0x3000 //RX_TDDRC_SLANT_0 +274 0x7EB8 //RX_TDDRC_SLANT_1 +275 0x5000 //RX_TDDRC_ALPHA_UP_0 +276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x199A //RX_TDDRC_HMNC_GAIN +279 0x0001 //RX_TDDRC_SMT_FLAG +280 0x0CCD //RX_TDDRC_SMT_W +281 0x01C8 //RX_TDDRC_DRC_GAIN +195 0x0020 //RX_FDEQ_SUBNUM +196 0x4848 //RX_FDEQ_GAIN_0 +197 0x4848 //RX_FDEQ_GAIN_1 +198 0x4848 //RX_FDEQ_GAIN_2 +199 0x4848 //RX_FDEQ_GAIN_3 +200 0x4848 //RX_FDEQ_GAIN_4 +201 0x4848 //RX_FDEQ_GAIN_5 +202 0x4848 //RX_FDEQ_GAIN_6 +203 0x4848 //RX_FDEQ_GAIN_7 +204 0x4848 //RX_FDEQ_GAIN_8 +205 0x4848 //RX_FDEQ_GAIN_9 +206 0x4848 //RX_FDEQ_GAIN_10 +207 0x4848 //RX_FDEQ_GAIN_11 +208 0x4848 //RX_FDEQ_GAIN_12 +209 0x4848 //RX_FDEQ_GAIN_13 +210 0x4848 //RX_FDEQ_GAIN_14 +211 0x4848 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0202 //RX_FDEQ_BIN_0 +221 0x0203 //RX_FDEQ_BIN_1 +222 0x0303 //RX_FDEQ_BIN_2 +223 0x0304 //RX_FDEQ_BIN_3 +224 0x0405 //RX_FDEQ_BIN_4 +225 0x0506 //RX_FDEQ_BIN_5 +226 0x0708 //RX_FDEQ_BIN_6 +227 0x090A //RX_FDEQ_BIN_7 +228 0x0B0C //RX_FDEQ_BIN_8 +229 0x0D0E //RX_FDEQ_BIN_9 +230 0x1013 //RX_FDEQ_BIN_10 +231 0x1719 //RX_FDEQ_BIN_11 +232 0x1B1E //RX_FDEQ_BIN_12 +233 0x1E1E //RX_FDEQ_BIN_13 +234 0x1E28 //RX_FDEQ_BIN_14 +235 0x282C //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x4000 //RX_FDEQ_RESRV_0 +245 0x0320 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0030 //RX_FDDRC_BAND_MARGIN_1 +248 0x0050 //RX_FDDRC_BAND_MARGIN_2 +249 0x0080 //RX_FDDRC_BAND_MARGIN_3 +250 0x0007 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x5000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x6400 //RX_FDDRC_THRD_3_2 +258 0x6400 //RX_FDDRC_THRD_3_3 +259 0x2000 //RX_FDDRC_SLANT_0_0 +260 0x2000 //RX_FDDRC_SLANT_0_1 +261 0x2000 //RX_FDDRC_SLANT_0_2 +262 0x2000 //RX_FDDRC_SLANT_0_3 +263 0x5333 //RX_FDDRC_SLANT_1_0 +264 0x5333 //RX_FDDRC_SLANT_1_1 +265 0x5333 //RX_FDDRC_SLANT_1_2 +266 0x5333 //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +286 0x0020 //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 +#VOL 3 +163 0x5000 //RX_TDDRC_ALPHA_UP_1 +164 0x5000 //RX_TDDRC_ALPHA_UP_2 +165 0x5000 //RX_TDDRC_ALPHA_UP_3 +166 0x2000 //RX_TDDRC_ALPHA_UP_4 +184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +190 0x65AD //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +269 0x0000 //RX_TDDRC_THRD_0 +270 0x0000 //RX_TDDRC_THRD_1 +271 0x1A00 //RX_TDDRC_THRD_2 +272 0x1A00 //RX_TDDRC_THRD_3 +273 0x3000 //RX_TDDRC_SLANT_0 +274 0x7EB8 //RX_TDDRC_SLANT_1 +275 0x5000 //RX_TDDRC_ALPHA_UP_0 +276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x199A //RX_TDDRC_HMNC_GAIN +279 0x0001 //RX_TDDRC_SMT_FLAG +280 0x0CCD //RX_TDDRC_SMT_W +281 0x01C8 //RX_TDDRC_DRC_GAIN +195 0x0020 //RX_FDEQ_SUBNUM +196 0x4848 //RX_FDEQ_GAIN_0 +197 0x4848 //RX_FDEQ_GAIN_1 +198 0x4848 //RX_FDEQ_GAIN_2 +199 0x4848 //RX_FDEQ_GAIN_3 +200 0x4848 //RX_FDEQ_GAIN_4 +201 0x4848 //RX_FDEQ_GAIN_5 +202 0x4848 //RX_FDEQ_GAIN_6 +203 0x4848 //RX_FDEQ_GAIN_7 +204 0x4848 //RX_FDEQ_GAIN_8 +205 0x4848 //RX_FDEQ_GAIN_9 +206 0x4848 //RX_FDEQ_GAIN_10 +207 0x4848 //RX_FDEQ_GAIN_11 +208 0x4848 //RX_FDEQ_GAIN_12 +209 0x4848 //RX_FDEQ_GAIN_13 +210 0x4848 //RX_FDEQ_GAIN_14 +211 0x4848 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0202 //RX_FDEQ_BIN_0 +221 0x0203 //RX_FDEQ_BIN_1 +222 0x0303 //RX_FDEQ_BIN_2 +223 0x0304 //RX_FDEQ_BIN_3 +224 0x0405 //RX_FDEQ_BIN_4 +225 0x0506 //RX_FDEQ_BIN_5 +226 0x0708 //RX_FDEQ_BIN_6 +227 0x090A //RX_FDEQ_BIN_7 +228 0x0B0C //RX_FDEQ_BIN_8 +229 0x0D0E //RX_FDEQ_BIN_9 +230 0x1013 //RX_FDEQ_BIN_10 +231 0x1719 //RX_FDEQ_BIN_11 +232 0x1B1E //RX_FDEQ_BIN_12 +233 0x1E1E //RX_FDEQ_BIN_13 +234 0x1E28 //RX_FDEQ_BIN_14 +235 0x282C //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x4000 //RX_FDEQ_RESRV_0 +245 0x0320 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0030 //RX_FDDRC_BAND_MARGIN_1 +248 0x0050 //RX_FDDRC_BAND_MARGIN_2 +249 0x0080 //RX_FDDRC_BAND_MARGIN_3 +250 0x0007 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x5000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x6400 //RX_FDDRC_THRD_3_2 +258 0x6400 //RX_FDDRC_THRD_3_3 +259 0x2000 //RX_FDDRC_SLANT_0_0 +260 0x2000 //RX_FDDRC_SLANT_0_1 +261 0x2000 //RX_FDDRC_SLANT_0_2 +262 0x2000 //RX_FDDRC_SLANT_0_3 +263 0x5333 //RX_FDDRC_SLANT_1_0 +264 0x5333 //RX_FDDRC_SLANT_1_1 +265 0x5333 //RX_FDDRC_SLANT_1_2 +266 0x5333 //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +286 0x0036 //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 +#VOL 4 +163 0x5000 //RX_TDDRC_ALPHA_UP_1 +164 0x5000 //RX_TDDRC_ALPHA_UP_2 +165 0x5000 //RX_TDDRC_ALPHA_UP_3 +166 0x2000 //RX_TDDRC_ALPHA_UP_4 +184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +190 0x65AD //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +269 0x0000 //RX_TDDRC_THRD_0 +270 0x0000 //RX_TDDRC_THRD_1 +271 0x1A00 //RX_TDDRC_THRD_2 +272 0x1A00 //RX_TDDRC_THRD_3 +273 0x3000 //RX_TDDRC_SLANT_0 +274 0x7EB8 //RX_TDDRC_SLANT_1 +275 0x5000 //RX_TDDRC_ALPHA_UP_0 +276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x199A //RX_TDDRC_HMNC_GAIN +279 0x0001 //RX_TDDRC_SMT_FLAG +280 0x0CCD //RX_TDDRC_SMT_W +281 0x01C8 //RX_TDDRC_DRC_GAIN +195 0x0020 //RX_FDEQ_SUBNUM +196 0x4848 //RX_FDEQ_GAIN_0 +197 0x4848 //RX_FDEQ_GAIN_1 +198 0x4848 //RX_FDEQ_GAIN_2 +199 0x4848 //RX_FDEQ_GAIN_3 +200 0x4848 //RX_FDEQ_GAIN_4 +201 0x4848 //RX_FDEQ_GAIN_5 +202 0x4848 //RX_FDEQ_GAIN_6 +203 0x4848 //RX_FDEQ_GAIN_7 +204 0x4848 //RX_FDEQ_GAIN_8 +205 0x4848 //RX_FDEQ_GAIN_9 +206 0x4848 //RX_FDEQ_GAIN_10 +207 0x4848 //RX_FDEQ_GAIN_11 +208 0x4848 //RX_FDEQ_GAIN_12 +209 0x4848 //RX_FDEQ_GAIN_13 +210 0x4848 //RX_FDEQ_GAIN_14 +211 0x4848 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0202 //RX_FDEQ_BIN_0 +221 0x0203 //RX_FDEQ_BIN_1 +222 0x0303 //RX_FDEQ_BIN_2 +223 0x0304 //RX_FDEQ_BIN_3 +224 0x0405 //RX_FDEQ_BIN_4 +225 0x0506 //RX_FDEQ_BIN_5 +226 0x0708 //RX_FDEQ_BIN_6 +227 0x090A //RX_FDEQ_BIN_7 +228 0x0B0C //RX_FDEQ_BIN_8 +229 0x0D0E //RX_FDEQ_BIN_9 +230 0x1013 //RX_FDEQ_BIN_10 +231 0x1719 //RX_FDEQ_BIN_11 +232 0x1B1E //RX_FDEQ_BIN_12 +233 0x1E1E //RX_FDEQ_BIN_13 +234 0x1E28 //RX_FDEQ_BIN_14 +235 0x282C //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x4000 //RX_FDEQ_RESRV_0 +245 0x0320 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0030 //RX_FDDRC_BAND_MARGIN_1 +248 0x0050 //RX_FDDRC_BAND_MARGIN_2 +249 0x0080 //RX_FDDRC_BAND_MARGIN_3 +250 0x0007 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x5000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x6400 //RX_FDDRC_THRD_3_2 +258 0x6400 //RX_FDDRC_THRD_3_3 +259 0x2000 //RX_FDDRC_SLANT_0_0 +260 0x2000 //RX_FDDRC_SLANT_0_1 +261 0x2000 //RX_FDDRC_SLANT_0_2 +262 0x2000 //RX_FDDRC_SLANT_0_3 +263 0x5333 //RX_FDDRC_SLANT_1_0 +264 0x5333 //RX_FDDRC_SLANT_1_1 +265 0x5333 //RX_FDDRC_SLANT_1_2 +266 0x5333 //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +286 0x005B //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 +#VOL 5 +163 0x5000 //RX_TDDRC_ALPHA_UP_1 +164 0x5000 //RX_TDDRC_ALPHA_UP_2 +165 0x5000 //RX_TDDRC_ALPHA_UP_3 +166 0x2000 //RX_TDDRC_ALPHA_UP_4 +184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +190 0x65AD //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +269 0x0000 //RX_TDDRC_THRD_0 +270 0x0000 //RX_TDDRC_THRD_1 +271 0x1A00 //RX_TDDRC_THRD_2 +272 0x1A00 //RX_TDDRC_THRD_3 +273 0x3000 //RX_TDDRC_SLANT_0 +274 0x7EB8 //RX_TDDRC_SLANT_1 +275 0x5000 //RX_TDDRC_ALPHA_UP_0 +276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x199A //RX_TDDRC_HMNC_GAIN +279 0x0001 //RX_TDDRC_SMT_FLAG +280 0x0CCD //RX_TDDRC_SMT_W +281 0x01C8 //RX_TDDRC_DRC_GAIN +195 0x0020 //RX_FDEQ_SUBNUM +196 0x4848 //RX_FDEQ_GAIN_0 +197 0x4848 //RX_FDEQ_GAIN_1 +198 0x4848 //RX_FDEQ_GAIN_2 +199 0x4848 //RX_FDEQ_GAIN_3 +200 0x4848 //RX_FDEQ_GAIN_4 +201 0x4848 //RX_FDEQ_GAIN_5 +202 0x4848 //RX_FDEQ_GAIN_6 +203 0x4848 //RX_FDEQ_GAIN_7 +204 0x4848 //RX_FDEQ_GAIN_8 +205 0x4848 //RX_FDEQ_GAIN_9 +206 0x4848 //RX_FDEQ_GAIN_10 +207 0x4848 //RX_FDEQ_GAIN_11 +208 0x4848 //RX_FDEQ_GAIN_12 +209 0x4848 //RX_FDEQ_GAIN_13 +210 0x4848 //RX_FDEQ_GAIN_14 +211 0x4848 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0202 //RX_FDEQ_BIN_0 +221 0x0203 //RX_FDEQ_BIN_1 +222 0x0303 //RX_FDEQ_BIN_2 +223 0x0304 //RX_FDEQ_BIN_3 +224 0x0405 //RX_FDEQ_BIN_4 +225 0x0506 //RX_FDEQ_BIN_5 +226 0x0708 //RX_FDEQ_BIN_6 +227 0x090A //RX_FDEQ_BIN_7 +228 0x0B0C //RX_FDEQ_BIN_8 +229 0x0D0E //RX_FDEQ_BIN_9 +230 0x1013 //RX_FDEQ_BIN_10 +231 0x1719 //RX_FDEQ_BIN_11 +232 0x1B1E //RX_FDEQ_BIN_12 +233 0x1E1E //RX_FDEQ_BIN_13 +234 0x1E28 //RX_FDEQ_BIN_14 +235 0x282C //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x4000 //RX_FDEQ_RESRV_0 +245 0x0320 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0030 //RX_FDDRC_BAND_MARGIN_1 +248 0x0050 //RX_FDDRC_BAND_MARGIN_2 +249 0x0080 //RX_FDDRC_BAND_MARGIN_3 +250 0x0007 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x5000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x6400 //RX_FDDRC_THRD_3_2 +258 0x6400 //RX_FDDRC_THRD_3_3 +259 0x2000 //RX_FDDRC_SLANT_0_0 +260 0x2000 //RX_FDDRC_SLANT_0_1 +261 0x2000 //RX_FDDRC_SLANT_0_2 +262 0x2000 //RX_FDDRC_SLANT_0_3 +263 0x5333 //RX_FDDRC_SLANT_1_0 +264 0x5333 //RX_FDDRC_SLANT_1_1 +265 0x5333 //RX_FDDRC_SLANT_1_2 +266 0x5333 //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +286 0x0099 //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 +#VOL 6 +163 0x5000 //RX_TDDRC_ALPHA_UP_1 +164 0x5000 //RX_TDDRC_ALPHA_UP_2 +165 0x5000 //RX_TDDRC_ALPHA_UP_3 +166 0x2000 //RX_TDDRC_ALPHA_UP_4 +184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +190 0x65AD //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +269 0x0000 //RX_TDDRC_THRD_0 +270 0x0000 //RX_TDDRC_THRD_1 +271 0x1A00 //RX_TDDRC_THRD_2 +272 0x1A00 //RX_TDDRC_THRD_3 +273 0x3000 //RX_TDDRC_SLANT_0 +274 0x7EB8 //RX_TDDRC_SLANT_1 +275 0x5000 //RX_TDDRC_ALPHA_UP_0 +276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x199A //RX_TDDRC_HMNC_GAIN +279 0x0001 //RX_TDDRC_SMT_FLAG +280 0x0CCD //RX_TDDRC_SMT_W +281 0x01C8 //RX_TDDRC_DRC_GAIN +195 0x0020 //RX_FDEQ_SUBNUM +196 0x4848 //RX_FDEQ_GAIN_0 +197 0x4848 //RX_FDEQ_GAIN_1 +198 0x4848 //RX_FDEQ_GAIN_2 +199 0x4848 //RX_FDEQ_GAIN_3 +200 0x4848 //RX_FDEQ_GAIN_4 +201 0x4848 //RX_FDEQ_GAIN_5 +202 0x4848 //RX_FDEQ_GAIN_6 +203 0x4848 //RX_FDEQ_GAIN_7 +204 0x4848 //RX_FDEQ_GAIN_8 +205 0x4848 //RX_FDEQ_GAIN_9 +206 0x4848 //RX_FDEQ_GAIN_10 +207 0x4848 //RX_FDEQ_GAIN_11 +208 0x4848 //RX_FDEQ_GAIN_12 +209 0x4848 //RX_FDEQ_GAIN_13 +210 0x4848 //RX_FDEQ_GAIN_14 +211 0x4848 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0202 //RX_FDEQ_BIN_0 +221 0x0203 //RX_FDEQ_BIN_1 +222 0x0303 //RX_FDEQ_BIN_2 +223 0x0304 //RX_FDEQ_BIN_3 +224 0x0405 //RX_FDEQ_BIN_4 +225 0x0506 //RX_FDEQ_BIN_5 +226 0x0708 //RX_FDEQ_BIN_6 +227 0x090A //RX_FDEQ_BIN_7 +228 0x0B0C //RX_FDEQ_BIN_8 +229 0x0D0E //RX_FDEQ_BIN_9 +230 0x1013 //RX_FDEQ_BIN_10 +231 0x1719 //RX_FDEQ_BIN_11 +232 0x1B1E //RX_FDEQ_BIN_12 +233 0x1E1E //RX_FDEQ_BIN_13 +234 0x1E28 //RX_FDEQ_BIN_14 +235 0x282C //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x4000 //RX_FDEQ_RESRV_0 +245 0x0320 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0030 //RX_FDDRC_BAND_MARGIN_1 +248 0x0050 //RX_FDDRC_BAND_MARGIN_2 +249 0x0080 //RX_FDDRC_BAND_MARGIN_3 +250 0x0007 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x5000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x6400 //RX_FDDRC_THRD_3_2 +258 0x6400 //RX_FDDRC_THRD_3_3 +259 0x2000 //RX_FDDRC_SLANT_0_0 +260 0x2000 //RX_FDDRC_SLANT_0_1 +261 0x2000 //RX_FDDRC_SLANT_0_2 +262 0x2000 //RX_FDDRC_SLANT_0_3 +263 0x5333 //RX_FDDRC_SLANT_1_0 +264 0x5333 //RX_FDDRC_SLANT_1_1 +265 0x5333 //RX_FDDRC_SLANT_1_2 +266 0x5333 //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +286 0x0100 //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 #CASE_NAME HEADSET-GOOGLE_CONDOR-VOICE_GENERIC-FB -#PARAM_MODE FULL -#PARAM_TYPE TX+RX -#TOTAL_CUSTOM_STEP 7 +#PARAM_MODE Full +#PARAM_TYPE TX+2RX +#TOTAL_CUSTOM_STEP 7+7 #TX 0 0x0009 //TX_OPERATION_MODE_0 1 0x0009 //TX_OPERATION_MODE_1 @@ -12537,10 +18949,10 @@ 248 0xF600 //TX_THR_SN_EST_6 249 0xF600 //TX_THR_SN_EST_7 250 0x0200 //TX_DELTA_THR_SN_EST_0 -251 0x0200 //TX_DELTA_THR_SN_EST_1 -252 0x0400 //TX_DELTA_THR_SN_EST_2 -253 0x0300 //TX_DELTA_THR_SN_EST_3 -254 0x0600 //TX_DELTA_THR_SN_EST_4 +251 0x0400 //TX_DELTA_THR_SN_EST_1 +252 0x0300 //TX_DELTA_THR_SN_EST_2 +253 0x0600 //TX_DELTA_THR_SN_EST_3 +254 0x0200 //TX_DELTA_THR_SN_EST_4 255 0x0200 //TX_DELTA_THR_SN_EST_5 256 0x0200 //TX_DELTA_THR_SN_EST_6 257 0x0200 //TX_DELTA_THR_SN_EST_7 @@ -12568,31 +18980,31 @@ 279 0x2000 //TX_B_POST_FLT_0 280 0x2000 //TX_B_POST_FLT_1 281 0x0012 //TX_NS_LVL_CTRL_0 -282 0x0019 //TX_NS_LVL_CTRL_1 +282 0x0016 //TX_NS_LVL_CTRL_1 283 0x0016 //TX_NS_LVL_CTRL_2 -284 0x0016 //TX_NS_LVL_CTRL_3 -285 0x0019 //TX_NS_LVL_CTRL_4 +284 0x0019 //TX_NS_LVL_CTRL_3 +285 0x0010 //TX_NS_LVL_CTRL_4 286 0x0010 //TX_NS_LVL_CTRL_5 -287 0x0010 //TX_NS_LVL_CTRL_6 +287 0x0019 //TX_NS_LVL_CTRL_6 288 0x0010 //TX_NS_LVL_CTRL_7 289 0x000C //TX_MIN_GAIN_S_0 -290 0x0011 //TX_MIN_GAIN_S_1 +290 0x000C //TX_MIN_GAIN_S_1 291 0x000C //TX_MIN_GAIN_S_2 -292 0x000C //TX_MIN_GAIN_S_3 -293 0x000F //TX_MIN_GAIN_S_4 +292 0x000F //TX_MIN_GAIN_S_3 +293 0x000C //TX_MIN_GAIN_S_4 294 0x000C //TX_MIN_GAIN_S_5 -295 0x000C //TX_MIN_GAIN_S_6 +295 0x0011 //TX_MIN_GAIN_S_6 296 0x000C //TX_MIN_GAIN_S_7 297 0x7FFF //TX_NMOS_SUP 298 0x0000 //TX_NS_MAX_PRI_SNR_TH 299 0x0000 //TX_NMOS_SUP_MENSA 300 0x7000 //TX_SNRI_SUP_0 -301 0x6000 //TX_SNRI_SUP_1 +301 0x7000 //TX_SNRI_SUP_1 302 0x7000 //TX_SNRI_SUP_2 -303 0x7000 //TX_SNRI_SUP_3 -304 0x6000 //TX_SNRI_SUP_4 +303 0x6000 //TX_SNRI_SUP_3 +304 0x7FFF //TX_SNRI_SUP_4 305 0x7FFF //TX_SNRI_SUP_5 -306 0x7FFF //TX_SNRI_SUP_6 +306 0x6000 //TX_SNRI_SUP_6 307 0x7FFF //TX_SNRI_SUP_7 308 0x7FFF //TX_THR_LFNS 309 0x0016 //TX_G_LFNS @@ -12609,8 +19021,8 @@ 320 0x6000 //TX_A_POST_FILT_S_6 321 0x6000 //TX_A_POST_FILT_S_7 322 0x2000 //TX_B_POST_FILT_0 -323 0x2000 //TX_B_POST_FILT_1 -324 0x4000 //TX_B_POST_FILT_2 +323 0x4000 //TX_B_POST_FILT_1 +324 0x2000 //TX_B_POST_FILT_2 325 0x2000 //TX_B_POST_FILT_3 326 0x2000 //TX_B_POST_FILT_4 327 0x2000 //TX_B_POST_FILT_5 @@ -12653,7 +19065,7 @@ 364 0x0000 //TX_K_APT 365 0x0001 //TX_NOISEDET 366 0x0190 //TX_NDETCT -367 0x0020 //TX_NOISE_TH_0 +367 0x04E8 //TX_NOISE_TH_0 368 0x7FFF //TX_NOISE_TH_0_2 369 0x7FFF //TX_NOISE_TH_0_3 370 0x02A6 //TX_NOISE_TH_1 @@ -12665,11 +19077,11 @@ 376 0x0001 //TX_NOISE_TH_5_3 377 0x0000 //TX_NOISE_TH_5_4 378 0x02BC //TX_NOISE_TH_6 -379 0x0020 //TX_MINENOISE_TH -380 0x4000 //TX_MINENOISE_MIC0_TH_MTS -381 0xFFEE //TX_MINENOISE_MIC0_TH_EXP -382 0x6000 //TX_MINENOISE_MIC0_S_TH_MTS -383 0xFFF3 //TX_MINENOISE_MIC0_S_TH_EXP +379 0x02BC //TX_MINENOISE_TH +380 0xD508 //TX_MORENS_TFMASK_TH +381 0x0001 //TX_DRC_QUIET_FLOOR +382 0x3A98 //TX_RATIODTL_CUT_TH +383 0x1482 //TX_DT_CUT_K1 384 0x0666 //TX_OUT_ENER_S_TH_CLEAN 385 0x0666 //TX_OUT_ENER_S_TH_LESSCLEAN 386 0x0333 //TX_OUT_ENER_S_TH_NOISY @@ -12677,22 +19089,22 @@ 388 0x0333 //TX_OUT_ENER_TH_SPEECH 389 0x2000 //TX_SN_NPB_GAIN 390 0x0000 //TX_NN_NPB_GAIN -391 0x0000 //TX_CSX_ALPHA_0 -392 0x0000 //TX_CSX_ALPHA_1 -393 0x0000 //TX_CSX_ALPHA_2 -394 0x0000 //TX_CSX_ALPHA_3 -395 0x0800 //TX_MU_ARSP_EST -396 0x00C8 //TX_P_OUTBEAM_MIN_TH +391 0x7FFF //TX_POST_MASK_SUP_HSNE +392 0x1388 //TX_TAIL_DET_TH +393 0x4000 //TX_B_LESSCUT_RTO_WTA +394 0x0000 //TX_MEL_G_R +395 0x0080 //TX_SUPHIGH_TH +396 0x0000 //TX_MASK_G_R 397 0x0002 //TX_EXTRA_NS_L -398 0x0800 //TX_EXTRA_NS_A -399 0x0005 //TX_VR_NOISE_FLOOR_TH +398 0x1800 //TX_C_POST_FLT_MASK +399 0x7FFF //TX_A_POST_FLT_WNS 400 0x0148 //TX_MIN_G_LOW300HZ 401 0x0004 //TX_MAXLEVEL_CNG 402 0x00B4 //TX_STN_NOISE_TH 403 0x4000 //TX_POST_MASK_SUP 404 0x7FFF //TX_POST_MASK_ADJUST 405 0x00C8 //TX_NS_ENOISE_MIC0_TH -406 0x0020 //TX_MINENOISE_MIC0_TH +406 0x04E7 //TX_MINENOISE_MIC0_TH 407 0x012C //TX_MINENOISE_MIC0_S_TH 408 0x2900 //TX_MIN_G_CTRL_SSNS 409 0x0800 //TX_METAL_RTO_THR @@ -12800,16 +19212,16 @@ 511 0x6666 //TX_MIC_TO_BFGAIN 512 0x0000 //TX_MICTOBFGAIN0 513 0x0000 //TX_FASTMUE_TH -514 0x0000 //TX_DERVB_LEN_0 -515 0x0000 //TX_DERVB_LEN_1 -516 0x0000 //TX_RHO_DERVB -517 0x0000 //TX_MIC_INDX_DERVB -518 0x0000 //TX_MU_DERVB -519 0x0000 //TX_DR_RESRV_0 -520 0x0000 //TX_DR_RESRV_1 -521 0x0000 //TX_DR_RESRV_2 -522 0x0000 //TX_DR_RESRV_3 -523 0x0000 //TX_DR_RESRV_4 +514 0xC000 //TX_DEREVERB_LF_MU +515 0xC000 //TX_DEREVERB_HF_MU +516 0xCCCC //TX_DEREVERB_DELAY +517 0xD999 //TX_DEREVERB_COEF_LEN +518 0x1F40 //TX_DEREVERB_DNR +519 0x0000 //TX_DEREVERB_ALPHA +520 0x0000 //TX_DEREVERB_BETA +521 0x0000 //TX_GSC_RTOL_TH +522 0x7000 //TX_GSC_RTOH_TH +523 0x0064 //TX_WIDE2_MEANHTH 524 0x0000 //TX_DR_RESRV_5 525 0x0000 //TX_DR_RESRV_6 526 0x0000 //TX_DR_RESRV_7 @@ -13183,8 +19595,73 @@ 894 0xC000 //TX_FASTNS_SSA_THHFL 895 0xCCCC //TX_FASTNS_SSA_THLFH 896 0xD999 //TX_FASTNS_SSA_THHFH +897 0x2339 //TX_SENDFUNC_REG_MICMUTE +898 0x0021 //TX_SENDFUNC_REG_MICMUTE1 +899 0x02BC //TX_MICMUTE_RATIO_THR +900 0x0140 //TX_MICMUTE_AMP_THR +901 0x0004 //TX_MICMUTE_HPF_IND +902 0x00C0 //TX_MICMUTE_LOG_EYR_TH +903 0x0008 //TX_MICMUTE_CVG_TIME +904 0x0008 //TX_MICMUTE_RELEASE_TIME +905 0x01FE //TX_MIC_VOLUME_MIC0MUTE +906 0x0020 //TX_MICMUTE_EPD_OFFSET_0 +907 0x001E //TX_MICMUTE_FRQ_AEC_L +908 0x7999 //TX_MICMUTE_EAD_THR +909 0x7FFF //TX_MICMUTE_LAMBDA_CB_NLE +910 0x7FFF //TX_MICMUTE_LAMBDA_RE_EST +911 0x4000 //TX_DTD_THR1_MICMUTE_0 +912 0x7000 //TX_DTD_THR1_MICMUTE_1 +913 0x7FFF //TX_DTD_THR1_MICMUTE_2 +914 0x7FFF //TX_DTD_THR1_MICMUTE_3 +915 0x6CCC //TX_DTD_THR2_MICMUTE_0 +916 0x0400 //TX_MICMUTE_MIN_EQ_RE_EST_0 +917 0x0400 //TX_MICMUTE_MIN_EQ_RE_EST_1 +918 0x1000 //TX_MICMUTE_MIN_EQ_RE_EST_2 +919 0x7FFF //TX_MICMUTE_MIN_EQ_RE_EST_3 +920 0x7FFF //TX_MICMUTE_MIN_EQ_RE_EST_4 +921 0x4000 //TX_MICMUTE_C_POST_FLT +922 0x03E8 //TX_MICMUTE_DT_CUT_K +923 0x0001 //TX_MICMUTE_DT_CUT_THR +924 0x03E8 //TX_MICMUTE_DT_CUT_K2 +925 0x0001 //TX_MICMUTE_DT_CUT_THR2 +926 0x0064 //TX_MICMUTE_DT2_HOLD_N +927 0x1000 //TX_MICMUTE_RATIODTH_THCUT +928 0x1000 //TX_MICMUTE_B_POST_FLT_ECHOL +929 0x7FFF //TX_MICMUTE_B_POST_FLT_ECHOH +930 0x0400 //TX_MICMUTE_C_POST_FLT_MASK +931 0x7999 //TX_MICMUTE_RATIODTL_CUT_TH +932 0x0258 //TX_MICMUTE_DT_CUT_K1 +933 0x0800 //TX_MICMUTE_N2_SN_EST +934 0xFC00 //TX_MICMUTE_THR_SN_EST_0 +935 0x001C //TX_MICMUTE_MIN_G_CTRL_0 +936 0x6000 //TX_MICMUTE_A_POST_FILT_S_0 +937 0x7000 //TX_MICMUTE_B_POST_FILT_0 +938 0x2710 //TX_MIC1RUB_AMP_THR +939 0x0010 //TX_MIC1MUTE_RATIO_THR +940 0x0450 //TX_MIC1MUTE_AMP_THR +941 0x0008 //TX_MIC1MUTE_CVG_TIME +942 0x0008 //TX_MIC1MUTE_RELEASE_TIME +943 0x0000 //TX_AMS_RESRV_01 +944 0x0000 //TX_AMS_RESRV_02 +945 0x0000 //TX_AMS_RESRV_03 +946 0x0000 //TX_AMS_RESRV_04 +947 0x0000 //TX_AMS_RESRV_05 +948 0x0000 //TX_AMS_RESRV_06 +949 0x0000 //TX_AMS_RESRV_07 +950 0x0000 //TX_AMS_RESRV_08 +951 0x0000 //TX_AMS_RESRV_09 +952 0x0000 //TX_AMS_RESRV_10 +953 0x0000 //TX_AMS_RESRV_11 +954 0x0000 //TX_AMS_RESRV_12 +955 0x0000 //TX_AMS_RESRV_13 +956 0x0000 //TX_AMS_RESRV_14 +957 0x0000 //TX_AMS_RESRV_15 +958 0x0000 //TX_AMS_RESRV_16 +959 0x0000 //TX_AMS_RESRV_17 +960 0x0000 //TX_AMS_RESRV_18 +961 0x0000 //TX_AMS_RESRV_19 #RX -0 0x002C //RX_RECVFUNC_MODE_0 +0 0x202C //RX_RECVFUNC_MODE_0 1 0x0000 //RX_RECVFUNC_MODE_1 2 0x0004 //RX_SAMPLINGFREQ_SIG 3 0x0004 //RX_SAMPLINGFREQ_PROC @@ -14034,11 +20511,862 @@ 110 0x0000 //RX_FDDRC_RESRV_0 129 0x0100 //RX_SPK_VOL 130 0x0000 //RX_VOL_RESRV_0 +#RX 2 +157 0x202C //RX_RECVFUNC_MODE_0 +158 0x0000 //RX_RECVFUNC_MODE_1 +159 0x0004 //RX_SAMPLINGFREQ_SIG +160 0x0004 //RX_SAMPLINGFREQ_PROC +161 0x000A //RX_FRAME_SZ +162 0x0000 //RX_DELAY_OPT +163 0x1000 //RX_TDDRC_ALPHA_UP_1 +164 0x1000 //RX_TDDRC_ALPHA_UP_2 +165 0x1000 //RX_TDDRC_ALPHA_UP_3 +166 0x1000 //RX_TDDRC_ALPHA_UP_4 +167 0x0800 //RX_PGA +168 0x7B02 //RX_A_HP +169 0x4000 //RX_B_PE +170 0x7800 //RX_THR_PITCH_DET_0 +171 0x7000 //RX_THR_PITCH_DET_1 +172 0x6000 //RX_THR_PITCH_DET_2 +173 0x0008 //RX_PITCH_BFR_LEN +174 0x0003 //RX_SBD_PITCH_DET +175 0x0100 //RX_PP_RESRV_0 +176 0x0020 //RX_PP_RESRV_1 +177 0x0500 //RX_N_SN_EST +178 0x000C //RX_N2_SN_EST +179 0x000A //RX_NS_LVL_CTRL +180 0xF600 //RX_THR_SN_EST +181 0x7000 //RX_LAMBDA_PFILT +182 0x000A //RX_FENS_RESRV_0 +183 0x0190 //RX_FENS_RESRV_1 +184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +187 0x0002 //RX_EXTRA_NS_L +188 0x0800 //RX_EXTRA_NS_A +189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +190 0x7FFF //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +192 0x199A //RX_A_POST_FLT +193 0x0000 //RX_LMT_THRD +194 0x4000 //RX_LMT_ALPHA +195 0x0020 //RX_FDEQ_SUBNUM +196 0x4848 //RX_FDEQ_GAIN_0 +197 0x4848 //RX_FDEQ_GAIN_1 +198 0x4848 //RX_FDEQ_GAIN_2 +199 0x4848 //RX_FDEQ_GAIN_3 +200 0x4848 //RX_FDEQ_GAIN_4 +201 0x4848 //RX_FDEQ_GAIN_5 +202 0x4848 //RX_FDEQ_GAIN_6 +203 0x4848 //RX_FDEQ_GAIN_7 +204 0x4848 //RX_FDEQ_GAIN_8 +205 0x4848 //RX_FDEQ_GAIN_9 +206 0x4848 //RX_FDEQ_GAIN_10 +207 0x4848 //RX_FDEQ_GAIN_11 +208 0x4848 //RX_FDEQ_GAIN_12 +209 0x4848 //RX_FDEQ_GAIN_13 +210 0x4848 //RX_FDEQ_GAIN_14 +211 0x4848 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0202 //RX_FDEQ_BIN_0 +221 0x0203 //RX_FDEQ_BIN_1 +222 0x0304 //RX_FDEQ_BIN_2 +223 0x0405 //RX_FDEQ_BIN_3 +224 0x0607 //RX_FDEQ_BIN_4 +225 0x0809 //RX_FDEQ_BIN_5 +226 0x0A0B //RX_FDEQ_BIN_6 +227 0x0C0D //RX_FDEQ_BIN_7 +228 0x0E0F //RX_FDEQ_BIN_8 +229 0x1011 //RX_FDEQ_BIN_9 +230 0x1214 //RX_FDEQ_BIN_10 +231 0x1618 //RX_FDEQ_BIN_11 +232 0x1C1C //RX_FDEQ_BIN_12 +233 0x2020 //RX_FDEQ_BIN_13 +234 0x2020 //RX_FDEQ_BIN_14 +235 0x2011 //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x4000 //RX_FDEQ_RESRV_0 +245 0x0320 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0030 //RX_FDDRC_BAND_MARGIN_1 +248 0x0050 //RX_FDDRC_BAND_MARGIN_2 +249 0x0080 //RX_FDDRC_BAND_MARGIN_3 +250 0x0007 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x5000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x6400 //RX_FDDRC_THRD_3_2 +258 0x6400 //RX_FDDRC_THRD_3_3 +259 0x2000 //RX_FDDRC_SLANT_0_0 +260 0x2000 //RX_FDDRC_SLANT_0_1 +261 0x2000 //RX_FDDRC_SLANT_0_2 +262 0x2000 //RX_FDDRC_SLANT_0_3 +263 0x5333 //RX_FDDRC_SLANT_1_0 +264 0x5333 //RX_FDDRC_SLANT_1_1 +265 0x5333 //RX_FDDRC_SLANT_1_2 +266 0x5333 //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +268 0x0002 //RX_FILTINDX +269 0x0000 //RX_TDDRC_THRD_0 +270 0x0000 //RX_TDDRC_THRD_1 +271 0x1200 //RX_TDDRC_THRD_2 +272 0x1900 //RX_TDDRC_THRD_3 +273 0x3000 //RX_TDDRC_SLANT_0 +274 0x6E00 //RX_TDDRC_SLANT_1 +275 0x1000 //RX_TDDRC_ALPHA_UP_0 +276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x199A //RX_TDDRC_HMNC_GAIN +279 0x0001 //RX_TDDRC_SMT_FLAG +280 0x0CCD //RX_TDDRC_SMT_W +281 0x0240 //RX_TDDRC_DRC_GAIN +282 0x7C00 //RX_LAMBDA_PKA_FP +283 0x2000 //RX_TPKA_FP +284 0x2000 //RX_MIN_G_FP +285 0x0080 //RX_MAX_G_FP +286 0x000B //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 +288 0x0000 //RX_MAXLEVEL_CNG +289 0x3000 //RX_BWE_UV_TH +290 0x3000 //RX_BWE_UV_TH2 +291 0x1800 //RX_BWE_UV_TH3 +292 0x1000 //RX_BWE_V_TH +293 0x04CD //RX_BWE_GAIN1_V_TH1 +294 0x0F33 //RX_BWE_GAIN1_V_TH2 +295 0x7333 //RX_BWE_UV_EQ +296 0x199A //RX_BWE_V_EQ +297 0x7333 //RX_BWE_TONE_TH +298 0x0004 //RX_BWE_UV_HOLD_T +299 0x6CCD //RX_BWE_GAIN2_ALPHA +300 0x799A //RX_BWE_GAIN3_ALPHA +301 0x001E //RX_BWE_CUTOFF +302 0x3000 //RX_BWE_GAINFILL +303 0x3200 //RX_BWE_MAXTH_TONE +304 0x2000 //RX_BWE_EQ_0 +305 0x2000 //RX_BWE_EQ_1 +306 0x2000 //RX_BWE_EQ_2 +307 0x2000 //RX_BWE_EQ_3 +308 0x2000 //RX_BWE_EQ_4 +309 0x2000 //RX_BWE_EQ_5 +310 0x2000 //RX_BWE_EQ_6 +311 0x0000 //RX_BWE_RESRV_0 +312 0x0000 //RX_BWE_RESRV_1 +313 0x0000 //RX_BWE_RESRV_2 +#VOL 0 +163 0x1000 //RX_TDDRC_ALPHA_UP_1 +164 0x1000 //RX_TDDRC_ALPHA_UP_2 +165 0x1000 //RX_TDDRC_ALPHA_UP_3 +166 0x1000 //RX_TDDRC_ALPHA_UP_4 +184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +190 0x7FFF //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +269 0x0000 //RX_TDDRC_THRD_0 +270 0x0000 //RX_TDDRC_THRD_1 +271 0x1200 //RX_TDDRC_THRD_2 +272 0x1900 //RX_TDDRC_THRD_3 +273 0x3000 //RX_TDDRC_SLANT_0 +274 0x6E00 //RX_TDDRC_SLANT_1 +275 0x1000 //RX_TDDRC_ALPHA_UP_0 +276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x199A //RX_TDDRC_HMNC_GAIN +279 0x0001 //RX_TDDRC_SMT_FLAG +280 0x0CCD //RX_TDDRC_SMT_W +281 0x0240 //RX_TDDRC_DRC_GAIN +195 0x0020 //RX_FDEQ_SUBNUM +196 0x4848 //RX_FDEQ_GAIN_0 +197 0x4848 //RX_FDEQ_GAIN_1 +198 0x4848 //RX_FDEQ_GAIN_2 +199 0x4848 //RX_FDEQ_GAIN_3 +200 0x4848 //RX_FDEQ_GAIN_4 +201 0x4848 //RX_FDEQ_GAIN_5 +202 0x4848 //RX_FDEQ_GAIN_6 +203 0x4848 //RX_FDEQ_GAIN_7 +204 0x4848 //RX_FDEQ_GAIN_8 +205 0x4848 //RX_FDEQ_GAIN_9 +206 0x4848 //RX_FDEQ_GAIN_10 +207 0x4848 //RX_FDEQ_GAIN_11 +208 0x4848 //RX_FDEQ_GAIN_12 +209 0x4848 //RX_FDEQ_GAIN_13 +210 0x4848 //RX_FDEQ_GAIN_14 +211 0x4848 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0202 //RX_FDEQ_BIN_0 +221 0x0203 //RX_FDEQ_BIN_1 +222 0x0304 //RX_FDEQ_BIN_2 +223 0x0405 //RX_FDEQ_BIN_3 +224 0x0607 //RX_FDEQ_BIN_4 +225 0x0809 //RX_FDEQ_BIN_5 +226 0x0A0B //RX_FDEQ_BIN_6 +227 0x0C0D //RX_FDEQ_BIN_7 +228 0x0E0F //RX_FDEQ_BIN_8 +229 0x1011 //RX_FDEQ_BIN_9 +230 0x1214 //RX_FDEQ_BIN_10 +231 0x1618 //RX_FDEQ_BIN_11 +232 0x1C1C //RX_FDEQ_BIN_12 +233 0x2020 //RX_FDEQ_BIN_13 +234 0x2020 //RX_FDEQ_BIN_14 +235 0x2011 //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x4000 //RX_FDEQ_RESRV_0 +245 0x0320 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0030 //RX_FDDRC_BAND_MARGIN_1 +248 0x0050 //RX_FDDRC_BAND_MARGIN_2 +249 0x0080 //RX_FDDRC_BAND_MARGIN_3 +250 0x0007 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x5000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x6400 //RX_FDDRC_THRD_3_2 +258 0x6400 //RX_FDDRC_THRD_3_3 +259 0x2000 //RX_FDDRC_SLANT_0_0 +260 0x2000 //RX_FDDRC_SLANT_0_1 +261 0x2000 //RX_FDDRC_SLANT_0_2 +262 0x2000 //RX_FDDRC_SLANT_0_3 +263 0x5333 //RX_FDDRC_SLANT_1_0 +264 0x5333 //RX_FDDRC_SLANT_1_1 +265 0x5333 //RX_FDDRC_SLANT_1_2 +266 0x5333 //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +286 0x000B //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 +#VOL 1 +163 0x1000 //RX_TDDRC_ALPHA_UP_1 +164 0x1000 //RX_TDDRC_ALPHA_UP_2 +165 0x1000 //RX_TDDRC_ALPHA_UP_3 +166 0x1000 //RX_TDDRC_ALPHA_UP_4 +184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +190 0x7FFF //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +269 0x0000 //RX_TDDRC_THRD_0 +270 0x0000 //RX_TDDRC_THRD_1 +271 0x1200 //RX_TDDRC_THRD_2 +272 0x1900 //RX_TDDRC_THRD_3 +273 0x3000 //RX_TDDRC_SLANT_0 +274 0x6E00 //RX_TDDRC_SLANT_1 +275 0x1000 //RX_TDDRC_ALPHA_UP_0 +276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x199A //RX_TDDRC_HMNC_GAIN +279 0x0001 //RX_TDDRC_SMT_FLAG +280 0x0CCD //RX_TDDRC_SMT_W +281 0x0240 //RX_TDDRC_DRC_GAIN +195 0x0020 //RX_FDEQ_SUBNUM +196 0x4848 //RX_FDEQ_GAIN_0 +197 0x4848 //RX_FDEQ_GAIN_1 +198 0x4848 //RX_FDEQ_GAIN_2 +199 0x4848 //RX_FDEQ_GAIN_3 +200 0x4848 //RX_FDEQ_GAIN_4 +201 0x4848 //RX_FDEQ_GAIN_5 +202 0x4848 //RX_FDEQ_GAIN_6 +203 0x4848 //RX_FDEQ_GAIN_7 +204 0x4848 //RX_FDEQ_GAIN_8 +205 0x4848 //RX_FDEQ_GAIN_9 +206 0x4848 //RX_FDEQ_GAIN_10 +207 0x4848 //RX_FDEQ_GAIN_11 +208 0x4848 //RX_FDEQ_GAIN_12 +209 0x4848 //RX_FDEQ_GAIN_13 +210 0x4848 //RX_FDEQ_GAIN_14 +211 0x4848 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0202 //RX_FDEQ_BIN_0 +221 0x0203 //RX_FDEQ_BIN_1 +222 0x0304 //RX_FDEQ_BIN_2 +223 0x0405 //RX_FDEQ_BIN_3 +224 0x0607 //RX_FDEQ_BIN_4 +225 0x0809 //RX_FDEQ_BIN_5 +226 0x0A0B //RX_FDEQ_BIN_6 +227 0x0C0D //RX_FDEQ_BIN_7 +228 0x0E0F //RX_FDEQ_BIN_8 +229 0x1011 //RX_FDEQ_BIN_9 +230 0x1214 //RX_FDEQ_BIN_10 +231 0x1618 //RX_FDEQ_BIN_11 +232 0x1C1C //RX_FDEQ_BIN_12 +233 0x2020 //RX_FDEQ_BIN_13 +234 0x2020 //RX_FDEQ_BIN_14 +235 0x2011 //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x4000 //RX_FDEQ_RESRV_0 +245 0x0320 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0030 //RX_FDDRC_BAND_MARGIN_1 +248 0x0050 //RX_FDDRC_BAND_MARGIN_2 +249 0x0080 //RX_FDDRC_BAND_MARGIN_3 +250 0x0007 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x5000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x6400 //RX_FDDRC_THRD_3_2 +258 0x6400 //RX_FDDRC_THRD_3_3 +259 0x2000 //RX_FDDRC_SLANT_0_0 +260 0x2000 //RX_FDDRC_SLANT_0_1 +261 0x2000 //RX_FDDRC_SLANT_0_2 +262 0x2000 //RX_FDDRC_SLANT_0_3 +263 0x5333 //RX_FDDRC_SLANT_1_0 +264 0x5333 //RX_FDDRC_SLANT_1_1 +265 0x5333 //RX_FDDRC_SLANT_1_2 +266 0x5333 //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +286 0x0013 //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 +#VOL 2 +163 0x1000 //RX_TDDRC_ALPHA_UP_1 +164 0x1000 //RX_TDDRC_ALPHA_UP_2 +165 0x1000 //RX_TDDRC_ALPHA_UP_3 +166 0x1000 //RX_TDDRC_ALPHA_UP_4 +184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +190 0x7FFF //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +269 0x0000 //RX_TDDRC_THRD_0 +270 0x0000 //RX_TDDRC_THRD_1 +271 0x1200 //RX_TDDRC_THRD_2 +272 0x1900 //RX_TDDRC_THRD_3 +273 0x3000 //RX_TDDRC_SLANT_0 +274 0x6E00 //RX_TDDRC_SLANT_1 +275 0x1000 //RX_TDDRC_ALPHA_UP_0 +276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x199A //RX_TDDRC_HMNC_GAIN +279 0x0001 //RX_TDDRC_SMT_FLAG +280 0x0CCD //RX_TDDRC_SMT_W +281 0x0240 //RX_TDDRC_DRC_GAIN +195 0x0020 //RX_FDEQ_SUBNUM +196 0x4848 //RX_FDEQ_GAIN_0 +197 0x4848 //RX_FDEQ_GAIN_1 +198 0x4848 //RX_FDEQ_GAIN_2 +199 0x4848 //RX_FDEQ_GAIN_3 +200 0x4848 //RX_FDEQ_GAIN_4 +201 0x4848 //RX_FDEQ_GAIN_5 +202 0x4848 //RX_FDEQ_GAIN_6 +203 0x4848 //RX_FDEQ_GAIN_7 +204 0x4848 //RX_FDEQ_GAIN_8 +205 0x4848 //RX_FDEQ_GAIN_9 +206 0x4848 //RX_FDEQ_GAIN_10 +207 0x4848 //RX_FDEQ_GAIN_11 +208 0x4848 //RX_FDEQ_GAIN_12 +209 0x4848 //RX_FDEQ_GAIN_13 +210 0x4848 //RX_FDEQ_GAIN_14 +211 0x4848 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0202 //RX_FDEQ_BIN_0 +221 0x0203 //RX_FDEQ_BIN_1 +222 0x0304 //RX_FDEQ_BIN_2 +223 0x0405 //RX_FDEQ_BIN_3 +224 0x0607 //RX_FDEQ_BIN_4 +225 0x0809 //RX_FDEQ_BIN_5 +226 0x0A0B //RX_FDEQ_BIN_6 +227 0x0C0D //RX_FDEQ_BIN_7 +228 0x0E0F //RX_FDEQ_BIN_8 +229 0x1011 //RX_FDEQ_BIN_9 +230 0x1214 //RX_FDEQ_BIN_10 +231 0x1618 //RX_FDEQ_BIN_11 +232 0x1C1C //RX_FDEQ_BIN_12 +233 0x2020 //RX_FDEQ_BIN_13 +234 0x2020 //RX_FDEQ_BIN_14 +235 0x2011 //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x4000 //RX_FDEQ_RESRV_0 +245 0x0320 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0030 //RX_FDDRC_BAND_MARGIN_1 +248 0x0050 //RX_FDDRC_BAND_MARGIN_2 +249 0x0080 //RX_FDDRC_BAND_MARGIN_3 +250 0x0007 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x5000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x6400 //RX_FDDRC_THRD_3_2 +258 0x6400 //RX_FDDRC_THRD_3_3 +259 0x2000 //RX_FDDRC_SLANT_0_0 +260 0x2000 //RX_FDDRC_SLANT_0_1 +261 0x2000 //RX_FDDRC_SLANT_0_2 +262 0x2000 //RX_FDDRC_SLANT_0_3 +263 0x5333 //RX_FDDRC_SLANT_1_0 +264 0x5333 //RX_FDDRC_SLANT_1_1 +265 0x5333 //RX_FDDRC_SLANT_1_2 +266 0x5333 //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +286 0x0020 //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 +#VOL 3 +163 0x1000 //RX_TDDRC_ALPHA_UP_1 +164 0x1000 //RX_TDDRC_ALPHA_UP_2 +165 0x1000 //RX_TDDRC_ALPHA_UP_3 +166 0x1000 //RX_TDDRC_ALPHA_UP_4 +184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +190 0x7FFF //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +269 0x0000 //RX_TDDRC_THRD_0 +270 0x0000 //RX_TDDRC_THRD_1 +271 0x1200 //RX_TDDRC_THRD_2 +272 0x1900 //RX_TDDRC_THRD_3 +273 0x3000 //RX_TDDRC_SLANT_0 +274 0x6E00 //RX_TDDRC_SLANT_1 +275 0x1000 //RX_TDDRC_ALPHA_UP_0 +276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x199A //RX_TDDRC_HMNC_GAIN +279 0x0001 //RX_TDDRC_SMT_FLAG +280 0x0CCD //RX_TDDRC_SMT_W +281 0x0240 //RX_TDDRC_DRC_GAIN +195 0x0020 //RX_FDEQ_SUBNUM +196 0x4848 //RX_FDEQ_GAIN_0 +197 0x4848 //RX_FDEQ_GAIN_1 +198 0x4848 //RX_FDEQ_GAIN_2 +199 0x4848 //RX_FDEQ_GAIN_3 +200 0x4848 //RX_FDEQ_GAIN_4 +201 0x4848 //RX_FDEQ_GAIN_5 +202 0x4848 //RX_FDEQ_GAIN_6 +203 0x4848 //RX_FDEQ_GAIN_7 +204 0x4848 //RX_FDEQ_GAIN_8 +205 0x4848 //RX_FDEQ_GAIN_9 +206 0x4848 //RX_FDEQ_GAIN_10 +207 0x4848 //RX_FDEQ_GAIN_11 +208 0x4848 //RX_FDEQ_GAIN_12 +209 0x4848 //RX_FDEQ_GAIN_13 +210 0x4848 //RX_FDEQ_GAIN_14 +211 0x4848 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0202 //RX_FDEQ_BIN_0 +221 0x0203 //RX_FDEQ_BIN_1 +222 0x0304 //RX_FDEQ_BIN_2 +223 0x0405 //RX_FDEQ_BIN_3 +224 0x0607 //RX_FDEQ_BIN_4 +225 0x0809 //RX_FDEQ_BIN_5 +226 0x0A0B //RX_FDEQ_BIN_6 +227 0x0C0D //RX_FDEQ_BIN_7 +228 0x0E0F //RX_FDEQ_BIN_8 +229 0x1011 //RX_FDEQ_BIN_9 +230 0x1214 //RX_FDEQ_BIN_10 +231 0x1618 //RX_FDEQ_BIN_11 +232 0x1C1C //RX_FDEQ_BIN_12 +233 0x2020 //RX_FDEQ_BIN_13 +234 0x2020 //RX_FDEQ_BIN_14 +235 0x2011 //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x4000 //RX_FDEQ_RESRV_0 +245 0x0320 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0030 //RX_FDDRC_BAND_MARGIN_1 +248 0x0050 //RX_FDDRC_BAND_MARGIN_2 +249 0x0080 //RX_FDDRC_BAND_MARGIN_3 +250 0x0007 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x5000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x6400 //RX_FDDRC_THRD_3_2 +258 0x6400 //RX_FDDRC_THRD_3_3 +259 0x2000 //RX_FDDRC_SLANT_0_0 +260 0x2000 //RX_FDDRC_SLANT_0_1 +261 0x2000 //RX_FDDRC_SLANT_0_2 +262 0x2000 //RX_FDDRC_SLANT_0_3 +263 0x5333 //RX_FDDRC_SLANT_1_0 +264 0x5333 //RX_FDDRC_SLANT_1_1 +265 0x5333 //RX_FDDRC_SLANT_1_2 +266 0x5333 //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +286 0x0036 //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 +#VOL 4 +163 0x1000 //RX_TDDRC_ALPHA_UP_1 +164 0x1000 //RX_TDDRC_ALPHA_UP_2 +165 0x1000 //RX_TDDRC_ALPHA_UP_3 +166 0x1000 //RX_TDDRC_ALPHA_UP_4 +184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +190 0x7FFF //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +269 0x0000 //RX_TDDRC_THRD_0 +270 0x0000 //RX_TDDRC_THRD_1 +271 0x1200 //RX_TDDRC_THRD_2 +272 0x1900 //RX_TDDRC_THRD_3 +273 0x3000 //RX_TDDRC_SLANT_0 +274 0x6E00 //RX_TDDRC_SLANT_1 +275 0x1000 //RX_TDDRC_ALPHA_UP_0 +276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x199A //RX_TDDRC_HMNC_GAIN +279 0x0001 //RX_TDDRC_SMT_FLAG +280 0x0CCD //RX_TDDRC_SMT_W +281 0x0240 //RX_TDDRC_DRC_GAIN +195 0x0020 //RX_FDEQ_SUBNUM +196 0x4848 //RX_FDEQ_GAIN_0 +197 0x4848 //RX_FDEQ_GAIN_1 +198 0x4848 //RX_FDEQ_GAIN_2 +199 0x4848 //RX_FDEQ_GAIN_3 +200 0x4848 //RX_FDEQ_GAIN_4 +201 0x4848 //RX_FDEQ_GAIN_5 +202 0x4848 //RX_FDEQ_GAIN_6 +203 0x4848 //RX_FDEQ_GAIN_7 +204 0x4848 //RX_FDEQ_GAIN_8 +205 0x4848 //RX_FDEQ_GAIN_9 +206 0x4848 //RX_FDEQ_GAIN_10 +207 0x4848 //RX_FDEQ_GAIN_11 +208 0x4848 //RX_FDEQ_GAIN_12 +209 0x4848 //RX_FDEQ_GAIN_13 +210 0x4848 //RX_FDEQ_GAIN_14 +211 0x4848 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0202 //RX_FDEQ_BIN_0 +221 0x0203 //RX_FDEQ_BIN_1 +222 0x0304 //RX_FDEQ_BIN_2 +223 0x0405 //RX_FDEQ_BIN_3 +224 0x0607 //RX_FDEQ_BIN_4 +225 0x0809 //RX_FDEQ_BIN_5 +226 0x0A0B //RX_FDEQ_BIN_6 +227 0x0C0D //RX_FDEQ_BIN_7 +228 0x0E0F //RX_FDEQ_BIN_8 +229 0x1011 //RX_FDEQ_BIN_9 +230 0x1214 //RX_FDEQ_BIN_10 +231 0x1618 //RX_FDEQ_BIN_11 +232 0x1C1C //RX_FDEQ_BIN_12 +233 0x2020 //RX_FDEQ_BIN_13 +234 0x2020 //RX_FDEQ_BIN_14 +235 0x2011 //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x4000 //RX_FDEQ_RESRV_0 +245 0x0320 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0030 //RX_FDDRC_BAND_MARGIN_1 +248 0x0050 //RX_FDDRC_BAND_MARGIN_2 +249 0x0080 //RX_FDDRC_BAND_MARGIN_3 +250 0x0007 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x5000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x6400 //RX_FDDRC_THRD_3_2 +258 0x6400 //RX_FDDRC_THRD_3_3 +259 0x2000 //RX_FDDRC_SLANT_0_0 +260 0x2000 //RX_FDDRC_SLANT_0_1 +261 0x2000 //RX_FDDRC_SLANT_0_2 +262 0x2000 //RX_FDDRC_SLANT_0_3 +263 0x5333 //RX_FDDRC_SLANT_1_0 +264 0x5333 //RX_FDDRC_SLANT_1_1 +265 0x5333 //RX_FDDRC_SLANT_1_2 +266 0x5333 //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +286 0x005B //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 +#VOL 5 +163 0x1000 //RX_TDDRC_ALPHA_UP_1 +164 0x1000 //RX_TDDRC_ALPHA_UP_2 +165 0x1000 //RX_TDDRC_ALPHA_UP_3 +166 0x1000 //RX_TDDRC_ALPHA_UP_4 +184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +190 0x7FFF //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +269 0x0000 //RX_TDDRC_THRD_0 +270 0x0000 //RX_TDDRC_THRD_1 +271 0x1200 //RX_TDDRC_THRD_2 +272 0x1900 //RX_TDDRC_THRD_3 +273 0x3000 //RX_TDDRC_SLANT_0 +274 0x6E00 //RX_TDDRC_SLANT_1 +275 0x1000 //RX_TDDRC_ALPHA_UP_0 +276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x199A //RX_TDDRC_HMNC_GAIN +279 0x0001 //RX_TDDRC_SMT_FLAG +280 0x0CCD //RX_TDDRC_SMT_W +281 0x0240 //RX_TDDRC_DRC_GAIN +195 0x0020 //RX_FDEQ_SUBNUM +196 0x4848 //RX_FDEQ_GAIN_0 +197 0x4848 //RX_FDEQ_GAIN_1 +198 0x4848 //RX_FDEQ_GAIN_2 +199 0x4848 //RX_FDEQ_GAIN_3 +200 0x4848 //RX_FDEQ_GAIN_4 +201 0x4848 //RX_FDEQ_GAIN_5 +202 0x4848 //RX_FDEQ_GAIN_6 +203 0x4848 //RX_FDEQ_GAIN_7 +204 0x4848 //RX_FDEQ_GAIN_8 +205 0x4848 //RX_FDEQ_GAIN_9 +206 0x4848 //RX_FDEQ_GAIN_10 +207 0x4848 //RX_FDEQ_GAIN_11 +208 0x4848 //RX_FDEQ_GAIN_12 +209 0x4848 //RX_FDEQ_GAIN_13 +210 0x4848 //RX_FDEQ_GAIN_14 +211 0x4848 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0202 //RX_FDEQ_BIN_0 +221 0x0203 //RX_FDEQ_BIN_1 +222 0x0304 //RX_FDEQ_BIN_2 +223 0x0405 //RX_FDEQ_BIN_3 +224 0x0607 //RX_FDEQ_BIN_4 +225 0x0809 //RX_FDEQ_BIN_5 +226 0x0A0B //RX_FDEQ_BIN_6 +227 0x0C0D //RX_FDEQ_BIN_7 +228 0x0E0F //RX_FDEQ_BIN_8 +229 0x1011 //RX_FDEQ_BIN_9 +230 0x1214 //RX_FDEQ_BIN_10 +231 0x1618 //RX_FDEQ_BIN_11 +232 0x1C1C //RX_FDEQ_BIN_12 +233 0x2020 //RX_FDEQ_BIN_13 +234 0x2020 //RX_FDEQ_BIN_14 +235 0x2011 //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x4000 //RX_FDEQ_RESRV_0 +245 0x0320 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0030 //RX_FDDRC_BAND_MARGIN_1 +248 0x0050 //RX_FDDRC_BAND_MARGIN_2 +249 0x0080 //RX_FDDRC_BAND_MARGIN_3 +250 0x0007 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x5000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x6400 //RX_FDDRC_THRD_3_2 +258 0x6400 //RX_FDDRC_THRD_3_3 +259 0x2000 //RX_FDDRC_SLANT_0_0 +260 0x2000 //RX_FDDRC_SLANT_0_1 +261 0x2000 //RX_FDDRC_SLANT_0_2 +262 0x2000 //RX_FDDRC_SLANT_0_3 +263 0x5333 //RX_FDDRC_SLANT_1_0 +264 0x5333 //RX_FDDRC_SLANT_1_1 +265 0x5333 //RX_FDDRC_SLANT_1_2 +266 0x5333 //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +286 0x0099 //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 +#VOL 6 +163 0x1000 //RX_TDDRC_ALPHA_UP_1 +164 0x1000 //RX_TDDRC_ALPHA_UP_2 +165 0x1000 //RX_TDDRC_ALPHA_UP_3 +166 0x1000 //RX_TDDRC_ALPHA_UP_4 +184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +190 0x7FFF //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +269 0x0000 //RX_TDDRC_THRD_0 +270 0x0000 //RX_TDDRC_THRD_1 +271 0x1200 //RX_TDDRC_THRD_2 +272 0x1900 //RX_TDDRC_THRD_3 +273 0x3000 //RX_TDDRC_SLANT_0 +274 0x6E00 //RX_TDDRC_SLANT_1 +275 0x1000 //RX_TDDRC_ALPHA_UP_0 +276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x199A //RX_TDDRC_HMNC_GAIN +279 0x0001 //RX_TDDRC_SMT_FLAG +280 0x0CCD //RX_TDDRC_SMT_W +281 0x0240 //RX_TDDRC_DRC_GAIN +195 0x0020 //RX_FDEQ_SUBNUM +196 0x4848 //RX_FDEQ_GAIN_0 +197 0x4848 //RX_FDEQ_GAIN_1 +198 0x4848 //RX_FDEQ_GAIN_2 +199 0x4848 //RX_FDEQ_GAIN_3 +200 0x4848 //RX_FDEQ_GAIN_4 +201 0x4848 //RX_FDEQ_GAIN_5 +202 0x4848 //RX_FDEQ_GAIN_6 +203 0x4848 //RX_FDEQ_GAIN_7 +204 0x4848 //RX_FDEQ_GAIN_8 +205 0x4848 //RX_FDEQ_GAIN_9 +206 0x4848 //RX_FDEQ_GAIN_10 +207 0x4848 //RX_FDEQ_GAIN_11 +208 0x4848 //RX_FDEQ_GAIN_12 +209 0x4848 //RX_FDEQ_GAIN_13 +210 0x4848 //RX_FDEQ_GAIN_14 +211 0x4848 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0202 //RX_FDEQ_BIN_0 +221 0x0203 //RX_FDEQ_BIN_1 +222 0x0304 //RX_FDEQ_BIN_2 +223 0x0405 //RX_FDEQ_BIN_3 +224 0x0607 //RX_FDEQ_BIN_4 +225 0x0809 //RX_FDEQ_BIN_5 +226 0x0A0B //RX_FDEQ_BIN_6 +227 0x0C0D //RX_FDEQ_BIN_7 +228 0x0E0F //RX_FDEQ_BIN_8 +229 0x1011 //RX_FDEQ_BIN_9 +230 0x1214 //RX_FDEQ_BIN_10 +231 0x1618 //RX_FDEQ_BIN_11 +232 0x1C1C //RX_FDEQ_BIN_12 +233 0x2020 //RX_FDEQ_BIN_13 +234 0x2020 //RX_FDEQ_BIN_14 +235 0x2011 //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x4000 //RX_FDEQ_RESRV_0 +245 0x0320 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0030 //RX_FDDRC_BAND_MARGIN_1 +248 0x0050 //RX_FDDRC_BAND_MARGIN_2 +249 0x0080 //RX_FDDRC_BAND_MARGIN_3 +250 0x0007 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x5000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x6400 //RX_FDDRC_THRD_3_2 +258 0x6400 //RX_FDDRC_THRD_3_3 +259 0x2000 //RX_FDDRC_SLANT_0_0 +260 0x2000 //RX_FDDRC_SLANT_0_1 +261 0x2000 //RX_FDDRC_SLANT_0_2 +262 0x2000 //RX_FDDRC_SLANT_0_3 +263 0x5333 //RX_FDDRC_SLANT_1_0 +264 0x5333 //RX_FDDRC_SLANT_1_1 +265 0x5333 //RX_FDDRC_SLANT_1_2 +266 0x5333 //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +286 0x0100 //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 #CASE_NAME HEADSET-RESERVE1-VOICE_GENERIC-NB -#PARAM_MODE FULL -#PARAM_TYPE TX+RX -#TOTAL_CUSTOM_STEP 7 +#PARAM_MODE Full +#PARAM_TYPE TX+2RX +#TOTAL_CUSTOM_STEP 7+7 #TX 0 0x0009 //TX_OPERATION_MODE_0 1 0x0008 //TX_OPERATION_MODE_1 @@ -14355,20 +21683,20 @@ 312 0x7FFF //TX_A_POST_FILT_0 313 0x2000 //TX_A_POST_FILT_1 314 0x4000 //TX_A_POST_FILT_S_0 -315 0x4000 //TX_A_POST_FILT_S_1 -316 0x1000 //TX_A_POST_FILT_S_2 +315 0x1000 //TX_A_POST_FILT_S_1 +316 0x4000 //TX_A_POST_FILT_S_2 317 0x4000 //TX_A_POST_FILT_S_3 318 0x4000 //TX_A_POST_FILT_S_4 319 0x4000 //TX_A_POST_FILT_S_5 320 0x4000 //TX_A_POST_FILT_S_6 321 0x4000 //TX_A_POST_FILT_S_7 322 0x0400 //TX_B_POST_FILT_0 -323 0x0400 //TX_B_POST_FILT_1 +323 0x2000 //TX_B_POST_FILT_1 324 0x2000 //TX_B_POST_FILT_2 325 0x2000 //TX_B_POST_FILT_3 326 0x2000 //TX_B_POST_FILT_4 327 0x2000 //TX_B_POST_FILT_5 -328 0x2000 //TX_B_POST_FILT_6 +328 0x0400 //TX_B_POST_FILT_6 329 0x2000 //TX_B_POST_FILT_7 330 0x7FFF //TX_B_LESSCUT_RTO_S_0 331 0x7FFF //TX_B_LESSCUT_RTO_S_1 @@ -14407,7 +21735,7 @@ 364 0x0000 //TX_K_APT 365 0x0001 //TX_NOISEDET 366 0x0190 //TX_NDETCT -367 0x000A //TX_NOISE_TH_0 +367 0x003B //TX_NOISE_TH_0 368 0x1B58 //TX_NOISE_TH_0_2 369 0x2134 //TX_NOISE_TH_0_3 370 0x02BC //TX_NOISE_TH_1 @@ -14419,11 +21747,11 @@ 376 0x0000 //TX_NOISE_TH_5_3 377 0x0000 //TX_NOISE_TH_5_4 378 0x0032 //TX_NOISE_TH_6 -379 0x0014 //TX_MINENOISE_TH -380 0x4000 //TX_MINENOISE_MIC0_TH_MTS -381 0xFFEE //TX_MINENOISE_MIC0_TH_EXP -382 0x6000 //TX_MINENOISE_MIC0_S_TH_MTS -383 0xFFF3 //TX_MINENOISE_MIC0_S_TH_EXP +379 0x00C8 //TX_MINENOISE_TH +380 0xD508 //TX_MORENS_TFMASK_TH +381 0x0001 //TX_DRC_QUIET_FLOOR +382 0x3A98 //TX_RATIODTL_CUT_TH +383 0x0DAC //TX_DT_CUT_K1 384 0x00A5 //TX_OUT_ENER_S_TH_CLEAN 385 0x00A5 //TX_OUT_ENER_S_TH_LESSCLEAN 386 0x00A5 //TX_OUT_ENER_S_TH_NOISY @@ -14431,22 +21759,22 @@ 388 0x00CE //TX_OUT_ENER_TH_SPEECH 389 0x2000 //TX_SN_NPB_GAIN 390 0x0000 //TX_NN_NPB_GAIN -391 0x0000 //TX_CSX_ALPHA_0 -392 0x0000 //TX_CSX_ALPHA_1 -393 0x0000 //TX_CSX_ALPHA_2 -394 0x0000 //TX_CSX_ALPHA_3 -395 0x0800 //TX_MU_ARSP_EST -396 0x00C8 //TX_P_OUTBEAM_MIN_TH +391 0x7FFF //TX_POST_MASK_SUP_HSNE +392 0x1388 //TX_TAIL_DET_TH +393 0x4000 //TX_B_LESSCUT_RTO_WTA +394 0x0000 //TX_MEL_G_R +395 0x0080 //TX_SUPHIGH_TH +396 0x0000 //TX_MASK_G_R 397 0x0002 //TX_EXTRA_NS_L -398 0x0800 //TX_EXTRA_NS_A -399 0x0005 //TX_VR_NOISE_FLOOR_TH +398 0x1800 //TX_C_POST_FLT_MASK +399 0x7FFF //TX_A_POST_FLT_WNS 400 0x0148 //TX_MIN_G_LOW300HZ 401 0x0002 //TX_MAXLEVEL_CNG 402 0x00B4 //TX_STN_NOISE_TH 403 0x4000 //TX_POST_MASK_SUP 404 0x7FFF //TX_POST_MASK_ADJUST 405 0x00C8 //TX_NS_ENOISE_MIC0_TH -406 0x0014 //TX_MINENOISE_MIC0_TH +406 0x0032 //TX_MINENOISE_MIC0_TH 407 0x012C //TX_MINENOISE_MIC0_S_TH 408 0x7FFF //TX_MIN_G_CTRL_SSNS 409 0x0000 //TX_METAL_RTO_THR @@ -14554,16 +21882,16 @@ 511 0x6666 //TX_MIC_TO_BFGAIN 512 0x0000 //TX_MICTOBFGAIN0 513 0x0000 //TX_FASTMUE_TH -514 0x0000 //TX_DERVB_LEN_0 -515 0x0000 //TX_DERVB_LEN_1 -516 0x0000 //TX_RHO_DERVB -517 0x0000 //TX_MIC_INDX_DERVB -518 0x0000 //TX_MU_DERVB -519 0x0000 //TX_DR_RESRV_0 -520 0x0000 //TX_DR_RESRV_1 -521 0x0000 //TX_DR_RESRV_2 -522 0x0000 //TX_DR_RESRV_3 -523 0x0000 //TX_DR_RESRV_4 +514 0xC000 //TX_DEREVERB_LF_MU +515 0xC000 //TX_DEREVERB_HF_MU +516 0xCCCC //TX_DEREVERB_DELAY +517 0xD999 //TX_DEREVERB_COEF_LEN +518 0x1F40 //TX_DEREVERB_DNR +519 0x0000 //TX_DEREVERB_ALPHA +520 0x0000 //TX_DEREVERB_BETA +521 0x0000 //TX_GSC_RTOL_TH +522 0x7000 //TX_GSC_RTOH_TH +523 0x0064 //TX_WIDE2_MEANHTH 524 0x0000 //TX_DR_RESRV_5 525 0x0000 //TX_DR_RESRV_6 526 0x0000 //TX_DR_RESRV_7 @@ -14931,14 +22259,79 @@ 888 0x00C8 //TX_FASTNS_ARSPC_TH 889 0xC000 //TX_FASTNS_MASK5_TH 890 0x4848 //TX_POSTSSA_MIN_G_VR_MASK -891 0x7FFF //TX_A_LESSCUT_RTO_MASK +891 0x4000 //TX_A_LESSCUT_RTO_MASK 892 0x1770 //TX_FASTNS_NOISETH 893 0xC000 //TX_FASTNS_SSA_THLFL 894 0xC000 //TX_FASTNS_SSA_THHFL 895 0xCCCC //TX_FASTNS_SSA_THLFH 896 0xD999 //TX_FASTNS_SSA_THHFH +897 0x2339 //TX_SENDFUNC_REG_MICMUTE +898 0x0021 //TX_SENDFUNC_REG_MICMUTE1 +899 0x02BC //TX_MICMUTE_RATIO_THR +900 0x0140 //TX_MICMUTE_AMP_THR +901 0x0004 //TX_MICMUTE_HPF_IND +902 0x00C0 //TX_MICMUTE_LOG_EYR_TH +903 0x0008 //TX_MICMUTE_CVG_TIME +904 0x0008 //TX_MICMUTE_RELEASE_TIME +905 0x01FE //TX_MIC_VOLUME_MIC0MUTE +906 0x0020 //TX_MICMUTE_EPD_OFFSET_0 +907 0x001E //TX_MICMUTE_FRQ_AEC_L +908 0x7999 //TX_MICMUTE_EAD_THR +909 0x7FFF //TX_MICMUTE_LAMBDA_CB_NLE +910 0x7FFF //TX_MICMUTE_LAMBDA_RE_EST +911 0x4000 //TX_DTD_THR1_MICMUTE_0 +912 0x7000 //TX_DTD_THR1_MICMUTE_1 +913 0x7FFF //TX_DTD_THR1_MICMUTE_2 +914 0x7FFF //TX_DTD_THR1_MICMUTE_3 +915 0x6CCC //TX_DTD_THR2_MICMUTE_0 +916 0x0400 //TX_MICMUTE_MIN_EQ_RE_EST_0 +917 0x0400 //TX_MICMUTE_MIN_EQ_RE_EST_1 +918 0x1000 //TX_MICMUTE_MIN_EQ_RE_EST_2 +919 0x7FFF //TX_MICMUTE_MIN_EQ_RE_EST_3 +920 0x7FFF //TX_MICMUTE_MIN_EQ_RE_EST_4 +921 0x4000 //TX_MICMUTE_C_POST_FLT +922 0x03E8 //TX_MICMUTE_DT_CUT_K +923 0x0001 //TX_MICMUTE_DT_CUT_THR +924 0x03E8 //TX_MICMUTE_DT_CUT_K2 +925 0x0001 //TX_MICMUTE_DT_CUT_THR2 +926 0x0064 //TX_MICMUTE_DT2_HOLD_N +927 0x1000 //TX_MICMUTE_RATIODTH_THCUT +928 0x1000 //TX_MICMUTE_B_POST_FLT_ECHOL +929 0x7FFF //TX_MICMUTE_B_POST_FLT_ECHOH +930 0x0400 //TX_MICMUTE_C_POST_FLT_MASK +931 0x7999 //TX_MICMUTE_RATIODTL_CUT_TH +932 0x0258 //TX_MICMUTE_DT_CUT_K1 +933 0x0800 //TX_MICMUTE_N2_SN_EST +934 0xFC00 //TX_MICMUTE_THR_SN_EST_0 +935 0x001C //TX_MICMUTE_MIN_G_CTRL_0 +936 0x6000 //TX_MICMUTE_A_POST_FILT_S_0 +937 0x7000 //TX_MICMUTE_B_POST_FILT_0 +938 0x2710 //TX_MIC1RUB_AMP_THR +939 0x0010 //TX_MIC1MUTE_RATIO_THR +940 0x0450 //TX_MIC1MUTE_AMP_THR +941 0x0008 //TX_MIC1MUTE_CVG_TIME +942 0x0008 //TX_MIC1MUTE_RELEASE_TIME +943 0x0000 //TX_AMS_RESRV_01 +944 0x0000 //TX_AMS_RESRV_02 +945 0x0000 //TX_AMS_RESRV_03 +946 0x0000 //TX_AMS_RESRV_04 +947 0x0000 //TX_AMS_RESRV_05 +948 0x0000 //TX_AMS_RESRV_06 +949 0x0000 //TX_AMS_RESRV_07 +950 0x0000 //TX_AMS_RESRV_08 +951 0x0000 //TX_AMS_RESRV_09 +952 0x0000 //TX_AMS_RESRV_10 +953 0x0000 //TX_AMS_RESRV_11 +954 0x0000 //TX_AMS_RESRV_12 +955 0x0000 //TX_AMS_RESRV_13 +956 0x0000 //TX_AMS_RESRV_14 +957 0x0000 //TX_AMS_RESRV_15 +958 0x0000 //TX_AMS_RESRV_16 +959 0x0000 //TX_AMS_RESRV_17 +960 0x0000 //TX_AMS_RESRV_18 +961 0x0000 //TX_AMS_RESRV_19 #RX -0 0x002C //RX_RECVFUNC_MODE_0 +0 0x202C //RX_RECVFUNC_MODE_0 1 0x0000 //RX_RECVFUNC_MODE_1 2 0x0000 //RX_SAMPLINGFREQ_SIG 3 0x0000 //RX_SAMPLINGFREQ_PROC @@ -15788,11 +23181,862 @@ 110 0x0000 //RX_FDDRC_RESRV_0 129 0x0100 //RX_SPK_VOL 130 0x0000 //RX_VOL_RESRV_0 +#RX 2 +157 0x202C //RX_RECVFUNC_MODE_0 +158 0x0000 //RX_RECVFUNC_MODE_1 +159 0x0000 //RX_SAMPLINGFREQ_SIG +160 0x0000 //RX_SAMPLINGFREQ_PROC +161 0x000A //RX_FRAME_SZ +162 0x0000 //RX_DELAY_OPT +163 0x3000 //RX_TDDRC_ALPHA_UP_1 +164 0x3000 //RX_TDDRC_ALPHA_UP_2 +165 0x3000 //RX_TDDRC_ALPHA_UP_3 +166 0x3000 //RX_TDDRC_ALPHA_UP_4 +167 0x0800 //RX_PGA +168 0x7FFF //RX_A_HP +169 0x0000 //RX_B_PE +170 0x3800 //RX_THR_PITCH_DET_0 +171 0x3000 //RX_THR_PITCH_DET_1 +172 0x2800 //RX_THR_PITCH_DET_2 +173 0x0008 //RX_PITCH_BFR_LEN +174 0x0003 //RX_SBD_PITCH_DET +175 0x0100 //RX_PP_RESRV_0 +176 0x0020 //RX_PP_RESRV_1 +177 0x0600 //RX_N_SN_EST +178 0x000C //RX_N2_SN_EST +179 0x0010 //RX_NS_LVL_CTRL +180 0xF800 //RX_THR_SN_EST +181 0x7CCD //RX_LAMBDA_PFILT +182 0x000A //RX_FENS_RESRV_0 +183 0x0190 //RX_FENS_RESRV_1 +184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +187 0x0002 //RX_EXTRA_NS_L +188 0x0800 //RX_EXTRA_NS_A +189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +190 0x7FFF //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +192 0x199A //RX_A_POST_FLT +193 0x0000 //RX_LMT_THRD +194 0x4000 //RX_LMT_ALPHA +195 0x0014 //RX_FDEQ_SUBNUM +196 0x4848 //RX_FDEQ_GAIN_0 +197 0x4848 //RX_FDEQ_GAIN_1 +198 0x4848 //RX_FDEQ_GAIN_2 +199 0x4848 //RX_FDEQ_GAIN_3 +200 0x4848 //RX_FDEQ_GAIN_4 +201 0x4848 //RX_FDEQ_GAIN_5 +202 0x4848 //RX_FDEQ_GAIN_6 +203 0x4848 //RX_FDEQ_GAIN_7 +204 0x4848 //RX_FDEQ_GAIN_8 +205 0x4848 //RX_FDEQ_GAIN_9 +206 0x4848 //RX_FDEQ_GAIN_10 +207 0x4848 //RX_FDEQ_GAIN_11 +208 0x4848 //RX_FDEQ_GAIN_12 +209 0x4848 //RX_FDEQ_GAIN_13 +210 0x4848 //RX_FDEQ_GAIN_14 +211 0x4848 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0202 //RX_FDEQ_BIN_0 +221 0x0203 //RX_FDEQ_BIN_1 +222 0x0303 //RX_FDEQ_BIN_2 +223 0x0304 //RX_FDEQ_BIN_3 +224 0x0405 //RX_FDEQ_BIN_4 +225 0x0506 //RX_FDEQ_BIN_5 +226 0x0708 //RX_FDEQ_BIN_6 +227 0x090A //RX_FDEQ_BIN_7 +228 0x0B0C //RX_FDEQ_BIN_8 +229 0x0D08 //RX_FDEQ_BIN_9 +230 0x0000 //RX_FDEQ_BIN_10 +231 0x0000 //RX_FDEQ_BIN_11 +232 0x0000 //RX_FDEQ_BIN_12 +233 0x0000 //RX_FDEQ_BIN_13 +234 0x0000 //RX_FDEQ_BIN_14 +235 0x0000 //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x4000 //RX_FDEQ_RESRV_0 +245 0x0320 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0030 //RX_FDDRC_BAND_MARGIN_1 +248 0x0050 //RX_FDDRC_BAND_MARGIN_2 +249 0x0080 //RX_FDDRC_BAND_MARGIN_3 +250 0x0007 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x5000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x6400 //RX_FDDRC_THRD_3_2 +258 0x6400 //RX_FDDRC_THRD_3_3 +259 0x2000 //RX_FDDRC_SLANT_0_0 +260 0x2000 //RX_FDDRC_SLANT_0_1 +261 0x2000 //RX_FDDRC_SLANT_0_2 +262 0x2000 //RX_FDDRC_SLANT_0_3 +263 0x5333 //RX_FDDRC_SLANT_1_0 +264 0x5333 //RX_FDDRC_SLANT_1_1 +265 0x5333 //RX_FDDRC_SLANT_1_2 +266 0x5333 //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +268 0x0002 //RX_FILTINDX +269 0x0000 //RX_TDDRC_THRD_0 +270 0x0000 //RX_TDDRC_THRD_1 +271 0x2000 //RX_TDDRC_THRD_2 +272 0x3000 //RX_TDDRC_THRD_3 +273 0x0800 //RX_TDDRC_SLANT_0 +274 0x7EB8 //RX_TDDRC_SLANT_1 +275 0x3000 //RX_TDDRC_ALPHA_UP_0 +276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x199A //RX_TDDRC_HMNC_GAIN +279 0x0001 //RX_TDDRC_SMT_FLAG +280 0x0CCD //RX_TDDRC_SMT_W +281 0x0200 //RX_TDDRC_DRC_GAIN +282 0x7C00 //RX_LAMBDA_PKA_FP +283 0x2000 //RX_TPKA_FP +284 0x2000 //RX_MIN_G_FP +285 0x0080 //RX_MAX_G_FP +286 0x000B //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 +288 0x0000 //RX_MAXLEVEL_CNG +289 0x3000 //RX_BWE_UV_TH +290 0x3000 //RX_BWE_UV_TH2 +291 0x1800 //RX_BWE_UV_TH3 +292 0x1000 //RX_BWE_V_TH +293 0x04CD //RX_BWE_GAIN1_V_TH1 +294 0x0F33 //RX_BWE_GAIN1_V_TH2 +295 0x7333 //RX_BWE_UV_EQ +296 0x199A //RX_BWE_V_EQ +297 0x7333 //RX_BWE_TONE_TH +298 0x0004 //RX_BWE_UV_HOLD_T +299 0x6CCD //RX_BWE_GAIN2_ALPHA +300 0x799A //RX_BWE_GAIN3_ALPHA +301 0x001E //RX_BWE_CUTOFF +302 0x3000 //RX_BWE_GAINFILL +303 0x3200 //RX_BWE_MAXTH_TONE +304 0x2000 //RX_BWE_EQ_0 +305 0x2000 //RX_BWE_EQ_1 +306 0x2000 //RX_BWE_EQ_2 +307 0x2000 //RX_BWE_EQ_3 +308 0x2000 //RX_BWE_EQ_4 +309 0x2000 //RX_BWE_EQ_5 +310 0x2000 //RX_BWE_EQ_6 +311 0x0000 //RX_BWE_RESRV_0 +312 0x0000 //RX_BWE_RESRV_1 +313 0x0000 //RX_BWE_RESRV_2 +#VOL 0 +163 0x3000 //RX_TDDRC_ALPHA_UP_1 +164 0x3000 //RX_TDDRC_ALPHA_UP_2 +165 0x3000 //RX_TDDRC_ALPHA_UP_3 +166 0x3000 //RX_TDDRC_ALPHA_UP_4 +184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +190 0x7FFF //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +269 0x0000 //RX_TDDRC_THRD_0 +270 0x0000 //RX_TDDRC_THRD_1 +271 0x2000 //RX_TDDRC_THRD_2 +272 0x3000 //RX_TDDRC_THRD_3 +273 0x0800 //RX_TDDRC_SLANT_0 +274 0x7EB8 //RX_TDDRC_SLANT_1 +275 0x3000 //RX_TDDRC_ALPHA_UP_0 +276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x199A //RX_TDDRC_HMNC_GAIN +279 0x0001 //RX_TDDRC_SMT_FLAG +280 0x0CCD //RX_TDDRC_SMT_W +281 0x0200 //RX_TDDRC_DRC_GAIN +195 0x0014 //RX_FDEQ_SUBNUM +196 0x4848 //RX_FDEQ_GAIN_0 +197 0x4848 //RX_FDEQ_GAIN_1 +198 0x4848 //RX_FDEQ_GAIN_2 +199 0x4848 //RX_FDEQ_GAIN_3 +200 0x4848 //RX_FDEQ_GAIN_4 +201 0x4848 //RX_FDEQ_GAIN_5 +202 0x4848 //RX_FDEQ_GAIN_6 +203 0x4848 //RX_FDEQ_GAIN_7 +204 0x4848 //RX_FDEQ_GAIN_8 +205 0x4848 //RX_FDEQ_GAIN_9 +206 0x4848 //RX_FDEQ_GAIN_10 +207 0x4848 //RX_FDEQ_GAIN_11 +208 0x4848 //RX_FDEQ_GAIN_12 +209 0x4848 //RX_FDEQ_GAIN_13 +210 0x4848 //RX_FDEQ_GAIN_14 +211 0x4848 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0202 //RX_FDEQ_BIN_0 +221 0x0203 //RX_FDEQ_BIN_1 +222 0x0303 //RX_FDEQ_BIN_2 +223 0x0304 //RX_FDEQ_BIN_3 +224 0x0405 //RX_FDEQ_BIN_4 +225 0x0506 //RX_FDEQ_BIN_5 +226 0x0708 //RX_FDEQ_BIN_6 +227 0x090A //RX_FDEQ_BIN_7 +228 0x0B0C //RX_FDEQ_BIN_8 +229 0x0D08 //RX_FDEQ_BIN_9 +230 0x0000 //RX_FDEQ_BIN_10 +231 0x0000 //RX_FDEQ_BIN_11 +232 0x0000 //RX_FDEQ_BIN_12 +233 0x0000 //RX_FDEQ_BIN_13 +234 0x0000 //RX_FDEQ_BIN_14 +235 0x0000 //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x4000 //RX_FDEQ_RESRV_0 +245 0x0320 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0030 //RX_FDDRC_BAND_MARGIN_1 +248 0x0050 //RX_FDDRC_BAND_MARGIN_2 +249 0x0080 //RX_FDDRC_BAND_MARGIN_3 +250 0x0007 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x5000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x6400 //RX_FDDRC_THRD_3_2 +258 0x6400 //RX_FDDRC_THRD_3_3 +259 0x2000 //RX_FDDRC_SLANT_0_0 +260 0x2000 //RX_FDDRC_SLANT_0_1 +261 0x2000 //RX_FDDRC_SLANT_0_2 +262 0x2000 //RX_FDDRC_SLANT_0_3 +263 0x5333 //RX_FDDRC_SLANT_1_0 +264 0x5333 //RX_FDDRC_SLANT_1_1 +265 0x5333 //RX_FDDRC_SLANT_1_2 +266 0x5333 //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +286 0x000B //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 +#VOL 1 +163 0x3000 //RX_TDDRC_ALPHA_UP_1 +164 0x3000 //RX_TDDRC_ALPHA_UP_2 +165 0x3000 //RX_TDDRC_ALPHA_UP_3 +166 0x3000 //RX_TDDRC_ALPHA_UP_4 +184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +190 0x7FFF //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +269 0x0000 //RX_TDDRC_THRD_0 +270 0x0000 //RX_TDDRC_THRD_1 +271 0x2000 //RX_TDDRC_THRD_2 +272 0x3000 //RX_TDDRC_THRD_3 +273 0x0800 //RX_TDDRC_SLANT_0 +274 0x7EB8 //RX_TDDRC_SLANT_1 +275 0x3000 //RX_TDDRC_ALPHA_UP_0 +276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x199A //RX_TDDRC_HMNC_GAIN +279 0x0001 //RX_TDDRC_SMT_FLAG +280 0x0CCD //RX_TDDRC_SMT_W +281 0x0200 //RX_TDDRC_DRC_GAIN +195 0x0014 //RX_FDEQ_SUBNUM +196 0x4848 //RX_FDEQ_GAIN_0 +197 0x4848 //RX_FDEQ_GAIN_1 +198 0x4848 //RX_FDEQ_GAIN_2 +199 0x4848 //RX_FDEQ_GAIN_3 +200 0x4848 //RX_FDEQ_GAIN_4 +201 0x4848 //RX_FDEQ_GAIN_5 +202 0x4848 //RX_FDEQ_GAIN_6 +203 0x4848 //RX_FDEQ_GAIN_7 +204 0x4848 //RX_FDEQ_GAIN_8 +205 0x4848 //RX_FDEQ_GAIN_9 +206 0x4848 //RX_FDEQ_GAIN_10 +207 0x4848 //RX_FDEQ_GAIN_11 +208 0x4848 //RX_FDEQ_GAIN_12 +209 0x4848 //RX_FDEQ_GAIN_13 +210 0x4848 //RX_FDEQ_GAIN_14 +211 0x4848 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0202 //RX_FDEQ_BIN_0 +221 0x0203 //RX_FDEQ_BIN_1 +222 0x0303 //RX_FDEQ_BIN_2 +223 0x0304 //RX_FDEQ_BIN_3 +224 0x0405 //RX_FDEQ_BIN_4 +225 0x0506 //RX_FDEQ_BIN_5 +226 0x0708 //RX_FDEQ_BIN_6 +227 0x090A //RX_FDEQ_BIN_7 +228 0x0B0C //RX_FDEQ_BIN_8 +229 0x0D08 //RX_FDEQ_BIN_9 +230 0x0000 //RX_FDEQ_BIN_10 +231 0x0000 //RX_FDEQ_BIN_11 +232 0x0000 //RX_FDEQ_BIN_12 +233 0x0000 //RX_FDEQ_BIN_13 +234 0x0000 //RX_FDEQ_BIN_14 +235 0x0000 //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x4000 //RX_FDEQ_RESRV_0 +245 0x0320 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0030 //RX_FDDRC_BAND_MARGIN_1 +248 0x0050 //RX_FDDRC_BAND_MARGIN_2 +249 0x0080 //RX_FDDRC_BAND_MARGIN_3 +250 0x0007 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x5000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x6400 //RX_FDDRC_THRD_3_2 +258 0x6400 //RX_FDDRC_THRD_3_3 +259 0x2000 //RX_FDDRC_SLANT_0_0 +260 0x2000 //RX_FDDRC_SLANT_0_1 +261 0x2000 //RX_FDDRC_SLANT_0_2 +262 0x2000 //RX_FDDRC_SLANT_0_3 +263 0x5333 //RX_FDDRC_SLANT_1_0 +264 0x5333 //RX_FDDRC_SLANT_1_1 +265 0x5333 //RX_FDDRC_SLANT_1_2 +266 0x5333 //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +286 0x0013 //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 +#VOL 2 +163 0x3000 //RX_TDDRC_ALPHA_UP_1 +164 0x3000 //RX_TDDRC_ALPHA_UP_2 +165 0x3000 //RX_TDDRC_ALPHA_UP_3 +166 0x3000 //RX_TDDRC_ALPHA_UP_4 +184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +190 0x7FFF //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +269 0x0000 //RX_TDDRC_THRD_0 +270 0x0000 //RX_TDDRC_THRD_1 +271 0x2000 //RX_TDDRC_THRD_2 +272 0x3000 //RX_TDDRC_THRD_3 +273 0x0800 //RX_TDDRC_SLANT_0 +274 0x7EB8 //RX_TDDRC_SLANT_1 +275 0x3000 //RX_TDDRC_ALPHA_UP_0 +276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x199A //RX_TDDRC_HMNC_GAIN +279 0x0001 //RX_TDDRC_SMT_FLAG +280 0x0CCD //RX_TDDRC_SMT_W +281 0x0200 //RX_TDDRC_DRC_GAIN +195 0x0014 //RX_FDEQ_SUBNUM +196 0x4848 //RX_FDEQ_GAIN_0 +197 0x4848 //RX_FDEQ_GAIN_1 +198 0x4848 //RX_FDEQ_GAIN_2 +199 0x4848 //RX_FDEQ_GAIN_3 +200 0x4848 //RX_FDEQ_GAIN_4 +201 0x4848 //RX_FDEQ_GAIN_5 +202 0x4848 //RX_FDEQ_GAIN_6 +203 0x4848 //RX_FDEQ_GAIN_7 +204 0x4848 //RX_FDEQ_GAIN_8 +205 0x4848 //RX_FDEQ_GAIN_9 +206 0x4848 //RX_FDEQ_GAIN_10 +207 0x4848 //RX_FDEQ_GAIN_11 +208 0x4848 //RX_FDEQ_GAIN_12 +209 0x4848 //RX_FDEQ_GAIN_13 +210 0x4848 //RX_FDEQ_GAIN_14 +211 0x4848 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0202 //RX_FDEQ_BIN_0 +221 0x0203 //RX_FDEQ_BIN_1 +222 0x0303 //RX_FDEQ_BIN_2 +223 0x0304 //RX_FDEQ_BIN_3 +224 0x0405 //RX_FDEQ_BIN_4 +225 0x0506 //RX_FDEQ_BIN_5 +226 0x0708 //RX_FDEQ_BIN_6 +227 0x090A //RX_FDEQ_BIN_7 +228 0x0B0C //RX_FDEQ_BIN_8 +229 0x0D08 //RX_FDEQ_BIN_9 +230 0x0000 //RX_FDEQ_BIN_10 +231 0x0000 //RX_FDEQ_BIN_11 +232 0x0000 //RX_FDEQ_BIN_12 +233 0x0000 //RX_FDEQ_BIN_13 +234 0x0000 //RX_FDEQ_BIN_14 +235 0x0000 //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x4000 //RX_FDEQ_RESRV_0 +245 0x0320 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0030 //RX_FDDRC_BAND_MARGIN_1 +248 0x0050 //RX_FDDRC_BAND_MARGIN_2 +249 0x0080 //RX_FDDRC_BAND_MARGIN_3 +250 0x0007 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x5000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x6400 //RX_FDDRC_THRD_3_2 +258 0x6400 //RX_FDDRC_THRD_3_3 +259 0x2000 //RX_FDDRC_SLANT_0_0 +260 0x2000 //RX_FDDRC_SLANT_0_1 +261 0x2000 //RX_FDDRC_SLANT_0_2 +262 0x2000 //RX_FDDRC_SLANT_0_3 +263 0x5333 //RX_FDDRC_SLANT_1_0 +264 0x5333 //RX_FDDRC_SLANT_1_1 +265 0x5333 //RX_FDDRC_SLANT_1_2 +266 0x5333 //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +286 0x0020 //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 +#VOL 3 +163 0x3000 //RX_TDDRC_ALPHA_UP_1 +164 0x3000 //RX_TDDRC_ALPHA_UP_2 +165 0x3000 //RX_TDDRC_ALPHA_UP_3 +166 0x3000 //RX_TDDRC_ALPHA_UP_4 +184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +190 0x7FFF //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +269 0x0000 //RX_TDDRC_THRD_0 +270 0x0000 //RX_TDDRC_THRD_1 +271 0x2000 //RX_TDDRC_THRD_2 +272 0x3000 //RX_TDDRC_THRD_3 +273 0x0800 //RX_TDDRC_SLANT_0 +274 0x7EB8 //RX_TDDRC_SLANT_1 +275 0x3000 //RX_TDDRC_ALPHA_UP_0 +276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x199A //RX_TDDRC_HMNC_GAIN +279 0x0001 //RX_TDDRC_SMT_FLAG +280 0x0CCD //RX_TDDRC_SMT_W +281 0x0200 //RX_TDDRC_DRC_GAIN +195 0x0014 //RX_FDEQ_SUBNUM +196 0x4848 //RX_FDEQ_GAIN_0 +197 0x4848 //RX_FDEQ_GAIN_1 +198 0x4848 //RX_FDEQ_GAIN_2 +199 0x4848 //RX_FDEQ_GAIN_3 +200 0x4848 //RX_FDEQ_GAIN_4 +201 0x4848 //RX_FDEQ_GAIN_5 +202 0x4848 //RX_FDEQ_GAIN_6 +203 0x4848 //RX_FDEQ_GAIN_7 +204 0x4848 //RX_FDEQ_GAIN_8 +205 0x4848 //RX_FDEQ_GAIN_9 +206 0x4848 //RX_FDEQ_GAIN_10 +207 0x4848 //RX_FDEQ_GAIN_11 +208 0x4848 //RX_FDEQ_GAIN_12 +209 0x4848 //RX_FDEQ_GAIN_13 +210 0x4848 //RX_FDEQ_GAIN_14 +211 0x4848 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0202 //RX_FDEQ_BIN_0 +221 0x0203 //RX_FDEQ_BIN_1 +222 0x0303 //RX_FDEQ_BIN_2 +223 0x0304 //RX_FDEQ_BIN_3 +224 0x0405 //RX_FDEQ_BIN_4 +225 0x0506 //RX_FDEQ_BIN_5 +226 0x0708 //RX_FDEQ_BIN_6 +227 0x090A //RX_FDEQ_BIN_7 +228 0x0B0C //RX_FDEQ_BIN_8 +229 0x0D08 //RX_FDEQ_BIN_9 +230 0x0000 //RX_FDEQ_BIN_10 +231 0x0000 //RX_FDEQ_BIN_11 +232 0x0000 //RX_FDEQ_BIN_12 +233 0x0000 //RX_FDEQ_BIN_13 +234 0x0000 //RX_FDEQ_BIN_14 +235 0x0000 //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x4000 //RX_FDEQ_RESRV_0 +245 0x0320 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0030 //RX_FDDRC_BAND_MARGIN_1 +248 0x0050 //RX_FDDRC_BAND_MARGIN_2 +249 0x0080 //RX_FDDRC_BAND_MARGIN_3 +250 0x0007 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x5000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x6400 //RX_FDDRC_THRD_3_2 +258 0x6400 //RX_FDDRC_THRD_3_3 +259 0x2000 //RX_FDDRC_SLANT_0_0 +260 0x2000 //RX_FDDRC_SLANT_0_1 +261 0x2000 //RX_FDDRC_SLANT_0_2 +262 0x2000 //RX_FDDRC_SLANT_0_3 +263 0x5333 //RX_FDDRC_SLANT_1_0 +264 0x5333 //RX_FDDRC_SLANT_1_1 +265 0x5333 //RX_FDDRC_SLANT_1_2 +266 0x5333 //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +286 0x0036 //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 +#VOL 4 +163 0x3000 //RX_TDDRC_ALPHA_UP_1 +164 0x3000 //RX_TDDRC_ALPHA_UP_2 +165 0x3000 //RX_TDDRC_ALPHA_UP_3 +166 0x3000 //RX_TDDRC_ALPHA_UP_4 +184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +190 0x7FFF //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +269 0x0000 //RX_TDDRC_THRD_0 +270 0x0000 //RX_TDDRC_THRD_1 +271 0x2000 //RX_TDDRC_THRD_2 +272 0x3000 //RX_TDDRC_THRD_3 +273 0x0800 //RX_TDDRC_SLANT_0 +274 0x7EB8 //RX_TDDRC_SLANT_1 +275 0x3000 //RX_TDDRC_ALPHA_UP_0 +276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x199A //RX_TDDRC_HMNC_GAIN +279 0x0001 //RX_TDDRC_SMT_FLAG +280 0x0CCD //RX_TDDRC_SMT_W +281 0x0200 //RX_TDDRC_DRC_GAIN +195 0x0014 //RX_FDEQ_SUBNUM +196 0x4848 //RX_FDEQ_GAIN_0 +197 0x4848 //RX_FDEQ_GAIN_1 +198 0x4848 //RX_FDEQ_GAIN_2 +199 0x4848 //RX_FDEQ_GAIN_3 +200 0x4848 //RX_FDEQ_GAIN_4 +201 0x4848 //RX_FDEQ_GAIN_5 +202 0x4848 //RX_FDEQ_GAIN_6 +203 0x4848 //RX_FDEQ_GAIN_7 +204 0x4848 //RX_FDEQ_GAIN_8 +205 0x4848 //RX_FDEQ_GAIN_9 +206 0x4848 //RX_FDEQ_GAIN_10 +207 0x4848 //RX_FDEQ_GAIN_11 +208 0x4848 //RX_FDEQ_GAIN_12 +209 0x4848 //RX_FDEQ_GAIN_13 +210 0x4848 //RX_FDEQ_GAIN_14 +211 0x4848 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0202 //RX_FDEQ_BIN_0 +221 0x0203 //RX_FDEQ_BIN_1 +222 0x0303 //RX_FDEQ_BIN_2 +223 0x0304 //RX_FDEQ_BIN_3 +224 0x0405 //RX_FDEQ_BIN_4 +225 0x0506 //RX_FDEQ_BIN_5 +226 0x0708 //RX_FDEQ_BIN_6 +227 0x090A //RX_FDEQ_BIN_7 +228 0x0B0C //RX_FDEQ_BIN_8 +229 0x0D08 //RX_FDEQ_BIN_9 +230 0x0000 //RX_FDEQ_BIN_10 +231 0x0000 //RX_FDEQ_BIN_11 +232 0x0000 //RX_FDEQ_BIN_12 +233 0x0000 //RX_FDEQ_BIN_13 +234 0x0000 //RX_FDEQ_BIN_14 +235 0x0000 //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x4000 //RX_FDEQ_RESRV_0 +245 0x0320 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0030 //RX_FDDRC_BAND_MARGIN_1 +248 0x0050 //RX_FDDRC_BAND_MARGIN_2 +249 0x0080 //RX_FDDRC_BAND_MARGIN_3 +250 0x0007 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x5000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x6400 //RX_FDDRC_THRD_3_2 +258 0x6400 //RX_FDDRC_THRD_3_3 +259 0x2000 //RX_FDDRC_SLANT_0_0 +260 0x2000 //RX_FDDRC_SLANT_0_1 +261 0x2000 //RX_FDDRC_SLANT_0_2 +262 0x2000 //RX_FDDRC_SLANT_0_3 +263 0x5333 //RX_FDDRC_SLANT_1_0 +264 0x5333 //RX_FDDRC_SLANT_1_1 +265 0x5333 //RX_FDDRC_SLANT_1_2 +266 0x5333 //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +286 0x005B //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 +#VOL 5 +163 0x3000 //RX_TDDRC_ALPHA_UP_1 +164 0x3000 //RX_TDDRC_ALPHA_UP_2 +165 0x3000 //RX_TDDRC_ALPHA_UP_3 +166 0x3000 //RX_TDDRC_ALPHA_UP_4 +184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +190 0x7FFF //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +269 0x0000 //RX_TDDRC_THRD_0 +270 0x0000 //RX_TDDRC_THRD_1 +271 0x2000 //RX_TDDRC_THRD_2 +272 0x3000 //RX_TDDRC_THRD_3 +273 0x0800 //RX_TDDRC_SLANT_0 +274 0x7EB8 //RX_TDDRC_SLANT_1 +275 0x3000 //RX_TDDRC_ALPHA_UP_0 +276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x199A //RX_TDDRC_HMNC_GAIN +279 0x0001 //RX_TDDRC_SMT_FLAG +280 0x0CCD //RX_TDDRC_SMT_W +281 0x0200 //RX_TDDRC_DRC_GAIN +195 0x0014 //RX_FDEQ_SUBNUM +196 0x4848 //RX_FDEQ_GAIN_0 +197 0x4848 //RX_FDEQ_GAIN_1 +198 0x4848 //RX_FDEQ_GAIN_2 +199 0x4848 //RX_FDEQ_GAIN_3 +200 0x4848 //RX_FDEQ_GAIN_4 +201 0x4848 //RX_FDEQ_GAIN_5 +202 0x4848 //RX_FDEQ_GAIN_6 +203 0x4848 //RX_FDEQ_GAIN_7 +204 0x4848 //RX_FDEQ_GAIN_8 +205 0x4848 //RX_FDEQ_GAIN_9 +206 0x4848 //RX_FDEQ_GAIN_10 +207 0x4848 //RX_FDEQ_GAIN_11 +208 0x4848 //RX_FDEQ_GAIN_12 +209 0x4848 //RX_FDEQ_GAIN_13 +210 0x4848 //RX_FDEQ_GAIN_14 +211 0x4848 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0202 //RX_FDEQ_BIN_0 +221 0x0203 //RX_FDEQ_BIN_1 +222 0x0303 //RX_FDEQ_BIN_2 +223 0x0304 //RX_FDEQ_BIN_3 +224 0x0405 //RX_FDEQ_BIN_4 +225 0x0506 //RX_FDEQ_BIN_5 +226 0x0708 //RX_FDEQ_BIN_6 +227 0x090A //RX_FDEQ_BIN_7 +228 0x0B0C //RX_FDEQ_BIN_8 +229 0x0D08 //RX_FDEQ_BIN_9 +230 0x0000 //RX_FDEQ_BIN_10 +231 0x0000 //RX_FDEQ_BIN_11 +232 0x0000 //RX_FDEQ_BIN_12 +233 0x0000 //RX_FDEQ_BIN_13 +234 0x0000 //RX_FDEQ_BIN_14 +235 0x0000 //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x4000 //RX_FDEQ_RESRV_0 +245 0x0320 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0030 //RX_FDDRC_BAND_MARGIN_1 +248 0x0050 //RX_FDDRC_BAND_MARGIN_2 +249 0x0080 //RX_FDDRC_BAND_MARGIN_3 +250 0x0007 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x5000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x6400 //RX_FDDRC_THRD_3_2 +258 0x6400 //RX_FDDRC_THRD_3_3 +259 0x2000 //RX_FDDRC_SLANT_0_0 +260 0x2000 //RX_FDDRC_SLANT_0_1 +261 0x2000 //RX_FDDRC_SLANT_0_2 +262 0x2000 //RX_FDDRC_SLANT_0_3 +263 0x5333 //RX_FDDRC_SLANT_1_0 +264 0x5333 //RX_FDDRC_SLANT_1_1 +265 0x5333 //RX_FDDRC_SLANT_1_2 +266 0x5333 //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +286 0x0099 //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 +#VOL 6 +163 0x3000 //RX_TDDRC_ALPHA_UP_1 +164 0x3000 //RX_TDDRC_ALPHA_UP_2 +165 0x3000 //RX_TDDRC_ALPHA_UP_3 +166 0x3000 //RX_TDDRC_ALPHA_UP_4 +184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +190 0x7FFF //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +269 0x0000 //RX_TDDRC_THRD_0 +270 0x0000 //RX_TDDRC_THRD_1 +271 0x2000 //RX_TDDRC_THRD_2 +272 0x3000 //RX_TDDRC_THRD_3 +273 0x0800 //RX_TDDRC_SLANT_0 +274 0x7EB8 //RX_TDDRC_SLANT_1 +275 0x3000 //RX_TDDRC_ALPHA_UP_0 +276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x199A //RX_TDDRC_HMNC_GAIN +279 0x0001 //RX_TDDRC_SMT_FLAG +280 0x0CCD //RX_TDDRC_SMT_W +281 0x0200 //RX_TDDRC_DRC_GAIN +195 0x0014 //RX_FDEQ_SUBNUM +196 0x4848 //RX_FDEQ_GAIN_0 +197 0x4848 //RX_FDEQ_GAIN_1 +198 0x4848 //RX_FDEQ_GAIN_2 +199 0x4848 //RX_FDEQ_GAIN_3 +200 0x4848 //RX_FDEQ_GAIN_4 +201 0x4848 //RX_FDEQ_GAIN_5 +202 0x4848 //RX_FDEQ_GAIN_6 +203 0x4848 //RX_FDEQ_GAIN_7 +204 0x4848 //RX_FDEQ_GAIN_8 +205 0x4848 //RX_FDEQ_GAIN_9 +206 0x4848 //RX_FDEQ_GAIN_10 +207 0x4848 //RX_FDEQ_GAIN_11 +208 0x4848 //RX_FDEQ_GAIN_12 +209 0x4848 //RX_FDEQ_GAIN_13 +210 0x4848 //RX_FDEQ_GAIN_14 +211 0x4848 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0202 //RX_FDEQ_BIN_0 +221 0x0203 //RX_FDEQ_BIN_1 +222 0x0303 //RX_FDEQ_BIN_2 +223 0x0304 //RX_FDEQ_BIN_3 +224 0x0405 //RX_FDEQ_BIN_4 +225 0x0506 //RX_FDEQ_BIN_5 +226 0x0708 //RX_FDEQ_BIN_6 +227 0x090A //RX_FDEQ_BIN_7 +228 0x0B0C //RX_FDEQ_BIN_8 +229 0x0D08 //RX_FDEQ_BIN_9 +230 0x0000 //RX_FDEQ_BIN_10 +231 0x0000 //RX_FDEQ_BIN_11 +232 0x0000 //RX_FDEQ_BIN_12 +233 0x0000 //RX_FDEQ_BIN_13 +234 0x0000 //RX_FDEQ_BIN_14 +235 0x0000 //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x4000 //RX_FDEQ_RESRV_0 +245 0x0320 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0030 //RX_FDDRC_BAND_MARGIN_1 +248 0x0050 //RX_FDDRC_BAND_MARGIN_2 +249 0x0080 //RX_FDDRC_BAND_MARGIN_3 +250 0x0007 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x5000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x6400 //RX_FDDRC_THRD_3_2 +258 0x6400 //RX_FDDRC_THRD_3_3 +259 0x2000 //RX_FDDRC_SLANT_0_0 +260 0x2000 //RX_FDDRC_SLANT_0_1 +261 0x2000 //RX_FDDRC_SLANT_0_2 +262 0x2000 //RX_FDDRC_SLANT_0_3 +263 0x5333 //RX_FDDRC_SLANT_1_0 +264 0x5333 //RX_FDDRC_SLANT_1_1 +265 0x5333 //RX_FDDRC_SLANT_1_2 +266 0x5333 //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +286 0x0100 //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 #CASE_NAME HEADSET-RESERVE1-VOICE_GENERIC-WB -#PARAM_MODE FULL -#PARAM_TYPE TX+RX -#TOTAL_CUSTOM_STEP 7 +#PARAM_MODE Full +#PARAM_TYPE TX+2RX +#TOTAL_CUSTOM_STEP 7+7 #TX 0 0x0009 //TX_OPERATION_MODE_0 1 0x0008 //TX_OPERATION_MODE_1 @@ -16036,7 +24280,7 @@ 239 0x0800 //TX_DT_RESRV_7 240 0x0800 //TX_DT_RESRV_8 241 0x0000 //TX_DT_RESRV_9 -242 0xF400 //TX_THR_SN_EST_0 +242 0xFA00 //TX_THR_SN_EST_0 243 0xF400 //TX_THR_SN_EST_1 244 0xF600 //TX_THR_SN_EST_2 245 0xF400 //TX_THR_SN_EST_3 @@ -16045,20 +24289,20 @@ 248 0xF400 //TX_THR_SN_EST_6 249 0xF600 //TX_THR_SN_EST_7 250 0x0000 //TX_DELTA_THR_SN_EST_0 -251 0x0000 //TX_DELTA_THR_SN_EST_1 +251 0x0200 //TX_DELTA_THR_SN_EST_1 252 0x0200 //TX_DELTA_THR_SN_EST_2 253 0x0200 //TX_DELTA_THR_SN_EST_3 254 0x0200 //TX_DELTA_THR_SN_EST_4 255 0x0200 //TX_DELTA_THR_SN_EST_5 -256 0x0200 //TX_DELTA_THR_SN_EST_6 +256 0x0000 //TX_DELTA_THR_SN_EST_6 257 0x0200 //TX_DELTA_THR_SN_EST_7 258 0x6000 //TX_LAMBDA_NN_EST_0 -259 0x6000 //TX_LAMBDA_NN_EST_1 +259 0x4000 //TX_LAMBDA_NN_EST_1 260 0x4000 //TX_LAMBDA_NN_EST_2 261 0x4000 //TX_LAMBDA_NN_EST_3 262 0x4000 //TX_LAMBDA_NN_EST_4 263 0x4000 //TX_LAMBDA_NN_EST_5 -264 0x4000 //TX_LAMBDA_NN_EST_6 +264 0x6000 //TX_LAMBDA_NN_EST_6 265 0x4000 //TX_LAMBDA_NN_EST_7 266 0x0400 //TX_N_SN_EST 267 0x001E //TX_INBEAM_T @@ -16076,16 +24320,16 @@ 279 0x1000 //TX_B_POST_FLT_0 280 0x1000 //TX_B_POST_FLT_1 281 0x000F //TX_NS_LVL_CTRL_0 -282 0x000F //TX_NS_LVL_CTRL_1 -283 0x0011 //TX_NS_LVL_CTRL_2 +282 0x0011 //TX_NS_LVL_CTRL_1 +283 0x000F //TX_NS_LVL_CTRL_2 284 0x000F //TX_NS_LVL_CTRL_3 285 0x000F //TX_NS_LVL_CTRL_4 286 0x000F //TX_NS_LVL_CTRL_5 287 0x000F //TX_NS_LVL_CTRL_6 288 0x0011 //TX_NS_LVL_CTRL_7 289 0x000C //TX_MIN_GAIN_S_0 -290 0x000C //TX_MIN_GAIN_S_1 -291 0x000F //TX_MIN_GAIN_S_2 +290 0x000F //TX_MIN_GAIN_S_1 +291 0x000C //TX_MIN_GAIN_S_2 292 0x000C //TX_MIN_GAIN_S_3 293 0x000C //TX_MIN_GAIN_S_4 294 0x000C //TX_MIN_GAIN_S_5 @@ -16109,12 +24353,12 @@ 312 0x7FFF //TX_A_POST_FILT_0 313 0x2000 //TX_A_POST_FILT_1 314 0x4000 //TX_A_POST_FILT_S_0 -315 0x4000 //TX_A_POST_FILT_S_1 +315 0x5000 //TX_A_POST_FILT_S_1 316 0x5000 //TX_A_POST_FILT_S_2 317 0x5000 //TX_A_POST_FILT_S_3 318 0x5000 //TX_A_POST_FILT_S_4 319 0x5000 //TX_A_POST_FILT_S_5 -320 0x5000 //TX_A_POST_FILT_S_6 +320 0x4000 //TX_A_POST_FILT_S_6 321 0x5000 //TX_A_POST_FILT_S_7 322 0x1000 //TX_B_POST_FILT_0 323 0x1000 //TX_B_POST_FILT_1 @@ -16161,7 +24405,7 @@ 364 0x0000 //TX_K_APT 365 0x0001 //TX_NOISEDET 366 0x0190 //TX_NDETCT -367 0x0050 //TX_NOISE_TH_0 +367 0x0102 //TX_NOISE_TH_0 368 0x7FFF //TX_NOISE_TH_0_2 369 0x7FFF //TX_NOISE_TH_0_3 370 0x07D0 //TX_NOISE_TH_1 @@ -16173,11 +24417,11 @@ 376 0x7FFF //TX_NOISE_TH_5_3 377 0x7FFF //TX_NOISE_TH_5_4 378 0x044C //TX_NOISE_TH_6 -379 0x0014 //TX_MINENOISE_TH -380 0x4000 //TX_MINENOISE_MIC0_TH_MTS -381 0xFFEE //TX_MINENOISE_MIC0_TH_EXP -382 0x6000 //TX_MINENOISE_MIC0_S_TH_MTS -383 0xFFF3 //TX_MINENOISE_MIC0_S_TH_EXP +379 0x00F8 //TX_MINENOISE_TH +380 0xD508 //TX_MORENS_TFMASK_TH +381 0x0001 //TX_DRC_QUIET_FLOOR +382 0x3A98 //TX_RATIODTL_CUT_TH +383 0x0DAC //TX_DT_CUT_K1 384 0x0666 //TX_OUT_ENER_S_TH_CLEAN 385 0x0666 //TX_OUT_ENER_S_TH_LESSCLEAN 386 0x0333 //TX_OUT_ENER_S_TH_NOISY @@ -16185,22 +24429,22 @@ 388 0x0333 //TX_OUT_ENER_TH_SPEECH 389 0x2000 //TX_SN_NPB_GAIN 390 0x0000 //TX_NN_NPB_GAIN -391 0x0000 //TX_CSX_ALPHA_0 -392 0x0000 //TX_CSX_ALPHA_1 -393 0x0000 //TX_CSX_ALPHA_2 -394 0x0000 //TX_CSX_ALPHA_3 -395 0x0800 //TX_MU_ARSP_EST -396 0x00C8 //TX_P_OUTBEAM_MIN_TH +391 0x7FFF //TX_POST_MASK_SUP_HSNE +392 0x1388 //TX_TAIL_DET_TH +393 0x4000 //TX_B_LESSCUT_RTO_WTA +394 0x0000 //TX_MEL_G_R +395 0x0080 //TX_SUPHIGH_TH +396 0x0000 //TX_MASK_G_R 397 0x0002 //TX_EXTRA_NS_L -398 0x0800 //TX_EXTRA_NS_A -399 0x0005 //TX_VR_NOISE_FLOOR_TH +398 0x1800 //TX_C_POST_FLT_MASK +399 0x7FFF //TX_A_POST_FLT_WNS 400 0x0148 //TX_MIN_G_LOW300HZ 401 0x0002 //TX_MAXLEVEL_CNG 402 0x00B4 //TX_STN_NOISE_TH 403 0x4000 //TX_POST_MASK_SUP 404 0x7FFF //TX_POST_MASK_ADJUST 405 0x00C8 //TX_NS_ENOISE_MIC0_TH -406 0x0014 //TX_MINENOISE_MIC0_TH +406 0x00DC //TX_MINENOISE_MIC0_TH 407 0x012C //TX_MINENOISE_MIC0_S_TH 408 0x7FFF //TX_MIN_G_CTRL_SSNS 409 0x0000 //TX_METAL_RTO_THR @@ -16308,16 +24552,16 @@ 511 0x6666 //TX_MIC_TO_BFGAIN 512 0x0000 //TX_MICTOBFGAIN0 513 0x0000 //TX_FASTMUE_TH -514 0x0000 //TX_DERVB_LEN_0 -515 0x0000 //TX_DERVB_LEN_1 -516 0x0000 //TX_RHO_DERVB -517 0x0000 //TX_MIC_INDX_DERVB -518 0x0000 //TX_MU_DERVB -519 0x0000 //TX_DR_RESRV_0 -520 0x0000 //TX_DR_RESRV_1 -521 0x0000 //TX_DR_RESRV_2 -522 0x0000 //TX_DR_RESRV_3 -523 0x0000 //TX_DR_RESRV_4 +514 0xC000 //TX_DEREVERB_LF_MU +515 0xC000 //TX_DEREVERB_HF_MU +516 0xCCCC //TX_DEREVERB_DELAY +517 0xD999 //TX_DEREVERB_COEF_LEN +518 0x1F40 //TX_DEREVERB_DNR +519 0x0000 //TX_DEREVERB_ALPHA +520 0x0000 //TX_DEREVERB_BETA +521 0x0000 //TX_GSC_RTOL_TH +522 0x7000 //TX_GSC_RTOH_TH +523 0x0064 //TX_WIDE2_MEANHTH 524 0x0000 //TX_DR_RESRV_5 525 0x0000 //TX_DR_RESRV_6 526 0x0000 //TX_DR_RESRV_7 @@ -16685,14 +24929,79 @@ 888 0x00C8 //TX_FASTNS_ARSPC_TH 889 0xC000 //TX_FASTNS_MASK5_TH 890 0x4848 //TX_POSTSSA_MIN_G_VR_MASK -891 0x7FFF //TX_A_LESSCUT_RTO_MASK +891 0x4000 //TX_A_LESSCUT_RTO_MASK 892 0x1770 //TX_FASTNS_NOISETH 893 0xC000 //TX_FASTNS_SSA_THLFL 894 0xC000 //TX_FASTNS_SSA_THHFL 895 0xCCCC //TX_FASTNS_SSA_THLFH 896 0xD999 //TX_FASTNS_SSA_THHFH +897 0x2339 //TX_SENDFUNC_REG_MICMUTE +898 0x0021 //TX_SENDFUNC_REG_MICMUTE1 +899 0x02BC //TX_MICMUTE_RATIO_THR +900 0x0140 //TX_MICMUTE_AMP_THR +901 0x0004 //TX_MICMUTE_HPF_IND +902 0x00C0 //TX_MICMUTE_LOG_EYR_TH +903 0x0008 //TX_MICMUTE_CVG_TIME +904 0x0008 //TX_MICMUTE_RELEASE_TIME +905 0x01FE //TX_MIC_VOLUME_MIC0MUTE +906 0x0020 //TX_MICMUTE_EPD_OFFSET_0 +907 0x001E //TX_MICMUTE_FRQ_AEC_L +908 0x7999 //TX_MICMUTE_EAD_THR +909 0x7FFF //TX_MICMUTE_LAMBDA_CB_NLE +910 0x7FFF //TX_MICMUTE_LAMBDA_RE_EST +911 0x4000 //TX_DTD_THR1_MICMUTE_0 +912 0x7000 //TX_DTD_THR1_MICMUTE_1 +913 0x7FFF //TX_DTD_THR1_MICMUTE_2 +914 0x7FFF //TX_DTD_THR1_MICMUTE_3 +915 0x6CCC //TX_DTD_THR2_MICMUTE_0 +916 0x0400 //TX_MICMUTE_MIN_EQ_RE_EST_0 +917 0x0400 //TX_MICMUTE_MIN_EQ_RE_EST_1 +918 0x1000 //TX_MICMUTE_MIN_EQ_RE_EST_2 +919 0x7FFF //TX_MICMUTE_MIN_EQ_RE_EST_3 +920 0x7FFF //TX_MICMUTE_MIN_EQ_RE_EST_4 +921 0x4000 //TX_MICMUTE_C_POST_FLT +922 0x03E8 //TX_MICMUTE_DT_CUT_K +923 0x0001 //TX_MICMUTE_DT_CUT_THR +924 0x03E8 //TX_MICMUTE_DT_CUT_K2 +925 0x0001 //TX_MICMUTE_DT_CUT_THR2 +926 0x0064 //TX_MICMUTE_DT2_HOLD_N +927 0x1000 //TX_MICMUTE_RATIODTH_THCUT +928 0x1000 //TX_MICMUTE_B_POST_FLT_ECHOL +929 0x7FFF //TX_MICMUTE_B_POST_FLT_ECHOH +930 0x0400 //TX_MICMUTE_C_POST_FLT_MASK +931 0x7999 //TX_MICMUTE_RATIODTL_CUT_TH +932 0x0258 //TX_MICMUTE_DT_CUT_K1 +933 0x0800 //TX_MICMUTE_N2_SN_EST +934 0xFC00 //TX_MICMUTE_THR_SN_EST_0 +935 0x001C //TX_MICMUTE_MIN_G_CTRL_0 +936 0x6000 //TX_MICMUTE_A_POST_FILT_S_0 +937 0x7000 //TX_MICMUTE_B_POST_FILT_0 +938 0x2710 //TX_MIC1RUB_AMP_THR +939 0x0010 //TX_MIC1MUTE_RATIO_THR +940 0x0450 //TX_MIC1MUTE_AMP_THR +941 0x0008 //TX_MIC1MUTE_CVG_TIME +942 0x0008 //TX_MIC1MUTE_RELEASE_TIME +943 0x0000 //TX_AMS_RESRV_01 +944 0x0000 //TX_AMS_RESRV_02 +945 0x0000 //TX_AMS_RESRV_03 +946 0x0000 //TX_AMS_RESRV_04 +947 0x0000 //TX_AMS_RESRV_05 +948 0x0000 //TX_AMS_RESRV_06 +949 0x0000 //TX_AMS_RESRV_07 +950 0x0000 //TX_AMS_RESRV_08 +951 0x0000 //TX_AMS_RESRV_09 +952 0x0000 //TX_AMS_RESRV_10 +953 0x0000 //TX_AMS_RESRV_11 +954 0x0000 //TX_AMS_RESRV_12 +955 0x0000 //TX_AMS_RESRV_13 +956 0x0000 //TX_AMS_RESRV_14 +957 0x0000 //TX_AMS_RESRV_15 +958 0x0000 //TX_AMS_RESRV_16 +959 0x0000 //TX_AMS_RESRV_17 +960 0x0000 //TX_AMS_RESRV_18 +961 0x0000 //TX_AMS_RESRV_19 #RX -0 0x002C //RX_RECVFUNC_MODE_0 +0 0x202C //RX_RECVFUNC_MODE_0 1 0x0000 //RX_RECVFUNC_MODE_1 2 0x0001 //RX_SAMPLINGFREQ_SIG 3 0x0001 //RX_SAMPLINGFREQ_PROC @@ -17542,11 +25851,862 @@ 110 0x0000 //RX_FDDRC_RESRV_0 129 0x0100 //RX_SPK_VOL 130 0x0000 //RX_VOL_RESRV_0 +#RX 2 +157 0x202C //RX_RECVFUNC_MODE_0 +158 0x0000 //RX_RECVFUNC_MODE_1 +159 0x0001 //RX_SAMPLINGFREQ_SIG +160 0x0001 //RX_SAMPLINGFREQ_PROC +161 0x000A //RX_FRAME_SZ +162 0x0000 //RX_DELAY_OPT +163 0x3000 //RX_TDDRC_ALPHA_UP_1 +164 0x3000 //RX_TDDRC_ALPHA_UP_2 +165 0x3000 //RX_TDDRC_ALPHA_UP_3 +166 0x3000 //RX_TDDRC_ALPHA_UP_4 +167 0x0800 //RX_PGA +168 0x7FFF //RX_A_HP +169 0x4000 //RX_B_PE +170 0x3800 //RX_THR_PITCH_DET_0 +171 0x3000 //RX_THR_PITCH_DET_1 +172 0x2800 //RX_THR_PITCH_DET_2 +173 0x0008 //RX_PITCH_BFR_LEN +174 0x0003 //RX_SBD_PITCH_DET +175 0x0100 //RX_PP_RESRV_0 +176 0x0020 //RX_PP_RESRV_1 +177 0x0600 //RX_N_SN_EST +178 0x000C //RX_N2_SN_EST +179 0x0010 //RX_NS_LVL_CTRL +180 0xF800 //RX_THR_SN_EST +181 0x7CCD //RX_LAMBDA_PFILT +182 0x000A //RX_FENS_RESRV_0 +183 0x0190 //RX_FENS_RESRV_1 +184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +187 0x0002 //RX_EXTRA_NS_L +188 0x0800 //RX_EXTRA_NS_A +189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +190 0x7FFF //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +192 0x199A //RX_A_POST_FLT +193 0x0000 //RX_LMT_THRD +194 0x4000 //RX_LMT_ALPHA +195 0x001C //RX_FDEQ_SUBNUM +196 0x4848 //RX_FDEQ_GAIN_0 +197 0x4848 //RX_FDEQ_GAIN_1 +198 0x4848 //RX_FDEQ_GAIN_2 +199 0x4848 //RX_FDEQ_GAIN_3 +200 0x4848 //RX_FDEQ_GAIN_4 +201 0x4848 //RX_FDEQ_GAIN_5 +202 0x4848 //RX_FDEQ_GAIN_6 +203 0x4848 //RX_FDEQ_GAIN_7 +204 0x4848 //RX_FDEQ_GAIN_8 +205 0x4848 //RX_FDEQ_GAIN_9 +206 0x4848 //RX_FDEQ_GAIN_10 +207 0x4848 //RX_FDEQ_GAIN_11 +208 0x4848 //RX_FDEQ_GAIN_12 +209 0x4848 //RX_FDEQ_GAIN_13 +210 0x4848 //RX_FDEQ_GAIN_14 +211 0x4848 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0202 //RX_FDEQ_BIN_0 +221 0x0203 //RX_FDEQ_BIN_1 +222 0x0303 //RX_FDEQ_BIN_2 +223 0x0304 //RX_FDEQ_BIN_3 +224 0x0405 //RX_FDEQ_BIN_4 +225 0x0506 //RX_FDEQ_BIN_5 +226 0x0708 //RX_FDEQ_BIN_6 +227 0x090A //RX_FDEQ_BIN_7 +228 0x0B0C //RX_FDEQ_BIN_8 +229 0x0D0E //RX_FDEQ_BIN_9 +230 0x0E0F //RX_FDEQ_BIN_10 +231 0x0F10 //RX_FDEQ_BIN_11 +232 0x1011 //RX_FDEQ_BIN_12 +233 0x1104 //RX_FDEQ_BIN_13 +234 0x0000 //RX_FDEQ_BIN_14 +235 0x0000 //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x4000 //RX_FDEQ_RESRV_0 +245 0x0320 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0030 //RX_FDDRC_BAND_MARGIN_1 +248 0x0050 //RX_FDDRC_BAND_MARGIN_2 +249 0x0080 //RX_FDDRC_BAND_MARGIN_3 +250 0x0007 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x5000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x6400 //RX_FDDRC_THRD_3_2 +258 0x6400 //RX_FDDRC_THRD_3_3 +259 0x2000 //RX_FDDRC_SLANT_0_0 +260 0x2000 //RX_FDDRC_SLANT_0_1 +261 0x2000 //RX_FDDRC_SLANT_0_2 +262 0x2000 //RX_FDDRC_SLANT_0_3 +263 0x5333 //RX_FDDRC_SLANT_1_0 +264 0x5333 //RX_FDDRC_SLANT_1_1 +265 0x5333 //RX_FDDRC_SLANT_1_2 +266 0x5333 //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +268 0x0002 //RX_FILTINDX +269 0x0000 //RX_TDDRC_THRD_0 +270 0x0000 //RX_TDDRC_THRD_1 +271 0x2000 //RX_TDDRC_THRD_2 +272 0x3000 //RX_TDDRC_THRD_3 +273 0x0800 //RX_TDDRC_SLANT_0 +274 0x7EB8 //RX_TDDRC_SLANT_1 +275 0x3000 //RX_TDDRC_ALPHA_UP_0 +276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x199A //RX_TDDRC_HMNC_GAIN +279 0x0001 //RX_TDDRC_SMT_FLAG +280 0x0CCD //RX_TDDRC_SMT_W +281 0x0196 //RX_TDDRC_DRC_GAIN +282 0x7C00 //RX_LAMBDA_PKA_FP +283 0x2000 //RX_TPKA_FP +284 0x2000 //RX_MIN_G_FP +285 0x0080 //RX_MAX_G_FP +286 0x000B //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 +288 0x0000 //RX_MAXLEVEL_CNG +289 0x3000 //RX_BWE_UV_TH +290 0x3000 //RX_BWE_UV_TH2 +291 0x1800 //RX_BWE_UV_TH3 +292 0x1000 //RX_BWE_V_TH +293 0x04CD //RX_BWE_GAIN1_V_TH1 +294 0x0F33 //RX_BWE_GAIN1_V_TH2 +295 0x7333 //RX_BWE_UV_EQ +296 0x199A //RX_BWE_V_EQ +297 0x7333 //RX_BWE_TONE_TH +298 0x0004 //RX_BWE_UV_HOLD_T +299 0x6CCD //RX_BWE_GAIN2_ALPHA +300 0x799A //RX_BWE_GAIN3_ALPHA +301 0x001E //RX_BWE_CUTOFF +302 0x3000 //RX_BWE_GAINFILL +303 0x3200 //RX_BWE_MAXTH_TONE +304 0x2000 //RX_BWE_EQ_0 +305 0x2000 //RX_BWE_EQ_1 +306 0x2000 //RX_BWE_EQ_2 +307 0x2000 //RX_BWE_EQ_3 +308 0x2000 //RX_BWE_EQ_4 +309 0x2000 //RX_BWE_EQ_5 +310 0x2000 //RX_BWE_EQ_6 +311 0x0000 //RX_BWE_RESRV_0 +312 0x0000 //RX_BWE_RESRV_1 +313 0x0000 //RX_BWE_RESRV_2 +#VOL 0 +163 0x3000 //RX_TDDRC_ALPHA_UP_1 +164 0x3000 //RX_TDDRC_ALPHA_UP_2 +165 0x3000 //RX_TDDRC_ALPHA_UP_3 +166 0x3000 //RX_TDDRC_ALPHA_UP_4 +184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +190 0x7FFF //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +269 0x0000 //RX_TDDRC_THRD_0 +270 0x0000 //RX_TDDRC_THRD_1 +271 0x2000 //RX_TDDRC_THRD_2 +272 0x3000 //RX_TDDRC_THRD_3 +273 0x0800 //RX_TDDRC_SLANT_0 +274 0x7EB8 //RX_TDDRC_SLANT_1 +275 0x3000 //RX_TDDRC_ALPHA_UP_0 +276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x199A //RX_TDDRC_HMNC_GAIN +279 0x0001 //RX_TDDRC_SMT_FLAG +280 0x0CCD //RX_TDDRC_SMT_W +281 0x0196 //RX_TDDRC_DRC_GAIN +195 0x001C //RX_FDEQ_SUBNUM +196 0x4848 //RX_FDEQ_GAIN_0 +197 0x4848 //RX_FDEQ_GAIN_1 +198 0x4848 //RX_FDEQ_GAIN_2 +199 0x4848 //RX_FDEQ_GAIN_3 +200 0x4848 //RX_FDEQ_GAIN_4 +201 0x4848 //RX_FDEQ_GAIN_5 +202 0x4848 //RX_FDEQ_GAIN_6 +203 0x4848 //RX_FDEQ_GAIN_7 +204 0x4848 //RX_FDEQ_GAIN_8 +205 0x4848 //RX_FDEQ_GAIN_9 +206 0x4848 //RX_FDEQ_GAIN_10 +207 0x4848 //RX_FDEQ_GAIN_11 +208 0x4848 //RX_FDEQ_GAIN_12 +209 0x4848 //RX_FDEQ_GAIN_13 +210 0x4848 //RX_FDEQ_GAIN_14 +211 0x4848 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0202 //RX_FDEQ_BIN_0 +221 0x0203 //RX_FDEQ_BIN_1 +222 0x0303 //RX_FDEQ_BIN_2 +223 0x0304 //RX_FDEQ_BIN_3 +224 0x0405 //RX_FDEQ_BIN_4 +225 0x0506 //RX_FDEQ_BIN_5 +226 0x0708 //RX_FDEQ_BIN_6 +227 0x090A //RX_FDEQ_BIN_7 +228 0x0B0C //RX_FDEQ_BIN_8 +229 0x0D0E //RX_FDEQ_BIN_9 +230 0x0E0F //RX_FDEQ_BIN_10 +231 0x0F10 //RX_FDEQ_BIN_11 +232 0x1011 //RX_FDEQ_BIN_12 +233 0x1104 //RX_FDEQ_BIN_13 +234 0x0000 //RX_FDEQ_BIN_14 +235 0x0000 //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x4000 //RX_FDEQ_RESRV_0 +245 0x0320 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0030 //RX_FDDRC_BAND_MARGIN_1 +248 0x0050 //RX_FDDRC_BAND_MARGIN_2 +249 0x0080 //RX_FDDRC_BAND_MARGIN_3 +250 0x0007 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x5000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x6400 //RX_FDDRC_THRD_3_2 +258 0x6400 //RX_FDDRC_THRD_3_3 +259 0x2000 //RX_FDDRC_SLANT_0_0 +260 0x2000 //RX_FDDRC_SLANT_0_1 +261 0x2000 //RX_FDDRC_SLANT_0_2 +262 0x2000 //RX_FDDRC_SLANT_0_3 +263 0x5333 //RX_FDDRC_SLANT_1_0 +264 0x5333 //RX_FDDRC_SLANT_1_1 +265 0x5333 //RX_FDDRC_SLANT_1_2 +266 0x5333 //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +286 0x000B //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 +#VOL 1 +163 0x3000 //RX_TDDRC_ALPHA_UP_1 +164 0x3000 //RX_TDDRC_ALPHA_UP_2 +165 0x3000 //RX_TDDRC_ALPHA_UP_3 +166 0x3000 //RX_TDDRC_ALPHA_UP_4 +184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +190 0x7FFF //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +269 0x0000 //RX_TDDRC_THRD_0 +270 0x0000 //RX_TDDRC_THRD_1 +271 0x2000 //RX_TDDRC_THRD_2 +272 0x3000 //RX_TDDRC_THRD_3 +273 0x0800 //RX_TDDRC_SLANT_0 +274 0x7EB8 //RX_TDDRC_SLANT_1 +275 0x3000 //RX_TDDRC_ALPHA_UP_0 +276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x199A //RX_TDDRC_HMNC_GAIN +279 0x0001 //RX_TDDRC_SMT_FLAG +280 0x0CCD //RX_TDDRC_SMT_W +281 0x0196 //RX_TDDRC_DRC_GAIN +195 0x001C //RX_FDEQ_SUBNUM +196 0x4848 //RX_FDEQ_GAIN_0 +197 0x4848 //RX_FDEQ_GAIN_1 +198 0x4848 //RX_FDEQ_GAIN_2 +199 0x4848 //RX_FDEQ_GAIN_3 +200 0x4848 //RX_FDEQ_GAIN_4 +201 0x4848 //RX_FDEQ_GAIN_5 +202 0x4848 //RX_FDEQ_GAIN_6 +203 0x4848 //RX_FDEQ_GAIN_7 +204 0x4848 //RX_FDEQ_GAIN_8 +205 0x4848 //RX_FDEQ_GAIN_9 +206 0x4848 //RX_FDEQ_GAIN_10 +207 0x4848 //RX_FDEQ_GAIN_11 +208 0x4848 //RX_FDEQ_GAIN_12 +209 0x4848 //RX_FDEQ_GAIN_13 +210 0x4848 //RX_FDEQ_GAIN_14 +211 0x4848 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0202 //RX_FDEQ_BIN_0 +221 0x0203 //RX_FDEQ_BIN_1 +222 0x0303 //RX_FDEQ_BIN_2 +223 0x0304 //RX_FDEQ_BIN_3 +224 0x0405 //RX_FDEQ_BIN_4 +225 0x0506 //RX_FDEQ_BIN_5 +226 0x0708 //RX_FDEQ_BIN_6 +227 0x090A //RX_FDEQ_BIN_7 +228 0x0B0C //RX_FDEQ_BIN_8 +229 0x0D0E //RX_FDEQ_BIN_9 +230 0x0E0F //RX_FDEQ_BIN_10 +231 0x0F10 //RX_FDEQ_BIN_11 +232 0x1011 //RX_FDEQ_BIN_12 +233 0x1104 //RX_FDEQ_BIN_13 +234 0x0000 //RX_FDEQ_BIN_14 +235 0x0000 //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x4000 //RX_FDEQ_RESRV_0 +245 0x0320 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0030 //RX_FDDRC_BAND_MARGIN_1 +248 0x0050 //RX_FDDRC_BAND_MARGIN_2 +249 0x0080 //RX_FDDRC_BAND_MARGIN_3 +250 0x0007 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x5000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x6400 //RX_FDDRC_THRD_3_2 +258 0x6400 //RX_FDDRC_THRD_3_3 +259 0x2000 //RX_FDDRC_SLANT_0_0 +260 0x2000 //RX_FDDRC_SLANT_0_1 +261 0x2000 //RX_FDDRC_SLANT_0_2 +262 0x2000 //RX_FDDRC_SLANT_0_3 +263 0x5333 //RX_FDDRC_SLANT_1_0 +264 0x5333 //RX_FDDRC_SLANT_1_1 +265 0x5333 //RX_FDDRC_SLANT_1_2 +266 0x5333 //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +286 0x0013 //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 +#VOL 2 +163 0x3000 //RX_TDDRC_ALPHA_UP_1 +164 0x3000 //RX_TDDRC_ALPHA_UP_2 +165 0x3000 //RX_TDDRC_ALPHA_UP_3 +166 0x3000 //RX_TDDRC_ALPHA_UP_4 +184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +190 0x7FFF //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +269 0x0000 //RX_TDDRC_THRD_0 +270 0x0000 //RX_TDDRC_THRD_1 +271 0x2000 //RX_TDDRC_THRD_2 +272 0x3000 //RX_TDDRC_THRD_3 +273 0x0800 //RX_TDDRC_SLANT_0 +274 0x7EB8 //RX_TDDRC_SLANT_1 +275 0x3000 //RX_TDDRC_ALPHA_UP_0 +276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x199A //RX_TDDRC_HMNC_GAIN +279 0x0001 //RX_TDDRC_SMT_FLAG +280 0x0CCD //RX_TDDRC_SMT_W +281 0x0196 //RX_TDDRC_DRC_GAIN +195 0x001C //RX_FDEQ_SUBNUM +196 0x4848 //RX_FDEQ_GAIN_0 +197 0x4848 //RX_FDEQ_GAIN_1 +198 0x4848 //RX_FDEQ_GAIN_2 +199 0x4848 //RX_FDEQ_GAIN_3 +200 0x4848 //RX_FDEQ_GAIN_4 +201 0x4848 //RX_FDEQ_GAIN_5 +202 0x4848 //RX_FDEQ_GAIN_6 +203 0x4848 //RX_FDEQ_GAIN_7 +204 0x4848 //RX_FDEQ_GAIN_8 +205 0x4848 //RX_FDEQ_GAIN_9 +206 0x4848 //RX_FDEQ_GAIN_10 +207 0x4848 //RX_FDEQ_GAIN_11 +208 0x4848 //RX_FDEQ_GAIN_12 +209 0x4848 //RX_FDEQ_GAIN_13 +210 0x4848 //RX_FDEQ_GAIN_14 +211 0x4848 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0202 //RX_FDEQ_BIN_0 +221 0x0203 //RX_FDEQ_BIN_1 +222 0x0303 //RX_FDEQ_BIN_2 +223 0x0304 //RX_FDEQ_BIN_3 +224 0x0405 //RX_FDEQ_BIN_4 +225 0x0506 //RX_FDEQ_BIN_5 +226 0x0708 //RX_FDEQ_BIN_6 +227 0x090A //RX_FDEQ_BIN_7 +228 0x0B0C //RX_FDEQ_BIN_8 +229 0x0D0E //RX_FDEQ_BIN_9 +230 0x0E0F //RX_FDEQ_BIN_10 +231 0x0F10 //RX_FDEQ_BIN_11 +232 0x1011 //RX_FDEQ_BIN_12 +233 0x1104 //RX_FDEQ_BIN_13 +234 0x0000 //RX_FDEQ_BIN_14 +235 0x0000 //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x4000 //RX_FDEQ_RESRV_0 +245 0x0320 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0030 //RX_FDDRC_BAND_MARGIN_1 +248 0x0050 //RX_FDDRC_BAND_MARGIN_2 +249 0x0080 //RX_FDDRC_BAND_MARGIN_3 +250 0x0007 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x5000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x6400 //RX_FDDRC_THRD_3_2 +258 0x6400 //RX_FDDRC_THRD_3_3 +259 0x2000 //RX_FDDRC_SLANT_0_0 +260 0x2000 //RX_FDDRC_SLANT_0_1 +261 0x2000 //RX_FDDRC_SLANT_0_2 +262 0x2000 //RX_FDDRC_SLANT_0_3 +263 0x5333 //RX_FDDRC_SLANT_1_0 +264 0x5333 //RX_FDDRC_SLANT_1_1 +265 0x5333 //RX_FDDRC_SLANT_1_2 +266 0x5333 //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +286 0x0020 //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 +#VOL 3 +163 0x3000 //RX_TDDRC_ALPHA_UP_1 +164 0x3000 //RX_TDDRC_ALPHA_UP_2 +165 0x3000 //RX_TDDRC_ALPHA_UP_3 +166 0x3000 //RX_TDDRC_ALPHA_UP_4 +184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +190 0x7FFF //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +269 0x0000 //RX_TDDRC_THRD_0 +270 0x0000 //RX_TDDRC_THRD_1 +271 0x2000 //RX_TDDRC_THRD_2 +272 0x3000 //RX_TDDRC_THRD_3 +273 0x0800 //RX_TDDRC_SLANT_0 +274 0x7EB8 //RX_TDDRC_SLANT_1 +275 0x3000 //RX_TDDRC_ALPHA_UP_0 +276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x199A //RX_TDDRC_HMNC_GAIN +279 0x0001 //RX_TDDRC_SMT_FLAG +280 0x0CCD //RX_TDDRC_SMT_W +281 0x0196 //RX_TDDRC_DRC_GAIN +195 0x001C //RX_FDEQ_SUBNUM +196 0x4848 //RX_FDEQ_GAIN_0 +197 0x4848 //RX_FDEQ_GAIN_1 +198 0x4848 //RX_FDEQ_GAIN_2 +199 0x4848 //RX_FDEQ_GAIN_3 +200 0x4848 //RX_FDEQ_GAIN_4 +201 0x4848 //RX_FDEQ_GAIN_5 +202 0x4848 //RX_FDEQ_GAIN_6 +203 0x4848 //RX_FDEQ_GAIN_7 +204 0x4848 //RX_FDEQ_GAIN_8 +205 0x4848 //RX_FDEQ_GAIN_9 +206 0x4848 //RX_FDEQ_GAIN_10 +207 0x4848 //RX_FDEQ_GAIN_11 +208 0x4848 //RX_FDEQ_GAIN_12 +209 0x4848 //RX_FDEQ_GAIN_13 +210 0x4848 //RX_FDEQ_GAIN_14 +211 0x4848 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0202 //RX_FDEQ_BIN_0 +221 0x0203 //RX_FDEQ_BIN_1 +222 0x0303 //RX_FDEQ_BIN_2 +223 0x0304 //RX_FDEQ_BIN_3 +224 0x0405 //RX_FDEQ_BIN_4 +225 0x0506 //RX_FDEQ_BIN_5 +226 0x0708 //RX_FDEQ_BIN_6 +227 0x090A //RX_FDEQ_BIN_7 +228 0x0B0C //RX_FDEQ_BIN_8 +229 0x0D0E //RX_FDEQ_BIN_9 +230 0x0E0F //RX_FDEQ_BIN_10 +231 0x0F10 //RX_FDEQ_BIN_11 +232 0x1011 //RX_FDEQ_BIN_12 +233 0x1104 //RX_FDEQ_BIN_13 +234 0x0000 //RX_FDEQ_BIN_14 +235 0x0000 //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x4000 //RX_FDEQ_RESRV_0 +245 0x0320 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0030 //RX_FDDRC_BAND_MARGIN_1 +248 0x0050 //RX_FDDRC_BAND_MARGIN_2 +249 0x0080 //RX_FDDRC_BAND_MARGIN_3 +250 0x0007 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x5000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x6400 //RX_FDDRC_THRD_3_2 +258 0x6400 //RX_FDDRC_THRD_3_3 +259 0x2000 //RX_FDDRC_SLANT_0_0 +260 0x2000 //RX_FDDRC_SLANT_0_1 +261 0x2000 //RX_FDDRC_SLANT_0_2 +262 0x2000 //RX_FDDRC_SLANT_0_3 +263 0x5333 //RX_FDDRC_SLANT_1_0 +264 0x5333 //RX_FDDRC_SLANT_1_1 +265 0x5333 //RX_FDDRC_SLANT_1_2 +266 0x5333 //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +286 0x0036 //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 +#VOL 4 +163 0x3000 //RX_TDDRC_ALPHA_UP_1 +164 0x3000 //RX_TDDRC_ALPHA_UP_2 +165 0x3000 //RX_TDDRC_ALPHA_UP_3 +166 0x3000 //RX_TDDRC_ALPHA_UP_4 +184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +190 0x7FFF //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +269 0x0000 //RX_TDDRC_THRD_0 +270 0x0000 //RX_TDDRC_THRD_1 +271 0x2000 //RX_TDDRC_THRD_2 +272 0x3000 //RX_TDDRC_THRD_3 +273 0x0800 //RX_TDDRC_SLANT_0 +274 0x7EB8 //RX_TDDRC_SLANT_1 +275 0x3000 //RX_TDDRC_ALPHA_UP_0 +276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x199A //RX_TDDRC_HMNC_GAIN +279 0x0001 //RX_TDDRC_SMT_FLAG +280 0x0CCD //RX_TDDRC_SMT_W +281 0x0196 //RX_TDDRC_DRC_GAIN +195 0x001C //RX_FDEQ_SUBNUM +196 0x4848 //RX_FDEQ_GAIN_0 +197 0x4848 //RX_FDEQ_GAIN_1 +198 0x4848 //RX_FDEQ_GAIN_2 +199 0x4848 //RX_FDEQ_GAIN_3 +200 0x4848 //RX_FDEQ_GAIN_4 +201 0x4848 //RX_FDEQ_GAIN_5 +202 0x4848 //RX_FDEQ_GAIN_6 +203 0x4848 //RX_FDEQ_GAIN_7 +204 0x4848 //RX_FDEQ_GAIN_8 +205 0x4848 //RX_FDEQ_GAIN_9 +206 0x4848 //RX_FDEQ_GAIN_10 +207 0x4848 //RX_FDEQ_GAIN_11 +208 0x4848 //RX_FDEQ_GAIN_12 +209 0x4848 //RX_FDEQ_GAIN_13 +210 0x4848 //RX_FDEQ_GAIN_14 +211 0x4848 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0202 //RX_FDEQ_BIN_0 +221 0x0203 //RX_FDEQ_BIN_1 +222 0x0303 //RX_FDEQ_BIN_2 +223 0x0304 //RX_FDEQ_BIN_3 +224 0x0405 //RX_FDEQ_BIN_4 +225 0x0506 //RX_FDEQ_BIN_5 +226 0x0708 //RX_FDEQ_BIN_6 +227 0x090A //RX_FDEQ_BIN_7 +228 0x0B0C //RX_FDEQ_BIN_8 +229 0x0D0E //RX_FDEQ_BIN_9 +230 0x0E0F //RX_FDEQ_BIN_10 +231 0x0F10 //RX_FDEQ_BIN_11 +232 0x1011 //RX_FDEQ_BIN_12 +233 0x1104 //RX_FDEQ_BIN_13 +234 0x0000 //RX_FDEQ_BIN_14 +235 0x0000 //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x4000 //RX_FDEQ_RESRV_0 +245 0x0320 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0030 //RX_FDDRC_BAND_MARGIN_1 +248 0x0050 //RX_FDDRC_BAND_MARGIN_2 +249 0x0080 //RX_FDDRC_BAND_MARGIN_3 +250 0x0007 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x5000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x6400 //RX_FDDRC_THRD_3_2 +258 0x6400 //RX_FDDRC_THRD_3_3 +259 0x2000 //RX_FDDRC_SLANT_0_0 +260 0x2000 //RX_FDDRC_SLANT_0_1 +261 0x2000 //RX_FDDRC_SLANT_0_2 +262 0x2000 //RX_FDDRC_SLANT_0_3 +263 0x5333 //RX_FDDRC_SLANT_1_0 +264 0x5333 //RX_FDDRC_SLANT_1_1 +265 0x5333 //RX_FDDRC_SLANT_1_2 +266 0x5333 //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +286 0x005B //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 +#VOL 5 +163 0x3000 //RX_TDDRC_ALPHA_UP_1 +164 0x3000 //RX_TDDRC_ALPHA_UP_2 +165 0x3000 //RX_TDDRC_ALPHA_UP_3 +166 0x3000 //RX_TDDRC_ALPHA_UP_4 +184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +190 0x7FFF //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +269 0x0000 //RX_TDDRC_THRD_0 +270 0x0000 //RX_TDDRC_THRD_1 +271 0x2000 //RX_TDDRC_THRD_2 +272 0x3000 //RX_TDDRC_THRD_3 +273 0x0800 //RX_TDDRC_SLANT_0 +274 0x7EB8 //RX_TDDRC_SLANT_1 +275 0x3000 //RX_TDDRC_ALPHA_UP_0 +276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x199A //RX_TDDRC_HMNC_GAIN +279 0x0001 //RX_TDDRC_SMT_FLAG +280 0x0CCD //RX_TDDRC_SMT_W +281 0x0196 //RX_TDDRC_DRC_GAIN +195 0x001C //RX_FDEQ_SUBNUM +196 0x4848 //RX_FDEQ_GAIN_0 +197 0x4848 //RX_FDEQ_GAIN_1 +198 0x4848 //RX_FDEQ_GAIN_2 +199 0x4848 //RX_FDEQ_GAIN_3 +200 0x4848 //RX_FDEQ_GAIN_4 +201 0x4848 //RX_FDEQ_GAIN_5 +202 0x4848 //RX_FDEQ_GAIN_6 +203 0x4848 //RX_FDEQ_GAIN_7 +204 0x4848 //RX_FDEQ_GAIN_8 +205 0x4848 //RX_FDEQ_GAIN_9 +206 0x4848 //RX_FDEQ_GAIN_10 +207 0x4848 //RX_FDEQ_GAIN_11 +208 0x4848 //RX_FDEQ_GAIN_12 +209 0x4848 //RX_FDEQ_GAIN_13 +210 0x4848 //RX_FDEQ_GAIN_14 +211 0x4848 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0202 //RX_FDEQ_BIN_0 +221 0x0203 //RX_FDEQ_BIN_1 +222 0x0303 //RX_FDEQ_BIN_2 +223 0x0304 //RX_FDEQ_BIN_3 +224 0x0405 //RX_FDEQ_BIN_4 +225 0x0506 //RX_FDEQ_BIN_5 +226 0x0708 //RX_FDEQ_BIN_6 +227 0x090A //RX_FDEQ_BIN_7 +228 0x0B0C //RX_FDEQ_BIN_8 +229 0x0D0E //RX_FDEQ_BIN_9 +230 0x0E0F //RX_FDEQ_BIN_10 +231 0x0F10 //RX_FDEQ_BIN_11 +232 0x1011 //RX_FDEQ_BIN_12 +233 0x1104 //RX_FDEQ_BIN_13 +234 0x0000 //RX_FDEQ_BIN_14 +235 0x0000 //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x4000 //RX_FDEQ_RESRV_0 +245 0x0320 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0030 //RX_FDDRC_BAND_MARGIN_1 +248 0x0050 //RX_FDDRC_BAND_MARGIN_2 +249 0x0080 //RX_FDDRC_BAND_MARGIN_3 +250 0x0007 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x5000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x6400 //RX_FDDRC_THRD_3_2 +258 0x6400 //RX_FDDRC_THRD_3_3 +259 0x2000 //RX_FDDRC_SLANT_0_0 +260 0x2000 //RX_FDDRC_SLANT_0_1 +261 0x2000 //RX_FDDRC_SLANT_0_2 +262 0x2000 //RX_FDDRC_SLANT_0_3 +263 0x5333 //RX_FDDRC_SLANT_1_0 +264 0x5333 //RX_FDDRC_SLANT_1_1 +265 0x5333 //RX_FDDRC_SLANT_1_2 +266 0x5333 //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +286 0x0099 //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 +#VOL 6 +163 0x3000 //RX_TDDRC_ALPHA_UP_1 +164 0x3000 //RX_TDDRC_ALPHA_UP_2 +165 0x3000 //RX_TDDRC_ALPHA_UP_3 +166 0x3000 //RX_TDDRC_ALPHA_UP_4 +184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +190 0x7FFF //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +269 0x0000 //RX_TDDRC_THRD_0 +270 0x0000 //RX_TDDRC_THRD_1 +271 0x2000 //RX_TDDRC_THRD_2 +272 0x3000 //RX_TDDRC_THRD_3 +273 0x0800 //RX_TDDRC_SLANT_0 +274 0x7EB8 //RX_TDDRC_SLANT_1 +275 0x3000 //RX_TDDRC_ALPHA_UP_0 +276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x199A //RX_TDDRC_HMNC_GAIN +279 0x0001 //RX_TDDRC_SMT_FLAG +280 0x0CCD //RX_TDDRC_SMT_W +281 0x0196 //RX_TDDRC_DRC_GAIN +195 0x001C //RX_FDEQ_SUBNUM +196 0x4848 //RX_FDEQ_GAIN_0 +197 0x4848 //RX_FDEQ_GAIN_1 +198 0x4848 //RX_FDEQ_GAIN_2 +199 0x4848 //RX_FDEQ_GAIN_3 +200 0x4848 //RX_FDEQ_GAIN_4 +201 0x4848 //RX_FDEQ_GAIN_5 +202 0x4848 //RX_FDEQ_GAIN_6 +203 0x4848 //RX_FDEQ_GAIN_7 +204 0x4848 //RX_FDEQ_GAIN_8 +205 0x4848 //RX_FDEQ_GAIN_9 +206 0x4848 //RX_FDEQ_GAIN_10 +207 0x4848 //RX_FDEQ_GAIN_11 +208 0x4848 //RX_FDEQ_GAIN_12 +209 0x4848 //RX_FDEQ_GAIN_13 +210 0x4848 //RX_FDEQ_GAIN_14 +211 0x4848 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0202 //RX_FDEQ_BIN_0 +221 0x0203 //RX_FDEQ_BIN_1 +222 0x0303 //RX_FDEQ_BIN_2 +223 0x0304 //RX_FDEQ_BIN_3 +224 0x0405 //RX_FDEQ_BIN_4 +225 0x0506 //RX_FDEQ_BIN_5 +226 0x0708 //RX_FDEQ_BIN_6 +227 0x090A //RX_FDEQ_BIN_7 +228 0x0B0C //RX_FDEQ_BIN_8 +229 0x0D0E //RX_FDEQ_BIN_9 +230 0x0E0F //RX_FDEQ_BIN_10 +231 0x0F10 //RX_FDEQ_BIN_11 +232 0x1011 //RX_FDEQ_BIN_12 +233 0x1104 //RX_FDEQ_BIN_13 +234 0x0000 //RX_FDEQ_BIN_14 +235 0x0000 //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x4000 //RX_FDEQ_RESRV_0 +245 0x0320 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0030 //RX_FDDRC_BAND_MARGIN_1 +248 0x0050 //RX_FDDRC_BAND_MARGIN_2 +249 0x0080 //RX_FDDRC_BAND_MARGIN_3 +250 0x0007 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x5000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x6400 //RX_FDDRC_THRD_3_2 +258 0x6400 //RX_FDDRC_THRD_3_3 +259 0x2000 //RX_FDDRC_SLANT_0_0 +260 0x2000 //RX_FDDRC_SLANT_0_1 +261 0x2000 //RX_FDDRC_SLANT_0_2 +262 0x2000 //RX_FDDRC_SLANT_0_3 +263 0x5333 //RX_FDDRC_SLANT_1_0 +264 0x5333 //RX_FDDRC_SLANT_1_1 +265 0x5333 //RX_FDDRC_SLANT_1_2 +266 0x5333 //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +286 0x0100 //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 #CASE_NAME HEADSET-RESERVE1-VOICE_GENERIC-SWB -#PARAM_MODE FULL -#PARAM_TYPE TX+RX -#TOTAL_CUSTOM_STEP 7 +#PARAM_MODE Full +#PARAM_TYPE TX+2RX +#TOTAL_CUSTOM_STEP 7+7 #TX 0 0x0009 //TX_OPERATION_MODE_0 1 0x0001 //TX_OPERATION_MODE_1 @@ -17790,7 +26950,7 @@ 239 0x0800 //TX_DT_RESRV_7 240 0x0800 //TX_DT_RESRV_8 241 0x0000 //TX_DT_RESRV_9 -242 0xF400 //TX_THR_SN_EST_0 +242 0xFA00 //TX_THR_SN_EST_0 243 0xF400 //TX_THR_SN_EST_1 244 0xF600 //TX_THR_SN_EST_2 245 0xF400 //TX_THR_SN_EST_3 @@ -17799,20 +26959,20 @@ 248 0xF400 //TX_THR_SN_EST_6 249 0xF600 //TX_THR_SN_EST_7 250 0x0000 //TX_DELTA_THR_SN_EST_0 -251 0x0000 //TX_DELTA_THR_SN_EST_1 +251 0x0200 //TX_DELTA_THR_SN_EST_1 252 0x0200 //TX_DELTA_THR_SN_EST_2 253 0x0200 //TX_DELTA_THR_SN_EST_3 254 0x0200 //TX_DELTA_THR_SN_EST_4 255 0x0200 //TX_DELTA_THR_SN_EST_5 -256 0x0200 //TX_DELTA_THR_SN_EST_6 +256 0x0000 //TX_DELTA_THR_SN_EST_6 257 0x0200 //TX_DELTA_THR_SN_EST_7 258 0x6000 //TX_LAMBDA_NN_EST_0 -259 0x6000 //TX_LAMBDA_NN_EST_1 +259 0x4000 //TX_LAMBDA_NN_EST_1 260 0x4000 //TX_LAMBDA_NN_EST_2 261 0x4000 //TX_LAMBDA_NN_EST_3 262 0x4000 //TX_LAMBDA_NN_EST_4 263 0x4000 //TX_LAMBDA_NN_EST_5 -264 0x4000 //TX_LAMBDA_NN_EST_6 +264 0x6000 //TX_LAMBDA_NN_EST_6 265 0x4000 //TX_LAMBDA_NN_EST_7 266 0x0400 //TX_N_SN_EST 267 0x001E //TX_INBEAM_T @@ -17830,16 +26990,16 @@ 279 0x1000 //TX_B_POST_FLT_0 280 0x1000 //TX_B_POST_FLT_1 281 0x000B //TX_NS_LVL_CTRL_0 -282 0x000F //TX_NS_LVL_CTRL_1 -283 0x0011 //TX_NS_LVL_CTRL_2 +282 0x0011 //TX_NS_LVL_CTRL_1 +283 0x000F //TX_NS_LVL_CTRL_2 284 0x000F //TX_NS_LVL_CTRL_3 285 0x000F //TX_NS_LVL_CTRL_4 286 0x000F //TX_NS_LVL_CTRL_5 287 0x000F //TX_NS_LVL_CTRL_6 288 0x0011 //TX_NS_LVL_CTRL_7 289 0x000C //TX_MIN_GAIN_S_0 -290 0x000C //TX_MIN_GAIN_S_1 -291 0x000F //TX_MIN_GAIN_S_2 +290 0x000F //TX_MIN_GAIN_S_1 +291 0x000C //TX_MIN_GAIN_S_2 292 0x000C //TX_MIN_GAIN_S_3 293 0x000C //TX_MIN_GAIN_S_4 294 0x000C //TX_MIN_GAIN_S_5 @@ -17863,12 +27023,12 @@ 312 0x7FFF //TX_A_POST_FILT_0 313 0x2000 //TX_A_POST_FILT_1 314 0x2000 //TX_A_POST_FILT_S_0 -315 0x4000 //TX_A_POST_FILT_S_1 +315 0x5000 //TX_A_POST_FILT_S_1 316 0x5000 //TX_A_POST_FILT_S_2 317 0x5000 //TX_A_POST_FILT_S_3 318 0x5000 //TX_A_POST_FILT_S_4 319 0x5000 //TX_A_POST_FILT_S_5 -320 0x5000 //TX_A_POST_FILT_S_6 +320 0x4000 //TX_A_POST_FILT_S_6 321 0x5000 //TX_A_POST_FILT_S_7 322 0x1000 //TX_B_POST_FILT_0 323 0x1000 //TX_B_POST_FILT_1 @@ -17915,7 +27075,7 @@ 364 0x0000 //TX_K_APT 365 0x0001 //TX_NOISEDET 366 0x0190 //TX_NDETCT -367 0x0050 //TX_NOISE_TH_0 +367 0x0383 //TX_NOISE_TH_0 368 0x7FFF //TX_NOISE_TH_0_2 369 0x7FFF //TX_NOISE_TH_0_3 370 0x07D0 //TX_NOISE_TH_1 @@ -17927,11 +27087,11 @@ 376 0x7FFF //TX_NOISE_TH_5_3 377 0x7FFF //TX_NOISE_TH_5_4 378 0x044C //TX_NOISE_TH_6 -379 0x0014 //TX_MINENOISE_TH -380 0x4000 //TX_MINENOISE_MIC0_TH_MTS -381 0xFFEE //TX_MINENOISE_MIC0_TH_EXP -382 0x6000 //TX_MINENOISE_MIC0_S_TH_MTS -383 0xFFF3 //TX_MINENOISE_MIC0_S_TH_EXP +379 0x044C //TX_MINENOISE_TH +380 0xD508 //TX_MORENS_TFMASK_TH +381 0x0001 //TX_DRC_QUIET_FLOOR +382 0x3A98 //TX_RATIODTL_CUT_TH +383 0x0DAC //TX_DT_CUT_K1 384 0x0666 //TX_OUT_ENER_S_TH_CLEAN 385 0x0666 //TX_OUT_ENER_S_TH_LESSCLEAN 386 0x0333 //TX_OUT_ENER_S_TH_NOISY @@ -17939,22 +27099,22 @@ 388 0x0333 //TX_OUT_ENER_TH_SPEECH 389 0x2000 //TX_SN_NPB_GAIN 390 0x0000 //TX_NN_NPB_GAIN -391 0x0000 //TX_CSX_ALPHA_0 -392 0x0000 //TX_CSX_ALPHA_1 -393 0x0000 //TX_CSX_ALPHA_2 -394 0x0000 //TX_CSX_ALPHA_3 -395 0x0800 //TX_MU_ARSP_EST -396 0x00C8 //TX_P_OUTBEAM_MIN_TH +391 0x7FFF //TX_POST_MASK_SUP_HSNE +392 0x1388 //TX_TAIL_DET_TH +393 0x4000 //TX_B_LESSCUT_RTO_WTA +394 0x0000 //TX_MEL_G_R +395 0x0080 //TX_SUPHIGH_TH +396 0x0000 //TX_MASK_G_R 397 0x0002 //TX_EXTRA_NS_L -398 0x0800 //TX_EXTRA_NS_A -399 0x0005 //TX_VR_NOISE_FLOOR_TH +398 0x1800 //TX_C_POST_FLT_MASK +399 0x7FFF //TX_A_POST_FLT_WNS 400 0x0148 //TX_MIN_G_LOW300HZ 401 0x0002 //TX_MAXLEVEL_CNG 402 0x00B4 //TX_STN_NOISE_TH 403 0x4000 //TX_POST_MASK_SUP 404 0x7FFF //TX_POST_MASK_ADJUST 405 0x00C8 //TX_NS_ENOISE_MIC0_TH -406 0x0014 //TX_MINENOISE_MIC0_TH +406 0x02F3 //TX_MINENOISE_MIC0_TH 407 0x012C //TX_MINENOISE_MIC0_S_TH 408 0x2900 //TX_MIN_G_CTRL_SSNS 409 0x0800 //TX_METAL_RTO_THR @@ -18062,16 +27222,16 @@ 511 0x6666 //TX_MIC_TO_BFGAIN 512 0x0000 //TX_MICTOBFGAIN0 513 0x0000 //TX_FASTMUE_TH -514 0x0000 //TX_DERVB_LEN_0 -515 0x0000 //TX_DERVB_LEN_1 -516 0x0000 //TX_RHO_DERVB -517 0x0000 //TX_MIC_INDX_DERVB -518 0x0000 //TX_MU_DERVB -519 0x0000 //TX_DR_RESRV_0 -520 0x0000 //TX_DR_RESRV_1 -521 0x0000 //TX_DR_RESRV_2 -522 0x0000 //TX_DR_RESRV_3 -523 0x0000 //TX_DR_RESRV_4 +514 0xC000 //TX_DEREVERB_LF_MU +515 0xC000 //TX_DEREVERB_HF_MU +516 0xCCCC //TX_DEREVERB_DELAY +517 0xD999 //TX_DEREVERB_COEF_LEN +518 0x1F40 //TX_DEREVERB_DNR +519 0x0000 //TX_DEREVERB_ALPHA +520 0x0000 //TX_DEREVERB_BETA +521 0x0000 //TX_GSC_RTOL_TH +522 0x7000 //TX_GSC_RTOH_TH +523 0x0064 //TX_WIDE2_MEANHTH 524 0x0000 //TX_DR_RESRV_5 525 0x0000 //TX_DR_RESRV_6 526 0x0000 //TX_DR_RESRV_7 @@ -18437,16 +27597,81 @@ 886 0x0CCD //TX_FASTNS_TFMASKBIN_TH2 887 0x0CCD //TX_FASTNS_TFMASKBIN_TH3 888 0x0028 //TX_FASTNS_ARSPC_TH -889 0xC000 //TX_FASTNS_MASK5_TH +889 0x8000 //TX_FASTNS_MASK5_TH 890 0x4848 //TX_POSTSSA_MIN_G_VR_MASK -891 0x1000 //TX_A_LESSCUT_RTO_MASK +891 0x4000 //TX_A_LESSCUT_RTO_MASK 892 0x1770 //TX_FASTNS_NOISETH 893 0xC000 //TX_FASTNS_SSA_THLFL 894 0xC000 //TX_FASTNS_SSA_THHFL 895 0xCCCC //TX_FASTNS_SSA_THLFH 896 0xD999 //TX_FASTNS_SSA_THHFH +897 0x2339 //TX_SENDFUNC_REG_MICMUTE +898 0x0021 //TX_SENDFUNC_REG_MICMUTE1 +899 0x02BC //TX_MICMUTE_RATIO_THR +900 0x0140 //TX_MICMUTE_AMP_THR +901 0x0004 //TX_MICMUTE_HPF_IND +902 0x00C0 //TX_MICMUTE_LOG_EYR_TH +903 0x0008 //TX_MICMUTE_CVG_TIME +904 0x0008 //TX_MICMUTE_RELEASE_TIME +905 0x01FE //TX_MIC_VOLUME_MIC0MUTE +906 0x0020 //TX_MICMUTE_EPD_OFFSET_0 +907 0x001E //TX_MICMUTE_FRQ_AEC_L +908 0x7999 //TX_MICMUTE_EAD_THR +909 0x7FFF //TX_MICMUTE_LAMBDA_CB_NLE +910 0x7FFF //TX_MICMUTE_LAMBDA_RE_EST +911 0x4000 //TX_DTD_THR1_MICMUTE_0 +912 0x7000 //TX_DTD_THR1_MICMUTE_1 +913 0x7FFF //TX_DTD_THR1_MICMUTE_2 +914 0x7FFF //TX_DTD_THR1_MICMUTE_3 +915 0x6CCC //TX_DTD_THR2_MICMUTE_0 +916 0x0400 //TX_MICMUTE_MIN_EQ_RE_EST_0 +917 0x0400 //TX_MICMUTE_MIN_EQ_RE_EST_1 +918 0x1000 //TX_MICMUTE_MIN_EQ_RE_EST_2 +919 0x7FFF //TX_MICMUTE_MIN_EQ_RE_EST_3 +920 0x7FFF //TX_MICMUTE_MIN_EQ_RE_EST_4 +921 0x4000 //TX_MICMUTE_C_POST_FLT +922 0x03E8 //TX_MICMUTE_DT_CUT_K +923 0x0001 //TX_MICMUTE_DT_CUT_THR +924 0x03E8 //TX_MICMUTE_DT_CUT_K2 +925 0x0001 //TX_MICMUTE_DT_CUT_THR2 +926 0x0064 //TX_MICMUTE_DT2_HOLD_N +927 0x1000 //TX_MICMUTE_RATIODTH_THCUT +928 0x1000 //TX_MICMUTE_B_POST_FLT_ECHOL +929 0x7FFF //TX_MICMUTE_B_POST_FLT_ECHOH +930 0x0400 //TX_MICMUTE_C_POST_FLT_MASK +931 0x7999 //TX_MICMUTE_RATIODTL_CUT_TH +932 0x0258 //TX_MICMUTE_DT_CUT_K1 +933 0x0800 //TX_MICMUTE_N2_SN_EST +934 0xFC00 //TX_MICMUTE_THR_SN_EST_0 +935 0x001C //TX_MICMUTE_MIN_G_CTRL_0 +936 0x6000 //TX_MICMUTE_A_POST_FILT_S_0 +937 0x7000 //TX_MICMUTE_B_POST_FILT_0 +938 0x2710 //TX_MIC1RUB_AMP_THR +939 0x0010 //TX_MIC1MUTE_RATIO_THR +940 0x0450 //TX_MIC1MUTE_AMP_THR +941 0x0008 //TX_MIC1MUTE_CVG_TIME +942 0x0008 //TX_MIC1MUTE_RELEASE_TIME +943 0x0000 //TX_AMS_RESRV_01 +944 0x0000 //TX_AMS_RESRV_02 +945 0x0000 //TX_AMS_RESRV_03 +946 0x0000 //TX_AMS_RESRV_04 +947 0x0000 //TX_AMS_RESRV_05 +948 0x0000 //TX_AMS_RESRV_06 +949 0x0000 //TX_AMS_RESRV_07 +950 0x0000 //TX_AMS_RESRV_08 +951 0x0000 //TX_AMS_RESRV_09 +952 0x0000 //TX_AMS_RESRV_10 +953 0x0000 //TX_AMS_RESRV_11 +954 0x0000 //TX_AMS_RESRV_12 +955 0x0000 //TX_AMS_RESRV_13 +956 0x0000 //TX_AMS_RESRV_14 +957 0x0000 //TX_AMS_RESRV_15 +958 0x0000 //TX_AMS_RESRV_16 +959 0x0000 //TX_AMS_RESRV_17 +960 0x0000 //TX_AMS_RESRV_18 +961 0x0000 //TX_AMS_RESRV_19 #RX -0 0x002C //RX_RECVFUNC_MODE_0 +0 0x202C //RX_RECVFUNC_MODE_0 1 0x0000 //RX_RECVFUNC_MODE_1 2 0x0003 //RX_SAMPLINGFREQ_SIG 3 0x0003 //RX_SAMPLINGFREQ_PROC @@ -19296,11 +28521,862 @@ 110 0x0000 //RX_FDDRC_RESRV_0 129 0x0100 //RX_SPK_VOL 130 0x0000 //RX_VOL_RESRV_0 +#RX 2 +157 0x202C //RX_RECVFUNC_MODE_0 +158 0x0000 //RX_RECVFUNC_MODE_1 +159 0x0003 //RX_SAMPLINGFREQ_SIG +160 0x0003 //RX_SAMPLINGFREQ_PROC +161 0x000A //RX_FRAME_SZ +162 0x0000 //RX_DELAY_OPT +163 0x5000 //RX_TDDRC_ALPHA_UP_1 +164 0x5000 //RX_TDDRC_ALPHA_UP_2 +165 0x5000 //RX_TDDRC_ALPHA_UP_3 +166 0x2000 //RX_TDDRC_ALPHA_UP_4 +167 0x0800 //RX_PGA +168 0x7FFF //RX_A_HP +169 0x0000 //RX_B_PE +170 0x1800 //RX_THR_PITCH_DET_0 +171 0x1000 //RX_THR_PITCH_DET_1 +172 0x0800 //RX_THR_PITCH_DET_2 +173 0x0008 //RX_PITCH_BFR_LEN +174 0x0003 //RX_SBD_PITCH_DET +175 0x0100 //RX_PP_RESRV_0 +176 0x0020 //RX_PP_RESRV_1 +177 0x0400 //RX_N_SN_EST +178 0x000C //RX_N2_SN_EST +179 0x0003 //RX_NS_LVL_CTRL +180 0x9000 //RX_THR_SN_EST +181 0x7CCD //RX_LAMBDA_PFILT +182 0x000A //RX_FENS_RESRV_0 +183 0x0190 //RX_FENS_RESRV_1 +184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +187 0x0002 //RX_EXTRA_NS_L +188 0x0800 //RX_EXTRA_NS_A +189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +190 0x65AD //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +192 0x199A //RX_A_POST_FLT +193 0x0000 //RX_LMT_THRD +194 0x4000 //RX_LMT_ALPHA +195 0x0020 //RX_FDEQ_SUBNUM +196 0x4848 //RX_FDEQ_GAIN_0 +197 0x4848 //RX_FDEQ_GAIN_1 +198 0x4848 //RX_FDEQ_GAIN_2 +199 0x4848 //RX_FDEQ_GAIN_3 +200 0x4848 //RX_FDEQ_GAIN_4 +201 0x4848 //RX_FDEQ_GAIN_5 +202 0x4848 //RX_FDEQ_GAIN_6 +203 0x4848 //RX_FDEQ_GAIN_7 +204 0x4848 //RX_FDEQ_GAIN_8 +205 0x4848 //RX_FDEQ_GAIN_9 +206 0x4848 //RX_FDEQ_GAIN_10 +207 0x4848 //RX_FDEQ_GAIN_11 +208 0x4848 //RX_FDEQ_GAIN_12 +209 0x4848 //RX_FDEQ_GAIN_13 +210 0x4848 //RX_FDEQ_GAIN_14 +211 0x4848 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0202 //RX_FDEQ_BIN_0 +221 0x0203 //RX_FDEQ_BIN_1 +222 0x0303 //RX_FDEQ_BIN_2 +223 0x0304 //RX_FDEQ_BIN_3 +224 0x0405 //RX_FDEQ_BIN_4 +225 0x0506 //RX_FDEQ_BIN_5 +226 0x0708 //RX_FDEQ_BIN_6 +227 0x090A //RX_FDEQ_BIN_7 +228 0x0B0C //RX_FDEQ_BIN_8 +229 0x0D0E //RX_FDEQ_BIN_9 +230 0x1013 //RX_FDEQ_BIN_10 +231 0x1719 //RX_FDEQ_BIN_11 +232 0x1B1E //RX_FDEQ_BIN_12 +233 0x1E1E //RX_FDEQ_BIN_13 +234 0x1E28 //RX_FDEQ_BIN_14 +235 0x282C //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x4000 //RX_FDEQ_RESRV_0 +245 0x0320 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0030 //RX_FDDRC_BAND_MARGIN_1 +248 0x0050 //RX_FDDRC_BAND_MARGIN_2 +249 0x0080 //RX_FDDRC_BAND_MARGIN_3 +250 0x0007 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x5000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x6400 //RX_FDDRC_THRD_3_2 +258 0x6400 //RX_FDDRC_THRD_3_3 +259 0x2000 //RX_FDDRC_SLANT_0_0 +260 0x2000 //RX_FDDRC_SLANT_0_1 +261 0x2000 //RX_FDDRC_SLANT_0_2 +262 0x2000 //RX_FDDRC_SLANT_0_3 +263 0x5333 //RX_FDDRC_SLANT_1_0 +264 0x5333 //RX_FDDRC_SLANT_1_1 +265 0x5333 //RX_FDDRC_SLANT_1_2 +266 0x5333 //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +268 0x0002 //RX_FILTINDX +269 0x0000 //RX_TDDRC_THRD_0 +270 0x0000 //RX_TDDRC_THRD_1 +271 0x1A00 //RX_TDDRC_THRD_2 +272 0x1A00 //RX_TDDRC_THRD_3 +273 0x3000 //RX_TDDRC_SLANT_0 +274 0x7EB8 //RX_TDDRC_SLANT_1 +275 0x5000 //RX_TDDRC_ALPHA_UP_0 +276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x199A //RX_TDDRC_HMNC_GAIN +279 0x0001 //RX_TDDRC_SMT_FLAG +280 0x0CCD //RX_TDDRC_SMT_W +281 0x01C8 //RX_TDDRC_DRC_GAIN +282 0x7C00 //RX_LAMBDA_PKA_FP +283 0x2000 //RX_TPKA_FP +284 0x2000 //RX_MIN_G_FP +285 0x0080 //RX_MAX_G_FP +286 0x000B //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 +288 0x0000 //RX_MAXLEVEL_CNG +289 0x3000 //RX_BWE_UV_TH +290 0x3000 //RX_BWE_UV_TH2 +291 0x1800 //RX_BWE_UV_TH3 +292 0x1000 //RX_BWE_V_TH +293 0x04CD //RX_BWE_GAIN1_V_TH1 +294 0x0F33 //RX_BWE_GAIN1_V_TH2 +295 0x7333 //RX_BWE_UV_EQ +296 0x199A //RX_BWE_V_EQ +297 0x7333 //RX_BWE_TONE_TH +298 0x0004 //RX_BWE_UV_HOLD_T +299 0x6CCD //RX_BWE_GAIN2_ALPHA +300 0x799A //RX_BWE_GAIN3_ALPHA +301 0x001E //RX_BWE_CUTOFF +302 0x3000 //RX_BWE_GAINFILL +303 0x3200 //RX_BWE_MAXTH_TONE +304 0x2000 //RX_BWE_EQ_0 +305 0x2000 //RX_BWE_EQ_1 +306 0x2000 //RX_BWE_EQ_2 +307 0x2000 //RX_BWE_EQ_3 +308 0x2000 //RX_BWE_EQ_4 +309 0x2000 //RX_BWE_EQ_5 +310 0x2000 //RX_BWE_EQ_6 +311 0x0000 //RX_BWE_RESRV_0 +312 0x0000 //RX_BWE_RESRV_1 +313 0x0000 //RX_BWE_RESRV_2 +#VOL 0 +163 0x5000 //RX_TDDRC_ALPHA_UP_1 +164 0x5000 //RX_TDDRC_ALPHA_UP_2 +165 0x5000 //RX_TDDRC_ALPHA_UP_3 +166 0x2000 //RX_TDDRC_ALPHA_UP_4 +184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +190 0x65AD //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +269 0x0000 //RX_TDDRC_THRD_0 +270 0x0000 //RX_TDDRC_THRD_1 +271 0x1A00 //RX_TDDRC_THRD_2 +272 0x1A00 //RX_TDDRC_THRD_3 +273 0x3000 //RX_TDDRC_SLANT_0 +274 0x7EB8 //RX_TDDRC_SLANT_1 +275 0x5000 //RX_TDDRC_ALPHA_UP_0 +276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x199A //RX_TDDRC_HMNC_GAIN +279 0x0001 //RX_TDDRC_SMT_FLAG +280 0x0CCD //RX_TDDRC_SMT_W +281 0x01C8 //RX_TDDRC_DRC_GAIN +195 0x0020 //RX_FDEQ_SUBNUM +196 0x4848 //RX_FDEQ_GAIN_0 +197 0x4848 //RX_FDEQ_GAIN_1 +198 0x4848 //RX_FDEQ_GAIN_2 +199 0x4848 //RX_FDEQ_GAIN_3 +200 0x4848 //RX_FDEQ_GAIN_4 +201 0x4848 //RX_FDEQ_GAIN_5 +202 0x4848 //RX_FDEQ_GAIN_6 +203 0x4848 //RX_FDEQ_GAIN_7 +204 0x4848 //RX_FDEQ_GAIN_8 +205 0x4848 //RX_FDEQ_GAIN_9 +206 0x4848 //RX_FDEQ_GAIN_10 +207 0x4848 //RX_FDEQ_GAIN_11 +208 0x4848 //RX_FDEQ_GAIN_12 +209 0x4848 //RX_FDEQ_GAIN_13 +210 0x4848 //RX_FDEQ_GAIN_14 +211 0x4848 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0202 //RX_FDEQ_BIN_0 +221 0x0203 //RX_FDEQ_BIN_1 +222 0x0303 //RX_FDEQ_BIN_2 +223 0x0304 //RX_FDEQ_BIN_3 +224 0x0405 //RX_FDEQ_BIN_4 +225 0x0506 //RX_FDEQ_BIN_5 +226 0x0708 //RX_FDEQ_BIN_6 +227 0x090A //RX_FDEQ_BIN_7 +228 0x0B0C //RX_FDEQ_BIN_8 +229 0x0D0E //RX_FDEQ_BIN_9 +230 0x1013 //RX_FDEQ_BIN_10 +231 0x1719 //RX_FDEQ_BIN_11 +232 0x1B1E //RX_FDEQ_BIN_12 +233 0x1E1E //RX_FDEQ_BIN_13 +234 0x1E28 //RX_FDEQ_BIN_14 +235 0x282C //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x4000 //RX_FDEQ_RESRV_0 +245 0x0320 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0030 //RX_FDDRC_BAND_MARGIN_1 +248 0x0050 //RX_FDDRC_BAND_MARGIN_2 +249 0x0080 //RX_FDDRC_BAND_MARGIN_3 +250 0x0007 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x5000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x6400 //RX_FDDRC_THRD_3_2 +258 0x6400 //RX_FDDRC_THRD_3_3 +259 0x2000 //RX_FDDRC_SLANT_0_0 +260 0x2000 //RX_FDDRC_SLANT_0_1 +261 0x2000 //RX_FDDRC_SLANT_0_2 +262 0x2000 //RX_FDDRC_SLANT_0_3 +263 0x5333 //RX_FDDRC_SLANT_1_0 +264 0x5333 //RX_FDDRC_SLANT_1_1 +265 0x5333 //RX_FDDRC_SLANT_1_2 +266 0x5333 //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +286 0x000B //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 +#VOL 1 +163 0x5000 //RX_TDDRC_ALPHA_UP_1 +164 0x5000 //RX_TDDRC_ALPHA_UP_2 +165 0x5000 //RX_TDDRC_ALPHA_UP_3 +166 0x2000 //RX_TDDRC_ALPHA_UP_4 +184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +190 0x65AD //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +269 0x0000 //RX_TDDRC_THRD_0 +270 0x0000 //RX_TDDRC_THRD_1 +271 0x1A00 //RX_TDDRC_THRD_2 +272 0x1A00 //RX_TDDRC_THRD_3 +273 0x3000 //RX_TDDRC_SLANT_0 +274 0x7EB8 //RX_TDDRC_SLANT_1 +275 0x5000 //RX_TDDRC_ALPHA_UP_0 +276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x199A //RX_TDDRC_HMNC_GAIN +279 0x0001 //RX_TDDRC_SMT_FLAG +280 0x0CCD //RX_TDDRC_SMT_W +281 0x01C8 //RX_TDDRC_DRC_GAIN +195 0x0020 //RX_FDEQ_SUBNUM +196 0x4848 //RX_FDEQ_GAIN_0 +197 0x4848 //RX_FDEQ_GAIN_1 +198 0x4848 //RX_FDEQ_GAIN_2 +199 0x4848 //RX_FDEQ_GAIN_3 +200 0x4848 //RX_FDEQ_GAIN_4 +201 0x4848 //RX_FDEQ_GAIN_5 +202 0x4848 //RX_FDEQ_GAIN_6 +203 0x4848 //RX_FDEQ_GAIN_7 +204 0x4848 //RX_FDEQ_GAIN_8 +205 0x4848 //RX_FDEQ_GAIN_9 +206 0x4848 //RX_FDEQ_GAIN_10 +207 0x4848 //RX_FDEQ_GAIN_11 +208 0x4848 //RX_FDEQ_GAIN_12 +209 0x4848 //RX_FDEQ_GAIN_13 +210 0x4848 //RX_FDEQ_GAIN_14 +211 0x4848 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0202 //RX_FDEQ_BIN_0 +221 0x0203 //RX_FDEQ_BIN_1 +222 0x0303 //RX_FDEQ_BIN_2 +223 0x0304 //RX_FDEQ_BIN_3 +224 0x0405 //RX_FDEQ_BIN_4 +225 0x0506 //RX_FDEQ_BIN_5 +226 0x0708 //RX_FDEQ_BIN_6 +227 0x090A //RX_FDEQ_BIN_7 +228 0x0B0C //RX_FDEQ_BIN_8 +229 0x0D0E //RX_FDEQ_BIN_9 +230 0x1013 //RX_FDEQ_BIN_10 +231 0x1719 //RX_FDEQ_BIN_11 +232 0x1B1E //RX_FDEQ_BIN_12 +233 0x1E1E //RX_FDEQ_BIN_13 +234 0x1E28 //RX_FDEQ_BIN_14 +235 0x282C //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x4000 //RX_FDEQ_RESRV_0 +245 0x0320 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0030 //RX_FDDRC_BAND_MARGIN_1 +248 0x0050 //RX_FDDRC_BAND_MARGIN_2 +249 0x0080 //RX_FDDRC_BAND_MARGIN_3 +250 0x0007 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x5000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x6400 //RX_FDDRC_THRD_3_2 +258 0x6400 //RX_FDDRC_THRD_3_3 +259 0x2000 //RX_FDDRC_SLANT_0_0 +260 0x2000 //RX_FDDRC_SLANT_0_1 +261 0x2000 //RX_FDDRC_SLANT_0_2 +262 0x2000 //RX_FDDRC_SLANT_0_3 +263 0x5333 //RX_FDDRC_SLANT_1_0 +264 0x5333 //RX_FDDRC_SLANT_1_1 +265 0x5333 //RX_FDDRC_SLANT_1_2 +266 0x5333 //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +286 0x0013 //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 +#VOL 2 +163 0x5000 //RX_TDDRC_ALPHA_UP_1 +164 0x5000 //RX_TDDRC_ALPHA_UP_2 +165 0x5000 //RX_TDDRC_ALPHA_UP_3 +166 0x2000 //RX_TDDRC_ALPHA_UP_4 +184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +190 0x65AD //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +269 0x0000 //RX_TDDRC_THRD_0 +270 0x0000 //RX_TDDRC_THRD_1 +271 0x1A00 //RX_TDDRC_THRD_2 +272 0x1A00 //RX_TDDRC_THRD_3 +273 0x3000 //RX_TDDRC_SLANT_0 +274 0x7EB8 //RX_TDDRC_SLANT_1 +275 0x5000 //RX_TDDRC_ALPHA_UP_0 +276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x199A //RX_TDDRC_HMNC_GAIN +279 0x0001 //RX_TDDRC_SMT_FLAG +280 0x0CCD //RX_TDDRC_SMT_W +281 0x01C8 //RX_TDDRC_DRC_GAIN +195 0x0020 //RX_FDEQ_SUBNUM +196 0x4848 //RX_FDEQ_GAIN_0 +197 0x4848 //RX_FDEQ_GAIN_1 +198 0x4848 //RX_FDEQ_GAIN_2 +199 0x4848 //RX_FDEQ_GAIN_3 +200 0x4848 //RX_FDEQ_GAIN_4 +201 0x4848 //RX_FDEQ_GAIN_5 +202 0x4848 //RX_FDEQ_GAIN_6 +203 0x4848 //RX_FDEQ_GAIN_7 +204 0x4848 //RX_FDEQ_GAIN_8 +205 0x4848 //RX_FDEQ_GAIN_9 +206 0x4848 //RX_FDEQ_GAIN_10 +207 0x4848 //RX_FDEQ_GAIN_11 +208 0x4848 //RX_FDEQ_GAIN_12 +209 0x4848 //RX_FDEQ_GAIN_13 +210 0x4848 //RX_FDEQ_GAIN_14 +211 0x4848 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0202 //RX_FDEQ_BIN_0 +221 0x0203 //RX_FDEQ_BIN_1 +222 0x0303 //RX_FDEQ_BIN_2 +223 0x0304 //RX_FDEQ_BIN_3 +224 0x0405 //RX_FDEQ_BIN_4 +225 0x0506 //RX_FDEQ_BIN_5 +226 0x0708 //RX_FDEQ_BIN_6 +227 0x090A //RX_FDEQ_BIN_7 +228 0x0B0C //RX_FDEQ_BIN_8 +229 0x0D0E //RX_FDEQ_BIN_9 +230 0x1013 //RX_FDEQ_BIN_10 +231 0x1719 //RX_FDEQ_BIN_11 +232 0x1B1E //RX_FDEQ_BIN_12 +233 0x1E1E //RX_FDEQ_BIN_13 +234 0x1E28 //RX_FDEQ_BIN_14 +235 0x282C //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x4000 //RX_FDEQ_RESRV_0 +245 0x0320 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0030 //RX_FDDRC_BAND_MARGIN_1 +248 0x0050 //RX_FDDRC_BAND_MARGIN_2 +249 0x0080 //RX_FDDRC_BAND_MARGIN_3 +250 0x0007 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x5000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x6400 //RX_FDDRC_THRD_3_2 +258 0x6400 //RX_FDDRC_THRD_3_3 +259 0x2000 //RX_FDDRC_SLANT_0_0 +260 0x2000 //RX_FDDRC_SLANT_0_1 +261 0x2000 //RX_FDDRC_SLANT_0_2 +262 0x2000 //RX_FDDRC_SLANT_0_3 +263 0x5333 //RX_FDDRC_SLANT_1_0 +264 0x5333 //RX_FDDRC_SLANT_1_1 +265 0x5333 //RX_FDDRC_SLANT_1_2 +266 0x5333 //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +286 0x0020 //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 +#VOL 3 +163 0x5000 //RX_TDDRC_ALPHA_UP_1 +164 0x5000 //RX_TDDRC_ALPHA_UP_2 +165 0x5000 //RX_TDDRC_ALPHA_UP_3 +166 0x2000 //RX_TDDRC_ALPHA_UP_4 +184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +190 0x65AD //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +269 0x0000 //RX_TDDRC_THRD_0 +270 0x0000 //RX_TDDRC_THRD_1 +271 0x1A00 //RX_TDDRC_THRD_2 +272 0x1A00 //RX_TDDRC_THRD_3 +273 0x3000 //RX_TDDRC_SLANT_0 +274 0x7EB8 //RX_TDDRC_SLANT_1 +275 0x5000 //RX_TDDRC_ALPHA_UP_0 +276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x199A //RX_TDDRC_HMNC_GAIN +279 0x0001 //RX_TDDRC_SMT_FLAG +280 0x0CCD //RX_TDDRC_SMT_W +281 0x01C8 //RX_TDDRC_DRC_GAIN +195 0x0020 //RX_FDEQ_SUBNUM +196 0x4848 //RX_FDEQ_GAIN_0 +197 0x4848 //RX_FDEQ_GAIN_1 +198 0x4848 //RX_FDEQ_GAIN_2 +199 0x4848 //RX_FDEQ_GAIN_3 +200 0x4848 //RX_FDEQ_GAIN_4 +201 0x4848 //RX_FDEQ_GAIN_5 +202 0x4848 //RX_FDEQ_GAIN_6 +203 0x4848 //RX_FDEQ_GAIN_7 +204 0x4848 //RX_FDEQ_GAIN_8 +205 0x4848 //RX_FDEQ_GAIN_9 +206 0x4848 //RX_FDEQ_GAIN_10 +207 0x4848 //RX_FDEQ_GAIN_11 +208 0x4848 //RX_FDEQ_GAIN_12 +209 0x4848 //RX_FDEQ_GAIN_13 +210 0x4848 //RX_FDEQ_GAIN_14 +211 0x4848 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0202 //RX_FDEQ_BIN_0 +221 0x0203 //RX_FDEQ_BIN_1 +222 0x0303 //RX_FDEQ_BIN_2 +223 0x0304 //RX_FDEQ_BIN_3 +224 0x0405 //RX_FDEQ_BIN_4 +225 0x0506 //RX_FDEQ_BIN_5 +226 0x0708 //RX_FDEQ_BIN_6 +227 0x090A //RX_FDEQ_BIN_7 +228 0x0B0C //RX_FDEQ_BIN_8 +229 0x0D0E //RX_FDEQ_BIN_9 +230 0x1013 //RX_FDEQ_BIN_10 +231 0x1719 //RX_FDEQ_BIN_11 +232 0x1B1E //RX_FDEQ_BIN_12 +233 0x1E1E //RX_FDEQ_BIN_13 +234 0x1E28 //RX_FDEQ_BIN_14 +235 0x282C //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x4000 //RX_FDEQ_RESRV_0 +245 0x0320 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0030 //RX_FDDRC_BAND_MARGIN_1 +248 0x0050 //RX_FDDRC_BAND_MARGIN_2 +249 0x0080 //RX_FDDRC_BAND_MARGIN_3 +250 0x0007 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x5000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x6400 //RX_FDDRC_THRD_3_2 +258 0x6400 //RX_FDDRC_THRD_3_3 +259 0x2000 //RX_FDDRC_SLANT_0_0 +260 0x2000 //RX_FDDRC_SLANT_0_1 +261 0x2000 //RX_FDDRC_SLANT_0_2 +262 0x2000 //RX_FDDRC_SLANT_0_3 +263 0x5333 //RX_FDDRC_SLANT_1_0 +264 0x5333 //RX_FDDRC_SLANT_1_1 +265 0x5333 //RX_FDDRC_SLANT_1_2 +266 0x5333 //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +286 0x0036 //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 +#VOL 4 +163 0x5000 //RX_TDDRC_ALPHA_UP_1 +164 0x5000 //RX_TDDRC_ALPHA_UP_2 +165 0x5000 //RX_TDDRC_ALPHA_UP_3 +166 0x2000 //RX_TDDRC_ALPHA_UP_4 +184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +190 0x65AD //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +269 0x0000 //RX_TDDRC_THRD_0 +270 0x0000 //RX_TDDRC_THRD_1 +271 0x1A00 //RX_TDDRC_THRD_2 +272 0x1A00 //RX_TDDRC_THRD_3 +273 0x3000 //RX_TDDRC_SLANT_0 +274 0x7EB8 //RX_TDDRC_SLANT_1 +275 0x5000 //RX_TDDRC_ALPHA_UP_0 +276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x199A //RX_TDDRC_HMNC_GAIN +279 0x0001 //RX_TDDRC_SMT_FLAG +280 0x0CCD //RX_TDDRC_SMT_W +281 0x01C8 //RX_TDDRC_DRC_GAIN +195 0x0020 //RX_FDEQ_SUBNUM +196 0x4848 //RX_FDEQ_GAIN_0 +197 0x4848 //RX_FDEQ_GAIN_1 +198 0x4848 //RX_FDEQ_GAIN_2 +199 0x4848 //RX_FDEQ_GAIN_3 +200 0x4848 //RX_FDEQ_GAIN_4 +201 0x4848 //RX_FDEQ_GAIN_5 +202 0x4848 //RX_FDEQ_GAIN_6 +203 0x4848 //RX_FDEQ_GAIN_7 +204 0x4848 //RX_FDEQ_GAIN_8 +205 0x4848 //RX_FDEQ_GAIN_9 +206 0x4848 //RX_FDEQ_GAIN_10 +207 0x4848 //RX_FDEQ_GAIN_11 +208 0x4848 //RX_FDEQ_GAIN_12 +209 0x4848 //RX_FDEQ_GAIN_13 +210 0x4848 //RX_FDEQ_GAIN_14 +211 0x4848 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0202 //RX_FDEQ_BIN_0 +221 0x0203 //RX_FDEQ_BIN_1 +222 0x0303 //RX_FDEQ_BIN_2 +223 0x0304 //RX_FDEQ_BIN_3 +224 0x0405 //RX_FDEQ_BIN_4 +225 0x0506 //RX_FDEQ_BIN_5 +226 0x0708 //RX_FDEQ_BIN_6 +227 0x090A //RX_FDEQ_BIN_7 +228 0x0B0C //RX_FDEQ_BIN_8 +229 0x0D0E //RX_FDEQ_BIN_9 +230 0x1013 //RX_FDEQ_BIN_10 +231 0x1719 //RX_FDEQ_BIN_11 +232 0x1B1E //RX_FDEQ_BIN_12 +233 0x1E1E //RX_FDEQ_BIN_13 +234 0x1E28 //RX_FDEQ_BIN_14 +235 0x282C //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x4000 //RX_FDEQ_RESRV_0 +245 0x0320 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0030 //RX_FDDRC_BAND_MARGIN_1 +248 0x0050 //RX_FDDRC_BAND_MARGIN_2 +249 0x0080 //RX_FDDRC_BAND_MARGIN_3 +250 0x0007 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x5000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x6400 //RX_FDDRC_THRD_3_2 +258 0x6400 //RX_FDDRC_THRD_3_3 +259 0x2000 //RX_FDDRC_SLANT_0_0 +260 0x2000 //RX_FDDRC_SLANT_0_1 +261 0x2000 //RX_FDDRC_SLANT_0_2 +262 0x2000 //RX_FDDRC_SLANT_0_3 +263 0x5333 //RX_FDDRC_SLANT_1_0 +264 0x5333 //RX_FDDRC_SLANT_1_1 +265 0x5333 //RX_FDDRC_SLANT_1_2 +266 0x5333 //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +286 0x005B //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 +#VOL 5 +163 0x5000 //RX_TDDRC_ALPHA_UP_1 +164 0x5000 //RX_TDDRC_ALPHA_UP_2 +165 0x5000 //RX_TDDRC_ALPHA_UP_3 +166 0x2000 //RX_TDDRC_ALPHA_UP_4 +184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +190 0x65AD //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +269 0x0000 //RX_TDDRC_THRD_0 +270 0x0000 //RX_TDDRC_THRD_1 +271 0x1A00 //RX_TDDRC_THRD_2 +272 0x1A00 //RX_TDDRC_THRD_3 +273 0x3000 //RX_TDDRC_SLANT_0 +274 0x7EB8 //RX_TDDRC_SLANT_1 +275 0x5000 //RX_TDDRC_ALPHA_UP_0 +276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x199A //RX_TDDRC_HMNC_GAIN +279 0x0001 //RX_TDDRC_SMT_FLAG +280 0x0CCD //RX_TDDRC_SMT_W +281 0x01C8 //RX_TDDRC_DRC_GAIN +195 0x0020 //RX_FDEQ_SUBNUM +196 0x4848 //RX_FDEQ_GAIN_0 +197 0x4848 //RX_FDEQ_GAIN_1 +198 0x4848 //RX_FDEQ_GAIN_2 +199 0x4848 //RX_FDEQ_GAIN_3 +200 0x4848 //RX_FDEQ_GAIN_4 +201 0x4848 //RX_FDEQ_GAIN_5 +202 0x4848 //RX_FDEQ_GAIN_6 +203 0x4848 //RX_FDEQ_GAIN_7 +204 0x4848 //RX_FDEQ_GAIN_8 +205 0x4848 //RX_FDEQ_GAIN_9 +206 0x4848 //RX_FDEQ_GAIN_10 +207 0x4848 //RX_FDEQ_GAIN_11 +208 0x4848 //RX_FDEQ_GAIN_12 +209 0x4848 //RX_FDEQ_GAIN_13 +210 0x4848 //RX_FDEQ_GAIN_14 +211 0x4848 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0202 //RX_FDEQ_BIN_0 +221 0x0203 //RX_FDEQ_BIN_1 +222 0x0303 //RX_FDEQ_BIN_2 +223 0x0304 //RX_FDEQ_BIN_3 +224 0x0405 //RX_FDEQ_BIN_4 +225 0x0506 //RX_FDEQ_BIN_5 +226 0x0708 //RX_FDEQ_BIN_6 +227 0x090A //RX_FDEQ_BIN_7 +228 0x0B0C //RX_FDEQ_BIN_8 +229 0x0D0E //RX_FDEQ_BIN_9 +230 0x1013 //RX_FDEQ_BIN_10 +231 0x1719 //RX_FDEQ_BIN_11 +232 0x1B1E //RX_FDEQ_BIN_12 +233 0x1E1E //RX_FDEQ_BIN_13 +234 0x1E28 //RX_FDEQ_BIN_14 +235 0x282C //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x4000 //RX_FDEQ_RESRV_0 +245 0x0320 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0030 //RX_FDDRC_BAND_MARGIN_1 +248 0x0050 //RX_FDDRC_BAND_MARGIN_2 +249 0x0080 //RX_FDDRC_BAND_MARGIN_3 +250 0x0007 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x5000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x6400 //RX_FDDRC_THRD_3_2 +258 0x6400 //RX_FDDRC_THRD_3_3 +259 0x2000 //RX_FDDRC_SLANT_0_0 +260 0x2000 //RX_FDDRC_SLANT_0_1 +261 0x2000 //RX_FDDRC_SLANT_0_2 +262 0x2000 //RX_FDDRC_SLANT_0_3 +263 0x5333 //RX_FDDRC_SLANT_1_0 +264 0x5333 //RX_FDDRC_SLANT_1_1 +265 0x5333 //RX_FDDRC_SLANT_1_2 +266 0x5333 //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +286 0x0099 //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 +#VOL 6 +163 0x5000 //RX_TDDRC_ALPHA_UP_1 +164 0x5000 //RX_TDDRC_ALPHA_UP_2 +165 0x5000 //RX_TDDRC_ALPHA_UP_3 +166 0x2000 //RX_TDDRC_ALPHA_UP_4 +184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +190 0x65AD //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +269 0x0000 //RX_TDDRC_THRD_0 +270 0x0000 //RX_TDDRC_THRD_1 +271 0x1A00 //RX_TDDRC_THRD_2 +272 0x1A00 //RX_TDDRC_THRD_3 +273 0x3000 //RX_TDDRC_SLANT_0 +274 0x7EB8 //RX_TDDRC_SLANT_1 +275 0x5000 //RX_TDDRC_ALPHA_UP_0 +276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x199A //RX_TDDRC_HMNC_GAIN +279 0x0001 //RX_TDDRC_SMT_FLAG +280 0x0CCD //RX_TDDRC_SMT_W +281 0x01C8 //RX_TDDRC_DRC_GAIN +195 0x0020 //RX_FDEQ_SUBNUM +196 0x4848 //RX_FDEQ_GAIN_0 +197 0x4848 //RX_FDEQ_GAIN_1 +198 0x4848 //RX_FDEQ_GAIN_2 +199 0x4848 //RX_FDEQ_GAIN_3 +200 0x4848 //RX_FDEQ_GAIN_4 +201 0x4848 //RX_FDEQ_GAIN_5 +202 0x4848 //RX_FDEQ_GAIN_6 +203 0x4848 //RX_FDEQ_GAIN_7 +204 0x4848 //RX_FDEQ_GAIN_8 +205 0x4848 //RX_FDEQ_GAIN_9 +206 0x4848 //RX_FDEQ_GAIN_10 +207 0x4848 //RX_FDEQ_GAIN_11 +208 0x4848 //RX_FDEQ_GAIN_12 +209 0x4848 //RX_FDEQ_GAIN_13 +210 0x4848 //RX_FDEQ_GAIN_14 +211 0x4848 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0202 //RX_FDEQ_BIN_0 +221 0x0203 //RX_FDEQ_BIN_1 +222 0x0303 //RX_FDEQ_BIN_2 +223 0x0304 //RX_FDEQ_BIN_3 +224 0x0405 //RX_FDEQ_BIN_4 +225 0x0506 //RX_FDEQ_BIN_5 +226 0x0708 //RX_FDEQ_BIN_6 +227 0x090A //RX_FDEQ_BIN_7 +228 0x0B0C //RX_FDEQ_BIN_8 +229 0x0D0E //RX_FDEQ_BIN_9 +230 0x1013 //RX_FDEQ_BIN_10 +231 0x1719 //RX_FDEQ_BIN_11 +232 0x1B1E //RX_FDEQ_BIN_12 +233 0x1E1E //RX_FDEQ_BIN_13 +234 0x1E28 //RX_FDEQ_BIN_14 +235 0x282C //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x4000 //RX_FDEQ_RESRV_0 +245 0x0320 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0030 //RX_FDDRC_BAND_MARGIN_1 +248 0x0050 //RX_FDDRC_BAND_MARGIN_2 +249 0x0080 //RX_FDDRC_BAND_MARGIN_3 +250 0x0007 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x5000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x6400 //RX_FDDRC_THRD_3_2 +258 0x6400 //RX_FDDRC_THRD_3_3 +259 0x2000 //RX_FDDRC_SLANT_0_0 +260 0x2000 //RX_FDDRC_SLANT_0_1 +261 0x2000 //RX_FDDRC_SLANT_0_2 +262 0x2000 //RX_FDDRC_SLANT_0_3 +263 0x5333 //RX_FDDRC_SLANT_1_0 +264 0x5333 //RX_FDDRC_SLANT_1_1 +265 0x5333 //RX_FDDRC_SLANT_1_2 +266 0x5333 //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +286 0x0100 //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 #CASE_NAME HEADSET-RESERVE1-VOICE_GENERIC-FB -#PARAM_MODE FULL -#PARAM_TYPE TX+RX -#TOTAL_CUSTOM_STEP 7 +#PARAM_MODE Full +#PARAM_TYPE TX+2RX +#TOTAL_CUSTOM_STEP 7+7 #TX 0 0x0009 //TX_OPERATION_MODE_0 1 0x0009 //TX_OPERATION_MODE_1 @@ -19553,10 +29629,10 @@ 248 0xF600 //TX_THR_SN_EST_6 249 0xF600 //TX_THR_SN_EST_7 250 0x0200 //TX_DELTA_THR_SN_EST_0 -251 0x0200 //TX_DELTA_THR_SN_EST_1 -252 0x0400 //TX_DELTA_THR_SN_EST_2 -253 0x0300 //TX_DELTA_THR_SN_EST_3 -254 0x0600 //TX_DELTA_THR_SN_EST_4 +251 0x0400 //TX_DELTA_THR_SN_EST_1 +252 0x0300 //TX_DELTA_THR_SN_EST_2 +253 0x0600 //TX_DELTA_THR_SN_EST_3 +254 0x0200 //TX_DELTA_THR_SN_EST_4 255 0x0200 //TX_DELTA_THR_SN_EST_5 256 0x0200 //TX_DELTA_THR_SN_EST_6 257 0x0200 //TX_DELTA_THR_SN_EST_7 @@ -19584,31 +29660,31 @@ 279 0x2000 //TX_B_POST_FLT_0 280 0x2000 //TX_B_POST_FLT_1 281 0x0012 //TX_NS_LVL_CTRL_0 -282 0x0019 //TX_NS_LVL_CTRL_1 +282 0x0016 //TX_NS_LVL_CTRL_1 283 0x0016 //TX_NS_LVL_CTRL_2 -284 0x0016 //TX_NS_LVL_CTRL_3 -285 0x0019 //TX_NS_LVL_CTRL_4 +284 0x0019 //TX_NS_LVL_CTRL_3 +285 0x0010 //TX_NS_LVL_CTRL_4 286 0x0010 //TX_NS_LVL_CTRL_5 -287 0x0010 //TX_NS_LVL_CTRL_6 +287 0x0019 //TX_NS_LVL_CTRL_6 288 0x0010 //TX_NS_LVL_CTRL_7 289 0x000C //TX_MIN_GAIN_S_0 -290 0x0011 //TX_MIN_GAIN_S_1 +290 0x000C //TX_MIN_GAIN_S_1 291 0x000C //TX_MIN_GAIN_S_2 -292 0x000C //TX_MIN_GAIN_S_3 -293 0x000F //TX_MIN_GAIN_S_4 +292 0x000F //TX_MIN_GAIN_S_3 +293 0x000C //TX_MIN_GAIN_S_4 294 0x000C //TX_MIN_GAIN_S_5 -295 0x000C //TX_MIN_GAIN_S_6 +295 0x0011 //TX_MIN_GAIN_S_6 296 0x000C //TX_MIN_GAIN_S_7 297 0x7FFF //TX_NMOS_SUP 298 0x0000 //TX_NS_MAX_PRI_SNR_TH 299 0x0000 //TX_NMOS_SUP_MENSA 300 0x7000 //TX_SNRI_SUP_0 -301 0x6000 //TX_SNRI_SUP_1 +301 0x7000 //TX_SNRI_SUP_1 302 0x7000 //TX_SNRI_SUP_2 -303 0x7000 //TX_SNRI_SUP_3 -304 0x6000 //TX_SNRI_SUP_4 +303 0x6000 //TX_SNRI_SUP_3 +304 0x7FFF //TX_SNRI_SUP_4 305 0x7FFF //TX_SNRI_SUP_5 -306 0x7FFF //TX_SNRI_SUP_6 +306 0x6000 //TX_SNRI_SUP_6 307 0x7FFF //TX_SNRI_SUP_7 308 0x7FFF //TX_THR_LFNS 309 0x0016 //TX_G_LFNS @@ -19625,8 +29701,8 @@ 320 0x6000 //TX_A_POST_FILT_S_6 321 0x6000 //TX_A_POST_FILT_S_7 322 0x2000 //TX_B_POST_FILT_0 -323 0x2000 //TX_B_POST_FILT_1 -324 0x4000 //TX_B_POST_FILT_2 +323 0x4000 //TX_B_POST_FILT_1 +324 0x2000 //TX_B_POST_FILT_2 325 0x2000 //TX_B_POST_FILT_3 326 0x2000 //TX_B_POST_FILT_4 327 0x2000 //TX_B_POST_FILT_5 @@ -19669,7 +29745,7 @@ 364 0x0000 //TX_K_APT 365 0x0001 //TX_NOISEDET 366 0x0190 //TX_NDETCT -367 0x0020 //TX_NOISE_TH_0 +367 0x04E8 //TX_NOISE_TH_0 368 0x7FFF //TX_NOISE_TH_0_2 369 0x7FFF //TX_NOISE_TH_0_3 370 0x02A6 //TX_NOISE_TH_1 @@ -19681,11 +29757,11 @@ 376 0x0001 //TX_NOISE_TH_5_3 377 0x0000 //TX_NOISE_TH_5_4 378 0x02BC //TX_NOISE_TH_6 -379 0x0020 //TX_MINENOISE_TH -380 0x4000 //TX_MINENOISE_MIC0_TH_MTS -381 0xFFEE //TX_MINENOISE_MIC0_TH_EXP -382 0x6000 //TX_MINENOISE_MIC0_S_TH_MTS -383 0xFFF3 //TX_MINENOISE_MIC0_S_TH_EXP +379 0x02BC //TX_MINENOISE_TH +380 0xD508 //TX_MORENS_TFMASK_TH +381 0x0001 //TX_DRC_QUIET_FLOOR +382 0x3A98 //TX_RATIODTL_CUT_TH +383 0x1482 //TX_DT_CUT_K1 384 0x0666 //TX_OUT_ENER_S_TH_CLEAN 385 0x0666 //TX_OUT_ENER_S_TH_LESSCLEAN 386 0x0333 //TX_OUT_ENER_S_TH_NOISY @@ -19693,22 +29769,22 @@ 388 0x0333 //TX_OUT_ENER_TH_SPEECH 389 0x2000 //TX_SN_NPB_GAIN 390 0x0000 //TX_NN_NPB_GAIN -391 0x0000 //TX_CSX_ALPHA_0 -392 0x0000 //TX_CSX_ALPHA_1 -393 0x0000 //TX_CSX_ALPHA_2 -394 0x0000 //TX_CSX_ALPHA_3 -395 0x0800 //TX_MU_ARSP_EST -396 0x00C8 //TX_P_OUTBEAM_MIN_TH +391 0x7FFF //TX_POST_MASK_SUP_HSNE +392 0x1388 //TX_TAIL_DET_TH +393 0x4000 //TX_B_LESSCUT_RTO_WTA +394 0x0000 //TX_MEL_G_R +395 0x0080 //TX_SUPHIGH_TH +396 0x0000 //TX_MASK_G_R 397 0x0002 //TX_EXTRA_NS_L -398 0x0800 //TX_EXTRA_NS_A -399 0x0005 //TX_VR_NOISE_FLOOR_TH +398 0x1800 //TX_C_POST_FLT_MASK +399 0x7FFF //TX_A_POST_FLT_WNS 400 0x0148 //TX_MIN_G_LOW300HZ 401 0x0004 //TX_MAXLEVEL_CNG 402 0x00B4 //TX_STN_NOISE_TH 403 0x4000 //TX_POST_MASK_SUP 404 0x7FFF //TX_POST_MASK_ADJUST 405 0x00C8 //TX_NS_ENOISE_MIC0_TH -406 0x0020 //TX_MINENOISE_MIC0_TH +406 0x04E7 //TX_MINENOISE_MIC0_TH 407 0x012C //TX_MINENOISE_MIC0_S_TH 408 0x2900 //TX_MIN_G_CTRL_SSNS 409 0x0800 //TX_METAL_RTO_THR @@ -19816,16 +29892,16 @@ 511 0x6666 //TX_MIC_TO_BFGAIN 512 0x0000 //TX_MICTOBFGAIN0 513 0x0000 //TX_FASTMUE_TH -514 0x0000 //TX_DERVB_LEN_0 -515 0x0000 //TX_DERVB_LEN_1 -516 0x0000 //TX_RHO_DERVB -517 0x0000 //TX_MIC_INDX_DERVB -518 0x0000 //TX_MU_DERVB -519 0x0000 //TX_DR_RESRV_0 -520 0x0000 //TX_DR_RESRV_1 -521 0x0000 //TX_DR_RESRV_2 -522 0x0000 //TX_DR_RESRV_3 -523 0x0000 //TX_DR_RESRV_4 +514 0xC000 //TX_DEREVERB_LF_MU +515 0xC000 //TX_DEREVERB_HF_MU +516 0xCCCC //TX_DEREVERB_DELAY +517 0xD999 //TX_DEREVERB_COEF_LEN +518 0x1F40 //TX_DEREVERB_DNR +519 0x0000 //TX_DEREVERB_ALPHA +520 0x0000 //TX_DEREVERB_BETA +521 0x0000 //TX_GSC_RTOL_TH +522 0x7000 //TX_GSC_RTOH_TH +523 0x0064 //TX_WIDE2_MEANHTH 524 0x0000 //TX_DR_RESRV_5 525 0x0000 //TX_DR_RESRV_6 526 0x0000 //TX_DR_RESRV_7 @@ -20199,8 +30275,73 @@ 894 0xC000 //TX_FASTNS_SSA_THHFL 895 0xCCCC //TX_FASTNS_SSA_THLFH 896 0xD999 //TX_FASTNS_SSA_THHFH +897 0x2339 //TX_SENDFUNC_REG_MICMUTE +898 0x0021 //TX_SENDFUNC_REG_MICMUTE1 +899 0x02BC //TX_MICMUTE_RATIO_THR +900 0x0140 //TX_MICMUTE_AMP_THR +901 0x0004 //TX_MICMUTE_HPF_IND +902 0x00C0 //TX_MICMUTE_LOG_EYR_TH +903 0x0008 //TX_MICMUTE_CVG_TIME +904 0x0008 //TX_MICMUTE_RELEASE_TIME +905 0x01FE //TX_MIC_VOLUME_MIC0MUTE +906 0x0020 //TX_MICMUTE_EPD_OFFSET_0 +907 0x001E //TX_MICMUTE_FRQ_AEC_L +908 0x7999 //TX_MICMUTE_EAD_THR +909 0x7FFF //TX_MICMUTE_LAMBDA_CB_NLE +910 0x7FFF //TX_MICMUTE_LAMBDA_RE_EST +911 0x4000 //TX_DTD_THR1_MICMUTE_0 +912 0x7000 //TX_DTD_THR1_MICMUTE_1 +913 0x7FFF //TX_DTD_THR1_MICMUTE_2 +914 0x7FFF //TX_DTD_THR1_MICMUTE_3 +915 0x6CCC //TX_DTD_THR2_MICMUTE_0 +916 0x0400 //TX_MICMUTE_MIN_EQ_RE_EST_0 +917 0x0400 //TX_MICMUTE_MIN_EQ_RE_EST_1 +918 0x1000 //TX_MICMUTE_MIN_EQ_RE_EST_2 +919 0x7FFF //TX_MICMUTE_MIN_EQ_RE_EST_3 +920 0x7FFF //TX_MICMUTE_MIN_EQ_RE_EST_4 +921 0x4000 //TX_MICMUTE_C_POST_FLT +922 0x03E8 //TX_MICMUTE_DT_CUT_K +923 0x0001 //TX_MICMUTE_DT_CUT_THR +924 0x03E8 //TX_MICMUTE_DT_CUT_K2 +925 0x0001 //TX_MICMUTE_DT_CUT_THR2 +926 0x0064 //TX_MICMUTE_DT2_HOLD_N +927 0x1000 //TX_MICMUTE_RATIODTH_THCUT +928 0x1000 //TX_MICMUTE_B_POST_FLT_ECHOL +929 0x7FFF //TX_MICMUTE_B_POST_FLT_ECHOH +930 0x0400 //TX_MICMUTE_C_POST_FLT_MASK +931 0x7999 //TX_MICMUTE_RATIODTL_CUT_TH +932 0x0258 //TX_MICMUTE_DT_CUT_K1 +933 0x0800 //TX_MICMUTE_N2_SN_EST +934 0xFC00 //TX_MICMUTE_THR_SN_EST_0 +935 0x001C //TX_MICMUTE_MIN_G_CTRL_0 +936 0x6000 //TX_MICMUTE_A_POST_FILT_S_0 +937 0x7000 //TX_MICMUTE_B_POST_FILT_0 +938 0x2710 //TX_MIC1RUB_AMP_THR +939 0x0010 //TX_MIC1MUTE_RATIO_THR +940 0x0450 //TX_MIC1MUTE_AMP_THR +941 0x0008 //TX_MIC1MUTE_CVG_TIME +942 0x0008 //TX_MIC1MUTE_RELEASE_TIME +943 0x0000 //TX_AMS_RESRV_01 +944 0x0000 //TX_AMS_RESRV_02 +945 0x0000 //TX_AMS_RESRV_03 +946 0x0000 //TX_AMS_RESRV_04 +947 0x0000 //TX_AMS_RESRV_05 +948 0x0000 //TX_AMS_RESRV_06 +949 0x0000 //TX_AMS_RESRV_07 +950 0x0000 //TX_AMS_RESRV_08 +951 0x0000 //TX_AMS_RESRV_09 +952 0x0000 //TX_AMS_RESRV_10 +953 0x0000 //TX_AMS_RESRV_11 +954 0x0000 //TX_AMS_RESRV_12 +955 0x0000 //TX_AMS_RESRV_13 +956 0x0000 //TX_AMS_RESRV_14 +957 0x0000 //TX_AMS_RESRV_15 +958 0x0000 //TX_AMS_RESRV_16 +959 0x0000 //TX_AMS_RESRV_17 +960 0x0000 //TX_AMS_RESRV_18 +961 0x0000 //TX_AMS_RESRV_19 #RX -0 0x002C //RX_RECVFUNC_MODE_0 +0 0x202C //RX_RECVFUNC_MODE_0 1 0x0000 //RX_RECVFUNC_MODE_1 2 0x0004 //RX_SAMPLINGFREQ_SIG 3 0x0004 //RX_SAMPLINGFREQ_PROC @@ -21050,18 +31191,869 @@ 110 0x0000 //RX_FDDRC_RESRV_0 129 0x0100 //RX_SPK_VOL 130 0x0000 //RX_VOL_RESRV_0 +#RX 2 +157 0x202C //RX_RECVFUNC_MODE_0 +158 0x0000 //RX_RECVFUNC_MODE_1 +159 0x0004 //RX_SAMPLINGFREQ_SIG +160 0x0004 //RX_SAMPLINGFREQ_PROC +161 0x000A //RX_FRAME_SZ +162 0x0000 //RX_DELAY_OPT +163 0x1000 //RX_TDDRC_ALPHA_UP_1 +164 0x1000 //RX_TDDRC_ALPHA_UP_2 +165 0x1000 //RX_TDDRC_ALPHA_UP_3 +166 0x1000 //RX_TDDRC_ALPHA_UP_4 +167 0x0800 //RX_PGA +168 0x7B02 //RX_A_HP +169 0x4000 //RX_B_PE +170 0x7800 //RX_THR_PITCH_DET_0 +171 0x7000 //RX_THR_PITCH_DET_1 +172 0x6000 //RX_THR_PITCH_DET_2 +173 0x0008 //RX_PITCH_BFR_LEN +174 0x0003 //RX_SBD_PITCH_DET +175 0x0100 //RX_PP_RESRV_0 +176 0x0020 //RX_PP_RESRV_1 +177 0x0500 //RX_N_SN_EST +178 0x000C //RX_N2_SN_EST +179 0x000A //RX_NS_LVL_CTRL +180 0xF600 //RX_THR_SN_EST +181 0x7000 //RX_LAMBDA_PFILT +182 0x000A //RX_FENS_RESRV_0 +183 0x0190 //RX_FENS_RESRV_1 +184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +187 0x0002 //RX_EXTRA_NS_L +188 0x0800 //RX_EXTRA_NS_A +189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +190 0x7FFF //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +192 0x199A //RX_A_POST_FLT +193 0x0000 //RX_LMT_THRD +194 0x4000 //RX_LMT_ALPHA +195 0x0020 //RX_FDEQ_SUBNUM +196 0x4848 //RX_FDEQ_GAIN_0 +197 0x4848 //RX_FDEQ_GAIN_1 +198 0x4848 //RX_FDEQ_GAIN_2 +199 0x4848 //RX_FDEQ_GAIN_3 +200 0x4848 //RX_FDEQ_GAIN_4 +201 0x4848 //RX_FDEQ_GAIN_5 +202 0x4848 //RX_FDEQ_GAIN_6 +203 0x4848 //RX_FDEQ_GAIN_7 +204 0x4848 //RX_FDEQ_GAIN_8 +205 0x4848 //RX_FDEQ_GAIN_9 +206 0x4848 //RX_FDEQ_GAIN_10 +207 0x4848 //RX_FDEQ_GAIN_11 +208 0x4848 //RX_FDEQ_GAIN_12 +209 0x4848 //RX_FDEQ_GAIN_13 +210 0x4848 //RX_FDEQ_GAIN_14 +211 0x4848 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0202 //RX_FDEQ_BIN_0 +221 0x0203 //RX_FDEQ_BIN_1 +222 0x0304 //RX_FDEQ_BIN_2 +223 0x0405 //RX_FDEQ_BIN_3 +224 0x0607 //RX_FDEQ_BIN_4 +225 0x0809 //RX_FDEQ_BIN_5 +226 0x0A0B //RX_FDEQ_BIN_6 +227 0x0C0D //RX_FDEQ_BIN_7 +228 0x0E0F //RX_FDEQ_BIN_8 +229 0x1011 //RX_FDEQ_BIN_9 +230 0x1214 //RX_FDEQ_BIN_10 +231 0x1618 //RX_FDEQ_BIN_11 +232 0x1C1C //RX_FDEQ_BIN_12 +233 0x2020 //RX_FDEQ_BIN_13 +234 0x2020 //RX_FDEQ_BIN_14 +235 0x2011 //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x4000 //RX_FDEQ_RESRV_0 +245 0x0320 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0030 //RX_FDDRC_BAND_MARGIN_1 +248 0x0050 //RX_FDDRC_BAND_MARGIN_2 +249 0x0080 //RX_FDDRC_BAND_MARGIN_3 +250 0x0007 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x5000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x6400 //RX_FDDRC_THRD_3_2 +258 0x6400 //RX_FDDRC_THRD_3_3 +259 0x2000 //RX_FDDRC_SLANT_0_0 +260 0x2000 //RX_FDDRC_SLANT_0_1 +261 0x2000 //RX_FDDRC_SLANT_0_2 +262 0x2000 //RX_FDDRC_SLANT_0_3 +263 0x5333 //RX_FDDRC_SLANT_1_0 +264 0x5333 //RX_FDDRC_SLANT_1_1 +265 0x5333 //RX_FDDRC_SLANT_1_2 +266 0x5333 //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +268 0x0002 //RX_FILTINDX +269 0x0000 //RX_TDDRC_THRD_0 +270 0x0000 //RX_TDDRC_THRD_1 +271 0x1200 //RX_TDDRC_THRD_2 +272 0x1900 //RX_TDDRC_THRD_3 +273 0x3000 //RX_TDDRC_SLANT_0 +274 0x6E00 //RX_TDDRC_SLANT_1 +275 0x1000 //RX_TDDRC_ALPHA_UP_0 +276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x199A //RX_TDDRC_HMNC_GAIN +279 0x0001 //RX_TDDRC_SMT_FLAG +280 0x0CCD //RX_TDDRC_SMT_W +281 0x0240 //RX_TDDRC_DRC_GAIN +282 0x7C00 //RX_LAMBDA_PKA_FP +283 0x2000 //RX_TPKA_FP +284 0x2000 //RX_MIN_G_FP +285 0x0080 //RX_MAX_G_FP +286 0x000B //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 +288 0x0000 //RX_MAXLEVEL_CNG +289 0x3000 //RX_BWE_UV_TH +290 0x3000 //RX_BWE_UV_TH2 +291 0x1800 //RX_BWE_UV_TH3 +292 0x1000 //RX_BWE_V_TH +293 0x04CD //RX_BWE_GAIN1_V_TH1 +294 0x0F33 //RX_BWE_GAIN1_V_TH2 +295 0x7333 //RX_BWE_UV_EQ +296 0x199A //RX_BWE_V_EQ +297 0x7333 //RX_BWE_TONE_TH +298 0x0004 //RX_BWE_UV_HOLD_T +299 0x6CCD //RX_BWE_GAIN2_ALPHA +300 0x799A //RX_BWE_GAIN3_ALPHA +301 0x001E //RX_BWE_CUTOFF +302 0x3000 //RX_BWE_GAINFILL +303 0x3200 //RX_BWE_MAXTH_TONE +304 0x2000 //RX_BWE_EQ_0 +305 0x2000 //RX_BWE_EQ_1 +306 0x2000 //RX_BWE_EQ_2 +307 0x2000 //RX_BWE_EQ_3 +308 0x2000 //RX_BWE_EQ_4 +309 0x2000 //RX_BWE_EQ_5 +310 0x2000 //RX_BWE_EQ_6 +311 0x0000 //RX_BWE_RESRV_0 +312 0x0000 //RX_BWE_RESRV_1 +313 0x0000 //RX_BWE_RESRV_2 +#VOL 0 +163 0x1000 //RX_TDDRC_ALPHA_UP_1 +164 0x1000 //RX_TDDRC_ALPHA_UP_2 +165 0x1000 //RX_TDDRC_ALPHA_UP_3 +166 0x1000 //RX_TDDRC_ALPHA_UP_4 +184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +190 0x7FFF //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +269 0x0000 //RX_TDDRC_THRD_0 +270 0x0000 //RX_TDDRC_THRD_1 +271 0x1200 //RX_TDDRC_THRD_2 +272 0x1900 //RX_TDDRC_THRD_3 +273 0x3000 //RX_TDDRC_SLANT_0 +274 0x6E00 //RX_TDDRC_SLANT_1 +275 0x1000 //RX_TDDRC_ALPHA_UP_0 +276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x199A //RX_TDDRC_HMNC_GAIN +279 0x0001 //RX_TDDRC_SMT_FLAG +280 0x0CCD //RX_TDDRC_SMT_W +281 0x0240 //RX_TDDRC_DRC_GAIN +195 0x0020 //RX_FDEQ_SUBNUM +196 0x4848 //RX_FDEQ_GAIN_0 +197 0x4848 //RX_FDEQ_GAIN_1 +198 0x4848 //RX_FDEQ_GAIN_2 +199 0x4848 //RX_FDEQ_GAIN_3 +200 0x4848 //RX_FDEQ_GAIN_4 +201 0x4848 //RX_FDEQ_GAIN_5 +202 0x4848 //RX_FDEQ_GAIN_6 +203 0x4848 //RX_FDEQ_GAIN_7 +204 0x4848 //RX_FDEQ_GAIN_8 +205 0x4848 //RX_FDEQ_GAIN_9 +206 0x4848 //RX_FDEQ_GAIN_10 +207 0x4848 //RX_FDEQ_GAIN_11 +208 0x4848 //RX_FDEQ_GAIN_12 +209 0x4848 //RX_FDEQ_GAIN_13 +210 0x4848 //RX_FDEQ_GAIN_14 +211 0x4848 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0202 //RX_FDEQ_BIN_0 +221 0x0203 //RX_FDEQ_BIN_1 +222 0x0304 //RX_FDEQ_BIN_2 +223 0x0405 //RX_FDEQ_BIN_3 +224 0x0607 //RX_FDEQ_BIN_4 +225 0x0809 //RX_FDEQ_BIN_5 +226 0x0A0B //RX_FDEQ_BIN_6 +227 0x0C0D //RX_FDEQ_BIN_7 +228 0x0E0F //RX_FDEQ_BIN_8 +229 0x1011 //RX_FDEQ_BIN_9 +230 0x1214 //RX_FDEQ_BIN_10 +231 0x1618 //RX_FDEQ_BIN_11 +232 0x1C1C //RX_FDEQ_BIN_12 +233 0x2020 //RX_FDEQ_BIN_13 +234 0x2020 //RX_FDEQ_BIN_14 +235 0x2011 //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x4000 //RX_FDEQ_RESRV_0 +245 0x0320 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0030 //RX_FDDRC_BAND_MARGIN_1 +248 0x0050 //RX_FDDRC_BAND_MARGIN_2 +249 0x0080 //RX_FDDRC_BAND_MARGIN_3 +250 0x0007 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x5000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x6400 //RX_FDDRC_THRD_3_2 +258 0x6400 //RX_FDDRC_THRD_3_3 +259 0x2000 //RX_FDDRC_SLANT_0_0 +260 0x2000 //RX_FDDRC_SLANT_0_1 +261 0x2000 //RX_FDDRC_SLANT_0_2 +262 0x2000 //RX_FDDRC_SLANT_0_3 +263 0x5333 //RX_FDDRC_SLANT_1_0 +264 0x5333 //RX_FDDRC_SLANT_1_1 +265 0x5333 //RX_FDDRC_SLANT_1_2 +266 0x5333 //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +286 0x000B //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 +#VOL 1 +163 0x1000 //RX_TDDRC_ALPHA_UP_1 +164 0x1000 //RX_TDDRC_ALPHA_UP_2 +165 0x1000 //RX_TDDRC_ALPHA_UP_3 +166 0x1000 //RX_TDDRC_ALPHA_UP_4 +184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +190 0x7FFF //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +269 0x0000 //RX_TDDRC_THRD_0 +270 0x0000 //RX_TDDRC_THRD_1 +271 0x1200 //RX_TDDRC_THRD_2 +272 0x1900 //RX_TDDRC_THRD_3 +273 0x3000 //RX_TDDRC_SLANT_0 +274 0x6E00 //RX_TDDRC_SLANT_1 +275 0x1000 //RX_TDDRC_ALPHA_UP_0 +276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x199A //RX_TDDRC_HMNC_GAIN +279 0x0001 //RX_TDDRC_SMT_FLAG +280 0x0CCD //RX_TDDRC_SMT_W +281 0x0240 //RX_TDDRC_DRC_GAIN +195 0x0020 //RX_FDEQ_SUBNUM +196 0x4848 //RX_FDEQ_GAIN_0 +197 0x4848 //RX_FDEQ_GAIN_1 +198 0x4848 //RX_FDEQ_GAIN_2 +199 0x4848 //RX_FDEQ_GAIN_3 +200 0x4848 //RX_FDEQ_GAIN_4 +201 0x4848 //RX_FDEQ_GAIN_5 +202 0x4848 //RX_FDEQ_GAIN_6 +203 0x4848 //RX_FDEQ_GAIN_7 +204 0x4848 //RX_FDEQ_GAIN_8 +205 0x4848 //RX_FDEQ_GAIN_9 +206 0x4848 //RX_FDEQ_GAIN_10 +207 0x4848 //RX_FDEQ_GAIN_11 +208 0x4848 //RX_FDEQ_GAIN_12 +209 0x4848 //RX_FDEQ_GAIN_13 +210 0x4848 //RX_FDEQ_GAIN_14 +211 0x4848 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0202 //RX_FDEQ_BIN_0 +221 0x0203 //RX_FDEQ_BIN_1 +222 0x0304 //RX_FDEQ_BIN_2 +223 0x0405 //RX_FDEQ_BIN_3 +224 0x0607 //RX_FDEQ_BIN_4 +225 0x0809 //RX_FDEQ_BIN_5 +226 0x0A0B //RX_FDEQ_BIN_6 +227 0x0C0D //RX_FDEQ_BIN_7 +228 0x0E0F //RX_FDEQ_BIN_8 +229 0x1011 //RX_FDEQ_BIN_9 +230 0x1214 //RX_FDEQ_BIN_10 +231 0x1618 //RX_FDEQ_BIN_11 +232 0x1C1C //RX_FDEQ_BIN_12 +233 0x2020 //RX_FDEQ_BIN_13 +234 0x2020 //RX_FDEQ_BIN_14 +235 0x2011 //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x4000 //RX_FDEQ_RESRV_0 +245 0x0320 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0030 //RX_FDDRC_BAND_MARGIN_1 +248 0x0050 //RX_FDDRC_BAND_MARGIN_2 +249 0x0080 //RX_FDDRC_BAND_MARGIN_3 +250 0x0007 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x5000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x6400 //RX_FDDRC_THRD_3_2 +258 0x6400 //RX_FDDRC_THRD_3_3 +259 0x2000 //RX_FDDRC_SLANT_0_0 +260 0x2000 //RX_FDDRC_SLANT_0_1 +261 0x2000 //RX_FDDRC_SLANT_0_2 +262 0x2000 //RX_FDDRC_SLANT_0_3 +263 0x5333 //RX_FDDRC_SLANT_1_0 +264 0x5333 //RX_FDDRC_SLANT_1_1 +265 0x5333 //RX_FDDRC_SLANT_1_2 +266 0x5333 //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +286 0x0013 //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 +#VOL 2 +163 0x1000 //RX_TDDRC_ALPHA_UP_1 +164 0x1000 //RX_TDDRC_ALPHA_UP_2 +165 0x1000 //RX_TDDRC_ALPHA_UP_3 +166 0x1000 //RX_TDDRC_ALPHA_UP_4 +184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +190 0x7FFF //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +269 0x0000 //RX_TDDRC_THRD_0 +270 0x0000 //RX_TDDRC_THRD_1 +271 0x1200 //RX_TDDRC_THRD_2 +272 0x1900 //RX_TDDRC_THRD_3 +273 0x3000 //RX_TDDRC_SLANT_0 +274 0x6E00 //RX_TDDRC_SLANT_1 +275 0x1000 //RX_TDDRC_ALPHA_UP_0 +276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x199A //RX_TDDRC_HMNC_GAIN +279 0x0001 //RX_TDDRC_SMT_FLAG +280 0x0CCD //RX_TDDRC_SMT_W +281 0x0240 //RX_TDDRC_DRC_GAIN +195 0x0020 //RX_FDEQ_SUBNUM +196 0x4848 //RX_FDEQ_GAIN_0 +197 0x4848 //RX_FDEQ_GAIN_1 +198 0x4848 //RX_FDEQ_GAIN_2 +199 0x4848 //RX_FDEQ_GAIN_3 +200 0x4848 //RX_FDEQ_GAIN_4 +201 0x4848 //RX_FDEQ_GAIN_5 +202 0x4848 //RX_FDEQ_GAIN_6 +203 0x4848 //RX_FDEQ_GAIN_7 +204 0x4848 //RX_FDEQ_GAIN_8 +205 0x4848 //RX_FDEQ_GAIN_9 +206 0x4848 //RX_FDEQ_GAIN_10 +207 0x4848 //RX_FDEQ_GAIN_11 +208 0x4848 //RX_FDEQ_GAIN_12 +209 0x4848 //RX_FDEQ_GAIN_13 +210 0x4848 //RX_FDEQ_GAIN_14 +211 0x4848 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0202 //RX_FDEQ_BIN_0 +221 0x0203 //RX_FDEQ_BIN_1 +222 0x0304 //RX_FDEQ_BIN_2 +223 0x0405 //RX_FDEQ_BIN_3 +224 0x0607 //RX_FDEQ_BIN_4 +225 0x0809 //RX_FDEQ_BIN_5 +226 0x0A0B //RX_FDEQ_BIN_6 +227 0x0C0D //RX_FDEQ_BIN_7 +228 0x0E0F //RX_FDEQ_BIN_8 +229 0x1011 //RX_FDEQ_BIN_9 +230 0x1214 //RX_FDEQ_BIN_10 +231 0x1618 //RX_FDEQ_BIN_11 +232 0x1C1C //RX_FDEQ_BIN_12 +233 0x2020 //RX_FDEQ_BIN_13 +234 0x2020 //RX_FDEQ_BIN_14 +235 0x2011 //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x4000 //RX_FDEQ_RESRV_0 +245 0x0320 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0030 //RX_FDDRC_BAND_MARGIN_1 +248 0x0050 //RX_FDDRC_BAND_MARGIN_2 +249 0x0080 //RX_FDDRC_BAND_MARGIN_3 +250 0x0007 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x5000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x6400 //RX_FDDRC_THRD_3_2 +258 0x6400 //RX_FDDRC_THRD_3_3 +259 0x2000 //RX_FDDRC_SLANT_0_0 +260 0x2000 //RX_FDDRC_SLANT_0_1 +261 0x2000 //RX_FDDRC_SLANT_0_2 +262 0x2000 //RX_FDDRC_SLANT_0_3 +263 0x5333 //RX_FDDRC_SLANT_1_0 +264 0x5333 //RX_FDDRC_SLANT_1_1 +265 0x5333 //RX_FDDRC_SLANT_1_2 +266 0x5333 //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +286 0x0020 //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 +#VOL 3 +163 0x1000 //RX_TDDRC_ALPHA_UP_1 +164 0x1000 //RX_TDDRC_ALPHA_UP_2 +165 0x1000 //RX_TDDRC_ALPHA_UP_3 +166 0x1000 //RX_TDDRC_ALPHA_UP_4 +184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +190 0x7FFF //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +269 0x0000 //RX_TDDRC_THRD_0 +270 0x0000 //RX_TDDRC_THRD_1 +271 0x1200 //RX_TDDRC_THRD_2 +272 0x1900 //RX_TDDRC_THRD_3 +273 0x3000 //RX_TDDRC_SLANT_0 +274 0x6E00 //RX_TDDRC_SLANT_1 +275 0x1000 //RX_TDDRC_ALPHA_UP_0 +276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x199A //RX_TDDRC_HMNC_GAIN +279 0x0001 //RX_TDDRC_SMT_FLAG +280 0x0CCD //RX_TDDRC_SMT_W +281 0x0240 //RX_TDDRC_DRC_GAIN +195 0x0020 //RX_FDEQ_SUBNUM +196 0x4848 //RX_FDEQ_GAIN_0 +197 0x4848 //RX_FDEQ_GAIN_1 +198 0x4848 //RX_FDEQ_GAIN_2 +199 0x4848 //RX_FDEQ_GAIN_3 +200 0x4848 //RX_FDEQ_GAIN_4 +201 0x4848 //RX_FDEQ_GAIN_5 +202 0x4848 //RX_FDEQ_GAIN_6 +203 0x4848 //RX_FDEQ_GAIN_7 +204 0x4848 //RX_FDEQ_GAIN_8 +205 0x4848 //RX_FDEQ_GAIN_9 +206 0x4848 //RX_FDEQ_GAIN_10 +207 0x4848 //RX_FDEQ_GAIN_11 +208 0x4848 //RX_FDEQ_GAIN_12 +209 0x4848 //RX_FDEQ_GAIN_13 +210 0x4848 //RX_FDEQ_GAIN_14 +211 0x4848 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0202 //RX_FDEQ_BIN_0 +221 0x0203 //RX_FDEQ_BIN_1 +222 0x0304 //RX_FDEQ_BIN_2 +223 0x0405 //RX_FDEQ_BIN_3 +224 0x0607 //RX_FDEQ_BIN_4 +225 0x0809 //RX_FDEQ_BIN_5 +226 0x0A0B //RX_FDEQ_BIN_6 +227 0x0C0D //RX_FDEQ_BIN_7 +228 0x0E0F //RX_FDEQ_BIN_8 +229 0x1011 //RX_FDEQ_BIN_9 +230 0x1214 //RX_FDEQ_BIN_10 +231 0x1618 //RX_FDEQ_BIN_11 +232 0x1C1C //RX_FDEQ_BIN_12 +233 0x2020 //RX_FDEQ_BIN_13 +234 0x2020 //RX_FDEQ_BIN_14 +235 0x2011 //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x4000 //RX_FDEQ_RESRV_0 +245 0x0320 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0030 //RX_FDDRC_BAND_MARGIN_1 +248 0x0050 //RX_FDDRC_BAND_MARGIN_2 +249 0x0080 //RX_FDDRC_BAND_MARGIN_3 +250 0x0007 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x5000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x6400 //RX_FDDRC_THRD_3_2 +258 0x6400 //RX_FDDRC_THRD_3_3 +259 0x2000 //RX_FDDRC_SLANT_0_0 +260 0x2000 //RX_FDDRC_SLANT_0_1 +261 0x2000 //RX_FDDRC_SLANT_0_2 +262 0x2000 //RX_FDDRC_SLANT_0_3 +263 0x5333 //RX_FDDRC_SLANT_1_0 +264 0x5333 //RX_FDDRC_SLANT_1_1 +265 0x5333 //RX_FDDRC_SLANT_1_2 +266 0x5333 //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +286 0x0036 //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 +#VOL 4 +163 0x1000 //RX_TDDRC_ALPHA_UP_1 +164 0x1000 //RX_TDDRC_ALPHA_UP_2 +165 0x1000 //RX_TDDRC_ALPHA_UP_3 +166 0x1000 //RX_TDDRC_ALPHA_UP_4 +184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +190 0x7FFF //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +269 0x0000 //RX_TDDRC_THRD_0 +270 0x0000 //RX_TDDRC_THRD_1 +271 0x1200 //RX_TDDRC_THRD_2 +272 0x1900 //RX_TDDRC_THRD_3 +273 0x3000 //RX_TDDRC_SLANT_0 +274 0x6E00 //RX_TDDRC_SLANT_1 +275 0x1000 //RX_TDDRC_ALPHA_UP_0 +276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x199A //RX_TDDRC_HMNC_GAIN +279 0x0001 //RX_TDDRC_SMT_FLAG +280 0x0CCD //RX_TDDRC_SMT_W +281 0x0240 //RX_TDDRC_DRC_GAIN +195 0x0020 //RX_FDEQ_SUBNUM +196 0x4848 //RX_FDEQ_GAIN_0 +197 0x4848 //RX_FDEQ_GAIN_1 +198 0x4848 //RX_FDEQ_GAIN_2 +199 0x4848 //RX_FDEQ_GAIN_3 +200 0x4848 //RX_FDEQ_GAIN_4 +201 0x4848 //RX_FDEQ_GAIN_5 +202 0x4848 //RX_FDEQ_GAIN_6 +203 0x4848 //RX_FDEQ_GAIN_7 +204 0x4848 //RX_FDEQ_GAIN_8 +205 0x4848 //RX_FDEQ_GAIN_9 +206 0x4848 //RX_FDEQ_GAIN_10 +207 0x4848 //RX_FDEQ_GAIN_11 +208 0x4848 //RX_FDEQ_GAIN_12 +209 0x4848 //RX_FDEQ_GAIN_13 +210 0x4848 //RX_FDEQ_GAIN_14 +211 0x4848 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0202 //RX_FDEQ_BIN_0 +221 0x0203 //RX_FDEQ_BIN_1 +222 0x0304 //RX_FDEQ_BIN_2 +223 0x0405 //RX_FDEQ_BIN_3 +224 0x0607 //RX_FDEQ_BIN_4 +225 0x0809 //RX_FDEQ_BIN_5 +226 0x0A0B //RX_FDEQ_BIN_6 +227 0x0C0D //RX_FDEQ_BIN_7 +228 0x0E0F //RX_FDEQ_BIN_8 +229 0x1011 //RX_FDEQ_BIN_9 +230 0x1214 //RX_FDEQ_BIN_10 +231 0x1618 //RX_FDEQ_BIN_11 +232 0x1C1C //RX_FDEQ_BIN_12 +233 0x2020 //RX_FDEQ_BIN_13 +234 0x2020 //RX_FDEQ_BIN_14 +235 0x2011 //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x4000 //RX_FDEQ_RESRV_0 +245 0x0320 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0030 //RX_FDDRC_BAND_MARGIN_1 +248 0x0050 //RX_FDDRC_BAND_MARGIN_2 +249 0x0080 //RX_FDDRC_BAND_MARGIN_3 +250 0x0007 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x5000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x6400 //RX_FDDRC_THRD_3_2 +258 0x6400 //RX_FDDRC_THRD_3_3 +259 0x2000 //RX_FDDRC_SLANT_0_0 +260 0x2000 //RX_FDDRC_SLANT_0_1 +261 0x2000 //RX_FDDRC_SLANT_0_2 +262 0x2000 //RX_FDDRC_SLANT_0_3 +263 0x5333 //RX_FDDRC_SLANT_1_0 +264 0x5333 //RX_FDDRC_SLANT_1_1 +265 0x5333 //RX_FDDRC_SLANT_1_2 +266 0x5333 //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +286 0x005B //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 +#VOL 5 +163 0x1000 //RX_TDDRC_ALPHA_UP_1 +164 0x1000 //RX_TDDRC_ALPHA_UP_2 +165 0x1000 //RX_TDDRC_ALPHA_UP_3 +166 0x1000 //RX_TDDRC_ALPHA_UP_4 +184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +190 0x7FFF //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +269 0x0000 //RX_TDDRC_THRD_0 +270 0x0000 //RX_TDDRC_THRD_1 +271 0x1200 //RX_TDDRC_THRD_2 +272 0x1900 //RX_TDDRC_THRD_3 +273 0x3000 //RX_TDDRC_SLANT_0 +274 0x6E00 //RX_TDDRC_SLANT_1 +275 0x1000 //RX_TDDRC_ALPHA_UP_0 +276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x199A //RX_TDDRC_HMNC_GAIN +279 0x0001 //RX_TDDRC_SMT_FLAG +280 0x0CCD //RX_TDDRC_SMT_W +281 0x0240 //RX_TDDRC_DRC_GAIN +195 0x0020 //RX_FDEQ_SUBNUM +196 0x4848 //RX_FDEQ_GAIN_0 +197 0x4848 //RX_FDEQ_GAIN_1 +198 0x4848 //RX_FDEQ_GAIN_2 +199 0x4848 //RX_FDEQ_GAIN_3 +200 0x4848 //RX_FDEQ_GAIN_4 +201 0x4848 //RX_FDEQ_GAIN_5 +202 0x4848 //RX_FDEQ_GAIN_6 +203 0x4848 //RX_FDEQ_GAIN_7 +204 0x4848 //RX_FDEQ_GAIN_8 +205 0x4848 //RX_FDEQ_GAIN_9 +206 0x4848 //RX_FDEQ_GAIN_10 +207 0x4848 //RX_FDEQ_GAIN_11 +208 0x4848 //RX_FDEQ_GAIN_12 +209 0x4848 //RX_FDEQ_GAIN_13 +210 0x4848 //RX_FDEQ_GAIN_14 +211 0x4848 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0202 //RX_FDEQ_BIN_0 +221 0x0203 //RX_FDEQ_BIN_1 +222 0x0304 //RX_FDEQ_BIN_2 +223 0x0405 //RX_FDEQ_BIN_3 +224 0x0607 //RX_FDEQ_BIN_4 +225 0x0809 //RX_FDEQ_BIN_5 +226 0x0A0B //RX_FDEQ_BIN_6 +227 0x0C0D //RX_FDEQ_BIN_7 +228 0x0E0F //RX_FDEQ_BIN_8 +229 0x1011 //RX_FDEQ_BIN_9 +230 0x1214 //RX_FDEQ_BIN_10 +231 0x1618 //RX_FDEQ_BIN_11 +232 0x1C1C //RX_FDEQ_BIN_12 +233 0x2020 //RX_FDEQ_BIN_13 +234 0x2020 //RX_FDEQ_BIN_14 +235 0x2011 //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x4000 //RX_FDEQ_RESRV_0 +245 0x0320 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0030 //RX_FDDRC_BAND_MARGIN_1 +248 0x0050 //RX_FDDRC_BAND_MARGIN_2 +249 0x0080 //RX_FDDRC_BAND_MARGIN_3 +250 0x0007 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x5000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x6400 //RX_FDDRC_THRD_3_2 +258 0x6400 //RX_FDDRC_THRD_3_3 +259 0x2000 //RX_FDDRC_SLANT_0_0 +260 0x2000 //RX_FDDRC_SLANT_0_1 +261 0x2000 //RX_FDDRC_SLANT_0_2 +262 0x2000 //RX_FDDRC_SLANT_0_3 +263 0x5333 //RX_FDDRC_SLANT_1_0 +264 0x5333 //RX_FDDRC_SLANT_1_1 +265 0x5333 //RX_FDDRC_SLANT_1_2 +266 0x5333 //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +286 0x0099 //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 +#VOL 6 +163 0x1000 //RX_TDDRC_ALPHA_UP_1 +164 0x1000 //RX_TDDRC_ALPHA_UP_2 +165 0x1000 //RX_TDDRC_ALPHA_UP_3 +166 0x1000 //RX_TDDRC_ALPHA_UP_4 +184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +190 0x7FFF //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +269 0x0000 //RX_TDDRC_THRD_0 +270 0x0000 //RX_TDDRC_THRD_1 +271 0x1200 //RX_TDDRC_THRD_2 +272 0x1900 //RX_TDDRC_THRD_3 +273 0x3000 //RX_TDDRC_SLANT_0 +274 0x6E00 //RX_TDDRC_SLANT_1 +275 0x1000 //RX_TDDRC_ALPHA_UP_0 +276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x199A //RX_TDDRC_HMNC_GAIN +279 0x0001 //RX_TDDRC_SMT_FLAG +280 0x0CCD //RX_TDDRC_SMT_W +281 0x0240 //RX_TDDRC_DRC_GAIN +195 0x0020 //RX_FDEQ_SUBNUM +196 0x4848 //RX_FDEQ_GAIN_0 +197 0x4848 //RX_FDEQ_GAIN_1 +198 0x4848 //RX_FDEQ_GAIN_2 +199 0x4848 //RX_FDEQ_GAIN_3 +200 0x4848 //RX_FDEQ_GAIN_4 +201 0x4848 //RX_FDEQ_GAIN_5 +202 0x4848 //RX_FDEQ_GAIN_6 +203 0x4848 //RX_FDEQ_GAIN_7 +204 0x4848 //RX_FDEQ_GAIN_8 +205 0x4848 //RX_FDEQ_GAIN_9 +206 0x4848 //RX_FDEQ_GAIN_10 +207 0x4848 //RX_FDEQ_GAIN_11 +208 0x4848 //RX_FDEQ_GAIN_12 +209 0x4848 //RX_FDEQ_GAIN_13 +210 0x4848 //RX_FDEQ_GAIN_14 +211 0x4848 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0202 //RX_FDEQ_BIN_0 +221 0x0203 //RX_FDEQ_BIN_1 +222 0x0304 //RX_FDEQ_BIN_2 +223 0x0405 //RX_FDEQ_BIN_3 +224 0x0607 //RX_FDEQ_BIN_4 +225 0x0809 //RX_FDEQ_BIN_5 +226 0x0A0B //RX_FDEQ_BIN_6 +227 0x0C0D //RX_FDEQ_BIN_7 +228 0x0E0F //RX_FDEQ_BIN_8 +229 0x1011 //RX_FDEQ_BIN_9 +230 0x1214 //RX_FDEQ_BIN_10 +231 0x1618 //RX_FDEQ_BIN_11 +232 0x1C1C //RX_FDEQ_BIN_12 +233 0x2020 //RX_FDEQ_BIN_13 +234 0x2020 //RX_FDEQ_BIN_14 +235 0x2011 //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x4000 //RX_FDEQ_RESRV_0 +245 0x0320 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0030 //RX_FDDRC_BAND_MARGIN_1 +248 0x0050 //RX_FDDRC_BAND_MARGIN_2 +249 0x0080 //RX_FDDRC_BAND_MARGIN_3 +250 0x0007 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x5000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x6400 //RX_FDDRC_THRD_3_2 +258 0x6400 //RX_FDDRC_THRD_3_3 +259 0x2000 //RX_FDDRC_SLANT_0_0 +260 0x2000 //RX_FDDRC_SLANT_0_1 +261 0x2000 //RX_FDDRC_SLANT_0_2 +262 0x2000 //RX_FDDRC_SLANT_0_3 +263 0x5333 //RX_FDDRC_SLANT_1_0 +264 0x5333 //RX_FDDRC_SLANT_1_1 +265 0x5333 //RX_FDDRC_SLANT_1_2 +266 0x5333 //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +286 0x0100 //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 #CASE_NAME HEADSET-GOOGLE_CONDOR_HEADPHONE-VOICE_GENERIC-NB -#PARAM_MODE FULL -#PARAM_TYPE TX+RX -#TOTAL_CUSTOM_STEP 7 +#PARAM_MODE Full +#PARAM_TYPE TX+2RX +#TOTAL_CUSTOM_STEP 7+7 #TX 0 0x0001 //TX_OPERATION_MODE_0 1 0x0001 //TX_OPERATION_MODE_1 2 0x0033 //TX_PATCH_REG -3 0x2F7C //TX_SENDFUNC_MODE_0 +3 0x6F7C //TX_SENDFUNC_MODE_0 4 0x0001 //TX_SENDFUNC_MODE_1 -5 0x0003 //TX_NUM_MIC +5 0x0002 //TX_NUM_MIC 6 0x0000 //TX_SAMPLINGFREQ_SIG 7 0x0000 //TX_SAMPLINGFREQ_PROC 8 0x000A //TX_FRAME_SZ_SIG @@ -21077,8 +32069,8 @@ 18 0x0000 //TX_SYS_RESRV_2 19 0x0000 //TX_SYS_RESRV_3 20 0x0000 //TX_DIST2REF0 -21 0x00A4 //TX_DIST2REF1 -22 0x0017 //TX_DIST2REF_02 +21 0x009D //TX_DIST2REF1 +22 0x0010 //TX_DIST2REF_02 23 0x0000 //TX_DIST2REF_03 24 0x0000 //TX_DIST2REF_04 25 0x0000 //TX_DIST2REF_05 @@ -21184,7 +32176,7 @@ 125 0x6000 //TX_C_POST_FLT_MIC_MAINBLK 126 0x6000 //TX_C_POST_FLT_MIC_REFBLK 127 0x0010 //TX_MIC_BLOCK_N -128 0x7652 //TX_A_HP +128 0x7646 //TX_A_HP 129 0x4000 //TX_B_PE 130 0x5000 //TX_THR_PITCH_DET_0 131 0x4800 //TX_THR_PITCH_DET_1 @@ -21223,7 +32215,7 @@ 164 0x7FFF //TX_MIN_EQ_RE_EST_12 165 0x2000 //TX_LAMBDA_RE_EST 166 0x0000 //TX_LAMBDA_CB_NLE -167 0x7FFF //TX_C_POST_FLT +167 0x4000 //TX_C_POST_FLT 168 0x2000 //TX_GAIN_NP 169 0x0180 //TX_SE_HOLD_N 170 0x00C8 //TX_DT_HOLD_N @@ -21253,14 +32245,14 @@ 194 0x0000 //TX_NORMENERTH 195 0x0000 //TX_NORMENERHIGHTH 196 0x0000 //TX_NORMENERHIGHTHL -197 0x6590 //TX_DTD_THR1_0 -198 0x6590 //TX_DTD_THR1_1 -199 0x6590 //TX_DTD_THR1_2 +197 0x7FF0 //TX_DTD_THR1_0 +198 0x7FF0 //TX_DTD_THR1_1 +199 0x7FF0 //TX_DTD_THR1_2 200 0x7FF0 //TX_DTD_THR1_3 201 0x7FF0 //TX_DTD_THR1_4 202 0x7FF0 //TX_DTD_THR1_5 203 0x7FF0 //TX_DTD_THR1_6 -204 0x0CCD //TX_DTD_THR2_0 +204 0x7E00 //TX_DTD_THR2_0 205 0x0CCD //TX_DTD_THR2_1 206 0x0CCD //TX_DTD_THR2_2 207 0x0CCD //TX_DTD_THR2_3 @@ -21269,7 +32261,7 @@ 210 0x0CCD //TX_DTD_THR2_6 211 0x7FFF //TX_DTD_THR3 212 0x0000 //TX_SPK_CUT_K -213 0x157C //TX_DT_CUT_K +213 0x1F40 //TX_DT_CUT_K 214 0x0100 //TX_DT_CUT_THR 215 0x04EB //TX_COMFORT_G 216 0x01F4 //TX_POWER_YOUT_TH @@ -21279,18 +32271,18 @@ 220 0x0000 //TX_DTD_MIC_BLK 221 0x1000 //TX_ADPT_STRICT_L 222 0x1000 //TX_ADPT_STRICT_H -223 0x0BB8 //TX_RATIO_DT_L_TH_LOW +223 0x0001 //TX_RATIO_DT_L_TH_LOW 224 0x3A98 //TX_RATIO_DT_H_TH_LOW -225 0x1770 //TX_RATIO_DT_L_TH_HIGH +225 0x0640 //TX_RATIO_DT_L_TH_HIGH 226 0x4E20 //TX_RATIO_DT_H_TH_HIGH -227 0x09C4 //TX_RATIO_DT_L0_TH -228 0x0800 //TX_B_POST_FILT_ECHO_L +227 0x0001 //TX_RATIO_DT_L0_TH +228 0x7FFF //TX_B_POST_FILT_ECHO_L 229 0x2000 //TX_B_POST_FILT_ECHO_H 230 0x0200 //TX_MIN_G_CTRL_ECHO 231 0x1000 //TX_B_LESSCUT_RTO_ECHO 232 0x0000 //TX_EPD_OFFSET_00 233 0x0000 //TX_EPD_OFFST_01 -234 0x1388 //TX_RATIO_DT_L0_TH_HIGH +234 0x05DC //TX_RATIO_DT_L0_TH_HIGH 235 0x3A98 //TX_RATIO_DT_H_TH_CUT 236 0x7FFF //TX_MIN_EQ_RE_EST_13 237 0x0000 //TX_DTD_THR1_7 @@ -21298,7 +32290,7 @@ 239 0x0800 //TX_DT_RESRV_7 240 0x0800 //TX_DT_RESRV_8 241 0x0000 //TX_DT_RESRV_9 -242 0xF800 //TX_THR_SN_EST_0 +242 0xFA00 //TX_THR_SN_EST_0 243 0xFA00 //TX_THR_SN_EST_1 244 0xFA00 //TX_THR_SN_EST_2 245 0xF900 //TX_THR_SN_EST_3 @@ -21307,12 +32299,12 @@ 248 0xF800 //TX_THR_SN_EST_6 249 0xF800 //TX_THR_SN_EST_7 250 0x0050 //TX_DELTA_THR_SN_EST_0 -251 0x01A0 //TX_DELTA_THR_SN_EST_1 +251 0x0200 //TX_DELTA_THR_SN_EST_1 252 0x0200 //TX_DELTA_THR_SN_EST_2 -253 0x0200 //TX_DELTA_THR_SN_EST_3 -254 0x0100 //TX_DELTA_THR_SN_EST_4 +253 0x0100 //TX_DELTA_THR_SN_EST_3 +254 0x0200 //TX_DELTA_THR_SN_EST_4 255 0x0200 //TX_DELTA_THR_SN_EST_5 -256 0x0200 //TX_DELTA_THR_SN_EST_6 +256 0x01A0 //TX_DELTA_THR_SN_EST_6 257 0x0200 //TX_DELTA_THR_SN_EST_7 258 0x4000 //TX_LAMBDA_NN_EST_0 259 0x4000 //TX_LAMBDA_NN_EST_1 @@ -21339,28 +32331,28 @@ 280 0x1000 //TX_B_POST_FLT_1 281 0x0010 //TX_NS_LVL_CTRL_0 282 0x0012 //TX_NS_LVL_CTRL_1 -283 0x0017 //TX_NS_LVL_CTRL_2 -284 0x0015 //TX_NS_LVL_CTRL_3 +283 0x0015 //TX_NS_LVL_CTRL_2 +284 0x0012 //TX_NS_LVL_CTRL_3 285 0x0012 //TX_NS_LVL_CTRL_4 -286 0x0012 //TX_NS_LVL_CTRL_5 -287 0x0011 //TX_NS_LVL_CTRL_6 +286 0x0011 //TX_NS_LVL_CTRL_5 +287 0x0012 //TX_NS_LVL_CTRL_6 288 0x0011 //TX_NS_LVL_CTRL_7 289 0x000F //TX_MIN_GAIN_S_0 -290 0x000F //TX_MIN_GAIN_S_1 -291 0x000D //TX_MIN_GAIN_S_2 +290 0x000D //TX_MIN_GAIN_S_1 +291 0x000F //TX_MIN_GAIN_S_2 292 0x000F //TX_MIN_GAIN_S_3 293 0x000F //TX_MIN_GAIN_S_4 -294 0x000F //TX_MIN_GAIN_S_5 -295 0x0010 //TX_MIN_GAIN_S_6 +294 0x0010 //TX_MIN_GAIN_S_5 +295 0x000F //TX_MIN_GAIN_S_6 296 0x000F //TX_MIN_GAIN_S_7 297 0x4000 //TX_NMOS_SUP 298 0x0000 //TX_NS_MAX_PRI_SNR_TH 299 0x0000 //TX_NMOS_SUP_MENSA 300 0x7FFF //TX_SNRI_SUP_0 -301 0x4000 //TX_SNRI_SUP_1 -302 0x1000 //TX_SNRI_SUP_2 -303 0x4000 //TX_SNRI_SUP_3 -304 0x2400 //TX_SNRI_SUP_4 +301 0x3000 //TX_SNRI_SUP_1 +302 0x4000 //TX_SNRI_SUP_2 +303 0x2400 //TX_SNRI_SUP_3 +304 0x4000 //TX_SNRI_SUP_4 305 0x4000 //TX_SNRI_SUP_5 306 0x4000 //TX_SNRI_SUP_6 307 0x7FFF //TX_SNRI_SUP_7 @@ -21371,19 +32363,19 @@ 312 0x7FFF //TX_A_POST_FILT_0 313 0x2000 //TX_A_POST_FILT_1 314 0x4000 //TX_A_POST_FILT_S_0 -315 0x5000 //TX_A_POST_FILT_S_1 -316 0x2000 //TX_A_POST_FILT_S_2 -317 0x4000 //TX_A_POST_FILT_S_3 -318 0x1000 //TX_A_POST_FILT_S_4 -319 0x3000 //TX_A_POST_FILT_S_5 +315 0x2000 //TX_A_POST_FILT_S_1 +316 0x4000 //TX_A_POST_FILT_S_2 +317 0x1000 //TX_A_POST_FILT_S_3 +318 0x3000 //TX_A_POST_FILT_S_4 +319 0x5000 //TX_A_POST_FILT_S_5 320 0x5000 //TX_A_POST_FILT_S_6 321 0x7000 //TX_A_POST_FILT_S_7 322 0x1000 //TX_B_POST_FILT_0 323 0x1000 //TX_B_POST_FILT_1 324 0x1000 //TX_B_POST_FILT_2 -325 0x1000 //TX_B_POST_FILT_3 -326 0x5000 //TX_B_POST_FILT_4 -327 0x3000 //TX_B_POST_FILT_5 +325 0x5000 //TX_B_POST_FILT_3 +326 0x3000 //TX_B_POST_FILT_4 +327 0x1000 //TX_B_POST_FILT_5 328 0x1000 //TX_B_POST_FILT_6 329 0x2000 //TX_B_POST_FILT_7 330 0x4000 //TX_B_LESSCUT_RTO_S_0 @@ -21396,12 +32388,12 @@ 337 0x7FFF //TX_B_LESSCUT_RTO_S_7 338 0x7E00 //TX_LAMBDA_PFILT 339 0x7D00 //TX_LAMBDA_PFILT_S_0 -340 0x7900 //TX_LAMBDA_PFILT_S_1 -341 0x7400 //TX_LAMBDA_PFILT_S_2 -342 0x7900 //TX_LAMBDA_PFILT_S_3 -343 0x7000 //TX_LAMBDA_PFILT_S_4 +340 0x7C00 //TX_LAMBDA_PFILT_S_1 +341 0x7900 //TX_LAMBDA_PFILT_S_2 +342 0x7000 //TX_LAMBDA_PFILT_S_3 +343 0x7D00 //TX_LAMBDA_PFILT_S_4 344 0x7D00 //TX_LAMBDA_PFILT_S_5 -345 0x7D00 //TX_LAMBDA_PFILT_S_6 +345 0x7900 //TX_LAMBDA_PFILT_S_6 346 0x7D00 //TX_LAMBDA_PFILT_S_7 347 0x0200 //TX_K_PEPPER 348 0x0800 //TX_A_PEPPER @@ -21410,20 +32402,20 @@ 351 0x0001 //TX_HMNC_BST_FLG 352 0x0200 //TX_HMNC_BST_THR 353 0x0800 //TX_DT_BINVAD_TH_0 -354 0x0800 //TX_DT_BINVAD_TH_1 -355 0x0800 //TX_DT_BINVAD_TH_2 +354 0x0100 //TX_DT_BINVAD_TH_1 +355 0x0100 //TX_DT_BINVAD_TH_2 356 0x0800 //TX_DT_BINVAD_TH_3 357 0x0FA0 //TX_DT_BINVAD_ENDF -358 0x0400 //TX_C_POST_FLT_DT +358 0x7000 //TX_C_POST_FLT_DT 359 0x4000 //TX_NS_B_POST_FLT_LESSCUT -360 0x0100 //TX_DT_BOOST +360 0x01B0 //TX_DT_BOOST 361 0x0000 //TX_BF_SGRAD_FLG 362 0x0005 //TX_BF_DVG_TH 363 0x001E //TX_SN_C_F 364 0x0000 //TX_K_APT 365 0x0001 //TX_NOISEDET 366 0x0064 //TX_NDETCT -367 0x0050 //TX_NOISE_TH_0 +367 0x003B //TX_NOISE_TH_0 368 0x7FFF //TX_NOISE_TH_0_2 369 0x7FFF //TX_NOISE_TH_0_3 370 0x07D0 //TX_NOISE_TH_1 @@ -21435,11 +32427,11 @@ 376 0x0000 //TX_NOISE_TH_5_3 377 0x7FFF //TX_NOISE_TH_5_4 378 0x0FA0 //TX_NOISE_TH_6 -379 0x000A //TX_MINENOISE_TH -380 0x4000 //TX_MINENOISE_MIC0_TH_MTS -381 0xFFEE //TX_MINENOISE_MIC0_TH_EXP -382 0x6000 //TX_MINENOISE_MIC0_S_TH_MTS -383 0xFFF3 //TX_MINENOISE_MIC0_S_TH_EXP +379 0x00C8 //TX_MINENOISE_TH +380 0xD508 //TX_MORENS_TFMASK_TH +381 0x0001 //TX_DRC_QUIET_FLOOR +382 0x3A98 //TX_RATIODTL_CUT_TH +383 0x0DAC //TX_DT_CUT_K1 384 0x0666 //TX_OUT_ENER_S_TH_CLEAN 385 0x0666 //TX_OUT_ENER_S_TH_LESSCLEAN 386 0x0333 //TX_OUT_ENER_S_TH_NOISY @@ -21447,22 +32439,22 @@ 388 0x1000 //TX_OUT_ENER_TH_SPEECH 389 0x2000 //TX_SN_NPB_GAIN 390 0x0000 //TX_NN_NPB_GAIN -391 0x0000 //TX_CSX_ALPHA_0 -392 0x0000 //TX_CSX_ALPHA_1 -393 0x0000 //TX_CSX_ALPHA_2 -394 0x0000 //TX_CSX_ALPHA_3 -395 0x0800 //TX_MU_ARSP_EST -396 0x00C8 //TX_P_OUTBEAM_MIN_TH +391 0x7FFF //TX_POST_MASK_SUP_HSNE +392 0x1388 //TX_TAIL_DET_TH +393 0x4000 //TX_B_LESSCUT_RTO_WTA +394 0x0000 //TX_MEL_G_R +395 0x0080 //TX_SUPHIGH_TH +396 0x0000 //TX_MASK_G_R 397 0x0002 //TX_EXTRA_NS_L -398 0x0800 //TX_EXTRA_NS_A -399 0x0005 //TX_VR_NOISE_FLOOR_TH +398 0x1800 //TX_C_POST_FLT_MASK +399 0x7FFF //TX_A_POST_FLT_WNS 400 0x0148 //TX_MIN_G_LOW300HZ -401 0x0001 //TX_MAXLEVEL_CNG +401 0x0004 //TX_MAXLEVEL_CNG 402 0x00B4 //TX_STN_NOISE_TH 403 0x4000 //TX_POST_MASK_SUP 404 0x7FFF //TX_POST_MASK_ADJUST 405 0x00C8 //TX_NS_ENOISE_MIC0_TH -406 0x000A //TX_MINENOISE_MIC0_TH +406 0x0032 //TX_MINENOISE_MIC0_TH 407 0x012C //TX_MINENOISE_MIC0_S_TH 408 0x7FFF //TX_MIN_G_CTRL_SSNS 409 0x0000 //TX_METAL_RTO_THR @@ -21570,16 +32562,16 @@ 511 0x6666 //TX_MIC_TO_BFGAIN 512 0x0000 //TX_MICTOBFGAIN0 513 0x0000 //TX_FASTMUE_TH -514 0x0000 //TX_DERVB_LEN_0 -515 0x0000 //TX_DERVB_LEN_1 -516 0x0000 //TX_RHO_DERVB -517 0x0000 //TX_MIC_INDX_DERVB -518 0x0000 //TX_MU_DERVB -519 0x0000 //TX_DR_RESRV_0 -520 0x0000 //TX_DR_RESRV_1 -521 0x0000 //TX_DR_RESRV_2 -522 0x0000 //TX_DR_RESRV_3 -523 0x0000 //TX_DR_RESRV_4 +514 0xC000 //TX_DEREVERB_LF_MU +515 0xC000 //TX_DEREVERB_HF_MU +516 0xCCCC //TX_DEREVERB_DELAY +517 0xD999 //TX_DEREVERB_COEF_LEN +518 0x1F40 //TX_DEREVERB_DNR +519 0x0000 //TX_DEREVERB_ALPHA +520 0x0000 //TX_DEREVERB_BETA +521 0x0000 //TX_GSC_RTOL_TH +522 0x7000 //TX_GSC_RTOH_TH +523 0x0064 //TX_WIDE2_MEANHTH 524 0x0000 //TX_DR_RESRV_5 525 0x0000 //TX_DR_RESRV_6 526 0x0000 //TX_DR_RESRV_7 @@ -21623,16 +32615,16 @@ 564 0x0000 //TX_PB_RESRV_0 565 0x0000 //TX_PB_RESRV_1 566 0x0014 //TX_FDEQ_SUBNUM -567 0x5858 //TX_FDEQ_GAIN_0 -568 0x5850 //TX_FDEQ_GAIN_1 -569 0x5050 //TX_FDEQ_GAIN_2 -570 0x5048 //TX_FDEQ_GAIN_3 -571 0x3C48 //TX_FDEQ_GAIN_4 -572 0x3C48 //TX_FDEQ_GAIN_5 -573 0x4848 //TX_FDEQ_GAIN_6 -574 0x4842 //TX_FDEQ_GAIN_7 -575 0x3030 //TX_FDEQ_GAIN_8 -576 0x3030 //TX_FDEQ_GAIN_9 +567 0x5050 //TX_FDEQ_GAIN_0 +568 0x5048 //TX_FDEQ_GAIN_1 +569 0x4848 //TX_FDEQ_GAIN_2 +570 0x483C //TX_FDEQ_GAIN_3 +571 0x3034 //TX_FDEQ_GAIN_4 +572 0x3048 //TX_FDEQ_GAIN_5 +573 0x4840 //TX_FDEQ_GAIN_6 +574 0x403C //TX_FDEQ_GAIN_7 +575 0x262C //TX_FDEQ_GAIN_8 +576 0x3A3C //TX_FDEQ_GAIN_9 577 0x4848 //TX_FDEQ_GAIN_10 578 0x4848 //TX_FDEQ_GAIN_11 579 0x4848 //TX_FDEQ_GAIN_12 @@ -21656,7 +32648,7 @@ 597 0x0708 //TX_FDEQ_BIN_6 598 0x090A //TX_FDEQ_BIN_7 599 0x0B0C //TX_FDEQ_BIN_8 -600 0x0D08 //TX_FDEQ_BIN_9 +600 0x0D0E //TX_FDEQ_BIN_9 601 0x0000 //TX_FDEQ_BIN_10 602 0x0000 //TX_FDEQ_BIN_11 603 0x0000 //TX_FDEQ_BIN_12 @@ -21680,9 +32672,9 @@ 621 0x4848 //TX_PREEQ_GAIN_MIC0_4 622 0x4848 //TX_PREEQ_GAIN_MIC0_5 623 0x4848 //TX_PREEQ_GAIN_MIC0_6 -624 0x484A //TX_PREEQ_GAIN_MIC0_7 -625 0x4B4E //TX_PREEQ_GAIN_MIC0_8 -626 0x5054 //TX_PREEQ_GAIN_MIC0_9 +624 0x4848 //TX_PREEQ_GAIN_MIC0_7 +625 0x4A4C //TX_PREEQ_GAIN_MIC0_8 +626 0x4E50 //TX_PREEQ_GAIN_MIC0_9 627 0x4848 //TX_PREEQ_GAIN_MIC0_10 628 0x4848 //TX_PREEQ_GAIN_MIC0_11 629 0x4848 //TX_PREEQ_GAIN_MIC0_12 @@ -21706,7 +32698,7 @@ 647 0x0708 //TX_PREEQ_BIN_MIC0_6 648 0x090A //TX_PREEQ_BIN_MIC0_7 649 0x0B0C //TX_PREEQ_BIN_MIC0_8 -650 0x0D08 //TX_PREEQ_BIN_MIC0_9 +650 0x0D0E //TX_PREEQ_BIN_MIC0_9 651 0x0000 //TX_PREEQ_BIN_MIC0_10 652 0x0000 //TX_PREEQ_BIN_MIC0_11 653 0x0000 //TX_PREEQ_BIN_MIC0_12 @@ -21729,9 +32721,9 @@ 670 0x4848 //TX_PREEQ_GAIN_MIC1_4 671 0x4848 //TX_PREEQ_GAIN_MIC1_5 672 0x4848 //TX_PREEQ_GAIN_MIC1_6 -673 0x4848 //TX_PREEQ_GAIN_MIC1_7 -674 0x4848 //TX_PREEQ_GAIN_MIC1_8 -675 0x4848 //TX_PREEQ_GAIN_MIC1_9 +673 0x4846 //TX_PREEQ_GAIN_MIC1_7 +674 0x4544 //TX_PREEQ_GAIN_MIC1_8 +675 0x4241 //TX_PREEQ_GAIN_MIC1_9 676 0x4848 //TX_PREEQ_GAIN_MIC1_10 677 0x4848 //TX_PREEQ_GAIN_MIC1_11 678 0x4848 //TX_PREEQ_GAIN_MIC1_12 @@ -21746,16 +32738,16 @@ 687 0x4848 //TX_PREEQ_GAIN_MIC1_21 688 0x4848 //TX_PREEQ_GAIN_MIC1_22 689 0x4848 //TX_PREEQ_GAIN_MIC1_23 -690 0x251A //TX_PREEQ_BIN_MIC1_0 -691 0x0F0F //TX_PREEQ_BIN_MIC1_1 -692 0x0C08 //TX_PREEQ_BIN_MIC1_2 -693 0x0700 //TX_PREEQ_BIN_MIC1_3 -694 0x0000 //TX_PREEQ_BIN_MIC1_4 -695 0x0000 //TX_PREEQ_BIN_MIC1_5 -696 0x0000 //TX_PREEQ_BIN_MIC1_6 -697 0x0000 //TX_PREEQ_BIN_MIC1_7 -698 0x0000 //TX_PREEQ_BIN_MIC1_8 -699 0x0000 //TX_PREEQ_BIN_MIC1_9 +690 0x0202 //TX_PREEQ_BIN_MIC1_0 +691 0x0203 //TX_PREEQ_BIN_MIC1_1 +692 0x0303 //TX_PREEQ_BIN_MIC1_2 +693 0x0304 //TX_PREEQ_BIN_MIC1_3 +694 0x0405 //TX_PREEQ_BIN_MIC1_4 +695 0x0506 //TX_PREEQ_BIN_MIC1_5 +696 0x0708 //TX_PREEQ_BIN_MIC1_6 +697 0x090A //TX_PREEQ_BIN_MIC1_7 +698 0x0B0C //TX_PREEQ_BIN_MIC1_8 +699 0x0D0E //TX_PREEQ_BIN_MIC1_9 700 0x0000 //TX_PREEQ_BIN_MIC1_10 701 0x0000 //TX_PREEQ_BIN_MIC1_11 702 0x0000 //TX_PREEQ_BIN_MIC1_12 @@ -21795,7 +32787,7 @@ 736 0x4848 //TX_PREEQ_GAIN_MIC2_21 737 0x4848 //TX_PREEQ_GAIN_MIC2_22 738 0x4848 //TX_PREEQ_GAIN_MIC2_23 -739 0x7800 //TX_PREEQ_BIN_MIC2_0 +739 0x0000 //TX_PREEQ_BIN_MIC2_0 740 0x0000 //TX_PREEQ_BIN_MIC2_1 741 0x0000 //TX_PREEQ_BIN_MIC2_2 742 0x0000 //TX_PREEQ_BIN_MIC2_3 @@ -21847,7 +32839,7 @@ 788 0x7EB8 //TX_TDDRC_ALPHA_DWN_02 789 0x7EB8 //TX_TDDRC_ALPHA_DWN_03 790 0x7EB8 //TX_TDDRC_ALPHA_DWN_04 -791 0x7FFF //TX_TDDRC_TD_DRC_LIMIT +791 0x7214 //TX_TDDRC_TD_DRC_LIMIT 792 0x0800 //TX_TDDRC_POST_LIMIT_GAIN 793 0x0000 //TX_TDDRC_RESRV_0 794 0x0000 //TX_TDDRC_RESRV_1 @@ -21914,15 +32906,15 @@ 855 0x0010 //TX_TDDRC_THRD_1 856 0x1800 //TX_TDDRC_THRD_2 857 0x1800 //TX_TDDRC_THRD_3 -858 0x6000 //TX_TDDRC_SLANT_0 -859 0x6000 //TX_TDDRC_SLANT_1 +858 0x7FFF //TX_TDDRC_SLANT_0 +859 0x7FFF //TX_TDDRC_SLANT_1 860 0x4000 //TX_TDDRC_ALPHA_UP_00 861 0x6000 //TX_TDDRC_ALPHA_DWN_00 862 0x0000 //TX_TDDRC_HMNC_FLAG 863 0x199A //TX_TDDRC_HMNC_GAIN 864 0x0000 //TX_TDDRC_SMT_FLAG 865 0x0CCD //TX_TDDRC_SMT_W -866 0x0BE3 //TX_TDDRC_DRC_GAIN +866 0x0A00 //TX_TDDRC_DRC_GAIN 867 0x7FFF //TX_TDDRC_LMT_THRD 868 0x0000 //TX_TDDRC_LMT_ALPHA 869 0x0000 //TX_TFMASKLTH @@ -21947,14 +32939,79 @@ 888 0x0028 //TX_FASTNS_ARSPC_TH 889 0xC000 //TX_FASTNS_MASK5_TH 890 0x4848 //TX_POSTSSA_MIN_G_VR_MASK -891 0x7FFF //TX_A_LESSCUT_RTO_MASK +891 0x4000 //TX_A_LESSCUT_RTO_MASK 892 0x1770 //TX_FASTNS_NOISETH 893 0xC000 //TX_FASTNS_SSA_THLFL 894 0xC000 //TX_FASTNS_SSA_THHFL 895 0xCCCC //TX_FASTNS_SSA_THLFH 896 0xD999 //TX_FASTNS_SSA_THHFH +897 0x2339 //TX_SENDFUNC_REG_MICMUTE +898 0x0021 //TX_SENDFUNC_REG_MICMUTE1 +899 0x02BC //TX_MICMUTE_RATIO_THR +900 0x0140 //TX_MICMUTE_AMP_THR +901 0x0004 //TX_MICMUTE_HPF_IND +902 0x00C0 //TX_MICMUTE_LOG_EYR_TH +903 0x0008 //TX_MICMUTE_CVG_TIME +904 0x0008 //TX_MICMUTE_RELEASE_TIME +905 0x01FE //TX_MIC_VOLUME_MIC0MUTE +906 0x0020 //TX_MICMUTE_EPD_OFFSET_0 +907 0x001E //TX_MICMUTE_FRQ_AEC_L +908 0x7999 //TX_MICMUTE_EAD_THR +909 0x7FFF //TX_MICMUTE_LAMBDA_CB_NLE +910 0x7FFF //TX_MICMUTE_LAMBDA_RE_EST +911 0x4000 //TX_DTD_THR1_MICMUTE_0 +912 0x7000 //TX_DTD_THR1_MICMUTE_1 +913 0x7FFF //TX_DTD_THR1_MICMUTE_2 +914 0x7FFF //TX_DTD_THR1_MICMUTE_3 +915 0x6CCC //TX_DTD_THR2_MICMUTE_0 +916 0x0400 //TX_MICMUTE_MIN_EQ_RE_EST_0 +917 0x0400 //TX_MICMUTE_MIN_EQ_RE_EST_1 +918 0x1000 //TX_MICMUTE_MIN_EQ_RE_EST_2 +919 0x7FFF //TX_MICMUTE_MIN_EQ_RE_EST_3 +920 0x7FFF //TX_MICMUTE_MIN_EQ_RE_EST_4 +921 0x4000 //TX_MICMUTE_C_POST_FLT +922 0x03E8 //TX_MICMUTE_DT_CUT_K +923 0x0001 //TX_MICMUTE_DT_CUT_THR +924 0x03E8 //TX_MICMUTE_DT_CUT_K2 +925 0x0001 //TX_MICMUTE_DT_CUT_THR2 +926 0x0064 //TX_MICMUTE_DT2_HOLD_N +927 0x1000 //TX_MICMUTE_RATIODTH_THCUT +928 0x1000 //TX_MICMUTE_B_POST_FLT_ECHOL +929 0x7FFF //TX_MICMUTE_B_POST_FLT_ECHOH +930 0x0400 //TX_MICMUTE_C_POST_FLT_MASK +931 0x7999 //TX_MICMUTE_RATIODTL_CUT_TH +932 0x0258 //TX_MICMUTE_DT_CUT_K1 +933 0x0800 //TX_MICMUTE_N2_SN_EST +934 0xFC00 //TX_MICMUTE_THR_SN_EST_0 +935 0x001C //TX_MICMUTE_MIN_G_CTRL_0 +936 0x6000 //TX_MICMUTE_A_POST_FILT_S_0 +937 0x7000 //TX_MICMUTE_B_POST_FILT_0 +938 0x2710 //TX_MIC1RUB_AMP_THR +939 0x0010 //TX_MIC1MUTE_RATIO_THR +940 0x0450 //TX_MIC1MUTE_AMP_THR +941 0x0008 //TX_MIC1MUTE_CVG_TIME +942 0x0008 //TX_MIC1MUTE_RELEASE_TIME +943 0x0000 //TX_AMS_RESRV_01 +944 0x0000 //TX_AMS_RESRV_02 +945 0x0000 //TX_AMS_RESRV_03 +946 0x0000 //TX_AMS_RESRV_04 +947 0x0000 //TX_AMS_RESRV_05 +948 0x0000 //TX_AMS_RESRV_06 +949 0x0000 //TX_AMS_RESRV_07 +950 0x0000 //TX_AMS_RESRV_08 +951 0x0000 //TX_AMS_RESRV_09 +952 0x0000 //TX_AMS_RESRV_10 +953 0x0000 //TX_AMS_RESRV_11 +954 0x0000 //TX_AMS_RESRV_12 +955 0x0000 //TX_AMS_RESRV_13 +956 0x0000 //TX_AMS_RESRV_14 +957 0x0000 //TX_AMS_RESRV_15 +958 0x0000 //TX_AMS_RESRV_16 +959 0x0000 //TX_AMS_RESRV_17 +960 0x0000 //TX_AMS_RESRV_18 +961 0x0000 //TX_AMS_RESRV_19 #RX -0 0x002C //RX_RECVFUNC_MODE_0 +0 0x202C //RX_RECVFUNC_MODE_0 1 0x0000 //RX_RECVFUNC_MODE_1 2 0x0000 //RX_SAMPLINGFREQ_SIG 3 0x0000 //RX_SAMPLINGFREQ_PROC @@ -22804,18 +33861,869 @@ 110 0x0000 //RX_FDDRC_RESRV_0 129 0x0100 //RX_SPK_VOL 130 0x0000 //RX_VOL_RESRV_0 +#RX 2 +157 0x202C //RX_RECVFUNC_MODE_0 +158 0x0000 //RX_RECVFUNC_MODE_1 +159 0x0000 //RX_SAMPLINGFREQ_SIG +160 0x0000 //RX_SAMPLINGFREQ_PROC +161 0x000A //RX_FRAME_SZ +162 0x0000 //RX_DELAY_OPT +163 0x3000 //RX_TDDRC_ALPHA_UP_1 +164 0x3000 //RX_TDDRC_ALPHA_UP_2 +165 0x3000 //RX_TDDRC_ALPHA_UP_3 +166 0x3000 //RX_TDDRC_ALPHA_UP_4 +167 0x0800 //RX_PGA +168 0x7FFF //RX_A_HP +169 0x0000 //RX_B_PE +170 0x3800 //RX_THR_PITCH_DET_0 +171 0x3000 //RX_THR_PITCH_DET_1 +172 0x2800 //RX_THR_PITCH_DET_2 +173 0x0008 //RX_PITCH_BFR_LEN +174 0x0003 //RX_SBD_PITCH_DET +175 0x0100 //RX_PP_RESRV_0 +176 0x0020 //RX_PP_RESRV_1 +177 0x0600 //RX_N_SN_EST +178 0x000C //RX_N2_SN_EST +179 0x0010 //RX_NS_LVL_CTRL +180 0xF800 //RX_THR_SN_EST +181 0x7CCD //RX_LAMBDA_PFILT +182 0x000A //RX_FENS_RESRV_0 +183 0x0190 //RX_FENS_RESRV_1 +184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +187 0x0002 //RX_EXTRA_NS_L +188 0x0800 //RX_EXTRA_NS_A +189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +190 0x7FFF //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +192 0x199A //RX_A_POST_FLT +193 0x0000 //RX_LMT_THRD +194 0x4000 //RX_LMT_ALPHA +195 0x0014 //RX_FDEQ_SUBNUM +196 0x4848 //RX_FDEQ_GAIN_0 +197 0x4848 //RX_FDEQ_GAIN_1 +198 0x4848 //RX_FDEQ_GAIN_2 +199 0x4848 //RX_FDEQ_GAIN_3 +200 0x4848 //RX_FDEQ_GAIN_4 +201 0x4848 //RX_FDEQ_GAIN_5 +202 0x4848 //RX_FDEQ_GAIN_6 +203 0x4848 //RX_FDEQ_GAIN_7 +204 0x4848 //RX_FDEQ_GAIN_8 +205 0x4848 //RX_FDEQ_GAIN_9 +206 0x4848 //RX_FDEQ_GAIN_10 +207 0x4848 //RX_FDEQ_GAIN_11 +208 0x4848 //RX_FDEQ_GAIN_12 +209 0x4848 //RX_FDEQ_GAIN_13 +210 0x4848 //RX_FDEQ_GAIN_14 +211 0x4848 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0202 //RX_FDEQ_BIN_0 +221 0x0203 //RX_FDEQ_BIN_1 +222 0x0303 //RX_FDEQ_BIN_2 +223 0x0304 //RX_FDEQ_BIN_3 +224 0x0405 //RX_FDEQ_BIN_4 +225 0x0506 //RX_FDEQ_BIN_5 +226 0x0708 //RX_FDEQ_BIN_6 +227 0x090A //RX_FDEQ_BIN_7 +228 0x0B0C //RX_FDEQ_BIN_8 +229 0x0D08 //RX_FDEQ_BIN_9 +230 0x0000 //RX_FDEQ_BIN_10 +231 0x0000 //RX_FDEQ_BIN_11 +232 0x0000 //RX_FDEQ_BIN_12 +233 0x0000 //RX_FDEQ_BIN_13 +234 0x0000 //RX_FDEQ_BIN_14 +235 0x0000 //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x4000 //RX_FDEQ_RESRV_0 +245 0x0320 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0030 //RX_FDDRC_BAND_MARGIN_1 +248 0x0050 //RX_FDDRC_BAND_MARGIN_2 +249 0x0080 //RX_FDDRC_BAND_MARGIN_3 +250 0x0007 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x5000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x6400 //RX_FDDRC_THRD_3_2 +258 0x6400 //RX_FDDRC_THRD_3_3 +259 0x2000 //RX_FDDRC_SLANT_0_0 +260 0x2000 //RX_FDDRC_SLANT_0_1 +261 0x2000 //RX_FDDRC_SLANT_0_2 +262 0x2000 //RX_FDDRC_SLANT_0_3 +263 0x5333 //RX_FDDRC_SLANT_1_0 +264 0x5333 //RX_FDDRC_SLANT_1_1 +265 0x5333 //RX_FDDRC_SLANT_1_2 +266 0x5333 //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +268 0x0002 //RX_FILTINDX +269 0x0000 //RX_TDDRC_THRD_0 +270 0x0000 //RX_TDDRC_THRD_1 +271 0x2000 //RX_TDDRC_THRD_2 +272 0x3000 //RX_TDDRC_THRD_3 +273 0x0800 //RX_TDDRC_SLANT_0 +274 0x7EB8 //RX_TDDRC_SLANT_1 +275 0x3000 //RX_TDDRC_ALPHA_UP_0 +276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x199A //RX_TDDRC_HMNC_GAIN +279 0x0001 //RX_TDDRC_SMT_FLAG +280 0x0CCD //RX_TDDRC_SMT_W +281 0x0200 //RX_TDDRC_DRC_GAIN +282 0x7C00 //RX_LAMBDA_PKA_FP +283 0x2000 //RX_TPKA_FP +284 0x2000 //RX_MIN_G_FP +285 0x0080 //RX_MAX_G_FP +286 0x000B //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 +288 0x0000 //RX_MAXLEVEL_CNG +289 0x3000 //RX_BWE_UV_TH +290 0x3000 //RX_BWE_UV_TH2 +291 0x1800 //RX_BWE_UV_TH3 +292 0x1000 //RX_BWE_V_TH +293 0x04CD //RX_BWE_GAIN1_V_TH1 +294 0x0F33 //RX_BWE_GAIN1_V_TH2 +295 0x7333 //RX_BWE_UV_EQ +296 0x199A //RX_BWE_V_EQ +297 0x7333 //RX_BWE_TONE_TH +298 0x0004 //RX_BWE_UV_HOLD_T +299 0x6CCD //RX_BWE_GAIN2_ALPHA +300 0x799A //RX_BWE_GAIN3_ALPHA +301 0x001E //RX_BWE_CUTOFF +302 0x3000 //RX_BWE_GAINFILL +303 0x3200 //RX_BWE_MAXTH_TONE +304 0x2000 //RX_BWE_EQ_0 +305 0x2000 //RX_BWE_EQ_1 +306 0x2000 //RX_BWE_EQ_2 +307 0x2000 //RX_BWE_EQ_3 +308 0x2000 //RX_BWE_EQ_4 +309 0x2000 //RX_BWE_EQ_5 +310 0x2000 //RX_BWE_EQ_6 +311 0x0000 //RX_BWE_RESRV_0 +312 0x0000 //RX_BWE_RESRV_1 +313 0x0000 //RX_BWE_RESRV_2 +#VOL 0 +163 0x3000 //RX_TDDRC_ALPHA_UP_1 +164 0x3000 //RX_TDDRC_ALPHA_UP_2 +165 0x3000 //RX_TDDRC_ALPHA_UP_3 +166 0x3000 //RX_TDDRC_ALPHA_UP_4 +184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +190 0x7FFF //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +269 0x0000 //RX_TDDRC_THRD_0 +270 0x0000 //RX_TDDRC_THRD_1 +271 0x2000 //RX_TDDRC_THRD_2 +272 0x3000 //RX_TDDRC_THRD_3 +273 0x0800 //RX_TDDRC_SLANT_0 +274 0x7EB8 //RX_TDDRC_SLANT_1 +275 0x3000 //RX_TDDRC_ALPHA_UP_0 +276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x199A //RX_TDDRC_HMNC_GAIN +279 0x0001 //RX_TDDRC_SMT_FLAG +280 0x0CCD //RX_TDDRC_SMT_W +281 0x0200 //RX_TDDRC_DRC_GAIN +195 0x0014 //RX_FDEQ_SUBNUM +196 0x4848 //RX_FDEQ_GAIN_0 +197 0x4848 //RX_FDEQ_GAIN_1 +198 0x4848 //RX_FDEQ_GAIN_2 +199 0x4848 //RX_FDEQ_GAIN_3 +200 0x4848 //RX_FDEQ_GAIN_4 +201 0x4848 //RX_FDEQ_GAIN_5 +202 0x4848 //RX_FDEQ_GAIN_6 +203 0x4848 //RX_FDEQ_GAIN_7 +204 0x4848 //RX_FDEQ_GAIN_8 +205 0x4848 //RX_FDEQ_GAIN_9 +206 0x4848 //RX_FDEQ_GAIN_10 +207 0x4848 //RX_FDEQ_GAIN_11 +208 0x4848 //RX_FDEQ_GAIN_12 +209 0x4848 //RX_FDEQ_GAIN_13 +210 0x4848 //RX_FDEQ_GAIN_14 +211 0x4848 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0202 //RX_FDEQ_BIN_0 +221 0x0203 //RX_FDEQ_BIN_1 +222 0x0303 //RX_FDEQ_BIN_2 +223 0x0304 //RX_FDEQ_BIN_3 +224 0x0405 //RX_FDEQ_BIN_4 +225 0x0506 //RX_FDEQ_BIN_5 +226 0x0708 //RX_FDEQ_BIN_6 +227 0x090A //RX_FDEQ_BIN_7 +228 0x0B0C //RX_FDEQ_BIN_8 +229 0x0D08 //RX_FDEQ_BIN_9 +230 0x0000 //RX_FDEQ_BIN_10 +231 0x0000 //RX_FDEQ_BIN_11 +232 0x0000 //RX_FDEQ_BIN_12 +233 0x0000 //RX_FDEQ_BIN_13 +234 0x0000 //RX_FDEQ_BIN_14 +235 0x0000 //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x4000 //RX_FDEQ_RESRV_0 +245 0x0320 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0030 //RX_FDDRC_BAND_MARGIN_1 +248 0x0050 //RX_FDDRC_BAND_MARGIN_2 +249 0x0080 //RX_FDDRC_BAND_MARGIN_3 +250 0x0007 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x5000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x6400 //RX_FDDRC_THRD_3_2 +258 0x6400 //RX_FDDRC_THRD_3_3 +259 0x2000 //RX_FDDRC_SLANT_0_0 +260 0x2000 //RX_FDDRC_SLANT_0_1 +261 0x2000 //RX_FDDRC_SLANT_0_2 +262 0x2000 //RX_FDDRC_SLANT_0_3 +263 0x5333 //RX_FDDRC_SLANT_1_0 +264 0x5333 //RX_FDDRC_SLANT_1_1 +265 0x5333 //RX_FDDRC_SLANT_1_2 +266 0x5333 //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +286 0x000B //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 +#VOL 1 +163 0x3000 //RX_TDDRC_ALPHA_UP_1 +164 0x3000 //RX_TDDRC_ALPHA_UP_2 +165 0x3000 //RX_TDDRC_ALPHA_UP_3 +166 0x3000 //RX_TDDRC_ALPHA_UP_4 +184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +190 0x7FFF //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +269 0x0000 //RX_TDDRC_THRD_0 +270 0x0000 //RX_TDDRC_THRD_1 +271 0x2000 //RX_TDDRC_THRD_2 +272 0x3000 //RX_TDDRC_THRD_3 +273 0x0800 //RX_TDDRC_SLANT_0 +274 0x7EB8 //RX_TDDRC_SLANT_1 +275 0x3000 //RX_TDDRC_ALPHA_UP_0 +276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x199A //RX_TDDRC_HMNC_GAIN +279 0x0001 //RX_TDDRC_SMT_FLAG +280 0x0CCD //RX_TDDRC_SMT_W +281 0x0200 //RX_TDDRC_DRC_GAIN +195 0x0014 //RX_FDEQ_SUBNUM +196 0x4848 //RX_FDEQ_GAIN_0 +197 0x4848 //RX_FDEQ_GAIN_1 +198 0x4848 //RX_FDEQ_GAIN_2 +199 0x4848 //RX_FDEQ_GAIN_3 +200 0x4848 //RX_FDEQ_GAIN_4 +201 0x4848 //RX_FDEQ_GAIN_5 +202 0x4848 //RX_FDEQ_GAIN_6 +203 0x4848 //RX_FDEQ_GAIN_7 +204 0x4848 //RX_FDEQ_GAIN_8 +205 0x4848 //RX_FDEQ_GAIN_9 +206 0x4848 //RX_FDEQ_GAIN_10 +207 0x4848 //RX_FDEQ_GAIN_11 +208 0x4848 //RX_FDEQ_GAIN_12 +209 0x4848 //RX_FDEQ_GAIN_13 +210 0x4848 //RX_FDEQ_GAIN_14 +211 0x4848 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0202 //RX_FDEQ_BIN_0 +221 0x0203 //RX_FDEQ_BIN_1 +222 0x0303 //RX_FDEQ_BIN_2 +223 0x0304 //RX_FDEQ_BIN_3 +224 0x0405 //RX_FDEQ_BIN_4 +225 0x0506 //RX_FDEQ_BIN_5 +226 0x0708 //RX_FDEQ_BIN_6 +227 0x090A //RX_FDEQ_BIN_7 +228 0x0B0C //RX_FDEQ_BIN_8 +229 0x0D08 //RX_FDEQ_BIN_9 +230 0x0000 //RX_FDEQ_BIN_10 +231 0x0000 //RX_FDEQ_BIN_11 +232 0x0000 //RX_FDEQ_BIN_12 +233 0x0000 //RX_FDEQ_BIN_13 +234 0x0000 //RX_FDEQ_BIN_14 +235 0x0000 //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x4000 //RX_FDEQ_RESRV_0 +245 0x0320 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0030 //RX_FDDRC_BAND_MARGIN_1 +248 0x0050 //RX_FDDRC_BAND_MARGIN_2 +249 0x0080 //RX_FDDRC_BAND_MARGIN_3 +250 0x0007 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x5000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x6400 //RX_FDDRC_THRD_3_2 +258 0x6400 //RX_FDDRC_THRD_3_3 +259 0x2000 //RX_FDDRC_SLANT_0_0 +260 0x2000 //RX_FDDRC_SLANT_0_1 +261 0x2000 //RX_FDDRC_SLANT_0_2 +262 0x2000 //RX_FDDRC_SLANT_0_3 +263 0x5333 //RX_FDDRC_SLANT_1_0 +264 0x5333 //RX_FDDRC_SLANT_1_1 +265 0x5333 //RX_FDDRC_SLANT_1_2 +266 0x5333 //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +286 0x0013 //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 +#VOL 2 +163 0x3000 //RX_TDDRC_ALPHA_UP_1 +164 0x3000 //RX_TDDRC_ALPHA_UP_2 +165 0x3000 //RX_TDDRC_ALPHA_UP_3 +166 0x3000 //RX_TDDRC_ALPHA_UP_4 +184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +190 0x7FFF //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +269 0x0000 //RX_TDDRC_THRD_0 +270 0x0000 //RX_TDDRC_THRD_1 +271 0x2000 //RX_TDDRC_THRD_2 +272 0x3000 //RX_TDDRC_THRD_3 +273 0x0800 //RX_TDDRC_SLANT_0 +274 0x7EB8 //RX_TDDRC_SLANT_1 +275 0x3000 //RX_TDDRC_ALPHA_UP_0 +276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x199A //RX_TDDRC_HMNC_GAIN +279 0x0001 //RX_TDDRC_SMT_FLAG +280 0x0CCD //RX_TDDRC_SMT_W +281 0x0200 //RX_TDDRC_DRC_GAIN +195 0x0014 //RX_FDEQ_SUBNUM +196 0x4848 //RX_FDEQ_GAIN_0 +197 0x4848 //RX_FDEQ_GAIN_1 +198 0x4848 //RX_FDEQ_GAIN_2 +199 0x4848 //RX_FDEQ_GAIN_3 +200 0x4848 //RX_FDEQ_GAIN_4 +201 0x4848 //RX_FDEQ_GAIN_5 +202 0x4848 //RX_FDEQ_GAIN_6 +203 0x4848 //RX_FDEQ_GAIN_7 +204 0x4848 //RX_FDEQ_GAIN_8 +205 0x4848 //RX_FDEQ_GAIN_9 +206 0x4848 //RX_FDEQ_GAIN_10 +207 0x4848 //RX_FDEQ_GAIN_11 +208 0x4848 //RX_FDEQ_GAIN_12 +209 0x4848 //RX_FDEQ_GAIN_13 +210 0x4848 //RX_FDEQ_GAIN_14 +211 0x4848 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0202 //RX_FDEQ_BIN_0 +221 0x0203 //RX_FDEQ_BIN_1 +222 0x0303 //RX_FDEQ_BIN_2 +223 0x0304 //RX_FDEQ_BIN_3 +224 0x0405 //RX_FDEQ_BIN_4 +225 0x0506 //RX_FDEQ_BIN_5 +226 0x0708 //RX_FDEQ_BIN_6 +227 0x090A //RX_FDEQ_BIN_7 +228 0x0B0C //RX_FDEQ_BIN_8 +229 0x0D08 //RX_FDEQ_BIN_9 +230 0x0000 //RX_FDEQ_BIN_10 +231 0x0000 //RX_FDEQ_BIN_11 +232 0x0000 //RX_FDEQ_BIN_12 +233 0x0000 //RX_FDEQ_BIN_13 +234 0x0000 //RX_FDEQ_BIN_14 +235 0x0000 //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x4000 //RX_FDEQ_RESRV_0 +245 0x0320 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0030 //RX_FDDRC_BAND_MARGIN_1 +248 0x0050 //RX_FDDRC_BAND_MARGIN_2 +249 0x0080 //RX_FDDRC_BAND_MARGIN_3 +250 0x0007 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x5000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x6400 //RX_FDDRC_THRD_3_2 +258 0x6400 //RX_FDDRC_THRD_3_3 +259 0x2000 //RX_FDDRC_SLANT_0_0 +260 0x2000 //RX_FDDRC_SLANT_0_1 +261 0x2000 //RX_FDDRC_SLANT_0_2 +262 0x2000 //RX_FDDRC_SLANT_0_3 +263 0x5333 //RX_FDDRC_SLANT_1_0 +264 0x5333 //RX_FDDRC_SLANT_1_1 +265 0x5333 //RX_FDDRC_SLANT_1_2 +266 0x5333 //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +286 0x0020 //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 +#VOL 3 +163 0x3000 //RX_TDDRC_ALPHA_UP_1 +164 0x3000 //RX_TDDRC_ALPHA_UP_2 +165 0x3000 //RX_TDDRC_ALPHA_UP_3 +166 0x3000 //RX_TDDRC_ALPHA_UP_4 +184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +190 0x7FFF //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +269 0x0000 //RX_TDDRC_THRD_0 +270 0x0000 //RX_TDDRC_THRD_1 +271 0x2000 //RX_TDDRC_THRD_2 +272 0x3000 //RX_TDDRC_THRD_3 +273 0x0800 //RX_TDDRC_SLANT_0 +274 0x7EB8 //RX_TDDRC_SLANT_1 +275 0x3000 //RX_TDDRC_ALPHA_UP_0 +276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x199A //RX_TDDRC_HMNC_GAIN +279 0x0001 //RX_TDDRC_SMT_FLAG +280 0x0CCD //RX_TDDRC_SMT_W +281 0x0200 //RX_TDDRC_DRC_GAIN +195 0x0014 //RX_FDEQ_SUBNUM +196 0x4848 //RX_FDEQ_GAIN_0 +197 0x4848 //RX_FDEQ_GAIN_1 +198 0x4848 //RX_FDEQ_GAIN_2 +199 0x4848 //RX_FDEQ_GAIN_3 +200 0x4848 //RX_FDEQ_GAIN_4 +201 0x4848 //RX_FDEQ_GAIN_5 +202 0x4848 //RX_FDEQ_GAIN_6 +203 0x4848 //RX_FDEQ_GAIN_7 +204 0x4848 //RX_FDEQ_GAIN_8 +205 0x4848 //RX_FDEQ_GAIN_9 +206 0x4848 //RX_FDEQ_GAIN_10 +207 0x4848 //RX_FDEQ_GAIN_11 +208 0x4848 //RX_FDEQ_GAIN_12 +209 0x4848 //RX_FDEQ_GAIN_13 +210 0x4848 //RX_FDEQ_GAIN_14 +211 0x4848 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0202 //RX_FDEQ_BIN_0 +221 0x0203 //RX_FDEQ_BIN_1 +222 0x0303 //RX_FDEQ_BIN_2 +223 0x0304 //RX_FDEQ_BIN_3 +224 0x0405 //RX_FDEQ_BIN_4 +225 0x0506 //RX_FDEQ_BIN_5 +226 0x0708 //RX_FDEQ_BIN_6 +227 0x090A //RX_FDEQ_BIN_7 +228 0x0B0C //RX_FDEQ_BIN_8 +229 0x0D08 //RX_FDEQ_BIN_9 +230 0x0000 //RX_FDEQ_BIN_10 +231 0x0000 //RX_FDEQ_BIN_11 +232 0x0000 //RX_FDEQ_BIN_12 +233 0x0000 //RX_FDEQ_BIN_13 +234 0x0000 //RX_FDEQ_BIN_14 +235 0x0000 //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x4000 //RX_FDEQ_RESRV_0 +245 0x0320 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0030 //RX_FDDRC_BAND_MARGIN_1 +248 0x0050 //RX_FDDRC_BAND_MARGIN_2 +249 0x0080 //RX_FDDRC_BAND_MARGIN_3 +250 0x0007 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x5000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x6400 //RX_FDDRC_THRD_3_2 +258 0x6400 //RX_FDDRC_THRD_3_3 +259 0x2000 //RX_FDDRC_SLANT_0_0 +260 0x2000 //RX_FDDRC_SLANT_0_1 +261 0x2000 //RX_FDDRC_SLANT_0_2 +262 0x2000 //RX_FDDRC_SLANT_0_3 +263 0x5333 //RX_FDDRC_SLANT_1_0 +264 0x5333 //RX_FDDRC_SLANT_1_1 +265 0x5333 //RX_FDDRC_SLANT_1_2 +266 0x5333 //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +286 0x0036 //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 +#VOL 4 +163 0x3000 //RX_TDDRC_ALPHA_UP_1 +164 0x3000 //RX_TDDRC_ALPHA_UP_2 +165 0x3000 //RX_TDDRC_ALPHA_UP_3 +166 0x3000 //RX_TDDRC_ALPHA_UP_4 +184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +190 0x7FFF //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +269 0x0000 //RX_TDDRC_THRD_0 +270 0x0000 //RX_TDDRC_THRD_1 +271 0x2000 //RX_TDDRC_THRD_2 +272 0x3000 //RX_TDDRC_THRD_3 +273 0x0800 //RX_TDDRC_SLANT_0 +274 0x7EB8 //RX_TDDRC_SLANT_1 +275 0x3000 //RX_TDDRC_ALPHA_UP_0 +276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x199A //RX_TDDRC_HMNC_GAIN +279 0x0001 //RX_TDDRC_SMT_FLAG +280 0x0CCD //RX_TDDRC_SMT_W +281 0x0200 //RX_TDDRC_DRC_GAIN +195 0x0014 //RX_FDEQ_SUBNUM +196 0x4848 //RX_FDEQ_GAIN_0 +197 0x4848 //RX_FDEQ_GAIN_1 +198 0x4848 //RX_FDEQ_GAIN_2 +199 0x4848 //RX_FDEQ_GAIN_3 +200 0x4848 //RX_FDEQ_GAIN_4 +201 0x4848 //RX_FDEQ_GAIN_5 +202 0x4848 //RX_FDEQ_GAIN_6 +203 0x4848 //RX_FDEQ_GAIN_7 +204 0x4848 //RX_FDEQ_GAIN_8 +205 0x4848 //RX_FDEQ_GAIN_9 +206 0x4848 //RX_FDEQ_GAIN_10 +207 0x4848 //RX_FDEQ_GAIN_11 +208 0x4848 //RX_FDEQ_GAIN_12 +209 0x4848 //RX_FDEQ_GAIN_13 +210 0x4848 //RX_FDEQ_GAIN_14 +211 0x4848 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0202 //RX_FDEQ_BIN_0 +221 0x0203 //RX_FDEQ_BIN_1 +222 0x0303 //RX_FDEQ_BIN_2 +223 0x0304 //RX_FDEQ_BIN_3 +224 0x0405 //RX_FDEQ_BIN_4 +225 0x0506 //RX_FDEQ_BIN_5 +226 0x0708 //RX_FDEQ_BIN_6 +227 0x090A //RX_FDEQ_BIN_7 +228 0x0B0C //RX_FDEQ_BIN_8 +229 0x0D08 //RX_FDEQ_BIN_9 +230 0x0000 //RX_FDEQ_BIN_10 +231 0x0000 //RX_FDEQ_BIN_11 +232 0x0000 //RX_FDEQ_BIN_12 +233 0x0000 //RX_FDEQ_BIN_13 +234 0x0000 //RX_FDEQ_BIN_14 +235 0x0000 //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x4000 //RX_FDEQ_RESRV_0 +245 0x0320 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0030 //RX_FDDRC_BAND_MARGIN_1 +248 0x0050 //RX_FDDRC_BAND_MARGIN_2 +249 0x0080 //RX_FDDRC_BAND_MARGIN_3 +250 0x0007 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x5000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x6400 //RX_FDDRC_THRD_3_2 +258 0x6400 //RX_FDDRC_THRD_3_3 +259 0x2000 //RX_FDDRC_SLANT_0_0 +260 0x2000 //RX_FDDRC_SLANT_0_1 +261 0x2000 //RX_FDDRC_SLANT_0_2 +262 0x2000 //RX_FDDRC_SLANT_0_3 +263 0x5333 //RX_FDDRC_SLANT_1_0 +264 0x5333 //RX_FDDRC_SLANT_1_1 +265 0x5333 //RX_FDDRC_SLANT_1_2 +266 0x5333 //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +286 0x005B //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 +#VOL 5 +163 0x3000 //RX_TDDRC_ALPHA_UP_1 +164 0x3000 //RX_TDDRC_ALPHA_UP_2 +165 0x3000 //RX_TDDRC_ALPHA_UP_3 +166 0x3000 //RX_TDDRC_ALPHA_UP_4 +184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +190 0x7FFF //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +269 0x0000 //RX_TDDRC_THRD_0 +270 0x0000 //RX_TDDRC_THRD_1 +271 0x2000 //RX_TDDRC_THRD_2 +272 0x3000 //RX_TDDRC_THRD_3 +273 0x0800 //RX_TDDRC_SLANT_0 +274 0x7EB8 //RX_TDDRC_SLANT_1 +275 0x3000 //RX_TDDRC_ALPHA_UP_0 +276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x199A //RX_TDDRC_HMNC_GAIN +279 0x0001 //RX_TDDRC_SMT_FLAG +280 0x0CCD //RX_TDDRC_SMT_W +281 0x0200 //RX_TDDRC_DRC_GAIN +195 0x0014 //RX_FDEQ_SUBNUM +196 0x4848 //RX_FDEQ_GAIN_0 +197 0x4848 //RX_FDEQ_GAIN_1 +198 0x4848 //RX_FDEQ_GAIN_2 +199 0x4848 //RX_FDEQ_GAIN_3 +200 0x4848 //RX_FDEQ_GAIN_4 +201 0x4848 //RX_FDEQ_GAIN_5 +202 0x4848 //RX_FDEQ_GAIN_6 +203 0x4848 //RX_FDEQ_GAIN_7 +204 0x4848 //RX_FDEQ_GAIN_8 +205 0x4848 //RX_FDEQ_GAIN_9 +206 0x4848 //RX_FDEQ_GAIN_10 +207 0x4848 //RX_FDEQ_GAIN_11 +208 0x4848 //RX_FDEQ_GAIN_12 +209 0x4848 //RX_FDEQ_GAIN_13 +210 0x4848 //RX_FDEQ_GAIN_14 +211 0x4848 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0202 //RX_FDEQ_BIN_0 +221 0x0203 //RX_FDEQ_BIN_1 +222 0x0303 //RX_FDEQ_BIN_2 +223 0x0304 //RX_FDEQ_BIN_3 +224 0x0405 //RX_FDEQ_BIN_4 +225 0x0506 //RX_FDEQ_BIN_5 +226 0x0708 //RX_FDEQ_BIN_6 +227 0x090A //RX_FDEQ_BIN_7 +228 0x0B0C //RX_FDEQ_BIN_8 +229 0x0D08 //RX_FDEQ_BIN_9 +230 0x0000 //RX_FDEQ_BIN_10 +231 0x0000 //RX_FDEQ_BIN_11 +232 0x0000 //RX_FDEQ_BIN_12 +233 0x0000 //RX_FDEQ_BIN_13 +234 0x0000 //RX_FDEQ_BIN_14 +235 0x0000 //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x4000 //RX_FDEQ_RESRV_0 +245 0x0320 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0030 //RX_FDDRC_BAND_MARGIN_1 +248 0x0050 //RX_FDDRC_BAND_MARGIN_2 +249 0x0080 //RX_FDDRC_BAND_MARGIN_3 +250 0x0007 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x5000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x6400 //RX_FDDRC_THRD_3_2 +258 0x6400 //RX_FDDRC_THRD_3_3 +259 0x2000 //RX_FDDRC_SLANT_0_0 +260 0x2000 //RX_FDDRC_SLANT_0_1 +261 0x2000 //RX_FDDRC_SLANT_0_2 +262 0x2000 //RX_FDDRC_SLANT_0_3 +263 0x5333 //RX_FDDRC_SLANT_1_0 +264 0x5333 //RX_FDDRC_SLANT_1_1 +265 0x5333 //RX_FDDRC_SLANT_1_2 +266 0x5333 //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +286 0x0099 //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 +#VOL 6 +163 0x3000 //RX_TDDRC_ALPHA_UP_1 +164 0x3000 //RX_TDDRC_ALPHA_UP_2 +165 0x3000 //RX_TDDRC_ALPHA_UP_3 +166 0x3000 //RX_TDDRC_ALPHA_UP_4 +184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +190 0x7FFF //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +269 0x0000 //RX_TDDRC_THRD_0 +270 0x0000 //RX_TDDRC_THRD_1 +271 0x2000 //RX_TDDRC_THRD_2 +272 0x3000 //RX_TDDRC_THRD_3 +273 0x0800 //RX_TDDRC_SLANT_0 +274 0x7EB8 //RX_TDDRC_SLANT_1 +275 0x3000 //RX_TDDRC_ALPHA_UP_0 +276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x199A //RX_TDDRC_HMNC_GAIN +279 0x0001 //RX_TDDRC_SMT_FLAG +280 0x0CCD //RX_TDDRC_SMT_W +281 0x0200 //RX_TDDRC_DRC_GAIN +195 0x0014 //RX_FDEQ_SUBNUM +196 0x4848 //RX_FDEQ_GAIN_0 +197 0x4848 //RX_FDEQ_GAIN_1 +198 0x4848 //RX_FDEQ_GAIN_2 +199 0x4848 //RX_FDEQ_GAIN_3 +200 0x4848 //RX_FDEQ_GAIN_4 +201 0x4848 //RX_FDEQ_GAIN_5 +202 0x4848 //RX_FDEQ_GAIN_6 +203 0x4848 //RX_FDEQ_GAIN_7 +204 0x4848 //RX_FDEQ_GAIN_8 +205 0x4848 //RX_FDEQ_GAIN_9 +206 0x4848 //RX_FDEQ_GAIN_10 +207 0x4848 //RX_FDEQ_GAIN_11 +208 0x4848 //RX_FDEQ_GAIN_12 +209 0x4848 //RX_FDEQ_GAIN_13 +210 0x4848 //RX_FDEQ_GAIN_14 +211 0x4848 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0202 //RX_FDEQ_BIN_0 +221 0x0203 //RX_FDEQ_BIN_1 +222 0x0303 //RX_FDEQ_BIN_2 +223 0x0304 //RX_FDEQ_BIN_3 +224 0x0405 //RX_FDEQ_BIN_4 +225 0x0506 //RX_FDEQ_BIN_5 +226 0x0708 //RX_FDEQ_BIN_6 +227 0x090A //RX_FDEQ_BIN_7 +228 0x0B0C //RX_FDEQ_BIN_8 +229 0x0D08 //RX_FDEQ_BIN_9 +230 0x0000 //RX_FDEQ_BIN_10 +231 0x0000 //RX_FDEQ_BIN_11 +232 0x0000 //RX_FDEQ_BIN_12 +233 0x0000 //RX_FDEQ_BIN_13 +234 0x0000 //RX_FDEQ_BIN_14 +235 0x0000 //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x4000 //RX_FDEQ_RESRV_0 +245 0x0320 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0030 //RX_FDDRC_BAND_MARGIN_1 +248 0x0050 //RX_FDDRC_BAND_MARGIN_2 +249 0x0080 //RX_FDDRC_BAND_MARGIN_3 +250 0x0007 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x5000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x6400 //RX_FDDRC_THRD_3_2 +258 0x6400 //RX_FDDRC_THRD_3_3 +259 0x2000 //RX_FDDRC_SLANT_0_0 +260 0x2000 //RX_FDDRC_SLANT_0_1 +261 0x2000 //RX_FDDRC_SLANT_0_2 +262 0x2000 //RX_FDDRC_SLANT_0_3 +263 0x5333 //RX_FDDRC_SLANT_1_0 +264 0x5333 //RX_FDDRC_SLANT_1_1 +265 0x5333 //RX_FDDRC_SLANT_1_2 +266 0x5333 //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +286 0x0100 //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 #CASE_NAME HEADSET-GOOGLE_CONDOR_HEADPHONE-VOICE_GENERIC-WB -#PARAM_MODE FULL -#PARAM_TYPE TX+RX -#TOTAL_CUSTOM_STEP 7 +#PARAM_MODE Full +#PARAM_TYPE TX+2RX +#TOTAL_CUSTOM_STEP 7+7 #TX 0 0x0001 //TX_OPERATION_MODE_0 1 0x0001 //TX_OPERATION_MODE_1 2 0x0033 //TX_PATCH_REG -3 0x2F7C //TX_SENDFUNC_MODE_0 +3 0x6F7C //TX_SENDFUNC_MODE_0 4 0x0001 //TX_SENDFUNC_MODE_1 -5 0x0003 //TX_NUM_MIC +5 0x0002 //TX_NUM_MIC 6 0x0001 //TX_SAMPLINGFREQ_SIG 7 0x0001 //TX_SAMPLINGFREQ_PROC 8 0x000A //TX_FRAME_SZ_SIG @@ -22831,8 +34739,8 @@ 18 0x0000 //TX_SYS_RESRV_2 19 0x0000 //TX_SYS_RESRV_3 20 0x0000 //TX_DIST2REF0 -21 0x00A4 //TX_DIST2REF1 -22 0x0017 //TX_DIST2REF_02 +21 0x009D //TX_DIST2REF1 +22 0x0010 //TX_DIST2REF_02 23 0x0000 //TX_DIST2REF_03 24 0x0000 //TX_DIST2REF_04 25 0x0000 //TX_DIST2REF_05 @@ -22923,8 +34831,8 @@ 110 0x0000 //TX_ADCS_MASK 111 0x04D0 //TX_ADCS_GAIN 112 0x4000 //TX_NFC_GAINFAC -113 0x0000 //TX_MAINMIC_BLKFACTOR -114 0x0000 //TX_REFMIC_BLKFACTOR +113 0x0004 //TX_MAINMIC_BLKFACTOR +114 0x0004 //TX_REFMIC_BLKFACTOR 115 0x0000 //TX_BLMIC_BLKFACTOR 116 0x0000 //TX_BRMIC_BLKFACTOR 117 0x0031 //TX_MICBLK_START_BIN @@ -22962,7 +34870,7 @@ 149 0x0800 //TX_AEC_REF_GAIN_2 150 0x6800 //TX_EAD_THR 151 0x1000 //TX_THR_RE_EST -152 0x0200 //TX_MIN_EQ_RE_EST_0 +152 0x3000 //TX_MIN_EQ_RE_EST_0 153 0x0100 //TX_MIN_EQ_RE_EST_1 154 0x0200 //TX_MIN_EQ_RE_EST_2 155 0x0200 //TX_MIN_EQ_RE_EST_3 @@ -22975,13 +34883,13 @@ 162 0x1000 //TX_MIN_EQ_RE_EST_10 163 0x1000 //TX_MIN_EQ_RE_EST_11 164 0x1000 //TX_MIN_EQ_RE_EST_12 -165 0x4000 //TX_LAMBDA_RE_EST +165 0x1B00 //TX_LAMBDA_RE_EST 166 0x4000 //TX_LAMBDA_CB_NLE 167 0x7FFF //TX_C_POST_FLT 168 0x5000 //TX_GAIN_NP 169 0x0180 //TX_SE_HOLD_N 170 0x00C8 //TX_DT_HOLD_N -171 0x05DC //TX_DT2_HOLD_N +171 0x0020 //TX_DT2_HOLD_N 172 0x6666 //TX_AEC_RESRV_0 173 0x0000 //TX_AEC_RESRV_1 174 0x0014 //TX_AEC_RESRV_2 @@ -23007,15 +34915,15 @@ 194 0x0000 //TX_NORMENERTH 195 0x0000 //TX_NORMENERHIGHTH 196 0x0000 //TX_NORMENERHIGHTHL -197 0x6590 //TX_DTD_THR1_0 -198 0x6590 //TX_DTD_THR1_1 -199 0x6590 //TX_DTD_THR1_2 +197 0x76D0 //TX_DTD_THR1_0 +198 0x76D0 //TX_DTD_THR1_1 +199 0x76D0 //TX_DTD_THR1_2 200 0x7FF0 //TX_DTD_THR1_3 201 0x7FF0 //TX_DTD_THR1_4 202 0x7FF0 //TX_DTD_THR1_5 203 0x7FF0 //TX_DTD_THR1_6 -204 0x5000 //TX_DTD_THR2_0 -205 0x5000 //TX_DTD_THR2_1 +204 0x7E00 //TX_DTD_THR2_0 +205 0x7E00 //TX_DTD_THR2_1 206 0x5000 //TX_DTD_THR2_2 207 0x5000 //TX_DTD_THR2_3 208 0x5000 //TX_DTD_THR2_4 @@ -23023,8 +34931,8 @@ 210 0x5000 //TX_DTD_THR2_6 211 0x7FFF //TX_DTD_THR3 212 0x0000 //TX_SPK_CUT_K -213 0x07D0 //TX_DT_CUT_K -214 0x0100 //TX_DT_CUT_THR +213 0x03E8 //TX_DT_CUT_K +214 0x0010 //TX_DT_CUT_THR 215 0x04EB //TX_COMFORT_G 216 0x01F4 //TX_POWER_YOUT_TH 217 0x4000 //TX_FDPFGAINECHO @@ -23035,16 +34943,16 @@ 222 0x023E //TX_ADPT_STRICT_H 223 0x0BB8 //TX_RATIO_DT_L_TH_LOW 224 0x3A98 //TX_RATIO_DT_H_TH_LOW -225 0x1770 //TX_RATIO_DT_L_TH_HIGH -226 0x4E20 //TX_RATIO_DT_H_TH_HIGH -227 0x09C4 //TX_RATIO_DT_L0_TH -228 0x2000 //TX_B_POST_FILT_ECHO_L +225 0x044C //TX_RATIO_DT_L_TH_HIGH +226 0x7800 //TX_RATIO_DT_H_TH_HIGH +227 0x0001 //TX_RATIO_DT_L0_TH +228 0x7FFF //TX_B_POST_FILT_ECHO_L 229 0x7FFF //TX_B_POST_FILT_ECHO_H 230 0x0200 //TX_MIN_G_CTRL_ECHO 231 0x1000 //TX_B_LESSCUT_RTO_ECHO 232 0x0000 //TX_EPD_OFFSET_00 233 0x0000 //TX_EPD_OFFST_01 -234 0x1388 //TX_RATIO_DT_L0_TH_HIGH +234 0x03E8 //TX_RATIO_DT_L0_TH_HIGH 235 0x7FFF //TX_RATIO_DT_H_TH_CUT 236 0x7FFF //TX_MIN_EQ_RE_EST_13 237 0x0000 //TX_DTD_THR1_7 @@ -23052,7 +34960,7 @@ 239 0x0800 //TX_DT_RESRV_7 240 0x0800 //TX_DT_RESRV_8 241 0x0000 //TX_DT_RESRV_9 -242 0xF800 //TX_THR_SN_EST_0 +242 0xFA00 //TX_THR_SN_EST_0 243 0xFA00 //TX_THR_SN_EST_1 244 0xFA00 //TX_THR_SN_EST_2 245 0xFB00 //TX_THR_SN_EST_3 @@ -23061,11 +34969,11 @@ 248 0xF800 //TX_THR_SN_EST_6 249 0xF800 //TX_THR_SN_EST_7 250 0x0100 //TX_DELTA_THR_SN_EST_0 -251 0x0200 //TX_DELTA_THR_SN_EST_1 -252 0x0100 //TX_DELTA_THR_SN_EST_2 -253 0x0200 //TX_DELTA_THR_SN_EST_3 +251 0x0100 //TX_DELTA_THR_SN_EST_1 +252 0x0200 //TX_DELTA_THR_SN_EST_2 +253 0x0100 //TX_DELTA_THR_SN_EST_3 254 0x0100 //TX_DELTA_THR_SN_EST_4 -255 0x0100 //TX_DELTA_THR_SN_EST_5 +255 0x0200 //TX_DELTA_THR_SN_EST_5 256 0x0200 //TX_DELTA_THR_SN_EST_6 257 0x0200 //TX_DELTA_THR_SN_EST_7 258 0x4000 //TX_LAMBDA_NN_EST_0 @@ -23093,11 +35001,11 @@ 280 0x1000 //TX_B_POST_FLT_1 281 0x0010 //TX_NS_LVL_CTRL_0 282 0x0014 //TX_NS_LVL_CTRL_1 -283 0x0014 //TX_NS_LVL_CTRL_2 -284 0x0018 //TX_NS_LVL_CTRL_3 -285 0x0016 //TX_NS_LVL_CTRL_4 -286 0x0014 //TX_NS_LVL_CTRL_5 -287 0x0011 //TX_NS_LVL_CTRL_6 +283 0x0018 //TX_NS_LVL_CTRL_2 +284 0x0016 //TX_NS_LVL_CTRL_3 +285 0x0014 //TX_NS_LVL_CTRL_4 +286 0x0011 //TX_NS_LVL_CTRL_5 +287 0x0014 //TX_NS_LVL_CTRL_6 288 0x0011 //TX_NS_LVL_CTRL_7 289 0x000F //TX_MIN_GAIN_S_0 290 0x0010 //TX_MIN_GAIN_S_1 @@ -23115,8 +35023,8 @@ 302 0x4000 //TX_SNRI_SUP_2 303 0x4000 //TX_SNRI_SUP_3 304 0x4000 //TX_SNRI_SUP_4 -305 0x4000 //TX_SNRI_SUP_5 -306 0x50C0 //TX_SNRI_SUP_6 +305 0x50C0 //TX_SNRI_SUP_5 +306 0x4000 //TX_SNRI_SUP_6 307 0x7FFF //TX_SNRI_SUP_7 308 0x7FFF //TX_THR_LFNS 309 0x0018 //TX_G_LFNS @@ -23125,19 +35033,19 @@ 312 0x7FFF //TX_A_POST_FILT_0 313 0x2000 //TX_A_POST_FILT_1 314 0x5000 //TX_A_POST_FILT_S_0 -315 0x6000 //TX_A_POST_FILT_S_1 -316 0x4C00 //TX_A_POST_FILT_S_2 -317 0x4000 //TX_A_POST_FILT_S_3 -318 0x6000 //TX_A_POST_FILT_S_4 -319 0x4000 //TX_A_POST_FILT_S_5 -320 0x5000 //TX_A_POST_FILT_S_6 +315 0x4C00 //TX_A_POST_FILT_S_1 +316 0x4000 //TX_A_POST_FILT_S_2 +317 0x6000 //TX_A_POST_FILT_S_3 +318 0x4000 //TX_A_POST_FILT_S_4 +319 0x5000 //TX_A_POST_FILT_S_5 +320 0x6000 //TX_A_POST_FILT_S_6 321 0x7000 //TX_A_POST_FILT_S_7 322 0x2000 //TX_B_POST_FILT_0 -323 0x1000 //TX_B_POST_FILT_1 +323 0x2000 //TX_B_POST_FILT_1 324 0x2000 //TX_B_POST_FILT_2 -325 0x2000 //TX_B_POST_FILT_3 +325 0x4000 //TX_B_POST_FILT_3 326 0x4000 //TX_B_POST_FILT_4 -327 0x4000 //TX_B_POST_FILT_5 +327 0x1000 //TX_B_POST_FILT_5 328 0x1000 //TX_B_POST_FILT_6 329 0x2000 //TX_B_POST_FILT_7 330 0x4000 //TX_B_LESSCUT_RTO_S_0 @@ -23145,14 +35053,14 @@ 332 0x7FFF //TX_B_LESSCUT_RTO_S_2 333 0x7FFF //TX_B_LESSCUT_RTO_S_3 334 0x7FFF //TX_B_LESSCUT_RTO_S_4 -335 0x7FFF //TX_B_LESSCUT_RTO_S_5 -336 0x6000 //TX_B_LESSCUT_RTO_S_6 +335 0x6000 //TX_B_LESSCUT_RTO_S_5 +336 0x7FFF //TX_B_LESSCUT_RTO_S_6 337 0x7FFF //TX_B_LESSCUT_RTO_S_7 338 0x7C00 //TX_LAMBDA_PFILT 339 0x7C00 //TX_LAMBDA_PFILT_S_0 340 0x7C00 //TX_LAMBDA_PFILT_S_1 -341 0x7C00 //TX_LAMBDA_PFILT_S_2 -342 0x7A00 //TX_LAMBDA_PFILT_S_3 +341 0x7A00 //TX_LAMBDA_PFILT_S_2 +342 0x7C00 //TX_LAMBDA_PFILT_S_3 343 0x7C00 //TX_LAMBDA_PFILT_S_4 344 0x7C00 //TX_LAMBDA_PFILT_S_5 345 0x7C00 //TX_LAMBDA_PFILT_S_6 @@ -23163,10 +35071,10 @@ 350 0x0600 //TX_A_PEPPER_HF 351 0x0001 //TX_HMNC_BST_FLG 352 0x0200 //TX_HMNC_BST_THR -353 0x0200 //TX_DT_BINVAD_TH_0 -354 0x0200 //TX_DT_BINVAD_TH_1 -355 0x0200 //TX_DT_BINVAD_TH_2 -356 0x0200 //TX_DT_BINVAD_TH_3 +353 0x0800 //TX_DT_BINVAD_TH_0 +354 0x0800 //TX_DT_BINVAD_TH_1 +355 0x0800 //TX_DT_BINVAD_TH_2 +356 0x0800 //TX_DT_BINVAD_TH_3 357 0x1D4C //TX_DT_BINVAD_ENDF 358 0x0800 //TX_C_POST_FLT_DT 359 0x0CCD //TX_NS_B_POST_FLT_LESSCUT @@ -23177,7 +35085,7 @@ 364 0x0000 //TX_K_APT 365 0x0001 //TX_NOISEDET 366 0x0064 //TX_NDETCT -367 0x0032 //TX_NOISE_TH_0 +367 0x0102 //TX_NOISE_TH_0 368 0x7FFF //TX_NOISE_TH_0_2 369 0x7FFF //TX_NOISE_TH_0_3 370 0x017E //TX_NOISE_TH_1 @@ -23189,11 +35097,11 @@ 376 0x0001 //TX_NOISE_TH_5_3 377 0x7FFF //TX_NOISE_TH_5_4 378 0x0F0A //TX_NOISE_TH_6 -379 0x0033 //TX_MINENOISE_TH -380 0x4000 //TX_MINENOISE_MIC0_TH_MTS -381 0xFFEE //TX_MINENOISE_MIC0_TH_EXP -382 0x6000 //TX_MINENOISE_MIC0_S_TH_MTS -383 0xFFF3 //TX_MINENOISE_MIC0_S_TH_EXP +379 0x00F8 //TX_MINENOISE_TH +380 0xD508 //TX_MORENS_TFMASK_TH +381 0x0001 //TX_DRC_QUIET_FLOOR +382 0x3A98 //TX_RATIODTL_CUT_TH +383 0x0DAC //TX_DT_CUT_K1 384 0x0666 //TX_OUT_ENER_S_TH_CLEAN 385 0x0666 //TX_OUT_ENER_S_TH_LESSCLEAN 386 0x0333 //TX_OUT_ENER_S_TH_NOISY @@ -23201,22 +35109,22 @@ 388 0x0333 //TX_OUT_ENER_TH_SPEECH 389 0x2000 //TX_SN_NPB_GAIN 390 0x0000 //TX_NN_NPB_GAIN -391 0x0000 //TX_CSX_ALPHA_0 -392 0x0000 //TX_CSX_ALPHA_1 -393 0x0000 //TX_CSX_ALPHA_2 -394 0x0000 //TX_CSX_ALPHA_3 -395 0x0800 //TX_MU_ARSP_EST -396 0x00C8 //TX_P_OUTBEAM_MIN_TH +391 0x7FFF //TX_POST_MASK_SUP_HSNE +392 0x1388 //TX_TAIL_DET_TH +393 0x4000 //TX_B_LESSCUT_RTO_WTA +394 0x0000 //TX_MEL_G_R +395 0x0080 //TX_SUPHIGH_TH +396 0x0000 //TX_MASK_G_R 397 0x0002 //TX_EXTRA_NS_L -398 0x0800 //TX_EXTRA_NS_A -399 0x0005 //TX_VR_NOISE_FLOOR_TH +398 0x1800 //TX_C_POST_FLT_MASK +399 0x7FFF //TX_A_POST_FLT_WNS 400 0x0148 //TX_MIN_G_LOW300HZ -401 0x0001 //TX_MAXLEVEL_CNG +401 0x0004 //TX_MAXLEVEL_CNG 402 0x00B4 //TX_STN_NOISE_TH 403 0x4000 //TX_POST_MASK_SUP 404 0x7FFF //TX_POST_MASK_ADJUST 405 0x00C8 //TX_NS_ENOISE_MIC0_TH -406 0x0033 //TX_MINENOISE_MIC0_TH +406 0x00DC //TX_MINENOISE_MIC0_TH 407 0x012C //TX_MINENOISE_MIC0_S_TH 408 0x7FFF //TX_MIN_G_CTRL_SSNS 409 0x0000 //TX_METAL_RTO_THR @@ -23324,16 +35232,16 @@ 511 0x6666 //TX_MIC_TO_BFGAIN 512 0x0000 //TX_MICTOBFGAIN0 513 0x0000 //TX_FASTMUE_TH -514 0x0000 //TX_DERVB_LEN_0 -515 0x0000 //TX_DERVB_LEN_1 -516 0x0000 //TX_RHO_DERVB -517 0x0000 //TX_MIC_INDX_DERVB -518 0x0000 //TX_MU_DERVB -519 0x0000 //TX_DR_RESRV_0 -520 0x0000 //TX_DR_RESRV_1 -521 0x0000 //TX_DR_RESRV_2 -522 0x0000 //TX_DR_RESRV_3 -523 0x0000 //TX_DR_RESRV_4 +514 0xC000 //TX_DEREVERB_LF_MU +515 0xC000 //TX_DEREVERB_HF_MU +516 0xCCCC //TX_DEREVERB_DELAY +517 0xD999 //TX_DEREVERB_COEF_LEN +518 0x1F40 //TX_DEREVERB_DNR +519 0x0000 //TX_DEREVERB_ALPHA +520 0x0000 //TX_DEREVERB_BETA +521 0x0000 //TX_GSC_RTOL_TH +522 0x7000 //TX_GSC_RTOH_TH +523 0x0064 //TX_WIDE2_MEANHTH 524 0x0000 //TX_DR_RESRV_5 525 0x0000 //TX_DR_RESRV_6 526 0x0000 //TX_DR_RESRV_7 @@ -23376,19 +35284,19 @@ 563 0x0000 //TX_SAM_MARK 564 0x0000 //TX_PB_RESRV_0 565 0x0000 //TX_PB_RESRV_1 -566 0x001C //TX_FDEQ_SUBNUM -567 0x5050 //TX_FDEQ_GAIN_0 -568 0x5048 //TX_FDEQ_GAIN_1 +566 0x0020 //TX_FDEQ_SUBNUM +567 0x5454 //TX_FDEQ_GAIN_0 +568 0x5448 //TX_FDEQ_GAIN_1 569 0x4848 //TX_FDEQ_GAIN_2 570 0x4848 //TX_FDEQ_GAIN_3 571 0x4848 //TX_FDEQ_GAIN_4 572 0x4850 //TX_FDEQ_GAIN_5 573 0x5050 //TX_FDEQ_GAIN_6 -574 0x5048 //TX_FDEQ_GAIN_7 -575 0x4848 //TX_FDEQ_GAIN_8 -576 0x4844 //TX_FDEQ_GAIN_9 -577 0x3C36 //TX_FDEQ_GAIN_10 -578 0x3A3A //TX_FDEQ_GAIN_11 +574 0x5448 //TX_FDEQ_GAIN_7 +575 0x464C //TX_FDEQ_GAIN_8 +576 0x5050 //TX_FDEQ_GAIN_9 +577 0x4848 //TX_FDEQ_GAIN_10 +578 0x4848 //TX_FDEQ_GAIN_11 579 0x4848 //TX_FDEQ_GAIN_12 580 0x4848 //TX_FDEQ_GAIN_13 581 0x4848 //TX_FDEQ_GAIN_14 @@ -23411,10 +35319,10 @@ 598 0x090A //TX_FDEQ_BIN_7 599 0x0B0C //TX_FDEQ_BIN_8 600 0x0D0E //TX_FDEQ_BIN_9 -601 0x0E0F //TX_FDEQ_BIN_10 -602 0x0F10 //TX_FDEQ_BIN_11 -603 0x1011 //TX_FDEQ_BIN_12 -604 0x1104 //TX_FDEQ_BIN_13 +601 0x0F10 //TX_FDEQ_BIN_10 +602 0x1011 //TX_FDEQ_BIN_11 +603 0x1112 //TX_FDEQ_BIN_12 +604 0x120B //TX_FDEQ_BIN_13 605 0x0000 //TX_FDEQ_BIN_14 606 0x0000 //TX_FDEQ_BIN_15 607 0x0000 //TX_FDEQ_BIN_16 @@ -23434,13 +35342,13 @@ 621 0x4848 //TX_PREEQ_GAIN_MIC0_4 622 0x4848 //TX_PREEQ_GAIN_MIC0_5 623 0x4848 //TX_PREEQ_GAIN_MIC0_6 -624 0x484A //TX_PREEQ_GAIN_MIC0_7 -625 0x4C4E //TX_PREEQ_GAIN_MIC0_8 -626 0x5054 //TX_PREEQ_GAIN_MIC0_9 -627 0x5658 //TX_PREEQ_GAIN_MIC0_10 -628 0x5C5C //TX_PREEQ_GAIN_MIC0_11 -629 0x5E64 //TX_PREEQ_GAIN_MIC0_12 -630 0x6464 //TX_PREEQ_GAIN_MIC0_13 +624 0x4848 //TX_PREEQ_GAIN_MIC0_7 +625 0x484A //TX_PREEQ_GAIN_MIC0_8 +626 0x4B4C //TX_PREEQ_GAIN_MIC0_9 +627 0x4B4A //TX_PREEQ_GAIN_MIC0_10 +628 0x4A48 //TX_PREEQ_GAIN_MIC0_11 +629 0x4C4C //TX_PREEQ_GAIN_MIC0_12 +630 0x4C4C //TX_PREEQ_GAIN_MIC0_13 631 0x4848 //TX_PREEQ_GAIN_MIC0_14 632 0x4848 //TX_PREEQ_GAIN_MIC0_15 633 0x4848 //TX_PREEQ_GAIN_MIC0_16 @@ -23463,8 +35371,8 @@ 650 0x0D0E //TX_PREEQ_BIN_MIC0_9 651 0x0F10 //TX_PREEQ_BIN_MIC0_10 652 0x1011 //TX_PREEQ_BIN_MIC0_11 -653 0x1104 //TX_PREEQ_BIN_MIC0_12 -654 0x1010 //TX_PREEQ_BIN_MIC0_13 +653 0x1112 //TX_PREEQ_BIN_MIC0_12 +654 0x120B //TX_PREEQ_BIN_MIC0_13 655 0x0000 //TX_PREEQ_BIN_MIC0_14 656 0x0000 //TX_PREEQ_BIN_MIC0_15 657 0x0000 //TX_PREEQ_BIN_MIC0_16 @@ -23483,12 +35391,12 @@ 670 0x4848 //TX_PREEQ_GAIN_MIC1_4 671 0x4848 //TX_PREEQ_GAIN_MIC1_5 672 0x4848 //TX_PREEQ_GAIN_MIC1_6 -673 0x4848 //TX_PREEQ_GAIN_MIC1_7 -674 0x4848 //TX_PREEQ_GAIN_MIC1_8 -675 0x4848 //TX_PREEQ_GAIN_MIC1_9 -676 0x4848 //TX_PREEQ_GAIN_MIC1_10 -677 0x4848 //TX_PREEQ_GAIN_MIC1_11 -678 0x4848 //TX_PREEQ_GAIN_MIC1_12 +673 0x4846 //TX_PREEQ_GAIN_MIC1_7 +674 0x4544 //TX_PREEQ_GAIN_MIC1_8 +675 0x4241 //TX_PREEQ_GAIN_MIC1_9 +676 0x403E //TX_PREEQ_GAIN_MIC1_10 +677 0x3D3C //TX_PREEQ_GAIN_MIC1_11 +678 0x3C3C //TX_PREEQ_GAIN_MIC1_12 679 0x4848 //TX_PREEQ_GAIN_MIC1_13 680 0x4848 //TX_PREEQ_GAIN_MIC1_14 681 0x4848 //TX_PREEQ_GAIN_MIC1_15 @@ -23500,19 +35408,19 @@ 687 0x4848 //TX_PREEQ_GAIN_MIC1_21 688 0x4848 //TX_PREEQ_GAIN_MIC1_22 689 0x4848 //TX_PREEQ_GAIN_MIC1_23 -690 0x251A //TX_PREEQ_BIN_MIC1_0 -691 0x0F0F //TX_PREEQ_BIN_MIC1_1 -692 0x0C0C //TX_PREEQ_BIN_MIC1_2 -693 0x0C0F //TX_PREEQ_BIN_MIC1_3 -694 0x0F0F //TX_PREEQ_BIN_MIC1_4 -695 0x0F09 //TX_PREEQ_BIN_MIC1_5 -696 0x0909 //TX_PREEQ_BIN_MIC1_6 -697 0x0908 //TX_PREEQ_BIN_MIC1_7 -698 0x0700 //TX_PREEQ_BIN_MIC1_8 -699 0x0000 //TX_PREEQ_BIN_MIC1_9 -700 0x0000 //TX_PREEQ_BIN_MIC1_10 -701 0x0000 //TX_PREEQ_BIN_MIC1_11 -702 0x0000 //TX_PREEQ_BIN_MIC1_12 +690 0x0202 //TX_PREEQ_BIN_MIC1_0 +691 0x0203 //TX_PREEQ_BIN_MIC1_1 +692 0x0303 //TX_PREEQ_BIN_MIC1_2 +693 0x0304 //TX_PREEQ_BIN_MIC1_3 +694 0x0405 //TX_PREEQ_BIN_MIC1_4 +695 0x0506 //TX_PREEQ_BIN_MIC1_5 +696 0x0708 //TX_PREEQ_BIN_MIC1_6 +697 0x090A //TX_PREEQ_BIN_MIC1_7 +698 0x0B0C //TX_PREEQ_BIN_MIC1_8 +699 0x0F10 //TX_PREEQ_BIN_MIC1_9 +700 0x1011 //TX_PREEQ_BIN_MIC1_10 +701 0x1112 //TX_PREEQ_BIN_MIC1_11 +702 0x1208 //TX_PREEQ_BIN_MIC1_12 703 0x0000 //TX_PREEQ_BIN_MIC1_13 704 0x0000 //TX_PREEQ_BIN_MIC1_14 705 0x0000 //TX_PREEQ_BIN_MIC1_15 @@ -23601,7 +35509,7 @@ 788 0x7EB8 //TX_TDDRC_ALPHA_DWN_02 789 0x7EB8 //TX_TDDRC_ALPHA_DWN_03 790 0x7EB8 //TX_TDDRC_ALPHA_DWN_04 -791 0x7FFF //TX_TDDRC_TD_DRC_LIMIT +791 0x7214 //TX_TDDRC_TD_DRC_LIMIT 792 0x0800 //TX_TDDRC_POST_LIMIT_GAIN 793 0x0000 //TX_TDDRC_RESRV_0 794 0x0000 //TX_TDDRC_RESRV_1 @@ -23668,15 +35576,15 @@ 855 0x0002 //TX_TDDRC_THRD_1 856 0x1800 //TX_TDDRC_THRD_2 857 0x1800 //TX_TDDRC_THRD_3 -858 0x6000 //TX_TDDRC_SLANT_0 -859 0x6000 //TX_TDDRC_SLANT_1 +858 0x7FFF //TX_TDDRC_SLANT_0 +859 0x7FFF //TX_TDDRC_SLANT_1 860 0x0800 //TX_TDDRC_ALPHA_UP_00 861 0x7EB8 //TX_TDDRC_ALPHA_DWN_00 862 0x0000 //TX_TDDRC_HMNC_FLAG 863 0x199A //TX_TDDRC_HMNC_GAIN 864 0x0000 //TX_TDDRC_SMT_FLAG 865 0x0CCD //TX_TDDRC_SMT_W -866 0x0BE3 //TX_TDDRC_DRC_GAIN +866 0x0C97 //TX_TDDRC_DRC_GAIN 867 0x7FFF //TX_TDDRC_LMT_THRD 868 0x0000 //TX_TDDRC_LMT_ALPHA 869 0x0000 //TX_TFMASKLTH @@ -23701,14 +35609,79 @@ 888 0x0028 //TX_FASTNS_ARSPC_TH 889 0xC000 //TX_FASTNS_MASK5_TH 890 0x4848 //TX_POSTSSA_MIN_G_VR_MASK -891 0x1000 //TX_A_LESSCUT_RTO_MASK +891 0x4000 //TX_A_LESSCUT_RTO_MASK 892 0x1770 //TX_FASTNS_NOISETH 893 0xC000 //TX_FASTNS_SSA_THLFL 894 0xC000 //TX_FASTNS_SSA_THHFL 895 0xCCCC //TX_FASTNS_SSA_THLFH 896 0xD999 //TX_FASTNS_SSA_THHFH +897 0x2339 //TX_SENDFUNC_REG_MICMUTE +898 0x0021 //TX_SENDFUNC_REG_MICMUTE1 +899 0x02BC //TX_MICMUTE_RATIO_THR +900 0x0140 //TX_MICMUTE_AMP_THR +901 0x0004 //TX_MICMUTE_HPF_IND +902 0x00C0 //TX_MICMUTE_LOG_EYR_TH +903 0x0008 //TX_MICMUTE_CVG_TIME +904 0x0008 //TX_MICMUTE_RELEASE_TIME +905 0x01FE //TX_MIC_VOLUME_MIC0MUTE +906 0x0020 //TX_MICMUTE_EPD_OFFSET_0 +907 0x001E //TX_MICMUTE_FRQ_AEC_L +908 0x7999 //TX_MICMUTE_EAD_THR +909 0x7FFF //TX_MICMUTE_LAMBDA_CB_NLE +910 0x7FFF //TX_MICMUTE_LAMBDA_RE_EST +911 0x4000 //TX_DTD_THR1_MICMUTE_0 +912 0x7000 //TX_DTD_THR1_MICMUTE_1 +913 0x7FFF //TX_DTD_THR1_MICMUTE_2 +914 0x7FFF //TX_DTD_THR1_MICMUTE_3 +915 0x6CCC //TX_DTD_THR2_MICMUTE_0 +916 0x0400 //TX_MICMUTE_MIN_EQ_RE_EST_0 +917 0x0400 //TX_MICMUTE_MIN_EQ_RE_EST_1 +918 0x1000 //TX_MICMUTE_MIN_EQ_RE_EST_2 +919 0x7FFF //TX_MICMUTE_MIN_EQ_RE_EST_3 +920 0x7FFF //TX_MICMUTE_MIN_EQ_RE_EST_4 +921 0x4000 //TX_MICMUTE_C_POST_FLT +922 0x03E8 //TX_MICMUTE_DT_CUT_K +923 0x0001 //TX_MICMUTE_DT_CUT_THR +924 0x03E8 //TX_MICMUTE_DT_CUT_K2 +925 0x0001 //TX_MICMUTE_DT_CUT_THR2 +926 0x0064 //TX_MICMUTE_DT2_HOLD_N +927 0x1000 //TX_MICMUTE_RATIODTH_THCUT +928 0x1000 //TX_MICMUTE_B_POST_FLT_ECHOL +929 0x7FFF //TX_MICMUTE_B_POST_FLT_ECHOH +930 0x0400 //TX_MICMUTE_C_POST_FLT_MASK +931 0x7999 //TX_MICMUTE_RATIODTL_CUT_TH +932 0x0258 //TX_MICMUTE_DT_CUT_K1 +933 0x0800 //TX_MICMUTE_N2_SN_EST +934 0xFC00 //TX_MICMUTE_THR_SN_EST_0 +935 0x001C //TX_MICMUTE_MIN_G_CTRL_0 +936 0x6000 //TX_MICMUTE_A_POST_FILT_S_0 +937 0x7000 //TX_MICMUTE_B_POST_FILT_0 +938 0x2710 //TX_MIC1RUB_AMP_THR +939 0x0010 //TX_MIC1MUTE_RATIO_THR +940 0x0450 //TX_MIC1MUTE_AMP_THR +941 0x0008 //TX_MIC1MUTE_CVG_TIME +942 0x0008 //TX_MIC1MUTE_RELEASE_TIME +943 0x0000 //TX_AMS_RESRV_01 +944 0x0000 //TX_AMS_RESRV_02 +945 0x0000 //TX_AMS_RESRV_03 +946 0x0000 //TX_AMS_RESRV_04 +947 0x0000 //TX_AMS_RESRV_05 +948 0x0000 //TX_AMS_RESRV_06 +949 0x0000 //TX_AMS_RESRV_07 +950 0x0000 //TX_AMS_RESRV_08 +951 0x0000 //TX_AMS_RESRV_09 +952 0x0000 //TX_AMS_RESRV_10 +953 0x0000 //TX_AMS_RESRV_11 +954 0x0000 //TX_AMS_RESRV_12 +955 0x0000 //TX_AMS_RESRV_13 +956 0x0000 //TX_AMS_RESRV_14 +957 0x0000 //TX_AMS_RESRV_15 +958 0x0000 //TX_AMS_RESRV_16 +959 0x0000 //TX_AMS_RESRV_17 +960 0x0000 //TX_AMS_RESRV_18 +961 0x0000 //TX_AMS_RESRV_19 #RX -0 0x002C //RX_RECVFUNC_MODE_0 +0 0x202C //RX_RECVFUNC_MODE_0 1 0x0000 //RX_RECVFUNC_MODE_1 2 0x0001 //RX_SAMPLINGFREQ_SIG 3 0x0001 //RX_SAMPLINGFREQ_PROC @@ -24558,18 +36531,869 @@ 110 0x0000 //RX_FDDRC_RESRV_0 129 0x0100 //RX_SPK_VOL 130 0x0000 //RX_VOL_RESRV_0 +#RX 2 +157 0x202C //RX_RECVFUNC_MODE_0 +158 0x0000 //RX_RECVFUNC_MODE_1 +159 0x0001 //RX_SAMPLINGFREQ_SIG +160 0x0001 //RX_SAMPLINGFREQ_PROC +161 0x000A //RX_FRAME_SZ +162 0x0000 //RX_DELAY_OPT +163 0x3000 //RX_TDDRC_ALPHA_UP_1 +164 0x3000 //RX_TDDRC_ALPHA_UP_2 +165 0x3000 //RX_TDDRC_ALPHA_UP_3 +166 0x3000 //RX_TDDRC_ALPHA_UP_4 +167 0x0800 //RX_PGA +168 0x7FFF //RX_A_HP +169 0x4000 //RX_B_PE +170 0x3800 //RX_THR_PITCH_DET_0 +171 0x3000 //RX_THR_PITCH_DET_1 +172 0x2800 //RX_THR_PITCH_DET_2 +173 0x0008 //RX_PITCH_BFR_LEN +174 0x0003 //RX_SBD_PITCH_DET +175 0x0100 //RX_PP_RESRV_0 +176 0x0020 //RX_PP_RESRV_1 +177 0x0600 //RX_N_SN_EST +178 0x000C //RX_N2_SN_EST +179 0x0010 //RX_NS_LVL_CTRL +180 0xF800 //RX_THR_SN_EST +181 0x7CCD //RX_LAMBDA_PFILT +182 0x000A //RX_FENS_RESRV_0 +183 0x0190 //RX_FENS_RESRV_1 +184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +187 0x0002 //RX_EXTRA_NS_L +188 0x0800 //RX_EXTRA_NS_A +189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +190 0x7FFF //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +192 0x199A //RX_A_POST_FLT +193 0x0000 //RX_LMT_THRD +194 0x4000 //RX_LMT_ALPHA +195 0x001C //RX_FDEQ_SUBNUM +196 0x4848 //RX_FDEQ_GAIN_0 +197 0x4848 //RX_FDEQ_GAIN_1 +198 0x4848 //RX_FDEQ_GAIN_2 +199 0x4848 //RX_FDEQ_GAIN_3 +200 0x4848 //RX_FDEQ_GAIN_4 +201 0x4848 //RX_FDEQ_GAIN_5 +202 0x4848 //RX_FDEQ_GAIN_6 +203 0x4848 //RX_FDEQ_GAIN_7 +204 0x4848 //RX_FDEQ_GAIN_8 +205 0x4848 //RX_FDEQ_GAIN_9 +206 0x4848 //RX_FDEQ_GAIN_10 +207 0x4848 //RX_FDEQ_GAIN_11 +208 0x4848 //RX_FDEQ_GAIN_12 +209 0x4848 //RX_FDEQ_GAIN_13 +210 0x4848 //RX_FDEQ_GAIN_14 +211 0x4848 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0202 //RX_FDEQ_BIN_0 +221 0x0203 //RX_FDEQ_BIN_1 +222 0x0303 //RX_FDEQ_BIN_2 +223 0x0304 //RX_FDEQ_BIN_3 +224 0x0405 //RX_FDEQ_BIN_4 +225 0x0506 //RX_FDEQ_BIN_5 +226 0x0708 //RX_FDEQ_BIN_6 +227 0x090A //RX_FDEQ_BIN_7 +228 0x0B0C //RX_FDEQ_BIN_8 +229 0x0D0E //RX_FDEQ_BIN_9 +230 0x0E0F //RX_FDEQ_BIN_10 +231 0x0F10 //RX_FDEQ_BIN_11 +232 0x1011 //RX_FDEQ_BIN_12 +233 0x1104 //RX_FDEQ_BIN_13 +234 0x0000 //RX_FDEQ_BIN_14 +235 0x0000 //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x4000 //RX_FDEQ_RESRV_0 +245 0x0320 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0030 //RX_FDDRC_BAND_MARGIN_1 +248 0x0050 //RX_FDDRC_BAND_MARGIN_2 +249 0x0080 //RX_FDDRC_BAND_MARGIN_3 +250 0x0007 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x5000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x6400 //RX_FDDRC_THRD_3_2 +258 0x6400 //RX_FDDRC_THRD_3_3 +259 0x2000 //RX_FDDRC_SLANT_0_0 +260 0x2000 //RX_FDDRC_SLANT_0_1 +261 0x2000 //RX_FDDRC_SLANT_0_2 +262 0x2000 //RX_FDDRC_SLANT_0_3 +263 0x5333 //RX_FDDRC_SLANT_1_0 +264 0x5333 //RX_FDDRC_SLANT_1_1 +265 0x5333 //RX_FDDRC_SLANT_1_2 +266 0x5333 //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +268 0x0002 //RX_FILTINDX +269 0x0000 //RX_TDDRC_THRD_0 +270 0x0000 //RX_TDDRC_THRD_1 +271 0x2000 //RX_TDDRC_THRD_2 +272 0x3000 //RX_TDDRC_THRD_3 +273 0x0800 //RX_TDDRC_SLANT_0 +274 0x7EB8 //RX_TDDRC_SLANT_1 +275 0x3000 //RX_TDDRC_ALPHA_UP_0 +276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x199A //RX_TDDRC_HMNC_GAIN +279 0x0001 //RX_TDDRC_SMT_FLAG +280 0x0CCD //RX_TDDRC_SMT_W +281 0x0196 //RX_TDDRC_DRC_GAIN +282 0x7C00 //RX_LAMBDA_PKA_FP +283 0x2000 //RX_TPKA_FP +284 0x2000 //RX_MIN_G_FP +285 0x0080 //RX_MAX_G_FP +286 0x000B //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 +288 0x0000 //RX_MAXLEVEL_CNG +289 0x3000 //RX_BWE_UV_TH +290 0x3000 //RX_BWE_UV_TH2 +291 0x1800 //RX_BWE_UV_TH3 +292 0x1000 //RX_BWE_V_TH +293 0x04CD //RX_BWE_GAIN1_V_TH1 +294 0x0F33 //RX_BWE_GAIN1_V_TH2 +295 0x7333 //RX_BWE_UV_EQ +296 0x199A //RX_BWE_V_EQ +297 0x7333 //RX_BWE_TONE_TH +298 0x0004 //RX_BWE_UV_HOLD_T +299 0x6CCD //RX_BWE_GAIN2_ALPHA +300 0x799A //RX_BWE_GAIN3_ALPHA +301 0x001E //RX_BWE_CUTOFF +302 0x3000 //RX_BWE_GAINFILL +303 0x3200 //RX_BWE_MAXTH_TONE +304 0x2000 //RX_BWE_EQ_0 +305 0x2000 //RX_BWE_EQ_1 +306 0x2000 //RX_BWE_EQ_2 +307 0x2000 //RX_BWE_EQ_3 +308 0x2000 //RX_BWE_EQ_4 +309 0x2000 //RX_BWE_EQ_5 +310 0x2000 //RX_BWE_EQ_6 +311 0x0000 //RX_BWE_RESRV_0 +312 0x0000 //RX_BWE_RESRV_1 +313 0x0000 //RX_BWE_RESRV_2 +#VOL 0 +163 0x3000 //RX_TDDRC_ALPHA_UP_1 +164 0x3000 //RX_TDDRC_ALPHA_UP_2 +165 0x3000 //RX_TDDRC_ALPHA_UP_3 +166 0x3000 //RX_TDDRC_ALPHA_UP_4 +184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +190 0x7FFF //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +269 0x0000 //RX_TDDRC_THRD_0 +270 0x0000 //RX_TDDRC_THRD_1 +271 0x2000 //RX_TDDRC_THRD_2 +272 0x3000 //RX_TDDRC_THRD_3 +273 0x0800 //RX_TDDRC_SLANT_0 +274 0x7EB8 //RX_TDDRC_SLANT_1 +275 0x3000 //RX_TDDRC_ALPHA_UP_0 +276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x199A //RX_TDDRC_HMNC_GAIN +279 0x0001 //RX_TDDRC_SMT_FLAG +280 0x0CCD //RX_TDDRC_SMT_W +281 0x0196 //RX_TDDRC_DRC_GAIN +195 0x001C //RX_FDEQ_SUBNUM +196 0x4848 //RX_FDEQ_GAIN_0 +197 0x4848 //RX_FDEQ_GAIN_1 +198 0x4848 //RX_FDEQ_GAIN_2 +199 0x4848 //RX_FDEQ_GAIN_3 +200 0x4848 //RX_FDEQ_GAIN_4 +201 0x4848 //RX_FDEQ_GAIN_5 +202 0x4848 //RX_FDEQ_GAIN_6 +203 0x4848 //RX_FDEQ_GAIN_7 +204 0x4848 //RX_FDEQ_GAIN_8 +205 0x4848 //RX_FDEQ_GAIN_9 +206 0x4848 //RX_FDEQ_GAIN_10 +207 0x4848 //RX_FDEQ_GAIN_11 +208 0x4848 //RX_FDEQ_GAIN_12 +209 0x4848 //RX_FDEQ_GAIN_13 +210 0x4848 //RX_FDEQ_GAIN_14 +211 0x4848 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0202 //RX_FDEQ_BIN_0 +221 0x0203 //RX_FDEQ_BIN_1 +222 0x0303 //RX_FDEQ_BIN_2 +223 0x0304 //RX_FDEQ_BIN_3 +224 0x0405 //RX_FDEQ_BIN_4 +225 0x0506 //RX_FDEQ_BIN_5 +226 0x0708 //RX_FDEQ_BIN_6 +227 0x090A //RX_FDEQ_BIN_7 +228 0x0B0C //RX_FDEQ_BIN_8 +229 0x0D0E //RX_FDEQ_BIN_9 +230 0x0E0F //RX_FDEQ_BIN_10 +231 0x0F10 //RX_FDEQ_BIN_11 +232 0x1011 //RX_FDEQ_BIN_12 +233 0x1104 //RX_FDEQ_BIN_13 +234 0x0000 //RX_FDEQ_BIN_14 +235 0x0000 //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x4000 //RX_FDEQ_RESRV_0 +245 0x0320 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0030 //RX_FDDRC_BAND_MARGIN_1 +248 0x0050 //RX_FDDRC_BAND_MARGIN_2 +249 0x0080 //RX_FDDRC_BAND_MARGIN_3 +250 0x0007 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x5000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x6400 //RX_FDDRC_THRD_3_2 +258 0x6400 //RX_FDDRC_THRD_3_3 +259 0x2000 //RX_FDDRC_SLANT_0_0 +260 0x2000 //RX_FDDRC_SLANT_0_1 +261 0x2000 //RX_FDDRC_SLANT_0_2 +262 0x2000 //RX_FDDRC_SLANT_0_3 +263 0x5333 //RX_FDDRC_SLANT_1_0 +264 0x5333 //RX_FDDRC_SLANT_1_1 +265 0x5333 //RX_FDDRC_SLANT_1_2 +266 0x5333 //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +286 0x000B //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 +#VOL 1 +163 0x3000 //RX_TDDRC_ALPHA_UP_1 +164 0x3000 //RX_TDDRC_ALPHA_UP_2 +165 0x3000 //RX_TDDRC_ALPHA_UP_3 +166 0x3000 //RX_TDDRC_ALPHA_UP_4 +184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +190 0x7FFF //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +269 0x0000 //RX_TDDRC_THRD_0 +270 0x0000 //RX_TDDRC_THRD_1 +271 0x2000 //RX_TDDRC_THRD_2 +272 0x3000 //RX_TDDRC_THRD_3 +273 0x0800 //RX_TDDRC_SLANT_0 +274 0x7EB8 //RX_TDDRC_SLANT_1 +275 0x3000 //RX_TDDRC_ALPHA_UP_0 +276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x199A //RX_TDDRC_HMNC_GAIN +279 0x0001 //RX_TDDRC_SMT_FLAG +280 0x0CCD //RX_TDDRC_SMT_W +281 0x0196 //RX_TDDRC_DRC_GAIN +195 0x001C //RX_FDEQ_SUBNUM +196 0x4848 //RX_FDEQ_GAIN_0 +197 0x4848 //RX_FDEQ_GAIN_1 +198 0x4848 //RX_FDEQ_GAIN_2 +199 0x4848 //RX_FDEQ_GAIN_3 +200 0x4848 //RX_FDEQ_GAIN_4 +201 0x4848 //RX_FDEQ_GAIN_5 +202 0x4848 //RX_FDEQ_GAIN_6 +203 0x4848 //RX_FDEQ_GAIN_7 +204 0x4848 //RX_FDEQ_GAIN_8 +205 0x4848 //RX_FDEQ_GAIN_9 +206 0x4848 //RX_FDEQ_GAIN_10 +207 0x4848 //RX_FDEQ_GAIN_11 +208 0x4848 //RX_FDEQ_GAIN_12 +209 0x4848 //RX_FDEQ_GAIN_13 +210 0x4848 //RX_FDEQ_GAIN_14 +211 0x4848 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0202 //RX_FDEQ_BIN_0 +221 0x0203 //RX_FDEQ_BIN_1 +222 0x0303 //RX_FDEQ_BIN_2 +223 0x0304 //RX_FDEQ_BIN_3 +224 0x0405 //RX_FDEQ_BIN_4 +225 0x0506 //RX_FDEQ_BIN_5 +226 0x0708 //RX_FDEQ_BIN_6 +227 0x090A //RX_FDEQ_BIN_7 +228 0x0B0C //RX_FDEQ_BIN_8 +229 0x0D0E //RX_FDEQ_BIN_9 +230 0x0E0F //RX_FDEQ_BIN_10 +231 0x0F10 //RX_FDEQ_BIN_11 +232 0x1011 //RX_FDEQ_BIN_12 +233 0x1104 //RX_FDEQ_BIN_13 +234 0x0000 //RX_FDEQ_BIN_14 +235 0x0000 //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x4000 //RX_FDEQ_RESRV_0 +245 0x0320 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0030 //RX_FDDRC_BAND_MARGIN_1 +248 0x0050 //RX_FDDRC_BAND_MARGIN_2 +249 0x0080 //RX_FDDRC_BAND_MARGIN_3 +250 0x0007 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x5000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x6400 //RX_FDDRC_THRD_3_2 +258 0x6400 //RX_FDDRC_THRD_3_3 +259 0x2000 //RX_FDDRC_SLANT_0_0 +260 0x2000 //RX_FDDRC_SLANT_0_1 +261 0x2000 //RX_FDDRC_SLANT_0_2 +262 0x2000 //RX_FDDRC_SLANT_0_3 +263 0x5333 //RX_FDDRC_SLANT_1_0 +264 0x5333 //RX_FDDRC_SLANT_1_1 +265 0x5333 //RX_FDDRC_SLANT_1_2 +266 0x5333 //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +286 0x0013 //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 +#VOL 2 +163 0x3000 //RX_TDDRC_ALPHA_UP_1 +164 0x3000 //RX_TDDRC_ALPHA_UP_2 +165 0x3000 //RX_TDDRC_ALPHA_UP_3 +166 0x3000 //RX_TDDRC_ALPHA_UP_4 +184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +190 0x7FFF //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +269 0x0000 //RX_TDDRC_THRD_0 +270 0x0000 //RX_TDDRC_THRD_1 +271 0x2000 //RX_TDDRC_THRD_2 +272 0x3000 //RX_TDDRC_THRD_3 +273 0x0800 //RX_TDDRC_SLANT_0 +274 0x7EB8 //RX_TDDRC_SLANT_1 +275 0x3000 //RX_TDDRC_ALPHA_UP_0 +276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x199A //RX_TDDRC_HMNC_GAIN +279 0x0001 //RX_TDDRC_SMT_FLAG +280 0x0CCD //RX_TDDRC_SMT_W +281 0x0196 //RX_TDDRC_DRC_GAIN +195 0x001C //RX_FDEQ_SUBNUM +196 0x4848 //RX_FDEQ_GAIN_0 +197 0x4848 //RX_FDEQ_GAIN_1 +198 0x4848 //RX_FDEQ_GAIN_2 +199 0x4848 //RX_FDEQ_GAIN_3 +200 0x4848 //RX_FDEQ_GAIN_4 +201 0x4848 //RX_FDEQ_GAIN_5 +202 0x4848 //RX_FDEQ_GAIN_6 +203 0x4848 //RX_FDEQ_GAIN_7 +204 0x4848 //RX_FDEQ_GAIN_8 +205 0x4848 //RX_FDEQ_GAIN_9 +206 0x4848 //RX_FDEQ_GAIN_10 +207 0x4848 //RX_FDEQ_GAIN_11 +208 0x4848 //RX_FDEQ_GAIN_12 +209 0x4848 //RX_FDEQ_GAIN_13 +210 0x4848 //RX_FDEQ_GAIN_14 +211 0x4848 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0202 //RX_FDEQ_BIN_0 +221 0x0203 //RX_FDEQ_BIN_1 +222 0x0303 //RX_FDEQ_BIN_2 +223 0x0304 //RX_FDEQ_BIN_3 +224 0x0405 //RX_FDEQ_BIN_4 +225 0x0506 //RX_FDEQ_BIN_5 +226 0x0708 //RX_FDEQ_BIN_6 +227 0x090A //RX_FDEQ_BIN_7 +228 0x0B0C //RX_FDEQ_BIN_8 +229 0x0D0E //RX_FDEQ_BIN_9 +230 0x0E0F //RX_FDEQ_BIN_10 +231 0x0F10 //RX_FDEQ_BIN_11 +232 0x1011 //RX_FDEQ_BIN_12 +233 0x1104 //RX_FDEQ_BIN_13 +234 0x0000 //RX_FDEQ_BIN_14 +235 0x0000 //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x4000 //RX_FDEQ_RESRV_0 +245 0x0320 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0030 //RX_FDDRC_BAND_MARGIN_1 +248 0x0050 //RX_FDDRC_BAND_MARGIN_2 +249 0x0080 //RX_FDDRC_BAND_MARGIN_3 +250 0x0007 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x5000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x6400 //RX_FDDRC_THRD_3_2 +258 0x6400 //RX_FDDRC_THRD_3_3 +259 0x2000 //RX_FDDRC_SLANT_0_0 +260 0x2000 //RX_FDDRC_SLANT_0_1 +261 0x2000 //RX_FDDRC_SLANT_0_2 +262 0x2000 //RX_FDDRC_SLANT_0_3 +263 0x5333 //RX_FDDRC_SLANT_1_0 +264 0x5333 //RX_FDDRC_SLANT_1_1 +265 0x5333 //RX_FDDRC_SLANT_1_2 +266 0x5333 //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +286 0x0020 //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 +#VOL 3 +163 0x3000 //RX_TDDRC_ALPHA_UP_1 +164 0x3000 //RX_TDDRC_ALPHA_UP_2 +165 0x3000 //RX_TDDRC_ALPHA_UP_3 +166 0x3000 //RX_TDDRC_ALPHA_UP_4 +184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +190 0x7FFF //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +269 0x0000 //RX_TDDRC_THRD_0 +270 0x0000 //RX_TDDRC_THRD_1 +271 0x2000 //RX_TDDRC_THRD_2 +272 0x3000 //RX_TDDRC_THRD_3 +273 0x0800 //RX_TDDRC_SLANT_0 +274 0x7EB8 //RX_TDDRC_SLANT_1 +275 0x3000 //RX_TDDRC_ALPHA_UP_0 +276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x199A //RX_TDDRC_HMNC_GAIN +279 0x0001 //RX_TDDRC_SMT_FLAG +280 0x0CCD //RX_TDDRC_SMT_W +281 0x0196 //RX_TDDRC_DRC_GAIN +195 0x001C //RX_FDEQ_SUBNUM +196 0x4848 //RX_FDEQ_GAIN_0 +197 0x4848 //RX_FDEQ_GAIN_1 +198 0x4848 //RX_FDEQ_GAIN_2 +199 0x4848 //RX_FDEQ_GAIN_3 +200 0x4848 //RX_FDEQ_GAIN_4 +201 0x4848 //RX_FDEQ_GAIN_5 +202 0x4848 //RX_FDEQ_GAIN_6 +203 0x4848 //RX_FDEQ_GAIN_7 +204 0x4848 //RX_FDEQ_GAIN_8 +205 0x4848 //RX_FDEQ_GAIN_9 +206 0x4848 //RX_FDEQ_GAIN_10 +207 0x4848 //RX_FDEQ_GAIN_11 +208 0x4848 //RX_FDEQ_GAIN_12 +209 0x4848 //RX_FDEQ_GAIN_13 +210 0x4848 //RX_FDEQ_GAIN_14 +211 0x4848 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0202 //RX_FDEQ_BIN_0 +221 0x0203 //RX_FDEQ_BIN_1 +222 0x0303 //RX_FDEQ_BIN_2 +223 0x0304 //RX_FDEQ_BIN_3 +224 0x0405 //RX_FDEQ_BIN_4 +225 0x0506 //RX_FDEQ_BIN_5 +226 0x0708 //RX_FDEQ_BIN_6 +227 0x090A //RX_FDEQ_BIN_7 +228 0x0B0C //RX_FDEQ_BIN_8 +229 0x0D0E //RX_FDEQ_BIN_9 +230 0x0E0F //RX_FDEQ_BIN_10 +231 0x0F10 //RX_FDEQ_BIN_11 +232 0x1011 //RX_FDEQ_BIN_12 +233 0x1104 //RX_FDEQ_BIN_13 +234 0x0000 //RX_FDEQ_BIN_14 +235 0x0000 //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x4000 //RX_FDEQ_RESRV_0 +245 0x0320 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0030 //RX_FDDRC_BAND_MARGIN_1 +248 0x0050 //RX_FDDRC_BAND_MARGIN_2 +249 0x0080 //RX_FDDRC_BAND_MARGIN_3 +250 0x0007 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x5000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x6400 //RX_FDDRC_THRD_3_2 +258 0x6400 //RX_FDDRC_THRD_3_3 +259 0x2000 //RX_FDDRC_SLANT_0_0 +260 0x2000 //RX_FDDRC_SLANT_0_1 +261 0x2000 //RX_FDDRC_SLANT_0_2 +262 0x2000 //RX_FDDRC_SLANT_0_3 +263 0x5333 //RX_FDDRC_SLANT_1_0 +264 0x5333 //RX_FDDRC_SLANT_1_1 +265 0x5333 //RX_FDDRC_SLANT_1_2 +266 0x5333 //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +286 0x0036 //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 +#VOL 4 +163 0x3000 //RX_TDDRC_ALPHA_UP_1 +164 0x3000 //RX_TDDRC_ALPHA_UP_2 +165 0x3000 //RX_TDDRC_ALPHA_UP_3 +166 0x3000 //RX_TDDRC_ALPHA_UP_4 +184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +190 0x7FFF //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +269 0x0000 //RX_TDDRC_THRD_0 +270 0x0000 //RX_TDDRC_THRD_1 +271 0x2000 //RX_TDDRC_THRD_2 +272 0x3000 //RX_TDDRC_THRD_3 +273 0x0800 //RX_TDDRC_SLANT_0 +274 0x7EB8 //RX_TDDRC_SLANT_1 +275 0x3000 //RX_TDDRC_ALPHA_UP_0 +276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x199A //RX_TDDRC_HMNC_GAIN +279 0x0001 //RX_TDDRC_SMT_FLAG +280 0x0CCD //RX_TDDRC_SMT_W +281 0x0196 //RX_TDDRC_DRC_GAIN +195 0x001C //RX_FDEQ_SUBNUM +196 0x4848 //RX_FDEQ_GAIN_0 +197 0x4848 //RX_FDEQ_GAIN_1 +198 0x4848 //RX_FDEQ_GAIN_2 +199 0x4848 //RX_FDEQ_GAIN_3 +200 0x4848 //RX_FDEQ_GAIN_4 +201 0x4848 //RX_FDEQ_GAIN_5 +202 0x4848 //RX_FDEQ_GAIN_6 +203 0x4848 //RX_FDEQ_GAIN_7 +204 0x4848 //RX_FDEQ_GAIN_8 +205 0x4848 //RX_FDEQ_GAIN_9 +206 0x4848 //RX_FDEQ_GAIN_10 +207 0x4848 //RX_FDEQ_GAIN_11 +208 0x4848 //RX_FDEQ_GAIN_12 +209 0x4848 //RX_FDEQ_GAIN_13 +210 0x4848 //RX_FDEQ_GAIN_14 +211 0x4848 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0202 //RX_FDEQ_BIN_0 +221 0x0203 //RX_FDEQ_BIN_1 +222 0x0303 //RX_FDEQ_BIN_2 +223 0x0304 //RX_FDEQ_BIN_3 +224 0x0405 //RX_FDEQ_BIN_4 +225 0x0506 //RX_FDEQ_BIN_5 +226 0x0708 //RX_FDEQ_BIN_6 +227 0x090A //RX_FDEQ_BIN_7 +228 0x0B0C //RX_FDEQ_BIN_8 +229 0x0D0E //RX_FDEQ_BIN_9 +230 0x0E0F //RX_FDEQ_BIN_10 +231 0x0F10 //RX_FDEQ_BIN_11 +232 0x1011 //RX_FDEQ_BIN_12 +233 0x1104 //RX_FDEQ_BIN_13 +234 0x0000 //RX_FDEQ_BIN_14 +235 0x0000 //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x4000 //RX_FDEQ_RESRV_0 +245 0x0320 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0030 //RX_FDDRC_BAND_MARGIN_1 +248 0x0050 //RX_FDDRC_BAND_MARGIN_2 +249 0x0080 //RX_FDDRC_BAND_MARGIN_3 +250 0x0007 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x5000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x6400 //RX_FDDRC_THRD_3_2 +258 0x6400 //RX_FDDRC_THRD_3_3 +259 0x2000 //RX_FDDRC_SLANT_0_0 +260 0x2000 //RX_FDDRC_SLANT_0_1 +261 0x2000 //RX_FDDRC_SLANT_0_2 +262 0x2000 //RX_FDDRC_SLANT_0_3 +263 0x5333 //RX_FDDRC_SLANT_1_0 +264 0x5333 //RX_FDDRC_SLANT_1_1 +265 0x5333 //RX_FDDRC_SLANT_1_2 +266 0x5333 //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +286 0x005B //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 +#VOL 5 +163 0x3000 //RX_TDDRC_ALPHA_UP_1 +164 0x3000 //RX_TDDRC_ALPHA_UP_2 +165 0x3000 //RX_TDDRC_ALPHA_UP_3 +166 0x3000 //RX_TDDRC_ALPHA_UP_4 +184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +190 0x7FFF //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +269 0x0000 //RX_TDDRC_THRD_0 +270 0x0000 //RX_TDDRC_THRD_1 +271 0x2000 //RX_TDDRC_THRD_2 +272 0x3000 //RX_TDDRC_THRD_3 +273 0x0800 //RX_TDDRC_SLANT_0 +274 0x7EB8 //RX_TDDRC_SLANT_1 +275 0x3000 //RX_TDDRC_ALPHA_UP_0 +276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x199A //RX_TDDRC_HMNC_GAIN +279 0x0001 //RX_TDDRC_SMT_FLAG +280 0x0CCD //RX_TDDRC_SMT_W +281 0x0196 //RX_TDDRC_DRC_GAIN +195 0x001C //RX_FDEQ_SUBNUM +196 0x4848 //RX_FDEQ_GAIN_0 +197 0x4848 //RX_FDEQ_GAIN_1 +198 0x4848 //RX_FDEQ_GAIN_2 +199 0x4848 //RX_FDEQ_GAIN_3 +200 0x4848 //RX_FDEQ_GAIN_4 +201 0x4848 //RX_FDEQ_GAIN_5 +202 0x4848 //RX_FDEQ_GAIN_6 +203 0x4848 //RX_FDEQ_GAIN_7 +204 0x4848 //RX_FDEQ_GAIN_8 +205 0x4848 //RX_FDEQ_GAIN_9 +206 0x4848 //RX_FDEQ_GAIN_10 +207 0x4848 //RX_FDEQ_GAIN_11 +208 0x4848 //RX_FDEQ_GAIN_12 +209 0x4848 //RX_FDEQ_GAIN_13 +210 0x4848 //RX_FDEQ_GAIN_14 +211 0x4848 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0202 //RX_FDEQ_BIN_0 +221 0x0203 //RX_FDEQ_BIN_1 +222 0x0303 //RX_FDEQ_BIN_2 +223 0x0304 //RX_FDEQ_BIN_3 +224 0x0405 //RX_FDEQ_BIN_4 +225 0x0506 //RX_FDEQ_BIN_5 +226 0x0708 //RX_FDEQ_BIN_6 +227 0x090A //RX_FDEQ_BIN_7 +228 0x0B0C //RX_FDEQ_BIN_8 +229 0x0D0E //RX_FDEQ_BIN_9 +230 0x0E0F //RX_FDEQ_BIN_10 +231 0x0F10 //RX_FDEQ_BIN_11 +232 0x1011 //RX_FDEQ_BIN_12 +233 0x1104 //RX_FDEQ_BIN_13 +234 0x0000 //RX_FDEQ_BIN_14 +235 0x0000 //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x4000 //RX_FDEQ_RESRV_0 +245 0x0320 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0030 //RX_FDDRC_BAND_MARGIN_1 +248 0x0050 //RX_FDDRC_BAND_MARGIN_2 +249 0x0080 //RX_FDDRC_BAND_MARGIN_3 +250 0x0007 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x5000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x6400 //RX_FDDRC_THRD_3_2 +258 0x6400 //RX_FDDRC_THRD_3_3 +259 0x2000 //RX_FDDRC_SLANT_0_0 +260 0x2000 //RX_FDDRC_SLANT_0_1 +261 0x2000 //RX_FDDRC_SLANT_0_2 +262 0x2000 //RX_FDDRC_SLANT_0_3 +263 0x5333 //RX_FDDRC_SLANT_1_0 +264 0x5333 //RX_FDDRC_SLANT_1_1 +265 0x5333 //RX_FDDRC_SLANT_1_2 +266 0x5333 //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +286 0x0099 //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 +#VOL 6 +163 0x3000 //RX_TDDRC_ALPHA_UP_1 +164 0x3000 //RX_TDDRC_ALPHA_UP_2 +165 0x3000 //RX_TDDRC_ALPHA_UP_3 +166 0x3000 //RX_TDDRC_ALPHA_UP_4 +184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +190 0x7FFF //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +269 0x0000 //RX_TDDRC_THRD_0 +270 0x0000 //RX_TDDRC_THRD_1 +271 0x2000 //RX_TDDRC_THRD_2 +272 0x3000 //RX_TDDRC_THRD_3 +273 0x0800 //RX_TDDRC_SLANT_0 +274 0x7EB8 //RX_TDDRC_SLANT_1 +275 0x3000 //RX_TDDRC_ALPHA_UP_0 +276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x199A //RX_TDDRC_HMNC_GAIN +279 0x0001 //RX_TDDRC_SMT_FLAG +280 0x0CCD //RX_TDDRC_SMT_W +281 0x0196 //RX_TDDRC_DRC_GAIN +195 0x001C //RX_FDEQ_SUBNUM +196 0x4848 //RX_FDEQ_GAIN_0 +197 0x4848 //RX_FDEQ_GAIN_1 +198 0x4848 //RX_FDEQ_GAIN_2 +199 0x4848 //RX_FDEQ_GAIN_3 +200 0x4848 //RX_FDEQ_GAIN_4 +201 0x4848 //RX_FDEQ_GAIN_5 +202 0x4848 //RX_FDEQ_GAIN_6 +203 0x4848 //RX_FDEQ_GAIN_7 +204 0x4848 //RX_FDEQ_GAIN_8 +205 0x4848 //RX_FDEQ_GAIN_9 +206 0x4848 //RX_FDEQ_GAIN_10 +207 0x4848 //RX_FDEQ_GAIN_11 +208 0x4848 //RX_FDEQ_GAIN_12 +209 0x4848 //RX_FDEQ_GAIN_13 +210 0x4848 //RX_FDEQ_GAIN_14 +211 0x4848 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0202 //RX_FDEQ_BIN_0 +221 0x0203 //RX_FDEQ_BIN_1 +222 0x0303 //RX_FDEQ_BIN_2 +223 0x0304 //RX_FDEQ_BIN_3 +224 0x0405 //RX_FDEQ_BIN_4 +225 0x0506 //RX_FDEQ_BIN_5 +226 0x0708 //RX_FDEQ_BIN_6 +227 0x090A //RX_FDEQ_BIN_7 +228 0x0B0C //RX_FDEQ_BIN_8 +229 0x0D0E //RX_FDEQ_BIN_9 +230 0x0E0F //RX_FDEQ_BIN_10 +231 0x0F10 //RX_FDEQ_BIN_11 +232 0x1011 //RX_FDEQ_BIN_12 +233 0x1104 //RX_FDEQ_BIN_13 +234 0x0000 //RX_FDEQ_BIN_14 +235 0x0000 //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x4000 //RX_FDEQ_RESRV_0 +245 0x0320 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0030 //RX_FDDRC_BAND_MARGIN_1 +248 0x0050 //RX_FDDRC_BAND_MARGIN_2 +249 0x0080 //RX_FDDRC_BAND_MARGIN_3 +250 0x0007 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x5000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x6400 //RX_FDDRC_THRD_3_2 +258 0x6400 //RX_FDDRC_THRD_3_3 +259 0x2000 //RX_FDDRC_SLANT_0_0 +260 0x2000 //RX_FDDRC_SLANT_0_1 +261 0x2000 //RX_FDDRC_SLANT_0_2 +262 0x2000 //RX_FDDRC_SLANT_0_3 +263 0x5333 //RX_FDDRC_SLANT_1_0 +264 0x5333 //RX_FDDRC_SLANT_1_1 +265 0x5333 //RX_FDDRC_SLANT_1_2 +266 0x5333 //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +286 0x0100 //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 #CASE_NAME HEADSET-GOOGLE_CONDOR_HEADPHONE-VOICE_GENERIC-SWB -#PARAM_MODE FULL -#PARAM_TYPE TX+RX -#TOTAL_CUSTOM_STEP 7 +#PARAM_MODE Full +#PARAM_TYPE TX+2RX +#TOTAL_CUSTOM_STEP 7+7 #TX 0 0x0001 //TX_OPERATION_MODE_0 1 0x0001 //TX_OPERATION_MODE_1 2 0x0033 //TX_PATCH_REG -3 0x2F7C //TX_SENDFUNC_MODE_0 +3 0x6F7C //TX_SENDFUNC_MODE_0 4 0x0001 //TX_SENDFUNC_MODE_1 -5 0x0003 //TX_NUM_MIC +5 0x0002 //TX_NUM_MIC 6 0x0003 //TX_SAMPLINGFREQ_SIG 7 0x0003 //TX_SAMPLINGFREQ_PROC 8 0x000A //TX_FRAME_SZ_SIG @@ -24585,8 +37409,8 @@ 18 0x0000 //TX_SYS_RESRV_2 19 0x0000 //TX_SYS_RESRV_3 20 0x0000 //TX_DIST2REF0 -21 0x00A4 //TX_DIST2REF1 -22 0x0017 //TX_DIST2REF_02 +21 0x009D //TX_DIST2REF1 +22 0x0010 //TX_DIST2REF_02 23 0x0000 //TX_DIST2REF_03 24 0x0000 //TX_DIST2REF_04 25 0x0000 //TX_DIST2REF_05 @@ -24692,7 +37516,7 @@ 125 0x6000 //TX_C_POST_FLT_MIC_MAINBLK 126 0x6000 //TX_C_POST_FLT_MIC_REFBLK 127 0x0010 //TX_MIC_BLOCK_N -128 0x7B02 //TX_A_HP +128 0x7D83 //TX_A_HP 129 0x4000 //TX_B_PE 130 0x5000 //TX_THR_PITCH_DET_0 131 0x4800 //TX_THR_PITCH_DET_1 @@ -24729,8 +37553,8 @@ 162 0x7800 //TX_MIN_EQ_RE_EST_10 163 0x7800 //TX_MIN_EQ_RE_EST_11 164 0x7800 //TX_MIN_EQ_RE_EST_12 -165 0x4000 //TX_LAMBDA_RE_EST -166 0x3000 //TX_LAMBDA_CB_NLE +165 0x0880 //TX_LAMBDA_RE_EST +166 0x7FFF //TX_LAMBDA_CB_NLE 167 0x7FFF //TX_C_POST_FLT 168 0x4000 //TX_GAIN_NP 169 0x0180 //TX_SE_HOLD_N @@ -24789,16 +37613,16 @@ 222 0x023E //TX_ADPT_STRICT_H 223 0x0BB8 //TX_RATIO_DT_L_TH_LOW 224 0x3A98 //TX_RATIO_DT_H_TH_LOW -225 0x1F40 //TX_RATIO_DT_L_TH_HIGH -226 0x6590 //TX_RATIO_DT_H_TH_HIGH +225 0x1770 //TX_RATIO_DT_L_TH_HIGH +226 0x733C //TX_RATIO_DT_H_TH_HIGH 227 0x09C4 //TX_RATIO_DT_L0_TH -228 0x2000 //TX_B_POST_FILT_ECHO_L -229 0x1000 //TX_B_POST_FILT_ECHO_H +228 0x7FFF //TX_B_POST_FILT_ECHO_L +229 0x7FFF //TX_B_POST_FILT_ECHO_H 230 0x0200 //TX_MIN_G_CTRL_ECHO 231 0x1000 //TX_B_LESSCUT_RTO_ECHO 232 0x0000 //TX_EPD_OFFSET_00 233 0x0000 //TX_EPD_OFFST_01 -234 0x2328 //TX_RATIO_DT_L0_TH_HIGH +234 0x3A98 //TX_RATIO_DT_L0_TH_HIGH 235 0x7FFF //TX_RATIO_DT_H_TH_CUT 236 0x7FFF //TX_MIN_EQ_RE_EST_13 237 0x0000 //TX_DTD_THR1_7 @@ -24806,7 +37630,7 @@ 239 0x0800 //TX_DT_RESRV_7 240 0x0800 //TX_DT_RESRV_8 241 0x0000 //TX_DT_RESRV_9 -242 0xF800 //TX_THR_SN_EST_0 +242 0xFA00 //TX_THR_SN_EST_0 243 0xFA00 //TX_THR_SN_EST_1 244 0xFA00 //TX_THR_SN_EST_2 245 0xFA00 //TX_THR_SN_EST_3 @@ -24817,10 +37641,10 @@ 250 0x0100 //TX_DELTA_THR_SN_EST_0 251 0x0100 //TX_DELTA_THR_SN_EST_1 252 0x0100 //TX_DELTA_THR_SN_EST_2 -253 0x0100 //TX_DELTA_THR_SN_EST_3 -254 0x0000 //TX_DELTA_THR_SN_EST_4 -255 0x0100 //TX_DELTA_THR_SN_EST_5 -256 0x0200 //TX_DELTA_THR_SN_EST_6 +253 0x0000 //TX_DELTA_THR_SN_EST_3 +254 0x0100 //TX_DELTA_THR_SN_EST_4 +255 0x0200 //TX_DELTA_THR_SN_EST_5 +256 0x0100 //TX_DELTA_THR_SN_EST_6 257 0x0200 //TX_DELTA_THR_SN_EST_7 258 0x4000 //TX_LAMBDA_NN_EST_0 259 0x4000 //TX_LAMBDA_NN_EST_1 @@ -24847,11 +37671,11 @@ 280 0x1000 //TX_B_POST_FLT_1 281 0x0010 //TX_NS_LVL_CTRL_0 282 0x003C //TX_NS_LVL_CTRL_1 -283 0x003C //TX_NS_LVL_CTRL_2 -284 0x0024 //TX_NS_LVL_CTRL_3 -285 0x003C //TX_NS_LVL_CTRL_4 -286 0x0014 //TX_NS_LVL_CTRL_5 -287 0x0011 //TX_NS_LVL_CTRL_6 +283 0x0024 //TX_NS_LVL_CTRL_2 +284 0x003C //TX_NS_LVL_CTRL_3 +285 0x0014 //TX_NS_LVL_CTRL_4 +286 0x0011 //TX_NS_LVL_CTRL_5 +287 0x003C //TX_NS_LVL_CTRL_6 288 0x0011 //TX_NS_LVL_CTRL_7 289 0x000F //TX_MIN_GAIN_S_0 290 0x0010 //TX_MIN_GAIN_S_1 @@ -24867,10 +37691,10 @@ 300 0x7FFF //TX_SNRI_SUP_0 301 0x1400 //TX_SNRI_SUP_1 302 0x1400 //TX_SNRI_SUP_2 -303 0x1400 //TX_SNRI_SUP_3 +303 0x4000 //TX_SNRI_SUP_3 304 0x4000 //TX_SNRI_SUP_4 -305 0x4000 //TX_SNRI_SUP_5 -306 0x50C0 //TX_SNRI_SUP_6 +305 0x50C0 //TX_SNRI_SUP_5 +306 0x1400 //TX_SNRI_SUP_6 307 0x7FFF //TX_SNRI_SUP_7 308 0x7FFF //TX_THR_LFNS 309 0x0018 //TX_G_LFNS @@ -24879,19 +37703,19 @@ 312 0x7FFF //TX_A_POST_FILT_0 313 0x2000 //TX_A_POST_FILT_1 314 0x5000 //TX_A_POST_FILT_S_0 -315 0x7C00 //TX_A_POST_FILT_S_1 -316 0x4C00 //TX_A_POST_FILT_S_2 -317 0x4000 //TX_A_POST_FILT_S_3 -318 0x6000 //TX_A_POST_FILT_S_4 -319 0x4000 //TX_A_POST_FILT_S_5 -320 0x5000 //TX_A_POST_FILT_S_6 +315 0x4C00 //TX_A_POST_FILT_S_1 +316 0x4000 //TX_A_POST_FILT_S_2 +317 0x6000 //TX_A_POST_FILT_S_3 +318 0x4000 //TX_A_POST_FILT_S_4 +319 0x5000 //TX_A_POST_FILT_S_5 +320 0x7C00 //TX_A_POST_FILT_S_6 321 0x7000 //TX_A_POST_FILT_S_7 322 0x2000 //TX_B_POST_FILT_0 -323 0x1000 //TX_B_POST_FILT_1 +323 0x6000 //TX_B_POST_FILT_1 324 0x6000 //TX_B_POST_FILT_2 325 0x6000 //TX_B_POST_FILT_3 -326 0x6000 //TX_B_POST_FILT_4 -327 0x4000 //TX_B_POST_FILT_5 +326 0x4000 //TX_B_POST_FILT_4 +327 0x1000 //TX_B_POST_FILT_5 328 0x1000 //TX_B_POST_FILT_6 329 0x2000 //TX_B_POST_FILT_7 330 0x4000 //TX_B_LESSCUT_RTO_S_0 @@ -24899,8 +37723,8 @@ 332 0x7FFF //TX_B_LESSCUT_RTO_S_2 333 0x7FFF //TX_B_LESSCUT_RTO_S_3 334 0x7FFF //TX_B_LESSCUT_RTO_S_4 -335 0x7FFF //TX_B_LESSCUT_RTO_S_5 -336 0x6000 //TX_B_LESSCUT_RTO_S_6 +335 0x6000 //TX_B_LESSCUT_RTO_S_5 +336 0x7FFF //TX_B_LESSCUT_RTO_S_6 337 0x7FFF //TX_B_LESSCUT_RTO_S_7 338 0x7C00 //TX_LAMBDA_PFILT 339 0x7D00 //TX_LAMBDA_PFILT_S_0 @@ -24931,7 +37755,7 @@ 364 0x0000 //TX_K_APT 365 0x0001 //TX_NOISEDET 366 0x0064 //TX_NDETCT -367 0x0050 //TX_NOISE_TH_0 +367 0x0383 //TX_NOISE_TH_0 368 0x7FFF //TX_NOISE_TH_0_2 369 0x7FFF //TX_NOISE_TH_0_3 370 0x07D0 //TX_NOISE_TH_1 @@ -24943,11 +37767,11 @@ 376 0x0000 //TX_NOISE_TH_5_3 377 0x7FFF //TX_NOISE_TH_5_4 378 0x0DAC //TX_NOISE_TH_6 -379 0x0050 //TX_MINENOISE_TH -380 0x4000 //TX_MINENOISE_MIC0_TH_MTS -381 0xFFEE //TX_MINENOISE_MIC0_TH_EXP -382 0x6000 //TX_MINENOISE_MIC0_S_TH_MTS -383 0xFFF3 //TX_MINENOISE_MIC0_S_TH_EXP +379 0x044C //TX_MINENOISE_TH +380 0xD508 //TX_MORENS_TFMASK_TH +381 0x0001 //TX_DRC_QUIET_FLOOR +382 0x3A98 //TX_RATIODTL_CUT_TH +383 0x0DAC //TX_DT_CUT_K1 384 0x0666 //TX_OUT_ENER_S_TH_CLEAN 385 0x0666 //TX_OUT_ENER_S_TH_LESSCLEAN 386 0x0333 //TX_OUT_ENER_S_TH_NOISY @@ -24955,22 +37779,22 @@ 388 0x0333 //TX_OUT_ENER_TH_SPEECH 389 0x2000 //TX_SN_NPB_GAIN 390 0x0000 //TX_NN_NPB_GAIN -391 0x0000 //TX_CSX_ALPHA_0 -392 0x0000 //TX_CSX_ALPHA_1 -393 0x0000 //TX_CSX_ALPHA_2 -394 0x0000 //TX_CSX_ALPHA_3 -395 0x0800 //TX_MU_ARSP_EST -396 0x00C8 //TX_P_OUTBEAM_MIN_TH +391 0x7FFF //TX_POST_MASK_SUP_HSNE +392 0x1388 //TX_TAIL_DET_TH +393 0x4000 //TX_B_LESSCUT_RTO_WTA +394 0x0000 //TX_MEL_G_R +395 0x0080 //TX_SUPHIGH_TH +396 0x0000 //TX_MASK_G_R 397 0x0002 //TX_EXTRA_NS_L -398 0x0800 //TX_EXTRA_NS_A -399 0x0005 //TX_VR_NOISE_FLOOR_TH +398 0x1800 //TX_C_POST_FLT_MASK +399 0x7FFF //TX_A_POST_FLT_WNS 400 0x0148 //TX_MIN_G_LOW300HZ -401 0x0001 //TX_MAXLEVEL_CNG +401 0x0004 //TX_MAXLEVEL_CNG 402 0x00B4 //TX_STN_NOISE_TH 403 0x4000 //TX_POST_MASK_SUP 404 0x7FFF //TX_POST_MASK_ADJUST 405 0x00C8 //TX_NS_ENOISE_MIC0_TH -406 0x0050 //TX_MINENOISE_MIC0_TH +406 0x02F3 //TX_MINENOISE_MIC0_TH 407 0x012C //TX_MINENOISE_MIC0_S_TH 408 0x4000 //TX_MIN_G_CTRL_SSNS 409 0x0000 //TX_METAL_RTO_THR @@ -25078,16 +37902,16 @@ 511 0x6666 //TX_MIC_TO_BFGAIN 512 0x0000 //TX_MICTOBFGAIN0 513 0x0000 //TX_FASTMUE_TH -514 0x0000 //TX_DERVB_LEN_0 -515 0x0000 //TX_DERVB_LEN_1 -516 0x0000 //TX_RHO_DERVB -517 0x0000 //TX_MIC_INDX_DERVB -518 0x0000 //TX_MU_DERVB -519 0x0000 //TX_DR_RESRV_0 -520 0x0000 //TX_DR_RESRV_1 -521 0x0000 //TX_DR_RESRV_2 -522 0x0000 //TX_DR_RESRV_3 -523 0x0000 //TX_DR_RESRV_4 +514 0xC000 //TX_DEREVERB_LF_MU +515 0xC000 //TX_DEREVERB_HF_MU +516 0xCCCC //TX_DEREVERB_DELAY +517 0xD999 //TX_DEREVERB_COEF_LEN +518 0x1F40 //TX_DEREVERB_DNR +519 0x0000 //TX_DEREVERB_ALPHA +520 0x0000 //TX_DEREVERB_BETA +521 0x0000 //TX_GSC_RTOL_TH +522 0x7000 //TX_GSC_RTOH_TH +523 0x0064 //TX_WIDE2_MEANHTH 524 0x0000 //TX_DR_RESRV_5 525 0x0000 //TX_DR_RESRV_6 526 0x0000 //TX_DR_RESRV_7 @@ -25131,22 +37955,22 @@ 564 0x0000 //TX_PB_RESRV_0 565 0x0000 //TX_PB_RESRV_1 566 0x0020 //TX_FDEQ_SUBNUM -567 0x4848 //TX_FDEQ_GAIN_0 -568 0x4848 //TX_FDEQ_GAIN_1 +567 0x5450 //TX_FDEQ_GAIN_0 +568 0x4C48 //TX_FDEQ_GAIN_1 569 0x4850 //TX_FDEQ_GAIN_2 570 0x5050 //TX_FDEQ_GAIN_3 571 0x4848 //TX_FDEQ_GAIN_4 -572 0x484A //TX_FDEQ_GAIN_5 +572 0x484E //TX_FDEQ_GAIN_5 573 0x4E5E //TX_FDEQ_GAIN_6 -574 0x5C4C //TX_FDEQ_GAIN_7 +574 0x584E //TX_FDEQ_GAIN_7 575 0x4C4E //TX_FDEQ_GAIN_8 -576 0x4844 //TX_FDEQ_GAIN_9 -577 0x4448 //TX_FDEQ_GAIN_10 -578 0x4850 //TX_FDEQ_GAIN_11 -579 0x5C6A //TX_FDEQ_GAIN_12 -580 0x5A84 //TX_FDEQ_GAIN_13 -581 0x7880 //TX_FDEQ_GAIN_14 -582 0x7F7F //TX_FDEQ_GAIN_15 +576 0x564E //TX_FDEQ_GAIN_9 +577 0x5058 //TX_FDEQ_GAIN_10 +578 0x625C //TX_FDEQ_GAIN_11 +579 0x6C6C //TX_FDEQ_GAIN_12 +580 0x7086 //TX_FDEQ_GAIN_13 +581 0x869C //TX_FDEQ_GAIN_14 +582 0xB0B0 //TX_FDEQ_GAIN_15 583 0x4848 //TX_FDEQ_GAIN_16 584 0x4848 //TX_FDEQ_GAIN_17 585 0x4848 //TX_FDEQ_GAIN_18 @@ -25170,7 +37994,7 @@ 603 0x1B1E //TX_FDEQ_BIN_12 604 0x1E1E //TX_FDEQ_BIN_13 605 0x1E28 //TX_FDEQ_BIN_14 -606 0x282C //TX_FDEQ_BIN_15 +606 0x284A //TX_FDEQ_BIN_15 607 0x0000 //TX_FDEQ_BIN_16 608 0x0000 //TX_FDEQ_BIN_17 609 0x0000 //TX_FDEQ_BIN_18 @@ -25188,15 +38012,15 @@ 621 0x4848 //TX_PREEQ_GAIN_MIC0_4 622 0x4848 //TX_PREEQ_GAIN_MIC0_5 623 0x4848 //TX_PREEQ_GAIN_MIC0_6 -624 0x484A //TX_PREEQ_GAIN_MIC0_7 -625 0x4C4E //TX_PREEQ_GAIN_MIC0_8 -626 0x5054 //TX_PREEQ_GAIN_MIC0_9 -627 0x5658 //TX_PREEQ_GAIN_MIC0_10 -628 0x5C5C //TX_PREEQ_GAIN_MIC0_11 -629 0x6474 //TX_PREEQ_GAIN_MIC0_12 -630 0x7870 //TX_PREEQ_GAIN_MIC0_13 -631 0x5C48 //TX_PREEQ_GAIN_MIC0_14 -632 0x383C //TX_PREEQ_GAIN_MIC0_15 +624 0x4848 //TX_PREEQ_GAIN_MIC0_7 +625 0x494A //TX_PREEQ_GAIN_MIC0_8 +626 0x4B4C //TX_PREEQ_GAIN_MIC0_9 +627 0x4B4A //TX_PREEQ_GAIN_MIC0_10 +628 0x484B //TX_PREEQ_GAIN_MIC0_11 +629 0x4C4C //TX_PREEQ_GAIN_MIC0_12 +630 0x4B48 //TX_PREEQ_GAIN_MIC0_13 +631 0x3838 //TX_PREEQ_GAIN_MIC0_14 +632 0x3835 //TX_PREEQ_GAIN_MIC0_15 633 0x4848 //TX_PREEQ_GAIN_MIC0_16 634 0x4848 //TX_PREEQ_GAIN_MIC0_17 635 0x4848 //TX_PREEQ_GAIN_MIC0_18 @@ -25237,15 +38061,15 @@ 670 0x4848 //TX_PREEQ_GAIN_MIC1_4 671 0x4848 //TX_PREEQ_GAIN_MIC1_5 672 0x4848 //TX_PREEQ_GAIN_MIC1_6 -673 0x4848 //TX_PREEQ_GAIN_MIC1_7 -674 0x4848 //TX_PREEQ_GAIN_MIC1_8 -675 0x4848 //TX_PREEQ_GAIN_MIC1_9 -676 0x4848 //TX_PREEQ_GAIN_MIC1_10 -677 0x4848 //TX_PREEQ_GAIN_MIC1_11 -678 0x4848 //TX_PREEQ_GAIN_MIC1_12 -679 0x4848 //TX_PREEQ_GAIN_MIC1_13 -680 0x4848 //TX_PREEQ_GAIN_MIC1_14 -681 0x4848 //TX_PREEQ_GAIN_MIC1_15 +673 0x4846 //TX_PREEQ_GAIN_MIC1_7 +674 0x4544 //TX_PREEQ_GAIN_MIC1_8 +675 0x4241 //TX_PREEQ_GAIN_MIC1_9 +676 0x403E //TX_PREEQ_GAIN_MIC1_10 +677 0x3D3C //TX_PREEQ_GAIN_MIC1_11 +678 0x3C3C //TX_PREEQ_GAIN_MIC1_12 +679 0x3C39 //TX_PREEQ_GAIN_MIC1_13 +680 0x3838 //TX_PREEQ_GAIN_MIC1_14 +681 0x3A3C //TX_PREEQ_GAIN_MIC1_15 682 0x4848 //TX_PREEQ_GAIN_MIC1_16 683 0x4848 //TX_PREEQ_GAIN_MIC1_17 684 0x4848 //TX_PREEQ_GAIN_MIC1_18 @@ -25254,22 +38078,22 @@ 687 0x4848 //TX_PREEQ_GAIN_MIC1_21 688 0x4848 //TX_PREEQ_GAIN_MIC1_22 689 0x4848 //TX_PREEQ_GAIN_MIC1_23 -690 0x251A //TX_PREEQ_BIN_MIC1_0 -691 0x0F0F //TX_PREEQ_BIN_MIC1_1 -692 0x0C0C //TX_PREEQ_BIN_MIC1_2 -693 0x0C0F //TX_PREEQ_BIN_MIC1_3 -694 0x0F0F //TX_PREEQ_BIN_MIC1_4 -695 0x0F09 //TX_PREEQ_BIN_MIC1_5 -696 0x0909 //TX_PREEQ_BIN_MIC1_6 -697 0x0908 //TX_PREEQ_BIN_MIC1_7 -698 0x070F //TX_PREEQ_BIN_MIC1_8 -699 0x1F08 //TX_PREEQ_BIN_MIC1_9 -700 0x0808 //TX_PREEQ_BIN_MIC1_10 -701 0x0920 //TX_PREEQ_BIN_MIC1_11 -702 0x2020 //TX_PREEQ_BIN_MIC1_12 -703 0x2021 //TX_PREEQ_BIN_MIC1_13 -704 0x0000 //TX_PREEQ_BIN_MIC1_14 -705 0x0000 //TX_PREEQ_BIN_MIC1_15 +690 0x0202 //TX_PREEQ_BIN_MIC1_0 +691 0x0203 //TX_PREEQ_BIN_MIC1_1 +692 0x0303 //TX_PREEQ_BIN_MIC1_2 +693 0x0304 //TX_PREEQ_BIN_MIC1_3 +694 0x0405 //TX_PREEQ_BIN_MIC1_4 +695 0x0506 //TX_PREEQ_BIN_MIC1_5 +696 0x0708 //TX_PREEQ_BIN_MIC1_6 +697 0x090A //TX_PREEQ_BIN_MIC1_7 +698 0x0B0C //TX_PREEQ_BIN_MIC1_8 +699 0x0D0E //TX_PREEQ_BIN_MIC1_9 +700 0x1013 //TX_PREEQ_BIN_MIC1_10 +701 0x1719 //TX_PREEQ_BIN_MIC1_11 +702 0x1B1E //TX_PREEQ_BIN_MIC1_12 +703 0x1E1E //TX_PREEQ_BIN_MIC1_13 +704 0x1E28 //TX_PREEQ_BIN_MIC1_14 +705 0x282C //TX_PREEQ_BIN_MIC1_15 706 0x0000 //TX_PREEQ_BIN_MIC1_16 707 0x0000 //TX_PREEQ_BIN_MIC1_17 708 0x0000 //TX_PREEQ_BIN_MIC1_18 @@ -25355,7 +38179,7 @@ 788 0x7EB8 //TX_TDDRC_ALPHA_DWN_02 789 0x7EB8 //TX_TDDRC_ALPHA_DWN_03 790 0x7EB8 //TX_TDDRC_ALPHA_DWN_04 -791 0x7FFF //TX_TDDRC_TD_DRC_LIMIT +791 0x7214 //TX_TDDRC_TD_DRC_LIMIT 792 0x0800 //TX_TDDRC_POST_LIMIT_GAIN 793 0x0000 //TX_TDDRC_RESRV_0 794 0x0000 //TX_TDDRC_RESRV_1 @@ -25418,12 +38242,12 @@ 851 0x0000 //TX_FFP_RESRV_5 852 0x0000 //TX_FFP_RESRV_6 853 0x0002 //TX_FILTINDX -854 0x0001 //TX_TDDRC_THRD_0 -855 0x0002 //TX_TDDRC_THRD_1 -856 0x1000 //TX_TDDRC_THRD_2 -857 0x1000 //TX_TDDRC_THRD_3 -858 0x6000 //TX_TDDRC_SLANT_0 -859 0x6000 //TX_TDDRC_SLANT_1 +854 0x0003 //TX_TDDRC_THRD_0 +855 0x0004 //TX_TDDRC_THRD_1 +856 0x1800 //TX_TDDRC_THRD_2 +857 0x1800 //TX_TDDRC_THRD_3 +858 0x7FFF //TX_TDDRC_SLANT_0 +859 0x7FFF //TX_TDDRC_SLANT_1 860 0x0800 //TX_TDDRC_ALPHA_UP_00 861 0x7EB8 //TX_TDDRC_ALPHA_DWN_00 862 0x0000 //TX_TDDRC_HMNC_FLAG @@ -25453,7 +38277,7 @@ 886 0x0CCD //TX_FASTNS_TFMASKBIN_TH2 887 0x0CCD //TX_FASTNS_TFMASKBIN_TH3 888 0x00C8 //TX_FASTNS_ARSPC_TH -889 0xC000 //TX_FASTNS_MASK5_TH +889 0x8000 //TX_FASTNS_MASK5_TH 890 0x4848 //TX_POSTSSA_MIN_G_VR_MASK 891 0x4000 //TX_A_LESSCUT_RTO_MASK 892 0x1770 //TX_FASTNS_NOISETH @@ -25461,8 +38285,73 @@ 894 0xC000 //TX_FASTNS_SSA_THHFL 895 0xCCCC //TX_FASTNS_SSA_THLFH 896 0xD999 //TX_FASTNS_SSA_THHFH +897 0x2339 //TX_SENDFUNC_REG_MICMUTE +898 0x0021 //TX_SENDFUNC_REG_MICMUTE1 +899 0x02BC //TX_MICMUTE_RATIO_THR +900 0x0140 //TX_MICMUTE_AMP_THR +901 0x0004 //TX_MICMUTE_HPF_IND +902 0x00C0 //TX_MICMUTE_LOG_EYR_TH +903 0x0008 //TX_MICMUTE_CVG_TIME +904 0x0008 //TX_MICMUTE_RELEASE_TIME +905 0x01FE //TX_MIC_VOLUME_MIC0MUTE +906 0x0020 //TX_MICMUTE_EPD_OFFSET_0 +907 0x001E //TX_MICMUTE_FRQ_AEC_L +908 0x7999 //TX_MICMUTE_EAD_THR +909 0x7FFF //TX_MICMUTE_LAMBDA_CB_NLE +910 0x7FFF //TX_MICMUTE_LAMBDA_RE_EST +911 0x4000 //TX_DTD_THR1_MICMUTE_0 +912 0x7000 //TX_DTD_THR1_MICMUTE_1 +913 0x7FFF //TX_DTD_THR1_MICMUTE_2 +914 0x7FFF //TX_DTD_THR1_MICMUTE_3 +915 0x6CCC //TX_DTD_THR2_MICMUTE_0 +916 0x0400 //TX_MICMUTE_MIN_EQ_RE_EST_0 +917 0x0400 //TX_MICMUTE_MIN_EQ_RE_EST_1 +918 0x1000 //TX_MICMUTE_MIN_EQ_RE_EST_2 +919 0x7FFF //TX_MICMUTE_MIN_EQ_RE_EST_3 +920 0x7FFF //TX_MICMUTE_MIN_EQ_RE_EST_4 +921 0x4000 //TX_MICMUTE_C_POST_FLT +922 0x03E8 //TX_MICMUTE_DT_CUT_K +923 0x0001 //TX_MICMUTE_DT_CUT_THR +924 0x03E8 //TX_MICMUTE_DT_CUT_K2 +925 0x0001 //TX_MICMUTE_DT_CUT_THR2 +926 0x0064 //TX_MICMUTE_DT2_HOLD_N +927 0x1000 //TX_MICMUTE_RATIODTH_THCUT +928 0x1000 //TX_MICMUTE_B_POST_FLT_ECHOL +929 0x7FFF //TX_MICMUTE_B_POST_FLT_ECHOH +930 0x0400 //TX_MICMUTE_C_POST_FLT_MASK +931 0x7999 //TX_MICMUTE_RATIODTL_CUT_TH +932 0x0258 //TX_MICMUTE_DT_CUT_K1 +933 0x0800 //TX_MICMUTE_N2_SN_EST +934 0xFC00 //TX_MICMUTE_THR_SN_EST_0 +935 0x001C //TX_MICMUTE_MIN_G_CTRL_0 +936 0x6000 //TX_MICMUTE_A_POST_FILT_S_0 +937 0x7000 //TX_MICMUTE_B_POST_FILT_0 +938 0x2710 //TX_MIC1RUB_AMP_THR +939 0x0010 //TX_MIC1MUTE_RATIO_THR +940 0x0450 //TX_MIC1MUTE_AMP_THR +941 0x0008 //TX_MIC1MUTE_CVG_TIME +942 0x0008 //TX_MIC1MUTE_RELEASE_TIME +943 0x0000 //TX_AMS_RESRV_01 +944 0x0000 //TX_AMS_RESRV_02 +945 0x0000 //TX_AMS_RESRV_03 +946 0x0000 //TX_AMS_RESRV_04 +947 0x0000 //TX_AMS_RESRV_05 +948 0x0000 //TX_AMS_RESRV_06 +949 0x0000 //TX_AMS_RESRV_07 +950 0x0000 //TX_AMS_RESRV_08 +951 0x0000 //TX_AMS_RESRV_09 +952 0x0000 //TX_AMS_RESRV_10 +953 0x0000 //TX_AMS_RESRV_11 +954 0x0000 //TX_AMS_RESRV_12 +955 0x0000 //TX_AMS_RESRV_13 +956 0x0000 //TX_AMS_RESRV_14 +957 0x0000 //TX_AMS_RESRV_15 +958 0x0000 //TX_AMS_RESRV_16 +959 0x0000 //TX_AMS_RESRV_17 +960 0x0000 //TX_AMS_RESRV_18 +961 0x0000 //TX_AMS_RESRV_19 #RX -0 0x002C //RX_RECVFUNC_MODE_0 +0 0x202C //RX_RECVFUNC_MODE_0 1 0x0000 //RX_RECVFUNC_MODE_1 2 0x0003 //RX_SAMPLINGFREQ_SIG 3 0x0003 //RX_SAMPLINGFREQ_PROC @@ -26312,18 +39201,869 @@ 110 0x0000 //RX_FDDRC_RESRV_0 129 0x0100 //RX_SPK_VOL 130 0x0000 //RX_VOL_RESRV_0 +#RX 2 +157 0x202C //RX_RECVFUNC_MODE_0 +158 0x0000 //RX_RECVFUNC_MODE_1 +159 0x0003 //RX_SAMPLINGFREQ_SIG +160 0x0003 //RX_SAMPLINGFREQ_PROC +161 0x000A //RX_FRAME_SZ +162 0x0000 //RX_DELAY_OPT +163 0x5000 //RX_TDDRC_ALPHA_UP_1 +164 0x5000 //RX_TDDRC_ALPHA_UP_2 +165 0x5000 //RX_TDDRC_ALPHA_UP_3 +166 0x2000 //RX_TDDRC_ALPHA_UP_4 +167 0x0800 //RX_PGA +168 0x7FFF //RX_A_HP +169 0x0000 //RX_B_PE +170 0x1800 //RX_THR_PITCH_DET_0 +171 0x1000 //RX_THR_PITCH_DET_1 +172 0x0800 //RX_THR_PITCH_DET_2 +173 0x0008 //RX_PITCH_BFR_LEN +174 0x0003 //RX_SBD_PITCH_DET +175 0x0100 //RX_PP_RESRV_0 +176 0x0020 //RX_PP_RESRV_1 +177 0x0400 //RX_N_SN_EST +178 0x000C //RX_N2_SN_EST +179 0x0003 //RX_NS_LVL_CTRL +180 0x9000 //RX_THR_SN_EST +181 0x7CCD //RX_LAMBDA_PFILT +182 0x000A //RX_FENS_RESRV_0 +183 0x0190 //RX_FENS_RESRV_1 +184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +187 0x0002 //RX_EXTRA_NS_L +188 0x0800 //RX_EXTRA_NS_A +189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +190 0x65AD //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +192 0x199A //RX_A_POST_FLT +193 0x0000 //RX_LMT_THRD +194 0x4000 //RX_LMT_ALPHA +195 0x0020 //RX_FDEQ_SUBNUM +196 0x4848 //RX_FDEQ_GAIN_0 +197 0x4848 //RX_FDEQ_GAIN_1 +198 0x4848 //RX_FDEQ_GAIN_2 +199 0x4848 //RX_FDEQ_GAIN_3 +200 0x4848 //RX_FDEQ_GAIN_4 +201 0x4848 //RX_FDEQ_GAIN_5 +202 0x4848 //RX_FDEQ_GAIN_6 +203 0x4848 //RX_FDEQ_GAIN_7 +204 0x4848 //RX_FDEQ_GAIN_8 +205 0x4848 //RX_FDEQ_GAIN_9 +206 0x4848 //RX_FDEQ_GAIN_10 +207 0x4848 //RX_FDEQ_GAIN_11 +208 0x4848 //RX_FDEQ_GAIN_12 +209 0x4848 //RX_FDEQ_GAIN_13 +210 0x4848 //RX_FDEQ_GAIN_14 +211 0x4848 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0202 //RX_FDEQ_BIN_0 +221 0x0203 //RX_FDEQ_BIN_1 +222 0x0303 //RX_FDEQ_BIN_2 +223 0x0304 //RX_FDEQ_BIN_3 +224 0x0405 //RX_FDEQ_BIN_4 +225 0x0506 //RX_FDEQ_BIN_5 +226 0x0708 //RX_FDEQ_BIN_6 +227 0x090A //RX_FDEQ_BIN_7 +228 0x0B0C //RX_FDEQ_BIN_8 +229 0x0D0E //RX_FDEQ_BIN_9 +230 0x1013 //RX_FDEQ_BIN_10 +231 0x1719 //RX_FDEQ_BIN_11 +232 0x1B1E //RX_FDEQ_BIN_12 +233 0x1E1E //RX_FDEQ_BIN_13 +234 0x1E28 //RX_FDEQ_BIN_14 +235 0x282C //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x4000 //RX_FDEQ_RESRV_0 +245 0x0320 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0030 //RX_FDDRC_BAND_MARGIN_1 +248 0x0050 //RX_FDDRC_BAND_MARGIN_2 +249 0x0080 //RX_FDDRC_BAND_MARGIN_3 +250 0x0007 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x5000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x6400 //RX_FDDRC_THRD_3_2 +258 0x6400 //RX_FDDRC_THRD_3_3 +259 0x2000 //RX_FDDRC_SLANT_0_0 +260 0x2000 //RX_FDDRC_SLANT_0_1 +261 0x2000 //RX_FDDRC_SLANT_0_2 +262 0x2000 //RX_FDDRC_SLANT_0_3 +263 0x5333 //RX_FDDRC_SLANT_1_0 +264 0x5333 //RX_FDDRC_SLANT_1_1 +265 0x5333 //RX_FDDRC_SLANT_1_2 +266 0x5333 //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +268 0x0002 //RX_FILTINDX +269 0x0000 //RX_TDDRC_THRD_0 +270 0x0000 //RX_TDDRC_THRD_1 +271 0x1A00 //RX_TDDRC_THRD_2 +272 0x1A00 //RX_TDDRC_THRD_3 +273 0x3000 //RX_TDDRC_SLANT_0 +274 0x7EB8 //RX_TDDRC_SLANT_1 +275 0x5000 //RX_TDDRC_ALPHA_UP_0 +276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x199A //RX_TDDRC_HMNC_GAIN +279 0x0001 //RX_TDDRC_SMT_FLAG +280 0x0CCD //RX_TDDRC_SMT_W +281 0x01C8 //RX_TDDRC_DRC_GAIN +282 0x7C00 //RX_LAMBDA_PKA_FP +283 0x2000 //RX_TPKA_FP +284 0x2000 //RX_MIN_G_FP +285 0x0080 //RX_MAX_G_FP +286 0x000B //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 +288 0x0000 //RX_MAXLEVEL_CNG +289 0x3000 //RX_BWE_UV_TH +290 0x3000 //RX_BWE_UV_TH2 +291 0x1800 //RX_BWE_UV_TH3 +292 0x1000 //RX_BWE_V_TH +293 0x04CD //RX_BWE_GAIN1_V_TH1 +294 0x0F33 //RX_BWE_GAIN1_V_TH2 +295 0x7333 //RX_BWE_UV_EQ +296 0x199A //RX_BWE_V_EQ +297 0x7333 //RX_BWE_TONE_TH +298 0x0004 //RX_BWE_UV_HOLD_T +299 0x6CCD //RX_BWE_GAIN2_ALPHA +300 0x799A //RX_BWE_GAIN3_ALPHA +301 0x001E //RX_BWE_CUTOFF +302 0x3000 //RX_BWE_GAINFILL +303 0x3200 //RX_BWE_MAXTH_TONE +304 0x2000 //RX_BWE_EQ_0 +305 0x2000 //RX_BWE_EQ_1 +306 0x2000 //RX_BWE_EQ_2 +307 0x2000 //RX_BWE_EQ_3 +308 0x2000 //RX_BWE_EQ_4 +309 0x2000 //RX_BWE_EQ_5 +310 0x2000 //RX_BWE_EQ_6 +311 0x0000 //RX_BWE_RESRV_0 +312 0x0000 //RX_BWE_RESRV_1 +313 0x0000 //RX_BWE_RESRV_2 +#VOL 0 +163 0x5000 //RX_TDDRC_ALPHA_UP_1 +164 0x5000 //RX_TDDRC_ALPHA_UP_2 +165 0x5000 //RX_TDDRC_ALPHA_UP_3 +166 0x2000 //RX_TDDRC_ALPHA_UP_4 +184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +190 0x65AD //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +269 0x0000 //RX_TDDRC_THRD_0 +270 0x0000 //RX_TDDRC_THRD_1 +271 0x1A00 //RX_TDDRC_THRD_2 +272 0x1A00 //RX_TDDRC_THRD_3 +273 0x3000 //RX_TDDRC_SLANT_0 +274 0x7EB8 //RX_TDDRC_SLANT_1 +275 0x5000 //RX_TDDRC_ALPHA_UP_0 +276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x199A //RX_TDDRC_HMNC_GAIN +279 0x0001 //RX_TDDRC_SMT_FLAG +280 0x0CCD //RX_TDDRC_SMT_W +281 0x01C8 //RX_TDDRC_DRC_GAIN +195 0x0020 //RX_FDEQ_SUBNUM +196 0x4848 //RX_FDEQ_GAIN_0 +197 0x4848 //RX_FDEQ_GAIN_1 +198 0x4848 //RX_FDEQ_GAIN_2 +199 0x4848 //RX_FDEQ_GAIN_3 +200 0x4848 //RX_FDEQ_GAIN_4 +201 0x4848 //RX_FDEQ_GAIN_5 +202 0x4848 //RX_FDEQ_GAIN_6 +203 0x4848 //RX_FDEQ_GAIN_7 +204 0x4848 //RX_FDEQ_GAIN_8 +205 0x4848 //RX_FDEQ_GAIN_9 +206 0x4848 //RX_FDEQ_GAIN_10 +207 0x4848 //RX_FDEQ_GAIN_11 +208 0x4848 //RX_FDEQ_GAIN_12 +209 0x4848 //RX_FDEQ_GAIN_13 +210 0x4848 //RX_FDEQ_GAIN_14 +211 0x4848 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0202 //RX_FDEQ_BIN_0 +221 0x0203 //RX_FDEQ_BIN_1 +222 0x0303 //RX_FDEQ_BIN_2 +223 0x0304 //RX_FDEQ_BIN_3 +224 0x0405 //RX_FDEQ_BIN_4 +225 0x0506 //RX_FDEQ_BIN_5 +226 0x0708 //RX_FDEQ_BIN_6 +227 0x090A //RX_FDEQ_BIN_7 +228 0x0B0C //RX_FDEQ_BIN_8 +229 0x0D0E //RX_FDEQ_BIN_9 +230 0x1013 //RX_FDEQ_BIN_10 +231 0x1719 //RX_FDEQ_BIN_11 +232 0x1B1E //RX_FDEQ_BIN_12 +233 0x1E1E //RX_FDEQ_BIN_13 +234 0x1E28 //RX_FDEQ_BIN_14 +235 0x282C //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x4000 //RX_FDEQ_RESRV_0 +245 0x0320 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0030 //RX_FDDRC_BAND_MARGIN_1 +248 0x0050 //RX_FDDRC_BAND_MARGIN_2 +249 0x0080 //RX_FDDRC_BAND_MARGIN_3 +250 0x0007 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x5000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x6400 //RX_FDDRC_THRD_3_2 +258 0x6400 //RX_FDDRC_THRD_3_3 +259 0x2000 //RX_FDDRC_SLANT_0_0 +260 0x2000 //RX_FDDRC_SLANT_0_1 +261 0x2000 //RX_FDDRC_SLANT_0_2 +262 0x2000 //RX_FDDRC_SLANT_0_3 +263 0x5333 //RX_FDDRC_SLANT_1_0 +264 0x5333 //RX_FDDRC_SLANT_1_1 +265 0x5333 //RX_FDDRC_SLANT_1_2 +266 0x5333 //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +286 0x000B //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 +#VOL 1 +163 0x5000 //RX_TDDRC_ALPHA_UP_1 +164 0x5000 //RX_TDDRC_ALPHA_UP_2 +165 0x5000 //RX_TDDRC_ALPHA_UP_3 +166 0x2000 //RX_TDDRC_ALPHA_UP_4 +184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +190 0x65AD //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +269 0x0000 //RX_TDDRC_THRD_0 +270 0x0000 //RX_TDDRC_THRD_1 +271 0x1A00 //RX_TDDRC_THRD_2 +272 0x1A00 //RX_TDDRC_THRD_3 +273 0x3000 //RX_TDDRC_SLANT_0 +274 0x7EB8 //RX_TDDRC_SLANT_1 +275 0x5000 //RX_TDDRC_ALPHA_UP_0 +276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x199A //RX_TDDRC_HMNC_GAIN +279 0x0001 //RX_TDDRC_SMT_FLAG +280 0x0CCD //RX_TDDRC_SMT_W +281 0x01C8 //RX_TDDRC_DRC_GAIN +195 0x0020 //RX_FDEQ_SUBNUM +196 0x4848 //RX_FDEQ_GAIN_0 +197 0x4848 //RX_FDEQ_GAIN_1 +198 0x4848 //RX_FDEQ_GAIN_2 +199 0x4848 //RX_FDEQ_GAIN_3 +200 0x4848 //RX_FDEQ_GAIN_4 +201 0x4848 //RX_FDEQ_GAIN_5 +202 0x4848 //RX_FDEQ_GAIN_6 +203 0x4848 //RX_FDEQ_GAIN_7 +204 0x4848 //RX_FDEQ_GAIN_8 +205 0x4848 //RX_FDEQ_GAIN_9 +206 0x4848 //RX_FDEQ_GAIN_10 +207 0x4848 //RX_FDEQ_GAIN_11 +208 0x4848 //RX_FDEQ_GAIN_12 +209 0x4848 //RX_FDEQ_GAIN_13 +210 0x4848 //RX_FDEQ_GAIN_14 +211 0x4848 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0202 //RX_FDEQ_BIN_0 +221 0x0203 //RX_FDEQ_BIN_1 +222 0x0303 //RX_FDEQ_BIN_2 +223 0x0304 //RX_FDEQ_BIN_3 +224 0x0405 //RX_FDEQ_BIN_4 +225 0x0506 //RX_FDEQ_BIN_5 +226 0x0708 //RX_FDEQ_BIN_6 +227 0x090A //RX_FDEQ_BIN_7 +228 0x0B0C //RX_FDEQ_BIN_8 +229 0x0D0E //RX_FDEQ_BIN_9 +230 0x1013 //RX_FDEQ_BIN_10 +231 0x1719 //RX_FDEQ_BIN_11 +232 0x1B1E //RX_FDEQ_BIN_12 +233 0x1E1E //RX_FDEQ_BIN_13 +234 0x1E28 //RX_FDEQ_BIN_14 +235 0x282C //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x4000 //RX_FDEQ_RESRV_0 +245 0x0320 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0030 //RX_FDDRC_BAND_MARGIN_1 +248 0x0050 //RX_FDDRC_BAND_MARGIN_2 +249 0x0080 //RX_FDDRC_BAND_MARGIN_3 +250 0x0007 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x5000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x6400 //RX_FDDRC_THRD_3_2 +258 0x6400 //RX_FDDRC_THRD_3_3 +259 0x2000 //RX_FDDRC_SLANT_0_0 +260 0x2000 //RX_FDDRC_SLANT_0_1 +261 0x2000 //RX_FDDRC_SLANT_0_2 +262 0x2000 //RX_FDDRC_SLANT_0_3 +263 0x5333 //RX_FDDRC_SLANT_1_0 +264 0x5333 //RX_FDDRC_SLANT_1_1 +265 0x5333 //RX_FDDRC_SLANT_1_2 +266 0x5333 //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +286 0x0013 //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 +#VOL 2 +163 0x5000 //RX_TDDRC_ALPHA_UP_1 +164 0x5000 //RX_TDDRC_ALPHA_UP_2 +165 0x5000 //RX_TDDRC_ALPHA_UP_3 +166 0x2000 //RX_TDDRC_ALPHA_UP_4 +184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +190 0x65AD //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +269 0x0000 //RX_TDDRC_THRD_0 +270 0x0000 //RX_TDDRC_THRD_1 +271 0x1A00 //RX_TDDRC_THRD_2 +272 0x1A00 //RX_TDDRC_THRD_3 +273 0x3000 //RX_TDDRC_SLANT_0 +274 0x7EB8 //RX_TDDRC_SLANT_1 +275 0x5000 //RX_TDDRC_ALPHA_UP_0 +276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x199A //RX_TDDRC_HMNC_GAIN +279 0x0001 //RX_TDDRC_SMT_FLAG +280 0x0CCD //RX_TDDRC_SMT_W +281 0x01C8 //RX_TDDRC_DRC_GAIN +195 0x0020 //RX_FDEQ_SUBNUM +196 0x4848 //RX_FDEQ_GAIN_0 +197 0x4848 //RX_FDEQ_GAIN_1 +198 0x4848 //RX_FDEQ_GAIN_2 +199 0x4848 //RX_FDEQ_GAIN_3 +200 0x4848 //RX_FDEQ_GAIN_4 +201 0x4848 //RX_FDEQ_GAIN_5 +202 0x4848 //RX_FDEQ_GAIN_6 +203 0x4848 //RX_FDEQ_GAIN_7 +204 0x4848 //RX_FDEQ_GAIN_8 +205 0x4848 //RX_FDEQ_GAIN_9 +206 0x4848 //RX_FDEQ_GAIN_10 +207 0x4848 //RX_FDEQ_GAIN_11 +208 0x4848 //RX_FDEQ_GAIN_12 +209 0x4848 //RX_FDEQ_GAIN_13 +210 0x4848 //RX_FDEQ_GAIN_14 +211 0x4848 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0202 //RX_FDEQ_BIN_0 +221 0x0203 //RX_FDEQ_BIN_1 +222 0x0303 //RX_FDEQ_BIN_2 +223 0x0304 //RX_FDEQ_BIN_3 +224 0x0405 //RX_FDEQ_BIN_4 +225 0x0506 //RX_FDEQ_BIN_5 +226 0x0708 //RX_FDEQ_BIN_6 +227 0x090A //RX_FDEQ_BIN_7 +228 0x0B0C //RX_FDEQ_BIN_8 +229 0x0D0E //RX_FDEQ_BIN_9 +230 0x1013 //RX_FDEQ_BIN_10 +231 0x1719 //RX_FDEQ_BIN_11 +232 0x1B1E //RX_FDEQ_BIN_12 +233 0x1E1E //RX_FDEQ_BIN_13 +234 0x1E28 //RX_FDEQ_BIN_14 +235 0x282C //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x4000 //RX_FDEQ_RESRV_0 +245 0x0320 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0030 //RX_FDDRC_BAND_MARGIN_1 +248 0x0050 //RX_FDDRC_BAND_MARGIN_2 +249 0x0080 //RX_FDDRC_BAND_MARGIN_3 +250 0x0007 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x5000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x6400 //RX_FDDRC_THRD_3_2 +258 0x6400 //RX_FDDRC_THRD_3_3 +259 0x2000 //RX_FDDRC_SLANT_0_0 +260 0x2000 //RX_FDDRC_SLANT_0_1 +261 0x2000 //RX_FDDRC_SLANT_0_2 +262 0x2000 //RX_FDDRC_SLANT_0_3 +263 0x5333 //RX_FDDRC_SLANT_1_0 +264 0x5333 //RX_FDDRC_SLANT_1_1 +265 0x5333 //RX_FDDRC_SLANT_1_2 +266 0x5333 //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +286 0x0020 //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 +#VOL 3 +163 0x5000 //RX_TDDRC_ALPHA_UP_1 +164 0x5000 //RX_TDDRC_ALPHA_UP_2 +165 0x5000 //RX_TDDRC_ALPHA_UP_3 +166 0x2000 //RX_TDDRC_ALPHA_UP_4 +184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +190 0x65AD //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +269 0x0000 //RX_TDDRC_THRD_0 +270 0x0000 //RX_TDDRC_THRD_1 +271 0x1A00 //RX_TDDRC_THRD_2 +272 0x1A00 //RX_TDDRC_THRD_3 +273 0x3000 //RX_TDDRC_SLANT_0 +274 0x7EB8 //RX_TDDRC_SLANT_1 +275 0x5000 //RX_TDDRC_ALPHA_UP_0 +276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x199A //RX_TDDRC_HMNC_GAIN +279 0x0001 //RX_TDDRC_SMT_FLAG +280 0x0CCD //RX_TDDRC_SMT_W +281 0x01C8 //RX_TDDRC_DRC_GAIN +195 0x0020 //RX_FDEQ_SUBNUM +196 0x4848 //RX_FDEQ_GAIN_0 +197 0x4848 //RX_FDEQ_GAIN_1 +198 0x4848 //RX_FDEQ_GAIN_2 +199 0x4848 //RX_FDEQ_GAIN_3 +200 0x4848 //RX_FDEQ_GAIN_4 +201 0x4848 //RX_FDEQ_GAIN_5 +202 0x4848 //RX_FDEQ_GAIN_6 +203 0x4848 //RX_FDEQ_GAIN_7 +204 0x4848 //RX_FDEQ_GAIN_8 +205 0x4848 //RX_FDEQ_GAIN_9 +206 0x4848 //RX_FDEQ_GAIN_10 +207 0x4848 //RX_FDEQ_GAIN_11 +208 0x4848 //RX_FDEQ_GAIN_12 +209 0x4848 //RX_FDEQ_GAIN_13 +210 0x4848 //RX_FDEQ_GAIN_14 +211 0x4848 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0202 //RX_FDEQ_BIN_0 +221 0x0203 //RX_FDEQ_BIN_1 +222 0x0303 //RX_FDEQ_BIN_2 +223 0x0304 //RX_FDEQ_BIN_3 +224 0x0405 //RX_FDEQ_BIN_4 +225 0x0506 //RX_FDEQ_BIN_5 +226 0x0708 //RX_FDEQ_BIN_6 +227 0x090A //RX_FDEQ_BIN_7 +228 0x0B0C //RX_FDEQ_BIN_8 +229 0x0D0E //RX_FDEQ_BIN_9 +230 0x1013 //RX_FDEQ_BIN_10 +231 0x1719 //RX_FDEQ_BIN_11 +232 0x1B1E //RX_FDEQ_BIN_12 +233 0x1E1E //RX_FDEQ_BIN_13 +234 0x1E28 //RX_FDEQ_BIN_14 +235 0x282C //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x4000 //RX_FDEQ_RESRV_0 +245 0x0320 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0030 //RX_FDDRC_BAND_MARGIN_1 +248 0x0050 //RX_FDDRC_BAND_MARGIN_2 +249 0x0080 //RX_FDDRC_BAND_MARGIN_3 +250 0x0007 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x5000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x6400 //RX_FDDRC_THRD_3_2 +258 0x6400 //RX_FDDRC_THRD_3_3 +259 0x2000 //RX_FDDRC_SLANT_0_0 +260 0x2000 //RX_FDDRC_SLANT_0_1 +261 0x2000 //RX_FDDRC_SLANT_0_2 +262 0x2000 //RX_FDDRC_SLANT_0_3 +263 0x5333 //RX_FDDRC_SLANT_1_0 +264 0x5333 //RX_FDDRC_SLANT_1_1 +265 0x5333 //RX_FDDRC_SLANT_1_2 +266 0x5333 //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +286 0x0036 //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 +#VOL 4 +163 0x5000 //RX_TDDRC_ALPHA_UP_1 +164 0x5000 //RX_TDDRC_ALPHA_UP_2 +165 0x5000 //RX_TDDRC_ALPHA_UP_3 +166 0x2000 //RX_TDDRC_ALPHA_UP_4 +184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +190 0x65AD //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +269 0x0000 //RX_TDDRC_THRD_0 +270 0x0000 //RX_TDDRC_THRD_1 +271 0x1A00 //RX_TDDRC_THRD_2 +272 0x1A00 //RX_TDDRC_THRD_3 +273 0x3000 //RX_TDDRC_SLANT_0 +274 0x7EB8 //RX_TDDRC_SLANT_1 +275 0x5000 //RX_TDDRC_ALPHA_UP_0 +276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x199A //RX_TDDRC_HMNC_GAIN +279 0x0001 //RX_TDDRC_SMT_FLAG +280 0x0CCD //RX_TDDRC_SMT_W +281 0x01C8 //RX_TDDRC_DRC_GAIN +195 0x0020 //RX_FDEQ_SUBNUM +196 0x4848 //RX_FDEQ_GAIN_0 +197 0x4848 //RX_FDEQ_GAIN_1 +198 0x4848 //RX_FDEQ_GAIN_2 +199 0x4848 //RX_FDEQ_GAIN_3 +200 0x4848 //RX_FDEQ_GAIN_4 +201 0x4848 //RX_FDEQ_GAIN_5 +202 0x4848 //RX_FDEQ_GAIN_6 +203 0x4848 //RX_FDEQ_GAIN_7 +204 0x4848 //RX_FDEQ_GAIN_8 +205 0x4848 //RX_FDEQ_GAIN_9 +206 0x4848 //RX_FDEQ_GAIN_10 +207 0x4848 //RX_FDEQ_GAIN_11 +208 0x4848 //RX_FDEQ_GAIN_12 +209 0x4848 //RX_FDEQ_GAIN_13 +210 0x4848 //RX_FDEQ_GAIN_14 +211 0x4848 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0202 //RX_FDEQ_BIN_0 +221 0x0203 //RX_FDEQ_BIN_1 +222 0x0303 //RX_FDEQ_BIN_2 +223 0x0304 //RX_FDEQ_BIN_3 +224 0x0405 //RX_FDEQ_BIN_4 +225 0x0506 //RX_FDEQ_BIN_5 +226 0x0708 //RX_FDEQ_BIN_6 +227 0x090A //RX_FDEQ_BIN_7 +228 0x0B0C //RX_FDEQ_BIN_8 +229 0x0D0E //RX_FDEQ_BIN_9 +230 0x1013 //RX_FDEQ_BIN_10 +231 0x1719 //RX_FDEQ_BIN_11 +232 0x1B1E //RX_FDEQ_BIN_12 +233 0x1E1E //RX_FDEQ_BIN_13 +234 0x1E28 //RX_FDEQ_BIN_14 +235 0x282C //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x4000 //RX_FDEQ_RESRV_0 +245 0x0320 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0030 //RX_FDDRC_BAND_MARGIN_1 +248 0x0050 //RX_FDDRC_BAND_MARGIN_2 +249 0x0080 //RX_FDDRC_BAND_MARGIN_3 +250 0x0007 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x5000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x6400 //RX_FDDRC_THRD_3_2 +258 0x6400 //RX_FDDRC_THRD_3_3 +259 0x2000 //RX_FDDRC_SLANT_0_0 +260 0x2000 //RX_FDDRC_SLANT_0_1 +261 0x2000 //RX_FDDRC_SLANT_0_2 +262 0x2000 //RX_FDDRC_SLANT_0_3 +263 0x5333 //RX_FDDRC_SLANT_1_0 +264 0x5333 //RX_FDDRC_SLANT_1_1 +265 0x5333 //RX_FDDRC_SLANT_1_2 +266 0x5333 //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +286 0x005B //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 +#VOL 5 +163 0x5000 //RX_TDDRC_ALPHA_UP_1 +164 0x5000 //RX_TDDRC_ALPHA_UP_2 +165 0x5000 //RX_TDDRC_ALPHA_UP_3 +166 0x2000 //RX_TDDRC_ALPHA_UP_4 +184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +190 0x65AD //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +269 0x0000 //RX_TDDRC_THRD_0 +270 0x0000 //RX_TDDRC_THRD_1 +271 0x1A00 //RX_TDDRC_THRD_2 +272 0x1A00 //RX_TDDRC_THRD_3 +273 0x3000 //RX_TDDRC_SLANT_0 +274 0x7EB8 //RX_TDDRC_SLANT_1 +275 0x5000 //RX_TDDRC_ALPHA_UP_0 +276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x199A //RX_TDDRC_HMNC_GAIN +279 0x0001 //RX_TDDRC_SMT_FLAG +280 0x0CCD //RX_TDDRC_SMT_W +281 0x01C8 //RX_TDDRC_DRC_GAIN +195 0x0020 //RX_FDEQ_SUBNUM +196 0x4848 //RX_FDEQ_GAIN_0 +197 0x4848 //RX_FDEQ_GAIN_1 +198 0x4848 //RX_FDEQ_GAIN_2 +199 0x4848 //RX_FDEQ_GAIN_3 +200 0x4848 //RX_FDEQ_GAIN_4 +201 0x4848 //RX_FDEQ_GAIN_5 +202 0x4848 //RX_FDEQ_GAIN_6 +203 0x4848 //RX_FDEQ_GAIN_7 +204 0x4848 //RX_FDEQ_GAIN_8 +205 0x4848 //RX_FDEQ_GAIN_9 +206 0x4848 //RX_FDEQ_GAIN_10 +207 0x4848 //RX_FDEQ_GAIN_11 +208 0x4848 //RX_FDEQ_GAIN_12 +209 0x4848 //RX_FDEQ_GAIN_13 +210 0x4848 //RX_FDEQ_GAIN_14 +211 0x4848 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0202 //RX_FDEQ_BIN_0 +221 0x0203 //RX_FDEQ_BIN_1 +222 0x0303 //RX_FDEQ_BIN_2 +223 0x0304 //RX_FDEQ_BIN_3 +224 0x0405 //RX_FDEQ_BIN_4 +225 0x0506 //RX_FDEQ_BIN_5 +226 0x0708 //RX_FDEQ_BIN_6 +227 0x090A //RX_FDEQ_BIN_7 +228 0x0B0C //RX_FDEQ_BIN_8 +229 0x0D0E //RX_FDEQ_BIN_9 +230 0x1013 //RX_FDEQ_BIN_10 +231 0x1719 //RX_FDEQ_BIN_11 +232 0x1B1E //RX_FDEQ_BIN_12 +233 0x1E1E //RX_FDEQ_BIN_13 +234 0x1E28 //RX_FDEQ_BIN_14 +235 0x282C //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x4000 //RX_FDEQ_RESRV_0 +245 0x0320 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0030 //RX_FDDRC_BAND_MARGIN_1 +248 0x0050 //RX_FDDRC_BAND_MARGIN_2 +249 0x0080 //RX_FDDRC_BAND_MARGIN_3 +250 0x0007 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x5000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x6400 //RX_FDDRC_THRD_3_2 +258 0x6400 //RX_FDDRC_THRD_3_3 +259 0x2000 //RX_FDDRC_SLANT_0_0 +260 0x2000 //RX_FDDRC_SLANT_0_1 +261 0x2000 //RX_FDDRC_SLANT_0_2 +262 0x2000 //RX_FDDRC_SLANT_0_3 +263 0x5333 //RX_FDDRC_SLANT_1_0 +264 0x5333 //RX_FDDRC_SLANT_1_1 +265 0x5333 //RX_FDDRC_SLANT_1_2 +266 0x5333 //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +286 0x0099 //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 +#VOL 6 +163 0x5000 //RX_TDDRC_ALPHA_UP_1 +164 0x5000 //RX_TDDRC_ALPHA_UP_2 +165 0x5000 //RX_TDDRC_ALPHA_UP_3 +166 0x2000 //RX_TDDRC_ALPHA_UP_4 +184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +190 0x65AD //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +269 0x0000 //RX_TDDRC_THRD_0 +270 0x0000 //RX_TDDRC_THRD_1 +271 0x1A00 //RX_TDDRC_THRD_2 +272 0x1A00 //RX_TDDRC_THRD_3 +273 0x3000 //RX_TDDRC_SLANT_0 +274 0x7EB8 //RX_TDDRC_SLANT_1 +275 0x5000 //RX_TDDRC_ALPHA_UP_0 +276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x199A //RX_TDDRC_HMNC_GAIN +279 0x0001 //RX_TDDRC_SMT_FLAG +280 0x0CCD //RX_TDDRC_SMT_W +281 0x01C8 //RX_TDDRC_DRC_GAIN +195 0x0020 //RX_FDEQ_SUBNUM +196 0x4848 //RX_FDEQ_GAIN_0 +197 0x4848 //RX_FDEQ_GAIN_1 +198 0x4848 //RX_FDEQ_GAIN_2 +199 0x4848 //RX_FDEQ_GAIN_3 +200 0x4848 //RX_FDEQ_GAIN_4 +201 0x4848 //RX_FDEQ_GAIN_5 +202 0x4848 //RX_FDEQ_GAIN_6 +203 0x4848 //RX_FDEQ_GAIN_7 +204 0x4848 //RX_FDEQ_GAIN_8 +205 0x4848 //RX_FDEQ_GAIN_9 +206 0x4848 //RX_FDEQ_GAIN_10 +207 0x4848 //RX_FDEQ_GAIN_11 +208 0x4848 //RX_FDEQ_GAIN_12 +209 0x4848 //RX_FDEQ_GAIN_13 +210 0x4848 //RX_FDEQ_GAIN_14 +211 0x4848 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0202 //RX_FDEQ_BIN_0 +221 0x0203 //RX_FDEQ_BIN_1 +222 0x0303 //RX_FDEQ_BIN_2 +223 0x0304 //RX_FDEQ_BIN_3 +224 0x0405 //RX_FDEQ_BIN_4 +225 0x0506 //RX_FDEQ_BIN_5 +226 0x0708 //RX_FDEQ_BIN_6 +227 0x090A //RX_FDEQ_BIN_7 +228 0x0B0C //RX_FDEQ_BIN_8 +229 0x0D0E //RX_FDEQ_BIN_9 +230 0x1013 //RX_FDEQ_BIN_10 +231 0x1719 //RX_FDEQ_BIN_11 +232 0x1B1E //RX_FDEQ_BIN_12 +233 0x1E1E //RX_FDEQ_BIN_13 +234 0x1E28 //RX_FDEQ_BIN_14 +235 0x282C //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x4000 //RX_FDEQ_RESRV_0 +245 0x0320 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0030 //RX_FDDRC_BAND_MARGIN_1 +248 0x0050 //RX_FDDRC_BAND_MARGIN_2 +249 0x0080 //RX_FDDRC_BAND_MARGIN_3 +250 0x0007 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x5000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x6400 //RX_FDDRC_THRD_3_2 +258 0x6400 //RX_FDDRC_THRD_3_3 +259 0x2000 //RX_FDDRC_SLANT_0_0 +260 0x2000 //RX_FDDRC_SLANT_0_1 +261 0x2000 //RX_FDDRC_SLANT_0_2 +262 0x2000 //RX_FDDRC_SLANT_0_3 +263 0x5333 //RX_FDDRC_SLANT_1_0 +264 0x5333 //RX_FDDRC_SLANT_1_1 +265 0x5333 //RX_FDDRC_SLANT_1_2 +266 0x5333 //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +286 0x0100 //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 #CASE_NAME HEADSET-GOOGLE_CONDOR_HEADPHONE-VOICE_GENERIC-FB -#PARAM_MODE FULL -#PARAM_TYPE TX+RX -#TOTAL_CUSTOM_STEP 7 +#PARAM_MODE Full +#PARAM_TYPE TX+2RX +#TOTAL_CUSTOM_STEP 7+7 #TX 0 0x0001 //TX_OPERATION_MODE_0 1 0x0001 //TX_OPERATION_MODE_1 2 0x0033 //TX_PATCH_REG -3 0x4B7C //TX_SENDFUNC_MODE_0 +3 0x6B7C //TX_SENDFUNC_MODE_0 4 0x0001 //TX_SENDFUNC_MODE_1 -5 0x0003 //TX_NUM_MIC +5 0x0002 //TX_NUM_MIC 6 0x0004 //TX_SAMPLINGFREQ_SIG 7 0x0004 //TX_SAMPLINGFREQ_PROC 8 0x000A //TX_FRAME_SZ_SIG @@ -26339,15 +40079,15 @@ 18 0x0000 //TX_SYS_RESRV_2 19 0x0000 //TX_SYS_RESRV_3 20 0x0000 //TX_DIST2REF0 -21 0x00A4 //TX_DIST2REF1 -22 0x0017 //TX_DIST2REF_02 +21 0x009D //TX_DIST2REF1 +22 0x0010 //TX_DIST2REF_02 23 0x0000 //TX_DIST2REF_03 24 0x0000 //TX_DIST2REF_04 25 0x0000 //TX_DIST2REF_05 26 0x0000 //TX_MMIC -27 0x0FF7 //TX_PGA_0 -28 0x0FF7 //TX_PGA_1 -29 0x0FF7 //TX_PGA_2 +27 0x1000 //TX_PGA_0 +28 0x1000 //TX_PGA_1 +29 0x1000 //TX_PGA_2 30 0x0000 //TX_PGA_3 31 0x0000 //TX_PGA_4 32 0x0000 //TX_PGA_5 @@ -26483,7 +40223,7 @@ 162 0x7FFF //TX_MIN_EQ_RE_EST_10 163 0x7FFF //TX_MIN_EQ_RE_EST_11 164 0x7FFF //TX_MIN_EQ_RE_EST_12 -165 0x4000 //TX_LAMBDA_RE_EST +165 0x0700 //TX_LAMBDA_RE_EST 166 0x0CCD //TX_LAMBDA_CB_NLE 167 0x2000 //TX_C_POST_FLT 168 0x7FFF //TX_GAIN_NP @@ -26543,16 +40283,16 @@ 222 0x023E //TX_ADPT_STRICT_H 223 0x0BB8 //TX_RATIO_DT_L_TH_LOW 224 0x3A98 //TX_RATIO_DT_H_TH_LOW -225 0x1770 //TX_RATIO_DT_L_TH_HIGH +225 0x1194 //TX_RATIO_DT_L_TH_HIGH 226 0x4E20 //TX_RATIO_DT_H_TH_HIGH 227 0x09C4 //TX_RATIO_DT_L0_TH -228 0x2000 //TX_B_POST_FILT_ECHO_L +228 0x7FFF //TX_B_POST_FILT_ECHO_L 229 0x2000 //TX_B_POST_FILT_ECHO_H 230 0x0200 //TX_MIN_G_CTRL_ECHO 231 0x1000 //TX_B_LESSCUT_RTO_ECHO -232 0x0000 //TX_EPD_OFFSET_00 +232 0x0063 //TX_EPD_OFFSET_00 233 0x0000 //TX_EPD_OFFST_01 -234 0x1388 //TX_RATIO_DT_L0_TH_HIGH +234 0x0A28 //TX_RATIO_DT_L0_TH_HIGH 235 0x3A98 //TX_RATIO_DT_H_TH_CUT 236 0x7FFF //TX_MIN_EQ_RE_EST_13 237 0x0000 //TX_DTD_THR1_7 @@ -26560,7 +40300,7 @@ 239 0x0800 //TX_DT_RESRV_7 240 0x0800 //TX_DT_RESRV_8 241 0x0000 //TX_DT_RESRV_9 -242 0xF800 //TX_THR_SN_EST_0 +242 0xF700 //TX_THR_SN_EST_0 243 0xFA00 //TX_THR_SN_EST_1 244 0xFA00 //TX_THR_SN_EST_2 245 0xFB00 //TX_THR_SN_EST_3 @@ -26569,11 +40309,11 @@ 248 0xF800 //TX_THR_SN_EST_6 249 0xF800 //TX_THR_SN_EST_7 250 0x0100 //TX_DELTA_THR_SN_EST_0 -251 0x0200 //TX_DELTA_THR_SN_EST_1 -252 0x0100 //TX_DELTA_THR_SN_EST_2 -253 0x0200 //TX_DELTA_THR_SN_EST_3 +251 0x0100 //TX_DELTA_THR_SN_EST_1 +252 0x0200 //TX_DELTA_THR_SN_EST_2 +253 0x0100 //TX_DELTA_THR_SN_EST_3 254 0x0100 //TX_DELTA_THR_SN_EST_4 -255 0x0100 //TX_DELTA_THR_SN_EST_5 +255 0x0200 //TX_DELTA_THR_SN_EST_5 256 0x0200 //TX_DELTA_THR_SN_EST_6 257 0x0200 //TX_DELTA_THR_SN_EST_7 258 0x4000 //TX_LAMBDA_NN_EST_0 @@ -26601,11 +40341,11 @@ 280 0x1000 //TX_B_POST_FLT_1 281 0x0010 //TX_NS_LVL_CTRL_0 282 0x0014 //TX_NS_LVL_CTRL_1 -283 0x0014 //TX_NS_LVL_CTRL_2 -284 0x0018 //TX_NS_LVL_CTRL_3 -285 0x0016 //TX_NS_LVL_CTRL_4 -286 0x0014 //TX_NS_LVL_CTRL_5 -287 0x0011 //TX_NS_LVL_CTRL_6 +283 0x0018 //TX_NS_LVL_CTRL_2 +284 0x0016 //TX_NS_LVL_CTRL_3 +285 0x0014 //TX_NS_LVL_CTRL_4 +286 0x0011 //TX_NS_LVL_CTRL_5 +287 0x0014 //TX_NS_LVL_CTRL_6 288 0x0011 //TX_NS_LVL_CTRL_7 289 0x000F //TX_MIN_GAIN_S_0 290 0x0010 //TX_MIN_GAIN_S_1 @@ -26623,8 +40363,8 @@ 302 0x4000 //TX_SNRI_SUP_2 303 0x4000 //TX_SNRI_SUP_3 304 0x4000 //TX_SNRI_SUP_4 -305 0x4000 //TX_SNRI_SUP_5 -306 0x50C0 //TX_SNRI_SUP_6 +305 0x50C0 //TX_SNRI_SUP_5 +306 0x4000 //TX_SNRI_SUP_6 307 0x7FFF //TX_SNRI_SUP_7 308 0x7FFF //TX_THR_LFNS 309 0x0018 //TX_G_LFNS @@ -26633,19 +40373,19 @@ 312 0x7FFF //TX_A_POST_FILT_0 313 0x2000 //TX_A_POST_FILT_1 314 0x5000 //TX_A_POST_FILT_S_0 -315 0x6000 //TX_A_POST_FILT_S_1 -316 0x4C00 //TX_A_POST_FILT_S_2 -317 0x4000 //TX_A_POST_FILT_S_3 -318 0x6000 //TX_A_POST_FILT_S_4 -319 0x4000 //TX_A_POST_FILT_S_5 -320 0x5000 //TX_A_POST_FILT_S_6 +315 0x4C00 //TX_A_POST_FILT_S_1 +316 0x4000 //TX_A_POST_FILT_S_2 +317 0x6000 //TX_A_POST_FILT_S_3 +318 0x4000 //TX_A_POST_FILT_S_4 +319 0x5000 //TX_A_POST_FILT_S_5 +320 0x6000 //TX_A_POST_FILT_S_6 321 0x7000 //TX_A_POST_FILT_S_7 322 0x2000 //TX_B_POST_FILT_0 -323 0x1000 //TX_B_POST_FILT_1 +323 0x2000 //TX_B_POST_FILT_1 324 0x2000 //TX_B_POST_FILT_2 -325 0x2000 //TX_B_POST_FILT_3 +325 0x4000 //TX_B_POST_FILT_3 326 0x4000 //TX_B_POST_FILT_4 -327 0x4000 //TX_B_POST_FILT_5 +327 0x1000 //TX_B_POST_FILT_5 328 0x1000 //TX_B_POST_FILT_6 329 0x2000 //TX_B_POST_FILT_7 330 0x4000 //TX_B_LESSCUT_RTO_S_0 @@ -26653,26 +40393,26 @@ 332 0x7FFF //TX_B_LESSCUT_RTO_S_2 333 0x7FFF //TX_B_LESSCUT_RTO_S_3 334 0x7FFF //TX_B_LESSCUT_RTO_S_4 -335 0x7FFF //TX_B_LESSCUT_RTO_S_5 -336 0x6000 //TX_B_LESSCUT_RTO_S_6 +335 0x6000 //TX_B_LESSCUT_RTO_S_5 +336 0x7FFF //TX_B_LESSCUT_RTO_S_6 337 0x7FFF //TX_B_LESSCUT_RTO_S_7 338 0x7C00 //TX_LAMBDA_PFILT 339 0x7C00 //TX_LAMBDA_PFILT_S_0 340 0x7C00 //TX_LAMBDA_PFILT_S_1 -341 0x7C00 //TX_LAMBDA_PFILT_S_2 -342 0x7A00 //TX_LAMBDA_PFILT_S_3 +341 0x7A00 //TX_LAMBDA_PFILT_S_2 +342 0x7C00 //TX_LAMBDA_PFILT_S_3 343 0x7C00 //TX_LAMBDA_PFILT_S_4 344 0x7C00 //TX_LAMBDA_PFILT_S_5 345 0x7C00 //TX_LAMBDA_PFILT_S_6 346 0x7C00 //TX_LAMBDA_PFILT_S_7 -347 0x0000 //TX_K_PEPPER +347 0x0180 //TX_K_PEPPER 348 0x0800 //TX_A_PEPPER 349 0x1EAA //TX_K_PEPPER_HF 350 0x0600 //TX_A_PEPPER_HF 351 0x0001 //TX_HMNC_BST_FLG 352 0x0200 //TX_HMNC_BST_THR -353 0x0200 //TX_DT_BINVAD_TH_0 -354 0x0200 //TX_DT_BINVAD_TH_1 +353 0x2000 //TX_DT_BINVAD_TH_0 +354 0x0800 //TX_DT_BINVAD_TH_1 355 0x0200 //TX_DT_BINVAD_TH_2 356 0x0200 //TX_DT_BINVAD_TH_3 357 0x1F40 //TX_DT_BINVAD_ENDF @@ -26685,7 +40425,7 @@ 364 0x0000 //TX_K_APT 365 0x0001 //TX_NOISEDET 366 0x0064 //TX_NDETCT -367 0x0050 //TX_NOISE_TH_0 +367 0x04E8 //TX_NOISE_TH_0 368 0x7FFF //TX_NOISE_TH_0_2 369 0x7FFF //TX_NOISE_TH_0_3 370 0x07D0 //TX_NOISE_TH_1 @@ -26697,11 +40437,11 @@ 376 0x0000 //TX_NOISE_TH_5_3 377 0x7FFF //TX_NOISE_TH_5_4 378 0x2710 //TX_NOISE_TH_6 -379 0x0033 //TX_MINENOISE_TH -380 0x4000 //TX_MINENOISE_MIC0_TH_MTS -381 0xFFEE //TX_MINENOISE_MIC0_TH_EXP -382 0x6000 //TX_MINENOISE_MIC0_S_TH_MTS -383 0xFFF3 //TX_MINENOISE_MIC0_S_TH_EXP +379 0x02BC //TX_MINENOISE_TH +380 0xD508 //TX_MORENS_TFMASK_TH +381 0x0001 //TX_DRC_QUIET_FLOOR +382 0x3A98 //TX_RATIODTL_CUT_TH +383 0x1482 //TX_DT_CUT_K1 384 0x0666 //TX_OUT_ENER_S_TH_CLEAN 385 0x0666 //TX_OUT_ENER_S_TH_LESSCLEAN 386 0x0333 //TX_OUT_ENER_S_TH_NOISY @@ -26709,22 +40449,22 @@ 388 0x0333 //TX_OUT_ENER_TH_SPEECH 389 0x2000 //TX_SN_NPB_GAIN 390 0x0000 //TX_NN_NPB_GAIN -391 0x0000 //TX_CSX_ALPHA_0 -392 0x0000 //TX_CSX_ALPHA_1 -393 0x0000 //TX_CSX_ALPHA_2 -394 0x0000 //TX_CSX_ALPHA_3 -395 0x0800 //TX_MU_ARSP_EST -396 0x00C8 //TX_P_OUTBEAM_MIN_TH +391 0x7FFF //TX_POST_MASK_SUP_HSNE +392 0x1388 //TX_TAIL_DET_TH +393 0x4000 //TX_B_LESSCUT_RTO_WTA +394 0x0000 //TX_MEL_G_R +395 0x0080 //TX_SUPHIGH_TH +396 0x0000 //TX_MASK_G_R 397 0x0002 //TX_EXTRA_NS_L -398 0x0800 //TX_EXTRA_NS_A -399 0x0005 //TX_VR_NOISE_FLOOR_TH +398 0x1800 //TX_C_POST_FLT_MASK +399 0x7FFF //TX_A_POST_FLT_WNS 400 0x0148 //TX_MIN_G_LOW300HZ -401 0x0002 //TX_MAXLEVEL_CNG +401 0x0004 //TX_MAXLEVEL_CNG 402 0x00B4 //TX_STN_NOISE_TH 403 0x4000 //TX_POST_MASK_SUP 404 0x7FFF //TX_POST_MASK_ADJUST 405 0x00C8 //TX_NS_ENOISE_MIC0_TH -406 0x0033 //TX_MINENOISE_MIC0_TH +406 0x04E7 //TX_MINENOISE_MIC0_TH 407 0x012C //TX_MINENOISE_MIC0_S_TH 408 0x7FFF //TX_MIN_G_CTRL_SSNS 409 0x0000 //TX_METAL_RTO_THR @@ -26832,16 +40572,16 @@ 511 0x6666 //TX_MIC_TO_BFGAIN 512 0x0000 //TX_MICTOBFGAIN0 513 0x0000 //TX_FASTMUE_TH -514 0x0000 //TX_DERVB_LEN_0 -515 0x0000 //TX_DERVB_LEN_1 -516 0x0000 //TX_RHO_DERVB -517 0x0000 //TX_MIC_INDX_DERVB -518 0x0000 //TX_MU_DERVB -519 0x0000 //TX_DR_RESRV_0 -520 0x0000 //TX_DR_RESRV_1 -521 0x0000 //TX_DR_RESRV_2 -522 0x0000 //TX_DR_RESRV_3 -523 0x0000 //TX_DR_RESRV_4 +514 0xC000 //TX_DEREVERB_LF_MU +515 0xC000 //TX_DEREVERB_HF_MU +516 0xCCCC //TX_DEREVERB_DELAY +517 0xD999 //TX_DEREVERB_COEF_LEN +518 0x1F40 //TX_DEREVERB_DNR +519 0x0000 //TX_DEREVERB_ALPHA +520 0x0000 //TX_DEREVERB_BETA +521 0x0000 //TX_GSC_RTOL_TH +522 0x7000 //TX_GSC_RTOH_TH +523 0x0064 //TX_WIDE2_MEANHTH 524 0x0000 //TX_DR_RESRV_5 525 0x0000 //TX_DR_RESRV_6 526 0x0000 //TX_DR_RESRV_7 @@ -26888,19 +40628,19 @@ 567 0x4848 //TX_FDEQ_GAIN_0 568 0x4848 //TX_FDEQ_GAIN_1 569 0x4848 //TX_FDEQ_GAIN_2 -570 0x4848 //TX_FDEQ_GAIN_3 -571 0x4848 //TX_FDEQ_GAIN_4 -572 0x4848 //TX_FDEQ_GAIN_5 -573 0x4848 //TX_FDEQ_GAIN_6 -574 0x4848 //TX_FDEQ_GAIN_7 -575 0x4848 //TX_FDEQ_GAIN_8 -576 0x4853 //TX_FDEQ_GAIN_9 -577 0x5450 //TX_FDEQ_GAIN_10 -578 0x7465 //TX_FDEQ_GAIN_11 -579 0x807F //TX_FDEQ_GAIN_12 -580 0x82C4 //TX_FDEQ_GAIN_13 -581 0xC4C4 //TX_FDEQ_GAIN_14 -582 0xC4C4 //TX_FDEQ_GAIN_15 +570 0x484C //TX_FDEQ_GAIN_3 +571 0x4C4C //TX_FDEQ_GAIN_4 +572 0x544C //TX_FDEQ_GAIN_5 +573 0x5454 //TX_FDEQ_GAIN_6 +574 0x5454 //TX_FDEQ_GAIN_7 +575 0x585A //TX_FDEQ_GAIN_8 +576 0x5C5C //TX_FDEQ_GAIN_9 +577 0x6068 //TX_FDEQ_GAIN_10 +578 0x8894 //TX_FDEQ_GAIN_11 +579 0x94B4 //TX_FDEQ_GAIN_12 +580 0xB4C7 //TX_FDEQ_GAIN_13 +581 0xC7C6 //TX_FDEQ_GAIN_14 +582 0xC6C6 //TX_FDEQ_GAIN_15 583 0x4848 //TX_FDEQ_GAIN_16 584 0x4848 //TX_FDEQ_GAIN_17 585 0x4848 //TX_FDEQ_GAIN_18 @@ -26934,24 +40674,24 @@ 613 0x0000 //TX_FDEQ_BIN_22 614 0x0000 //TX_FDEQ_BIN_23 615 0x0000 //TX_FDEQ_PADDING -616 0x0020 //TX_PREEQ_SUBNUM_MIC0 +616 0x0030 //TX_PREEQ_SUBNUM_MIC0 617 0x4848 //TX_PREEQ_GAIN_MIC0_0 618 0x4848 //TX_PREEQ_GAIN_MIC0_1 619 0x4848 //TX_PREEQ_GAIN_MIC0_2 620 0x4848 //TX_PREEQ_GAIN_MIC0_3 621 0x4848 //TX_PREEQ_GAIN_MIC0_4 622 0x4848 //TX_PREEQ_GAIN_MIC0_5 -623 0x4A4C //TX_PREEQ_GAIN_MIC0_6 -624 0x4E50 //TX_PREEQ_GAIN_MIC0_7 -625 0x5456 //TX_PREEQ_GAIN_MIC0_8 -626 0x585C //TX_PREEQ_GAIN_MIC0_9 -627 0x5C64 //TX_PREEQ_GAIN_MIC0_10 -628 0x7478 //TX_PREEQ_GAIN_MIC0_11 -629 0x705C //TX_PREEQ_GAIN_MIC0_12 -630 0x4838 //TX_PREEQ_GAIN_MIC0_13 -631 0x3C70 //TX_PREEQ_GAIN_MIC0_14 -632 0x4848 //TX_PREEQ_GAIN_MIC0_15 -633 0x4848 //TX_PREEQ_GAIN_MIC0_16 +623 0x4849 //TX_PREEQ_GAIN_MIC0_6 +624 0x4A4B //TX_PREEQ_GAIN_MIC0_7 +625 0x4C4B //TX_PREEQ_GAIN_MIC0_8 +626 0x4A48 //TX_PREEQ_GAIN_MIC0_9 +627 0x4B4C //TX_PREEQ_GAIN_MIC0_10 +628 0x4C4B //TX_PREEQ_GAIN_MIC0_11 +629 0x4838 //TX_PREEQ_GAIN_MIC0_12 +630 0x3858 //TX_PREEQ_GAIN_MIC0_13 +631 0x7060 //TX_PREEQ_GAIN_MIC0_14 +632 0x9870 //TX_PREEQ_GAIN_MIC0_15 +633 0x5848 //TX_PREEQ_GAIN_MIC0_16 634 0x4848 //TX_PREEQ_GAIN_MIC0_17 635 0x4848 //TX_PREEQ_GAIN_MIC0_18 636 0x4848 //TX_PREEQ_GAIN_MIC0_19 @@ -26965,17 +40705,17 @@ 644 0x0304 //TX_PREEQ_BIN_MIC0_3 645 0x0405 //TX_PREEQ_BIN_MIC0_4 646 0x0506 //TX_PREEQ_BIN_MIC0_5 -647 0x0708 //TX_PREEQ_BIN_MIC0_6 -648 0x0909 //TX_PREEQ_BIN_MIC0_7 -649 0x090B //TX_PREEQ_BIN_MIC0_8 +647 0x0808 //TX_PREEQ_BIN_MIC0_6 +648 0x0809 //TX_PREEQ_BIN_MIC0_7 +649 0x0A0A //TX_PREEQ_BIN_MIC0_8 650 0x0C10 //TX_PREEQ_BIN_MIC0_9 651 0x1013 //TX_PREEQ_BIN_MIC0_10 652 0x1414 //TX_PREEQ_BIN_MIC0_11 -653 0x1414 //TX_PREEQ_BIN_MIC0_12 -654 0x1C1E //TX_PREEQ_BIN_MIC0_13 -655 0x1E28 //TX_PREEQ_BIN_MIC0_14 -656 0x462C //TX_PREEQ_BIN_MIC0_15 -657 0x0000 //TX_PREEQ_BIN_MIC0_16 +653 0x261E //TX_PREEQ_BIN_MIC0_12 +654 0x1E14 //TX_PREEQ_BIN_MIC0_13 +655 0x1414 //TX_PREEQ_BIN_MIC0_14 +656 0x2814 //TX_PREEQ_BIN_MIC0_15 +657 0x4000 //TX_PREEQ_BIN_MIC0_16 658 0x0000 //TX_PREEQ_BIN_MIC0_17 659 0x0000 //TX_PREEQ_BIN_MIC0_18 660 0x0000 //TX_PREEQ_BIN_MIC0_19 @@ -26990,15 +40730,15 @@ 669 0x4848 //TX_PREEQ_GAIN_MIC1_3 670 0x4848 //TX_PREEQ_GAIN_MIC1_4 671 0x4848 //TX_PREEQ_GAIN_MIC1_5 -672 0x4848 //TX_PREEQ_GAIN_MIC1_6 -673 0x4848 //TX_PREEQ_GAIN_MIC1_7 -674 0x4848 //TX_PREEQ_GAIN_MIC1_8 -675 0x4848 //TX_PREEQ_GAIN_MIC1_9 -676 0x4848 //TX_PREEQ_GAIN_MIC1_10 -677 0x4848 //TX_PREEQ_GAIN_MIC1_11 -678 0x4848 //TX_PREEQ_GAIN_MIC1_12 -679 0x4848 //TX_PREEQ_GAIN_MIC1_13 -680 0x4848 //TX_PREEQ_GAIN_MIC1_14 +672 0x4645 //TX_PREEQ_GAIN_MIC1_6 +673 0x4442 //TX_PREEQ_GAIN_MIC1_7 +674 0x4140 //TX_PREEQ_GAIN_MIC1_8 +675 0x3E3D //TX_PREEQ_GAIN_MIC1_9 +676 0x3C3C //TX_PREEQ_GAIN_MIC1_10 +677 0x3C3C //TX_PREEQ_GAIN_MIC1_11 +678 0x3938 //TX_PREEQ_GAIN_MIC1_12 +679 0x3A3C //TX_PREEQ_GAIN_MIC1_13 +680 0x3C3E //TX_PREEQ_GAIN_MIC1_14 681 0x4848 //TX_PREEQ_GAIN_MIC1_15 682 0x4848 //TX_PREEQ_GAIN_MIC1_16 683 0x4848 //TX_PREEQ_GAIN_MIC1_17 @@ -27008,23 +40748,23 @@ 687 0x4848 //TX_PREEQ_GAIN_MIC1_21 688 0x4848 //TX_PREEQ_GAIN_MIC1_22 689 0x4848 //TX_PREEQ_GAIN_MIC1_23 -690 0x1812 //TX_PREEQ_BIN_MIC1_0 -691 0x0A0A //TX_PREEQ_BIN_MIC1_1 -692 0x0808 //TX_PREEQ_BIN_MIC1_2 -693 0x080A //TX_PREEQ_BIN_MIC1_3 -694 0x0B09 //TX_PREEQ_BIN_MIC1_4 -695 0x0A06 //TX_PREEQ_BIN_MIC1_5 -696 0x0606 //TX_PREEQ_BIN_MIC1_6 -697 0x0605 //TX_PREEQ_BIN_MIC1_7 -698 0x050A //TX_PREEQ_BIN_MIC1_8 -699 0x1505 //TX_PREEQ_BIN_MIC1_9 -700 0x0506 //TX_PREEQ_BIN_MIC1_10 -701 0x0615 //TX_PREEQ_BIN_MIC1_11 -702 0x1516 //TX_PREEQ_BIN_MIC1_12 -703 0x2021 //TX_PREEQ_BIN_MIC1_13 -704 0x2021 //TX_PREEQ_BIN_MIC1_14 -705 0x2021 //TX_PREEQ_BIN_MIC1_15 -706 0x0800 //TX_PREEQ_BIN_MIC1_16 +690 0x0202 //TX_PREEQ_BIN_MIC1_0 +691 0x0203 //TX_PREEQ_BIN_MIC1_1 +692 0x0303 //TX_PREEQ_BIN_MIC1_2 +693 0x0304 //TX_PREEQ_BIN_MIC1_3 +694 0x0405 //TX_PREEQ_BIN_MIC1_4 +695 0x0506 //TX_PREEQ_BIN_MIC1_5 +696 0x0808 //TX_PREEQ_BIN_MIC1_6 +697 0x0809 //TX_PREEQ_BIN_MIC1_7 +698 0x0A0A //TX_PREEQ_BIN_MIC1_8 +699 0x0C10 //TX_PREEQ_BIN_MIC1_9 +700 0x1013 //TX_PREEQ_BIN_MIC1_10 +701 0x1414 //TX_PREEQ_BIN_MIC1_11 +702 0x261E //TX_PREEQ_BIN_MIC1_12 +703 0x1E14 //TX_PREEQ_BIN_MIC1_13 +704 0x1414 //TX_PREEQ_BIN_MIC1_14 +705 0x2814 //TX_PREEQ_BIN_MIC1_15 +706 0x4000 //TX_PREEQ_BIN_MIC1_16 707 0x0000 //TX_PREEQ_BIN_MIC1_17 708 0x0000 //TX_PREEQ_BIN_MIC1_18 709 0x0000 //TX_PREEQ_BIN_MIC1_19 @@ -27109,7 +40849,7 @@ 788 0x7EB8 //TX_TDDRC_ALPHA_DWN_02 789 0x7EB8 //TX_TDDRC_ALPHA_DWN_03 790 0x7EB8 //TX_TDDRC_ALPHA_DWN_04 -791 0x7FFF //TX_TDDRC_TD_DRC_LIMIT +791 0x7214 //TX_TDDRC_TD_DRC_LIMIT 792 0x0800 //TX_TDDRC_POST_LIMIT_GAIN 793 0x0000 //TX_TDDRC_RESRV_0 794 0x0000 //TX_TDDRC_RESRV_1 @@ -27171,20 +40911,20 @@ 850 0x0000 //TX_FFP_RESRV_4 851 0x0000 //TX_FFP_RESRV_5 852 0x0000 //TX_FFP_RESRV_6 -853 0x0004 //TX_FILTINDX +853 0x0002 //TX_FILTINDX 854 0x0004 //TX_TDDRC_THRD_0 855 0x0016 //TX_TDDRC_THRD_1 -856 0x1900 //TX_TDDRC_THRD_2 -857 0x1900 //TX_TDDRC_THRD_3 -858 0x3000 //TX_TDDRC_SLANT_0 -859 0x7B00 //TX_TDDRC_SLANT_1 +856 0x1800 //TX_TDDRC_THRD_2 +857 0x1800 //TX_TDDRC_THRD_3 +858 0x7FFF //TX_TDDRC_SLANT_0 +859 0x7FFF //TX_TDDRC_SLANT_1 860 0x0C00 //TX_TDDRC_ALPHA_UP_00 861 0x7EB8 //TX_TDDRC_ALPHA_DWN_00 862 0x0000 //TX_TDDRC_HMNC_FLAG 863 0x199A //TX_TDDRC_HMNC_GAIN 864 0x0000 //TX_TDDRC_SMT_FLAG 865 0x0CCD //TX_TDDRC_SMT_W -866 0x0A98 //TX_TDDRC_DRC_GAIN +866 0x0B39 //TX_TDDRC_DRC_GAIN 867 0x7FFF //TX_TDDRC_LMT_THRD 868 0x0000 //TX_TDDRC_LMT_ALPHA 869 0x0000 //TX_TFMASKLTH @@ -27209,14 +40949,79 @@ 888 0x0028 //TX_FASTNS_ARSPC_TH 889 0xC000 //TX_FASTNS_MASK5_TH 890 0x4848 //TX_POSTSSA_MIN_G_VR_MASK -891 0x1000 //TX_A_LESSCUT_RTO_MASK +891 0x7000 //TX_A_LESSCUT_RTO_MASK 892 0x1770 //TX_FASTNS_NOISETH 893 0xC000 //TX_FASTNS_SSA_THLFL 894 0xC000 //TX_FASTNS_SSA_THHFL 895 0xCCCC //TX_FASTNS_SSA_THLFH 896 0xD999 //TX_FASTNS_SSA_THHFH +897 0x2339 //TX_SENDFUNC_REG_MICMUTE +898 0x0021 //TX_SENDFUNC_REG_MICMUTE1 +899 0x02BC //TX_MICMUTE_RATIO_THR +900 0x0140 //TX_MICMUTE_AMP_THR +901 0x0004 //TX_MICMUTE_HPF_IND +902 0x00C0 //TX_MICMUTE_LOG_EYR_TH +903 0x0008 //TX_MICMUTE_CVG_TIME +904 0x0008 //TX_MICMUTE_RELEASE_TIME +905 0x01FE //TX_MIC_VOLUME_MIC0MUTE +906 0x0020 //TX_MICMUTE_EPD_OFFSET_0 +907 0x001E //TX_MICMUTE_FRQ_AEC_L +908 0x7999 //TX_MICMUTE_EAD_THR +909 0x7FFF //TX_MICMUTE_LAMBDA_CB_NLE +910 0x7FFF //TX_MICMUTE_LAMBDA_RE_EST +911 0x4000 //TX_DTD_THR1_MICMUTE_0 +912 0x7000 //TX_DTD_THR1_MICMUTE_1 +913 0x7FFF //TX_DTD_THR1_MICMUTE_2 +914 0x7FFF //TX_DTD_THR1_MICMUTE_3 +915 0x6CCC //TX_DTD_THR2_MICMUTE_0 +916 0x0400 //TX_MICMUTE_MIN_EQ_RE_EST_0 +917 0x0400 //TX_MICMUTE_MIN_EQ_RE_EST_1 +918 0x1000 //TX_MICMUTE_MIN_EQ_RE_EST_2 +919 0x7FFF //TX_MICMUTE_MIN_EQ_RE_EST_3 +920 0x7FFF //TX_MICMUTE_MIN_EQ_RE_EST_4 +921 0x4000 //TX_MICMUTE_C_POST_FLT +922 0x03E8 //TX_MICMUTE_DT_CUT_K +923 0x0001 //TX_MICMUTE_DT_CUT_THR +924 0x03E8 //TX_MICMUTE_DT_CUT_K2 +925 0x0001 //TX_MICMUTE_DT_CUT_THR2 +926 0x0064 //TX_MICMUTE_DT2_HOLD_N +927 0x1000 //TX_MICMUTE_RATIODTH_THCUT +928 0x1000 //TX_MICMUTE_B_POST_FLT_ECHOL +929 0x7FFF //TX_MICMUTE_B_POST_FLT_ECHOH +930 0x0400 //TX_MICMUTE_C_POST_FLT_MASK +931 0x7999 //TX_MICMUTE_RATIODTL_CUT_TH +932 0x0258 //TX_MICMUTE_DT_CUT_K1 +933 0x0800 //TX_MICMUTE_N2_SN_EST +934 0xFC00 //TX_MICMUTE_THR_SN_EST_0 +935 0x001C //TX_MICMUTE_MIN_G_CTRL_0 +936 0x6000 //TX_MICMUTE_A_POST_FILT_S_0 +937 0x7000 //TX_MICMUTE_B_POST_FILT_0 +938 0x2710 //TX_MIC1RUB_AMP_THR +939 0x0010 //TX_MIC1MUTE_RATIO_THR +940 0x0450 //TX_MIC1MUTE_AMP_THR +941 0x0008 //TX_MIC1MUTE_CVG_TIME +942 0x0008 //TX_MIC1MUTE_RELEASE_TIME +943 0x0000 //TX_AMS_RESRV_01 +944 0x0000 //TX_AMS_RESRV_02 +945 0x0000 //TX_AMS_RESRV_03 +946 0x0000 //TX_AMS_RESRV_04 +947 0x0000 //TX_AMS_RESRV_05 +948 0x0000 //TX_AMS_RESRV_06 +949 0x0000 //TX_AMS_RESRV_07 +950 0x0000 //TX_AMS_RESRV_08 +951 0x0000 //TX_AMS_RESRV_09 +952 0x0000 //TX_AMS_RESRV_10 +953 0x0000 //TX_AMS_RESRV_11 +954 0x0000 //TX_AMS_RESRV_12 +955 0x0000 //TX_AMS_RESRV_13 +956 0x0000 //TX_AMS_RESRV_14 +957 0x0000 //TX_AMS_RESRV_15 +958 0x0000 //TX_AMS_RESRV_16 +959 0x0000 //TX_AMS_RESRV_17 +960 0x0000 //TX_AMS_RESRV_18 +961 0x0000 //TX_AMS_RESRV_19 #RX -0 0x002C //RX_RECVFUNC_MODE_0 +0 0x202C //RX_RECVFUNC_MODE_0 1 0x0000 //RX_RECVFUNC_MODE_1 2 0x0004 //RX_SAMPLINGFREQ_SIG 3 0x0004 //RX_SAMPLINGFREQ_PROC @@ -28066,11 +41871,862 @@ 110 0x0000 //RX_FDDRC_RESRV_0 129 0x0100 //RX_SPK_VOL 130 0x0000 //RX_VOL_RESRV_0 +#RX 2 +157 0x202C //RX_RECVFUNC_MODE_0 +158 0x0000 //RX_RECVFUNC_MODE_1 +159 0x0004 //RX_SAMPLINGFREQ_SIG +160 0x0004 //RX_SAMPLINGFREQ_PROC +161 0x000A //RX_FRAME_SZ +162 0x0000 //RX_DELAY_OPT +163 0x1000 //RX_TDDRC_ALPHA_UP_1 +164 0x1000 //RX_TDDRC_ALPHA_UP_2 +165 0x1000 //RX_TDDRC_ALPHA_UP_3 +166 0x1000 //RX_TDDRC_ALPHA_UP_4 +167 0x0800 //RX_PGA +168 0x7B02 //RX_A_HP +169 0x4000 //RX_B_PE +170 0x7800 //RX_THR_PITCH_DET_0 +171 0x7000 //RX_THR_PITCH_DET_1 +172 0x6000 //RX_THR_PITCH_DET_2 +173 0x0008 //RX_PITCH_BFR_LEN +174 0x0003 //RX_SBD_PITCH_DET +175 0x0100 //RX_PP_RESRV_0 +176 0x0020 //RX_PP_RESRV_1 +177 0x0500 //RX_N_SN_EST +178 0x000C //RX_N2_SN_EST +179 0x000A //RX_NS_LVL_CTRL +180 0xF600 //RX_THR_SN_EST +181 0x7000 //RX_LAMBDA_PFILT +182 0x000A //RX_FENS_RESRV_0 +183 0x0190 //RX_FENS_RESRV_1 +184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +187 0x0002 //RX_EXTRA_NS_L +188 0x0800 //RX_EXTRA_NS_A +189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +190 0x7FFF //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +192 0x199A //RX_A_POST_FLT +193 0x0000 //RX_LMT_THRD +194 0x4000 //RX_LMT_ALPHA +195 0x0020 //RX_FDEQ_SUBNUM +196 0x4848 //RX_FDEQ_GAIN_0 +197 0x4848 //RX_FDEQ_GAIN_1 +198 0x4848 //RX_FDEQ_GAIN_2 +199 0x4848 //RX_FDEQ_GAIN_3 +200 0x4848 //RX_FDEQ_GAIN_4 +201 0x4848 //RX_FDEQ_GAIN_5 +202 0x4848 //RX_FDEQ_GAIN_6 +203 0x4848 //RX_FDEQ_GAIN_7 +204 0x4848 //RX_FDEQ_GAIN_8 +205 0x4848 //RX_FDEQ_GAIN_9 +206 0x4848 //RX_FDEQ_GAIN_10 +207 0x4848 //RX_FDEQ_GAIN_11 +208 0x4848 //RX_FDEQ_GAIN_12 +209 0x4848 //RX_FDEQ_GAIN_13 +210 0x4848 //RX_FDEQ_GAIN_14 +211 0x4848 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0202 //RX_FDEQ_BIN_0 +221 0x0203 //RX_FDEQ_BIN_1 +222 0x0304 //RX_FDEQ_BIN_2 +223 0x0405 //RX_FDEQ_BIN_3 +224 0x0607 //RX_FDEQ_BIN_4 +225 0x0809 //RX_FDEQ_BIN_5 +226 0x0A0B //RX_FDEQ_BIN_6 +227 0x0C0D //RX_FDEQ_BIN_7 +228 0x0E0F //RX_FDEQ_BIN_8 +229 0x1011 //RX_FDEQ_BIN_9 +230 0x1214 //RX_FDEQ_BIN_10 +231 0x1618 //RX_FDEQ_BIN_11 +232 0x1C1C //RX_FDEQ_BIN_12 +233 0x2020 //RX_FDEQ_BIN_13 +234 0x2020 //RX_FDEQ_BIN_14 +235 0x2011 //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x4000 //RX_FDEQ_RESRV_0 +245 0x0320 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0030 //RX_FDDRC_BAND_MARGIN_1 +248 0x0050 //RX_FDDRC_BAND_MARGIN_2 +249 0x0080 //RX_FDDRC_BAND_MARGIN_3 +250 0x0007 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x5000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x6400 //RX_FDDRC_THRD_3_2 +258 0x6400 //RX_FDDRC_THRD_3_3 +259 0x2000 //RX_FDDRC_SLANT_0_0 +260 0x2000 //RX_FDDRC_SLANT_0_1 +261 0x2000 //RX_FDDRC_SLANT_0_2 +262 0x2000 //RX_FDDRC_SLANT_0_3 +263 0x5333 //RX_FDDRC_SLANT_1_0 +264 0x5333 //RX_FDDRC_SLANT_1_1 +265 0x5333 //RX_FDDRC_SLANT_1_2 +266 0x5333 //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +268 0x0002 //RX_FILTINDX +269 0x0000 //RX_TDDRC_THRD_0 +270 0x0000 //RX_TDDRC_THRD_1 +271 0x1200 //RX_TDDRC_THRD_2 +272 0x1900 //RX_TDDRC_THRD_3 +273 0x3000 //RX_TDDRC_SLANT_0 +274 0x6E00 //RX_TDDRC_SLANT_1 +275 0x1000 //RX_TDDRC_ALPHA_UP_0 +276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x199A //RX_TDDRC_HMNC_GAIN +279 0x0001 //RX_TDDRC_SMT_FLAG +280 0x0CCD //RX_TDDRC_SMT_W +281 0x0240 //RX_TDDRC_DRC_GAIN +282 0x7C00 //RX_LAMBDA_PKA_FP +283 0x2000 //RX_TPKA_FP +284 0x2000 //RX_MIN_G_FP +285 0x0080 //RX_MAX_G_FP +286 0x000B //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 +288 0x0000 //RX_MAXLEVEL_CNG +289 0x3000 //RX_BWE_UV_TH +290 0x3000 //RX_BWE_UV_TH2 +291 0x1800 //RX_BWE_UV_TH3 +292 0x1000 //RX_BWE_V_TH +293 0x04CD //RX_BWE_GAIN1_V_TH1 +294 0x0F33 //RX_BWE_GAIN1_V_TH2 +295 0x7333 //RX_BWE_UV_EQ +296 0x199A //RX_BWE_V_EQ +297 0x7333 //RX_BWE_TONE_TH +298 0x0004 //RX_BWE_UV_HOLD_T +299 0x6CCD //RX_BWE_GAIN2_ALPHA +300 0x799A //RX_BWE_GAIN3_ALPHA +301 0x001E //RX_BWE_CUTOFF +302 0x3000 //RX_BWE_GAINFILL +303 0x3200 //RX_BWE_MAXTH_TONE +304 0x2000 //RX_BWE_EQ_0 +305 0x2000 //RX_BWE_EQ_1 +306 0x2000 //RX_BWE_EQ_2 +307 0x2000 //RX_BWE_EQ_3 +308 0x2000 //RX_BWE_EQ_4 +309 0x2000 //RX_BWE_EQ_5 +310 0x2000 //RX_BWE_EQ_6 +311 0x0000 //RX_BWE_RESRV_0 +312 0x0000 //RX_BWE_RESRV_1 +313 0x0000 //RX_BWE_RESRV_2 +#VOL 0 +163 0x1000 //RX_TDDRC_ALPHA_UP_1 +164 0x1000 //RX_TDDRC_ALPHA_UP_2 +165 0x1000 //RX_TDDRC_ALPHA_UP_3 +166 0x1000 //RX_TDDRC_ALPHA_UP_4 +184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +190 0x7FFF //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +269 0x0000 //RX_TDDRC_THRD_0 +270 0x0000 //RX_TDDRC_THRD_1 +271 0x1200 //RX_TDDRC_THRD_2 +272 0x1900 //RX_TDDRC_THRD_3 +273 0x3000 //RX_TDDRC_SLANT_0 +274 0x6E00 //RX_TDDRC_SLANT_1 +275 0x1000 //RX_TDDRC_ALPHA_UP_0 +276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x199A //RX_TDDRC_HMNC_GAIN +279 0x0001 //RX_TDDRC_SMT_FLAG +280 0x0CCD //RX_TDDRC_SMT_W +281 0x0240 //RX_TDDRC_DRC_GAIN +195 0x0020 //RX_FDEQ_SUBNUM +196 0x4848 //RX_FDEQ_GAIN_0 +197 0x4848 //RX_FDEQ_GAIN_1 +198 0x4848 //RX_FDEQ_GAIN_2 +199 0x4848 //RX_FDEQ_GAIN_3 +200 0x4848 //RX_FDEQ_GAIN_4 +201 0x4848 //RX_FDEQ_GAIN_5 +202 0x4848 //RX_FDEQ_GAIN_6 +203 0x4848 //RX_FDEQ_GAIN_7 +204 0x4848 //RX_FDEQ_GAIN_8 +205 0x4848 //RX_FDEQ_GAIN_9 +206 0x4848 //RX_FDEQ_GAIN_10 +207 0x4848 //RX_FDEQ_GAIN_11 +208 0x4848 //RX_FDEQ_GAIN_12 +209 0x4848 //RX_FDEQ_GAIN_13 +210 0x4848 //RX_FDEQ_GAIN_14 +211 0x4848 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0202 //RX_FDEQ_BIN_0 +221 0x0203 //RX_FDEQ_BIN_1 +222 0x0304 //RX_FDEQ_BIN_2 +223 0x0405 //RX_FDEQ_BIN_3 +224 0x0607 //RX_FDEQ_BIN_4 +225 0x0809 //RX_FDEQ_BIN_5 +226 0x0A0B //RX_FDEQ_BIN_6 +227 0x0C0D //RX_FDEQ_BIN_7 +228 0x0E0F //RX_FDEQ_BIN_8 +229 0x1011 //RX_FDEQ_BIN_9 +230 0x1214 //RX_FDEQ_BIN_10 +231 0x1618 //RX_FDEQ_BIN_11 +232 0x1C1C //RX_FDEQ_BIN_12 +233 0x2020 //RX_FDEQ_BIN_13 +234 0x2020 //RX_FDEQ_BIN_14 +235 0x2011 //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x4000 //RX_FDEQ_RESRV_0 +245 0x0320 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0030 //RX_FDDRC_BAND_MARGIN_1 +248 0x0050 //RX_FDDRC_BAND_MARGIN_2 +249 0x0080 //RX_FDDRC_BAND_MARGIN_3 +250 0x0007 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x5000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x6400 //RX_FDDRC_THRD_3_2 +258 0x6400 //RX_FDDRC_THRD_3_3 +259 0x2000 //RX_FDDRC_SLANT_0_0 +260 0x2000 //RX_FDDRC_SLANT_0_1 +261 0x2000 //RX_FDDRC_SLANT_0_2 +262 0x2000 //RX_FDDRC_SLANT_0_3 +263 0x5333 //RX_FDDRC_SLANT_1_0 +264 0x5333 //RX_FDDRC_SLANT_1_1 +265 0x5333 //RX_FDDRC_SLANT_1_2 +266 0x5333 //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +286 0x000B //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 +#VOL 1 +163 0x1000 //RX_TDDRC_ALPHA_UP_1 +164 0x1000 //RX_TDDRC_ALPHA_UP_2 +165 0x1000 //RX_TDDRC_ALPHA_UP_3 +166 0x1000 //RX_TDDRC_ALPHA_UP_4 +184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +190 0x7FFF //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +269 0x0000 //RX_TDDRC_THRD_0 +270 0x0000 //RX_TDDRC_THRD_1 +271 0x1200 //RX_TDDRC_THRD_2 +272 0x1900 //RX_TDDRC_THRD_3 +273 0x3000 //RX_TDDRC_SLANT_0 +274 0x6E00 //RX_TDDRC_SLANT_1 +275 0x1000 //RX_TDDRC_ALPHA_UP_0 +276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x199A //RX_TDDRC_HMNC_GAIN +279 0x0001 //RX_TDDRC_SMT_FLAG +280 0x0CCD //RX_TDDRC_SMT_W +281 0x0240 //RX_TDDRC_DRC_GAIN +195 0x0020 //RX_FDEQ_SUBNUM +196 0x4848 //RX_FDEQ_GAIN_0 +197 0x4848 //RX_FDEQ_GAIN_1 +198 0x4848 //RX_FDEQ_GAIN_2 +199 0x4848 //RX_FDEQ_GAIN_3 +200 0x4848 //RX_FDEQ_GAIN_4 +201 0x4848 //RX_FDEQ_GAIN_5 +202 0x4848 //RX_FDEQ_GAIN_6 +203 0x4848 //RX_FDEQ_GAIN_7 +204 0x4848 //RX_FDEQ_GAIN_8 +205 0x4848 //RX_FDEQ_GAIN_9 +206 0x4848 //RX_FDEQ_GAIN_10 +207 0x4848 //RX_FDEQ_GAIN_11 +208 0x4848 //RX_FDEQ_GAIN_12 +209 0x4848 //RX_FDEQ_GAIN_13 +210 0x4848 //RX_FDEQ_GAIN_14 +211 0x4848 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0202 //RX_FDEQ_BIN_0 +221 0x0203 //RX_FDEQ_BIN_1 +222 0x0304 //RX_FDEQ_BIN_2 +223 0x0405 //RX_FDEQ_BIN_3 +224 0x0607 //RX_FDEQ_BIN_4 +225 0x0809 //RX_FDEQ_BIN_5 +226 0x0A0B //RX_FDEQ_BIN_6 +227 0x0C0D //RX_FDEQ_BIN_7 +228 0x0E0F //RX_FDEQ_BIN_8 +229 0x1011 //RX_FDEQ_BIN_9 +230 0x1214 //RX_FDEQ_BIN_10 +231 0x1618 //RX_FDEQ_BIN_11 +232 0x1C1C //RX_FDEQ_BIN_12 +233 0x2020 //RX_FDEQ_BIN_13 +234 0x2020 //RX_FDEQ_BIN_14 +235 0x2011 //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x4000 //RX_FDEQ_RESRV_0 +245 0x0320 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0030 //RX_FDDRC_BAND_MARGIN_1 +248 0x0050 //RX_FDDRC_BAND_MARGIN_2 +249 0x0080 //RX_FDDRC_BAND_MARGIN_3 +250 0x0007 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x5000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x6400 //RX_FDDRC_THRD_3_2 +258 0x6400 //RX_FDDRC_THRD_3_3 +259 0x2000 //RX_FDDRC_SLANT_0_0 +260 0x2000 //RX_FDDRC_SLANT_0_1 +261 0x2000 //RX_FDDRC_SLANT_0_2 +262 0x2000 //RX_FDDRC_SLANT_0_3 +263 0x5333 //RX_FDDRC_SLANT_1_0 +264 0x5333 //RX_FDDRC_SLANT_1_1 +265 0x5333 //RX_FDDRC_SLANT_1_2 +266 0x5333 //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +286 0x0013 //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 +#VOL 2 +163 0x1000 //RX_TDDRC_ALPHA_UP_1 +164 0x1000 //RX_TDDRC_ALPHA_UP_2 +165 0x1000 //RX_TDDRC_ALPHA_UP_3 +166 0x1000 //RX_TDDRC_ALPHA_UP_4 +184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +190 0x7FFF //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +269 0x0000 //RX_TDDRC_THRD_0 +270 0x0000 //RX_TDDRC_THRD_1 +271 0x1200 //RX_TDDRC_THRD_2 +272 0x1900 //RX_TDDRC_THRD_3 +273 0x3000 //RX_TDDRC_SLANT_0 +274 0x6E00 //RX_TDDRC_SLANT_1 +275 0x1000 //RX_TDDRC_ALPHA_UP_0 +276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x199A //RX_TDDRC_HMNC_GAIN +279 0x0001 //RX_TDDRC_SMT_FLAG +280 0x0CCD //RX_TDDRC_SMT_W +281 0x0240 //RX_TDDRC_DRC_GAIN +195 0x0020 //RX_FDEQ_SUBNUM +196 0x4848 //RX_FDEQ_GAIN_0 +197 0x4848 //RX_FDEQ_GAIN_1 +198 0x4848 //RX_FDEQ_GAIN_2 +199 0x4848 //RX_FDEQ_GAIN_3 +200 0x4848 //RX_FDEQ_GAIN_4 +201 0x4848 //RX_FDEQ_GAIN_5 +202 0x4848 //RX_FDEQ_GAIN_6 +203 0x4848 //RX_FDEQ_GAIN_7 +204 0x4848 //RX_FDEQ_GAIN_8 +205 0x4848 //RX_FDEQ_GAIN_9 +206 0x4848 //RX_FDEQ_GAIN_10 +207 0x4848 //RX_FDEQ_GAIN_11 +208 0x4848 //RX_FDEQ_GAIN_12 +209 0x4848 //RX_FDEQ_GAIN_13 +210 0x4848 //RX_FDEQ_GAIN_14 +211 0x4848 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0202 //RX_FDEQ_BIN_0 +221 0x0203 //RX_FDEQ_BIN_1 +222 0x0304 //RX_FDEQ_BIN_2 +223 0x0405 //RX_FDEQ_BIN_3 +224 0x0607 //RX_FDEQ_BIN_4 +225 0x0809 //RX_FDEQ_BIN_5 +226 0x0A0B //RX_FDEQ_BIN_6 +227 0x0C0D //RX_FDEQ_BIN_7 +228 0x0E0F //RX_FDEQ_BIN_8 +229 0x1011 //RX_FDEQ_BIN_9 +230 0x1214 //RX_FDEQ_BIN_10 +231 0x1618 //RX_FDEQ_BIN_11 +232 0x1C1C //RX_FDEQ_BIN_12 +233 0x2020 //RX_FDEQ_BIN_13 +234 0x2020 //RX_FDEQ_BIN_14 +235 0x2011 //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x4000 //RX_FDEQ_RESRV_0 +245 0x0320 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0030 //RX_FDDRC_BAND_MARGIN_1 +248 0x0050 //RX_FDDRC_BAND_MARGIN_2 +249 0x0080 //RX_FDDRC_BAND_MARGIN_3 +250 0x0007 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x5000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x6400 //RX_FDDRC_THRD_3_2 +258 0x6400 //RX_FDDRC_THRD_3_3 +259 0x2000 //RX_FDDRC_SLANT_0_0 +260 0x2000 //RX_FDDRC_SLANT_0_1 +261 0x2000 //RX_FDDRC_SLANT_0_2 +262 0x2000 //RX_FDDRC_SLANT_0_3 +263 0x5333 //RX_FDDRC_SLANT_1_0 +264 0x5333 //RX_FDDRC_SLANT_1_1 +265 0x5333 //RX_FDDRC_SLANT_1_2 +266 0x5333 //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +286 0x0020 //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 +#VOL 3 +163 0x1000 //RX_TDDRC_ALPHA_UP_1 +164 0x1000 //RX_TDDRC_ALPHA_UP_2 +165 0x1000 //RX_TDDRC_ALPHA_UP_3 +166 0x1000 //RX_TDDRC_ALPHA_UP_4 +184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +190 0x7FFF //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +269 0x0000 //RX_TDDRC_THRD_0 +270 0x0000 //RX_TDDRC_THRD_1 +271 0x1200 //RX_TDDRC_THRD_2 +272 0x1900 //RX_TDDRC_THRD_3 +273 0x3000 //RX_TDDRC_SLANT_0 +274 0x6E00 //RX_TDDRC_SLANT_1 +275 0x1000 //RX_TDDRC_ALPHA_UP_0 +276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x199A //RX_TDDRC_HMNC_GAIN +279 0x0001 //RX_TDDRC_SMT_FLAG +280 0x0CCD //RX_TDDRC_SMT_W +281 0x0240 //RX_TDDRC_DRC_GAIN +195 0x0020 //RX_FDEQ_SUBNUM +196 0x4848 //RX_FDEQ_GAIN_0 +197 0x4848 //RX_FDEQ_GAIN_1 +198 0x4848 //RX_FDEQ_GAIN_2 +199 0x4848 //RX_FDEQ_GAIN_3 +200 0x4848 //RX_FDEQ_GAIN_4 +201 0x4848 //RX_FDEQ_GAIN_5 +202 0x4848 //RX_FDEQ_GAIN_6 +203 0x4848 //RX_FDEQ_GAIN_7 +204 0x4848 //RX_FDEQ_GAIN_8 +205 0x4848 //RX_FDEQ_GAIN_9 +206 0x4848 //RX_FDEQ_GAIN_10 +207 0x4848 //RX_FDEQ_GAIN_11 +208 0x4848 //RX_FDEQ_GAIN_12 +209 0x4848 //RX_FDEQ_GAIN_13 +210 0x4848 //RX_FDEQ_GAIN_14 +211 0x4848 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0202 //RX_FDEQ_BIN_0 +221 0x0203 //RX_FDEQ_BIN_1 +222 0x0304 //RX_FDEQ_BIN_2 +223 0x0405 //RX_FDEQ_BIN_3 +224 0x0607 //RX_FDEQ_BIN_4 +225 0x0809 //RX_FDEQ_BIN_5 +226 0x0A0B //RX_FDEQ_BIN_6 +227 0x0C0D //RX_FDEQ_BIN_7 +228 0x0E0F //RX_FDEQ_BIN_8 +229 0x1011 //RX_FDEQ_BIN_9 +230 0x1214 //RX_FDEQ_BIN_10 +231 0x1618 //RX_FDEQ_BIN_11 +232 0x1C1C //RX_FDEQ_BIN_12 +233 0x2020 //RX_FDEQ_BIN_13 +234 0x2020 //RX_FDEQ_BIN_14 +235 0x2011 //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x4000 //RX_FDEQ_RESRV_0 +245 0x0320 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0030 //RX_FDDRC_BAND_MARGIN_1 +248 0x0050 //RX_FDDRC_BAND_MARGIN_2 +249 0x0080 //RX_FDDRC_BAND_MARGIN_3 +250 0x0007 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x5000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x6400 //RX_FDDRC_THRD_3_2 +258 0x6400 //RX_FDDRC_THRD_3_3 +259 0x2000 //RX_FDDRC_SLANT_0_0 +260 0x2000 //RX_FDDRC_SLANT_0_1 +261 0x2000 //RX_FDDRC_SLANT_0_2 +262 0x2000 //RX_FDDRC_SLANT_0_3 +263 0x5333 //RX_FDDRC_SLANT_1_0 +264 0x5333 //RX_FDDRC_SLANT_1_1 +265 0x5333 //RX_FDDRC_SLANT_1_2 +266 0x5333 //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +286 0x0036 //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 +#VOL 4 +163 0x1000 //RX_TDDRC_ALPHA_UP_1 +164 0x1000 //RX_TDDRC_ALPHA_UP_2 +165 0x1000 //RX_TDDRC_ALPHA_UP_3 +166 0x1000 //RX_TDDRC_ALPHA_UP_4 +184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +190 0x7FFF //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +269 0x0000 //RX_TDDRC_THRD_0 +270 0x0000 //RX_TDDRC_THRD_1 +271 0x1200 //RX_TDDRC_THRD_2 +272 0x1900 //RX_TDDRC_THRD_3 +273 0x3000 //RX_TDDRC_SLANT_0 +274 0x6E00 //RX_TDDRC_SLANT_1 +275 0x1000 //RX_TDDRC_ALPHA_UP_0 +276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x199A //RX_TDDRC_HMNC_GAIN +279 0x0001 //RX_TDDRC_SMT_FLAG +280 0x0CCD //RX_TDDRC_SMT_W +281 0x0240 //RX_TDDRC_DRC_GAIN +195 0x0020 //RX_FDEQ_SUBNUM +196 0x4848 //RX_FDEQ_GAIN_0 +197 0x4848 //RX_FDEQ_GAIN_1 +198 0x4848 //RX_FDEQ_GAIN_2 +199 0x4848 //RX_FDEQ_GAIN_3 +200 0x4848 //RX_FDEQ_GAIN_4 +201 0x4848 //RX_FDEQ_GAIN_5 +202 0x4848 //RX_FDEQ_GAIN_6 +203 0x4848 //RX_FDEQ_GAIN_7 +204 0x4848 //RX_FDEQ_GAIN_8 +205 0x4848 //RX_FDEQ_GAIN_9 +206 0x4848 //RX_FDEQ_GAIN_10 +207 0x4848 //RX_FDEQ_GAIN_11 +208 0x4848 //RX_FDEQ_GAIN_12 +209 0x4848 //RX_FDEQ_GAIN_13 +210 0x4848 //RX_FDEQ_GAIN_14 +211 0x4848 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0202 //RX_FDEQ_BIN_0 +221 0x0203 //RX_FDEQ_BIN_1 +222 0x0304 //RX_FDEQ_BIN_2 +223 0x0405 //RX_FDEQ_BIN_3 +224 0x0607 //RX_FDEQ_BIN_4 +225 0x0809 //RX_FDEQ_BIN_5 +226 0x0A0B //RX_FDEQ_BIN_6 +227 0x0C0D //RX_FDEQ_BIN_7 +228 0x0E0F //RX_FDEQ_BIN_8 +229 0x1011 //RX_FDEQ_BIN_9 +230 0x1214 //RX_FDEQ_BIN_10 +231 0x1618 //RX_FDEQ_BIN_11 +232 0x1C1C //RX_FDEQ_BIN_12 +233 0x2020 //RX_FDEQ_BIN_13 +234 0x2020 //RX_FDEQ_BIN_14 +235 0x2011 //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x4000 //RX_FDEQ_RESRV_0 +245 0x0320 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0030 //RX_FDDRC_BAND_MARGIN_1 +248 0x0050 //RX_FDDRC_BAND_MARGIN_2 +249 0x0080 //RX_FDDRC_BAND_MARGIN_3 +250 0x0007 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x5000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x6400 //RX_FDDRC_THRD_3_2 +258 0x6400 //RX_FDDRC_THRD_3_3 +259 0x2000 //RX_FDDRC_SLANT_0_0 +260 0x2000 //RX_FDDRC_SLANT_0_1 +261 0x2000 //RX_FDDRC_SLANT_0_2 +262 0x2000 //RX_FDDRC_SLANT_0_3 +263 0x5333 //RX_FDDRC_SLANT_1_0 +264 0x5333 //RX_FDDRC_SLANT_1_1 +265 0x5333 //RX_FDDRC_SLANT_1_2 +266 0x5333 //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +286 0x005B //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 +#VOL 5 +163 0x1000 //RX_TDDRC_ALPHA_UP_1 +164 0x1000 //RX_TDDRC_ALPHA_UP_2 +165 0x1000 //RX_TDDRC_ALPHA_UP_3 +166 0x1000 //RX_TDDRC_ALPHA_UP_4 +184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +190 0x7FFF //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +269 0x0000 //RX_TDDRC_THRD_0 +270 0x0000 //RX_TDDRC_THRD_1 +271 0x1200 //RX_TDDRC_THRD_2 +272 0x1900 //RX_TDDRC_THRD_3 +273 0x3000 //RX_TDDRC_SLANT_0 +274 0x6E00 //RX_TDDRC_SLANT_1 +275 0x1000 //RX_TDDRC_ALPHA_UP_0 +276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x199A //RX_TDDRC_HMNC_GAIN +279 0x0001 //RX_TDDRC_SMT_FLAG +280 0x0CCD //RX_TDDRC_SMT_W +281 0x0240 //RX_TDDRC_DRC_GAIN +195 0x0020 //RX_FDEQ_SUBNUM +196 0x4848 //RX_FDEQ_GAIN_0 +197 0x4848 //RX_FDEQ_GAIN_1 +198 0x4848 //RX_FDEQ_GAIN_2 +199 0x4848 //RX_FDEQ_GAIN_3 +200 0x4848 //RX_FDEQ_GAIN_4 +201 0x4848 //RX_FDEQ_GAIN_5 +202 0x4848 //RX_FDEQ_GAIN_6 +203 0x4848 //RX_FDEQ_GAIN_7 +204 0x4848 //RX_FDEQ_GAIN_8 +205 0x4848 //RX_FDEQ_GAIN_9 +206 0x4848 //RX_FDEQ_GAIN_10 +207 0x4848 //RX_FDEQ_GAIN_11 +208 0x4848 //RX_FDEQ_GAIN_12 +209 0x4848 //RX_FDEQ_GAIN_13 +210 0x4848 //RX_FDEQ_GAIN_14 +211 0x4848 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0202 //RX_FDEQ_BIN_0 +221 0x0203 //RX_FDEQ_BIN_1 +222 0x0304 //RX_FDEQ_BIN_2 +223 0x0405 //RX_FDEQ_BIN_3 +224 0x0607 //RX_FDEQ_BIN_4 +225 0x0809 //RX_FDEQ_BIN_5 +226 0x0A0B //RX_FDEQ_BIN_6 +227 0x0C0D //RX_FDEQ_BIN_7 +228 0x0E0F //RX_FDEQ_BIN_8 +229 0x1011 //RX_FDEQ_BIN_9 +230 0x1214 //RX_FDEQ_BIN_10 +231 0x1618 //RX_FDEQ_BIN_11 +232 0x1C1C //RX_FDEQ_BIN_12 +233 0x2020 //RX_FDEQ_BIN_13 +234 0x2020 //RX_FDEQ_BIN_14 +235 0x2011 //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x4000 //RX_FDEQ_RESRV_0 +245 0x0320 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0030 //RX_FDDRC_BAND_MARGIN_1 +248 0x0050 //RX_FDDRC_BAND_MARGIN_2 +249 0x0080 //RX_FDDRC_BAND_MARGIN_3 +250 0x0007 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x5000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x6400 //RX_FDDRC_THRD_3_2 +258 0x6400 //RX_FDDRC_THRD_3_3 +259 0x2000 //RX_FDDRC_SLANT_0_0 +260 0x2000 //RX_FDDRC_SLANT_0_1 +261 0x2000 //RX_FDDRC_SLANT_0_2 +262 0x2000 //RX_FDDRC_SLANT_0_3 +263 0x5333 //RX_FDDRC_SLANT_1_0 +264 0x5333 //RX_FDDRC_SLANT_1_1 +265 0x5333 //RX_FDDRC_SLANT_1_2 +266 0x5333 //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +286 0x0099 //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 +#VOL 6 +163 0x1000 //RX_TDDRC_ALPHA_UP_1 +164 0x1000 //RX_TDDRC_ALPHA_UP_2 +165 0x1000 //RX_TDDRC_ALPHA_UP_3 +166 0x1000 //RX_TDDRC_ALPHA_UP_4 +184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +190 0x7FFF //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +269 0x0000 //RX_TDDRC_THRD_0 +270 0x0000 //RX_TDDRC_THRD_1 +271 0x1200 //RX_TDDRC_THRD_2 +272 0x1900 //RX_TDDRC_THRD_3 +273 0x3000 //RX_TDDRC_SLANT_0 +274 0x6E00 //RX_TDDRC_SLANT_1 +275 0x1000 //RX_TDDRC_ALPHA_UP_0 +276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x199A //RX_TDDRC_HMNC_GAIN +279 0x0001 //RX_TDDRC_SMT_FLAG +280 0x0CCD //RX_TDDRC_SMT_W +281 0x0240 //RX_TDDRC_DRC_GAIN +195 0x0020 //RX_FDEQ_SUBNUM +196 0x4848 //RX_FDEQ_GAIN_0 +197 0x4848 //RX_FDEQ_GAIN_1 +198 0x4848 //RX_FDEQ_GAIN_2 +199 0x4848 //RX_FDEQ_GAIN_3 +200 0x4848 //RX_FDEQ_GAIN_4 +201 0x4848 //RX_FDEQ_GAIN_5 +202 0x4848 //RX_FDEQ_GAIN_6 +203 0x4848 //RX_FDEQ_GAIN_7 +204 0x4848 //RX_FDEQ_GAIN_8 +205 0x4848 //RX_FDEQ_GAIN_9 +206 0x4848 //RX_FDEQ_GAIN_10 +207 0x4848 //RX_FDEQ_GAIN_11 +208 0x4848 //RX_FDEQ_GAIN_12 +209 0x4848 //RX_FDEQ_GAIN_13 +210 0x4848 //RX_FDEQ_GAIN_14 +211 0x4848 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0202 //RX_FDEQ_BIN_0 +221 0x0203 //RX_FDEQ_BIN_1 +222 0x0304 //RX_FDEQ_BIN_2 +223 0x0405 //RX_FDEQ_BIN_3 +224 0x0607 //RX_FDEQ_BIN_4 +225 0x0809 //RX_FDEQ_BIN_5 +226 0x0A0B //RX_FDEQ_BIN_6 +227 0x0C0D //RX_FDEQ_BIN_7 +228 0x0E0F //RX_FDEQ_BIN_8 +229 0x1011 //RX_FDEQ_BIN_9 +230 0x1214 //RX_FDEQ_BIN_10 +231 0x1618 //RX_FDEQ_BIN_11 +232 0x1C1C //RX_FDEQ_BIN_12 +233 0x2020 //RX_FDEQ_BIN_13 +234 0x2020 //RX_FDEQ_BIN_14 +235 0x2011 //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x4000 //RX_FDEQ_RESRV_0 +245 0x0320 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0030 //RX_FDDRC_BAND_MARGIN_1 +248 0x0050 //RX_FDDRC_BAND_MARGIN_2 +249 0x0080 //RX_FDDRC_BAND_MARGIN_3 +250 0x0007 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x5000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x6400 //RX_FDDRC_THRD_3_2 +258 0x6400 //RX_FDDRC_THRD_3_3 +259 0x2000 //RX_FDDRC_SLANT_0_0 +260 0x2000 //RX_FDDRC_SLANT_0_1 +261 0x2000 //RX_FDDRC_SLANT_0_2 +262 0x2000 //RX_FDDRC_SLANT_0_3 +263 0x5333 //RX_FDDRC_SLANT_1_0 +264 0x5333 //RX_FDDRC_SLANT_1_1 +265 0x5333 //RX_FDDRC_SLANT_1_2 +266 0x5333 //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +286 0x0100 //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 #CASE_NAME HEADSET-GOOGLE_CONDOR_CERTIFICATION1-VOICE_GENERIC-NB -#PARAM_MODE FULL -#PARAM_TYPE TX+RX -#TOTAL_CUSTOM_STEP 7 +#PARAM_MODE Full +#PARAM_TYPE TX+2RX +#TOTAL_CUSTOM_STEP 7+7 #TX 0 0x0009 //TX_OPERATION_MODE_0 1 0x0008 //TX_OPERATION_MODE_1 @@ -28387,20 +43043,20 @@ 312 0x7FFF //TX_A_POST_FILT_0 313 0x2000 //TX_A_POST_FILT_1 314 0x4000 //TX_A_POST_FILT_S_0 -315 0x4000 //TX_A_POST_FILT_S_1 -316 0x1000 //TX_A_POST_FILT_S_2 +315 0x1000 //TX_A_POST_FILT_S_1 +316 0x4000 //TX_A_POST_FILT_S_2 317 0x4000 //TX_A_POST_FILT_S_3 318 0x4000 //TX_A_POST_FILT_S_4 319 0x4000 //TX_A_POST_FILT_S_5 320 0x4000 //TX_A_POST_FILT_S_6 321 0x4000 //TX_A_POST_FILT_S_7 322 0x0400 //TX_B_POST_FILT_0 -323 0x0400 //TX_B_POST_FILT_1 +323 0x2000 //TX_B_POST_FILT_1 324 0x2000 //TX_B_POST_FILT_2 325 0x2000 //TX_B_POST_FILT_3 326 0x2000 //TX_B_POST_FILT_4 327 0x2000 //TX_B_POST_FILT_5 -328 0x2000 //TX_B_POST_FILT_6 +328 0x0400 //TX_B_POST_FILT_6 329 0x2000 //TX_B_POST_FILT_7 330 0x7FFF //TX_B_LESSCUT_RTO_S_0 331 0x7FFF //TX_B_LESSCUT_RTO_S_1 @@ -28439,7 +43095,7 @@ 364 0x0000 //TX_K_APT 365 0x0001 //TX_NOISEDET 366 0x0190 //TX_NDETCT -367 0x000A //TX_NOISE_TH_0 +367 0x003B //TX_NOISE_TH_0 368 0x1B58 //TX_NOISE_TH_0_2 369 0x2134 //TX_NOISE_TH_0_3 370 0x02BC //TX_NOISE_TH_1 @@ -28451,11 +43107,11 @@ 376 0x0000 //TX_NOISE_TH_5_3 377 0x0000 //TX_NOISE_TH_5_4 378 0x0032 //TX_NOISE_TH_6 -379 0x0014 //TX_MINENOISE_TH -380 0x4000 //TX_MINENOISE_MIC0_TH_MTS -381 0xFFEE //TX_MINENOISE_MIC0_TH_EXP -382 0x6000 //TX_MINENOISE_MIC0_S_TH_MTS -383 0xFFF3 //TX_MINENOISE_MIC0_S_TH_EXP +379 0x00C8 //TX_MINENOISE_TH +380 0xD508 //TX_MORENS_TFMASK_TH +381 0x0001 //TX_DRC_QUIET_FLOOR +382 0x3A98 //TX_RATIODTL_CUT_TH +383 0x0DAC //TX_DT_CUT_K1 384 0x00A5 //TX_OUT_ENER_S_TH_CLEAN 385 0x00A5 //TX_OUT_ENER_S_TH_LESSCLEAN 386 0x00A5 //TX_OUT_ENER_S_TH_NOISY @@ -28463,22 +43119,22 @@ 388 0x00CE //TX_OUT_ENER_TH_SPEECH 389 0x2000 //TX_SN_NPB_GAIN 390 0x0000 //TX_NN_NPB_GAIN -391 0x0000 //TX_CSX_ALPHA_0 -392 0x0000 //TX_CSX_ALPHA_1 -393 0x0000 //TX_CSX_ALPHA_2 -394 0x0000 //TX_CSX_ALPHA_3 -395 0x0800 //TX_MU_ARSP_EST -396 0x00C8 //TX_P_OUTBEAM_MIN_TH +391 0x7FFF //TX_POST_MASK_SUP_HSNE +392 0x1388 //TX_TAIL_DET_TH +393 0x4000 //TX_B_LESSCUT_RTO_WTA +394 0x0000 //TX_MEL_G_R +395 0x0080 //TX_SUPHIGH_TH +396 0x0000 //TX_MASK_G_R 397 0x0002 //TX_EXTRA_NS_L -398 0x0800 //TX_EXTRA_NS_A -399 0x0005 //TX_VR_NOISE_FLOOR_TH +398 0x1800 //TX_C_POST_FLT_MASK +399 0x7FFF //TX_A_POST_FLT_WNS 400 0x0148 //TX_MIN_G_LOW300HZ 401 0x0002 //TX_MAXLEVEL_CNG 402 0x00B4 //TX_STN_NOISE_TH 403 0x4000 //TX_POST_MASK_SUP 404 0x7FFF //TX_POST_MASK_ADJUST 405 0x00C8 //TX_NS_ENOISE_MIC0_TH -406 0x0014 //TX_MINENOISE_MIC0_TH +406 0x0032 //TX_MINENOISE_MIC0_TH 407 0x012C //TX_MINENOISE_MIC0_S_TH 408 0x7FFF //TX_MIN_G_CTRL_SSNS 409 0x0000 //TX_METAL_RTO_THR @@ -28586,16 +43242,16 @@ 511 0x6666 //TX_MIC_TO_BFGAIN 512 0x0000 //TX_MICTOBFGAIN0 513 0x0000 //TX_FASTMUE_TH -514 0x0000 //TX_DERVB_LEN_0 -515 0x0000 //TX_DERVB_LEN_1 -516 0x0000 //TX_RHO_DERVB -517 0x0000 //TX_MIC_INDX_DERVB -518 0x0000 //TX_MU_DERVB -519 0x0000 //TX_DR_RESRV_0 -520 0x0000 //TX_DR_RESRV_1 -521 0x0000 //TX_DR_RESRV_2 -522 0x0000 //TX_DR_RESRV_3 -523 0x0000 //TX_DR_RESRV_4 +514 0xC000 //TX_DEREVERB_LF_MU +515 0xC000 //TX_DEREVERB_HF_MU +516 0xCCCC //TX_DEREVERB_DELAY +517 0xD999 //TX_DEREVERB_COEF_LEN +518 0x1F40 //TX_DEREVERB_DNR +519 0x0000 //TX_DEREVERB_ALPHA +520 0x0000 //TX_DEREVERB_BETA +521 0x0000 //TX_GSC_RTOL_TH +522 0x7000 //TX_GSC_RTOH_TH +523 0x0064 //TX_WIDE2_MEANHTH 524 0x0000 //TX_DR_RESRV_5 525 0x0000 //TX_DR_RESRV_6 526 0x0000 //TX_DR_RESRV_7 @@ -28963,14 +43619,79 @@ 888 0x00C8 //TX_FASTNS_ARSPC_TH 889 0xC000 //TX_FASTNS_MASK5_TH 890 0x4848 //TX_POSTSSA_MIN_G_VR_MASK -891 0x7FFF //TX_A_LESSCUT_RTO_MASK +891 0x4000 //TX_A_LESSCUT_RTO_MASK 892 0x1770 //TX_FASTNS_NOISETH 893 0xC000 //TX_FASTNS_SSA_THLFL 894 0xC000 //TX_FASTNS_SSA_THHFL 895 0xCCCC //TX_FASTNS_SSA_THLFH 896 0xD999 //TX_FASTNS_SSA_THHFH +897 0x2339 //TX_SENDFUNC_REG_MICMUTE +898 0x0021 //TX_SENDFUNC_REG_MICMUTE1 +899 0x02BC //TX_MICMUTE_RATIO_THR +900 0x0140 //TX_MICMUTE_AMP_THR +901 0x0004 //TX_MICMUTE_HPF_IND +902 0x00C0 //TX_MICMUTE_LOG_EYR_TH +903 0x0008 //TX_MICMUTE_CVG_TIME +904 0x0008 //TX_MICMUTE_RELEASE_TIME +905 0x01FE //TX_MIC_VOLUME_MIC0MUTE +906 0x0020 //TX_MICMUTE_EPD_OFFSET_0 +907 0x001E //TX_MICMUTE_FRQ_AEC_L +908 0x7999 //TX_MICMUTE_EAD_THR +909 0x7FFF //TX_MICMUTE_LAMBDA_CB_NLE +910 0x7FFF //TX_MICMUTE_LAMBDA_RE_EST +911 0x4000 //TX_DTD_THR1_MICMUTE_0 +912 0x7000 //TX_DTD_THR1_MICMUTE_1 +913 0x7FFF //TX_DTD_THR1_MICMUTE_2 +914 0x7FFF //TX_DTD_THR1_MICMUTE_3 +915 0x6CCC //TX_DTD_THR2_MICMUTE_0 +916 0x0400 //TX_MICMUTE_MIN_EQ_RE_EST_0 +917 0x0400 //TX_MICMUTE_MIN_EQ_RE_EST_1 +918 0x1000 //TX_MICMUTE_MIN_EQ_RE_EST_2 +919 0x7FFF //TX_MICMUTE_MIN_EQ_RE_EST_3 +920 0x7FFF //TX_MICMUTE_MIN_EQ_RE_EST_4 +921 0x4000 //TX_MICMUTE_C_POST_FLT +922 0x03E8 //TX_MICMUTE_DT_CUT_K +923 0x0001 //TX_MICMUTE_DT_CUT_THR +924 0x03E8 //TX_MICMUTE_DT_CUT_K2 +925 0x0001 //TX_MICMUTE_DT_CUT_THR2 +926 0x0064 //TX_MICMUTE_DT2_HOLD_N +927 0x1000 //TX_MICMUTE_RATIODTH_THCUT +928 0x1000 //TX_MICMUTE_B_POST_FLT_ECHOL +929 0x7FFF //TX_MICMUTE_B_POST_FLT_ECHOH +930 0x0400 //TX_MICMUTE_C_POST_FLT_MASK +931 0x7999 //TX_MICMUTE_RATIODTL_CUT_TH +932 0x0258 //TX_MICMUTE_DT_CUT_K1 +933 0x0800 //TX_MICMUTE_N2_SN_EST +934 0xFC00 //TX_MICMUTE_THR_SN_EST_0 +935 0x001C //TX_MICMUTE_MIN_G_CTRL_0 +936 0x6000 //TX_MICMUTE_A_POST_FILT_S_0 +937 0x7000 //TX_MICMUTE_B_POST_FILT_0 +938 0x2710 //TX_MIC1RUB_AMP_THR +939 0x0010 //TX_MIC1MUTE_RATIO_THR +940 0x0450 //TX_MIC1MUTE_AMP_THR +941 0x0008 //TX_MIC1MUTE_CVG_TIME +942 0x0008 //TX_MIC1MUTE_RELEASE_TIME +943 0x0000 //TX_AMS_RESRV_01 +944 0x0000 //TX_AMS_RESRV_02 +945 0x0000 //TX_AMS_RESRV_03 +946 0x0000 //TX_AMS_RESRV_04 +947 0x0000 //TX_AMS_RESRV_05 +948 0x0000 //TX_AMS_RESRV_06 +949 0x0000 //TX_AMS_RESRV_07 +950 0x0000 //TX_AMS_RESRV_08 +951 0x0000 //TX_AMS_RESRV_09 +952 0x0000 //TX_AMS_RESRV_10 +953 0x0000 //TX_AMS_RESRV_11 +954 0x0000 //TX_AMS_RESRV_12 +955 0x0000 //TX_AMS_RESRV_13 +956 0x0000 //TX_AMS_RESRV_14 +957 0x0000 //TX_AMS_RESRV_15 +958 0x0000 //TX_AMS_RESRV_16 +959 0x0000 //TX_AMS_RESRV_17 +960 0x0000 //TX_AMS_RESRV_18 +961 0x0000 //TX_AMS_RESRV_19 #RX -0 0x0024 //RX_RECVFUNC_MODE_0 +0 0x2024 //RX_RECVFUNC_MODE_0 1 0x0000 //RX_RECVFUNC_MODE_1 2 0x0000 //RX_SAMPLINGFREQ_SIG 3 0x0000 //RX_SAMPLINGFREQ_PROC @@ -29820,11 +44541,862 @@ 110 0x0000 //RX_FDDRC_RESRV_0 129 0x0100 //RX_SPK_VOL 130 0x0000 //RX_VOL_RESRV_0 +#RX 2 +157 0x2024 //RX_RECVFUNC_MODE_0 +158 0x0000 //RX_RECVFUNC_MODE_1 +159 0x0000 //RX_SAMPLINGFREQ_SIG +160 0x0000 //RX_SAMPLINGFREQ_PROC +161 0x000A //RX_FRAME_SZ +162 0x0000 //RX_DELAY_OPT +163 0x3000 //RX_TDDRC_ALPHA_UP_1 +164 0x3000 //RX_TDDRC_ALPHA_UP_2 +165 0x3000 //RX_TDDRC_ALPHA_UP_3 +166 0x3000 //RX_TDDRC_ALPHA_UP_4 +167 0x0800 //RX_PGA +168 0x7FFF //RX_A_HP +169 0x0000 //RX_B_PE +170 0x3800 //RX_THR_PITCH_DET_0 +171 0x3000 //RX_THR_PITCH_DET_1 +172 0x2800 //RX_THR_PITCH_DET_2 +173 0x0008 //RX_PITCH_BFR_LEN +174 0x0003 //RX_SBD_PITCH_DET +175 0x0100 //RX_PP_RESRV_0 +176 0x0020 //RX_PP_RESRV_1 +177 0x0600 //RX_N_SN_EST +178 0x000C //RX_N2_SN_EST +179 0x0010 //RX_NS_LVL_CTRL +180 0xF800 //RX_THR_SN_EST +181 0x7CCD //RX_LAMBDA_PFILT +182 0x000A //RX_FENS_RESRV_0 +183 0x0190 //RX_FENS_RESRV_1 +184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +187 0x0002 //RX_EXTRA_NS_L +188 0x0800 //RX_EXTRA_NS_A +189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +190 0x7FFF //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +192 0x199A //RX_A_POST_FLT +193 0x0000 //RX_LMT_THRD +194 0x4000 //RX_LMT_ALPHA +195 0x0014 //RX_FDEQ_SUBNUM +196 0x4848 //RX_FDEQ_GAIN_0 +197 0x4848 //RX_FDEQ_GAIN_1 +198 0x4848 //RX_FDEQ_GAIN_2 +199 0x4848 //RX_FDEQ_GAIN_3 +200 0x4848 //RX_FDEQ_GAIN_4 +201 0x4848 //RX_FDEQ_GAIN_5 +202 0x4848 //RX_FDEQ_GAIN_6 +203 0x4848 //RX_FDEQ_GAIN_7 +204 0x4848 //RX_FDEQ_GAIN_8 +205 0x4848 //RX_FDEQ_GAIN_9 +206 0x4848 //RX_FDEQ_GAIN_10 +207 0x4848 //RX_FDEQ_GAIN_11 +208 0x4848 //RX_FDEQ_GAIN_12 +209 0x4848 //RX_FDEQ_GAIN_13 +210 0x4848 //RX_FDEQ_GAIN_14 +211 0x4848 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0202 //RX_FDEQ_BIN_0 +221 0x0203 //RX_FDEQ_BIN_1 +222 0x0303 //RX_FDEQ_BIN_2 +223 0x0304 //RX_FDEQ_BIN_3 +224 0x0405 //RX_FDEQ_BIN_4 +225 0x0506 //RX_FDEQ_BIN_5 +226 0x0708 //RX_FDEQ_BIN_6 +227 0x090A //RX_FDEQ_BIN_7 +228 0x0B0C //RX_FDEQ_BIN_8 +229 0x0D08 //RX_FDEQ_BIN_9 +230 0x0000 //RX_FDEQ_BIN_10 +231 0x0000 //RX_FDEQ_BIN_11 +232 0x0000 //RX_FDEQ_BIN_12 +233 0x0000 //RX_FDEQ_BIN_13 +234 0x0000 //RX_FDEQ_BIN_14 +235 0x0000 //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x4000 //RX_FDEQ_RESRV_0 +245 0x0320 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0030 //RX_FDDRC_BAND_MARGIN_1 +248 0x0050 //RX_FDDRC_BAND_MARGIN_2 +249 0x0080 //RX_FDDRC_BAND_MARGIN_3 +250 0x0007 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x5000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x6400 //RX_FDDRC_THRD_3_2 +258 0x6400 //RX_FDDRC_THRD_3_3 +259 0x2000 //RX_FDDRC_SLANT_0_0 +260 0x2000 //RX_FDDRC_SLANT_0_1 +261 0x2000 //RX_FDDRC_SLANT_0_2 +262 0x2000 //RX_FDDRC_SLANT_0_3 +263 0x5333 //RX_FDDRC_SLANT_1_0 +264 0x5333 //RX_FDDRC_SLANT_1_1 +265 0x5333 //RX_FDDRC_SLANT_1_2 +266 0x5333 //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +268 0x0002 //RX_FILTINDX +269 0x0000 //RX_TDDRC_THRD_0 +270 0x0000 //RX_TDDRC_THRD_1 +271 0x2030 //RX_TDDRC_THRD_2 +272 0x2030 //RX_TDDRC_THRD_3 +273 0x0800 //RX_TDDRC_SLANT_0 +274 0x7EB8 //RX_TDDRC_SLANT_1 +275 0x3000 //RX_TDDRC_ALPHA_UP_0 +276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x199A //RX_TDDRC_HMNC_GAIN +279 0x0001 //RX_TDDRC_SMT_FLAG +280 0x0CCD //RX_TDDRC_SMT_W +281 0x0478 //RX_TDDRC_DRC_GAIN +282 0x7C00 //RX_LAMBDA_PKA_FP +283 0x2000 //RX_TPKA_FP +284 0x2000 //RX_MIN_G_FP +285 0x0080 //RX_MAX_G_FP +286 0x000C //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 +288 0x0000 //RX_MAXLEVEL_CNG +289 0x3000 //RX_BWE_UV_TH +290 0x3000 //RX_BWE_UV_TH2 +291 0x1800 //RX_BWE_UV_TH3 +292 0x1000 //RX_BWE_V_TH +293 0x04CD //RX_BWE_GAIN1_V_TH1 +294 0x0F33 //RX_BWE_GAIN1_V_TH2 +295 0x7333 //RX_BWE_UV_EQ +296 0x199A //RX_BWE_V_EQ +297 0x7333 //RX_BWE_TONE_TH +298 0x0004 //RX_BWE_UV_HOLD_T +299 0x6CCD //RX_BWE_GAIN2_ALPHA +300 0x799A //RX_BWE_GAIN3_ALPHA +301 0x001E //RX_BWE_CUTOFF +302 0x3000 //RX_BWE_GAINFILL +303 0x3200 //RX_BWE_MAXTH_TONE +304 0x2000 //RX_BWE_EQ_0 +305 0x2000 //RX_BWE_EQ_1 +306 0x2000 //RX_BWE_EQ_2 +307 0x2000 //RX_BWE_EQ_3 +308 0x2000 //RX_BWE_EQ_4 +309 0x2000 //RX_BWE_EQ_5 +310 0x2000 //RX_BWE_EQ_6 +311 0x0000 //RX_BWE_RESRV_0 +312 0x0000 //RX_BWE_RESRV_1 +313 0x0000 //RX_BWE_RESRV_2 +#VOL 0 +163 0x3000 //RX_TDDRC_ALPHA_UP_1 +164 0x3000 //RX_TDDRC_ALPHA_UP_2 +165 0x3000 //RX_TDDRC_ALPHA_UP_3 +166 0x3000 //RX_TDDRC_ALPHA_UP_4 +184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +190 0x7FFF //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +269 0x0000 //RX_TDDRC_THRD_0 +270 0x0000 //RX_TDDRC_THRD_1 +271 0x2030 //RX_TDDRC_THRD_2 +272 0x2030 //RX_TDDRC_THRD_3 +273 0x0800 //RX_TDDRC_SLANT_0 +274 0x7EB8 //RX_TDDRC_SLANT_1 +275 0x3000 //RX_TDDRC_ALPHA_UP_0 +276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x199A //RX_TDDRC_HMNC_GAIN +279 0x0001 //RX_TDDRC_SMT_FLAG +280 0x0CCD //RX_TDDRC_SMT_W +281 0x0478 //RX_TDDRC_DRC_GAIN +195 0x0014 //RX_FDEQ_SUBNUM +196 0x4848 //RX_FDEQ_GAIN_0 +197 0x4848 //RX_FDEQ_GAIN_1 +198 0x4848 //RX_FDEQ_GAIN_2 +199 0x4848 //RX_FDEQ_GAIN_3 +200 0x4848 //RX_FDEQ_GAIN_4 +201 0x4848 //RX_FDEQ_GAIN_5 +202 0x4848 //RX_FDEQ_GAIN_6 +203 0x4848 //RX_FDEQ_GAIN_7 +204 0x4848 //RX_FDEQ_GAIN_8 +205 0x4848 //RX_FDEQ_GAIN_9 +206 0x4848 //RX_FDEQ_GAIN_10 +207 0x4848 //RX_FDEQ_GAIN_11 +208 0x4848 //RX_FDEQ_GAIN_12 +209 0x4848 //RX_FDEQ_GAIN_13 +210 0x4848 //RX_FDEQ_GAIN_14 +211 0x4848 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0202 //RX_FDEQ_BIN_0 +221 0x0203 //RX_FDEQ_BIN_1 +222 0x0303 //RX_FDEQ_BIN_2 +223 0x0304 //RX_FDEQ_BIN_3 +224 0x0405 //RX_FDEQ_BIN_4 +225 0x0506 //RX_FDEQ_BIN_5 +226 0x0708 //RX_FDEQ_BIN_6 +227 0x090A //RX_FDEQ_BIN_7 +228 0x0B0C //RX_FDEQ_BIN_8 +229 0x0D08 //RX_FDEQ_BIN_9 +230 0x0000 //RX_FDEQ_BIN_10 +231 0x0000 //RX_FDEQ_BIN_11 +232 0x0000 //RX_FDEQ_BIN_12 +233 0x0000 //RX_FDEQ_BIN_13 +234 0x0000 //RX_FDEQ_BIN_14 +235 0x0000 //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x4000 //RX_FDEQ_RESRV_0 +245 0x0320 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0030 //RX_FDDRC_BAND_MARGIN_1 +248 0x0050 //RX_FDDRC_BAND_MARGIN_2 +249 0x0080 //RX_FDDRC_BAND_MARGIN_3 +250 0x0007 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x5000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x6400 //RX_FDDRC_THRD_3_2 +258 0x6400 //RX_FDDRC_THRD_3_3 +259 0x2000 //RX_FDDRC_SLANT_0_0 +260 0x2000 //RX_FDDRC_SLANT_0_1 +261 0x2000 //RX_FDDRC_SLANT_0_2 +262 0x2000 //RX_FDDRC_SLANT_0_3 +263 0x5333 //RX_FDDRC_SLANT_1_0 +264 0x5333 //RX_FDDRC_SLANT_1_1 +265 0x5333 //RX_FDDRC_SLANT_1_2 +266 0x5333 //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +286 0x000C //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 +#VOL 1 +163 0x3000 //RX_TDDRC_ALPHA_UP_1 +164 0x3000 //RX_TDDRC_ALPHA_UP_2 +165 0x3000 //RX_TDDRC_ALPHA_UP_3 +166 0x3000 //RX_TDDRC_ALPHA_UP_4 +184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +190 0x7FFF //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +269 0x0000 //RX_TDDRC_THRD_0 +270 0x0000 //RX_TDDRC_THRD_1 +271 0x2030 //RX_TDDRC_THRD_2 +272 0x2030 //RX_TDDRC_THRD_3 +273 0x0800 //RX_TDDRC_SLANT_0 +274 0x7EB8 //RX_TDDRC_SLANT_1 +275 0x3000 //RX_TDDRC_ALPHA_UP_0 +276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x199A //RX_TDDRC_HMNC_GAIN +279 0x0001 //RX_TDDRC_SMT_FLAG +280 0x0CCD //RX_TDDRC_SMT_W +281 0x0478 //RX_TDDRC_DRC_GAIN +195 0x0014 //RX_FDEQ_SUBNUM +196 0x4848 //RX_FDEQ_GAIN_0 +197 0x4848 //RX_FDEQ_GAIN_1 +198 0x4848 //RX_FDEQ_GAIN_2 +199 0x4848 //RX_FDEQ_GAIN_3 +200 0x4848 //RX_FDEQ_GAIN_4 +201 0x4848 //RX_FDEQ_GAIN_5 +202 0x4848 //RX_FDEQ_GAIN_6 +203 0x4848 //RX_FDEQ_GAIN_7 +204 0x4848 //RX_FDEQ_GAIN_8 +205 0x4848 //RX_FDEQ_GAIN_9 +206 0x4848 //RX_FDEQ_GAIN_10 +207 0x4848 //RX_FDEQ_GAIN_11 +208 0x4848 //RX_FDEQ_GAIN_12 +209 0x4848 //RX_FDEQ_GAIN_13 +210 0x4848 //RX_FDEQ_GAIN_14 +211 0x4848 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0202 //RX_FDEQ_BIN_0 +221 0x0203 //RX_FDEQ_BIN_1 +222 0x0303 //RX_FDEQ_BIN_2 +223 0x0304 //RX_FDEQ_BIN_3 +224 0x0405 //RX_FDEQ_BIN_4 +225 0x0506 //RX_FDEQ_BIN_5 +226 0x0708 //RX_FDEQ_BIN_6 +227 0x090A //RX_FDEQ_BIN_7 +228 0x0B0C //RX_FDEQ_BIN_8 +229 0x0D08 //RX_FDEQ_BIN_9 +230 0x0000 //RX_FDEQ_BIN_10 +231 0x0000 //RX_FDEQ_BIN_11 +232 0x0000 //RX_FDEQ_BIN_12 +233 0x0000 //RX_FDEQ_BIN_13 +234 0x0000 //RX_FDEQ_BIN_14 +235 0x0000 //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x4000 //RX_FDEQ_RESRV_0 +245 0x0320 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0030 //RX_FDDRC_BAND_MARGIN_1 +248 0x0050 //RX_FDDRC_BAND_MARGIN_2 +249 0x0080 //RX_FDDRC_BAND_MARGIN_3 +250 0x0007 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x5000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x6400 //RX_FDDRC_THRD_3_2 +258 0x6400 //RX_FDDRC_THRD_3_3 +259 0x2000 //RX_FDDRC_SLANT_0_0 +260 0x2000 //RX_FDDRC_SLANT_0_1 +261 0x2000 //RX_FDDRC_SLANT_0_2 +262 0x2000 //RX_FDDRC_SLANT_0_3 +263 0x5333 //RX_FDDRC_SLANT_1_0 +264 0x5333 //RX_FDDRC_SLANT_1_1 +265 0x5333 //RX_FDDRC_SLANT_1_2 +266 0x5333 //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +286 0x0014 //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 +#VOL 2 +163 0x3000 //RX_TDDRC_ALPHA_UP_1 +164 0x3000 //RX_TDDRC_ALPHA_UP_2 +165 0x3000 //RX_TDDRC_ALPHA_UP_3 +166 0x3000 //RX_TDDRC_ALPHA_UP_4 +184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +190 0x7FFF //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +269 0x0000 //RX_TDDRC_THRD_0 +270 0x0000 //RX_TDDRC_THRD_1 +271 0x2030 //RX_TDDRC_THRD_2 +272 0x2030 //RX_TDDRC_THRD_3 +273 0x0800 //RX_TDDRC_SLANT_0 +274 0x7EB8 //RX_TDDRC_SLANT_1 +275 0x3000 //RX_TDDRC_ALPHA_UP_0 +276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x199A //RX_TDDRC_HMNC_GAIN +279 0x0001 //RX_TDDRC_SMT_FLAG +280 0x0CCD //RX_TDDRC_SMT_W +281 0x0478 //RX_TDDRC_DRC_GAIN +195 0x0014 //RX_FDEQ_SUBNUM +196 0x4848 //RX_FDEQ_GAIN_0 +197 0x4848 //RX_FDEQ_GAIN_1 +198 0x4848 //RX_FDEQ_GAIN_2 +199 0x4848 //RX_FDEQ_GAIN_3 +200 0x4848 //RX_FDEQ_GAIN_4 +201 0x4848 //RX_FDEQ_GAIN_5 +202 0x4848 //RX_FDEQ_GAIN_6 +203 0x4848 //RX_FDEQ_GAIN_7 +204 0x4848 //RX_FDEQ_GAIN_8 +205 0x4848 //RX_FDEQ_GAIN_9 +206 0x4848 //RX_FDEQ_GAIN_10 +207 0x4848 //RX_FDEQ_GAIN_11 +208 0x4848 //RX_FDEQ_GAIN_12 +209 0x4848 //RX_FDEQ_GAIN_13 +210 0x4848 //RX_FDEQ_GAIN_14 +211 0x4848 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0202 //RX_FDEQ_BIN_0 +221 0x0203 //RX_FDEQ_BIN_1 +222 0x0303 //RX_FDEQ_BIN_2 +223 0x0304 //RX_FDEQ_BIN_3 +224 0x0405 //RX_FDEQ_BIN_4 +225 0x0506 //RX_FDEQ_BIN_5 +226 0x0708 //RX_FDEQ_BIN_6 +227 0x090A //RX_FDEQ_BIN_7 +228 0x0B0C //RX_FDEQ_BIN_8 +229 0x0D08 //RX_FDEQ_BIN_9 +230 0x0000 //RX_FDEQ_BIN_10 +231 0x0000 //RX_FDEQ_BIN_11 +232 0x0000 //RX_FDEQ_BIN_12 +233 0x0000 //RX_FDEQ_BIN_13 +234 0x0000 //RX_FDEQ_BIN_14 +235 0x0000 //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x4000 //RX_FDEQ_RESRV_0 +245 0x0320 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0030 //RX_FDDRC_BAND_MARGIN_1 +248 0x0050 //RX_FDDRC_BAND_MARGIN_2 +249 0x0080 //RX_FDDRC_BAND_MARGIN_3 +250 0x0007 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x5000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x6400 //RX_FDDRC_THRD_3_2 +258 0x6400 //RX_FDDRC_THRD_3_3 +259 0x2000 //RX_FDDRC_SLANT_0_0 +260 0x2000 //RX_FDDRC_SLANT_0_1 +261 0x2000 //RX_FDDRC_SLANT_0_2 +262 0x2000 //RX_FDDRC_SLANT_0_3 +263 0x5333 //RX_FDDRC_SLANT_1_0 +264 0x5333 //RX_FDDRC_SLANT_1_1 +265 0x5333 //RX_FDDRC_SLANT_1_2 +266 0x5333 //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +286 0x0021 //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 +#VOL 3 +163 0x3000 //RX_TDDRC_ALPHA_UP_1 +164 0x3000 //RX_TDDRC_ALPHA_UP_2 +165 0x3000 //RX_TDDRC_ALPHA_UP_3 +166 0x3000 //RX_TDDRC_ALPHA_UP_4 +184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +190 0x7FFF //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +269 0x0000 //RX_TDDRC_THRD_0 +270 0x0000 //RX_TDDRC_THRD_1 +271 0x2030 //RX_TDDRC_THRD_2 +272 0x2030 //RX_TDDRC_THRD_3 +273 0x0800 //RX_TDDRC_SLANT_0 +274 0x7EB8 //RX_TDDRC_SLANT_1 +275 0x3000 //RX_TDDRC_ALPHA_UP_0 +276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x199A //RX_TDDRC_HMNC_GAIN +279 0x0001 //RX_TDDRC_SMT_FLAG +280 0x0CCD //RX_TDDRC_SMT_W +281 0x0478 //RX_TDDRC_DRC_GAIN +195 0x0014 //RX_FDEQ_SUBNUM +196 0x4848 //RX_FDEQ_GAIN_0 +197 0x4848 //RX_FDEQ_GAIN_1 +198 0x4848 //RX_FDEQ_GAIN_2 +199 0x4848 //RX_FDEQ_GAIN_3 +200 0x4848 //RX_FDEQ_GAIN_4 +201 0x4848 //RX_FDEQ_GAIN_5 +202 0x4848 //RX_FDEQ_GAIN_6 +203 0x4848 //RX_FDEQ_GAIN_7 +204 0x4848 //RX_FDEQ_GAIN_8 +205 0x4848 //RX_FDEQ_GAIN_9 +206 0x4848 //RX_FDEQ_GAIN_10 +207 0x4848 //RX_FDEQ_GAIN_11 +208 0x4848 //RX_FDEQ_GAIN_12 +209 0x4848 //RX_FDEQ_GAIN_13 +210 0x4848 //RX_FDEQ_GAIN_14 +211 0x4848 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0202 //RX_FDEQ_BIN_0 +221 0x0203 //RX_FDEQ_BIN_1 +222 0x0303 //RX_FDEQ_BIN_2 +223 0x0304 //RX_FDEQ_BIN_3 +224 0x0405 //RX_FDEQ_BIN_4 +225 0x0506 //RX_FDEQ_BIN_5 +226 0x0708 //RX_FDEQ_BIN_6 +227 0x090A //RX_FDEQ_BIN_7 +228 0x0B0C //RX_FDEQ_BIN_8 +229 0x0D08 //RX_FDEQ_BIN_9 +230 0x0000 //RX_FDEQ_BIN_10 +231 0x0000 //RX_FDEQ_BIN_11 +232 0x0000 //RX_FDEQ_BIN_12 +233 0x0000 //RX_FDEQ_BIN_13 +234 0x0000 //RX_FDEQ_BIN_14 +235 0x0000 //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x4000 //RX_FDEQ_RESRV_0 +245 0x0320 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0030 //RX_FDDRC_BAND_MARGIN_1 +248 0x0050 //RX_FDDRC_BAND_MARGIN_2 +249 0x0080 //RX_FDDRC_BAND_MARGIN_3 +250 0x0007 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x5000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x6400 //RX_FDDRC_THRD_3_2 +258 0x6400 //RX_FDDRC_THRD_3_3 +259 0x2000 //RX_FDDRC_SLANT_0_0 +260 0x2000 //RX_FDDRC_SLANT_0_1 +261 0x2000 //RX_FDDRC_SLANT_0_2 +262 0x2000 //RX_FDDRC_SLANT_0_3 +263 0x5333 //RX_FDDRC_SLANT_1_0 +264 0x5333 //RX_FDDRC_SLANT_1_1 +265 0x5333 //RX_FDDRC_SLANT_1_2 +266 0x5333 //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +286 0x0037 //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 +#VOL 4 +163 0x3000 //RX_TDDRC_ALPHA_UP_1 +164 0x3000 //RX_TDDRC_ALPHA_UP_2 +165 0x3000 //RX_TDDRC_ALPHA_UP_3 +166 0x3000 //RX_TDDRC_ALPHA_UP_4 +184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +190 0x7FFF //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +269 0x0000 //RX_TDDRC_THRD_0 +270 0x0000 //RX_TDDRC_THRD_1 +271 0x2030 //RX_TDDRC_THRD_2 +272 0x2030 //RX_TDDRC_THRD_3 +273 0x0800 //RX_TDDRC_SLANT_0 +274 0x7EB8 //RX_TDDRC_SLANT_1 +275 0x3000 //RX_TDDRC_ALPHA_UP_0 +276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x199A //RX_TDDRC_HMNC_GAIN +279 0x0001 //RX_TDDRC_SMT_FLAG +280 0x0CCD //RX_TDDRC_SMT_W +281 0x0478 //RX_TDDRC_DRC_GAIN +195 0x0014 //RX_FDEQ_SUBNUM +196 0x4848 //RX_FDEQ_GAIN_0 +197 0x4848 //RX_FDEQ_GAIN_1 +198 0x4848 //RX_FDEQ_GAIN_2 +199 0x4848 //RX_FDEQ_GAIN_3 +200 0x4848 //RX_FDEQ_GAIN_4 +201 0x4848 //RX_FDEQ_GAIN_5 +202 0x4848 //RX_FDEQ_GAIN_6 +203 0x4848 //RX_FDEQ_GAIN_7 +204 0x4848 //RX_FDEQ_GAIN_8 +205 0x4848 //RX_FDEQ_GAIN_9 +206 0x4848 //RX_FDEQ_GAIN_10 +207 0x4848 //RX_FDEQ_GAIN_11 +208 0x4848 //RX_FDEQ_GAIN_12 +209 0x4848 //RX_FDEQ_GAIN_13 +210 0x4848 //RX_FDEQ_GAIN_14 +211 0x4848 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0202 //RX_FDEQ_BIN_0 +221 0x0203 //RX_FDEQ_BIN_1 +222 0x0303 //RX_FDEQ_BIN_2 +223 0x0304 //RX_FDEQ_BIN_3 +224 0x0405 //RX_FDEQ_BIN_4 +225 0x0506 //RX_FDEQ_BIN_5 +226 0x0708 //RX_FDEQ_BIN_6 +227 0x090A //RX_FDEQ_BIN_7 +228 0x0B0C //RX_FDEQ_BIN_8 +229 0x0D08 //RX_FDEQ_BIN_9 +230 0x0000 //RX_FDEQ_BIN_10 +231 0x0000 //RX_FDEQ_BIN_11 +232 0x0000 //RX_FDEQ_BIN_12 +233 0x0000 //RX_FDEQ_BIN_13 +234 0x0000 //RX_FDEQ_BIN_14 +235 0x0000 //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x4000 //RX_FDEQ_RESRV_0 +245 0x0320 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0030 //RX_FDDRC_BAND_MARGIN_1 +248 0x0050 //RX_FDDRC_BAND_MARGIN_2 +249 0x0080 //RX_FDDRC_BAND_MARGIN_3 +250 0x0007 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x5000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x6400 //RX_FDDRC_THRD_3_2 +258 0x6400 //RX_FDDRC_THRD_3_3 +259 0x2000 //RX_FDDRC_SLANT_0_0 +260 0x2000 //RX_FDDRC_SLANT_0_1 +261 0x2000 //RX_FDDRC_SLANT_0_2 +262 0x2000 //RX_FDDRC_SLANT_0_3 +263 0x5333 //RX_FDDRC_SLANT_1_0 +264 0x5333 //RX_FDDRC_SLANT_1_1 +265 0x5333 //RX_FDDRC_SLANT_1_2 +266 0x5333 //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +286 0x005B //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 +#VOL 5 +163 0x3000 //RX_TDDRC_ALPHA_UP_1 +164 0x3000 //RX_TDDRC_ALPHA_UP_2 +165 0x3000 //RX_TDDRC_ALPHA_UP_3 +166 0x3000 //RX_TDDRC_ALPHA_UP_4 +184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +190 0x7FFF //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +269 0x0000 //RX_TDDRC_THRD_0 +270 0x0000 //RX_TDDRC_THRD_1 +271 0x2030 //RX_TDDRC_THRD_2 +272 0x2030 //RX_TDDRC_THRD_3 +273 0x0800 //RX_TDDRC_SLANT_0 +274 0x7EB8 //RX_TDDRC_SLANT_1 +275 0x3000 //RX_TDDRC_ALPHA_UP_0 +276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x199A //RX_TDDRC_HMNC_GAIN +279 0x0001 //RX_TDDRC_SMT_FLAG +280 0x0CCD //RX_TDDRC_SMT_W +281 0x0478 //RX_TDDRC_DRC_GAIN +195 0x0014 //RX_FDEQ_SUBNUM +196 0x4848 //RX_FDEQ_GAIN_0 +197 0x4848 //RX_FDEQ_GAIN_1 +198 0x4848 //RX_FDEQ_GAIN_2 +199 0x4848 //RX_FDEQ_GAIN_3 +200 0x4848 //RX_FDEQ_GAIN_4 +201 0x4848 //RX_FDEQ_GAIN_5 +202 0x4848 //RX_FDEQ_GAIN_6 +203 0x4848 //RX_FDEQ_GAIN_7 +204 0x4848 //RX_FDEQ_GAIN_8 +205 0x4848 //RX_FDEQ_GAIN_9 +206 0x4848 //RX_FDEQ_GAIN_10 +207 0x4848 //RX_FDEQ_GAIN_11 +208 0x4848 //RX_FDEQ_GAIN_12 +209 0x4848 //RX_FDEQ_GAIN_13 +210 0x4848 //RX_FDEQ_GAIN_14 +211 0x4848 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0202 //RX_FDEQ_BIN_0 +221 0x0203 //RX_FDEQ_BIN_1 +222 0x0303 //RX_FDEQ_BIN_2 +223 0x0304 //RX_FDEQ_BIN_3 +224 0x0405 //RX_FDEQ_BIN_4 +225 0x0506 //RX_FDEQ_BIN_5 +226 0x0708 //RX_FDEQ_BIN_6 +227 0x090A //RX_FDEQ_BIN_7 +228 0x0B0C //RX_FDEQ_BIN_8 +229 0x0D08 //RX_FDEQ_BIN_9 +230 0x0000 //RX_FDEQ_BIN_10 +231 0x0000 //RX_FDEQ_BIN_11 +232 0x0000 //RX_FDEQ_BIN_12 +233 0x0000 //RX_FDEQ_BIN_13 +234 0x0000 //RX_FDEQ_BIN_14 +235 0x0000 //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x4000 //RX_FDEQ_RESRV_0 +245 0x0320 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0030 //RX_FDDRC_BAND_MARGIN_1 +248 0x0050 //RX_FDDRC_BAND_MARGIN_2 +249 0x0080 //RX_FDDRC_BAND_MARGIN_3 +250 0x0007 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x5000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x6400 //RX_FDDRC_THRD_3_2 +258 0x6400 //RX_FDDRC_THRD_3_3 +259 0x2000 //RX_FDDRC_SLANT_0_0 +260 0x2000 //RX_FDDRC_SLANT_0_1 +261 0x2000 //RX_FDDRC_SLANT_0_2 +262 0x2000 //RX_FDDRC_SLANT_0_3 +263 0x5333 //RX_FDDRC_SLANT_1_0 +264 0x5333 //RX_FDDRC_SLANT_1_1 +265 0x5333 //RX_FDDRC_SLANT_1_2 +266 0x5333 //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +286 0x0099 //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 +#VOL 6 +163 0x3000 //RX_TDDRC_ALPHA_UP_1 +164 0x3000 //RX_TDDRC_ALPHA_UP_2 +165 0x3000 //RX_TDDRC_ALPHA_UP_3 +166 0x3000 //RX_TDDRC_ALPHA_UP_4 +184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +190 0x7FFF //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +269 0x0000 //RX_TDDRC_THRD_0 +270 0x0000 //RX_TDDRC_THRD_1 +271 0x2030 //RX_TDDRC_THRD_2 +272 0x2030 //RX_TDDRC_THRD_3 +273 0x0800 //RX_TDDRC_SLANT_0 +274 0x7EB8 //RX_TDDRC_SLANT_1 +275 0x3000 //RX_TDDRC_ALPHA_UP_0 +276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x199A //RX_TDDRC_HMNC_GAIN +279 0x0001 //RX_TDDRC_SMT_FLAG +280 0x0CCD //RX_TDDRC_SMT_W +281 0x0478 //RX_TDDRC_DRC_GAIN +195 0x0014 //RX_FDEQ_SUBNUM +196 0x4848 //RX_FDEQ_GAIN_0 +197 0x4848 //RX_FDEQ_GAIN_1 +198 0x4848 //RX_FDEQ_GAIN_2 +199 0x4848 //RX_FDEQ_GAIN_3 +200 0x4848 //RX_FDEQ_GAIN_4 +201 0x4848 //RX_FDEQ_GAIN_5 +202 0x4848 //RX_FDEQ_GAIN_6 +203 0x4848 //RX_FDEQ_GAIN_7 +204 0x4848 //RX_FDEQ_GAIN_8 +205 0x4848 //RX_FDEQ_GAIN_9 +206 0x4848 //RX_FDEQ_GAIN_10 +207 0x4848 //RX_FDEQ_GAIN_11 +208 0x4848 //RX_FDEQ_GAIN_12 +209 0x4848 //RX_FDEQ_GAIN_13 +210 0x4848 //RX_FDEQ_GAIN_14 +211 0x4848 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0202 //RX_FDEQ_BIN_0 +221 0x0203 //RX_FDEQ_BIN_1 +222 0x0303 //RX_FDEQ_BIN_2 +223 0x0304 //RX_FDEQ_BIN_3 +224 0x0405 //RX_FDEQ_BIN_4 +225 0x0506 //RX_FDEQ_BIN_5 +226 0x0708 //RX_FDEQ_BIN_6 +227 0x090A //RX_FDEQ_BIN_7 +228 0x0B0C //RX_FDEQ_BIN_8 +229 0x0D08 //RX_FDEQ_BIN_9 +230 0x0000 //RX_FDEQ_BIN_10 +231 0x0000 //RX_FDEQ_BIN_11 +232 0x0000 //RX_FDEQ_BIN_12 +233 0x0000 //RX_FDEQ_BIN_13 +234 0x0000 //RX_FDEQ_BIN_14 +235 0x0000 //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x4000 //RX_FDEQ_RESRV_0 +245 0x0320 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0030 //RX_FDDRC_BAND_MARGIN_1 +248 0x0050 //RX_FDDRC_BAND_MARGIN_2 +249 0x0080 //RX_FDDRC_BAND_MARGIN_3 +250 0x0007 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x5000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x6400 //RX_FDDRC_THRD_3_2 +258 0x6400 //RX_FDDRC_THRD_3_3 +259 0x2000 //RX_FDDRC_SLANT_0_0 +260 0x2000 //RX_FDDRC_SLANT_0_1 +261 0x2000 //RX_FDDRC_SLANT_0_2 +262 0x2000 //RX_FDDRC_SLANT_0_3 +263 0x5333 //RX_FDDRC_SLANT_1_0 +264 0x5333 //RX_FDDRC_SLANT_1_1 +265 0x5333 //RX_FDDRC_SLANT_1_2 +266 0x5333 //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +286 0x0100 //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 #CASE_NAME HEADSET-GOOGLE_CONDOR_CERTIFICATION1-VOICE_GENERIC-WB -#PARAM_MODE FULL -#PARAM_TYPE TX+RX -#TOTAL_CUSTOM_STEP 7 +#PARAM_MODE Full +#PARAM_TYPE TX+2RX +#TOTAL_CUSTOM_STEP 7+7 #TX 0 0x0009 //TX_OPERATION_MODE_0 1 0x0008 //TX_OPERATION_MODE_1 @@ -30068,7 +45640,7 @@ 239 0x0800 //TX_DT_RESRV_7 240 0x0800 //TX_DT_RESRV_8 241 0x0000 //TX_DT_RESRV_9 -242 0xF400 //TX_THR_SN_EST_0 +242 0xFA00 //TX_THR_SN_EST_0 243 0xF400 //TX_THR_SN_EST_1 244 0xF600 //TX_THR_SN_EST_2 245 0xF400 //TX_THR_SN_EST_3 @@ -30077,20 +45649,20 @@ 248 0xF400 //TX_THR_SN_EST_6 249 0xF600 //TX_THR_SN_EST_7 250 0x0000 //TX_DELTA_THR_SN_EST_0 -251 0x0000 //TX_DELTA_THR_SN_EST_1 +251 0x0200 //TX_DELTA_THR_SN_EST_1 252 0x0200 //TX_DELTA_THR_SN_EST_2 253 0x0200 //TX_DELTA_THR_SN_EST_3 254 0x0200 //TX_DELTA_THR_SN_EST_4 255 0x0200 //TX_DELTA_THR_SN_EST_5 -256 0x0200 //TX_DELTA_THR_SN_EST_6 +256 0x0000 //TX_DELTA_THR_SN_EST_6 257 0x0200 //TX_DELTA_THR_SN_EST_7 258 0x6000 //TX_LAMBDA_NN_EST_0 -259 0x6000 //TX_LAMBDA_NN_EST_1 +259 0x4000 //TX_LAMBDA_NN_EST_1 260 0x4000 //TX_LAMBDA_NN_EST_2 261 0x4000 //TX_LAMBDA_NN_EST_3 262 0x4000 //TX_LAMBDA_NN_EST_4 263 0x4000 //TX_LAMBDA_NN_EST_5 -264 0x4000 //TX_LAMBDA_NN_EST_6 +264 0x6000 //TX_LAMBDA_NN_EST_6 265 0x4000 //TX_LAMBDA_NN_EST_7 266 0x0400 //TX_N_SN_EST 267 0x001E //TX_INBEAM_T @@ -30108,16 +45680,16 @@ 279 0x1000 //TX_B_POST_FLT_0 280 0x1000 //TX_B_POST_FLT_1 281 0x000F //TX_NS_LVL_CTRL_0 -282 0x000F //TX_NS_LVL_CTRL_1 -283 0x0011 //TX_NS_LVL_CTRL_2 +282 0x0011 //TX_NS_LVL_CTRL_1 +283 0x000F //TX_NS_LVL_CTRL_2 284 0x000F //TX_NS_LVL_CTRL_3 285 0x000F //TX_NS_LVL_CTRL_4 286 0x000F //TX_NS_LVL_CTRL_5 287 0x000F //TX_NS_LVL_CTRL_6 288 0x0011 //TX_NS_LVL_CTRL_7 289 0x000C //TX_MIN_GAIN_S_0 -290 0x000C //TX_MIN_GAIN_S_1 -291 0x000F //TX_MIN_GAIN_S_2 +290 0x000F //TX_MIN_GAIN_S_1 +291 0x000C //TX_MIN_GAIN_S_2 292 0x000C //TX_MIN_GAIN_S_3 293 0x000C //TX_MIN_GAIN_S_4 294 0x000C //TX_MIN_GAIN_S_5 @@ -30141,12 +45713,12 @@ 312 0x7FFF //TX_A_POST_FILT_0 313 0x2000 //TX_A_POST_FILT_1 314 0x4000 //TX_A_POST_FILT_S_0 -315 0x4000 //TX_A_POST_FILT_S_1 +315 0x5000 //TX_A_POST_FILT_S_1 316 0x5000 //TX_A_POST_FILT_S_2 317 0x5000 //TX_A_POST_FILT_S_3 318 0x5000 //TX_A_POST_FILT_S_4 319 0x5000 //TX_A_POST_FILT_S_5 -320 0x5000 //TX_A_POST_FILT_S_6 +320 0x4000 //TX_A_POST_FILT_S_6 321 0x5000 //TX_A_POST_FILT_S_7 322 0x1000 //TX_B_POST_FILT_0 323 0x1000 //TX_B_POST_FILT_1 @@ -30193,7 +45765,7 @@ 364 0x0000 //TX_K_APT 365 0x0001 //TX_NOISEDET 366 0x0190 //TX_NDETCT -367 0x0050 //TX_NOISE_TH_0 +367 0x0102 //TX_NOISE_TH_0 368 0x7FFF //TX_NOISE_TH_0_2 369 0x7FFF //TX_NOISE_TH_0_3 370 0x07D0 //TX_NOISE_TH_1 @@ -30205,11 +45777,11 @@ 376 0x7FFF //TX_NOISE_TH_5_3 377 0x7FFF //TX_NOISE_TH_5_4 378 0x044C //TX_NOISE_TH_6 -379 0x0014 //TX_MINENOISE_TH -380 0x4000 //TX_MINENOISE_MIC0_TH_MTS -381 0xFFEE //TX_MINENOISE_MIC0_TH_EXP -382 0x6000 //TX_MINENOISE_MIC0_S_TH_MTS -383 0xFFF3 //TX_MINENOISE_MIC0_S_TH_EXP +379 0x00F8 //TX_MINENOISE_TH +380 0xD508 //TX_MORENS_TFMASK_TH +381 0x0001 //TX_DRC_QUIET_FLOOR +382 0x3A98 //TX_RATIODTL_CUT_TH +383 0x0DAC //TX_DT_CUT_K1 384 0x0666 //TX_OUT_ENER_S_TH_CLEAN 385 0x0666 //TX_OUT_ENER_S_TH_LESSCLEAN 386 0x0333 //TX_OUT_ENER_S_TH_NOISY @@ -30217,22 +45789,22 @@ 388 0x0333 //TX_OUT_ENER_TH_SPEECH 389 0x2000 //TX_SN_NPB_GAIN 390 0x0000 //TX_NN_NPB_GAIN -391 0x0000 //TX_CSX_ALPHA_0 -392 0x0000 //TX_CSX_ALPHA_1 -393 0x0000 //TX_CSX_ALPHA_2 -394 0x0000 //TX_CSX_ALPHA_3 -395 0x0800 //TX_MU_ARSP_EST -396 0x00C8 //TX_P_OUTBEAM_MIN_TH +391 0x7FFF //TX_POST_MASK_SUP_HSNE +392 0x1388 //TX_TAIL_DET_TH +393 0x4000 //TX_B_LESSCUT_RTO_WTA +394 0x0000 //TX_MEL_G_R +395 0x0080 //TX_SUPHIGH_TH +396 0x0000 //TX_MASK_G_R 397 0x0002 //TX_EXTRA_NS_L -398 0x0800 //TX_EXTRA_NS_A -399 0x0005 //TX_VR_NOISE_FLOOR_TH +398 0x1800 //TX_C_POST_FLT_MASK +399 0x7FFF //TX_A_POST_FLT_WNS 400 0x0148 //TX_MIN_G_LOW300HZ 401 0x0002 //TX_MAXLEVEL_CNG 402 0x00B4 //TX_STN_NOISE_TH 403 0x4000 //TX_POST_MASK_SUP 404 0x7FFF //TX_POST_MASK_ADJUST 405 0x00C8 //TX_NS_ENOISE_MIC0_TH -406 0x0014 //TX_MINENOISE_MIC0_TH +406 0x00DC //TX_MINENOISE_MIC0_TH 407 0x012C //TX_MINENOISE_MIC0_S_TH 408 0x7FFF //TX_MIN_G_CTRL_SSNS 409 0x0000 //TX_METAL_RTO_THR @@ -30340,16 +45912,16 @@ 511 0x6666 //TX_MIC_TO_BFGAIN 512 0x0000 //TX_MICTOBFGAIN0 513 0x0000 //TX_FASTMUE_TH -514 0x0000 //TX_DERVB_LEN_0 -515 0x0000 //TX_DERVB_LEN_1 -516 0x0000 //TX_RHO_DERVB -517 0x0000 //TX_MIC_INDX_DERVB -518 0x0000 //TX_MU_DERVB -519 0x0000 //TX_DR_RESRV_0 -520 0x0000 //TX_DR_RESRV_1 -521 0x0000 //TX_DR_RESRV_2 -522 0x0000 //TX_DR_RESRV_3 -523 0x0000 //TX_DR_RESRV_4 +514 0xC000 //TX_DEREVERB_LF_MU +515 0xC000 //TX_DEREVERB_HF_MU +516 0xCCCC //TX_DEREVERB_DELAY +517 0xD999 //TX_DEREVERB_COEF_LEN +518 0x1F40 //TX_DEREVERB_DNR +519 0x0000 //TX_DEREVERB_ALPHA +520 0x0000 //TX_DEREVERB_BETA +521 0x0000 //TX_GSC_RTOL_TH +522 0x7000 //TX_GSC_RTOH_TH +523 0x0064 //TX_WIDE2_MEANHTH 524 0x0000 //TX_DR_RESRV_5 525 0x0000 //TX_DR_RESRV_6 526 0x0000 //TX_DR_RESRV_7 @@ -30717,14 +46289,79 @@ 888 0x00C8 //TX_FASTNS_ARSPC_TH 889 0xC000 //TX_FASTNS_MASK5_TH 890 0x4848 //TX_POSTSSA_MIN_G_VR_MASK -891 0x7FFF //TX_A_LESSCUT_RTO_MASK +891 0x4000 //TX_A_LESSCUT_RTO_MASK 892 0x1770 //TX_FASTNS_NOISETH 893 0xC000 //TX_FASTNS_SSA_THLFL 894 0xC000 //TX_FASTNS_SSA_THHFL 895 0xCCCC //TX_FASTNS_SSA_THLFH 896 0xD999 //TX_FASTNS_SSA_THHFH +897 0x2339 //TX_SENDFUNC_REG_MICMUTE +898 0x0021 //TX_SENDFUNC_REG_MICMUTE1 +899 0x02BC //TX_MICMUTE_RATIO_THR +900 0x0140 //TX_MICMUTE_AMP_THR +901 0x0004 //TX_MICMUTE_HPF_IND +902 0x00C0 //TX_MICMUTE_LOG_EYR_TH +903 0x0008 //TX_MICMUTE_CVG_TIME +904 0x0008 //TX_MICMUTE_RELEASE_TIME +905 0x01FE //TX_MIC_VOLUME_MIC0MUTE +906 0x0020 //TX_MICMUTE_EPD_OFFSET_0 +907 0x001E //TX_MICMUTE_FRQ_AEC_L +908 0x7999 //TX_MICMUTE_EAD_THR +909 0x7FFF //TX_MICMUTE_LAMBDA_CB_NLE +910 0x7FFF //TX_MICMUTE_LAMBDA_RE_EST +911 0x4000 //TX_DTD_THR1_MICMUTE_0 +912 0x7000 //TX_DTD_THR1_MICMUTE_1 +913 0x7FFF //TX_DTD_THR1_MICMUTE_2 +914 0x7FFF //TX_DTD_THR1_MICMUTE_3 +915 0x6CCC //TX_DTD_THR2_MICMUTE_0 +916 0x0400 //TX_MICMUTE_MIN_EQ_RE_EST_0 +917 0x0400 //TX_MICMUTE_MIN_EQ_RE_EST_1 +918 0x1000 //TX_MICMUTE_MIN_EQ_RE_EST_2 +919 0x7FFF //TX_MICMUTE_MIN_EQ_RE_EST_3 +920 0x7FFF //TX_MICMUTE_MIN_EQ_RE_EST_4 +921 0x4000 //TX_MICMUTE_C_POST_FLT +922 0x03E8 //TX_MICMUTE_DT_CUT_K +923 0x0001 //TX_MICMUTE_DT_CUT_THR +924 0x03E8 //TX_MICMUTE_DT_CUT_K2 +925 0x0001 //TX_MICMUTE_DT_CUT_THR2 +926 0x0064 //TX_MICMUTE_DT2_HOLD_N +927 0x1000 //TX_MICMUTE_RATIODTH_THCUT +928 0x1000 //TX_MICMUTE_B_POST_FLT_ECHOL +929 0x7FFF //TX_MICMUTE_B_POST_FLT_ECHOH +930 0x0400 //TX_MICMUTE_C_POST_FLT_MASK +931 0x7999 //TX_MICMUTE_RATIODTL_CUT_TH +932 0x0258 //TX_MICMUTE_DT_CUT_K1 +933 0x0800 //TX_MICMUTE_N2_SN_EST +934 0xFC00 //TX_MICMUTE_THR_SN_EST_0 +935 0x001C //TX_MICMUTE_MIN_G_CTRL_0 +936 0x6000 //TX_MICMUTE_A_POST_FILT_S_0 +937 0x7000 //TX_MICMUTE_B_POST_FILT_0 +938 0x2710 //TX_MIC1RUB_AMP_THR +939 0x0010 //TX_MIC1MUTE_RATIO_THR +940 0x0450 //TX_MIC1MUTE_AMP_THR +941 0x0008 //TX_MIC1MUTE_CVG_TIME +942 0x0008 //TX_MIC1MUTE_RELEASE_TIME +943 0x0000 //TX_AMS_RESRV_01 +944 0x0000 //TX_AMS_RESRV_02 +945 0x0000 //TX_AMS_RESRV_03 +946 0x0000 //TX_AMS_RESRV_04 +947 0x0000 //TX_AMS_RESRV_05 +948 0x0000 //TX_AMS_RESRV_06 +949 0x0000 //TX_AMS_RESRV_07 +950 0x0000 //TX_AMS_RESRV_08 +951 0x0000 //TX_AMS_RESRV_09 +952 0x0000 //TX_AMS_RESRV_10 +953 0x0000 //TX_AMS_RESRV_11 +954 0x0000 //TX_AMS_RESRV_12 +955 0x0000 //TX_AMS_RESRV_13 +956 0x0000 //TX_AMS_RESRV_14 +957 0x0000 //TX_AMS_RESRV_15 +958 0x0000 //TX_AMS_RESRV_16 +959 0x0000 //TX_AMS_RESRV_17 +960 0x0000 //TX_AMS_RESRV_18 +961 0x0000 //TX_AMS_RESRV_19 #RX -0 0x0024 //RX_RECVFUNC_MODE_0 +0 0x2024 //RX_RECVFUNC_MODE_0 1 0x0000 //RX_RECVFUNC_MODE_1 2 0x0001 //RX_SAMPLINGFREQ_SIG 3 0x0001 //RX_SAMPLINGFREQ_PROC @@ -31574,11 +47211,862 @@ 110 0x0000 //RX_FDDRC_RESRV_0 129 0x0100 //RX_SPK_VOL 130 0x0000 //RX_VOL_RESRV_0 +#RX 2 +157 0x2024 //RX_RECVFUNC_MODE_0 +158 0x0000 //RX_RECVFUNC_MODE_1 +159 0x0001 //RX_SAMPLINGFREQ_SIG +160 0x0001 //RX_SAMPLINGFREQ_PROC +161 0x000A //RX_FRAME_SZ +162 0x0000 //RX_DELAY_OPT +163 0x3000 //RX_TDDRC_ALPHA_UP_1 +164 0x3000 //RX_TDDRC_ALPHA_UP_2 +165 0x3000 //RX_TDDRC_ALPHA_UP_3 +166 0x3000 //RX_TDDRC_ALPHA_UP_4 +167 0x0800 //RX_PGA +168 0x7FFF //RX_A_HP +169 0x4000 //RX_B_PE +170 0x3800 //RX_THR_PITCH_DET_0 +171 0x3000 //RX_THR_PITCH_DET_1 +172 0x2800 //RX_THR_PITCH_DET_2 +173 0x0008 //RX_PITCH_BFR_LEN +174 0x0003 //RX_SBD_PITCH_DET +175 0x0100 //RX_PP_RESRV_0 +176 0x0020 //RX_PP_RESRV_1 +177 0x0600 //RX_N_SN_EST +178 0x000C //RX_N2_SN_EST +179 0x0010 //RX_NS_LVL_CTRL +180 0xF800 //RX_THR_SN_EST +181 0x7CCD //RX_LAMBDA_PFILT +182 0x000A //RX_FENS_RESRV_0 +183 0x0190 //RX_FENS_RESRV_1 +184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +187 0x0002 //RX_EXTRA_NS_L +188 0x0800 //RX_EXTRA_NS_A +189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +190 0x7FFF //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +192 0x199A //RX_A_POST_FLT +193 0x0000 //RX_LMT_THRD +194 0x4000 //RX_LMT_ALPHA +195 0x001C //RX_FDEQ_SUBNUM +196 0x4848 //RX_FDEQ_GAIN_0 +197 0x4848 //RX_FDEQ_GAIN_1 +198 0x4848 //RX_FDEQ_GAIN_2 +199 0x4848 //RX_FDEQ_GAIN_3 +200 0x4848 //RX_FDEQ_GAIN_4 +201 0x4848 //RX_FDEQ_GAIN_5 +202 0x4848 //RX_FDEQ_GAIN_6 +203 0x4848 //RX_FDEQ_GAIN_7 +204 0x4848 //RX_FDEQ_GAIN_8 +205 0x4848 //RX_FDEQ_GAIN_9 +206 0x4848 //RX_FDEQ_GAIN_10 +207 0x4848 //RX_FDEQ_GAIN_11 +208 0x4848 //RX_FDEQ_GAIN_12 +209 0x4848 //RX_FDEQ_GAIN_13 +210 0x4848 //RX_FDEQ_GAIN_14 +211 0x4848 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0202 //RX_FDEQ_BIN_0 +221 0x0203 //RX_FDEQ_BIN_1 +222 0x0303 //RX_FDEQ_BIN_2 +223 0x0304 //RX_FDEQ_BIN_3 +224 0x0405 //RX_FDEQ_BIN_4 +225 0x0506 //RX_FDEQ_BIN_5 +226 0x0708 //RX_FDEQ_BIN_6 +227 0x090A //RX_FDEQ_BIN_7 +228 0x0B0C //RX_FDEQ_BIN_8 +229 0x0D0E //RX_FDEQ_BIN_9 +230 0x0E0F //RX_FDEQ_BIN_10 +231 0x0F10 //RX_FDEQ_BIN_11 +232 0x1011 //RX_FDEQ_BIN_12 +233 0x1104 //RX_FDEQ_BIN_13 +234 0x0000 //RX_FDEQ_BIN_14 +235 0x0000 //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x4000 //RX_FDEQ_RESRV_0 +245 0x0320 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0030 //RX_FDDRC_BAND_MARGIN_1 +248 0x0050 //RX_FDDRC_BAND_MARGIN_2 +249 0x0080 //RX_FDDRC_BAND_MARGIN_3 +250 0x0007 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x5000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x6400 //RX_FDDRC_THRD_3_2 +258 0x6400 //RX_FDDRC_THRD_3_3 +259 0x2000 //RX_FDDRC_SLANT_0_0 +260 0x2000 //RX_FDDRC_SLANT_0_1 +261 0x2000 //RX_FDDRC_SLANT_0_2 +262 0x2000 //RX_FDDRC_SLANT_0_3 +263 0x5333 //RX_FDDRC_SLANT_1_0 +264 0x5333 //RX_FDDRC_SLANT_1_1 +265 0x5333 //RX_FDDRC_SLANT_1_2 +266 0x5333 //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +268 0x0002 //RX_FILTINDX +269 0x0000 //RX_TDDRC_THRD_0 +270 0x0000 //RX_TDDRC_THRD_1 +271 0x2000 //RX_TDDRC_THRD_2 +272 0x3000 //RX_TDDRC_THRD_3 +273 0x0800 //RX_TDDRC_SLANT_0 +274 0x7EB8 //RX_TDDRC_SLANT_1 +275 0x3000 //RX_TDDRC_ALPHA_UP_0 +276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x199A //RX_TDDRC_HMNC_GAIN +279 0x0001 //RX_TDDRC_SMT_FLAG +280 0x0CCD //RX_TDDRC_SMT_W +281 0x0196 //RX_TDDRC_DRC_GAIN +282 0x7C00 //RX_LAMBDA_PKA_FP +283 0x2000 //RX_TPKA_FP +284 0x2000 //RX_MIN_G_FP +285 0x0080 //RX_MAX_G_FP +286 0x000C //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 +288 0x0000 //RX_MAXLEVEL_CNG +289 0x3000 //RX_BWE_UV_TH +290 0x3000 //RX_BWE_UV_TH2 +291 0x1800 //RX_BWE_UV_TH3 +292 0x1000 //RX_BWE_V_TH +293 0x04CD //RX_BWE_GAIN1_V_TH1 +294 0x0F33 //RX_BWE_GAIN1_V_TH2 +295 0x7333 //RX_BWE_UV_EQ +296 0x199A //RX_BWE_V_EQ +297 0x7333 //RX_BWE_TONE_TH +298 0x0004 //RX_BWE_UV_HOLD_T +299 0x6CCD //RX_BWE_GAIN2_ALPHA +300 0x799A //RX_BWE_GAIN3_ALPHA +301 0x001E //RX_BWE_CUTOFF +302 0x3000 //RX_BWE_GAINFILL +303 0x3200 //RX_BWE_MAXTH_TONE +304 0x2000 //RX_BWE_EQ_0 +305 0x2000 //RX_BWE_EQ_1 +306 0x2000 //RX_BWE_EQ_2 +307 0x2000 //RX_BWE_EQ_3 +308 0x2000 //RX_BWE_EQ_4 +309 0x2000 //RX_BWE_EQ_5 +310 0x2000 //RX_BWE_EQ_6 +311 0x0000 //RX_BWE_RESRV_0 +312 0x0000 //RX_BWE_RESRV_1 +313 0x0000 //RX_BWE_RESRV_2 +#VOL 0 +163 0x3000 //RX_TDDRC_ALPHA_UP_1 +164 0x3000 //RX_TDDRC_ALPHA_UP_2 +165 0x3000 //RX_TDDRC_ALPHA_UP_3 +166 0x3000 //RX_TDDRC_ALPHA_UP_4 +184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +190 0x7FFF //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +269 0x0000 //RX_TDDRC_THRD_0 +270 0x0000 //RX_TDDRC_THRD_1 +271 0x2000 //RX_TDDRC_THRD_2 +272 0x3000 //RX_TDDRC_THRD_3 +273 0x0800 //RX_TDDRC_SLANT_0 +274 0x7EB8 //RX_TDDRC_SLANT_1 +275 0x3000 //RX_TDDRC_ALPHA_UP_0 +276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x199A //RX_TDDRC_HMNC_GAIN +279 0x0001 //RX_TDDRC_SMT_FLAG +280 0x0CCD //RX_TDDRC_SMT_W +281 0x0196 //RX_TDDRC_DRC_GAIN +195 0x001C //RX_FDEQ_SUBNUM +196 0x4848 //RX_FDEQ_GAIN_0 +197 0x4848 //RX_FDEQ_GAIN_1 +198 0x4848 //RX_FDEQ_GAIN_2 +199 0x4848 //RX_FDEQ_GAIN_3 +200 0x4848 //RX_FDEQ_GAIN_4 +201 0x4848 //RX_FDEQ_GAIN_5 +202 0x4848 //RX_FDEQ_GAIN_6 +203 0x4848 //RX_FDEQ_GAIN_7 +204 0x4848 //RX_FDEQ_GAIN_8 +205 0x4848 //RX_FDEQ_GAIN_9 +206 0x4848 //RX_FDEQ_GAIN_10 +207 0x4848 //RX_FDEQ_GAIN_11 +208 0x4848 //RX_FDEQ_GAIN_12 +209 0x4848 //RX_FDEQ_GAIN_13 +210 0x4848 //RX_FDEQ_GAIN_14 +211 0x4848 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0202 //RX_FDEQ_BIN_0 +221 0x0203 //RX_FDEQ_BIN_1 +222 0x0303 //RX_FDEQ_BIN_2 +223 0x0304 //RX_FDEQ_BIN_3 +224 0x0405 //RX_FDEQ_BIN_4 +225 0x0506 //RX_FDEQ_BIN_5 +226 0x0708 //RX_FDEQ_BIN_6 +227 0x090A //RX_FDEQ_BIN_7 +228 0x0B0C //RX_FDEQ_BIN_8 +229 0x0D0E //RX_FDEQ_BIN_9 +230 0x0E0F //RX_FDEQ_BIN_10 +231 0x0F10 //RX_FDEQ_BIN_11 +232 0x1011 //RX_FDEQ_BIN_12 +233 0x1104 //RX_FDEQ_BIN_13 +234 0x0000 //RX_FDEQ_BIN_14 +235 0x0000 //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x4000 //RX_FDEQ_RESRV_0 +245 0x0320 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0030 //RX_FDDRC_BAND_MARGIN_1 +248 0x0050 //RX_FDDRC_BAND_MARGIN_2 +249 0x0080 //RX_FDDRC_BAND_MARGIN_3 +250 0x0007 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x5000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x6400 //RX_FDDRC_THRD_3_2 +258 0x6400 //RX_FDDRC_THRD_3_3 +259 0x2000 //RX_FDDRC_SLANT_0_0 +260 0x2000 //RX_FDDRC_SLANT_0_1 +261 0x2000 //RX_FDDRC_SLANT_0_2 +262 0x2000 //RX_FDDRC_SLANT_0_3 +263 0x5333 //RX_FDDRC_SLANT_1_0 +264 0x5333 //RX_FDDRC_SLANT_1_1 +265 0x5333 //RX_FDDRC_SLANT_1_2 +266 0x5333 //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +286 0x000C //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 +#VOL 1 +163 0x3000 //RX_TDDRC_ALPHA_UP_1 +164 0x3000 //RX_TDDRC_ALPHA_UP_2 +165 0x3000 //RX_TDDRC_ALPHA_UP_3 +166 0x3000 //RX_TDDRC_ALPHA_UP_4 +184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +190 0x7FFF //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +269 0x0000 //RX_TDDRC_THRD_0 +270 0x0000 //RX_TDDRC_THRD_1 +271 0x2000 //RX_TDDRC_THRD_2 +272 0x3000 //RX_TDDRC_THRD_3 +273 0x0800 //RX_TDDRC_SLANT_0 +274 0x7EB8 //RX_TDDRC_SLANT_1 +275 0x3000 //RX_TDDRC_ALPHA_UP_0 +276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x199A //RX_TDDRC_HMNC_GAIN +279 0x0001 //RX_TDDRC_SMT_FLAG +280 0x0CCD //RX_TDDRC_SMT_W +281 0x0196 //RX_TDDRC_DRC_GAIN +195 0x001C //RX_FDEQ_SUBNUM +196 0x4848 //RX_FDEQ_GAIN_0 +197 0x4848 //RX_FDEQ_GAIN_1 +198 0x4848 //RX_FDEQ_GAIN_2 +199 0x4848 //RX_FDEQ_GAIN_3 +200 0x4848 //RX_FDEQ_GAIN_4 +201 0x4848 //RX_FDEQ_GAIN_5 +202 0x4848 //RX_FDEQ_GAIN_6 +203 0x4848 //RX_FDEQ_GAIN_7 +204 0x4848 //RX_FDEQ_GAIN_8 +205 0x4848 //RX_FDEQ_GAIN_9 +206 0x4848 //RX_FDEQ_GAIN_10 +207 0x4848 //RX_FDEQ_GAIN_11 +208 0x4848 //RX_FDEQ_GAIN_12 +209 0x4848 //RX_FDEQ_GAIN_13 +210 0x4848 //RX_FDEQ_GAIN_14 +211 0x4848 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0202 //RX_FDEQ_BIN_0 +221 0x0203 //RX_FDEQ_BIN_1 +222 0x0303 //RX_FDEQ_BIN_2 +223 0x0304 //RX_FDEQ_BIN_3 +224 0x0405 //RX_FDEQ_BIN_4 +225 0x0506 //RX_FDEQ_BIN_5 +226 0x0708 //RX_FDEQ_BIN_6 +227 0x090A //RX_FDEQ_BIN_7 +228 0x0B0C //RX_FDEQ_BIN_8 +229 0x0D0E //RX_FDEQ_BIN_9 +230 0x0E0F //RX_FDEQ_BIN_10 +231 0x0F10 //RX_FDEQ_BIN_11 +232 0x1011 //RX_FDEQ_BIN_12 +233 0x1104 //RX_FDEQ_BIN_13 +234 0x0000 //RX_FDEQ_BIN_14 +235 0x0000 //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x4000 //RX_FDEQ_RESRV_0 +245 0x0320 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0030 //RX_FDDRC_BAND_MARGIN_1 +248 0x0050 //RX_FDDRC_BAND_MARGIN_2 +249 0x0080 //RX_FDDRC_BAND_MARGIN_3 +250 0x0007 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x5000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x6400 //RX_FDDRC_THRD_3_2 +258 0x6400 //RX_FDDRC_THRD_3_3 +259 0x2000 //RX_FDDRC_SLANT_0_0 +260 0x2000 //RX_FDDRC_SLANT_0_1 +261 0x2000 //RX_FDDRC_SLANT_0_2 +262 0x2000 //RX_FDDRC_SLANT_0_3 +263 0x5333 //RX_FDDRC_SLANT_1_0 +264 0x5333 //RX_FDDRC_SLANT_1_1 +265 0x5333 //RX_FDDRC_SLANT_1_2 +266 0x5333 //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +286 0x0014 //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 +#VOL 2 +163 0x3000 //RX_TDDRC_ALPHA_UP_1 +164 0x3000 //RX_TDDRC_ALPHA_UP_2 +165 0x3000 //RX_TDDRC_ALPHA_UP_3 +166 0x3000 //RX_TDDRC_ALPHA_UP_4 +184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +190 0x7FFF //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +269 0x0000 //RX_TDDRC_THRD_0 +270 0x0000 //RX_TDDRC_THRD_1 +271 0x2000 //RX_TDDRC_THRD_2 +272 0x3000 //RX_TDDRC_THRD_3 +273 0x0800 //RX_TDDRC_SLANT_0 +274 0x7EB8 //RX_TDDRC_SLANT_1 +275 0x3000 //RX_TDDRC_ALPHA_UP_0 +276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x199A //RX_TDDRC_HMNC_GAIN +279 0x0001 //RX_TDDRC_SMT_FLAG +280 0x0CCD //RX_TDDRC_SMT_W +281 0x0196 //RX_TDDRC_DRC_GAIN +195 0x001C //RX_FDEQ_SUBNUM +196 0x4848 //RX_FDEQ_GAIN_0 +197 0x4848 //RX_FDEQ_GAIN_1 +198 0x4848 //RX_FDEQ_GAIN_2 +199 0x4848 //RX_FDEQ_GAIN_3 +200 0x4848 //RX_FDEQ_GAIN_4 +201 0x4848 //RX_FDEQ_GAIN_5 +202 0x4848 //RX_FDEQ_GAIN_6 +203 0x4848 //RX_FDEQ_GAIN_7 +204 0x4848 //RX_FDEQ_GAIN_8 +205 0x4848 //RX_FDEQ_GAIN_9 +206 0x4848 //RX_FDEQ_GAIN_10 +207 0x4848 //RX_FDEQ_GAIN_11 +208 0x4848 //RX_FDEQ_GAIN_12 +209 0x4848 //RX_FDEQ_GAIN_13 +210 0x4848 //RX_FDEQ_GAIN_14 +211 0x4848 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0202 //RX_FDEQ_BIN_0 +221 0x0203 //RX_FDEQ_BIN_1 +222 0x0303 //RX_FDEQ_BIN_2 +223 0x0304 //RX_FDEQ_BIN_3 +224 0x0405 //RX_FDEQ_BIN_4 +225 0x0506 //RX_FDEQ_BIN_5 +226 0x0708 //RX_FDEQ_BIN_6 +227 0x090A //RX_FDEQ_BIN_7 +228 0x0B0C //RX_FDEQ_BIN_8 +229 0x0D0E //RX_FDEQ_BIN_9 +230 0x0E0F //RX_FDEQ_BIN_10 +231 0x0F10 //RX_FDEQ_BIN_11 +232 0x1011 //RX_FDEQ_BIN_12 +233 0x1104 //RX_FDEQ_BIN_13 +234 0x0000 //RX_FDEQ_BIN_14 +235 0x0000 //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x4000 //RX_FDEQ_RESRV_0 +245 0x0320 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0030 //RX_FDDRC_BAND_MARGIN_1 +248 0x0050 //RX_FDDRC_BAND_MARGIN_2 +249 0x0080 //RX_FDDRC_BAND_MARGIN_3 +250 0x0007 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x5000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x6400 //RX_FDDRC_THRD_3_2 +258 0x6400 //RX_FDDRC_THRD_3_3 +259 0x2000 //RX_FDDRC_SLANT_0_0 +260 0x2000 //RX_FDDRC_SLANT_0_1 +261 0x2000 //RX_FDDRC_SLANT_0_2 +262 0x2000 //RX_FDDRC_SLANT_0_3 +263 0x5333 //RX_FDDRC_SLANT_1_0 +264 0x5333 //RX_FDDRC_SLANT_1_1 +265 0x5333 //RX_FDDRC_SLANT_1_2 +266 0x5333 //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +286 0x0021 //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 +#VOL 3 +163 0x3000 //RX_TDDRC_ALPHA_UP_1 +164 0x3000 //RX_TDDRC_ALPHA_UP_2 +165 0x3000 //RX_TDDRC_ALPHA_UP_3 +166 0x3000 //RX_TDDRC_ALPHA_UP_4 +184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +190 0x7FFF //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +269 0x0000 //RX_TDDRC_THRD_0 +270 0x0000 //RX_TDDRC_THRD_1 +271 0x2000 //RX_TDDRC_THRD_2 +272 0x3000 //RX_TDDRC_THRD_3 +273 0x0800 //RX_TDDRC_SLANT_0 +274 0x7EB8 //RX_TDDRC_SLANT_1 +275 0x3000 //RX_TDDRC_ALPHA_UP_0 +276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x199A //RX_TDDRC_HMNC_GAIN +279 0x0001 //RX_TDDRC_SMT_FLAG +280 0x0CCD //RX_TDDRC_SMT_W +281 0x0196 //RX_TDDRC_DRC_GAIN +195 0x001C //RX_FDEQ_SUBNUM +196 0x4848 //RX_FDEQ_GAIN_0 +197 0x4848 //RX_FDEQ_GAIN_1 +198 0x4848 //RX_FDEQ_GAIN_2 +199 0x4848 //RX_FDEQ_GAIN_3 +200 0x4848 //RX_FDEQ_GAIN_4 +201 0x4848 //RX_FDEQ_GAIN_5 +202 0x4848 //RX_FDEQ_GAIN_6 +203 0x4848 //RX_FDEQ_GAIN_7 +204 0x4848 //RX_FDEQ_GAIN_8 +205 0x4848 //RX_FDEQ_GAIN_9 +206 0x4848 //RX_FDEQ_GAIN_10 +207 0x4848 //RX_FDEQ_GAIN_11 +208 0x4848 //RX_FDEQ_GAIN_12 +209 0x4848 //RX_FDEQ_GAIN_13 +210 0x4848 //RX_FDEQ_GAIN_14 +211 0x4848 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0202 //RX_FDEQ_BIN_0 +221 0x0203 //RX_FDEQ_BIN_1 +222 0x0303 //RX_FDEQ_BIN_2 +223 0x0304 //RX_FDEQ_BIN_3 +224 0x0405 //RX_FDEQ_BIN_4 +225 0x0506 //RX_FDEQ_BIN_5 +226 0x0708 //RX_FDEQ_BIN_6 +227 0x090A //RX_FDEQ_BIN_7 +228 0x0B0C //RX_FDEQ_BIN_8 +229 0x0D0E //RX_FDEQ_BIN_9 +230 0x0E0F //RX_FDEQ_BIN_10 +231 0x0F10 //RX_FDEQ_BIN_11 +232 0x1011 //RX_FDEQ_BIN_12 +233 0x1104 //RX_FDEQ_BIN_13 +234 0x0000 //RX_FDEQ_BIN_14 +235 0x0000 //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x4000 //RX_FDEQ_RESRV_0 +245 0x0320 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0030 //RX_FDDRC_BAND_MARGIN_1 +248 0x0050 //RX_FDDRC_BAND_MARGIN_2 +249 0x0080 //RX_FDDRC_BAND_MARGIN_3 +250 0x0007 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x5000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x6400 //RX_FDDRC_THRD_3_2 +258 0x6400 //RX_FDDRC_THRD_3_3 +259 0x2000 //RX_FDDRC_SLANT_0_0 +260 0x2000 //RX_FDDRC_SLANT_0_1 +261 0x2000 //RX_FDDRC_SLANT_0_2 +262 0x2000 //RX_FDDRC_SLANT_0_3 +263 0x5333 //RX_FDDRC_SLANT_1_0 +264 0x5333 //RX_FDDRC_SLANT_1_1 +265 0x5333 //RX_FDDRC_SLANT_1_2 +266 0x5333 //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +286 0x0037 //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 +#VOL 4 +163 0x3000 //RX_TDDRC_ALPHA_UP_1 +164 0x3000 //RX_TDDRC_ALPHA_UP_2 +165 0x3000 //RX_TDDRC_ALPHA_UP_3 +166 0x3000 //RX_TDDRC_ALPHA_UP_4 +184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +190 0x7FFF //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +269 0x0000 //RX_TDDRC_THRD_0 +270 0x0000 //RX_TDDRC_THRD_1 +271 0x2000 //RX_TDDRC_THRD_2 +272 0x3000 //RX_TDDRC_THRD_3 +273 0x0800 //RX_TDDRC_SLANT_0 +274 0x7EB8 //RX_TDDRC_SLANT_1 +275 0x3000 //RX_TDDRC_ALPHA_UP_0 +276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x199A //RX_TDDRC_HMNC_GAIN +279 0x0001 //RX_TDDRC_SMT_FLAG +280 0x0CCD //RX_TDDRC_SMT_W +281 0x0196 //RX_TDDRC_DRC_GAIN +195 0x001C //RX_FDEQ_SUBNUM +196 0x4848 //RX_FDEQ_GAIN_0 +197 0x4848 //RX_FDEQ_GAIN_1 +198 0x4848 //RX_FDEQ_GAIN_2 +199 0x4848 //RX_FDEQ_GAIN_3 +200 0x4848 //RX_FDEQ_GAIN_4 +201 0x4848 //RX_FDEQ_GAIN_5 +202 0x4848 //RX_FDEQ_GAIN_6 +203 0x4848 //RX_FDEQ_GAIN_7 +204 0x4848 //RX_FDEQ_GAIN_8 +205 0x4848 //RX_FDEQ_GAIN_9 +206 0x4848 //RX_FDEQ_GAIN_10 +207 0x4848 //RX_FDEQ_GAIN_11 +208 0x4848 //RX_FDEQ_GAIN_12 +209 0x4848 //RX_FDEQ_GAIN_13 +210 0x4848 //RX_FDEQ_GAIN_14 +211 0x4848 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0202 //RX_FDEQ_BIN_0 +221 0x0203 //RX_FDEQ_BIN_1 +222 0x0303 //RX_FDEQ_BIN_2 +223 0x0304 //RX_FDEQ_BIN_3 +224 0x0405 //RX_FDEQ_BIN_4 +225 0x0506 //RX_FDEQ_BIN_5 +226 0x0708 //RX_FDEQ_BIN_6 +227 0x090A //RX_FDEQ_BIN_7 +228 0x0B0C //RX_FDEQ_BIN_8 +229 0x0D0E //RX_FDEQ_BIN_9 +230 0x0E0F //RX_FDEQ_BIN_10 +231 0x0F10 //RX_FDEQ_BIN_11 +232 0x1011 //RX_FDEQ_BIN_12 +233 0x1104 //RX_FDEQ_BIN_13 +234 0x0000 //RX_FDEQ_BIN_14 +235 0x0000 //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x4000 //RX_FDEQ_RESRV_0 +245 0x0320 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0030 //RX_FDDRC_BAND_MARGIN_1 +248 0x0050 //RX_FDDRC_BAND_MARGIN_2 +249 0x0080 //RX_FDDRC_BAND_MARGIN_3 +250 0x0007 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x5000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x6400 //RX_FDDRC_THRD_3_2 +258 0x6400 //RX_FDDRC_THRD_3_3 +259 0x2000 //RX_FDDRC_SLANT_0_0 +260 0x2000 //RX_FDDRC_SLANT_0_1 +261 0x2000 //RX_FDDRC_SLANT_0_2 +262 0x2000 //RX_FDDRC_SLANT_0_3 +263 0x5333 //RX_FDDRC_SLANT_1_0 +264 0x5333 //RX_FDDRC_SLANT_1_1 +265 0x5333 //RX_FDDRC_SLANT_1_2 +266 0x5333 //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +286 0x005B //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 +#VOL 5 +163 0x3000 //RX_TDDRC_ALPHA_UP_1 +164 0x3000 //RX_TDDRC_ALPHA_UP_2 +165 0x3000 //RX_TDDRC_ALPHA_UP_3 +166 0x3000 //RX_TDDRC_ALPHA_UP_4 +184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +190 0x7FFF //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +269 0x0000 //RX_TDDRC_THRD_0 +270 0x0000 //RX_TDDRC_THRD_1 +271 0x2000 //RX_TDDRC_THRD_2 +272 0x3000 //RX_TDDRC_THRD_3 +273 0x0800 //RX_TDDRC_SLANT_0 +274 0x7EB8 //RX_TDDRC_SLANT_1 +275 0x3000 //RX_TDDRC_ALPHA_UP_0 +276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x199A //RX_TDDRC_HMNC_GAIN +279 0x0001 //RX_TDDRC_SMT_FLAG +280 0x0CCD //RX_TDDRC_SMT_W +281 0x0196 //RX_TDDRC_DRC_GAIN +195 0x001C //RX_FDEQ_SUBNUM +196 0x4848 //RX_FDEQ_GAIN_0 +197 0x4848 //RX_FDEQ_GAIN_1 +198 0x4848 //RX_FDEQ_GAIN_2 +199 0x4848 //RX_FDEQ_GAIN_3 +200 0x4848 //RX_FDEQ_GAIN_4 +201 0x4848 //RX_FDEQ_GAIN_5 +202 0x4848 //RX_FDEQ_GAIN_6 +203 0x4848 //RX_FDEQ_GAIN_7 +204 0x4848 //RX_FDEQ_GAIN_8 +205 0x4848 //RX_FDEQ_GAIN_9 +206 0x4848 //RX_FDEQ_GAIN_10 +207 0x4848 //RX_FDEQ_GAIN_11 +208 0x4848 //RX_FDEQ_GAIN_12 +209 0x4848 //RX_FDEQ_GAIN_13 +210 0x4848 //RX_FDEQ_GAIN_14 +211 0x4848 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0202 //RX_FDEQ_BIN_0 +221 0x0203 //RX_FDEQ_BIN_1 +222 0x0303 //RX_FDEQ_BIN_2 +223 0x0304 //RX_FDEQ_BIN_3 +224 0x0405 //RX_FDEQ_BIN_4 +225 0x0506 //RX_FDEQ_BIN_5 +226 0x0708 //RX_FDEQ_BIN_6 +227 0x090A //RX_FDEQ_BIN_7 +228 0x0B0C //RX_FDEQ_BIN_8 +229 0x0D0E //RX_FDEQ_BIN_9 +230 0x0E0F //RX_FDEQ_BIN_10 +231 0x0F10 //RX_FDEQ_BIN_11 +232 0x1011 //RX_FDEQ_BIN_12 +233 0x1104 //RX_FDEQ_BIN_13 +234 0x0000 //RX_FDEQ_BIN_14 +235 0x0000 //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x4000 //RX_FDEQ_RESRV_0 +245 0x0320 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0030 //RX_FDDRC_BAND_MARGIN_1 +248 0x0050 //RX_FDDRC_BAND_MARGIN_2 +249 0x0080 //RX_FDDRC_BAND_MARGIN_3 +250 0x0007 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x5000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x6400 //RX_FDDRC_THRD_3_2 +258 0x6400 //RX_FDDRC_THRD_3_3 +259 0x2000 //RX_FDDRC_SLANT_0_0 +260 0x2000 //RX_FDDRC_SLANT_0_1 +261 0x2000 //RX_FDDRC_SLANT_0_2 +262 0x2000 //RX_FDDRC_SLANT_0_3 +263 0x5333 //RX_FDDRC_SLANT_1_0 +264 0x5333 //RX_FDDRC_SLANT_1_1 +265 0x5333 //RX_FDDRC_SLANT_1_2 +266 0x5333 //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +286 0x0099 //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 +#VOL 6 +163 0x3000 //RX_TDDRC_ALPHA_UP_1 +164 0x3000 //RX_TDDRC_ALPHA_UP_2 +165 0x3000 //RX_TDDRC_ALPHA_UP_3 +166 0x3000 //RX_TDDRC_ALPHA_UP_4 +184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +190 0x7FFF //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +269 0x0000 //RX_TDDRC_THRD_0 +270 0x0000 //RX_TDDRC_THRD_1 +271 0x2000 //RX_TDDRC_THRD_2 +272 0x3000 //RX_TDDRC_THRD_3 +273 0x0800 //RX_TDDRC_SLANT_0 +274 0x7EB8 //RX_TDDRC_SLANT_1 +275 0x3000 //RX_TDDRC_ALPHA_UP_0 +276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x199A //RX_TDDRC_HMNC_GAIN +279 0x0001 //RX_TDDRC_SMT_FLAG +280 0x0CCD //RX_TDDRC_SMT_W +281 0x0196 //RX_TDDRC_DRC_GAIN +195 0x001C //RX_FDEQ_SUBNUM +196 0x4848 //RX_FDEQ_GAIN_0 +197 0x4848 //RX_FDEQ_GAIN_1 +198 0x4848 //RX_FDEQ_GAIN_2 +199 0x4848 //RX_FDEQ_GAIN_3 +200 0x4848 //RX_FDEQ_GAIN_4 +201 0x4848 //RX_FDEQ_GAIN_5 +202 0x4848 //RX_FDEQ_GAIN_6 +203 0x4848 //RX_FDEQ_GAIN_7 +204 0x4848 //RX_FDEQ_GAIN_8 +205 0x4848 //RX_FDEQ_GAIN_9 +206 0x4848 //RX_FDEQ_GAIN_10 +207 0x4848 //RX_FDEQ_GAIN_11 +208 0x4848 //RX_FDEQ_GAIN_12 +209 0x4848 //RX_FDEQ_GAIN_13 +210 0x4848 //RX_FDEQ_GAIN_14 +211 0x4848 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0202 //RX_FDEQ_BIN_0 +221 0x0203 //RX_FDEQ_BIN_1 +222 0x0303 //RX_FDEQ_BIN_2 +223 0x0304 //RX_FDEQ_BIN_3 +224 0x0405 //RX_FDEQ_BIN_4 +225 0x0506 //RX_FDEQ_BIN_5 +226 0x0708 //RX_FDEQ_BIN_6 +227 0x090A //RX_FDEQ_BIN_7 +228 0x0B0C //RX_FDEQ_BIN_8 +229 0x0D0E //RX_FDEQ_BIN_9 +230 0x0E0F //RX_FDEQ_BIN_10 +231 0x0F10 //RX_FDEQ_BIN_11 +232 0x1011 //RX_FDEQ_BIN_12 +233 0x1104 //RX_FDEQ_BIN_13 +234 0x0000 //RX_FDEQ_BIN_14 +235 0x0000 //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x4000 //RX_FDEQ_RESRV_0 +245 0x0320 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0030 //RX_FDDRC_BAND_MARGIN_1 +248 0x0050 //RX_FDDRC_BAND_MARGIN_2 +249 0x0080 //RX_FDDRC_BAND_MARGIN_3 +250 0x0007 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x5000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x6400 //RX_FDDRC_THRD_3_2 +258 0x6400 //RX_FDDRC_THRD_3_3 +259 0x2000 //RX_FDDRC_SLANT_0_0 +260 0x2000 //RX_FDDRC_SLANT_0_1 +261 0x2000 //RX_FDDRC_SLANT_0_2 +262 0x2000 //RX_FDDRC_SLANT_0_3 +263 0x5333 //RX_FDDRC_SLANT_1_0 +264 0x5333 //RX_FDDRC_SLANT_1_1 +265 0x5333 //RX_FDDRC_SLANT_1_2 +266 0x5333 //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +286 0x0100 //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 #CASE_NAME HEADSET-GOOGLE_CONDOR_CERTIFICATION1-VOICE_GENERIC-SWB -#PARAM_MODE FULL -#PARAM_TYPE TX+RX -#TOTAL_CUSTOM_STEP 7 +#PARAM_MODE Full +#PARAM_TYPE TX+2RX +#TOTAL_CUSTOM_STEP 7+7 #TX 0 0x0009 //TX_OPERATION_MODE_0 1 0x0001 //TX_OPERATION_MODE_1 @@ -31822,7 +48310,7 @@ 239 0x0800 //TX_DT_RESRV_7 240 0x0800 //TX_DT_RESRV_8 241 0x0000 //TX_DT_RESRV_9 -242 0xF400 //TX_THR_SN_EST_0 +242 0xFA00 //TX_THR_SN_EST_0 243 0xF400 //TX_THR_SN_EST_1 244 0xF600 //TX_THR_SN_EST_2 245 0xF400 //TX_THR_SN_EST_3 @@ -31831,20 +48319,20 @@ 248 0xF400 //TX_THR_SN_EST_6 249 0xF600 //TX_THR_SN_EST_7 250 0x0000 //TX_DELTA_THR_SN_EST_0 -251 0x0000 //TX_DELTA_THR_SN_EST_1 +251 0x0200 //TX_DELTA_THR_SN_EST_1 252 0x0200 //TX_DELTA_THR_SN_EST_2 253 0x0200 //TX_DELTA_THR_SN_EST_3 254 0x0200 //TX_DELTA_THR_SN_EST_4 255 0x0200 //TX_DELTA_THR_SN_EST_5 -256 0x0200 //TX_DELTA_THR_SN_EST_6 +256 0x0000 //TX_DELTA_THR_SN_EST_6 257 0x0200 //TX_DELTA_THR_SN_EST_7 258 0x6000 //TX_LAMBDA_NN_EST_0 -259 0x6000 //TX_LAMBDA_NN_EST_1 +259 0x4000 //TX_LAMBDA_NN_EST_1 260 0x4000 //TX_LAMBDA_NN_EST_2 261 0x4000 //TX_LAMBDA_NN_EST_3 262 0x4000 //TX_LAMBDA_NN_EST_4 263 0x4000 //TX_LAMBDA_NN_EST_5 -264 0x4000 //TX_LAMBDA_NN_EST_6 +264 0x6000 //TX_LAMBDA_NN_EST_6 265 0x4000 //TX_LAMBDA_NN_EST_7 266 0x0400 //TX_N_SN_EST 267 0x001E //TX_INBEAM_T @@ -31862,16 +48350,16 @@ 279 0x1000 //TX_B_POST_FLT_0 280 0x1000 //TX_B_POST_FLT_1 281 0x000B //TX_NS_LVL_CTRL_0 -282 0x000F //TX_NS_LVL_CTRL_1 -283 0x0011 //TX_NS_LVL_CTRL_2 +282 0x0011 //TX_NS_LVL_CTRL_1 +283 0x000F //TX_NS_LVL_CTRL_2 284 0x000F //TX_NS_LVL_CTRL_3 285 0x000F //TX_NS_LVL_CTRL_4 286 0x000F //TX_NS_LVL_CTRL_5 287 0x000F //TX_NS_LVL_CTRL_6 288 0x0011 //TX_NS_LVL_CTRL_7 289 0x000C //TX_MIN_GAIN_S_0 -290 0x000C //TX_MIN_GAIN_S_1 -291 0x000F //TX_MIN_GAIN_S_2 +290 0x000F //TX_MIN_GAIN_S_1 +291 0x000C //TX_MIN_GAIN_S_2 292 0x000C //TX_MIN_GAIN_S_3 293 0x000C //TX_MIN_GAIN_S_4 294 0x000C //TX_MIN_GAIN_S_5 @@ -31895,12 +48383,12 @@ 312 0x7FFF //TX_A_POST_FILT_0 313 0x2000 //TX_A_POST_FILT_1 314 0x2000 //TX_A_POST_FILT_S_0 -315 0x4000 //TX_A_POST_FILT_S_1 +315 0x5000 //TX_A_POST_FILT_S_1 316 0x5000 //TX_A_POST_FILT_S_2 317 0x5000 //TX_A_POST_FILT_S_3 318 0x5000 //TX_A_POST_FILT_S_4 319 0x5000 //TX_A_POST_FILT_S_5 -320 0x5000 //TX_A_POST_FILT_S_6 +320 0x4000 //TX_A_POST_FILT_S_6 321 0x5000 //TX_A_POST_FILT_S_7 322 0x1000 //TX_B_POST_FILT_0 323 0x1000 //TX_B_POST_FILT_1 @@ -31947,7 +48435,7 @@ 364 0x0000 //TX_K_APT 365 0x0001 //TX_NOISEDET 366 0x0190 //TX_NDETCT -367 0x0050 //TX_NOISE_TH_0 +367 0x0383 //TX_NOISE_TH_0 368 0x7FFF //TX_NOISE_TH_0_2 369 0x7FFF //TX_NOISE_TH_0_3 370 0x07D0 //TX_NOISE_TH_1 @@ -31959,11 +48447,11 @@ 376 0x7FFF //TX_NOISE_TH_5_3 377 0x7FFF //TX_NOISE_TH_5_4 378 0x044C //TX_NOISE_TH_6 -379 0x0014 //TX_MINENOISE_TH -380 0x4000 //TX_MINENOISE_MIC0_TH_MTS -381 0xFFEE //TX_MINENOISE_MIC0_TH_EXP -382 0x6000 //TX_MINENOISE_MIC0_S_TH_MTS -383 0xFFF3 //TX_MINENOISE_MIC0_S_TH_EXP +379 0x044C //TX_MINENOISE_TH +380 0xD508 //TX_MORENS_TFMASK_TH +381 0x0001 //TX_DRC_QUIET_FLOOR +382 0x3A98 //TX_RATIODTL_CUT_TH +383 0x0DAC //TX_DT_CUT_K1 384 0x0666 //TX_OUT_ENER_S_TH_CLEAN 385 0x0666 //TX_OUT_ENER_S_TH_LESSCLEAN 386 0x0333 //TX_OUT_ENER_S_TH_NOISY @@ -31971,22 +48459,22 @@ 388 0x0333 //TX_OUT_ENER_TH_SPEECH 389 0x2000 //TX_SN_NPB_GAIN 390 0x0000 //TX_NN_NPB_GAIN -391 0x0000 //TX_CSX_ALPHA_0 -392 0x0000 //TX_CSX_ALPHA_1 -393 0x0000 //TX_CSX_ALPHA_2 -394 0x0000 //TX_CSX_ALPHA_3 -395 0x0800 //TX_MU_ARSP_EST -396 0x00C8 //TX_P_OUTBEAM_MIN_TH +391 0x7FFF //TX_POST_MASK_SUP_HSNE +392 0x1388 //TX_TAIL_DET_TH +393 0x4000 //TX_B_LESSCUT_RTO_WTA +394 0x0000 //TX_MEL_G_R +395 0x0080 //TX_SUPHIGH_TH +396 0x0000 //TX_MASK_G_R 397 0x0002 //TX_EXTRA_NS_L -398 0x0800 //TX_EXTRA_NS_A -399 0x0005 //TX_VR_NOISE_FLOOR_TH +398 0x1800 //TX_C_POST_FLT_MASK +399 0x7FFF //TX_A_POST_FLT_WNS 400 0x0148 //TX_MIN_G_LOW300HZ 401 0x0002 //TX_MAXLEVEL_CNG 402 0x00B4 //TX_STN_NOISE_TH 403 0x4000 //TX_POST_MASK_SUP 404 0x7FFF //TX_POST_MASK_ADJUST 405 0x00C8 //TX_NS_ENOISE_MIC0_TH -406 0x0014 //TX_MINENOISE_MIC0_TH +406 0x02F3 //TX_MINENOISE_MIC0_TH 407 0x012C //TX_MINENOISE_MIC0_S_TH 408 0x2900 //TX_MIN_G_CTRL_SSNS 409 0x0800 //TX_METAL_RTO_THR @@ -32094,16 +48582,16 @@ 511 0x6666 //TX_MIC_TO_BFGAIN 512 0x0000 //TX_MICTOBFGAIN0 513 0x0000 //TX_FASTMUE_TH -514 0x0000 //TX_DERVB_LEN_0 -515 0x0000 //TX_DERVB_LEN_1 -516 0x0000 //TX_RHO_DERVB -517 0x0000 //TX_MIC_INDX_DERVB -518 0x0000 //TX_MU_DERVB -519 0x0000 //TX_DR_RESRV_0 -520 0x0000 //TX_DR_RESRV_1 -521 0x0000 //TX_DR_RESRV_2 -522 0x0000 //TX_DR_RESRV_3 -523 0x0000 //TX_DR_RESRV_4 +514 0xC000 //TX_DEREVERB_LF_MU +515 0xC000 //TX_DEREVERB_HF_MU +516 0xCCCC //TX_DEREVERB_DELAY +517 0xD999 //TX_DEREVERB_COEF_LEN +518 0x1F40 //TX_DEREVERB_DNR +519 0x0000 //TX_DEREVERB_ALPHA +520 0x0000 //TX_DEREVERB_BETA +521 0x0000 //TX_GSC_RTOL_TH +522 0x7000 //TX_GSC_RTOH_TH +523 0x0064 //TX_WIDE2_MEANHTH 524 0x0000 //TX_DR_RESRV_5 525 0x0000 //TX_DR_RESRV_6 526 0x0000 //TX_DR_RESRV_7 @@ -32469,16 +48957,81 @@ 886 0x0CCD //TX_FASTNS_TFMASKBIN_TH2 887 0x0CCD //TX_FASTNS_TFMASKBIN_TH3 888 0x0028 //TX_FASTNS_ARSPC_TH -889 0xC000 //TX_FASTNS_MASK5_TH +889 0x8000 //TX_FASTNS_MASK5_TH 890 0x4848 //TX_POSTSSA_MIN_G_VR_MASK -891 0x1000 //TX_A_LESSCUT_RTO_MASK +891 0x4000 //TX_A_LESSCUT_RTO_MASK 892 0x1770 //TX_FASTNS_NOISETH 893 0xC000 //TX_FASTNS_SSA_THLFL 894 0xC000 //TX_FASTNS_SSA_THHFL 895 0xCCCC //TX_FASTNS_SSA_THLFH 896 0xD999 //TX_FASTNS_SSA_THHFH +897 0x2339 //TX_SENDFUNC_REG_MICMUTE +898 0x0021 //TX_SENDFUNC_REG_MICMUTE1 +899 0x02BC //TX_MICMUTE_RATIO_THR +900 0x0140 //TX_MICMUTE_AMP_THR +901 0x0004 //TX_MICMUTE_HPF_IND +902 0x00C0 //TX_MICMUTE_LOG_EYR_TH +903 0x0008 //TX_MICMUTE_CVG_TIME +904 0x0008 //TX_MICMUTE_RELEASE_TIME +905 0x01FE //TX_MIC_VOLUME_MIC0MUTE +906 0x0020 //TX_MICMUTE_EPD_OFFSET_0 +907 0x001E //TX_MICMUTE_FRQ_AEC_L +908 0x7999 //TX_MICMUTE_EAD_THR +909 0x7FFF //TX_MICMUTE_LAMBDA_CB_NLE +910 0x7FFF //TX_MICMUTE_LAMBDA_RE_EST +911 0x4000 //TX_DTD_THR1_MICMUTE_0 +912 0x7000 //TX_DTD_THR1_MICMUTE_1 +913 0x7FFF //TX_DTD_THR1_MICMUTE_2 +914 0x7FFF //TX_DTD_THR1_MICMUTE_3 +915 0x6CCC //TX_DTD_THR2_MICMUTE_0 +916 0x0400 //TX_MICMUTE_MIN_EQ_RE_EST_0 +917 0x0400 //TX_MICMUTE_MIN_EQ_RE_EST_1 +918 0x1000 //TX_MICMUTE_MIN_EQ_RE_EST_2 +919 0x7FFF //TX_MICMUTE_MIN_EQ_RE_EST_3 +920 0x7FFF //TX_MICMUTE_MIN_EQ_RE_EST_4 +921 0x4000 //TX_MICMUTE_C_POST_FLT +922 0x03E8 //TX_MICMUTE_DT_CUT_K +923 0x0001 //TX_MICMUTE_DT_CUT_THR +924 0x03E8 //TX_MICMUTE_DT_CUT_K2 +925 0x0001 //TX_MICMUTE_DT_CUT_THR2 +926 0x0064 //TX_MICMUTE_DT2_HOLD_N +927 0x1000 //TX_MICMUTE_RATIODTH_THCUT +928 0x1000 //TX_MICMUTE_B_POST_FLT_ECHOL +929 0x7FFF //TX_MICMUTE_B_POST_FLT_ECHOH +930 0x0400 //TX_MICMUTE_C_POST_FLT_MASK +931 0x7999 //TX_MICMUTE_RATIODTL_CUT_TH +932 0x0258 //TX_MICMUTE_DT_CUT_K1 +933 0x0800 //TX_MICMUTE_N2_SN_EST +934 0xFC00 //TX_MICMUTE_THR_SN_EST_0 +935 0x001C //TX_MICMUTE_MIN_G_CTRL_0 +936 0x6000 //TX_MICMUTE_A_POST_FILT_S_0 +937 0x7000 //TX_MICMUTE_B_POST_FILT_0 +938 0x2710 //TX_MIC1RUB_AMP_THR +939 0x0010 //TX_MIC1MUTE_RATIO_THR +940 0x0450 //TX_MIC1MUTE_AMP_THR +941 0x0008 //TX_MIC1MUTE_CVG_TIME +942 0x0008 //TX_MIC1MUTE_RELEASE_TIME +943 0x0000 //TX_AMS_RESRV_01 +944 0x0000 //TX_AMS_RESRV_02 +945 0x0000 //TX_AMS_RESRV_03 +946 0x0000 //TX_AMS_RESRV_04 +947 0x0000 //TX_AMS_RESRV_05 +948 0x0000 //TX_AMS_RESRV_06 +949 0x0000 //TX_AMS_RESRV_07 +950 0x0000 //TX_AMS_RESRV_08 +951 0x0000 //TX_AMS_RESRV_09 +952 0x0000 //TX_AMS_RESRV_10 +953 0x0000 //TX_AMS_RESRV_11 +954 0x0000 //TX_AMS_RESRV_12 +955 0x0000 //TX_AMS_RESRV_13 +956 0x0000 //TX_AMS_RESRV_14 +957 0x0000 //TX_AMS_RESRV_15 +958 0x0000 //TX_AMS_RESRV_16 +959 0x0000 //TX_AMS_RESRV_17 +960 0x0000 //TX_AMS_RESRV_18 +961 0x0000 //TX_AMS_RESRV_19 #RX -0 0x0024 //RX_RECVFUNC_MODE_0 +0 0x2024 //RX_RECVFUNC_MODE_0 1 0x0000 //RX_RECVFUNC_MODE_1 2 0x0003 //RX_SAMPLINGFREQ_SIG 3 0x0003 //RX_SAMPLINGFREQ_PROC @@ -33328,11 +49881,862 @@ 110 0x0000 //RX_FDDRC_RESRV_0 129 0x0100 //RX_SPK_VOL 130 0x0000 //RX_VOL_RESRV_0 +#RX 2 +157 0x2024 //RX_RECVFUNC_MODE_0 +158 0x0000 //RX_RECVFUNC_MODE_1 +159 0x0003 //RX_SAMPLINGFREQ_SIG +160 0x0003 //RX_SAMPLINGFREQ_PROC +161 0x000A //RX_FRAME_SZ +162 0x0000 //RX_DELAY_OPT +163 0x5000 //RX_TDDRC_ALPHA_UP_1 +164 0x5000 //RX_TDDRC_ALPHA_UP_2 +165 0x5000 //RX_TDDRC_ALPHA_UP_3 +166 0x2000 //RX_TDDRC_ALPHA_UP_4 +167 0x0800 //RX_PGA +168 0x7FFF //RX_A_HP +169 0x0000 //RX_B_PE +170 0x1800 //RX_THR_PITCH_DET_0 +171 0x1000 //RX_THR_PITCH_DET_1 +172 0x0800 //RX_THR_PITCH_DET_2 +173 0x0008 //RX_PITCH_BFR_LEN +174 0x0003 //RX_SBD_PITCH_DET +175 0x0100 //RX_PP_RESRV_0 +176 0x0020 //RX_PP_RESRV_1 +177 0x0400 //RX_N_SN_EST +178 0x000C //RX_N2_SN_EST +179 0x0003 //RX_NS_LVL_CTRL +180 0x9000 //RX_THR_SN_EST +181 0x7CCD //RX_LAMBDA_PFILT +182 0x000A //RX_FENS_RESRV_0 +183 0x0190 //RX_FENS_RESRV_1 +184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +187 0x0002 //RX_EXTRA_NS_L +188 0x0800 //RX_EXTRA_NS_A +189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +190 0x65AD //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +192 0x199A //RX_A_POST_FLT +193 0x0000 //RX_LMT_THRD +194 0x4000 //RX_LMT_ALPHA +195 0x0020 //RX_FDEQ_SUBNUM +196 0x4848 //RX_FDEQ_GAIN_0 +197 0x4848 //RX_FDEQ_GAIN_1 +198 0x4848 //RX_FDEQ_GAIN_2 +199 0x4848 //RX_FDEQ_GAIN_3 +200 0x4848 //RX_FDEQ_GAIN_4 +201 0x4848 //RX_FDEQ_GAIN_5 +202 0x4848 //RX_FDEQ_GAIN_6 +203 0x4848 //RX_FDEQ_GAIN_7 +204 0x4848 //RX_FDEQ_GAIN_8 +205 0x4848 //RX_FDEQ_GAIN_9 +206 0x4848 //RX_FDEQ_GAIN_10 +207 0x4848 //RX_FDEQ_GAIN_11 +208 0x4848 //RX_FDEQ_GAIN_12 +209 0x4848 //RX_FDEQ_GAIN_13 +210 0x4848 //RX_FDEQ_GAIN_14 +211 0x4848 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0202 //RX_FDEQ_BIN_0 +221 0x0203 //RX_FDEQ_BIN_1 +222 0x0303 //RX_FDEQ_BIN_2 +223 0x0304 //RX_FDEQ_BIN_3 +224 0x0405 //RX_FDEQ_BIN_4 +225 0x0506 //RX_FDEQ_BIN_5 +226 0x0708 //RX_FDEQ_BIN_6 +227 0x090A //RX_FDEQ_BIN_7 +228 0x0B0C //RX_FDEQ_BIN_8 +229 0x0D0E //RX_FDEQ_BIN_9 +230 0x1013 //RX_FDEQ_BIN_10 +231 0x1719 //RX_FDEQ_BIN_11 +232 0x1B1E //RX_FDEQ_BIN_12 +233 0x1E1E //RX_FDEQ_BIN_13 +234 0x1E28 //RX_FDEQ_BIN_14 +235 0x282C //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x4000 //RX_FDEQ_RESRV_0 +245 0x0320 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0030 //RX_FDDRC_BAND_MARGIN_1 +248 0x0050 //RX_FDDRC_BAND_MARGIN_2 +249 0x0080 //RX_FDDRC_BAND_MARGIN_3 +250 0x0007 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x5000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x6400 //RX_FDDRC_THRD_3_2 +258 0x6400 //RX_FDDRC_THRD_3_3 +259 0x2000 //RX_FDDRC_SLANT_0_0 +260 0x2000 //RX_FDDRC_SLANT_0_1 +261 0x2000 //RX_FDDRC_SLANT_0_2 +262 0x2000 //RX_FDDRC_SLANT_0_3 +263 0x5333 //RX_FDDRC_SLANT_1_0 +264 0x5333 //RX_FDDRC_SLANT_1_1 +265 0x5333 //RX_FDDRC_SLANT_1_2 +266 0x5333 //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +268 0x0002 //RX_FILTINDX +269 0x0000 //RX_TDDRC_THRD_0 +270 0x0000 //RX_TDDRC_THRD_1 +271 0x1A00 //RX_TDDRC_THRD_2 +272 0x1A00 //RX_TDDRC_THRD_3 +273 0x3000 //RX_TDDRC_SLANT_0 +274 0x7EB8 //RX_TDDRC_SLANT_1 +275 0x5000 //RX_TDDRC_ALPHA_UP_0 +276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x199A //RX_TDDRC_HMNC_GAIN +279 0x0001 //RX_TDDRC_SMT_FLAG +280 0x0CCD //RX_TDDRC_SMT_W +281 0x01C8 //RX_TDDRC_DRC_GAIN +282 0x7C00 //RX_LAMBDA_PKA_FP +283 0x2000 //RX_TPKA_FP +284 0x2000 //RX_MIN_G_FP +285 0x0080 //RX_MAX_G_FP +286 0x000C //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 +288 0x0000 //RX_MAXLEVEL_CNG +289 0x3000 //RX_BWE_UV_TH +290 0x3000 //RX_BWE_UV_TH2 +291 0x1800 //RX_BWE_UV_TH3 +292 0x1000 //RX_BWE_V_TH +293 0x04CD //RX_BWE_GAIN1_V_TH1 +294 0x0F33 //RX_BWE_GAIN1_V_TH2 +295 0x7333 //RX_BWE_UV_EQ +296 0x199A //RX_BWE_V_EQ +297 0x7333 //RX_BWE_TONE_TH +298 0x0004 //RX_BWE_UV_HOLD_T +299 0x6CCD //RX_BWE_GAIN2_ALPHA +300 0x799A //RX_BWE_GAIN3_ALPHA +301 0x001E //RX_BWE_CUTOFF +302 0x3000 //RX_BWE_GAINFILL +303 0x3200 //RX_BWE_MAXTH_TONE +304 0x2000 //RX_BWE_EQ_0 +305 0x2000 //RX_BWE_EQ_1 +306 0x2000 //RX_BWE_EQ_2 +307 0x2000 //RX_BWE_EQ_3 +308 0x2000 //RX_BWE_EQ_4 +309 0x2000 //RX_BWE_EQ_5 +310 0x2000 //RX_BWE_EQ_6 +311 0x0000 //RX_BWE_RESRV_0 +312 0x0000 //RX_BWE_RESRV_1 +313 0x0000 //RX_BWE_RESRV_2 +#VOL 0 +163 0x5000 //RX_TDDRC_ALPHA_UP_1 +164 0x5000 //RX_TDDRC_ALPHA_UP_2 +165 0x5000 //RX_TDDRC_ALPHA_UP_3 +166 0x2000 //RX_TDDRC_ALPHA_UP_4 +184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +190 0x65AD //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +269 0x0000 //RX_TDDRC_THRD_0 +270 0x0000 //RX_TDDRC_THRD_1 +271 0x1A00 //RX_TDDRC_THRD_2 +272 0x1A00 //RX_TDDRC_THRD_3 +273 0x3000 //RX_TDDRC_SLANT_0 +274 0x7EB8 //RX_TDDRC_SLANT_1 +275 0x5000 //RX_TDDRC_ALPHA_UP_0 +276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x199A //RX_TDDRC_HMNC_GAIN +279 0x0001 //RX_TDDRC_SMT_FLAG +280 0x0CCD //RX_TDDRC_SMT_W +281 0x01C8 //RX_TDDRC_DRC_GAIN +195 0x0020 //RX_FDEQ_SUBNUM +196 0x4848 //RX_FDEQ_GAIN_0 +197 0x4848 //RX_FDEQ_GAIN_1 +198 0x4848 //RX_FDEQ_GAIN_2 +199 0x4848 //RX_FDEQ_GAIN_3 +200 0x4848 //RX_FDEQ_GAIN_4 +201 0x4848 //RX_FDEQ_GAIN_5 +202 0x4848 //RX_FDEQ_GAIN_6 +203 0x4848 //RX_FDEQ_GAIN_7 +204 0x4848 //RX_FDEQ_GAIN_8 +205 0x4848 //RX_FDEQ_GAIN_9 +206 0x4848 //RX_FDEQ_GAIN_10 +207 0x4848 //RX_FDEQ_GAIN_11 +208 0x4848 //RX_FDEQ_GAIN_12 +209 0x4848 //RX_FDEQ_GAIN_13 +210 0x4848 //RX_FDEQ_GAIN_14 +211 0x4848 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0202 //RX_FDEQ_BIN_0 +221 0x0203 //RX_FDEQ_BIN_1 +222 0x0303 //RX_FDEQ_BIN_2 +223 0x0304 //RX_FDEQ_BIN_3 +224 0x0405 //RX_FDEQ_BIN_4 +225 0x0506 //RX_FDEQ_BIN_5 +226 0x0708 //RX_FDEQ_BIN_6 +227 0x090A //RX_FDEQ_BIN_7 +228 0x0B0C //RX_FDEQ_BIN_8 +229 0x0D0E //RX_FDEQ_BIN_9 +230 0x1013 //RX_FDEQ_BIN_10 +231 0x1719 //RX_FDEQ_BIN_11 +232 0x1B1E //RX_FDEQ_BIN_12 +233 0x1E1E //RX_FDEQ_BIN_13 +234 0x1E28 //RX_FDEQ_BIN_14 +235 0x282C //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x4000 //RX_FDEQ_RESRV_0 +245 0x0320 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0030 //RX_FDDRC_BAND_MARGIN_1 +248 0x0050 //RX_FDDRC_BAND_MARGIN_2 +249 0x0080 //RX_FDDRC_BAND_MARGIN_3 +250 0x0007 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x5000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x6400 //RX_FDDRC_THRD_3_2 +258 0x6400 //RX_FDDRC_THRD_3_3 +259 0x2000 //RX_FDDRC_SLANT_0_0 +260 0x2000 //RX_FDDRC_SLANT_0_1 +261 0x2000 //RX_FDDRC_SLANT_0_2 +262 0x2000 //RX_FDDRC_SLANT_0_3 +263 0x5333 //RX_FDDRC_SLANT_1_0 +264 0x5333 //RX_FDDRC_SLANT_1_1 +265 0x5333 //RX_FDDRC_SLANT_1_2 +266 0x5333 //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +286 0x000C //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 +#VOL 1 +163 0x5000 //RX_TDDRC_ALPHA_UP_1 +164 0x5000 //RX_TDDRC_ALPHA_UP_2 +165 0x5000 //RX_TDDRC_ALPHA_UP_3 +166 0x2000 //RX_TDDRC_ALPHA_UP_4 +184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +190 0x65AD //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +269 0x0000 //RX_TDDRC_THRD_0 +270 0x0000 //RX_TDDRC_THRD_1 +271 0x1A00 //RX_TDDRC_THRD_2 +272 0x1A00 //RX_TDDRC_THRD_3 +273 0x3000 //RX_TDDRC_SLANT_0 +274 0x7EB8 //RX_TDDRC_SLANT_1 +275 0x5000 //RX_TDDRC_ALPHA_UP_0 +276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x199A //RX_TDDRC_HMNC_GAIN +279 0x0001 //RX_TDDRC_SMT_FLAG +280 0x0CCD //RX_TDDRC_SMT_W +281 0x01C8 //RX_TDDRC_DRC_GAIN +195 0x0020 //RX_FDEQ_SUBNUM +196 0x4848 //RX_FDEQ_GAIN_0 +197 0x4848 //RX_FDEQ_GAIN_1 +198 0x4848 //RX_FDEQ_GAIN_2 +199 0x4848 //RX_FDEQ_GAIN_3 +200 0x4848 //RX_FDEQ_GAIN_4 +201 0x4848 //RX_FDEQ_GAIN_5 +202 0x4848 //RX_FDEQ_GAIN_6 +203 0x4848 //RX_FDEQ_GAIN_7 +204 0x4848 //RX_FDEQ_GAIN_8 +205 0x4848 //RX_FDEQ_GAIN_9 +206 0x4848 //RX_FDEQ_GAIN_10 +207 0x4848 //RX_FDEQ_GAIN_11 +208 0x4848 //RX_FDEQ_GAIN_12 +209 0x4848 //RX_FDEQ_GAIN_13 +210 0x4848 //RX_FDEQ_GAIN_14 +211 0x4848 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0202 //RX_FDEQ_BIN_0 +221 0x0203 //RX_FDEQ_BIN_1 +222 0x0303 //RX_FDEQ_BIN_2 +223 0x0304 //RX_FDEQ_BIN_3 +224 0x0405 //RX_FDEQ_BIN_4 +225 0x0506 //RX_FDEQ_BIN_5 +226 0x0708 //RX_FDEQ_BIN_6 +227 0x090A //RX_FDEQ_BIN_7 +228 0x0B0C //RX_FDEQ_BIN_8 +229 0x0D0E //RX_FDEQ_BIN_9 +230 0x1013 //RX_FDEQ_BIN_10 +231 0x1719 //RX_FDEQ_BIN_11 +232 0x1B1E //RX_FDEQ_BIN_12 +233 0x1E1E //RX_FDEQ_BIN_13 +234 0x1E28 //RX_FDEQ_BIN_14 +235 0x282C //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x4000 //RX_FDEQ_RESRV_0 +245 0x0320 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0030 //RX_FDDRC_BAND_MARGIN_1 +248 0x0050 //RX_FDDRC_BAND_MARGIN_2 +249 0x0080 //RX_FDDRC_BAND_MARGIN_3 +250 0x0007 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x5000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x6400 //RX_FDDRC_THRD_3_2 +258 0x6400 //RX_FDDRC_THRD_3_3 +259 0x2000 //RX_FDDRC_SLANT_0_0 +260 0x2000 //RX_FDDRC_SLANT_0_1 +261 0x2000 //RX_FDDRC_SLANT_0_2 +262 0x2000 //RX_FDDRC_SLANT_0_3 +263 0x5333 //RX_FDDRC_SLANT_1_0 +264 0x5333 //RX_FDDRC_SLANT_1_1 +265 0x5333 //RX_FDDRC_SLANT_1_2 +266 0x5333 //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +286 0x0014 //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 +#VOL 2 +163 0x5000 //RX_TDDRC_ALPHA_UP_1 +164 0x5000 //RX_TDDRC_ALPHA_UP_2 +165 0x5000 //RX_TDDRC_ALPHA_UP_3 +166 0x2000 //RX_TDDRC_ALPHA_UP_4 +184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +190 0x65AD //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +269 0x0000 //RX_TDDRC_THRD_0 +270 0x0000 //RX_TDDRC_THRD_1 +271 0x1A00 //RX_TDDRC_THRD_2 +272 0x1A00 //RX_TDDRC_THRD_3 +273 0x3000 //RX_TDDRC_SLANT_0 +274 0x7EB8 //RX_TDDRC_SLANT_1 +275 0x5000 //RX_TDDRC_ALPHA_UP_0 +276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x199A //RX_TDDRC_HMNC_GAIN +279 0x0001 //RX_TDDRC_SMT_FLAG +280 0x0CCD //RX_TDDRC_SMT_W +281 0x01C8 //RX_TDDRC_DRC_GAIN +195 0x0020 //RX_FDEQ_SUBNUM +196 0x4848 //RX_FDEQ_GAIN_0 +197 0x4848 //RX_FDEQ_GAIN_1 +198 0x4848 //RX_FDEQ_GAIN_2 +199 0x4848 //RX_FDEQ_GAIN_3 +200 0x4848 //RX_FDEQ_GAIN_4 +201 0x4848 //RX_FDEQ_GAIN_5 +202 0x4848 //RX_FDEQ_GAIN_6 +203 0x4848 //RX_FDEQ_GAIN_7 +204 0x4848 //RX_FDEQ_GAIN_8 +205 0x4848 //RX_FDEQ_GAIN_9 +206 0x4848 //RX_FDEQ_GAIN_10 +207 0x4848 //RX_FDEQ_GAIN_11 +208 0x4848 //RX_FDEQ_GAIN_12 +209 0x4848 //RX_FDEQ_GAIN_13 +210 0x4848 //RX_FDEQ_GAIN_14 +211 0x4848 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0202 //RX_FDEQ_BIN_0 +221 0x0203 //RX_FDEQ_BIN_1 +222 0x0303 //RX_FDEQ_BIN_2 +223 0x0304 //RX_FDEQ_BIN_3 +224 0x0405 //RX_FDEQ_BIN_4 +225 0x0506 //RX_FDEQ_BIN_5 +226 0x0708 //RX_FDEQ_BIN_6 +227 0x090A //RX_FDEQ_BIN_7 +228 0x0B0C //RX_FDEQ_BIN_8 +229 0x0D0E //RX_FDEQ_BIN_9 +230 0x1013 //RX_FDEQ_BIN_10 +231 0x1719 //RX_FDEQ_BIN_11 +232 0x1B1E //RX_FDEQ_BIN_12 +233 0x1E1E //RX_FDEQ_BIN_13 +234 0x1E28 //RX_FDEQ_BIN_14 +235 0x282C //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x4000 //RX_FDEQ_RESRV_0 +245 0x0320 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0030 //RX_FDDRC_BAND_MARGIN_1 +248 0x0050 //RX_FDDRC_BAND_MARGIN_2 +249 0x0080 //RX_FDDRC_BAND_MARGIN_3 +250 0x0007 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x5000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x6400 //RX_FDDRC_THRD_3_2 +258 0x6400 //RX_FDDRC_THRD_3_3 +259 0x2000 //RX_FDDRC_SLANT_0_0 +260 0x2000 //RX_FDDRC_SLANT_0_1 +261 0x2000 //RX_FDDRC_SLANT_0_2 +262 0x2000 //RX_FDDRC_SLANT_0_3 +263 0x5333 //RX_FDDRC_SLANT_1_0 +264 0x5333 //RX_FDDRC_SLANT_1_1 +265 0x5333 //RX_FDDRC_SLANT_1_2 +266 0x5333 //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +286 0x0021 //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 +#VOL 3 +163 0x5000 //RX_TDDRC_ALPHA_UP_1 +164 0x5000 //RX_TDDRC_ALPHA_UP_2 +165 0x5000 //RX_TDDRC_ALPHA_UP_3 +166 0x2000 //RX_TDDRC_ALPHA_UP_4 +184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +190 0x65AD //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +269 0x0000 //RX_TDDRC_THRD_0 +270 0x0000 //RX_TDDRC_THRD_1 +271 0x1A00 //RX_TDDRC_THRD_2 +272 0x1A00 //RX_TDDRC_THRD_3 +273 0x3000 //RX_TDDRC_SLANT_0 +274 0x7EB8 //RX_TDDRC_SLANT_1 +275 0x5000 //RX_TDDRC_ALPHA_UP_0 +276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x199A //RX_TDDRC_HMNC_GAIN +279 0x0001 //RX_TDDRC_SMT_FLAG +280 0x0CCD //RX_TDDRC_SMT_W +281 0x01C8 //RX_TDDRC_DRC_GAIN +195 0x0020 //RX_FDEQ_SUBNUM +196 0x4848 //RX_FDEQ_GAIN_0 +197 0x4848 //RX_FDEQ_GAIN_1 +198 0x4848 //RX_FDEQ_GAIN_2 +199 0x4848 //RX_FDEQ_GAIN_3 +200 0x4848 //RX_FDEQ_GAIN_4 +201 0x4848 //RX_FDEQ_GAIN_5 +202 0x4848 //RX_FDEQ_GAIN_6 +203 0x4848 //RX_FDEQ_GAIN_7 +204 0x4848 //RX_FDEQ_GAIN_8 +205 0x4848 //RX_FDEQ_GAIN_9 +206 0x4848 //RX_FDEQ_GAIN_10 +207 0x4848 //RX_FDEQ_GAIN_11 +208 0x4848 //RX_FDEQ_GAIN_12 +209 0x4848 //RX_FDEQ_GAIN_13 +210 0x4848 //RX_FDEQ_GAIN_14 +211 0x4848 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0202 //RX_FDEQ_BIN_0 +221 0x0203 //RX_FDEQ_BIN_1 +222 0x0303 //RX_FDEQ_BIN_2 +223 0x0304 //RX_FDEQ_BIN_3 +224 0x0405 //RX_FDEQ_BIN_4 +225 0x0506 //RX_FDEQ_BIN_5 +226 0x0708 //RX_FDEQ_BIN_6 +227 0x090A //RX_FDEQ_BIN_7 +228 0x0B0C //RX_FDEQ_BIN_8 +229 0x0D0E //RX_FDEQ_BIN_9 +230 0x1013 //RX_FDEQ_BIN_10 +231 0x1719 //RX_FDEQ_BIN_11 +232 0x1B1E //RX_FDEQ_BIN_12 +233 0x1E1E //RX_FDEQ_BIN_13 +234 0x1E28 //RX_FDEQ_BIN_14 +235 0x282C //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x4000 //RX_FDEQ_RESRV_0 +245 0x0320 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0030 //RX_FDDRC_BAND_MARGIN_1 +248 0x0050 //RX_FDDRC_BAND_MARGIN_2 +249 0x0080 //RX_FDDRC_BAND_MARGIN_3 +250 0x0007 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x5000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x6400 //RX_FDDRC_THRD_3_2 +258 0x6400 //RX_FDDRC_THRD_3_3 +259 0x2000 //RX_FDDRC_SLANT_0_0 +260 0x2000 //RX_FDDRC_SLANT_0_1 +261 0x2000 //RX_FDDRC_SLANT_0_2 +262 0x2000 //RX_FDDRC_SLANT_0_3 +263 0x5333 //RX_FDDRC_SLANT_1_0 +264 0x5333 //RX_FDDRC_SLANT_1_1 +265 0x5333 //RX_FDDRC_SLANT_1_2 +266 0x5333 //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +286 0x0037 //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 +#VOL 4 +163 0x5000 //RX_TDDRC_ALPHA_UP_1 +164 0x5000 //RX_TDDRC_ALPHA_UP_2 +165 0x5000 //RX_TDDRC_ALPHA_UP_3 +166 0x2000 //RX_TDDRC_ALPHA_UP_4 +184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +190 0x65AD //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +269 0x0000 //RX_TDDRC_THRD_0 +270 0x0000 //RX_TDDRC_THRD_1 +271 0x1A00 //RX_TDDRC_THRD_2 +272 0x1A00 //RX_TDDRC_THRD_3 +273 0x3000 //RX_TDDRC_SLANT_0 +274 0x7EB8 //RX_TDDRC_SLANT_1 +275 0x5000 //RX_TDDRC_ALPHA_UP_0 +276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x199A //RX_TDDRC_HMNC_GAIN +279 0x0001 //RX_TDDRC_SMT_FLAG +280 0x0CCD //RX_TDDRC_SMT_W +281 0x01C8 //RX_TDDRC_DRC_GAIN +195 0x0020 //RX_FDEQ_SUBNUM +196 0x4848 //RX_FDEQ_GAIN_0 +197 0x4848 //RX_FDEQ_GAIN_1 +198 0x4848 //RX_FDEQ_GAIN_2 +199 0x4848 //RX_FDEQ_GAIN_3 +200 0x4848 //RX_FDEQ_GAIN_4 +201 0x4848 //RX_FDEQ_GAIN_5 +202 0x4848 //RX_FDEQ_GAIN_6 +203 0x4848 //RX_FDEQ_GAIN_7 +204 0x4848 //RX_FDEQ_GAIN_8 +205 0x4848 //RX_FDEQ_GAIN_9 +206 0x4848 //RX_FDEQ_GAIN_10 +207 0x4848 //RX_FDEQ_GAIN_11 +208 0x4848 //RX_FDEQ_GAIN_12 +209 0x4848 //RX_FDEQ_GAIN_13 +210 0x4848 //RX_FDEQ_GAIN_14 +211 0x4848 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0202 //RX_FDEQ_BIN_0 +221 0x0203 //RX_FDEQ_BIN_1 +222 0x0303 //RX_FDEQ_BIN_2 +223 0x0304 //RX_FDEQ_BIN_3 +224 0x0405 //RX_FDEQ_BIN_4 +225 0x0506 //RX_FDEQ_BIN_5 +226 0x0708 //RX_FDEQ_BIN_6 +227 0x090A //RX_FDEQ_BIN_7 +228 0x0B0C //RX_FDEQ_BIN_8 +229 0x0D0E //RX_FDEQ_BIN_9 +230 0x1013 //RX_FDEQ_BIN_10 +231 0x1719 //RX_FDEQ_BIN_11 +232 0x1B1E //RX_FDEQ_BIN_12 +233 0x1E1E //RX_FDEQ_BIN_13 +234 0x1E28 //RX_FDEQ_BIN_14 +235 0x282C //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x4000 //RX_FDEQ_RESRV_0 +245 0x0320 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0030 //RX_FDDRC_BAND_MARGIN_1 +248 0x0050 //RX_FDDRC_BAND_MARGIN_2 +249 0x0080 //RX_FDDRC_BAND_MARGIN_3 +250 0x0007 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x5000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x6400 //RX_FDDRC_THRD_3_2 +258 0x6400 //RX_FDDRC_THRD_3_3 +259 0x2000 //RX_FDDRC_SLANT_0_0 +260 0x2000 //RX_FDDRC_SLANT_0_1 +261 0x2000 //RX_FDDRC_SLANT_0_2 +262 0x2000 //RX_FDDRC_SLANT_0_3 +263 0x5333 //RX_FDDRC_SLANT_1_0 +264 0x5333 //RX_FDDRC_SLANT_1_1 +265 0x5333 //RX_FDDRC_SLANT_1_2 +266 0x5333 //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +286 0x005B //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 +#VOL 5 +163 0x5000 //RX_TDDRC_ALPHA_UP_1 +164 0x5000 //RX_TDDRC_ALPHA_UP_2 +165 0x5000 //RX_TDDRC_ALPHA_UP_3 +166 0x2000 //RX_TDDRC_ALPHA_UP_4 +184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +190 0x65AD //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +269 0x0000 //RX_TDDRC_THRD_0 +270 0x0000 //RX_TDDRC_THRD_1 +271 0x1A00 //RX_TDDRC_THRD_2 +272 0x1A00 //RX_TDDRC_THRD_3 +273 0x3000 //RX_TDDRC_SLANT_0 +274 0x7EB8 //RX_TDDRC_SLANT_1 +275 0x5000 //RX_TDDRC_ALPHA_UP_0 +276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x199A //RX_TDDRC_HMNC_GAIN +279 0x0001 //RX_TDDRC_SMT_FLAG +280 0x0CCD //RX_TDDRC_SMT_W +281 0x01C8 //RX_TDDRC_DRC_GAIN +195 0x0020 //RX_FDEQ_SUBNUM +196 0x4848 //RX_FDEQ_GAIN_0 +197 0x4848 //RX_FDEQ_GAIN_1 +198 0x4848 //RX_FDEQ_GAIN_2 +199 0x4848 //RX_FDEQ_GAIN_3 +200 0x4848 //RX_FDEQ_GAIN_4 +201 0x4848 //RX_FDEQ_GAIN_5 +202 0x4848 //RX_FDEQ_GAIN_6 +203 0x4848 //RX_FDEQ_GAIN_7 +204 0x4848 //RX_FDEQ_GAIN_8 +205 0x4848 //RX_FDEQ_GAIN_9 +206 0x4848 //RX_FDEQ_GAIN_10 +207 0x4848 //RX_FDEQ_GAIN_11 +208 0x4848 //RX_FDEQ_GAIN_12 +209 0x4848 //RX_FDEQ_GAIN_13 +210 0x4848 //RX_FDEQ_GAIN_14 +211 0x4848 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0202 //RX_FDEQ_BIN_0 +221 0x0203 //RX_FDEQ_BIN_1 +222 0x0303 //RX_FDEQ_BIN_2 +223 0x0304 //RX_FDEQ_BIN_3 +224 0x0405 //RX_FDEQ_BIN_4 +225 0x0506 //RX_FDEQ_BIN_5 +226 0x0708 //RX_FDEQ_BIN_6 +227 0x090A //RX_FDEQ_BIN_7 +228 0x0B0C //RX_FDEQ_BIN_8 +229 0x0D0E //RX_FDEQ_BIN_9 +230 0x1013 //RX_FDEQ_BIN_10 +231 0x1719 //RX_FDEQ_BIN_11 +232 0x1B1E //RX_FDEQ_BIN_12 +233 0x1E1E //RX_FDEQ_BIN_13 +234 0x1E28 //RX_FDEQ_BIN_14 +235 0x282C //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x4000 //RX_FDEQ_RESRV_0 +245 0x0320 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0030 //RX_FDDRC_BAND_MARGIN_1 +248 0x0050 //RX_FDDRC_BAND_MARGIN_2 +249 0x0080 //RX_FDDRC_BAND_MARGIN_3 +250 0x0007 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x5000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x6400 //RX_FDDRC_THRD_3_2 +258 0x6400 //RX_FDDRC_THRD_3_3 +259 0x2000 //RX_FDDRC_SLANT_0_0 +260 0x2000 //RX_FDDRC_SLANT_0_1 +261 0x2000 //RX_FDDRC_SLANT_0_2 +262 0x2000 //RX_FDDRC_SLANT_0_3 +263 0x5333 //RX_FDDRC_SLANT_1_0 +264 0x5333 //RX_FDDRC_SLANT_1_1 +265 0x5333 //RX_FDDRC_SLANT_1_2 +266 0x5333 //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +286 0x0099 //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 +#VOL 6 +163 0x5000 //RX_TDDRC_ALPHA_UP_1 +164 0x5000 //RX_TDDRC_ALPHA_UP_2 +165 0x5000 //RX_TDDRC_ALPHA_UP_3 +166 0x2000 //RX_TDDRC_ALPHA_UP_4 +184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +190 0x65AD //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +269 0x0000 //RX_TDDRC_THRD_0 +270 0x0000 //RX_TDDRC_THRD_1 +271 0x1A00 //RX_TDDRC_THRD_2 +272 0x1A00 //RX_TDDRC_THRD_3 +273 0x3000 //RX_TDDRC_SLANT_0 +274 0x7EB8 //RX_TDDRC_SLANT_1 +275 0x5000 //RX_TDDRC_ALPHA_UP_0 +276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x199A //RX_TDDRC_HMNC_GAIN +279 0x0001 //RX_TDDRC_SMT_FLAG +280 0x0CCD //RX_TDDRC_SMT_W +281 0x01C8 //RX_TDDRC_DRC_GAIN +195 0x0020 //RX_FDEQ_SUBNUM +196 0x4848 //RX_FDEQ_GAIN_0 +197 0x4848 //RX_FDEQ_GAIN_1 +198 0x4848 //RX_FDEQ_GAIN_2 +199 0x4848 //RX_FDEQ_GAIN_3 +200 0x4848 //RX_FDEQ_GAIN_4 +201 0x4848 //RX_FDEQ_GAIN_5 +202 0x4848 //RX_FDEQ_GAIN_6 +203 0x4848 //RX_FDEQ_GAIN_7 +204 0x4848 //RX_FDEQ_GAIN_8 +205 0x4848 //RX_FDEQ_GAIN_9 +206 0x4848 //RX_FDEQ_GAIN_10 +207 0x4848 //RX_FDEQ_GAIN_11 +208 0x4848 //RX_FDEQ_GAIN_12 +209 0x4848 //RX_FDEQ_GAIN_13 +210 0x4848 //RX_FDEQ_GAIN_14 +211 0x4848 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0202 //RX_FDEQ_BIN_0 +221 0x0203 //RX_FDEQ_BIN_1 +222 0x0303 //RX_FDEQ_BIN_2 +223 0x0304 //RX_FDEQ_BIN_3 +224 0x0405 //RX_FDEQ_BIN_4 +225 0x0506 //RX_FDEQ_BIN_5 +226 0x0708 //RX_FDEQ_BIN_6 +227 0x090A //RX_FDEQ_BIN_7 +228 0x0B0C //RX_FDEQ_BIN_8 +229 0x0D0E //RX_FDEQ_BIN_9 +230 0x1013 //RX_FDEQ_BIN_10 +231 0x1719 //RX_FDEQ_BIN_11 +232 0x1B1E //RX_FDEQ_BIN_12 +233 0x1E1E //RX_FDEQ_BIN_13 +234 0x1E28 //RX_FDEQ_BIN_14 +235 0x282C //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x4000 //RX_FDEQ_RESRV_0 +245 0x0320 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0030 //RX_FDDRC_BAND_MARGIN_1 +248 0x0050 //RX_FDDRC_BAND_MARGIN_2 +249 0x0080 //RX_FDDRC_BAND_MARGIN_3 +250 0x0007 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x5000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x6400 //RX_FDDRC_THRD_3_2 +258 0x6400 //RX_FDDRC_THRD_3_3 +259 0x2000 //RX_FDDRC_SLANT_0_0 +260 0x2000 //RX_FDDRC_SLANT_0_1 +261 0x2000 //RX_FDDRC_SLANT_0_2 +262 0x2000 //RX_FDDRC_SLANT_0_3 +263 0x5333 //RX_FDDRC_SLANT_1_0 +264 0x5333 //RX_FDDRC_SLANT_1_1 +265 0x5333 //RX_FDDRC_SLANT_1_2 +266 0x5333 //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +286 0x0100 //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 #CASE_NAME HEADSET-GOOGLE_CONDOR_CERTIFICATION1-VOICE_GENERIC-FB -#PARAM_MODE FULL -#PARAM_TYPE TX+RX -#TOTAL_CUSTOM_STEP 7 +#PARAM_MODE Full +#PARAM_TYPE TX+2RX +#TOTAL_CUSTOM_STEP 7+7 #TX 0 0x0009 //TX_OPERATION_MODE_0 1 0x0009 //TX_OPERATION_MODE_1 @@ -33585,10 +50989,10 @@ 248 0xF600 //TX_THR_SN_EST_6 249 0xF600 //TX_THR_SN_EST_7 250 0x0200 //TX_DELTA_THR_SN_EST_0 -251 0x0200 //TX_DELTA_THR_SN_EST_1 -252 0x0400 //TX_DELTA_THR_SN_EST_2 -253 0x0300 //TX_DELTA_THR_SN_EST_3 -254 0x0600 //TX_DELTA_THR_SN_EST_4 +251 0x0400 //TX_DELTA_THR_SN_EST_1 +252 0x0300 //TX_DELTA_THR_SN_EST_2 +253 0x0600 //TX_DELTA_THR_SN_EST_3 +254 0x0200 //TX_DELTA_THR_SN_EST_4 255 0x0200 //TX_DELTA_THR_SN_EST_5 256 0x0200 //TX_DELTA_THR_SN_EST_6 257 0x0200 //TX_DELTA_THR_SN_EST_7 @@ -33616,31 +51020,31 @@ 279 0x2000 //TX_B_POST_FLT_0 280 0x2000 //TX_B_POST_FLT_1 281 0x0012 //TX_NS_LVL_CTRL_0 -282 0x0019 //TX_NS_LVL_CTRL_1 +282 0x0016 //TX_NS_LVL_CTRL_1 283 0x0016 //TX_NS_LVL_CTRL_2 -284 0x0016 //TX_NS_LVL_CTRL_3 -285 0x0019 //TX_NS_LVL_CTRL_4 +284 0x0019 //TX_NS_LVL_CTRL_3 +285 0x0010 //TX_NS_LVL_CTRL_4 286 0x0010 //TX_NS_LVL_CTRL_5 -287 0x0010 //TX_NS_LVL_CTRL_6 +287 0x0019 //TX_NS_LVL_CTRL_6 288 0x0010 //TX_NS_LVL_CTRL_7 289 0x000C //TX_MIN_GAIN_S_0 -290 0x0011 //TX_MIN_GAIN_S_1 +290 0x000C //TX_MIN_GAIN_S_1 291 0x000C //TX_MIN_GAIN_S_2 -292 0x000C //TX_MIN_GAIN_S_3 -293 0x000F //TX_MIN_GAIN_S_4 +292 0x000F //TX_MIN_GAIN_S_3 +293 0x000C //TX_MIN_GAIN_S_4 294 0x000C //TX_MIN_GAIN_S_5 -295 0x000C //TX_MIN_GAIN_S_6 +295 0x0011 //TX_MIN_GAIN_S_6 296 0x000C //TX_MIN_GAIN_S_7 297 0x7FFF //TX_NMOS_SUP 298 0x0000 //TX_NS_MAX_PRI_SNR_TH 299 0x0000 //TX_NMOS_SUP_MENSA 300 0x7000 //TX_SNRI_SUP_0 -301 0x6000 //TX_SNRI_SUP_1 +301 0x7000 //TX_SNRI_SUP_1 302 0x7000 //TX_SNRI_SUP_2 -303 0x7000 //TX_SNRI_SUP_3 -304 0x6000 //TX_SNRI_SUP_4 +303 0x6000 //TX_SNRI_SUP_3 +304 0x7FFF //TX_SNRI_SUP_4 305 0x7FFF //TX_SNRI_SUP_5 -306 0x7FFF //TX_SNRI_SUP_6 +306 0x6000 //TX_SNRI_SUP_6 307 0x7FFF //TX_SNRI_SUP_7 308 0x7FFF //TX_THR_LFNS 309 0x0016 //TX_G_LFNS @@ -33657,8 +51061,8 @@ 320 0x6000 //TX_A_POST_FILT_S_6 321 0x6000 //TX_A_POST_FILT_S_7 322 0x2000 //TX_B_POST_FILT_0 -323 0x2000 //TX_B_POST_FILT_1 -324 0x4000 //TX_B_POST_FILT_2 +323 0x4000 //TX_B_POST_FILT_1 +324 0x2000 //TX_B_POST_FILT_2 325 0x2000 //TX_B_POST_FILT_3 326 0x2000 //TX_B_POST_FILT_4 327 0x2000 //TX_B_POST_FILT_5 @@ -33701,7 +51105,7 @@ 364 0x0000 //TX_K_APT 365 0x0001 //TX_NOISEDET 366 0x0190 //TX_NDETCT -367 0x0020 //TX_NOISE_TH_0 +367 0x04E8 //TX_NOISE_TH_0 368 0x7FFF //TX_NOISE_TH_0_2 369 0x7FFF //TX_NOISE_TH_0_3 370 0x02A6 //TX_NOISE_TH_1 @@ -33713,11 +51117,11 @@ 376 0x0001 //TX_NOISE_TH_5_3 377 0x0000 //TX_NOISE_TH_5_4 378 0x02BC //TX_NOISE_TH_6 -379 0x0020 //TX_MINENOISE_TH -380 0x4000 //TX_MINENOISE_MIC0_TH_MTS -381 0xFFEE //TX_MINENOISE_MIC0_TH_EXP -382 0x6000 //TX_MINENOISE_MIC0_S_TH_MTS -383 0xFFF3 //TX_MINENOISE_MIC0_S_TH_EXP +379 0x02BC //TX_MINENOISE_TH +380 0xD508 //TX_MORENS_TFMASK_TH +381 0x0001 //TX_DRC_QUIET_FLOOR +382 0x3A98 //TX_RATIODTL_CUT_TH +383 0x1482 //TX_DT_CUT_K1 384 0x0666 //TX_OUT_ENER_S_TH_CLEAN 385 0x0666 //TX_OUT_ENER_S_TH_LESSCLEAN 386 0x0333 //TX_OUT_ENER_S_TH_NOISY @@ -33725,22 +51129,22 @@ 388 0x0333 //TX_OUT_ENER_TH_SPEECH 389 0x2000 //TX_SN_NPB_GAIN 390 0x0000 //TX_NN_NPB_GAIN -391 0x0000 //TX_CSX_ALPHA_0 -392 0x0000 //TX_CSX_ALPHA_1 -393 0x0000 //TX_CSX_ALPHA_2 -394 0x0000 //TX_CSX_ALPHA_3 -395 0x0800 //TX_MU_ARSP_EST -396 0x00C8 //TX_P_OUTBEAM_MIN_TH +391 0x7FFF //TX_POST_MASK_SUP_HSNE +392 0x1388 //TX_TAIL_DET_TH +393 0x4000 //TX_B_LESSCUT_RTO_WTA +394 0x0000 //TX_MEL_G_R +395 0x0080 //TX_SUPHIGH_TH +396 0x0000 //TX_MASK_G_R 397 0x0002 //TX_EXTRA_NS_L -398 0x0800 //TX_EXTRA_NS_A -399 0x0005 //TX_VR_NOISE_FLOOR_TH +398 0x1800 //TX_C_POST_FLT_MASK +399 0x7FFF //TX_A_POST_FLT_WNS 400 0x0148 //TX_MIN_G_LOW300HZ 401 0x0004 //TX_MAXLEVEL_CNG 402 0x00B4 //TX_STN_NOISE_TH 403 0x4000 //TX_POST_MASK_SUP 404 0x7FFF //TX_POST_MASK_ADJUST 405 0x00C8 //TX_NS_ENOISE_MIC0_TH -406 0x0020 //TX_MINENOISE_MIC0_TH +406 0x04E7 //TX_MINENOISE_MIC0_TH 407 0x012C //TX_MINENOISE_MIC0_S_TH 408 0x2900 //TX_MIN_G_CTRL_SSNS 409 0x0800 //TX_METAL_RTO_THR @@ -33848,16 +51252,16 @@ 511 0x6666 //TX_MIC_TO_BFGAIN 512 0x0000 //TX_MICTOBFGAIN0 513 0x0000 //TX_FASTMUE_TH -514 0x0000 //TX_DERVB_LEN_0 -515 0x0000 //TX_DERVB_LEN_1 -516 0x0000 //TX_RHO_DERVB -517 0x0000 //TX_MIC_INDX_DERVB -518 0x0000 //TX_MU_DERVB -519 0x0000 //TX_DR_RESRV_0 -520 0x0000 //TX_DR_RESRV_1 -521 0x0000 //TX_DR_RESRV_2 -522 0x0000 //TX_DR_RESRV_3 -523 0x0000 //TX_DR_RESRV_4 +514 0xC000 //TX_DEREVERB_LF_MU +515 0xC000 //TX_DEREVERB_HF_MU +516 0xCCCC //TX_DEREVERB_DELAY +517 0xD999 //TX_DEREVERB_COEF_LEN +518 0x1F40 //TX_DEREVERB_DNR +519 0x0000 //TX_DEREVERB_ALPHA +520 0x0000 //TX_DEREVERB_BETA +521 0x0000 //TX_GSC_RTOL_TH +522 0x7000 //TX_GSC_RTOH_TH +523 0x0064 //TX_WIDE2_MEANHTH 524 0x0000 //TX_DR_RESRV_5 525 0x0000 //TX_DR_RESRV_6 526 0x0000 //TX_DR_RESRV_7 @@ -34231,8 +51635,73 @@ 894 0xC000 //TX_FASTNS_SSA_THHFL 895 0xCCCC //TX_FASTNS_SSA_THLFH 896 0xD999 //TX_FASTNS_SSA_THHFH +897 0x2339 //TX_SENDFUNC_REG_MICMUTE +898 0x0021 //TX_SENDFUNC_REG_MICMUTE1 +899 0x02BC //TX_MICMUTE_RATIO_THR +900 0x0140 //TX_MICMUTE_AMP_THR +901 0x0004 //TX_MICMUTE_HPF_IND +902 0x00C0 //TX_MICMUTE_LOG_EYR_TH +903 0x0008 //TX_MICMUTE_CVG_TIME +904 0x0008 //TX_MICMUTE_RELEASE_TIME +905 0x01FE //TX_MIC_VOLUME_MIC0MUTE +906 0x0020 //TX_MICMUTE_EPD_OFFSET_0 +907 0x001E //TX_MICMUTE_FRQ_AEC_L +908 0x7999 //TX_MICMUTE_EAD_THR +909 0x7FFF //TX_MICMUTE_LAMBDA_CB_NLE +910 0x7FFF //TX_MICMUTE_LAMBDA_RE_EST +911 0x4000 //TX_DTD_THR1_MICMUTE_0 +912 0x7000 //TX_DTD_THR1_MICMUTE_1 +913 0x7FFF //TX_DTD_THR1_MICMUTE_2 +914 0x7FFF //TX_DTD_THR1_MICMUTE_3 +915 0x6CCC //TX_DTD_THR2_MICMUTE_0 +916 0x0400 //TX_MICMUTE_MIN_EQ_RE_EST_0 +917 0x0400 //TX_MICMUTE_MIN_EQ_RE_EST_1 +918 0x1000 //TX_MICMUTE_MIN_EQ_RE_EST_2 +919 0x7FFF //TX_MICMUTE_MIN_EQ_RE_EST_3 +920 0x7FFF //TX_MICMUTE_MIN_EQ_RE_EST_4 +921 0x4000 //TX_MICMUTE_C_POST_FLT +922 0x03E8 //TX_MICMUTE_DT_CUT_K +923 0x0001 //TX_MICMUTE_DT_CUT_THR +924 0x03E8 //TX_MICMUTE_DT_CUT_K2 +925 0x0001 //TX_MICMUTE_DT_CUT_THR2 +926 0x0064 //TX_MICMUTE_DT2_HOLD_N +927 0x1000 //TX_MICMUTE_RATIODTH_THCUT +928 0x1000 //TX_MICMUTE_B_POST_FLT_ECHOL +929 0x7FFF //TX_MICMUTE_B_POST_FLT_ECHOH +930 0x0400 //TX_MICMUTE_C_POST_FLT_MASK +931 0x7999 //TX_MICMUTE_RATIODTL_CUT_TH +932 0x0258 //TX_MICMUTE_DT_CUT_K1 +933 0x0800 //TX_MICMUTE_N2_SN_EST +934 0xFC00 //TX_MICMUTE_THR_SN_EST_0 +935 0x001C //TX_MICMUTE_MIN_G_CTRL_0 +936 0x6000 //TX_MICMUTE_A_POST_FILT_S_0 +937 0x7000 //TX_MICMUTE_B_POST_FILT_0 +938 0x2710 //TX_MIC1RUB_AMP_THR +939 0x0010 //TX_MIC1MUTE_RATIO_THR +940 0x0450 //TX_MIC1MUTE_AMP_THR +941 0x0008 //TX_MIC1MUTE_CVG_TIME +942 0x0008 //TX_MIC1MUTE_RELEASE_TIME +943 0x0000 //TX_AMS_RESRV_01 +944 0x0000 //TX_AMS_RESRV_02 +945 0x0000 //TX_AMS_RESRV_03 +946 0x0000 //TX_AMS_RESRV_04 +947 0x0000 //TX_AMS_RESRV_05 +948 0x0000 //TX_AMS_RESRV_06 +949 0x0000 //TX_AMS_RESRV_07 +950 0x0000 //TX_AMS_RESRV_08 +951 0x0000 //TX_AMS_RESRV_09 +952 0x0000 //TX_AMS_RESRV_10 +953 0x0000 //TX_AMS_RESRV_11 +954 0x0000 //TX_AMS_RESRV_12 +955 0x0000 //TX_AMS_RESRV_13 +956 0x0000 //TX_AMS_RESRV_14 +957 0x0000 //TX_AMS_RESRV_15 +958 0x0000 //TX_AMS_RESRV_16 +959 0x0000 //TX_AMS_RESRV_17 +960 0x0000 //TX_AMS_RESRV_18 +961 0x0000 //TX_AMS_RESRV_19 #RX -0 0x002C //RX_RECVFUNC_MODE_0 +0 0x202C //RX_RECVFUNC_MODE_0 1 0x0000 //RX_RECVFUNC_MODE_1 2 0x0004 //RX_SAMPLINGFREQ_SIG 3 0x0004 //RX_SAMPLINGFREQ_PROC @@ -35082,11 +52551,862 @@ 110 0x0000 //RX_FDDRC_RESRV_0 129 0x0100 //RX_SPK_VOL 130 0x0000 //RX_VOL_RESRV_0 +#RX 2 +157 0x202C //RX_RECVFUNC_MODE_0 +158 0x0000 //RX_RECVFUNC_MODE_1 +159 0x0004 //RX_SAMPLINGFREQ_SIG +160 0x0004 //RX_SAMPLINGFREQ_PROC +161 0x000A //RX_FRAME_SZ +162 0x0000 //RX_DELAY_OPT +163 0x1000 //RX_TDDRC_ALPHA_UP_1 +164 0x1000 //RX_TDDRC_ALPHA_UP_2 +165 0x1000 //RX_TDDRC_ALPHA_UP_3 +166 0x1000 //RX_TDDRC_ALPHA_UP_4 +167 0x0800 //RX_PGA +168 0x7B02 //RX_A_HP +169 0x4000 //RX_B_PE +170 0x7800 //RX_THR_PITCH_DET_0 +171 0x7000 //RX_THR_PITCH_DET_1 +172 0x6000 //RX_THR_PITCH_DET_2 +173 0x0008 //RX_PITCH_BFR_LEN +174 0x0003 //RX_SBD_PITCH_DET +175 0x0100 //RX_PP_RESRV_0 +176 0x0020 //RX_PP_RESRV_1 +177 0x0500 //RX_N_SN_EST +178 0x000C //RX_N2_SN_EST +179 0x000A //RX_NS_LVL_CTRL +180 0xF600 //RX_THR_SN_EST +181 0x7000 //RX_LAMBDA_PFILT +182 0x000A //RX_FENS_RESRV_0 +183 0x0190 //RX_FENS_RESRV_1 +184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +187 0x0002 //RX_EXTRA_NS_L +188 0x0800 //RX_EXTRA_NS_A +189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +190 0x7FFF //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +192 0x199A //RX_A_POST_FLT +193 0x0000 //RX_LMT_THRD +194 0x4000 //RX_LMT_ALPHA +195 0x0020 //RX_FDEQ_SUBNUM +196 0x4848 //RX_FDEQ_GAIN_0 +197 0x4848 //RX_FDEQ_GAIN_1 +198 0x4848 //RX_FDEQ_GAIN_2 +199 0x4848 //RX_FDEQ_GAIN_3 +200 0x4848 //RX_FDEQ_GAIN_4 +201 0x4848 //RX_FDEQ_GAIN_5 +202 0x4848 //RX_FDEQ_GAIN_6 +203 0x4848 //RX_FDEQ_GAIN_7 +204 0x4848 //RX_FDEQ_GAIN_8 +205 0x4848 //RX_FDEQ_GAIN_9 +206 0x4848 //RX_FDEQ_GAIN_10 +207 0x4848 //RX_FDEQ_GAIN_11 +208 0x4848 //RX_FDEQ_GAIN_12 +209 0x4848 //RX_FDEQ_GAIN_13 +210 0x4848 //RX_FDEQ_GAIN_14 +211 0x4848 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0202 //RX_FDEQ_BIN_0 +221 0x0203 //RX_FDEQ_BIN_1 +222 0x0304 //RX_FDEQ_BIN_2 +223 0x0405 //RX_FDEQ_BIN_3 +224 0x0607 //RX_FDEQ_BIN_4 +225 0x0809 //RX_FDEQ_BIN_5 +226 0x0A0B //RX_FDEQ_BIN_6 +227 0x0C0D //RX_FDEQ_BIN_7 +228 0x0E0F //RX_FDEQ_BIN_8 +229 0x1011 //RX_FDEQ_BIN_9 +230 0x1214 //RX_FDEQ_BIN_10 +231 0x1618 //RX_FDEQ_BIN_11 +232 0x1C1C //RX_FDEQ_BIN_12 +233 0x2020 //RX_FDEQ_BIN_13 +234 0x2020 //RX_FDEQ_BIN_14 +235 0x2011 //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x4000 //RX_FDEQ_RESRV_0 +245 0x0320 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0030 //RX_FDDRC_BAND_MARGIN_1 +248 0x0050 //RX_FDDRC_BAND_MARGIN_2 +249 0x0080 //RX_FDDRC_BAND_MARGIN_3 +250 0x0007 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x5000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x6400 //RX_FDDRC_THRD_3_2 +258 0x6400 //RX_FDDRC_THRD_3_3 +259 0x2000 //RX_FDDRC_SLANT_0_0 +260 0x2000 //RX_FDDRC_SLANT_0_1 +261 0x2000 //RX_FDDRC_SLANT_0_2 +262 0x2000 //RX_FDDRC_SLANT_0_3 +263 0x5333 //RX_FDDRC_SLANT_1_0 +264 0x5333 //RX_FDDRC_SLANT_1_1 +265 0x5333 //RX_FDDRC_SLANT_1_2 +266 0x5333 //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +268 0x0002 //RX_FILTINDX +269 0x0000 //RX_TDDRC_THRD_0 +270 0x0000 //RX_TDDRC_THRD_1 +271 0x1200 //RX_TDDRC_THRD_2 +272 0x1900 //RX_TDDRC_THRD_3 +273 0x3000 //RX_TDDRC_SLANT_0 +274 0x6E00 //RX_TDDRC_SLANT_1 +275 0x1000 //RX_TDDRC_ALPHA_UP_0 +276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x199A //RX_TDDRC_HMNC_GAIN +279 0x0001 //RX_TDDRC_SMT_FLAG +280 0x0CCD //RX_TDDRC_SMT_W +281 0x0240 //RX_TDDRC_DRC_GAIN +282 0x7C00 //RX_LAMBDA_PKA_FP +283 0x2000 //RX_TPKA_FP +284 0x2000 //RX_MIN_G_FP +285 0x0080 //RX_MAX_G_FP +286 0x000B //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 +288 0x0000 //RX_MAXLEVEL_CNG +289 0x3000 //RX_BWE_UV_TH +290 0x3000 //RX_BWE_UV_TH2 +291 0x1800 //RX_BWE_UV_TH3 +292 0x1000 //RX_BWE_V_TH +293 0x04CD //RX_BWE_GAIN1_V_TH1 +294 0x0F33 //RX_BWE_GAIN1_V_TH2 +295 0x7333 //RX_BWE_UV_EQ +296 0x199A //RX_BWE_V_EQ +297 0x7333 //RX_BWE_TONE_TH +298 0x0004 //RX_BWE_UV_HOLD_T +299 0x6CCD //RX_BWE_GAIN2_ALPHA +300 0x799A //RX_BWE_GAIN3_ALPHA +301 0x001E //RX_BWE_CUTOFF +302 0x3000 //RX_BWE_GAINFILL +303 0x3200 //RX_BWE_MAXTH_TONE +304 0x2000 //RX_BWE_EQ_0 +305 0x2000 //RX_BWE_EQ_1 +306 0x2000 //RX_BWE_EQ_2 +307 0x2000 //RX_BWE_EQ_3 +308 0x2000 //RX_BWE_EQ_4 +309 0x2000 //RX_BWE_EQ_5 +310 0x2000 //RX_BWE_EQ_6 +311 0x0000 //RX_BWE_RESRV_0 +312 0x0000 //RX_BWE_RESRV_1 +313 0x0000 //RX_BWE_RESRV_2 +#VOL 0 +163 0x1000 //RX_TDDRC_ALPHA_UP_1 +164 0x1000 //RX_TDDRC_ALPHA_UP_2 +165 0x1000 //RX_TDDRC_ALPHA_UP_3 +166 0x1000 //RX_TDDRC_ALPHA_UP_4 +184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +190 0x7FFF //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +269 0x0000 //RX_TDDRC_THRD_0 +270 0x0000 //RX_TDDRC_THRD_1 +271 0x1200 //RX_TDDRC_THRD_2 +272 0x1900 //RX_TDDRC_THRD_3 +273 0x3000 //RX_TDDRC_SLANT_0 +274 0x6E00 //RX_TDDRC_SLANT_1 +275 0x1000 //RX_TDDRC_ALPHA_UP_0 +276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x199A //RX_TDDRC_HMNC_GAIN +279 0x0001 //RX_TDDRC_SMT_FLAG +280 0x0CCD //RX_TDDRC_SMT_W +281 0x0240 //RX_TDDRC_DRC_GAIN +195 0x0020 //RX_FDEQ_SUBNUM +196 0x4848 //RX_FDEQ_GAIN_0 +197 0x4848 //RX_FDEQ_GAIN_1 +198 0x4848 //RX_FDEQ_GAIN_2 +199 0x4848 //RX_FDEQ_GAIN_3 +200 0x4848 //RX_FDEQ_GAIN_4 +201 0x4848 //RX_FDEQ_GAIN_5 +202 0x4848 //RX_FDEQ_GAIN_6 +203 0x4848 //RX_FDEQ_GAIN_7 +204 0x4848 //RX_FDEQ_GAIN_8 +205 0x4848 //RX_FDEQ_GAIN_9 +206 0x4848 //RX_FDEQ_GAIN_10 +207 0x4848 //RX_FDEQ_GAIN_11 +208 0x4848 //RX_FDEQ_GAIN_12 +209 0x4848 //RX_FDEQ_GAIN_13 +210 0x4848 //RX_FDEQ_GAIN_14 +211 0x4848 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0202 //RX_FDEQ_BIN_0 +221 0x0203 //RX_FDEQ_BIN_1 +222 0x0304 //RX_FDEQ_BIN_2 +223 0x0405 //RX_FDEQ_BIN_3 +224 0x0607 //RX_FDEQ_BIN_4 +225 0x0809 //RX_FDEQ_BIN_5 +226 0x0A0B //RX_FDEQ_BIN_6 +227 0x0C0D //RX_FDEQ_BIN_7 +228 0x0E0F //RX_FDEQ_BIN_8 +229 0x1011 //RX_FDEQ_BIN_9 +230 0x1214 //RX_FDEQ_BIN_10 +231 0x1618 //RX_FDEQ_BIN_11 +232 0x1C1C //RX_FDEQ_BIN_12 +233 0x2020 //RX_FDEQ_BIN_13 +234 0x2020 //RX_FDEQ_BIN_14 +235 0x2011 //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x4000 //RX_FDEQ_RESRV_0 +245 0x0320 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0030 //RX_FDDRC_BAND_MARGIN_1 +248 0x0050 //RX_FDDRC_BAND_MARGIN_2 +249 0x0080 //RX_FDDRC_BAND_MARGIN_3 +250 0x0007 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x5000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x6400 //RX_FDDRC_THRD_3_2 +258 0x6400 //RX_FDDRC_THRD_3_3 +259 0x2000 //RX_FDDRC_SLANT_0_0 +260 0x2000 //RX_FDDRC_SLANT_0_1 +261 0x2000 //RX_FDDRC_SLANT_0_2 +262 0x2000 //RX_FDDRC_SLANT_0_3 +263 0x5333 //RX_FDDRC_SLANT_1_0 +264 0x5333 //RX_FDDRC_SLANT_1_1 +265 0x5333 //RX_FDDRC_SLANT_1_2 +266 0x5333 //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +286 0x000B //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 +#VOL 1 +163 0x1000 //RX_TDDRC_ALPHA_UP_1 +164 0x1000 //RX_TDDRC_ALPHA_UP_2 +165 0x1000 //RX_TDDRC_ALPHA_UP_3 +166 0x1000 //RX_TDDRC_ALPHA_UP_4 +184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +190 0x7FFF //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +269 0x0000 //RX_TDDRC_THRD_0 +270 0x0000 //RX_TDDRC_THRD_1 +271 0x1200 //RX_TDDRC_THRD_2 +272 0x1900 //RX_TDDRC_THRD_3 +273 0x3000 //RX_TDDRC_SLANT_0 +274 0x6E00 //RX_TDDRC_SLANT_1 +275 0x1000 //RX_TDDRC_ALPHA_UP_0 +276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x199A //RX_TDDRC_HMNC_GAIN +279 0x0001 //RX_TDDRC_SMT_FLAG +280 0x0CCD //RX_TDDRC_SMT_W +281 0x0240 //RX_TDDRC_DRC_GAIN +195 0x0020 //RX_FDEQ_SUBNUM +196 0x4848 //RX_FDEQ_GAIN_0 +197 0x4848 //RX_FDEQ_GAIN_1 +198 0x4848 //RX_FDEQ_GAIN_2 +199 0x4848 //RX_FDEQ_GAIN_3 +200 0x4848 //RX_FDEQ_GAIN_4 +201 0x4848 //RX_FDEQ_GAIN_5 +202 0x4848 //RX_FDEQ_GAIN_6 +203 0x4848 //RX_FDEQ_GAIN_7 +204 0x4848 //RX_FDEQ_GAIN_8 +205 0x4848 //RX_FDEQ_GAIN_9 +206 0x4848 //RX_FDEQ_GAIN_10 +207 0x4848 //RX_FDEQ_GAIN_11 +208 0x4848 //RX_FDEQ_GAIN_12 +209 0x4848 //RX_FDEQ_GAIN_13 +210 0x4848 //RX_FDEQ_GAIN_14 +211 0x4848 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0202 //RX_FDEQ_BIN_0 +221 0x0203 //RX_FDEQ_BIN_1 +222 0x0304 //RX_FDEQ_BIN_2 +223 0x0405 //RX_FDEQ_BIN_3 +224 0x0607 //RX_FDEQ_BIN_4 +225 0x0809 //RX_FDEQ_BIN_5 +226 0x0A0B //RX_FDEQ_BIN_6 +227 0x0C0D //RX_FDEQ_BIN_7 +228 0x0E0F //RX_FDEQ_BIN_8 +229 0x1011 //RX_FDEQ_BIN_9 +230 0x1214 //RX_FDEQ_BIN_10 +231 0x1618 //RX_FDEQ_BIN_11 +232 0x1C1C //RX_FDEQ_BIN_12 +233 0x2020 //RX_FDEQ_BIN_13 +234 0x2020 //RX_FDEQ_BIN_14 +235 0x2011 //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x4000 //RX_FDEQ_RESRV_0 +245 0x0320 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0030 //RX_FDDRC_BAND_MARGIN_1 +248 0x0050 //RX_FDDRC_BAND_MARGIN_2 +249 0x0080 //RX_FDDRC_BAND_MARGIN_3 +250 0x0007 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x5000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x6400 //RX_FDDRC_THRD_3_2 +258 0x6400 //RX_FDDRC_THRD_3_3 +259 0x2000 //RX_FDDRC_SLANT_0_0 +260 0x2000 //RX_FDDRC_SLANT_0_1 +261 0x2000 //RX_FDDRC_SLANT_0_2 +262 0x2000 //RX_FDDRC_SLANT_0_3 +263 0x5333 //RX_FDDRC_SLANT_1_0 +264 0x5333 //RX_FDDRC_SLANT_1_1 +265 0x5333 //RX_FDDRC_SLANT_1_2 +266 0x5333 //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +286 0x0013 //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 +#VOL 2 +163 0x1000 //RX_TDDRC_ALPHA_UP_1 +164 0x1000 //RX_TDDRC_ALPHA_UP_2 +165 0x1000 //RX_TDDRC_ALPHA_UP_3 +166 0x1000 //RX_TDDRC_ALPHA_UP_4 +184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +190 0x7FFF //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +269 0x0000 //RX_TDDRC_THRD_0 +270 0x0000 //RX_TDDRC_THRD_1 +271 0x1200 //RX_TDDRC_THRD_2 +272 0x1900 //RX_TDDRC_THRD_3 +273 0x3000 //RX_TDDRC_SLANT_0 +274 0x6E00 //RX_TDDRC_SLANT_1 +275 0x1000 //RX_TDDRC_ALPHA_UP_0 +276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x199A //RX_TDDRC_HMNC_GAIN +279 0x0001 //RX_TDDRC_SMT_FLAG +280 0x0CCD //RX_TDDRC_SMT_W +281 0x0240 //RX_TDDRC_DRC_GAIN +195 0x0020 //RX_FDEQ_SUBNUM +196 0x4848 //RX_FDEQ_GAIN_0 +197 0x4848 //RX_FDEQ_GAIN_1 +198 0x4848 //RX_FDEQ_GAIN_2 +199 0x4848 //RX_FDEQ_GAIN_3 +200 0x4848 //RX_FDEQ_GAIN_4 +201 0x4848 //RX_FDEQ_GAIN_5 +202 0x4848 //RX_FDEQ_GAIN_6 +203 0x4848 //RX_FDEQ_GAIN_7 +204 0x4848 //RX_FDEQ_GAIN_8 +205 0x4848 //RX_FDEQ_GAIN_9 +206 0x4848 //RX_FDEQ_GAIN_10 +207 0x4848 //RX_FDEQ_GAIN_11 +208 0x4848 //RX_FDEQ_GAIN_12 +209 0x4848 //RX_FDEQ_GAIN_13 +210 0x4848 //RX_FDEQ_GAIN_14 +211 0x4848 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0202 //RX_FDEQ_BIN_0 +221 0x0203 //RX_FDEQ_BIN_1 +222 0x0304 //RX_FDEQ_BIN_2 +223 0x0405 //RX_FDEQ_BIN_3 +224 0x0607 //RX_FDEQ_BIN_4 +225 0x0809 //RX_FDEQ_BIN_5 +226 0x0A0B //RX_FDEQ_BIN_6 +227 0x0C0D //RX_FDEQ_BIN_7 +228 0x0E0F //RX_FDEQ_BIN_8 +229 0x1011 //RX_FDEQ_BIN_9 +230 0x1214 //RX_FDEQ_BIN_10 +231 0x1618 //RX_FDEQ_BIN_11 +232 0x1C1C //RX_FDEQ_BIN_12 +233 0x2020 //RX_FDEQ_BIN_13 +234 0x2020 //RX_FDEQ_BIN_14 +235 0x2011 //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x4000 //RX_FDEQ_RESRV_0 +245 0x0320 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0030 //RX_FDDRC_BAND_MARGIN_1 +248 0x0050 //RX_FDDRC_BAND_MARGIN_2 +249 0x0080 //RX_FDDRC_BAND_MARGIN_3 +250 0x0007 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x5000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x6400 //RX_FDDRC_THRD_3_2 +258 0x6400 //RX_FDDRC_THRD_3_3 +259 0x2000 //RX_FDDRC_SLANT_0_0 +260 0x2000 //RX_FDDRC_SLANT_0_1 +261 0x2000 //RX_FDDRC_SLANT_0_2 +262 0x2000 //RX_FDDRC_SLANT_0_3 +263 0x5333 //RX_FDDRC_SLANT_1_0 +264 0x5333 //RX_FDDRC_SLANT_1_1 +265 0x5333 //RX_FDDRC_SLANT_1_2 +266 0x5333 //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +286 0x0020 //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 +#VOL 3 +163 0x1000 //RX_TDDRC_ALPHA_UP_1 +164 0x1000 //RX_TDDRC_ALPHA_UP_2 +165 0x1000 //RX_TDDRC_ALPHA_UP_3 +166 0x1000 //RX_TDDRC_ALPHA_UP_4 +184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +190 0x7FFF //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +269 0x0000 //RX_TDDRC_THRD_0 +270 0x0000 //RX_TDDRC_THRD_1 +271 0x1200 //RX_TDDRC_THRD_2 +272 0x1900 //RX_TDDRC_THRD_3 +273 0x3000 //RX_TDDRC_SLANT_0 +274 0x6E00 //RX_TDDRC_SLANT_1 +275 0x1000 //RX_TDDRC_ALPHA_UP_0 +276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x199A //RX_TDDRC_HMNC_GAIN +279 0x0001 //RX_TDDRC_SMT_FLAG +280 0x0CCD //RX_TDDRC_SMT_W +281 0x0240 //RX_TDDRC_DRC_GAIN +195 0x0020 //RX_FDEQ_SUBNUM +196 0x4848 //RX_FDEQ_GAIN_0 +197 0x4848 //RX_FDEQ_GAIN_1 +198 0x4848 //RX_FDEQ_GAIN_2 +199 0x4848 //RX_FDEQ_GAIN_3 +200 0x4848 //RX_FDEQ_GAIN_4 +201 0x4848 //RX_FDEQ_GAIN_5 +202 0x4848 //RX_FDEQ_GAIN_6 +203 0x4848 //RX_FDEQ_GAIN_7 +204 0x4848 //RX_FDEQ_GAIN_8 +205 0x4848 //RX_FDEQ_GAIN_9 +206 0x4848 //RX_FDEQ_GAIN_10 +207 0x4848 //RX_FDEQ_GAIN_11 +208 0x4848 //RX_FDEQ_GAIN_12 +209 0x4848 //RX_FDEQ_GAIN_13 +210 0x4848 //RX_FDEQ_GAIN_14 +211 0x4848 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0202 //RX_FDEQ_BIN_0 +221 0x0203 //RX_FDEQ_BIN_1 +222 0x0304 //RX_FDEQ_BIN_2 +223 0x0405 //RX_FDEQ_BIN_3 +224 0x0607 //RX_FDEQ_BIN_4 +225 0x0809 //RX_FDEQ_BIN_5 +226 0x0A0B //RX_FDEQ_BIN_6 +227 0x0C0D //RX_FDEQ_BIN_7 +228 0x0E0F //RX_FDEQ_BIN_8 +229 0x1011 //RX_FDEQ_BIN_9 +230 0x1214 //RX_FDEQ_BIN_10 +231 0x1618 //RX_FDEQ_BIN_11 +232 0x1C1C //RX_FDEQ_BIN_12 +233 0x2020 //RX_FDEQ_BIN_13 +234 0x2020 //RX_FDEQ_BIN_14 +235 0x2011 //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x4000 //RX_FDEQ_RESRV_0 +245 0x0320 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0030 //RX_FDDRC_BAND_MARGIN_1 +248 0x0050 //RX_FDDRC_BAND_MARGIN_2 +249 0x0080 //RX_FDDRC_BAND_MARGIN_3 +250 0x0007 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x5000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x6400 //RX_FDDRC_THRD_3_2 +258 0x6400 //RX_FDDRC_THRD_3_3 +259 0x2000 //RX_FDDRC_SLANT_0_0 +260 0x2000 //RX_FDDRC_SLANT_0_1 +261 0x2000 //RX_FDDRC_SLANT_0_2 +262 0x2000 //RX_FDDRC_SLANT_0_3 +263 0x5333 //RX_FDDRC_SLANT_1_0 +264 0x5333 //RX_FDDRC_SLANT_1_1 +265 0x5333 //RX_FDDRC_SLANT_1_2 +266 0x5333 //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +286 0x0036 //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 +#VOL 4 +163 0x1000 //RX_TDDRC_ALPHA_UP_1 +164 0x1000 //RX_TDDRC_ALPHA_UP_2 +165 0x1000 //RX_TDDRC_ALPHA_UP_3 +166 0x1000 //RX_TDDRC_ALPHA_UP_4 +184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +190 0x7FFF //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +269 0x0000 //RX_TDDRC_THRD_0 +270 0x0000 //RX_TDDRC_THRD_1 +271 0x1200 //RX_TDDRC_THRD_2 +272 0x1900 //RX_TDDRC_THRD_3 +273 0x3000 //RX_TDDRC_SLANT_0 +274 0x6E00 //RX_TDDRC_SLANT_1 +275 0x1000 //RX_TDDRC_ALPHA_UP_0 +276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x199A //RX_TDDRC_HMNC_GAIN +279 0x0001 //RX_TDDRC_SMT_FLAG +280 0x0CCD //RX_TDDRC_SMT_W +281 0x0240 //RX_TDDRC_DRC_GAIN +195 0x0020 //RX_FDEQ_SUBNUM +196 0x4848 //RX_FDEQ_GAIN_0 +197 0x4848 //RX_FDEQ_GAIN_1 +198 0x4848 //RX_FDEQ_GAIN_2 +199 0x4848 //RX_FDEQ_GAIN_3 +200 0x4848 //RX_FDEQ_GAIN_4 +201 0x4848 //RX_FDEQ_GAIN_5 +202 0x4848 //RX_FDEQ_GAIN_6 +203 0x4848 //RX_FDEQ_GAIN_7 +204 0x4848 //RX_FDEQ_GAIN_8 +205 0x4848 //RX_FDEQ_GAIN_9 +206 0x4848 //RX_FDEQ_GAIN_10 +207 0x4848 //RX_FDEQ_GAIN_11 +208 0x4848 //RX_FDEQ_GAIN_12 +209 0x4848 //RX_FDEQ_GAIN_13 +210 0x4848 //RX_FDEQ_GAIN_14 +211 0x4848 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0202 //RX_FDEQ_BIN_0 +221 0x0203 //RX_FDEQ_BIN_1 +222 0x0304 //RX_FDEQ_BIN_2 +223 0x0405 //RX_FDEQ_BIN_3 +224 0x0607 //RX_FDEQ_BIN_4 +225 0x0809 //RX_FDEQ_BIN_5 +226 0x0A0B //RX_FDEQ_BIN_6 +227 0x0C0D //RX_FDEQ_BIN_7 +228 0x0E0F //RX_FDEQ_BIN_8 +229 0x1011 //RX_FDEQ_BIN_9 +230 0x1214 //RX_FDEQ_BIN_10 +231 0x1618 //RX_FDEQ_BIN_11 +232 0x1C1C //RX_FDEQ_BIN_12 +233 0x2020 //RX_FDEQ_BIN_13 +234 0x2020 //RX_FDEQ_BIN_14 +235 0x2011 //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x4000 //RX_FDEQ_RESRV_0 +245 0x0320 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0030 //RX_FDDRC_BAND_MARGIN_1 +248 0x0050 //RX_FDDRC_BAND_MARGIN_2 +249 0x0080 //RX_FDDRC_BAND_MARGIN_3 +250 0x0007 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x5000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x6400 //RX_FDDRC_THRD_3_2 +258 0x6400 //RX_FDDRC_THRD_3_3 +259 0x2000 //RX_FDDRC_SLANT_0_0 +260 0x2000 //RX_FDDRC_SLANT_0_1 +261 0x2000 //RX_FDDRC_SLANT_0_2 +262 0x2000 //RX_FDDRC_SLANT_0_3 +263 0x5333 //RX_FDDRC_SLANT_1_0 +264 0x5333 //RX_FDDRC_SLANT_1_1 +265 0x5333 //RX_FDDRC_SLANT_1_2 +266 0x5333 //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +286 0x005B //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 +#VOL 5 +163 0x1000 //RX_TDDRC_ALPHA_UP_1 +164 0x1000 //RX_TDDRC_ALPHA_UP_2 +165 0x1000 //RX_TDDRC_ALPHA_UP_3 +166 0x1000 //RX_TDDRC_ALPHA_UP_4 +184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +190 0x7FFF //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +269 0x0000 //RX_TDDRC_THRD_0 +270 0x0000 //RX_TDDRC_THRD_1 +271 0x1200 //RX_TDDRC_THRD_2 +272 0x1900 //RX_TDDRC_THRD_3 +273 0x3000 //RX_TDDRC_SLANT_0 +274 0x6E00 //RX_TDDRC_SLANT_1 +275 0x1000 //RX_TDDRC_ALPHA_UP_0 +276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x199A //RX_TDDRC_HMNC_GAIN +279 0x0001 //RX_TDDRC_SMT_FLAG +280 0x0CCD //RX_TDDRC_SMT_W +281 0x0240 //RX_TDDRC_DRC_GAIN +195 0x0020 //RX_FDEQ_SUBNUM +196 0x4848 //RX_FDEQ_GAIN_0 +197 0x4848 //RX_FDEQ_GAIN_1 +198 0x4848 //RX_FDEQ_GAIN_2 +199 0x4848 //RX_FDEQ_GAIN_3 +200 0x4848 //RX_FDEQ_GAIN_4 +201 0x4848 //RX_FDEQ_GAIN_5 +202 0x4848 //RX_FDEQ_GAIN_6 +203 0x4848 //RX_FDEQ_GAIN_7 +204 0x4848 //RX_FDEQ_GAIN_8 +205 0x4848 //RX_FDEQ_GAIN_9 +206 0x4848 //RX_FDEQ_GAIN_10 +207 0x4848 //RX_FDEQ_GAIN_11 +208 0x4848 //RX_FDEQ_GAIN_12 +209 0x4848 //RX_FDEQ_GAIN_13 +210 0x4848 //RX_FDEQ_GAIN_14 +211 0x4848 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0202 //RX_FDEQ_BIN_0 +221 0x0203 //RX_FDEQ_BIN_1 +222 0x0304 //RX_FDEQ_BIN_2 +223 0x0405 //RX_FDEQ_BIN_3 +224 0x0607 //RX_FDEQ_BIN_4 +225 0x0809 //RX_FDEQ_BIN_5 +226 0x0A0B //RX_FDEQ_BIN_6 +227 0x0C0D //RX_FDEQ_BIN_7 +228 0x0E0F //RX_FDEQ_BIN_8 +229 0x1011 //RX_FDEQ_BIN_9 +230 0x1214 //RX_FDEQ_BIN_10 +231 0x1618 //RX_FDEQ_BIN_11 +232 0x1C1C //RX_FDEQ_BIN_12 +233 0x2020 //RX_FDEQ_BIN_13 +234 0x2020 //RX_FDEQ_BIN_14 +235 0x2011 //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x4000 //RX_FDEQ_RESRV_0 +245 0x0320 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0030 //RX_FDDRC_BAND_MARGIN_1 +248 0x0050 //RX_FDDRC_BAND_MARGIN_2 +249 0x0080 //RX_FDDRC_BAND_MARGIN_3 +250 0x0007 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x5000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x6400 //RX_FDDRC_THRD_3_2 +258 0x6400 //RX_FDDRC_THRD_3_3 +259 0x2000 //RX_FDDRC_SLANT_0_0 +260 0x2000 //RX_FDDRC_SLANT_0_1 +261 0x2000 //RX_FDDRC_SLANT_0_2 +262 0x2000 //RX_FDDRC_SLANT_0_3 +263 0x5333 //RX_FDDRC_SLANT_1_0 +264 0x5333 //RX_FDDRC_SLANT_1_1 +265 0x5333 //RX_FDDRC_SLANT_1_2 +266 0x5333 //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +286 0x0099 //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 +#VOL 6 +163 0x1000 //RX_TDDRC_ALPHA_UP_1 +164 0x1000 //RX_TDDRC_ALPHA_UP_2 +165 0x1000 //RX_TDDRC_ALPHA_UP_3 +166 0x1000 //RX_TDDRC_ALPHA_UP_4 +184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +190 0x7FFF //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +269 0x0000 //RX_TDDRC_THRD_0 +270 0x0000 //RX_TDDRC_THRD_1 +271 0x1200 //RX_TDDRC_THRD_2 +272 0x1900 //RX_TDDRC_THRD_3 +273 0x3000 //RX_TDDRC_SLANT_0 +274 0x6E00 //RX_TDDRC_SLANT_1 +275 0x1000 //RX_TDDRC_ALPHA_UP_0 +276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x199A //RX_TDDRC_HMNC_GAIN +279 0x0001 //RX_TDDRC_SMT_FLAG +280 0x0CCD //RX_TDDRC_SMT_W +281 0x0240 //RX_TDDRC_DRC_GAIN +195 0x0020 //RX_FDEQ_SUBNUM +196 0x4848 //RX_FDEQ_GAIN_0 +197 0x4848 //RX_FDEQ_GAIN_1 +198 0x4848 //RX_FDEQ_GAIN_2 +199 0x4848 //RX_FDEQ_GAIN_3 +200 0x4848 //RX_FDEQ_GAIN_4 +201 0x4848 //RX_FDEQ_GAIN_5 +202 0x4848 //RX_FDEQ_GAIN_6 +203 0x4848 //RX_FDEQ_GAIN_7 +204 0x4848 //RX_FDEQ_GAIN_8 +205 0x4848 //RX_FDEQ_GAIN_9 +206 0x4848 //RX_FDEQ_GAIN_10 +207 0x4848 //RX_FDEQ_GAIN_11 +208 0x4848 //RX_FDEQ_GAIN_12 +209 0x4848 //RX_FDEQ_GAIN_13 +210 0x4848 //RX_FDEQ_GAIN_14 +211 0x4848 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0202 //RX_FDEQ_BIN_0 +221 0x0203 //RX_FDEQ_BIN_1 +222 0x0304 //RX_FDEQ_BIN_2 +223 0x0405 //RX_FDEQ_BIN_3 +224 0x0607 //RX_FDEQ_BIN_4 +225 0x0809 //RX_FDEQ_BIN_5 +226 0x0A0B //RX_FDEQ_BIN_6 +227 0x0C0D //RX_FDEQ_BIN_7 +228 0x0E0F //RX_FDEQ_BIN_8 +229 0x1011 //RX_FDEQ_BIN_9 +230 0x1214 //RX_FDEQ_BIN_10 +231 0x1618 //RX_FDEQ_BIN_11 +232 0x1C1C //RX_FDEQ_BIN_12 +233 0x2020 //RX_FDEQ_BIN_13 +234 0x2020 //RX_FDEQ_BIN_14 +235 0x2011 //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x4000 //RX_FDEQ_RESRV_0 +245 0x0320 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0030 //RX_FDDRC_BAND_MARGIN_1 +248 0x0050 //RX_FDDRC_BAND_MARGIN_2 +249 0x0080 //RX_FDDRC_BAND_MARGIN_3 +250 0x0007 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x5000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x6400 //RX_FDDRC_THRD_3_2 +258 0x6400 //RX_FDDRC_THRD_3_3 +259 0x2000 //RX_FDDRC_SLANT_0_0 +260 0x2000 //RX_FDDRC_SLANT_0_1 +261 0x2000 //RX_FDDRC_SLANT_0_2 +262 0x2000 //RX_FDDRC_SLANT_0_3 +263 0x5333 //RX_FDDRC_SLANT_1_0 +264 0x5333 //RX_FDDRC_SLANT_1_1 +265 0x5333 //RX_FDDRC_SLANT_1_2 +266 0x5333 //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +286 0x0100 //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 #CASE_NAME HEADSET-TTY_HCO-VOICE_GENERIC-NB -#PARAM_MODE FULL -#PARAM_TYPE TX+RX -#TOTAL_CUSTOM_STEP 7 +#PARAM_MODE Full +#PARAM_TYPE TX+2RX +#TOTAL_CUSTOM_STEP 7+7 #TX 0 0x0001 //TX_OPERATION_MODE_0 1 0x0000 //TX_OPERATION_MODE_1 @@ -35330,7 +53650,7 @@ 239 0x0000 //TX_DT_RESRV_7 240 0x0000 //TX_DT_RESRV_8 241 0x0000 //TX_DT_RESRV_9 -242 0xF200 //TX_THR_SN_EST_0 +242 0xFA00 //TX_THR_SN_EST_0 243 0xF400 //TX_THR_SN_EST_1 244 0xF800 //TX_THR_SN_EST_2 245 0xF600 //TX_THR_SN_EST_3 @@ -35339,12 +53659,12 @@ 248 0xF800 //TX_THR_SN_EST_6 249 0xF800 //TX_THR_SN_EST_7 250 0x0100 //TX_DELTA_THR_SN_EST_0 -251 0x0000 //TX_DELTA_THR_SN_EST_1 +251 0x0100 //TX_DELTA_THR_SN_EST_1 252 0x0100 //TX_DELTA_THR_SN_EST_2 -253 0x0100 //TX_DELTA_THR_SN_EST_3 +253 0x0200 //TX_DELTA_THR_SN_EST_3 254 0x0200 //TX_DELTA_THR_SN_EST_4 255 0x0200 //TX_DELTA_THR_SN_EST_5 -256 0x0200 //TX_DELTA_THR_SN_EST_6 +256 0x0000 //TX_DELTA_THR_SN_EST_6 257 0x0200 //TX_DELTA_THR_SN_EST_7 258 0x4000 //TX_LAMBDA_NN_EST_0 259 0x4000 //TX_LAMBDA_NN_EST_1 @@ -35370,12 +53690,12 @@ 279 0x0000 //TX_B_POST_FLT_0 280 0x0000 //TX_B_POST_FLT_1 281 0x001A //TX_NS_LVL_CTRL_0 -282 0x001A //TX_NS_LVL_CTRL_1 +282 0x0014 //TX_NS_LVL_CTRL_1 283 0x0014 //TX_NS_LVL_CTRL_2 -284 0x0014 //TX_NS_LVL_CTRL_3 +284 0x000C //TX_NS_LVL_CTRL_3 285 0x000C //TX_NS_LVL_CTRL_4 286 0x000C //TX_NS_LVL_CTRL_5 -287 0x000C //TX_NS_LVL_CTRL_6 +287 0x001A //TX_NS_LVL_CTRL_6 288 0x000C //TX_NS_LVL_CTRL_7 289 0x000E //TX_MIN_GAIN_S_0 290 0x0014 //TX_MIN_GAIN_S_1 @@ -35391,10 +53711,10 @@ 300 0x7FFF //TX_SNRI_SUP_0 301 0x7FFF //TX_SNRI_SUP_1 302 0x7FFF //TX_SNRI_SUP_2 -303 0x7FFF //TX_SNRI_SUP_3 +303 0x4000 //TX_SNRI_SUP_3 304 0x4000 //TX_SNRI_SUP_4 305 0x4000 //TX_SNRI_SUP_5 -306 0x4000 //TX_SNRI_SUP_6 +306 0x7FFF //TX_SNRI_SUP_6 307 0x4000 //TX_SNRI_SUP_7 308 0x1200 //TX_THR_LFNS 309 0x0147 //TX_G_LFNS @@ -35403,12 +53723,12 @@ 312 0x7FFF //TX_A_POST_FILT_0 313 0x7FFF //TX_A_POST_FILT_1 314 0x4000 //TX_A_POST_FILT_S_0 -315 0x199A //TX_A_POST_FILT_S_1 +315 0x1000 //TX_A_POST_FILT_S_1 316 0x1000 //TX_A_POST_FILT_S_2 -317 0x1000 //TX_A_POST_FILT_S_3 +317 0x6666 //TX_A_POST_FILT_S_3 318 0x6666 //TX_A_POST_FILT_S_4 319 0x6666 //TX_A_POST_FILT_S_5 -320 0x6666 //TX_A_POST_FILT_S_6 +320 0x199A //TX_A_POST_FILT_S_6 321 0x6666 //TX_A_POST_FILT_S_7 322 0x2000 //TX_B_POST_FILT_0 323 0x2000 //TX_B_POST_FILT_1 @@ -35455,7 +53775,7 @@ 364 0x0000 //TX_K_APT 365 0x0001 //TX_NOISEDET 366 0x05A0 //TX_NDETCT -367 0x000A //TX_NOISE_TH_0 +367 0x003B //TX_NOISE_TH_0 368 0x1388 //TX_NOISE_TH_0_2 369 0x3A98 //TX_NOISE_TH_0_3 370 0x0C80 //TX_NOISE_TH_1 @@ -35467,11 +53787,11 @@ 376 0x7FFF //TX_NOISE_TH_5_3 377 0x7FFF //TX_NOISE_TH_5_4 378 0x00C8 //TX_NOISE_TH_6 -379 0x000A //TX_MINENOISE_TH -380 0x0000 //TX_MINENOISE_MIC0_TH_MTS -381 0x0000 //TX_MINENOISE_MIC0_TH_EXP -382 0x0000 //TX_MINENOISE_MIC0_S_TH_MTS -383 0x0000 //TX_MINENOISE_MIC0_S_TH_EXP +379 0x00C8 //TX_MINENOISE_TH +380 0xD508 //TX_MORENS_TFMASK_TH +381 0x0001 //TX_DRC_QUIET_FLOOR +382 0x3A98 //TX_RATIODTL_CUT_TH +383 0x0DAC //TX_DT_CUT_K1 384 0x6400 //TX_OUT_ENER_S_TH_CLEAN 385 0x6400 //TX_OUT_ENER_S_TH_LESSCLEAN 386 0x6400 //TX_OUT_ENER_S_TH_NOISY @@ -35479,22 +53799,22 @@ 388 0x7D00 //TX_OUT_ENER_TH_SPEECH 389 0x0000 //TX_SN_NPB_GAIN 390 0x0000 //TX_NN_NPB_GAIN -391 0x0000 //TX_CSX_ALPHA_0 -392 0x0000 //TX_CSX_ALPHA_1 -393 0x0000 //TX_CSX_ALPHA_2 -394 0x0000 //TX_CSX_ALPHA_3 -395 0x0000 //TX_MU_ARSP_EST -396 0x0000 //TX_P_OUTBEAM_MIN_TH +391 0x7FFF //TX_POST_MASK_SUP_HSNE +392 0x1388 //TX_TAIL_DET_TH +393 0x4000 //TX_B_LESSCUT_RTO_WTA +394 0x0000 //TX_MEL_G_R +395 0x0080 //TX_SUPHIGH_TH +396 0x0000 //TX_MASK_G_R 397 0x0000 //TX_EXTRA_NS_L -398 0x0000 //TX_EXTRA_NS_A -399 0x0000 //TX_VR_NOISE_FLOOR_TH +398 0x1800 //TX_C_POST_FLT_MASK +399 0x7FFF //TX_A_POST_FLT_WNS 400 0x0000 //TX_MIN_G_LOW300HZ 401 0x0010 //TX_MAXLEVEL_CNG 402 0x0000 //TX_STN_NOISE_TH 403 0x0000 //TX_POST_MASK_SUP 404 0x0000 //TX_POST_MASK_ADJUST 405 0x0014 //TX_NS_ENOISE_MIC0_TH -406 0x0014 //TX_MINENOISE_MIC0_TH +406 0x0032 //TX_MINENOISE_MIC0_TH 407 0x0226 //TX_MINENOISE_MIC0_S_TH 408 0x2879 //TX_MIN_G_CTRL_SSNS 409 0x0400 //TX_METAL_RTO_THR @@ -35602,16 +53922,16 @@ 511 0x6666 //TX_MIC_TO_BFGAIN 512 0x6666 //TX_MICTOBFGAIN0 513 0x0014 //TX_FASTMUE_TH -514 0x0000 //TX_DERVB_LEN_0 -515 0x0000 //TX_DERVB_LEN_1 -516 0x0000 //TX_RHO_DERVB -517 0x0000 //TX_MIC_INDX_DERVB -518 0x0000 //TX_MU_DERVB -519 0x0000 //TX_DR_RESRV_0 -520 0x0000 //TX_DR_RESRV_1 -521 0x0000 //TX_DR_RESRV_2 -522 0x0000 //TX_DR_RESRV_3 -523 0x0000 //TX_DR_RESRV_4 +514 0xC000 //TX_DEREVERB_LF_MU +515 0xC000 //TX_DEREVERB_HF_MU +516 0xCCCC //TX_DEREVERB_DELAY +517 0xD999 //TX_DEREVERB_COEF_LEN +518 0x1F40 //TX_DEREVERB_DNR +519 0x0000 //TX_DEREVERB_ALPHA +520 0x0000 //TX_DEREVERB_BETA +521 0x0000 //TX_GSC_RTOL_TH +522 0x7000 //TX_GSC_RTOH_TH +523 0x0064 //TX_WIDE2_MEANHTH 524 0x0000 //TX_DR_RESRV_5 525 0x0000 //TX_DR_RESRV_6 526 0x0000 //TX_DR_RESRV_7 @@ -35977,16 +54297,81 @@ 886 0x0000 //TX_FASTNS_TFMASKBIN_TH2 887 0x0000 //TX_FASTNS_TFMASKBIN_TH3 888 0x00C8 //TX_FASTNS_ARSPC_TH -889 0xD99A //TX_FASTNS_MASK5_TH +889 0xC000 //TX_FASTNS_MASK5_TH 890 0x051F //TX_POSTSSA_MIN_G_VR_MASK -891 0x7FFF //TX_A_LESSCUT_RTO_MASK +891 0x4000 //TX_A_LESSCUT_RTO_MASK 892 0x1770 //TX_FASTNS_NOISETH 893 0xC000 //TX_FASTNS_SSA_THLFL 894 0xC000 //TX_FASTNS_SSA_THHFL 895 0xCCCC //TX_FASTNS_SSA_THLFH 896 0xD999 //TX_FASTNS_SSA_THHFH +897 0x2339 //TX_SENDFUNC_REG_MICMUTE +898 0x0021 //TX_SENDFUNC_REG_MICMUTE1 +899 0x02BC //TX_MICMUTE_RATIO_THR +900 0x0140 //TX_MICMUTE_AMP_THR +901 0x0004 //TX_MICMUTE_HPF_IND +902 0x00C0 //TX_MICMUTE_LOG_EYR_TH +903 0x0008 //TX_MICMUTE_CVG_TIME +904 0x0008 //TX_MICMUTE_RELEASE_TIME +905 0x01FE //TX_MIC_VOLUME_MIC0MUTE +906 0x0020 //TX_MICMUTE_EPD_OFFSET_0 +907 0x001E //TX_MICMUTE_FRQ_AEC_L +908 0x7999 //TX_MICMUTE_EAD_THR +909 0x7FFF //TX_MICMUTE_LAMBDA_CB_NLE +910 0x7FFF //TX_MICMUTE_LAMBDA_RE_EST +911 0x4000 //TX_DTD_THR1_MICMUTE_0 +912 0x7000 //TX_DTD_THR1_MICMUTE_1 +913 0x7FFF //TX_DTD_THR1_MICMUTE_2 +914 0x7FFF //TX_DTD_THR1_MICMUTE_3 +915 0x6CCC //TX_DTD_THR2_MICMUTE_0 +916 0x0400 //TX_MICMUTE_MIN_EQ_RE_EST_0 +917 0x0400 //TX_MICMUTE_MIN_EQ_RE_EST_1 +918 0x1000 //TX_MICMUTE_MIN_EQ_RE_EST_2 +919 0x7FFF //TX_MICMUTE_MIN_EQ_RE_EST_3 +920 0x7FFF //TX_MICMUTE_MIN_EQ_RE_EST_4 +921 0x4000 //TX_MICMUTE_C_POST_FLT +922 0x03E8 //TX_MICMUTE_DT_CUT_K +923 0x0001 //TX_MICMUTE_DT_CUT_THR +924 0x03E8 //TX_MICMUTE_DT_CUT_K2 +925 0x0001 //TX_MICMUTE_DT_CUT_THR2 +926 0x0064 //TX_MICMUTE_DT2_HOLD_N +927 0x1000 //TX_MICMUTE_RATIODTH_THCUT +928 0x1000 //TX_MICMUTE_B_POST_FLT_ECHOL +929 0x7FFF //TX_MICMUTE_B_POST_FLT_ECHOH +930 0x0400 //TX_MICMUTE_C_POST_FLT_MASK +931 0x7999 //TX_MICMUTE_RATIODTL_CUT_TH +932 0x0258 //TX_MICMUTE_DT_CUT_K1 +933 0x0800 //TX_MICMUTE_N2_SN_EST +934 0xFC00 //TX_MICMUTE_THR_SN_EST_0 +935 0x001C //TX_MICMUTE_MIN_G_CTRL_0 +936 0x6000 //TX_MICMUTE_A_POST_FILT_S_0 +937 0x7000 //TX_MICMUTE_B_POST_FILT_0 +938 0x2710 //TX_MIC1RUB_AMP_THR +939 0x0010 //TX_MIC1MUTE_RATIO_THR +940 0x0450 //TX_MIC1MUTE_AMP_THR +941 0x0008 //TX_MIC1MUTE_CVG_TIME +942 0x0008 //TX_MIC1MUTE_RELEASE_TIME +943 0x0000 //TX_AMS_RESRV_01 +944 0x0000 //TX_AMS_RESRV_02 +945 0x0000 //TX_AMS_RESRV_03 +946 0x0000 //TX_AMS_RESRV_04 +947 0x0000 //TX_AMS_RESRV_05 +948 0x0000 //TX_AMS_RESRV_06 +949 0x0000 //TX_AMS_RESRV_07 +950 0x0000 //TX_AMS_RESRV_08 +951 0x0000 //TX_AMS_RESRV_09 +952 0x0000 //TX_AMS_RESRV_10 +953 0x0000 //TX_AMS_RESRV_11 +954 0x0000 //TX_AMS_RESRV_12 +955 0x0000 //TX_AMS_RESRV_13 +956 0x0000 //TX_AMS_RESRV_14 +957 0x0000 //TX_AMS_RESRV_15 +958 0x0000 //TX_AMS_RESRV_16 +959 0x0000 //TX_AMS_RESRV_17 +960 0x0000 //TX_AMS_RESRV_18 +961 0x0000 //TX_AMS_RESRV_19 #RX -0 0x027C //RX_RECVFUNC_MODE_0 +0 0x243C //RX_RECVFUNC_MODE_0 1 0x0000 //RX_RECVFUNC_MODE_1 2 0x0000 //RX_SAMPLINGFREQ_SIG 3 0x0000 //RX_SAMPLINGFREQ_PROC @@ -35996,8 +54381,8 @@ 7 0x1000 //RX_TDDRC_ALPHA_UP_2 8 0x1000 //RX_TDDRC_ALPHA_UP_3 9 0x1000 //RX_TDDRC_ALPHA_UP_4 -10 0x0800 //RX_PGA -11 0x7652 //RX_A_HP +10 0x0403 //RX_PGA +11 0x7646 //RX_A_HP 12 0x4000 //RX_B_PE 13 0x7800 //RX_THR_PITCH_DET_0 14 0x7000 //RX_THR_PITCH_DET_1 @@ -36026,12 +54411,12 @@ 37 0x4000 //RX_LMT_ALPHA 38 0x0014 //RX_FDEQ_SUBNUM 39 0x8080 //RX_FDEQ_GAIN_0 -40 0x8058 //RX_FDEQ_GAIN_1 -41 0x5454 //RX_FDEQ_GAIN_2 -42 0x545C //RX_FDEQ_GAIN_3 -43 0x6448 //RX_FDEQ_GAIN_4 +40 0x8054 //RX_FDEQ_GAIN_1 +41 0x5050 //RX_FDEQ_GAIN_2 +42 0x5058 //RX_FDEQ_GAIN_3 +43 0x5C70 //RX_FDEQ_GAIN_4 44 0x4848 //RX_FDEQ_GAIN_5 -45 0x5848 //RX_FDEQ_GAIN_6 +45 0x484C //RX_FDEQ_GAIN_6 46 0x4848 //RX_FDEQ_GAIN_7 47 0x485A //RX_FDEQ_GAIN_8 48 0x5A58 //RX_FDEQ_GAIN_9 @@ -36053,8 +54438,8 @@ 64 0x0203 //RX_FDEQ_BIN_1 65 0x0303 //RX_FDEQ_BIN_2 66 0x0304 //RX_FDEQ_BIN_3 -67 0x0405 //RX_FDEQ_BIN_4 -68 0x0506 //RX_FDEQ_BIN_5 +67 0x0604 //RX_FDEQ_BIN_4 +68 0x0406 //RX_FDEQ_BIN_5 69 0x0708 //RX_FDEQ_BIN_6 70 0x090A //RX_FDEQ_BIN_7 71 0x0B0C //RX_FDEQ_BIN_8 @@ -36110,12 +54495,12 @@ 121 0x199A //RX_TDDRC_HMNC_GAIN 122 0x0001 //RX_TDDRC_SMT_FLAG 123 0x0CCD //RX_TDDRC_SMT_W -124 0x0700 //RX_TDDRC_DRC_GAIN +124 0x0780 //RX_TDDRC_DRC_GAIN 125 0x7C00 //RX_LAMBDA_PKA_FP -126 0x2000 //RX_TPKA_FP -127 0x2000 //RX_MIN_G_FP -128 0x0080 //RX_MAX_G_FP -129 0x0016 //RX_SPK_VOL +126 0x1194 //RX_TPKA_FP +127 0x0400 //RX_MIN_G_FP +128 0x0800 //RX_MAX_G_FP +129 0x0015 //RX_SPK_VOL 130 0x0000 //RX_VOL_RESRV_0 131 0x0000 //RX_MAXLEVEL_CNG 132 0x3000 //RX_BWE_UV_TH @@ -36156,8 +54541,8 @@ 34 0x0800 //RX_TDDRC_LIMITER_GAIN 112 0x0002 //RX_TDDRC_THRD_0 113 0x0004 //RX_TDDRC_THRD_1 -114 0x1A00 //RX_TDDRC_THRD_2 -115 0x1A00 //RX_TDDRC_THRD_3 +114 0x1800 //RX_TDDRC_THRD_2 +115 0x1800 //RX_TDDRC_THRD_3 116 0x7FFF //RX_TDDRC_SLANT_0 117 0x7FFF //RX_TDDRC_SLANT_1 118 0x1000 //RX_TDDRC_ALPHA_UP_0 @@ -36166,18 +54551,18 @@ 121 0x199A //RX_TDDRC_HMNC_GAIN 122 0x0001 //RX_TDDRC_SMT_FLAG 123 0x0CCD //RX_TDDRC_SMT_W -124 0x0700 //RX_TDDRC_DRC_GAIN +124 0x0780 //RX_TDDRC_DRC_GAIN 38 0x0014 //RX_FDEQ_SUBNUM 39 0x8080 //RX_FDEQ_GAIN_0 -40 0x8058 //RX_FDEQ_GAIN_1 -41 0x5454 //RX_FDEQ_GAIN_2 -42 0x545C //RX_FDEQ_GAIN_3 -43 0x6448 //RX_FDEQ_GAIN_4 -44 0x4848 //RX_FDEQ_GAIN_5 -45 0x5848 //RX_FDEQ_GAIN_6 -46 0x4848 //RX_FDEQ_GAIN_7 -47 0x485A //RX_FDEQ_GAIN_8 -48 0x5A58 //RX_FDEQ_GAIN_9 +40 0x8050 //RX_FDEQ_GAIN_1 +41 0x4840 //RX_FDEQ_GAIN_2 +42 0x4040 //RX_FDEQ_GAIN_3 +43 0x4C68 //RX_FDEQ_GAIN_4 +44 0x403C //RX_FDEQ_GAIN_5 +45 0x3C38 //RX_FDEQ_GAIN_6 +46 0x3430 //RX_FDEQ_GAIN_7 +47 0x303C //RX_FDEQ_GAIN_8 +48 0x4C50 //RX_FDEQ_GAIN_9 49 0x4848 //RX_FDEQ_GAIN_10 50 0x4848 //RX_FDEQ_GAIN_11 51 0x4848 //RX_FDEQ_GAIN_12 @@ -36196,8 +54581,8 @@ 64 0x0203 //RX_FDEQ_BIN_1 65 0x0303 //RX_FDEQ_BIN_2 66 0x0304 //RX_FDEQ_BIN_3 -67 0x0405 //RX_FDEQ_BIN_4 -68 0x0506 //RX_FDEQ_BIN_5 +67 0x0703 //RX_FDEQ_BIN_4 +68 0x0406 //RX_FDEQ_BIN_5 69 0x0708 //RX_FDEQ_BIN_6 70 0x090A //RX_FDEQ_BIN_7 71 0x0B0C //RX_FDEQ_BIN_8 @@ -36240,7 +54625,7 @@ 108 0x7FFF //RX_FDDRC_SLANT_1_2 109 0x7FFF //RX_FDDRC_SLANT_1_3 110 0x0000 //RX_FDDRC_RESRV_0 -129 0x0016 //RX_SPK_VOL +129 0x0012 //RX_SPK_VOL 130 0x0000 //RX_VOL_RESRV_0 #VOL 1 6 0x1000 //RX_TDDRC_ALPHA_UP_1 @@ -36255,8 +54640,8 @@ 34 0x0800 //RX_TDDRC_LIMITER_GAIN 112 0x0002 //RX_TDDRC_THRD_0 113 0x0004 //RX_TDDRC_THRD_1 -114 0x1A00 //RX_TDDRC_THRD_2 -115 0x1A00 //RX_TDDRC_THRD_3 +114 0x1800 //RX_TDDRC_THRD_2 +115 0x1800 //RX_TDDRC_THRD_3 116 0x7FFF //RX_TDDRC_SLANT_0 117 0x7FFF //RX_TDDRC_SLANT_1 118 0x1000 //RX_TDDRC_ALPHA_UP_0 @@ -36265,18 +54650,18 @@ 121 0x199A //RX_TDDRC_HMNC_GAIN 122 0x0001 //RX_TDDRC_SMT_FLAG 123 0x0CCD //RX_TDDRC_SMT_W -124 0x0700 //RX_TDDRC_DRC_GAIN +124 0x0780 //RX_TDDRC_DRC_GAIN 38 0x0014 //RX_FDEQ_SUBNUM 39 0x8080 //RX_FDEQ_GAIN_0 -40 0x8058 //RX_FDEQ_GAIN_1 -41 0x5454 //RX_FDEQ_GAIN_2 -42 0x545C //RX_FDEQ_GAIN_3 -43 0x6448 //RX_FDEQ_GAIN_4 -44 0x4848 //RX_FDEQ_GAIN_5 -45 0x5848 //RX_FDEQ_GAIN_6 -46 0x4848 //RX_FDEQ_GAIN_7 -47 0x485A //RX_FDEQ_GAIN_8 -48 0x5A58 //RX_FDEQ_GAIN_9 +40 0x8050 //RX_FDEQ_GAIN_1 +41 0x4840 //RX_FDEQ_GAIN_2 +42 0x4040 //RX_FDEQ_GAIN_3 +43 0x4C68 //RX_FDEQ_GAIN_4 +44 0x403C //RX_FDEQ_GAIN_5 +45 0x3C38 //RX_FDEQ_GAIN_6 +46 0x3430 //RX_FDEQ_GAIN_7 +47 0x303C //RX_FDEQ_GAIN_8 +48 0x4C50 //RX_FDEQ_GAIN_9 49 0x4848 //RX_FDEQ_GAIN_10 50 0x4848 //RX_FDEQ_GAIN_11 51 0x4848 //RX_FDEQ_GAIN_12 @@ -36295,8 +54680,8 @@ 64 0x0203 //RX_FDEQ_BIN_1 65 0x0303 //RX_FDEQ_BIN_2 66 0x0304 //RX_FDEQ_BIN_3 -67 0x0405 //RX_FDEQ_BIN_4 -68 0x0506 //RX_FDEQ_BIN_5 +67 0x0703 //RX_FDEQ_BIN_4 +68 0x0406 //RX_FDEQ_BIN_5 69 0x0708 //RX_FDEQ_BIN_6 70 0x090A //RX_FDEQ_BIN_7 71 0x0B0C //RX_FDEQ_BIN_8 @@ -36339,7 +54724,7 @@ 108 0x7FFF //RX_FDDRC_SLANT_1_2 109 0x7FFF //RX_FDDRC_SLANT_1_3 110 0x0000 //RX_FDDRC_RESRV_0 -129 0x0020 //RX_SPK_VOL +129 0x001B //RX_SPK_VOL 130 0x0000 //RX_VOL_RESRV_0 #VOL 2 6 0x1000 //RX_TDDRC_ALPHA_UP_1 @@ -36354,8 +54739,8 @@ 34 0x0800 //RX_TDDRC_LIMITER_GAIN 112 0x0002 //RX_TDDRC_THRD_0 113 0x0004 //RX_TDDRC_THRD_1 -114 0x1A00 //RX_TDDRC_THRD_2 -115 0x1A00 //RX_TDDRC_THRD_3 +114 0x1800 //RX_TDDRC_THRD_2 +115 0x1800 //RX_TDDRC_THRD_3 116 0x7FFF //RX_TDDRC_SLANT_0 117 0x7FFF //RX_TDDRC_SLANT_1 118 0x1000 //RX_TDDRC_ALPHA_UP_0 @@ -36364,18 +54749,18 @@ 121 0x199A //RX_TDDRC_HMNC_GAIN 122 0x0001 //RX_TDDRC_SMT_FLAG 123 0x0CCD //RX_TDDRC_SMT_W -124 0x0700 //RX_TDDRC_DRC_GAIN +124 0x0780 //RX_TDDRC_DRC_GAIN 38 0x0014 //RX_FDEQ_SUBNUM 39 0x8080 //RX_FDEQ_GAIN_0 -40 0x8058 //RX_FDEQ_GAIN_1 -41 0x5454 //RX_FDEQ_GAIN_2 -42 0x545C //RX_FDEQ_GAIN_3 -43 0x6448 //RX_FDEQ_GAIN_4 -44 0x4848 //RX_FDEQ_GAIN_5 -45 0x5848 //RX_FDEQ_GAIN_6 -46 0x4848 //RX_FDEQ_GAIN_7 -47 0x485A //RX_FDEQ_GAIN_8 -48 0x5A58 //RX_FDEQ_GAIN_9 +40 0x8050 //RX_FDEQ_GAIN_1 +41 0x4840 //RX_FDEQ_GAIN_2 +42 0x4040 //RX_FDEQ_GAIN_3 +43 0x4C68 //RX_FDEQ_GAIN_4 +44 0x403C //RX_FDEQ_GAIN_5 +45 0x3C38 //RX_FDEQ_GAIN_6 +46 0x3430 //RX_FDEQ_GAIN_7 +47 0x303C //RX_FDEQ_GAIN_8 +48 0x4C50 //RX_FDEQ_GAIN_9 49 0x4848 //RX_FDEQ_GAIN_10 50 0x4848 //RX_FDEQ_GAIN_11 51 0x4848 //RX_FDEQ_GAIN_12 @@ -36394,8 +54779,8 @@ 64 0x0203 //RX_FDEQ_BIN_1 65 0x0303 //RX_FDEQ_BIN_2 66 0x0304 //RX_FDEQ_BIN_3 -67 0x0405 //RX_FDEQ_BIN_4 -68 0x0506 //RX_FDEQ_BIN_5 +67 0x0703 //RX_FDEQ_BIN_4 +68 0x0406 //RX_FDEQ_BIN_5 69 0x0708 //RX_FDEQ_BIN_6 70 0x090A //RX_FDEQ_BIN_7 71 0x0B0C //RX_FDEQ_BIN_8 @@ -36438,7 +54823,7 @@ 108 0x7FFF //RX_FDDRC_SLANT_1_2 109 0x7FFF //RX_FDDRC_SLANT_1_3 110 0x0000 //RX_FDDRC_RESRV_0 -129 0x002E //RX_SPK_VOL +129 0x0026 //RX_SPK_VOL 130 0x0000 //RX_VOL_RESRV_0 #VOL 3 6 0x1000 //RX_TDDRC_ALPHA_UP_1 @@ -36453,8 +54838,8 @@ 34 0x0800 //RX_TDDRC_LIMITER_GAIN 112 0x0002 //RX_TDDRC_THRD_0 113 0x0004 //RX_TDDRC_THRD_1 -114 0x1A00 //RX_TDDRC_THRD_2 -115 0x1A00 //RX_TDDRC_THRD_3 +114 0x1800 //RX_TDDRC_THRD_2 +115 0x1800 //RX_TDDRC_THRD_3 116 0x7FFF //RX_TDDRC_SLANT_0 117 0x7FFF //RX_TDDRC_SLANT_1 118 0x1000 //RX_TDDRC_ALPHA_UP_0 @@ -36463,18 +54848,18 @@ 121 0x199A //RX_TDDRC_HMNC_GAIN 122 0x0001 //RX_TDDRC_SMT_FLAG 123 0x0CCD //RX_TDDRC_SMT_W -124 0x0700 //RX_TDDRC_DRC_GAIN +124 0x0780 //RX_TDDRC_DRC_GAIN 38 0x0014 //RX_FDEQ_SUBNUM 39 0x8080 //RX_FDEQ_GAIN_0 -40 0x8058 //RX_FDEQ_GAIN_1 -41 0x5454 //RX_FDEQ_GAIN_2 -42 0x545C //RX_FDEQ_GAIN_3 -43 0x6448 //RX_FDEQ_GAIN_4 -44 0x4848 //RX_FDEQ_GAIN_5 -45 0x5848 //RX_FDEQ_GAIN_6 -46 0x4848 //RX_FDEQ_GAIN_7 -47 0x485A //RX_FDEQ_GAIN_8 -48 0x5A58 //RX_FDEQ_GAIN_9 +40 0x8050 //RX_FDEQ_GAIN_1 +41 0x4840 //RX_FDEQ_GAIN_2 +42 0x4040 //RX_FDEQ_GAIN_3 +43 0x4C68 //RX_FDEQ_GAIN_4 +44 0x403C //RX_FDEQ_GAIN_5 +45 0x3C38 //RX_FDEQ_GAIN_6 +46 0x3430 //RX_FDEQ_GAIN_7 +47 0x303C //RX_FDEQ_GAIN_8 +48 0x4C50 //RX_FDEQ_GAIN_9 49 0x4848 //RX_FDEQ_GAIN_10 50 0x4848 //RX_FDEQ_GAIN_11 51 0x4848 //RX_FDEQ_GAIN_12 @@ -36493,8 +54878,8 @@ 64 0x0203 //RX_FDEQ_BIN_1 65 0x0303 //RX_FDEQ_BIN_2 66 0x0304 //RX_FDEQ_BIN_3 -67 0x0405 //RX_FDEQ_BIN_4 -68 0x0506 //RX_FDEQ_BIN_5 +67 0x0703 //RX_FDEQ_BIN_4 +68 0x0406 //RX_FDEQ_BIN_5 69 0x0708 //RX_FDEQ_BIN_6 70 0x090A //RX_FDEQ_BIN_7 71 0x0B0C //RX_FDEQ_BIN_8 @@ -36537,7 +54922,7 @@ 108 0x7FFF //RX_FDDRC_SLANT_1_2 109 0x7FFF //RX_FDDRC_SLANT_1_3 110 0x0000 //RX_FDDRC_RESRV_0 -129 0x0041 //RX_SPK_VOL +129 0x0037 //RX_SPK_VOL 130 0x0000 //RX_VOL_RESRV_0 #VOL 4 6 0x1000 //RX_TDDRC_ALPHA_UP_1 @@ -36552,8 +54937,8 @@ 34 0x0800 //RX_TDDRC_LIMITER_GAIN 112 0x0002 //RX_TDDRC_THRD_0 113 0x0004 //RX_TDDRC_THRD_1 -114 0x1A00 //RX_TDDRC_THRD_2 -115 0x1A00 //RX_TDDRC_THRD_3 +114 0x1800 //RX_TDDRC_THRD_2 +115 0x1800 //RX_TDDRC_THRD_3 116 0x7FFF //RX_TDDRC_SLANT_0 117 0x7FFF //RX_TDDRC_SLANT_1 118 0x1000 //RX_TDDRC_ALPHA_UP_0 @@ -36562,18 +54947,18 @@ 121 0x199A //RX_TDDRC_HMNC_GAIN 122 0x0001 //RX_TDDRC_SMT_FLAG 123 0x0CCD //RX_TDDRC_SMT_W -124 0x0700 //RX_TDDRC_DRC_GAIN +124 0x0D56 //RX_TDDRC_DRC_GAIN 38 0x0014 //RX_FDEQ_SUBNUM 39 0x8080 //RX_FDEQ_GAIN_0 -40 0x8058 //RX_FDEQ_GAIN_1 -41 0x5454 //RX_FDEQ_GAIN_2 -42 0x545C //RX_FDEQ_GAIN_3 -43 0x6448 //RX_FDEQ_GAIN_4 -44 0x4848 //RX_FDEQ_GAIN_5 -45 0x5848 //RX_FDEQ_GAIN_6 -46 0x4848 //RX_FDEQ_GAIN_7 -47 0x485A //RX_FDEQ_GAIN_8 -48 0x5A58 //RX_FDEQ_GAIN_9 +40 0x8050 //RX_FDEQ_GAIN_1 +41 0x4840 //RX_FDEQ_GAIN_2 +42 0x4040 //RX_FDEQ_GAIN_3 +43 0x4470 //RX_FDEQ_GAIN_4 +44 0x383C //RX_FDEQ_GAIN_5 +45 0x3C3C //RX_FDEQ_GAIN_6 +46 0x3434 //RX_FDEQ_GAIN_7 +47 0x344C //RX_FDEQ_GAIN_8 +48 0x585C //RX_FDEQ_GAIN_9 49 0x4848 //RX_FDEQ_GAIN_10 50 0x4848 //RX_FDEQ_GAIN_11 51 0x4848 //RX_FDEQ_GAIN_12 @@ -36592,8 +54977,8 @@ 64 0x0203 //RX_FDEQ_BIN_1 65 0x0303 //RX_FDEQ_BIN_2 66 0x0304 //RX_FDEQ_BIN_3 -67 0x0405 //RX_FDEQ_BIN_4 -68 0x0506 //RX_FDEQ_BIN_5 +67 0x0703 //RX_FDEQ_BIN_4 +68 0x0406 //RX_FDEQ_BIN_5 69 0x0708 //RX_FDEQ_BIN_6 70 0x090A //RX_FDEQ_BIN_7 71 0x0B0C //RX_FDEQ_BIN_8 @@ -36636,7 +55021,7 @@ 108 0x7FFF //RX_FDDRC_SLANT_1_2 109 0x7FFF //RX_FDDRC_SLANT_1_3 110 0x0000 //RX_FDDRC_RESRV_0 -129 0x005C //RX_SPK_VOL +129 0x002C //RX_SPK_VOL 130 0x0000 //RX_VOL_RESRV_0 #VOL 5 6 0x1000 //RX_TDDRC_ALPHA_UP_1 @@ -36651,8 +55036,8 @@ 34 0x0800 //RX_TDDRC_LIMITER_GAIN 112 0x0002 //RX_TDDRC_THRD_0 113 0x0004 //RX_TDDRC_THRD_1 -114 0x1A00 //RX_TDDRC_THRD_2 -115 0x1A00 //RX_TDDRC_THRD_3 +114 0x1800 //RX_TDDRC_THRD_2 +115 0x1800 //RX_TDDRC_THRD_3 116 0x7FFF //RX_TDDRC_SLANT_0 117 0x7FFF //RX_TDDRC_SLANT_1 118 0x1000 //RX_TDDRC_ALPHA_UP_0 @@ -36661,18 +55046,18 @@ 121 0x199A //RX_TDDRC_HMNC_GAIN 122 0x0001 //RX_TDDRC_SMT_FLAG 123 0x0CCD //RX_TDDRC_SMT_W -124 0x0700 //RX_TDDRC_DRC_GAIN +124 0x0D56 //RX_TDDRC_DRC_GAIN 38 0x0014 //RX_FDEQ_SUBNUM 39 0x8080 //RX_FDEQ_GAIN_0 -40 0x8058 //RX_FDEQ_GAIN_1 -41 0x5454 //RX_FDEQ_GAIN_2 -42 0x545C //RX_FDEQ_GAIN_3 -43 0x6448 //RX_FDEQ_GAIN_4 -44 0x4848 //RX_FDEQ_GAIN_5 -45 0x5848 //RX_FDEQ_GAIN_6 -46 0x4848 //RX_FDEQ_GAIN_7 -47 0x485A //RX_FDEQ_GAIN_8 -48 0x5A58 //RX_FDEQ_GAIN_9 +40 0x8050 //RX_FDEQ_GAIN_1 +41 0x4840 //RX_FDEQ_GAIN_2 +42 0x4040 //RX_FDEQ_GAIN_3 +43 0x4470 //RX_FDEQ_GAIN_4 +44 0x383C //RX_FDEQ_GAIN_5 +45 0x3C3C //RX_FDEQ_GAIN_6 +46 0x3434 //RX_FDEQ_GAIN_7 +47 0x344C //RX_FDEQ_GAIN_8 +48 0x585C //RX_FDEQ_GAIN_9 49 0x4848 //RX_FDEQ_GAIN_10 50 0x4848 //RX_FDEQ_GAIN_11 51 0x4848 //RX_FDEQ_GAIN_12 @@ -36691,8 +55076,8 @@ 64 0x0203 //RX_FDEQ_BIN_1 65 0x0303 //RX_FDEQ_BIN_2 66 0x0304 //RX_FDEQ_BIN_3 -67 0x0405 //RX_FDEQ_BIN_4 -68 0x0506 //RX_FDEQ_BIN_5 +67 0x0703 //RX_FDEQ_BIN_4 +68 0x0406 //RX_FDEQ_BIN_5 69 0x0708 //RX_FDEQ_BIN_6 70 0x090A //RX_FDEQ_BIN_7 71 0x0B0C //RX_FDEQ_BIN_8 @@ -36735,7 +55120,7 @@ 108 0x7FFF //RX_FDDRC_SLANT_1_2 109 0x7FFF //RX_FDDRC_SLANT_1_3 110 0x0000 //RX_FDDRC_RESRV_0 -129 0x008A //RX_SPK_VOL +129 0x0051 //RX_SPK_VOL 130 0x0000 //RX_VOL_RESRV_0 #VOL 6 6 0x1000 //RX_TDDRC_ALPHA_UP_1 @@ -36750,8 +55135,8 @@ 34 0x0800 //RX_TDDRC_LIMITER_GAIN 112 0x0002 //RX_TDDRC_THRD_0 113 0x0004 //RX_TDDRC_THRD_1 -114 0x1A00 //RX_TDDRC_THRD_2 -115 0x1A00 //RX_TDDRC_THRD_3 +114 0x1800 //RX_TDDRC_THRD_2 +115 0x1800 //RX_TDDRC_THRD_3 116 0x7FFF //RX_TDDRC_SLANT_0 117 0x7FFF //RX_TDDRC_SLANT_1 118 0x1000 //RX_TDDRC_ALPHA_UP_0 @@ -36760,18 +55145,18 @@ 121 0x199A //RX_TDDRC_HMNC_GAIN 122 0x0001 //RX_TDDRC_SMT_FLAG 123 0x0CCD //RX_TDDRC_SMT_W -124 0x0700 //RX_TDDRC_DRC_GAIN +124 0x0D56 //RX_TDDRC_DRC_GAIN 38 0x0014 //RX_FDEQ_SUBNUM 39 0x8080 //RX_FDEQ_GAIN_0 -40 0x8058 //RX_FDEQ_GAIN_1 -41 0x5454 //RX_FDEQ_GAIN_2 -42 0x545C //RX_FDEQ_GAIN_3 -43 0x6448 //RX_FDEQ_GAIN_4 -44 0x4848 //RX_FDEQ_GAIN_5 -45 0x5848 //RX_FDEQ_GAIN_6 -46 0x4848 //RX_FDEQ_GAIN_7 -47 0x485A //RX_FDEQ_GAIN_8 -48 0x5A58 //RX_FDEQ_GAIN_9 +40 0x8050 //RX_FDEQ_GAIN_1 +41 0x4840 //RX_FDEQ_GAIN_2 +42 0x4040 //RX_FDEQ_GAIN_3 +43 0x4470 //RX_FDEQ_GAIN_4 +44 0x383C //RX_FDEQ_GAIN_5 +45 0x3C3C //RX_FDEQ_GAIN_6 +46 0x3434 //RX_FDEQ_GAIN_7 +47 0x344C //RX_FDEQ_GAIN_8 +48 0x585C //RX_FDEQ_GAIN_9 49 0x4848 //RX_FDEQ_GAIN_10 50 0x4848 //RX_FDEQ_GAIN_11 51 0x4848 //RX_FDEQ_GAIN_12 @@ -36790,8 +55175,8 @@ 64 0x0203 //RX_FDEQ_BIN_1 65 0x0303 //RX_FDEQ_BIN_2 66 0x0304 //RX_FDEQ_BIN_3 -67 0x0405 //RX_FDEQ_BIN_4 -68 0x0506 //RX_FDEQ_BIN_5 +67 0x0703 //RX_FDEQ_BIN_4 +68 0x0406 //RX_FDEQ_BIN_5 69 0x0708 //RX_FDEQ_BIN_6 70 0x090A //RX_FDEQ_BIN_7 71 0x0B0C //RX_FDEQ_BIN_8 @@ -36836,11 +55221,862 @@ 110 0x0000 //RX_FDDRC_RESRV_0 129 0x0100 //RX_SPK_VOL 130 0x0000 //RX_VOL_RESRV_0 +#RX 2 +157 0x243C //RX_RECVFUNC_MODE_0 +158 0x0000 //RX_RECVFUNC_MODE_1 +159 0x0000 //RX_SAMPLINGFREQ_SIG +160 0x0000 //RX_SAMPLINGFREQ_PROC +161 0x000A //RX_FRAME_SZ +162 0x0000 //RX_DELAY_OPT +163 0x1000 //RX_TDDRC_ALPHA_UP_1 +164 0x1000 //RX_TDDRC_ALPHA_UP_2 +165 0x1000 //RX_TDDRC_ALPHA_UP_3 +166 0x1000 //RX_TDDRC_ALPHA_UP_4 +167 0x0403 //RX_PGA +168 0x7646 //RX_A_HP +169 0x4000 //RX_B_PE +170 0x7800 //RX_THR_PITCH_DET_0 +171 0x7000 //RX_THR_PITCH_DET_1 +172 0x6000 //RX_THR_PITCH_DET_2 +173 0x0008 //RX_PITCH_BFR_LEN +174 0x0003 //RX_SBD_PITCH_DET +175 0x0100 //RX_PP_RESRV_0 +176 0x0020 //RX_PP_RESRV_1 +177 0x0400 //RX_N_SN_EST +178 0x000C //RX_N2_SN_EST +179 0x0010 //RX_NS_LVL_CTRL +180 0xF800 //RX_THR_SN_EST +181 0x7E00 //RX_LAMBDA_PFILT +182 0x000A //RX_FENS_RESRV_0 +183 0x0190 //RX_FENS_RESRV_1 +184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +185 0x4000 //RX_TDDRC_ALPHA_DWN_2 +186 0x4000 //RX_TDDRC_ALPHA_DWN_3 +187 0x0002 //RX_EXTRA_NS_L +188 0x0800 //RX_EXTRA_NS_A +189 0x4000 //RX_TDDRC_ALPHA_DWN_4 +190 0x7214 //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +192 0x199A //RX_A_POST_FLT +193 0x0000 //RX_LMT_THRD +194 0x4000 //RX_LMT_ALPHA +195 0x0014 //RX_FDEQ_SUBNUM +196 0x8080 //RX_FDEQ_GAIN_0 +197 0x8054 //RX_FDEQ_GAIN_1 +198 0x5050 //RX_FDEQ_GAIN_2 +199 0x5058 //RX_FDEQ_GAIN_3 +200 0x5C70 //RX_FDEQ_GAIN_4 +201 0x4848 //RX_FDEQ_GAIN_5 +202 0x484C //RX_FDEQ_GAIN_6 +203 0x4848 //RX_FDEQ_GAIN_7 +204 0x485A //RX_FDEQ_GAIN_8 +205 0x5A58 //RX_FDEQ_GAIN_9 +206 0x4848 //RX_FDEQ_GAIN_10 +207 0x4848 //RX_FDEQ_GAIN_11 +208 0x4848 //RX_FDEQ_GAIN_12 +209 0x4848 //RX_FDEQ_GAIN_13 +210 0x4848 //RX_FDEQ_GAIN_14 +211 0x4848 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0202 //RX_FDEQ_BIN_0 +221 0x0203 //RX_FDEQ_BIN_1 +222 0x0303 //RX_FDEQ_BIN_2 +223 0x0304 //RX_FDEQ_BIN_3 +224 0x0604 //RX_FDEQ_BIN_4 +225 0x0406 //RX_FDEQ_BIN_5 +226 0x0708 //RX_FDEQ_BIN_6 +227 0x090A //RX_FDEQ_BIN_7 +228 0x0B0C //RX_FDEQ_BIN_8 +229 0x0D08 //RX_FDEQ_BIN_9 +230 0x0000 //RX_FDEQ_BIN_10 +231 0x0000 //RX_FDEQ_BIN_11 +232 0x0000 //RX_FDEQ_BIN_12 +233 0x0000 //RX_FDEQ_BIN_13 +234 0x0000 //RX_FDEQ_BIN_14 +235 0x0000 //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x4000 //RX_FDEQ_RESRV_0 +245 0x0320 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0035 //RX_FDDRC_BAND_MARGIN_1 +248 0x0060 //RX_FDDRC_BAND_MARGIN_2 +249 0x0080 //RX_FDDRC_BAND_MARGIN_3 +250 0x0004 //RX_FDDRC_BLOCK_EXP +251 0x0600 //RX_FDDRC_THRD_2_0 +252 0x0600 //RX_FDDRC_THRD_2_1 +253 0x0600 //RX_FDDRC_THRD_2_2 +254 0x0600 //RX_FDDRC_THRD_2_3 +255 0x0800 //RX_FDDRC_THRD_3_0 +256 0x0800 //RX_FDDRC_THRD_3_1 +257 0x0800 //RX_FDDRC_THRD_3_2 +258 0x0800 //RX_FDDRC_THRD_3_3 +259 0x0000 //RX_FDDRC_SLANT_0_0 +260 0x0000 //RX_FDDRC_SLANT_0_1 +261 0x0000 //RX_FDDRC_SLANT_0_2 +262 0x0000 //RX_FDDRC_SLANT_0_3 +263 0x7FFF //RX_FDDRC_SLANT_1_0 +264 0x7FFF //RX_FDDRC_SLANT_1_1 +265 0x7FFF //RX_FDDRC_SLANT_1_2 +266 0x7FFF //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +268 0x0005 //RX_FILTINDX +269 0x0002 //RX_TDDRC_THRD_0 +270 0x0004 //RX_TDDRC_THRD_1 +271 0x1A00 //RX_TDDRC_THRD_2 +272 0x1A00 //RX_TDDRC_THRD_3 +273 0x7FFF //RX_TDDRC_SLANT_0 +274 0x7FFF //RX_TDDRC_SLANT_1 +275 0x1000 //RX_TDDRC_ALPHA_UP_0 +276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x199A //RX_TDDRC_HMNC_GAIN +279 0x0001 //RX_TDDRC_SMT_FLAG +280 0x0CCD //RX_TDDRC_SMT_W +281 0x0780 //RX_TDDRC_DRC_GAIN +282 0x7C00 //RX_LAMBDA_PKA_FP +283 0x1194 //RX_TPKA_FP +284 0x0400 //RX_MIN_G_FP +285 0x0800 //RX_MAX_G_FP +286 0x0015 //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 +288 0x0000 //RX_MAXLEVEL_CNG +289 0x3000 //RX_BWE_UV_TH +290 0x3000 //RX_BWE_UV_TH2 +291 0x1800 //RX_BWE_UV_TH3 +292 0x1000 //RX_BWE_V_TH +293 0x04CD //RX_BWE_GAIN1_V_TH1 +294 0x0F33 //RX_BWE_GAIN1_V_TH2 +295 0x7333 //RX_BWE_UV_EQ +296 0x199A //RX_BWE_V_EQ +297 0x7333 //RX_BWE_TONE_TH +298 0x0004 //RX_BWE_UV_HOLD_T +299 0x6CCD //RX_BWE_GAIN2_ALPHA +300 0x799A //RX_BWE_GAIN3_ALPHA +301 0x001E //RX_BWE_CUTOFF +302 0x3000 //RX_BWE_GAINFILL +303 0x3200 //RX_BWE_MAXTH_TONE +304 0x2000 //RX_BWE_EQ_0 +305 0x2000 //RX_BWE_EQ_1 +306 0x2000 //RX_BWE_EQ_2 +307 0x2000 //RX_BWE_EQ_3 +308 0x2000 //RX_BWE_EQ_4 +309 0x2000 //RX_BWE_EQ_5 +310 0x2000 //RX_BWE_EQ_6 +311 0x0000 //RX_BWE_RESRV_0 +312 0x0000 //RX_BWE_RESRV_1 +313 0x0000 //RX_BWE_RESRV_2 +#VOL 0 +163 0x1000 //RX_TDDRC_ALPHA_UP_1 +164 0x1000 //RX_TDDRC_ALPHA_UP_2 +165 0x1000 //RX_TDDRC_ALPHA_UP_3 +166 0x1000 //RX_TDDRC_ALPHA_UP_4 +184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +185 0x4000 //RX_TDDRC_ALPHA_DWN_2 +186 0x4000 //RX_TDDRC_ALPHA_DWN_3 +189 0x4000 //RX_TDDRC_ALPHA_DWN_4 +190 0x7214 //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +269 0x0002 //RX_TDDRC_THRD_0 +270 0x0004 //RX_TDDRC_THRD_1 +271 0x1800 //RX_TDDRC_THRD_2 +272 0x1800 //RX_TDDRC_THRD_3 +273 0x7FFF //RX_TDDRC_SLANT_0 +274 0x7FFF //RX_TDDRC_SLANT_1 +275 0x1000 //RX_TDDRC_ALPHA_UP_0 +276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x199A //RX_TDDRC_HMNC_GAIN +279 0x0001 //RX_TDDRC_SMT_FLAG +280 0x0CCD //RX_TDDRC_SMT_W +281 0x0780 //RX_TDDRC_DRC_GAIN +195 0x0014 //RX_FDEQ_SUBNUM +196 0x8080 //RX_FDEQ_GAIN_0 +197 0x8050 //RX_FDEQ_GAIN_1 +198 0x4840 //RX_FDEQ_GAIN_2 +199 0x4040 //RX_FDEQ_GAIN_3 +200 0x4C68 //RX_FDEQ_GAIN_4 +201 0x403C //RX_FDEQ_GAIN_5 +202 0x3C38 //RX_FDEQ_GAIN_6 +203 0x3430 //RX_FDEQ_GAIN_7 +204 0x303C //RX_FDEQ_GAIN_8 +205 0x4C50 //RX_FDEQ_GAIN_9 +206 0x4848 //RX_FDEQ_GAIN_10 +207 0x4848 //RX_FDEQ_GAIN_11 +208 0x4848 //RX_FDEQ_GAIN_12 +209 0x4848 //RX_FDEQ_GAIN_13 +210 0x4848 //RX_FDEQ_GAIN_14 +211 0x4848 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0202 //RX_FDEQ_BIN_0 +221 0x0203 //RX_FDEQ_BIN_1 +222 0x0303 //RX_FDEQ_BIN_2 +223 0x0304 //RX_FDEQ_BIN_3 +224 0x0703 //RX_FDEQ_BIN_4 +225 0x0406 //RX_FDEQ_BIN_5 +226 0x0708 //RX_FDEQ_BIN_6 +227 0x090A //RX_FDEQ_BIN_7 +228 0x0B0C //RX_FDEQ_BIN_8 +229 0x0D08 //RX_FDEQ_BIN_9 +230 0x0000 //RX_FDEQ_BIN_10 +231 0x0000 //RX_FDEQ_BIN_11 +232 0x0000 //RX_FDEQ_BIN_12 +233 0x0000 //RX_FDEQ_BIN_13 +234 0x0000 //RX_FDEQ_BIN_14 +235 0x0000 //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x4000 //RX_FDEQ_RESRV_0 +245 0x0320 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0035 //RX_FDDRC_BAND_MARGIN_1 +248 0x0060 //RX_FDDRC_BAND_MARGIN_2 +249 0x0080 //RX_FDDRC_BAND_MARGIN_3 +250 0x0004 //RX_FDDRC_BLOCK_EXP +251 0x0600 //RX_FDDRC_THRD_2_0 +252 0x0600 //RX_FDDRC_THRD_2_1 +253 0x0600 //RX_FDDRC_THRD_2_2 +254 0x0600 //RX_FDDRC_THRD_2_3 +255 0x0800 //RX_FDDRC_THRD_3_0 +256 0x0800 //RX_FDDRC_THRD_3_1 +257 0x0800 //RX_FDDRC_THRD_3_2 +258 0x0800 //RX_FDDRC_THRD_3_3 +259 0x0000 //RX_FDDRC_SLANT_0_0 +260 0x0000 //RX_FDDRC_SLANT_0_1 +261 0x0000 //RX_FDDRC_SLANT_0_2 +262 0x0000 //RX_FDDRC_SLANT_0_3 +263 0x7FFF //RX_FDDRC_SLANT_1_0 +264 0x7FFF //RX_FDDRC_SLANT_1_1 +265 0x7FFF //RX_FDDRC_SLANT_1_2 +266 0x7FFF //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +286 0x0012 //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 +#VOL 1 +163 0x1000 //RX_TDDRC_ALPHA_UP_1 +164 0x1000 //RX_TDDRC_ALPHA_UP_2 +165 0x1000 //RX_TDDRC_ALPHA_UP_3 +166 0x1000 //RX_TDDRC_ALPHA_UP_4 +184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +185 0x4000 //RX_TDDRC_ALPHA_DWN_2 +186 0x4000 //RX_TDDRC_ALPHA_DWN_3 +189 0x4000 //RX_TDDRC_ALPHA_DWN_4 +190 0x7214 //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +269 0x0002 //RX_TDDRC_THRD_0 +270 0x0004 //RX_TDDRC_THRD_1 +271 0x1800 //RX_TDDRC_THRD_2 +272 0x1800 //RX_TDDRC_THRD_3 +273 0x7FFF //RX_TDDRC_SLANT_0 +274 0x7FFF //RX_TDDRC_SLANT_1 +275 0x1000 //RX_TDDRC_ALPHA_UP_0 +276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x199A //RX_TDDRC_HMNC_GAIN +279 0x0001 //RX_TDDRC_SMT_FLAG +280 0x0CCD //RX_TDDRC_SMT_W +281 0x0780 //RX_TDDRC_DRC_GAIN +195 0x0014 //RX_FDEQ_SUBNUM +196 0x8080 //RX_FDEQ_GAIN_0 +197 0x8050 //RX_FDEQ_GAIN_1 +198 0x4840 //RX_FDEQ_GAIN_2 +199 0x4040 //RX_FDEQ_GAIN_3 +200 0x4C68 //RX_FDEQ_GAIN_4 +201 0x403C //RX_FDEQ_GAIN_5 +202 0x3C38 //RX_FDEQ_GAIN_6 +203 0x3430 //RX_FDEQ_GAIN_7 +204 0x303C //RX_FDEQ_GAIN_8 +205 0x4C50 //RX_FDEQ_GAIN_9 +206 0x4848 //RX_FDEQ_GAIN_10 +207 0x4848 //RX_FDEQ_GAIN_11 +208 0x4848 //RX_FDEQ_GAIN_12 +209 0x4848 //RX_FDEQ_GAIN_13 +210 0x4848 //RX_FDEQ_GAIN_14 +211 0x4848 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0202 //RX_FDEQ_BIN_0 +221 0x0203 //RX_FDEQ_BIN_1 +222 0x0303 //RX_FDEQ_BIN_2 +223 0x0304 //RX_FDEQ_BIN_3 +224 0x0703 //RX_FDEQ_BIN_4 +225 0x0406 //RX_FDEQ_BIN_5 +226 0x0708 //RX_FDEQ_BIN_6 +227 0x090A //RX_FDEQ_BIN_7 +228 0x0B0C //RX_FDEQ_BIN_8 +229 0x0D08 //RX_FDEQ_BIN_9 +230 0x0000 //RX_FDEQ_BIN_10 +231 0x0000 //RX_FDEQ_BIN_11 +232 0x0000 //RX_FDEQ_BIN_12 +233 0x0000 //RX_FDEQ_BIN_13 +234 0x0000 //RX_FDEQ_BIN_14 +235 0x0000 //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x4000 //RX_FDEQ_RESRV_0 +245 0x0320 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0035 //RX_FDDRC_BAND_MARGIN_1 +248 0x0060 //RX_FDDRC_BAND_MARGIN_2 +249 0x0080 //RX_FDDRC_BAND_MARGIN_3 +250 0x0004 //RX_FDDRC_BLOCK_EXP +251 0x0600 //RX_FDDRC_THRD_2_0 +252 0x0600 //RX_FDDRC_THRD_2_1 +253 0x0600 //RX_FDDRC_THRD_2_2 +254 0x0600 //RX_FDDRC_THRD_2_3 +255 0x0800 //RX_FDDRC_THRD_3_0 +256 0x0800 //RX_FDDRC_THRD_3_1 +257 0x0800 //RX_FDDRC_THRD_3_2 +258 0x0800 //RX_FDDRC_THRD_3_3 +259 0x0000 //RX_FDDRC_SLANT_0_0 +260 0x0000 //RX_FDDRC_SLANT_0_1 +261 0x0000 //RX_FDDRC_SLANT_0_2 +262 0x0000 //RX_FDDRC_SLANT_0_3 +263 0x7FFF //RX_FDDRC_SLANT_1_0 +264 0x7FFF //RX_FDDRC_SLANT_1_1 +265 0x7FFF //RX_FDDRC_SLANT_1_2 +266 0x7FFF //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +286 0x001B //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 +#VOL 2 +163 0x1000 //RX_TDDRC_ALPHA_UP_1 +164 0x1000 //RX_TDDRC_ALPHA_UP_2 +165 0x1000 //RX_TDDRC_ALPHA_UP_3 +166 0x1000 //RX_TDDRC_ALPHA_UP_4 +184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +185 0x4000 //RX_TDDRC_ALPHA_DWN_2 +186 0x4000 //RX_TDDRC_ALPHA_DWN_3 +189 0x4000 //RX_TDDRC_ALPHA_DWN_4 +190 0x7214 //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +269 0x0002 //RX_TDDRC_THRD_0 +270 0x0004 //RX_TDDRC_THRD_1 +271 0x1800 //RX_TDDRC_THRD_2 +272 0x1800 //RX_TDDRC_THRD_3 +273 0x7FFF //RX_TDDRC_SLANT_0 +274 0x7FFF //RX_TDDRC_SLANT_1 +275 0x1000 //RX_TDDRC_ALPHA_UP_0 +276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x199A //RX_TDDRC_HMNC_GAIN +279 0x0001 //RX_TDDRC_SMT_FLAG +280 0x0CCD //RX_TDDRC_SMT_W +281 0x0780 //RX_TDDRC_DRC_GAIN +195 0x0014 //RX_FDEQ_SUBNUM +196 0x8080 //RX_FDEQ_GAIN_0 +197 0x8050 //RX_FDEQ_GAIN_1 +198 0x4840 //RX_FDEQ_GAIN_2 +199 0x4040 //RX_FDEQ_GAIN_3 +200 0x4C68 //RX_FDEQ_GAIN_4 +201 0x403C //RX_FDEQ_GAIN_5 +202 0x3C38 //RX_FDEQ_GAIN_6 +203 0x3430 //RX_FDEQ_GAIN_7 +204 0x303C //RX_FDEQ_GAIN_8 +205 0x4C50 //RX_FDEQ_GAIN_9 +206 0x4848 //RX_FDEQ_GAIN_10 +207 0x4848 //RX_FDEQ_GAIN_11 +208 0x4848 //RX_FDEQ_GAIN_12 +209 0x4848 //RX_FDEQ_GAIN_13 +210 0x4848 //RX_FDEQ_GAIN_14 +211 0x4848 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0202 //RX_FDEQ_BIN_0 +221 0x0203 //RX_FDEQ_BIN_1 +222 0x0303 //RX_FDEQ_BIN_2 +223 0x0304 //RX_FDEQ_BIN_3 +224 0x0703 //RX_FDEQ_BIN_4 +225 0x0406 //RX_FDEQ_BIN_5 +226 0x0708 //RX_FDEQ_BIN_6 +227 0x090A //RX_FDEQ_BIN_7 +228 0x0B0C //RX_FDEQ_BIN_8 +229 0x0D08 //RX_FDEQ_BIN_9 +230 0x0000 //RX_FDEQ_BIN_10 +231 0x0000 //RX_FDEQ_BIN_11 +232 0x0000 //RX_FDEQ_BIN_12 +233 0x0000 //RX_FDEQ_BIN_13 +234 0x0000 //RX_FDEQ_BIN_14 +235 0x0000 //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x4000 //RX_FDEQ_RESRV_0 +245 0x0320 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0035 //RX_FDDRC_BAND_MARGIN_1 +248 0x0060 //RX_FDDRC_BAND_MARGIN_2 +249 0x0080 //RX_FDDRC_BAND_MARGIN_3 +250 0x0004 //RX_FDDRC_BLOCK_EXP +251 0x0600 //RX_FDDRC_THRD_2_0 +252 0x0600 //RX_FDDRC_THRD_2_1 +253 0x0600 //RX_FDDRC_THRD_2_2 +254 0x0600 //RX_FDDRC_THRD_2_3 +255 0x0800 //RX_FDDRC_THRD_3_0 +256 0x0800 //RX_FDDRC_THRD_3_1 +257 0x0800 //RX_FDDRC_THRD_3_2 +258 0x0800 //RX_FDDRC_THRD_3_3 +259 0x0000 //RX_FDDRC_SLANT_0_0 +260 0x0000 //RX_FDDRC_SLANT_0_1 +261 0x0000 //RX_FDDRC_SLANT_0_2 +262 0x0000 //RX_FDDRC_SLANT_0_3 +263 0x7FFF //RX_FDDRC_SLANT_1_0 +264 0x7FFF //RX_FDDRC_SLANT_1_1 +265 0x7FFF //RX_FDDRC_SLANT_1_2 +266 0x7FFF //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +286 0x0026 //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 +#VOL 3 +163 0x1000 //RX_TDDRC_ALPHA_UP_1 +164 0x1000 //RX_TDDRC_ALPHA_UP_2 +165 0x1000 //RX_TDDRC_ALPHA_UP_3 +166 0x1000 //RX_TDDRC_ALPHA_UP_4 +184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +185 0x4000 //RX_TDDRC_ALPHA_DWN_2 +186 0x4000 //RX_TDDRC_ALPHA_DWN_3 +189 0x4000 //RX_TDDRC_ALPHA_DWN_4 +190 0x7214 //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +269 0x0002 //RX_TDDRC_THRD_0 +270 0x0004 //RX_TDDRC_THRD_1 +271 0x1800 //RX_TDDRC_THRD_2 +272 0x1800 //RX_TDDRC_THRD_3 +273 0x7FFF //RX_TDDRC_SLANT_0 +274 0x7FFF //RX_TDDRC_SLANT_1 +275 0x1000 //RX_TDDRC_ALPHA_UP_0 +276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x199A //RX_TDDRC_HMNC_GAIN +279 0x0001 //RX_TDDRC_SMT_FLAG +280 0x0CCD //RX_TDDRC_SMT_W +281 0x0780 //RX_TDDRC_DRC_GAIN +195 0x0014 //RX_FDEQ_SUBNUM +196 0x8080 //RX_FDEQ_GAIN_0 +197 0x8050 //RX_FDEQ_GAIN_1 +198 0x4840 //RX_FDEQ_GAIN_2 +199 0x4040 //RX_FDEQ_GAIN_3 +200 0x4C68 //RX_FDEQ_GAIN_4 +201 0x403C //RX_FDEQ_GAIN_5 +202 0x3C38 //RX_FDEQ_GAIN_6 +203 0x3430 //RX_FDEQ_GAIN_7 +204 0x303C //RX_FDEQ_GAIN_8 +205 0x4C50 //RX_FDEQ_GAIN_9 +206 0x4848 //RX_FDEQ_GAIN_10 +207 0x4848 //RX_FDEQ_GAIN_11 +208 0x4848 //RX_FDEQ_GAIN_12 +209 0x4848 //RX_FDEQ_GAIN_13 +210 0x4848 //RX_FDEQ_GAIN_14 +211 0x4848 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0202 //RX_FDEQ_BIN_0 +221 0x0203 //RX_FDEQ_BIN_1 +222 0x0303 //RX_FDEQ_BIN_2 +223 0x0304 //RX_FDEQ_BIN_3 +224 0x0703 //RX_FDEQ_BIN_4 +225 0x0406 //RX_FDEQ_BIN_5 +226 0x0708 //RX_FDEQ_BIN_6 +227 0x090A //RX_FDEQ_BIN_7 +228 0x0B0C //RX_FDEQ_BIN_8 +229 0x0D08 //RX_FDEQ_BIN_9 +230 0x0000 //RX_FDEQ_BIN_10 +231 0x0000 //RX_FDEQ_BIN_11 +232 0x0000 //RX_FDEQ_BIN_12 +233 0x0000 //RX_FDEQ_BIN_13 +234 0x0000 //RX_FDEQ_BIN_14 +235 0x0000 //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x4000 //RX_FDEQ_RESRV_0 +245 0x0320 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0035 //RX_FDDRC_BAND_MARGIN_1 +248 0x0060 //RX_FDDRC_BAND_MARGIN_2 +249 0x0080 //RX_FDDRC_BAND_MARGIN_3 +250 0x0004 //RX_FDDRC_BLOCK_EXP +251 0x0600 //RX_FDDRC_THRD_2_0 +252 0x0600 //RX_FDDRC_THRD_2_1 +253 0x0600 //RX_FDDRC_THRD_2_2 +254 0x0600 //RX_FDDRC_THRD_2_3 +255 0x0800 //RX_FDDRC_THRD_3_0 +256 0x0800 //RX_FDDRC_THRD_3_1 +257 0x0800 //RX_FDDRC_THRD_3_2 +258 0x0800 //RX_FDDRC_THRD_3_3 +259 0x0000 //RX_FDDRC_SLANT_0_0 +260 0x0000 //RX_FDDRC_SLANT_0_1 +261 0x0000 //RX_FDDRC_SLANT_0_2 +262 0x0000 //RX_FDDRC_SLANT_0_3 +263 0x7FFF //RX_FDDRC_SLANT_1_0 +264 0x7FFF //RX_FDDRC_SLANT_1_1 +265 0x7FFF //RX_FDDRC_SLANT_1_2 +266 0x7FFF //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +286 0x0037 //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 +#VOL 4 +163 0x1000 //RX_TDDRC_ALPHA_UP_1 +164 0x1000 //RX_TDDRC_ALPHA_UP_2 +165 0x1000 //RX_TDDRC_ALPHA_UP_3 +166 0x1000 //RX_TDDRC_ALPHA_UP_4 +184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +185 0x4000 //RX_TDDRC_ALPHA_DWN_2 +186 0x4000 //RX_TDDRC_ALPHA_DWN_3 +189 0x4000 //RX_TDDRC_ALPHA_DWN_4 +190 0x7214 //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +269 0x0002 //RX_TDDRC_THRD_0 +270 0x0004 //RX_TDDRC_THRD_1 +271 0x1800 //RX_TDDRC_THRD_2 +272 0x1800 //RX_TDDRC_THRD_3 +273 0x7FFF //RX_TDDRC_SLANT_0 +274 0x7FFF //RX_TDDRC_SLANT_1 +275 0x1000 //RX_TDDRC_ALPHA_UP_0 +276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x199A //RX_TDDRC_HMNC_GAIN +279 0x0001 //RX_TDDRC_SMT_FLAG +280 0x0CCD //RX_TDDRC_SMT_W +281 0x0D56 //RX_TDDRC_DRC_GAIN +195 0x0014 //RX_FDEQ_SUBNUM +196 0x8080 //RX_FDEQ_GAIN_0 +197 0x8050 //RX_FDEQ_GAIN_1 +198 0x4840 //RX_FDEQ_GAIN_2 +199 0x4040 //RX_FDEQ_GAIN_3 +200 0x4470 //RX_FDEQ_GAIN_4 +201 0x383C //RX_FDEQ_GAIN_5 +202 0x3C3C //RX_FDEQ_GAIN_6 +203 0x3434 //RX_FDEQ_GAIN_7 +204 0x344C //RX_FDEQ_GAIN_8 +205 0x585C //RX_FDEQ_GAIN_9 +206 0x4848 //RX_FDEQ_GAIN_10 +207 0x4848 //RX_FDEQ_GAIN_11 +208 0x4848 //RX_FDEQ_GAIN_12 +209 0x4848 //RX_FDEQ_GAIN_13 +210 0x4848 //RX_FDEQ_GAIN_14 +211 0x4848 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0202 //RX_FDEQ_BIN_0 +221 0x0203 //RX_FDEQ_BIN_1 +222 0x0303 //RX_FDEQ_BIN_2 +223 0x0304 //RX_FDEQ_BIN_3 +224 0x0703 //RX_FDEQ_BIN_4 +225 0x0406 //RX_FDEQ_BIN_5 +226 0x0708 //RX_FDEQ_BIN_6 +227 0x090A //RX_FDEQ_BIN_7 +228 0x0B0C //RX_FDEQ_BIN_8 +229 0x0D08 //RX_FDEQ_BIN_9 +230 0x0000 //RX_FDEQ_BIN_10 +231 0x0000 //RX_FDEQ_BIN_11 +232 0x0000 //RX_FDEQ_BIN_12 +233 0x0000 //RX_FDEQ_BIN_13 +234 0x0000 //RX_FDEQ_BIN_14 +235 0x0000 //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x4000 //RX_FDEQ_RESRV_0 +245 0x0320 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0035 //RX_FDDRC_BAND_MARGIN_1 +248 0x0060 //RX_FDDRC_BAND_MARGIN_2 +249 0x0080 //RX_FDDRC_BAND_MARGIN_3 +250 0x0004 //RX_FDDRC_BLOCK_EXP +251 0x0600 //RX_FDDRC_THRD_2_0 +252 0x0600 //RX_FDDRC_THRD_2_1 +253 0x0600 //RX_FDDRC_THRD_2_2 +254 0x0600 //RX_FDDRC_THRD_2_3 +255 0x0800 //RX_FDDRC_THRD_3_0 +256 0x0800 //RX_FDDRC_THRD_3_1 +257 0x0800 //RX_FDDRC_THRD_3_2 +258 0x0800 //RX_FDDRC_THRD_3_3 +259 0x0000 //RX_FDDRC_SLANT_0_0 +260 0x0000 //RX_FDDRC_SLANT_0_1 +261 0x0000 //RX_FDDRC_SLANT_0_2 +262 0x0000 //RX_FDDRC_SLANT_0_3 +263 0x7FFF //RX_FDDRC_SLANT_1_0 +264 0x7FFF //RX_FDDRC_SLANT_1_1 +265 0x7FFF //RX_FDDRC_SLANT_1_2 +266 0x7FFF //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +286 0x002C //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 +#VOL 5 +163 0x1000 //RX_TDDRC_ALPHA_UP_1 +164 0x1000 //RX_TDDRC_ALPHA_UP_2 +165 0x1000 //RX_TDDRC_ALPHA_UP_3 +166 0x1000 //RX_TDDRC_ALPHA_UP_4 +184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +185 0x4000 //RX_TDDRC_ALPHA_DWN_2 +186 0x4000 //RX_TDDRC_ALPHA_DWN_3 +189 0x4000 //RX_TDDRC_ALPHA_DWN_4 +190 0x7214 //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +269 0x0002 //RX_TDDRC_THRD_0 +270 0x0004 //RX_TDDRC_THRD_1 +271 0x1800 //RX_TDDRC_THRD_2 +272 0x1800 //RX_TDDRC_THRD_3 +273 0x7FFF //RX_TDDRC_SLANT_0 +274 0x7FFF //RX_TDDRC_SLANT_1 +275 0x1000 //RX_TDDRC_ALPHA_UP_0 +276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x199A //RX_TDDRC_HMNC_GAIN +279 0x0001 //RX_TDDRC_SMT_FLAG +280 0x0CCD //RX_TDDRC_SMT_W +281 0x0D56 //RX_TDDRC_DRC_GAIN +195 0x0014 //RX_FDEQ_SUBNUM +196 0x8080 //RX_FDEQ_GAIN_0 +197 0x8050 //RX_FDEQ_GAIN_1 +198 0x4840 //RX_FDEQ_GAIN_2 +199 0x4040 //RX_FDEQ_GAIN_3 +200 0x4470 //RX_FDEQ_GAIN_4 +201 0x383C //RX_FDEQ_GAIN_5 +202 0x3C3C //RX_FDEQ_GAIN_6 +203 0x3434 //RX_FDEQ_GAIN_7 +204 0x344C //RX_FDEQ_GAIN_8 +205 0x585C //RX_FDEQ_GAIN_9 +206 0x4848 //RX_FDEQ_GAIN_10 +207 0x4848 //RX_FDEQ_GAIN_11 +208 0x4848 //RX_FDEQ_GAIN_12 +209 0x4848 //RX_FDEQ_GAIN_13 +210 0x4848 //RX_FDEQ_GAIN_14 +211 0x4848 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0202 //RX_FDEQ_BIN_0 +221 0x0203 //RX_FDEQ_BIN_1 +222 0x0303 //RX_FDEQ_BIN_2 +223 0x0304 //RX_FDEQ_BIN_3 +224 0x0703 //RX_FDEQ_BIN_4 +225 0x0406 //RX_FDEQ_BIN_5 +226 0x0708 //RX_FDEQ_BIN_6 +227 0x090A //RX_FDEQ_BIN_7 +228 0x0B0C //RX_FDEQ_BIN_8 +229 0x0D08 //RX_FDEQ_BIN_9 +230 0x0000 //RX_FDEQ_BIN_10 +231 0x0000 //RX_FDEQ_BIN_11 +232 0x0000 //RX_FDEQ_BIN_12 +233 0x0000 //RX_FDEQ_BIN_13 +234 0x0000 //RX_FDEQ_BIN_14 +235 0x0000 //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x4000 //RX_FDEQ_RESRV_0 +245 0x0320 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0035 //RX_FDDRC_BAND_MARGIN_1 +248 0x0060 //RX_FDDRC_BAND_MARGIN_2 +249 0x0080 //RX_FDDRC_BAND_MARGIN_3 +250 0x0004 //RX_FDDRC_BLOCK_EXP +251 0x0600 //RX_FDDRC_THRD_2_0 +252 0x0600 //RX_FDDRC_THRD_2_1 +253 0x0600 //RX_FDDRC_THRD_2_2 +254 0x0600 //RX_FDDRC_THRD_2_3 +255 0x0800 //RX_FDDRC_THRD_3_0 +256 0x0800 //RX_FDDRC_THRD_3_1 +257 0x0800 //RX_FDDRC_THRD_3_2 +258 0x0800 //RX_FDDRC_THRD_3_3 +259 0x0000 //RX_FDDRC_SLANT_0_0 +260 0x0000 //RX_FDDRC_SLANT_0_1 +261 0x0000 //RX_FDDRC_SLANT_0_2 +262 0x0000 //RX_FDDRC_SLANT_0_3 +263 0x7FFF //RX_FDDRC_SLANT_1_0 +264 0x7FFF //RX_FDDRC_SLANT_1_1 +265 0x7FFF //RX_FDDRC_SLANT_1_2 +266 0x7FFF //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +286 0x0051 //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 +#VOL 6 +163 0x1000 //RX_TDDRC_ALPHA_UP_1 +164 0x1000 //RX_TDDRC_ALPHA_UP_2 +165 0x1000 //RX_TDDRC_ALPHA_UP_3 +166 0x1000 //RX_TDDRC_ALPHA_UP_4 +184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +185 0x4000 //RX_TDDRC_ALPHA_DWN_2 +186 0x4000 //RX_TDDRC_ALPHA_DWN_3 +189 0x4000 //RX_TDDRC_ALPHA_DWN_4 +190 0x7214 //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +269 0x0002 //RX_TDDRC_THRD_0 +270 0x0004 //RX_TDDRC_THRD_1 +271 0x1800 //RX_TDDRC_THRD_2 +272 0x1800 //RX_TDDRC_THRD_3 +273 0x7FFF //RX_TDDRC_SLANT_0 +274 0x7FFF //RX_TDDRC_SLANT_1 +275 0x1000 //RX_TDDRC_ALPHA_UP_0 +276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x199A //RX_TDDRC_HMNC_GAIN +279 0x0001 //RX_TDDRC_SMT_FLAG +280 0x0CCD //RX_TDDRC_SMT_W +281 0x0D56 //RX_TDDRC_DRC_GAIN +195 0x0014 //RX_FDEQ_SUBNUM +196 0x8080 //RX_FDEQ_GAIN_0 +197 0x8050 //RX_FDEQ_GAIN_1 +198 0x4840 //RX_FDEQ_GAIN_2 +199 0x4040 //RX_FDEQ_GAIN_3 +200 0x4470 //RX_FDEQ_GAIN_4 +201 0x383C //RX_FDEQ_GAIN_5 +202 0x3C3C //RX_FDEQ_GAIN_6 +203 0x3434 //RX_FDEQ_GAIN_7 +204 0x344C //RX_FDEQ_GAIN_8 +205 0x585C //RX_FDEQ_GAIN_9 +206 0x4848 //RX_FDEQ_GAIN_10 +207 0x4848 //RX_FDEQ_GAIN_11 +208 0x4848 //RX_FDEQ_GAIN_12 +209 0x4848 //RX_FDEQ_GAIN_13 +210 0x4848 //RX_FDEQ_GAIN_14 +211 0x4848 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0202 //RX_FDEQ_BIN_0 +221 0x0203 //RX_FDEQ_BIN_1 +222 0x0303 //RX_FDEQ_BIN_2 +223 0x0304 //RX_FDEQ_BIN_3 +224 0x0703 //RX_FDEQ_BIN_4 +225 0x0406 //RX_FDEQ_BIN_5 +226 0x0708 //RX_FDEQ_BIN_6 +227 0x090A //RX_FDEQ_BIN_7 +228 0x0B0C //RX_FDEQ_BIN_8 +229 0x0D08 //RX_FDEQ_BIN_9 +230 0x0000 //RX_FDEQ_BIN_10 +231 0x0000 //RX_FDEQ_BIN_11 +232 0x0000 //RX_FDEQ_BIN_12 +233 0x0000 //RX_FDEQ_BIN_13 +234 0x0000 //RX_FDEQ_BIN_14 +235 0x0000 //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x4000 //RX_FDEQ_RESRV_0 +245 0x0320 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0035 //RX_FDDRC_BAND_MARGIN_1 +248 0x0060 //RX_FDDRC_BAND_MARGIN_2 +249 0x0080 //RX_FDDRC_BAND_MARGIN_3 +250 0x0004 //RX_FDDRC_BLOCK_EXP +251 0x0600 //RX_FDDRC_THRD_2_0 +252 0x0600 //RX_FDDRC_THRD_2_1 +253 0x0600 //RX_FDDRC_THRD_2_2 +254 0x0600 //RX_FDDRC_THRD_2_3 +255 0x0800 //RX_FDDRC_THRD_3_0 +256 0x0800 //RX_FDDRC_THRD_3_1 +257 0x0800 //RX_FDDRC_THRD_3_2 +258 0x0800 //RX_FDDRC_THRD_3_3 +259 0x0000 //RX_FDDRC_SLANT_0_0 +260 0x0000 //RX_FDDRC_SLANT_0_1 +261 0x0000 //RX_FDDRC_SLANT_0_2 +262 0x0000 //RX_FDDRC_SLANT_0_3 +263 0x7FFF //RX_FDDRC_SLANT_1_0 +264 0x7FFF //RX_FDDRC_SLANT_1_1 +265 0x7FFF //RX_FDDRC_SLANT_1_2 +266 0x7FFF //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +286 0x0100 //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 #CASE_NAME HEADSET-TTY_HCO-VOICE_GENERIC-WB -#PARAM_MODE FULL -#PARAM_TYPE TX+RX -#TOTAL_CUSTOM_STEP 7 +#PARAM_MODE Full +#PARAM_TYPE TX+2RX +#TOTAL_CUSTOM_STEP 7+7 #TX 0 0x0001 //TX_OPERATION_MODE_0 1 0x0000 //TX_OPERATION_MODE_1 @@ -37084,7 +56320,7 @@ 239 0x0000 //TX_DT_RESRV_7 240 0x0000 //TX_DT_RESRV_8 241 0x0000 //TX_DT_RESRV_9 -242 0xF200 //TX_THR_SN_EST_0 +242 0xFA00 //TX_THR_SN_EST_0 243 0xF400 //TX_THR_SN_EST_1 244 0xF800 //TX_THR_SN_EST_2 245 0xF600 //TX_THR_SN_EST_3 @@ -37093,12 +56329,12 @@ 248 0xF800 //TX_THR_SN_EST_6 249 0xF800 //TX_THR_SN_EST_7 250 0x0100 //TX_DELTA_THR_SN_EST_0 -251 0x0000 //TX_DELTA_THR_SN_EST_1 +251 0x0100 //TX_DELTA_THR_SN_EST_1 252 0x0100 //TX_DELTA_THR_SN_EST_2 -253 0x0100 //TX_DELTA_THR_SN_EST_3 +253 0x0200 //TX_DELTA_THR_SN_EST_3 254 0x0200 //TX_DELTA_THR_SN_EST_4 255 0x0200 //TX_DELTA_THR_SN_EST_5 -256 0x0200 //TX_DELTA_THR_SN_EST_6 +256 0x0000 //TX_DELTA_THR_SN_EST_6 257 0x0200 //TX_DELTA_THR_SN_EST_7 258 0x4000 //TX_LAMBDA_NN_EST_0 259 0x4000 //TX_LAMBDA_NN_EST_1 @@ -37124,12 +56360,12 @@ 279 0x0000 //TX_B_POST_FLT_0 280 0x0000 //TX_B_POST_FLT_1 281 0x001A //TX_NS_LVL_CTRL_0 -282 0x001A //TX_NS_LVL_CTRL_1 +282 0x0014 //TX_NS_LVL_CTRL_1 283 0x0014 //TX_NS_LVL_CTRL_2 -284 0x0014 //TX_NS_LVL_CTRL_3 +284 0x000C //TX_NS_LVL_CTRL_3 285 0x000C //TX_NS_LVL_CTRL_4 286 0x000C //TX_NS_LVL_CTRL_5 -287 0x000C //TX_NS_LVL_CTRL_6 +287 0x001A //TX_NS_LVL_CTRL_6 288 0x000C //TX_NS_LVL_CTRL_7 289 0x000E //TX_MIN_GAIN_S_0 290 0x0014 //TX_MIN_GAIN_S_1 @@ -37145,10 +56381,10 @@ 300 0x7FFF //TX_SNRI_SUP_0 301 0x7FFF //TX_SNRI_SUP_1 302 0x7FFF //TX_SNRI_SUP_2 -303 0x7FFF //TX_SNRI_SUP_3 +303 0x4000 //TX_SNRI_SUP_3 304 0x4000 //TX_SNRI_SUP_4 305 0x4000 //TX_SNRI_SUP_5 -306 0x4000 //TX_SNRI_SUP_6 +306 0x7FFF //TX_SNRI_SUP_6 307 0x4000 //TX_SNRI_SUP_7 308 0x1200 //TX_THR_LFNS 309 0x0147 //TX_G_LFNS @@ -37157,12 +56393,12 @@ 312 0x7FFF //TX_A_POST_FILT_0 313 0x7FFF //TX_A_POST_FILT_1 314 0x4000 //TX_A_POST_FILT_S_0 -315 0x199A //TX_A_POST_FILT_S_1 +315 0x1000 //TX_A_POST_FILT_S_1 316 0x1000 //TX_A_POST_FILT_S_2 -317 0x1000 //TX_A_POST_FILT_S_3 +317 0x6666 //TX_A_POST_FILT_S_3 318 0x6666 //TX_A_POST_FILT_S_4 319 0x6666 //TX_A_POST_FILT_S_5 -320 0x6666 //TX_A_POST_FILT_S_6 +320 0x199A //TX_A_POST_FILT_S_6 321 0x6666 //TX_A_POST_FILT_S_7 322 0x2000 //TX_B_POST_FILT_0 323 0x2000 //TX_B_POST_FILT_1 @@ -37209,7 +56445,7 @@ 364 0x0000 //TX_K_APT 365 0x0001 //TX_NOISEDET 366 0x05A0 //TX_NDETCT -367 0x000A //TX_NOISE_TH_0 +367 0x0102 //TX_NOISE_TH_0 368 0x1388 //TX_NOISE_TH_0_2 369 0x3A98 //TX_NOISE_TH_0_3 370 0x0C80 //TX_NOISE_TH_1 @@ -37221,11 +56457,11 @@ 376 0x7FFF //TX_NOISE_TH_5_3 377 0x7FFF //TX_NOISE_TH_5_4 378 0x00C8 //TX_NOISE_TH_6 -379 0x000A //TX_MINENOISE_TH -380 0x0000 //TX_MINENOISE_MIC0_TH_MTS -381 0x0000 //TX_MINENOISE_MIC0_TH_EXP -382 0x0000 //TX_MINENOISE_MIC0_S_TH_MTS -383 0x0000 //TX_MINENOISE_MIC0_S_TH_EXP +379 0x00F8 //TX_MINENOISE_TH +380 0xD508 //TX_MORENS_TFMASK_TH +381 0x0001 //TX_DRC_QUIET_FLOOR +382 0x3A98 //TX_RATIODTL_CUT_TH +383 0x0DAC //TX_DT_CUT_K1 384 0x6400 //TX_OUT_ENER_S_TH_CLEAN 385 0x6400 //TX_OUT_ENER_S_TH_LESSCLEAN 386 0x6400 //TX_OUT_ENER_S_TH_NOISY @@ -37233,22 +56469,22 @@ 388 0x7D00 //TX_OUT_ENER_TH_SPEECH 389 0x0000 //TX_SN_NPB_GAIN 390 0x0000 //TX_NN_NPB_GAIN -391 0x0000 //TX_CSX_ALPHA_0 -392 0x0000 //TX_CSX_ALPHA_1 -393 0x0000 //TX_CSX_ALPHA_2 -394 0x0000 //TX_CSX_ALPHA_3 -395 0x0000 //TX_MU_ARSP_EST -396 0x0000 //TX_P_OUTBEAM_MIN_TH +391 0x7FFF //TX_POST_MASK_SUP_HSNE +392 0x1388 //TX_TAIL_DET_TH +393 0x4000 //TX_B_LESSCUT_RTO_WTA +394 0x0000 //TX_MEL_G_R +395 0x0080 //TX_SUPHIGH_TH +396 0x0000 //TX_MASK_G_R 397 0x0000 //TX_EXTRA_NS_L -398 0x0000 //TX_EXTRA_NS_A -399 0x0000 //TX_VR_NOISE_FLOOR_TH +398 0x1800 //TX_C_POST_FLT_MASK +399 0x7FFF //TX_A_POST_FLT_WNS 400 0x0000 //TX_MIN_G_LOW300HZ 401 0x0010 //TX_MAXLEVEL_CNG 402 0x0000 //TX_STN_NOISE_TH 403 0x0000 //TX_POST_MASK_SUP 404 0x0000 //TX_POST_MASK_ADJUST 405 0x0014 //TX_NS_ENOISE_MIC0_TH -406 0x0014 //TX_MINENOISE_MIC0_TH +406 0x00DC //TX_MINENOISE_MIC0_TH 407 0x0226 //TX_MINENOISE_MIC0_S_TH 408 0x2879 //TX_MIN_G_CTRL_SSNS 409 0x0400 //TX_METAL_RTO_THR @@ -37356,16 +56592,16 @@ 511 0x6666 //TX_MIC_TO_BFGAIN 512 0x6666 //TX_MICTOBFGAIN0 513 0x0014 //TX_FASTMUE_TH -514 0x0000 //TX_DERVB_LEN_0 -515 0x0000 //TX_DERVB_LEN_1 -516 0x0000 //TX_RHO_DERVB -517 0x0000 //TX_MIC_INDX_DERVB -518 0x0000 //TX_MU_DERVB -519 0x0000 //TX_DR_RESRV_0 -520 0x0000 //TX_DR_RESRV_1 -521 0x0000 //TX_DR_RESRV_2 -522 0x0000 //TX_DR_RESRV_3 -523 0x0000 //TX_DR_RESRV_4 +514 0xC000 //TX_DEREVERB_LF_MU +515 0xC000 //TX_DEREVERB_HF_MU +516 0xCCCC //TX_DEREVERB_DELAY +517 0xD999 //TX_DEREVERB_COEF_LEN +518 0x1F40 //TX_DEREVERB_DNR +519 0x0000 //TX_DEREVERB_ALPHA +520 0x0000 //TX_DEREVERB_BETA +521 0x0000 //TX_GSC_RTOL_TH +522 0x7000 //TX_GSC_RTOH_TH +523 0x0064 //TX_WIDE2_MEANHTH 524 0x0000 //TX_DR_RESRV_5 525 0x0000 //TX_DR_RESRV_6 526 0x0000 //TX_DR_RESRV_7 @@ -37731,16 +56967,81 @@ 886 0x0000 //TX_FASTNS_TFMASKBIN_TH2 887 0x0000 //TX_FASTNS_TFMASKBIN_TH3 888 0x00C8 //TX_FASTNS_ARSPC_TH -889 0xD99A //TX_FASTNS_MASK5_TH +889 0xC000 //TX_FASTNS_MASK5_TH 890 0x051F //TX_POSTSSA_MIN_G_VR_MASK -891 0x7FFF //TX_A_LESSCUT_RTO_MASK +891 0x4000 //TX_A_LESSCUT_RTO_MASK 892 0x1770 //TX_FASTNS_NOISETH 893 0xC000 //TX_FASTNS_SSA_THLFL 894 0xC000 //TX_FASTNS_SSA_THHFL 895 0xCCCC //TX_FASTNS_SSA_THLFH 896 0xD999 //TX_FASTNS_SSA_THHFH +897 0x2339 //TX_SENDFUNC_REG_MICMUTE +898 0x0021 //TX_SENDFUNC_REG_MICMUTE1 +899 0x02BC //TX_MICMUTE_RATIO_THR +900 0x0140 //TX_MICMUTE_AMP_THR +901 0x0004 //TX_MICMUTE_HPF_IND +902 0x00C0 //TX_MICMUTE_LOG_EYR_TH +903 0x0008 //TX_MICMUTE_CVG_TIME +904 0x0008 //TX_MICMUTE_RELEASE_TIME +905 0x01FE //TX_MIC_VOLUME_MIC0MUTE +906 0x0020 //TX_MICMUTE_EPD_OFFSET_0 +907 0x001E //TX_MICMUTE_FRQ_AEC_L +908 0x7999 //TX_MICMUTE_EAD_THR +909 0x7FFF //TX_MICMUTE_LAMBDA_CB_NLE +910 0x7FFF //TX_MICMUTE_LAMBDA_RE_EST +911 0x4000 //TX_DTD_THR1_MICMUTE_0 +912 0x7000 //TX_DTD_THR1_MICMUTE_1 +913 0x7FFF //TX_DTD_THR1_MICMUTE_2 +914 0x7FFF //TX_DTD_THR1_MICMUTE_3 +915 0x6CCC //TX_DTD_THR2_MICMUTE_0 +916 0x0400 //TX_MICMUTE_MIN_EQ_RE_EST_0 +917 0x0400 //TX_MICMUTE_MIN_EQ_RE_EST_1 +918 0x1000 //TX_MICMUTE_MIN_EQ_RE_EST_2 +919 0x7FFF //TX_MICMUTE_MIN_EQ_RE_EST_3 +920 0x7FFF //TX_MICMUTE_MIN_EQ_RE_EST_4 +921 0x4000 //TX_MICMUTE_C_POST_FLT +922 0x03E8 //TX_MICMUTE_DT_CUT_K +923 0x0001 //TX_MICMUTE_DT_CUT_THR +924 0x03E8 //TX_MICMUTE_DT_CUT_K2 +925 0x0001 //TX_MICMUTE_DT_CUT_THR2 +926 0x0064 //TX_MICMUTE_DT2_HOLD_N +927 0x1000 //TX_MICMUTE_RATIODTH_THCUT +928 0x1000 //TX_MICMUTE_B_POST_FLT_ECHOL +929 0x7FFF //TX_MICMUTE_B_POST_FLT_ECHOH +930 0x0400 //TX_MICMUTE_C_POST_FLT_MASK +931 0x7999 //TX_MICMUTE_RATIODTL_CUT_TH +932 0x0258 //TX_MICMUTE_DT_CUT_K1 +933 0x0800 //TX_MICMUTE_N2_SN_EST +934 0xFC00 //TX_MICMUTE_THR_SN_EST_0 +935 0x001C //TX_MICMUTE_MIN_G_CTRL_0 +936 0x6000 //TX_MICMUTE_A_POST_FILT_S_0 +937 0x7000 //TX_MICMUTE_B_POST_FILT_0 +938 0x2710 //TX_MIC1RUB_AMP_THR +939 0x0010 //TX_MIC1MUTE_RATIO_THR +940 0x0450 //TX_MIC1MUTE_AMP_THR +941 0x0008 //TX_MIC1MUTE_CVG_TIME +942 0x0008 //TX_MIC1MUTE_RELEASE_TIME +943 0x0000 //TX_AMS_RESRV_01 +944 0x0000 //TX_AMS_RESRV_02 +945 0x0000 //TX_AMS_RESRV_03 +946 0x0000 //TX_AMS_RESRV_04 +947 0x0000 //TX_AMS_RESRV_05 +948 0x0000 //TX_AMS_RESRV_06 +949 0x0000 //TX_AMS_RESRV_07 +950 0x0000 //TX_AMS_RESRV_08 +951 0x0000 //TX_AMS_RESRV_09 +952 0x0000 //TX_AMS_RESRV_10 +953 0x0000 //TX_AMS_RESRV_11 +954 0x0000 //TX_AMS_RESRV_12 +955 0x0000 //TX_AMS_RESRV_13 +956 0x0000 //TX_AMS_RESRV_14 +957 0x0000 //TX_AMS_RESRV_15 +958 0x0000 //TX_AMS_RESRV_16 +959 0x0000 //TX_AMS_RESRV_17 +960 0x0000 //TX_AMS_RESRV_18 +961 0x0000 //TX_AMS_RESRV_19 #RX -0 0x027C //RX_RECVFUNC_MODE_0 +0 0x243C //RX_RECVFUNC_MODE_0 1 0x0000 //RX_RECVFUNC_MODE_1 2 0x0001 //RX_SAMPLINGFREQ_SIG 3 0x0001 //RX_SAMPLINGFREQ_PROC @@ -37750,7 +57051,7 @@ 7 0x6000 //RX_TDDRC_ALPHA_UP_2 8 0x6000 //RX_TDDRC_ALPHA_UP_3 9 0x1000 //RX_TDDRC_ALPHA_UP_4 -10 0x0800 //RX_PGA +10 0x0403 //RX_PGA 11 0x7B02 //RX_A_HP 12 0x4000 //RX_B_PE 13 0x7800 //RX_THR_PITCH_DET_0 @@ -37780,14 +57081,14 @@ 37 0x4000 //RX_LMT_ALPHA 38 0x001C //RX_FDEQ_SUBNUM 39 0x6868 //RX_FDEQ_GAIN_0 -40 0x6858 //RX_FDEQ_GAIN_1 -41 0x5858 //RX_FDEQ_GAIN_2 -42 0x5858 //RX_FDEQ_GAIN_3 +40 0x6864 //RX_FDEQ_GAIN_1 +41 0x7070 //RX_FDEQ_GAIN_2 +42 0x6058 //RX_FDEQ_GAIN_3 43 0x5C5C //RX_FDEQ_GAIN_4 -44 0x5854 //RX_FDEQ_GAIN_5 -45 0x544C //RX_FDEQ_GAIN_6 -46 0x4C4C //RX_FDEQ_GAIN_7 -47 0x4C60 //RX_FDEQ_GAIN_8 +44 0x8854 //RX_FDEQ_GAIN_5 +45 0x5448 //RX_FDEQ_GAIN_6 +46 0x4848 //RX_FDEQ_GAIN_7 +47 0x4860 //RX_FDEQ_GAIN_8 48 0x6068 //RX_FDEQ_GAIN_9 49 0x7070 //RX_FDEQ_GAIN_10 50 0x8070 //RX_FDEQ_GAIN_11 @@ -37864,12 +57165,12 @@ 121 0x199A //RX_TDDRC_HMNC_GAIN 122 0x0001 //RX_TDDRC_SMT_FLAG 123 0x0CCD //RX_TDDRC_SMT_W -124 0x06AF //RX_TDDRC_DRC_GAIN +124 0x0715 //RX_TDDRC_DRC_GAIN 125 0x7C00 //RX_LAMBDA_PKA_FP -126 0x2000 //RX_TPKA_FP -127 0x2000 //RX_MIN_G_FP -128 0x0080 //RX_MAX_G_FP -129 0x0014 //RX_SPK_VOL +126 0x157C //RX_TPKA_FP +127 0x0400 //RX_MIN_G_FP +128 0x0800 //RX_MAX_G_FP +129 0x0100 //RX_SPK_VOL 130 0x0000 //RX_VOL_RESRV_0 131 0x0000 //RX_MAXLEVEL_CNG 132 0x3000 //RX_BWE_UV_TH @@ -37903,15 +57204,15 @@ 8 0x6000 //RX_TDDRC_ALPHA_UP_3 9 0x1000 //RX_TDDRC_ALPHA_UP_4 27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 -28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 -29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 -32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +28 0x4000 //RX_TDDRC_ALPHA_DWN_2 +29 0x4000 //RX_TDDRC_ALPHA_DWN_3 +32 0x4000 //RX_TDDRC_ALPHA_DWN_4 33 0x7214 //RX_TDDRC_LIMITER_THRD 34 0x0800 //RX_TDDRC_LIMITER_GAIN 112 0x0002 //RX_TDDRC_THRD_0 113 0x0004 //RX_TDDRC_THRD_1 -114 0x1C00 //RX_TDDRC_THRD_2 -115 0x1C00 //RX_TDDRC_THRD_3 +114 0x1800 //RX_TDDRC_THRD_2 +115 0x1800 //RX_TDDRC_THRD_3 116 0x7FFF //RX_TDDRC_SLANT_0 117 0x7FFF //RX_TDDRC_SLANT_1 118 0x6000 //RX_TDDRC_ALPHA_UP_0 @@ -37920,22 +57221,22 @@ 121 0x199A //RX_TDDRC_HMNC_GAIN 122 0x0001 //RX_TDDRC_SMT_FLAG 123 0x0CCD //RX_TDDRC_SMT_W -124 0x06AF //RX_TDDRC_DRC_GAIN +124 0x0780 //RX_TDDRC_DRC_GAIN 38 0x001C //RX_FDEQ_SUBNUM -39 0x6868 //RX_FDEQ_GAIN_0 -40 0x6858 //RX_FDEQ_GAIN_1 -41 0x5858 //RX_FDEQ_GAIN_2 -42 0x5858 //RX_FDEQ_GAIN_3 -43 0x5C5C //RX_FDEQ_GAIN_4 -44 0x5854 //RX_FDEQ_GAIN_5 -45 0x544C //RX_FDEQ_GAIN_6 -46 0x4C4C //RX_FDEQ_GAIN_7 -47 0x4C60 //RX_FDEQ_GAIN_8 -48 0x6068 //RX_FDEQ_GAIN_9 -49 0x7070 //RX_FDEQ_GAIN_10 -50 0x8070 //RX_FDEQ_GAIN_11 -51 0x6060 //RX_FDEQ_GAIN_12 -52 0x7070 //RX_FDEQ_GAIN_13 +39 0x5C5C //RX_FDEQ_GAIN_0 +40 0x5448 //RX_FDEQ_GAIN_1 +41 0x4848 //RX_FDEQ_GAIN_2 +42 0x4840 //RX_FDEQ_GAIN_3 +43 0x4848 //RX_FDEQ_GAIN_4 +44 0x6048 //RX_FDEQ_GAIN_5 +45 0x4C40 //RX_FDEQ_GAIN_6 +46 0x4038 //RX_FDEQ_GAIN_7 +47 0x3C48 //RX_FDEQ_GAIN_8 +48 0x545C //RX_FDEQ_GAIN_9 +49 0x6864 //RX_FDEQ_GAIN_10 +50 0x7058 //RX_FDEQ_GAIN_11 +51 0x443C //RX_FDEQ_GAIN_12 +52 0x3838 //RX_FDEQ_GAIN_13 53 0x4848 //RX_FDEQ_GAIN_14 54 0x4848 //RX_FDEQ_GAIN_15 55 0x4848 //RX_FDEQ_GAIN_16 @@ -37994,7 +57295,7 @@ 108 0x7FFF //RX_FDDRC_SLANT_1_2 109 0x7FFF //RX_FDDRC_SLANT_1_3 110 0x0000 //RX_FDDRC_RESRV_0 -129 0x0014 //RX_SPK_VOL +129 0x0011 //RX_SPK_VOL 130 0x0000 //RX_VOL_RESRV_0 #VOL 1 6 0x6000 //RX_TDDRC_ALPHA_UP_1 @@ -38002,15 +57303,15 @@ 8 0x6000 //RX_TDDRC_ALPHA_UP_3 9 0x1000 //RX_TDDRC_ALPHA_UP_4 27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 -28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 -29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 -32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +28 0x4000 //RX_TDDRC_ALPHA_DWN_2 +29 0x4000 //RX_TDDRC_ALPHA_DWN_3 +32 0x4000 //RX_TDDRC_ALPHA_DWN_4 33 0x7214 //RX_TDDRC_LIMITER_THRD 34 0x0800 //RX_TDDRC_LIMITER_GAIN 112 0x0002 //RX_TDDRC_THRD_0 113 0x0004 //RX_TDDRC_THRD_1 -114 0x1C00 //RX_TDDRC_THRD_2 -115 0x1C00 //RX_TDDRC_THRD_3 +114 0x1800 //RX_TDDRC_THRD_2 +115 0x1800 //RX_TDDRC_THRD_3 116 0x7FFF //RX_TDDRC_SLANT_0 117 0x7FFF //RX_TDDRC_SLANT_1 118 0x6000 //RX_TDDRC_ALPHA_UP_0 @@ -38019,22 +57320,22 @@ 121 0x199A //RX_TDDRC_HMNC_GAIN 122 0x0001 //RX_TDDRC_SMT_FLAG 123 0x0CCD //RX_TDDRC_SMT_W -124 0x06AF //RX_TDDRC_DRC_GAIN +124 0x0780 //RX_TDDRC_DRC_GAIN 38 0x001C //RX_FDEQ_SUBNUM -39 0x6868 //RX_FDEQ_GAIN_0 -40 0x6858 //RX_FDEQ_GAIN_1 -41 0x5858 //RX_FDEQ_GAIN_2 -42 0x5858 //RX_FDEQ_GAIN_3 -43 0x5C5C //RX_FDEQ_GAIN_4 -44 0x5854 //RX_FDEQ_GAIN_5 -45 0x544C //RX_FDEQ_GAIN_6 -46 0x4C4C //RX_FDEQ_GAIN_7 -47 0x4C60 //RX_FDEQ_GAIN_8 -48 0x6068 //RX_FDEQ_GAIN_9 -49 0x7070 //RX_FDEQ_GAIN_10 -50 0x8070 //RX_FDEQ_GAIN_11 -51 0x6060 //RX_FDEQ_GAIN_12 -52 0x7070 //RX_FDEQ_GAIN_13 +39 0x5C5C //RX_FDEQ_GAIN_0 +40 0x5448 //RX_FDEQ_GAIN_1 +41 0x4848 //RX_FDEQ_GAIN_2 +42 0x4840 //RX_FDEQ_GAIN_3 +43 0x4848 //RX_FDEQ_GAIN_4 +44 0x6048 //RX_FDEQ_GAIN_5 +45 0x4C40 //RX_FDEQ_GAIN_6 +46 0x4038 //RX_FDEQ_GAIN_7 +47 0x3C48 //RX_FDEQ_GAIN_8 +48 0x545C //RX_FDEQ_GAIN_9 +49 0x6864 //RX_FDEQ_GAIN_10 +50 0x7058 //RX_FDEQ_GAIN_11 +51 0x443C //RX_FDEQ_GAIN_12 +52 0x3838 //RX_FDEQ_GAIN_13 53 0x4848 //RX_FDEQ_GAIN_14 54 0x4848 //RX_FDEQ_GAIN_15 55 0x4848 //RX_FDEQ_GAIN_16 @@ -38093,7 +57394,7 @@ 108 0x7FFF //RX_FDDRC_SLANT_1_2 109 0x7FFF //RX_FDDRC_SLANT_1_3 110 0x0000 //RX_FDDRC_RESRV_0 -129 0x001A //RX_SPK_VOL +129 0x0019 //RX_SPK_VOL 130 0x0000 //RX_VOL_RESRV_0 #VOL 2 6 0x6000 //RX_TDDRC_ALPHA_UP_1 @@ -38101,15 +57402,15 @@ 8 0x6000 //RX_TDDRC_ALPHA_UP_3 9 0x1000 //RX_TDDRC_ALPHA_UP_4 27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 -28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 -29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 -32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +28 0x4000 //RX_TDDRC_ALPHA_DWN_2 +29 0x4000 //RX_TDDRC_ALPHA_DWN_3 +32 0x4000 //RX_TDDRC_ALPHA_DWN_4 33 0x7214 //RX_TDDRC_LIMITER_THRD 34 0x0800 //RX_TDDRC_LIMITER_GAIN 112 0x0002 //RX_TDDRC_THRD_0 113 0x0004 //RX_TDDRC_THRD_1 -114 0x1C00 //RX_TDDRC_THRD_2 -115 0x1C00 //RX_TDDRC_THRD_3 +114 0x1800 //RX_TDDRC_THRD_2 +115 0x1800 //RX_TDDRC_THRD_3 116 0x7FFF //RX_TDDRC_SLANT_0 117 0x7FFF //RX_TDDRC_SLANT_1 118 0x6000 //RX_TDDRC_ALPHA_UP_0 @@ -38118,22 +57419,22 @@ 121 0x199A //RX_TDDRC_HMNC_GAIN 122 0x0001 //RX_TDDRC_SMT_FLAG 123 0x0CCD //RX_TDDRC_SMT_W -124 0x06AF //RX_TDDRC_DRC_GAIN +124 0x0780 //RX_TDDRC_DRC_GAIN 38 0x001C //RX_FDEQ_SUBNUM -39 0x6868 //RX_FDEQ_GAIN_0 -40 0x6858 //RX_FDEQ_GAIN_1 -41 0x5858 //RX_FDEQ_GAIN_2 -42 0x5858 //RX_FDEQ_GAIN_3 -43 0x5C5C //RX_FDEQ_GAIN_4 -44 0x5854 //RX_FDEQ_GAIN_5 -45 0x544C //RX_FDEQ_GAIN_6 -46 0x4C4C //RX_FDEQ_GAIN_7 -47 0x4C60 //RX_FDEQ_GAIN_8 -48 0x6068 //RX_FDEQ_GAIN_9 -49 0x7070 //RX_FDEQ_GAIN_10 -50 0x8070 //RX_FDEQ_GAIN_11 -51 0x6060 //RX_FDEQ_GAIN_12 -52 0x7070 //RX_FDEQ_GAIN_13 +39 0x5C5C //RX_FDEQ_GAIN_0 +40 0x5448 //RX_FDEQ_GAIN_1 +41 0x4848 //RX_FDEQ_GAIN_2 +42 0x4840 //RX_FDEQ_GAIN_3 +43 0x4848 //RX_FDEQ_GAIN_4 +44 0x6048 //RX_FDEQ_GAIN_5 +45 0x4C40 //RX_FDEQ_GAIN_6 +46 0x4038 //RX_FDEQ_GAIN_7 +47 0x3C48 //RX_FDEQ_GAIN_8 +48 0x545C //RX_FDEQ_GAIN_9 +49 0x6864 //RX_FDEQ_GAIN_10 +50 0x7058 //RX_FDEQ_GAIN_11 +51 0x443C //RX_FDEQ_GAIN_12 +52 0x3838 //RX_FDEQ_GAIN_13 53 0x4848 //RX_FDEQ_GAIN_14 54 0x4848 //RX_FDEQ_GAIN_15 55 0x4848 //RX_FDEQ_GAIN_16 @@ -38192,7 +57493,7 @@ 108 0x7FFF //RX_FDDRC_SLANT_1_2 109 0x7FFF //RX_FDDRC_SLANT_1_3 110 0x0000 //RX_FDDRC_RESRV_0 -129 0x0026 //RX_SPK_VOL +129 0x0024 //RX_SPK_VOL 130 0x0000 //RX_VOL_RESRV_0 #VOL 3 6 0x6000 //RX_TDDRC_ALPHA_UP_1 @@ -38200,15 +57501,15 @@ 8 0x6000 //RX_TDDRC_ALPHA_UP_3 9 0x1000 //RX_TDDRC_ALPHA_UP_4 27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 -28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 -29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 -32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +28 0x4000 //RX_TDDRC_ALPHA_DWN_2 +29 0x4000 //RX_TDDRC_ALPHA_DWN_3 +32 0x4000 //RX_TDDRC_ALPHA_DWN_4 33 0x7214 //RX_TDDRC_LIMITER_THRD 34 0x0800 //RX_TDDRC_LIMITER_GAIN 112 0x0002 //RX_TDDRC_THRD_0 113 0x0004 //RX_TDDRC_THRD_1 -114 0x1C00 //RX_TDDRC_THRD_2 -115 0x1C00 //RX_TDDRC_THRD_3 +114 0x1800 //RX_TDDRC_THRD_2 +115 0x1800 //RX_TDDRC_THRD_3 116 0x7FFF //RX_TDDRC_SLANT_0 117 0x7FFF //RX_TDDRC_SLANT_1 118 0x6000 //RX_TDDRC_ALPHA_UP_0 @@ -38217,22 +57518,22 @@ 121 0x199A //RX_TDDRC_HMNC_GAIN 122 0x0001 //RX_TDDRC_SMT_FLAG 123 0x0CCD //RX_TDDRC_SMT_W -124 0x06AF //RX_TDDRC_DRC_GAIN +124 0x0780 //RX_TDDRC_DRC_GAIN 38 0x001C //RX_FDEQ_SUBNUM -39 0x6868 //RX_FDEQ_GAIN_0 -40 0x6858 //RX_FDEQ_GAIN_1 -41 0x5858 //RX_FDEQ_GAIN_2 -42 0x5858 //RX_FDEQ_GAIN_3 -43 0x5C5C //RX_FDEQ_GAIN_4 -44 0x5854 //RX_FDEQ_GAIN_5 -45 0x544C //RX_FDEQ_GAIN_6 -46 0x4C4C //RX_FDEQ_GAIN_7 -47 0x4C60 //RX_FDEQ_GAIN_8 -48 0x6068 //RX_FDEQ_GAIN_9 -49 0x7070 //RX_FDEQ_GAIN_10 -50 0x8070 //RX_FDEQ_GAIN_11 -51 0x6060 //RX_FDEQ_GAIN_12 -52 0x7070 //RX_FDEQ_GAIN_13 +39 0x5C5C //RX_FDEQ_GAIN_0 +40 0x5448 //RX_FDEQ_GAIN_1 +41 0x4848 //RX_FDEQ_GAIN_2 +42 0x4840 //RX_FDEQ_GAIN_3 +43 0x4848 //RX_FDEQ_GAIN_4 +44 0x6048 //RX_FDEQ_GAIN_5 +45 0x4C40 //RX_FDEQ_GAIN_6 +46 0x4038 //RX_FDEQ_GAIN_7 +47 0x3C48 //RX_FDEQ_GAIN_8 +48 0x545C //RX_FDEQ_GAIN_9 +49 0x6864 //RX_FDEQ_GAIN_10 +50 0x7058 //RX_FDEQ_GAIN_11 +51 0x443C //RX_FDEQ_GAIN_12 +52 0x3838 //RX_FDEQ_GAIN_13 53 0x4848 //RX_FDEQ_GAIN_14 54 0x4848 //RX_FDEQ_GAIN_15 55 0x4848 //RX_FDEQ_GAIN_16 @@ -38291,7 +57592,7 @@ 108 0x7FFF //RX_FDDRC_SLANT_1_2 109 0x7FFF //RX_FDDRC_SLANT_1_3 110 0x0000 //RX_FDDRC_RESRV_0 -129 0x0035 //RX_SPK_VOL +129 0x0034 //RX_SPK_VOL 130 0x0000 //RX_VOL_RESRV_0 #VOL 4 6 0x6000 //RX_TDDRC_ALPHA_UP_1 @@ -38299,15 +57600,15 @@ 8 0x6000 //RX_TDDRC_ALPHA_UP_3 9 0x1000 //RX_TDDRC_ALPHA_UP_4 27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 -28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 -29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 -32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +28 0x4000 //RX_TDDRC_ALPHA_DWN_2 +29 0x4000 //RX_TDDRC_ALPHA_DWN_3 +32 0x4000 //RX_TDDRC_ALPHA_DWN_4 33 0x7214 //RX_TDDRC_LIMITER_THRD 34 0x0800 //RX_TDDRC_LIMITER_GAIN 112 0x0002 //RX_TDDRC_THRD_0 113 0x0004 //RX_TDDRC_THRD_1 -114 0x1C00 //RX_TDDRC_THRD_2 -115 0x1C00 //RX_TDDRC_THRD_3 +114 0x1800 //RX_TDDRC_THRD_2 +115 0x1800 //RX_TDDRC_THRD_3 116 0x7FFF //RX_TDDRC_SLANT_0 117 0x7FFF //RX_TDDRC_SLANT_1 118 0x6000 //RX_TDDRC_ALPHA_UP_0 @@ -38316,22 +57617,22 @@ 121 0x199A //RX_TDDRC_HMNC_GAIN 122 0x0001 //RX_TDDRC_SMT_FLAG 123 0x0CCD //RX_TDDRC_SMT_W -124 0x06AF //RX_TDDRC_DRC_GAIN +124 0x0B39 //RX_TDDRC_DRC_GAIN 38 0x001C //RX_FDEQ_SUBNUM -39 0x7878 //RX_FDEQ_GAIN_0 -40 0x786C //RX_FDEQ_GAIN_1 -41 0x6C6C //RX_FDEQ_GAIN_2 -42 0x6262 //RX_FDEQ_GAIN_3 -43 0x5A60 //RX_FDEQ_GAIN_4 -44 0x7A54 //RX_FDEQ_GAIN_5 -45 0x5448 //RX_FDEQ_GAIN_6 -46 0x4848 //RX_FDEQ_GAIN_7 -47 0x4860 //RX_FDEQ_GAIN_8 +39 0x6868 //RX_FDEQ_GAIN_0 +40 0x685C //RX_FDEQ_GAIN_1 +41 0x6868 //RX_FDEQ_GAIN_2 +42 0x544C //RX_FDEQ_GAIN_3 +43 0x4C54 //RX_FDEQ_GAIN_4 +44 0x704C //RX_FDEQ_GAIN_5 +45 0x4C40 //RX_FDEQ_GAIN_6 +46 0x4040 //RX_FDEQ_GAIN_7 +47 0x445C //RX_FDEQ_GAIN_8 48 0x6068 //RX_FDEQ_GAIN_9 49 0x7070 //RX_FDEQ_GAIN_10 -50 0x8070 //RX_FDEQ_GAIN_11 +50 0x7C74 //RX_FDEQ_GAIN_11 51 0x6060 //RX_FDEQ_GAIN_12 -52 0x7070 //RX_FDEQ_GAIN_13 +52 0x6C6C //RX_FDEQ_GAIN_13 53 0x4848 //RX_FDEQ_GAIN_14 54 0x4848 //RX_FDEQ_GAIN_15 55 0x4848 //RX_FDEQ_GAIN_16 @@ -38390,7 +57691,7 @@ 108 0x7FFF //RX_FDDRC_SLANT_1_2 109 0x7FFF //RX_FDDRC_SLANT_1_3 110 0x0000 //RX_FDDRC_RESRV_0 -129 0x0058 //RX_SPK_VOL +129 0x0038 //RX_SPK_VOL 130 0x0000 //RX_VOL_RESRV_0 #VOL 5 6 0x6000 //RX_TDDRC_ALPHA_UP_1 @@ -38398,15 +57699,15 @@ 8 0x6000 //RX_TDDRC_ALPHA_UP_3 9 0x1000 //RX_TDDRC_ALPHA_UP_4 27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 -28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 -29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 -32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +28 0x4000 //RX_TDDRC_ALPHA_DWN_2 +29 0x4000 //RX_TDDRC_ALPHA_DWN_3 +32 0x4000 //RX_TDDRC_ALPHA_DWN_4 33 0x7214 //RX_TDDRC_LIMITER_THRD 34 0x0800 //RX_TDDRC_LIMITER_GAIN 112 0x0002 //RX_TDDRC_THRD_0 113 0x0004 //RX_TDDRC_THRD_1 -114 0x1C00 //RX_TDDRC_THRD_2 -115 0x1C00 //RX_TDDRC_THRD_3 +114 0x1800 //RX_TDDRC_THRD_2 +115 0x1800 //RX_TDDRC_THRD_3 116 0x7FFF //RX_TDDRC_SLANT_0 117 0x7FFF //RX_TDDRC_SLANT_1 118 0x6000 //RX_TDDRC_ALPHA_UP_0 @@ -38415,22 +57716,22 @@ 121 0x199A //RX_TDDRC_HMNC_GAIN 122 0x0001 //RX_TDDRC_SMT_FLAG 123 0x0CCD //RX_TDDRC_SMT_W -124 0x06AF //RX_TDDRC_DRC_GAIN +124 0x0B39 //RX_TDDRC_DRC_GAIN 38 0x001C //RX_FDEQ_SUBNUM -39 0x7878 //RX_FDEQ_GAIN_0 -40 0x786C //RX_FDEQ_GAIN_1 -41 0x6C6C //RX_FDEQ_GAIN_2 -42 0x6262 //RX_FDEQ_GAIN_3 -43 0x5A60 //RX_FDEQ_GAIN_4 -44 0x7A54 //RX_FDEQ_GAIN_5 -45 0x5448 //RX_FDEQ_GAIN_6 -46 0x4848 //RX_FDEQ_GAIN_7 -47 0x4860 //RX_FDEQ_GAIN_8 +39 0x6868 //RX_FDEQ_GAIN_0 +40 0x685C //RX_FDEQ_GAIN_1 +41 0x6868 //RX_FDEQ_GAIN_2 +42 0x544C //RX_FDEQ_GAIN_3 +43 0x4C54 //RX_FDEQ_GAIN_4 +44 0x704C //RX_FDEQ_GAIN_5 +45 0x4C40 //RX_FDEQ_GAIN_6 +46 0x4040 //RX_FDEQ_GAIN_7 +47 0x445C //RX_FDEQ_GAIN_8 48 0x6068 //RX_FDEQ_GAIN_9 49 0x7070 //RX_FDEQ_GAIN_10 -50 0x8070 //RX_FDEQ_GAIN_11 +50 0x7C74 //RX_FDEQ_GAIN_11 51 0x6060 //RX_FDEQ_GAIN_12 -52 0x7070 //RX_FDEQ_GAIN_13 +52 0x6C6C //RX_FDEQ_GAIN_13 53 0x4848 //RX_FDEQ_GAIN_14 54 0x4848 //RX_FDEQ_GAIN_15 55 0x4848 //RX_FDEQ_GAIN_16 @@ -38489,7 +57790,7 @@ 108 0x7FFF //RX_FDDRC_SLANT_1_2 109 0x7FFF //RX_FDDRC_SLANT_1_3 110 0x0000 //RX_FDDRC_RESRV_0 -129 0x0085 //RX_SPK_VOL +129 0x0060 //RX_SPK_VOL 130 0x0000 //RX_VOL_RESRV_0 #VOL 6 6 0x6000 //RX_TDDRC_ALPHA_UP_1 @@ -38497,15 +57798,15 @@ 8 0x6000 //RX_TDDRC_ALPHA_UP_3 9 0x1000 //RX_TDDRC_ALPHA_UP_4 27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 -28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 -29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 -32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +28 0x4000 //RX_TDDRC_ALPHA_DWN_2 +29 0x4000 //RX_TDDRC_ALPHA_DWN_3 +32 0x4000 //RX_TDDRC_ALPHA_DWN_4 33 0x7214 //RX_TDDRC_LIMITER_THRD 34 0x0800 //RX_TDDRC_LIMITER_GAIN 112 0x0002 //RX_TDDRC_THRD_0 113 0x0004 //RX_TDDRC_THRD_1 -114 0x1C00 //RX_TDDRC_THRD_2 -115 0x1C00 //RX_TDDRC_THRD_3 +114 0x1800 //RX_TDDRC_THRD_2 +115 0x1800 //RX_TDDRC_THRD_3 116 0x7FFF //RX_TDDRC_SLANT_0 117 0x7FFF //RX_TDDRC_SLANT_1 118 0x6000 //RX_TDDRC_ALPHA_UP_0 @@ -38514,22 +57815,22 @@ 121 0x199A //RX_TDDRC_HMNC_GAIN 122 0x0001 //RX_TDDRC_SMT_FLAG 123 0x0CCD //RX_TDDRC_SMT_W -124 0x06AF //RX_TDDRC_DRC_GAIN +124 0x0B39 //RX_TDDRC_DRC_GAIN 38 0x001C //RX_FDEQ_SUBNUM -39 0x7878 //RX_FDEQ_GAIN_0 -40 0x786C //RX_FDEQ_GAIN_1 -41 0x6C6C //RX_FDEQ_GAIN_2 -42 0x6262 //RX_FDEQ_GAIN_3 -43 0x5A60 //RX_FDEQ_GAIN_4 -44 0x7A54 //RX_FDEQ_GAIN_5 -45 0x5448 //RX_FDEQ_GAIN_6 -46 0x4848 //RX_FDEQ_GAIN_7 -47 0x4860 //RX_FDEQ_GAIN_8 +39 0x6868 //RX_FDEQ_GAIN_0 +40 0x685C //RX_FDEQ_GAIN_1 +41 0x6868 //RX_FDEQ_GAIN_2 +42 0x544C //RX_FDEQ_GAIN_3 +43 0x4C54 //RX_FDEQ_GAIN_4 +44 0x704C //RX_FDEQ_GAIN_5 +45 0x4C40 //RX_FDEQ_GAIN_6 +46 0x4040 //RX_FDEQ_GAIN_7 +47 0x445C //RX_FDEQ_GAIN_8 48 0x6068 //RX_FDEQ_GAIN_9 49 0x7070 //RX_FDEQ_GAIN_10 -50 0x8070 //RX_FDEQ_GAIN_11 +50 0x7C74 //RX_FDEQ_GAIN_11 51 0x6060 //RX_FDEQ_GAIN_12 -52 0x7070 //RX_FDEQ_GAIN_13 +52 0x6C6C //RX_FDEQ_GAIN_13 53 0x4848 //RX_FDEQ_GAIN_14 54 0x4848 //RX_FDEQ_GAIN_15 55 0x4848 //RX_FDEQ_GAIN_16 @@ -38590,11 +57891,862 @@ 110 0x0000 //RX_FDDRC_RESRV_0 129 0x0100 //RX_SPK_VOL 130 0x0000 //RX_VOL_RESRV_0 +#RX 2 +157 0x243C //RX_RECVFUNC_MODE_0 +158 0x0000 //RX_RECVFUNC_MODE_1 +159 0x0001 //RX_SAMPLINGFREQ_SIG +160 0x0001 //RX_SAMPLINGFREQ_PROC +161 0x000A //RX_FRAME_SZ +162 0x0000 //RX_DELAY_OPT +163 0x6000 //RX_TDDRC_ALPHA_UP_1 +164 0x6000 //RX_TDDRC_ALPHA_UP_2 +165 0x6000 //RX_TDDRC_ALPHA_UP_3 +166 0x1000 //RX_TDDRC_ALPHA_UP_4 +167 0x0403 //RX_PGA +168 0x7B02 //RX_A_HP +169 0x4000 //RX_B_PE +170 0x7800 //RX_THR_PITCH_DET_0 +171 0x7000 //RX_THR_PITCH_DET_1 +172 0x6000 //RX_THR_PITCH_DET_2 +173 0x0008 //RX_PITCH_BFR_LEN +174 0x0003 //RX_SBD_PITCH_DET +175 0x0100 //RX_PP_RESRV_0 +176 0x0020 //RX_PP_RESRV_1 +177 0x0400 //RX_N_SN_EST +178 0x000C //RX_N2_SN_EST +179 0x0010 //RX_NS_LVL_CTRL +180 0xF800 //RX_THR_SN_EST +181 0x7E00 //RX_LAMBDA_PFILT +182 0x000A //RX_FENS_RESRV_0 +183 0x0190 //RX_FENS_RESRV_1 +184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +187 0x0002 //RX_EXTRA_NS_L +188 0x0800 //RX_EXTRA_NS_A +189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +190 0x7214 //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +192 0x199A //RX_A_POST_FLT +193 0x0000 //RX_LMT_THRD +194 0x4000 //RX_LMT_ALPHA +195 0x001C //RX_FDEQ_SUBNUM +196 0x6868 //RX_FDEQ_GAIN_0 +197 0x6864 //RX_FDEQ_GAIN_1 +198 0x7070 //RX_FDEQ_GAIN_2 +199 0x6058 //RX_FDEQ_GAIN_3 +200 0x5C5C //RX_FDEQ_GAIN_4 +201 0x8854 //RX_FDEQ_GAIN_5 +202 0x5448 //RX_FDEQ_GAIN_6 +203 0x4848 //RX_FDEQ_GAIN_7 +204 0x4860 //RX_FDEQ_GAIN_8 +205 0x6068 //RX_FDEQ_GAIN_9 +206 0x7070 //RX_FDEQ_GAIN_10 +207 0x8070 //RX_FDEQ_GAIN_11 +208 0x6060 //RX_FDEQ_GAIN_12 +209 0x7070 //RX_FDEQ_GAIN_13 +210 0x4848 //RX_FDEQ_GAIN_14 +211 0x4848 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0202 //RX_FDEQ_BIN_0 +221 0x0203 //RX_FDEQ_BIN_1 +222 0x0303 //RX_FDEQ_BIN_2 +223 0x0304 //RX_FDEQ_BIN_3 +224 0x0404 //RX_FDEQ_BIN_4 +225 0x0204 //RX_FDEQ_BIN_5 +226 0x0A0A //RX_FDEQ_BIN_6 +227 0x0A0A //RX_FDEQ_BIN_7 +228 0x0B0C //RX_FDEQ_BIN_8 +229 0x0D0E //RX_FDEQ_BIN_9 +230 0x0E0F //RX_FDEQ_BIN_10 +231 0x0F10 //RX_FDEQ_BIN_11 +232 0x1011 //RX_FDEQ_BIN_12 +233 0x1104 //RX_FDEQ_BIN_13 +234 0x0000 //RX_FDEQ_BIN_14 +235 0x0000 //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x4000 //RX_FDEQ_RESRV_0 +245 0x0320 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0035 //RX_FDDRC_BAND_MARGIN_1 +248 0x00D5 //RX_FDDRC_BAND_MARGIN_2 +249 0x0120 //RX_FDDRC_BAND_MARGIN_3 +250 0x0004 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x2000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x2000 //RX_FDDRC_THRD_3_2 +258 0x5000 //RX_FDDRC_THRD_3_3 +259 0x4000 //RX_FDDRC_SLANT_0_0 +260 0x4000 //RX_FDDRC_SLANT_0_1 +261 0x4000 //RX_FDDRC_SLANT_0_2 +262 0x4000 //RX_FDDRC_SLANT_0_3 +263 0x7FFF //RX_FDDRC_SLANT_1_0 +264 0x7FFF //RX_FDDRC_SLANT_1_1 +265 0x7FFF //RX_FDDRC_SLANT_1_2 +266 0x7FFF //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +268 0x0002 //RX_FILTINDX +269 0x0002 //RX_TDDRC_THRD_0 +270 0x0004 //RX_TDDRC_THRD_1 +271 0x1C00 //RX_TDDRC_THRD_2 +272 0x1C00 //RX_TDDRC_THRD_3 +273 0x7FFF //RX_TDDRC_SLANT_0 +274 0x7FFF //RX_TDDRC_SLANT_1 +275 0x6000 //RX_TDDRC_ALPHA_UP_0 +276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x199A //RX_TDDRC_HMNC_GAIN +279 0x0001 //RX_TDDRC_SMT_FLAG +280 0x0CCD //RX_TDDRC_SMT_W +281 0x0715 //RX_TDDRC_DRC_GAIN +282 0x7C00 //RX_LAMBDA_PKA_FP +283 0x157C //RX_TPKA_FP +284 0x0400 //RX_MIN_G_FP +285 0x0800 //RX_MAX_G_FP +286 0x0100 //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 +288 0x0000 //RX_MAXLEVEL_CNG +289 0x3000 //RX_BWE_UV_TH +290 0x3000 //RX_BWE_UV_TH2 +291 0x1800 //RX_BWE_UV_TH3 +292 0x1000 //RX_BWE_V_TH +293 0x04CD //RX_BWE_GAIN1_V_TH1 +294 0x0F33 //RX_BWE_GAIN1_V_TH2 +295 0x7333 //RX_BWE_UV_EQ +296 0x199A //RX_BWE_V_EQ +297 0x7333 //RX_BWE_TONE_TH +298 0x0004 //RX_BWE_UV_HOLD_T +299 0x6CCD //RX_BWE_GAIN2_ALPHA +300 0x799A //RX_BWE_GAIN3_ALPHA +301 0x001E //RX_BWE_CUTOFF +302 0x3000 //RX_BWE_GAINFILL +303 0x3200 //RX_BWE_MAXTH_TONE +304 0x2000 //RX_BWE_EQ_0 +305 0x2000 //RX_BWE_EQ_1 +306 0x2000 //RX_BWE_EQ_2 +307 0x2000 //RX_BWE_EQ_3 +308 0x2000 //RX_BWE_EQ_4 +309 0x2000 //RX_BWE_EQ_5 +310 0x2000 //RX_BWE_EQ_6 +311 0x0000 //RX_BWE_RESRV_0 +312 0x0000 //RX_BWE_RESRV_1 +313 0x0000 //RX_BWE_RESRV_2 +#VOL 0 +163 0x6000 //RX_TDDRC_ALPHA_UP_1 +164 0x6000 //RX_TDDRC_ALPHA_UP_2 +165 0x6000 //RX_TDDRC_ALPHA_UP_3 +166 0x1000 //RX_TDDRC_ALPHA_UP_4 +184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +185 0x4000 //RX_TDDRC_ALPHA_DWN_2 +186 0x4000 //RX_TDDRC_ALPHA_DWN_3 +189 0x4000 //RX_TDDRC_ALPHA_DWN_4 +190 0x7214 //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +269 0x0002 //RX_TDDRC_THRD_0 +270 0x0004 //RX_TDDRC_THRD_1 +271 0x1800 //RX_TDDRC_THRD_2 +272 0x1800 //RX_TDDRC_THRD_3 +273 0x7FFF //RX_TDDRC_SLANT_0 +274 0x7FFF //RX_TDDRC_SLANT_1 +275 0x6000 //RX_TDDRC_ALPHA_UP_0 +276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x199A //RX_TDDRC_HMNC_GAIN +279 0x0001 //RX_TDDRC_SMT_FLAG +280 0x0CCD //RX_TDDRC_SMT_W +281 0x0780 //RX_TDDRC_DRC_GAIN +195 0x001C //RX_FDEQ_SUBNUM +196 0x5C5C //RX_FDEQ_GAIN_0 +197 0x5448 //RX_FDEQ_GAIN_1 +198 0x4848 //RX_FDEQ_GAIN_2 +199 0x4840 //RX_FDEQ_GAIN_3 +200 0x4848 //RX_FDEQ_GAIN_4 +201 0x6048 //RX_FDEQ_GAIN_5 +202 0x4C40 //RX_FDEQ_GAIN_6 +203 0x4038 //RX_FDEQ_GAIN_7 +204 0x3C48 //RX_FDEQ_GAIN_8 +205 0x545C //RX_FDEQ_GAIN_9 +206 0x6864 //RX_FDEQ_GAIN_10 +207 0x7058 //RX_FDEQ_GAIN_11 +208 0x443C //RX_FDEQ_GAIN_12 +209 0x3838 //RX_FDEQ_GAIN_13 +210 0x4848 //RX_FDEQ_GAIN_14 +211 0x4848 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0202 //RX_FDEQ_BIN_0 +221 0x0203 //RX_FDEQ_BIN_1 +222 0x0303 //RX_FDEQ_BIN_2 +223 0x0304 //RX_FDEQ_BIN_3 +224 0x0404 //RX_FDEQ_BIN_4 +225 0x0204 //RX_FDEQ_BIN_5 +226 0x0A0A //RX_FDEQ_BIN_6 +227 0x0A0A //RX_FDEQ_BIN_7 +228 0x0B0C //RX_FDEQ_BIN_8 +229 0x0D0E //RX_FDEQ_BIN_9 +230 0x0E0F //RX_FDEQ_BIN_10 +231 0x0F10 //RX_FDEQ_BIN_11 +232 0x1011 //RX_FDEQ_BIN_12 +233 0x1104 //RX_FDEQ_BIN_13 +234 0x0000 //RX_FDEQ_BIN_14 +235 0x0000 //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x4000 //RX_FDEQ_RESRV_0 +245 0x0320 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0035 //RX_FDDRC_BAND_MARGIN_1 +248 0x00D5 //RX_FDDRC_BAND_MARGIN_2 +249 0x0120 //RX_FDDRC_BAND_MARGIN_3 +250 0x0004 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x2000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x2000 //RX_FDDRC_THRD_3_2 +258 0x5000 //RX_FDDRC_THRD_3_3 +259 0x4000 //RX_FDDRC_SLANT_0_0 +260 0x4000 //RX_FDDRC_SLANT_0_1 +261 0x4000 //RX_FDDRC_SLANT_0_2 +262 0x4000 //RX_FDDRC_SLANT_0_3 +263 0x7FFF //RX_FDDRC_SLANT_1_0 +264 0x7FFF //RX_FDDRC_SLANT_1_1 +265 0x7FFF //RX_FDDRC_SLANT_1_2 +266 0x7FFF //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +286 0x0011 //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 +#VOL 1 +163 0x6000 //RX_TDDRC_ALPHA_UP_1 +164 0x6000 //RX_TDDRC_ALPHA_UP_2 +165 0x6000 //RX_TDDRC_ALPHA_UP_3 +166 0x1000 //RX_TDDRC_ALPHA_UP_4 +184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +185 0x4000 //RX_TDDRC_ALPHA_DWN_2 +186 0x4000 //RX_TDDRC_ALPHA_DWN_3 +189 0x4000 //RX_TDDRC_ALPHA_DWN_4 +190 0x7214 //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +269 0x0002 //RX_TDDRC_THRD_0 +270 0x0004 //RX_TDDRC_THRD_1 +271 0x1800 //RX_TDDRC_THRD_2 +272 0x1800 //RX_TDDRC_THRD_3 +273 0x7FFF //RX_TDDRC_SLANT_0 +274 0x7FFF //RX_TDDRC_SLANT_1 +275 0x6000 //RX_TDDRC_ALPHA_UP_0 +276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x199A //RX_TDDRC_HMNC_GAIN +279 0x0001 //RX_TDDRC_SMT_FLAG +280 0x0CCD //RX_TDDRC_SMT_W +281 0x0780 //RX_TDDRC_DRC_GAIN +195 0x001C //RX_FDEQ_SUBNUM +196 0x5C5C //RX_FDEQ_GAIN_0 +197 0x5448 //RX_FDEQ_GAIN_1 +198 0x4848 //RX_FDEQ_GAIN_2 +199 0x4840 //RX_FDEQ_GAIN_3 +200 0x4848 //RX_FDEQ_GAIN_4 +201 0x6048 //RX_FDEQ_GAIN_5 +202 0x4C40 //RX_FDEQ_GAIN_6 +203 0x4038 //RX_FDEQ_GAIN_7 +204 0x3C48 //RX_FDEQ_GAIN_8 +205 0x545C //RX_FDEQ_GAIN_9 +206 0x6864 //RX_FDEQ_GAIN_10 +207 0x7058 //RX_FDEQ_GAIN_11 +208 0x443C //RX_FDEQ_GAIN_12 +209 0x3838 //RX_FDEQ_GAIN_13 +210 0x4848 //RX_FDEQ_GAIN_14 +211 0x4848 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0202 //RX_FDEQ_BIN_0 +221 0x0203 //RX_FDEQ_BIN_1 +222 0x0303 //RX_FDEQ_BIN_2 +223 0x0304 //RX_FDEQ_BIN_3 +224 0x0404 //RX_FDEQ_BIN_4 +225 0x0204 //RX_FDEQ_BIN_5 +226 0x0A0A //RX_FDEQ_BIN_6 +227 0x0A0A //RX_FDEQ_BIN_7 +228 0x0B0C //RX_FDEQ_BIN_8 +229 0x0D0E //RX_FDEQ_BIN_9 +230 0x0E0F //RX_FDEQ_BIN_10 +231 0x0F10 //RX_FDEQ_BIN_11 +232 0x1011 //RX_FDEQ_BIN_12 +233 0x1104 //RX_FDEQ_BIN_13 +234 0x0000 //RX_FDEQ_BIN_14 +235 0x0000 //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x4000 //RX_FDEQ_RESRV_0 +245 0x0320 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0035 //RX_FDDRC_BAND_MARGIN_1 +248 0x00D5 //RX_FDDRC_BAND_MARGIN_2 +249 0x0120 //RX_FDDRC_BAND_MARGIN_3 +250 0x0004 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x2000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x2000 //RX_FDDRC_THRD_3_2 +258 0x5000 //RX_FDDRC_THRD_3_3 +259 0x4000 //RX_FDDRC_SLANT_0_0 +260 0x4000 //RX_FDDRC_SLANT_0_1 +261 0x4000 //RX_FDDRC_SLANT_0_2 +262 0x4000 //RX_FDDRC_SLANT_0_3 +263 0x7FFF //RX_FDDRC_SLANT_1_0 +264 0x7FFF //RX_FDDRC_SLANT_1_1 +265 0x7FFF //RX_FDDRC_SLANT_1_2 +266 0x7FFF //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +286 0x0019 //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 +#VOL 2 +163 0x6000 //RX_TDDRC_ALPHA_UP_1 +164 0x6000 //RX_TDDRC_ALPHA_UP_2 +165 0x6000 //RX_TDDRC_ALPHA_UP_3 +166 0x1000 //RX_TDDRC_ALPHA_UP_4 +184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +185 0x4000 //RX_TDDRC_ALPHA_DWN_2 +186 0x4000 //RX_TDDRC_ALPHA_DWN_3 +189 0x4000 //RX_TDDRC_ALPHA_DWN_4 +190 0x7214 //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +269 0x0002 //RX_TDDRC_THRD_0 +270 0x0004 //RX_TDDRC_THRD_1 +271 0x1800 //RX_TDDRC_THRD_2 +272 0x1800 //RX_TDDRC_THRD_3 +273 0x7FFF //RX_TDDRC_SLANT_0 +274 0x7FFF //RX_TDDRC_SLANT_1 +275 0x6000 //RX_TDDRC_ALPHA_UP_0 +276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x199A //RX_TDDRC_HMNC_GAIN +279 0x0001 //RX_TDDRC_SMT_FLAG +280 0x0CCD //RX_TDDRC_SMT_W +281 0x0780 //RX_TDDRC_DRC_GAIN +195 0x001C //RX_FDEQ_SUBNUM +196 0x5C5C //RX_FDEQ_GAIN_0 +197 0x5448 //RX_FDEQ_GAIN_1 +198 0x4848 //RX_FDEQ_GAIN_2 +199 0x4840 //RX_FDEQ_GAIN_3 +200 0x4848 //RX_FDEQ_GAIN_4 +201 0x6048 //RX_FDEQ_GAIN_5 +202 0x4C40 //RX_FDEQ_GAIN_6 +203 0x4038 //RX_FDEQ_GAIN_7 +204 0x3C48 //RX_FDEQ_GAIN_8 +205 0x545C //RX_FDEQ_GAIN_9 +206 0x6864 //RX_FDEQ_GAIN_10 +207 0x7058 //RX_FDEQ_GAIN_11 +208 0x443C //RX_FDEQ_GAIN_12 +209 0x3838 //RX_FDEQ_GAIN_13 +210 0x4848 //RX_FDEQ_GAIN_14 +211 0x4848 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0202 //RX_FDEQ_BIN_0 +221 0x0203 //RX_FDEQ_BIN_1 +222 0x0303 //RX_FDEQ_BIN_2 +223 0x0304 //RX_FDEQ_BIN_3 +224 0x0404 //RX_FDEQ_BIN_4 +225 0x0204 //RX_FDEQ_BIN_5 +226 0x0A0A //RX_FDEQ_BIN_6 +227 0x0A0A //RX_FDEQ_BIN_7 +228 0x0B0C //RX_FDEQ_BIN_8 +229 0x0D0E //RX_FDEQ_BIN_9 +230 0x0E0F //RX_FDEQ_BIN_10 +231 0x0F10 //RX_FDEQ_BIN_11 +232 0x1011 //RX_FDEQ_BIN_12 +233 0x1104 //RX_FDEQ_BIN_13 +234 0x0000 //RX_FDEQ_BIN_14 +235 0x0000 //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x4000 //RX_FDEQ_RESRV_0 +245 0x0320 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0035 //RX_FDDRC_BAND_MARGIN_1 +248 0x00D5 //RX_FDDRC_BAND_MARGIN_2 +249 0x0120 //RX_FDDRC_BAND_MARGIN_3 +250 0x0004 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x2000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x2000 //RX_FDDRC_THRD_3_2 +258 0x5000 //RX_FDDRC_THRD_3_3 +259 0x4000 //RX_FDDRC_SLANT_0_0 +260 0x4000 //RX_FDDRC_SLANT_0_1 +261 0x4000 //RX_FDDRC_SLANT_0_2 +262 0x4000 //RX_FDDRC_SLANT_0_3 +263 0x7FFF //RX_FDDRC_SLANT_1_0 +264 0x7FFF //RX_FDDRC_SLANT_1_1 +265 0x7FFF //RX_FDDRC_SLANT_1_2 +266 0x7FFF //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +286 0x0024 //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 +#VOL 3 +163 0x6000 //RX_TDDRC_ALPHA_UP_1 +164 0x6000 //RX_TDDRC_ALPHA_UP_2 +165 0x6000 //RX_TDDRC_ALPHA_UP_3 +166 0x1000 //RX_TDDRC_ALPHA_UP_4 +184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +185 0x4000 //RX_TDDRC_ALPHA_DWN_2 +186 0x4000 //RX_TDDRC_ALPHA_DWN_3 +189 0x4000 //RX_TDDRC_ALPHA_DWN_4 +190 0x7214 //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +269 0x0002 //RX_TDDRC_THRD_0 +270 0x0004 //RX_TDDRC_THRD_1 +271 0x1800 //RX_TDDRC_THRD_2 +272 0x1800 //RX_TDDRC_THRD_3 +273 0x7FFF //RX_TDDRC_SLANT_0 +274 0x7FFF //RX_TDDRC_SLANT_1 +275 0x6000 //RX_TDDRC_ALPHA_UP_0 +276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x199A //RX_TDDRC_HMNC_GAIN +279 0x0001 //RX_TDDRC_SMT_FLAG +280 0x0CCD //RX_TDDRC_SMT_W +281 0x0780 //RX_TDDRC_DRC_GAIN +195 0x001C //RX_FDEQ_SUBNUM +196 0x5C5C //RX_FDEQ_GAIN_0 +197 0x5448 //RX_FDEQ_GAIN_1 +198 0x4848 //RX_FDEQ_GAIN_2 +199 0x4840 //RX_FDEQ_GAIN_3 +200 0x4848 //RX_FDEQ_GAIN_4 +201 0x6048 //RX_FDEQ_GAIN_5 +202 0x4C40 //RX_FDEQ_GAIN_6 +203 0x4038 //RX_FDEQ_GAIN_7 +204 0x3C48 //RX_FDEQ_GAIN_8 +205 0x545C //RX_FDEQ_GAIN_9 +206 0x6864 //RX_FDEQ_GAIN_10 +207 0x7058 //RX_FDEQ_GAIN_11 +208 0x443C //RX_FDEQ_GAIN_12 +209 0x3838 //RX_FDEQ_GAIN_13 +210 0x4848 //RX_FDEQ_GAIN_14 +211 0x4848 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0202 //RX_FDEQ_BIN_0 +221 0x0203 //RX_FDEQ_BIN_1 +222 0x0303 //RX_FDEQ_BIN_2 +223 0x0304 //RX_FDEQ_BIN_3 +224 0x0404 //RX_FDEQ_BIN_4 +225 0x0204 //RX_FDEQ_BIN_5 +226 0x0A0A //RX_FDEQ_BIN_6 +227 0x0A0A //RX_FDEQ_BIN_7 +228 0x0B0C //RX_FDEQ_BIN_8 +229 0x0D0E //RX_FDEQ_BIN_9 +230 0x0E0F //RX_FDEQ_BIN_10 +231 0x0F10 //RX_FDEQ_BIN_11 +232 0x1011 //RX_FDEQ_BIN_12 +233 0x1104 //RX_FDEQ_BIN_13 +234 0x0000 //RX_FDEQ_BIN_14 +235 0x0000 //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x4000 //RX_FDEQ_RESRV_0 +245 0x0320 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0035 //RX_FDDRC_BAND_MARGIN_1 +248 0x00D5 //RX_FDDRC_BAND_MARGIN_2 +249 0x0120 //RX_FDDRC_BAND_MARGIN_3 +250 0x0004 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x2000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x2000 //RX_FDDRC_THRD_3_2 +258 0x5000 //RX_FDDRC_THRD_3_3 +259 0x4000 //RX_FDDRC_SLANT_0_0 +260 0x4000 //RX_FDDRC_SLANT_0_1 +261 0x4000 //RX_FDDRC_SLANT_0_2 +262 0x4000 //RX_FDDRC_SLANT_0_3 +263 0x7FFF //RX_FDDRC_SLANT_1_0 +264 0x7FFF //RX_FDDRC_SLANT_1_1 +265 0x7FFF //RX_FDDRC_SLANT_1_2 +266 0x7FFF //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +286 0x0034 //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 +#VOL 4 +163 0x6000 //RX_TDDRC_ALPHA_UP_1 +164 0x6000 //RX_TDDRC_ALPHA_UP_2 +165 0x6000 //RX_TDDRC_ALPHA_UP_3 +166 0x1000 //RX_TDDRC_ALPHA_UP_4 +184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +185 0x4000 //RX_TDDRC_ALPHA_DWN_2 +186 0x4000 //RX_TDDRC_ALPHA_DWN_3 +189 0x4000 //RX_TDDRC_ALPHA_DWN_4 +190 0x7214 //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +269 0x0002 //RX_TDDRC_THRD_0 +270 0x0004 //RX_TDDRC_THRD_1 +271 0x1800 //RX_TDDRC_THRD_2 +272 0x1800 //RX_TDDRC_THRD_3 +273 0x7FFF //RX_TDDRC_SLANT_0 +274 0x7FFF //RX_TDDRC_SLANT_1 +275 0x6000 //RX_TDDRC_ALPHA_UP_0 +276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x199A //RX_TDDRC_HMNC_GAIN +279 0x0001 //RX_TDDRC_SMT_FLAG +280 0x0CCD //RX_TDDRC_SMT_W +281 0x0B39 //RX_TDDRC_DRC_GAIN +195 0x001C //RX_FDEQ_SUBNUM +196 0x6868 //RX_FDEQ_GAIN_0 +197 0x685C //RX_FDEQ_GAIN_1 +198 0x6868 //RX_FDEQ_GAIN_2 +199 0x544C //RX_FDEQ_GAIN_3 +200 0x4C54 //RX_FDEQ_GAIN_4 +201 0x704C //RX_FDEQ_GAIN_5 +202 0x4C40 //RX_FDEQ_GAIN_6 +203 0x4040 //RX_FDEQ_GAIN_7 +204 0x445C //RX_FDEQ_GAIN_8 +205 0x6068 //RX_FDEQ_GAIN_9 +206 0x7070 //RX_FDEQ_GAIN_10 +207 0x7C74 //RX_FDEQ_GAIN_11 +208 0x6060 //RX_FDEQ_GAIN_12 +209 0x6C6C //RX_FDEQ_GAIN_13 +210 0x4848 //RX_FDEQ_GAIN_14 +211 0x4848 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0202 //RX_FDEQ_BIN_0 +221 0x0203 //RX_FDEQ_BIN_1 +222 0x0303 //RX_FDEQ_BIN_2 +223 0x0304 //RX_FDEQ_BIN_3 +224 0x0404 //RX_FDEQ_BIN_4 +225 0x0204 //RX_FDEQ_BIN_5 +226 0x0A0A //RX_FDEQ_BIN_6 +227 0x0A0A //RX_FDEQ_BIN_7 +228 0x0B0C //RX_FDEQ_BIN_8 +229 0x0D0E //RX_FDEQ_BIN_9 +230 0x0E0F //RX_FDEQ_BIN_10 +231 0x0F10 //RX_FDEQ_BIN_11 +232 0x1011 //RX_FDEQ_BIN_12 +233 0x1104 //RX_FDEQ_BIN_13 +234 0x0000 //RX_FDEQ_BIN_14 +235 0x0000 //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x4000 //RX_FDEQ_RESRV_0 +245 0x0320 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0035 //RX_FDDRC_BAND_MARGIN_1 +248 0x00D5 //RX_FDDRC_BAND_MARGIN_2 +249 0x0120 //RX_FDDRC_BAND_MARGIN_3 +250 0x0004 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x2000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x2000 //RX_FDDRC_THRD_3_2 +258 0x5000 //RX_FDDRC_THRD_3_3 +259 0x4000 //RX_FDDRC_SLANT_0_0 +260 0x4000 //RX_FDDRC_SLANT_0_1 +261 0x4000 //RX_FDDRC_SLANT_0_2 +262 0x4000 //RX_FDDRC_SLANT_0_3 +263 0x7FFF //RX_FDDRC_SLANT_1_0 +264 0x7FFF //RX_FDDRC_SLANT_1_1 +265 0x7FFF //RX_FDDRC_SLANT_1_2 +266 0x7FFF //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +286 0x0038 //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 +#VOL 5 +163 0x6000 //RX_TDDRC_ALPHA_UP_1 +164 0x6000 //RX_TDDRC_ALPHA_UP_2 +165 0x6000 //RX_TDDRC_ALPHA_UP_3 +166 0x1000 //RX_TDDRC_ALPHA_UP_4 +184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +185 0x4000 //RX_TDDRC_ALPHA_DWN_2 +186 0x4000 //RX_TDDRC_ALPHA_DWN_3 +189 0x4000 //RX_TDDRC_ALPHA_DWN_4 +190 0x7214 //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +269 0x0002 //RX_TDDRC_THRD_0 +270 0x0004 //RX_TDDRC_THRD_1 +271 0x1800 //RX_TDDRC_THRD_2 +272 0x1800 //RX_TDDRC_THRD_3 +273 0x7FFF //RX_TDDRC_SLANT_0 +274 0x7FFF //RX_TDDRC_SLANT_1 +275 0x6000 //RX_TDDRC_ALPHA_UP_0 +276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x199A //RX_TDDRC_HMNC_GAIN +279 0x0001 //RX_TDDRC_SMT_FLAG +280 0x0CCD //RX_TDDRC_SMT_W +281 0x0B39 //RX_TDDRC_DRC_GAIN +195 0x001C //RX_FDEQ_SUBNUM +196 0x6868 //RX_FDEQ_GAIN_0 +197 0x685C //RX_FDEQ_GAIN_1 +198 0x6868 //RX_FDEQ_GAIN_2 +199 0x544C //RX_FDEQ_GAIN_3 +200 0x4C54 //RX_FDEQ_GAIN_4 +201 0x704C //RX_FDEQ_GAIN_5 +202 0x4C40 //RX_FDEQ_GAIN_6 +203 0x4040 //RX_FDEQ_GAIN_7 +204 0x445C //RX_FDEQ_GAIN_8 +205 0x6068 //RX_FDEQ_GAIN_9 +206 0x7070 //RX_FDEQ_GAIN_10 +207 0x7C74 //RX_FDEQ_GAIN_11 +208 0x6060 //RX_FDEQ_GAIN_12 +209 0x6C6C //RX_FDEQ_GAIN_13 +210 0x4848 //RX_FDEQ_GAIN_14 +211 0x4848 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0202 //RX_FDEQ_BIN_0 +221 0x0203 //RX_FDEQ_BIN_1 +222 0x0303 //RX_FDEQ_BIN_2 +223 0x0304 //RX_FDEQ_BIN_3 +224 0x0404 //RX_FDEQ_BIN_4 +225 0x0204 //RX_FDEQ_BIN_5 +226 0x0A0A //RX_FDEQ_BIN_6 +227 0x0A0A //RX_FDEQ_BIN_7 +228 0x0B0C //RX_FDEQ_BIN_8 +229 0x0D0E //RX_FDEQ_BIN_9 +230 0x0E0F //RX_FDEQ_BIN_10 +231 0x0F10 //RX_FDEQ_BIN_11 +232 0x1011 //RX_FDEQ_BIN_12 +233 0x1104 //RX_FDEQ_BIN_13 +234 0x0000 //RX_FDEQ_BIN_14 +235 0x0000 //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x4000 //RX_FDEQ_RESRV_0 +245 0x0320 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0035 //RX_FDDRC_BAND_MARGIN_1 +248 0x00D5 //RX_FDDRC_BAND_MARGIN_2 +249 0x0120 //RX_FDDRC_BAND_MARGIN_3 +250 0x0004 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x2000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x2000 //RX_FDDRC_THRD_3_2 +258 0x5000 //RX_FDDRC_THRD_3_3 +259 0x4000 //RX_FDDRC_SLANT_0_0 +260 0x4000 //RX_FDDRC_SLANT_0_1 +261 0x4000 //RX_FDDRC_SLANT_0_2 +262 0x4000 //RX_FDDRC_SLANT_0_3 +263 0x7FFF //RX_FDDRC_SLANT_1_0 +264 0x7FFF //RX_FDDRC_SLANT_1_1 +265 0x7FFF //RX_FDDRC_SLANT_1_2 +266 0x7FFF //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +286 0x0060 //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 +#VOL 6 +163 0x6000 //RX_TDDRC_ALPHA_UP_1 +164 0x6000 //RX_TDDRC_ALPHA_UP_2 +165 0x6000 //RX_TDDRC_ALPHA_UP_3 +166 0x1000 //RX_TDDRC_ALPHA_UP_4 +184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +185 0x4000 //RX_TDDRC_ALPHA_DWN_2 +186 0x4000 //RX_TDDRC_ALPHA_DWN_3 +189 0x4000 //RX_TDDRC_ALPHA_DWN_4 +190 0x7214 //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +269 0x0002 //RX_TDDRC_THRD_0 +270 0x0004 //RX_TDDRC_THRD_1 +271 0x1800 //RX_TDDRC_THRD_2 +272 0x1800 //RX_TDDRC_THRD_3 +273 0x7FFF //RX_TDDRC_SLANT_0 +274 0x7FFF //RX_TDDRC_SLANT_1 +275 0x6000 //RX_TDDRC_ALPHA_UP_0 +276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x199A //RX_TDDRC_HMNC_GAIN +279 0x0001 //RX_TDDRC_SMT_FLAG +280 0x0CCD //RX_TDDRC_SMT_W +281 0x0B39 //RX_TDDRC_DRC_GAIN +195 0x001C //RX_FDEQ_SUBNUM +196 0x6868 //RX_FDEQ_GAIN_0 +197 0x685C //RX_FDEQ_GAIN_1 +198 0x6868 //RX_FDEQ_GAIN_2 +199 0x544C //RX_FDEQ_GAIN_3 +200 0x4C54 //RX_FDEQ_GAIN_4 +201 0x704C //RX_FDEQ_GAIN_5 +202 0x4C40 //RX_FDEQ_GAIN_6 +203 0x4040 //RX_FDEQ_GAIN_7 +204 0x445C //RX_FDEQ_GAIN_8 +205 0x6068 //RX_FDEQ_GAIN_9 +206 0x7070 //RX_FDEQ_GAIN_10 +207 0x7C74 //RX_FDEQ_GAIN_11 +208 0x6060 //RX_FDEQ_GAIN_12 +209 0x6C6C //RX_FDEQ_GAIN_13 +210 0x4848 //RX_FDEQ_GAIN_14 +211 0x4848 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0202 //RX_FDEQ_BIN_0 +221 0x0203 //RX_FDEQ_BIN_1 +222 0x0303 //RX_FDEQ_BIN_2 +223 0x0304 //RX_FDEQ_BIN_3 +224 0x0404 //RX_FDEQ_BIN_4 +225 0x0204 //RX_FDEQ_BIN_5 +226 0x0A0A //RX_FDEQ_BIN_6 +227 0x0A0A //RX_FDEQ_BIN_7 +228 0x0B0C //RX_FDEQ_BIN_8 +229 0x0D0E //RX_FDEQ_BIN_9 +230 0x0E0F //RX_FDEQ_BIN_10 +231 0x0F10 //RX_FDEQ_BIN_11 +232 0x1011 //RX_FDEQ_BIN_12 +233 0x1104 //RX_FDEQ_BIN_13 +234 0x0000 //RX_FDEQ_BIN_14 +235 0x0000 //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x4000 //RX_FDEQ_RESRV_0 +245 0x0320 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0035 //RX_FDDRC_BAND_MARGIN_1 +248 0x00D5 //RX_FDDRC_BAND_MARGIN_2 +249 0x0120 //RX_FDDRC_BAND_MARGIN_3 +250 0x0004 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x2000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x2000 //RX_FDDRC_THRD_3_2 +258 0x5000 //RX_FDDRC_THRD_3_3 +259 0x4000 //RX_FDDRC_SLANT_0_0 +260 0x4000 //RX_FDDRC_SLANT_0_1 +261 0x4000 //RX_FDDRC_SLANT_0_2 +262 0x4000 //RX_FDDRC_SLANT_0_3 +263 0x7FFF //RX_FDDRC_SLANT_1_0 +264 0x7FFF //RX_FDDRC_SLANT_1_1 +265 0x7FFF //RX_FDDRC_SLANT_1_2 +266 0x7FFF //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +286 0x0100 //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 #CASE_NAME HEADSET-TTY_HCO-VOICE_GENERIC-SWB -#PARAM_MODE FULL -#PARAM_TYPE TX+RX -#TOTAL_CUSTOM_STEP 7 +#PARAM_MODE Full +#PARAM_TYPE TX+2RX +#TOTAL_CUSTOM_STEP 7+7 #TX 0 0x0001 //TX_OPERATION_MODE_0 1 0x0000 //TX_OPERATION_MODE_1 @@ -38838,7 +58990,7 @@ 239 0x0000 //TX_DT_RESRV_7 240 0x0000 //TX_DT_RESRV_8 241 0x0000 //TX_DT_RESRV_9 -242 0xF200 //TX_THR_SN_EST_0 +242 0xFA00 //TX_THR_SN_EST_0 243 0xF400 //TX_THR_SN_EST_1 244 0xF800 //TX_THR_SN_EST_2 245 0xF600 //TX_THR_SN_EST_3 @@ -38847,12 +58999,12 @@ 248 0xF800 //TX_THR_SN_EST_6 249 0xF800 //TX_THR_SN_EST_7 250 0x0100 //TX_DELTA_THR_SN_EST_0 -251 0x0000 //TX_DELTA_THR_SN_EST_1 +251 0x0100 //TX_DELTA_THR_SN_EST_1 252 0x0100 //TX_DELTA_THR_SN_EST_2 -253 0x0100 //TX_DELTA_THR_SN_EST_3 +253 0x0200 //TX_DELTA_THR_SN_EST_3 254 0x0200 //TX_DELTA_THR_SN_EST_4 255 0x0200 //TX_DELTA_THR_SN_EST_5 -256 0x0200 //TX_DELTA_THR_SN_EST_6 +256 0x0000 //TX_DELTA_THR_SN_EST_6 257 0x0200 //TX_DELTA_THR_SN_EST_7 258 0x4000 //TX_LAMBDA_NN_EST_0 259 0x4000 //TX_LAMBDA_NN_EST_1 @@ -38878,12 +59030,12 @@ 279 0x0000 //TX_B_POST_FLT_0 280 0x0000 //TX_B_POST_FLT_1 281 0x001A //TX_NS_LVL_CTRL_0 -282 0x001A //TX_NS_LVL_CTRL_1 +282 0x0014 //TX_NS_LVL_CTRL_1 283 0x0014 //TX_NS_LVL_CTRL_2 -284 0x0014 //TX_NS_LVL_CTRL_3 +284 0x000C //TX_NS_LVL_CTRL_3 285 0x000C //TX_NS_LVL_CTRL_4 286 0x000C //TX_NS_LVL_CTRL_5 -287 0x000C //TX_NS_LVL_CTRL_6 +287 0x001A //TX_NS_LVL_CTRL_6 288 0x000C //TX_NS_LVL_CTRL_7 289 0x000E //TX_MIN_GAIN_S_0 290 0x0014 //TX_MIN_GAIN_S_1 @@ -38899,10 +59051,10 @@ 300 0x7FFF //TX_SNRI_SUP_0 301 0x7FFF //TX_SNRI_SUP_1 302 0x7FFF //TX_SNRI_SUP_2 -303 0x7FFF //TX_SNRI_SUP_3 +303 0x4000 //TX_SNRI_SUP_3 304 0x4000 //TX_SNRI_SUP_4 305 0x4000 //TX_SNRI_SUP_5 -306 0x4000 //TX_SNRI_SUP_6 +306 0x7FFF //TX_SNRI_SUP_6 307 0x4000 //TX_SNRI_SUP_7 308 0x1200 //TX_THR_LFNS 309 0x0147 //TX_G_LFNS @@ -38911,12 +59063,12 @@ 312 0x7FFF //TX_A_POST_FILT_0 313 0x7FFF //TX_A_POST_FILT_1 314 0x4000 //TX_A_POST_FILT_S_0 -315 0x199A //TX_A_POST_FILT_S_1 +315 0x1000 //TX_A_POST_FILT_S_1 316 0x1000 //TX_A_POST_FILT_S_2 -317 0x1000 //TX_A_POST_FILT_S_3 +317 0x6666 //TX_A_POST_FILT_S_3 318 0x6666 //TX_A_POST_FILT_S_4 319 0x6666 //TX_A_POST_FILT_S_5 -320 0x6666 //TX_A_POST_FILT_S_6 +320 0x199A //TX_A_POST_FILT_S_6 321 0x6666 //TX_A_POST_FILT_S_7 322 0x2000 //TX_B_POST_FILT_0 323 0x2000 //TX_B_POST_FILT_1 @@ -38963,7 +59115,7 @@ 364 0x0000 //TX_K_APT 365 0x0001 //TX_NOISEDET 366 0x05A0 //TX_NDETCT -367 0x000A //TX_NOISE_TH_0 +367 0x0383 //TX_NOISE_TH_0 368 0x1388 //TX_NOISE_TH_0_2 369 0x3A98 //TX_NOISE_TH_0_3 370 0x0C80 //TX_NOISE_TH_1 @@ -38975,11 +59127,11 @@ 376 0x7FFF //TX_NOISE_TH_5_3 377 0x7FFF //TX_NOISE_TH_5_4 378 0x00C8 //TX_NOISE_TH_6 -379 0x000A //TX_MINENOISE_TH -380 0x0000 //TX_MINENOISE_MIC0_TH_MTS -381 0x0000 //TX_MINENOISE_MIC0_TH_EXP -382 0x0000 //TX_MINENOISE_MIC0_S_TH_MTS -383 0x0000 //TX_MINENOISE_MIC0_S_TH_EXP +379 0x044C //TX_MINENOISE_TH +380 0xD508 //TX_MORENS_TFMASK_TH +381 0x0001 //TX_DRC_QUIET_FLOOR +382 0x3A98 //TX_RATIODTL_CUT_TH +383 0x0DAC //TX_DT_CUT_K1 384 0x6400 //TX_OUT_ENER_S_TH_CLEAN 385 0x6400 //TX_OUT_ENER_S_TH_LESSCLEAN 386 0x6400 //TX_OUT_ENER_S_TH_NOISY @@ -38987,22 +59139,22 @@ 388 0x7D00 //TX_OUT_ENER_TH_SPEECH 389 0x0000 //TX_SN_NPB_GAIN 390 0x0000 //TX_NN_NPB_GAIN -391 0x0000 //TX_CSX_ALPHA_0 -392 0x0000 //TX_CSX_ALPHA_1 -393 0x0000 //TX_CSX_ALPHA_2 -394 0x0000 //TX_CSX_ALPHA_3 -395 0x0000 //TX_MU_ARSP_EST -396 0x0000 //TX_P_OUTBEAM_MIN_TH +391 0x7FFF //TX_POST_MASK_SUP_HSNE +392 0x1388 //TX_TAIL_DET_TH +393 0x4000 //TX_B_LESSCUT_RTO_WTA +394 0x0000 //TX_MEL_G_R +395 0x0080 //TX_SUPHIGH_TH +396 0x0000 //TX_MASK_G_R 397 0x0000 //TX_EXTRA_NS_L -398 0x0000 //TX_EXTRA_NS_A -399 0x0000 //TX_VR_NOISE_FLOOR_TH +398 0x1800 //TX_C_POST_FLT_MASK +399 0x7FFF //TX_A_POST_FLT_WNS 400 0x0000 //TX_MIN_G_LOW300HZ 401 0x0010 //TX_MAXLEVEL_CNG 402 0x0000 //TX_STN_NOISE_TH 403 0x0000 //TX_POST_MASK_SUP 404 0x0000 //TX_POST_MASK_ADJUST 405 0x0014 //TX_NS_ENOISE_MIC0_TH -406 0x0014 //TX_MINENOISE_MIC0_TH +406 0x02F3 //TX_MINENOISE_MIC0_TH 407 0x0226 //TX_MINENOISE_MIC0_S_TH 408 0x2879 //TX_MIN_G_CTRL_SSNS 409 0x0400 //TX_METAL_RTO_THR @@ -39110,16 +59262,16 @@ 511 0x6666 //TX_MIC_TO_BFGAIN 512 0x6666 //TX_MICTOBFGAIN0 513 0x0014 //TX_FASTMUE_TH -514 0x0000 //TX_DERVB_LEN_0 -515 0x0000 //TX_DERVB_LEN_1 -516 0x0000 //TX_RHO_DERVB -517 0x0000 //TX_MIC_INDX_DERVB -518 0x0000 //TX_MU_DERVB -519 0x0000 //TX_DR_RESRV_0 -520 0x0000 //TX_DR_RESRV_1 -521 0x0000 //TX_DR_RESRV_2 -522 0x0000 //TX_DR_RESRV_3 -523 0x0000 //TX_DR_RESRV_4 +514 0xC000 //TX_DEREVERB_LF_MU +515 0xC000 //TX_DEREVERB_HF_MU +516 0xCCCC //TX_DEREVERB_DELAY +517 0xD999 //TX_DEREVERB_COEF_LEN +518 0x1F40 //TX_DEREVERB_DNR +519 0x0000 //TX_DEREVERB_ALPHA +520 0x0000 //TX_DEREVERB_BETA +521 0x0000 //TX_GSC_RTOL_TH +522 0x7000 //TX_GSC_RTOH_TH +523 0x0064 //TX_WIDE2_MEANHTH 524 0x0000 //TX_DR_RESRV_5 525 0x0000 //TX_DR_RESRV_6 526 0x0000 //TX_DR_RESRV_7 @@ -39485,16 +59637,81 @@ 886 0x0000 //TX_FASTNS_TFMASKBIN_TH2 887 0x0000 //TX_FASTNS_TFMASKBIN_TH3 888 0x00C8 //TX_FASTNS_ARSPC_TH -889 0xD99A //TX_FASTNS_MASK5_TH +889 0x8000 //TX_FASTNS_MASK5_TH 890 0x051F //TX_POSTSSA_MIN_G_VR_MASK -891 0x7FFF //TX_A_LESSCUT_RTO_MASK +891 0x4000 //TX_A_LESSCUT_RTO_MASK 892 0x1770 //TX_FASTNS_NOISETH 893 0xC000 //TX_FASTNS_SSA_THLFL 894 0xC000 //TX_FASTNS_SSA_THHFL 895 0xCCCC //TX_FASTNS_SSA_THLFH 896 0xD999 //TX_FASTNS_SSA_THHFH +897 0x2339 //TX_SENDFUNC_REG_MICMUTE +898 0x0021 //TX_SENDFUNC_REG_MICMUTE1 +899 0x02BC //TX_MICMUTE_RATIO_THR +900 0x0140 //TX_MICMUTE_AMP_THR +901 0x0004 //TX_MICMUTE_HPF_IND +902 0x00C0 //TX_MICMUTE_LOG_EYR_TH +903 0x0008 //TX_MICMUTE_CVG_TIME +904 0x0008 //TX_MICMUTE_RELEASE_TIME +905 0x01FE //TX_MIC_VOLUME_MIC0MUTE +906 0x0020 //TX_MICMUTE_EPD_OFFSET_0 +907 0x001E //TX_MICMUTE_FRQ_AEC_L +908 0x7999 //TX_MICMUTE_EAD_THR +909 0x7FFF //TX_MICMUTE_LAMBDA_CB_NLE +910 0x7FFF //TX_MICMUTE_LAMBDA_RE_EST +911 0x4000 //TX_DTD_THR1_MICMUTE_0 +912 0x7000 //TX_DTD_THR1_MICMUTE_1 +913 0x7FFF //TX_DTD_THR1_MICMUTE_2 +914 0x7FFF //TX_DTD_THR1_MICMUTE_3 +915 0x6CCC //TX_DTD_THR2_MICMUTE_0 +916 0x0400 //TX_MICMUTE_MIN_EQ_RE_EST_0 +917 0x0400 //TX_MICMUTE_MIN_EQ_RE_EST_1 +918 0x1000 //TX_MICMUTE_MIN_EQ_RE_EST_2 +919 0x7FFF //TX_MICMUTE_MIN_EQ_RE_EST_3 +920 0x7FFF //TX_MICMUTE_MIN_EQ_RE_EST_4 +921 0x4000 //TX_MICMUTE_C_POST_FLT +922 0x03E8 //TX_MICMUTE_DT_CUT_K +923 0x0001 //TX_MICMUTE_DT_CUT_THR +924 0x03E8 //TX_MICMUTE_DT_CUT_K2 +925 0x0001 //TX_MICMUTE_DT_CUT_THR2 +926 0x0064 //TX_MICMUTE_DT2_HOLD_N +927 0x1000 //TX_MICMUTE_RATIODTH_THCUT +928 0x1000 //TX_MICMUTE_B_POST_FLT_ECHOL +929 0x7FFF //TX_MICMUTE_B_POST_FLT_ECHOH +930 0x0400 //TX_MICMUTE_C_POST_FLT_MASK +931 0x7999 //TX_MICMUTE_RATIODTL_CUT_TH +932 0x0258 //TX_MICMUTE_DT_CUT_K1 +933 0x0800 //TX_MICMUTE_N2_SN_EST +934 0xFC00 //TX_MICMUTE_THR_SN_EST_0 +935 0x001C //TX_MICMUTE_MIN_G_CTRL_0 +936 0x6000 //TX_MICMUTE_A_POST_FILT_S_0 +937 0x7000 //TX_MICMUTE_B_POST_FILT_0 +938 0x2710 //TX_MIC1RUB_AMP_THR +939 0x0010 //TX_MIC1MUTE_RATIO_THR +940 0x0450 //TX_MIC1MUTE_AMP_THR +941 0x0008 //TX_MIC1MUTE_CVG_TIME +942 0x0008 //TX_MIC1MUTE_RELEASE_TIME +943 0x0000 //TX_AMS_RESRV_01 +944 0x0000 //TX_AMS_RESRV_02 +945 0x0000 //TX_AMS_RESRV_03 +946 0x0000 //TX_AMS_RESRV_04 +947 0x0000 //TX_AMS_RESRV_05 +948 0x0000 //TX_AMS_RESRV_06 +949 0x0000 //TX_AMS_RESRV_07 +950 0x0000 //TX_AMS_RESRV_08 +951 0x0000 //TX_AMS_RESRV_09 +952 0x0000 //TX_AMS_RESRV_10 +953 0x0000 //TX_AMS_RESRV_11 +954 0x0000 //TX_AMS_RESRV_12 +955 0x0000 //TX_AMS_RESRV_13 +956 0x0000 //TX_AMS_RESRV_14 +957 0x0000 //TX_AMS_RESRV_15 +958 0x0000 //TX_AMS_RESRV_16 +959 0x0000 //TX_AMS_RESRV_17 +960 0x0000 //TX_AMS_RESRV_18 +961 0x0000 //TX_AMS_RESRV_19 #RX -0 0x027C //RX_RECVFUNC_MODE_0 +0 0x243C //RX_RECVFUNC_MODE_0 1 0x0000 //RX_RECVFUNC_MODE_1 2 0x0003 //RX_SAMPLINGFREQ_SIG 3 0x0003 //RX_SAMPLINGFREQ_PROC @@ -39504,8 +59721,8 @@ 7 0x6000 //RX_TDDRC_ALPHA_UP_2 8 0x6000 //RX_TDDRC_ALPHA_UP_3 9 0x1000 //RX_TDDRC_ALPHA_UP_4 -10 0x0800 //RX_PGA -11 0x7652 //RX_A_HP +10 0x0403 //RX_PGA +11 0x7D83 //RX_A_HP 12 0x4000 //RX_B_PE 13 0x7800 //RX_THR_PITCH_DET_0 14 0x7000 //RX_THR_PITCH_DET_1 @@ -39533,22 +59750,22 @@ 36 0x0000 //RX_LMT_THRD 37 0x4000 //RX_LMT_ALPHA 38 0x0020 //RX_FDEQ_SUBNUM -39 0x484E //RX_FDEQ_GAIN_0 -40 0x4E4E //RX_FDEQ_GAIN_1 -41 0x4E4E //RX_FDEQ_GAIN_2 +39 0x4848 //RX_FDEQ_GAIN_0 +40 0x4848 //RX_FDEQ_GAIN_1 +41 0x4848 //RX_FDEQ_GAIN_2 42 0x4848 //RX_FDEQ_GAIN_3 -43 0x484E //RX_FDEQ_GAIN_4 -44 0x6E4E //RX_FDEQ_GAIN_5 -45 0x4850 //RX_FDEQ_GAIN_6 +43 0x4848 //RX_FDEQ_GAIN_4 +44 0x7C48 //RX_FDEQ_GAIN_5 +45 0x4848 //RX_FDEQ_GAIN_6 46 0x4848 //RX_FDEQ_GAIN_7 47 0x4860 //RX_FDEQ_GAIN_8 48 0x7468 //RX_FDEQ_GAIN_9 -49 0x6060 //RX_FDEQ_GAIN_10 -50 0x6666 //RX_FDEQ_GAIN_11 -51 0x6666 //RX_FDEQ_GAIN_12 -52 0x6666 //RX_FDEQ_GAIN_13 -53 0x6060 //RX_FDEQ_GAIN_14 -54 0x6060 //RX_FDEQ_GAIN_15 +49 0x5858 //RX_FDEQ_GAIN_10 +50 0x5858 //RX_FDEQ_GAIN_11 +51 0x5C54 //RX_FDEQ_GAIN_12 +52 0x5448 //RX_FDEQ_GAIN_13 +53 0x4848 //RX_FDEQ_GAIN_14 +54 0x5858 //RX_FDEQ_GAIN_15 55 0x4848 //RX_FDEQ_GAIN_16 56 0x4848 //RX_FDEQ_GAIN_17 57 0x4848 //RX_FDEQ_GAIN_18 @@ -39562,7 +59779,7 @@ 65 0x0303 //RX_FDEQ_BIN_2 66 0x0304 //RX_FDEQ_BIN_3 67 0x0404 //RX_FDEQ_BIN_4 -68 0x0209 //RX_FDEQ_BIN_5 +68 0x0308 //RX_FDEQ_BIN_5 69 0x0808 //RX_FDEQ_BIN_6 70 0x090A //RX_FDEQ_BIN_7 71 0x0B0C //RX_FDEQ_BIN_8 @@ -39618,12 +59835,12 @@ 121 0x199A //RX_TDDRC_HMNC_GAIN 122 0x0001 //RX_TDDRC_SMT_FLAG 123 0x0CCD //RX_TDDRC_SMT_W -124 0x04BC //RX_TDDRC_DRC_GAIN +124 0x0550 //RX_TDDRC_DRC_GAIN 125 0x7C00 //RX_LAMBDA_PKA_FP -126 0x2000 //RX_TPKA_FP -127 0x2000 //RX_MIN_G_FP -128 0x0080 //RX_MAX_G_FP -129 0x0019 //RX_SPK_VOL +126 0x0FA0 //RX_TPKA_FP +127 0x0400 //RX_MIN_G_FP +128 0x0800 //RX_MAX_G_FP +129 0x0014 //RX_SPK_VOL 130 0x0000 //RX_VOL_RESRV_0 131 0x0000 //RX_MAXLEVEL_CNG 132 0x3000 //RX_BWE_UV_TH @@ -39657,41 +59874,41 @@ 8 0x6000 //RX_TDDRC_ALPHA_UP_3 9 0x1000 //RX_TDDRC_ALPHA_UP_4 27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 -28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 -29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 -32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +28 0x4000 //RX_TDDRC_ALPHA_DWN_2 +29 0x4000 //RX_TDDRC_ALPHA_DWN_3 +32 0x4000 //RX_TDDRC_ALPHA_DWN_4 33 0x7214 //RX_TDDRC_LIMITER_THRD 34 0x0800 //RX_TDDRC_LIMITER_GAIN 112 0x0002 //RX_TDDRC_THRD_0 113 0x0004 //RX_TDDRC_THRD_1 -114 0x1A00 //RX_TDDRC_THRD_2 -115 0x1A00 //RX_TDDRC_THRD_3 -116 0x7EB8 //RX_TDDRC_SLANT_0 -117 0x2500 //RX_TDDRC_SLANT_1 +114 0x1800 //RX_TDDRC_THRD_2 +115 0x1800 //RX_TDDRC_THRD_3 +116 0x7FFF //RX_TDDRC_SLANT_0 +117 0x7FFF //RX_TDDRC_SLANT_1 118 0x6000 //RX_TDDRC_ALPHA_UP_0 119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 120 0x0000 //RX_TDDRC_HMNC_FLAG 121 0x199A //RX_TDDRC_HMNC_GAIN 122 0x0001 //RX_TDDRC_SMT_FLAG 123 0x0CCD //RX_TDDRC_SMT_W -124 0x04BC //RX_TDDRC_DRC_GAIN +124 0x0780 //RX_TDDRC_DRC_GAIN 38 0x0020 //RX_FDEQ_SUBNUM -39 0x484E //RX_FDEQ_GAIN_0 -40 0x4E4E //RX_FDEQ_GAIN_1 -41 0x4E4E //RX_FDEQ_GAIN_2 -42 0x4848 //RX_FDEQ_GAIN_3 -43 0x484E //RX_FDEQ_GAIN_4 -44 0x6E4E //RX_FDEQ_GAIN_5 -45 0x4850 //RX_FDEQ_GAIN_6 -46 0x4848 //RX_FDEQ_GAIN_7 -47 0x4860 //RX_FDEQ_GAIN_8 -48 0x7468 //RX_FDEQ_GAIN_9 -49 0x6060 //RX_FDEQ_GAIN_10 -50 0x6666 //RX_FDEQ_GAIN_11 -51 0x6666 //RX_FDEQ_GAIN_12 -52 0x6666 //RX_FDEQ_GAIN_13 -53 0x6060 //RX_FDEQ_GAIN_14 -54 0x6060 //RX_FDEQ_GAIN_15 +39 0x6868 //RX_FDEQ_GAIN_0 +40 0x6848 //RX_FDEQ_GAIN_1 +41 0x4848 //RX_FDEQ_GAIN_2 +42 0x3434 //RX_FDEQ_GAIN_3 +43 0x3840 //RX_FDEQ_GAIN_4 +44 0x4838 //RX_FDEQ_GAIN_5 +45 0x5444 //RX_FDEQ_GAIN_6 +46 0x443C //RX_FDEQ_GAIN_7 +47 0x3C60 //RX_FDEQ_GAIN_8 +48 0x6460 //RX_FDEQ_GAIN_9 +49 0x6064 //RX_FDEQ_GAIN_10 +50 0x5C5C //RX_FDEQ_GAIN_11 +51 0x5440 //RX_FDEQ_GAIN_12 +52 0x4040 //RX_FDEQ_GAIN_13 +53 0x4040 //RX_FDEQ_GAIN_14 +54 0x5858 //RX_FDEQ_GAIN_15 55 0x4848 //RX_FDEQ_GAIN_16 56 0x4848 //RX_FDEQ_GAIN_17 57 0x4848 //RX_FDEQ_GAIN_18 @@ -39705,7 +59922,106 @@ 65 0x0303 //RX_FDEQ_BIN_2 66 0x0304 //RX_FDEQ_BIN_3 67 0x0404 //RX_FDEQ_BIN_4 -68 0x0209 //RX_FDEQ_BIN_5 +68 0x0308 //RX_FDEQ_BIN_5 +69 0x0808 //RX_FDEQ_BIN_6 +70 0x090A //RX_FDEQ_BIN_7 +71 0x0B0C //RX_FDEQ_BIN_8 +72 0x0D0E //RX_FDEQ_BIN_9 +73 0x1013 //RX_FDEQ_BIN_10 +74 0x1719 //RX_FDEQ_BIN_11 +75 0x1B1E //RX_FDEQ_BIN_12 +76 0x1E1E //RX_FDEQ_BIN_13 +77 0x1E28 //RX_FDEQ_BIN_14 +78 0x282C //RX_FDEQ_BIN_15 +79 0x0000 //RX_FDEQ_BIN_16 +80 0x0000 //RX_FDEQ_BIN_17 +81 0x0000 //RX_FDEQ_BIN_18 +82 0x0000 //RX_FDEQ_BIN_19 +83 0x0000 //RX_FDEQ_BIN_20 +84 0x0000 //RX_FDEQ_BIN_21 +85 0x0000 //RX_FDEQ_BIN_22 +86 0x0000 //RX_FDEQ_BIN_23 +87 0x4000 //RX_FDEQ_RESRV_0 +88 0x0320 //RX_FDEQ_RESRV_1 +89 0x0018 //RX_FDDRC_BAND_MARGIN_0 +90 0x0035 //RX_FDDRC_BAND_MARGIN_1 +91 0x00D5 //RX_FDDRC_BAND_MARGIN_2 +92 0x0120 //RX_FDDRC_BAND_MARGIN_3 +93 0x0004 //RX_FDDRC_BLOCK_EXP +94 0x5000 //RX_FDDRC_THRD_2_0 +95 0x5000 //RX_FDDRC_THRD_2_1 +96 0x2000 //RX_FDDRC_THRD_2_2 +97 0x5000 //RX_FDDRC_THRD_2_3 +98 0x6400 //RX_FDDRC_THRD_3_0 +99 0x6400 //RX_FDDRC_THRD_3_1 +100 0x2000 //RX_FDDRC_THRD_3_2 +101 0x5000 //RX_FDDRC_THRD_3_3 +102 0x4000 //RX_FDDRC_SLANT_0_0 +103 0x4000 //RX_FDDRC_SLANT_0_1 +104 0x4000 //RX_FDDRC_SLANT_0_2 +105 0x4000 //RX_FDDRC_SLANT_0_3 +106 0x7FFF //RX_FDDRC_SLANT_1_0 +107 0x7FFF //RX_FDDRC_SLANT_1_1 +108 0x7FFF //RX_FDDRC_SLANT_1_2 +109 0x7FFF //RX_FDDRC_SLANT_1_3 +110 0x0000 //RX_FDDRC_RESRV_0 +129 0x0011 //RX_SPK_VOL +130 0x0000 //RX_VOL_RESRV_0 +#VOL 1 +6 0x6000 //RX_TDDRC_ALPHA_UP_1 +7 0x6000 //RX_TDDRC_ALPHA_UP_2 +8 0x6000 //RX_TDDRC_ALPHA_UP_3 +9 0x1000 //RX_TDDRC_ALPHA_UP_4 +27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +28 0x4000 //RX_TDDRC_ALPHA_DWN_2 +29 0x4000 //RX_TDDRC_ALPHA_DWN_3 +32 0x4000 //RX_TDDRC_ALPHA_DWN_4 +33 0x7214 //RX_TDDRC_LIMITER_THRD +34 0x0800 //RX_TDDRC_LIMITER_GAIN +112 0x0002 //RX_TDDRC_THRD_0 +113 0x0004 //RX_TDDRC_THRD_1 +114 0x1800 //RX_TDDRC_THRD_2 +115 0x1800 //RX_TDDRC_THRD_3 +116 0x7FFF //RX_TDDRC_SLANT_0 +117 0x7FFF //RX_TDDRC_SLANT_1 +118 0x6000 //RX_TDDRC_ALPHA_UP_0 +119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +120 0x0000 //RX_TDDRC_HMNC_FLAG +121 0x199A //RX_TDDRC_HMNC_GAIN +122 0x0001 //RX_TDDRC_SMT_FLAG +123 0x0CCD //RX_TDDRC_SMT_W +124 0x0780 //RX_TDDRC_DRC_GAIN +38 0x0020 //RX_FDEQ_SUBNUM +39 0x6868 //RX_FDEQ_GAIN_0 +40 0x6848 //RX_FDEQ_GAIN_1 +41 0x4848 //RX_FDEQ_GAIN_2 +42 0x3434 //RX_FDEQ_GAIN_3 +43 0x3840 //RX_FDEQ_GAIN_4 +44 0x4838 //RX_FDEQ_GAIN_5 +45 0x5444 //RX_FDEQ_GAIN_6 +46 0x443C //RX_FDEQ_GAIN_7 +47 0x3C60 //RX_FDEQ_GAIN_8 +48 0x6460 //RX_FDEQ_GAIN_9 +49 0x6064 //RX_FDEQ_GAIN_10 +50 0x5C5C //RX_FDEQ_GAIN_11 +51 0x5440 //RX_FDEQ_GAIN_12 +52 0x4040 //RX_FDEQ_GAIN_13 +53 0x4040 //RX_FDEQ_GAIN_14 +54 0x5858 //RX_FDEQ_GAIN_15 +55 0x4848 //RX_FDEQ_GAIN_16 +56 0x4848 //RX_FDEQ_GAIN_17 +57 0x4848 //RX_FDEQ_GAIN_18 +58 0x4848 //RX_FDEQ_GAIN_19 +59 0x4848 //RX_FDEQ_GAIN_20 +60 0x4848 //RX_FDEQ_GAIN_21 +61 0x4848 //RX_FDEQ_GAIN_22 +62 0x4848 //RX_FDEQ_GAIN_23 +63 0x0202 //RX_FDEQ_BIN_0 +64 0x0203 //RX_FDEQ_BIN_1 +65 0x0303 //RX_FDEQ_BIN_2 +66 0x0304 //RX_FDEQ_BIN_3 +67 0x0404 //RX_FDEQ_BIN_4 +68 0x0308 //RX_FDEQ_BIN_5 69 0x0808 //RX_FDEQ_BIN_6 70 0x090A //RX_FDEQ_BIN_7 71 0x0B0C //RX_FDEQ_BIN_8 @@ -39750,146 +60066,47 @@ 110 0x0000 //RX_FDDRC_RESRV_0 129 0x0019 //RX_SPK_VOL 130 0x0000 //RX_VOL_RESRV_0 -#VOL 1 -6 0x6000 //RX_TDDRC_ALPHA_UP_1 -7 0x6000 //RX_TDDRC_ALPHA_UP_2 -8 0x6000 //RX_TDDRC_ALPHA_UP_3 -9 0x1000 //RX_TDDRC_ALPHA_UP_4 -27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 -28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 -29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 -32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 -33 0x7214 //RX_TDDRC_LIMITER_THRD -34 0x0800 //RX_TDDRC_LIMITER_GAIN -112 0x0002 //RX_TDDRC_THRD_0 -113 0x0004 //RX_TDDRC_THRD_1 -114 0x1A00 //RX_TDDRC_THRD_2 -115 0x1A00 //RX_TDDRC_THRD_3 -116 0x7EB8 //RX_TDDRC_SLANT_0 -117 0x2500 //RX_TDDRC_SLANT_1 -118 0x6000 //RX_TDDRC_ALPHA_UP_0 -119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 -120 0x0000 //RX_TDDRC_HMNC_FLAG -121 0x199A //RX_TDDRC_HMNC_GAIN -122 0x0001 //RX_TDDRC_SMT_FLAG -123 0x0CCD //RX_TDDRC_SMT_W -124 0x04BC //RX_TDDRC_DRC_GAIN -38 0x0020 //RX_FDEQ_SUBNUM -39 0x484E //RX_FDEQ_GAIN_0 -40 0x4E4E //RX_FDEQ_GAIN_1 -41 0x4E4E //RX_FDEQ_GAIN_2 -42 0x4848 //RX_FDEQ_GAIN_3 -43 0x484E //RX_FDEQ_GAIN_4 -44 0x6E4E //RX_FDEQ_GAIN_5 -45 0x4850 //RX_FDEQ_GAIN_6 -46 0x4848 //RX_FDEQ_GAIN_7 -47 0x4860 //RX_FDEQ_GAIN_8 -48 0x7468 //RX_FDEQ_GAIN_9 -49 0x6060 //RX_FDEQ_GAIN_10 -50 0x6666 //RX_FDEQ_GAIN_11 -51 0x6666 //RX_FDEQ_GAIN_12 -52 0x6666 //RX_FDEQ_GAIN_13 -53 0x6060 //RX_FDEQ_GAIN_14 -54 0x6060 //RX_FDEQ_GAIN_15 -55 0x4848 //RX_FDEQ_GAIN_16 -56 0x4848 //RX_FDEQ_GAIN_17 -57 0x4848 //RX_FDEQ_GAIN_18 -58 0x4848 //RX_FDEQ_GAIN_19 -59 0x4848 //RX_FDEQ_GAIN_20 -60 0x4848 //RX_FDEQ_GAIN_21 -61 0x4848 //RX_FDEQ_GAIN_22 -62 0x4848 //RX_FDEQ_GAIN_23 -63 0x0202 //RX_FDEQ_BIN_0 -64 0x0203 //RX_FDEQ_BIN_1 -65 0x0303 //RX_FDEQ_BIN_2 -66 0x0304 //RX_FDEQ_BIN_3 -67 0x0404 //RX_FDEQ_BIN_4 -68 0x0209 //RX_FDEQ_BIN_5 -69 0x0808 //RX_FDEQ_BIN_6 -70 0x090A //RX_FDEQ_BIN_7 -71 0x0B0C //RX_FDEQ_BIN_8 -72 0x0D0E //RX_FDEQ_BIN_9 -73 0x1013 //RX_FDEQ_BIN_10 -74 0x1719 //RX_FDEQ_BIN_11 -75 0x1B1E //RX_FDEQ_BIN_12 -76 0x1E1E //RX_FDEQ_BIN_13 -77 0x1E28 //RX_FDEQ_BIN_14 -78 0x282C //RX_FDEQ_BIN_15 -79 0x0000 //RX_FDEQ_BIN_16 -80 0x0000 //RX_FDEQ_BIN_17 -81 0x0000 //RX_FDEQ_BIN_18 -82 0x0000 //RX_FDEQ_BIN_19 -83 0x0000 //RX_FDEQ_BIN_20 -84 0x0000 //RX_FDEQ_BIN_21 -85 0x0000 //RX_FDEQ_BIN_22 -86 0x0000 //RX_FDEQ_BIN_23 -87 0x4000 //RX_FDEQ_RESRV_0 -88 0x0320 //RX_FDEQ_RESRV_1 -89 0x0018 //RX_FDDRC_BAND_MARGIN_0 -90 0x0035 //RX_FDDRC_BAND_MARGIN_1 -91 0x00D5 //RX_FDDRC_BAND_MARGIN_2 -92 0x0120 //RX_FDDRC_BAND_MARGIN_3 -93 0x0004 //RX_FDDRC_BLOCK_EXP -94 0x5000 //RX_FDDRC_THRD_2_0 -95 0x5000 //RX_FDDRC_THRD_2_1 -96 0x2000 //RX_FDDRC_THRD_2_2 -97 0x5000 //RX_FDDRC_THRD_2_3 -98 0x6400 //RX_FDDRC_THRD_3_0 -99 0x6400 //RX_FDDRC_THRD_3_1 -100 0x2000 //RX_FDDRC_THRD_3_2 -101 0x5000 //RX_FDDRC_THRD_3_3 -102 0x4000 //RX_FDDRC_SLANT_0_0 -103 0x4000 //RX_FDDRC_SLANT_0_1 -104 0x4000 //RX_FDDRC_SLANT_0_2 -105 0x4000 //RX_FDDRC_SLANT_0_3 -106 0x7FFF //RX_FDDRC_SLANT_1_0 -107 0x7FFF //RX_FDDRC_SLANT_1_1 -108 0x7FFF //RX_FDDRC_SLANT_1_2 -109 0x7FFF //RX_FDDRC_SLANT_1_3 -110 0x0000 //RX_FDDRC_RESRV_0 -129 0x0023 //RX_SPK_VOL -130 0x0000 //RX_VOL_RESRV_0 #VOL 2 6 0x6000 //RX_TDDRC_ALPHA_UP_1 7 0x6000 //RX_TDDRC_ALPHA_UP_2 8 0x6000 //RX_TDDRC_ALPHA_UP_3 9 0x1000 //RX_TDDRC_ALPHA_UP_4 27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 -28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 -29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 -32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +28 0x4000 //RX_TDDRC_ALPHA_DWN_2 +29 0x4000 //RX_TDDRC_ALPHA_DWN_3 +32 0x4000 //RX_TDDRC_ALPHA_DWN_4 33 0x7214 //RX_TDDRC_LIMITER_THRD 34 0x0800 //RX_TDDRC_LIMITER_GAIN 112 0x0002 //RX_TDDRC_THRD_0 113 0x0004 //RX_TDDRC_THRD_1 -114 0x1A00 //RX_TDDRC_THRD_2 -115 0x1A00 //RX_TDDRC_THRD_3 -116 0x7EB8 //RX_TDDRC_SLANT_0 -117 0x2500 //RX_TDDRC_SLANT_1 +114 0x1800 //RX_TDDRC_THRD_2 +115 0x1800 //RX_TDDRC_THRD_3 +116 0x7FFF //RX_TDDRC_SLANT_0 +117 0x7FFF //RX_TDDRC_SLANT_1 118 0x6000 //RX_TDDRC_ALPHA_UP_0 119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 120 0x0000 //RX_TDDRC_HMNC_FLAG 121 0x199A //RX_TDDRC_HMNC_GAIN 122 0x0001 //RX_TDDRC_SMT_FLAG 123 0x0CCD //RX_TDDRC_SMT_W -124 0x04BC //RX_TDDRC_DRC_GAIN +124 0x0780 //RX_TDDRC_DRC_GAIN 38 0x0020 //RX_FDEQ_SUBNUM -39 0x484E //RX_FDEQ_GAIN_0 -40 0x4E4E //RX_FDEQ_GAIN_1 -41 0x4E4E //RX_FDEQ_GAIN_2 -42 0x4848 //RX_FDEQ_GAIN_3 -43 0x484E //RX_FDEQ_GAIN_4 -44 0x6E4E //RX_FDEQ_GAIN_5 -45 0x4850 //RX_FDEQ_GAIN_6 -46 0x4848 //RX_FDEQ_GAIN_7 -47 0x4860 //RX_FDEQ_GAIN_8 -48 0x7468 //RX_FDEQ_GAIN_9 -49 0x6060 //RX_FDEQ_GAIN_10 -50 0x6666 //RX_FDEQ_GAIN_11 -51 0x6666 //RX_FDEQ_GAIN_12 -52 0x6666 //RX_FDEQ_GAIN_13 -53 0x6060 //RX_FDEQ_GAIN_14 -54 0x6060 //RX_FDEQ_GAIN_15 +39 0x6868 //RX_FDEQ_GAIN_0 +40 0x6848 //RX_FDEQ_GAIN_1 +41 0x4848 //RX_FDEQ_GAIN_2 +42 0x3434 //RX_FDEQ_GAIN_3 +43 0x3840 //RX_FDEQ_GAIN_4 +44 0x4838 //RX_FDEQ_GAIN_5 +45 0x5444 //RX_FDEQ_GAIN_6 +46 0x443C //RX_FDEQ_GAIN_7 +47 0x3C60 //RX_FDEQ_GAIN_8 +48 0x6460 //RX_FDEQ_GAIN_9 +49 0x6064 //RX_FDEQ_GAIN_10 +50 0x5C5C //RX_FDEQ_GAIN_11 +51 0x5440 //RX_FDEQ_GAIN_12 +52 0x4040 //RX_FDEQ_GAIN_13 +53 0x4040 //RX_FDEQ_GAIN_14 +54 0x5858 //RX_FDEQ_GAIN_15 55 0x4848 //RX_FDEQ_GAIN_16 56 0x4848 //RX_FDEQ_GAIN_17 57 0x4848 //RX_FDEQ_GAIN_18 @@ -39903,7 +60120,7 @@ 65 0x0303 //RX_FDEQ_BIN_2 66 0x0304 //RX_FDEQ_BIN_3 67 0x0404 //RX_FDEQ_BIN_4 -68 0x0209 //RX_FDEQ_BIN_5 +68 0x0308 //RX_FDEQ_BIN_5 69 0x0808 //RX_FDEQ_BIN_6 70 0x090A //RX_FDEQ_BIN_7 71 0x0B0C //RX_FDEQ_BIN_8 @@ -39946,7 +60163,7 @@ 108 0x7FFF //RX_FDDRC_SLANT_1_2 109 0x7FFF //RX_FDDRC_SLANT_1_3 110 0x0000 //RX_FDDRC_RESRV_0 -129 0x0032 //RX_SPK_VOL +129 0x0025 //RX_SPK_VOL 130 0x0000 //RX_VOL_RESRV_0 #VOL 3 6 0x6000 //RX_TDDRC_ALPHA_UP_1 @@ -39954,41 +60171,41 @@ 8 0x6000 //RX_TDDRC_ALPHA_UP_3 9 0x1000 //RX_TDDRC_ALPHA_UP_4 27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 -28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 -29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 -32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +28 0x4000 //RX_TDDRC_ALPHA_DWN_2 +29 0x4000 //RX_TDDRC_ALPHA_DWN_3 +32 0x4000 //RX_TDDRC_ALPHA_DWN_4 33 0x7214 //RX_TDDRC_LIMITER_THRD 34 0x0800 //RX_TDDRC_LIMITER_GAIN 112 0x0002 //RX_TDDRC_THRD_0 113 0x0004 //RX_TDDRC_THRD_1 -114 0x1A00 //RX_TDDRC_THRD_2 -115 0x1A00 //RX_TDDRC_THRD_3 -116 0x7EB8 //RX_TDDRC_SLANT_0 -117 0x2500 //RX_TDDRC_SLANT_1 +114 0x1800 //RX_TDDRC_THRD_2 +115 0x1800 //RX_TDDRC_THRD_3 +116 0x7FFF //RX_TDDRC_SLANT_0 +117 0x7FFF //RX_TDDRC_SLANT_1 118 0x6000 //RX_TDDRC_ALPHA_UP_0 119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 120 0x0000 //RX_TDDRC_HMNC_FLAG 121 0x199A //RX_TDDRC_HMNC_GAIN 122 0x0001 //RX_TDDRC_SMT_FLAG 123 0x0CCD //RX_TDDRC_SMT_W -124 0x04BC //RX_TDDRC_DRC_GAIN +124 0x0780 //RX_TDDRC_DRC_GAIN 38 0x0020 //RX_FDEQ_SUBNUM -39 0x484E //RX_FDEQ_GAIN_0 -40 0x4E4E //RX_FDEQ_GAIN_1 -41 0x4E4E //RX_FDEQ_GAIN_2 -42 0x4848 //RX_FDEQ_GAIN_3 -43 0x484E //RX_FDEQ_GAIN_4 -44 0x6E4E //RX_FDEQ_GAIN_5 -45 0x4850 //RX_FDEQ_GAIN_6 -46 0x4848 //RX_FDEQ_GAIN_7 -47 0x4860 //RX_FDEQ_GAIN_8 -48 0x7468 //RX_FDEQ_GAIN_9 -49 0x6060 //RX_FDEQ_GAIN_10 -50 0x6666 //RX_FDEQ_GAIN_11 -51 0x6666 //RX_FDEQ_GAIN_12 -52 0x6666 //RX_FDEQ_GAIN_13 -53 0x6060 //RX_FDEQ_GAIN_14 -54 0x6060 //RX_FDEQ_GAIN_15 +39 0x6868 //RX_FDEQ_GAIN_0 +40 0x6848 //RX_FDEQ_GAIN_1 +41 0x4848 //RX_FDEQ_GAIN_2 +42 0x3434 //RX_FDEQ_GAIN_3 +43 0x3840 //RX_FDEQ_GAIN_4 +44 0x4838 //RX_FDEQ_GAIN_5 +45 0x5444 //RX_FDEQ_GAIN_6 +46 0x443C //RX_FDEQ_GAIN_7 +47 0x3C60 //RX_FDEQ_GAIN_8 +48 0x6460 //RX_FDEQ_GAIN_9 +49 0x6064 //RX_FDEQ_GAIN_10 +50 0x5C5C //RX_FDEQ_GAIN_11 +51 0x5440 //RX_FDEQ_GAIN_12 +52 0x4040 //RX_FDEQ_GAIN_13 +53 0x4040 //RX_FDEQ_GAIN_14 +54 0x5858 //RX_FDEQ_GAIN_15 55 0x4848 //RX_FDEQ_GAIN_16 56 0x4848 //RX_FDEQ_GAIN_17 57 0x4848 //RX_FDEQ_GAIN_18 @@ -40002,7 +60219,7 @@ 65 0x0303 //RX_FDEQ_BIN_2 66 0x0304 //RX_FDEQ_BIN_3 67 0x0404 //RX_FDEQ_BIN_4 -68 0x0209 //RX_FDEQ_BIN_5 +68 0x0308 //RX_FDEQ_BIN_5 69 0x0808 //RX_FDEQ_BIN_6 70 0x090A //RX_FDEQ_BIN_7 71 0x0B0C //RX_FDEQ_BIN_8 @@ -40045,7 +60262,7 @@ 108 0x7FFF //RX_FDDRC_SLANT_1_2 109 0x7FFF //RX_FDDRC_SLANT_1_3 110 0x0000 //RX_FDDRC_RESRV_0 -129 0x0048 //RX_SPK_VOL +129 0x0036 //RX_SPK_VOL 130 0x0000 //RX_VOL_RESRV_0 #VOL 4 6 0x6000 //RX_TDDRC_ALPHA_UP_1 @@ -40053,41 +60270,41 @@ 8 0x6000 //RX_TDDRC_ALPHA_UP_3 9 0x1000 //RX_TDDRC_ALPHA_UP_4 27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 -28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 -29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 -32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +28 0x4000 //RX_TDDRC_ALPHA_DWN_2 +29 0x4000 //RX_TDDRC_ALPHA_DWN_3 +32 0x4000 //RX_TDDRC_ALPHA_DWN_4 33 0x7214 //RX_TDDRC_LIMITER_THRD 34 0x0800 //RX_TDDRC_LIMITER_GAIN 112 0x0002 //RX_TDDRC_THRD_0 113 0x0004 //RX_TDDRC_THRD_1 -114 0x1A00 //RX_TDDRC_THRD_2 -115 0x1A00 //RX_TDDRC_THRD_3 -116 0x7EB8 //RX_TDDRC_SLANT_0 -117 0x2500 //RX_TDDRC_SLANT_1 +114 0x1800 //RX_TDDRC_THRD_2 +115 0x1800 //RX_TDDRC_THRD_3 +116 0x7FFF //RX_TDDRC_SLANT_0 +117 0x7FFF //RX_TDDRC_SLANT_1 118 0x6000 //RX_TDDRC_ALPHA_UP_0 119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 120 0x0000 //RX_TDDRC_HMNC_FLAG 121 0x199A //RX_TDDRC_HMNC_GAIN 122 0x0001 //RX_TDDRC_SMT_FLAG 123 0x0CCD //RX_TDDRC_SMT_W -124 0x04BC //RX_TDDRC_DRC_GAIN +124 0x0D56 //RX_TDDRC_DRC_GAIN 38 0x0020 //RX_FDEQ_SUBNUM -39 0x484E //RX_FDEQ_GAIN_0 -40 0x4E4E //RX_FDEQ_GAIN_1 -41 0x4E4E //RX_FDEQ_GAIN_2 -42 0x4848 //RX_FDEQ_GAIN_3 -43 0x484E //RX_FDEQ_GAIN_4 -44 0x6E4E //RX_FDEQ_GAIN_5 -45 0x4850 //RX_FDEQ_GAIN_6 -46 0x4848 //RX_FDEQ_GAIN_7 -47 0x4860 //RX_FDEQ_GAIN_8 -48 0x7468 //RX_FDEQ_GAIN_9 -49 0x6060 //RX_FDEQ_GAIN_10 -50 0x6666 //RX_FDEQ_GAIN_11 -51 0x6666 //RX_FDEQ_GAIN_12 -52 0x6666 //RX_FDEQ_GAIN_13 -53 0x6060 //RX_FDEQ_GAIN_14 -54 0x6060 //RX_FDEQ_GAIN_15 +39 0x6868 //RX_FDEQ_GAIN_0 +40 0x6850 //RX_FDEQ_GAIN_1 +41 0x5048 //RX_FDEQ_GAIN_2 +42 0x383C //RX_FDEQ_GAIN_3 +43 0x4048 //RX_FDEQ_GAIN_4 +44 0x7040 //RX_FDEQ_GAIN_5 +45 0x4C44 //RX_FDEQ_GAIN_6 +46 0x4448 //RX_FDEQ_GAIN_7 +47 0x4868 //RX_FDEQ_GAIN_8 +48 0x7C70 //RX_FDEQ_GAIN_9 +49 0x707C //RX_FDEQ_GAIN_10 +50 0x786C //RX_FDEQ_GAIN_11 +51 0x6454 //RX_FDEQ_GAIN_12 +52 0x604C //RX_FDEQ_GAIN_13 +53 0x585C //RX_FDEQ_GAIN_14 +54 0x7480 //RX_FDEQ_GAIN_15 55 0x4848 //RX_FDEQ_GAIN_16 56 0x4848 //RX_FDEQ_GAIN_17 57 0x4848 //RX_FDEQ_GAIN_18 @@ -40101,7 +60318,7 @@ 65 0x0303 //RX_FDEQ_BIN_2 66 0x0304 //RX_FDEQ_BIN_3 67 0x0404 //RX_FDEQ_BIN_4 -68 0x0209 //RX_FDEQ_BIN_5 +68 0x0308 //RX_FDEQ_BIN_5 69 0x0808 //RX_FDEQ_BIN_6 70 0x090A //RX_FDEQ_BIN_7 71 0x0B0C //RX_FDEQ_BIN_8 @@ -40144,7 +60361,7 @@ 108 0x7FFF //RX_FDDRC_SLANT_1_2 109 0x7FFF //RX_FDDRC_SLANT_1_3 110 0x0000 //RX_FDDRC_RESRV_0 -129 0x0068 //RX_SPK_VOL +129 0x0034 //RX_SPK_VOL 130 0x0000 //RX_VOL_RESRV_0 #VOL 5 6 0x6000 //RX_TDDRC_ALPHA_UP_1 @@ -40152,41 +60369,41 @@ 8 0x6000 //RX_TDDRC_ALPHA_UP_3 9 0x1000 //RX_TDDRC_ALPHA_UP_4 27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 -28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 -29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 -32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +28 0x4000 //RX_TDDRC_ALPHA_DWN_2 +29 0x4000 //RX_TDDRC_ALPHA_DWN_3 +32 0x4000 //RX_TDDRC_ALPHA_DWN_4 33 0x7214 //RX_TDDRC_LIMITER_THRD 34 0x0800 //RX_TDDRC_LIMITER_GAIN 112 0x0002 //RX_TDDRC_THRD_0 113 0x0004 //RX_TDDRC_THRD_1 -114 0x1A00 //RX_TDDRC_THRD_2 -115 0x1A00 //RX_TDDRC_THRD_3 -116 0x7EB8 //RX_TDDRC_SLANT_0 -117 0x2500 //RX_TDDRC_SLANT_1 +114 0x1800 //RX_TDDRC_THRD_2 +115 0x1800 //RX_TDDRC_THRD_3 +116 0x7FFF //RX_TDDRC_SLANT_0 +117 0x7FFF //RX_TDDRC_SLANT_1 118 0x6000 //RX_TDDRC_ALPHA_UP_0 119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 120 0x0000 //RX_TDDRC_HMNC_FLAG 121 0x199A //RX_TDDRC_HMNC_GAIN 122 0x0001 //RX_TDDRC_SMT_FLAG 123 0x0CCD //RX_TDDRC_SMT_W -124 0x04BC //RX_TDDRC_DRC_GAIN +124 0x0D56 //RX_TDDRC_DRC_GAIN 38 0x0020 //RX_FDEQ_SUBNUM -39 0x484E //RX_FDEQ_GAIN_0 -40 0x4E4E //RX_FDEQ_GAIN_1 -41 0x4E4E //RX_FDEQ_GAIN_2 -42 0x4848 //RX_FDEQ_GAIN_3 -43 0x484E //RX_FDEQ_GAIN_4 -44 0x6E4E //RX_FDEQ_GAIN_5 -45 0x4850 //RX_FDEQ_GAIN_6 -46 0x4848 //RX_FDEQ_GAIN_7 -47 0x4860 //RX_FDEQ_GAIN_8 -48 0x7468 //RX_FDEQ_GAIN_9 -49 0x6060 //RX_FDEQ_GAIN_10 -50 0x6666 //RX_FDEQ_GAIN_11 -51 0x6666 //RX_FDEQ_GAIN_12 -52 0x6666 //RX_FDEQ_GAIN_13 -53 0x6060 //RX_FDEQ_GAIN_14 -54 0x6060 //RX_FDEQ_GAIN_15 +39 0x6868 //RX_FDEQ_GAIN_0 +40 0x6850 //RX_FDEQ_GAIN_1 +41 0x5048 //RX_FDEQ_GAIN_2 +42 0x383C //RX_FDEQ_GAIN_3 +43 0x4048 //RX_FDEQ_GAIN_4 +44 0x7040 //RX_FDEQ_GAIN_5 +45 0x4C44 //RX_FDEQ_GAIN_6 +46 0x4448 //RX_FDEQ_GAIN_7 +47 0x4868 //RX_FDEQ_GAIN_8 +48 0x7C70 //RX_FDEQ_GAIN_9 +49 0x707C //RX_FDEQ_GAIN_10 +50 0x786C //RX_FDEQ_GAIN_11 +51 0x6454 //RX_FDEQ_GAIN_12 +52 0x604C //RX_FDEQ_GAIN_13 +53 0x585C //RX_FDEQ_GAIN_14 +54 0x7480 //RX_FDEQ_GAIN_15 55 0x4848 //RX_FDEQ_GAIN_16 56 0x4848 //RX_FDEQ_GAIN_17 57 0x4848 //RX_FDEQ_GAIN_18 @@ -40200,7 +60417,7 @@ 65 0x0303 //RX_FDEQ_BIN_2 66 0x0304 //RX_FDEQ_BIN_3 67 0x0404 //RX_FDEQ_BIN_4 -68 0x0209 //RX_FDEQ_BIN_5 +68 0x0308 //RX_FDEQ_BIN_5 69 0x0808 //RX_FDEQ_BIN_6 70 0x090A //RX_FDEQ_BIN_7 71 0x0B0C //RX_FDEQ_BIN_8 @@ -40243,7 +60460,7 @@ 108 0x7FFF //RX_FDDRC_SLANT_1_2 109 0x7FFF //RX_FDDRC_SLANT_1_3 110 0x0000 //RX_FDDRC_RESRV_0 -129 0x0097 //RX_SPK_VOL +129 0x0059 //RX_SPK_VOL 130 0x0000 //RX_VOL_RESRV_0 #VOL 6 6 0x6000 //RX_TDDRC_ALPHA_UP_1 @@ -40251,41 +60468,41 @@ 8 0x6000 //RX_TDDRC_ALPHA_UP_3 9 0x1000 //RX_TDDRC_ALPHA_UP_4 27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 -28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 -29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 -32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +28 0x4000 //RX_TDDRC_ALPHA_DWN_2 +29 0x4000 //RX_TDDRC_ALPHA_DWN_3 +32 0x4000 //RX_TDDRC_ALPHA_DWN_4 33 0x7214 //RX_TDDRC_LIMITER_THRD 34 0x0800 //RX_TDDRC_LIMITER_GAIN 112 0x0002 //RX_TDDRC_THRD_0 113 0x0004 //RX_TDDRC_THRD_1 -114 0x1A00 //RX_TDDRC_THRD_2 -115 0x1A00 //RX_TDDRC_THRD_3 -116 0x7EB8 //RX_TDDRC_SLANT_0 -117 0x2500 //RX_TDDRC_SLANT_1 +114 0x1800 //RX_TDDRC_THRD_2 +115 0x1800 //RX_TDDRC_THRD_3 +116 0x7FFF //RX_TDDRC_SLANT_0 +117 0x7FFF //RX_TDDRC_SLANT_1 118 0x6000 //RX_TDDRC_ALPHA_UP_0 119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 120 0x0000 //RX_TDDRC_HMNC_FLAG 121 0x199A //RX_TDDRC_HMNC_GAIN 122 0x0001 //RX_TDDRC_SMT_FLAG 123 0x0CCD //RX_TDDRC_SMT_W -124 0x04BC //RX_TDDRC_DRC_GAIN +124 0x0D56 //RX_TDDRC_DRC_GAIN 38 0x0020 //RX_FDEQ_SUBNUM -39 0x484E //RX_FDEQ_GAIN_0 -40 0x4E4E //RX_FDEQ_GAIN_1 -41 0x4E4E //RX_FDEQ_GAIN_2 -42 0x4848 //RX_FDEQ_GAIN_3 -43 0x484E //RX_FDEQ_GAIN_4 -44 0x6E4E //RX_FDEQ_GAIN_5 -45 0x4850 //RX_FDEQ_GAIN_6 -46 0x4848 //RX_FDEQ_GAIN_7 -47 0x4860 //RX_FDEQ_GAIN_8 -48 0x7468 //RX_FDEQ_GAIN_9 -49 0x6060 //RX_FDEQ_GAIN_10 -50 0x6666 //RX_FDEQ_GAIN_11 -51 0x6666 //RX_FDEQ_GAIN_12 -52 0x6666 //RX_FDEQ_GAIN_13 -53 0x6060 //RX_FDEQ_GAIN_14 -54 0x6060 //RX_FDEQ_GAIN_15 +39 0x6868 //RX_FDEQ_GAIN_0 +40 0x6850 //RX_FDEQ_GAIN_1 +41 0x5048 //RX_FDEQ_GAIN_2 +42 0x383C //RX_FDEQ_GAIN_3 +43 0x4048 //RX_FDEQ_GAIN_4 +44 0x7040 //RX_FDEQ_GAIN_5 +45 0x4C44 //RX_FDEQ_GAIN_6 +46 0x4448 //RX_FDEQ_GAIN_7 +47 0x4868 //RX_FDEQ_GAIN_8 +48 0x7C70 //RX_FDEQ_GAIN_9 +49 0x707C //RX_FDEQ_GAIN_10 +50 0x786C //RX_FDEQ_GAIN_11 +51 0x6454 //RX_FDEQ_GAIN_12 +52 0x604C //RX_FDEQ_GAIN_13 +53 0x585C //RX_FDEQ_GAIN_14 +54 0x7480 //RX_FDEQ_GAIN_15 55 0x4848 //RX_FDEQ_GAIN_16 56 0x4848 //RX_FDEQ_GAIN_17 57 0x4848 //RX_FDEQ_GAIN_18 @@ -40299,7 +60516,7 @@ 65 0x0303 //RX_FDEQ_BIN_2 66 0x0304 //RX_FDEQ_BIN_3 67 0x0404 //RX_FDEQ_BIN_4 -68 0x0209 //RX_FDEQ_BIN_5 +68 0x0308 //RX_FDEQ_BIN_5 69 0x0808 //RX_FDEQ_BIN_6 70 0x090A //RX_FDEQ_BIN_7 71 0x0B0C //RX_FDEQ_BIN_8 @@ -40344,11 +60561,862 @@ 110 0x0000 //RX_FDDRC_RESRV_0 129 0x0100 //RX_SPK_VOL 130 0x0000 //RX_VOL_RESRV_0 +#RX 2 +157 0x243C //RX_RECVFUNC_MODE_0 +158 0x0000 //RX_RECVFUNC_MODE_1 +159 0x0003 //RX_SAMPLINGFREQ_SIG +160 0x0003 //RX_SAMPLINGFREQ_PROC +161 0x000A //RX_FRAME_SZ +162 0x0000 //RX_DELAY_OPT +163 0x6000 //RX_TDDRC_ALPHA_UP_1 +164 0x6000 //RX_TDDRC_ALPHA_UP_2 +165 0x6000 //RX_TDDRC_ALPHA_UP_3 +166 0x1000 //RX_TDDRC_ALPHA_UP_4 +167 0x0403 //RX_PGA +168 0x7D83 //RX_A_HP +169 0x4000 //RX_B_PE +170 0x7800 //RX_THR_PITCH_DET_0 +171 0x7000 //RX_THR_PITCH_DET_1 +172 0x6000 //RX_THR_PITCH_DET_2 +173 0x0008 //RX_PITCH_BFR_LEN +174 0x0003 //RX_SBD_PITCH_DET +175 0x0100 //RX_PP_RESRV_0 +176 0x0020 //RX_PP_RESRV_1 +177 0x0400 //RX_N_SN_EST +178 0x000C //RX_N2_SN_EST +179 0x0010 //RX_NS_LVL_CTRL +180 0xF800 //RX_THR_SN_EST +181 0x7E00 //RX_LAMBDA_PFILT +182 0x000A //RX_FENS_RESRV_0 +183 0x0190 //RX_FENS_RESRV_1 +184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +187 0x0002 //RX_EXTRA_NS_L +188 0x0800 //RX_EXTRA_NS_A +189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +190 0x7214 //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +192 0x199A //RX_A_POST_FLT +193 0x0000 //RX_LMT_THRD +194 0x4000 //RX_LMT_ALPHA +195 0x0020 //RX_FDEQ_SUBNUM +196 0x4848 //RX_FDEQ_GAIN_0 +197 0x4848 //RX_FDEQ_GAIN_1 +198 0x4848 //RX_FDEQ_GAIN_2 +199 0x4848 //RX_FDEQ_GAIN_3 +200 0x4848 //RX_FDEQ_GAIN_4 +201 0x7C48 //RX_FDEQ_GAIN_5 +202 0x4848 //RX_FDEQ_GAIN_6 +203 0x4848 //RX_FDEQ_GAIN_7 +204 0x4860 //RX_FDEQ_GAIN_8 +205 0x7468 //RX_FDEQ_GAIN_9 +206 0x5858 //RX_FDEQ_GAIN_10 +207 0x5858 //RX_FDEQ_GAIN_11 +208 0x5C54 //RX_FDEQ_GAIN_12 +209 0x5448 //RX_FDEQ_GAIN_13 +210 0x4848 //RX_FDEQ_GAIN_14 +211 0x5858 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0202 //RX_FDEQ_BIN_0 +221 0x0203 //RX_FDEQ_BIN_1 +222 0x0303 //RX_FDEQ_BIN_2 +223 0x0304 //RX_FDEQ_BIN_3 +224 0x0404 //RX_FDEQ_BIN_4 +225 0x0308 //RX_FDEQ_BIN_5 +226 0x0808 //RX_FDEQ_BIN_6 +227 0x090A //RX_FDEQ_BIN_7 +228 0x0B0C //RX_FDEQ_BIN_8 +229 0x0D0E //RX_FDEQ_BIN_9 +230 0x1013 //RX_FDEQ_BIN_10 +231 0x1719 //RX_FDEQ_BIN_11 +232 0x1B1E //RX_FDEQ_BIN_12 +233 0x1E1E //RX_FDEQ_BIN_13 +234 0x1E28 //RX_FDEQ_BIN_14 +235 0x282C //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x4000 //RX_FDEQ_RESRV_0 +245 0x0320 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0035 //RX_FDDRC_BAND_MARGIN_1 +248 0x00D5 //RX_FDDRC_BAND_MARGIN_2 +249 0x0120 //RX_FDDRC_BAND_MARGIN_3 +250 0x0004 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x2000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x2000 //RX_FDDRC_THRD_3_2 +258 0x5000 //RX_FDDRC_THRD_3_3 +259 0x4000 //RX_FDDRC_SLANT_0_0 +260 0x4000 //RX_FDDRC_SLANT_0_1 +261 0x4000 //RX_FDDRC_SLANT_0_2 +262 0x4000 //RX_FDDRC_SLANT_0_3 +263 0x7FFF //RX_FDDRC_SLANT_1_0 +264 0x7FFF //RX_FDDRC_SLANT_1_1 +265 0x7FFF //RX_FDDRC_SLANT_1_2 +266 0x7FFF //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +268 0x0002 //RX_FILTINDX +269 0x0002 //RX_TDDRC_THRD_0 +270 0x0004 //RX_TDDRC_THRD_1 +271 0x1A00 //RX_TDDRC_THRD_2 +272 0x1A00 //RX_TDDRC_THRD_3 +273 0x7EB8 //RX_TDDRC_SLANT_0 +274 0x2500 //RX_TDDRC_SLANT_1 +275 0x6000 //RX_TDDRC_ALPHA_UP_0 +276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x199A //RX_TDDRC_HMNC_GAIN +279 0x0001 //RX_TDDRC_SMT_FLAG +280 0x0CCD //RX_TDDRC_SMT_W +281 0x0550 //RX_TDDRC_DRC_GAIN +282 0x7C00 //RX_LAMBDA_PKA_FP +283 0x0FA0 //RX_TPKA_FP +284 0x0400 //RX_MIN_G_FP +285 0x0800 //RX_MAX_G_FP +286 0x0014 //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 +288 0x0000 //RX_MAXLEVEL_CNG +289 0x3000 //RX_BWE_UV_TH +290 0x3000 //RX_BWE_UV_TH2 +291 0x1800 //RX_BWE_UV_TH3 +292 0x1000 //RX_BWE_V_TH +293 0x04CD //RX_BWE_GAIN1_V_TH1 +294 0x0F33 //RX_BWE_GAIN1_V_TH2 +295 0x7333 //RX_BWE_UV_EQ +296 0x199A //RX_BWE_V_EQ +297 0x7333 //RX_BWE_TONE_TH +298 0x0004 //RX_BWE_UV_HOLD_T +299 0x6CCD //RX_BWE_GAIN2_ALPHA +300 0x799A //RX_BWE_GAIN3_ALPHA +301 0x001E //RX_BWE_CUTOFF +302 0x3000 //RX_BWE_GAINFILL +303 0x3200 //RX_BWE_MAXTH_TONE +304 0x2000 //RX_BWE_EQ_0 +305 0x2000 //RX_BWE_EQ_1 +306 0x2000 //RX_BWE_EQ_2 +307 0x2000 //RX_BWE_EQ_3 +308 0x2000 //RX_BWE_EQ_4 +309 0x2000 //RX_BWE_EQ_5 +310 0x2000 //RX_BWE_EQ_6 +311 0x0000 //RX_BWE_RESRV_0 +312 0x0000 //RX_BWE_RESRV_1 +313 0x0000 //RX_BWE_RESRV_2 +#VOL 0 +163 0x6000 //RX_TDDRC_ALPHA_UP_1 +164 0x6000 //RX_TDDRC_ALPHA_UP_2 +165 0x6000 //RX_TDDRC_ALPHA_UP_3 +166 0x1000 //RX_TDDRC_ALPHA_UP_4 +184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +185 0x4000 //RX_TDDRC_ALPHA_DWN_2 +186 0x4000 //RX_TDDRC_ALPHA_DWN_3 +189 0x4000 //RX_TDDRC_ALPHA_DWN_4 +190 0x7214 //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +269 0x0002 //RX_TDDRC_THRD_0 +270 0x0004 //RX_TDDRC_THRD_1 +271 0x1800 //RX_TDDRC_THRD_2 +272 0x1800 //RX_TDDRC_THRD_3 +273 0x7FFF //RX_TDDRC_SLANT_0 +274 0x7FFF //RX_TDDRC_SLANT_1 +275 0x6000 //RX_TDDRC_ALPHA_UP_0 +276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x199A //RX_TDDRC_HMNC_GAIN +279 0x0001 //RX_TDDRC_SMT_FLAG +280 0x0CCD //RX_TDDRC_SMT_W +281 0x0780 //RX_TDDRC_DRC_GAIN +195 0x0020 //RX_FDEQ_SUBNUM +196 0x6868 //RX_FDEQ_GAIN_0 +197 0x6848 //RX_FDEQ_GAIN_1 +198 0x4848 //RX_FDEQ_GAIN_2 +199 0x3434 //RX_FDEQ_GAIN_3 +200 0x3840 //RX_FDEQ_GAIN_4 +201 0x4838 //RX_FDEQ_GAIN_5 +202 0x5444 //RX_FDEQ_GAIN_6 +203 0x443C //RX_FDEQ_GAIN_7 +204 0x3C60 //RX_FDEQ_GAIN_8 +205 0x6460 //RX_FDEQ_GAIN_9 +206 0x6064 //RX_FDEQ_GAIN_10 +207 0x5C5C //RX_FDEQ_GAIN_11 +208 0x5440 //RX_FDEQ_GAIN_12 +209 0x4040 //RX_FDEQ_GAIN_13 +210 0x4040 //RX_FDEQ_GAIN_14 +211 0x5858 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0202 //RX_FDEQ_BIN_0 +221 0x0203 //RX_FDEQ_BIN_1 +222 0x0303 //RX_FDEQ_BIN_2 +223 0x0304 //RX_FDEQ_BIN_3 +224 0x0404 //RX_FDEQ_BIN_4 +225 0x0308 //RX_FDEQ_BIN_5 +226 0x0808 //RX_FDEQ_BIN_6 +227 0x090A //RX_FDEQ_BIN_7 +228 0x0B0C //RX_FDEQ_BIN_8 +229 0x0D0E //RX_FDEQ_BIN_9 +230 0x1013 //RX_FDEQ_BIN_10 +231 0x1719 //RX_FDEQ_BIN_11 +232 0x1B1E //RX_FDEQ_BIN_12 +233 0x1E1E //RX_FDEQ_BIN_13 +234 0x1E28 //RX_FDEQ_BIN_14 +235 0x282C //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x4000 //RX_FDEQ_RESRV_0 +245 0x0320 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0035 //RX_FDDRC_BAND_MARGIN_1 +248 0x00D5 //RX_FDDRC_BAND_MARGIN_2 +249 0x0120 //RX_FDDRC_BAND_MARGIN_3 +250 0x0004 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x2000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x2000 //RX_FDDRC_THRD_3_2 +258 0x5000 //RX_FDDRC_THRD_3_3 +259 0x4000 //RX_FDDRC_SLANT_0_0 +260 0x4000 //RX_FDDRC_SLANT_0_1 +261 0x4000 //RX_FDDRC_SLANT_0_2 +262 0x4000 //RX_FDDRC_SLANT_0_3 +263 0x7FFF //RX_FDDRC_SLANT_1_0 +264 0x7FFF //RX_FDDRC_SLANT_1_1 +265 0x7FFF //RX_FDDRC_SLANT_1_2 +266 0x7FFF //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +286 0x0011 //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 +#VOL 1 +163 0x6000 //RX_TDDRC_ALPHA_UP_1 +164 0x6000 //RX_TDDRC_ALPHA_UP_2 +165 0x6000 //RX_TDDRC_ALPHA_UP_3 +166 0x1000 //RX_TDDRC_ALPHA_UP_4 +184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +185 0x4000 //RX_TDDRC_ALPHA_DWN_2 +186 0x4000 //RX_TDDRC_ALPHA_DWN_3 +189 0x4000 //RX_TDDRC_ALPHA_DWN_4 +190 0x7214 //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +269 0x0002 //RX_TDDRC_THRD_0 +270 0x0004 //RX_TDDRC_THRD_1 +271 0x1800 //RX_TDDRC_THRD_2 +272 0x1800 //RX_TDDRC_THRD_3 +273 0x7FFF //RX_TDDRC_SLANT_0 +274 0x7FFF //RX_TDDRC_SLANT_1 +275 0x6000 //RX_TDDRC_ALPHA_UP_0 +276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x199A //RX_TDDRC_HMNC_GAIN +279 0x0001 //RX_TDDRC_SMT_FLAG +280 0x0CCD //RX_TDDRC_SMT_W +281 0x0780 //RX_TDDRC_DRC_GAIN +195 0x0020 //RX_FDEQ_SUBNUM +196 0x6868 //RX_FDEQ_GAIN_0 +197 0x6848 //RX_FDEQ_GAIN_1 +198 0x4848 //RX_FDEQ_GAIN_2 +199 0x3434 //RX_FDEQ_GAIN_3 +200 0x3840 //RX_FDEQ_GAIN_4 +201 0x4838 //RX_FDEQ_GAIN_5 +202 0x5444 //RX_FDEQ_GAIN_6 +203 0x443C //RX_FDEQ_GAIN_7 +204 0x3C60 //RX_FDEQ_GAIN_8 +205 0x6460 //RX_FDEQ_GAIN_9 +206 0x6064 //RX_FDEQ_GAIN_10 +207 0x5C5C //RX_FDEQ_GAIN_11 +208 0x5440 //RX_FDEQ_GAIN_12 +209 0x4040 //RX_FDEQ_GAIN_13 +210 0x4040 //RX_FDEQ_GAIN_14 +211 0x5858 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0202 //RX_FDEQ_BIN_0 +221 0x0203 //RX_FDEQ_BIN_1 +222 0x0303 //RX_FDEQ_BIN_2 +223 0x0304 //RX_FDEQ_BIN_3 +224 0x0404 //RX_FDEQ_BIN_4 +225 0x0308 //RX_FDEQ_BIN_5 +226 0x0808 //RX_FDEQ_BIN_6 +227 0x090A //RX_FDEQ_BIN_7 +228 0x0B0C //RX_FDEQ_BIN_8 +229 0x0D0E //RX_FDEQ_BIN_9 +230 0x1013 //RX_FDEQ_BIN_10 +231 0x1719 //RX_FDEQ_BIN_11 +232 0x1B1E //RX_FDEQ_BIN_12 +233 0x1E1E //RX_FDEQ_BIN_13 +234 0x1E28 //RX_FDEQ_BIN_14 +235 0x282C //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x4000 //RX_FDEQ_RESRV_0 +245 0x0320 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0035 //RX_FDDRC_BAND_MARGIN_1 +248 0x00D5 //RX_FDDRC_BAND_MARGIN_2 +249 0x0120 //RX_FDDRC_BAND_MARGIN_3 +250 0x0004 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x2000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x2000 //RX_FDDRC_THRD_3_2 +258 0x5000 //RX_FDDRC_THRD_3_3 +259 0x4000 //RX_FDDRC_SLANT_0_0 +260 0x4000 //RX_FDDRC_SLANT_0_1 +261 0x4000 //RX_FDDRC_SLANT_0_2 +262 0x4000 //RX_FDDRC_SLANT_0_3 +263 0x7FFF //RX_FDDRC_SLANT_1_0 +264 0x7FFF //RX_FDDRC_SLANT_1_1 +265 0x7FFF //RX_FDDRC_SLANT_1_2 +266 0x7FFF //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +286 0x0019 //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 +#VOL 2 +163 0x6000 //RX_TDDRC_ALPHA_UP_1 +164 0x6000 //RX_TDDRC_ALPHA_UP_2 +165 0x6000 //RX_TDDRC_ALPHA_UP_3 +166 0x1000 //RX_TDDRC_ALPHA_UP_4 +184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +185 0x4000 //RX_TDDRC_ALPHA_DWN_2 +186 0x4000 //RX_TDDRC_ALPHA_DWN_3 +189 0x4000 //RX_TDDRC_ALPHA_DWN_4 +190 0x7214 //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +269 0x0002 //RX_TDDRC_THRD_0 +270 0x0004 //RX_TDDRC_THRD_1 +271 0x1800 //RX_TDDRC_THRD_2 +272 0x1800 //RX_TDDRC_THRD_3 +273 0x7FFF //RX_TDDRC_SLANT_0 +274 0x7FFF //RX_TDDRC_SLANT_1 +275 0x6000 //RX_TDDRC_ALPHA_UP_0 +276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x199A //RX_TDDRC_HMNC_GAIN +279 0x0001 //RX_TDDRC_SMT_FLAG +280 0x0CCD //RX_TDDRC_SMT_W +281 0x0780 //RX_TDDRC_DRC_GAIN +195 0x0020 //RX_FDEQ_SUBNUM +196 0x6868 //RX_FDEQ_GAIN_0 +197 0x6848 //RX_FDEQ_GAIN_1 +198 0x4848 //RX_FDEQ_GAIN_2 +199 0x3434 //RX_FDEQ_GAIN_3 +200 0x3840 //RX_FDEQ_GAIN_4 +201 0x4838 //RX_FDEQ_GAIN_5 +202 0x5444 //RX_FDEQ_GAIN_6 +203 0x443C //RX_FDEQ_GAIN_7 +204 0x3C60 //RX_FDEQ_GAIN_8 +205 0x6460 //RX_FDEQ_GAIN_9 +206 0x6064 //RX_FDEQ_GAIN_10 +207 0x5C5C //RX_FDEQ_GAIN_11 +208 0x5440 //RX_FDEQ_GAIN_12 +209 0x4040 //RX_FDEQ_GAIN_13 +210 0x4040 //RX_FDEQ_GAIN_14 +211 0x5858 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0202 //RX_FDEQ_BIN_0 +221 0x0203 //RX_FDEQ_BIN_1 +222 0x0303 //RX_FDEQ_BIN_2 +223 0x0304 //RX_FDEQ_BIN_3 +224 0x0404 //RX_FDEQ_BIN_4 +225 0x0308 //RX_FDEQ_BIN_5 +226 0x0808 //RX_FDEQ_BIN_6 +227 0x090A //RX_FDEQ_BIN_7 +228 0x0B0C //RX_FDEQ_BIN_8 +229 0x0D0E //RX_FDEQ_BIN_9 +230 0x1013 //RX_FDEQ_BIN_10 +231 0x1719 //RX_FDEQ_BIN_11 +232 0x1B1E //RX_FDEQ_BIN_12 +233 0x1E1E //RX_FDEQ_BIN_13 +234 0x1E28 //RX_FDEQ_BIN_14 +235 0x282C //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x4000 //RX_FDEQ_RESRV_0 +245 0x0320 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0035 //RX_FDDRC_BAND_MARGIN_1 +248 0x00D5 //RX_FDDRC_BAND_MARGIN_2 +249 0x0120 //RX_FDDRC_BAND_MARGIN_3 +250 0x0004 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x2000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x2000 //RX_FDDRC_THRD_3_2 +258 0x5000 //RX_FDDRC_THRD_3_3 +259 0x4000 //RX_FDDRC_SLANT_0_0 +260 0x4000 //RX_FDDRC_SLANT_0_1 +261 0x4000 //RX_FDDRC_SLANT_0_2 +262 0x4000 //RX_FDDRC_SLANT_0_3 +263 0x7FFF //RX_FDDRC_SLANT_1_0 +264 0x7FFF //RX_FDDRC_SLANT_1_1 +265 0x7FFF //RX_FDDRC_SLANT_1_2 +266 0x7FFF //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +286 0x0025 //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 +#VOL 3 +163 0x6000 //RX_TDDRC_ALPHA_UP_1 +164 0x6000 //RX_TDDRC_ALPHA_UP_2 +165 0x6000 //RX_TDDRC_ALPHA_UP_3 +166 0x1000 //RX_TDDRC_ALPHA_UP_4 +184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +185 0x4000 //RX_TDDRC_ALPHA_DWN_2 +186 0x4000 //RX_TDDRC_ALPHA_DWN_3 +189 0x4000 //RX_TDDRC_ALPHA_DWN_4 +190 0x7214 //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +269 0x0002 //RX_TDDRC_THRD_0 +270 0x0004 //RX_TDDRC_THRD_1 +271 0x1800 //RX_TDDRC_THRD_2 +272 0x1800 //RX_TDDRC_THRD_3 +273 0x7FFF //RX_TDDRC_SLANT_0 +274 0x7FFF //RX_TDDRC_SLANT_1 +275 0x6000 //RX_TDDRC_ALPHA_UP_0 +276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x199A //RX_TDDRC_HMNC_GAIN +279 0x0001 //RX_TDDRC_SMT_FLAG +280 0x0CCD //RX_TDDRC_SMT_W +281 0x0780 //RX_TDDRC_DRC_GAIN +195 0x0020 //RX_FDEQ_SUBNUM +196 0x6868 //RX_FDEQ_GAIN_0 +197 0x6848 //RX_FDEQ_GAIN_1 +198 0x4848 //RX_FDEQ_GAIN_2 +199 0x3434 //RX_FDEQ_GAIN_3 +200 0x3840 //RX_FDEQ_GAIN_4 +201 0x4838 //RX_FDEQ_GAIN_5 +202 0x5444 //RX_FDEQ_GAIN_6 +203 0x443C //RX_FDEQ_GAIN_7 +204 0x3C60 //RX_FDEQ_GAIN_8 +205 0x6460 //RX_FDEQ_GAIN_9 +206 0x6064 //RX_FDEQ_GAIN_10 +207 0x5C5C //RX_FDEQ_GAIN_11 +208 0x5440 //RX_FDEQ_GAIN_12 +209 0x4040 //RX_FDEQ_GAIN_13 +210 0x4040 //RX_FDEQ_GAIN_14 +211 0x5858 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0202 //RX_FDEQ_BIN_0 +221 0x0203 //RX_FDEQ_BIN_1 +222 0x0303 //RX_FDEQ_BIN_2 +223 0x0304 //RX_FDEQ_BIN_3 +224 0x0404 //RX_FDEQ_BIN_4 +225 0x0308 //RX_FDEQ_BIN_5 +226 0x0808 //RX_FDEQ_BIN_6 +227 0x090A //RX_FDEQ_BIN_7 +228 0x0B0C //RX_FDEQ_BIN_8 +229 0x0D0E //RX_FDEQ_BIN_9 +230 0x1013 //RX_FDEQ_BIN_10 +231 0x1719 //RX_FDEQ_BIN_11 +232 0x1B1E //RX_FDEQ_BIN_12 +233 0x1E1E //RX_FDEQ_BIN_13 +234 0x1E28 //RX_FDEQ_BIN_14 +235 0x282C //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x4000 //RX_FDEQ_RESRV_0 +245 0x0320 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0035 //RX_FDDRC_BAND_MARGIN_1 +248 0x00D5 //RX_FDDRC_BAND_MARGIN_2 +249 0x0120 //RX_FDDRC_BAND_MARGIN_3 +250 0x0004 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x2000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x2000 //RX_FDDRC_THRD_3_2 +258 0x5000 //RX_FDDRC_THRD_3_3 +259 0x4000 //RX_FDDRC_SLANT_0_0 +260 0x4000 //RX_FDDRC_SLANT_0_1 +261 0x4000 //RX_FDDRC_SLANT_0_2 +262 0x4000 //RX_FDDRC_SLANT_0_3 +263 0x7FFF //RX_FDDRC_SLANT_1_0 +264 0x7FFF //RX_FDDRC_SLANT_1_1 +265 0x7FFF //RX_FDDRC_SLANT_1_2 +266 0x7FFF //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +286 0x0036 //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 +#VOL 4 +163 0x6000 //RX_TDDRC_ALPHA_UP_1 +164 0x6000 //RX_TDDRC_ALPHA_UP_2 +165 0x6000 //RX_TDDRC_ALPHA_UP_3 +166 0x1000 //RX_TDDRC_ALPHA_UP_4 +184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +185 0x4000 //RX_TDDRC_ALPHA_DWN_2 +186 0x4000 //RX_TDDRC_ALPHA_DWN_3 +189 0x4000 //RX_TDDRC_ALPHA_DWN_4 +190 0x7214 //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +269 0x0002 //RX_TDDRC_THRD_0 +270 0x0004 //RX_TDDRC_THRD_1 +271 0x1800 //RX_TDDRC_THRD_2 +272 0x1800 //RX_TDDRC_THRD_3 +273 0x7FFF //RX_TDDRC_SLANT_0 +274 0x7FFF //RX_TDDRC_SLANT_1 +275 0x6000 //RX_TDDRC_ALPHA_UP_0 +276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x199A //RX_TDDRC_HMNC_GAIN +279 0x0001 //RX_TDDRC_SMT_FLAG +280 0x0CCD //RX_TDDRC_SMT_W +281 0x0D56 //RX_TDDRC_DRC_GAIN +195 0x0020 //RX_FDEQ_SUBNUM +196 0x6868 //RX_FDEQ_GAIN_0 +197 0x6850 //RX_FDEQ_GAIN_1 +198 0x5048 //RX_FDEQ_GAIN_2 +199 0x383C //RX_FDEQ_GAIN_3 +200 0x4048 //RX_FDEQ_GAIN_4 +201 0x7040 //RX_FDEQ_GAIN_5 +202 0x4C44 //RX_FDEQ_GAIN_6 +203 0x4448 //RX_FDEQ_GAIN_7 +204 0x4868 //RX_FDEQ_GAIN_8 +205 0x7C70 //RX_FDEQ_GAIN_9 +206 0x707C //RX_FDEQ_GAIN_10 +207 0x786C //RX_FDEQ_GAIN_11 +208 0x6454 //RX_FDEQ_GAIN_12 +209 0x604C //RX_FDEQ_GAIN_13 +210 0x585C //RX_FDEQ_GAIN_14 +211 0x7480 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0202 //RX_FDEQ_BIN_0 +221 0x0203 //RX_FDEQ_BIN_1 +222 0x0303 //RX_FDEQ_BIN_2 +223 0x0304 //RX_FDEQ_BIN_3 +224 0x0404 //RX_FDEQ_BIN_4 +225 0x0308 //RX_FDEQ_BIN_5 +226 0x0808 //RX_FDEQ_BIN_6 +227 0x090A //RX_FDEQ_BIN_7 +228 0x0B0C //RX_FDEQ_BIN_8 +229 0x0D0E //RX_FDEQ_BIN_9 +230 0x1013 //RX_FDEQ_BIN_10 +231 0x1719 //RX_FDEQ_BIN_11 +232 0x1B1E //RX_FDEQ_BIN_12 +233 0x1E1E //RX_FDEQ_BIN_13 +234 0x1E28 //RX_FDEQ_BIN_14 +235 0x282C //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x4000 //RX_FDEQ_RESRV_0 +245 0x0320 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0035 //RX_FDDRC_BAND_MARGIN_1 +248 0x00D5 //RX_FDDRC_BAND_MARGIN_2 +249 0x0120 //RX_FDDRC_BAND_MARGIN_3 +250 0x0004 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x2000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x2000 //RX_FDDRC_THRD_3_2 +258 0x5000 //RX_FDDRC_THRD_3_3 +259 0x4000 //RX_FDDRC_SLANT_0_0 +260 0x4000 //RX_FDDRC_SLANT_0_1 +261 0x4000 //RX_FDDRC_SLANT_0_2 +262 0x4000 //RX_FDDRC_SLANT_0_3 +263 0x7FFF //RX_FDDRC_SLANT_1_0 +264 0x7FFF //RX_FDDRC_SLANT_1_1 +265 0x7FFF //RX_FDDRC_SLANT_1_2 +266 0x7FFF //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +286 0x0034 //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 +#VOL 5 +163 0x6000 //RX_TDDRC_ALPHA_UP_1 +164 0x6000 //RX_TDDRC_ALPHA_UP_2 +165 0x6000 //RX_TDDRC_ALPHA_UP_3 +166 0x1000 //RX_TDDRC_ALPHA_UP_4 +184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +185 0x4000 //RX_TDDRC_ALPHA_DWN_2 +186 0x4000 //RX_TDDRC_ALPHA_DWN_3 +189 0x4000 //RX_TDDRC_ALPHA_DWN_4 +190 0x7214 //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +269 0x0002 //RX_TDDRC_THRD_0 +270 0x0004 //RX_TDDRC_THRD_1 +271 0x1800 //RX_TDDRC_THRD_2 +272 0x1800 //RX_TDDRC_THRD_3 +273 0x7FFF //RX_TDDRC_SLANT_0 +274 0x7FFF //RX_TDDRC_SLANT_1 +275 0x6000 //RX_TDDRC_ALPHA_UP_0 +276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x199A //RX_TDDRC_HMNC_GAIN +279 0x0001 //RX_TDDRC_SMT_FLAG +280 0x0CCD //RX_TDDRC_SMT_W +281 0x0D56 //RX_TDDRC_DRC_GAIN +195 0x0020 //RX_FDEQ_SUBNUM +196 0x6868 //RX_FDEQ_GAIN_0 +197 0x6850 //RX_FDEQ_GAIN_1 +198 0x5048 //RX_FDEQ_GAIN_2 +199 0x383C //RX_FDEQ_GAIN_3 +200 0x4048 //RX_FDEQ_GAIN_4 +201 0x7040 //RX_FDEQ_GAIN_5 +202 0x4C44 //RX_FDEQ_GAIN_6 +203 0x4448 //RX_FDEQ_GAIN_7 +204 0x4868 //RX_FDEQ_GAIN_8 +205 0x7C70 //RX_FDEQ_GAIN_9 +206 0x707C //RX_FDEQ_GAIN_10 +207 0x786C //RX_FDEQ_GAIN_11 +208 0x6454 //RX_FDEQ_GAIN_12 +209 0x604C //RX_FDEQ_GAIN_13 +210 0x585C //RX_FDEQ_GAIN_14 +211 0x7480 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0202 //RX_FDEQ_BIN_0 +221 0x0203 //RX_FDEQ_BIN_1 +222 0x0303 //RX_FDEQ_BIN_2 +223 0x0304 //RX_FDEQ_BIN_3 +224 0x0404 //RX_FDEQ_BIN_4 +225 0x0308 //RX_FDEQ_BIN_5 +226 0x0808 //RX_FDEQ_BIN_6 +227 0x090A //RX_FDEQ_BIN_7 +228 0x0B0C //RX_FDEQ_BIN_8 +229 0x0D0E //RX_FDEQ_BIN_9 +230 0x1013 //RX_FDEQ_BIN_10 +231 0x1719 //RX_FDEQ_BIN_11 +232 0x1B1E //RX_FDEQ_BIN_12 +233 0x1E1E //RX_FDEQ_BIN_13 +234 0x1E28 //RX_FDEQ_BIN_14 +235 0x282C //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x4000 //RX_FDEQ_RESRV_0 +245 0x0320 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0035 //RX_FDDRC_BAND_MARGIN_1 +248 0x00D5 //RX_FDDRC_BAND_MARGIN_2 +249 0x0120 //RX_FDDRC_BAND_MARGIN_3 +250 0x0004 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x2000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x2000 //RX_FDDRC_THRD_3_2 +258 0x5000 //RX_FDDRC_THRD_3_3 +259 0x4000 //RX_FDDRC_SLANT_0_0 +260 0x4000 //RX_FDDRC_SLANT_0_1 +261 0x4000 //RX_FDDRC_SLANT_0_2 +262 0x4000 //RX_FDDRC_SLANT_0_3 +263 0x7FFF //RX_FDDRC_SLANT_1_0 +264 0x7FFF //RX_FDDRC_SLANT_1_1 +265 0x7FFF //RX_FDDRC_SLANT_1_2 +266 0x7FFF //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +286 0x0059 //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 +#VOL 6 +163 0x6000 //RX_TDDRC_ALPHA_UP_1 +164 0x6000 //RX_TDDRC_ALPHA_UP_2 +165 0x6000 //RX_TDDRC_ALPHA_UP_3 +166 0x1000 //RX_TDDRC_ALPHA_UP_4 +184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +185 0x4000 //RX_TDDRC_ALPHA_DWN_2 +186 0x4000 //RX_TDDRC_ALPHA_DWN_3 +189 0x4000 //RX_TDDRC_ALPHA_DWN_4 +190 0x7214 //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +269 0x0002 //RX_TDDRC_THRD_0 +270 0x0004 //RX_TDDRC_THRD_1 +271 0x1800 //RX_TDDRC_THRD_2 +272 0x1800 //RX_TDDRC_THRD_3 +273 0x7FFF //RX_TDDRC_SLANT_0 +274 0x7FFF //RX_TDDRC_SLANT_1 +275 0x6000 //RX_TDDRC_ALPHA_UP_0 +276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x199A //RX_TDDRC_HMNC_GAIN +279 0x0001 //RX_TDDRC_SMT_FLAG +280 0x0CCD //RX_TDDRC_SMT_W +281 0x0D56 //RX_TDDRC_DRC_GAIN +195 0x0020 //RX_FDEQ_SUBNUM +196 0x6868 //RX_FDEQ_GAIN_0 +197 0x6850 //RX_FDEQ_GAIN_1 +198 0x5048 //RX_FDEQ_GAIN_2 +199 0x383C //RX_FDEQ_GAIN_3 +200 0x4048 //RX_FDEQ_GAIN_4 +201 0x7040 //RX_FDEQ_GAIN_5 +202 0x4C44 //RX_FDEQ_GAIN_6 +203 0x4448 //RX_FDEQ_GAIN_7 +204 0x4868 //RX_FDEQ_GAIN_8 +205 0x7C70 //RX_FDEQ_GAIN_9 +206 0x707C //RX_FDEQ_GAIN_10 +207 0x786C //RX_FDEQ_GAIN_11 +208 0x6454 //RX_FDEQ_GAIN_12 +209 0x604C //RX_FDEQ_GAIN_13 +210 0x585C //RX_FDEQ_GAIN_14 +211 0x7480 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0202 //RX_FDEQ_BIN_0 +221 0x0203 //RX_FDEQ_BIN_1 +222 0x0303 //RX_FDEQ_BIN_2 +223 0x0304 //RX_FDEQ_BIN_3 +224 0x0404 //RX_FDEQ_BIN_4 +225 0x0308 //RX_FDEQ_BIN_5 +226 0x0808 //RX_FDEQ_BIN_6 +227 0x090A //RX_FDEQ_BIN_7 +228 0x0B0C //RX_FDEQ_BIN_8 +229 0x0D0E //RX_FDEQ_BIN_9 +230 0x1013 //RX_FDEQ_BIN_10 +231 0x1719 //RX_FDEQ_BIN_11 +232 0x1B1E //RX_FDEQ_BIN_12 +233 0x1E1E //RX_FDEQ_BIN_13 +234 0x1E28 //RX_FDEQ_BIN_14 +235 0x282C //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x4000 //RX_FDEQ_RESRV_0 +245 0x0320 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0035 //RX_FDDRC_BAND_MARGIN_1 +248 0x00D5 //RX_FDDRC_BAND_MARGIN_2 +249 0x0120 //RX_FDDRC_BAND_MARGIN_3 +250 0x0004 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x2000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x2000 //RX_FDDRC_THRD_3_2 +258 0x5000 //RX_FDDRC_THRD_3_3 +259 0x4000 //RX_FDDRC_SLANT_0_0 +260 0x4000 //RX_FDDRC_SLANT_0_1 +261 0x4000 //RX_FDDRC_SLANT_0_2 +262 0x4000 //RX_FDDRC_SLANT_0_3 +263 0x7FFF //RX_FDDRC_SLANT_1_0 +264 0x7FFF //RX_FDDRC_SLANT_1_1 +265 0x7FFF //RX_FDDRC_SLANT_1_2 +266 0x7FFF //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +286 0x0100 //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 #CASE_NAME HEADSET-TTY_HCO-VOICE_GENERIC-FB -#PARAM_MODE FULL -#PARAM_TYPE TX+RX -#TOTAL_CUSTOM_STEP 7 +#PARAM_MODE Full +#PARAM_TYPE TX+2RX +#TOTAL_CUSTOM_STEP 7+7 #TX 0 0x0001 //TX_OPERATION_MODE_0 1 0x0000 //TX_OPERATION_MODE_1 @@ -40592,7 +61660,7 @@ 239 0x0000 //TX_DT_RESRV_7 240 0x0000 //TX_DT_RESRV_8 241 0x0000 //TX_DT_RESRV_9 -242 0xF200 //TX_THR_SN_EST_0 +242 0xF700 //TX_THR_SN_EST_0 243 0xF400 //TX_THR_SN_EST_1 244 0xF800 //TX_THR_SN_EST_2 245 0xF600 //TX_THR_SN_EST_3 @@ -40601,12 +61669,12 @@ 248 0xF800 //TX_THR_SN_EST_6 249 0xF800 //TX_THR_SN_EST_7 250 0x0100 //TX_DELTA_THR_SN_EST_0 -251 0x0000 //TX_DELTA_THR_SN_EST_1 +251 0x0100 //TX_DELTA_THR_SN_EST_1 252 0x0100 //TX_DELTA_THR_SN_EST_2 -253 0x0100 //TX_DELTA_THR_SN_EST_3 +253 0x0200 //TX_DELTA_THR_SN_EST_3 254 0x0200 //TX_DELTA_THR_SN_EST_4 255 0x0200 //TX_DELTA_THR_SN_EST_5 -256 0x0200 //TX_DELTA_THR_SN_EST_6 +256 0x0000 //TX_DELTA_THR_SN_EST_6 257 0x0200 //TX_DELTA_THR_SN_EST_7 258 0x4000 //TX_LAMBDA_NN_EST_0 259 0x4000 //TX_LAMBDA_NN_EST_1 @@ -40632,12 +61700,12 @@ 279 0x0000 //TX_B_POST_FLT_0 280 0x0000 //TX_B_POST_FLT_1 281 0x001A //TX_NS_LVL_CTRL_0 -282 0x001A //TX_NS_LVL_CTRL_1 +282 0x0014 //TX_NS_LVL_CTRL_1 283 0x0014 //TX_NS_LVL_CTRL_2 -284 0x0014 //TX_NS_LVL_CTRL_3 +284 0x000C //TX_NS_LVL_CTRL_3 285 0x000C //TX_NS_LVL_CTRL_4 286 0x000C //TX_NS_LVL_CTRL_5 -287 0x000C //TX_NS_LVL_CTRL_6 +287 0x001A //TX_NS_LVL_CTRL_6 288 0x000C //TX_NS_LVL_CTRL_7 289 0x000E //TX_MIN_GAIN_S_0 290 0x0014 //TX_MIN_GAIN_S_1 @@ -40653,10 +61721,10 @@ 300 0x7FFF //TX_SNRI_SUP_0 301 0x7FFF //TX_SNRI_SUP_1 302 0x7FFF //TX_SNRI_SUP_2 -303 0x7FFF //TX_SNRI_SUP_3 +303 0x4000 //TX_SNRI_SUP_3 304 0x4000 //TX_SNRI_SUP_4 305 0x4000 //TX_SNRI_SUP_5 -306 0x4000 //TX_SNRI_SUP_6 +306 0x7FFF //TX_SNRI_SUP_6 307 0x4000 //TX_SNRI_SUP_7 308 0x1200 //TX_THR_LFNS 309 0x0147 //TX_G_LFNS @@ -40665,12 +61733,12 @@ 312 0x7FFF //TX_A_POST_FILT_0 313 0x7FFF //TX_A_POST_FILT_1 314 0x4000 //TX_A_POST_FILT_S_0 -315 0x199A //TX_A_POST_FILT_S_1 +315 0x1000 //TX_A_POST_FILT_S_1 316 0x1000 //TX_A_POST_FILT_S_2 -317 0x1000 //TX_A_POST_FILT_S_3 +317 0x6666 //TX_A_POST_FILT_S_3 318 0x6666 //TX_A_POST_FILT_S_4 319 0x6666 //TX_A_POST_FILT_S_5 -320 0x6666 //TX_A_POST_FILT_S_6 +320 0x199A //TX_A_POST_FILT_S_6 321 0x6666 //TX_A_POST_FILT_S_7 322 0x2000 //TX_B_POST_FILT_0 323 0x2000 //TX_B_POST_FILT_1 @@ -40717,7 +61785,7 @@ 364 0x0000 //TX_K_APT 365 0x0001 //TX_NOISEDET 366 0x05A0 //TX_NDETCT -367 0x000A //TX_NOISE_TH_0 +367 0x04E8 //TX_NOISE_TH_0 368 0x1388 //TX_NOISE_TH_0_2 369 0x3A98 //TX_NOISE_TH_0_3 370 0x0C80 //TX_NOISE_TH_1 @@ -40729,11 +61797,11 @@ 376 0x7FFF //TX_NOISE_TH_5_3 377 0x7FFF //TX_NOISE_TH_5_4 378 0x00C8 //TX_NOISE_TH_6 -379 0x000A //TX_MINENOISE_TH -380 0x0000 //TX_MINENOISE_MIC0_TH_MTS -381 0x0000 //TX_MINENOISE_MIC0_TH_EXP -382 0x0000 //TX_MINENOISE_MIC0_S_TH_MTS -383 0x0000 //TX_MINENOISE_MIC0_S_TH_EXP +379 0x02BC //TX_MINENOISE_TH +380 0xD508 //TX_MORENS_TFMASK_TH +381 0x0001 //TX_DRC_QUIET_FLOOR +382 0x3A98 //TX_RATIODTL_CUT_TH +383 0x1482 //TX_DT_CUT_K1 384 0x6400 //TX_OUT_ENER_S_TH_CLEAN 385 0x6400 //TX_OUT_ENER_S_TH_LESSCLEAN 386 0x6400 //TX_OUT_ENER_S_TH_NOISY @@ -40741,22 +61809,22 @@ 388 0x7D00 //TX_OUT_ENER_TH_SPEECH 389 0x0000 //TX_SN_NPB_GAIN 390 0x0000 //TX_NN_NPB_GAIN -391 0x0000 //TX_CSX_ALPHA_0 -392 0x0000 //TX_CSX_ALPHA_1 -393 0x0000 //TX_CSX_ALPHA_2 -394 0x0000 //TX_CSX_ALPHA_3 -395 0x0000 //TX_MU_ARSP_EST -396 0x0000 //TX_P_OUTBEAM_MIN_TH +391 0x7FFF //TX_POST_MASK_SUP_HSNE +392 0x1388 //TX_TAIL_DET_TH +393 0x4000 //TX_B_LESSCUT_RTO_WTA +394 0x0000 //TX_MEL_G_R +395 0x0080 //TX_SUPHIGH_TH +396 0x0000 //TX_MASK_G_R 397 0x0000 //TX_EXTRA_NS_L -398 0x0000 //TX_EXTRA_NS_A -399 0x0000 //TX_VR_NOISE_FLOOR_TH +398 0x1800 //TX_C_POST_FLT_MASK +399 0x7FFF //TX_A_POST_FLT_WNS 400 0x0000 //TX_MIN_G_LOW300HZ 401 0x0010 //TX_MAXLEVEL_CNG 402 0x0000 //TX_STN_NOISE_TH 403 0x0000 //TX_POST_MASK_SUP 404 0x0000 //TX_POST_MASK_ADJUST 405 0x0014 //TX_NS_ENOISE_MIC0_TH -406 0x0014 //TX_MINENOISE_MIC0_TH +406 0x04E7 //TX_MINENOISE_MIC0_TH 407 0x0226 //TX_MINENOISE_MIC0_S_TH 408 0x2879 //TX_MIN_G_CTRL_SSNS 409 0x0400 //TX_METAL_RTO_THR @@ -40864,16 +61932,16 @@ 511 0x6666 //TX_MIC_TO_BFGAIN 512 0x6666 //TX_MICTOBFGAIN0 513 0x0014 //TX_FASTMUE_TH -514 0x0000 //TX_DERVB_LEN_0 -515 0x0000 //TX_DERVB_LEN_1 -516 0x0000 //TX_RHO_DERVB -517 0x0000 //TX_MIC_INDX_DERVB -518 0x0000 //TX_MU_DERVB -519 0x0000 //TX_DR_RESRV_0 -520 0x0000 //TX_DR_RESRV_1 -521 0x0000 //TX_DR_RESRV_2 -522 0x0000 //TX_DR_RESRV_3 -523 0x0000 //TX_DR_RESRV_4 +514 0xC000 //TX_DEREVERB_LF_MU +515 0xC000 //TX_DEREVERB_HF_MU +516 0xCCCC //TX_DEREVERB_DELAY +517 0xD999 //TX_DEREVERB_COEF_LEN +518 0x1F40 //TX_DEREVERB_DNR +519 0x0000 //TX_DEREVERB_ALPHA +520 0x0000 //TX_DEREVERB_BETA +521 0x0000 //TX_GSC_RTOL_TH +522 0x7000 //TX_GSC_RTOH_TH +523 0x0064 //TX_WIDE2_MEANHTH 524 0x0000 //TX_DR_RESRV_5 525 0x0000 //TX_DR_RESRV_6 526 0x0000 //TX_DR_RESRV_7 @@ -41239,16 +62307,81 @@ 886 0x0000 //TX_FASTNS_TFMASKBIN_TH2 887 0x0000 //TX_FASTNS_TFMASKBIN_TH3 888 0x00C8 //TX_FASTNS_ARSPC_TH -889 0xD99A //TX_FASTNS_MASK5_TH +889 0xC000 //TX_FASTNS_MASK5_TH 890 0x051F //TX_POSTSSA_MIN_G_VR_MASK -891 0x7FFF //TX_A_LESSCUT_RTO_MASK +891 0x7000 //TX_A_LESSCUT_RTO_MASK 892 0x1770 //TX_FASTNS_NOISETH 893 0xC000 //TX_FASTNS_SSA_THLFL 894 0xC000 //TX_FASTNS_SSA_THHFL 895 0xCCCC //TX_FASTNS_SSA_THLFH 896 0xD999 //TX_FASTNS_SSA_THHFH +897 0x2339 //TX_SENDFUNC_REG_MICMUTE +898 0x0021 //TX_SENDFUNC_REG_MICMUTE1 +899 0x02BC //TX_MICMUTE_RATIO_THR +900 0x0140 //TX_MICMUTE_AMP_THR +901 0x0004 //TX_MICMUTE_HPF_IND +902 0x00C0 //TX_MICMUTE_LOG_EYR_TH +903 0x0008 //TX_MICMUTE_CVG_TIME +904 0x0008 //TX_MICMUTE_RELEASE_TIME +905 0x01FE //TX_MIC_VOLUME_MIC0MUTE +906 0x0020 //TX_MICMUTE_EPD_OFFSET_0 +907 0x001E //TX_MICMUTE_FRQ_AEC_L +908 0x7999 //TX_MICMUTE_EAD_THR +909 0x7FFF //TX_MICMUTE_LAMBDA_CB_NLE +910 0x7FFF //TX_MICMUTE_LAMBDA_RE_EST +911 0x4000 //TX_DTD_THR1_MICMUTE_0 +912 0x7000 //TX_DTD_THR1_MICMUTE_1 +913 0x7FFF //TX_DTD_THR1_MICMUTE_2 +914 0x7FFF //TX_DTD_THR1_MICMUTE_3 +915 0x6CCC //TX_DTD_THR2_MICMUTE_0 +916 0x0400 //TX_MICMUTE_MIN_EQ_RE_EST_0 +917 0x0400 //TX_MICMUTE_MIN_EQ_RE_EST_1 +918 0x1000 //TX_MICMUTE_MIN_EQ_RE_EST_2 +919 0x7FFF //TX_MICMUTE_MIN_EQ_RE_EST_3 +920 0x7FFF //TX_MICMUTE_MIN_EQ_RE_EST_4 +921 0x4000 //TX_MICMUTE_C_POST_FLT +922 0x03E8 //TX_MICMUTE_DT_CUT_K +923 0x0001 //TX_MICMUTE_DT_CUT_THR +924 0x03E8 //TX_MICMUTE_DT_CUT_K2 +925 0x0001 //TX_MICMUTE_DT_CUT_THR2 +926 0x0064 //TX_MICMUTE_DT2_HOLD_N +927 0x1000 //TX_MICMUTE_RATIODTH_THCUT +928 0x1000 //TX_MICMUTE_B_POST_FLT_ECHOL +929 0x7FFF //TX_MICMUTE_B_POST_FLT_ECHOH +930 0x0400 //TX_MICMUTE_C_POST_FLT_MASK +931 0x7999 //TX_MICMUTE_RATIODTL_CUT_TH +932 0x0258 //TX_MICMUTE_DT_CUT_K1 +933 0x0800 //TX_MICMUTE_N2_SN_EST +934 0xFC00 //TX_MICMUTE_THR_SN_EST_0 +935 0x001C //TX_MICMUTE_MIN_G_CTRL_0 +936 0x6000 //TX_MICMUTE_A_POST_FILT_S_0 +937 0x7000 //TX_MICMUTE_B_POST_FILT_0 +938 0x2710 //TX_MIC1RUB_AMP_THR +939 0x0010 //TX_MIC1MUTE_RATIO_THR +940 0x0450 //TX_MIC1MUTE_AMP_THR +941 0x0008 //TX_MIC1MUTE_CVG_TIME +942 0x0008 //TX_MIC1MUTE_RELEASE_TIME +943 0x0000 //TX_AMS_RESRV_01 +944 0x0000 //TX_AMS_RESRV_02 +945 0x0000 //TX_AMS_RESRV_03 +946 0x0000 //TX_AMS_RESRV_04 +947 0x0000 //TX_AMS_RESRV_05 +948 0x0000 //TX_AMS_RESRV_06 +949 0x0000 //TX_AMS_RESRV_07 +950 0x0000 //TX_AMS_RESRV_08 +951 0x0000 //TX_AMS_RESRV_09 +952 0x0000 //TX_AMS_RESRV_10 +953 0x0000 //TX_AMS_RESRV_11 +954 0x0000 //TX_AMS_RESRV_12 +955 0x0000 //TX_AMS_RESRV_13 +956 0x0000 //TX_AMS_RESRV_14 +957 0x0000 //TX_AMS_RESRV_15 +958 0x0000 //TX_AMS_RESRV_16 +959 0x0000 //TX_AMS_RESRV_17 +960 0x0000 //TX_AMS_RESRV_18 +961 0x0000 //TX_AMS_RESRV_19 #RX -0 0x006C //RX_RECVFUNC_MODE_0 +0 0x242C //RX_RECVFUNC_MODE_0 1 0x0000 //RX_RECVFUNC_MODE_1 2 0x0004 //RX_SAMPLINGFREQ_SIG 3 0x0004 //RX_SAMPLINGFREQ_PROC @@ -41258,7 +62391,7 @@ 7 0x4000 //RX_TDDRC_ALPHA_UP_2 8 0x4000 //RX_TDDRC_ALPHA_UP_3 9 0x4000 //RX_TDDRC_ALPHA_UP_4 -10 0x0800 //RX_PGA +10 0x0403 //RX_PGA 11 0x7E56 //RX_A_HP 12 0x4000 //RX_B_PE 13 0x7800 //RX_THR_PITCH_DET_0 @@ -41276,32 +62409,32 @@ 25 0x000A //RX_FENS_RESRV_0 26 0x0190 //RX_FENS_RESRV_1 27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 -28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 -29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +28 0x4000 //RX_TDDRC_ALPHA_DWN_2 +29 0x4000 //RX_TDDRC_ALPHA_DWN_3 30 0x0002 //RX_EXTRA_NS_L 31 0x0800 //RX_EXTRA_NS_A -32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 -33 0x7FFF //RX_TDDRC_LIMITER_THRD +32 0x4000 //RX_TDDRC_ALPHA_DWN_4 +33 0x7214 //RX_TDDRC_LIMITER_THRD 34 0x0800 //RX_TDDRC_LIMITER_GAIN 35 0x199A //RX_A_POST_FLT 36 0x0000 //RX_LMT_THRD 37 0x4000 //RX_LMT_ALPHA 38 0x0020 //RX_FDEQ_SUBNUM 39 0x4848 //RX_FDEQ_GAIN_0 -40 0x4848 //RX_FDEQ_GAIN_1 -41 0x4848 //RX_FDEQ_GAIN_2 -42 0x4850 //RX_FDEQ_GAIN_3 -43 0x4848 //RX_FDEQ_GAIN_4 -44 0x4848 //RX_FDEQ_GAIN_5 -45 0x4568 //RX_FDEQ_GAIN_6 -46 0x485C //RX_FDEQ_GAIN_7 -47 0x5C60 //RX_FDEQ_GAIN_8 -48 0x685C //RX_FDEQ_GAIN_9 -49 0x5648 //RX_FDEQ_GAIN_10 -50 0x484C //RX_FDEQ_GAIN_11 -51 0x706C //RX_FDEQ_GAIN_12 -52 0x7070 //RX_FDEQ_GAIN_13 -53 0x6868 //RX_FDEQ_GAIN_14 +40 0x4040 //RX_FDEQ_GAIN_1 +41 0x3838 //RX_FDEQ_GAIN_2 +42 0x3448 //RX_FDEQ_GAIN_3 +43 0x343C //RX_FDEQ_GAIN_4 +44 0x4040 //RX_FDEQ_GAIN_5 +45 0x4048 //RX_FDEQ_GAIN_6 +46 0x384C //RX_FDEQ_GAIN_7 +47 0x4C54 //RX_FDEQ_GAIN_8 +48 0x5C54 //RX_FDEQ_GAIN_9 +49 0x4E38 //RX_FDEQ_GAIN_10 +50 0x303C //RX_FDEQ_GAIN_11 +51 0x5450 //RX_FDEQ_GAIN_12 +52 0x4860 //RX_FDEQ_GAIN_13 +53 0x6060 //RX_FDEQ_GAIN_14 54 0x6060 //RX_FDEQ_GAIN_15 55 0x4848 //RX_FDEQ_GAIN_16 56 0x4848 //RX_FDEQ_GAIN_17 @@ -41364,20 +62497,20 @@ 113 0x0002 //RX_TDDRC_THRD_1 114 0x1800 //RX_TDDRC_THRD_2 115 0x1800 //RX_TDDRC_THRD_3 -116 0x6000 //RX_TDDRC_SLANT_0 -117 0x6E00 //RX_TDDRC_SLANT_1 +116 0x7FFF //RX_TDDRC_SLANT_0 +117 0x7FFF //RX_TDDRC_SLANT_1 118 0x4000 //RX_TDDRC_ALPHA_UP_0 119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 120 0x0000 //RX_TDDRC_HMNC_FLAG 121 0x199A //RX_TDDRC_HMNC_GAIN 122 0x0001 //RX_TDDRC_SMT_FLAG 123 0x0CCD //RX_TDDRC_SMT_W -124 0x02D2 //RX_TDDRC_DRC_GAIN +124 0x0439 //RX_TDDRC_DRC_GAIN 125 0x7C00 //RX_LAMBDA_PKA_FP -126 0x2000 //RX_TPKA_FP -127 0x2000 //RX_MIN_G_FP -128 0x0080 //RX_MAX_G_FP -129 0x0013 //RX_SPK_VOL +126 0x1B58 //RX_TPKA_FP +127 0x0400 //RX_MIN_G_FP +128 0x0800 //RX_MAX_G_FP +129 0x0100 //RX_SPK_VOL 130 0x0000 //RX_VOL_RESRV_0 131 0x0000 //RX_MAXLEVEL_CNG 132 0x3000 //RX_BWE_UV_TH @@ -41411,40 +62544,40 @@ 8 0x4000 //RX_TDDRC_ALPHA_UP_3 9 0x4000 //RX_TDDRC_ALPHA_UP_4 27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 -28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 -29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 -32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 -33 0x7FFF //RX_TDDRC_LIMITER_THRD +28 0x4000 //RX_TDDRC_ALPHA_DWN_2 +29 0x4000 //RX_TDDRC_ALPHA_DWN_3 +32 0x4000 //RX_TDDRC_ALPHA_DWN_4 +33 0x7214 //RX_TDDRC_LIMITER_THRD 34 0x0800 //RX_TDDRC_LIMITER_GAIN 112 0x0001 //RX_TDDRC_THRD_0 113 0x0002 //RX_TDDRC_THRD_1 114 0x1800 //RX_TDDRC_THRD_2 115 0x1800 //RX_TDDRC_THRD_3 -116 0x6000 //RX_TDDRC_SLANT_0 -117 0x6E00 //RX_TDDRC_SLANT_1 +116 0x7FFF //RX_TDDRC_SLANT_0 +117 0x7FFF //RX_TDDRC_SLANT_1 118 0x4000 //RX_TDDRC_ALPHA_UP_0 119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 120 0x0000 //RX_TDDRC_HMNC_FLAG 121 0x199A //RX_TDDRC_HMNC_GAIN 122 0x0001 //RX_TDDRC_SMT_FLAG 123 0x0CCD //RX_TDDRC_SMT_W -124 0x02D2 //RX_TDDRC_DRC_GAIN +124 0x0439 //RX_TDDRC_DRC_GAIN 38 0x0020 //RX_FDEQ_SUBNUM 39 0x4848 //RX_FDEQ_GAIN_0 -40 0x4848 //RX_FDEQ_GAIN_1 -41 0x4848 //RX_FDEQ_GAIN_2 -42 0x4850 //RX_FDEQ_GAIN_3 -43 0x4848 //RX_FDEQ_GAIN_4 -44 0x4848 //RX_FDEQ_GAIN_5 -45 0x4568 //RX_FDEQ_GAIN_6 -46 0x485C //RX_FDEQ_GAIN_7 -47 0x5C60 //RX_FDEQ_GAIN_8 -48 0x685C //RX_FDEQ_GAIN_9 -49 0x5648 //RX_FDEQ_GAIN_10 -50 0x484C //RX_FDEQ_GAIN_11 -51 0x706C //RX_FDEQ_GAIN_12 -52 0x7070 //RX_FDEQ_GAIN_13 -53 0x6868 //RX_FDEQ_GAIN_14 +40 0x4040 //RX_FDEQ_GAIN_1 +41 0x3838 //RX_FDEQ_GAIN_2 +42 0x3448 //RX_FDEQ_GAIN_3 +43 0x343C //RX_FDEQ_GAIN_4 +44 0x4040 //RX_FDEQ_GAIN_5 +45 0x4048 //RX_FDEQ_GAIN_6 +46 0x384C //RX_FDEQ_GAIN_7 +47 0x4C54 //RX_FDEQ_GAIN_8 +48 0x5C54 //RX_FDEQ_GAIN_9 +49 0x4E38 //RX_FDEQ_GAIN_10 +50 0x303C //RX_FDEQ_GAIN_11 +51 0x5450 //RX_FDEQ_GAIN_12 +52 0x4860 //RX_FDEQ_GAIN_13 +53 0x6060 //RX_FDEQ_GAIN_14 54 0x6060 //RX_FDEQ_GAIN_15 55 0x4848 //RX_FDEQ_GAIN_16 56 0x4848 //RX_FDEQ_GAIN_17 @@ -41502,7 +62635,7 @@ 108 0x7FFF //RX_FDDRC_SLANT_1_2 109 0x7FFF //RX_FDDRC_SLANT_1_3 110 0x0000 //RX_FDDRC_RESRV_0 -129 0x0013 //RX_SPK_VOL +129 0x0012 //RX_SPK_VOL 130 0x0000 //RX_VOL_RESRV_0 #VOL 1 6 0x4000 //RX_TDDRC_ALPHA_UP_1 @@ -41510,40 +62643,40 @@ 8 0x4000 //RX_TDDRC_ALPHA_UP_3 9 0x4000 //RX_TDDRC_ALPHA_UP_4 27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 -28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 -29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 -32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 -33 0x7FFF //RX_TDDRC_LIMITER_THRD +28 0x4000 //RX_TDDRC_ALPHA_DWN_2 +29 0x4000 //RX_TDDRC_ALPHA_DWN_3 +32 0x4000 //RX_TDDRC_ALPHA_DWN_4 +33 0x7214 //RX_TDDRC_LIMITER_THRD 34 0x0800 //RX_TDDRC_LIMITER_GAIN 112 0x0001 //RX_TDDRC_THRD_0 113 0x0002 //RX_TDDRC_THRD_1 114 0x1800 //RX_TDDRC_THRD_2 115 0x1800 //RX_TDDRC_THRD_3 -116 0x6000 //RX_TDDRC_SLANT_0 -117 0x6E00 //RX_TDDRC_SLANT_1 +116 0x7FFF //RX_TDDRC_SLANT_0 +117 0x7FFF //RX_TDDRC_SLANT_1 118 0x4000 //RX_TDDRC_ALPHA_UP_0 119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 120 0x0000 //RX_TDDRC_HMNC_FLAG 121 0x199A //RX_TDDRC_HMNC_GAIN 122 0x0001 //RX_TDDRC_SMT_FLAG 123 0x0CCD //RX_TDDRC_SMT_W -124 0x02D2 //RX_TDDRC_DRC_GAIN +124 0x0439 //RX_TDDRC_DRC_GAIN 38 0x0020 //RX_FDEQ_SUBNUM 39 0x4848 //RX_FDEQ_GAIN_0 -40 0x4848 //RX_FDEQ_GAIN_1 -41 0x4848 //RX_FDEQ_GAIN_2 -42 0x4850 //RX_FDEQ_GAIN_3 -43 0x4848 //RX_FDEQ_GAIN_4 -44 0x4848 //RX_FDEQ_GAIN_5 -45 0x4568 //RX_FDEQ_GAIN_6 -46 0x485C //RX_FDEQ_GAIN_7 -47 0x5C60 //RX_FDEQ_GAIN_8 -48 0x685C //RX_FDEQ_GAIN_9 -49 0x5648 //RX_FDEQ_GAIN_10 -50 0x484C //RX_FDEQ_GAIN_11 -51 0x706C //RX_FDEQ_GAIN_12 -52 0x7070 //RX_FDEQ_GAIN_13 -53 0x6868 //RX_FDEQ_GAIN_14 +40 0x4040 //RX_FDEQ_GAIN_1 +41 0x3838 //RX_FDEQ_GAIN_2 +42 0x3448 //RX_FDEQ_GAIN_3 +43 0x343C //RX_FDEQ_GAIN_4 +44 0x4040 //RX_FDEQ_GAIN_5 +45 0x4048 //RX_FDEQ_GAIN_6 +46 0x384C //RX_FDEQ_GAIN_7 +47 0x4C54 //RX_FDEQ_GAIN_8 +48 0x5C54 //RX_FDEQ_GAIN_9 +49 0x4E38 //RX_FDEQ_GAIN_10 +50 0x303C //RX_FDEQ_GAIN_11 +51 0x5450 //RX_FDEQ_GAIN_12 +52 0x4860 //RX_FDEQ_GAIN_13 +53 0x6060 //RX_FDEQ_GAIN_14 54 0x6060 //RX_FDEQ_GAIN_15 55 0x4848 //RX_FDEQ_GAIN_16 56 0x4848 //RX_FDEQ_GAIN_17 @@ -41601,7 +62734,7 @@ 108 0x7FFF //RX_FDDRC_SLANT_1_2 109 0x7FFF //RX_FDDRC_SLANT_1_3 110 0x0000 //RX_FDDRC_RESRV_0 -129 0x001C //RX_SPK_VOL +129 0x001A //RX_SPK_VOL 130 0x0000 //RX_VOL_RESRV_0 #VOL 2 6 0x4000 //RX_TDDRC_ALPHA_UP_1 @@ -41609,40 +62742,40 @@ 8 0x4000 //RX_TDDRC_ALPHA_UP_3 9 0x4000 //RX_TDDRC_ALPHA_UP_4 27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 -28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 -29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 -32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 -33 0x7FFF //RX_TDDRC_LIMITER_THRD +28 0x4000 //RX_TDDRC_ALPHA_DWN_2 +29 0x4000 //RX_TDDRC_ALPHA_DWN_3 +32 0x4000 //RX_TDDRC_ALPHA_DWN_4 +33 0x7214 //RX_TDDRC_LIMITER_THRD 34 0x0800 //RX_TDDRC_LIMITER_GAIN 112 0x0001 //RX_TDDRC_THRD_0 113 0x0002 //RX_TDDRC_THRD_1 114 0x1800 //RX_TDDRC_THRD_2 115 0x1800 //RX_TDDRC_THRD_3 -116 0x6000 //RX_TDDRC_SLANT_0 -117 0x6E00 //RX_TDDRC_SLANT_1 +116 0x7FFF //RX_TDDRC_SLANT_0 +117 0x7FFF //RX_TDDRC_SLANT_1 118 0x4000 //RX_TDDRC_ALPHA_UP_0 119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 120 0x0000 //RX_TDDRC_HMNC_FLAG 121 0x199A //RX_TDDRC_HMNC_GAIN 122 0x0001 //RX_TDDRC_SMT_FLAG 123 0x0CCD //RX_TDDRC_SMT_W -124 0x02D2 //RX_TDDRC_DRC_GAIN +124 0x0439 //RX_TDDRC_DRC_GAIN 38 0x0020 //RX_FDEQ_SUBNUM 39 0x4848 //RX_FDEQ_GAIN_0 -40 0x4848 //RX_FDEQ_GAIN_1 -41 0x4848 //RX_FDEQ_GAIN_2 -42 0x4850 //RX_FDEQ_GAIN_3 -43 0x4848 //RX_FDEQ_GAIN_4 -44 0x4848 //RX_FDEQ_GAIN_5 -45 0x4568 //RX_FDEQ_GAIN_6 -46 0x485C //RX_FDEQ_GAIN_7 -47 0x5C60 //RX_FDEQ_GAIN_8 -48 0x685C //RX_FDEQ_GAIN_9 -49 0x5648 //RX_FDEQ_GAIN_10 -50 0x484C //RX_FDEQ_GAIN_11 -51 0x706C //RX_FDEQ_GAIN_12 -52 0x7070 //RX_FDEQ_GAIN_13 -53 0x6868 //RX_FDEQ_GAIN_14 +40 0x4040 //RX_FDEQ_GAIN_1 +41 0x3838 //RX_FDEQ_GAIN_2 +42 0x3448 //RX_FDEQ_GAIN_3 +43 0x343C //RX_FDEQ_GAIN_4 +44 0x4040 //RX_FDEQ_GAIN_5 +45 0x4048 //RX_FDEQ_GAIN_6 +46 0x384C //RX_FDEQ_GAIN_7 +47 0x4C54 //RX_FDEQ_GAIN_8 +48 0x5C54 //RX_FDEQ_GAIN_9 +49 0x4E38 //RX_FDEQ_GAIN_10 +50 0x303C //RX_FDEQ_GAIN_11 +51 0x5450 //RX_FDEQ_GAIN_12 +52 0x4860 //RX_FDEQ_GAIN_13 +53 0x6060 //RX_FDEQ_GAIN_14 54 0x6060 //RX_FDEQ_GAIN_15 55 0x4848 //RX_FDEQ_GAIN_16 56 0x4848 //RX_FDEQ_GAIN_17 @@ -41700,7 +62833,7 @@ 108 0x7FFF //RX_FDDRC_SLANT_1_2 109 0x7FFF //RX_FDDRC_SLANT_1_3 110 0x0000 //RX_FDDRC_RESRV_0 -129 0x0028 //RX_SPK_VOL +129 0x0025 //RX_SPK_VOL 130 0x0000 //RX_VOL_RESRV_0 #VOL 3 6 0x4000 //RX_TDDRC_ALPHA_UP_1 @@ -41708,40 +62841,40 @@ 8 0x4000 //RX_TDDRC_ALPHA_UP_3 9 0x4000 //RX_TDDRC_ALPHA_UP_4 27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 -28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 -29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 -32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 -33 0x7FFF //RX_TDDRC_LIMITER_THRD +28 0x4000 //RX_TDDRC_ALPHA_DWN_2 +29 0x4000 //RX_TDDRC_ALPHA_DWN_3 +32 0x4000 //RX_TDDRC_ALPHA_DWN_4 +33 0x7214 //RX_TDDRC_LIMITER_THRD 34 0x0800 //RX_TDDRC_LIMITER_GAIN 112 0x0001 //RX_TDDRC_THRD_0 113 0x0002 //RX_TDDRC_THRD_1 114 0x1800 //RX_TDDRC_THRD_2 115 0x1800 //RX_TDDRC_THRD_3 -116 0x6000 //RX_TDDRC_SLANT_0 -117 0x6E00 //RX_TDDRC_SLANT_1 +116 0x7FFF //RX_TDDRC_SLANT_0 +117 0x7FFF //RX_TDDRC_SLANT_1 118 0x4000 //RX_TDDRC_ALPHA_UP_0 119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 120 0x0000 //RX_TDDRC_HMNC_FLAG 121 0x199A //RX_TDDRC_HMNC_GAIN 122 0x0001 //RX_TDDRC_SMT_FLAG 123 0x0CCD //RX_TDDRC_SMT_W -124 0x02D2 //RX_TDDRC_DRC_GAIN +124 0x0439 //RX_TDDRC_DRC_GAIN 38 0x0020 //RX_FDEQ_SUBNUM 39 0x4848 //RX_FDEQ_GAIN_0 -40 0x4848 //RX_FDEQ_GAIN_1 -41 0x4848 //RX_FDEQ_GAIN_2 -42 0x4850 //RX_FDEQ_GAIN_3 -43 0x4848 //RX_FDEQ_GAIN_4 -44 0x4848 //RX_FDEQ_GAIN_5 -45 0x4568 //RX_FDEQ_GAIN_6 -46 0x485C //RX_FDEQ_GAIN_7 -47 0x5C60 //RX_FDEQ_GAIN_8 -48 0x685C //RX_FDEQ_GAIN_9 -49 0x5648 //RX_FDEQ_GAIN_10 -50 0x484C //RX_FDEQ_GAIN_11 -51 0x706C //RX_FDEQ_GAIN_12 -52 0x7070 //RX_FDEQ_GAIN_13 -53 0x6868 //RX_FDEQ_GAIN_14 +40 0x4040 //RX_FDEQ_GAIN_1 +41 0x3838 //RX_FDEQ_GAIN_2 +42 0x3448 //RX_FDEQ_GAIN_3 +43 0x343C //RX_FDEQ_GAIN_4 +44 0x4040 //RX_FDEQ_GAIN_5 +45 0x4048 //RX_FDEQ_GAIN_6 +46 0x384C //RX_FDEQ_GAIN_7 +47 0x4C54 //RX_FDEQ_GAIN_8 +48 0x5C54 //RX_FDEQ_GAIN_9 +49 0x4E38 //RX_FDEQ_GAIN_10 +50 0x303C //RX_FDEQ_GAIN_11 +51 0x5450 //RX_FDEQ_GAIN_12 +52 0x4860 //RX_FDEQ_GAIN_13 +53 0x6060 //RX_FDEQ_GAIN_14 54 0x6060 //RX_FDEQ_GAIN_15 55 0x4848 //RX_FDEQ_GAIN_16 56 0x4848 //RX_FDEQ_GAIN_17 @@ -41807,40 +62940,40 @@ 8 0x4000 //RX_TDDRC_ALPHA_UP_3 9 0x4000 //RX_TDDRC_ALPHA_UP_4 27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 -28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 -29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 -32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 -33 0x7FFF //RX_TDDRC_LIMITER_THRD +28 0x4000 //RX_TDDRC_ALPHA_DWN_2 +29 0x4000 //RX_TDDRC_ALPHA_DWN_3 +32 0x4000 //RX_TDDRC_ALPHA_DWN_4 +33 0x7214 //RX_TDDRC_LIMITER_THRD 34 0x0800 //RX_TDDRC_LIMITER_GAIN 112 0x0001 //RX_TDDRC_THRD_0 113 0x0002 //RX_TDDRC_THRD_1 114 0x1800 //RX_TDDRC_THRD_2 115 0x1800 //RX_TDDRC_THRD_3 -116 0x6000 //RX_TDDRC_SLANT_0 -117 0x6E00 //RX_TDDRC_SLANT_1 +116 0x7FFF //RX_TDDRC_SLANT_0 +117 0x7FFF //RX_TDDRC_SLANT_1 118 0x4000 //RX_TDDRC_ALPHA_UP_0 119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 120 0x0000 //RX_TDDRC_HMNC_FLAG 121 0x199A //RX_TDDRC_HMNC_GAIN 122 0x0001 //RX_TDDRC_SMT_FLAG 123 0x0CCD //RX_TDDRC_SMT_W -124 0x02D2 //RX_TDDRC_DRC_GAIN +124 0x0439 //RX_TDDRC_DRC_GAIN 38 0x0020 //RX_FDEQ_SUBNUM -39 0x4C4C //RX_FDEQ_GAIN_0 -40 0x4C4C //RX_FDEQ_GAIN_1 -41 0x4C48 //RX_FDEQ_GAIN_2 -42 0x4870 //RX_FDEQ_GAIN_3 -43 0x4848 //RX_FDEQ_GAIN_4 -44 0x4848 //RX_FDEQ_GAIN_5 -45 0x4568 //RX_FDEQ_GAIN_6 -46 0x485C //RX_FDEQ_GAIN_7 -47 0x5C60 //RX_FDEQ_GAIN_8 -48 0x685C //RX_FDEQ_GAIN_9 -49 0x5648 //RX_FDEQ_GAIN_10 -50 0x484C //RX_FDEQ_GAIN_11 -51 0x706C //RX_FDEQ_GAIN_12 -52 0x7070 //RX_FDEQ_GAIN_13 -53 0x6868 //RX_FDEQ_GAIN_14 +39 0x4848 //RX_FDEQ_GAIN_0 +40 0x4040 //RX_FDEQ_GAIN_1 +41 0x3838 //RX_FDEQ_GAIN_2 +42 0x3448 //RX_FDEQ_GAIN_3 +43 0x343C //RX_FDEQ_GAIN_4 +44 0x4040 //RX_FDEQ_GAIN_5 +45 0x4048 //RX_FDEQ_GAIN_6 +46 0x384C //RX_FDEQ_GAIN_7 +47 0x4C54 //RX_FDEQ_GAIN_8 +48 0x5C54 //RX_FDEQ_GAIN_9 +49 0x4E38 //RX_FDEQ_GAIN_10 +50 0x303C //RX_FDEQ_GAIN_11 +51 0x5450 //RX_FDEQ_GAIN_12 +52 0x4860 //RX_FDEQ_GAIN_13 +53 0x6060 //RX_FDEQ_GAIN_14 54 0x6060 //RX_FDEQ_GAIN_15 55 0x4848 //RX_FDEQ_GAIN_16 56 0x4848 //RX_FDEQ_GAIN_17 @@ -41898,7 +63031,7 @@ 108 0x7FFF //RX_FDDRC_SLANT_1_2 109 0x7FFF //RX_FDDRC_SLANT_1_3 110 0x0000 //RX_FDDRC_RESRV_0 -129 0x0052 //RX_SPK_VOL +129 0x004D //RX_SPK_VOL 130 0x0000 //RX_VOL_RESRV_0 #VOL 5 6 0x4000 //RX_TDDRC_ALPHA_UP_1 @@ -41906,40 +63039,40 @@ 8 0x4000 //RX_TDDRC_ALPHA_UP_3 9 0x4000 //RX_TDDRC_ALPHA_UP_4 27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 -28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 -29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 -32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 -33 0x7FFF //RX_TDDRC_LIMITER_THRD +28 0x4000 //RX_TDDRC_ALPHA_DWN_2 +29 0x4000 //RX_TDDRC_ALPHA_DWN_3 +32 0x4000 //RX_TDDRC_ALPHA_DWN_4 +33 0x7214 //RX_TDDRC_LIMITER_THRD 34 0x0800 //RX_TDDRC_LIMITER_GAIN 112 0x0001 //RX_TDDRC_THRD_0 113 0x0002 //RX_TDDRC_THRD_1 114 0x1800 //RX_TDDRC_THRD_2 115 0x1800 //RX_TDDRC_THRD_3 -116 0x6000 //RX_TDDRC_SLANT_0 -117 0x6E00 //RX_TDDRC_SLANT_1 +116 0x7FFF //RX_TDDRC_SLANT_0 +117 0x7FFF //RX_TDDRC_SLANT_1 118 0x4000 //RX_TDDRC_ALPHA_UP_0 119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 120 0x0000 //RX_TDDRC_HMNC_FLAG 121 0x199A //RX_TDDRC_HMNC_GAIN 122 0x0001 //RX_TDDRC_SMT_FLAG 123 0x0CCD //RX_TDDRC_SMT_W -124 0x02D2 //RX_TDDRC_DRC_GAIN +124 0x0439 //RX_TDDRC_DRC_GAIN 38 0x0020 //RX_FDEQ_SUBNUM -39 0x4C4C //RX_FDEQ_GAIN_0 -40 0x4C4C //RX_FDEQ_GAIN_1 -41 0x4C48 //RX_FDEQ_GAIN_2 -42 0x4870 //RX_FDEQ_GAIN_3 -43 0x4848 //RX_FDEQ_GAIN_4 -44 0x4848 //RX_FDEQ_GAIN_5 -45 0x4568 //RX_FDEQ_GAIN_6 -46 0x485C //RX_FDEQ_GAIN_7 -47 0x5C60 //RX_FDEQ_GAIN_8 -48 0x685C //RX_FDEQ_GAIN_9 -49 0x5648 //RX_FDEQ_GAIN_10 -50 0x484C //RX_FDEQ_GAIN_11 -51 0x706C //RX_FDEQ_GAIN_12 -52 0x7070 //RX_FDEQ_GAIN_13 -53 0x6868 //RX_FDEQ_GAIN_14 +39 0x4848 //RX_FDEQ_GAIN_0 +40 0x4040 //RX_FDEQ_GAIN_1 +41 0x3838 //RX_FDEQ_GAIN_2 +42 0x3448 //RX_FDEQ_GAIN_3 +43 0x343C //RX_FDEQ_GAIN_4 +44 0x4040 //RX_FDEQ_GAIN_5 +45 0x4048 //RX_FDEQ_GAIN_6 +46 0x384C //RX_FDEQ_GAIN_7 +47 0x4C54 //RX_FDEQ_GAIN_8 +48 0x5C54 //RX_FDEQ_GAIN_9 +49 0x4E38 //RX_FDEQ_GAIN_10 +50 0x303C //RX_FDEQ_GAIN_11 +51 0x5450 //RX_FDEQ_GAIN_12 +52 0x4860 //RX_FDEQ_GAIN_13 +53 0x6060 //RX_FDEQ_GAIN_14 54 0x6060 //RX_FDEQ_GAIN_15 55 0x4848 //RX_FDEQ_GAIN_16 56 0x4848 //RX_FDEQ_GAIN_17 @@ -41997,7 +63130,7 @@ 108 0x7FFF //RX_FDDRC_SLANT_1_2 109 0x7FFF //RX_FDDRC_SLANT_1_3 110 0x0000 //RX_FDDRC_RESRV_0 -129 0x0078 //RX_SPK_VOL +129 0x0074 //RX_SPK_VOL 130 0x0000 //RX_VOL_RESRV_0 #VOL 6 6 0x4000 //RX_TDDRC_ALPHA_UP_1 @@ -42005,40 +63138,40 @@ 8 0x4000 //RX_TDDRC_ALPHA_UP_3 9 0x4000 //RX_TDDRC_ALPHA_UP_4 27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 -28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 -29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 -32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 -33 0x7FFF //RX_TDDRC_LIMITER_THRD +28 0x4000 //RX_TDDRC_ALPHA_DWN_2 +29 0x4000 //RX_TDDRC_ALPHA_DWN_3 +32 0x4000 //RX_TDDRC_ALPHA_DWN_4 +33 0x7214 //RX_TDDRC_LIMITER_THRD 34 0x0800 //RX_TDDRC_LIMITER_GAIN 112 0x0001 //RX_TDDRC_THRD_0 113 0x0002 //RX_TDDRC_THRD_1 114 0x1800 //RX_TDDRC_THRD_2 115 0x1800 //RX_TDDRC_THRD_3 -116 0x6000 //RX_TDDRC_SLANT_0 -117 0x6E00 //RX_TDDRC_SLANT_1 +116 0x7FFF //RX_TDDRC_SLANT_0 +117 0x7FFF //RX_TDDRC_SLANT_1 118 0x4000 //RX_TDDRC_ALPHA_UP_0 119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 120 0x0000 //RX_TDDRC_HMNC_FLAG 121 0x199A //RX_TDDRC_HMNC_GAIN 122 0x0001 //RX_TDDRC_SMT_FLAG 123 0x0CCD //RX_TDDRC_SMT_W -124 0x02D2 //RX_TDDRC_DRC_GAIN +124 0x0439 //RX_TDDRC_DRC_GAIN 38 0x0020 //RX_FDEQ_SUBNUM -39 0x4C4C //RX_FDEQ_GAIN_0 -40 0x4C4C //RX_FDEQ_GAIN_1 -41 0x4C48 //RX_FDEQ_GAIN_2 -42 0x4870 //RX_FDEQ_GAIN_3 -43 0x4848 //RX_FDEQ_GAIN_4 -44 0x4848 //RX_FDEQ_GAIN_5 -45 0x4568 //RX_FDEQ_GAIN_6 -46 0x485C //RX_FDEQ_GAIN_7 -47 0x5C60 //RX_FDEQ_GAIN_8 -48 0x685C //RX_FDEQ_GAIN_9 -49 0x5648 //RX_FDEQ_GAIN_10 -50 0x484C //RX_FDEQ_GAIN_11 -51 0x706C //RX_FDEQ_GAIN_12 -52 0x7070 //RX_FDEQ_GAIN_13 -53 0x6868 //RX_FDEQ_GAIN_14 +39 0x4848 //RX_FDEQ_GAIN_0 +40 0x4040 //RX_FDEQ_GAIN_1 +41 0x3838 //RX_FDEQ_GAIN_2 +42 0x3448 //RX_FDEQ_GAIN_3 +43 0x343C //RX_FDEQ_GAIN_4 +44 0x4040 //RX_FDEQ_GAIN_5 +45 0x4048 //RX_FDEQ_GAIN_6 +46 0x384C //RX_FDEQ_GAIN_7 +47 0x4C54 //RX_FDEQ_GAIN_8 +48 0x5C54 //RX_FDEQ_GAIN_9 +49 0x4E38 //RX_FDEQ_GAIN_10 +50 0x303C //RX_FDEQ_GAIN_11 +51 0x5450 //RX_FDEQ_GAIN_12 +52 0x4860 //RX_FDEQ_GAIN_13 +53 0x6060 //RX_FDEQ_GAIN_14 54 0x6060 //RX_FDEQ_GAIN_15 55 0x4848 //RX_FDEQ_GAIN_16 56 0x4848 //RX_FDEQ_GAIN_17 @@ -42098,18 +63231,869 @@ 110 0x0000 //RX_FDDRC_RESRV_0 129 0x0100 //RX_SPK_VOL 130 0x0000 //RX_VOL_RESRV_0 +#RX 2 +157 0x242C //RX_RECVFUNC_MODE_0 +158 0x0000 //RX_RECVFUNC_MODE_1 +159 0x0004 //RX_SAMPLINGFREQ_SIG +160 0x0004 //RX_SAMPLINGFREQ_PROC +161 0x000A //RX_FRAME_SZ +162 0x0000 //RX_DELAY_OPT +163 0x4000 //RX_TDDRC_ALPHA_UP_1 +164 0x4000 //RX_TDDRC_ALPHA_UP_2 +165 0x4000 //RX_TDDRC_ALPHA_UP_3 +166 0x4000 //RX_TDDRC_ALPHA_UP_4 +167 0x0403 //RX_PGA +168 0x7E56 //RX_A_HP +169 0x4000 //RX_B_PE +170 0x7800 //RX_THR_PITCH_DET_0 +171 0x7000 //RX_THR_PITCH_DET_1 +172 0x6000 //RX_THR_PITCH_DET_2 +173 0x0008 //RX_PITCH_BFR_LEN +174 0x0003 //RX_SBD_PITCH_DET +175 0x0100 //RX_PP_RESRV_0 +176 0x0020 //RX_PP_RESRV_1 +177 0x0400 //RX_N_SN_EST +178 0x000C //RX_N2_SN_EST +179 0x0014 //RX_NS_LVL_CTRL +180 0xF400 //RX_THR_SN_EST +181 0x7E00 //RX_LAMBDA_PFILT +182 0x000A //RX_FENS_RESRV_0 +183 0x0190 //RX_FENS_RESRV_1 +184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +185 0x4000 //RX_TDDRC_ALPHA_DWN_2 +186 0x4000 //RX_TDDRC_ALPHA_DWN_3 +187 0x0002 //RX_EXTRA_NS_L +188 0x0800 //RX_EXTRA_NS_A +189 0x4000 //RX_TDDRC_ALPHA_DWN_4 +190 0x7214 //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +192 0x199A //RX_A_POST_FLT +193 0x0000 //RX_LMT_THRD +194 0x4000 //RX_LMT_ALPHA +195 0x0020 //RX_FDEQ_SUBNUM +196 0x4848 //RX_FDEQ_GAIN_0 +197 0x4040 //RX_FDEQ_GAIN_1 +198 0x3838 //RX_FDEQ_GAIN_2 +199 0x3448 //RX_FDEQ_GAIN_3 +200 0x343C //RX_FDEQ_GAIN_4 +201 0x4040 //RX_FDEQ_GAIN_5 +202 0x4048 //RX_FDEQ_GAIN_6 +203 0x384C //RX_FDEQ_GAIN_7 +204 0x4C54 //RX_FDEQ_GAIN_8 +205 0x5C54 //RX_FDEQ_GAIN_9 +206 0x4E38 //RX_FDEQ_GAIN_10 +207 0x303C //RX_FDEQ_GAIN_11 +208 0x5450 //RX_FDEQ_GAIN_12 +209 0x4860 //RX_FDEQ_GAIN_13 +210 0x6060 //RX_FDEQ_GAIN_14 +211 0x6060 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0202 //RX_FDEQ_BIN_0 +221 0x0203 //RX_FDEQ_BIN_1 +222 0x0303 //RX_FDEQ_BIN_2 +223 0x0402 //RX_FDEQ_BIN_3 +224 0x0504 //RX_FDEQ_BIN_4 +225 0x0209 //RX_FDEQ_BIN_5 +226 0x0808 //RX_FDEQ_BIN_6 +227 0x090A //RX_FDEQ_BIN_7 +228 0x0B0C //RX_FDEQ_BIN_8 +229 0x0D0E //RX_FDEQ_BIN_9 +230 0x1013 //RX_FDEQ_BIN_10 +231 0x1719 //RX_FDEQ_BIN_11 +232 0x1B1E //RX_FDEQ_BIN_12 +233 0x1E1E //RX_FDEQ_BIN_13 +234 0x1E28 //RX_FDEQ_BIN_14 +235 0x282C //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x4000 //RX_FDEQ_RESRV_0 +245 0x0320 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0030 //RX_FDDRC_BAND_MARGIN_1 +248 0x0050 //RX_FDDRC_BAND_MARGIN_2 +249 0x0080 //RX_FDDRC_BAND_MARGIN_3 +250 0x0004 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x2000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x2000 //RX_FDDRC_THRD_3_2 +258 0x5000 //RX_FDDRC_THRD_3_3 +259 0x4000 //RX_FDDRC_SLANT_0_0 +260 0x4000 //RX_FDDRC_SLANT_0_1 +261 0x4000 //RX_FDDRC_SLANT_0_2 +262 0x4000 //RX_FDDRC_SLANT_0_3 +263 0x7FFF //RX_FDDRC_SLANT_1_0 +264 0x7FFF //RX_FDDRC_SLANT_1_1 +265 0x7FFF //RX_FDDRC_SLANT_1_2 +266 0x7FFF //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +268 0x0002 //RX_FILTINDX +269 0x0001 //RX_TDDRC_THRD_0 +270 0x0002 //RX_TDDRC_THRD_1 +271 0x1800 //RX_TDDRC_THRD_2 +272 0x1800 //RX_TDDRC_THRD_3 +273 0x7FFF //RX_TDDRC_SLANT_0 +274 0x7FFF //RX_TDDRC_SLANT_1 +275 0x4000 //RX_TDDRC_ALPHA_UP_0 +276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x199A //RX_TDDRC_HMNC_GAIN +279 0x0001 //RX_TDDRC_SMT_FLAG +280 0x0CCD //RX_TDDRC_SMT_W +281 0x0439 //RX_TDDRC_DRC_GAIN +282 0x7C00 //RX_LAMBDA_PKA_FP +283 0x1B58 //RX_TPKA_FP +284 0x0400 //RX_MIN_G_FP +285 0x0800 //RX_MAX_G_FP +286 0x0100 //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 +288 0x0000 //RX_MAXLEVEL_CNG +289 0x3000 //RX_BWE_UV_TH +290 0x3000 //RX_BWE_UV_TH2 +291 0x1800 //RX_BWE_UV_TH3 +292 0x1000 //RX_BWE_V_TH +293 0x04CD //RX_BWE_GAIN1_V_TH1 +294 0x0F33 //RX_BWE_GAIN1_V_TH2 +295 0x7333 //RX_BWE_UV_EQ +296 0x199A //RX_BWE_V_EQ +297 0x7333 //RX_BWE_TONE_TH +298 0x0004 //RX_BWE_UV_HOLD_T +299 0x6CCD //RX_BWE_GAIN2_ALPHA +300 0x799A //RX_BWE_GAIN3_ALPHA +301 0x001E //RX_BWE_CUTOFF +302 0x3000 //RX_BWE_GAINFILL +303 0x3200 //RX_BWE_MAXTH_TONE +304 0x2000 //RX_BWE_EQ_0 +305 0x2000 //RX_BWE_EQ_1 +306 0x2000 //RX_BWE_EQ_2 +307 0x2000 //RX_BWE_EQ_3 +308 0x2000 //RX_BWE_EQ_4 +309 0x2000 //RX_BWE_EQ_5 +310 0x2000 //RX_BWE_EQ_6 +311 0x0000 //RX_BWE_RESRV_0 +312 0x0000 //RX_BWE_RESRV_1 +313 0x0000 //RX_BWE_RESRV_2 +#VOL 0 +163 0x4000 //RX_TDDRC_ALPHA_UP_1 +164 0x4000 //RX_TDDRC_ALPHA_UP_2 +165 0x4000 //RX_TDDRC_ALPHA_UP_3 +166 0x4000 //RX_TDDRC_ALPHA_UP_4 +184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +185 0x4000 //RX_TDDRC_ALPHA_DWN_2 +186 0x4000 //RX_TDDRC_ALPHA_DWN_3 +189 0x4000 //RX_TDDRC_ALPHA_DWN_4 +190 0x7214 //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +269 0x0001 //RX_TDDRC_THRD_0 +270 0x0002 //RX_TDDRC_THRD_1 +271 0x1800 //RX_TDDRC_THRD_2 +272 0x1800 //RX_TDDRC_THRD_3 +273 0x7FFF //RX_TDDRC_SLANT_0 +274 0x7FFF //RX_TDDRC_SLANT_1 +275 0x4000 //RX_TDDRC_ALPHA_UP_0 +276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x199A //RX_TDDRC_HMNC_GAIN +279 0x0001 //RX_TDDRC_SMT_FLAG +280 0x0CCD //RX_TDDRC_SMT_W +281 0x0439 //RX_TDDRC_DRC_GAIN +195 0x0020 //RX_FDEQ_SUBNUM +196 0x4848 //RX_FDEQ_GAIN_0 +197 0x4040 //RX_FDEQ_GAIN_1 +198 0x3838 //RX_FDEQ_GAIN_2 +199 0x3448 //RX_FDEQ_GAIN_3 +200 0x343C //RX_FDEQ_GAIN_4 +201 0x4040 //RX_FDEQ_GAIN_5 +202 0x4048 //RX_FDEQ_GAIN_6 +203 0x384C //RX_FDEQ_GAIN_7 +204 0x4C54 //RX_FDEQ_GAIN_8 +205 0x5C54 //RX_FDEQ_GAIN_9 +206 0x4E38 //RX_FDEQ_GAIN_10 +207 0x303C //RX_FDEQ_GAIN_11 +208 0x5450 //RX_FDEQ_GAIN_12 +209 0x4860 //RX_FDEQ_GAIN_13 +210 0x6060 //RX_FDEQ_GAIN_14 +211 0x6060 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0202 //RX_FDEQ_BIN_0 +221 0x0203 //RX_FDEQ_BIN_1 +222 0x0303 //RX_FDEQ_BIN_2 +223 0x0402 //RX_FDEQ_BIN_3 +224 0x0504 //RX_FDEQ_BIN_4 +225 0x0209 //RX_FDEQ_BIN_5 +226 0x0808 //RX_FDEQ_BIN_6 +227 0x090A //RX_FDEQ_BIN_7 +228 0x0B0C //RX_FDEQ_BIN_8 +229 0x0D0E //RX_FDEQ_BIN_9 +230 0x1013 //RX_FDEQ_BIN_10 +231 0x1719 //RX_FDEQ_BIN_11 +232 0x1B1E //RX_FDEQ_BIN_12 +233 0x1E1E //RX_FDEQ_BIN_13 +234 0x1E28 //RX_FDEQ_BIN_14 +235 0x282C //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x4000 //RX_FDEQ_RESRV_0 +245 0x0320 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0030 //RX_FDDRC_BAND_MARGIN_1 +248 0x0050 //RX_FDDRC_BAND_MARGIN_2 +249 0x0080 //RX_FDDRC_BAND_MARGIN_3 +250 0x0004 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x2000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x2000 //RX_FDDRC_THRD_3_2 +258 0x5000 //RX_FDDRC_THRD_3_3 +259 0x4000 //RX_FDDRC_SLANT_0_0 +260 0x4000 //RX_FDDRC_SLANT_0_1 +261 0x4000 //RX_FDDRC_SLANT_0_2 +262 0x4000 //RX_FDDRC_SLANT_0_3 +263 0x7FFF //RX_FDDRC_SLANT_1_0 +264 0x7FFF //RX_FDDRC_SLANT_1_1 +265 0x7FFF //RX_FDDRC_SLANT_1_2 +266 0x7FFF //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +286 0x0012 //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 +#VOL 1 +163 0x4000 //RX_TDDRC_ALPHA_UP_1 +164 0x4000 //RX_TDDRC_ALPHA_UP_2 +165 0x4000 //RX_TDDRC_ALPHA_UP_3 +166 0x4000 //RX_TDDRC_ALPHA_UP_4 +184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +185 0x4000 //RX_TDDRC_ALPHA_DWN_2 +186 0x4000 //RX_TDDRC_ALPHA_DWN_3 +189 0x4000 //RX_TDDRC_ALPHA_DWN_4 +190 0x7214 //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +269 0x0001 //RX_TDDRC_THRD_0 +270 0x0002 //RX_TDDRC_THRD_1 +271 0x1800 //RX_TDDRC_THRD_2 +272 0x1800 //RX_TDDRC_THRD_3 +273 0x7FFF //RX_TDDRC_SLANT_0 +274 0x7FFF //RX_TDDRC_SLANT_1 +275 0x4000 //RX_TDDRC_ALPHA_UP_0 +276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x199A //RX_TDDRC_HMNC_GAIN +279 0x0001 //RX_TDDRC_SMT_FLAG +280 0x0CCD //RX_TDDRC_SMT_W +281 0x0439 //RX_TDDRC_DRC_GAIN +195 0x0020 //RX_FDEQ_SUBNUM +196 0x4848 //RX_FDEQ_GAIN_0 +197 0x4040 //RX_FDEQ_GAIN_1 +198 0x3838 //RX_FDEQ_GAIN_2 +199 0x3448 //RX_FDEQ_GAIN_3 +200 0x343C //RX_FDEQ_GAIN_4 +201 0x4040 //RX_FDEQ_GAIN_5 +202 0x4048 //RX_FDEQ_GAIN_6 +203 0x384C //RX_FDEQ_GAIN_7 +204 0x4C54 //RX_FDEQ_GAIN_8 +205 0x5C54 //RX_FDEQ_GAIN_9 +206 0x4E38 //RX_FDEQ_GAIN_10 +207 0x303C //RX_FDEQ_GAIN_11 +208 0x5450 //RX_FDEQ_GAIN_12 +209 0x4860 //RX_FDEQ_GAIN_13 +210 0x6060 //RX_FDEQ_GAIN_14 +211 0x6060 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0202 //RX_FDEQ_BIN_0 +221 0x0203 //RX_FDEQ_BIN_1 +222 0x0303 //RX_FDEQ_BIN_2 +223 0x0402 //RX_FDEQ_BIN_3 +224 0x0504 //RX_FDEQ_BIN_4 +225 0x0209 //RX_FDEQ_BIN_5 +226 0x0808 //RX_FDEQ_BIN_6 +227 0x090A //RX_FDEQ_BIN_7 +228 0x0B0C //RX_FDEQ_BIN_8 +229 0x0D0E //RX_FDEQ_BIN_9 +230 0x1013 //RX_FDEQ_BIN_10 +231 0x1719 //RX_FDEQ_BIN_11 +232 0x1B1E //RX_FDEQ_BIN_12 +233 0x1E1E //RX_FDEQ_BIN_13 +234 0x1E28 //RX_FDEQ_BIN_14 +235 0x282C //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x4000 //RX_FDEQ_RESRV_0 +245 0x0320 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0030 //RX_FDDRC_BAND_MARGIN_1 +248 0x0050 //RX_FDDRC_BAND_MARGIN_2 +249 0x0080 //RX_FDDRC_BAND_MARGIN_3 +250 0x0004 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x2000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x2000 //RX_FDDRC_THRD_3_2 +258 0x5000 //RX_FDDRC_THRD_3_3 +259 0x4000 //RX_FDDRC_SLANT_0_0 +260 0x4000 //RX_FDDRC_SLANT_0_1 +261 0x4000 //RX_FDDRC_SLANT_0_2 +262 0x4000 //RX_FDDRC_SLANT_0_3 +263 0x7FFF //RX_FDDRC_SLANT_1_0 +264 0x7FFF //RX_FDDRC_SLANT_1_1 +265 0x7FFF //RX_FDDRC_SLANT_1_2 +266 0x7FFF //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +286 0x001A //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 +#VOL 2 +163 0x4000 //RX_TDDRC_ALPHA_UP_1 +164 0x4000 //RX_TDDRC_ALPHA_UP_2 +165 0x4000 //RX_TDDRC_ALPHA_UP_3 +166 0x4000 //RX_TDDRC_ALPHA_UP_4 +184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +185 0x4000 //RX_TDDRC_ALPHA_DWN_2 +186 0x4000 //RX_TDDRC_ALPHA_DWN_3 +189 0x4000 //RX_TDDRC_ALPHA_DWN_4 +190 0x7214 //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +269 0x0001 //RX_TDDRC_THRD_0 +270 0x0002 //RX_TDDRC_THRD_1 +271 0x1800 //RX_TDDRC_THRD_2 +272 0x1800 //RX_TDDRC_THRD_3 +273 0x7FFF //RX_TDDRC_SLANT_0 +274 0x7FFF //RX_TDDRC_SLANT_1 +275 0x4000 //RX_TDDRC_ALPHA_UP_0 +276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x199A //RX_TDDRC_HMNC_GAIN +279 0x0001 //RX_TDDRC_SMT_FLAG +280 0x0CCD //RX_TDDRC_SMT_W +281 0x0439 //RX_TDDRC_DRC_GAIN +195 0x0020 //RX_FDEQ_SUBNUM +196 0x4848 //RX_FDEQ_GAIN_0 +197 0x4040 //RX_FDEQ_GAIN_1 +198 0x3838 //RX_FDEQ_GAIN_2 +199 0x3448 //RX_FDEQ_GAIN_3 +200 0x343C //RX_FDEQ_GAIN_4 +201 0x4040 //RX_FDEQ_GAIN_5 +202 0x4048 //RX_FDEQ_GAIN_6 +203 0x384C //RX_FDEQ_GAIN_7 +204 0x4C54 //RX_FDEQ_GAIN_8 +205 0x5C54 //RX_FDEQ_GAIN_9 +206 0x4E38 //RX_FDEQ_GAIN_10 +207 0x303C //RX_FDEQ_GAIN_11 +208 0x5450 //RX_FDEQ_GAIN_12 +209 0x4860 //RX_FDEQ_GAIN_13 +210 0x6060 //RX_FDEQ_GAIN_14 +211 0x6060 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0202 //RX_FDEQ_BIN_0 +221 0x0203 //RX_FDEQ_BIN_1 +222 0x0303 //RX_FDEQ_BIN_2 +223 0x0402 //RX_FDEQ_BIN_3 +224 0x0504 //RX_FDEQ_BIN_4 +225 0x0209 //RX_FDEQ_BIN_5 +226 0x0808 //RX_FDEQ_BIN_6 +227 0x090A //RX_FDEQ_BIN_7 +228 0x0B0C //RX_FDEQ_BIN_8 +229 0x0D0E //RX_FDEQ_BIN_9 +230 0x1013 //RX_FDEQ_BIN_10 +231 0x1719 //RX_FDEQ_BIN_11 +232 0x1B1E //RX_FDEQ_BIN_12 +233 0x1E1E //RX_FDEQ_BIN_13 +234 0x1E28 //RX_FDEQ_BIN_14 +235 0x282C //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x4000 //RX_FDEQ_RESRV_0 +245 0x0320 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0030 //RX_FDDRC_BAND_MARGIN_1 +248 0x0050 //RX_FDDRC_BAND_MARGIN_2 +249 0x0080 //RX_FDDRC_BAND_MARGIN_3 +250 0x0004 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x2000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x2000 //RX_FDDRC_THRD_3_2 +258 0x5000 //RX_FDDRC_THRD_3_3 +259 0x4000 //RX_FDDRC_SLANT_0_0 +260 0x4000 //RX_FDDRC_SLANT_0_1 +261 0x4000 //RX_FDDRC_SLANT_0_2 +262 0x4000 //RX_FDDRC_SLANT_0_3 +263 0x7FFF //RX_FDDRC_SLANT_1_0 +264 0x7FFF //RX_FDDRC_SLANT_1_1 +265 0x7FFF //RX_FDDRC_SLANT_1_2 +266 0x7FFF //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +286 0x0025 //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 +#VOL 3 +163 0x4000 //RX_TDDRC_ALPHA_UP_1 +164 0x4000 //RX_TDDRC_ALPHA_UP_2 +165 0x4000 //RX_TDDRC_ALPHA_UP_3 +166 0x4000 //RX_TDDRC_ALPHA_UP_4 +184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +185 0x4000 //RX_TDDRC_ALPHA_DWN_2 +186 0x4000 //RX_TDDRC_ALPHA_DWN_3 +189 0x4000 //RX_TDDRC_ALPHA_DWN_4 +190 0x7214 //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +269 0x0001 //RX_TDDRC_THRD_0 +270 0x0002 //RX_TDDRC_THRD_1 +271 0x1800 //RX_TDDRC_THRD_2 +272 0x1800 //RX_TDDRC_THRD_3 +273 0x7FFF //RX_TDDRC_SLANT_0 +274 0x7FFF //RX_TDDRC_SLANT_1 +275 0x4000 //RX_TDDRC_ALPHA_UP_0 +276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x199A //RX_TDDRC_HMNC_GAIN +279 0x0001 //RX_TDDRC_SMT_FLAG +280 0x0CCD //RX_TDDRC_SMT_W +281 0x0439 //RX_TDDRC_DRC_GAIN +195 0x0020 //RX_FDEQ_SUBNUM +196 0x4848 //RX_FDEQ_GAIN_0 +197 0x4040 //RX_FDEQ_GAIN_1 +198 0x3838 //RX_FDEQ_GAIN_2 +199 0x3448 //RX_FDEQ_GAIN_3 +200 0x343C //RX_FDEQ_GAIN_4 +201 0x4040 //RX_FDEQ_GAIN_5 +202 0x4048 //RX_FDEQ_GAIN_6 +203 0x384C //RX_FDEQ_GAIN_7 +204 0x4C54 //RX_FDEQ_GAIN_8 +205 0x5C54 //RX_FDEQ_GAIN_9 +206 0x4E38 //RX_FDEQ_GAIN_10 +207 0x303C //RX_FDEQ_GAIN_11 +208 0x5450 //RX_FDEQ_GAIN_12 +209 0x4860 //RX_FDEQ_GAIN_13 +210 0x6060 //RX_FDEQ_GAIN_14 +211 0x6060 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0202 //RX_FDEQ_BIN_0 +221 0x0203 //RX_FDEQ_BIN_1 +222 0x0303 //RX_FDEQ_BIN_2 +223 0x0402 //RX_FDEQ_BIN_3 +224 0x0504 //RX_FDEQ_BIN_4 +225 0x0209 //RX_FDEQ_BIN_5 +226 0x0808 //RX_FDEQ_BIN_6 +227 0x090A //RX_FDEQ_BIN_7 +228 0x0B0C //RX_FDEQ_BIN_8 +229 0x0D0E //RX_FDEQ_BIN_9 +230 0x1013 //RX_FDEQ_BIN_10 +231 0x1719 //RX_FDEQ_BIN_11 +232 0x1B1E //RX_FDEQ_BIN_12 +233 0x1E1E //RX_FDEQ_BIN_13 +234 0x1E28 //RX_FDEQ_BIN_14 +235 0x282C //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x4000 //RX_FDEQ_RESRV_0 +245 0x0320 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0030 //RX_FDDRC_BAND_MARGIN_1 +248 0x0050 //RX_FDDRC_BAND_MARGIN_2 +249 0x0080 //RX_FDDRC_BAND_MARGIN_3 +250 0x0004 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x2000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x2000 //RX_FDDRC_THRD_3_2 +258 0x5000 //RX_FDDRC_THRD_3_3 +259 0x4000 //RX_FDDRC_SLANT_0_0 +260 0x4000 //RX_FDDRC_SLANT_0_1 +261 0x4000 //RX_FDDRC_SLANT_0_2 +262 0x4000 //RX_FDDRC_SLANT_0_3 +263 0x7FFF //RX_FDDRC_SLANT_1_0 +264 0x7FFF //RX_FDDRC_SLANT_1_1 +265 0x7FFF //RX_FDDRC_SLANT_1_2 +266 0x7FFF //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +286 0x0035 //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 +#VOL 4 +163 0x4000 //RX_TDDRC_ALPHA_UP_1 +164 0x4000 //RX_TDDRC_ALPHA_UP_2 +165 0x4000 //RX_TDDRC_ALPHA_UP_3 +166 0x4000 //RX_TDDRC_ALPHA_UP_4 +184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +185 0x4000 //RX_TDDRC_ALPHA_DWN_2 +186 0x4000 //RX_TDDRC_ALPHA_DWN_3 +189 0x4000 //RX_TDDRC_ALPHA_DWN_4 +190 0x7214 //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +269 0x0001 //RX_TDDRC_THRD_0 +270 0x0002 //RX_TDDRC_THRD_1 +271 0x1800 //RX_TDDRC_THRD_2 +272 0x1800 //RX_TDDRC_THRD_3 +273 0x7FFF //RX_TDDRC_SLANT_0 +274 0x7FFF //RX_TDDRC_SLANT_1 +275 0x4000 //RX_TDDRC_ALPHA_UP_0 +276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x199A //RX_TDDRC_HMNC_GAIN +279 0x0001 //RX_TDDRC_SMT_FLAG +280 0x0CCD //RX_TDDRC_SMT_W +281 0x0439 //RX_TDDRC_DRC_GAIN +195 0x0020 //RX_FDEQ_SUBNUM +196 0x4848 //RX_FDEQ_GAIN_0 +197 0x4040 //RX_FDEQ_GAIN_1 +198 0x3838 //RX_FDEQ_GAIN_2 +199 0x3448 //RX_FDEQ_GAIN_3 +200 0x343C //RX_FDEQ_GAIN_4 +201 0x4040 //RX_FDEQ_GAIN_5 +202 0x4048 //RX_FDEQ_GAIN_6 +203 0x384C //RX_FDEQ_GAIN_7 +204 0x4C54 //RX_FDEQ_GAIN_8 +205 0x5C54 //RX_FDEQ_GAIN_9 +206 0x4E38 //RX_FDEQ_GAIN_10 +207 0x303C //RX_FDEQ_GAIN_11 +208 0x5450 //RX_FDEQ_GAIN_12 +209 0x4860 //RX_FDEQ_GAIN_13 +210 0x6060 //RX_FDEQ_GAIN_14 +211 0x6060 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0202 //RX_FDEQ_BIN_0 +221 0x0203 //RX_FDEQ_BIN_1 +222 0x0303 //RX_FDEQ_BIN_2 +223 0x0402 //RX_FDEQ_BIN_3 +224 0x0504 //RX_FDEQ_BIN_4 +225 0x0209 //RX_FDEQ_BIN_5 +226 0x0808 //RX_FDEQ_BIN_6 +227 0x090A //RX_FDEQ_BIN_7 +228 0x0B0C //RX_FDEQ_BIN_8 +229 0x0D0E //RX_FDEQ_BIN_9 +230 0x1013 //RX_FDEQ_BIN_10 +231 0x1719 //RX_FDEQ_BIN_11 +232 0x1B1E //RX_FDEQ_BIN_12 +233 0x1E1E //RX_FDEQ_BIN_13 +234 0x1E28 //RX_FDEQ_BIN_14 +235 0x282C //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x4000 //RX_FDEQ_RESRV_0 +245 0x0320 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0030 //RX_FDDRC_BAND_MARGIN_1 +248 0x0050 //RX_FDDRC_BAND_MARGIN_2 +249 0x0080 //RX_FDDRC_BAND_MARGIN_3 +250 0x0004 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x2000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x2000 //RX_FDDRC_THRD_3_2 +258 0x5000 //RX_FDDRC_THRD_3_3 +259 0x4000 //RX_FDDRC_SLANT_0_0 +260 0x4000 //RX_FDDRC_SLANT_0_1 +261 0x4000 //RX_FDDRC_SLANT_0_2 +262 0x4000 //RX_FDDRC_SLANT_0_3 +263 0x7FFF //RX_FDDRC_SLANT_1_0 +264 0x7FFF //RX_FDDRC_SLANT_1_1 +265 0x7FFF //RX_FDDRC_SLANT_1_2 +266 0x7FFF //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +286 0x004D //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 +#VOL 5 +163 0x4000 //RX_TDDRC_ALPHA_UP_1 +164 0x4000 //RX_TDDRC_ALPHA_UP_2 +165 0x4000 //RX_TDDRC_ALPHA_UP_3 +166 0x4000 //RX_TDDRC_ALPHA_UP_4 +184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +185 0x4000 //RX_TDDRC_ALPHA_DWN_2 +186 0x4000 //RX_TDDRC_ALPHA_DWN_3 +189 0x4000 //RX_TDDRC_ALPHA_DWN_4 +190 0x7214 //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +269 0x0001 //RX_TDDRC_THRD_0 +270 0x0002 //RX_TDDRC_THRD_1 +271 0x1800 //RX_TDDRC_THRD_2 +272 0x1800 //RX_TDDRC_THRD_3 +273 0x7FFF //RX_TDDRC_SLANT_0 +274 0x7FFF //RX_TDDRC_SLANT_1 +275 0x4000 //RX_TDDRC_ALPHA_UP_0 +276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x199A //RX_TDDRC_HMNC_GAIN +279 0x0001 //RX_TDDRC_SMT_FLAG +280 0x0CCD //RX_TDDRC_SMT_W +281 0x0439 //RX_TDDRC_DRC_GAIN +195 0x0020 //RX_FDEQ_SUBNUM +196 0x4848 //RX_FDEQ_GAIN_0 +197 0x4040 //RX_FDEQ_GAIN_1 +198 0x3838 //RX_FDEQ_GAIN_2 +199 0x3448 //RX_FDEQ_GAIN_3 +200 0x343C //RX_FDEQ_GAIN_4 +201 0x4040 //RX_FDEQ_GAIN_5 +202 0x4048 //RX_FDEQ_GAIN_6 +203 0x384C //RX_FDEQ_GAIN_7 +204 0x4C54 //RX_FDEQ_GAIN_8 +205 0x5C54 //RX_FDEQ_GAIN_9 +206 0x4E38 //RX_FDEQ_GAIN_10 +207 0x303C //RX_FDEQ_GAIN_11 +208 0x5450 //RX_FDEQ_GAIN_12 +209 0x4860 //RX_FDEQ_GAIN_13 +210 0x6060 //RX_FDEQ_GAIN_14 +211 0x6060 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0202 //RX_FDEQ_BIN_0 +221 0x0203 //RX_FDEQ_BIN_1 +222 0x0303 //RX_FDEQ_BIN_2 +223 0x0402 //RX_FDEQ_BIN_3 +224 0x0504 //RX_FDEQ_BIN_4 +225 0x0209 //RX_FDEQ_BIN_5 +226 0x0808 //RX_FDEQ_BIN_6 +227 0x090A //RX_FDEQ_BIN_7 +228 0x0B0C //RX_FDEQ_BIN_8 +229 0x0D0E //RX_FDEQ_BIN_9 +230 0x1013 //RX_FDEQ_BIN_10 +231 0x1719 //RX_FDEQ_BIN_11 +232 0x1B1E //RX_FDEQ_BIN_12 +233 0x1E1E //RX_FDEQ_BIN_13 +234 0x1E28 //RX_FDEQ_BIN_14 +235 0x282C //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x4000 //RX_FDEQ_RESRV_0 +245 0x0320 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0030 //RX_FDDRC_BAND_MARGIN_1 +248 0x0050 //RX_FDDRC_BAND_MARGIN_2 +249 0x0080 //RX_FDDRC_BAND_MARGIN_3 +250 0x0004 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x2000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x2000 //RX_FDDRC_THRD_3_2 +258 0x5000 //RX_FDDRC_THRD_3_3 +259 0x4000 //RX_FDDRC_SLANT_0_0 +260 0x4000 //RX_FDDRC_SLANT_0_1 +261 0x4000 //RX_FDDRC_SLANT_0_2 +262 0x4000 //RX_FDDRC_SLANT_0_3 +263 0x7FFF //RX_FDDRC_SLANT_1_0 +264 0x7FFF //RX_FDDRC_SLANT_1_1 +265 0x7FFF //RX_FDDRC_SLANT_1_2 +266 0x7FFF //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +286 0x0074 //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 +#VOL 6 +163 0x4000 //RX_TDDRC_ALPHA_UP_1 +164 0x4000 //RX_TDDRC_ALPHA_UP_2 +165 0x4000 //RX_TDDRC_ALPHA_UP_3 +166 0x4000 //RX_TDDRC_ALPHA_UP_4 +184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +185 0x4000 //RX_TDDRC_ALPHA_DWN_2 +186 0x4000 //RX_TDDRC_ALPHA_DWN_3 +189 0x4000 //RX_TDDRC_ALPHA_DWN_4 +190 0x7214 //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +269 0x0001 //RX_TDDRC_THRD_0 +270 0x0002 //RX_TDDRC_THRD_1 +271 0x1800 //RX_TDDRC_THRD_2 +272 0x1800 //RX_TDDRC_THRD_3 +273 0x7FFF //RX_TDDRC_SLANT_0 +274 0x7FFF //RX_TDDRC_SLANT_1 +275 0x4000 //RX_TDDRC_ALPHA_UP_0 +276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x199A //RX_TDDRC_HMNC_GAIN +279 0x0001 //RX_TDDRC_SMT_FLAG +280 0x0CCD //RX_TDDRC_SMT_W +281 0x0439 //RX_TDDRC_DRC_GAIN +195 0x0020 //RX_FDEQ_SUBNUM +196 0x4848 //RX_FDEQ_GAIN_0 +197 0x4040 //RX_FDEQ_GAIN_1 +198 0x3838 //RX_FDEQ_GAIN_2 +199 0x3448 //RX_FDEQ_GAIN_3 +200 0x343C //RX_FDEQ_GAIN_4 +201 0x4040 //RX_FDEQ_GAIN_5 +202 0x4048 //RX_FDEQ_GAIN_6 +203 0x384C //RX_FDEQ_GAIN_7 +204 0x4C54 //RX_FDEQ_GAIN_8 +205 0x5C54 //RX_FDEQ_GAIN_9 +206 0x4E38 //RX_FDEQ_GAIN_10 +207 0x303C //RX_FDEQ_GAIN_11 +208 0x5450 //RX_FDEQ_GAIN_12 +209 0x4860 //RX_FDEQ_GAIN_13 +210 0x6060 //RX_FDEQ_GAIN_14 +211 0x6060 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0202 //RX_FDEQ_BIN_0 +221 0x0203 //RX_FDEQ_BIN_1 +222 0x0303 //RX_FDEQ_BIN_2 +223 0x0402 //RX_FDEQ_BIN_3 +224 0x0504 //RX_FDEQ_BIN_4 +225 0x0209 //RX_FDEQ_BIN_5 +226 0x0808 //RX_FDEQ_BIN_6 +227 0x090A //RX_FDEQ_BIN_7 +228 0x0B0C //RX_FDEQ_BIN_8 +229 0x0D0E //RX_FDEQ_BIN_9 +230 0x1013 //RX_FDEQ_BIN_10 +231 0x1719 //RX_FDEQ_BIN_11 +232 0x1B1E //RX_FDEQ_BIN_12 +233 0x1E1E //RX_FDEQ_BIN_13 +234 0x1E28 //RX_FDEQ_BIN_14 +235 0x282C //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x4000 //RX_FDEQ_RESRV_0 +245 0x0320 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0030 //RX_FDDRC_BAND_MARGIN_1 +248 0x0050 //RX_FDDRC_BAND_MARGIN_2 +249 0x0080 //RX_FDDRC_BAND_MARGIN_3 +250 0x0004 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x2000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x2000 //RX_FDDRC_THRD_3_2 +258 0x5000 //RX_FDDRC_THRD_3_3 +259 0x4000 //RX_FDDRC_SLANT_0_0 +260 0x4000 //RX_FDDRC_SLANT_0_1 +261 0x4000 //RX_FDDRC_SLANT_0_2 +262 0x4000 //RX_FDDRC_SLANT_0_3 +263 0x7FFF //RX_FDDRC_SLANT_1_0 +264 0x7FFF //RX_FDDRC_SLANT_1_1 +265 0x7FFF //RX_FDDRC_SLANT_1_2 +266 0x7FFF //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +286 0x0100 //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 #CASE_NAME HEADSET-TTY_VCO-VOICE_GENERIC-NB -#PARAM_MODE FULL -#PARAM_TYPE TX+RX -#TOTAL_CUSTOM_STEP 7 +#PARAM_MODE Full +#PARAM_TYPE TX+2RX +#TOTAL_CUSTOM_STEP 7+7 #TX 0 0x0001 //TX_OPERATION_MODE_0 1 0x0001 //TX_OPERATION_MODE_1 2 0x0033 //TX_PATCH_REG -3 0x2F7C //TX_SENDFUNC_MODE_0 +3 0x6F7C //TX_SENDFUNC_MODE_0 4 0x0001 //TX_SENDFUNC_MODE_1 -5 0x0003 //TX_NUM_MIC +5 0x0002 //TX_NUM_MIC 6 0x0000 //TX_SAMPLINGFREQ_SIG 7 0x0000 //TX_SAMPLINGFREQ_PROC 8 0x000A //TX_FRAME_SZ_SIG @@ -42125,8 +64109,8 @@ 18 0x0000 //TX_SYS_RESRV_2 19 0x0000 //TX_SYS_RESRV_3 20 0x0000 //TX_DIST2REF0 -21 0x00A4 //TX_DIST2REF1 -22 0x0017 //TX_DIST2REF_02 +21 0x009D //TX_DIST2REF1 +22 0x0010 //TX_DIST2REF_02 23 0x0000 //TX_DIST2REF_03 24 0x0000 //TX_DIST2REF_04 25 0x0000 //TX_DIST2REF_05 @@ -42232,7 +64216,7 @@ 125 0x6000 //TX_C_POST_FLT_MIC_MAINBLK 126 0x6000 //TX_C_POST_FLT_MIC_REFBLK 127 0x0010 //TX_MIC_BLOCK_N -128 0x7652 //TX_A_HP +128 0x7646 //TX_A_HP 129 0x4000 //TX_B_PE 130 0x5000 //TX_THR_PITCH_DET_0 131 0x4800 //TX_THR_PITCH_DET_1 @@ -42271,7 +64255,7 @@ 164 0x7FFF //TX_MIN_EQ_RE_EST_12 165 0x2000 //TX_LAMBDA_RE_EST 166 0x0000 //TX_LAMBDA_CB_NLE -167 0x7FFF //TX_C_POST_FLT +167 0x4000 //TX_C_POST_FLT 168 0x2000 //TX_GAIN_NP 169 0x0180 //TX_SE_HOLD_N 170 0x00C8 //TX_DT_HOLD_N @@ -42301,14 +64285,14 @@ 194 0x0000 //TX_NORMENERTH 195 0x0000 //TX_NORMENERHIGHTH 196 0x0000 //TX_NORMENERHIGHTHL -197 0x6590 //TX_DTD_THR1_0 -198 0x6590 //TX_DTD_THR1_1 -199 0x6590 //TX_DTD_THR1_2 +197 0x7FF0 //TX_DTD_THR1_0 +198 0x7FF0 //TX_DTD_THR1_1 +199 0x7FF0 //TX_DTD_THR1_2 200 0x7FF0 //TX_DTD_THR1_3 201 0x7FF0 //TX_DTD_THR1_4 202 0x7FF0 //TX_DTD_THR1_5 203 0x7FF0 //TX_DTD_THR1_6 -204 0x0CCD //TX_DTD_THR2_0 +204 0x7E00 //TX_DTD_THR2_0 205 0x0CCD //TX_DTD_THR2_1 206 0x0CCD //TX_DTD_THR2_2 207 0x0CCD //TX_DTD_THR2_3 @@ -42317,7 +64301,7 @@ 210 0x0CCD //TX_DTD_THR2_6 211 0x7FFF //TX_DTD_THR3 212 0x0000 //TX_SPK_CUT_K -213 0x157C //TX_DT_CUT_K +213 0x1F40 //TX_DT_CUT_K 214 0x0100 //TX_DT_CUT_THR 215 0x04EB //TX_COMFORT_G 216 0x01F4 //TX_POWER_YOUT_TH @@ -42327,18 +64311,18 @@ 220 0x0000 //TX_DTD_MIC_BLK 221 0x1000 //TX_ADPT_STRICT_L 222 0x1000 //TX_ADPT_STRICT_H -223 0x0BB8 //TX_RATIO_DT_L_TH_LOW +223 0x0001 //TX_RATIO_DT_L_TH_LOW 224 0x3A98 //TX_RATIO_DT_H_TH_LOW -225 0x1770 //TX_RATIO_DT_L_TH_HIGH +225 0x0640 //TX_RATIO_DT_L_TH_HIGH 226 0x4E20 //TX_RATIO_DT_H_TH_HIGH -227 0x09C4 //TX_RATIO_DT_L0_TH -228 0x0800 //TX_B_POST_FILT_ECHO_L +227 0x0001 //TX_RATIO_DT_L0_TH +228 0x7FFF //TX_B_POST_FILT_ECHO_L 229 0x2000 //TX_B_POST_FILT_ECHO_H 230 0x0200 //TX_MIN_G_CTRL_ECHO 231 0x1000 //TX_B_LESSCUT_RTO_ECHO 232 0x0000 //TX_EPD_OFFSET_00 233 0x0000 //TX_EPD_OFFST_01 -234 0x1388 //TX_RATIO_DT_L0_TH_HIGH +234 0x05DC //TX_RATIO_DT_L0_TH_HIGH 235 0x3A98 //TX_RATIO_DT_H_TH_CUT 236 0x7FFF //TX_MIN_EQ_RE_EST_13 237 0x0000 //TX_DTD_THR1_7 @@ -42346,7 +64330,7 @@ 239 0x0800 //TX_DT_RESRV_7 240 0x0800 //TX_DT_RESRV_8 241 0x0000 //TX_DT_RESRV_9 -242 0xF800 //TX_THR_SN_EST_0 +242 0xFA00 //TX_THR_SN_EST_0 243 0xFA00 //TX_THR_SN_EST_1 244 0xFA00 //TX_THR_SN_EST_2 245 0xF900 //TX_THR_SN_EST_3 @@ -42355,12 +64339,12 @@ 248 0xF800 //TX_THR_SN_EST_6 249 0xF800 //TX_THR_SN_EST_7 250 0x0050 //TX_DELTA_THR_SN_EST_0 -251 0x01A0 //TX_DELTA_THR_SN_EST_1 +251 0x0200 //TX_DELTA_THR_SN_EST_1 252 0x0200 //TX_DELTA_THR_SN_EST_2 -253 0x0200 //TX_DELTA_THR_SN_EST_3 -254 0x0100 //TX_DELTA_THR_SN_EST_4 +253 0x0100 //TX_DELTA_THR_SN_EST_3 +254 0x0200 //TX_DELTA_THR_SN_EST_4 255 0x0200 //TX_DELTA_THR_SN_EST_5 -256 0x0200 //TX_DELTA_THR_SN_EST_6 +256 0x01A0 //TX_DELTA_THR_SN_EST_6 257 0x0200 //TX_DELTA_THR_SN_EST_7 258 0x4000 //TX_LAMBDA_NN_EST_0 259 0x4000 //TX_LAMBDA_NN_EST_1 @@ -42387,28 +64371,28 @@ 280 0x1000 //TX_B_POST_FLT_1 281 0x0010 //TX_NS_LVL_CTRL_0 282 0x0012 //TX_NS_LVL_CTRL_1 -283 0x0017 //TX_NS_LVL_CTRL_2 -284 0x0015 //TX_NS_LVL_CTRL_3 +283 0x0015 //TX_NS_LVL_CTRL_2 +284 0x0012 //TX_NS_LVL_CTRL_3 285 0x0012 //TX_NS_LVL_CTRL_4 -286 0x0012 //TX_NS_LVL_CTRL_5 -287 0x0011 //TX_NS_LVL_CTRL_6 +286 0x0011 //TX_NS_LVL_CTRL_5 +287 0x0012 //TX_NS_LVL_CTRL_6 288 0x0011 //TX_NS_LVL_CTRL_7 289 0x000F //TX_MIN_GAIN_S_0 -290 0x000F //TX_MIN_GAIN_S_1 -291 0x000D //TX_MIN_GAIN_S_2 +290 0x000D //TX_MIN_GAIN_S_1 +291 0x000F //TX_MIN_GAIN_S_2 292 0x000F //TX_MIN_GAIN_S_3 293 0x000F //TX_MIN_GAIN_S_4 -294 0x000F //TX_MIN_GAIN_S_5 -295 0x0010 //TX_MIN_GAIN_S_6 +294 0x0010 //TX_MIN_GAIN_S_5 +295 0x000F //TX_MIN_GAIN_S_6 296 0x000F //TX_MIN_GAIN_S_7 297 0x4000 //TX_NMOS_SUP 298 0x0000 //TX_NS_MAX_PRI_SNR_TH 299 0x0000 //TX_NMOS_SUP_MENSA 300 0x7FFF //TX_SNRI_SUP_0 -301 0x4000 //TX_SNRI_SUP_1 -302 0x1000 //TX_SNRI_SUP_2 -303 0x4000 //TX_SNRI_SUP_3 -304 0x2400 //TX_SNRI_SUP_4 +301 0x3000 //TX_SNRI_SUP_1 +302 0x4000 //TX_SNRI_SUP_2 +303 0x2400 //TX_SNRI_SUP_3 +304 0x4000 //TX_SNRI_SUP_4 305 0x4000 //TX_SNRI_SUP_5 306 0x4000 //TX_SNRI_SUP_6 307 0x7FFF //TX_SNRI_SUP_7 @@ -42419,19 +64403,19 @@ 312 0x7FFF //TX_A_POST_FILT_0 313 0x2000 //TX_A_POST_FILT_1 314 0x4000 //TX_A_POST_FILT_S_0 -315 0x5000 //TX_A_POST_FILT_S_1 -316 0x2000 //TX_A_POST_FILT_S_2 -317 0x4000 //TX_A_POST_FILT_S_3 -318 0x1000 //TX_A_POST_FILT_S_4 -319 0x3000 //TX_A_POST_FILT_S_5 +315 0x2000 //TX_A_POST_FILT_S_1 +316 0x4000 //TX_A_POST_FILT_S_2 +317 0x1000 //TX_A_POST_FILT_S_3 +318 0x3000 //TX_A_POST_FILT_S_4 +319 0x5000 //TX_A_POST_FILT_S_5 320 0x5000 //TX_A_POST_FILT_S_6 321 0x7000 //TX_A_POST_FILT_S_7 322 0x1000 //TX_B_POST_FILT_0 323 0x1000 //TX_B_POST_FILT_1 324 0x1000 //TX_B_POST_FILT_2 -325 0x1000 //TX_B_POST_FILT_3 -326 0x5000 //TX_B_POST_FILT_4 -327 0x3000 //TX_B_POST_FILT_5 +325 0x5000 //TX_B_POST_FILT_3 +326 0x3000 //TX_B_POST_FILT_4 +327 0x1000 //TX_B_POST_FILT_5 328 0x1000 //TX_B_POST_FILT_6 329 0x2000 //TX_B_POST_FILT_7 330 0x4000 //TX_B_LESSCUT_RTO_S_0 @@ -42444,12 +64428,12 @@ 337 0x7FFF //TX_B_LESSCUT_RTO_S_7 338 0x7E00 //TX_LAMBDA_PFILT 339 0x7D00 //TX_LAMBDA_PFILT_S_0 -340 0x7900 //TX_LAMBDA_PFILT_S_1 -341 0x7400 //TX_LAMBDA_PFILT_S_2 -342 0x7900 //TX_LAMBDA_PFILT_S_3 -343 0x7000 //TX_LAMBDA_PFILT_S_4 +340 0x7C00 //TX_LAMBDA_PFILT_S_1 +341 0x7900 //TX_LAMBDA_PFILT_S_2 +342 0x7000 //TX_LAMBDA_PFILT_S_3 +343 0x7D00 //TX_LAMBDA_PFILT_S_4 344 0x7D00 //TX_LAMBDA_PFILT_S_5 -345 0x7D00 //TX_LAMBDA_PFILT_S_6 +345 0x7900 //TX_LAMBDA_PFILT_S_6 346 0x7D00 //TX_LAMBDA_PFILT_S_7 347 0x0200 //TX_K_PEPPER 348 0x0800 //TX_A_PEPPER @@ -42458,20 +64442,20 @@ 351 0x0001 //TX_HMNC_BST_FLG 352 0x0200 //TX_HMNC_BST_THR 353 0x0800 //TX_DT_BINVAD_TH_0 -354 0x0800 //TX_DT_BINVAD_TH_1 -355 0x0800 //TX_DT_BINVAD_TH_2 +354 0x0100 //TX_DT_BINVAD_TH_1 +355 0x0100 //TX_DT_BINVAD_TH_2 356 0x0800 //TX_DT_BINVAD_TH_3 357 0x0FA0 //TX_DT_BINVAD_ENDF -358 0x0400 //TX_C_POST_FLT_DT +358 0x7000 //TX_C_POST_FLT_DT 359 0x4000 //TX_NS_B_POST_FLT_LESSCUT -360 0x0100 //TX_DT_BOOST +360 0x01B0 //TX_DT_BOOST 361 0x0000 //TX_BF_SGRAD_FLG 362 0x0005 //TX_BF_DVG_TH 363 0x001E //TX_SN_C_F 364 0x0000 //TX_K_APT 365 0x0001 //TX_NOISEDET 366 0x0064 //TX_NDETCT -367 0x0050 //TX_NOISE_TH_0 +367 0x003B //TX_NOISE_TH_0 368 0x7FFF //TX_NOISE_TH_0_2 369 0x7FFF //TX_NOISE_TH_0_3 370 0x07D0 //TX_NOISE_TH_1 @@ -42483,11 +64467,11 @@ 376 0x0000 //TX_NOISE_TH_5_3 377 0x7FFF //TX_NOISE_TH_5_4 378 0x0FA0 //TX_NOISE_TH_6 -379 0x000A //TX_MINENOISE_TH -380 0x4000 //TX_MINENOISE_MIC0_TH_MTS -381 0xFFEE //TX_MINENOISE_MIC0_TH_EXP -382 0x6000 //TX_MINENOISE_MIC0_S_TH_MTS -383 0xFFF3 //TX_MINENOISE_MIC0_S_TH_EXP +379 0x00C8 //TX_MINENOISE_TH +380 0xD508 //TX_MORENS_TFMASK_TH +381 0x0001 //TX_DRC_QUIET_FLOOR +382 0x3A98 //TX_RATIODTL_CUT_TH +383 0x0DAC //TX_DT_CUT_K1 384 0x0666 //TX_OUT_ENER_S_TH_CLEAN 385 0x0666 //TX_OUT_ENER_S_TH_LESSCLEAN 386 0x0333 //TX_OUT_ENER_S_TH_NOISY @@ -42495,22 +64479,22 @@ 388 0x1000 //TX_OUT_ENER_TH_SPEECH 389 0x2000 //TX_SN_NPB_GAIN 390 0x0000 //TX_NN_NPB_GAIN -391 0x0000 //TX_CSX_ALPHA_0 -392 0x0000 //TX_CSX_ALPHA_1 -393 0x0000 //TX_CSX_ALPHA_2 -394 0x0000 //TX_CSX_ALPHA_3 -395 0x0800 //TX_MU_ARSP_EST -396 0x00C8 //TX_P_OUTBEAM_MIN_TH +391 0x7FFF //TX_POST_MASK_SUP_HSNE +392 0x1388 //TX_TAIL_DET_TH +393 0x4000 //TX_B_LESSCUT_RTO_WTA +394 0x0000 //TX_MEL_G_R +395 0x0080 //TX_SUPHIGH_TH +396 0x0000 //TX_MASK_G_R 397 0x0002 //TX_EXTRA_NS_L -398 0x0800 //TX_EXTRA_NS_A -399 0x0005 //TX_VR_NOISE_FLOOR_TH +398 0x1800 //TX_C_POST_FLT_MASK +399 0x7FFF //TX_A_POST_FLT_WNS 400 0x0148 //TX_MIN_G_LOW300HZ -401 0x0001 //TX_MAXLEVEL_CNG +401 0x0004 //TX_MAXLEVEL_CNG 402 0x00B4 //TX_STN_NOISE_TH 403 0x4000 //TX_POST_MASK_SUP 404 0x7FFF //TX_POST_MASK_ADJUST 405 0x00C8 //TX_NS_ENOISE_MIC0_TH -406 0x000A //TX_MINENOISE_MIC0_TH +406 0x0032 //TX_MINENOISE_MIC0_TH 407 0x012C //TX_MINENOISE_MIC0_S_TH 408 0x7FFF //TX_MIN_G_CTRL_SSNS 409 0x0000 //TX_METAL_RTO_THR @@ -42618,16 +64602,16 @@ 511 0x6666 //TX_MIC_TO_BFGAIN 512 0x0000 //TX_MICTOBFGAIN0 513 0x0000 //TX_FASTMUE_TH -514 0x0000 //TX_DERVB_LEN_0 -515 0x0000 //TX_DERVB_LEN_1 -516 0x0000 //TX_RHO_DERVB -517 0x0000 //TX_MIC_INDX_DERVB -518 0x0000 //TX_MU_DERVB -519 0x0000 //TX_DR_RESRV_0 -520 0x0000 //TX_DR_RESRV_1 -521 0x0000 //TX_DR_RESRV_2 -522 0x0000 //TX_DR_RESRV_3 -523 0x0000 //TX_DR_RESRV_4 +514 0xC000 //TX_DEREVERB_LF_MU +515 0xC000 //TX_DEREVERB_HF_MU +516 0xCCCC //TX_DEREVERB_DELAY +517 0xD999 //TX_DEREVERB_COEF_LEN +518 0x1F40 //TX_DEREVERB_DNR +519 0x0000 //TX_DEREVERB_ALPHA +520 0x0000 //TX_DEREVERB_BETA +521 0x0000 //TX_GSC_RTOL_TH +522 0x7000 //TX_GSC_RTOH_TH +523 0x0064 //TX_WIDE2_MEANHTH 524 0x0000 //TX_DR_RESRV_5 525 0x0000 //TX_DR_RESRV_6 526 0x0000 //TX_DR_RESRV_7 @@ -42671,16 +64655,16 @@ 564 0x0000 //TX_PB_RESRV_0 565 0x0000 //TX_PB_RESRV_1 566 0x0014 //TX_FDEQ_SUBNUM -567 0x5858 //TX_FDEQ_GAIN_0 -568 0x5850 //TX_FDEQ_GAIN_1 -569 0x5050 //TX_FDEQ_GAIN_2 -570 0x5048 //TX_FDEQ_GAIN_3 -571 0x3C48 //TX_FDEQ_GAIN_4 -572 0x3C48 //TX_FDEQ_GAIN_5 -573 0x4848 //TX_FDEQ_GAIN_6 -574 0x4842 //TX_FDEQ_GAIN_7 -575 0x3030 //TX_FDEQ_GAIN_8 -576 0x3030 //TX_FDEQ_GAIN_9 +567 0x5050 //TX_FDEQ_GAIN_0 +568 0x5048 //TX_FDEQ_GAIN_1 +569 0x4848 //TX_FDEQ_GAIN_2 +570 0x483C //TX_FDEQ_GAIN_3 +571 0x3034 //TX_FDEQ_GAIN_4 +572 0x3048 //TX_FDEQ_GAIN_5 +573 0x4840 //TX_FDEQ_GAIN_6 +574 0x403C //TX_FDEQ_GAIN_7 +575 0x262C //TX_FDEQ_GAIN_8 +576 0x3A3C //TX_FDEQ_GAIN_9 577 0x4848 //TX_FDEQ_GAIN_10 578 0x4848 //TX_FDEQ_GAIN_11 579 0x4848 //TX_FDEQ_GAIN_12 @@ -42704,7 +64688,7 @@ 597 0x0708 //TX_FDEQ_BIN_6 598 0x090A //TX_FDEQ_BIN_7 599 0x0B0C //TX_FDEQ_BIN_8 -600 0x0D08 //TX_FDEQ_BIN_9 +600 0x0D0E //TX_FDEQ_BIN_9 601 0x0000 //TX_FDEQ_BIN_10 602 0x0000 //TX_FDEQ_BIN_11 603 0x0000 //TX_FDEQ_BIN_12 @@ -42728,9 +64712,9 @@ 621 0x4848 //TX_PREEQ_GAIN_MIC0_4 622 0x4848 //TX_PREEQ_GAIN_MIC0_5 623 0x4848 //TX_PREEQ_GAIN_MIC0_6 -624 0x484A //TX_PREEQ_GAIN_MIC0_7 -625 0x4B4E //TX_PREEQ_GAIN_MIC0_8 -626 0x5054 //TX_PREEQ_GAIN_MIC0_9 +624 0x4848 //TX_PREEQ_GAIN_MIC0_7 +625 0x4A4C //TX_PREEQ_GAIN_MIC0_8 +626 0x4E50 //TX_PREEQ_GAIN_MIC0_9 627 0x4848 //TX_PREEQ_GAIN_MIC0_10 628 0x4848 //TX_PREEQ_GAIN_MIC0_11 629 0x4848 //TX_PREEQ_GAIN_MIC0_12 @@ -42754,7 +64738,7 @@ 647 0x0708 //TX_PREEQ_BIN_MIC0_6 648 0x090A //TX_PREEQ_BIN_MIC0_7 649 0x0B0C //TX_PREEQ_BIN_MIC0_8 -650 0x0D08 //TX_PREEQ_BIN_MIC0_9 +650 0x0D0E //TX_PREEQ_BIN_MIC0_9 651 0x0000 //TX_PREEQ_BIN_MIC0_10 652 0x0000 //TX_PREEQ_BIN_MIC0_11 653 0x0000 //TX_PREEQ_BIN_MIC0_12 @@ -42777,9 +64761,9 @@ 670 0x4848 //TX_PREEQ_GAIN_MIC1_4 671 0x4848 //TX_PREEQ_GAIN_MIC1_5 672 0x4848 //TX_PREEQ_GAIN_MIC1_6 -673 0x4848 //TX_PREEQ_GAIN_MIC1_7 -674 0x4848 //TX_PREEQ_GAIN_MIC1_8 -675 0x4848 //TX_PREEQ_GAIN_MIC1_9 +673 0x4846 //TX_PREEQ_GAIN_MIC1_7 +674 0x4544 //TX_PREEQ_GAIN_MIC1_8 +675 0x4241 //TX_PREEQ_GAIN_MIC1_9 676 0x4848 //TX_PREEQ_GAIN_MIC1_10 677 0x4848 //TX_PREEQ_GAIN_MIC1_11 678 0x4848 //TX_PREEQ_GAIN_MIC1_12 @@ -42794,16 +64778,16 @@ 687 0x4848 //TX_PREEQ_GAIN_MIC1_21 688 0x4848 //TX_PREEQ_GAIN_MIC1_22 689 0x4848 //TX_PREEQ_GAIN_MIC1_23 -690 0x251A //TX_PREEQ_BIN_MIC1_0 -691 0x0F0F //TX_PREEQ_BIN_MIC1_1 -692 0x0C08 //TX_PREEQ_BIN_MIC1_2 -693 0x0700 //TX_PREEQ_BIN_MIC1_3 -694 0x0000 //TX_PREEQ_BIN_MIC1_4 -695 0x0000 //TX_PREEQ_BIN_MIC1_5 -696 0x0000 //TX_PREEQ_BIN_MIC1_6 -697 0x0000 //TX_PREEQ_BIN_MIC1_7 -698 0x0000 //TX_PREEQ_BIN_MIC1_8 -699 0x0000 //TX_PREEQ_BIN_MIC1_9 +690 0x0202 //TX_PREEQ_BIN_MIC1_0 +691 0x0203 //TX_PREEQ_BIN_MIC1_1 +692 0x0303 //TX_PREEQ_BIN_MIC1_2 +693 0x0304 //TX_PREEQ_BIN_MIC1_3 +694 0x0405 //TX_PREEQ_BIN_MIC1_4 +695 0x0506 //TX_PREEQ_BIN_MIC1_5 +696 0x0708 //TX_PREEQ_BIN_MIC1_6 +697 0x090A //TX_PREEQ_BIN_MIC1_7 +698 0x0B0C //TX_PREEQ_BIN_MIC1_8 +699 0x0D0E //TX_PREEQ_BIN_MIC1_9 700 0x0000 //TX_PREEQ_BIN_MIC1_10 701 0x0000 //TX_PREEQ_BIN_MIC1_11 702 0x0000 //TX_PREEQ_BIN_MIC1_12 @@ -42843,7 +64827,7 @@ 736 0x4848 //TX_PREEQ_GAIN_MIC2_21 737 0x4848 //TX_PREEQ_GAIN_MIC2_22 738 0x4848 //TX_PREEQ_GAIN_MIC2_23 -739 0x7800 //TX_PREEQ_BIN_MIC2_0 +739 0x0000 //TX_PREEQ_BIN_MIC2_0 740 0x0000 //TX_PREEQ_BIN_MIC2_1 741 0x0000 //TX_PREEQ_BIN_MIC2_2 742 0x0000 //TX_PREEQ_BIN_MIC2_3 @@ -42895,7 +64879,7 @@ 788 0x7EB8 //TX_TDDRC_ALPHA_DWN_02 789 0x7EB8 //TX_TDDRC_ALPHA_DWN_03 790 0x7EB8 //TX_TDDRC_ALPHA_DWN_04 -791 0x7FFF //TX_TDDRC_TD_DRC_LIMIT +791 0x7214 //TX_TDDRC_TD_DRC_LIMIT 792 0x0800 //TX_TDDRC_POST_LIMIT_GAIN 793 0x0000 //TX_TDDRC_RESRV_0 794 0x0000 //TX_TDDRC_RESRV_1 @@ -42962,15 +64946,15 @@ 855 0x0010 //TX_TDDRC_THRD_1 856 0x1800 //TX_TDDRC_THRD_2 857 0x1800 //TX_TDDRC_THRD_3 -858 0x6000 //TX_TDDRC_SLANT_0 -859 0x6000 //TX_TDDRC_SLANT_1 +858 0x7FFF //TX_TDDRC_SLANT_0 +859 0x7FFF //TX_TDDRC_SLANT_1 860 0x4000 //TX_TDDRC_ALPHA_UP_00 861 0x6000 //TX_TDDRC_ALPHA_DWN_00 862 0x0000 //TX_TDDRC_HMNC_FLAG 863 0x199A //TX_TDDRC_HMNC_GAIN 864 0x0000 //TX_TDDRC_SMT_FLAG 865 0x0CCD //TX_TDDRC_SMT_W -866 0x0BE3 //TX_TDDRC_DRC_GAIN +866 0x0A00 //TX_TDDRC_DRC_GAIN 867 0x7FFF //TX_TDDRC_LMT_THRD 868 0x0000 //TX_TDDRC_LMT_ALPHA 869 0x0000 //TX_TFMASKLTH @@ -42995,14 +64979,79 @@ 888 0x0028 //TX_FASTNS_ARSPC_TH 889 0xC000 //TX_FASTNS_MASK5_TH 890 0x4848 //TX_POSTSSA_MIN_G_VR_MASK -891 0x7FFF //TX_A_LESSCUT_RTO_MASK +891 0x4000 //TX_A_LESSCUT_RTO_MASK 892 0x1770 //TX_FASTNS_NOISETH 893 0xC000 //TX_FASTNS_SSA_THLFL 894 0xC000 //TX_FASTNS_SSA_THHFL 895 0xCCCC //TX_FASTNS_SSA_THLFH 896 0xD999 //TX_FASTNS_SSA_THHFH +897 0x2339 //TX_SENDFUNC_REG_MICMUTE +898 0x0021 //TX_SENDFUNC_REG_MICMUTE1 +899 0x02BC //TX_MICMUTE_RATIO_THR +900 0x0140 //TX_MICMUTE_AMP_THR +901 0x0004 //TX_MICMUTE_HPF_IND +902 0x00C0 //TX_MICMUTE_LOG_EYR_TH +903 0x0008 //TX_MICMUTE_CVG_TIME +904 0x0008 //TX_MICMUTE_RELEASE_TIME +905 0x01FE //TX_MIC_VOLUME_MIC0MUTE +906 0x0020 //TX_MICMUTE_EPD_OFFSET_0 +907 0x001E //TX_MICMUTE_FRQ_AEC_L +908 0x7999 //TX_MICMUTE_EAD_THR +909 0x7FFF //TX_MICMUTE_LAMBDA_CB_NLE +910 0x7FFF //TX_MICMUTE_LAMBDA_RE_EST +911 0x4000 //TX_DTD_THR1_MICMUTE_0 +912 0x7000 //TX_DTD_THR1_MICMUTE_1 +913 0x7FFF //TX_DTD_THR1_MICMUTE_2 +914 0x7FFF //TX_DTD_THR1_MICMUTE_3 +915 0x6CCC //TX_DTD_THR2_MICMUTE_0 +916 0x0400 //TX_MICMUTE_MIN_EQ_RE_EST_0 +917 0x0400 //TX_MICMUTE_MIN_EQ_RE_EST_1 +918 0x1000 //TX_MICMUTE_MIN_EQ_RE_EST_2 +919 0x7FFF //TX_MICMUTE_MIN_EQ_RE_EST_3 +920 0x7FFF //TX_MICMUTE_MIN_EQ_RE_EST_4 +921 0x4000 //TX_MICMUTE_C_POST_FLT +922 0x03E8 //TX_MICMUTE_DT_CUT_K +923 0x0001 //TX_MICMUTE_DT_CUT_THR +924 0x03E8 //TX_MICMUTE_DT_CUT_K2 +925 0x0001 //TX_MICMUTE_DT_CUT_THR2 +926 0x0064 //TX_MICMUTE_DT2_HOLD_N +927 0x1000 //TX_MICMUTE_RATIODTH_THCUT +928 0x1000 //TX_MICMUTE_B_POST_FLT_ECHOL +929 0x7FFF //TX_MICMUTE_B_POST_FLT_ECHOH +930 0x0400 //TX_MICMUTE_C_POST_FLT_MASK +931 0x7999 //TX_MICMUTE_RATIODTL_CUT_TH +932 0x0258 //TX_MICMUTE_DT_CUT_K1 +933 0x0800 //TX_MICMUTE_N2_SN_EST +934 0xFC00 //TX_MICMUTE_THR_SN_EST_0 +935 0x001C //TX_MICMUTE_MIN_G_CTRL_0 +936 0x6000 //TX_MICMUTE_A_POST_FILT_S_0 +937 0x7000 //TX_MICMUTE_B_POST_FILT_0 +938 0x2710 //TX_MIC1RUB_AMP_THR +939 0x0010 //TX_MIC1MUTE_RATIO_THR +940 0x0450 //TX_MIC1MUTE_AMP_THR +941 0x0008 //TX_MIC1MUTE_CVG_TIME +942 0x0008 //TX_MIC1MUTE_RELEASE_TIME +943 0x0000 //TX_AMS_RESRV_01 +944 0x0000 //TX_AMS_RESRV_02 +945 0x0000 //TX_AMS_RESRV_03 +946 0x0000 //TX_AMS_RESRV_04 +947 0x0000 //TX_AMS_RESRV_05 +948 0x0000 //TX_AMS_RESRV_06 +949 0x0000 //TX_AMS_RESRV_07 +950 0x0000 //TX_AMS_RESRV_08 +951 0x0000 //TX_AMS_RESRV_09 +952 0x0000 //TX_AMS_RESRV_10 +953 0x0000 //TX_AMS_RESRV_11 +954 0x0000 //TX_AMS_RESRV_12 +955 0x0000 //TX_AMS_RESRV_13 +956 0x0000 //TX_AMS_RESRV_14 +957 0x0000 //TX_AMS_RESRV_15 +958 0x0000 //TX_AMS_RESRV_16 +959 0x0000 //TX_AMS_RESRV_17 +960 0x0000 //TX_AMS_RESRV_18 +961 0x0000 //TX_AMS_RESRV_19 #RX -0 0x0040 //RX_RECVFUNC_MODE_0 +0 0x2040 //RX_RECVFUNC_MODE_0 1 0x0000 //RX_RECVFUNC_MODE_1 2 0x0000 //RX_SAMPLINGFREQ_SIG 3 0x0000 //RX_SAMPLINGFREQ_PROC @@ -43852,18 +65901,869 @@ 110 0x0000 //RX_FDDRC_RESRV_0 129 0x0100 //RX_SPK_VOL 130 0x0000 //RX_VOL_RESRV_0 +#RX 2 +157 0x2040 //RX_RECVFUNC_MODE_0 +158 0x0000 //RX_RECVFUNC_MODE_1 +159 0x0000 //RX_SAMPLINGFREQ_SIG +160 0x0000 //RX_SAMPLINGFREQ_PROC +161 0x000A //RX_FRAME_SZ +162 0x0000 //RX_DELAY_OPT +163 0x3000 //RX_TDDRC_ALPHA_UP_1 +164 0x3000 //RX_TDDRC_ALPHA_UP_2 +165 0x3000 //RX_TDDRC_ALPHA_UP_3 +166 0x3000 //RX_TDDRC_ALPHA_UP_4 +167 0x050D //RX_PGA +168 0x7652 //RX_A_HP +169 0x4000 //RX_B_PE +170 0x7800 //RX_THR_PITCH_DET_0 +171 0x7000 //RX_THR_PITCH_DET_1 +172 0x6000 //RX_THR_PITCH_DET_2 +173 0x0000 //RX_PITCH_BFR_LEN +174 0x0000 //RX_SBD_PITCH_DET +175 0x0000 //RX_PP_RESRV_0 +176 0x0000 //RX_PP_RESRV_1 +177 0xF800 //RX_N_SN_EST +178 0x0000 //RX_N2_SN_EST +179 0x000F //RX_NS_LVL_CTRL +180 0xF800 //RX_THR_SN_EST +181 0x7E00 //RX_LAMBDA_PFILT +182 0x000A //RX_FENS_RESRV_0 +183 0x0000 //RX_FENS_RESRV_1 +184 0x7FB0 //RX_TDDRC_ALPHA_DWN_1 +185 0x7FB0 //RX_TDDRC_ALPHA_DWN_2 +186 0x7FB0 //RX_TDDRC_ALPHA_DWN_3 +187 0x0000 //RX_EXTRA_NS_L +188 0x0000 //RX_EXTRA_NS_A +189 0x7FB0 //RX_TDDRC_ALPHA_DWN_4 +190 0xDA9E //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +192 0x0000 //RX_A_POST_FLT +193 0x0000 //RX_LMT_THRD +194 0x4000 //RX_LMT_ALPHA +195 0x0020 //RX_FDEQ_SUBNUM +196 0x4848 //RX_FDEQ_GAIN_0 +197 0x4848 //RX_FDEQ_GAIN_1 +198 0x4848 //RX_FDEQ_GAIN_2 +199 0x4848 //RX_FDEQ_GAIN_3 +200 0x4848 //RX_FDEQ_GAIN_4 +201 0x4848 //RX_FDEQ_GAIN_5 +202 0x4848 //RX_FDEQ_GAIN_6 +203 0x4848 //RX_FDEQ_GAIN_7 +204 0x4848 //RX_FDEQ_GAIN_8 +205 0x4848 //RX_FDEQ_GAIN_9 +206 0x4848 //RX_FDEQ_GAIN_10 +207 0x4848 //RX_FDEQ_GAIN_11 +208 0x4848 //RX_FDEQ_GAIN_12 +209 0x4848 //RX_FDEQ_GAIN_13 +210 0x4848 //RX_FDEQ_GAIN_14 +211 0x4848 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0000 //RX_FDEQ_BIN_0 +221 0x0000 //RX_FDEQ_BIN_1 +222 0x0000 //RX_FDEQ_BIN_2 +223 0x0000 //RX_FDEQ_BIN_3 +224 0x0000 //RX_FDEQ_BIN_4 +225 0x0000 //RX_FDEQ_BIN_5 +226 0x0000 //RX_FDEQ_BIN_6 +227 0x0000 //RX_FDEQ_BIN_7 +228 0x0000 //RX_FDEQ_BIN_8 +229 0x0000 //RX_FDEQ_BIN_9 +230 0x0000 //RX_FDEQ_BIN_10 +231 0x0000 //RX_FDEQ_BIN_11 +232 0x0000 //RX_FDEQ_BIN_12 +233 0x0000 //RX_FDEQ_BIN_13 +234 0x0000 //RX_FDEQ_BIN_14 +235 0x0000 //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x0000 //RX_FDEQ_RESRV_0 +245 0x0000 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0030 //RX_FDDRC_BAND_MARGIN_1 +248 0x0050 //RX_FDDRC_BAND_MARGIN_2 +249 0x0080 //RX_FDDRC_BAND_MARGIN_3 +250 0x0004 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x5000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x6400 //RX_FDDRC_THRD_3_2 +258 0x6400 //RX_FDDRC_THRD_3_3 +259 0x2000 //RX_FDDRC_SLANT_0_0 +260 0x2000 //RX_FDDRC_SLANT_0_1 +261 0x2000 //RX_FDDRC_SLANT_0_2 +262 0x2000 //RX_FDDRC_SLANT_0_3 +263 0x2000 //RX_FDDRC_SLANT_1_0 +264 0x2000 //RX_FDDRC_SLANT_1_1 +265 0x2000 //RX_FDDRC_SLANT_1_2 +266 0x2000 //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +268 0x0003 //RX_FILTINDX +269 0x0000 //RX_TDDRC_THRD_0 +270 0x0000 //RX_TDDRC_THRD_1 +271 0x0E80 //RX_TDDRC_THRD_2 +272 0x3800 //RX_TDDRC_THRD_3 +273 0x2A00 //RX_TDDRC_SLANT_0 +274 0x6E00 //RX_TDDRC_SLANT_1 +275 0x3000 //RX_TDDRC_ALPHA_UP_0 +276 0x7FB0 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x0000 //RX_TDDRC_HMNC_GAIN +279 0x0000 //RX_TDDRC_SMT_FLAG +280 0x0000 //RX_TDDRC_SMT_W +281 0x0100 //RX_TDDRC_DRC_GAIN +282 0x7C00 //RX_LAMBDA_PKA_FP +283 0x2000 //RX_TPKA_FP +284 0x0080 //RX_MIN_G_FP +285 0x2000 //RX_MAX_G_FP +286 0x0100 //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 +288 0x0010 //RX_MAXLEVEL_CNG +289 0x0000 //RX_BWE_UV_TH +290 0x0000 //RX_BWE_UV_TH2 +291 0x0000 //RX_BWE_UV_TH3 +292 0x0000 //RX_BWE_V_TH +293 0x0000 //RX_BWE_GAIN1_V_TH1 +294 0x0000 //RX_BWE_GAIN1_V_TH2 +295 0x0000 //RX_BWE_UV_EQ +296 0x0000 //RX_BWE_V_EQ +297 0x0000 //RX_BWE_TONE_TH +298 0x0000 //RX_BWE_UV_HOLD_T +299 0x0000 //RX_BWE_GAIN2_ALPHA +300 0x0000 //RX_BWE_GAIN3_ALPHA +301 0x0000 //RX_BWE_CUTOFF +302 0x0000 //RX_BWE_GAINFILL +303 0x0000 //RX_BWE_MAXTH_TONE +304 0x0000 //RX_BWE_EQ_0 +305 0x0000 //RX_BWE_EQ_1 +306 0x0000 //RX_BWE_EQ_2 +307 0x0000 //RX_BWE_EQ_3 +308 0x0000 //RX_BWE_EQ_4 +309 0x0000 //RX_BWE_EQ_5 +310 0x0000 //RX_BWE_EQ_6 +311 0x0000 //RX_BWE_RESRV_0 +312 0x0000 //RX_BWE_RESRV_1 +313 0x0000 //RX_BWE_RESRV_2 +#VOL 0 +163 0x3000 //RX_TDDRC_ALPHA_UP_1 +164 0x3000 //RX_TDDRC_ALPHA_UP_2 +165 0x3000 //RX_TDDRC_ALPHA_UP_3 +166 0x3000 //RX_TDDRC_ALPHA_UP_4 +184 0x7FB0 //RX_TDDRC_ALPHA_DWN_1 +185 0x7FB0 //RX_TDDRC_ALPHA_DWN_2 +186 0x7FB0 //RX_TDDRC_ALPHA_DWN_3 +189 0x7FB0 //RX_TDDRC_ALPHA_DWN_4 +190 0xDA9E //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +269 0x0000 //RX_TDDRC_THRD_0 +270 0x0000 //RX_TDDRC_THRD_1 +271 0x0E80 //RX_TDDRC_THRD_2 +272 0x3800 //RX_TDDRC_THRD_3 +273 0x2A00 //RX_TDDRC_SLANT_0 +274 0x6E00 //RX_TDDRC_SLANT_1 +275 0x3000 //RX_TDDRC_ALPHA_UP_0 +276 0x7FB0 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x0000 //RX_TDDRC_HMNC_GAIN +279 0x0000 //RX_TDDRC_SMT_FLAG +280 0x0000 //RX_TDDRC_SMT_W +281 0x0100 //RX_TDDRC_DRC_GAIN +195 0x0020 //RX_FDEQ_SUBNUM +196 0x4848 //RX_FDEQ_GAIN_0 +197 0x4848 //RX_FDEQ_GAIN_1 +198 0x4848 //RX_FDEQ_GAIN_2 +199 0x4848 //RX_FDEQ_GAIN_3 +200 0x4848 //RX_FDEQ_GAIN_4 +201 0x4848 //RX_FDEQ_GAIN_5 +202 0x4848 //RX_FDEQ_GAIN_6 +203 0x4848 //RX_FDEQ_GAIN_7 +204 0x4848 //RX_FDEQ_GAIN_8 +205 0x4848 //RX_FDEQ_GAIN_9 +206 0x4848 //RX_FDEQ_GAIN_10 +207 0x4848 //RX_FDEQ_GAIN_11 +208 0x4848 //RX_FDEQ_GAIN_12 +209 0x4848 //RX_FDEQ_GAIN_13 +210 0x4848 //RX_FDEQ_GAIN_14 +211 0x4848 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0000 //RX_FDEQ_BIN_0 +221 0x0000 //RX_FDEQ_BIN_1 +222 0x0000 //RX_FDEQ_BIN_2 +223 0x0000 //RX_FDEQ_BIN_3 +224 0x0000 //RX_FDEQ_BIN_4 +225 0x0000 //RX_FDEQ_BIN_5 +226 0x0000 //RX_FDEQ_BIN_6 +227 0x0000 //RX_FDEQ_BIN_7 +228 0x0000 //RX_FDEQ_BIN_8 +229 0x0000 //RX_FDEQ_BIN_9 +230 0x0000 //RX_FDEQ_BIN_10 +231 0x0000 //RX_FDEQ_BIN_11 +232 0x0000 //RX_FDEQ_BIN_12 +233 0x0000 //RX_FDEQ_BIN_13 +234 0x0000 //RX_FDEQ_BIN_14 +235 0x0000 //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x0000 //RX_FDEQ_RESRV_0 +245 0x0000 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0030 //RX_FDDRC_BAND_MARGIN_1 +248 0x0050 //RX_FDDRC_BAND_MARGIN_2 +249 0x0080 //RX_FDDRC_BAND_MARGIN_3 +250 0x0004 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x5000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x6400 //RX_FDDRC_THRD_3_2 +258 0x6400 //RX_FDDRC_THRD_3_3 +259 0x2000 //RX_FDDRC_SLANT_0_0 +260 0x2000 //RX_FDDRC_SLANT_0_1 +261 0x2000 //RX_FDDRC_SLANT_0_2 +262 0x2000 //RX_FDDRC_SLANT_0_3 +263 0x2000 //RX_FDDRC_SLANT_1_0 +264 0x2000 //RX_FDDRC_SLANT_1_1 +265 0x2000 //RX_FDDRC_SLANT_1_2 +266 0x2000 //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +286 0x0100 //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 +#VOL 1 +163 0x3000 //RX_TDDRC_ALPHA_UP_1 +164 0x3000 //RX_TDDRC_ALPHA_UP_2 +165 0x3000 //RX_TDDRC_ALPHA_UP_3 +166 0x3000 //RX_TDDRC_ALPHA_UP_4 +184 0x7FB0 //RX_TDDRC_ALPHA_DWN_1 +185 0x7FB0 //RX_TDDRC_ALPHA_DWN_2 +186 0x7FB0 //RX_TDDRC_ALPHA_DWN_3 +189 0x7FB0 //RX_TDDRC_ALPHA_DWN_4 +190 0xDA9E //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +269 0x0000 //RX_TDDRC_THRD_0 +270 0x0000 //RX_TDDRC_THRD_1 +271 0x0E80 //RX_TDDRC_THRD_2 +272 0x3800 //RX_TDDRC_THRD_3 +273 0x2A00 //RX_TDDRC_SLANT_0 +274 0x6E00 //RX_TDDRC_SLANT_1 +275 0x3000 //RX_TDDRC_ALPHA_UP_0 +276 0x7FB0 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x0000 //RX_TDDRC_HMNC_GAIN +279 0x0000 //RX_TDDRC_SMT_FLAG +280 0x0000 //RX_TDDRC_SMT_W +281 0x0100 //RX_TDDRC_DRC_GAIN +195 0x0020 //RX_FDEQ_SUBNUM +196 0x4848 //RX_FDEQ_GAIN_0 +197 0x4848 //RX_FDEQ_GAIN_1 +198 0x4848 //RX_FDEQ_GAIN_2 +199 0x4848 //RX_FDEQ_GAIN_3 +200 0x4848 //RX_FDEQ_GAIN_4 +201 0x4848 //RX_FDEQ_GAIN_5 +202 0x4848 //RX_FDEQ_GAIN_6 +203 0x4848 //RX_FDEQ_GAIN_7 +204 0x4848 //RX_FDEQ_GAIN_8 +205 0x4848 //RX_FDEQ_GAIN_9 +206 0x4848 //RX_FDEQ_GAIN_10 +207 0x4848 //RX_FDEQ_GAIN_11 +208 0x4848 //RX_FDEQ_GAIN_12 +209 0x4848 //RX_FDEQ_GAIN_13 +210 0x4848 //RX_FDEQ_GAIN_14 +211 0x4848 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0000 //RX_FDEQ_BIN_0 +221 0x0000 //RX_FDEQ_BIN_1 +222 0x0000 //RX_FDEQ_BIN_2 +223 0x0000 //RX_FDEQ_BIN_3 +224 0x0000 //RX_FDEQ_BIN_4 +225 0x0000 //RX_FDEQ_BIN_5 +226 0x0000 //RX_FDEQ_BIN_6 +227 0x0000 //RX_FDEQ_BIN_7 +228 0x0000 //RX_FDEQ_BIN_8 +229 0x0000 //RX_FDEQ_BIN_9 +230 0x0000 //RX_FDEQ_BIN_10 +231 0x0000 //RX_FDEQ_BIN_11 +232 0x0000 //RX_FDEQ_BIN_12 +233 0x0000 //RX_FDEQ_BIN_13 +234 0x0000 //RX_FDEQ_BIN_14 +235 0x0000 //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x0000 //RX_FDEQ_RESRV_0 +245 0x0000 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0030 //RX_FDDRC_BAND_MARGIN_1 +248 0x0050 //RX_FDDRC_BAND_MARGIN_2 +249 0x0080 //RX_FDDRC_BAND_MARGIN_3 +250 0x0004 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x5000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x6400 //RX_FDDRC_THRD_3_2 +258 0x6400 //RX_FDDRC_THRD_3_3 +259 0x2000 //RX_FDDRC_SLANT_0_0 +260 0x2000 //RX_FDDRC_SLANT_0_1 +261 0x2000 //RX_FDDRC_SLANT_0_2 +262 0x2000 //RX_FDDRC_SLANT_0_3 +263 0x2000 //RX_FDDRC_SLANT_1_0 +264 0x2000 //RX_FDDRC_SLANT_1_1 +265 0x2000 //RX_FDDRC_SLANT_1_2 +266 0x2000 //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +286 0x0100 //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 +#VOL 2 +163 0x3000 //RX_TDDRC_ALPHA_UP_1 +164 0x3000 //RX_TDDRC_ALPHA_UP_2 +165 0x3000 //RX_TDDRC_ALPHA_UP_3 +166 0x3000 //RX_TDDRC_ALPHA_UP_4 +184 0x7FB0 //RX_TDDRC_ALPHA_DWN_1 +185 0x7FB0 //RX_TDDRC_ALPHA_DWN_2 +186 0x7FB0 //RX_TDDRC_ALPHA_DWN_3 +189 0x7FB0 //RX_TDDRC_ALPHA_DWN_4 +190 0xDA9E //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +269 0x0000 //RX_TDDRC_THRD_0 +270 0x0000 //RX_TDDRC_THRD_1 +271 0x0E80 //RX_TDDRC_THRD_2 +272 0x3800 //RX_TDDRC_THRD_3 +273 0x2A00 //RX_TDDRC_SLANT_0 +274 0x6E00 //RX_TDDRC_SLANT_1 +275 0x3000 //RX_TDDRC_ALPHA_UP_0 +276 0x7FB0 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x0000 //RX_TDDRC_HMNC_GAIN +279 0x0000 //RX_TDDRC_SMT_FLAG +280 0x0000 //RX_TDDRC_SMT_W +281 0x0100 //RX_TDDRC_DRC_GAIN +195 0x0020 //RX_FDEQ_SUBNUM +196 0x4848 //RX_FDEQ_GAIN_0 +197 0x4848 //RX_FDEQ_GAIN_1 +198 0x4848 //RX_FDEQ_GAIN_2 +199 0x4848 //RX_FDEQ_GAIN_3 +200 0x4848 //RX_FDEQ_GAIN_4 +201 0x4848 //RX_FDEQ_GAIN_5 +202 0x4848 //RX_FDEQ_GAIN_6 +203 0x4848 //RX_FDEQ_GAIN_7 +204 0x4848 //RX_FDEQ_GAIN_8 +205 0x4848 //RX_FDEQ_GAIN_9 +206 0x4848 //RX_FDEQ_GAIN_10 +207 0x4848 //RX_FDEQ_GAIN_11 +208 0x4848 //RX_FDEQ_GAIN_12 +209 0x4848 //RX_FDEQ_GAIN_13 +210 0x4848 //RX_FDEQ_GAIN_14 +211 0x4848 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0000 //RX_FDEQ_BIN_0 +221 0x0000 //RX_FDEQ_BIN_1 +222 0x0000 //RX_FDEQ_BIN_2 +223 0x0000 //RX_FDEQ_BIN_3 +224 0x0000 //RX_FDEQ_BIN_4 +225 0x0000 //RX_FDEQ_BIN_5 +226 0x0000 //RX_FDEQ_BIN_6 +227 0x0000 //RX_FDEQ_BIN_7 +228 0x0000 //RX_FDEQ_BIN_8 +229 0x0000 //RX_FDEQ_BIN_9 +230 0x0000 //RX_FDEQ_BIN_10 +231 0x0000 //RX_FDEQ_BIN_11 +232 0x0000 //RX_FDEQ_BIN_12 +233 0x0000 //RX_FDEQ_BIN_13 +234 0x0000 //RX_FDEQ_BIN_14 +235 0x0000 //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x0000 //RX_FDEQ_RESRV_0 +245 0x0000 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0030 //RX_FDDRC_BAND_MARGIN_1 +248 0x0050 //RX_FDDRC_BAND_MARGIN_2 +249 0x0080 //RX_FDDRC_BAND_MARGIN_3 +250 0x0004 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x5000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x6400 //RX_FDDRC_THRD_3_2 +258 0x6400 //RX_FDDRC_THRD_3_3 +259 0x2000 //RX_FDDRC_SLANT_0_0 +260 0x2000 //RX_FDDRC_SLANT_0_1 +261 0x2000 //RX_FDDRC_SLANT_0_2 +262 0x2000 //RX_FDDRC_SLANT_0_3 +263 0x2000 //RX_FDDRC_SLANT_1_0 +264 0x2000 //RX_FDDRC_SLANT_1_1 +265 0x2000 //RX_FDDRC_SLANT_1_2 +266 0x2000 //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +286 0x0100 //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 +#VOL 3 +163 0x3000 //RX_TDDRC_ALPHA_UP_1 +164 0x3000 //RX_TDDRC_ALPHA_UP_2 +165 0x3000 //RX_TDDRC_ALPHA_UP_3 +166 0x3000 //RX_TDDRC_ALPHA_UP_4 +184 0x7FB0 //RX_TDDRC_ALPHA_DWN_1 +185 0x7FB0 //RX_TDDRC_ALPHA_DWN_2 +186 0x7FB0 //RX_TDDRC_ALPHA_DWN_3 +189 0x7FB0 //RX_TDDRC_ALPHA_DWN_4 +190 0xDA9E //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +269 0x0000 //RX_TDDRC_THRD_0 +270 0x0000 //RX_TDDRC_THRD_1 +271 0x0E80 //RX_TDDRC_THRD_2 +272 0x3800 //RX_TDDRC_THRD_3 +273 0x2A00 //RX_TDDRC_SLANT_0 +274 0x6E00 //RX_TDDRC_SLANT_1 +275 0x3000 //RX_TDDRC_ALPHA_UP_0 +276 0x7FB0 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x0000 //RX_TDDRC_HMNC_GAIN +279 0x0000 //RX_TDDRC_SMT_FLAG +280 0x0000 //RX_TDDRC_SMT_W +281 0x0100 //RX_TDDRC_DRC_GAIN +195 0x0020 //RX_FDEQ_SUBNUM +196 0x4848 //RX_FDEQ_GAIN_0 +197 0x4848 //RX_FDEQ_GAIN_1 +198 0x4848 //RX_FDEQ_GAIN_2 +199 0x4848 //RX_FDEQ_GAIN_3 +200 0x4848 //RX_FDEQ_GAIN_4 +201 0x4848 //RX_FDEQ_GAIN_5 +202 0x4848 //RX_FDEQ_GAIN_6 +203 0x4848 //RX_FDEQ_GAIN_7 +204 0x4848 //RX_FDEQ_GAIN_8 +205 0x4848 //RX_FDEQ_GAIN_9 +206 0x4848 //RX_FDEQ_GAIN_10 +207 0x4848 //RX_FDEQ_GAIN_11 +208 0x4848 //RX_FDEQ_GAIN_12 +209 0x4848 //RX_FDEQ_GAIN_13 +210 0x4848 //RX_FDEQ_GAIN_14 +211 0x4848 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0000 //RX_FDEQ_BIN_0 +221 0x0000 //RX_FDEQ_BIN_1 +222 0x0000 //RX_FDEQ_BIN_2 +223 0x0000 //RX_FDEQ_BIN_3 +224 0x0000 //RX_FDEQ_BIN_4 +225 0x0000 //RX_FDEQ_BIN_5 +226 0x0000 //RX_FDEQ_BIN_6 +227 0x0000 //RX_FDEQ_BIN_7 +228 0x0000 //RX_FDEQ_BIN_8 +229 0x0000 //RX_FDEQ_BIN_9 +230 0x0000 //RX_FDEQ_BIN_10 +231 0x0000 //RX_FDEQ_BIN_11 +232 0x0000 //RX_FDEQ_BIN_12 +233 0x0000 //RX_FDEQ_BIN_13 +234 0x0000 //RX_FDEQ_BIN_14 +235 0x0000 //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x0000 //RX_FDEQ_RESRV_0 +245 0x0000 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0030 //RX_FDDRC_BAND_MARGIN_1 +248 0x0050 //RX_FDDRC_BAND_MARGIN_2 +249 0x0080 //RX_FDDRC_BAND_MARGIN_3 +250 0x0004 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x5000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x6400 //RX_FDDRC_THRD_3_2 +258 0x6400 //RX_FDDRC_THRD_3_3 +259 0x2000 //RX_FDDRC_SLANT_0_0 +260 0x2000 //RX_FDDRC_SLANT_0_1 +261 0x2000 //RX_FDDRC_SLANT_0_2 +262 0x2000 //RX_FDDRC_SLANT_0_3 +263 0x2000 //RX_FDDRC_SLANT_1_0 +264 0x2000 //RX_FDDRC_SLANT_1_1 +265 0x2000 //RX_FDDRC_SLANT_1_2 +266 0x2000 //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +286 0x0100 //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 +#VOL 4 +163 0x3000 //RX_TDDRC_ALPHA_UP_1 +164 0x3000 //RX_TDDRC_ALPHA_UP_2 +165 0x3000 //RX_TDDRC_ALPHA_UP_3 +166 0x3000 //RX_TDDRC_ALPHA_UP_4 +184 0x7FB0 //RX_TDDRC_ALPHA_DWN_1 +185 0x7FB0 //RX_TDDRC_ALPHA_DWN_2 +186 0x7FB0 //RX_TDDRC_ALPHA_DWN_3 +189 0x7FB0 //RX_TDDRC_ALPHA_DWN_4 +190 0xDA9E //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +269 0x0000 //RX_TDDRC_THRD_0 +270 0x0000 //RX_TDDRC_THRD_1 +271 0x0E80 //RX_TDDRC_THRD_2 +272 0x3800 //RX_TDDRC_THRD_3 +273 0x2A00 //RX_TDDRC_SLANT_0 +274 0x6E00 //RX_TDDRC_SLANT_1 +275 0x3000 //RX_TDDRC_ALPHA_UP_0 +276 0x7FB0 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x0000 //RX_TDDRC_HMNC_GAIN +279 0x0000 //RX_TDDRC_SMT_FLAG +280 0x0000 //RX_TDDRC_SMT_W +281 0x0100 //RX_TDDRC_DRC_GAIN +195 0x0020 //RX_FDEQ_SUBNUM +196 0x4848 //RX_FDEQ_GAIN_0 +197 0x4848 //RX_FDEQ_GAIN_1 +198 0x4848 //RX_FDEQ_GAIN_2 +199 0x4848 //RX_FDEQ_GAIN_3 +200 0x4848 //RX_FDEQ_GAIN_4 +201 0x4848 //RX_FDEQ_GAIN_5 +202 0x4848 //RX_FDEQ_GAIN_6 +203 0x4848 //RX_FDEQ_GAIN_7 +204 0x4848 //RX_FDEQ_GAIN_8 +205 0x4848 //RX_FDEQ_GAIN_9 +206 0x4848 //RX_FDEQ_GAIN_10 +207 0x4848 //RX_FDEQ_GAIN_11 +208 0x4848 //RX_FDEQ_GAIN_12 +209 0x4848 //RX_FDEQ_GAIN_13 +210 0x4848 //RX_FDEQ_GAIN_14 +211 0x4848 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0000 //RX_FDEQ_BIN_0 +221 0x0000 //RX_FDEQ_BIN_1 +222 0x0000 //RX_FDEQ_BIN_2 +223 0x0000 //RX_FDEQ_BIN_3 +224 0x0000 //RX_FDEQ_BIN_4 +225 0x0000 //RX_FDEQ_BIN_5 +226 0x0000 //RX_FDEQ_BIN_6 +227 0x0000 //RX_FDEQ_BIN_7 +228 0x0000 //RX_FDEQ_BIN_8 +229 0x0000 //RX_FDEQ_BIN_9 +230 0x0000 //RX_FDEQ_BIN_10 +231 0x0000 //RX_FDEQ_BIN_11 +232 0x0000 //RX_FDEQ_BIN_12 +233 0x0000 //RX_FDEQ_BIN_13 +234 0x0000 //RX_FDEQ_BIN_14 +235 0x0000 //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x0000 //RX_FDEQ_RESRV_0 +245 0x0000 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0030 //RX_FDDRC_BAND_MARGIN_1 +248 0x0050 //RX_FDDRC_BAND_MARGIN_2 +249 0x0080 //RX_FDDRC_BAND_MARGIN_3 +250 0x0004 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x5000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x6400 //RX_FDDRC_THRD_3_2 +258 0x6400 //RX_FDDRC_THRD_3_3 +259 0x2000 //RX_FDDRC_SLANT_0_0 +260 0x2000 //RX_FDDRC_SLANT_0_1 +261 0x2000 //RX_FDDRC_SLANT_0_2 +262 0x2000 //RX_FDDRC_SLANT_0_3 +263 0x2000 //RX_FDDRC_SLANT_1_0 +264 0x2000 //RX_FDDRC_SLANT_1_1 +265 0x2000 //RX_FDDRC_SLANT_1_2 +266 0x2000 //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +286 0x0100 //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 +#VOL 5 +163 0x3000 //RX_TDDRC_ALPHA_UP_1 +164 0x3000 //RX_TDDRC_ALPHA_UP_2 +165 0x3000 //RX_TDDRC_ALPHA_UP_3 +166 0x3000 //RX_TDDRC_ALPHA_UP_4 +184 0x7FB0 //RX_TDDRC_ALPHA_DWN_1 +185 0x7FB0 //RX_TDDRC_ALPHA_DWN_2 +186 0x7FB0 //RX_TDDRC_ALPHA_DWN_3 +189 0x7FB0 //RX_TDDRC_ALPHA_DWN_4 +190 0xDA9E //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +269 0x0000 //RX_TDDRC_THRD_0 +270 0x0000 //RX_TDDRC_THRD_1 +271 0x0E80 //RX_TDDRC_THRD_2 +272 0x3800 //RX_TDDRC_THRD_3 +273 0x2A00 //RX_TDDRC_SLANT_0 +274 0x6E00 //RX_TDDRC_SLANT_1 +275 0x3000 //RX_TDDRC_ALPHA_UP_0 +276 0x7FB0 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x0000 //RX_TDDRC_HMNC_GAIN +279 0x0000 //RX_TDDRC_SMT_FLAG +280 0x0000 //RX_TDDRC_SMT_W +281 0x0100 //RX_TDDRC_DRC_GAIN +195 0x0020 //RX_FDEQ_SUBNUM +196 0x4848 //RX_FDEQ_GAIN_0 +197 0x4848 //RX_FDEQ_GAIN_1 +198 0x4848 //RX_FDEQ_GAIN_2 +199 0x4848 //RX_FDEQ_GAIN_3 +200 0x4848 //RX_FDEQ_GAIN_4 +201 0x4848 //RX_FDEQ_GAIN_5 +202 0x4848 //RX_FDEQ_GAIN_6 +203 0x4848 //RX_FDEQ_GAIN_7 +204 0x4848 //RX_FDEQ_GAIN_8 +205 0x4848 //RX_FDEQ_GAIN_9 +206 0x4848 //RX_FDEQ_GAIN_10 +207 0x4848 //RX_FDEQ_GAIN_11 +208 0x4848 //RX_FDEQ_GAIN_12 +209 0x4848 //RX_FDEQ_GAIN_13 +210 0x4848 //RX_FDEQ_GAIN_14 +211 0x4848 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0000 //RX_FDEQ_BIN_0 +221 0x0000 //RX_FDEQ_BIN_1 +222 0x0000 //RX_FDEQ_BIN_2 +223 0x0000 //RX_FDEQ_BIN_3 +224 0x0000 //RX_FDEQ_BIN_4 +225 0x0000 //RX_FDEQ_BIN_5 +226 0x0000 //RX_FDEQ_BIN_6 +227 0x0000 //RX_FDEQ_BIN_7 +228 0x0000 //RX_FDEQ_BIN_8 +229 0x0000 //RX_FDEQ_BIN_9 +230 0x0000 //RX_FDEQ_BIN_10 +231 0x0000 //RX_FDEQ_BIN_11 +232 0x0000 //RX_FDEQ_BIN_12 +233 0x0000 //RX_FDEQ_BIN_13 +234 0x0000 //RX_FDEQ_BIN_14 +235 0x0000 //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x0000 //RX_FDEQ_RESRV_0 +245 0x0000 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0030 //RX_FDDRC_BAND_MARGIN_1 +248 0x0050 //RX_FDDRC_BAND_MARGIN_2 +249 0x0080 //RX_FDDRC_BAND_MARGIN_3 +250 0x0004 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x5000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x6400 //RX_FDDRC_THRD_3_2 +258 0x6400 //RX_FDDRC_THRD_3_3 +259 0x2000 //RX_FDDRC_SLANT_0_0 +260 0x2000 //RX_FDDRC_SLANT_0_1 +261 0x2000 //RX_FDDRC_SLANT_0_2 +262 0x2000 //RX_FDDRC_SLANT_0_3 +263 0x2000 //RX_FDDRC_SLANT_1_0 +264 0x2000 //RX_FDDRC_SLANT_1_1 +265 0x2000 //RX_FDDRC_SLANT_1_2 +266 0x2000 //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +286 0x0100 //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 +#VOL 6 +163 0x3000 //RX_TDDRC_ALPHA_UP_1 +164 0x3000 //RX_TDDRC_ALPHA_UP_2 +165 0x3000 //RX_TDDRC_ALPHA_UP_3 +166 0x3000 //RX_TDDRC_ALPHA_UP_4 +184 0x7FB0 //RX_TDDRC_ALPHA_DWN_1 +185 0x7FB0 //RX_TDDRC_ALPHA_DWN_2 +186 0x7FB0 //RX_TDDRC_ALPHA_DWN_3 +189 0x7FB0 //RX_TDDRC_ALPHA_DWN_4 +190 0xDA9E //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +269 0x0000 //RX_TDDRC_THRD_0 +270 0x0000 //RX_TDDRC_THRD_1 +271 0x0E80 //RX_TDDRC_THRD_2 +272 0x3800 //RX_TDDRC_THRD_3 +273 0x2A00 //RX_TDDRC_SLANT_0 +274 0x6E00 //RX_TDDRC_SLANT_1 +275 0x3000 //RX_TDDRC_ALPHA_UP_0 +276 0x7FB0 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x0000 //RX_TDDRC_HMNC_GAIN +279 0x0000 //RX_TDDRC_SMT_FLAG +280 0x0000 //RX_TDDRC_SMT_W +281 0x0100 //RX_TDDRC_DRC_GAIN +195 0x0020 //RX_FDEQ_SUBNUM +196 0x4848 //RX_FDEQ_GAIN_0 +197 0x4848 //RX_FDEQ_GAIN_1 +198 0x4848 //RX_FDEQ_GAIN_2 +199 0x4848 //RX_FDEQ_GAIN_3 +200 0x4848 //RX_FDEQ_GAIN_4 +201 0x4848 //RX_FDEQ_GAIN_5 +202 0x4848 //RX_FDEQ_GAIN_6 +203 0x4848 //RX_FDEQ_GAIN_7 +204 0x4848 //RX_FDEQ_GAIN_8 +205 0x4848 //RX_FDEQ_GAIN_9 +206 0x4848 //RX_FDEQ_GAIN_10 +207 0x4848 //RX_FDEQ_GAIN_11 +208 0x4848 //RX_FDEQ_GAIN_12 +209 0x4848 //RX_FDEQ_GAIN_13 +210 0x4848 //RX_FDEQ_GAIN_14 +211 0x4848 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0000 //RX_FDEQ_BIN_0 +221 0x0000 //RX_FDEQ_BIN_1 +222 0x0000 //RX_FDEQ_BIN_2 +223 0x0000 //RX_FDEQ_BIN_3 +224 0x0000 //RX_FDEQ_BIN_4 +225 0x0000 //RX_FDEQ_BIN_5 +226 0x0000 //RX_FDEQ_BIN_6 +227 0x0000 //RX_FDEQ_BIN_7 +228 0x0000 //RX_FDEQ_BIN_8 +229 0x0000 //RX_FDEQ_BIN_9 +230 0x0000 //RX_FDEQ_BIN_10 +231 0x0000 //RX_FDEQ_BIN_11 +232 0x0000 //RX_FDEQ_BIN_12 +233 0x0000 //RX_FDEQ_BIN_13 +234 0x0000 //RX_FDEQ_BIN_14 +235 0x0000 //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x0000 //RX_FDEQ_RESRV_0 +245 0x0000 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0030 //RX_FDDRC_BAND_MARGIN_1 +248 0x0050 //RX_FDDRC_BAND_MARGIN_2 +249 0x0080 //RX_FDDRC_BAND_MARGIN_3 +250 0x0004 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x5000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x6400 //RX_FDDRC_THRD_3_2 +258 0x6400 //RX_FDDRC_THRD_3_3 +259 0x2000 //RX_FDDRC_SLANT_0_0 +260 0x2000 //RX_FDDRC_SLANT_0_1 +261 0x2000 //RX_FDDRC_SLANT_0_2 +262 0x2000 //RX_FDDRC_SLANT_0_3 +263 0x2000 //RX_FDDRC_SLANT_1_0 +264 0x2000 //RX_FDDRC_SLANT_1_1 +265 0x2000 //RX_FDDRC_SLANT_1_2 +266 0x2000 //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +286 0x0100 //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 #CASE_NAME HEADSET-TTY_VCO-VOICE_GENERIC-WB -#PARAM_MODE FULL -#PARAM_TYPE TX+RX -#TOTAL_CUSTOM_STEP 7 +#PARAM_MODE Full +#PARAM_TYPE TX+2RX +#TOTAL_CUSTOM_STEP 7+7 #TX 0 0x0001 //TX_OPERATION_MODE_0 1 0x0001 //TX_OPERATION_MODE_1 2 0x0033 //TX_PATCH_REG -3 0x2F7C //TX_SENDFUNC_MODE_0 +3 0x6F7C //TX_SENDFUNC_MODE_0 4 0x0001 //TX_SENDFUNC_MODE_1 -5 0x0003 //TX_NUM_MIC +5 0x0002 //TX_NUM_MIC 6 0x0001 //TX_SAMPLINGFREQ_SIG 7 0x0001 //TX_SAMPLINGFREQ_PROC 8 0x000A //TX_FRAME_SZ_SIG @@ -43879,8 +66779,8 @@ 18 0x0000 //TX_SYS_RESRV_2 19 0x0000 //TX_SYS_RESRV_3 20 0x0000 //TX_DIST2REF0 -21 0x00A4 //TX_DIST2REF1 -22 0x0017 //TX_DIST2REF_02 +21 0x009D //TX_DIST2REF1 +22 0x0010 //TX_DIST2REF_02 23 0x0000 //TX_DIST2REF_03 24 0x0000 //TX_DIST2REF_04 25 0x0000 //TX_DIST2REF_05 @@ -43971,8 +66871,8 @@ 110 0x0000 //TX_ADCS_MASK 111 0x04D0 //TX_ADCS_GAIN 112 0x4000 //TX_NFC_GAINFAC -113 0x0000 //TX_MAINMIC_BLKFACTOR -114 0x0000 //TX_REFMIC_BLKFACTOR +113 0x0004 //TX_MAINMIC_BLKFACTOR +114 0x0004 //TX_REFMIC_BLKFACTOR 115 0x0000 //TX_BLMIC_BLKFACTOR 116 0x0000 //TX_BRMIC_BLKFACTOR 117 0x0031 //TX_MICBLK_START_BIN @@ -44010,7 +66910,7 @@ 149 0x0800 //TX_AEC_REF_GAIN_2 150 0x6800 //TX_EAD_THR 151 0x1000 //TX_THR_RE_EST -152 0x0200 //TX_MIN_EQ_RE_EST_0 +152 0x3000 //TX_MIN_EQ_RE_EST_0 153 0x0100 //TX_MIN_EQ_RE_EST_1 154 0x0200 //TX_MIN_EQ_RE_EST_2 155 0x0200 //TX_MIN_EQ_RE_EST_3 @@ -44023,13 +66923,13 @@ 162 0x1000 //TX_MIN_EQ_RE_EST_10 163 0x1000 //TX_MIN_EQ_RE_EST_11 164 0x1000 //TX_MIN_EQ_RE_EST_12 -165 0x4000 //TX_LAMBDA_RE_EST +165 0x1B00 //TX_LAMBDA_RE_EST 166 0x4000 //TX_LAMBDA_CB_NLE 167 0x7FFF //TX_C_POST_FLT 168 0x5000 //TX_GAIN_NP 169 0x0180 //TX_SE_HOLD_N 170 0x00C8 //TX_DT_HOLD_N -171 0x05DC //TX_DT2_HOLD_N +171 0x0020 //TX_DT2_HOLD_N 172 0x6666 //TX_AEC_RESRV_0 173 0x0000 //TX_AEC_RESRV_1 174 0x0014 //TX_AEC_RESRV_2 @@ -44055,15 +66955,15 @@ 194 0x0000 //TX_NORMENERTH 195 0x0000 //TX_NORMENERHIGHTH 196 0x0000 //TX_NORMENERHIGHTHL -197 0x6590 //TX_DTD_THR1_0 -198 0x6590 //TX_DTD_THR1_1 -199 0x6590 //TX_DTD_THR1_2 +197 0x76D0 //TX_DTD_THR1_0 +198 0x76D0 //TX_DTD_THR1_1 +199 0x76D0 //TX_DTD_THR1_2 200 0x7FF0 //TX_DTD_THR1_3 201 0x7FF0 //TX_DTD_THR1_4 202 0x7FF0 //TX_DTD_THR1_5 203 0x7FF0 //TX_DTD_THR1_6 -204 0x5000 //TX_DTD_THR2_0 -205 0x5000 //TX_DTD_THR2_1 +204 0x7E00 //TX_DTD_THR2_0 +205 0x7E00 //TX_DTD_THR2_1 206 0x5000 //TX_DTD_THR2_2 207 0x5000 //TX_DTD_THR2_3 208 0x5000 //TX_DTD_THR2_4 @@ -44071,8 +66971,8 @@ 210 0x5000 //TX_DTD_THR2_6 211 0x7FFF //TX_DTD_THR3 212 0x0000 //TX_SPK_CUT_K -213 0x07D0 //TX_DT_CUT_K -214 0x0100 //TX_DT_CUT_THR +213 0x03E8 //TX_DT_CUT_K +214 0x0010 //TX_DT_CUT_THR 215 0x04EB //TX_COMFORT_G 216 0x01F4 //TX_POWER_YOUT_TH 217 0x4000 //TX_FDPFGAINECHO @@ -44083,16 +66983,16 @@ 222 0x023E //TX_ADPT_STRICT_H 223 0x0BB8 //TX_RATIO_DT_L_TH_LOW 224 0x3A98 //TX_RATIO_DT_H_TH_LOW -225 0x1770 //TX_RATIO_DT_L_TH_HIGH -226 0x4E20 //TX_RATIO_DT_H_TH_HIGH -227 0x09C4 //TX_RATIO_DT_L0_TH -228 0x2000 //TX_B_POST_FILT_ECHO_L +225 0x044C //TX_RATIO_DT_L_TH_HIGH +226 0x7800 //TX_RATIO_DT_H_TH_HIGH +227 0x0001 //TX_RATIO_DT_L0_TH +228 0x7FFF //TX_B_POST_FILT_ECHO_L 229 0x7FFF //TX_B_POST_FILT_ECHO_H 230 0x0200 //TX_MIN_G_CTRL_ECHO 231 0x1000 //TX_B_LESSCUT_RTO_ECHO 232 0x0000 //TX_EPD_OFFSET_00 233 0x0000 //TX_EPD_OFFST_01 -234 0x1388 //TX_RATIO_DT_L0_TH_HIGH +234 0x03E8 //TX_RATIO_DT_L0_TH_HIGH 235 0x7FFF //TX_RATIO_DT_H_TH_CUT 236 0x7FFF //TX_MIN_EQ_RE_EST_13 237 0x0000 //TX_DTD_THR1_7 @@ -44100,7 +67000,7 @@ 239 0x0800 //TX_DT_RESRV_7 240 0x0800 //TX_DT_RESRV_8 241 0x0000 //TX_DT_RESRV_9 -242 0xF800 //TX_THR_SN_EST_0 +242 0xFA00 //TX_THR_SN_EST_0 243 0xFA00 //TX_THR_SN_EST_1 244 0xFA00 //TX_THR_SN_EST_2 245 0xFB00 //TX_THR_SN_EST_3 @@ -44109,11 +67009,11 @@ 248 0xF800 //TX_THR_SN_EST_6 249 0xF800 //TX_THR_SN_EST_7 250 0x0100 //TX_DELTA_THR_SN_EST_0 -251 0x0200 //TX_DELTA_THR_SN_EST_1 -252 0x0100 //TX_DELTA_THR_SN_EST_2 -253 0x0200 //TX_DELTA_THR_SN_EST_3 +251 0x0100 //TX_DELTA_THR_SN_EST_1 +252 0x0200 //TX_DELTA_THR_SN_EST_2 +253 0x0100 //TX_DELTA_THR_SN_EST_3 254 0x0100 //TX_DELTA_THR_SN_EST_4 -255 0x0100 //TX_DELTA_THR_SN_EST_5 +255 0x0200 //TX_DELTA_THR_SN_EST_5 256 0x0200 //TX_DELTA_THR_SN_EST_6 257 0x0200 //TX_DELTA_THR_SN_EST_7 258 0x4000 //TX_LAMBDA_NN_EST_0 @@ -44141,11 +67041,11 @@ 280 0x1000 //TX_B_POST_FLT_1 281 0x0010 //TX_NS_LVL_CTRL_0 282 0x0014 //TX_NS_LVL_CTRL_1 -283 0x0014 //TX_NS_LVL_CTRL_2 -284 0x0018 //TX_NS_LVL_CTRL_3 -285 0x0016 //TX_NS_LVL_CTRL_4 -286 0x0014 //TX_NS_LVL_CTRL_5 -287 0x0011 //TX_NS_LVL_CTRL_6 +283 0x0018 //TX_NS_LVL_CTRL_2 +284 0x0016 //TX_NS_LVL_CTRL_3 +285 0x0014 //TX_NS_LVL_CTRL_4 +286 0x0011 //TX_NS_LVL_CTRL_5 +287 0x0014 //TX_NS_LVL_CTRL_6 288 0x0011 //TX_NS_LVL_CTRL_7 289 0x000F //TX_MIN_GAIN_S_0 290 0x0010 //TX_MIN_GAIN_S_1 @@ -44163,8 +67063,8 @@ 302 0x4000 //TX_SNRI_SUP_2 303 0x4000 //TX_SNRI_SUP_3 304 0x4000 //TX_SNRI_SUP_4 -305 0x4000 //TX_SNRI_SUP_5 -306 0x50C0 //TX_SNRI_SUP_6 +305 0x50C0 //TX_SNRI_SUP_5 +306 0x4000 //TX_SNRI_SUP_6 307 0x7FFF //TX_SNRI_SUP_7 308 0x7FFF //TX_THR_LFNS 309 0x0018 //TX_G_LFNS @@ -44173,19 +67073,19 @@ 312 0x7FFF //TX_A_POST_FILT_0 313 0x2000 //TX_A_POST_FILT_1 314 0x5000 //TX_A_POST_FILT_S_0 -315 0x6000 //TX_A_POST_FILT_S_1 -316 0x4C00 //TX_A_POST_FILT_S_2 -317 0x4000 //TX_A_POST_FILT_S_3 -318 0x6000 //TX_A_POST_FILT_S_4 -319 0x4000 //TX_A_POST_FILT_S_5 -320 0x5000 //TX_A_POST_FILT_S_6 +315 0x4C00 //TX_A_POST_FILT_S_1 +316 0x4000 //TX_A_POST_FILT_S_2 +317 0x6000 //TX_A_POST_FILT_S_3 +318 0x4000 //TX_A_POST_FILT_S_4 +319 0x5000 //TX_A_POST_FILT_S_5 +320 0x6000 //TX_A_POST_FILT_S_6 321 0x7000 //TX_A_POST_FILT_S_7 322 0x2000 //TX_B_POST_FILT_0 -323 0x1000 //TX_B_POST_FILT_1 +323 0x2000 //TX_B_POST_FILT_1 324 0x2000 //TX_B_POST_FILT_2 -325 0x2000 //TX_B_POST_FILT_3 +325 0x4000 //TX_B_POST_FILT_3 326 0x4000 //TX_B_POST_FILT_4 -327 0x4000 //TX_B_POST_FILT_5 +327 0x1000 //TX_B_POST_FILT_5 328 0x1000 //TX_B_POST_FILT_6 329 0x2000 //TX_B_POST_FILT_7 330 0x4000 //TX_B_LESSCUT_RTO_S_0 @@ -44193,14 +67093,14 @@ 332 0x7FFF //TX_B_LESSCUT_RTO_S_2 333 0x7FFF //TX_B_LESSCUT_RTO_S_3 334 0x7FFF //TX_B_LESSCUT_RTO_S_4 -335 0x7FFF //TX_B_LESSCUT_RTO_S_5 -336 0x6000 //TX_B_LESSCUT_RTO_S_6 +335 0x6000 //TX_B_LESSCUT_RTO_S_5 +336 0x7FFF //TX_B_LESSCUT_RTO_S_6 337 0x7FFF //TX_B_LESSCUT_RTO_S_7 338 0x7C00 //TX_LAMBDA_PFILT 339 0x7C00 //TX_LAMBDA_PFILT_S_0 340 0x7C00 //TX_LAMBDA_PFILT_S_1 -341 0x7C00 //TX_LAMBDA_PFILT_S_2 -342 0x7A00 //TX_LAMBDA_PFILT_S_3 +341 0x7A00 //TX_LAMBDA_PFILT_S_2 +342 0x7C00 //TX_LAMBDA_PFILT_S_3 343 0x7C00 //TX_LAMBDA_PFILT_S_4 344 0x7C00 //TX_LAMBDA_PFILT_S_5 345 0x7C00 //TX_LAMBDA_PFILT_S_6 @@ -44211,10 +67111,10 @@ 350 0x0600 //TX_A_PEPPER_HF 351 0x0001 //TX_HMNC_BST_FLG 352 0x0200 //TX_HMNC_BST_THR -353 0x0200 //TX_DT_BINVAD_TH_0 -354 0x0200 //TX_DT_BINVAD_TH_1 -355 0x0200 //TX_DT_BINVAD_TH_2 -356 0x0200 //TX_DT_BINVAD_TH_3 +353 0x0800 //TX_DT_BINVAD_TH_0 +354 0x0800 //TX_DT_BINVAD_TH_1 +355 0x0800 //TX_DT_BINVAD_TH_2 +356 0x0800 //TX_DT_BINVAD_TH_3 357 0x1D4C //TX_DT_BINVAD_ENDF 358 0x0800 //TX_C_POST_FLT_DT 359 0x0CCD //TX_NS_B_POST_FLT_LESSCUT @@ -44225,7 +67125,7 @@ 364 0x0000 //TX_K_APT 365 0x0001 //TX_NOISEDET 366 0x0064 //TX_NDETCT -367 0x0032 //TX_NOISE_TH_0 +367 0x0102 //TX_NOISE_TH_0 368 0x7FFF //TX_NOISE_TH_0_2 369 0x7FFF //TX_NOISE_TH_0_3 370 0x017E //TX_NOISE_TH_1 @@ -44237,11 +67137,11 @@ 376 0x0001 //TX_NOISE_TH_5_3 377 0x7FFF //TX_NOISE_TH_5_4 378 0x0F0A //TX_NOISE_TH_6 -379 0x0033 //TX_MINENOISE_TH -380 0x4000 //TX_MINENOISE_MIC0_TH_MTS -381 0xFFEE //TX_MINENOISE_MIC0_TH_EXP -382 0x6000 //TX_MINENOISE_MIC0_S_TH_MTS -383 0xFFF3 //TX_MINENOISE_MIC0_S_TH_EXP +379 0x00F8 //TX_MINENOISE_TH +380 0xD508 //TX_MORENS_TFMASK_TH +381 0x0001 //TX_DRC_QUIET_FLOOR +382 0x3A98 //TX_RATIODTL_CUT_TH +383 0x0DAC //TX_DT_CUT_K1 384 0x0666 //TX_OUT_ENER_S_TH_CLEAN 385 0x0666 //TX_OUT_ENER_S_TH_LESSCLEAN 386 0x0333 //TX_OUT_ENER_S_TH_NOISY @@ -44249,22 +67149,22 @@ 388 0x0333 //TX_OUT_ENER_TH_SPEECH 389 0x2000 //TX_SN_NPB_GAIN 390 0x0000 //TX_NN_NPB_GAIN -391 0x0000 //TX_CSX_ALPHA_0 -392 0x0000 //TX_CSX_ALPHA_1 -393 0x0000 //TX_CSX_ALPHA_2 -394 0x0000 //TX_CSX_ALPHA_3 -395 0x0800 //TX_MU_ARSP_EST -396 0x00C8 //TX_P_OUTBEAM_MIN_TH +391 0x7FFF //TX_POST_MASK_SUP_HSNE +392 0x1388 //TX_TAIL_DET_TH +393 0x4000 //TX_B_LESSCUT_RTO_WTA +394 0x0000 //TX_MEL_G_R +395 0x0080 //TX_SUPHIGH_TH +396 0x0000 //TX_MASK_G_R 397 0x0002 //TX_EXTRA_NS_L -398 0x0800 //TX_EXTRA_NS_A -399 0x0005 //TX_VR_NOISE_FLOOR_TH +398 0x1800 //TX_C_POST_FLT_MASK +399 0x7FFF //TX_A_POST_FLT_WNS 400 0x0148 //TX_MIN_G_LOW300HZ -401 0x0001 //TX_MAXLEVEL_CNG +401 0x0004 //TX_MAXLEVEL_CNG 402 0x00B4 //TX_STN_NOISE_TH 403 0x4000 //TX_POST_MASK_SUP 404 0x7FFF //TX_POST_MASK_ADJUST 405 0x00C8 //TX_NS_ENOISE_MIC0_TH -406 0x0033 //TX_MINENOISE_MIC0_TH +406 0x00DC //TX_MINENOISE_MIC0_TH 407 0x012C //TX_MINENOISE_MIC0_S_TH 408 0x7FFF //TX_MIN_G_CTRL_SSNS 409 0x0000 //TX_METAL_RTO_THR @@ -44372,16 +67272,16 @@ 511 0x6666 //TX_MIC_TO_BFGAIN 512 0x0000 //TX_MICTOBFGAIN0 513 0x0000 //TX_FASTMUE_TH -514 0x0000 //TX_DERVB_LEN_0 -515 0x0000 //TX_DERVB_LEN_1 -516 0x0000 //TX_RHO_DERVB -517 0x0000 //TX_MIC_INDX_DERVB -518 0x0000 //TX_MU_DERVB -519 0x0000 //TX_DR_RESRV_0 -520 0x0000 //TX_DR_RESRV_1 -521 0x0000 //TX_DR_RESRV_2 -522 0x0000 //TX_DR_RESRV_3 -523 0x0000 //TX_DR_RESRV_4 +514 0xC000 //TX_DEREVERB_LF_MU +515 0xC000 //TX_DEREVERB_HF_MU +516 0xCCCC //TX_DEREVERB_DELAY +517 0xD999 //TX_DEREVERB_COEF_LEN +518 0x1F40 //TX_DEREVERB_DNR +519 0x0000 //TX_DEREVERB_ALPHA +520 0x0000 //TX_DEREVERB_BETA +521 0x0000 //TX_GSC_RTOL_TH +522 0x7000 //TX_GSC_RTOH_TH +523 0x0064 //TX_WIDE2_MEANHTH 524 0x0000 //TX_DR_RESRV_5 525 0x0000 //TX_DR_RESRV_6 526 0x0000 //TX_DR_RESRV_7 @@ -44424,19 +67324,19 @@ 563 0x0000 //TX_SAM_MARK 564 0x0000 //TX_PB_RESRV_0 565 0x0000 //TX_PB_RESRV_1 -566 0x001C //TX_FDEQ_SUBNUM -567 0x5050 //TX_FDEQ_GAIN_0 -568 0x5048 //TX_FDEQ_GAIN_1 +566 0x0020 //TX_FDEQ_SUBNUM +567 0x5454 //TX_FDEQ_GAIN_0 +568 0x5448 //TX_FDEQ_GAIN_1 569 0x4848 //TX_FDEQ_GAIN_2 570 0x4848 //TX_FDEQ_GAIN_3 571 0x4848 //TX_FDEQ_GAIN_4 572 0x4850 //TX_FDEQ_GAIN_5 573 0x5050 //TX_FDEQ_GAIN_6 -574 0x5048 //TX_FDEQ_GAIN_7 -575 0x4848 //TX_FDEQ_GAIN_8 -576 0x4844 //TX_FDEQ_GAIN_9 -577 0x3C36 //TX_FDEQ_GAIN_10 -578 0x3A3A //TX_FDEQ_GAIN_11 +574 0x5448 //TX_FDEQ_GAIN_7 +575 0x464C //TX_FDEQ_GAIN_8 +576 0x5050 //TX_FDEQ_GAIN_9 +577 0x4848 //TX_FDEQ_GAIN_10 +578 0x4848 //TX_FDEQ_GAIN_11 579 0x4848 //TX_FDEQ_GAIN_12 580 0x4848 //TX_FDEQ_GAIN_13 581 0x4848 //TX_FDEQ_GAIN_14 @@ -44459,10 +67359,10 @@ 598 0x090A //TX_FDEQ_BIN_7 599 0x0B0C //TX_FDEQ_BIN_8 600 0x0D0E //TX_FDEQ_BIN_9 -601 0x0E0F //TX_FDEQ_BIN_10 -602 0x0F10 //TX_FDEQ_BIN_11 -603 0x1011 //TX_FDEQ_BIN_12 -604 0x1104 //TX_FDEQ_BIN_13 +601 0x0F10 //TX_FDEQ_BIN_10 +602 0x1011 //TX_FDEQ_BIN_11 +603 0x1112 //TX_FDEQ_BIN_12 +604 0x120B //TX_FDEQ_BIN_13 605 0x0000 //TX_FDEQ_BIN_14 606 0x0000 //TX_FDEQ_BIN_15 607 0x0000 //TX_FDEQ_BIN_16 @@ -44482,13 +67382,13 @@ 621 0x4848 //TX_PREEQ_GAIN_MIC0_4 622 0x4848 //TX_PREEQ_GAIN_MIC0_5 623 0x4848 //TX_PREEQ_GAIN_MIC0_6 -624 0x484A //TX_PREEQ_GAIN_MIC0_7 -625 0x4C4E //TX_PREEQ_GAIN_MIC0_8 -626 0x5054 //TX_PREEQ_GAIN_MIC0_9 -627 0x5658 //TX_PREEQ_GAIN_MIC0_10 -628 0x5C5C //TX_PREEQ_GAIN_MIC0_11 -629 0x5E64 //TX_PREEQ_GAIN_MIC0_12 -630 0x6464 //TX_PREEQ_GAIN_MIC0_13 +624 0x4848 //TX_PREEQ_GAIN_MIC0_7 +625 0x484A //TX_PREEQ_GAIN_MIC0_8 +626 0x4B4C //TX_PREEQ_GAIN_MIC0_9 +627 0x4B4A //TX_PREEQ_GAIN_MIC0_10 +628 0x4A48 //TX_PREEQ_GAIN_MIC0_11 +629 0x4C4C //TX_PREEQ_GAIN_MIC0_12 +630 0x4C4C //TX_PREEQ_GAIN_MIC0_13 631 0x4848 //TX_PREEQ_GAIN_MIC0_14 632 0x4848 //TX_PREEQ_GAIN_MIC0_15 633 0x4848 //TX_PREEQ_GAIN_MIC0_16 @@ -44511,8 +67411,8 @@ 650 0x0D0E //TX_PREEQ_BIN_MIC0_9 651 0x0F10 //TX_PREEQ_BIN_MIC0_10 652 0x1011 //TX_PREEQ_BIN_MIC0_11 -653 0x1104 //TX_PREEQ_BIN_MIC0_12 -654 0x1010 //TX_PREEQ_BIN_MIC0_13 +653 0x1112 //TX_PREEQ_BIN_MIC0_12 +654 0x120B //TX_PREEQ_BIN_MIC0_13 655 0x0000 //TX_PREEQ_BIN_MIC0_14 656 0x0000 //TX_PREEQ_BIN_MIC0_15 657 0x0000 //TX_PREEQ_BIN_MIC0_16 @@ -44531,12 +67431,12 @@ 670 0x4848 //TX_PREEQ_GAIN_MIC1_4 671 0x4848 //TX_PREEQ_GAIN_MIC1_5 672 0x4848 //TX_PREEQ_GAIN_MIC1_6 -673 0x4848 //TX_PREEQ_GAIN_MIC1_7 -674 0x4848 //TX_PREEQ_GAIN_MIC1_8 -675 0x4848 //TX_PREEQ_GAIN_MIC1_9 -676 0x4848 //TX_PREEQ_GAIN_MIC1_10 -677 0x4848 //TX_PREEQ_GAIN_MIC1_11 -678 0x4848 //TX_PREEQ_GAIN_MIC1_12 +673 0x4846 //TX_PREEQ_GAIN_MIC1_7 +674 0x4544 //TX_PREEQ_GAIN_MIC1_8 +675 0x4241 //TX_PREEQ_GAIN_MIC1_9 +676 0x403E //TX_PREEQ_GAIN_MIC1_10 +677 0x3D3C //TX_PREEQ_GAIN_MIC1_11 +678 0x3C3C //TX_PREEQ_GAIN_MIC1_12 679 0x4848 //TX_PREEQ_GAIN_MIC1_13 680 0x4848 //TX_PREEQ_GAIN_MIC1_14 681 0x4848 //TX_PREEQ_GAIN_MIC1_15 @@ -44548,19 +67448,19 @@ 687 0x4848 //TX_PREEQ_GAIN_MIC1_21 688 0x4848 //TX_PREEQ_GAIN_MIC1_22 689 0x4848 //TX_PREEQ_GAIN_MIC1_23 -690 0x251A //TX_PREEQ_BIN_MIC1_0 -691 0x0F0F //TX_PREEQ_BIN_MIC1_1 -692 0x0C0C //TX_PREEQ_BIN_MIC1_2 -693 0x0C0F //TX_PREEQ_BIN_MIC1_3 -694 0x0F0F //TX_PREEQ_BIN_MIC1_4 -695 0x0F09 //TX_PREEQ_BIN_MIC1_5 -696 0x0909 //TX_PREEQ_BIN_MIC1_6 -697 0x0908 //TX_PREEQ_BIN_MIC1_7 -698 0x0700 //TX_PREEQ_BIN_MIC1_8 -699 0x0000 //TX_PREEQ_BIN_MIC1_9 -700 0x0000 //TX_PREEQ_BIN_MIC1_10 -701 0x0000 //TX_PREEQ_BIN_MIC1_11 -702 0x0000 //TX_PREEQ_BIN_MIC1_12 +690 0x0202 //TX_PREEQ_BIN_MIC1_0 +691 0x0203 //TX_PREEQ_BIN_MIC1_1 +692 0x0303 //TX_PREEQ_BIN_MIC1_2 +693 0x0304 //TX_PREEQ_BIN_MIC1_3 +694 0x0405 //TX_PREEQ_BIN_MIC1_4 +695 0x0506 //TX_PREEQ_BIN_MIC1_5 +696 0x0708 //TX_PREEQ_BIN_MIC1_6 +697 0x090A //TX_PREEQ_BIN_MIC1_7 +698 0x0B0C //TX_PREEQ_BIN_MIC1_8 +699 0x0F10 //TX_PREEQ_BIN_MIC1_9 +700 0x1011 //TX_PREEQ_BIN_MIC1_10 +701 0x1112 //TX_PREEQ_BIN_MIC1_11 +702 0x1208 //TX_PREEQ_BIN_MIC1_12 703 0x0000 //TX_PREEQ_BIN_MIC1_13 704 0x0000 //TX_PREEQ_BIN_MIC1_14 705 0x0000 //TX_PREEQ_BIN_MIC1_15 @@ -44649,7 +67549,7 @@ 788 0x7EB8 //TX_TDDRC_ALPHA_DWN_02 789 0x7EB8 //TX_TDDRC_ALPHA_DWN_03 790 0x7EB8 //TX_TDDRC_ALPHA_DWN_04 -791 0x7FFF //TX_TDDRC_TD_DRC_LIMIT +791 0x7214 //TX_TDDRC_TD_DRC_LIMIT 792 0x0800 //TX_TDDRC_POST_LIMIT_GAIN 793 0x0000 //TX_TDDRC_RESRV_0 794 0x0000 //TX_TDDRC_RESRV_1 @@ -44716,15 +67616,15 @@ 855 0x0002 //TX_TDDRC_THRD_1 856 0x1800 //TX_TDDRC_THRD_2 857 0x1800 //TX_TDDRC_THRD_3 -858 0x6000 //TX_TDDRC_SLANT_0 -859 0x6000 //TX_TDDRC_SLANT_1 +858 0x7FFF //TX_TDDRC_SLANT_0 +859 0x7FFF //TX_TDDRC_SLANT_1 860 0x0800 //TX_TDDRC_ALPHA_UP_00 861 0x7EB8 //TX_TDDRC_ALPHA_DWN_00 862 0x0000 //TX_TDDRC_HMNC_FLAG 863 0x199A //TX_TDDRC_HMNC_GAIN 864 0x0000 //TX_TDDRC_SMT_FLAG 865 0x0CCD //TX_TDDRC_SMT_W -866 0x0BE3 //TX_TDDRC_DRC_GAIN +866 0x0C97 //TX_TDDRC_DRC_GAIN 867 0x7FFF //TX_TDDRC_LMT_THRD 868 0x0000 //TX_TDDRC_LMT_ALPHA 869 0x0000 //TX_TFMASKLTH @@ -44749,14 +67649,79 @@ 888 0x0028 //TX_FASTNS_ARSPC_TH 889 0xC000 //TX_FASTNS_MASK5_TH 890 0x4848 //TX_POSTSSA_MIN_G_VR_MASK -891 0x1000 //TX_A_LESSCUT_RTO_MASK +891 0x4000 //TX_A_LESSCUT_RTO_MASK 892 0x1770 //TX_FASTNS_NOISETH 893 0xC000 //TX_FASTNS_SSA_THLFL 894 0xC000 //TX_FASTNS_SSA_THHFL 895 0xCCCC //TX_FASTNS_SSA_THLFH 896 0xD999 //TX_FASTNS_SSA_THHFH +897 0x2339 //TX_SENDFUNC_REG_MICMUTE +898 0x0021 //TX_SENDFUNC_REG_MICMUTE1 +899 0x02BC //TX_MICMUTE_RATIO_THR +900 0x0140 //TX_MICMUTE_AMP_THR +901 0x0004 //TX_MICMUTE_HPF_IND +902 0x00C0 //TX_MICMUTE_LOG_EYR_TH +903 0x0008 //TX_MICMUTE_CVG_TIME +904 0x0008 //TX_MICMUTE_RELEASE_TIME +905 0x01FE //TX_MIC_VOLUME_MIC0MUTE +906 0x0020 //TX_MICMUTE_EPD_OFFSET_0 +907 0x001E //TX_MICMUTE_FRQ_AEC_L +908 0x7999 //TX_MICMUTE_EAD_THR +909 0x7FFF //TX_MICMUTE_LAMBDA_CB_NLE +910 0x7FFF //TX_MICMUTE_LAMBDA_RE_EST +911 0x4000 //TX_DTD_THR1_MICMUTE_0 +912 0x7000 //TX_DTD_THR1_MICMUTE_1 +913 0x7FFF //TX_DTD_THR1_MICMUTE_2 +914 0x7FFF //TX_DTD_THR1_MICMUTE_3 +915 0x6CCC //TX_DTD_THR2_MICMUTE_0 +916 0x0400 //TX_MICMUTE_MIN_EQ_RE_EST_0 +917 0x0400 //TX_MICMUTE_MIN_EQ_RE_EST_1 +918 0x1000 //TX_MICMUTE_MIN_EQ_RE_EST_2 +919 0x7FFF //TX_MICMUTE_MIN_EQ_RE_EST_3 +920 0x7FFF //TX_MICMUTE_MIN_EQ_RE_EST_4 +921 0x4000 //TX_MICMUTE_C_POST_FLT +922 0x03E8 //TX_MICMUTE_DT_CUT_K +923 0x0001 //TX_MICMUTE_DT_CUT_THR +924 0x03E8 //TX_MICMUTE_DT_CUT_K2 +925 0x0001 //TX_MICMUTE_DT_CUT_THR2 +926 0x0064 //TX_MICMUTE_DT2_HOLD_N +927 0x1000 //TX_MICMUTE_RATIODTH_THCUT +928 0x1000 //TX_MICMUTE_B_POST_FLT_ECHOL +929 0x7FFF //TX_MICMUTE_B_POST_FLT_ECHOH +930 0x0400 //TX_MICMUTE_C_POST_FLT_MASK +931 0x7999 //TX_MICMUTE_RATIODTL_CUT_TH +932 0x0258 //TX_MICMUTE_DT_CUT_K1 +933 0x0800 //TX_MICMUTE_N2_SN_EST +934 0xFC00 //TX_MICMUTE_THR_SN_EST_0 +935 0x001C //TX_MICMUTE_MIN_G_CTRL_0 +936 0x6000 //TX_MICMUTE_A_POST_FILT_S_0 +937 0x7000 //TX_MICMUTE_B_POST_FILT_0 +938 0x2710 //TX_MIC1RUB_AMP_THR +939 0x0010 //TX_MIC1MUTE_RATIO_THR +940 0x0450 //TX_MIC1MUTE_AMP_THR +941 0x0008 //TX_MIC1MUTE_CVG_TIME +942 0x0008 //TX_MIC1MUTE_RELEASE_TIME +943 0x0000 //TX_AMS_RESRV_01 +944 0x0000 //TX_AMS_RESRV_02 +945 0x0000 //TX_AMS_RESRV_03 +946 0x0000 //TX_AMS_RESRV_04 +947 0x0000 //TX_AMS_RESRV_05 +948 0x0000 //TX_AMS_RESRV_06 +949 0x0000 //TX_AMS_RESRV_07 +950 0x0000 //TX_AMS_RESRV_08 +951 0x0000 //TX_AMS_RESRV_09 +952 0x0000 //TX_AMS_RESRV_10 +953 0x0000 //TX_AMS_RESRV_11 +954 0x0000 //TX_AMS_RESRV_12 +955 0x0000 //TX_AMS_RESRV_13 +956 0x0000 //TX_AMS_RESRV_14 +957 0x0000 //TX_AMS_RESRV_15 +958 0x0000 //TX_AMS_RESRV_16 +959 0x0000 //TX_AMS_RESRV_17 +960 0x0000 //TX_AMS_RESRV_18 +961 0x0000 //TX_AMS_RESRV_19 #RX -0 0x0040 //RX_RECVFUNC_MODE_0 +0 0x2040 //RX_RECVFUNC_MODE_0 1 0x0000 //RX_RECVFUNC_MODE_1 2 0x0000 //RX_SAMPLINGFREQ_SIG 3 0x0000 //RX_SAMPLINGFREQ_PROC @@ -45606,18 +68571,869 @@ 110 0x0000 //RX_FDDRC_RESRV_0 129 0x0100 //RX_SPK_VOL 130 0x0000 //RX_VOL_RESRV_0 +#RX 2 +157 0x2040 //RX_RECVFUNC_MODE_0 +158 0x0000 //RX_RECVFUNC_MODE_1 +159 0x0000 //RX_SAMPLINGFREQ_SIG +160 0x0000 //RX_SAMPLINGFREQ_PROC +161 0x000A //RX_FRAME_SZ +162 0x0000 //RX_DELAY_OPT +163 0x3000 //RX_TDDRC_ALPHA_UP_1 +164 0x3000 //RX_TDDRC_ALPHA_UP_2 +165 0x3000 //RX_TDDRC_ALPHA_UP_3 +166 0x3000 //RX_TDDRC_ALPHA_UP_4 +167 0x050D //RX_PGA +168 0x7652 //RX_A_HP +169 0x4000 //RX_B_PE +170 0x7800 //RX_THR_PITCH_DET_0 +171 0x7000 //RX_THR_PITCH_DET_1 +172 0x6000 //RX_THR_PITCH_DET_2 +173 0x0000 //RX_PITCH_BFR_LEN +174 0x0000 //RX_SBD_PITCH_DET +175 0x0000 //RX_PP_RESRV_0 +176 0x0000 //RX_PP_RESRV_1 +177 0xF800 //RX_N_SN_EST +178 0x0000 //RX_N2_SN_EST +179 0x000F //RX_NS_LVL_CTRL +180 0xF800 //RX_THR_SN_EST +181 0x7E00 //RX_LAMBDA_PFILT +182 0x000A //RX_FENS_RESRV_0 +183 0x0000 //RX_FENS_RESRV_1 +184 0x7FB0 //RX_TDDRC_ALPHA_DWN_1 +185 0x7FB0 //RX_TDDRC_ALPHA_DWN_2 +186 0x7FB0 //RX_TDDRC_ALPHA_DWN_3 +187 0x0000 //RX_EXTRA_NS_L +188 0x0000 //RX_EXTRA_NS_A +189 0x7FB0 //RX_TDDRC_ALPHA_DWN_4 +190 0xDA9E //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +192 0x0000 //RX_A_POST_FLT +193 0x0000 //RX_LMT_THRD +194 0x4000 //RX_LMT_ALPHA +195 0x0020 //RX_FDEQ_SUBNUM +196 0x4848 //RX_FDEQ_GAIN_0 +197 0x4848 //RX_FDEQ_GAIN_1 +198 0x4848 //RX_FDEQ_GAIN_2 +199 0x4848 //RX_FDEQ_GAIN_3 +200 0x4848 //RX_FDEQ_GAIN_4 +201 0x4848 //RX_FDEQ_GAIN_5 +202 0x4848 //RX_FDEQ_GAIN_6 +203 0x4848 //RX_FDEQ_GAIN_7 +204 0x4848 //RX_FDEQ_GAIN_8 +205 0x4848 //RX_FDEQ_GAIN_9 +206 0x4848 //RX_FDEQ_GAIN_10 +207 0x4848 //RX_FDEQ_GAIN_11 +208 0x4848 //RX_FDEQ_GAIN_12 +209 0x4848 //RX_FDEQ_GAIN_13 +210 0x4848 //RX_FDEQ_GAIN_14 +211 0x4848 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0000 //RX_FDEQ_BIN_0 +221 0x0000 //RX_FDEQ_BIN_1 +222 0x0000 //RX_FDEQ_BIN_2 +223 0x0000 //RX_FDEQ_BIN_3 +224 0x0000 //RX_FDEQ_BIN_4 +225 0x0000 //RX_FDEQ_BIN_5 +226 0x0000 //RX_FDEQ_BIN_6 +227 0x0000 //RX_FDEQ_BIN_7 +228 0x0000 //RX_FDEQ_BIN_8 +229 0x0000 //RX_FDEQ_BIN_9 +230 0x0000 //RX_FDEQ_BIN_10 +231 0x0000 //RX_FDEQ_BIN_11 +232 0x0000 //RX_FDEQ_BIN_12 +233 0x0000 //RX_FDEQ_BIN_13 +234 0x0000 //RX_FDEQ_BIN_14 +235 0x0000 //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x0000 //RX_FDEQ_RESRV_0 +245 0x0000 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0030 //RX_FDDRC_BAND_MARGIN_1 +248 0x0050 //RX_FDDRC_BAND_MARGIN_2 +249 0x0080 //RX_FDDRC_BAND_MARGIN_3 +250 0x0004 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x5000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x6400 //RX_FDDRC_THRD_3_2 +258 0x6400 //RX_FDDRC_THRD_3_3 +259 0x2000 //RX_FDDRC_SLANT_0_0 +260 0x2000 //RX_FDDRC_SLANT_0_1 +261 0x2000 //RX_FDDRC_SLANT_0_2 +262 0x2000 //RX_FDDRC_SLANT_0_3 +263 0x2000 //RX_FDDRC_SLANT_1_0 +264 0x2000 //RX_FDDRC_SLANT_1_1 +265 0x2000 //RX_FDDRC_SLANT_1_2 +266 0x2000 //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +268 0x0003 //RX_FILTINDX +269 0x0000 //RX_TDDRC_THRD_0 +270 0x0000 //RX_TDDRC_THRD_1 +271 0x0E80 //RX_TDDRC_THRD_2 +272 0x3800 //RX_TDDRC_THRD_3 +273 0x2A00 //RX_TDDRC_SLANT_0 +274 0x6E00 //RX_TDDRC_SLANT_1 +275 0x3000 //RX_TDDRC_ALPHA_UP_0 +276 0x7FB0 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x0000 //RX_TDDRC_HMNC_GAIN +279 0x0000 //RX_TDDRC_SMT_FLAG +280 0x0000 //RX_TDDRC_SMT_W +281 0x0100 //RX_TDDRC_DRC_GAIN +282 0x7C00 //RX_LAMBDA_PKA_FP +283 0x2000 //RX_TPKA_FP +284 0x0080 //RX_MIN_G_FP +285 0x2000 //RX_MAX_G_FP +286 0x0100 //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 +288 0x0010 //RX_MAXLEVEL_CNG +289 0x0000 //RX_BWE_UV_TH +290 0x0000 //RX_BWE_UV_TH2 +291 0x0000 //RX_BWE_UV_TH3 +292 0x0000 //RX_BWE_V_TH +293 0x0000 //RX_BWE_GAIN1_V_TH1 +294 0x0000 //RX_BWE_GAIN1_V_TH2 +295 0x0000 //RX_BWE_UV_EQ +296 0x0000 //RX_BWE_V_EQ +297 0x0000 //RX_BWE_TONE_TH +298 0x0000 //RX_BWE_UV_HOLD_T +299 0x0000 //RX_BWE_GAIN2_ALPHA +300 0x0000 //RX_BWE_GAIN3_ALPHA +301 0x0000 //RX_BWE_CUTOFF +302 0x0000 //RX_BWE_GAINFILL +303 0x0000 //RX_BWE_MAXTH_TONE +304 0x0000 //RX_BWE_EQ_0 +305 0x0000 //RX_BWE_EQ_1 +306 0x0000 //RX_BWE_EQ_2 +307 0x0000 //RX_BWE_EQ_3 +308 0x0000 //RX_BWE_EQ_4 +309 0x0000 //RX_BWE_EQ_5 +310 0x0000 //RX_BWE_EQ_6 +311 0x0000 //RX_BWE_RESRV_0 +312 0x0000 //RX_BWE_RESRV_1 +313 0x0000 //RX_BWE_RESRV_2 +#VOL 0 +163 0x3000 //RX_TDDRC_ALPHA_UP_1 +164 0x3000 //RX_TDDRC_ALPHA_UP_2 +165 0x3000 //RX_TDDRC_ALPHA_UP_3 +166 0x3000 //RX_TDDRC_ALPHA_UP_4 +184 0x7FB0 //RX_TDDRC_ALPHA_DWN_1 +185 0x7FB0 //RX_TDDRC_ALPHA_DWN_2 +186 0x7FB0 //RX_TDDRC_ALPHA_DWN_3 +189 0x7FB0 //RX_TDDRC_ALPHA_DWN_4 +190 0xDA9E //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +269 0x0000 //RX_TDDRC_THRD_0 +270 0x0000 //RX_TDDRC_THRD_1 +271 0x0E80 //RX_TDDRC_THRD_2 +272 0x3800 //RX_TDDRC_THRD_3 +273 0x2A00 //RX_TDDRC_SLANT_0 +274 0x6E00 //RX_TDDRC_SLANT_1 +275 0x3000 //RX_TDDRC_ALPHA_UP_0 +276 0x7FB0 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x0000 //RX_TDDRC_HMNC_GAIN +279 0x0000 //RX_TDDRC_SMT_FLAG +280 0x0000 //RX_TDDRC_SMT_W +281 0x0100 //RX_TDDRC_DRC_GAIN +195 0x0020 //RX_FDEQ_SUBNUM +196 0x4848 //RX_FDEQ_GAIN_0 +197 0x4848 //RX_FDEQ_GAIN_1 +198 0x4848 //RX_FDEQ_GAIN_2 +199 0x4848 //RX_FDEQ_GAIN_3 +200 0x4848 //RX_FDEQ_GAIN_4 +201 0x4848 //RX_FDEQ_GAIN_5 +202 0x4848 //RX_FDEQ_GAIN_6 +203 0x4848 //RX_FDEQ_GAIN_7 +204 0x4848 //RX_FDEQ_GAIN_8 +205 0x4848 //RX_FDEQ_GAIN_9 +206 0x4848 //RX_FDEQ_GAIN_10 +207 0x4848 //RX_FDEQ_GAIN_11 +208 0x4848 //RX_FDEQ_GAIN_12 +209 0x4848 //RX_FDEQ_GAIN_13 +210 0x4848 //RX_FDEQ_GAIN_14 +211 0x4848 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0000 //RX_FDEQ_BIN_0 +221 0x0000 //RX_FDEQ_BIN_1 +222 0x0000 //RX_FDEQ_BIN_2 +223 0x0000 //RX_FDEQ_BIN_3 +224 0x0000 //RX_FDEQ_BIN_4 +225 0x0000 //RX_FDEQ_BIN_5 +226 0x0000 //RX_FDEQ_BIN_6 +227 0x0000 //RX_FDEQ_BIN_7 +228 0x0000 //RX_FDEQ_BIN_8 +229 0x0000 //RX_FDEQ_BIN_9 +230 0x0000 //RX_FDEQ_BIN_10 +231 0x0000 //RX_FDEQ_BIN_11 +232 0x0000 //RX_FDEQ_BIN_12 +233 0x0000 //RX_FDEQ_BIN_13 +234 0x0000 //RX_FDEQ_BIN_14 +235 0x0000 //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x0000 //RX_FDEQ_RESRV_0 +245 0x0000 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0030 //RX_FDDRC_BAND_MARGIN_1 +248 0x0050 //RX_FDDRC_BAND_MARGIN_2 +249 0x0080 //RX_FDDRC_BAND_MARGIN_3 +250 0x0004 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x5000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x6400 //RX_FDDRC_THRD_3_2 +258 0x6400 //RX_FDDRC_THRD_3_3 +259 0x2000 //RX_FDDRC_SLANT_0_0 +260 0x2000 //RX_FDDRC_SLANT_0_1 +261 0x2000 //RX_FDDRC_SLANT_0_2 +262 0x2000 //RX_FDDRC_SLANT_0_3 +263 0x2000 //RX_FDDRC_SLANT_1_0 +264 0x2000 //RX_FDDRC_SLANT_1_1 +265 0x2000 //RX_FDDRC_SLANT_1_2 +266 0x2000 //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +286 0x0100 //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 +#VOL 1 +163 0x3000 //RX_TDDRC_ALPHA_UP_1 +164 0x3000 //RX_TDDRC_ALPHA_UP_2 +165 0x3000 //RX_TDDRC_ALPHA_UP_3 +166 0x3000 //RX_TDDRC_ALPHA_UP_4 +184 0x7FB0 //RX_TDDRC_ALPHA_DWN_1 +185 0x7FB0 //RX_TDDRC_ALPHA_DWN_2 +186 0x7FB0 //RX_TDDRC_ALPHA_DWN_3 +189 0x7FB0 //RX_TDDRC_ALPHA_DWN_4 +190 0xDA9E //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +269 0x0000 //RX_TDDRC_THRD_0 +270 0x0000 //RX_TDDRC_THRD_1 +271 0x0E80 //RX_TDDRC_THRD_2 +272 0x3800 //RX_TDDRC_THRD_3 +273 0x2A00 //RX_TDDRC_SLANT_0 +274 0x6E00 //RX_TDDRC_SLANT_1 +275 0x3000 //RX_TDDRC_ALPHA_UP_0 +276 0x7FB0 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x0000 //RX_TDDRC_HMNC_GAIN +279 0x0000 //RX_TDDRC_SMT_FLAG +280 0x0000 //RX_TDDRC_SMT_W +281 0x0100 //RX_TDDRC_DRC_GAIN +195 0x0020 //RX_FDEQ_SUBNUM +196 0x4848 //RX_FDEQ_GAIN_0 +197 0x4848 //RX_FDEQ_GAIN_1 +198 0x4848 //RX_FDEQ_GAIN_2 +199 0x4848 //RX_FDEQ_GAIN_3 +200 0x4848 //RX_FDEQ_GAIN_4 +201 0x4848 //RX_FDEQ_GAIN_5 +202 0x4848 //RX_FDEQ_GAIN_6 +203 0x4848 //RX_FDEQ_GAIN_7 +204 0x4848 //RX_FDEQ_GAIN_8 +205 0x4848 //RX_FDEQ_GAIN_9 +206 0x4848 //RX_FDEQ_GAIN_10 +207 0x4848 //RX_FDEQ_GAIN_11 +208 0x4848 //RX_FDEQ_GAIN_12 +209 0x4848 //RX_FDEQ_GAIN_13 +210 0x4848 //RX_FDEQ_GAIN_14 +211 0x4848 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0000 //RX_FDEQ_BIN_0 +221 0x0000 //RX_FDEQ_BIN_1 +222 0x0000 //RX_FDEQ_BIN_2 +223 0x0000 //RX_FDEQ_BIN_3 +224 0x0000 //RX_FDEQ_BIN_4 +225 0x0000 //RX_FDEQ_BIN_5 +226 0x0000 //RX_FDEQ_BIN_6 +227 0x0000 //RX_FDEQ_BIN_7 +228 0x0000 //RX_FDEQ_BIN_8 +229 0x0000 //RX_FDEQ_BIN_9 +230 0x0000 //RX_FDEQ_BIN_10 +231 0x0000 //RX_FDEQ_BIN_11 +232 0x0000 //RX_FDEQ_BIN_12 +233 0x0000 //RX_FDEQ_BIN_13 +234 0x0000 //RX_FDEQ_BIN_14 +235 0x0000 //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x0000 //RX_FDEQ_RESRV_0 +245 0x0000 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0030 //RX_FDDRC_BAND_MARGIN_1 +248 0x0050 //RX_FDDRC_BAND_MARGIN_2 +249 0x0080 //RX_FDDRC_BAND_MARGIN_3 +250 0x0004 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x5000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x6400 //RX_FDDRC_THRD_3_2 +258 0x6400 //RX_FDDRC_THRD_3_3 +259 0x2000 //RX_FDDRC_SLANT_0_0 +260 0x2000 //RX_FDDRC_SLANT_0_1 +261 0x2000 //RX_FDDRC_SLANT_0_2 +262 0x2000 //RX_FDDRC_SLANT_0_3 +263 0x2000 //RX_FDDRC_SLANT_1_0 +264 0x2000 //RX_FDDRC_SLANT_1_1 +265 0x2000 //RX_FDDRC_SLANT_1_2 +266 0x2000 //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +286 0x0100 //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 +#VOL 2 +163 0x3000 //RX_TDDRC_ALPHA_UP_1 +164 0x3000 //RX_TDDRC_ALPHA_UP_2 +165 0x3000 //RX_TDDRC_ALPHA_UP_3 +166 0x3000 //RX_TDDRC_ALPHA_UP_4 +184 0x7FB0 //RX_TDDRC_ALPHA_DWN_1 +185 0x7FB0 //RX_TDDRC_ALPHA_DWN_2 +186 0x7FB0 //RX_TDDRC_ALPHA_DWN_3 +189 0x7FB0 //RX_TDDRC_ALPHA_DWN_4 +190 0xDA9E //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +269 0x0000 //RX_TDDRC_THRD_0 +270 0x0000 //RX_TDDRC_THRD_1 +271 0x0E80 //RX_TDDRC_THRD_2 +272 0x3800 //RX_TDDRC_THRD_3 +273 0x2A00 //RX_TDDRC_SLANT_0 +274 0x6E00 //RX_TDDRC_SLANT_1 +275 0x3000 //RX_TDDRC_ALPHA_UP_0 +276 0x7FB0 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x0000 //RX_TDDRC_HMNC_GAIN +279 0x0000 //RX_TDDRC_SMT_FLAG +280 0x0000 //RX_TDDRC_SMT_W +281 0x0100 //RX_TDDRC_DRC_GAIN +195 0x0020 //RX_FDEQ_SUBNUM +196 0x4848 //RX_FDEQ_GAIN_0 +197 0x4848 //RX_FDEQ_GAIN_1 +198 0x4848 //RX_FDEQ_GAIN_2 +199 0x4848 //RX_FDEQ_GAIN_3 +200 0x4848 //RX_FDEQ_GAIN_4 +201 0x4848 //RX_FDEQ_GAIN_5 +202 0x4848 //RX_FDEQ_GAIN_6 +203 0x4848 //RX_FDEQ_GAIN_7 +204 0x4848 //RX_FDEQ_GAIN_8 +205 0x4848 //RX_FDEQ_GAIN_9 +206 0x4848 //RX_FDEQ_GAIN_10 +207 0x4848 //RX_FDEQ_GAIN_11 +208 0x4848 //RX_FDEQ_GAIN_12 +209 0x4848 //RX_FDEQ_GAIN_13 +210 0x4848 //RX_FDEQ_GAIN_14 +211 0x4848 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0000 //RX_FDEQ_BIN_0 +221 0x0000 //RX_FDEQ_BIN_1 +222 0x0000 //RX_FDEQ_BIN_2 +223 0x0000 //RX_FDEQ_BIN_3 +224 0x0000 //RX_FDEQ_BIN_4 +225 0x0000 //RX_FDEQ_BIN_5 +226 0x0000 //RX_FDEQ_BIN_6 +227 0x0000 //RX_FDEQ_BIN_7 +228 0x0000 //RX_FDEQ_BIN_8 +229 0x0000 //RX_FDEQ_BIN_9 +230 0x0000 //RX_FDEQ_BIN_10 +231 0x0000 //RX_FDEQ_BIN_11 +232 0x0000 //RX_FDEQ_BIN_12 +233 0x0000 //RX_FDEQ_BIN_13 +234 0x0000 //RX_FDEQ_BIN_14 +235 0x0000 //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x0000 //RX_FDEQ_RESRV_0 +245 0x0000 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0030 //RX_FDDRC_BAND_MARGIN_1 +248 0x0050 //RX_FDDRC_BAND_MARGIN_2 +249 0x0080 //RX_FDDRC_BAND_MARGIN_3 +250 0x0004 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x5000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x6400 //RX_FDDRC_THRD_3_2 +258 0x6400 //RX_FDDRC_THRD_3_3 +259 0x2000 //RX_FDDRC_SLANT_0_0 +260 0x2000 //RX_FDDRC_SLANT_0_1 +261 0x2000 //RX_FDDRC_SLANT_0_2 +262 0x2000 //RX_FDDRC_SLANT_0_3 +263 0x2000 //RX_FDDRC_SLANT_1_0 +264 0x2000 //RX_FDDRC_SLANT_1_1 +265 0x2000 //RX_FDDRC_SLANT_1_2 +266 0x2000 //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +286 0x0100 //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 +#VOL 3 +163 0x3000 //RX_TDDRC_ALPHA_UP_1 +164 0x3000 //RX_TDDRC_ALPHA_UP_2 +165 0x3000 //RX_TDDRC_ALPHA_UP_3 +166 0x3000 //RX_TDDRC_ALPHA_UP_4 +184 0x7FB0 //RX_TDDRC_ALPHA_DWN_1 +185 0x7FB0 //RX_TDDRC_ALPHA_DWN_2 +186 0x7FB0 //RX_TDDRC_ALPHA_DWN_3 +189 0x7FB0 //RX_TDDRC_ALPHA_DWN_4 +190 0xDA9E //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +269 0x0000 //RX_TDDRC_THRD_0 +270 0x0000 //RX_TDDRC_THRD_1 +271 0x0E80 //RX_TDDRC_THRD_2 +272 0x3800 //RX_TDDRC_THRD_3 +273 0x2A00 //RX_TDDRC_SLANT_0 +274 0x6E00 //RX_TDDRC_SLANT_1 +275 0x3000 //RX_TDDRC_ALPHA_UP_0 +276 0x7FB0 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x0000 //RX_TDDRC_HMNC_GAIN +279 0x0000 //RX_TDDRC_SMT_FLAG +280 0x0000 //RX_TDDRC_SMT_W +281 0x0100 //RX_TDDRC_DRC_GAIN +195 0x0020 //RX_FDEQ_SUBNUM +196 0x4848 //RX_FDEQ_GAIN_0 +197 0x4848 //RX_FDEQ_GAIN_1 +198 0x4848 //RX_FDEQ_GAIN_2 +199 0x4848 //RX_FDEQ_GAIN_3 +200 0x4848 //RX_FDEQ_GAIN_4 +201 0x4848 //RX_FDEQ_GAIN_5 +202 0x4848 //RX_FDEQ_GAIN_6 +203 0x4848 //RX_FDEQ_GAIN_7 +204 0x4848 //RX_FDEQ_GAIN_8 +205 0x4848 //RX_FDEQ_GAIN_9 +206 0x4848 //RX_FDEQ_GAIN_10 +207 0x4848 //RX_FDEQ_GAIN_11 +208 0x4848 //RX_FDEQ_GAIN_12 +209 0x4848 //RX_FDEQ_GAIN_13 +210 0x4848 //RX_FDEQ_GAIN_14 +211 0x4848 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0000 //RX_FDEQ_BIN_0 +221 0x0000 //RX_FDEQ_BIN_1 +222 0x0000 //RX_FDEQ_BIN_2 +223 0x0000 //RX_FDEQ_BIN_3 +224 0x0000 //RX_FDEQ_BIN_4 +225 0x0000 //RX_FDEQ_BIN_5 +226 0x0000 //RX_FDEQ_BIN_6 +227 0x0000 //RX_FDEQ_BIN_7 +228 0x0000 //RX_FDEQ_BIN_8 +229 0x0000 //RX_FDEQ_BIN_9 +230 0x0000 //RX_FDEQ_BIN_10 +231 0x0000 //RX_FDEQ_BIN_11 +232 0x0000 //RX_FDEQ_BIN_12 +233 0x0000 //RX_FDEQ_BIN_13 +234 0x0000 //RX_FDEQ_BIN_14 +235 0x0000 //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x0000 //RX_FDEQ_RESRV_0 +245 0x0000 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0030 //RX_FDDRC_BAND_MARGIN_1 +248 0x0050 //RX_FDDRC_BAND_MARGIN_2 +249 0x0080 //RX_FDDRC_BAND_MARGIN_3 +250 0x0004 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x5000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x6400 //RX_FDDRC_THRD_3_2 +258 0x6400 //RX_FDDRC_THRD_3_3 +259 0x2000 //RX_FDDRC_SLANT_0_0 +260 0x2000 //RX_FDDRC_SLANT_0_1 +261 0x2000 //RX_FDDRC_SLANT_0_2 +262 0x2000 //RX_FDDRC_SLANT_0_3 +263 0x2000 //RX_FDDRC_SLANT_1_0 +264 0x2000 //RX_FDDRC_SLANT_1_1 +265 0x2000 //RX_FDDRC_SLANT_1_2 +266 0x2000 //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +286 0x0100 //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 +#VOL 4 +163 0x3000 //RX_TDDRC_ALPHA_UP_1 +164 0x3000 //RX_TDDRC_ALPHA_UP_2 +165 0x3000 //RX_TDDRC_ALPHA_UP_3 +166 0x3000 //RX_TDDRC_ALPHA_UP_4 +184 0x7FB0 //RX_TDDRC_ALPHA_DWN_1 +185 0x7FB0 //RX_TDDRC_ALPHA_DWN_2 +186 0x7FB0 //RX_TDDRC_ALPHA_DWN_3 +189 0x7FB0 //RX_TDDRC_ALPHA_DWN_4 +190 0xDA9E //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +269 0x0000 //RX_TDDRC_THRD_0 +270 0x0000 //RX_TDDRC_THRD_1 +271 0x0E80 //RX_TDDRC_THRD_2 +272 0x3800 //RX_TDDRC_THRD_3 +273 0x2A00 //RX_TDDRC_SLANT_0 +274 0x6E00 //RX_TDDRC_SLANT_1 +275 0x3000 //RX_TDDRC_ALPHA_UP_0 +276 0x7FB0 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x0000 //RX_TDDRC_HMNC_GAIN +279 0x0000 //RX_TDDRC_SMT_FLAG +280 0x0000 //RX_TDDRC_SMT_W +281 0x0100 //RX_TDDRC_DRC_GAIN +195 0x0020 //RX_FDEQ_SUBNUM +196 0x4848 //RX_FDEQ_GAIN_0 +197 0x4848 //RX_FDEQ_GAIN_1 +198 0x4848 //RX_FDEQ_GAIN_2 +199 0x4848 //RX_FDEQ_GAIN_3 +200 0x4848 //RX_FDEQ_GAIN_4 +201 0x4848 //RX_FDEQ_GAIN_5 +202 0x4848 //RX_FDEQ_GAIN_6 +203 0x4848 //RX_FDEQ_GAIN_7 +204 0x4848 //RX_FDEQ_GAIN_8 +205 0x4848 //RX_FDEQ_GAIN_9 +206 0x4848 //RX_FDEQ_GAIN_10 +207 0x4848 //RX_FDEQ_GAIN_11 +208 0x4848 //RX_FDEQ_GAIN_12 +209 0x4848 //RX_FDEQ_GAIN_13 +210 0x4848 //RX_FDEQ_GAIN_14 +211 0x4848 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0000 //RX_FDEQ_BIN_0 +221 0x0000 //RX_FDEQ_BIN_1 +222 0x0000 //RX_FDEQ_BIN_2 +223 0x0000 //RX_FDEQ_BIN_3 +224 0x0000 //RX_FDEQ_BIN_4 +225 0x0000 //RX_FDEQ_BIN_5 +226 0x0000 //RX_FDEQ_BIN_6 +227 0x0000 //RX_FDEQ_BIN_7 +228 0x0000 //RX_FDEQ_BIN_8 +229 0x0000 //RX_FDEQ_BIN_9 +230 0x0000 //RX_FDEQ_BIN_10 +231 0x0000 //RX_FDEQ_BIN_11 +232 0x0000 //RX_FDEQ_BIN_12 +233 0x0000 //RX_FDEQ_BIN_13 +234 0x0000 //RX_FDEQ_BIN_14 +235 0x0000 //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x0000 //RX_FDEQ_RESRV_0 +245 0x0000 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0030 //RX_FDDRC_BAND_MARGIN_1 +248 0x0050 //RX_FDDRC_BAND_MARGIN_2 +249 0x0080 //RX_FDDRC_BAND_MARGIN_3 +250 0x0004 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x5000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x6400 //RX_FDDRC_THRD_3_2 +258 0x6400 //RX_FDDRC_THRD_3_3 +259 0x2000 //RX_FDDRC_SLANT_0_0 +260 0x2000 //RX_FDDRC_SLANT_0_1 +261 0x2000 //RX_FDDRC_SLANT_0_2 +262 0x2000 //RX_FDDRC_SLANT_0_3 +263 0x2000 //RX_FDDRC_SLANT_1_0 +264 0x2000 //RX_FDDRC_SLANT_1_1 +265 0x2000 //RX_FDDRC_SLANT_1_2 +266 0x2000 //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +286 0x0100 //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 +#VOL 5 +163 0x3000 //RX_TDDRC_ALPHA_UP_1 +164 0x3000 //RX_TDDRC_ALPHA_UP_2 +165 0x3000 //RX_TDDRC_ALPHA_UP_3 +166 0x3000 //RX_TDDRC_ALPHA_UP_4 +184 0x7FB0 //RX_TDDRC_ALPHA_DWN_1 +185 0x7FB0 //RX_TDDRC_ALPHA_DWN_2 +186 0x7FB0 //RX_TDDRC_ALPHA_DWN_3 +189 0x7FB0 //RX_TDDRC_ALPHA_DWN_4 +190 0xDA9E //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +269 0x0000 //RX_TDDRC_THRD_0 +270 0x0000 //RX_TDDRC_THRD_1 +271 0x0E80 //RX_TDDRC_THRD_2 +272 0x3800 //RX_TDDRC_THRD_3 +273 0x2A00 //RX_TDDRC_SLANT_0 +274 0x6E00 //RX_TDDRC_SLANT_1 +275 0x3000 //RX_TDDRC_ALPHA_UP_0 +276 0x7FB0 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x0000 //RX_TDDRC_HMNC_GAIN +279 0x0000 //RX_TDDRC_SMT_FLAG +280 0x0000 //RX_TDDRC_SMT_W +281 0x0100 //RX_TDDRC_DRC_GAIN +195 0x0020 //RX_FDEQ_SUBNUM +196 0x4848 //RX_FDEQ_GAIN_0 +197 0x4848 //RX_FDEQ_GAIN_1 +198 0x4848 //RX_FDEQ_GAIN_2 +199 0x4848 //RX_FDEQ_GAIN_3 +200 0x4848 //RX_FDEQ_GAIN_4 +201 0x4848 //RX_FDEQ_GAIN_5 +202 0x4848 //RX_FDEQ_GAIN_6 +203 0x4848 //RX_FDEQ_GAIN_7 +204 0x4848 //RX_FDEQ_GAIN_8 +205 0x4848 //RX_FDEQ_GAIN_9 +206 0x4848 //RX_FDEQ_GAIN_10 +207 0x4848 //RX_FDEQ_GAIN_11 +208 0x4848 //RX_FDEQ_GAIN_12 +209 0x4848 //RX_FDEQ_GAIN_13 +210 0x4848 //RX_FDEQ_GAIN_14 +211 0x4848 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0000 //RX_FDEQ_BIN_0 +221 0x0000 //RX_FDEQ_BIN_1 +222 0x0000 //RX_FDEQ_BIN_2 +223 0x0000 //RX_FDEQ_BIN_3 +224 0x0000 //RX_FDEQ_BIN_4 +225 0x0000 //RX_FDEQ_BIN_5 +226 0x0000 //RX_FDEQ_BIN_6 +227 0x0000 //RX_FDEQ_BIN_7 +228 0x0000 //RX_FDEQ_BIN_8 +229 0x0000 //RX_FDEQ_BIN_9 +230 0x0000 //RX_FDEQ_BIN_10 +231 0x0000 //RX_FDEQ_BIN_11 +232 0x0000 //RX_FDEQ_BIN_12 +233 0x0000 //RX_FDEQ_BIN_13 +234 0x0000 //RX_FDEQ_BIN_14 +235 0x0000 //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x0000 //RX_FDEQ_RESRV_0 +245 0x0000 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0030 //RX_FDDRC_BAND_MARGIN_1 +248 0x0050 //RX_FDDRC_BAND_MARGIN_2 +249 0x0080 //RX_FDDRC_BAND_MARGIN_3 +250 0x0004 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x5000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x6400 //RX_FDDRC_THRD_3_2 +258 0x6400 //RX_FDDRC_THRD_3_3 +259 0x2000 //RX_FDDRC_SLANT_0_0 +260 0x2000 //RX_FDDRC_SLANT_0_1 +261 0x2000 //RX_FDDRC_SLANT_0_2 +262 0x2000 //RX_FDDRC_SLANT_0_3 +263 0x2000 //RX_FDDRC_SLANT_1_0 +264 0x2000 //RX_FDDRC_SLANT_1_1 +265 0x2000 //RX_FDDRC_SLANT_1_2 +266 0x2000 //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +286 0x0100 //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 +#VOL 6 +163 0x3000 //RX_TDDRC_ALPHA_UP_1 +164 0x3000 //RX_TDDRC_ALPHA_UP_2 +165 0x3000 //RX_TDDRC_ALPHA_UP_3 +166 0x3000 //RX_TDDRC_ALPHA_UP_4 +184 0x7FB0 //RX_TDDRC_ALPHA_DWN_1 +185 0x7FB0 //RX_TDDRC_ALPHA_DWN_2 +186 0x7FB0 //RX_TDDRC_ALPHA_DWN_3 +189 0x7FB0 //RX_TDDRC_ALPHA_DWN_4 +190 0xDA9E //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +269 0x0000 //RX_TDDRC_THRD_0 +270 0x0000 //RX_TDDRC_THRD_1 +271 0x0E80 //RX_TDDRC_THRD_2 +272 0x3800 //RX_TDDRC_THRD_3 +273 0x2A00 //RX_TDDRC_SLANT_0 +274 0x6E00 //RX_TDDRC_SLANT_1 +275 0x3000 //RX_TDDRC_ALPHA_UP_0 +276 0x7FB0 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x0000 //RX_TDDRC_HMNC_GAIN +279 0x0000 //RX_TDDRC_SMT_FLAG +280 0x0000 //RX_TDDRC_SMT_W +281 0x0100 //RX_TDDRC_DRC_GAIN +195 0x0020 //RX_FDEQ_SUBNUM +196 0x4848 //RX_FDEQ_GAIN_0 +197 0x4848 //RX_FDEQ_GAIN_1 +198 0x4848 //RX_FDEQ_GAIN_2 +199 0x4848 //RX_FDEQ_GAIN_3 +200 0x4848 //RX_FDEQ_GAIN_4 +201 0x4848 //RX_FDEQ_GAIN_5 +202 0x4848 //RX_FDEQ_GAIN_6 +203 0x4848 //RX_FDEQ_GAIN_7 +204 0x4848 //RX_FDEQ_GAIN_8 +205 0x4848 //RX_FDEQ_GAIN_9 +206 0x4848 //RX_FDEQ_GAIN_10 +207 0x4848 //RX_FDEQ_GAIN_11 +208 0x4848 //RX_FDEQ_GAIN_12 +209 0x4848 //RX_FDEQ_GAIN_13 +210 0x4848 //RX_FDEQ_GAIN_14 +211 0x4848 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0000 //RX_FDEQ_BIN_0 +221 0x0000 //RX_FDEQ_BIN_1 +222 0x0000 //RX_FDEQ_BIN_2 +223 0x0000 //RX_FDEQ_BIN_3 +224 0x0000 //RX_FDEQ_BIN_4 +225 0x0000 //RX_FDEQ_BIN_5 +226 0x0000 //RX_FDEQ_BIN_6 +227 0x0000 //RX_FDEQ_BIN_7 +228 0x0000 //RX_FDEQ_BIN_8 +229 0x0000 //RX_FDEQ_BIN_9 +230 0x0000 //RX_FDEQ_BIN_10 +231 0x0000 //RX_FDEQ_BIN_11 +232 0x0000 //RX_FDEQ_BIN_12 +233 0x0000 //RX_FDEQ_BIN_13 +234 0x0000 //RX_FDEQ_BIN_14 +235 0x0000 //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x0000 //RX_FDEQ_RESRV_0 +245 0x0000 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0030 //RX_FDDRC_BAND_MARGIN_1 +248 0x0050 //RX_FDDRC_BAND_MARGIN_2 +249 0x0080 //RX_FDDRC_BAND_MARGIN_3 +250 0x0004 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x5000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x6400 //RX_FDDRC_THRD_3_2 +258 0x6400 //RX_FDDRC_THRD_3_3 +259 0x2000 //RX_FDDRC_SLANT_0_0 +260 0x2000 //RX_FDDRC_SLANT_0_1 +261 0x2000 //RX_FDDRC_SLANT_0_2 +262 0x2000 //RX_FDDRC_SLANT_0_3 +263 0x2000 //RX_FDDRC_SLANT_1_0 +264 0x2000 //RX_FDDRC_SLANT_1_1 +265 0x2000 //RX_FDDRC_SLANT_1_2 +266 0x2000 //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +286 0x0100 //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 #CASE_NAME HEADSET-TTY_VCO-VOICE_GENERIC-SWB -#PARAM_MODE FULL -#PARAM_TYPE TX+RX -#TOTAL_CUSTOM_STEP 7 +#PARAM_MODE Full +#PARAM_TYPE TX+2RX +#TOTAL_CUSTOM_STEP 7+7 #TX 0 0x0001 //TX_OPERATION_MODE_0 1 0x0001 //TX_OPERATION_MODE_1 2 0x0033 //TX_PATCH_REG -3 0x2F7C //TX_SENDFUNC_MODE_0 +3 0x6F7C //TX_SENDFUNC_MODE_0 4 0x0001 //TX_SENDFUNC_MODE_1 -5 0x0003 //TX_NUM_MIC +5 0x0002 //TX_NUM_MIC 6 0x0003 //TX_SAMPLINGFREQ_SIG 7 0x0003 //TX_SAMPLINGFREQ_PROC 8 0x000A //TX_FRAME_SZ_SIG @@ -45633,8 +69449,8 @@ 18 0x0000 //TX_SYS_RESRV_2 19 0x0000 //TX_SYS_RESRV_3 20 0x0000 //TX_DIST2REF0 -21 0x00A4 //TX_DIST2REF1 -22 0x0017 //TX_DIST2REF_02 +21 0x009D //TX_DIST2REF1 +22 0x0010 //TX_DIST2REF_02 23 0x0000 //TX_DIST2REF_03 24 0x0000 //TX_DIST2REF_04 25 0x0000 //TX_DIST2REF_05 @@ -45740,7 +69556,7 @@ 125 0x6000 //TX_C_POST_FLT_MIC_MAINBLK 126 0x6000 //TX_C_POST_FLT_MIC_REFBLK 127 0x0010 //TX_MIC_BLOCK_N -128 0x7B02 //TX_A_HP +128 0x7D83 //TX_A_HP 129 0x4000 //TX_B_PE 130 0x5000 //TX_THR_PITCH_DET_0 131 0x4800 //TX_THR_PITCH_DET_1 @@ -45777,8 +69593,8 @@ 162 0x7800 //TX_MIN_EQ_RE_EST_10 163 0x7800 //TX_MIN_EQ_RE_EST_11 164 0x7800 //TX_MIN_EQ_RE_EST_12 -165 0x4000 //TX_LAMBDA_RE_EST -166 0x3000 //TX_LAMBDA_CB_NLE +165 0x0880 //TX_LAMBDA_RE_EST +166 0x7FFF //TX_LAMBDA_CB_NLE 167 0x7FFF //TX_C_POST_FLT 168 0x4000 //TX_GAIN_NP 169 0x0180 //TX_SE_HOLD_N @@ -45837,16 +69653,16 @@ 222 0x023E //TX_ADPT_STRICT_H 223 0x0BB8 //TX_RATIO_DT_L_TH_LOW 224 0x3A98 //TX_RATIO_DT_H_TH_LOW -225 0x1F40 //TX_RATIO_DT_L_TH_HIGH -226 0x6590 //TX_RATIO_DT_H_TH_HIGH +225 0x1770 //TX_RATIO_DT_L_TH_HIGH +226 0x733C //TX_RATIO_DT_H_TH_HIGH 227 0x09C4 //TX_RATIO_DT_L0_TH -228 0x2000 //TX_B_POST_FILT_ECHO_L -229 0x1000 //TX_B_POST_FILT_ECHO_H +228 0x7FFF //TX_B_POST_FILT_ECHO_L +229 0x7FFF //TX_B_POST_FILT_ECHO_H 230 0x0200 //TX_MIN_G_CTRL_ECHO 231 0x1000 //TX_B_LESSCUT_RTO_ECHO 232 0x0000 //TX_EPD_OFFSET_00 233 0x0000 //TX_EPD_OFFST_01 -234 0x2328 //TX_RATIO_DT_L0_TH_HIGH +234 0x3A98 //TX_RATIO_DT_L0_TH_HIGH 235 0x7FFF //TX_RATIO_DT_H_TH_CUT 236 0x7FFF //TX_MIN_EQ_RE_EST_13 237 0x0000 //TX_DTD_THR1_7 @@ -45854,7 +69670,7 @@ 239 0x0800 //TX_DT_RESRV_7 240 0x0800 //TX_DT_RESRV_8 241 0x0000 //TX_DT_RESRV_9 -242 0xF800 //TX_THR_SN_EST_0 +242 0xFA00 //TX_THR_SN_EST_0 243 0xFA00 //TX_THR_SN_EST_1 244 0xFA00 //TX_THR_SN_EST_2 245 0xFA00 //TX_THR_SN_EST_3 @@ -45865,10 +69681,10 @@ 250 0x0100 //TX_DELTA_THR_SN_EST_0 251 0x0100 //TX_DELTA_THR_SN_EST_1 252 0x0100 //TX_DELTA_THR_SN_EST_2 -253 0x0100 //TX_DELTA_THR_SN_EST_3 -254 0x0000 //TX_DELTA_THR_SN_EST_4 -255 0x0100 //TX_DELTA_THR_SN_EST_5 -256 0x0200 //TX_DELTA_THR_SN_EST_6 +253 0x0000 //TX_DELTA_THR_SN_EST_3 +254 0x0100 //TX_DELTA_THR_SN_EST_4 +255 0x0200 //TX_DELTA_THR_SN_EST_5 +256 0x0100 //TX_DELTA_THR_SN_EST_6 257 0x0200 //TX_DELTA_THR_SN_EST_7 258 0x4000 //TX_LAMBDA_NN_EST_0 259 0x4000 //TX_LAMBDA_NN_EST_1 @@ -45895,11 +69711,11 @@ 280 0x1000 //TX_B_POST_FLT_1 281 0x0010 //TX_NS_LVL_CTRL_0 282 0x003C //TX_NS_LVL_CTRL_1 -283 0x003C //TX_NS_LVL_CTRL_2 -284 0x0024 //TX_NS_LVL_CTRL_3 -285 0x003C //TX_NS_LVL_CTRL_4 -286 0x0014 //TX_NS_LVL_CTRL_5 -287 0x0011 //TX_NS_LVL_CTRL_6 +283 0x0024 //TX_NS_LVL_CTRL_2 +284 0x003C //TX_NS_LVL_CTRL_3 +285 0x0014 //TX_NS_LVL_CTRL_4 +286 0x0011 //TX_NS_LVL_CTRL_5 +287 0x003C //TX_NS_LVL_CTRL_6 288 0x0011 //TX_NS_LVL_CTRL_7 289 0x000F //TX_MIN_GAIN_S_0 290 0x0010 //TX_MIN_GAIN_S_1 @@ -45915,10 +69731,10 @@ 300 0x7FFF //TX_SNRI_SUP_0 301 0x1400 //TX_SNRI_SUP_1 302 0x1400 //TX_SNRI_SUP_2 -303 0x1400 //TX_SNRI_SUP_3 +303 0x4000 //TX_SNRI_SUP_3 304 0x4000 //TX_SNRI_SUP_4 -305 0x4000 //TX_SNRI_SUP_5 -306 0x50C0 //TX_SNRI_SUP_6 +305 0x50C0 //TX_SNRI_SUP_5 +306 0x1400 //TX_SNRI_SUP_6 307 0x7FFF //TX_SNRI_SUP_7 308 0x7FFF //TX_THR_LFNS 309 0x0018 //TX_G_LFNS @@ -45927,19 +69743,19 @@ 312 0x7FFF //TX_A_POST_FILT_0 313 0x2000 //TX_A_POST_FILT_1 314 0x5000 //TX_A_POST_FILT_S_0 -315 0x7C00 //TX_A_POST_FILT_S_1 -316 0x4C00 //TX_A_POST_FILT_S_2 -317 0x4000 //TX_A_POST_FILT_S_3 -318 0x6000 //TX_A_POST_FILT_S_4 -319 0x4000 //TX_A_POST_FILT_S_5 -320 0x5000 //TX_A_POST_FILT_S_6 +315 0x4C00 //TX_A_POST_FILT_S_1 +316 0x4000 //TX_A_POST_FILT_S_2 +317 0x6000 //TX_A_POST_FILT_S_3 +318 0x4000 //TX_A_POST_FILT_S_4 +319 0x5000 //TX_A_POST_FILT_S_5 +320 0x7C00 //TX_A_POST_FILT_S_6 321 0x7000 //TX_A_POST_FILT_S_7 322 0x2000 //TX_B_POST_FILT_0 -323 0x1000 //TX_B_POST_FILT_1 +323 0x6000 //TX_B_POST_FILT_1 324 0x6000 //TX_B_POST_FILT_2 325 0x6000 //TX_B_POST_FILT_3 -326 0x6000 //TX_B_POST_FILT_4 -327 0x4000 //TX_B_POST_FILT_5 +326 0x4000 //TX_B_POST_FILT_4 +327 0x1000 //TX_B_POST_FILT_5 328 0x1000 //TX_B_POST_FILT_6 329 0x2000 //TX_B_POST_FILT_7 330 0x4000 //TX_B_LESSCUT_RTO_S_0 @@ -45947,8 +69763,8 @@ 332 0x7FFF //TX_B_LESSCUT_RTO_S_2 333 0x7FFF //TX_B_LESSCUT_RTO_S_3 334 0x7FFF //TX_B_LESSCUT_RTO_S_4 -335 0x7FFF //TX_B_LESSCUT_RTO_S_5 -336 0x6000 //TX_B_LESSCUT_RTO_S_6 +335 0x6000 //TX_B_LESSCUT_RTO_S_5 +336 0x7FFF //TX_B_LESSCUT_RTO_S_6 337 0x7FFF //TX_B_LESSCUT_RTO_S_7 338 0x7C00 //TX_LAMBDA_PFILT 339 0x7D00 //TX_LAMBDA_PFILT_S_0 @@ -45979,7 +69795,7 @@ 364 0x0000 //TX_K_APT 365 0x0001 //TX_NOISEDET 366 0x0064 //TX_NDETCT -367 0x0050 //TX_NOISE_TH_0 +367 0x0383 //TX_NOISE_TH_0 368 0x7FFF //TX_NOISE_TH_0_2 369 0x7FFF //TX_NOISE_TH_0_3 370 0x07D0 //TX_NOISE_TH_1 @@ -45991,11 +69807,11 @@ 376 0x0000 //TX_NOISE_TH_5_3 377 0x7FFF //TX_NOISE_TH_5_4 378 0x0DAC //TX_NOISE_TH_6 -379 0x0050 //TX_MINENOISE_TH -380 0x4000 //TX_MINENOISE_MIC0_TH_MTS -381 0xFFEE //TX_MINENOISE_MIC0_TH_EXP -382 0x6000 //TX_MINENOISE_MIC0_S_TH_MTS -383 0xFFF3 //TX_MINENOISE_MIC0_S_TH_EXP +379 0x044C //TX_MINENOISE_TH +380 0xD508 //TX_MORENS_TFMASK_TH +381 0x0001 //TX_DRC_QUIET_FLOOR +382 0x3A98 //TX_RATIODTL_CUT_TH +383 0x0DAC //TX_DT_CUT_K1 384 0x0666 //TX_OUT_ENER_S_TH_CLEAN 385 0x0666 //TX_OUT_ENER_S_TH_LESSCLEAN 386 0x0333 //TX_OUT_ENER_S_TH_NOISY @@ -46003,22 +69819,22 @@ 388 0x0333 //TX_OUT_ENER_TH_SPEECH 389 0x2000 //TX_SN_NPB_GAIN 390 0x0000 //TX_NN_NPB_GAIN -391 0x0000 //TX_CSX_ALPHA_0 -392 0x0000 //TX_CSX_ALPHA_1 -393 0x0000 //TX_CSX_ALPHA_2 -394 0x0000 //TX_CSX_ALPHA_3 -395 0x0800 //TX_MU_ARSP_EST -396 0x00C8 //TX_P_OUTBEAM_MIN_TH +391 0x7FFF //TX_POST_MASK_SUP_HSNE +392 0x1388 //TX_TAIL_DET_TH +393 0x4000 //TX_B_LESSCUT_RTO_WTA +394 0x0000 //TX_MEL_G_R +395 0x0080 //TX_SUPHIGH_TH +396 0x0000 //TX_MASK_G_R 397 0x0002 //TX_EXTRA_NS_L -398 0x0800 //TX_EXTRA_NS_A -399 0x0005 //TX_VR_NOISE_FLOOR_TH +398 0x1800 //TX_C_POST_FLT_MASK +399 0x7FFF //TX_A_POST_FLT_WNS 400 0x0148 //TX_MIN_G_LOW300HZ -401 0x0001 //TX_MAXLEVEL_CNG +401 0x0004 //TX_MAXLEVEL_CNG 402 0x00B4 //TX_STN_NOISE_TH 403 0x4000 //TX_POST_MASK_SUP 404 0x7FFF //TX_POST_MASK_ADJUST 405 0x00C8 //TX_NS_ENOISE_MIC0_TH -406 0x0050 //TX_MINENOISE_MIC0_TH +406 0x02F3 //TX_MINENOISE_MIC0_TH 407 0x012C //TX_MINENOISE_MIC0_S_TH 408 0x4000 //TX_MIN_G_CTRL_SSNS 409 0x0000 //TX_METAL_RTO_THR @@ -46126,16 +69942,16 @@ 511 0x6666 //TX_MIC_TO_BFGAIN 512 0x0000 //TX_MICTOBFGAIN0 513 0x0000 //TX_FASTMUE_TH -514 0x0000 //TX_DERVB_LEN_0 -515 0x0000 //TX_DERVB_LEN_1 -516 0x0000 //TX_RHO_DERVB -517 0x0000 //TX_MIC_INDX_DERVB -518 0x0000 //TX_MU_DERVB -519 0x0000 //TX_DR_RESRV_0 -520 0x0000 //TX_DR_RESRV_1 -521 0x0000 //TX_DR_RESRV_2 -522 0x0000 //TX_DR_RESRV_3 -523 0x0000 //TX_DR_RESRV_4 +514 0xC000 //TX_DEREVERB_LF_MU +515 0xC000 //TX_DEREVERB_HF_MU +516 0xCCCC //TX_DEREVERB_DELAY +517 0xD999 //TX_DEREVERB_COEF_LEN +518 0x1F40 //TX_DEREVERB_DNR +519 0x0000 //TX_DEREVERB_ALPHA +520 0x0000 //TX_DEREVERB_BETA +521 0x0000 //TX_GSC_RTOL_TH +522 0x7000 //TX_GSC_RTOH_TH +523 0x0064 //TX_WIDE2_MEANHTH 524 0x0000 //TX_DR_RESRV_5 525 0x0000 //TX_DR_RESRV_6 526 0x0000 //TX_DR_RESRV_7 @@ -46179,22 +69995,22 @@ 564 0x0000 //TX_PB_RESRV_0 565 0x0000 //TX_PB_RESRV_1 566 0x0020 //TX_FDEQ_SUBNUM -567 0x4848 //TX_FDEQ_GAIN_0 -568 0x4848 //TX_FDEQ_GAIN_1 +567 0x5450 //TX_FDEQ_GAIN_0 +568 0x4C48 //TX_FDEQ_GAIN_1 569 0x4850 //TX_FDEQ_GAIN_2 570 0x5050 //TX_FDEQ_GAIN_3 571 0x4848 //TX_FDEQ_GAIN_4 -572 0x484A //TX_FDEQ_GAIN_5 +572 0x484E //TX_FDEQ_GAIN_5 573 0x4E5E //TX_FDEQ_GAIN_6 -574 0x5C4C //TX_FDEQ_GAIN_7 +574 0x584E //TX_FDEQ_GAIN_7 575 0x4C4E //TX_FDEQ_GAIN_8 -576 0x4844 //TX_FDEQ_GAIN_9 -577 0x4448 //TX_FDEQ_GAIN_10 -578 0x4850 //TX_FDEQ_GAIN_11 -579 0x5C6A //TX_FDEQ_GAIN_12 -580 0x5A84 //TX_FDEQ_GAIN_13 -581 0x7880 //TX_FDEQ_GAIN_14 -582 0x7F7F //TX_FDEQ_GAIN_15 +576 0x564E //TX_FDEQ_GAIN_9 +577 0x5058 //TX_FDEQ_GAIN_10 +578 0x625C //TX_FDEQ_GAIN_11 +579 0x6C6C //TX_FDEQ_GAIN_12 +580 0x7086 //TX_FDEQ_GAIN_13 +581 0x869C //TX_FDEQ_GAIN_14 +582 0xB0B0 //TX_FDEQ_GAIN_15 583 0x4848 //TX_FDEQ_GAIN_16 584 0x4848 //TX_FDEQ_GAIN_17 585 0x4848 //TX_FDEQ_GAIN_18 @@ -46218,7 +70034,7 @@ 603 0x1B1E //TX_FDEQ_BIN_12 604 0x1E1E //TX_FDEQ_BIN_13 605 0x1E28 //TX_FDEQ_BIN_14 -606 0x282C //TX_FDEQ_BIN_15 +606 0x284A //TX_FDEQ_BIN_15 607 0x0000 //TX_FDEQ_BIN_16 608 0x0000 //TX_FDEQ_BIN_17 609 0x0000 //TX_FDEQ_BIN_18 @@ -46236,15 +70052,15 @@ 621 0x4848 //TX_PREEQ_GAIN_MIC0_4 622 0x4848 //TX_PREEQ_GAIN_MIC0_5 623 0x4848 //TX_PREEQ_GAIN_MIC0_6 -624 0x484A //TX_PREEQ_GAIN_MIC0_7 -625 0x4C4E //TX_PREEQ_GAIN_MIC0_8 -626 0x5054 //TX_PREEQ_GAIN_MIC0_9 -627 0x5658 //TX_PREEQ_GAIN_MIC0_10 -628 0x5C5C //TX_PREEQ_GAIN_MIC0_11 -629 0x6474 //TX_PREEQ_GAIN_MIC0_12 -630 0x7870 //TX_PREEQ_GAIN_MIC0_13 -631 0x5C48 //TX_PREEQ_GAIN_MIC0_14 -632 0x383C //TX_PREEQ_GAIN_MIC0_15 +624 0x4848 //TX_PREEQ_GAIN_MIC0_7 +625 0x494A //TX_PREEQ_GAIN_MIC0_8 +626 0x4B4C //TX_PREEQ_GAIN_MIC0_9 +627 0x4B4A //TX_PREEQ_GAIN_MIC0_10 +628 0x484B //TX_PREEQ_GAIN_MIC0_11 +629 0x4C4C //TX_PREEQ_GAIN_MIC0_12 +630 0x4B48 //TX_PREEQ_GAIN_MIC0_13 +631 0x3838 //TX_PREEQ_GAIN_MIC0_14 +632 0x3835 //TX_PREEQ_GAIN_MIC0_15 633 0x4848 //TX_PREEQ_GAIN_MIC0_16 634 0x4848 //TX_PREEQ_GAIN_MIC0_17 635 0x4848 //TX_PREEQ_GAIN_MIC0_18 @@ -46285,15 +70101,15 @@ 670 0x4848 //TX_PREEQ_GAIN_MIC1_4 671 0x4848 //TX_PREEQ_GAIN_MIC1_5 672 0x4848 //TX_PREEQ_GAIN_MIC1_6 -673 0x4848 //TX_PREEQ_GAIN_MIC1_7 -674 0x4848 //TX_PREEQ_GAIN_MIC1_8 -675 0x4848 //TX_PREEQ_GAIN_MIC1_9 -676 0x4848 //TX_PREEQ_GAIN_MIC1_10 -677 0x4848 //TX_PREEQ_GAIN_MIC1_11 -678 0x4848 //TX_PREEQ_GAIN_MIC1_12 -679 0x4848 //TX_PREEQ_GAIN_MIC1_13 -680 0x4848 //TX_PREEQ_GAIN_MIC1_14 -681 0x4848 //TX_PREEQ_GAIN_MIC1_15 +673 0x4846 //TX_PREEQ_GAIN_MIC1_7 +674 0x4544 //TX_PREEQ_GAIN_MIC1_8 +675 0x4241 //TX_PREEQ_GAIN_MIC1_9 +676 0x403E //TX_PREEQ_GAIN_MIC1_10 +677 0x3D3C //TX_PREEQ_GAIN_MIC1_11 +678 0x3C3C //TX_PREEQ_GAIN_MIC1_12 +679 0x3C39 //TX_PREEQ_GAIN_MIC1_13 +680 0x3838 //TX_PREEQ_GAIN_MIC1_14 +681 0x3A3C //TX_PREEQ_GAIN_MIC1_15 682 0x4848 //TX_PREEQ_GAIN_MIC1_16 683 0x4848 //TX_PREEQ_GAIN_MIC1_17 684 0x4848 //TX_PREEQ_GAIN_MIC1_18 @@ -46302,22 +70118,22 @@ 687 0x4848 //TX_PREEQ_GAIN_MIC1_21 688 0x4848 //TX_PREEQ_GAIN_MIC1_22 689 0x4848 //TX_PREEQ_GAIN_MIC1_23 -690 0x251A //TX_PREEQ_BIN_MIC1_0 -691 0x0F0F //TX_PREEQ_BIN_MIC1_1 -692 0x0C0C //TX_PREEQ_BIN_MIC1_2 -693 0x0C0F //TX_PREEQ_BIN_MIC1_3 -694 0x0F0F //TX_PREEQ_BIN_MIC1_4 -695 0x0F09 //TX_PREEQ_BIN_MIC1_5 -696 0x0909 //TX_PREEQ_BIN_MIC1_6 -697 0x0908 //TX_PREEQ_BIN_MIC1_7 -698 0x070F //TX_PREEQ_BIN_MIC1_8 -699 0x1F08 //TX_PREEQ_BIN_MIC1_9 -700 0x0808 //TX_PREEQ_BIN_MIC1_10 -701 0x0920 //TX_PREEQ_BIN_MIC1_11 -702 0x2020 //TX_PREEQ_BIN_MIC1_12 -703 0x2021 //TX_PREEQ_BIN_MIC1_13 -704 0x0000 //TX_PREEQ_BIN_MIC1_14 -705 0x0000 //TX_PREEQ_BIN_MIC1_15 +690 0x0202 //TX_PREEQ_BIN_MIC1_0 +691 0x0203 //TX_PREEQ_BIN_MIC1_1 +692 0x0303 //TX_PREEQ_BIN_MIC1_2 +693 0x0304 //TX_PREEQ_BIN_MIC1_3 +694 0x0405 //TX_PREEQ_BIN_MIC1_4 +695 0x0506 //TX_PREEQ_BIN_MIC1_5 +696 0x0708 //TX_PREEQ_BIN_MIC1_6 +697 0x090A //TX_PREEQ_BIN_MIC1_7 +698 0x0B0C //TX_PREEQ_BIN_MIC1_8 +699 0x0D0E //TX_PREEQ_BIN_MIC1_9 +700 0x1013 //TX_PREEQ_BIN_MIC1_10 +701 0x1719 //TX_PREEQ_BIN_MIC1_11 +702 0x1B1E //TX_PREEQ_BIN_MIC1_12 +703 0x1E1E //TX_PREEQ_BIN_MIC1_13 +704 0x1E28 //TX_PREEQ_BIN_MIC1_14 +705 0x282C //TX_PREEQ_BIN_MIC1_15 706 0x0000 //TX_PREEQ_BIN_MIC1_16 707 0x0000 //TX_PREEQ_BIN_MIC1_17 708 0x0000 //TX_PREEQ_BIN_MIC1_18 @@ -46403,7 +70219,7 @@ 788 0x7EB8 //TX_TDDRC_ALPHA_DWN_02 789 0x7EB8 //TX_TDDRC_ALPHA_DWN_03 790 0x7EB8 //TX_TDDRC_ALPHA_DWN_04 -791 0x7FFF //TX_TDDRC_TD_DRC_LIMIT +791 0x7214 //TX_TDDRC_TD_DRC_LIMIT 792 0x0800 //TX_TDDRC_POST_LIMIT_GAIN 793 0x0000 //TX_TDDRC_RESRV_0 794 0x0000 //TX_TDDRC_RESRV_1 @@ -46466,12 +70282,12 @@ 851 0x0000 //TX_FFP_RESRV_5 852 0x0000 //TX_FFP_RESRV_6 853 0x0002 //TX_FILTINDX -854 0x0001 //TX_TDDRC_THRD_0 -855 0x0002 //TX_TDDRC_THRD_1 -856 0x1000 //TX_TDDRC_THRD_2 -857 0x1000 //TX_TDDRC_THRD_3 -858 0x6000 //TX_TDDRC_SLANT_0 -859 0x6000 //TX_TDDRC_SLANT_1 +854 0x0003 //TX_TDDRC_THRD_0 +855 0x0004 //TX_TDDRC_THRD_1 +856 0x1800 //TX_TDDRC_THRD_2 +857 0x1800 //TX_TDDRC_THRD_3 +858 0x7FFF //TX_TDDRC_SLANT_0 +859 0x7FFF //TX_TDDRC_SLANT_1 860 0x0800 //TX_TDDRC_ALPHA_UP_00 861 0x7EB8 //TX_TDDRC_ALPHA_DWN_00 862 0x0000 //TX_TDDRC_HMNC_FLAG @@ -46501,7 +70317,7 @@ 886 0x0CCD //TX_FASTNS_TFMASKBIN_TH2 887 0x0CCD //TX_FASTNS_TFMASKBIN_TH3 888 0x00C8 //TX_FASTNS_ARSPC_TH -889 0xC000 //TX_FASTNS_MASK5_TH +889 0x8000 //TX_FASTNS_MASK5_TH 890 0x4848 //TX_POSTSSA_MIN_G_VR_MASK 891 0x4000 //TX_A_LESSCUT_RTO_MASK 892 0x1770 //TX_FASTNS_NOISETH @@ -46509,8 +70325,73 @@ 894 0xC000 //TX_FASTNS_SSA_THHFL 895 0xCCCC //TX_FASTNS_SSA_THLFH 896 0xD999 //TX_FASTNS_SSA_THHFH +897 0x2339 //TX_SENDFUNC_REG_MICMUTE +898 0x0021 //TX_SENDFUNC_REG_MICMUTE1 +899 0x02BC //TX_MICMUTE_RATIO_THR +900 0x0140 //TX_MICMUTE_AMP_THR +901 0x0004 //TX_MICMUTE_HPF_IND +902 0x00C0 //TX_MICMUTE_LOG_EYR_TH +903 0x0008 //TX_MICMUTE_CVG_TIME +904 0x0008 //TX_MICMUTE_RELEASE_TIME +905 0x01FE //TX_MIC_VOLUME_MIC0MUTE +906 0x0020 //TX_MICMUTE_EPD_OFFSET_0 +907 0x001E //TX_MICMUTE_FRQ_AEC_L +908 0x7999 //TX_MICMUTE_EAD_THR +909 0x7FFF //TX_MICMUTE_LAMBDA_CB_NLE +910 0x7FFF //TX_MICMUTE_LAMBDA_RE_EST +911 0x4000 //TX_DTD_THR1_MICMUTE_0 +912 0x7000 //TX_DTD_THR1_MICMUTE_1 +913 0x7FFF //TX_DTD_THR1_MICMUTE_2 +914 0x7FFF //TX_DTD_THR1_MICMUTE_3 +915 0x6CCC //TX_DTD_THR2_MICMUTE_0 +916 0x0400 //TX_MICMUTE_MIN_EQ_RE_EST_0 +917 0x0400 //TX_MICMUTE_MIN_EQ_RE_EST_1 +918 0x1000 //TX_MICMUTE_MIN_EQ_RE_EST_2 +919 0x7FFF //TX_MICMUTE_MIN_EQ_RE_EST_3 +920 0x7FFF //TX_MICMUTE_MIN_EQ_RE_EST_4 +921 0x4000 //TX_MICMUTE_C_POST_FLT +922 0x03E8 //TX_MICMUTE_DT_CUT_K +923 0x0001 //TX_MICMUTE_DT_CUT_THR +924 0x03E8 //TX_MICMUTE_DT_CUT_K2 +925 0x0001 //TX_MICMUTE_DT_CUT_THR2 +926 0x0064 //TX_MICMUTE_DT2_HOLD_N +927 0x1000 //TX_MICMUTE_RATIODTH_THCUT +928 0x1000 //TX_MICMUTE_B_POST_FLT_ECHOL +929 0x7FFF //TX_MICMUTE_B_POST_FLT_ECHOH +930 0x0400 //TX_MICMUTE_C_POST_FLT_MASK +931 0x7999 //TX_MICMUTE_RATIODTL_CUT_TH +932 0x0258 //TX_MICMUTE_DT_CUT_K1 +933 0x0800 //TX_MICMUTE_N2_SN_EST +934 0xFC00 //TX_MICMUTE_THR_SN_EST_0 +935 0x001C //TX_MICMUTE_MIN_G_CTRL_0 +936 0x6000 //TX_MICMUTE_A_POST_FILT_S_0 +937 0x7000 //TX_MICMUTE_B_POST_FILT_0 +938 0x2710 //TX_MIC1RUB_AMP_THR +939 0x0010 //TX_MIC1MUTE_RATIO_THR +940 0x0450 //TX_MIC1MUTE_AMP_THR +941 0x0008 //TX_MIC1MUTE_CVG_TIME +942 0x0008 //TX_MIC1MUTE_RELEASE_TIME +943 0x0000 //TX_AMS_RESRV_01 +944 0x0000 //TX_AMS_RESRV_02 +945 0x0000 //TX_AMS_RESRV_03 +946 0x0000 //TX_AMS_RESRV_04 +947 0x0000 //TX_AMS_RESRV_05 +948 0x0000 //TX_AMS_RESRV_06 +949 0x0000 //TX_AMS_RESRV_07 +950 0x0000 //TX_AMS_RESRV_08 +951 0x0000 //TX_AMS_RESRV_09 +952 0x0000 //TX_AMS_RESRV_10 +953 0x0000 //TX_AMS_RESRV_11 +954 0x0000 //TX_AMS_RESRV_12 +955 0x0000 //TX_AMS_RESRV_13 +956 0x0000 //TX_AMS_RESRV_14 +957 0x0000 //TX_AMS_RESRV_15 +958 0x0000 //TX_AMS_RESRV_16 +959 0x0000 //TX_AMS_RESRV_17 +960 0x0000 //TX_AMS_RESRV_18 +961 0x0000 //TX_AMS_RESRV_19 #RX -0 0x0040 //RX_RECVFUNC_MODE_0 +0 0x2040 //RX_RECVFUNC_MODE_0 1 0x0000 //RX_RECVFUNC_MODE_1 2 0x0000 //RX_SAMPLINGFREQ_SIG 3 0x0000 //RX_SAMPLINGFREQ_PROC @@ -47360,18 +71241,869 @@ 110 0x0000 //RX_FDDRC_RESRV_0 129 0x0100 //RX_SPK_VOL 130 0x0000 //RX_VOL_RESRV_0 +#RX 2 +157 0x2040 //RX_RECVFUNC_MODE_0 +158 0x0000 //RX_RECVFUNC_MODE_1 +159 0x0000 //RX_SAMPLINGFREQ_SIG +160 0x0000 //RX_SAMPLINGFREQ_PROC +161 0x000A //RX_FRAME_SZ +162 0x0000 //RX_DELAY_OPT +163 0x3000 //RX_TDDRC_ALPHA_UP_1 +164 0x3000 //RX_TDDRC_ALPHA_UP_2 +165 0x3000 //RX_TDDRC_ALPHA_UP_3 +166 0x3000 //RX_TDDRC_ALPHA_UP_4 +167 0x050D //RX_PGA +168 0x7652 //RX_A_HP +169 0x4000 //RX_B_PE +170 0x7800 //RX_THR_PITCH_DET_0 +171 0x7000 //RX_THR_PITCH_DET_1 +172 0x6000 //RX_THR_PITCH_DET_2 +173 0x0000 //RX_PITCH_BFR_LEN +174 0x0000 //RX_SBD_PITCH_DET +175 0x0000 //RX_PP_RESRV_0 +176 0x0000 //RX_PP_RESRV_1 +177 0xF800 //RX_N_SN_EST +178 0x0000 //RX_N2_SN_EST +179 0x000F //RX_NS_LVL_CTRL +180 0xF800 //RX_THR_SN_EST +181 0x7E00 //RX_LAMBDA_PFILT +182 0x000A //RX_FENS_RESRV_0 +183 0x0000 //RX_FENS_RESRV_1 +184 0x7FB0 //RX_TDDRC_ALPHA_DWN_1 +185 0x7FB0 //RX_TDDRC_ALPHA_DWN_2 +186 0x7FB0 //RX_TDDRC_ALPHA_DWN_3 +187 0x0000 //RX_EXTRA_NS_L +188 0x0000 //RX_EXTRA_NS_A +189 0x7FB0 //RX_TDDRC_ALPHA_DWN_4 +190 0xDA9E //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +192 0x0000 //RX_A_POST_FLT +193 0x0000 //RX_LMT_THRD +194 0x4000 //RX_LMT_ALPHA +195 0x0020 //RX_FDEQ_SUBNUM +196 0x4848 //RX_FDEQ_GAIN_0 +197 0x4848 //RX_FDEQ_GAIN_1 +198 0x4848 //RX_FDEQ_GAIN_2 +199 0x4848 //RX_FDEQ_GAIN_3 +200 0x4848 //RX_FDEQ_GAIN_4 +201 0x4848 //RX_FDEQ_GAIN_5 +202 0x4848 //RX_FDEQ_GAIN_6 +203 0x4848 //RX_FDEQ_GAIN_7 +204 0x4848 //RX_FDEQ_GAIN_8 +205 0x4848 //RX_FDEQ_GAIN_9 +206 0x4848 //RX_FDEQ_GAIN_10 +207 0x4848 //RX_FDEQ_GAIN_11 +208 0x4848 //RX_FDEQ_GAIN_12 +209 0x4848 //RX_FDEQ_GAIN_13 +210 0x4848 //RX_FDEQ_GAIN_14 +211 0x4848 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0000 //RX_FDEQ_BIN_0 +221 0x0000 //RX_FDEQ_BIN_1 +222 0x0000 //RX_FDEQ_BIN_2 +223 0x0000 //RX_FDEQ_BIN_3 +224 0x0000 //RX_FDEQ_BIN_4 +225 0x0000 //RX_FDEQ_BIN_5 +226 0x0000 //RX_FDEQ_BIN_6 +227 0x0000 //RX_FDEQ_BIN_7 +228 0x0000 //RX_FDEQ_BIN_8 +229 0x0000 //RX_FDEQ_BIN_9 +230 0x0000 //RX_FDEQ_BIN_10 +231 0x0000 //RX_FDEQ_BIN_11 +232 0x0000 //RX_FDEQ_BIN_12 +233 0x0000 //RX_FDEQ_BIN_13 +234 0x0000 //RX_FDEQ_BIN_14 +235 0x0000 //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x0000 //RX_FDEQ_RESRV_0 +245 0x0000 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0030 //RX_FDDRC_BAND_MARGIN_1 +248 0x0050 //RX_FDDRC_BAND_MARGIN_2 +249 0x0080 //RX_FDDRC_BAND_MARGIN_3 +250 0x0004 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x5000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x6400 //RX_FDDRC_THRD_3_2 +258 0x6400 //RX_FDDRC_THRD_3_3 +259 0x2000 //RX_FDDRC_SLANT_0_0 +260 0x2000 //RX_FDDRC_SLANT_0_1 +261 0x2000 //RX_FDDRC_SLANT_0_2 +262 0x2000 //RX_FDDRC_SLANT_0_3 +263 0x2000 //RX_FDDRC_SLANT_1_0 +264 0x2000 //RX_FDDRC_SLANT_1_1 +265 0x2000 //RX_FDDRC_SLANT_1_2 +266 0x2000 //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +268 0x0003 //RX_FILTINDX +269 0x0000 //RX_TDDRC_THRD_0 +270 0x0000 //RX_TDDRC_THRD_1 +271 0x0E80 //RX_TDDRC_THRD_2 +272 0x3800 //RX_TDDRC_THRD_3 +273 0x2A00 //RX_TDDRC_SLANT_0 +274 0x6E00 //RX_TDDRC_SLANT_1 +275 0x3000 //RX_TDDRC_ALPHA_UP_0 +276 0x7FB0 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x0000 //RX_TDDRC_HMNC_GAIN +279 0x0000 //RX_TDDRC_SMT_FLAG +280 0x0000 //RX_TDDRC_SMT_W +281 0x0100 //RX_TDDRC_DRC_GAIN +282 0x7C00 //RX_LAMBDA_PKA_FP +283 0x2000 //RX_TPKA_FP +284 0x0080 //RX_MIN_G_FP +285 0x2000 //RX_MAX_G_FP +286 0x0100 //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 +288 0x0010 //RX_MAXLEVEL_CNG +289 0x0000 //RX_BWE_UV_TH +290 0x0000 //RX_BWE_UV_TH2 +291 0x0000 //RX_BWE_UV_TH3 +292 0x0000 //RX_BWE_V_TH +293 0x0000 //RX_BWE_GAIN1_V_TH1 +294 0x0000 //RX_BWE_GAIN1_V_TH2 +295 0x0000 //RX_BWE_UV_EQ +296 0x0000 //RX_BWE_V_EQ +297 0x0000 //RX_BWE_TONE_TH +298 0x0000 //RX_BWE_UV_HOLD_T +299 0x0000 //RX_BWE_GAIN2_ALPHA +300 0x0000 //RX_BWE_GAIN3_ALPHA +301 0x0000 //RX_BWE_CUTOFF +302 0x0000 //RX_BWE_GAINFILL +303 0x0000 //RX_BWE_MAXTH_TONE +304 0x0000 //RX_BWE_EQ_0 +305 0x0000 //RX_BWE_EQ_1 +306 0x0000 //RX_BWE_EQ_2 +307 0x0000 //RX_BWE_EQ_3 +308 0x0000 //RX_BWE_EQ_4 +309 0x0000 //RX_BWE_EQ_5 +310 0x0000 //RX_BWE_EQ_6 +311 0x0000 //RX_BWE_RESRV_0 +312 0x0000 //RX_BWE_RESRV_1 +313 0x0000 //RX_BWE_RESRV_2 +#VOL 0 +163 0x3000 //RX_TDDRC_ALPHA_UP_1 +164 0x3000 //RX_TDDRC_ALPHA_UP_2 +165 0x3000 //RX_TDDRC_ALPHA_UP_3 +166 0x3000 //RX_TDDRC_ALPHA_UP_4 +184 0x7FB0 //RX_TDDRC_ALPHA_DWN_1 +185 0x7FB0 //RX_TDDRC_ALPHA_DWN_2 +186 0x7FB0 //RX_TDDRC_ALPHA_DWN_3 +189 0x7FB0 //RX_TDDRC_ALPHA_DWN_4 +190 0xDA9E //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +269 0x0000 //RX_TDDRC_THRD_0 +270 0x0000 //RX_TDDRC_THRD_1 +271 0x0E80 //RX_TDDRC_THRD_2 +272 0x3800 //RX_TDDRC_THRD_3 +273 0x2A00 //RX_TDDRC_SLANT_0 +274 0x6E00 //RX_TDDRC_SLANT_1 +275 0x3000 //RX_TDDRC_ALPHA_UP_0 +276 0x7FB0 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x0000 //RX_TDDRC_HMNC_GAIN +279 0x0000 //RX_TDDRC_SMT_FLAG +280 0x0000 //RX_TDDRC_SMT_W +281 0x0100 //RX_TDDRC_DRC_GAIN +195 0x0020 //RX_FDEQ_SUBNUM +196 0x4848 //RX_FDEQ_GAIN_0 +197 0x4848 //RX_FDEQ_GAIN_1 +198 0x4848 //RX_FDEQ_GAIN_2 +199 0x4848 //RX_FDEQ_GAIN_3 +200 0x4848 //RX_FDEQ_GAIN_4 +201 0x4848 //RX_FDEQ_GAIN_5 +202 0x4848 //RX_FDEQ_GAIN_6 +203 0x4848 //RX_FDEQ_GAIN_7 +204 0x4848 //RX_FDEQ_GAIN_8 +205 0x4848 //RX_FDEQ_GAIN_9 +206 0x4848 //RX_FDEQ_GAIN_10 +207 0x4848 //RX_FDEQ_GAIN_11 +208 0x4848 //RX_FDEQ_GAIN_12 +209 0x4848 //RX_FDEQ_GAIN_13 +210 0x4848 //RX_FDEQ_GAIN_14 +211 0x4848 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0000 //RX_FDEQ_BIN_0 +221 0x0000 //RX_FDEQ_BIN_1 +222 0x0000 //RX_FDEQ_BIN_2 +223 0x0000 //RX_FDEQ_BIN_3 +224 0x0000 //RX_FDEQ_BIN_4 +225 0x0000 //RX_FDEQ_BIN_5 +226 0x0000 //RX_FDEQ_BIN_6 +227 0x0000 //RX_FDEQ_BIN_7 +228 0x0000 //RX_FDEQ_BIN_8 +229 0x0000 //RX_FDEQ_BIN_9 +230 0x0000 //RX_FDEQ_BIN_10 +231 0x0000 //RX_FDEQ_BIN_11 +232 0x0000 //RX_FDEQ_BIN_12 +233 0x0000 //RX_FDEQ_BIN_13 +234 0x0000 //RX_FDEQ_BIN_14 +235 0x0000 //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x0000 //RX_FDEQ_RESRV_0 +245 0x0000 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0030 //RX_FDDRC_BAND_MARGIN_1 +248 0x0050 //RX_FDDRC_BAND_MARGIN_2 +249 0x0080 //RX_FDDRC_BAND_MARGIN_3 +250 0x0004 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x5000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x6400 //RX_FDDRC_THRD_3_2 +258 0x6400 //RX_FDDRC_THRD_3_3 +259 0x2000 //RX_FDDRC_SLANT_0_0 +260 0x2000 //RX_FDDRC_SLANT_0_1 +261 0x2000 //RX_FDDRC_SLANT_0_2 +262 0x2000 //RX_FDDRC_SLANT_0_3 +263 0x2000 //RX_FDDRC_SLANT_1_0 +264 0x2000 //RX_FDDRC_SLANT_1_1 +265 0x2000 //RX_FDDRC_SLANT_1_2 +266 0x2000 //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +286 0x0100 //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 +#VOL 1 +163 0x3000 //RX_TDDRC_ALPHA_UP_1 +164 0x3000 //RX_TDDRC_ALPHA_UP_2 +165 0x3000 //RX_TDDRC_ALPHA_UP_3 +166 0x3000 //RX_TDDRC_ALPHA_UP_4 +184 0x7FB0 //RX_TDDRC_ALPHA_DWN_1 +185 0x7FB0 //RX_TDDRC_ALPHA_DWN_2 +186 0x7FB0 //RX_TDDRC_ALPHA_DWN_3 +189 0x7FB0 //RX_TDDRC_ALPHA_DWN_4 +190 0xDA9E //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +269 0x0000 //RX_TDDRC_THRD_0 +270 0x0000 //RX_TDDRC_THRD_1 +271 0x0E80 //RX_TDDRC_THRD_2 +272 0x3800 //RX_TDDRC_THRD_3 +273 0x2A00 //RX_TDDRC_SLANT_0 +274 0x6E00 //RX_TDDRC_SLANT_1 +275 0x3000 //RX_TDDRC_ALPHA_UP_0 +276 0x7FB0 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x0000 //RX_TDDRC_HMNC_GAIN +279 0x0000 //RX_TDDRC_SMT_FLAG +280 0x0000 //RX_TDDRC_SMT_W +281 0x0100 //RX_TDDRC_DRC_GAIN +195 0x0020 //RX_FDEQ_SUBNUM +196 0x4848 //RX_FDEQ_GAIN_0 +197 0x4848 //RX_FDEQ_GAIN_1 +198 0x4848 //RX_FDEQ_GAIN_2 +199 0x4848 //RX_FDEQ_GAIN_3 +200 0x4848 //RX_FDEQ_GAIN_4 +201 0x4848 //RX_FDEQ_GAIN_5 +202 0x4848 //RX_FDEQ_GAIN_6 +203 0x4848 //RX_FDEQ_GAIN_7 +204 0x4848 //RX_FDEQ_GAIN_8 +205 0x4848 //RX_FDEQ_GAIN_9 +206 0x4848 //RX_FDEQ_GAIN_10 +207 0x4848 //RX_FDEQ_GAIN_11 +208 0x4848 //RX_FDEQ_GAIN_12 +209 0x4848 //RX_FDEQ_GAIN_13 +210 0x4848 //RX_FDEQ_GAIN_14 +211 0x4848 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0000 //RX_FDEQ_BIN_0 +221 0x0000 //RX_FDEQ_BIN_1 +222 0x0000 //RX_FDEQ_BIN_2 +223 0x0000 //RX_FDEQ_BIN_3 +224 0x0000 //RX_FDEQ_BIN_4 +225 0x0000 //RX_FDEQ_BIN_5 +226 0x0000 //RX_FDEQ_BIN_6 +227 0x0000 //RX_FDEQ_BIN_7 +228 0x0000 //RX_FDEQ_BIN_8 +229 0x0000 //RX_FDEQ_BIN_9 +230 0x0000 //RX_FDEQ_BIN_10 +231 0x0000 //RX_FDEQ_BIN_11 +232 0x0000 //RX_FDEQ_BIN_12 +233 0x0000 //RX_FDEQ_BIN_13 +234 0x0000 //RX_FDEQ_BIN_14 +235 0x0000 //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x0000 //RX_FDEQ_RESRV_0 +245 0x0000 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0030 //RX_FDDRC_BAND_MARGIN_1 +248 0x0050 //RX_FDDRC_BAND_MARGIN_2 +249 0x0080 //RX_FDDRC_BAND_MARGIN_3 +250 0x0004 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x5000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x6400 //RX_FDDRC_THRD_3_2 +258 0x6400 //RX_FDDRC_THRD_3_3 +259 0x2000 //RX_FDDRC_SLANT_0_0 +260 0x2000 //RX_FDDRC_SLANT_0_1 +261 0x2000 //RX_FDDRC_SLANT_0_2 +262 0x2000 //RX_FDDRC_SLANT_0_3 +263 0x2000 //RX_FDDRC_SLANT_1_0 +264 0x2000 //RX_FDDRC_SLANT_1_1 +265 0x2000 //RX_FDDRC_SLANT_1_2 +266 0x2000 //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +286 0x0100 //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 +#VOL 2 +163 0x3000 //RX_TDDRC_ALPHA_UP_1 +164 0x3000 //RX_TDDRC_ALPHA_UP_2 +165 0x3000 //RX_TDDRC_ALPHA_UP_3 +166 0x3000 //RX_TDDRC_ALPHA_UP_4 +184 0x7FB0 //RX_TDDRC_ALPHA_DWN_1 +185 0x7FB0 //RX_TDDRC_ALPHA_DWN_2 +186 0x7FB0 //RX_TDDRC_ALPHA_DWN_3 +189 0x7FB0 //RX_TDDRC_ALPHA_DWN_4 +190 0xDA9E //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +269 0x0000 //RX_TDDRC_THRD_0 +270 0x0000 //RX_TDDRC_THRD_1 +271 0x0E80 //RX_TDDRC_THRD_2 +272 0x3800 //RX_TDDRC_THRD_3 +273 0x2A00 //RX_TDDRC_SLANT_0 +274 0x6E00 //RX_TDDRC_SLANT_1 +275 0x3000 //RX_TDDRC_ALPHA_UP_0 +276 0x7FB0 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x0000 //RX_TDDRC_HMNC_GAIN +279 0x0000 //RX_TDDRC_SMT_FLAG +280 0x0000 //RX_TDDRC_SMT_W +281 0x0100 //RX_TDDRC_DRC_GAIN +195 0x0020 //RX_FDEQ_SUBNUM +196 0x4848 //RX_FDEQ_GAIN_0 +197 0x4848 //RX_FDEQ_GAIN_1 +198 0x4848 //RX_FDEQ_GAIN_2 +199 0x4848 //RX_FDEQ_GAIN_3 +200 0x4848 //RX_FDEQ_GAIN_4 +201 0x4848 //RX_FDEQ_GAIN_5 +202 0x4848 //RX_FDEQ_GAIN_6 +203 0x4848 //RX_FDEQ_GAIN_7 +204 0x4848 //RX_FDEQ_GAIN_8 +205 0x4848 //RX_FDEQ_GAIN_9 +206 0x4848 //RX_FDEQ_GAIN_10 +207 0x4848 //RX_FDEQ_GAIN_11 +208 0x4848 //RX_FDEQ_GAIN_12 +209 0x4848 //RX_FDEQ_GAIN_13 +210 0x4848 //RX_FDEQ_GAIN_14 +211 0x4848 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0000 //RX_FDEQ_BIN_0 +221 0x0000 //RX_FDEQ_BIN_1 +222 0x0000 //RX_FDEQ_BIN_2 +223 0x0000 //RX_FDEQ_BIN_3 +224 0x0000 //RX_FDEQ_BIN_4 +225 0x0000 //RX_FDEQ_BIN_5 +226 0x0000 //RX_FDEQ_BIN_6 +227 0x0000 //RX_FDEQ_BIN_7 +228 0x0000 //RX_FDEQ_BIN_8 +229 0x0000 //RX_FDEQ_BIN_9 +230 0x0000 //RX_FDEQ_BIN_10 +231 0x0000 //RX_FDEQ_BIN_11 +232 0x0000 //RX_FDEQ_BIN_12 +233 0x0000 //RX_FDEQ_BIN_13 +234 0x0000 //RX_FDEQ_BIN_14 +235 0x0000 //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x0000 //RX_FDEQ_RESRV_0 +245 0x0000 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0030 //RX_FDDRC_BAND_MARGIN_1 +248 0x0050 //RX_FDDRC_BAND_MARGIN_2 +249 0x0080 //RX_FDDRC_BAND_MARGIN_3 +250 0x0004 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x5000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x6400 //RX_FDDRC_THRD_3_2 +258 0x6400 //RX_FDDRC_THRD_3_3 +259 0x2000 //RX_FDDRC_SLANT_0_0 +260 0x2000 //RX_FDDRC_SLANT_0_1 +261 0x2000 //RX_FDDRC_SLANT_0_2 +262 0x2000 //RX_FDDRC_SLANT_0_3 +263 0x2000 //RX_FDDRC_SLANT_1_0 +264 0x2000 //RX_FDDRC_SLANT_1_1 +265 0x2000 //RX_FDDRC_SLANT_1_2 +266 0x2000 //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +286 0x0100 //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 +#VOL 3 +163 0x3000 //RX_TDDRC_ALPHA_UP_1 +164 0x3000 //RX_TDDRC_ALPHA_UP_2 +165 0x3000 //RX_TDDRC_ALPHA_UP_3 +166 0x3000 //RX_TDDRC_ALPHA_UP_4 +184 0x7FB0 //RX_TDDRC_ALPHA_DWN_1 +185 0x7FB0 //RX_TDDRC_ALPHA_DWN_2 +186 0x7FB0 //RX_TDDRC_ALPHA_DWN_3 +189 0x7FB0 //RX_TDDRC_ALPHA_DWN_4 +190 0xDA9E //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +269 0x0000 //RX_TDDRC_THRD_0 +270 0x0000 //RX_TDDRC_THRD_1 +271 0x0E80 //RX_TDDRC_THRD_2 +272 0x3800 //RX_TDDRC_THRD_3 +273 0x2A00 //RX_TDDRC_SLANT_0 +274 0x6E00 //RX_TDDRC_SLANT_1 +275 0x3000 //RX_TDDRC_ALPHA_UP_0 +276 0x7FB0 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x0000 //RX_TDDRC_HMNC_GAIN +279 0x0000 //RX_TDDRC_SMT_FLAG +280 0x0000 //RX_TDDRC_SMT_W +281 0x0100 //RX_TDDRC_DRC_GAIN +195 0x0020 //RX_FDEQ_SUBNUM +196 0x4848 //RX_FDEQ_GAIN_0 +197 0x4848 //RX_FDEQ_GAIN_1 +198 0x4848 //RX_FDEQ_GAIN_2 +199 0x4848 //RX_FDEQ_GAIN_3 +200 0x4848 //RX_FDEQ_GAIN_4 +201 0x4848 //RX_FDEQ_GAIN_5 +202 0x4848 //RX_FDEQ_GAIN_6 +203 0x4848 //RX_FDEQ_GAIN_7 +204 0x4848 //RX_FDEQ_GAIN_8 +205 0x4848 //RX_FDEQ_GAIN_9 +206 0x4848 //RX_FDEQ_GAIN_10 +207 0x4848 //RX_FDEQ_GAIN_11 +208 0x4848 //RX_FDEQ_GAIN_12 +209 0x4848 //RX_FDEQ_GAIN_13 +210 0x4848 //RX_FDEQ_GAIN_14 +211 0x4848 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0000 //RX_FDEQ_BIN_0 +221 0x0000 //RX_FDEQ_BIN_1 +222 0x0000 //RX_FDEQ_BIN_2 +223 0x0000 //RX_FDEQ_BIN_3 +224 0x0000 //RX_FDEQ_BIN_4 +225 0x0000 //RX_FDEQ_BIN_5 +226 0x0000 //RX_FDEQ_BIN_6 +227 0x0000 //RX_FDEQ_BIN_7 +228 0x0000 //RX_FDEQ_BIN_8 +229 0x0000 //RX_FDEQ_BIN_9 +230 0x0000 //RX_FDEQ_BIN_10 +231 0x0000 //RX_FDEQ_BIN_11 +232 0x0000 //RX_FDEQ_BIN_12 +233 0x0000 //RX_FDEQ_BIN_13 +234 0x0000 //RX_FDEQ_BIN_14 +235 0x0000 //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x0000 //RX_FDEQ_RESRV_0 +245 0x0000 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0030 //RX_FDDRC_BAND_MARGIN_1 +248 0x0050 //RX_FDDRC_BAND_MARGIN_2 +249 0x0080 //RX_FDDRC_BAND_MARGIN_3 +250 0x0004 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x5000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x6400 //RX_FDDRC_THRD_3_2 +258 0x6400 //RX_FDDRC_THRD_3_3 +259 0x2000 //RX_FDDRC_SLANT_0_0 +260 0x2000 //RX_FDDRC_SLANT_0_1 +261 0x2000 //RX_FDDRC_SLANT_0_2 +262 0x2000 //RX_FDDRC_SLANT_0_3 +263 0x2000 //RX_FDDRC_SLANT_1_0 +264 0x2000 //RX_FDDRC_SLANT_1_1 +265 0x2000 //RX_FDDRC_SLANT_1_2 +266 0x2000 //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +286 0x0100 //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 +#VOL 4 +163 0x3000 //RX_TDDRC_ALPHA_UP_1 +164 0x3000 //RX_TDDRC_ALPHA_UP_2 +165 0x3000 //RX_TDDRC_ALPHA_UP_3 +166 0x3000 //RX_TDDRC_ALPHA_UP_4 +184 0x7FB0 //RX_TDDRC_ALPHA_DWN_1 +185 0x7FB0 //RX_TDDRC_ALPHA_DWN_2 +186 0x7FB0 //RX_TDDRC_ALPHA_DWN_3 +189 0x7FB0 //RX_TDDRC_ALPHA_DWN_4 +190 0xDA9E //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +269 0x0000 //RX_TDDRC_THRD_0 +270 0x0000 //RX_TDDRC_THRD_1 +271 0x0E80 //RX_TDDRC_THRD_2 +272 0x3800 //RX_TDDRC_THRD_3 +273 0x2A00 //RX_TDDRC_SLANT_0 +274 0x6E00 //RX_TDDRC_SLANT_1 +275 0x3000 //RX_TDDRC_ALPHA_UP_0 +276 0x7FB0 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x0000 //RX_TDDRC_HMNC_GAIN +279 0x0000 //RX_TDDRC_SMT_FLAG +280 0x0000 //RX_TDDRC_SMT_W +281 0x0100 //RX_TDDRC_DRC_GAIN +195 0x0020 //RX_FDEQ_SUBNUM +196 0x4848 //RX_FDEQ_GAIN_0 +197 0x4848 //RX_FDEQ_GAIN_1 +198 0x4848 //RX_FDEQ_GAIN_2 +199 0x4848 //RX_FDEQ_GAIN_3 +200 0x4848 //RX_FDEQ_GAIN_4 +201 0x4848 //RX_FDEQ_GAIN_5 +202 0x4848 //RX_FDEQ_GAIN_6 +203 0x4848 //RX_FDEQ_GAIN_7 +204 0x4848 //RX_FDEQ_GAIN_8 +205 0x4848 //RX_FDEQ_GAIN_9 +206 0x4848 //RX_FDEQ_GAIN_10 +207 0x4848 //RX_FDEQ_GAIN_11 +208 0x4848 //RX_FDEQ_GAIN_12 +209 0x4848 //RX_FDEQ_GAIN_13 +210 0x4848 //RX_FDEQ_GAIN_14 +211 0x4848 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0000 //RX_FDEQ_BIN_0 +221 0x0000 //RX_FDEQ_BIN_1 +222 0x0000 //RX_FDEQ_BIN_2 +223 0x0000 //RX_FDEQ_BIN_3 +224 0x0000 //RX_FDEQ_BIN_4 +225 0x0000 //RX_FDEQ_BIN_5 +226 0x0000 //RX_FDEQ_BIN_6 +227 0x0000 //RX_FDEQ_BIN_7 +228 0x0000 //RX_FDEQ_BIN_8 +229 0x0000 //RX_FDEQ_BIN_9 +230 0x0000 //RX_FDEQ_BIN_10 +231 0x0000 //RX_FDEQ_BIN_11 +232 0x0000 //RX_FDEQ_BIN_12 +233 0x0000 //RX_FDEQ_BIN_13 +234 0x0000 //RX_FDEQ_BIN_14 +235 0x0000 //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x0000 //RX_FDEQ_RESRV_0 +245 0x0000 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0030 //RX_FDDRC_BAND_MARGIN_1 +248 0x0050 //RX_FDDRC_BAND_MARGIN_2 +249 0x0080 //RX_FDDRC_BAND_MARGIN_3 +250 0x0004 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x5000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x6400 //RX_FDDRC_THRD_3_2 +258 0x6400 //RX_FDDRC_THRD_3_3 +259 0x2000 //RX_FDDRC_SLANT_0_0 +260 0x2000 //RX_FDDRC_SLANT_0_1 +261 0x2000 //RX_FDDRC_SLANT_0_2 +262 0x2000 //RX_FDDRC_SLANT_0_3 +263 0x2000 //RX_FDDRC_SLANT_1_0 +264 0x2000 //RX_FDDRC_SLANT_1_1 +265 0x2000 //RX_FDDRC_SLANT_1_2 +266 0x2000 //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +286 0x0100 //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 +#VOL 5 +163 0x3000 //RX_TDDRC_ALPHA_UP_1 +164 0x3000 //RX_TDDRC_ALPHA_UP_2 +165 0x3000 //RX_TDDRC_ALPHA_UP_3 +166 0x3000 //RX_TDDRC_ALPHA_UP_4 +184 0x7FB0 //RX_TDDRC_ALPHA_DWN_1 +185 0x7FB0 //RX_TDDRC_ALPHA_DWN_2 +186 0x7FB0 //RX_TDDRC_ALPHA_DWN_3 +189 0x7FB0 //RX_TDDRC_ALPHA_DWN_4 +190 0xDA9E //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +269 0x0000 //RX_TDDRC_THRD_0 +270 0x0000 //RX_TDDRC_THRD_1 +271 0x0E80 //RX_TDDRC_THRD_2 +272 0x3800 //RX_TDDRC_THRD_3 +273 0x2A00 //RX_TDDRC_SLANT_0 +274 0x6E00 //RX_TDDRC_SLANT_1 +275 0x3000 //RX_TDDRC_ALPHA_UP_0 +276 0x7FB0 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x0000 //RX_TDDRC_HMNC_GAIN +279 0x0000 //RX_TDDRC_SMT_FLAG +280 0x0000 //RX_TDDRC_SMT_W +281 0x0100 //RX_TDDRC_DRC_GAIN +195 0x0020 //RX_FDEQ_SUBNUM +196 0x4848 //RX_FDEQ_GAIN_0 +197 0x4848 //RX_FDEQ_GAIN_1 +198 0x4848 //RX_FDEQ_GAIN_2 +199 0x4848 //RX_FDEQ_GAIN_3 +200 0x4848 //RX_FDEQ_GAIN_4 +201 0x4848 //RX_FDEQ_GAIN_5 +202 0x4848 //RX_FDEQ_GAIN_6 +203 0x4848 //RX_FDEQ_GAIN_7 +204 0x4848 //RX_FDEQ_GAIN_8 +205 0x4848 //RX_FDEQ_GAIN_9 +206 0x4848 //RX_FDEQ_GAIN_10 +207 0x4848 //RX_FDEQ_GAIN_11 +208 0x4848 //RX_FDEQ_GAIN_12 +209 0x4848 //RX_FDEQ_GAIN_13 +210 0x4848 //RX_FDEQ_GAIN_14 +211 0x4848 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0000 //RX_FDEQ_BIN_0 +221 0x0000 //RX_FDEQ_BIN_1 +222 0x0000 //RX_FDEQ_BIN_2 +223 0x0000 //RX_FDEQ_BIN_3 +224 0x0000 //RX_FDEQ_BIN_4 +225 0x0000 //RX_FDEQ_BIN_5 +226 0x0000 //RX_FDEQ_BIN_6 +227 0x0000 //RX_FDEQ_BIN_7 +228 0x0000 //RX_FDEQ_BIN_8 +229 0x0000 //RX_FDEQ_BIN_9 +230 0x0000 //RX_FDEQ_BIN_10 +231 0x0000 //RX_FDEQ_BIN_11 +232 0x0000 //RX_FDEQ_BIN_12 +233 0x0000 //RX_FDEQ_BIN_13 +234 0x0000 //RX_FDEQ_BIN_14 +235 0x0000 //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x0000 //RX_FDEQ_RESRV_0 +245 0x0000 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0030 //RX_FDDRC_BAND_MARGIN_1 +248 0x0050 //RX_FDDRC_BAND_MARGIN_2 +249 0x0080 //RX_FDDRC_BAND_MARGIN_3 +250 0x0004 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x5000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x6400 //RX_FDDRC_THRD_3_2 +258 0x6400 //RX_FDDRC_THRD_3_3 +259 0x2000 //RX_FDDRC_SLANT_0_0 +260 0x2000 //RX_FDDRC_SLANT_0_1 +261 0x2000 //RX_FDDRC_SLANT_0_2 +262 0x2000 //RX_FDDRC_SLANT_0_3 +263 0x2000 //RX_FDDRC_SLANT_1_0 +264 0x2000 //RX_FDDRC_SLANT_1_1 +265 0x2000 //RX_FDDRC_SLANT_1_2 +266 0x2000 //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +286 0x0100 //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 +#VOL 6 +163 0x3000 //RX_TDDRC_ALPHA_UP_1 +164 0x3000 //RX_TDDRC_ALPHA_UP_2 +165 0x3000 //RX_TDDRC_ALPHA_UP_3 +166 0x3000 //RX_TDDRC_ALPHA_UP_4 +184 0x7FB0 //RX_TDDRC_ALPHA_DWN_1 +185 0x7FB0 //RX_TDDRC_ALPHA_DWN_2 +186 0x7FB0 //RX_TDDRC_ALPHA_DWN_3 +189 0x7FB0 //RX_TDDRC_ALPHA_DWN_4 +190 0xDA9E //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +269 0x0000 //RX_TDDRC_THRD_0 +270 0x0000 //RX_TDDRC_THRD_1 +271 0x0E80 //RX_TDDRC_THRD_2 +272 0x3800 //RX_TDDRC_THRD_3 +273 0x2A00 //RX_TDDRC_SLANT_0 +274 0x6E00 //RX_TDDRC_SLANT_1 +275 0x3000 //RX_TDDRC_ALPHA_UP_0 +276 0x7FB0 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x0000 //RX_TDDRC_HMNC_GAIN +279 0x0000 //RX_TDDRC_SMT_FLAG +280 0x0000 //RX_TDDRC_SMT_W +281 0x0100 //RX_TDDRC_DRC_GAIN +195 0x0020 //RX_FDEQ_SUBNUM +196 0x4848 //RX_FDEQ_GAIN_0 +197 0x4848 //RX_FDEQ_GAIN_1 +198 0x4848 //RX_FDEQ_GAIN_2 +199 0x4848 //RX_FDEQ_GAIN_3 +200 0x4848 //RX_FDEQ_GAIN_4 +201 0x4848 //RX_FDEQ_GAIN_5 +202 0x4848 //RX_FDEQ_GAIN_6 +203 0x4848 //RX_FDEQ_GAIN_7 +204 0x4848 //RX_FDEQ_GAIN_8 +205 0x4848 //RX_FDEQ_GAIN_9 +206 0x4848 //RX_FDEQ_GAIN_10 +207 0x4848 //RX_FDEQ_GAIN_11 +208 0x4848 //RX_FDEQ_GAIN_12 +209 0x4848 //RX_FDEQ_GAIN_13 +210 0x4848 //RX_FDEQ_GAIN_14 +211 0x4848 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0000 //RX_FDEQ_BIN_0 +221 0x0000 //RX_FDEQ_BIN_1 +222 0x0000 //RX_FDEQ_BIN_2 +223 0x0000 //RX_FDEQ_BIN_3 +224 0x0000 //RX_FDEQ_BIN_4 +225 0x0000 //RX_FDEQ_BIN_5 +226 0x0000 //RX_FDEQ_BIN_6 +227 0x0000 //RX_FDEQ_BIN_7 +228 0x0000 //RX_FDEQ_BIN_8 +229 0x0000 //RX_FDEQ_BIN_9 +230 0x0000 //RX_FDEQ_BIN_10 +231 0x0000 //RX_FDEQ_BIN_11 +232 0x0000 //RX_FDEQ_BIN_12 +233 0x0000 //RX_FDEQ_BIN_13 +234 0x0000 //RX_FDEQ_BIN_14 +235 0x0000 //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x0000 //RX_FDEQ_RESRV_0 +245 0x0000 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0030 //RX_FDDRC_BAND_MARGIN_1 +248 0x0050 //RX_FDDRC_BAND_MARGIN_2 +249 0x0080 //RX_FDDRC_BAND_MARGIN_3 +250 0x0004 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x5000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x6400 //RX_FDDRC_THRD_3_2 +258 0x6400 //RX_FDDRC_THRD_3_3 +259 0x2000 //RX_FDDRC_SLANT_0_0 +260 0x2000 //RX_FDDRC_SLANT_0_1 +261 0x2000 //RX_FDDRC_SLANT_0_2 +262 0x2000 //RX_FDDRC_SLANT_0_3 +263 0x2000 //RX_FDDRC_SLANT_1_0 +264 0x2000 //RX_FDDRC_SLANT_1_1 +265 0x2000 //RX_FDDRC_SLANT_1_2 +266 0x2000 //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +286 0x0100 //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 #CASE_NAME HEADSET-TTY_VCO-VOICE_GENERIC-FB -#PARAM_MODE FULL -#PARAM_TYPE TX+RX -#TOTAL_CUSTOM_STEP 7 +#PARAM_MODE Full +#PARAM_TYPE TX+2RX +#TOTAL_CUSTOM_STEP 7+7 #TX 0 0x0001 //TX_OPERATION_MODE_0 1 0x0001 //TX_OPERATION_MODE_1 2 0x0033 //TX_PATCH_REG -3 0x4B7C //TX_SENDFUNC_MODE_0 +3 0x6B7C //TX_SENDFUNC_MODE_0 4 0x0001 //TX_SENDFUNC_MODE_1 -5 0x0003 //TX_NUM_MIC +5 0x0002 //TX_NUM_MIC 6 0x0004 //TX_SAMPLINGFREQ_SIG 7 0x0004 //TX_SAMPLINGFREQ_PROC 8 0x000A //TX_FRAME_SZ_SIG @@ -47387,15 +72119,15 @@ 18 0x0000 //TX_SYS_RESRV_2 19 0x0000 //TX_SYS_RESRV_3 20 0x0000 //TX_DIST2REF0 -21 0x00A4 //TX_DIST2REF1 -22 0x0017 //TX_DIST2REF_02 +21 0x009D //TX_DIST2REF1 +22 0x0010 //TX_DIST2REF_02 23 0x0000 //TX_DIST2REF_03 24 0x0000 //TX_DIST2REF_04 25 0x0000 //TX_DIST2REF_05 26 0x0000 //TX_MMIC -27 0x0FF7 //TX_PGA_0 -28 0x0FF7 //TX_PGA_1 -29 0x0FF7 //TX_PGA_2 +27 0x1000 //TX_PGA_0 +28 0x1000 //TX_PGA_1 +29 0x1000 //TX_PGA_2 30 0x0000 //TX_PGA_3 31 0x0000 //TX_PGA_4 32 0x0000 //TX_PGA_5 @@ -47531,7 +72263,7 @@ 162 0x7FFF //TX_MIN_EQ_RE_EST_10 163 0x7FFF //TX_MIN_EQ_RE_EST_11 164 0x7FFF //TX_MIN_EQ_RE_EST_12 -165 0x4000 //TX_LAMBDA_RE_EST +165 0x0700 //TX_LAMBDA_RE_EST 166 0x0CCD //TX_LAMBDA_CB_NLE 167 0x2000 //TX_C_POST_FLT 168 0x7FFF //TX_GAIN_NP @@ -47591,16 +72323,16 @@ 222 0x023E //TX_ADPT_STRICT_H 223 0x0BB8 //TX_RATIO_DT_L_TH_LOW 224 0x3A98 //TX_RATIO_DT_H_TH_LOW -225 0x1770 //TX_RATIO_DT_L_TH_HIGH +225 0x1194 //TX_RATIO_DT_L_TH_HIGH 226 0x4E20 //TX_RATIO_DT_H_TH_HIGH 227 0x09C4 //TX_RATIO_DT_L0_TH -228 0x2000 //TX_B_POST_FILT_ECHO_L +228 0x7FFF //TX_B_POST_FILT_ECHO_L 229 0x2000 //TX_B_POST_FILT_ECHO_H 230 0x0200 //TX_MIN_G_CTRL_ECHO 231 0x1000 //TX_B_LESSCUT_RTO_ECHO -232 0x0000 //TX_EPD_OFFSET_00 +232 0x0063 //TX_EPD_OFFSET_00 233 0x0000 //TX_EPD_OFFST_01 -234 0x1388 //TX_RATIO_DT_L0_TH_HIGH +234 0x0A28 //TX_RATIO_DT_L0_TH_HIGH 235 0x3A98 //TX_RATIO_DT_H_TH_CUT 236 0x7FFF //TX_MIN_EQ_RE_EST_13 237 0x0000 //TX_DTD_THR1_7 @@ -47608,7 +72340,7 @@ 239 0x0800 //TX_DT_RESRV_7 240 0x0800 //TX_DT_RESRV_8 241 0x0000 //TX_DT_RESRV_9 -242 0xF800 //TX_THR_SN_EST_0 +242 0xF700 //TX_THR_SN_EST_0 243 0xFA00 //TX_THR_SN_EST_1 244 0xFA00 //TX_THR_SN_EST_2 245 0xFB00 //TX_THR_SN_EST_3 @@ -47617,11 +72349,11 @@ 248 0xF800 //TX_THR_SN_EST_6 249 0xF800 //TX_THR_SN_EST_7 250 0x0100 //TX_DELTA_THR_SN_EST_0 -251 0x0200 //TX_DELTA_THR_SN_EST_1 -252 0x0100 //TX_DELTA_THR_SN_EST_2 -253 0x0200 //TX_DELTA_THR_SN_EST_3 +251 0x0100 //TX_DELTA_THR_SN_EST_1 +252 0x0200 //TX_DELTA_THR_SN_EST_2 +253 0x0100 //TX_DELTA_THR_SN_EST_3 254 0x0100 //TX_DELTA_THR_SN_EST_4 -255 0x0100 //TX_DELTA_THR_SN_EST_5 +255 0x0200 //TX_DELTA_THR_SN_EST_5 256 0x0200 //TX_DELTA_THR_SN_EST_6 257 0x0200 //TX_DELTA_THR_SN_EST_7 258 0x4000 //TX_LAMBDA_NN_EST_0 @@ -47649,11 +72381,11 @@ 280 0x1000 //TX_B_POST_FLT_1 281 0x0010 //TX_NS_LVL_CTRL_0 282 0x0014 //TX_NS_LVL_CTRL_1 -283 0x0014 //TX_NS_LVL_CTRL_2 -284 0x0018 //TX_NS_LVL_CTRL_3 -285 0x0016 //TX_NS_LVL_CTRL_4 -286 0x0014 //TX_NS_LVL_CTRL_5 -287 0x0011 //TX_NS_LVL_CTRL_6 +283 0x0018 //TX_NS_LVL_CTRL_2 +284 0x0016 //TX_NS_LVL_CTRL_3 +285 0x0014 //TX_NS_LVL_CTRL_4 +286 0x0011 //TX_NS_LVL_CTRL_5 +287 0x0014 //TX_NS_LVL_CTRL_6 288 0x0011 //TX_NS_LVL_CTRL_7 289 0x000F //TX_MIN_GAIN_S_0 290 0x0010 //TX_MIN_GAIN_S_1 @@ -47671,8 +72403,8 @@ 302 0x4000 //TX_SNRI_SUP_2 303 0x4000 //TX_SNRI_SUP_3 304 0x4000 //TX_SNRI_SUP_4 -305 0x4000 //TX_SNRI_SUP_5 -306 0x50C0 //TX_SNRI_SUP_6 +305 0x50C0 //TX_SNRI_SUP_5 +306 0x4000 //TX_SNRI_SUP_6 307 0x7FFF //TX_SNRI_SUP_7 308 0x7FFF //TX_THR_LFNS 309 0x0018 //TX_G_LFNS @@ -47681,19 +72413,19 @@ 312 0x7FFF //TX_A_POST_FILT_0 313 0x2000 //TX_A_POST_FILT_1 314 0x5000 //TX_A_POST_FILT_S_0 -315 0x6000 //TX_A_POST_FILT_S_1 -316 0x4C00 //TX_A_POST_FILT_S_2 -317 0x4000 //TX_A_POST_FILT_S_3 -318 0x6000 //TX_A_POST_FILT_S_4 -319 0x4000 //TX_A_POST_FILT_S_5 -320 0x5000 //TX_A_POST_FILT_S_6 +315 0x4C00 //TX_A_POST_FILT_S_1 +316 0x4000 //TX_A_POST_FILT_S_2 +317 0x6000 //TX_A_POST_FILT_S_3 +318 0x4000 //TX_A_POST_FILT_S_4 +319 0x5000 //TX_A_POST_FILT_S_5 +320 0x6000 //TX_A_POST_FILT_S_6 321 0x7000 //TX_A_POST_FILT_S_7 322 0x2000 //TX_B_POST_FILT_0 -323 0x1000 //TX_B_POST_FILT_1 +323 0x2000 //TX_B_POST_FILT_1 324 0x2000 //TX_B_POST_FILT_2 -325 0x2000 //TX_B_POST_FILT_3 +325 0x4000 //TX_B_POST_FILT_3 326 0x4000 //TX_B_POST_FILT_4 -327 0x4000 //TX_B_POST_FILT_5 +327 0x1000 //TX_B_POST_FILT_5 328 0x1000 //TX_B_POST_FILT_6 329 0x2000 //TX_B_POST_FILT_7 330 0x4000 //TX_B_LESSCUT_RTO_S_0 @@ -47701,26 +72433,26 @@ 332 0x7FFF //TX_B_LESSCUT_RTO_S_2 333 0x7FFF //TX_B_LESSCUT_RTO_S_3 334 0x7FFF //TX_B_LESSCUT_RTO_S_4 -335 0x7FFF //TX_B_LESSCUT_RTO_S_5 -336 0x6000 //TX_B_LESSCUT_RTO_S_6 +335 0x6000 //TX_B_LESSCUT_RTO_S_5 +336 0x7FFF //TX_B_LESSCUT_RTO_S_6 337 0x7FFF //TX_B_LESSCUT_RTO_S_7 338 0x7C00 //TX_LAMBDA_PFILT 339 0x7C00 //TX_LAMBDA_PFILT_S_0 340 0x7C00 //TX_LAMBDA_PFILT_S_1 -341 0x7C00 //TX_LAMBDA_PFILT_S_2 -342 0x7A00 //TX_LAMBDA_PFILT_S_3 +341 0x7A00 //TX_LAMBDA_PFILT_S_2 +342 0x7C00 //TX_LAMBDA_PFILT_S_3 343 0x7C00 //TX_LAMBDA_PFILT_S_4 344 0x7C00 //TX_LAMBDA_PFILT_S_5 345 0x7C00 //TX_LAMBDA_PFILT_S_6 346 0x7C00 //TX_LAMBDA_PFILT_S_7 -347 0x0000 //TX_K_PEPPER +347 0x0180 //TX_K_PEPPER 348 0x0800 //TX_A_PEPPER 349 0x1EAA //TX_K_PEPPER_HF 350 0x0600 //TX_A_PEPPER_HF 351 0x0001 //TX_HMNC_BST_FLG 352 0x0200 //TX_HMNC_BST_THR -353 0x0200 //TX_DT_BINVAD_TH_0 -354 0x0200 //TX_DT_BINVAD_TH_1 +353 0x2000 //TX_DT_BINVAD_TH_0 +354 0x0800 //TX_DT_BINVAD_TH_1 355 0x0200 //TX_DT_BINVAD_TH_2 356 0x0200 //TX_DT_BINVAD_TH_3 357 0x1F40 //TX_DT_BINVAD_ENDF @@ -47733,7 +72465,7 @@ 364 0x0000 //TX_K_APT 365 0x0001 //TX_NOISEDET 366 0x0064 //TX_NDETCT -367 0x0050 //TX_NOISE_TH_0 +367 0x04E8 //TX_NOISE_TH_0 368 0x7FFF //TX_NOISE_TH_0_2 369 0x7FFF //TX_NOISE_TH_0_3 370 0x07D0 //TX_NOISE_TH_1 @@ -47745,11 +72477,11 @@ 376 0x0000 //TX_NOISE_TH_5_3 377 0x7FFF //TX_NOISE_TH_5_4 378 0x2710 //TX_NOISE_TH_6 -379 0x0033 //TX_MINENOISE_TH -380 0x4000 //TX_MINENOISE_MIC0_TH_MTS -381 0xFFEE //TX_MINENOISE_MIC0_TH_EXP -382 0x6000 //TX_MINENOISE_MIC0_S_TH_MTS -383 0xFFF3 //TX_MINENOISE_MIC0_S_TH_EXP +379 0x02BC //TX_MINENOISE_TH +380 0xD508 //TX_MORENS_TFMASK_TH +381 0x0001 //TX_DRC_QUIET_FLOOR +382 0x3A98 //TX_RATIODTL_CUT_TH +383 0x1482 //TX_DT_CUT_K1 384 0x0666 //TX_OUT_ENER_S_TH_CLEAN 385 0x0666 //TX_OUT_ENER_S_TH_LESSCLEAN 386 0x0333 //TX_OUT_ENER_S_TH_NOISY @@ -47757,22 +72489,22 @@ 388 0x0333 //TX_OUT_ENER_TH_SPEECH 389 0x2000 //TX_SN_NPB_GAIN 390 0x0000 //TX_NN_NPB_GAIN -391 0x0000 //TX_CSX_ALPHA_0 -392 0x0000 //TX_CSX_ALPHA_1 -393 0x0000 //TX_CSX_ALPHA_2 -394 0x0000 //TX_CSX_ALPHA_3 -395 0x0800 //TX_MU_ARSP_EST -396 0x00C8 //TX_P_OUTBEAM_MIN_TH +391 0x7FFF //TX_POST_MASK_SUP_HSNE +392 0x1388 //TX_TAIL_DET_TH +393 0x4000 //TX_B_LESSCUT_RTO_WTA +394 0x0000 //TX_MEL_G_R +395 0x0080 //TX_SUPHIGH_TH +396 0x0000 //TX_MASK_G_R 397 0x0002 //TX_EXTRA_NS_L -398 0x0800 //TX_EXTRA_NS_A -399 0x0005 //TX_VR_NOISE_FLOOR_TH +398 0x1800 //TX_C_POST_FLT_MASK +399 0x7FFF //TX_A_POST_FLT_WNS 400 0x0148 //TX_MIN_G_LOW300HZ -401 0x0002 //TX_MAXLEVEL_CNG +401 0x0004 //TX_MAXLEVEL_CNG 402 0x00B4 //TX_STN_NOISE_TH 403 0x4000 //TX_POST_MASK_SUP 404 0x7FFF //TX_POST_MASK_ADJUST 405 0x00C8 //TX_NS_ENOISE_MIC0_TH -406 0x0033 //TX_MINENOISE_MIC0_TH +406 0x04E7 //TX_MINENOISE_MIC0_TH 407 0x012C //TX_MINENOISE_MIC0_S_TH 408 0x7FFF //TX_MIN_G_CTRL_SSNS 409 0x0000 //TX_METAL_RTO_THR @@ -47880,16 +72612,16 @@ 511 0x6666 //TX_MIC_TO_BFGAIN 512 0x0000 //TX_MICTOBFGAIN0 513 0x0000 //TX_FASTMUE_TH -514 0x0000 //TX_DERVB_LEN_0 -515 0x0000 //TX_DERVB_LEN_1 -516 0x0000 //TX_RHO_DERVB -517 0x0000 //TX_MIC_INDX_DERVB -518 0x0000 //TX_MU_DERVB -519 0x0000 //TX_DR_RESRV_0 -520 0x0000 //TX_DR_RESRV_1 -521 0x0000 //TX_DR_RESRV_2 -522 0x0000 //TX_DR_RESRV_3 -523 0x0000 //TX_DR_RESRV_4 +514 0xC000 //TX_DEREVERB_LF_MU +515 0xC000 //TX_DEREVERB_HF_MU +516 0xCCCC //TX_DEREVERB_DELAY +517 0xD999 //TX_DEREVERB_COEF_LEN +518 0x1F40 //TX_DEREVERB_DNR +519 0x0000 //TX_DEREVERB_ALPHA +520 0x0000 //TX_DEREVERB_BETA +521 0x0000 //TX_GSC_RTOL_TH +522 0x7000 //TX_GSC_RTOH_TH +523 0x0064 //TX_WIDE2_MEANHTH 524 0x0000 //TX_DR_RESRV_5 525 0x0000 //TX_DR_RESRV_6 526 0x0000 //TX_DR_RESRV_7 @@ -47936,19 +72668,19 @@ 567 0x4848 //TX_FDEQ_GAIN_0 568 0x4848 //TX_FDEQ_GAIN_1 569 0x4848 //TX_FDEQ_GAIN_2 -570 0x4848 //TX_FDEQ_GAIN_3 -571 0x4848 //TX_FDEQ_GAIN_4 -572 0x4848 //TX_FDEQ_GAIN_5 -573 0x4848 //TX_FDEQ_GAIN_6 -574 0x4848 //TX_FDEQ_GAIN_7 -575 0x4848 //TX_FDEQ_GAIN_8 -576 0x4853 //TX_FDEQ_GAIN_9 -577 0x5450 //TX_FDEQ_GAIN_10 -578 0x7465 //TX_FDEQ_GAIN_11 -579 0x807F //TX_FDEQ_GAIN_12 -580 0x82C4 //TX_FDEQ_GAIN_13 -581 0xC4C4 //TX_FDEQ_GAIN_14 -582 0xC4C4 //TX_FDEQ_GAIN_15 +570 0x484C //TX_FDEQ_GAIN_3 +571 0x4C4C //TX_FDEQ_GAIN_4 +572 0x544C //TX_FDEQ_GAIN_5 +573 0x5454 //TX_FDEQ_GAIN_6 +574 0x5454 //TX_FDEQ_GAIN_7 +575 0x585A //TX_FDEQ_GAIN_8 +576 0x5C5C //TX_FDEQ_GAIN_9 +577 0x6068 //TX_FDEQ_GAIN_10 +578 0x8894 //TX_FDEQ_GAIN_11 +579 0x94B4 //TX_FDEQ_GAIN_12 +580 0xB4C7 //TX_FDEQ_GAIN_13 +581 0xC7C6 //TX_FDEQ_GAIN_14 +582 0xC6C6 //TX_FDEQ_GAIN_15 583 0x4848 //TX_FDEQ_GAIN_16 584 0x4848 //TX_FDEQ_GAIN_17 585 0x4848 //TX_FDEQ_GAIN_18 @@ -47982,24 +72714,24 @@ 613 0x0000 //TX_FDEQ_BIN_22 614 0x0000 //TX_FDEQ_BIN_23 615 0x0000 //TX_FDEQ_PADDING -616 0x0020 //TX_PREEQ_SUBNUM_MIC0 +616 0x0030 //TX_PREEQ_SUBNUM_MIC0 617 0x4848 //TX_PREEQ_GAIN_MIC0_0 618 0x4848 //TX_PREEQ_GAIN_MIC0_1 619 0x4848 //TX_PREEQ_GAIN_MIC0_2 620 0x4848 //TX_PREEQ_GAIN_MIC0_3 621 0x4848 //TX_PREEQ_GAIN_MIC0_4 622 0x4848 //TX_PREEQ_GAIN_MIC0_5 -623 0x4A4C //TX_PREEQ_GAIN_MIC0_6 -624 0x4E50 //TX_PREEQ_GAIN_MIC0_7 -625 0x5456 //TX_PREEQ_GAIN_MIC0_8 -626 0x585C //TX_PREEQ_GAIN_MIC0_9 -627 0x5C64 //TX_PREEQ_GAIN_MIC0_10 -628 0x7478 //TX_PREEQ_GAIN_MIC0_11 -629 0x705C //TX_PREEQ_GAIN_MIC0_12 -630 0x4838 //TX_PREEQ_GAIN_MIC0_13 -631 0x3C70 //TX_PREEQ_GAIN_MIC0_14 -632 0x4848 //TX_PREEQ_GAIN_MIC0_15 -633 0x4848 //TX_PREEQ_GAIN_MIC0_16 +623 0x4849 //TX_PREEQ_GAIN_MIC0_6 +624 0x4A4B //TX_PREEQ_GAIN_MIC0_7 +625 0x4C4B //TX_PREEQ_GAIN_MIC0_8 +626 0x4A48 //TX_PREEQ_GAIN_MIC0_9 +627 0x4B4C //TX_PREEQ_GAIN_MIC0_10 +628 0x4C4B //TX_PREEQ_GAIN_MIC0_11 +629 0x4838 //TX_PREEQ_GAIN_MIC0_12 +630 0x3858 //TX_PREEQ_GAIN_MIC0_13 +631 0x7060 //TX_PREEQ_GAIN_MIC0_14 +632 0x9870 //TX_PREEQ_GAIN_MIC0_15 +633 0x5848 //TX_PREEQ_GAIN_MIC0_16 634 0x4848 //TX_PREEQ_GAIN_MIC0_17 635 0x4848 //TX_PREEQ_GAIN_MIC0_18 636 0x4848 //TX_PREEQ_GAIN_MIC0_19 @@ -48013,17 +72745,17 @@ 644 0x0304 //TX_PREEQ_BIN_MIC0_3 645 0x0405 //TX_PREEQ_BIN_MIC0_4 646 0x0506 //TX_PREEQ_BIN_MIC0_5 -647 0x0708 //TX_PREEQ_BIN_MIC0_6 -648 0x0909 //TX_PREEQ_BIN_MIC0_7 -649 0x090B //TX_PREEQ_BIN_MIC0_8 +647 0x0808 //TX_PREEQ_BIN_MIC0_6 +648 0x0809 //TX_PREEQ_BIN_MIC0_7 +649 0x0A0A //TX_PREEQ_BIN_MIC0_8 650 0x0C10 //TX_PREEQ_BIN_MIC0_9 651 0x1013 //TX_PREEQ_BIN_MIC0_10 652 0x1414 //TX_PREEQ_BIN_MIC0_11 -653 0x1414 //TX_PREEQ_BIN_MIC0_12 -654 0x1C1E //TX_PREEQ_BIN_MIC0_13 -655 0x1E28 //TX_PREEQ_BIN_MIC0_14 -656 0x462C //TX_PREEQ_BIN_MIC0_15 -657 0x0000 //TX_PREEQ_BIN_MIC0_16 +653 0x261E //TX_PREEQ_BIN_MIC0_12 +654 0x1E14 //TX_PREEQ_BIN_MIC0_13 +655 0x1414 //TX_PREEQ_BIN_MIC0_14 +656 0x2814 //TX_PREEQ_BIN_MIC0_15 +657 0x4000 //TX_PREEQ_BIN_MIC0_16 658 0x0000 //TX_PREEQ_BIN_MIC0_17 659 0x0000 //TX_PREEQ_BIN_MIC0_18 660 0x0000 //TX_PREEQ_BIN_MIC0_19 @@ -48038,15 +72770,15 @@ 669 0x4848 //TX_PREEQ_GAIN_MIC1_3 670 0x4848 //TX_PREEQ_GAIN_MIC1_4 671 0x4848 //TX_PREEQ_GAIN_MIC1_5 -672 0x4848 //TX_PREEQ_GAIN_MIC1_6 -673 0x4848 //TX_PREEQ_GAIN_MIC1_7 -674 0x4848 //TX_PREEQ_GAIN_MIC1_8 -675 0x4848 //TX_PREEQ_GAIN_MIC1_9 -676 0x4848 //TX_PREEQ_GAIN_MIC1_10 -677 0x4848 //TX_PREEQ_GAIN_MIC1_11 -678 0x4848 //TX_PREEQ_GAIN_MIC1_12 -679 0x4848 //TX_PREEQ_GAIN_MIC1_13 -680 0x4848 //TX_PREEQ_GAIN_MIC1_14 +672 0x4645 //TX_PREEQ_GAIN_MIC1_6 +673 0x4442 //TX_PREEQ_GAIN_MIC1_7 +674 0x4140 //TX_PREEQ_GAIN_MIC1_8 +675 0x3E3D //TX_PREEQ_GAIN_MIC1_9 +676 0x3C3C //TX_PREEQ_GAIN_MIC1_10 +677 0x3C3C //TX_PREEQ_GAIN_MIC1_11 +678 0x3938 //TX_PREEQ_GAIN_MIC1_12 +679 0x3A3C //TX_PREEQ_GAIN_MIC1_13 +680 0x3C3E //TX_PREEQ_GAIN_MIC1_14 681 0x4848 //TX_PREEQ_GAIN_MIC1_15 682 0x4848 //TX_PREEQ_GAIN_MIC1_16 683 0x4848 //TX_PREEQ_GAIN_MIC1_17 @@ -48056,23 +72788,23 @@ 687 0x4848 //TX_PREEQ_GAIN_MIC1_21 688 0x4848 //TX_PREEQ_GAIN_MIC1_22 689 0x4848 //TX_PREEQ_GAIN_MIC1_23 -690 0x1812 //TX_PREEQ_BIN_MIC1_0 -691 0x0A0A //TX_PREEQ_BIN_MIC1_1 -692 0x0808 //TX_PREEQ_BIN_MIC1_2 -693 0x080A //TX_PREEQ_BIN_MIC1_3 -694 0x0B09 //TX_PREEQ_BIN_MIC1_4 -695 0x0A06 //TX_PREEQ_BIN_MIC1_5 -696 0x0606 //TX_PREEQ_BIN_MIC1_6 -697 0x0605 //TX_PREEQ_BIN_MIC1_7 -698 0x050A //TX_PREEQ_BIN_MIC1_8 -699 0x1505 //TX_PREEQ_BIN_MIC1_9 -700 0x0506 //TX_PREEQ_BIN_MIC1_10 -701 0x0615 //TX_PREEQ_BIN_MIC1_11 -702 0x1516 //TX_PREEQ_BIN_MIC1_12 -703 0x2021 //TX_PREEQ_BIN_MIC1_13 -704 0x2021 //TX_PREEQ_BIN_MIC1_14 -705 0x2021 //TX_PREEQ_BIN_MIC1_15 -706 0x0800 //TX_PREEQ_BIN_MIC1_16 +690 0x0202 //TX_PREEQ_BIN_MIC1_0 +691 0x0203 //TX_PREEQ_BIN_MIC1_1 +692 0x0303 //TX_PREEQ_BIN_MIC1_2 +693 0x0304 //TX_PREEQ_BIN_MIC1_3 +694 0x0405 //TX_PREEQ_BIN_MIC1_4 +695 0x0506 //TX_PREEQ_BIN_MIC1_5 +696 0x0808 //TX_PREEQ_BIN_MIC1_6 +697 0x0809 //TX_PREEQ_BIN_MIC1_7 +698 0x0A0A //TX_PREEQ_BIN_MIC1_8 +699 0x0C10 //TX_PREEQ_BIN_MIC1_9 +700 0x1013 //TX_PREEQ_BIN_MIC1_10 +701 0x1414 //TX_PREEQ_BIN_MIC1_11 +702 0x261E //TX_PREEQ_BIN_MIC1_12 +703 0x1E14 //TX_PREEQ_BIN_MIC1_13 +704 0x1414 //TX_PREEQ_BIN_MIC1_14 +705 0x2814 //TX_PREEQ_BIN_MIC1_15 +706 0x4000 //TX_PREEQ_BIN_MIC1_16 707 0x0000 //TX_PREEQ_BIN_MIC1_17 708 0x0000 //TX_PREEQ_BIN_MIC1_18 709 0x0000 //TX_PREEQ_BIN_MIC1_19 @@ -48157,7 +72889,7 @@ 788 0x7EB8 //TX_TDDRC_ALPHA_DWN_02 789 0x7EB8 //TX_TDDRC_ALPHA_DWN_03 790 0x7EB8 //TX_TDDRC_ALPHA_DWN_04 -791 0x7FFF //TX_TDDRC_TD_DRC_LIMIT +791 0x7214 //TX_TDDRC_TD_DRC_LIMIT 792 0x0800 //TX_TDDRC_POST_LIMIT_GAIN 793 0x0000 //TX_TDDRC_RESRV_0 794 0x0000 //TX_TDDRC_RESRV_1 @@ -48219,20 +72951,20 @@ 850 0x0000 //TX_FFP_RESRV_4 851 0x0000 //TX_FFP_RESRV_5 852 0x0000 //TX_FFP_RESRV_6 -853 0x0004 //TX_FILTINDX +853 0x0002 //TX_FILTINDX 854 0x0004 //TX_TDDRC_THRD_0 855 0x0016 //TX_TDDRC_THRD_1 -856 0x1900 //TX_TDDRC_THRD_2 -857 0x1900 //TX_TDDRC_THRD_3 -858 0x3000 //TX_TDDRC_SLANT_0 -859 0x7B00 //TX_TDDRC_SLANT_1 +856 0x1800 //TX_TDDRC_THRD_2 +857 0x1800 //TX_TDDRC_THRD_3 +858 0x7FFF //TX_TDDRC_SLANT_0 +859 0x7FFF //TX_TDDRC_SLANT_1 860 0x0C00 //TX_TDDRC_ALPHA_UP_00 861 0x7EB8 //TX_TDDRC_ALPHA_DWN_00 862 0x0000 //TX_TDDRC_HMNC_FLAG 863 0x199A //TX_TDDRC_HMNC_GAIN 864 0x0000 //TX_TDDRC_SMT_FLAG 865 0x0CCD //TX_TDDRC_SMT_W -866 0x0A98 //TX_TDDRC_DRC_GAIN +866 0x0B39 //TX_TDDRC_DRC_GAIN 867 0x7FFF //TX_TDDRC_LMT_THRD 868 0x0000 //TX_TDDRC_LMT_ALPHA 869 0x0000 //TX_TFMASKLTH @@ -48257,14 +72989,79 @@ 888 0x0028 //TX_FASTNS_ARSPC_TH 889 0xC000 //TX_FASTNS_MASK5_TH 890 0x4848 //TX_POSTSSA_MIN_G_VR_MASK -891 0x1000 //TX_A_LESSCUT_RTO_MASK +891 0x7000 //TX_A_LESSCUT_RTO_MASK 892 0x1770 //TX_FASTNS_NOISETH 893 0xC000 //TX_FASTNS_SSA_THLFL 894 0xC000 //TX_FASTNS_SSA_THHFL 895 0xCCCC //TX_FASTNS_SSA_THLFH 896 0xD999 //TX_FASTNS_SSA_THHFH +897 0x2339 //TX_SENDFUNC_REG_MICMUTE +898 0x0021 //TX_SENDFUNC_REG_MICMUTE1 +899 0x02BC //TX_MICMUTE_RATIO_THR +900 0x0140 //TX_MICMUTE_AMP_THR +901 0x0004 //TX_MICMUTE_HPF_IND +902 0x00C0 //TX_MICMUTE_LOG_EYR_TH +903 0x0008 //TX_MICMUTE_CVG_TIME +904 0x0008 //TX_MICMUTE_RELEASE_TIME +905 0x01FE //TX_MIC_VOLUME_MIC0MUTE +906 0x0020 //TX_MICMUTE_EPD_OFFSET_0 +907 0x001E //TX_MICMUTE_FRQ_AEC_L +908 0x7999 //TX_MICMUTE_EAD_THR +909 0x7FFF //TX_MICMUTE_LAMBDA_CB_NLE +910 0x7FFF //TX_MICMUTE_LAMBDA_RE_EST +911 0x4000 //TX_DTD_THR1_MICMUTE_0 +912 0x7000 //TX_DTD_THR1_MICMUTE_1 +913 0x7FFF //TX_DTD_THR1_MICMUTE_2 +914 0x7FFF //TX_DTD_THR1_MICMUTE_3 +915 0x6CCC //TX_DTD_THR2_MICMUTE_0 +916 0x0400 //TX_MICMUTE_MIN_EQ_RE_EST_0 +917 0x0400 //TX_MICMUTE_MIN_EQ_RE_EST_1 +918 0x1000 //TX_MICMUTE_MIN_EQ_RE_EST_2 +919 0x7FFF //TX_MICMUTE_MIN_EQ_RE_EST_3 +920 0x7FFF //TX_MICMUTE_MIN_EQ_RE_EST_4 +921 0x4000 //TX_MICMUTE_C_POST_FLT +922 0x03E8 //TX_MICMUTE_DT_CUT_K +923 0x0001 //TX_MICMUTE_DT_CUT_THR +924 0x03E8 //TX_MICMUTE_DT_CUT_K2 +925 0x0001 //TX_MICMUTE_DT_CUT_THR2 +926 0x0064 //TX_MICMUTE_DT2_HOLD_N +927 0x1000 //TX_MICMUTE_RATIODTH_THCUT +928 0x1000 //TX_MICMUTE_B_POST_FLT_ECHOL +929 0x7FFF //TX_MICMUTE_B_POST_FLT_ECHOH +930 0x0400 //TX_MICMUTE_C_POST_FLT_MASK +931 0x7999 //TX_MICMUTE_RATIODTL_CUT_TH +932 0x0258 //TX_MICMUTE_DT_CUT_K1 +933 0x0800 //TX_MICMUTE_N2_SN_EST +934 0xFC00 //TX_MICMUTE_THR_SN_EST_0 +935 0x001C //TX_MICMUTE_MIN_G_CTRL_0 +936 0x6000 //TX_MICMUTE_A_POST_FILT_S_0 +937 0x7000 //TX_MICMUTE_B_POST_FILT_0 +938 0x2710 //TX_MIC1RUB_AMP_THR +939 0x0010 //TX_MIC1MUTE_RATIO_THR +940 0x0450 //TX_MIC1MUTE_AMP_THR +941 0x0008 //TX_MIC1MUTE_CVG_TIME +942 0x0008 //TX_MIC1MUTE_RELEASE_TIME +943 0x0000 //TX_AMS_RESRV_01 +944 0x0000 //TX_AMS_RESRV_02 +945 0x0000 //TX_AMS_RESRV_03 +946 0x0000 //TX_AMS_RESRV_04 +947 0x0000 //TX_AMS_RESRV_05 +948 0x0000 //TX_AMS_RESRV_06 +949 0x0000 //TX_AMS_RESRV_07 +950 0x0000 //TX_AMS_RESRV_08 +951 0x0000 //TX_AMS_RESRV_09 +952 0x0000 //TX_AMS_RESRV_10 +953 0x0000 //TX_AMS_RESRV_11 +954 0x0000 //TX_AMS_RESRV_12 +955 0x0000 //TX_AMS_RESRV_13 +956 0x0000 //TX_AMS_RESRV_14 +957 0x0000 //TX_AMS_RESRV_15 +958 0x0000 //TX_AMS_RESRV_16 +959 0x0000 //TX_AMS_RESRV_17 +960 0x0000 //TX_AMS_RESRV_18 +961 0x0000 //TX_AMS_RESRV_19 #RX -0 0x0040 //RX_RECVFUNC_MODE_0 +0 0x2040 //RX_RECVFUNC_MODE_0 1 0x0000 //RX_RECVFUNC_MODE_1 2 0x0000 //RX_SAMPLINGFREQ_SIG 3 0x0000 //RX_SAMPLINGFREQ_PROC @@ -49114,11 +73911,862 @@ 110 0x0000 //RX_FDDRC_RESRV_0 129 0x0100 //RX_SPK_VOL 130 0x0000 //RX_VOL_RESRV_0 +#RX 2 +157 0x2040 //RX_RECVFUNC_MODE_0 +158 0x0000 //RX_RECVFUNC_MODE_1 +159 0x0000 //RX_SAMPLINGFREQ_SIG +160 0x0000 //RX_SAMPLINGFREQ_PROC +161 0x000A //RX_FRAME_SZ +162 0x0000 //RX_DELAY_OPT +163 0x3000 //RX_TDDRC_ALPHA_UP_1 +164 0x3000 //RX_TDDRC_ALPHA_UP_2 +165 0x3000 //RX_TDDRC_ALPHA_UP_3 +166 0x3000 //RX_TDDRC_ALPHA_UP_4 +167 0x050D //RX_PGA +168 0x7652 //RX_A_HP +169 0x4000 //RX_B_PE +170 0x7800 //RX_THR_PITCH_DET_0 +171 0x7000 //RX_THR_PITCH_DET_1 +172 0x6000 //RX_THR_PITCH_DET_2 +173 0x0000 //RX_PITCH_BFR_LEN +174 0x0000 //RX_SBD_PITCH_DET +175 0x0000 //RX_PP_RESRV_0 +176 0x0000 //RX_PP_RESRV_1 +177 0xF800 //RX_N_SN_EST +178 0x0000 //RX_N2_SN_EST +179 0x000F //RX_NS_LVL_CTRL +180 0xF800 //RX_THR_SN_EST +181 0x7E00 //RX_LAMBDA_PFILT +182 0x000A //RX_FENS_RESRV_0 +183 0x0000 //RX_FENS_RESRV_1 +184 0x7FB0 //RX_TDDRC_ALPHA_DWN_1 +185 0x7FB0 //RX_TDDRC_ALPHA_DWN_2 +186 0x7FB0 //RX_TDDRC_ALPHA_DWN_3 +187 0x0000 //RX_EXTRA_NS_L +188 0x0000 //RX_EXTRA_NS_A +189 0x7FB0 //RX_TDDRC_ALPHA_DWN_4 +190 0xDA9E //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +192 0x0000 //RX_A_POST_FLT +193 0x0000 //RX_LMT_THRD +194 0x4000 //RX_LMT_ALPHA +195 0x0020 //RX_FDEQ_SUBNUM +196 0x4848 //RX_FDEQ_GAIN_0 +197 0x4848 //RX_FDEQ_GAIN_1 +198 0x4848 //RX_FDEQ_GAIN_2 +199 0x4848 //RX_FDEQ_GAIN_3 +200 0x4848 //RX_FDEQ_GAIN_4 +201 0x4848 //RX_FDEQ_GAIN_5 +202 0x4848 //RX_FDEQ_GAIN_6 +203 0x4848 //RX_FDEQ_GAIN_7 +204 0x4848 //RX_FDEQ_GAIN_8 +205 0x4848 //RX_FDEQ_GAIN_9 +206 0x4848 //RX_FDEQ_GAIN_10 +207 0x4848 //RX_FDEQ_GAIN_11 +208 0x4848 //RX_FDEQ_GAIN_12 +209 0x4848 //RX_FDEQ_GAIN_13 +210 0x4848 //RX_FDEQ_GAIN_14 +211 0x4848 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0000 //RX_FDEQ_BIN_0 +221 0x0000 //RX_FDEQ_BIN_1 +222 0x0000 //RX_FDEQ_BIN_2 +223 0x0000 //RX_FDEQ_BIN_3 +224 0x0000 //RX_FDEQ_BIN_4 +225 0x0000 //RX_FDEQ_BIN_5 +226 0x0000 //RX_FDEQ_BIN_6 +227 0x0000 //RX_FDEQ_BIN_7 +228 0x0000 //RX_FDEQ_BIN_8 +229 0x0000 //RX_FDEQ_BIN_9 +230 0x0000 //RX_FDEQ_BIN_10 +231 0x0000 //RX_FDEQ_BIN_11 +232 0x0000 //RX_FDEQ_BIN_12 +233 0x0000 //RX_FDEQ_BIN_13 +234 0x0000 //RX_FDEQ_BIN_14 +235 0x0000 //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x0000 //RX_FDEQ_RESRV_0 +245 0x0000 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0030 //RX_FDDRC_BAND_MARGIN_1 +248 0x0050 //RX_FDDRC_BAND_MARGIN_2 +249 0x0080 //RX_FDDRC_BAND_MARGIN_3 +250 0x0004 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x5000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x6400 //RX_FDDRC_THRD_3_2 +258 0x6400 //RX_FDDRC_THRD_3_3 +259 0x2000 //RX_FDDRC_SLANT_0_0 +260 0x2000 //RX_FDDRC_SLANT_0_1 +261 0x2000 //RX_FDDRC_SLANT_0_2 +262 0x2000 //RX_FDDRC_SLANT_0_3 +263 0x2000 //RX_FDDRC_SLANT_1_0 +264 0x2000 //RX_FDDRC_SLANT_1_1 +265 0x2000 //RX_FDDRC_SLANT_1_2 +266 0x2000 //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +268 0x0003 //RX_FILTINDX +269 0x0000 //RX_TDDRC_THRD_0 +270 0x0000 //RX_TDDRC_THRD_1 +271 0x0E80 //RX_TDDRC_THRD_2 +272 0x3800 //RX_TDDRC_THRD_3 +273 0x2A00 //RX_TDDRC_SLANT_0 +274 0x6E00 //RX_TDDRC_SLANT_1 +275 0x3000 //RX_TDDRC_ALPHA_UP_0 +276 0x7FB0 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x0000 //RX_TDDRC_HMNC_GAIN +279 0x0000 //RX_TDDRC_SMT_FLAG +280 0x0000 //RX_TDDRC_SMT_W +281 0x0100 //RX_TDDRC_DRC_GAIN +282 0x7C00 //RX_LAMBDA_PKA_FP +283 0x2000 //RX_TPKA_FP +284 0x0080 //RX_MIN_G_FP +285 0x2000 //RX_MAX_G_FP +286 0x0100 //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 +288 0x0010 //RX_MAXLEVEL_CNG +289 0x0000 //RX_BWE_UV_TH +290 0x0000 //RX_BWE_UV_TH2 +291 0x0000 //RX_BWE_UV_TH3 +292 0x0000 //RX_BWE_V_TH +293 0x0000 //RX_BWE_GAIN1_V_TH1 +294 0x0000 //RX_BWE_GAIN1_V_TH2 +295 0x0000 //RX_BWE_UV_EQ +296 0x0000 //RX_BWE_V_EQ +297 0x0000 //RX_BWE_TONE_TH +298 0x0000 //RX_BWE_UV_HOLD_T +299 0x0000 //RX_BWE_GAIN2_ALPHA +300 0x0000 //RX_BWE_GAIN3_ALPHA +301 0x0000 //RX_BWE_CUTOFF +302 0x0000 //RX_BWE_GAINFILL +303 0x0000 //RX_BWE_MAXTH_TONE +304 0x0000 //RX_BWE_EQ_0 +305 0x0000 //RX_BWE_EQ_1 +306 0x0000 //RX_BWE_EQ_2 +307 0x0000 //RX_BWE_EQ_3 +308 0x0000 //RX_BWE_EQ_4 +309 0x0000 //RX_BWE_EQ_5 +310 0x0000 //RX_BWE_EQ_6 +311 0x0000 //RX_BWE_RESRV_0 +312 0x0000 //RX_BWE_RESRV_1 +313 0x0000 //RX_BWE_RESRV_2 +#VOL 0 +163 0x3000 //RX_TDDRC_ALPHA_UP_1 +164 0x3000 //RX_TDDRC_ALPHA_UP_2 +165 0x3000 //RX_TDDRC_ALPHA_UP_3 +166 0x3000 //RX_TDDRC_ALPHA_UP_4 +184 0x7FB0 //RX_TDDRC_ALPHA_DWN_1 +185 0x7FB0 //RX_TDDRC_ALPHA_DWN_2 +186 0x7FB0 //RX_TDDRC_ALPHA_DWN_3 +189 0x7FB0 //RX_TDDRC_ALPHA_DWN_4 +190 0xDA9E //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +269 0x0000 //RX_TDDRC_THRD_0 +270 0x0000 //RX_TDDRC_THRD_1 +271 0x0E80 //RX_TDDRC_THRD_2 +272 0x3800 //RX_TDDRC_THRD_3 +273 0x2A00 //RX_TDDRC_SLANT_0 +274 0x6E00 //RX_TDDRC_SLANT_1 +275 0x3000 //RX_TDDRC_ALPHA_UP_0 +276 0x7FB0 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x0000 //RX_TDDRC_HMNC_GAIN +279 0x0000 //RX_TDDRC_SMT_FLAG +280 0x0000 //RX_TDDRC_SMT_W +281 0x0100 //RX_TDDRC_DRC_GAIN +195 0x0020 //RX_FDEQ_SUBNUM +196 0x4848 //RX_FDEQ_GAIN_0 +197 0x4848 //RX_FDEQ_GAIN_1 +198 0x4848 //RX_FDEQ_GAIN_2 +199 0x4848 //RX_FDEQ_GAIN_3 +200 0x4848 //RX_FDEQ_GAIN_4 +201 0x4848 //RX_FDEQ_GAIN_5 +202 0x4848 //RX_FDEQ_GAIN_6 +203 0x4848 //RX_FDEQ_GAIN_7 +204 0x4848 //RX_FDEQ_GAIN_8 +205 0x4848 //RX_FDEQ_GAIN_9 +206 0x4848 //RX_FDEQ_GAIN_10 +207 0x4848 //RX_FDEQ_GAIN_11 +208 0x4848 //RX_FDEQ_GAIN_12 +209 0x4848 //RX_FDEQ_GAIN_13 +210 0x4848 //RX_FDEQ_GAIN_14 +211 0x4848 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0000 //RX_FDEQ_BIN_0 +221 0x0000 //RX_FDEQ_BIN_1 +222 0x0000 //RX_FDEQ_BIN_2 +223 0x0000 //RX_FDEQ_BIN_3 +224 0x0000 //RX_FDEQ_BIN_4 +225 0x0000 //RX_FDEQ_BIN_5 +226 0x0000 //RX_FDEQ_BIN_6 +227 0x0000 //RX_FDEQ_BIN_7 +228 0x0000 //RX_FDEQ_BIN_8 +229 0x0000 //RX_FDEQ_BIN_9 +230 0x0000 //RX_FDEQ_BIN_10 +231 0x0000 //RX_FDEQ_BIN_11 +232 0x0000 //RX_FDEQ_BIN_12 +233 0x0000 //RX_FDEQ_BIN_13 +234 0x0000 //RX_FDEQ_BIN_14 +235 0x0000 //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x0000 //RX_FDEQ_RESRV_0 +245 0x0000 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0030 //RX_FDDRC_BAND_MARGIN_1 +248 0x0050 //RX_FDDRC_BAND_MARGIN_2 +249 0x0080 //RX_FDDRC_BAND_MARGIN_3 +250 0x0004 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x5000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x6400 //RX_FDDRC_THRD_3_2 +258 0x6400 //RX_FDDRC_THRD_3_3 +259 0x2000 //RX_FDDRC_SLANT_0_0 +260 0x2000 //RX_FDDRC_SLANT_0_1 +261 0x2000 //RX_FDDRC_SLANT_0_2 +262 0x2000 //RX_FDDRC_SLANT_0_3 +263 0x2000 //RX_FDDRC_SLANT_1_0 +264 0x2000 //RX_FDDRC_SLANT_1_1 +265 0x2000 //RX_FDDRC_SLANT_1_2 +266 0x2000 //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +286 0x0100 //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 +#VOL 1 +163 0x3000 //RX_TDDRC_ALPHA_UP_1 +164 0x3000 //RX_TDDRC_ALPHA_UP_2 +165 0x3000 //RX_TDDRC_ALPHA_UP_3 +166 0x3000 //RX_TDDRC_ALPHA_UP_4 +184 0x7FB0 //RX_TDDRC_ALPHA_DWN_1 +185 0x7FB0 //RX_TDDRC_ALPHA_DWN_2 +186 0x7FB0 //RX_TDDRC_ALPHA_DWN_3 +189 0x7FB0 //RX_TDDRC_ALPHA_DWN_4 +190 0xDA9E //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +269 0x0000 //RX_TDDRC_THRD_0 +270 0x0000 //RX_TDDRC_THRD_1 +271 0x0E80 //RX_TDDRC_THRD_2 +272 0x3800 //RX_TDDRC_THRD_3 +273 0x2A00 //RX_TDDRC_SLANT_0 +274 0x6E00 //RX_TDDRC_SLANT_1 +275 0x3000 //RX_TDDRC_ALPHA_UP_0 +276 0x7FB0 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x0000 //RX_TDDRC_HMNC_GAIN +279 0x0000 //RX_TDDRC_SMT_FLAG +280 0x0000 //RX_TDDRC_SMT_W +281 0x0100 //RX_TDDRC_DRC_GAIN +195 0x0020 //RX_FDEQ_SUBNUM +196 0x4848 //RX_FDEQ_GAIN_0 +197 0x4848 //RX_FDEQ_GAIN_1 +198 0x4848 //RX_FDEQ_GAIN_2 +199 0x4848 //RX_FDEQ_GAIN_3 +200 0x4848 //RX_FDEQ_GAIN_4 +201 0x4848 //RX_FDEQ_GAIN_5 +202 0x4848 //RX_FDEQ_GAIN_6 +203 0x4848 //RX_FDEQ_GAIN_7 +204 0x4848 //RX_FDEQ_GAIN_8 +205 0x4848 //RX_FDEQ_GAIN_9 +206 0x4848 //RX_FDEQ_GAIN_10 +207 0x4848 //RX_FDEQ_GAIN_11 +208 0x4848 //RX_FDEQ_GAIN_12 +209 0x4848 //RX_FDEQ_GAIN_13 +210 0x4848 //RX_FDEQ_GAIN_14 +211 0x4848 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0000 //RX_FDEQ_BIN_0 +221 0x0000 //RX_FDEQ_BIN_1 +222 0x0000 //RX_FDEQ_BIN_2 +223 0x0000 //RX_FDEQ_BIN_3 +224 0x0000 //RX_FDEQ_BIN_4 +225 0x0000 //RX_FDEQ_BIN_5 +226 0x0000 //RX_FDEQ_BIN_6 +227 0x0000 //RX_FDEQ_BIN_7 +228 0x0000 //RX_FDEQ_BIN_8 +229 0x0000 //RX_FDEQ_BIN_9 +230 0x0000 //RX_FDEQ_BIN_10 +231 0x0000 //RX_FDEQ_BIN_11 +232 0x0000 //RX_FDEQ_BIN_12 +233 0x0000 //RX_FDEQ_BIN_13 +234 0x0000 //RX_FDEQ_BIN_14 +235 0x0000 //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x0000 //RX_FDEQ_RESRV_0 +245 0x0000 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0030 //RX_FDDRC_BAND_MARGIN_1 +248 0x0050 //RX_FDDRC_BAND_MARGIN_2 +249 0x0080 //RX_FDDRC_BAND_MARGIN_3 +250 0x0004 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x5000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x6400 //RX_FDDRC_THRD_3_2 +258 0x6400 //RX_FDDRC_THRD_3_3 +259 0x2000 //RX_FDDRC_SLANT_0_0 +260 0x2000 //RX_FDDRC_SLANT_0_1 +261 0x2000 //RX_FDDRC_SLANT_0_2 +262 0x2000 //RX_FDDRC_SLANT_0_3 +263 0x2000 //RX_FDDRC_SLANT_1_0 +264 0x2000 //RX_FDDRC_SLANT_1_1 +265 0x2000 //RX_FDDRC_SLANT_1_2 +266 0x2000 //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +286 0x0100 //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 +#VOL 2 +163 0x3000 //RX_TDDRC_ALPHA_UP_1 +164 0x3000 //RX_TDDRC_ALPHA_UP_2 +165 0x3000 //RX_TDDRC_ALPHA_UP_3 +166 0x3000 //RX_TDDRC_ALPHA_UP_4 +184 0x7FB0 //RX_TDDRC_ALPHA_DWN_1 +185 0x7FB0 //RX_TDDRC_ALPHA_DWN_2 +186 0x7FB0 //RX_TDDRC_ALPHA_DWN_3 +189 0x7FB0 //RX_TDDRC_ALPHA_DWN_4 +190 0xDA9E //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +269 0x0000 //RX_TDDRC_THRD_0 +270 0x0000 //RX_TDDRC_THRD_1 +271 0x0E80 //RX_TDDRC_THRD_2 +272 0x3800 //RX_TDDRC_THRD_3 +273 0x2A00 //RX_TDDRC_SLANT_0 +274 0x6E00 //RX_TDDRC_SLANT_1 +275 0x3000 //RX_TDDRC_ALPHA_UP_0 +276 0x7FB0 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x0000 //RX_TDDRC_HMNC_GAIN +279 0x0000 //RX_TDDRC_SMT_FLAG +280 0x0000 //RX_TDDRC_SMT_W +281 0x0100 //RX_TDDRC_DRC_GAIN +195 0x0020 //RX_FDEQ_SUBNUM +196 0x4848 //RX_FDEQ_GAIN_0 +197 0x4848 //RX_FDEQ_GAIN_1 +198 0x4848 //RX_FDEQ_GAIN_2 +199 0x4848 //RX_FDEQ_GAIN_3 +200 0x4848 //RX_FDEQ_GAIN_4 +201 0x4848 //RX_FDEQ_GAIN_5 +202 0x4848 //RX_FDEQ_GAIN_6 +203 0x4848 //RX_FDEQ_GAIN_7 +204 0x4848 //RX_FDEQ_GAIN_8 +205 0x4848 //RX_FDEQ_GAIN_9 +206 0x4848 //RX_FDEQ_GAIN_10 +207 0x4848 //RX_FDEQ_GAIN_11 +208 0x4848 //RX_FDEQ_GAIN_12 +209 0x4848 //RX_FDEQ_GAIN_13 +210 0x4848 //RX_FDEQ_GAIN_14 +211 0x4848 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0000 //RX_FDEQ_BIN_0 +221 0x0000 //RX_FDEQ_BIN_1 +222 0x0000 //RX_FDEQ_BIN_2 +223 0x0000 //RX_FDEQ_BIN_3 +224 0x0000 //RX_FDEQ_BIN_4 +225 0x0000 //RX_FDEQ_BIN_5 +226 0x0000 //RX_FDEQ_BIN_6 +227 0x0000 //RX_FDEQ_BIN_7 +228 0x0000 //RX_FDEQ_BIN_8 +229 0x0000 //RX_FDEQ_BIN_9 +230 0x0000 //RX_FDEQ_BIN_10 +231 0x0000 //RX_FDEQ_BIN_11 +232 0x0000 //RX_FDEQ_BIN_12 +233 0x0000 //RX_FDEQ_BIN_13 +234 0x0000 //RX_FDEQ_BIN_14 +235 0x0000 //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x0000 //RX_FDEQ_RESRV_0 +245 0x0000 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0030 //RX_FDDRC_BAND_MARGIN_1 +248 0x0050 //RX_FDDRC_BAND_MARGIN_2 +249 0x0080 //RX_FDDRC_BAND_MARGIN_3 +250 0x0004 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x5000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x6400 //RX_FDDRC_THRD_3_2 +258 0x6400 //RX_FDDRC_THRD_3_3 +259 0x2000 //RX_FDDRC_SLANT_0_0 +260 0x2000 //RX_FDDRC_SLANT_0_1 +261 0x2000 //RX_FDDRC_SLANT_0_2 +262 0x2000 //RX_FDDRC_SLANT_0_3 +263 0x2000 //RX_FDDRC_SLANT_1_0 +264 0x2000 //RX_FDDRC_SLANT_1_1 +265 0x2000 //RX_FDDRC_SLANT_1_2 +266 0x2000 //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +286 0x0100 //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 +#VOL 3 +163 0x3000 //RX_TDDRC_ALPHA_UP_1 +164 0x3000 //RX_TDDRC_ALPHA_UP_2 +165 0x3000 //RX_TDDRC_ALPHA_UP_3 +166 0x3000 //RX_TDDRC_ALPHA_UP_4 +184 0x7FB0 //RX_TDDRC_ALPHA_DWN_1 +185 0x7FB0 //RX_TDDRC_ALPHA_DWN_2 +186 0x7FB0 //RX_TDDRC_ALPHA_DWN_3 +189 0x7FB0 //RX_TDDRC_ALPHA_DWN_4 +190 0xDA9E //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +269 0x0000 //RX_TDDRC_THRD_0 +270 0x0000 //RX_TDDRC_THRD_1 +271 0x0E80 //RX_TDDRC_THRD_2 +272 0x3800 //RX_TDDRC_THRD_3 +273 0x2A00 //RX_TDDRC_SLANT_0 +274 0x6E00 //RX_TDDRC_SLANT_1 +275 0x3000 //RX_TDDRC_ALPHA_UP_0 +276 0x7FB0 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x0000 //RX_TDDRC_HMNC_GAIN +279 0x0000 //RX_TDDRC_SMT_FLAG +280 0x0000 //RX_TDDRC_SMT_W +281 0x0100 //RX_TDDRC_DRC_GAIN +195 0x0020 //RX_FDEQ_SUBNUM +196 0x4848 //RX_FDEQ_GAIN_0 +197 0x4848 //RX_FDEQ_GAIN_1 +198 0x4848 //RX_FDEQ_GAIN_2 +199 0x4848 //RX_FDEQ_GAIN_3 +200 0x4848 //RX_FDEQ_GAIN_4 +201 0x4848 //RX_FDEQ_GAIN_5 +202 0x4848 //RX_FDEQ_GAIN_6 +203 0x4848 //RX_FDEQ_GAIN_7 +204 0x4848 //RX_FDEQ_GAIN_8 +205 0x4848 //RX_FDEQ_GAIN_9 +206 0x4848 //RX_FDEQ_GAIN_10 +207 0x4848 //RX_FDEQ_GAIN_11 +208 0x4848 //RX_FDEQ_GAIN_12 +209 0x4848 //RX_FDEQ_GAIN_13 +210 0x4848 //RX_FDEQ_GAIN_14 +211 0x4848 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0000 //RX_FDEQ_BIN_0 +221 0x0000 //RX_FDEQ_BIN_1 +222 0x0000 //RX_FDEQ_BIN_2 +223 0x0000 //RX_FDEQ_BIN_3 +224 0x0000 //RX_FDEQ_BIN_4 +225 0x0000 //RX_FDEQ_BIN_5 +226 0x0000 //RX_FDEQ_BIN_6 +227 0x0000 //RX_FDEQ_BIN_7 +228 0x0000 //RX_FDEQ_BIN_8 +229 0x0000 //RX_FDEQ_BIN_9 +230 0x0000 //RX_FDEQ_BIN_10 +231 0x0000 //RX_FDEQ_BIN_11 +232 0x0000 //RX_FDEQ_BIN_12 +233 0x0000 //RX_FDEQ_BIN_13 +234 0x0000 //RX_FDEQ_BIN_14 +235 0x0000 //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x0000 //RX_FDEQ_RESRV_0 +245 0x0000 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0030 //RX_FDDRC_BAND_MARGIN_1 +248 0x0050 //RX_FDDRC_BAND_MARGIN_2 +249 0x0080 //RX_FDDRC_BAND_MARGIN_3 +250 0x0004 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x5000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x6400 //RX_FDDRC_THRD_3_2 +258 0x6400 //RX_FDDRC_THRD_3_3 +259 0x2000 //RX_FDDRC_SLANT_0_0 +260 0x2000 //RX_FDDRC_SLANT_0_1 +261 0x2000 //RX_FDDRC_SLANT_0_2 +262 0x2000 //RX_FDDRC_SLANT_0_3 +263 0x2000 //RX_FDDRC_SLANT_1_0 +264 0x2000 //RX_FDDRC_SLANT_1_1 +265 0x2000 //RX_FDDRC_SLANT_1_2 +266 0x2000 //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +286 0x0100 //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 +#VOL 4 +163 0x3000 //RX_TDDRC_ALPHA_UP_1 +164 0x3000 //RX_TDDRC_ALPHA_UP_2 +165 0x3000 //RX_TDDRC_ALPHA_UP_3 +166 0x3000 //RX_TDDRC_ALPHA_UP_4 +184 0x7FB0 //RX_TDDRC_ALPHA_DWN_1 +185 0x7FB0 //RX_TDDRC_ALPHA_DWN_2 +186 0x7FB0 //RX_TDDRC_ALPHA_DWN_3 +189 0x7FB0 //RX_TDDRC_ALPHA_DWN_4 +190 0xDA9E //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +269 0x0000 //RX_TDDRC_THRD_0 +270 0x0000 //RX_TDDRC_THRD_1 +271 0x0E80 //RX_TDDRC_THRD_2 +272 0x3800 //RX_TDDRC_THRD_3 +273 0x2A00 //RX_TDDRC_SLANT_0 +274 0x6E00 //RX_TDDRC_SLANT_1 +275 0x3000 //RX_TDDRC_ALPHA_UP_0 +276 0x7FB0 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x0000 //RX_TDDRC_HMNC_GAIN +279 0x0000 //RX_TDDRC_SMT_FLAG +280 0x0000 //RX_TDDRC_SMT_W +281 0x0100 //RX_TDDRC_DRC_GAIN +195 0x0020 //RX_FDEQ_SUBNUM +196 0x4848 //RX_FDEQ_GAIN_0 +197 0x4848 //RX_FDEQ_GAIN_1 +198 0x4848 //RX_FDEQ_GAIN_2 +199 0x4848 //RX_FDEQ_GAIN_3 +200 0x4848 //RX_FDEQ_GAIN_4 +201 0x4848 //RX_FDEQ_GAIN_5 +202 0x4848 //RX_FDEQ_GAIN_6 +203 0x4848 //RX_FDEQ_GAIN_7 +204 0x4848 //RX_FDEQ_GAIN_8 +205 0x4848 //RX_FDEQ_GAIN_9 +206 0x4848 //RX_FDEQ_GAIN_10 +207 0x4848 //RX_FDEQ_GAIN_11 +208 0x4848 //RX_FDEQ_GAIN_12 +209 0x4848 //RX_FDEQ_GAIN_13 +210 0x4848 //RX_FDEQ_GAIN_14 +211 0x4848 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0000 //RX_FDEQ_BIN_0 +221 0x0000 //RX_FDEQ_BIN_1 +222 0x0000 //RX_FDEQ_BIN_2 +223 0x0000 //RX_FDEQ_BIN_3 +224 0x0000 //RX_FDEQ_BIN_4 +225 0x0000 //RX_FDEQ_BIN_5 +226 0x0000 //RX_FDEQ_BIN_6 +227 0x0000 //RX_FDEQ_BIN_7 +228 0x0000 //RX_FDEQ_BIN_8 +229 0x0000 //RX_FDEQ_BIN_9 +230 0x0000 //RX_FDEQ_BIN_10 +231 0x0000 //RX_FDEQ_BIN_11 +232 0x0000 //RX_FDEQ_BIN_12 +233 0x0000 //RX_FDEQ_BIN_13 +234 0x0000 //RX_FDEQ_BIN_14 +235 0x0000 //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x0000 //RX_FDEQ_RESRV_0 +245 0x0000 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0030 //RX_FDDRC_BAND_MARGIN_1 +248 0x0050 //RX_FDDRC_BAND_MARGIN_2 +249 0x0080 //RX_FDDRC_BAND_MARGIN_3 +250 0x0004 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x5000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x6400 //RX_FDDRC_THRD_3_2 +258 0x6400 //RX_FDDRC_THRD_3_3 +259 0x2000 //RX_FDDRC_SLANT_0_0 +260 0x2000 //RX_FDDRC_SLANT_0_1 +261 0x2000 //RX_FDDRC_SLANT_0_2 +262 0x2000 //RX_FDDRC_SLANT_0_3 +263 0x2000 //RX_FDDRC_SLANT_1_0 +264 0x2000 //RX_FDDRC_SLANT_1_1 +265 0x2000 //RX_FDDRC_SLANT_1_2 +266 0x2000 //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +286 0x0100 //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 +#VOL 5 +163 0x3000 //RX_TDDRC_ALPHA_UP_1 +164 0x3000 //RX_TDDRC_ALPHA_UP_2 +165 0x3000 //RX_TDDRC_ALPHA_UP_3 +166 0x3000 //RX_TDDRC_ALPHA_UP_4 +184 0x7FB0 //RX_TDDRC_ALPHA_DWN_1 +185 0x7FB0 //RX_TDDRC_ALPHA_DWN_2 +186 0x7FB0 //RX_TDDRC_ALPHA_DWN_3 +189 0x7FB0 //RX_TDDRC_ALPHA_DWN_4 +190 0xDA9E //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +269 0x0000 //RX_TDDRC_THRD_0 +270 0x0000 //RX_TDDRC_THRD_1 +271 0x0E80 //RX_TDDRC_THRD_2 +272 0x3800 //RX_TDDRC_THRD_3 +273 0x2A00 //RX_TDDRC_SLANT_0 +274 0x6E00 //RX_TDDRC_SLANT_1 +275 0x3000 //RX_TDDRC_ALPHA_UP_0 +276 0x7FB0 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x0000 //RX_TDDRC_HMNC_GAIN +279 0x0000 //RX_TDDRC_SMT_FLAG +280 0x0000 //RX_TDDRC_SMT_W +281 0x0100 //RX_TDDRC_DRC_GAIN +195 0x0020 //RX_FDEQ_SUBNUM +196 0x4848 //RX_FDEQ_GAIN_0 +197 0x4848 //RX_FDEQ_GAIN_1 +198 0x4848 //RX_FDEQ_GAIN_2 +199 0x4848 //RX_FDEQ_GAIN_3 +200 0x4848 //RX_FDEQ_GAIN_4 +201 0x4848 //RX_FDEQ_GAIN_5 +202 0x4848 //RX_FDEQ_GAIN_6 +203 0x4848 //RX_FDEQ_GAIN_7 +204 0x4848 //RX_FDEQ_GAIN_8 +205 0x4848 //RX_FDEQ_GAIN_9 +206 0x4848 //RX_FDEQ_GAIN_10 +207 0x4848 //RX_FDEQ_GAIN_11 +208 0x4848 //RX_FDEQ_GAIN_12 +209 0x4848 //RX_FDEQ_GAIN_13 +210 0x4848 //RX_FDEQ_GAIN_14 +211 0x4848 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0000 //RX_FDEQ_BIN_0 +221 0x0000 //RX_FDEQ_BIN_1 +222 0x0000 //RX_FDEQ_BIN_2 +223 0x0000 //RX_FDEQ_BIN_3 +224 0x0000 //RX_FDEQ_BIN_4 +225 0x0000 //RX_FDEQ_BIN_5 +226 0x0000 //RX_FDEQ_BIN_6 +227 0x0000 //RX_FDEQ_BIN_7 +228 0x0000 //RX_FDEQ_BIN_8 +229 0x0000 //RX_FDEQ_BIN_9 +230 0x0000 //RX_FDEQ_BIN_10 +231 0x0000 //RX_FDEQ_BIN_11 +232 0x0000 //RX_FDEQ_BIN_12 +233 0x0000 //RX_FDEQ_BIN_13 +234 0x0000 //RX_FDEQ_BIN_14 +235 0x0000 //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x0000 //RX_FDEQ_RESRV_0 +245 0x0000 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0030 //RX_FDDRC_BAND_MARGIN_1 +248 0x0050 //RX_FDDRC_BAND_MARGIN_2 +249 0x0080 //RX_FDDRC_BAND_MARGIN_3 +250 0x0004 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x5000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x6400 //RX_FDDRC_THRD_3_2 +258 0x6400 //RX_FDDRC_THRD_3_3 +259 0x2000 //RX_FDDRC_SLANT_0_0 +260 0x2000 //RX_FDDRC_SLANT_0_1 +261 0x2000 //RX_FDDRC_SLANT_0_2 +262 0x2000 //RX_FDDRC_SLANT_0_3 +263 0x2000 //RX_FDDRC_SLANT_1_0 +264 0x2000 //RX_FDDRC_SLANT_1_1 +265 0x2000 //RX_FDDRC_SLANT_1_2 +266 0x2000 //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +286 0x0100 //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 +#VOL 6 +163 0x3000 //RX_TDDRC_ALPHA_UP_1 +164 0x3000 //RX_TDDRC_ALPHA_UP_2 +165 0x3000 //RX_TDDRC_ALPHA_UP_3 +166 0x3000 //RX_TDDRC_ALPHA_UP_4 +184 0x7FB0 //RX_TDDRC_ALPHA_DWN_1 +185 0x7FB0 //RX_TDDRC_ALPHA_DWN_2 +186 0x7FB0 //RX_TDDRC_ALPHA_DWN_3 +189 0x7FB0 //RX_TDDRC_ALPHA_DWN_4 +190 0xDA9E //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +269 0x0000 //RX_TDDRC_THRD_0 +270 0x0000 //RX_TDDRC_THRD_1 +271 0x0E80 //RX_TDDRC_THRD_2 +272 0x3800 //RX_TDDRC_THRD_3 +273 0x2A00 //RX_TDDRC_SLANT_0 +274 0x6E00 //RX_TDDRC_SLANT_1 +275 0x3000 //RX_TDDRC_ALPHA_UP_0 +276 0x7FB0 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x0000 //RX_TDDRC_HMNC_GAIN +279 0x0000 //RX_TDDRC_SMT_FLAG +280 0x0000 //RX_TDDRC_SMT_W +281 0x0100 //RX_TDDRC_DRC_GAIN +195 0x0020 //RX_FDEQ_SUBNUM +196 0x4848 //RX_FDEQ_GAIN_0 +197 0x4848 //RX_FDEQ_GAIN_1 +198 0x4848 //RX_FDEQ_GAIN_2 +199 0x4848 //RX_FDEQ_GAIN_3 +200 0x4848 //RX_FDEQ_GAIN_4 +201 0x4848 //RX_FDEQ_GAIN_5 +202 0x4848 //RX_FDEQ_GAIN_6 +203 0x4848 //RX_FDEQ_GAIN_7 +204 0x4848 //RX_FDEQ_GAIN_8 +205 0x4848 //RX_FDEQ_GAIN_9 +206 0x4848 //RX_FDEQ_GAIN_10 +207 0x4848 //RX_FDEQ_GAIN_11 +208 0x4848 //RX_FDEQ_GAIN_12 +209 0x4848 //RX_FDEQ_GAIN_13 +210 0x4848 //RX_FDEQ_GAIN_14 +211 0x4848 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0000 //RX_FDEQ_BIN_0 +221 0x0000 //RX_FDEQ_BIN_1 +222 0x0000 //RX_FDEQ_BIN_2 +223 0x0000 //RX_FDEQ_BIN_3 +224 0x0000 //RX_FDEQ_BIN_4 +225 0x0000 //RX_FDEQ_BIN_5 +226 0x0000 //RX_FDEQ_BIN_6 +227 0x0000 //RX_FDEQ_BIN_7 +228 0x0000 //RX_FDEQ_BIN_8 +229 0x0000 //RX_FDEQ_BIN_9 +230 0x0000 //RX_FDEQ_BIN_10 +231 0x0000 //RX_FDEQ_BIN_11 +232 0x0000 //RX_FDEQ_BIN_12 +233 0x0000 //RX_FDEQ_BIN_13 +234 0x0000 //RX_FDEQ_BIN_14 +235 0x0000 //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x0000 //RX_FDEQ_RESRV_0 +245 0x0000 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0030 //RX_FDDRC_BAND_MARGIN_1 +248 0x0050 //RX_FDDRC_BAND_MARGIN_2 +249 0x0080 //RX_FDDRC_BAND_MARGIN_3 +250 0x0004 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x5000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x6400 //RX_FDDRC_THRD_3_2 +258 0x6400 //RX_FDDRC_THRD_3_3 +259 0x2000 //RX_FDDRC_SLANT_0_0 +260 0x2000 //RX_FDDRC_SLANT_0_1 +261 0x2000 //RX_FDDRC_SLANT_0_2 +262 0x2000 //RX_FDDRC_SLANT_0_3 +263 0x2000 //RX_FDDRC_SLANT_1_0 +264 0x2000 //RX_FDDRC_SLANT_1_1 +265 0x2000 //RX_FDDRC_SLANT_1_2 +266 0x2000 //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +286 0x0100 //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 #CASE_NAME HEADSET-TTY_FULL-VOICE_GENERIC-NB -#PARAM_MODE FULL -#PARAM_TYPE TX+RX -#TOTAL_CUSTOM_STEP 7 +#PARAM_MODE Full +#PARAM_TYPE TX+2RX +#TOTAL_CUSTOM_STEP 7+7 #TX 0 0x0001 //TX_OPERATION_MODE_0 1 0x0000 //TX_OPERATION_MODE_1 @@ -49362,7 +75010,7 @@ 239 0x0000 //TX_DT_RESRV_7 240 0x0000 //TX_DT_RESRV_8 241 0x0000 //TX_DT_RESRV_9 -242 0xF200 //TX_THR_SN_EST_0 +242 0xFA00 //TX_THR_SN_EST_0 243 0xF400 //TX_THR_SN_EST_1 244 0xF800 //TX_THR_SN_EST_2 245 0xF600 //TX_THR_SN_EST_3 @@ -49371,12 +75019,12 @@ 248 0xF800 //TX_THR_SN_EST_6 249 0xF800 //TX_THR_SN_EST_7 250 0x0100 //TX_DELTA_THR_SN_EST_0 -251 0x0000 //TX_DELTA_THR_SN_EST_1 +251 0x0100 //TX_DELTA_THR_SN_EST_1 252 0x0100 //TX_DELTA_THR_SN_EST_2 -253 0x0100 //TX_DELTA_THR_SN_EST_3 +253 0x0200 //TX_DELTA_THR_SN_EST_3 254 0x0200 //TX_DELTA_THR_SN_EST_4 255 0x0200 //TX_DELTA_THR_SN_EST_5 -256 0x0200 //TX_DELTA_THR_SN_EST_6 +256 0x0000 //TX_DELTA_THR_SN_EST_6 257 0x0200 //TX_DELTA_THR_SN_EST_7 258 0x4000 //TX_LAMBDA_NN_EST_0 259 0x4000 //TX_LAMBDA_NN_EST_1 @@ -49402,12 +75050,12 @@ 279 0x0000 //TX_B_POST_FLT_0 280 0x0000 //TX_B_POST_FLT_1 281 0x001A //TX_NS_LVL_CTRL_0 -282 0x001A //TX_NS_LVL_CTRL_1 +282 0x0014 //TX_NS_LVL_CTRL_1 283 0x0014 //TX_NS_LVL_CTRL_2 -284 0x0014 //TX_NS_LVL_CTRL_3 +284 0x000C //TX_NS_LVL_CTRL_3 285 0x000C //TX_NS_LVL_CTRL_4 286 0x000C //TX_NS_LVL_CTRL_5 -287 0x000C //TX_NS_LVL_CTRL_6 +287 0x001A //TX_NS_LVL_CTRL_6 288 0x000C //TX_NS_LVL_CTRL_7 289 0x000E //TX_MIN_GAIN_S_0 290 0x0014 //TX_MIN_GAIN_S_1 @@ -49423,10 +75071,10 @@ 300 0x7FFF //TX_SNRI_SUP_0 301 0x7FFF //TX_SNRI_SUP_1 302 0x7FFF //TX_SNRI_SUP_2 -303 0x7FFF //TX_SNRI_SUP_3 +303 0x4000 //TX_SNRI_SUP_3 304 0x4000 //TX_SNRI_SUP_4 305 0x4000 //TX_SNRI_SUP_5 -306 0x4000 //TX_SNRI_SUP_6 +306 0x7FFF //TX_SNRI_SUP_6 307 0x4000 //TX_SNRI_SUP_7 308 0x1200 //TX_THR_LFNS 309 0x0147 //TX_G_LFNS @@ -49435,12 +75083,12 @@ 312 0x7FFF //TX_A_POST_FILT_0 313 0x7FFF //TX_A_POST_FILT_1 314 0x4000 //TX_A_POST_FILT_S_0 -315 0x199A //TX_A_POST_FILT_S_1 +315 0x1000 //TX_A_POST_FILT_S_1 316 0x1000 //TX_A_POST_FILT_S_2 -317 0x1000 //TX_A_POST_FILT_S_3 +317 0x6666 //TX_A_POST_FILT_S_3 318 0x6666 //TX_A_POST_FILT_S_4 319 0x6666 //TX_A_POST_FILT_S_5 -320 0x6666 //TX_A_POST_FILT_S_6 +320 0x199A //TX_A_POST_FILT_S_6 321 0x6666 //TX_A_POST_FILT_S_7 322 0x2000 //TX_B_POST_FILT_0 323 0x2000 //TX_B_POST_FILT_1 @@ -49487,7 +75135,7 @@ 364 0x0000 //TX_K_APT 365 0x0001 //TX_NOISEDET 366 0x05A0 //TX_NDETCT -367 0x000A //TX_NOISE_TH_0 +367 0x003B //TX_NOISE_TH_0 368 0x1388 //TX_NOISE_TH_0_2 369 0x3A98 //TX_NOISE_TH_0_3 370 0x0C80 //TX_NOISE_TH_1 @@ -49499,11 +75147,11 @@ 376 0x7FFF //TX_NOISE_TH_5_3 377 0x7FFF //TX_NOISE_TH_5_4 378 0x00C8 //TX_NOISE_TH_6 -379 0x000A //TX_MINENOISE_TH -380 0x0000 //TX_MINENOISE_MIC0_TH_MTS -381 0x0000 //TX_MINENOISE_MIC0_TH_EXP -382 0x0000 //TX_MINENOISE_MIC0_S_TH_MTS -383 0x0000 //TX_MINENOISE_MIC0_S_TH_EXP +379 0x00C8 //TX_MINENOISE_TH +380 0xD508 //TX_MORENS_TFMASK_TH +381 0x0001 //TX_DRC_QUIET_FLOOR +382 0x3A98 //TX_RATIODTL_CUT_TH +383 0x0DAC //TX_DT_CUT_K1 384 0x6400 //TX_OUT_ENER_S_TH_CLEAN 385 0x6400 //TX_OUT_ENER_S_TH_LESSCLEAN 386 0x6400 //TX_OUT_ENER_S_TH_NOISY @@ -49511,22 +75159,22 @@ 388 0x7D00 //TX_OUT_ENER_TH_SPEECH 389 0x0000 //TX_SN_NPB_GAIN 390 0x0000 //TX_NN_NPB_GAIN -391 0x0000 //TX_CSX_ALPHA_0 -392 0x0000 //TX_CSX_ALPHA_1 -393 0x0000 //TX_CSX_ALPHA_2 -394 0x0000 //TX_CSX_ALPHA_3 -395 0x0000 //TX_MU_ARSP_EST -396 0x0000 //TX_P_OUTBEAM_MIN_TH +391 0x7FFF //TX_POST_MASK_SUP_HSNE +392 0x1388 //TX_TAIL_DET_TH +393 0x4000 //TX_B_LESSCUT_RTO_WTA +394 0x0000 //TX_MEL_G_R +395 0x0080 //TX_SUPHIGH_TH +396 0x0000 //TX_MASK_G_R 397 0x0000 //TX_EXTRA_NS_L -398 0x0000 //TX_EXTRA_NS_A -399 0x0000 //TX_VR_NOISE_FLOOR_TH +398 0x1800 //TX_C_POST_FLT_MASK +399 0x7FFF //TX_A_POST_FLT_WNS 400 0x0000 //TX_MIN_G_LOW300HZ 401 0x0010 //TX_MAXLEVEL_CNG 402 0x0000 //TX_STN_NOISE_TH 403 0x0000 //TX_POST_MASK_SUP 404 0x0000 //TX_POST_MASK_ADJUST 405 0x0014 //TX_NS_ENOISE_MIC0_TH -406 0x0014 //TX_MINENOISE_MIC0_TH +406 0x0032 //TX_MINENOISE_MIC0_TH 407 0x0226 //TX_MINENOISE_MIC0_S_TH 408 0x2879 //TX_MIN_G_CTRL_SSNS 409 0x0400 //TX_METAL_RTO_THR @@ -49634,16 +75282,16 @@ 511 0x6666 //TX_MIC_TO_BFGAIN 512 0x6666 //TX_MICTOBFGAIN0 513 0x0014 //TX_FASTMUE_TH -514 0x0000 //TX_DERVB_LEN_0 -515 0x0000 //TX_DERVB_LEN_1 -516 0x0000 //TX_RHO_DERVB -517 0x0000 //TX_MIC_INDX_DERVB -518 0x0000 //TX_MU_DERVB -519 0x0000 //TX_DR_RESRV_0 -520 0x0000 //TX_DR_RESRV_1 -521 0x0000 //TX_DR_RESRV_2 -522 0x0000 //TX_DR_RESRV_3 -523 0x0000 //TX_DR_RESRV_4 +514 0xC000 //TX_DEREVERB_LF_MU +515 0xC000 //TX_DEREVERB_HF_MU +516 0xCCCC //TX_DEREVERB_DELAY +517 0xD999 //TX_DEREVERB_COEF_LEN +518 0x1F40 //TX_DEREVERB_DNR +519 0x0000 //TX_DEREVERB_ALPHA +520 0x0000 //TX_DEREVERB_BETA +521 0x0000 //TX_GSC_RTOL_TH +522 0x7000 //TX_GSC_RTOH_TH +523 0x0064 //TX_WIDE2_MEANHTH 524 0x0000 //TX_DR_RESRV_5 525 0x0000 //TX_DR_RESRV_6 526 0x0000 //TX_DR_RESRV_7 @@ -50009,16 +75657,81 @@ 886 0x0000 //TX_FASTNS_TFMASKBIN_TH2 887 0x0000 //TX_FASTNS_TFMASKBIN_TH3 888 0x00C8 //TX_FASTNS_ARSPC_TH -889 0xD99A //TX_FASTNS_MASK5_TH +889 0xC000 //TX_FASTNS_MASK5_TH 890 0x051F //TX_POSTSSA_MIN_G_VR_MASK -891 0x7FFF //TX_A_LESSCUT_RTO_MASK +891 0x4000 //TX_A_LESSCUT_RTO_MASK 892 0x1770 //TX_FASTNS_NOISETH 893 0xC000 //TX_FASTNS_SSA_THLFL 894 0xC000 //TX_FASTNS_SSA_THHFL 895 0xCCCC //TX_FASTNS_SSA_THLFH 896 0xD999 //TX_FASTNS_SSA_THHFH +897 0x2339 //TX_SENDFUNC_REG_MICMUTE +898 0x0021 //TX_SENDFUNC_REG_MICMUTE1 +899 0x02BC //TX_MICMUTE_RATIO_THR +900 0x0140 //TX_MICMUTE_AMP_THR +901 0x0004 //TX_MICMUTE_HPF_IND +902 0x00C0 //TX_MICMUTE_LOG_EYR_TH +903 0x0008 //TX_MICMUTE_CVG_TIME +904 0x0008 //TX_MICMUTE_RELEASE_TIME +905 0x01FE //TX_MIC_VOLUME_MIC0MUTE +906 0x0020 //TX_MICMUTE_EPD_OFFSET_0 +907 0x001E //TX_MICMUTE_FRQ_AEC_L +908 0x7999 //TX_MICMUTE_EAD_THR +909 0x7FFF //TX_MICMUTE_LAMBDA_CB_NLE +910 0x7FFF //TX_MICMUTE_LAMBDA_RE_EST +911 0x4000 //TX_DTD_THR1_MICMUTE_0 +912 0x7000 //TX_DTD_THR1_MICMUTE_1 +913 0x7FFF //TX_DTD_THR1_MICMUTE_2 +914 0x7FFF //TX_DTD_THR1_MICMUTE_3 +915 0x6CCC //TX_DTD_THR2_MICMUTE_0 +916 0x0400 //TX_MICMUTE_MIN_EQ_RE_EST_0 +917 0x0400 //TX_MICMUTE_MIN_EQ_RE_EST_1 +918 0x1000 //TX_MICMUTE_MIN_EQ_RE_EST_2 +919 0x7FFF //TX_MICMUTE_MIN_EQ_RE_EST_3 +920 0x7FFF //TX_MICMUTE_MIN_EQ_RE_EST_4 +921 0x4000 //TX_MICMUTE_C_POST_FLT +922 0x03E8 //TX_MICMUTE_DT_CUT_K +923 0x0001 //TX_MICMUTE_DT_CUT_THR +924 0x03E8 //TX_MICMUTE_DT_CUT_K2 +925 0x0001 //TX_MICMUTE_DT_CUT_THR2 +926 0x0064 //TX_MICMUTE_DT2_HOLD_N +927 0x1000 //TX_MICMUTE_RATIODTH_THCUT +928 0x1000 //TX_MICMUTE_B_POST_FLT_ECHOL +929 0x7FFF //TX_MICMUTE_B_POST_FLT_ECHOH +930 0x0400 //TX_MICMUTE_C_POST_FLT_MASK +931 0x7999 //TX_MICMUTE_RATIODTL_CUT_TH +932 0x0258 //TX_MICMUTE_DT_CUT_K1 +933 0x0800 //TX_MICMUTE_N2_SN_EST +934 0xFC00 //TX_MICMUTE_THR_SN_EST_0 +935 0x001C //TX_MICMUTE_MIN_G_CTRL_0 +936 0x6000 //TX_MICMUTE_A_POST_FILT_S_0 +937 0x7000 //TX_MICMUTE_B_POST_FILT_0 +938 0x2710 //TX_MIC1RUB_AMP_THR +939 0x0010 //TX_MIC1MUTE_RATIO_THR +940 0x0450 //TX_MIC1MUTE_AMP_THR +941 0x0008 //TX_MIC1MUTE_CVG_TIME +942 0x0008 //TX_MIC1MUTE_RELEASE_TIME +943 0x0000 //TX_AMS_RESRV_01 +944 0x0000 //TX_AMS_RESRV_02 +945 0x0000 //TX_AMS_RESRV_03 +946 0x0000 //TX_AMS_RESRV_04 +947 0x0000 //TX_AMS_RESRV_05 +948 0x0000 //TX_AMS_RESRV_06 +949 0x0000 //TX_AMS_RESRV_07 +950 0x0000 //TX_AMS_RESRV_08 +951 0x0000 //TX_AMS_RESRV_09 +952 0x0000 //TX_AMS_RESRV_10 +953 0x0000 //TX_AMS_RESRV_11 +954 0x0000 //TX_AMS_RESRV_12 +955 0x0000 //TX_AMS_RESRV_13 +956 0x0000 //TX_AMS_RESRV_14 +957 0x0000 //TX_AMS_RESRV_15 +958 0x0000 //TX_AMS_RESRV_16 +959 0x0000 //TX_AMS_RESRV_17 +960 0x0000 //TX_AMS_RESRV_18 +961 0x0000 //TX_AMS_RESRV_19 #RX -0 0x0040 //RX_RECVFUNC_MODE_0 +0 0x2040 //RX_RECVFUNC_MODE_0 1 0x0000 //RX_RECVFUNC_MODE_1 2 0x0000 //RX_SAMPLINGFREQ_SIG 3 0x0000 //RX_SAMPLINGFREQ_PROC @@ -50868,11 +76581,862 @@ 110 0x0000 //RX_FDDRC_RESRV_0 129 0x0100 //RX_SPK_VOL 130 0x0000 //RX_VOL_RESRV_0 +#RX 2 +157 0x2040 //RX_RECVFUNC_MODE_0 +158 0x0000 //RX_RECVFUNC_MODE_1 +159 0x0000 //RX_SAMPLINGFREQ_SIG +160 0x0000 //RX_SAMPLINGFREQ_PROC +161 0x000A //RX_FRAME_SZ +162 0x0000 //RX_DELAY_OPT +163 0x3000 //RX_TDDRC_ALPHA_UP_1 +164 0x3000 //RX_TDDRC_ALPHA_UP_2 +165 0x3000 //RX_TDDRC_ALPHA_UP_3 +166 0x3000 //RX_TDDRC_ALPHA_UP_4 +167 0x050D //RX_PGA +168 0x7652 //RX_A_HP +169 0x4000 //RX_B_PE +170 0x7800 //RX_THR_PITCH_DET_0 +171 0x7000 //RX_THR_PITCH_DET_1 +172 0x6000 //RX_THR_PITCH_DET_2 +173 0x0000 //RX_PITCH_BFR_LEN +174 0x0000 //RX_SBD_PITCH_DET +175 0x0000 //RX_PP_RESRV_0 +176 0x0000 //RX_PP_RESRV_1 +177 0xF800 //RX_N_SN_EST +178 0x0000 //RX_N2_SN_EST +179 0x000F //RX_NS_LVL_CTRL +180 0xF800 //RX_THR_SN_EST +181 0x7E00 //RX_LAMBDA_PFILT +182 0x000A //RX_FENS_RESRV_0 +183 0x0000 //RX_FENS_RESRV_1 +184 0x7FB0 //RX_TDDRC_ALPHA_DWN_1 +185 0x7FB0 //RX_TDDRC_ALPHA_DWN_2 +186 0x7FB0 //RX_TDDRC_ALPHA_DWN_3 +187 0x0000 //RX_EXTRA_NS_L +188 0x0000 //RX_EXTRA_NS_A +189 0x7FB0 //RX_TDDRC_ALPHA_DWN_4 +190 0xDA9E //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +192 0x0000 //RX_A_POST_FLT +193 0x0000 //RX_LMT_THRD +194 0x4000 //RX_LMT_ALPHA +195 0x0020 //RX_FDEQ_SUBNUM +196 0x4848 //RX_FDEQ_GAIN_0 +197 0x4848 //RX_FDEQ_GAIN_1 +198 0x4848 //RX_FDEQ_GAIN_2 +199 0x4848 //RX_FDEQ_GAIN_3 +200 0x4848 //RX_FDEQ_GAIN_4 +201 0x4848 //RX_FDEQ_GAIN_5 +202 0x4848 //RX_FDEQ_GAIN_6 +203 0x4848 //RX_FDEQ_GAIN_7 +204 0x4848 //RX_FDEQ_GAIN_8 +205 0x4848 //RX_FDEQ_GAIN_9 +206 0x4848 //RX_FDEQ_GAIN_10 +207 0x4848 //RX_FDEQ_GAIN_11 +208 0x4848 //RX_FDEQ_GAIN_12 +209 0x4848 //RX_FDEQ_GAIN_13 +210 0x4848 //RX_FDEQ_GAIN_14 +211 0x4848 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0000 //RX_FDEQ_BIN_0 +221 0x0000 //RX_FDEQ_BIN_1 +222 0x0000 //RX_FDEQ_BIN_2 +223 0x0000 //RX_FDEQ_BIN_3 +224 0x0000 //RX_FDEQ_BIN_4 +225 0x0000 //RX_FDEQ_BIN_5 +226 0x0000 //RX_FDEQ_BIN_6 +227 0x0000 //RX_FDEQ_BIN_7 +228 0x0000 //RX_FDEQ_BIN_8 +229 0x0000 //RX_FDEQ_BIN_9 +230 0x0000 //RX_FDEQ_BIN_10 +231 0x0000 //RX_FDEQ_BIN_11 +232 0x0000 //RX_FDEQ_BIN_12 +233 0x0000 //RX_FDEQ_BIN_13 +234 0x0000 //RX_FDEQ_BIN_14 +235 0x0000 //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x0000 //RX_FDEQ_RESRV_0 +245 0x0000 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0030 //RX_FDDRC_BAND_MARGIN_1 +248 0x0050 //RX_FDDRC_BAND_MARGIN_2 +249 0x0080 //RX_FDDRC_BAND_MARGIN_3 +250 0x0004 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x5000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x6400 //RX_FDDRC_THRD_3_2 +258 0x6400 //RX_FDDRC_THRD_3_3 +259 0x2000 //RX_FDDRC_SLANT_0_0 +260 0x2000 //RX_FDDRC_SLANT_0_1 +261 0x2000 //RX_FDDRC_SLANT_0_2 +262 0x2000 //RX_FDDRC_SLANT_0_3 +263 0x2000 //RX_FDDRC_SLANT_1_0 +264 0x2000 //RX_FDDRC_SLANT_1_1 +265 0x2000 //RX_FDDRC_SLANT_1_2 +266 0x2000 //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +268 0x0003 //RX_FILTINDX +269 0x0000 //RX_TDDRC_THRD_0 +270 0x0000 //RX_TDDRC_THRD_1 +271 0x0E80 //RX_TDDRC_THRD_2 +272 0x3800 //RX_TDDRC_THRD_3 +273 0x2A00 //RX_TDDRC_SLANT_0 +274 0x6E00 //RX_TDDRC_SLANT_1 +275 0x3000 //RX_TDDRC_ALPHA_UP_0 +276 0x7FB0 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x0000 //RX_TDDRC_HMNC_GAIN +279 0x0000 //RX_TDDRC_SMT_FLAG +280 0x0000 //RX_TDDRC_SMT_W +281 0x0100 //RX_TDDRC_DRC_GAIN +282 0x7C00 //RX_LAMBDA_PKA_FP +283 0x2000 //RX_TPKA_FP +284 0x0080 //RX_MIN_G_FP +285 0x2000 //RX_MAX_G_FP +286 0x0100 //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 +288 0x0010 //RX_MAXLEVEL_CNG +289 0x0000 //RX_BWE_UV_TH +290 0x0000 //RX_BWE_UV_TH2 +291 0x0000 //RX_BWE_UV_TH3 +292 0x0000 //RX_BWE_V_TH +293 0x0000 //RX_BWE_GAIN1_V_TH1 +294 0x0000 //RX_BWE_GAIN1_V_TH2 +295 0x0000 //RX_BWE_UV_EQ +296 0x0000 //RX_BWE_V_EQ +297 0x0000 //RX_BWE_TONE_TH +298 0x0000 //RX_BWE_UV_HOLD_T +299 0x0000 //RX_BWE_GAIN2_ALPHA +300 0x0000 //RX_BWE_GAIN3_ALPHA +301 0x0000 //RX_BWE_CUTOFF +302 0x0000 //RX_BWE_GAINFILL +303 0x0000 //RX_BWE_MAXTH_TONE +304 0x0000 //RX_BWE_EQ_0 +305 0x0000 //RX_BWE_EQ_1 +306 0x0000 //RX_BWE_EQ_2 +307 0x0000 //RX_BWE_EQ_3 +308 0x0000 //RX_BWE_EQ_4 +309 0x0000 //RX_BWE_EQ_5 +310 0x0000 //RX_BWE_EQ_6 +311 0x0000 //RX_BWE_RESRV_0 +312 0x0000 //RX_BWE_RESRV_1 +313 0x0000 //RX_BWE_RESRV_2 +#VOL 0 +163 0x3000 //RX_TDDRC_ALPHA_UP_1 +164 0x3000 //RX_TDDRC_ALPHA_UP_2 +165 0x3000 //RX_TDDRC_ALPHA_UP_3 +166 0x3000 //RX_TDDRC_ALPHA_UP_4 +184 0x7FB0 //RX_TDDRC_ALPHA_DWN_1 +185 0x7FB0 //RX_TDDRC_ALPHA_DWN_2 +186 0x7FB0 //RX_TDDRC_ALPHA_DWN_3 +189 0x7FB0 //RX_TDDRC_ALPHA_DWN_4 +190 0xDA9E //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +269 0x0000 //RX_TDDRC_THRD_0 +270 0x0000 //RX_TDDRC_THRD_1 +271 0x0E80 //RX_TDDRC_THRD_2 +272 0x3800 //RX_TDDRC_THRD_3 +273 0x2A00 //RX_TDDRC_SLANT_0 +274 0x6E00 //RX_TDDRC_SLANT_1 +275 0x3000 //RX_TDDRC_ALPHA_UP_0 +276 0x7FB0 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x0000 //RX_TDDRC_HMNC_GAIN +279 0x0000 //RX_TDDRC_SMT_FLAG +280 0x0000 //RX_TDDRC_SMT_W +281 0x0100 //RX_TDDRC_DRC_GAIN +195 0x0020 //RX_FDEQ_SUBNUM +196 0x4848 //RX_FDEQ_GAIN_0 +197 0x4848 //RX_FDEQ_GAIN_1 +198 0x4848 //RX_FDEQ_GAIN_2 +199 0x4848 //RX_FDEQ_GAIN_3 +200 0x4848 //RX_FDEQ_GAIN_4 +201 0x4848 //RX_FDEQ_GAIN_5 +202 0x4848 //RX_FDEQ_GAIN_6 +203 0x4848 //RX_FDEQ_GAIN_7 +204 0x4848 //RX_FDEQ_GAIN_8 +205 0x4848 //RX_FDEQ_GAIN_9 +206 0x4848 //RX_FDEQ_GAIN_10 +207 0x4848 //RX_FDEQ_GAIN_11 +208 0x4848 //RX_FDEQ_GAIN_12 +209 0x4848 //RX_FDEQ_GAIN_13 +210 0x4848 //RX_FDEQ_GAIN_14 +211 0x4848 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0000 //RX_FDEQ_BIN_0 +221 0x0000 //RX_FDEQ_BIN_1 +222 0x0000 //RX_FDEQ_BIN_2 +223 0x0000 //RX_FDEQ_BIN_3 +224 0x0000 //RX_FDEQ_BIN_4 +225 0x0000 //RX_FDEQ_BIN_5 +226 0x0000 //RX_FDEQ_BIN_6 +227 0x0000 //RX_FDEQ_BIN_7 +228 0x0000 //RX_FDEQ_BIN_8 +229 0x0000 //RX_FDEQ_BIN_9 +230 0x0000 //RX_FDEQ_BIN_10 +231 0x0000 //RX_FDEQ_BIN_11 +232 0x0000 //RX_FDEQ_BIN_12 +233 0x0000 //RX_FDEQ_BIN_13 +234 0x0000 //RX_FDEQ_BIN_14 +235 0x0000 //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x0000 //RX_FDEQ_RESRV_0 +245 0x0000 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0030 //RX_FDDRC_BAND_MARGIN_1 +248 0x0050 //RX_FDDRC_BAND_MARGIN_2 +249 0x0080 //RX_FDDRC_BAND_MARGIN_3 +250 0x0004 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x5000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x6400 //RX_FDDRC_THRD_3_2 +258 0x6400 //RX_FDDRC_THRD_3_3 +259 0x2000 //RX_FDDRC_SLANT_0_0 +260 0x2000 //RX_FDDRC_SLANT_0_1 +261 0x2000 //RX_FDDRC_SLANT_0_2 +262 0x2000 //RX_FDDRC_SLANT_0_3 +263 0x2000 //RX_FDDRC_SLANT_1_0 +264 0x2000 //RX_FDDRC_SLANT_1_1 +265 0x2000 //RX_FDDRC_SLANT_1_2 +266 0x2000 //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +286 0x0100 //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 +#VOL 1 +163 0x3000 //RX_TDDRC_ALPHA_UP_1 +164 0x3000 //RX_TDDRC_ALPHA_UP_2 +165 0x3000 //RX_TDDRC_ALPHA_UP_3 +166 0x3000 //RX_TDDRC_ALPHA_UP_4 +184 0x7FB0 //RX_TDDRC_ALPHA_DWN_1 +185 0x7FB0 //RX_TDDRC_ALPHA_DWN_2 +186 0x7FB0 //RX_TDDRC_ALPHA_DWN_3 +189 0x7FB0 //RX_TDDRC_ALPHA_DWN_4 +190 0xDA9E //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +269 0x0000 //RX_TDDRC_THRD_0 +270 0x0000 //RX_TDDRC_THRD_1 +271 0x0E80 //RX_TDDRC_THRD_2 +272 0x3800 //RX_TDDRC_THRD_3 +273 0x2A00 //RX_TDDRC_SLANT_0 +274 0x6E00 //RX_TDDRC_SLANT_1 +275 0x3000 //RX_TDDRC_ALPHA_UP_0 +276 0x7FB0 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x0000 //RX_TDDRC_HMNC_GAIN +279 0x0000 //RX_TDDRC_SMT_FLAG +280 0x0000 //RX_TDDRC_SMT_W +281 0x0100 //RX_TDDRC_DRC_GAIN +195 0x0020 //RX_FDEQ_SUBNUM +196 0x4848 //RX_FDEQ_GAIN_0 +197 0x4848 //RX_FDEQ_GAIN_1 +198 0x4848 //RX_FDEQ_GAIN_2 +199 0x4848 //RX_FDEQ_GAIN_3 +200 0x4848 //RX_FDEQ_GAIN_4 +201 0x4848 //RX_FDEQ_GAIN_5 +202 0x4848 //RX_FDEQ_GAIN_6 +203 0x4848 //RX_FDEQ_GAIN_7 +204 0x4848 //RX_FDEQ_GAIN_8 +205 0x4848 //RX_FDEQ_GAIN_9 +206 0x4848 //RX_FDEQ_GAIN_10 +207 0x4848 //RX_FDEQ_GAIN_11 +208 0x4848 //RX_FDEQ_GAIN_12 +209 0x4848 //RX_FDEQ_GAIN_13 +210 0x4848 //RX_FDEQ_GAIN_14 +211 0x4848 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0000 //RX_FDEQ_BIN_0 +221 0x0000 //RX_FDEQ_BIN_1 +222 0x0000 //RX_FDEQ_BIN_2 +223 0x0000 //RX_FDEQ_BIN_3 +224 0x0000 //RX_FDEQ_BIN_4 +225 0x0000 //RX_FDEQ_BIN_5 +226 0x0000 //RX_FDEQ_BIN_6 +227 0x0000 //RX_FDEQ_BIN_7 +228 0x0000 //RX_FDEQ_BIN_8 +229 0x0000 //RX_FDEQ_BIN_9 +230 0x0000 //RX_FDEQ_BIN_10 +231 0x0000 //RX_FDEQ_BIN_11 +232 0x0000 //RX_FDEQ_BIN_12 +233 0x0000 //RX_FDEQ_BIN_13 +234 0x0000 //RX_FDEQ_BIN_14 +235 0x0000 //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x0000 //RX_FDEQ_RESRV_0 +245 0x0000 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0030 //RX_FDDRC_BAND_MARGIN_1 +248 0x0050 //RX_FDDRC_BAND_MARGIN_2 +249 0x0080 //RX_FDDRC_BAND_MARGIN_3 +250 0x0004 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x5000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x6400 //RX_FDDRC_THRD_3_2 +258 0x6400 //RX_FDDRC_THRD_3_3 +259 0x2000 //RX_FDDRC_SLANT_0_0 +260 0x2000 //RX_FDDRC_SLANT_0_1 +261 0x2000 //RX_FDDRC_SLANT_0_2 +262 0x2000 //RX_FDDRC_SLANT_0_3 +263 0x2000 //RX_FDDRC_SLANT_1_0 +264 0x2000 //RX_FDDRC_SLANT_1_1 +265 0x2000 //RX_FDDRC_SLANT_1_2 +266 0x2000 //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +286 0x0100 //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 +#VOL 2 +163 0x3000 //RX_TDDRC_ALPHA_UP_1 +164 0x3000 //RX_TDDRC_ALPHA_UP_2 +165 0x3000 //RX_TDDRC_ALPHA_UP_3 +166 0x3000 //RX_TDDRC_ALPHA_UP_4 +184 0x7FB0 //RX_TDDRC_ALPHA_DWN_1 +185 0x7FB0 //RX_TDDRC_ALPHA_DWN_2 +186 0x7FB0 //RX_TDDRC_ALPHA_DWN_3 +189 0x7FB0 //RX_TDDRC_ALPHA_DWN_4 +190 0xDA9E //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +269 0x0000 //RX_TDDRC_THRD_0 +270 0x0000 //RX_TDDRC_THRD_1 +271 0x0E80 //RX_TDDRC_THRD_2 +272 0x3800 //RX_TDDRC_THRD_3 +273 0x2A00 //RX_TDDRC_SLANT_0 +274 0x6E00 //RX_TDDRC_SLANT_1 +275 0x3000 //RX_TDDRC_ALPHA_UP_0 +276 0x7FB0 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x0000 //RX_TDDRC_HMNC_GAIN +279 0x0000 //RX_TDDRC_SMT_FLAG +280 0x0000 //RX_TDDRC_SMT_W +281 0x0100 //RX_TDDRC_DRC_GAIN +195 0x0020 //RX_FDEQ_SUBNUM +196 0x4848 //RX_FDEQ_GAIN_0 +197 0x4848 //RX_FDEQ_GAIN_1 +198 0x4848 //RX_FDEQ_GAIN_2 +199 0x4848 //RX_FDEQ_GAIN_3 +200 0x4848 //RX_FDEQ_GAIN_4 +201 0x4848 //RX_FDEQ_GAIN_5 +202 0x4848 //RX_FDEQ_GAIN_6 +203 0x4848 //RX_FDEQ_GAIN_7 +204 0x4848 //RX_FDEQ_GAIN_8 +205 0x4848 //RX_FDEQ_GAIN_9 +206 0x4848 //RX_FDEQ_GAIN_10 +207 0x4848 //RX_FDEQ_GAIN_11 +208 0x4848 //RX_FDEQ_GAIN_12 +209 0x4848 //RX_FDEQ_GAIN_13 +210 0x4848 //RX_FDEQ_GAIN_14 +211 0x4848 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0000 //RX_FDEQ_BIN_0 +221 0x0000 //RX_FDEQ_BIN_1 +222 0x0000 //RX_FDEQ_BIN_2 +223 0x0000 //RX_FDEQ_BIN_3 +224 0x0000 //RX_FDEQ_BIN_4 +225 0x0000 //RX_FDEQ_BIN_5 +226 0x0000 //RX_FDEQ_BIN_6 +227 0x0000 //RX_FDEQ_BIN_7 +228 0x0000 //RX_FDEQ_BIN_8 +229 0x0000 //RX_FDEQ_BIN_9 +230 0x0000 //RX_FDEQ_BIN_10 +231 0x0000 //RX_FDEQ_BIN_11 +232 0x0000 //RX_FDEQ_BIN_12 +233 0x0000 //RX_FDEQ_BIN_13 +234 0x0000 //RX_FDEQ_BIN_14 +235 0x0000 //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x0000 //RX_FDEQ_RESRV_0 +245 0x0000 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0030 //RX_FDDRC_BAND_MARGIN_1 +248 0x0050 //RX_FDDRC_BAND_MARGIN_2 +249 0x0080 //RX_FDDRC_BAND_MARGIN_3 +250 0x0004 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x5000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x6400 //RX_FDDRC_THRD_3_2 +258 0x6400 //RX_FDDRC_THRD_3_3 +259 0x2000 //RX_FDDRC_SLANT_0_0 +260 0x2000 //RX_FDDRC_SLANT_0_1 +261 0x2000 //RX_FDDRC_SLANT_0_2 +262 0x2000 //RX_FDDRC_SLANT_0_3 +263 0x2000 //RX_FDDRC_SLANT_1_0 +264 0x2000 //RX_FDDRC_SLANT_1_1 +265 0x2000 //RX_FDDRC_SLANT_1_2 +266 0x2000 //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +286 0x0100 //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 +#VOL 3 +163 0x3000 //RX_TDDRC_ALPHA_UP_1 +164 0x3000 //RX_TDDRC_ALPHA_UP_2 +165 0x3000 //RX_TDDRC_ALPHA_UP_3 +166 0x3000 //RX_TDDRC_ALPHA_UP_4 +184 0x7FB0 //RX_TDDRC_ALPHA_DWN_1 +185 0x7FB0 //RX_TDDRC_ALPHA_DWN_2 +186 0x7FB0 //RX_TDDRC_ALPHA_DWN_3 +189 0x7FB0 //RX_TDDRC_ALPHA_DWN_4 +190 0xDA9E //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +269 0x0000 //RX_TDDRC_THRD_0 +270 0x0000 //RX_TDDRC_THRD_1 +271 0x0E80 //RX_TDDRC_THRD_2 +272 0x3800 //RX_TDDRC_THRD_3 +273 0x2A00 //RX_TDDRC_SLANT_0 +274 0x6E00 //RX_TDDRC_SLANT_1 +275 0x3000 //RX_TDDRC_ALPHA_UP_0 +276 0x7FB0 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x0000 //RX_TDDRC_HMNC_GAIN +279 0x0000 //RX_TDDRC_SMT_FLAG +280 0x0000 //RX_TDDRC_SMT_W +281 0x0100 //RX_TDDRC_DRC_GAIN +195 0x0020 //RX_FDEQ_SUBNUM +196 0x4848 //RX_FDEQ_GAIN_0 +197 0x4848 //RX_FDEQ_GAIN_1 +198 0x4848 //RX_FDEQ_GAIN_2 +199 0x4848 //RX_FDEQ_GAIN_3 +200 0x4848 //RX_FDEQ_GAIN_4 +201 0x4848 //RX_FDEQ_GAIN_5 +202 0x4848 //RX_FDEQ_GAIN_6 +203 0x4848 //RX_FDEQ_GAIN_7 +204 0x4848 //RX_FDEQ_GAIN_8 +205 0x4848 //RX_FDEQ_GAIN_9 +206 0x4848 //RX_FDEQ_GAIN_10 +207 0x4848 //RX_FDEQ_GAIN_11 +208 0x4848 //RX_FDEQ_GAIN_12 +209 0x4848 //RX_FDEQ_GAIN_13 +210 0x4848 //RX_FDEQ_GAIN_14 +211 0x4848 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0000 //RX_FDEQ_BIN_0 +221 0x0000 //RX_FDEQ_BIN_1 +222 0x0000 //RX_FDEQ_BIN_2 +223 0x0000 //RX_FDEQ_BIN_3 +224 0x0000 //RX_FDEQ_BIN_4 +225 0x0000 //RX_FDEQ_BIN_5 +226 0x0000 //RX_FDEQ_BIN_6 +227 0x0000 //RX_FDEQ_BIN_7 +228 0x0000 //RX_FDEQ_BIN_8 +229 0x0000 //RX_FDEQ_BIN_9 +230 0x0000 //RX_FDEQ_BIN_10 +231 0x0000 //RX_FDEQ_BIN_11 +232 0x0000 //RX_FDEQ_BIN_12 +233 0x0000 //RX_FDEQ_BIN_13 +234 0x0000 //RX_FDEQ_BIN_14 +235 0x0000 //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x0000 //RX_FDEQ_RESRV_0 +245 0x0000 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0030 //RX_FDDRC_BAND_MARGIN_1 +248 0x0050 //RX_FDDRC_BAND_MARGIN_2 +249 0x0080 //RX_FDDRC_BAND_MARGIN_3 +250 0x0004 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x5000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x6400 //RX_FDDRC_THRD_3_2 +258 0x6400 //RX_FDDRC_THRD_3_3 +259 0x2000 //RX_FDDRC_SLANT_0_0 +260 0x2000 //RX_FDDRC_SLANT_0_1 +261 0x2000 //RX_FDDRC_SLANT_0_2 +262 0x2000 //RX_FDDRC_SLANT_0_3 +263 0x2000 //RX_FDDRC_SLANT_1_0 +264 0x2000 //RX_FDDRC_SLANT_1_1 +265 0x2000 //RX_FDDRC_SLANT_1_2 +266 0x2000 //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +286 0x0100 //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 +#VOL 4 +163 0x3000 //RX_TDDRC_ALPHA_UP_1 +164 0x3000 //RX_TDDRC_ALPHA_UP_2 +165 0x3000 //RX_TDDRC_ALPHA_UP_3 +166 0x3000 //RX_TDDRC_ALPHA_UP_4 +184 0x7FB0 //RX_TDDRC_ALPHA_DWN_1 +185 0x7FB0 //RX_TDDRC_ALPHA_DWN_2 +186 0x7FB0 //RX_TDDRC_ALPHA_DWN_3 +189 0x7FB0 //RX_TDDRC_ALPHA_DWN_4 +190 0xDA9E //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +269 0x0000 //RX_TDDRC_THRD_0 +270 0x0000 //RX_TDDRC_THRD_1 +271 0x0E80 //RX_TDDRC_THRD_2 +272 0x3800 //RX_TDDRC_THRD_3 +273 0x2A00 //RX_TDDRC_SLANT_0 +274 0x6E00 //RX_TDDRC_SLANT_1 +275 0x3000 //RX_TDDRC_ALPHA_UP_0 +276 0x7FB0 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x0000 //RX_TDDRC_HMNC_GAIN +279 0x0000 //RX_TDDRC_SMT_FLAG +280 0x0000 //RX_TDDRC_SMT_W +281 0x0100 //RX_TDDRC_DRC_GAIN +195 0x0020 //RX_FDEQ_SUBNUM +196 0x4848 //RX_FDEQ_GAIN_0 +197 0x4848 //RX_FDEQ_GAIN_1 +198 0x4848 //RX_FDEQ_GAIN_2 +199 0x4848 //RX_FDEQ_GAIN_3 +200 0x4848 //RX_FDEQ_GAIN_4 +201 0x4848 //RX_FDEQ_GAIN_5 +202 0x4848 //RX_FDEQ_GAIN_6 +203 0x4848 //RX_FDEQ_GAIN_7 +204 0x4848 //RX_FDEQ_GAIN_8 +205 0x4848 //RX_FDEQ_GAIN_9 +206 0x4848 //RX_FDEQ_GAIN_10 +207 0x4848 //RX_FDEQ_GAIN_11 +208 0x4848 //RX_FDEQ_GAIN_12 +209 0x4848 //RX_FDEQ_GAIN_13 +210 0x4848 //RX_FDEQ_GAIN_14 +211 0x4848 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0000 //RX_FDEQ_BIN_0 +221 0x0000 //RX_FDEQ_BIN_1 +222 0x0000 //RX_FDEQ_BIN_2 +223 0x0000 //RX_FDEQ_BIN_3 +224 0x0000 //RX_FDEQ_BIN_4 +225 0x0000 //RX_FDEQ_BIN_5 +226 0x0000 //RX_FDEQ_BIN_6 +227 0x0000 //RX_FDEQ_BIN_7 +228 0x0000 //RX_FDEQ_BIN_8 +229 0x0000 //RX_FDEQ_BIN_9 +230 0x0000 //RX_FDEQ_BIN_10 +231 0x0000 //RX_FDEQ_BIN_11 +232 0x0000 //RX_FDEQ_BIN_12 +233 0x0000 //RX_FDEQ_BIN_13 +234 0x0000 //RX_FDEQ_BIN_14 +235 0x0000 //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x0000 //RX_FDEQ_RESRV_0 +245 0x0000 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0030 //RX_FDDRC_BAND_MARGIN_1 +248 0x0050 //RX_FDDRC_BAND_MARGIN_2 +249 0x0080 //RX_FDDRC_BAND_MARGIN_3 +250 0x0004 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x5000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x6400 //RX_FDDRC_THRD_3_2 +258 0x6400 //RX_FDDRC_THRD_3_3 +259 0x2000 //RX_FDDRC_SLANT_0_0 +260 0x2000 //RX_FDDRC_SLANT_0_1 +261 0x2000 //RX_FDDRC_SLANT_0_2 +262 0x2000 //RX_FDDRC_SLANT_0_3 +263 0x2000 //RX_FDDRC_SLANT_1_0 +264 0x2000 //RX_FDDRC_SLANT_1_1 +265 0x2000 //RX_FDDRC_SLANT_1_2 +266 0x2000 //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +286 0x0100 //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 +#VOL 5 +163 0x3000 //RX_TDDRC_ALPHA_UP_1 +164 0x3000 //RX_TDDRC_ALPHA_UP_2 +165 0x3000 //RX_TDDRC_ALPHA_UP_3 +166 0x3000 //RX_TDDRC_ALPHA_UP_4 +184 0x7FB0 //RX_TDDRC_ALPHA_DWN_1 +185 0x7FB0 //RX_TDDRC_ALPHA_DWN_2 +186 0x7FB0 //RX_TDDRC_ALPHA_DWN_3 +189 0x7FB0 //RX_TDDRC_ALPHA_DWN_4 +190 0xDA9E //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +269 0x0000 //RX_TDDRC_THRD_0 +270 0x0000 //RX_TDDRC_THRD_1 +271 0x0E80 //RX_TDDRC_THRD_2 +272 0x3800 //RX_TDDRC_THRD_3 +273 0x2A00 //RX_TDDRC_SLANT_0 +274 0x6E00 //RX_TDDRC_SLANT_1 +275 0x3000 //RX_TDDRC_ALPHA_UP_0 +276 0x7FB0 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x0000 //RX_TDDRC_HMNC_GAIN +279 0x0000 //RX_TDDRC_SMT_FLAG +280 0x0000 //RX_TDDRC_SMT_W +281 0x0100 //RX_TDDRC_DRC_GAIN +195 0x0020 //RX_FDEQ_SUBNUM +196 0x4848 //RX_FDEQ_GAIN_0 +197 0x4848 //RX_FDEQ_GAIN_1 +198 0x4848 //RX_FDEQ_GAIN_2 +199 0x4848 //RX_FDEQ_GAIN_3 +200 0x4848 //RX_FDEQ_GAIN_4 +201 0x4848 //RX_FDEQ_GAIN_5 +202 0x4848 //RX_FDEQ_GAIN_6 +203 0x4848 //RX_FDEQ_GAIN_7 +204 0x4848 //RX_FDEQ_GAIN_8 +205 0x4848 //RX_FDEQ_GAIN_9 +206 0x4848 //RX_FDEQ_GAIN_10 +207 0x4848 //RX_FDEQ_GAIN_11 +208 0x4848 //RX_FDEQ_GAIN_12 +209 0x4848 //RX_FDEQ_GAIN_13 +210 0x4848 //RX_FDEQ_GAIN_14 +211 0x4848 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0000 //RX_FDEQ_BIN_0 +221 0x0000 //RX_FDEQ_BIN_1 +222 0x0000 //RX_FDEQ_BIN_2 +223 0x0000 //RX_FDEQ_BIN_3 +224 0x0000 //RX_FDEQ_BIN_4 +225 0x0000 //RX_FDEQ_BIN_5 +226 0x0000 //RX_FDEQ_BIN_6 +227 0x0000 //RX_FDEQ_BIN_7 +228 0x0000 //RX_FDEQ_BIN_8 +229 0x0000 //RX_FDEQ_BIN_9 +230 0x0000 //RX_FDEQ_BIN_10 +231 0x0000 //RX_FDEQ_BIN_11 +232 0x0000 //RX_FDEQ_BIN_12 +233 0x0000 //RX_FDEQ_BIN_13 +234 0x0000 //RX_FDEQ_BIN_14 +235 0x0000 //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x0000 //RX_FDEQ_RESRV_0 +245 0x0000 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0030 //RX_FDDRC_BAND_MARGIN_1 +248 0x0050 //RX_FDDRC_BAND_MARGIN_2 +249 0x0080 //RX_FDDRC_BAND_MARGIN_3 +250 0x0004 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x5000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x6400 //RX_FDDRC_THRD_3_2 +258 0x6400 //RX_FDDRC_THRD_3_3 +259 0x2000 //RX_FDDRC_SLANT_0_0 +260 0x2000 //RX_FDDRC_SLANT_0_1 +261 0x2000 //RX_FDDRC_SLANT_0_2 +262 0x2000 //RX_FDDRC_SLANT_0_3 +263 0x2000 //RX_FDDRC_SLANT_1_0 +264 0x2000 //RX_FDDRC_SLANT_1_1 +265 0x2000 //RX_FDDRC_SLANT_1_2 +266 0x2000 //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +286 0x0100 //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 +#VOL 6 +163 0x3000 //RX_TDDRC_ALPHA_UP_1 +164 0x3000 //RX_TDDRC_ALPHA_UP_2 +165 0x3000 //RX_TDDRC_ALPHA_UP_3 +166 0x3000 //RX_TDDRC_ALPHA_UP_4 +184 0x7FB0 //RX_TDDRC_ALPHA_DWN_1 +185 0x7FB0 //RX_TDDRC_ALPHA_DWN_2 +186 0x7FB0 //RX_TDDRC_ALPHA_DWN_3 +189 0x7FB0 //RX_TDDRC_ALPHA_DWN_4 +190 0xDA9E //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +269 0x0000 //RX_TDDRC_THRD_0 +270 0x0000 //RX_TDDRC_THRD_1 +271 0x0E80 //RX_TDDRC_THRD_2 +272 0x3800 //RX_TDDRC_THRD_3 +273 0x2A00 //RX_TDDRC_SLANT_0 +274 0x6E00 //RX_TDDRC_SLANT_1 +275 0x3000 //RX_TDDRC_ALPHA_UP_0 +276 0x7FB0 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x0000 //RX_TDDRC_HMNC_GAIN +279 0x0000 //RX_TDDRC_SMT_FLAG +280 0x0000 //RX_TDDRC_SMT_W +281 0x0100 //RX_TDDRC_DRC_GAIN +195 0x0020 //RX_FDEQ_SUBNUM +196 0x4848 //RX_FDEQ_GAIN_0 +197 0x4848 //RX_FDEQ_GAIN_1 +198 0x4848 //RX_FDEQ_GAIN_2 +199 0x4848 //RX_FDEQ_GAIN_3 +200 0x4848 //RX_FDEQ_GAIN_4 +201 0x4848 //RX_FDEQ_GAIN_5 +202 0x4848 //RX_FDEQ_GAIN_6 +203 0x4848 //RX_FDEQ_GAIN_7 +204 0x4848 //RX_FDEQ_GAIN_8 +205 0x4848 //RX_FDEQ_GAIN_9 +206 0x4848 //RX_FDEQ_GAIN_10 +207 0x4848 //RX_FDEQ_GAIN_11 +208 0x4848 //RX_FDEQ_GAIN_12 +209 0x4848 //RX_FDEQ_GAIN_13 +210 0x4848 //RX_FDEQ_GAIN_14 +211 0x4848 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0000 //RX_FDEQ_BIN_0 +221 0x0000 //RX_FDEQ_BIN_1 +222 0x0000 //RX_FDEQ_BIN_2 +223 0x0000 //RX_FDEQ_BIN_3 +224 0x0000 //RX_FDEQ_BIN_4 +225 0x0000 //RX_FDEQ_BIN_5 +226 0x0000 //RX_FDEQ_BIN_6 +227 0x0000 //RX_FDEQ_BIN_7 +228 0x0000 //RX_FDEQ_BIN_8 +229 0x0000 //RX_FDEQ_BIN_9 +230 0x0000 //RX_FDEQ_BIN_10 +231 0x0000 //RX_FDEQ_BIN_11 +232 0x0000 //RX_FDEQ_BIN_12 +233 0x0000 //RX_FDEQ_BIN_13 +234 0x0000 //RX_FDEQ_BIN_14 +235 0x0000 //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x0000 //RX_FDEQ_RESRV_0 +245 0x0000 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0030 //RX_FDDRC_BAND_MARGIN_1 +248 0x0050 //RX_FDDRC_BAND_MARGIN_2 +249 0x0080 //RX_FDDRC_BAND_MARGIN_3 +250 0x0004 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x5000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x6400 //RX_FDDRC_THRD_3_2 +258 0x6400 //RX_FDDRC_THRD_3_3 +259 0x2000 //RX_FDDRC_SLANT_0_0 +260 0x2000 //RX_FDDRC_SLANT_0_1 +261 0x2000 //RX_FDDRC_SLANT_0_2 +262 0x2000 //RX_FDDRC_SLANT_0_3 +263 0x2000 //RX_FDDRC_SLANT_1_0 +264 0x2000 //RX_FDDRC_SLANT_1_1 +265 0x2000 //RX_FDDRC_SLANT_1_2 +266 0x2000 //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +286 0x0100 //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 #CASE_NAME HEADSET-TTY_FULL-VOICE_GENERIC-WB -#PARAM_MODE FULL -#PARAM_TYPE TX+RX -#TOTAL_CUSTOM_STEP 7 +#PARAM_MODE Full +#PARAM_TYPE TX+2RX +#TOTAL_CUSTOM_STEP 7+7 #TX 0 0x0001 //TX_OPERATION_MODE_0 1 0x0000 //TX_OPERATION_MODE_1 @@ -51116,7 +77680,7 @@ 239 0x0000 //TX_DT_RESRV_7 240 0x0000 //TX_DT_RESRV_8 241 0x0000 //TX_DT_RESRV_9 -242 0xF200 //TX_THR_SN_EST_0 +242 0xFA00 //TX_THR_SN_EST_0 243 0xF400 //TX_THR_SN_EST_1 244 0xF800 //TX_THR_SN_EST_2 245 0xF600 //TX_THR_SN_EST_3 @@ -51125,12 +77689,12 @@ 248 0xF800 //TX_THR_SN_EST_6 249 0xF800 //TX_THR_SN_EST_7 250 0x0100 //TX_DELTA_THR_SN_EST_0 -251 0x0000 //TX_DELTA_THR_SN_EST_1 +251 0x0100 //TX_DELTA_THR_SN_EST_1 252 0x0100 //TX_DELTA_THR_SN_EST_2 -253 0x0100 //TX_DELTA_THR_SN_EST_3 +253 0x0200 //TX_DELTA_THR_SN_EST_3 254 0x0200 //TX_DELTA_THR_SN_EST_4 255 0x0200 //TX_DELTA_THR_SN_EST_5 -256 0x0200 //TX_DELTA_THR_SN_EST_6 +256 0x0000 //TX_DELTA_THR_SN_EST_6 257 0x0200 //TX_DELTA_THR_SN_EST_7 258 0x4000 //TX_LAMBDA_NN_EST_0 259 0x4000 //TX_LAMBDA_NN_EST_1 @@ -51156,12 +77720,12 @@ 279 0x0000 //TX_B_POST_FLT_0 280 0x0000 //TX_B_POST_FLT_1 281 0x001A //TX_NS_LVL_CTRL_0 -282 0x001A //TX_NS_LVL_CTRL_1 +282 0x0014 //TX_NS_LVL_CTRL_1 283 0x0014 //TX_NS_LVL_CTRL_2 -284 0x0014 //TX_NS_LVL_CTRL_3 +284 0x000C //TX_NS_LVL_CTRL_3 285 0x000C //TX_NS_LVL_CTRL_4 286 0x000C //TX_NS_LVL_CTRL_5 -287 0x000C //TX_NS_LVL_CTRL_6 +287 0x001A //TX_NS_LVL_CTRL_6 288 0x000C //TX_NS_LVL_CTRL_7 289 0x000E //TX_MIN_GAIN_S_0 290 0x0014 //TX_MIN_GAIN_S_1 @@ -51177,10 +77741,10 @@ 300 0x7FFF //TX_SNRI_SUP_0 301 0x7FFF //TX_SNRI_SUP_1 302 0x7FFF //TX_SNRI_SUP_2 -303 0x7FFF //TX_SNRI_SUP_3 +303 0x4000 //TX_SNRI_SUP_3 304 0x4000 //TX_SNRI_SUP_4 305 0x4000 //TX_SNRI_SUP_5 -306 0x4000 //TX_SNRI_SUP_6 +306 0x7FFF //TX_SNRI_SUP_6 307 0x4000 //TX_SNRI_SUP_7 308 0x1200 //TX_THR_LFNS 309 0x0147 //TX_G_LFNS @@ -51189,12 +77753,12 @@ 312 0x7FFF //TX_A_POST_FILT_0 313 0x7FFF //TX_A_POST_FILT_1 314 0x4000 //TX_A_POST_FILT_S_0 -315 0x199A //TX_A_POST_FILT_S_1 +315 0x1000 //TX_A_POST_FILT_S_1 316 0x1000 //TX_A_POST_FILT_S_2 -317 0x1000 //TX_A_POST_FILT_S_3 +317 0x6666 //TX_A_POST_FILT_S_3 318 0x6666 //TX_A_POST_FILT_S_4 319 0x6666 //TX_A_POST_FILT_S_5 -320 0x6666 //TX_A_POST_FILT_S_6 +320 0x199A //TX_A_POST_FILT_S_6 321 0x6666 //TX_A_POST_FILT_S_7 322 0x2000 //TX_B_POST_FILT_0 323 0x2000 //TX_B_POST_FILT_1 @@ -51241,7 +77805,7 @@ 364 0x0000 //TX_K_APT 365 0x0001 //TX_NOISEDET 366 0x05A0 //TX_NDETCT -367 0x000A //TX_NOISE_TH_0 +367 0x0102 //TX_NOISE_TH_0 368 0x1388 //TX_NOISE_TH_0_2 369 0x3A98 //TX_NOISE_TH_0_3 370 0x0C80 //TX_NOISE_TH_1 @@ -51253,11 +77817,11 @@ 376 0x7FFF //TX_NOISE_TH_5_3 377 0x7FFF //TX_NOISE_TH_5_4 378 0x00C8 //TX_NOISE_TH_6 -379 0x000A //TX_MINENOISE_TH -380 0x0000 //TX_MINENOISE_MIC0_TH_MTS -381 0x0000 //TX_MINENOISE_MIC0_TH_EXP -382 0x0000 //TX_MINENOISE_MIC0_S_TH_MTS -383 0x0000 //TX_MINENOISE_MIC0_S_TH_EXP +379 0x00F8 //TX_MINENOISE_TH +380 0xD508 //TX_MORENS_TFMASK_TH +381 0x0001 //TX_DRC_QUIET_FLOOR +382 0x3A98 //TX_RATIODTL_CUT_TH +383 0x0DAC //TX_DT_CUT_K1 384 0x6400 //TX_OUT_ENER_S_TH_CLEAN 385 0x6400 //TX_OUT_ENER_S_TH_LESSCLEAN 386 0x6400 //TX_OUT_ENER_S_TH_NOISY @@ -51265,22 +77829,22 @@ 388 0x7D00 //TX_OUT_ENER_TH_SPEECH 389 0x0000 //TX_SN_NPB_GAIN 390 0x0000 //TX_NN_NPB_GAIN -391 0x0000 //TX_CSX_ALPHA_0 -392 0x0000 //TX_CSX_ALPHA_1 -393 0x0000 //TX_CSX_ALPHA_2 -394 0x0000 //TX_CSX_ALPHA_3 -395 0x0000 //TX_MU_ARSP_EST -396 0x0000 //TX_P_OUTBEAM_MIN_TH +391 0x7FFF //TX_POST_MASK_SUP_HSNE +392 0x1388 //TX_TAIL_DET_TH +393 0x4000 //TX_B_LESSCUT_RTO_WTA +394 0x0000 //TX_MEL_G_R +395 0x0080 //TX_SUPHIGH_TH +396 0x0000 //TX_MASK_G_R 397 0x0000 //TX_EXTRA_NS_L -398 0x0000 //TX_EXTRA_NS_A -399 0x0000 //TX_VR_NOISE_FLOOR_TH +398 0x1800 //TX_C_POST_FLT_MASK +399 0x7FFF //TX_A_POST_FLT_WNS 400 0x0000 //TX_MIN_G_LOW300HZ 401 0x0010 //TX_MAXLEVEL_CNG 402 0x0000 //TX_STN_NOISE_TH 403 0x0000 //TX_POST_MASK_SUP 404 0x0000 //TX_POST_MASK_ADJUST 405 0x0014 //TX_NS_ENOISE_MIC0_TH -406 0x0014 //TX_MINENOISE_MIC0_TH +406 0x00DC //TX_MINENOISE_MIC0_TH 407 0x0226 //TX_MINENOISE_MIC0_S_TH 408 0x2879 //TX_MIN_G_CTRL_SSNS 409 0x0400 //TX_METAL_RTO_THR @@ -51388,16 +77952,16 @@ 511 0x6666 //TX_MIC_TO_BFGAIN 512 0x6666 //TX_MICTOBFGAIN0 513 0x0014 //TX_FASTMUE_TH -514 0x0000 //TX_DERVB_LEN_0 -515 0x0000 //TX_DERVB_LEN_1 -516 0x0000 //TX_RHO_DERVB -517 0x0000 //TX_MIC_INDX_DERVB -518 0x0000 //TX_MU_DERVB -519 0x0000 //TX_DR_RESRV_0 -520 0x0000 //TX_DR_RESRV_1 -521 0x0000 //TX_DR_RESRV_2 -522 0x0000 //TX_DR_RESRV_3 -523 0x0000 //TX_DR_RESRV_4 +514 0xC000 //TX_DEREVERB_LF_MU +515 0xC000 //TX_DEREVERB_HF_MU +516 0xCCCC //TX_DEREVERB_DELAY +517 0xD999 //TX_DEREVERB_COEF_LEN +518 0x1F40 //TX_DEREVERB_DNR +519 0x0000 //TX_DEREVERB_ALPHA +520 0x0000 //TX_DEREVERB_BETA +521 0x0000 //TX_GSC_RTOL_TH +522 0x7000 //TX_GSC_RTOH_TH +523 0x0064 //TX_WIDE2_MEANHTH 524 0x0000 //TX_DR_RESRV_5 525 0x0000 //TX_DR_RESRV_6 526 0x0000 //TX_DR_RESRV_7 @@ -51763,16 +78327,81 @@ 886 0x0000 //TX_FASTNS_TFMASKBIN_TH2 887 0x0000 //TX_FASTNS_TFMASKBIN_TH3 888 0x00C8 //TX_FASTNS_ARSPC_TH -889 0xD99A //TX_FASTNS_MASK5_TH +889 0xC000 //TX_FASTNS_MASK5_TH 890 0x051F //TX_POSTSSA_MIN_G_VR_MASK -891 0x7FFF //TX_A_LESSCUT_RTO_MASK +891 0x4000 //TX_A_LESSCUT_RTO_MASK 892 0x1770 //TX_FASTNS_NOISETH 893 0xC000 //TX_FASTNS_SSA_THLFL 894 0xC000 //TX_FASTNS_SSA_THHFL 895 0xCCCC //TX_FASTNS_SSA_THLFH 896 0xD999 //TX_FASTNS_SSA_THHFH +897 0x2339 //TX_SENDFUNC_REG_MICMUTE +898 0x0021 //TX_SENDFUNC_REG_MICMUTE1 +899 0x02BC //TX_MICMUTE_RATIO_THR +900 0x0140 //TX_MICMUTE_AMP_THR +901 0x0004 //TX_MICMUTE_HPF_IND +902 0x00C0 //TX_MICMUTE_LOG_EYR_TH +903 0x0008 //TX_MICMUTE_CVG_TIME +904 0x0008 //TX_MICMUTE_RELEASE_TIME +905 0x01FE //TX_MIC_VOLUME_MIC0MUTE +906 0x0020 //TX_MICMUTE_EPD_OFFSET_0 +907 0x001E //TX_MICMUTE_FRQ_AEC_L +908 0x7999 //TX_MICMUTE_EAD_THR +909 0x7FFF //TX_MICMUTE_LAMBDA_CB_NLE +910 0x7FFF //TX_MICMUTE_LAMBDA_RE_EST +911 0x4000 //TX_DTD_THR1_MICMUTE_0 +912 0x7000 //TX_DTD_THR1_MICMUTE_1 +913 0x7FFF //TX_DTD_THR1_MICMUTE_2 +914 0x7FFF //TX_DTD_THR1_MICMUTE_3 +915 0x6CCC //TX_DTD_THR2_MICMUTE_0 +916 0x0400 //TX_MICMUTE_MIN_EQ_RE_EST_0 +917 0x0400 //TX_MICMUTE_MIN_EQ_RE_EST_1 +918 0x1000 //TX_MICMUTE_MIN_EQ_RE_EST_2 +919 0x7FFF //TX_MICMUTE_MIN_EQ_RE_EST_3 +920 0x7FFF //TX_MICMUTE_MIN_EQ_RE_EST_4 +921 0x4000 //TX_MICMUTE_C_POST_FLT +922 0x03E8 //TX_MICMUTE_DT_CUT_K +923 0x0001 //TX_MICMUTE_DT_CUT_THR +924 0x03E8 //TX_MICMUTE_DT_CUT_K2 +925 0x0001 //TX_MICMUTE_DT_CUT_THR2 +926 0x0064 //TX_MICMUTE_DT2_HOLD_N +927 0x1000 //TX_MICMUTE_RATIODTH_THCUT +928 0x1000 //TX_MICMUTE_B_POST_FLT_ECHOL +929 0x7FFF //TX_MICMUTE_B_POST_FLT_ECHOH +930 0x0400 //TX_MICMUTE_C_POST_FLT_MASK +931 0x7999 //TX_MICMUTE_RATIODTL_CUT_TH +932 0x0258 //TX_MICMUTE_DT_CUT_K1 +933 0x0800 //TX_MICMUTE_N2_SN_EST +934 0xFC00 //TX_MICMUTE_THR_SN_EST_0 +935 0x001C //TX_MICMUTE_MIN_G_CTRL_0 +936 0x6000 //TX_MICMUTE_A_POST_FILT_S_0 +937 0x7000 //TX_MICMUTE_B_POST_FILT_0 +938 0x2710 //TX_MIC1RUB_AMP_THR +939 0x0010 //TX_MIC1MUTE_RATIO_THR +940 0x0450 //TX_MIC1MUTE_AMP_THR +941 0x0008 //TX_MIC1MUTE_CVG_TIME +942 0x0008 //TX_MIC1MUTE_RELEASE_TIME +943 0x0000 //TX_AMS_RESRV_01 +944 0x0000 //TX_AMS_RESRV_02 +945 0x0000 //TX_AMS_RESRV_03 +946 0x0000 //TX_AMS_RESRV_04 +947 0x0000 //TX_AMS_RESRV_05 +948 0x0000 //TX_AMS_RESRV_06 +949 0x0000 //TX_AMS_RESRV_07 +950 0x0000 //TX_AMS_RESRV_08 +951 0x0000 //TX_AMS_RESRV_09 +952 0x0000 //TX_AMS_RESRV_10 +953 0x0000 //TX_AMS_RESRV_11 +954 0x0000 //TX_AMS_RESRV_12 +955 0x0000 //TX_AMS_RESRV_13 +956 0x0000 //TX_AMS_RESRV_14 +957 0x0000 //TX_AMS_RESRV_15 +958 0x0000 //TX_AMS_RESRV_16 +959 0x0000 //TX_AMS_RESRV_17 +960 0x0000 //TX_AMS_RESRV_18 +961 0x0000 //TX_AMS_RESRV_19 #RX -0 0x0040 //RX_RECVFUNC_MODE_0 +0 0x2040 //RX_RECVFUNC_MODE_0 1 0x0000 //RX_RECVFUNC_MODE_1 2 0x0000 //RX_SAMPLINGFREQ_SIG 3 0x0000 //RX_SAMPLINGFREQ_PROC @@ -52622,11 +79251,862 @@ 110 0x0000 //RX_FDDRC_RESRV_0 129 0x0100 //RX_SPK_VOL 130 0x0000 //RX_VOL_RESRV_0 +#RX 2 +157 0x2040 //RX_RECVFUNC_MODE_0 +158 0x0000 //RX_RECVFUNC_MODE_1 +159 0x0000 //RX_SAMPLINGFREQ_SIG +160 0x0000 //RX_SAMPLINGFREQ_PROC +161 0x000A //RX_FRAME_SZ +162 0x0000 //RX_DELAY_OPT +163 0x3000 //RX_TDDRC_ALPHA_UP_1 +164 0x3000 //RX_TDDRC_ALPHA_UP_2 +165 0x3000 //RX_TDDRC_ALPHA_UP_3 +166 0x3000 //RX_TDDRC_ALPHA_UP_4 +167 0x050D //RX_PGA +168 0x7652 //RX_A_HP +169 0x4000 //RX_B_PE +170 0x7800 //RX_THR_PITCH_DET_0 +171 0x7000 //RX_THR_PITCH_DET_1 +172 0x6000 //RX_THR_PITCH_DET_2 +173 0x0000 //RX_PITCH_BFR_LEN +174 0x0000 //RX_SBD_PITCH_DET +175 0x0000 //RX_PP_RESRV_0 +176 0x0000 //RX_PP_RESRV_1 +177 0xF800 //RX_N_SN_EST +178 0x0000 //RX_N2_SN_EST +179 0x000F //RX_NS_LVL_CTRL +180 0xF800 //RX_THR_SN_EST +181 0x7E00 //RX_LAMBDA_PFILT +182 0x000A //RX_FENS_RESRV_0 +183 0x0000 //RX_FENS_RESRV_1 +184 0x7FB0 //RX_TDDRC_ALPHA_DWN_1 +185 0x7FB0 //RX_TDDRC_ALPHA_DWN_2 +186 0x7FB0 //RX_TDDRC_ALPHA_DWN_3 +187 0x0000 //RX_EXTRA_NS_L +188 0x0000 //RX_EXTRA_NS_A +189 0x7FB0 //RX_TDDRC_ALPHA_DWN_4 +190 0xDA9E //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +192 0x0000 //RX_A_POST_FLT +193 0x0000 //RX_LMT_THRD +194 0x4000 //RX_LMT_ALPHA +195 0x0020 //RX_FDEQ_SUBNUM +196 0x4848 //RX_FDEQ_GAIN_0 +197 0x4848 //RX_FDEQ_GAIN_1 +198 0x4848 //RX_FDEQ_GAIN_2 +199 0x4848 //RX_FDEQ_GAIN_3 +200 0x4848 //RX_FDEQ_GAIN_4 +201 0x4848 //RX_FDEQ_GAIN_5 +202 0x4848 //RX_FDEQ_GAIN_6 +203 0x4848 //RX_FDEQ_GAIN_7 +204 0x4848 //RX_FDEQ_GAIN_8 +205 0x4848 //RX_FDEQ_GAIN_9 +206 0x4848 //RX_FDEQ_GAIN_10 +207 0x4848 //RX_FDEQ_GAIN_11 +208 0x4848 //RX_FDEQ_GAIN_12 +209 0x4848 //RX_FDEQ_GAIN_13 +210 0x4848 //RX_FDEQ_GAIN_14 +211 0x4848 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0000 //RX_FDEQ_BIN_0 +221 0x0000 //RX_FDEQ_BIN_1 +222 0x0000 //RX_FDEQ_BIN_2 +223 0x0000 //RX_FDEQ_BIN_3 +224 0x0000 //RX_FDEQ_BIN_4 +225 0x0000 //RX_FDEQ_BIN_5 +226 0x0000 //RX_FDEQ_BIN_6 +227 0x0000 //RX_FDEQ_BIN_7 +228 0x0000 //RX_FDEQ_BIN_8 +229 0x0000 //RX_FDEQ_BIN_9 +230 0x0000 //RX_FDEQ_BIN_10 +231 0x0000 //RX_FDEQ_BIN_11 +232 0x0000 //RX_FDEQ_BIN_12 +233 0x0000 //RX_FDEQ_BIN_13 +234 0x0000 //RX_FDEQ_BIN_14 +235 0x0000 //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x0000 //RX_FDEQ_RESRV_0 +245 0x0000 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0030 //RX_FDDRC_BAND_MARGIN_1 +248 0x0050 //RX_FDDRC_BAND_MARGIN_2 +249 0x0080 //RX_FDDRC_BAND_MARGIN_3 +250 0x0004 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x5000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x6400 //RX_FDDRC_THRD_3_2 +258 0x6400 //RX_FDDRC_THRD_3_3 +259 0x2000 //RX_FDDRC_SLANT_0_0 +260 0x2000 //RX_FDDRC_SLANT_0_1 +261 0x2000 //RX_FDDRC_SLANT_0_2 +262 0x2000 //RX_FDDRC_SLANT_0_3 +263 0x2000 //RX_FDDRC_SLANT_1_0 +264 0x2000 //RX_FDDRC_SLANT_1_1 +265 0x2000 //RX_FDDRC_SLANT_1_2 +266 0x2000 //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +268 0x0003 //RX_FILTINDX +269 0x0000 //RX_TDDRC_THRD_0 +270 0x0000 //RX_TDDRC_THRD_1 +271 0x0E80 //RX_TDDRC_THRD_2 +272 0x3800 //RX_TDDRC_THRD_3 +273 0x2A00 //RX_TDDRC_SLANT_0 +274 0x6E00 //RX_TDDRC_SLANT_1 +275 0x3000 //RX_TDDRC_ALPHA_UP_0 +276 0x7FB0 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x0000 //RX_TDDRC_HMNC_GAIN +279 0x0000 //RX_TDDRC_SMT_FLAG +280 0x0000 //RX_TDDRC_SMT_W +281 0x0100 //RX_TDDRC_DRC_GAIN +282 0x7C00 //RX_LAMBDA_PKA_FP +283 0x2000 //RX_TPKA_FP +284 0x0080 //RX_MIN_G_FP +285 0x2000 //RX_MAX_G_FP +286 0x0100 //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 +288 0x0010 //RX_MAXLEVEL_CNG +289 0x0000 //RX_BWE_UV_TH +290 0x0000 //RX_BWE_UV_TH2 +291 0x0000 //RX_BWE_UV_TH3 +292 0x0000 //RX_BWE_V_TH +293 0x0000 //RX_BWE_GAIN1_V_TH1 +294 0x0000 //RX_BWE_GAIN1_V_TH2 +295 0x0000 //RX_BWE_UV_EQ +296 0x0000 //RX_BWE_V_EQ +297 0x0000 //RX_BWE_TONE_TH +298 0x0000 //RX_BWE_UV_HOLD_T +299 0x0000 //RX_BWE_GAIN2_ALPHA +300 0x0000 //RX_BWE_GAIN3_ALPHA +301 0x0000 //RX_BWE_CUTOFF +302 0x0000 //RX_BWE_GAINFILL +303 0x0000 //RX_BWE_MAXTH_TONE +304 0x0000 //RX_BWE_EQ_0 +305 0x0000 //RX_BWE_EQ_1 +306 0x0000 //RX_BWE_EQ_2 +307 0x0000 //RX_BWE_EQ_3 +308 0x0000 //RX_BWE_EQ_4 +309 0x0000 //RX_BWE_EQ_5 +310 0x0000 //RX_BWE_EQ_6 +311 0x0000 //RX_BWE_RESRV_0 +312 0x0000 //RX_BWE_RESRV_1 +313 0x0000 //RX_BWE_RESRV_2 +#VOL 0 +163 0x3000 //RX_TDDRC_ALPHA_UP_1 +164 0x3000 //RX_TDDRC_ALPHA_UP_2 +165 0x3000 //RX_TDDRC_ALPHA_UP_3 +166 0x3000 //RX_TDDRC_ALPHA_UP_4 +184 0x7FB0 //RX_TDDRC_ALPHA_DWN_1 +185 0x7FB0 //RX_TDDRC_ALPHA_DWN_2 +186 0x7FB0 //RX_TDDRC_ALPHA_DWN_3 +189 0x7FB0 //RX_TDDRC_ALPHA_DWN_4 +190 0xDA9E //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +269 0x0000 //RX_TDDRC_THRD_0 +270 0x0000 //RX_TDDRC_THRD_1 +271 0x0E80 //RX_TDDRC_THRD_2 +272 0x3800 //RX_TDDRC_THRD_3 +273 0x2A00 //RX_TDDRC_SLANT_0 +274 0x6E00 //RX_TDDRC_SLANT_1 +275 0x3000 //RX_TDDRC_ALPHA_UP_0 +276 0x7FB0 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x0000 //RX_TDDRC_HMNC_GAIN +279 0x0000 //RX_TDDRC_SMT_FLAG +280 0x0000 //RX_TDDRC_SMT_W +281 0x0100 //RX_TDDRC_DRC_GAIN +195 0x0020 //RX_FDEQ_SUBNUM +196 0x4848 //RX_FDEQ_GAIN_0 +197 0x4848 //RX_FDEQ_GAIN_1 +198 0x4848 //RX_FDEQ_GAIN_2 +199 0x4848 //RX_FDEQ_GAIN_3 +200 0x4848 //RX_FDEQ_GAIN_4 +201 0x4848 //RX_FDEQ_GAIN_5 +202 0x4848 //RX_FDEQ_GAIN_6 +203 0x4848 //RX_FDEQ_GAIN_7 +204 0x4848 //RX_FDEQ_GAIN_8 +205 0x4848 //RX_FDEQ_GAIN_9 +206 0x4848 //RX_FDEQ_GAIN_10 +207 0x4848 //RX_FDEQ_GAIN_11 +208 0x4848 //RX_FDEQ_GAIN_12 +209 0x4848 //RX_FDEQ_GAIN_13 +210 0x4848 //RX_FDEQ_GAIN_14 +211 0x4848 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0000 //RX_FDEQ_BIN_0 +221 0x0000 //RX_FDEQ_BIN_1 +222 0x0000 //RX_FDEQ_BIN_2 +223 0x0000 //RX_FDEQ_BIN_3 +224 0x0000 //RX_FDEQ_BIN_4 +225 0x0000 //RX_FDEQ_BIN_5 +226 0x0000 //RX_FDEQ_BIN_6 +227 0x0000 //RX_FDEQ_BIN_7 +228 0x0000 //RX_FDEQ_BIN_8 +229 0x0000 //RX_FDEQ_BIN_9 +230 0x0000 //RX_FDEQ_BIN_10 +231 0x0000 //RX_FDEQ_BIN_11 +232 0x0000 //RX_FDEQ_BIN_12 +233 0x0000 //RX_FDEQ_BIN_13 +234 0x0000 //RX_FDEQ_BIN_14 +235 0x0000 //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x0000 //RX_FDEQ_RESRV_0 +245 0x0000 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0030 //RX_FDDRC_BAND_MARGIN_1 +248 0x0050 //RX_FDDRC_BAND_MARGIN_2 +249 0x0080 //RX_FDDRC_BAND_MARGIN_3 +250 0x0004 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x5000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x6400 //RX_FDDRC_THRD_3_2 +258 0x6400 //RX_FDDRC_THRD_3_3 +259 0x2000 //RX_FDDRC_SLANT_0_0 +260 0x2000 //RX_FDDRC_SLANT_0_1 +261 0x2000 //RX_FDDRC_SLANT_0_2 +262 0x2000 //RX_FDDRC_SLANT_0_3 +263 0x2000 //RX_FDDRC_SLANT_1_0 +264 0x2000 //RX_FDDRC_SLANT_1_1 +265 0x2000 //RX_FDDRC_SLANT_1_2 +266 0x2000 //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +286 0x0100 //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 +#VOL 1 +163 0x3000 //RX_TDDRC_ALPHA_UP_1 +164 0x3000 //RX_TDDRC_ALPHA_UP_2 +165 0x3000 //RX_TDDRC_ALPHA_UP_3 +166 0x3000 //RX_TDDRC_ALPHA_UP_4 +184 0x7FB0 //RX_TDDRC_ALPHA_DWN_1 +185 0x7FB0 //RX_TDDRC_ALPHA_DWN_2 +186 0x7FB0 //RX_TDDRC_ALPHA_DWN_3 +189 0x7FB0 //RX_TDDRC_ALPHA_DWN_4 +190 0xDA9E //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +269 0x0000 //RX_TDDRC_THRD_0 +270 0x0000 //RX_TDDRC_THRD_1 +271 0x0E80 //RX_TDDRC_THRD_2 +272 0x3800 //RX_TDDRC_THRD_3 +273 0x2A00 //RX_TDDRC_SLANT_0 +274 0x6E00 //RX_TDDRC_SLANT_1 +275 0x3000 //RX_TDDRC_ALPHA_UP_0 +276 0x7FB0 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x0000 //RX_TDDRC_HMNC_GAIN +279 0x0000 //RX_TDDRC_SMT_FLAG +280 0x0000 //RX_TDDRC_SMT_W +281 0x0100 //RX_TDDRC_DRC_GAIN +195 0x0020 //RX_FDEQ_SUBNUM +196 0x4848 //RX_FDEQ_GAIN_0 +197 0x4848 //RX_FDEQ_GAIN_1 +198 0x4848 //RX_FDEQ_GAIN_2 +199 0x4848 //RX_FDEQ_GAIN_3 +200 0x4848 //RX_FDEQ_GAIN_4 +201 0x4848 //RX_FDEQ_GAIN_5 +202 0x4848 //RX_FDEQ_GAIN_6 +203 0x4848 //RX_FDEQ_GAIN_7 +204 0x4848 //RX_FDEQ_GAIN_8 +205 0x4848 //RX_FDEQ_GAIN_9 +206 0x4848 //RX_FDEQ_GAIN_10 +207 0x4848 //RX_FDEQ_GAIN_11 +208 0x4848 //RX_FDEQ_GAIN_12 +209 0x4848 //RX_FDEQ_GAIN_13 +210 0x4848 //RX_FDEQ_GAIN_14 +211 0x4848 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0000 //RX_FDEQ_BIN_0 +221 0x0000 //RX_FDEQ_BIN_1 +222 0x0000 //RX_FDEQ_BIN_2 +223 0x0000 //RX_FDEQ_BIN_3 +224 0x0000 //RX_FDEQ_BIN_4 +225 0x0000 //RX_FDEQ_BIN_5 +226 0x0000 //RX_FDEQ_BIN_6 +227 0x0000 //RX_FDEQ_BIN_7 +228 0x0000 //RX_FDEQ_BIN_8 +229 0x0000 //RX_FDEQ_BIN_9 +230 0x0000 //RX_FDEQ_BIN_10 +231 0x0000 //RX_FDEQ_BIN_11 +232 0x0000 //RX_FDEQ_BIN_12 +233 0x0000 //RX_FDEQ_BIN_13 +234 0x0000 //RX_FDEQ_BIN_14 +235 0x0000 //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x0000 //RX_FDEQ_RESRV_0 +245 0x0000 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0030 //RX_FDDRC_BAND_MARGIN_1 +248 0x0050 //RX_FDDRC_BAND_MARGIN_2 +249 0x0080 //RX_FDDRC_BAND_MARGIN_3 +250 0x0004 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x5000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x6400 //RX_FDDRC_THRD_3_2 +258 0x6400 //RX_FDDRC_THRD_3_3 +259 0x2000 //RX_FDDRC_SLANT_0_0 +260 0x2000 //RX_FDDRC_SLANT_0_1 +261 0x2000 //RX_FDDRC_SLANT_0_2 +262 0x2000 //RX_FDDRC_SLANT_0_3 +263 0x2000 //RX_FDDRC_SLANT_1_0 +264 0x2000 //RX_FDDRC_SLANT_1_1 +265 0x2000 //RX_FDDRC_SLANT_1_2 +266 0x2000 //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +286 0x0100 //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 +#VOL 2 +163 0x3000 //RX_TDDRC_ALPHA_UP_1 +164 0x3000 //RX_TDDRC_ALPHA_UP_2 +165 0x3000 //RX_TDDRC_ALPHA_UP_3 +166 0x3000 //RX_TDDRC_ALPHA_UP_4 +184 0x7FB0 //RX_TDDRC_ALPHA_DWN_1 +185 0x7FB0 //RX_TDDRC_ALPHA_DWN_2 +186 0x7FB0 //RX_TDDRC_ALPHA_DWN_3 +189 0x7FB0 //RX_TDDRC_ALPHA_DWN_4 +190 0xDA9E //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +269 0x0000 //RX_TDDRC_THRD_0 +270 0x0000 //RX_TDDRC_THRD_1 +271 0x0E80 //RX_TDDRC_THRD_2 +272 0x3800 //RX_TDDRC_THRD_3 +273 0x2A00 //RX_TDDRC_SLANT_0 +274 0x6E00 //RX_TDDRC_SLANT_1 +275 0x3000 //RX_TDDRC_ALPHA_UP_0 +276 0x7FB0 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x0000 //RX_TDDRC_HMNC_GAIN +279 0x0000 //RX_TDDRC_SMT_FLAG +280 0x0000 //RX_TDDRC_SMT_W +281 0x0100 //RX_TDDRC_DRC_GAIN +195 0x0020 //RX_FDEQ_SUBNUM +196 0x4848 //RX_FDEQ_GAIN_0 +197 0x4848 //RX_FDEQ_GAIN_1 +198 0x4848 //RX_FDEQ_GAIN_2 +199 0x4848 //RX_FDEQ_GAIN_3 +200 0x4848 //RX_FDEQ_GAIN_4 +201 0x4848 //RX_FDEQ_GAIN_5 +202 0x4848 //RX_FDEQ_GAIN_6 +203 0x4848 //RX_FDEQ_GAIN_7 +204 0x4848 //RX_FDEQ_GAIN_8 +205 0x4848 //RX_FDEQ_GAIN_9 +206 0x4848 //RX_FDEQ_GAIN_10 +207 0x4848 //RX_FDEQ_GAIN_11 +208 0x4848 //RX_FDEQ_GAIN_12 +209 0x4848 //RX_FDEQ_GAIN_13 +210 0x4848 //RX_FDEQ_GAIN_14 +211 0x4848 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0000 //RX_FDEQ_BIN_0 +221 0x0000 //RX_FDEQ_BIN_1 +222 0x0000 //RX_FDEQ_BIN_2 +223 0x0000 //RX_FDEQ_BIN_3 +224 0x0000 //RX_FDEQ_BIN_4 +225 0x0000 //RX_FDEQ_BIN_5 +226 0x0000 //RX_FDEQ_BIN_6 +227 0x0000 //RX_FDEQ_BIN_7 +228 0x0000 //RX_FDEQ_BIN_8 +229 0x0000 //RX_FDEQ_BIN_9 +230 0x0000 //RX_FDEQ_BIN_10 +231 0x0000 //RX_FDEQ_BIN_11 +232 0x0000 //RX_FDEQ_BIN_12 +233 0x0000 //RX_FDEQ_BIN_13 +234 0x0000 //RX_FDEQ_BIN_14 +235 0x0000 //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x0000 //RX_FDEQ_RESRV_0 +245 0x0000 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0030 //RX_FDDRC_BAND_MARGIN_1 +248 0x0050 //RX_FDDRC_BAND_MARGIN_2 +249 0x0080 //RX_FDDRC_BAND_MARGIN_3 +250 0x0004 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x5000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x6400 //RX_FDDRC_THRD_3_2 +258 0x6400 //RX_FDDRC_THRD_3_3 +259 0x2000 //RX_FDDRC_SLANT_0_0 +260 0x2000 //RX_FDDRC_SLANT_0_1 +261 0x2000 //RX_FDDRC_SLANT_0_2 +262 0x2000 //RX_FDDRC_SLANT_0_3 +263 0x2000 //RX_FDDRC_SLANT_1_0 +264 0x2000 //RX_FDDRC_SLANT_1_1 +265 0x2000 //RX_FDDRC_SLANT_1_2 +266 0x2000 //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +286 0x0100 //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 +#VOL 3 +163 0x3000 //RX_TDDRC_ALPHA_UP_1 +164 0x3000 //RX_TDDRC_ALPHA_UP_2 +165 0x3000 //RX_TDDRC_ALPHA_UP_3 +166 0x3000 //RX_TDDRC_ALPHA_UP_4 +184 0x7FB0 //RX_TDDRC_ALPHA_DWN_1 +185 0x7FB0 //RX_TDDRC_ALPHA_DWN_2 +186 0x7FB0 //RX_TDDRC_ALPHA_DWN_3 +189 0x7FB0 //RX_TDDRC_ALPHA_DWN_4 +190 0xDA9E //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +269 0x0000 //RX_TDDRC_THRD_0 +270 0x0000 //RX_TDDRC_THRD_1 +271 0x0E80 //RX_TDDRC_THRD_2 +272 0x3800 //RX_TDDRC_THRD_3 +273 0x2A00 //RX_TDDRC_SLANT_0 +274 0x6E00 //RX_TDDRC_SLANT_1 +275 0x3000 //RX_TDDRC_ALPHA_UP_0 +276 0x7FB0 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x0000 //RX_TDDRC_HMNC_GAIN +279 0x0000 //RX_TDDRC_SMT_FLAG +280 0x0000 //RX_TDDRC_SMT_W +281 0x0100 //RX_TDDRC_DRC_GAIN +195 0x0020 //RX_FDEQ_SUBNUM +196 0x4848 //RX_FDEQ_GAIN_0 +197 0x4848 //RX_FDEQ_GAIN_1 +198 0x4848 //RX_FDEQ_GAIN_2 +199 0x4848 //RX_FDEQ_GAIN_3 +200 0x4848 //RX_FDEQ_GAIN_4 +201 0x4848 //RX_FDEQ_GAIN_5 +202 0x4848 //RX_FDEQ_GAIN_6 +203 0x4848 //RX_FDEQ_GAIN_7 +204 0x4848 //RX_FDEQ_GAIN_8 +205 0x4848 //RX_FDEQ_GAIN_9 +206 0x4848 //RX_FDEQ_GAIN_10 +207 0x4848 //RX_FDEQ_GAIN_11 +208 0x4848 //RX_FDEQ_GAIN_12 +209 0x4848 //RX_FDEQ_GAIN_13 +210 0x4848 //RX_FDEQ_GAIN_14 +211 0x4848 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0000 //RX_FDEQ_BIN_0 +221 0x0000 //RX_FDEQ_BIN_1 +222 0x0000 //RX_FDEQ_BIN_2 +223 0x0000 //RX_FDEQ_BIN_3 +224 0x0000 //RX_FDEQ_BIN_4 +225 0x0000 //RX_FDEQ_BIN_5 +226 0x0000 //RX_FDEQ_BIN_6 +227 0x0000 //RX_FDEQ_BIN_7 +228 0x0000 //RX_FDEQ_BIN_8 +229 0x0000 //RX_FDEQ_BIN_9 +230 0x0000 //RX_FDEQ_BIN_10 +231 0x0000 //RX_FDEQ_BIN_11 +232 0x0000 //RX_FDEQ_BIN_12 +233 0x0000 //RX_FDEQ_BIN_13 +234 0x0000 //RX_FDEQ_BIN_14 +235 0x0000 //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x0000 //RX_FDEQ_RESRV_0 +245 0x0000 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0030 //RX_FDDRC_BAND_MARGIN_1 +248 0x0050 //RX_FDDRC_BAND_MARGIN_2 +249 0x0080 //RX_FDDRC_BAND_MARGIN_3 +250 0x0004 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x5000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x6400 //RX_FDDRC_THRD_3_2 +258 0x6400 //RX_FDDRC_THRD_3_3 +259 0x2000 //RX_FDDRC_SLANT_0_0 +260 0x2000 //RX_FDDRC_SLANT_0_1 +261 0x2000 //RX_FDDRC_SLANT_0_2 +262 0x2000 //RX_FDDRC_SLANT_0_3 +263 0x2000 //RX_FDDRC_SLANT_1_0 +264 0x2000 //RX_FDDRC_SLANT_1_1 +265 0x2000 //RX_FDDRC_SLANT_1_2 +266 0x2000 //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +286 0x0100 //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 +#VOL 4 +163 0x3000 //RX_TDDRC_ALPHA_UP_1 +164 0x3000 //RX_TDDRC_ALPHA_UP_2 +165 0x3000 //RX_TDDRC_ALPHA_UP_3 +166 0x3000 //RX_TDDRC_ALPHA_UP_4 +184 0x7FB0 //RX_TDDRC_ALPHA_DWN_1 +185 0x7FB0 //RX_TDDRC_ALPHA_DWN_2 +186 0x7FB0 //RX_TDDRC_ALPHA_DWN_3 +189 0x7FB0 //RX_TDDRC_ALPHA_DWN_4 +190 0xDA9E //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +269 0x0000 //RX_TDDRC_THRD_0 +270 0x0000 //RX_TDDRC_THRD_1 +271 0x0E80 //RX_TDDRC_THRD_2 +272 0x3800 //RX_TDDRC_THRD_3 +273 0x2A00 //RX_TDDRC_SLANT_0 +274 0x6E00 //RX_TDDRC_SLANT_1 +275 0x3000 //RX_TDDRC_ALPHA_UP_0 +276 0x7FB0 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x0000 //RX_TDDRC_HMNC_GAIN +279 0x0000 //RX_TDDRC_SMT_FLAG +280 0x0000 //RX_TDDRC_SMT_W +281 0x0100 //RX_TDDRC_DRC_GAIN +195 0x0020 //RX_FDEQ_SUBNUM +196 0x4848 //RX_FDEQ_GAIN_0 +197 0x4848 //RX_FDEQ_GAIN_1 +198 0x4848 //RX_FDEQ_GAIN_2 +199 0x4848 //RX_FDEQ_GAIN_3 +200 0x4848 //RX_FDEQ_GAIN_4 +201 0x4848 //RX_FDEQ_GAIN_5 +202 0x4848 //RX_FDEQ_GAIN_6 +203 0x4848 //RX_FDEQ_GAIN_7 +204 0x4848 //RX_FDEQ_GAIN_8 +205 0x4848 //RX_FDEQ_GAIN_9 +206 0x4848 //RX_FDEQ_GAIN_10 +207 0x4848 //RX_FDEQ_GAIN_11 +208 0x4848 //RX_FDEQ_GAIN_12 +209 0x4848 //RX_FDEQ_GAIN_13 +210 0x4848 //RX_FDEQ_GAIN_14 +211 0x4848 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0000 //RX_FDEQ_BIN_0 +221 0x0000 //RX_FDEQ_BIN_1 +222 0x0000 //RX_FDEQ_BIN_2 +223 0x0000 //RX_FDEQ_BIN_3 +224 0x0000 //RX_FDEQ_BIN_4 +225 0x0000 //RX_FDEQ_BIN_5 +226 0x0000 //RX_FDEQ_BIN_6 +227 0x0000 //RX_FDEQ_BIN_7 +228 0x0000 //RX_FDEQ_BIN_8 +229 0x0000 //RX_FDEQ_BIN_9 +230 0x0000 //RX_FDEQ_BIN_10 +231 0x0000 //RX_FDEQ_BIN_11 +232 0x0000 //RX_FDEQ_BIN_12 +233 0x0000 //RX_FDEQ_BIN_13 +234 0x0000 //RX_FDEQ_BIN_14 +235 0x0000 //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x0000 //RX_FDEQ_RESRV_0 +245 0x0000 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0030 //RX_FDDRC_BAND_MARGIN_1 +248 0x0050 //RX_FDDRC_BAND_MARGIN_2 +249 0x0080 //RX_FDDRC_BAND_MARGIN_3 +250 0x0004 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x5000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x6400 //RX_FDDRC_THRD_3_2 +258 0x6400 //RX_FDDRC_THRD_3_3 +259 0x2000 //RX_FDDRC_SLANT_0_0 +260 0x2000 //RX_FDDRC_SLANT_0_1 +261 0x2000 //RX_FDDRC_SLANT_0_2 +262 0x2000 //RX_FDDRC_SLANT_0_3 +263 0x2000 //RX_FDDRC_SLANT_1_0 +264 0x2000 //RX_FDDRC_SLANT_1_1 +265 0x2000 //RX_FDDRC_SLANT_1_2 +266 0x2000 //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +286 0x0100 //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 +#VOL 5 +163 0x3000 //RX_TDDRC_ALPHA_UP_1 +164 0x3000 //RX_TDDRC_ALPHA_UP_2 +165 0x3000 //RX_TDDRC_ALPHA_UP_3 +166 0x3000 //RX_TDDRC_ALPHA_UP_4 +184 0x7FB0 //RX_TDDRC_ALPHA_DWN_1 +185 0x7FB0 //RX_TDDRC_ALPHA_DWN_2 +186 0x7FB0 //RX_TDDRC_ALPHA_DWN_3 +189 0x7FB0 //RX_TDDRC_ALPHA_DWN_4 +190 0xDA9E //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +269 0x0000 //RX_TDDRC_THRD_0 +270 0x0000 //RX_TDDRC_THRD_1 +271 0x0E80 //RX_TDDRC_THRD_2 +272 0x3800 //RX_TDDRC_THRD_3 +273 0x2A00 //RX_TDDRC_SLANT_0 +274 0x6E00 //RX_TDDRC_SLANT_1 +275 0x3000 //RX_TDDRC_ALPHA_UP_0 +276 0x7FB0 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x0000 //RX_TDDRC_HMNC_GAIN +279 0x0000 //RX_TDDRC_SMT_FLAG +280 0x0000 //RX_TDDRC_SMT_W +281 0x0100 //RX_TDDRC_DRC_GAIN +195 0x0020 //RX_FDEQ_SUBNUM +196 0x4848 //RX_FDEQ_GAIN_0 +197 0x4848 //RX_FDEQ_GAIN_1 +198 0x4848 //RX_FDEQ_GAIN_2 +199 0x4848 //RX_FDEQ_GAIN_3 +200 0x4848 //RX_FDEQ_GAIN_4 +201 0x4848 //RX_FDEQ_GAIN_5 +202 0x4848 //RX_FDEQ_GAIN_6 +203 0x4848 //RX_FDEQ_GAIN_7 +204 0x4848 //RX_FDEQ_GAIN_8 +205 0x4848 //RX_FDEQ_GAIN_9 +206 0x4848 //RX_FDEQ_GAIN_10 +207 0x4848 //RX_FDEQ_GAIN_11 +208 0x4848 //RX_FDEQ_GAIN_12 +209 0x4848 //RX_FDEQ_GAIN_13 +210 0x4848 //RX_FDEQ_GAIN_14 +211 0x4848 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0000 //RX_FDEQ_BIN_0 +221 0x0000 //RX_FDEQ_BIN_1 +222 0x0000 //RX_FDEQ_BIN_2 +223 0x0000 //RX_FDEQ_BIN_3 +224 0x0000 //RX_FDEQ_BIN_4 +225 0x0000 //RX_FDEQ_BIN_5 +226 0x0000 //RX_FDEQ_BIN_6 +227 0x0000 //RX_FDEQ_BIN_7 +228 0x0000 //RX_FDEQ_BIN_8 +229 0x0000 //RX_FDEQ_BIN_9 +230 0x0000 //RX_FDEQ_BIN_10 +231 0x0000 //RX_FDEQ_BIN_11 +232 0x0000 //RX_FDEQ_BIN_12 +233 0x0000 //RX_FDEQ_BIN_13 +234 0x0000 //RX_FDEQ_BIN_14 +235 0x0000 //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x0000 //RX_FDEQ_RESRV_0 +245 0x0000 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0030 //RX_FDDRC_BAND_MARGIN_1 +248 0x0050 //RX_FDDRC_BAND_MARGIN_2 +249 0x0080 //RX_FDDRC_BAND_MARGIN_3 +250 0x0004 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x5000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x6400 //RX_FDDRC_THRD_3_2 +258 0x6400 //RX_FDDRC_THRD_3_3 +259 0x2000 //RX_FDDRC_SLANT_0_0 +260 0x2000 //RX_FDDRC_SLANT_0_1 +261 0x2000 //RX_FDDRC_SLANT_0_2 +262 0x2000 //RX_FDDRC_SLANT_0_3 +263 0x2000 //RX_FDDRC_SLANT_1_0 +264 0x2000 //RX_FDDRC_SLANT_1_1 +265 0x2000 //RX_FDDRC_SLANT_1_2 +266 0x2000 //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +286 0x0100 //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 +#VOL 6 +163 0x3000 //RX_TDDRC_ALPHA_UP_1 +164 0x3000 //RX_TDDRC_ALPHA_UP_2 +165 0x3000 //RX_TDDRC_ALPHA_UP_3 +166 0x3000 //RX_TDDRC_ALPHA_UP_4 +184 0x7FB0 //RX_TDDRC_ALPHA_DWN_1 +185 0x7FB0 //RX_TDDRC_ALPHA_DWN_2 +186 0x7FB0 //RX_TDDRC_ALPHA_DWN_3 +189 0x7FB0 //RX_TDDRC_ALPHA_DWN_4 +190 0xDA9E //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +269 0x0000 //RX_TDDRC_THRD_0 +270 0x0000 //RX_TDDRC_THRD_1 +271 0x0E80 //RX_TDDRC_THRD_2 +272 0x3800 //RX_TDDRC_THRD_3 +273 0x2A00 //RX_TDDRC_SLANT_0 +274 0x6E00 //RX_TDDRC_SLANT_1 +275 0x3000 //RX_TDDRC_ALPHA_UP_0 +276 0x7FB0 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x0000 //RX_TDDRC_HMNC_GAIN +279 0x0000 //RX_TDDRC_SMT_FLAG +280 0x0000 //RX_TDDRC_SMT_W +281 0x0100 //RX_TDDRC_DRC_GAIN +195 0x0020 //RX_FDEQ_SUBNUM +196 0x4848 //RX_FDEQ_GAIN_0 +197 0x4848 //RX_FDEQ_GAIN_1 +198 0x4848 //RX_FDEQ_GAIN_2 +199 0x4848 //RX_FDEQ_GAIN_3 +200 0x4848 //RX_FDEQ_GAIN_4 +201 0x4848 //RX_FDEQ_GAIN_5 +202 0x4848 //RX_FDEQ_GAIN_6 +203 0x4848 //RX_FDEQ_GAIN_7 +204 0x4848 //RX_FDEQ_GAIN_8 +205 0x4848 //RX_FDEQ_GAIN_9 +206 0x4848 //RX_FDEQ_GAIN_10 +207 0x4848 //RX_FDEQ_GAIN_11 +208 0x4848 //RX_FDEQ_GAIN_12 +209 0x4848 //RX_FDEQ_GAIN_13 +210 0x4848 //RX_FDEQ_GAIN_14 +211 0x4848 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0000 //RX_FDEQ_BIN_0 +221 0x0000 //RX_FDEQ_BIN_1 +222 0x0000 //RX_FDEQ_BIN_2 +223 0x0000 //RX_FDEQ_BIN_3 +224 0x0000 //RX_FDEQ_BIN_4 +225 0x0000 //RX_FDEQ_BIN_5 +226 0x0000 //RX_FDEQ_BIN_6 +227 0x0000 //RX_FDEQ_BIN_7 +228 0x0000 //RX_FDEQ_BIN_8 +229 0x0000 //RX_FDEQ_BIN_9 +230 0x0000 //RX_FDEQ_BIN_10 +231 0x0000 //RX_FDEQ_BIN_11 +232 0x0000 //RX_FDEQ_BIN_12 +233 0x0000 //RX_FDEQ_BIN_13 +234 0x0000 //RX_FDEQ_BIN_14 +235 0x0000 //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x0000 //RX_FDEQ_RESRV_0 +245 0x0000 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0030 //RX_FDDRC_BAND_MARGIN_1 +248 0x0050 //RX_FDDRC_BAND_MARGIN_2 +249 0x0080 //RX_FDDRC_BAND_MARGIN_3 +250 0x0004 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x5000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x6400 //RX_FDDRC_THRD_3_2 +258 0x6400 //RX_FDDRC_THRD_3_3 +259 0x2000 //RX_FDDRC_SLANT_0_0 +260 0x2000 //RX_FDDRC_SLANT_0_1 +261 0x2000 //RX_FDDRC_SLANT_0_2 +262 0x2000 //RX_FDDRC_SLANT_0_3 +263 0x2000 //RX_FDDRC_SLANT_1_0 +264 0x2000 //RX_FDDRC_SLANT_1_1 +265 0x2000 //RX_FDDRC_SLANT_1_2 +266 0x2000 //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +286 0x0100 //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 #CASE_NAME HEADSET-TTY_FULL-VOICE_GENERIC-SWB -#PARAM_MODE FULL -#PARAM_TYPE TX+RX -#TOTAL_CUSTOM_STEP 7 +#PARAM_MODE Full +#PARAM_TYPE TX+2RX +#TOTAL_CUSTOM_STEP 7+7 #TX 0 0x0001 //TX_OPERATION_MODE_0 1 0x0000 //TX_OPERATION_MODE_1 @@ -52870,7 +80350,7 @@ 239 0x0000 //TX_DT_RESRV_7 240 0x0000 //TX_DT_RESRV_8 241 0x0000 //TX_DT_RESRV_9 -242 0xF200 //TX_THR_SN_EST_0 +242 0xFA00 //TX_THR_SN_EST_0 243 0xF400 //TX_THR_SN_EST_1 244 0xF800 //TX_THR_SN_EST_2 245 0xF600 //TX_THR_SN_EST_3 @@ -52879,12 +80359,12 @@ 248 0xF800 //TX_THR_SN_EST_6 249 0xF800 //TX_THR_SN_EST_7 250 0x0100 //TX_DELTA_THR_SN_EST_0 -251 0x0000 //TX_DELTA_THR_SN_EST_1 +251 0x0100 //TX_DELTA_THR_SN_EST_1 252 0x0100 //TX_DELTA_THR_SN_EST_2 -253 0x0100 //TX_DELTA_THR_SN_EST_3 +253 0x0200 //TX_DELTA_THR_SN_EST_3 254 0x0200 //TX_DELTA_THR_SN_EST_4 255 0x0200 //TX_DELTA_THR_SN_EST_5 -256 0x0200 //TX_DELTA_THR_SN_EST_6 +256 0x0000 //TX_DELTA_THR_SN_EST_6 257 0x0200 //TX_DELTA_THR_SN_EST_7 258 0x4000 //TX_LAMBDA_NN_EST_0 259 0x4000 //TX_LAMBDA_NN_EST_1 @@ -52910,12 +80390,12 @@ 279 0x0000 //TX_B_POST_FLT_0 280 0x0000 //TX_B_POST_FLT_1 281 0x001A //TX_NS_LVL_CTRL_0 -282 0x001A //TX_NS_LVL_CTRL_1 +282 0x0014 //TX_NS_LVL_CTRL_1 283 0x0014 //TX_NS_LVL_CTRL_2 -284 0x0014 //TX_NS_LVL_CTRL_3 +284 0x000C //TX_NS_LVL_CTRL_3 285 0x000C //TX_NS_LVL_CTRL_4 286 0x000C //TX_NS_LVL_CTRL_5 -287 0x000C //TX_NS_LVL_CTRL_6 +287 0x001A //TX_NS_LVL_CTRL_6 288 0x000C //TX_NS_LVL_CTRL_7 289 0x000E //TX_MIN_GAIN_S_0 290 0x0014 //TX_MIN_GAIN_S_1 @@ -52931,10 +80411,10 @@ 300 0x7FFF //TX_SNRI_SUP_0 301 0x7FFF //TX_SNRI_SUP_1 302 0x7FFF //TX_SNRI_SUP_2 -303 0x7FFF //TX_SNRI_SUP_3 +303 0x4000 //TX_SNRI_SUP_3 304 0x4000 //TX_SNRI_SUP_4 305 0x4000 //TX_SNRI_SUP_5 -306 0x4000 //TX_SNRI_SUP_6 +306 0x7FFF //TX_SNRI_SUP_6 307 0x4000 //TX_SNRI_SUP_7 308 0x1200 //TX_THR_LFNS 309 0x0147 //TX_G_LFNS @@ -52943,12 +80423,12 @@ 312 0x7FFF //TX_A_POST_FILT_0 313 0x7FFF //TX_A_POST_FILT_1 314 0x4000 //TX_A_POST_FILT_S_0 -315 0x199A //TX_A_POST_FILT_S_1 +315 0x1000 //TX_A_POST_FILT_S_1 316 0x1000 //TX_A_POST_FILT_S_2 -317 0x1000 //TX_A_POST_FILT_S_3 +317 0x6666 //TX_A_POST_FILT_S_3 318 0x6666 //TX_A_POST_FILT_S_4 319 0x6666 //TX_A_POST_FILT_S_5 -320 0x6666 //TX_A_POST_FILT_S_6 +320 0x199A //TX_A_POST_FILT_S_6 321 0x6666 //TX_A_POST_FILT_S_7 322 0x2000 //TX_B_POST_FILT_0 323 0x2000 //TX_B_POST_FILT_1 @@ -52995,7 +80475,7 @@ 364 0x0000 //TX_K_APT 365 0x0001 //TX_NOISEDET 366 0x05A0 //TX_NDETCT -367 0x000A //TX_NOISE_TH_0 +367 0x0383 //TX_NOISE_TH_0 368 0x1388 //TX_NOISE_TH_0_2 369 0x3A98 //TX_NOISE_TH_0_3 370 0x0C80 //TX_NOISE_TH_1 @@ -53007,11 +80487,11 @@ 376 0x7FFF //TX_NOISE_TH_5_3 377 0x7FFF //TX_NOISE_TH_5_4 378 0x00C8 //TX_NOISE_TH_6 -379 0x000A //TX_MINENOISE_TH -380 0x0000 //TX_MINENOISE_MIC0_TH_MTS -381 0x0000 //TX_MINENOISE_MIC0_TH_EXP -382 0x0000 //TX_MINENOISE_MIC0_S_TH_MTS -383 0x0000 //TX_MINENOISE_MIC0_S_TH_EXP +379 0x044C //TX_MINENOISE_TH +380 0xD508 //TX_MORENS_TFMASK_TH +381 0x0001 //TX_DRC_QUIET_FLOOR +382 0x3A98 //TX_RATIODTL_CUT_TH +383 0x0DAC //TX_DT_CUT_K1 384 0x6400 //TX_OUT_ENER_S_TH_CLEAN 385 0x6400 //TX_OUT_ENER_S_TH_LESSCLEAN 386 0x6400 //TX_OUT_ENER_S_TH_NOISY @@ -53019,22 +80499,22 @@ 388 0x7D00 //TX_OUT_ENER_TH_SPEECH 389 0x0000 //TX_SN_NPB_GAIN 390 0x0000 //TX_NN_NPB_GAIN -391 0x0000 //TX_CSX_ALPHA_0 -392 0x0000 //TX_CSX_ALPHA_1 -393 0x0000 //TX_CSX_ALPHA_2 -394 0x0000 //TX_CSX_ALPHA_3 -395 0x0000 //TX_MU_ARSP_EST -396 0x0000 //TX_P_OUTBEAM_MIN_TH +391 0x7FFF //TX_POST_MASK_SUP_HSNE +392 0x1388 //TX_TAIL_DET_TH +393 0x4000 //TX_B_LESSCUT_RTO_WTA +394 0x0000 //TX_MEL_G_R +395 0x0080 //TX_SUPHIGH_TH +396 0x0000 //TX_MASK_G_R 397 0x0000 //TX_EXTRA_NS_L -398 0x0000 //TX_EXTRA_NS_A -399 0x0000 //TX_VR_NOISE_FLOOR_TH +398 0x1800 //TX_C_POST_FLT_MASK +399 0x7FFF //TX_A_POST_FLT_WNS 400 0x0000 //TX_MIN_G_LOW300HZ 401 0x0010 //TX_MAXLEVEL_CNG 402 0x0000 //TX_STN_NOISE_TH 403 0x0000 //TX_POST_MASK_SUP 404 0x0000 //TX_POST_MASK_ADJUST 405 0x0014 //TX_NS_ENOISE_MIC0_TH -406 0x0014 //TX_MINENOISE_MIC0_TH +406 0x02F3 //TX_MINENOISE_MIC0_TH 407 0x0226 //TX_MINENOISE_MIC0_S_TH 408 0x2879 //TX_MIN_G_CTRL_SSNS 409 0x0400 //TX_METAL_RTO_THR @@ -53142,16 +80622,16 @@ 511 0x6666 //TX_MIC_TO_BFGAIN 512 0x6666 //TX_MICTOBFGAIN0 513 0x0014 //TX_FASTMUE_TH -514 0x0000 //TX_DERVB_LEN_0 -515 0x0000 //TX_DERVB_LEN_1 -516 0x0000 //TX_RHO_DERVB -517 0x0000 //TX_MIC_INDX_DERVB -518 0x0000 //TX_MU_DERVB -519 0x0000 //TX_DR_RESRV_0 -520 0x0000 //TX_DR_RESRV_1 -521 0x0000 //TX_DR_RESRV_2 -522 0x0000 //TX_DR_RESRV_3 -523 0x0000 //TX_DR_RESRV_4 +514 0xC000 //TX_DEREVERB_LF_MU +515 0xC000 //TX_DEREVERB_HF_MU +516 0xCCCC //TX_DEREVERB_DELAY +517 0xD999 //TX_DEREVERB_COEF_LEN +518 0x1F40 //TX_DEREVERB_DNR +519 0x0000 //TX_DEREVERB_ALPHA +520 0x0000 //TX_DEREVERB_BETA +521 0x0000 //TX_GSC_RTOL_TH +522 0x7000 //TX_GSC_RTOH_TH +523 0x0064 //TX_WIDE2_MEANHTH 524 0x0000 //TX_DR_RESRV_5 525 0x0000 //TX_DR_RESRV_6 526 0x0000 //TX_DR_RESRV_7 @@ -53517,16 +80997,81 @@ 886 0x0000 //TX_FASTNS_TFMASKBIN_TH2 887 0x0000 //TX_FASTNS_TFMASKBIN_TH3 888 0x00C8 //TX_FASTNS_ARSPC_TH -889 0xD99A //TX_FASTNS_MASK5_TH +889 0x8000 //TX_FASTNS_MASK5_TH 890 0x051F //TX_POSTSSA_MIN_G_VR_MASK -891 0x7FFF //TX_A_LESSCUT_RTO_MASK +891 0x4000 //TX_A_LESSCUT_RTO_MASK 892 0x1770 //TX_FASTNS_NOISETH 893 0xC000 //TX_FASTNS_SSA_THLFL 894 0xC000 //TX_FASTNS_SSA_THHFL 895 0xCCCC //TX_FASTNS_SSA_THLFH 896 0xD999 //TX_FASTNS_SSA_THHFH +897 0x2339 //TX_SENDFUNC_REG_MICMUTE +898 0x0021 //TX_SENDFUNC_REG_MICMUTE1 +899 0x02BC //TX_MICMUTE_RATIO_THR +900 0x0140 //TX_MICMUTE_AMP_THR +901 0x0004 //TX_MICMUTE_HPF_IND +902 0x00C0 //TX_MICMUTE_LOG_EYR_TH +903 0x0008 //TX_MICMUTE_CVG_TIME +904 0x0008 //TX_MICMUTE_RELEASE_TIME +905 0x01FE //TX_MIC_VOLUME_MIC0MUTE +906 0x0020 //TX_MICMUTE_EPD_OFFSET_0 +907 0x001E //TX_MICMUTE_FRQ_AEC_L +908 0x7999 //TX_MICMUTE_EAD_THR +909 0x7FFF //TX_MICMUTE_LAMBDA_CB_NLE +910 0x7FFF //TX_MICMUTE_LAMBDA_RE_EST +911 0x4000 //TX_DTD_THR1_MICMUTE_0 +912 0x7000 //TX_DTD_THR1_MICMUTE_1 +913 0x7FFF //TX_DTD_THR1_MICMUTE_2 +914 0x7FFF //TX_DTD_THR1_MICMUTE_3 +915 0x6CCC //TX_DTD_THR2_MICMUTE_0 +916 0x0400 //TX_MICMUTE_MIN_EQ_RE_EST_0 +917 0x0400 //TX_MICMUTE_MIN_EQ_RE_EST_1 +918 0x1000 //TX_MICMUTE_MIN_EQ_RE_EST_2 +919 0x7FFF //TX_MICMUTE_MIN_EQ_RE_EST_3 +920 0x7FFF //TX_MICMUTE_MIN_EQ_RE_EST_4 +921 0x4000 //TX_MICMUTE_C_POST_FLT +922 0x03E8 //TX_MICMUTE_DT_CUT_K +923 0x0001 //TX_MICMUTE_DT_CUT_THR +924 0x03E8 //TX_MICMUTE_DT_CUT_K2 +925 0x0001 //TX_MICMUTE_DT_CUT_THR2 +926 0x0064 //TX_MICMUTE_DT2_HOLD_N +927 0x1000 //TX_MICMUTE_RATIODTH_THCUT +928 0x1000 //TX_MICMUTE_B_POST_FLT_ECHOL +929 0x7FFF //TX_MICMUTE_B_POST_FLT_ECHOH +930 0x0400 //TX_MICMUTE_C_POST_FLT_MASK +931 0x7999 //TX_MICMUTE_RATIODTL_CUT_TH +932 0x0258 //TX_MICMUTE_DT_CUT_K1 +933 0x0800 //TX_MICMUTE_N2_SN_EST +934 0xFC00 //TX_MICMUTE_THR_SN_EST_0 +935 0x001C //TX_MICMUTE_MIN_G_CTRL_0 +936 0x6000 //TX_MICMUTE_A_POST_FILT_S_0 +937 0x7000 //TX_MICMUTE_B_POST_FILT_0 +938 0x2710 //TX_MIC1RUB_AMP_THR +939 0x0010 //TX_MIC1MUTE_RATIO_THR +940 0x0450 //TX_MIC1MUTE_AMP_THR +941 0x0008 //TX_MIC1MUTE_CVG_TIME +942 0x0008 //TX_MIC1MUTE_RELEASE_TIME +943 0x0000 //TX_AMS_RESRV_01 +944 0x0000 //TX_AMS_RESRV_02 +945 0x0000 //TX_AMS_RESRV_03 +946 0x0000 //TX_AMS_RESRV_04 +947 0x0000 //TX_AMS_RESRV_05 +948 0x0000 //TX_AMS_RESRV_06 +949 0x0000 //TX_AMS_RESRV_07 +950 0x0000 //TX_AMS_RESRV_08 +951 0x0000 //TX_AMS_RESRV_09 +952 0x0000 //TX_AMS_RESRV_10 +953 0x0000 //TX_AMS_RESRV_11 +954 0x0000 //TX_AMS_RESRV_12 +955 0x0000 //TX_AMS_RESRV_13 +956 0x0000 //TX_AMS_RESRV_14 +957 0x0000 //TX_AMS_RESRV_15 +958 0x0000 //TX_AMS_RESRV_16 +959 0x0000 //TX_AMS_RESRV_17 +960 0x0000 //TX_AMS_RESRV_18 +961 0x0000 //TX_AMS_RESRV_19 #RX -0 0x0040 //RX_RECVFUNC_MODE_0 +0 0x2040 //RX_RECVFUNC_MODE_0 1 0x0000 //RX_RECVFUNC_MODE_1 2 0x0000 //RX_SAMPLINGFREQ_SIG 3 0x0000 //RX_SAMPLINGFREQ_PROC @@ -54376,11 +81921,862 @@ 110 0x0000 //RX_FDDRC_RESRV_0 129 0x0100 //RX_SPK_VOL 130 0x0000 //RX_VOL_RESRV_0 +#RX 2 +157 0x2040 //RX_RECVFUNC_MODE_0 +158 0x0000 //RX_RECVFUNC_MODE_1 +159 0x0000 //RX_SAMPLINGFREQ_SIG +160 0x0000 //RX_SAMPLINGFREQ_PROC +161 0x000A //RX_FRAME_SZ +162 0x0000 //RX_DELAY_OPT +163 0x3000 //RX_TDDRC_ALPHA_UP_1 +164 0x3000 //RX_TDDRC_ALPHA_UP_2 +165 0x3000 //RX_TDDRC_ALPHA_UP_3 +166 0x3000 //RX_TDDRC_ALPHA_UP_4 +167 0x050D //RX_PGA +168 0x7652 //RX_A_HP +169 0x4000 //RX_B_PE +170 0x7800 //RX_THR_PITCH_DET_0 +171 0x7000 //RX_THR_PITCH_DET_1 +172 0x6000 //RX_THR_PITCH_DET_2 +173 0x0000 //RX_PITCH_BFR_LEN +174 0x0000 //RX_SBD_PITCH_DET +175 0x0000 //RX_PP_RESRV_0 +176 0x0000 //RX_PP_RESRV_1 +177 0xF800 //RX_N_SN_EST +178 0x0000 //RX_N2_SN_EST +179 0x000F //RX_NS_LVL_CTRL +180 0xF800 //RX_THR_SN_EST +181 0x7E00 //RX_LAMBDA_PFILT +182 0x000A //RX_FENS_RESRV_0 +183 0x0000 //RX_FENS_RESRV_1 +184 0x7FB0 //RX_TDDRC_ALPHA_DWN_1 +185 0x7FB0 //RX_TDDRC_ALPHA_DWN_2 +186 0x7FB0 //RX_TDDRC_ALPHA_DWN_3 +187 0x0000 //RX_EXTRA_NS_L +188 0x0000 //RX_EXTRA_NS_A +189 0x7FB0 //RX_TDDRC_ALPHA_DWN_4 +190 0xDA9E //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +192 0x0000 //RX_A_POST_FLT +193 0x0000 //RX_LMT_THRD +194 0x4000 //RX_LMT_ALPHA +195 0x0020 //RX_FDEQ_SUBNUM +196 0x4848 //RX_FDEQ_GAIN_0 +197 0x4848 //RX_FDEQ_GAIN_1 +198 0x4848 //RX_FDEQ_GAIN_2 +199 0x4848 //RX_FDEQ_GAIN_3 +200 0x4848 //RX_FDEQ_GAIN_4 +201 0x4848 //RX_FDEQ_GAIN_5 +202 0x4848 //RX_FDEQ_GAIN_6 +203 0x4848 //RX_FDEQ_GAIN_7 +204 0x4848 //RX_FDEQ_GAIN_8 +205 0x4848 //RX_FDEQ_GAIN_9 +206 0x4848 //RX_FDEQ_GAIN_10 +207 0x4848 //RX_FDEQ_GAIN_11 +208 0x4848 //RX_FDEQ_GAIN_12 +209 0x4848 //RX_FDEQ_GAIN_13 +210 0x4848 //RX_FDEQ_GAIN_14 +211 0x4848 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0000 //RX_FDEQ_BIN_0 +221 0x0000 //RX_FDEQ_BIN_1 +222 0x0000 //RX_FDEQ_BIN_2 +223 0x0000 //RX_FDEQ_BIN_3 +224 0x0000 //RX_FDEQ_BIN_4 +225 0x0000 //RX_FDEQ_BIN_5 +226 0x0000 //RX_FDEQ_BIN_6 +227 0x0000 //RX_FDEQ_BIN_7 +228 0x0000 //RX_FDEQ_BIN_8 +229 0x0000 //RX_FDEQ_BIN_9 +230 0x0000 //RX_FDEQ_BIN_10 +231 0x0000 //RX_FDEQ_BIN_11 +232 0x0000 //RX_FDEQ_BIN_12 +233 0x0000 //RX_FDEQ_BIN_13 +234 0x0000 //RX_FDEQ_BIN_14 +235 0x0000 //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x0000 //RX_FDEQ_RESRV_0 +245 0x0000 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0030 //RX_FDDRC_BAND_MARGIN_1 +248 0x0050 //RX_FDDRC_BAND_MARGIN_2 +249 0x0080 //RX_FDDRC_BAND_MARGIN_3 +250 0x0004 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x5000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x6400 //RX_FDDRC_THRD_3_2 +258 0x6400 //RX_FDDRC_THRD_3_3 +259 0x2000 //RX_FDDRC_SLANT_0_0 +260 0x2000 //RX_FDDRC_SLANT_0_1 +261 0x2000 //RX_FDDRC_SLANT_0_2 +262 0x2000 //RX_FDDRC_SLANT_0_3 +263 0x2000 //RX_FDDRC_SLANT_1_0 +264 0x2000 //RX_FDDRC_SLANT_1_1 +265 0x2000 //RX_FDDRC_SLANT_1_2 +266 0x2000 //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +268 0x0003 //RX_FILTINDX +269 0x0000 //RX_TDDRC_THRD_0 +270 0x0000 //RX_TDDRC_THRD_1 +271 0x0E80 //RX_TDDRC_THRD_2 +272 0x3800 //RX_TDDRC_THRD_3 +273 0x2A00 //RX_TDDRC_SLANT_0 +274 0x6E00 //RX_TDDRC_SLANT_1 +275 0x3000 //RX_TDDRC_ALPHA_UP_0 +276 0x7FB0 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x0000 //RX_TDDRC_HMNC_GAIN +279 0x0000 //RX_TDDRC_SMT_FLAG +280 0x0000 //RX_TDDRC_SMT_W +281 0x0100 //RX_TDDRC_DRC_GAIN +282 0x7C00 //RX_LAMBDA_PKA_FP +283 0x2000 //RX_TPKA_FP +284 0x0080 //RX_MIN_G_FP +285 0x2000 //RX_MAX_G_FP +286 0x0100 //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 +288 0x0010 //RX_MAXLEVEL_CNG +289 0x0000 //RX_BWE_UV_TH +290 0x0000 //RX_BWE_UV_TH2 +291 0x0000 //RX_BWE_UV_TH3 +292 0x0000 //RX_BWE_V_TH +293 0x0000 //RX_BWE_GAIN1_V_TH1 +294 0x0000 //RX_BWE_GAIN1_V_TH2 +295 0x0000 //RX_BWE_UV_EQ +296 0x0000 //RX_BWE_V_EQ +297 0x0000 //RX_BWE_TONE_TH +298 0x0000 //RX_BWE_UV_HOLD_T +299 0x0000 //RX_BWE_GAIN2_ALPHA +300 0x0000 //RX_BWE_GAIN3_ALPHA +301 0x0000 //RX_BWE_CUTOFF +302 0x0000 //RX_BWE_GAINFILL +303 0x0000 //RX_BWE_MAXTH_TONE +304 0x0000 //RX_BWE_EQ_0 +305 0x0000 //RX_BWE_EQ_1 +306 0x0000 //RX_BWE_EQ_2 +307 0x0000 //RX_BWE_EQ_3 +308 0x0000 //RX_BWE_EQ_4 +309 0x0000 //RX_BWE_EQ_5 +310 0x0000 //RX_BWE_EQ_6 +311 0x0000 //RX_BWE_RESRV_0 +312 0x0000 //RX_BWE_RESRV_1 +313 0x0000 //RX_BWE_RESRV_2 +#VOL 0 +163 0x3000 //RX_TDDRC_ALPHA_UP_1 +164 0x3000 //RX_TDDRC_ALPHA_UP_2 +165 0x3000 //RX_TDDRC_ALPHA_UP_3 +166 0x3000 //RX_TDDRC_ALPHA_UP_4 +184 0x7FB0 //RX_TDDRC_ALPHA_DWN_1 +185 0x7FB0 //RX_TDDRC_ALPHA_DWN_2 +186 0x7FB0 //RX_TDDRC_ALPHA_DWN_3 +189 0x7FB0 //RX_TDDRC_ALPHA_DWN_4 +190 0xDA9E //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +269 0x0000 //RX_TDDRC_THRD_0 +270 0x0000 //RX_TDDRC_THRD_1 +271 0x0E80 //RX_TDDRC_THRD_2 +272 0x3800 //RX_TDDRC_THRD_3 +273 0x2A00 //RX_TDDRC_SLANT_0 +274 0x6E00 //RX_TDDRC_SLANT_1 +275 0x3000 //RX_TDDRC_ALPHA_UP_0 +276 0x7FB0 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x0000 //RX_TDDRC_HMNC_GAIN +279 0x0000 //RX_TDDRC_SMT_FLAG +280 0x0000 //RX_TDDRC_SMT_W +281 0x0100 //RX_TDDRC_DRC_GAIN +195 0x0020 //RX_FDEQ_SUBNUM +196 0x4848 //RX_FDEQ_GAIN_0 +197 0x4848 //RX_FDEQ_GAIN_1 +198 0x4848 //RX_FDEQ_GAIN_2 +199 0x4848 //RX_FDEQ_GAIN_3 +200 0x4848 //RX_FDEQ_GAIN_4 +201 0x4848 //RX_FDEQ_GAIN_5 +202 0x4848 //RX_FDEQ_GAIN_6 +203 0x4848 //RX_FDEQ_GAIN_7 +204 0x4848 //RX_FDEQ_GAIN_8 +205 0x4848 //RX_FDEQ_GAIN_9 +206 0x4848 //RX_FDEQ_GAIN_10 +207 0x4848 //RX_FDEQ_GAIN_11 +208 0x4848 //RX_FDEQ_GAIN_12 +209 0x4848 //RX_FDEQ_GAIN_13 +210 0x4848 //RX_FDEQ_GAIN_14 +211 0x4848 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0000 //RX_FDEQ_BIN_0 +221 0x0000 //RX_FDEQ_BIN_1 +222 0x0000 //RX_FDEQ_BIN_2 +223 0x0000 //RX_FDEQ_BIN_3 +224 0x0000 //RX_FDEQ_BIN_4 +225 0x0000 //RX_FDEQ_BIN_5 +226 0x0000 //RX_FDEQ_BIN_6 +227 0x0000 //RX_FDEQ_BIN_7 +228 0x0000 //RX_FDEQ_BIN_8 +229 0x0000 //RX_FDEQ_BIN_9 +230 0x0000 //RX_FDEQ_BIN_10 +231 0x0000 //RX_FDEQ_BIN_11 +232 0x0000 //RX_FDEQ_BIN_12 +233 0x0000 //RX_FDEQ_BIN_13 +234 0x0000 //RX_FDEQ_BIN_14 +235 0x0000 //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x0000 //RX_FDEQ_RESRV_0 +245 0x0000 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0030 //RX_FDDRC_BAND_MARGIN_1 +248 0x0050 //RX_FDDRC_BAND_MARGIN_2 +249 0x0080 //RX_FDDRC_BAND_MARGIN_3 +250 0x0004 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x5000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x6400 //RX_FDDRC_THRD_3_2 +258 0x6400 //RX_FDDRC_THRD_3_3 +259 0x2000 //RX_FDDRC_SLANT_0_0 +260 0x2000 //RX_FDDRC_SLANT_0_1 +261 0x2000 //RX_FDDRC_SLANT_0_2 +262 0x2000 //RX_FDDRC_SLANT_0_3 +263 0x2000 //RX_FDDRC_SLANT_1_0 +264 0x2000 //RX_FDDRC_SLANT_1_1 +265 0x2000 //RX_FDDRC_SLANT_1_2 +266 0x2000 //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +286 0x0100 //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 +#VOL 1 +163 0x3000 //RX_TDDRC_ALPHA_UP_1 +164 0x3000 //RX_TDDRC_ALPHA_UP_2 +165 0x3000 //RX_TDDRC_ALPHA_UP_3 +166 0x3000 //RX_TDDRC_ALPHA_UP_4 +184 0x7FB0 //RX_TDDRC_ALPHA_DWN_1 +185 0x7FB0 //RX_TDDRC_ALPHA_DWN_2 +186 0x7FB0 //RX_TDDRC_ALPHA_DWN_3 +189 0x7FB0 //RX_TDDRC_ALPHA_DWN_4 +190 0xDA9E //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +269 0x0000 //RX_TDDRC_THRD_0 +270 0x0000 //RX_TDDRC_THRD_1 +271 0x0E80 //RX_TDDRC_THRD_2 +272 0x3800 //RX_TDDRC_THRD_3 +273 0x2A00 //RX_TDDRC_SLANT_0 +274 0x6E00 //RX_TDDRC_SLANT_1 +275 0x3000 //RX_TDDRC_ALPHA_UP_0 +276 0x7FB0 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x0000 //RX_TDDRC_HMNC_GAIN +279 0x0000 //RX_TDDRC_SMT_FLAG +280 0x0000 //RX_TDDRC_SMT_W +281 0x0100 //RX_TDDRC_DRC_GAIN +195 0x0020 //RX_FDEQ_SUBNUM +196 0x4848 //RX_FDEQ_GAIN_0 +197 0x4848 //RX_FDEQ_GAIN_1 +198 0x4848 //RX_FDEQ_GAIN_2 +199 0x4848 //RX_FDEQ_GAIN_3 +200 0x4848 //RX_FDEQ_GAIN_4 +201 0x4848 //RX_FDEQ_GAIN_5 +202 0x4848 //RX_FDEQ_GAIN_6 +203 0x4848 //RX_FDEQ_GAIN_7 +204 0x4848 //RX_FDEQ_GAIN_8 +205 0x4848 //RX_FDEQ_GAIN_9 +206 0x4848 //RX_FDEQ_GAIN_10 +207 0x4848 //RX_FDEQ_GAIN_11 +208 0x4848 //RX_FDEQ_GAIN_12 +209 0x4848 //RX_FDEQ_GAIN_13 +210 0x4848 //RX_FDEQ_GAIN_14 +211 0x4848 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0000 //RX_FDEQ_BIN_0 +221 0x0000 //RX_FDEQ_BIN_1 +222 0x0000 //RX_FDEQ_BIN_2 +223 0x0000 //RX_FDEQ_BIN_3 +224 0x0000 //RX_FDEQ_BIN_4 +225 0x0000 //RX_FDEQ_BIN_5 +226 0x0000 //RX_FDEQ_BIN_6 +227 0x0000 //RX_FDEQ_BIN_7 +228 0x0000 //RX_FDEQ_BIN_8 +229 0x0000 //RX_FDEQ_BIN_9 +230 0x0000 //RX_FDEQ_BIN_10 +231 0x0000 //RX_FDEQ_BIN_11 +232 0x0000 //RX_FDEQ_BIN_12 +233 0x0000 //RX_FDEQ_BIN_13 +234 0x0000 //RX_FDEQ_BIN_14 +235 0x0000 //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x0000 //RX_FDEQ_RESRV_0 +245 0x0000 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0030 //RX_FDDRC_BAND_MARGIN_1 +248 0x0050 //RX_FDDRC_BAND_MARGIN_2 +249 0x0080 //RX_FDDRC_BAND_MARGIN_3 +250 0x0004 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x5000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x6400 //RX_FDDRC_THRD_3_2 +258 0x6400 //RX_FDDRC_THRD_3_3 +259 0x2000 //RX_FDDRC_SLANT_0_0 +260 0x2000 //RX_FDDRC_SLANT_0_1 +261 0x2000 //RX_FDDRC_SLANT_0_2 +262 0x2000 //RX_FDDRC_SLANT_0_3 +263 0x2000 //RX_FDDRC_SLANT_1_0 +264 0x2000 //RX_FDDRC_SLANT_1_1 +265 0x2000 //RX_FDDRC_SLANT_1_2 +266 0x2000 //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +286 0x0100 //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 +#VOL 2 +163 0x3000 //RX_TDDRC_ALPHA_UP_1 +164 0x3000 //RX_TDDRC_ALPHA_UP_2 +165 0x3000 //RX_TDDRC_ALPHA_UP_3 +166 0x3000 //RX_TDDRC_ALPHA_UP_4 +184 0x7FB0 //RX_TDDRC_ALPHA_DWN_1 +185 0x7FB0 //RX_TDDRC_ALPHA_DWN_2 +186 0x7FB0 //RX_TDDRC_ALPHA_DWN_3 +189 0x7FB0 //RX_TDDRC_ALPHA_DWN_4 +190 0xDA9E //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +269 0x0000 //RX_TDDRC_THRD_0 +270 0x0000 //RX_TDDRC_THRD_1 +271 0x0E80 //RX_TDDRC_THRD_2 +272 0x3800 //RX_TDDRC_THRD_3 +273 0x2A00 //RX_TDDRC_SLANT_0 +274 0x6E00 //RX_TDDRC_SLANT_1 +275 0x3000 //RX_TDDRC_ALPHA_UP_0 +276 0x7FB0 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x0000 //RX_TDDRC_HMNC_GAIN +279 0x0000 //RX_TDDRC_SMT_FLAG +280 0x0000 //RX_TDDRC_SMT_W +281 0x0100 //RX_TDDRC_DRC_GAIN +195 0x0020 //RX_FDEQ_SUBNUM +196 0x4848 //RX_FDEQ_GAIN_0 +197 0x4848 //RX_FDEQ_GAIN_1 +198 0x4848 //RX_FDEQ_GAIN_2 +199 0x4848 //RX_FDEQ_GAIN_3 +200 0x4848 //RX_FDEQ_GAIN_4 +201 0x4848 //RX_FDEQ_GAIN_5 +202 0x4848 //RX_FDEQ_GAIN_6 +203 0x4848 //RX_FDEQ_GAIN_7 +204 0x4848 //RX_FDEQ_GAIN_8 +205 0x4848 //RX_FDEQ_GAIN_9 +206 0x4848 //RX_FDEQ_GAIN_10 +207 0x4848 //RX_FDEQ_GAIN_11 +208 0x4848 //RX_FDEQ_GAIN_12 +209 0x4848 //RX_FDEQ_GAIN_13 +210 0x4848 //RX_FDEQ_GAIN_14 +211 0x4848 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0000 //RX_FDEQ_BIN_0 +221 0x0000 //RX_FDEQ_BIN_1 +222 0x0000 //RX_FDEQ_BIN_2 +223 0x0000 //RX_FDEQ_BIN_3 +224 0x0000 //RX_FDEQ_BIN_4 +225 0x0000 //RX_FDEQ_BIN_5 +226 0x0000 //RX_FDEQ_BIN_6 +227 0x0000 //RX_FDEQ_BIN_7 +228 0x0000 //RX_FDEQ_BIN_8 +229 0x0000 //RX_FDEQ_BIN_9 +230 0x0000 //RX_FDEQ_BIN_10 +231 0x0000 //RX_FDEQ_BIN_11 +232 0x0000 //RX_FDEQ_BIN_12 +233 0x0000 //RX_FDEQ_BIN_13 +234 0x0000 //RX_FDEQ_BIN_14 +235 0x0000 //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x0000 //RX_FDEQ_RESRV_0 +245 0x0000 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0030 //RX_FDDRC_BAND_MARGIN_1 +248 0x0050 //RX_FDDRC_BAND_MARGIN_2 +249 0x0080 //RX_FDDRC_BAND_MARGIN_3 +250 0x0004 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x5000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x6400 //RX_FDDRC_THRD_3_2 +258 0x6400 //RX_FDDRC_THRD_3_3 +259 0x2000 //RX_FDDRC_SLANT_0_0 +260 0x2000 //RX_FDDRC_SLANT_0_1 +261 0x2000 //RX_FDDRC_SLANT_0_2 +262 0x2000 //RX_FDDRC_SLANT_0_3 +263 0x2000 //RX_FDDRC_SLANT_1_0 +264 0x2000 //RX_FDDRC_SLANT_1_1 +265 0x2000 //RX_FDDRC_SLANT_1_2 +266 0x2000 //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +286 0x0100 //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 +#VOL 3 +163 0x3000 //RX_TDDRC_ALPHA_UP_1 +164 0x3000 //RX_TDDRC_ALPHA_UP_2 +165 0x3000 //RX_TDDRC_ALPHA_UP_3 +166 0x3000 //RX_TDDRC_ALPHA_UP_4 +184 0x7FB0 //RX_TDDRC_ALPHA_DWN_1 +185 0x7FB0 //RX_TDDRC_ALPHA_DWN_2 +186 0x7FB0 //RX_TDDRC_ALPHA_DWN_3 +189 0x7FB0 //RX_TDDRC_ALPHA_DWN_4 +190 0xDA9E //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +269 0x0000 //RX_TDDRC_THRD_0 +270 0x0000 //RX_TDDRC_THRD_1 +271 0x0E80 //RX_TDDRC_THRD_2 +272 0x3800 //RX_TDDRC_THRD_3 +273 0x2A00 //RX_TDDRC_SLANT_0 +274 0x6E00 //RX_TDDRC_SLANT_1 +275 0x3000 //RX_TDDRC_ALPHA_UP_0 +276 0x7FB0 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x0000 //RX_TDDRC_HMNC_GAIN +279 0x0000 //RX_TDDRC_SMT_FLAG +280 0x0000 //RX_TDDRC_SMT_W +281 0x0100 //RX_TDDRC_DRC_GAIN +195 0x0020 //RX_FDEQ_SUBNUM +196 0x4848 //RX_FDEQ_GAIN_0 +197 0x4848 //RX_FDEQ_GAIN_1 +198 0x4848 //RX_FDEQ_GAIN_2 +199 0x4848 //RX_FDEQ_GAIN_3 +200 0x4848 //RX_FDEQ_GAIN_4 +201 0x4848 //RX_FDEQ_GAIN_5 +202 0x4848 //RX_FDEQ_GAIN_6 +203 0x4848 //RX_FDEQ_GAIN_7 +204 0x4848 //RX_FDEQ_GAIN_8 +205 0x4848 //RX_FDEQ_GAIN_9 +206 0x4848 //RX_FDEQ_GAIN_10 +207 0x4848 //RX_FDEQ_GAIN_11 +208 0x4848 //RX_FDEQ_GAIN_12 +209 0x4848 //RX_FDEQ_GAIN_13 +210 0x4848 //RX_FDEQ_GAIN_14 +211 0x4848 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0000 //RX_FDEQ_BIN_0 +221 0x0000 //RX_FDEQ_BIN_1 +222 0x0000 //RX_FDEQ_BIN_2 +223 0x0000 //RX_FDEQ_BIN_3 +224 0x0000 //RX_FDEQ_BIN_4 +225 0x0000 //RX_FDEQ_BIN_5 +226 0x0000 //RX_FDEQ_BIN_6 +227 0x0000 //RX_FDEQ_BIN_7 +228 0x0000 //RX_FDEQ_BIN_8 +229 0x0000 //RX_FDEQ_BIN_9 +230 0x0000 //RX_FDEQ_BIN_10 +231 0x0000 //RX_FDEQ_BIN_11 +232 0x0000 //RX_FDEQ_BIN_12 +233 0x0000 //RX_FDEQ_BIN_13 +234 0x0000 //RX_FDEQ_BIN_14 +235 0x0000 //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x0000 //RX_FDEQ_RESRV_0 +245 0x0000 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0030 //RX_FDDRC_BAND_MARGIN_1 +248 0x0050 //RX_FDDRC_BAND_MARGIN_2 +249 0x0080 //RX_FDDRC_BAND_MARGIN_3 +250 0x0004 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x5000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x6400 //RX_FDDRC_THRD_3_2 +258 0x6400 //RX_FDDRC_THRD_3_3 +259 0x2000 //RX_FDDRC_SLANT_0_0 +260 0x2000 //RX_FDDRC_SLANT_0_1 +261 0x2000 //RX_FDDRC_SLANT_0_2 +262 0x2000 //RX_FDDRC_SLANT_0_3 +263 0x2000 //RX_FDDRC_SLANT_1_0 +264 0x2000 //RX_FDDRC_SLANT_1_1 +265 0x2000 //RX_FDDRC_SLANT_1_2 +266 0x2000 //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +286 0x0100 //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 +#VOL 4 +163 0x3000 //RX_TDDRC_ALPHA_UP_1 +164 0x3000 //RX_TDDRC_ALPHA_UP_2 +165 0x3000 //RX_TDDRC_ALPHA_UP_3 +166 0x3000 //RX_TDDRC_ALPHA_UP_4 +184 0x7FB0 //RX_TDDRC_ALPHA_DWN_1 +185 0x7FB0 //RX_TDDRC_ALPHA_DWN_2 +186 0x7FB0 //RX_TDDRC_ALPHA_DWN_3 +189 0x7FB0 //RX_TDDRC_ALPHA_DWN_4 +190 0xDA9E //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +269 0x0000 //RX_TDDRC_THRD_0 +270 0x0000 //RX_TDDRC_THRD_1 +271 0x0E80 //RX_TDDRC_THRD_2 +272 0x3800 //RX_TDDRC_THRD_3 +273 0x2A00 //RX_TDDRC_SLANT_0 +274 0x6E00 //RX_TDDRC_SLANT_1 +275 0x3000 //RX_TDDRC_ALPHA_UP_0 +276 0x7FB0 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x0000 //RX_TDDRC_HMNC_GAIN +279 0x0000 //RX_TDDRC_SMT_FLAG +280 0x0000 //RX_TDDRC_SMT_W +281 0x0100 //RX_TDDRC_DRC_GAIN +195 0x0020 //RX_FDEQ_SUBNUM +196 0x4848 //RX_FDEQ_GAIN_0 +197 0x4848 //RX_FDEQ_GAIN_1 +198 0x4848 //RX_FDEQ_GAIN_2 +199 0x4848 //RX_FDEQ_GAIN_3 +200 0x4848 //RX_FDEQ_GAIN_4 +201 0x4848 //RX_FDEQ_GAIN_5 +202 0x4848 //RX_FDEQ_GAIN_6 +203 0x4848 //RX_FDEQ_GAIN_7 +204 0x4848 //RX_FDEQ_GAIN_8 +205 0x4848 //RX_FDEQ_GAIN_9 +206 0x4848 //RX_FDEQ_GAIN_10 +207 0x4848 //RX_FDEQ_GAIN_11 +208 0x4848 //RX_FDEQ_GAIN_12 +209 0x4848 //RX_FDEQ_GAIN_13 +210 0x4848 //RX_FDEQ_GAIN_14 +211 0x4848 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0000 //RX_FDEQ_BIN_0 +221 0x0000 //RX_FDEQ_BIN_1 +222 0x0000 //RX_FDEQ_BIN_2 +223 0x0000 //RX_FDEQ_BIN_3 +224 0x0000 //RX_FDEQ_BIN_4 +225 0x0000 //RX_FDEQ_BIN_5 +226 0x0000 //RX_FDEQ_BIN_6 +227 0x0000 //RX_FDEQ_BIN_7 +228 0x0000 //RX_FDEQ_BIN_8 +229 0x0000 //RX_FDEQ_BIN_9 +230 0x0000 //RX_FDEQ_BIN_10 +231 0x0000 //RX_FDEQ_BIN_11 +232 0x0000 //RX_FDEQ_BIN_12 +233 0x0000 //RX_FDEQ_BIN_13 +234 0x0000 //RX_FDEQ_BIN_14 +235 0x0000 //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x0000 //RX_FDEQ_RESRV_0 +245 0x0000 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0030 //RX_FDDRC_BAND_MARGIN_1 +248 0x0050 //RX_FDDRC_BAND_MARGIN_2 +249 0x0080 //RX_FDDRC_BAND_MARGIN_3 +250 0x0004 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x5000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x6400 //RX_FDDRC_THRD_3_2 +258 0x6400 //RX_FDDRC_THRD_3_3 +259 0x2000 //RX_FDDRC_SLANT_0_0 +260 0x2000 //RX_FDDRC_SLANT_0_1 +261 0x2000 //RX_FDDRC_SLANT_0_2 +262 0x2000 //RX_FDDRC_SLANT_0_3 +263 0x2000 //RX_FDDRC_SLANT_1_0 +264 0x2000 //RX_FDDRC_SLANT_1_1 +265 0x2000 //RX_FDDRC_SLANT_1_2 +266 0x2000 //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +286 0x0100 //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 +#VOL 5 +163 0x3000 //RX_TDDRC_ALPHA_UP_1 +164 0x3000 //RX_TDDRC_ALPHA_UP_2 +165 0x3000 //RX_TDDRC_ALPHA_UP_3 +166 0x3000 //RX_TDDRC_ALPHA_UP_4 +184 0x7FB0 //RX_TDDRC_ALPHA_DWN_1 +185 0x7FB0 //RX_TDDRC_ALPHA_DWN_2 +186 0x7FB0 //RX_TDDRC_ALPHA_DWN_3 +189 0x7FB0 //RX_TDDRC_ALPHA_DWN_4 +190 0xDA9E //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +269 0x0000 //RX_TDDRC_THRD_0 +270 0x0000 //RX_TDDRC_THRD_1 +271 0x0E80 //RX_TDDRC_THRD_2 +272 0x3800 //RX_TDDRC_THRD_3 +273 0x2A00 //RX_TDDRC_SLANT_0 +274 0x6E00 //RX_TDDRC_SLANT_1 +275 0x3000 //RX_TDDRC_ALPHA_UP_0 +276 0x7FB0 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x0000 //RX_TDDRC_HMNC_GAIN +279 0x0000 //RX_TDDRC_SMT_FLAG +280 0x0000 //RX_TDDRC_SMT_W +281 0x0100 //RX_TDDRC_DRC_GAIN +195 0x0020 //RX_FDEQ_SUBNUM +196 0x4848 //RX_FDEQ_GAIN_0 +197 0x4848 //RX_FDEQ_GAIN_1 +198 0x4848 //RX_FDEQ_GAIN_2 +199 0x4848 //RX_FDEQ_GAIN_3 +200 0x4848 //RX_FDEQ_GAIN_4 +201 0x4848 //RX_FDEQ_GAIN_5 +202 0x4848 //RX_FDEQ_GAIN_6 +203 0x4848 //RX_FDEQ_GAIN_7 +204 0x4848 //RX_FDEQ_GAIN_8 +205 0x4848 //RX_FDEQ_GAIN_9 +206 0x4848 //RX_FDEQ_GAIN_10 +207 0x4848 //RX_FDEQ_GAIN_11 +208 0x4848 //RX_FDEQ_GAIN_12 +209 0x4848 //RX_FDEQ_GAIN_13 +210 0x4848 //RX_FDEQ_GAIN_14 +211 0x4848 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0000 //RX_FDEQ_BIN_0 +221 0x0000 //RX_FDEQ_BIN_1 +222 0x0000 //RX_FDEQ_BIN_2 +223 0x0000 //RX_FDEQ_BIN_3 +224 0x0000 //RX_FDEQ_BIN_4 +225 0x0000 //RX_FDEQ_BIN_5 +226 0x0000 //RX_FDEQ_BIN_6 +227 0x0000 //RX_FDEQ_BIN_7 +228 0x0000 //RX_FDEQ_BIN_8 +229 0x0000 //RX_FDEQ_BIN_9 +230 0x0000 //RX_FDEQ_BIN_10 +231 0x0000 //RX_FDEQ_BIN_11 +232 0x0000 //RX_FDEQ_BIN_12 +233 0x0000 //RX_FDEQ_BIN_13 +234 0x0000 //RX_FDEQ_BIN_14 +235 0x0000 //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x0000 //RX_FDEQ_RESRV_0 +245 0x0000 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0030 //RX_FDDRC_BAND_MARGIN_1 +248 0x0050 //RX_FDDRC_BAND_MARGIN_2 +249 0x0080 //RX_FDDRC_BAND_MARGIN_3 +250 0x0004 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x5000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x6400 //RX_FDDRC_THRD_3_2 +258 0x6400 //RX_FDDRC_THRD_3_3 +259 0x2000 //RX_FDDRC_SLANT_0_0 +260 0x2000 //RX_FDDRC_SLANT_0_1 +261 0x2000 //RX_FDDRC_SLANT_0_2 +262 0x2000 //RX_FDDRC_SLANT_0_3 +263 0x2000 //RX_FDDRC_SLANT_1_0 +264 0x2000 //RX_FDDRC_SLANT_1_1 +265 0x2000 //RX_FDDRC_SLANT_1_2 +266 0x2000 //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +286 0x0100 //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 +#VOL 6 +163 0x3000 //RX_TDDRC_ALPHA_UP_1 +164 0x3000 //RX_TDDRC_ALPHA_UP_2 +165 0x3000 //RX_TDDRC_ALPHA_UP_3 +166 0x3000 //RX_TDDRC_ALPHA_UP_4 +184 0x7FB0 //RX_TDDRC_ALPHA_DWN_1 +185 0x7FB0 //RX_TDDRC_ALPHA_DWN_2 +186 0x7FB0 //RX_TDDRC_ALPHA_DWN_3 +189 0x7FB0 //RX_TDDRC_ALPHA_DWN_4 +190 0xDA9E //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +269 0x0000 //RX_TDDRC_THRD_0 +270 0x0000 //RX_TDDRC_THRD_1 +271 0x0E80 //RX_TDDRC_THRD_2 +272 0x3800 //RX_TDDRC_THRD_3 +273 0x2A00 //RX_TDDRC_SLANT_0 +274 0x6E00 //RX_TDDRC_SLANT_1 +275 0x3000 //RX_TDDRC_ALPHA_UP_0 +276 0x7FB0 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x0000 //RX_TDDRC_HMNC_GAIN +279 0x0000 //RX_TDDRC_SMT_FLAG +280 0x0000 //RX_TDDRC_SMT_W +281 0x0100 //RX_TDDRC_DRC_GAIN +195 0x0020 //RX_FDEQ_SUBNUM +196 0x4848 //RX_FDEQ_GAIN_0 +197 0x4848 //RX_FDEQ_GAIN_1 +198 0x4848 //RX_FDEQ_GAIN_2 +199 0x4848 //RX_FDEQ_GAIN_3 +200 0x4848 //RX_FDEQ_GAIN_4 +201 0x4848 //RX_FDEQ_GAIN_5 +202 0x4848 //RX_FDEQ_GAIN_6 +203 0x4848 //RX_FDEQ_GAIN_7 +204 0x4848 //RX_FDEQ_GAIN_8 +205 0x4848 //RX_FDEQ_GAIN_9 +206 0x4848 //RX_FDEQ_GAIN_10 +207 0x4848 //RX_FDEQ_GAIN_11 +208 0x4848 //RX_FDEQ_GAIN_12 +209 0x4848 //RX_FDEQ_GAIN_13 +210 0x4848 //RX_FDEQ_GAIN_14 +211 0x4848 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0000 //RX_FDEQ_BIN_0 +221 0x0000 //RX_FDEQ_BIN_1 +222 0x0000 //RX_FDEQ_BIN_2 +223 0x0000 //RX_FDEQ_BIN_3 +224 0x0000 //RX_FDEQ_BIN_4 +225 0x0000 //RX_FDEQ_BIN_5 +226 0x0000 //RX_FDEQ_BIN_6 +227 0x0000 //RX_FDEQ_BIN_7 +228 0x0000 //RX_FDEQ_BIN_8 +229 0x0000 //RX_FDEQ_BIN_9 +230 0x0000 //RX_FDEQ_BIN_10 +231 0x0000 //RX_FDEQ_BIN_11 +232 0x0000 //RX_FDEQ_BIN_12 +233 0x0000 //RX_FDEQ_BIN_13 +234 0x0000 //RX_FDEQ_BIN_14 +235 0x0000 //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x0000 //RX_FDEQ_RESRV_0 +245 0x0000 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0030 //RX_FDDRC_BAND_MARGIN_1 +248 0x0050 //RX_FDDRC_BAND_MARGIN_2 +249 0x0080 //RX_FDDRC_BAND_MARGIN_3 +250 0x0004 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x5000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x6400 //RX_FDDRC_THRD_3_2 +258 0x6400 //RX_FDDRC_THRD_3_3 +259 0x2000 //RX_FDDRC_SLANT_0_0 +260 0x2000 //RX_FDDRC_SLANT_0_1 +261 0x2000 //RX_FDDRC_SLANT_0_2 +262 0x2000 //RX_FDDRC_SLANT_0_3 +263 0x2000 //RX_FDDRC_SLANT_1_0 +264 0x2000 //RX_FDDRC_SLANT_1_1 +265 0x2000 //RX_FDDRC_SLANT_1_2 +266 0x2000 //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +286 0x0100 //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 #CASE_NAME HEADSET-TTY_FULL-VOICE_GENERIC-FB -#PARAM_MODE FULL -#PARAM_TYPE TX+RX -#TOTAL_CUSTOM_STEP 7 +#PARAM_MODE Full +#PARAM_TYPE TX+2RX +#TOTAL_CUSTOM_STEP 7+7 #TX 0 0x0001 //TX_OPERATION_MODE_0 1 0x0000 //TX_OPERATION_MODE_1 @@ -54624,7 +83020,7 @@ 239 0x0000 //TX_DT_RESRV_7 240 0x0000 //TX_DT_RESRV_8 241 0x0000 //TX_DT_RESRV_9 -242 0xF200 //TX_THR_SN_EST_0 +242 0xF700 //TX_THR_SN_EST_0 243 0xF400 //TX_THR_SN_EST_1 244 0xF800 //TX_THR_SN_EST_2 245 0xF600 //TX_THR_SN_EST_3 @@ -54633,12 +83029,12 @@ 248 0xF800 //TX_THR_SN_EST_6 249 0xF800 //TX_THR_SN_EST_7 250 0x0100 //TX_DELTA_THR_SN_EST_0 -251 0x0000 //TX_DELTA_THR_SN_EST_1 +251 0x0100 //TX_DELTA_THR_SN_EST_1 252 0x0100 //TX_DELTA_THR_SN_EST_2 -253 0x0100 //TX_DELTA_THR_SN_EST_3 +253 0x0200 //TX_DELTA_THR_SN_EST_3 254 0x0200 //TX_DELTA_THR_SN_EST_4 255 0x0200 //TX_DELTA_THR_SN_EST_5 -256 0x0200 //TX_DELTA_THR_SN_EST_6 +256 0x0000 //TX_DELTA_THR_SN_EST_6 257 0x0200 //TX_DELTA_THR_SN_EST_7 258 0x4000 //TX_LAMBDA_NN_EST_0 259 0x4000 //TX_LAMBDA_NN_EST_1 @@ -54664,12 +83060,12 @@ 279 0x0000 //TX_B_POST_FLT_0 280 0x0000 //TX_B_POST_FLT_1 281 0x001A //TX_NS_LVL_CTRL_0 -282 0x001A //TX_NS_LVL_CTRL_1 +282 0x0014 //TX_NS_LVL_CTRL_1 283 0x0014 //TX_NS_LVL_CTRL_2 -284 0x0014 //TX_NS_LVL_CTRL_3 +284 0x000C //TX_NS_LVL_CTRL_3 285 0x000C //TX_NS_LVL_CTRL_4 286 0x000C //TX_NS_LVL_CTRL_5 -287 0x000C //TX_NS_LVL_CTRL_6 +287 0x001A //TX_NS_LVL_CTRL_6 288 0x000C //TX_NS_LVL_CTRL_7 289 0x000E //TX_MIN_GAIN_S_0 290 0x0014 //TX_MIN_GAIN_S_1 @@ -54685,10 +83081,10 @@ 300 0x7FFF //TX_SNRI_SUP_0 301 0x7FFF //TX_SNRI_SUP_1 302 0x7FFF //TX_SNRI_SUP_2 -303 0x7FFF //TX_SNRI_SUP_3 +303 0x4000 //TX_SNRI_SUP_3 304 0x4000 //TX_SNRI_SUP_4 305 0x4000 //TX_SNRI_SUP_5 -306 0x4000 //TX_SNRI_SUP_6 +306 0x7FFF //TX_SNRI_SUP_6 307 0x4000 //TX_SNRI_SUP_7 308 0x1200 //TX_THR_LFNS 309 0x0147 //TX_G_LFNS @@ -54697,12 +83093,12 @@ 312 0x7FFF //TX_A_POST_FILT_0 313 0x7FFF //TX_A_POST_FILT_1 314 0x4000 //TX_A_POST_FILT_S_0 -315 0x199A //TX_A_POST_FILT_S_1 +315 0x1000 //TX_A_POST_FILT_S_1 316 0x1000 //TX_A_POST_FILT_S_2 -317 0x1000 //TX_A_POST_FILT_S_3 +317 0x6666 //TX_A_POST_FILT_S_3 318 0x6666 //TX_A_POST_FILT_S_4 319 0x6666 //TX_A_POST_FILT_S_5 -320 0x6666 //TX_A_POST_FILT_S_6 +320 0x199A //TX_A_POST_FILT_S_6 321 0x6666 //TX_A_POST_FILT_S_7 322 0x2000 //TX_B_POST_FILT_0 323 0x2000 //TX_B_POST_FILT_1 @@ -54749,7 +83145,7 @@ 364 0x0000 //TX_K_APT 365 0x0001 //TX_NOISEDET 366 0x05A0 //TX_NDETCT -367 0x000A //TX_NOISE_TH_0 +367 0x04E8 //TX_NOISE_TH_0 368 0x1388 //TX_NOISE_TH_0_2 369 0x3A98 //TX_NOISE_TH_0_3 370 0x0C80 //TX_NOISE_TH_1 @@ -54761,11 +83157,11 @@ 376 0x7FFF //TX_NOISE_TH_5_3 377 0x7FFF //TX_NOISE_TH_5_4 378 0x00C8 //TX_NOISE_TH_6 -379 0x000A //TX_MINENOISE_TH -380 0x0000 //TX_MINENOISE_MIC0_TH_MTS -381 0x0000 //TX_MINENOISE_MIC0_TH_EXP -382 0x0000 //TX_MINENOISE_MIC0_S_TH_MTS -383 0x0000 //TX_MINENOISE_MIC0_S_TH_EXP +379 0x02BC //TX_MINENOISE_TH +380 0xD508 //TX_MORENS_TFMASK_TH +381 0x0001 //TX_DRC_QUIET_FLOOR +382 0x3A98 //TX_RATIODTL_CUT_TH +383 0x1482 //TX_DT_CUT_K1 384 0x6400 //TX_OUT_ENER_S_TH_CLEAN 385 0x6400 //TX_OUT_ENER_S_TH_LESSCLEAN 386 0x6400 //TX_OUT_ENER_S_TH_NOISY @@ -54773,22 +83169,22 @@ 388 0x7D00 //TX_OUT_ENER_TH_SPEECH 389 0x0000 //TX_SN_NPB_GAIN 390 0x0000 //TX_NN_NPB_GAIN -391 0x0000 //TX_CSX_ALPHA_0 -392 0x0000 //TX_CSX_ALPHA_1 -393 0x0000 //TX_CSX_ALPHA_2 -394 0x0000 //TX_CSX_ALPHA_3 -395 0x0000 //TX_MU_ARSP_EST -396 0x0000 //TX_P_OUTBEAM_MIN_TH +391 0x7FFF //TX_POST_MASK_SUP_HSNE +392 0x1388 //TX_TAIL_DET_TH +393 0x4000 //TX_B_LESSCUT_RTO_WTA +394 0x0000 //TX_MEL_G_R +395 0x0080 //TX_SUPHIGH_TH +396 0x0000 //TX_MASK_G_R 397 0x0000 //TX_EXTRA_NS_L -398 0x0000 //TX_EXTRA_NS_A -399 0x0000 //TX_VR_NOISE_FLOOR_TH +398 0x1800 //TX_C_POST_FLT_MASK +399 0x7FFF //TX_A_POST_FLT_WNS 400 0x0000 //TX_MIN_G_LOW300HZ 401 0x0010 //TX_MAXLEVEL_CNG 402 0x0000 //TX_STN_NOISE_TH 403 0x0000 //TX_POST_MASK_SUP 404 0x0000 //TX_POST_MASK_ADJUST 405 0x0014 //TX_NS_ENOISE_MIC0_TH -406 0x0014 //TX_MINENOISE_MIC0_TH +406 0x04E7 //TX_MINENOISE_MIC0_TH 407 0x0226 //TX_MINENOISE_MIC0_S_TH 408 0x2879 //TX_MIN_G_CTRL_SSNS 409 0x0400 //TX_METAL_RTO_THR @@ -54896,16 +83292,16 @@ 511 0x6666 //TX_MIC_TO_BFGAIN 512 0x6666 //TX_MICTOBFGAIN0 513 0x0014 //TX_FASTMUE_TH -514 0x0000 //TX_DERVB_LEN_0 -515 0x0000 //TX_DERVB_LEN_1 -516 0x0000 //TX_RHO_DERVB -517 0x0000 //TX_MIC_INDX_DERVB -518 0x0000 //TX_MU_DERVB -519 0x0000 //TX_DR_RESRV_0 -520 0x0000 //TX_DR_RESRV_1 -521 0x0000 //TX_DR_RESRV_2 -522 0x0000 //TX_DR_RESRV_3 -523 0x0000 //TX_DR_RESRV_4 +514 0xC000 //TX_DEREVERB_LF_MU +515 0xC000 //TX_DEREVERB_HF_MU +516 0xCCCC //TX_DEREVERB_DELAY +517 0xD999 //TX_DEREVERB_COEF_LEN +518 0x1F40 //TX_DEREVERB_DNR +519 0x0000 //TX_DEREVERB_ALPHA +520 0x0000 //TX_DEREVERB_BETA +521 0x0000 //TX_GSC_RTOL_TH +522 0x7000 //TX_GSC_RTOH_TH +523 0x0064 //TX_WIDE2_MEANHTH 524 0x0000 //TX_DR_RESRV_5 525 0x0000 //TX_DR_RESRV_6 526 0x0000 //TX_DR_RESRV_7 @@ -55271,16 +83667,81 @@ 886 0x0000 //TX_FASTNS_TFMASKBIN_TH2 887 0x0000 //TX_FASTNS_TFMASKBIN_TH3 888 0x00C8 //TX_FASTNS_ARSPC_TH -889 0xD99A //TX_FASTNS_MASK5_TH +889 0xC000 //TX_FASTNS_MASK5_TH 890 0x051F //TX_POSTSSA_MIN_G_VR_MASK -891 0x7FFF //TX_A_LESSCUT_RTO_MASK +891 0x7000 //TX_A_LESSCUT_RTO_MASK 892 0x1770 //TX_FASTNS_NOISETH 893 0xC000 //TX_FASTNS_SSA_THLFL 894 0xC000 //TX_FASTNS_SSA_THHFL 895 0xCCCC //TX_FASTNS_SSA_THLFH 896 0xD999 //TX_FASTNS_SSA_THHFH +897 0x2339 //TX_SENDFUNC_REG_MICMUTE +898 0x0021 //TX_SENDFUNC_REG_MICMUTE1 +899 0x02BC //TX_MICMUTE_RATIO_THR +900 0x0140 //TX_MICMUTE_AMP_THR +901 0x0004 //TX_MICMUTE_HPF_IND +902 0x00C0 //TX_MICMUTE_LOG_EYR_TH +903 0x0008 //TX_MICMUTE_CVG_TIME +904 0x0008 //TX_MICMUTE_RELEASE_TIME +905 0x01FE //TX_MIC_VOLUME_MIC0MUTE +906 0x0020 //TX_MICMUTE_EPD_OFFSET_0 +907 0x001E //TX_MICMUTE_FRQ_AEC_L +908 0x7999 //TX_MICMUTE_EAD_THR +909 0x7FFF //TX_MICMUTE_LAMBDA_CB_NLE +910 0x7FFF //TX_MICMUTE_LAMBDA_RE_EST +911 0x4000 //TX_DTD_THR1_MICMUTE_0 +912 0x7000 //TX_DTD_THR1_MICMUTE_1 +913 0x7FFF //TX_DTD_THR1_MICMUTE_2 +914 0x7FFF //TX_DTD_THR1_MICMUTE_3 +915 0x6CCC //TX_DTD_THR2_MICMUTE_0 +916 0x0400 //TX_MICMUTE_MIN_EQ_RE_EST_0 +917 0x0400 //TX_MICMUTE_MIN_EQ_RE_EST_1 +918 0x1000 //TX_MICMUTE_MIN_EQ_RE_EST_2 +919 0x7FFF //TX_MICMUTE_MIN_EQ_RE_EST_3 +920 0x7FFF //TX_MICMUTE_MIN_EQ_RE_EST_4 +921 0x4000 //TX_MICMUTE_C_POST_FLT +922 0x03E8 //TX_MICMUTE_DT_CUT_K +923 0x0001 //TX_MICMUTE_DT_CUT_THR +924 0x03E8 //TX_MICMUTE_DT_CUT_K2 +925 0x0001 //TX_MICMUTE_DT_CUT_THR2 +926 0x0064 //TX_MICMUTE_DT2_HOLD_N +927 0x1000 //TX_MICMUTE_RATIODTH_THCUT +928 0x1000 //TX_MICMUTE_B_POST_FLT_ECHOL +929 0x7FFF //TX_MICMUTE_B_POST_FLT_ECHOH +930 0x0400 //TX_MICMUTE_C_POST_FLT_MASK +931 0x7999 //TX_MICMUTE_RATIODTL_CUT_TH +932 0x0258 //TX_MICMUTE_DT_CUT_K1 +933 0x0800 //TX_MICMUTE_N2_SN_EST +934 0xFC00 //TX_MICMUTE_THR_SN_EST_0 +935 0x001C //TX_MICMUTE_MIN_G_CTRL_0 +936 0x6000 //TX_MICMUTE_A_POST_FILT_S_0 +937 0x7000 //TX_MICMUTE_B_POST_FILT_0 +938 0x2710 //TX_MIC1RUB_AMP_THR +939 0x0010 //TX_MIC1MUTE_RATIO_THR +940 0x0450 //TX_MIC1MUTE_AMP_THR +941 0x0008 //TX_MIC1MUTE_CVG_TIME +942 0x0008 //TX_MIC1MUTE_RELEASE_TIME +943 0x0000 //TX_AMS_RESRV_01 +944 0x0000 //TX_AMS_RESRV_02 +945 0x0000 //TX_AMS_RESRV_03 +946 0x0000 //TX_AMS_RESRV_04 +947 0x0000 //TX_AMS_RESRV_05 +948 0x0000 //TX_AMS_RESRV_06 +949 0x0000 //TX_AMS_RESRV_07 +950 0x0000 //TX_AMS_RESRV_08 +951 0x0000 //TX_AMS_RESRV_09 +952 0x0000 //TX_AMS_RESRV_10 +953 0x0000 //TX_AMS_RESRV_11 +954 0x0000 //TX_AMS_RESRV_12 +955 0x0000 //TX_AMS_RESRV_13 +956 0x0000 //TX_AMS_RESRV_14 +957 0x0000 //TX_AMS_RESRV_15 +958 0x0000 //TX_AMS_RESRV_16 +959 0x0000 //TX_AMS_RESRV_17 +960 0x0000 //TX_AMS_RESRV_18 +961 0x0000 //TX_AMS_RESRV_19 #RX -0 0x0040 //RX_RECVFUNC_MODE_0 +0 0x2040 //RX_RECVFUNC_MODE_0 1 0x0000 //RX_RECVFUNC_MODE_1 2 0x0000 //RX_SAMPLINGFREQ_SIG 3 0x0000 //RX_SAMPLINGFREQ_PROC @@ -56130,4 +84591,855 @@ 110 0x0000 //RX_FDDRC_RESRV_0 129 0x0100 //RX_SPK_VOL 130 0x0000 //RX_VOL_RESRV_0 +#RX 2 +157 0x2040 //RX_RECVFUNC_MODE_0 +158 0x0000 //RX_RECVFUNC_MODE_1 +159 0x0000 //RX_SAMPLINGFREQ_SIG +160 0x0000 //RX_SAMPLINGFREQ_PROC +161 0x000A //RX_FRAME_SZ +162 0x0000 //RX_DELAY_OPT +163 0x3000 //RX_TDDRC_ALPHA_UP_1 +164 0x3000 //RX_TDDRC_ALPHA_UP_2 +165 0x3000 //RX_TDDRC_ALPHA_UP_3 +166 0x3000 //RX_TDDRC_ALPHA_UP_4 +167 0x050D //RX_PGA +168 0x7652 //RX_A_HP +169 0x4000 //RX_B_PE +170 0x7800 //RX_THR_PITCH_DET_0 +171 0x7000 //RX_THR_PITCH_DET_1 +172 0x6000 //RX_THR_PITCH_DET_2 +173 0x0000 //RX_PITCH_BFR_LEN +174 0x0000 //RX_SBD_PITCH_DET +175 0x0000 //RX_PP_RESRV_0 +176 0x0000 //RX_PP_RESRV_1 +177 0xF800 //RX_N_SN_EST +178 0x0000 //RX_N2_SN_EST +179 0x000F //RX_NS_LVL_CTRL +180 0xF800 //RX_THR_SN_EST +181 0x7E00 //RX_LAMBDA_PFILT +182 0x000A //RX_FENS_RESRV_0 +183 0x0000 //RX_FENS_RESRV_1 +184 0x7FB0 //RX_TDDRC_ALPHA_DWN_1 +185 0x7FB0 //RX_TDDRC_ALPHA_DWN_2 +186 0x7FB0 //RX_TDDRC_ALPHA_DWN_3 +187 0x0000 //RX_EXTRA_NS_L +188 0x0000 //RX_EXTRA_NS_A +189 0x7FB0 //RX_TDDRC_ALPHA_DWN_4 +190 0xDA9E //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +192 0x0000 //RX_A_POST_FLT +193 0x0000 //RX_LMT_THRD +194 0x4000 //RX_LMT_ALPHA +195 0x0020 //RX_FDEQ_SUBNUM +196 0x4848 //RX_FDEQ_GAIN_0 +197 0x4848 //RX_FDEQ_GAIN_1 +198 0x4848 //RX_FDEQ_GAIN_2 +199 0x4848 //RX_FDEQ_GAIN_3 +200 0x4848 //RX_FDEQ_GAIN_4 +201 0x4848 //RX_FDEQ_GAIN_5 +202 0x4848 //RX_FDEQ_GAIN_6 +203 0x4848 //RX_FDEQ_GAIN_7 +204 0x4848 //RX_FDEQ_GAIN_8 +205 0x4848 //RX_FDEQ_GAIN_9 +206 0x4848 //RX_FDEQ_GAIN_10 +207 0x4848 //RX_FDEQ_GAIN_11 +208 0x4848 //RX_FDEQ_GAIN_12 +209 0x4848 //RX_FDEQ_GAIN_13 +210 0x4848 //RX_FDEQ_GAIN_14 +211 0x4848 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0000 //RX_FDEQ_BIN_0 +221 0x0000 //RX_FDEQ_BIN_1 +222 0x0000 //RX_FDEQ_BIN_2 +223 0x0000 //RX_FDEQ_BIN_3 +224 0x0000 //RX_FDEQ_BIN_4 +225 0x0000 //RX_FDEQ_BIN_5 +226 0x0000 //RX_FDEQ_BIN_6 +227 0x0000 //RX_FDEQ_BIN_7 +228 0x0000 //RX_FDEQ_BIN_8 +229 0x0000 //RX_FDEQ_BIN_9 +230 0x0000 //RX_FDEQ_BIN_10 +231 0x0000 //RX_FDEQ_BIN_11 +232 0x0000 //RX_FDEQ_BIN_12 +233 0x0000 //RX_FDEQ_BIN_13 +234 0x0000 //RX_FDEQ_BIN_14 +235 0x0000 //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x0000 //RX_FDEQ_RESRV_0 +245 0x0000 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0030 //RX_FDDRC_BAND_MARGIN_1 +248 0x0050 //RX_FDDRC_BAND_MARGIN_2 +249 0x0080 //RX_FDDRC_BAND_MARGIN_3 +250 0x0004 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x5000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x6400 //RX_FDDRC_THRD_3_2 +258 0x6400 //RX_FDDRC_THRD_3_3 +259 0x2000 //RX_FDDRC_SLANT_0_0 +260 0x2000 //RX_FDDRC_SLANT_0_1 +261 0x2000 //RX_FDDRC_SLANT_0_2 +262 0x2000 //RX_FDDRC_SLANT_0_3 +263 0x2000 //RX_FDDRC_SLANT_1_0 +264 0x2000 //RX_FDDRC_SLANT_1_1 +265 0x2000 //RX_FDDRC_SLANT_1_2 +266 0x2000 //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +268 0x0003 //RX_FILTINDX +269 0x0000 //RX_TDDRC_THRD_0 +270 0x0000 //RX_TDDRC_THRD_1 +271 0x0E80 //RX_TDDRC_THRD_2 +272 0x3800 //RX_TDDRC_THRD_3 +273 0x2A00 //RX_TDDRC_SLANT_0 +274 0x6E00 //RX_TDDRC_SLANT_1 +275 0x3000 //RX_TDDRC_ALPHA_UP_0 +276 0x7FB0 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x0000 //RX_TDDRC_HMNC_GAIN +279 0x0000 //RX_TDDRC_SMT_FLAG +280 0x0000 //RX_TDDRC_SMT_W +281 0x0100 //RX_TDDRC_DRC_GAIN +282 0x7C00 //RX_LAMBDA_PKA_FP +283 0x2000 //RX_TPKA_FP +284 0x0080 //RX_MIN_G_FP +285 0x2000 //RX_MAX_G_FP +286 0x0100 //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 +288 0x0010 //RX_MAXLEVEL_CNG +289 0x0000 //RX_BWE_UV_TH +290 0x0000 //RX_BWE_UV_TH2 +291 0x0000 //RX_BWE_UV_TH3 +292 0x0000 //RX_BWE_V_TH +293 0x0000 //RX_BWE_GAIN1_V_TH1 +294 0x0000 //RX_BWE_GAIN1_V_TH2 +295 0x0000 //RX_BWE_UV_EQ +296 0x0000 //RX_BWE_V_EQ +297 0x0000 //RX_BWE_TONE_TH +298 0x0000 //RX_BWE_UV_HOLD_T +299 0x0000 //RX_BWE_GAIN2_ALPHA +300 0x0000 //RX_BWE_GAIN3_ALPHA +301 0x0000 //RX_BWE_CUTOFF +302 0x0000 //RX_BWE_GAINFILL +303 0x0000 //RX_BWE_MAXTH_TONE +304 0x0000 //RX_BWE_EQ_0 +305 0x0000 //RX_BWE_EQ_1 +306 0x0000 //RX_BWE_EQ_2 +307 0x0000 //RX_BWE_EQ_3 +308 0x0000 //RX_BWE_EQ_4 +309 0x0000 //RX_BWE_EQ_5 +310 0x0000 //RX_BWE_EQ_6 +311 0x0000 //RX_BWE_RESRV_0 +312 0x0000 //RX_BWE_RESRV_1 +313 0x0000 //RX_BWE_RESRV_2 +#VOL 0 +163 0x3000 //RX_TDDRC_ALPHA_UP_1 +164 0x3000 //RX_TDDRC_ALPHA_UP_2 +165 0x3000 //RX_TDDRC_ALPHA_UP_3 +166 0x3000 //RX_TDDRC_ALPHA_UP_4 +184 0x7FB0 //RX_TDDRC_ALPHA_DWN_1 +185 0x7FB0 //RX_TDDRC_ALPHA_DWN_2 +186 0x7FB0 //RX_TDDRC_ALPHA_DWN_3 +189 0x7FB0 //RX_TDDRC_ALPHA_DWN_4 +190 0xDA9E //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +269 0x0000 //RX_TDDRC_THRD_0 +270 0x0000 //RX_TDDRC_THRD_1 +271 0x0E80 //RX_TDDRC_THRD_2 +272 0x3800 //RX_TDDRC_THRD_3 +273 0x2A00 //RX_TDDRC_SLANT_0 +274 0x6E00 //RX_TDDRC_SLANT_1 +275 0x3000 //RX_TDDRC_ALPHA_UP_0 +276 0x7FB0 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x0000 //RX_TDDRC_HMNC_GAIN +279 0x0000 //RX_TDDRC_SMT_FLAG +280 0x0000 //RX_TDDRC_SMT_W +281 0x0100 //RX_TDDRC_DRC_GAIN +195 0x0020 //RX_FDEQ_SUBNUM +196 0x4848 //RX_FDEQ_GAIN_0 +197 0x4848 //RX_FDEQ_GAIN_1 +198 0x4848 //RX_FDEQ_GAIN_2 +199 0x4848 //RX_FDEQ_GAIN_3 +200 0x4848 //RX_FDEQ_GAIN_4 +201 0x4848 //RX_FDEQ_GAIN_5 +202 0x4848 //RX_FDEQ_GAIN_6 +203 0x4848 //RX_FDEQ_GAIN_7 +204 0x4848 //RX_FDEQ_GAIN_8 +205 0x4848 //RX_FDEQ_GAIN_9 +206 0x4848 //RX_FDEQ_GAIN_10 +207 0x4848 //RX_FDEQ_GAIN_11 +208 0x4848 //RX_FDEQ_GAIN_12 +209 0x4848 //RX_FDEQ_GAIN_13 +210 0x4848 //RX_FDEQ_GAIN_14 +211 0x4848 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0000 //RX_FDEQ_BIN_0 +221 0x0000 //RX_FDEQ_BIN_1 +222 0x0000 //RX_FDEQ_BIN_2 +223 0x0000 //RX_FDEQ_BIN_3 +224 0x0000 //RX_FDEQ_BIN_4 +225 0x0000 //RX_FDEQ_BIN_5 +226 0x0000 //RX_FDEQ_BIN_6 +227 0x0000 //RX_FDEQ_BIN_7 +228 0x0000 //RX_FDEQ_BIN_8 +229 0x0000 //RX_FDEQ_BIN_9 +230 0x0000 //RX_FDEQ_BIN_10 +231 0x0000 //RX_FDEQ_BIN_11 +232 0x0000 //RX_FDEQ_BIN_12 +233 0x0000 //RX_FDEQ_BIN_13 +234 0x0000 //RX_FDEQ_BIN_14 +235 0x0000 //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x0000 //RX_FDEQ_RESRV_0 +245 0x0000 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0030 //RX_FDDRC_BAND_MARGIN_1 +248 0x0050 //RX_FDDRC_BAND_MARGIN_2 +249 0x0080 //RX_FDDRC_BAND_MARGIN_3 +250 0x0004 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x5000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x6400 //RX_FDDRC_THRD_3_2 +258 0x6400 //RX_FDDRC_THRD_3_3 +259 0x2000 //RX_FDDRC_SLANT_0_0 +260 0x2000 //RX_FDDRC_SLANT_0_1 +261 0x2000 //RX_FDDRC_SLANT_0_2 +262 0x2000 //RX_FDDRC_SLANT_0_3 +263 0x2000 //RX_FDDRC_SLANT_1_0 +264 0x2000 //RX_FDDRC_SLANT_1_1 +265 0x2000 //RX_FDDRC_SLANT_1_2 +266 0x2000 //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +286 0x0100 //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 +#VOL 1 +163 0x3000 //RX_TDDRC_ALPHA_UP_1 +164 0x3000 //RX_TDDRC_ALPHA_UP_2 +165 0x3000 //RX_TDDRC_ALPHA_UP_3 +166 0x3000 //RX_TDDRC_ALPHA_UP_4 +184 0x7FB0 //RX_TDDRC_ALPHA_DWN_1 +185 0x7FB0 //RX_TDDRC_ALPHA_DWN_2 +186 0x7FB0 //RX_TDDRC_ALPHA_DWN_3 +189 0x7FB0 //RX_TDDRC_ALPHA_DWN_4 +190 0xDA9E //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +269 0x0000 //RX_TDDRC_THRD_0 +270 0x0000 //RX_TDDRC_THRD_1 +271 0x0E80 //RX_TDDRC_THRD_2 +272 0x3800 //RX_TDDRC_THRD_3 +273 0x2A00 //RX_TDDRC_SLANT_0 +274 0x6E00 //RX_TDDRC_SLANT_1 +275 0x3000 //RX_TDDRC_ALPHA_UP_0 +276 0x7FB0 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x0000 //RX_TDDRC_HMNC_GAIN +279 0x0000 //RX_TDDRC_SMT_FLAG +280 0x0000 //RX_TDDRC_SMT_W +281 0x0100 //RX_TDDRC_DRC_GAIN +195 0x0020 //RX_FDEQ_SUBNUM +196 0x4848 //RX_FDEQ_GAIN_0 +197 0x4848 //RX_FDEQ_GAIN_1 +198 0x4848 //RX_FDEQ_GAIN_2 +199 0x4848 //RX_FDEQ_GAIN_3 +200 0x4848 //RX_FDEQ_GAIN_4 +201 0x4848 //RX_FDEQ_GAIN_5 +202 0x4848 //RX_FDEQ_GAIN_6 +203 0x4848 //RX_FDEQ_GAIN_7 +204 0x4848 //RX_FDEQ_GAIN_8 +205 0x4848 //RX_FDEQ_GAIN_9 +206 0x4848 //RX_FDEQ_GAIN_10 +207 0x4848 //RX_FDEQ_GAIN_11 +208 0x4848 //RX_FDEQ_GAIN_12 +209 0x4848 //RX_FDEQ_GAIN_13 +210 0x4848 //RX_FDEQ_GAIN_14 +211 0x4848 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0000 //RX_FDEQ_BIN_0 +221 0x0000 //RX_FDEQ_BIN_1 +222 0x0000 //RX_FDEQ_BIN_2 +223 0x0000 //RX_FDEQ_BIN_3 +224 0x0000 //RX_FDEQ_BIN_4 +225 0x0000 //RX_FDEQ_BIN_5 +226 0x0000 //RX_FDEQ_BIN_6 +227 0x0000 //RX_FDEQ_BIN_7 +228 0x0000 //RX_FDEQ_BIN_8 +229 0x0000 //RX_FDEQ_BIN_9 +230 0x0000 //RX_FDEQ_BIN_10 +231 0x0000 //RX_FDEQ_BIN_11 +232 0x0000 //RX_FDEQ_BIN_12 +233 0x0000 //RX_FDEQ_BIN_13 +234 0x0000 //RX_FDEQ_BIN_14 +235 0x0000 //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x0000 //RX_FDEQ_RESRV_0 +245 0x0000 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0030 //RX_FDDRC_BAND_MARGIN_1 +248 0x0050 //RX_FDDRC_BAND_MARGIN_2 +249 0x0080 //RX_FDDRC_BAND_MARGIN_3 +250 0x0004 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x5000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x6400 //RX_FDDRC_THRD_3_2 +258 0x6400 //RX_FDDRC_THRD_3_3 +259 0x2000 //RX_FDDRC_SLANT_0_0 +260 0x2000 //RX_FDDRC_SLANT_0_1 +261 0x2000 //RX_FDDRC_SLANT_0_2 +262 0x2000 //RX_FDDRC_SLANT_0_3 +263 0x2000 //RX_FDDRC_SLANT_1_0 +264 0x2000 //RX_FDDRC_SLANT_1_1 +265 0x2000 //RX_FDDRC_SLANT_1_2 +266 0x2000 //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +286 0x0100 //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 +#VOL 2 +163 0x3000 //RX_TDDRC_ALPHA_UP_1 +164 0x3000 //RX_TDDRC_ALPHA_UP_2 +165 0x3000 //RX_TDDRC_ALPHA_UP_3 +166 0x3000 //RX_TDDRC_ALPHA_UP_4 +184 0x7FB0 //RX_TDDRC_ALPHA_DWN_1 +185 0x7FB0 //RX_TDDRC_ALPHA_DWN_2 +186 0x7FB0 //RX_TDDRC_ALPHA_DWN_3 +189 0x7FB0 //RX_TDDRC_ALPHA_DWN_4 +190 0xDA9E //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +269 0x0000 //RX_TDDRC_THRD_0 +270 0x0000 //RX_TDDRC_THRD_1 +271 0x0E80 //RX_TDDRC_THRD_2 +272 0x3800 //RX_TDDRC_THRD_3 +273 0x2A00 //RX_TDDRC_SLANT_0 +274 0x6E00 //RX_TDDRC_SLANT_1 +275 0x3000 //RX_TDDRC_ALPHA_UP_0 +276 0x7FB0 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x0000 //RX_TDDRC_HMNC_GAIN +279 0x0000 //RX_TDDRC_SMT_FLAG +280 0x0000 //RX_TDDRC_SMT_W +281 0x0100 //RX_TDDRC_DRC_GAIN +195 0x0020 //RX_FDEQ_SUBNUM +196 0x4848 //RX_FDEQ_GAIN_0 +197 0x4848 //RX_FDEQ_GAIN_1 +198 0x4848 //RX_FDEQ_GAIN_2 +199 0x4848 //RX_FDEQ_GAIN_3 +200 0x4848 //RX_FDEQ_GAIN_4 +201 0x4848 //RX_FDEQ_GAIN_5 +202 0x4848 //RX_FDEQ_GAIN_6 +203 0x4848 //RX_FDEQ_GAIN_7 +204 0x4848 //RX_FDEQ_GAIN_8 +205 0x4848 //RX_FDEQ_GAIN_9 +206 0x4848 //RX_FDEQ_GAIN_10 +207 0x4848 //RX_FDEQ_GAIN_11 +208 0x4848 //RX_FDEQ_GAIN_12 +209 0x4848 //RX_FDEQ_GAIN_13 +210 0x4848 //RX_FDEQ_GAIN_14 +211 0x4848 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0000 //RX_FDEQ_BIN_0 +221 0x0000 //RX_FDEQ_BIN_1 +222 0x0000 //RX_FDEQ_BIN_2 +223 0x0000 //RX_FDEQ_BIN_3 +224 0x0000 //RX_FDEQ_BIN_4 +225 0x0000 //RX_FDEQ_BIN_5 +226 0x0000 //RX_FDEQ_BIN_6 +227 0x0000 //RX_FDEQ_BIN_7 +228 0x0000 //RX_FDEQ_BIN_8 +229 0x0000 //RX_FDEQ_BIN_9 +230 0x0000 //RX_FDEQ_BIN_10 +231 0x0000 //RX_FDEQ_BIN_11 +232 0x0000 //RX_FDEQ_BIN_12 +233 0x0000 //RX_FDEQ_BIN_13 +234 0x0000 //RX_FDEQ_BIN_14 +235 0x0000 //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x0000 //RX_FDEQ_RESRV_0 +245 0x0000 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0030 //RX_FDDRC_BAND_MARGIN_1 +248 0x0050 //RX_FDDRC_BAND_MARGIN_2 +249 0x0080 //RX_FDDRC_BAND_MARGIN_3 +250 0x0004 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x5000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x6400 //RX_FDDRC_THRD_3_2 +258 0x6400 //RX_FDDRC_THRD_3_3 +259 0x2000 //RX_FDDRC_SLANT_0_0 +260 0x2000 //RX_FDDRC_SLANT_0_1 +261 0x2000 //RX_FDDRC_SLANT_0_2 +262 0x2000 //RX_FDDRC_SLANT_0_3 +263 0x2000 //RX_FDDRC_SLANT_1_0 +264 0x2000 //RX_FDDRC_SLANT_1_1 +265 0x2000 //RX_FDDRC_SLANT_1_2 +266 0x2000 //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +286 0x0100 //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 +#VOL 3 +163 0x3000 //RX_TDDRC_ALPHA_UP_1 +164 0x3000 //RX_TDDRC_ALPHA_UP_2 +165 0x3000 //RX_TDDRC_ALPHA_UP_3 +166 0x3000 //RX_TDDRC_ALPHA_UP_4 +184 0x7FB0 //RX_TDDRC_ALPHA_DWN_1 +185 0x7FB0 //RX_TDDRC_ALPHA_DWN_2 +186 0x7FB0 //RX_TDDRC_ALPHA_DWN_3 +189 0x7FB0 //RX_TDDRC_ALPHA_DWN_4 +190 0xDA9E //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +269 0x0000 //RX_TDDRC_THRD_0 +270 0x0000 //RX_TDDRC_THRD_1 +271 0x0E80 //RX_TDDRC_THRD_2 +272 0x3800 //RX_TDDRC_THRD_3 +273 0x2A00 //RX_TDDRC_SLANT_0 +274 0x6E00 //RX_TDDRC_SLANT_1 +275 0x3000 //RX_TDDRC_ALPHA_UP_0 +276 0x7FB0 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x0000 //RX_TDDRC_HMNC_GAIN +279 0x0000 //RX_TDDRC_SMT_FLAG +280 0x0000 //RX_TDDRC_SMT_W +281 0x0100 //RX_TDDRC_DRC_GAIN +195 0x0020 //RX_FDEQ_SUBNUM +196 0x4848 //RX_FDEQ_GAIN_0 +197 0x4848 //RX_FDEQ_GAIN_1 +198 0x4848 //RX_FDEQ_GAIN_2 +199 0x4848 //RX_FDEQ_GAIN_3 +200 0x4848 //RX_FDEQ_GAIN_4 +201 0x4848 //RX_FDEQ_GAIN_5 +202 0x4848 //RX_FDEQ_GAIN_6 +203 0x4848 //RX_FDEQ_GAIN_7 +204 0x4848 //RX_FDEQ_GAIN_8 +205 0x4848 //RX_FDEQ_GAIN_9 +206 0x4848 //RX_FDEQ_GAIN_10 +207 0x4848 //RX_FDEQ_GAIN_11 +208 0x4848 //RX_FDEQ_GAIN_12 +209 0x4848 //RX_FDEQ_GAIN_13 +210 0x4848 //RX_FDEQ_GAIN_14 +211 0x4848 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0000 //RX_FDEQ_BIN_0 +221 0x0000 //RX_FDEQ_BIN_1 +222 0x0000 //RX_FDEQ_BIN_2 +223 0x0000 //RX_FDEQ_BIN_3 +224 0x0000 //RX_FDEQ_BIN_4 +225 0x0000 //RX_FDEQ_BIN_5 +226 0x0000 //RX_FDEQ_BIN_6 +227 0x0000 //RX_FDEQ_BIN_7 +228 0x0000 //RX_FDEQ_BIN_8 +229 0x0000 //RX_FDEQ_BIN_9 +230 0x0000 //RX_FDEQ_BIN_10 +231 0x0000 //RX_FDEQ_BIN_11 +232 0x0000 //RX_FDEQ_BIN_12 +233 0x0000 //RX_FDEQ_BIN_13 +234 0x0000 //RX_FDEQ_BIN_14 +235 0x0000 //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x0000 //RX_FDEQ_RESRV_0 +245 0x0000 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0030 //RX_FDDRC_BAND_MARGIN_1 +248 0x0050 //RX_FDDRC_BAND_MARGIN_2 +249 0x0080 //RX_FDDRC_BAND_MARGIN_3 +250 0x0004 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x5000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x6400 //RX_FDDRC_THRD_3_2 +258 0x6400 //RX_FDDRC_THRD_3_3 +259 0x2000 //RX_FDDRC_SLANT_0_0 +260 0x2000 //RX_FDDRC_SLANT_0_1 +261 0x2000 //RX_FDDRC_SLANT_0_2 +262 0x2000 //RX_FDDRC_SLANT_0_3 +263 0x2000 //RX_FDDRC_SLANT_1_0 +264 0x2000 //RX_FDDRC_SLANT_1_1 +265 0x2000 //RX_FDDRC_SLANT_1_2 +266 0x2000 //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +286 0x0100 //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 +#VOL 4 +163 0x3000 //RX_TDDRC_ALPHA_UP_1 +164 0x3000 //RX_TDDRC_ALPHA_UP_2 +165 0x3000 //RX_TDDRC_ALPHA_UP_3 +166 0x3000 //RX_TDDRC_ALPHA_UP_4 +184 0x7FB0 //RX_TDDRC_ALPHA_DWN_1 +185 0x7FB0 //RX_TDDRC_ALPHA_DWN_2 +186 0x7FB0 //RX_TDDRC_ALPHA_DWN_3 +189 0x7FB0 //RX_TDDRC_ALPHA_DWN_4 +190 0xDA9E //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +269 0x0000 //RX_TDDRC_THRD_0 +270 0x0000 //RX_TDDRC_THRD_1 +271 0x0E80 //RX_TDDRC_THRD_2 +272 0x3800 //RX_TDDRC_THRD_3 +273 0x2A00 //RX_TDDRC_SLANT_0 +274 0x6E00 //RX_TDDRC_SLANT_1 +275 0x3000 //RX_TDDRC_ALPHA_UP_0 +276 0x7FB0 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x0000 //RX_TDDRC_HMNC_GAIN +279 0x0000 //RX_TDDRC_SMT_FLAG +280 0x0000 //RX_TDDRC_SMT_W +281 0x0100 //RX_TDDRC_DRC_GAIN +195 0x0020 //RX_FDEQ_SUBNUM +196 0x4848 //RX_FDEQ_GAIN_0 +197 0x4848 //RX_FDEQ_GAIN_1 +198 0x4848 //RX_FDEQ_GAIN_2 +199 0x4848 //RX_FDEQ_GAIN_3 +200 0x4848 //RX_FDEQ_GAIN_4 +201 0x4848 //RX_FDEQ_GAIN_5 +202 0x4848 //RX_FDEQ_GAIN_6 +203 0x4848 //RX_FDEQ_GAIN_7 +204 0x4848 //RX_FDEQ_GAIN_8 +205 0x4848 //RX_FDEQ_GAIN_9 +206 0x4848 //RX_FDEQ_GAIN_10 +207 0x4848 //RX_FDEQ_GAIN_11 +208 0x4848 //RX_FDEQ_GAIN_12 +209 0x4848 //RX_FDEQ_GAIN_13 +210 0x4848 //RX_FDEQ_GAIN_14 +211 0x4848 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0000 //RX_FDEQ_BIN_0 +221 0x0000 //RX_FDEQ_BIN_1 +222 0x0000 //RX_FDEQ_BIN_2 +223 0x0000 //RX_FDEQ_BIN_3 +224 0x0000 //RX_FDEQ_BIN_4 +225 0x0000 //RX_FDEQ_BIN_5 +226 0x0000 //RX_FDEQ_BIN_6 +227 0x0000 //RX_FDEQ_BIN_7 +228 0x0000 //RX_FDEQ_BIN_8 +229 0x0000 //RX_FDEQ_BIN_9 +230 0x0000 //RX_FDEQ_BIN_10 +231 0x0000 //RX_FDEQ_BIN_11 +232 0x0000 //RX_FDEQ_BIN_12 +233 0x0000 //RX_FDEQ_BIN_13 +234 0x0000 //RX_FDEQ_BIN_14 +235 0x0000 //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x0000 //RX_FDEQ_RESRV_0 +245 0x0000 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0030 //RX_FDDRC_BAND_MARGIN_1 +248 0x0050 //RX_FDDRC_BAND_MARGIN_2 +249 0x0080 //RX_FDDRC_BAND_MARGIN_3 +250 0x0004 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x5000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x6400 //RX_FDDRC_THRD_3_2 +258 0x6400 //RX_FDDRC_THRD_3_3 +259 0x2000 //RX_FDDRC_SLANT_0_0 +260 0x2000 //RX_FDDRC_SLANT_0_1 +261 0x2000 //RX_FDDRC_SLANT_0_2 +262 0x2000 //RX_FDDRC_SLANT_0_3 +263 0x2000 //RX_FDDRC_SLANT_1_0 +264 0x2000 //RX_FDDRC_SLANT_1_1 +265 0x2000 //RX_FDDRC_SLANT_1_2 +266 0x2000 //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +286 0x0100 //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 +#VOL 5 +163 0x3000 //RX_TDDRC_ALPHA_UP_1 +164 0x3000 //RX_TDDRC_ALPHA_UP_2 +165 0x3000 //RX_TDDRC_ALPHA_UP_3 +166 0x3000 //RX_TDDRC_ALPHA_UP_4 +184 0x7FB0 //RX_TDDRC_ALPHA_DWN_1 +185 0x7FB0 //RX_TDDRC_ALPHA_DWN_2 +186 0x7FB0 //RX_TDDRC_ALPHA_DWN_3 +189 0x7FB0 //RX_TDDRC_ALPHA_DWN_4 +190 0xDA9E //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +269 0x0000 //RX_TDDRC_THRD_0 +270 0x0000 //RX_TDDRC_THRD_1 +271 0x0E80 //RX_TDDRC_THRD_2 +272 0x3800 //RX_TDDRC_THRD_3 +273 0x2A00 //RX_TDDRC_SLANT_0 +274 0x6E00 //RX_TDDRC_SLANT_1 +275 0x3000 //RX_TDDRC_ALPHA_UP_0 +276 0x7FB0 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x0000 //RX_TDDRC_HMNC_GAIN +279 0x0000 //RX_TDDRC_SMT_FLAG +280 0x0000 //RX_TDDRC_SMT_W +281 0x0100 //RX_TDDRC_DRC_GAIN +195 0x0020 //RX_FDEQ_SUBNUM +196 0x4848 //RX_FDEQ_GAIN_0 +197 0x4848 //RX_FDEQ_GAIN_1 +198 0x4848 //RX_FDEQ_GAIN_2 +199 0x4848 //RX_FDEQ_GAIN_3 +200 0x4848 //RX_FDEQ_GAIN_4 +201 0x4848 //RX_FDEQ_GAIN_5 +202 0x4848 //RX_FDEQ_GAIN_6 +203 0x4848 //RX_FDEQ_GAIN_7 +204 0x4848 //RX_FDEQ_GAIN_8 +205 0x4848 //RX_FDEQ_GAIN_9 +206 0x4848 //RX_FDEQ_GAIN_10 +207 0x4848 //RX_FDEQ_GAIN_11 +208 0x4848 //RX_FDEQ_GAIN_12 +209 0x4848 //RX_FDEQ_GAIN_13 +210 0x4848 //RX_FDEQ_GAIN_14 +211 0x4848 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0000 //RX_FDEQ_BIN_0 +221 0x0000 //RX_FDEQ_BIN_1 +222 0x0000 //RX_FDEQ_BIN_2 +223 0x0000 //RX_FDEQ_BIN_3 +224 0x0000 //RX_FDEQ_BIN_4 +225 0x0000 //RX_FDEQ_BIN_5 +226 0x0000 //RX_FDEQ_BIN_6 +227 0x0000 //RX_FDEQ_BIN_7 +228 0x0000 //RX_FDEQ_BIN_8 +229 0x0000 //RX_FDEQ_BIN_9 +230 0x0000 //RX_FDEQ_BIN_10 +231 0x0000 //RX_FDEQ_BIN_11 +232 0x0000 //RX_FDEQ_BIN_12 +233 0x0000 //RX_FDEQ_BIN_13 +234 0x0000 //RX_FDEQ_BIN_14 +235 0x0000 //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x0000 //RX_FDEQ_RESRV_0 +245 0x0000 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0030 //RX_FDDRC_BAND_MARGIN_1 +248 0x0050 //RX_FDDRC_BAND_MARGIN_2 +249 0x0080 //RX_FDDRC_BAND_MARGIN_3 +250 0x0004 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x5000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x6400 //RX_FDDRC_THRD_3_2 +258 0x6400 //RX_FDDRC_THRD_3_3 +259 0x2000 //RX_FDDRC_SLANT_0_0 +260 0x2000 //RX_FDDRC_SLANT_0_1 +261 0x2000 //RX_FDDRC_SLANT_0_2 +262 0x2000 //RX_FDDRC_SLANT_0_3 +263 0x2000 //RX_FDDRC_SLANT_1_0 +264 0x2000 //RX_FDDRC_SLANT_1_1 +265 0x2000 //RX_FDDRC_SLANT_1_2 +266 0x2000 //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +286 0x0100 //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 +#VOL 6 +163 0x3000 //RX_TDDRC_ALPHA_UP_1 +164 0x3000 //RX_TDDRC_ALPHA_UP_2 +165 0x3000 //RX_TDDRC_ALPHA_UP_3 +166 0x3000 //RX_TDDRC_ALPHA_UP_4 +184 0x7FB0 //RX_TDDRC_ALPHA_DWN_1 +185 0x7FB0 //RX_TDDRC_ALPHA_DWN_2 +186 0x7FB0 //RX_TDDRC_ALPHA_DWN_3 +189 0x7FB0 //RX_TDDRC_ALPHA_DWN_4 +190 0xDA9E //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +269 0x0000 //RX_TDDRC_THRD_0 +270 0x0000 //RX_TDDRC_THRD_1 +271 0x0E80 //RX_TDDRC_THRD_2 +272 0x3800 //RX_TDDRC_THRD_3 +273 0x2A00 //RX_TDDRC_SLANT_0 +274 0x6E00 //RX_TDDRC_SLANT_1 +275 0x3000 //RX_TDDRC_ALPHA_UP_0 +276 0x7FB0 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x0000 //RX_TDDRC_HMNC_GAIN +279 0x0000 //RX_TDDRC_SMT_FLAG +280 0x0000 //RX_TDDRC_SMT_W +281 0x0100 //RX_TDDRC_DRC_GAIN +195 0x0020 //RX_FDEQ_SUBNUM +196 0x4848 //RX_FDEQ_GAIN_0 +197 0x4848 //RX_FDEQ_GAIN_1 +198 0x4848 //RX_FDEQ_GAIN_2 +199 0x4848 //RX_FDEQ_GAIN_3 +200 0x4848 //RX_FDEQ_GAIN_4 +201 0x4848 //RX_FDEQ_GAIN_5 +202 0x4848 //RX_FDEQ_GAIN_6 +203 0x4848 //RX_FDEQ_GAIN_7 +204 0x4848 //RX_FDEQ_GAIN_8 +205 0x4848 //RX_FDEQ_GAIN_9 +206 0x4848 //RX_FDEQ_GAIN_10 +207 0x4848 //RX_FDEQ_GAIN_11 +208 0x4848 //RX_FDEQ_GAIN_12 +209 0x4848 //RX_FDEQ_GAIN_13 +210 0x4848 //RX_FDEQ_GAIN_14 +211 0x4848 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0000 //RX_FDEQ_BIN_0 +221 0x0000 //RX_FDEQ_BIN_1 +222 0x0000 //RX_FDEQ_BIN_2 +223 0x0000 //RX_FDEQ_BIN_3 +224 0x0000 //RX_FDEQ_BIN_4 +225 0x0000 //RX_FDEQ_BIN_5 +226 0x0000 //RX_FDEQ_BIN_6 +227 0x0000 //RX_FDEQ_BIN_7 +228 0x0000 //RX_FDEQ_BIN_8 +229 0x0000 //RX_FDEQ_BIN_9 +230 0x0000 //RX_FDEQ_BIN_10 +231 0x0000 //RX_FDEQ_BIN_11 +232 0x0000 //RX_FDEQ_BIN_12 +233 0x0000 //RX_FDEQ_BIN_13 +234 0x0000 //RX_FDEQ_BIN_14 +235 0x0000 //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x0000 //RX_FDEQ_RESRV_0 +245 0x0000 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0030 //RX_FDDRC_BAND_MARGIN_1 +248 0x0050 //RX_FDDRC_BAND_MARGIN_2 +249 0x0080 //RX_FDDRC_BAND_MARGIN_3 +250 0x0004 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x5000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x6400 //RX_FDDRC_THRD_3_2 +258 0x6400 //RX_FDDRC_THRD_3_3 +259 0x2000 //RX_FDDRC_SLANT_0_0 +260 0x2000 //RX_FDDRC_SLANT_0_1 +261 0x2000 //RX_FDDRC_SLANT_0_2 +262 0x2000 //RX_FDDRC_SLANT_0_3 +263 0x2000 //RX_FDDRC_SLANT_1_0 +264 0x2000 //RX_FDDRC_SLANT_1_1 +265 0x2000 //RX_FDDRC_SLANT_1_2 +266 0x2000 //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +286 0x0100 //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 diff --git a/audio/panther/tuning/waves/waves_config.ini b/audio/panther/tuning/waves/waves_config.ini index 3e8c870..b9343d5 100644 --- a/audio/panther/tuning/waves/waves_config.ini +++ b/audio/panther/tuning/waves/waves_config.ini @@ -6,7 +6,6 @@ ######################################################################################################## [HAL_SUPPORTED_FEATURES] CUSTOM_ACTION_258=1 -# Action 258 parameters: [dev, mode, throttle control state] ######################################################################################################## # This defined the options of supported sample rates. @@ -20,20 +19,17 @@ SR_COMMON = 48000 # This can be configured by Waves or platform vendor. ######################################################################################################## [HAL_ORIENTATION_SUBTYPES] -OST_SPEAKER = 0:12,90:13,180:12,270:0|13 +OST_SPEAKER = 0:12,90:13,180:12,270:14 ######################################################################################################## # This defines available preset configurations. # This should be configured by Waves only unless platform vendor is familiar with MPS structure. ######################################################################################################## [HAL_SUPPORTED_PRESETS] -SPEAKER_MUSIC_THROTTLE= OM:1,SM:2,OST:OST_SPEAKER -SPEAKER_SAFE_MUSIC_THROTTLE = OM:10,SM:2,OST:OST_SPEAKER -SPEAKER_SAFE_CALL_THROTTLE = OM:10,SM:2,OST:OST_SPEAKER +SPEAKER_MUSIC_THROTTLE= OM:1,SM:3,OST:OST_SPEAKER +SPEAKER_SAFE_MUSIC_THROTTLE = OM:10,SM:3,OST:OST_SPEAKER SPEAKER_MUSIC = OM:1,SM:2,OST:OST_SPEAKER SPEAKER_SAFE_MUSIC = OM:10,SM:2,OST:OST_SPEAKER -SPEAKER_SAFE_CALL = OM:10,SM:2,OST:OST_SPEAKER -HEADSET_MUSIC = OM:2,SM:2 ######################################################################################################## # This defines available CONTROL configurations. Only define the CONTROL if you need it. @@ -41,9 +37,7 @@ HEADSET_MUSIC = OM:2,SM:2 # This can be configured by Waves or platform vendor. ######################################################################################################## [HAL_SUPPORTED_CONTROLS] -SPEAKER_INSTANCE = INSTANCE:1,DEV:0,SR:SR_COMMON,PRESET:SPEAKER_MUSIC|SPEAKER_SAFE_MUSIC|SPEAKER_SAFE_CALL|SPEAKER_MUSIC_THROTTLE|SPEAKER_SAFE_MUSIC_THROTTLE|SPEAKER_SAFE_CALL_THROTTLE -A2DP_INSTANCE = INSTANCE:2,DEV:0,SR:SR_COMMON,PRESET:HEADSET_MUSIC -USB_HEADPHONE_INSTANCE = INSTANCE:4,DEV:0,SR:SR_COMMON,PRESET:HEADSET_MUSIC +SPEAKER_INSTANCE = INSTANCE:1,DEV:0,SR:SR_COMMON,PRESET:SPEAKER_MUSIC|SPEAKER_SAFE_MUSIC|SPEAKER_MUSIC_THROTTLE|SPEAKER_SAFE_MUSIC_THROTTLE [COEFS_CONVERTER_SETTING] AlgFxPath=/vendor/lib/libAlgFx_HiFi3z.so @@ -58,8 +52,10 @@ AlgFxPath64=/vendor/lib64/libAlgFx_HiFi3z.so [CUSTOM_ACTION_258] CASE_1=PRIORITY:0,NUMBERS:2:0|1:1|2,PRESET:SPEAKER_MUSIC -CASE_2=PRIORITY:1,NUMBERS:1|2|4194304:2|3|4:1|2,PRESET:SPEAKER_SAFE_CALL +CASE_2=PRIORITY:1,NUMBERS:1|2|4194304:2|3|4:1|2,PRESET:SPEAKER_SAFE_MUSIC CASE_3=PRIORITY:2,NUMBERS:1|4194304:0|1:1|2,PRESET:SPEAKER_SAFE_MUSIC CASE_4=PRIORITY:3,NUMBERS:2:0|1:0,PRESET:SPEAKER_MUSIC_THROTTLE -CASE_5=PRIORITY:4,NUMBERS:1|2|4194304:2|3|4:0,PRESET:SPEAKER_SAFE_CALL_THROTTLE +CASE_5=PRIORITY:4,NUMBERS:1|2|4194304:2|3|4:0,PRESET:SPEAKER_SAFE_MUSIC_THROTTLE CASE_6=PRIORITY:5,NUMBERS:1|4194304:0|1:0,PRESET:SPEAKER_SAFE_MUSIC_THROTTLE +# Action 258 parameters: audio_devices_t, audio_mode_t, throttle_control_state_t +# - throttle_control_state_t: 0 - Enabled, 1 - Disabled, 2 - Bypassed diff --git a/audio/panther/tuning/waves/waves_preset.mps b/audio/panther/tuning/waves/waves_preset.mps index 9e46393..673f34e 100644 Binary files a/audio/panther/tuning/waves/waves_preset.mps and b/audio/panther/tuning/waves/waves_preset.mps differ diff --git a/audio/ravenclaw/config/audio_platform_configuration.xml b/audio/ravenclaw/config/audio_platform_configuration.xml index 5d2fbc8..f57c505 100644 --- a/audio/ravenclaw/config/audio_platform_configuration.xml +++ b/audio/ravenclaw/config/audio_platform_configuration.xml @@ -187,7 +187,7 @@ - + @@ -283,7 +283,7 @@ - + diff --git a/audio/ravenclaw/config/mixer_paths.xml b/audio/ravenclaw/config/mixer_paths.xml index 2d3db43..141f8c9 100644 --- a/audio/ravenclaw/config/mixer_paths.xml +++ b/audio/ravenclaw/config/mixer_paths.xml @@ -623,6 +623,10 @@ + + + + diff --git a/audio/ravenclaw/tuning/fortemedia/BLUETOOTH.dat b/audio/ravenclaw/tuning/fortemedia/BLUETOOTH.dat index 722b835..04a8e1b 100644 Binary files a/audio/ravenclaw/tuning/fortemedia/BLUETOOTH.dat and b/audio/ravenclaw/tuning/fortemedia/BLUETOOTH.dat differ diff --git a/audio/ravenclaw/tuning/fortemedia/BLUETOOTH.mods b/audio/ravenclaw/tuning/fortemedia/BLUETOOTH.mods index 21cd874..c2f94a8 100644 --- a/audio/ravenclaw/tuning/fortemedia/BLUETOOTH.mods +++ b/audio/ravenclaw/tuning/fortemedia/BLUETOOTH.mods @@ -1,11 +1,12 @@ #PLATFORM_NAME gChip #EXPORT_FLAG BLUETOOTH -#SINGLE_API_VER 1.1.6 -#SAVE_TIME 2021-08-20 16:32:53 +#SINGLE_API_VER 1.2.0 +#SAVE_TIME 2022-02-11 16:24:43 #CASE_NAME BLUETOOTH-RESERVE1-VOICE_GENERIC-FB -#PARAM_TYPE TX+RX -#TOTAL_CUSTOM_STEP 7 +#PARAM_MODE FULL +#PARAM_TYPE TX+2RX +#TOTAL_CUSTOM_STEP 7+7 #TX 0 0x0001 //TX_OPERATION_MODE_0 1 0x0000 //TX_OPERATION_MODE_1 @@ -258,12 +259,12 @@ 248 0xF800 //TX_THR_SN_EST_6 249 0xF800 //TX_THR_SN_EST_7 250 0x0100 //TX_DELTA_THR_SN_EST_0 -251 0x0000 //TX_DELTA_THR_SN_EST_1 +251 0x0100 //TX_DELTA_THR_SN_EST_1 252 0x0100 //TX_DELTA_THR_SN_EST_2 -253 0x0100 //TX_DELTA_THR_SN_EST_3 +253 0x0200 //TX_DELTA_THR_SN_EST_3 254 0x0200 //TX_DELTA_THR_SN_EST_4 255 0x0200 //TX_DELTA_THR_SN_EST_5 -256 0x0200 //TX_DELTA_THR_SN_EST_6 +256 0x0000 //TX_DELTA_THR_SN_EST_6 257 0x0200 //TX_DELTA_THR_SN_EST_7 258 0x4000 //TX_LAMBDA_NN_EST_0 259 0x4000 //TX_LAMBDA_NN_EST_1 @@ -289,12 +290,12 @@ 279 0x0000 //TX_B_POST_FLT_0 280 0x0000 //TX_B_POST_FLT_1 281 0x001A //TX_NS_LVL_CTRL_0 -282 0x001A //TX_NS_LVL_CTRL_1 +282 0x0014 //TX_NS_LVL_CTRL_1 283 0x0014 //TX_NS_LVL_CTRL_2 -284 0x0014 //TX_NS_LVL_CTRL_3 +284 0x000C //TX_NS_LVL_CTRL_3 285 0x000C //TX_NS_LVL_CTRL_4 286 0x000C //TX_NS_LVL_CTRL_5 -287 0x000C //TX_NS_LVL_CTRL_6 +287 0x001A //TX_NS_LVL_CTRL_6 288 0x000C //TX_NS_LVL_CTRL_7 289 0x000E //TX_MIN_GAIN_S_0 290 0x0014 //TX_MIN_GAIN_S_1 @@ -310,10 +311,10 @@ 300 0x7FFF //TX_SNRI_SUP_0 301 0x7FFF //TX_SNRI_SUP_1 302 0x7FFF //TX_SNRI_SUP_2 -303 0x7FFF //TX_SNRI_SUP_3 +303 0x4000 //TX_SNRI_SUP_3 304 0x4000 //TX_SNRI_SUP_4 305 0x4000 //TX_SNRI_SUP_5 -306 0x4000 //TX_SNRI_SUP_6 +306 0x7FFF //TX_SNRI_SUP_6 307 0x4000 //TX_SNRI_SUP_7 308 0x1200 //TX_THR_LFNS 309 0x0028 //TX_G_LFNS @@ -322,12 +323,12 @@ 312 0x7FFF //TX_A_POST_FILT_0 313 0x7FFF //TX_A_POST_FILT_1 314 0x4000 //TX_A_POST_FILT_S_0 -315 0x199A //TX_A_POST_FILT_S_1 +315 0x1000 //TX_A_POST_FILT_S_1 316 0x1000 //TX_A_POST_FILT_S_2 -317 0x1000 //TX_A_POST_FILT_S_3 +317 0x6666 //TX_A_POST_FILT_S_3 318 0x6666 //TX_A_POST_FILT_S_4 319 0x6666 //TX_A_POST_FILT_S_5 -320 0x6666 //TX_A_POST_FILT_S_6 +320 0x199A //TX_A_POST_FILT_S_6 321 0x6666 //TX_A_POST_FILT_S_7 322 0x2000 //TX_B_POST_FILT_0 323 0x2000 //TX_B_POST_FILT_1 @@ -387,10 +388,10 @@ 377 0x7FFF //TX_NOISE_TH_5_4 378 0x00C8 //TX_NOISE_TH_6 379 0x000A //TX_MINENOISE_TH -380 0x0000 //TX_MINENOISE_MIC0_TH_MTS -381 0x0000 //TX_MINENOISE_MIC0_TH_EXP -382 0x0000 //TX_MINENOISE_MIC0_S_TH_MTS -383 0x0000 //TX_MINENOISE_MIC0_S_TH_EXP +380 0x0000 //TX_MORENS_TFMASK_TH +381 0x0000 //TX_DRC_QUIET_FLOOR +382 0x0000 //TX_RATIODTL_CUT_TH +383 0x0000 //TX_DT_CUT_K1 384 0x0640 //TX_OUT_ENER_S_TH_CLEAN 385 0x0640 //TX_OUT_ENER_S_TH_LESSCLEAN 386 0x0640 //TX_OUT_ENER_S_TH_NOISY @@ -398,15 +399,15 @@ 388 0x07D0 //TX_OUT_ENER_TH_SPEECH 389 0x0000 //TX_SN_NPB_GAIN 390 0x0000 //TX_NN_NPB_GAIN -391 0x0000 //TX_CSX_ALPHA_0 -392 0x0000 //TX_CSX_ALPHA_1 -393 0x0000 //TX_CSX_ALPHA_2 -394 0x0000 //TX_CSX_ALPHA_3 -395 0x0000 //TX_MU_ARSP_EST -396 0x0000 //TX_P_OUTBEAM_MIN_TH +391 0x0000 //TX_POST_MASK_SUP_HSNE +392 0x0000 //TX_TAIL_DET_TH +393 0x0000 //TX_B_LESSCUT_RTO_WTA +394 0x0000 //TX_MEL_G_R +395 0x0000 //TX_SUPHIGH_TH +396 0x0000 //TX_MASK_G_R 397 0x0000 //TX_EXTRA_NS_L -398 0x0000 //TX_EXTRA_NS_A -399 0x0000 //TX_VR_NOISE_FLOOR_TH +398 0x0000 //TX_C_POST_FLT_MASK +399 0x0000 //TX_A_POST_FLT_WNS 400 0x0000 //TX_MIN_G_LOW300HZ 401 0x0010 //TX_MAXLEVEL_CNG 402 0x0000 //TX_STN_NOISE_TH @@ -521,16 +522,16 @@ 511 0x6666 //TX_MIC_TO_BFGAIN 512 0x6666 //TX_MICTOBFGAIN0 513 0x0014 //TX_FASTMUE_TH -514 0x0000 //TX_DERVB_LEN_0 -515 0x0000 //TX_DERVB_LEN_1 -516 0x0000 //TX_RHO_DERVB -517 0x0000 //TX_MIC_INDX_DERVB -518 0x0000 //TX_MU_DERVB -519 0x0000 //TX_DR_RESRV_0 -520 0x0000 //TX_DR_RESRV_1 -521 0x0000 //TX_DR_RESRV_2 -522 0x0000 //TX_DR_RESRV_3 -523 0x0000 //TX_DR_RESRV_4 +514 0x0000 //TX_DEREVERB_LF_MU +515 0x0000 //TX_DEREVERB_HF_MU +516 0x0000 //TX_DEREVERB_DELAY +517 0x0000 //TX_DEREVERB_COEF_LEN +518 0x0000 //TX_DEREVERB_DNR +519 0x0000 //TX_DEREVERB_ALPHA +520 0x0000 //TX_DEREVERB_BETA +521 0x0000 //TX_GSC_RTOL_TH +522 0x0000 //TX_GSC_RTOH_TH +523 0x0000 //TX_WIDE2_MEANHTH 524 0x0000 //TX_DR_RESRV_5 525 0x0000 //TX_DR_RESRV_6 526 0x0000 //TX_DR_RESRV_7 @@ -904,6 +905,71 @@ 894 0xC000 //TX_FASTNS_SSA_THHFL 895 0xCCCC //TX_FASTNS_SSA_THLFH 896 0xD999 //TX_FASTNS_SSA_THHFH +897 0x0000 //TX_SENDFUNC_REG_MICMUTE +898 0x0000 //TX_SENDFUNC_REG_MICMUTE1 +899 0x0000 //TX_MICMUTE_RATIO_THR +900 0x0000 //TX_MICMUTE_AMP_THR +901 0x0000 //TX_MICMUTE_HPF_IND +902 0x0000 //TX_MICMUTE_LOG_EYR_TH +903 0x0000 //TX_MICMUTE_CVG_TIME +904 0x0000 //TX_MICMUTE_RELEASE_TIME +905 0x0000 //TX_MIC_VOLUME_MIC0MUTE +906 0x0000 //TX_MICMUTE_EPD_OFFSET_0 +907 0x0000 //TX_MICMUTE_FRQ_AEC_L +908 0x0000 //TX_MICMUTE_EAD_THR +909 0x0000 //TX_MICMUTE_LAMBDA_CB_NLE +910 0x0000 //TX_MICMUTE_LAMBDA_RE_EST +911 0x0000 //TX_DTD_THR1_MICMUTE_0 +912 0x0000 //TX_DTD_THR1_MICMUTE_1 +913 0x0000 //TX_DTD_THR1_MICMUTE_2 +914 0x0000 //TX_DTD_THR1_MICMUTE_3 +915 0x0000 //TX_DTD_THR2_MICMUTE_0 +916 0x0000 //TX_MICMUTE_MIN_EQ_RE_EST_0 +917 0x0000 //TX_MICMUTE_MIN_EQ_RE_EST_1 +918 0x0000 //TX_MICMUTE_MIN_EQ_RE_EST_2 +919 0x0000 //TX_MICMUTE_MIN_EQ_RE_EST_3 +920 0x0000 //TX_MICMUTE_MIN_EQ_RE_EST_4 +921 0x0000 //TX_MICMUTE_C_POST_FLT +922 0x0000 //TX_MICMUTE_DT_CUT_K +923 0x0000 //TX_MICMUTE_DT_CUT_THR +924 0x0000 //TX_MICMUTE_DT_CUT_K2 +925 0x0000 //TX_MICMUTE_DT_CUT_THR2 +926 0x0000 //TX_MICMUTE_DT2_HOLD_N +927 0x0000 //TX_MICMUTE_RATIODTH_THCUT +928 0x0000 //TX_MICMUTE_B_POST_FLT_ECHOL +929 0x0000 //TX_MICMUTE_B_POST_FLT_ECHOH +930 0x0000 //TX_MICMUTE_C_POST_FLT_MASK +931 0x0000 //TX_MICMUTE_RATIODTL_CUT_TH +932 0x0000 //TX_MICMUTE_DT_CUT_K1 +933 0x0000 //TX_MICMUTE_N2_SN_EST +934 0x0000 //TX_MICMUTE_THR_SN_EST_0 +935 0x0000 //TX_MICMUTE_MIN_G_CTRL_0 +936 0x0000 //TX_MICMUTE_A_POST_FILT_S_0 +937 0x0000 //TX_MICMUTE_B_POST_FILT_0 +938 0x0000 //TX_MIC1RUB_AMP_THR +939 0x0000 //TX_MIC1MUTE_RATIO_THR +940 0x0000 //TX_MIC1MUTE_AMP_THR +941 0x0000 //TX_MIC1MUTE_CVG_TIME +942 0x0000 //TX_MIC1MUTE_RELEASE_TIME +943 0x0000 //TX_AMS_RESRV_01 +944 0x0000 //TX_AMS_RESRV_02 +945 0x0000 //TX_AMS_RESRV_03 +946 0x0000 //TX_AMS_RESRV_04 +947 0x0000 //TX_AMS_RESRV_05 +948 0x0000 //TX_AMS_RESRV_06 +949 0x0000 //TX_AMS_RESRV_07 +950 0x0000 //TX_AMS_RESRV_08 +951 0x0000 //TX_AMS_RESRV_09 +952 0x0000 //TX_AMS_RESRV_10 +953 0x0000 //TX_AMS_RESRV_11 +954 0x0000 //TX_AMS_RESRV_12 +955 0x0000 //TX_AMS_RESRV_13 +956 0x0000 //TX_AMS_RESRV_14 +957 0x0000 //TX_AMS_RESRV_15 +958 0x0000 //TX_AMS_RESRV_16 +959 0x0000 //TX_AMS_RESRV_17 +960 0x0000 //TX_AMS_RESRV_18 +961 0x0000 //TX_AMS_RESRV_19 #RX 0 0x0000 //RX_RECVFUNC_MODE_0 1 0x0000 //RX_RECVFUNC_MODE_1 @@ -1755,10 +1821,862 @@ 110 0x0000 //RX_FDDRC_RESRV_0 129 0x0100 //RX_SPK_VOL 130 0x0000 //RX_VOL_RESRV_0 +#RX 2 +157 0x0000 //RX_RECVFUNC_MODE_0 +158 0x0000 //RX_RECVFUNC_MODE_1 +159 0x0000 //RX_SAMPLINGFREQ_SIG +160 0x0000 //RX_SAMPLINGFREQ_PROC +161 0x000A //RX_FRAME_SZ +162 0x0000 //RX_DELAY_OPT +163 0x3000 //RX_TDDRC_ALPHA_UP_1 +164 0x3000 //RX_TDDRC_ALPHA_UP_2 +165 0x3000 //RX_TDDRC_ALPHA_UP_3 +166 0x3000 //RX_TDDRC_ALPHA_UP_4 +167 0x0800 //RX_PGA +168 0x7652 //RX_A_HP +169 0x4000 //RX_B_PE +170 0x7800 //RX_THR_PITCH_DET_0 +171 0x7000 //RX_THR_PITCH_DET_1 +172 0x6000 //RX_THR_PITCH_DET_2 +173 0x0000 //RX_PITCH_BFR_LEN +174 0x0000 //RX_SBD_PITCH_DET +175 0x0000 //RX_PP_RESRV_0 +176 0x0000 //RX_PP_RESRV_1 +177 0xF800 //RX_N_SN_EST +178 0x0000 //RX_N2_SN_EST +179 0x000F //RX_NS_LVL_CTRL +180 0xF800 //RX_THR_SN_EST +181 0x7E00 //RX_LAMBDA_PFILT +182 0x000A //RX_FENS_RESRV_0 +183 0x0000 //RX_FENS_RESRV_1 +184 0x7FB0 //RX_TDDRC_ALPHA_DWN_1 +185 0x7FB0 //RX_TDDRC_ALPHA_DWN_2 +186 0x7FB0 //RX_TDDRC_ALPHA_DWN_3 +187 0x0000 //RX_EXTRA_NS_L +188 0x0000 //RX_EXTRA_NS_A +189 0x7FB0 //RX_TDDRC_ALPHA_DWN_4 +190 0x65AD //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +192 0x0000 //RX_A_POST_FLT +193 0x0000 //RX_LMT_THRD +194 0x4000 //RX_LMT_ALPHA +195 0x0020 //RX_FDEQ_SUBNUM +196 0x4848 //RX_FDEQ_GAIN_0 +197 0x4848 //RX_FDEQ_GAIN_1 +198 0x4848 //RX_FDEQ_GAIN_2 +199 0x4848 //RX_FDEQ_GAIN_3 +200 0x4848 //RX_FDEQ_GAIN_4 +201 0x4848 //RX_FDEQ_GAIN_5 +202 0x4848 //RX_FDEQ_GAIN_6 +203 0x4848 //RX_FDEQ_GAIN_7 +204 0x4848 //RX_FDEQ_GAIN_8 +205 0x4848 //RX_FDEQ_GAIN_9 +206 0x4848 //RX_FDEQ_GAIN_10 +207 0x4848 //RX_FDEQ_GAIN_11 +208 0x4848 //RX_FDEQ_GAIN_12 +209 0x4848 //RX_FDEQ_GAIN_13 +210 0x4848 //RX_FDEQ_GAIN_14 +211 0x4848 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0000 //RX_FDEQ_BIN_0 +221 0x0000 //RX_FDEQ_BIN_1 +222 0x0000 //RX_FDEQ_BIN_2 +223 0x0000 //RX_FDEQ_BIN_3 +224 0x0000 //RX_FDEQ_BIN_4 +225 0x0000 //RX_FDEQ_BIN_5 +226 0x0000 //RX_FDEQ_BIN_6 +227 0x0000 //RX_FDEQ_BIN_7 +228 0x0000 //RX_FDEQ_BIN_8 +229 0x0000 //RX_FDEQ_BIN_9 +230 0x0000 //RX_FDEQ_BIN_10 +231 0x0000 //RX_FDEQ_BIN_11 +232 0x0000 //RX_FDEQ_BIN_12 +233 0x0000 //RX_FDEQ_BIN_13 +234 0x0000 //RX_FDEQ_BIN_14 +235 0x0000 //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x0000 //RX_FDEQ_RESRV_0 +245 0x0000 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0030 //RX_FDDRC_BAND_MARGIN_1 +248 0x0050 //RX_FDDRC_BAND_MARGIN_2 +249 0x0080 //RX_FDDRC_BAND_MARGIN_3 +250 0x0004 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x5000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x6400 //RX_FDDRC_THRD_3_2 +258 0x6400 //RX_FDDRC_THRD_3_3 +259 0x2000 //RX_FDDRC_SLANT_0_0 +260 0x2000 //RX_FDDRC_SLANT_0_1 +261 0x2000 //RX_FDDRC_SLANT_0_2 +262 0x2000 //RX_FDDRC_SLANT_0_3 +263 0x2000 //RX_FDDRC_SLANT_1_0 +264 0x2000 //RX_FDDRC_SLANT_1_1 +265 0x2000 //RX_FDDRC_SLANT_1_2 +266 0x2000 //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +268 0x0000 //RX_FILTINDX +269 0x0000 //RX_TDDRC_THRD_0 +270 0x0000 //RX_TDDRC_THRD_1 +271 0x0E80 //RX_TDDRC_THRD_2 +272 0x3800 //RX_TDDRC_THRD_3 +273 0x2A00 //RX_TDDRC_SLANT_0 +274 0x6E00 //RX_TDDRC_SLANT_1 +275 0x3000 //RX_TDDRC_ALPHA_UP_0 +276 0x7FB0 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x0000 //RX_TDDRC_HMNC_GAIN +279 0x0000 //RX_TDDRC_SMT_FLAG +280 0x0000 //RX_TDDRC_SMT_W +281 0x0100 //RX_TDDRC_DRC_GAIN +282 0x7C00 //RX_LAMBDA_PKA_FP +283 0x2000 //RX_TPKA_FP +284 0x0080 //RX_MIN_G_FP +285 0x2000 //RX_MAX_G_FP +286 0x000C //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 +288 0x0010 //RX_MAXLEVEL_CNG +289 0x0000 //RX_BWE_UV_TH +290 0x0000 //RX_BWE_UV_TH2 +291 0x0000 //RX_BWE_UV_TH3 +292 0x0000 //RX_BWE_V_TH +293 0x0000 //RX_BWE_GAIN1_V_TH1 +294 0x0000 //RX_BWE_GAIN1_V_TH2 +295 0x0000 //RX_BWE_UV_EQ +296 0x0000 //RX_BWE_V_EQ +297 0x0000 //RX_BWE_TONE_TH +298 0x0000 //RX_BWE_UV_HOLD_T +299 0x0000 //RX_BWE_GAIN2_ALPHA +300 0x0000 //RX_BWE_GAIN3_ALPHA +301 0x0000 //RX_BWE_CUTOFF +302 0x0000 //RX_BWE_GAINFILL +303 0x0000 //RX_BWE_MAXTH_TONE +304 0x0000 //RX_BWE_EQ_0 +305 0x0000 //RX_BWE_EQ_1 +306 0x0000 //RX_BWE_EQ_2 +307 0x0000 //RX_BWE_EQ_3 +308 0x0000 //RX_BWE_EQ_4 +309 0x0000 //RX_BWE_EQ_5 +310 0x0000 //RX_BWE_EQ_6 +311 0x0000 //RX_BWE_RESRV_0 +312 0x0000 //RX_BWE_RESRV_1 +313 0x0000 //RX_BWE_RESRV_2 +#VOL 0 +163 0x3000 //RX_TDDRC_ALPHA_UP_1 +164 0x3000 //RX_TDDRC_ALPHA_UP_2 +165 0x3000 //RX_TDDRC_ALPHA_UP_3 +166 0x3000 //RX_TDDRC_ALPHA_UP_4 +184 0x7FB0 //RX_TDDRC_ALPHA_DWN_1 +185 0x7FB0 //RX_TDDRC_ALPHA_DWN_2 +186 0x7FB0 //RX_TDDRC_ALPHA_DWN_3 +189 0x7FB0 //RX_TDDRC_ALPHA_DWN_4 +190 0x65AD //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +269 0x0000 //RX_TDDRC_THRD_0 +270 0x0000 //RX_TDDRC_THRD_1 +271 0x0E80 //RX_TDDRC_THRD_2 +272 0x3800 //RX_TDDRC_THRD_3 +273 0x2A00 //RX_TDDRC_SLANT_0 +274 0x6E00 //RX_TDDRC_SLANT_1 +275 0x3000 //RX_TDDRC_ALPHA_UP_0 +276 0x7FB0 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x0000 //RX_TDDRC_HMNC_GAIN +279 0x0000 //RX_TDDRC_SMT_FLAG +280 0x0000 //RX_TDDRC_SMT_W +281 0x0100 //RX_TDDRC_DRC_GAIN +195 0x0020 //RX_FDEQ_SUBNUM +196 0x4848 //RX_FDEQ_GAIN_0 +197 0x4848 //RX_FDEQ_GAIN_1 +198 0x4848 //RX_FDEQ_GAIN_2 +199 0x4848 //RX_FDEQ_GAIN_3 +200 0x4848 //RX_FDEQ_GAIN_4 +201 0x4848 //RX_FDEQ_GAIN_5 +202 0x4848 //RX_FDEQ_GAIN_6 +203 0x4848 //RX_FDEQ_GAIN_7 +204 0x4848 //RX_FDEQ_GAIN_8 +205 0x4848 //RX_FDEQ_GAIN_9 +206 0x4848 //RX_FDEQ_GAIN_10 +207 0x4848 //RX_FDEQ_GAIN_11 +208 0x4848 //RX_FDEQ_GAIN_12 +209 0x4848 //RX_FDEQ_GAIN_13 +210 0x4848 //RX_FDEQ_GAIN_14 +211 0x4848 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0000 //RX_FDEQ_BIN_0 +221 0x0000 //RX_FDEQ_BIN_1 +222 0x0000 //RX_FDEQ_BIN_2 +223 0x0000 //RX_FDEQ_BIN_3 +224 0x0000 //RX_FDEQ_BIN_4 +225 0x0000 //RX_FDEQ_BIN_5 +226 0x0000 //RX_FDEQ_BIN_6 +227 0x0000 //RX_FDEQ_BIN_7 +228 0x0000 //RX_FDEQ_BIN_8 +229 0x0000 //RX_FDEQ_BIN_9 +230 0x0000 //RX_FDEQ_BIN_10 +231 0x0000 //RX_FDEQ_BIN_11 +232 0x0000 //RX_FDEQ_BIN_12 +233 0x0000 //RX_FDEQ_BIN_13 +234 0x0000 //RX_FDEQ_BIN_14 +235 0x0000 //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x0000 //RX_FDEQ_RESRV_0 +245 0x0000 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0030 //RX_FDDRC_BAND_MARGIN_1 +248 0x0050 //RX_FDDRC_BAND_MARGIN_2 +249 0x0080 //RX_FDDRC_BAND_MARGIN_3 +250 0x0004 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x5000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x6400 //RX_FDDRC_THRD_3_2 +258 0x6400 //RX_FDDRC_THRD_3_3 +259 0x2000 //RX_FDDRC_SLANT_0_0 +260 0x2000 //RX_FDDRC_SLANT_0_1 +261 0x2000 //RX_FDDRC_SLANT_0_2 +262 0x2000 //RX_FDDRC_SLANT_0_3 +263 0x2000 //RX_FDDRC_SLANT_1_0 +264 0x2000 //RX_FDDRC_SLANT_1_1 +265 0x2000 //RX_FDDRC_SLANT_1_2 +266 0x2000 //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +286 0x000C //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 +#VOL 1 +163 0x3000 //RX_TDDRC_ALPHA_UP_1 +164 0x3000 //RX_TDDRC_ALPHA_UP_2 +165 0x3000 //RX_TDDRC_ALPHA_UP_3 +166 0x3000 //RX_TDDRC_ALPHA_UP_4 +184 0x7FB0 //RX_TDDRC_ALPHA_DWN_1 +185 0x7FB0 //RX_TDDRC_ALPHA_DWN_2 +186 0x7FB0 //RX_TDDRC_ALPHA_DWN_3 +189 0x7FB0 //RX_TDDRC_ALPHA_DWN_4 +190 0x65AD //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +269 0x0000 //RX_TDDRC_THRD_0 +270 0x0000 //RX_TDDRC_THRD_1 +271 0x0E80 //RX_TDDRC_THRD_2 +272 0x3800 //RX_TDDRC_THRD_3 +273 0x2A00 //RX_TDDRC_SLANT_0 +274 0x6E00 //RX_TDDRC_SLANT_1 +275 0x3000 //RX_TDDRC_ALPHA_UP_0 +276 0x7FB0 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x0000 //RX_TDDRC_HMNC_GAIN +279 0x0000 //RX_TDDRC_SMT_FLAG +280 0x0000 //RX_TDDRC_SMT_W +281 0x0100 //RX_TDDRC_DRC_GAIN +195 0x0020 //RX_FDEQ_SUBNUM +196 0x4848 //RX_FDEQ_GAIN_0 +197 0x4848 //RX_FDEQ_GAIN_1 +198 0x4848 //RX_FDEQ_GAIN_2 +199 0x4848 //RX_FDEQ_GAIN_3 +200 0x4848 //RX_FDEQ_GAIN_4 +201 0x4848 //RX_FDEQ_GAIN_5 +202 0x4848 //RX_FDEQ_GAIN_6 +203 0x4848 //RX_FDEQ_GAIN_7 +204 0x4848 //RX_FDEQ_GAIN_8 +205 0x4848 //RX_FDEQ_GAIN_9 +206 0x4848 //RX_FDEQ_GAIN_10 +207 0x4848 //RX_FDEQ_GAIN_11 +208 0x4848 //RX_FDEQ_GAIN_12 +209 0x4848 //RX_FDEQ_GAIN_13 +210 0x4848 //RX_FDEQ_GAIN_14 +211 0x4848 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0000 //RX_FDEQ_BIN_0 +221 0x0000 //RX_FDEQ_BIN_1 +222 0x0000 //RX_FDEQ_BIN_2 +223 0x0000 //RX_FDEQ_BIN_3 +224 0x0000 //RX_FDEQ_BIN_4 +225 0x0000 //RX_FDEQ_BIN_5 +226 0x0000 //RX_FDEQ_BIN_6 +227 0x0000 //RX_FDEQ_BIN_7 +228 0x0000 //RX_FDEQ_BIN_8 +229 0x0000 //RX_FDEQ_BIN_9 +230 0x0000 //RX_FDEQ_BIN_10 +231 0x0000 //RX_FDEQ_BIN_11 +232 0x0000 //RX_FDEQ_BIN_12 +233 0x0000 //RX_FDEQ_BIN_13 +234 0x0000 //RX_FDEQ_BIN_14 +235 0x0000 //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x0000 //RX_FDEQ_RESRV_0 +245 0x0000 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0030 //RX_FDDRC_BAND_MARGIN_1 +248 0x0050 //RX_FDDRC_BAND_MARGIN_2 +249 0x0080 //RX_FDDRC_BAND_MARGIN_3 +250 0x0004 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x5000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x6400 //RX_FDDRC_THRD_3_2 +258 0x6400 //RX_FDDRC_THRD_3_3 +259 0x2000 //RX_FDDRC_SLANT_0_0 +260 0x2000 //RX_FDDRC_SLANT_0_1 +261 0x2000 //RX_FDDRC_SLANT_0_2 +262 0x2000 //RX_FDDRC_SLANT_0_3 +263 0x2000 //RX_FDDRC_SLANT_1_0 +264 0x2000 //RX_FDDRC_SLANT_1_1 +265 0x2000 //RX_FDDRC_SLANT_1_2 +266 0x2000 //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +286 0x0014 //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 +#VOL 2 +163 0x3000 //RX_TDDRC_ALPHA_UP_1 +164 0x3000 //RX_TDDRC_ALPHA_UP_2 +165 0x3000 //RX_TDDRC_ALPHA_UP_3 +166 0x3000 //RX_TDDRC_ALPHA_UP_4 +184 0x7FB0 //RX_TDDRC_ALPHA_DWN_1 +185 0x7FB0 //RX_TDDRC_ALPHA_DWN_2 +186 0x7FB0 //RX_TDDRC_ALPHA_DWN_3 +189 0x7FB0 //RX_TDDRC_ALPHA_DWN_4 +190 0x65AD //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +269 0x0000 //RX_TDDRC_THRD_0 +270 0x0000 //RX_TDDRC_THRD_1 +271 0x0E80 //RX_TDDRC_THRD_2 +272 0x3800 //RX_TDDRC_THRD_3 +273 0x2A00 //RX_TDDRC_SLANT_0 +274 0x6E00 //RX_TDDRC_SLANT_1 +275 0x3000 //RX_TDDRC_ALPHA_UP_0 +276 0x7FB0 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x0000 //RX_TDDRC_HMNC_GAIN +279 0x0000 //RX_TDDRC_SMT_FLAG +280 0x0000 //RX_TDDRC_SMT_W +281 0x0100 //RX_TDDRC_DRC_GAIN +195 0x0020 //RX_FDEQ_SUBNUM +196 0x4848 //RX_FDEQ_GAIN_0 +197 0x4848 //RX_FDEQ_GAIN_1 +198 0x4848 //RX_FDEQ_GAIN_2 +199 0x4848 //RX_FDEQ_GAIN_3 +200 0x4848 //RX_FDEQ_GAIN_4 +201 0x4848 //RX_FDEQ_GAIN_5 +202 0x4848 //RX_FDEQ_GAIN_6 +203 0x4848 //RX_FDEQ_GAIN_7 +204 0x4848 //RX_FDEQ_GAIN_8 +205 0x4848 //RX_FDEQ_GAIN_9 +206 0x4848 //RX_FDEQ_GAIN_10 +207 0x4848 //RX_FDEQ_GAIN_11 +208 0x4848 //RX_FDEQ_GAIN_12 +209 0x4848 //RX_FDEQ_GAIN_13 +210 0x4848 //RX_FDEQ_GAIN_14 +211 0x4848 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0000 //RX_FDEQ_BIN_0 +221 0x0000 //RX_FDEQ_BIN_1 +222 0x0000 //RX_FDEQ_BIN_2 +223 0x0000 //RX_FDEQ_BIN_3 +224 0x0000 //RX_FDEQ_BIN_4 +225 0x0000 //RX_FDEQ_BIN_5 +226 0x0000 //RX_FDEQ_BIN_6 +227 0x0000 //RX_FDEQ_BIN_7 +228 0x0000 //RX_FDEQ_BIN_8 +229 0x0000 //RX_FDEQ_BIN_9 +230 0x0000 //RX_FDEQ_BIN_10 +231 0x0000 //RX_FDEQ_BIN_11 +232 0x0000 //RX_FDEQ_BIN_12 +233 0x0000 //RX_FDEQ_BIN_13 +234 0x0000 //RX_FDEQ_BIN_14 +235 0x0000 //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x0000 //RX_FDEQ_RESRV_0 +245 0x0000 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0030 //RX_FDDRC_BAND_MARGIN_1 +248 0x0050 //RX_FDDRC_BAND_MARGIN_2 +249 0x0080 //RX_FDDRC_BAND_MARGIN_3 +250 0x0004 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x5000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x6400 //RX_FDDRC_THRD_3_2 +258 0x6400 //RX_FDDRC_THRD_3_3 +259 0x2000 //RX_FDDRC_SLANT_0_0 +260 0x2000 //RX_FDDRC_SLANT_0_1 +261 0x2000 //RX_FDDRC_SLANT_0_2 +262 0x2000 //RX_FDDRC_SLANT_0_3 +263 0x2000 //RX_FDDRC_SLANT_1_0 +264 0x2000 //RX_FDDRC_SLANT_1_1 +265 0x2000 //RX_FDDRC_SLANT_1_2 +266 0x2000 //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +286 0x0021 //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 +#VOL 3 +163 0x3000 //RX_TDDRC_ALPHA_UP_1 +164 0x3000 //RX_TDDRC_ALPHA_UP_2 +165 0x3000 //RX_TDDRC_ALPHA_UP_3 +166 0x3000 //RX_TDDRC_ALPHA_UP_4 +184 0x7FB0 //RX_TDDRC_ALPHA_DWN_1 +185 0x7FB0 //RX_TDDRC_ALPHA_DWN_2 +186 0x7FB0 //RX_TDDRC_ALPHA_DWN_3 +189 0x7FB0 //RX_TDDRC_ALPHA_DWN_4 +190 0x65AD //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +269 0x0000 //RX_TDDRC_THRD_0 +270 0x0000 //RX_TDDRC_THRD_1 +271 0x0E80 //RX_TDDRC_THRD_2 +272 0x3800 //RX_TDDRC_THRD_3 +273 0x2A00 //RX_TDDRC_SLANT_0 +274 0x6E00 //RX_TDDRC_SLANT_1 +275 0x3000 //RX_TDDRC_ALPHA_UP_0 +276 0x7FB0 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x0000 //RX_TDDRC_HMNC_GAIN +279 0x0000 //RX_TDDRC_SMT_FLAG +280 0x0000 //RX_TDDRC_SMT_W +281 0x0100 //RX_TDDRC_DRC_GAIN +195 0x0020 //RX_FDEQ_SUBNUM +196 0x4848 //RX_FDEQ_GAIN_0 +197 0x4848 //RX_FDEQ_GAIN_1 +198 0x4848 //RX_FDEQ_GAIN_2 +199 0x4848 //RX_FDEQ_GAIN_3 +200 0x4848 //RX_FDEQ_GAIN_4 +201 0x4848 //RX_FDEQ_GAIN_5 +202 0x4848 //RX_FDEQ_GAIN_6 +203 0x4848 //RX_FDEQ_GAIN_7 +204 0x4848 //RX_FDEQ_GAIN_8 +205 0x4848 //RX_FDEQ_GAIN_9 +206 0x4848 //RX_FDEQ_GAIN_10 +207 0x4848 //RX_FDEQ_GAIN_11 +208 0x4848 //RX_FDEQ_GAIN_12 +209 0x4848 //RX_FDEQ_GAIN_13 +210 0x4848 //RX_FDEQ_GAIN_14 +211 0x4848 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0000 //RX_FDEQ_BIN_0 +221 0x0000 //RX_FDEQ_BIN_1 +222 0x0000 //RX_FDEQ_BIN_2 +223 0x0000 //RX_FDEQ_BIN_3 +224 0x0000 //RX_FDEQ_BIN_4 +225 0x0000 //RX_FDEQ_BIN_5 +226 0x0000 //RX_FDEQ_BIN_6 +227 0x0000 //RX_FDEQ_BIN_7 +228 0x0000 //RX_FDEQ_BIN_8 +229 0x0000 //RX_FDEQ_BIN_9 +230 0x0000 //RX_FDEQ_BIN_10 +231 0x0000 //RX_FDEQ_BIN_11 +232 0x0000 //RX_FDEQ_BIN_12 +233 0x0000 //RX_FDEQ_BIN_13 +234 0x0000 //RX_FDEQ_BIN_14 +235 0x0000 //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x0000 //RX_FDEQ_RESRV_0 +245 0x0000 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0030 //RX_FDDRC_BAND_MARGIN_1 +248 0x0050 //RX_FDDRC_BAND_MARGIN_2 +249 0x0080 //RX_FDDRC_BAND_MARGIN_3 +250 0x0004 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x5000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x6400 //RX_FDDRC_THRD_3_2 +258 0x6400 //RX_FDDRC_THRD_3_3 +259 0x2000 //RX_FDDRC_SLANT_0_0 +260 0x2000 //RX_FDDRC_SLANT_0_1 +261 0x2000 //RX_FDDRC_SLANT_0_2 +262 0x2000 //RX_FDDRC_SLANT_0_3 +263 0x2000 //RX_FDDRC_SLANT_1_0 +264 0x2000 //RX_FDDRC_SLANT_1_1 +265 0x2000 //RX_FDDRC_SLANT_1_2 +266 0x2000 //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +286 0x0037 //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 +#VOL 4 +163 0x3000 //RX_TDDRC_ALPHA_UP_1 +164 0x3000 //RX_TDDRC_ALPHA_UP_2 +165 0x3000 //RX_TDDRC_ALPHA_UP_3 +166 0x3000 //RX_TDDRC_ALPHA_UP_4 +184 0x7FB0 //RX_TDDRC_ALPHA_DWN_1 +185 0x7FB0 //RX_TDDRC_ALPHA_DWN_2 +186 0x7FB0 //RX_TDDRC_ALPHA_DWN_3 +189 0x7FB0 //RX_TDDRC_ALPHA_DWN_4 +190 0x65AD //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +269 0x0000 //RX_TDDRC_THRD_0 +270 0x0000 //RX_TDDRC_THRD_1 +271 0x0E80 //RX_TDDRC_THRD_2 +272 0x3800 //RX_TDDRC_THRD_3 +273 0x2A00 //RX_TDDRC_SLANT_0 +274 0x6E00 //RX_TDDRC_SLANT_1 +275 0x3000 //RX_TDDRC_ALPHA_UP_0 +276 0x7FB0 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x0000 //RX_TDDRC_HMNC_GAIN +279 0x0000 //RX_TDDRC_SMT_FLAG +280 0x0000 //RX_TDDRC_SMT_W +281 0x0100 //RX_TDDRC_DRC_GAIN +195 0x0020 //RX_FDEQ_SUBNUM +196 0x4848 //RX_FDEQ_GAIN_0 +197 0x4848 //RX_FDEQ_GAIN_1 +198 0x4848 //RX_FDEQ_GAIN_2 +199 0x4848 //RX_FDEQ_GAIN_3 +200 0x4848 //RX_FDEQ_GAIN_4 +201 0x4848 //RX_FDEQ_GAIN_5 +202 0x4848 //RX_FDEQ_GAIN_6 +203 0x4848 //RX_FDEQ_GAIN_7 +204 0x4848 //RX_FDEQ_GAIN_8 +205 0x4848 //RX_FDEQ_GAIN_9 +206 0x4848 //RX_FDEQ_GAIN_10 +207 0x4848 //RX_FDEQ_GAIN_11 +208 0x4848 //RX_FDEQ_GAIN_12 +209 0x4848 //RX_FDEQ_GAIN_13 +210 0x4848 //RX_FDEQ_GAIN_14 +211 0x4848 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0000 //RX_FDEQ_BIN_0 +221 0x0000 //RX_FDEQ_BIN_1 +222 0x0000 //RX_FDEQ_BIN_2 +223 0x0000 //RX_FDEQ_BIN_3 +224 0x0000 //RX_FDEQ_BIN_4 +225 0x0000 //RX_FDEQ_BIN_5 +226 0x0000 //RX_FDEQ_BIN_6 +227 0x0000 //RX_FDEQ_BIN_7 +228 0x0000 //RX_FDEQ_BIN_8 +229 0x0000 //RX_FDEQ_BIN_9 +230 0x0000 //RX_FDEQ_BIN_10 +231 0x0000 //RX_FDEQ_BIN_11 +232 0x0000 //RX_FDEQ_BIN_12 +233 0x0000 //RX_FDEQ_BIN_13 +234 0x0000 //RX_FDEQ_BIN_14 +235 0x0000 //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x0000 //RX_FDEQ_RESRV_0 +245 0x0000 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0030 //RX_FDDRC_BAND_MARGIN_1 +248 0x0050 //RX_FDDRC_BAND_MARGIN_2 +249 0x0080 //RX_FDDRC_BAND_MARGIN_3 +250 0x0004 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x5000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x6400 //RX_FDDRC_THRD_3_2 +258 0x6400 //RX_FDDRC_THRD_3_3 +259 0x2000 //RX_FDDRC_SLANT_0_0 +260 0x2000 //RX_FDDRC_SLANT_0_1 +261 0x2000 //RX_FDDRC_SLANT_0_2 +262 0x2000 //RX_FDDRC_SLANT_0_3 +263 0x2000 //RX_FDDRC_SLANT_1_0 +264 0x2000 //RX_FDDRC_SLANT_1_1 +265 0x2000 //RX_FDDRC_SLANT_1_2 +266 0x2000 //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +286 0x005B //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 +#VOL 5 +163 0x3000 //RX_TDDRC_ALPHA_UP_1 +164 0x3000 //RX_TDDRC_ALPHA_UP_2 +165 0x3000 //RX_TDDRC_ALPHA_UP_3 +166 0x3000 //RX_TDDRC_ALPHA_UP_4 +184 0x7FB0 //RX_TDDRC_ALPHA_DWN_1 +185 0x7FB0 //RX_TDDRC_ALPHA_DWN_2 +186 0x7FB0 //RX_TDDRC_ALPHA_DWN_3 +189 0x7FB0 //RX_TDDRC_ALPHA_DWN_4 +190 0x65AD //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +269 0x0000 //RX_TDDRC_THRD_0 +270 0x0000 //RX_TDDRC_THRD_1 +271 0x0E80 //RX_TDDRC_THRD_2 +272 0x3800 //RX_TDDRC_THRD_3 +273 0x2A00 //RX_TDDRC_SLANT_0 +274 0x6E00 //RX_TDDRC_SLANT_1 +275 0x3000 //RX_TDDRC_ALPHA_UP_0 +276 0x7FB0 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x0000 //RX_TDDRC_HMNC_GAIN +279 0x0000 //RX_TDDRC_SMT_FLAG +280 0x0000 //RX_TDDRC_SMT_W +281 0x0100 //RX_TDDRC_DRC_GAIN +195 0x0020 //RX_FDEQ_SUBNUM +196 0x4848 //RX_FDEQ_GAIN_0 +197 0x4848 //RX_FDEQ_GAIN_1 +198 0x4848 //RX_FDEQ_GAIN_2 +199 0x4848 //RX_FDEQ_GAIN_3 +200 0x4848 //RX_FDEQ_GAIN_4 +201 0x4848 //RX_FDEQ_GAIN_5 +202 0x4848 //RX_FDEQ_GAIN_6 +203 0x4848 //RX_FDEQ_GAIN_7 +204 0x4848 //RX_FDEQ_GAIN_8 +205 0x4848 //RX_FDEQ_GAIN_9 +206 0x4848 //RX_FDEQ_GAIN_10 +207 0x4848 //RX_FDEQ_GAIN_11 +208 0x4848 //RX_FDEQ_GAIN_12 +209 0x4848 //RX_FDEQ_GAIN_13 +210 0x4848 //RX_FDEQ_GAIN_14 +211 0x4848 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0000 //RX_FDEQ_BIN_0 +221 0x0000 //RX_FDEQ_BIN_1 +222 0x0000 //RX_FDEQ_BIN_2 +223 0x0000 //RX_FDEQ_BIN_3 +224 0x0000 //RX_FDEQ_BIN_4 +225 0x0000 //RX_FDEQ_BIN_5 +226 0x0000 //RX_FDEQ_BIN_6 +227 0x0000 //RX_FDEQ_BIN_7 +228 0x0000 //RX_FDEQ_BIN_8 +229 0x0000 //RX_FDEQ_BIN_9 +230 0x0000 //RX_FDEQ_BIN_10 +231 0x0000 //RX_FDEQ_BIN_11 +232 0x0000 //RX_FDEQ_BIN_12 +233 0x0000 //RX_FDEQ_BIN_13 +234 0x0000 //RX_FDEQ_BIN_14 +235 0x0000 //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x0000 //RX_FDEQ_RESRV_0 +245 0x0000 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0030 //RX_FDDRC_BAND_MARGIN_1 +248 0x0050 //RX_FDDRC_BAND_MARGIN_2 +249 0x0080 //RX_FDDRC_BAND_MARGIN_3 +250 0x0004 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x5000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x6400 //RX_FDDRC_THRD_3_2 +258 0x6400 //RX_FDDRC_THRD_3_3 +259 0x2000 //RX_FDDRC_SLANT_0_0 +260 0x2000 //RX_FDDRC_SLANT_0_1 +261 0x2000 //RX_FDDRC_SLANT_0_2 +262 0x2000 //RX_FDDRC_SLANT_0_3 +263 0x2000 //RX_FDDRC_SLANT_1_0 +264 0x2000 //RX_FDDRC_SLANT_1_1 +265 0x2000 //RX_FDDRC_SLANT_1_2 +266 0x2000 //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +286 0x0099 //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 +#VOL 6 +163 0x3000 //RX_TDDRC_ALPHA_UP_1 +164 0x3000 //RX_TDDRC_ALPHA_UP_2 +165 0x3000 //RX_TDDRC_ALPHA_UP_3 +166 0x3000 //RX_TDDRC_ALPHA_UP_4 +184 0x7FB0 //RX_TDDRC_ALPHA_DWN_1 +185 0x7FB0 //RX_TDDRC_ALPHA_DWN_2 +186 0x7FB0 //RX_TDDRC_ALPHA_DWN_3 +189 0x7FB0 //RX_TDDRC_ALPHA_DWN_4 +190 0x65AD //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +269 0x0000 //RX_TDDRC_THRD_0 +270 0x0000 //RX_TDDRC_THRD_1 +271 0x0E80 //RX_TDDRC_THRD_2 +272 0x3800 //RX_TDDRC_THRD_3 +273 0x2A00 //RX_TDDRC_SLANT_0 +274 0x6E00 //RX_TDDRC_SLANT_1 +275 0x3000 //RX_TDDRC_ALPHA_UP_0 +276 0x7FB0 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x0000 //RX_TDDRC_HMNC_GAIN +279 0x0000 //RX_TDDRC_SMT_FLAG +280 0x0000 //RX_TDDRC_SMT_W +281 0x0100 //RX_TDDRC_DRC_GAIN +195 0x0020 //RX_FDEQ_SUBNUM +196 0x4848 //RX_FDEQ_GAIN_0 +197 0x4848 //RX_FDEQ_GAIN_1 +198 0x4848 //RX_FDEQ_GAIN_2 +199 0x4848 //RX_FDEQ_GAIN_3 +200 0x4848 //RX_FDEQ_GAIN_4 +201 0x4848 //RX_FDEQ_GAIN_5 +202 0x4848 //RX_FDEQ_GAIN_6 +203 0x4848 //RX_FDEQ_GAIN_7 +204 0x4848 //RX_FDEQ_GAIN_8 +205 0x4848 //RX_FDEQ_GAIN_9 +206 0x4848 //RX_FDEQ_GAIN_10 +207 0x4848 //RX_FDEQ_GAIN_11 +208 0x4848 //RX_FDEQ_GAIN_12 +209 0x4848 //RX_FDEQ_GAIN_13 +210 0x4848 //RX_FDEQ_GAIN_14 +211 0x4848 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0000 //RX_FDEQ_BIN_0 +221 0x0000 //RX_FDEQ_BIN_1 +222 0x0000 //RX_FDEQ_BIN_2 +223 0x0000 //RX_FDEQ_BIN_3 +224 0x0000 //RX_FDEQ_BIN_4 +225 0x0000 //RX_FDEQ_BIN_5 +226 0x0000 //RX_FDEQ_BIN_6 +227 0x0000 //RX_FDEQ_BIN_7 +228 0x0000 //RX_FDEQ_BIN_8 +229 0x0000 //RX_FDEQ_BIN_9 +230 0x0000 //RX_FDEQ_BIN_10 +231 0x0000 //RX_FDEQ_BIN_11 +232 0x0000 //RX_FDEQ_BIN_12 +233 0x0000 //RX_FDEQ_BIN_13 +234 0x0000 //RX_FDEQ_BIN_14 +235 0x0000 //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x0000 //RX_FDEQ_RESRV_0 +245 0x0000 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0030 //RX_FDDRC_BAND_MARGIN_1 +248 0x0050 //RX_FDDRC_BAND_MARGIN_2 +249 0x0080 //RX_FDDRC_BAND_MARGIN_3 +250 0x0004 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x5000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x6400 //RX_FDDRC_THRD_3_2 +258 0x6400 //RX_FDDRC_THRD_3_3 +259 0x2000 //RX_FDDRC_SLANT_0_0 +260 0x2000 //RX_FDDRC_SLANT_0_1 +261 0x2000 //RX_FDDRC_SLANT_0_2 +262 0x2000 //RX_FDDRC_SLANT_0_3 +263 0x2000 //RX_FDDRC_SLANT_1_0 +264 0x2000 //RX_FDDRC_SLANT_1_1 +265 0x2000 //RX_FDDRC_SLANT_1_2 +266 0x2000 //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +286 0x0100 //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 #CASE_NAME BLUETOOTH-BT_HAC-VOICE_GENERIC-NB -#PARAM_TYPE TX+RX -#TOTAL_CUSTOM_STEP 7 +#PARAM_MODE FULL +#PARAM_TYPE TX+2RX +#TOTAL_CUSTOM_STEP 7+7 #TX 0 0x0001 //TX_OPERATION_MODE_0 1 0x0001 //TX_OPERATION_MODE_1 @@ -2011,12 +2929,12 @@ 248 0xF800 //TX_THR_SN_EST_6 249 0xF800 //TX_THR_SN_EST_7 250 0x0050 //TX_DELTA_THR_SN_EST_0 -251 0x01A0 //TX_DELTA_THR_SN_EST_1 +251 0x0200 //TX_DELTA_THR_SN_EST_1 252 0x0200 //TX_DELTA_THR_SN_EST_2 -253 0x0200 //TX_DELTA_THR_SN_EST_3 -254 0x0100 //TX_DELTA_THR_SN_EST_4 +253 0x0100 //TX_DELTA_THR_SN_EST_3 +254 0x0200 //TX_DELTA_THR_SN_EST_4 255 0x0200 //TX_DELTA_THR_SN_EST_5 -256 0x0200 //TX_DELTA_THR_SN_EST_6 +256 0x01A0 //TX_DELTA_THR_SN_EST_6 257 0x0200 //TX_DELTA_THR_SN_EST_7 258 0x4000 //TX_LAMBDA_NN_EST_0 259 0x4000 //TX_LAMBDA_NN_EST_1 @@ -2042,29 +2960,29 @@ 279 0x1000 //TX_B_POST_FLT_0 280 0x1000 //TX_B_POST_FLT_1 281 0x0010 //TX_NS_LVL_CTRL_0 -282 0x0012 //TX_NS_LVL_CTRL_1 -283 0x0017 //TX_NS_LVL_CTRL_2 -284 0x0015 //TX_NS_LVL_CTRL_3 +282 0x0017 //TX_NS_LVL_CTRL_1 +283 0x0015 //TX_NS_LVL_CTRL_2 +284 0x0012 //TX_NS_LVL_CTRL_3 285 0x0012 //TX_NS_LVL_CTRL_4 -286 0x0012 //TX_NS_LVL_CTRL_5 -287 0x0011 //TX_NS_LVL_CTRL_6 +286 0x0011 //TX_NS_LVL_CTRL_5 +287 0x0012 //TX_NS_LVL_CTRL_6 288 0x0011 //TX_NS_LVL_CTRL_7 289 0x000F //TX_MIN_GAIN_S_0 -290 0x000F //TX_MIN_GAIN_S_1 -291 0x000D //TX_MIN_GAIN_S_2 +290 0x000D //TX_MIN_GAIN_S_1 +291 0x000F //TX_MIN_GAIN_S_2 292 0x000F //TX_MIN_GAIN_S_3 293 0x000F //TX_MIN_GAIN_S_4 -294 0x000F //TX_MIN_GAIN_S_5 -295 0x0010 //TX_MIN_GAIN_S_6 +294 0x0010 //TX_MIN_GAIN_S_5 +295 0x000F //TX_MIN_GAIN_S_6 296 0x000F //TX_MIN_GAIN_S_7 297 0x4000 //TX_NMOS_SUP 298 0x0000 //TX_NS_MAX_PRI_SNR_TH 299 0x0000 //TX_NMOS_SUP_MENSA 300 0x7FFF //TX_SNRI_SUP_0 -301 0x4000 //TX_SNRI_SUP_1 -302 0x1000 //TX_SNRI_SUP_2 -303 0x4000 //TX_SNRI_SUP_3 -304 0x2400 //TX_SNRI_SUP_4 +301 0x1000 //TX_SNRI_SUP_1 +302 0x4000 //TX_SNRI_SUP_2 +303 0x2400 //TX_SNRI_SUP_3 +304 0x4000 //TX_SNRI_SUP_4 305 0x4000 //TX_SNRI_SUP_5 306 0x4000 //TX_SNRI_SUP_6 307 0x7FFF //TX_SNRI_SUP_7 @@ -2075,19 +2993,19 @@ 312 0x7FFF //TX_A_POST_FILT_0 313 0x2000 //TX_A_POST_FILT_1 314 0x4000 //TX_A_POST_FILT_S_0 -315 0x5000 //TX_A_POST_FILT_S_1 -316 0x2000 //TX_A_POST_FILT_S_2 -317 0x4000 //TX_A_POST_FILT_S_3 -318 0x1000 //TX_A_POST_FILT_S_4 -319 0x3000 //TX_A_POST_FILT_S_5 +315 0x2000 //TX_A_POST_FILT_S_1 +316 0x4000 //TX_A_POST_FILT_S_2 +317 0x1000 //TX_A_POST_FILT_S_3 +318 0x3000 //TX_A_POST_FILT_S_4 +319 0x5000 //TX_A_POST_FILT_S_5 320 0x5000 //TX_A_POST_FILT_S_6 321 0x7000 //TX_A_POST_FILT_S_7 322 0x1000 //TX_B_POST_FILT_0 323 0x1000 //TX_B_POST_FILT_1 324 0x1000 //TX_B_POST_FILT_2 -325 0x1000 //TX_B_POST_FILT_3 -326 0x5000 //TX_B_POST_FILT_4 -327 0x3000 //TX_B_POST_FILT_5 +325 0x5000 //TX_B_POST_FILT_3 +326 0x3000 //TX_B_POST_FILT_4 +327 0x1000 //TX_B_POST_FILT_5 328 0x1000 //TX_B_POST_FILT_6 329 0x2000 //TX_B_POST_FILT_7 330 0x4000 //TX_B_LESSCUT_RTO_S_0 @@ -2100,12 +3018,12 @@ 337 0x7FFF //TX_B_LESSCUT_RTO_S_7 338 0x7E00 //TX_LAMBDA_PFILT 339 0x7D00 //TX_LAMBDA_PFILT_S_0 -340 0x7900 //TX_LAMBDA_PFILT_S_1 -341 0x7400 //TX_LAMBDA_PFILT_S_2 -342 0x7900 //TX_LAMBDA_PFILT_S_3 -343 0x7000 //TX_LAMBDA_PFILT_S_4 +340 0x7400 //TX_LAMBDA_PFILT_S_1 +341 0x7900 //TX_LAMBDA_PFILT_S_2 +342 0x7000 //TX_LAMBDA_PFILT_S_3 +343 0x7D00 //TX_LAMBDA_PFILT_S_4 344 0x7D00 //TX_LAMBDA_PFILT_S_5 -345 0x7D00 //TX_LAMBDA_PFILT_S_6 +345 0x7900 //TX_LAMBDA_PFILT_S_6 346 0x7D00 //TX_LAMBDA_PFILT_S_7 347 0x0200 //TX_K_PEPPER 348 0x0800 //TX_A_PEPPER @@ -2140,10 +3058,10 @@ 377 0x7FFF //TX_NOISE_TH_5_4 378 0x0FA0 //TX_NOISE_TH_6 379 0x000A //TX_MINENOISE_TH -380 0x4000 //TX_MINENOISE_MIC0_TH_MTS -381 0xFFEE //TX_MINENOISE_MIC0_TH_EXP -382 0x6000 //TX_MINENOISE_MIC0_S_TH_MTS -383 0xFFF3 //TX_MINENOISE_MIC0_S_TH_EXP +380 0x4000 //TX_MORENS_TFMASK_TH +381 0xFFEE //TX_DRC_QUIET_FLOOR +382 0x6000 //TX_RATIODTL_CUT_TH +383 0xFFF3 //TX_DT_CUT_K1 384 0x0666 //TX_OUT_ENER_S_TH_CLEAN 385 0x0666 //TX_OUT_ENER_S_TH_LESSCLEAN 386 0x0333 //TX_OUT_ENER_S_TH_NOISY @@ -2151,15 +3069,15 @@ 388 0x1000 //TX_OUT_ENER_TH_SPEECH 389 0x2000 //TX_SN_NPB_GAIN 390 0x0000 //TX_NN_NPB_GAIN -391 0x0000 //TX_CSX_ALPHA_0 -392 0x0000 //TX_CSX_ALPHA_1 -393 0x0000 //TX_CSX_ALPHA_2 -394 0x0000 //TX_CSX_ALPHA_3 -395 0x0800 //TX_MU_ARSP_EST -396 0x00C8 //TX_P_OUTBEAM_MIN_TH +391 0x0000 //TX_POST_MASK_SUP_HSNE +392 0x0000 //TX_TAIL_DET_TH +393 0x0000 //TX_B_LESSCUT_RTO_WTA +394 0x0000 //TX_MEL_G_R +395 0x0800 //TX_SUPHIGH_TH +396 0x00C8 //TX_MASK_G_R 397 0x0002 //TX_EXTRA_NS_L -398 0x0800 //TX_EXTRA_NS_A -399 0x0005 //TX_VR_NOISE_FLOOR_TH +398 0x0800 //TX_C_POST_FLT_MASK +399 0x0005 //TX_A_POST_FLT_WNS 400 0x0148 //TX_MIN_G_LOW300HZ 401 0x0001 //TX_MAXLEVEL_CNG 402 0x00B4 //TX_STN_NOISE_TH @@ -2274,16 +3192,16 @@ 511 0x6666 //TX_MIC_TO_BFGAIN 512 0x0000 //TX_MICTOBFGAIN0 513 0x0000 //TX_FASTMUE_TH -514 0x0000 //TX_DERVB_LEN_0 -515 0x0000 //TX_DERVB_LEN_1 -516 0x0000 //TX_RHO_DERVB -517 0x0000 //TX_MIC_INDX_DERVB -518 0x0000 //TX_MU_DERVB -519 0x0000 //TX_DR_RESRV_0 -520 0x0000 //TX_DR_RESRV_1 -521 0x0000 //TX_DR_RESRV_2 -522 0x0000 //TX_DR_RESRV_3 -523 0x0000 //TX_DR_RESRV_4 +514 0x0000 //TX_DEREVERB_LF_MU +515 0x0000 //TX_DEREVERB_HF_MU +516 0x0000 //TX_DEREVERB_DELAY +517 0x0000 //TX_DEREVERB_COEF_LEN +518 0x0000 //TX_DEREVERB_DNR +519 0x0000 //TX_DEREVERB_ALPHA +520 0x0000 //TX_DEREVERB_BETA +521 0x0000 //TX_GSC_RTOL_TH +522 0x0000 //TX_GSC_RTOH_TH +523 0x0000 //TX_WIDE2_MEANHTH 524 0x0000 //TX_DR_RESRV_5 525 0x0000 //TX_DR_RESRV_6 526 0x0000 //TX_DR_RESRV_7 @@ -2657,8 +3575,73 @@ 894 0xC000 //TX_FASTNS_SSA_THHFL 895 0xCCCC //TX_FASTNS_SSA_THLFH 896 0xD999 //TX_FASTNS_SSA_THHFH +897 0x0000 //TX_SENDFUNC_REG_MICMUTE +898 0x0000 //TX_SENDFUNC_REG_MICMUTE1 +899 0x0000 //TX_MICMUTE_RATIO_THR +900 0x0000 //TX_MICMUTE_AMP_THR +901 0x0000 //TX_MICMUTE_HPF_IND +902 0x0000 //TX_MICMUTE_LOG_EYR_TH +903 0x0000 //TX_MICMUTE_CVG_TIME +904 0x0000 //TX_MICMUTE_RELEASE_TIME +905 0x0000 //TX_MIC_VOLUME_MIC0MUTE +906 0x0000 //TX_MICMUTE_EPD_OFFSET_0 +907 0x0000 //TX_MICMUTE_FRQ_AEC_L +908 0x0000 //TX_MICMUTE_EAD_THR +909 0x0000 //TX_MICMUTE_LAMBDA_CB_NLE +910 0x0000 //TX_MICMUTE_LAMBDA_RE_EST +911 0x0000 //TX_DTD_THR1_MICMUTE_0 +912 0x0000 //TX_DTD_THR1_MICMUTE_1 +913 0x0000 //TX_DTD_THR1_MICMUTE_2 +914 0x0000 //TX_DTD_THR1_MICMUTE_3 +915 0x0000 //TX_DTD_THR2_MICMUTE_0 +916 0x0000 //TX_MICMUTE_MIN_EQ_RE_EST_0 +917 0x0000 //TX_MICMUTE_MIN_EQ_RE_EST_1 +918 0x0000 //TX_MICMUTE_MIN_EQ_RE_EST_2 +919 0x0000 //TX_MICMUTE_MIN_EQ_RE_EST_3 +920 0x0000 //TX_MICMUTE_MIN_EQ_RE_EST_4 +921 0x0000 //TX_MICMUTE_C_POST_FLT +922 0x0000 //TX_MICMUTE_DT_CUT_K +923 0x0000 //TX_MICMUTE_DT_CUT_THR +924 0x0000 //TX_MICMUTE_DT_CUT_K2 +925 0x0000 //TX_MICMUTE_DT_CUT_THR2 +926 0x0000 //TX_MICMUTE_DT2_HOLD_N +927 0x0000 //TX_MICMUTE_RATIODTH_THCUT +928 0x0000 //TX_MICMUTE_B_POST_FLT_ECHOL +929 0x0000 //TX_MICMUTE_B_POST_FLT_ECHOH +930 0x0000 //TX_MICMUTE_C_POST_FLT_MASK +931 0x0000 //TX_MICMUTE_RATIODTL_CUT_TH +932 0x0000 //TX_MICMUTE_DT_CUT_K1 +933 0x0000 //TX_MICMUTE_N2_SN_EST +934 0x0000 //TX_MICMUTE_THR_SN_EST_0 +935 0x0000 //TX_MICMUTE_MIN_G_CTRL_0 +936 0x0000 //TX_MICMUTE_A_POST_FILT_S_0 +937 0x0000 //TX_MICMUTE_B_POST_FILT_0 +938 0x0000 //TX_MIC1RUB_AMP_THR +939 0x0000 //TX_MIC1MUTE_RATIO_THR +940 0x0000 //TX_MIC1MUTE_AMP_THR +941 0x0000 //TX_MIC1MUTE_CVG_TIME +942 0x0000 //TX_MIC1MUTE_RELEASE_TIME +943 0x0000 //TX_AMS_RESRV_01 +944 0x0000 //TX_AMS_RESRV_02 +945 0x0000 //TX_AMS_RESRV_03 +946 0x0000 //TX_AMS_RESRV_04 +947 0x0000 //TX_AMS_RESRV_05 +948 0x0000 //TX_AMS_RESRV_06 +949 0x0000 //TX_AMS_RESRV_07 +950 0x0000 //TX_AMS_RESRV_08 +951 0x0000 //TX_AMS_RESRV_09 +952 0x0000 //TX_AMS_RESRV_10 +953 0x0000 //TX_AMS_RESRV_11 +954 0x0000 //TX_AMS_RESRV_12 +955 0x0000 //TX_AMS_RESRV_13 +956 0x0000 //TX_AMS_RESRV_14 +957 0x0000 //TX_AMS_RESRV_15 +958 0x0000 //TX_AMS_RESRV_16 +959 0x0000 //TX_AMS_RESRV_17 +960 0x0000 //TX_AMS_RESRV_18 +961 0x0000 //TX_AMS_RESRV_19 #RX -0 0x006C //RX_RECVFUNC_MODE_0 +0 0x206C //RX_RECVFUNC_MODE_0 1 0x0000 //RX_RECVFUNC_MODE_1 2 0x0000 //RX_SAMPLINGFREQ_SIG 3 0x0000 //RX_SAMPLINGFREQ_PROC @@ -3508,10 +4491,862 @@ 110 0x0000 //RX_FDDRC_RESRV_0 129 0x0100 //RX_SPK_VOL 130 0x0000 //RX_VOL_RESRV_0 +#RX 2 +157 0x206C //RX_RECVFUNC_MODE_0 +158 0x0000 //RX_RECVFUNC_MODE_1 +159 0x0000 //RX_SAMPLINGFREQ_SIG +160 0x0000 //RX_SAMPLINGFREQ_PROC +161 0x000A //RX_FRAME_SZ +162 0x0000 //RX_DELAY_OPT +163 0x3000 //RX_TDDRC_ALPHA_UP_1 +164 0x3000 //RX_TDDRC_ALPHA_UP_2 +165 0x3000 //RX_TDDRC_ALPHA_UP_3 +166 0x3000 //RX_TDDRC_ALPHA_UP_4 +167 0x0800 //RX_PGA +168 0x7FFF //RX_A_HP +169 0x0000 //RX_B_PE +170 0x3800 //RX_THR_PITCH_DET_0 +171 0x3000 //RX_THR_PITCH_DET_1 +172 0x2800 //RX_THR_PITCH_DET_2 +173 0x0008 //RX_PITCH_BFR_LEN +174 0x0003 //RX_SBD_PITCH_DET +175 0x0100 //RX_PP_RESRV_0 +176 0x0020 //RX_PP_RESRV_1 +177 0x0600 //RX_N_SN_EST +178 0x000C //RX_N2_SN_EST +179 0x0010 //RX_NS_LVL_CTRL +180 0xF800 //RX_THR_SN_EST +181 0x7CCD //RX_LAMBDA_PFILT +182 0x000A //RX_FENS_RESRV_0 +183 0x0190 //RX_FENS_RESRV_1 +184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +187 0x0002 //RX_EXTRA_NS_L +188 0x0800 //RX_EXTRA_NS_A +189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +190 0x7FFF //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +192 0x199A //RX_A_POST_FLT +193 0x0000 //RX_LMT_THRD +194 0x4000 //RX_LMT_ALPHA +195 0x0014 //RX_FDEQ_SUBNUM +196 0x4848 //RX_FDEQ_GAIN_0 +197 0x4848 //RX_FDEQ_GAIN_1 +198 0x4848 //RX_FDEQ_GAIN_2 +199 0x4848 //RX_FDEQ_GAIN_3 +200 0x4848 //RX_FDEQ_GAIN_4 +201 0x4848 //RX_FDEQ_GAIN_5 +202 0x4444 //RX_FDEQ_GAIN_6 +203 0x4040 //RX_FDEQ_GAIN_7 +204 0x4040 //RX_FDEQ_GAIN_8 +205 0x4040 //RX_FDEQ_GAIN_9 +206 0x4848 //RX_FDEQ_GAIN_10 +207 0x4848 //RX_FDEQ_GAIN_11 +208 0x4848 //RX_FDEQ_GAIN_12 +209 0x4848 //RX_FDEQ_GAIN_13 +210 0x4848 //RX_FDEQ_GAIN_14 +211 0x4848 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0202 //RX_FDEQ_BIN_0 +221 0x0203 //RX_FDEQ_BIN_1 +222 0x0303 //RX_FDEQ_BIN_2 +223 0x0304 //RX_FDEQ_BIN_3 +224 0x0405 //RX_FDEQ_BIN_4 +225 0x0506 //RX_FDEQ_BIN_5 +226 0x0708 //RX_FDEQ_BIN_6 +227 0x090A //RX_FDEQ_BIN_7 +228 0x0B0C //RX_FDEQ_BIN_8 +229 0x0D0E //RX_FDEQ_BIN_9 +230 0x0000 //RX_FDEQ_BIN_10 +231 0x0000 //RX_FDEQ_BIN_11 +232 0x0000 //RX_FDEQ_BIN_12 +233 0x0000 //RX_FDEQ_BIN_13 +234 0x0000 //RX_FDEQ_BIN_14 +235 0x0000 //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x4000 //RX_FDEQ_RESRV_0 +245 0x0320 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0030 //RX_FDDRC_BAND_MARGIN_1 +248 0x0050 //RX_FDDRC_BAND_MARGIN_2 +249 0x0080 //RX_FDDRC_BAND_MARGIN_3 +250 0x0007 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x5000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x6400 //RX_FDDRC_THRD_3_2 +258 0x6400 //RX_FDDRC_THRD_3_3 +259 0x2000 //RX_FDDRC_SLANT_0_0 +260 0x2000 //RX_FDDRC_SLANT_0_1 +261 0x2000 //RX_FDDRC_SLANT_0_2 +262 0x2000 //RX_FDDRC_SLANT_0_3 +263 0x5333 //RX_FDDRC_SLANT_1_0 +264 0x5333 //RX_FDDRC_SLANT_1_1 +265 0x5333 //RX_FDDRC_SLANT_1_2 +266 0x5333 //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +268 0x0000 //RX_FILTINDX +269 0x0000 //RX_TDDRC_THRD_0 +270 0x0000 //RX_TDDRC_THRD_1 +271 0x7FFF //RX_TDDRC_THRD_2 +272 0x7FFF //RX_TDDRC_THRD_3 +273 0x7FFF //RX_TDDRC_SLANT_0 +274 0x7EB8 //RX_TDDRC_SLANT_1 +275 0x3000 //RX_TDDRC_ALPHA_UP_0 +276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x199A //RX_TDDRC_HMNC_GAIN +279 0x0001 //RX_TDDRC_SMT_FLAG +280 0x0CCD //RX_TDDRC_SMT_W +281 0x017F //RX_TDDRC_DRC_GAIN +282 0x7C00 //RX_LAMBDA_PKA_FP +283 0x2000 //RX_TPKA_FP +284 0x2000 //RX_MIN_G_FP +285 0x0080 //RX_MAX_G_FP +286 0x0100 //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 +288 0x0000 //RX_MAXLEVEL_CNG +289 0x3000 //RX_BWE_UV_TH +290 0x3000 //RX_BWE_UV_TH2 +291 0x1800 //RX_BWE_UV_TH3 +292 0x1000 //RX_BWE_V_TH +293 0x04CD //RX_BWE_GAIN1_V_TH1 +294 0x0F33 //RX_BWE_GAIN1_V_TH2 +295 0x7333 //RX_BWE_UV_EQ +296 0x199A //RX_BWE_V_EQ +297 0x7333 //RX_BWE_TONE_TH +298 0x0004 //RX_BWE_UV_HOLD_T +299 0x6CCD //RX_BWE_GAIN2_ALPHA +300 0x799A //RX_BWE_GAIN3_ALPHA +301 0x001E //RX_BWE_CUTOFF +302 0x3000 //RX_BWE_GAINFILL +303 0x3200 //RX_BWE_MAXTH_TONE +304 0x2000 //RX_BWE_EQ_0 +305 0x2000 //RX_BWE_EQ_1 +306 0x2000 //RX_BWE_EQ_2 +307 0x2000 //RX_BWE_EQ_3 +308 0x2000 //RX_BWE_EQ_4 +309 0x2000 //RX_BWE_EQ_5 +310 0x2000 //RX_BWE_EQ_6 +311 0x0000 //RX_BWE_RESRV_0 +312 0x0000 //RX_BWE_RESRV_1 +313 0x0000 //RX_BWE_RESRV_2 +#VOL 0 +163 0x3000 //RX_TDDRC_ALPHA_UP_1 +164 0x3000 //RX_TDDRC_ALPHA_UP_2 +165 0x3000 //RX_TDDRC_ALPHA_UP_3 +166 0x3000 //RX_TDDRC_ALPHA_UP_4 +184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +190 0x7FFF //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +269 0x0000 //RX_TDDRC_THRD_0 +270 0x0000 //RX_TDDRC_THRD_1 +271 0x7FFF //RX_TDDRC_THRD_2 +272 0x7FFF //RX_TDDRC_THRD_3 +273 0x7FFF //RX_TDDRC_SLANT_0 +274 0x7EB8 //RX_TDDRC_SLANT_1 +275 0x3000 //RX_TDDRC_ALPHA_UP_0 +276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x199A //RX_TDDRC_HMNC_GAIN +279 0x0001 //RX_TDDRC_SMT_FLAG +280 0x0CCD //RX_TDDRC_SMT_W +281 0x017F //RX_TDDRC_DRC_GAIN +195 0x0014 //RX_FDEQ_SUBNUM +196 0x4848 //RX_FDEQ_GAIN_0 +197 0x4848 //RX_FDEQ_GAIN_1 +198 0x4848 //RX_FDEQ_GAIN_2 +199 0x4848 //RX_FDEQ_GAIN_3 +200 0x4848 //RX_FDEQ_GAIN_4 +201 0x4848 //RX_FDEQ_GAIN_5 +202 0x4444 //RX_FDEQ_GAIN_6 +203 0x4040 //RX_FDEQ_GAIN_7 +204 0x4040 //RX_FDEQ_GAIN_8 +205 0x4040 //RX_FDEQ_GAIN_9 +206 0x4848 //RX_FDEQ_GAIN_10 +207 0x4848 //RX_FDEQ_GAIN_11 +208 0x4848 //RX_FDEQ_GAIN_12 +209 0x4848 //RX_FDEQ_GAIN_13 +210 0x4848 //RX_FDEQ_GAIN_14 +211 0x4848 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0202 //RX_FDEQ_BIN_0 +221 0x0203 //RX_FDEQ_BIN_1 +222 0x0303 //RX_FDEQ_BIN_2 +223 0x0304 //RX_FDEQ_BIN_3 +224 0x0405 //RX_FDEQ_BIN_4 +225 0x0506 //RX_FDEQ_BIN_5 +226 0x0708 //RX_FDEQ_BIN_6 +227 0x090A //RX_FDEQ_BIN_7 +228 0x0B0C //RX_FDEQ_BIN_8 +229 0x0D0E //RX_FDEQ_BIN_9 +230 0x0000 //RX_FDEQ_BIN_10 +231 0x0000 //RX_FDEQ_BIN_11 +232 0x0000 //RX_FDEQ_BIN_12 +233 0x0000 //RX_FDEQ_BIN_13 +234 0x0000 //RX_FDEQ_BIN_14 +235 0x0000 //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x4000 //RX_FDEQ_RESRV_0 +245 0x0320 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0030 //RX_FDDRC_BAND_MARGIN_1 +248 0x0050 //RX_FDDRC_BAND_MARGIN_2 +249 0x0080 //RX_FDDRC_BAND_MARGIN_3 +250 0x0007 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x5000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x6400 //RX_FDDRC_THRD_3_2 +258 0x6400 //RX_FDDRC_THRD_3_3 +259 0x2000 //RX_FDDRC_SLANT_0_0 +260 0x2000 //RX_FDDRC_SLANT_0_1 +261 0x2000 //RX_FDDRC_SLANT_0_2 +262 0x2000 //RX_FDDRC_SLANT_0_3 +263 0x5333 //RX_FDDRC_SLANT_1_0 +264 0x5333 //RX_FDDRC_SLANT_1_1 +265 0x5333 //RX_FDDRC_SLANT_1_2 +266 0x5333 //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +286 0x0100 //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 +#VOL 1 +163 0x3000 //RX_TDDRC_ALPHA_UP_1 +164 0x3000 //RX_TDDRC_ALPHA_UP_2 +165 0x3000 //RX_TDDRC_ALPHA_UP_3 +166 0x3000 //RX_TDDRC_ALPHA_UP_4 +184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +190 0x7FFF //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +269 0x0000 //RX_TDDRC_THRD_0 +270 0x0000 //RX_TDDRC_THRD_1 +271 0x7FFF //RX_TDDRC_THRD_2 +272 0x7FFF //RX_TDDRC_THRD_3 +273 0x7FFF //RX_TDDRC_SLANT_0 +274 0x7EB8 //RX_TDDRC_SLANT_1 +275 0x3000 //RX_TDDRC_ALPHA_UP_0 +276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x199A //RX_TDDRC_HMNC_GAIN +279 0x0001 //RX_TDDRC_SMT_FLAG +280 0x0CCD //RX_TDDRC_SMT_W +281 0x017F //RX_TDDRC_DRC_GAIN +195 0x0014 //RX_FDEQ_SUBNUM +196 0x4848 //RX_FDEQ_GAIN_0 +197 0x4848 //RX_FDEQ_GAIN_1 +198 0x4848 //RX_FDEQ_GAIN_2 +199 0x4848 //RX_FDEQ_GAIN_3 +200 0x4848 //RX_FDEQ_GAIN_4 +201 0x4848 //RX_FDEQ_GAIN_5 +202 0x4444 //RX_FDEQ_GAIN_6 +203 0x4040 //RX_FDEQ_GAIN_7 +204 0x4040 //RX_FDEQ_GAIN_8 +205 0x4040 //RX_FDEQ_GAIN_9 +206 0x4848 //RX_FDEQ_GAIN_10 +207 0x4848 //RX_FDEQ_GAIN_11 +208 0x4848 //RX_FDEQ_GAIN_12 +209 0x4848 //RX_FDEQ_GAIN_13 +210 0x4848 //RX_FDEQ_GAIN_14 +211 0x4848 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0202 //RX_FDEQ_BIN_0 +221 0x0203 //RX_FDEQ_BIN_1 +222 0x0303 //RX_FDEQ_BIN_2 +223 0x0304 //RX_FDEQ_BIN_3 +224 0x0405 //RX_FDEQ_BIN_4 +225 0x0506 //RX_FDEQ_BIN_5 +226 0x0708 //RX_FDEQ_BIN_6 +227 0x090A //RX_FDEQ_BIN_7 +228 0x0B0C //RX_FDEQ_BIN_8 +229 0x0D0E //RX_FDEQ_BIN_9 +230 0x0000 //RX_FDEQ_BIN_10 +231 0x0000 //RX_FDEQ_BIN_11 +232 0x0000 //RX_FDEQ_BIN_12 +233 0x0000 //RX_FDEQ_BIN_13 +234 0x0000 //RX_FDEQ_BIN_14 +235 0x0000 //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x4000 //RX_FDEQ_RESRV_0 +245 0x0320 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0030 //RX_FDDRC_BAND_MARGIN_1 +248 0x0050 //RX_FDDRC_BAND_MARGIN_2 +249 0x0080 //RX_FDDRC_BAND_MARGIN_3 +250 0x0007 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x5000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x6400 //RX_FDDRC_THRD_3_2 +258 0x6400 //RX_FDDRC_THRD_3_3 +259 0x2000 //RX_FDDRC_SLANT_0_0 +260 0x2000 //RX_FDDRC_SLANT_0_1 +261 0x2000 //RX_FDDRC_SLANT_0_2 +262 0x2000 //RX_FDDRC_SLANT_0_3 +263 0x5333 //RX_FDDRC_SLANT_1_0 +264 0x5333 //RX_FDDRC_SLANT_1_1 +265 0x5333 //RX_FDDRC_SLANT_1_2 +266 0x5333 //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +286 0x0100 //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 +#VOL 2 +163 0x3000 //RX_TDDRC_ALPHA_UP_1 +164 0x3000 //RX_TDDRC_ALPHA_UP_2 +165 0x3000 //RX_TDDRC_ALPHA_UP_3 +166 0x3000 //RX_TDDRC_ALPHA_UP_4 +184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +190 0x7FFF //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +269 0x0000 //RX_TDDRC_THRD_0 +270 0x0000 //RX_TDDRC_THRD_1 +271 0x7FFF //RX_TDDRC_THRD_2 +272 0x7FFF //RX_TDDRC_THRD_3 +273 0x7FFF //RX_TDDRC_SLANT_0 +274 0x7EB8 //RX_TDDRC_SLANT_1 +275 0x3000 //RX_TDDRC_ALPHA_UP_0 +276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x199A //RX_TDDRC_HMNC_GAIN +279 0x0001 //RX_TDDRC_SMT_FLAG +280 0x0CCD //RX_TDDRC_SMT_W +281 0x017F //RX_TDDRC_DRC_GAIN +195 0x0014 //RX_FDEQ_SUBNUM +196 0x4848 //RX_FDEQ_GAIN_0 +197 0x4848 //RX_FDEQ_GAIN_1 +198 0x4848 //RX_FDEQ_GAIN_2 +199 0x4848 //RX_FDEQ_GAIN_3 +200 0x4848 //RX_FDEQ_GAIN_4 +201 0x4848 //RX_FDEQ_GAIN_5 +202 0x4444 //RX_FDEQ_GAIN_6 +203 0x4040 //RX_FDEQ_GAIN_7 +204 0x4040 //RX_FDEQ_GAIN_8 +205 0x4040 //RX_FDEQ_GAIN_9 +206 0x4848 //RX_FDEQ_GAIN_10 +207 0x4848 //RX_FDEQ_GAIN_11 +208 0x4848 //RX_FDEQ_GAIN_12 +209 0x4848 //RX_FDEQ_GAIN_13 +210 0x4848 //RX_FDEQ_GAIN_14 +211 0x4848 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0202 //RX_FDEQ_BIN_0 +221 0x0203 //RX_FDEQ_BIN_1 +222 0x0303 //RX_FDEQ_BIN_2 +223 0x0304 //RX_FDEQ_BIN_3 +224 0x0405 //RX_FDEQ_BIN_4 +225 0x0506 //RX_FDEQ_BIN_5 +226 0x0708 //RX_FDEQ_BIN_6 +227 0x090A //RX_FDEQ_BIN_7 +228 0x0B0C //RX_FDEQ_BIN_8 +229 0x0D0E //RX_FDEQ_BIN_9 +230 0x0000 //RX_FDEQ_BIN_10 +231 0x0000 //RX_FDEQ_BIN_11 +232 0x0000 //RX_FDEQ_BIN_12 +233 0x0000 //RX_FDEQ_BIN_13 +234 0x0000 //RX_FDEQ_BIN_14 +235 0x0000 //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x4000 //RX_FDEQ_RESRV_0 +245 0x0320 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0030 //RX_FDDRC_BAND_MARGIN_1 +248 0x0050 //RX_FDDRC_BAND_MARGIN_2 +249 0x0080 //RX_FDDRC_BAND_MARGIN_3 +250 0x0007 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x5000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x6400 //RX_FDDRC_THRD_3_2 +258 0x6400 //RX_FDDRC_THRD_3_3 +259 0x2000 //RX_FDDRC_SLANT_0_0 +260 0x2000 //RX_FDDRC_SLANT_0_1 +261 0x2000 //RX_FDDRC_SLANT_0_2 +262 0x2000 //RX_FDDRC_SLANT_0_3 +263 0x5333 //RX_FDDRC_SLANT_1_0 +264 0x5333 //RX_FDDRC_SLANT_1_1 +265 0x5333 //RX_FDDRC_SLANT_1_2 +266 0x5333 //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +286 0x0100 //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 +#VOL 3 +163 0x3000 //RX_TDDRC_ALPHA_UP_1 +164 0x3000 //RX_TDDRC_ALPHA_UP_2 +165 0x3000 //RX_TDDRC_ALPHA_UP_3 +166 0x3000 //RX_TDDRC_ALPHA_UP_4 +184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +190 0x7FFF //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +269 0x0000 //RX_TDDRC_THRD_0 +270 0x0000 //RX_TDDRC_THRD_1 +271 0x7FFF //RX_TDDRC_THRD_2 +272 0x7FFF //RX_TDDRC_THRD_3 +273 0x7FFF //RX_TDDRC_SLANT_0 +274 0x7EB8 //RX_TDDRC_SLANT_1 +275 0x3000 //RX_TDDRC_ALPHA_UP_0 +276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x199A //RX_TDDRC_HMNC_GAIN +279 0x0001 //RX_TDDRC_SMT_FLAG +280 0x0CCD //RX_TDDRC_SMT_W +281 0x017F //RX_TDDRC_DRC_GAIN +195 0x0014 //RX_FDEQ_SUBNUM +196 0x4848 //RX_FDEQ_GAIN_0 +197 0x4848 //RX_FDEQ_GAIN_1 +198 0x4848 //RX_FDEQ_GAIN_2 +199 0x4848 //RX_FDEQ_GAIN_3 +200 0x4848 //RX_FDEQ_GAIN_4 +201 0x4848 //RX_FDEQ_GAIN_5 +202 0x4444 //RX_FDEQ_GAIN_6 +203 0x4040 //RX_FDEQ_GAIN_7 +204 0x4040 //RX_FDEQ_GAIN_8 +205 0x4040 //RX_FDEQ_GAIN_9 +206 0x4848 //RX_FDEQ_GAIN_10 +207 0x4848 //RX_FDEQ_GAIN_11 +208 0x4848 //RX_FDEQ_GAIN_12 +209 0x4848 //RX_FDEQ_GAIN_13 +210 0x4848 //RX_FDEQ_GAIN_14 +211 0x4848 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0202 //RX_FDEQ_BIN_0 +221 0x0203 //RX_FDEQ_BIN_1 +222 0x0303 //RX_FDEQ_BIN_2 +223 0x0304 //RX_FDEQ_BIN_3 +224 0x0405 //RX_FDEQ_BIN_4 +225 0x0506 //RX_FDEQ_BIN_5 +226 0x0708 //RX_FDEQ_BIN_6 +227 0x090A //RX_FDEQ_BIN_7 +228 0x0B0C //RX_FDEQ_BIN_8 +229 0x0D0E //RX_FDEQ_BIN_9 +230 0x0000 //RX_FDEQ_BIN_10 +231 0x0000 //RX_FDEQ_BIN_11 +232 0x0000 //RX_FDEQ_BIN_12 +233 0x0000 //RX_FDEQ_BIN_13 +234 0x0000 //RX_FDEQ_BIN_14 +235 0x0000 //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x4000 //RX_FDEQ_RESRV_0 +245 0x0320 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0030 //RX_FDDRC_BAND_MARGIN_1 +248 0x0050 //RX_FDDRC_BAND_MARGIN_2 +249 0x0080 //RX_FDDRC_BAND_MARGIN_3 +250 0x0007 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x5000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x6400 //RX_FDDRC_THRD_3_2 +258 0x6400 //RX_FDDRC_THRD_3_3 +259 0x2000 //RX_FDDRC_SLANT_0_0 +260 0x2000 //RX_FDDRC_SLANT_0_1 +261 0x2000 //RX_FDDRC_SLANT_0_2 +262 0x2000 //RX_FDDRC_SLANT_0_3 +263 0x5333 //RX_FDDRC_SLANT_1_0 +264 0x5333 //RX_FDDRC_SLANT_1_1 +265 0x5333 //RX_FDDRC_SLANT_1_2 +266 0x5333 //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +286 0x0100 //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 +#VOL 4 +163 0x3000 //RX_TDDRC_ALPHA_UP_1 +164 0x3000 //RX_TDDRC_ALPHA_UP_2 +165 0x3000 //RX_TDDRC_ALPHA_UP_3 +166 0x3000 //RX_TDDRC_ALPHA_UP_4 +184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +190 0x7FFF //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +269 0x0000 //RX_TDDRC_THRD_0 +270 0x0000 //RX_TDDRC_THRD_1 +271 0x7FFF //RX_TDDRC_THRD_2 +272 0x7FFF //RX_TDDRC_THRD_3 +273 0x7FFF //RX_TDDRC_SLANT_0 +274 0x7EB8 //RX_TDDRC_SLANT_1 +275 0x3000 //RX_TDDRC_ALPHA_UP_0 +276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x199A //RX_TDDRC_HMNC_GAIN +279 0x0001 //RX_TDDRC_SMT_FLAG +280 0x0CCD //RX_TDDRC_SMT_W +281 0x017F //RX_TDDRC_DRC_GAIN +195 0x0014 //RX_FDEQ_SUBNUM +196 0x4848 //RX_FDEQ_GAIN_0 +197 0x4848 //RX_FDEQ_GAIN_1 +198 0x4848 //RX_FDEQ_GAIN_2 +199 0x4848 //RX_FDEQ_GAIN_3 +200 0x4848 //RX_FDEQ_GAIN_4 +201 0x4848 //RX_FDEQ_GAIN_5 +202 0x4444 //RX_FDEQ_GAIN_6 +203 0x4040 //RX_FDEQ_GAIN_7 +204 0x4040 //RX_FDEQ_GAIN_8 +205 0x4040 //RX_FDEQ_GAIN_9 +206 0x4848 //RX_FDEQ_GAIN_10 +207 0x4848 //RX_FDEQ_GAIN_11 +208 0x4848 //RX_FDEQ_GAIN_12 +209 0x4848 //RX_FDEQ_GAIN_13 +210 0x4848 //RX_FDEQ_GAIN_14 +211 0x4848 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0202 //RX_FDEQ_BIN_0 +221 0x0203 //RX_FDEQ_BIN_1 +222 0x0303 //RX_FDEQ_BIN_2 +223 0x0304 //RX_FDEQ_BIN_3 +224 0x0405 //RX_FDEQ_BIN_4 +225 0x0506 //RX_FDEQ_BIN_5 +226 0x0708 //RX_FDEQ_BIN_6 +227 0x090A //RX_FDEQ_BIN_7 +228 0x0B0C //RX_FDEQ_BIN_8 +229 0x0D0E //RX_FDEQ_BIN_9 +230 0x0000 //RX_FDEQ_BIN_10 +231 0x0000 //RX_FDEQ_BIN_11 +232 0x0000 //RX_FDEQ_BIN_12 +233 0x0000 //RX_FDEQ_BIN_13 +234 0x0000 //RX_FDEQ_BIN_14 +235 0x0000 //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x4000 //RX_FDEQ_RESRV_0 +245 0x0320 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0030 //RX_FDDRC_BAND_MARGIN_1 +248 0x0050 //RX_FDDRC_BAND_MARGIN_2 +249 0x0080 //RX_FDDRC_BAND_MARGIN_3 +250 0x0007 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x5000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x6400 //RX_FDDRC_THRD_3_2 +258 0x6400 //RX_FDDRC_THRD_3_3 +259 0x2000 //RX_FDDRC_SLANT_0_0 +260 0x2000 //RX_FDDRC_SLANT_0_1 +261 0x2000 //RX_FDDRC_SLANT_0_2 +262 0x2000 //RX_FDDRC_SLANT_0_3 +263 0x5333 //RX_FDDRC_SLANT_1_0 +264 0x5333 //RX_FDDRC_SLANT_1_1 +265 0x5333 //RX_FDDRC_SLANT_1_2 +266 0x5333 //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +286 0x0100 //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 +#VOL 5 +163 0x3000 //RX_TDDRC_ALPHA_UP_1 +164 0x3000 //RX_TDDRC_ALPHA_UP_2 +165 0x3000 //RX_TDDRC_ALPHA_UP_3 +166 0x3000 //RX_TDDRC_ALPHA_UP_4 +184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +190 0x7FFF //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +269 0x0000 //RX_TDDRC_THRD_0 +270 0x0000 //RX_TDDRC_THRD_1 +271 0x7FFF //RX_TDDRC_THRD_2 +272 0x7FFF //RX_TDDRC_THRD_3 +273 0x7FFF //RX_TDDRC_SLANT_0 +274 0x7EB8 //RX_TDDRC_SLANT_1 +275 0x3000 //RX_TDDRC_ALPHA_UP_0 +276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x199A //RX_TDDRC_HMNC_GAIN +279 0x0001 //RX_TDDRC_SMT_FLAG +280 0x0CCD //RX_TDDRC_SMT_W +281 0x017F //RX_TDDRC_DRC_GAIN +195 0x0014 //RX_FDEQ_SUBNUM +196 0x4848 //RX_FDEQ_GAIN_0 +197 0x4848 //RX_FDEQ_GAIN_1 +198 0x4848 //RX_FDEQ_GAIN_2 +199 0x4848 //RX_FDEQ_GAIN_3 +200 0x4848 //RX_FDEQ_GAIN_4 +201 0x4848 //RX_FDEQ_GAIN_5 +202 0x4444 //RX_FDEQ_GAIN_6 +203 0x4040 //RX_FDEQ_GAIN_7 +204 0x4040 //RX_FDEQ_GAIN_8 +205 0x4040 //RX_FDEQ_GAIN_9 +206 0x4848 //RX_FDEQ_GAIN_10 +207 0x4848 //RX_FDEQ_GAIN_11 +208 0x4848 //RX_FDEQ_GAIN_12 +209 0x4848 //RX_FDEQ_GAIN_13 +210 0x4848 //RX_FDEQ_GAIN_14 +211 0x4848 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0202 //RX_FDEQ_BIN_0 +221 0x0203 //RX_FDEQ_BIN_1 +222 0x0303 //RX_FDEQ_BIN_2 +223 0x0304 //RX_FDEQ_BIN_3 +224 0x0405 //RX_FDEQ_BIN_4 +225 0x0506 //RX_FDEQ_BIN_5 +226 0x0708 //RX_FDEQ_BIN_6 +227 0x090A //RX_FDEQ_BIN_7 +228 0x0B0C //RX_FDEQ_BIN_8 +229 0x0D0E //RX_FDEQ_BIN_9 +230 0x0000 //RX_FDEQ_BIN_10 +231 0x0000 //RX_FDEQ_BIN_11 +232 0x0000 //RX_FDEQ_BIN_12 +233 0x0000 //RX_FDEQ_BIN_13 +234 0x0000 //RX_FDEQ_BIN_14 +235 0x0000 //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x4000 //RX_FDEQ_RESRV_0 +245 0x0320 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0030 //RX_FDDRC_BAND_MARGIN_1 +248 0x0050 //RX_FDDRC_BAND_MARGIN_2 +249 0x0080 //RX_FDDRC_BAND_MARGIN_3 +250 0x0007 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x5000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x6400 //RX_FDDRC_THRD_3_2 +258 0x6400 //RX_FDDRC_THRD_3_3 +259 0x2000 //RX_FDDRC_SLANT_0_0 +260 0x2000 //RX_FDDRC_SLANT_0_1 +261 0x2000 //RX_FDDRC_SLANT_0_2 +262 0x2000 //RX_FDDRC_SLANT_0_3 +263 0x5333 //RX_FDDRC_SLANT_1_0 +264 0x5333 //RX_FDDRC_SLANT_1_1 +265 0x5333 //RX_FDDRC_SLANT_1_2 +266 0x5333 //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +286 0x0100 //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 +#VOL 6 +163 0x3000 //RX_TDDRC_ALPHA_UP_1 +164 0x3000 //RX_TDDRC_ALPHA_UP_2 +165 0x3000 //RX_TDDRC_ALPHA_UP_3 +166 0x3000 //RX_TDDRC_ALPHA_UP_4 +184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +190 0x7FFF //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +269 0x0000 //RX_TDDRC_THRD_0 +270 0x0000 //RX_TDDRC_THRD_1 +271 0x7FFF //RX_TDDRC_THRD_2 +272 0x7FFF //RX_TDDRC_THRD_3 +273 0x7FFF //RX_TDDRC_SLANT_0 +274 0x7EB8 //RX_TDDRC_SLANT_1 +275 0x3000 //RX_TDDRC_ALPHA_UP_0 +276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x199A //RX_TDDRC_HMNC_GAIN +279 0x0001 //RX_TDDRC_SMT_FLAG +280 0x0CCD //RX_TDDRC_SMT_W +281 0x017F //RX_TDDRC_DRC_GAIN +195 0x0014 //RX_FDEQ_SUBNUM +196 0x4848 //RX_FDEQ_GAIN_0 +197 0x4848 //RX_FDEQ_GAIN_1 +198 0x4848 //RX_FDEQ_GAIN_2 +199 0x4848 //RX_FDEQ_GAIN_3 +200 0x4848 //RX_FDEQ_GAIN_4 +201 0x4848 //RX_FDEQ_GAIN_5 +202 0x4444 //RX_FDEQ_GAIN_6 +203 0x4040 //RX_FDEQ_GAIN_7 +204 0x4040 //RX_FDEQ_GAIN_8 +205 0x4040 //RX_FDEQ_GAIN_9 +206 0x4848 //RX_FDEQ_GAIN_10 +207 0x4848 //RX_FDEQ_GAIN_11 +208 0x4848 //RX_FDEQ_GAIN_12 +209 0x4848 //RX_FDEQ_GAIN_13 +210 0x4848 //RX_FDEQ_GAIN_14 +211 0x4848 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0202 //RX_FDEQ_BIN_0 +221 0x0203 //RX_FDEQ_BIN_1 +222 0x0303 //RX_FDEQ_BIN_2 +223 0x0304 //RX_FDEQ_BIN_3 +224 0x0405 //RX_FDEQ_BIN_4 +225 0x0506 //RX_FDEQ_BIN_5 +226 0x0708 //RX_FDEQ_BIN_6 +227 0x090A //RX_FDEQ_BIN_7 +228 0x0B0C //RX_FDEQ_BIN_8 +229 0x0D0E //RX_FDEQ_BIN_9 +230 0x0000 //RX_FDEQ_BIN_10 +231 0x0000 //RX_FDEQ_BIN_11 +232 0x0000 //RX_FDEQ_BIN_12 +233 0x0000 //RX_FDEQ_BIN_13 +234 0x0000 //RX_FDEQ_BIN_14 +235 0x0000 //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x4000 //RX_FDEQ_RESRV_0 +245 0x0320 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0030 //RX_FDDRC_BAND_MARGIN_1 +248 0x0050 //RX_FDDRC_BAND_MARGIN_2 +249 0x0080 //RX_FDDRC_BAND_MARGIN_3 +250 0x0007 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x5000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x6400 //RX_FDDRC_THRD_3_2 +258 0x6400 //RX_FDDRC_THRD_3_3 +259 0x2000 //RX_FDDRC_SLANT_0_0 +260 0x2000 //RX_FDDRC_SLANT_0_1 +261 0x2000 //RX_FDDRC_SLANT_0_2 +262 0x2000 //RX_FDDRC_SLANT_0_3 +263 0x5333 //RX_FDDRC_SLANT_1_0 +264 0x5333 //RX_FDDRC_SLANT_1_1 +265 0x5333 //RX_FDDRC_SLANT_1_2 +266 0x5333 //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +286 0x0100 //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 #CASE_NAME BLUETOOTH-BT_HAC-VOICE_GENERIC-WB -#PARAM_TYPE TX+RX -#TOTAL_CUSTOM_STEP 7 +#PARAM_MODE FULL +#PARAM_TYPE TX+2RX +#TOTAL_CUSTOM_STEP 7+7 #TX 0 0x0001 //TX_OPERATION_MODE_0 1 0x0001 //TX_OPERATION_MODE_1 @@ -3764,11 +5599,11 @@ 248 0xF800 //TX_THR_SN_EST_6 249 0xF800 //TX_THR_SN_EST_7 250 0x0100 //TX_DELTA_THR_SN_EST_0 -251 0x0200 //TX_DELTA_THR_SN_EST_1 -252 0x0100 //TX_DELTA_THR_SN_EST_2 -253 0x0200 //TX_DELTA_THR_SN_EST_3 +251 0x0100 //TX_DELTA_THR_SN_EST_1 +252 0x0200 //TX_DELTA_THR_SN_EST_2 +253 0x0100 //TX_DELTA_THR_SN_EST_3 254 0x0100 //TX_DELTA_THR_SN_EST_4 -255 0x0100 //TX_DELTA_THR_SN_EST_5 +255 0x0200 //TX_DELTA_THR_SN_EST_5 256 0x0200 //TX_DELTA_THR_SN_EST_6 257 0x0200 //TX_DELTA_THR_SN_EST_7 258 0x4000 //TX_LAMBDA_NN_EST_0 @@ -3796,11 +5631,11 @@ 280 0x1000 //TX_B_POST_FLT_1 281 0x0010 //TX_NS_LVL_CTRL_0 282 0x0014 //TX_NS_LVL_CTRL_1 -283 0x0014 //TX_NS_LVL_CTRL_2 -284 0x0018 //TX_NS_LVL_CTRL_3 -285 0x0016 //TX_NS_LVL_CTRL_4 -286 0x0014 //TX_NS_LVL_CTRL_5 -287 0x0011 //TX_NS_LVL_CTRL_6 +283 0x0018 //TX_NS_LVL_CTRL_2 +284 0x0016 //TX_NS_LVL_CTRL_3 +285 0x0014 //TX_NS_LVL_CTRL_4 +286 0x0011 //TX_NS_LVL_CTRL_5 +287 0x0014 //TX_NS_LVL_CTRL_6 288 0x0011 //TX_NS_LVL_CTRL_7 289 0x000F //TX_MIN_GAIN_S_0 290 0x0010 //TX_MIN_GAIN_S_1 @@ -3818,8 +5653,8 @@ 302 0x4000 //TX_SNRI_SUP_2 303 0x4000 //TX_SNRI_SUP_3 304 0x4000 //TX_SNRI_SUP_4 -305 0x4000 //TX_SNRI_SUP_5 -306 0x50C0 //TX_SNRI_SUP_6 +305 0x50C0 //TX_SNRI_SUP_5 +306 0x4000 //TX_SNRI_SUP_6 307 0x7FFF //TX_SNRI_SUP_7 308 0x7FFF //TX_THR_LFNS 309 0x0018 //TX_G_LFNS @@ -3828,19 +5663,19 @@ 312 0x7FFF //TX_A_POST_FILT_0 313 0x2000 //TX_A_POST_FILT_1 314 0x5000 //TX_A_POST_FILT_S_0 -315 0x6000 //TX_A_POST_FILT_S_1 -316 0x4C00 //TX_A_POST_FILT_S_2 -317 0x4000 //TX_A_POST_FILT_S_3 -318 0x6000 //TX_A_POST_FILT_S_4 -319 0x4000 //TX_A_POST_FILT_S_5 -320 0x5000 //TX_A_POST_FILT_S_6 +315 0x4C00 //TX_A_POST_FILT_S_1 +316 0x4000 //TX_A_POST_FILT_S_2 +317 0x6000 //TX_A_POST_FILT_S_3 +318 0x4000 //TX_A_POST_FILT_S_4 +319 0x5000 //TX_A_POST_FILT_S_5 +320 0x6000 //TX_A_POST_FILT_S_6 321 0x7000 //TX_A_POST_FILT_S_7 322 0x2000 //TX_B_POST_FILT_0 -323 0x1000 //TX_B_POST_FILT_1 +323 0x2000 //TX_B_POST_FILT_1 324 0x2000 //TX_B_POST_FILT_2 -325 0x2000 //TX_B_POST_FILT_3 +325 0x4000 //TX_B_POST_FILT_3 326 0x4000 //TX_B_POST_FILT_4 -327 0x4000 //TX_B_POST_FILT_5 +327 0x1000 //TX_B_POST_FILT_5 328 0x1000 //TX_B_POST_FILT_6 329 0x2000 //TX_B_POST_FILT_7 330 0x4000 //TX_B_LESSCUT_RTO_S_0 @@ -3848,14 +5683,14 @@ 332 0x7FFF //TX_B_LESSCUT_RTO_S_2 333 0x7FFF //TX_B_LESSCUT_RTO_S_3 334 0x7FFF //TX_B_LESSCUT_RTO_S_4 -335 0x7FFF //TX_B_LESSCUT_RTO_S_5 -336 0x6000 //TX_B_LESSCUT_RTO_S_6 +335 0x6000 //TX_B_LESSCUT_RTO_S_5 +336 0x7FFF //TX_B_LESSCUT_RTO_S_6 337 0x7FFF //TX_B_LESSCUT_RTO_S_7 338 0x7C00 //TX_LAMBDA_PFILT 339 0x7C00 //TX_LAMBDA_PFILT_S_0 340 0x7C00 //TX_LAMBDA_PFILT_S_1 -341 0x7C00 //TX_LAMBDA_PFILT_S_2 -342 0x7A00 //TX_LAMBDA_PFILT_S_3 +341 0x7A00 //TX_LAMBDA_PFILT_S_2 +342 0x7C00 //TX_LAMBDA_PFILT_S_3 343 0x7C00 //TX_LAMBDA_PFILT_S_4 344 0x7C00 //TX_LAMBDA_PFILT_S_5 345 0x7C00 //TX_LAMBDA_PFILT_S_6 @@ -3893,10 +5728,10 @@ 377 0x7FFF //TX_NOISE_TH_5_4 378 0x0F0A //TX_NOISE_TH_6 379 0x0033 //TX_MINENOISE_TH -380 0x4000 //TX_MINENOISE_MIC0_TH_MTS -381 0xFFEE //TX_MINENOISE_MIC0_TH_EXP -382 0x6000 //TX_MINENOISE_MIC0_S_TH_MTS -383 0xFFF3 //TX_MINENOISE_MIC0_S_TH_EXP +380 0x4000 //TX_MORENS_TFMASK_TH +381 0xFFEE //TX_DRC_QUIET_FLOOR +382 0x6000 //TX_RATIODTL_CUT_TH +383 0xFFF3 //TX_DT_CUT_K1 384 0x0666 //TX_OUT_ENER_S_TH_CLEAN 385 0x0666 //TX_OUT_ENER_S_TH_LESSCLEAN 386 0x0333 //TX_OUT_ENER_S_TH_NOISY @@ -3904,15 +5739,15 @@ 388 0x0333 //TX_OUT_ENER_TH_SPEECH 389 0x2000 //TX_SN_NPB_GAIN 390 0x0000 //TX_NN_NPB_GAIN -391 0x0000 //TX_CSX_ALPHA_0 -392 0x0000 //TX_CSX_ALPHA_1 -393 0x0000 //TX_CSX_ALPHA_2 -394 0x0000 //TX_CSX_ALPHA_3 -395 0x0800 //TX_MU_ARSP_EST -396 0x00C8 //TX_P_OUTBEAM_MIN_TH +391 0x0000 //TX_POST_MASK_SUP_HSNE +392 0x0000 //TX_TAIL_DET_TH +393 0x0000 //TX_B_LESSCUT_RTO_WTA +394 0x0000 //TX_MEL_G_R +395 0x0800 //TX_SUPHIGH_TH +396 0x00C8 //TX_MASK_G_R 397 0x0002 //TX_EXTRA_NS_L -398 0x0800 //TX_EXTRA_NS_A -399 0x0005 //TX_VR_NOISE_FLOOR_TH +398 0x0800 //TX_C_POST_FLT_MASK +399 0x0005 //TX_A_POST_FLT_WNS 400 0x0148 //TX_MIN_G_LOW300HZ 401 0x0001 //TX_MAXLEVEL_CNG 402 0x00B4 //TX_STN_NOISE_TH @@ -4027,16 +5862,16 @@ 511 0x6666 //TX_MIC_TO_BFGAIN 512 0x0000 //TX_MICTOBFGAIN0 513 0x0000 //TX_FASTMUE_TH -514 0x0000 //TX_DERVB_LEN_0 -515 0x0000 //TX_DERVB_LEN_1 -516 0x0000 //TX_RHO_DERVB -517 0x0000 //TX_MIC_INDX_DERVB -518 0x0000 //TX_MU_DERVB -519 0x0000 //TX_DR_RESRV_0 -520 0x0000 //TX_DR_RESRV_1 -521 0x0000 //TX_DR_RESRV_2 -522 0x0000 //TX_DR_RESRV_3 -523 0x0000 //TX_DR_RESRV_4 +514 0x0000 //TX_DEREVERB_LF_MU +515 0x0000 //TX_DEREVERB_HF_MU +516 0x0000 //TX_DEREVERB_DELAY +517 0x0000 //TX_DEREVERB_COEF_LEN +518 0x0000 //TX_DEREVERB_DNR +519 0x0000 //TX_DEREVERB_ALPHA +520 0x0000 //TX_DEREVERB_BETA +521 0x0000 //TX_GSC_RTOL_TH +522 0x0000 //TX_GSC_RTOH_TH +523 0x0000 //TX_WIDE2_MEANHTH 524 0x0000 //TX_DR_RESRV_5 525 0x0000 //TX_DR_RESRV_6 526 0x0000 //TX_DR_RESRV_7 @@ -4410,8 +6245,73 @@ 894 0xC000 //TX_FASTNS_SSA_THHFL 895 0xCCCC //TX_FASTNS_SSA_THLFH 896 0xD999 //TX_FASTNS_SSA_THHFH +897 0x0000 //TX_SENDFUNC_REG_MICMUTE +898 0x0000 //TX_SENDFUNC_REG_MICMUTE1 +899 0x0000 //TX_MICMUTE_RATIO_THR +900 0x0000 //TX_MICMUTE_AMP_THR +901 0x0000 //TX_MICMUTE_HPF_IND +902 0x0000 //TX_MICMUTE_LOG_EYR_TH +903 0x0000 //TX_MICMUTE_CVG_TIME +904 0x0000 //TX_MICMUTE_RELEASE_TIME +905 0x0000 //TX_MIC_VOLUME_MIC0MUTE +906 0x0000 //TX_MICMUTE_EPD_OFFSET_0 +907 0x0000 //TX_MICMUTE_FRQ_AEC_L +908 0x0000 //TX_MICMUTE_EAD_THR +909 0x0000 //TX_MICMUTE_LAMBDA_CB_NLE +910 0x0000 //TX_MICMUTE_LAMBDA_RE_EST +911 0x0000 //TX_DTD_THR1_MICMUTE_0 +912 0x0000 //TX_DTD_THR1_MICMUTE_1 +913 0x0000 //TX_DTD_THR1_MICMUTE_2 +914 0x0000 //TX_DTD_THR1_MICMUTE_3 +915 0x0000 //TX_DTD_THR2_MICMUTE_0 +916 0x0000 //TX_MICMUTE_MIN_EQ_RE_EST_0 +917 0x0000 //TX_MICMUTE_MIN_EQ_RE_EST_1 +918 0x0000 //TX_MICMUTE_MIN_EQ_RE_EST_2 +919 0x0000 //TX_MICMUTE_MIN_EQ_RE_EST_3 +920 0x0000 //TX_MICMUTE_MIN_EQ_RE_EST_4 +921 0x0000 //TX_MICMUTE_C_POST_FLT +922 0x0000 //TX_MICMUTE_DT_CUT_K +923 0x0000 //TX_MICMUTE_DT_CUT_THR +924 0x0000 //TX_MICMUTE_DT_CUT_K2 +925 0x0000 //TX_MICMUTE_DT_CUT_THR2 +926 0x0000 //TX_MICMUTE_DT2_HOLD_N +927 0x0000 //TX_MICMUTE_RATIODTH_THCUT +928 0x0000 //TX_MICMUTE_B_POST_FLT_ECHOL +929 0x0000 //TX_MICMUTE_B_POST_FLT_ECHOH +930 0x0000 //TX_MICMUTE_C_POST_FLT_MASK +931 0x0000 //TX_MICMUTE_RATIODTL_CUT_TH +932 0x0000 //TX_MICMUTE_DT_CUT_K1 +933 0x0000 //TX_MICMUTE_N2_SN_EST +934 0x0000 //TX_MICMUTE_THR_SN_EST_0 +935 0x0000 //TX_MICMUTE_MIN_G_CTRL_0 +936 0x0000 //TX_MICMUTE_A_POST_FILT_S_0 +937 0x0000 //TX_MICMUTE_B_POST_FILT_0 +938 0x0000 //TX_MIC1RUB_AMP_THR +939 0x0000 //TX_MIC1MUTE_RATIO_THR +940 0x0000 //TX_MIC1MUTE_AMP_THR +941 0x0000 //TX_MIC1MUTE_CVG_TIME +942 0x0000 //TX_MIC1MUTE_RELEASE_TIME +943 0x0000 //TX_AMS_RESRV_01 +944 0x0000 //TX_AMS_RESRV_02 +945 0x0000 //TX_AMS_RESRV_03 +946 0x0000 //TX_AMS_RESRV_04 +947 0x0000 //TX_AMS_RESRV_05 +948 0x0000 //TX_AMS_RESRV_06 +949 0x0000 //TX_AMS_RESRV_07 +950 0x0000 //TX_AMS_RESRV_08 +951 0x0000 //TX_AMS_RESRV_09 +952 0x0000 //TX_AMS_RESRV_10 +953 0x0000 //TX_AMS_RESRV_11 +954 0x0000 //TX_AMS_RESRV_12 +955 0x0000 //TX_AMS_RESRV_13 +956 0x0000 //TX_AMS_RESRV_14 +957 0x0000 //TX_AMS_RESRV_15 +958 0x0000 //TX_AMS_RESRV_16 +959 0x0000 //TX_AMS_RESRV_17 +960 0x0000 //TX_AMS_RESRV_18 +961 0x0000 //TX_AMS_RESRV_19 #RX -0 0x006C //RX_RECVFUNC_MODE_0 +0 0x206C //RX_RECVFUNC_MODE_0 1 0x0000 //RX_RECVFUNC_MODE_1 2 0x0001 //RX_SAMPLINGFREQ_SIG 3 0x0001 //RX_SAMPLINGFREQ_PROC @@ -5261,10 +7161,862 @@ 110 0x0000 //RX_FDDRC_RESRV_0 129 0x0100 //RX_SPK_VOL 130 0x0000 //RX_VOL_RESRV_0 +#RX 2 +157 0x206C //RX_RECVFUNC_MODE_0 +158 0x0000 //RX_RECVFUNC_MODE_1 +159 0x0001 //RX_SAMPLINGFREQ_SIG +160 0x0001 //RX_SAMPLINGFREQ_PROC +161 0x000A //RX_FRAME_SZ +162 0x0000 //RX_DELAY_OPT +163 0x1000 //RX_TDDRC_ALPHA_UP_1 +164 0x1000 //RX_TDDRC_ALPHA_UP_2 +165 0x1000 //RX_TDDRC_ALPHA_UP_3 +166 0x1000 //RX_TDDRC_ALPHA_UP_4 +167 0x0800 //RX_PGA +168 0x7FFF //RX_A_HP +169 0x4000 //RX_B_PE +170 0x3800 //RX_THR_PITCH_DET_0 +171 0x3000 //RX_THR_PITCH_DET_1 +172 0x2800 //RX_THR_PITCH_DET_2 +173 0x0008 //RX_PITCH_BFR_LEN +174 0x0003 //RX_SBD_PITCH_DET +175 0x0100 //RX_PP_RESRV_0 +176 0x0020 //RX_PP_RESRV_1 +177 0x0600 //RX_N_SN_EST +178 0x000C //RX_N2_SN_EST +179 0x0010 //RX_NS_LVL_CTRL +180 0xF800 //RX_THR_SN_EST +181 0x7CCD //RX_LAMBDA_PFILT +182 0x000A //RX_FENS_RESRV_0 +183 0x0190 //RX_FENS_RESRV_1 +184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +187 0x0002 //RX_EXTRA_NS_L +188 0x0800 //RX_EXTRA_NS_A +189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +190 0x7FFF //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +192 0x199A //RX_A_POST_FLT +193 0x0000 //RX_LMT_THRD +194 0x4000 //RX_LMT_ALPHA +195 0x001C //RX_FDEQ_SUBNUM +196 0x4848 //RX_FDEQ_GAIN_0 +197 0x4848 //RX_FDEQ_GAIN_1 +198 0x4848 //RX_FDEQ_GAIN_2 +199 0x4848 //RX_FDEQ_GAIN_3 +200 0x4848 //RX_FDEQ_GAIN_4 +201 0x4848 //RX_FDEQ_GAIN_5 +202 0x4848 //RX_FDEQ_GAIN_6 +203 0x4848 //RX_FDEQ_GAIN_7 +204 0x4848 //RX_FDEQ_GAIN_8 +205 0x3C3C //RX_FDEQ_GAIN_9 +206 0x3C3C //RX_FDEQ_GAIN_10 +207 0x3838 //RX_FDEQ_GAIN_11 +208 0x3838 //RX_FDEQ_GAIN_12 +209 0x3030 //RX_FDEQ_GAIN_13 +210 0x4848 //RX_FDEQ_GAIN_14 +211 0x4848 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0202 //RX_FDEQ_BIN_0 +221 0x0203 //RX_FDEQ_BIN_1 +222 0x0303 //RX_FDEQ_BIN_2 +223 0x0304 //RX_FDEQ_BIN_3 +224 0x0405 //RX_FDEQ_BIN_4 +225 0x0506 //RX_FDEQ_BIN_5 +226 0x0708 //RX_FDEQ_BIN_6 +227 0x090A //RX_FDEQ_BIN_7 +228 0x0B0C //RX_FDEQ_BIN_8 +229 0x0D0E //RX_FDEQ_BIN_9 +230 0x0E0F //RX_FDEQ_BIN_10 +231 0x0F10 //RX_FDEQ_BIN_11 +232 0x1011 //RX_FDEQ_BIN_12 +233 0x1112 //RX_FDEQ_BIN_13 +234 0x0000 //RX_FDEQ_BIN_14 +235 0x0000 //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x4000 //RX_FDEQ_RESRV_0 +245 0x0320 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0030 //RX_FDDRC_BAND_MARGIN_1 +248 0x0050 //RX_FDDRC_BAND_MARGIN_2 +249 0x0080 //RX_FDDRC_BAND_MARGIN_3 +250 0x0007 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x5000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x6400 //RX_FDDRC_THRD_3_2 +258 0x6400 //RX_FDDRC_THRD_3_3 +259 0x2000 //RX_FDDRC_SLANT_0_0 +260 0x2000 //RX_FDDRC_SLANT_0_1 +261 0x2000 //RX_FDDRC_SLANT_0_2 +262 0x2000 //RX_FDDRC_SLANT_0_3 +263 0x5333 //RX_FDDRC_SLANT_1_0 +264 0x5333 //RX_FDDRC_SLANT_1_1 +265 0x5333 //RX_FDDRC_SLANT_1_2 +266 0x5333 //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +268 0x0000 //RX_FILTINDX +269 0x0000 //RX_TDDRC_THRD_0 +270 0x0000 //RX_TDDRC_THRD_1 +271 0x7FFF //RX_TDDRC_THRD_2 +272 0x7FFF //RX_TDDRC_THRD_3 +273 0x7E70 //RX_TDDRC_SLANT_0 +274 0x7FFF //RX_TDDRC_SLANT_1 +275 0x1000 //RX_TDDRC_ALPHA_UP_0 +276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x199A //RX_TDDRC_HMNC_GAIN +279 0x0001 //RX_TDDRC_SMT_FLAG +280 0x0CCD //RX_TDDRC_SMT_W +281 0x0155 //RX_TDDRC_DRC_GAIN +282 0x7C00 //RX_LAMBDA_PKA_FP +283 0x2000 //RX_TPKA_FP +284 0x2000 //RX_MIN_G_FP +285 0x0080 //RX_MAX_G_FP +286 0x0100 //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 +288 0x0000 //RX_MAXLEVEL_CNG +289 0x3000 //RX_BWE_UV_TH +290 0x3000 //RX_BWE_UV_TH2 +291 0x1800 //RX_BWE_UV_TH3 +292 0x1000 //RX_BWE_V_TH +293 0x04CD //RX_BWE_GAIN1_V_TH1 +294 0x0F33 //RX_BWE_GAIN1_V_TH2 +295 0x7333 //RX_BWE_UV_EQ +296 0x199A //RX_BWE_V_EQ +297 0x7333 //RX_BWE_TONE_TH +298 0x0004 //RX_BWE_UV_HOLD_T +299 0x6CCD //RX_BWE_GAIN2_ALPHA +300 0x799A //RX_BWE_GAIN3_ALPHA +301 0x001E //RX_BWE_CUTOFF +302 0x3000 //RX_BWE_GAINFILL +303 0x3200 //RX_BWE_MAXTH_TONE +304 0x2000 //RX_BWE_EQ_0 +305 0x2000 //RX_BWE_EQ_1 +306 0x2000 //RX_BWE_EQ_2 +307 0x2000 //RX_BWE_EQ_3 +308 0x2000 //RX_BWE_EQ_4 +309 0x2000 //RX_BWE_EQ_5 +310 0x2000 //RX_BWE_EQ_6 +311 0x0000 //RX_BWE_RESRV_0 +312 0x0000 //RX_BWE_RESRV_1 +313 0x0000 //RX_BWE_RESRV_2 +#VOL 0 +163 0x1000 //RX_TDDRC_ALPHA_UP_1 +164 0x1000 //RX_TDDRC_ALPHA_UP_2 +165 0x1000 //RX_TDDRC_ALPHA_UP_3 +166 0x1000 //RX_TDDRC_ALPHA_UP_4 +184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +190 0x7FFF //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +269 0x0000 //RX_TDDRC_THRD_0 +270 0x0000 //RX_TDDRC_THRD_1 +271 0x7FFF //RX_TDDRC_THRD_2 +272 0x7FFF //RX_TDDRC_THRD_3 +273 0x7E70 //RX_TDDRC_SLANT_0 +274 0x7FFF //RX_TDDRC_SLANT_1 +275 0x1000 //RX_TDDRC_ALPHA_UP_0 +276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x199A //RX_TDDRC_HMNC_GAIN +279 0x0001 //RX_TDDRC_SMT_FLAG +280 0x0CCD //RX_TDDRC_SMT_W +281 0x0155 //RX_TDDRC_DRC_GAIN +195 0x001C //RX_FDEQ_SUBNUM +196 0x4848 //RX_FDEQ_GAIN_0 +197 0x4848 //RX_FDEQ_GAIN_1 +198 0x4848 //RX_FDEQ_GAIN_2 +199 0x4848 //RX_FDEQ_GAIN_3 +200 0x4848 //RX_FDEQ_GAIN_4 +201 0x4848 //RX_FDEQ_GAIN_5 +202 0x4848 //RX_FDEQ_GAIN_6 +203 0x4848 //RX_FDEQ_GAIN_7 +204 0x4848 //RX_FDEQ_GAIN_8 +205 0x3C3C //RX_FDEQ_GAIN_9 +206 0x3C3C //RX_FDEQ_GAIN_10 +207 0x3838 //RX_FDEQ_GAIN_11 +208 0x3838 //RX_FDEQ_GAIN_12 +209 0x3030 //RX_FDEQ_GAIN_13 +210 0x4848 //RX_FDEQ_GAIN_14 +211 0x4848 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0202 //RX_FDEQ_BIN_0 +221 0x0203 //RX_FDEQ_BIN_1 +222 0x0303 //RX_FDEQ_BIN_2 +223 0x0304 //RX_FDEQ_BIN_3 +224 0x0405 //RX_FDEQ_BIN_4 +225 0x0506 //RX_FDEQ_BIN_5 +226 0x0708 //RX_FDEQ_BIN_6 +227 0x090A //RX_FDEQ_BIN_7 +228 0x0B0C //RX_FDEQ_BIN_8 +229 0x0D0E //RX_FDEQ_BIN_9 +230 0x0E0F //RX_FDEQ_BIN_10 +231 0x0F10 //RX_FDEQ_BIN_11 +232 0x1011 //RX_FDEQ_BIN_12 +233 0x1112 //RX_FDEQ_BIN_13 +234 0x0000 //RX_FDEQ_BIN_14 +235 0x0000 //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x4000 //RX_FDEQ_RESRV_0 +245 0x0320 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0030 //RX_FDDRC_BAND_MARGIN_1 +248 0x0050 //RX_FDDRC_BAND_MARGIN_2 +249 0x0080 //RX_FDDRC_BAND_MARGIN_3 +250 0x0007 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x5000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x6400 //RX_FDDRC_THRD_3_2 +258 0x6400 //RX_FDDRC_THRD_3_3 +259 0x2000 //RX_FDDRC_SLANT_0_0 +260 0x2000 //RX_FDDRC_SLANT_0_1 +261 0x2000 //RX_FDDRC_SLANT_0_2 +262 0x2000 //RX_FDDRC_SLANT_0_3 +263 0x5333 //RX_FDDRC_SLANT_1_0 +264 0x5333 //RX_FDDRC_SLANT_1_1 +265 0x5333 //RX_FDDRC_SLANT_1_2 +266 0x5333 //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +286 0x0100 //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 +#VOL 1 +163 0x1000 //RX_TDDRC_ALPHA_UP_1 +164 0x1000 //RX_TDDRC_ALPHA_UP_2 +165 0x1000 //RX_TDDRC_ALPHA_UP_3 +166 0x1000 //RX_TDDRC_ALPHA_UP_4 +184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +190 0x7FFF //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +269 0x0000 //RX_TDDRC_THRD_0 +270 0x0000 //RX_TDDRC_THRD_1 +271 0x7FFF //RX_TDDRC_THRD_2 +272 0x7FFF //RX_TDDRC_THRD_3 +273 0x7E70 //RX_TDDRC_SLANT_0 +274 0x7FFF //RX_TDDRC_SLANT_1 +275 0x1000 //RX_TDDRC_ALPHA_UP_0 +276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x199A //RX_TDDRC_HMNC_GAIN +279 0x0001 //RX_TDDRC_SMT_FLAG +280 0x0CCD //RX_TDDRC_SMT_W +281 0x0155 //RX_TDDRC_DRC_GAIN +195 0x001C //RX_FDEQ_SUBNUM +196 0x4848 //RX_FDEQ_GAIN_0 +197 0x4848 //RX_FDEQ_GAIN_1 +198 0x4848 //RX_FDEQ_GAIN_2 +199 0x4848 //RX_FDEQ_GAIN_3 +200 0x4848 //RX_FDEQ_GAIN_4 +201 0x4848 //RX_FDEQ_GAIN_5 +202 0x4848 //RX_FDEQ_GAIN_6 +203 0x4848 //RX_FDEQ_GAIN_7 +204 0x4848 //RX_FDEQ_GAIN_8 +205 0x3C3C //RX_FDEQ_GAIN_9 +206 0x3C3C //RX_FDEQ_GAIN_10 +207 0x3838 //RX_FDEQ_GAIN_11 +208 0x3838 //RX_FDEQ_GAIN_12 +209 0x3030 //RX_FDEQ_GAIN_13 +210 0x4848 //RX_FDEQ_GAIN_14 +211 0x4848 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0202 //RX_FDEQ_BIN_0 +221 0x0203 //RX_FDEQ_BIN_1 +222 0x0303 //RX_FDEQ_BIN_2 +223 0x0304 //RX_FDEQ_BIN_3 +224 0x0405 //RX_FDEQ_BIN_4 +225 0x0506 //RX_FDEQ_BIN_5 +226 0x0708 //RX_FDEQ_BIN_6 +227 0x090A //RX_FDEQ_BIN_7 +228 0x0B0C //RX_FDEQ_BIN_8 +229 0x0D0E //RX_FDEQ_BIN_9 +230 0x0E0F //RX_FDEQ_BIN_10 +231 0x0F10 //RX_FDEQ_BIN_11 +232 0x1011 //RX_FDEQ_BIN_12 +233 0x1112 //RX_FDEQ_BIN_13 +234 0x0000 //RX_FDEQ_BIN_14 +235 0x0000 //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x4000 //RX_FDEQ_RESRV_0 +245 0x0320 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0030 //RX_FDDRC_BAND_MARGIN_1 +248 0x0050 //RX_FDDRC_BAND_MARGIN_2 +249 0x0080 //RX_FDDRC_BAND_MARGIN_3 +250 0x0007 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x5000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x6400 //RX_FDDRC_THRD_3_2 +258 0x6400 //RX_FDDRC_THRD_3_3 +259 0x2000 //RX_FDDRC_SLANT_0_0 +260 0x2000 //RX_FDDRC_SLANT_0_1 +261 0x2000 //RX_FDDRC_SLANT_0_2 +262 0x2000 //RX_FDDRC_SLANT_0_3 +263 0x5333 //RX_FDDRC_SLANT_1_0 +264 0x5333 //RX_FDDRC_SLANT_1_1 +265 0x5333 //RX_FDDRC_SLANT_1_2 +266 0x5333 //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +286 0x0100 //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 +#VOL 2 +163 0x1000 //RX_TDDRC_ALPHA_UP_1 +164 0x1000 //RX_TDDRC_ALPHA_UP_2 +165 0x1000 //RX_TDDRC_ALPHA_UP_3 +166 0x1000 //RX_TDDRC_ALPHA_UP_4 +184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +190 0x7FFF //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +269 0x0000 //RX_TDDRC_THRD_0 +270 0x0000 //RX_TDDRC_THRD_1 +271 0x7FFF //RX_TDDRC_THRD_2 +272 0x7FFF //RX_TDDRC_THRD_3 +273 0x7E70 //RX_TDDRC_SLANT_0 +274 0x7FFF //RX_TDDRC_SLANT_1 +275 0x1000 //RX_TDDRC_ALPHA_UP_0 +276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x199A //RX_TDDRC_HMNC_GAIN +279 0x0001 //RX_TDDRC_SMT_FLAG +280 0x0CCD //RX_TDDRC_SMT_W +281 0x0155 //RX_TDDRC_DRC_GAIN +195 0x001C //RX_FDEQ_SUBNUM +196 0x4848 //RX_FDEQ_GAIN_0 +197 0x4848 //RX_FDEQ_GAIN_1 +198 0x4848 //RX_FDEQ_GAIN_2 +199 0x4848 //RX_FDEQ_GAIN_3 +200 0x4848 //RX_FDEQ_GAIN_4 +201 0x4848 //RX_FDEQ_GAIN_5 +202 0x4848 //RX_FDEQ_GAIN_6 +203 0x4848 //RX_FDEQ_GAIN_7 +204 0x4848 //RX_FDEQ_GAIN_8 +205 0x3C3C //RX_FDEQ_GAIN_9 +206 0x3C3C //RX_FDEQ_GAIN_10 +207 0x3838 //RX_FDEQ_GAIN_11 +208 0x3838 //RX_FDEQ_GAIN_12 +209 0x3030 //RX_FDEQ_GAIN_13 +210 0x4848 //RX_FDEQ_GAIN_14 +211 0x4848 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0202 //RX_FDEQ_BIN_0 +221 0x0203 //RX_FDEQ_BIN_1 +222 0x0303 //RX_FDEQ_BIN_2 +223 0x0304 //RX_FDEQ_BIN_3 +224 0x0405 //RX_FDEQ_BIN_4 +225 0x0506 //RX_FDEQ_BIN_5 +226 0x0708 //RX_FDEQ_BIN_6 +227 0x090A //RX_FDEQ_BIN_7 +228 0x0B0C //RX_FDEQ_BIN_8 +229 0x0D0E //RX_FDEQ_BIN_9 +230 0x0E0F //RX_FDEQ_BIN_10 +231 0x0F10 //RX_FDEQ_BIN_11 +232 0x1011 //RX_FDEQ_BIN_12 +233 0x1112 //RX_FDEQ_BIN_13 +234 0x0000 //RX_FDEQ_BIN_14 +235 0x0000 //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x4000 //RX_FDEQ_RESRV_0 +245 0x0320 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0030 //RX_FDDRC_BAND_MARGIN_1 +248 0x0050 //RX_FDDRC_BAND_MARGIN_2 +249 0x0080 //RX_FDDRC_BAND_MARGIN_3 +250 0x0007 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x5000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x6400 //RX_FDDRC_THRD_3_2 +258 0x6400 //RX_FDDRC_THRD_3_3 +259 0x2000 //RX_FDDRC_SLANT_0_0 +260 0x2000 //RX_FDDRC_SLANT_0_1 +261 0x2000 //RX_FDDRC_SLANT_0_2 +262 0x2000 //RX_FDDRC_SLANT_0_3 +263 0x5333 //RX_FDDRC_SLANT_1_0 +264 0x5333 //RX_FDDRC_SLANT_1_1 +265 0x5333 //RX_FDDRC_SLANT_1_2 +266 0x5333 //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +286 0x0100 //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 +#VOL 3 +163 0x1000 //RX_TDDRC_ALPHA_UP_1 +164 0x1000 //RX_TDDRC_ALPHA_UP_2 +165 0x1000 //RX_TDDRC_ALPHA_UP_3 +166 0x1000 //RX_TDDRC_ALPHA_UP_4 +184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +190 0x7FFF //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +269 0x0000 //RX_TDDRC_THRD_0 +270 0x0000 //RX_TDDRC_THRD_1 +271 0x7FFF //RX_TDDRC_THRD_2 +272 0x7FFF //RX_TDDRC_THRD_3 +273 0x7E70 //RX_TDDRC_SLANT_0 +274 0x7FFF //RX_TDDRC_SLANT_1 +275 0x1000 //RX_TDDRC_ALPHA_UP_0 +276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x199A //RX_TDDRC_HMNC_GAIN +279 0x0001 //RX_TDDRC_SMT_FLAG +280 0x0CCD //RX_TDDRC_SMT_W +281 0x0155 //RX_TDDRC_DRC_GAIN +195 0x001C //RX_FDEQ_SUBNUM +196 0x4848 //RX_FDEQ_GAIN_0 +197 0x4848 //RX_FDEQ_GAIN_1 +198 0x4848 //RX_FDEQ_GAIN_2 +199 0x4848 //RX_FDEQ_GAIN_3 +200 0x4848 //RX_FDEQ_GAIN_4 +201 0x4848 //RX_FDEQ_GAIN_5 +202 0x4848 //RX_FDEQ_GAIN_6 +203 0x4848 //RX_FDEQ_GAIN_7 +204 0x4848 //RX_FDEQ_GAIN_8 +205 0x3C3C //RX_FDEQ_GAIN_9 +206 0x3C3C //RX_FDEQ_GAIN_10 +207 0x3838 //RX_FDEQ_GAIN_11 +208 0x3838 //RX_FDEQ_GAIN_12 +209 0x3030 //RX_FDEQ_GAIN_13 +210 0x4848 //RX_FDEQ_GAIN_14 +211 0x4848 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0202 //RX_FDEQ_BIN_0 +221 0x0203 //RX_FDEQ_BIN_1 +222 0x0303 //RX_FDEQ_BIN_2 +223 0x0304 //RX_FDEQ_BIN_3 +224 0x0405 //RX_FDEQ_BIN_4 +225 0x0506 //RX_FDEQ_BIN_5 +226 0x0708 //RX_FDEQ_BIN_6 +227 0x090A //RX_FDEQ_BIN_7 +228 0x0B0C //RX_FDEQ_BIN_8 +229 0x0D0E //RX_FDEQ_BIN_9 +230 0x0E0F //RX_FDEQ_BIN_10 +231 0x0F10 //RX_FDEQ_BIN_11 +232 0x1011 //RX_FDEQ_BIN_12 +233 0x1112 //RX_FDEQ_BIN_13 +234 0x0000 //RX_FDEQ_BIN_14 +235 0x0000 //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x4000 //RX_FDEQ_RESRV_0 +245 0x0320 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0030 //RX_FDDRC_BAND_MARGIN_1 +248 0x0050 //RX_FDDRC_BAND_MARGIN_2 +249 0x0080 //RX_FDDRC_BAND_MARGIN_3 +250 0x0007 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x5000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x6400 //RX_FDDRC_THRD_3_2 +258 0x6400 //RX_FDDRC_THRD_3_3 +259 0x2000 //RX_FDDRC_SLANT_0_0 +260 0x2000 //RX_FDDRC_SLANT_0_1 +261 0x2000 //RX_FDDRC_SLANT_0_2 +262 0x2000 //RX_FDDRC_SLANT_0_3 +263 0x5333 //RX_FDDRC_SLANT_1_0 +264 0x5333 //RX_FDDRC_SLANT_1_1 +265 0x5333 //RX_FDDRC_SLANT_1_2 +266 0x5333 //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +286 0x0100 //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 +#VOL 4 +163 0x1000 //RX_TDDRC_ALPHA_UP_1 +164 0x1000 //RX_TDDRC_ALPHA_UP_2 +165 0x1000 //RX_TDDRC_ALPHA_UP_3 +166 0x1000 //RX_TDDRC_ALPHA_UP_4 +184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +190 0x7FFF //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +269 0x0000 //RX_TDDRC_THRD_0 +270 0x0000 //RX_TDDRC_THRD_1 +271 0x7FFF //RX_TDDRC_THRD_2 +272 0x7FFF //RX_TDDRC_THRD_3 +273 0x7E70 //RX_TDDRC_SLANT_0 +274 0x7FFF //RX_TDDRC_SLANT_1 +275 0x1000 //RX_TDDRC_ALPHA_UP_0 +276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x199A //RX_TDDRC_HMNC_GAIN +279 0x0001 //RX_TDDRC_SMT_FLAG +280 0x0CCD //RX_TDDRC_SMT_W +281 0x0155 //RX_TDDRC_DRC_GAIN +195 0x001C //RX_FDEQ_SUBNUM +196 0x4848 //RX_FDEQ_GAIN_0 +197 0x4848 //RX_FDEQ_GAIN_1 +198 0x4848 //RX_FDEQ_GAIN_2 +199 0x4848 //RX_FDEQ_GAIN_3 +200 0x4848 //RX_FDEQ_GAIN_4 +201 0x4848 //RX_FDEQ_GAIN_5 +202 0x4848 //RX_FDEQ_GAIN_6 +203 0x4848 //RX_FDEQ_GAIN_7 +204 0x4848 //RX_FDEQ_GAIN_8 +205 0x3C3C //RX_FDEQ_GAIN_9 +206 0x3C3C //RX_FDEQ_GAIN_10 +207 0x3838 //RX_FDEQ_GAIN_11 +208 0x3838 //RX_FDEQ_GAIN_12 +209 0x3030 //RX_FDEQ_GAIN_13 +210 0x4848 //RX_FDEQ_GAIN_14 +211 0x4848 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0202 //RX_FDEQ_BIN_0 +221 0x0203 //RX_FDEQ_BIN_1 +222 0x0303 //RX_FDEQ_BIN_2 +223 0x0304 //RX_FDEQ_BIN_3 +224 0x0405 //RX_FDEQ_BIN_4 +225 0x0506 //RX_FDEQ_BIN_5 +226 0x0708 //RX_FDEQ_BIN_6 +227 0x090A //RX_FDEQ_BIN_7 +228 0x0B0C //RX_FDEQ_BIN_8 +229 0x0D0E //RX_FDEQ_BIN_9 +230 0x0E0F //RX_FDEQ_BIN_10 +231 0x0F10 //RX_FDEQ_BIN_11 +232 0x1011 //RX_FDEQ_BIN_12 +233 0x1112 //RX_FDEQ_BIN_13 +234 0x0000 //RX_FDEQ_BIN_14 +235 0x0000 //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x4000 //RX_FDEQ_RESRV_0 +245 0x0320 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0030 //RX_FDDRC_BAND_MARGIN_1 +248 0x0050 //RX_FDDRC_BAND_MARGIN_2 +249 0x0080 //RX_FDDRC_BAND_MARGIN_3 +250 0x0007 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x5000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x6400 //RX_FDDRC_THRD_3_2 +258 0x6400 //RX_FDDRC_THRD_3_3 +259 0x2000 //RX_FDDRC_SLANT_0_0 +260 0x2000 //RX_FDDRC_SLANT_0_1 +261 0x2000 //RX_FDDRC_SLANT_0_2 +262 0x2000 //RX_FDDRC_SLANT_0_3 +263 0x5333 //RX_FDDRC_SLANT_1_0 +264 0x5333 //RX_FDDRC_SLANT_1_1 +265 0x5333 //RX_FDDRC_SLANT_1_2 +266 0x5333 //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +286 0x0100 //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 +#VOL 5 +163 0x1000 //RX_TDDRC_ALPHA_UP_1 +164 0x1000 //RX_TDDRC_ALPHA_UP_2 +165 0x1000 //RX_TDDRC_ALPHA_UP_3 +166 0x1000 //RX_TDDRC_ALPHA_UP_4 +184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +190 0x7FFF //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +269 0x0000 //RX_TDDRC_THRD_0 +270 0x0000 //RX_TDDRC_THRD_1 +271 0x7FFF //RX_TDDRC_THRD_2 +272 0x7FFF //RX_TDDRC_THRD_3 +273 0x7E70 //RX_TDDRC_SLANT_0 +274 0x7FFF //RX_TDDRC_SLANT_1 +275 0x1000 //RX_TDDRC_ALPHA_UP_0 +276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x199A //RX_TDDRC_HMNC_GAIN +279 0x0001 //RX_TDDRC_SMT_FLAG +280 0x0CCD //RX_TDDRC_SMT_W +281 0x0155 //RX_TDDRC_DRC_GAIN +195 0x001C //RX_FDEQ_SUBNUM +196 0x4848 //RX_FDEQ_GAIN_0 +197 0x4848 //RX_FDEQ_GAIN_1 +198 0x4848 //RX_FDEQ_GAIN_2 +199 0x4848 //RX_FDEQ_GAIN_3 +200 0x4848 //RX_FDEQ_GAIN_4 +201 0x4848 //RX_FDEQ_GAIN_5 +202 0x4848 //RX_FDEQ_GAIN_6 +203 0x4848 //RX_FDEQ_GAIN_7 +204 0x4848 //RX_FDEQ_GAIN_8 +205 0x3C3C //RX_FDEQ_GAIN_9 +206 0x3C3C //RX_FDEQ_GAIN_10 +207 0x3838 //RX_FDEQ_GAIN_11 +208 0x3838 //RX_FDEQ_GAIN_12 +209 0x3030 //RX_FDEQ_GAIN_13 +210 0x4848 //RX_FDEQ_GAIN_14 +211 0x4848 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0202 //RX_FDEQ_BIN_0 +221 0x0203 //RX_FDEQ_BIN_1 +222 0x0303 //RX_FDEQ_BIN_2 +223 0x0304 //RX_FDEQ_BIN_3 +224 0x0405 //RX_FDEQ_BIN_4 +225 0x0506 //RX_FDEQ_BIN_5 +226 0x0708 //RX_FDEQ_BIN_6 +227 0x090A //RX_FDEQ_BIN_7 +228 0x0B0C //RX_FDEQ_BIN_8 +229 0x0D0E //RX_FDEQ_BIN_9 +230 0x0E0F //RX_FDEQ_BIN_10 +231 0x0F10 //RX_FDEQ_BIN_11 +232 0x1011 //RX_FDEQ_BIN_12 +233 0x1112 //RX_FDEQ_BIN_13 +234 0x0000 //RX_FDEQ_BIN_14 +235 0x0000 //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x4000 //RX_FDEQ_RESRV_0 +245 0x0320 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0030 //RX_FDDRC_BAND_MARGIN_1 +248 0x0050 //RX_FDDRC_BAND_MARGIN_2 +249 0x0080 //RX_FDDRC_BAND_MARGIN_3 +250 0x0007 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x5000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x6400 //RX_FDDRC_THRD_3_2 +258 0x6400 //RX_FDDRC_THRD_3_3 +259 0x2000 //RX_FDDRC_SLANT_0_0 +260 0x2000 //RX_FDDRC_SLANT_0_1 +261 0x2000 //RX_FDDRC_SLANT_0_2 +262 0x2000 //RX_FDDRC_SLANT_0_3 +263 0x5333 //RX_FDDRC_SLANT_1_0 +264 0x5333 //RX_FDDRC_SLANT_1_1 +265 0x5333 //RX_FDDRC_SLANT_1_2 +266 0x5333 //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +286 0x0100 //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 +#VOL 6 +163 0x1000 //RX_TDDRC_ALPHA_UP_1 +164 0x1000 //RX_TDDRC_ALPHA_UP_2 +165 0x1000 //RX_TDDRC_ALPHA_UP_3 +166 0x1000 //RX_TDDRC_ALPHA_UP_4 +184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +190 0x7FFF //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +269 0x0000 //RX_TDDRC_THRD_0 +270 0x0000 //RX_TDDRC_THRD_1 +271 0x7FFF //RX_TDDRC_THRD_2 +272 0x7FFF //RX_TDDRC_THRD_3 +273 0x7E70 //RX_TDDRC_SLANT_0 +274 0x7FFF //RX_TDDRC_SLANT_1 +275 0x1000 //RX_TDDRC_ALPHA_UP_0 +276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x199A //RX_TDDRC_HMNC_GAIN +279 0x0001 //RX_TDDRC_SMT_FLAG +280 0x0CCD //RX_TDDRC_SMT_W +281 0x0155 //RX_TDDRC_DRC_GAIN +195 0x001C //RX_FDEQ_SUBNUM +196 0x4848 //RX_FDEQ_GAIN_0 +197 0x4848 //RX_FDEQ_GAIN_1 +198 0x4848 //RX_FDEQ_GAIN_2 +199 0x4848 //RX_FDEQ_GAIN_3 +200 0x4848 //RX_FDEQ_GAIN_4 +201 0x4848 //RX_FDEQ_GAIN_5 +202 0x4848 //RX_FDEQ_GAIN_6 +203 0x4848 //RX_FDEQ_GAIN_7 +204 0x4848 //RX_FDEQ_GAIN_8 +205 0x3C3C //RX_FDEQ_GAIN_9 +206 0x3C3C //RX_FDEQ_GAIN_10 +207 0x3838 //RX_FDEQ_GAIN_11 +208 0x3838 //RX_FDEQ_GAIN_12 +209 0x3030 //RX_FDEQ_GAIN_13 +210 0x4848 //RX_FDEQ_GAIN_14 +211 0x4848 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0202 //RX_FDEQ_BIN_0 +221 0x0203 //RX_FDEQ_BIN_1 +222 0x0303 //RX_FDEQ_BIN_2 +223 0x0304 //RX_FDEQ_BIN_3 +224 0x0405 //RX_FDEQ_BIN_4 +225 0x0506 //RX_FDEQ_BIN_5 +226 0x0708 //RX_FDEQ_BIN_6 +227 0x090A //RX_FDEQ_BIN_7 +228 0x0B0C //RX_FDEQ_BIN_8 +229 0x0D0E //RX_FDEQ_BIN_9 +230 0x0E0F //RX_FDEQ_BIN_10 +231 0x0F10 //RX_FDEQ_BIN_11 +232 0x1011 //RX_FDEQ_BIN_12 +233 0x1112 //RX_FDEQ_BIN_13 +234 0x0000 //RX_FDEQ_BIN_14 +235 0x0000 //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x4000 //RX_FDEQ_RESRV_0 +245 0x0320 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0030 //RX_FDDRC_BAND_MARGIN_1 +248 0x0050 //RX_FDDRC_BAND_MARGIN_2 +249 0x0080 //RX_FDDRC_BAND_MARGIN_3 +250 0x0007 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x5000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x6400 //RX_FDDRC_THRD_3_2 +258 0x6400 //RX_FDDRC_THRD_3_3 +259 0x2000 //RX_FDDRC_SLANT_0_0 +260 0x2000 //RX_FDDRC_SLANT_0_1 +261 0x2000 //RX_FDDRC_SLANT_0_2 +262 0x2000 //RX_FDDRC_SLANT_0_3 +263 0x5333 //RX_FDDRC_SLANT_1_0 +264 0x5333 //RX_FDDRC_SLANT_1_1 +265 0x5333 //RX_FDDRC_SLANT_1_2 +266 0x5333 //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +286 0x0100 //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 #CASE_NAME BLUETOOTH-BT_HAC-VOICE_GENERIC-SWB -#PARAM_TYPE TX+RX -#TOTAL_CUSTOM_STEP 7 +#PARAM_MODE Full +#PARAM_TYPE TX+2RX +#TOTAL_CUSTOM_STEP 7+7 #TX 0 0x0001 //TX_OPERATION_MODE_0 1 0x0001 //TX_OPERATION_MODE_1 @@ -5519,10 +8271,10 @@ 250 0x0100 //TX_DELTA_THR_SN_EST_0 251 0x0100 //TX_DELTA_THR_SN_EST_1 252 0x0100 //TX_DELTA_THR_SN_EST_2 -253 0x0100 //TX_DELTA_THR_SN_EST_3 -254 0x0000 //TX_DELTA_THR_SN_EST_4 -255 0x0100 //TX_DELTA_THR_SN_EST_5 -256 0x0200 //TX_DELTA_THR_SN_EST_6 +253 0x0000 //TX_DELTA_THR_SN_EST_3 +254 0x0100 //TX_DELTA_THR_SN_EST_4 +255 0x0200 //TX_DELTA_THR_SN_EST_5 +256 0x0100 //TX_DELTA_THR_SN_EST_6 257 0x0200 //TX_DELTA_THR_SN_EST_7 258 0x4000 //TX_LAMBDA_NN_EST_0 259 0x4000 //TX_LAMBDA_NN_EST_1 @@ -5549,11 +8301,11 @@ 280 0x1000 //TX_B_POST_FLT_1 281 0x0010 //TX_NS_LVL_CTRL_0 282 0x003C //TX_NS_LVL_CTRL_1 -283 0x003C //TX_NS_LVL_CTRL_2 -284 0x0024 //TX_NS_LVL_CTRL_3 -285 0x003C //TX_NS_LVL_CTRL_4 -286 0x0014 //TX_NS_LVL_CTRL_5 -287 0x0011 //TX_NS_LVL_CTRL_6 +283 0x0024 //TX_NS_LVL_CTRL_2 +284 0x003C //TX_NS_LVL_CTRL_3 +285 0x0014 //TX_NS_LVL_CTRL_4 +286 0x0011 //TX_NS_LVL_CTRL_5 +287 0x003C //TX_NS_LVL_CTRL_6 288 0x0011 //TX_NS_LVL_CTRL_7 289 0x000F //TX_MIN_GAIN_S_0 290 0x0010 //TX_MIN_GAIN_S_1 @@ -5569,10 +8321,10 @@ 300 0x7FFF //TX_SNRI_SUP_0 301 0x1400 //TX_SNRI_SUP_1 302 0x1400 //TX_SNRI_SUP_2 -303 0x1400 //TX_SNRI_SUP_3 +303 0x4000 //TX_SNRI_SUP_3 304 0x4000 //TX_SNRI_SUP_4 -305 0x4000 //TX_SNRI_SUP_5 -306 0x50C0 //TX_SNRI_SUP_6 +305 0x50C0 //TX_SNRI_SUP_5 +306 0x1400 //TX_SNRI_SUP_6 307 0x7FFF //TX_SNRI_SUP_7 308 0x7FFF //TX_THR_LFNS 309 0x0018 //TX_G_LFNS @@ -5581,19 +8333,19 @@ 312 0x7FFF //TX_A_POST_FILT_0 313 0x2000 //TX_A_POST_FILT_1 314 0x5000 //TX_A_POST_FILT_S_0 -315 0x7C00 //TX_A_POST_FILT_S_1 -316 0x4C00 //TX_A_POST_FILT_S_2 -317 0x4000 //TX_A_POST_FILT_S_3 -318 0x6000 //TX_A_POST_FILT_S_4 -319 0x4000 //TX_A_POST_FILT_S_5 -320 0x5000 //TX_A_POST_FILT_S_6 +315 0x4C00 //TX_A_POST_FILT_S_1 +316 0x4000 //TX_A_POST_FILT_S_2 +317 0x6000 //TX_A_POST_FILT_S_3 +318 0x4000 //TX_A_POST_FILT_S_4 +319 0x5000 //TX_A_POST_FILT_S_5 +320 0x7C00 //TX_A_POST_FILT_S_6 321 0x7000 //TX_A_POST_FILT_S_7 322 0x2000 //TX_B_POST_FILT_0 -323 0x1000 //TX_B_POST_FILT_1 +323 0x6000 //TX_B_POST_FILT_1 324 0x6000 //TX_B_POST_FILT_2 325 0x6000 //TX_B_POST_FILT_3 -326 0x6000 //TX_B_POST_FILT_4 -327 0x4000 //TX_B_POST_FILT_5 +326 0x4000 //TX_B_POST_FILT_4 +327 0x1000 //TX_B_POST_FILT_5 328 0x1000 //TX_B_POST_FILT_6 329 0x2000 //TX_B_POST_FILT_7 330 0x4000 //TX_B_LESSCUT_RTO_S_0 @@ -5601,8 +8353,8 @@ 332 0x7FFF //TX_B_LESSCUT_RTO_S_2 333 0x7FFF //TX_B_LESSCUT_RTO_S_3 334 0x7FFF //TX_B_LESSCUT_RTO_S_4 -335 0x7FFF //TX_B_LESSCUT_RTO_S_5 -336 0x6000 //TX_B_LESSCUT_RTO_S_6 +335 0x6000 //TX_B_LESSCUT_RTO_S_5 +336 0x7FFF //TX_B_LESSCUT_RTO_S_6 337 0x7FFF //TX_B_LESSCUT_RTO_S_7 338 0x7C00 //TX_LAMBDA_PFILT 339 0x7D00 //TX_LAMBDA_PFILT_S_0 @@ -5646,10 +8398,10 @@ 377 0x7FFF //TX_NOISE_TH_5_4 378 0x0DAC //TX_NOISE_TH_6 379 0x0050 //TX_MINENOISE_TH -380 0x4000 //TX_MINENOISE_MIC0_TH_MTS -381 0xFFEE //TX_MINENOISE_MIC0_TH_EXP -382 0x6000 //TX_MINENOISE_MIC0_S_TH_MTS -383 0xFFF3 //TX_MINENOISE_MIC0_S_TH_EXP +380 0x4000 //TX_MORENS_TFMASK_TH +381 0xFFEE //TX_DRC_QUIET_FLOOR +382 0x6000 //TX_RATIODTL_CUT_TH +383 0xFFF3 //TX_DT_CUT_K1 384 0x0666 //TX_OUT_ENER_S_TH_CLEAN 385 0x0666 //TX_OUT_ENER_S_TH_LESSCLEAN 386 0x0333 //TX_OUT_ENER_S_TH_NOISY @@ -5657,15 +8409,15 @@ 388 0x0333 //TX_OUT_ENER_TH_SPEECH 389 0x2000 //TX_SN_NPB_GAIN 390 0x0000 //TX_NN_NPB_GAIN -391 0x0000 //TX_CSX_ALPHA_0 -392 0x0000 //TX_CSX_ALPHA_1 -393 0x0000 //TX_CSX_ALPHA_2 -394 0x0000 //TX_CSX_ALPHA_3 -395 0x0800 //TX_MU_ARSP_EST -396 0x00C8 //TX_P_OUTBEAM_MIN_TH +391 0x0000 //TX_POST_MASK_SUP_HSNE +392 0x0000 //TX_TAIL_DET_TH +393 0x0000 //TX_B_LESSCUT_RTO_WTA +394 0x0000 //TX_MEL_G_R +395 0x0800 //TX_SUPHIGH_TH +396 0x00C8 //TX_MASK_G_R 397 0x0002 //TX_EXTRA_NS_L -398 0x0800 //TX_EXTRA_NS_A -399 0x0005 //TX_VR_NOISE_FLOOR_TH +398 0x0800 //TX_C_POST_FLT_MASK +399 0x0005 //TX_A_POST_FLT_WNS 400 0x0148 //TX_MIN_G_LOW300HZ 401 0x0001 //TX_MAXLEVEL_CNG 402 0x00B4 //TX_STN_NOISE_TH @@ -5780,16 +8532,16 @@ 511 0x6666 //TX_MIC_TO_BFGAIN 512 0x0000 //TX_MICTOBFGAIN0 513 0x0000 //TX_FASTMUE_TH -514 0x0000 //TX_DERVB_LEN_0 -515 0x0000 //TX_DERVB_LEN_1 -516 0x0000 //TX_RHO_DERVB -517 0x0000 //TX_MIC_INDX_DERVB -518 0x0000 //TX_MU_DERVB -519 0x0000 //TX_DR_RESRV_0 -520 0x0000 //TX_DR_RESRV_1 -521 0x0000 //TX_DR_RESRV_2 -522 0x0000 //TX_DR_RESRV_3 -523 0x0000 //TX_DR_RESRV_4 +514 0x0000 //TX_DEREVERB_LF_MU +515 0x0000 //TX_DEREVERB_HF_MU +516 0x0000 //TX_DEREVERB_DELAY +517 0x0000 //TX_DEREVERB_COEF_LEN +518 0x0000 //TX_DEREVERB_DNR +519 0x0000 //TX_DEREVERB_ALPHA +520 0x0000 //TX_DEREVERB_BETA +521 0x0000 //TX_GSC_RTOL_TH +522 0x0000 //TX_GSC_RTOH_TH +523 0x0000 //TX_WIDE2_MEANHTH 524 0x0000 //TX_DR_RESRV_5 525 0x0000 //TX_DR_RESRV_6 526 0x0000 //TX_DR_RESRV_7 @@ -6163,8 +8915,73 @@ 894 0xC000 //TX_FASTNS_SSA_THHFL 895 0xCCCC //TX_FASTNS_SSA_THLFH 896 0xD999 //TX_FASTNS_SSA_THHFH +897 0x0000 //TX_SENDFUNC_REG_MICMUTE +898 0x0000 //TX_SENDFUNC_REG_MICMUTE1 +899 0x0000 //TX_MICMUTE_RATIO_THR +900 0x0000 //TX_MICMUTE_AMP_THR +901 0x0000 //TX_MICMUTE_HPF_IND +902 0x0000 //TX_MICMUTE_LOG_EYR_TH +903 0x0000 //TX_MICMUTE_CVG_TIME +904 0x0000 //TX_MICMUTE_RELEASE_TIME +905 0x0000 //TX_MIC_VOLUME_MIC0MUTE +906 0x0000 //TX_MICMUTE_EPD_OFFSET_0 +907 0x0000 //TX_MICMUTE_FRQ_AEC_L +908 0x0000 //TX_MICMUTE_EAD_THR +909 0x0000 //TX_MICMUTE_LAMBDA_CB_NLE +910 0x0000 //TX_MICMUTE_LAMBDA_RE_EST +911 0x0000 //TX_DTD_THR1_MICMUTE_0 +912 0x0000 //TX_DTD_THR1_MICMUTE_1 +913 0x0000 //TX_DTD_THR1_MICMUTE_2 +914 0x0000 //TX_DTD_THR1_MICMUTE_3 +915 0x0000 //TX_DTD_THR2_MICMUTE_0 +916 0x0000 //TX_MICMUTE_MIN_EQ_RE_EST_0 +917 0x0000 //TX_MICMUTE_MIN_EQ_RE_EST_1 +918 0x0000 //TX_MICMUTE_MIN_EQ_RE_EST_2 +919 0x0000 //TX_MICMUTE_MIN_EQ_RE_EST_3 +920 0x0000 //TX_MICMUTE_MIN_EQ_RE_EST_4 +921 0x0000 //TX_MICMUTE_C_POST_FLT +922 0x0000 //TX_MICMUTE_DT_CUT_K +923 0x0000 //TX_MICMUTE_DT_CUT_THR +924 0x0000 //TX_MICMUTE_DT_CUT_K2 +925 0x0000 //TX_MICMUTE_DT_CUT_THR2 +926 0x0000 //TX_MICMUTE_DT2_HOLD_N +927 0x0000 //TX_MICMUTE_RATIODTH_THCUT +928 0x0000 //TX_MICMUTE_B_POST_FLT_ECHOL +929 0x0000 //TX_MICMUTE_B_POST_FLT_ECHOH +930 0x0000 //TX_MICMUTE_C_POST_FLT_MASK +931 0x0000 //TX_MICMUTE_RATIODTL_CUT_TH +932 0x0000 //TX_MICMUTE_DT_CUT_K1 +933 0x0000 //TX_MICMUTE_N2_SN_EST +934 0x0000 //TX_MICMUTE_THR_SN_EST_0 +935 0x0000 //TX_MICMUTE_MIN_G_CTRL_0 +936 0x0000 //TX_MICMUTE_A_POST_FILT_S_0 +937 0x0000 //TX_MICMUTE_B_POST_FILT_0 +938 0x0000 //TX_MIC1RUB_AMP_THR +939 0x0000 //TX_MIC1MUTE_RATIO_THR +940 0x0000 //TX_MIC1MUTE_AMP_THR +941 0x0000 //TX_MIC1MUTE_CVG_TIME +942 0x0000 //TX_MIC1MUTE_RELEASE_TIME +943 0x0000 //TX_AMS_RESRV_01 +944 0x0000 //TX_AMS_RESRV_02 +945 0x0000 //TX_AMS_RESRV_03 +946 0x0000 //TX_AMS_RESRV_04 +947 0x0000 //TX_AMS_RESRV_05 +948 0x0000 //TX_AMS_RESRV_06 +949 0x0000 //TX_AMS_RESRV_07 +950 0x0000 //TX_AMS_RESRV_08 +951 0x0000 //TX_AMS_RESRV_09 +952 0x0000 //TX_AMS_RESRV_10 +953 0x0000 //TX_AMS_RESRV_11 +954 0x0000 //TX_AMS_RESRV_12 +955 0x0000 //TX_AMS_RESRV_13 +956 0x0000 //TX_AMS_RESRV_14 +957 0x0000 //TX_AMS_RESRV_15 +958 0x0000 //TX_AMS_RESRV_16 +959 0x0000 //TX_AMS_RESRV_17 +960 0x0000 //TX_AMS_RESRV_18 +961 0x0000 //TX_AMS_RESRV_19 #RX -0 0x0064 //RX_RECVFUNC_MODE_0 +0 0x2064 //RX_RECVFUNC_MODE_0 1 0x0000 //RX_RECVFUNC_MODE_1 2 0x0003 //RX_SAMPLINGFREQ_SIG 3 0x0003 //RX_SAMPLINGFREQ_PROC @@ -7014,10 +9831,862 @@ 110 0x0000 //RX_FDDRC_RESRV_0 129 0x0100 //RX_SPK_VOL 130 0x0000 //RX_VOL_RESRV_0 +#RX 2 +157 0x2064 //RX_RECVFUNC_MODE_0 +158 0x0000 //RX_RECVFUNC_MODE_1 +159 0x0003 //RX_SAMPLINGFREQ_SIG +160 0x0003 //RX_SAMPLINGFREQ_PROC +161 0x000A //RX_FRAME_SZ +162 0x0000 //RX_DELAY_OPT +163 0x3000 //RX_TDDRC_ALPHA_UP_1 +164 0x3000 //RX_TDDRC_ALPHA_UP_2 +165 0x3000 //RX_TDDRC_ALPHA_UP_3 +166 0x3000 //RX_TDDRC_ALPHA_UP_4 +167 0x0800 //RX_PGA +168 0x7FFF //RX_A_HP +169 0x0000 //RX_B_PE +170 0x1800 //RX_THR_PITCH_DET_0 +171 0x1000 //RX_THR_PITCH_DET_1 +172 0x0800 //RX_THR_PITCH_DET_2 +173 0x0008 //RX_PITCH_BFR_LEN +174 0x0003 //RX_SBD_PITCH_DET +175 0x0100 //RX_PP_RESRV_0 +176 0x0020 //RX_PP_RESRV_1 +177 0x0400 //RX_N_SN_EST +178 0x000C //RX_N2_SN_EST +179 0x0003 //RX_NS_LVL_CTRL +180 0x9000 //RX_THR_SN_EST +181 0x7CCD //RX_LAMBDA_PFILT +182 0x000A //RX_FENS_RESRV_0 +183 0x0190 //RX_FENS_RESRV_1 +184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +187 0x0002 //RX_EXTRA_NS_L +188 0x0800 //RX_EXTRA_NS_A +189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +190 0x7FFF //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +192 0x199A //RX_A_POST_FLT +193 0x0000 //RX_LMT_THRD +194 0x4000 //RX_LMT_ALPHA +195 0x0020 //RX_FDEQ_SUBNUM +196 0x4848 //RX_FDEQ_GAIN_0 +197 0x4848 //RX_FDEQ_GAIN_1 +198 0x4848 //RX_FDEQ_GAIN_2 +199 0x4848 //RX_FDEQ_GAIN_3 +200 0x4848 //RX_FDEQ_GAIN_4 +201 0x4848 //RX_FDEQ_GAIN_5 +202 0x4848 //RX_FDEQ_GAIN_6 +203 0x4848 //RX_FDEQ_GAIN_7 +204 0x4848 //RX_FDEQ_GAIN_8 +205 0x4848 //RX_FDEQ_GAIN_9 +206 0x4848 //RX_FDEQ_GAIN_10 +207 0x4848 //RX_FDEQ_GAIN_11 +208 0x4848 //RX_FDEQ_GAIN_12 +209 0x4848 //RX_FDEQ_GAIN_13 +210 0x4848 //RX_FDEQ_GAIN_14 +211 0x4848 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0202 //RX_FDEQ_BIN_0 +221 0x0203 //RX_FDEQ_BIN_1 +222 0x0303 //RX_FDEQ_BIN_2 +223 0x0304 //RX_FDEQ_BIN_3 +224 0x0405 //RX_FDEQ_BIN_4 +225 0x0506 //RX_FDEQ_BIN_5 +226 0x0708 //RX_FDEQ_BIN_6 +227 0x090A //RX_FDEQ_BIN_7 +228 0x0B0C //RX_FDEQ_BIN_8 +229 0x0D0E //RX_FDEQ_BIN_9 +230 0x1013 //RX_FDEQ_BIN_10 +231 0x1719 //RX_FDEQ_BIN_11 +232 0x1B1E //RX_FDEQ_BIN_12 +233 0x1E1E //RX_FDEQ_BIN_13 +234 0x1E28 //RX_FDEQ_BIN_14 +235 0x282C //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x4000 //RX_FDEQ_RESRV_0 +245 0x0320 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0030 //RX_FDDRC_BAND_MARGIN_1 +248 0x0050 //RX_FDDRC_BAND_MARGIN_2 +249 0x0080 //RX_FDDRC_BAND_MARGIN_3 +250 0x0007 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x5000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x6400 //RX_FDDRC_THRD_3_2 +258 0x6400 //RX_FDDRC_THRD_3_3 +259 0x2000 //RX_FDDRC_SLANT_0_0 +260 0x2000 //RX_FDDRC_SLANT_0_1 +261 0x2000 //RX_FDDRC_SLANT_0_2 +262 0x2000 //RX_FDDRC_SLANT_0_3 +263 0x5333 //RX_FDDRC_SLANT_1_0 +264 0x5333 //RX_FDDRC_SLANT_1_1 +265 0x5333 //RX_FDDRC_SLANT_1_2 +266 0x5333 //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +268 0x0000 //RX_FILTINDX +269 0x0000 //RX_TDDRC_THRD_0 +270 0x0000 //RX_TDDRC_THRD_1 +271 0x7FFF //RX_TDDRC_THRD_2 +272 0x7FFF //RX_TDDRC_THRD_3 +273 0x7FFF //RX_TDDRC_SLANT_0 +274 0x7FFF //RX_TDDRC_SLANT_1 +275 0x3000 //RX_TDDRC_ALPHA_UP_0 +276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x199A //RX_TDDRC_HMNC_GAIN +279 0x0001 //RX_TDDRC_SMT_FLAG +280 0x0CCD //RX_TDDRC_SMT_W +281 0x0155 //RX_TDDRC_DRC_GAIN +282 0x7C00 //RX_LAMBDA_PKA_FP +283 0x2000 //RX_TPKA_FP +284 0x2000 //RX_MIN_G_FP +285 0x0080 //RX_MAX_G_FP +286 0x0100 //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 +288 0x0000 //RX_MAXLEVEL_CNG +289 0x3000 //RX_BWE_UV_TH +290 0x3000 //RX_BWE_UV_TH2 +291 0x1800 //RX_BWE_UV_TH3 +292 0x1000 //RX_BWE_V_TH +293 0x04CD //RX_BWE_GAIN1_V_TH1 +294 0x0F33 //RX_BWE_GAIN1_V_TH2 +295 0x7333 //RX_BWE_UV_EQ +296 0x199A //RX_BWE_V_EQ +297 0x7333 //RX_BWE_TONE_TH +298 0x0004 //RX_BWE_UV_HOLD_T +299 0x6CCD //RX_BWE_GAIN2_ALPHA +300 0x799A //RX_BWE_GAIN3_ALPHA +301 0x001E //RX_BWE_CUTOFF +302 0x3000 //RX_BWE_GAINFILL +303 0x3200 //RX_BWE_MAXTH_TONE +304 0x2000 //RX_BWE_EQ_0 +305 0x2000 //RX_BWE_EQ_1 +306 0x2000 //RX_BWE_EQ_2 +307 0x2000 //RX_BWE_EQ_3 +308 0x2000 //RX_BWE_EQ_4 +309 0x2000 //RX_BWE_EQ_5 +310 0x2000 //RX_BWE_EQ_6 +311 0x0000 //RX_BWE_RESRV_0 +312 0x0000 //RX_BWE_RESRV_1 +313 0x0000 //RX_BWE_RESRV_2 +#VOL 0 +163 0x3000 //RX_TDDRC_ALPHA_UP_1 +164 0x3000 //RX_TDDRC_ALPHA_UP_2 +165 0x3000 //RX_TDDRC_ALPHA_UP_3 +166 0x3000 //RX_TDDRC_ALPHA_UP_4 +184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +190 0x7FFF //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +269 0x0000 //RX_TDDRC_THRD_0 +270 0x0000 //RX_TDDRC_THRD_1 +271 0x7FFF //RX_TDDRC_THRD_2 +272 0x7FFF //RX_TDDRC_THRD_3 +273 0x7FFF //RX_TDDRC_SLANT_0 +274 0x7FFF //RX_TDDRC_SLANT_1 +275 0x3000 //RX_TDDRC_ALPHA_UP_0 +276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x199A //RX_TDDRC_HMNC_GAIN +279 0x0001 //RX_TDDRC_SMT_FLAG +280 0x0CCD //RX_TDDRC_SMT_W +281 0x0155 //RX_TDDRC_DRC_GAIN +195 0x0020 //RX_FDEQ_SUBNUM +196 0x4848 //RX_FDEQ_GAIN_0 +197 0x4848 //RX_FDEQ_GAIN_1 +198 0x4848 //RX_FDEQ_GAIN_2 +199 0x4848 //RX_FDEQ_GAIN_3 +200 0x4848 //RX_FDEQ_GAIN_4 +201 0x4848 //RX_FDEQ_GAIN_5 +202 0x4848 //RX_FDEQ_GAIN_6 +203 0x4848 //RX_FDEQ_GAIN_7 +204 0x4848 //RX_FDEQ_GAIN_8 +205 0x4848 //RX_FDEQ_GAIN_9 +206 0x4848 //RX_FDEQ_GAIN_10 +207 0x4848 //RX_FDEQ_GAIN_11 +208 0x4848 //RX_FDEQ_GAIN_12 +209 0x4848 //RX_FDEQ_GAIN_13 +210 0x4848 //RX_FDEQ_GAIN_14 +211 0x4848 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0202 //RX_FDEQ_BIN_0 +221 0x0203 //RX_FDEQ_BIN_1 +222 0x0303 //RX_FDEQ_BIN_2 +223 0x0304 //RX_FDEQ_BIN_3 +224 0x0405 //RX_FDEQ_BIN_4 +225 0x0506 //RX_FDEQ_BIN_5 +226 0x0708 //RX_FDEQ_BIN_6 +227 0x090A //RX_FDEQ_BIN_7 +228 0x0B0C //RX_FDEQ_BIN_8 +229 0x0D0E //RX_FDEQ_BIN_9 +230 0x1013 //RX_FDEQ_BIN_10 +231 0x1719 //RX_FDEQ_BIN_11 +232 0x1B1E //RX_FDEQ_BIN_12 +233 0x1E1E //RX_FDEQ_BIN_13 +234 0x1E28 //RX_FDEQ_BIN_14 +235 0x282C //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x4000 //RX_FDEQ_RESRV_0 +245 0x0320 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0030 //RX_FDDRC_BAND_MARGIN_1 +248 0x0050 //RX_FDDRC_BAND_MARGIN_2 +249 0x0080 //RX_FDDRC_BAND_MARGIN_3 +250 0x0007 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x5000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x6400 //RX_FDDRC_THRD_3_2 +258 0x6400 //RX_FDDRC_THRD_3_3 +259 0x2000 //RX_FDDRC_SLANT_0_0 +260 0x2000 //RX_FDDRC_SLANT_0_1 +261 0x2000 //RX_FDDRC_SLANT_0_2 +262 0x2000 //RX_FDDRC_SLANT_0_3 +263 0x5333 //RX_FDDRC_SLANT_1_0 +264 0x5333 //RX_FDDRC_SLANT_1_1 +265 0x5333 //RX_FDDRC_SLANT_1_2 +266 0x5333 //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +286 0x0100 //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 +#VOL 1 +163 0x3000 //RX_TDDRC_ALPHA_UP_1 +164 0x3000 //RX_TDDRC_ALPHA_UP_2 +165 0x3000 //RX_TDDRC_ALPHA_UP_3 +166 0x3000 //RX_TDDRC_ALPHA_UP_4 +184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +190 0x7FFF //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +269 0x0000 //RX_TDDRC_THRD_0 +270 0x0000 //RX_TDDRC_THRD_1 +271 0x7FFF //RX_TDDRC_THRD_2 +272 0x7FFF //RX_TDDRC_THRD_3 +273 0x7FFF //RX_TDDRC_SLANT_0 +274 0x7FFF //RX_TDDRC_SLANT_1 +275 0x3000 //RX_TDDRC_ALPHA_UP_0 +276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x199A //RX_TDDRC_HMNC_GAIN +279 0x0001 //RX_TDDRC_SMT_FLAG +280 0x0CCD //RX_TDDRC_SMT_W +281 0x0155 //RX_TDDRC_DRC_GAIN +195 0x0020 //RX_FDEQ_SUBNUM +196 0x4848 //RX_FDEQ_GAIN_0 +197 0x4848 //RX_FDEQ_GAIN_1 +198 0x4848 //RX_FDEQ_GAIN_2 +199 0x4848 //RX_FDEQ_GAIN_3 +200 0x4848 //RX_FDEQ_GAIN_4 +201 0x4848 //RX_FDEQ_GAIN_5 +202 0x4848 //RX_FDEQ_GAIN_6 +203 0x4848 //RX_FDEQ_GAIN_7 +204 0x4848 //RX_FDEQ_GAIN_8 +205 0x4848 //RX_FDEQ_GAIN_9 +206 0x4848 //RX_FDEQ_GAIN_10 +207 0x4848 //RX_FDEQ_GAIN_11 +208 0x4848 //RX_FDEQ_GAIN_12 +209 0x4848 //RX_FDEQ_GAIN_13 +210 0x4848 //RX_FDEQ_GAIN_14 +211 0x4848 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0202 //RX_FDEQ_BIN_0 +221 0x0203 //RX_FDEQ_BIN_1 +222 0x0303 //RX_FDEQ_BIN_2 +223 0x0304 //RX_FDEQ_BIN_3 +224 0x0405 //RX_FDEQ_BIN_4 +225 0x0506 //RX_FDEQ_BIN_5 +226 0x0708 //RX_FDEQ_BIN_6 +227 0x090A //RX_FDEQ_BIN_7 +228 0x0B0C //RX_FDEQ_BIN_8 +229 0x0D0E //RX_FDEQ_BIN_9 +230 0x1013 //RX_FDEQ_BIN_10 +231 0x1719 //RX_FDEQ_BIN_11 +232 0x1B1E //RX_FDEQ_BIN_12 +233 0x1E1E //RX_FDEQ_BIN_13 +234 0x1E28 //RX_FDEQ_BIN_14 +235 0x282C //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x4000 //RX_FDEQ_RESRV_0 +245 0x0320 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0030 //RX_FDDRC_BAND_MARGIN_1 +248 0x0050 //RX_FDDRC_BAND_MARGIN_2 +249 0x0080 //RX_FDDRC_BAND_MARGIN_3 +250 0x0007 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x5000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x6400 //RX_FDDRC_THRD_3_2 +258 0x6400 //RX_FDDRC_THRD_3_3 +259 0x2000 //RX_FDDRC_SLANT_0_0 +260 0x2000 //RX_FDDRC_SLANT_0_1 +261 0x2000 //RX_FDDRC_SLANT_0_2 +262 0x2000 //RX_FDDRC_SLANT_0_3 +263 0x5333 //RX_FDDRC_SLANT_1_0 +264 0x5333 //RX_FDDRC_SLANT_1_1 +265 0x5333 //RX_FDDRC_SLANT_1_2 +266 0x5333 //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +286 0x0100 //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 +#VOL 2 +163 0x3000 //RX_TDDRC_ALPHA_UP_1 +164 0x3000 //RX_TDDRC_ALPHA_UP_2 +165 0x3000 //RX_TDDRC_ALPHA_UP_3 +166 0x3000 //RX_TDDRC_ALPHA_UP_4 +184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +190 0x7FFF //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +269 0x0000 //RX_TDDRC_THRD_0 +270 0x0000 //RX_TDDRC_THRD_1 +271 0x7FFF //RX_TDDRC_THRD_2 +272 0x7FFF //RX_TDDRC_THRD_3 +273 0x7FFF //RX_TDDRC_SLANT_0 +274 0x7FFF //RX_TDDRC_SLANT_1 +275 0x3000 //RX_TDDRC_ALPHA_UP_0 +276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x199A //RX_TDDRC_HMNC_GAIN +279 0x0001 //RX_TDDRC_SMT_FLAG +280 0x0CCD //RX_TDDRC_SMT_W +281 0x0155 //RX_TDDRC_DRC_GAIN +195 0x0020 //RX_FDEQ_SUBNUM +196 0x4848 //RX_FDEQ_GAIN_0 +197 0x4848 //RX_FDEQ_GAIN_1 +198 0x4848 //RX_FDEQ_GAIN_2 +199 0x4848 //RX_FDEQ_GAIN_3 +200 0x4848 //RX_FDEQ_GAIN_4 +201 0x4848 //RX_FDEQ_GAIN_5 +202 0x4848 //RX_FDEQ_GAIN_6 +203 0x4848 //RX_FDEQ_GAIN_7 +204 0x4848 //RX_FDEQ_GAIN_8 +205 0x4848 //RX_FDEQ_GAIN_9 +206 0x4848 //RX_FDEQ_GAIN_10 +207 0x4848 //RX_FDEQ_GAIN_11 +208 0x4848 //RX_FDEQ_GAIN_12 +209 0x4848 //RX_FDEQ_GAIN_13 +210 0x4848 //RX_FDEQ_GAIN_14 +211 0x4848 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0202 //RX_FDEQ_BIN_0 +221 0x0203 //RX_FDEQ_BIN_1 +222 0x0303 //RX_FDEQ_BIN_2 +223 0x0304 //RX_FDEQ_BIN_3 +224 0x0405 //RX_FDEQ_BIN_4 +225 0x0506 //RX_FDEQ_BIN_5 +226 0x0708 //RX_FDEQ_BIN_6 +227 0x090A //RX_FDEQ_BIN_7 +228 0x0B0C //RX_FDEQ_BIN_8 +229 0x0D0E //RX_FDEQ_BIN_9 +230 0x1013 //RX_FDEQ_BIN_10 +231 0x1719 //RX_FDEQ_BIN_11 +232 0x1B1E //RX_FDEQ_BIN_12 +233 0x1E1E //RX_FDEQ_BIN_13 +234 0x1E28 //RX_FDEQ_BIN_14 +235 0x282C //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x4000 //RX_FDEQ_RESRV_0 +245 0x0320 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0030 //RX_FDDRC_BAND_MARGIN_1 +248 0x0050 //RX_FDDRC_BAND_MARGIN_2 +249 0x0080 //RX_FDDRC_BAND_MARGIN_3 +250 0x0007 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x5000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x6400 //RX_FDDRC_THRD_3_2 +258 0x6400 //RX_FDDRC_THRD_3_3 +259 0x2000 //RX_FDDRC_SLANT_0_0 +260 0x2000 //RX_FDDRC_SLANT_0_1 +261 0x2000 //RX_FDDRC_SLANT_0_2 +262 0x2000 //RX_FDDRC_SLANT_0_3 +263 0x5333 //RX_FDDRC_SLANT_1_0 +264 0x5333 //RX_FDDRC_SLANT_1_1 +265 0x5333 //RX_FDDRC_SLANT_1_2 +266 0x5333 //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +286 0x0100 //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 +#VOL 3 +163 0x3000 //RX_TDDRC_ALPHA_UP_1 +164 0x3000 //RX_TDDRC_ALPHA_UP_2 +165 0x3000 //RX_TDDRC_ALPHA_UP_3 +166 0x3000 //RX_TDDRC_ALPHA_UP_4 +184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +190 0x7FFF //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +269 0x0000 //RX_TDDRC_THRD_0 +270 0x0000 //RX_TDDRC_THRD_1 +271 0x7FFF //RX_TDDRC_THRD_2 +272 0x7FFF //RX_TDDRC_THRD_3 +273 0x7FFF //RX_TDDRC_SLANT_0 +274 0x7FFF //RX_TDDRC_SLANT_1 +275 0x3000 //RX_TDDRC_ALPHA_UP_0 +276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x199A //RX_TDDRC_HMNC_GAIN +279 0x0001 //RX_TDDRC_SMT_FLAG +280 0x0CCD //RX_TDDRC_SMT_W +281 0x0155 //RX_TDDRC_DRC_GAIN +195 0x0020 //RX_FDEQ_SUBNUM +196 0x4848 //RX_FDEQ_GAIN_0 +197 0x4848 //RX_FDEQ_GAIN_1 +198 0x4848 //RX_FDEQ_GAIN_2 +199 0x4848 //RX_FDEQ_GAIN_3 +200 0x4848 //RX_FDEQ_GAIN_4 +201 0x4848 //RX_FDEQ_GAIN_5 +202 0x4848 //RX_FDEQ_GAIN_6 +203 0x4848 //RX_FDEQ_GAIN_7 +204 0x4848 //RX_FDEQ_GAIN_8 +205 0x4848 //RX_FDEQ_GAIN_9 +206 0x4848 //RX_FDEQ_GAIN_10 +207 0x4848 //RX_FDEQ_GAIN_11 +208 0x4848 //RX_FDEQ_GAIN_12 +209 0x4848 //RX_FDEQ_GAIN_13 +210 0x4848 //RX_FDEQ_GAIN_14 +211 0x4848 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0202 //RX_FDEQ_BIN_0 +221 0x0203 //RX_FDEQ_BIN_1 +222 0x0303 //RX_FDEQ_BIN_2 +223 0x0304 //RX_FDEQ_BIN_3 +224 0x0405 //RX_FDEQ_BIN_4 +225 0x0506 //RX_FDEQ_BIN_5 +226 0x0708 //RX_FDEQ_BIN_6 +227 0x090A //RX_FDEQ_BIN_7 +228 0x0B0C //RX_FDEQ_BIN_8 +229 0x0D0E //RX_FDEQ_BIN_9 +230 0x1013 //RX_FDEQ_BIN_10 +231 0x1719 //RX_FDEQ_BIN_11 +232 0x1B1E //RX_FDEQ_BIN_12 +233 0x1E1E //RX_FDEQ_BIN_13 +234 0x1E28 //RX_FDEQ_BIN_14 +235 0x282C //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x4000 //RX_FDEQ_RESRV_0 +245 0x0320 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0030 //RX_FDDRC_BAND_MARGIN_1 +248 0x0050 //RX_FDDRC_BAND_MARGIN_2 +249 0x0080 //RX_FDDRC_BAND_MARGIN_3 +250 0x0007 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x5000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x6400 //RX_FDDRC_THRD_3_2 +258 0x6400 //RX_FDDRC_THRD_3_3 +259 0x2000 //RX_FDDRC_SLANT_0_0 +260 0x2000 //RX_FDDRC_SLANT_0_1 +261 0x2000 //RX_FDDRC_SLANT_0_2 +262 0x2000 //RX_FDDRC_SLANT_0_3 +263 0x5333 //RX_FDDRC_SLANT_1_0 +264 0x5333 //RX_FDDRC_SLANT_1_1 +265 0x5333 //RX_FDDRC_SLANT_1_2 +266 0x5333 //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +286 0x0100 //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 +#VOL 4 +163 0x3000 //RX_TDDRC_ALPHA_UP_1 +164 0x3000 //RX_TDDRC_ALPHA_UP_2 +165 0x3000 //RX_TDDRC_ALPHA_UP_3 +166 0x3000 //RX_TDDRC_ALPHA_UP_4 +184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +190 0x7FFF //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +269 0x0000 //RX_TDDRC_THRD_0 +270 0x0000 //RX_TDDRC_THRD_1 +271 0x7FFF //RX_TDDRC_THRD_2 +272 0x7FFF //RX_TDDRC_THRD_3 +273 0x7FFF //RX_TDDRC_SLANT_0 +274 0x7FFF //RX_TDDRC_SLANT_1 +275 0x3000 //RX_TDDRC_ALPHA_UP_0 +276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x199A //RX_TDDRC_HMNC_GAIN +279 0x0001 //RX_TDDRC_SMT_FLAG +280 0x0CCD //RX_TDDRC_SMT_W +281 0x0155 //RX_TDDRC_DRC_GAIN +195 0x0020 //RX_FDEQ_SUBNUM +196 0x4848 //RX_FDEQ_GAIN_0 +197 0x4848 //RX_FDEQ_GAIN_1 +198 0x4848 //RX_FDEQ_GAIN_2 +199 0x4848 //RX_FDEQ_GAIN_3 +200 0x4848 //RX_FDEQ_GAIN_4 +201 0x4848 //RX_FDEQ_GAIN_5 +202 0x4848 //RX_FDEQ_GAIN_6 +203 0x4848 //RX_FDEQ_GAIN_7 +204 0x4848 //RX_FDEQ_GAIN_8 +205 0x4848 //RX_FDEQ_GAIN_9 +206 0x4848 //RX_FDEQ_GAIN_10 +207 0x4848 //RX_FDEQ_GAIN_11 +208 0x4848 //RX_FDEQ_GAIN_12 +209 0x4848 //RX_FDEQ_GAIN_13 +210 0x4848 //RX_FDEQ_GAIN_14 +211 0x4848 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0202 //RX_FDEQ_BIN_0 +221 0x0203 //RX_FDEQ_BIN_1 +222 0x0303 //RX_FDEQ_BIN_2 +223 0x0304 //RX_FDEQ_BIN_3 +224 0x0405 //RX_FDEQ_BIN_4 +225 0x0506 //RX_FDEQ_BIN_5 +226 0x0708 //RX_FDEQ_BIN_6 +227 0x090A //RX_FDEQ_BIN_7 +228 0x0B0C //RX_FDEQ_BIN_8 +229 0x0D0E //RX_FDEQ_BIN_9 +230 0x1013 //RX_FDEQ_BIN_10 +231 0x1719 //RX_FDEQ_BIN_11 +232 0x1B1E //RX_FDEQ_BIN_12 +233 0x1E1E //RX_FDEQ_BIN_13 +234 0x1E28 //RX_FDEQ_BIN_14 +235 0x282C //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x4000 //RX_FDEQ_RESRV_0 +245 0x0320 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0030 //RX_FDDRC_BAND_MARGIN_1 +248 0x0050 //RX_FDDRC_BAND_MARGIN_2 +249 0x0080 //RX_FDDRC_BAND_MARGIN_3 +250 0x0007 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x5000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x6400 //RX_FDDRC_THRD_3_2 +258 0x6400 //RX_FDDRC_THRD_3_3 +259 0x2000 //RX_FDDRC_SLANT_0_0 +260 0x2000 //RX_FDDRC_SLANT_0_1 +261 0x2000 //RX_FDDRC_SLANT_0_2 +262 0x2000 //RX_FDDRC_SLANT_0_3 +263 0x5333 //RX_FDDRC_SLANT_1_0 +264 0x5333 //RX_FDDRC_SLANT_1_1 +265 0x5333 //RX_FDDRC_SLANT_1_2 +266 0x5333 //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +286 0x0100 //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 +#VOL 5 +163 0x3000 //RX_TDDRC_ALPHA_UP_1 +164 0x3000 //RX_TDDRC_ALPHA_UP_2 +165 0x3000 //RX_TDDRC_ALPHA_UP_3 +166 0x3000 //RX_TDDRC_ALPHA_UP_4 +184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +190 0x7FFF //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +269 0x0000 //RX_TDDRC_THRD_0 +270 0x0000 //RX_TDDRC_THRD_1 +271 0x7FFF //RX_TDDRC_THRD_2 +272 0x7FFF //RX_TDDRC_THRD_3 +273 0x7FFF //RX_TDDRC_SLANT_0 +274 0x7FFF //RX_TDDRC_SLANT_1 +275 0x3000 //RX_TDDRC_ALPHA_UP_0 +276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x199A //RX_TDDRC_HMNC_GAIN +279 0x0001 //RX_TDDRC_SMT_FLAG +280 0x0CCD //RX_TDDRC_SMT_W +281 0x0155 //RX_TDDRC_DRC_GAIN +195 0x0020 //RX_FDEQ_SUBNUM +196 0x4848 //RX_FDEQ_GAIN_0 +197 0x4848 //RX_FDEQ_GAIN_1 +198 0x4848 //RX_FDEQ_GAIN_2 +199 0x4848 //RX_FDEQ_GAIN_3 +200 0x4848 //RX_FDEQ_GAIN_4 +201 0x4848 //RX_FDEQ_GAIN_5 +202 0x4848 //RX_FDEQ_GAIN_6 +203 0x4848 //RX_FDEQ_GAIN_7 +204 0x4848 //RX_FDEQ_GAIN_8 +205 0x4848 //RX_FDEQ_GAIN_9 +206 0x4848 //RX_FDEQ_GAIN_10 +207 0x4848 //RX_FDEQ_GAIN_11 +208 0x4848 //RX_FDEQ_GAIN_12 +209 0x4848 //RX_FDEQ_GAIN_13 +210 0x4848 //RX_FDEQ_GAIN_14 +211 0x4848 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0202 //RX_FDEQ_BIN_0 +221 0x0203 //RX_FDEQ_BIN_1 +222 0x0303 //RX_FDEQ_BIN_2 +223 0x0304 //RX_FDEQ_BIN_3 +224 0x0405 //RX_FDEQ_BIN_4 +225 0x0506 //RX_FDEQ_BIN_5 +226 0x0708 //RX_FDEQ_BIN_6 +227 0x090A //RX_FDEQ_BIN_7 +228 0x0B0C //RX_FDEQ_BIN_8 +229 0x0D0E //RX_FDEQ_BIN_9 +230 0x1013 //RX_FDEQ_BIN_10 +231 0x1719 //RX_FDEQ_BIN_11 +232 0x1B1E //RX_FDEQ_BIN_12 +233 0x1E1E //RX_FDEQ_BIN_13 +234 0x1E28 //RX_FDEQ_BIN_14 +235 0x282C //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x4000 //RX_FDEQ_RESRV_0 +245 0x0320 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0030 //RX_FDDRC_BAND_MARGIN_1 +248 0x0050 //RX_FDDRC_BAND_MARGIN_2 +249 0x0080 //RX_FDDRC_BAND_MARGIN_3 +250 0x0007 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x5000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x6400 //RX_FDDRC_THRD_3_2 +258 0x6400 //RX_FDDRC_THRD_3_3 +259 0x2000 //RX_FDDRC_SLANT_0_0 +260 0x2000 //RX_FDDRC_SLANT_0_1 +261 0x2000 //RX_FDDRC_SLANT_0_2 +262 0x2000 //RX_FDDRC_SLANT_0_3 +263 0x5333 //RX_FDDRC_SLANT_1_0 +264 0x5333 //RX_FDDRC_SLANT_1_1 +265 0x5333 //RX_FDDRC_SLANT_1_2 +266 0x5333 //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +286 0x0100 //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 +#VOL 6 +163 0x3000 //RX_TDDRC_ALPHA_UP_1 +164 0x3000 //RX_TDDRC_ALPHA_UP_2 +165 0x3000 //RX_TDDRC_ALPHA_UP_3 +166 0x3000 //RX_TDDRC_ALPHA_UP_4 +184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +190 0x7FFF //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +269 0x0000 //RX_TDDRC_THRD_0 +270 0x0000 //RX_TDDRC_THRD_1 +271 0x7FFF //RX_TDDRC_THRD_2 +272 0x7FFF //RX_TDDRC_THRD_3 +273 0x7FFF //RX_TDDRC_SLANT_0 +274 0x7FFF //RX_TDDRC_SLANT_1 +275 0x3000 //RX_TDDRC_ALPHA_UP_0 +276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x199A //RX_TDDRC_HMNC_GAIN +279 0x0001 //RX_TDDRC_SMT_FLAG +280 0x0CCD //RX_TDDRC_SMT_W +281 0x0155 //RX_TDDRC_DRC_GAIN +195 0x0020 //RX_FDEQ_SUBNUM +196 0x4848 //RX_FDEQ_GAIN_0 +197 0x4848 //RX_FDEQ_GAIN_1 +198 0x4848 //RX_FDEQ_GAIN_2 +199 0x4848 //RX_FDEQ_GAIN_3 +200 0x4848 //RX_FDEQ_GAIN_4 +201 0x4848 //RX_FDEQ_GAIN_5 +202 0x4848 //RX_FDEQ_GAIN_6 +203 0x4848 //RX_FDEQ_GAIN_7 +204 0x4848 //RX_FDEQ_GAIN_8 +205 0x4848 //RX_FDEQ_GAIN_9 +206 0x4848 //RX_FDEQ_GAIN_10 +207 0x4848 //RX_FDEQ_GAIN_11 +208 0x4848 //RX_FDEQ_GAIN_12 +209 0x4848 //RX_FDEQ_GAIN_13 +210 0x4848 //RX_FDEQ_GAIN_14 +211 0x4848 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0202 //RX_FDEQ_BIN_0 +221 0x0203 //RX_FDEQ_BIN_1 +222 0x0303 //RX_FDEQ_BIN_2 +223 0x0304 //RX_FDEQ_BIN_3 +224 0x0405 //RX_FDEQ_BIN_4 +225 0x0506 //RX_FDEQ_BIN_5 +226 0x0708 //RX_FDEQ_BIN_6 +227 0x090A //RX_FDEQ_BIN_7 +228 0x0B0C //RX_FDEQ_BIN_8 +229 0x0D0E //RX_FDEQ_BIN_9 +230 0x1013 //RX_FDEQ_BIN_10 +231 0x1719 //RX_FDEQ_BIN_11 +232 0x1B1E //RX_FDEQ_BIN_12 +233 0x1E1E //RX_FDEQ_BIN_13 +234 0x1E28 //RX_FDEQ_BIN_14 +235 0x282C //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x4000 //RX_FDEQ_RESRV_0 +245 0x0320 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0030 //RX_FDDRC_BAND_MARGIN_1 +248 0x0050 //RX_FDDRC_BAND_MARGIN_2 +249 0x0080 //RX_FDDRC_BAND_MARGIN_3 +250 0x0007 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x5000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x6400 //RX_FDDRC_THRD_3_2 +258 0x6400 //RX_FDDRC_THRD_3_3 +259 0x2000 //RX_FDDRC_SLANT_0_0 +260 0x2000 //RX_FDDRC_SLANT_0_1 +261 0x2000 //RX_FDDRC_SLANT_0_2 +262 0x2000 //RX_FDDRC_SLANT_0_3 +263 0x5333 //RX_FDDRC_SLANT_1_0 +264 0x5333 //RX_FDDRC_SLANT_1_1 +265 0x5333 //RX_FDDRC_SLANT_1_2 +266 0x5333 //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +286 0x0100 //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 #CASE_NAME BLUETOOTH-BT_HAC-VOICE_GENERIC-FB -#PARAM_TYPE TX+RX -#TOTAL_CUSTOM_STEP 7 +#PARAM_MODE Full +#PARAM_TYPE TX+2RX +#TOTAL_CUSTOM_STEP 7+7 #TX 0 0x0001 //TX_OPERATION_MODE_0 1 0x0001 //TX_OPERATION_MODE_1 @@ -7270,11 +10939,11 @@ 248 0xF800 //TX_THR_SN_EST_6 249 0xF800 //TX_THR_SN_EST_7 250 0x0100 //TX_DELTA_THR_SN_EST_0 -251 0x0200 //TX_DELTA_THR_SN_EST_1 -252 0x0100 //TX_DELTA_THR_SN_EST_2 -253 0x0200 //TX_DELTA_THR_SN_EST_3 +251 0x0100 //TX_DELTA_THR_SN_EST_1 +252 0x0200 //TX_DELTA_THR_SN_EST_2 +253 0x0100 //TX_DELTA_THR_SN_EST_3 254 0x0100 //TX_DELTA_THR_SN_EST_4 -255 0x0100 //TX_DELTA_THR_SN_EST_5 +255 0x0200 //TX_DELTA_THR_SN_EST_5 256 0x0200 //TX_DELTA_THR_SN_EST_6 257 0x0200 //TX_DELTA_THR_SN_EST_7 258 0x4000 //TX_LAMBDA_NN_EST_0 @@ -7302,11 +10971,11 @@ 280 0x1000 //TX_B_POST_FLT_1 281 0x0010 //TX_NS_LVL_CTRL_0 282 0x0014 //TX_NS_LVL_CTRL_1 -283 0x0014 //TX_NS_LVL_CTRL_2 -284 0x0018 //TX_NS_LVL_CTRL_3 -285 0x0016 //TX_NS_LVL_CTRL_4 -286 0x0014 //TX_NS_LVL_CTRL_5 -287 0x0011 //TX_NS_LVL_CTRL_6 +283 0x0018 //TX_NS_LVL_CTRL_2 +284 0x0016 //TX_NS_LVL_CTRL_3 +285 0x0014 //TX_NS_LVL_CTRL_4 +286 0x0011 //TX_NS_LVL_CTRL_5 +287 0x0014 //TX_NS_LVL_CTRL_6 288 0x0011 //TX_NS_LVL_CTRL_7 289 0x000F //TX_MIN_GAIN_S_0 290 0x0010 //TX_MIN_GAIN_S_1 @@ -7324,8 +10993,8 @@ 302 0x4000 //TX_SNRI_SUP_2 303 0x4000 //TX_SNRI_SUP_3 304 0x4000 //TX_SNRI_SUP_4 -305 0x4000 //TX_SNRI_SUP_5 -306 0x50C0 //TX_SNRI_SUP_6 +305 0x50C0 //TX_SNRI_SUP_5 +306 0x4000 //TX_SNRI_SUP_6 307 0x7FFF //TX_SNRI_SUP_7 308 0x7FFF //TX_THR_LFNS 309 0x0018 //TX_G_LFNS @@ -7334,19 +11003,19 @@ 312 0x7FFF //TX_A_POST_FILT_0 313 0x2000 //TX_A_POST_FILT_1 314 0x5000 //TX_A_POST_FILT_S_0 -315 0x6000 //TX_A_POST_FILT_S_1 -316 0x4C00 //TX_A_POST_FILT_S_2 -317 0x4000 //TX_A_POST_FILT_S_3 -318 0x6000 //TX_A_POST_FILT_S_4 -319 0x4000 //TX_A_POST_FILT_S_5 -320 0x5000 //TX_A_POST_FILT_S_6 +315 0x4C00 //TX_A_POST_FILT_S_1 +316 0x4000 //TX_A_POST_FILT_S_2 +317 0x6000 //TX_A_POST_FILT_S_3 +318 0x4000 //TX_A_POST_FILT_S_4 +319 0x5000 //TX_A_POST_FILT_S_5 +320 0x6000 //TX_A_POST_FILT_S_6 321 0x7000 //TX_A_POST_FILT_S_7 322 0x2000 //TX_B_POST_FILT_0 -323 0x1000 //TX_B_POST_FILT_1 +323 0x2000 //TX_B_POST_FILT_1 324 0x2000 //TX_B_POST_FILT_2 -325 0x2000 //TX_B_POST_FILT_3 +325 0x4000 //TX_B_POST_FILT_3 326 0x4000 //TX_B_POST_FILT_4 -327 0x4000 //TX_B_POST_FILT_5 +327 0x1000 //TX_B_POST_FILT_5 328 0x1000 //TX_B_POST_FILT_6 329 0x2000 //TX_B_POST_FILT_7 330 0x4000 //TX_B_LESSCUT_RTO_S_0 @@ -7354,14 +11023,14 @@ 332 0x7FFF //TX_B_LESSCUT_RTO_S_2 333 0x7FFF //TX_B_LESSCUT_RTO_S_3 334 0x7FFF //TX_B_LESSCUT_RTO_S_4 -335 0x7FFF //TX_B_LESSCUT_RTO_S_5 -336 0x6000 //TX_B_LESSCUT_RTO_S_6 +335 0x6000 //TX_B_LESSCUT_RTO_S_5 +336 0x7FFF //TX_B_LESSCUT_RTO_S_6 337 0x7FFF //TX_B_LESSCUT_RTO_S_7 338 0x7C00 //TX_LAMBDA_PFILT 339 0x7C00 //TX_LAMBDA_PFILT_S_0 340 0x7C00 //TX_LAMBDA_PFILT_S_1 -341 0x7C00 //TX_LAMBDA_PFILT_S_2 -342 0x7A00 //TX_LAMBDA_PFILT_S_3 +341 0x7A00 //TX_LAMBDA_PFILT_S_2 +342 0x7C00 //TX_LAMBDA_PFILT_S_3 343 0x7C00 //TX_LAMBDA_PFILT_S_4 344 0x7C00 //TX_LAMBDA_PFILT_S_5 345 0x7C00 //TX_LAMBDA_PFILT_S_6 @@ -7399,10 +11068,10 @@ 377 0x7FFF //TX_NOISE_TH_5_4 378 0x2710 //TX_NOISE_TH_6 379 0x0033 //TX_MINENOISE_TH -380 0x4000 //TX_MINENOISE_MIC0_TH_MTS -381 0xFFEE //TX_MINENOISE_MIC0_TH_EXP -382 0x6000 //TX_MINENOISE_MIC0_S_TH_MTS -383 0xFFF3 //TX_MINENOISE_MIC0_S_TH_EXP +380 0x4000 //TX_MORENS_TFMASK_TH +381 0xFFEE //TX_DRC_QUIET_FLOOR +382 0x6000 //TX_RATIODTL_CUT_TH +383 0xFFF3 //TX_DT_CUT_K1 384 0x0666 //TX_OUT_ENER_S_TH_CLEAN 385 0x0666 //TX_OUT_ENER_S_TH_LESSCLEAN 386 0x0333 //TX_OUT_ENER_S_TH_NOISY @@ -7410,15 +11079,15 @@ 388 0x0333 //TX_OUT_ENER_TH_SPEECH 389 0x2000 //TX_SN_NPB_GAIN 390 0x0000 //TX_NN_NPB_GAIN -391 0x0000 //TX_CSX_ALPHA_0 -392 0x0000 //TX_CSX_ALPHA_1 -393 0x0000 //TX_CSX_ALPHA_2 -394 0x0000 //TX_CSX_ALPHA_3 -395 0x0800 //TX_MU_ARSP_EST -396 0x00C8 //TX_P_OUTBEAM_MIN_TH +391 0x0000 //TX_POST_MASK_SUP_HSNE +392 0x0000 //TX_TAIL_DET_TH +393 0x0000 //TX_B_LESSCUT_RTO_WTA +394 0x0000 //TX_MEL_G_R +395 0x0800 //TX_SUPHIGH_TH +396 0x00C8 //TX_MASK_G_R 397 0x0002 //TX_EXTRA_NS_L -398 0x0800 //TX_EXTRA_NS_A -399 0x0005 //TX_VR_NOISE_FLOOR_TH +398 0x0800 //TX_C_POST_FLT_MASK +399 0x0005 //TX_A_POST_FLT_WNS 400 0x0148 //TX_MIN_G_LOW300HZ 401 0x0002 //TX_MAXLEVEL_CNG 402 0x00B4 //TX_STN_NOISE_TH @@ -7533,16 +11202,16 @@ 511 0x6666 //TX_MIC_TO_BFGAIN 512 0x0000 //TX_MICTOBFGAIN0 513 0x0000 //TX_FASTMUE_TH -514 0x0000 //TX_DERVB_LEN_0 -515 0x0000 //TX_DERVB_LEN_1 -516 0x0000 //TX_RHO_DERVB -517 0x0000 //TX_MIC_INDX_DERVB -518 0x0000 //TX_MU_DERVB -519 0x0000 //TX_DR_RESRV_0 -520 0x0000 //TX_DR_RESRV_1 -521 0x0000 //TX_DR_RESRV_2 -522 0x0000 //TX_DR_RESRV_3 -523 0x0000 //TX_DR_RESRV_4 +514 0x0000 //TX_DEREVERB_LF_MU +515 0x0000 //TX_DEREVERB_HF_MU +516 0x0000 //TX_DEREVERB_DELAY +517 0x0000 //TX_DEREVERB_COEF_LEN +518 0x0000 //TX_DEREVERB_DNR +519 0x0000 //TX_DEREVERB_ALPHA +520 0x0000 //TX_DEREVERB_BETA +521 0x0000 //TX_GSC_RTOL_TH +522 0x0000 //TX_GSC_RTOH_TH +523 0x0000 //TX_WIDE2_MEANHTH 524 0x0000 //TX_DR_RESRV_5 525 0x0000 //TX_DR_RESRV_6 526 0x0000 //TX_DR_RESRV_7 @@ -7916,6 +11585,71 @@ 894 0xC000 //TX_FASTNS_SSA_THHFL 895 0xCCCC //TX_FASTNS_SSA_THLFH 896 0xD999 //TX_FASTNS_SSA_THHFH +897 0x0000 //TX_SENDFUNC_REG_MICMUTE +898 0x0000 //TX_SENDFUNC_REG_MICMUTE1 +899 0x0000 //TX_MICMUTE_RATIO_THR +900 0x0000 //TX_MICMUTE_AMP_THR +901 0x0000 //TX_MICMUTE_HPF_IND +902 0x0000 //TX_MICMUTE_LOG_EYR_TH +903 0x0000 //TX_MICMUTE_CVG_TIME +904 0x0000 //TX_MICMUTE_RELEASE_TIME +905 0x0000 //TX_MIC_VOLUME_MIC0MUTE +906 0x0000 //TX_MICMUTE_EPD_OFFSET_0 +907 0x0000 //TX_MICMUTE_FRQ_AEC_L +908 0x0000 //TX_MICMUTE_EAD_THR +909 0x0000 //TX_MICMUTE_LAMBDA_CB_NLE +910 0x0000 //TX_MICMUTE_LAMBDA_RE_EST +911 0x0000 //TX_DTD_THR1_MICMUTE_0 +912 0x0000 //TX_DTD_THR1_MICMUTE_1 +913 0x0000 //TX_DTD_THR1_MICMUTE_2 +914 0x0000 //TX_DTD_THR1_MICMUTE_3 +915 0x0000 //TX_DTD_THR2_MICMUTE_0 +916 0x0000 //TX_MICMUTE_MIN_EQ_RE_EST_0 +917 0x0000 //TX_MICMUTE_MIN_EQ_RE_EST_1 +918 0x0000 //TX_MICMUTE_MIN_EQ_RE_EST_2 +919 0x0000 //TX_MICMUTE_MIN_EQ_RE_EST_3 +920 0x0000 //TX_MICMUTE_MIN_EQ_RE_EST_4 +921 0x0000 //TX_MICMUTE_C_POST_FLT +922 0x0000 //TX_MICMUTE_DT_CUT_K +923 0x0000 //TX_MICMUTE_DT_CUT_THR +924 0x0000 //TX_MICMUTE_DT_CUT_K2 +925 0x0000 //TX_MICMUTE_DT_CUT_THR2 +926 0x0000 //TX_MICMUTE_DT2_HOLD_N +927 0x0000 //TX_MICMUTE_RATIODTH_THCUT +928 0x0000 //TX_MICMUTE_B_POST_FLT_ECHOL +929 0x0000 //TX_MICMUTE_B_POST_FLT_ECHOH +930 0x0000 //TX_MICMUTE_C_POST_FLT_MASK +931 0x0000 //TX_MICMUTE_RATIODTL_CUT_TH +932 0x0000 //TX_MICMUTE_DT_CUT_K1 +933 0x0000 //TX_MICMUTE_N2_SN_EST +934 0x0000 //TX_MICMUTE_THR_SN_EST_0 +935 0x0000 //TX_MICMUTE_MIN_G_CTRL_0 +936 0x0000 //TX_MICMUTE_A_POST_FILT_S_0 +937 0x0000 //TX_MICMUTE_B_POST_FILT_0 +938 0x0000 //TX_MIC1RUB_AMP_THR +939 0x0000 //TX_MIC1MUTE_RATIO_THR +940 0x0000 //TX_MIC1MUTE_AMP_THR +941 0x0000 //TX_MIC1MUTE_CVG_TIME +942 0x0000 //TX_MIC1MUTE_RELEASE_TIME +943 0x0000 //TX_AMS_RESRV_01 +944 0x0000 //TX_AMS_RESRV_02 +945 0x0000 //TX_AMS_RESRV_03 +946 0x0000 //TX_AMS_RESRV_04 +947 0x0000 //TX_AMS_RESRV_05 +948 0x0000 //TX_AMS_RESRV_06 +949 0x0000 //TX_AMS_RESRV_07 +950 0x0000 //TX_AMS_RESRV_08 +951 0x0000 //TX_AMS_RESRV_09 +952 0x0000 //TX_AMS_RESRV_10 +953 0x0000 //TX_AMS_RESRV_11 +954 0x0000 //TX_AMS_RESRV_12 +955 0x0000 //TX_AMS_RESRV_13 +956 0x0000 //TX_AMS_RESRV_14 +957 0x0000 //TX_AMS_RESRV_15 +958 0x0000 //TX_AMS_RESRV_16 +959 0x0000 //TX_AMS_RESRV_17 +960 0x0000 //TX_AMS_RESRV_18 +961 0x0000 //TX_AMS_RESRV_19 #RX 0 0x0064 //RX_RECVFUNC_MODE_0 1 0x0000 //RX_RECVFUNC_MODE_1 @@ -8767,10 +12501,862 @@ 110 0x0000 //RX_FDDRC_RESRV_0 129 0x0100 //RX_SPK_VOL 130 0x0000 //RX_VOL_RESRV_0 +#RX 2 +157 0x0064 //RX_RECVFUNC_MODE_0 +158 0x0000 //RX_RECVFUNC_MODE_1 +159 0x0004 //RX_SAMPLINGFREQ_SIG +160 0x0004 //RX_SAMPLINGFREQ_PROC +161 0x000A //RX_FRAME_SZ +162 0x0000 //RX_DELAY_OPT +163 0x1000 //RX_TDDRC_ALPHA_UP_1 +164 0x1000 //RX_TDDRC_ALPHA_UP_2 +165 0x1000 //RX_TDDRC_ALPHA_UP_3 +166 0x1000 //RX_TDDRC_ALPHA_UP_4 +167 0x0800 //RX_PGA +168 0x7FFF //RX_A_HP +169 0x4000 //RX_B_PE +170 0x7800 //RX_THR_PITCH_DET_0 +171 0x7000 //RX_THR_PITCH_DET_1 +172 0x6000 //RX_THR_PITCH_DET_2 +173 0x0008 //RX_PITCH_BFR_LEN +174 0x0003 //RX_SBD_PITCH_DET +175 0x0100 //RX_PP_RESRV_0 +176 0x0020 //RX_PP_RESRV_1 +177 0x0500 //RX_N_SN_EST +178 0x000C //RX_N2_SN_EST +179 0x000A //RX_NS_LVL_CTRL +180 0xF600 //RX_THR_SN_EST +181 0x7000 //RX_LAMBDA_PFILT +182 0x000A //RX_FENS_RESRV_0 +183 0x0190 //RX_FENS_RESRV_1 +184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +187 0x0002 //RX_EXTRA_NS_L +188 0x0800 //RX_EXTRA_NS_A +189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +190 0x7FFF //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +192 0x199A //RX_A_POST_FLT +193 0x0000 //RX_LMT_THRD +194 0x4000 //RX_LMT_ALPHA +195 0x0020 //RX_FDEQ_SUBNUM +196 0x4848 //RX_FDEQ_GAIN_0 +197 0x4848 //RX_FDEQ_GAIN_1 +198 0x4848 //RX_FDEQ_GAIN_2 +199 0x4848 //RX_FDEQ_GAIN_3 +200 0x4848 //RX_FDEQ_GAIN_4 +201 0x4848 //RX_FDEQ_GAIN_5 +202 0x4848 //RX_FDEQ_GAIN_6 +203 0x4848 //RX_FDEQ_GAIN_7 +204 0x4848 //RX_FDEQ_GAIN_8 +205 0x4848 //RX_FDEQ_GAIN_9 +206 0x4848 //RX_FDEQ_GAIN_10 +207 0x4848 //RX_FDEQ_GAIN_11 +208 0x4848 //RX_FDEQ_GAIN_12 +209 0x4848 //RX_FDEQ_GAIN_13 +210 0x4848 //RX_FDEQ_GAIN_14 +211 0x4848 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0202 //RX_FDEQ_BIN_0 +221 0x0203 //RX_FDEQ_BIN_1 +222 0x0304 //RX_FDEQ_BIN_2 +223 0x0405 //RX_FDEQ_BIN_3 +224 0x0607 //RX_FDEQ_BIN_4 +225 0x0809 //RX_FDEQ_BIN_5 +226 0x0A0B //RX_FDEQ_BIN_6 +227 0x0C0D //RX_FDEQ_BIN_7 +228 0x0E0F //RX_FDEQ_BIN_8 +229 0x1011 //RX_FDEQ_BIN_9 +230 0x1214 //RX_FDEQ_BIN_10 +231 0x1618 //RX_FDEQ_BIN_11 +232 0x1C1C //RX_FDEQ_BIN_12 +233 0x2020 //RX_FDEQ_BIN_13 +234 0x2020 //RX_FDEQ_BIN_14 +235 0x2011 //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x4000 //RX_FDEQ_RESRV_0 +245 0x0320 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0030 //RX_FDDRC_BAND_MARGIN_1 +248 0x0050 //RX_FDDRC_BAND_MARGIN_2 +249 0x0080 //RX_FDDRC_BAND_MARGIN_3 +250 0x0007 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x5000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x6400 //RX_FDDRC_THRD_3_2 +258 0x6400 //RX_FDDRC_THRD_3_3 +259 0x2000 //RX_FDDRC_SLANT_0_0 +260 0x2000 //RX_FDDRC_SLANT_0_1 +261 0x2000 //RX_FDDRC_SLANT_0_2 +262 0x2000 //RX_FDDRC_SLANT_0_3 +263 0x5333 //RX_FDDRC_SLANT_1_0 +264 0x5333 //RX_FDDRC_SLANT_1_1 +265 0x5333 //RX_FDDRC_SLANT_1_2 +266 0x5333 //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +268 0x0000 //RX_FILTINDX +269 0x0000 //RX_TDDRC_THRD_0 +270 0x0000 //RX_TDDRC_THRD_1 +271 0x7FFF //RX_TDDRC_THRD_2 +272 0x7FFF //RX_TDDRC_THRD_3 +273 0x7FFF //RX_TDDRC_SLANT_0 +274 0x7FFF //RX_TDDRC_SLANT_1 +275 0x1000 //RX_TDDRC_ALPHA_UP_0 +276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x199A //RX_TDDRC_HMNC_GAIN +279 0x0001 //RX_TDDRC_SMT_FLAG +280 0x0CCD //RX_TDDRC_SMT_W +281 0x0155 //RX_TDDRC_DRC_GAIN +282 0x7C00 //RX_LAMBDA_PKA_FP +283 0x2000 //RX_TPKA_FP +284 0x2000 //RX_MIN_G_FP +285 0x0080 //RX_MAX_G_FP +286 0x0100 //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 +288 0x0000 //RX_MAXLEVEL_CNG +289 0x3000 //RX_BWE_UV_TH +290 0x3000 //RX_BWE_UV_TH2 +291 0x1800 //RX_BWE_UV_TH3 +292 0x1000 //RX_BWE_V_TH +293 0x04CD //RX_BWE_GAIN1_V_TH1 +294 0x0F33 //RX_BWE_GAIN1_V_TH2 +295 0x7333 //RX_BWE_UV_EQ +296 0x199A //RX_BWE_V_EQ +297 0x7333 //RX_BWE_TONE_TH +298 0x0004 //RX_BWE_UV_HOLD_T +299 0x6CCD //RX_BWE_GAIN2_ALPHA +300 0x799A //RX_BWE_GAIN3_ALPHA +301 0x001E //RX_BWE_CUTOFF +302 0x3000 //RX_BWE_GAINFILL +303 0x3200 //RX_BWE_MAXTH_TONE +304 0x2000 //RX_BWE_EQ_0 +305 0x2000 //RX_BWE_EQ_1 +306 0x2000 //RX_BWE_EQ_2 +307 0x2000 //RX_BWE_EQ_3 +308 0x2000 //RX_BWE_EQ_4 +309 0x2000 //RX_BWE_EQ_5 +310 0x2000 //RX_BWE_EQ_6 +311 0x0000 //RX_BWE_RESRV_0 +312 0x0000 //RX_BWE_RESRV_1 +313 0x0000 //RX_BWE_RESRV_2 +#VOL 0 +163 0x1000 //RX_TDDRC_ALPHA_UP_1 +164 0x1000 //RX_TDDRC_ALPHA_UP_2 +165 0x1000 //RX_TDDRC_ALPHA_UP_3 +166 0x1000 //RX_TDDRC_ALPHA_UP_4 +184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +190 0x7FFF //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +269 0x0000 //RX_TDDRC_THRD_0 +270 0x0000 //RX_TDDRC_THRD_1 +271 0x7FFF //RX_TDDRC_THRD_2 +272 0x7FFF //RX_TDDRC_THRD_3 +273 0x7FFF //RX_TDDRC_SLANT_0 +274 0x7FFF //RX_TDDRC_SLANT_1 +275 0x1000 //RX_TDDRC_ALPHA_UP_0 +276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x199A //RX_TDDRC_HMNC_GAIN +279 0x0001 //RX_TDDRC_SMT_FLAG +280 0x0CCD //RX_TDDRC_SMT_W +281 0x0155 //RX_TDDRC_DRC_GAIN +195 0x0020 //RX_FDEQ_SUBNUM +196 0x4848 //RX_FDEQ_GAIN_0 +197 0x4848 //RX_FDEQ_GAIN_1 +198 0x4848 //RX_FDEQ_GAIN_2 +199 0x4848 //RX_FDEQ_GAIN_3 +200 0x4848 //RX_FDEQ_GAIN_4 +201 0x4848 //RX_FDEQ_GAIN_5 +202 0x4848 //RX_FDEQ_GAIN_6 +203 0x4848 //RX_FDEQ_GAIN_7 +204 0x4848 //RX_FDEQ_GAIN_8 +205 0x4848 //RX_FDEQ_GAIN_9 +206 0x4848 //RX_FDEQ_GAIN_10 +207 0x4848 //RX_FDEQ_GAIN_11 +208 0x4848 //RX_FDEQ_GAIN_12 +209 0x4848 //RX_FDEQ_GAIN_13 +210 0x4848 //RX_FDEQ_GAIN_14 +211 0x4848 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0202 //RX_FDEQ_BIN_0 +221 0x0203 //RX_FDEQ_BIN_1 +222 0x0304 //RX_FDEQ_BIN_2 +223 0x0405 //RX_FDEQ_BIN_3 +224 0x0607 //RX_FDEQ_BIN_4 +225 0x0809 //RX_FDEQ_BIN_5 +226 0x0A0B //RX_FDEQ_BIN_6 +227 0x0C0D //RX_FDEQ_BIN_7 +228 0x0E0F //RX_FDEQ_BIN_8 +229 0x1011 //RX_FDEQ_BIN_9 +230 0x1214 //RX_FDEQ_BIN_10 +231 0x1618 //RX_FDEQ_BIN_11 +232 0x1C1C //RX_FDEQ_BIN_12 +233 0x2020 //RX_FDEQ_BIN_13 +234 0x2020 //RX_FDEQ_BIN_14 +235 0x2011 //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x4000 //RX_FDEQ_RESRV_0 +245 0x0320 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0030 //RX_FDDRC_BAND_MARGIN_1 +248 0x0050 //RX_FDDRC_BAND_MARGIN_2 +249 0x0080 //RX_FDDRC_BAND_MARGIN_3 +250 0x0007 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x5000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x6400 //RX_FDDRC_THRD_3_2 +258 0x6400 //RX_FDDRC_THRD_3_3 +259 0x2000 //RX_FDDRC_SLANT_0_0 +260 0x2000 //RX_FDDRC_SLANT_0_1 +261 0x2000 //RX_FDDRC_SLANT_0_2 +262 0x2000 //RX_FDDRC_SLANT_0_3 +263 0x5333 //RX_FDDRC_SLANT_1_0 +264 0x5333 //RX_FDDRC_SLANT_1_1 +265 0x5333 //RX_FDDRC_SLANT_1_2 +266 0x5333 //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +286 0x0100 //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 +#VOL 1 +163 0x1000 //RX_TDDRC_ALPHA_UP_1 +164 0x1000 //RX_TDDRC_ALPHA_UP_2 +165 0x1000 //RX_TDDRC_ALPHA_UP_3 +166 0x1000 //RX_TDDRC_ALPHA_UP_4 +184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +190 0x7FFF //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +269 0x0000 //RX_TDDRC_THRD_0 +270 0x0000 //RX_TDDRC_THRD_1 +271 0x7FFF //RX_TDDRC_THRD_2 +272 0x7FFF //RX_TDDRC_THRD_3 +273 0x7FFF //RX_TDDRC_SLANT_0 +274 0x7FFF //RX_TDDRC_SLANT_1 +275 0x1000 //RX_TDDRC_ALPHA_UP_0 +276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x199A //RX_TDDRC_HMNC_GAIN +279 0x0001 //RX_TDDRC_SMT_FLAG +280 0x0CCD //RX_TDDRC_SMT_W +281 0x0155 //RX_TDDRC_DRC_GAIN +195 0x0020 //RX_FDEQ_SUBNUM +196 0x4848 //RX_FDEQ_GAIN_0 +197 0x4848 //RX_FDEQ_GAIN_1 +198 0x4848 //RX_FDEQ_GAIN_2 +199 0x4848 //RX_FDEQ_GAIN_3 +200 0x4848 //RX_FDEQ_GAIN_4 +201 0x4848 //RX_FDEQ_GAIN_5 +202 0x4848 //RX_FDEQ_GAIN_6 +203 0x4848 //RX_FDEQ_GAIN_7 +204 0x4848 //RX_FDEQ_GAIN_8 +205 0x4848 //RX_FDEQ_GAIN_9 +206 0x4848 //RX_FDEQ_GAIN_10 +207 0x4848 //RX_FDEQ_GAIN_11 +208 0x4848 //RX_FDEQ_GAIN_12 +209 0x4848 //RX_FDEQ_GAIN_13 +210 0x4848 //RX_FDEQ_GAIN_14 +211 0x4848 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0202 //RX_FDEQ_BIN_0 +221 0x0203 //RX_FDEQ_BIN_1 +222 0x0304 //RX_FDEQ_BIN_2 +223 0x0405 //RX_FDEQ_BIN_3 +224 0x0607 //RX_FDEQ_BIN_4 +225 0x0809 //RX_FDEQ_BIN_5 +226 0x0A0B //RX_FDEQ_BIN_6 +227 0x0C0D //RX_FDEQ_BIN_7 +228 0x0E0F //RX_FDEQ_BIN_8 +229 0x1011 //RX_FDEQ_BIN_9 +230 0x1214 //RX_FDEQ_BIN_10 +231 0x1618 //RX_FDEQ_BIN_11 +232 0x1C1C //RX_FDEQ_BIN_12 +233 0x2020 //RX_FDEQ_BIN_13 +234 0x2020 //RX_FDEQ_BIN_14 +235 0x2011 //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x4000 //RX_FDEQ_RESRV_0 +245 0x0320 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0030 //RX_FDDRC_BAND_MARGIN_1 +248 0x0050 //RX_FDDRC_BAND_MARGIN_2 +249 0x0080 //RX_FDDRC_BAND_MARGIN_3 +250 0x0007 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x5000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x6400 //RX_FDDRC_THRD_3_2 +258 0x6400 //RX_FDDRC_THRD_3_3 +259 0x2000 //RX_FDDRC_SLANT_0_0 +260 0x2000 //RX_FDDRC_SLANT_0_1 +261 0x2000 //RX_FDDRC_SLANT_0_2 +262 0x2000 //RX_FDDRC_SLANT_0_3 +263 0x5333 //RX_FDDRC_SLANT_1_0 +264 0x5333 //RX_FDDRC_SLANT_1_1 +265 0x5333 //RX_FDDRC_SLANT_1_2 +266 0x5333 //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +286 0x0100 //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 +#VOL 2 +163 0x1000 //RX_TDDRC_ALPHA_UP_1 +164 0x1000 //RX_TDDRC_ALPHA_UP_2 +165 0x1000 //RX_TDDRC_ALPHA_UP_3 +166 0x1000 //RX_TDDRC_ALPHA_UP_4 +184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +190 0x7FFF //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +269 0x0000 //RX_TDDRC_THRD_0 +270 0x0000 //RX_TDDRC_THRD_1 +271 0x7FFF //RX_TDDRC_THRD_2 +272 0x7FFF //RX_TDDRC_THRD_3 +273 0x7FFF //RX_TDDRC_SLANT_0 +274 0x7FFF //RX_TDDRC_SLANT_1 +275 0x1000 //RX_TDDRC_ALPHA_UP_0 +276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x199A //RX_TDDRC_HMNC_GAIN +279 0x0001 //RX_TDDRC_SMT_FLAG +280 0x0CCD //RX_TDDRC_SMT_W +281 0x0155 //RX_TDDRC_DRC_GAIN +195 0x0020 //RX_FDEQ_SUBNUM +196 0x4848 //RX_FDEQ_GAIN_0 +197 0x4848 //RX_FDEQ_GAIN_1 +198 0x4848 //RX_FDEQ_GAIN_2 +199 0x4848 //RX_FDEQ_GAIN_3 +200 0x4848 //RX_FDEQ_GAIN_4 +201 0x4848 //RX_FDEQ_GAIN_5 +202 0x4848 //RX_FDEQ_GAIN_6 +203 0x4848 //RX_FDEQ_GAIN_7 +204 0x4848 //RX_FDEQ_GAIN_8 +205 0x4848 //RX_FDEQ_GAIN_9 +206 0x4848 //RX_FDEQ_GAIN_10 +207 0x4848 //RX_FDEQ_GAIN_11 +208 0x4848 //RX_FDEQ_GAIN_12 +209 0x4848 //RX_FDEQ_GAIN_13 +210 0x4848 //RX_FDEQ_GAIN_14 +211 0x4848 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0202 //RX_FDEQ_BIN_0 +221 0x0203 //RX_FDEQ_BIN_1 +222 0x0304 //RX_FDEQ_BIN_2 +223 0x0405 //RX_FDEQ_BIN_3 +224 0x0607 //RX_FDEQ_BIN_4 +225 0x0809 //RX_FDEQ_BIN_5 +226 0x0A0B //RX_FDEQ_BIN_6 +227 0x0C0D //RX_FDEQ_BIN_7 +228 0x0E0F //RX_FDEQ_BIN_8 +229 0x1011 //RX_FDEQ_BIN_9 +230 0x1214 //RX_FDEQ_BIN_10 +231 0x1618 //RX_FDEQ_BIN_11 +232 0x1C1C //RX_FDEQ_BIN_12 +233 0x2020 //RX_FDEQ_BIN_13 +234 0x2020 //RX_FDEQ_BIN_14 +235 0x2011 //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x4000 //RX_FDEQ_RESRV_0 +245 0x0320 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0030 //RX_FDDRC_BAND_MARGIN_1 +248 0x0050 //RX_FDDRC_BAND_MARGIN_2 +249 0x0080 //RX_FDDRC_BAND_MARGIN_3 +250 0x0007 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x5000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x6400 //RX_FDDRC_THRD_3_2 +258 0x6400 //RX_FDDRC_THRD_3_3 +259 0x2000 //RX_FDDRC_SLANT_0_0 +260 0x2000 //RX_FDDRC_SLANT_0_1 +261 0x2000 //RX_FDDRC_SLANT_0_2 +262 0x2000 //RX_FDDRC_SLANT_0_3 +263 0x5333 //RX_FDDRC_SLANT_1_0 +264 0x5333 //RX_FDDRC_SLANT_1_1 +265 0x5333 //RX_FDDRC_SLANT_1_2 +266 0x5333 //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +286 0x0100 //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 +#VOL 3 +163 0x1000 //RX_TDDRC_ALPHA_UP_1 +164 0x1000 //RX_TDDRC_ALPHA_UP_2 +165 0x1000 //RX_TDDRC_ALPHA_UP_3 +166 0x1000 //RX_TDDRC_ALPHA_UP_4 +184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +190 0x7FFF //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +269 0x0000 //RX_TDDRC_THRD_0 +270 0x0000 //RX_TDDRC_THRD_1 +271 0x7FFF //RX_TDDRC_THRD_2 +272 0x7FFF //RX_TDDRC_THRD_3 +273 0x7FFF //RX_TDDRC_SLANT_0 +274 0x7FFF //RX_TDDRC_SLANT_1 +275 0x1000 //RX_TDDRC_ALPHA_UP_0 +276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x199A //RX_TDDRC_HMNC_GAIN +279 0x0001 //RX_TDDRC_SMT_FLAG +280 0x0CCD //RX_TDDRC_SMT_W +281 0x0155 //RX_TDDRC_DRC_GAIN +195 0x0020 //RX_FDEQ_SUBNUM +196 0x4848 //RX_FDEQ_GAIN_0 +197 0x4848 //RX_FDEQ_GAIN_1 +198 0x4848 //RX_FDEQ_GAIN_2 +199 0x4848 //RX_FDEQ_GAIN_3 +200 0x4848 //RX_FDEQ_GAIN_4 +201 0x4848 //RX_FDEQ_GAIN_5 +202 0x4848 //RX_FDEQ_GAIN_6 +203 0x4848 //RX_FDEQ_GAIN_7 +204 0x4848 //RX_FDEQ_GAIN_8 +205 0x4848 //RX_FDEQ_GAIN_9 +206 0x4848 //RX_FDEQ_GAIN_10 +207 0x4848 //RX_FDEQ_GAIN_11 +208 0x4848 //RX_FDEQ_GAIN_12 +209 0x4848 //RX_FDEQ_GAIN_13 +210 0x4848 //RX_FDEQ_GAIN_14 +211 0x4848 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0202 //RX_FDEQ_BIN_0 +221 0x0203 //RX_FDEQ_BIN_1 +222 0x0304 //RX_FDEQ_BIN_2 +223 0x0405 //RX_FDEQ_BIN_3 +224 0x0607 //RX_FDEQ_BIN_4 +225 0x0809 //RX_FDEQ_BIN_5 +226 0x0A0B //RX_FDEQ_BIN_6 +227 0x0C0D //RX_FDEQ_BIN_7 +228 0x0E0F //RX_FDEQ_BIN_8 +229 0x1011 //RX_FDEQ_BIN_9 +230 0x1214 //RX_FDEQ_BIN_10 +231 0x1618 //RX_FDEQ_BIN_11 +232 0x1C1C //RX_FDEQ_BIN_12 +233 0x2020 //RX_FDEQ_BIN_13 +234 0x2020 //RX_FDEQ_BIN_14 +235 0x2011 //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x4000 //RX_FDEQ_RESRV_0 +245 0x0320 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0030 //RX_FDDRC_BAND_MARGIN_1 +248 0x0050 //RX_FDDRC_BAND_MARGIN_2 +249 0x0080 //RX_FDDRC_BAND_MARGIN_3 +250 0x0007 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x5000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x6400 //RX_FDDRC_THRD_3_2 +258 0x6400 //RX_FDDRC_THRD_3_3 +259 0x2000 //RX_FDDRC_SLANT_0_0 +260 0x2000 //RX_FDDRC_SLANT_0_1 +261 0x2000 //RX_FDDRC_SLANT_0_2 +262 0x2000 //RX_FDDRC_SLANT_0_3 +263 0x5333 //RX_FDDRC_SLANT_1_0 +264 0x5333 //RX_FDDRC_SLANT_1_1 +265 0x5333 //RX_FDDRC_SLANT_1_2 +266 0x5333 //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +286 0x0100 //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 +#VOL 4 +163 0x1000 //RX_TDDRC_ALPHA_UP_1 +164 0x1000 //RX_TDDRC_ALPHA_UP_2 +165 0x1000 //RX_TDDRC_ALPHA_UP_3 +166 0x1000 //RX_TDDRC_ALPHA_UP_4 +184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +190 0x7FFF //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +269 0x0000 //RX_TDDRC_THRD_0 +270 0x0000 //RX_TDDRC_THRD_1 +271 0x7FFF //RX_TDDRC_THRD_2 +272 0x7FFF //RX_TDDRC_THRD_3 +273 0x7FFF //RX_TDDRC_SLANT_0 +274 0x7FFF //RX_TDDRC_SLANT_1 +275 0x1000 //RX_TDDRC_ALPHA_UP_0 +276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x199A //RX_TDDRC_HMNC_GAIN +279 0x0001 //RX_TDDRC_SMT_FLAG +280 0x0CCD //RX_TDDRC_SMT_W +281 0x0155 //RX_TDDRC_DRC_GAIN +195 0x0020 //RX_FDEQ_SUBNUM +196 0x4848 //RX_FDEQ_GAIN_0 +197 0x4848 //RX_FDEQ_GAIN_1 +198 0x4848 //RX_FDEQ_GAIN_2 +199 0x4848 //RX_FDEQ_GAIN_3 +200 0x4848 //RX_FDEQ_GAIN_4 +201 0x4848 //RX_FDEQ_GAIN_5 +202 0x4848 //RX_FDEQ_GAIN_6 +203 0x4848 //RX_FDEQ_GAIN_7 +204 0x4848 //RX_FDEQ_GAIN_8 +205 0x4848 //RX_FDEQ_GAIN_9 +206 0x4848 //RX_FDEQ_GAIN_10 +207 0x4848 //RX_FDEQ_GAIN_11 +208 0x4848 //RX_FDEQ_GAIN_12 +209 0x4848 //RX_FDEQ_GAIN_13 +210 0x4848 //RX_FDEQ_GAIN_14 +211 0x4848 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0202 //RX_FDEQ_BIN_0 +221 0x0203 //RX_FDEQ_BIN_1 +222 0x0304 //RX_FDEQ_BIN_2 +223 0x0405 //RX_FDEQ_BIN_3 +224 0x0607 //RX_FDEQ_BIN_4 +225 0x0809 //RX_FDEQ_BIN_5 +226 0x0A0B //RX_FDEQ_BIN_6 +227 0x0C0D //RX_FDEQ_BIN_7 +228 0x0E0F //RX_FDEQ_BIN_8 +229 0x1011 //RX_FDEQ_BIN_9 +230 0x1214 //RX_FDEQ_BIN_10 +231 0x1618 //RX_FDEQ_BIN_11 +232 0x1C1C //RX_FDEQ_BIN_12 +233 0x2020 //RX_FDEQ_BIN_13 +234 0x2020 //RX_FDEQ_BIN_14 +235 0x2011 //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x4000 //RX_FDEQ_RESRV_0 +245 0x0320 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0030 //RX_FDDRC_BAND_MARGIN_1 +248 0x0050 //RX_FDDRC_BAND_MARGIN_2 +249 0x0080 //RX_FDDRC_BAND_MARGIN_3 +250 0x0007 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x5000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x6400 //RX_FDDRC_THRD_3_2 +258 0x6400 //RX_FDDRC_THRD_3_3 +259 0x2000 //RX_FDDRC_SLANT_0_0 +260 0x2000 //RX_FDDRC_SLANT_0_1 +261 0x2000 //RX_FDDRC_SLANT_0_2 +262 0x2000 //RX_FDDRC_SLANT_0_3 +263 0x5333 //RX_FDDRC_SLANT_1_0 +264 0x5333 //RX_FDDRC_SLANT_1_1 +265 0x5333 //RX_FDDRC_SLANT_1_2 +266 0x5333 //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +286 0x0100 //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 +#VOL 5 +163 0x1000 //RX_TDDRC_ALPHA_UP_1 +164 0x1000 //RX_TDDRC_ALPHA_UP_2 +165 0x1000 //RX_TDDRC_ALPHA_UP_3 +166 0x1000 //RX_TDDRC_ALPHA_UP_4 +184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +190 0x7FFF //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +269 0x0000 //RX_TDDRC_THRD_0 +270 0x0000 //RX_TDDRC_THRD_1 +271 0x7FFF //RX_TDDRC_THRD_2 +272 0x7FFF //RX_TDDRC_THRD_3 +273 0x7FFF //RX_TDDRC_SLANT_0 +274 0x7FFF //RX_TDDRC_SLANT_1 +275 0x1000 //RX_TDDRC_ALPHA_UP_0 +276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x199A //RX_TDDRC_HMNC_GAIN +279 0x0001 //RX_TDDRC_SMT_FLAG +280 0x0CCD //RX_TDDRC_SMT_W +281 0x0155 //RX_TDDRC_DRC_GAIN +195 0x0020 //RX_FDEQ_SUBNUM +196 0x4848 //RX_FDEQ_GAIN_0 +197 0x4848 //RX_FDEQ_GAIN_1 +198 0x4848 //RX_FDEQ_GAIN_2 +199 0x4848 //RX_FDEQ_GAIN_3 +200 0x4848 //RX_FDEQ_GAIN_4 +201 0x4848 //RX_FDEQ_GAIN_5 +202 0x4848 //RX_FDEQ_GAIN_6 +203 0x4848 //RX_FDEQ_GAIN_7 +204 0x4848 //RX_FDEQ_GAIN_8 +205 0x4848 //RX_FDEQ_GAIN_9 +206 0x4848 //RX_FDEQ_GAIN_10 +207 0x4848 //RX_FDEQ_GAIN_11 +208 0x4848 //RX_FDEQ_GAIN_12 +209 0x4848 //RX_FDEQ_GAIN_13 +210 0x4848 //RX_FDEQ_GAIN_14 +211 0x4848 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0202 //RX_FDEQ_BIN_0 +221 0x0203 //RX_FDEQ_BIN_1 +222 0x0304 //RX_FDEQ_BIN_2 +223 0x0405 //RX_FDEQ_BIN_3 +224 0x0607 //RX_FDEQ_BIN_4 +225 0x0809 //RX_FDEQ_BIN_5 +226 0x0A0B //RX_FDEQ_BIN_6 +227 0x0C0D //RX_FDEQ_BIN_7 +228 0x0E0F //RX_FDEQ_BIN_8 +229 0x1011 //RX_FDEQ_BIN_9 +230 0x1214 //RX_FDEQ_BIN_10 +231 0x1618 //RX_FDEQ_BIN_11 +232 0x1C1C //RX_FDEQ_BIN_12 +233 0x2020 //RX_FDEQ_BIN_13 +234 0x2020 //RX_FDEQ_BIN_14 +235 0x2011 //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x4000 //RX_FDEQ_RESRV_0 +245 0x0320 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0030 //RX_FDDRC_BAND_MARGIN_1 +248 0x0050 //RX_FDDRC_BAND_MARGIN_2 +249 0x0080 //RX_FDDRC_BAND_MARGIN_3 +250 0x0007 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x5000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x6400 //RX_FDDRC_THRD_3_2 +258 0x6400 //RX_FDDRC_THRD_3_3 +259 0x2000 //RX_FDDRC_SLANT_0_0 +260 0x2000 //RX_FDDRC_SLANT_0_1 +261 0x2000 //RX_FDDRC_SLANT_0_2 +262 0x2000 //RX_FDDRC_SLANT_0_3 +263 0x5333 //RX_FDDRC_SLANT_1_0 +264 0x5333 //RX_FDDRC_SLANT_1_1 +265 0x5333 //RX_FDDRC_SLANT_1_2 +266 0x5333 //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +286 0x0100 //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 +#VOL 6 +163 0x1000 //RX_TDDRC_ALPHA_UP_1 +164 0x1000 //RX_TDDRC_ALPHA_UP_2 +165 0x1000 //RX_TDDRC_ALPHA_UP_3 +166 0x1000 //RX_TDDRC_ALPHA_UP_4 +184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +190 0x7FFF //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +269 0x0000 //RX_TDDRC_THRD_0 +270 0x0000 //RX_TDDRC_THRD_1 +271 0x7FFF //RX_TDDRC_THRD_2 +272 0x7FFF //RX_TDDRC_THRD_3 +273 0x7FFF //RX_TDDRC_SLANT_0 +274 0x7FFF //RX_TDDRC_SLANT_1 +275 0x1000 //RX_TDDRC_ALPHA_UP_0 +276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x199A //RX_TDDRC_HMNC_GAIN +279 0x0001 //RX_TDDRC_SMT_FLAG +280 0x0CCD //RX_TDDRC_SMT_W +281 0x0155 //RX_TDDRC_DRC_GAIN +195 0x0020 //RX_FDEQ_SUBNUM +196 0x4848 //RX_FDEQ_GAIN_0 +197 0x4848 //RX_FDEQ_GAIN_1 +198 0x4848 //RX_FDEQ_GAIN_2 +199 0x4848 //RX_FDEQ_GAIN_3 +200 0x4848 //RX_FDEQ_GAIN_4 +201 0x4848 //RX_FDEQ_GAIN_5 +202 0x4848 //RX_FDEQ_GAIN_6 +203 0x4848 //RX_FDEQ_GAIN_7 +204 0x4848 //RX_FDEQ_GAIN_8 +205 0x4848 //RX_FDEQ_GAIN_9 +206 0x4848 //RX_FDEQ_GAIN_10 +207 0x4848 //RX_FDEQ_GAIN_11 +208 0x4848 //RX_FDEQ_GAIN_12 +209 0x4848 //RX_FDEQ_GAIN_13 +210 0x4848 //RX_FDEQ_GAIN_14 +211 0x4848 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0202 //RX_FDEQ_BIN_0 +221 0x0203 //RX_FDEQ_BIN_1 +222 0x0304 //RX_FDEQ_BIN_2 +223 0x0405 //RX_FDEQ_BIN_3 +224 0x0607 //RX_FDEQ_BIN_4 +225 0x0809 //RX_FDEQ_BIN_5 +226 0x0A0B //RX_FDEQ_BIN_6 +227 0x0C0D //RX_FDEQ_BIN_7 +228 0x0E0F //RX_FDEQ_BIN_8 +229 0x1011 //RX_FDEQ_BIN_9 +230 0x1214 //RX_FDEQ_BIN_10 +231 0x1618 //RX_FDEQ_BIN_11 +232 0x1C1C //RX_FDEQ_BIN_12 +233 0x2020 //RX_FDEQ_BIN_13 +234 0x2020 //RX_FDEQ_BIN_14 +235 0x2011 //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x4000 //RX_FDEQ_RESRV_0 +245 0x0320 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0030 //RX_FDDRC_BAND_MARGIN_1 +248 0x0050 //RX_FDDRC_BAND_MARGIN_2 +249 0x0080 //RX_FDDRC_BAND_MARGIN_3 +250 0x0007 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x5000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x6400 //RX_FDDRC_THRD_3_2 +258 0x6400 //RX_FDDRC_THRD_3_3 +259 0x2000 //RX_FDDRC_SLANT_0_0 +260 0x2000 //RX_FDDRC_SLANT_0_1 +261 0x2000 //RX_FDDRC_SLANT_0_2 +262 0x2000 //RX_FDDRC_SLANT_0_3 +263 0x5333 //RX_FDDRC_SLANT_1_0 +264 0x5333 //RX_FDDRC_SLANT_1_1 +265 0x5333 //RX_FDDRC_SLANT_1_2 +266 0x5333 //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +286 0x0100 //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 #CASE_NAME BLUETOOTH-BTNB-VOICE_GENERIC-NB -#PARAM_TYPE TX+RX -#TOTAL_CUSTOM_STEP 7 +#PARAM_MODE Full +#PARAM_TYPE TX+2RX +#TOTAL_CUSTOM_STEP 7+7 #TX 0 0x0008 //TX_OPERATION_MODE_0 1 0x0008 //TX_OPERATION_MODE_1 @@ -9023,20 +13609,20 @@ 248 0xF400 //TX_THR_SN_EST_6 249 0xF600 //TX_THR_SN_EST_7 250 0x0000 //TX_DELTA_THR_SN_EST_0 -251 0x0000 //TX_DELTA_THR_SN_EST_1 +251 0x0200 //TX_DELTA_THR_SN_EST_1 252 0x0200 //TX_DELTA_THR_SN_EST_2 253 0x0200 //TX_DELTA_THR_SN_EST_3 254 0x0200 //TX_DELTA_THR_SN_EST_4 255 0x0200 //TX_DELTA_THR_SN_EST_5 -256 0x0200 //TX_DELTA_THR_SN_EST_6 +256 0x0000 //TX_DELTA_THR_SN_EST_6 257 0x0200 //TX_DELTA_THR_SN_EST_7 258 0x6000 //TX_LAMBDA_NN_EST_0 -259 0x6000 //TX_LAMBDA_NN_EST_1 +259 0x4000 //TX_LAMBDA_NN_EST_1 260 0x4000 //TX_LAMBDA_NN_EST_2 261 0x4000 //TX_LAMBDA_NN_EST_3 262 0x4000 //TX_LAMBDA_NN_EST_4 263 0x4000 //TX_LAMBDA_NN_EST_5 -264 0x4000 //TX_LAMBDA_NN_EST_6 +264 0x6000 //TX_LAMBDA_NN_EST_6 265 0x4000 //TX_LAMBDA_NN_EST_7 266 0x0400 //TX_N_SN_EST 267 0x001E //TX_INBEAM_T @@ -9054,16 +13640,16 @@ 279 0x1000 //TX_B_POST_FLT_0 280 0x1000 //TX_B_POST_FLT_1 281 0x000F //TX_NS_LVL_CTRL_0 -282 0x000F //TX_NS_LVL_CTRL_1 -283 0x0011 //TX_NS_LVL_CTRL_2 +282 0x0011 //TX_NS_LVL_CTRL_1 +283 0x000F //TX_NS_LVL_CTRL_2 284 0x000F //TX_NS_LVL_CTRL_3 285 0x000F //TX_NS_LVL_CTRL_4 286 0x000F //TX_NS_LVL_CTRL_5 287 0x000F //TX_NS_LVL_CTRL_6 288 0x0011 //TX_NS_LVL_CTRL_7 289 0x000C //TX_MIN_GAIN_S_0 -290 0x000C //TX_MIN_GAIN_S_1 -291 0x000F //TX_MIN_GAIN_S_2 +290 0x000F //TX_MIN_GAIN_S_1 +291 0x000C //TX_MIN_GAIN_S_2 292 0x000C //TX_MIN_GAIN_S_3 293 0x000C //TX_MIN_GAIN_S_4 294 0x000C //TX_MIN_GAIN_S_5 @@ -9087,12 +13673,12 @@ 312 0x7FFF //TX_A_POST_FILT_0 313 0x2000 //TX_A_POST_FILT_1 314 0x4000 //TX_A_POST_FILT_S_0 -315 0x4000 //TX_A_POST_FILT_S_1 +315 0x5000 //TX_A_POST_FILT_S_1 316 0x5000 //TX_A_POST_FILT_S_2 317 0x5000 //TX_A_POST_FILT_S_3 318 0x5000 //TX_A_POST_FILT_S_4 319 0x5000 //TX_A_POST_FILT_S_5 -320 0x5000 //TX_A_POST_FILT_S_6 +320 0x4000 //TX_A_POST_FILT_S_6 321 0x5000 //TX_A_POST_FILT_S_7 322 0x1000 //TX_B_POST_FILT_0 323 0x1000 //TX_B_POST_FILT_1 @@ -9152,10 +13738,10 @@ 377 0x7FFF //TX_NOISE_TH_5_4 378 0x044C //TX_NOISE_TH_6 379 0x0014 //TX_MINENOISE_TH -380 0x4000 //TX_MINENOISE_MIC0_TH_MTS -381 0xFFEE //TX_MINENOISE_MIC0_TH_EXP -382 0x6000 //TX_MINENOISE_MIC0_S_TH_MTS -383 0xFFF3 //TX_MINENOISE_MIC0_S_TH_EXP +380 0x4000 //TX_MORENS_TFMASK_TH +381 0xFFEE //TX_DRC_QUIET_FLOOR +382 0x6000 //TX_RATIODTL_CUT_TH +383 0xFFF3 //TX_DT_CUT_K1 384 0x0666 //TX_OUT_ENER_S_TH_CLEAN 385 0x0666 //TX_OUT_ENER_S_TH_LESSCLEAN 386 0x0333 //TX_OUT_ENER_S_TH_NOISY @@ -9163,15 +13749,15 @@ 388 0x0333 //TX_OUT_ENER_TH_SPEECH 389 0x2000 //TX_SN_NPB_GAIN 390 0x0000 //TX_NN_NPB_GAIN -391 0x0000 //TX_CSX_ALPHA_0 -392 0x0000 //TX_CSX_ALPHA_1 -393 0x0000 //TX_CSX_ALPHA_2 -394 0x0000 //TX_CSX_ALPHA_3 -395 0x0800 //TX_MU_ARSP_EST -396 0x00C8 //TX_P_OUTBEAM_MIN_TH +391 0x0000 //TX_POST_MASK_SUP_HSNE +392 0x0000 //TX_TAIL_DET_TH +393 0x0000 //TX_B_LESSCUT_RTO_WTA +394 0x0000 //TX_MEL_G_R +395 0x0800 //TX_SUPHIGH_TH +396 0x00C8 //TX_MASK_G_R 397 0x0002 //TX_EXTRA_NS_L -398 0x0800 //TX_EXTRA_NS_A -399 0x0005 //TX_VR_NOISE_FLOOR_TH +398 0x0800 //TX_C_POST_FLT_MASK +399 0x0005 //TX_A_POST_FLT_WNS 400 0x0148 //TX_MIN_G_LOW300HZ 401 0x0002 //TX_MAXLEVEL_CNG 402 0x00B4 //TX_STN_NOISE_TH @@ -9286,16 +13872,16 @@ 511 0x6666 //TX_MIC_TO_BFGAIN 512 0x0000 //TX_MICTOBFGAIN0 513 0x0000 //TX_FASTMUE_TH -514 0x0000 //TX_DERVB_LEN_0 -515 0x0000 //TX_DERVB_LEN_1 -516 0x0000 //TX_RHO_DERVB -517 0x0000 //TX_MIC_INDX_DERVB -518 0x0000 //TX_MU_DERVB -519 0x0000 //TX_DR_RESRV_0 -520 0x0000 //TX_DR_RESRV_1 -521 0x0000 //TX_DR_RESRV_2 -522 0x0000 //TX_DR_RESRV_3 -523 0x0000 //TX_DR_RESRV_4 +514 0x0000 //TX_DEREVERB_LF_MU +515 0x0000 //TX_DEREVERB_HF_MU +516 0x0000 //TX_DEREVERB_DELAY +517 0x0000 //TX_DEREVERB_COEF_LEN +518 0x0000 //TX_DEREVERB_DNR +519 0x0000 //TX_DEREVERB_ALPHA +520 0x0000 //TX_DEREVERB_BETA +521 0x0000 //TX_GSC_RTOL_TH +522 0x0000 //TX_GSC_RTOH_TH +523 0x0000 //TX_WIDE2_MEANHTH 524 0x0000 //TX_DR_RESRV_5 525 0x0000 //TX_DR_RESRV_6 526 0x0000 //TX_DR_RESRV_7 @@ -9669,8 +14255,73 @@ 894 0xC000 //TX_FASTNS_SSA_THHFL 895 0xCCCC //TX_FASTNS_SSA_THLFH 896 0xD999 //TX_FASTNS_SSA_THHFH +897 0x0000 //TX_SENDFUNC_REG_MICMUTE +898 0x0000 //TX_SENDFUNC_REG_MICMUTE1 +899 0x0000 //TX_MICMUTE_RATIO_THR +900 0x0000 //TX_MICMUTE_AMP_THR +901 0x0000 //TX_MICMUTE_HPF_IND +902 0x0000 //TX_MICMUTE_LOG_EYR_TH +903 0x0000 //TX_MICMUTE_CVG_TIME +904 0x0000 //TX_MICMUTE_RELEASE_TIME +905 0x0000 //TX_MIC_VOLUME_MIC0MUTE +906 0x0000 //TX_MICMUTE_EPD_OFFSET_0 +907 0x0000 //TX_MICMUTE_FRQ_AEC_L +908 0x0000 //TX_MICMUTE_EAD_THR +909 0x0000 //TX_MICMUTE_LAMBDA_CB_NLE +910 0x0000 //TX_MICMUTE_LAMBDA_RE_EST +911 0x0000 //TX_DTD_THR1_MICMUTE_0 +912 0x0000 //TX_DTD_THR1_MICMUTE_1 +913 0x0000 //TX_DTD_THR1_MICMUTE_2 +914 0x0000 //TX_DTD_THR1_MICMUTE_3 +915 0x0000 //TX_DTD_THR2_MICMUTE_0 +916 0x0000 //TX_MICMUTE_MIN_EQ_RE_EST_0 +917 0x0000 //TX_MICMUTE_MIN_EQ_RE_EST_1 +918 0x0000 //TX_MICMUTE_MIN_EQ_RE_EST_2 +919 0x0000 //TX_MICMUTE_MIN_EQ_RE_EST_3 +920 0x0000 //TX_MICMUTE_MIN_EQ_RE_EST_4 +921 0x0000 //TX_MICMUTE_C_POST_FLT +922 0x0000 //TX_MICMUTE_DT_CUT_K +923 0x0000 //TX_MICMUTE_DT_CUT_THR +924 0x0000 //TX_MICMUTE_DT_CUT_K2 +925 0x0000 //TX_MICMUTE_DT_CUT_THR2 +926 0x0000 //TX_MICMUTE_DT2_HOLD_N +927 0x0000 //TX_MICMUTE_RATIODTH_THCUT +928 0x0000 //TX_MICMUTE_B_POST_FLT_ECHOL +929 0x0000 //TX_MICMUTE_B_POST_FLT_ECHOH +930 0x0000 //TX_MICMUTE_C_POST_FLT_MASK +931 0x0000 //TX_MICMUTE_RATIODTL_CUT_TH +932 0x0000 //TX_MICMUTE_DT_CUT_K1 +933 0x0000 //TX_MICMUTE_N2_SN_EST +934 0x0000 //TX_MICMUTE_THR_SN_EST_0 +935 0x0000 //TX_MICMUTE_MIN_G_CTRL_0 +936 0x0000 //TX_MICMUTE_A_POST_FILT_S_0 +937 0x0000 //TX_MICMUTE_B_POST_FILT_0 +938 0x0000 //TX_MIC1RUB_AMP_THR +939 0x0000 //TX_MIC1MUTE_RATIO_THR +940 0x0000 //TX_MIC1MUTE_AMP_THR +941 0x0000 //TX_MIC1MUTE_CVG_TIME +942 0x0000 //TX_MIC1MUTE_RELEASE_TIME +943 0x0000 //TX_AMS_RESRV_01 +944 0x0000 //TX_AMS_RESRV_02 +945 0x0000 //TX_AMS_RESRV_03 +946 0x0000 //TX_AMS_RESRV_04 +947 0x0000 //TX_AMS_RESRV_05 +948 0x0000 //TX_AMS_RESRV_06 +949 0x0000 //TX_AMS_RESRV_07 +950 0x0000 //TX_AMS_RESRV_08 +951 0x0000 //TX_AMS_RESRV_09 +952 0x0000 //TX_AMS_RESRV_10 +953 0x0000 //TX_AMS_RESRV_11 +954 0x0000 //TX_AMS_RESRV_12 +955 0x0000 //TX_AMS_RESRV_13 +956 0x0000 //TX_AMS_RESRV_14 +957 0x0000 //TX_AMS_RESRV_15 +958 0x0000 //TX_AMS_RESRV_16 +959 0x0000 //TX_AMS_RESRV_17 +960 0x0000 //TX_AMS_RESRV_18 +961 0x0000 //TX_AMS_RESRV_19 #RX -0 0x006C //RX_RECVFUNC_MODE_0 +0 0x206C //RX_RECVFUNC_MODE_0 1 0x0000 //RX_RECVFUNC_MODE_1 2 0x0000 //RX_SAMPLINGFREQ_SIG 3 0x0000 //RX_SAMPLINGFREQ_PROC @@ -10520,10 +15171,862 @@ 110 0x0000 //RX_FDDRC_RESRV_0 129 0x0100 //RX_SPK_VOL 130 0x0000 //RX_VOL_RESRV_0 +#RX 2 +157 0x206C //RX_RECVFUNC_MODE_0 +158 0x0000 //RX_RECVFUNC_MODE_1 +159 0x0000 //RX_SAMPLINGFREQ_SIG +160 0x0000 //RX_SAMPLINGFREQ_PROC +161 0x000A //RX_FRAME_SZ +162 0x0000 //RX_DELAY_OPT +163 0x3000 //RX_TDDRC_ALPHA_UP_1 +164 0x3000 //RX_TDDRC_ALPHA_UP_2 +165 0x3000 //RX_TDDRC_ALPHA_UP_3 +166 0x3000 //RX_TDDRC_ALPHA_UP_4 +167 0x0800 //RX_PGA +168 0x7FFF //RX_A_HP +169 0x0000 //RX_B_PE +170 0x3800 //RX_THR_PITCH_DET_0 +171 0x3000 //RX_THR_PITCH_DET_1 +172 0x2800 //RX_THR_PITCH_DET_2 +173 0x0008 //RX_PITCH_BFR_LEN +174 0x0003 //RX_SBD_PITCH_DET +175 0x0100 //RX_PP_RESRV_0 +176 0x0020 //RX_PP_RESRV_1 +177 0x0600 //RX_N_SN_EST +178 0x000C //RX_N2_SN_EST +179 0x0010 //RX_NS_LVL_CTRL +180 0xF800 //RX_THR_SN_EST +181 0x7CCD //RX_LAMBDA_PFILT +182 0x000A //RX_FENS_RESRV_0 +183 0x0190 //RX_FENS_RESRV_1 +184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +187 0x0002 //RX_EXTRA_NS_L +188 0x0800 //RX_EXTRA_NS_A +189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +190 0x7FFF //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +192 0x199A //RX_A_POST_FLT +193 0x0000 //RX_LMT_THRD +194 0x4000 //RX_LMT_ALPHA +195 0x0014 //RX_FDEQ_SUBNUM +196 0x4848 //RX_FDEQ_GAIN_0 +197 0x4848 //RX_FDEQ_GAIN_1 +198 0x4848 //RX_FDEQ_GAIN_2 +199 0x4848 //RX_FDEQ_GAIN_3 +200 0x4848 //RX_FDEQ_GAIN_4 +201 0x4848 //RX_FDEQ_GAIN_5 +202 0x4444 //RX_FDEQ_GAIN_6 +203 0x4040 //RX_FDEQ_GAIN_7 +204 0x4040 //RX_FDEQ_GAIN_8 +205 0x4040 //RX_FDEQ_GAIN_9 +206 0x4848 //RX_FDEQ_GAIN_10 +207 0x4848 //RX_FDEQ_GAIN_11 +208 0x4848 //RX_FDEQ_GAIN_12 +209 0x4848 //RX_FDEQ_GAIN_13 +210 0x4848 //RX_FDEQ_GAIN_14 +211 0x4848 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0202 //RX_FDEQ_BIN_0 +221 0x0203 //RX_FDEQ_BIN_1 +222 0x0303 //RX_FDEQ_BIN_2 +223 0x0304 //RX_FDEQ_BIN_3 +224 0x0405 //RX_FDEQ_BIN_4 +225 0x0506 //RX_FDEQ_BIN_5 +226 0x0708 //RX_FDEQ_BIN_6 +227 0x090A //RX_FDEQ_BIN_7 +228 0x0B0C //RX_FDEQ_BIN_8 +229 0x0D0E //RX_FDEQ_BIN_9 +230 0x0000 //RX_FDEQ_BIN_10 +231 0x0000 //RX_FDEQ_BIN_11 +232 0x0000 //RX_FDEQ_BIN_12 +233 0x0000 //RX_FDEQ_BIN_13 +234 0x0000 //RX_FDEQ_BIN_14 +235 0x0000 //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x4000 //RX_FDEQ_RESRV_0 +245 0x0320 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0030 //RX_FDDRC_BAND_MARGIN_1 +248 0x0050 //RX_FDDRC_BAND_MARGIN_2 +249 0x0080 //RX_FDDRC_BAND_MARGIN_3 +250 0x0007 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x5000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x6400 //RX_FDDRC_THRD_3_2 +258 0x6400 //RX_FDDRC_THRD_3_3 +259 0x2000 //RX_FDDRC_SLANT_0_0 +260 0x2000 //RX_FDDRC_SLANT_0_1 +261 0x2000 //RX_FDDRC_SLANT_0_2 +262 0x2000 //RX_FDDRC_SLANT_0_3 +263 0x5333 //RX_FDDRC_SLANT_1_0 +264 0x5333 //RX_FDDRC_SLANT_1_1 +265 0x5333 //RX_FDDRC_SLANT_1_2 +266 0x5333 //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +268 0x0000 //RX_FILTINDX +269 0x0000 //RX_TDDRC_THRD_0 +270 0x0000 //RX_TDDRC_THRD_1 +271 0x7FFF //RX_TDDRC_THRD_2 +272 0x7FFF //RX_TDDRC_THRD_3 +273 0x7FFF //RX_TDDRC_SLANT_0 +274 0x7EB8 //RX_TDDRC_SLANT_1 +275 0x3000 //RX_TDDRC_ALPHA_UP_0 +276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x199A //RX_TDDRC_HMNC_GAIN +279 0x0001 //RX_TDDRC_SMT_FLAG +280 0x0CCD //RX_TDDRC_SMT_W +281 0x017F //RX_TDDRC_DRC_GAIN +282 0x7C00 //RX_LAMBDA_PKA_FP +283 0x2000 //RX_TPKA_FP +284 0x2000 //RX_MIN_G_FP +285 0x0080 //RX_MAX_G_FP +286 0x0100 //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 +288 0x0000 //RX_MAXLEVEL_CNG +289 0x3000 //RX_BWE_UV_TH +290 0x3000 //RX_BWE_UV_TH2 +291 0x1800 //RX_BWE_UV_TH3 +292 0x1000 //RX_BWE_V_TH +293 0x04CD //RX_BWE_GAIN1_V_TH1 +294 0x0F33 //RX_BWE_GAIN1_V_TH2 +295 0x7333 //RX_BWE_UV_EQ +296 0x199A //RX_BWE_V_EQ +297 0x7333 //RX_BWE_TONE_TH +298 0x0004 //RX_BWE_UV_HOLD_T +299 0x6CCD //RX_BWE_GAIN2_ALPHA +300 0x799A //RX_BWE_GAIN3_ALPHA +301 0x001E //RX_BWE_CUTOFF +302 0x3000 //RX_BWE_GAINFILL +303 0x3200 //RX_BWE_MAXTH_TONE +304 0x2000 //RX_BWE_EQ_0 +305 0x2000 //RX_BWE_EQ_1 +306 0x2000 //RX_BWE_EQ_2 +307 0x2000 //RX_BWE_EQ_3 +308 0x2000 //RX_BWE_EQ_4 +309 0x2000 //RX_BWE_EQ_5 +310 0x2000 //RX_BWE_EQ_6 +311 0x0000 //RX_BWE_RESRV_0 +312 0x0000 //RX_BWE_RESRV_1 +313 0x0000 //RX_BWE_RESRV_2 +#VOL 0 +163 0x3000 //RX_TDDRC_ALPHA_UP_1 +164 0x3000 //RX_TDDRC_ALPHA_UP_2 +165 0x3000 //RX_TDDRC_ALPHA_UP_3 +166 0x3000 //RX_TDDRC_ALPHA_UP_4 +184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +190 0x7FFF //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +269 0x0000 //RX_TDDRC_THRD_0 +270 0x0000 //RX_TDDRC_THRD_1 +271 0x7FFF //RX_TDDRC_THRD_2 +272 0x7FFF //RX_TDDRC_THRD_3 +273 0x7FFF //RX_TDDRC_SLANT_0 +274 0x7EB8 //RX_TDDRC_SLANT_1 +275 0x3000 //RX_TDDRC_ALPHA_UP_0 +276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x199A //RX_TDDRC_HMNC_GAIN +279 0x0001 //RX_TDDRC_SMT_FLAG +280 0x0CCD //RX_TDDRC_SMT_W +281 0x017F //RX_TDDRC_DRC_GAIN +195 0x0014 //RX_FDEQ_SUBNUM +196 0x4848 //RX_FDEQ_GAIN_0 +197 0x4848 //RX_FDEQ_GAIN_1 +198 0x4848 //RX_FDEQ_GAIN_2 +199 0x4848 //RX_FDEQ_GAIN_3 +200 0x4848 //RX_FDEQ_GAIN_4 +201 0x4848 //RX_FDEQ_GAIN_5 +202 0x4444 //RX_FDEQ_GAIN_6 +203 0x4040 //RX_FDEQ_GAIN_7 +204 0x4040 //RX_FDEQ_GAIN_8 +205 0x4040 //RX_FDEQ_GAIN_9 +206 0x4848 //RX_FDEQ_GAIN_10 +207 0x4848 //RX_FDEQ_GAIN_11 +208 0x4848 //RX_FDEQ_GAIN_12 +209 0x4848 //RX_FDEQ_GAIN_13 +210 0x4848 //RX_FDEQ_GAIN_14 +211 0x4848 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0202 //RX_FDEQ_BIN_0 +221 0x0203 //RX_FDEQ_BIN_1 +222 0x0303 //RX_FDEQ_BIN_2 +223 0x0304 //RX_FDEQ_BIN_3 +224 0x0405 //RX_FDEQ_BIN_4 +225 0x0506 //RX_FDEQ_BIN_5 +226 0x0708 //RX_FDEQ_BIN_6 +227 0x090A //RX_FDEQ_BIN_7 +228 0x0B0C //RX_FDEQ_BIN_8 +229 0x0D0E //RX_FDEQ_BIN_9 +230 0x0000 //RX_FDEQ_BIN_10 +231 0x0000 //RX_FDEQ_BIN_11 +232 0x0000 //RX_FDEQ_BIN_12 +233 0x0000 //RX_FDEQ_BIN_13 +234 0x0000 //RX_FDEQ_BIN_14 +235 0x0000 //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x4000 //RX_FDEQ_RESRV_0 +245 0x0320 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0030 //RX_FDDRC_BAND_MARGIN_1 +248 0x0050 //RX_FDDRC_BAND_MARGIN_2 +249 0x0080 //RX_FDDRC_BAND_MARGIN_3 +250 0x0007 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x5000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x6400 //RX_FDDRC_THRD_3_2 +258 0x6400 //RX_FDDRC_THRD_3_3 +259 0x2000 //RX_FDDRC_SLANT_0_0 +260 0x2000 //RX_FDDRC_SLANT_0_1 +261 0x2000 //RX_FDDRC_SLANT_0_2 +262 0x2000 //RX_FDDRC_SLANT_0_3 +263 0x5333 //RX_FDDRC_SLANT_1_0 +264 0x5333 //RX_FDDRC_SLANT_1_1 +265 0x5333 //RX_FDDRC_SLANT_1_2 +266 0x5333 //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +286 0x0100 //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 +#VOL 1 +163 0x3000 //RX_TDDRC_ALPHA_UP_1 +164 0x3000 //RX_TDDRC_ALPHA_UP_2 +165 0x3000 //RX_TDDRC_ALPHA_UP_3 +166 0x3000 //RX_TDDRC_ALPHA_UP_4 +184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +190 0x7FFF //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +269 0x0000 //RX_TDDRC_THRD_0 +270 0x0000 //RX_TDDRC_THRD_1 +271 0x7FFF //RX_TDDRC_THRD_2 +272 0x7FFF //RX_TDDRC_THRD_3 +273 0x7FFF //RX_TDDRC_SLANT_0 +274 0x7EB8 //RX_TDDRC_SLANT_1 +275 0x3000 //RX_TDDRC_ALPHA_UP_0 +276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x199A //RX_TDDRC_HMNC_GAIN +279 0x0001 //RX_TDDRC_SMT_FLAG +280 0x0CCD //RX_TDDRC_SMT_W +281 0x017F //RX_TDDRC_DRC_GAIN +195 0x0014 //RX_FDEQ_SUBNUM +196 0x4848 //RX_FDEQ_GAIN_0 +197 0x4848 //RX_FDEQ_GAIN_1 +198 0x4848 //RX_FDEQ_GAIN_2 +199 0x4848 //RX_FDEQ_GAIN_3 +200 0x4848 //RX_FDEQ_GAIN_4 +201 0x4848 //RX_FDEQ_GAIN_5 +202 0x4444 //RX_FDEQ_GAIN_6 +203 0x4040 //RX_FDEQ_GAIN_7 +204 0x4040 //RX_FDEQ_GAIN_8 +205 0x4040 //RX_FDEQ_GAIN_9 +206 0x4848 //RX_FDEQ_GAIN_10 +207 0x4848 //RX_FDEQ_GAIN_11 +208 0x4848 //RX_FDEQ_GAIN_12 +209 0x4848 //RX_FDEQ_GAIN_13 +210 0x4848 //RX_FDEQ_GAIN_14 +211 0x4848 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0202 //RX_FDEQ_BIN_0 +221 0x0203 //RX_FDEQ_BIN_1 +222 0x0303 //RX_FDEQ_BIN_2 +223 0x0304 //RX_FDEQ_BIN_3 +224 0x0405 //RX_FDEQ_BIN_4 +225 0x0506 //RX_FDEQ_BIN_5 +226 0x0708 //RX_FDEQ_BIN_6 +227 0x090A //RX_FDEQ_BIN_7 +228 0x0B0C //RX_FDEQ_BIN_8 +229 0x0D0E //RX_FDEQ_BIN_9 +230 0x0000 //RX_FDEQ_BIN_10 +231 0x0000 //RX_FDEQ_BIN_11 +232 0x0000 //RX_FDEQ_BIN_12 +233 0x0000 //RX_FDEQ_BIN_13 +234 0x0000 //RX_FDEQ_BIN_14 +235 0x0000 //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x4000 //RX_FDEQ_RESRV_0 +245 0x0320 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0030 //RX_FDDRC_BAND_MARGIN_1 +248 0x0050 //RX_FDDRC_BAND_MARGIN_2 +249 0x0080 //RX_FDDRC_BAND_MARGIN_3 +250 0x0007 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x5000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x6400 //RX_FDDRC_THRD_3_2 +258 0x6400 //RX_FDDRC_THRD_3_3 +259 0x2000 //RX_FDDRC_SLANT_0_0 +260 0x2000 //RX_FDDRC_SLANT_0_1 +261 0x2000 //RX_FDDRC_SLANT_0_2 +262 0x2000 //RX_FDDRC_SLANT_0_3 +263 0x5333 //RX_FDDRC_SLANT_1_0 +264 0x5333 //RX_FDDRC_SLANT_1_1 +265 0x5333 //RX_FDDRC_SLANT_1_2 +266 0x5333 //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +286 0x0100 //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 +#VOL 2 +163 0x3000 //RX_TDDRC_ALPHA_UP_1 +164 0x3000 //RX_TDDRC_ALPHA_UP_2 +165 0x3000 //RX_TDDRC_ALPHA_UP_3 +166 0x3000 //RX_TDDRC_ALPHA_UP_4 +184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +190 0x7FFF //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +269 0x0000 //RX_TDDRC_THRD_0 +270 0x0000 //RX_TDDRC_THRD_1 +271 0x7FFF //RX_TDDRC_THRD_2 +272 0x7FFF //RX_TDDRC_THRD_3 +273 0x7FFF //RX_TDDRC_SLANT_0 +274 0x7EB8 //RX_TDDRC_SLANT_1 +275 0x3000 //RX_TDDRC_ALPHA_UP_0 +276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x199A //RX_TDDRC_HMNC_GAIN +279 0x0001 //RX_TDDRC_SMT_FLAG +280 0x0CCD //RX_TDDRC_SMT_W +281 0x017F //RX_TDDRC_DRC_GAIN +195 0x0014 //RX_FDEQ_SUBNUM +196 0x4848 //RX_FDEQ_GAIN_0 +197 0x4848 //RX_FDEQ_GAIN_1 +198 0x4848 //RX_FDEQ_GAIN_2 +199 0x4848 //RX_FDEQ_GAIN_3 +200 0x4848 //RX_FDEQ_GAIN_4 +201 0x4848 //RX_FDEQ_GAIN_5 +202 0x4444 //RX_FDEQ_GAIN_6 +203 0x4040 //RX_FDEQ_GAIN_7 +204 0x4040 //RX_FDEQ_GAIN_8 +205 0x4040 //RX_FDEQ_GAIN_9 +206 0x4848 //RX_FDEQ_GAIN_10 +207 0x4848 //RX_FDEQ_GAIN_11 +208 0x4848 //RX_FDEQ_GAIN_12 +209 0x4848 //RX_FDEQ_GAIN_13 +210 0x4848 //RX_FDEQ_GAIN_14 +211 0x4848 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0202 //RX_FDEQ_BIN_0 +221 0x0203 //RX_FDEQ_BIN_1 +222 0x0303 //RX_FDEQ_BIN_2 +223 0x0304 //RX_FDEQ_BIN_3 +224 0x0405 //RX_FDEQ_BIN_4 +225 0x0506 //RX_FDEQ_BIN_5 +226 0x0708 //RX_FDEQ_BIN_6 +227 0x090A //RX_FDEQ_BIN_7 +228 0x0B0C //RX_FDEQ_BIN_8 +229 0x0D0E //RX_FDEQ_BIN_9 +230 0x0000 //RX_FDEQ_BIN_10 +231 0x0000 //RX_FDEQ_BIN_11 +232 0x0000 //RX_FDEQ_BIN_12 +233 0x0000 //RX_FDEQ_BIN_13 +234 0x0000 //RX_FDEQ_BIN_14 +235 0x0000 //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x4000 //RX_FDEQ_RESRV_0 +245 0x0320 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0030 //RX_FDDRC_BAND_MARGIN_1 +248 0x0050 //RX_FDDRC_BAND_MARGIN_2 +249 0x0080 //RX_FDDRC_BAND_MARGIN_3 +250 0x0007 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x5000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x6400 //RX_FDDRC_THRD_3_2 +258 0x6400 //RX_FDDRC_THRD_3_3 +259 0x2000 //RX_FDDRC_SLANT_0_0 +260 0x2000 //RX_FDDRC_SLANT_0_1 +261 0x2000 //RX_FDDRC_SLANT_0_2 +262 0x2000 //RX_FDDRC_SLANT_0_3 +263 0x5333 //RX_FDDRC_SLANT_1_0 +264 0x5333 //RX_FDDRC_SLANT_1_1 +265 0x5333 //RX_FDDRC_SLANT_1_2 +266 0x5333 //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +286 0x0100 //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 +#VOL 3 +163 0x3000 //RX_TDDRC_ALPHA_UP_1 +164 0x3000 //RX_TDDRC_ALPHA_UP_2 +165 0x3000 //RX_TDDRC_ALPHA_UP_3 +166 0x3000 //RX_TDDRC_ALPHA_UP_4 +184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +190 0x7FFF //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +269 0x0000 //RX_TDDRC_THRD_0 +270 0x0000 //RX_TDDRC_THRD_1 +271 0x7FFF //RX_TDDRC_THRD_2 +272 0x7FFF //RX_TDDRC_THRD_3 +273 0x7FFF //RX_TDDRC_SLANT_0 +274 0x7EB8 //RX_TDDRC_SLANT_1 +275 0x3000 //RX_TDDRC_ALPHA_UP_0 +276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x199A //RX_TDDRC_HMNC_GAIN +279 0x0001 //RX_TDDRC_SMT_FLAG +280 0x0CCD //RX_TDDRC_SMT_W +281 0x017F //RX_TDDRC_DRC_GAIN +195 0x0014 //RX_FDEQ_SUBNUM +196 0x4848 //RX_FDEQ_GAIN_0 +197 0x4848 //RX_FDEQ_GAIN_1 +198 0x4848 //RX_FDEQ_GAIN_2 +199 0x4848 //RX_FDEQ_GAIN_3 +200 0x4848 //RX_FDEQ_GAIN_4 +201 0x4848 //RX_FDEQ_GAIN_5 +202 0x4444 //RX_FDEQ_GAIN_6 +203 0x4040 //RX_FDEQ_GAIN_7 +204 0x4040 //RX_FDEQ_GAIN_8 +205 0x4040 //RX_FDEQ_GAIN_9 +206 0x4848 //RX_FDEQ_GAIN_10 +207 0x4848 //RX_FDEQ_GAIN_11 +208 0x4848 //RX_FDEQ_GAIN_12 +209 0x4848 //RX_FDEQ_GAIN_13 +210 0x4848 //RX_FDEQ_GAIN_14 +211 0x4848 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0202 //RX_FDEQ_BIN_0 +221 0x0203 //RX_FDEQ_BIN_1 +222 0x0303 //RX_FDEQ_BIN_2 +223 0x0304 //RX_FDEQ_BIN_3 +224 0x0405 //RX_FDEQ_BIN_4 +225 0x0506 //RX_FDEQ_BIN_5 +226 0x0708 //RX_FDEQ_BIN_6 +227 0x090A //RX_FDEQ_BIN_7 +228 0x0B0C //RX_FDEQ_BIN_8 +229 0x0D0E //RX_FDEQ_BIN_9 +230 0x0000 //RX_FDEQ_BIN_10 +231 0x0000 //RX_FDEQ_BIN_11 +232 0x0000 //RX_FDEQ_BIN_12 +233 0x0000 //RX_FDEQ_BIN_13 +234 0x0000 //RX_FDEQ_BIN_14 +235 0x0000 //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x4000 //RX_FDEQ_RESRV_0 +245 0x0320 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0030 //RX_FDDRC_BAND_MARGIN_1 +248 0x0050 //RX_FDDRC_BAND_MARGIN_2 +249 0x0080 //RX_FDDRC_BAND_MARGIN_3 +250 0x0007 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x5000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x6400 //RX_FDDRC_THRD_3_2 +258 0x6400 //RX_FDDRC_THRD_3_3 +259 0x2000 //RX_FDDRC_SLANT_0_0 +260 0x2000 //RX_FDDRC_SLANT_0_1 +261 0x2000 //RX_FDDRC_SLANT_0_2 +262 0x2000 //RX_FDDRC_SLANT_0_3 +263 0x5333 //RX_FDDRC_SLANT_1_0 +264 0x5333 //RX_FDDRC_SLANT_1_1 +265 0x5333 //RX_FDDRC_SLANT_1_2 +266 0x5333 //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +286 0x0100 //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 +#VOL 4 +163 0x3000 //RX_TDDRC_ALPHA_UP_1 +164 0x3000 //RX_TDDRC_ALPHA_UP_2 +165 0x3000 //RX_TDDRC_ALPHA_UP_3 +166 0x3000 //RX_TDDRC_ALPHA_UP_4 +184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +190 0x7FFF //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +269 0x0000 //RX_TDDRC_THRD_0 +270 0x0000 //RX_TDDRC_THRD_1 +271 0x7FFF //RX_TDDRC_THRD_2 +272 0x7FFF //RX_TDDRC_THRD_3 +273 0x7FFF //RX_TDDRC_SLANT_0 +274 0x7EB8 //RX_TDDRC_SLANT_1 +275 0x3000 //RX_TDDRC_ALPHA_UP_0 +276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x199A //RX_TDDRC_HMNC_GAIN +279 0x0001 //RX_TDDRC_SMT_FLAG +280 0x0CCD //RX_TDDRC_SMT_W +281 0x017F //RX_TDDRC_DRC_GAIN +195 0x0014 //RX_FDEQ_SUBNUM +196 0x4848 //RX_FDEQ_GAIN_0 +197 0x4848 //RX_FDEQ_GAIN_1 +198 0x4848 //RX_FDEQ_GAIN_2 +199 0x4848 //RX_FDEQ_GAIN_3 +200 0x4848 //RX_FDEQ_GAIN_4 +201 0x4848 //RX_FDEQ_GAIN_5 +202 0x4444 //RX_FDEQ_GAIN_6 +203 0x4040 //RX_FDEQ_GAIN_7 +204 0x4040 //RX_FDEQ_GAIN_8 +205 0x4040 //RX_FDEQ_GAIN_9 +206 0x4848 //RX_FDEQ_GAIN_10 +207 0x4848 //RX_FDEQ_GAIN_11 +208 0x4848 //RX_FDEQ_GAIN_12 +209 0x4848 //RX_FDEQ_GAIN_13 +210 0x4848 //RX_FDEQ_GAIN_14 +211 0x4848 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0202 //RX_FDEQ_BIN_0 +221 0x0203 //RX_FDEQ_BIN_1 +222 0x0303 //RX_FDEQ_BIN_2 +223 0x0304 //RX_FDEQ_BIN_3 +224 0x0405 //RX_FDEQ_BIN_4 +225 0x0506 //RX_FDEQ_BIN_5 +226 0x0708 //RX_FDEQ_BIN_6 +227 0x090A //RX_FDEQ_BIN_7 +228 0x0B0C //RX_FDEQ_BIN_8 +229 0x0D0E //RX_FDEQ_BIN_9 +230 0x0000 //RX_FDEQ_BIN_10 +231 0x0000 //RX_FDEQ_BIN_11 +232 0x0000 //RX_FDEQ_BIN_12 +233 0x0000 //RX_FDEQ_BIN_13 +234 0x0000 //RX_FDEQ_BIN_14 +235 0x0000 //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x4000 //RX_FDEQ_RESRV_0 +245 0x0320 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0030 //RX_FDDRC_BAND_MARGIN_1 +248 0x0050 //RX_FDDRC_BAND_MARGIN_2 +249 0x0080 //RX_FDDRC_BAND_MARGIN_3 +250 0x0007 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x5000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x6400 //RX_FDDRC_THRD_3_2 +258 0x6400 //RX_FDDRC_THRD_3_3 +259 0x2000 //RX_FDDRC_SLANT_0_0 +260 0x2000 //RX_FDDRC_SLANT_0_1 +261 0x2000 //RX_FDDRC_SLANT_0_2 +262 0x2000 //RX_FDDRC_SLANT_0_3 +263 0x5333 //RX_FDDRC_SLANT_1_0 +264 0x5333 //RX_FDDRC_SLANT_1_1 +265 0x5333 //RX_FDDRC_SLANT_1_2 +266 0x5333 //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +286 0x0100 //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 +#VOL 5 +163 0x3000 //RX_TDDRC_ALPHA_UP_1 +164 0x3000 //RX_TDDRC_ALPHA_UP_2 +165 0x3000 //RX_TDDRC_ALPHA_UP_3 +166 0x3000 //RX_TDDRC_ALPHA_UP_4 +184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +190 0x7FFF //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +269 0x0000 //RX_TDDRC_THRD_0 +270 0x0000 //RX_TDDRC_THRD_1 +271 0x7FFF //RX_TDDRC_THRD_2 +272 0x7FFF //RX_TDDRC_THRD_3 +273 0x7FFF //RX_TDDRC_SLANT_0 +274 0x7EB8 //RX_TDDRC_SLANT_1 +275 0x3000 //RX_TDDRC_ALPHA_UP_0 +276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x199A //RX_TDDRC_HMNC_GAIN +279 0x0001 //RX_TDDRC_SMT_FLAG +280 0x0CCD //RX_TDDRC_SMT_W +281 0x017F //RX_TDDRC_DRC_GAIN +195 0x0014 //RX_FDEQ_SUBNUM +196 0x4848 //RX_FDEQ_GAIN_0 +197 0x4848 //RX_FDEQ_GAIN_1 +198 0x4848 //RX_FDEQ_GAIN_2 +199 0x4848 //RX_FDEQ_GAIN_3 +200 0x4848 //RX_FDEQ_GAIN_4 +201 0x4848 //RX_FDEQ_GAIN_5 +202 0x4444 //RX_FDEQ_GAIN_6 +203 0x4040 //RX_FDEQ_GAIN_7 +204 0x4040 //RX_FDEQ_GAIN_8 +205 0x4040 //RX_FDEQ_GAIN_9 +206 0x4848 //RX_FDEQ_GAIN_10 +207 0x4848 //RX_FDEQ_GAIN_11 +208 0x4848 //RX_FDEQ_GAIN_12 +209 0x4848 //RX_FDEQ_GAIN_13 +210 0x4848 //RX_FDEQ_GAIN_14 +211 0x4848 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0202 //RX_FDEQ_BIN_0 +221 0x0203 //RX_FDEQ_BIN_1 +222 0x0303 //RX_FDEQ_BIN_2 +223 0x0304 //RX_FDEQ_BIN_3 +224 0x0405 //RX_FDEQ_BIN_4 +225 0x0506 //RX_FDEQ_BIN_5 +226 0x0708 //RX_FDEQ_BIN_6 +227 0x090A //RX_FDEQ_BIN_7 +228 0x0B0C //RX_FDEQ_BIN_8 +229 0x0D0E //RX_FDEQ_BIN_9 +230 0x0000 //RX_FDEQ_BIN_10 +231 0x0000 //RX_FDEQ_BIN_11 +232 0x0000 //RX_FDEQ_BIN_12 +233 0x0000 //RX_FDEQ_BIN_13 +234 0x0000 //RX_FDEQ_BIN_14 +235 0x0000 //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x4000 //RX_FDEQ_RESRV_0 +245 0x0320 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0030 //RX_FDDRC_BAND_MARGIN_1 +248 0x0050 //RX_FDDRC_BAND_MARGIN_2 +249 0x0080 //RX_FDDRC_BAND_MARGIN_3 +250 0x0007 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x5000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x6400 //RX_FDDRC_THRD_3_2 +258 0x6400 //RX_FDDRC_THRD_3_3 +259 0x2000 //RX_FDDRC_SLANT_0_0 +260 0x2000 //RX_FDDRC_SLANT_0_1 +261 0x2000 //RX_FDDRC_SLANT_0_2 +262 0x2000 //RX_FDDRC_SLANT_0_3 +263 0x5333 //RX_FDDRC_SLANT_1_0 +264 0x5333 //RX_FDDRC_SLANT_1_1 +265 0x5333 //RX_FDDRC_SLANT_1_2 +266 0x5333 //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +286 0x0100 //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 +#VOL 6 +163 0x3000 //RX_TDDRC_ALPHA_UP_1 +164 0x3000 //RX_TDDRC_ALPHA_UP_2 +165 0x3000 //RX_TDDRC_ALPHA_UP_3 +166 0x3000 //RX_TDDRC_ALPHA_UP_4 +184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +190 0x7FFF //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +269 0x0000 //RX_TDDRC_THRD_0 +270 0x0000 //RX_TDDRC_THRD_1 +271 0x7FFF //RX_TDDRC_THRD_2 +272 0x7FFF //RX_TDDRC_THRD_3 +273 0x7FFF //RX_TDDRC_SLANT_0 +274 0x7EB8 //RX_TDDRC_SLANT_1 +275 0x3000 //RX_TDDRC_ALPHA_UP_0 +276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x199A //RX_TDDRC_HMNC_GAIN +279 0x0001 //RX_TDDRC_SMT_FLAG +280 0x0CCD //RX_TDDRC_SMT_W +281 0x017F //RX_TDDRC_DRC_GAIN +195 0x0014 //RX_FDEQ_SUBNUM +196 0x4848 //RX_FDEQ_GAIN_0 +197 0x4848 //RX_FDEQ_GAIN_1 +198 0x4848 //RX_FDEQ_GAIN_2 +199 0x4848 //RX_FDEQ_GAIN_3 +200 0x4848 //RX_FDEQ_GAIN_4 +201 0x4848 //RX_FDEQ_GAIN_5 +202 0x4444 //RX_FDEQ_GAIN_6 +203 0x4040 //RX_FDEQ_GAIN_7 +204 0x4040 //RX_FDEQ_GAIN_8 +205 0x4040 //RX_FDEQ_GAIN_9 +206 0x4848 //RX_FDEQ_GAIN_10 +207 0x4848 //RX_FDEQ_GAIN_11 +208 0x4848 //RX_FDEQ_GAIN_12 +209 0x4848 //RX_FDEQ_GAIN_13 +210 0x4848 //RX_FDEQ_GAIN_14 +211 0x4848 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0202 //RX_FDEQ_BIN_0 +221 0x0203 //RX_FDEQ_BIN_1 +222 0x0303 //RX_FDEQ_BIN_2 +223 0x0304 //RX_FDEQ_BIN_3 +224 0x0405 //RX_FDEQ_BIN_4 +225 0x0506 //RX_FDEQ_BIN_5 +226 0x0708 //RX_FDEQ_BIN_6 +227 0x090A //RX_FDEQ_BIN_7 +228 0x0B0C //RX_FDEQ_BIN_8 +229 0x0D0E //RX_FDEQ_BIN_9 +230 0x0000 //RX_FDEQ_BIN_10 +231 0x0000 //RX_FDEQ_BIN_11 +232 0x0000 //RX_FDEQ_BIN_12 +233 0x0000 //RX_FDEQ_BIN_13 +234 0x0000 //RX_FDEQ_BIN_14 +235 0x0000 //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x4000 //RX_FDEQ_RESRV_0 +245 0x0320 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0030 //RX_FDDRC_BAND_MARGIN_1 +248 0x0050 //RX_FDDRC_BAND_MARGIN_2 +249 0x0080 //RX_FDDRC_BAND_MARGIN_3 +250 0x0007 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x5000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x6400 //RX_FDDRC_THRD_3_2 +258 0x6400 //RX_FDDRC_THRD_3_3 +259 0x2000 //RX_FDDRC_SLANT_0_0 +260 0x2000 //RX_FDDRC_SLANT_0_1 +261 0x2000 //RX_FDDRC_SLANT_0_2 +262 0x2000 //RX_FDDRC_SLANT_0_3 +263 0x5333 //RX_FDDRC_SLANT_1_0 +264 0x5333 //RX_FDDRC_SLANT_1_1 +265 0x5333 //RX_FDDRC_SLANT_1_2 +266 0x5333 //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +286 0x0100 //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 #CASE_NAME BLUETOOTH-BTNB-VOICE_GENERIC-WB -#PARAM_TYPE TX+RX -#TOTAL_CUSTOM_STEP 7 +#PARAM_MODE Full +#PARAM_TYPE TX+2RX +#TOTAL_CUSTOM_STEP 7+7 #TX 0 0x0008 //TX_OPERATION_MODE_0 1 0x0008 //TX_OPERATION_MODE_1 @@ -10776,20 +16279,20 @@ 248 0xF400 //TX_THR_SN_EST_6 249 0xF600 //TX_THR_SN_EST_7 250 0x0000 //TX_DELTA_THR_SN_EST_0 -251 0x0000 //TX_DELTA_THR_SN_EST_1 +251 0x0200 //TX_DELTA_THR_SN_EST_1 252 0x0200 //TX_DELTA_THR_SN_EST_2 253 0x0200 //TX_DELTA_THR_SN_EST_3 254 0x0200 //TX_DELTA_THR_SN_EST_4 255 0x0200 //TX_DELTA_THR_SN_EST_5 -256 0x0200 //TX_DELTA_THR_SN_EST_6 +256 0x0000 //TX_DELTA_THR_SN_EST_6 257 0x0200 //TX_DELTA_THR_SN_EST_7 258 0x6000 //TX_LAMBDA_NN_EST_0 -259 0x6000 //TX_LAMBDA_NN_EST_1 +259 0x4000 //TX_LAMBDA_NN_EST_1 260 0x4000 //TX_LAMBDA_NN_EST_2 261 0x4000 //TX_LAMBDA_NN_EST_3 262 0x4000 //TX_LAMBDA_NN_EST_4 263 0x4000 //TX_LAMBDA_NN_EST_5 -264 0x4000 //TX_LAMBDA_NN_EST_6 +264 0x6000 //TX_LAMBDA_NN_EST_6 265 0x4000 //TX_LAMBDA_NN_EST_7 266 0x0400 //TX_N_SN_EST 267 0x001E //TX_INBEAM_T @@ -10807,16 +16310,16 @@ 279 0x1000 //TX_B_POST_FLT_0 280 0x1000 //TX_B_POST_FLT_1 281 0x000F //TX_NS_LVL_CTRL_0 -282 0x000F //TX_NS_LVL_CTRL_1 -283 0x0011 //TX_NS_LVL_CTRL_2 +282 0x0011 //TX_NS_LVL_CTRL_1 +283 0x000F //TX_NS_LVL_CTRL_2 284 0x000F //TX_NS_LVL_CTRL_3 285 0x000F //TX_NS_LVL_CTRL_4 286 0x000F //TX_NS_LVL_CTRL_5 287 0x000F //TX_NS_LVL_CTRL_6 288 0x0011 //TX_NS_LVL_CTRL_7 289 0x000C //TX_MIN_GAIN_S_0 -290 0x000C //TX_MIN_GAIN_S_1 -291 0x000F //TX_MIN_GAIN_S_2 +290 0x000F //TX_MIN_GAIN_S_1 +291 0x000C //TX_MIN_GAIN_S_2 292 0x000C //TX_MIN_GAIN_S_3 293 0x000C //TX_MIN_GAIN_S_4 294 0x000C //TX_MIN_GAIN_S_5 @@ -10840,12 +16343,12 @@ 312 0x7FFF //TX_A_POST_FILT_0 313 0x2000 //TX_A_POST_FILT_1 314 0x4000 //TX_A_POST_FILT_S_0 -315 0x4000 //TX_A_POST_FILT_S_1 +315 0x5000 //TX_A_POST_FILT_S_1 316 0x5000 //TX_A_POST_FILT_S_2 317 0x5000 //TX_A_POST_FILT_S_3 318 0x5000 //TX_A_POST_FILT_S_4 319 0x5000 //TX_A_POST_FILT_S_5 -320 0x5000 //TX_A_POST_FILT_S_6 +320 0x4000 //TX_A_POST_FILT_S_6 321 0x5000 //TX_A_POST_FILT_S_7 322 0x1000 //TX_B_POST_FILT_0 323 0x1000 //TX_B_POST_FILT_1 @@ -10905,10 +16408,10 @@ 377 0x7FFF //TX_NOISE_TH_5_4 378 0x044C //TX_NOISE_TH_6 379 0x0014 //TX_MINENOISE_TH -380 0x4000 //TX_MINENOISE_MIC0_TH_MTS -381 0xFFEE //TX_MINENOISE_MIC0_TH_EXP -382 0x6000 //TX_MINENOISE_MIC0_S_TH_MTS -383 0xFFF3 //TX_MINENOISE_MIC0_S_TH_EXP +380 0x4000 //TX_MORENS_TFMASK_TH +381 0xFFEE //TX_DRC_QUIET_FLOOR +382 0x6000 //TX_RATIODTL_CUT_TH +383 0xFFF3 //TX_DT_CUT_K1 384 0x0666 //TX_OUT_ENER_S_TH_CLEAN 385 0x0666 //TX_OUT_ENER_S_TH_LESSCLEAN 386 0x0333 //TX_OUT_ENER_S_TH_NOISY @@ -10916,15 +16419,15 @@ 388 0x0333 //TX_OUT_ENER_TH_SPEECH 389 0x2000 //TX_SN_NPB_GAIN 390 0x0000 //TX_NN_NPB_GAIN -391 0x0000 //TX_CSX_ALPHA_0 -392 0x0000 //TX_CSX_ALPHA_1 -393 0x0000 //TX_CSX_ALPHA_2 -394 0x0000 //TX_CSX_ALPHA_3 -395 0x0800 //TX_MU_ARSP_EST -396 0x00C8 //TX_P_OUTBEAM_MIN_TH +391 0x0000 //TX_POST_MASK_SUP_HSNE +392 0x0000 //TX_TAIL_DET_TH +393 0x0000 //TX_B_LESSCUT_RTO_WTA +394 0x0000 //TX_MEL_G_R +395 0x0800 //TX_SUPHIGH_TH +396 0x00C8 //TX_MASK_G_R 397 0x0002 //TX_EXTRA_NS_L -398 0x0800 //TX_EXTRA_NS_A -399 0x0005 //TX_VR_NOISE_FLOOR_TH +398 0x0800 //TX_C_POST_FLT_MASK +399 0x0005 //TX_A_POST_FLT_WNS 400 0x0148 //TX_MIN_G_LOW300HZ 401 0x0002 //TX_MAXLEVEL_CNG 402 0x00B4 //TX_STN_NOISE_TH @@ -11039,16 +16542,16 @@ 511 0x6666 //TX_MIC_TO_BFGAIN 512 0x0000 //TX_MICTOBFGAIN0 513 0x0000 //TX_FASTMUE_TH -514 0x0000 //TX_DERVB_LEN_0 -515 0x0000 //TX_DERVB_LEN_1 -516 0x0000 //TX_RHO_DERVB -517 0x0000 //TX_MIC_INDX_DERVB -518 0x0000 //TX_MU_DERVB -519 0x0000 //TX_DR_RESRV_0 -520 0x0000 //TX_DR_RESRV_1 -521 0x0000 //TX_DR_RESRV_2 -522 0x0000 //TX_DR_RESRV_3 -523 0x0000 //TX_DR_RESRV_4 +514 0x0000 //TX_DEREVERB_LF_MU +515 0x0000 //TX_DEREVERB_HF_MU +516 0x0000 //TX_DEREVERB_DELAY +517 0x0000 //TX_DEREVERB_COEF_LEN +518 0x0000 //TX_DEREVERB_DNR +519 0x0000 //TX_DEREVERB_ALPHA +520 0x0000 //TX_DEREVERB_BETA +521 0x0000 //TX_GSC_RTOL_TH +522 0x0000 //TX_GSC_RTOH_TH +523 0x0000 //TX_WIDE2_MEANHTH 524 0x0000 //TX_DR_RESRV_5 525 0x0000 //TX_DR_RESRV_6 526 0x0000 //TX_DR_RESRV_7 @@ -11422,8 +16925,73 @@ 894 0xC000 //TX_FASTNS_SSA_THHFL 895 0xCCCC //TX_FASTNS_SSA_THLFH 896 0xD999 //TX_FASTNS_SSA_THHFH +897 0x0000 //TX_SENDFUNC_REG_MICMUTE +898 0x0000 //TX_SENDFUNC_REG_MICMUTE1 +899 0x0000 //TX_MICMUTE_RATIO_THR +900 0x0000 //TX_MICMUTE_AMP_THR +901 0x0000 //TX_MICMUTE_HPF_IND +902 0x0000 //TX_MICMUTE_LOG_EYR_TH +903 0x0000 //TX_MICMUTE_CVG_TIME +904 0x0000 //TX_MICMUTE_RELEASE_TIME +905 0x0000 //TX_MIC_VOLUME_MIC0MUTE +906 0x0000 //TX_MICMUTE_EPD_OFFSET_0 +907 0x0000 //TX_MICMUTE_FRQ_AEC_L +908 0x0000 //TX_MICMUTE_EAD_THR +909 0x0000 //TX_MICMUTE_LAMBDA_CB_NLE +910 0x0000 //TX_MICMUTE_LAMBDA_RE_EST +911 0x0000 //TX_DTD_THR1_MICMUTE_0 +912 0x0000 //TX_DTD_THR1_MICMUTE_1 +913 0x0000 //TX_DTD_THR1_MICMUTE_2 +914 0x0000 //TX_DTD_THR1_MICMUTE_3 +915 0x0000 //TX_DTD_THR2_MICMUTE_0 +916 0x0000 //TX_MICMUTE_MIN_EQ_RE_EST_0 +917 0x0000 //TX_MICMUTE_MIN_EQ_RE_EST_1 +918 0x0000 //TX_MICMUTE_MIN_EQ_RE_EST_2 +919 0x0000 //TX_MICMUTE_MIN_EQ_RE_EST_3 +920 0x0000 //TX_MICMUTE_MIN_EQ_RE_EST_4 +921 0x0000 //TX_MICMUTE_C_POST_FLT +922 0x0000 //TX_MICMUTE_DT_CUT_K +923 0x0000 //TX_MICMUTE_DT_CUT_THR +924 0x0000 //TX_MICMUTE_DT_CUT_K2 +925 0x0000 //TX_MICMUTE_DT_CUT_THR2 +926 0x0000 //TX_MICMUTE_DT2_HOLD_N +927 0x0000 //TX_MICMUTE_RATIODTH_THCUT +928 0x0000 //TX_MICMUTE_B_POST_FLT_ECHOL +929 0x0000 //TX_MICMUTE_B_POST_FLT_ECHOH +930 0x0000 //TX_MICMUTE_C_POST_FLT_MASK +931 0x0000 //TX_MICMUTE_RATIODTL_CUT_TH +932 0x0000 //TX_MICMUTE_DT_CUT_K1 +933 0x0000 //TX_MICMUTE_N2_SN_EST +934 0x0000 //TX_MICMUTE_THR_SN_EST_0 +935 0x0000 //TX_MICMUTE_MIN_G_CTRL_0 +936 0x0000 //TX_MICMUTE_A_POST_FILT_S_0 +937 0x0000 //TX_MICMUTE_B_POST_FILT_0 +938 0x0000 //TX_MIC1RUB_AMP_THR +939 0x0000 //TX_MIC1MUTE_RATIO_THR +940 0x0000 //TX_MIC1MUTE_AMP_THR +941 0x0000 //TX_MIC1MUTE_CVG_TIME +942 0x0000 //TX_MIC1MUTE_RELEASE_TIME +943 0x0000 //TX_AMS_RESRV_01 +944 0x0000 //TX_AMS_RESRV_02 +945 0x0000 //TX_AMS_RESRV_03 +946 0x0000 //TX_AMS_RESRV_04 +947 0x0000 //TX_AMS_RESRV_05 +948 0x0000 //TX_AMS_RESRV_06 +949 0x0000 //TX_AMS_RESRV_07 +950 0x0000 //TX_AMS_RESRV_08 +951 0x0000 //TX_AMS_RESRV_09 +952 0x0000 //TX_AMS_RESRV_10 +953 0x0000 //TX_AMS_RESRV_11 +954 0x0000 //TX_AMS_RESRV_12 +955 0x0000 //TX_AMS_RESRV_13 +956 0x0000 //TX_AMS_RESRV_14 +957 0x0000 //TX_AMS_RESRV_15 +958 0x0000 //TX_AMS_RESRV_16 +959 0x0000 //TX_AMS_RESRV_17 +960 0x0000 //TX_AMS_RESRV_18 +961 0x0000 //TX_AMS_RESRV_19 #RX -0 0x006C //RX_RECVFUNC_MODE_0 +0 0x206C //RX_RECVFUNC_MODE_0 1 0x0000 //RX_RECVFUNC_MODE_1 2 0x0001 //RX_SAMPLINGFREQ_SIG 3 0x0001 //RX_SAMPLINGFREQ_PROC @@ -12273,10 +17841,862 @@ 110 0x0000 //RX_FDDRC_RESRV_0 129 0x0100 //RX_SPK_VOL 130 0x0000 //RX_VOL_RESRV_0 +#RX 2 +157 0x206C //RX_RECVFUNC_MODE_0 +158 0x0000 //RX_RECVFUNC_MODE_1 +159 0x0001 //RX_SAMPLINGFREQ_SIG +160 0x0001 //RX_SAMPLINGFREQ_PROC +161 0x000A //RX_FRAME_SZ +162 0x0000 //RX_DELAY_OPT +163 0x1000 //RX_TDDRC_ALPHA_UP_1 +164 0x1000 //RX_TDDRC_ALPHA_UP_2 +165 0x1000 //RX_TDDRC_ALPHA_UP_3 +166 0x1000 //RX_TDDRC_ALPHA_UP_4 +167 0x0800 //RX_PGA +168 0x7FFF //RX_A_HP +169 0x4000 //RX_B_PE +170 0x3800 //RX_THR_PITCH_DET_0 +171 0x3000 //RX_THR_PITCH_DET_1 +172 0x2800 //RX_THR_PITCH_DET_2 +173 0x0008 //RX_PITCH_BFR_LEN +174 0x0003 //RX_SBD_PITCH_DET +175 0x0100 //RX_PP_RESRV_0 +176 0x0020 //RX_PP_RESRV_1 +177 0x0600 //RX_N_SN_EST +178 0x000C //RX_N2_SN_EST +179 0x0010 //RX_NS_LVL_CTRL +180 0xF800 //RX_THR_SN_EST +181 0x7CCD //RX_LAMBDA_PFILT +182 0x000A //RX_FENS_RESRV_0 +183 0x0190 //RX_FENS_RESRV_1 +184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +187 0x0002 //RX_EXTRA_NS_L +188 0x0800 //RX_EXTRA_NS_A +189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +190 0x7FFF //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +192 0x199A //RX_A_POST_FLT +193 0x0000 //RX_LMT_THRD +194 0x4000 //RX_LMT_ALPHA +195 0x001C //RX_FDEQ_SUBNUM +196 0x4848 //RX_FDEQ_GAIN_0 +197 0x4848 //RX_FDEQ_GAIN_1 +198 0x4848 //RX_FDEQ_GAIN_2 +199 0x4848 //RX_FDEQ_GAIN_3 +200 0x4848 //RX_FDEQ_GAIN_4 +201 0x4848 //RX_FDEQ_GAIN_5 +202 0x4848 //RX_FDEQ_GAIN_6 +203 0x4848 //RX_FDEQ_GAIN_7 +204 0x4848 //RX_FDEQ_GAIN_8 +205 0x3C3C //RX_FDEQ_GAIN_9 +206 0x3C3C //RX_FDEQ_GAIN_10 +207 0x3838 //RX_FDEQ_GAIN_11 +208 0x3838 //RX_FDEQ_GAIN_12 +209 0x3030 //RX_FDEQ_GAIN_13 +210 0x4848 //RX_FDEQ_GAIN_14 +211 0x4848 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0202 //RX_FDEQ_BIN_0 +221 0x0203 //RX_FDEQ_BIN_1 +222 0x0303 //RX_FDEQ_BIN_2 +223 0x0304 //RX_FDEQ_BIN_3 +224 0x0405 //RX_FDEQ_BIN_4 +225 0x0506 //RX_FDEQ_BIN_5 +226 0x0708 //RX_FDEQ_BIN_6 +227 0x090A //RX_FDEQ_BIN_7 +228 0x0B0C //RX_FDEQ_BIN_8 +229 0x0D0E //RX_FDEQ_BIN_9 +230 0x0E0F //RX_FDEQ_BIN_10 +231 0x0F10 //RX_FDEQ_BIN_11 +232 0x1011 //RX_FDEQ_BIN_12 +233 0x1112 //RX_FDEQ_BIN_13 +234 0x0000 //RX_FDEQ_BIN_14 +235 0x0000 //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x4000 //RX_FDEQ_RESRV_0 +245 0x0320 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0030 //RX_FDDRC_BAND_MARGIN_1 +248 0x0050 //RX_FDDRC_BAND_MARGIN_2 +249 0x0080 //RX_FDDRC_BAND_MARGIN_3 +250 0x0007 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x5000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x6400 //RX_FDDRC_THRD_3_2 +258 0x6400 //RX_FDDRC_THRD_3_3 +259 0x2000 //RX_FDDRC_SLANT_0_0 +260 0x2000 //RX_FDDRC_SLANT_0_1 +261 0x2000 //RX_FDDRC_SLANT_0_2 +262 0x2000 //RX_FDDRC_SLANT_0_3 +263 0x5333 //RX_FDDRC_SLANT_1_0 +264 0x5333 //RX_FDDRC_SLANT_1_1 +265 0x5333 //RX_FDDRC_SLANT_1_2 +266 0x5333 //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +268 0x0000 //RX_FILTINDX +269 0x0000 //RX_TDDRC_THRD_0 +270 0x0000 //RX_TDDRC_THRD_1 +271 0x7FFF //RX_TDDRC_THRD_2 +272 0x7FFF //RX_TDDRC_THRD_3 +273 0x7E70 //RX_TDDRC_SLANT_0 +274 0x7FFF //RX_TDDRC_SLANT_1 +275 0x1000 //RX_TDDRC_ALPHA_UP_0 +276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x199A //RX_TDDRC_HMNC_GAIN +279 0x0001 //RX_TDDRC_SMT_FLAG +280 0x0CCD //RX_TDDRC_SMT_W +281 0x0155 //RX_TDDRC_DRC_GAIN +282 0x7C00 //RX_LAMBDA_PKA_FP +283 0x2000 //RX_TPKA_FP +284 0x2000 //RX_MIN_G_FP +285 0x0080 //RX_MAX_G_FP +286 0x0100 //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 +288 0x0000 //RX_MAXLEVEL_CNG +289 0x3000 //RX_BWE_UV_TH +290 0x3000 //RX_BWE_UV_TH2 +291 0x1800 //RX_BWE_UV_TH3 +292 0x1000 //RX_BWE_V_TH +293 0x04CD //RX_BWE_GAIN1_V_TH1 +294 0x0F33 //RX_BWE_GAIN1_V_TH2 +295 0x7333 //RX_BWE_UV_EQ +296 0x199A //RX_BWE_V_EQ +297 0x7333 //RX_BWE_TONE_TH +298 0x0004 //RX_BWE_UV_HOLD_T +299 0x6CCD //RX_BWE_GAIN2_ALPHA +300 0x799A //RX_BWE_GAIN3_ALPHA +301 0x001E //RX_BWE_CUTOFF +302 0x3000 //RX_BWE_GAINFILL +303 0x3200 //RX_BWE_MAXTH_TONE +304 0x2000 //RX_BWE_EQ_0 +305 0x2000 //RX_BWE_EQ_1 +306 0x2000 //RX_BWE_EQ_2 +307 0x2000 //RX_BWE_EQ_3 +308 0x2000 //RX_BWE_EQ_4 +309 0x2000 //RX_BWE_EQ_5 +310 0x2000 //RX_BWE_EQ_6 +311 0x0000 //RX_BWE_RESRV_0 +312 0x0000 //RX_BWE_RESRV_1 +313 0x0000 //RX_BWE_RESRV_2 +#VOL 0 +163 0x1000 //RX_TDDRC_ALPHA_UP_1 +164 0x1000 //RX_TDDRC_ALPHA_UP_2 +165 0x1000 //RX_TDDRC_ALPHA_UP_3 +166 0x1000 //RX_TDDRC_ALPHA_UP_4 +184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +190 0x7FFF //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +269 0x0000 //RX_TDDRC_THRD_0 +270 0x0000 //RX_TDDRC_THRD_1 +271 0x7FFF //RX_TDDRC_THRD_2 +272 0x7FFF //RX_TDDRC_THRD_3 +273 0x7E70 //RX_TDDRC_SLANT_0 +274 0x7FFF //RX_TDDRC_SLANT_1 +275 0x1000 //RX_TDDRC_ALPHA_UP_0 +276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x199A //RX_TDDRC_HMNC_GAIN +279 0x0001 //RX_TDDRC_SMT_FLAG +280 0x0CCD //RX_TDDRC_SMT_W +281 0x0155 //RX_TDDRC_DRC_GAIN +195 0x001C //RX_FDEQ_SUBNUM +196 0x4848 //RX_FDEQ_GAIN_0 +197 0x4848 //RX_FDEQ_GAIN_1 +198 0x4848 //RX_FDEQ_GAIN_2 +199 0x4848 //RX_FDEQ_GAIN_3 +200 0x4848 //RX_FDEQ_GAIN_4 +201 0x4848 //RX_FDEQ_GAIN_5 +202 0x4848 //RX_FDEQ_GAIN_6 +203 0x4848 //RX_FDEQ_GAIN_7 +204 0x4848 //RX_FDEQ_GAIN_8 +205 0x3C3C //RX_FDEQ_GAIN_9 +206 0x3C3C //RX_FDEQ_GAIN_10 +207 0x3838 //RX_FDEQ_GAIN_11 +208 0x3838 //RX_FDEQ_GAIN_12 +209 0x3030 //RX_FDEQ_GAIN_13 +210 0x4848 //RX_FDEQ_GAIN_14 +211 0x4848 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0202 //RX_FDEQ_BIN_0 +221 0x0203 //RX_FDEQ_BIN_1 +222 0x0303 //RX_FDEQ_BIN_2 +223 0x0304 //RX_FDEQ_BIN_3 +224 0x0405 //RX_FDEQ_BIN_4 +225 0x0506 //RX_FDEQ_BIN_5 +226 0x0708 //RX_FDEQ_BIN_6 +227 0x090A //RX_FDEQ_BIN_7 +228 0x0B0C //RX_FDEQ_BIN_8 +229 0x0D0E //RX_FDEQ_BIN_9 +230 0x0E0F //RX_FDEQ_BIN_10 +231 0x0F10 //RX_FDEQ_BIN_11 +232 0x1011 //RX_FDEQ_BIN_12 +233 0x1112 //RX_FDEQ_BIN_13 +234 0x0000 //RX_FDEQ_BIN_14 +235 0x0000 //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x4000 //RX_FDEQ_RESRV_0 +245 0x0320 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0030 //RX_FDDRC_BAND_MARGIN_1 +248 0x0050 //RX_FDDRC_BAND_MARGIN_2 +249 0x0080 //RX_FDDRC_BAND_MARGIN_3 +250 0x0007 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x5000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x6400 //RX_FDDRC_THRD_3_2 +258 0x6400 //RX_FDDRC_THRD_3_3 +259 0x2000 //RX_FDDRC_SLANT_0_0 +260 0x2000 //RX_FDDRC_SLANT_0_1 +261 0x2000 //RX_FDDRC_SLANT_0_2 +262 0x2000 //RX_FDDRC_SLANT_0_3 +263 0x5333 //RX_FDDRC_SLANT_1_0 +264 0x5333 //RX_FDDRC_SLANT_1_1 +265 0x5333 //RX_FDDRC_SLANT_1_2 +266 0x5333 //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +286 0x0100 //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 +#VOL 1 +163 0x1000 //RX_TDDRC_ALPHA_UP_1 +164 0x1000 //RX_TDDRC_ALPHA_UP_2 +165 0x1000 //RX_TDDRC_ALPHA_UP_3 +166 0x1000 //RX_TDDRC_ALPHA_UP_4 +184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +190 0x7FFF //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +269 0x0000 //RX_TDDRC_THRD_0 +270 0x0000 //RX_TDDRC_THRD_1 +271 0x7FFF //RX_TDDRC_THRD_2 +272 0x7FFF //RX_TDDRC_THRD_3 +273 0x7E70 //RX_TDDRC_SLANT_0 +274 0x7FFF //RX_TDDRC_SLANT_1 +275 0x1000 //RX_TDDRC_ALPHA_UP_0 +276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x199A //RX_TDDRC_HMNC_GAIN +279 0x0001 //RX_TDDRC_SMT_FLAG +280 0x0CCD //RX_TDDRC_SMT_W +281 0x0155 //RX_TDDRC_DRC_GAIN +195 0x001C //RX_FDEQ_SUBNUM +196 0x4848 //RX_FDEQ_GAIN_0 +197 0x4848 //RX_FDEQ_GAIN_1 +198 0x4848 //RX_FDEQ_GAIN_2 +199 0x4848 //RX_FDEQ_GAIN_3 +200 0x4848 //RX_FDEQ_GAIN_4 +201 0x4848 //RX_FDEQ_GAIN_5 +202 0x4848 //RX_FDEQ_GAIN_6 +203 0x4848 //RX_FDEQ_GAIN_7 +204 0x4848 //RX_FDEQ_GAIN_8 +205 0x3C3C //RX_FDEQ_GAIN_9 +206 0x3C3C //RX_FDEQ_GAIN_10 +207 0x3838 //RX_FDEQ_GAIN_11 +208 0x3838 //RX_FDEQ_GAIN_12 +209 0x3030 //RX_FDEQ_GAIN_13 +210 0x4848 //RX_FDEQ_GAIN_14 +211 0x4848 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0202 //RX_FDEQ_BIN_0 +221 0x0203 //RX_FDEQ_BIN_1 +222 0x0303 //RX_FDEQ_BIN_2 +223 0x0304 //RX_FDEQ_BIN_3 +224 0x0405 //RX_FDEQ_BIN_4 +225 0x0506 //RX_FDEQ_BIN_5 +226 0x0708 //RX_FDEQ_BIN_6 +227 0x090A //RX_FDEQ_BIN_7 +228 0x0B0C //RX_FDEQ_BIN_8 +229 0x0D0E //RX_FDEQ_BIN_9 +230 0x0E0F //RX_FDEQ_BIN_10 +231 0x0F10 //RX_FDEQ_BIN_11 +232 0x1011 //RX_FDEQ_BIN_12 +233 0x1112 //RX_FDEQ_BIN_13 +234 0x0000 //RX_FDEQ_BIN_14 +235 0x0000 //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x4000 //RX_FDEQ_RESRV_0 +245 0x0320 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0030 //RX_FDDRC_BAND_MARGIN_1 +248 0x0050 //RX_FDDRC_BAND_MARGIN_2 +249 0x0080 //RX_FDDRC_BAND_MARGIN_3 +250 0x0007 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x5000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x6400 //RX_FDDRC_THRD_3_2 +258 0x6400 //RX_FDDRC_THRD_3_3 +259 0x2000 //RX_FDDRC_SLANT_0_0 +260 0x2000 //RX_FDDRC_SLANT_0_1 +261 0x2000 //RX_FDDRC_SLANT_0_2 +262 0x2000 //RX_FDDRC_SLANT_0_3 +263 0x5333 //RX_FDDRC_SLANT_1_0 +264 0x5333 //RX_FDDRC_SLANT_1_1 +265 0x5333 //RX_FDDRC_SLANT_1_2 +266 0x5333 //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +286 0x0100 //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 +#VOL 2 +163 0x1000 //RX_TDDRC_ALPHA_UP_1 +164 0x1000 //RX_TDDRC_ALPHA_UP_2 +165 0x1000 //RX_TDDRC_ALPHA_UP_3 +166 0x1000 //RX_TDDRC_ALPHA_UP_4 +184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +190 0x7FFF //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +269 0x0000 //RX_TDDRC_THRD_0 +270 0x0000 //RX_TDDRC_THRD_1 +271 0x7FFF //RX_TDDRC_THRD_2 +272 0x7FFF //RX_TDDRC_THRD_3 +273 0x7E70 //RX_TDDRC_SLANT_0 +274 0x7FFF //RX_TDDRC_SLANT_1 +275 0x1000 //RX_TDDRC_ALPHA_UP_0 +276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x199A //RX_TDDRC_HMNC_GAIN +279 0x0001 //RX_TDDRC_SMT_FLAG +280 0x0CCD //RX_TDDRC_SMT_W +281 0x0155 //RX_TDDRC_DRC_GAIN +195 0x001C //RX_FDEQ_SUBNUM +196 0x4848 //RX_FDEQ_GAIN_0 +197 0x4848 //RX_FDEQ_GAIN_1 +198 0x4848 //RX_FDEQ_GAIN_2 +199 0x4848 //RX_FDEQ_GAIN_3 +200 0x4848 //RX_FDEQ_GAIN_4 +201 0x4848 //RX_FDEQ_GAIN_5 +202 0x4848 //RX_FDEQ_GAIN_6 +203 0x4848 //RX_FDEQ_GAIN_7 +204 0x4848 //RX_FDEQ_GAIN_8 +205 0x3C3C //RX_FDEQ_GAIN_9 +206 0x3C3C //RX_FDEQ_GAIN_10 +207 0x3838 //RX_FDEQ_GAIN_11 +208 0x3838 //RX_FDEQ_GAIN_12 +209 0x3030 //RX_FDEQ_GAIN_13 +210 0x4848 //RX_FDEQ_GAIN_14 +211 0x4848 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0202 //RX_FDEQ_BIN_0 +221 0x0203 //RX_FDEQ_BIN_1 +222 0x0303 //RX_FDEQ_BIN_2 +223 0x0304 //RX_FDEQ_BIN_3 +224 0x0405 //RX_FDEQ_BIN_4 +225 0x0506 //RX_FDEQ_BIN_5 +226 0x0708 //RX_FDEQ_BIN_6 +227 0x090A //RX_FDEQ_BIN_7 +228 0x0B0C //RX_FDEQ_BIN_8 +229 0x0D0E //RX_FDEQ_BIN_9 +230 0x0E0F //RX_FDEQ_BIN_10 +231 0x0F10 //RX_FDEQ_BIN_11 +232 0x1011 //RX_FDEQ_BIN_12 +233 0x1112 //RX_FDEQ_BIN_13 +234 0x0000 //RX_FDEQ_BIN_14 +235 0x0000 //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x4000 //RX_FDEQ_RESRV_0 +245 0x0320 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0030 //RX_FDDRC_BAND_MARGIN_1 +248 0x0050 //RX_FDDRC_BAND_MARGIN_2 +249 0x0080 //RX_FDDRC_BAND_MARGIN_3 +250 0x0007 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x5000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x6400 //RX_FDDRC_THRD_3_2 +258 0x6400 //RX_FDDRC_THRD_3_3 +259 0x2000 //RX_FDDRC_SLANT_0_0 +260 0x2000 //RX_FDDRC_SLANT_0_1 +261 0x2000 //RX_FDDRC_SLANT_0_2 +262 0x2000 //RX_FDDRC_SLANT_0_3 +263 0x5333 //RX_FDDRC_SLANT_1_0 +264 0x5333 //RX_FDDRC_SLANT_1_1 +265 0x5333 //RX_FDDRC_SLANT_1_2 +266 0x5333 //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +286 0x0100 //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 +#VOL 3 +163 0x1000 //RX_TDDRC_ALPHA_UP_1 +164 0x1000 //RX_TDDRC_ALPHA_UP_2 +165 0x1000 //RX_TDDRC_ALPHA_UP_3 +166 0x1000 //RX_TDDRC_ALPHA_UP_4 +184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +190 0x7FFF //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +269 0x0000 //RX_TDDRC_THRD_0 +270 0x0000 //RX_TDDRC_THRD_1 +271 0x7FFF //RX_TDDRC_THRD_2 +272 0x7FFF //RX_TDDRC_THRD_3 +273 0x7E70 //RX_TDDRC_SLANT_0 +274 0x7FFF //RX_TDDRC_SLANT_1 +275 0x1000 //RX_TDDRC_ALPHA_UP_0 +276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x199A //RX_TDDRC_HMNC_GAIN +279 0x0001 //RX_TDDRC_SMT_FLAG +280 0x0CCD //RX_TDDRC_SMT_W +281 0x0155 //RX_TDDRC_DRC_GAIN +195 0x001C //RX_FDEQ_SUBNUM +196 0x4848 //RX_FDEQ_GAIN_0 +197 0x4848 //RX_FDEQ_GAIN_1 +198 0x4848 //RX_FDEQ_GAIN_2 +199 0x4848 //RX_FDEQ_GAIN_3 +200 0x4848 //RX_FDEQ_GAIN_4 +201 0x4848 //RX_FDEQ_GAIN_5 +202 0x4848 //RX_FDEQ_GAIN_6 +203 0x4848 //RX_FDEQ_GAIN_7 +204 0x4848 //RX_FDEQ_GAIN_8 +205 0x3C3C //RX_FDEQ_GAIN_9 +206 0x3C3C //RX_FDEQ_GAIN_10 +207 0x3838 //RX_FDEQ_GAIN_11 +208 0x3838 //RX_FDEQ_GAIN_12 +209 0x3030 //RX_FDEQ_GAIN_13 +210 0x4848 //RX_FDEQ_GAIN_14 +211 0x4848 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0202 //RX_FDEQ_BIN_0 +221 0x0203 //RX_FDEQ_BIN_1 +222 0x0303 //RX_FDEQ_BIN_2 +223 0x0304 //RX_FDEQ_BIN_3 +224 0x0405 //RX_FDEQ_BIN_4 +225 0x0506 //RX_FDEQ_BIN_5 +226 0x0708 //RX_FDEQ_BIN_6 +227 0x090A //RX_FDEQ_BIN_7 +228 0x0B0C //RX_FDEQ_BIN_8 +229 0x0D0E //RX_FDEQ_BIN_9 +230 0x0E0F //RX_FDEQ_BIN_10 +231 0x0F10 //RX_FDEQ_BIN_11 +232 0x1011 //RX_FDEQ_BIN_12 +233 0x1112 //RX_FDEQ_BIN_13 +234 0x0000 //RX_FDEQ_BIN_14 +235 0x0000 //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x4000 //RX_FDEQ_RESRV_0 +245 0x0320 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0030 //RX_FDDRC_BAND_MARGIN_1 +248 0x0050 //RX_FDDRC_BAND_MARGIN_2 +249 0x0080 //RX_FDDRC_BAND_MARGIN_3 +250 0x0007 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x5000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x6400 //RX_FDDRC_THRD_3_2 +258 0x6400 //RX_FDDRC_THRD_3_3 +259 0x2000 //RX_FDDRC_SLANT_0_0 +260 0x2000 //RX_FDDRC_SLANT_0_1 +261 0x2000 //RX_FDDRC_SLANT_0_2 +262 0x2000 //RX_FDDRC_SLANT_0_3 +263 0x5333 //RX_FDDRC_SLANT_1_0 +264 0x5333 //RX_FDDRC_SLANT_1_1 +265 0x5333 //RX_FDDRC_SLANT_1_2 +266 0x5333 //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +286 0x0100 //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 +#VOL 4 +163 0x1000 //RX_TDDRC_ALPHA_UP_1 +164 0x1000 //RX_TDDRC_ALPHA_UP_2 +165 0x1000 //RX_TDDRC_ALPHA_UP_3 +166 0x1000 //RX_TDDRC_ALPHA_UP_4 +184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +190 0x7FFF //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +269 0x0000 //RX_TDDRC_THRD_0 +270 0x0000 //RX_TDDRC_THRD_1 +271 0x7FFF //RX_TDDRC_THRD_2 +272 0x7FFF //RX_TDDRC_THRD_3 +273 0x7E70 //RX_TDDRC_SLANT_0 +274 0x7FFF //RX_TDDRC_SLANT_1 +275 0x1000 //RX_TDDRC_ALPHA_UP_0 +276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x199A //RX_TDDRC_HMNC_GAIN +279 0x0001 //RX_TDDRC_SMT_FLAG +280 0x0CCD //RX_TDDRC_SMT_W +281 0x0155 //RX_TDDRC_DRC_GAIN +195 0x001C //RX_FDEQ_SUBNUM +196 0x4848 //RX_FDEQ_GAIN_0 +197 0x4848 //RX_FDEQ_GAIN_1 +198 0x4848 //RX_FDEQ_GAIN_2 +199 0x4848 //RX_FDEQ_GAIN_3 +200 0x4848 //RX_FDEQ_GAIN_4 +201 0x4848 //RX_FDEQ_GAIN_5 +202 0x4848 //RX_FDEQ_GAIN_6 +203 0x4848 //RX_FDEQ_GAIN_7 +204 0x4848 //RX_FDEQ_GAIN_8 +205 0x3C3C //RX_FDEQ_GAIN_9 +206 0x3C3C //RX_FDEQ_GAIN_10 +207 0x3838 //RX_FDEQ_GAIN_11 +208 0x3838 //RX_FDEQ_GAIN_12 +209 0x3030 //RX_FDEQ_GAIN_13 +210 0x4848 //RX_FDEQ_GAIN_14 +211 0x4848 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0202 //RX_FDEQ_BIN_0 +221 0x0203 //RX_FDEQ_BIN_1 +222 0x0303 //RX_FDEQ_BIN_2 +223 0x0304 //RX_FDEQ_BIN_3 +224 0x0405 //RX_FDEQ_BIN_4 +225 0x0506 //RX_FDEQ_BIN_5 +226 0x0708 //RX_FDEQ_BIN_6 +227 0x090A //RX_FDEQ_BIN_7 +228 0x0B0C //RX_FDEQ_BIN_8 +229 0x0D0E //RX_FDEQ_BIN_9 +230 0x0E0F //RX_FDEQ_BIN_10 +231 0x0F10 //RX_FDEQ_BIN_11 +232 0x1011 //RX_FDEQ_BIN_12 +233 0x1112 //RX_FDEQ_BIN_13 +234 0x0000 //RX_FDEQ_BIN_14 +235 0x0000 //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x4000 //RX_FDEQ_RESRV_0 +245 0x0320 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0030 //RX_FDDRC_BAND_MARGIN_1 +248 0x0050 //RX_FDDRC_BAND_MARGIN_2 +249 0x0080 //RX_FDDRC_BAND_MARGIN_3 +250 0x0007 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x5000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x6400 //RX_FDDRC_THRD_3_2 +258 0x6400 //RX_FDDRC_THRD_3_3 +259 0x2000 //RX_FDDRC_SLANT_0_0 +260 0x2000 //RX_FDDRC_SLANT_0_1 +261 0x2000 //RX_FDDRC_SLANT_0_2 +262 0x2000 //RX_FDDRC_SLANT_0_3 +263 0x5333 //RX_FDDRC_SLANT_1_0 +264 0x5333 //RX_FDDRC_SLANT_1_1 +265 0x5333 //RX_FDDRC_SLANT_1_2 +266 0x5333 //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +286 0x0100 //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 +#VOL 5 +163 0x1000 //RX_TDDRC_ALPHA_UP_1 +164 0x1000 //RX_TDDRC_ALPHA_UP_2 +165 0x1000 //RX_TDDRC_ALPHA_UP_3 +166 0x1000 //RX_TDDRC_ALPHA_UP_4 +184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +190 0x7FFF //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +269 0x0000 //RX_TDDRC_THRD_0 +270 0x0000 //RX_TDDRC_THRD_1 +271 0x7FFF //RX_TDDRC_THRD_2 +272 0x7FFF //RX_TDDRC_THRD_3 +273 0x7E70 //RX_TDDRC_SLANT_0 +274 0x7FFF //RX_TDDRC_SLANT_1 +275 0x1000 //RX_TDDRC_ALPHA_UP_0 +276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x199A //RX_TDDRC_HMNC_GAIN +279 0x0001 //RX_TDDRC_SMT_FLAG +280 0x0CCD //RX_TDDRC_SMT_W +281 0x0155 //RX_TDDRC_DRC_GAIN +195 0x001C //RX_FDEQ_SUBNUM +196 0x4848 //RX_FDEQ_GAIN_0 +197 0x4848 //RX_FDEQ_GAIN_1 +198 0x4848 //RX_FDEQ_GAIN_2 +199 0x4848 //RX_FDEQ_GAIN_3 +200 0x4848 //RX_FDEQ_GAIN_4 +201 0x4848 //RX_FDEQ_GAIN_5 +202 0x4848 //RX_FDEQ_GAIN_6 +203 0x4848 //RX_FDEQ_GAIN_7 +204 0x4848 //RX_FDEQ_GAIN_8 +205 0x3C3C //RX_FDEQ_GAIN_9 +206 0x3C3C //RX_FDEQ_GAIN_10 +207 0x3838 //RX_FDEQ_GAIN_11 +208 0x3838 //RX_FDEQ_GAIN_12 +209 0x3030 //RX_FDEQ_GAIN_13 +210 0x4848 //RX_FDEQ_GAIN_14 +211 0x4848 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0202 //RX_FDEQ_BIN_0 +221 0x0203 //RX_FDEQ_BIN_1 +222 0x0303 //RX_FDEQ_BIN_2 +223 0x0304 //RX_FDEQ_BIN_3 +224 0x0405 //RX_FDEQ_BIN_4 +225 0x0506 //RX_FDEQ_BIN_5 +226 0x0708 //RX_FDEQ_BIN_6 +227 0x090A //RX_FDEQ_BIN_7 +228 0x0B0C //RX_FDEQ_BIN_8 +229 0x0D0E //RX_FDEQ_BIN_9 +230 0x0E0F //RX_FDEQ_BIN_10 +231 0x0F10 //RX_FDEQ_BIN_11 +232 0x1011 //RX_FDEQ_BIN_12 +233 0x1112 //RX_FDEQ_BIN_13 +234 0x0000 //RX_FDEQ_BIN_14 +235 0x0000 //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x4000 //RX_FDEQ_RESRV_0 +245 0x0320 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0030 //RX_FDDRC_BAND_MARGIN_1 +248 0x0050 //RX_FDDRC_BAND_MARGIN_2 +249 0x0080 //RX_FDDRC_BAND_MARGIN_3 +250 0x0007 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x5000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x6400 //RX_FDDRC_THRD_3_2 +258 0x6400 //RX_FDDRC_THRD_3_3 +259 0x2000 //RX_FDDRC_SLANT_0_0 +260 0x2000 //RX_FDDRC_SLANT_0_1 +261 0x2000 //RX_FDDRC_SLANT_0_2 +262 0x2000 //RX_FDDRC_SLANT_0_3 +263 0x5333 //RX_FDDRC_SLANT_1_0 +264 0x5333 //RX_FDDRC_SLANT_1_1 +265 0x5333 //RX_FDDRC_SLANT_1_2 +266 0x5333 //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +286 0x0100 //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 +#VOL 6 +163 0x1000 //RX_TDDRC_ALPHA_UP_1 +164 0x1000 //RX_TDDRC_ALPHA_UP_2 +165 0x1000 //RX_TDDRC_ALPHA_UP_3 +166 0x1000 //RX_TDDRC_ALPHA_UP_4 +184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +190 0x7FFF //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +269 0x0000 //RX_TDDRC_THRD_0 +270 0x0000 //RX_TDDRC_THRD_1 +271 0x7FFF //RX_TDDRC_THRD_2 +272 0x7FFF //RX_TDDRC_THRD_3 +273 0x7E70 //RX_TDDRC_SLANT_0 +274 0x7FFF //RX_TDDRC_SLANT_1 +275 0x1000 //RX_TDDRC_ALPHA_UP_0 +276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x199A //RX_TDDRC_HMNC_GAIN +279 0x0001 //RX_TDDRC_SMT_FLAG +280 0x0CCD //RX_TDDRC_SMT_W +281 0x0155 //RX_TDDRC_DRC_GAIN +195 0x001C //RX_FDEQ_SUBNUM +196 0x4848 //RX_FDEQ_GAIN_0 +197 0x4848 //RX_FDEQ_GAIN_1 +198 0x4848 //RX_FDEQ_GAIN_2 +199 0x4848 //RX_FDEQ_GAIN_3 +200 0x4848 //RX_FDEQ_GAIN_4 +201 0x4848 //RX_FDEQ_GAIN_5 +202 0x4848 //RX_FDEQ_GAIN_6 +203 0x4848 //RX_FDEQ_GAIN_7 +204 0x4848 //RX_FDEQ_GAIN_8 +205 0x3C3C //RX_FDEQ_GAIN_9 +206 0x3C3C //RX_FDEQ_GAIN_10 +207 0x3838 //RX_FDEQ_GAIN_11 +208 0x3838 //RX_FDEQ_GAIN_12 +209 0x3030 //RX_FDEQ_GAIN_13 +210 0x4848 //RX_FDEQ_GAIN_14 +211 0x4848 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0202 //RX_FDEQ_BIN_0 +221 0x0203 //RX_FDEQ_BIN_1 +222 0x0303 //RX_FDEQ_BIN_2 +223 0x0304 //RX_FDEQ_BIN_3 +224 0x0405 //RX_FDEQ_BIN_4 +225 0x0506 //RX_FDEQ_BIN_5 +226 0x0708 //RX_FDEQ_BIN_6 +227 0x090A //RX_FDEQ_BIN_7 +228 0x0B0C //RX_FDEQ_BIN_8 +229 0x0D0E //RX_FDEQ_BIN_9 +230 0x0E0F //RX_FDEQ_BIN_10 +231 0x0F10 //RX_FDEQ_BIN_11 +232 0x1011 //RX_FDEQ_BIN_12 +233 0x1112 //RX_FDEQ_BIN_13 +234 0x0000 //RX_FDEQ_BIN_14 +235 0x0000 //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x4000 //RX_FDEQ_RESRV_0 +245 0x0320 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0030 //RX_FDDRC_BAND_MARGIN_1 +248 0x0050 //RX_FDDRC_BAND_MARGIN_2 +249 0x0080 //RX_FDDRC_BAND_MARGIN_3 +250 0x0007 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x5000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x6400 //RX_FDDRC_THRD_3_2 +258 0x6400 //RX_FDDRC_THRD_3_3 +259 0x2000 //RX_FDDRC_SLANT_0_0 +260 0x2000 //RX_FDDRC_SLANT_0_1 +261 0x2000 //RX_FDDRC_SLANT_0_2 +262 0x2000 //RX_FDDRC_SLANT_0_3 +263 0x5333 //RX_FDDRC_SLANT_1_0 +264 0x5333 //RX_FDDRC_SLANT_1_1 +265 0x5333 //RX_FDDRC_SLANT_1_2 +266 0x5333 //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +286 0x0100 //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 #CASE_NAME BLUETOOTH-BTNB-VOICE_GENERIC-SWB -#PARAM_TYPE TX+RX -#TOTAL_CUSTOM_STEP 7 +#PARAM_MODE Full +#PARAM_TYPE TX+2RX +#TOTAL_CUSTOM_STEP 7+7 #TX 0 0x0001 //TX_OPERATION_MODE_0 1 0x0001 //TX_OPERATION_MODE_1 @@ -12529,20 +18949,20 @@ 248 0xF400 //TX_THR_SN_EST_6 249 0xF600 //TX_THR_SN_EST_7 250 0x0000 //TX_DELTA_THR_SN_EST_0 -251 0x0000 //TX_DELTA_THR_SN_EST_1 +251 0x0200 //TX_DELTA_THR_SN_EST_1 252 0x0200 //TX_DELTA_THR_SN_EST_2 253 0x0200 //TX_DELTA_THR_SN_EST_3 254 0x0200 //TX_DELTA_THR_SN_EST_4 255 0x0200 //TX_DELTA_THR_SN_EST_5 -256 0x0200 //TX_DELTA_THR_SN_EST_6 +256 0x0000 //TX_DELTA_THR_SN_EST_6 257 0x0200 //TX_DELTA_THR_SN_EST_7 258 0x6000 //TX_LAMBDA_NN_EST_0 -259 0x6000 //TX_LAMBDA_NN_EST_1 +259 0x4000 //TX_LAMBDA_NN_EST_1 260 0x4000 //TX_LAMBDA_NN_EST_2 261 0x4000 //TX_LAMBDA_NN_EST_3 262 0x4000 //TX_LAMBDA_NN_EST_4 263 0x4000 //TX_LAMBDA_NN_EST_5 -264 0x4000 //TX_LAMBDA_NN_EST_6 +264 0x6000 //TX_LAMBDA_NN_EST_6 265 0x4000 //TX_LAMBDA_NN_EST_7 266 0x0400 //TX_N_SN_EST 267 0x001E //TX_INBEAM_T @@ -12560,16 +18980,16 @@ 279 0x1000 //TX_B_POST_FLT_0 280 0x1000 //TX_B_POST_FLT_1 281 0x000B //TX_NS_LVL_CTRL_0 -282 0x000F //TX_NS_LVL_CTRL_1 -283 0x0011 //TX_NS_LVL_CTRL_2 +282 0x0011 //TX_NS_LVL_CTRL_1 +283 0x000F //TX_NS_LVL_CTRL_2 284 0x000F //TX_NS_LVL_CTRL_3 285 0x000F //TX_NS_LVL_CTRL_4 286 0x000F //TX_NS_LVL_CTRL_5 287 0x000F //TX_NS_LVL_CTRL_6 288 0x0011 //TX_NS_LVL_CTRL_7 289 0x000C //TX_MIN_GAIN_S_0 -290 0x000C //TX_MIN_GAIN_S_1 -291 0x000F //TX_MIN_GAIN_S_2 +290 0x000F //TX_MIN_GAIN_S_1 +291 0x000C //TX_MIN_GAIN_S_2 292 0x000C //TX_MIN_GAIN_S_3 293 0x000C //TX_MIN_GAIN_S_4 294 0x000C //TX_MIN_GAIN_S_5 @@ -12593,12 +19013,12 @@ 312 0x7FFF //TX_A_POST_FILT_0 313 0x2000 //TX_A_POST_FILT_1 314 0x2000 //TX_A_POST_FILT_S_0 -315 0x4000 //TX_A_POST_FILT_S_1 +315 0x5000 //TX_A_POST_FILT_S_1 316 0x5000 //TX_A_POST_FILT_S_2 317 0x5000 //TX_A_POST_FILT_S_3 318 0x5000 //TX_A_POST_FILT_S_4 319 0x5000 //TX_A_POST_FILT_S_5 -320 0x5000 //TX_A_POST_FILT_S_6 +320 0x4000 //TX_A_POST_FILT_S_6 321 0x5000 //TX_A_POST_FILT_S_7 322 0x1000 //TX_B_POST_FILT_0 323 0x1000 //TX_B_POST_FILT_1 @@ -12658,10 +19078,10 @@ 377 0x7FFF //TX_NOISE_TH_5_4 378 0x044C //TX_NOISE_TH_6 379 0x0014 //TX_MINENOISE_TH -380 0x4000 //TX_MINENOISE_MIC0_TH_MTS -381 0xFFEE //TX_MINENOISE_MIC0_TH_EXP -382 0x6000 //TX_MINENOISE_MIC0_S_TH_MTS -383 0xFFF3 //TX_MINENOISE_MIC0_S_TH_EXP +380 0x4000 //TX_MORENS_TFMASK_TH +381 0xFFEE //TX_DRC_QUIET_FLOOR +382 0x6000 //TX_RATIODTL_CUT_TH +383 0xFFF3 //TX_DT_CUT_K1 384 0x0666 //TX_OUT_ENER_S_TH_CLEAN 385 0x0666 //TX_OUT_ENER_S_TH_LESSCLEAN 386 0x0333 //TX_OUT_ENER_S_TH_NOISY @@ -12669,15 +19089,15 @@ 388 0x0333 //TX_OUT_ENER_TH_SPEECH 389 0x2000 //TX_SN_NPB_GAIN 390 0x0000 //TX_NN_NPB_GAIN -391 0x0000 //TX_CSX_ALPHA_0 -392 0x0000 //TX_CSX_ALPHA_1 -393 0x0000 //TX_CSX_ALPHA_2 -394 0x0000 //TX_CSX_ALPHA_3 -395 0x0800 //TX_MU_ARSP_EST -396 0x00C8 //TX_P_OUTBEAM_MIN_TH +391 0x0000 //TX_POST_MASK_SUP_HSNE +392 0x0000 //TX_TAIL_DET_TH +393 0x0000 //TX_B_LESSCUT_RTO_WTA +394 0x0000 //TX_MEL_G_R +395 0x0800 //TX_SUPHIGH_TH +396 0x00C8 //TX_MASK_G_R 397 0x0002 //TX_EXTRA_NS_L -398 0x0800 //TX_EXTRA_NS_A -399 0x0005 //TX_VR_NOISE_FLOOR_TH +398 0x0800 //TX_C_POST_FLT_MASK +399 0x0005 //TX_A_POST_FLT_WNS 400 0x0148 //TX_MIN_G_LOW300HZ 401 0x0002 //TX_MAXLEVEL_CNG 402 0x00B4 //TX_STN_NOISE_TH @@ -12792,16 +19212,16 @@ 511 0x6666 //TX_MIC_TO_BFGAIN 512 0x0000 //TX_MICTOBFGAIN0 513 0x0000 //TX_FASTMUE_TH -514 0x0000 //TX_DERVB_LEN_0 -515 0x0000 //TX_DERVB_LEN_1 -516 0x0000 //TX_RHO_DERVB -517 0x0000 //TX_MIC_INDX_DERVB -518 0x0000 //TX_MU_DERVB -519 0x0000 //TX_DR_RESRV_0 -520 0x0000 //TX_DR_RESRV_1 -521 0x0000 //TX_DR_RESRV_2 -522 0x0000 //TX_DR_RESRV_3 -523 0x0000 //TX_DR_RESRV_4 +514 0x0000 //TX_DEREVERB_LF_MU +515 0x0000 //TX_DEREVERB_HF_MU +516 0x0000 //TX_DEREVERB_DELAY +517 0x0000 //TX_DEREVERB_COEF_LEN +518 0x0000 //TX_DEREVERB_DNR +519 0x0000 //TX_DEREVERB_ALPHA +520 0x0000 //TX_DEREVERB_BETA +521 0x0000 //TX_GSC_RTOL_TH +522 0x0000 //TX_GSC_RTOH_TH +523 0x0000 //TX_WIDE2_MEANHTH 524 0x0000 //TX_DR_RESRV_5 525 0x0000 //TX_DR_RESRV_6 526 0x0000 //TX_DR_RESRV_7 @@ -13175,8 +19595,73 @@ 894 0xC000 //TX_FASTNS_SSA_THHFL 895 0xCCCC //TX_FASTNS_SSA_THLFH 896 0xD999 //TX_FASTNS_SSA_THHFH +897 0x0000 //TX_SENDFUNC_REG_MICMUTE +898 0x0000 //TX_SENDFUNC_REG_MICMUTE1 +899 0x0000 //TX_MICMUTE_RATIO_THR +900 0x0000 //TX_MICMUTE_AMP_THR +901 0x0000 //TX_MICMUTE_HPF_IND +902 0x0000 //TX_MICMUTE_LOG_EYR_TH +903 0x0000 //TX_MICMUTE_CVG_TIME +904 0x0000 //TX_MICMUTE_RELEASE_TIME +905 0x0000 //TX_MIC_VOLUME_MIC0MUTE +906 0x0000 //TX_MICMUTE_EPD_OFFSET_0 +907 0x0000 //TX_MICMUTE_FRQ_AEC_L +908 0x0000 //TX_MICMUTE_EAD_THR +909 0x0000 //TX_MICMUTE_LAMBDA_CB_NLE +910 0x0000 //TX_MICMUTE_LAMBDA_RE_EST +911 0x0000 //TX_DTD_THR1_MICMUTE_0 +912 0x0000 //TX_DTD_THR1_MICMUTE_1 +913 0x0000 //TX_DTD_THR1_MICMUTE_2 +914 0x0000 //TX_DTD_THR1_MICMUTE_3 +915 0x0000 //TX_DTD_THR2_MICMUTE_0 +916 0x0000 //TX_MICMUTE_MIN_EQ_RE_EST_0 +917 0x0000 //TX_MICMUTE_MIN_EQ_RE_EST_1 +918 0x0000 //TX_MICMUTE_MIN_EQ_RE_EST_2 +919 0x0000 //TX_MICMUTE_MIN_EQ_RE_EST_3 +920 0x0000 //TX_MICMUTE_MIN_EQ_RE_EST_4 +921 0x0000 //TX_MICMUTE_C_POST_FLT +922 0x0000 //TX_MICMUTE_DT_CUT_K +923 0x0000 //TX_MICMUTE_DT_CUT_THR +924 0x0000 //TX_MICMUTE_DT_CUT_K2 +925 0x0000 //TX_MICMUTE_DT_CUT_THR2 +926 0x0000 //TX_MICMUTE_DT2_HOLD_N +927 0x0000 //TX_MICMUTE_RATIODTH_THCUT +928 0x0000 //TX_MICMUTE_B_POST_FLT_ECHOL +929 0x0000 //TX_MICMUTE_B_POST_FLT_ECHOH +930 0x0000 //TX_MICMUTE_C_POST_FLT_MASK +931 0x0000 //TX_MICMUTE_RATIODTL_CUT_TH +932 0x0000 //TX_MICMUTE_DT_CUT_K1 +933 0x0000 //TX_MICMUTE_N2_SN_EST +934 0x0000 //TX_MICMUTE_THR_SN_EST_0 +935 0x0000 //TX_MICMUTE_MIN_G_CTRL_0 +936 0x0000 //TX_MICMUTE_A_POST_FILT_S_0 +937 0x0000 //TX_MICMUTE_B_POST_FILT_0 +938 0x0000 //TX_MIC1RUB_AMP_THR +939 0x0000 //TX_MIC1MUTE_RATIO_THR +940 0x0000 //TX_MIC1MUTE_AMP_THR +941 0x0000 //TX_MIC1MUTE_CVG_TIME +942 0x0000 //TX_MIC1MUTE_RELEASE_TIME +943 0x0000 //TX_AMS_RESRV_01 +944 0x0000 //TX_AMS_RESRV_02 +945 0x0000 //TX_AMS_RESRV_03 +946 0x0000 //TX_AMS_RESRV_04 +947 0x0000 //TX_AMS_RESRV_05 +948 0x0000 //TX_AMS_RESRV_06 +949 0x0000 //TX_AMS_RESRV_07 +950 0x0000 //TX_AMS_RESRV_08 +951 0x0000 //TX_AMS_RESRV_09 +952 0x0000 //TX_AMS_RESRV_10 +953 0x0000 //TX_AMS_RESRV_11 +954 0x0000 //TX_AMS_RESRV_12 +955 0x0000 //TX_AMS_RESRV_13 +956 0x0000 //TX_AMS_RESRV_14 +957 0x0000 //TX_AMS_RESRV_15 +958 0x0000 //TX_AMS_RESRV_16 +959 0x0000 //TX_AMS_RESRV_17 +960 0x0000 //TX_AMS_RESRV_18 +961 0x0000 //TX_AMS_RESRV_19 #RX -0 0x0064 //RX_RECVFUNC_MODE_0 +0 0x2064 //RX_RECVFUNC_MODE_0 1 0x0000 //RX_RECVFUNC_MODE_1 2 0x0003 //RX_SAMPLINGFREQ_SIG 3 0x0003 //RX_SAMPLINGFREQ_PROC @@ -14026,10 +20511,862 @@ 110 0x0000 //RX_FDDRC_RESRV_0 129 0x0100 //RX_SPK_VOL 130 0x0000 //RX_VOL_RESRV_0 +#RX 2 +157 0x2064 //RX_RECVFUNC_MODE_0 +158 0x0000 //RX_RECVFUNC_MODE_1 +159 0x0003 //RX_SAMPLINGFREQ_SIG +160 0x0003 //RX_SAMPLINGFREQ_PROC +161 0x000A //RX_FRAME_SZ +162 0x0000 //RX_DELAY_OPT +163 0x3000 //RX_TDDRC_ALPHA_UP_1 +164 0x3000 //RX_TDDRC_ALPHA_UP_2 +165 0x3000 //RX_TDDRC_ALPHA_UP_3 +166 0x3000 //RX_TDDRC_ALPHA_UP_4 +167 0x0800 //RX_PGA +168 0x7FFF //RX_A_HP +169 0x0000 //RX_B_PE +170 0x1800 //RX_THR_PITCH_DET_0 +171 0x1000 //RX_THR_PITCH_DET_1 +172 0x0800 //RX_THR_PITCH_DET_2 +173 0x0008 //RX_PITCH_BFR_LEN +174 0x0003 //RX_SBD_PITCH_DET +175 0x0100 //RX_PP_RESRV_0 +176 0x0020 //RX_PP_RESRV_1 +177 0x0400 //RX_N_SN_EST +178 0x000C //RX_N2_SN_EST +179 0x0003 //RX_NS_LVL_CTRL +180 0x9000 //RX_THR_SN_EST +181 0x7CCD //RX_LAMBDA_PFILT +182 0x000A //RX_FENS_RESRV_0 +183 0x0190 //RX_FENS_RESRV_1 +184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +187 0x0002 //RX_EXTRA_NS_L +188 0x0800 //RX_EXTRA_NS_A +189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +190 0x7FFF //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +192 0x199A //RX_A_POST_FLT +193 0x0000 //RX_LMT_THRD +194 0x4000 //RX_LMT_ALPHA +195 0x0020 //RX_FDEQ_SUBNUM +196 0x4848 //RX_FDEQ_GAIN_0 +197 0x4848 //RX_FDEQ_GAIN_1 +198 0x4848 //RX_FDEQ_GAIN_2 +199 0x4848 //RX_FDEQ_GAIN_3 +200 0x4848 //RX_FDEQ_GAIN_4 +201 0x4848 //RX_FDEQ_GAIN_5 +202 0x4848 //RX_FDEQ_GAIN_6 +203 0x4848 //RX_FDEQ_GAIN_7 +204 0x4848 //RX_FDEQ_GAIN_8 +205 0x4848 //RX_FDEQ_GAIN_9 +206 0x4848 //RX_FDEQ_GAIN_10 +207 0x4848 //RX_FDEQ_GAIN_11 +208 0x4848 //RX_FDEQ_GAIN_12 +209 0x4848 //RX_FDEQ_GAIN_13 +210 0x4848 //RX_FDEQ_GAIN_14 +211 0x4848 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0202 //RX_FDEQ_BIN_0 +221 0x0203 //RX_FDEQ_BIN_1 +222 0x0303 //RX_FDEQ_BIN_2 +223 0x0304 //RX_FDEQ_BIN_3 +224 0x0405 //RX_FDEQ_BIN_4 +225 0x0506 //RX_FDEQ_BIN_5 +226 0x0708 //RX_FDEQ_BIN_6 +227 0x090A //RX_FDEQ_BIN_7 +228 0x0B0C //RX_FDEQ_BIN_8 +229 0x0D0E //RX_FDEQ_BIN_9 +230 0x1013 //RX_FDEQ_BIN_10 +231 0x1719 //RX_FDEQ_BIN_11 +232 0x1B1E //RX_FDEQ_BIN_12 +233 0x1E1E //RX_FDEQ_BIN_13 +234 0x1E28 //RX_FDEQ_BIN_14 +235 0x282C //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x4000 //RX_FDEQ_RESRV_0 +245 0x0320 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0030 //RX_FDDRC_BAND_MARGIN_1 +248 0x0050 //RX_FDDRC_BAND_MARGIN_2 +249 0x0080 //RX_FDDRC_BAND_MARGIN_3 +250 0x0007 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x5000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x6400 //RX_FDDRC_THRD_3_2 +258 0x6400 //RX_FDDRC_THRD_3_3 +259 0x2000 //RX_FDDRC_SLANT_0_0 +260 0x2000 //RX_FDDRC_SLANT_0_1 +261 0x2000 //RX_FDDRC_SLANT_0_2 +262 0x2000 //RX_FDDRC_SLANT_0_3 +263 0x5333 //RX_FDDRC_SLANT_1_0 +264 0x5333 //RX_FDDRC_SLANT_1_1 +265 0x5333 //RX_FDDRC_SLANT_1_2 +266 0x5333 //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +268 0x0000 //RX_FILTINDX +269 0x0000 //RX_TDDRC_THRD_0 +270 0x0000 //RX_TDDRC_THRD_1 +271 0x7FFF //RX_TDDRC_THRD_2 +272 0x7FFF //RX_TDDRC_THRD_3 +273 0x7FFF //RX_TDDRC_SLANT_0 +274 0x7FFF //RX_TDDRC_SLANT_1 +275 0x3000 //RX_TDDRC_ALPHA_UP_0 +276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x199A //RX_TDDRC_HMNC_GAIN +279 0x0001 //RX_TDDRC_SMT_FLAG +280 0x0CCD //RX_TDDRC_SMT_W +281 0x0155 //RX_TDDRC_DRC_GAIN +282 0x7C00 //RX_LAMBDA_PKA_FP +283 0x2000 //RX_TPKA_FP +284 0x2000 //RX_MIN_G_FP +285 0x0080 //RX_MAX_G_FP +286 0x0100 //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 +288 0x0000 //RX_MAXLEVEL_CNG +289 0x3000 //RX_BWE_UV_TH +290 0x3000 //RX_BWE_UV_TH2 +291 0x1800 //RX_BWE_UV_TH3 +292 0x1000 //RX_BWE_V_TH +293 0x04CD //RX_BWE_GAIN1_V_TH1 +294 0x0F33 //RX_BWE_GAIN1_V_TH2 +295 0x7333 //RX_BWE_UV_EQ +296 0x199A //RX_BWE_V_EQ +297 0x7333 //RX_BWE_TONE_TH +298 0x0004 //RX_BWE_UV_HOLD_T +299 0x6CCD //RX_BWE_GAIN2_ALPHA +300 0x799A //RX_BWE_GAIN3_ALPHA +301 0x001E //RX_BWE_CUTOFF +302 0x3000 //RX_BWE_GAINFILL +303 0x3200 //RX_BWE_MAXTH_TONE +304 0x2000 //RX_BWE_EQ_0 +305 0x2000 //RX_BWE_EQ_1 +306 0x2000 //RX_BWE_EQ_2 +307 0x2000 //RX_BWE_EQ_3 +308 0x2000 //RX_BWE_EQ_4 +309 0x2000 //RX_BWE_EQ_5 +310 0x2000 //RX_BWE_EQ_6 +311 0x0000 //RX_BWE_RESRV_0 +312 0x0000 //RX_BWE_RESRV_1 +313 0x0000 //RX_BWE_RESRV_2 +#VOL 0 +163 0x3000 //RX_TDDRC_ALPHA_UP_1 +164 0x3000 //RX_TDDRC_ALPHA_UP_2 +165 0x3000 //RX_TDDRC_ALPHA_UP_3 +166 0x3000 //RX_TDDRC_ALPHA_UP_4 +184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +190 0x7FFF //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +269 0x0000 //RX_TDDRC_THRD_0 +270 0x0000 //RX_TDDRC_THRD_1 +271 0x7FFF //RX_TDDRC_THRD_2 +272 0x7FFF //RX_TDDRC_THRD_3 +273 0x7FFF //RX_TDDRC_SLANT_0 +274 0x7FFF //RX_TDDRC_SLANT_1 +275 0x3000 //RX_TDDRC_ALPHA_UP_0 +276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x199A //RX_TDDRC_HMNC_GAIN +279 0x0001 //RX_TDDRC_SMT_FLAG +280 0x0CCD //RX_TDDRC_SMT_W +281 0x0155 //RX_TDDRC_DRC_GAIN +195 0x0020 //RX_FDEQ_SUBNUM +196 0x4848 //RX_FDEQ_GAIN_0 +197 0x4848 //RX_FDEQ_GAIN_1 +198 0x4848 //RX_FDEQ_GAIN_2 +199 0x4848 //RX_FDEQ_GAIN_3 +200 0x4848 //RX_FDEQ_GAIN_4 +201 0x4848 //RX_FDEQ_GAIN_5 +202 0x4848 //RX_FDEQ_GAIN_6 +203 0x4848 //RX_FDEQ_GAIN_7 +204 0x4848 //RX_FDEQ_GAIN_8 +205 0x4848 //RX_FDEQ_GAIN_9 +206 0x4848 //RX_FDEQ_GAIN_10 +207 0x4848 //RX_FDEQ_GAIN_11 +208 0x4848 //RX_FDEQ_GAIN_12 +209 0x4848 //RX_FDEQ_GAIN_13 +210 0x4848 //RX_FDEQ_GAIN_14 +211 0x4848 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0202 //RX_FDEQ_BIN_0 +221 0x0203 //RX_FDEQ_BIN_1 +222 0x0303 //RX_FDEQ_BIN_2 +223 0x0304 //RX_FDEQ_BIN_3 +224 0x0405 //RX_FDEQ_BIN_4 +225 0x0506 //RX_FDEQ_BIN_5 +226 0x0708 //RX_FDEQ_BIN_6 +227 0x090A //RX_FDEQ_BIN_7 +228 0x0B0C //RX_FDEQ_BIN_8 +229 0x0D0E //RX_FDEQ_BIN_9 +230 0x1013 //RX_FDEQ_BIN_10 +231 0x1719 //RX_FDEQ_BIN_11 +232 0x1B1E //RX_FDEQ_BIN_12 +233 0x1E1E //RX_FDEQ_BIN_13 +234 0x1E28 //RX_FDEQ_BIN_14 +235 0x282C //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x4000 //RX_FDEQ_RESRV_0 +245 0x0320 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0030 //RX_FDDRC_BAND_MARGIN_1 +248 0x0050 //RX_FDDRC_BAND_MARGIN_2 +249 0x0080 //RX_FDDRC_BAND_MARGIN_3 +250 0x0007 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x5000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x6400 //RX_FDDRC_THRD_3_2 +258 0x6400 //RX_FDDRC_THRD_3_3 +259 0x2000 //RX_FDDRC_SLANT_0_0 +260 0x2000 //RX_FDDRC_SLANT_0_1 +261 0x2000 //RX_FDDRC_SLANT_0_2 +262 0x2000 //RX_FDDRC_SLANT_0_3 +263 0x5333 //RX_FDDRC_SLANT_1_0 +264 0x5333 //RX_FDDRC_SLANT_1_1 +265 0x5333 //RX_FDDRC_SLANT_1_2 +266 0x5333 //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +286 0x0100 //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 +#VOL 1 +163 0x3000 //RX_TDDRC_ALPHA_UP_1 +164 0x3000 //RX_TDDRC_ALPHA_UP_2 +165 0x3000 //RX_TDDRC_ALPHA_UP_3 +166 0x3000 //RX_TDDRC_ALPHA_UP_4 +184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +190 0x7FFF //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +269 0x0000 //RX_TDDRC_THRD_0 +270 0x0000 //RX_TDDRC_THRD_1 +271 0x7FFF //RX_TDDRC_THRD_2 +272 0x7FFF //RX_TDDRC_THRD_3 +273 0x7FFF //RX_TDDRC_SLANT_0 +274 0x7FFF //RX_TDDRC_SLANT_1 +275 0x3000 //RX_TDDRC_ALPHA_UP_0 +276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x199A //RX_TDDRC_HMNC_GAIN +279 0x0001 //RX_TDDRC_SMT_FLAG +280 0x0CCD //RX_TDDRC_SMT_W +281 0x0155 //RX_TDDRC_DRC_GAIN +195 0x0020 //RX_FDEQ_SUBNUM +196 0x4848 //RX_FDEQ_GAIN_0 +197 0x4848 //RX_FDEQ_GAIN_1 +198 0x4848 //RX_FDEQ_GAIN_2 +199 0x4848 //RX_FDEQ_GAIN_3 +200 0x4848 //RX_FDEQ_GAIN_4 +201 0x4848 //RX_FDEQ_GAIN_5 +202 0x4848 //RX_FDEQ_GAIN_6 +203 0x4848 //RX_FDEQ_GAIN_7 +204 0x4848 //RX_FDEQ_GAIN_8 +205 0x4848 //RX_FDEQ_GAIN_9 +206 0x4848 //RX_FDEQ_GAIN_10 +207 0x4848 //RX_FDEQ_GAIN_11 +208 0x4848 //RX_FDEQ_GAIN_12 +209 0x4848 //RX_FDEQ_GAIN_13 +210 0x4848 //RX_FDEQ_GAIN_14 +211 0x4848 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0202 //RX_FDEQ_BIN_0 +221 0x0203 //RX_FDEQ_BIN_1 +222 0x0303 //RX_FDEQ_BIN_2 +223 0x0304 //RX_FDEQ_BIN_3 +224 0x0405 //RX_FDEQ_BIN_4 +225 0x0506 //RX_FDEQ_BIN_5 +226 0x0708 //RX_FDEQ_BIN_6 +227 0x090A //RX_FDEQ_BIN_7 +228 0x0B0C //RX_FDEQ_BIN_8 +229 0x0D0E //RX_FDEQ_BIN_9 +230 0x1013 //RX_FDEQ_BIN_10 +231 0x1719 //RX_FDEQ_BIN_11 +232 0x1B1E //RX_FDEQ_BIN_12 +233 0x1E1E //RX_FDEQ_BIN_13 +234 0x1E28 //RX_FDEQ_BIN_14 +235 0x282C //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x4000 //RX_FDEQ_RESRV_0 +245 0x0320 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0030 //RX_FDDRC_BAND_MARGIN_1 +248 0x0050 //RX_FDDRC_BAND_MARGIN_2 +249 0x0080 //RX_FDDRC_BAND_MARGIN_3 +250 0x0007 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x5000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x6400 //RX_FDDRC_THRD_3_2 +258 0x6400 //RX_FDDRC_THRD_3_3 +259 0x2000 //RX_FDDRC_SLANT_0_0 +260 0x2000 //RX_FDDRC_SLANT_0_1 +261 0x2000 //RX_FDDRC_SLANT_0_2 +262 0x2000 //RX_FDDRC_SLANT_0_3 +263 0x5333 //RX_FDDRC_SLANT_1_0 +264 0x5333 //RX_FDDRC_SLANT_1_1 +265 0x5333 //RX_FDDRC_SLANT_1_2 +266 0x5333 //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +286 0x0100 //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 +#VOL 2 +163 0x3000 //RX_TDDRC_ALPHA_UP_1 +164 0x3000 //RX_TDDRC_ALPHA_UP_2 +165 0x3000 //RX_TDDRC_ALPHA_UP_3 +166 0x3000 //RX_TDDRC_ALPHA_UP_4 +184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +190 0x7FFF //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +269 0x0000 //RX_TDDRC_THRD_0 +270 0x0000 //RX_TDDRC_THRD_1 +271 0x7FFF //RX_TDDRC_THRD_2 +272 0x7FFF //RX_TDDRC_THRD_3 +273 0x7FFF //RX_TDDRC_SLANT_0 +274 0x7FFF //RX_TDDRC_SLANT_1 +275 0x3000 //RX_TDDRC_ALPHA_UP_0 +276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x199A //RX_TDDRC_HMNC_GAIN +279 0x0001 //RX_TDDRC_SMT_FLAG +280 0x0CCD //RX_TDDRC_SMT_W +281 0x0155 //RX_TDDRC_DRC_GAIN +195 0x0020 //RX_FDEQ_SUBNUM +196 0x4848 //RX_FDEQ_GAIN_0 +197 0x4848 //RX_FDEQ_GAIN_1 +198 0x4848 //RX_FDEQ_GAIN_2 +199 0x4848 //RX_FDEQ_GAIN_3 +200 0x4848 //RX_FDEQ_GAIN_4 +201 0x4848 //RX_FDEQ_GAIN_5 +202 0x4848 //RX_FDEQ_GAIN_6 +203 0x4848 //RX_FDEQ_GAIN_7 +204 0x4848 //RX_FDEQ_GAIN_8 +205 0x4848 //RX_FDEQ_GAIN_9 +206 0x4848 //RX_FDEQ_GAIN_10 +207 0x4848 //RX_FDEQ_GAIN_11 +208 0x4848 //RX_FDEQ_GAIN_12 +209 0x4848 //RX_FDEQ_GAIN_13 +210 0x4848 //RX_FDEQ_GAIN_14 +211 0x4848 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0202 //RX_FDEQ_BIN_0 +221 0x0203 //RX_FDEQ_BIN_1 +222 0x0303 //RX_FDEQ_BIN_2 +223 0x0304 //RX_FDEQ_BIN_3 +224 0x0405 //RX_FDEQ_BIN_4 +225 0x0506 //RX_FDEQ_BIN_5 +226 0x0708 //RX_FDEQ_BIN_6 +227 0x090A //RX_FDEQ_BIN_7 +228 0x0B0C //RX_FDEQ_BIN_8 +229 0x0D0E //RX_FDEQ_BIN_9 +230 0x1013 //RX_FDEQ_BIN_10 +231 0x1719 //RX_FDEQ_BIN_11 +232 0x1B1E //RX_FDEQ_BIN_12 +233 0x1E1E //RX_FDEQ_BIN_13 +234 0x1E28 //RX_FDEQ_BIN_14 +235 0x282C //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x4000 //RX_FDEQ_RESRV_0 +245 0x0320 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0030 //RX_FDDRC_BAND_MARGIN_1 +248 0x0050 //RX_FDDRC_BAND_MARGIN_2 +249 0x0080 //RX_FDDRC_BAND_MARGIN_3 +250 0x0007 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x5000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x6400 //RX_FDDRC_THRD_3_2 +258 0x6400 //RX_FDDRC_THRD_3_3 +259 0x2000 //RX_FDDRC_SLANT_0_0 +260 0x2000 //RX_FDDRC_SLANT_0_1 +261 0x2000 //RX_FDDRC_SLANT_0_2 +262 0x2000 //RX_FDDRC_SLANT_0_3 +263 0x5333 //RX_FDDRC_SLANT_1_0 +264 0x5333 //RX_FDDRC_SLANT_1_1 +265 0x5333 //RX_FDDRC_SLANT_1_2 +266 0x5333 //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +286 0x0100 //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 +#VOL 3 +163 0x3000 //RX_TDDRC_ALPHA_UP_1 +164 0x3000 //RX_TDDRC_ALPHA_UP_2 +165 0x3000 //RX_TDDRC_ALPHA_UP_3 +166 0x3000 //RX_TDDRC_ALPHA_UP_4 +184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +190 0x7FFF //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +269 0x0000 //RX_TDDRC_THRD_0 +270 0x0000 //RX_TDDRC_THRD_1 +271 0x7FFF //RX_TDDRC_THRD_2 +272 0x7FFF //RX_TDDRC_THRD_3 +273 0x7FFF //RX_TDDRC_SLANT_0 +274 0x7FFF //RX_TDDRC_SLANT_1 +275 0x3000 //RX_TDDRC_ALPHA_UP_0 +276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x199A //RX_TDDRC_HMNC_GAIN +279 0x0001 //RX_TDDRC_SMT_FLAG +280 0x0CCD //RX_TDDRC_SMT_W +281 0x0155 //RX_TDDRC_DRC_GAIN +195 0x0020 //RX_FDEQ_SUBNUM +196 0x4848 //RX_FDEQ_GAIN_0 +197 0x4848 //RX_FDEQ_GAIN_1 +198 0x4848 //RX_FDEQ_GAIN_2 +199 0x4848 //RX_FDEQ_GAIN_3 +200 0x4848 //RX_FDEQ_GAIN_4 +201 0x4848 //RX_FDEQ_GAIN_5 +202 0x4848 //RX_FDEQ_GAIN_6 +203 0x4848 //RX_FDEQ_GAIN_7 +204 0x4848 //RX_FDEQ_GAIN_8 +205 0x4848 //RX_FDEQ_GAIN_9 +206 0x4848 //RX_FDEQ_GAIN_10 +207 0x4848 //RX_FDEQ_GAIN_11 +208 0x4848 //RX_FDEQ_GAIN_12 +209 0x4848 //RX_FDEQ_GAIN_13 +210 0x4848 //RX_FDEQ_GAIN_14 +211 0x4848 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0202 //RX_FDEQ_BIN_0 +221 0x0203 //RX_FDEQ_BIN_1 +222 0x0303 //RX_FDEQ_BIN_2 +223 0x0304 //RX_FDEQ_BIN_3 +224 0x0405 //RX_FDEQ_BIN_4 +225 0x0506 //RX_FDEQ_BIN_5 +226 0x0708 //RX_FDEQ_BIN_6 +227 0x090A //RX_FDEQ_BIN_7 +228 0x0B0C //RX_FDEQ_BIN_8 +229 0x0D0E //RX_FDEQ_BIN_9 +230 0x1013 //RX_FDEQ_BIN_10 +231 0x1719 //RX_FDEQ_BIN_11 +232 0x1B1E //RX_FDEQ_BIN_12 +233 0x1E1E //RX_FDEQ_BIN_13 +234 0x1E28 //RX_FDEQ_BIN_14 +235 0x282C //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x4000 //RX_FDEQ_RESRV_0 +245 0x0320 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0030 //RX_FDDRC_BAND_MARGIN_1 +248 0x0050 //RX_FDDRC_BAND_MARGIN_2 +249 0x0080 //RX_FDDRC_BAND_MARGIN_3 +250 0x0007 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x5000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x6400 //RX_FDDRC_THRD_3_2 +258 0x6400 //RX_FDDRC_THRD_3_3 +259 0x2000 //RX_FDDRC_SLANT_0_0 +260 0x2000 //RX_FDDRC_SLANT_0_1 +261 0x2000 //RX_FDDRC_SLANT_0_2 +262 0x2000 //RX_FDDRC_SLANT_0_3 +263 0x5333 //RX_FDDRC_SLANT_1_0 +264 0x5333 //RX_FDDRC_SLANT_1_1 +265 0x5333 //RX_FDDRC_SLANT_1_2 +266 0x5333 //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +286 0x0100 //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 +#VOL 4 +163 0x3000 //RX_TDDRC_ALPHA_UP_1 +164 0x3000 //RX_TDDRC_ALPHA_UP_2 +165 0x3000 //RX_TDDRC_ALPHA_UP_3 +166 0x3000 //RX_TDDRC_ALPHA_UP_4 +184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +190 0x7FFF //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +269 0x0000 //RX_TDDRC_THRD_0 +270 0x0000 //RX_TDDRC_THRD_1 +271 0x7FFF //RX_TDDRC_THRD_2 +272 0x7FFF //RX_TDDRC_THRD_3 +273 0x7FFF //RX_TDDRC_SLANT_0 +274 0x7FFF //RX_TDDRC_SLANT_1 +275 0x3000 //RX_TDDRC_ALPHA_UP_0 +276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x199A //RX_TDDRC_HMNC_GAIN +279 0x0001 //RX_TDDRC_SMT_FLAG +280 0x0CCD //RX_TDDRC_SMT_W +281 0x0155 //RX_TDDRC_DRC_GAIN +195 0x0020 //RX_FDEQ_SUBNUM +196 0x4848 //RX_FDEQ_GAIN_0 +197 0x4848 //RX_FDEQ_GAIN_1 +198 0x4848 //RX_FDEQ_GAIN_2 +199 0x4848 //RX_FDEQ_GAIN_3 +200 0x4848 //RX_FDEQ_GAIN_4 +201 0x4848 //RX_FDEQ_GAIN_5 +202 0x4848 //RX_FDEQ_GAIN_6 +203 0x4848 //RX_FDEQ_GAIN_7 +204 0x4848 //RX_FDEQ_GAIN_8 +205 0x4848 //RX_FDEQ_GAIN_9 +206 0x4848 //RX_FDEQ_GAIN_10 +207 0x4848 //RX_FDEQ_GAIN_11 +208 0x4848 //RX_FDEQ_GAIN_12 +209 0x4848 //RX_FDEQ_GAIN_13 +210 0x4848 //RX_FDEQ_GAIN_14 +211 0x4848 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0202 //RX_FDEQ_BIN_0 +221 0x0203 //RX_FDEQ_BIN_1 +222 0x0303 //RX_FDEQ_BIN_2 +223 0x0304 //RX_FDEQ_BIN_3 +224 0x0405 //RX_FDEQ_BIN_4 +225 0x0506 //RX_FDEQ_BIN_5 +226 0x0708 //RX_FDEQ_BIN_6 +227 0x090A //RX_FDEQ_BIN_7 +228 0x0B0C //RX_FDEQ_BIN_8 +229 0x0D0E //RX_FDEQ_BIN_9 +230 0x1013 //RX_FDEQ_BIN_10 +231 0x1719 //RX_FDEQ_BIN_11 +232 0x1B1E //RX_FDEQ_BIN_12 +233 0x1E1E //RX_FDEQ_BIN_13 +234 0x1E28 //RX_FDEQ_BIN_14 +235 0x282C //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x4000 //RX_FDEQ_RESRV_0 +245 0x0320 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0030 //RX_FDDRC_BAND_MARGIN_1 +248 0x0050 //RX_FDDRC_BAND_MARGIN_2 +249 0x0080 //RX_FDDRC_BAND_MARGIN_3 +250 0x0007 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x5000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x6400 //RX_FDDRC_THRD_3_2 +258 0x6400 //RX_FDDRC_THRD_3_3 +259 0x2000 //RX_FDDRC_SLANT_0_0 +260 0x2000 //RX_FDDRC_SLANT_0_1 +261 0x2000 //RX_FDDRC_SLANT_0_2 +262 0x2000 //RX_FDDRC_SLANT_0_3 +263 0x5333 //RX_FDDRC_SLANT_1_0 +264 0x5333 //RX_FDDRC_SLANT_1_1 +265 0x5333 //RX_FDDRC_SLANT_1_2 +266 0x5333 //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +286 0x0100 //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 +#VOL 5 +163 0x3000 //RX_TDDRC_ALPHA_UP_1 +164 0x3000 //RX_TDDRC_ALPHA_UP_2 +165 0x3000 //RX_TDDRC_ALPHA_UP_3 +166 0x3000 //RX_TDDRC_ALPHA_UP_4 +184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +190 0x7FFF //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +269 0x0000 //RX_TDDRC_THRD_0 +270 0x0000 //RX_TDDRC_THRD_1 +271 0x7FFF //RX_TDDRC_THRD_2 +272 0x7FFF //RX_TDDRC_THRD_3 +273 0x7FFF //RX_TDDRC_SLANT_0 +274 0x7FFF //RX_TDDRC_SLANT_1 +275 0x3000 //RX_TDDRC_ALPHA_UP_0 +276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x199A //RX_TDDRC_HMNC_GAIN +279 0x0001 //RX_TDDRC_SMT_FLAG +280 0x0CCD //RX_TDDRC_SMT_W +281 0x0155 //RX_TDDRC_DRC_GAIN +195 0x0020 //RX_FDEQ_SUBNUM +196 0x4848 //RX_FDEQ_GAIN_0 +197 0x4848 //RX_FDEQ_GAIN_1 +198 0x4848 //RX_FDEQ_GAIN_2 +199 0x4848 //RX_FDEQ_GAIN_3 +200 0x4848 //RX_FDEQ_GAIN_4 +201 0x4848 //RX_FDEQ_GAIN_5 +202 0x4848 //RX_FDEQ_GAIN_6 +203 0x4848 //RX_FDEQ_GAIN_7 +204 0x4848 //RX_FDEQ_GAIN_8 +205 0x4848 //RX_FDEQ_GAIN_9 +206 0x4848 //RX_FDEQ_GAIN_10 +207 0x4848 //RX_FDEQ_GAIN_11 +208 0x4848 //RX_FDEQ_GAIN_12 +209 0x4848 //RX_FDEQ_GAIN_13 +210 0x4848 //RX_FDEQ_GAIN_14 +211 0x4848 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0202 //RX_FDEQ_BIN_0 +221 0x0203 //RX_FDEQ_BIN_1 +222 0x0303 //RX_FDEQ_BIN_2 +223 0x0304 //RX_FDEQ_BIN_3 +224 0x0405 //RX_FDEQ_BIN_4 +225 0x0506 //RX_FDEQ_BIN_5 +226 0x0708 //RX_FDEQ_BIN_6 +227 0x090A //RX_FDEQ_BIN_7 +228 0x0B0C //RX_FDEQ_BIN_8 +229 0x0D0E //RX_FDEQ_BIN_9 +230 0x1013 //RX_FDEQ_BIN_10 +231 0x1719 //RX_FDEQ_BIN_11 +232 0x1B1E //RX_FDEQ_BIN_12 +233 0x1E1E //RX_FDEQ_BIN_13 +234 0x1E28 //RX_FDEQ_BIN_14 +235 0x282C //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x4000 //RX_FDEQ_RESRV_0 +245 0x0320 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0030 //RX_FDDRC_BAND_MARGIN_1 +248 0x0050 //RX_FDDRC_BAND_MARGIN_2 +249 0x0080 //RX_FDDRC_BAND_MARGIN_3 +250 0x0007 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x5000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x6400 //RX_FDDRC_THRD_3_2 +258 0x6400 //RX_FDDRC_THRD_3_3 +259 0x2000 //RX_FDDRC_SLANT_0_0 +260 0x2000 //RX_FDDRC_SLANT_0_1 +261 0x2000 //RX_FDDRC_SLANT_0_2 +262 0x2000 //RX_FDDRC_SLANT_0_3 +263 0x5333 //RX_FDDRC_SLANT_1_0 +264 0x5333 //RX_FDDRC_SLANT_1_1 +265 0x5333 //RX_FDDRC_SLANT_1_2 +266 0x5333 //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +286 0x0100 //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 +#VOL 6 +163 0x3000 //RX_TDDRC_ALPHA_UP_1 +164 0x3000 //RX_TDDRC_ALPHA_UP_2 +165 0x3000 //RX_TDDRC_ALPHA_UP_3 +166 0x3000 //RX_TDDRC_ALPHA_UP_4 +184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +190 0x7FFF //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +269 0x0000 //RX_TDDRC_THRD_0 +270 0x0000 //RX_TDDRC_THRD_1 +271 0x7FFF //RX_TDDRC_THRD_2 +272 0x7FFF //RX_TDDRC_THRD_3 +273 0x7FFF //RX_TDDRC_SLANT_0 +274 0x7FFF //RX_TDDRC_SLANT_1 +275 0x3000 //RX_TDDRC_ALPHA_UP_0 +276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x199A //RX_TDDRC_HMNC_GAIN +279 0x0001 //RX_TDDRC_SMT_FLAG +280 0x0CCD //RX_TDDRC_SMT_W +281 0x0155 //RX_TDDRC_DRC_GAIN +195 0x0020 //RX_FDEQ_SUBNUM +196 0x4848 //RX_FDEQ_GAIN_0 +197 0x4848 //RX_FDEQ_GAIN_1 +198 0x4848 //RX_FDEQ_GAIN_2 +199 0x4848 //RX_FDEQ_GAIN_3 +200 0x4848 //RX_FDEQ_GAIN_4 +201 0x4848 //RX_FDEQ_GAIN_5 +202 0x4848 //RX_FDEQ_GAIN_6 +203 0x4848 //RX_FDEQ_GAIN_7 +204 0x4848 //RX_FDEQ_GAIN_8 +205 0x4848 //RX_FDEQ_GAIN_9 +206 0x4848 //RX_FDEQ_GAIN_10 +207 0x4848 //RX_FDEQ_GAIN_11 +208 0x4848 //RX_FDEQ_GAIN_12 +209 0x4848 //RX_FDEQ_GAIN_13 +210 0x4848 //RX_FDEQ_GAIN_14 +211 0x4848 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0202 //RX_FDEQ_BIN_0 +221 0x0203 //RX_FDEQ_BIN_1 +222 0x0303 //RX_FDEQ_BIN_2 +223 0x0304 //RX_FDEQ_BIN_3 +224 0x0405 //RX_FDEQ_BIN_4 +225 0x0506 //RX_FDEQ_BIN_5 +226 0x0708 //RX_FDEQ_BIN_6 +227 0x090A //RX_FDEQ_BIN_7 +228 0x0B0C //RX_FDEQ_BIN_8 +229 0x0D0E //RX_FDEQ_BIN_9 +230 0x1013 //RX_FDEQ_BIN_10 +231 0x1719 //RX_FDEQ_BIN_11 +232 0x1B1E //RX_FDEQ_BIN_12 +233 0x1E1E //RX_FDEQ_BIN_13 +234 0x1E28 //RX_FDEQ_BIN_14 +235 0x282C //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x4000 //RX_FDEQ_RESRV_0 +245 0x0320 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0030 //RX_FDDRC_BAND_MARGIN_1 +248 0x0050 //RX_FDDRC_BAND_MARGIN_2 +249 0x0080 //RX_FDDRC_BAND_MARGIN_3 +250 0x0007 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x5000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x6400 //RX_FDDRC_THRD_3_2 +258 0x6400 //RX_FDDRC_THRD_3_3 +259 0x2000 //RX_FDDRC_SLANT_0_0 +260 0x2000 //RX_FDDRC_SLANT_0_1 +261 0x2000 //RX_FDDRC_SLANT_0_2 +262 0x2000 //RX_FDDRC_SLANT_0_3 +263 0x5333 //RX_FDDRC_SLANT_1_0 +264 0x5333 //RX_FDDRC_SLANT_1_1 +265 0x5333 //RX_FDDRC_SLANT_1_2 +266 0x5333 //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +286 0x0100 //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 #CASE_NAME BLUETOOTH-BTNB-VOICE_GENERIC-FB -#PARAM_TYPE TX+RX -#TOTAL_CUSTOM_STEP 7 +#PARAM_MODE Full +#PARAM_TYPE TX+2RX +#TOTAL_CUSTOM_STEP 7+7 #TX 0 0x0009 //TX_OPERATION_MODE_0 1 0x0009 //TX_OPERATION_MODE_1 @@ -14282,10 +21619,10 @@ 248 0xF600 //TX_THR_SN_EST_6 249 0xF600 //TX_THR_SN_EST_7 250 0x0200 //TX_DELTA_THR_SN_EST_0 -251 0x0200 //TX_DELTA_THR_SN_EST_1 -252 0x0400 //TX_DELTA_THR_SN_EST_2 -253 0x0300 //TX_DELTA_THR_SN_EST_3 -254 0x0600 //TX_DELTA_THR_SN_EST_4 +251 0x0400 //TX_DELTA_THR_SN_EST_1 +252 0x0300 //TX_DELTA_THR_SN_EST_2 +253 0x0600 //TX_DELTA_THR_SN_EST_3 +254 0x0200 //TX_DELTA_THR_SN_EST_4 255 0x0200 //TX_DELTA_THR_SN_EST_5 256 0x0200 //TX_DELTA_THR_SN_EST_6 257 0x0200 //TX_DELTA_THR_SN_EST_7 @@ -14313,31 +21650,31 @@ 279 0x2000 //TX_B_POST_FLT_0 280 0x2000 //TX_B_POST_FLT_1 281 0x0012 //TX_NS_LVL_CTRL_0 -282 0x0019 //TX_NS_LVL_CTRL_1 +282 0x0016 //TX_NS_LVL_CTRL_1 283 0x0016 //TX_NS_LVL_CTRL_2 -284 0x0016 //TX_NS_LVL_CTRL_3 -285 0x0019 //TX_NS_LVL_CTRL_4 +284 0x0019 //TX_NS_LVL_CTRL_3 +285 0x0010 //TX_NS_LVL_CTRL_4 286 0x0010 //TX_NS_LVL_CTRL_5 -287 0x0010 //TX_NS_LVL_CTRL_6 +287 0x0019 //TX_NS_LVL_CTRL_6 288 0x0010 //TX_NS_LVL_CTRL_7 289 0x000C //TX_MIN_GAIN_S_0 -290 0x0011 //TX_MIN_GAIN_S_1 +290 0x000C //TX_MIN_GAIN_S_1 291 0x000C //TX_MIN_GAIN_S_2 -292 0x000C //TX_MIN_GAIN_S_3 -293 0x000F //TX_MIN_GAIN_S_4 +292 0x000F //TX_MIN_GAIN_S_3 +293 0x000C //TX_MIN_GAIN_S_4 294 0x000C //TX_MIN_GAIN_S_5 -295 0x000C //TX_MIN_GAIN_S_6 +295 0x0011 //TX_MIN_GAIN_S_6 296 0x000C //TX_MIN_GAIN_S_7 297 0x7FFF //TX_NMOS_SUP 298 0x0000 //TX_NS_MAX_PRI_SNR_TH 299 0x0000 //TX_NMOS_SUP_MENSA 300 0x7000 //TX_SNRI_SUP_0 -301 0x6000 //TX_SNRI_SUP_1 +301 0x7000 //TX_SNRI_SUP_1 302 0x7000 //TX_SNRI_SUP_2 -303 0x7000 //TX_SNRI_SUP_3 -304 0x6000 //TX_SNRI_SUP_4 +303 0x6000 //TX_SNRI_SUP_3 +304 0x7FFF //TX_SNRI_SUP_4 305 0x7FFF //TX_SNRI_SUP_5 -306 0x7FFF //TX_SNRI_SUP_6 +306 0x6000 //TX_SNRI_SUP_6 307 0x7FFF //TX_SNRI_SUP_7 308 0x7FFF //TX_THR_LFNS 309 0x0016 //TX_G_LFNS @@ -14354,8 +21691,8 @@ 320 0x6000 //TX_A_POST_FILT_S_6 321 0x6000 //TX_A_POST_FILT_S_7 322 0x2000 //TX_B_POST_FILT_0 -323 0x2000 //TX_B_POST_FILT_1 -324 0x4000 //TX_B_POST_FILT_2 +323 0x4000 //TX_B_POST_FILT_1 +324 0x2000 //TX_B_POST_FILT_2 325 0x2000 //TX_B_POST_FILT_3 326 0x2000 //TX_B_POST_FILT_4 327 0x2000 //TX_B_POST_FILT_5 @@ -14411,10 +21748,10 @@ 377 0x0000 //TX_NOISE_TH_5_4 378 0x02BC //TX_NOISE_TH_6 379 0x0020 //TX_MINENOISE_TH -380 0x4000 //TX_MINENOISE_MIC0_TH_MTS -381 0xFFEE //TX_MINENOISE_MIC0_TH_EXP -382 0x6000 //TX_MINENOISE_MIC0_S_TH_MTS -383 0xFFF3 //TX_MINENOISE_MIC0_S_TH_EXP +380 0x4000 //TX_MORENS_TFMASK_TH +381 0xFFEE //TX_DRC_QUIET_FLOOR +382 0x6000 //TX_RATIODTL_CUT_TH +383 0xFFF3 //TX_DT_CUT_K1 384 0x0666 //TX_OUT_ENER_S_TH_CLEAN 385 0x0666 //TX_OUT_ENER_S_TH_LESSCLEAN 386 0x0333 //TX_OUT_ENER_S_TH_NOISY @@ -14422,15 +21759,15 @@ 388 0x0333 //TX_OUT_ENER_TH_SPEECH 389 0x2000 //TX_SN_NPB_GAIN 390 0x0000 //TX_NN_NPB_GAIN -391 0x0000 //TX_CSX_ALPHA_0 -392 0x0000 //TX_CSX_ALPHA_1 -393 0x0000 //TX_CSX_ALPHA_2 -394 0x0000 //TX_CSX_ALPHA_3 -395 0x0800 //TX_MU_ARSP_EST -396 0x00C8 //TX_P_OUTBEAM_MIN_TH +391 0x0000 //TX_POST_MASK_SUP_HSNE +392 0x0000 //TX_TAIL_DET_TH +393 0x0000 //TX_B_LESSCUT_RTO_WTA +394 0x0000 //TX_MEL_G_R +395 0x0800 //TX_SUPHIGH_TH +396 0x00C8 //TX_MASK_G_R 397 0x0002 //TX_EXTRA_NS_L -398 0x0800 //TX_EXTRA_NS_A -399 0x0005 //TX_VR_NOISE_FLOOR_TH +398 0x0800 //TX_C_POST_FLT_MASK +399 0x0005 //TX_A_POST_FLT_WNS 400 0x0148 //TX_MIN_G_LOW300HZ 401 0x0002 //TX_MAXLEVEL_CNG 402 0x00B4 //TX_STN_NOISE_TH @@ -14545,16 +21882,16 @@ 511 0x6666 //TX_MIC_TO_BFGAIN 512 0x0000 //TX_MICTOBFGAIN0 513 0x0000 //TX_FASTMUE_TH -514 0x0000 //TX_DERVB_LEN_0 -515 0x0000 //TX_DERVB_LEN_1 -516 0x0000 //TX_RHO_DERVB -517 0x0000 //TX_MIC_INDX_DERVB -518 0x0000 //TX_MU_DERVB -519 0x0000 //TX_DR_RESRV_0 -520 0x0000 //TX_DR_RESRV_1 -521 0x0000 //TX_DR_RESRV_2 -522 0x0000 //TX_DR_RESRV_3 -523 0x0000 //TX_DR_RESRV_4 +514 0x0000 //TX_DEREVERB_LF_MU +515 0x0000 //TX_DEREVERB_HF_MU +516 0x0000 //TX_DEREVERB_DELAY +517 0x0000 //TX_DEREVERB_COEF_LEN +518 0x0000 //TX_DEREVERB_DNR +519 0x0000 //TX_DEREVERB_ALPHA +520 0x0000 //TX_DEREVERB_BETA +521 0x0000 //TX_GSC_RTOL_TH +522 0x0000 //TX_GSC_RTOH_TH +523 0x0000 //TX_WIDE2_MEANHTH 524 0x0000 //TX_DR_RESRV_5 525 0x0000 //TX_DR_RESRV_6 526 0x0000 //TX_DR_RESRV_7 @@ -14928,8 +22265,73 @@ 894 0xC000 //TX_FASTNS_SSA_THHFL 895 0xCCCC //TX_FASTNS_SSA_THLFH 896 0xD999 //TX_FASTNS_SSA_THHFH +897 0x0000 //TX_SENDFUNC_REG_MICMUTE +898 0x0000 //TX_SENDFUNC_REG_MICMUTE1 +899 0x0000 //TX_MICMUTE_RATIO_THR +900 0x0000 //TX_MICMUTE_AMP_THR +901 0x0000 //TX_MICMUTE_HPF_IND +902 0x0000 //TX_MICMUTE_LOG_EYR_TH +903 0x0000 //TX_MICMUTE_CVG_TIME +904 0x0000 //TX_MICMUTE_RELEASE_TIME +905 0x0000 //TX_MIC_VOLUME_MIC0MUTE +906 0x0000 //TX_MICMUTE_EPD_OFFSET_0 +907 0x0000 //TX_MICMUTE_FRQ_AEC_L +908 0x0000 //TX_MICMUTE_EAD_THR +909 0x0000 //TX_MICMUTE_LAMBDA_CB_NLE +910 0x0000 //TX_MICMUTE_LAMBDA_RE_EST +911 0x0000 //TX_DTD_THR1_MICMUTE_0 +912 0x0000 //TX_DTD_THR1_MICMUTE_1 +913 0x0000 //TX_DTD_THR1_MICMUTE_2 +914 0x0000 //TX_DTD_THR1_MICMUTE_3 +915 0x0000 //TX_DTD_THR2_MICMUTE_0 +916 0x0000 //TX_MICMUTE_MIN_EQ_RE_EST_0 +917 0x0000 //TX_MICMUTE_MIN_EQ_RE_EST_1 +918 0x0000 //TX_MICMUTE_MIN_EQ_RE_EST_2 +919 0x0000 //TX_MICMUTE_MIN_EQ_RE_EST_3 +920 0x0000 //TX_MICMUTE_MIN_EQ_RE_EST_4 +921 0x0000 //TX_MICMUTE_C_POST_FLT +922 0x0000 //TX_MICMUTE_DT_CUT_K +923 0x0000 //TX_MICMUTE_DT_CUT_THR +924 0x0000 //TX_MICMUTE_DT_CUT_K2 +925 0x0000 //TX_MICMUTE_DT_CUT_THR2 +926 0x0000 //TX_MICMUTE_DT2_HOLD_N +927 0x0000 //TX_MICMUTE_RATIODTH_THCUT +928 0x0000 //TX_MICMUTE_B_POST_FLT_ECHOL +929 0x0000 //TX_MICMUTE_B_POST_FLT_ECHOH +930 0x0000 //TX_MICMUTE_C_POST_FLT_MASK +931 0x0000 //TX_MICMUTE_RATIODTL_CUT_TH +932 0x0000 //TX_MICMUTE_DT_CUT_K1 +933 0x0000 //TX_MICMUTE_N2_SN_EST +934 0x0000 //TX_MICMUTE_THR_SN_EST_0 +935 0x0000 //TX_MICMUTE_MIN_G_CTRL_0 +936 0x0000 //TX_MICMUTE_A_POST_FILT_S_0 +937 0x0000 //TX_MICMUTE_B_POST_FILT_0 +938 0x0000 //TX_MIC1RUB_AMP_THR +939 0x0000 //TX_MIC1MUTE_RATIO_THR +940 0x0000 //TX_MIC1MUTE_AMP_THR +941 0x0000 //TX_MIC1MUTE_CVG_TIME +942 0x0000 //TX_MIC1MUTE_RELEASE_TIME +943 0x0000 //TX_AMS_RESRV_01 +944 0x0000 //TX_AMS_RESRV_02 +945 0x0000 //TX_AMS_RESRV_03 +946 0x0000 //TX_AMS_RESRV_04 +947 0x0000 //TX_AMS_RESRV_05 +948 0x0000 //TX_AMS_RESRV_06 +949 0x0000 //TX_AMS_RESRV_07 +950 0x0000 //TX_AMS_RESRV_08 +951 0x0000 //TX_AMS_RESRV_09 +952 0x0000 //TX_AMS_RESRV_10 +953 0x0000 //TX_AMS_RESRV_11 +954 0x0000 //TX_AMS_RESRV_12 +955 0x0000 //TX_AMS_RESRV_13 +956 0x0000 //TX_AMS_RESRV_14 +957 0x0000 //TX_AMS_RESRV_15 +958 0x0000 //TX_AMS_RESRV_16 +959 0x0000 //TX_AMS_RESRV_17 +960 0x0000 //TX_AMS_RESRV_18 +961 0x0000 //TX_AMS_RESRV_19 #RX -0 0x0064 //RX_RECVFUNC_MODE_0 +0 0x2064 //RX_RECVFUNC_MODE_0 1 0x0000 //RX_RECVFUNC_MODE_1 2 0x0004 //RX_SAMPLINGFREQ_SIG 3 0x0004 //RX_SAMPLINGFREQ_PROC @@ -15779,10 +23181,862 @@ 110 0x0000 //RX_FDDRC_RESRV_0 129 0x0100 //RX_SPK_VOL 130 0x0000 //RX_VOL_RESRV_0 +#RX 2 +157 0x0064 //RX_RECVFUNC_MODE_0 +158 0x0000 //RX_RECVFUNC_MODE_1 +159 0x0004 //RX_SAMPLINGFREQ_SIG +160 0x0004 //RX_SAMPLINGFREQ_PROC +161 0x000A //RX_FRAME_SZ +162 0x0000 //RX_DELAY_OPT +163 0x1000 //RX_TDDRC_ALPHA_UP_1 +164 0x1000 //RX_TDDRC_ALPHA_UP_2 +165 0x1000 //RX_TDDRC_ALPHA_UP_3 +166 0x1000 //RX_TDDRC_ALPHA_UP_4 +167 0x0800 //RX_PGA +168 0x7FFF //RX_A_HP +169 0x4000 //RX_B_PE +170 0x7800 //RX_THR_PITCH_DET_0 +171 0x7000 //RX_THR_PITCH_DET_1 +172 0x6000 //RX_THR_PITCH_DET_2 +173 0x0008 //RX_PITCH_BFR_LEN +174 0x0003 //RX_SBD_PITCH_DET +175 0x0100 //RX_PP_RESRV_0 +176 0x0020 //RX_PP_RESRV_1 +177 0x0500 //RX_N_SN_EST +178 0x000C //RX_N2_SN_EST +179 0x000A //RX_NS_LVL_CTRL +180 0xF600 //RX_THR_SN_EST +181 0x7000 //RX_LAMBDA_PFILT +182 0x000A //RX_FENS_RESRV_0 +183 0x0190 //RX_FENS_RESRV_1 +184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +187 0x0002 //RX_EXTRA_NS_L +188 0x0800 //RX_EXTRA_NS_A +189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +190 0x7FFF //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +192 0x199A //RX_A_POST_FLT +193 0x0000 //RX_LMT_THRD +194 0x4000 //RX_LMT_ALPHA +195 0x0020 //RX_FDEQ_SUBNUM +196 0x4848 //RX_FDEQ_GAIN_0 +197 0x4848 //RX_FDEQ_GAIN_1 +198 0x4848 //RX_FDEQ_GAIN_2 +199 0x4848 //RX_FDEQ_GAIN_3 +200 0x4848 //RX_FDEQ_GAIN_4 +201 0x4848 //RX_FDEQ_GAIN_5 +202 0x4848 //RX_FDEQ_GAIN_6 +203 0x4848 //RX_FDEQ_GAIN_7 +204 0x4848 //RX_FDEQ_GAIN_8 +205 0x4848 //RX_FDEQ_GAIN_9 +206 0x4848 //RX_FDEQ_GAIN_10 +207 0x4848 //RX_FDEQ_GAIN_11 +208 0x4848 //RX_FDEQ_GAIN_12 +209 0x4848 //RX_FDEQ_GAIN_13 +210 0x4848 //RX_FDEQ_GAIN_14 +211 0x4848 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0202 //RX_FDEQ_BIN_0 +221 0x0203 //RX_FDEQ_BIN_1 +222 0x0304 //RX_FDEQ_BIN_2 +223 0x0405 //RX_FDEQ_BIN_3 +224 0x0607 //RX_FDEQ_BIN_4 +225 0x0809 //RX_FDEQ_BIN_5 +226 0x0A0B //RX_FDEQ_BIN_6 +227 0x0C0D //RX_FDEQ_BIN_7 +228 0x0E0F //RX_FDEQ_BIN_8 +229 0x1011 //RX_FDEQ_BIN_9 +230 0x1214 //RX_FDEQ_BIN_10 +231 0x1618 //RX_FDEQ_BIN_11 +232 0x1C1C //RX_FDEQ_BIN_12 +233 0x2020 //RX_FDEQ_BIN_13 +234 0x2020 //RX_FDEQ_BIN_14 +235 0x2011 //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x4000 //RX_FDEQ_RESRV_0 +245 0x0320 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0030 //RX_FDDRC_BAND_MARGIN_1 +248 0x0050 //RX_FDDRC_BAND_MARGIN_2 +249 0x0080 //RX_FDDRC_BAND_MARGIN_3 +250 0x0007 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x5000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x6400 //RX_FDDRC_THRD_3_2 +258 0x6400 //RX_FDDRC_THRD_3_3 +259 0x2000 //RX_FDDRC_SLANT_0_0 +260 0x2000 //RX_FDDRC_SLANT_0_1 +261 0x2000 //RX_FDDRC_SLANT_0_2 +262 0x2000 //RX_FDDRC_SLANT_0_3 +263 0x5333 //RX_FDDRC_SLANT_1_0 +264 0x5333 //RX_FDDRC_SLANT_1_1 +265 0x5333 //RX_FDDRC_SLANT_1_2 +266 0x5333 //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +268 0x0000 //RX_FILTINDX +269 0x0000 //RX_TDDRC_THRD_0 +270 0x0000 //RX_TDDRC_THRD_1 +271 0x7FFF //RX_TDDRC_THRD_2 +272 0x7FFF //RX_TDDRC_THRD_3 +273 0x7FFF //RX_TDDRC_SLANT_0 +274 0x7FFF //RX_TDDRC_SLANT_1 +275 0x1000 //RX_TDDRC_ALPHA_UP_0 +276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x199A //RX_TDDRC_HMNC_GAIN +279 0x0001 //RX_TDDRC_SMT_FLAG +280 0x0CCD //RX_TDDRC_SMT_W +281 0x0155 //RX_TDDRC_DRC_GAIN +282 0x7C00 //RX_LAMBDA_PKA_FP +283 0x2000 //RX_TPKA_FP +284 0x2000 //RX_MIN_G_FP +285 0x0080 //RX_MAX_G_FP +286 0x0100 //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 +288 0x0000 //RX_MAXLEVEL_CNG +289 0x3000 //RX_BWE_UV_TH +290 0x3000 //RX_BWE_UV_TH2 +291 0x1800 //RX_BWE_UV_TH3 +292 0x1000 //RX_BWE_V_TH +293 0x04CD //RX_BWE_GAIN1_V_TH1 +294 0x0F33 //RX_BWE_GAIN1_V_TH2 +295 0x7333 //RX_BWE_UV_EQ +296 0x199A //RX_BWE_V_EQ +297 0x7333 //RX_BWE_TONE_TH +298 0x0004 //RX_BWE_UV_HOLD_T +299 0x6CCD //RX_BWE_GAIN2_ALPHA +300 0x799A //RX_BWE_GAIN3_ALPHA +301 0x001E //RX_BWE_CUTOFF +302 0x3000 //RX_BWE_GAINFILL +303 0x3200 //RX_BWE_MAXTH_TONE +304 0x2000 //RX_BWE_EQ_0 +305 0x2000 //RX_BWE_EQ_1 +306 0x2000 //RX_BWE_EQ_2 +307 0x2000 //RX_BWE_EQ_3 +308 0x2000 //RX_BWE_EQ_4 +309 0x2000 //RX_BWE_EQ_5 +310 0x2000 //RX_BWE_EQ_6 +311 0x0000 //RX_BWE_RESRV_0 +312 0x0000 //RX_BWE_RESRV_1 +313 0x0000 //RX_BWE_RESRV_2 +#VOL 0 +163 0x1000 //RX_TDDRC_ALPHA_UP_1 +164 0x1000 //RX_TDDRC_ALPHA_UP_2 +165 0x1000 //RX_TDDRC_ALPHA_UP_3 +166 0x1000 //RX_TDDRC_ALPHA_UP_4 +184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +190 0x7FFF //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +269 0x0000 //RX_TDDRC_THRD_0 +270 0x0000 //RX_TDDRC_THRD_1 +271 0x7FFF //RX_TDDRC_THRD_2 +272 0x7FFF //RX_TDDRC_THRD_3 +273 0x7FFF //RX_TDDRC_SLANT_0 +274 0x7FFF //RX_TDDRC_SLANT_1 +275 0x1000 //RX_TDDRC_ALPHA_UP_0 +276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x199A //RX_TDDRC_HMNC_GAIN +279 0x0001 //RX_TDDRC_SMT_FLAG +280 0x0CCD //RX_TDDRC_SMT_W +281 0x0155 //RX_TDDRC_DRC_GAIN +195 0x0020 //RX_FDEQ_SUBNUM +196 0x4848 //RX_FDEQ_GAIN_0 +197 0x4848 //RX_FDEQ_GAIN_1 +198 0x4848 //RX_FDEQ_GAIN_2 +199 0x4848 //RX_FDEQ_GAIN_3 +200 0x4848 //RX_FDEQ_GAIN_4 +201 0x4848 //RX_FDEQ_GAIN_5 +202 0x4848 //RX_FDEQ_GAIN_6 +203 0x4848 //RX_FDEQ_GAIN_7 +204 0x4848 //RX_FDEQ_GAIN_8 +205 0x4848 //RX_FDEQ_GAIN_9 +206 0x4848 //RX_FDEQ_GAIN_10 +207 0x4848 //RX_FDEQ_GAIN_11 +208 0x4848 //RX_FDEQ_GAIN_12 +209 0x4848 //RX_FDEQ_GAIN_13 +210 0x4848 //RX_FDEQ_GAIN_14 +211 0x4848 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0202 //RX_FDEQ_BIN_0 +221 0x0203 //RX_FDEQ_BIN_1 +222 0x0304 //RX_FDEQ_BIN_2 +223 0x0405 //RX_FDEQ_BIN_3 +224 0x0607 //RX_FDEQ_BIN_4 +225 0x0809 //RX_FDEQ_BIN_5 +226 0x0A0B //RX_FDEQ_BIN_6 +227 0x0C0D //RX_FDEQ_BIN_7 +228 0x0E0F //RX_FDEQ_BIN_8 +229 0x1011 //RX_FDEQ_BIN_9 +230 0x1214 //RX_FDEQ_BIN_10 +231 0x1618 //RX_FDEQ_BIN_11 +232 0x1C1C //RX_FDEQ_BIN_12 +233 0x2020 //RX_FDEQ_BIN_13 +234 0x2020 //RX_FDEQ_BIN_14 +235 0x2011 //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x4000 //RX_FDEQ_RESRV_0 +245 0x0320 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0030 //RX_FDDRC_BAND_MARGIN_1 +248 0x0050 //RX_FDDRC_BAND_MARGIN_2 +249 0x0080 //RX_FDDRC_BAND_MARGIN_3 +250 0x0007 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x5000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x6400 //RX_FDDRC_THRD_3_2 +258 0x6400 //RX_FDDRC_THRD_3_3 +259 0x2000 //RX_FDDRC_SLANT_0_0 +260 0x2000 //RX_FDDRC_SLANT_0_1 +261 0x2000 //RX_FDDRC_SLANT_0_2 +262 0x2000 //RX_FDDRC_SLANT_0_3 +263 0x5333 //RX_FDDRC_SLANT_1_0 +264 0x5333 //RX_FDDRC_SLANT_1_1 +265 0x5333 //RX_FDDRC_SLANT_1_2 +266 0x5333 //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +286 0x0100 //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 +#VOL 1 +163 0x1000 //RX_TDDRC_ALPHA_UP_1 +164 0x1000 //RX_TDDRC_ALPHA_UP_2 +165 0x1000 //RX_TDDRC_ALPHA_UP_3 +166 0x1000 //RX_TDDRC_ALPHA_UP_4 +184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +190 0x7FFF //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +269 0x0000 //RX_TDDRC_THRD_0 +270 0x0000 //RX_TDDRC_THRD_1 +271 0x7FFF //RX_TDDRC_THRD_2 +272 0x7FFF //RX_TDDRC_THRD_3 +273 0x7FFF //RX_TDDRC_SLANT_0 +274 0x7FFF //RX_TDDRC_SLANT_1 +275 0x1000 //RX_TDDRC_ALPHA_UP_0 +276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x199A //RX_TDDRC_HMNC_GAIN +279 0x0001 //RX_TDDRC_SMT_FLAG +280 0x0CCD //RX_TDDRC_SMT_W +281 0x0155 //RX_TDDRC_DRC_GAIN +195 0x0020 //RX_FDEQ_SUBNUM +196 0x4848 //RX_FDEQ_GAIN_0 +197 0x4848 //RX_FDEQ_GAIN_1 +198 0x4848 //RX_FDEQ_GAIN_2 +199 0x4848 //RX_FDEQ_GAIN_3 +200 0x4848 //RX_FDEQ_GAIN_4 +201 0x4848 //RX_FDEQ_GAIN_5 +202 0x4848 //RX_FDEQ_GAIN_6 +203 0x4848 //RX_FDEQ_GAIN_7 +204 0x4848 //RX_FDEQ_GAIN_8 +205 0x4848 //RX_FDEQ_GAIN_9 +206 0x4848 //RX_FDEQ_GAIN_10 +207 0x4848 //RX_FDEQ_GAIN_11 +208 0x4848 //RX_FDEQ_GAIN_12 +209 0x4848 //RX_FDEQ_GAIN_13 +210 0x4848 //RX_FDEQ_GAIN_14 +211 0x4848 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0202 //RX_FDEQ_BIN_0 +221 0x0203 //RX_FDEQ_BIN_1 +222 0x0304 //RX_FDEQ_BIN_2 +223 0x0405 //RX_FDEQ_BIN_3 +224 0x0607 //RX_FDEQ_BIN_4 +225 0x0809 //RX_FDEQ_BIN_5 +226 0x0A0B //RX_FDEQ_BIN_6 +227 0x0C0D //RX_FDEQ_BIN_7 +228 0x0E0F //RX_FDEQ_BIN_8 +229 0x1011 //RX_FDEQ_BIN_9 +230 0x1214 //RX_FDEQ_BIN_10 +231 0x1618 //RX_FDEQ_BIN_11 +232 0x1C1C //RX_FDEQ_BIN_12 +233 0x2020 //RX_FDEQ_BIN_13 +234 0x2020 //RX_FDEQ_BIN_14 +235 0x2011 //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x4000 //RX_FDEQ_RESRV_0 +245 0x0320 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0030 //RX_FDDRC_BAND_MARGIN_1 +248 0x0050 //RX_FDDRC_BAND_MARGIN_2 +249 0x0080 //RX_FDDRC_BAND_MARGIN_3 +250 0x0007 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x5000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x6400 //RX_FDDRC_THRD_3_2 +258 0x6400 //RX_FDDRC_THRD_3_3 +259 0x2000 //RX_FDDRC_SLANT_0_0 +260 0x2000 //RX_FDDRC_SLANT_0_1 +261 0x2000 //RX_FDDRC_SLANT_0_2 +262 0x2000 //RX_FDDRC_SLANT_0_3 +263 0x5333 //RX_FDDRC_SLANT_1_0 +264 0x5333 //RX_FDDRC_SLANT_1_1 +265 0x5333 //RX_FDDRC_SLANT_1_2 +266 0x5333 //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +286 0x0100 //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 +#VOL 2 +163 0x1000 //RX_TDDRC_ALPHA_UP_1 +164 0x1000 //RX_TDDRC_ALPHA_UP_2 +165 0x1000 //RX_TDDRC_ALPHA_UP_3 +166 0x1000 //RX_TDDRC_ALPHA_UP_4 +184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +190 0x7FFF //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +269 0x0000 //RX_TDDRC_THRD_0 +270 0x0000 //RX_TDDRC_THRD_1 +271 0x7FFF //RX_TDDRC_THRD_2 +272 0x7FFF //RX_TDDRC_THRD_3 +273 0x7FFF //RX_TDDRC_SLANT_0 +274 0x7FFF //RX_TDDRC_SLANT_1 +275 0x1000 //RX_TDDRC_ALPHA_UP_0 +276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x199A //RX_TDDRC_HMNC_GAIN +279 0x0001 //RX_TDDRC_SMT_FLAG +280 0x0CCD //RX_TDDRC_SMT_W +281 0x0155 //RX_TDDRC_DRC_GAIN +195 0x0020 //RX_FDEQ_SUBNUM +196 0x4848 //RX_FDEQ_GAIN_0 +197 0x4848 //RX_FDEQ_GAIN_1 +198 0x4848 //RX_FDEQ_GAIN_2 +199 0x4848 //RX_FDEQ_GAIN_3 +200 0x4848 //RX_FDEQ_GAIN_4 +201 0x4848 //RX_FDEQ_GAIN_5 +202 0x4848 //RX_FDEQ_GAIN_6 +203 0x4848 //RX_FDEQ_GAIN_7 +204 0x4848 //RX_FDEQ_GAIN_8 +205 0x4848 //RX_FDEQ_GAIN_9 +206 0x4848 //RX_FDEQ_GAIN_10 +207 0x4848 //RX_FDEQ_GAIN_11 +208 0x4848 //RX_FDEQ_GAIN_12 +209 0x4848 //RX_FDEQ_GAIN_13 +210 0x4848 //RX_FDEQ_GAIN_14 +211 0x4848 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0202 //RX_FDEQ_BIN_0 +221 0x0203 //RX_FDEQ_BIN_1 +222 0x0304 //RX_FDEQ_BIN_2 +223 0x0405 //RX_FDEQ_BIN_3 +224 0x0607 //RX_FDEQ_BIN_4 +225 0x0809 //RX_FDEQ_BIN_5 +226 0x0A0B //RX_FDEQ_BIN_6 +227 0x0C0D //RX_FDEQ_BIN_7 +228 0x0E0F //RX_FDEQ_BIN_8 +229 0x1011 //RX_FDEQ_BIN_9 +230 0x1214 //RX_FDEQ_BIN_10 +231 0x1618 //RX_FDEQ_BIN_11 +232 0x1C1C //RX_FDEQ_BIN_12 +233 0x2020 //RX_FDEQ_BIN_13 +234 0x2020 //RX_FDEQ_BIN_14 +235 0x2011 //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x4000 //RX_FDEQ_RESRV_0 +245 0x0320 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0030 //RX_FDDRC_BAND_MARGIN_1 +248 0x0050 //RX_FDDRC_BAND_MARGIN_2 +249 0x0080 //RX_FDDRC_BAND_MARGIN_3 +250 0x0007 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x5000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x6400 //RX_FDDRC_THRD_3_2 +258 0x6400 //RX_FDDRC_THRD_3_3 +259 0x2000 //RX_FDDRC_SLANT_0_0 +260 0x2000 //RX_FDDRC_SLANT_0_1 +261 0x2000 //RX_FDDRC_SLANT_0_2 +262 0x2000 //RX_FDDRC_SLANT_0_3 +263 0x5333 //RX_FDDRC_SLANT_1_0 +264 0x5333 //RX_FDDRC_SLANT_1_1 +265 0x5333 //RX_FDDRC_SLANT_1_2 +266 0x5333 //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +286 0x0100 //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 +#VOL 3 +163 0x1000 //RX_TDDRC_ALPHA_UP_1 +164 0x1000 //RX_TDDRC_ALPHA_UP_2 +165 0x1000 //RX_TDDRC_ALPHA_UP_3 +166 0x1000 //RX_TDDRC_ALPHA_UP_4 +184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +190 0x7FFF //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +269 0x0000 //RX_TDDRC_THRD_0 +270 0x0000 //RX_TDDRC_THRD_1 +271 0x7FFF //RX_TDDRC_THRD_2 +272 0x7FFF //RX_TDDRC_THRD_3 +273 0x7FFF //RX_TDDRC_SLANT_0 +274 0x7FFF //RX_TDDRC_SLANT_1 +275 0x1000 //RX_TDDRC_ALPHA_UP_0 +276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x199A //RX_TDDRC_HMNC_GAIN +279 0x0001 //RX_TDDRC_SMT_FLAG +280 0x0CCD //RX_TDDRC_SMT_W +281 0x0155 //RX_TDDRC_DRC_GAIN +195 0x0020 //RX_FDEQ_SUBNUM +196 0x4848 //RX_FDEQ_GAIN_0 +197 0x4848 //RX_FDEQ_GAIN_1 +198 0x4848 //RX_FDEQ_GAIN_2 +199 0x4848 //RX_FDEQ_GAIN_3 +200 0x4848 //RX_FDEQ_GAIN_4 +201 0x4848 //RX_FDEQ_GAIN_5 +202 0x4848 //RX_FDEQ_GAIN_6 +203 0x4848 //RX_FDEQ_GAIN_7 +204 0x4848 //RX_FDEQ_GAIN_8 +205 0x4848 //RX_FDEQ_GAIN_9 +206 0x4848 //RX_FDEQ_GAIN_10 +207 0x4848 //RX_FDEQ_GAIN_11 +208 0x4848 //RX_FDEQ_GAIN_12 +209 0x4848 //RX_FDEQ_GAIN_13 +210 0x4848 //RX_FDEQ_GAIN_14 +211 0x4848 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0202 //RX_FDEQ_BIN_0 +221 0x0203 //RX_FDEQ_BIN_1 +222 0x0304 //RX_FDEQ_BIN_2 +223 0x0405 //RX_FDEQ_BIN_3 +224 0x0607 //RX_FDEQ_BIN_4 +225 0x0809 //RX_FDEQ_BIN_5 +226 0x0A0B //RX_FDEQ_BIN_6 +227 0x0C0D //RX_FDEQ_BIN_7 +228 0x0E0F //RX_FDEQ_BIN_8 +229 0x1011 //RX_FDEQ_BIN_9 +230 0x1214 //RX_FDEQ_BIN_10 +231 0x1618 //RX_FDEQ_BIN_11 +232 0x1C1C //RX_FDEQ_BIN_12 +233 0x2020 //RX_FDEQ_BIN_13 +234 0x2020 //RX_FDEQ_BIN_14 +235 0x2011 //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x4000 //RX_FDEQ_RESRV_0 +245 0x0320 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0030 //RX_FDDRC_BAND_MARGIN_1 +248 0x0050 //RX_FDDRC_BAND_MARGIN_2 +249 0x0080 //RX_FDDRC_BAND_MARGIN_3 +250 0x0007 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x5000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x6400 //RX_FDDRC_THRD_3_2 +258 0x6400 //RX_FDDRC_THRD_3_3 +259 0x2000 //RX_FDDRC_SLANT_0_0 +260 0x2000 //RX_FDDRC_SLANT_0_1 +261 0x2000 //RX_FDDRC_SLANT_0_2 +262 0x2000 //RX_FDDRC_SLANT_0_3 +263 0x5333 //RX_FDDRC_SLANT_1_0 +264 0x5333 //RX_FDDRC_SLANT_1_1 +265 0x5333 //RX_FDDRC_SLANT_1_2 +266 0x5333 //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +286 0x0100 //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 +#VOL 4 +163 0x1000 //RX_TDDRC_ALPHA_UP_1 +164 0x1000 //RX_TDDRC_ALPHA_UP_2 +165 0x1000 //RX_TDDRC_ALPHA_UP_3 +166 0x1000 //RX_TDDRC_ALPHA_UP_4 +184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +190 0x7FFF //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +269 0x0000 //RX_TDDRC_THRD_0 +270 0x0000 //RX_TDDRC_THRD_1 +271 0x7FFF //RX_TDDRC_THRD_2 +272 0x7FFF //RX_TDDRC_THRD_3 +273 0x7FFF //RX_TDDRC_SLANT_0 +274 0x7FFF //RX_TDDRC_SLANT_1 +275 0x1000 //RX_TDDRC_ALPHA_UP_0 +276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x199A //RX_TDDRC_HMNC_GAIN +279 0x0001 //RX_TDDRC_SMT_FLAG +280 0x0CCD //RX_TDDRC_SMT_W +281 0x0155 //RX_TDDRC_DRC_GAIN +195 0x0020 //RX_FDEQ_SUBNUM +196 0x4848 //RX_FDEQ_GAIN_0 +197 0x4848 //RX_FDEQ_GAIN_1 +198 0x4848 //RX_FDEQ_GAIN_2 +199 0x4848 //RX_FDEQ_GAIN_3 +200 0x4848 //RX_FDEQ_GAIN_4 +201 0x4848 //RX_FDEQ_GAIN_5 +202 0x4848 //RX_FDEQ_GAIN_6 +203 0x4848 //RX_FDEQ_GAIN_7 +204 0x4848 //RX_FDEQ_GAIN_8 +205 0x4848 //RX_FDEQ_GAIN_9 +206 0x4848 //RX_FDEQ_GAIN_10 +207 0x4848 //RX_FDEQ_GAIN_11 +208 0x4848 //RX_FDEQ_GAIN_12 +209 0x4848 //RX_FDEQ_GAIN_13 +210 0x4848 //RX_FDEQ_GAIN_14 +211 0x4848 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0202 //RX_FDEQ_BIN_0 +221 0x0203 //RX_FDEQ_BIN_1 +222 0x0304 //RX_FDEQ_BIN_2 +223 0x0405 //RX_FDEQ_BIN_3 +224 0x0607 //RX_FDEQ_BIN_4 +225 0x0809 //RX_FDEQ_BIN_5 +226 0x0A0B //RX_FDEQ_BIN_6 +227 0x0C0D //RX_FDEQ_BIN_7 +228 0x0E0F //RX_FDEQ_BIN_8 +229 0x1011 //RX_FDEQ_BIN_9 +230 0x1214 //RX_FDEQ_BIN_10 +231 0x1618 //RX_FDEQ_BIN_11 +232 0x1C1C //RX_FDEQ_BIN_12 +233 0x2020 //RX_FDEQ_BIN_13 +234 0x2020 //RX_FDEQ_BIN_14 +235 0x2011 //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x4000 //RX_FDEQ_RESRV_0 +245 0x0320 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0030 //RX_FDDRC_BAND_MARGIN_1 +248 0x0050 //RX_FDDRC_BAND_MARGIN_2 +249 0x0080 //RX_FDDRC_BAND_MARGIN_3 +250 0x0007 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x5000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x6400 //RX_FDDRC_THRD_3_2 +258 0x6400 //RX_FDDRC_THRD_3_3 +259 0x2000 //RX_FDDRC_SLANT_0_0 +260 0x2000 //RX_FDDRC_SLANT_0_1 +261 0x2000 //RX_FDDRC_SLANT_0_2 +262 0x2000 //RX_FDDRC_SLANT_0_3 +263 0x5333 //RX_FDDRC_SLANT_1_0 +264 0x5333 //RX_FDDRC_SLANT_1_1 +265 0x5333 //RX_FDDRC_SLANT_1_2 +266 0x5333 //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +286 0x0100 //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 +#VOL 5 +163 0x1000 //RX_TDDRC_ALPHA_UP_1 +164 0x1000 //RX_TDDRC_ALPHA_UP_2 +165 0x1000 //RX_TDDRC_ALPHA_UP_3 +166 0x1000 //RX_TDDRC_ALPHA_UP_4 +184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +190 0x7FFF //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +269 0x0000 //RX_TDDRC_THRD_0 +270 0x0000 //RX_TDDRC_THRD_1 +271 0x7FFF //RX_TDDRC_THRD_2 +272 0x7FFF //RX_TDDRC_THRD_3 +273 0x7FFF //RX_TDDRC_SLANT_0 +274 0x7FFF //RX_TDDRC_SLANT_1 +275 0x1000 //RX_TDDRC_ALPHA_UP_0 +276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x199A //RX_TDDRC_HMNC_GAIN +279 0x0001 //RX_TDDRC_SMT_FLAG +280 0x0CCD //RX_TDDRC_SMT_W +281 0x0155 //RX_TDDRC_DRC_GAIN +195 0x0020 //RX_FDEQ_SUBNUM +196 0x4848 //RX_FDEQ_GAIN_0 +197 0x4848 //RX_FDEQ_GAIN_1 +198 0x4848 //RX_FDEQ_GAIN_2 +199 0x4848 //RX_FDEQ_GAIN_3 +200 0x4848 //RX_FDEQ_GAIN_4 +201 0x4848 //RX_FDEQ_GAIN_5 +202 0x4848 //RX_FDEQ_GAIN_6 +203 0x4848 //RX_FDEQ_GAIN_7 +204 0x4848 //RX_FDEQ_GAIN_8 +205 0x4848 //RX_FDEQ_GAIN_9 +206 0x4848 //RX_FDEQ_GAIN_10 +207 0x4848 //RX_FDEQ_GAIN_11 +208 0x4848 //RX_FDEQ_GAIN_12 +209 0x4848 //RX_FDEQ_GAIN_13 +210 0x4848 //RX_FDEQ_GAIN_14 +211 0x4848 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0202 //RX_FDEQ_BIN_0 +221 0x0203 //RX_FDEQ_BIN_1 +222 0x0304 //RX_FDEQ_BIN_2 +223 0x0405 //RX_FDEQ_BIN_3 +224 0x0607 //RX_FDEQ_BIN_4 +225 0x0809 //RX_FDEQ_BIN_5 +226 0x0A0B //RX_FDEQ_BIN_6 +227 0x0C0D //RX_FDEQ_BIN_7 +228 0x0E0F //RX_FDEQ_BIN_8 +229 0x1011 //RX_FDEQ_BIN_9 +230 0x1214 //RX_FDEQ_BIN_10 +231 0x1618 //RX_FDEQ_BIN_11 +232 0x1C1C //RX_FDEQ_BIN_12 +233 0x2020 //RX_FDEQ_BIN_13 +234 0x2020 //RX_FDEQ_BIN_14 +235 0x2011 //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x4000 //RX_FDEQ_RESRV_0 +245 0x0320 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0030 //RX_FDDRC_BAND_MARGIN_1 +248 0x0050 //RX_FDDRC_BAND_MARGIN_2 +249 0x0080 //RX_FDDRC_BAND_MARGIN_3 +250 0x0007 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x5000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x6400 //RX_FDDRC_THRD_3_2 +258 0x6400 //RX_FDDRC_THRD_3_3 +259 0x2000 //RX_FDDRC_SLANT_0_0 +260 0x2000 //RX_FDDRC_SLANT_0_1 +261 0x2000 //RX_FDDRC_SLANT_0_2 +262 0x2000 //RX_FDDRC_SLANT_0_3 +263 0x5333 //RX_FDDRC_SLANT_1_0 +264 0x5333 //RX_FDDRC_SLANT_1_1 +265 0x5333 //RX_FDDRC_SLANT_1_2 +266 0x5333 //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +286 0x0100 //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 +#VOL 6 +163 0x1000 //RX_TDDRC_ALPHA_UP_1 +164 0x1000 //RX_TDDRC_ALPHA_UP_2 +165 0x1000 //RX_TDDRC_ALPHA_UP_3 +166 0x1000 //RX_TDDRC_ALPHA_UP_4 +184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +190 0x7FFF //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +269 0x0000 //RX_TDDRC_THRD_0 +270 0x0000 //RX_TDDRC_THRD_1 +271 0x7FFF //RX_TDDRC_THRD_2 +272 0x7FFF //RX_TDDRC_THRD_3 +273 0x7FFF //RX_TDDRC_SLANT_0 +274 0x7FFF //RX_TDDRC_SLANT_1 +275 0x1000 //RX_TDDRC_ALPHA_UP_0 +276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x199A //RX_TDDRC_HMNC_GAIN +279 0x0001 //RX_TDDRC_SMT_FLAG +280 0x0CCD //RX_TDDRC_SMT_W +281 0x0155 //RX_TDDRC_DRC_GAIN +195 0x0020 //RX_FDEQ_SUBNUM +196 0x4848 //RX_FDEQ_GAIN_0 +197 0x4848 //RX_FDEQ_GAIN_1 +198 0x4848 //RX_FDEQ_GAIN_2 +199 0x4848 //RX_FDEQ_GAIN_3 +200 0x4848 //RX_FDEQ_GAIN_4 +201 0x4848 //RX_FDEQ_GAIN_5 +202 0x4848 //RX_FDEQ_GAIN_6 +203 0x4848 //RX_FDEQ_GAIN_7 +204 0x4848 //RX_FDEQ_GAIN_8 +205 0x4848 //RX_FDEQ_GAIN_9 +206 0x4848 //RX_FDEQ_GAIN_10 +207 0x4848 //RX_FDEQ_GAIN_11 +208 0x4848 //RX_FDEQ_GAIN_12 +209 0x4848 //RX_FDEQ_GAIN_13 +210 0x4848 //RX_FDEQ_GAIN_14 +211 0x4848 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0202 //RX_FDEQ_BIN_0 +221 0x0203 //RX_FDEQ_BIN_1 +222 0x0304 //RX_FDEQ_BIN_2 +223 0x0405 //RX_FDEQ_BIN_3 +224 0x0607 //RX_FDEQ_BIN_4 +225 0x0809 //RX_FDEQ_BIN_5 +226 0x0A0B //RX_FDEQ_BIN_6 +227 0x0C0D //RX_FDEQ_BIN_7 +228 0x0E0F //RX_FDEQ_BIN_8 +229 0x1011 //RX_FDEQ_BIN_9 +230 0x1214 //RX_FDEQ_BIN_10 +231 0x1618 //RX_FDEQ_BIN_11 +232 0x1C1C //RX_FDEQ_BIN_12 +233 0x2020 //RX_FDEQ_BIN_13 +234 0x2020 //RX_FDEQ_BIN_14 +235 0x2011 //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x4000 //RX_FDEQ_RESRV_0 +245 0x0320 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0030 //RX_FDDRC_BAND_MARGIN_1 +248 0x0050 //RX_FDDRC_BAND_MARGIN_2 +249 0x0080 //RX_FDDRC_BAND_MARGIN_3 +250 0x0007 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x5000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x6400 //RX_FDDRC_THRD_3_2 +258 0x6400 //RX_FDDRC_THRD_3_3 +259 0x2000 //RX_FDDRC_SLANT_0_0 +260 0x2000 //RX_FDDRC_SLANT_0_1 +261 0x2000 //RX_FDDRC_SLANT_0_2 +262 0x2000 //RX_FDDRC_SLANT_0_3 +263 0x5333 //RX_FDDRC_SLANT_1_0 +264 0x5333 //RX_FDDRC_SLANT_1_1 +265 0x5333 //RX_FDDRC_SLANT_1_2 +266 0x5333 //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +286 0x0100 //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 #CASE_NAME BLUETOOTH-BTNB_NREC-VOICE_GENERIC-NB -#PARAM_TYPE TX+RX -#TOTAL_CUSTOM_STEP 7 +#PARAM_MODE Full +#PARAM_TYPE TX+2RX +#TOTAL_CUSTOM_STEP 7+7 #TX 0 0x0008 //TX_OPERATION_MODE_0 1 0x0008 //TX_OPERATION_MODE_1 @@ -16035,20 +24289,20 @@ 248 0xF400 //TX_THR_SN_EST_6 249 0xF600 //TX_THR_SN_EST_7 250 0x0000 //TX_DELTA_THR_SN_EST_0 -251 0x0000 //TX_DELTA_THR_SN_EST_1 +251 0x0200 //TX_DELTA_THR_SN_EST_1 252 0x0200 //TX_DELTA_THR_SN_EST_2 253 0x0200 //TX_DELTA_THR_SN_EST_3 254 0x0200 //TX_DELTA_THR_SN_EST_4 255 0x0200 //TX_DELTA_THR_SN_EST_5 -256 0x0200 //TX_DELTA_THR_SN_EST_6 +256 0x0000 //TX_DELTA_THR_SN_EST_6 257 0x0200 //TX_DELTA_THR_SN_EST_7 258 0x6000 //TX_LAMBDA_NN_EST_0 -259 0x6000 //TX_LAMBDA_NN_EST_1 +259 0x4000 //TX_LAMBDA_NN_EST_1 260 0x4000 //TX_LAMBDA_NN_EST_2 261 0x4000 //TX_LAMBDA_NN_EST_3 262 0x4000 //TX_LAMBDA_NN_EST_4 263 0x4000 //TX_LAMBDA_NN_EST_5 -264 0x4000 //TX_LAMBDA_NN_EST_6 +264 0x6000 //TX_LAMBDA_NN_EST_6 265 0x4000 //TX_LAMBDA_NN_EST_7 266 0x0400 //TX_N_SN_EST 267 0x001E //TX_INBEAM_T @@ -16066,16 +24320,16 @@ 279 0x1000 //TX_B_POST_FLT_0 280 0x1000 //TX_B_POST_FLT_1 281 0x000F //TX_NS_LVL_CTRL_0 -282 0x000F //TX_NS_LVL_CTRL_1 -283 0x0011 //TX_NS_LVL_CTRL_2 +282 0x0011 //TX_NS_LVL_CTRL_1 +283 0x000F //TX_NS_LVL_CTRL_2 284 0x000F //TX_NS_LVL_CTRL_3 285 0x000F //TX_NS_LVL_CTRL_4 286 0x000F //TX_NS_LVL_CTRL_5 287 0x000F //TX_NS_LVL_CTRL_6 288 0x0011 //TX_NS_LVL_CTRL_7 289 0x000C //TX_MIN_GAIN_S_0 -290 0x000C //TX_MIN_GAIN_S_1 -291 0x000F //TX_MIN_GAIN_S_2 +290 0x000F //TX_MIN_GAIN_S_1 +291 0x000C //TX_MIN_GAIN_S_2 292 0x000C //TX_MIN_GAIN_S_3 293 0x000C //TX_MIN_GAIN_S_4 294 0x000C //TX_MIN_GAIN_S_5 @@ -16099,12 +24353,12 @@ 312 0x7FFF //TX_A_POST_FILT_0 313 0x2000 //TX_A_POST_FILT_1 314 0x4000 //TX_A_POST_FILT_S_0 -315 0x4000 //TX_A_POST_FILT_S_1 +315 0x5000 //TX_A_POST_FILT_S_1 316 0x5000 //TX_A_POST_FILT_S_2 317 0x5000 //TX_A_POST_FILT_S_3 318 0x5000 //TX_A_POST_FILT_S_4 319 0x5000 //TX_A_POST_FILT_S_5 -320 0x5000 //TX_A_POST_FILT_S_6 +320 0x4000 //TX_A_POST_FILT_S_6 321 0x5000 //TX_A_POST_FILT_S_7 322 0x1000 //TX_B_POST_FILT_0 323 0x1000 //TX_B_POST_FILT_1 @@ -16164,10 +24418,10 @@ 377 0x7FFF //TX_NOISE_TH_5_4 378 0x044C //TX_NOISE_TH_6 379 0x0014 //TX_MINENOISE_TH -380 0x4000 //TX_MINENOISE_MIC0_TH_MTS -381 0xFFEE //TX_MINENOISE_MIC0_TH_EXP -382 0x6000 //TX_MINENOISE_MIC0_S_TH_MTS -383 0xFFF3 //TX_MINENOISE_MIC0_S_TH_EXP +380 0x4000 //TX_MORENS_TFMASK_TH +381 0xFFEE //TX_DRC_QUIET_FLOOR +382 0x6000 //TX_RATIODTL_CUT_TH +383 0xFFF3 //TX_DT_CUT_K1 384 0x0666 //TX_OUT_ENER_S_TH_CLEAN 385 0x0666 //TX_OUT_ENER_S_TH_LESSCLEAN 386 0x0333 //TX_OUT_ENER_S_TH_NOISY @@ -16175,15 +24429,15 @@ 388 0x0333 //TX_OUT_ENER_TH_SPEECH 389 0x2000 //TX_SN_NPB_GAIN 390 0x0000 //TX_NN_NPB_GAIN -391 0x0000 //TX_CSX_ALPHA_0 -392 0x0000 //TX_CSX_ALPHA_1 -393 0x0000 //TX_CSX_ALPHA_2 -394 0x0000 //TX_CSX_ALPHA_3 -395 0x0800 //TX_MU_ARSP_EST -396 0x00C8 //TX_P_OUTBEAM_MIN_TH +391 0x0000 //TX_POST_MASK_SUP_HSNE +392 0x0000 //TX_TAIL_DET_TH +393 0x0000 //TX_B_LESSCUT_RTO_WTA +394 0x0000 //TX_MEL_G_R +395 0x0800 //TX_SUPHIGH_TH +396 0x00C8 //TX_MASK_G_R 397 0x0002 //TX_EXTRA_NS_L -398 0x0800 //TX_EXTRA_NS_A -399 0x0005 //TX_VR_NOISE_FLOOR_TH +398 0x0800 //TX_C_POST_FLT_MASK +399 0x0005 //TX_A_POST_FLT_WNS 400 0x0148 //TX_MIN_G_LOW300HZ 401 0x0002 //TX_MAXLEVEL_CNG 402 0x00B4 //TX_STN_NOISE_TH @@ -16298,16 +24552,16 @@ 511 0x6666 //TX_MIC_TO_BFGAIN 512 0x0000 //TX_MICTOBFGAIN0 513 0x0000 //TX_FASTMUE_TH -514 0x0000 //TX_DERVB_LEN_0 -515 0x0000 //TX_DERVB_LEN_1 -516 0x0000 //TX_RHO_DERVB -517 0x0000 //TX_MIC_INDX_DERVB -518 0x0000 //TX_MU_DERVB -519 0x0000 //TX_DR_RESRV_0 -520 0x0000 //TX_DR_RESRV_1 -521 0x0000 //TX_DR_RESRV_2 -522 0x0000 //TX_DR_RESRV_3 -523 0x0000 //TX_DR_RESRV_4 +514 0x0000 //TX_DEREVERB_LF_MU +515 0x0000 //TX_DEREVERB_HF_MU +516 0x0000 //TX_DEREVERB_DELAY +517 0x0000 //TX_DEREVERB_COEF_LEN +518 0x0000 //TX_DEREVERB_DNR +519 0x0000 //TX_DEREVERB_ALPHA +520 0x0000 //TX_DEREVERB_BETA +521 0x0000 //TX_GSC_RTOL_TH +522 0x0000 //TX_GSC_RTOH_TH +523 0x0000 //TX_WIDE2_MEANHTH 524 0x0000 //TX_DR_RESRV_5 525 0x0000 //TX_DR_RESRV_6 526 0x0000 //TX_DR_RESRV_7 @@ -16681,8 +24935,73 @@ 894 0xC000 //TX_FASTNS_SSA_THHFL 895 0xCCCC //TX_FASTNS_SSA_THLFH 896 0xD999 //TX_FASTNS_SSA_THHFH +897 0x0000 //TX_SENDFUNC_REG_MICMUTE +898 0x0000 //TX_SENDFUNC_REG_MICMUTE1 +899 0x0000 //TX_MICMUTE_RATIO_THR +900 0x0000 //TX_MICMUTE_AMP_THR +901 0x0000 //TX_MICMUTE_HPF_IND +902 0x0000 //TX_MICMUTE_LOG_EYR_TH +903 0x0000 //TX_MICMUTE_CVG_TIME +904 0x0000 //TX_MICMUTE_RELEASE_TIME +905 0x0000 //TX_MIC_VOLUME_MIC0MUTE +906 0x0000 //TX_MICMUTE_EPD_OFFSET_0 +907 0x0000 //TX_MICMUTE_FRQ_AEC_L +908 0x0000 //TX_MICMUTE_EAD_THR +909 0x0000 //TX_MICMUTE_LAMBDA_CB_NLE +910 0x0000 //TX_MICMUTE_LAMBDA_RE_EST +911 0x0000 //TX_DTD_THR1_MICMUTE_0 +912 0x0000 //TX_DTD_THR1_MICMUTE_1 +913 0x0000 //TX_DTD_THR1_MICMUTE_2 +914 0x0000 //TX_DTD_THR1_MICMUTE_3 +915 0x0000 //TX_DTD_THR2_MICMUTE_0 +916 0x0000 //TX_MICMUTE_MIN_EQ_RE_EST_0 +917 0x0000 //TX_MICMUTE_MIN_EQ_RE_EST_1 +918 0x0000 //TX_MICMUTE_MIN_EQ_RE_EST_2 +919 0x0000 //TX_MICMUTE_MIN_EQ_RE_EST_3 +920 0x0000 //TX_MICMUTE_MIN_EQ_RE_EST_4 +921 0x0000 //TX_MICMUTE_C_POST_FLT +922 0x0000 //TX_MICMUTE_DT_CUT_K +923 0x0000 //TX_MICMUTE_DT_CUT_THR +924 0x0000 //TX_MICMUTE_DT_CUT_K2 +925 0x0000 //TX_MICMUTE_DT_CUT_THR2 +926 0x0000 //TX_MICMUTE_DT2_HOLD_N +927 0x0000 //TX_MICMUTE_RATIODTH_THCUT +928 0x0000 //TX_MICMUTE_B_POST_FLT_ECHOL +929 0x0000 //TX_MICMUTE_B_POST_FLT_ECHOH +930 0x0000 //TX_MICMUTE_C_POST_FLT_MASK +931 0x0000 //TX_MICMUTE_RATIODTL_CUT_TH +932 0x0000 //TX_MICMUTE_DT_CUT_K1 +933 0x0000 //TX_MICMUTE_N2_SN_EST +934 0x0000 //TX_MICMUTE_THR_SN_EST_0 +935 0x0000 //TX_MICMUTE_MIN_G_CTRL_0 +936 0x0000 //TX_MICMUTE_A_POST_FILT_S_0 +937 0x0000 //TX_MICMUTE_B_POST_FILT_0 +938 0x0000 //TX_MIC1RUB_AMP_THR +939 0x0000 //TX_MIC1MUTE_RATIO_THR +940 0x0000 //TX_MIC1MUTE_AMP_THR +941 0x0000 //TX_MIC1MUTE_CVG_TIME +942 0x0000 //TX_MIC1MUTE_RELEASE_TIME +943 0x0000 //TX_AMS_RESRV_01 +944 0x0000 //TX_AMS_RESRV_02 +945 0x0000 //TX_AMS_RESRV_03 +946 0x0000 //TX_AMS_RESRV_04 +947 0x0000 //TX_AMS_RESRV_05 +948 0x0000 //TX_AMS_RESRV_06 +949 0x0000 //TX_AMS_RESRV_07 +950 0x0000 //TX_AMS_RESRV_08 +951 0x0000 //TX_AMS_RESRV_09 +952 0x0000 //TX_AMS_RESRV_10 +953 0x0000 //TX_AMS_RESRV_11 +954 0x0000 //TX_AMS_RESRV_12 +955 0x0000 //TX_AMS_RESRV_13 +956 0x0000 //TX_AMS_RESRV_14 +957 0x0000 //TX_AMS_RESRV_15 +958 0x0000 //TX_AMS_RESRV_16 +959 0x0000 //TX_AMS_RESRV_17 +960 0x0000 //TX_AMS_RESRV_18 +961 0x0000 //TX_AMS_RESRV_19 #RX -0 0x006C //RX_RECVFUNC_MODE_0 +0 0x206C //RX_RECVFUNC_MODE_0 1 0x0000 //RX_RECVFUNC_MODE_1 2 0x0000 //RX_SAMPLINGFREQ_SIG 3 0x0000 //RX_SAMPLINGFREQ_PROC @@ -17532,10 +25851,862 @@ 110 0x0000 //RX_FDDRC_RESRV_0 129 0x0100 //RX_SPK_VOL 130 0x0000 //RX_VOL_RESRV_0 +#RX 2 +157 0x206C //RX_RECVFUNC_MODE_0 +158 0x0000 //RX_RECVFUNC_MODE_1 +159 0x0000 //RX_SAMPLINGFREQ_SIG +160 0x0000 //RX_SAMPLINGFREQ_PROC +161 0x000A //RX_FRAME_SZ +162 0x0000 //RX_DELAY_OPT +163 0x3000 //RX_TDDRC_ALPHA_UP_1 +164 0x3000 //RX_TDDRC_ALPHA_UP_2 +165 0x3000 //RX_TDDRC_ALPHA_UP_3 +166 0x3000 //RX_TDDRC_ALPHA_UP_4 +167 0x0800 //RX_PGA +168 0x7FFF //RX_A_HP +169 0x0000 //RX_B_PE +170 0x3800 //RX_THR_PITCH_DET_0 +171 0x3000 //RX_THR_PITCH_DET_1 +172 0x2800 //RX_THR_PITCH_DET_2 +173 0x0008 //RX_PITCH_BFR_LEN +174 0x0003 //RX_SBD_PITCH_DET +175 0x0100 //RX_PP_RESRV_0 +176 0x0020 //RX_PP_RESRV_1 +177 0x0600 //RX_N_SN_EST +178 0x000C //RX_N2_SN_EST +179 0x0010 //RX_NS_LVL_CTRL +180 0xF800 //RX_THR_SN_EST +181 0x7CCD //RX_LAMBDA_PFILT +182 0x000A //RX_FENS_RESRV_0 +183 0x0190 //RX_FENS_RESRV_1 +184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +187 0x0002 //RX_EXTRA_NS_L +188 0x0800 //RX_EXTRA_NS_A +189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +190 0x7FFF //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +192 0x199A //RX_A_POST_FLT +193 0x0000 //RX_LMT_THRD +194 0x4000 //RX_LMT_ALPHA +195 0x0014 //RX_FDEQ_SUBNUM +196 0x4848 //RX_FDEQ_GAIN_0 +197 0x4848 //RX_FDEQ_GAIN_1 +198 0x4848 //RX_FDEQ_GAIN_2 +199 0x4848 //RX_FDEQ_GAIN_3 +200 0x4848 //RX_FDEQ_GAIN_4 +201 0x4848 //RX_FDEQ_GAIN_5 +202 0x4444 //RX_FDEQ_GAIN_6 +203 0x4040 //RX_FDEQ_GAIN_7 +204 0x4040 //RX_FDEQ_GAIN_8 +205 0x4040 //RX_FDEQ_GAIN_9 +206 0x4848 //RX_FDEQ_GAIN_10 +207 0x4848 //RX_FDEQ_GAIN_11 +208 0x4848 //RX_FDEQ_GAIN_12 +209 0x4848 //RX_FDEQ_GAIN_13 +210 0x4848 //RX_FDEQ_GAIN_14 +211 0x4848 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0202 //RX_FDEQ_BIN_0 +221 0x0203 //RX_FDEQ_BIN_1 +222 0x0303 //RX_FDEQ_BIN_2 +223 0x0304 //RX_FDEQ_BIN_3 +224 0x0405 //RX_FDEQ_BIN_4 +225 0x0506 //RX_FDEQ_BIN_5 +226 0x0708 //RX_FDEQ_BIN_6 +227 0x090A //RX_FDEQ_BIN_7 +228 0x0B0C //RX_FDEQ_BIN_8 +229 0x0D0E //RX_FDEQ_BIN_9 +230 0x0000 //RX_FDEQ_BIN_10 +231 0x0000 //RX_FDEQ_BIN_11 +232 0x0000 //RX_FDEQ_BIN_12 +233 0x0000 //RX_FDEQ_BIN_13 +234 0x0000 //RX_FDEQ_BIN_14 +235 0x0000 //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x4000 //RX_FDEQ_RESRV_0 +245 0x0320 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0030 //RX_FDDRC_BAND_MARGIN_1 +248 0x0050 //RX_FDDRC_BAND_MARGIN_2 +249 0x0080 //RX_FDDRC_BAND_MARGIN_3 +250 0x0007 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x5000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x6400 //RX_FDDRC_THRD_3_2 +258 0x6400 //RX_FDDRC_THRD_3_3 +259 0x2000 //RX_FDDRC_SLANT_0_0 +260 0x2000 //RX_FDDRC_SLANT_0_1 +261 0x2000 //RX_FDDRC_SLANT_0_2 +262 0x2000 //RX_FDDRC_SLANT_0_3 +263 0x5333 //RX_FDDRC_SLANT_1_0 +264 0x5333 //RX_FDDRC_SLANT_1_1 +265 0x5333 //RX_FDDRC_SLANT_1_2 +266 0x5333 //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +268 0x0000 //RX_FILTINDX +269 0x0000 //RX_TDDRC_THRD_0 +270 0x0000 //RX_TDDRC_THRD_1 +271 0x7FFF //RX_TDDRC_THRD_2 +272 0x7FFF //RX_TDDRC_THRD_3 +273 0x7FFF //RX_TDDRC_SLANT_0 +274 0x7EB8 //RX_TDDRC_SLANT_1 +275 0x3000 //RX_TDDRC_ALPHA_UP_0 +276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x199A //RX_TDDRC_HMNC_GAIN +279 0x0001 //RX_TDDRC_SMT_FLAG +280 0x0CCD //RX_TDDRC_SMT_W +281 0x017F //RX_TDDRC_DRC_GAIN +282 0x7C00 //RX_LAMBDA_PKA_FP +283 0x2000 //RX_TPKA_FP +284 0x2000 //RX_MIN_G_FP +285 0x0080 //RX_MAX_G_FP +286 0x0100 //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 +288 0x0000 //RX_MAXLEVEL_CNG +289 0x3000 //RX_BWE_UV_TH +290 0x3000 //RX_BWE_UV_TH2 +291 0x1800 //RX_BWE_UV_TH3 +292 0x1000 //RX_BWE_V_TH +293 0x04CD //RX_BWE_GAIN1_V_TH1 +294 0x0F33 //RX_BWE_GAIN1_V_TH2 +295 0x7333 //RX_BWE_UV_EQ +296 0x199A //RX_BWE_V_EQ +297 0x7333 //RX_BWE_TONE_TH +298 0x0004 //RX_BWE_UV_HOLD_T +299 0x6CCD //RX_BWE_GAIN2_ALPHA +300 0x799A //RX_BWE_GAIN3_ALPHA +301 0x001E //RX_BWE_CUTOFF +302 0x3000 //RX_BWE_GAINFILL +303 0x3200 //RX_BWE_MAXTH_TONE +304 0x2000 //RX_BWE_EQ_0 +305 0x2000 //RX_BWE_EQ_1 +306 0x2000 //RX_BWE_EQ_2 +307 0x2000 //RX_BWE_EQ_3 +308 0x2000 //RX_BWE_EQ_4 +309 0x2000 //RX_BWE_EQ_5 +310 0x2000 //RX_BWE_EQ_6 +311 0x0000 //RX_BWE_RESRV_0 +312 0x0000 //RX_BWE_RESRV_1 +313 0x0000 //RX_BWE_RESRV_2 +#VOL 0 +163 0x3000 //RX_TDDRC_ALPHA_UP_1 +164 0x3000 //RX_TDDRC_ALPHA_UP_2 +165 0x3000 //RX_TDDRC_ALPHA_UP_3 +166 0x3000 //RX_TDDRC_ALPHA_UP_4 +184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +190 0x7FFF //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +269 0x0000 //RX_TDDRC_THRD_0 +270 0x0000 //RX_TDDRC_THRD_1 +271 0x7FFF //RX_TDDRC_THRD_2 +272 0x7FFF //RX_TDDRC_THRD_3 +273 0x7FFF //RX_TDDRC_SLANT_0 +274 0x7EB8 //RX_TDDRC_SLANT_1 +275 0x3000 //RX_TDDRC_ALPHA_UP_0 +276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x199A //RX_TDDRC_HMNC_GAIN +279 0x0001 //RX_TDDRC_SMT_FLAG +280 0x0CCD //RX_TDDRC_SMT_W +281 0x017F //RX_TDDRC_DRC_GAIN +195 0x0014 //RX_FDEQ_SUBNUM +196 0x4848 //RX_FDEQ_GAIN_0 +197 0x4848 //RX_FDEQ_GAIN_1 +198 0x4848 //RX_FDEQ_GAIN_2 +199 0x4848 //RX_FDEQ_GAIN_3 +200 0x4848 //RX_FDEQ_GAIN_4 +201 0x4848 //RX_FDEQ_GAIN_5 +202 0x4444 //RX_FDEQ_GAIN_6 +203 0x4040 //RX_FDEQ_GAIN_7 +204 0x4040 //RX_FDEQ_GAIN_8 +205 0x4040 //RX_FDEQ_GAIN_9 +206 0x4848 //RX_FDEQ_GAIN_10 +207 0x4848 //RX_FDEQ_GAIN_11 +208 0x4848 //RX_FDEQ_GAIN_12 +209 0x4848 //RX_FDEQ_GAIN_13 +210 0x4848 //RX_FDEQ_GAIN_14 +211 0x4848 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0202 //RX_FDEQ_BIN_0 +221 0x0203 //RX_FDEQ_BIN_1 +222 0x0303 //RX_FDEQ_BIN_2 +223 0x0304 //RX_FDEQ_BIN_3 +224 0x0405 //RX_FDEQ_BIN_4 +225 0x0506 //RX_FDEQ_BIN_5 +226 0x0708 //RX_FDEQ_BIN_6 +227 0x090A //RX_FDEQ_BIN_7 +228 0x0B0C //RX_FDEQ_BIN_8 +229 0x0D0E //RX_FDEQ_BIN_9 +230 0x0000 //RX_FDEQ_BIN_10 +231 0x0000 //RX_FDEQ_BIN_11 +232 0x0000 //RX_FDEQ_BIN_12 +233 0x0000 //RX_FDEQ_BIN_13 +234 0x0000 //RX_FDEQ_BIN_14 +235 0x0000 //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x4000 //RX_FDEQ_RESRV_0 +245 0x0320 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0030 //RX_FDDRC_BAND_MARGIN_1 +248 0x0050 //RX_FDDRC_BAND_MARGIN_2 +249 0x0080 //RX_FDDRC_BAND_MARGIN_3 +250 0x0007 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x5000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x6400 //RX_FDDRC_THRD_3_2 +258 0x6400 //RX_FDDRC_THRD_3_3 +259 0x2000 //RX_FDDRC_SLANT_0_0 +260 0x2000 //RX_FDDRC_SLANT_0_1 +261 0x2000 //RX_FDDRC_SLANT_0_2 +262 0x2000 //RX_FDDRC_SLANT_0_3 +263 0x5333 //RX_FDDRC_SLANT_1_0 +264 0x5333 //RX_FDDRC_SLANT_1_1 +265 0x5333 //RX_FDDRC_SLANT_1_2 +266 0x5333 //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +286 0x0100 //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 +#VOL 1 +163 0x3000 //RX_TDDRC_ALPHA_UP_1 +164 0x3000 //RX_TDDRC_ALPHA_UP_2 +165 0x3000 //RX_TDDRC_ALPHA_UP_3 +166 0x3000 //RX_TDDRC_ALPHA_UP_4 +184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +190 0x7FFF //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +269 0x0000 //RX_TDDRC_THRD_0 +270 0x0000 //RX_TDDRC_THRD_1 +271 0x7FFF //RX_TDDRC_THRD_2 +272 0x7FFF //RX_TDDRC_THRD_3 +273 0x7FFF //RX_TDDRC_SLANT_0 +274 0x7EB8 //RX_TDDRC_SLANT_1 +275 0x3000 //RX_TDDRC_ALPHA_UP_0 +276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x199A //RX_TDDRC_HMNC_GAIN +279 0x0001 //RX_TDDRC_SMT_FLAG +280 0x0CCD //RX_TDDRC_SMT_W +281 0x017F //RX_TDDRC_DRC_GAIN +195 0x0014 //RX_FDEQ_SUBNUM +196 0x4848 //RX_FDEQ_GAIN_0 +197 0x4848 //RX_FDEQ_GAIN_1 +198 0x4848 //RX_FDEQ_GAIN_2 +199 0x4848 //RX_FDEQ_GAIN_3 +200 0x4848 //RX_FDEQ_GAIN_4 +201 0x4848 //RX_FDEQ_GAIN_5 +202 0x4444 //RX_FDEQ_GAIN_6 +203 0x4040 //RX_FDEQ_GAIN_7 +204 0x4040 //RX_FDEQ_GAIN_8 +205 0x4040 //RX_FDEQ_GAIN_9 +206 0x4848 //RX_FDEQ_GAIN_10 +207 0x4848 //RX_FDEQ_GAIN_11 +208 0x4848 //RX_FDEQ_GAIN_12 +209 0x4848 //RX_FDEQ_GAIN_13 +210 0x4848 //RX_FDEQ_GAIN_14 +211 0x4848 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0202 //RX_FDEQ_BIN_0 +221 0x0203 //RX_FDEQ_BIN_1 +222 0x0303 //RX_FDEQ_BIN_2 +223 0x0304 //RX_FDEQ_BIN_3 +224 0x0405 //RX_FDEQ_BIN_4 +225 0x0506 //RX_FDEQ_BIN_5 +226 0x0708 //RX_FDEQ_BIN_6 +227 0x090A //RX_FDEQ_BIN_7 +228 0x0B0C //RX_FDEQ_BIN_8 +229 0x0D0E //RX_FDEQ_BIN_9 +230 0x0000 //RX_FDEQ_BIN_10 +231 0x0000 //RX_FDEQ_BIN_11 +232 0x0000 //RX_FDEQ_BIN_12 +233 0x0000 //RX_FDEQ_BIN_13 +234 0x0000 //RX_FDEQ_BIN_14 +235 0x0000 //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x4000 //RX_FDEQ_RESRV_0 +245 0x0320 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0030 //RX_FDDRC_BAND_MARGIN_1 +248 0x0050 //RX_FDDRC_BAND_MARGIN_2 +249 0x0080 //RX_FDDRC_BAND_MARGIN_3 +250 0x0007 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x5000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x6400 //RX_FDDRC_THRD_3_2 +258 0x6400 //RX_FDDRC_THRD_3_3 +259 0x2000 //RX_FDDRC_SLANT_0_0 +260 0x2000 //RX_FDDRC_SLANT_0_1 +261 0x2000 //RX_FDDRC_SLANT_0_2 +262 0x2000 //RX_FDDRC_SLANT_0_3 +263 0x5333 //RX_FDDRC_SLANT_1_0 +264 0x5333 //RX_FDDRC_SLANT_1_1 +265 0x5333 //RX_FDDRC_SLANT_1_2 +266 0x5333 //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +286 0x0100 //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 +#VOL 2 +163 0x3000 //RX_TDDRC_ALPHA_UP_1 +164 0x3000 //RX_TDDRC_ALPHA_UP_2 +165 0x3000 //RX_TDDRC_ALPHA_UP_3 +166 0x3000 //RX_TDDRC_ALPHA_UP_4 +184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +190 0x7FFF //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +269 0x0000 //RX_TDDRC_THRD_0 +270 0x0000 //RX_TDDRC_THRD_1 +271 0x7FFF //RX_TDDRC_THRD_2 +272 0x7FFF //RX_TDDRC_THRD_3 +273 0x7FFF //RX_TDDRC_SLANT_0 +274 0x7EB8 //RX_TDDRC_SLANT_1 +275 0x3000 //RX_TDDRC_ALPHA_UP_0 +276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x199A //RX_TDDRC_HMNC_GAIN +279 0x0001 //RX_TDDRC_SMT_FLAG +280 0x0CCD //RX_TDDRC_SMT_W +281 0x017F //RX_TDDRC_DRC_GAIN +195 0x0014 //RX_FDEQ_SUBNUM +196 0x4848 //RX_FDEQ_GAIN_0 +197 0x4848 //RX_FDEQ_GAIN_1 +198 0x4848 //RX_FDEQ_GAIN_2 +199 0x4848 //RX_FDEQ_GAIN_3 +200 0x4848 //RX_FDEQ_GAIN_4 +201 0x4848 //RX_FDEQ_GAIN_5 +202 0x4444 //RX_FDEQ_GAIN_6 +203 0x4040 //RX_FDEQ_GAIN_7 +204 0x4040 //RX_FDEQ_GAIN_8 +205 0x4040 //RX_FDEQ_GAIN_9 +206 0x4848 //RX_FDEQ_GAIN_10 +207 0x4848 //RX_FDEQ_GAIN_11 +208 0x4848 //RX_FDEQ_GAIN_12 +209 0x4848 //RX_FDEQ_GAIN_13 +210 0x4848 //RX_FDEQ_GAIN_14 +211 0x4848 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0202 //RX_FDEQ_BIN_0 +221 0x0203 //RX_FDEQ_BIN_1 +222 0x0303 //RX_FDEQ_BIN_2 +223 0x0304 //RX_FDEQ_BIN_3 +224 0x0405 //RX_FDEQ_BIN_4 +225 0x0506 //RX_FDEQ_BIN_5 +226 0x0708 //RX_FDEQ_BIN_6 +227 0x090A //RX_FDEQ_BIN_7 +228 0x0B0C //RX_FDEQ_BIN_8 +229 0x0D0E //RX_FDEQ_BIN_9 +230 0x0000 //RX_FDEQ_BIN_10 +231 0x0000 //RX_FDEQ_BIN_11 +232 0x0000 //RX_FDEQ_BIN_12 +233 0x0000 //RX_FDEQ_BIN_13 +234 0x0000 //RX_FDEQ_BIN_14 +235 0x0000 //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x4000 //RX_FDEQ_RESRV_0 +245 0x0320 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0030 //RX_FDDRC_BAND_MARGIN_1 +248 0x0050 //RX_FDDRC_BAND_MARGIN_2 +249 0x0080 //RX_FDDRC_BAND_MARGIN_3 +250 0x0007 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x5000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x6400 //RX_FDDRC_THRD_3_2 +258 0x6400 //RX_FDDRC_THRD_3_3 +259 0x2000 //RX_FDDRC_SLANT_0_0 +260 0x2000 //RX_FDDRC_SLANT_0_1 +261 0x2000 //RX_FDDRC_SLANT_0_2 +262 0x2000 //RX_FDDRC_SLANT_0_3 +263 0x5333 //RX_FDDRC_SLANT_1_0 +264 0x5333 //RX_FDDRC_SLANT_1_1 +265 0x5333 //RX_FDDRC_SLANT_1_2 +266 0x5333 //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +286 0x0100 //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 +#VOL 3 +163 0x3000 //RX_TDDRC_ALPHA_UP_1 +164 0x3000 //RX_TDDRC_ALPHA_UP_2 +165 0x3000 //RX_TDDRC_ALPHA_UP_3 +166 0x3000 //RX_TDDRC_ALPHA_UP_4 +184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +190 0x7FFF //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +269 0x0000 //RX_TDDRC_THRD_0 +270 0x0000 //RX_TDDRC_THRD_1 +271 0x7FFF //RX_TDDRC_THRD_2 +272 0x7FFF //RX_TDDRC_THRD_3 +273 0x7FFF //RX_TDDRC_SLANT_0 +274 0x7EB8 //RX_TDDRC_SLANT_1 +275 0x3000 //RX_TDDRC_ALPHA_UP_0 +276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x199A //RX_TDDRC_HMNC_GAIN +279 0x0001 //RX_TDDRC_SMT_FLAG +280 0x0CCD //RX_TDDRC_SMT_W +281 0x017F //RX_TDDRC_DRC_GAIN +195 0x0014 //RX_FDEQ_SUBNUM +196 0x4848 //RX_FDEQ_GAIN_0 +197 0x4848 //RX_FDEQ_GAIN_1 +198 0x4848 //RX_FDEQ_GAIN_2 +199 0x4848 //RX_FDEQ_GAIN_3 +200 0x4848 //RX_FDEQ_GAIN_4 +201 0x4848 //RX_FDEQ_GAIN_5 +202 0x4444 //RX_FDEQ_GAIN_6 +203 0x4040 //RX_FDEQ_GAIN_7 +204 0x4040 //RX_FDEQ_GAIN_8 +205 0x4040 //RX_FDEQ_GAIN_9 +206 0x4848 //RX_FDEQ_GAIN_10 +207 0x4848 //RX_FDEQ_GAIN_11 +208 0x4848 //RX_FDEQ_GAIN_12 +209 0x4848 //RX_FDEQ_GAIN_13 +210 0x4848 //RX_FDEQ_GAIN_14 +211 0x4848 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0202 //RX_FDEQ_BIN_0 +221 0x0203 //RX_FDEQ_BIN_1 +222 0x0303 //RX_FDEQ_BIN_2 +223 0x0304 //RX_FDEQ_BIN_3 +224 0x0405 //RX_FDEQ_BIN_4 +225 0x0506 //RX_FDEQ_BIN_5 +226 0x0708 //RX_FDEQ_BIN_6 +227 0x090A //RX_FDEQ_BIN_7 +228 0x0B0C //RX_FDEQ_BIN_8 +229 0x0D0E //RX_FDEQ_BIN_9 +230 0x0000 //RX_FDEQ_BIN_10 +231 0x0000 //RX_FDEQ_BIN_11 +232 0x0000 //RX_FDEQ_BIN_12 +233 0x0000 //RX_FDEQ_BIN_13 +234 0x0000 //RX_FDEQ_BIN_14 +235 0x0000 //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x4000 //RX_FDEQ_RESRV_0 +245 0x0320 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0030 //RX_FDDRC_BAND_MARGIN_1 +248 0x0050 //RX_FDDRC_BAND_MARGIN_2 +249 0x0080 //RX_FDDRC_BAND_MARGIN_3 +250 0x0007 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x5000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x6400 //RX_FDDRC_THRD_3_2 +258 0x6400 //RX_FDDRC_THRD_3_3 +259 0x2000 //RX_FDDRC_SLANT_0_0 +260 0x2000 //RX_FDDRC_SLANT_0_1 +261 0x2000 //RX_FDDRC_SLANT_0_2 +262 0x2000 //RX_FDDRC_SLANT_0_3 +263 0x5333 //RX_FDDRC_SLANT_1_0 +264 0x5333 //RX_FDDRC_SLANT_1_1 +265 0x5333 //RX_FDDRC_SLANT_1_2 +266 0x5333 //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +286 0x0100 //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 +#VOL 4 +163 0x3000 //RX_TDDRC_ALPHA_UP_1 +164 0x3000 //RX_TDDRC_ALPHA_UP_2 +165 0x3000 //RX_TDDRC_ALPHA_UP_3 +166 0x3000 //RX_TDDRC_ALPHA_UP_4 +184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +190 0x7FFF //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +269 0x0000 //RX_TDDRC_THRD_0 +270 0x0000 //RX_TDDRC_THRD_1 +271 0x7FFF //RX_TDDRC_THRD_2 +272 0x7FFF //RX_TDDRC_THRD_3 +273 0x7FFF //RX_TDDRC_SLANT_0 +274 0x7EB8 //RX_TDDRC_SLANT_1 +275 0x3000 //RX_TDDRC_ALPHA_UP_0 +276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x199A //RX_TDDRC_HMNC_GAIN +279 0x0001 //RX_TDDRC_SMT_FLAG +280 0x0CCD //RX_TDDRC_SMT_W +281 0x017F //RX_TDDRC_DRC_GAIN +195 0x0014 //RX_FDEQ_SUBNUM +196 0x4848 //RX_FDEQ_GAIN_0 +197 0x4848 //RX_FDEQ_GAIN_1 +198 0x4848 //RX_FDEQ_GAIN_2 +199 0x4848 //RX_FDEQ_GAIN_3 +200 0x4848 //RX_FDEQ_GAIN_4 +201 0x4848 //RX_FDEQ_GAIN_5 +202 0x4444 //RX_FDEQ_GAIN_6 +203 0x4040 //RX_FDEQ_GAIN_7 +204 0x4040 //RX_FDEQ_GAIN_8 +205 0x4040 //RX_FDEQ_GAIN_9 +206 0x4848 //RX_FDEQ_GAIN_10 +207 0x4848 //RX_FDEQ_GAIN_11 +208 0x4848 //RX_FDEQ_GAIN_12 +209 0x4848 //RX_FDEQ_GAIN_13 +210 0x4848 //RX_FDEQ_GAIN_14 +211 0x4848 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0202 //RX_FDEQ_BIN_0 +221 0x0203 //RX_FDEQ_BIN_1 +222 0x0303 //RX_FDEQ_BIN_2 +223 0x0304 //RX_FDEQ_BIN_3 +224 0x0405 //RX_FDEQ_BIN_4 +225 0x0506 //RX_FDEQ_BIN_5 +226 0x0708 //RX_FDEQ_BIN_6 +227 0x090A //RX_FDEQ_BIN_7 +228 0x0B0C //RX_FDEQ_BIN_8 +229 0x0D0E //RX_FDEQ_BIN_9 +230 0x0000 //RX_FDEQ_BIN_10 +231 0x0000 //RX_FDEQ_BIN_11 +232 0x0000 //RX_FDEQ_BIN_12 +233 0x0000 //RX_FDEQ_BIN_13 +234 0x0000 //RX_FDEQ_BIN_14 +235 0x0000 //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x4000 //RX_FDEQ_RESRV_0 +245 0x0320 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0030 //RX_FDDRC_BAND_MARGIN_1 +248 0x0050 //RX_FDDRC_BAND_MARGIN_2 +249 0x0080 //RX_FDDRC_BAND_MARGIN_3 +250 0x0007 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x5000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x6400 //RX_FDDRC_THRD_3_2 +258 0x6400 //RX_FDDRC_THRD_3_3 +259 0x2000 //RX_FDDRC_SLANT_0_0 +260 0x2000 //RX_FDDRC_SLANT_0_1 +261 0x2000 //RX_FDDRC_SLANT_0_2 +262 0x2000 //RX_FDDRC_SLANT_0_3 +263 0x5333 //RX_FDDRC_SLANT_1_0 +264 0x5333 //RX_FDDRC_SLANT_1_1 +265 0x5333 //RX_FDDRC_SLANT_1_2 +266 0x5333 //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +286 0x0100 //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 +#VOL 5 +163 0x3000 //RX_TDDRC_ALPHA_UP_1 +164 0x3000 //RX_TDDRC_ALPHA_UP_2 +165 0x3000 //RX_TDDRC_ALPHA_UP_3 +166 0x3000 //RX_TDDRC_ALPHA_UP_4 +184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +190 0x7FFF //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +269 0x0000 //RX_TDDRC_THRD_0 +270 0x0000 //RX_TDDRC_THRD_1 +271 0x7FFF //RX_TDDRC_THRD_2 +272 0x7FFF //RX_TDDRC_THRD_3 +273 0x7FFF //RX_TDDRC_SLANT_0 +274 0x7EB8 //RX_TDDRC_SLANT_1 +275 0x3000 //RX_TDDRC_ALPHA_UP_0 +276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x199A //RX_TDDRC_HMNC_GAIN +279 0x0001 //RX_TDDRC_SMT_FLAG +280 0x0CCD //RX_TDDRC_SMT_W +281 0x017F //RX_TDDRC_DRC_GAIN +195 0x0014 //RX_FDEQ_SUBNUM +196 0x4848 //RX_FDEQ_GAIN_0 +197 0x4848 //RX_FDEQ_GAIN_1 +198 0x4848 //RX_FDEQ_GAIN_2 +199 0x4848 //RX_FDEQ_GAIN_3 +200 0x4848 //RX_FDEQ_GAIN_4 +201 0x4848 //RX_FDEQ_GAIN_5 +202 0x4444 //RX_FDEQ_GAIN_6 +203 0x4040 //RX_FDEQ_GAIN_7 +204 0x4040 //RX_FDEQ_GAIN_8 +205 0x4040 //RX_FDEQ_GAIN_9 +206 0x4848 //RX_FDEQ_GAIN_10 +207 0x4848 //RX_FDEQ_GAIN_11 +208 0x4848 //RX_FDEQ_GAIN_12 +209 0x4848 //RX_FDEQ_GAIN_13 +210 0x4848 //RX_FDEQ_GAIN_14 +211 0x4848 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0202 //RX_FDEQ_BIN_0 +221 0x0203 //RX_FDEQ_BIN_1 +222 0x0303 //RX_FDEQ_BIN_2 +223 0x0304 //RX_FDEQ_BIN_3 +224 0x0405 //RX_FDEQ_BIN_4 +225 0x0506 //RX_FDEQ_BIN_5 +226 0x0708 //RX_FDEQ_BIN_6 +227 0x090A //RX_FDEQ_BIN_7 +228 0x0B0C //RX_FDEQ_BIN_8 +229 0x0D0E //RX_FDEQ_BIN_9 +230 0x0000 //RX_FDEQ_BIN_10 +231 0x0000 //RX_FDEQ_BIN_11 +232 0x0000 //RX_FDEQ_BIN_12 +233 0x0000 //RX_FDEQ_BIN_13 +234 0x0000 //RX_FDEQ_BIN_14 +235 0x0000 //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x4000 //RX_FDEQ_RESRV_0 +245 0x0320 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0030 //RX_FDDRC_BAND_MARGIN_1 +248 0x0050 //RX_FDDRC_BAND_MARGIN_2 +249 0x0080 //RX_FDDRC_BAND_MARGIN_3 +250 0x0007 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x5000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x6400 //RX_FDDRC_THRD_3_2 +258 0x6400 //RX_FDDRC_THRD_3_3 +259 0x2000 //RX_FDDRC_SLANT_0_0 +260 0x2000 //RX_FDDRC_SLANT_0_1 +261 0x2000 //RX_FDDRC_SLANT_0_2 +262 0x2000 //RX_FDDRC_SLANT_0_3 +263 0x5333 //RX_FDDRC_SLANT_1_0 +264 0x5333 //RX_FDDRC_SLANT_1_1 +265 0x5333 //RX_FDDRC_SLANT_1_2 +266 0x5333 //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +286 0x0100 //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 +#VOL 6 +163 0x3000 //RX_TDDRC_ALPHA_UP_1 +164 0x3000 //RX_TDDRC_ALPHA_UP_2 +165 0x3000 //RX_TDDRC_ALPHA_UP_3 +166 0x3000 //RX_TDDRC_ALPHA_UP_4 +184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +190 0x7FFF //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +269 0x0000 //RX_TDDRC_THRD_0 +270 0x0000 //RX_TDDRC_THRD_1 +271 0x7FFF //RX_TDDRC_THRD_2 +272 0x7FFF //RX_TDDRC_THRD_3 +273 0x7FFF //RX_TDDRC_SLANT_0 +274 0x7EB8 //RX_TDDRC_SLANT_1 +275 0x3000 //RX_TDDRC_ALPHA_UP_0 +276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x199A //RX_TDDRC_HMNC_GAIN +279 0x0001 //RX_TDDRC_SMT_FLAG +280 0x0CCD //RX_TDDRC_SMT_W +281 0x017F //RX_TDDRC_DRC_GAIN +195 0x0014 //RX_FDEQ_SUBNUM +196 0x4848 //RX_FDEQ_GAIN_0 +197 0x4848 //RX_FDEQ_GAIN_1 +198 0x4848 //RX_FDEQ_GAIN_2 +199 0x4848 //RX_FDEQ_GAIN_3 +200 0x4848 //RX_FDEQ_GAIN_4 +201 0x4848 //RX_FDEQ_GAIN_5 +202 0x4444 //RX_FDEQ_GAIN_6 +203 0x4040 //RX_FDEQ_GAIN_7 +204 0x4040 //RX_FDEQ_GAIN_8 +205 0x4040 //RX_FDEQ_GAIN_9 +206 0x4848 //RX_FDEQ_GAIN_10 +207 0x4848 //RX_FDEQ_GAIN_11 +208 0x4848 //RX_FDEQ_GAIN_12 +209 0x4848 //RX_FDEQ_GAIN_13 +210 0x4848 //RX_FDEQ_GAIN_14 +211 0x4848 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0202 //RX_FDEQ_BIN_0 +221 0x0203 //RX_FDEQ_BIN_1 +222 0x0303 //RX_FDEQ_BIN_2 +223 0x0304 //RX_FDEQ_BIN_3 +224 0x0405 //RX_FDEQ_BIN_4 +225 0x0506 //RX_FDEQ_BIN_5 +226 0x0708 //RX_FDEQ_BIN_6 +227 0x090A //RX_FDEQ_BIN_7 +228 0x0B0C //RX_FDEQ_BIN_8 +229 0x0D0E //RX_FDEQ_BIN_9 +230 0x0000 //RX_FDEQ_BIN_10 +231 0x0000 //RX_FDEQ_BIN_11 +232 0x0000 //RX_FDEQ_BIN_12 +233 0x0000 //RX_FDEQ_BIN_13 +234 0x0000 //RX_FDEQ_BIN_14 +235 0x0000 //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x4000 //RX_FDEQ_RESRV_0 +245 0x0320 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0030 //RX_FDDRC_BAND_MARGIN_1 +248 0x0050 //RX_FDDRC_BAND_MARGIN_2 +249 0x0080 //RX_FDDRC_BAND_MARGIN_3 +250 0x0007 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x5000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x6400 //RX_FDDRC_THRD_3_2 +258 0x6400 //RX_FDDRC_THRD_3_3 +259 0x2000 //RX_FDDRC_SLANT_0_0 +260 0x2000 //RX_FDDRC_SLANT_0_1 +261 0x2000 //RX_FDDRC_SLANT_0_2 +262 0x2000 //RX_FDDRC_SLANT_0_3 +263 0x5333 //RX_FDDRC_SLANT_1_0 +264 0x5333 //RX_FDDRC_SLANT_1_1 +265 0x5333 //RX_FDDRC_SLANT_1_2 +266 0x5333 //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +286 0x0100 //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 #CASE_NAME BLUETOOTH-BTNB_NREC-VOICE_GENERIC-WB -#PARAM_TYPE TX+RX -#TOTAL_CUSTOM_STEP 7 +#PARAM_MODE Full +#PARAM_TYPE TX+2RX +#TOTAL_CUSTOM_STEP 7+7 #TX 0 0x0008 //TX_OPERATION_MODE_0 1 0x0008 //TX_OPERATION_MODE_1 @@ -17788,20 +26959,20 @@ 248 0xF400 //TX_THR_SN_EST_6 249 0xF600 //TX_THR_SN_EST_7 250 0x0000 //TX_DELTA_THR_SN_EST_0 -251 0x0000 //TX_DELTA_THR_SN_EST_1 +251 0x0200 //TX_DELTA_THR_SN_EST_1 252 0x0200 //TX_DELTA_THR_SN_EST_2 253 0x0200 //TX_DELTA_THR_SN_EST_3 254 0x0200 //TX_DELTA_THR_SN_EST_4 255 0x0200 //TX_DELTA_THR_SN_EST_5 -256 0x0200 //TX_DELTA_THR_SN_EST_6 +256 0x0000 //TX_DELTA_THR_SN_EST_6 257 0x0200 //TX_DELTA_THR_SN_EST_7 258 0x6000 //TX_LAMBDA_NN_EST_0 -259 0x6000 //TX_LAMBDA_NN_EST_1 +259 0x4000 //TX_LAMBDA_NN_EST_1 260 0x4000 //TX_LAMBDA_NN_EST_2 261 0x4000 //TX_LAMBDA_NN_EST_3 262 0x4000 //TX_LAMBDA_NN_EST_4 263 0x4000 //TX_LAMBDA_NN_EST_5 -264 0x4000 //TX_LAMBDA_NN_EST_6 +264 0x6000 //TX_LAMBDA_NN_EST_6 265 0x4000 //TX_LAMBDA_NN_EST_7 266 0x0400 //TX_N_SN_EST 267 0x001E //TX_INBEAM_T @@ -17819,16 +26990,16 @@ 279 0x1000 //TX_B_POST_FLT_0 280 0x1000 //TX_B_POST_FLT_1 281 0x000F //TX_NS_LVL_CTRL_0 -282 0x000F //TX_NS_LVL_CTRL_1 -283 0x0011 //TX_NS_LVL_CTRL_2 +282 0x0011 //TX_NS_LVL_CTRL_1 +283 0x000F //TX_NS_LVL_CTRL_2 284 0x000F //TX_NS_LVL_CTRL_3 285 0x000F //TX_NS_LVL_CTRL_4 286 0x000F //TX_NS_LVL_CTRL_5 287 0x000F //TX_NS_LVL_CTRL_6 288 0x0011 //TX_NS_LVL_CTRL_7 289 0x000C //TX_MIN_GAIN_S_0 -290 0x000C //TX_MIN_GAIN_S_1 -291 0x000F //TX_MIN_GAIN_S_2 +290 0x000F //TX_MIN_GAIN_S_1 +291 0x000C //TX_MIN_GAIN_S_2 292 0x000C //TX_MIN_GAIN_S_3 293 0x000C //TX_MIN_GAIN_S_4 294 0x000C //TX_MIN_GAIN_S_5 @@ -17852,12 +27023,12 @@ 312 0x7FFF //TX_A_POST_FILT_0 313 0x2000 //TX_A_POST_FILT_1 314 0x4000 //TX_A_POST_FILT_S_0 -315 0x4000 //TX_A_POST_FILT_S_1 +315 0x5000 //TX_A_POST_FILT_S_1 316 0x5000 //TX_A_POST_FILT_S_2 317 0x5000 //TX_A_POST_FILT_S_3 318 0x5000 //TX_A_POST_FILT_S_4 319 0x5000 //TX_A_POST_FILT_S_5 -320 0x5000 //TX_A_POST_FILT_S_6 +320 0x4000 //TX_A_POST_FILT_S_6 321 0x5000 //TX_A_POST_FILT_S_7 322 0x1000 //TX_B_POST_FILT_0 323 0x1000 //TX_B_POST_FILT_1 @@ -17917,10 +27088,10 @@ 377 0x7FFF //TX_NOISE_TH_5_4 378 0x044C //TX_NOISE_TH_6 379 0x0014 //TX_MINENOISE_TH -380 0x4000 //TX_MINENOISE_MIC0_TH_MTS -381 0xFFEE //TX_MINENOISE_MIC0_TH_EXP -382 0x6000 //TX_MINENOISE_MIC0_S_TH_MTS -383 0xFFF3 //TX_MINENOISE_MIC0_S_TH_EXP +380 0x4000 //TX_MORENS_TFMASK_TH +381 0xFFEE //TX_DRC_QUIET_FLOOR +382 0x6000 //TX_RATIODTL_CUT_TH +383 0xFFF3 //TX_DT_CUT_K1 384 0x0666 //TX_OUT_ENER_S_TH_CLEAN 385 0x0666 //TX_OUT_ENER_S_TH_LESSCLEAN 386 0x0333 //TX_OUT_ENER_S_TH_NOISY @@ -17928,15 +27099,15 @@ 388 0x0333 //TX_OUT_ENER_TH_SPEECH 389 0x2000 //TX_SN_NPB_GAIN 390 0x0000 //TX_NN_NPB_GAIN -391 0x0000 //TX_CSX_ALPHA_0 -392 0x0000 //TX_CSX_ALPHA_1 -393 0x0000 //TX_CSX_ALPHA_2 -394 0x0000 //TX_CSX_ALPHA_3 -395 0x0800 //TX_MU_ARSP_EST -396 0x00C8 //TX_P_OUTBEAM_MIN_TH +391 0x0000 //TX_POST_MASK_SUP_HSNE +392 0x0000 //TX_TAIL_DET_TH +393 0x0000 //TX_B_LESSCUT_RTO_WTA +394 0x0000 //TX_MEL_G_R +395 0x0800 //TX_SUPHIGH_TH +396 0x00C8 //TX_MASK_G_R 397 0x0002 //TX_EXTRA_NS_L -398 0x0800 //TX_EXTRA_NS_A -399 0x0005 //TX_VR_NOISE_FLOOR_TH +398 0x0800 //TX_C_POST_FLT_MASK +399 0x0005 //TX_A_POST_FLT_WNS 400 0x0148 //TX_MIN_G_LOW300HZ 401 0x0002 //TX_MAXLEVEL_CNG 402 0x00B4 //TX_STN_NOISE_TH @@ -18051,16 +27222,16 @@ 511 0x6666 //TX_MIC_TO_BFGAIN 512 0x0000 //TX_MICTOBFGAIN0 513 0x0000 //TX_FASTMUE_TH -514 0x0000 //TX_DERVB_LEN_0 -515 0x0000 //TX_DERVB_LEN_1 -516 0x0000 //TX_RHO_DERVB -517 0x0000 //TX_MIC_INDX_DERVB -518 0x0000 //TX_MU_DERVB -519 0x0000 //TX_DR_RESRV_0 -520 0x0000 //TX_DR_RESRV_1 -521 0x0000 //TX_DR_RESRV_2 -522 0x0000 //TX_DR_RESRV_3 -523 0x0000 //TX_DR_RESRV_4 +514 0x0000 //TX_DEREVERB_LF_MU +515 0x0000 //TX_DEREVERB_HF_MU +516 0x0000 //TX_DEREVERB_DELAY +517 0x0000 //TX_DEREVERB_COEF_LEN +518 0x0000 //TX_DEREVERB_DNR +519 0x0000 //TX_DEREVERB_ALPHA +520 0x0000 //TX_DEREVERB_BETA +521 0x0000 //TX_GSC_RTOL_TH +522 0x0000 //TX_GSC_RTOH_TH +523 0x0000 //TX_WIDE2_MEANHTH 524 0x0000 //TX_DR_RESRV_5 525 0x0000 //TX_DR_RESRV_6 526 0x0000 //TX_DR_RESRV_7 @@ -18434,8 +27605,73 @@ 894 0xC000 //TX_FASTNS_SSA_THHFL 895 0xCCCC //TX_FASTNS_SSA_THLFH 896 0xD999 //TX_FASTNS_SSA_THHFH +897 0x0000 //TX_SENDFUNC_REG_MICMUTE +898 0x0000 //TX_SENDFUNC_REG_MICMUTE1 +899 0x0000 //TX_MICMUTE_RATIO_THR +900 0x0000 //TX_MICMUTE_AMP_THR +901 0x0000 //TX_MICMUTE_HPF_IND +902 0x0000 //TX_MICMUTE_LOG_EYR_TH +903 0x0000 //TX_MICMUTE_CVG_TIME +904 0x0000 //TX_MICMUTE_RELEASE_TIME +905 0x0000 //TX_MIC_VOLUME_MIC0MUTE +906 0x0000 //TX_MICMUTE_EPD_OFFSET_0 +907 0x0000 //TX_MICMUTE_FRQ_AEC_L +908 0x0000 //TX_MICMUTE_EAD_THR +909 0x0000 //TX_MICMUTE_LAMBDA_CB_NLE +910 0x0000 //TX_MICMUTE_LAMBDA_RE_EST +911 0x0000 //TX_DTD_THR1_MICMUTE_0 +912 0x0000 //TX_DTD_THR1_MICMUTE_1 +913 0x0000 //TX_DTD_THR1_MICMUTE_2 +914 0x0000 //TX_DTD_THR1_MICMUTE_3 +915 0x0000 //TX_DTD_THR2_MICMUTE_0 +916 0x0000 //TX_MICMUTE_MIN_EQ_RE_EST_0 +917 0x0000 //TX_MICMUTE_MIN_EQ_RE_EST_1 +918 0x0000 //TX_MICMUTE_MIN_EQ_RE_EST_2 +919 0x0000 //TX_MICMUTE_MIN_EQ_RE_EST_3 +920 0x0000 //TX_MICMUTE_MIN_EQ_RE_EST_4 +921 0x0000 //TX_MICMUTE_C_POST_FLT +922 0x0000 //TX_MICMUTE_DT_CUT_K +923 0x0000 //TX_MICMUTE_DT_CUT_THR +924 0x0000 //TX_MICMUTE_DT_CUT_K2 +925 0x0000 //TX_MICMUTE_DT_CUT_THR2 +926 0x0000 //TX_MICMUTE_DT2_HOLD_N +927 0x0000 //TX_MICMUTE_RATIODTH_THCUT +928 0x0000 //TX_MICMUTE_B_POST_FLT_ECHOL +929 0x0000 //TX_MICMUTE_B_POST_FLT_ECHOH +930 0x0000 //TX_MICMUTE_C_POST_FLT_MASK +931 0x0000 //TX_MICMUTE_RATIODTL_CUT_TH +932 0x0000 //TX_MICMUTE_DT_CUT_K1 +933 0x0000 //TX_MICMUTE_N2_SN_EST +934 0x0000 //TX_MICMUTE_THR_SN_EST_0 +935 0x0000 //TX_MICMUTE_MIN_G_CTRL_0 +936 0x0000 //TX_MICMUTE_A_POST_FILT_S_0 +937 0x0000 //TX_MICMUTE_B_POST_FILT_0 +938 0x0000 //TX_MIC1RUB_AMP_THR +939 0x0000 //TX_MIC1MUTE_RATIO_THR +940 0x0000 //TX_MIC1MUTE_AMP_THR +941 0x0000 //TX_MIC1MUTE_CVG_TIME +942 0x0000 //TX_MIC1MUTE_RELEASE_TIME +943 0x0000 //TX_AMS_RESRV_01 +944 0x0000 //TX_AMS_RESRV_02 +945 0x0000 //TX_AMS_RESRV_03 +946 0x0000 //TX_AMS_RESRV_04 +947 0x0000 //TX_AMS_RESRV_05 +948 0x0000 //TX_AMS_RESRV_06 +949 0x0000 //TX_AMS_RESRV_07 +950 0x0000 //TX_AMS_RESRV_08 +951 0x0000 //TX_AMS_RESRV_09 +952 0x0000 //TX_AMS_RESRV_10 +953 0x0000 //TX_AMS_RESRV_11 +954 0x0000 //TX_AMS_RESRV_12 +955 0x0000 //TX_AMS_RESRV_13 +956 0x0000 //TX_AMS_RESRV_14 +957 0x0000 //TX_AMS_RESRV_15 +958 0x0000 //TX_AMS_RESRV_16 +959 0x0000 //TX_AMS_RESRV_17 +960 0x0000 //TX_AMS_RESRV_18 +961 0x0000 //TX_AMS_RESRV_19 #RX -0 0x006C //RX_RECVFUNC_MODE_0 +0 0x206C //RX_RECVFUNC_MODE_0 1 0x0000 //RX_RECVFUNC_MODE_1 2 0x0001 //RX_SAMPLINGFREQ_SIG 3 0x0001 //RX_SAMPLINGFREQ_PROC @@ -19285,10 +28521,862 @@ 110 0x0000 //RX_FDDRC_RESRV_0 129 0x0100 //RX_SPK_VOL 130 0x0000 //RX_VOL_RESRV_0 +#RX 2 +157 0x206C //RX_RECVFUNC_MODE_0 +158 0x0000 //RX_RECVFUNC_MODE_1 +159 0x0001 //RX_SAMPLINGFREQ_SIG +160 0x0001 //RX_SAMPLINGFREQ_PROC +161 0x000A //RX_FRAME_SZ +162 0x0000 //RX_DELAY_OPT +163 0x1000 //RX_TDDRC_ALPHA_UP_1 +164 0x1000 //RX_TDDRC_ALPHA_UP_2 +165 0x1000 //RX_TDDRC_ALPHA_UP_3 +166 0x1000 //RX_TDDRC_ALPHA_UP_4 +167 0x0800 //RX_PGA +168 0x7FFF //RX_A_HP +169 0x4000 //RX_B_PE +170 0x3800 //RX_THR_PITCH_DET_0 +171 0x3000 //RX_THR_PITCH_DET_1 +172 0x2800 //RX_THR_PITCH_DET_2 +173 0x0008 //RX_PITCH_BFR_LEN +174 0x0003 //RX_SBD_PITCH_DET +175 0x0100 //RX_PP_RESRV_0 +176 0x0020 //RX_PP_RESRV_1 +177 0x0600 //RX_N_SN_EST +178 0x000C //RX_N2_SN_EST +179 0x0010 //RX_NS_LVL_CTRL +180 0xF800 //RX_THR_SN_EST +181 0x7CCD //RX_LAMBDA_PFILT +182 0x000A //RX_FENS_RESRV_0 +183 0x0190 //RX_FENS_RESRV_1 +184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +187 0x0002 //RX_EXTRA_NS_L +188 0x0800 //RX_EXTRA_NS_A +189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +190 0x7FFF //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +192 0x199A //RX_A_POST_FLT +193 0x0000 //RX_LMT_THRD +194 0x4000 //RX_LMT_ALPHA +195 0x001C //RX_FDEQ_SUBNUM +196 0x4848 //RX_FDEQ_GAIN_0 +197 0x4848 //RX_FDEQ_GAIN_1 +198 0x4848 //RX_FDEQ_GAIN_2 +199 0x4848 //RX_FDEQ_GAIN_3 +200 0x4848 //RX_FDEQ_GAIN_4 +201 0x4848 //RX_FDEQ_GAIN_5 +202 0x4848 //RX_FDEQ_GAIN_6 +203 0x4848 //RX_FDEQ_GAIN_7 +204 0x4848 //RX_FDEQ_GAIN_8 +205 0x3C3C //RX_FDEQ_GAIN_9 +206 0x3C3C //RX_FDEQ_GAIN_10 +207 0x3838 //RX_FDEQ_GAIN_11 +208 0x3838 //RX_FDEQ_GAIN_12 +209 0x3030 //RX_FDEQ_GAIN_13 +210 0x4848 //RX_FDEQ_GAIN_14 +211 0x4848 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0202 //RX_FDEQ_BIN_0 +221 0x0203 //RX_FDEQ_BIN_1 +222 0x0303 //RX_FDEQ_BIN_2 +223 0x0304 //RX_FDEQ_BIN_3 +224 0x0405 //RX_FDEQ_BIN_4 +225 0x0506 //RX_FDEQ_BIN_5 +226 0x0708 //RX_FDEQ_BIN_6 +227 0x090A //RX_FDEQ_BIN_7 +228 0x0B0C //RX_FDEQ_BIN_8 +229 0x0D0E //RX_FDEQ_BIN_9 +230 0x0E0F //RX_FDEQ_BIN_10 +231 0x0F10 //RX_FDEQ_BIN_11 +232 0x1011 //RX_FDEQ_BIN_12 +233 0x1112 //RX_FDEQ_BIN_13 +234 0x0000 //RX_FDEQ_BIN_14 +235 0x0000 //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x4000 //RX_FDEQ_RESRV_0 +245 0x0320 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0030 //RX_FDDRC_BAND_MARGIN_1 +248 0x0050 //RX_FDDRC_BAND_MARGIN_2 +249 0x0080 //RX_FDDRC_BAND_MARGIN_3 +250 0x0007 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x5000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x6400 //RX_FDDRC_THRD_3_2 +258 0x6400 //RX_FDDRC_THRD_3_3 +259 0x2000 //RX_FDDRC_SLANT_0_0 +260 0x2000 //RX_FDDRC_SLANT_0_1 +261 0x2000 //RX_FDDRC_SLANT_0_2 +262 0x2000 //RX_FDDRC_SLANT_0_3 +263 0x5333 //RX_FDDRC_SLANT_1_0 +264 0x5333 //RX_FDDRC_SLANT_1_1 +265 0x5333 //RX_FDDRC_SLANT_1_2 +266 0x5333 //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +268 0x0000 //RX_FILTINDX +269 0x0000 //RX_TDDRC_THRD_0 +270 0x0000 //RX_TDDRC_THRD_1 +271 0x7FFF //RX_TDDRC_THRD_2 +272 0x7FFF //RX_TDDRC_THRD_3 +273 0x7E70 //RX_TDDRC_SLANT_0 +274 0x7FFF //RX_TDDRC_SLANT_1 +275 0x1000 //RX_TDDRC_ALPHA_UP_0 +276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x199A //RX_TDDRC_HMNC_GAIN +279 0x0001 //RX_TDDRC_SMT_FLAG +280 0x0CCD //RX_TDDRC_SMT_W +281 0x0155 //RX_TDDRC_DRC_GAIN +282 0x7C00 //RX_LAMBDA_PKA_FP +283 0x2000 //RX_TPKA_FP +284 0x2000 //RX_MIN_G_FP +285 0x0080 //RX_MAX_G_FP +286 0x0100 //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 +288 0x0000 //RX_MAXLEVEL_CNG +289 0x3000 //RX_BWE_UV_TH +290 0x3000 //RX_BWE_UV_TH2 +291 0x1800 //RX_BWE_UV_TH3 +292 0x1000 //RX_BWE_V_TH +293 0x04CD //RX_BWE_GAIN1_V_TH1 +294 0x0F33 //RX_BWE_GAIN1_V_TH2 +295 0x7333 //RX_BWE_UV_EQ +296 0x199A //RX_BWE_V_EQ +297 0x7333 //RX_BWE_TONE_TH +298 0x0004 //RX_BWE_UV_HOLD_T +299 0x6CCD //RX_BWE_GAIN2_ALPHA +300 0x799A //RX_BWE_GAIN3_ALPHA +301 0x001E //RX_BWE_CUTOFF +302 0x3000 //RX_BWE_GAINFILL +303 0x3200 //RX_BWE_MAXTH_TONE +304 0x2000 //RX_BWE_EQ_0 +305 0x2000 //RX_BWE_EQ_1 +306 0x2000 //RX_BWE_EQ_2 +307 0x2000 //RX_BWE_EQ_3 +308 0x2000 //RX_BWE_EQ_4 +309 0x2000 //RX_BWE_EQ_5 +310 0x2000 //RX_BWE_EQ_6 +311 0x0000 //RX_BWE_RESRV_0 +312 0x0000 //RX_BWE_RESRV_1 +313 0x0000 //RX_BWE_RESRV_2 +#VOL 0 +163 0x1000 //RX_TDDRC_ALPHA_UP_1 +164 0x1000 //RX_TDDRC_ALPHA_UP_2 +165 0x1000 //RX_TDDRC_ALPHA_UP_3 +166 0x1000 //RX_TDDRC_ALPHA_UP_4 +184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +190 0x7FFF //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +269 0x0000 //RX_TDDRC_THRD_0 +270 0x0000 //RX_TDDRC_THRD_1 +271 0x7FFF //RX_TDDRC_THRD_2 +272 0x7FFF //RX_TDDRC_THRD_3 +273 0x7E70 //RX_TDDRC_SLANT_0 +274 0x7FFF //RX_TDDRC_SLANT_1 +275 0x1000 //RX_TDDRC_ALPHA_UP_0 +276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x199A //RX_TDDRC_HMNC_GAIN +279 0x0001 //RX_TDDRC_SMT_FLAG +280 0x0CCD //RX_TDDRC_SMT_W +281 0x0155 //RX_TDDRC_DRC_GAIN +195 0x001C //RX_FDEQ_SUBNUM +196 0x4848 //RX_FDEQ_GAIN_0 +197 0x4848 //RX_FDEQ_GAIN_1 +198 0x4848 //RX_FDEQ_GAIN_2 +199 0x4848 //RX_FDEQ_GAIN_3 +200 0x4848 //RX_FDEQ_GAIN_4 +201 0x4848 //RX_FDEQ_GAIN_5 +202 0x4848 //RX_FDEQ_GAIN_6 +203 0x4848 //RX_FDEQ_GAIN_7 +204 0x4848 //RX_FDEQ_GAIN_8 +205 0x3C3C //RX_FDEQ_GAIN_9 +206 0x3C3C //RX_FDEQ_GAIN_10 +207 0x3838 //RX_FDEQ_GAIN_11 +208 0x3838 //RX_FDEQ_GAIN_12 +209 0x3030 //RX_FDEQ_GAIN_13 +210 0x4848 //RX_FDEQ_GAIN_14 +211 0x4848 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0202 //RX_FDEQ_BIN_0 +221 0x0203 //RX_FDEQ_BIN_1 +222 0x0303 //RX_FDEQ_BIN_2 +223 0x0304 //RX_FDEQ_BIN_3 +224 0x0405 //RX_FDEQ_BIN_4 +225 0x0506 //RX_FDEQ_BIN_5 +226 0x0708 //RX_FDEQ_BIN_6 +227 0x090A //RX_FDEQ_BIN_7 +228 0x0B0C //RX_FDEQ_BIN_8 +229 0x0D0E //RX_FDEQ_BIN_9 +230 0x0E0F //RX_FDEQ_BIN_10 +231 0x0F10 //RX_FDEQ_BIN_11 +232 0x1011 //RX_FDEQ_BIN_12 +233 0x1112 //RX_FDEQ_BIN_13 +234 0x0000 //RX_FDEQ_BIN_14 +235 0x0000 //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x4000 //RX_FDEQ_RESRV_0 +245 0x0320 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0030 //RX_FDDRC_BAND_MARGIN_1 +248 0x0050 //RX_FDDRC_BAND_MARGIN_2 +249 0x0080 //RX_FDDRC_BAND_MARGIN_3 +250 0x0007 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x5000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x6400 //RX_FDDRC_THRD_3_2 +258 0x6400 //RX_FDDRC_THRD_3_3 +259 0x2000 //RX_FDDRC_SLANT_0_0 +260 0x2000 //RX_FDDRC_SLANT_0_1 +261 0x2000 //RX_FDDRC_SLANT_0_2 +262 0x2000 //RX_FDDRC_SLANT_0_3 +263 0x5333 //RX_FDDRC_SLANT_1_0 +264 0x5333 //RX_FDDRC_SLANT_1_1 +265 0x5333 //RX_FDDRC_SLANT_1_2 +266 0x5333 //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +286 0x0100 //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 +#VOL 1 +163 0x1000 //RX_TDDRC_ALPHA_UP_1 +164 0x1000 //RX_TDDRC_ALPHA_UP_2 +165 0x1000 //RX_TDDRC_ALPHA_UP_3 +166 0x1000 //RX_TDDRC_ALPHA_UP_4 +184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +190 0x7FFF //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +269 0x0000 //RX_TDDRC_THRD_0 +270 0x0000 //RX_TDDRC_THRD_1 +271 0x7FFF //RX_TDDRC_THRD_2 +272 0x7FFF //RX_TDDRC_THRD_3 +273 0x7E70 //RX_TDDRC_SLANT_0 +274 0x7FFF //RX_TDDRC_SLANT_1 +275 0x1000 //RX_TDDRC_ALPHA_UP_0 +276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x199A //RX_TDDRC_HMNC_GAIN +279 0x0001 //RX_TDDRC_SMT_FLAG +280 0x0CCD //RX_TDDRC_SMT_W +281 0x0155 //RX_TDDRC_DRC_GAIN +195 0x001C //RX_FDEQ_SUBNUM +196 0x4848 //RX_FDEQ_GAIN_0 +197 0x4848 //RX_FDEQ_GAIN_1 +198 0x4848 //RX_FDEQ_GAIN_2 +199 0x4848 //RX_FDEQ_GAIN_3 +200 0x4848 //RX_FDEQ_GAIN_4 +201 0x4848 //RX_FDEQ_GAIN_5 +202 0x4848 //RX_FDEQ_GAIN_6 +203 0x4848 //RX_FDEQ_GAIN_7 +204 0x4848 //RX_FDEQ_GAIN_8 +205 0x3C3C //RX_FDEQ_GAIN_9 +206 0x3C3C //RX_FDEQ_GAIN_10 +207 0x3838 //RX_FDEQ_GAIN_11 +208 0x3838 //RX_FDEQ_GAIN_12 +209 0x3030 //RX_FDEQ_GAIN_13 +210 0x4848 //RX_FDEQ_GAIN_14 +211 0x4848 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0202 //RX_FDEQ_BIN_0 +221 0x0203 //RX_FDEQ_BIN_1 +222 0x0303 //RX_FDEQ_BIN_2 +223 0x0304 //RX_FDEQ_BIN_3 +224 0x0405 //RX_FDEQ_BIN_4 +225 0x0506 //RX_FDEQ_BIN_5 +226 0x0708 //RX_FDEQ_BIN_6 +227 0x090A //RX_FDEQ_BIN_7 +228 0x0B0C //RX_FDEQ_BIN_8 +229 0x0D0E //RX_FDEQ_BIN_9 +230 0x0E0F //RX_FDEQ_BIN_10 +231 0x0F10 //RX_FDEQ_BIN_11 +232 0x1011 //RX_FDEQ_BIN_12 +233 0x1112 //RX_FDEQ_BIN_13 +234 0x0000 //RX_FDEQ_BIN_14 +235 0x0000 //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x4000 //RX_FDEQ_RESRV_0 +245 0x0320 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0030 //RX_FDDRC_BAND_MARGIN_1 +248 0x0050 //RX_FDDRC_BAND_MARGIN_2 +249 0x0080 //RX_FDDRC_BAND_MARGIN_3 +250 0x0007 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x5000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x6400 //RX_FDDRC_THRD_3_2 +258 0x6400 //RX_FDDRC_THRD_3_3 +259 0x2000 //RX_FDDRC_SLANT_0_0 +260 0x2000 //RX_FDDRC_SLANT_0_1 +261 0x2000 //RX_FDDRC_SLANT_0_2 +262 0x2000 //RX_FDDRC_SLANT_0_3 +263 0x5333 //RX_FDDRC_SLANT_1_0 +264 0x5333 //RX_FDDRC_SLANT_1_1 +265 0x5333 //RX_FDDRC_SLANT_1_2 +266 0x5333 //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +286 0x0100 //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 +#VOL 2 +163 0x1000 //RX_TDDRC_ALPHA_UP_1 +164 0x1000 //RX_TDDRC_ALPHA_UP_2 +165 0x1000 //RX_TDDRC_ALPHA_UP_3 +166 0x1000 //RX_TDDRC_ALPHA_UP_4 +184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +190 0x7FFF //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +269 0x0000 //RX_TDDRC_THRD_0 +270 0x0000 //RX_TDDRC_THRD_1 +271 0x7FFF //RX_TDDRC_THRD_2 +272 0x7FFF //RX_TDDRC_THRD_3 +273 0x7E70 //RX_TDDRC_SLANT_0 +274 0x7FFF //RX_TDDRC_SLANT_1 +275 0x1000 //RX_TDDRC_ALPHA_UP_0 +276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x199A //RX_TDDRC_HMNC_GAIN +279 0x0001 //RX_TDDRC_SMT_FLAG +280 0x0CCD //RX_TDDRC_SMT_W +281 0x0155 //RX_TDDRC_DRC_GAIN +195 0x001C //RX_FDEQ_SUBNUM +196 0x4848 //RX_FDEQ_GAIN_0 +197 0x4848 //RX_FDEQ_GAIN_1 +198 0x4848 //RX_FDEQ_GAIN_2 +199 0x4848 //RX_FDEQ_GAIN_3 +200 0x4848 //RX_FDEQ_GAIN_4 +201 0x4848 //RX_FDEQ_GAIN_5 +202 0x4848 //RX_FDEQ_GAIN_6 +203 0x4848 //RX_FDEQ_GAIN_7 +204 0x4848 //RX_FDEQ_GAIN_8 +205 0x3C3C //RX_FDEQ_GAIN_9 +206 0x3C3C //RX_FDEQ_GAIN_10 +207 0x3838 //RX_FDEQ_GAIN_11 +208 0x3838 //RX_FDEQ_GAIN_12 +209 0x3030 //RX_FDEQ_GAIN_13 +210 0x4848 //RX_FDEQ_GAIN_14 +211 0x4848 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0202 //RX_FDEQ_BIN_0 +221 0x0203 //RX_FDEQ_BIN_1 +222 0x0303 //RX_FDEQ_BIN_2 +223 0x0304 //RX_FDEQ_BIN_3 +224 0x0405 //RX_FDEQ_BIN_4 +225 0x0506 //RX_FDEQ_BIN_5 +226 0x0708 //RX_FDEQ_BIN_6 +227 0x090A //RX_FDEQ_BIN_7 +228 0x0B0C //RX_FDEQ_BIN_8 +229 0x0D0E //RX_FDEQ_BIN_9 +230 0x0E0F //RX_FDEQ_BIN_10 +231 0x0F10 //RX_FDEQ_BIN_11 +232 0x1011 //RX_FDEQ_BIN_12 +233 0x1112 //RX_FDEQ_BIN_13 +234 0x0000 //RX_FDEQ_BIN_14 +235 0x0000 //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x4000 //RX_FDEQ_RESRV_0 +245 0x0320 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0030 //RX_FDDRC_BAND_MARGIN_1 +248 0x0050 //RX_FDDRC_BAND_MARGIN_2 +249 0x0080 //RX_FDDRC_BAND_MARGIN_3 +250 0x0007 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x5000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x6400 //RX_FDDRC_THRD_3_2 +258 0x6400 //RX_FDDRC_THRD_3_3 +259 0x2000 //RX_FDDRC_SLANT_0_0 +260 0x2000 //RX_FDDRC_SLANT_0_1 +261 0x2000 //RX_FDDRC_SLANT_0_2 +262 0x2000 //RX_FDDRC_SLANT_0_3 +263 0x5333 //RX_FDDRC_SLANT_1_0 +264 0x5333 //RX_FDDRC_SLANT_1_1 +265 0x5333 //RX_FDDRC_SLANT_1_2 +266 0x5333 //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +286 0x0100 //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 +#VOL 3 +163 0x1000 //RX_TDDRC_ALPHA_UP_1 +164 0x1000 //RX_TDDRC_ALPHA_UP_2 +165 0x1000 //RX_TDDRC_ALPHA_UP_3 +166 0x1000 //RX_TDDRC_ALPHA_UP_4 +184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +190 0x7FFF //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +269 0x0000 //RX_TDDRC_THRD_0 +270 0x0000 //RX_TDDRC_THRD_1 +271 0x7FFF //RX_TDDRC_THRD_2 +272 0x7FFF //RX_TDDRC_THRD_3 +273 0x7E70 //RX_TDDRC_SLANT_0 +274 0x7FFF //RX_TDDRC_SLANT_1 +275 0x1000 //RX_TDDRC_ALPHA_UP_0 +276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x199A //RX_TDDRC_HMNC_GAIN +279 0x0001 //RX_TDDRC_SMT_FLAG +280 0x0CCD //RX_TDDRC_SMT_W +281 0x0155 //RX_TDDRC_DRC_GAIN +195 0x001C //RX_FDEQ_SUBNUM +196 0x4848 //RX_FDEQ_GAIN_0 +197 0x4848 //RX_FDEQ_GAIN_1 +198 0x4848 //RX_FDEQ_GAIN_2 +199 0x4848 //RX_FDEQ_GAIN_3 +200 0x4848 //RX_FDEQ_GAIN_4 +201 0x4848 //RX_FDEQ_GAIN_5 +202 0x4848 //RX_FDEQ_GAIN_6 +203 0x4848 //RX_FDEQ_GAIN_7 +204 0x4848 //RX_FDEQ_GAIN_8 +205 0x3C3C //RX_FDEQ_GAIN_9 +206 0x3C3C //RX_FDEQ_GAIN_10 +207 0x3838 //RX_FDEQ_GAIN_11 +208 0x3838 //RX_FDEQ_GAIN_12 +209 0x3030 //RX_FDEQ_GAIN_13 +210 0x4848 //RX_FDEQ_GAIN_14 +211 0x4848 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0202 //RX_FDEQ_BIN_0 +221 0x0203 //RX_FDEQ_BIN_1 +222 0x0303 //RX_FDEQ_BIN_2 +223 0x0304 //RX_FDEQ_BIN_3 +224 0x0405 //RX_FDEQ_BIN_4 +225 0x0506 //RX_FDEQ_BIN_5 +226 0x0708 //RX_FDEQ_BIN_6 +227 0x090A //RX_FDEQ_BIN_7 +228 0x0B0C //RX_FDEQ_BIN_8 +229 0x0D0E //RX_FDEQ_BIN_9 +230 0x0E0F //RX_FDEQ_BIN_10 +231 0x0F10 //RX_FDEQ_BIN_11 +232 0x1011 //RX_FDEQ_BIN_12 +233 0x1112 //RX_FDEQ_BIN_13 +234 0x0000 //RX_FDEQ_BIN_14 +235 0x0000 //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x4000 //RX_FDEQ_RESRV_0 +245 0x0320 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0030 //RX_FDDRC_BAND_MARGIN_1 +248 0x0050 //RX_FDDRC_BAND_MARGIN_2 +249 0x0080 //RX_FDDRC_BAND_MARGIN_3 +250 0x0007 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x5000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x6400 //RX_FDDRC_THRD_3_2 +258 0x6400 //RX_FDDRC_THRD_3_3 +259 0x2000 //RX_FDDRC_SLANT_0_0 +260 0x2000 //RX_FDDRC_SLANT_0_1 +261 0x2000 //RX_FDDRC_SLANT_0_2 +262 0x2000 //RX_FDDRC_SLANT_0_3 +263 0x5333 //RX_FDDRC_SLANT_1_0 +264 0x5333 //RX_FDDRC_SLANT_1_1 +265 0x5333 //RX_FDDRC_SLANT_1_2 +266 0x5333 //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +286 0x0100 //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 +#VOL 4 +163 0x1000 //RX_TDDRC_ALPHA_UP_1 +164 0x1000 //RX_TDDRC_ALPHA_UP_2 +165 0x1000 //RX_TDDRC_ALPHA_UP_3 +166 0x1000 //RX_TDDRC_ALPHA_UP_4 +184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +190 0x7FFF //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +269 0x0000 //RX_TDDRC_THRD_0 +270 0x0000 //RX_TDDRC_THRD_1 +271 0x7FFF //RX_TDDRC_THRD_2 +272 0x7FFF //RX_TDDRC_THRD_3 +273 0x7E70 //RX_TDDRC_SLANT_0 +274 0x7FFF //RX_TDDRC_SLANT_1 +275 0x1000 //RX_TDDRC_ALPHA_UP_0 +276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x199A //RX_TDDRC_HMNC_GAIN +279 0x0001 //RX_TDDRC_SMT_FLAG +280 0x0CCD //RX_TDDRC_SMT_W +281 0x0155 //RX_TDDRC_DRC_GAIN +195 0x001C //RX_FDEQ_SUBNUM +196 0x4848 //RX_FDEQ_GAIN_0 +197 0x4848 //RX_FDEQ_GAIN_1 +198 0x4848 //RX_FDEQ_GAIN_2 +199 0x4848 //RX_FDEQ_GAIN_3 +200 0x4848 //RX_FDEQ_GAIN_4 +201 0x4848 //RX_FDEQ_GAIN_5 +202 0x4848 //RX_FDEQ_GAIN_6 +203 0x4848 //RX_FDEQ_GAIN_7 +204 0x4848 //RX_FDEQ_GAIN_8 +205 0x3C3C //RX_FDEQ_GAIN_9 +206 0x3C3C //RX_FDEQ_GAIN_10 +207 0x3838 //RX_FDEQ_GAIN_11 +208 0x3838 //RX_FDEQ_GAIN_12 +209 0x3030 //RX_FDEQ_GAIN_13 +210 0x4848 //RX_FDEQ_GAIN_14 +211 0x4848 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0202 //RX_FDEQ_BIN_0 +221 0x0203 //RX_FDEQ_BIN_1 +222 0x0303 //RX_FDEQ_BIN_2 +223 0x0304 //RX_FDEQ_BIN_3 +224 0x0405 //RX_FDEQ_BIN_4 +225 0x0506 //RX_FDEQ_BIN_5 +226 0x0708 //RX_FDEQ_BIN_6 +227 0x090A //RX_FDEQ_BIN_7 +228 0x0B0C //RX_FDEQ_BIN_8 +229 0x0D0E //RX_FDEQ_BIN_9 +230 0x0E0F //RX_FDEQ_BIN_10 +231 0x0F10 //RX_FDEQ_BIN_11 +232 0x1011 //RX_FDEQ_BIN_12 +233 0x1112 //RX_FDEQ_BIN_13 +234 0x0000 //RX_FDEQ_BIN_14 +235 0x0000 //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x4000 //RX_FDEQ_RESRV_0 +245 0x0320 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0030 //RX_FDDRC_BAND_MARGIN_1 +248 0x0050 //RX_FDDRC_BAND_MARGIN_2 +249 0x0080 //RX_FDDRC_BAND_MARGIN_3 +250 0x0007 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x5000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x6400 //RX_FDDRC_THRD_3_2 +258 0x6400 //RX_FDDRC_THRD_3_3 +259 0x2000 //RX_FDDRC_SLANT_0_0 +260 0x2000 //RX_FDDRC_SLANT_0_1 +261 0x2000 //RX_FDDRC_SLANT_0_2 +262 0x2000 //RX_FDDRC_SLANT_0_3 +263 0x5333 //RX_FDDRC_SLANT_1_0 +264 0x5333 //RX_FDDRC_SLANT_1_1 +265 0x5333 //RX_FDDRC_SLANT_1_2 +266 0x5333 //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +286 0x0100 //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 +#VOL 5 +163 0x1000 //RX_TDDRC_ALPHA_UP_1 +164 0x1000 //RX_TDDRC_ALPHA_UP_2 +165 0x1000 //RX_TDDRC_ALPHA_UP_3 +166 0x1000 //RX_TDDRC_ALPHA_UP_4 +184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +190 0x7FFF //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +269 0x0000 //RX_TDDRC_THRD_0 +270 0x0000 //RX_TDDRC_THRD_1 +271 0x7FFF //RX_TDDRC_THRD_2 +272 0x7FFF //RX_TDDRC_THRD_3 +273 0x7E70 //RX_TDDRC_SLANT_0 +274 0x7FFF //RX_TDDRC_SLANT_1 +275 0x1000 //RX_TDDRC_ALPHA_UP_0 +276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x199A //RX_TDDRC_HMNC_GAIN +279 0x0001 //RX_TDDRC_SMT_FLAG +280 0x0CCD //RX_TDDRC_SMT_W +281 0x0155 //RX_TDDRC_DRC_GAIN +195 0x001C //RX_FDEQ_SUBNUM +196 0x4848 //RX_FDEQ_GAIN_0 +197 0x4848 //RX_FDEQ_GAIN_1 +198 0x4848 //RX_FDEQ_GAIN_2 +199 0x4848 //RX_FDEQ_GAIN_3 +200 0x4848 //RX_FDEQ_GAIN_4 +201 0x4848 //RX_FDEQ_GAIN_5 +202 0x4848 //RX_FDEQ_GAIN_6 +203 0x4848 //RX_FDEQ_GAIN_7 +204 0x4848 //RX_FDEQ_GAIN_8 +205 0x3C3C //RX_FDEQ_GAIN_9 +206 0x3C3C //RX_FDEQ_GAIN_10 +207 0x3838 //RX_FDEQ_GAIN_11 +208 0x3838 //RX_FDEQ_GAIN_12 +209 0x3030 //RX_FDEQ_GAIN_13 +210 0x4848 //RX_FDEQ_GAIN_14 +211 0x4848 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0202 //RX_FDEQ_BIN_0 +221 0x0203 //RX_FDEQ_BIN_1 +222 0x0303 //RX_FDEQ_BIN_2 +223 0x0304 //RX_FDEQ_BIN_3 +224 0x0405 //RX_FDEQ_BIN_4 +225 0x0506 //RX_FDEQ_BIN_5 +226 0x0708 //RX_FDEQ_BIN_6 +227 0x090A //RX_FDEQ_BIN_7 +228 0x0B0C //RX_FDEQ_BIN_8 +229 0x0D0E //RX_FDEQ_BIN_9 +230 0x0E0F //RX_FDEQ_BIN_10 +231 0x0F10 //RX_FDEQ_BIN_11 +232 0x1011 //RX_FDEQ_BIN_12 +233 0x1112 //RX_FDEQ_BIN_13 +234 0x0000 //RX_FDEQ_BIN_14 +235 0x0000 //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x4000 //RX_FDEQ_RESRV_0 +245 0x0320 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0030 //RX_FDDRC_BAND_MARGIN_1 +248 0x0050 //RX_FDDRC_BAND_MARGIN_2 +249 0x0080 //RX_FDDRC_BAND_MARGIN_3 +250 0x0007 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x5000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x6400 //RX_FDDRC_THRD_3_2 +258 0x6400 //RX_FDDRC_THRD_3_3 +259 0x2000 //RX_FDDRC_SLANT_0_0 +260 0x2000 //RX_FDDRC_SLANT_0_1 +261 0x2000 //RX_FDDRC_SLANT_0_2 +262 0x2000 //RX_FDDRC_SLANT_0_3 +263 0x5333 //RX_FDDRC_SLANT_1_0 +264 0x5333 //RX_FDDRC_SLANT_1_1 +265 0x5333 //RX_FDDRC_SLANT_1_2 +266 0x5333 //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +286 0x0100 //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 +#VOL 6 +163 0x1000 //RX_TDDRC_ALPHA_UP_1 +164 0x1000 //RX_TDDRC_ALPHA_UP_2 +165 0x1000 //RX_TDDRC_ALPHA_UP_3 +166 0x1000 //RX_TDDRC_ALPHA_UP_4 +184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +190 0x7FFF //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +269 0x0000 //RX_TDDRC_THRD_0 +270 0x0000 //RX_TDDRC_THRD_1 +271 0x7FFF //RX_TDDRC_THRD_2 +272 0x7FFF //RX_TDDRC_THRD_3 +273 0x7E70 //RX_TDDRC_SLANT_0 +274 0x7FFF //RX_TDDRC_SLANT_1 +275 0x1000 //RX_TDDRC_ALPHA_UP_0 +276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x199A //RX_TDDRC_HMNC_GAIN +279 0x0001 //RX_TDDRC_SMT_FLAG +280 0x0CCD //RX_TDDRC_SMT_W +281 0x0155 //RX_TDDRC_DRC_GAIN +195 0x001C //RX_FDEQ_SUBNUM +196 0x4848 //RX_FDEQ_GAIN_0 +197 0x4848 //RX_FDEQ_GAIN_1 +198 0x4848 //RX_FDEQ_GAIN_2 +199 0x4848 //RX_FDEQ_GAIN_3 +200 0x4848 //RX_FDEQ_GAIN_4 +201 0x4848 //RX_FDEQ_GAIN_5 +202 0x4848 //RX_FDEQ_GAIN_6 +203 0x4848 //RX_FDEQ_GAIN_7 +204 0x4848 //RX_FDEQ_GAIN_8 +205 0x3C3C //RX_FDEQ_GAIN_9 +206 0x3C3C //RX_FDEQ_GAIN_10 +207 0x3838 //RX_FDEQ_GAIN_11 +208 0x3838 //RX_FDEQ_GAIN_12 +209 0x3030 //RX_FDEQ_GAIN_13 +210 0x4848 //RX_FDEQ_GAIN_14 +211 0x4848 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0202 //RX_FDEQ_BIN_0 +221 0x0203 //RX_FDEQ_BIN_1 +222 0x0303 //RX_FDEQ_BIN_2 +223 0x0304 //RX_FDEQ_BIN_3 +224 0x0405 //RX_FDEQ_BIN_4 +225 0x0506 //RX_FDEQ_BIN_5 +226 0x0708 //RX_FDEQ_BIN_6 +227 0x090A //RX_FDEQ_BIN_7 +228 0x0B0C //RX_FDEQ_BIN_8 +229 0x0D0E //RX_FDEQ_BIN_9 +230 0x0E0F //RX_FDEQ_BIN_10 +231 0x0F10 //RX_FDEQ_BIN_11 +232 0x1011 //RX_FDEQ_BIN_12 +233 0x1112 //RX_FDEQ_BIN_13 +234 0x0000 //RX_FDEQ_BIN_14 +235 0x0000 //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x4000 //RX_FDEQ_RESRV_0 +245 0x0320 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0030 //RX_FDDRC_BAND_MARGIN_1 +248 0x0050 //RX_FDDRC_BAND_MARGIN_2 +249 0x0080 //RX_FDDRC_BAND_MARGIN_3 +250 0x0007 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x5000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x6400 //RX_FDDRC_THRD_3_2 +258 0x6400 //RX_FDDRC_THRD_3_3 +259 0x2000 //RX_FDDRC_SLANT_0_0 +260 0x2000 //RX_FDDRC_SLANT_0_1 +261 0x2000 //RX_FDDRC_SLANT_0_2 +262 0x2000 //RX_FDDRC_SLANT_0_3 +263 0x5333 //RX_FDDRC_SLANT_1_0 +264 0x5333 //RX_FDDRC_SLANT_1_1 +265 0x5333 //RX_FDDRC_SLANT_1_2 +266 0x5333 //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +286 0x0100 //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 #CASE_NAME BLUETOOTH-BTNB_NREC-VOICE_GENERIC-SWB -#PARAM_TYPE TX+RX -#TOTAL_CUSTOM_STEP 7 +#PARAM_MODE Full +#PARAM_TYPE TX+2RX +#TOTAL_CUSTOM_STEP 7+7 #TX 0 0x0001 //TX_OPERATION_MODE_0 1 0x0001 //TX_OPERATION_MODE_1 @@ -19541,20 +29629,20 @@ 248 0xF400 //TX_THR_SN_EST_6 249 0xF600 //TX_THR_SN_EST_7 250 0x0000 //TX_DELTA_THR_SN_EST_0 -251 0x0000 //TX_DELTA_THR_SN_EST_1 +251 0x0200 //TX_DELTA_THR_SN_EST_1 252 0x0200 //TX_DELTA_THR_SN_EST_2 253 0x0200 //TX_DELTA_THR_SN_EST_3 254 0x0200 //TX_DELTA_THR_SN_EST_4 255 0x0200 //TX_DELTA_THR_SN_EST_5 -256 0x0200 //TX_DELTA_THR_SN_EST_6 +256 0x0000 //TX_DELTA_THR_SN_EST_6 257 0x0200 //TX_DELTA_THR_SN_EST_7 258 0x6000 //TX_LAMBDA_NN_EST_0 -259 0x6000 //TX_LAMBDA_NN_EST_1 +259 0x4000 //TX_LAMBDA_NN_EST_1 260 0x4000 //TX_LAMBDA_NN_EST_2 261 0x4000 //TX_LAMBDA_NN_EST_3 262 0x4000 //TX_LAMBDA_NN_EST_4 263 0x4000 //TX_LAMBDA_NN_EST_5 -264 0x4000 //TX_LAMBDA_NN_EST_6 +264 0x6000 //TX_LAMBDA_NN_EST_6 265 0x4000 //TX_LAMBDA_NN_EST_7 266 0x0400 //TX_N_SN_EST 267 0x001E //TX_INBEAM_T @@ -19572,16 +29660,16 @@ 279 0x1000 //TX_B_POST_FLT_0 280 0x1000 //TX_B_POST_FLT_1 281 0x000B //TX_NS_LVL_CTRL_0 -282 0x000F //TX_NS_LVL_CTRL_1 -283 0x0011 //TX_NS_LVL_CTRL_2 +282 0x0011 //TX_NS_LVL_CTRL_1 +283 0x000F //TX_NS_LVL_CTRL_2 284 0x000F //TX_NS_LVL_CTRL_3 285 0x000F //TX_NS_LVL_CTRL_4 286 0x000F //TX_NS_LVL_CTRL_5 287 0x000F //TX_NS_LVL_CTRL_6 288 0x0011 //TX_NS_LVL_CTRL_7 289 0x000C //TX_MIN_GAIN_S_0 -290 0x000C //TX_MIN_GAIN_S_1 -291 0x000F //TX_MIN_GAIN_S_2 +290 0x000F //TX_MIN_GAIN_S_1 +291 0x000C //TX_MIN_GAIN_S_2 292 0x000C //TX_MIN_GAIN_S_3 293 0x000C //TX_MIN_GAIN_S_4 294 0x000C //TX_MIN_GAIN_S_5 @@ -19605,12 +29693,12 @@ 312 0x7FFF //TX_A_POST_FILT_0 313 0x2000 //TX_A_POST_FILT_1 314 0x2000 //TX_A_POST_FILT_S_0 -315 0x4000 //TX_A_POST_FILT_S_1 +315 0x5000 //TX_A_POST_FILT_S_1 316 0x5000 //TX_A_POST_FILT_S_2 317 0x5000 //TX_A_POST_FILT_S_3 318 0x5000 //TX_A_POST_FILT_S_4 319 0x5000 //TX_A_POST_FILT_S_5 -320 0x5000 //TX_A_POST_FILT_S_6 +320 0x4000 //TX_A_POST_FILT_S_6 321 0x5000 //TX_A_POST_FILT_S_7 322 0x1000 //TX_B_POST_FILT_0 323 0x1000 //TX_B_POST_FILT_1 @@ -19670,10 +29758,10 @@ 377 0x7FFF //TX_NOISE_TH_5_4 378 0x044C //TX_NOISE_TH_6 379 0x0014 //TX_MINENOISE_TH -380 0x4000 //TX_MINENOISE_MIC0_TH_MTS -381 0xFFEE //TX_MINENOISE_MIC0_TH_EXP -382 0x6000 //TX_MINENOISE_MIC0_S_TH_MTS -383 0xFFF3 //TX_MINENOISE_MIC0_S_TH_EXP +380 0x4000 //TX_MORENS_TFMASK_TH +381 0xFFEE //TX_DRC_QUIET_FLOOR +382 0x6000 //TX_RATIODTL_CUT_TH +383 0xFFF3 //TX_DT_CUT_K1 384 0x0666 //TX_OUT_ENER_S_TH_CLEAN 385 0x0666 //TX_OUT_ENER_S_TH_LESSCLEAN 386 0x0333 //TX_OUT_ENER_S_TH_NOISY @@ -19681,15 +29769,15 @@ 388 0x0333 //TX_OUT_ENER_TH_SPEECH 389 0x2000 //TX_SN_NPB_GAIN 390 0x0000 //TX_NN_NPB_GAIN -391 0x0000 //TX_CSX_ALPHA_0 -392 0x0000 //TX_CSX_ALPHA_1 -393 0x0000 //TX_CSX_ALPHA_2 -394 0x0000 //TX_CSX_ALPHA_3 -395 0x0800 //TX_MU_ARSP_EST -396 0x00C8 //TX_P_OUTBEAM_MIN_TH +391 0x0000 //TX_POST_MASK_SUP_HSNE +392 0x0000 //TX_TAIL_DET_TH +393 0x0000 //TX_B_LESSCUT_RTO_WTA +394 0x0000 //TX_MEL_G_R +395 0x0800 //TX_SUPHIGH_TH +396 0x00C8 //TX_MASK_G_R 397 0x0002 //TX_EXTRA_NS_L -398 0x0800 //TX_EXTRA_NS_A -399 0x0005 //TX_VR_NOISE_FLOOR_TH +398 0x0800 //TX_C_POST_FLT_MASK +399 0x0005 //TX_A_POST_FLT_WNS 400 0x0148 //TX_MIN_G_LOW300HZ 401 0x0002 //TX_MAXLEVEL_CNG 402 0x00B4 //TX_STN_NOISE_TH @@ -19804,16 +29892,16 @@ 511 0x6666 //TX_MIC_TO_BFGAIN 512 0x0000 //TX_MICTOBFGAIN0 513 0x0000 //TX_FASTMUE_TH -514 0x0000 //TX_DERVB_LEN_0 -515 0x0000 //TX_DERVB_LEN_1 -516 0x0000 //TX_RHO_DERVB -517 0x0000 //TX_MIC_INDX_DERVB -518 0x0000 //TX_MU_DERVB -519 0x0000 //TX_DR_RESRV_0 -520 0x0000 //TX_DR_RESRV_1 -521 0x0000 //TX_DR_RESRV_2 -522 0x0000 //TX_DR_RESRV_3 -523 0x0000 //TX_DR_RESRV_4 +514 0x0000 //TX_DEREVERB_LF_MU +515 0x0000 //TX_DEREVERB_HF_MU +516 0x0000 //TX_DEREVERB_DELAY +517 0x0000 //TX_DEREVERB_COEF_LEN +518 0x0000 //TX_DEREVERB_DNR +519 0x0000 //TX_DEREVERB_ALPHA +520 0x0000 //TX_DEREVERB_BETA +521 0x0000 //TX_GSC_RTOL_TH +522 0x0000 //TX_GSC_RTOH_TH +523 0x0000 //TX_WIDE2_MEANHTH 524 0x0000 //TX_DR_RESRV_5 525 0x0000 //TX_DR_RESRV_6 526 0x0000 //TX_DR_RESRV_7 @@ -20187,8 +30275,73 @@ 894 0xC000 //TX_FASTNS_SSA_THHFL 895 0xCCCC //TX_FASTNS_SSA_THLFH 896 0xD999 //TX_FASTNS_SSA_THHFH +897 0x0000 //TX_SENDFUNC_REG_MICMUTE +898 0x0000 //TX_SENDFUNC_REG_MICMUTE1 +899 0x0000 //TX_MICMUTE_RATIO_THR +900 0x0000 //TX_MICMUTE_AMP_THR +901 0x0000 //TX_MICMUTE_HPF_IND +902 0x0000 //TX_MICMUTE_LOG_EYR_TH +903 0x0000 //TX_MICMUTE_CVG_TIME +904 0x0000 //TX_MICMUTE_RELEASE_TIME +905 0x0000 //TX_MIC_VOLUME_MIC0MUTE +906 0x0000 //TX_MICMUTE_EPD_OFFSET_0 +907 0x0000 //TX_MICMUTE_FRQ_AEC_L +908 0x0000 //TX_MICMUTE_EAD_THR +909 0x0000 //TX_MICMUTE_LAMBDA_CB_NLE +910 0x0000 //TX_MICMUTE_LAMBDA_RE_EST +911 0x0000 //TX_DTD_THR1_MICMUTE_0 +912 0x0000 //TX_DTD_THR1_MICMUTE_1 +913 0x0000 //TX_DTD_THR1_MICMUTE_2 +914 0x0000 //TX_DTD_THR1_MICMUTE_3 +915 0x0000 //TX_DTD_THR2_MICMUTE_0 +916 0x0000 //TX_MICMUTE_MIN_EQ_RE_EST_0 +917 0x0000 //TX_MICMUTE_MIN_EQ_RE_EST_1 +918 0x0000 //TX_MICMUTE_MIN_EQ_RE_EST_2 +919 0x0000 //TX_MICMUTE_MIN_EQ_RE_EST_3 +920 0x0000 //TX_MICMUTE_MIN_EQ_RE_EST_4 +921 0x0000 //TX_MICMUTE_C_POST_FLT +922 0x0000 //TX_MICMUTE_DT_CUT_K +923 0x0000 //TX_MICMUTE_DT_CUT_THR +924 0x0000 //TX_MICMUTE_DT_CUT_K2 +925 0x0000 //TX_MICMUTE_DT_CUT_THR2 +926 0x0000 //TX_MICMUTE_DT2_HOLD_N +927 0x0000 //TX_MICMUTE_RATIODTH_THCUT +928 0x0000 //TX_MICMUTE_B_POST_FLT_ECHOL +929 0x0000 //TX_MICMUTE_B_POST_FLT_ECHOH +930 0x0000 //TX_MICMUTE_C_POST_FLT_MASK +931 0x0000 //TX_MICMUTE_RATIODTL_CUT_TH +932 0x0000 //TX_MICMUTE_DT_CUT_K1 +933 0x0000 //TX_MICMUTE_N2_SN_EST +934 0x0000 //TX_MICMUTE_THR_SN_EST_0 +935 0x0000 //TX_MICMUTE_MIN_G_CTRL_0 +936 0x0000 //TX_MICMUTE_A_POST_FILT_S_0 +937 0x0000 //TX_MICMUTE_B_POST_FILT_0 +938 0x0000 //TX_MIC1RUB_AMP_THR +939 0x0000 //TX_MIC1MUTE_RATIO_THR +940 0x0000 //TX_MIC1MUTE_AMP_THR +941 0x0000 //TX_MIC1MUTE_CVG_TIME +942 0x0000 //TX_MIC1MUTE_RELEASE_TIME +943 0x0000 //TX_AMS_RESRV_01 +944 0x0000 //TX_AMS_RESRV_02 +945 0x0000 //TX_AMS_RESRV_03 +946 0x0000 //TX_AMS_RESRV_04 +947 0x0000 //TX_AMS_RESRV_05 +948 0x0000 //TX_AMS_RESRV_06 +949 0x0000 //TX_AMS_RESRV_07 +950 0x0000 //TX_AMS_RESRV_08 +951 0x0000 //TX_AMS_RESRV_09 +952 0x0000 //TX_AMS_RESRV_10 +953 0x0000 //TX_AMS_RESRV_11 +954 0x0000 //TX_AMS_RESRV_12 +955 0x0000 //TX_AMS_RESRV_13 +956 0x0000 //TX_AMS_RESRV_14 +957 0x0000 //TX_AMS_RESRV_15 +958 0x0000 //TX_AMS_RESRV_16 +959 0x0000 //TX_AMS_RESRV_17 +960 0x0000 //TX_AMS_RESRV_18 +961 0x0000 //TX_AMS_RESRV_19 #RX -0 0x0064 //RX_RECVFUNC_MODE_0 +0 0x2064 //RX_RECVFUNC_MODE_0 1 0x0000 //RX_RECVFUNC_MODE_1 2 0x0003 //RX_SAMPLINGFREQ_SIG 3 0x0003 //RX_SAMPLINGFREQ_PROC @@ -21038,10 +31191,862 @@ 110 0x0000 //RX_FDDRC_RESRV_0 129 0x0100 //RX_SPK_VOL 130 0x0000 //RX_VOL_RESRV_0 +#RX 2 +157 0x2064 //RX_RECVFUNC_MODE_0 +158 0x0000 //RX_RECVFUNC_MODE_1 +159 0x0003 //RX_SAMPLINGFREQ_SIG +160 0x0003 //RX_SAMPLINGFREQ_PROC +161 0x000A //RX_FRAME_SZ +162 0x0000 //RX_DELAY_OPT +163 0x3000 //RX_TDDRC_ALPHA_UP_1 +164 0x3000 //RX_TDDRC_ALPHA_UP_2 +165 0x3000 //RX_TDDRC_ALPHA_UP_3 +166 0x3000 //RX_TDDRC_ALPHA_UP_4 +167 0x0800 //RX_PGA +168 0x7FFF //RX_A_HP +169 0x0000 //RX_B_PE +170 0x1800 //RX_THR_PITCH_DET_0 +171 0x1000 //RX_THR_PITCH_DET_1 +172 0x0800 //RX_THR_PITCH_DET_2 +173 0x0008 //RX_PITCH_BFR_LEN +174 0x0003 //RX_SBD_PITCH_DET +175 0x0100 //RX_PP_RESRV_0 +176 0x0020 //RX_PP_RESRV_1 +177 0x0400 //RX_N_SN_EST +178 0x000C //RX_N2_SN_EST +179 0x0003 //RX_NS_LVL_CTRL +180 0x9000 //RX_THR_SN_EST +181 0x7CCD //RX_LAMBDA_PFILT +182 0x000A //RX_FENS_RESRV_0 +183 0x0190 //RX_FENS_RESRV_1 +184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +187 0x0002 //RX_EXTRA_NS_L +188 0x0800 //RX_EXTRA_NS_A +189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +190 0x7FFF //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +192 0x199A //RX_A_POST_FLT +193 0x0000 //RX_LMT_THRD +194 0x4000 //RX_LMT_ALPHA +195 0x0020 //RX_FDEQ_SUBNUM +196 0x4848 //RX_FDEQ_GAIN_0 +197 0x4848 //RX_FDEQ_GAIN_1 +198 0x4848 //RX_FDEQ_GAIN_2 +199 0x4848 //RX_FDEQ_GAIN_3 +200 0x4848 //RX_FDEQ_GAIN_4 +201 0x4848 //RX_FDEQ_GAIN_5 +202 0x4848 //RX_FDEQ_GAIN_6 +203 0x4848 //RX_FDEQ_GAIN_7 +204 0x4848 //RX_FDEQ_GAIN_8 +205 0x4848 //RX_FDEQ_GAIN_9 +206 0x4848 //RX_FDEQ_GAIN_10 +207 0x4848 //RX_FDEQ_GAIN_11 +208 0x4848 //RX_FDEQ_GAIN_12 +209 0x4848 //RX_FDEQ_GAIN_13 +210 0x4848 //RX_FDEQ_GAIN_14 +211 0x4848 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0202 //RX_FDEQ_BIN_0 +221 0x0203 //RX_FDEQ_BIN_1 +222 0x0303 //RX_FDEQ_BIN_2 +223 0x0304 //RX_FDEQ_BIN_3 +224 0x0405 //RX_FDEQ_BIN_4 +225 0x0506 //RX_FDEQ_BIN_5 +226 0x0708 //RX_FDEQ_BIN_6 +227 0x090A //RX_FDEQ_BIN_7 +228 0x0B0C //RX_FDEQ_BIN_8 +229 0x0D0E //RX_FDEQ_BIN_9 +230 0x1013 //RX_FDEQ_BIN_10 +231 0x1719 //RX_FDEQ_BIN_11 +232 0x1B1E //RX_FDEQ_BIN_12 +233 0x1E1E //RX_FDEQ_BIN_13 +234 0x1E28 //RX_FDEQ_BIN_14 +235 0x282C //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x4000 //RX_FDEQ_RESRV_0 +245 0x0320 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0030 //RX_FDDRC_BAND_MARGIN_1 +248 0x0050 //RX_FDDRC_BAND_MARGIN_2 +249 0x0080 //RX_FDDRC_BAND_MARGIN_3 +250 0x0007 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x5000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x6400 //RX_FDDRC_THRD_3_2 +258 0x6400 //RX_FDDRC_THRD_3_3 +259 0x2000 //RX_FDDRC_SLANT_0_0 +260 0x2000 //RX_FDDRC_SLANT_0_1 +261 0x2000 //RX_FDDRC_SLANT_0_2 +262 0x2000 //RX_FDDRC_SLANT_0_3 +263 0x5333 //RX_FDDRC_SLANT_1_0 +264 0x5333 //RX_FDDRC_SLANT_1_1 +265 0x5333 //RX_FDDRC_SLANT_1_2 +266 0x5333 //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +268 0x0000 //RX_FILTINDX +269 0x0000 //RX_TDDRC_THRD_0 +270 0x0000 //RX_TDDRC_THRD_1 +271 0x7FFF //RX_TDDRC_THRD_2 +272 0x7FFF //RX_TDDRC_THRD_3 +273 0x7FFF //RX_TDDRC_SLANT_0 +274 0x7FFF //RX_TDDRC_SLANT_1 +275 0x3000 //RX_TDDRC_ALPHA_UP_0 +276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x199A //RX_TDDRC_HMNC_GAIN +279 0x0001 //RX_TDDRC_SMT_FLAG +280 0x0CCD //RX_TDDRC_SMT_W +281 0x0155 //RX_TDDRC_DRC_GAIN +282 0x7C00 //RX_LAMBDA_PKA_FP +283 0x2000 //RX_TPKA_FP +284 0x2000 //RX_MIN_G_FP +285 0x0080 //RX_MAX_G_FP +286 0x0100 //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 +288 0x0000 //RX_MAXLEVEL_CNG +289 0x3000 //RX_BWE_UV_TH +290 0x3000 //RX_BWE_UV_TH2 +291 0x1800 //RX_BWE_UV_TH3 +292 0x1000 //RX_BWE_V_TH +293 0x04CD //RX_BWE_GAIN1_V_TH1 +294 0x0F33 //RX_BWE_GAIN1_V_TH2 +295 0x7333 //RX_BWE_UV_EQ +296 0x199A //RX_BWE_V_EQ +297 0x7333 //RX_BWE_TONE_TH +298 0x0004 //RX_BWE_UV_HOLD_T +299 0x6CCD //RX_BWE_GAIN2_ALPHA +300 0x799A //RX_BWE_GAIN3_ALPHA +301 0x001E //RX_BWE_CUTOFF +302 0x3000 //RX_BWE_GAINFILL +303 0x3200 //RX_BWE_MAXTH_TONE +304 0x2000 //RX_BWE_EQ_0 +305 0x2000 //RX_BWE_EQ_1 +306 0x2000 //RX_BWE_EQ_2 +307 0x2000 //RX_BWE_EQ_3 +308 0x2000 //RX_BWE_EQ_4 +309 0x2000 //RX_BWE_EQ_5 +310 0x2000 //RX_BWE_EQ_6 +311 0x0000 //RX_BWE_RESRV_0 +312 0x0000 //RX_BWE_RESRV_1 +313 0x0000 //RX_BWE_RESRV_2 +#VOL 0 +163 0x3000 //RX_TDDRC_ALPHA_UP_1 +164 0x3000 //RX_TDDRC_ALPHA_UP_2 +165 0x3000 //RX_TDDRC_ALPHA_UP_3 +166 0x3000 //RX_TDDRC_ALPHA_UP_4 +184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +190 0x7FFF //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +269 0x0000 //RX_TDDRC_THRD_0 +270 0x0000 //RX_TDDRC_THRD_1 +271 0x7FFF //RX_TDDRC_THRD_2 +272 0x7FFF //RX_TDDRC_THRD_3 +273 0x7FFF //RX_TDDRC_SLANT_0 +274 0x7FFF //RX_TDDRC_SLANT_1 +275 0x3000 //RX_TDDRC_ALPHA_UP_0 +276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x199A //RX_TDDRC_HMNC_GAIN +279 0x0001 //RX_TDDRC_SMT_FLAG +280 0x0CCD //RX_TDDRC_SMT_W +281 0x0155 //RX_TDDRC_DRC_GAIN +195 0x0020 //RX_FDEQ_SUBNUM +196 0x4848 //RX_FDEQ_GAIN_0 +197 0x4848 //RX_FDEQ_GAIN_1 +198 0x4848 //RX_FDEQ_GAIN_2 +199 0x4848 //RX_FDEQ_GAIN_3 +200 0x4848 //RX_FDEQ_GAIN_4 +201 0x4848 //RX_FDEQ_GAIN_5 +202 0x4848 //RX_FDEQ_GAIN_6 +203 0x4848 //RX_FDEQ_GAIN_7 +204 0x4848 //RX_FDEQ_GAIN_8 +205 0x4848 //RX_FDEQ_GAIN_9 +206 0x4848 //RX_FDEQ_GAIN_10 +207 0x4848 //RX_FDEQ_GAIN_11 +208 0x4848 //RX_FDEQ_GAIN_12 +209 0x4848 //RX_FDEQ_GAIN_13 +210 0x4848 //RX_FDEQ_GAIN_14 +211 0x4848 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0202 //RX_FDEQ_BIN_0 +221 0x0203 //RX_FDEQ_BIN_1 +222 0x0303 //RX_FDEQ_BIN_2 +223 0x0304 //RX_FDEQ_BIN_3 +224 0x0405 //RX_FDEQ_BIN_4 +225 0x0506 //RX_FDEQ_BIN_5 +226 0x0708 //RX_FDEQ_BIN_6 +227 0x090A //RX_FDEQ_BIN_7 +228 0x0B0C //RX_FDEQ_BIN_8 +229 0x0D0E //RX_FDEQ_BIN_9 +230 0x1013 //RX_FDEQ_BIN_10 +231 0x1719 //RX_FDEQ_BIN_11 +232 0x1B1E //RX_FDEQ_BIN_12 +233 0x1E1E //RX_FDEQ_BIN_13 +234 0x1E28 //RX_FDEQ_BIN_14 +235 0x282C //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x4000 //RX_FDEQ_RESRV_0 +245 0x0320 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0030 //RX_FDDRC_BAND_MARGIN_1 +248 0x0050 //RX_FDDRC_BAND_MARGIN_2 +249 0x0080 //RX_FDDRC_BAND_MARGIN_3 +250 0x0007 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x5000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x6400 //RX_FDDRC_THRD_3_2 +258 0x6400 //RX_FDDRC_THRD_3_3 +259 0x2000 //RX_FDDRC_SLANT_0_0 +260 0x2000 //RX_FDDRC_SLANT_0_1 +261 0x2000 //RX_FDDRC_SLANT_0_2 +262 0x2000 //RX_FDDRC_SLANT_0_3 +263 0x5333 //RX_FDDRC_SLANT_1_0 +264 0x5333 //RX_FDDRC_SLANT_1_1 +265 0x5333 //RX_FDDRC_SLANT_1_2 +266 0x5333 //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +286 0x0100 //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 +#VOL 1 +163 0x3000 //RX_TDDRC_ALPHA_UP_1 +164 0x3000 //RX_TDDRC_ALPHA_UP_2 +165 0x3000 //RX_TDDRC_ALPHA_UP_3 +166 0x3000 //RX_TDDRC_ALPHA_UP_4 +184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +190 0x7FFF //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +269 0x0000 //RX_TDDRC_THRD_0 +270 0x0000 //RX_TDDRC_THRD_1 +271 0x7FFF //RX_TDDRC_THRD_2 +272 0x7FFF //RX_TDDRC_THRD_3 +273 0x7FFF //RX_TDDRC_SLANT_0 +274 0x7FFF //RX_TDDRC_SLANT_1 +275 0x3000 //RX_TDDRC_ALPHA_UP_0 +276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x199A //RX_TDDRC_HMNC_GAIN +279 0x0001 //RX_TDDRC_SMT_FLAG +280 0x0CCD //RX_TDDRC_SMT_W +281 0x0155 //RX_TDDRC_DRC_GAIN +195 0x0020 //RX_FDEQ_SUBNUM +196 0x4848 //RX_FDEQ_GAIN_0 +197 0x4848 //RX_FDEQ_GAIN_1 +198 0x4848 //RX_FDEQ_GAIN_2 +199 0x4848 //RX_FDEQ_GAIN_3 +200 0x4848 //RX_FDEQ_GAIN_4 +201 0x4848 //RX_FDEQ_GAIN_5 +202 0x4848 //RX_FDEQ_GAIN_6 +203 0x4848 //RX_FDEQ_GAIN_7 +204 0x4848 //RX_FDEQ_GAIN_8 +205 0x4848 //RX_FDEQ_GAIN_9 +206 0x4848 //RX_FDEQ_GAIN_10 +207 0x4848 //RX_FDEQ_GAIN_11 +208 0x4848 //RX_FDEQ_GAIN_12 +209 0x4848 //RX_FDEQ_GAIN_13 +210 0x4848 //RX_FDEQ_GAIN_14 +211 0x4848 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0202 //RX_FDEQ_BIN_0 +221 0x0203 //RX_FDEQ_BIN_1 +222 0x0303 //RX_FDEQ_BIN_2 +223 0x0304 //RX_FDEQ_BIN_3 +224 0x0405 //RX_FDEQ_BIN_4 +225 0x0506 //RX_FDEQ_BIN_5 +226 0x0708 //RX_FDEQ_BIN_6 +227 0x090A //RX_FDEQ_BIN_7 +228 0x0B0C //RX_FDEQ_BIN_8 +229 0x0D0E //RX_FDEQ_BIN_9 +230 0x1013 //RX_FDEQ_BIN_10 +231 0x1719 //RX_FDEQ_BIN_11 +232 0x1B1E //RX_FDEQ_BIN_12 +233 0x1E1E //RX_FDEQ_BIN_13 +234 0x1E28 //RX_FDEQ_BIN_14 +235 0x282C //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x4000 //RX_FDEQ_RESRV_0 +245 0x0320 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0030 //RX_FDDRC_BAND_MARGIN_1 +248 0x0050 //RX_FDDRC_BAND_MARGIN_2 +249 0x0080 //RX_FDDRC_BAND_MARGIN_3 +250 0x0007 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x5000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x6400 //RX_FDDRC_THRD_3_2 +258 0x6400 //RX_FDDRC_THRD_3_3 +259 0x2000 //RX_FDDRC_SLANT_0_0 +260 0x2000 //RX_FDDRC_SLANT_0_1 +261 0x2000 //RX_FDDRC_SLANT_0_2 +262 0x2000 //RX_FDDRC_SLANT_0_3 +263 0x5333 //RX_FDDRC_SLANT_1_0 +264 0x5333 //RX_FDDRC_SLANT_1_1 +265 0x5333 //RX_FDDRC_SLANT_1_2 +266 0x5333 //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +286 0x0100 //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 +#VOL 2 +163 0x3000 //RX_TDDRC_ALPHA_UP_1 +164 0x3000 //RX_TDDRC_ALPHA_UP_2 +165 0x3000 //RX_TDDRC_ALPHA_UP_3 +166 0x3000 //RX_TDDRC_ALPHA_UP_4 +184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +190 0x7FFF //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +269 0x0000 //RX_TDDRC_THRD_0 +270 0x0000 //RX_TDDRC_THRD_1 +271 0x7FFF //RX_TDDRC_THRD_2 +272 0x7FFF //RX_TDDRC_THRD_3 +273 0x7FFF //RX_TDDRC_SLANT_0 +274 0x7FFF //RX_TDDRC_SLANT_1 +275 0x3000 //RX_TDDRC_ALPHA_UP_0 +276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x199A //RX_TDDRC_HMNC_GAIN +279 0x0001 //RX_TDDRC_SMT_FLAG +280 0x0CCD //RX_TDDRC_SMT_W +281 0x0155 //RX_TDDRC_DRC_GAIN +195 0x0020 //RX_FDEQ_SUBNUM +196 0x4848 //RX_FDEQ_GAIN_0 +197 0x4848 //RX_FDEQ_GAIN_1 +198 0x4848 //RX_FDEQ_GAIN_2 +199 0x4848 //RX_FDEQ_GAIN_3 +200 0x4848 //RX_FDEQ_GAIN_4 +201 0x4848 //RX_FDEQ_GAIN_5 +202 0x4848 //RX_FDEQ_GAIN_6 +203 0x4848 //RX_FDEQ_GAIN_7 +204 0x4848 //RX_FDEQ_GAIN_8 +205 0x4848 //RX_FDEQ_GAIN_9 +206 0x4848 //RX_FDEQ_GAIN_10 +207 0x4848 //RX_FDEQ_GAIN_11 +208 0x4848 //RX_FDEQ_GAIN_12 +209 0x4848 //RX_FDEQ_GAIN_13 +210 0x4848 //RX_FDEQ_GAIN_14 +211 0x4848 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0202 //RX_FDEQ_BIN_0 +221 0x0203 //RX_FDEQ_BIN_1 +222 0x0303 //RX_FDEQ_BIN_2 +223 0x0304 //RX_FDEQ_BIN_3 +224 0x0405 //RX_FDEQ_BIN_4 +225 0x0506 //RX_FDEQ_BIN_5 +226 0x0708 //RX_FDEQ_BIN_6 +227 0x090A //RX_FDEQ_BIN_7 +228 0x0B0C //RX_FDEQ_BIN_8 +229 0x0D0E //RX_FDEQ_BIN_9 +230 0x1013 //RX_FDEQ_BIN_10 +231 0x1719 //RX_FDEQ_BIN_11 +232 0x1B1E //RX_FDEQ_BIN_12 +233 0x1E1E //RX_FDEQ_BIN_13 +234 0x1E28 //RX_FDEQ_BIN_14 +235 0x282C //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x4000 //RX_FDEQ_RESRV_0 +245 0x0320 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0030 //RX_FDDRC_BAND_MARGIN_1 +248 0x0050 //RX_FDDRC_BAND_MARGIN_2 +249 0x0080 //RX_FDDRC_BAND_MARGIN_3 +250 0x0007 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x5000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x6400 //RX_FDDRC_THRD_3_2 +258 0x6400 //RX_FDDRC_THRD_3_3 +259 0x2000 //RX_FDDRC_SLANT_0_0 +260 0x2000 //RX_FDDRC_SLANT_0_1 +261 0x2000 //RX_FDDRC_SLANT_0_2 +262 0x2000 //RX_FDDRC_SLANT_0_3 +263 0x5333 //RX_FDDRC_SLANT_1_0 +264 0x5333 //RX_FDDRC_SLANT_1_1 +265 0x5333 //RX_FDDRC_SLANT_1_2 +266 0x5333 //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +286 0x0100 //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 +#VOL 3 +163 0x3000 //RX_TDDRC_ALPHA_UP_1 +164 0x3000 //RX_TDDRC_ALPHA_UP_2 +165 0x3000 //RX_TDDRC_ALPHA_UP_3 +166 0x3000 //RX_TDDRC_ALPHA_UP_4 +184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +190 0x7FFF //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +269 0x0000 //RX_TDDRC_THRD_0 +270 0x0000 //RX_TDDRC_THRD_1 +271 0x7FFF //RX_TDDRC_THRD_2 +272 0x7FFF //RX_TDDRC_THRD_3 +273 0x7FFF //RX_TDDRC_SLANT_0 +274 0x7FFF //RX_TDDRC_SLANT_1 +275 0x3000 //RX_TDDRC_ALPHA_UP_0 +276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x199A //RX_TDDRC_HMNC_GAIN +279 0x0001 //RX_TDDRC_SMT_FLAG +280 0x0CCD //RX_TDDRC_SMT_W +281 0x0155 //RX_TDDRC_DRC_GAIN +195 0x0020 //RX_FDEQ_SUBNUM +196 0x4848 //RX_FDEQ_GAIN_0 +197 0x4848 //RX_FDEQ_GAIN_1 +198 0x4848 //RX_FDEQ_GAIN_2 +199 0x4848 //RX_FDEQ_GAIN_3 +200 0x4848 //RX_FDEQ_GAIN_4 +201 0x4848 //RX_FDEQ_GAIN_5 +202 0x4848 //RX_FDEQ_GAIN_6 +203 0x4848 //RX_FDEQ_GAIN_7 +204 0x4848 //RX_FDEQ_GAIN_8 +205 0x4848 //RX_FDEQ_GAIN_9 +206 0x4848 //RX_FDEQ_GAIN_10 +207 0x4848 //RX_FDEQ_GAIN_11 +208 0x4848 //RX_FDEQ_GAIN_12 +209 0x4848 //RX_FDEQ_GAIN_13 +210 0x4848 //RX_FDEQ_GAIN_14 +211 0x4848 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0202 //RX_FDEQ_BIN_0 +221 0x0203 //RX_FDEQ_BIN_1 +222 0x0303 //RX_FDEQ_BIN_2 +223 0x0304 //RX_FDEQ_BIN_3 +224 0x0405 //RX_FDEQ_BIN_4 +225 0x0506 //RX_FDEQ_BIN_5 +226 0x0708 //RX_FDEQ_BIN_6 +227 0x090A //RX_FDEQ_BIN_7 +228 0x0B0C //RX_FDEQ_BIN_8 +229 0x0D0E //RX_FDEQ_BIN_9 +230 0x1013 //RX_FDEQ_BIN_10 +231 0x1719 //RX_FDEQ_BIN_11 +232 0x1B1E //RX_FDEQ_BIN_12 +233 0x1E1E //RX_FDEQ_BIN_13 +234 0x1E28 //RX_FDEQ_BIN_14 +235 0x282C //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x4000 //RX_FDEQ_RESRV_0 +245 0x0320 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0030 //RX_FDDRC_BAND_MARGIN_1 +248 0x0050 //RX_FDDRC_BAND_MARGIN_2 +249 0x0080 //RX_FDDRC_BAND_MARGIN_3 +250 0x0007 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x5000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x6400 //RX_FDDRC_THRD_3_2 +258 0x6400 //RX_FDDRC_THRD_3_3 +259 0x2000 //RX_FDDRC_SLANT_0_0 +260 0x2000 //RX_FDDRC_SLANT_0_1 +261 0x2000 //RX_FDDRC_SLANT_0_2 +262 0x2000 //RX_FDDRC_SLANT_0_3 +263 0x5333 //RX_FDDRC_SLANT_1_0 +264 0x5333 //RX_FDDRC_SLANT_1_1 +265 0x5333 //RX_FDDRC_SLANT_1_2 +266 0x5333 //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +286 0x0100 //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 +#VOL 4 +163 0x3000 //RX_TDDRC_ALPHA_UP_1 +164 0x3000 //RX_TDDRC_ALPHA_UP_2 +165 0x3000 //RX_TDDRC_ALPHA_UP_3 +166 0x3000 //RX_TDDRC_ALPHA_UP_4 +184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +190 0x7FFF //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +269 0x0000 //RX_TDDRC_THRD_0 +270 0x0000 //RX_TDDRC_THRD_1 +271 0x7FFF //RX_TDDRC_THRD_2 +272 0x7FFF //RX_TDDRC_THRD_3 +273 0x7FFF //RX_TDDRC_SLANT_0 +274 0x7FFF //RX_TDDRC_SLANT_1 +275 0x3000 //RX_TDDRC_ALPHA_UP_0 +276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x199A //RX_TDDRC_HMNC_GAIN +279 0x0001 //RX_TDDRC_SMT_FLAG +280 0x0CCD //RX_TDDRC_SMT_W +281 0x0155 //RX_TDDRC_DRC_GAIN +195 0x0020 //RX_FDEQ_SUBNUM +196 0x4848 //RX_FDEQ_GAIN_0 +197 0x4848 //RX_FDEQ_GAIN_1 +198 0x4848 //RX_FDEQ_GAIN_2 +199 0x4848 //RX_FDEQ_GAIN_3 +200 0x4848 //RX_FDEQ_GAIN_4 +201 0x4848 //RX_FDEQ_GAIN_5 +202 0x4848 //RX_FDEQ_GAIN_6 +203 0x4848 //RX_FDEQ_GAIN_7 +204 0x4848 //RX_FDEQ_GAIN_8 +205 0x4848 //RX_FDEQ_GAIN_9 +206 0x4848 //RX_FDEQ_GAIN_10 +207 0x4848 //RX_FDEQ_GAIN_11 +208 0x4848 //RX_FDEQ_GAIN_12 +209 0x4848 //RX_FDEQ_GAIN_13 +210 0x4848 //RX_FDEQ_GAIN_14 +211 0x4848 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0202 //RX_FDEQ_BIN_0 +221 0x0203 //RX_FDEQ_BIN_1 +222 0x0303 //RX_FDEQ_BIN_2 +223 0x0304 //RX_FDEQ_BIN_3 +224 0x0405 //RX_FDEQ_BIN_4 +225 0x0506 //RX_FDEQ_BIN_5 +226 0x0708 //RX_FDEQ_BIN_6 +227 0x090A //RX_FDEQ_BIN_7 +228 0x0B0C //RX_FDEQ_BIN_8 +229 0x0D0E //RX_FDEQ_BIN_9 +230 0x1013 //RX_FDEQ_BIN_10 +231 0x1719 //RX_FDEQ_BIN_11 +232 0x1B1E //RX_FDEQ_BIN_12 +233 0x1E1E //RX_FDEQ_BIN_13 +234 0x1E28 //RX_FDEQ_BIN_14 +235 0x282C //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x4000 //RX_FDEQ_RESRV_0 +245 0x0320 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0030 //RX_FDDRC_BAND_MARGIN_1 +248 0x0050 //RX_FDDRC_BAND_MARGIN_2 +249 0x0080 //RX_FDDRC_BAND_MARGIN_3 +250 0x0007 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x5000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x6400 //RX_FDDRC_THRD_3_2 +258 0x6400 //RX_FDDRC_THRD_3_3 +259 0x2000 //RX_FDDRC_SLANT_0_0 +260 0x2000 //RX_FDDRC_SLANT_0_1 +261 0x2000 //RX_FDDRC_SLANT_0_2 +262 0x2000 //RX_FDDRC_SLANT_0_3 +263 0x5333 //RX_FDDRC_SLANT_1_0 +264 0x5333 //RX_FDDRC_SLANT_1_1 +265 0x5333 //RX_FDDRC_SLANT_1_2 +266 0x5333 //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +286 0x0100 //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 +#VOL 5 +163 0x3000 //RX_TDDRC_ALPHA_UP_1 +164 0x3000 //RX_TDDRC_ALPHA_UP_2 +165 0x3000 //RX_TDDRC_ALPHA_UP_3 +166 0x3000 //RX_TDDRC_ALPHA_UP_4 +184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +190 0x7FFF //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +269 0x0000 //RX_TDDRC_THRD_0 +270 0x0000 //RX_TDDRC_THRD_1 +271 0x7FFF //RX_TDDRC_THRD_2 +272 0x7FFF //RX_TDDRC_THRD_3 +273 0x7FFF //RX_TDDRC_SLANT_0 +274 0x7FFF //RX_TDDRC_SLANT_1 +275 0x3000 //RX_TDDRC_ALPHA_UP_0 +276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x199A //RX_TDDRC_HMNC_GAIN +279 0x0001 //RX_TDDRC_SMT_FLAG +280 0x0CCD //RX_TDDRC_SMT_W +281 0x0155 //RX_TDDRC_DRC_GAIN +195 0x0020 //RX_FDEQ_SUBNUM +196 0x4848 //RX_FDEQ_GAIN_0 +197 0x4848 //RX_FDEQ_GAIN_1 +198 0x4848 //RX_FDEQ_GAIN_2 +199 0x4848 //RX_FDEQ_GAIN_3 +200 0x4848 //RX_FDEQ_GAIN_4 +201 0x4848 //RX_FDEQ_GAIN_5 +202 0x4848 //RX_FDEQ_GAIN_6 +203 0x4848 //RX_FDEQ_GAIN_7 +204 0x4848 //RX_FDEQ_GAIN_8 +205 0x4848 //RX_FDEQ_GAIN_9 +206 0x4848 //RX_FDEQ_GAIN_10 +207 0x4848 //RX_FDEQ_GAIN_11 +208 0x4848 //RX_FDEQ_GAIN_12 +209 0x4848 //RX_FDEQ_GAIN_13 +210 0x4848 //RX_FDEQ_GAIN_14 +211 0x4848 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0202 //RX_FDEQ_BIN_0 +221 0x0203 //RX_FDEQ_BIN_1 +222 0x0303 //RX_FDEQ_BIN_2 +223 0x0304 //RX_FDEQ_BIN_3 +224 0x0405 //RX_FDEQ_BIN_4 +225 0x0506 //RX_FDEQ_BIN_5 +226 0x0708 //RX_FDEQ_BIN_6 +227 0x090A //RX_FDEQ_BIN_7 +228 0x0B0C //RX_FDEQ_BIN_8 +229 0x0D0E //RX_FDEQ_BIN_9 +230 0x1013 //RX_FDEQ_BIN_10 +231 0x1719 //RX_FDEQ_BIN_11 +232 0x1B1E //RX_FDEQ_BIN_12 +233 0x1E1E //RX_FDEQ_BIN_13 +234 0x1E28 //RX_FDEQ_BIN_14 +235 0x282C //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x4000 //RX_FDEQ_RESRV_0 +245 0x0320 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0030 //RX_FDDRC_BAND_MARGIN_1 +248 0x0050 //RX_FDDRC_BAND_MARGIN_2 +249 0x0080 //RX_FDDRC_BAND_MARGIN_3 +250 0x0007 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x5000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x6400 //RX_FDDRC_THRD_3_2 +258 0x6400 //RX_FDDRC_THRD_3_3 +259 0x2000 //RX_FDDRC_SLANT_0_0 +260 0x2000 //RX_FDDRC_SLANT_0_1 +261 0x2000 //RX_FDDRC_SLANT_0_2 +262 0x2000 //RX_FDDRC_SLANT_0_3 +263 0x5333 //RX_FDDRC_SLANT_1_0 +264 0x5333 //RX_FDDRC_SLANT_1_1 +265 0x5333 //RX_FDDRC_SLANT_1_2 +266 0x5333 //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +286 0x0100 //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 +#VOL 6 +163 0x3000 //RX_TDDRC_ALPHA_UP_1 +164 0x3000 //RX_TDDRC_ALPHA_UP_2 +165 0x3000 //RX_TDDRC_ALPHA_UP_3 +166 0x3000 //RX_TDDRC_ALPHA_UP_4 +184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +190 0x7FFF //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +269 0x0000 //RX_TDDRC_THRD_0 +270 0x0000 //RX_TDDRC_THRD_1 +271 0x7FFF //RX_TDDRC_THRD_2 +272 0x7FFF //RX_TDDRC_THRD_3 +273 0x7FFF //RX_TDDRC_SLANT_0 +274 0x7FFF //RX_TDDRC_SLANT_1 +275 0x3000 //RX_TDDRC_ALPHA_UP_0 +276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x199A //RX_TDDRC_HMNC_GAIN +279 0x0001 //RX_TDDRC_SMT_FLAG +280 0x0CCD //RX_TDDRC_SMT_W +281 0x0155 //RX_TDDRC_DRC_GAIN +195 0x0020 //RX_FDEQ_SUBNUM +196 0x4848 //RX_FDEQ_GAIN_0 +197 0x4848 //RX_FDEQ_GAIN_1 +198 0x4848 //RX_FDEQ_GAIN_2 +199 0x4848 //RX_FDEQ_GAIN_3 +200 0x4848 //RX_FDEQ_GAIN_4 +201 0x4848 //RX_FDEQ_GAIN_5 +202 0x4848 //RX_FDEQ_GAIN_6 +203 0x4848 //RX_FDEQ_GAIN_7 +204 0x4848 //RX_FDEQ_GAIN_8 +205 0x4848 //RX_FDEQ_GAIN_9 +206 0x4848 //RX_FDEQ_GAIN_10 +207 0x4848 //RX_FDEQ_GAIN_11 +208 0x4848 //RX_FDEQ_GAIN_12 +209 0x4848 //RX_FDEQ_GAIN_13 +210 0x4848 //RX_FDEQ_GAIN_14 +211 0x4848 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0202 //RX_FDEQ_BIN_0 +221 0x0203 //RX_FDEQ_BIN_1 +222 0x0303 //RX_FDEQ_BIN_2 +223 0x0304 //RX_FDEQ_BIN_3 +224 0x0405 //RX_FDEQ_BIN_4 +225 0x0506 //RX_FDEQ_BIN_5 +226 0x0708 //RX_FDEQ_BIN_6 +227 0x090A //RX_FDEQ_BIN_7 +228 0x0B0C //RX_FDEQ_BIN_8 +229 0x0D0E //RX_FDEQ_BIN_9 +230 0x1013 //RX_FDEQ_BIN_10 +231 0x1719 //RX_FDEQ_BIN_11 +232 0x1B1E //RX_FDEQ_BIN_12 +233 0x1E1E //RX_FDEQ_BIN_13 +234 0x1E28 //RX_FDEQ_BIN_14 +235 0x282C //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x4000 //RX_FDEQ_RESRV_0 +245 0x0320 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0030 //RX_FDDRC_BAND_MARGIN_1 +248 0x0050 //RX_FDDRC_BAND_MARGIN_2 +249 0x0080 //RX_FDDRC_BAND_MARGIN_3 +250 0x0007 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x5000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x6400 //RX_FDDRC_THRD_3_2 +258 0x6400 //RX_FDDRC_THRD_3_3 +259 0x2000 //RX_FDDRC_SLANT_0_0 +260 0x2000 //RX_FDDRC_SLANT_0_1 +261 0x2000 //RX_FDDRC_SLANT_0_2 +262 0x2000 //RX_FDDRC_SLANT_0_3 +263 0x5333 //RX_FDDRC_SLANT_1_0 +264 0x5333 //RX_FDDRC_SLANT_1_1 +265 0x5333 //RX_FDDRC_SLANT_1_2 +266 0x5333 //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +286 0x0100 //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 #CASE_NAME BLUETOOTH-BTNB_NREC-VOICE_GENERIC-FB -#PARAM_TYPE TX+RX -#TOTAL_CUSTOM_STEP 7 +#PARAM_MODE Full +#PARAM_TYPE TX+2RX +#TOTAL_CUSTOM_STEP 7+7 #TX 0 0x0009 //TX_OPERATION_MODE_0 1 0x0009 //TX_OPERATION_MODE_1 @@ -21294,10 +32299,10 @@ 248 0xF600 //TX_THR_SN_EST_6 249 0xF600 //TX_THR_SN_EST_7 250 0x0200 //TX_DELTA_THR_SN_EST_0 -251 0x0200 //TX_DELTA_THR_SN_EST_1 -252 0x0400 //TX_DELTA_THR_SN_EST_2 -253 0x0300 //TX_DELTA_THR_SN_EST_3 -254 0x0600 //TX_DELTA_THR_SN_EST_4 +251 0x0400 //TX_DELTA_THR_SN_EST_1 +252 0x0300 //TX_DELTA_THR_SN_EST_2 +253 0x0600 //TX_DELTA_THR_SN_EST_3 +254 0x0200 //TX_DELTA_THR_SN_EST_4 255 0x0200 //TX_DELTA_THR_SN_EST_5 256 0x0200 //TX_DELTA_THR_SN_EST_6 257 0x0200 //TX_DELTA_THR_SN_EST_7 @@ -21325,31 +32330,31 @@ 279 0x2000 //TX_B_POST_FLT_0 280 0x2000 //TX_B_POST_FLT_1 281 0x0012 //TX_NS_LVL_CTRL_0 -282 0x0019 //TX_NS_LVL_CTRL_1 +282 0x0016 //TX_NS_LVL_CTRL_1 283 0x0016 //TX_NS_LVL_CTRL_2 -284 0x0016 //TX_NS_LVL_CTRL_3 -285 0x0019 //TX_NS_LVL_CTRL_4 +284 0x0019 //TX_NS_LVL_CTRL_3 +285 0x0010 //TX_NS_LVL_CTRL_4 286 0x0010 //TX_NS_LVL_CTRL_5 -287 0x0010 //TX_NS_LVL_CTRL_6 +287 0x0019 //TX_NS_LVL_CTRL_6 288 0x0010 //TX_NS_LVL_CTRL_7 289 0x000C //TX_MIN_GAIN_S_0 -290 0x0011 //TX_MIN_GAIN_S_1 +290 0x000C //TX_MIN_GAIN_S_1 291 0x000C //TX_MIN_GAIN_S_2 -292 0x000C //TX_MIN_GAIN_S_3 -293 0x000F //TX_MIN_GAIN_S_4 +292 0x000F //TX_MIN_GAIN_S_3 +293 0x000C //TX_MIN_GAIN_S_4 294 0x000C //TX_MIN_GAIN_S_5 -295 0x000C //TX_MIN_GAIN_S_6 +295 0x0011 //TX_MIN_GAIN_S_6 296 0x000C //TX_MIN_GAIN_S_7 297 0x7FFF //TX_NMOS_SUP 298 0x0000 //TX_NS_MAX_PRI_SNR_TH 299 0x0000 //TX_NMOS_SUP_MENSA 300 0x7000 //TX_SNRI_SUP_0 -301 0x6000 //TX_SNRI_SUP_1 +301 0x7000 //TX_SNRI_SUP_1 302 0x7000 //TX_SNRI_SUP_2 -303 0x7000 //TX_SNRI_SUP_3 -304 0x6000 //TX_SNRI_SUP_4 +303 0x6000 //TX_SNRI_SUP_3 +304 0x7FFF //TX_SNRI_SUP_4 305 0x7FFF //TX_SNRI_SUP_5 -306 0x7FFF //TX_SNRI_SUP_6 +306 0x6000 //TX_SNRI_SUP_6 307 0x7FFF //TX_SNRI_SUP_7 308 0x7FFF //TX_THR_LFNS 309 0x0016 //TX_G_LFNS @@ -21366,8 +32371,8 @@ 320 0x6000 //TX_A_POST_FILT_S_6 321 0x6000 //TX_A_POST_FILT_S_7 322 0x2000 //TX_B_POST_FILT_0 -323 0x2000 //TX_B_POST_FILT_1 -324 0x4000 //TX_B_POST_FILT_2 +323 0x4000 //TX_B_POST_FILT_1 +324 0x2000 //TX_B_POST_FILT_2 325 0x2000 //TX_B_POST_FILT_3 326 0x2000 //TX_B_POST_FILT_4 327 0x2000 //TX_B_POST_FILT_5 @@ -21423,10 +32428,10 @@ 377 0x0000 //TX_NOISE_TH_5_4 378 0x02BC //TX_NOISE_TH_6 379 0x0020 //TX_MINENOISE_TH -380 0x4000 //TX_MINENOISE_MIC0_TH_MTS -381 0xFFEE //TX_MINENOISE_MIC0_TH_EXP -382 0x6000 //TX_MINENOISE_MIC0_S_TH_MTS -383 0xFFF3 //TX_MINENOISE_MIC0_S_TH_EXP +380 0x4000 //TX_MORENS_TFMASK_TH +381 0xFFEE //TX_DRC_QUIET_FLOOR +382 0x6000 //TX_RATIODTL_CUT_TH +383 0xFFF3 //TX_DT_CUT_K1 384 0x0666 //TX_OUT_ENER_S_TH_CLEAN 385 0x0666 //TX_OUT_ENER_S_TH_LESSCLEAN 386 0x0333 //TX_OUT_ENER_S_TH_NOISY @@ -21434,15 +32439,15 @@ 388 0x0333 //TX_OUT_ENER_TH_SPEECH 389 0x2000 //TX_SN_NPB_GAIN 390 0x0000 //TX_NN_NPB_GAIN -391 0x0000 //TX_CSX_ALPHA_0 -392 0x0000 //TX_CSX_ALPHA_1 -393 0x0000 //TX_CSX_ALPHA_2 -394 0x0000 //TX_CSX_ALPHA_3 -395 0x0800 //TX_MU_ARSP_EST -396 0x00C8 //TX_P_OUTBEAM_MIN_TH +391 0x0000 //TX_POST_MASK_SUP_HSNE +392 0x0000 //TX_TAIL_DET_TH +393 0x0000 //TX_B_LESSCUT_RTO_WTA +394 0x0000 //TX_MEL_G_R +395 0x0800 //TX_SUPHIGH_TH +396 0x00C8 //TX_MASK_G_R 397 0x0002 //TX_EXTRA_NS_L -398 0x0800 //TX_EXTRA_NS_A -399 0x0005 //TX_VR_NOISE_FLOOR_TH +398 0x0800 //TX_C_POST_FLT_MASK +399 0x0005 //TX_A_POST_FLT_WNS 400 0x0148 //TX_MIN_G_LOW300HZ 401 0x0002 //TX_MAXLEVEL_CNG 402 0x00B4 //TX_STN_NOISE_TH @@ -21557,16 +32562,16 @@ 511 0x6666 //TX_MIC_TO_BFGAIN 512 0x0000 //TX_MICTOBFGAIN0 513 0x0000 //TX_FASTMUE_TH -514 0x0000 //TX_DERVB_LEN_0 -515 0x0000 //TX_DERVB_LEN_1 -516 0x0000 //TX_RHO_DERVB -517 0x0000 //TX_MIC_INDX_DERVB -518 0x0000 //TX_MU_DERVB -519 0x0000 //TX_DR_RESRV_0 -520 0x0000 //TX_DR_RESRV_1 -521 0x0000 //TX_DR_RESRV_2 -522 0x0000 //TX_DR_RESRV_3 -523 0x0000 //TX_DR_RESRV_4 +514 0x0000 //TX_DEREVERB_LF_MU +515 0x0000 //TX_DEREVERB_HF_MU +516 0x0000 //TX_DEREVERB_DELAY +517 0x0000 //TX_DEREVERB_COEF_LEN +518 0x0000 //TX_DEREVERB_DNR +519 0x0000 //TX_DEREVERB_ALPHA +520 0x0000 //TX_DEREVERB_BETA +521 0x0000 //TX_GSC_RTOL_TH +522 0x0000 //TX_GSC_RTOH_TH +523 0x0000 //TX_WIDE2_MEANHTH 524 0x0000 //TX_DR_RESRV_5 525 0x0000 //TX_DR_RESRV_6 526 0x0000 //TX_DR_RESRV_7 @@ -21940,8 +32945,73 @@ 894 0xC000 //TX_FASTNS_SSA_THHFL 895 0xCCCC //TX_FASTNS_SSA_THLFH 896 0xD999 //TX_FASTNS_SSA_THHFH +897 0x0000 //TX_SENDFUNC_REG_MICMUTE +898 0x0000 //TX_SENDFUNC_REG_MICMUTE1 +899 0x0000 //TX_MICMUTE_RATIO_THR +900 0x0000 //TX_MICMUTE_AMP_THR +901 0x0000 //TX_MICMUTE_HPF_IND +902 0x0000 //TX_MICMUTE_LOG_EYR_TH +903 0x0000 //TX_MICMUTE_CVG_TIME +904 0x0000 //TX_MICMUTE_RELEASE_TIME +905 0x0000 //TX_MIC_VOLUME_MIC0MUTE +906 0x0000 //TX_MICMUTE_EPD_OFFSET_0 +907 0x0000 //TX_MICMUTE_FRQ_AEC_L +908 0x0000 //TX_MICMUTE_EAD_THR +909 0x0000 //TX_MICMUTE_LAMBDA_CB_NLE +910 0x0000 //TX_MICMUTE_LAMBDA_RE_EST +911 0x0000 //TX_DTD_THR1_MICMUTE_0 +912 0x0000 //TX_DTD_THR1_MICMUTE_1 +913 0x0000 //TX_DTD_THR1_MICMUTE_2 +914 0x0000 //TX_DTD_THR1_MICMUTE_3 +915 0x0000 //TX_DTD_THR2_MICMUTE_0 +916 0x0000 //TX_MICMUTE_MIN_EQ_RE_EST_0 +917 0x0000 //TX_MICMUTE_MIN_EQ_RE_EST_1 +918 0x0000 //TX_MICMUTE_MIN_EQ_RE_EST_2 +919 0x0000 //TX_MICMUTE_MIN_EQ_RE_EST_3 +920 0x0000 //TX_MICMUTE_MIN_EQ_RE_EST_4 +921 0x0000 //TX_MICMUTE_C_POST_FLT +922 0x0000 //TX_MICMUTE_DT_CUT_K +923 0x0000 //TX_MICMUTE_DT_CUT_THR +924 0x0000 //TX_MICMUTE_DT_CUT_K2 +925 0x0000 //TX_MICMUTE_DT_CUT_THR2 +926 0x0000 //TX_MICMUTE_DT2_HOLD_N +927 0x0000 //TX_MICMUTE_RATIODTH_THCUT +928 0x0000 //TX_MICMUTE_B_POST_FLT_ECHOL +929 0x0000 //TX_MICMUTE_B_POST_FLT_ECHOH +930 0x0000 //TX_MICMUTE_C_POST_FLT_MASK +931 0x0000 //TX_MICMUTE_RATIODTL_CUT_TH +932 0x0000 //TX_MICMUTE_DT_CUT_K1 +933 0x0000 //TX_MICMUTE_N2_SN_EST +934 0x0000 //TX_MICMUTE_THR_SN_EST_0 +935 0x0000 //TX_MICMUTE_MIN_G_CTRL_0 +936 0x0000 //TX_MICMUTE_A_POST_FILT_S_0 +937 0x0000 //TX_MICMUTE_B_POST_FILT_0 +938 0x0000 //TX_MIC1RUB_AMP_THR +939 0x0000 //TX_MIC1MUTE_RATIO_THR +940 0x0000 //TX_MIC1MUTE_AMP_THR +941 0x0000 //TX_MIC1MUTE_CVG_TIME +942 0x0000 //TX_MIC1MUTE_RELEASE_TIME +943 0x0000 //TX_AMS_RESRV_01 +944 0x0000 //TX_AMS_RESRV_02 +945 0x0000 //TX_AMS_RESRV_03 +946 0x0000 //TX_AMS_RESRV_04 +947 0x0000 //TX_AMS_RESRV_05 +948 0x0000 //TX_AMS_RESRV_06 +949 0x0000 //TX_AMS_RESRV_07 +950 0x0000 //TX_AMS_RESRV_08 +951 0x0000 //TX_AMS_RESRV_09 +952 0x0000 //TX_AMS_RESRV_10 +953 0x0000 //TX_AMS_RESRV_11 +954 0x0000 //TX_AMS_RESRV_12 +955 0x0000 //TX_AMS_RESRV_13 +956 0x0000 //TX_AMS_RESRV_14 +957 0x0000 //TX_AMS_RESRV_15 +958 0x0000 //TX_AMS_RESRV_16 +959 0x0000 //TX_AMS_RESRV_17 +960 0x0000 //TX_AMS_RESRV_18 +961 0x0000 //TX_AMS_RESRV_19 #RX -0 0x0064 //RX_RECVFUNC_MODE_0 +0 0x2064 //RX_RECVFUNC_MODE_0 1 0x0000 //RX_RECVFUNC_MODE_1 2 0x0004 //RX_SAMPLINGFREQ_SIG 3 0x0004 //RX_SAMPLINGFREQ_PROC @@ -22791,10 +33861,862 @@ 110 0x0000 //RX_FDDRC_RESRV_0 129 0x0100 //RX_SPK_VOL 130 0x0000 //RX_VOL_RESRV_0 +#RX 2 +157 0x0064 //RX_RECVFUNC_MODE_0 +158 0x0000 //RX_RECVFUNC_MODE_1 +159 0x0004 //RX_SAMPLINGFREQ_SIG +160 0x0004 //RX_SAMPLINGFREQ_PROC +161 0x000A //RX_FRAME_SZ +162 0x0000 //RX_DELAY_OPT +163 0x1000 //RX_TDDRC_ALPHA_UP_1 +164 0x1000 //RX_TDDRC_ALPHA_UP_2 +165 0x1000 //RX_TDDRC_ALPHA_UP_3 +166 0x1000 //RX_TDDRC_ALPHA_UP_4 +167 0x0800 //RX_PGA +168 0x7FFF //RX_A_HP +169 0x4000 //RX_B_PE +170 0x7800 //RX_THR_PITCH_DET_0 +171 0x7000 //RX_THR_PITCH_DET_1 +172 0x6000 //RX_THR_PITCH_DET_2 +173 0x0008 //RX_PITCH_BFR_LEN +174 0x0003 //RX_SBD_PITCH_DET +175 0x0100 //RX_PP_RESRV_0 +176 0x0020 //RX_PP_RESRV_1 +177 0x0500 //RX_N_SN_EST +178 0x000C //RX_N2_SN_EST +179 0x000A //RX_NS_LVL_CTRL +180 0xF600 //RX_THR_SN_EST +181 0x7000 //RX_LAMBDA_PFILT +182 0x000A //RX_FENS_RESRV_0 +183 0x0190 //RX_FENS_RESRV_1 +184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +187 0x0002 //RX_EXTRA_NS_L +188 0x0800 //RX_EXTRA_NS_A +189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +190 0x7FFF //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +192 0x199A //RX_A_POST_FLT +193 0x0000 //RX_LMT_THRD +194 0x4000 //RX_LMT_ALPHA +195 0x0020 //RX_FDEQ_SUBNUM +196 0x4848 //RX_FDEQ_GAIN_0 +197 0x4848 //RX_FDEQ_GAIN_1 +198 0x4848 //RX_FDEQ_GAIN_2 +199 0x4848 //RX_FDEQ_GAIN_3 +200 0x4848 //RX_FDEQ_GAIN_4 +201 0x4848 //RX_FDEQ_GAIN_5 +202 0x4848 //RX_FDEQ_GAIN_6 +203 0x4848 //RX_FDEQ_GAIN_7 +204 0x4848 //RX_FDEQ_GAIN_8 +205 0x4848 //RX_FDEQ_GAIN_9 +206 0x4848 //RX_FDEQ_GAIN_10 +207 0x4848 //RX_FDEQ_GAIN_11 +208 0x4848 //RX_FDEQ_GAIN_12 +209 0x4848 //RX_FDEQ_GAIN_13 +210 0x4848 //RX_FDEQ_GAIN_14 +211 0x4848 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0202 //RX_FDEQ_BIN_0 +221 0x0203 //RX_FDEQ_BIN_1 +222 0x0304 //RX_FDEQ_BIN_2 +223 0x0405 //RX_FDEQ_BIN_3 +224 0x0607 //RX_FDEQ_BIN_4 +225 0x0809 //RX_FDEQ_BIN_5 +226 0x0A0B //RX_FDEQ_BIN_6 +227 0x0C0D //RX_FDEQ_BIN_7 +228 0x0E0F //RX_FDEQ_BIN_8 +229 0x1011 //RX_FDEQ_BIN_9 +230 0x1214 //RX_FDEQ_BIN_10 +231 0x1618 //RX_FDEQ_BIN_11 +232 0x1C1C //RX_FDEQ_BIN_12 +233 0x2020 //RX_FDEQ_BIN_13 +234 0x2020 //RX_FDEQ_BIN_14 +235 0x2011 //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x4000 //RX_FDEQ_RESRV_0 +245 0x0320 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0030 //RX_FDDRC_BAND_MARGIN_1 +248 0x0050 //RX_FDDRC_BAND_MARGIN_2 +249 0x0080 //RX_FDDRC_BAND_MARGIN_3 +250 0x0007 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x5000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x6400 //RX_FDDRC_THRD_3_2 +258 0x6400 //RX_FDDRC_THRD_3_3 +259 0x2000 //RX_FDDRC_SLANT_0_0 +260 0x2000 //RX_FDDRC_SLANT_0_1 +261 0x2000 //RX_FDDRC_SLANT_0_2 +262 0x2000 //RX_FDDRC_SLANT_0_3 +263 0x5333 //RX_FDDRC_SLANT_1_0 +264 0x5333 //RX_FDDRC_SLANT_1_1 +265 0x5333 //RX_FDDRC_SLANT_1_2 +266 0x5333 //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +268 0x0000 //RX_FILTINDX +269 0x0000 //RX_TDDRC_THRD_0 +270 0x0000 //RX_TDDRC_THRD_1 +271 0x7FFF //RX_TDDRC_THRD_2 +272 0x7FFF //RX_TDDRC_THRD_3 +273 0x7FFF //RX_TDDRC_SLANT_0 +274 0x7FFF //RX_TDDRC_SLANT_1 +275 0x1000 //RX_TDDRC_ALPHA_UP_0 +276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x199A //RX_TDDRC_HMNC_GAIN +279 0x0001 //RX_TDDRC_SMT_FLAG +280 0x0CCD //RX_TDDRC_SMT_W +281 0x0155 //RX_TDDRC_DRC_GAIN +282 0x7C00 //RX_LAMBDA_PKA_FP +283 0x2000 //RX_TPKA_FP +284 0x2000 //RX_MIN_G_FP +285 0x0080 //RX_MAX_G_FP +286 0x0100 //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 +288 0x0000 //RX_MAXLEVEL_CNG +289 0x3000 //RX_BWE_UV_TH +290 0x3000 //RX_BWE_UV_TH2 +291 0x1800 //RX_BWE_UV_TH3 +292 0x1000 //RX_BWE_V_TH +293 0x04CD //RX_BWE_GAIN1_V_TH1 +294 0x0F33 //RX_BWE_GAIN1_V_TH2 +295 0x7333 //RX_BWE_UV_EQ +296 0x199A //RX_BWE_V_EQ +297 0x7333 //RX_BWE_TONE_TH +298 0x0004 //RX_BWE_UV_HOLD_T +299 0x6CCD //RX_BWE_GAIN2_ALPHA +300 0x799A //RX_BWE_GAIN3_ALPHA +301 0x001E //RX_BWE_CUTOFF +302 0x3000 //RX_BWE_GAINFILL +303 0x3200 //RX_BWE_MAXTH_TONE +304 0x2000 //RX_BWE_EQ_0 +305 0x2000 //RX_BWE_EQ_1 +306 0x2000 //RX_BWE_EQ_2 +307 0x2000 //RX_BWE_EQ_3 +308 0x2000 //RX_BWE_EQ_4 +309 0x2000 //RX_BWE_EQ_5 +310 0x2000 //RX_BWE_EQ_6 +311 0x0000 //RX_BWE_RESRV_0 +312 0x0000 //RX_BWE_RESRV_1 +313 0x0000 //RX_BWE_RESRV_2 +#VOL 0 +163 0x1000 //RX_TDDRC_ALPHA_UP_1 +164 0x1000 //RX_TDDRC_ALPHA_UP_2 +165 0x1000 //RX_TDDRC_ALPHA_UP_3 +166 0x1000 //RX_TDDRC_ALPHA_UP_4 +184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +190 0x7FFF //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +269 0x0000 //RX_TDDRC_THRD_0 +270 0x0000 //RX_TDDRC_THRD_1 +271 0x7FFF //RX_TDDRC_THRD_2 +272 0x7FFF //RX_TDDRC_THRD_3 +273 0x7FFF //RX_TDDRC_SLANT_0 +274 0x7FFF //RX_TDDRC_SLANT_1 +275 0x1000 //RX_TDDRC_ALPHA_UP_0 +276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x199A //RX_TDDRC_HMNC_GAIN +279 0x0001 //RX_TDDRC_SMT_FLAG +280 0x0CCD //RX_TDDRC_SMT_W +281 0x0155 //RX_TDDRC_DRC_GAIN +195 0x0020 //RX_FDEQ_SUBNUM +196 0x4848 //RX_FDEQ_GAIN_0 +197 0x4848 //RX_FDEQ_GAIN_1 +198 0x4848 //RX_FDEQ_GAIN_2 +199 0x4848 //RX_FDEQ_GAIN_3 +200 0x4848 //RX_FDEQ_GAIN_4 +201 0x4848 //RX_FDEQ_GAIN_5 +202 0x4848 //RX_FDEQ_GAIN_6 +203 0x4848 //RX_FDEQ_GAIN_7 +204 0x4848 //RX_FDEQ_GAIN_8 +205 0x4848 //RX_FDEQ_GAIN_9 +206 0x4848 //RX_FDEQ_GAIN_10 +207 0x4848 //RX_FDEQ_GAIN_11 +208 0x4848 //RX_FDEQ_GAIN_12 +209 0x4848 //RX_FDEQ_GAIN_13 +210 0x4848 //RX_FDEQ_GAIN_14 +211 0x4848 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0202 //RX_FDEQ_BIN_0 +221 0x0203 //RX_FDEQ_BIN_1 +222 0x0304 //RX_FDEQ_BIN_2 +223 0x0405 //RX_FDEQ_BIN_3 +224 0x0607 //RX_FDEQ_BIN_4 +225 0x0809 //RX_FDEQ_BIN_5 +226 0x0A0B //RX_FDEQ_BIN_6 +227 0x0C0D //RX_FDEQ_BIN_7 +228 0x0E0F //RX_FDEQ_BIN_8 +229 0x1011 //RX_FDEQ_BIN_9 +230 0x1214 //RX_FDEQ_BIN_10 +231 0x1618 //RX_FDEQ_BIN_11 +232 0x1C1C //RX_FDEQ_BIN_12 +233 0x2020 //RX_FDEQ_BIN_13 +234 0x2020 //RX_FDEQ_BIN_14 +235 0x2011 //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x4000 //RX_FDEQ_RESRV_0 +245 0x0320 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0030 //RX_FDDRC_BAND_MARGIN_1 +248 0x0050 //RX_FDDRC_BAND_MARGIN_2 +249 0x0080 //RX_FDDRC_BAND_MARGIN_3 +250 0x0007 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x5000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x6400 //RX_FDDRC_THRD_3_2 +258 0x6400 //RX_FDDRC_THRD_3_3 +259 0x2000 //RX_FDDRC_SLANT_0_0 +260 0x2000 //RX_FDDRC_SLANT_0_1 +261 0x2000 //RX_FDDRC_SLANT_0_2 +262 0x2000 //RX_FDDRC_SLANT_0_3 +263 0x5333 //RX_FDDRC_SLANT_1_0 +264 0x5333 //RX_FDDRC_SLANT_1_1 +265 0x5333 //RX_FDDRC_SLANT_1_2 +266 0x5333 //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +286 0x0100 //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 +#VOL 1 +163 0x1000 //RX_TDDRC_ALPHA_UP_1 +164 0x1000 //RX_TDDRC_ALPHA_UP_2 +165 0x1000 //RX_TDDRC_ALPHA_UP_3 +166 0x1000 //RX_TDDRC_ALPHA_UP_4 +184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +190 0x7FFF //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +269 0x0000 //RX_TDDRC_THRD_0 +270 0x0000 //RX_TDDRC_THRD_1 +271 0x7FFF //RX_TDDRC_THRD_2 +272 0x7FFF //RX_TDDRC_THRD_3 +273 0x7FFF //RX_TDDRC_SLANT_0 +274 0x7FFF //RX_TDDRC_SLANT_1 +275 0x1000 //RX_TDDRC_ALPHA_UP_0 +276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x199A //RX_TDDRC_HMNC_GAIN +279 0x0001 //RX_TDDRC_SMT_FLAG +280 0x0CCD //RX_TDDRC_SMT_W +281 0x0155 //RX_TDDRC_DRC_GAIN +195 0x0020 //RX_FDEQ_SUBNUM +196 0x4848 //RX_FDEQ_GAIN_0 +197 0x4848 //RX_FDEQ_GAIN_1 +198 0x4848 //RX_FDEQ_GAIN_2 +199 0x4848 //RX_FDEQ_GAIN_3 +200 0x4848 //RX_FDEQ_GAIN_4 +201 0x4848 //RX_FDEQ_GAIN_5 +202 0x4848 //RX_FDEQ_GAIN_6 +203 0x4848 //RX_FDEQ_GAIN_7 +204 0x4848 //RX_FDEQ_GAIN_8 +205 0x4848 //RX_FDEQ_GAIN_9 +206 0x4848 //RX_FDEQ_GAIN_10 +207 0x4848 //RX_FDEQ_GAIN_11 +208 0x4848 //RX_FDEQ_GAIN_12 +209 0x4848 //RX_FDEQ_GAIN_13 +210 0x4848 //RX_FDEQ_GAIN_14 +211 0x4848 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0202 //RX_FDEQ_BIN_0 +221 0x0203 //RX_FDEQ_BIN_1 +222 0x0304 //RX_FDEQ_BIN_2 +223 0x0405 //RX_FDEQ_BIN_3 +224 0x0607 //RX_FDEQ_BIN_4 +225 0x0809 //RX_FDEQ_BIN_5 +226 0x0A0B //RX_FDEQ_BIN_6 +227 0x0C0D //RX_FDEQ_BIN_7 +228 0x0E0F //RX_FDEQ_BIN_8 +229 0x1011 //RX_FDEQ_BIN_9 +230 0x1214 //RX_FDEQ_BIN_10 +231 0x1618 //RX_FDEQ_BIN_11 +232 0x1C1C //RX_FDEQ_BIN_12 +233 0x2020 //RX_FDEQ_BIN_13 +234 0x2020 //RX_FDEQ_BIN_14 +235 0x2011 //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x4000 //RX_FDEQ_RESRV_0 +245 0x0320 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0030 //RX_FDDRC_BAND_MARGIN_1 +248 0x0050 //RX_FDDRC_BAND_MARGIN_2 +249 0x0080 //RX_FDDRC_BAND_MARGIN_3 +250 0x0007 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x5000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x6400 //RX_FDDRC_THRD_3_2 +258 0x6400 //RX_FDDRC_THRD_3_3 +259 0x2000 //RX_FDDRC_SLANT_0_0 +260 0x2000 //RX_FDDRC_SLANT_0_1 +261 0x2000 //RX_FDDRC_SLANT_0_2 +262 0x2000 //RX_FDDRC_SLANT_0_3 +263 0x5333 //RX_FDDRC_SLANT_1_0 +264 0x5333 //RX_FDDRC_SLANT_1_1 +265 0x5333 //RX_FDDRC_SLANT_1_2 +266 0x5333 //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +286 0x0100 //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 +#VOL 2 +163 0x1000 //RX_TDDRC_ALPHA_UP_1 +164 0x1000 //RX_TDDRC_ALPHA_UP_2 +165 0x1000 //RX_TDDRC_ALPHA_UP_3 +166 0x1000 //RX_TDDRC_ALPHA_UP_4 +184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +190 0x7FFF //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +269 0x0000 //RX_TDDRC_THRD_0 +270 0x0000 //RX_TDDRC_THRD_1 +271 0x7FFF //RX_TDDRC_THRD_2 +272 0x7FFF //RX_TDDRC_THRD_3 +273 0x7FFF //RX_TDDRC_SLANT_0 +274 0x7FFF //RX_TDDRC_SLANT_1 +275 0x1000 //RX_TDDRC_ALPHA_UP_0 +276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x199A //RX_TDDRC_HMNC_GAIN +279 0x0001 //RX_TDDRC_SMT_FLAG +280 0x0CCD //RX_TDDRC_SMT_W +281 0x0155 //RX_TDDRC_DRC_GAIN +195 0x0020 //RX_FDEQ_SUBNUM +196 0x4848 //RX_FDEQ_GAIN_0 +197 0x4848 //RX_FDEQ_GAIN_1 +198 0x4848 //RX_FDEQ_GAIN_2 +199 0x4848 //RX_FDEQ_GAIN_3 +200 0x4848 //RX_FDEQ_GAIN_4 +201 0x4848 //RX_FDEQ_GAIN_5 +202 0x4848 //RX_FDEQ_GAIN_6 +203 0x4848 //RX_FDEQ_GAIN_7 +204 0x4848 //RX_FDEQ_GAIN_8 +205 0x4848 //RX_FDEQ_GAIN_9 +206 0x4848 //RX_FDEQ_GAIN_10 +207 0x4848 //RX_FDEQ_GAIN_11 +208 0x4848 //RX_FDEQ_GAIN_12 +209 0x4848 //RX_FDEQ_GAIN_13 +210 0x4848 //RX_FDEQ_GAIN_14 +211 0x4848 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0202 //RX_FDEQ_BIN_0 +221 0x0203 //RX_FDEQ_BIN_1 +222 0x0304 //RX_FDEQ_BIN_2 +223 0x0405 //RX_FDEQ_BIN_3 +224 0x0607 //RX_FDEQ_BIN_4 +225 0x0809 //RX_FDEQ_BIN_5 +226 0x0A0B //RX_FDEQ_BIN_6 +227 0x0C0D //RX_FDEQ_BIN_7 +228 0x0E0F //RX_FDEQ_BIN_8 +229 0x1011 //RX_FDEQ_BIN_9 +230 0x1214 //RX_FDEQ_BIN_10 +231 0x1618 //RX_FDEQ_BIN_11 +232 0x1C1C //RX_FDEQ_BIN_12 +233 0x2020 //RX_FDEQ_BIN_13 +234 0x2020 //RX_FDEQ_BIN_14 +235 0x2011 //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x4000 //RX_FDEQ_RESRV_0 +245 0x0320 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0030 //RX_FDDRC_BAND_MARGIN_1 +248 0x0050 //RX_FDDRC_BAND_MARGIN_2 +249 0x0080 //RX_FDDRC_BAND_MARGIN_3 +250 0x0007 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x5000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x6400 //RX_FDDRC_THRD_3_2 +258 0x6400 //RX_FDDRC_THRD_3_3 +259 0x2000 //RX_FDDRC_SLANT_0_0 +260 0x2000 //RX_FDDRC_SLANT_0_1 +261 0x2000 //RX_FDDRC_SLANT_0_2 +262 0x2000 //RX_FDDRC_SLANT_0_3 +263 0x5333 //RX_FDDRC_SLANT_1_0 +264 0x5333 //RX_FDDRC_SLANT_1_1 +265 0x5333 //RX_FDDRC_SLANT_1_2 +266 0x5333 //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +286 0x0100 //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 +#VOL 3 +163 0x1000 //RX_TDDRC_ALPHA_UP_1 +164 0x1000 //RX_TDDRC_ALPHA_UP_2 +165 0x1000 //RX_TDDRC_ALPHA_UP_3 +166 0x1000 //RX_TDDRC_ALPHA_UP_4 +184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +190 0x7FFF //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +269 0x0000 //RX_TDDRC_THRD_0 +270 0x0000 //RX_TDDRC_THRD_1 +271 0x7FFF //RX_TDDRC_THRD_2 +272 0x7FFF //RX_TDDRC_THRD_3 +273 0x7FFF //RX_TDDRC_SLANT_0 +274 0x7FFF //RX_TDDRC_SLANT_1 +275 0x1000 //RX_TDDRC_ALPHA_UP_0 +276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x199A //RX_TDDRC_HMNC_GAIN +279 0x0001 //RX_TDDRC_SMT_FLAG +280 0x0CCD //RX_TDDRC_SMT_W +281 0x0155 //RX_TDDRC_DRC_GAIN +195 0x0020 //RX_FDEQ_SUBNUM +196 0x4848 //RX_FDEQ_GAIN_0 +197 0x4848 //RX_FDEQ_GAIN_1 +198 0x4848 //RX_FDEQ_GAIN_2 +199 0x4848 //RX_FDEQ_GAIN_3 +200 0x4848 //RX_FDEQ_GAIN_4 +201 0x4848 //RX_FDEQ_GAIN_5 +202 0x4848 //RX_FDEQ_GAIN_6 +203 0x4848 //RX_FDEQ_GAIN_7 +204 0x4848 //RX_FDEQ_GAIN_8 +205 0x4848 //RX_FDEQ_GAIN_9 +206 0x4848 //RX_FDEQ_GAIN_10 +207 0x4848 //RX_FDEQ_GAIN_11 +208 0x4848 //RX_FDEQ_GAIN_12 +209 0x4848 //RX_FDEQ_GAIN_13 +210 0x4848 //RX_FDEQ_GAIN_14 +211 0x4848 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0202 //RX_FDEQ_BIN_0 +221 0x0203 //RX_FDEQ_BIN_1 +222 0x0304 //RX_FDEQ_BIN_2 +223 0x0405 //RX_FDEQ_BIN_3 +224 0x0607 //RX_FDEQ_BIN_4 +225 0x0809 //RX_FDEQ_BIN_5 +226 0x0A0B //RX_FDEQ_BIN_6 +227 0x0C0D //RX_FDEQ_BIN_7 +228 0x0E0F //RX_FDEQ_BIN_8 +229 0x1011 //RX_FDEQ_BIN_9 +230 0x1214 //RX_FDEQ_BIN_10 +231 0x1618 //RX_FDEQ_BIN_11 +232 0x1C1C //RX_FDEQ_BIN_12 +233 0x2020 //RX_FDEQ_BIN_13 +234 0x2020 //RX_FDEQ_BIN_14 +235 0x2011 //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x4000 //RX_FDEQ_RESRV_0 +245 0x0320 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0030 //RX_FDDRC_BAND_MARGIN_1 +248 0x0050 //RX_FDDRC_BAND_MARGIN_2 +249 0x0080 //RX_FDDRC_BAND_MARGIN_3 +250 0x0007 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x5000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x6400 //RX_FDDRC_THRD_3_2 +258 0x6400 //RX_FDDRC_THRD_3_3 +259 0x2000 //RX_FDDRC_SLANT_0_0 +260 0x2000 //RX_FDDRC_SLANT_0_1 +261 0x2000 //RX_FDDRC_SLANT_0_2 +262 0x2000 //RX_FDDRC_SLANT_0_3 +263 0x5333 //RX_FDDRC_SLANT_1_0 +264 0x5333 //RX_FDDRC_SLANT_1_1 +265 0x5333 //RX_FDDRC_SLANT_1_2 +266 0x5333 //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +286 0x0100 //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 +#VOL 4 +163 0x1000 //RX_TDDRC_ALPHA_UP_1 +164 0x1000 //RX_TDDRC_ALPHA_UP_2 +165 0x1000 //RX_TDDRC_ALPHA_UP_3 +166 0x1000 //RX_TDDRC_ALPHA_UP_4 +184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +190 0x7FFF //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +269 0x0000 //RX_TDDRC_THRD_0 +270 0x0000 //RX_TDDRC_THRD_1 +271 0x7FFF //RX_TDDRC_THRD_2 +272 0x7FFF //RX_TDDRC_THRD_3 +273 0x7FFF //RX_TDDRC_SLANT_0 +274 0x7FFF //RX_TDDRC_SLANT_1 +275 0x1000 //RX_TDDRC_ALPHA_UP_0 +276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x199A //RX_TDDRC_HMNC_GAIN +279 0x0001 //RX_TDDRC_SMT_FLAG +280 0x0CCD //RX_TDDRC_SMT_W +281 0x0155 //RX_TDDRC_DRC_GAIN +195 0x0020 //RX_FDEQ_SUBNUM +196 0x4848 //RX_FDEQ_GAIN_0 +197 0x4848 //RX_FDEQ_GAIN_1 +198 0x4848 //RX_FDEQ_GAIN_2 +199 0x4848 //RX_FDEQ_GAIN_3 +200 0x4848 //RX_FDEQ_GAIN_4 +201 0x4848 //RX_FDEQ_GAIN_5 +202 0x4848 //RX_FDEQ_GAIN_6 +203 0x4848 //RX_FDEQ_GAIN_7 +204 0x4848 //RX_FDEQ_GAIN_8 +205 0x4848 //RX_FDEQ_GAIN_9 +206 0x4848 //RX_FDEQ_GAIN_10 +207 0x4848 //RX_FDEQ_GAIN_11 +208 0x4848 //RX_FDEQ_GAIN_12 +209 0x4848 //RX_FDEQ_GAIN_13 +210 0x4848 //RX_FDEQ_GAIN_14 +211 0x4848 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0202 //RX_FDEQ_BIN_0 +221 0x0203 //RX_FDEQ_BIN_1 +222 0x0304 //RX_FDEQ_BIN_2 +223 0x0405 //RX_FDEQ_BIN_3 +224 0x0607 //RX_FDEQ_BIN_4 +225 0x0809 //RX_FDEQ_BIN_5 +226 0x0A0B //RX_FDEQ_BIN_6 +227 0x0C0D //RX_FDEQ_BIN_7 +228 0x0E0F //RX_FDEQ_BIN_8 +229 0x1011 //RX_FDEQ_BIN_9 +230 0x1214 //RX_FDEQ_BIN_10 +231 0x1618 //RX_FDEQ_BIN_11 +232 0x1C1C //RX_FDEQ_BIN_12 +233 0x2020 //RX_FDEQ_BIN_13 +234 0x2020 //RX_FDEQ_BIN_14 +235 0x2011 //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x4000 //RX_FDEQ_RESRV_0 +245 0x0320 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0030 //RX_FDDRC_BAND_MARGIN_1 +248 0x0050 //RX_FDDRC_BAND_MARGIN_2 +249 0x0080 //RX_FDDRC_BAND_MARGIN_3 +250 0x0007 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x5000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x6400 //RX_FDDRC_THRD_3_2 +258 0x6400 //RX_FDDRC_THRD_3_3 +259 0x2000 //RX_FDDRC_SLANT_0_0 +260 0x2000 //RX_FDDRC_SLANT_0_1 +261 0x2000 //RX_FDDRC_SLANT_0_2 +262 0x2000 //RX_FDDRC_SLANT_0_3 +263 0x5333 //RX_FDDRC_SLANT_1_0 +264 0x5333 //RX_FDDRC_SLANT_1_1 +265 0x5333 //RX_FDDRC_SLANT_1_2 +266 0x5333 //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +286 0x0100 //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 +#VOL 5 +163 0x1000 //RX_TDDRC_ALPHA_UP_1 +164 0x1000 //RX_TDDRC_ALPHA_UP_2 +165 0x1000 //RX_TDDRC_ALPHA_UP_3 +166 0x1000 //RX_TDDRC_ALPHA_UP_4 +184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +190 0x7FFF //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +269 0x0000 //RX_TDDRC_THRD_0 +270 0x0000 //RX_TDDRC_THRD_1 +271 0x7FFF //RX_TDDRC_THRD_2 +272 0x7FFF //RX_TDDRC_THRD_3 +273 0x7FFF //RX_TDDRC_SLANT_0 +274 0x7FFF //RX_TDDRC_SLANT_1 +275 0x1000 //RX_TDDRC_ALPHA_UP_0 +276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x199A //RX_TDDRC_HMNC_GAIN +279 0x0001 //RX_TDDRC_SMT_FLAG +280 0x0CCD //RX_TDDRC_SMT_W +281 0x0155 //RX_TDDRC_DRC_GAIN +195 0x0020 //RX_FDEQ_SUBNUM +196 0x4848 //RX_FDEQ_GAIN_0 +197 0x4848 //RX_FDEQ_GAIN_1 +198 0x4848 //RX_FDEQ_GAIN_2 +199 0x4848 //RX_FDEQ_GAIN_3 +200 0x4848 //RX_FDEQ_GAIN_4 +201 0x4848 //RX_FDEQ_GAIN_5 +202 0x4848 //RX_FDEQ_GAIN_6 +203 0x4848 //RX_FDEQ_GAIN_7 +204 0x4848 //RX_FDEQ_GAIN_8 +205 0x4848 //RX_FDEQ_GAIN_9 +206 0x4848 //RX_FDEQ_GAIN_10 +207 0x4848 //RX_FDEQ_GAIN_11 +208 0x4848 //RX_FDEQ_GAIN_12 +209 0x4848 //RX_FDEQ_GAIN_13 +210 0x4848 //RX_FDEQ_GAIN_14 +211 0x4848 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0202 //RX_FDEQ_BIN_0 +221 0x0203 //RX_FDEQ_BIN_1 +222 0x0304 //RX_FDEQ_BIN_2 +223 0x0405 //RX_FDEQ_BIN_3 +224 0x0607 //RX_FDEQ_BIN_4 +225 0x0809 //RX_FDEQ_BIN_5 +226 0x0A0B //RX_FDEQ_BIN_6 +227 0x0C0D //RX_FDEQ_BIN_7 +228 0x0E0F //RX_FDEQ_BIN_8 +229 0x1011 //RX_FDEQ_BIN_9 +230 0x1214 //RX_FDEQ_BIN_10 +231 0x1618 //RX_FDEQ_BIN_11 +232 0x1C1C //RX_FDEQ_BIN_12 +233 0x2020 //RX_FDEQ_BIN_13 +234 0x2020 //RX_FDEQ_BIN_14 +235 0x2011 //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x4000 //RX_FDEQ_RESRV_0 +245 0x0320 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0030 //RX_FDDRC_BAND_MARGIN_1 +248 0x0050 //RX_FDDRC_BAND_MARGIN_2 +249 0x0080 //RX_FDDRC_BAND_MARGIN_3 +250 0x0007 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x5000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x6400 //RX_FDDRC_THRD_3_2 +258 0x6400 //RX_FDDRC_THRD_3_3 +259 0x2000 //RX_FDDRC_SLANT_0_0 +260 0x2000 //RX_FDDRC_SLANT_0_1 +261 0x2000 //RX_FDDRC_SLANT_0_2 +262 0x2000 //RX_FDDRC_SLANT_0_3 +263 0x5333 //RX_FDDRC_SLANT_1_0 +264 0x5333 //RX_FDDRC_SLANT_1_1 +265 0x5333 //RX_FDDRC_SLANT_1_2 +266 0x5333 //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +286 0x0100 //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 +#VOL 6 +163 0x1000 //RX_TDDRC_ALPHA_UP_1 +164 0x1000 //RX_TDDRC_ALPHA_UP_2 +165 0x1000 //RX_TDDRC_ALPHA_UP_3 +166 0x1000 //RX_TDDRC_ALPHA_UP_4 +184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +190 0x7FFF //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +269 0x0000 //RX_TDDRC_THRD_0 +270 0x0000 //RX_TDDRC_THRD_1 +271 0x7FFF //RX_TDDRC_THRD_2 +272 0x7FFF //RX_TDDRC_THRD_3 +273 0x7FFF //RX_TDDRC_SLANT_0 +274 0x7FFF //RX_TDDRC_SLANT_1 +275 0x1000 //RX_TDDRC_ALPHA_UP_0 +276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x199A //RX_TDDRC_HMNC_GAIN +279 0x0001 //RX_TDDRC_SMT_FLAG +280 0x0CCD //RX_TDDRC_SMT_W +281 0x0155 //RX_TDDRC_DRC_GAIN +195 0x0020 //RX_FDEQ_SUBNUM +196 0x4848 //RX_FDEQ_GAIN_0 +197 0x4848 //RX_FDEQ_GAIN_1 +198 0x4848 //RX_FDEQ_GAIN_2 +199 0x4848 //RX_FDEQ_GAIN_3 +200 0x4848 //RX_FDEQ_GAIN_4 +201 0x4848 //RX_FDEQ_GAIN_5 +202 0x4848 //RX_FDEQ_GAIN_6 +203 0x4848 //RX_FDEQ_GAIN_7 +204 0x4848 //RX_FDEQ_GAIN_8 +205 0x4848 //RX_FDEQ_GAIN_9 +206 0x4848 //RX_FDEQ_GAIN_10 +207 0x4848 //RX_FDEQ_GAIN_11 +208 0x4848 //RX_FDEQ_GAIN_12 +209 0x4848 //RX_FDEQ_GAIN_13 +210 0x4848 //RX_FDEQ_GAIN_14 +211 0x4848 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0202 //RX_FDEQ_BIN_0 +221 0x0203 //RX_FDEQ_BIN_1 +222 0x0304 //RX_FDEQ_BIN_2 +223 0x0405 //RX_FDEQ_BIN_3 +224 0x0607 //RX_FDEQ_BIN_4 +225 0x0809 //RX_FDEQ_BIN_5 +226 0x0A0B //RX_FDEQ_BIN_6 +227 0x0C0D //RX_FDEQ_BIN_7 +228 0x0E0F //RX_FDEQ_BIN_8 +229 0x1011 //RX_FDEQ_BIN_9 +230 0x1214 //RX_FDEQ_BIN_10 +231 0x1618 //RX_FDEQ_BIN_11 +232 0x1C1C //RX_FDEQ_BIN_12 +233 0x2020 //RX_FDEQ_BIN_13 +234 0x2020 //RX_FDEQ_BIN_14 +235 0x2011 //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x4000 //RX_FDEQ_RESRV_0 +245 0x0320 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0030 //RX_FDDRC_BAND_MARGIN_1 +248 0x0050 //RX_FDDRC_BAND_MARGIN_2 +249 0x0080 //RX_FDDRC_BAND_MARGIN_3 +250 0x0007 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x5000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x6400 //RX_FDDRC_THRD_3_2 +258 0x6400 //RX_FDDRC_THRD_3_3 +259 0x2000 //RX_FDDRC_SLANT_0_0 +260 0x2000 //RX_FDDRC_SLANT_0_1 +261 0x2000 //RX_FDDRC_SLANT_0_2 +262 0x2000 //RX_FDDRC_SLANT_0_3 +263 0x5333 //RX_FDDRC_SLANT_1_0 +264 0x5333 //RX_FDDRC_SLANT_1_1 +265 0x5333 //RX_FDDRC_SLANT_1_2 +266 0x5333 //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +286 0x0100 //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 #CASE_NAME BLUETOOTH-BTWB-VOICE_GENERIC-NB -#PARAM_TYPE TX+RX -#TOTAL_CUSTOM_STEP 7 +#PARAM_MODE Full +#PARAM_TYPE TX+2RX +#TOTAL_CUSTOM_STEP 7+7 #TX 0 0x0008 //TX_OPERATION_MODE_0 1 0x0008 //TX_OPERATION_MODE_1 @@ -23047,20 +34969,20 @@ 248 0xF400 //TX_THR_SN_EST_6 249 0xF600 //TX_THR_SN_EST_7 250 0x0000 //TX_DELTA_THR_SN_EST_0 -251 0x0000 //TX_DELTA_THR_SN_EST_1 +251 0x0200 //TX_DELTA_THR_SN_EST_1 252 0x0200 //TX_DELTA_THR_SN_EST_2 253 0x0200 //TX_DELTA_THR_SN_EST_3 254 0x0200 //TX_DELTA_THR_SN_EST_4 255 0x0200 //TX_DELTA_THR_SN_EST_5 -256 0x0200 //TX_DELTA_THR_SN_EST_6 +256 0x0000 //TX_DELTA_THR_SN_EST_6 257 0x0200 //TX_DELTA_THR_SN_EST_7 258 0x6000 //TX_LAMBDA_NN_EST_0 -259 0x6000 //TX_LAMBDA_NN_EST_1 +259 0x4000 //TX_LAMBDA_NN_EST_1 260 0x4000 //TX_LAMBDA_NN_EST_2 261 0x4000 //TX_LAMBDA_NN_EST_3 262 0x4000 //TX_LAMBDA_NN_EST_4 263 0x4000 //TX_LAMBDA_NN_EST_5 -264 0x4000 //TX_LAMBDA_NN_EST_6 +264 0x6000 //TX_LAMBDA_NN_EST_6 265 0x4000 //TX_LAMBDA_NN_EST_7 266 0x0400 //TX_N_SN_EST 267 0x001E //TX_INBEAM_T @@ -23078,16 +35000,16 @@ 279 0x1000 //TX_B_POST_FLT_0 280 0x1000 //TX_B_POST_FLT_1 281 0x000F //TX_NS_LVL_CTRL_0 -282 0x000F //TX_NS_LVL_CTRL_1 -283 0x0011 //TX_NS_LVL_CTRL_2 +282 0x0011 //TX_NS_LVL_CTRL_1 +283 0x000F //TX_NS_LVL_CTRL_2 284 0x000F //TX_NS_LVL_CTRL_3 285 0x000F //TX_NS_LVL_CTRL_4 286 0x000F //TX_NS_LVL_CTRL_5 287 0x000F //TX_NS_LVL_CTRL_6 288 0x0011 //TX_NS_LVL_CTRL_7 289 0x000C //TX_MIN_GAIN_S_0 -290 0x000C //TX_MIN_GAIN_S_1 -291 0x000F //TX_MIN_GAIN_S_2 +290 0x000F //TX_MIN_GAIN_S_1 +291 0x000C //TX_MIN_GAIN_S_2 292 0x000C //TX_MIN_GAIN_S_3 293 0x000C //TX_MIN_GAIN_S_4 294 0x000C //TX_MIN_GAIN_S_5 @@ -23111,12 +35033,12 @@ 312 0x7FFF //TX_A_POST_FILT_0 313 0x2000 //TX_A_POST_FILT_1 314 0x4000 //TX_A_POST_FILT_S_0 -315 0x4000 //TX_A_POST_FILT_S_1 +315 0x5000 //TX_A_POST_FILT_S_1 316 0x5000 //TX_A_POST_FILT_S_2 317 0x5000 //TX_A_POST_FILT_S_3 318 0x5000 //TX_A_POST_FILT_S_4 319 0x5000 //TX_A_POST_FILT_S_5 -320 0x5000 //TX_A_POST_FILT_S_6 +320 0x4000 //TX_A_POST_FILT_S_6 321 0x5000 //TX_A_POST_FILT_S_7 322 0x1000 //TX_B_POST_FILT_0 323 0x1000 //TX_B_POST_FILT_1 @@ -23176,10 +35098,10 @@ 377 0x7FFF //TX_NOISE_TH_5_4 378 0x044C //TX_NOISE_TH_6 379 0x0014 //TX_MINENOISE_TH -380 0x4000 //TX_MINENOISE_MIC0_TH_MTS -381 0xFFEE //TX_MINENOISE_MIC0_TH_EXP -382 0x6000 //TX_MINENOISE_MIC0_S_TH_MTS -383 0xFFF3 //TX_MINENOISE_MIC0_S_TH_EXP +380 0x4000 //TX_MORENS_TFMASK_TH +381 0xFFEE //TX_DRC_QUIET_FLOOR +382 0x6000 //TX_RATIODTL_CUT_TH +383 0xFFF3 //TX_DT_CUT_K1 384 0x0666 //TX_OUT_ENER_S_TH_CLEAN 385 0x0666 //TX_OUT_ENER_S_TH_LESSCLEAN 386 0x0333 //TX_OUT_ENER_S_TH_NOISY @@ -23187,15 +35109,15 @@ 388 0x0333 //TX_OUT_ENER_TH_SPEECH 389 0x2000 //TX_SN_NPB_GAIN 390 0x0000 //TX_NN_NPB_GAIN -391 0x0000 //TX_CSX_ALPHA_0 -392 0x0000 //TX_CSX_ALPHA_1 -393 0x0000 //TX_CSX_ALPHA_2 -394 0x0000 //TX_CSX_ALPHA_3 -395 0x0800 //TX_MU_ARSP_EST -396 0x00C8 //TX_P_OUTBEAM_MIN_TH +391 0x0000 //TX_POST_MASK_SUP_HSNE +392 0x0000 //TX_TAIL_DET_TH +393 0x0000 //TX_B_LESSCUT_RTO_WTA +394 0x0000 //TX_MEL_G_R +395 0x0800 //TX_SUPHIGH_TH +396 0x00C8 //TX_MASK_G_R 397 0x0002 //TX_EXTRA_NS_L -398 0x0800 //TX_EXTRA_NS_A -399 0x0005 //TX_VR_NOISE_FLOOR_TH +398 0x0800 //TX_C_POST_FLT_MASK +399 0x0005 //TX_A_POST_FLT_WNS 400 0x0148 //TX_MIN_G_LOW300HZ 401 0x0002 //TX_MAXLEVEL_CNG 402 0x00B4 //TX_STN_NOISE_TH @@ -23310,16 +35232,16 @@ 511 0x6666 //TX_MIC_TO_BFGAIN 512 0x0000 //TX_MICTOBFGAIN0 513 0x0000 //TX_FASTMUE_TH -514 0x0000 //TX_DERVB_LEN_0 -515 0x0000 //TX_DERVB_LEN_1 -516 0x0000 //TX_RHO_DERVB -517 0x0000 //TX_MIC_INDX_DERVB -518 0x0000 //TX_MU_DERVB -519 0x0000 //TX_DR_RESRV_0 -520 0x0000 //TX_DR_RESRV_1 -521 0x0000 //TX_DR_RESRV_2 -522 0x0000 //TX_DR_RESRV_3 -523 0x0000 //TX_DR_RESRV_4 +514 0x0000 //TX_DEREVERB_LF_MU +515 0x0000 //TX_DEREVERB_HF_MU +516 0x0000 //TX_DEREVERB_DELAY +517 0x0000 //TX_DEREVERB_COEF_LEN +518 0x0000 //TX_DEREVERB_DNR +519 0x0000 //TX_DEREVERB_ALPHA +520 0x0000 //TX_DEREVERB_BETA +521 0x0000 //TX_GSC_RTOL_TH +522 0x0000 //TX_GSC_RTOH_TH +523 0x0000 //TX_WIDE2_MEANHTH 524 0x0000 //TX_DR_RESRV_5 525 0x0000 //TX_DR_RESRV_6 526 0x0000 //TX_DR_RESRV_7 @@ -23693,8 +35615,73 @@ 894 0xC000 //TX_FASTNS_SSA_THHFL 895 0xCCCC //TX_FASTNS_SSA_THLFH 896 0xD999 //TX_FASTNS_SSA_THHFH +897 0x0000 //TX_SENDFUNC_REG_MICMUTE +898 0x0000 //TX_SENDFUNC_REG_MICMUTE1 +899 0x0000 //TX_MICMUTE_RATIO_THR +900 0x0000 //TX_MICMUTE_AMP_THR +901 0x0000 //TX_MICMUTE_HPF_IND +902 0x0000 //TX_MICMUTE_LOG_EYR_TH +903 0x0000 //TX_MICMUTE_CVG_TIME +904 0x0000 //TX_MICMUTE_RELEASE_TIME +905 0x0000 //TX_MIC_VOLUME_MIC0MUTE +906 0x0000 //TX_MICMUTE_EPD_OFFSET_0 +907 0x0000 //TX_MICMUTE_FRQ_AEC_L +908 0x0000 //TX_MICMUTE_EAD_THR +909 0x0000 //TX_MICMUTE_LAMBDA_CB_NLE +910 0x0000 //TX_MICMUTE_LAMBDA_RE_EST +911 0x0000 //TX_DTD_THR1_MICMUTE_0 +912 0x0000 //TX_DTD_THR1_MICMUTE_1 +913 0x0000 //TX_DTD_THR1_MICMUTE_2 +914 0x0000 //TX_DTD_THR1_MICMUTE_3 +915 0x0000 //TX_DTD_THR2_MICMUTE_0 +916 0x0000 //TX_MICMUTE_MIN_EQ_RE_EST_0 +917 0x0000 //TX_MICMUTE_MIN_EQ_RE_EST_1 +918 0x0000 //TX_MICMUTE_MIN_EQ_RE_EST_2 +919 0x0000 //TX_MICMUTE_MIN_EQ_RE_EST_3 +920 0x0000 //TX_MICMUTE_MIN_EQ_RE_EST_4 +921 0x0000 //TX_MICMUTE_C_POST_FLT +922 0x0000 //TX_MICMUTE_DT_CUT_K +923 0x0000 //TX_MICMUTE_DT_CUT_THR +924 0x0000 //TX_MICMUTE_DT_CUT_K2 +925 0x0000 //TX_MICMUTE_DT_CUT_THR2 +926 0x0000 //TX_MICMUTE_DT2_HOLD_N +927 0x0000 //TX_MICMUTE_RATIODTH_THCUT +928 0x0000 //TX_MICMUTE_B_POST_FLT_ECHOL +929 0x0000 //TX_MICMUTE_B_POST_FLT_ECHOH +930 0x0000 //TX_MICMUTE_C_POST_FLT_MASK +931 0x0000 //TX_MICMUTE_RATIODTL_CUT_TH +932 0x0000 //TX_MICMUTE_DT_CUT_K1 +933 0x0000 //TX_MICMUTE_N2_SN_EST +934 0x0000 //TX_MICMUTE_THR_SN_EST_0 +935 0x0000 //TX_MICMUTE_MIN_G_CTRL_0 +936 0x0000 //TX_MICMUTE_A_POST_FILT_S_0 +937 0x0000 //TX_MICMUTE_B_POST_FILT_0 +938 0x0000 //TX_MIC1RUB_AMP_THR +939 0x0000 //TX_MIC1MUTE_RATIO_THR +940 0x0000 //TX_MIC1MUTE_AMP_THR +941 0x0000 //TX_MIC1MUTE_CVG_TIME +942 0x0000 //TX_MIC1MUTE_RELEASE_TIME +943 0x0000 //TX_AMS_RESRV_01 +944 0x0000 //TX_AMS_RESRV_02 +945 0x0000 //TX_AMS_RESRV_03 +946 0x0000 //TX_AMS_RESRV_04 +947 0x0000 //TX_AMS_RESRV_05 +948 0x0000 //TX_AMS_RESRV_06 +949 0x0000 //TX_AMS_RESRV_07 +950 0x0000 //TX_AMS_RESRV_08 +951 0x0000 //TX_AMS_RESRV_09 +952 0x0000 //TX_AMS_RESRV_10 +953 0x0000 //TX_AMS_RESRV_11 +954 0x0000 //TX_AMS_RESRV_12 +955 0x0000 //TX_AMS_RESRV_13 +956 0x0000 //TX_AMS_RESRV_14 +957 0x0000 //TX_AMS_RESRV_15 +958 0x0000 //TX_AMS_RESRV_16 +959 0x0000 //TX_AMS_RESRV_17 +960 0x0000 //TX_AMS_RESRV_18 +961 0x0000 //TX_AMS_RESRV_19 #RX -0 0x006C //RX_RECVFUNC_MODE_0 +0 0x206C //RX_RECVFUNC_MODE_0 1 0x0000 //RX_RECVFUNC_MODE_1 2 0x0000 //RX_SAMPLINGFREQ_SIG 3 0x0000 //RX_SAMPLINGFREQ_PROC @@ -24544,10 +36531,862 @@ 110 0x0000 //RX_FDDRC_RESRV_0 129 0x0100 //RX_SPK_VOL 130 0x0000 //RX_VOL_RESRV_0 +#RX 2 +157 0x206C //RX_RECVFUNC_MODE_0 +158 0x0000 //RX_RECVFUNC_MODE_1 +159 0x0000 //RX_SAMPLINGFREQ_SIG +160 0x0000 //RX_SAMPLINGFREQ_PROC +161 0x000A //RX_FRAME_SZ +162 0x0000 //RX_DELAY_OPT +163 0x3000 //RX_TDDRC_ALPHA_UP_1 +164 0x3000 //RX_TDDRC_ALPHA_UP_2 +165 0x3000 //RX_TDDRC_ALPHA_UP_3 +166 0x3000 //RX_TDDRC_ALPHA_UP_4 +167 0x0800 //RX_PGA +168 0x7FFF //RX_A_HP +169 0x0000 //RX_B_PE +170 0x3800 //RX_THR_PITCH_DET_0 +171 0x3000 //RX_THR_PITCH_DET_1 +172 0x2800 //RX_THR_PITCH_DET_2 +173 0x0008 //RX_PITCH_BFR_LEN +174 0x0003 //RX_SBD_PITCH_DET +175 0x0100 //RX_PP_RESRV_0 +176 0x0020 //RX_PP_RESRV_1 +177 0x0600 //RX_N_SN_EST +178 0x000C //RX_N2_SN_EST +179 0x0010 //RX_NS_LVL_CTRL +180 0xF800 //RX_THR_SN_EST +181 0x7CCD //RX_LAMBDA_PFILT +182 0x000A //RX_FENS_RESRV_0 +183 0x0190 //RX_FENS_RESRV_1 +184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +187 0x0002 //RX_EXTRA_NS_L +188 0x0800 //RX_EXTRA_NS_A +189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +190 0x7FFF //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +192 0x199A //RX_A_POST_FLT +193 0x0000 //RX_LMT_THRD +194 0x4000 //RX_LMT_ALPHA +195 0x0014 //RX_FDEQ_SUBNUM +196 0x4848 //RX_FDEQ_GAIN_0 +197 0x4848 //RX_FDEQ_GAIN_1 +198 0x4848 //RX_FDEQ_GAIN_2 +199 0x4848 //RX_FDEQ_GAIN_3 +200 0x4848 //RX_FDEQ_GAIN_4 +201 0x4848 //RX_FDEQ_GAIN_5 +202 0x4444 //RX_FDEQ_GAIN_6 +203 0x4040 //RX_FDEQ_GAIN_7 +204 0x4040 //RX_FDEQ_GAIN_8 +205 0x4040 //RX_FDEQ_GAIN_9 +206 0x4848 //RX_FDEQ_GAIN_10 +207 0x4848 //RX_FDEQ_GAIN_11 +208 0x4848 //RX_FDEQ_GAIN_12 +209 0x4848 //RX_FDEQ_GAIN_13 +210 0x4848 //RX_FDEQ_GAIN_14 +211 0x4848 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0202 //RX_FDEQ_BIN_0 +221 0x0203 //RX_FDEQ_BIN_1 +222 0x0303 //RX_FDEQ_BIN_2 +223 0x0304 //RX_FDEQ_BIN_3 +224 0x0405 //RX_FDEQ_BIN_4 +225 0x0506 //RX_FDEQ_BIN_5 +226 0x0708 //RX_FDEQ_BIN_6 +227 0x090A //RX_FDEQ_BIN_7 +228 0x0B0C //RX_FDEQ_BIN_8 +229 0x0D0E //RX_FDEQ_BIN_9 +230 0x0000 //RX_FDEQ_BIN_10 +231 0x0000 //RX_FDEQ_BIN_11 +232 0x0000 //RX_FDEQ_BIN_12 +233 0x0000 //RX_FDEQ_BIN_13 +234 0x0000 //RX_FDEQ_BIN_14 +235 0x0000 //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x4000 //RX_FDEQ_RESRV_0 +245 0x0320 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0030 //RX_FDDRC_BAND_MARGIN_1 +248 0x0050 //RX_FDDRC_BAND_MARGIN_2 +249 0x0080 //RX_FDDRC_BAND_MARGIN_3 +250 0x0007 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x5000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x6400 //RX_FDDRC_THRD_3_2 +258 0x6400 //RX_FDDRC_THRD_3_3 +259 0x2000 //RX_FDDRC_SLANT_0_0 +260 0x2000 //RX_FDDRC_SLANT_0_1 +261 0x2000 //RX_FDDRC_SLANT_0_2 +262 0x2000 //RX_FDDRC_SLANT_0_3 +263 0x5333 //RX_FDDRC_SLANT_1_0 +264 0x5333 //RX_FDDRC_SLANT_1_1 +265 0x5333 //RX_FDDRC_SLANT_1_2 +266 0x5333 //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +268 0x0000 //RX_FILTINDX +269 0x0000 //RX_TDDRC_THRD_0 +270 0x0000 //RX_TDDRC_THRD_1 +271 0x7FFF //RX_TDDRC_THRD_2 +272 0x7FFF //RX_TDDRC_THRD_3 +273 0x7FFF //RX_TDDRC_SLANT_0 +274 0x7EB8 //RX_TDDRC_SLANT_1 +275 0x3000 //RX_TDDRC_ALPHA_UP_0 +276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x199A //RX_TDDRC_HMNC_GAIN +279 0x0001 //RX_TDDRC_SMT_FLAG +280 0x0CCD //RX_TDDRC_SMT_W +281 0x017F //RX_TDDRC_DRC_GAIN +282 0x7C00 //RX_LAMBDA_PKA_FP +283 0x2000 //RX_TPKA_FP +284 0x2000 //RX_MIN_G_FP +285 0x0080 //RX_MAX_G_FP +286 0x0100 //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 +288 0x0000 //RX_MAXLEVEL_CNG +289 0x3000 //RX_BWE_UV_TH +290 0x3000 //RX_BWE_UV_TH2 +291 0x1800 //RX_BWE_UV_TH3 +292 0x1000 //RX_BWE_V_TH +293 0x04CD //RX_BWE_GAIN1_V_TH1 +294 0x0F33 //RX_BWE_GAIN1_V_TH2 +295 0x7333 //RX_BWE_UV_EQ +296 0x199A //RX_BWE_V_EQ +297 0x7333 //RX_BWE_TONE_TH +298 0x0004 //RX_BWE_UV_HOLD_T +299 0x6CCD //RX_BWE_GAIN2_ALPHA +300 0x799A //RX_BWE_GAIN3_ALPHA +301 0x001E //RX_BWE_CUTOFF +302 0x3000 //RX_BWE_GAINFILL +303 0x3200 //RX_BWE_MAXTH_TONE +304 0x2000 //RX_BWE_EQ_0 +305 0x2000 //RX_BWE_EQ_1 +306 0x2000 //RX_BWE_EQ_2 +307 0x2000 //RX_BWE_EQ_3 +308 0x2000 //RX_BWE_EQ_4 +309 0x2000 //RX_BWE_EQ_5 +310 0x2000 //RX_BWE_EQ_6 +311 0x0000 //RX_BWE_RESRV_0 +312 0x0000 //RX_BWE_RESRV_1 +313 0x0000 //RX_BWE_RESRV_2 +#VOL 0 +163 0x3000 //RX_TDDRC_ALPHA_UP_1 +164 0x3000 //RX_TDDRC_ALPHA_UP_2 +165 0x3000 //RX_TDDRC_ALPHA_UP_3 +166 0x3000 //RX_TDDRC_ALPHA_UP_4 +184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +190 0x7FFF //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +269 0x0000 //RX_TDDRC_THRD_0 +270 0x0000 //RX_TDDRC_THRD_1 +271 0x7FFF //RX_TDDRC_THRD_2 +272 0x7FFF //RX_TDDRC_THRD_3 +273 0x7FFF //RX_TDDRC_SLANT_0 +274 0x7EB8 //RX_TDDRC_SLANT_1 +275 0x3000 //RX_TDDRC_ALPHA_UP_0 +276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x199A //RX_TDDRC_HMNC_GAIN +279 0x0001 //RX_TDDRC_SMT_FLAG +280 0x0CCD //RX_TDDRC_SMT_W +281 0x017F //RX_TDDRC_DRC_GAIN +195 0x0014 //RX_FDEQ_SUBNUM +196 0x4848 //RX_FDEQ_GAIN_0 +197 0x4848 //RX_FDEQ_GAIN_1 +198 0x4848 //RX_FDEQ_GAIN_2 +199 0x4848 //RX_FDEQ_GAIN_3 +200 0x4848 //RX_FDEQ_GAIN_4 +201 0x4848 //RX_FDEQ_GAIN_5 +202 0x4444 //RX_FDEQ_GAIN_6 +203 0x4040 //RX_FDEQ_GAIN_7 +204 0x4040 //RX_FDEQ_GAIN_8 +205 0x4040 //RX_FDEQ_GAIN_9 +206 0x4848 //RX_FDEQ_GAIN_10 +207 0x4848 //RX_FDEQ_GAIN_11 +208 0x4848 //RX_FDEQ_GAIN_12 +209 0x4848 //RX_FDEQ_GAIN_13 +210 0x4848 //RX_FDEQ_GAIN_14 +211 0x4848 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0202 //RX_FDEQ_BIN_0 +221 0x0203 //RX_FDEQ_BIN_1 +222 0x0303 //RX_FDEQ_BIN_2 +223 0x0304 //RX_FDEQ_BIN_3 +224 0x0405 //RX_FDEQ_BIN_4 +225 0x0506 //RX_FDEQ_BIN_5 +226 0x0708 //RX_FDEQ_BIN_6 +227 0x090A //RX_FDEQ_BIN_7 +228 0x0B0C //RX_FDEQ_BIN_8 +229 0x0D0E //RX_FDEQ_BIN_9 +230 0x0000 //RX_FDEQ_BIN_10 +231 0x0000 //RX_FDEQ_BIN_11 +232 0x0000 //RX_FDEQ_BIN_12 +233 0x0000 //RX_FDEQ_BIN_13 +234 0x0000 //RX_FDEQ_BIN_14 +235 0x0000 //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x4000 //RX_FDEQ_RESRV_0 +245 0x0320 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0030 //RX_FDDRC_BAND_MARGIN_1 +248 0x0050 //RX_FDDRC_BAND_MARGIN_2 +249 0x0080 //RX_FDDRC_BAND_MARGIN_3 +250 0x0007 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x5000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x6400 //RX_FDDRC_THRD_3_2 +258 0x6400 //RX_FDDRC_THRD_3_3 +259 0x2000 //RX_FDDRC_SLANT_0_0 +260 0x2000 //RX_FDDRC_SLANT_0_1 +261 0x2000 //RX_FDDRC_SLANT_0_2 +262 0x2000 //RX_FDDRC_SLANT_0_3 +263 0x5333 //RX_FDDRC_SLANT_1_0 +264 0x5333 //RX_FDDRC_SLANT_1_1 +265 0x5333 //RX_FDDRC_SLANT_1_2 +266 0x5333 //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +286 0x0100 //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 +#VOL 1 +163 0x3000 //RX_TDDRC_ALPHA_UP_1 +164 0x3000 //RX_TDDRC_ALPHA_UP_2 +165 0x3000 //RX_TDDRC_ALPHA_UP_3 +166 0x3000 //RX_TDDRC_ALPHA_UP_4 +184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +190 0x7FFF //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +269 0x0000 //RX_TDDRC_THRD_0 +270 0x0000 //RX_TDDRC_THRD_1 +271 0x7FFF //RX_TDDRC_THRD_2 +272 0x7FFF //RX_TDDRC_THRD_3 +273 0x7FFF //RX_TDDRC_SLANT_0 +274 0x7EB8 //RX_TDDRC_SLANT_1 +275 0x3000 //RX_TDDRC_ALPHA_UP_0 +276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x199A //RX_TDDRC_HMNC_GAIN +279 0x0001 //RX_TDDRC_SMT_FLAG +280 0x0CCD //RX_TDDRC_SMT_W +281 0x017F //RX_TDDRC_DRC_GAIN +195 0x0014 //RX_FDEQ_SUBNUM +196 0x4848 //RX_FDEQ_GAIN_0 +197 0x4848 //RX_FDEQ_GAIN_1 +198 0x4848 //RX_FDEQ_GAIN_2 +199 0x4848 //RX_FDEQ_GAIN_3 +200 0x4848 //RX_FDEQ_GAIN_4 +201 0x4848 //RX_FDEQ_GAIN_5 +202 0x4444 //RX_FDEQ_GAIN_6 +203 0x4040 //RX_FDEQ_GAIN_7 +204 0x4040 //RX_FDEQ_GAIN_8 +205 0x4040 //RX_FDEQ_GAIN_9 +206 0x4848 //RX_FDEQ_GAIN_10 +207 0x4848 //RX_FDEQ_GAIN_11 +208 0x4848 //RX_FDEQ_GAIN_12 +209 0x4848 //RX_FDEQ_GAIN_13 +210 0x4848 //RX_FDEQ_GAIN_14 +211 0x4848 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0202 //RX_FDEQ_BIN_0 +221 0x0203 //RX_FDEQ_BIN_1 +222 0x0303 //RX_FDEQ_BIN_2 +223 0x0304 //RX_FDEQ_BIN_3 +224 0x0405 //RX_FDEQ_BIN_4 +225 0x0506 //RX_FDEQ_BIN_5 +226 0x0708 //RX_FDEQ_BIN_6 +227 0x090A //RX_FDEQ_BIN_7 +228 0x0B0C //RX_FDEQ_BIN_8 +229 0x0D0E //RX_FDEQ_BIN_9 +230 0x0000 //RX_FDEQ_BIN_10 +231 0x0000 //RX_FDEQ_BIN_11 +232 0x0000 //RX_FDEQ_BIN_12 +233 0x0000 //RX_FDEQ_BIN_13 +234 0x0000 //RX_FDEQ_BIN_14 +235 0x0000 //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x4000 //RX_FDEQ_RESRV_0 +245 0x0320 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0030 //RX_FDDRC_BAND_MARGIN_1 +248 0x0050 //RX_FDDRC_BAND_MARGIN_2 +249 0x0080 //RX_FDDRC_BAND_MARGIN_3 +250 0x0007 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x5000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x6400 //RX_FDDRC_THRD_3_2 +258 0x6400 //RX_FDDRC_THRD_3_3 +259 0x2000 //RX_FDDRC_SLANT_0_0 +260 0x2000 //RX_FDDRC_SLANT_0_1 +261 0x2000 //RX_FDDRC_SLANT_0_2 +262 0x2000 //RX_FDDRC_SLANT_0_3 +263 0x5333 //RX_FDDRC_SLANT_1_0 +264 0x5333 //RX_FDDRC_SLANT_1_1 +265 0x5333 //RX_FDDRC_SLANT_1_2 +266 0x5333 //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +286 0x0100 //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 +#VOL 2 +163 0x3000 //RX_TDDRC_ALPHA_UP_1 +164 0x3000 //RX_TDDRC_ALPHA_UP_2 +165 0x3000 //RX_TDDRC_ALPHA_UP_3 +166 0x3000 //RX_TDDRC_ALPHA_UP_4 +184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +190 0x7FFF //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +269 0x0000 //RX_TDDRC_THRD_0 +270 0x0000 //RX_TDDRC_THRD_1 +271 0x7FFF //RX_TDDRC_THRD_2 +272 0x7FFF //RX_TDDRC_THRD_3 +273 0x7FFF //RX_TDDRC_SLANT_0 +274 0x7EB8 //RX_TDDRC_SLANT_1 +275 0x3000 //RX_TDDRC_ALPHA_UP_0 +276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x199A //RX_TDDRC_HMNC_GAIN +279 0x0001 //RX_TDDRC_SMT_FLAG +280 0x0CCD //RX_TDDRC_SMT_W +281 0x017F //RX_TDDRC_DRC_GAIN +195 0x0014 //RX_FDEQ_SUBNUM +196 0x4848 //RX_FDEQ_GAIN_0 +197 0x4848 //RX_FDEQ_GAIN_1 +198 0x4848 //RX_FDEQ_GAIN_2 +199 0x4848 //RX_FDEQ_GAIN_3 +200 0x4848 //RX_FDEQ_GAIN_4 +201 0x4848 //RX_FDEQ_GAIN_5 +202 0x4444 //RX_FDEQ_GAIN_6 +203 0x4040 //RX_FDEQ_GAIN_7 +204 0x4040 //RX_FDEQ_GAIN_8 +205 0x4040 //RX_FDEQ_GAIN_9 +206 0x4848 //RX_FDEQ_GAIN_10 +207 0x4848 //RX_FDEQ_GAIN_11 +208 0x4848 //RX_FDEQ_GAIN_12 +209 0x4848 //RX_FDEQ_GAIN_13 +210 0x4848 //RX_FDEQ_GAIN_14 +211 0x4848 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0202 //RX_FDEQ_BIN_0 +221 0x0203 //RX_FDEQ_BIN_1 +222 0x0303 //RX_FDEQ_BIN_2 +223 0x0304 //RX_FDEQ_BIN_3 +224 0x0405 //RX_FDEQ_BIN_4 +225 0x0506 //RX_FDEQ_BIN_5 +226 0x0708 //RX_FDEQ_BIN_6 +227 0x090A //RX_FDEQ_BIN_7 +228 0x0B0C //RX_FDEQ_BIN_8 +229 0x0D0E //RX_FDEQ_BIN_9 +230 0x0000 //RX_FDEQ_BIN_10 +231 0x0000 //RX_FDEQ_BIN_11 +232 0x0000 //RX_FDEQ_BIN_12 +233 0x0000 //RX_FDEQ_BIN_13 +234 0x0000 //RX_FDEQ_BIN_14 +235 0x0000 //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x4000 //RX_FDEQ_RESRV_0 +245 0x0320 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0030 //RX_FDDRC_BAND_MARGIN_1 +248 0x0050 //RX_FDDRC_BAND_MARGIN_2 +249 0x0080 //RX_FDDRC_BAND_MARGIN_3 +250 0x0007 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x5000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x6400 //RX_FDDRC_THRD_3_2 +258 0x6400 //RX_FDDRC_THRD_3_3 +259 0x2000 //RX_FDDRC_SLANT_0_0 +260 0x2000 //RX_FDDRC_SLANT_0_1 +261 0x2000 //RX_FDDRC_SLANT_0_2 +262 0x2000 //RX_FDDRC_SLANT_0_3 +263 0x5333 //RX_FDDRC_SLANT_1_0 +264 0x5333 //RX_FDDRC_SLANT_1_1 +265 0x5333 //RX_FDDRC_SLANT_1_2 +266 0x5333 //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +286 0x0100 //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 +#VOL 3 +163 0x3000 //RX_TDDRC_ALPHA_UP_1 +164 0x3000 //RX_TDDRC_ALPHA_UP_2 +165 0x3000 //RX_TDDRC_ALPHA_UP_3 +166 0x3000 //RX_TDDRC_ALPHA_UP_4 +184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +190 0x7FFF //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +269 0x0000 //RX_TDDRC_THRD_0 +270 0x0000 //RX_TDDRC_THRD_1 +271 0x7FFF //RX_TDDRC_THRD_2 +272 0x7FFF //RX_TDDRC_THRD_3 +273 0x7FFF //RX_TDDRC_SLANT_0 +274 0x7EB8 //RX_TDDRC_SLANT_1 +275 0x3000 //RX_TDDRC_ALPHA_UP_0 +276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x199A //RX_TDDRC_HMNC_GAIN +279 0x0001 //RX_TDDRC_SMT_FLAG +280 0x0CCD //RX_TDDRC_SMT_W +281 0x017F //RX_TDDRC_DRC_GAIN +195 0x0014 //RX_FDEQ_SUBNUM +196 0x4848 //RX_FDEQ_GAIN_0 +197 0x4848 //RX_FDEQ_GAIN_1 +198 0x4848 //RX_FDEQ_GAIN_2 +199 0x4848 //RX_FDEQ_GAIN_3 +200 0x4848 //RX_FDEQ_GAIN_4 +201 0x4848 //RX_FDEQ_GAIN_5 +202 0x4444 //RX_FDEQ_GAIN_6 +203 0x4040 //RX_FDEQ_GAIN_7 +204 0x4040 //RX_FDEQ_GAIN_8 +205 0x4040 //RX_FDEQ_GAIN_9 +206 0x4848 //RX_FDEQ_GAIN_10 +207 0x4848 //RX_FDEQ_GAIN_11 +208 0x4848 //RX_FDEQ_GAIN_12 +209 0x4848 //RX_FDEQ_GAIN_13 +210 0x4848 //RX_FDEQ_GAIN_14 +211 0x4848 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0202 //RX_FDEQ_BIN_0 +221 0x0203 //RX_FDEQ_BIN_1 +222 0x0303 //RX_FDEQ_BIN_2 +223 0x0304 //RX_FDEQ_BIN_3 +224 0x0405 //RX_FDEQ_BIN_4 +225 0x0506 //RX_FDEQ_BIN_5 +226 0x0708 //RX_FDEQ_BIN_6 +227 0x090A //RX_FDEQ_BIN_7 +228 0x0B0C //RX_FDEQ_BIN_8 +229 0x0D0E //RX_FDEQ_BIN_9 +230 0x0000 //RX_FDEQ_BIN_10 +231 0x0000 //RX_FDEQ_BIN_11 +232 0x0000 //RX_FDEQ_BIN_12 +233 0x0000 //RX_FDEQ_BIN_13 +234 0x0000 //RX_FDEQ_BIN_14 +235 0x0000 //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x4000 //RX_FDEQ_RESRV_0 +245 0x0320 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0030 //RX_FDDRC_BAND_MARGIN_1 +248 0x0050 //RX_FDDRC_BAND_MARGIN_2 +249 0x0080 //RX_FDDRC_BAND_MARGIN_3 +250 0x0007 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x5000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x6400 //RX_FDDRC_THRD_3_2 +258 0x6400 //RX_FDDRC_THRD_3_3 +259 0x2000 //RX_FDDRC_SLANT_0_0 +260 0x2000 //RX_FDDRC_SLANT_0_1 +261 0x2000 //RX_FDDRC_SLANT_0_2 +262 0x2000 //RX_FDDRC_SLANT_0_3 +263 0x5333 //RX_FDDRC_SLANT_1_0 +264 0x5333 //RX_FDDRC_SLANT_1_1 +265 0x5333 //RX_FDDRC_SLANT_1_2 +266 0x5333 //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +286 0x0100 //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 +#VOL 4 +163 0x3000 //RX_TDDRC_ALPHA_UP_1 +164 0x3000 //RX_TDDRC_ALPHA_UP_2 +165 0x3000 //RX_TDDRC_ALPHA_UP_3 +166 0x3000 //RX_TDDRC_ALPHA_UP_4 +184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +190 0x7FFF //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +269 0x0000 //RX_TDDRC_THRD_0 +270 0x0000 //RX_TDDRC_THRD_1 +271 0x7FFF //RX_TDDRC_THRD_2 +272 0x7FFF //RX_TDDRC_THRD_3 +273 0x7FFF //RX_TDDRC_SLANT_0 +274 0x7EB8 //RX_TDDRC_SLANT_1 +275 0x3000 //RX_TDDRC_ALPHA_UP_0 +276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x199A //RX_TDDRC_HMNC_GAIN +279 0x0001 //RX_TDDRC_SMT_FLAG +280 0x0CCD //RX_TDDRC_SMT_W +281 0x017F //RX_TDDRC_DRC_GAIN +195 0x0014 //RX_FDEQ_SUBNUM +196 0x4848 //RX_FDEQ_GAIN_0 +197 0x4848 //RX_FDEQ_GAIN_1 +198 0x4848 //RX_FDEQ_GAIN_2 +199 0x4848 //RX_FDEQ_GAIN_3 +200 0x4848 //RX_FDEQ_GAIN_4 +201 0x4848 //RX_FDEQ_GAIN_5 +202 0x4444 //RX_FDEQ_GAIN_6 +203 0x4040 //RX_FDEQ_GAIN_7 +204 0x4040 //RX_FDEQ_GAIN_8 +205 0x4040 //RX_FDEQ_GAIN_9 +206 0x4848 //RX_FDEQ_GAIN_10 +207 0x4848 //RX_FDEQ_GAIN_11 +208 0x4848 //RX_FDEQ_GAIN_12 +209 0x4848 //RX_FDEQ_GAIN_13 +210 0x4848 //RX_FDEQ_GAIN_14 +211 0x4848 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0202 //RX_FDEQ_BIN_0 +221 0x0203 //RX_FDEQ_BIN_1 +222 0x0303 //RX_FDEQ_BIN_2 +223 0x0304 //RX_FDEQ_BIN_3 +224 0x0405 //RX_FDEQ_BIN_4 +225 0x0506 //RX_FDEQ_BIN_5 +226 0x0708 //RX_FDEQ_BIN_6 +227 0x090A //RX_FDEQ_BIN_7 +228 0x0B0C //RX_FDEQ_BIN_8 +229 0x0D0E //RX_FDEQ_BIN_9 +230 0x0000 //RX_FDEQ_BIN_10 +231 0x0000 //RX_FDEQ_BIN_11 +232 0x0000 //RX_FDEQ_BIN_12 +233 0x0000 //RX_FDEQ_BIN_13 +234 0x0000 //RX_FDEQ_BIN_14 +235 0x0000 //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x4000 //RX_FDEQ_RESRV_0 +245 0x0320 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0030 //RX_FDDRC_BAND_MARGIN_1 +248 0x0050 //RX_FDDRC_BAND_MARGIN_2 +249 0x0080 //RX_FDDRC_BAND_MARGIN_3 +250 0x0007 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x5000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x6400 //RX_FDDRC_THRD_3_2 +258 0x6400 //RX_FDDRC_THRD_3_3 +259 0x2000 //RX_FDDRC_SLANT_0_0 +260 0x2000 //RX_FDDRC_SLANT_0_1 +261 0x2000 //RX_FDDRC_SLANT_0_2 +262 0x2000 //RX_FDDRC_SLANT_0_3 +263 0x5333 //RX_FDDRC_SLANT_1_0 +264 0x5333 //RX_FDDRC_SLANT_1_1 +265 0x5333 //RX_FDDRC_SLANT_1_2 +266 0x5333 //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +286 0x0100 //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 +#VOL 5 +163 0x3000 //RX_TDDRC_ALPHA_UP_1 +164 0x3000 //RX_TDDRC_ALPHA_UP_2 +165 0x3000 //RX_TDDRC_ALPHA_UP_3 +166 0x3000 //RX_TDDRC_ALPHA_UP_4 +184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +190 0x7FFF //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +269 0x0000 //RX_TDDRC_THRD_0 +270 0x0000 //RX_TDDRC_THRD_1 +271 0x7FFF //RX_TDDRC_THRD_2 +272 0x7FFF //RX_TDDRC_THRD_3 +273 0x7FFF //RX_TDDRC_SLANT_0 +274 0x7EB8 //RX_TDDRC_SLANT_1 +275 0x3000 //RX_TDDRC_ALPHA_UP_0 +276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x199A //RX_TDDRC_HMNC_GAIN +279 0x0001 //RX_TDDRC_SMT_FLAG +280 0x0CCD //RX_TDDRC_SMT_W +281 0x017F //RX_TDDRC_DRC_GAIN +195 0x0014 //RX_FDEQ_SUBNUM +196 0x4848 //RX_FDEQ_GAIN_0 +197 0x4848 //RX_FDEQ_GAIN_1 +198 0x4848 //RX_FDEQ_GAIN_2 +199 0x4848 //RX_FDEQ_GAIN_3 +200 0x4848 //RX_FDEQ_GAIN_4 +201 0x4848 //RX_FDEQ_GAIN_5 +202 0x4444 //RX_FDEQ_GAIN_6 +203 0x4040 //RX_FDEQ_GAIN_7 +204 0x4040 //RX_FDEQ_GAIN_8 +205 0x4040 //RX_FDEQ_GAIN_9 +206 0x4848 //RX_FDEQ_GAIN_10 +207 0x4848 //RX_FDEQ_GAIN_11 +208 0x4848 //RX_FDEQ_GAIN_12 +209 0x4848 //RX_FDEQ_GAIN_13 +210 0x4848 //RX_FDEQ_GAIN_14 +211 0x4848 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0202 //RX_FDEQ_BIN_0 +221 0x0203 //RX_FDEQ_BIN_1 +222 0x0303 //RX_FDEQ_BIN_2 +223 0x0304 //RX_FDEQ_BIN_3 +224 0x0405 //RX_FDEQ_BIN_4 +225 0x0506 //RX_FDEQ_BIN_5 +226 0x0708 //RX_FDEQ_BIN_6 +227 0x090A //RX_FDEQ_BIN_7 +228 0x0B0C //RX_FDEQ_BIN_8 +229 0x0D0E //RX_FDEQ_BIN_9 +230 0x0000 //RX_FDEQ_BIN_10 +231 0x0000 //RX_FDEQ_BIN_11 +232 0x0000 //RX_FDEQ_BIN_12 +233 0x0000 //RX_FDEQ_BIN_13 +234 0x0000 //RX_FDEQ_BIN_14 +235 0x0000 //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x4000 //RX_FDEQ_RESRV_0 +245 0x0320 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0030 //RX_FDDRC_BAND_MARGIN_1 +248 0x0050 //RX_FDDRC_BAND_MARGIN_2 +249 0x0080 //RX_FDDRC_BAND_MARGIN_3 +250 0x0007 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x5000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x6400 //RX_FDDRC_THRD_3_2 +258 0x6400 //RX_FDDRC_THRD_3_3 +259 0x2000 //RX_FDDRC_SLANT_0_0 +260 0x2000 //RX_FDDRC_SLANT_0_1 +261 0x2000 //RX_FDDRC_SLANT_0_2 +262 0x2000 //RX_FDDRC_SLANT_0_3 +263 0x5333 //RX_FDDRC_SLANT_1_0 +264 0x5333 //RX_FDDRC_SLANT_1_1 +265 0x5333 //RX_FDDRC_SLANT_1_2 +266 0x5333 //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +286 0x0100 //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 +#VOL 6 +163 0x3000 //RX_TDDRC_ALPHA_UP_1 +164 0x3000 //RX_TDDRC_ALPHA_UP_2 +165 0x3000 //RX_TDDRC_ALPHA_UP_3 +166 0x3000 //RX_TDDRC_ALPHA_UP_4 +184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +190 0x7FFF //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +269 0x0000 //RX_TDDRC_THRD_0 +270 0x0000 //RX_TDDRC_THRD_1 +271 0x7FFF //RX_TDDRC_THRD_2 +272 0x7FFF //RX_TDDRC_THRD_3 +273 0x7FFF //RX_TDDRC_SLANT_0 +274 0x7EB8 //RX_TDDRC_SLANT_1 +275 0x3000 //RX_TDDRC_ALPHA_UP_0 +276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x199A //RX_TDDRC_HMNC_GAIN +279 0x0001 //RX_TDDRC_SMT_FLAG +280 0x0CCD //RX_TDDRC_SMT_W +281 0x017F //RX_TDDRC_DRC_GAIN +195 0x0014 //RX_FDEQ_SUBNUM +196 0x4848 //RX_FDEQ_GAIN_0 +197 0x4848 //RX_FDEQ_GAIN_1 +198 0x4848 //RX_FDEQ_GAIN_2 +199 0x4848 //RX_FDEQ_GAIN_3 +200 0x4848 //RX_FDEQ_GAIN_4 +201 0x4848 //RX_FDEQ_GAIN_5 +202 0x4444 //RX_FDEQ_GAIN_6 +203 0x4040 //RX_FDEQ_GAIN_7 +204 0x4040 //RX_FDEQ_GAIN_8 +205 0x4040 //RX_FDEQ_GAIN_9 +206 0x4848 //RX_FDEQ_GAIN_10 +207 0x4848 //RX_FDEQ_GAIN_11 +208 0x4848 //RX_FDEQ_GAIN_12 +209 0x4848 //RX_FDEQ_GAIN_13 +210 0x4848 //RX_FDEQ_GAIN_14 +211 0x4848 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0202 //RX_FDEQ_BIN_0 +221 0x0203 //RX_FDEQ_BIN_1 +222 0x0303 //RX_FDEQ_BIN_2 +223 0x0304 //RX_FDEQ_BIN_3 +224 0x0405 //RX_FDEQ_BIN_4 +225 0x0506 //RX_FDEQ_BIN_5 +226 0x0708 //RX_FDEQ_BIN_6 +227 0x090A //RX_FDEQ_BIN_7 +228 0x0B0C //RX_FDEQ_BIN_8 +229 0x0D0E //RX_FDEQ_BIN_9 +230 0x0000 //RX_FDEQ_BIN_10 +231 0x0000 //RX_FDEQ_BIN_11 +232 0x0000 //RX_FDEQ_BIN_12 +233 0x0000 //RX_FDEQ_BIN_13 +234 0x0000 //RX_FDEQ_BIN_14 +235 0x0000 //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x4000 //RX_FDEQ_RESRV_0 +245 0x0320 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0030 //RX_FDDRC_BAND_MARGIN_1 +248 0x0050 //RX_FDDRC_BAND_MARGIN_2 +249 0x0080 //RX_FDDRC_BAND_MARGIN_3 +250 0x0007 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x5000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x6400 //RX_FDDRC_THRD_3_2 +258 0x6400 //RX_FDDRC_THRD_3_3 +259 0x2000 //RX_FDDRC_SLANT_0_0 +260 0x2000 //RX_FDDRC_SLANT_0_1 +261 0x2000 //RX_FDDRC_SLANT_0_2 +262 0x2000 //RX_FDDRC_SLANT_0_3 +263 0x5333 //RX_FDDRC_SLANT_1_0 +264 0x5333 //RX_FDDRC_SLANT_1_1 +265 0x5333 //RX_FDDRC_SLANT_1_2 +266 0x5333 //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +286 0x0100 //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 #CASE_NAME BLUETOOTH-BTWB-VOICE_GENERIC-WB -#PARAM_TYPE TX+RX -#TOTAL_CUSTOM_STEP 7 +#PARAM_MODE Full +#PARAM_TYPE TX+2RX +#TOTAL_CUSTOM_STEP 7+7 #TX 0 0x0008 //TX_OPERATION_MODE_0 1 0x0008 //TX_OPERATION_MODE_1 @@ -24800,20 +37639,20 @@ 248 0xF400 //TX_THR_SN_EST_6 249 0xF600 //TX_THR_SN_EST_7 250 0x0000 //TX_DELTA_THR_SN_EST_0 -251 0x0000 //TX_DELTA_THR_SN_EST_1 +251 0x0200 //TX_DELTA_THR_SN_EST_1 252 0x0200 //TX_DELTA_THR_SN_EST_2 253 0x0200 //TX_DELTA_THR_SN_EST_3 254 0x0200 //TX_DELTA_THR_SN_EST_4 255 0x0200 //TX_DELTA_THR_SN_EST_5 -256 0x0200 //TX_DELTA_THR_SN_EST_6 +256 0x0000 //TX_DELTA_THR_SN_EST_6 257 0x0200 //TX_DELTA_THR_SN_EST_7 258 0x6000 //TX_LAMBDA_NN_EST_0 -259 0x6000 //TX_LAMBDA_NN_EST_1 +259 0x4000 //TX_LAMBDA_NN_EST_1 260 0x4000 //TX_LAMBDA_NN_EST_2 261 0x4000 //TX_LAMBDA_NN_EST_3 262 0x4000 //TX_LAMBDA_NN_EST_4 263 0x4000 //TX_LAMBDA_NN_EST_5 -264 0x4000 //TX_LAMBDA_NN_EST_6 +264 0x6000 //TX_LAMBDA_NN_EST_6 265 0x4000 //TX_LAMBDA_NN_EST_7 266 0x0400 //TX_N_SN_EST 267 0x001E //TX_INBEAM_T @@ -24831,16 +37670,16 @@ 279 0x1000 //TX_B_POST_FLT_0 280 0x1000 //TX_B_POST_FLT_1 281 0x000F //TX_NS_LVL_CTRL_0 -282 0x000F //TX_NS_LVL_CTRL_1 -283 0x0011 //TX_NS_LVL_CTRL_2 +282 0x0011 //TX_NS_LVL_CTRL_1 +283 0x000F //TX_NS_LVL_CTRL_2 284 0x000F //TX_NS_LVL_CTRL_3 285 0x000F //TX_NS_LVL_CTRL_4 286 0x000F //TX_NS_LVL_CTRL_5 287 0x000F //TX_NS_LVL_CTRL_6 288 0x0011 //TX_NS_LVL_CTRL_7 289 0x000C //TX_MIN_GAIN_S_0 -290 0x000C //TX_MIN_GAIN_S_1 -291 0x000F //TX_MIN_GAIN_S_2 +290 0x000F //TX_MIN_GAIN_S_1 +291 0x000C //TX_MIN_GAIN_S_2 292 0x000C //TX_MIN_GAIN_S_3 293 0x000C //TX_MIN_GAIN_S_4 294 0x000C //TX_MIN_GAIN_S_5 @@ -24864,12 +37703,12 @@ 312 0x7FFF //TX_A_POST_FILT_0 313 0x2000 //TX_A_POST_FILT_1 314 0x4000 //TX_A_POST_FILT_S_0 -315 0x4000 //TX_A_POST_FILT_S_1 +315 0x5000 //TX_A_POST_FILT_S_1 316 0x5000 //TX_A_POST_FILT_S_2 317 0x5000 //TX_A_POST_FILT_S_3 318 0x5000 //TX_A_POST_FILT_S_4 319 0x5000 //TX_A_POST_FILT_S_5 -320 0x5000 //TX_A_POST_FILT_S_6 +320 0x4000 //TX_A_POST_FILT_S_6 321 0x5000 //TX_A_POST_FILT_S_7 322 0x1000 //TX_B_POST_FILT_0 323 0x1000 //TX_B_POST_FILT_1 @@ -24929,10 +37768,10 @@ 377 0x7FFF //TX_NOISE_TH_5_4 378 0x044C //TX_NOISE_TH_6 379 0x0014 //TX_MINENOISE_TH -380 0x4000 //TX_MINENOISE_MIC0_TH_MTS -381 0xFFEE //TX_MINENOISE_MIC0_TH_EXP -382 0x6000 //TX_MINENOISE_MIC0_S_TH_MTS -383 0xFFF3 //TX_MINENOISE_MIC0_S_TH_EXP +380 0x4000 //TX_MORENS_TFMASK_TH +381 0xFFEE //TX_DRC_QUIET_FLOOR +382 0x6000 //TX_RATIODTL_CUT_TH +383 0xFFF3 //TX_DT_CUT_K1 384 0x0666 //TX_OUT_ENER_S_TH_CLEAN 385 0x0666 //TX_OUT_ENER_S_TH_LESSCLEAN 386 0x0333 //TX_OUT_ENER_S_TH_NOISY @@ -24940,15 +37779,15 @@ 388 0x0333 //TX_OUT_ENER_TH_SPEECH 389 0x2000 //TX_SN_NPB_GAIN 390 0x0000 //TX_NN_NPB_GAIN -391 0x0000 //TX_CSX_ALPHA_0 -392 0x0000 //TX_CSX_ALPHA_1 -393 0x0000 //TX_CSX_ALPHA_2 -394 0x0000 //TX_CSX_ALPHA_3 -395 0x0800 //TX_MU_ARSP_EST -396 0x00C8 //TX_P_OUTBEAM_MIN_TH +391 0x0000 //TX_POST_MASK_SUP_HSNE +392 0x0000 //TX_TAIL_DET_TH +393 0x0000 //TX_B_LESSCUT_RTO_WTA +394 0x0000 //TX_MEL_G_R +395 0x0800 //TX_SUPHIGH_TH +396 0x00C8 //TX_MASK_G_R 397 0x0002 //TX_EXTRA_NS_L -398 0x0800 //TX_EXTRA_NS_A -399 0x0005 //TX_VR_NOISE_FLOOR_TH +398 0x0800 //TX_C_POST_FLT_MASK +399 0x0005 //TX_A_POST_FLT_WNS 400 0x0148 //TX_MIN_G_LOW300HZ 401 0x0002 //TX_MAXLEVEL_CNG 402 0x00B4 //TX_STN_NOISE_TH @@ -25063,16 +37902,16 @@ 511 0x6666 //TX_MIC_TO_BFGAIN 512 0x0000 //TX_MICTOBFGAIN0 513 0x0000 //TX_FASTMUE_TH -514 0x0000 //TX_DERVB_LEN_0 -515 0x0000 //TX_DERVB_LEN_1 -516 0x0000 //TX_RHO_DERVB -517 0x0000 //TX_MIC_INDX_DERVB -518 0x0000 //TX_MU_DERVB -519 0x0000 //TX_DR_RESRV_0 -520 0x0000 //TX_DR_RESRV_1 -521 0x0000 //TX_DR_RESRV_2 -522 0x0000 //TX_DR_RESRV_3 -523 0x0000 //TX_DR_RESRV_4 +514 0x0000 //TX_DEREVERB_LF_MU +515 0x0000 //TX_DEREVERB_HF_MU +516 0x0000 //TX_DEREVERB_DELAY +517 0x0000 //TX_DEREVERB_COEF_LEN +518 0x0000 //TX_DEREVERB_DNR +519 0x0000 //TX_DEREVERB_ALPHA +520 0x0000 //TX_DEREVERB_BETA +521 0x0000 //TX_GSC_RTOL_TH +522 0x0000 //TX_GSC_RTOH_TH +523 0x0000 //TX_WIDE2_MEANHTH 524 0x0000 //TX_DR_RESRV_5 525 0x0000 //TX_DR_RESRV_6 526 0x0000 //TX_DR_RESRV_7 @@ -25446,8 +38285,73 @@ 894 0xC000 //TX_FASTNS_SSA_THHFL 895 0xCCCC //TX_FASTNS_SSA_THLFH 896 0xD999 //TX_FASTNS_SSA_THHFH +897 0x0000 //TX_SENDFUNC_REG_MICMUTE +898 0x0000 //TX_SENDFUNC_REG_MICMUTE1 +899 0x0000 //TX_MICMUTE_RATIO_THR +900 0x0000 //TX_MICMUTE_AMP_THR +901 0x0000 //TX_MICMUTE_HPF_IND +902 0x0000 //TX_MICMUTE_LOG_EYR_TH +903 0x0000 //TX_MICMUTE_CVG_TIME +904 0x0000 //TX_MICMUTE_RELEASE_TIME +905 0x0000 //TX_MIC_VOLUME_MIC0MUTE +906 0x0000 //TX_MICMUTE_EPD_OFFSET_0 +907 0x0000 //TX_MICMUTE_FRQ_AEC_L +908 0x0000 //TX_MICMUTE_EAD_THR +909 0x0000 //TX_MICMUTE_LAMBDA_CB_NLE +910 0x0000 //TX_MICMUTE_LAMBDA_RE_EST +911 0x0000 //TX_DTD_THR1_MICMUTE_0 +912 0x0000 //TX_DTD_THR1_MICMUTE_1 +913 0x0000 //TX_DTD_THR1_MICMUTE_2 +914 0x0000 //TX_DTD_THR1_MICMUTE_3 +915 0x0000 //TX_DTD_THR2_MICMUTE_0 +916 0x0000 //TX_MICMUTE_MIN_EQ_RE_EST_0 +917 0x0000 //TX_MICMUTE_MIN_EQ_RE_EST_1 +918 0x0000 //TX_MICMUTE_MIN_EQ_RE_EST_2 +919 0x0000 //TX_MICMUTE_MIN_EQ_RE_EST_3 +920 0x0000 //TX_MICMUTE_MIN_EQ_RE_EST_4 +921 0x0000 //TX_MICMUTE_C_POST_FLT +922 0x0000 //TX_MICMUTE_DT_CUT_K +923 0x0000 //TX_MICMUTE_DT_CUT_THR +924 0x0000 //TX_MICMUTE_DT_CUT_K2 +925 0x0000 //TX_MICMUTE_DT_CUT_THR2 +926 0x0000 //TX_MICMUTE_DT2_HOLD_N +927 0x0000 //TX_MICMUTE_RATIODTH_THCUT +928 0x0000 //TX_MICMUTE_B_POST_FLT_ECHOL +929 0x0000 //TX_MICMUTE_B_POST_FLT_ECHOH +930 0x0000 //TX_MICMUTE_C_POST_FLT_MASK +931 0x0000 //TX_MICMUTE_RATIODTL_CUT_TH +932 0x0000 //TX_MICMUTE_DT_CUT_K1 +933 0x0000 //TX_MICMUTE_N2_SN_EST +934 0x0000 //TX_MICMUTE_THR_SN_EST_0 +935 0x0000 //TX_MICMUTE_MIN_G_CTRL_0 +936 0x0000 //TX_MICMUTE_A_POST_FILT_S_0 +937 0x0000 //TX_MICMUTE_B_POST_FILT_0 +938 0x0000 //TX_MIC1RUB_AMP_THR +939 0x0000 //TX_MIC1MUTE_RATIO_THR +940 0x0000 //TX_MIC1MUTE_AMP_THR +941 0x0000 //TX_MIC1MUTE_CVG_TIME +942 0x0000 //TX_MIC1MUTE_RELEASE_TIME +943 0x0000 //TX_AMS_RESRV_01 +944 0x0000 //TX_AMS_RESRV_02 +945 0x0000 //TX_AMS_RESRV_03 +946 0x0000 //TX_AMS_RESRV_04 +947 0x0000 //TX_AMS_RESRV_05 +948 0x0000 //TX_AMS_RESRV_06 +949 0x0000 //TX_AMS_RESRV_07 +950 0x0000 //TX_AMS_RESRV_08 +951 0x0000 //TX_AMS_RESRV_09 +952 0x0000 //TX_AMS_RESRV_10 +953 0x0000 //TX_AMS_RESRV_11 +954 0x0000 //TX_AMS_RESRV_12 +955 0x0000 //TX_AMS_RESRV_13 +956 0x0000 //TX_AMS_RESRV_14 +957 0x0000 //TX_AMS_RESRV_15 +958 0x0000 //TX_AMS_RESRV_16 +959 0x0000 //TX_AMS_RESRV_17 +960 0x0000 //TX_AMS_RESRV_18 +961 0x0000 //TX_AMS_RESRV_19 #RX -0 0x006C //RX_RECVFUNC_MODE_0 +0 0x206C //RX_RECVFUNC_MODE_0 1 0x0000 //RX_RECVFUNC_MODE_1 2 0x0001 //RX_SAMPLINGFREQ_SIG 3 0x0001 //RX_SAMPLINGFREQ_PROC @@ -26297,10 +39201,862 @@ 110 0x0000 //RX_FDDRC_RESRV_0 129 0x0100 //RX_SPK_VOL 130 0x0000 //RX_VOL_RESRV_0 +#RX 2 +157 0x206C //RX_RECVFUNC_MODE_0 +158 0x0000 //RX_RECVFUNC_MODE_1 +159 0x0001 //RX_SAMPLINGFREQ_SIG +160 0x0001 //RX_SAMPLINGFREQ_PROC +161 0x000A //RX_FRAME_SZ +162 0x0000 //RX_DELAY_OPT +163 0x1000 //RX_TDDRC_ALPHA_UP_1 +164 0x1000 //RX_TDDRC_ALPHA_UP_2 +165 0x1000 //RX_TDDRC_ALPHA_UP_3 +166 0x1000 //RX_TDDRC_ALPHA_UP_4 +167 0x0800 //RX_PGA +168 0x7FFF //RX_A_HP +169 0x4000 //RX_B_PE +170 0x3800 //RX_THR_PITCH_DET_0 +171 0x3000 //RX_THR_PITCH_DET_1 +172 0x2800 //RX_THR_PITCH_DET_2 +173 0x0008 //RX_PITCH_BFR_LEN +174 0x0003 //RX_SBD_PITCH_DET +175 0x0100 //RX_PP_RESRV_0 +176 0x0020 //RX_PP_RESRV_1 +177 0x0600 //RX_N_SN_EST +178 0x000C //RX_N2_SN_EST +179 0x0010 //RX_NS_LVL_CTRL +180 0xF800 //RX_THR_SN_EST +181 0x7CCD //RX_LAMBDA_PFILT +182 0x000A //RX_FENS_RESRV_0 +183 0x0190 //RX_FENS_RESRV_1 +184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +187 0x0002 //RX_EXTRA_NS_L +188 0x0800 //RX_EXTRA_NS_A +189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +190 0x7FFF //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +192 0x199A //RX_A_POST_FLT +193 0x0000 //RX_LMT_THRD +194 0x4000 //RX_LMT_ALPHA +195 0x001C //RX_FDEQ_SUBNUM +196 0x4848 //RX_FDEQ_GAIN_0 +197 0x4848 //RX_FDEQ_GAIN_1 +198 0x4848 //RX_FDEQ_GAIN_2 +199 0x4848 //RX_FDEQ_GAIN_3 +200 0x4848 //RX_FDEQ_GAIN_4 +201 0x4848 //RX_FDEQ_GAIN_5 +202 0x4848 //RX_FDEQ_GAIN_6 +203 0x4848 //RX_FDEQ_GAIN_7 +204 0x4848 //RX_FDEQ_GAIN_8 +205 0x3C3C //RX_FDEQ_GAIN_9 +206 0x3C3C //RX_FDEQ_GAIN_10 +207 0x3838 //RX_FDEQ_GAIN_11 +208 0x3838 //RX_FDEQ_GAIN_12 +209 0x3030 //RX_FDEQ_GAIN_13 +210 0x4848 //RX_FDEQ_GAIN_14 +211 0x4848 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0202 //RX_FDEQ_BIN_0 +221 0x0203 //RX_FDEQ_BIN_1 +222 0x0303 //RX_FDEQ_BIN_2 +223 0x0304 //RX_FDEQ_BIN_3 +224 0x0405 //RX_FDEQ_BIN_4 +225 0x0506 //RX_FDEQ_BIN_5 +226 0x0708 //RX_FDEQ_BIN_6 +227 0x090A //RX_FDEQ_BIN_7 +228 0x0B0C //RX_FDEQ_BIN_8 +229 0x0D0E //RX_FDEQ_BIN_9 +230 0x0E0F //RX_FDEQ_BIN_10 +231 0x0F10 //RX_FDEQ_BIN_11 +232 0x1011 //RX_FDEQ_BIN_12 +233 0x1112 //RX_FDEQ_BIN_13 +234 0x0000 //RX_FDEQ_BIN_14 +235 0x0000 //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x4000 //RX_FDEQ_RESRV_0 +245 0x0320 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0030 //RX_FDDRC_BAND_MARGIN_1 +248 0x0050 //RX_FDDRC_BAND_MARGIN_2 +249 0x0080 //RX_FDDRC_BAND_MARGIN_3 +250 0x0007 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x5000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x6400 //RX_FDDRC_THRD_3_2 +258 0x6400 //RX_FDDRC_THRD_3_3 +259 0x2000 //RX_FDDRC_SLANT_0_0 +260 0x2000 //RX_FDDRC_SLANT_0_1 +261 0x2000 //RX_FDDRC_SLANT_0_2 +262 0x2000 //RX_FDDRC_SLANT_0_3 +263 0x5333 //RX_FDDRC_SLANT_1_0 +264 0x5333 //RX_FDDRC_SLANT_1_1 +265 0x5333 //RX_FDDRC_SLANT_1_2 +266 0x5333 //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +268 0x0000 //RX_FILTINDX +269 0x0000 //RX_TDDRC_THRD_0 +270 0x0000 //RX_TDDRC_THRD_1 +271 0x7FFF //RX_TDDRC_THRD_2 +272 0x7FFF //RX_TDDRC_THRD_3 +273 0x7E70 //RX_TDDRC_SLANT_0 +274 0x7FFF //RX_TDDRC_SLANT_1 +275 0x1000 //RX_TDDRC_ALPHA_UP_0 +276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x199A //RX_TDDRC_HMNC_GAIN +279 0x0001 //RX_TDDRC_SMT_FLAG +280 0x0CCD //RX_TDDRC_SMT_W +281 0x0155 //RX_TDDRC_DRC_GAIN +282 0x7C00 //RX_LAMBDA_PKA_FP +283 0x2000 //RX_TPKA_FP +284 0x2000 //RX_MIN_G_FP +285 0x0080 //RX_MAX_G_FP +286 0x0100 //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 +288 0x0000 //RX_MAXLEVEL_CNG +289 0x3000 //RX_BWE_UV_TH +290 0x3000 //RX_BWE_UV_TH2 +291 0x1800 //RX_BWE_UV_TH3 +292 0x1000 //RX_BWE_V_TH +293 0x04CD //RX_BWE_GAIN1_V_TH1 +294 0x0F33 //RX_BWE_GAIN1_V_TH2 +295 0x7333 //RX_BWE_UV_EQ +296 0x199A //RX_BWE_V_EQ +297 0x7333 //RX_BWE_TONE_TH +298 0x0004 //RX_BWE_UV_HOLD_T +299 0x6CCD //RX_BWE_GAIN2_ALPHA +300 0x799A //RX_BWE_GAIN3_ALPHA +301 0x001E //RX_BWE_CUTOFF +302 0x3000 //RX_BWE_GAINFILL +303 0x3200 //RX_BWE_MAXTH_TONE +304 0x2000 //RX_BWE_EQ_0 +305 0x2000 //RX_BWE_EQ_1 +306 0x2000 //RX_BWE_EQ_2 +307 0x2000 //RX_BWE_EQ_3 +308 0x2000 //RX_BWE_EQ_4 +309 0x2000 //RX_BWE_EQ_5 +310 0x2000 //RX_BWE_EQ_6 +311 0x0000 //RX_BWE_RESRV_0 +312 0x0000 //RX_BWE_RESRV_1 +313 0x0000 //RX_BWE_RESRV_2 +#VOL 0 +163 0x1000 //RX_TDDRC_ALPHA_UP_1 +164 0x1000 //RX_TDDRC_ALPHA_UP_2 +165 0x1000 //RX_TDDRC_ALPHA_UP_3 +166 0x1000 //RX_TDDRC_ALPHA_UP_4 +184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +190 0x7FFF //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +269 0x0000 //RX_TDDRC_THRD_0 +270 0x0000 //RX_TDDRC_THRD_1 +271 0x7FFF //RX_TDDRC_THRD_2 +272 0x7FFF //RX_TDDRC_THRD_3 +273 0x7E70 //RX_TDDRC_SLANT_0 +274 0x7FFF //RX_TDDRC_SLANT_1 +275 0x1000 //RX_TDDRC_ALPHA_UP_0 +276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x199A //RX_TDDRC_HMNC_GAIN +279 0x0001 //RX_TDDRC_SMT_FLAG +280 0x0CCD //RX_TDDRC_SMT_W +281 0x0155 //RX_TDDRC_DRC_GAIN +195 0x001C //RX_FDEQ_SUBNUM +196 0x4848 //RX_FDEQ_GAIN_0 +197 0x4848 //RX_FDEQ_GAIN_1 +198 0x4848 //RX_FDEQ_GAIN_2 +199 0x4848 //RX_FDEQ_GAIN_3 +200 0x4848 //RX_FDEQ_GAIN_4 +201 0x4848 //RX_FDEQ_GAIN_5 +202 0x4848 //RX_FDEQ_GAIN_6 +203 0x4848 //RX_FDEQ_GAIN_7 +204 0x4848 //RX_FDEQ_GAIN_8 +205 0x3C3C //RX_FDEQ_GAIN_9 +206 0x3C3C //RX_FDEQ_GAIN_10 +207 0x3838 //RX_FDEQ_GAIN_11 +208 0x3838 //RX_FDEQ_GAIN_12 +209 0x3030 //RX_FDEQ_GAIN_13 +210 0x4848 //RX_FDEQ_GAIN_14 +211 0x4848 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0202 //RX_FDEQ_BIN_0 +221 0x0203 //RX_FDEQ_BIN_1 +222 0x0303 //RX_FDEQ_BIN_2 +223 0x0304 //RX_FDEQ_BIN_3 +224 0x0405 //RX_FDEQ_BIN_4 +225 0x0506 //RX_FDEQ_BIN_5 +226 0x0708 //RX_FDEQ_BIN_6 +227 0x090A //RX_FDEQ_BIN_7 +228 0x0B0C //RX_FDEQ_BIN_8 +229 0x0D0E //RX_FDEQ_BIN_9 +230 0x0E0F //RX_FDEQ_BIN_10 +231 0x0F10 //RX_FDEQ_BIN_11 +232 0x1011 //RX_FDEQ_BIN_12 +233 0x1112 //RX_FDEQ_BIN_13 +234 0x0000 //RX_FDEQ_BIN_14 +235 0x0000 //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x4000 //RX_FDEQ_RESRV_0 +245 0x0320 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0030 //RX_FDDRC_BAND_MARGIN_1 +248 0x0050 //RX_FDDRC_BAND_MARGIN_2 +249 0x0080 //RX_FDDRC_BAND_MARGIN_3 +250 0x0007 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x5000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x6400 //RX_FDDRC_THRD_3_2 +258 0x6400 //RX_FDDRC_THRD_3_3 +259 0x2000 //RX_FDDRC_SLANT_0_0 +260 0x2000 //RX_FDDRC_SLANT_0_1 +261 0x2000 //RX_FDDRC_SLANT_0_2 +262 0x2000 //RX_FDDRC_SLANT_0_3 +263 0x5333 //RX_FDDRC_SLANT_1_0 +264 0x5333 //RX_FDDRC_SLANT_1_1 +265 0x5333 //RX_FDDRC_SLANT_1_2 +266 0x5333 //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +286 0x0100 //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 +#VOL 1 +163 0x1000 //RX_TDDRC_ALPHA_UP_1 +164 0x1000 //RX_TDDRC_ALPHA_UP_2 +165 0x1000 //RX_TDDRC_ALPHA_UP_3 +166 0x1000 //RX_TDDRC_ALPHA_UP_4 +184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +190 0x7FFF //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +269 0x0000 //RX_TDDRC_THRD_0 +270 0x0000 //RX_TDDRC_THRD_1 +271 0x7FFF //RX_TDDRC_THRD_2 +272 0x7FFF //RX_TDDRC_THRD_3 +273 0x7E70 //RX_TDDRC_SLANT_0 +274 0x7FFF //RX_TDDRC_SLANT_1 +275 0x1000 //RX_TDDRC_ALPHA_UP_0 +276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x199A //RX_TDDRC_HMNC_GAIN +279 0x0001 //RX_TDDRC_SMT_FLAG +280 0x0CCD //RX_TDDRC_SMT_W +281 0x0155 //RX_TDDRC_DRC_GAIN +195 0x001C //RX_FDEQ_SUBNUM +196 0x4848 //RX_FDEQ_GAIN_0 +197 0x4848 //RX_FDEQ_GAIN_1 +198 0x4848 //RX_FDEQ_GAIN_2 +199 0x4848 //RX_FDEQ_GAIN_3 +200 0x4848 //RX_FDEQ_GAIN_4 +201 0x4848 //RX_FDEQ_GAIN_5 +202 0x4848 //RX_FDEQ_GAIN_6 +203 0x4848 //RX_FDEQ_GAIN_7 +204 0x4848 //RX_FDEQ_GAIN_8 +205 0x3C3C //RX_FDEQ_GAIN_9 +206 0x3C3C //RX_FDEQ_GAIN_10 +207 0x3838 //RX_FDEQ_GAIN_11 +208 0x3838 //RX_FDEQ_GAIN_12 +209 0x3030 //RX_FDEQ_GAIN_13 +210 0x4848 //RX_FDEQ_GAIN_14 +211 0x4848 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0202 //RX_FDEQ_BIN_0 +221 0x0203 //RX_FDEQ_BIN_1 +222 0x0303 //RX_FDEQ_BIN_2 +223 0x0304 //RX_FDEQ_BIN_3 +224 0x0405 //RX_FDEQ_BIN_4 +225 0x0506 //RX_FDEQ_BIN_5 +226 0x0708 //RX_FDEQ_BIN_6 +227 0x090A //RX_FDEQ_BIN_7 +228 0x0B0C //RX_FDEQ_BIN_8 +229 0x0D0E //RX_FDEQ_BIN_9 +230 0x0E0F //RX_FDEQ_BIN_10 +231 0x0F10 //RX_FDEQ_BIN_11 +232 0x1011 //RX_FDEQ_BIN_12 +233 0x1112 //RX_FDEQ_BIN_13 +234 0x0000 //RX_FDEQ_BIN_14 +235 0x0000 //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x4000 //RX_FDEQ_RESRV_0 +245 0x0320 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0030 //RX_FDDRC_BAND_MARGIN_1 +248 0x0050 //RX_FDDRC_BAND_MARGIN_2 +249 0x0080 //RX_FDDRC_BAND_MARGIN_3 +250 0x0007 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x5000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x6400 //RX_FDDRC_THRD_3_2 +258 0x6400 //RX_FDDRC_THRD_3_3 +259 0x2000 //RX_FDDRC_SLANT_0_0 +260 0x2000 //RX_FDDRC_SLANT_0_1 +261 0x2000 //RX_FDDRC_SLANT_0_2 +262 0x2000 //RX_FDDRC_SLANT_0_3 +263 0x5333 //RX_FDDRC_SLANT_1_0 +264 0x5333 //RX_FDDRC_SLANT_1_1 +265 0x5333 //RX_FDDRC_SLANT_1_2 +266 0x5333 //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +286 0x0100 //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 +#VOL 2 +163 0x1000 //RX_TDDRC_ALPHA_UP_1 +164 0x1000 //RX_TDDRC_ALPHA_UP_2 +165 0x1000 //RX_TDDRC_ALPHA_UP_3 +166 0x1000 //RX_TDDRC_ALPHA_UP_4 +184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +190 0x7FFF //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +269 0x0000 //RX_TDDRC_THRD_0 +270 0x0000 //RX_TDDRC_THRD_1 +271 0x7FFF //RX_TDDRC_THRD_2 +272 0x7FFF //RX_TDDRC_THRD_3 +273 0x7E70 //RX_TDDRC_SLANT_0 +274 0x7FFF //RX_TDDRC_SLANT_1 +275 0x1000 //RX_TDDRC_ALPHA_UP_0 +276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x199A //RX_TDDRC_HMNC_GAIN +279 0x0001 //RX_TDDRC_SMT_FLAG +280 0x0CCD //RX_TDDRC_SMT_W +281 0x0155 //RX_TDDRC_DRC_GAIN +195 0x001C //RX_FDEQ_SUBNUM +196 0x4848 //RX_FDEQ_GAIN_0 +197 0x4848 //RX_FDEQ_GAIN_1 +198 0x4848 //RX_FDEQ_GAIN_2 +199 0x4848 //RX_FDEQ_GAIN_3 +200 0x4848 //RX_FDEQ_GAIN_4 +201 0x4848 //RX_FDEQ_GAIN_5 +202 0x4848 //RX_FDEQ_GAIN_6 +203 0x4848 //RX_FDEQ_GAIN_7 +204 0x4848 //RX_FDEQ_GAIN_8 +205 0x3C3C //RX_FDEQ_GAIN_9 +206 0x3C3C //RX_FDEQ_GAIN_10 +207 0x3838 //RX_FDEQ_GAIN_11 +208 0x3838 //RX_FDEQ_GAIN_12 +209 0x3030 //RX_FDEQ_GAIN_13 +210 0x4848 //RX_FDEQ_GAIN_14 +211 0x4848 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0202 //RX_FDEQ_BIN_0 +221 0x0203 //RX_FDEQ_BIN_1 +222 0x0303 //RX_FDEQ_BIN_2 +223 0x0304 //RX_FDEQ_BIN_3 +224 0x0405 //RX_FDEQ_BIN_4 +225 0x0506 //RX_FDEQ_BIN_5 +226 0x0708 //RX_FDEQ_BIN_6 +227 0x090A //RX_FDEQ_BIN_7 +228 0x0B0C //RX_FDEQ_BIN_8 +229 0x0D0E //RX_FDEQ_BIN_9 +230 0x0E0F //RX_FDEQ_BIN_10 +231 0x0F10 //RX_FDEQ_BIN_11 +232 0x1011 //RX_FDEQ_BIN_12 +233 0x1112 //RX_FDEQ_BIN_13 +234 0x0000 //RX_FDEQ_BIN_14 +235 0x0000 //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x4000 //RX_FDEQ_RESRV_0 +245 0x0320 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0030 //RX_FDDRC_BAND_MARGIN_1 +248 0x0050 //RX_FDDRC_BAND_MARGIN_2 +249 0x0080 //RX_FDDRC_BAND_MARGIN_3 +250 0x0007 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x5000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x6400 //RX_FDDRC_THRD_3_2 +258 0x6400 //RX_FDDRC_THRD_3_3 +259 0x2000 //RX_FDDRC_SLANT_0_0 +260 0x2000 //RX_FDDRC_SLANT_0_1 +261 0x2000 //RX_FDDRC_SLANT_0_2 +262 0x2000 //RX_FDDRC_SLANT_0_3 +263 0x5333 //RX_FDDRC_SLANT_1_0 +264 0x5333 //RX_FDDRC_SLANT_1_1 +265 0x5333 //RX_FDDRC_SLANT_1_2 +266 0x5333 //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +286 0x0100 //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 +#VOL 3 +163 0x1000 //RX_TDDRC_ALPHA_UP_1 +164 0x1000 //RX_TDDRC_ALPHA_UP_2 +165 0x1000 //RX_TDDRC_ALPHA_UP_3 +166 0x1000 //RX_TDDRC_ALPHA_UP_4 +184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +190 0x7FFF //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +269 0x0000 //RX_TDDRC_THRD_0 +270 0x0000 //RX_TDDRC_THRD_1 +271 0x7FFF //RX_TDDRC_THRD_2 +272 0x7FFF //RX_TDDRC_THRD_3 +273 0x7E70 //RX_TDDRC_SLANT_0 +274 0x7FFF //RX_TDDRC_SLANT_1 +275 0x1000 //RX_TDDRC_ALPHA_UP_0 +276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x199A //RX_TDDRC_HMNC_GAIN +279 0x0001 //RX_TDDRC_SMT_FLAG +280 0x0CCD //RX_TDDRC_SMT_W +281 0x0155 //RX_TDDRC_DRC_GAIN +195 0x001C //RX_FDEQ_SUBNUM +196 0x4848 //RX_FDEQ_GAIN_0 +197 0x4848 //RX_FDEQ_GAIN_1 +198 0x4848 //RX_FDEQ_GAIN_2 +199 0x4848 //RX_FDEQ_GAIN_3 +200 0x4848 //RX_FDEQ_GAIN_4 +201 0x4848 //RX_FDEQ_GAIN_5 +202 0x4848 //RX_FDEQ_GAIN_6 +203 0x4848 //RX_FDEQ_GAIN_7 +204 0x4848 //RX_FDEQ_GAIN_8 +205 0x3C3C //RX_FDEQ_GAIN_9 +206 0x3C3C //RX_FDEQ_GAIN_10 +207 0x3838 //RX_FDEQ_GAIN_11 +208 0x3838 //RX_FDEQ_GAIN_12 +209 0x3030 //RX_FDEQ_GAIN_13 +210 0x4848 //RX_FDEQ_GAIN_14 +211 0x4848 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0202 //RX_FDEQ_BIN_0 +221 0x0203 //RX_FDEQ_BIN_1 +222 0x0303 //RX_FDEQ_BIN_2 +223 0x0304 //RX_FDEQ_BIN_3 +224 0x0405 //RX_FDEQ_BIN_4 +225 0x0506 //RX_FDEQ_BIN_5 +226 0x0708 //RX_FDEQ_BIN_6 +227 0x090A //RX_FDEQ_BIN_7 +228 0x0B0C //RX_FDEQ_BIN_8 +229 0x0D0E //RX_FDEQ_BIN_9 +230 0x0E0F //RX_FDEQ_BIN_10 +231 0x0F10 //RX_FDEQ_BIN_11 +232 0x1011 //RX_FDEQ_BIN_12 +233 0x1112 //RX_FDEQ_BIN_13 +234 0x0000 //RX_FDEQ_BIN_14 +235 0x0000 //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x4000 //RX_FDEQ_RESRV_0 +245 0x0320 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0030 //RX_FDDRC_BAND_MARGIN_1 +248 0x0050 //RX_FDDRC_BAND_MARGIN_2 +249 0x0080 //RX_FDDRC_BAND_MARGIN_3 +250 0x0007 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x5000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x6400 //RX_FDDRC_THRD_3_2 +258 0x6400 //RX_FDDRC_THRD_3_3 +259 0x2000 //RX_FDDRC_SLANT_0_0 +260 0x2000 //RX_FDDRC_SLANT_0_1 +261 0x2000 //RX_FDDRC_SLANT_0_2 +262 0x2000 //RX_FDDRC_SLANT_0_3 +263 0x5333 //RX_FDDRC_SLANT_1_0 +264 0x5333 //RX_FDDRC_SLANT_1_1 +265 0x5333 //RX_FDDRC_SLANT_1_2 +266 0x5333 //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +286 0x0100 //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 +#VOL 4 +163 0x1000 //RX_TDDRC_ALPHA_UP_1 +164 0x1000 //RX_TDDRC_ALPHA_UP_2 +165 0x1000 //RX_TDDRC_ALPHA_UP_3 +166 0x1000 //RX_TDDRC_ALPHA_UP_4 +184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +190 0x7FFF //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +269 0x0000 //RX_TDDRC_THRD_0 +270 0x0000 //RX_TDDRC_THRD_1 +271 0x7FFF //RX_TDDRC_THRD_2 +272 0x7FFF //RX_TDDRC_THRD_3 +273 0x7E70 //RX_TDDRC_SLANT_0 +274 0x7FFF //RX_TDDRC_SLANT_1 +275 0x1000 //RX_TDDRC_ALPHA_UP_0 +276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x199A //RX_TDDRC_HMNC_GAIN +279 0x0001 //RX_TDDRC_SMT_FLAG +280 0x0CCD //RX_TDDRC_SMT_W +281 0x0155 //RX_TDDRC_DRC_GAIN +195 0x001C //RX_FDEQ_SUBNUM +196 0x4848 //RX_FDEQ_GAIN_0 +197 0x4848 //RX_FDEQ_GAIN_1 +198 0x4848 //RX_FDEQ_GAIN_2 +199 0x4848 //RX_FDEQ_GAIN_3 +200 0x4848 //RX_FDEQ_GAIN_4 +201 0x4848 //RX_FDEQ_GAIN_5 +202 0x4848 //RX_FDEQ_GAIN_6 +203 0x4848 //RX_FDEQ_GAIN_7 +204 0x4848 //RX_FDEQ_GAIN_8 +205 0x3C3C //RX_FDEQ_GAIN_9 +206 0x3C3C //RX_FDEQ_GAIN_10 +207 0x3838 //RX_FDEQ_GAIN_11 +208 0x3838 //RX_FDEQ_GAIN_12 +209 0x3030 //RX_FDEQ_GAIN_13 +210 0x4848 //RX_FDEQ_GAIN_14 +211 0x4848 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0202 //RX_FDEQ_BIN_0 +221 0x0203 //RX_FDEQ_BIN_1 +222 0x0303 //RX_FDEQ_BIN_2 +223 0x0304 //RX_FDEQ_BIN_3 +224 0x0405 //RX_FDEQ_BIN_4 +225 0x0506 //RX_FDEQ_BIN_5 +226 0x0708 //RX_FDEQ_BIN_6 +227 0x090A //RX_FDEQ_BIN_7 +228 0x0B0C //RX_FDEQ_BIN_8 +229 0x0D0E //RX_FDEQ_BIN_9 +230 0x0E0F //RX_FDEQ_BIN_10 +231 0x0F10 //RX_FDEQ_BIN_11 +232 0x1011 //RX_FDEQ_BIN_12 +233 0x1112 //RX_FDEQ_BIN_13 +234 0x0000 //RX_FDEQ_BIN_14 +235 0x0000 //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x4000 //RX_FDEQ_RESRV_0 +245 0x0320 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0030 //RX_FDDRC_BAND_MARGIN_1 +248 0x0050 //RX_FDDRC_BAND_MARGIN_2 +249 0x0080 //RX_FDDRC_BAND_MARGIN_3 +250 0x0007 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x5000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x6400 //RX_FDDRC_THRD_3_2 +258 0x6400 //RX_FDDRC_THRD_3_3 +259 0x2000 //RX_FDDRC_SLANT_0_0 +260 0x2000 //RX_FDDRC_SLANT_0_1 +261 0x2000 //RX_FDDRC_SLANT_0_2 +262 0x2000 //RX_FDDRC_SLANT_0_3 +263 0x5333 //RX_FDDRC_SLANT_1_0 +264 0x5333 //RX_FDDRC_SLANT_1_1 +265 0x5333 //RX_FDDRC_SLANT_1_2 +266 0x5333 //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +286 0x0100 //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 +#VOL 5 +163 0x1000 //RX_TDDRC_ALPHA_UP_1 +164 0x1000 //RX_TDDRC_ALPHA_UP_2 +165 0x1000 //RX_TDDRC_ALPHA_UP_3 +166 0x1000 //RX_TDDRC_ALPHA_UP_4 +184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +190 0x7FFF //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +269 0x0000 //RX_TDDRC_THRD_0 +270 0x0000 //RX_TDDRC_THRD_1 +271 0x7FFF //RX_TDDRC_THRD_2 +272 0x7FFF //RX_TDDRC_THRD_3 +273 0x7E70 //RX_TDDRC_SLANT_0 +274 0x7FFF //RX_TDDRC_SLANT_1 +275 0x1000 //RX_TDDRC_ALPHA_UP_0 +276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x199A //RX_TDDRC_HMNC_GAIN +279 0x0001 //RX_TDDRC_SMT_FLAG +280 0x0CCD //RX_TDDRC_SMT_W +281 0x0155 //RX_TDDRC_DRC_GAIN +195 0x001C //RX_FDEQ_SUBNUM +196 0x4848 //RX_FDEQ_GAIN_0 +197 0x4848 //RX_FDEQ_GAIN_1 +198 0x4848 //RX_FDEQ_GAIN_2 +199 0x4848 //RX_FDEQ_GAIN_3 +200 0x4848 //RX_FDEQ_GAIN_4 +201 0x4848 //RX_FDEQ_GAIN_5 +202 0x4848 //RX_FDEQ_GAIN_6 +203 0x4848 //RX_FDEQ_GAIN_7 +204 0x4848 //RX_FDEQ_GAIN_8 +205 0x3C3C //RX_FDEQ_GAIN_9 +206 0x3C3C //RX_FDEQ_GAIN_10 +207 0x3838 //RX_FDEQ_GAIN_11 +208 0x3838 //RX_FDEQ_GAIN_12 +209 0x3030 //RX_FDEQ_GAIN_13 +210 0x4848 //RX_FDEQ_GAIN_14 +211 0x4848 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0202 //RX_FDEQ_BIN_0 +221 0x0203 //RX_FDEQ_BIN_1 +222 0x0303 //RX_FDEQ_BIN_2 +223 0x0304 //RX_FDEQ_BIN_3 +224 0x0405 //RX_FDEQ_BIN_4 +225 0x0506 //RX_FDEQ_BIN_5 +226 0x0708 //RX_FDEQ_BIN_6 +227 0x090A //RX_FDEQ_BIN_7 +228 0x0B0C //RX_FDEQ_BIN_8 +229 0x0D0E //RX_FDEQ_BIN_9 +230 0x0E0F //RX_FDEQ_BIN_10 +231 0x0F10 //RX_FDEQ_BIN_11 +232 0x1011 //RX_FDEQ_BIN_12 +233 0x1112 //RX_FDEQ_BIN_13 +234 0x0000 //RX_FDEQ_BIN_14 +235 0x0000 //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x4000 //RX_FDEQ_RESRV_0 +245 0x0320 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0030 //RX_FDDRC_BAND_MARGIN_1 +248 0x0050 //RX_FDDRC_BAND_MARGIN_2 +249 0x0080 //RX_FDDRC_BAND_MARGIN_3 +250 0x0007 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x5000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x6400 //RX_FDDRC_THRD_3_2 +258 0x6400 //RX_FDDRC_THRD_3_3 +259 0x2000 //RX_FDDRC_SLANT_0_0 +260 0x2000 //RX_FDDRC_SLANT_0_1 +261 0x2000 //RX_FDDRC_SLANT_0_2 +262 0x2000 //RX_FDDRC_SLANT_0_3 +263 0x5333 //RX_FDDRC_SLANT_1_0 +264 0x5333 //RX_FDDRC_SLANT_1_1 +265 0x5333 //RX_FDDRC_SLANT_1_2 +266 0x5333 //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +286 0x0100 //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 +#VOL 6 +163 0x1000 //RX_TDDRC_ALPHA_UP_1 +164 0x1000 //RX_TDDRC_ALPHA_UP_2 +165 0x1000 //RX_TDDRC_ALPHA_UP_3 +166 0x1000 //RX_TDDRC_ALPHA_UP_4 +184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +190 0x7FFF //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +269 0x0000 //RX_TDDRC_THRD_0 +270 0x0000 //RX_TDDRC_THRD_1 +271 0x7FFF //RX_TDDRC_THRD_2 +272 0x7FFF //RX_TDDRC_THRD_3 +273 0x7E70 //RX_TDDRC_SLANT_0 +274 0x7FFF //RX_TDDRC_SLANT_1 +275 0x1000 //RX_TDDRC_ALPHA_UP_0 +276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x199A //RX_TDDRC_HMNC_GAIN +279 0x0001 //RX_TDDRC_SMT_FLAG +280 0x0CCD //RX_TDDRC_SMT_W +281 0x0155 //RX_TDDRC_DRC_GAIN +195 0x001C //RX_FDEQ_SUBNUM +196 0x4848 //RX_FDEQ_GAIN_0 +197 0x4848 //RX_FDEQ_GAIN_1 +198 0x4848 //RX_FDEQ_GAIN_2 +199 0x4848 //RX_FDEQ_GAIN_3 +200 0x4848 //RX_FDEQ_GAIN_4 +201 0x4848 //RX_FDEQ_GAIN_5 +202 0x4848 //RX_FDEQ_GAIN_6 +203 0x4848 //RX_FDEQ_GAIN_7 +204 0x4848 //RX_FDEQ_GAIN_8 +205 0x3C3C //RX_FDEQ_GAIN_9 +206 0x3C3C //RX_FDEQ_GAIN_10 +207 0x3838 //RX_FDEQ_GAIN_11 +208 0x3838 //RX_FDEQ_GAIN_12 +209 0x3030 //RX_FDEQ_GAIN_13 +210 0x4848 //RX_FDEQ_GAIN_14 +211 0x4848 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0202 //RX_FDEQ_BIN_0 +221 0x0203 //RX_FDEQ_BIN_1 +222 0x0303 //RX_FDEQ_BIN_2 +223 0x0304 //RX_FDEQ_BIN_3 +224 0x0405 //RX_FDEQ_BIN_4 +225 0x0506 //RX_FDEQ_BIN_5 +226 0x0708 //RX_FDEQ_BIN_6 +227 0x090A //RX_FDEQ_BIN_7 +228 0x0B0C //RX_FDEQ_BIN_8 +229 0x0D0E //RX_FDEQ_BIN_9 +230 0x0E0F //RX_FDEQ_BIN_10 +231 0x0F10 //RX_FDEQ_BIN_11 +232 0x1011 //RX_FDEQ_BIN_12 +233 0x1112 //RX_FDEQ_BIN_13 +234 0x0000 //RX_FDEQ_BIN_14 +235 0x0000 //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x4000 //RX_FDEQ_RESRV_0 +245 0x0320 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0030 //RX_FDDRC_BAND_MARGIN_1 +248 0x0050 //RX_FDDRC_BAND_MARGIN_2 +249 0x0080 //RX_FDDRC_BAND_MARGIN_3 +250 0x0007 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x5000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x6400 //RX_FDDRC_THRD_3_2 +258 0x6400 //RX_FDDRC_THRD_3_3 +259 0x2000 //RX_FDDRC_SLANT_0_0 +260 0x2000 //RX_FDDRC_SLANT_0_1 +261 0x2000 //RX_FDDRC_SLANT_0_2 +262 0x2000 //RX_FDDRC_SLANT_0_3 +263 0x5333 //RX_FDDRC_SLANT_1_0 +264 0x5333 //RX_FDDRC_SLANT_1_1 +265 0x5333 //RX_FDDRC_SLANT_1_2 +266 0x5333 //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +286 0x0100 //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 #CASE_NAME BLUETOOTH-BTWB-VOICE_GENERIC-SWB -#PARAM_TYPE TX+RX -#TOTAL_CUSTOM_STEP 7 +#PARAM_MODE Full +#PARAM_TYPE TX+2RX +#TOTAL_CUSTOM_STEP 7+7 #TX 0 0x0001 //TX_OPERATION_MODE_0 1 0x0001 //TX_OPERATION_MODE_1 @@ -26553,20 +40309,20 @@ 248 0xF400 //TX_THR_SN_EST_6 249 0xF600 //TX_THR_SN_EST_7 250 0x0000 //TX_DELTA_THR_SN_EST_0 -251 0x0000 //TX_DELTA_THR_SN_EST_1 +251 0x0200 //TX_DELTA_THR_SN_EST_1 252 0x0200 //TX_DELTA_THR_SN_EST_2 253 0x0200 //TX_DELTA_THR_SN_EST_3 254 0x0200 //TX_DELTA_THR_SN_EST_4 255 0x0200 //TX_DELTA_THR_SN_EST_5 -256 0x0200 //TX_DELTA_THR_SN_EST_6 +256 0x0000 //TX_DELTA_THR_SN_EST_6 257 0x0200 //TX_DELTA_THR_SN_EST_7 258 0x6000 //TX_LAMBDA_NN_EST_0 -259 0x6000 //TX_LAMBDA_NN_EST_1 +259 0x4000 //TX_LAMBDA_NN_EST_1 260 0x4000 //TX_LAMBDA_NN_EST_2 261 0x4000 //TX_LAMBDA_NN_EST_3 262 0x4000 //TX_LAMBDA_NN_EST_4 263 0x4000 //TX_LAMBDA_NN_EST_5 -264 0x4000 //TX_LAMBDA_NN_EST_6 +264 0x6000 //TX_LAMBDA_NN_EST_6 265 0x4000 //TX_LAMBDA_NN_EST_7 266 0x0400 //TX_N_SN_EST 267 0x001E //TX_INBEAM_T @@ -26584,16 +40340,16 @@ 279 0x1000 //TX_B_POST_FLT_0 280 0x1000 //TX_B_POST_FLT_1 281 0x000B //TX_NS_LVL_CTRL_0 -282 0x000F //TX_NS_LVL_CTRL_1 -283 0x0011 //TX_NS_LVL_CTRL_2 +282 0x0011 //TX_NS_LVL_CTRL_1 +283 0x000F //TX_NS_LVL_CTRL_2 284 0x000F //TX_NS_LVL_CTRL_3 285 0x000F //TX_NS_LVL_CTRL_4 286 0x000F //TX_NS_LVL_CTRL_5 287 0x000F //TX_NS_LVL_CTRL_6 288 0x0011 //TX_NS_LVL_CTRL_7 289 0x000C //TX_MIN_GAIN_S_0 -290 0x000C //TX_MIN_GAIN_S_1 -291 0x000F //TX_MIN_GAIN_S_2 +290 0x000F //TX_MIN_GAIN_S_1 +291 0x000C //TX_MIN_GAIN_S_2 292 0x000C //TX_MIN_GAIN_S_3 293 0x000C //TX_MIN_GAIN_S_4 294 0x000C //TX_MIN_GAIN_S_5 @@ -26617,12 +40373,12 @@ 312 0x7FFF //TX_A_POST_FILT_0 313 0x2000 //TX_A_POST_FILT_1 314 0x2000 //TX_A_POST_FILT_S_0 -315 0x4000 //TX_A_POST_FILT_S_1 +315 0x5000 //TX_A_POST_FILT_S_1 316 0x5000 //TX_A_POST_FILT_S_2 317 0x5000 //TX_A_POST_FILT_S_3 318 0x5000 //TX_A_POST_FILT_S_4 319 0x5000 //TX_A_POST_FILT_S_5 -320 0x5000 //TX_A_POST_FILT_S_6 +320 0x4000 //TX_A_POST_FILT_S_6 321 0x5000 //TX_A_POST_FILT_S_7 322 0x1000 //TX_B_POST_FILT_0 323 0x1000 //TX_B_POST_FILT_1 @@ -26682,10 +40438,10 @@ 377 0x7FFF //TX_NOISE_TH_5_4 378 0x044C //TX_NOISE_TH_6 379 0x0014 //TX_MINENOISE_TH -380 0x4000 //TX_MINENOISE_MIC0_TH_MTS -381 0xFFEE //TX_MINENOISE_MIC0_TH_EXP -382 0x6000 //TX_MINENOISE_MIC0_S_TH_MTS -383 0xFFF3 //TX_MINENOISE_MIC0_S_TH_EXP +380 0x4000 //TX_MORENS_TFMASK_TH +381 0xFFEE //TX_DRC_QUIET_FLOOR +382 0x6000 //TX_RATIODTL_CUT_TH +383 0xFFF3 //TX_DT_CUT_K1 384 0x0666 //TX_OUT_ENER_S_TH_CLEAN 385 0x0666 //TX_OUT_ENER_S_TH_LESSCLEAN 386 0x0333 //TX_OUT_ENER_S_TH_NOISY @@ -26693,15 +40449,15 @@ 388 0x0333 //TX_OUT_ENER_TH_SPEECH 389 0x2000 //TX_SN_NPB_GAIN 390 0x0000 //TX_NN_NPB_GAIN -391 0x0000 //TX_CSX_ALPHA_0 -392 0x0000 //TX_CSX_ALPHA_1 -393 0x0000 //TX_CSX_ALPHA_2 -394 0x0000 //TX_CSX_ALPHA_3 -395 0x0800 //TX_MU_ARSP_EST -396 0x00C8 //TX_P_OUTBEAM_MIN_TH +391 0x0000 //TX_POST_MASK_SUP_HSNE +392 0x0000 //TX_TAIL_DET_TH +393 0x0000 //TX_B_LESSCUT_RTO_WTA +394 0x0000 //TX_MEL_G_R +395 0x0800 //TX_SUPHIGH_TH +396 0x00C8 //TX_MASK_G_R 397 0x0002 //TX_EXTRA_NS_L -398 0x0800 //TX_EXTRA_NS_A -399 0x0005 //TX_VR_NOISE_FLOOR_TH +398 0x0800 //TX_C_POST_FLT_MASK +399 0x0005 //TX_A_POST_FLT_WNS 400 0x0148 //TX_MIN_G_LOW300HZ 401 0x0002 //TX_MAXLEVEL_CNG 402 0x00B4 //TX_STN_NOISE_TH @@ -26816,16 +40572,16 @@ 511 0x6666 //TX_MIC_TO_BFGAIN 512 0x0000 //TX_MICTOBFGAIN0 513 0x0000 //TX_FASTMUE_TH -514 0x0000 //TX_DERVB_LEN_0 -515 0x0000 //TX_DERVB_LEN_1 -516 0x0000 //TX_RHO_DERVB -517 0x0000 //TX_MIC_INDX_DERVB -518 0x0000 //TX_MU_DERVB -519 0x0000 //TX_DR_RESRV_0 -520 0x0000 //TX_DR_RESRV_1 -521 0x0000 //TX_DR_RESRV_2 -522 0x0000 //TX_DR_RESRV_3 -523 0x0000 //TX_DR_RESRV_4 +514 0x0000 //TX_DEREVERB_LF_MU +515 0x0000 //TX_DEREVERB_HF_MU +516 0x0000 //TX_DEREVERB_DELAY +517 0x0000 //TX_DEREVERB_COEF_LEN +518 0x0000 //TX_DEREVERB_DNR +519 0x0000 //TX_DEREVERB_ALPHA +520 0x0000 //TX_DEREVERB_BETA +521 0x0000 //TX_GSC_RTOL_TH +522 0x0000 //TX_GSC_RTOH_TH +523 0x0000 //TX_WIDE2_MEANHTH 524 0x0000 //TX_DR_RESRV_5 525 0x0000 //TX_DR_RESRV_6 526 0x0000 //TX_DR_RESRV_7 @@ -27199,8 +40955,73 @@ 894 0xC000 //TX_FASTNS_SSA_THHFL 895 0xCCCC //TX_FASTNS_SSA_THLFH 896 0xD999 //TX_FASTNS_SSA_THHFH +897 0x0000 //TX_SENDFUNC_REG_MICMUTE +898 0x0000 //TX_SENDFUNC_REG_MICMUTE1 +899 0x0000 //TX_MICMUTE_RATIO_THR +900 0x0000 //TX_MICMUTE_AMP_THR +901 0x0000 //TX_MICMUTE_HPF_IND +902 0x0000 //TX_MICMUTE_LOG_EYR_TH +903 0x0000 //TX_MICMUTE_CVG_TIME +904 0x0000 //TX_MICMUTE_RELEASE_TIME +905 0x0000 //TX_MIC_VOLUME_MIC0MUTE +906 0x0000 //TX_MICMUTE_EPD_OFFSET_0 +907 0x0000 //TX_MICMUTE_FRQ_AEC_L +908 0x0000 //TX_MICMUTE_EAD_THR +909 0x0000 //TX_MICMUTE_LAMBDA_CB_NLE +910 0x0000 //TX_MICMUTE_LAMBDA_RE_EST +911 0x0000 //TX_DTD_THR1_MICMUTE_0 +912 0x0000 //TX_DTD_THR1_MICMUTE_1 +913 0x0000 //TX_DTD_THR1_MICMUTE_2 +914 0x0000 //TX_DTD_THR1_MICMUTE_3 +915 0x0000 //TX_DTD_THR2_MICMUTE_0 +916 0x0000 //TX_MICMUTE_MIN_EQ_RE_EST_0 +917 0x0000 //TX_MICMUTE_MIN_EQ_RE_EST_1 +918 0x0000 //TX_MICMUTE_MIN_EQ_RE_EST_2 +919 0x0000 //TX_MICMUTE_MIN_EQ_RE_EST_3 +920 0x0000 //TX_MICMUTE_MIN_EQ_RE_EST_4 +921 0x0000 //TX_MICMUTE_C_POST_FLT +922 0x0000 //TX_MICMUTE_DT_CUT_K +923 0x0000 //TX_MICMUTE_DT_CUT_THR +924 0x0000 //TX_MICMUTE_DT_CUT_K2 +925 0x0000 //TX_MICMUTE_DT_CUT_THR2 +926 0x0000 //TX_MICMUTE_DT2_HOLD_N +927 0x0000 //TX_MICMUTE_RATIODTH_THCUT +928 0x0000 //TX_MICMUTE_B_POST_FLT_ECHOL +929 0x0000 //TX_MICMUTE_B_POST_FLT_ECHOH +930 0x0000 //TX_MICMUTE_C_POST_FLT_MASK +931 0x0000 //TX_MICMUTE_RATIODTL_CUT_TH +932 0x0000 //TX_MICMUTE_DT_CUT_K1 +933 0x0000 //TX_MICMUTE_N2_SN_EST +934 0x0000 //TX_MICMUTE_THR_SN_EST_0 +935 0x0000 //TX_MICMUTE_MIN_G_CTRL_0 +936 0x0000 //TX_MICMUTE_A_POST_FILT_S_0 +937 0x0000 //TX_MICMUTE_B_POST_FILT_0 +938 0x0000 //TX_MIC1RUB_AMP_THR +939 0x0000 //TX_MIC1MUTE_RATIO_THR +940 0x0000 //TX_MIC1MUTE_AMP_THR +941 0x0000 //TX_MIC1MUTE_CVG_TIME +942 0x0000 //TX_MIC1MUTE_RELEASE_TIME +943 0x0000 //TX_AMS_RESRV_01 +944 0x0000 //TX_AMS_RESRV_02 +945 0x0000 //TX_AMS_RESRV_03 +946 0x0000 //TX_AMS_RESRV_04 +947 0x0000 //TX_AMS_RESRV_05 +948 0x0000 //TX_AMS_RESRV_06 +949 0x0000 //TX_AMS_RESRV_07 +950 0x0000 //TX_AMS_RESRV_08 +951 0x0000 //TX_AMS_RESRV_09 +952 0x0000 //TX_AMS_RESRV_10 +953 0x0000 //TX_AMS_RESRV_11 +954 0x0000 //TX_AMS_RESRV_12 +955 0x0000 //TX_AMS_RESRV_13 +956 0x0000 //TX_AMS_RESRV_14 +957 0x0000 //TX_AMS_RESRV_15 +958 0x0000 //TX_AMS_RESRV_16 +959 0x0000 //TX_AMS_RESRV_17 +960 0x0000 //TX_AMS_RESRV_18 +961 0x0000 //TX_AMS_RESRV_19 #RX -0 0x0064 //RX_RECVFUNC_MODE_0 +0 0x2064 //RX_RECVFUNC_MODE_0 1 0x0000 //RX_RECVFUNC_MODE_1 2 0x0003 //RX_SAMPLINGFREQ_SIG 3 0x0003 //RX_SAMPLINGFREQ_PROC @@ -28050,10 +41871,862 @@ 110 0x0000 //RX_FDDRC_RESRV_0 129 0x0100 //RX_SPK_VOL 130 0x0000 //RX_VOL_RESRV_0 +#RX 2 +157 0x2064 //RX_RECVFUNC_MODE_0 +158 0x0000 //RX_RECVFUNC_MODE_1 +159 0x0003 //RX_SAMPLINGFREQ_SIG +160 0x0003 //RX_SAMPLINGFREQ_PROC +161 0x000A //RX_FRAME_SZ +162 0x0000 //RX_DELAY_OPT +163 0x3000 //RX_TDDRC_ALPHA_UP_1 +164 0x3000 //RX_TDDRC_ALPHA_UP_2 +165 0x3000 //RX_TDDRC_ALPHA_UP_3 +166 0x3000 //RX_TDDRC_ALPHA_UP_4 +167 0x0800 //RX_PGA +168 0x7FFF //RX_A_HP +169 0x0000 //RX_B_PE +170 0x1800 //RX_THR_PITCH_DET_0 +171 0x1000 //RX_THR_PITCH_DET_1 +172 0x0800 //RX_THR_PITCH_DET_2 +173 0x0008 //RX_PITCH_BFR_LEN +174 0x0003 //RX_SBD_PITCH_DET +175 0x0100 //RX_PP_RESRV_0 +176 0x0020 //RX_PP_RESRV_1 +177 0x0400 //RX_N_SN_EST +178 0x000C //RX_N2_SN_EST +179 0x0003 //RX_NS_LVL_CTRL +180 0x9000 //RX_THR_SN_EST +181 0x7CCD //RX_LAMBDA_PFILT +182 0x000A //RX_FENS_RESRV_0 +183 0x0190 //RX_FENS_RESRV_1 +184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +187 0x0002 //RX_EXTRA_NS_L +188 0x0800 //RX_EXTRA_NS_A +189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +190 0x7FFF //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +192 0x199A //RX_A_POST_FLT +193 0x0000 //RX_LMT_THRD +194 0x4000 //RX_LMT_ALPHA +195 0x0020 //RX_FDEQ_SUBNUM +196 0x4848 //RX_FDEQ_GAIN_0 +197 0x4848 //RX_FDEQ_GAIN_1 +198 0x4848 //RX_FDEQ_GAIN_2 +199 0x4848 //RX_FDEQ_GAIN_3 +200 0x4848 //RX_FDEQ_GAIN_4 +201 0x4848 //RX_FDEQ_GAIN_5 +202 0x4848 //RX_FDEQ_GAIN_6 +203 0x4848 //RX_FDEQ_GAIN_7 +204 0x4848 //RX_FDEQ_GAIN_8 +205 0x4848 //RX_FDEQ_GAIN_9 +206 0x4848 //RX_FDEQ_GAIN_10 +207 0x4848 //RX_FDEQ_GAIN_11 +208 0x4848 //RX_FDEQ_GAIN_12 +209 0x4848 //RX_FDEQ_GAIN_13 +210 0x4848 //RX_FDEQ_GAIN_14 +211 0x4848 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0202 //RX_FDEQ_BIN_0 +221 0x0203 //RX_FDEQ_BIN_1 +222 0x0303 //RX_FDEQ_BIN_2 +223 0x0304 //RX_FDEQ_BIN_3 +224 0x0405 //RX_FDEQ_BIN_4 +225 0x0506 //RX_FDEQ_BIN_5 +226 0x0708 //RX_FDEQ_BIN_6 +227 0x090A //RX_FDEQ_BIN_7 +228 0x0B0C //RX_FDEQ_BIN_8 +229 0x0D0E //RX_FDEQ_BIN_9 +230 0x1013 //RX_FDEQ_BIN_10 +231 0x1719 //RX_FDEQ_BIN_11 +232 0x1B1E //RX_FDEQ_BIN_12 +233 0x1E1E //RX_FDEQ_BIN_13 +234 0x1E28 //RX_FDEQ_BIN_14 +235 0x282C //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x4000 //RX_FDEQ_RESRV_0 +245 0x0320 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0030 //RX_FDDRC_BAND_MARGIN_1 +248 0x0050 //RX_FDDRC_BAND_MARGIN_2 +249 0x0080 //RX_FDDRC_BAND_MARGIN_3 +250 0x0007 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x5000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x6400 //RX_FDDRC_THRD_3_2 +258 0x6400 //RX_FDDRC_THRD_3_3 +259 0x2000 //RX_FDDRC_SLANT_0_0 +260 0x2000 //RX_FDDRC_SLANT_0_1 +261 0x2000 //RX_FDDRC_SLANT_0_2 +262 0x2000 //RX_FDDRC_SLANT_0_3 +263 0x5333 //RX_FDDRC_SLANT_1_0 +264 0x5333 //RX_FDDRC_SLANT_1_1 +265 0x5333 //RX_FDDRC_SLANT_1_2 +266 0x5333 //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +268 0x0000 //RX_FILTINDX +269 0x0000 //RX_TDDRC_THRD_0 +270 0x0000 //RX_TDDRC_THRD_1 +271 0x7FFF //RX_TDDRC_THRD_2 +272 0x7FFF //RX_TDDRC_THRD_3 +273 0x7FFF //RX_TDDRC_SLANT_0 +274 0x7FFF //RX_TDDRC_SLANT_1 +275 0x3000 //RX_TDDRC_ALPHA_UP_0 +276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x199A //RX_TDDRC_HMNC_GAIN +279 0x0001 //RX_TDDRC_SMT_FLAG +280 0x0CCD //RX_TDDRC_SMT_W +281 0x0155 //RX_TDDRC_DRC_GAIN +282 0x7C00 //RX_LAMBDA_PKA_FP +283 0x2000 //RX_TPKA_FP +284 0x2000 //RX_MIN_G_FP +285 0x0080 //RX_MAX_G_FP +286 0x0100 //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 +288 0x0000 //RX_MAXLEVEL_CNG +289 0x3000 //RX_BWE_UV_TH +290 0x3000 //RX_BWE_UV_TH2 +291 0x1800 //RX_BWE_UV_TH3 +292 0x1000 //RX_BWE_V_TH +293 0x04CD //RX_BWE_GAIN1_V_TH1 +294 0x0F33 //RX_BWE_GAIN1_V_TH2 +295 0x7333 //RX_BWE_UV_EQ +296 0x199A //RX_BWE_V_EQ +297 0x7333 //RX_BWE_TONE_TH +298 0x0004 //RX_BWE_UV_HOLD_T +299 0x6CCD //RX_BWE_GAIN2_ALPHA +300 0x799A //RX_BWE_GAIN3_ALPHA +301 0x001E //RX_BWE_CUTOFF +302 0x3000 //RX_BWE_GAINFILL +303 0x3200 //RX_BWE_MAXTH_TONE +304 0x2000 //RX_BWE_EQ_0 +305 0x2000 //RX_BWE_EQ_1 +306 0x2000 //RX_BWE_EQ_2 +307 0x2000 //RX_BWE_EQ_3 +308 0x2000 //RX_BWE_EQ_4 +309 0x2000 //RX_BWE_EQ_5 +310 0x2000 //RX_BWE_EQ_6 +311 0x0000 //RX_BWE_RESRV_0 +312 0x0000 //RX_BWE_RESRV_1 +313 0x0000 //RX_BWE_RESRV_2 +#VOL 0 +163 0x3000 //RX_TDDRC_ALPHA_UP_1 +164 0x3000 //RX_TDDRC_ALPHA_UP_2 +165 0x3000 //RX_TDDRC_ALPHA_UP_3 +166 0x3000 //RX_TDDRC_ALPHA_UP_4 +184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +190 0x7FFF //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +269 0x0000 //RX_TDDRC_THRD_0 +270 0x0000 //RX_TDDRC_THRD_1 +271 0x7FFF //RX_TDDRC_THRD_2 +272 0x7FFF //RX_TDDRC_THRD_3 +273 0x7FFF //RX_TDDRC_SLANT_0 +274 0x7FFF //RX_TDDRC_SLANT_1 +275 0x3000 //RX_TDDRC_ALPHA_UP_0 +276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x199A //RX_TDDRC_HMNC_GAIN +279 0x0001 //RX_TDDRC_SMT_FLAG +280 0x0CCD //RX_TDDRC_SMT_W +281 0x0155 //RX_TDDRC_DRC_GAIN +195 0x0020 //RX_FDEQ_SUBNUM +196 0x4848 //RX_FDEQ_GAIN_0 +197 0x4848 //RX_FDEQ_GAIN_1 +198 0x4848 //RX_FDEQ_GAIN_2 +199 0x4848 //RX_FDEQ_GAIN_3 +200 0x4848 //RX_FDEQ_GAIN_4 +201 0x4848 //RX_FDEQ_GAIN_5 +202 0x4848 //RX_FDEQ_GAIN_6 +203 0x4848 //RX_FDEQ_GAIN_7 +204 0x4848 //RX_FDEQ_GAIN_8 +205 0x4848 //RX_FDEQ_GAIN_9 +206 0x4848 //RX_FDEQ_GAIN_10 +207 0x4848 //RX_FDEQ_GAIN_11 +208 0x4848 //RX_FDEQ_GAIN_12 +209 0x4848 //RX_FDEQ_GAIN_13 +210 0x4848 //RX_FDEQ_GAIN_14 +211 0x4848 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0202 //RX_FDEQ_BIN_0 +221 0x0203 //RX_FDEQ_BIN_1 +222 0x0303 //RX_FDEQ_BIN_2 +223 0x0304 //RX_FDEQ_BIN_3 +224 0x0405 //RX_FDEQ_BIN_4 +225 0x0506 //RX_FDEQ_BIN_5 +226 0x0708 //RX_FDEQ_BIN_6 +227 0x090A //RX_FDEQ_BIN_7 +228 0x0B0C //RX_FDEQ_BIN_8 +229 0x0D0E //RX_FDEQ_BIN_9 +230 0x1013 //RX_FDEQ_BIN_10 +231 0x1719 //RX_FDEQ_BIN_11 +232 0x1B1E //RX_FDEQ_BIN_12 +233 0x1E1E //RX_FDEQ_BIN_13 +234 0x1E28 //RX_FDEQ_BIN_14 +235 0x282C //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x4000 //RX_FDEQ_RESRV_0 +245 0x0320 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0030 //RX_FDDRC_BAND_MARGIN_1 +248 0x0050 //RX_FDDRC_BAND_MARGIN_2 +249 0x0080 //RX_FDDRC_BAND_MARGIN_3 +250 0x0007 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x5000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x6400 //RX_FDDRC_THRD_3_2 +258 0x6400 //RX_FDDRC_THRD_3_3 +259 0x2000 //RX_FDDRC_SLANT_0_0 +260 0x2000 //RX_FDDRC_SLANT_0_1 +261 0x2000 //RX_FDDRC_SLANT_0_2 +262 0x2000 //RX_FDDRC_SLANT_0_3 +263 0x5333 //RX_FDDRC_SLANT_1_0 +264 0x5333 //RX_FDDRC_SLANT_1_1 +265 0x5333 //RX_FDDRC_SLANT_1_2 +266 0x5333 //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +286 0x0100 //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 +#VOL 1 +163 0x3000 //RX_TDDRC_ALPHA_UP_1 +164 0x3000 //RX_TDDRC_ALPHA_UP_2 +165 0x3000 //RX_TDDRC_ALPHA_UP_3 +166 0x3000 //RX_TDDRC_ALPHA_UP_4 +184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +190 0x7FFF //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +269 0x0000 //RX_TDDRC_THRD_0 +270 0x0000 //RX_TDDRC_THRD_1 +271 0x7FFF //RX_TDDRC_THRD_2 +272 0x7FFF //RX_TDDRC_THRD_3 +273 0x7FFF //RX_TDDRC_SLANT_0 +274 0x7FFF //RX_TDDRC_SLANT_1 +275 0x3000 //RX_TDDRC_ALPHA_UP_0 +276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x199A //RX_TDDRC_HMNC_GAIN +279 0x0001 //RX_TDDRC_SMT_FLAG +280 0x0CCD //RX_TDDRC_SMT_W +281 0x0155 //RX_TDDRC_DRC_GAIN +195 0x0020 //RX_FDEQ_SUBNUM +196 0x4848 //RX_FDEQ_GAIN_0 +197 0x4848 //RX_FDEQ_GAIN_1 +198 0x4848 //RX_FDEQ_GAIN_2 +199 0x4848 //RX_FDEQ_GAIN_3 +200 0x4848 //RX_FDEQ_GAIN_4 +201 0x4848 //RX_FDEQ_GAIN_5 +202 0x4848 //RX_FDEQ_GAIN_6 +203 0x4848 //RX_FDEQ_GAIN_7 +204 0x4848 //RX_FDEQ_GAIN_8 +205 0x4848 //RX_FDEQ_GAIN_9 +206 0x4848 //RX_FDEQ_GAIN_10 +207 0x4848 //RX_FDEQ_GAIN_11 +208 0x4848 //RX_FDEQ_GAIN_12 +209 0x4848 //RX_FDEQ_GAIN_13 +210 0x4848 //RX_FDEQ_GAIN_14 +211 0x4848 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0202 //RX_FDEQ_BIN_0 +221 0x0203 //RX_FDEQ_BIN_1 +222 0x0303 //RX_FDEQ_BIN_2 +223 0x0304 //RX_FDEQ_BIN_3 +224 0x0405 //RX_FDEQ_BIN_4 +225 0x0506 //RX_FDEQ_BIN_5 +226 0x0708 //RX_FDEQ_BIN_6 +227 0x090A //RX_FDEQ_BIN_7 +228 0x0B0C //RX_FDEQ_BIN_8 +229 0x0D0E //RX_FDEQ_BIN_9 +230 0x1013 //RX_FDEQ_BIN_10 +231 0x1719 //RX_FDEQ_BIN_11 +232 0x1B1E //RX_FDEQ_BIN_12 +233 0x1E1E //RX_FDEQ_BIN_13 +234 0x1E28 //RX_FDEQ_BIN_14 +235 0x282C //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x4000 //RX_FDEQ_RESRV_0 +245 0x0320 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0030 //RX_FDDRC_BAND_MARGIN_1 +248 0x0050 //RX_FDDRC_BAND_MARGIN_2 +249 0x0080 //RX_FDDRC_BAND_MARGIN_3 +250 0x0007 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x5000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x6400 //RX_FDDRC_THRD_3_2 +258 0x6400 //RX_FDDRC_THRD_3_3 +259 0x2000 //RX_FDDRC_SLANT_0_0 +260 0x2000 //RX_FDDRC_SLANT_0_1 +261 0x2000 //RX_FDDRC_SLANT_0_2 +262 0x2000 //RX_FDDRC_SLANT_0_3 +263 0x5333 //RX_FDDRC_SLANT_1_0 +264 0x5333 //RX_FDDRC_SLANT_1_1 +265 0x5333 //RX_FDDRC_SLANT_1_2 +266 0x5333 //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +286 0x0100 //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 +#VOL 2 +163 0x3000 //RX_TDDRC_ALPHA_UP_1 +164 0x3000 //RX_TDDRC_ALPHA_UP_2 +165 0x3000 //RX_TDDRC_ALPHA_UP_3 +166 0x3000 //RX_TDDRC_ALPHA_UP_4 +184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +190 0x7FFF //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +269 0x0000 //RX_TDDRC_THRD_0 +270 0x0000 //RX_TDDRC_THRD_1 +271 0x7FFF //RX_TDDRC_THRD_2 +272 0x7FFF //RX_TDDRC_THRD_3 +273 0x7FFF //RX_TDDRC_SLANT_0 +274 0x7FFF //RX_TDDRC_SLANT_1 +275 0x3000 //RX_TDDRC_ALPHA_UP_0 +276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x199A //RX_TDDRC_HMNC_GAIN +279 0x0001 //RX_TDDRC_SMT_FLAG +280 0x0CCD //RX_TDDRC_SMT_W +281 0x0155 //RX_TDDRC_DRC_GAIN +195 0x0020 //RX_FDEQ_SUBNUM +196 0x4848 //RX_FDEQ_GAIN_0 +197 0x4848 //RX_FDEQ_GAIN_1 +198 0x4848 //RX_FDEQ_GAIN_2 +199 0x4848 //RX_FDEQ_GAIN_3 +200 0x4848 //RX_FDEQ_GAIN_4 +201 0x4848 //RX_FDEQ_GAIN_5 +202 0x4848 //RX_FDEQ_GAIN_6 +203 0x4848 //RX_FDEQ_GAIN_7 +204 0x4848 //RX_FDEQ_GAIN_8 +205 0x4848 //RX_FDEQ_GAIN_9 +206 0x4848 //RX_FDEQ_GAIN_10 +207 0x4848 //RX_FDEQ_GAIN_11 +208 0x4848 //RX_FDEQ_GAIN_12 +209 0x4848 //RX_FDEQ_GAIN_13 +210 0x4848 //RX_FDEQ_GAIN_14 +211 0x4848 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0202 //RX_FDEQ_BIN_0 +221 0x0203 //RX_FDEQ_BIN_1 +222 0x0303 //RX_FDEQ_BIN_2 +223 0x0304 //RX_FDEQ_BIN_3 +224 0x0405 //RX_FDEQ_BIN_4 +225 0x0506 //RX_FDEQ_BIN_5 +226 0x0708 //RX_FDEQ_BIN_6 +227 0x090A //RX_FDEQ_BIN_7 +228 0x0B0C //RX_FDEQ_BIN_8 +229 0x0D0E //RX_FDEQ_BIN_9 +230 0x1013 //RX_FDEQ_BIN_10 +231 0x1719 //RX_FDEQ_BIN_11 +232 0x1B1E //RX_FDEQ_BIN_12 +233 0x1E1E //RX_FDEQ_BIN_13 +234 0x1E28 //RX_FDEQ_BIN_14 +235 0x282C //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x4000 //RX_FDEQ_RESRV_0 +245 0x0320 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0030 //RX_FDDRC_BAND_MARGIN_1 +248 0x0050 //RX_FDDRC_BAND_MARGIN_2 +249 0x0080 //RX_FDDRC_BAND_MARGIN_3 +250 0x0007 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x5000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x6400 //RX_FDDRC_THRD_3_2 +258 0x6400 //RX_FDDRC_THRD_3_3 +259 0x2000 //RX_FDDRC_SLANT_0_0 +260 0x2000 //RX_FDDRC_SLANT_0_1 +261 0x2000 //RX_FDDRC_SLANT_0_2 +262 0x2000 //RX_FDDRC_SLANT_0_3 +263 0x5333 //RX_FDDRC_SLANT_1_0 +264 0x5333 //RX_FDDRC_SLANT_1_1 +265 0x5333 //RX_FDDRC_SLANT_1_2 +266 0x5333 //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +286 0x0100 //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 +#VOL 3 +163 0x3000 //RX_TDDRC_ALPHA_UP_1 +164 0x3000 //RX_TDDRC_ALPHA_UP_2 +165 0x3000 //RX_TDDRC_ALPHA_UP_3 +166 0x3000 //RX_TDDRC_ALPHA_UP_4 +184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +190 0x7FFF //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +269 0x0000 //RX_TDDRC_THRD_0 +270 0x0000 //RX_TDDRC_THRD_1 +271 0x7FFF //RX_TDDRC_THRD_2 +272 0x7FFF //RX_TDDRC_THRD_3 +273 0x7FFF //RX_TDDRC_SLANT_0 +274 0x7FFF //RX_TDDRC_SLANT_1 +275 0x3000 //RX_TDDRC_ALPHA_UP_0 +276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x199A //RX_TDDRC_HMNC_GAIN +279 0x0001 //RX_TDDRC_SMT_FLAG +280 0x0CCD //RX_TDDRC_SMT_W +281 0x0155 //RX_TDDRC_DRC_GAIN +195 0x0020 //RX_FDEQ_SUBNUM +196 0x4848 //RX_FDEQ_GAIN_0 +197 0x4848 //RX_FDEQ_GAIN_1 +198 0x4848 //RX_FDEQ_GAIN_2 +199 0x4848 //RX_FDEQ_GAIN_3 +200 0x4848 //RX_FDEQ_GAIN_4 +201 0x4848 //RX_FDEQ_GAIN_5 +202 0x4848 //RX_FDEQ_GAIN_6 +203 0x4848 //RX_FDEQ_GAIN_7 +204 0x4848 //RX_FDEQ_GAIN_8 +205 0x4848 //RX_FDEQ_GAIN_9 +206 0x4848 //RX_FDEQ_GAIN_10 +207 0x4848 //RX_FDEQ_GAIN_11 +208 0x4848 //RX_FDEQ_GAIN_12 +209 0x4848 //RX_FDEQ_GAIN_13 +210 0x4848 //RX_FDEQ_GAIN_14 +211 0x4848 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0202 //RX_FDEQ_BIN_0 +221 0x0203 //RX_FDEQ_BIN_1 +222 0x0303 //RX_FDEQ_BIN_2 +223 0x0304 //RX_FDEQ_BIN_3 +224 0x0405 //RX_FDEQ_BIN_4 +225 0x0506 //RX_FDEQ_BIN_5 +226 0x0708 //RX_FDEQ_BIN_6 +227 0x090A //RX_FDEQ_BIN_7 +228 0x0B0C //RX_FDEQ_BIN_8 +229 0x0D0E //RX_FDEQ_BIN_9 +230 0x1013 //RX_FDEQ_BIN_10 +231 0x1719 //RX_FDEQ_BIN_11 +232 0x1B1E //RX_FDEQ_BIN_12 +233 0x1E1E //RX_FDEQ_BIN_13 +234 0x1E28 //RX_FDEQ_BIN_14 +235 0x282C //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x4000 //RX_FDEQ_RESRV_0 +245 0x0320 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0030 //RX_FDDRC_BAND_MARGIN_1 +248 0x0050 //RX_FDDRC_BAND_MARGIN_2 +249 0x0080 //RX_FDDRC_BAND_MARGIN_3 +250 0x0007 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x5000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x6400 //RX_FDDRC_THRD_3_2 +258 0x6400 //RX_FDDRC_THRD_3_3 +259 0x2000 //RX_FDDRC_SLANT_0_0 +260 0x2000 //RX_FDDRC_SLANT_0_1 +261 0x2000 //RX_FDDRC_SLANT_0_2 +262 0x2000 //RX_FDDRC_SLANT_0_3 +263 0x5333 //RX_FDDRC_SLANT_1_0 +264 0x5333 //RX_FDDRC_SLANT_1_1 +265 0x5333 //RX_FDDRC_SLANT_1_2 +266 0x5333 //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +286 0x0100 //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 +#VOL 4 +163 0x3000 //RX_TDDRC_ALPHA_UP_1 +164 0x3000 //RX_TDDRC_ALPHA_UP_2 +165 0x3000 //RX_TDDRC_ALPHA_UP_3 +166 0x3000 //RX_TDDRC_ALPHA_UP_4 +184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +190 0x7FFF //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +269 0x0000 //RX_TDDRC_THRD_0 +270 0x0000 //RX_TDDRC_THRD_1 +271 0x7FFF //RX_TDDRC_THRD_2 +272 0x7FFF //RX_TDDRC_THRD_3 +273 0x7FFF //RX_TDDRC_SLANT_0 +274 0x7FFF //RX_TDDRC_SLANT_1 +275 0x3000 //RX_TDDRC_ALPHA_UP_0 +276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x199A //RX_TDDRC_HMNC_GAIN +279 0x0001 //RX_TDDRC_SMT_FLAG +280 0x0CCD //RX_TDDRC_SMT_W +281 0x0155 //RX_TDDRC_DRC_GAIN +195 0x0020 //RX_FDEQ_SUBNUM +196 0x4848 //RX_FDEQ_GAIN_0 +197 0x4848 //RX_FDEQ_GAIN_1 +198 0x4848 //RX_FDEQ_GAIN_2 +199 0x4848 //RX_FDEQ_GAIN_3 +200 0x4848 //RX_FDEQ_GAIN_4 +201 0x4848 //RX_FDEQ_GAIN_5 +202 0x4848 //RX_FDEQ_GAIN_6 +203 0x4848 //RX_FDEQ_GAIN_7 +204 0x4848 //RX_FDEQ_GAIN_8 +205 0x4848 //RX_FDEQ_GAIN_9 +206 0x4848 //RX_FDEQ_GAIN_10 +207 0x4848 //RX_FDEQ_GAIN_11 +208 0x4848 //RX_FDEQ_GAIN_12 +209 0x4848 //RX_FDEQ_GAIN_13 +210 0x4848 //RX_FDEQ_GAIN_14 +211 0x4848 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0202 //RX_FDEQ_BIN_0 +221 0x0203 //RX_FDEQ_BIN_1 +222 0x0303 //RX_FDEQ_BIN_2 +223 0x0304 //RX_FDEQ_BIN_3 +224 0x0405 //RX_FDEQ_BIN_4 +225 0x0506 //RX_FDEQ_BIN_5 +226 0x0708 //RX_FDEQ_BIN_6 +227 0x090A //RX_FDEQ_BIN_7 +228 0x0B0C //RX_FDEQ_BIN_8 +229 0x0D0E //RX_FDEQ_BIN_9 +230 0x1013 //RX_FDEQ_BIN_10 +231 0x1719 //RX_FDEQ_BIN_11 +232 0x1B1E //RX_FDEQ_BIN_12 +233 0x1E1E //RX_FDEQ_BIN_13 +234 0x1E28 //RX_FDEQ_BIN_14 +235 0x282C //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x4000 //RX_FDEQ_RESRV_0 +245 0x0320 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0030 //RX_FDDRC_BAND_MARGIN_1 +248 0x0050 //RX_FDDRC_BAND_MARGIN_2 +249 0x0080 //RX_FDDRC_BAND_MARGIN_3 +250 0x0007 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x5000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x6400 //RX_FDDRC_THRD_3_2 +258 0x6400 //RX_FDDRC_THRD_3_3 +259 0x2000 //RX_FDDRC_SLANT_0_0 +260 0x2000 //RX_FDDRC_SLANT_0_1 +261 0x2000 //RX_FDDRC_SLANT_0_2 +262 0x2000 //RX_FDDRC_SLANT_0_3 +263 0x5333 //RX_FDDRC_SLANT_1_0 +264 0x5333 //RX_FDDRC_SLANT_1_1 +265 0x5333 //RX_FDDRC_SLANT_1_2 +266 0x5333 //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +286 0x0100 //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 +#VOL 5 +163 0x3000 //RX_TDDRC_ALPHA_UP_1 +164 0x3000 //RX_TDDRC_ALPHA_UP_2 +165 0x3000 //RX_TDDRC_ALPHA_UP_3 +166 0x3000 //RX_TDDRC_ALPHA_UP_4 +184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +190 0x7FFF //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +269 0x0000 //RX_TDDRC_THRD_0 +270 0x0000 //RX_TDDRC_THRD_1 +271 0x7FFF //RX_TDDRC_THRD_2 +272 0x7FFF //RX_TDDRC_THRD_3 +273 0x7FFF //RX_TDDRC_SLANT_0 +274 0x7FFF //RX_TDDRC_SLANT_1 +275 0x3000 //RX_TDDRC_ALPHA_UP_0 +276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x199A //RX_TDDRC_HMNC_GAIN +279 0x0001 //RX_TDDRC_SMT_FLAG +280 0x0CCD //RX_TDDRC_SMT_W +281 0x0155 //RX_TDDRC_DRC_GAIN +195 0x0020 //RX_FDEQ_SUBNUM +196 0x4848 //RX_FDEQ_GAIN_0 +197 0x4848 //RX_FDEQ_GAIN_1 +198 0x4848 //RX_FDEQ_GAIN_2 +199 0x4848 //RX_FDEQ_GAIN_3 +200 0x4848 //RX_FDEQ_GAIN_4 +201 0x4848 //RX_FDEQ_GAIN_5 +202 0x4848 //RX_FDEQ_GAIN_6 +203 0x4848 //RX_FDEQ_GAIN_7 +204 0x4848 //RX_FDEQ_GAIN_8 +205 0x4848 //RX_FDEQ_GAIN_9 +206 0x4848 //RX_FDEQ_GAIN_10 +207 0x4848 //RX_FDEQ_GAIN_11 +208 0x4848 //RX_FDEQ_GAIN_12 +209 0x4848 //RX_FDEQ_GAIN_13 +210 0x4848 //RX_FDEQ_GAIN_14 +211 0x4848 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0202 //RX_FDEQ_BIN_0 +221 0x0203 //RX_FDEQ_BIN_1 +222 0x0303 //RX_FDEQ_BIN_2 +223 0x0304 //RX_FDEQ_BIN_3 +224 0x0405 //RX_FDEQ_BIN_4 +225 0x0506 //RX_FDEQ_BIN_5 +226 0x0708 //RX_FDEQ_BIN_6 +227 0x090A //RX_FDEQ_BIN_7 +228 0x0B0C //RX_FDEQ_BIN_8 +229 0x0D0E //RX_FDEQ_BIN_9 +230 0x1013 //RX_FDEQ_BIN_10 +231 0x1719 //RX_FDEQ_BIN_11 +232 0x1B1E //RX_FDEQ_BIN_12 +233 0x1E1E //RX_FDEQ_BIN_13 +234 0x1E28 //RX_FDEQ_BIN_14 +235 0x282C //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x4000 //RX_FDEQ_RESRV_0 +245 0x0320 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0030 //RX_FDDRC_BAND_MARGIN_1 +248 0x0050 //RX_FDDRC_BAND_MARGIN_2 +249 0x0080 //RX_FDDRC_BAND_MARGIN_3 +250 0x0007 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x5000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x6400 //RX_FDDRC_THRD_3_2 +258 0x6400 //RX_FDDRC_THRD_3_3 +259 0x2000 //RX_FDDRC_SLANT_0_0 +260 0x2000 //RX_FDDRC_SLANT_0_1 +261 0x2000 //RX_FDDRC_SLANT_0_2 +262 0x2000 //RX_FDDRC_SLANT_0_3 +263 0x5333 //RX_FDDRC_SLANT_1_0 +264 0x5333 //RX_FDDRC_SLANT_1_1 +265 0x5333 //RX_FDDRC_SLANT_1_2 +266 0x5333 //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +286 0x0100 //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 +#VOL 6 +163 0x3000 //RX_TDDRC_ALPHA_UP_1 +164 0x3000 //RX_TDDRC_ALPHA_UP_2 +165 0x3000 //RX_TDDRC_ALPHA_UP_3 +166 0x3000 //RX_TDDRC_ALPHA_UP_4 +184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +190 0x7FFF //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +269 0x0000 //RX_TDDRC_THRD_0 +270 0x0000 //RX_TDDRC_THRD_1 +271 0x7FFF //RX_TDDRC_THRD_2 +272 0x7FFF //RX_TDDRC_THRD_3 +273 0x7FFF //RX_TDDRC_SLANT_0 +274 0x7FFF //RX_TDDRC_SLANT_1 +275 0x3000 //RX_TDDRC_ALPHA_UP_0 +276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x199A //RX_TDDRC_HMNC_GAIN +279 0x0001 //RX_TDDRC_SMT_FLAG +280 0x0CCD //RX_TDDRC_SMT_W +281 0x0155 //RX_TDDRC_DRC_GAIN +195 0x0020 //RX_FDEQ_SUBNUM +196 0x4848 //RX_FDEQ_GAIN_0 +197 0x4848 //RX_FDEQ_GAIN_1 +198 0x4848 //RX_FDEQ_GAIN_2 +199 0x4848 //RX_FDEQ_GAIN_3 +200 0x4848 //RX_FDEQ_GAIN_4 +201 0x4848 //RX_FDEQ_GAIN_5 +202 0x4848 //RX_FDEQ_GAIN_6 +203 0x4848 //RX_FDEQ_GAIN_7 +204 0x4848 //RX_FDEQ_GAIN_8 +205 0x4848 //RX_FDEQ_GAIN_9 +206 0x4848 //RX_FDEQ_GAIN_10 +207 0x4848 //RX_FDEQ_GAIN_11 +208 0x4848 //RX_FDEQ_GAIN_12 +209 0x4848 //RX_FDEQ_GAIN_13 +210 0x4848 //RX_FDEQ_GAIN_14 +211 0x4848 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0202 //RX_FDEQ_BIN_0 +221 0x0203 //RX_FDEQ_BIN_1 +222 0x0303 //RX_FDEQ_BIN_2 +223 0x0304 //RX_FDEQ_BIN_3 +224 0x0405 //RX_FDEQ_BIN_4 +225 0x0506 //RX_FDEQ_BIN_5 +226 0x0708 //RX_FDEQ_BIN_6 +227 0x090A //RX_FDEQ_BIN_7 +228 0x0B0C //RX_FDEQ_BIN_8 +229 0x0D0E //RX_FDEQ_BIN_9 +230 0x1013 //RX_FDEQ_BIN_10 +231 0x1719 //RX_FDEQ_BIN_11 +232 0x1B1E //RX_FDEQ_BIN_12 +233 0x1E1E //RX_FDEQ_BIN_13 +234 0x1E28 //RX_FDEQ_BIN_14 +235 0x282C //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x4000 //RX_FDEQ_RESRV_0 +245 0x0320 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0030 //RX_FDDRC_BAND_MARGIN_1 +248 0x0050 //RX_FDDRC_BAND_MARGIN_2 +249 0x0080 //RX_FDDRC_BAND_MARGIN_3 +250 0x0007 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x5000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x6400 //RX_FDDRC_THRD_3_2 +258 0x6400 //RX_FDDRC_THRD_3_3 +259 0x2000 //RX_FDDRC_SLANT_0_0 +260 0x2000 //RX_FDDRC_SLANT_0_1 +261 0x2000 //RX_FDDRC_SLANT_0_2 +262 0x2000 //RX_FDDRC_SLANT_0_3 +263 0x5333 //RX_FDDRC_SLANT_1_0 +264 0x5333 //RX_FDDRC_SLANT_1_1 +265 0x5333 //RX_FDDRC_SLANT_1_2 +266 0x5333 //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +286 0x0100 //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 #CASE_NAME BLUETOOTH-BTWB-VOICE_GENERIC-FB -#PARAM_TYPE TX+RX -#TOTAL_CUSTOM_STEP 7 +#PARAM_MODE Full +#PARAM_TYPE TX+2RX +#TOTAL_CUSTOM_STEP 7+7 #TX 0 0x0009 //TX_OPERATION_MODE_0 1 0x0009 //TX_OPERATION_MODE_1 @@ -28306,10 +42979,10 @@ 248 0xF600 //TX_THR_SN_EST_6 249 0xF600 //TX_THR_SN_EST_7 250 0x0200 //TX_DELTA_THR_SN_EST_0 -251 0x0200 //TX_DELTA_THR_SN_EST_1 -252 0x0400 //TX_DELTA_THR_SN_EST_2 -253 0x0300 //TX_DELTA_THR_SN_EST_3 -254 0x0600 //TX_DELTA_THR_SN_EST_4 +251 0x0400 //TX_DELTA_THR_SN_EST_1 +252 0x0300 //TX_DELTA_THR_SN_EST_2 +253 0x0600 //TX_DELTA_THR_SN_EST_3 +254 0x0200 //TX_DELTA_THR_SN_EST_4 255 0x0200 //TX_DELTA_THR_SN_EST_5 256 0x0200 //TX_DELTA_THR_SN_EST_6 257 0x0200 //TX_DELTA_THR_SN_EST_7 @@ -28337,31 +43010,31 @@ 279 0x2000 //TX_B_POST_FLT_0 280 0x2000 //TX_B_POST_FLT_1 281 0x0012 //TX_NS_LVL_CTRL_0 -282 0x0019 //TX_NS_LVL_CTRL_1 +282 0x0016 //TX_NS_LVL_CTRL_1 283 0x0016 //TX_NS_LVL_CTRL_2 -284 0x0016 //TX_NS_LVL_CTRL_3 -285 0x0019 //TX_NS_LVL_CTRL_4 +284 0x0019 //TX_NS_LVL_CTRL_3 +285 0x0010 //TX_NS_LVL_CTRL_4 286 0x0010 //TX_NS_LVL_CTRL_5 -287 0x0010 //TX_NS_LVL_CTRL_6 +287 0x0019 //TX_NS_LVL_CTRL_6 288 0x0010 //TX_NS_LVL_CTRL_7 289 0x000C //TX_MIN_GAIN_S_0 -290 0x0011 //TX_MIN_GAIN_S_1 +290 0x000C //TX_MIN_GAIN_S_1 291 0x000C //TX_MIN_GAIN_S_2 -292 0x000C //TX_MIN_GAIN_S_3 -293 0x000F //TX_MIN_GAIN_S_4 +292 0x000F //TX_MIN_GAIN_S_3 +293 0x000C //TX_MIN_GAIN_S_4 294 0x000C //TX_MIN_GAIN_S_5 -295 0x000C //TX_MIN_GAIN_S_6 +295 0x0011 //TX_MIN_GAIN_S_6 296 0x000C //TX_MIN_GAIN_S_7 297 0x7FFF //TX_NMOS_SUP 298 0x0000 //TX_NS_MAX_PRI_SNR_TH 299 0x0000 //TX_NMOS_SUP_MENSA 300 0x7000 //TX_SNRI_SUP_0 -301 0x6000 //TX_SNRI_SUP_1 +301 0x7000 //TX_SNRI_SUP_1 302 0x7000 //TX_SNRI_SUP_2 -303 0x7000 //TX_SNRI_SUP_3 -304 0x6000 //TX_SNRI_SUP_4 +303 0x6000 //TX_SNRI_SUP_3 +304 0x7FFF //TX_SNRI_SUP_4 305 0x7FFF //TX_SNRI_SUP_5 -306 0x7FFF //TX_SNRI_SUP_6 +306 0x6000 //TX_SNRI_SUP_6 307 0x7FFF //TX_SNRI_SUP_7 308 0x7FFF //TX_THR_LFNS 309 0x0016 //TX_G_LFNS @@ -28378,8 +43051,8 @@ 320 0x6000 //TX_A_POST_FILT_S_6 321 0x6000 //TX_A_POST_FILT_S_7 322 0x2000 //TX_B_POST_FILT_0 -323 0x2000 //TX_B_POST_FILT_1 -324 0x4000 //TX_B_POST_FILT_2 +323 0x4000 //TX_B_POST_FILT_1 +324 0x2000 //TX_B_POST_FILT_2 325 0x2000 //TX_B_POST_FILT_3 326 0x2000 //TX_B_POST_FILT_4 327 0x2000 //TX_B_POST_FILT_5 @@ -28435,10 +43108,10 @@ 377 0x0000 //TX_NOISE_TH_5_4 378 0x02BC //TX_NOISE_TH_6 379 0x0020 //TX_MINENOISE_TH -380 0x4000 //TX_MINENOISE_MIC0_TH_MTS -381 0xFFEE //TX_MINENOISE_MIC0_TH_EXP -382 0x6000 //TX_MINENOISE_MIC0_S_TH_MTS -383 0xFFF3 //TX_MINENOISE_MIC0_S_TH_EXP +380 0x4000 //TX_MORENS_TFMASK_TH +381 0xFFEE //TX_DRC_QUIET_FLOOR +382 0x6000 //TX_RATIODTL_CUT_TH +383 0xFFF3 //TX_DT_CUT_K1 384 0x0666 //TX_OUT_ENER_S_TH_CLEAN 385 0x0666 //TX_OUT_ENER_S_TH_LESSCLEAN 386 0x0333 //TX_OUT_ENER_S_TH_NOISY @@ -28446,15 +43119,15 @@ 388 0x0333 //TX_OUT_ENER_TH_SPEECH 389 0x2000 //TX_SN_NPB_GAIN 390 0x0000 //TX_NN_NPB_GAIN -391 0x0000 //TX_CSX_ALPHA_0 -392 0x0000 //TX_CSX_ALPHA_1 -393 0x0000 //TX_CSX_ALPHA_2 -394 0x0000 //TX_CSX_ALPHA_3 -395 0x0800 //TX_MU_ARSP_EST -396 0x00C8 //TX_P_OUTBEAM_MIN_TH +391 0x0000 //TX_POST_MASK_SUP_HSNE +392 0x0000 //TX_TAIL_DET_TH +393 0x0000 //TX_B_LESSCUT_RTO_WTA +394 0x0000 //TX_MEL_G_R +395 0x0800 //TX_SUPHIGH_TH +396 0x00C8 //TX_MASK_G_R 397 0x0002 //TX_EXTRA_NS_L -398 0x0800 //TX_EXTRA_NS_A -399 0x0005 //TX_VR_NOISE_FLOOR_TH +398 0x0800 //TX_C_POST_FLT_MASK +399 0x0005 //TX_A_POST_FLT_WNS 400 0x0148 //TX_MIN_G_LOW300HZ 401 0x0002 //TX_MAXLEVEL_CNG 402 0x00B4 //TX_STN_NOISE_TH @@ -28569,16 +43242,16 @@ 511 0x6666 //TX_MIC_TO_BFGAIN 512 0x0000 //TX_MICTOBFGAIN0 513 0x0000 //TX_FASTMUE_TH -514 0x0000 //TX_DERVB_LEN_0 -515 0x0000 //TX_DERVB_LEN_1 -516 0x0000 //TX_RHO_DERVB -517 0x0000 //TX_MIC_INDX_DERVB -518 0x0000 //TX_MU_DERVB -519 0x0000 //TX_DR_RESRV_0 -520 0x0000 //TX_DR_RESRV_1 -521 0x0000 //TX_DR_RESRV_2 -522 0x0000 //TX_DR_RESRV_3 -523 0x0000 //TX_DR_RESRV_4 +514 0x0000 //TX_DEREVERB_LF_MU +515 0x0000 //TX_DEREVERB_HF_MU +516 0x0000 //TX_DEREVERB_DELAY +517 0x0000 //TX_DEREVERB_COEF_LEN +518 0x0000 //TX_DEREVERB_DNR +519 0x0000 //TX_DEREVERB_ALPHA +520 0x0000 //TX_DEREVERB_BETA +521 0x0000 //TX_GSC_RTOL_TH +522 0x0000 //TX_GSC_RTOH_TH +523 0x0000 //TX_WIDE2_MEANHTH 524 0x0000 //TX_DR_RESRV_5 525 0x0000 //TX_DR_RESRV_6 526 0x0000 //TX_DR_RESRV_7 @@ -28952,8 +43625,73 @@ 894 0xC000 //TX_FASTNS_SSA_THHFL 895 0xCCCC //TX_FASTNS_SSA_THLFH 896 0xD999 //TX_FASTNS_SSA_THHFH +897 0x0000 //TX_SENDFUNC_REG_MICMUTE +898 0x0000 //TX_SENDFUNC_REG_MICMUTE1 +899 0x0000 //TX_MICMUTE_RATIO_THR +900 0x0000 //TX_MICMUTE_AMP_THR +901 0x0000 //TX_MICMUTE_HPF_IND +902 0x0000 //TX_MICMUTE_LOG_EYR_TH +903 0x0000 //TX_MICMUTE_CVG_TIME +904 0x0000 //TX_MICMUTE_RELEASE_TIME +905 0x0000 //TX_MIC_VOLUME_MIC0MUTE +906 0x0000 //TX_MICMUTE_EPD_OFFSET_0 +907 0x0000 //TX_MICMUTE_FRQ_AEC_L +908 0x0000 //TX_MICMUTE_EAD_THR +909 0x0000 //TX_MICMUTE_LAMBDA_CB_NLE +910 0x0000 //TX_MICMUTE_LAMBDA_RE_EST +911 0x0000 //TX_DTD_THR1_MICMUTE_0 +912 0x0000 //TX_DTD_THR1_MICMUTE_1 +913 0x0000 //TX_DTD_THR1_MICMUTE_2 +914 0x0000 //TX_DTD_THR1_MICMUTE_3 +915 0x0000 //TX_DTD_THR2_MICMUTE_0 +916 0x0000 //TX_MICMUTE_MIN_EQ_RE_EST_0 +917 0x0000 //TX_MICMUTE_MIN_EQ_RE_EST_1 +918 0x0000 //TX_MICMUTE_MIN_EQ_RE_EST_2 +919 0x0000 //TX_MICMUTE_MIN_EQ_RE_EST_3 +920 0x0000 //TX_MICMUTE_MIN_EQ_RE_EST_4 +921 0x0000 //TX_MICMUTE_C_POST_FLT +922 0x0000 //TX_MICMUTE_DT_CUT_K +923 0x0000 //TX_MICMUTE_DT_CUT_THR +924 0x0000 //TX_MICMUTE_DT_CUT_K2 +925 0x0000 //TX_MICMUTE_DT_CUT_THR2 +926 0x0000 //TX_MICMUTE_DT2_HOLD_N +927 0x0000 //TX_MICMUTE_RATIODTH_THCUT +928 0x0000 //TX_MICMUTE_B_POST_FLT_ECHOL +929 0x0000 //TX_MICMUTE_B_POST_FLT_ECHOH +930 0x0000 //TX_MICMUTE_C_POST_FLT_MASK +931 0x0000 //TX_MICMUTE_RATIODTL_CUT_TH +932 0x0000 //TX_MICMUTE_DT_CUT_K1 +933 0x0000 //TX_MICMUTE_N2_SN_EST +934 0x0000 //TX_MICMUTE_THR_SN_EST_0 +935 0x0000 //TX_MICMUTE_MIN_G_CTRL_0 +936 0x0000 //TX_MICMUTE_A_POST_FILT_S_0 +937 0x0000 //TX_MICMUTE_B_POST_FILT_0 +938 0x0000 //TX_MIC1RUB_AMP_THR +939 0x0000 //TX_MIC1MUTE_RATIO_THR +940 0x0000 //TX_MIC1MUTE_AMP_THR +941 0x0000 //TX_MIC1MUTE_CVG_TIME +942 0x0000 //TX_MIC1MUTE_RELEASE_TIME +943 0x0000 //TX_AMS_RESRV_01 +944 0x0000 //TX_AMS_RESRV_02 +945 0x0000 //TX_AMS_RESRV_03 +946 0x0000 //TX_AMS_RESRV_04 +947 0x0000 //TX_AMS_RESRV_05 +948 0x0000 //TX_AMS_RESRV_06 +949 0x0000 //TX_AMS_RESRV_07 +950 0x0000 //TX_AMS_RESRV_08 +951 0x0000 //TX_AMS_RESRV_09 +952 0x0000 //TX_AMS_RESRV_10 +953 0x0000 //TX_AMS_RESRV_11 +954 0x0000 //TX_AMS_RESRV_12 +955 0x0000 //TX_AMS_RESRV_13 +956 0x0000 //TX_AMS_RESRV_14 +957 0x0000 //TX_AMS_RESRV_15 +958 0x0000 //TX_AMS_RESRV_16 +959 0x0000 //TX_AMS_RESRV_17 +960 0x0000 //TX_AMS_RESRV_18 +961 0x0000 //TX_AMS_RESRV_19 #RX -0 0x0064 //RX_RECVFUNC_MODE_0 +0 0x2064 //RX_RECVFUNC_MODE_0 1 0x0000 //RX_RECVFUNC_MODE_1 2 0x0004 //RX_SAMPLINGFREQ_SIG 3 0x0004 //RX_SAMPLINGFREQ_PROC @@ -29803,10 +44541,862 @@ 110 0x0000 //RX_FDDRC_RESRV_0 129 0x0100 //RX_SPK_VOL 130 0x0000 //RX_VOL_RESRV_0 +#RX 2 +157 0x0064 //RX_RECVFUNC_MODE_0 +158 0x0000 //RX_RECVFUNC_MODE_1 +159 0x0004 //RX_SAMPLINGFREQ_SIG +160 0x0004 //RX_SAMPLINGFREQ_PROC +161 0x000A //RX_FRAME_SZ +162 0x0000 //RX_DELAY_OPT +163 0x1000 //RX_TDDRC_ALPHA_UP_1 +164 0x1000 //RX_TDDRC_ALPHA_UP_2 +165 0x1000 //RX_TDDRC_ALPHA_UP_3 +166 0x1000 //RX_TDDRC_ALPHA_UP_4 +167 0x0800 //RX_PGA +168 0x7FFF //RX_A_HP +169 0x4000 //RX_B_PE +170 0x7800 //RX_THR_PITCH_DET_0 +171 0x7000 //RX_THR_PITCH_DET_1 +172 0x6000 //RX_THR_PITCH_DET_2 +173 0x0008 //RX_PITCH_BFR_LEN +174 0x0003 //RX_SBD_PITCH_DET +175 0x0100 //RX_PP_RESRV_0 +176 0x0020 //RX_PP_RESRV_1 +177 0x0500 //RX_N_SN_EST +178 0x000C //RX_N2_SN_EST +179 0x000A //RX_NS_LVL_CTRL +180 0xF600 //RX_THR_SN_EST +181 0x7000 //RX_LAMBDA_PFILT +182 0x000A //RX_FENS_RESRV_0 +183 0x0190 //RX_FENS_RESRV_1 +184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +187 0x0002 //RX_EXTRA_NS_L +188 0x0800 //RX_EXTRA_NS_A +189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +190 0x7FFF //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +192 0x199A //RX_A_POST_FLT +193 0x0000 //RX_LMT_THRD +194 0x4000 //RX_LMT_ALPHA +195 0x0020 //RX_FDEQ_SUBNUM +196 0x4848 //RX_FDEQ_GAIN_0 +197 0x4848 //RX_FDEQ_GAIN_1 +198 0x4848 //RX_FDEQ_GAIN_2 +199 0x4848 //RX_FDEQ_GAIN_3 +200 0x4848 //RX_FDEQ_GAIN_4 +201 0x4848 //RX_FDEQ_GAIN_5 +202 0x4848 //RX_FDEQ_GAIN_6 +203 0x4848 //RX_FDEQ_GAIN_7 +204 0x4848 //RX_FDEQ_GAIN_8 +205 0x4848 //RX_FDEQ_GAIN_9 +206 0x4848 //RX_FDEQ_GAIN_10 +207 0x4848 //RX_FDEQ_GAIN_11 +208 0x4848 //RX_FDEQ_GAIN_12 +209 0x4848 //RX_FDEQ_GAIN_13 +210 0x4848 //RX_FDEQ_GAIN_14 +211 0x4848 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0202 //RX_FDEQ_BIN_0 +221 0x0203 //RX_FDEQ_BIN_1 +222 0x0304 //RX_FDEQ_BIN_2 +223 0x0405 //RX_FDEQ_BIN_3 +224 0x0607 //RX_FDEQ_BIN_4 +225 0x0809 //RX_FDEQ_BIN_5 +226 0x0A0B //RX_FDEQ_BIN_6 +227 0x0C0D //RX_FDEQ_BIN_7 +228 0x0E0F //RX_FDEQ_BIN_8 +229 0x1011 //RX_FDEQ_BIN_9 +230 0x1214 //RX_FDEQ_BIN_10 +231 0x1618 //RX_FDEQ_BIN_11 +232 0x1C1C //RX_FDEQ_BIN_12 +233 0x2020 //RX_FDEQ_BIN_13 +234 0x2020 //RX_FDEQ_BIN_14 +235 0x2011 //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x4000 //RX_FDEQ_RESRV_0 +245 0x0320 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0030 //RX_FDDRC_BAND_MARGIN_1 +248 0x0050 //RX_FDDRC_BAND_MARGIN_2 +249 0x0080 //RX_FDDRC_BAND_MARGIN_3 +250 0x0007 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x5000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x6400 //RX_FDDRC_THRD_3_2 +258 0x6400 //RX_FDDRC_THRD_3_3 +259 0x2000 //RX_FDDRC_SLANT_0_0 +260 0x2000 //RX_FDDRC_SLANT_0_1 +261 0x2000 //RX_FDDRC_SLANT_0_2 +262 0x2000 //RX_FDDRC_SLANT_0_3 +263 0x5333 //RX_FDDRC_SLANT_1_0 +264 0x5333 //RX_FDDRC_SLANT_1_1 +265 0x5333 //RX_FDDRC_SLANT_1_2 +266 0x5333 //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +268 0x0000 //RX_FILTINDX +269 0x0000 //RX_TDDRC_THRD_0 +270 0x0000 //RX_TDDRC_THRD_1 +271 0x7FFF //RX_TDDRC_THRD_2 +272 0x7FFF //RX_TDDRC_THRD_3 +273 0x7FFF //RX_TDDRC_SLANT_0 +274 0x7FFF //RX_TDDRC_SLANT_1 +275 0x1000 //RX_TDDRC_ALPHA_UP_0 +276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x199A //RX_TDDRC_HMNC_GAIN +279 0x0001 //RX_TDDRC_SMT_FLAG +280 0x0CCD //RX_TDDRC_SMT_W +281 0x0155 //RX_TDDRC_DRC_GAIN +282 0x7C00 //RX_LAMBDA_PKA_FP +283 0x2000 //RX_TPKA_FP +284 0x2000 //RX_MIN_G_FP +285 0x0080 //RX_MAX_G_FP +286 0x0100 //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 +288 0x0000 //RX_MAXLEVEL_CNG +289 0x3000 //RX_BWE_UV_TH +290 0x3000 //RX_BWE_UV_TH2 +291 0x1800 //RX_BWE_UV_TH3 +292 0x1000 //RX_BWE_V_TH +293 0x04CD //RX_BWE_GAIN1_V_TH1 +294 0x0F33 //RX_BWE_GAIN1_V_TH2 +295 0x7333 //RX_BWE_UV_EQ +296 0x199A //RX_BWE_V_EQ +297 0x7333 //RX_BWE_TONE_TH +298 0x0004 //RX_BWE_UV_HOLD_T +299 0x6CCD //RX_BWE_GAIN2_ALPHA +300 0x799A //RX_BWE_GAIN3_ALPHA +301 0x001E //RX_BWE_CUTOFF +302 0x3000 //RX_BWE_GAINFILL +303 0x3200 //RX_BWE_MAXTH_TONE +304 0x2000 //RX_BWE_EQ_0 +305 0x2000 //RX_BWE_EQ_1 +306 0x2000 //RX_BWE_EQ_2 +307 0x2000 //RX_BWE_EQ_3 +308 0x2000 //RX_BWE_EQ_4 +309 0x2000 //RX_BWE_EQ_5 +310 0x2000 //RX_BWE_EQ_6 +311 0x0000 //RX_BWE_RESRV_0 +312 0x0000 //RX_BWE_RESRV_1 +313 0x0000 //RX_BWE_RESRV_2 +#VOL 0 +163 0x1000 //RX_TDDRC_ALPHA_UP_1 +164 0x1000 //RX_TDDRC_ALPHA_UP_2 +165 0x1000 //RX_TDDRC_ALPHA_UP_3 +166 0x1000 //RX_TDDRC_ALPHA_UP_4 +184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +190 0x7FFF //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +269 0x0000 //RX_TDDRC_THRD_0 +270 0x0000 //RX_TDDRC_THRD_1 +271 0x7FFF //RX_TDDRC_THRD_2 +272 0x7FFF //RX_TDDRC_THRD_3 +273 0x7FFF //RX_TDDRC_SLANT_0 +274 0x7FFF //RX_TDDRC_SLANT_1 +275 0x1000 //RX_TDDRC_ALPHA_UP_0 +276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x199A //RX_TDDRC_HMNC_GAIN +279 0x0001 //RX_TDDRC_SMT_FLAG +280 0x0CCD //RX_TDDRC_SMT_W +281 0x0155 //RX_TDDRC_DRC_GAIN +195 0x0020 //RX_FDEQ_SUBNUM +196 0x4848 //RX_FDEQ_GAIN_0 +197 0x4848 //RX_FDEQ_GAIN_1 +198 0x4848 //RX_FDEQ_GAIN_2 +199 0x4848 //RX_FDEQ_GAIN_3 +200 0x4848 //RX_FDEQ_GAIN_4 +201 0x4848 //RX_FDEQ_GAIN_5 +202 0x4848 //RX_FDEQ_GAIN_6 +203 0x4848 //RX_FDEQ_GAIN_7 +204 0x4848 //RX_FDEQ_GAIN_8 +205 0x4848 //RX_FDEQ_GAIN_9 +206 0x4848 //RX_FDEQ_GAIN_10 +207 0x4848 //RX_FDEQ_GAIN_11 +208 0x4848 //RX_FDEQ_GAIN_12 +209 0x4848 //RX_FDEQ_GAIN_13 +210 0x4848 //RX_FDEQ_GAIN_14 +211 0x4848 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0202 //RX_FDEQ_BIN_0 +221 0x0203 //RX_FDEQ_BIN_1 +222 0x0304 //RX_FDEQ_BIN_2 +223 0x0405 //RX_FDEQ_BIN_3 +224 0x0607 //RX_FDEQ_BIN_4 +225 0x0809 //RX_FDEQ_BIN_5 +226 0x0A0B //RX_FDEQ_BIN_6 +227 0x0C0D //RX_FDEQ_BIN_7 +228 0x0E0F //RX_FDEQ_BIN_8 +229 0x1011 //RX_FDEQ_BIN_9 +230 0x1214 //RX_FDEQ_BIN_10 +231 0x1618 //RX_FDEQ_BIN_11 +232 0x1C1C //RX_FDEQ_BIN_12 +233 0x2020 //RX_FDEQ_BIN_13 +234 0x2020 //RX_FDEQ_BIN_14 +235 0x2011 //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x4000 //RX_FDEQ_RESRV_0 +245 0x0320 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0030 //RX_FDDRC_BAND_MARGIN_1 +248 0x0050 //RX_FDDRC_BAND_MARGIN_2 +249 0x0080 //RX_FDDRC_BAND_MARGIN_3 +250 0x0007 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x5000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x6400 //RX_FDDRC_THRD_3_2 +258 0x6400 //RX_FDDRC_THRD_3_3 +259 0x2000 //RX_FDDRC_SLANT_0_0 +260 0x2000 //RX_FDDRC_SLANT_0_1 +261 0x2000 //RX_FDDRC_SLANT_0_2 +262 0x2000 //RX_FDDRC_SLANT_0_3 +263 0x5333 //RX_FDDRC_SLANT_1_0 +264 0x5333 //RX_FDDRC_SLANT_1_1 +265 0x5333 //RX_FDDRC_SLANT_1_2 +266 0x5333 //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +286 0x0100 //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 +#VOL 1 +163 0x1000 //RX_TDDRC_ALPHA_UP_1 +164 0x1000 //RX_TDDRC_ALPHA_UP_2 +165 0x1000 //RX_TDDRC_ALPHA_UP_3 +166 0x1000 //RX_TDDRC_ALPHA_UP_4 +184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +190 0x7FFF //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +269 0x0000 //RX_TDDRC_THRD_0 +270 0x0000 //RX_TDDRC_THRD_1 +271 0x7FFF //RX_TDDRC_THRD_2 +272 0x7FFF //RX_TDDRC_THRD_3 +273 0x7FFF //RX_TDDRC_SLANT_0 +274 0x7FFF //RX_TDDRC_SLANT_1 +275 0x1000 //RX_TDDRC_ALPHA_UP_0 +276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x199A //RX_TDDRC_HMNC_GAIN +279 0x0001 //RX_TDDRC_SMT_FLAG +280 0x0CCD //RX_TDDRC_SMT_W +281 0x0155 //RX_TDDRC_DRC_GAIN +195 0x0020 //RX_FDEQ_SUBNUM +196 0x4848 //RX_FDEQ_GAIN_0 +197 0x4848 //RX_FDEQ_GAIN_1 +198 0x4848 //RX_FDEQ_GAIN_2 +199 0x4848 //RX_FDEQ_GAIN_3 +200 0x4848 //RX_FDEQ_GAIN_4 +201 0x4848 //RX_FDEQ_GAIN_5 +202 0x4848 //RX_FDEQ_GAIN_6 +203 0x4848 //RX_FDEQ_GAIN_7 +204 0x4848 //RX_FDEQ_GAIN_8 +205 0x4848 //RX_FDEQ_GAIN_9 +206 0x4848 //RX_FDEQ_GAIN_10 +207 0x4848 //RX_FDEQ_GAIN_11 +208 0x4848 //RX_FDEQ_GAIN_12 +209 0x4848 //RX_FDEQ_GAIN_13 +210 0x4848 //RX_FDEQ_GAIN_14 +211 0x4848 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0202 //RX_FDEQ_BIN_0 +221 0x0203 //RX_FDEQ_BIN_1 +222 0x0304 //RX_FDEQ_BIN_2 +223 0x0405 //RX_FDEQ_BIN_3 +224 0x0607 //RX_FDEQ_BIN_4 +225 0x0809 //RX_FDEQ_BIN_5 +226 0x0A0B //RX_FDEQ_BIN_6 +227 0x0C0D //RX_FDEQ_BIN_7 +228 0x0E0F //RX_FDEQ_BIN_8 +229 0x1011 //RX_FDEQ_BIN_9 +230 0x1214 //RX_FDEQ_BIN_10 +231 0x1618 //RX_FDEQ_BIN_11 +232 0x1C1C //RX_FDEQ_BIN_12 +233 0x2020 //RX_FDEQ_BIN_13 +234 0x2020 //RX_FDEQ_BIN_14 +235 0x2011 //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x4000 //RX_FDEQ_RESRV_0 +245 0x0320 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0030 //RX_FDDRC_BAND_MARGIN_1 +248 0x0050 //RX_FDDRC_BAND_MARGIN_2 +249 0x0080 //RX_FDDRC_BAND_MARGIN_3 +250 0x0007 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x5000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x6400 //RX_FDDRC_THRD_3_2 +258 0x6400 //RX_FDDRC_THRD_3_3 +259 0x2000 //RX_FDDRC_SLANT_0_0 +260 0x2000 //RX_FDDRC_SLANT_0_1 +261 0x2000 //RX_FDDRC_SLANT_0_2 +262 0x2000 //RX_FDDRC_SLANT_0_3 +263 0x5333 //RX_FDDRC_SLANT_1_0 +264 0x5333 //RX_FDDRC_SLANT_1_1 +265 0x5333 //RX_FDDRC_SLANT_1_2 +266 0x5333 //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +286 0x0100 //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 +#VOL 2 +163 0x1000 //RX_TDDRC_ALPHA_UP_1 +164 0x1000 //RX_TDDRC_ALPHA_UP_2 +165 0x1000 //RX_TDDRC_ALPHA_UP_3 +166 0x1000 //RX_TDDRC_ALPHA_UP_4 +184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +190 0x7FFF //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +269 0x0000 //RX_TDDRC_THRD_0 +270 0x0000 //RX_TDDRC_THRD_1 +271 0x7FFF //RX_TDDRC_THRD_2 +272 0x7FFF //RX_TDDRC_THRD_3 +273 0x7FFF //RX_TDDRC_SLANT_0 +274 0x7FFF //RX_TDDRC_SLANT_1 +275 0x1000 //RX_TDDRC_ALPHA_UP_0 +276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x199A //RX_TDDRC_HMNC_GAIN +279 0x0001 //RX_TDDRC_SMT_FLAG +280 0x0CCD //RX_TDDRC_SMT_W +281 0x0155 //RX_TDDRC_DRC_GAIN +195 0x0020 //RX_FDEQ_SUBNUM +196 0x4848 //RX_FDEQ_GAIN_0 +197 0x4848 //RX_FDEQ_GAIN_1 +198 0x4848 //RX_FDEQ_GAIN_2 +199 0x4848 //RX_FDEQ_GAIN_3 +200 0x4848 //RX_FDEQ_GAIN_4 +201 0x4848 //RX_FDEQ_GAIN_5 +202 0x4848 //RX_FDEQ_GAIN_6 +203 0x4848 //RX_FDEQ_GAIN_7 +204 0x4848 //RX_FDEQ_GAIN_8 +205 0x4848 //RX_FDEQ_GAIN_9 +206 0x4848 //RX_FDEQ_GAIN_10 +207 0x4848 //RX_FDEQ_GAIN_11 +208 0x4848 //RX_FDEQ_GAIN_12 +209 0x4848 //RX_FDEQ_GAIN_13 +210 0x4848 //RX_FDEQ_GAIN_14 +211 0x4848 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0202 //RX_FDEQ_BIN_0 +221 0x0203 //RX_FDEQ_BIN_1 +222 0x0304 //RX_FDEQ_BIN_2 +223 0x0405 //RX_FDEQ_BIN_3 +224 0x0607 //RX_FDEQ_BIN_4 +225 0x0809 //RX_FDEQ_BIN_5 +226 0x0A0B //RX_FDEQ_BIN_6 +227 0x0C0D //RX_FDEQ_BIN_7 +228 0x0E0F //RX_FDEQ_BIN_8 +229 0x1011 //RX_FDEQ_BIN_9 +230 0x1214 //RX_FDEQ_BIN_10 +231 0x1618 //RX_FDEQ_BIN_11 +232 0x1C1C //RX_FDEQ_BIN_12 +233 0x2020 //RX_FDEQ_BIN_13 +234 0x2020 //RX_FDEQ_BIN_14 +235 0x2011 //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x4000 //RX_FDEQ_RESRV_0 +245 0x0320 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0030 //RX_FDDRC_BAND_MARGIN_1 +248 0x0050 //RX_FDDRC_BAND_MARGIN_2 +249 0x0080 //RX_FDDRC_BAND_MARGIN_3 +250 0x0007 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x5000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x6400 //RX_FDDRC_THRD_3_2 +258 0x6400 //RX_FDDRC_THRD_3_3 +259 0x2000 //RX_FDDRC_SLANT_0_0 +260 0x2000 //RX_FDDRC_SLANT_0_1 +261 0x2000 //RX_FDDRC_SLANT_0_2 +262 0x2000 //RX_FDDRC_SLANT_0_3 +263 0x5333 //RX_FDDRC_SLANT_1_0 +264 0x5333 //RX_FDDRC_SLANT_1_1 +265 0x5333 //RX_FDDRC_SLANT_1_2 +266 0x5333 //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +286 0x0100 //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 +#VOL 3 +163 0x1000 //RX_TDDRC_ALPHA_UP_1 +164 0x1000 //RX_TDDRC_ALPHA_UP_2 +165 0x1000 //RX_TDDRC_ALPHA_UP_3 +166 0x1000 //RX_TDDRC_ALPHA_UP_4 +184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +190 0x7FFF //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +269 0x0000 //RX_TDDRC_THRD_0 +270 0x0000 //RX_TDDRC_THRD_1 +271 0x7FFF //RX_TDDRC_THRD_2 +272 0x7FFF //RX_TDDRC_THRD_3 +273 0x7FFF //RX_TDDRC_SLANT_0 +274 0x7FFF //RX_TDDRC_SLANT_1 +275 0x1000 //RX_TDDRC_ALPHA_UP_0 +276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x199A //RX_TDDRC_HMNC_GAIN +279 0x0001 //RX_TDDRC_SMT_FLAG +280 0x0CCD //RX_TDDRC_SMT_W +281 0x0155 //RX_TDDRC_DRC_GAIN +195 0x0020 //RX_FDEQ_SUBNUM +196 0x4848 //RX_FDEQ_GAIN_0 +197 0x4848 //RX_FDEQ_GAIN_1 +198 0x4848 //RX_FDEQ_GAIN_2 +199 0x4848 //RX_FDEQ_GAIN_3 +200 0x4848 //RX_FDEQ_GAIN_4 +201 0x4848 //RX_FDEQ_GAIN_5 +202 0x4848 //RX_FDEQ_GAIN_6 +203 0x4848 //RX_FDEQ_GAIN_7 +204 0x4848 //RX_FDEQ_GAIN_8 +205 0x4848 //RX_FDEQ_GAIN_9 +206 0x4848 //RX_FDEQ_GAIN_10 +207 0x4848 //RX_FDEQ_GAIN_11 +208 0x4848 //RX_FDEQ_GAIN_12 +209 0x4848 //RX_FDEQ_GAIN_13 +210 0x4848 //RX_FDEQ_GAIN_14 +211 0x4848 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0202 //RX_FDEQ_BIN_0 +221 0x0203 //RX_FDEQ_BIN_1 +222 0x0304 //RX_FDEQ_BIN_2 +223 0x0405 //RX_FDEQ_BIN_3 +224 0x0607 //RX_FDEQ_BIN_4 +225 0x0809 //RX_FDEQ_BIN_5 +226 0x0A0B //RX_FDEQ_BIN_6 +227 0x0C0D //RX_FDEQ_BIN_7 +228 0x0E0F //RX_FDEQ_BIN_8 +229 0x1011 //RX_FDEQ_BIN_9 +230 0x1214 //RX_FDEQ_BIN_10 +231 0x1618 //RX_FDEQ_BIN_11 +232 0x1C1C //RX_FDEQ_BIN_12 +233 0x2020 //RX_FDEQ_BIN_13 +234 0x2020 //RX_FDEQ_BIN_14 +235 0x2011 //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x4000 //RX_FDEQ_RESRV_0 +245 0x0320 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0030 //RX_FDDRC_BAND_MARGIN_1 +248 0x0050 //RX_FDDRC_BAND_MARGIN_2 +249 0x0080 //RX_FDDRC_BAND_MARGIN_3 +250 0x0007 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x5000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x6400 //RX_FDDRC_THRD_3_2 +258 0x6400 //RX_FDDRC_THRD_3_3 +259 0x2000 //RX_FDDRC_SLANT_0_0 +260 0x2000 //RX_FDDRC_SLANT_0_1 +261 0x2000 //RX_FDDRC_SLANT_0_2 +262 0x2000 //RX_FDDRC_SLANT_0_3 +263 0x5333 //RX_FDDRC_SLANT_1_0 +264 0x5333 //RX_FDDRC_SLANT_1_1 +265 0x5333 //RX_FDDRC_SLANT_1_2 +266 0x5333 //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +286 0x0100 //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 +#VOL 4 +163 0x1000 //RX_TDDRC_ALPHA_UP_1 +164 0x1000 //RX_TDDRC_ALPHA_UP_2 +165 0x1000 //RX_TDDRC_ALPHA_UP_3 +166 0x1000 //RX_TDDRC_ALPHA_UP_4 +184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +190 0x7FFF //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +269 0x0000 //RX_TDDRC_THRD_0 +270 0x0000 //RX_TDDRC_THRD_1 +271 0x7FFF //RX_TDDRC_THRD_2 +272 0x7FFF //RX_TDDRC_THRD_3 +273 0x7FFF //RX_TDDRC_SLANT_0 +274 0x7FFF //RX_TDDRC_SLANT_1 +275 0x1000 //RX_TDDRC_ALPHA_UP_0 +276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x199A //RX_TDDRC_HMNC_GAIN +279 0x0001 //RX_TDDRC_SMT_FLAG +280 0x0CCD //RX_TDDRC_SMT_W +281 0x0155 //RX_TDDRC_DRC_GAIN +195 0x0020 //RX_FDEQ_SUBNUM +196 0x4848 //RX_FDEQ_GAIN_0 +197 0x4848 //RX_FDEQ_GAIN_1 +198 0x4848 //RX_FDEQ_GAIN_2 +199 0x4848 //RX_FDEQ_GAIN_3 +200 0x4848 //RX_FDEQ_GAIN_4 +201 0x4848 //RX_FDEQ_GAIN_5 +202 0x4848 //RX_FDEQ_GAIN_6 +203 0x4848 //RX_FDEQ_GAIN_7 +204 0x4848 //RX_FDEQ_GAIN_8 +205 0x4848 //RX_FDEQ_GAIN_9 +206 0x4848 //RX_FDEQ_GAIN_10 +207 0x4848 //RX_FDEQ_GAIN_11 +208 0x4848 //RX_FDEQ_GAIN_12 +209 0x4848 //RX_FDEQ_GAIN_13 +210 0x4848 //RX_FDEQ_GAIN_14 +211 0x4848 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0202 //RX_FDEQ_BIN_0 +221 0x0203 //RX_FDEQ_BIN_1 +222 0x0304 //RX_FDEQ_BIN_2 +223 0x0405 //RX_FDEQ_BIN_3 +224 0x0607 //RX_FDEQ_BIN_4 +225 0x0809 //RX_FDEQ_BIN_5 +226 0x0A0B //RX_FDEQ_BIN_6 +227 0x0C0D //RX_FDEQ_BIN_7 +228 0x0E0F //RX_FDEQ_BIN_8 +229 0x1011 //RX_FDEQ_BIN_9 +230 0x1214 //RX_FDEQ_BIN_10 +231 0x1618 //RX_FDEQ_BIN_11 +232 0x1C1C //RX_FDEQ_BIN_12 +233 0x2020 //RX_FDEQ_BIN_13 +234 0x2020 //RX_FDEQ_BIN_14 +235 0x2011 //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x4000 //RX_FDEQ_RESRV_0 +245 0x0320 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0030 //RX_FDDRC_BAND_MARGIN_1 +248 0x0050 //RX_FDDRC_BAND_MARGIN_2 +249 0x0080 //RX_FDDRC_BAND_MARGIN_3 +250 0x0007 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x5000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x6400 //RX_FDDRC_THRD_3_2 +258 0x6400 //RX_FDDRC_THRD_3_3 +259 0x2000 //RX_FDDRC_SLANT_0_0 +260 0x2000 //RX_FDDRC_SLANT_0_1 +261 0x2000 //RX_FDDRC_SLANT_0_2 +262 0x2000 //RX_FDDRC_SLANT_0_3 +263 0x5333 //RX_FDDRC_SLANT_1_0 +264 0x5333 //RX_FDDRC_SLANT_1_1 +265 0x5333 //RX_FDDRC_SLANT_1_2 +266 0x5333 //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +286 0x0100 //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 +#VOL 5 +163 0x1000 //RX_TDDRC_ALPHA_UP_1 +164 0x1000 //RX_TDDRC_ALPHA_UP_2 +165 0x1000 //RX_TDDRC_ALPHA_UP_3 +166 0x1000 //RX_TDDRC_ALPHA_UP_4 +184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +190 0x7FFF //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +269 0x0000 //RX_TDDRC_THRD_0 +270 0x0000 //RX_TDDRC_THRD_1 +271 0x7FFF //RX_TDDRC_THRD_2 +272 0x7FFF //RX_TDDRC_THRD_3 +273 0x7FFF //RX_TDDRC_SLANT_0 +274 0x7FFF //RX_TDDRC_SLANT_1 +275 0x1000 //RX_TDDRC_ALPHA_UP_0 +276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x199A //RX_TDDRC_HMNC_GAIN +279 0x0001 //RX_TDDRC_SMT_FLAG +280 0x0CCD //RX_TDDRC_SMT_W +281 0x0155 //RX_TDDRC_DRC_GAIN +195 0x0020 //RX_FDEQ_SUBNUM +196 0x4848 //RX_FDEQ_GAIN_0 +197 0x4848 //RX_FDEQ_GAIN_1 +198 0x4848 //RX_FDEQ_GAIN_2 +199 0x4848 //RX_FDEQ_GAIN_3 +200 0x4848 //RX_FDEQ_GAIN_4 +201 0x4848 //RX_FDEQ_GAIN_5 +202 0x4848 //RX_FDEQ_GAIN_6 +203 0x4848 //RX_FDEQ_GAIN_7 +204 0x4848 //RX_FDEQ_GAIN_8 +205 0x4848 //RX_FDEQ_GAIN_9 +206 0x4848 //RX_FDEQ_GAIN_10 +207 0x4848 //RX_FDEQ_GAIN_11 +208 0x4848 //RX_FDEQ_GAIN_12 +209 0x4848 //RX_FDEQ_GAIN_13 +210 0x4848 //RX_FDEQ_GAIN_14 +211 0x4848 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0202 //RX_FDEQ_BIN_0 +221 0x0203 //RX_FDEQ_BIN_1 +222 0x0304 //RX_FDEQ_BIN_2 +223 0x0405 //RX_FDEQ_BIN_3 +224 0x0607 //RX_FDEQ_BIN_4 +225 0x0809 //RX_FDEQ_BIN_5 +226 0x0A0B //RX_FDEQ_BIN_6 +227 0x0C0D //RX_FDEQ_BIN_7 +228 0x0E0F //RX_FDEQ_BIN_8 +229 0x1011 //RX_FDEQ_BIN_9 +230 0x1214 //RX_FDEQ_BIN_10 +231 0x1618 //RX_FDEQ_BIN_11 +232 0x1C1C //RX_FDEQ_BIN_12 +233 0x2020 //RX_FDEQ_BIN_13 +234 0x2020 //RX_FDEQ_BIN_14 +235 0x2011 //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x4000 //RX_FDEQ_RESRV_0 +245 0x0320 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0030 //RX_FDDRC_BAND_MARGIN_1 +248 0x0050 //RX_FDDRC_BAND_MARGIN_2 +249 0x0080 //RX_FDDRC_BAND_MARGIN_3 +250 0x0007 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x5000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x6400 //RX_FDDRC_THRD_3_2 +258 0x6400 //RX_FDDRC_THRD_3_3 +259 0x2000 //RX_FDDRC_SLANT_0_0 +260 0x2000 //RX_FDDRC_SLANT_0_1 +261 0x2000 //RX_FDDRC_SLANT_0_2 +262 0x2000 //RX_FDDRC_SLANT_0_3 +263 0x5333 //RX_FDDRC_SLANT_1_0 +264 0x5333 //RX_FDDRC_SLANT_1_1 +265 0x5333 //RX_FDDRC_SLANT_1_2 +266 0x5333 //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +286 0x0100 //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 +#VOL 6 +163 0x1000 //RX_TDDRC_ALPHA_UP_1 +164 0x1000 //RX_TDDRC_ALPHA_UP_2 +165 0x1000 //RX_TDDRC_ALPHA_UP_3 +166 0x1000 //RX_TDDRC_ALPHA_UP_4 +184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +190 0x7FFF //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +269 0x0000 //RX_TDDRC_THRD_0 +270 0x0000 //RX_TDDRC_THRD_1 +271 0x7FFF //RX_TDDRC_THRD_2 +272 0x7FFF //RX_TDDRC_THRD_3 +273 0x7FFF //RX_TDDRC_SLANT_0 +274 0x7FFF //RX_TDDRC_SLANT_1 +275 0x1000 //RX_TDDRC_ALPHA_UP_0 +276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x199A //RX_TDDRC_HMNC_GAIN +279 0x0001 //RX_TDDRC_SMT_FLAG +280 0x0CCD //RX_TDDRC_SMT_W +281 0x0155 //RX_TDDRC_DRC_GAIN +195 0x0020 //RX_FDEQ_SUBNUM +196 0x4848 //RX_FDEQ_GAIN_0 +197 0x4848 //RX_FDEQ_GAIN_1 +198 0x4848 //RX_FDEQ_GAIN_2 +199 0x4848 //RX_FDEQ_GAIN_3 +200 0x4848 //RX_FDEQ_GAIN_4 +201 0x4848 //RX_FDEQ_GAIN_5 +202 0x4848 //RX_FDEQ_GAIN_6 +203 0x4848 //RX_FDEQ_GAIN_7 +204 0x4848 //RX_FDEQ_GAIN_8 +205 0x4848 //RX_FDEQ_GAIN_9 +206 0x4848 //RX_FDEQ_GAIN_10 +207 0x4848 //RX_FDEQ_GAIN_11 +208 0x4848 //RX_FDEQ_GAIN_12 +209 0x4848 //RX_FDEQ_GAIN_13 +210 0x4848 //RX_FDEQ_GAIN_14 +211 0x4848 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0202 //RX_FDEQ_BIN_0 +221 0x0203 //RX_FDEQ_BIN_1 +222 0x0304 //RX_FDEQ_BIN_2 +223 0x0405 //RX_FDEQ_BIN_3 +224 0x0607 //RX_FDEQ_BIN_4 +225 0x0809 //RX_FDEQ_BIN_5 +226 0x0A0B //RX_FDEQ_BIN_6 +227 0x0C0D //RX_FDEQ_BIN_7 +228 0x0E0F //RX_FDEQ_BIN_8 +229 0x1011 //RX_FDEQ_BIN_9 +230 0x1214 //RX_FDEQ_BIN_10 +231 0x1618 //RX_FDEQ_BIN_11 +232 0x1C1C //RX_FDEQ_BIN_12 +233 0x2020 //RX_FDEQ_BIN_13 +234 0x2020 //RX_FDEQ_BIN_14 +235 0x2011 //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x4000 //RX_FDEQ_RESRV_0 +245 0x0320 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0030 //RX_FDDRC_BAND_MARGIN_1 +248 0x0050 //RX_FDDRC_BAND_MARGIN_2 +249 0x0080 //RX_FDDRC_BAND_MARGIN_3 +250 0x0007 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x5000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x6400 //RX_FDDRC_THRD_3_2 +258 0x6400 //RX_FDDRC_THRD_3_3 +259 0x2000 //RX_FDDRC_SLANT_0_0 +260 0x2000 //RX_FDDRC_SLANT_0_1 +261 0x2000 //RX_FDDRC_SLANT_0_2 +262 0x2000 //RX_FDDRC_SLANT_0_3 +263 0x5333 //RX_FDDRC_SLANT_1_0 +264 0x5333 //RX_FDDRC_SLANT_1_1 +265 0x5333 //RX_FDDRC_SLANT_1_2 +266 0x5333 //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +286 0x0100 //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 #CASE_NAME BLUETOOTH-BTWB_NREC-VOICE_GENERIC-NB -#PARAM_TYPE TX+RX -#TOTAL_CUSTOM_STEP 7 +#PARAM_MODE Full +#PARAM_TYPE TX+2RX +#TOTAL_CUSTOM_STEP 7+7 #TX 0 0x0008 //TX_OPERATION_MODE_0 1 0x0008 //TX_OPERATION_MODE_1 @@ -30059,20 +45649,20 @@ 248 0xF400 //TX_THR_SN_EST_6 249 0xF600 //TX_THR_SN_EST_7 250 0x0000 //TX_DELTA_THR_SN_EST_0 -251 0x0000 //TX_DELTA_THR_SN_EST_1 +251 0x0200 //TX_DELTA_THR_SN_EST_1 252 0x0200 //TX_DELTA_THR_SN_EST_2 253 0x0200 //TX_DELTA_THR_SN_EST_3 254 0x0200 //TX_DELTA_THR_SN_EST_4 255 0x0200 //TX_DELTA_THR_SN_EST_5 -256 0x0200 //TX_DELTA_THR_SN_EST_6 +256 0x0000 //TX_DELTA_THR_SN_EST_6 257 0x0200 //TX_DELTA_THR_SN_EST_7 258 0x6000 //TX_LAMBDA_NN_EST_0 -259 0x6000 //TX_LAMBDA_NN_EST_1 +259 0x4000 //TX_LAMBDA_NN_EST_1 260 0x4000 //TX_LAMBDA_NN_EST_2 261 0x4000 //TX_LAMBDA_NN_EST_3 262 0x4000 //TX_LAMBDA_NN_EST_4 263 0x4000 //TX_LAMBDA_NN_EST_5 -264 0x4000 //TX_LAMBDA_NN_EST_6 +264 0x6000 //TX_LAMBDA_NN_EST_6 265 0x4000 //TX_LAMBDA_NN_EST_7 266 0x0400 //TX_N_SN_EST 267 0x001E //TX_INBEAM_T @@ -30090,16 +45680,16 @@ 279 0x1000 //TX_B_POST_FLT_0 280 0x1000 //TX_B_POST_FLT_1 281 0x000F //TX_NS_LVL_CTRL_0 -282 0x000F //TX_NS_LVL_CTRL_1 -283 0x0011 //TX_NS_LVL_CTRL_2 +282 0x0011 //TX_NS_LVL_CTRL_1 +283 0x000F //TX_NS_LVL_CTRL_2 284 0x000F //TX_NS_LVL_CTRL_3 285 0x000F //TX_NS_LVL_CTRL_4 286 0x000F //TX_NS_LVL_CTRL_5 287 0x000F //TX_NS_LVL_CTRL_6 288 0x0011 //TX_NS_LVL_CTRL_7 289 0x000C //TX_MIN_GAIN_S_0 -290 0x000C //TX_MIN_GAIN_S_1 -291 0x000F //TX_MIN_GAIN_S_2 +290 0x000F //TX_MIN_GAIN_S_1 +291 0x000C //TX_MIN_GAIN_S_2 292 0x000C //TX_MIN_GAIN_S_3 293 0x000C //TX_MIN_GAIN_S_4 294 0x000C //TX_MIN_GAIN_S_5 @@ -30123,12 +45713,12 @@ 312 0x7FFF //TX_A_POST_FILT_0 313 0x2000 //TX_A_POST_FILT_1 314 0x4000 //TX_A_POST_FILT_S_0 -315 0x4000 //TX_A_POST_FILT_S_1 +315 0x5000 //TX_A_POST_FILT_S_1 316 0x5000 //TX_A_POST_FILT_S_2 317 0x5000 //TX_A_POST_FILT_S_3 318 0x5000 //TX_A_POST_FILT_S_4 319 0x5000 //TX_A_POST_FILT_S_5 -320 0x5000 //TX_A_POST_FILT_S_6 +320 0x4000 //TX_A_POST_FILT_S_6 321 0x5000 //TX_A_POST_FILT_S_7 322 0x1000 //TX_B_POST_FILT_0 323 0x1000 //TX_B_POST_FILT_1 @@ -30188,10 +45778,10 @@ 377 0x7FFF //TX_NOISE_TH_5_4 378 0x044C //TX_NOISE_TH_6 379 0x0014 //TX_MINENOISE_TH -380 0x4000 //TX_MINENOISE_MIC0_TH_MTS -381 0xFFEE //TX_MINENOISE_MIC0_TH_EXP -382 0x6000 //TX_MINENOISE_MIC0_S_TH_MTS -383 0xFFF3 //TX_MINENOISE_MIC0_S_TH_EXP +380 0x4000 //TX_MORENS_TFMASK_TH +381 0xFFEE //TX_DRC_QUIET_FLOOR +382 0x6000 //TX_RATIODTL_CUT_TH +383 0xFFF3 //TX_DT_CUT_K1 384 0x0666 //TX_OUT_ENER_S_TH_CLEAN 385 0x0666 //TX_OUT_ENER_S_TH_LESSCLEAN 386 0x0333 //TX_OUT_ENER_S_TH_NOISY @@ -30199,15 +45789,15 @@ 388 0x0333 //TX_OUT_ENER_TH_SPEECH 389 0x2000 //TX_SN_NPB_GAIN 390 0x0000 //TX_NN_NPB_GAIN -391 0x0000 //TX_CSX_ALPHA_0 -392 0x0000 //TX_CSX_ALPHA_1 -393 0x0000 //TX_CSX_ALPHA_2 -394 0x0000 //TX_CSX_ALPHA_3 -395 0x0800 //TX_MU_ARSP_EST -396 0x00C8 //TX_P_OUTBEAM_MIN_TH +391 0x0000 //TX_POST_MASK_SUP_HSNE +392 0x0000 //TX_TAIL_DET_TH +393 0x0000 //TX_B_LESSCUT_RTO_WTA +394 0x0000 //TX_MEL_G_R +395 0x0800 //TX_SUPHIGH_TH +396 0x00C8 //TX_MASK_G_R 397 0x0002 //TX_EXTRA_NS_L -398 0x0800 //TX_EXTRA_NS_A -399 0x0005 //TX_VR_NOISE_FLOOR_TH +398 0x0800 //TX_C_POST_FLT_MASK +399 0x0005 //TX_A_POST_FLT_WNS 400 0x0148 //TX_MIN_G_LOW300HZ 401 0x0002 //TX_MAXLEVEL_CNG 402 0x00B4 //TX_STN_NOISE_TH @@ -30322,16 +45912,16 @@ 511 0x6666 //TX_MIC_TO_BFGAIN 512 0x0000 //TX_MICTOBFGAIN0 513 0x0000 //TX_FASTMUE_TH -514 0x0000 //TX_DERVB_LEN_0 -515 0x0000 //TX_DERVB_LEN_1 -516 0x0000 //TX_RHO_DERVB -517 0x0000 //TX_MIC_INDX_DERVB -518 0x0000 //TX_MU_DERVB -519 0x0000 //TX_DR_RESRV_0 -520 0x0000 //TX_DR_RESRV_1 -521 0x0000 //TX_DR_RESRV_2 -522 0x0000 //TX_DR_RESRV_3 -523 0x0000 //TX_DR_RESRV_4 +514 0x0000 //TX_DEREVERB_LF_MU +515 0x0000 //TX_DEREVERB_HF_MU +516 0x0000 //TX_DEREVERB_DELAY +517 0x0000 //TX_DEREVERB_COEF_LEN +518 0x0000 //TX_DEREVERB_DNR +519 0x0000 //TX_DEREVERB_ALPHA +520 0x0000 //TX_DEREVERB_BETA +521 0x0000 //TX_GSC_RTOL_TH +522 0x0000 //TX_GSC_RTOH_TH +523 0x0000 //TX_WIDE2_MEANHTH 524 0x0000 //TX_DR_RESRV_5 525 0x0000 //TX_DR_RESRV_6 526 0x0000 //TX_DR_RESRV_7 @@ -30705,8 +46295,73 @@ 894 0xC000 //TX_FASTNS_SSA_THHFL 895 0xCCCC //TX_FASTNS_SSA_THLFH 896 0xD999 //TX_FASTNS_SSA_THHFH +897 0x0000 //TX_SENDFUNC_REG_MICMUTE +898 0x0000 //TX_SENDFUNC_REG_MICMUTE1 +899 0x0000 //TX_MICMUTE_RATIO_THR +900 0x0000 //TX_MICMUTE_AMP_THR +901 0x0000 //TX_MICMUTE_HPF_IND +902 0x0000 //TX_MICMUTE_LOG_EYR_TH +903 0x0000 //TX_MICMUTE_CVG_TIME +904 0x0000 //TX_MICMUTE_RELEASE_TIME +905 0x0000 //TX_MIC_VOLUME_MIC0MUTE +906 0x0000 //TX_MICMUTE_EPD_OFFSET_0 +907 0x0000 //TX_MICMUTE_FRQ_AEC_L +908 0x0000 //TX_MICMUTE_EAD_THR +909 0x0000 //TX_MICMUTE_LAMBDA_CB_NLE +910 0x0000 //TX_MICMUTE_LAMBDA_RE_EST +911 0x0000 //TX_DTD_THR1_MICMUTE_0 +912 0x0000 //TX_DTD_THR1_MICMUTE_1 +913 0x0000 //TX_DTD_THR1_MICMUTE_2 +914 0x0000 //TX_DTD_THR1_MICMUTE_3 +915 0x0000 //TX_DTD_THR2_MICMUTE_0 +916 0x0000 //TX_MICMUTE_MIN_EQ_RE_EST_0 +917 0x0000 //TX_MICMUTE_MIN_EQ_RE_EST_1 +918 0x0000 //TX_MICMUTE_MIN_EQ_RE_EST_2 +919 0x0000 //TX_MICMUTE_MIN_EQ_RE_EST_3 +920 0x0000 //TX_MICMUTE_MIN_EQ_RE_EST_4 +921 0x0000 //TX_MICMUTE_C_POST_FLT +922 0x0000 //TX_MICMUTE_DT_CUT_K +923 0x0000 //TX_MICMUTE_DT_CUT_THR +924 0x0000 //TX_MICMUTE_DT_CUT_K2 +925 0x0000 //TX_MICMUTE_DT_CUT_THR2 +926 0x0000 //TX_MICMUTE_DT2_HOLD_N +927 0x0000 //TX_MICMUTE_RATIODTH_THCUT +928 0x0000 //TX_MICMUTE_B_POST_FLT_ECHOL +929 0x0000 //TX_MICMUTE_B_POST_FLT_ECHOH +930 0x0000 //TX_MICMUTE_C_POST_FLT_MASK +931 0x0000 //TX_MICMUTE_RATIODTL_CUT_TH +932 0x0000 //TX_MICMUTE_DT_CUT_K1 +933 0x0000 //TX_MICMUTE_N2_SN_EST +934 0x0000 //TX_MICMUTE_THR_SN_EST_0 +935 0x0000 //TX_MICMUTE_MIN_G_CTRL_0 +936 0x0000 //TX_MICMUTE_A_POST_FILT_S_0 +937 0x0000 //TX_MICMUTE_B_POST_FILT_0 +938 0x0000 //TX_MIC1RUB_AMP_THR +939 0x0000 //TX_MIC1MUTE_RATIO_THR +940 0x0000 //TX_MIC1MUTE_AMP_THR +941 0x0000 //TX_MIC1MUTE_CVG_TIME +942 0x0000 //TX_MIC1MUTE_RELEASE_TIME +943 0x0000 //TX_AMS_RESRV_01 +944 0x0000 //TX_AMS_RESRV_02 +945 0x0000 //TX_AMS_RESRV_03 +946 0x0000 //TX_AMS_RESRV_04 +947 0x0000 //TX_AMS_RESRV_05 +948 0x0000 //TX_AMS_RESRV_06 +949 0x0000 //TX_AMS_RESRV_07 +950 0x0000 //TX_AMS_RESRV_08 +951 0x0000 //TX_AMS_RESRV_09 +952 0x0000 //TX_AMS_RESRV_10 +953 0x0000 //TX_AMS_RESRV_11 +954 0x0000 //TX_AMS_RESRV_12 +955 0x0000 //TX_AMS_RESRV_13 +956 0x0000 //TX_AMS_RESRV_14 +957 0x0000 //TX_AMS_RESRV_15 +958 0x0000 //TX_AMS_RESRV_16 +959 0x0000 //TX_AMS_RESRV_17 +960 0x0000 //TX_AMS_RESRV_18 +961 0x0000 //TX_AMS_RESRV_19 #RX -0 0x006C //RX_RECVFUNC_MODE_0 +0 0x206C //RX_RECVFUNC_MODE_0 1 0x0000 //RX_RECVFUNC_MODE_1 2 0x0000 //RX_SAMPLINGFREQ_SIG 3 0x0000 //RX_SAMPLINGFREQ_PROC @@ -31556,10 +47211,862 @@ 110 0x0000 //RX_FDDRC_RESRV_0 129 0x0100 //RX_SPK_VOL 130 0x0000 //RX_VOL_RESRV_0 +#RX 2 +157 0x206C //RX_RECVFUNC_MODE_0 +158 0x0000 //RX_RECVFUNC_MODE_1 +159 0x0000 //RX_SAMPLINGFREQ_SIG +160 0x0000 //RX_SAMPLINGFREQ_PROC +161 0x000A //RX_FRAME_SZ +162 0x0000 //RX_DELAY_OPT +163 0x3000 //RX_TDDRC_ALPHA_UP_1 +164 0x3000 //RX_TDDRC_ALPHA_UP_2 +165 0x3000 //RX_TDDRC_ALPHA_UP_3 +166 0x3000 //RX_TDDRC_ALPHA_UP_4 +167 0x0800 //RX_PGA +168 0x7FFF //RX_A_HP +169 0x0000 //RX_B_PE +170 0x3800 //RX_THR_PITCH_DET_0 +171 0x3000 //RX_THR_PITCH_DET_1 +172 0x2800 //RX_THR_PITCH_DET_2 +173 0x0008 //RX_PITCH_BFR_LEN +174 0x0003 //RX_SBD_PITCH_DET +175 0x0100 //RX_PP_RESRV_0 +176 0x0020 //RX_PP_RESRV_1 +177 0x0600 //RX_N_SN_EST +178 0x000C //RX_N2_SN_EST +179 0x0010 //RX_NS_LVL_CTRL +180 0xF800 //RX_THR_SN_EST +181 0x7CCD //RX_LAMBDA_PFILT +182 0x000A //RX_FENS_RESRV_0 +183 0x0190 //RX_FENS_RESRV_1 +184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +187 0x0002 //RX_EXTRA_NS_L +188 0x0800 //RX_EXTRA_NS_A +189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +190 0x7FFF //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +192 0x199A //RX_A_POST_FLT +193 0x0000 //RX_LMT_THRD +194 0x4000 //RX_LMT_ALPHA +195 0x0014 //RX_FDEQ_SUBNUM +196 0x4848 //RX_FDEQ_GAIN_0 +197 0x4848 //RX_FDEQ_GAIN_1 +198 0x4848 //RX_FDEQ_GAIN_2 +199 0x4848 //RX_FDEQ_GAIN_3 +200 0x4848 //RX_FDEQ_GAIN_4 +201 0x4848 //RX_FDEQ_GAIN_5 +202 0x4444 //RX_FDEQ_GAIN_6 +203 0x4040 //RX_FDEQ_GAIN_7 +204 0x4040 //RX_FDEQ_GAIN_8 +205 0x4040 //RX_FDEQ_GAIN_9 +206 0x4848 //RX_FDEQ_GAIN_10 +207 0x4848 //RX_FDEQ_GAIN_11 +208 0x4848 //RX_FDEQ_GAIN_12 +209 0x4848 //RX_FDEQ_GAIN_13 +210 0x4848 //RX_FDEQ_GAIN_14 +211 0x4848 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0202 //RX_FDEQ_BIN_0 +221 0x0203 //RX_FDEQ_BIN_1 +222 0x0303 //RX_FDEQ_BIN_2 +223 0x0304 //RX_FDEQ_BIN_3 +224 0x0405 //RX_FDEQ_BIN_4 +225 0x0506 //RX_FDEQ_BIN_5 +226 0x0708 //RX_FDEQ_BIN_6 +227 0x090A //RX_FDEQ_BIN_7 +228 0x0B0C //RX_FDEQ_BIN_8 +229 0x0D0E //RX_FDEQ_BIN_9 +230 0x0000 //RX_FDEQ_BIN_10 +231 0x0000 //RX_FDEQ_BIN_11 +232 0x0000 //RX_FDEQ_BIN_12 +233 0x0000 //RX_FDEQ_BIN_13 +234 0x0000 //RX_FDEQ_BIN_14 +235 0x0000 //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x4000 //RX_FDEQ_RESRV_0 +245 0x0320 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0030 //RX_FDDRC_BAND_MARGIN_1 +248 0x0050 //RX_FDDRC_BAND_MARGIN_2 +249 0x0080 //RX_FDDRC_BAND_MARGIN_3 +250 0x0007 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x5000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x6400 //RX_FDDRC_THRD_3_2 +258 0x6400 //RX_FDDRC_THRD_3_3 +259 0x2000 //RX_FDDRC_SLANT_0_0 +260 0x2000 //RX_FDDRC_SLANT_0_1 +261 0x2000 //RX_FDDRC_SLANT_0_2 +262 0x2000 //RX_FDDRC_SLANT_0_3 +263 0x5333 //RX_FDDRC_SLANT_1_0 +264 0x5333 //RX_FDDRC_SLANT_1_1 +265 0x5333 //RX_FDDRC_SLANT_1_2 +266 0x5333 //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +268 0x0000 //RX_FILTINDX +269 0x0000 //RX_TDDRC_THRD_0 +270 0x0000 //RX_TDDRC_THRD_1 +271 0x7FFF //RX_TDDRC_THRD_2 +272 0x7FFF //RX_TDDRC_THRD_3 +273 0x7FFF //RX_TDDRC_SLANT_0 +274 0x7EB8 //RX_TDDRC_SLANT_1 +275 0x3000 //RX_TDDRC_ALPHA_UP_0 +276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x199A //RX_TDDRC_HMNC_GAIN +279 0x0001 //RX_TDDRC_SMT_FLAG +280 0x0CCD //RX_TDDRC_SMT_W +281 0x017F //RX_TDDRC_DRC_GAIN +282 0x7C00 //RX_LAMBDA_PKA_FP +283 0x2000 //RX_TPKA_FP +284 0x2000 //RX_MIN_G_FP +285 0x0080 //RX_MAX_G_FP +286 0x0100 //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 +288 0x0000 //RX_MAXLEVEL_CNG +289 0x3000 //RX_BWE_UV_TH +290 0x3000 //RX_BWE_UV_TH2 +291 0x1800 //RX_BWE_UV_TH3 +292 0x1000 //RX_BWE_V_TH +293 0x04CD //RX_BWE_GAIN1_V_TH1 +294 0x0F33 //RX_BWE_GAIN1_V_TH2 +295 0x7333 //RX_BWE_UV_EQ +296 0x199A //RX_BWE_V_EQ +297 0x7333 //RX_BWE_TONE_TH +298 0x0004 //RX_BWE_UV_HOLD_T +299 0x6CCD //RX_BWE_GAIN2_ALPHA +300 0x799A //RX_BWE_GAIN3_ALPHA +301 0x001E //RX_BWE_CUTOFF +302 0x3000 //RX_BWE_GAINFILL +303 0x3200 //RX_BWE_MAXTH_TONE +304 0x2000 //RX_BWE_EQ_0 +305 0x2000 //RX_BWE_EQ_1 +306 0x2000 //RX_BWE_EQ_2 +307 0x2000 //RX_BWE_EQ_3 +308 0x2000 //RX_BWE_EQ_4 +309 0x2000 //RX_BWE_EQ_5 +310 0x2000 //RX_BWE_EQ_6 +311 0x0000 //RX_BWE_RESRV_0 +312 0x0000 //RX_BWE_RESRV_1 +313 0x0000 //RX_BWE_RESRV_2 +#VOL 0 +163 0x3000 //RX_TDDRC_ALPHA_UP_1 +164 0x3000 //RX_TDDRC_ALPHA_UP_2 +165 0x3000 //RX_TDDRC_ALPHA_UP_3 +166 0x3000 //RX_TDDRC_ALPHA_UP_4 +184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +190 0x7FFF //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +269 0x0000 //RX_TDDRC_THRD_0 +270 0x0000 //RX_TDDRC_THRD_1 +271 0x7FFF //RX_TDDRC_THRD_2 +272 0x7FFF //RX_TDDRC_THRD_3 +273 0x7FFF //RX_TDDRC_SLANT_0 +274 0x7EB8 //RX_TDDRC_SLANT_1 +275 0x3000 //RX_TDDRC_ALPHA_UP_0 +276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x199A //RX_TDDRC_HMNC_GAIN +279 0x0001 //RX_TDDRC_SMT_FLAG +280 0x0CCD //RX_TDDRC_SMT_W +281 0x017F //RX_TDDRC_DRC_GAIN +195 0x0014 //RX_FDEQ_SUBNUM +196 0x4848 //RX_FDEQ_GAIN_0 +197 0x4848 //RX_FDEQ_GAIN_1 +198 0x4848 //RX_FDEQ_GAIN_2 +199 0x4848 //RX_FDEQ_GAIN_3 +200 0x4848 //RX_FDEQ_GAIN_4 +201 0x4848 //RX_FDEQ_GAIN_5 +202 0x4444 //RX_FDEQ_GAIN_6 +203 0x4040 //RX_FDEQ_GAIN_7 +204 0x4040 //RX_FDEQ_GAIN_8 +205 0x4040 //RX_FDEQ_GAIN_9 +206 0x4848 //RX_FDEQ_GAIN_10 +207 0x4848 //RX_FDEQ_GAIN_11 +208 0x4848 //RX_FDEQ_GAIN_12 +209 0x4848 //RX_FDEQ_GAIN_13 +210 0x4848 //RX_FDEQ_GAIN_14 +211 0x4848 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0202 //RX_FDEQ_BIN_0 +221 0x0203 //RX_FDEQ_BIN_1 +222 0x0303 //RX_FDEQ_BIN_2 +223 0x0304 //RX_FDEQ_BIN_3 +224 0x0405 //RX_FDEQ_BIN_4 +225 0x0506 //RX_FDEQ_BIN_5 +226 0x0708 //RX_FDEQ_BIN_6 +227 0x090A //RX_FDEQ_BIN_7 +228 0x0B0C //RX_FDEQ_BIN_8 +229 0x0D0E //RX_FDEQ_BIN_9 +230 0x0000 //RX_FDEQ_BIN_10 +231 0x0000 //RX_FDEQ_BIN_11 +232 0x0000 //RX_FDEQ_BIN_12 +233 0x0000 //RX_FDEQ_BIN_13 +234 0x0000 //RX_FDEQ_BIN_14 +235 0x0000 //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x4000 //RX_FDEQ_RESRV_0 +245 0x0320 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0030 //RX_FDDRC_BAND_MARGIN_1 +248 0x0050 //RX_FDDRC_BAND_MARGIN_2 +249 0x0080 //RX_FDDRC_BAND_MARGIN_3 +250 0x0007 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x5000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x6400 //RX_FDDRC_THRD_3_2 +258 0x6400 //RX_FDDRC_THRD_3_3 +259 0x2000 //RX_FDDRC_SLANT_0_0 +260 0x2000 //RX_FDDRC_SLANT_0_1 +261 0x2000 //RX_FDDRC_SLANT_0_2 +262 0x2000 //RX_FDDRC_SLANT_0_3 +263 0x5333 //RX_FDDRC_SLANT_1_0 +264 0x5333 //RX_FDDRC_SLANT_1_1 +265 0x5333 //RX_FDDRC_SLANT_1_2 +266 0x5333 //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +286 0x0100 //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 +#VOL 1 +163 0x3000 //RX_TDDRC_ALPHA_UP_1 +164 0x3000 //RX_TDDRC_ALPHA_UP_2 +165 0x3000 //RX_TDDRC_ALPHA_UP_3 +166 0x3000 //RX_TDDRC_ALPHA_UP_4 +184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +190 0x7FFF //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +269 0x0000 //RX_TDDRC_THRD_0 +270 0x0000 //RX_TDDRC_THRD_1 +271 0x7FFF //RX_TDDRC_THRD_2 +272 0x7FFF //RX_TDDRC_THRD_3 +273 0x7FFF //RX_TDDRC_SLANT_0 +274 0x7EB8 //RX_TDDRC_SLANT_1 +275 0x3000 //RX_TDDRC_ALPHA_UP_0 +276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x199A //RX_TDDRC_HMNC_GAIN +279 0x0001 //RX_TDDRC_SMT_FLAG +280 0x0CCD //RX_TDDRC_SMT_W +281 0x017F //RX_TDDRC_DRC_GAIN +195 0x0014 //RX_FDEQ_SUBNUM +196 0x4848 //RX_FDEQ_GAIN_0 +197 0x4848 //RX_FDEQ_GAIN_1 +198 0x4848 //RX_FDEQ_GAIN_2 +199 0x4848 //RX_FDEQ_GAIN_3 +200 0x4848 //RX_FDEQ_GAIN_4 +201 0x4848 //RX_FDEQ_GAIN_5 +202 0x4444 //RX_FDEQ_GAIN_6 +203 0x4040 //RX_FDEQ_GAIN_7 +204 0x4040 //RX_FDEQ_GAIN_8 +205 0x4040 //RX_FDEQ_GAIN_9 +206 0x4848 //RX_FDEQ_GAIN_10 +207 0x4848 //RX_FDEQ_GAIN_11 +208 0x4848 //RX_FDEQ_GAIN_12 +209 0x4848 //RX_FDEQ_GAIN_13 +210 0x4848 //RX_FDEQ_GAIN_14 +211 0x4848 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0202 //RX_FDEQ_BIN_0 +221 0x0203 //RX_FDEQ_BIN_1 +222 0x0303 //RX_FDEQ_BIN_2 +223 0x0304 //RX_FDEQ_BIN_3 +224 0x0405 //RX_FDEQ_BIN_4 +225 0x0506 //RX_FDEQ_BIN_5 +226 0x0708 //RX_FDEQ_BIN_6 +227 0x090A //RX_FDEQ_BIN_7 +228 0x0B0C //RX_FDEQ_BIN_8 +229 0x0D0E //RX_FDEQ_BIN_9 +230 0x0000 //RX_FDEQ_BIN_10 +231 0x0000 //RX_FDEQ_BIN_11 +232 0x0000 //RX_FDEQ_BIN_12 +233 0x0000 //RX_FDEQ_BIN_13 +234 0x0000 //RX_FDEQ_BIN_14 +235 0x0000 //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x4000 //RX_FDEQ_RESRV_0 +245 0x0320 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0030 //RX_FDDRC_BAND_MARGIN_1 +248 0x0050 //RX_FDDRC_BAND_MARGIN_2 +249 0x0080 //RX_FDDRC_BAND_MARGIN_3 +250 0x0007 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x5000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x6400 //RX_FDDRC_THRD_3_2 +258 0x6400 //RX_FDDRC_THRD_3_3 +259 0x2000 //RX_FDDRC_SLANT_0_0 +260 0x2000 //RX_FDDRC_SLANT_0_1 +261 0x2000 //RX_FDDRC_SLANT_0_2 +262 0x2000 //RX_FDDRC_SLANT_0_3 +263 0x5333 //RX_FDDRC_SLANT_1_0 +264 0x5333 //RX_FDDRC_SLANT_1_1 +265 0x5333 //RX_FDDRC_SLANT_1_2 +266 0x5333 //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +286 0x0100 //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 +#VOL 2 +163 0x3000 //RX_TDDRC_ALPHA_UP_1 +164 0x3000 //RX_TDDRC_ALPHA_UP_2 +165 0x3000 //RX_TDDRC_ALPHA_UP_3 +166 0x3000 //RX_TDDRC_ALPHA_UP_4 +184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +190 0x7FFF //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +269 0x0000 //RX_TDDRC_THRD_0 +270 0x0000 //RX_TDDRC_THRD_1 +271 0x7FFF //RX_TDDRC_THRD_2 +272 0x7FFF //RX_TDDRC_THRD_3 +273 0x7FFF //RX_TDDRC_SLANT_0 +274 0x7EB8 //RX_TDDRC_SLANT_1 +275 0x3000 //RX_TDDRC_ALPHA_UP_0 +276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x199A //RX_TDDRC_HMNC_GAIN +279 0x0001 //RX_TDDRC_SMT_FLAG +280 0x0CCD //RX_TDDRC_SMT_W +281 0x017F //RX_TDDRC_DRC_GAIN +195 0x0014 //RX_FDEQ_SUBNUM +196 0x4848 //RX_FDEQ_GAIN_0 +197 0x4848 //RX_FDEQ_GAIN_1 +198 0x4848 //RX_FDEQ_GAIN_2 +199 0x4848 //RX_FDEQ_GAIN_3 +200 0x4848 //RX_FDEQ_GAIN_4 +201 0x4848 //RX_FDEQ_GAIN_5 +202 0x4444 //RX_FDEQ_GAIN_6 +203 0x4040 //RX_FDEQ_GAIN_7 +204 0x4040 //RX_FDEQ_GAIN_8 +205 0x4040 //RX_FDEQ_GAIN_9 +206 0x4848 //RX_FDEQ_GAIN_10 +207 0x4848 //RX_FDEQ_GAIN_11 +208 0x4848 //RX_FDEQ_GAIN_12 +209 0x4848 //RX_FDEQ_GAIN_13 +210 0x4848 //RX_FDEQ_GAIN_14 +211 0x4848 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0202 //RX_FDEQ_BIN_0 +221 0x0203 //RX_FDEQ_BIN_1 +222 0x0303 //RX_FDEQ_BIN_2 +223 0x0304 //RX_FDEQ_BIN_3 +224 0x0405 //RX_FDEQ_BIN_4 +225 0x0506 //RX_FDEQ_BIN_5 +226 0x0708 //RX_FDEQ_BIN_6 +227 0x090A //RX_FDEQ_BIN_7 +228 0x0B0C //RX_FDEQ_BIN_8 +229 0x0D0E //RX_FDEQ_BIN_9 +230 0x0000 //RX_FDEQ_BIN_10 +231 0x0000 //RX_FDEQ_BIN_11 +232 0x0000 //RX_FDEQ_BIN_12 +233 0x0000 //RX_FDEQ_BIN_13 +234 0x0000 //RX_FDEQ_BIN_14 +235 0x0000 //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x4000 //RX_FDEQ_RESRV_0 +245 0x0320 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0030 //RX_FDDRC_BAND_MARGIN_1 +248 0x0050 //RX_FDDRC_BAND_MARGIN_2 +249 0x0080 //RX_FDDRC_BAND_MARGIN_3 +250 0x0007 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x5000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x6400 //RX_FDDRC_THRD_3_2 +258 0x6400 //RX_FDDRC_THRD_3_3 +259 0x2000 //RX_FDDRC_SLANT_0_0 +260 0x2000 //RX_FDDRC_SLANT_0_1 +261 0x2000 //RX_FDDRC_SLANT_0_2 +262 0x2000 //RX_FDDRC_SLANT_0_3 +263 0x5333 //RX_FDDRC_SLANT_1_0 +264 0x5333 //RX_FDDRC_SLANT_1_1 +265 0x5333 //RX_FDDRC_SLANT_1_2 +266 0x5333 //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +286 0x0100 //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 +#VOL 3 +163 0x3000 //RX_TDDRC_ALPHA_UP_1 +164 0x3000 //RX_TDDRC_ALPHA_UP_2 +165 0x3000 //RX_TDDRC_ALPHA_UP_3 +166 0x3000 //RX_TDDRC_ALPHA_UP_4 +184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +190 0x7FFF //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +269 0x0000 //RX_TDDRC_THRD_0 +270 0x0000 //RX_TDDRC_THRD_1 +271 0x7FFF //RX_TDDRC_THRD_2 +272 0x7FFF //RX_TDDRC_THRD_3 +273 0x7FFF //RX_TDDRC_SLANT_0 +274 0x7EB8 //RX_TDDRC_SLANT_1 +275 0x3000 //RX_TDDRC_ALPHA_UP_0 +276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x199A //RX_TDDRC_HMNC_GAIN +279 0x0001 //RX_TDDRC_SMT_FLAG +280 0x0CCD //RX_TDDRC_SMT_W +281 0x017F //RX_TDDRC_DRC_GAIN +195 0x0014 //RX_FDEQ_SUBNUM +196 0x4848 //RX_FDEQ_GAIN_0 +197 0x4848 //RX_FDEQ_GAIN_1 +198 0x4848 //RX_FDEQ_GAIN_2 +199 0x4848 //RX_FDEQ_GAIN_3 +200 0x4848 //RX_FDEQ_GAIN_4 +201 0x4848 //RX_FDEQ_GAIN_5 +202 0x4444 //RX_FDEQ_GAIN_6 +203 0x4040 //RX_FDEQ_GAIN_7 +204 0x4040 //RX_FDEQ_GAIN_8 +205 0x4040 //RX_FDEQ_GAIN_9 +206 0x4848 //RX_FDEQ_GAIN_10 +207 0x4848 //RX_FDEQ_GAIN_11 +208 0x4848 //RX_FDEQ_GAIN_12 +209 0x4848 //RX_FDEQ_GAIN_13 +210 0x4848 //RX_FDEQ_GAIN_14 +211 0x4848 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0202 //RX_FDEQ_BIN_0 +221 0x0203 //RX_FDEQ_BIN_1 +222 0x0303 //RX_FDEQ_BIN_2 +223 0x0304 //RX_FDEQ_BIN_3 +224 0x0405 //RX_FDEQ_BIN_4 +225 0x0506 //RX_FDEQ_BIN_5 +226 0x0708 //RX_FDEQ_BIN_6 +227 0x090A //RX_FDEQ_BIN_7 +228 0x0B0C //RX_FDEQ_BIN_8 +229 0x0D0E //RX_FDEQ_BIN_9 +230 0x0000 //RX_FDEQ_BIN_10 +231 0x0000 //RX_FDEQ_BIN_11 +232 0x0000 //RX_FDEQ_BIN_12 +233 0x0000 //RX_FDEQ_BIN_13 +234 0x0000 //RX_FDEQ_BIN_14 +235 0x0000 //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x4000 //RX_FDEQ_RESRV_0 +245 0x0320 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0030 //RX_FDDRC_BAND_MARGIN_1 +248 0x0050 //RX_FDDRC_BAND_MARGIN_2 +249 0x0080 //RX_FDDRC_BAND_MARGIN_3 +250 0x0007 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x5000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x6400 //RX_FDDRC_THRD_3_2 +258 0x6400 //RX_FDDRC_THRD_3_3 +259 0x2000 //RX_FDDRC_SLANT_0_0 +260 0x2000 //RX_FDDRC_SLANT_0_1 +261 0x2000 //RX_FDDRC_SLANT_0_2 +262 0x2000 //RX_FDDRC_SLANT_0_3 +263 0x5333 //RX_FDDRC_SLANT_1_0 +264 0x5333 //RX_FDDRC_SLANT_1_1 +265 0x5333 //RX_FDDRC_SLANT_1_2 +266 0x5333 //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +286 0x0100 //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 +#VOL 4 +163 0x3000 //RX_TDDRC_ALPHA_UP_1 +164 0x3000 //RX_TDDRC_ALPHA_UP_2 +165 0x3000 //RX_TDDRC_ALPHA_UP_3 +166 0x3000 //RX_TDDRC_ALPHA_UP_4 +184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +190 0x7FFF //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +269 0x0000 //RX_TDDRC_THRD_0 +270 0x0000 //RX_TDDRC_THRD_1 +271 0x7FFF //RX_TDDRC_THRD_2 +272 0x7FFF //RX_TDDRC_THRD_3 +273 0x7FFF //RX_TDDRC_SLANT_0 +274 0x7EB8 //RX_TDDRC_SLANT_1 +275 0x3000 //RX_TDDRC_ALPHA_UP_0 +276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x199A //RX_TDDRC_HMNC_GAIN +279 0x0001 //RX_TDDRC_SMT_FLAG +280 0x0CCD //RX_TDDRC_SMT_W +281 0x017F //RX_TDDRC_DRC_GAIN +195 0x0014 //RX_FDEQ_SUBNUM +196 0x4848 //RX_FDEQ_GAIN_0 +197 0x4848 //RX_FDEQ_GAIN_1 +198 0x4848 //RX_FDEQ_GAIN_2 +199 0x4848 //RX_FDEQ_GAIN_3 +200 0x4848 //RX_FDEQ_GAIN_4 +201 0x4848 //RX_FDEQ_GAIN_5 +202 0x4444 //RX_FDEQ_GAIN_6 +203 0x4040 //RX_FDEQ_GAIN_7 +204 0x4040 //RX_FDEQ_GAIN_8 +205 0x4040 //RX_FDEQ_GAIN_9 +206 0x4848 //RX_FDEQ_GAIN_10 +207 0x4848 //RX_FDEQ_GAIN_11 +208 0x4848 //RX_FDEQ_GAIN_12 +209 0x4848 //RX_FDEQ_GAIN_13 +210 0x4848 //RX_FDEQ_GAIN_14 +211 0x4848 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0202 //RX_FDEQ_BIN_0 +221 0x0203 //RX_FDEQ_BIN_1 +222 0x0303 //RX_FDEQ_BIN_2 +223 0x0304 //RX_FDEQ_BIN_3 +224 0x0405 //RX_FDEQ_BIN_4 +225 0x0506 //RX_FDEQ_BIN_5 +226 0x0708 //RX_FDEQ_BIN_6 +227 0x090A //RX_FDEQ_BIN_7 +228 0x0B0C //RX_FDEQ_BIN_8 +229 0x0D0E //RX_FDEQ_BIN_9 +230 0x0000 //RX_FDEQ_BIN_10 +231 0x0000 //RX_FDEQ_BIN_11 +232 0x0000 //RX_FDEQ_BIN_12 +233 0x0000 //RX_FDEQ_BIN_13 +234 0x0000 //RX_FDEQ_BIN_14 +235 0x0000 //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x4000 //RX_FDEQ_RESRV_0 +245 0x0320 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0030 //RX_FDDRC_BAND_MARGIN_1 +248 0x0050 //RX_FDDRC_BAND_MARGIN_2 +249 0x0080 //RX_FDDRC_BAND_MARGIN_3 +250 0x0007 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x5000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x6400 //RX_FDDRC_THRD_3_2 +258 0x6400 //RX_FDDRC_THRD_3_3 +259 0x2000 //RX_FDDRC_SLANT_0_0 +260 0x2000 //RX_FDDRC_SLANT_0_1 +261 0x2000 //RX_FDDRC_SLANT_0_2 +262 0x2000 //RX_FDDRC_SLANT_0_3 +263 0x5333 //RX_FDDRC_SLANT_1_0 +264 0x5333 //RX_FDDRC_SLANT_1_1 +265 0x5333 //RX_FDDRC_SLANT_1_2 +266 0x5333 //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +286 0x0100 //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 +#VOL 5 +163 0x3000 //RX_TDDRC_ALPHA_UP_1 +164 0x3000 //RX_TDDRC_ALPHA_UP_2 +165 0x3000 //RX_TDDRC_ALPHA_UP_3 +166 0x3000 //RX_TDDRC_ALPHA_UP_4 +184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +190 0x7FFF //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +269 0x0000 //RX_TDDRC_THRD_0 +270 0x0000 //RX_TDDRC_THRD_1 +271 0x7FFF //RX_TDDRC_THRD_2 +272 0x7FFF //RX_TDDRC_THRD_3 +273 0x7FFF //RX_TDDRC_SLANT_0 +274 0x7EB8 //RX_TDDRC_SLANT_1 +275 0x3000 //RX_TDDRC_ALPHA_UP_0 +276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x199A //RX_TDDRC_HMNC_GAIN +279 0x0001 //RX_TDDRC_SMT_FLAG +280 0x0CCD //RX_TDDRC_SMT_W +281 0x017F //RX_TDDRC_DRC_GAIN +195 0x0014 //RX_FDEQ_SUBNUM +196 0x4848 //RX_FDEQ_GAIN_0 +197 0x4848 //RX_FDEQ_GAIN_1 +198 0x4848 //RX_FDEQ_GAIN_2 +199 0x4848 //RX_FDEQ_GAIN_3 +200 0x4848 //RX_FDEQ_GAIN_4 +201 0x4848 //RX_FDEQ_GAIN_5 +202 0x4444 //RX_FDEQ_GAIN_6 +203 0x4040 //RX_FDEQ_GAIN_7 +204 0x4040 //RX_FDEQ_GAIN_8 +205 0x4040 //RX_FDEQ_GAIN_9 +206 0x4848 //RX_FDEQ_GAIN_10 +207 0x4848 //RX_FDEQ_GAIN_11 +208 0x4848 //RX_FDEQ_GAIN_12 +209 0x4848 //RX_FDEQ_GAIN_13 +210 0x4848 //RX_FDEQ_GAIN_14 +211 0x4848 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0202 //RX_FDEQ_BIN_0 +221 0x0203 //RX_FDEQ_BIN_1 +222 0x0303 //RX_FDEQ_BIN_2 +223 0x0304 //RX_FDEQ_BIN_3 +224 0x0405 //RX_FDEQ_BIN_4 +225 0x0506 //RX_FDEQ_BIN_5 +226 0x0708 //RX_FDEQ_BIN_6 +227 0x090A //RX_FDEQ_BIN_7 +228 0x0B0C //RX_FDEQ_BIN_8 +229 0x0D0E //RX_FDEQ_BIN_9 +230 0x0000 //RX_FDEQ_BIN_10 +231 0x0000 //RX_FDEQ_BIN_11 +232 0x0000 //RX_FDEQ_BIN_12 +233 0x0000 //RX_FDEQ_BIN_13 +234 0x0000 //RX_FDEQ_BIN_14 +235 0x0000 //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x4000 //RX_FDEQ_RESRV_0 +245 0x0320 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0030 //RX_FDDRC_BAND_MARGIN_1 +248 0x0050 //RX_FDDRC_BAND_MARGIN_2 +249 0x0080 //RX_FDDRC_BAND_MARGIN_3 +250 0x0007 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x5000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x6400 //RX_FDDRC_THRD_3_2 +258 0x6400 //RX_FDDRC_THRD_3_3 +259 0x2000 //RX_FDDRC_SLANT_0_0 +260 0x2000 //RX_FDDRC_SLANT_0_1 +261 0x2000 //RX_FDDRC_SLANT_0_2 +262 0x2000 //RX_FDDRC_SLANT_0_3 +263 0x5333 //RX_FDDRC_SLANT_1_0 +264 0x5333 //RX_FDDRC_SLANT_1_1 +265 0x5333 //RX_FDDRC_SLANT_1_2 +266 0x5333 //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +286 0x0100 //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 +#VOL 6 +163 0x3000 //RX_TDDRC_ALPHA_UP_1 +164 0x3000 //RX_TDDRC_ALPHA_UP_2 +165 0x3000 //RX_TDDRC_ALPHA_UP_3 +166 0x3000 //RX_TDDRC_ALPHA_UP_4 +184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +190 0x7FFF //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +269 0x0000 //RX_TDDRC_THRD_0 +270 0x0000 //RX_TDDRC_THRD_1 +271 0x7FFF //RX_TDDRC_THRD_2 +272 0x7FFF //RX_TDDRC_THRD_3 +273 0x7FFF //RX_TDDRC_SLANT_0 +274 0x7EB8 //RX_TDDRC_SLANT_1 +275 0x3000 //RX_TDDRC_ALPHA_UP_0 +276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x199A //RX_TDDRC_HMNC_GAIN +279 0x0001 //RX_TDDRC_SMT_FLAG +280 0x0CCD //RX_TDDRC_SMT_W +281 0x017F //RX_TDDRC_DRC_GAIN +195 0x0014 //RX_FDEQ_SUBNUM +196 0x4848 //RX_FDEQ_GAIN_0 +197 0x4848 //RX_FDEQ_GAIN_1 +198 0x4848 //RX_FDEQ_GAIN_2 +199 0x4848 //RX_FDEQ_GAIN_3 +200 0x4848 //RX_FDEQ_GAIN_4 +201 0x4848 //RX_FDEQ_GAIN_5 +202 0x4444 //RX_FDEQ_GAIN_6 +203 0x4040 //RX_FDEQ_GAIN_7 +204 0x4040 //RX_FDEQ_GAIN_8 +205 0x4040 //RX_FDEQ_GAIN_9 +206 0x4848 //RX_FDEQ_GAIN_10 +207 0x4848 //RX_FDEQ_GAIN_11 +208 0x4848 //RX_FDEQ_GAIN_12 +209 0x4848 //RX_FDEQ_GAIN_13 +210 0x4848 //RX_FDEQ_GAIN_14 +211 0x4848 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0202 //RX_FDEQ_BIN_0 +221 0x0203 //RX_FDEQ_BIN_1 +222 0x0303 //RX_FDEQ_BIN_2 +223 0x0304 //RX_FDEQ_BIN_3 +224 0x0405 //RX_FDEQ_BIN_4 +225 0x0506 //RX_FDEQ_BIN_5 +226 0x0708 //RX_FDEQ_BIN_6 +227 0x090A //RX_FDEQ_BIN_7 +228 0x0B0C //RX_FDEQ_BIN_8 +229 0x0D0E //RX_FDEQ_BIN_9 +230 0x0000 //RX_FDEQ_BIN_10 +231 0x0000 //RX_FDEQ_BIN_11 +232 0x0000 //RX_FDEQ_BIN_12 +233 0x0000 //RX_FDEQ_BIN_13 +234 0x0000 //RX_FDEQ_BIN_14 +235 0x0000 //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x4000 //RX_FDEQ_RESRV_0 +245 0x0320 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0030 //RX_FDDRC_BAND_MARGIN_1 +248 0x0050 //RX_FDDRC_BAND_MARGIN_2 +249 0x0080 //RX_FDDRC_BAND_MARGIN_3 +250 0x0007 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x5000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x6400 //RX_FDDRC_THRD_3_2 +258 0x6400 //RX_FDDRC_THRD_3_3 +259 0x2000 //RX_FDDRC_SLANT_0_0 +260 0x2000 //RX_FDDRC_SLANT_0_1 +261 0x2000 //RX_FDDRC_SLANT_0_2 +262 0x2000 //RX_FDDRC_SLANT_0_3 +263 0x5333 //RX_FDDRC_SLANT_1_0 +264 0x5333 //RX_FDDRC_SLANT_1_1 +265 0x5333 //RX_FDDRC_SLANT_1_2 +266 0x5333 //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +286 0x0100 //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 #CASE_NAME BLUETOOTH-BTWB_NREC-VOICE_GENERIC-WB -#PARAM_TYPE TX+RX -#TOTAL_CUSTOM_STEP 7 +#PARAM_MODE Full +#PARAM_TYPE TX+2RX +#TOTAL_CUSTOM_STEP 7+7 #TX 0 0x0008 //TX_OPERATION_MODE_0 1 0x0008 //TX_OPERATION_MODE_1 @@ -31812,20 +48319,20 @@ 248 0xF400 //TX_THR_SN_EST_6 249 0xF600 //TX_THR_SN_EST_7 250 0x0000 //TX_DELTA_THR_SN_EST_0 -251 0x0000 //TX_DELTA_THR_SN_EST_1 +251 0x0200 //TX_DELTA_THR_SN_EST_1 252 0x0200 //TX_DELTA_THR_SN_EST_2 253 0x0200 //TX_DELTA_THR_SN_EST_3 254 0x0200 //TX_DELTA_THR_SN_EST_4 255 0x0200 //TX_DELTA_THR_SN_EST_5 -256 0x0200 //TX_DELTA_THR_SN_EST_6 +256 0x0000 //TX_DELTA_THR_SN_EST_6 257 0x0200 //TX_DELTA_THR_SN_EST_7 258 0x6000 //TX_LAMBDA_NN_EST_0 -259 0x6000 //TX_LAMBDA_NN_EST_1 +259 0x4000 //TX_LAMBDA_NN_EST_1 260 0x4000 //TX_LAMBDA_NN_EST_2 261 0x4000 //TX_LAMBDA_NN_EST_3 262 0x4000 //TX_LAMBDA_NN_EST_4 263 0x4000 //TX_LAMBDA_NN_EST_5 -264 0x4000 //TX_LAMBDA_NN_EST_6 +264 0x6000 //TX_LAMBDA_NN_EST_6 265 0x4000 //TX_LAMBDA_NN_EST_7 266 0x0400 //TX_N_SN_EST 267 0x001E //TX_INBEAM_T @@ -31843,16 +48350,16 @@ 279 0x1000 //TX_B_POST_FLT_0 280 0x1000 //TX_B_POST_FLT_1 281 0x000F //TX_NS_LVL_CTRL_0 -282 0x000F //TX_NS_LVL_CTRL_1 -283 0x0011 //TX_NS_LVL_CTRL_2 +282 0x0011 //TX_NS_LVL_CTRL_1 +283 0x000F //TX_NS_LVL_CTRL_2 284 0x000F //TX_NS_LVL_CTRL_3 285 0x000F //TX_NS_LVL_CTRL_4 286 0x000F //TX_NS_LVL_CTRL_5 287 0x000F //TX_NS_LVL_CTRL_6 288 0x0011 //TX_NS_LVL_CTRL_7 289 0x000C //TX_MIN_GAIN_S_0 -290 0x000C //TX_MIN_GAIN_S_1 -291 0x000F //TX_MIN_GAIN_S_2 +290 0x000F //TX_MIN_GAIN_S_1 +291 0x000C //TX_MIN_GAIN_S_2 292 0x000C //TX_MIN_GAIN_S_3 293 0x000C //TX_MIN_GAIN_S_4 294 0x000C //TX_MIN_GAIN_S_5 @@ -31876,12 +48383,12 @@ 312 0x7FFF //TX_A_POST_FILT_0 313 0x2000 //TX_A_POST_FILT_1 314 0x4000 //TX_A_POST_FILT_S_0 -315 0x4000 //TX_A_POST_FILT_S_1 +315 0x5000 //TX_A_POST_FILT_S_1 316 0x5000 //TX_A_POST_FILT_S_2 317 0x5000 //TX_A_POST_FILT_S_3 318 0x5000 //TX_A_POST_FILT_S_4 319 0x5000 //TX_A_POST_FILT_S_5 -320 0x5000 //TX_A_POST_FILT_S_6 +320 0x4000 //TX_A_POST_FILT_S_6 321 0x5000 //TX_A_POST_FILT_S_7 322 0x1000 //TX_B_POST_FILT_0 323 0x1000 //TX_B_POST_FILT_1 @@ -31941,10 +48448,10 @@ 377 0x7FFF //TX_NOISE_TH_5_4 378 0x044C //TX_NOISE_TH_6 379 0x0014 //TX_MINENOISE_TH -380 0x4000 //TX_MINENOISE_MIC0_TH_MTS -381 0xFFEE //TX_MINENOISE_MIC0_TH_EXP -382 0x6000 //TX_MINENOISE_MIC0_S_TH_MTS -383 0xFFF3 //TX_MINENOISE_MIC0_S_TH_EXP +380 0x4000 //TX_MORENS_TFMASK_TH +381 0xFFEE //TX_DRC_QUIET_FLOOR +382 0x6000 //TX_RATIODTL_CUT_TH +383 0xFFF3 //TX_DT_CUT_K1 384 0x0666 //TX_OUT_ENER_S_TH_CLEAN 385 0x0666 //TX_OUT_ENER_S_TH_LESSCLEAN 386 0x0333 //TX_OUT_ENER_S_TH_NOISY @@ -31952,15 +48459,15 @@ 388 0x0333 //TX_OUT_ENER_TH_SPEECH 389 0x2000 //TX_SN_NPB_GAIN 390 0x0000 //TX_NN_NPB_GAIN -391 0x0000 //TX_CSX_ALPHA_0 -392 0x0000 //TX_CSX_ALPHA_1 -393 0x0000 //TX_CSX_ALPHA_2 -394 0x0000 //TX_CSX_ALPHA_3 -395 0x0800 //TX_MU_ARSP_EST -396 0x00C8 //TX_P_OUTBEAM_MIN_TH +391 0x0000 //TX_POST_MASK_SUP_HSNE +392 0x0000 //TX_TAIL_DET_TH +393 0x0000 //TX_B_LESSCUT_RTO_WTA +394 0x0000 //TX_MEL_G_R +395 0x0800 //TX_SUPHIGH_TH +396 0x00C8 //TX_MASK_G_R 397 0x0002 //TX_EXTRA_NS_L -398 0x0800 //TX_EXTRA_NS_A -399 0x0005 //TX_VR_NOISE_FLOOR_TH +398 0x0800 //TX_C_POST_FLT_MASK +399 0x0005 //TX_A_POST_FLT_WNS 400 0x0148 //TX_MIN_G_LOW300HZ 401 0x0002 //TX_MAXLEVEL_CNG 402 0x00B4 //TX_STN_NOISE_TH @@ -32075,16 +48582,16 @@ 511 0x6666 //TX_MIC_TO_BFGAIN 512 0x0000 //TX_MICTOBFGAIN0 513 0x0000 //TX_FASTMUE_TH -514 0x0000 //TX_DERVB_LEN_0 -515 0x0000 //TX_DERVB_LEN_1 -516 0x0000 //TX_RHO_DERVB -517 0x0000 //TX_MIC_INDX_DERVB -518 0x0000 //TX_MU_DERVB -519 0x0000 //TX_DR_RESRV_0 -520 0x0000 //TX_DR_RESRV_1 -521 0x0000 //TX_DR_RESRV_2 -522 0x0000 //TX_DR_RESRV_3 -523 0x0000 //TX_DR_RESRV_4 +514 0x0000 //TX_DEREVERB_LF_MU +515 0x0000 //TX_DEREVERB_HF_MU +516 0x0000 //TX_DEREVERB_DELAY +517 0x0000 //TX_DEREVERB_COEF_LEN +518 0x0000 //TX_DEREVERB_DNR +519 0x0000 //TX_DEREVERB_ALPHA +520 0x0000 //TX_DEREVERB_BETA +521 0x0000 //TX_GSC_RTOL_TH +522 0x0000 //TX_GSC_RTOH_TH +523 0x0000 //TX_WIDE2_MEANHTH 524 0x0000 //TX_DR_RESRV_5 525 0x0000 //TX_DR_RESRV_6 526 0x0000 //TX_DR_RESRV_7 @@ -32458,8 +48965,73 @@ 894 0xC000 //TX_FASTNS_SSA_THHFL 895 0xCCCC //TX_FASTNS_SSA_THLFH 896 0xD999 //TX_FASTNS_SSA_THHFH +897 0x0000 //TX_SENDFUNC_REG_MICMUTE +898 0x0000 //TX_SENDFUNC_REG_MICMUTE1 +899 0x0000 //TX_MICMUTE_RATIO_THR +900 0x0000 //TX_MICMUTE_AMP_THR +901 0x0000 //TX_MICMUTE_HPF_IND +902 0x0000 //TX_MICMUTE_LOG_EYR_TH +903 0x0000 //TX_MICMUTE_CVG_TIME +904 0x0000 //TX_MICMUTE_RELEASE_TIME +905 0x0000 //TX_MIC_VOLUME_MIC0MUTE +906 0x0000 //TX_MICMUTE_EPD_OFFSET_0 +907 0x0000 //TX_MICMUTE_FRQ_AEC_L +908 0x0000 //TX_MICMUTE_EAD_THR +909 0x0000 //TX_MICMUTE_LAMBDA_CB_NLE +910 0x0000 //TX_MICMUTE_LAMBDA_RE_EST +911 0x0000 //TX_DTD_THR1_MICMUTE_0 +912 0x0000 //TX_DTD_THR1_MICMUTE_1 +913 0x0000 //TX_DTD_THR1_MICMUTE_2 +914 0x0000 //TX_DTD_THR1_MICMUTE_3 +915 0x0000 //TX_DTD_THR2_MICMUTE_0 +916 0x0000 //TX_MICMUTE_MIN_EQ_RE_EST_0 +917 0x0000 //TX_MICMUTE_MIN_EQ_RE_EST_1 +918 0x0000 //TX_MICMUTE_MIN_EQ_RE_EST_2 +919 0x0000 //TX_MICMUTE_MIN_EQ_RE_EST_3 +920 0x0000 //TX_MICMUTE_MIN_EQ_RE_EST_4 +921 0x0000 //TX_MICMUTE_C_POST_FLT +922 0x0000 //TX_MICMUTE_DT_CUT_K +923 0x0000 //TX_MICMUTE_DT_CUT_THR +924 0x0000 //TX_MICMUTE_DT_CUT_K2 +925 0x0000 //TX_MICMUTE_DT_CUT_THR2 +926 0x0000 //TX_MICMUTE_DT2_HOLD_N +927 0x0000 //TX_MICMUTE_RATIODTH_THCUT +928 0x0000 //TX_MICMUTE_B_POST_FLT_ECHOL +929 0x0000 //TX_MICMUTE_B_POST_FLT_ECHOH +930 0x0000 //TX_MICMUTE_C_POST_FLT_MASK +931 0x0000 //TX_MICMUTE_RATIODTL_CUT_TH +932 0x0000 //TX_MICMUTE_DT_CUT_K1 +933 0x0000 //TX_MICMUTE_N2_SN_EST +934 0x0000 //TX_MICMUTE_THR_SN_EST_0 +935 0x0000 //TX_MICMUTE_MIN_G_CTRL_0 +936 0x0000 //TX_MICMUTE_A_POST_FILT_S_0 +937 0x0000 //TX_MICMUTE_B_POST_FILT_0 +938 0x0000 //TX_MIC1RUB_AMP_THR +939 0x0000 //TX_MIC1MUTE_RATIO_THR +940 0x0000 //TX_MIC1MUTE_AMP_THR +941 0x0000 //TX_MIC1MUTE_CVG_TIME +942 0x0000 //TX_MIC1MUTE_RELEASE_TIME +943 0x0000 //TX_AMS_RESRV_01 +944 0x0000 //TX_AMS_RESRV_02 +945 0x0000 //TX_AMS_RESRV_03 +946 0x0000 //TX_AMS_RESRV_04 +947 0x0000 //TX_AMS_RESRV_05 +948 0x0000 //TX_AMS_RESRV_06 +949 0x0000 //TX_AMS_RESRV_07 +950 0x0000 //TX_AMS_RESRV_08 +951 0x0000 //TX_AMS_RESRV_09 +952 0x0000 //TX_AMS_RESRV_10 +953 0x0000 //TX_AMS_RESRV_11 +954 0x0000 //TX_AMS_RESRV_12 +955 0x0000 //TX_AMS_RESRV_13 +956 0x0000 //TX_AMS_RESRV_14 +957 0x0000 //TX_AMS_RESRV_15 +958 0x0000 //TX_AMS_RESRV_16 +959 0x0000 //TX_AMS_RESRV_17 +960 0x0000 //TX_AMS_RESRV_18 +961 0x0000 //TX_AMS_RESRV_19 #RX -0 0x006C //RX_RECVFUNC_MODE_0 +0 0x206C //RX_RECVFUNC_MODE_0 1 0x0000 //RX_RECVFUNC_MODE_1 2 0x0001 //RX_SAMPLINGFREQ_SIG 3 0x0001 //RX_SAMPLINGFREQ_PROC @@ -33309,10 +49881,862 @@ 110 0x0000 //RX_FDDRC_RESRV_0 129 0x0100 //RX_SPK_VOL 130 0x0000 //RX_VOL_RESRV_0 +#RX 2 +157 0x206C //RX_RECVFUNC_MODE_0 +158 0x0000 //RX_RECVFUNC_MODE_1 +159 0x0001 //RX_SAMPLINGFREQ_SIG +160 0x0001 //RX_SAMPLINGFREQ_PROC +161 0x000A //RX_FRAME_SZ +162 0x0000 //RX_DELAY_OPT +163 0x1000 //RX_TDDRC_ALPHA_UP_1 +164 0x1000 //RX_TDDRC_ALPHA_UP_2 +165 0x1000 //RX_TDDRC_ALPHA_UP_3 +166 0x1000 //RX_TDDRC_ALPHA_UP_4 +167 0x0800 //RX_PGA +168 0x7FFF //RX_A_HP +169 0x4000 //RX_B_PE +170 0x3800 //RX_THR_PITCH_DET_0 +171 0x3000 //RX_THR_PITCH_DET_1 +172 0x2800 //RX_THR_PITCH_DET_2 +173 0x0008 //RX_PITCH_BFR_LEN +174 0x0003 //RX_SBD_PITCH_DET +175 0x0100 //RX_PP_RESRV_0 +176 0x0020 //RX_PP_RESRV_1 +177 0x0600 //RX_N_SN_EST +178 0x000C //RX_N2_SN_EST +179 0x0010 //RX_NS_LVL_CTRL +180 0xF800 //RX_THR_SN_EST +181 0x7CCD //RX_LAMBDA_PFILT +182 0x000A //RX_FENS_RESRV_0 +183 0x0190 //RX_FENS_RESRV_1 +184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +187 0x0002 //RX_EXTRA_NS_L +188 0x0800 //RX_EXTRA_NS_A +189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +190 0x7FFF //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +192 0x199A //RX_A_POST_FLT +193 0x0000 //RX_LMT_THRD +194 0x4000 //RX_LMT_ALPHA +195 0x001C //RX_FDEQ_SUBNUM +196 0x4848 //RX_FDEQ_GAIN_0 +197 0x4848 //RX_FDEQ_GAIN_1 +198 0x4848 //RX_FDEQ_GAIN_2 +199 0x4848 //RX_FDEQ_GAIN_3 +200 0x4848 //RX_FDEQ_GAIN_4 +201 0x4848 //RX_FDEQ_GAIN_5 +202 0x4848 //RX_FDEQ_GAIN_6 +203 0x4848 //RX_FDEQ_GAIN_7 +204 0x4848 //RX_FDEQ_GAIN_8 +205 0x3C3C //RX_FDEQ_GAIN_9 +206 0x3C3C //RX_FDEQ_GAIN_10 +207 0x3838 //RX_FDEQ_GAIN_11 +208 0x3838 //RX_FDEQ_GAIN_12 +209 0x3030 //RX_FDEQ_GAIN_13 +210 0x4848 //RX_FDEQ_GAIN_14 +211 0x4848 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0202 //RX_FDEQ_BIN_0 +221 0x0203 //RX_FDEQ_BIN_1 +222 0x0303 //RX_FDEQ_BIN_2 +223 0x0304 //RX_FDEQ_BIN_3 +224 0x0405 //RX_FDEQ_BIN_4 +225 0x0506 //RX_FDEQ_BIN_5 +226 0x0708 //RX_FDEQ_BIN_6 +227 0x090A //RX_FDEQ_BIN_7 +228 0x0B0C //RX_FDEQ_BIN_8 +229 0x0D0E //RX_FDEQ_BIN_9 +230 0x0E0F //RX_FDEQ_BIN_10 +231 0x0F10 //RX_FDEQ_BIN_11 +232 0x1011 //RX_FDEQ_BIN_12 +233 0x1112 //RX_FDEQ_BIN_13 +234 0x0000 //RX_FDEQ_BIN_14 +235 0x0000 //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x4000 //RX_FDEQ_RESRV_0 +245 0x0320 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0030 //RX_FDDRC_BAND_MARGIN_1 +248 0x0050 //RX_FDDRC_BAND_MARGIN_2 +249 0x0080 //RX_FDDRC_BAND_MARGIN_3 +250 0x0007 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x5000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x6400 //RX_FDDRC_THRD_3_2 +258 0x6400 //RX_FDDRC_THRD_3_3 +259 0x2000 //RX_FDDRC_SLANT_0_0 +260 0x2000 //RX_FDDRC_SLANT_0_1 +261 0x2000 //RX_FDDRC_SLANT_0_2 +262 0x2000 //RX_FDDRC_SLANT_0_3 +263 0x5333 //RX_FDDRC_SLANT_1_0 +264 0x5333 //RX_FDDRC_SLANT_1_1 +265 0x5333 //RX_FDDRC_SLANT_1_2 +266 0x5333 //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +268 0x0000 //RX_FILTINDX +269 0x0000 //RX_TDDRC_THRD_0 +270 0x0000 //RX_TDDRC_THRD_1 +271 0x7FFF //RX_TDDRC_THRD_2 +272 0x7FFF //RX_TDDRC_THRD_3 +273 0x7E70 //RX_TDDRC_SLANT_0 +274 0x7FFF //RX_TDDRC_SLANT_1 +275 0x1000 //RX_TDDRC_ALPHA_UP_0 +276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x199A //RX_TDDRC_HMNC_GAIN +279 0x0001 //RX_TDDRC_SMT_FLAG +280 0x0CCD //RX_TDDRC_SMT_W +281 0x0155 //RX_TDDRC_DRC_GAIN +282 0x7C00 //RX_LAMBDA_PKA_FP +283 0x2000 //RX_TPKA_FP +284 0x2000 //RX_MIN_G_FP +285 0x0080 //RX_MAX_G_FP +286 0x0100 //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 +288 0x0000 //RX_MAXLEVEL_CNG +289 0x3000 //RX_BWE_UV_TH +290 0x3000 //RX_BWE_UV_TH2 +291 0x1800 //RX_BWE_UV_TH3 +292 0x1000 //RX_BWE_V_TH +293 0x04CD //RX_BWE_GAIN1_V_TH1 +294 0x0F33 //RX_BWE_GAIN1_V_TH2 +295 0x7333 //RX_BWE_UV_EQ +296 0x199A //RX_BWE_V_EQ +297 0x7333 //RX_BWE_TONE_TH +298 0x0004 //RX_BWE_UV_HOLD_T +299 0x6CCD //RX_BWE_GAIN2_ALPHA +300 0x799A //RX_BWE_GAIN3_ALPHA +301 0x001E //RX_BWE_CUTOFF +302 0x3000 //RX_BWE_GAINFILL +303 0x3200 //RX_BWE_MAXTH_TONE +304 0x2000 //RX_BWE_EQ_0 +305 0x2000 //RX_BWE_EQ_1 +306 0x2000 //RX_BWE_EQ_2 +307 0x2000 //RX_BWE_EQ_3 +308 0x2000 //RX_BWE_EQ_4 +309 0x2000 //RX_BWE_EQ_5 +310 0x2000 //RX_BWE_EQ_6 +311 0x0000 //RX_BWE_RESRV_0 +312 0x0000 //RX_BWE_RESRV_1 +313 0x0000 //RX_BWE_RESRV_2 +#VOL 0 +163 0x1000 //RX_TDDRC_ALPHA_UP_1 +164 0x1000 //RX_TDDRC_ALPHA_UP_2 +165 0x1000 //RX_TDDRC_ALPHA_UP_3 +166 0x1000 //RX_TDDRC_ALPHA_UP_4 +184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +190 0x7FFF //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +269 0x0000 //RX_TDDRC_THRD_0 +270 0x0000 //RX_TDDRC_THRD_1 +271 0x7FFF //RX_TDDRC_THRD_2 +272 0x7FFF //RX_TDDRC_THRD_3 +273 0x7E70 //RX_TDDRC_SLANT_0 +274 0x7FFF //RX_TDDRC_SLANT_1 +275 0x1000 //RX_TDDRC_ALPHA_UP_0 +276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x199A //RX_TDDRC_HMNC_GAIN +279 0x0001 //RX_TDDRC_SMT_FLAG +280 0x0CCD //RX_TDDRC_SMT_W +281 0x0155 //RX_TDDRC_DRC_GAIN +195 0x001C //RX_FDEQ_SUBNUM +196 0x4848 //RX_FDEQ_GAIN_0 +197 0x4848 //RX_FDEQ_GAIN_1 +198 0x4848 //RX_FDEQ_GAIN_2 +199 0x4848 //RX_FDEQ_GAIN_3 +200 0x4848 //RX_FDEQ_GAIN_4 +201 0x4848 //RX_FDEQ_GAIN_5 +202 0x4848 //RX_FDEQ_GAIN_6 +203 0x4848 //RX_FDEQ_GAIN_7 +204 0x4848 //RX_FDEQ_GAIN_8 +205 0x3C3C //RX_FDEQ_GAIN_9 +206 0x3C3C //RX_FDEQ_GAIN_10 +207 0x3838 //RX_FDEQ_GAIN_11 +208 0x3838 //RX_FDEQ_GAIN_12 +209 0x3030 //RX_FDEQ_GAIN_13 +210 0x4848 //RX_FDEQ_GAIN_14 +211 0x4848 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0202 //RX_FDEQ_BIN_0 +221 0x0203 //RX_FDEQ_BIN_1 +222 0x0303 //RX_FDEQ_BIN_2 +223 0x0304 //RX_FDEQ_BIN_3 +224 0x0405 //RX_FDEQ_BIN_4 +225 0x0506 //RX_FDEQ_BIN_5 +226 0x0708 //RX_FDEQ_BIN_6 +227 0x090A //RX_FDEQ_BIN_7 +228 0x0B0C //RX_FDEQ_BIN_8 +229 0x0D0E //RX_FDEQ_BIN_9 +230 0x0E0F //RX_FDEQ_BIN_10 +231 0x0F10 //RX_FDEQ_BIN_11 +232 0x1011 //RX_FDEQ_BIN_12 +233 0x1112 //RX_FDEQ_BIN_13 +234 0x0000 //RX_FDEQ_BIN_14 +235 0x0000 //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x4000 //RX_FDEQ_RESRV_0 +245 0x0320 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0030 //RX_FDDRC_BAND_MARGIN_1 +248 0x0050 //RX_FDDRC_BAND_MARGIN_2 +249 0x0080 //RX_FDDRC_BAND_MARGIN_3 +250 0x0007 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x5000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x6400 //RX_FDDRC_THRD_3_2 +258 0x6400 //RX_FDDRC_THRD_3_3 +259 0x2000 //RX_FDDRC_SLANT_0_0 +260 0x2000 //RX_FDDRC_SLANT_0_1 +261 0x2000 //RX_FDDRC_SLANT_0_2 +262 0x2000 //RX_FDDRC_SLANT_0_3 +263 0x5333 //RX_FDDRC_SLANT_1_0 +264 0x5333 //RX_FDDRC_SLANT_1_1 +265 0x5333 //RX_FDDRC_SLANT_1_2 +266 0x5333 //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +286 0x0100 //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 +#VOL 1 +163 0x1000 //RX_TDDRC_ALPHA_UP_1 +164 0x1000 //RX_TDDRC_ALPHA_UP_2 +165 0x1000 //RX_TDDRC_ALPHA_UP_3 +166 0x1000 //RX_TDDRC_ALPHA_UP_4 +184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +190 0x7FFF //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +269 0x0000 //RX_TDDRC_THRD_0 +270 0x0000 //RX_TDDRC_THRD_1 +271 0x7FFF //RX_TDDRC_THRD_2 +272 0x7FFF //RX_TDDRC_THRD_3 +273 0x7E70 //RX_TDDRC_SLANT_0 +274 0x7FFF //RX_TDDRC_SLANT_1 +275 0x1000 //RX_TDDRC_ALPHA_UP_0 +276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x199A //RX_TDDRC_HMNC_GAIN +279 0x0001 //RX_TDDRC_SMT_FLAG +280 0x0CCD //RX_TDDRC_SMT_W +281 0x0155 //RX_TDDRC_DRC_GAIN +195 0x001C //RX_FDEQ_SUBNUM +196 0x4848 //RX_FDEQ_GAIN_0 +197 0x4848 //RX_FDEQ_GAIN_1 +198 0x4848 //RX_FDEQ_GAIN_2 +199 0x4848 //RX_FDEQ_GAIN_3 +200 0x4848 //RX_FDEQ_GAIN_4 +201 0x4848 //RX_FDEQ_GAIN_5 +202 0x4848 //RX_FDEQ_GAIN_6 +203 0x4848 //RX_FDEQ_GAIN_7 +204 0x4848 //RX_FDEQ_GAIN_8 +205 0x3C3C //RX_FDEQ_GAIN_9 +206 0x3C3C //RX_FDEQ_GAIN_10 +207 0x3838 //RX_FDEQ_GAIN_11 +208 0x3838 //RX_FDEQ_GAIN_12 +209 0x3030 //RX_FDEQ_GAIN_13 +210 0x4848 //RX_FDEQ_GAIN_14 +211 0x4848 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0202 //RX_FDEQ_BIN_0 +221 0x0203 //RX_FDEQ_BIN_1 +222 0x0303 //RX_FDEQ_BIN_2 +223 0x0304 //RX_FDEQ_BIN_3 +224 0x0405 //RX_FDEQ_BIN_4 +225 0x0506 //RX_FDEQ_BIN_5 +226 0x0708 //RX_FDEQ_BIN_6 +227 0x090A //RX_FDEQ_BIN_7 +228 0x0B0C //RX_FDEQ_BIN_8 +229 0x0D0E //RX_FDEQ_BIN_9 +230 0x0E0F //RX_FDEQ_BIN_10 +231 0x0F10 //RX_FDEQ_BIN_11 +232 0x1011 //RX_FDEQ_BIN_12 +233 0x1112 //RX_FDEQ_BIN_13 +234 0x0000 //RX_FDEQ_BIN_14 +235 0x0000 //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x4000 //RX_FDEQ_RESRV_0 +245 0x0320 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0030 //RX_FDDRC_BAND_MARGIN_1 +248 0x0050 //RX_FDDRC_BAND_MARGIN_2 +249 0x0080 //RX_FDDRC_BAND_MARGIN_3 +250 0x0007 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x5000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x6400 //RX_FDDRC_THRD_3_2 +258 0x6400 //RX_FDDRC_THRD_3_3 +259 0x2000 //RX_FDDRC_SLANT_0_0 +260 0x2000 //RX_FDDRC_SLANT_0_1 +261 0x2000 //RX_FDDRC_SLANT_0_2 +262 0x2000 //RX_FDDRC_SLANT_0_3 +263 0x5333 //RX_FDDRC_SLANT_1_0 +264 0x5333 //RX_FDDRC_SLANT_1_1 +265 0x5333 //RX_FDDRC_SLANT_1_2 +266 0x5333 //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +286 0x0100 //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 +#VOL 2 +163 0x1000 //RX_TDDRC_ALPHA_UP_1 +164 0x1000 //RX_TDDRC_ALPHA_UP_2 +165 0x1000 //RX_TDDRC_ALPHA_UP_3 +166 0x1000 //RX_TDDRC_ALPHA_UP_4 +184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +190 0x7FFF //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +269 0x0000 //RX_TDDRC_THRD_0 +270 0x0000 //RX_TDDRC_THRD_1 +271 0x7FFF //RX_TDDRC_THRD_2 +272 0x7FFF //RX_TDDRC_THRD_3 +273 0x7E70 //RX_TDDRC_SLANT_0 +274 0x7FFF //RX_TDDRC_SLANT_1 +275 0x1000 //RX_TDDRC_ALPHA_UP_0 +276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x199A //RX_TDDRC_HMNC_GAIN +279 0x0001 //RX_TDDRC_SMT_FLAG +280 0x0CCD //RX_TDDRC_SMT_W +281 0x0155 //RX_TDDRC_DRC_GAIN +195 0x001C //RX_FDEQ_SUBNUM +196 0x4848 //RX_FDEQ_GAIN_0 +197 0x4848 //RX_FDEQ_GAIN_1 +198 0x4848 //RX_FDEQ_GAIN_2 +199 0x4848 //RX_FDEQ_GAIN_3 +200 0x4848 //RX_FDEQ_GAIN_4 +201 0x4848 //RX_FDEQ_GAIN_5 +202 0x4848 //RX_FDEQ_GAIN_6 +203 0x4848 //RX_FDEQ_GAIN_7 +204 0x4848 //RX_FDEQ_GAIN_8 +205 0x3C3C //RX_FDEQ_GAIN_9 +206 0x3C3C //RX_FDEQ_GAIN_10 +207 0x3838 //RX_FDEQ_GAIN_11 +208 0x3838 //RX_FDEQ_GAIN_12 +209 0x3030 //RX_FDEQ_GAIN_13 +210 0x4848 //RX_FDEQ_GAIN_14 +211 0x4848 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0202 //RX_FDEQ_BIN_0 +221 0x0203 //RX_FDEQ_BIN_1 +222 0x0303 //RX_FDEQ_BIN_2 +223 0x0304 //RX_FDEQ_BIN_3 +224 0x0405 //RX_FDEQ_BIN_4 +225 0x0506 //RX_FDEQ_BIN_5 +226 0x0708 //RX_FDEQ_BIN_6 +227 0x090A //RX_FDEQ_BIN_7 +228 0x0B0C //RX_FDEQ_BIN_8 +229 0x0D0E //RX_FDEQ_BIN_9 +230 0x0E0F //RX_FDEQ_BIN_10 +231 0x0F10 //RX_FDEQ_BIN_11 +232 0x1011 //RX_FDEQ_BIN_12 +233 0x1112 //RX_FDEQ_BIN_13 +234 0x0000 //RX_FDEQ_BIN_14 +235 0x0000 //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x4000 //RX_FDEQ_RESRV_0 +245 0x0320 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0030 //RX_FDDRC_BAND_MARGIN_1 +248 0x0050 //RX_FDDRC_BAND_MARGIN_2 +249 0x0080 //RX_FDDRC_BAND_MARGIN_3 +250 0x0007 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x5000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x6400 //RX_FDDRC_THRD_3_2 +258 0x6400 //RX_FDDRC_THRD_3_3 +259 0x2000 //RX_FDDRC_SLANT_0_0 +260 0x2000 //RX_FDDRC_SLANT_0_1 +261 0x2000 //RX_FDDRC_SLANT_0_2 +262 0x2000 //RX_FDDRC_SLANT_0_3 +263 0x5333 //RX_FDDRC_SLANT_1_0 +264 0x5333 //RX_FDDRC_SLANT_1_1 +265 0x5333 //RX_FDDRC_SLANT_1_2 +266 0x5333 //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +286 0x0100 //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 +#VOL 3 +163 0x1000 //RX_TDDRC_ALPHA_UP_1 +164 0x1000 //RX_TDDRC_ALPHA_UP_2 +165 0x1000 //RX_TDDRC_ALPHA_UP_3 +166 0x1000 //RX_TDDRC_ALPHA_UP_4 +184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +190 0x7FFF //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +269 0x0000 //RX_TDDRC_THRD_0 +270 0x0000 //RX_TDDRC_THRD_1 +271 0x7FFF //RX_TDDRC_THRD_2 +272 0x7FFF //RX_TDDRC_THRD_3 +273 0x7E70 //RX_TDDRC_SLANT_0 +274 0x7FFF //RX_TDDRC_SLANT_1 +275 0x1000 //RX_TDDRC_ALPHA_UP_0 +276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x199A //RX_TDDRC_HMNC_GAIN +279 0x0001 //RX_TDDRC_SMT_FLAG +280 0x0CCD //RX_TDDRC_SMT_W +281 0x0155 //RX_TDDRC_DRC_GAIN +195 0x001C //RX_FDEQ_SUBNUM +196 0x4848 //RX_FDEQ_GAIN_0 +197 0x4848 //RX_FDEQ_GAIN_1 +198 0x4848 //RX_FDEQ_GAIN_2 +199 0x4848 //RX_FDEQ_GAIN_3 +200 0x4848 //RX_FDEQ_GAIN_4 +201 0x4848 //RX_FDEQ_GAIN_5 +202 0x4848 //RX_FDEQ_GAIN_6 +203 0x4848 //RX_FDEQ_GAIN_7 +204 0x4848 //RX_FDEQ_GAIN_8 +205 0x3C3C //RX_FDEQ_GAIN_9 +206 0x3C3C //RX_FDEQ_GAIN_10 +207 0x3838 //RX_FDEQ_GAIN_11 +208 0x3838 //RX_FDEQ_GAIN_12 +209 0x3030 //RX_FDEQ_GAIN_13 +210 0x4848 //RX_FDEQ_GAIN_14 +211 0x4848 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0202 //RX_FDEQ_BIN_0 +221 0x0203 //RX_FDEQ_BIN_1 +222 0x0303 //RX_FDEQ_BIN_2 +223 0x0304 //RX_FDEQ_BIN_3 +224 0x0405 //RX_FDEQ_BIN_4 +225 0x0506 //RX_FDEQ_BIN_5 +226 0x0708 //RX_FDEQ_BIN_6 +227 0x090A //RX_FDEQ_BIN_7 +228 0x0B0C //RX_FDEQ_BIN_8 +229 0x0D0E //RX_FDEQ_BIN_9 +230 0x0E0F //RX_FDEQ_BIN_10 +231 0x0F10 //RX_FDEQ_BIN_11 +232 0x1011 //RX_FDEQ_BIN_12 +233 0x1112 //RX_FDEQ_BIN_13 +234 0x0000 //RX_FDEQ_BIN_14 +235 0x0000 //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x4000 //RX_FDEQ_RESRV_0 +245 0x0320 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0030 //RX_FDDRC_BAND_MARGIN_1 +248 0x0050 //RX_FDDRC_BAND_MARGIN_2 +249 0x0080 //RX_FDDRC_BAND_MARGIN_3 +250 0x0007 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x5000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x6400 //RX_FDDRC_THRD_3_2 +258 0x6400 //RX_FDDRC_THRD_3_3 +259 0x2000 //RX_FDDRC_SLANT_0_0 +260 0x2000 //RX_FDDRC_SLANT_0_1 +261 0x2000 //RX_FDDRC_SLANT_0_2 +262 0x2000 //RX_FDDRC_SLANT_0_3 +263 0x5333 //RX_FDDRC_SLANT_1_0 +264 0x5333 //RX_FDDRC_SLANT_1_1 +265 0x5333 //RX_FDDRC_SLANT_1_2 +266 0x5333 //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +286 0x0100 //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 +#VOL 4 +163 0x1000 //RX_TDDRC_ALPHA_UP_1 +164 0x1000 //RX_TDDRC_ALPHA_UP_2 +165 0x1000 //RX_TDDRC_ALPHA_UP_3 +166 0x1000 //RX_TDDRC_ALPHA_UP_4 +184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +190 0x7FFF //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +269 0x0000 //RX_TDDRC_THRD_0 +270 0x0000 //RX_TDDRC_THRD_1 +271 0x7FFF //RX_TDDRC_THRD_2 +272 0x7FFF //RX_TDDRC_THRD_3 +273 0x7E70 //RX_TDDRC_SLANT_0 +274 0x7FFF //RX_TDDRC_SLANT_1 +275 0x1000 //RX_TDDRC_ALPHA_UP_0 +276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x199A //RX_TDDRC_HMNC_GAIN +279 0x0001 //RX_TDDRC_SMT_FLAG +280 0x0CCD //RX_TDDRC_SMT_W +281 0x0155 //RX_TDDRC_DRC_GAIN +195 0x001C //RX_FDEQ_SUBNUM +196 0x4848 //RX_FDEQ_GAIN_0 +197 0x4848 //RX_FDEQ_GAIN_1 +198 0x4848 //RX_FDEQ_GAIN_2 +199 0x4848 //RX_FDEQ_GAIN_3 +200 0x4848 //RX_FDEQ_GAIN_4 +201 0x4848 //RX_FDEQ_GAIN_5 +202 0x4848 //RX_FDEQ_GAIN_6 +203 0x4848 //RX_FDEQ_GAIN_7 +204 0x4848 //RX_FDEQ_GAIN_8 +205 0x3C3C //RX_FDEQ_GAIN_9 +206 0x3C3C //RX_FDEQ_GAIN_10 +207 0x3838 //RX_FDEQ_GAIN_11 +208 0x3838 //RX_FDEQ_GAIN_12 +209 0x3030 //RX_FDEQ_GAIN_13 +210 0x4848 //RX_FDEQ_GAIN_14 +211 0x4848 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0202 //RX_FDEQ_BIN_0 +221 0x0203 //RX_FDEQ_BIN_1 +222 0x0303 //RX_FDEQ_BIN_2 +223 0x0304 //RX_FDEQ_BIN_3 +224 0x0405 //RX_FDEQ_BIN_4 +225 0x0506 //RX_FDEQ_BIN_5 +226 0x0708 //RX_FDEQ_BIN_6 +227 0x090A //RX_FDEQ_BIN_7 +228 0x0B0C //RX_FDEQ_BIN_8 +229 0x0D0E //RX_FDEQ_BIN_9 +230 0x0E0F //RX_FDEQ_BIN_10 +231 0x0F10 //RX_FDEQ_BIN_11 +232 0x1011 //RX_FDEQ_BIN_12 +233 0x1112 //RX_FDEQ_BIN_13 +234 0x0000 //RX_FDEQ_BIN_14 +235 0x0000 //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x4000 //RX_FDEQ_RESRV_0 +245 0x0320 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0030 //RX_FDDRC_BAND_MARGIN_1 +248 0x0050 //RX_FDDRC_BAND_MARGIN_2 +249 0x0080 //RX_FDDRC_BAND_MARGIN_3 +250 0x0007 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x5000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x6400 //RX_FDDRC_THRD_3_2 +258 0x6400 //RX_FDDRC_THRD_3_3 +259 0x2000 //RX_FDDRC_SLANT_0_0 +260 0x2000 //RX_FDDRC_SLANT_0_1 +261 0x2000 //RX_FDDRC_SLANT_0_2 +262 0x2000 //RX_FDDRC_SLANT_0_3 +263 0x5333 //RX_FDDRC_SLANT_1_0 +264 0x5333 //RX_FDDRC_SLANT_1_1 +265 0x5333 //RX_FDDRC_SLANT_1_2 +266 0x5333 //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +286 0x0100 //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 +#VOL 5 +163 0x1000 //RX_TDDRC_ALPHA_UP_1 +164 0x1000 //RX_TDDRC_ALPHA_UP_2 +165 0x1000 //RX_TDDRC_ALPHA_UP_3 +166 0x1000 //RX_TDDRC_ALPHA_UP_4 +184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +190 0x7FFF //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +269 0x0000 //RX_TDDRC_THRD_0 +270 0x0000 //RX_TDDRC_THRD_1 +271 0x7FFF //RX_TDDRC_THRD_2 +272 0x7FFF //RX_TDDRC_THRD_3 +273 0x7E70 //RX_TDDRC_SLANT_0 +274 0x7FFF //RX_TDDRC_SLANT_1 +275 0x1000 //RX_TDDRC_ALPHA_UP_0 +276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x199A //RX_TDDRC_HMNC_GAIN +279 0x0001 //RX_TDDRC_SMT_FLAG +280 0x0CCD //RX_TDDRC_SMT_W +281 0x0155 //RX_TDDRC_DRC_GAIN +195 0x001C //RX_FDEQ_SUBNUM +196 0x4848 //RX_FDEQ_GAIN_0 +197 0x4848 //RX_FDEQ_GAIN_1 +198 0x4848 //RX_FDEQ_GAIN_2 +199 0x4848 //RX_FDEQ_GAIN_3 +200 0x4848 //RX_FDEQ_GAIN_4 +201 0x4848 //RX_FDEQ_GAIN_5 +202 0x4848 //RX_FDEQ_GAIN_6 +203 0x4848 //RX_FDEQ_GAIN_7 +204 0x4848 //RX_FDEQ_GAIN_8 +205 0x3C3C //RX_FDEQ_GAIN_9 +206 0x3C3C //RX_FDEQ_GAIN_10 +207 0x3838 //RX_FDEQ_GAIN_11 +208 0x3838 //RX_FDEQ_GAIN_12 +209 0x3030 //RX_FDEQ_GAIN_13 +210 0x4848 //RX_FDEQ_GAIN_14 +211 0x4848 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0202 //RX_FDEQ_BIN_0 +221 0x0203 //RX_FDEQ_BIN_1 +222 0x0303 //RX_FDEQ_BIN_2 +223 0x0304 //RX_FDEQ_BIN_3 +224 0x0405 //RX_FDEQ_BIN_4 +225 0x0506 //RX_FDEQ_BIN_5 +226 0x0708 //RX_FDEQ_BIN_6 +227 0x090A //RX_FDEQ_BIN_7 +228 0x0B0C //RX_FDEQ_BIN_8 +229 0x0D0E //RX_FDEQ_BIN_9 +230 0x0E0F //RX_FDEQ_BIN_10 +231 0x0F10 //RX_FDEQ_BIN_11 +232 0x1011 //RX_FDEQ_BIN_12 +233 0x1112 //RX_FDEQ_BIN_13 +234 0x0000 //RX_FDEQ_BIN_14 +235 0x0000 //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x4000 //RX_FDEQ_RESRV_0 +245 0x0320 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0030 //RX_FDDRC_BAND_MARGIN_1 +248 0x0050 //RX_FDDRC_BAND_MARGIN_2 +249 0x0080 //RX_FDDRC_BAND_MARGIN_3 +250 0x0007 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x5000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x6400 //RX_FDDRC_THRD_3_2 +258 0x6400 //RX_FDDRC_THRD_3_3 +259 0x2000 //RX_FDDRC_SLANT_0_0 +260 0x2000 //RX_FDDRC_SLANT_0_1 +261 0x2000 //RX_FDDRC_SLANT_0_2 +262 0x2000 //RX_FDDRC_SLANT_0_3 +263 0x5333 //RX_FDDRC_SLANT_1_0 +264 0x5333 //RX_FDDRC_SLANT_1_1 +265 0x5333 //RX_FDDRC_SLANT_1_2 +266 0x5333 //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +286 0x0100 //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 +#VOL 6 +163 0x1000 //RX_TDDRC_ALPHA_UP_1 +164 0x1000 //RX_TDDRC_ALPHA_UP_2 +165 0x1000 //RX_TDDRC_ALPHA_UP_3 +166 0x1000 //RX_TDDRC_ALPHA_UP_4 +184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +190 0x7FFF //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +269 0x0000 //RX_TDDRC_THRD_0 +270 0x0000 //RX_TDDRC_THRD_1 +271 0x7FFF //RX_TDDRC_THRD_2 +272 0x7FFF //RX_TDDRC_THRD_3 +273 0x7E70 //RX_TDDRC_SLANT_0 +274 0x7FFF //RX_TDDRC_SLANT_1 +275 0x1000 //RX_TDDRC_ALPHA_UP_0 +276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x199A //RX_TDDRC_HMNC_GAIN +279 0x0001 //RX_TDDRC_SMT_FLAG +280 0x0CCD //RX_TDDRC_SMT_W +281 0x0155 //RX_TDDRC_DRC_GAIN +195 0x001C //RX_FDEQ_SUBNUM +196 0x4848 //RX_FDEQ_GAIN_0 +197 0x4848 //RX_FDEQ_GAIN_1 +198 0x4848 //RX_FDEQ_GAIN_2 +199 0x4848 //RX_FDEQ_GAIN_3 +200 0x4848 //RX_FDEQ_GAIN_4 +201 0x4848 //RX_FDEQ_GAIN_5 +202 0x4848 //RX_FDEQ_GAIN_6 +203 0x4848 //RX_FDEQ_GAIN_7 +204 0x4848 //RX_FDEQ_GAIN_8 +205 0x3C3C //RX_FDEQ_GAIN_9 +206 0x3C3C //RX_FDEQ_GAIN_10 +207 0x3838 //RX_FDEQ_GAIN_11 +208 0x3838 //RX_FDEQ_GAIN_12 +209 0x3030 //RX_FDEQ_GAIN_13 +210 0x4848 //RX_FDEQ_GAIN_14 +211 0x4848 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0202 //RX_FDEQ_BIN_0 +221 0x0203 //RX_FDEQ_BIN_1 +222 0x0303 //RX_FDEQ_BIN_2 +223 0x0304 //RX_FDEQ_BIN_3 +224 0x0405 //RX_FDEQ_BIN_4 +225 0x0506 //RX_FDEQ_BIN_5 +226 0x0708 //RX_FDEQ_BIN_6 +227 0x090A //RX_FDEQ_BIN_7 +228 0x0B0C //RX_FDEQ_BIN_8 +229 0x0D0E //RX_FDEQ_BIN_9 +230 0x0E0F //RX_FDEQ_BIN_10 +231 0x0F10 //RX_FDEQ_BIN_11 +232 0x1011 //RX_FDEQ_BIN_12 +233 0x1112 //RX_FDEQ_BIN_13 +234 0x0000 //RX_FDEQ_BIN_14 +235 0x0000 //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x4000 //RX_FDEQ_RESRV_0 +245 0x0320 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0030 //RX_FDDRC_BAND_MARGIN_1 +248 0x0050 //RX_FDDRC_BAND_MARGIN_2 +249 0x0080 //RX_FDDRC_BAND_MARGIN_3 +250 0x0007 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x5000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x6400 //RX_FDDRC_THRD_3_2 +258 0x6400 //RX_FDDRC_THRD_3_3 +259 0x2000 //RX_FDDRC_SLANT_0_0 +260 0x2000 //RX_FDDRC_SLANT_0_1 +261 0x2000 //RX_FDDRC_SLANT_0_2 +262 0x2000 //RX_FDDRC_SLANT_0_3 +263 0x5333 //RX_FDDRC_SLANT_1_0 +264 0x5333 //RX_FDDRC_SLANT_1_1 +265 0x5333 //RX_FDDRC_SLANT_1_2 +266 0x5333 //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +286 0x0100 //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 #CASE_NAME BLUETOOTH-BTWB_NREC-VOICE_GENERIC-SWB -#PARAM_TYPE TX+RX -#TOTAL_CUSTOM_STEP 7 +#PARAM_MODE Full +#PARAM_TYPE TX+2RX +#TOTAL_CUSTOM_STEP 7+7 #TX 0 0x0001 //TX_OPERATION_MODE_0 1 0x0001 //TX_OPERATION_MODE_1 @@ -33565,20 +50989,20 @@ 248 0xF400 //TX_THR_SN_EST_6 249 0xF600 //TX_THR_SN_EST_7 250 0x0000 //TX_DELTA_THR_SN_EST_0 -251 0x0000 //TX_DELTA_THR_SN_EST_1 +251 0x0200 //TX_DELTA_THR_SN_EST_1 252 0x0200 //TX_DELTA_THR_SN_EST_2 253 0x0200 //TX_DELTA_THR_SN_EST_3 254 0x0200 //TX_DELTA_THR_SN_EST_4 255 0x0200 //TX_DELTA_THR_SN_EST_5 -256 0x0200 //TX_DELTA_THR_SN_EST_6 +256 0x0000 //TX_DELTA_THR_SN_EST_6 257 0x0200 //TX_DELTA_THR_SN_EST_7 258 0x6000 //TX_LAMBDA_NN_EST_0 -259 0x6000 //TX_LAMBDA_NN_EST_1 +259 0x4000 //TX_LAMBDA_NN_EST_1 260 0x4000 //TX_LAMBDA_NN_EST_2 261 0x4000 //TX_LAMBDA_NN_EST_3 262 0x4000 //TX_LAMBDA_NN_EST_4 263 0x4000 //TX_LAMBDA_NN_EST_5 -264 0x4000 //TX_LAMBDA_NN_EST_6 +264 0x6000 //TX_LAMBDA_NN_EST_6 265 0x4000 //TX_LAMBDA_NN_EST_7 266 0x0400 //TX_N_SN_EST 267 0x001E //TX_INBEAM_T @@ -33596,16 +51020,16 @@ 279 0x1000 //TX_B_POST_FLT_0 280 0x1000 //TX_B_POST_FLT_1 281 0x000B //TX_NS_LVL_CTRL_0 -282 0x000F //TX_NS_LVL_CTRL_1 -283 0x0011 //TX_NS_LVL_CTRL_2 +282 0x0011 //TX_NS_LVL_CTRL_1 +283 0x000F //TX_NS_LVL_CTRL_2 284 0x000F //TX_NS_LVL_CTRL_3 285 0x000F //TX_NS_LVL_CTRL_4 286 0x000F //TX_NS_LVL_CTRL_5 287 0x000F //TX_NS_LVL_CTRL_6 288 0x0011 //TX_NS_LVL_CTRL_7 289 0x000C //TX_MIN_GAIN_S_0 -290 0x000C //TX_MIN_GAIN_S_1 -291 0x000F //TX_MIN_GAIN_S_2 +290 0x000F //TX_MIN_GAIN_S_1 +291 0x000C //TX_MIN_GAIN_S_2 292 0x000C //TX_MIN_GAIN_S_3 293 0x000C //TX_MIN_GAIN_S_4 294 0x000C //TX_MIN_GAIN_S_5 @@ -33629,12 +51053,12 @@ 312 0x7FFF //TX_A_POST_FILT_0 313 0x2000 //TX_A_POST_FILT_1 314 0x2000 //TX_A_POST_FILT_S_0 -315 0x4000 //TX_A_POST_FILT_S_1 +315 0x5000 //TX_A_POST_FILT_S_1 316 0x5000 //TX_A_POST_FILT_S_2 317 0x5000 //TX_A_POST_FILT_S_3 318 0x5000 //TX_A_POST_FILT_S_4 319 0x5000 //TX_A_POST_FILT_S_5 -320 0x5000 //TX_A_POST_FILT_S_6 +320 0x4000 //TX_A_POST_FILT_S_6 321 0x5000 //TX_A_POST_FILT_S_7 322 0x1000 //TX_B_POST_FILT_0 323 0x1000 //TX_B_POST_FILT_1 @@ -33694,10 +51118,10 @@ 377 0x7FFF //TX_NOISE_TH_5_4 378 0x044C //TX_NOISE_TH_6 379 0x0014 //TX_MINENOISE_TH -380 0x4000 //TX_MINENOISE_MIC0_TH_MTS -381 0xFFEE //TX_MINENOISE_MIC0_TH_EXP -382 0x6000 //TX_MINENOISE_MIC0_S_TH_MTS -383 0xFFF3 //TX_MINENOISE_MIC0_S_TH_EXP +380 0x4000 //TX_MORENS_TFMASK_TH +381 0xFFEE //TX_DRC_QUIET_FLOOR +382 0x6000 //TX_RATIODTL_CUT_TH +383 0xFFF3 //TX_DT_CUT_K1 384 0x0666 //TX_OUT_ENER_S_TH_CLEAN 385 0x0666 //TX_OUT_ENER_S_TH_LESSCLEAN 386 0x0333 //TX_OUT_ENER_S_TH_NOISY @@ -33705,15 +51129,15 @@ 388 0x0333 //TX_OUT_ENER_TH_SPEECH 389 0x2000 //TX_SN_NPB_GAIN 390 0x0000 //TX_NN_NPB_GAIN -391 0x0000 //TX_CSX_ALPHA_0 -392 0x0000 //TX_CSX_ALPHA_1 -393 0x0000 //TX_CSX_ALPHA_2 -394 0x0000 //TX_CSX_ALPHA_3 -395 0x0800 //TX_MU_ARSP_EST -396 0x00C8 //TX_P_OUTBEAM_MIN_TH +391 0x0000 //TX_POST_MASK_SUP_HSNE +392 0x0000 //TX_TAIL_DET_TH +393 0x0000 //TX_B_LESSCUT_RTO_WTA +394 0x0000 //TX_MEL_G_R +395 0x0800 //TX_SUPHIGH_TH +396 0x00C8 //TX_MASK_G_R 397 0x0002 //TX_EXTRA_NS_L -398 0x0800 //TX_EXTRA_NS_A -399 0x0005 //TX_VR_NOISE_FLOOR_TH +398 0x0800 //TX_C_POST_FLT_MASK +399 0x0005 //TX_A_POST_FLT_WNS 400 0x0148 //TX_MIN_G_LOW300HZ 401 0x0002 //TX_MAXLEVEL_CNG 402 0x00B4 //TX_STN_NOISE_TH @@ -33828,16 +51252,16 @@ 511 0x6666 //TX_MIC_TO_BFGAIN 512 0x0000 //TX_MICTOBFGAIN0 513 0x0000 //TX_FASTMUE_TH -514 0x0000 //TX_DERVB_LEN_0 -515 0x0000 //TX_DERVB_LEN_1 -516 0x0000 //TX_RHO_DERVB -517 0x0000 //TX_MIC_INDX_DERVB -518 0x0000 //TX_MU_DERVB -519 0x0000 //TX_DR_RESRV_0 -520 0x0000 //TX_DR_RESRV_1 -521 0x0000 //TX_DR_RESRV_2 -522 0x0000 //TX_DR_RESRV_3 -523 0x0000 //TX_DR_RESRV_4 +514 0x0000 //TX_DEREVERB_LF_MU +515 0x0000 //TX_DEREVERB_HF_MU +516 0x0000 //TX_DEREVERB_DELAY +517 0x0000 //TX_DEREVERB_COEF_LEN +518 0x0000 //TX_DEREVERB_DNR +519 0x0000 //TX_DEREVERB_ALPHA +520 0x0000 //TX_DEREVERB_BETA +521 0x0000 //TX_GSC_RTOL_TH +522 0x0000 //TX_GSC_RTOH_TH +523 0x0000 //TX_WIDE2_MEANHTH 524 0x0000 //TX_DR_RESRV_5 525 0x0000 //TX_DR_RESRV_6 526 0x0000 //TX_DR_RESRV_7 @@ -34211,8 +51635,73 @@ 894 0xC000 //TX_FASTNS_SSA_THHFL 895 0xCCCC //TX_FASTNS_SSA_THLFH 896 0xD999 //TX_FASTNS_SSA_THHFH +897 0x0000 //TX_SENDFUNC_REG_MICMUTE +898 0x0000 //TX_SENDFUNC_REG_MICMUTE1 +899 0x0000 //TX_MICMUTE_RATIO_THR +900 0x0000 //TX_MICMUTE_AMP_THR +901 0x0000 //TX_MICMUTE_HPF_IND +902 0x0000 //TX_MICMUTE_LOG_EYR_TH +903 0x0000 //TX_MICMUTE_CVG_TIME +904 0x0000 //TX_MICMUTE_RELEASE_TIME +905 0x0000 //TX_MIC_VOLUME_MIC0MUTE +906 0x0000 //TX_MICMUTE_EPD_OFFSET_0 +907 0x0000 //TX_MICMUTE_FRQ_AEC_L +908 0x0000 //TX_MICMUTE_EAD_THR +909 0x0000 //TX_MICMUTE_LAMBDA_CB_NLE +910 0x0000 //TX_MICMUTE_LAMBDA_RE_EST +911 0x0000 //TX_DTD_THR1_MICMUTE_0 +912 0x0000 //TX_DTD_THR1_MICMUTE_1 +913 0x0000 //TX_DTD_THR1_MICMUTE_2 +914 0x0000 //TX_DTD_THR1_MICMUTE_3 +915 0x0000 //TX_DTD_THR2_MICMUTE_0 +916 0x0000 //TX_MICMUTE_MIN_EQ_RE_EST_0 +917 0x0000 //TX_MICMUTE_MIN_EQ_RE_EST_1 +918 0x0000 //TX_MICMUTE_MIN_EQ_RE_EST_2 +919 0x0000 //TX_MICMUTE_MIN_EQ_RE_EST_3 +920 0x0000 //TX_MICMUTE_MIN_EQ_RE_EST_4 +921 0x0000 //TX_MICMUTE_C_POST_FLT +922 0x0000 //TX_MICMUTE_DT_CUT_K +923 0x0000 //TX_MICMUTE_DT_CUT_THR +924 0x0000 //TX_MICMUTE_DT_CUT_K2 +925 0x0000 //TX_MICMUTE_DT_CUT_THR2 +926 0x0000 //TX_MICMUTE_DT2_HOLD_N +927 0x0000 //TX_MICMUTE_RATIODTH_THCUT +928 0x0000 //TX_MICMUTE_B_POST_FLT_ECHOL +929 0x0000 //TX_MICMUTE_B_POST_FLT_ECHOH +930 0x0000 //TX_MICMUTE_C_POST_FLT_MASK +931 0x0000 //TX_MICMUTE_RATIODTL_CUT_TH +932 0x0000 //TX_MICMUTE_DT_CUT_K1 +933 0x0000 //TX_MICMUTE_N2_SN_EST +934 0x0000 //TX_MICMUTE_THR_SN_EST_0 +935 0x0000 //TX_MICMUTE_MIN_G_CTRL_0 +936 0x0000 //TX_MICMUTE_A_POST_FILT_S_0 +937 0x0000 //TX_MICMUTE_B_POST_FILT_0 +938 0x0000 //TX_MIC1RUB_AMP_THR +939 0x0000 //TX_MIC1MUTE_RATIO_THR +940 0x0000 //TX_MIC1MUTE_AMP_THR +941 0x0000 //TX_MIC1MUTE_CVG_TIME +942 0x0000 //TX_MIC1MUTE_RELEASE_TIME +943 0x0000 //TX_AMS_RESRV_01 +944 0x0000 //TX_AMS_RESRV_02 +945 0x0000 //TX_AMS_RESRV_03 +946 0x0000 //TX_AMS_RESRV_04 +947 0x0000 //TX_AMS_RESRV_05 +948 0x0000 //TX_AMS_RESRV_06 +949 0x0000 //TX_AMS_RESRV_07 +950 0x0000 //TX_AMS_RESRV_08 +951 0x0000 //TX_AMS_RESRV_09 +952 0x0000 //TX_AMS_RESRV_10 +953 0x0000 //TX_AMS_RESRV_11 +954 0x0000 //TX_AMS_RESRV_12 +955 0x0000 //TX_AMS_RESRV_13 +956 0x0000 //TX_AMS_RESRV_14 +957 0x0000 //TX_AMS_RESRV_15 +958 0x0000 //TX_AMS_RESRV_16 +959 0x0000 //TX_AMS_RESRV_17 +960 0x0000 //TX_AMS_RESRV_18 +961 0x0000 //TX_AMS_RESRV_19 #RX -0 0x0064 //RX_RECVFUNC_MODE_0 +0 0x2064 //RX_RECVFUNC_MODE_0 1 0x0000 //RX_RECVFUNC_MODE_1 2 0x0003 //RX_SAMPLINGFREQ_SIG 3 0x0003 //RX_SAMPLINGFREQ_PROC @@ -35062,10 +52551,862 @@ 110 0x0000 //RX_FDDRC_RESRV_0 129 0x0100 //RX_SPK_VOL 130 0x0000 //RX_VOL_RESRV_0 +#RX 2 +157 0x2064 //RX_RECVFUNC_MODE_0 +158 0x0000 //RX_RECVFUNC_MODE_1 +159 0x0003 //RX_SAMPLINGFREQ_SIG +160 0x0003 //RX_SAMPLINGFREQ_PROC +161 0x000A //RX_FRAME_SZ +162 0x0000 //RX_DELAY_OPT +163 0x3000 //RX_TDDRC_ALPHA_UP_1 +164 0x3000 //RX_TDDRC_ALPHA_UP_2 +165 0x3000 //RX_TDDRC_ALPHA_UP_3 +166 0x3000 //RX_TDDRC_ALPHA_UP_4 +167 0x0800 //RX_PGA +168 0x7FFF //RX_A_HP +169 0x0000 //RX_B_PE +170 0x1800 //RX_THR_PITCH_DET_0 +171 0x1000 //RX_THR_PITCH_DET_1 +172 0x0800 //RX_THR_PITCH_DET_2 +173 0x0008 //RX_PITCH_BFR_LEN +174 0x0003 //RX_SBD_PITCH_DET +175 0x0100 //RX_PP_RESRV_0 +176 0x0020 //RX_PP_RESRV_1 +177 0x0400 //RX_N_SN_EST +178 0x000C //RX_N2_SN_EST +179 0x0003 //RX_NS_LVL_CTRL +180 0x9000 //RX_THR_SN_EST +181 0x7CCD //RX_LAMBDA_PFILT +182 0x000A //RX_FENS_RESRV_0 +183 0x0190 //RX_FENS_RESRV_1 +184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +187 0x0002 //RX_EXTRA_NS_L +188 0x0800 //RX_EXTRA_NS_A +189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +190 0x7FFF //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +192 0x199A //RX_A_POST_FLT +193 0x0000 //RX_LMT_THRD +194 0x4000 //RX_LMT_ALPHA +195 0x0020 //RX_FDEQ_SUBNUM +196 0x4848 //RX_FDEQ_GAIN_0 +197 0x4848 //RX_FDEQ_GAIN_1 +198 0x4848 //RX_FDEQ_GAIN_2 +199 0x4848 //RX_FDEQ_GAIN_3 +200 0x4848 //RX_FDEQ_GAIN_4 +201 0x4848 //RX_FDEQ_GAIN_5 +202 0x4848 //RX_FDEQ_GAIN_6 +203 0x4848 //RX_FDEQ_GAIN_7 +204 0x4848 //RX_FDEQ_GAIN_8 +205 0x4848 //RX_FDEQ_GAIN_9 +206 0x4848 //RX_FDEQ_GAIN_10 +207 0x4848 //RX_FDEQ_GAIN_11 +208 0x4848 //RX_FDEQ_GAIN_12 +209 0x4848 //RX_FDEQ_GAIN_13 +210 0x4848 //RX_FDEQ_GAIN_14 +211 0x4848 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0202 //RX_FDEQ_BIN_0 +221 0x0203 //RX_FDEQ_BIN_1 +222 0x0303 //RX_FDEQ_BIN_2 +223 0x0304 //RX_FDEQ_BIN_3 +224 0x0405 //RX_FDEQ_BIN_4 +225 0x0506 //RX_FDEQ_BIN_5 +226 0x0708 //RX_FDEQ_BIN_6 +227 0x090A //RX_FDEQ_BIN_7 +228 0x0B0C //RX_FDEQ_BIN_8 +229 0x0D0E //RX_FDEQ_BIN_9 +230 0x1013 //RX_FDEQ_BIN_10 +231 0x1719 //RX_FDEQ_BIN_11 +232 0x1B1E //RX_FDEQ_BIN_12 +233 0x1E1E //RX_FDEQ_BIN_13 +234 0x1E28 //RX_FDEQ_BIN_14 +235 0x282C //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x4000 //RX_FDEQ_RESRV_0 +245 0x0320 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0030 //RX_FDDRC_BAND_MARGIN_1 +248 0x0050 //RX_FDDRC_BAND_MARGIN_2 +249 0x0080 //RX_FDDRC_BAND_MARGIN_3 +250 0x0007 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x5000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x6400 //RX_FDDRC_THRD_3_2 +258 0x6400 //RX_FDDRC_THRD_3_3 +259 0x2000 //RX_FDDRC_SLANT_0_0 +260 0x2000 //RX_FDDRC_SLANT_0_1 +261 0x2000 //RX_FDDRC_SLANT_0_2 +262 0x2000 //RX_FDDRC_SLANT_0_3 +263 0x5333 //RX_FDDRC_SLANT_1_0 +264 0x5333 //RX_FDDRC_SLANT_1_1 +265 0x5333 //RX_FDDRC_SLANT_1_2 +266 0x5333 //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +268 0x0000 //RX_FILTINDX +269 0x0000 //RX_TDDRC_THRD_0 +270 0x0000 //RX_TDDRC_THRD_1 +271 0x7FFF //RX_TDDRC_THRD_2 +272 0x7FFF //RX_TDDRC_THRD_3 +273 0x7FFF //RX_TDDRC_SLANT_0 +274 0x7FFF //RX_TDDRC_SLANT_1 +275 0x3000 //RX_TDDRC_ALPHA_UP_0 +276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x199A //RX_TDDRC_HMNC_GAIN +279 0x0001 //RX_TDDRC_SMT_FLAG +280 0x0CCD //RX_TDDRC_SMT_W +281 0x0155 //RX_TDDRC_DRC_GAIN +282 0x7C00 //RX_LAMBDA_PKA_FP +283 0x2000 //RX_TPKA_FP +284 0x2000 //RX_MIN_G_FP +285 0x0080 //RX_MAX_G_FP +286 0x0100 //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 +288 0x0000 //RX_MAXLEVEL_CNG +289 0x3000 //RX_BWE_UV_TH +290 0x3000 //RX_BWE_UV_TH2 +291 0x1800 //RX_BWE_UV_TH3 +292 0x1000 //RX_BWE_V_TH +293 0x04CD //RX_BWE_GAIN1_V_TH1 +294 0x0F33 //RX_BWE_GAIN1_V_TH2 +295 0x7333 //RX_BWE_UV_EQ +296 0x199A //RX_BWE_V_EQ +297 0x7333 //RX_BWE_TONE_TH +298 0x0004 //RX_BWE_UV_HOLD_T +299 0x6CCD //RX_BWE_GAIN2_ALPHA +300 0x799A //RX_BWE_GAIN3_ALPHA +301 0x001E //RX_BWE_CUTOFF +302 0x3000 //RX_BWE_GAINFILL +303 0x3200 //RX_BWE_MAXTH_TONE +304 0x2000 //RX_BWE_EQ_0 +305 0x2000 //RX_BWE_EQ_1 +306 0x2000 //RX_BWE_EQ_2 +307 0x2000 //RX_BWE_EQ_3 +308 0x2000 //RX_BWE_EQ_4 +309 0x2000 //RX_BWE_EQ_5 +310 0x2000 //RX_BWE_EQ_6 +311 0x0000 //RX_BWE_RESRV_0 +312 0x0000 //RX_BWE_RESRV_1 +313 0x0000 //RX_BWE_RESRV_2 +#VOL 0 +163 0x3000 //RX_TDDRC_ALPHA_UP_1 +164 0x3000 //RX_TDDRC_ALPHA_UP_2 +165 0x3000 //RX_TDDRC_ALPHA_UP_3 +166 0x3000 //RX_TDDRC_ALPHA_UP_4 +184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +190 0x7FFF //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +269 0x0000 //RX_TDDRC_THRD_0 +270 0x0000 //RX_TDDRC_THRD_1 +271 0x7FFF //RX_TDDRC_THRD_2 +272 0x7FFF //RX_TDDRC_THRD_3 +273 0x7FFF //RX_TDDRC_SLANT_0 +274 0x7FFF //RX_TDDRC_SLANT_1 +275 0x3000 //RX_TDDRC_ALPHA_UP_0 +276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x199A //RX_TDDRC_HMNC_GAIN +279 0x0001 //RX_TDDRC_SMT_FLAG +280 0x0CCD //RX_TDDRC_SMT_W +281 0x0155 //RX_TDDRC_DRC_GAIN +195 0x0020 //RX_FDEQ_SUBNUM +196 0x4848 //RX_FDEQ_GAIN_0 +197 0x4848 //RX_FDEQ_GAIN_1 +198 0x4848 //RX_FDEQ_GAIN_2 +199 0x4848 //RX_FDEQ_GAIN_3 +200 0x4848 //RX_FDEQ_GAIN_4 +201 0x4848 //RX_FDEQ_GAIN_5 +202 0x4848 //RX_FDEQ_GAIN_6 +203 0x4848 //RX_FDEQ_GAIN_7 +204 0x4848 //RX_FDEQ_GAIN_8 +205 0x4848 //RX_FDEQ_GAIN_9 +206 0x4848 //RX_FDEQ_GAIN_10 +207 0x4848 //RX_FDEQ_GAIN_11 +208 0x4848 //RX_FDEQ_GAIN_12 +209 0x4848 //RX_FDEQ_GAIN_13 +210 0x4848 //RX_FDEQ_GAIN_14 +211 0x4848 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0202 //RX_FDEQ_BIN_0 +221 0x0203 //RX_FDEQ_BIN_1 +222 0x0303 //RX_FDEQ_BIN_2 +223 0x0304 //RX_FDEQ_BIN_3 +224 0x0405 //RX_FDEQ_BIN_4 +225 0x0506 //RX_FDEQ_BIN_5 +226 0x0708 //RX_FDEQ_BIN_6 +227 0x090A //RX_FDEQ_BIN_7 +228 0x0B0C //RX_FDEQ_BIN_8 +229 0x0D0E //RX_FDEQ_BIN_9 +230 0x1013 //RX_FDEQ_BIN_10 +231 0x1719 //RX_FDEQ_BIN_11 +232 0x1B1E //RX_FDEQ_BIN_12 +233 0x1E1E //RX_FDEQ_BIN_13 +234 0x1E28 //RX_FDEQ_BIN_14 +235 0x282C //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x4000 //RX_FDEQ_RESRV_0 +245 0x0320 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0030 //RX_FDDRC_BAND_MARGIN_1 +248 0x0050 //RX_FDDRC_BAND_MARGIN_2 +249 0x0080 //RX_FDDRC_BAND_MARGIN_3 +250 0x0007 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x5000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x6400 //RX_FDDRC_THRD_3_2 +258 0x6400 //RX_FDDRC_THRD_3_3 +259 0x2000 //RX_FDDRC_SLANT_0_0 +260 0x2000 //RX_FDDRC_SLANT_0_1 +261 0x2000 //RX_FDDRC_SLANT_0_2 +262 0x2000 //RX_FDDRC_SLANT_0_3 +263 0x5333 //RX_FDDRC_SLANT_1_0 +264 0x5333 //RX_FDDRC_SLANT_1_1 +265 0x5333 //RX_FDDRC_SLANT_1_2 +266 0x5333 //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +286 0x0100 //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 +#VOL 1 +163 0x3000 //RX_TDDRC_ALPHA_UP_1 +164 0x3000 //RX_TDDRC_ALPHA_UP_2 +165 0x3000 //RX_TDDRC_ALPHA_UP_3 +166 0x3000 //RX_TDDRC_ALPHA_UP_4 +184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +190 0x7FFF //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +269 0x0000 //RX_TDDRC_THRD_0 +270 0x0000 //RX_TDDRC_THRD_1 +271 0x7FFF //RX_TDDRC_THRD_2 +272 0x7FFF //RX_TDDRC_THRD_3 +273 0x7FFF //RX_TDDRC_SLANT_0 +274 0x7FFF //RX_TDDRC_SLANT_1 +275 0x3000 //RX_TDDRC_ALPHA_UP_0 +276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x199A //RX_TDDRC_HMNC_GAIN +279 0x0001 //RX_TDDRC_SMT_FLAG +280 0x0CCD //RX_TDDRC_SMT_W +281 0x0155 //RX_TDDRC_DRC_GAIN +195 0x0020 //RX_FDEQ_SUBNUM +196 0x4848 //RX_FDEQ_GAIN_0 +197 0x4848 //RX_FDEQ_GAIN_1 +198 0x4848 //RX_FDEQ_GAIN_2 +199 0x4848 //RX_FDEQ_GAIN_3 +200 0x4848 //RX_FDEQ_GAIN_4 +201 0x4848 //RX_FDEQ_GAIN_5 +202 0x4848 //RX_FDEQ_GAIN_6 +203 0x4848 //RX_FDEQ_GAIN_7 +204 0x4848 //RX_FDEQ_GAIN_8 +205 0x4848 //RX_FDEQ_GAIN_9 +206 0x4848 //RX_FDEQ_GAIN_10 +207 0x4848 //RX_FDEQ_GAIN_11 +208 0x4848 //RX_FDEQ_GAIN_12 +209 0x4848 //RX_FDEQ_GAIN_13 +210 0x4848 //RX_FDEQ_GAIN_14 +211 0x4848 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0202 //RX_FDEQ_BIN_0 +221 0x0203 //RX_FDEQ_BIN_1 +222 0x0303 //RX_FDEQ_BIN_2 +223 0x0304 //RX_FDEQ_BIN_3 +224 0x0405 //RX_FDEQ_BIN_4 +225 0x0506 //RX_FDEQ_BIN_5 +226 0x0708 //RX_FDEQ_BIN_6 +227 0x090A //RX_FDEQ_BIN_7 +228 0x0B0C //RX_FDEQ_BIN_8 +229 0x0D0E //RX_FDEQ_BIN_9 +230 0x1013 //RX_FDEQ_BIN_10 +231 0x1719 //RX_FDEQ_BIN_11 +232 0x1B1E //RX_FDEQ_BIN_12 +233 0x1E1E //RX_FDEQ_BIN_13 +234 0x1E28 //RX_FDEQ_BIN_14 +235 0x282C //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x4000 //RX_FDEQ_RESRV_0 +245 0x0320 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0030 //RX_FDDRC_BAND_MARGIN_1 +248 0x0050 //RX_FDDRC_BAND_MARGIN_2 +249 0x0080 //RX_FDDRC_BAND_MARGIN_3 +250 0x0007 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x5000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x6400 //RX_FDDRC_THRD_3_2 +258 0x6400 //RX_FDDRC_THRD_3_3 +259 0x2000 //RX_FDDRC_SLANT_0_0 +260 0x2000 //RX_FDDRC_SLANT_0_1 +261 0x2000 //RX_FDDRC_SLANT_0_2 +262 0x2000 //RX_FDDRC_SLANT_0_3 +263 0x5333 //RX_FDDRC_SLANT_1_0 +264 0x5333 //RX_FDDRC_SLANT_1_1 +265 0x5333 //RX_FDDRC_SLANT_1_2 +266 0x5333 //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +286 0x0100 //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 +#VOL 2 +163 0x3000 //RX_TDDRC_ALPHA_UP_1 +164 0x3000 //RX_TDDRC_ALPHA_UP_2 +165 0x3000 //RX_TDDRC_ALPHA_UP_3 +166 0x3000 //RX_TDDRC_ALPHA_UP_4 +184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +190 0x7FFF //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +269 0x0000 //RX_TDDRC_THRD_0 +270 0x0000 //RX_TDDRC_THRD_1 +271 0x7FFF //RX_TDDRC_THRD_2 +272 0x7FFF //RX_TDDRC_THRD_3 +273 0x7FFF //RX_TDDRC_SLANT_0 +274 0x7FFF //RX_TDDRC_SLANT_1 +275 0x3000 //RX_TDDRC_ALPHA_UP_0 +276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x199A //RX_TDDRC_HMNC_GAIN +279 0x0001 //RX_TDDRC_SMT_FLAG +280 0x0CCD //RX_TDDRC_SMT_W +281 0x0155 //RX_TDDRC_DRC_GAIN +195 0x0020 //RX_FDEQ_SUBNUM +196 0x4848 //RX_FDEQ_GAIN_0 +197 0x4848 //RX_FDEQ_GAIN_1 +198 0x4848 //RX_FDEQ_GAIN_2 +199 0x4848 //RX_FDEQ_GAIN_3 +200 0x4848 //RX_FDEQ_GAIN_4 +201 0x4848 //RX_FDEQ_GAIN_5 +202 0x4848 //RX_FDEQ_GAIN_6 +203 0x4848 //RX_FDEQ_GAIN_7 +204 0x4848 //RX_FDEQ_GAIN_8 +205 0x4848 //RX_FDEQ_GAIN_9 +206 0x4848 //RX_FDEQ_GAIN_10 +207 0x4848 //RX_FDEQ_GAIN_11 +208 0x4848 //RX_FDEQ_GAIN_12 +209 0x4848 //RX_FDEQ_GAIN_13 +210 0x4848 //RX_FDEQ_GAIN_14 +211 0x4848 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0202 //RX_FDEQ_BIN_0 +221 0x0203 //RX_FDEQ_BIN_1 +222 0x0303 //RX_FDEQ_BIN_2 +223 0x0304 //RX_FDEQ_BIN_3 +224 0x0405 //RX_FDEQ_BIN_4 +225 0x0506 //RX_FDEQ_BIN_5 +226 0x0708 //RX_FDEQ_BIN_6 +227 0x090A //RX_FDEQ_BIN_7 +228 0x0B0C //RX_FDEQ_BIN_8 +229 0x0D0E //RX_FDEQ_BIN_9 +230 0x1013 //RX_FDEQ_BIN_10 +231 0x1719 //RX_FDEQ_BIN_11 +232 0x1B1E //RX_FDEQ_BIN_12 +233 0x1E1E //RX_FDEQ_BIN_13 +234 0x1E28 //RX_FDEQ_BIN_14 +235 0x282C //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x4000 //RX_FDEQ_RESRV_0 +245 0x0320 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0030 //RX_FDDRC_BAND_MARGIN_1 +248 0x0050 //RX_FDDRC_BAND_MARGIN_2 +249 0x0080 //RX_FDDRC_BAND_MARGIN_3 +250 0x0007 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x5000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x6400 //RX_FDDRC_THRD_3_2 +258 0x6400 //RX_FDDRC_THRD_3_3 +259 0x2000 //RX_FDDRC_SLANT_0_0 +260 0x2000 //RX_FDDRC_SLANT_0_1 +261 0x2000 //RX_FDDRC_SLANT_0_2 +262 0x2000 //RX_FDDRC_SLANT_0_3 +263 0x5333 //RX_FDDRC_SLANT_1_0 +264 0x5333 //RX_FDDRC_SLANT_1_1 +265 0x5333 //RX_FDDRC_SLANT_1_2 +266 0x5333 //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +286 0x0100 //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 +#VOL 3 +163 0x3000 //RX_TDDRC_ALPHA_UP_1 +164 0x3000 //RX_TDDRC_ALPHA_UP_2 +165 0x3000 //RX_TDDRC_ALPHA_UP_3 +166 0x3000 //RX_TDDRC_ALPHA_UP_4 +184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +190 0x7FFF //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +269 0x0000 //RX_TDDRC_THRD_0 +270 0x0000 //RX_TDDRC_THRD_1 +271 0x7FFF //RX_TDDRC_THRD_2 +272 0x7FFF //RX_TDDRC_THRD_3 +273 0x7FFF //RX_TDDRC_SLANT_0 +274 0x7FFF //RX_TDDRC_SLANT_1 +275 0x3000 //RX_TDDRC_ALPHA_UP_0 +276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x199A //RX_TDDRC_HMNC_GAIN +279 0x0001 //RX_TDDRC_SMT_FLAG +280 0x0CCD //RX_TDDRC_SMT_W +281 0x0155 //RX_TDDRC_DRC_GAIN +195 0x0020 //RX_FDEQ_SUBNUM +196 0x4848 //RX_FDEQ_GAIN_0 +197 0x4848 //RX_FDEQ_GAIN_1 +198 0x4848 //RX_FDEQ_GAIN_2 +199 0x4848 //RX_FDEQ_GAIN_3 +200 0x4848 //RX_FDEQ_GAIN_4 +201 0x4848 //RX_FDEQ_GAIN_5 +202 0x4848 //RX_FDEQ_GAIN_6 +203 0x4848 //RX_FDEQ_GAIN_7 +204 0x4848 //RX_FDEQ_GAIN_8 +205 0x4848 //RX_FDEQ_GAIN_9 +206 0x4848 //RX_FDEQ_GAIN_10 +207 0x4848 //RX_FDEQ_GAIN_11 +208 0x4848 //RX_FDEQ_GAIN_12 +209 0x4848 //RX_FDEQ_GAIN_13 +210 0x4848 //RX_FDEQ_GAIN_14 +211 0x4848 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0202 //RX_FDEQ_BIN_0 +221 0x0203 //RX_FDEQ_BIN_1 +222 0x0303 //RX_FDEQ_BIN_2 +223 0x0304 //RX_FDEQ_BIN_3 +224 0x0405 //RX_FDEQ_BIN_4 +225 0x0506 //RX_FDEQ_BIN_5 +226 0x0708 //RX_FDEQ_BIN_6 +227 0x090A //RX_FDEQ_BIN_7 +228 0x0B0C //RX_FDEQ_BIN_8 +229 0x0D0E //RX_FDEQ_BIN_9 +230 0x1013 //RX_FDEQ_BIN_10 +231 0x1719 //RX_FDEQ_BIN_11 +232 0x1B1E //RX_FDEQ_BIN_12 +233 0x1E1E //RX_FDEQ_BIN_13 +234 0x1E28 //RX_FDEQ_BIN_14 +235 0x282C //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x4000 //RX_FDEQ_RESRV_0 +245 0x0320 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0030 //RX_FDDRC_BAND_MARGIN_1 +248 0x0050 //RX_FDDRC_BAND_MARGIN_2 +249 0x0080 //RX_FDDRC_BAND_MARGIN_3 +250 0x0007 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x5000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x6400 //RX_FDDRC_THRD_3_2 +258 0x6400 //RX_FDDRC_THRD_3_3 +259 0x2000 //RX_FDDRC_SLANT_0_0 +260 0x2000 //RX_FDDRC_SLANT_0_1 +261 0x2000 //RX_FDDRC_SLANT_0_2 +262 0x2000 //RX_FDDRC_SLANT_0_3 +263 0x5333 //RX_FDDRC_SLANT_1_0 +264 0x5333 //RX_FDDRC_SLANT_1_1 +265 0x5333 //RX_FDDRC_SLANT_1_2 +266 0x5333 //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +286 0x0100 //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 +#VOL 4 +163 0x3000 //RX_TDDRC_ALPHA_UP_1 +164 0x3000 //RX_TDDRC_ALPHA_UP_2 +165 0x3000 //RX_TDDRC_ALPHA_UP_3 +166 0x3000 //RX_TDDRC_ALPHA_UP_4 +184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +190 0x7FFF //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +269 0x0000 //RX_TDDRC_THRD_0 +270 0x0000 //RX_TDDRC_THRD_1 +271 0x7FFF //RX_TDDRC_THRD_2 +272 0x7FFF //RX_TDDRC_THRD_3 +273 0x7FFF //RX_TDDRC_SLANT_0 +274 0x7FFF //RX_TDDRC_SLANT_1 +275 0x3000 //RX_TDDRC_ALPHA_UP_0 +276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x199A //RX_TDDRC_HMNC_GAIN +279 0x0001 //RX_TDDRC_SMT_FLAG +280 0x0CCD //RX_TDDRC_SMT_W +281 0x0155 //RX_TDDRC_DRC_GAIN +195 0x0020 //RX_FDEQ_SUBNUM +196 0x4848 //RX_FDEQ_GAIN_0 +197 0x4848 //RX_FDEQ_GAIN_1 +198 0x4848 //RX_FDEQ_GAIN_2 +199 0x4848 //RX_FDEQ_GAIN_3 +200 0x4848 //RX_FDEQ_GAIN_4 +201 0x4848 //RX_FDEQ_GAIN_5 +202 0x4848 //RX_FDEQ_GAIN_6 +203 0x4848 //RX_FDEQ_GAIN_7 +204 0x4848 //RX_FDEQ_GAIN_8 +205 0x4848 //RX_FDEQ_GAIN_9 +206 0x4848 //RX_FDEQ_GAIN_10 +207 0x4848 //RX_FDEQ_GAIN_11 +208 0x4848 //RX_FDEQ_GAIN_12 +209 0x4848 //RX_FDEQ_GAIN_13 +210 0x4848 //RX_FDEQ_GAIN_14 +211 0x4848 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0202 //RX_FDEQ_BIN_0 +221 0x0203 //RX_FDEQ_BIN_1 +222 0x0303 //RX_FDEQ_BIN_2 +223 0x0304 //RX_FDEQ_BIN_3 +224 0x0405 //RX_FDEQ_BIN_4 +225 0x0506 //RX_FDEQ_BIN_5 +226 0x0708 //RX_FDEQ_BIN_6 +227 0x090A //RX_FDEQ_BIN_7 +228 0x0B0C //RX_FDEQ_BIN_8 +229 0x0D0E //RX_FDEQ_BIN_9 +230 0x1013 //RX_FDEQ_BIN_10 +231 0x1719 //RX_FDEQ_BIN_11 +232 0x1B1E //RX_FDEQ_BIN_12 +233 0x1E1E //RX_FDEQ_BIN_13 +234 0x1E28 //RX_FDEQ_BIN_14 +235 0x282C //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x4000 //RX_FDEQ_RESRV_0 +245 0x0320 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0030 //RX_FDDRC_BAND_MARGIN_1 +248 0x0050 //RX_FDDRC_BAND_MARGIN_2 +249 0x0080 //RX_FDDRC_BAND_MARGIN_3 +250 0x0007 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x5000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x6400 //RX_FDDRC_THRD_3_2 +258 0x6400 //RX_FDDRC_THRD_3_3 +259 0x2000 //RX_FDDRC_SLANT_0_0 +260 0x2000 //RX_FDDRC_SLANT_0_1 +261 0x2000 //RX_FDDRC_SLANT_0_2 +262 0x2000 //RX_FDDRC_SLANT_0_3 +263 0x5333 //RX_FDDRC_SLANT_1_0 +264 0x5333 //RX_FDDRC_SLANT_1_1 +265 0x5333 //RX_FDDRC_SLANT_1_2 +266 0x5333 //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +286 0x0100 //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 +#VOL 5 +163 0x3000 //RX_TDDRC_ALPHA_UP_1 +164 0x3000 //RX_TDDRC_ALPHA_UP_2 +165 0x3000 //RX_TDDRC_ALPHA_UP_3 +166 0x3000 //RX_TDDRC_ALPHA_UP_4 +184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +190 0x7FFF //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +269 0x0000 //RX_TDDRC_THRD_0 +270 0x0000 //RX_TDDRC_THRD_1 +271 0x7FFF //RX_TDDRC_THRD_2 +272 0x7FFF //RX_TDDRC_THRD_3 +273 0x7FFF //RX_TDDRC_SLANT_0 +274 0x7FFF //RX_TDDRC_SLANT_1 +275 0x3000 //RX_TDDRC_ALPHA_UP_0 +276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x199A //RX_TDDRC_HMNC_GAIN +279 0x0001 //RX_TDDRC_SMT_FLAG +280 0x0CCD //RX_TDDRC_SMT_W +281 0x0155 //RX_TDDRC_DRC_GAIN +195 0x0020 //RX_FDEQ_SUBNUM +196 0x4848 //RX_FDEQ_GAIN_0 +197 0x4848 //RX_FDEQ_GAIN_1 +198 0x4848 //RX_FDEQ_GAIN_2 +199 0x4848 //RX_FDEQ_GAIN_3 +200 0x4848 //RX_FDEQ_GAIN_4 +201 0x4848 //RX_FDEQ_GAIN_5 +202 0x4848 //RX_FDEQ_GAIN_6 +203 0x4848 //RX_FDEQ_GAIN_7 +204 0x4848 //RX_FDEQ_GAIN_8 +205 0x4848 //RX_FDEQ_GAIN_9 +206 0x4848 //RX_FDEQ_GAIN_10 +207 0x4848 //RX_FDEQ_GAIN_11 +208 0x4848 //RX_FDEQ_GAIN_12 +209 0x4848 //RX_FDEQ_GAIN_13 +210 0x4848 //RX_FDEQ_GAIN_14 +211 0x4848 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0202 //RX_FDEQ_BIN_0 +221 0x0203 //RX_FDEQ_BIN_1 +222 0x0303 //RX_FDEQ_BIN_2 +223 0x0304 //RX_FDEQ_BIN_3 +224 0x0405 //RX_FDEQ_BIN_4 +225 0x0506 //RX_FDEQ_BIN_5 +226 0x0708 //RX_FDEQ_BIN_6 +227 0x090A //RX_FDEQ_BIN_7 +228 0x0B0C //RX_FDEQ_BIN_8 +229 0x0D0E //RX_FDEQ_BIN_9 +230 0x1013 //RX_FDEQ_BIN_10 +231 0x1719 //RX_FDEQ_BIN_11 +232 0x1B1E //RX_FDEQ_BIN_12 +233 0x1E1E //RX_FDEQ_BIN_13 +234 0x1E28 //RX_FDEQ_BIN_14 +235 0x282C //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x4000 //RX_FDEQ_RESRV_0 +245 0x0320 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0030 //RX_FDDRC_BAND_MARGIN_1 +248 0x0050 //RX_FDDRC_BAND_MARGIN_2 +249 0x0080 //RX_FDDRC_BAND_MARGIN_3 +250 0x0007 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x5000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x6400 //RX_FDDRC_THRD_3_2 +258 0x6400 //RX_FDDRC_THRD_3_3 +259 0x2000 //RX_FDDRC_SLANT_0_0 +260 0x2000 //RX_FDDRC_SLANT_0_1 +261 0x2000 //RX_FDDRC_SLANT_0_2 +262 0x2000 //RX_FDDRC_SLANT_0_3 +263 0x5333 //RX_FDDRC_SLANT_1_0 +264 0x5333 //RX_FDDRC_SLANT_1_1 +265 0x5333 //RX_FDDRC_SLANT_1_2 +266 0x5333 //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +286 0x0100 //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 +#VOL 6 +163 0x3000 //RX_TDDRC_ALPHA_UP_1 +164 0x3000 //RX_TDDRC_ALPHA_UP_2 +165 0x3000 //RX_TDDRC_ALPHA_UP_3 +166 0x3000 //RX_TDDRC_ALPHA_UP_4 +184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +190 0x7FFF //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +269 0x0000 //RX_TDDRC_THRD_0 +270 0x0000 //RX_TDDRC_THRD_1 +271 0x7FFF //RX_TDDRC_THRD_2 +272 0x7FFF //RX_TDDRC_THRD_3 +273 0x7FFF //RX_TDDRC_SLANT_0 +274 0x7FFF //RX_TDDRC_SLANT_1 +275 0x3000 //RX_TDDRC_ALPHA_UP_0 +276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x199A //RX_TDDRC_HMNC_GAIN +279 0x0001 //RX_TDDRC_SMT_FLAG +280 0x0CCD //RX_TDDRC_SMT_W +281 0x0155 //RX_TDDRC_DRC_GAIN +195 0x0020 //RX_FDEQ_SUBNUM +196 0x4848 //RX_FDEQ_GAIN_0 +197 0x4848 //RX_FDEQ_GAIN_1 +198 0x4848 //RX_FDEQ_GAIN_2 +199 0x4848 //RX_FDEQ_GAIN_3 +200 0x4848 //RX_FDEQ_GAIN_4 +201 0x4848 //RX_FDEQ_GAIN_5 +202 0x4848 //RX_FDEQ_GAIN_6 +203 0x4848 //RX_FDEQ_GAIN_7 +204 0x4848 //RX_FDEQ_GAIN_8 +205 0x4848 //RX_FDEQ_GAIN_9 +206 0x4848 //RX_FDEQ_GAIN_10 +207 0x4848 //RX_FDEQ_GAIN_11 +208 0x4848 //RX_FDEQ_GAIN_12 +209 0x4848 //RX_FDEQ_GAIN_13 +210 0x4848 //RX_FDEQ_GAIN_14 +211 0x4848 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0202 //RX_FDEQ_BIN_0 +221 0x0203 //RX_FDEQ_BIN_1 +222 0x0303 //RX_FDEQ_BIN_2 +223 0x0304 //RX_FDEQ_BIN_3 +224 0x0405 //RX_FDEQ_BIN_4 +225 0x0506 //RX_FDEQ_BIN_5 +226 0x0708 //RX_FDEQ_BIN_6 +227 0x090A //RX_FDEQ_BIN_7 +228 0x0B0C //RX_FDEQ_BIN_8 +229 0x0D0E //RX_FDEQ_BIN_9 +230 0x1013 //RX_FDEQ_BIN_10 +231 0x1719 //RX_FDEQ_BIN_11 +232 0x1B1E //RX_FDEQ_BIN_12 +233 0x1E1E //RX_FDEQ_BIN_13 +234 0x1E28 //RX_FDEQ_BIN_14 +235 0x282C //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x4000 //RX_FDEQ_RESRV_0 +245 0x0320 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0030 //RX_FDDRC_BAND_MARGIN_1 +248 0x0050 //RX_FDDRC_BAND_MARGIN_2 +249 0x0080 //RX_FDDRC_BAND_MARGIN_3 +250 0x0007 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x5000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x6400 //RX_FDDRC_THRD_3_2 +258 0x6400 //RX_FDDRC_THRD_3_3 +259 0x2000 //RX_FDDRC_SLANT_0_0 +260 0x2000 //RX_FDDRC_SLANT_0_1 +261 0x2000 //RX_FDDRC_SLANT_0_2 +262 0x2000 //RX_FDDRC_SLANT_0_3 +263 0x5333 //RX_FDDRC_SLANT_1_0 +264 0x5333 //RX_FDDRC_SLANT_1_1 +265 0x5333 //RX_FDDRC_SLANT_1_2 +266 0x5333 //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +286 0x0100 //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 #CASE_NAME BLUETOOTH-BTWB_NREC-VOICE_GENERIC-FB -#PARAM_TYPE TX+RX -#TOTAL_CUSTOM_STEP 7 +#PARAM_MODE Full +#PARAM_TYPE TX+2RX +#TOTAL_CUSTOM_STEP 7+7 #TX 0 0x0009 //TX_OPERATION_MODE_0 1 0x0009 //TX_OPERATION_MODE_1 @@ -35318,10 +53659,10 @@ 248 0xF600 //TX_THR_SN_EST_6 249 0xF600 //TX_THR_SN_EST_7 250 0x0200 //TX_DELTA_THR_SN_EST_0 -251 0x0200 //TX_DELTA_THR_SN_EST_1 -252 0x0400 //TX_DELTA_THR_SN_EST_2 -253 0x0300 //TX_DELTA_THR_SN_EST_3 -254 0x0600 //TX_DELTA_THR_SN_EST_4 +251 0x0400 //TX_DELTA_THR_SN_EST_1 +252 0x0300 //TX_DELTA_THR_SN_EST_2 +253 0x0600 //TX_DELTA_THR_SN_EST_3 +254 0x0200 //TX_DELTA_THR_SN_EST_4 255 0x0200 //TX_DELTA_THR_SN_EST_5 256 0x0200 //TX_DELTA_THR_SN_EST_6 257 0x0200 //TX_DELTA_THR_SN_EST_7 @@ -35349,31 +53690,31 @@ 279 0x2000 //TX_B_POST_FLT_0 280 0x2000 //TX_B_POST_FLT_1 281 0x0012 //TX_NS_LVL_CTRL_0 -282 0x0019 //TX_NS_LVL_CTRL_1 +282 0x0016 //TX_NS_LVL_CTRL_1 283 0x0016 //TX_NS_LVL_CTRL_2 -284 0x0016 //TX_NS_LVL_CTRL_3 -285 0x0019 //TX_NS_LVL_CTRL_4 +284 0x0019 //TX_NS_LVL_CTRL_3 +285 0x0010 //TX_NS_LVL_CTRL_4 286 0x0010 //TX_NS_LVL_CTRL_5 -287 0x0010 //TX_NS_LVL_CTRL_6 +287 0x0019 //TX_NS_LVL_CTRL_6 288 0x0010 //TX_NS_LVL_CTRL_7 289 0x000C //TX_MIN_GAIN_S_0 -290 0x0011 //TX_MIN_GAIN_S_1 +290 0x000C //TX_MIN_GAIN_S_1 291 0x000C //TX_MIN_GAIN_S_2 -292 0x000C //TX_MIN_GAIN_S_3 -293 0x000F //TX_MIN_GAIN_S_4 +292 0x000F //TX_MIN_GAIN_S_3 +293 0x000C //TX_MIN_GAIN_S_4 294 0x000C //TX_MIN_GAIN_S_5 -295 0x000C //TX_MIN_GAIN_S_6 +295 0x0011 //TX_MIN_GAIN_S_6 296 0x000C //TX_MIN_GAIN_S_7 297 0x7FFF //TX_NMOS_SUP 298 0x0000 //TX_NS_MAX_PRI_SNR_TH 299 0x0000 //TX_NMOS_SUP_MENSA 300 0x7000 //TX_SNRI_SUP_0 -301 0x6000 //TX_SNRI_SUP_1 +301 0x7000 //TX_SNRI_SUP_1 302 0x7000 //TX_SNRI_SUP_2 -303 0x7000 //TX_SNRI_SUP_3 -304 0x6000 //TX_SNRI_SUP_4 +303 0x6000 //TX_SNRI_SUP_3 +304 0x7FFF //TX_SNRI_SUP_4 305 0x7FFF //TX_SNRI_SUP_5 -306 0x7FFF //TX_SNRI_SUP_6 +306 0x6000 //TX_SNRI_SUP_6 307 0x7FFF //TX_SNRI_SUP_7 308 0x7FFF //TX_THR_LFNS 309 0x0016 //TX_G_LFNS @@ -35390,8 +53731,8 @@ 320 0x6000 //TX_A_POST_FILT_S_6 321 0x6000 //TX_A_POST_FILT_S_7 322 0x2000 //TX_B_POST_FILT_0 -323 0x2000 //TX_B_POST_FILT_1 -324 0x4000 //TX_B_POST_FILT_2 +323 0x4000 //TX_B_POST_FILT_1 +324 0x2000 //TX_B_POST_FILT_2 325 0x2000 //TX_B_POST_FILT_3 326 0x2000 //TX_B_POST_FILT_4 327 0x2000 //TX_B_POST_FILT_5 @@ -35447,10 +53788,10 @@ 377 0x0000 //TX_NOISE_TH_5_4 378 0x02BC //TX_NOISE_TH_6 379 0x0020 //TX_MINENOISE_TH -380 0x4000 //TX_MINENOISE_MIC0_TH_MTS -381 0xFFEE //TX_MINENOISE_MIC0_TH_EXP -382 0x6000 //TX_MINENOISE_MIC0_S_TH_MTS -383 0xFFF3 //TX_MINENOISE_MIC0_S_TH_EXP +380 0x4000 //TX_MORENS_TFMASK_TH +381 0xFFEE //TX_DRC_QUIET_FLOOR +382 0x6000 //TX_RATIODTL_CUT_TH +383 0xFFF3 //TX_DT_CUT_K1 384 0x0666 //TX_OUT_ENER_S_TH_CLEAN 385 0x0666 //TX_OUT_ENER_S_TH_LESSCLEAN 386 0x0333 //TX_OUT_ENER_S_TH_NOISY @@ -35458,15 +53799,15 @@ 388 0x0333 //TX_OUT_ENER_TH_SPEECH 389 0x2000 //TX_SN_NPB_GAIN 390 0x0000 //TX_NN_NPB_GAIN -391 0x0000 //TX_CSX_ALPHA_0 -392 0x0000 //TX_CSX_ALPHA_1 -393 0x0000 //TX_CSX_ALPHA_2 -394 0x0000 //TX_CSX_ALPHA_3 -395 0x0800 //TX_MU_ARSP_EST -396 0x00C8 //TX_P_OUTBEAM_MIN_TH +391 0x0000 //TX_POST_MASK_SUP_HSNE +392 0x0000 //TX_TAIL_DET_TH +393 0x0000 //TX_B_LESSCUT_RTO_WTA +394 0x0000 //TX_MEL_G_R +395 0x0800 //TX_SUPHIGH_TH +396 0x00C8 //TX_MASK_G_R 397 0x0002 //TX_EXTRA_NS_L -398 0x0800 //TX_EXTRA_NS_A -399 0x0005 //TX_VR_NOISE_FLOOR_TH +398 0x0800 //TX_C_POST_FLT_MASK +399 0x0005 //TX_A_POST_FLT_WNS 400 0x0148 //TX_MIN_G_LOW300HZ 401 0x0002 //TX_MAXLEVEL_CNG 402 0x00B4 //TX_STN_NOISE_TH @@ -35581,16 +53922,16 @@ 511 0x6666 //TX_MIC_TO_BFGAIN 512 0x0000 //TX_MICTOBFGAIN0 513 0x0000 //TX_FASTMUE_TH -514 0x0000 //TX_DERVB_LEN_0 -515 0x0000 //TX_DERVB_LEN_1 -516 0x0000 //TX_RHO_DERVB -517 0x0000 //TX_MIC_INDX_DERVB -518 0x0000 //TX_MU_DERVB -519 0x0000 //TX_DR_RESRV_0 -520 0x0000 //TX_DR_RESRV_1 -521 0x0000 //TX_DR_RESRV_2 -522 0x0000 //TX_DR_RESRV_3 -523 0x0000 //TX_DR_RESRV_4 +514 0x0000 //TX_DEREVERB_LF_MU +515 0x0000 //TX_DEREVERB_HF_MU +516 0x0000 //TX_DEREVERB_DELAY +517 0x0000 //TX_DEREVERB_COEF_LEN +518 0x0000 //TX_DEREVERB_DNR +519 0x0000 //TX_DEREVERB_ALPHA +520 0x0000 //TX_DEREVERB_BETA +521 0x0000 //TX_GSC_RTOL_TH +522 0x0000 //TX_GSC_RTOH_TH +523 0x0000 //TX_WIDE2_MEANHTH 524 0x0000 //TX_DR_RESRV_5 525 0x0000 //TX_DR_RESRV_6 526 0x0000 //TX_DR_RESRV_7 @@ -35964,8 +54305,73 @@ 894 0xC000 //TX_FASTNS_SSA_THHFL 895 0xCCCC //TX_FASTNS_SSA_THLFH 896 0xD999 //TX_FASTNS_SSA_THHFH +897 0x0000 //TX_SENDFUNC_REG_MICMUTE +898 0x0000 //TX_SENDFUNC_REG_MICMUTE1 +899 0x0000 //TX_MICMUTE_RATIO_THR +900 0x0000 //TX_MICMUTE_AMP_THR +901 0x0000 //TX_MICMUTE_HPF_IND +902 0x0000 //TX_MICMUTE_LOG_EYR_TH +903 0x0000 //TX_MICMUTE_CVG_TIME +904 0x0000 //TX_MICMUTE_RELEASE_TIME +905 0x0000 //TX_MIC_VOLUME_MIC0MUTE +906 0x0000 //TX_MICMUTE_EPD_OFFSET_0 +907 0x0000 //TX_MICMUTE_FRQ_AEC_L +908 0x0000 //TX_MICMUTE_EAD_THR +909 0x0000 //TX_MICMUTE_LAMBDA_CB_NLE +910 0x0000 //TX_MICMUTE_LAMBDA_RE_EST +911 0x0000 //TX_DTD_THR1_MICMUTE_0 +912 0x0000 //TX_DTD_THR1_MICMUTE_1 +913 0x0000 //TX_DTD_THR1_MICMUTE_2 +914 0x0000 //TX_DTD_THR1_MICMUTE_3 +915 0x0000 //TX_DTD_THR2_MICMUTE_0 +916 0x0000 //TX_MICMUTE_MIN_EQ_RE_EST_0 +917 0x0000 //TX_MICMUTE_MIN_EQ_RE_EST_1 +918 0x0000 //TX_MICMUTE_MIN_EQ_RE_EST_2 +919 0x0000 //TX_MICMUTE_MIN_EQ_RE_EST_3 +920 0x0000 //TX_MICMUTE_MIN_EQ_RE_EST_4 +921 0x0000 //TX_MICMUTE_C_POST_FLT +922 0x0000 //TX_MICMUTE_DT_CUT_K +923 0x0000 //TX_MICMUTE_DT_CUT_THR +924 0x0000 //TX_MICMUTE_DT_CUT_K2 +925 0x0000 //TX_MICMUTE_DT_CUT_THR2 +926 0x0000 //TX_MICMUTE_DT2_HOLD_N +927 0x0000 //TX_MICMUTE_RATIODTH_THCUT +928 0x0000 //TX_MICMUTE_B_POST_FLT_ECHOL +929 0x0000 //TX_MICMUTE_B_POST_FLT_ECHOH +930 0x0000 //TX_MICMUTE_C_POST_FLT_MASK +931 0x0000 //TX_MICMUTE_RATIODTL_CUT_TH +932 0x0000 //TX_MICMUTE_DT_CUT_K1 +933 0x0000 //TX_MICMUTE_N2_SN_EST +934 0x0000 //TX_MICMUTE_THR_SN_EST_0 +935 0x0000 //TX_MICMUTE_MIN_G_CTRL_0 +936 0x0000 //TX_MICMUTE_A_POST_FILT_S_0 +937 0x0000 //TX_MICMUTE_B_POST_FILT_0 +938 0x0000 //TX_MIC1RUB_AMP_THR +939 0x0000 //TX_MIC1MUTE_RATIO_THR +940 0x0000 //TX_MIC1MUTE_AMP_THR +941 0x0000 //TX_MIC1MUTE_CVG_TIME +942 0x0000 //TX_MIC1MUTE_RELEASE_TIME +943 0x0000 //TX_AMS_RESRV_01 +944 0x0000 //TX_AMS_RESRV_02 +945 0x0000 //TX_AMS_RESRV_03 +946 0x0000 //TX_AMS_RESRV_04 +947 0x0000 //TX_AMS_RESRV_05 +948 0x0000 //TX_AMS_RESRV_06 +949 0x0000 //TX_AMS_RESRV_07 +950 0x0000 //TX_AMS_RESRV_08 +951 0x0000 //TX_AMS_RESRV_09 +952 0x0000 //TX_AMS_RESRV_10 +953 0x0000 //TX_AMS_RESRV_11 +954 0x0000 //TX_AMS_RESRV_12 +955 0x0000 //TX_AMS_RESRV_13 +956 0x0000 //TX_AMS_RESRV_14 +957 0x0000 //TX_AMS_RESRV_15 +958 0x0000 //TX_AMS_RESRV_16 +959 0x0000 //TX_AMS_RESRV_17 +960 0x0000 //TX_AMS_RESRV_18 +961 0x0000 //TX_AMS_RESRV_19 #RX -0 0x0064 //RX_RECVFUNC_MODE_0 +0 0x2064 //RX_RECVFUNC_MODE_0 1 0x0000 //RX_RECVFUNC_MODE_1 2 0x0004 //RX_SAMPLINGFREQ_SIG 3 0x0004 //RX_SAMPLINGFREQ_PROC @@ -36815,4 +55221,855 @@ 110 0x0000 //RX_FDDRC_RESRV_0 129 0x0100 //RX_SPK_VOL 130 0x0000 //RX_VOL_RESRV_0 +#RX 2 +157 0x0064 //RX_RECVFUNC_MODE_0 +158 0x0000 //RX_RECVFUNC_MODE_1 +159 0x0004 //RX_SAMPLINGFREQ_SIG +160 0x0004 //RX_SAMPLINGFREQ_PROC +161 0x000A //RX_FRAME_SZ +162 0x0000 //RX_DELAY_OPT +163 0x1000 //RX_TDDRC_ALPHA_UP_1 +164 0x1000 //RX_TDDRC_ALPHA_UP_2 +165 0x1000 //RX_TDDRC_ALPHA_UP_3 +166 0x1000 //RX_TDDRC_ALPHA_UP_4 +167 0x0800 //RX_PGA +168 0x7FFF //RX_A_HP +169 0x4000 //RX_B_PE +170 0x7800 //RX_THR_PITCH_DET_0 +171 0x7000 //RX_THR_PITCH_DET_1 +172 0x6000 //RX_THR_PITCH_DET_2 +173 0x0008 //RX_PITCH_BFR_LEN +174 0x0003 //RX_SBD_PITCH_DET +175 0x0100 //RX_PP_RESRV_0 +176 0x0020 //RX_PP_RESRV_1 +177 0x0500 //RX_N_SN_EST +178 0x000C //RX_N2_SN_EST +179 0x000A //RX_NS_LVL_CTRL +180 0xF600 //RX_THR_SN_EST +181 0x7000 //RX_LAMBDA_PFILT +182 0x000A //RX_FENS_RESRV_0 +183 0x0190 //RX_FENS_RESRV_1 +184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +187 0x0002 //RX_EXTRA_NS_L +188 0x0800 //RX_EXTRA_NS_A +189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +190 0x7FFF //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +192 0x199A //RX_A_POST_FLT +193 0x0000 //RX_LMT_THRD +194 0x4000 //RX_LMT_ALPHA +195 0x0020 //RX_FDEQ_SUBNUM +196 0x4848 //RX_FDEQ_GAIN_0 +197 0x4848 //RX_FDEQ_GAIN_1 +198 0x4848 //RX_FDEQ_GAIN_2 +199 0x4848 //RX_FDEQ_GAIN_3 +200 0x4848 //RX_FDEQ_GAIN_4 +201 0x4848 //RX_FDEQ_GAIN_5 +202 0x4848 //RX_FDEQ_GAIN_6 +203 0x4848 //RX_FDEQ_GAIN_7 +204 0x4848 //RX_FDEQ_GAIN_8 +205 0x4848 //RX_FDEQ_GAIN_9 +206 0x4848 //RX_FDEQ_GAIN_10 +207 0x4848 //RX_FDEQ_GAIN_11 +208 0x4848 //RX_FDEQ_GAIN_12 +209 0x4848 //RX_FDEQ_GAIN_13 +210 0x4848 //RX_FDEQ_GAIN_14 +211 0x4848 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0202 //RX_FDEQ_BIN_0 +221 0x0203 //RX_FDEQ_BIN_1 +222 0x0304 //RX_FDEQ_BIN_2 +223 0x0405 //RX_FDEQ_BIN_3 +224 0x0607 //RX_FDEQ_BIN_4 +225 0x0809 //RX_FDEQ_BIN_5 +226 0x0A0B //RX_FDEQ_BIN_6 +227 0x0C0D //RX_FDEQ_BIN_7 +228 0x0E0F //RX_FDEQ_BIN_8 +229 0x1011 //RX_FDEQ_BIN_9 +230 0x1214 //RX_FDEQ_BIN_10 +231 0x1618 //RX_FDEQ_BIN_11 +232 0x1C1C //RX_FDEQ_BIN_12 +233 0x2020 //RX_FDEQ_BIN_13 +234 0x2020 //RX_FDEQ_BIN_14 +235 0x2011 //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x4000 //RX_FDEQ_RESRV_0 +245 0x0320 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0030 //RX_FDDRC_BAND_MARGIN_1 +248 0x0050 //RX_FDDRC_BAND_MARGIN_2 +249 0x0080 //RX_FDDRC_BAND_MARGIN_3 +250 0x0007 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x5000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x6400 //RX_FDDRC_THRD_3_2 +258 0x6400 //RX_FDDRC_THRD_3_3 +259 0x2000 //RX_FDDRC_SLANT_0_0 +260 0x2000 //RX_FDDRC_SLANT_0_1 +261 0x2000 //RX_FDDRC_SLANT_0_2 +262 0x2000 //RX_FDDRC_SLANT_0_3 +263 0x5333 //RX_FDDRC_SLANT_1_0 +264 0x5333 //RX_FDDRC_SLANT_1_1 +265 0x5333 //RX_FDDRC_SLANT_1_2 +266 0x5333 //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +268 0x0000 //RX_FILTINDX +269 0x0000 //RX_TDDRC_THRD_0 +270 0x0000 //RX_TDDRC_THRD_1 +271 0x7FFF //RX_TDDRC_THRD_2 +272 0x7FFF //RX_TDDRC_THRD_3 +273 0x7FFF //RX_TDDRC_SLANT_0 +274 0x7FFF //RX_TDDRC_SLANT_1 +275 0x1000 //RX_TDDRC_ALPHA_UP_0 +276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x199A //RX_TDDRC_HMNC_GAIN +279 0x0001 //RX_TDDRC_SMT_FLAG +280 0x0CCD //RX_TDDRC_SMT_W +281 0x0155 //RX_TDDRC_DRC_GAIN +282 0x7C00 //RX_LAMBDA_PKA_FP +283 0x2000 //RX_TPKA_FP +284 0x2000 //RX_MIN_G_FP +285 0x0080 //RX_MAX_G_FP +286 0x0100 //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 +288 0x0000 //RX_MAXLEVEL_CNG +289 0x3000 //RX_BWE_UV_TH +290 0x3000 //RX_BWE_UV_TH2 +291 0x1800 //RX_BWE_UV_TH3 +292 0x1000 //RX_BWE_V_TH +293 0x04CD //RX_BWE_GAIN1_V_TH1 +294 0x0F33 //RX_BWE_GAIN1_V_TH2 +295 0x7333 //RX_BWE_UV_EQ +296 0x199A //RX_BWE_V_EQ +297 0x7333 //RX_BWE_TONE_TH +298 0x0004 //RX_BWE_UV_HOLD_T +299 0x6CCD //RX_BWE_GAIN2_ALPHA +300 0x799A //RX_BWE_GAIN3_ALPHA +301 0x001E //RX_BWE_CUTOFF +302 0x3000 //RX_BWE_GAINFILL +303 0x3200 //RX_BWE_MAXTH_TONE +304 0x2000 //RX_BWE_EQ_0 +305 0x2000 //RX_BWE_EQ_1 +306 0x2000 //RX_BWE_EQ_2 +307 0x2000 //RX_BWE_EQ_3 +308 0x2000 //RX_BWE_EQ_4 +309 0x2000 //RX_BWE_EQ_5 +310 0x2000 //RX_BWE_EQ_6 +311 0x0000 //RX_BWE_RESRV_0 +312 0x0000 //RX_BWE_RESRV_1 +313 0x0000 //RX_BWE_RESRV_2 +#VOL 0 +163 0x1000 //RX_TDDRC_ALPHA_UP_1 +164 0x1000 //RX_TDDRC_ALPHA_UP_2 +165 0x1000 //RX_TDDRC_ALPHA_UP_3 +166 0x1000 //RX_TDDRC_ALPHA_UP_4 +184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +190 0x7FFF //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +269 0x0000 //RX_TDDRC_THRD_0 +270 0x0000 //RX_TDDRC_THRD_1 +271 0x7FFF //RX_TDDRC_THRD_2 +272 0x7FFF //RX_TDDRC_THRD_3 +273 0x7FFF //RX_TDDRC_SLANT_0 +274 0x7FFF //RX_TDDRC_SLANT_1 +275 0x1000 //RX_TDDRC_ALPHA_UP_0 +276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x199A //RX_TDDRC_HMNC_GAIN +279 0x0001 //RX_TDDRC_SMT_FLAG +280 0x0CCD //RX_TDDRC_SMT_W +281 0x0155 //RX_TDDRC_DRC_GAIN +195 0x0020 //RX_FDEQ_SUBNUM +196 0x4848 //RX_FDEQ_GAIN_0 +197 0x4848 //RX_FDEQ_GAIN_1 +198 0x4848 //RX_FDEQ_GAIN_2 +199 0x4848 //RX_FDEQ_GAIN_3 +200 0x4848 //RX_FDEQ_GAIN_4 +201 0x4848 //RX_FDEQ_GAIN_5 +202 0x4848 //RX_FDEQ_GAIN_6 +203 0x4848 //RX_FDEQ_GAIN_7 +204 0x4848 //RX_FDEQ_GAIN_8 +205 0x4848 //RX_FDEQ_GAIN_9 +206 0x4848 //RX_FDEQ_GAIN_10 +207 0x4848 //RX_FDEQ_GAIN_11 +208 0x4848 //RX_FDEQ_GAIN_12 +209 0x4848 //RX_FDEQ_GAIN_13 +210 0x4848 //RX_FDEQ_GAIN_14 +211 0x4848 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0202 //RX_FDEQ_BIN_0 +221 0x0203 //RX_FDEQ_BIN_1 +222 0x0304 //RX_FDEQ_BIN_2 +223 0x0405 //RX_FDEQ_BIN_3 +224 0x0607 //RX_FDEQ_BIN_4 +225 0x0809 //RX_FDEQ_BIN_5 +226 0x0A0B //RX_FDEQ_BIN_6 +227 0x0C0D //RX_FDEQ_BIN_7 +228 0x0E0F //RX_FDEQ_BIN_8 +229 0x1011 //RX_FDEQ_BIN_9 +230 0x1214 //RX_FDEQ_BIN_10 +231 0x1618 //RX_FDEQ_BIN_11 +232 0x1C1C //RX_FDEQ_BIN_12 +233 0x2020 //RX_FDEQ_BIN_13 +234 0x2020 //RX_FDEQ_BIN_14 +235 0x2011 //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x4000 //RX_FDEQ_RESRV_0 +245 0x0320 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0030 //RX_FDDRC_BAND_MARGIN_1 +248 0x0050 //RX_FDDRC_BAND_MARGIN_2 +249 0x0080 //RX_FDDRC_BAND_MARGIN_3 +250 0x0007 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x5000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x6400 //RX_FDDRC_THRD_3_2 +258 0x6400 //RX_FDDRC_THRD_3_3 +259 0x2000 //RX_FDDRC_SLANT_0_0 +260 0x2000 //RX_FDDRC_SLANT_0_1 +261 0x2000 //RX_FDDRC_SLANT_0_2 +262 0x2000 //RX_FDDRC_SLANT_0_3 +263 0x5333 //RX_FDDRC_SLANT_1_0 +264 0x5333 //RX_FDDRC_SLANT_1_1 +265 0x5333 //RX_FDDRC_SLANT_1_2 +266 0x5333 //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +286 0x0100 //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 +#VOL 1 +163 0x1000 //RX_TDDRC_ALPHA_UP_1 +164 0x1000 //RX_TDDRC_ALPHA_UP_2 +165 0x1000 //RX_TDDRC_ALPHA_UP_3 +166 0x1000 //RX_TDDRC_ALPHA_UP_4 +184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +190 0x7FFF //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +269 0x0000 //RX_TDDRC_THRD_0 +270 0x0000 //RX_TDDRC_THRD_1 +271 0x7FFF //RX_TDDRC_THRD_2 +272 0x7FFF //RX_TDDRC_THRD_3 +273 0x7FFF //RX_TDDRC_SLANT_0 +274 0x7FFF //RX_TDDRC_SLANT_1 +275 0x1000 //RX_TDDRC_ALPHA_UP_0 +276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x199A //RX_TDDRC_HMNC_GAIN +279 0x0001 //RX_TDDRC_SMT_FLAG +280 0x0CCD //RX_TDDRC_SMT_W +281 0x0155 //RX_TDDRC_DRC_GAIN +195 0x0020 //RX_FDEQ_SUBNUM +196 0x4848 //RX_FDEQ_GAIN_0 +197 0x4848 //RX_FDEQ_GAIN_1 +198 0x4848 //RX_FDEQ_GAIN_2 +199 0x4848 //RX_FDEQ_GAIN_3 +200 0x4848 //RX_FDEQ_GAIN_4 +201 0x4848 //RX_FDEQ_GAIN_5 +202 0x4848 //RX_FDEQ_GAIN_6 +203 0x4848 //RX_FDEQ_GAIN_7 +204 0x4848 //RX_FDEQ_GAIN_8 +205 0x4848 //RX_FDEQ_GAIN_9 +206 0x4848 //RX_FDEQ_GAIN_10 +207 0x4848 //RX_FDEQ_GAIN_11 +208 0x4848 //RX_FDEQ_GAIN_12 +209 0x4848 //RX_FDEQ_GAIN_13 +210 0x4848 //RX_FDEQ_GAIN_14 +211 0x4848 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0202 //RX_FDEQ_BIN_0 +221 0x0203 //RX_FDEQ_BIN_1 +222 0x0304 //RX_FDEQ_BIN_2 +223 0x0405 //RX_FDEQ_BIN_3 +224 0x0607 //RX_FDEQ_BIN_4 +225 0x0809 //RX_FDEQ_BIN_5 +226 0x0A0B //RX_FDEQ_BIN_6 +227 0x0C0D //RX_FDEQ_BIN_7 +228 0x0E0F //RX_FDEQ_BIN_8 +229 0x1011 //RX_FDEQ_BIN_9 +230 0x1214 //RX_FDEQ_BIN_10 +231 0x1618 //RX_FDEQ_BIN_11 +232 0x1C1C //RX_FDEQ_BIN_12 +233 0x2020 //RX_FDEQ_BIN_13 +234 0x2020 //RX_FDEQ_BIN_14 +235 0x2011 //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x4000 //RX_FDEQ_RESRV_0 +245 0x0320 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0030 //RX_FDDRC_BAND_MARGIN_1 +248 0x0050 //RX_FDDRC_BAND_MARGIN_2 +249 0x0080 //RX_FDDRC_BAND_MARGIN_3 +250 0x0007 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x5000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x6400 //RX_FDDRC_THRD_3_2 +258 0x6400 //RX_FDDRC_THRD_3_3 +259 0x2000 //RX_FDDRC_SLANT_0_0 +260 0x2000 //RX_FDDRC_SLANT_0_1 +261 0x2000 //RX_FDDRC_SLANT_0_2 +262 0x2000 //RX_FDDRC_SLANT_0_3 +263 0x5333 //RX_FDDRC_SLANT_1_0 +264 0x5333 //RX_FDDRC_SLANT_1_1 +265 0x5333 //RX_FDDRC_SLANT_1_2 +266 0x5333 //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +286 0x0100 //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 +#VOL 2 +163 0x1000 //RX_TDDRC_ALPHA_UP_1 +164 0x1000 //RX_TDDRC_ALPHA_UP_2 +165 0x1000 //RX_TDDRC_ALPHA_UP_3 +166 0x1000 //RX_TDDRC_ALPHA_UP_4 +184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +190 0x7FFF //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +269 0x0000 //RX_TDDRC_THRD_0 +270 0x0000 //RX_TDDRC_THRD_1 +271 0x7FFF //RX_TDDRC_THRD_2 +272 0x7FFF //RX_TDDRC_THRD_3 +273 0x7FFF //RX_TDDRC_SLANT_0 +274 0x7FFF //RX_TDDRC_SLANT_1 +275 0x1000 //RX_TDDRC_ALPHA_UP_0 +276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x199A //RX_TDDRC_HMNC_GAIN +279 0x0001 //RX_TDDRC_SMT_FLAG +280 0x0CCD //RX_TDDRC_SMT_W +281 0x0155 //RX_TDDRC_DRC_GAIN +195 0x0020 //RX_FDEQ_SUBNUM +196 0x4848 //RX_FDEQ_GAIN_0 +197 0x4848 //RX_FDEQ_GAIN_1 +198 0x4848 //RX_FDEQ_GAIN_2 +199 0x4848 //RX_FDEQ_GAIN_3 +200 0x4848 //RX_FDEQ_GAIN_4 +201 0x4848 //RX_FDEQ_GAIN_5 +202 0x4848 //RX_FDEQ_GAIN_6 +203 0x4848 //RX_FDEQ_GAIN_7 +204 0x4848 //RX_FDEQ_GAIN_8 +205 0x4848 //RX_FDEQ_GAIN_9 +206 0x4848 //RX_FDEQ_GAIN_10 +207 0x4848 //RX_FDEQ_GAIN_11 +208 0x4848 //RX_FDEQ_GAIN_12 +209 0x4848 //RX_FDEQ_GAIN_13 +210 0x4848 //RX_FDEQ_GAIN_14 +211 0x4848 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0202 //RX_FDEQ_BIN_0 +221 0x0203 //RX_FDEQ_BIN_1 +222 0x0304 //RX_FDEQ_BIN_2 +223 0x0405 //RX_FDEQ_BIN_3 +224 0x0607 //RX_FDEQ_BIN_4 +225 0x0809 //RX_FDEQ_BIN_5 +226 0x0A0B //RX_FDEQ_BIN_6 +227 0x0C0D //RX_FDEQ_BIN_7 +228 0x0E0F //RX_FDEQ_BIN_8 +229 0x1011 //RX_FDEQ_BIN_9 +230 0x1214 //RX_FDEQ_BIN_10 +231 0x1618 //RX_FDEQ_BIN_11 +232 0x1C1C //RX_FDEQ_BIN_12 +233 0x2020 //RX_FDEQ_BIN_13 +234 0x2020 //RX_FDEQ_BIN_14 +235 0x2011 //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x4000 //RX_FDEQ_RESRV_0 +245 0x0320 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0030 //RX_FDDRC_BAND_MARGIN_1 +248 0x0050 //RX_FDDRC_BAND_MARGIN_2 +249 0x0080 //RX_FDDRC_BAND_MARGIN_3 +250 0x0007 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x5000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x6400 //RX_FDDRC_THRD_3_2 +258 0x6400 //RX_FDDRC_THRD_3_3 +259 0x2000 //RX_FDDRC_SLANT_0_0 +260 0x2000 //RX_FDDRC_SLANT_0_1 +261 0x2000 //RX_FDDRC_SLANT_0_2 +262 0x2000 //RX_FDDRC_SLANT_0_3 +263 0x5333 //RX_FDDRC_SLANT_1_0 +264 0x5333 //RX_FDDRC_SLANT_1_1 +265 0x5333 //RX_FDDRC_SLANT_1_2 +266 0x5333 //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +286 0x0100 //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 +#VOL 3 +163 0x1000 //RX_TDDRC_ALPHA_UP_1 +164 0x1000 //RX_TDDRC_ALPHA_UP_2 +165 0x1000 //RX_TDDRC_ALPHA_UP_3 +166 0x1000 //RX_TDDRC_ALPHA_UP_4 +184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +190 0x7FFF //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +269 0x0000 //RX_TDDRC_THRD_0 +270 0x0000 //RX_TDDRC_THRD_1 +271 0x7FFF //RX_TDDRC_THRD_2 +272 0x7FFF //RX_TDDRC_THRD_3 +273 0x7FFF //RX_TDDRC_SLANT_0 +274 0x7FFF //RX_TDDRC_SLANT_1 +275 0x1000 //RX_TDDRC_ALPHA_UP_0 +276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x199A //RX_TDDRC_HMNC_GAIN +279 0x0001 //RX_TDDRC_SMT_FLAG +280 0x0CCD //RX_TDDRC_SMT_W +281 0x0155 //RX_TDDRC_DRC_GAIN +195 0x0020 //RX_FDEQ_SUBNUM +196 0x4848 //RX_FDEQ_GAIN_0 +197 0x4848 //RX_FDEQ_GAIN_1 +198 0x4848 //RX_FDEQ_GAIN_2 +199 0x4848 //RX_FDEQ_GAIN_3 +200 0x4848 //RX_FDEQ_GAIN_4 +201 0x4848 //RX_FDEQ_GAIN_5 +202 0x4848 //RX_FDEQ_GAIN_6 +203 0x4848 //RX_FDEQ_GAIN_7 +204 0x4848 //RX_FDEQ_GAIN_8 +205 0x4848 //RX_FDEQ_GAIN_9 +206 0x4848 //RX_FDEQ_GAIN_10 +207 0x4848 //RX_FDEQ_GAIN_11 +208 0x4848 //RX_FDEQ_GAIN_12 +209 0x4848 //RX_FDEQ_GAIN_13 +210 0x4848 //RX_FDEQ_GAIN_14 +211 0x4848 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0202 //RX_FDEQ_BIN_0 +221 0x0203 //RX_FDEQ_BIN_1 +222 0x0304 //RX_FDEQ_BIN_2 +223 0x0405 //RX_FDEQ_BIN_3 +224 0x0607 //RX_FDEQ_BIN_4 +225 0x0809 //RX_FDEQ_BIN_5 +226 0x0A0B //RX_FDEQ_BIN_6 +227 0x0C0D //RX_FDEQ_BIN_7 +228 0x0E0F //RX_FDEQ_BIN_8 +229 0x1011 //RX_FDEQ_BIN_9 +230 0x1214 //RX_FDEQ_BIN_10 +231 0x1618 //RX_FDEQ_BIN_11 +232 0x1C1C //RX_FDEQ_BIN_12 +233 0x2020 //RX_FDEQ_BIN_13 +234 0x2020 //RX_FDEQ_BIN_14 +235 0x2011 //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x4000 //RX_FDEQ_RESRV_0 +245 0x0320 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0030 //RX_FDDRC_BAND_MARGIN_1 +248 0x0050 //RX_FDDRC_BAND_MARGIN_2 +249 0x0080 //RX_FDDRC_BAND_MARGIN_3 +250 0x0007 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x5000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x6400 //RX_FDDRC_THRD_3_2 +258 0x6400 //RX_FDDRC_THRD_3_3 +259 0x2000 //RX_FDDRC_SLANT_0_0 +260 0x2000 //RX_FDDRC_SLANT_0_1 +261 0x2000 //RX_FDDRC_SLANT_0_2 +262 0x2000 //RX_FDDRC_SLANT_0_3 +263 0x5333 //RX_FDDRC_SLANT_1_0 +264 0x5333 //RX_FDDRC_SLANT_1_1 +265 0x5333 //RX_FDDRC_SLANT_1_2 +266 0x5333 //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +286 0x0100 //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 +#VOL 4 +163 0x1000 //RX_TDDRC_ALPHA_UP_1 +164 0x1000 //RX_TDDRC_ALPHA_UP_2 +165 0x1000 //RX_TDDRC_ALPHA_UP_3 +166 0x1000 //RX_TDDRC_ALPHA_UP_4 +184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +190 0x7FFF //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +269 0x0000 //RX_TDDRC_THRD_0 +270 0x0000 //RX_TDDRC_THRD_1 +271 0x7FFF //RX_TDDRC_THRD_2 +272 0x7FFF //RX_TDDRC_THRD_3 +273 0x7FFF //RX_TDDRC_SLANT_0 +274 0x7FFF //RX_TDDRC_SLANT_1 +275 0x1000 //RX_TDDRC_ALPHA_UP_0 +276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x199A //RX_TDDRC_HMNC_GAIN +279 0x0001 //RX_TDDRC_SMT_FLAG +280 0x0CCD //RX_TDDRC_SMT_W +281 0x0155 //RX_TDDRC_DRC_GAIN +195 0x0020 //RX_FDEQ_SUBNUM +196 0x4848 //RX_FDEQ_GAIN_0 +197 0x4848 //RX_FDEQ_GAIN_1 +198 0x4848 //RX_FDEQ_GAIN_2 +199 0x4848 //RX_FDEQ_GAIN_3 +200 0x4848 //RX_FDEQ_GAIN_4 +201 0x4848 //RX_FDEQ_GAIN_5 +202 0x4848 //RX_FDEQ_GAIN_6 +203 0x4848 //RX_FDEQ_GAIN_7 +204 0x4848 //RX_FDEQ_GAIN_8 +205 0x4848 //RX_FDEQ_GAIN_9 +206 0x4848 //RX_FDEQ_GAIN_10 +207 0x4848 //RX_FDEQ_GAIN_11 +208 0x4848 //RX_FDEQ_GAIN_12 +209 0x4848 //RX_FDEQ_GAIN_13 +210 0x4848 //RX_FDEQ_GAIN_14 +211 0x4848 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0202 //RX_FDEQ_BIN_0 +221 0x0203 //RX_FDEQ_BIN_1 +222 0x0304 //RX_FDEQ_BIN_2 +223 0x0405 //RX_FDEQ_BIN_3 +224 0x0607 //RX_FDEQ_BIN_4 +225 0x0809 //RX_FDEQ_BIN_5 +226 0x0A0B //RX_FDEQ_BIN_6 +227 0x0C0D //RX_FDEQ_BIN_7 +228 0x0E0F //RX_FDEQ_BIN_8 +229 0x1011 //RX_FDEQ_BIN_9 +230 0x1214 //RX_FDEQ_BIN_10 +231 0x1618 //RX_FDEQ_BIN_11 +232 0x1C1C //RX_FDEQ_BIN_12 +233 0x2020 //RX_FDEQ_BIN_13 +234 0x2020 //RX_FDEQ_BIN_14 +235 0x2011 //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x4000 //RX_FDEQ_RESRV_0 +245 0x0320 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0030 //RX_FDDRC_BAND_MARGIN_1 +248 0x0050 //RX_FDDRC_BAND_MARGIN_2 +249 0x0080 //RX_FDDRC_BAND_MARGIN_3 +250 0x0007 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x5000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x6400 //RX_FDDRC_THRD_3_2 +258 0x6400 //RX_FDDRC_THRD_3_3 +259 0x2000 //RX_FDDRC_SLANT_0_0 +260 0x2000 //RX_FDDRC_SLANT_0_1 +261 0x2000 //RX_FDDRC_SLANT_0_2 +262 0x2000 //RX_FDDRC_SLANT_0_3 +263 0x5333 //RX_FDDRC_SLANT_1_0 +264 0x5333 //RX_FDDRC_SLANT_1_1 +265 0x5333 //RX_FDDRC_SLANT_1_2 +266 0x5333 //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +286 0x0100 //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 +#VOL 5 +163 0x1000 //RX_TDDRC_ALPHA_UP_1 +164 0x1000 //RX_TDDRC_ALPHA_UP_2 +165 0x1000 //RX_TDDRC_ALPHA_UP_3 +166 0x1000 //RX_TDDRC_ALPHA_UP_4 +184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +190 0x7FFF //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +269 0x0000 //RX_TDDRC_THRD_0 +270 0x0000 //RX_TDDRC_THRD_1 +271 0x7FFF //RX_TDDRC_THRD_2 +272 0x7FFF //RX_TDDRC_THRD_3 +273 0x7FFF //RX_TDDRC_SLANT_0 +274 0x7FFF //RX_TDDRC_SLANT_1 +275 0x1000 //RX_TDDRC_ALPHA_UP_0 +276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x199A //RX_TDDRC_HMNC_GAIN +279 0x0001 //RX_TDDRC_SMT_FLAG +280 0x0CCD //RX_TDDRC_SMT_W +281 0x0155 //RX_TDDRC_DRC_GAIN +195 0x0020 //RX_FDEQ_SUBNUM +196 0x4848 //RX_FDEQ_GAIN_0 +197 0x4848 //RX_FDEQ_GAIN_1 +198 0x4848 //RX_FDEQ_GAIN_2 +199 0x4848 //RX_FDEQ_GAIN_3 +200 0x4848 //RX_FDEQ_GAIN_4 +201 0x4848 //RX_FDEQ_GAIN_5 +202 0x4848 //RX_FDEQ_GAIN_6 +203 0x4848 //RX_FDEQ_GAIN_7 +204 0x4848 //RX_FDEQ_GAIN_8 +205 0x4848 //RX_FDEQ_GAIN_9 +206 0x4848 //RX_FDEQ_GAIN_10 +207 0x4848 //RX_FDEQ_GAIN_11 +208 0x4848 //RX_FDEQ_GAIN_12 +209 0x4848 //RX_FDEQ_GAIN_13 +210 0x4848 //RX_FDEQ_GAIN_14 +211 0x4848 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0202 //RX_FDEQ_BIN_0 +221 0x0203 //RX_FDEQ_BIN_1 +222 0x0304 //RX_FDEQ_BIN_2 +223 0x0405 //RX_FDEQ_BIN_3 +224 0x0607 //RX_FDEQ_BIN_4 +225 0x0809 //RX_FDEQ_BIN_5 +226 0x0A0B //RX_FDEQ_BIN_6 +227 0x0C0D //RX_FDEQ_BIN_7 +228 0x0E0F //RX_FDEQ_BIN_8 +229 0x1011 //RX_FDEQ_BIN_9 +230 0x1214 //RX_FDEQ_BIN_10 +231 0x1618 //RX_FDEQ_BIN_11 +232 0x1C1C //RX_FDEQ_BIN_12 +233 0x2020 //RX_FDEQ_BIN_13 +234 0x2020 //RX_FDEQ_BIN_14 +235 0x2011 //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x4000 //RX_FDEQ_RESRV_0 +245 0x0320 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0030 //RX_FDDRC_BAND_MARGIN_1 +248 0x0050 //RX_FDDRC_BAND_MARGIN_2 +249 0x0080 //RX_FDDRC_BAND_MARGIN_3 +250 0x0007 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x5000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x6400 //RX_FDDRC_THRD_3_2 +258 0x6400 //RX_FDDRC_THRD_3_3 +259 0x2000 //RX_FDDRC_SLANT_0_0 +260 0x2000 //RX_FDDRC_SLANT_0_1 +261 0x2000 //RX_FDDRC_SLANT_0_2 +262 0x2000 //RX_FDDRC_SLANT_0_3 +263 0x5333 //RX_FDDRC_SLANT_1_0 +264 0x5333 //RX_FDDRC_SLANT_1_1 +265 0x5333 //RX_FDDRC_SLANT_1_2 +266 0x5333 //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +286 0x0100 //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 +#VOL 6 +163 0x1000 //RX_TDDRC_ALPHA_UP_1 +164 0x1000 //RX_TDDRC_ALPHA_UP_2 +165 0x1000 //RX_TDDRC_ALPHA_UP_3 +166 0x1000 //RX_TDDRC_ALPHA_UP_4 +184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +190 0x7FFF //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +269 0x0000 //RX_TDDRC_THRD_0 +270 0x0000 //RX_TDDRC_THRD_1 +271 0x7FFF //RX_TDDRC_THRD_2 +272 0x7FFF //RX_TDDRC_THRD_3 +273 0x7FFF //RX_TDDRC_SLANT_0 +274 0x7FFF //RX_TDDRC_SLANT_1 +275 0x1000 //RX_TDDRC_ALPHA_UP_0 +276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x199A //RX_TDDRC_HMNC_GAIN +279 0x0001 //RX_TDDRC_SMT_FLAG +280 0x0CCD //RX_TDDRC_SMT_W +281 0x0155 //RX_TDDRC_DRC_GAIN +195 0x0020 //RX_FDEQ_SUBNUM +196 0x4848 //RX_FDEQ_GAIN_0 +197 0x4848 //RX_FDEQ_GAIN_1 +198 0x4848 //RX_FDEQ_GAIN_2 +199 0x4848 //RX_FDEQ_GAIN_3 +200 0x4848 //RX_FDEQ_GAIN_4 +201 0x4848 //RX_FDEQ_GAIN_5 +202 0x4848 //RX_FDEQ_GAIN_6 +203 0x4848 //RX_FDEQ_GAIN_7 +204 0x4848 //RX_FDEQ_GAIN_8 +205 0x4848 //RX_FDEQ_GAIN_9 +206 0x4848 //RX_FDEQ_GAIN_10 +207 0x4848 //RX_FDEQ_GAIN_11 +208 0x4848 //RX_FDEQ_GAIN_12 +209 0x4848 //RX_FDEQ_GAIN_13 +210 0x4848 //RX_FDEQ_GAIN_14 +211 0x4848 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0202 //RX_FDEQ_BIN_0 +221 0x0203 //RX_FDEQ_BIN_1 +222 0x0304 //RX_FDEQ_BIN_2 +223 0x0405 //RX_FDEQ_BIN_3 +224 0x0607 //RX_FDEQ_BIN_4 +225 0x0809 //RX_FDEQ_BIN_5 +226 0x0A0B //RX_FDEQ_BIN_6 +227 0x0C0D //RX_FDEQ_BIN_7 +228 0x0E0F //RX_FDEQ_BIN_8 +229 0x1011 //RX_FDEQ_BIN_9 +230 0x1214 //RX_FDEQ_BIN_10 +231 0x1618 //RX_FDEQ_BIN_11 +232 0x1C1C //RX_FDEQ_BIN_12 +233 0x2020 //RX_FDEQ_BIN_13 +234 0x2020 //RX_FDEQ_BIN_14 +235 0x2011 //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x4000 //RX_FDEQ_RESRV_0 +245 0x0320 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0030 //RX_FDDRC_BAND_MARGIN_1 +248 0x0050 //RX_FDDRC_BAND_MARGIN_2 +249 0x0080 //RX_FDDRC_BAND_MARGIN_3 +250 0x0007 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x5000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x6400 //RX_FDDRC_THRD_3_2 +258 0x6400 //RX_FDDRC_THRD_3_3 +259 0x2000 //RX_FDDRC_SLANT_0_0 +260 0x2000 //RX_FDDRC_SLANT_0_1 +261 0x2000 //RX_FDDRC_SLANT_0_2 +262 0x2000 //RX_FDDRC_SLANT_0_3 +263 0x5333 //RX_FDDRC_SLANT_1_0 +264 0x5333 //RX_FDDRC_SLANT_1_1 +265 0x5333 //RX_FDDRC_SLANT_1_2 +266 0x5333 //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +286 0x0100 //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 diff --git a/audio/ravenclaw/tuning/fortemedia/HANDSET.dat b/audio/ravenclaw/tuning/fortemedia/HANDSET.dat index a996c9b..9c27e32 100644 Binary files a/audio/ravenclaw/tuning/fortemedia/HANDSET.dat and b/audio/ravenclaw/tuning/fortemedia/HANDSET.dat differ diff --git a/audio/ravenclaw/tuning/fortemedia/HANDSET.mods b/audio/ravenclaw/tuning/fortemedia/HANDSET.mods index b64d3d1..83a612d 100644 --- a/audio/ravenclaw/tuning/fortemedia/HANDSET.mods +++ b/audio/ravenclaw/tuning/fortemedia/HANDSET.mods @@ -1,11 +1,12 @@ #PLATFORM_NAME gChip #EXPORT_FLAG HANDSET -#SINGLE_API_VER 1.1.6 -#SAVE_TIME 2021-08-20 16:47:25 +#SINGLE_API_VER 1.2.0 +#SAVE_TIME 2022-02-09 11:15:13 #CASE_NAME HANDSET-HANDSET-RESERVE1-FB -#PARAM_TYPE TX+RX -#TOTAL_CUSTOM_STEP 7 +#PARAM_MODE FULL +#PARAM_TYPE TX+2RX +#TOTAL_CUSTOM_STEP 7+7 #TX 0 0x0000 //TX_OPERATION_MODE_0 1 0x0000 //TX_OPERATION_MODE_1 @@ -258,12 +259,12 @@ 248 0xF800 //TX_THR_SN_EST_6 249 0xF700 //TX_THR_SN_EST_7 250 0x0000 //TX_DELTA_THR_SN_EST_0 -251 0x0100 //TX_DELTA_THR_SN_EST_1 +251 0x0200 //TX_DELTA_THR_SN_EST_1 252 0x0200 //TX_DELTA_THR_SN_EST_2 253 0x0200 //TX_DELTA_THR_SN_EST_3 -254 0x0200 //TX_DELTA_THR_SN_EST_4 -255 0x0100 //TX_DELTA_THR_SN_EST_5 -256 0x0200 //TX_DELTA_THR_SN_EST_6 +254 0x0100 //TX_DELTA_THR_SN_EST_4 +255 0x0200 //TX_DELTA_THR_SN_EST_5 +256 0x0100 //TX_DELTA_THR_SN_EST_6 257 0x0200 //TX_DELTA_THR_SN_EST_7 258 0x4000 //TX_LAMBDA_NN_EST_0 259 0x4000 //TX_LAMBDA_NN_EST_1 @@ -291,16 +292,16 @@ 281 0x0014 //TX_NS_LVL_CTRL_0 282 0x0016 //TX_NS_LVL_CTRL_1 283 0x0016 //TX_NS_LVL_CTRL_2 -284 0x0016 //TX_NS_LVL_CTRL_3 -285 0x0018 //TX_NS_LVL_CTRL_4 -286 0x0016 //TX_NS_LVL_CTRL_5 -287 0x0012 //TX_NS_LVL_CTRL_6 +284 0x0018 //TX_NS_LVL_CTRL_3 +285 0x0016 //TX_NS_LVL_CTRL_4 +286 0x0012 //TX_NS_LVL_CTRL_5 +287 0x0016 //TX_NS_LVL_CTRL_6 288 0x0017 //TX_NS_LVL_CTRL_7 289 0x000E //TX_MIN_GAIN_S_0 -290 0x0012 //TX_MIN_GAIN_S_1 -291 0x0007 //TX_MIN_GAIN_S_2 -292 0x0012 //TX_MIN_GAIN_S_3 -293 0x0010 //TX_MIN_GAIN_S_4 +290 0x0007 //TX_MIN_GAIN_S_1 +291 0x0012 //TX_MIN_GAIN_S_2 +292 0x0010 //TX_MIN_GAIN_S_3 +293 0x0012 //TX_MIN_GAIN_S_4 294 0x0012 //TX_MIN_GAIN_S_5 295 0x0012 //TX_MIN_GAIN_S_6 296 0x0012 //TX_MIN_GAIN_S_7 @@ -322,29 +323,29 @@ 312 0x7FFF //TX_A_POST_FILT_0 313 0x2000 //TX_A_POST_FILT_1 314 0x4000 //TX_A_POST_FILT_S_0 -315 0x5000 //TX_A_POST_FILT_S_1 +315 0x4000 //TX_A_POST_FILT_S_1 316 0x4000 //TX_A_POST_FILT_S_2 317 0x4000 //TX_A_POST_FILT_S_3 318 0x4000 //TX_A_POST_FILT_S_4 319 0x4000 //TX_A_POST_FILT_S_5 -320 0x4000 //TX_A_POST_FILT_S_6 +320 0x5000 //TX_A_POST_FILT_S_6 321 0x7000 //TX_A_POST_FILT_S_7 322 0x1000 //TX_B_POST_FILT_0 323 0x2000 //TX_B_POST_FILT_1 -324 0x3000 //TX_B_POST_FILT_2 +324 0x2000 //TX_B_POST_FILT_2 325 0x2000 //TX_B_POST_FILT_3 -326 0x5000 //TX_B_POST_FILT_4 +326 0x2000 //TX_B_POST_FILT_4 327 0x2000 //TX_B_POST_FILT_5 -328 0x6000 //TX_B_POST_FILT_6 +328 0x3000 //TX_B_POST_FILT_6 329 0x3000 //TX_B_POST_FILT_7 330 0x1000 //TX_B_LESSCUT_RTO_S_0 -331 0x6000 //TX_B_LESSCUT_RTO_S_1 -332 0x6000 //TX_B_LESSCUT_RTO_S_2 -333 0x6000 //TX_B_LESSCUT_RTO_S_3 -334 0x6000 //TX_B_LESSCUT_RTO_S_4 -335 0x6000 //TX_B_LESSCUT_RTO_S_5 -336 0x7FFF //TX_B_LESSCUT_RTO_S_6 -337 0x7FFF //TX_B_LESSCUT_RTO_S_7 +331 0x1000 //TX_B_LESSCUT_RTO_S_1 +332 0x1000 //TX_B_LESSCUT_RTO_S_2 +333 0x1000 //TX_B_LESSCUT_RTO_S_3 +334 0x1000 //TX_B_LESSCUT_RTO_S_4 +335 0x1000 //TX_B_LESSCUT_RTO_S_5 +336 0x1000 //TX_B_LESSCUT_RTO_S_6 +337 0x1000 //TX_B_LESSCUT_RTO_S_7 338 0x7E14 //TX_LAMBDA_PFILT 339 0x7C29 //TX_LAMBDA_PFILT_S_0 340 0x7C29 //TX_LAMBDA_PFILT_S_1 @@ -387,10 +388,10 @@ 377 0x4E20 //TX_NOISE_TH_5_4 378 0x39DF //TX_NOISE_TH_6 379 0x0014 //TX_MINENOISE_TH -380 0x4000 //TX_MINENOISE_MIC0_TH_MTS -381 0xFFEE //TX_MINENOISE_MIC0_TH_EXP -382 0x6000 //TX_MINENOISE_MIC0_S_TH_MTS -383 0xFFF3 //TX_MINENOISE_MIC0_S_TH_EXP +380 0xD508 //TX_MORENS_TFMASK_TH +381 0x0001 //TX_DRC_QUIET_FLOOR +382 0x6D60 //TX_RATIODTL_CUT_TH +383 0x1482 //TX_DT_CUT_K1 384 0x00A5 //TX_OUT_ENER_S_TH_CLEAN 385 0x00A5 //TX_OUT_ENER_S_TH_LESSCLEAN 386 0x00A5 //TX_OUT_ENER_S_TH_NOISY @@ -398,15 +399,15 @@ 388 0x0200 //TX_OUT_ENER_TH_SPEECH 389 0x2000 //TX_SN_NPB_GAIN 390 0x0000 //TX_NN_NPB_GAIN -391 0x0000 //TX_CSX_ALPHA_0 -392 0x0000 //TX_CSX_ALPHA_1 -393 0x0000 //TX_CSX_ALPHA_2 -394 0x0000 //TX_CSX_ALPHA_3 -395 0x0800 //TX_MU_ARSP_EST -396 0x00C8 //TX_P_OUTBEAM_MIN_TH +391 0x3000 //TX_POST_MASK_SUP_HSNE +392 0x07D0 //TX_TAIL_DET_TH +393 0x4000 //TX_B_LESSCUT_RTO_WTA +394 0x0000 //TX_MEL_G_R +395 0x0080 //TX_SUPHIGH_TH +396 0x0000 //TX_MASK_G_R 397 0x0002 //TX_EXTRA_NS_L -398 0x0800 //TX_EXTRA_NS_A -399 0x0005 //TX_VR_NOISE_FLOOR_TH +398 0x1800 //TX_C_POST_FLT_MASK +399 0x7FFF //TX_A_POST_FLT_WNS 400 0x0148 //TX_MIN_G_LOW300HZ 401 0x0004 //TX_MAXLEVEL_CNG 402 0x00B4 //TX_STN_NOISE_TH @@ -521,16 +522,16 @@ 511 0x6666 //TX_MIC_TO_BFGAIN 512 0x0000 //TX_MICTOBFGAIN0 513 0x0000 //TX_FASTMUE_TH -514 0x0000 //TX_DERVB_LEN_0 -515 0x0000 //TX_DERVB_LEN_1 -516 0x0000 //TX_RHO_DERVB -517 0x0000 //TX_MIC_INDX_DERVB -518 0x0000 //TX_MU_DERVB -519 0x0000 //TX_DR_RESRV_0 -520 0x0000 //TX_DR_RESRV_1 -521 0x0000 //TX_DR_RESRV_2 -522 0x0000 //TX_DR_RESRV_3 -523 0x0000 //TX_DR_RESRV_4 +514 0x2CCC //TX_DEREVERB_LF_MU +515 0x3200 //TX_DEREVERB_HF_MU +516 0x0007 //TX_DEREVERB_DELAY +517 0x0004 //TX_DEREVERB_COEF_LEN +518 0x0003 //TX_DEREVERB_DNR +519 0x0000 //TX_DEREVERB_ALPHA +520 0x0000 //TX_DEREVERB_BETA +521 0x7FFF //TX_GSC_RTOL_TH +522 0x7FFF //TX_GSC_RTOH_TH +523 0x7E2C //TX_WIDE2_MEANHTH 524 0x0000 //TX_DR_RESRV_5 525 0x0000 //TX_DR_RESRV_6 526 0x0000 //TX_DR_RESRV_7 @@ -904,6 +905,71 @@ 894 0xC000 //TX_FASTNS_SSA_THHFL 895 0xCCCC //TX_FASTNS_SSA_THLFH 896 0xD999 //TX_FASTNS_SSA_THHFH +897 0x2339 //TX_SENDFUNC_REG_MICMUTE +898 0x0021 //TX_SENDFUNC_REG_MICMUTE1 +899 0x02BC //TX_MICMUTE_RATIO_THR +900 0x0140 //TX_MICMUTE_AMP_THR +901 0x0004 //TX_MICMUTE_HPF_IND +902 0x00C0 //TX_MICMUTE_LOG_EYR_TH +903 0x0008 //TX_MICMUTE_CVG_TIME +904 0x0008 //TX_MICMUTE_RELEASE_TIME +905 0x01FE //TX_MIC_VOLUME_MIC0MUTE +906 0x0020 //TX_MICMUTE_EPD_OFFSET_0 +907 0x001E //TX_MICMUTE_FRQ_AEC_L +908 0x7999 //TX_MICMUTE_EAD_THR +909 0x7FFF //TX_MICMUTE_LAMBDA_CB_NLE +910 0x7FFF //TX_MICMUTE_LAMBDA_RE_EST +911 0x4000 //TX_DTD_THR1_MICMUTE_0 +912 0x7000 //TX_DTD_THR1_MICMUTE_1 +913 0x7FFF //TX_DTD_THR1_MICMUTE_2 +914 0x7FFF //TX_DTD_THR1_MICMUTE_3 +915 0x6CCC //TX_DTD_THR2_MICMUTE_0 +916 0x0400 //TX_MICMUTE_MIN_EQ_RE_EST_0 +917 0x0400 //TX_MICMUTE_MIN_EQ_RE_EST_1 +918 0x1000 //TX_MICMUTE_MIN_EQ_RE_EST_2 +919 0x7FFF //TX_MICMUTE_MIN_EQ_RE_EST_3 +920 0x7FFF //TX_MICMUTE_MIN_EQ_RE_EST_4 +921 0x4000 //TX_MICMUTE_C_POST_FLT +922 0x03E8 //TX_MICMUTE_DT_CUT_K +923 0x0001 //TX_MICMUTE_DT_CUT_THR +924 0x03E8 //TX_MICMUTE_DT_CUT_K2 +925 0x0001 //TX_MICMUTE_DT_CUT_THR2 +926 0x0064 //TX_MICMUTE_DT2_HOLD_N +927 0x1000 //TX_MICMUTE_RATIODTH_THCUT +928 0x1000 //TX_MICMUTE_B_POST_FLT_ECHOL +929 0x7FFF //TX_MICMUTE_B_POST_FLT_ECHOH +930 0x0400 //TX_MICMUTE_C_POST_FLT_MASK +931 0x7999 //TX_MICMUTE_RATIODTL_CUT_TH +932 0x0258 //TX_MICMUTE_DT_CUT_K1 +933 0x0800 //TX_MICMUTE_N2_SN_EST +934 0xFC00 //TX_MICMUTE_THR_SN_EST_0 +935 0x001C //TX_MICMUTE_MIN_G_CTRL_0 +936 0x6000 //TX_MICMUTE_A_POST_FILT_S_0 +937 0x7000 //TX_MICMUTE_B_POST_FILT_0 +938 0x2710 //TX_MIC1RUB_AMP_THR +939 0x0010 //TX_MIC1MUTE_RATIO_THR +940 0x0450 //TX_MIC1MUTE_AMP_THR +941 0x0008 //TX_MIC1MUTE_CVG_TIME +942 0x0008 //TX_MIC1MUTE_RELEASE_TIME +943 0x0000 //TX_AMS_RESRV_01 +944 0x0000 //TX_AMS_RESRV_02 +945 0x0000 //TX_AMS_RESRV_03 +946 0x0000 //TX_AMS_RESRV_04 +947 0x0000 //TX_AMS_RESRV_05 +948 0x0000 //TX_AMS_RESRV_06 +949 0x0000 //TX_AMS_RESRV_07 +950 0x0000 //TX_AMS_RESRV_08 +951 0x0000 //TX_AMS_RESRV_09 +952 0x0000 //TX_AMS_RESRV_10 +953 0x0000 //TX_AMS_RESRV_11 +954 0x0000 //TX_AMS_RESRV_12 +955 0x0000 //TX_AMS_RESRV_13 +956 0x0000 //TX_AMS_RESRV_14 +957 0x0000 //TX_AMS_RESRV_15 +958 0x0000 //TX_AMS_RESRV_16 +959 0x0000 //TX_AMS_RESRV_17 +960 0x0000 //TX_AMS_RESRV_18 +961 0x0000 //TX_AMS_RESRV_19 #RX 0 0x003C //RX_RECVFUNC_MODE_0 1 0x0000 //RX_RECVFUNC_MODE_1 @@ -1755,10 +1821,862 @@ 110 0x0000 //RX_FDDRC_RESRV_0 129 0x0100 //RX_SPK_VOL 130 0x0000 //RX_VOL_RESRV_0 +#RX 2 +157 0x003C //RX_RECVFUNC_MODE_0 +158 0x0000 //RX_RECVFUNC_MODE_1 +159 0x0004 //RX_SAMPLINGFREQ_SIG +160 0x0004 //RX_SAMPLINGFREQ_PROC +161 0x000A //RX_FRAME_SZ +162 0x0000 //RX_DELAY_OPT +163 0x1000 //RX_TDDRC_ALPHA_UP_1 +164 0x1000 //RX_TDDRC_ALPHA_UP_2 +165 0x1000 //RX_TDDRC_ALPHA_UP_3 +166 0x1000 //RX_TDDRC_ALPHA_UP_4 +167 0x064E //RX_PGA +168 0x7FFF //RX_A_HP +169 0x4000 //RX_B_PE +170 0x5800 //RX_THR_PITCH_DET_0 +171 0x5000 //RX_THR_PITCH_DET_1 +172 0x4000 //RX_THR_PITCH_DET_2 +173 0x0008 //RX_PITCH_BFR_LEN +174 0x0003 //RX_SBD_PITCH_DET +175 0x0100 //RX_PP_RESRV_0 +176 0x0020 //RX_PP_RESRV_1 +177 0x0600 //RX_N_SN_EST +178 0x000C //RX_N2_SN_EST +179 0x000F //RX_NS_LVL_CTRL +180 0xF800 //RX_THR_SN_EST +181 0x7E00 //RX_LAMBDA_PFILT +182 0x000A //RX_FENS_RESRV_0 +183 0x0190 //RX_FENS_RESRV_1 +184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +187 0x0002 //RX_EXTRA_NS_L +188 0x0800 //RX_EXTRA_NS_A +189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +190 0x7000 //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +192 0x199A //RX_A_POST_FLT +193 0x0000 //RX_LMT_THRD +194 0x4000 //RX_LMT_ALPHA +195 0x0020 //RX_FDEQ_SUBNUM +196 0x4848 //RX_FDEQ_GAIN_0 +197 0x4850 //RX_FDEQ_GAIN_1 +198 0x6478 //RX_FDEQ_GAIN_2 +199 0x8689 //RX_FDEQ_GAIN_3 +200 0x908F //RX_FDEQ_GAIN_4 +201 0x9495 //RX_FDEQ_GAIN_5 +202 0x989D //RX_FDEQ_GAIN_6 +203 0x9DA6 //RX_FDEQ_GAIN_7 +204 0xA895 //RX_FDEQ_GAIN_8 +205 0x8A8A //RX_FDEQ_GAIN_9 +206 0x8E78 //RX_FDEQ_GAIN_10 +207 0x7070 //RX_FDEQ_GAIN_11 +208 0x7680 //RX_FDEQ_GAIN_12 +209 0x787C //RX_FDEQ_GAIN_13 +210 0x8890 //RX_FDEQ_GAIN_14 +211 0x9CAC //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0202 //RX_FDEQ_BIN_0 +221 0x0202 //RX_FDEQ_BIN_1 +222 0x0302 //RX_FDEQ_BIN_2 +223 0x0304 //RX_FDEQ_BIN_3 +224 0x0405 //RX_FDEQ_BIN_4 +225 0x0506 //RX_FDEQ_BIN_5 +226 0x0708 //RX_FDEQ_BIN_6 +227 0x090A //RX_FDEQ_BIN_7 +228 0x0B0C //RX_FDEQ_BIN_8 +229 0x0D0E //RX_FDEQ_BIN_9 +230 0x1013 //RX_FDEQ_BIN_10 +231 0x1719 //RX_FDEQ_BIN_11 +232 0x1B1E //RX_FDEQ_BIN_12 +233 0x1E1E //RX_FDEQ_BIN_13 +234 0x1E28 //RX_FDEQ_BIN_14 +235 0x282C //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x4000 //RX_FDEQ_RESRV_0 +245 0x0320 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0030 //RX_FDDRC_BAND_MARGIN_1 +248 0x0050 //RX_FDDRC_BAND_MARGIN_2 +249 0x0080 //RX_FDDRC_BAND_MARGIN_3 +250 0x0007 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x5000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x6400 //RX_FDDRC_THRD_3_2 +258 0x6400 //RX_FDDRC_THRD_3_3 +259 0x2000 //RX_FDDRC_SLANT_0_0 +260 0x2000 //RX_FDDRC_SLANT_0_1 +261 0x2000 //RX_FDDRC_SLANT_0_2 +262 0x2000 //RX_FDDRC_SLANT_0_3 +263 0x5333 //RX_FDDRC_SLANT_1_0 +264 0x5333 //RX_FDDRC_SLANT_1_1 +265 0x5333 //RX_FDDRC_SLANT_1_2 +266 0x5333 //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +268 0x0002 //RX_FILTINDX +269 0x0000 //RX_TDDRC_THRD_0 +270 0x0000 //RX_TDDRC_THRD_1 +271 0x1800 //RX_TDDRC_THRD_2 +272 0x1800 //RX_TDDRC_THRD_3 +273 0x3000 //RX_TDDRC_SLANT_0 +274 0x6E00 //RX_TDDRC_SLANT_1 +275 0x1000 //RX_TDDRC_ALPHA_UP_0 +276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x199A //RX_TDDRC_HMNC_GAIN +279 0x0001 //RX_TDDRC_SMT_FLAG +280 0x0CCD //RX_TDDRC_SMT_W +281 0x0275 //RX_TDDRC_DRC_GAIN +282 0x7C00 //RX_LAMBDA_PKA_FP +283 0x2000 //RX_TPKA_FP +284 0x2000 //RX_MIN_G_FP +285 0x0080 //RX_MAX_G_FP +286 0x000D //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 +288 0x0000 //RX_MAXLEVEL_CNG +289 0x3000 //RX_BWE_UV_TH +290 0x3000 //RX_BWE_UV_TH2 +291 0x1800 //RX_BWE_UV_TH3 +292 0x1000 //RX_BWE_V_TH +293 0x04CD //RX_BWE_GAIN1_V_TH1 +294 0x0F33 //RX_BWE_GAIN1_V_TH2 +295 0x7333 //RX_BWE_UV_EQ +296 0x199A //RX_BWE_V_EQ +297 0x7333 //RX_BWE_TONE_TH +298 0x0004 //RX_BWE_UV_HOLD_T +299 0x6CCD //RX_BWE_GAIN2_ALPHA +300 0x799A //RX_BWE_GAIN3_ALPHA +301 0x001E //RX_BWE_CUTOFF +302 0x3000 //RX_BWE_GAINFILL +303 0x3200 //RX_BWE_MAXTH_TONE +304 0x2000 //RX_BWE_EQ_0 +305 0x2000 //RX_BWE_EQ_1 +306 0x2000 //RX_BWE_EQ_2 +307 0x2000 //RX_BWE_EQ_3 +308 0x2000 //RX_BWE_EQ_4 +309 0x2000 //RX_BWE_EQ_5 +310 0x2000 //RX_BWE_EQ_6 +311 0x0000 //RX_BWE_RESRV_0 +312 0x0000 //RX_BWE_RESRV_1 +313 0x0000 //RX_BWE_RESRV_2 +#VOL 0 +163 0x1000 //RX_TDDRC_ALPHA_UP_1 +164 0x1000 //RX_TDDRC_ALPHA_UP_2 +165 0x1000 //RX_TDDRC_ALPHA_UP_3 +166 0x1000 //RX_TDDRC_ALPHA_UP_4 +184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +190 0x7000 //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +269 0x0000 //RX_TDDRC_THRD_0 +270 0x0000 //RX_TDDRC_THRD_1 +271 0x1800 //RX_TDDRC_THRD_2 +272 0x1800 //RX_TDDRC_THRD_3 +273 0x3000 //RX_TDDRC_SLANT_0 +274 0x6E00 //RX_TDDRC_SLANT_1 +275 0x1000 //RX_TDDRC_ALPHA_UP_0 +276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x199A //RX_TDDRC_HMNC_GAIN +279 0x0001 //RX_TDDRC_SMT_FLAG +280 0x0CCD //RX_TDDRC_SMT_W +281 0x0275 //RX_TDDRC_DRC_GAIN +195 0x0020 //RX_FDEQ_SUBNUM +196 0x4848 //RX_FDEQ_GAIN_0 +197 0x4850 //RX_FDEQ_GAIN_1 +198 0x6478 //RX_FDEQ_GAIN_2 +199 0x8689 //RX_FDEQ_GAIN_3 +200 0x908F //RX_FDEQ_GAIN_4 +201 0x9495 //RX_FDEQ_GAIN_5 +202 0x989D //RX_FDEQ_GAIN_6 +203 0x9DA6 //RX_FDEQ_GAIN_7 +204 0xA895 //RX_FDEQ_GAIN_8 +205 0x8A8A //RX_FDEQ_GAIN_9 +206 0x8E78 //RX_FDEQ_GAIN_10 +207 0x7070 //RX_FDEQ_GAIN_11 +208 0x7680 //RX_FDEQ_GAIN_12 +209 0x787C //RX_FDEQ_GAIN_13 +210 0x8890 //RX_FDEQ_GAIN_14 +211 0x9CAC //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0202 //RX_FDEQ_BIN_0 +221 0x0202 //RX_FDEQ_BIN_1 +222 0x0302 //RX_FDEQ_BIN_2 +223 0x0304 //RX_FDEQ_BIN_3 +224 0x0405 //RX_FDEQ_BIN_4 +225 0x0506 //RX_FDEQ_BIN_5 +226 0x0708 //RX_FDEQ_BIN_6 +227 0x090A //RX_FDEQ_BIN_7 +228 0x0B0C //RX_FDEQ_BIN_8 +229 0x0D0E //RX_FDEQ_BIN_9 +230 0x1013 //RX_FDEQ_BIN_10 +231 0x1719 //RX_FDEQ_BIN_11 +232 0x1B1E //RX_FDEQ_BIN_12 +233 0x1E1E //RX_FDEQ_BIN_13 +234 0x1E28 //RX_FDEQ_BIN_14 +235 0x282C //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x4000 //RX_FDEQ_RESRV_0 +245 0x0320 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0030 //RX_FDDRC_BAND_MARGIN_1 +248 0x0050 //RX_FDDRC_BAND_MARGIN_2 +249 0x0080 //RX_FDDRC_BAND_MARGIN_3 +250 0x0007 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x5000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x6400 //RX_FDDRC_THRD_3_2 +258 0x6400 //RX_FDDRC_THRD_3_3 +259 0x2000 //RX_FDDRC_SLANT_0_0 +260 0x2000 //RX_FDDRC_SLANT_0_1 +261 0x2000 //RX_FDDRC_SLANT_0_2 +262 0x2000 //RX_FDDRC_SLANT_0_3 +263 0x5333 //RX_FDDRC_SLANT_1_0 +264 0x5333 //RX_FDDRC_SLANT_1_1 +265 0x5333 //RX_FDDRC_SLANT_1_2 +266 0x5333 //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +286 0x000D //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 +#VOL 1 +163 0x1000 //RX_TDDRC_ALPHA_UP_1 +164 0x1000 //RX_TDDRC_ALPHA_UP_2 +165 0x1000 //RX_TDDRC_ALPHA_UP_3 +166 0x1000 //RX_TDDRC_ALPHA_UP_4 +184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +190 0x7000 //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +269 0x0000 //RX_TDDRC_THRD_0 +270 0x0000 //RX_TDDRC_THRD_1 +271 0x1800 //RX_TDDRC_THRD_2 +272 0x1800 //RX_TDDRC_THRD_3 +273 0x3000 //RX_TDDRC_SLANT_0 +274 0x6E00 //RX_TDDRC_SLANT_1 +275 0x1000 //RX_TDDRC_ALPHA_UP_0 +276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x199A //RX_TDDRC_HMNC_GAIN +279 0x0001 //RX_TDDRC_SMT_FLAG +280 0x0CCD //RX_TDDRC_SMT_W +281 0x0275 //RX_TDDRC_DRC_GAIN +195 0x0020 //RX_FDEQ_SUBNUM +196 0x4848 //RX_FDEQ_GAIN_0 +197 0x4850 //RX_FDEQ_GAIN_1 +198 0x6478 //RX_FDEQ_GAIN_2 +199 0x8689 //RX_FDEQ_GAIN_3 +200 0x908F //RX_FDEQ_GAIN_4 +201 0x9495 //RX_FDEQ_GAIN_5 +202 0x989D //RX_FDEQ_GAIN_6 +203 0x9DA6 //RX_FDEQ_GAIN_7 +204 0xA895 //RX_FDEQ_GAIN_8 +205 0x8A8A //RX_FDEQ_GAIN_9 +206 0x8E78 //RX_FDEQ_GAIN_10 +207 0x7070 //RX_FDEQ_GAIN_11 +208 0x7680 //RX_FDEQ_GAIN_12 +209 0x787C //RX_FDEQ_GAIN_13 +210 0x8890 //RX_FDEQ_GAIN_14 +211 0x9CAC //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0202 //RX_FDEQ_BIN_0 +221 0x0202 //RX_FDEQ_BIN_1 +222 0x0302 //RX_FDEQ_BIN_2 +223 0x0304 //RX_FDEQ_BIN_3 +224 0x0405 //RX_FDEQ_BIN_4 +225 0x0506 //RX_FDEQ_BIN_5 +226 0x0708 //RX_FDEQ_BIN_6 +227 0x090A //RX_FDEQ_BIN_7 +228 0x0B0C //RX_FDEQ_BIN_8 +229 0x0D0E //RX_FDEQ_BIN_9 +230 0x1013 //RX_FDEQ_BIN_10 +231 0x1719 //RX_FDEQ_BIN_11 +232 0x1B1E //RX_FDEQ_BIN_12 +233 0x1E1E //RX_FDEQ_BIN_13 +234 0x1E28 //RX_FDEQ_BIN_14 +235 0x282C //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x4000 //RX_FDEQ_RESRV_0 +245 0x0320 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0030 //RX_FDDRC_BAND_MARGIN_1 +248 0x0050 //RX_FDDRC_BAND_MARGIN_2 +249 0x0080 //RX_FDDRC_BAND_MARGIN_3 +250 0x0007 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x5000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x6400 //RX_FDDRC_THRD_3_2 +258 0x6400 //RX_FDDRC_THRD_3_3 +259 0x2000 //RX_FDDRC_SLANT_0_0 +260 0x2000 //RX_FDDRC_SLANT_0_1 +261 0x2000 //RX_FDDRC_SLANT_0_2 +262 0x2000 //RX_FDDRC_SLANT_0_3 +263 0x5333 //RX_FDDRC_SLANT_1_0 +264 0x5333 //RX_FDDRC_SLANT_1_1 +265 0x5333 //RX_FDDRC_SLANT_1_2 +266 0x5333 //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +286 0x0016 //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 +#VOL 2 +163 0x1000 //RX_TDDRC_ALPHA_UP_1 +164 0x1000 //RX_TDDRC_ALPHA_UP_2 +165 0x1000 //RX_TDDRC_ALPHA_UP_3 +166 0x1000 //RX_TDDRC_ALPHA_UP_4 +184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +190 0x7000 //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +269 0x0000 //RX_TDDRC_THRD_0 +270 0x0000 //RX_TDDRC_THRD_1 +271 0x1800 //RX_TDDRC_THRD_2 +272 0x1800 //RX_TDDRC_THRD_3 +273 0x3000 //RX_TDDRC_SLANT_0 +274 0x6E00 //RX_TDDRC_SLANT_1 +275 0x1000 //RX_TDDRC_ALPHA_UP_0 +276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x199A //RX_TDDRC_HMNC_GAIN +279 0x0001 //RX_TDDRC_SMT_FLAG +280 0x0CCD //RX_TDDRC_SMT_W +281 0x0275 //RX_TDDRC_DRC_GAIN +195 0x0020 //RX_FDEQ_SUBNUM +196 0x4848 //RX_FDEQ_GAIN_0 +197 0x4850 //RX_FDEQ_GAIN_1 +198 0x6478 //RX_FDEQ_GAIN_2 +199 0x8689 //RX_FDEQ_GAIN_3 +200 0x908F //RX_FDEQ_GAIN_4 +201 0x9495 //RX_FDEQ_GAIN_5 +202 0x989D //RX_FDEQ_GAIN_6 +203 0x9DA6 //RX_FDEQ_GAIN_7 +204 0xA895 //RX_FDEQ_GAIN_8 +205 0x8A8A //RX_FDEQ_GAIN_9 +206 0x8E78 //RX_FDEQ_GAIN_10 +207 0x7070 //RX_FDEQ_GAIN_11 +208 0x7680 //RX_FDEQ_GAIN_12 +209 0x787C //RX_FDEQ_GAIN_13 +210 0x8890 //RX_FDEQ_GAIN_14 +211 0x9CAC //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0202 //RX_FDEQ_BIN_0 +221 0x0202 //RX_FDEQ_BIN_1 +222 0x0302 //RX_FDEQ_BIN_2 +223 0x0304 //RX_FDEQ_BIN_3 +224 0x0405 //RX_FDEQ_BIN_4 +225 0x0506 //RX_FDEQ_BIN_5 +226 0x0708 //RX_FDEQ_BIN_6 +227 0x090A //RX_FDEQ_BIN_7 +228 0x0B0C //RX_FDEQ_BIN_8 +229 0x0D0E //RX_FDEQ_BIN_9 +230 0x1013 //RX_FDEQ_BIN_10 +231 0x1719 //RX_FDEQ_BIN_11 +232 0x1B1E //RX_FDEQ_BIN_12 +233 0x1E1E //RX_FDEQ_BIN_13 +234 0x1E28 //RX_FDEQ_BIN_14 +235 0x282C //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x4000 //RX_FDEQ_RESRV_0 +245 0x0320 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0030 //RX_FDDRC_BAND_MARGIN_1 +248 0x0050 //RX_FDDRC_BAND_MARGIN_2 +249 0x0080 //RX_FDDRC_BAND_MARGIN_3 +250 0x0007 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x5000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x6400 //RX_FDDRC_THRD_3_2 +258 0x6400 //RX_FDDRC_THRD_3_3 +259 0x2000 //RX_FDDRC_SLANT_0_0 +260 0x2000 //RX_FDDRC_SLANT_0_1 +261 0x2000 //RX_FDDRC_SLANT_0_2 +262 0x2000 //RX_FDDRC_SLANT_0_3 +263 0x5333 //RX_FDDRC_SLANT_1_0 +264 0x5333 //RX_FDDRC_SLANT_1_1 +265 0x5333 //RX_FDDRC_SLANT_1_2 +266 0x5333 //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +286 0x0026 //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 +#VOL 3 +163 0x1000 //RX_TDDRC_ALPHA_UP_1 +164 0x1000 //RX_TDDRC_ALPHA_UP_2 +165 0x1000 //RX_TDDRC_ALPHA_UP_3 +166 0x1000 //RX_TDDRC_ALPHA_UP_4 +184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +190 0x7000 //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +269 0x0000 //RX_TDDRC_THRD_0 +270 0x0000 //RX_TDDRC_THRD_1 +271 0x1800 //RX_TDDRC_THRD_2 +272 0x1800 //RX_TDDRC_THRD_3 +273 0x3000 //RX_TDDRC_SLANT_0 +274 0x6E00 //RX_TDDRC_SLANT_1 +275 0x1000 //RX_TDDRC_ALPHA_UP_0 +276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x199A //RX_TDDRC_HMNC_GAIN +279 0x0001 //RX_TDDRC_SMT_FLAG +280 0x0CCD //RX_TDDRC_SMT_W +281 0x0275 //RX_TDDRC_DRC_GAIN +195 0x0020 //RX_FDEQ_SUBNUM +196 0x4848 //RX_FDEQ_GAIN_0 +197 0x4850 //RX_FDEQ_GAIN_1 +198 0x6478 //RX_FDEQ_GAIN_2 +199 0x8689 //RX_FDEQ_GAIN_3 +200 0x908F //RX_FDEQ_GAIN_4 +201 0x9495 //RX_FDEQ_GAIN_5 +202 0x989D //RX_FDEQ_GAIN_6 +203 0x9DA6 //RX_FDEQ_GAIN_7 +204 0xA895 //RX_FDEQ_GAIN_8 +205 0x8A8A //RX_FDEQ_GAIN_9 +206 0x8E78 //RX_FDEQ_GAIN_10 +207 0x7070 //RX_FDEQ_GAIN_11 +208 0x7680 //RX_FDEQ_GAIN_12 +209 0x787C //RX_FDEQ_GAIN_13 +210 0x8890 //RX_FDEQ_GAIN_14 +211 0x9CAC //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0202 //RX_FDEQ_BIN_0 +221 0x0202 //RX_FDEQ_BIN_1 +222 0x0302 //RX_FDEQ_BIN_2 +223 0x0304 //RX_FDEQ_BIN_3 +224 0x0405 //RX_FDEQ_BIN_4 +225 0x0506 //RX_FDEQ_BIN_5 +226 0x0708 //RX_FDEQ_BIN_6 +227 0x090A //RX_FDEQ_BIN_7 +228 0x0B0C //RX_FDEQ_BIN_8 +229 0x0D0E //RX_FDEQ_BIN_9 +230 0x1013 //RX_FDEQ_BIN_10 +231 0x1719 //RX_FDEQ_BIN_11 +232 0x1B1E //RX_FDEQ_BIN_12 +233 0x1E1E //RX_FDEQ_BIN_13 +234 0x1E28 //RX_FDEQ_BIN_14 +235 0x282C //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x4000 //RX_FDEQ_RESRV_0 +245 0x0320 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0030 //RX_FDDRC_BAND_MARGIN_1 +248 0x0050 //RX_FDDRC_BAND_MARGIN_2 +249 0x0080 //RX_FDDRC_BAND_MARGIN_3 +250 0x0007 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x5000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x6400 //RX_FDDRC_THRD_3_2 +258 0x6400 //RX_FDDRC_THRD_3_3 +259 0x2000 //RX_FDDRC_SLANT_0_0 +260 0x2000 //RX_FDDRC_SLANT_0_1 +261 0x2000 //RX_FDDRC_SLANT_0_2 +262 0x2000 //RX_FDDRC_SLANT_0_3 +263 0x5333 //RX_FDDRC_SLANT_1_0 +264 0x5333 //RX_FDDRC_SLANT_1_1 +265 0x5333 //RX_FDDRC_SLANT_1_2 +266 0x5333 //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +286 0x003D //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 +#VOL 4 +163 0x1000 //RX_TDDRC_ALPHA_UP_1 +164 0x1000 //RX_TDDRC_ALPHA_UP_2 +165 0x1000 //RX_TDDRC_ALPHA_UP_3 +166 0x1000 //RX_TDDRC_ALPHA_UP_4 +184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +190 0x7000 //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +269 0x0000 //RX_TDDRC_THRD_0 +270 0x0000 //RX_TDDRC_THRD_1 +271 0x1800 //RX_TDDRC_THRD_2 +272 0x1800 //RX_TDDRC_THRD_3 +273 0x3000 //RX_TDDRC_SLANT_0 +274 0x6E00 //RX_TDDRC_SLANT_1 +275 0x1000 //RX_TDDRC_ALPHA_UP_0 +276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x199A //RX_TDDRC_HMNC_GAIN +279 0x0001 //RX_TDDRC_SMT_FLAG +280 0x0CCD //RX_TDDRC_SMT_W +281 0x0275 //RX_TDDRC_DRC_GAIN +195 0x0020 //RX_FDEQ_SUBNUM +196 0x4848 //RX_FDEQ_GAIN_0 +197 0x4850 //RX_FDEQ_GAIN_1 +198 0x6478 //RX_FDEQ_GAIN_2 +199 0x8689 //RX_FDEQ_GAIN_3 +200 0x908F //RX_FDEQ_GAIN_4 +201 0x9495 //RX_FDEQ_GAIN_5 +202 0x989D //RX_FDEQ_GAIN_6 +203 0x9DA6 //RX_FDEQ_GAIN_7 +204 0xA895 //RX_FDEQ_GAIN_8 +205 0x8A8A //RX_FDEQ_GAIN_9 +206 0x8E78 //RX_FDEQ_GAIN_10 +207 0x7070 //RX_FDEQ_GAIN_11 +208 0x7680 //RX_FDEQ_GAIN_12 +209 0x787C //RX_FDEQ_GAIN_13 +210 0x8890 //RX_FDEQ_GAIN_14 +211 0x9CAC //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0202 //RX_FDEQ_BIN_0 +221 0x0202 //RX_FDEQ_BIN_1 +222 0x0302 //RX_FDEQ_BIN_2 +223 0x0304 //RX_FDEQ_BIN_3 +224 0x0405 //RX_FDEQ_BIN_4 +225 0x0506 //RX_FDEQ_BIN_5 +226 0x0708 //RX_FDEQ_BIN_6 +227 0x090A //RX_FDEQ_BIN_7 +228 0x0B0C //RX_FDEQ_BIN_8 +229 0x0D0E //RX_FDEQ_BIN_9 +230 0x1013 //RX_FDEQ_BIN_10 +231 0x1719 //RX_FDEQ_BIN_11 +232 0x1B1E //RX_FDEQ_BIN_12 +233 0x1E1E //RX_FDEQ_BIN_13 +234 0x1E28 //RX_FDEQ_BIN_14 +235 0x282C //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x4000 //RX_FDEQ_RESRV_0 +245 0x0320 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0030 //RX_FDDRC_BAND_MARGIN_1 +248 0x0050 //RX_FDDRC_BAND_MARGIN_2 +249 0x0080 //RX_FDDRC_BAND_MARGIN_3 +250 0x0007 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x5000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x6400 //RX_FDDRC_THRD_3_2 +258 0x6400 //RX_FDDRC_THRD_3_3 +259 0x2000 //RX_FDDRC_SLANT_0_0 +260 0x2000 //RX_FDDRC_SLANT_0_1 +261 0x2000 //RX_FDDRC_SLANT_0_2 +262 0x2000 //RX_FDDRC_SLANT_0_3 +263 0x5333 //RX_FDDRC_SLANT_1_0 +264 0x5333 //RX_FDDRC_SLANT_1_1 +265 0x5333 //RX_FDDRC_SLANT_1_2 +266 0x5333 //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +286 0x0060 //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 +#VOL 5 +163 0x1000 //RX_TDDRC_ALPHA_UP_1 +164 0x1000 //RX_TDDRC_ALPHA_UP_2 +165 0x1000 //RX_TDDRC_ALPHA_UP_3 +166 0x1000 //RX_TDDRC_ALPHA_UP_4 +184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +190 0x7000 //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +269 0x0000 //RX_TDDRC_THRD_0 +270 0x0000 //RX_TDDRC_THRD_1 +271 0x1800 //RX_TDDRC_THRD_2 +272 0x1800 //RX_TDDRC_THRD_3 +273 0x3000 //RX_TDDRC_SLANT_0 +274 0x6E00 //RX_TDDRC_SLANT_1 +275 0x1000 //RX_TDDRC_ALPHA_UP_0 +276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x199A //RX_TDDRC_HMNC_GAIN +279 0x0001 //RX_TDDRC_SMT_FLAG +280 0x0CCD //RX_TDDRC_SMT_W +281 0x0275 //RX_TDDRC_DRC_GAIN +195 0x0020 //RX_FDEQ_SUBNUM +196 0x4848 //RX_FDEQ_GAIN_0 +197 0x4850 //RX_FDEQ_GAIN_1 +198 0x6478 //RX_FDEQ_GAIN_2 +199 0x8689 //RX_FDEQ_GAIN_3 +200 0x908F //RX_FDEQ_GAIN_4 +201 0x9495 //RX_FDEQ_GAIN_5 +202 0x989D //RX_FDEQ_GAIN_6 +203 0x9DA6 //RX_FDEQ_GAIN_7 +204 0xA895 //RX_FDEQ_GAIN_8 +205 0x8A8A //RX_FDEQ_GAIN_9 +206 0x8E78 //RX_FDEQ_GAIN_10 +207 0x7070 //RX_FDEQ_GAIN_11 +208 0x7680 //RX_FDEQ_GAIN_12 +209 0x787C //RX_FDEQ_GAIN_13 +210 0x8890 //RX_FDEQ_GAIN_14 +211 0x9CAC //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0202 //RX_FDEQ_BIN_0 +221 0x0202 //RX_FDEQ_BIN_1 +222 0x0302 //RX_FDEQ_BIN_2 +223 0x0304 //RX_FDEQ_BIN_3 +224 0x0405 //RX_FDEQ_BIN_4 +225 0x0506 //RX_FDEQ_BIN_5 +226 0x0708 //RX_FDEQ_BIN_6 +227 0x090A //RX_FDEQ_BIN_7 +228 0x0B0C //RX_FDEQ_BIN_8 +229 0x0D0E //RX_FDEQ_BIN_9 +230 0x1013 //RX_FDEQ_BIN_10 +231 0x1719 //RX_FDEQ_BIN_11 +232 0x1B1E //RX_FDEQ_BIN_12 +233 0x1E1E //RX_FDEQ_BIN_13 +234 0x1E28 //RX_FDEQ_BIN_14 +235 0x282C //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x4000 //RX_FDEQ_RESRV_0 +245 0x0320 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0030 //RX_FDDRC_BAND_MARGIN_1 +248 0x0050 //RX_FDDRC_BAND_MARGIN_2 +249 0x0080 //RX_FDDRC_BAND_MARGIN_3 +250 0x0007 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x5000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x6400 //RX_FDDRC_THRD_3_2 +258 0x6400 //RX_FDDRC_THRD_3_3 +259 0x2000 //RX_FDDRC_SLANT_0_0 +260 0x2000 //RX_FDDRC_SLANT_0_1 +261 0x2000 //RX_FDDRC_SLANT_0_2 +262 0x2000 //RX_FDDRC_SLANT_0_3 +263 0x5333 //RX_FDDRC_SLANT_1_0 +264 0x5333 //RX_FDDRC_SLANT_1_1 +265 0x5333 //RX_FDDRC_SLANT_1_2 +266 0x5333 //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +286 0x0099 //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 +#VOL 6 +163 0x1000 //RX_TDDRC_ALPHA_UP_1 +164 0x1000 //RX_TDDRC_ALPHA_UP_2 +165 0x1000 //RX_TDDRC_ALPHA_UP_3 +166 0x1000 //RX_TDDRC_ALPHA_UP_4 +184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +190 0x7000 //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +269 0x0000 //RX_TDDRC_THRD_0 +270 0x0000 //RX_TDDRC_THRD_1 +271 0x1800 //RX_TDDRC_THRD_2 +272 0x1800 //RX_TDDRC_THRD_3 +273 0x3000 //RX_TDDRC_SLANT_0 +274 0x6E00 //RX_TDDRC_SLANT_1 +275 0x1000 //RX_TDDRC_ALPHA_UP_0 +276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x199A //RX_TDDRC_HMNC_GAIN +279 0x0001 //RX_TDDRC_SMT_FLAG +280 0x0CCD //RX_TDDRC_SMT_W +281 0x0275 //RX_TDDRC_DRC_GAIN +195 0x0020 //RX_FDEQ_SUBNUM +196 0x4848 //RX_FDEQ_GAIN_0 +197 0x4850 //RX_FDEQ_GAIN_1 +198 0x6478 //RX_FDEQ_GAIN_2 +199 0x8689 //RX_FDEQ_GAIN_3 +200 0x908F //RX_FDEQ_GAIN_4 +201 0x9495 //RX_FDEQ_GAIN_5 +202 0x989D //RX_FDEQ_GAIN_6 +203 0x9DA6 //RX_FDEQ_GAIN_7 +204 0xA895 //RX_FDEQ_GAIN_8 +205 0x8A8A //RX_FDEQ_GAIN_9 +206 0x8E78 //RX_FDEQ_GAIN_10 +207 0x7070 //RX_FDEQ_GAIN_11 +208 0x7680 //RX_FDEQ_GAIN_12 +209 0x787C //RX_FDEQ_GAIN_13 +210 0x8890 //RX_FDEQ_GAIN_14 +211 0x9CAC //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0202 //RX_FDEQ_BIN_0 +221 0x0202 //RX_FDEQ_BIN_1 +222 0x0302 //RX_FDEQ_BIN_2 +223 0x0304 //RX_FDEQ_BIN_3 +224 0x0405 //RX_FDEQ_BIN_4 +225 0x0506 //RX_FDEQ_BIN_5 +226 0x0708 //RX_FDEQ_BIN_6 +227 0x090A //RX_FDEQ_BIN_7 +228 0x0B0C //RX_FDEQ_BIN_8 +229 0x0D0E //RX_FDEQ_BIN_9 +230 0x1013 //RX_FDEQ_BIN_10 +231 0x1719 //RX_FDEQ_BIN_11 +232 0x1B1E //RX_FDEQ_BIN_12 +233 0x1E1E //RX_FDEQ_BIN_13 +234 0x1E28 //RX_FDEQ_BIN_14 +235 0x282C //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x4000 //RX_FDEQ_RESRV_0 +245 0x0320 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0030 //RX_FDDRC_BAND_MARGIN_1 +248 0x0050 //RX_FDDRC_BAND_MARGIN_2 +249 0x0080 //RX_FDDRC_BAND_MARGIN_3 +250 0x0007 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x5000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x6400 //RX_FDDRC_THRD_3_2 +258 0x6400 //RX_FDDRC_THRD_3_3 +259 0x2000 //RX_FDDRC_SLANT_0_0 +260 0x2000 //RX_FDDRC_SLANT_0_1 +261 0x2000 //RX_FDDRC_SLANT_0_2 +262 0x2000 //RX_FDDRC_SLANT_0_3 +263 0x5333 //RX_FDDRC_SLANT_1_0 +264 0x5333 //RX_FDDRC_SLANT_1_1 +265 0x5333 //RX_FDDRC_SLANT_1_2 +266 0x5333 //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +286 0x0100 //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 #CASE_NAME HANDSET-HANDSET-CUSTOM2-FB -#PARAM_TYPE TX+RX -#TOTAL_CUSTOM_STEP 7 +#PARAM_MODE FULL +#PARAM_TYPE TX+2RX +#TOTAL_CUSTOM_STEP 7+7 #TX 0 0x0000 //TX_OPERATION_MODE_0 1 0x0000 //TX_OPERATION_MODE_1 @@ -2011,12 +2929,12 @@ 248 0xF800 //TX_THR_SN_EST_6 249 0xF700 //TX_THR_SN_EST_7 250 0x0000 //TX_DELTA_THR_SN_EST_0 -251 0x0100 //TX_DELTA_THR_SN_EST_1 +251 0x0200 //TX_DELTA_THR_SN_EST_1 252 0x0200 //TX_DELTA_THR_SN_EST_2 253 0x0200 //TX_DELTA_THR_SN_EST_3 -254 0x0200 //TX_DELTA_THR_SN_EST_4 -255 0x0100 //TX_DELTA_THR_SN_EST_5 -256 0x0200 //TX_DELTA_THR_SN_EST_6 +254 0x0100 //TX_DELTA_THR_SN_EST_4 +255 0x0200 //TX_DELTA_THR_SN_EST_5 +256 0x0100 //TX_DELTA_THR_SN_EST_6 257 0x0200 //TX_DELTA_THR_SN_EST_7 258 0x4000 //TX_LAMBDA_NN_EST_0 259 0x4000 //TX_LAMBDA_NN_EST_1 @@ -2044,16 +2962,16 @@ 281 0x0014 //TX_NS_LVL_CTRL_0 282 0x0016 //TX_NS_LVL_CTRL_1 283 0x0016 //TX_NS_LVL_CTRL_2 -284 0x0016 //TX_NS_LVL_CTRL_3 -285 0x0018 //TX_NS_LVL_CTRL_4 -286 0x0016 //TX_NS_LVL_CTRL_5 -287 0x0012 //TX_NS_LVL_CTRL_6 +284 0x0018 //TX_NS_LVL_CTRL_3 +285 0x0016 //TX_NS_LVL_CTRL_4 +286 0x0012 //TX_NS_LVL_CTRL_5 +287 0x0016 //TX_NS_LVL_CTRL_6 288 0x0017 //TX_NS_LVL_CTRL_7 289 0x000E //TX_MIN_GAIN_S_0 -290 0x0012 //TX_MIN_GAIN_S_1 -291 0x0007 //TX_MIN_GAIN_S_2 -292 0x0012 //TX_MIN_GAIN_S_3 -293 0x0010 //TX_MIN_GAIN_S_4 +290 0x0007 //TX_MIN_GAIN_S_1 +291 0x0012 //TX_MIN_GAIN_S_2 +292 0x0010 //TX_MIN_GAIN_S_3 +293 0x0012 //TX_MIN_GAIN_S_4 294 0x0012 //TX_MIN_GAIN_S_5 295 0x0012 //TX_MIN_GAIN_S_6 296 0x0012 //TX_MIN_GAIN_S_7 @@ -2075,29 +2993,29 @@ 312 0x7FFF //TX_A_POST_FILT_0 313 0x2000 //TX_A_POST_FILT_1 314 0x4000 //TX_A_POST_FILT_S_0 -315 0x5000 //TX_A_POST_FILT_S_1 +315 0x4000 //TX_A_POST_FILT_S_1 316 0x4000 //TX_A_POST_FILT_S_2 317 0x4000 //TX_A_POST_FILT_S_3 318 0x4000 //TX_A_POST_FILT_S_4 319 0x4000 //TX_A_POST_FILT_S_5 -320 0x4000 //TX_A_POST_FILT_S_6 +320 0x5000 //TX_A_POST_FILT_S_6 321 0x7000 //TX_A_POST_FILT_S_7 322 0x1000 //TX_B_POST_FILT_0 323 0x2000 //TX_B_POST_FILT_1 -324 0x3000 //TX_B_POST_FILT_2 +324 0x2000 //TX_B_POST_FILT_2 325 0x2000 //TX_B_POST_FILT_3 -326 0x5000 //TX_B_POST_FILT_4 +326 0x2000 //TX_B_POST_FILT_4 327 0x2000 //TX_B_POST_FILT_5 -328 0x6000 //TX_B_POST_FILT_6 +328 0x3000 //TX_B_POST_FILT_6 329 0x3000 //TX_B_POST_FILT_7 330 0x1000 //TX_B_LESSCUT_RTO_S_0 -331 0x6000 //TX_B_LESSCUT_RTO_S_1 -332 0x6000 //TX_B_LESSCUT_RTO_S_2 -333 0x6000 //TX_B_LESSCUT_RTO_S_3 -334 0x6000 //TX_B_LESSCUT_RTO_S_4 -335 0x6000 //TX_B_LESSCUT_RTO_S_5 -336 0x7FFF //TX_B_LESSCUT_RTO_S_6 -337 0x7FFF //TX_B_LESSCUT_RTO_S_7 +331 0x1000 //TX_B_LESSCUT_RTO_S_1 +332 0x1000 //TX_B_LESSCUT_RTO_S_2 +333 0x1000 //TX_B_LESSCUT_RTO_S_3 +334 0x1000 //TX_B_LESSCUT_RTO_S_4 +335 0x1000 //TX_B_LESSCUT_RTO_S_5 +336 0x1000 //TX_B_LESSCUT_RTO_S_6 +337 0x1000 //TX_B_LESSCUT_RTO_S_7 338 0x7E14 //TX_LAMBDA_PFILT 339 0x7C29 //TX_LAMBDA_PFILT_S_0 340 0x7C29 //TX_LAMBDA_PFILT_S_1 @@ -2140,10 +3058,10 @@ 377 0x4E20 //TX_NOISE_TH_5_4 378 0x39DF //TX_NOISE_TH_6 379 0x0014 //TX_MINENOISE_TH -380 0x4000 //TX_MINENOISE_MIC0_TH_MTS -381 0xFFEE //TX_MINENOISE_MIC0_TH_EXP -382 0x6000 //TX_MINENOISE_MIC0_S_TH_MTS -383 0xFFF3 //TX_MINENOISE_MIC0_S_TH_EXP +380 0xD508 //TX_MORENS_TFMASK_TH +381 0x0001 //TX_DRC_QUIET_FLOOR +382 0x6D60 //TX_RATIODTL_CUT_TH +383 0x1482 //TX_DT_CUT_K1 384 0x00A5 //TX_OUT_ENER_S_TH_CLEAN 385 0x00A5 //TX_OUT_ENER_S_TH_LESSCLEAN 386 0x00A5 //TX_OUT_ENER_S_TH_NOISY @@ -2151,15 +3069,15 @@ 388 0x0200 //TX_OUT_ENER_TH_SPEECH 389 0x2000 //TX_SN_NPB_GAIN 390 0x0000 //TX_NN_NPB_GAIN -391 0x0000 //TX_CSX_ALPHA_0 -392 0x0000 //TX_CSX_ALPHA_1 -393 0x0000 //TX_CSX_ALPHA_2 -394 0x0000 //TX_CSX_ALPHA_3 -395 0x0800 //TX_MU_ARSP_EST -396 0x00C8 //TX_P_OUTBEAM_MIN_TH +391 0x3000 //TX_POST_MASK_SUP_HSNE +392 0x07D0 //TX_TAIL_DET_TH +393 0x4000 //TX_B_LESSCUT_RTO_WTA +394 0x0000 //TX_MEL_G_R +395 0x0080 //TX_SUPHIGH_TH +396 0x0000 //TX_MASK_G_R 397 0x0002 //TX_EXTRA_NS_L -398 0x0800 //TX_EXTRA_NS_A -399 0x0005 //TX_VR_NOISE_FLOOR_TH +398 0x1800 //TX_C_POST_FLT_MASK +399 0x7FFF //TX_A_POST_FLT_WNS 400 0x0148 //TX_MIN_G_LOW300HZ 401 0x0004 //TX_MAXLEVEL_CNG 402 0x00B4 //TX_STN_NOISE_TH @@ -2274,16 +3192,16 @@ 511 0x6666 //TX_MIC_TO_BFGAIN 512 0x0000 //TX_MICTOBFGAIN0 513 0x0000 //TX_FASTMUE_TH -514 0x0000 //TX_DERVB_LEN_0 -515 0x0000 //TX_DERVB_LEN_1 -516 0x0000 //TX_RHO_DERVB -517 0x0000 //TX_MIC_INDX_DERVB -518 0x0000 //TX_MU_DERVB -519 0x0000 //TX_DR_RESRV_0 -520 0x0000 //TX_DR_RESRV_1 -521 0x0000 //TX_DR_RESRV_2 -522 0x0000 //TX_DR_RESRV_3 -523 0x0000 //TX_DR_RESRV_4 +514 0x2CCC //TX_DEREVERB_LF_MU +515 0x3200 //TX_DEREVERB_HF_MU +516 0x0007 //TX_DEREVERB_DELAY +517 0x0004 //TX_DEREVERB_COEF_LEN +518 0x0003 //TX_DEREVERB_DNR +519 0x0000 //TX_DEREVERB_ALPHA +520 0x0000 //TX_DEREVERB_BETA +521 0x7FFF //TX_GSC_RTOL_TH +522 0x7FFF //TX_GSC_RTOH_TH +523 0x7E2C //TX_WIDE2_MEANHTH 524 0x0000 //TX_DR_RESRV_5 525 0x0000 //TX_DR_RESRV_6 526 0x0000 //TX_DR_RESRV_7 @@ -2657,6 +3575,71 @@ 894 0xC000 //TX_FASTNS_SSA_THHFL 895 0xCCCC //TX_FASTNS_SSA_THLFH 896 0xD999 //TX_FASTNS_SSA_THHFH +897 0x2339 //TX_SENDFUNC_REG_MICMUTE +898 0x0021 //TX_SENDFUNC_REG_MICMUTE1 +899 0x02BC //TX_MICMUTE_RATIO_THR +900 0x0140 //TX_MICMUTE_AMP_THR +901 0x0004 //TX_MICMUTE_HPF_IND +902 0x00C0 //TX_MICMUTE_LOG_EYR_TH +903 0x0008 //TX_MICMUTE_CVG_TIME +904 0x0008 //TX_MICMUTE_RELEASE_TIME +905 0x01FE //TX_MIC_VOLUME_MIC0MUTE +906 0x0020 //TX_MICMUTE_EPD_OFFSET_0 +907 0x001E //TX_MICMUTE_FRQ_AEC_L +908 0x7999 //TX_MICMUTE_EAD_THR +909 0x7FFF //TX_MICMUTE_LAMBDA_CB_NLE +910 0x7FFF //TX_MICMUTE_LAMBDA_RE_EST +911 0x4000 //TX_DTD_THR1_MICMUTE_0 +912 0x7000 //TX_DTD_THR1_MICMUTE_1 +913 0x7FFF //TX_DTD_THR1_MICMUTE_2 +914 0x7FFF //TX_DTD_THR1_MICMUTE_3 +915 0x6CCC //TX_DTD_THR2_MICMUTE_0 +916 0x0400 //TX_MICMUTE_MIN_EQ_RE_EST_0 +917 0x0400 //TX_MICMUTE_MIN_EQ_RE_EST_1 +918 0x1000 //TX_MICMUTE_MIN_EQ_RE_EST_2 +919 0x7FFF //TX_MICMUTE_MIN_EQ_RE_EST_3 +920 0x7FFF //TX_MICMUTE_MIN_EQ_RE_EST_4 +921 0x4000 //TX_MICMUTE_C_POST_FLT +922 0x03E8 //TX_MICMUTE_DT_CUT_K +923 0x0001 //TX_MICMUTE_DT_CUT_THR +924 0x03E8 //TX_MICMUTE_DT_CUT_K2 +925 0x0001 //TX_MICMUTE_DT_CUT_THR2 +926 0x0064 //TX_MICMUTE_DT2_HOLD_N +927 0x1000 //TX_MICMUTE_RATIODTH_THCUT +928 0x1000 //TX_MICMUTE_B_POST_FLT_ECHOL +929 0x7FFF //TX_MICMUTE_B_POST_FLT_ECHOH +930 0x0400 //TX_MICMUTE_C_POST_FLT_MASK +931 0x7999 //TX_MICMUTE_RATIODTL_CUT_TH +932 0x0258 //TX_MICMUTE_DT_CUT_K1 +933 0x0800 //TX_MICMUTE_N2_SN_EST +934 0xFC00 //TX_MICMUTE_THR_SN_EST_0 +935 0x001C //TX_MICMUTE_MIN_G_CTRL_0 +936 0x6000 //TX_MICMUTE_A_POST_FILT_S_0 +937 0x7000 //TX_MICMUTE_B_POST_FILT_0 +938 0x2710 //TX_MIC1RUB_AMP_THR +939 0x0010 //TX_MIC1MUTE_RATIO_THR +940 0x0450 //TX_MIC1MUTE_AMP_THR +941 0x0008 //TX_MIC1MUTE_CVG_TIME +942 0x0008 //TX_MIC1MUTE_RELEASE_TIME +943 0x0000 //TX_AMS_RESRV_01 +944 0x0000 //TX_AMS_RESRV_02 +945 0x0000 //TX_AMS_RESRV_03 +946 0x0000 //TX_AMS_RESRV_04 +947 0x0000 //TX_AMS_RESRV_05 +948 0x0000 //TX_AMS_RESRV_06 +949 0x0000 //TX_AMS_RESRV_07 +950 0x0000 //TX_AMS_RESRV_08 +951 0x0000 //TX_AMS_RESRV_09 +952 0x0000 //TX_AMS_RESRV_10 +953 0x0000 //TX_AMS_RESRV_11 +954 0x0000 //TX_AMS_RESRV_12 +955 0x0000 //TX_AMS_RESRV_13 +956 0x0000 //TX_AMS_RESRV_14 +957 0x0000 //TX_AMS_RESRV_15 +958 0x0000 //TX_AMS_RESRV_16 +959 0x0000 //TX_AMS_RESRV_17 +960 0x0000 //TX_AMS_RESRV_18 +961 0x0000 //TX_AMS_RESRV_19 #RX 0 0x003C //RX_RECVFUNC_MODE_0 1 0x0000 //RX_RECVFUNC_MODE_1 @@ -3508,10 +4491,862 @@ 110 0x0000 //RX_FDDRC_RESRV_0 129 0x0100 //RX_SPK_VOL 130 0x0000 //RX_VOL_RESRV_0 +#RX 2 +157 0x003C //RX_RECVFUNC_MODE_0 +158 0x0000 //RX_RECVFUNC_MODE_1 +159 0x0004 //RX_SAMPLINGFREQ_SIG +160 0x0004 //RX_SAMPLINGFREQ_PROC +161 0x000A //RX_FRAME_SZ +162 0x0000 //RX_DELAY_OPT +163 0x1000 //RX_TDDRC_ALPHA_UP_1 +164 0x1000 //RX_TDDRC_ALPHA_UP_2 +165 0x1000 //RX_TDDRC_ALPHA_UP_3 +166 0x1000 //RX_TDDRC_ALPHA_UP_4 +167 0x064E //RX_PGA +168 0x7FFF //RX_A_HP +169 0x4000 //RX_B_PE +170 0x5800 //RX_THR_PITCH_DET_0 +171 0x5000 //RX_THR_PITCH_DET_1 +172 0x4000 //RX_THR_PITCH_DET_2 +173 0x0008 //RX_PITCH_BFR_LEN +174 0x0003 //RX_SBD_PITCH_DET +175 0x0100 //RX_PP_RESRV_0 +176 0x0020 //RX_PP_RESRV_1 +177 0x0600 //RX_N_SN_EST +178 0x000C //RX_N2_SN_EST +179 0x000F //RX_NS_LVL_CTRL +180 0xF800 //RX_THR_SN_EST +181 0x7E00 //RX_LAMBDA_PFILT +182 0x000A //RX_FENS_RESRV_0 +183 0x0190 //RX_FENS_RESRV_1 +184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +187 0x0002 //RX_EXTRA_NS_L +188 0x0800 //RX_EXTRA_NS_A +189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +190 0x7000 //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +192 0x199A //RX_A_POST_FLT +193 0x0000 //RX_LMT_THRD +194 0x4000 //RX_LMT_ALPHA +195 0x0020 //RX_FDEQ_SUBNUM +196 0x4848 //RX_FDEQ_GAIN_0 +197 0x4850 //RX_FDEQ_GAIN_1 +198 0x6478 //RX_FDEQ_GAIN_2 +199 0x8689 //RX_FDEQ_GAIN_3 +200 0x908F //RX_FDEQ_GAIN_4 +201 0x9495 //RX_FDEQ_GAIN_5 +202 0x989D //RX_FDEQ_GAIN_6 +203 0x9DA6 //RX_FDEQ_GAIN_7 +204 0xA895 //RX_FDEQ_GAIN_8 +205 0x8A8A //RX_FDEQ_GAIN_9 +206 0x8E78 //RX_FDEQ_GAIN_10 +207 0x7070 //RX_FDEQ_GAIN_11 +208 0x7680 //RX_FDEQ_GAIN_12 +209 0x787C //RX_FDEQ_GAIN_13 +210 0x8890 //RX_FDEQ_GAIN_14 +211 0x9CAC //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0202 //RX_FDEQ_BIN_0 +221 0x0202 //RX_FDEQ_BIN_1 +222 0x0302 //RX_FDEQ_BIN_2 +223 0x0304 //RX_FDEQ_BIN_3 +224 0x0405 //RX_FDEQ_BIN_4 +225 0x0506 //RX_FDEQ_BIN_5 +226 0x0708 //RX_FDEQ_BIN_6 +227 0x090A //RX_FDEQ_BIN_7 +228 0x0B0C //RX_FDEQ_BIN_8 +229 0x0D0E //RX_FDEQ_BIN_9 +230 0x1013 //RX_FDEQ_BIN_10 +231 0x1719 //RX_FDEQ_BIN_11 +232 0x1B1E //RX_FDEQ_BIN_12 +233 0x1E1E //RX_FDEQ_BIN_13 +234 0x1E28 //RX_FDEQ_BIN_14 +235 0x282C //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x4000 //RX_FDEQ_RESRV_0 +245 0x0320 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0030 //RX_FDDRC_BAND_MARGIN_1 +248 0x0050 //RX_FDDRC_BAND_MARGIN_2 +249 0x0080 //RX_FDDRC_BAND_MARGIN_3 +250 0x0007 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x5000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x6400 //RX_FDDRC_THRD_3_2 +258 0x6400 //RX_FDDRC_THRD_3_3 +259 0x2000 //RX_FDDRC_SLANT_0_0 +260 0x2000 //RX_FDDRC_SLANT_0_1 +261 0x2000 //RX_FDDRC_SLANT_0_2 +262 0x2000 //RX_FDDRC_SLANT_0_3 +263 0x5333 //RX_FDDRC_SLANT_1_0 +264 0x5333 //RX_FDDRC_SLANT_1_1 +265 0x5333 //RX_FDDRC_SLANT_1_2 +266 0x5333 //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +268 0x0002 //RX_FILTINDX +269 0x0000 //RX_TDDRC_THRD_0 +270 0x0000 //RX_TDDRC_THRD_1 +271 0x1800 //RX_TDDRC_THRD_2 +272 0x1800 //RX_TDDRC_THRD_3 +273 0x3000 //RX_TDDRC_SLANT_0 +274 0x6E00 //RX_TDDRC_SLANT_1 +275 0x1000 //RX_TDDRC_ALPHA_UP_0 +276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x199A //RX_TDDRC_HMNC_GAIN +279 0x0001 //RX_TDDRC_SMT_FLAG +280 0x0CCD //RX_TDDRC_SMT_W +281 0x0275 //RX_TDDRC_DRC_GAIN +282 0x7C00 //RX_LAMBDA_PKA_FP +283 0x2000 //RX_TPKA_FP +284 0x2000 //RX_MIN_G_FP +285 0x0080 //RX_MAX_G_FP +286 0x000D //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 +288 0x0000 //RX_MAXLEVEL_CNG +289 0x3000 //RX_BWE_UV_TH +290 0x3000 //RX_BWE_UV_TH2 +291 0x1800 //RX_BWE_UV_TH3 +292 0x1000 //RX_BWE_V_TH +293 0x04CD //RX_BWE_GAIN1_V_TH1 +294 0x0F33 //RX_BWE_GAIN1_V_TH2 +295 0x7333 //RX_BWE_UV_EQ +296 0x199A //RX_BWE_V_EQ +297 0x7333 //RX_BWE_TONE_TH +298 0x0004 //RX_BWE_UV_HOLD_T +299 0x6CCD //RX_BWE_GAIN2_ALPHA +300 0x799A //RX_BWE_GAIN3_ALPHA +301 0x001E //RX_BWE_CUTOFF +302 0x3000 //RX_BWE_GAINFILL +303 0x3200 //RX_BWE_MAXTH_TONE +304 0x2000 //RX_BWE_EQ_0 +305 0x2000 //RX_BWE_EQ_1 +306 0x2000 //RX_BWE_EQ_2 +307 0x2000 //RX_BWE_EQ_3 +308 0x2000 //RX_BWE_EQ_4 +309 0x2000 //RX_BWE_EQ_5 +310 0x2000 //RX_BWE_EQ_6 +311 0x0000 //RX_BWE_RESRV_0 +312 0x0000 //RX_BWE_RESRV_1 +313 0x0000 //RX_BWE_RESRV_2 +#VOL 0 +163 0x1000 //RX_TDDRC_ALPHA_UP_1 +164 0x1000 //RX_TDDRC_ALPHA_UP_2 +165 0x1000 //RX_TDDRC_ALPHA_UP_3 +166 0x1000 //RX_TDDRC_ALPHA_UP_4 +184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +190 0x7000 //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +269 0x0000 //RX_TDDRC_THRD_0 +270 0x0000 //RX_TDDRC_THRD_1 +271 0x1800 //RX_TDDRC_THRD_2 +272 0x1800 //RX_TDDRC_THRD_3 +273 0x3000 //RX_TDDRC_SLANT_0 +274 0x6E00 //RX_TDDRC_SLANT_1 +275 0x1000 //RX_TDDRC_ALPHA_UP_0 +276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x199A //RX_TDDRC_HMNC_GAIN +279 0x0001 //RX_TDDRC_SMT_FLAG +280 0x0CCD //RX_TDDRC_SMT_W +281 0x0275 //RX_TDDRC_DRC_GAIN +195 0x0020 //RX_FDEQ_SUBNUM +196 0x4848 //RX_FDEQ_GAIN_0 +197 0x4850 //RX_FDEQ_GAIN_1 +198 0x6478 //RX_FDEQ_GAIN_2 +199 0x8689 //RX_FDEQ_GAIN_3 +200 0x908F //RX_FDEQ_GAIN_4 +201 0x9495 //RX_FDEQ_GAIN_5 +202 0x989D //RX_FDEQ_GAIN_6 +203 0x9DA6 //RX_FDEQ_GAIN_7 +204 0xA895 //RX_FDEQ_GAIN_8 +205 0x8A8A //RX_FDEQ_GAIN_9 +206 0x8E78 //RX_FDEQ_GAIN_10 +207 0x7070 //RX_FDEQ_GAIN_11 +208 0x7680 //RX_FDEQ_GAIN_12 +209 0x787C //RX_FDEQ_GAIN_13 +210 0x8890 //RX_FDEQ_GAIN_14 +211 0x9CAC //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0202 //RX_FDEQ_BIN_0 +221 0x0202 //RX_FDEQ_BIN_1 +222 0x0302 //RX_FDEQ_BIN_2 +223 0x0304 //RX_FDEQ_BIN_3 +224 0x0405 //RX_FDEQ_BIN_4 +225 0x0506 //RX_FDEQ_BIN_5 +226 0x0708 //RX_FDEQ_BIN_6 +227 0x090A //RX_FDEQ_BIN_7 +228 0x0B0C //RX_FDEQ_BIN_8 +229 0x0D0E //RX_FDEQ_BIN_9 +230 0x1013 //RX_FDEQ_BIN_10 +231 0x1719 //RX_FDEQ_BIN_11 +232 0x1B1E //RX_FDEQ_BIN_12 +233 0x1E1E //RX_FDEQ_BIN_13 +234 0x1E28 //RX_FDEQ_BIN_14 +235 0x282C //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x4000 //RX_FDEQ_RESRV_0 +245 0x0320 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0030 //RX_FDDRC_BAND_MARGIN_1 +248 0x0050 //RX_FDDRC_BAND_MARGIN_2 +249 0x0080 //RX_FDDRC_BAND_MARGIN_3 +250 0x0007 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x5000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x6400 //RX_FDDRC_THRD_3_2 +258 0x6400 //RX_FDDRC_THRD_3_3 +259 0x2000 //RX_FDDRC_SLANT_0_0 +260 0x2000 //RX_FDDRC_SLANT_0_1 +261 0x2000 //RX_FDDRC_SLANT_0_2 +262 0x2000 //RX_FDDRC_SLANT_0_3 +263 0x5333 //RX_FDDRC_SLANT_1_0 +264 0x5333 //RX_FDDRC_SLANT_1_1 +265 0x5333 //RX_FDDRC_SLANT_1_2 +266 0x5333 //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +286 0x000D //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 +#VOL 1 +163 0x1000 //RX_TDDRC_ALPHA_UP_1 +164 0x1000 //RX_TDDRC_ALPHA_UP_2 +165 0x1000 //RX_TDDRC_ALPHA_UP_3 +166 0x1000 //RX_TDDRC_ALPHA_UP_4 +184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +190 0x7000 //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +269 0x0000 //RX_TDDRC_THRD_0 +270 0x0000 //RX_TDDRC_THRD_1 +271 0x1800 //RX_TDDRC_THRD_2 +272 0x1800 //RX_TDDRC_THRD_3 +273 0x3000 //RX_TDDRC_SLANT_0 +274 0x6E00 //RX_TDDRC_SLANT_1 +275 0x1000 //RX_TDDRC_ALPHA_UP_0 +276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x199A //RX_TDDRC_HMNC_GAIN +279 0x0001 //RX_TDDRC_SMT_FLAG +280 0x0CCD //RX_TDDRC_SMT_W +281 0x0275 //RX_TDDRC_DRC_GAIN +195 0x0020 //RX_FDEQ_SUBNUM +196 0x4848 //RX_FDEQ_GAIN_0 +197 0x4850 //RX_FDEQ_GAIN_1 +198 0x6478 //RX_FDEQ_GAIN_2 +199 0x8689 //RX_FDEQ_GAIN_3 +200 0x908F //RX_FDEQ_GAIN_4 +201 0x9495 //RX_FDEQ_GAIN_5 +202 0x989D //RX_FDEQ_GAIN_6 +203 0x9DA6 //RX_FDEQ_GAIN_7 +204 0xA895 //RX_FDEQ_GAIN_8 +205 0x8A8A //RX_FDEQ_GAIN_9 +206 0x8E78 //RX_FDEQ_GAIN_10 +207 0x7070 //RX_FDEQ_GAIN_11 +208 0x7680 //RX_FDEQ_GAIN_12 +209 0x787C //RX_FDEQ_GAIN_13 +210 0x8890 //RX_FDEQ_GAIN_14 +211 0x9CAC //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0202 //RX_FDEQ_BIN_0 +221 0x0202 //RX_FDEQ_BIN_1 +222 0x0302 //RX_FDEQ_BIN_2 +223 0x0304 //RX_FDEQ_BIN_3 +224 0x0405 //RX_FDEQ_BIN_4 +225 0x0506 //RX_FDEQ_BIN_5 +226 0x0708 //RX_FDEQ_BIN_6 +227 0x090A //RX_FDEQ_BIN_7 +228 0x0B0C //RX_FDEQ_BIN_8 +229 0x0D0E //RX_FDEQ_BIN_9 +230 0x1013 //RX_FDEQ_BIN_10 +231 0x1719 //RX_FDEQ_BIN_11 +232 0x1B1E //RX_FDEQ_BIN_12 +233 0x1E1E //RX_FDEQ_BIN_13 +234 0x1E28 //RX_FDEQ_BIN_14 +235 0x282C //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x4000 //RX_FDEQ_RESRV_0 +245 0x0320 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0030 //RX_FDDRC_BAND_MARGIN_1 +248 0x0050 //RX_FDDRC_BAND_MARGIN_2 +249 0x0080 //RX_FDDRC_BAND_MARGIN_3 +250 0x0007 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x5000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x6400 //RX_FDDRC_THRD_3_2 +258 0x6400 //RX_FDDRC_THRD_3_3 +259 0x2000 //RX_FDDRC_SLANT_0_0 +260 0x2000 //RX_FDDRC_SLANT_0_1 +261 0x2000 //RX_FDDRC_SLANT_0_2 +262 0x2000 //RX_FDDRC_SLANT_0_3 +263 0x5333 //RX_FDDRC_SLANT_1_0 +264 0x5333 //RX_FDDRC_SLANT_1_1 +265 0x5333 //RX_FDDRC_SLANT_1_2 +266 0x5333 //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +286 0x0016 //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 +#VOL 2 +163 0x1000 //RX_TDDRC_ALPHA_UP_1 +164 0x1000 //RX_TDDRC_ALPHA_UP_2 +165 0x1000 //RX_TDDRC_ALPHA_UP_3 +166 0x1000 //RX_TDDRC_ALPHA_UP_4 +184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +190 0x7000 //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +269 0x0000 //RX_TDDRC_THRD_0 +270 0x0000 //RX_TDDRC_THRD_1 +271 0x1800 //RX_TDDRC_THRD_2 +272 0x1800 //RX_TDDRC_THRD_3 +273 0x3000 //RX_TDDRC_SLANT_0 +274 0x6E00 //RX_TDDRC_SLANT_1 +275 0x1000 //RX_TDDRC_ALPHA_UP_0 +276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x199A //RX_TDDRC_HMNC_GAIN +279 0x0001 //RX_TDDRC_SMT_FLAG +280 0x0CCD //RX_TDDRC_SMT_W +281 0x0275 //RX_TDDRC_DRC_GAIN +195 0x0020 //RX_FDEQ_SUBNUM +196 0x4848 //RX_FDEQ_GAIN_0 +197 0x4850 //RX_FDEQ_GAIN_1 +198 0x6478 //RX_FDEQ_GAIN_2 +199 0x8689 //RX_FDEQ_GAIN_3 +200 0x908F //RX_FDEQ_GAIN_4 +201 0x9495 //RX_FDEQ_GAIN_5 +202 0x989D //RX_FDEQ_GAIN_6 +203 0x9DA6 //RX_FDEQ_GAIN_7 +204 0xA895 //RX_FDEQ_GAIN_8 +205 0x8A8A //RX_FDEQ_GAIN_9 +206 0x8E78 //RX_FDEQ_GAIN_10 +207 0x7070 //RX_FDEQ_GAIN_11 +208 0x7680 //RX_FDEQ_GAIN_12 +209 0x787C //RX_FDEQ_GAIN_13 +210 0x8890 //RX_FDEQ_GAIN_14 +211 0x9CAC //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0202 //RX_FDEQ_BIN_0 +221 0x0202 //RX_FDEQ_BIN_1 +222 0x0302 //RX_FDEQ_BIN_2 +223 0x0304 //RX_FDEQ_BIN_3 +224 0x0405 //RX_FDEQ_BIN_4 +225 0x0506 //RX_FDEQ_BIN_5 +226 0x0708 //RX_FDEQ_BIN_6 +227 0x090A //RX_FDEQ_BIN_7 +228 0x0B0C //RX_FDEQ_BIN_8 +229 0x0D0E //RX_FDEQ_BIN_9 +230 0x1013 //RX_FDEQ_BIN_10 +231 0x1719 //RX_FDEQ_BIN_11 +232 0x1B1E //RX_FDEQ_BIN_12 +233 0x1E1E //RX_FDEQ_BIN_13 +234 0x1E28 //RX_FDEQ_BIN_14 +235 0x282C //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x4000 //RX_FDEQ_RESRV_0 +245 0x0320 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0030 //RX_FDDRC_BAND_MARGIN_1 +248 0x0050 //RX_FDDRC_BAND_MARGIN_2 +249 0x0080 //RX_FDDRC_BAND_MARGIN_3 +250 0x0007 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x5000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x6400 //RX_FDDRC_THRD_3_2 +258 0x6400 //RX_FDDRC_THRD_3_3 +259 0x2000 //RX_FDDRC_SLANT_0_0 +260 0x2000 //RX_FDDRC_SLANT_0_1 +261 0x2000 //RX_FDDRC_SLANT_0_2 +262 0x2000 //RX_FDDRC_SLANT_0_3 +263 0x5333 //RX_FDDRC_SLANT_1_0 +264 0x5333 //RX_FDDRC_SLANT_1_1 +265 0x5333 //RX_FDDRC_SLANT_1_2 +266 0x5333 //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +286 0x0026 //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 +#VOL 3 +163 0x1000 //RX_TDDRC_ALPHA_UP_1 +164 0x1000 //RX_TDDRC_ALPHA_UP_2 +165 0x1000 //RX_TDDRC_ALPHA_UP_3 +166 0x1000 //RX_TDDRC_ALPHA_UP_4 +184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +190 0x7000 //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +269 0x0000 //RX_TDDRC_THRD_0 +270 0x0000 //RX_TDDRC_THRD_1 +271 0x1800 //RX_TDDRC_THRD_2 +272 0x1800 //RX_TDDRC_THRD_3 +273 0x3000 //RX_TDDRC_SLANT_0 +274 0x6E00 //RX_TDDRC_SLANT_1 +275 0x1000 //RX_TDDRC_ALPHA_UP_0 +276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x199A //RX_TDDRC_HMNC_GAIN +279 0x0001 //RX_TDDRC_SMT_FLAG +280 0x0CCD //RX_TDDRC_SMT_W +281 0x0275 //RX_TDDRC_DRC_GAIN +195 0x0020 //RX_FDEQ_SUBNUM +196 0x4848 //RX_FDEQ_GAIN_0 +197 0x4850 //RX_FDEQ_GAIN_1 +198 0x6478 //RX_FDEQ_GAIN_2 +199 0x8689 //RX_FDEQ_GAIN_3 +200 0x908F //RX_FDEQ_GAIN_4 +201 0x9495 //RX_FDEQ_GAIN_5 +202 0x989D //RX_FDEQ_GAIN_6 +203 0x9DA6 //RX_FDEQ_GAIN_7 +204 0xA895 //RX_FDEQ_GAIN_8 +205 0x8A8A //RX_FDEQ_GAIN_9 +206 0x8E78 //RX_FDEQ_GAIN_10 +207 0x7070 //RX_FDEQ_GAIN_11 +208 0x7680 //RX_FDEQ_GAIN_12 +209 0x787C //RX_FDEQ_GAIN_13 +210 0x8890 //RX_FDEQ_GAIN_14 +211 0x9CAC //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0202 //RX_FDEQ_BIN_0 +221 0x0202 //RX_FDEQ_BIN_1 +222 0x0302 //RX_FDEQ_BIN_2 +223 0x0304 //RX_FDEQ_BIN_3 +224 0x0405 //RX_FDEQ_BIN_4 +225 0x0506 //RX_FDEQ_BIN_5 +226 0x0708 //RX_FDEQ_BIN_6 +227 0x090A //RX_FDEQ_BIN_7 +228 0x0B0C //RX_FDEQ_BIN_8 +229 0x0D0E //RX_FDEQ_BIN_9 +230 0x1013 //RX_FDEQ_BIN_10 +231 0x1719 //RX_FDEQ_BIN_11 +232 0x1B1E //RX_FDEQ_BIN_12 +233 0x1E1E //RX_FDEQ_BIN_13 +234 0x1E28 //RX_FDEQ_BIN_14 +235 0x282C //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x4000 //RX_FDEQ_RESRV_0 +245 0x0320 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0030 //RX_FDDRC_BAND_MARGIN_1 +248 0x0050 //RX_FDDRC_BAND_MARGIN_2 +249 0x0080 //RX_FDDRC_BAND_MARGIN_3 +250 0x0007 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x5000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x6400 //RX_FDDRC_THRD_3_2 +258 0x6400 //RX_FDDRC_THRD_3_3 +259 0x2000 //RX_FDDRC_SLANT_0_0 +260 0x2000 //RX_FDDRC_SLANT_0_1 +261 0x2000 //RX_FDDRC_SLANT_0_2 +262 0x2000 //RX_FDDRC_SLANT_0_3 +263 0x5333 //RX_FDDRC_SLANT_1_0 +264 0x5333 //RX_FDDRC_SLANT_1_1 +265 0x5333 //RX_FDDRC_SLANT_1_2 +266 0x5333 //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +286 0x003D //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 +#VOL 4 +163 0x1000 //RX_TDDRC_ALPHA_UP_1 +164 0x1000 //RX_TDDRC_ALPHA_UP_2 +165 0x1000 //RX_TDDRC_ALPHA_UP_3 +166 0x1000 //RX_TDDRC_ALPHA_UP_4 +184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +190 0x7000 //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +269 0x0000 //RX_TDDRC_THRD_0 +270 0x0000 //RX_TDDRC_THRD_1 +271 0x1800 //RX_TDDRC_THRD_2 +272 0x1800 //RX_TDDRC_THRD_3 +273 0x3000 //RX_TDDRC_SLANT_0 +274 0x6E00 //RX_TDDRC_SLANT_1 +275 0x1000 //RX_TDDRC_ALPHA_UP_0 +276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x199A //RX_TDDRC_HMNC_GAIN +279 0x0001 //RX_TDDRC_SMT_FLAG +280 0x0CCD //RX_TDDRC_SMT_W +281 0x0275 //RX_TDDRC_DRC_GAIN +195 0x0020 //RX_FDEQ_SUBNUM +196 0x4848 //RX_FDEQ_GAIN_0 +197 0x4850 //RX_FDEQ_GAIN_1 +198 0x6478 //RX_FDEQ_GAIN_2 +199 0x8689 //RX_FDEQ_GAIN_3 +200 0x908F //RX_FDEQ_GAIN_4 +201 0x9495 //RX_FDEQ_GAIN_5 +202 0x989D //RX_FDEQ_GAIN_6 +203 0x9DA6 //RX_FDEQ_GAIN_7 +204 0xA895 //RX_FDEQ_GAIN_8 +205 0x8A8A //RX_FDEQ_GAIN_9 +206 0x8E78 //RX_FDEQ_GAIN_10 +207 0x7070 //RX_FDEQ_GAIN_11 +208 0x7680 //RX_FDEQ_GAIN_12 +209 0x787C //RX_FDEQ_GAIN_13 +210 0x8890 //RX_FDEQ_GAIN_14 +211 0x9CAC //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0202 //RX_FDEQ_BIN_0 +221 0x0202 //RX_FDEQ_BIN_1 +222 0x0302 //RX_FDEQ_BIN_2 +223 0x0304 //RX_FDEQ_BIN_3 +224 0x0405 //RX_FDEQ_BIN_4 +225 0x0506 //RX_FDEQ_BIN_5 +226 0x0708 //RX_FDEQ_BIN_6 +227 0x090A //RX_FDEQ_BIN_7 +228 0x0B0C //RX_FDEQ_BIN_8 +229 0x0D0E //RX_FDEQ_BIN_9 +230 0x1013 //RX_FDEQ_BIN_10 +231 0x1719 //RX_FDEQ_BIN_11 +232 0x1B1E //RX_FDEQ_BIN_12 +233 0x1E1E //RX_FDEQ_BIN_13 +234 0x1E28 //RX_FDEQ_BIN_14 +235 0x282C //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x4000 //RX_FDEQ_RESRV_0 +245 0x0320 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0030 //RX_FDDRC_BAND_MARGIN_1 +248 0x0050 //RX_FDDRC_BAND_MARGIN_2 +249 0x0080 //RX_FDDRC_BAND_MARGIN_3 +250 0x0007 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x5000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x6400 //RX_FDDRC_THRD_3_2 +258 0x6400 //RX_FDDRC_THRD_3_3 +259 0x2000 //RX_FDDRC_SLANT_0_0 +260 0x2000 //RX_FDDRC_SLANT_0_1 +261 0x2000 //RX_FDDRC_SLANT_0_2 +262 0x2000 //RX_FDDRC_SLANT_0_3 +263 0x5333 //RX_FDDRC_SLANT_1_0 +264 0x5333 //RX_FDDRC_SLANT_1_1 +265 0x5333 //RX_FDDRC_SLANT_1_2 +266 0x5333 //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +286 0x0060 //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 +#VOL 5 +163 0x1000 //RX_TDDRC_ALPHA_UP_1 +164 0x1000 //RX_TDDRC_ALPHA_UP_2 +165 0x1000 //RX_TDDRC_ALPHA_UP_3 +166 0x1000 //RX_TDDRC_ALPHA_UP_4 +184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +190 0x7000 //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +269 0x0000 //RX_TDDRC_THRD_0 +270 0x0000 //RX_TDDRC_THRD_1 +271 0x1800 //RX_TDDRC_THRD_2 +272 0x1800 //RX_TDDRC_THRD_3 +273 0x3000 //RX_TDDRC_SLANT_0 +274 0x6E00 //RX_TDDRC_SLANT_1 +275 0x1000 //RX_TDDRC_ALPHA_UP_0 +276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x199A //RX_TDDRC_HMNC_GAIN +279 0x0001 //RX_TDDRC_SMT_FLAG +280 0x0CCD //RX_TDDRC_SMT_W +281 0x0275 //RX_TDDRC_DRC_GAIN +195 0x0020 //RX_FDEQ_SUBNUM +196 0x4848 //RX_FDEQ_GAIN_0 +197 0x4850 //RX_FDEQ_GAIN_1 +198 0x6478 //RX_FDEQ_GAIN_2 +199 0x8689 //RX_FDEQ_GAIN_3 +200 0x908F //RX_FDEQ_GAIN_4 +201 0x9495 //RX_FDEQ_GAIN_5 +202 0x989D //RX_FDEQ_GAIN_6 +203 0x9DA6 //RX_FDEQ_GAIN_7 +204 0xA895 //RX_FDEQ_GAIN_8 +205 0x8A8A //RX_FDEQ_GAIN_9 +206 0x8E78 //RX_FDEQ_GAIN_10 +207 0x7070 //RX_FDEQ_GAIN_11 +208 0x7680 //RX_FDEQ_GAIN_12 +209 0x787C //RX_FDEQ_GAIN_13 +210 0x8890 //RX_FDEQ_GAIN_14 +211 0x9CAC //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0202 //RX_FDEQ_BIN_0 +221 0x0202 //RX_FDEQ_BIN_1 +222 0x0302 //RX_FDEQ_BIN_2 +223 0x0304 //RX_FDEQ_BIN_3 +224 0x0405 //RX_FDEQ_BIN_4 +225 0x0506 //RX_FDEQ_BIN_5 +226 0x0708 //RX_FDEQ_BIN_6 +227 0x090A //RX_FDEQ_BIN_7 +228 0x0B0C //RX_FDEQ_BIN_8 +229 0x0D0E //RX_FDEQ_BIN_9 +230 0x1013 //RX_FDEQ_BIN_10 +231 0x1719 //RX_FDEQ_BIN_11 +232 0x1B1E //RX_FDEQ_BIN_12 +233 0x1E1E //RX_FDEQ_BIN_13 +234 0x1E28 //RX_FDEQ_BIN_14 +235 0x282C //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x4000 //RX_FDEQ_RESRV_0 +245 0x0320 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0030 //RX_FDDRC_BAND_MARGIN_1 +248 0x0050 //RX_FDDRC_BAND_MARGIN_2 +249 0x0080 //RX_FDDRC_BAND_MARGIN_3 +250 0x0007 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x5000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x6400 //RX_FDDRC_THRD_3_2 +258 0x6400 //RX_FDDRC_THRD_3_3 +259 0x2000 //RX_FDDRC_SLANT_0_0 +260 0x2000 //RX_FDDRC_SLANT_0_1 +261 0x2000 //RX_FDDRC_SLANT_0_2 +262 0x2000 //RX_FDDRC_SLANT_0_3 +263 0x5333 //RX_FDDRC_SLANT_1_0 +264 0x5333 //RX_FDDRC_SLANT_1_1 +265 0x5333 //RX_FDDRC_SLANT_1_2 +266 0x5333 //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +286 0x0099 //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 +#VOL 6 +163 0x1000 //RX_TDDRC_ALPHA_UP_1 +164 0x1000 //RX_TDDRC_ALPHA_UP_2 +165 0x1000 //RX_TDDRC_ALPHA_UP_3 +166 0x1000 //RX_TDDRC_ALPHA_UP_4 +184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +190 0x7000 //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +269 0x0000 //RX_TDDRC_THRD_0 +270 0x0000 //RX_TDDRC_THRD_1 +271 0x1800 //RX_TDDRC_THRD_2 +272 0x1800 //RX_TDDRC_THRD_3 +273 0x3000 //RX_TDDRC_SLANT_0 +274 0x6E00 //RX_TDDRC_SLANT_1 +275 0x1000 //RX_TDDRC_ALPHA_UP_0 +276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x199A //RX_TDDRC_HMNC_GAIN +279 0x0001 //RX_TDDRC_SMT_FLAG +280 0x0CCD //RX_TDDRC_SMT_W +281 0x0275 //RX_TDDRC_DRC_GAIN +195 0x0020 //RX_FDEQ_SUBNUM +196 0x4848 //RX_FDEQ_GAIN_0 +197 0x4850 //RX_FDEQ_GAIN_1 +198 0x6478 //RX_FDEQ_GAIN_2 +199 0x8689 //RX_FDEQ_GAIN_3 +200 0x908F //RX_FDEQ_GAIN_4 +201 0x9495 //RX_FDEQ_GAIN_5 +202 0x989D //RX_FDEQ_GAIN_6 +203 0x9DA6 //RX_FDEQ_GAIN_7 +204 0xA895 //RX_FDEQ_GAIN_8 +205 0x8A8A //RX_FDEQ_GAIN_9 +206 0x8E78 //RX_FDEQ_GAIN_10 +207 0x7070 //RX_FDEQ_GAIN_11 +208 0x7680 //RX_FDEQ_GAIN_12 +209 0x787C //RX_FDEQ_GAIN_13 +210 0x8890 //RX_FDEQ_GAIN_14 +211 0x9CAC //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0202 //RX_FDEQ_BIN_0 +221 0x0202 //RX_FDEQ_BIN_1 +222 0x0302 //RX_FDEQ_BIN_2 +223 0x0304 //RX_FDEQ_BIN_3 +224 0x0405 //RX_FDEQ_BIN_4 +225 0x0506 //RX_FDEQ_BIN_5 +226 0x0708 //RX_FDEQ_BIN_6 +227 0x090A //RX_FDEQ_BIN_7 +228 0x0B0C //RX_FDEQ_BIN_8 +229 0x0D0E //RX_FDEQ_BIN_9 +230 0x1013 //RX_FDEQ_BIN_10 +231 0x1719 //RX_FDEQ_BIN_11 +232 0x1B1E //RX_FDEQ_BIN_12 +233 0x1E1E //RX_FDEQ_BIN_13 +234 0x1E28 //RX_FDEQ_BIN_14 +235 0x282C //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x4000 //RX_FDEQ_RESRV_0 +245 0x0320 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0030 //RX_FDDRC_BAND_MARGIN_1 +248 0x0050 //RX_FDDRC_BAND_MARGIN_2 +249 0x0080 //RX_FDDRC_BAND_MARGIN_3 +250 0x0007 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x5000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x6400 //RX_FDDRC_THRD_3_2 +258 0x6400 //RX_FDDRC_THRD_3_3 +259 0x2000 //RX_FDDRC_SLANT_0_0 +260 0x2000 //RX_FDDRC_SLANT_0_1 +261 0x2000 //RX_FDDRC_SLANT_0_2 +262 0x2000 //RX_FDDRC_SLANT_0_3 +263 0x5333 //RX_FDDRC_SLANT_1_0 +264 0x5333 //RX_FDDRC_SLANT_1_1 +265 0x5333 //RX_FDDRC_SLANT_1_2 +266 0x5333 //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +286 0x0100 //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 #CASE_NAME HANDSET-HANDSET-CUSTOM1-FB -#PARAM_TYPE TX+RX -#TOTAL_CUSTOM_STEP 7 +#PARAM_MODE FULL +#PARAM_TYPE TX+2RX +#TOTAL_CUSTOM_STEP 7+7 #TX 0 0x0000 //TX_OPERATION_MODE_0 1 0x0000 //TX_OPERATION_MODE_1 @@ -3764,12 +5599,12 @@ 248 0xF800 //TX_THR_SN_EST_6 249 0xF700 //TX_THR_SN_EST_7 250 0x0000 //TX_DELTA_THR_SN_EST_0 -251 0x0100 //TX_DELTA_THR_SN_EST_1 +251 0x0200 //TX_DELTA_THR_SN_EST_1 252 0x0200 //TX_DELTA_THR_SN_EST_2 253 0x0200 //TX_DELTA_THR_SN_EST_3 -254 0x0200 //TX_DELTA_THR_SN_EST_4 -255 0x0100 //TX_DELTA_THR_SN_EST_5 -256 0x0200 //TX_DELTA_THR_SN_EST_6 +254 0x0100 //TX_DELTA_THR_SN_EST_4 +255 0x0200 //TX_DELTA_THR_SN_EST_5 +256 0x0100 //TX_DELTA_THR_SN_EST_6 257 0x0200 //TX_DELTA_THR_SN_EST_7 258 0x4000 //TX_LAMBDA_NN_EST_0 259 0x4000 //TX_LAMBDA_NN_EST_1 @@ -3797,16 +5632,16 @@ 281 0x0014 //TX_NS_LVL_CTRL_0 282 0x0016 //TX_NS_LVL_CTRL_1 283 0x0016 //TX_NS_LVL_CTRL_2 -284 0x0016 //TX_NS_LVL_CTRL_3 -285 0x0018 //TX_NS_LVL_CTRL_4 -286 0x0016 //TX_NS_LVL_CTRL_5 -287 0x0012 //TX_NS_LVL_CTRL_6 +284 0x0018 //TX_NS_LVL_CTRL_3 +285 0x0016 //TX_NS_LVL_CTRL_4 +286 0x0012 //TX_NS_LVL_CTRL_5 +287 0x0016 //TX_NS_LVL_CTRL_6 288 0x0017 //TX_NS_LVL_CTRL_7 289 0x000E //TX_MIN_GAIN_S_0 -290 0x0012 //TX_MIN_GAIN_S_1 -291 0x0007 //TX_MIN_GAIN_S_2 -292 0x0012 //TX_MIN_GAIN_S_3 -293 0x0010 //TX_MIN_GAIN_S_4 +290 0x0007 //TX_MIN_GAIN_S_1 +291 0x0012 //TX_MIN_GAIN_S_2 +292 0x0010 //TX_MIN_GAIN_S_3 +293 0x0012 //TX_MIN_GAIN_S_4 294 0x0012 //TX_MIN_GAIN_S_5 295 0x0012 //TX_MIN_GAIN_S_6 296 0x0012 //TX_MIN_GAIN_S_7 @@ -3828,29 +5663,29 @@ 312 0x7FFF //TX_A_POST_FILT_0 313 0x2000 //TX_A_POST_FILT_1 314 0x4000 //TX_A_POST_FILT_S_0 -315 0x5000 //TX_A_POST_FILT_S_1 +315 0x4000 //TX_A_POST_FILT_S_1 316 0x4000 //TX_A_POST_FILT_S_2 317 0x4000 //TX_A_POST_FILT_S_3 318 0x4000 //TX_A_POST_FILT_S_4 319 0x4000 //TX_A_POST_FILT_S_5 -320 0x4000 //TX_A_POST_FILT_S_6 +320 0x5000 //TX_A_POST_FILT_S_6 321 0x7000 //TX_A_POST_FILT_S_7 322 0x1000 //TX_B_POST_FILT_0 323 0x2000 //TX_B_POST_FILT_1 -324 0x3000 //TX_B_POST_FILT_2 +324 0x2000 //TX_B_POST_FILT_2 325 0x2000 //TX_B_POST_FILT_3 -326 0x5000 //TX_B_POST_FILT_4 +326 0x2000 //TX_B_POST_FILT_4 327 0x2000 //TX_B_POST_FILT_5 -328 0x6000 //TX_B_POST_FILT_6 +328 0x3000 //TX_B_POST_FILT_6 329 0x3000 //TX_B_POST_FILT_7 330 0x1000 //TX_B_LESSCUT_RTO_S_0 -331 0x6000 //TX_B_LESSCUT_RTO_S_1 -332 0x6000 //TX_B_LESSCUT_RTO_S_2 -333 0x6000 //TX_B_LESSCUT_RTO_S_3 -334 0x6000 //TX_B_LESSCUT_RTO_S_4 -335 0x6000 //TX_B_LESSCUT_RTO_S_5 -336 0x7FFF //TX_B_LESSCUT_RTO_S_6 -337 0x7FFF //TX_B_LESSCUT_RTO_S_7 +331 0x1000 //TX_B_LESSCUT_RTO_S_1 +332 0x1000 //TX_B_LESSCUT_RTO_S_2 +333 0x1000 //TX_B_LESSCUT_RTO_S_3 +334 0x1000 //TX_B_LESSCUT_RTO_S_4 +335 0x1000 //TX_B_LESSCUT_RTO_S_5 +336 0x1000 //TX_B_LESSCUT_RTO_S_6 +337 0x1000 //TX_B_LESSCUT_RTO_S_7 338 0x7E14 //TX_LAMBDA_PFILT 339 0x7C29 //TX_LAMBDA_PFILT_S_0 340 0x7C29 //TX_LAMBDA_PFILT_S_1 @@ -3893,10 +5728,10 @@ 377 0x4E20 //TX_NOISE_TH_5_4 378 0x39DF //TX_NOISE_TH_6 379 0x0014 //TX_MINENOISE_TH -380 0x4000 //TX_MINENOISE_MIC0_TH_MTS -381 0xFFEE //TX_MINENOISE_MIC0_TH_EXP -382 0x6000 //TX_MINENOISE_MIC0_S_TH_MTS -383 0xFFF3 //TX_MINENOISE_MIC0_S_TH_EXP +380 0xD508 //TX_MORENS_TFMASK_TH +381 0x0001 //TX_DRC_QUIET_FLOOR +382 0x6D60 //TX_RATIODTL_CUT_TH +383 0x1482 //TX_DT_CUT_K1 384 0x00A5 //TX_OUT_ENER_S_TH_CLEAN 385 0x00A5 //TX_OUT_ENER_S_TH_LESSCLEAN 386 0x00A5 //TX_OUT_ENER_S_TH_NOISY @@ -3904,15 +5739,15 @@ 388 0x0200 //TX_OUT_ENER_TH_SPEECH 389 0x2000 //TX_SN_NPB_GAIN 390 0x0000 //TX_NN_NPB_GAIN -391 0x0000 //TX_CSX_ALPHA_0 -392 0x0000 //TX_CSX_ALPHA_1 -393 0x0000 //TX_CSX_ALPHA_2 -394 0x0000 //TX_CSX_ALPHA_3 -395 0x0800 //TX_MU_ARSP_EST -396 0x00C8 //TX_P_OUTBEAM_MIN_TH +391 0x3000 //TX_POST_MASK_SUP_HSNE +392 0x07D0 //TX_TAIL_DET_TH +393 0x4000 //TX_B_LESSCUT_RTO_WTA +394 0x0000 //TX_MEL_G_R +395 0x0080 //TX_SUPHIGH_TH +396 0x0000 //TX_MASK_G_R 397 0x0002 //TX_EXTRA_NS_L -398 0x0800 //TX_EXTRA_NS_A -399 0x0005 //TX_VR_NOISE_FLOOR_TH +398 0x1800 //TX_C_POST_FLT_MASK +399 0x7FFF //TX_A_POST_FLT_WNS 400 0x0148 //TX_MIN_G_LOW300HZ 401 0x0004 //TX_MAXLEVEL_CNG 402 0x00B4 //TX_STN_NOISE_TH @@ -4027,16 +5862,16 @@ 511 0x6666 //TX_MIC_TO_BFGAIN 512 0x0000 //TX_MICTOBFGAIN0 513 0x0000 //TX_FASTMUE_TH -514 0x0000 //TX_DERVB_LEN_0 -515 0x0000 //TX_DERVB_LEN_1 -516 0x0000 //TX_RHO_DERVB -517 0x0000 //TX_MIC_INDX_DERVB -518 0x0000 //TX_MU_DERVB -519 0x0000 //TX_DR_RESRV_0 -520 0x0000 //TX_DR_RESRV_1 -521 0x0000 //TX_DR_RESRV_2 -522 0x0000 //TX_DR_RESRV_3 -523 0x0000 //TX_DR_RESRV_4 +514 0x2CCC //TX_DEREVERB_LF_MU +515 0x3200 //TX_DEREVERB_HF_MU +516 0x0007 //TX_DEREVERB_DELAY +517 0x0004 //TX_DEREVERB_COEF_LEN +518 0x0003 //TX_DEREVERB_DNR +519 0x0000 //TX_DEREVERB_ALPHA +520 0x0000 //TX_DEREVERB_BETA +521 0x7FFF //TX_GSC_RTOL_TH +522 0x7FFF //TX_GSC_RTOH_TH +523 0x7E2C //TX_WIDE2_MEANHTH 524 0x0000 //TX_DR_RESRV_5 525 0x0000 //TX_DR_RESRV_6 526 0x0000 //TX_DR_RESRV_7 @@ -4410,6 +6245,71 @@ 894 0xC000 //TX_FASTNS_SSA_THHFL 895 0xCCCC //TX_FASTNS_SSA_THLFH 896 0xD999 //TX_FASTNS_SSA_THHFH +897 0x2339 //TX_SENDFUNC_REG_MICMUTE +898 0x0021 //TX_SENDFUNC_REG_MICMUTE1 +899 0x02BC //TX_MICMUTE_RATIO_THR +900 0x0140 //TX_MICMUTE_AMP_THR +901 0x0004 //TX_MICMUTE_HPF_IND +902 0x00C0 //TX_MICMUTE_LOG_EYR_TH +903 0x0008 //TX_MICMUTE_CVG_TIME +904 0x0008 //TX_MICMUTE_RELEASE_TIME +905 0x01FE //TX_MIC_VOLUME_MIC0MUTE +906 0x0020 //TX_MICMUTE_EPD_OFFSET_0 +907 0x001E //TX_MICMUTE_FRQ_AEC_L +908 0x7999 //TX_MICMUTE_EAD_THR +909 0x7FFF //TX_MICMUTE_LAMBDA_CB_NLE +910 0x7FFF //TX_MICMUTE_LAMBDA_RE_EST +911 0x4000 //TX_DTD_THR1_MICMUTE_0 +912 0x7000 //TX_DTD_THR1_MICMUTE_1 +913 0x7FFF //TX_DTD_THR1_MICMUTE_2 +914 0x7FFF //TX_DTD_THR1_MICMUTE_3 +915 0x6CCC //TX_DTD_THR2_MICMUTE_0 +916 0x0400 //TX_MICMUTE_MIN_EQ_RE_EST_0 +917 0x0400 //TX_MICMUTE_MIN_EQ_RE_EST_1 +918 0x1000 //TX_MICMUTE_MIN_EQ_RE_EST_2 +919 0x7FFF //TX_MICMUTE_MIN_EQ_RE_EST_3 +920 0x7FFF //TX_MICMUTE_MIN_EQ_RE_EST_4 +921 0x4000 //TX_MICMUTE_C_POST_FLT +922 0x03E8 //TX_MICMUTE_DT_CUT_K +923 0x0001 //TX_MICMUTE_DT_CUT_THR +924 0x03E8 //TX_MICMUTE_DT_CUT_K2 +925 0x0001 //TX_MICMUTE_DT_CUT_THR2 +926 0x0064 //TX_MICMUTE_DT2_HOLD_N +927 0x1000 //TX_MICMUTE_RATIODTH_THCUT +928 0x1000 //TX_MICMUTE_B_POST_FLT_ECHOL +929 0x7FFF //TX_MICMUTE_B_POST_FLT_ECHOH +930 0x0400 //TX_MICMUTE_C_POST_FLT_MASK +931 0x7999 //TX_MICMUTE_RATIODTL_CUT_TH +932 0x0258 //TX_MICMUTE_DT_CUT_K1 +933 0x0800 //TX_MICMUTE_N2_SN_EST +934 0xFC00 //TX_MICMUTE_THR_SN_EST_0 +935 0x001C //TX_MICMUTE_MIN_G_CTRL_0 +936 0x6000 //TX_MICMUTE_A_POST_FILT_S_0 +937 0x7000 //TX_MICMUTE_B_POST_FILT_0 +938 0x2710 //TX_MIC1RUB_AMP_THR +939 0x0010 //TX_MIC1MUTE_RATIO_THR +940 0x0450 //TX_MIC1MUTE_AMP_THR +941 0x0008 //TX_MIC1MUTE_CVG_TIME +942 0x0008 //TX_MIC1MUTE_RELEASE_TIME +943 0x0000 //TX_AMS_RESRV_01 +944 0x0000 //TX_AMS_RESRV_02 +945 0x0000 //TX_AMS_RESRV_03 +946 0x0000 //TX_AMS_RESRV_04 +947 0x0000 //TX_AMS_RESRV_05 +948 0x0000 //TX_AMS_RESRV_06 +949 0x0000 //TX_AMS_RESRV_07 +950 0x0000 //TX_AMS_RESRV_08 +951 0x0000 //TX_AMS_RESRV_09 +952 0x0000 //TX_AMS_RESRV_10 +953 0x0000 //TX_AMS_RESRV_11 +954 0x0000 //TX_AMS_RESRV_12 +955 0x0000 //TX_AMS_RESRV_13 +956 0x0000 //TX_AMS_RESRV_14 +957 0x0000 //TX_AMS_RESRV_15 +958 0x0000 //TX_AMS_RESRV_16 +959 0x0000 //TX_AMS_RESRV_17 +960 0x0000 //TX_AMS_RESRV_18 +961 0x0000 //TX_AMS_RESRV_19 #RX 0 0x003C //RX_RECVFUNC_MODE_0 1 0x0000 //RX_RECVFUNC_MODE_1 @@ -5261,14 +7161,866 @@ 110 0x0000 //RX_FDDRC_RESRV_0 129 0x0100 //RX_SPK_VOL 130 0x0000 //RX_VOL_RESRV_0 +#RX 2 +157 0x003C //RX_RECVFUNC_MODE_0 +158 0x0000 //RX_RECVFUNC_MODE_1 +159 0x0004 //RX_SAMPLINGFREQ_SIG +160 0x0004 //RX_SAMPLINGFREQ_PROC +161 0x000A //RX_FRAME_SZ +162 0x0000 //RX_DELAY_OPT +163 0x1000 //RX_TDDRC_ALPHA_UP_1 +164 0x1000 //RX_TDDRC_ALPHA_UP_2 +165 0x1000 //RX_TDDRC_ALPHA_UP_3 +166 0x1000 //RX_TDDRC_ALPHA_UP_4 +167 0x064E //RX_PGA +168 0x7FFF //RX_A_HP +169 0x4000 //RX_B_PE +170 0x5800 //RX_THR_PITCH_DET_0 +171 0x5000 //RX_THR_PITCH_DET_1 +172 0x4000 //RX_THR_PITCH_DET_2 +173 0x0008 //RX_PITCH_BFR_LEN +174 0x0003 //RX_SBD_PITCH_DET +175 0x0100 //RX_PP_RESRV_0 +176 0x0020 //RX_PP_RESRV_1 +177 0x0600 //RX_N_SN_EST +178 0x000C //RX_N2_SN_EST +179 0x000F //RX_NS_LVL_CTRL +180 0xF800 //RX_THR_SN_EST +181 0x7E00 //RX_LAMBDA_PFILT +182 0x000A //RX_FENS_RESRV_0 +183 0x0190 //RX_FENS_RESRV_1 +184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +187 0x0002 //RX_EXTRA_NS_L +188 0x0800 //RX_EXTRA_NS_A +189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +190 0x7000 //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +192 0x199A //RX_A_POST_FLT +193 0x0000 //RX_LMT_THRD +194 0x4000 //RX_LMT_ALPHA +195 0x0020 //RX_FDEQ_SUBNUM +196 0x4848 //RX_FDEQ_GAIN_0 +197 0x4850 //RX_FDEQ_GAIN_1 +198 0x6478 //RX_FDEQ_GAIN_2 +199 0x8689 //RX_FDEQ_GAIN_3 +200 0x908F //RX_FDEQ_GAIN_4 +201 0x9495 //RX_FDEQ_GAIN_5 +202 0x989D //RX_FDEQ_GAIN_6 +203 0x9DA6 //RX_FDEQ_GAIN_7 +204 0xA895 //RX_FDEQ_GAIN_8 +205 0x8A8A //RX_FDEQ_GAIN_9 +206 0x8E78 //RX_FDEQ_GAIN_10 +207 0x7070 //RX_FDEQ_GAIN_11 +208 0x7680 //RX_FDEQ_GAIN_12 +209 0x787C //RX_FDEQ_GAIN_13 +210 0x8890 //RX_FDEQ_GAIN_14 +211 0x9CAC //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0202 //RX_FDEQ_BIN_0 +221 0x0202 //RX_FDEQ_BIN_1 +222 0x0302 //RX_FDEQ_BIN_2 +223 0x0304 //RX_FDEQ_BIN_3 +224 0x0405 //RX_FDEQ_BIN_4 +225 0x0506 //RX_FDEQ_BIN_5 +226 0x0708 //RX_FDEQ_BIN_6 +227 0x090A //RX_FDEQ_BIN_7 +228 0x0B0C //RX_FDEQ_BIN_8 +229 0x0D0E //RX_FDEQ_BIN_9 +230 0x1013 //RX_FDEQ_BIN_10 +231 0x1719 //RX_FDEQ_BIN_11 +232 0x1B1E //RX_FDEQ_BIN_12 +233 0x1E1E //RX_FDEQ_BIN_13 +234 0x1E28 //RX_FDEQ_BIN_14 +235 0x282C //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x4000 //RX_FDEQ_RESRV_0 +245 0x0320 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0030 //RX_FDDRC_BAND_MARGIN_1 +248 0x0050 //RX_FDDRC_BAND_MARGIN_2 +249 0x0080 //RX_FDDRC_BAND_MARGIN_3 +250 0x0007 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x5000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x6400 //RX_FDDRC_THRD_3_2 +258 0x6400 //RX_FDDRC_THRD_3_3 +259 0x2000 //RX_FDDRC_SLANT_0_0 +260 0x2000 //RX_FDDRC_SLANT_0_1 +261 0x2000 //RX_FDDRC_SLANT_0_2 +262 0x2000 //RX_FDDRC_SLANT_0_3 +263 0x5333 //RX_FDDRC_SLANT_1_0 +264 0x5333 //RX_FDDRC_SLANT_1_1 +265 0x5333 //RX_FDDRC_SLANT_1_2 +266 0x5333 //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +268 0x0002 //RX_FILTINDX +269 0x0000 //RX_TDDRC_THRD_0 +270 0x0000 //RX_TDDRC_THRD_1 +271 0x1800 //RX_TDDRC_THRD_2 +272 0x1800 //RX_TDDRC_THRD_3 +273 0x3000 //RX_TDDRC_SLANT_0 +274 0x6E00 //RX_TDDRC_SLANT_1 +275 0x1000 //RX_TDDRC_ALPHA_UP_0 +276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x199A //RX_TDDRC_HMNC_GAIN +279 0x0001 //RX_TDDRC_SMT_FLAG +280 0x0CCD //RX_TDDRC_SMT_W +281 0x0275 //RX_TDDRC_DRC_GAIN +282 0x7C00 //RX_LAMBDA_PKA_FP +283 0x2000 //RX_TPKA_FP +284 0x2000 //RX_MIN_G_FP +285 0x0080 //RX_MAX_G_FP +286 0x000D //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 +288 0x0000 //RX_MAXLEVEL_CNG +289 0x3000 //RX_BWE_UV_TH +290 0x3000 //RX_BWE_UV_TH2 +291 0x1800 //RX_BWE_UV_TH3 +292 0x1000 //RX_BWE_V_TH +293 0x04CD //RX_BWE_GAIN1_V_TH1 +294 0x0F33 //RX_BWE_GAIN1_V_TH2 +295 0x7333 //RX_BWE_UV_EQ +296 0x199A //RX_BWE_V_EQ +297 0x7333 //RX_BWE_TONE_TH +298 0x0004 //RX_BWE_UV_HOLD_T +299 0x6CCD //RX_BWE_GAIN2_ALPHA +300 0x799A //RX_BWE_GAIN3_ALPHA +301 0x001E //RX_BWE_CUTOFF +302 0x3000 //RX_BWE_GAINFILL +303 0x3200 //RX_BWE_MAXTH_TONE +304 0x2000 //RX_BWE_EQ_0 +305 0x2000 //RX_BWE_EQ_1 +306 0x2000 //RX_BWE_EQ_2 +307 0x2000 //RX_BWE_EQ_3 +308 0x2000 //RX_BWE_EQ_4 +309 0x2000 //RX_BWE_EQ_5 +310 0x2000 //RX_BWE_EQ_6 +311 0x0000 //RX_BWE_RESRV_0 +312 0x0000 //RX_BWE_RESRV_1 +313 0x0000 //RX_BWE_RESRV_2 +#VOL 0 +163 0x1000 //RX_TDDRC_ALPHA_UP_1 +164 0x1000 //RX_TDDRC_ALPHA_UP_2 +165 0x1000 //RX_TDDRC_ALPHA_UP_3 +166 0x1000 //RX_TDDRC_ALPHA_UP_4 +184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +190 0x7000 //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +269 0x0000 //RX_TDDRC_THRD_0 +270 0x0000 //RX_TDDRC_THRD_1 +271 0x1800 //RX_TDDRC_THRD_2 +272 0x1800 //RX_TDDRC_THRD_3 +273 0x3000 //RX_TDDRC_SLANT_0 +274 0x6E00 //RX_TDDRC_SLANT_1 +275 0x1000 //RX_TDDRC_ALPHA_UP_0 +276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x199A //RX_TDDRC_HMNC_GAIN +279 0x0001 //RX_TDDRC_SMT_FLAG +280 0x0CCD //RX_TDDRC_SMT_W +281 0x0275 //RX_TDDRC_DRC_GAIN +195 0x0020 //RX_FDEQ_SUBNUM +196 0x4848 //RX_FDEQ_GAIN_0 +197 0x4850 //RX_FDEQ_GAIN_1 +198 0x6478 //RX_FDEQ_GAIN_2 +199 0x8689 //RX_FDEQ_GAIN_3 +200 0x908F //RX_FDEQ_GAIN_4 +201 0x9495 //RX_FDEQ_GAIN_5 +202 0x989D //RX_FDEQ_GAIN_6 +203 0x9DA6 //RX_FDEQ_GAIN_7 +204 0xA895 //RX_FDEQ_GAIN_8 +205 0x8A8A //RX_FDEQ_GAIN_9 +206 0x8E78 //RX_FDEQ_GAIN_10 +207 0x7070 //RX_FDEQ_GAIN_11 +208 0x7680 //RX_FDEQ_GAIN_12 +209 0x787C //RX_FDEQ_GAIN_13 +210 0x8890 //RX_FDEQ_GAIN_14 +211 0x9CAC //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0202 //RX_FDEQ_BIN_0 +221 0x0202 //RX_FDEQ_BIN_1 +222 0x0302 //RX_FDEQ_BIN_2 +223 0x0304 //RX_FDEQ_BIN_3 +224 0x0405 //RX_FDEQ_BIN_4 +225 0x0506 //RX_FDEQ_BIN_5 +226 0x0708 //RX_FDEQ_BIN_6 +227 0x090A //RX_FDEQ_BIN_7 +228 0x0B0C //RX_FDEQ_BIN_8 +229 0x0D0E //RX_FDEQ_BIN_9 +230 0x1013 //RX_FDEQ_BIN_10 +231 0x1719 //RX_FDEQ_BIN_11 +232 0x1B1E //RX_FDEQ_BIN_12 +233 0x1E1E //RX_FDEQ_BIN_13 +234 0x1E28 //RX_FDEQ_BIN_14 +235 0x282C //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x4000 //RX_FDEQ_RESRV_0 +245 0x0320 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0030 //RX_FDDRC_BAND_MARGIN_1 +248 0x0050 //RX_FDDRC_BAND_MARGIN_2 +249 0x0080 //RX_FDDRC_BAND_MARGIN_3 +250 0x0007 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x5000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x6400 //RX_FDDRC_THRD_3_2 +258 0x6400 //RX_FDDRC_THRD_3_3 +259 0x2000 //RX_FDDRC_SLANT_0_0 +260 0x2000 //RX_FDDRC_SLANT_0_1 +261 0x2000 //RX_FDDRC_SLANT_0_2 +262 0x2000 //RX_FDDRC_SLANT_0_3 +263 0x5333 //RX_FDDRC_SLANT_1_0 +264 0x5333 //RX_FDDRC_SLANT_1_1 +265 0x5333 //RX_FDDRC_SLANT_1_2 +266 0x5333 //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +286 0x000D //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 +#VOL 1 +163 0x1000 //RX_TDDRC_ALPHA_UP_1 +164 0x1000 //RX_TDDRC_ALPHA_UP_2 +165 0x1000 //RX_TDDRC_ALPHA_UP_3 +166 0x1000 //RX_TDDRC_ALPHA_UP_4 +184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +190 0x7000 //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +269 0x0000 //RX_TDDRC_THRD_0 +270 0x0000 //RX_TDDRC_THRD_1 +271 0x1800 //RX_TDDRC_THRD_2 +272 0x1800 //RX_TDDRC_THRD_3 +273 0x3000 //RX_TDDRC_SLANT_0 +274 0x6E00 //RX_TDDRC_SLANT_1 +275 0x1000 //RX_TDDRC_ALPHA_UP_0 +276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x199A //RX_TDDRC_HMNC_GAIN +279 0x0001 //RX_TDDRC_SMT_FLAG +280 0x0CCD //RX_TDDRC_SMT_W +281 0x0275 //RX_TDDRC_DRC_GAIN +195 0x0020 //RX_FDEQ_SUBNUM +196 0x4848 //RX_FDEQ_GAIN_0 +197 0x4850 //RX_FDEQ_GAIN_1 +198 0x6478 //RX_FDEQ_GAIN_2 +199 0x8689 //RX_FDEQ_GAIN_3 +200 0x908F //RX_FDEQ_GAIN_4 +201 0x9495 //RX_FDEQ_GAIN_5 +202 0x989D //RX_FDEQ_GAIN_6 +203 0x9DA6 //RX_FDEQ_GAIN_7 +204 0xA895 //RX_FDEQ_GAIN_8 +205 0x8A8A //RX_FDEQ_GAIN_9 +206 0x8E78 //RX_FDEQ_GAIN_10 +207 0x7070 //RX_FDEQ_GAIN_11 +208 0x7680 //RX_FDEQ_GAIN_12 +209 0x787C //RX_FDEQ_GAIN_13 +210 0x8890 //RX_FDEQ_GAIN_14 +211 0x9CAC //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0202 //RX_FDEQ_BIN_0 +221 0x0202 //RX_FDEQ_BIN_1 +222 0x0302 //RX_FDEQ_BIN_2 +223 0x0304 //RX_FDEQ_BIN_3 +224 0x0405 //RX_FDEQ_BIN_4 +225 0x0506 //RX_FDEQ_BIN_5 +226 0x0708 //RX_FDEQ_BIN_6 +227 0x090A //RX_FDEQ_BIN_7 +228 0x0B0C //RX_FDEQ_BIN_8 +229 0x0D0E //RX_FDEQ_BIN_9 +230 0x1013 //RX_FDEQ_BIN_10 +231 0x1719 //RX_FDEQ_BIN_11 +232 0x1B1E //RX_FDEQ_BIN_12 +233 0x1E1E //RX_FDEQ_BIN_13 +234 0x1E28 //RX_FDEQ_BIN_14 +235 0x282C //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x4000 //RX_FDEQ_RESRV_0 +245 0x0320 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0030 //RX_FDDRC_BAND_MARGIN_1 +248 0x0050 //RX_FDDRC_BAND_MARGIN_2 +249 0x0080 //RX_FDDRC_BAND_MARGIN_3 +250 0x0007 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x5000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x6400 //RX_FDDRC_THRD_3_2 +258 0x6400 //RX_FDDRC_THRD_3_3 +259 0x2000 //RX_FDDRC_SLANT_0_0 +260 0x2000 //RX_FDDRC_SLANT_0_1 +261 0x2000 //RX_FDDRC_SLANT_0_2 +262 0x2000 //RX_FDDRC_SLANT_0_3 +263 0x5333 //RX_FDDRC_SLANT_1_0 +264 0x5333 //RX_FDDRC_SLANT_1_1 +265 0x5333 //RX_FDDRC_SLANT_1_2 +266 0x5333 //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +286 0x0016 //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 +#VOL 2 +163 0x1000 //RX_TDDRC_ALPHA_UP_1 +164 0x1000 //RX_TDDRC_ALPHA_UP_2 +165 0x1000 //RX_TDDRC_ALPHA_UP_3 +166 0x1000 //RX_TDDRC_ALPHA_UP_4 +184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +190 0x7000 //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +269 0x0000 //RX_TDDRC_THRD_0 +270 0x0000 //RX_TDDRC_THRD_1 +271 0x1800 //RX_TDDRC_THRD_2 +272 0x1800 //RX_TDDRC_THRD_3 +273 0x3000 //RX_TDDRC_SLANT_0 +274 0x6E00 //RX_TDDRC_SLANT_1 +275 0x1000 //RX_TDDRC_ALPHA_UP_0 +276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x199A //RX_TDDRC_HMNC_GAIN +279 0x0001 //RX_TDDRC_SMT_FLAG +280 0x0CCD //RX_TDDRC_SMT_W +281 0x0275 //RX_TDDRC_DRC_GAIN +195 0x0020 //RX_FDEQ_SUBNUM +196 0x4848 //RX_FDEQ_GAIN_0 +197 0x4850 //RX_FDEQ_GAIN_1 +198 0x6478 //RX_FDEQ_GAIN_2 +199 0x8689 //RX_FDEQ_GAIN_3 +200 0x908F //RX_FDEQ_GAIN_4 +201 0x9495 //RX_FDEQ_GAIN_5 +202 0x989D //RX_FDEQ_GAIN_6 +203 0x9DA6 //RX_FDEQ_GAIN_7 +204 0xA895 //RX_FDEQ_GAIN_8 +205 0x8A8A //RX_FDEQ_GAIN_9 +206 0x8E78 //RX_FDEQ_GAIN_10 +207 0x7070 //RX_FDEQ_GAIN_11 +208 0x7680 //RX_FDEQ_GAIN_12 +209 0x787C //RX_FDEQ_GAIN_13 +210 0x8890 //RX_FDEQ_GAIN_14 +211 0x9CAC //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0202 //RX_FDEQ_BIN_0 +221 0x0202 //RX_FDEQ_BIN_1 +222 0x0302 //RX_FDEQ_BIN_2 +223 0x0304 //RX_FDEQ_BIN_3 +224 0x0405 //RX_FDEQ_BIN_4 +225 0x0506 //RX_FDEQ_BIN_5 +226 0x0708 //RX_FDEQ_BIN_6 +227 0x090A //RX_FDEQ_BIN_7 +228 0x0B0C //RX_FDEQ_BIN_8 +229 0x0D0E //RX_FDEQ_BIN_9 +230 0x1013 //RX_FDEQ_BIN_10 +231 0x1719 //RX_FDEQ_BIN_11 +232 0x1B1E //RX_FDEQ_BIN_12 +233 0x1E1E //RX_FDEQ_BIN_13 +234 0x1E28 //RX_FDEQ_BIN_14 +235 0x282C //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x4000 //RX_FDEQ_RESRV_0 +245 0x0320 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0030 //RX_FDDRC_BAND_MARGIN_1 +248 0x0050 //RX_FDDRC_BAND_MARGIN_2 +249 0x0080 //RX_FDDRC_BAND_MARGIN_3 +250 0x0007 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x5000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x6400 //RX_FDDRC_THRD_3_2 +258 0x6400 //RX_FDDRC_THRD_3_3 +259 0x2000 //RX_FDDRC_SLANT_0_0 +260 0x2000 //RX_FDDRC_SLANT_0_1 +261 0x2000 //RX_FDDRC_SLANT_0_2 +262 0x2000 //RX_FDDRC_SLANT_0_3 +263 0x5333 //RX_FDDRC_SLANT_1_0 +264 0x5333 //RX_FDDRC_SLANT_1_1 +265 0x5333 //RX_FDDRC_SLANT_1_2 +266 0x5333 //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +286 0x0026 //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 +#VOL 3 +163 0x1000 //RX_TDDRC_ALPHA_UP_1 +164 0x1000 //RX_TDDRC_ALPHA_UP_2 +165 0x1000 //RX_TDDRC_ALPHA_UP_3 +166 0x1000 //RX_TDDRC_ALPHA_UP_4 +184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +190 0x7000 //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +269 0x0000 //RX_TDDRC_THRD_0 +270 0x0000 //RX_TDDRC_THRD_1 +271 0x1800 //RX_TDDRC_THRD_2 +272 0x1800 //RX_TDDRC_THRD_3 +273 0x3000 //RX_TDDRC_SLANT_0 +274 0x6E00 //RX_TDDRC_SLANT_1 +275 0x1000 //RX_TDDRC_ALPHA_UP_0 +276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x199A //RX_TDDRC_HMNC_GAIN +279 0x0001 //RX_TDDRC_SMT_FLAG +280 0x0CCD //RX_TDDRC_SMT_W +281 0x0275 //RX_TDDRC_DRC_GAIN +195 0x0020 //RX_FDEQ_SUBNUM +196 0x4848 //RX_FDEQ_GAIN_0 +197 0x4850 //RX_FDEQ_GAIN_1 +198 0x6478 //RX_FDEQ_GAIN_2 +199 0x8689 //RX_FDEQ_GAIN_3 +200 0x908F //RX_FDEQ_GAIN_4 +201 0x9495 //RX_FDEQ_GAIN_5 +202 0x989D //RX_FDEQ_GAIN_6 +203 0x9DA6 //RX_FDEQ_GAIN_7 +204 0xA895 //RX_FDEQ_GAIN_8 +205 0x8A8A //RX_FDEQ_GAIN_9 +206 0x8E78 //RX_FDEQ_GAIN_10 +207 0x7070 //RX_FDEQ_GAIN_11 +208 0x7680 //RX_FDEQ_GAIN_12 +209 0x787C //RX_FDEQ_GAIN_13 +210 0x8890 //RX_FDEQ_GAIN_14 +211 0x9CAC //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0202 //RX_FDEQ_BIN_0 +221 0x0202 //RX_FDEQ_BIN_1 +222 0x0302 //RX_FDEQ_BIN_2 +223 0x0304 //RX_FDEQ_BIN_3 +224 0x0405 //RX_FDEQ_BIN_4 +225 0x0506 //RX_FDEQ_BIN_5 +226 0x0708 //RX_FDEQ_BIN_6 +227 0x090A //RX_FDEQ_BIN_7 +228 0x0B0C //RX_FDEQ_BIN_8 +229 0x0D0E //RX_FDEQ_BIN_9 +230 0x1013 //RX_FDEQ_BIN_10 +231 0x1719 //RX_FDEQ_BIN_11 +232 0x1B1E //RX_FDEQ_BIN_12 +233 0x1E1E //RX_FDEQ_BIN_13 +234 0x1E28 //RX_FDEQ_BIN_14 +235 0x282C //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x4000 //RX_FDEQ_RESRV_0 +245 0x0320 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0030 //RX_FDDRC_BAND_MARGIN_1 +248 0x0050 //RX_FDDRC_BAND_MARGIN_2 +249 0x0080 //RX_FDDRC_BAND_MARGIN_3 +250 0x0007 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x5000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x6400 //RX_FDDRC_THRD_3_2 +258 0x6400 //RX_FDDRC_THRD_3_3 +259 0x2000 //RX_FDDRC_SLANT_0_0 +260 0x2000 //RX_FDDRC_SLANT_0_1 +261 0x2000 //RX_FDDRC_SLANT_0_2 +262 0x2000 //RX_FDDRC_SLANT_0_3 +263 0x5333 //RX_FDDRC_SLANT_1_0 +264 0x5333 //RX_FDDRC_SLANT_1_1 +265 0x5333 //RX_FDDRC_SLANT_1_2 +266 0x5333 //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +286 0x003D //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 +#VOL 4 +163 0x1000 //RX_TDDRC_ALPHA_UP_1 +164 0x1000 //RX_TDDRC_ALPHA_UP_2 +165 0x1000 //RX_TDDRC_ALPHA_UP_3 +166 0x1000 //RX_TDDRC_ALPHA_UP_4 +184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +190 0x7000 //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +269 0x0000 //RX_TDDRC_THRD_0 +270 0x0000 //RX_TDDRC_THRD_1 +271 0x1800 //RX_TDDRC_THRD_2 +272 0x1800 //RX_TDDRC_THRD_3 +273 0x3000 //RX_TDDRC_SLANT_0 +274 0x6E00 //RX_TDDRC_SLANT_1 +275 0x1000 //RX_TDDRC_ALPHA_UP_0 +276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x199A //RX_TDDRC_HMNC_GAIN +279 0x0001 //RX_TDDRC_SMT_FLAG +280 0x0CCD //RX_TDDRC_SMT_W +281 0x0275 //RX_TDDRC_DRC_GAIN +195 0x0020 //RX_FDEQ_SUBNUM +196 0x4848 //RX_FDEQ_GAIN_0 +197 0x4850 //RX_FDEQ_GAIN_1 +198 0x6478 //RX_FDEQ_GAIN_2 +199 0x8689 //RX_FDEQ_GAIN_3 +200 0x908F //RX_FDEQ_GAIN_4 +201 0x9495 //RX_FDEQ_GAIN_5 +202 0x989D //RX_FDEQ_GAIN_6 +203 0x9DA6 //RX_FDEQ_GAIN_7 +204 0xA895 //RX_FDEQ_GAIN_8 +205 0x8A8A //RX_FDEQ_GAIN_9 +206 0x8E78 //RX_FDEQ_GAIN_10 +207 0x7070 //RX_FDEQ_GAIN_11 +208 0x7680 //RX_FDEQ_GAIN_12 +209 0x787C //RX_FDEQ_GAIN_13 +210 0x8890 //RX_FDEQ_GAIN_14 +211 0x9CAC //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0202 //RX_FDEQ_BIN_0 +221 0x0202 //RX_FDEQ_BIN_1 +222 0x0302 //RX_FDEQ_BIN_2 +223 0x0304 //RX_FDEQ_BIN_3 +224 0x0405 //RX_FDEQ_BIN_4 +225 0x0506 //RX_FDEQ_BIN_5 +226 0x0708 //RX_FDEQ_BIN_6 +227 0x090A //RX_FDEQ_BIN_7 +228 0x0B0C //RX_FDEQ_BIN_8 +229 0x0D0E //RX_FDEQ_BIN_9 +230 0x1013 //RX_FDEQ_BIN_10 +231 0x1719 //RX_FDEQ_BIN_11 +232 0x1B1E //RX_FDEQ_BIN_12 +233 0x1E1E //RX_FDEQ_BIN_13 +234 0x1E28 //RX_FDEQ_BIN_14 +235 0x282C //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x4000 //RX_FDEQ_RESRV_0 +245 0x0320 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0030 //RX_FDDRC_BAND_MARGIN_1 +248 0x0050 //RX_FDDRC_BAND_MARGIN_2 +249 0x0080 //RX_FDDRC_BAND_MARGIN_3 +250 0x0007 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x5000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x6400 //RX_FDDRC_THRD_3_2 +258 0x6400 //RX_FDDRC_THRD_3_3 +259 0x2000 //RX_FDDRC_SLANT_0_0 +260 0x2000 //RX_FDDRC_SLANT_0_1 +261 0x2000 //RX_FDDRC_SLANT_0_2 +262 0x2000 //RX_FDDRC_SLANT_0_3 +263 0x5333 //RX_FDDRC_SLANT_1_0 +264 0x5333 //RX_FDDRC_SLANT_1_1 +265 0x5333 //RX_FDDRC_SLANT_1_2 +266 0x5333 //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +286 0x0060 //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 +#VOL 5 +163 0x1000 //RX_TDDRC_ALPHA_UP_1 +164 0x1000 //RX_TDDRC_ALPHA_UP_2 +165 0x1000 //RX_TDDRC_ALPHA_UP_3 +166 0x1000 //RX_TDDRC_ALPHA_UP_4 +184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +190 0x7000 //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +269 0x0000 //RX_TDDRC_THRD_0 +270 0x0000 //RX_TDDRC_THRD_1 +271 0x1800 //RX_TDDRC_THRD_2 +272 0x1800 //RX_TDDRC_THRD_3 +273 0x3000 //RX_TDDRC_SLANT_0 +274 0x6E00 //RX_TDDRC_SLANT_1 +275 0x1000 //RX_TDDRC_ALPHA_UP_0 +276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x199A //RX_TDDRC_HMNC_GAIN +279 0x0001 //RX_TDDRC_SMT_FLAG +280 0x0CCD //RX_TDDRC_SMT_W +281 0x0275 //RX_TDDRC_DRC_GAIN +195 0x0020 //RX_FDEQ_SUBNUM +196 0x4848 //RX_FDEQ_GAIN_0 +197 0x4850 //RX_FDEQ_GAIN_1 +198 0x6478 //RX_FDEQ_GAIN_2 +199 0x8689 //RX_FDEQ_GAIN_3 +200 0x908F //RX_FDEQ_GAIN_4 +201 0x9495 //RX_FDEQ_GAIN_5 +202 0x989D //RX_FDEQ_GAIN_6 +203 0x9DA6 //RX_FDEQ_GAIN_7 +204 0xA895 //RX_FDEQ_GAIN_8 +205 0x8A8A //RX_FDEQ_GAIN_9 +206 0x8E78 //RX_FDEQ_GAIN_10 +207 0x7070 //RX_FDEQ_GAIN_11 +208 0x7680 //RX_FDEQ_GAIN_12 +209 0x787C //RX_FDEQ_GAIN_13 +210 0x8890 //RX_FDEQ_GAIN_14 +211 0x9CAC //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0202 //RX_FDEQ_BIN_0 +221 0x0202 //RX_FDEQ_BIN_1 +222 0x0302 //RX_FDEQ_BIN_2 +223 0x0304 //RX_FDEQ_BIN_3 +224 0x0405 //RX_FDEQ_BIN_4 +225 0x0506 //RX_FDEQ_BIN_5 +226 0x0708 //RX_FDEQ_BIN_6 +227 0x090A //RX_FDEQ_BIN_7 +228 0x0B0C //RX_FDEQ_BIN_8 +229 0x0D0E //RX_FDEQ_BIN_9 +230 0x1013 //RX_FDEQ_BIN_10 +231 0x1719 //RX_FDEQ_BIN_11 +232 0x1B1E //RX_FDEQ_BIN_12 +233 0x1E1E //RX_FDEQ_BIN_13 +234 0x1E28 //RX_FDEQ_BIN_14 +235 0x282C //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x4000 //RX_FDEQ_RESRV_0 +245 0x0320 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0030 //RX_FDDRC_BAND_MARGIN_1 +248 0x0050 //RX_FDDRC_BAND_MARGIN_2 +249 0x0080 //RX_FDDRC_BAND_MARGIN_3 +250 0x0007 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x5000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x6400 //RX_FDDRC_THRD_3_2 +258 0x6400 //RX_FDDRC_THRD_3_3 +259 0x2000 //RX_FDDRC_SLANT_0_0 +260 0x2000 //RX_FDDRC_SLANT_0_1 +261 0x2000 //RX_FDDRC_SLANT_0_2 +262 0x2000 //RX_FDDRC_SLANT_0_3 +263 0x5333 //RX_FDDRC_SLANT_1_0 +264 0x5333 //RX_FDDRC_SLANT_1_1 +265 0x5333 //RX_FDDRC_SLANT_1_2 +266 0x5333 //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +286 0x0099 //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 +#VOL 6 +163 0x1000 //RX_TDDRC_ALPHA_UP_1 +164 0x1000 //RX_TDDRC_ALPHA_UP_2 +165 0x1000 //RX_TDDRC_ALPHA_UP_3 +166 0x1000 //RX_TDDRC_ALPHA_UP_4 +184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +190 0x7000 //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +269 0x0000 //RX_TDDRC_THRD_0 +270 0x0000 //RX_TDDRC_THRD_1 +271 0x1800 //RX_TDDRC_THRD_2 +272 0x1800 //RX_TDDRC_THRD_3 +273 0x3000 //RX_TDDRC_SLANT_0 +274 0x6E00 //RX_TDDRC_SLANT_1 +275 0x1000 //RX_TDDRC_ALPHA_UP_0 +276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x199A //RX_TDDRC_HMNC_GAIN +279 0x0001 //RX_TDDRC_SMT_FLAG +280 0x0CCD //RX_TDDRC_SMT_W +281 0x0275 //RX_TDDRC_DRC_GAIN +195 0x0020 //RX_FDEQ_SUBNUM +196 0x4848 //RX_FDEQ_GAIN_0 +197 0x4850 //RX_FDEQ_GAIN_1 +198 0x6478 //RX_FDEQ_GAIN_2 +199 0x8689 //RX_FDEQ_GAIN_3 +200 0x908F //RX_FDEQ_GAIN_4 +201 0x9495 //RX_FDEQ_GAIN_5 +202 0x989D //RX_FDEQ_GAIN_6 +203 0x9DA6 //RX_FDEQ_GAIN_7 +204 0xA895 //RX_FDEQ_GAIN_8 +205 0x8A8A //RX_FDEQ_GAIN_9 +206 0x8E78 //RX_FDEQ_GAIN_10 +207 0x7070 //RX_FDEQ_GAIN_11 +208 0x7680 //RX_FDEQ_GAIN_12 +209 0x787C //RX_FDEQ_GAIN_13 +210 0x8890 //RX_FDEQ_GAIN_14 +211 0x9CAC //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0202 //RX_FDEQ_BIN_0 +221 0x0202 //RX_FDEQ_BIN_1 +222 0x0302 //RX_FDEQ_BIN_2 +223 0x0304 //RX_FDEQ_BIN_3 +224 0x0405 //RX_FDEQ_BIN_4 +225 0x0506 //RX_FDEQ_BIN_5 +226 0x0708 //RX_FDEQ_BIN_6 +227 0x090A //RX_FDEQ_BIN_7 +228 0x0B0C //RX_FDEQ_BIN_8 +229 0x0D0E //RX_FDEQ_BIN_9 +230 0x1013 //RX_FDEQ_BIN_10 +231 0x1719 //RX_FDEQ_BIN_11 +232 0x1B1E //RX_FDEQ_BIN_12 +233 0x1E1E //RX_FDEQ_BIN_13 +234 0x1E28 //RX_FDEQ_BIN_14 +235 0x282C //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x4000 //RX_FDEQ_RESRV_0 +245 0x0320 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0030 //RX_FDDRC_BAND_MARGIN_1 +248 0x0050 //RX_FDDRC_BAND_MARGIN_2 +249 0x0080 //RX_FDDRC_BAND_MARGIN_3 +250 0x0007 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x5000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x6400 //RX_FDDRC_THRD_3_2 +258 0x6400 //RX_FDDRC_THRD_3_3 +259 0x2000 //RX_FDDRC_SLANT_0_0 +260 0x2000 //RX_FDDRC_SLANT_0_1 +261 0x2000 //RX_FDDRC_SLANT_0_2 +262 0x2000 //RX_FDDRC_SLANT_0_3 +263 0x5333 //RX_FDDRC_SLANT_1_0 +264 0x5333 //RX_FDDRC_SLANT_1_1 +265 0x5333 //RX_FDDRC_SLANT_1_2 +266 0x5333 //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +286 0x0100 //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 #CASE_NAME HANDSET-HANDSET-VOICE_GENERIC-NB -#PARAM_TYPE TX+RX -#TOTAL_CUSTOM_STEP 7 +#PARAM_MODE Full +#PARAM_TYPE TX+2RX +#TOTAL_CUSTOM_STEP 7+7 #TX 0 0x0000 //TX_OPERATION_MODE_0 1 0x0000 //TX_OPERATION_MODE_1 -2 0x0036 //TX_PATCH_REG +2 0x0076 //TX_PATCH_REG 3 0x6F7E //TX_SENDFUNC_MODE_0 4 0x0001 //TX_SENDFUNC_MODE_1 5 0x0002 //TX_NUM_MIC @@ -5287,7 +8039,7 @@ 18 0x0000 //TX_SYS_RESRV_2 19 0x0000 //TX_SYS_RESRV_3 20 0x0000 //TX_DIST2REF0 -21 0x009D //TX_DIST2REF1 +21 0x009C //TX_DIST2REF1 22 0x0000 //TX_DIST2REF_02 23 0x0000 //TX_DIST2REF_03 24 0x0000 //TX_DIST2REF_04 @@ -5517,19 +8269,19 @@ 248 0xF800 //TX_THR_SN_EST_6 249 0xF700 //TX_THR_SN_EST_7 250 0x0000 //TX_DELTA_THR_SN_EST_0 -251 0x01A0 //TX_DELTA_THR_SN_EST_1 -252 0x0100 //TX_DELTA_THR_SN_EST_2 -253 0x0200 //TX_DELTA_THR_SN_EST_3 -254 0x01A0 //TX_DELTA_THR_SN_EST_4 -255 0x0100 //TX_DELTA_THR_SN_EST_5 -256 0x0000 //TX_DELTA_THR_SN_EST_6 +251 0x0100 //TX_DELTA_THR_SN_EST_1 +252 0x0200 //TX_DELTA_THR_SN_EST_2 +253 0x01A0 //TX_DELTA_THR_SN_EST_3 +254 0x0100 //TX_DELTA_THR_SN_EST_4 +255 0x0000 //TX_DELTA_THR_SN_EST_5 +256 0x01A0 //TX_DELTA_THR_SN_EST_6 257 0x0200 //TX_DELTA_THR_SN_EST_7 258 0x4000 //TX_LAMBDA_NN_EST_0 -259 0x4000 //TX_LAMBDA_NN_EST_1 -260 0x3000 //TX_LAMBDA_NN_EST_2 -261 0x4000 //TX_LAMBDA_NN_EST_3 +259 0x3000 //TX_LAMBDA_NN_EST_1 +260 0x4000 //TX_LAMBDA_NN_EST_2 +261 0x3000 //TX_LAMBDA_NN_EST_3 262 0x3000 //TX_LAMBDA_NN_EST_4 -263 0x3000 //TX_LAMBDA_NN_EST_5 +263 0x4000 //TX_LAMBDA_NN_EST_5 264 0x4000 //TX_LAMBDA_NN_EST_6 265 0x4000 //TX_LAMBDA_NN_EST_7 266 0x0400 //TX_N_SN_EST @@ -5548,20 +8300,20 @@ 279 0x4000 //TX_B_POST_FLT_0 280 0x4000 //TX_B_POST_FLT_1 281 0x0014 //TX_NS_LVL_CTRL_0 -282 0x001B //TX_NS_LVL_CTRL_1 -283 0x0019 //TX_NS_LVL_CTRL_2 +282 0x0019 //TX_NS_LVL_CTRL_1 +283 0x0017 //TX_NS_LVL_CTRL_2 284 0x0017 //TX_NS_LVL_CTRL_3 -285 0x0017 //TX_NS_LVL_CTRL_4 -286 0x0019 //TX_NS_LVL_CTRL_5 -287 0x0014 //TX_NS_LVL_CTRL_6 +285 0x0019 //TX_NS_LVL_CTRL_4 +286 0x0014 //TX_NS_LVL_CTRL_5 +287 0x001B //TX_NS_LVL_CTRL_6 288 0x0010 //TX_NS_LVL_CTRL_7 289 0x0010 //TX_MIN_GAIN_S_0 290 0x000C //TX_MIN_GAIN_S_1 -291 0x000C //TX_MIN_GAIN_S_2 +291 0x0010 //TX_MIN_GAIN_S_2 292 0x0010 //TX_MIN_GAIN_S_3 -293 0x0010 //TX_MIN_GAIN_S_4 -294 0x000C //TX_MIN_GAIN_S_5 -295 0x0014 //TX_MIN_GAIN_S_6 +293 0x000C //TX_MIN_GAIN_S_4 +294 0x0014 //TX_MIN_GAIN_S_5 +295 0x000C //TX_MIN_GAIN_S_6 296 0x0014 //TX_MIN_GAIN_S_7 297 0x5000 //TX_NMOS_SUP 298 0x0000 //TX_NS_MAX_PRI_SNR_TH @@ -5571,8 +8323,8 @@ 302 0x4000 //TX_SNRI_SUP_2 303 0x4000 //TX_SNRI_SUP_3 304 0x4000 //TX_SNRI_SUP_4 -305 0x4000 //TX_SNRI_SUP_5 -306 0x7FFF //TX_SNRI_SUP_6 +305 0x7FFF //TX_SNRI_SUP_5 +306 0x4000 //TX_SNRI_SUP_6 307 0x3000 //TX_SNRI_SUP_7 308 0x3000 //TX_THR_LFNS 309 0x001A //TX_G_LFNS @@ -5581,36 +8333,36 @@ 312 0x7FFF //TX_A_POST_FILT_0 313 0x2000 //TX_A_POST_FILT_1 314 0x2000 //TX_A_POST_FILT_S_0 -315 0x7000 //TX_A_POST_FILT_S_1 -316 0x6000 //TX_A_POST_FILT_S_2 -317 0x5000 //TX_A_POST_FILT_S_3 -318 0x2000 //TX_A_POST_FILT_S_4 -319 0x6000 //TX_A_POST_FILT_S_5 -320 0x2000 //TX_A_POST_FILT_S_6 +315 0x6000 //TX_A_POST_FILT_S_1 +316 0x5000 //TX_A_POST_FILT_S_2 +317 0x2000 //TX_A_POST_FILT_S_3 +318 0x6000 //TX_A_POST_FILT_S_4 +319 0x2000 //TX_A_POST_FILT_S_5 +320 0x7000 //TX_A_POST_FILT_S_6 321 0x7000 //TX_A_POST_FILT_S_7 322 0x4000 //TX_B_POST_FILT_0 323 0x4000 //TX_B_POST_FILT_1 -324 0x7FFF //TX_B_POST_FILT_2 -325 0x5000 //TX_B_POST_FILT_3 -326 0x7FFF //TX_B_POST_FILT_4 -327 0x7FFF //TX_B_POST_FILT_5 +324 0x5000 //TX_B_POST_FILT_2 +325 0x4000 //TX_B_POST_FILT_3 +326 0x4000 //TX_B_POST_FILT_4 +327 0x4000 //TX_B_POST_FILT_5 328 0x4000 //TX_B_POST_FILT_6 329 0x2000 //TX_B_POST_FILT_7 330 0x7FFF //TX_B_LESSCUT_RTO_S_0 -331 0x7FFF //TX_B_LESSCUT_RTO_S_1 -332 0x7FFF //TX_B_LESSCUT_RTO_S_2 -333 0x7FFF //TX_B_LESSCUT_RTO_S_3 -334 0x7FFF //TX_B_LESSCUT_RTO_S_4 -335 0x7FFF //TX_B_LESSCUT_RTO_S_5 -336 0x7FFF //TX_B_LESSCUT_RTO_S_6 -337 0x7FFF //TX_B_LESSCUT_RTO_S_7 +331 0x1000 //TX_B_LESSCUT_RTO_S_1 +332 0x1000 //TX_B_LESSCUT_RTO_S_2 +333 0x1000 //TX_B_LESSCUT_RTO_S_3 +334 0x1000 //TX_B_LESSCUT_RTO_S_4 +335 0x1000 //TX_B_LESSCUT_RTO_S_5 +336 0x1000 //TX_B_LESSCUT_RTO_S_6 +337 0x1000 //TX_B_LESSCUT_RTO_S_7 338 0x7E14 //TX_LAMBDA_PFILT 339 0x7C29 //TX_LAMBDA_PFILT_S_0 -340 0x7C29 //TX_LAMBDA_PFILT_S_1 -341 0x7200 //TX_LAMBDA_PFILT_S_2 -342 0x7900 //TX_LAMBDA_PFILT_S_3 -343 0x7400 //TX_LAMBDA_PFILT_S_4 -344 0x7200 //TX_LAMBDA_PFILT_S_5 +340 0x7200 //TX_LAMBDA_PFILT_S_1 +341 0x7900 //TX_LAMBDA_PFILT_S_2 +342 0x7400 //TX_LAMBDA_PFILT_S_3 +343 0x7200 //TX_LAMBDA_PFILT_S_4 +344 0x7C29 //TX_LAMBDA_PFILT_S_5 345 0x7C29 //TX_LAMBDA_PFILT_S_6 346 0x7C29 //TX_LAMBDA_PFILT_S_7 347 0x0200 //TX_K_PEPPER @@ -5646,10 +8398,10 @@ 377 0x0000 //TX_NOISE_TH_5_4 378 0x07D0 //TX_NOISE_TH_6 379 0x0004 //TX_MINENOISE_TH -380 0x4000 //TX_MINENOISE_MIC0_TH_MTS -381 0xFFEE //TX_MINENOISE_MIC0_TH_EXP -382 0x6000 //TX_MINENOISE_MIC0_S_TH_MTS -383 0xFFF3 //TX_MINENOISE_MIC0_S_TH_EXP +380 0xD508 //TX_MORENS_TFMASK_TH +381 0x0001 //TX_DRC_QUIET_FLOOR +382 0x6D60 //TX_RATIODTL_CUT_TH +383 0x0DAC //TX_DT_CUT_K1 384 0x00A5 //TX_OUT_ENER_S_TH_CLEAN 385 0x00A5 //TX_OUT_ENER_S_TH_LESSCLEAN 386 0x00A5 //TX_OUT_ENER_S_TH_NOISY @@ -5657,15 +8409,15 @@ 388 0x00CE //TX_OUT_ENER_TH_SPEECH 389 0x2000 //TX_SN_NPB_GAIN 390 0x0000 //TX_NN_NPB_GAIN -391 0x0000 //TX_CSX_ALPHA_0 -392 0x0000 //TX_CSX_ALPHA_1 -393 0x0000 //TX_CSX_ALPHA_2 -394 0x0000 //TX_CSX_ALPHA_3 -395 0x0800 //TX_MU_ARSP_EST -396 0x00C8 //TX_P_OUTBEAM_MIN_TH +391 0x3000 //TX_POST_MASK_SUP_HSNE +392 0x07D0 //TX_TAIL_DET_TH +393 0x4000 //TX_B_LESSCUT_RTO_WTA +394 0x0000 //TX_MEL_G_R +395 0x0080 //TX_SUPHIGH_TH +396 0x0000 //TX_MASK_G_R 397 0x0002 //TX_EXTRA_NS_L -398 0x0800 //TX_EXTRA_NS_A -399 0x0005 //TX_VR_NOISE_FLOOR_TH +398 0x1800 //TX_C_POST_FLT_MASK +399 0x7FFF //TX_A_POST_FLT_WNS 400 0x0148 //TX_MIN_G_LOW300HZ 401 0x0001 //TX_MAXLEVEL_CNG 402 0x00B4 //TX_STN_NOISE_TH @@ -5780,16 +8532,16 @@ 511 0x6666 //TX_MIC_TO_BFGAIN 512 0x0000 //TX_MICTOBFGAIN0 513 0x0000 //TX_FASTMUE_TH -514 0x0000 //TX_DERVB_LEN_0 -515 0x0000 //TX_DERVB_LEN_1 -516 0x0000 //TX_RHO_DERVB -517 0x0000 //TX_MIC_INDX_DERVB -518 0x0000 //TX_MU_DERVB -519 0x0000 //TX_DR_RESRV_0 -520 0x0000 //TX_DR_RESRV_1 -521 0x0000 //TX_DR_RESRV_2 -522 0x0000 //TX_DR_RESRV_3 -523 0x0000 //TX_DR_RESRV_4 +514 0x3000 //TX_DEREVERB_LF_MU +515 0x34CD //TX_DEREVERB_HF_MU +516 0x0007 //TX_DEREVERB_DELAY +517 0x0004 //TX_DEREVERB_COEF_LEN +518 0x0003 //TX_DEREVERB_DNR +519 0x0000 //TX_DEREVERB_ALPHA +520 0x0000 //TX_DEREVERB_BETA +521 0x3A98 //TX_GSC_RTOL_TH +522 0x3A98 //TX_GSC_RTOH_TH +523 0x7E2C //TX_WIDE2_MEANHTH 524 0x0000 //TX_DR_RESRV_5 525 0x0000 //TX_DR_RESRV_6 526 0x0000 //TX_DR_RESRV_7 @@ -5837,11 +8589,11 @@ 568 0x584F //TX_FDEQ_GAIN_1 569 0x4F4E //TX_FDEQ_GAIN_2 570 0x474A //TX_FDEQ_GAIN_3 -571 0x473F //TX_FDEQ_GAIN_4 -572 0x4240 //TX_FDEQ_GAIN_5 +571 0x4737 //TX_FDEQ_GAIN_4 +572 0x3A40 //TX_FDEQ_GAIN_5 573 0x4040 //TX_FDEQ_GAIN_6 -574 0x3630 //TX_FDEQ_GAIN_7 -575 0x2620 //TX_FDEQ_GAIN_8 +574 0x3631 //TX_FDEQ_GAIN_7 +575 0x2020 //TX_FDEQ_GAIN_8 576 0x383C //TX_FDEQ_GAIN_9 577 0x4848 //TX_FDEQ_GAIN_10 578 0x4848 //TX_FDEQ_GAIN_11 @@ -5866,7 +8618,7 @@ 597 0x0808 //TX_FDEQ_BIN_6 598 0x050E //TX_FDEQ_BIN_7 599 0x0B0C //TX_FDEQ_BIN_8 -600 0x0F0F //TX_FDEQ_BIN_9 +600 0x0F09 //TX_FDEQ_BIN_9 601 0x0000 //TX_FDEQ_BIN_10 602 0x0000 //TX_FDEQ_BIN_11 603 0x0000 //TX_FDEQ_BIN_12 @@ -5890,9 +8642,9 @@ 621 0x4848 //TX_PREEQ_GAIN_MIC0_4 622 0x4848 //TX_PREEQ_GAIN_MIC0_5 623 0x4848 //TX_PREEQ_GAIN_MIC0_6 -624 0x4846 //TX_PREEQ_GAIN_MIC0_7 -625 0x4544 //TX_PREEQ_GAIN_MIC0_8 -626 0x4241 //TX_PREEQ_GAIN_MIC0_9 +624 0x4848 //TX_PREEQ_GAIN_MIC0_7 +625 0x4848 //TX_PREEQ_GAIN_MIC0_8 +626 0x4848 //TX_PREEQ_GAIN_MIC0_9 627 0x4848 //TX_PREEQ_GAIN_MIC0_10 628 0x4848 //TX_PREEQ_GAIN_MIC0_11 629 0x4848 //TX_PREEQ_GAIN_MIC0_12 @@ -5940,8 +8692,8 @@ 671 0x4848 //TX_PREEQ_GAIN_MIC1_5 672 0x4848 //TX_PREEQ_GAIN_MIC1_6 673 0x4848 //TX_PREEQ_GAIN_MIC1_7 -674 0x4A4C //TX_PREEQ_GAIN_MIC1_8 -675 0x4E50 //TX_PREEQ_GAIN_MIC1_9 +674 0x4849 //TX_PREEQ_GAIN_MIC1_8 +675 0x4A4B //TX_PREEQ_GAIN_MIC1_9 676 0x4848 //TX_PREEQ_GAIN_MIC1_10 677 0x4848 //TX_PREEQ_GAIN_MIC1_11 678 0x4848 //TX_PREEQ_GAIN_MIC1_12 @@ -5956,7 +8708,7 @@ 687 0x4848 //TX_PREEQ_GAIN_MIC1_21 688 0x4848 //TX_PREEQ_GAIN_MIC1_22 689 0x4848 //TX_PREEQ_GAIN_MIC1_23 -690 0x0203 //TX_PREEQ_BIN_MIC1_0 +690 0x0202 //TX_PREEQ_BIN_MIC1_0 691 0x0203 //TX_PREEQ_BIN_MIC1_1 692 0x0303 //TX_PREEQ_BIN_MIC1_2 693 0x0304 //TX_PREEQ_BIN_MIC1_3 @@ -6132,7 +8884,7 @@ 863 0x199A //TX_TDDRC_HMNC_GAIN 864 0x0000 //TX_TDDRC_SMT_FLAG 865 0x0CCD //TX_TDDRC_SMT_W -866 0x0550 //TX_TDDRC_DRC_GAIN +866 0x0504 //TX_TDDRC_DRC_GAIN 867 0x7FFF //TX_TDDRC_LMT_THRD 868 0x0000 //TX_TDDRC_LMT_ALPHA 869 0x0000 //TX_TFMASKLTH @@ -6163,8 +8915,73 @@ 894 0xC000 //TX_FASTNS_SSA_THHFL 895 0xCCCC //TX_FASTNS_SSA_THLFH 896 0xD999 //TX_FASTNS_SSA_THHFH +897 0x2339 //TX_SENDFUNC_REG_MICMUTE +898 0x0021 //TX_SENDFUNC_REG_MICMUTE1 +899 0x02BC //TX_MICMUTE_RATIO_THR +900 0x0140 //TX_MICMUTE_AMP_THR +901 0x0004 //TX_MICMUTE_HPF_IND +902 0x00C0 //TX_MICMUTE_LOG_EYR_TH +903 0x0008 //TX_MICMUTE_CVG_TIME +904 0x0008 //TX_MICMUTE_RELEASE_TIME +905 0x01FE //TX_MIC_VOLUME_MIC0MUTE +906 0x0020 //TX_MICMUTE_EPD_OFFSET_0 +907 0x001E //TX_MICMUTE_FRQ_AEC_L +908 0x7999 //TX_MICMUTE_EAD_THR +909 0x7FFF //TX_MICMUTE_LAMBDA_CB_NLE +910 0x7FFF //TX_MICMUTE_LAMBDA_RE_EST +911 0x4000 //TX_DTD_THR1_MICMUTE_0 +912 0x7000 //TX_DTD_THR1_MICMUTE_1 +913 0x7FFF //TX_DTD_THR1_MICMUTE_2 +914 0x7FFF //TX_DTD_THR1_MICMUTE_3 +915 0x6CCC //TX_DTD_THR2_MICMUTE_0 +916 0x0400 //TX_MICMUTE_MIN_EQ_RE_EST_0 +917 0x0400 //TX_MICMUTE_MIN_EQ_RE_EST_1 +918 0x1000 //TX_MICMUTE_MIN_EQ_RE_EST_2 +919 0x7FFF //TX_MICMUTE_MIN_EQ_RE_EST_3 +920 0x7FFF //TX_MICMUTE_MIN_EQ_RE_EST_4 +921 0x4000 //TX_MICMUTE_C_POST_FLT +922 0x03E8 //TX_MICMUTE_DT_CUT_K +923 0x0001 //TX_MICMUTE_DT_CUT_THR +924 0x03E8 //TX_MICMUTE_DT_CUT_K2 +925 0x0001 //TX_MICMUTE_DT_CUT_THR2 +926 0x0064 //TX_MICMUTE_DT2_HOLD_N +927 0x1000 //TX_MICMUTE_RATIODTH_THCUT +928 0x1000 //TX_MICMUTE_B_POST_FLT_ECHOL +929 0x7FFF //TX_MICMUTE_B_POST_FLT_ECHOH +930 0x0400 //TX_MICMUTE_C_POST_FLT_MASK +931 0x7999 //TX_MICMUTE_RATIODTL_CUT_TH +932 0x0258 //TX_MICMUTE_DT_CUT_K1 +933 0x0800 //TX_MICMUTE_N2_SN_EST +934 0xFC00 //TX_MICMUTE_THR_SN_EST_0 +935 0x001C //TX_MICMUTE_MIN_G_CTRL_0 +936 0x6000 //TX_MICMUTE_A_POST_FILT_S_0 +937 0x7000 //TX_MICMUTE_B_POST_FILT_0 +938 0x2710 //TX_MIC1RUB_AMP_THR +939 0x0010 //TX_MIC1MUTE_RATIO_THR +940 0x0450 //TX_MIC1MUTE_AMP_THR +941 0x0008 //TX_MIC1MUTE_CVG_TIME +942 0x0008 //TX_MIC1MUTE_RELEASE_TIME +943 0x0000 //TX_AMS_RESRV_01 +944 0x0000 //TX_AMS_RESRV_02 +945 0x0000 //TX_AMS_RESRV_03 +946 0x0000 //TX_AMS_RESRV_04 +947 0x0000 //TX_AMS_RESRV_05 +948 0x0000 //TX_AMS_RESRV_06 +949 0x0000 //TX_AMS_RESRV_07 +950 0x0000 //TX_AMS_RESRV_08 +951 0x0000 //TX_AMS_RESRV_09 +952 0x0000 //TX_AMS_RESRV_10 +953 0x0000 //TX_AMS_RESRV_11 +954 0x0000 //TX_AMS_RESRV_12 +955 0x0000 //TX_AMS_RESRV_13 +956 0x0000 //TX_AMS_RESRV_14 +957 0x0000 //TX_AMS_RESRV_15 +958 0x0000 //TX_AMS_RESRV_16 +959 0x0000 //TX_AMS_RESRV_17 +960 0x0000 //TX_AMS_RESRV_18 +961 0x0000 //TX_AMS_RESRV_19 #RX -0 0x003C //RX_RECVFUNC_MODE_0 +0 0x203C //RX_RECVFUNC_MODE_0 1 0x0000 //RX_RECVFUNC_MODE_1 2 0x0000 //RX_SAMPLINGFREQ_SIG 3 0x0000 //RX_SAMPLINGFREQ_PROC @@ -6174,7 +8991,7 @@ 7 0x1000 //RX_TDDRC_ALPHA_UP_2 8 0x1000 //RX_TDDRC_ALPHA_UP_3 9 0x1000 //RX_TDDRC_ALPHA_UP_4 -10 0x0600 //RX_PGA +10 0x050E //RX_PGA 11 0x7FFF //RX_A_HP 12 0x4000 //RX_B_PE 13 0x7800 //RX_THR_PITCH_DET_0 @@ -6203,16 +9020,16 @@ 36 0x0000 //RX_LMT_THRD 37 0x4000 //RX_LMT_ALPHA 38 0x0014 //RX_FDEQ_SUBNUM -39 0x4840 //RX_FDEQ_GAIN_0 -40 0x3E3E //RX_FDEQ_GAIN_1 -41 0x4E62 //RX_FDEQ_GAIN_2 -42 0x6C7A //RX_FDEQ_GAIN_3 -43 0x8690 //RX_FDEQ_GAIN_4 -44 0x867E //RX_FDEQ_GAIN_5 -45 0x7E7E //RX_FDEQ_GAIN_6 -46 0x8080 //RX_FDEQ_GAIN_7 -47 0x8088 //RX_FDEQ_GAIN_8 -48 0x838B //RX_FDEQ_GAIN_9 +39 0x483A //RX_FDEQ_GAIN_0 +40 0x3A3A //RX_FDEQ_GAIN_1 +41 0x4A58 //RX_FDEQ_GAIN_2 +42 0x5E6E //RX_FDEQ_GAIN_3 +43 0x7A84 //RX_FDEQ_GAIN_4 +44 0x7C7A //RX_FDEQ_GAIN_5 +45 0x7C78 //RX_FDEQ_GAIN_6 +46 0x7978 //RX_FDEQ_GAIN_7 +47 0x7A7E //RX_FDEQ_GAIN_8 +48 0x7C80 //RX_FDEQ_GAIN_9 49 0x4848 //RX_FDEQ_GAIN_10 50 0x4848 //RX_FDEQ_GAIN_11 51 0x4848 //RX_FDEQ_GAIN_12 @@ -6228,8 +9045,8 @@ 61 0x4848 //RX_FDEQ_GAIN_22 62 0x4848 //RX_FDEQ_GAIN_23 63 0x0202 //RX_FDEQ_BIN_0 -64 0x0203 //RX_FDEQ_BIN_1 -65 0x0303 //RX_FDEQ_BIN_2 +64 0x0204 //RX_FDEQ_BIN_1 +65 0x0203 //RX_FDEQ_BIN_2 66 0x0304 //RX_FDEQ_BIN_3 67 0x0405 //RX_FDEQ_BIN_4 68 0x0506 //RX_FDEQ_BIN_5 @@ -6280,15 +9097,15 @@ 113 0x0000 //RX_TDDRC_THRD_1 114 0x1800 //RX_TDDRC_THRD_2 115 0x1800 //RX_TDDRC_THRD_3 -116 0x3000 //RX_TDDRC_SLANT_0 -117 0x6E00 //RX_TDDRC_SLANT_1 +116 0x7FFF //RX_TDDRC_SLANT_0 +117 0x7FFF //RX_TDDRC_SLANT_1 118 0x1000 //RX_TDDRC_ALPHA_UP_0 119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 120 0x0000 //RX_TDDRC_HMNC_FLAG 121 0x199A //RX_TDDRC_HMNC_GAIN 122 0x0001 //RX_TDDRC_SMT_FLAG 123 0x0CCD //RX_TDDRC_SMT_W -124 0x05A0 //RX_TDDRC_DRC_GAIN +124 0x06EC //RX_TDDRC_DRC_GAIN 125 0x7C00 //RX_LAMBDA_PKA_FP 126 0x13E0 //RX_TPKA_FP 127 0x0080 //RX_MIN_G_FP @@ -6336,26 +9153,26 @@ 113 0x0000 //RX_TDDRC_THRD_1 114 0x1800 //RX_TDDRC_THRD_2 115 0x1800 //RX_TDDRC_THRD_3 -116 0x3000 //RX_TDDRC_SLANT_0 -117 0x6E00 //RX_TDDRC_SLANT_1 +116 0x7FFF //RX_TDDRC_SLANT_0 +117 0x7FFF //RX_TDDRC_SLANT_1 118 0x1000 //RX_TDDRC_ALPHA_UP_0 119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 120 0x0000 //RX_TDDRC_HMNC_FLAG 121 0x199A //RX_TDDRC_HMNC_GAIN 122 0x0001 //RX_TDDRC_SMT_FLAG 123 0x0CCD //RX_TDDRC_SMT_W -124 0x05A0 //RX_TDDRC_DRC_GAIN +124 0x06EC //RX_TDDRC_DRC_GAIN 38 0x0014 //RX_FDEQ_SUBNUM -39 0x4840 //RX_FDEQ_GAIN_0 -40 0x3E3E //RX_FDEQ_GAIN_1 -41 0x4E62 //RX_FDEQ_GAIN_2 -42 0x6C7A //RX_FDEQ_GAIN_3 -43 0x8690 //RX_FDEQ_GAIN_4 -44 0x867E //RX_FDEQ_GAIN_5 -45 0x7E7E //RX_FDEQ_GAIN_6 -46 0x8080 //RX_FDEQ_GAIN_7 -47 0x8088 //RX_FDEQ_GAIN_8 -48 0x838B //RX_FDEQ_GAIN_9 +39 0x483A //RX_FDEQ_GAIN_0 +40 0x3A3A //RX_FDEQ_GAIN_1 +41 0x4A58 //RX_FDEQ_GAIN_2 +42 0x5E6E //RX_FDEQ_GAIN_3 +43 0x7A84 //RX_FDEQ_GAIN_4 +44 0x7C7A //RX_FDEQ_GAIN_5 +45 0x7C78 //RX_FDEQ_GAIN_6 +46 0x7978 //RX_FDEQ_GAIN_7 +47 0x7A7E //RX_FDEQ_GAIN_8 +48 0x7C80 //RX_FDEQ_GAIN_9 49 0x4848 //RX_FDEQ_GAIN_10 50 0x4848 //RX_FDEQ_GAIN_11 51 0x4848 //RX_FDEQ_GAIN_12 @@ -6371,8 +9188,8 @@ 61 0x4848 //RX_FDEQ_GAIN_22 62 0x4848 //RX_FDEQ_GAIN_23 63 0x0202 //RX_FDEQ_BIN_0 -64 0x0203 //RX_FDEQ_BIN_1 -65 0x0303 //RX_FDEQ_BIN_2 +64 0x0204 //RX_FDEQ_BIN_1 +65 0x0203 //RX_FDEQ_BIN_2 66 0x0304 //RX_FDEQ_BIN_3 67 0x0405 //RX_FDEQ_BIN_4 68 0x0506 //RX_FDEQ_BIN_5 @@ -6435,26 +9252,26 @@ 113 0x0000 //RX_TDDRC_THRD_1 114 0x1800 //RX_TDDRC_THRD_2 115 0x1800 //RX_TDDRC_THRD_3 -116 0x3000 //RX_TDDRC_SLANT_0 -117 0x6E00 //RX_TDDRC_SLANT_1 +116 0x7FFF //RX_TDDRC_SLANT_0 +117 0x7FFF //RX_TDDRC_SLANT_1 118 0x1000 //RX_TDDRC_ALPHA_UP_0 119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 120 0x0000 //RX_TDDRC_HMNC_FLAG 121 0x199A //RX_TDDRC_HMNC_GAIN 122 0x0001 //RX_TDDRC_SMT_FLAG 123 0x0CCD //RX_TDDRC_SMT_W -124 0x055F //RX_TDDRC_DRC_GAIN +124 0x06EC //RX_TDDRC_DRC_GAIN 38 0x0014 //RX_FDEQ_SUBNUM -39 0x4840 //RX_FDEQ_GAIN_0 -40 0x3E3E //RX_FDEQ_GAIN_1 -41 0x4E62 //RX_FDEQ_GAIN_2 -42 0x6C7A //RX_FDEQ_GAIN_3 -43 0x8690 //RX_FDEQ_GAIN_4 -44 0x867E //RX_FDEQ_GAIN_5 -45 0x7E7E //RX_FDEQ_GAIN_6 -46 0x8080 //RX_FDEQ_GAIN_7 -47 0x8088 //RX_FDEQ_GAIN_8 -48 0x838B //RX_FDEQ_GAIN_9 +39 0x483A //RX_FDEQ_GAIN_0 +40 0x3A3A //RX_FDEQ_GAIN_1 +41 0x4A58 //RX_FDEQ_GAIN_2 +42 0x5E6E //RX_FDEQ_GAIN_3 +43 0x7A84 //RX_FDEQ_GAIN_4 +44 0x7C7A //RX_FDEQ_GAIN_5 +45 0x7C78 //RX_FDEQ_GAIN_6 +46 0x7978 //RX_FDEQ_GAIN_7 +47 0x7A7E //RX_FDEQ_GAIN_8 +48 0x7C80 //RX_FDEQ_GAIN_9 49 0x4848 //RX_FDEQ_GAIN_10 50 0x4848 //RX_FDEQ_GAIN_11 51 0x4848 //RX_FDEQ_GAIN_12 @@ -6470,8 +9287,8 @@ 61 0x4848 //RX_FDEQ_GAIN_22 62 0x4848 //RX_FDEQ_GAIN_23 63 0x0202 //RX_FDEQ_BIN_0 -64 0x0203 //RX_FDEQ_BIN_1 -65 0x0303 //RX_FDEQ_BIN_2 +64 0x0204 //RX_FDEQ_BIN_1 +65 0x0203 //RX_FDEQ_BIN_2 66 0x0304 //RX_FDEQ_BIN_3 67 0x0405 //RX_FDEQ_BIN_4 68 0x0506 //RX_FDEQ_BIN_5 @@ -6517,7 +9334,7 @@ 108 0x5333 //RX_FDDRC_SLANT_1_2 109 0x5333 //RX_FDDRC_SLANT_1_3 110 0x0000 //RX_FDDRC_RESRV_0 -129 0x0011 //RX_SPK_VOL +129 0x0010 //RX_SPK_VOL 130 0x0000 //RX_VOL_RESRV_0 #VOL 2 6 0x1000 //RX_TDDRC_ALPHA_UP_1 @@ -6534,26 +9351,26 @@ 113 0x0000 //RX_TDDRC_THRD_1 114 0x1800 //RX_TDDRC_THRD_2 115 0x1800 //RX_TDDRC_THRD_3 -116 0x3000 //RX_TDDRC_SLANT_0 -117 0x6E00 //RX_TDDRC_SLANT_1 +116 0x7FFF //RX_TDDRC_SLANT_0 +117 0x7FFF //RX_TDDRC_SLANT_1 118 0x1000 //RX_TDDRC_ALPHA_UP_0 119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 120 0x0000 //RX_TDDRC_HMNC_FLAG 121 0x199A //RX_TDDRC_HMNC_GAIN 122 0x0001 //RX_TDDRC_SMT_FLAG 123 0x0CCD //RX_TDDRC_SMT_W -124 0x055F //RX_TDDRC_DRC_GAIN +124 0x06EC //RX_TDDRC_DRC_GAIN 38 0x0014 //RX_FDEQ_SUBNUM -39 0x4840 //RX_FDEQ_GAIN_0 -40 0x3E3E //RX_FDEQ_GAIN_1 -41 0x4E62 //RX_FDEQ_GAIN_2 -42 0x6C7A //RX_FDEQ_GAIN_3 -43 0x8690 //RX_FDEQ_GAIN_4 -44 0x867E //RX_FDEQ_GAIN_5 -45 0x7E7E //RX_FDEQ_GAIN_6 -46 0x8080 //RX_FDEQ_GAIN_7 -47 0x8088 //RX_FDEQ_GAIN_8 -48 0x838B //RX_FDEQ_GAIN_9 +39 0x483A //RX_FDEQ_GAIN_0 +40 0x3A3A //RX_FDEQ_GAIN_1 +41 0x4A58 //RX_FDEQ_GAIN_2 +42 0x5E6E //RX_FDEQ_GAIN_3 +43 0x7A84 //RX_FDEQ_GAIN_4 +44 0x7C7A //RX_FDEQ_GAIN_5 +45 0x7C78 //RX_FDEQ_GAIN_6 +46 0x7978 //RX_FDEQ_GAIN_7 +47 0x7A7E //RX_FDEQ_GAIN_8 +48 0x7C80 //RX_FDEQ_GAIN_9 49 0x4848 //RX_FDEQ_GAIN_10 50 0x4848 //RX_FDEQ_GAIN_11 51 0x4848 //RX_FDEQ_GAIN_12 @@ -6569,8 +9386,8 @@ 61 0x4848 //RX_FDEQ_GAIN_22 62 0x4848 //RX_FDEQ_GAIN_23 63 0x0202 //RX_FDEQ_BIN_0 -64 0x0203 //RX_FDEQ_BIN_1 -65 0x0303 //RX_FDEQ_BIN_2 +64 0x0204 //RX_FDEQ_BIN_1 +65 0x0203 //RX_FDEQ_BIN_2 66 0x0304 //RX_FDEQ_BIN_3 67 0x0405 //RX_FDEQ_BIN_4 68 0x0506 //RX_FDEQ_BIN_5 @@ -6616,7 +9433,7 @@ 108 0x5333 //RX_FDDRC_SLANT_1_2 109 0x5333 //RX_FDDRC_SLANT_1_3 110 0x0000 //RX_FDDRC_RESRV_0 -129 0x001C //RX_SPK_VOL +129 0x001A //RX_SPK_VOL 130 0x0000 //RX_VOL_RESRV_0 #VOL 3 6 0x1000 //RX_TDDRC_ALPHA_UP_1 @@ -6633,26 +9450,26 @@ 113 0x0000 //RX_TDDRC_THRD_1 114 0x1800 //RX_TDDRC_THRD_2 115 0x1800 //RX_TDDRC_THRD_3 -116 0x3000 //RX_TDDRC_SLANT_0 -117 0x6E00 //RX_TDDRC_SLANT_1 +116 0x7FFF //RX_TDDRC_SLANT_0 +117 0x7FFF //RX_TDDRC_SLANT_1 118 0x1000 //RX_TDDRC_ALPHA_UP_0 119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 120 0x0000 //RX_TDDRC_HMNC_FLAG 121 0x199A //RX_TDDRC_HMNC_GAIN 122 0x0001 //RX_TDDRC_SMT_FLAG 123 0x0CCD //RX_TDDRC_SMT_W -124 0x055F //RX_TDDRC_DRC_GAIN +124 0x06EC //RX_TDDRC_DRC_GAIN 38 0x0014 //RX_FDEQ_SUBNUM -39 0x4840 //RX_FDEQ_GAIN_0 -40 0x3E3E //RX_FDEQ_GAIN_1 -41 0x4E62 //RX_FDEQ_GAIN_2 -42 0x6C7A //RX_FDEQ_GAIN_3 -43 0x8690 //RX_FDEQ_GAIN_4 -44 0x867E //RX_FDEQ_GAIN_5 -45 0x7E7E //RX_FDEQ_GAIN_6 -46 0x8080 //RX_FDEQ_GAIN_7 -47 0x8088 //RX_FDEQ_GAIN_8 -48 0x838B //RX_FDEQ_GAIN_9 +39 0x483A //RX_FDEQ_GAIN_0 +40 0x3A3A //RX_FDEQ_GAIN_1 +41 0x4A58 //RX_FDEQ_GAIN_2 +42 0x5E6E //RX_FDEQ_GAIN_3 +43 0x7A84 //RX_FDEQ_GAIN_4 +44 0x7C7A //RX_FDEQ_GAIN_5 +45 0x7C78 //RX_FDEQ_GAIN_6 +46 0x7978 //RX_FDEQ_GAIN_7 +47 0x7A7E //RX_FDEQ_GAIN_8 +48 0x7C80 //RX_FDEQ_GAIN_9 49 0x4848 //RX_FDEQ_GAIN_10 50 0x4848 //RX_FDEQ_GAIN_11 51 0x4848 //RX_FDEQ_GAIN_12 @@ -6668,8 +9485,8 @@ 61 0x4848 //RX_FDEQ_GAIN_22 62 0x4848 //RX_FDEQ_GAIN_23 63 0x0202 //RX_FDEQ_BIN_0 -64 0x0203 //RX_FDEQ_BIN_1 -65 0x0303 //RX_FDEQ_BIN_2 +64 0x0204 //RX_FDEQ_BIN_1 +65 0x0203 //RX_FDEQ_BIN_2 66 0x0304 //RX_FDEQ_BIN_3 67 0x0405 //RX_FDEQ_BIN_4 68 0x0506 //RX_FDEQ_BIN_5 @@ -6732,26 +9549,26 @@ 113 0x0000 //RX_TDDRC_THRD_1 114 0x1800 //RX_TDDRC_THRD_2 115 0x1800 //RX_TDDRC_THRD_3 -116 0x3000 //RX_TDDRC_SLANT_0 -117 0x6E00 //RX_TDDRC_SLANT_1 +116 0x7FFF //RX_TDDRC_SLANT_0 +117 0x7FFF //RX_TDDRC_SLANT_1 118 0x1000 //RX_TDDRC_ALPHA_UP_0 119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 120 0x0000 //RX_TDDRC_HMNC_FLAG 121 0x199A //RX_TDDRC_HMNC_GAIN 122 0x0001 //RX_TDDRC_SMT_FLAG 123 0x0CCD //RX_TDDRC_SMT_W -124 0x055F //RX_TDDRC_DRC_GAIN +124 0x06EC //RX_TDDRC_DRC_GAIN 38 0x0014 //RX_FDEQ_SUBNUM -39 0x4840 //RX_FDEQ_GAIN_0 -40 0x3E3E //RX_FDEQ_GAIN_1 -41 0x4E62 //RX_FDEQ_GAIN_2 -42 0x6C7A //RX_FDEQ_GAIN_3 -43 0x8690 //RX_FDEQ_GAIN_4 -44 0x867E //RX_FDEQ_GAIN_5 -45 0x7E7E //RX_FDEQ_GAIN_6 -46 0x8080 //RX_FDEQ_GAIN_7 -47 0x8088 //RX_FDEQ_GAIN_8 -48 0x838B //RX_FDEQ_GAIN_9 +39 0x483A //RX_FDEQ_GAIN_0 +40 0x3A3A //RX_FDEQ_GAIN_1 +41 0x4A58 //RX_FDEQ_GAIN_2 +42 0x5E6E //RX_FDEQ_GAIN_3 +43 0x7A84 //RX_FDEQ_GAIN_4 +44 0x7C7A //RX_FDEQ_GAIN_5 +45 0x7C78 //RX_FDEQ_GAIN_6 +46 0x7978 //RX_FDEQ_GAIN_7 +47 0x7A7E //RX_FDEQ_GAIN_8 +48 0x7C80 //RX_FDEQ_GAIN_9 49 0x4848 //RX_FDEQ_GAIN_10 50 0x4848 //RX_FDEQ_GAIN_11 51 0x4848 //RX_FDEQ_GAIN_12 @@ -6767,8 +9584,8 @@ 61 0x4848 //RX_FDEQ_GAIN_22 62 0x4848 //RX_FDEQ_GAIN_23 63 0x0202 //RX_FDEQ_BIN_0 -64 0x0203 //RX_FDEQ_BIN_1 -65 0x0303 //RX_FDEQ_BIN_2 +64 0x0204 //RX_FDEQ_BIN_1 +65 0x0203 //RX_FDEQ_BIN_2 66 0x0304 //RX_FDEQ_BIN_3 67 0x0405 //RX_FDEQ_BIN_4 68 0x0506 //RX_FDEQ_BIN_5 @@ -6814,7 +9631,7 @@ 108 0x5333 //RX_FDDRC_SLANT_1_2 109 0x5333 //RX_FDDRC_SLANT_1_3 110 0x0000 //RX_FDDRC_RESRV_0 -129 0x004B //RX_SPK_VOL +129 0x0045 //RX_SPK_VOL 130 0x0000 //RX_VOL_RESRV_0 #VOL 5 6 0x1000 //RX_TDDRC_ALPHA_UP_1 @@ -6831,26 +9648,26 @@ 113 0x0000 //RX_TDDRC_THRD_1 114 0x1800 //RX_TDDRC_THRD_2 115 0x1800 //RX_TDDRC_THRD_3 -116 0x3000 //RX_TDDRC_SLANT_0 -117 0x6E00 //RX_TDDRC_SLANT_1 +116 0x7FFF //RX_TDDRC_SLANT_0 +117 0x7FFF //RX_TDDRC_SLANT_1 118 0x1000 //RX_TDDRC_ALPHA_UP_0 119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 120 0x0000 //RX_TDDRC_HMNC_FLAG 121 0x199A //RX_TDDRC_HMNC_GAIN 122 0x0001 //RX_TDDRC_SMT_FLAG 123 0x0CCD //RX_TDDRC_SMT_W -124 0x055F //RX_TDDRC_DRC_GAIN +124 0x06EC //RX_TDDRC_DRC_GAIN 38 0x0014 //RX_FDEQ_SUBNUM -39 0x4840 //RX_FDEQ_GAIN_0 -40 0x3E3E //RX_FDEQ_GAIN_1 -41 0x4E62 //RX_FDEQ_GAIN_2 -42 0x6C7A //RX_FDEQ_GAIN_3 -43 0x8690 //RX_FDEQ_GAIN_4 -44 0x867E //RX_FDEQ_GAIN_5 -45 0x7E7E //RX_FDEQ_GAIN_6 -46 0x8080 //RX_FDEQ_GAIN_7 -47 0x8088 //RX_FDEQ_GAIN_8 -48 0x838B //RX_FDEQ_GAIN_9 +39 0x483A //RX_FDEQ_GAIN_0 +40 0x3A3A //RX_FDEQ_GAIN_1 +41 0x4A58 //RX_FDEQ_GAIN_2 +42 0x5E6E //RX_FDEQ_GAIN_3 +43 0x7A84 //RX_FDEQ_GAIN_4 +44 0x7C7A //RX_FDEQ_GAIN_5 +45 0x7C78 //RX_FDEQ_GAIN_6 +46 0x7978 //RX_FDEQ_GAIN_7 +47 0x7A7E //RX_FDEQ_GAIN_8 +48 0x7C80 //RX_FDEQ_GAIN_9 49 0x4848 //RX_FDEQ_GAIN_10 50 0x4848 //RX_FDEQ_GAIN_11 51 0x4848 //RX_FDEQ_GAIN_12 @@ -6866,8 +9683,8 @@ 61 0x4848 //RX_FDEQ_GAIN_22 62 0x4848 //RX_FDEQ_GAIN_23 63 0x0202 //RX_FDEQ_BIN_0 -64 0x0203 //RX_FDEQ_BIN_1 -65 0x0303 //RX_FDEQ_BIN_2 +64 0x0204 //RX_FDEQ_BIN_1 +65 0x0203 //RX_FDEQ_BIN_2 66 0x0304 //RX_FDEQ_BIN_3 67 0x0405 //RX_FDEQ_BIN_4 68 0x0506 //RX_FDEQ_BIN_5 @@ -6913,7 +9730,7 @@ 108 0x5333 //RX_FDDRC_SLANT_1_2 109 0x5333 //RX_FDDRC_SLANT_1_3 110 0x0000 //RX_FDDRC_RESRV_0 -129 0x007B //RX_SPK_VOL +129 0x0074 //RX_SPK_VOL 130 0x0000 //RX_VOL_RESRV_0 #VOL 6 6 0x1000 //RX_TDDRC_ALPHA_UP_1 @@ -6930,26 +9747,26 @@ 113 0x0000 //RX_TDDRC_THRD_1 114 0x1800 //RX_TDDRC_THRD_2 115 0x1800 //RX_TDDRC_THRD_3 -116 0x3000 //RX_TDDRC_SLANT_0 -117 0x6E00 //RX_TDDRC_SLANT_1 +116 0x7FFF //RX_TDDRC_SLANT_0 +117 0x7FFF //RX_TDDRC_SLANT_1 118 0x1000 //RX_TDDRC_ALPHA_UP_0 119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 120 0x0000 //RX_TDDRC_HMNC_FLAG 121 0x199A //RX_TDDRC_HMNC_GAIN 122 0x0001 //RX_TDDRC_SMT_FLAG 123 0x0CCD //RX_TDDRC_SMT_W -124 0x055F //RX_TDDRC_DRC_GAIN +124 0x06EC //RX_TDDRC_DRC_GAIN 38 0x0014 //RX_FDEQ_SUBNUM -39 0x4840 //RX_FDEQ_GAIN_0 -40 0x3E3E //RX_FDEQ_GAIN_1 -41 0x4E62 //RX_FDEQ_GAIN_2 -42 0x6C7A //RX_FDEQ_GAIN_3 -43 0x8690 //RX_FDEQ_GAIN_4 -44 0x867E //RX_FDEQ_GAIN_5 -45 0x7E7E //RX_FDEQ_GAIN_6 -46 0x8080 //RX_FDEQ_GAIN_7 -47 0x8088 //RX_FDEQ_GAIN_8 -48 0x838B //RX_FDEQ_GAIN_9 +39 0x483A //RX_FDEQ_GAIN_0 +40 0x3A3A //RX_FDEQ_GAIN_1 +41 0x4A58 //RX_FDEQ_GAIN_2 +42 0x5E6E //RX_FDEQ_GAIN_3 +43 0x7A84 //RX_FDEQ_GAIN_4 +44 0x7C7A //RX_FDEQ_GAIN_5 +45 0x7C78 //RX_FDEQ_GAIN_6 +46 0x7978 //RX_FDEQ_GAIN_7 +47 0x7A7E //RX_FDEQ_GAIN_8 +48 0x7C80 //RX_FDEQ_GAIN_9 49 0x4848 //RX_FDEQ_GAIN_10 50 0x4848 //RX_FDEQ_GAIN_11 51 0x4848 //RX_FDEQ_GAIN_12 @@ -6965,8 +9782,8 @@ 61 0x4848 //RX_FDEQ_GAIN_22 62 0x4848 //RX_FDEQ_GAIN_23 63 0x0202 //RX_FDEQ_BIN_0 -64 0x0203 //RX_FDEQ_BIN_1 -65 0x0303 //RX_FDEQ_BIN_2 +64 0x0204 //RX_FDEQ_BIN_1 +65 0x0203 //RX_FDEQ_BIN_2 66 0x0304 //RX_FDEQ_BIN_3 67 0x0405 //RX_FDEQ_BIN_4 68 0x0506 //RX_FDEQ_BIN_5 @@ -7014,10 +9831,862 @@ 110 0x0000 //RX_FDDRC_RESRV_0 129 0x0100 //RX_SPK_VOL 130 0x0000 //RX_VOL_RESRV_0 +#RX 2 +157 0x003C //RX_RECVFUNC_MODE_0 +158 0x0000 //RX_RECVFUNC_MODE_1 +159 0x0000 //RX_SAMPLINGFREQ_SIG +160 0x0000 //RX_SAMPLINGFREQ_PROC +161 0x000A //RX_FRAME_SZ +162 0x0000 //RX_DELAY_OPT +163 0x1000 //RX_TDDRC_ALPHA_UP_1 +164 0x1000 //RX_TDDRC_ALPHA_UP_2 +165 0x1000 //RX_TDDRC_ALPHA_UP_3 +166 0x1000 //RX_TDDRC_ALPHA_UP_4 +167 0x0600 //RX_PGA +168 0x7FFF //RX_A_HP +169 0x4000 //RX_B_PE +170 0x7800 //RX_THR_PITCH_DET_0 +171 0x7000 //RX_THR_PITCH_DET_1 +172 0x6000 //RX_THR_PITCH_DET_2 +173 0x0008 //RX_PITCH_BFR_LEN +174 0x0003 //RX_SBD_PITCH_DET +175 0x0100 //RX_PP_RESRV_0 +176 0x0020 //RX_PP_RESRV_1 +177 0x0400 //RX_N_SN_EST +178 0x000C //RX_N2_SN_EST +179 0x0014 //RX_NS_LVL_CTRL +180 0xF800 //RX_THR_SN_EST +181 0x7E00 //RX_LAMBDA_PFILT +182 0x000A //RX_FENS_RESRV_0 +183 0x0190 //RX_FENS_RESRV_1 +184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +187 0x0002 //RX_EXTRA_NS_L +188 0x0800 //RX_EXTRA_NS_A +189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +190 0x7000 //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +192 0x199A //RX_A_POST_FLT +193 0x0000 //RX_LMT_THRD +194 0x4000 //RX_LMT_ALPHA +195 0x0014 //RX_FDEQ_SUBNUM +196 0x4840 //RX_FDEQ_GAIN_0 +197 0x3E3E //RX_FDEQ_GAIN_1 +198 0x4E62 //RX_FDEQ_GAIN_2 +199 0x6C7A //RX_FDEQ_GAIN_3 +200 0x8690 //RX_FDEQ_GAIN_4 +201 0x867E //RX_FDEQ_GAIN_5 +202 0x7E7E //RX_FDEQ_GAIN_6 +203 0x8080 //RX_FDEQ_GAIN_7 +204 0x8088 //RX_FDEQ_GAIN_8 +205 0x838B //RX_FDEQ_GAIN_9 +206 0x4848 //RX_FDEQ_GAIN_10 +207 0x4848 //RX_FDEQ_GAIN_11 +208 0x4848 //RX_FDEQ_GAIN_12 +209 0x4848 //RX_FDEQ_GAIN_13 +210 0x4848 //RX_FDEQ_GAIN_14 +211 0x4848 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0202 //RX_FDEQ_BIN_0 +221 0x0203 //RX_FDEQ_BIN_1 +222 0x0303 //RX_FDEQ_BIN_2 +223 0x0304 //RX_FDEQ_BIN_3 +224 0x0405 //RX_FDEQ_BIN_4 +225 0x0506 //RX_FDEQ_BIN_5 +226 0x0708 //RX_FDEQ_BIN_6 +227 0x090A //RX_FDEQ_BIN_7 +228 0x0B0C //RX_FDEQ_BIN_8 +229 0x0D08 //RX_FDEQ_BIN_9 +230 0x0000 //RX_FDEQ_BIN_10 +231 0x0000 //RX_FDEQ_BIN_11 +232 0x0000 //RX_FDEQ_BIN_12 +233 0x0000 //RX_FDEQ_BIN_13 +234 0x0000 //RX_FDEQ_BIN_14 +235 0x0000 //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x4000 //RX_FDEQ_RESRV_0 +245 0x0320 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0030 //RX_FDDRC_BAND_MARGIN_1 +248 0x0050 //RX_FDDRC_BAND_MARGIN_2 +249 0x0080 //RX_FDDRC_BAND_MARGIN_3 +250 0x0007 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x5000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x6400 //RX_FDDRC_THRD_3_2 +258 0x6400 //RX_FDDRC_THRD_3_3 +259 0x2000 //RX_FDDRC_SLANT_0_0 +260 0x2000 //RX_FDDRC_SLANT_0_1 +261 0x2000 //RX_FDDRC_SLANT_0_2 +262 0x2000 //RX_FDDRC_SLANT_0_3 +263 0x5333 //RX_FDDRC_SLANT_1_0 +264 0x5333 //RX_FDDRC_SLANT_1_1 +265 0x5333 //RX_FDDRC_SLANT_1_2 +266 0x5333 //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +268 0x0002 //RX_FILTINDX +269 0x0000 //RX_TDDRC_THRD_0 +270 0x0000 //RX_TDDRC_THRD_1 +271 0x1800 //RX_TDDRC_THRD_2 +272 0x1800 //RX_TDDRC_THRD_3 +273 0x3000 //RX_TDDRC_SLANT_0 +274 0x6E00 //RX_TDDRC_SLANT_1 +275 0x1000 //RX_TDDRC_ALPHA_UP_0 +276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x199A //RX_TDDRC_HMNC_GAIN +279 0x0001 //RX_TDDRC_SMT_FLAG +280 0x0CCD //RX_TDDRC_SMT_W +281 0x05A0 //RX_TDDRC_DRC_GAIN +282 0x7C00 //RX_LAMBDA_PKA_FP +283 0x13E0 //RX_TPKA_FP +284 0x0080 //RX_MIN_G_FP +285 0x2000 //RX_MAX_G_FP +286 0x000A //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 +288 0x0000 //RX_MAXLEVEL_CNG +289 0x3000 //RX_BWE_UV_TH +290 0x3000 //RX_BWE_UV_TH2 +291 0x1800 //RX_BWE_UV_TH3 +292 0x1000 //RX_BWE_V_TH +293 0x04CD //RX_BWE_GAIN1_V_TH1 +294 0x0F33 //RX_BWE_GAIN1_V_TH2 +295 0x7333 //RX_BWE_UV_EQ +296 0x199A //RX_BWE_V_EQ +297 0x7333 //RX_BWE_TONE_TH +298 0x0004 //RX_BWE_UV_HOLD_T +299 0x6CCD //RX_BWE_GAIN2_ALPHA +300 0x799A //RX_BWE_GAIN3_ALPHA +301 0x001E //RX_BWE_CUTOFF +302 0x3000 //RX_BWE_GAINFILL +303 0x3200 //RX_BWE_MAXTH_TONE +304 0x2000 //RX_BWE_EQ_0 +305 0x2000 //RX_BWE_EQ_1 +306 0x2000 //RX_BWE_EQ_2 +307 0x2000 //RX_BWE_EQ_3 +308 0x2000 //RX_BWE_EQ_4 +309 0x2000 //RX_BWE_EQ_5 +310 0x2000 //RX_BWE_EQ_6 +311 0x0000 //RX_BWE_RESRV_0 +312 0x0000 //RX_BWE_RESRV_1 +313 0x0000 //RX_BWE_RESRV_2 +#VOL 0 +163 0x1000 //RX_TDDRC_ALPHA_UP_1 +164 0x1000 //RX_TDDRC_ALPHA_UP_2 +165 0x1000 //RX_TDDRC_ALPHA_UP_3 +166 0x1000 //RX_TDDRC_ALPHA_UP_4 +184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +190 0x7000 //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +269 0x0000 //RX_TDDRC_THRD_0 +270 0x0000 //RX_TDDRC_THRD_1 +271 0x1800 //RX_TDDRC_THRD_2 +272 0x1800 //RX_TDDRC_THRD_3 +273 0x3000 //RX_TDDRC_SLANT_0 +274 0x6E00 //RX_TDDRC_SLANT_1 +275 0x1000 //RX_TDDRC_ALPHA_UP_0 +276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x199A //RX_TDDRC_HMNC_GAIN +279 0x0001 //RX_TDDRC_SMT_FLAG +280 0x0CCD //RX_TDDRC_SMT_W +281 0x05A0 //RX_TDDRC_DRC_GAIN +195 0x0014 //RX_FDEQ_SUBNUM +196 0x4840 //RX_FDEQ_GAIN_0 +197 0x3E3E //RX_FDEQ_GAIN_1 +198 0x4E62 //RX_FDEQ_GAIN_2 +199 0x6C7A //RX_FDEQ_GAIN_3 +200 0x8690 //RX_FDEQ_GAIN_4 +201 0x867E //RX_FDEQ_GAIN_5 +202 0x7E7E //RX_FDEQ_GAIN_6 +203 0x8080 //RX_FDEQ_GAIN_7 +204 0x8088 //RX_FDEQ_GAIN_8 +205 0x838B //RX_FDEQ_GAIN_9 +206 0x4848 //RX_FDEQ_GAIN_10 +207 0x4848 //RX_FDEQ_GAIN_11 +208 0x4848 //RX_FDEQ_GAIN_12 +209 0x4848 //RX_FDEQ_GAIN_13 +210 0x4848 //RX_FDEQ_GAIN_14 +211 0x4848 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0202 //RX_FDEQ_BIN_0 +221 0x0203 //RX_FDEQ_BIN_1 +222 0x0303 //RX_FDEQ_BIN_2 +223 0x0304 //RX_FDEQ_BIN_3 +224 0x0405 //RX_FDEQ_BIN_4 +225 0x0506 //RX_FDEQ_BIN_5 +226 0x0708 //RX_FDEQ_BIN_6 +227 0x090A //RX_FDEQ_BIN_7 +228 0x0B0C //RX_FDEQ_BIN_8 +229 0x0D08 //RX_FDEQ_BIN_9 +230 0x0000 //RX_FDEQ_BIN_10 +231 0x0000 //RX_FDEQ_BIN_11 +232 0x0000 //RX_FDEQ_BIN_12 +233 0x0000 //RX_FDEQ_BIN_13 +234 0x0000 //RX_FDEQ_BIN_14 +235 0x0000 //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x4000 //RX_FDEQ_RESRV_0 +245 0x0320 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0030 //RX_FDDRC_BAND_MARGIN_1 +248 0x0050 //RX_FDDRC_BAND_MARGIN_2 +249 0x0080 //RX_FDDRC_BAND_MARGIN_3 +250 0x0007 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x5000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x6400 //RX_FDDRC_THRD_3_2 +258 0x6400 //RX_FDDRC_THRD_3_3 +259 0x2000 //RX_FDDRC_SLANT_0_0 +260 0x2000 //RX_FDDRC_SLANT_0_1 +261 0x2000 //RX_FDDRC_SLANT_0_2 +262 0x2000 //RX_FDDRC_SLANT_0_3 +263 0x5333 //RX_FDDRC_SLANT_1_0 +264 0x5333 //RX_FDDRC_SLANT_1_1 +265 0x5333 //RX_FDDRC_SLANT_1_2 +266 0x5333 //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +286 0x000A //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 +#VOL 1 +163 0x1000 //RX_TDDRC_ALPHA_UP_1 +164 0x1000 //RX_TDDRC_ALPHA_UP_2 +165 0x1000 //RX_TDDRC_ALPHA_UP_3 +166 0x1000 //RX_TDDRC_ALPHA_UP_4 +184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +190 0x7000 //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +269 0x0000 //RX_TDDRC_THRD_0 +270 0x0000 //RX_TDDRC_THRD_1 +271 0x1800 //RX_TDDRC_THRD_2 +272 0x1800 //RX_TDDRC_THRD_3 +273 0x3000 //RX_TDDRC_SLANT_0 +274 0x6E00 //RX_TDDRC_SLANT_1 +275 0x1000 //RX_TDDRC_ALPHA_UP_0 +276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x199A //RX_TDDRC_HMNC_GAIN +279 0x0001 //RX_TDDRC_SMT_FLAG +280 0x0CCD //RX_TDDRC_SMT_W +281 0x055F //RX_TDDRC_DRC_GAIN +195 0x0014 //RX_FDEQ_SUBNUM +196 0x4840 //RX_FDEQ_GAIN_0 +197 0x3E3E //RX_FDEQ_GAIN_1 +198 0x4E62 //RX_FDEQ_GAIN_2 +199 0x6C7A //RX_FDEQ_GAIN_3 +200 0x8690 //RX_FDEQ_GAIN_4 +201 0x867E //RX_FDEQ_GAIN_5 +202 0x7E7E //RX_FDEQ_GAIN_6 +203 0x8080 //RX_FDEQ_GAIN_7 +204 0x8088 //RX_FDEQ_GAIN_8 +205 0x838B //RX_FDEQ_GAIN_9 +206 0x4848 //RX_FDEQ_GAIN_10 +207 0x4848 //RX_FDEQ_GAIN_11 +208 0x4848 //RX_FDEQ_GAIN_12 +209 0x4848 //RX_FDEQ_GAIN_13 +210 0x4848 //RX_FDEQ_GAIN_14 +211 0x4848 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0202 //RX_FDEQ_BIN_0 +221 0x0203 //RX_FDEQ_BIN_1 +222 0x0303 //RX_FDEQ_BIN_2 +223 0x0304 //RX_FDEQ_BIN_3 +224 0x0405 //RX_FDEQ_BIN_4 +225 0x0506 //RX_FDEQ_BIN_5 +226 0x0708 //RX_FDEQ_BIN_6 +227 0x090A //RX_FDEQ_BIN_7 +228 0x0B0C //RX_FDEQ_BIN_8 +229 0x0D08 //RX_FDEQ_BIN_9 +230 0x0000 //RX_FDEQ_BIN_10 +231 0x0000 //RX_FDEQ_BIN_11 +232 0x0000 //RX_FDEQ_BIN_12 +233 0x0000 //RX_FDEQ_BIN_13 +234 0x0000 //RX_FDEQ_BIN_14 +235 0x0000 //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x4000 //RX_FDEQ_RESRV_0 +245 0x0320 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0030 //RX_FDDRC_BAND_MARGIN_1 +248 0x0050 //RX_FDDRC_BAND_MARGIN_2 +249 0x0080 //RX_FDDRC_BAND_MARGIN_3 +250 0x0007 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x5000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x6400 //RX_FDDRC_THRD_3_2 +258 0x6400 //RX_FDDRC_THRD_3_3 +259 0x2000 //RX_FDDRC_SLANT_0_0 +260 0x2000 //RX_FDDRC_SLANT_0_1 +261 0x2000 //RX_FDDRC_SLANT_0_2 +262 0x2000 //RX_FDDRC_SLANT_0_3 +263 0x5333 //RX_FDDRC_SLANT_1_0 +264 0x5333 //RX_FDDRC_SLANT_1_1 +265 0x5333 //RX_FDDRC_SLANT_1_2 +266 0x5333 //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +286 0x0011 //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 +#VOL 2 +163 0x1000 //RX_TDDRC_ALPHA_UP_1 +164 0x1000 //RX_TDDRC_ALPHA_UP_2 +165 0x1000 //RX_TDDRC_ALPHA_UP_3 +166 0x1000 //RX_TDDRC_ALPHA_UP_4 +184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +190 0x7000 //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +269 0x0000 //RX_TDDRC_THRD_0 +270 0x0000 //RX_TDDRC_THRD_1 +271 0x1800 //RX_TDDRC_THRD_2 +272 0x1800 //RX_TDDRC_THRD_3 +273 0x3000 //RX_TDDRC_SLANT_0 +274 0x6E00 //RX_TDDRC_SLANT_1 +275 0x1000 //RX_TDDRC_ALPHA_UP_0 +276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x199A //RX_TDDRC_HMNC_GAIN +279 0x0001 //RX_TDDRC_SMT_FLAG +280 0x0CCD //RX_TDDRC_SMT_W +281 0x055F //RX_TDDRC_DRC_GAIN +195 0x0014 //RX_FDEQ_SUBNUM +196 0x4840 //RX_FDEQ_GAIN_0 +197 0x3E3E //RX_FDEQ_GAIN_1 +198 0x4E62 //RX_FDEQ_GAIN_2 +199 0x6C7A //RX_FDEQ_GAIN_3 +200 0x8690 //RX_FDEQ_GAIN_4 +201 0x867E //RX_FDEQ_GAIN_5 +202 0x7E7E //RX_FDEQ_GAIN_6 +203 0x8080 //RX_FDEQ_GAIN_7 +204 0x8088 //RX_FDEQ_GAIN_8 +205 0x838B //RX_FDEQ_GAIN_9 +206 0x4848 //RX_FDEQ_GAIN_10 +207 0x4848 //RX_FDEQ_GAIN_11 +208 0x4848 //RX_FDEQ_GAIN_12 +209 0x4848 //RX_FDEQ_GAIN_13 +210 0x4848 //RX_FDEQ_GAIN_14 +211 0x4848 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0202 //RX_FDEQ_BIN_0 +221 0x0203 //RX_FDEQ_BIN_1 +222 0x0303 //RX_FDEQ_BIN_2 +223 0x0304 //RX_FDEQ_BIN_3 +224 0x0405 //RX_FDEQ_BIN_4 +225 0x0506 //RX_FDEQ_BIN_5 +226 0x0708 //RX_FDEQ_BIN_6 +227 0x090A //RX_FDEQ_BIN_7 +228 0x0B0C //RX_FDEQ_BIN_8 +229 0x0D08 //RX_FDEQ_BIN_9 +230 0x0000 //RX_FDEQ_BIN_10 +231 0x0000 //RX_FDEQ_BIN_11 +232 0x0000 //RX_FDEQ_BIN_12 +233 0x0000 //RX_FDEQ_BIN_13 +234 0x0000 //RX_FDEQ_BIN_14 +235 0x0000 //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x4000 //RX_FDEQ_RESRV_0 +245 0x0320 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0030 //RX_FDDRC_BAND_MARGIN_1 +248 0x0050 //RX_FDDRC_BAND_MARGIN_2 +249 0x0080 //RX_FDDRC_BAND_MARGIN_3 +250 0x0007 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x5000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x6400 //RX_FDDRC_THRD_3_2 +258 0x6400 //RX_FDDRC_THRD_3_3 +259 0x2000 //RX_FDDRC_SLANT_0_0 +260 0x2000 //RX_FDDRC_SLANT_0_1 +261 0x2000 //RX_FDDRC_SLANT_0_2 +262 0x2000 //RX_FDDRC_SLANT_0_3 +263 0x5333 //RX_FDDRC_SLANT_1_0 +264 0x5333 //RX_FDDRC_SLANT_1_1 +265 0x5333 //RX_FDDRC_SLANT_1_2 +266 0x5333 //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +286 0x001C //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 +#VOL 3 +163 0x1000 //RX_TDDRC_ALPHA_UP_1 +164 0x1000 //RX_TDDRC_ALPHA_UP_2 +165 0x1000 //RX_TDDRC_ALPHA_UP_3 +166 0x1000 //RX_TDDRC_ALPHA_UP_4 +184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +190 0x7000 //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +269 0x0000 //RX_TDDRC_THRD_0 +270 0x0000 //RX_TDDRC_THRD_1 +271 0x1800 //RX_TDDRC_THRD_2 +272 0x1800 //RX_TDDRC_THRD_3 +273 0x3000 //RX_TDDRC_SLANT_0 +274 0x6E00 //RX_TDDRC_SLANT_1 +275 0x1000 //RX_TDDRC_ALPHA_UP_0 +276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x199A //RX_TDDRC_HMNC_GAIN +279 0x0001 //RX_TDDRC_SMT_FLAG +280 0x0CCD //RX_TDDRC_SMT_W +281 0x055F //RX_TDDRC_DRC_GAIN +195 0x0014 //RX_FDEQ_SUBNUM +196 0x4840 //RX_FDEQ_GAIN_0 +197 0x3E3E //RX_FDEQ_GAIN_1 +198 0x4E62 //RX_FDEQ_GAIN_2 +199 0x6C7A //RX_FDEQ_GAIN_3 +200 0x8690 //RX_FDEQ_GAIN_4 +201 0x867E //RX_FDEQ_GAIN_5 +202 0x7E7E //RX_FDEQ_GAIN_6 +203 0x8080 //RX_FDEQ_GAIN_7 +204 0x8088 //RX_FDEQ_GAIN_8 +205 0x838B //RX_FDEQ_GAIN_9 +206 0x4848 //RX_FDEQ_GAIN_10 +207 0x4848 //RX_FDEQ_GAIN_11 +208 0x4848 //RX_FDEQ_GAIN_12 +209 0x4848 //RX_FDEQ_GAIN_13 +210 0x4848 //RX_FDEQ_GAIN_14 +211 0x4848 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0202 //RX_FDEQ_BIN_0 +221 0x0203 //RX_FDEQ_BIN_1 +222 0x0303 //RX_FDEQ_BIN_2 +223 0x0304 //RX_FDEQ_BIN_3 +224 0x0405 //RX_FDEQ_BIN_4 +225 0x0506 //RX_FDEQ_BIN_5 +226 0x0708 //RX_FDEQ_BIN_6 +227 0x090A //RX_FDEQ_BIN_7 +228 0x0B0C //RX_FDEQ_BIN_8 +229 0x0D08 //RX_FDEQ_BIN_9 +230 0x0000 //RX_FDEQ_BIN_10 +231 0x0000 //RX_FDEQ_BIN_11 +232 0x0000 //RX_FDEQ_BIN_12 +233 0x0000 //RX_FDEQ_BIN_13 +234 0x0000 //RX_FDEQ_BIN_14 +235 0x0000 //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x4000 //RX_FDEQ_RESRV_0 +245 0x0320 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0030 //RX_FDDRC_BAND_MARGIN_1 +248 0x0050 //RX_FDDRC_BAND_MARGIN_2 +249 0x0080 //RX_FDDRC_BAND_MARGIN_3 +250 0x0007 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x5000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x6400 //RX_FDDRC_THRD_3_2 +258 0x6400 //RX_FDDRC_THRD_3_3 +259 0x2000 //RX_FDDRC_SLANT_0_0 +260 0x2000 //RX_FDDRC_SLANT_0_1 +261 0x2000 //RX_FDDRC_SLANT_0_2 +262 0x2000 //RX_FDDRC_SLANT_0_3 +263 0x5333 //RX_FDDRC_SLANT_1_0 +264 0x5333 //RX_FDDRC_SLANT_1_1 +265 0x5333 //RX_FDDRC_SLANT_1_2 +266 0x5333 //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +286 0x002E //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 +#VOL 4 +163 0x1000 //RX_TDDRC_ALPHA_UP_1 +164 0x1000 //RX_TDDRC_ALPHA_UP_2 +165 0x1000 //RX_TDDRC_ALPHA_UP_3 +166 0x1000 //RX_TDDRC_ALPHA_UP_4 +184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +190 0x7000 //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +269 0x0000 //RX_TDDRC_THRD_0 +270 0x0000 //RX_TDDRC_THRD_1 +271 0x1800 //RX_TDDRC_THRD_2 +272 0x1800 //RX_TDDRC_THRD_3 +273 0x3000 //RX_TDDRC_SLANT_0 +274 0x6E00 //RX_TDDRC_SLANT_1 +275 0x1000 //RX_TDDRC_ALPHA_UP_0 +276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x199A //RX_TDDRC_HMNC_GAIN +279 0x0001 //RX_TDDRC_SMT_FLAG +280 0x0CCD //RX_TDDRC_SMT_W +281 0x055F //RX_TDDRC_DRC_GAIN +195 0x0014 //RX_FDEQ_SUBNUM +196 0x4840 //RX_FDEQ_GAIN_0 +197 0x3E3E //RX_FDEQ_GAIN_1 +198 0x4E62 //RX_FDEQ_GAIN_2 +199 0x6C7A //RX_FDEQ_GAIN_3 +200 0x8690 //RX_FDEQ_GAIN_4 +201 0x867E //RX_FDEQ_GAIN_5 +202 0x7E7E //RX_FDEQ_GAIN_6 +203 0x8080 //RX_FDEQ_GAIN_7 +204 0x8088 //RX_FDEQ_GAIN_8 +205 0x838B //RX_FDEQ_GAIN_9 +206 0x4848 //RX_FDEQ_GAIN_10 +207 0x4848 //RX_FDEQ_GAIN_11 +208 0x4848 //RX_FDEQ_GAIN_12 +209 0x4848 //RX_FDEQ_GAIN_13 +210 0x4848 //RX_FDEQ_GAIN_14 +211 0x4848 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0202 //RX_FDEQ_BIN_0 +221 0x0203 //RX_FDEQ_BIN_1 +222 0x0303 //RX_FDEQ_BIN_2 +223 0x0304 //RX_FDEQ_BIN_3 +224 0x0405 //RX_FDEQ_BIN_4 +225 0x0506 //RX_FDEQ_BIN_5 +226 0x0708 //RX_FDEQ_BIN_6 +227 0x090A //RX_FDEQ_BIN_7 +228 0x0B0C //RX_FDEQ_BIN_8 +229 0x0D08 //RX_FDEQ_BIN_9 +230 0x0000 //RX_FDEQ_BIN_10 +231 0x0000 //RX_FDEQ_BIN_11 +232 0x0000 //RX_FDEQ_BIN_12 +233 0x0000 //RX_FDEQ_BIN_13 +234 0x0000 //RX_FDEQ_BIN_14 +235 0x0000 //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x4000 //RX_FDEQ_RESRV_0 +245 0x0320 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0030 //RX_FDDRC_BAND_MARGIN_1 +248 0x0050 //RX_FDDRC_BAND_MARGIN_2 +249 0x0080 //RX_FDDRC_BAND_MARGIN_3 +250 0x0007 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x5000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x6400 //RX_FDDRC_THRD_3_2 +258 0x6400 //RX_FDDRC_THRD_3_3 +259 0x2000 //RX_FDDRC_SLANT_0_0 +260 0x2000 //RX_FDDRC_SLANT_0_1 +261 0x2000 //RX_FDDRC_SLANT_0_2 +262 0x2000 //RX_FDDRC_SLANT_0_3 +263 0x5333 //RX_FDDRC_SLANT_1_0 +264 0x5333 //RX_FDDRC_SLANT_1_1 +265 0x5333 //RX_FDDRC_SLANT_1_2 +266 0x5333 //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +286 0x004B //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 +#VOL 5 +163 0x1000 //RX_TDDRC_ALPHA_UP_1 +164 0x1000 //RX_TDDRC_ALPHA_UP_2 +165 0x1000 //RX_TDDRC_ALPHA_UP_3 +166 0x1000 //RX_TDDRC_ALPHA_UP_4 +184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +190 0x7000 //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +269 0x0000 //RX_TDDRC_THRD_0 +270 0x0000 //RX_TDDRC_THRD_1 +271 0x1800 //RX_TDDRC_THRD_2 +272 0x1800 //RX_TDDRC_THRD_3 +273 0x3000 //RX_TDDRC_SLANT_0 +274 0x6E00 //RX_TDDRC_SLANT_1 +275 0x1000 //RX_TDDRC_ALPHA_UP_0 +276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x199A //RX_TDDRC_HMNC_GAIN +279 0x0001 //RX_TDDRC_SMT_FLAG +280 0x0CCD //RX_TDDRC_SMT_W +281 0x055F //RX_TDDRC_DRC_GAIN +195 0x0014 //RX_FDEQ_SUBNUM +196 0x4840 //RX_FDEQ_GAIN_0 +197 0x3E3E //RX_FDEQ_GAIN_1 +198 0x4E62 //RX_FDEQ_GAIN_2 +199 0x6C7A //RX_FDEQ_GAIN_3 +200 0x8690 //RX_FDEQ_GAIN_4 +201 0x867E //RX_FDEQ_GAIN_5 +202 0x7E7E //RX_FDEQ_GAIN_6 +203 0x8080 //RX_FDEQ_GAIN_7 +204 0x8088 //RX_FDEQ_GAIN_8 +205 0x838B //RX_FDEQ_GAIN_9 +206 0x4848 //RX_FDEQ_GAIN_10 +207 0x4848 //RX_FDEQ_GAIN_11 +208 0x4848 //RX_FDEQ_GAIN_12 +209 0x4848 //RX_FDEQ_GAIN_13 +210 0x4848 //RX_FDEQ_GAIN_14 +211 0x4848 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0202 //RX_FDEQ_BIN_0 +221 0x0203 //RX_FDEQ_BIN_1 +222 0x0303 //RX_FDEQ_BIN_2 +223 0x0304 //RX_FDEQ_BIN_3 +224 0x0405 //RX_FDEQ_BIN_4 +225 0x0506 //RX_FDEQ_BIN_5 +226 0x0708 //RX_FDEQ_BIN_6 +227 0x090A //RX_FDEQ_BIN_7 +228 0x0B0C //RX_FDEQ_BIN_8 +229 0x0D08 //RX_FDEQ_BIN_9 +230 0x0000 //RX_FDEQ_BIN_10 +231 0x0000 //RX_FDEQ_BIN_11 +232 0x0000 //RX_FDEQ_BIN_12 +233 0x0000 //RX_FDEQ_BIN_13 +234 0x0000 //RX_FDEQ_BIN_14 +235 0x0000 //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x4000 //RX_FDEQ_RESRV_0 +245 0x0320 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0030 //RX_FDDRC_BAND_MARGIN_1 +248 0x0050 //RX_FDDRC_BAND_MARGIN_2 +249 0x0080 //RX_FDDRC_BAND_MARGIN_3 +250 0x0007 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x5000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x6400 //RX_FDDRC_THRD_3_2 +258 0x6400 //RX_FDDRC_THRD_3_3 +259 0x2000 //RX_FDDRC_SLANT_0_0 +260 0x2000 //RX_FDDRC_SLANT_0_1 +261 0x2000 //RX_FDDRC_SLANT_0_2 +262 0x2000 //RX_FDDRC_SLANT_0_3 +263 0x5333 //RX_FDDRC_SLANT_1_0 +264 0x5333 //RX_FDDRC_SLANT_1_1 +265 0x5333 //RX_FDDRC_SLANT_1_2 +266 0x5333 //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +286 0x007B //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 +#VOL 6 +163 0x1000 //RX_TDDRC_ALPHA_UP_1 +164 0x1000 //RX_TDDRC_ALPHA_UP_2 +165 0x1000 //RX_TDDRC_ALPHA_UP_3 +166 0x1000 //RX_TDDRC_ALPHA_UP_4 +184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +190 0x7000 //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +269 0x0000 //RX_TDDRC_THRD_0 +270 0x0000 //RX_TDDRC_THRD_1 +271 0x1800 //RX_TDDRC_THRD_2 +272 0x1800 //RX_TDDRC_THRD_3 +273 0x3000 //RX_TDDRC_SLANT_0 +274 0x6E00 //RX_TDDRC_SLANT_1 +275 0x1000 //RX_TDDRC_ALPHA_UP_0 +276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x199A //RX_TDDRC_HMNC_GAIN +279 0x0001 //RX_TDDRC_SMT_FLAG +280 0x0CCD //RX_TDDRC_SMT_W +281 0x055F //RX_TDDRC_DRC_GAIN +195 0x0014 //RX_FDEQ_SUBNUM +196 0x4840 //RX_FDEQ_GAIN_0 +197 0x3E3E //RX_FDEQ_GAIN_1 +198 0x4E62 //RX_FDEQ_GAIN_2 +199 0x6C7A //RX_FDEQ_GAIN_3 +200 0x8690 //RX_FDEQ_GAIN_4 +201 0x867E //RX_FDEQ_GAIN_5 +202 0x7E7E //RX_FDEQ_GAIN_6 +203 0x8080 //RX_FDEQ_GAIN_7 +204 0x8088 //RX_FDEQ_GAIN_8 +205 0x838B //RX_FDEQ_GAIN_9 +206 0x4848 //RX_FDEQ_GAIN_10 +207 0x4848 //RX_FDEQ_GAIN_11 +208 0x4848 //RX_FDEQ_GAIN_12 +209 0x4848 //RX_FDEQ_GAIN_13 +210 0x4848 //RX_FDEQ_GAIN_14 +211 0x4848 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0202 //RX_FDEQ_BIN_0 +221 0x0203 //RX_FDEQ_BIN_1 +222 0x0303 //RX_FDEQ_BIN_2 +223 0x0304 //RX_FDEQ_BIN_3 +224 0x0405 //RX_FDEQ_BIN_4 +225 0x0506 //RX_FDEQ_BIN_5 +226 0x0708 //RX_FDEQ_BIN_6 +227 0x090A //RX_FDEQ_BIN_7 +228 0x0B0C //RX_FDEQ_BIN_8 +229 0x0D08 //RX_FDEQ_BIN_9 +230 0x0000 //RX_FDEQ_BIN_10 +231 0x0000 //RX_FDEQ_BIN_11 +232 0x0000 //RX_FDEQ_BIN_12 +233 0x0000 //RX_FDEQ_BIN_13 +234 0x0000 //RX_FDEQ_BIN_14 +235 0x0000 //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x4000 //RX_FDEQ_RESRV_0 +245 0x0320 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0030 //RX_FDDRC_BAND_MARGIN_1 +248 0x0050 //RX_FDDRC_BAND_MARGIN_2 +249 0x0080 //RX_FDDRC_BAND_MARGIN_3 +250 0x0007 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x5000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x6400 //RX_FDDRC_THRD_3_2 +258 0x6400 //RX_FDDRC_THRD_3_3 +259 0x2000 //RX_FDDRC_SLANT_0_0 +260 0x2000 //RX_FDDRC_SLANT_0_1 +261 0x2000 //RX_FDDRC_SLANT_0_2 +262 0x2000 //RX_FDDRC_SLANT_0_3 +263 0x5333 //RX_FDDRC_SLANT_1_0 +264 0x5333 //RX_FDDRC_SLANT_1_1 +265 0x5333 //RX_FDDRC_SLANT_1_2 +266 0x5333 //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +286 0x0100 //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 #CASE_NAME HANDSET-HANDSET-VOICE_GENERIC-WB -#PARAM_TYPE TX+RX -#TOTAL_CUSTOM_STEP 7 +#PARAM_MODE Full +#PARAM_TYPE TX+2RX +#TOTAL_CUSTOM_STEP 7+7 #TX 0 0x0000 //TX_OPERATION_MODE_0 1 0x0000 //TX_OPERATION_MODE_1 @@ -7040,7 +10709,7 @@ 18 0x0000 //TX_SYS_RESRV_2 19 0x0000 //TX_SYS_RESRV_3 20 0x0000 //TX_DIST2REF0 -21 0x009D //TX_DIST2REF1 +21 0x009C //TX_DIST2REF1 22 0x0000 //TX_DIST2REF_02 23 0x0000 //TX_DIST2REF_03 24 0x0000 //TX_DIST2REF_04 @@ -7270,16 +10939,16 @@ 248 0xF800 //TX_THR_SN_EST_6 249 0xF700 //TX_THR_SN_EST_7 250 0x0000 //TX_DELTA_THR_SN_EST_0 -251 0x0100 //TX_DELTA_THR_SN_EST_1 -252 0x01A0 //TX_DELTA_THR_SN_EST_2 +251 0x01A0 //TX_DELTA_THR_SN_EST_1 +252 0x0200 //TX_DELTA_THR_SN_EST_2 253 0x0200 //TX_DELTA_THR_SN_EST_3 -254 0x0200 //TX_DELTA_THR_SN_EST_4 -255 0x0100 //TX_DELTA_THR_SN_EST_5 -256 0x0200 //TX_DELTA_THR_SN_EST_6 +254 0x0100 //TX_DELTA_THR_SN_EST_4 +255 0x0200 //TX_DELTA_THR_SN_EST_5 +256 0x0100 //TX_DELTA_THR_SN_EST_6 257 0x0200 //TX_DELTA_THR_SN_EST_7 258 0x4000 //TX_LAMBDA_NN_EST_0 -259 0x4000 //TX_LAMBDA_NN_EST_1 -260 0x5000 //TX_LAMBDA_NN_EST_2 +259 0x5000 //TX_LAMBDA_NN_EST_1 +260 0x4000 //TX_LAMBDA_NN_EST_2 261 0x4000 //TX_LAMBDA_NN_EST_3 262 0x4000 //TX_LAMBDA_NN_EST_4 263 0x4000 //TX_LAMBDA_NN_EST_5 @@ -7301,18 +10970,18 @@ 279 0x1000 //TX_B_POST_FLT_0 280 0x4000 //TX_B_POST_FLT_1 281 0x0018 //TX_NS_LVL_CTRL_0 -282 0x001C //TX_NS_LVL_CTRL_1 -283 0x0019 //TX_NS_LVL_CTRL_2 -284 0x0018 //TX_NS_LVL_CTRL_3 -285 0x0019 //TX_NS_LVL_CTRL_4 -286 0x001A //TX_NS_LVL_CTRL_5 -287 0x001E //TX_NS_LVL_CTRL_6 +282 0x0019 //TX_NS_LVL_CTRL_1 +283 0x0018 //TX_NS_LVL_CTRL_2 +284 0x0019 //TX_NS_LVL_CTRL_3 +285 0x001A //TX_NS_LVL_CTRL_4 +286 0x001E //TX_NS_LVL_CTRL_5 +287 0x001C //TX_NS_LVL_CTRL_6 288 0x001C //TX_NS_LVL_CTRL_7 289 0x000E //TX_MIN_GAIN_S_0 -290 0x0018 //TX_MIN_GAIN_S_1 +290 0x0012 //TX_MIN_GAIN_S_1 291 0x0012 //TX_MIN_GAIN_S_2 292 0x0012 //TX_MIN_GAIN_S_3 -293 0x0012 //TX_MIN_GAIN_S_4 +293 0x0018 //TX_MIN_GAIN_S_4 294 0x0018 //TX_MIN_GAIN_S_5 295 0x0018 //TX_MIN_GAIN_S_6 296 0x0018 //TX_MIN_GAIN_S_7 @@ -7320,8 +10989,8 @@ 298 0x0000 //TX_NS_MAX_PRI_SNR_TH 299 0x0000 //TX_NMOS_SUP_MENSA 300 0x7FFF //TX_SNRI_SUP_0 -301 0x4000 //TX_SNRI_SUP_1 -302 0x5000 //TX_SNRI_SUP_2 +301 0x5000 //TX_SNRI_SUP_1 +302 0x4000 //TX_SNRI_SUP_2 303 0x4000 //TX_SNRI_SUP_3 304 0x4000 //TX_SNRI_SUP_4 305 0x4000 //TX_SNRI_SUP_5 @@ -7334,28 +11003,28 @@ 312 0x7FFF //TX_A_POST_FILT_0 313 0x2000 //TX_A_POST_FILT_1 314 0x7000 //TX_A_POST_FILT_S_0 -315 0x7000 //TX_A_POST_FILT_S_1 +315 0x3000 //TX_A_POST_FILT_S_1 316 0x3000 //TX_A_POST_FILT_S_2 -317 0x3000 //TX_A_POST_FILT_S_3 -318 0x2000 //TX_A_POST_FILT_S_4 +317 0x2000 //TX_A_POST_FILT_S_3 +318 0x7000 //TX_A_POST_FILT_S_4 319 0x7000 //TX_A_POST_FILT_S_5 320 0x7000 //TX_A_POST_FILT_S_6 321 0x7000 //TX_A_POST_FILT_S_7 322 0x1000 //TX_B_POST_FILT_0 323 0x4000 //TX_B_POST_FILT_1 -324 0x5000 //TX_B_POST_FILT_2 +324 0x4000 //TX_B_POST_FILT_2 325 0x4000 //TX_B_POST_FILT_3 326 0x4000 //TX_B_POST_FILT_4 327 0x4000 //TX_B_POST_FILT_5 -328 0x4000 //TX_B_POST_FILT_6 +328 0x5000 //TX_B_POST_FILT_6 329 0x4000 //TX_B_POST_FILT_7 330 0x4000 //TX_B_LESSCUT_RTO_S_0 331 0x6000 //TX_B_LESSCUT_RTO_S_1 332 0x6000 //TX_B_LESSCUT_RTO_S_2 333 0x6000 //TX_B_LESSCUT_RTO_S_3 -334 0x6000 //TX_B_LESSCUT_RTO_S_4 +334 0x7FFF //TX_B_LESSCUT_RTO_S_4 335 0x6000 //TX_B_LESSCUT_RTO_S_5 -336 0x7FFF //TX_B_LESSCUT_RTO_S_6 +336 0x6000 //TX_B_LESSCUT_RTO_S_6 337 0x7FFF //TX_B_LESSCUT_RTO_S_7 338 0x7C29 //TX_LAMBDA_PFILT 339 0x7C29 //TX_LAMBDA_PFILT_S_0 @@ -7399,10 +11068,10 @@ 377 0x4E20 //TX_NOISE_TH_5_4 378 0x21E8 //TX_NOISE_TH_6 379 0x0014 //TX_MINENOISE_TH -380 0x4000 //TX_MINENOISE_MIC0_TH_MTS -381 0xFFEE //TX_MINENOISE_MIC0_TH_EXP -382 0x6000 //TX_MINENOISE_MIC0_S_TH_MTS -383 0xFFF3 //TX_MINENOISE_MIC0_S_TH_EXP +380 0xD508 //TX_MORENS_TFMASK_TH +381 0x0001 //TX_DRC_QUIET_FLOOR +382 0x6D60 //TX_RATIODTL_CUT_TH +383 0x0DAC //TX_DT_CUT_K1 384 0x00A5 //TX_OUT_ENER_S_TH_CLEAN 385 0x00A5 //TX_OUT_ENER_S_TH_LESSCLEAN 386 0x00A5 //TX_OUT_ENER_S_TH_NOISY @@ -7410,15 +11079,15 @@ 388 0x00CE //TX_OUT_ENER_TH_SPEECH 389 0x2000 //TX_SN_NPB_GAIN 390 0x0000 //TX_NN_NPB_GAIN -391 0x0000 //TX_CSX_ALPHA_0 -392 0x0000 //TX_CSX_ALPHA_1 -393 0x0000 //TX_CSX_ALPHA_2 -394 0x0000 //TX_CSX_ALPHA_3 -395 0x0800 //TX_MU_ARSP_EST -396 0x00C8 //TX_P_OUTBEAM_MIN_TH +391 0x3000 //TX_POST_MASK_SUP_HSNE +392 0x07D0 //TX_TAIL_DET_TH +393 0x4000 //TX_B_LESSCUT_RTO_WTA +394 0x0000 //TX_MEL_G_R +395 0x0080 //TX_SUPHIGH_TH +396 0x4000 //TX_MASK_G_R 397 0x0002 //TX_EXTRA_NS_L -398 0x0800 //TX_EXTRA_NS_A -399 0x0005 //TX_VR_NOISE_FLOOR_TH +398 0x1800 //TX_C_POST_FLT_MASK +399 0x7FFF //TX_A_POST_FLT_WNS 400 0x0148 //TX_MIN_G_LOW300HZ 401 0x0004 //TX_MAXLEVEL_CNG 402 0x00B4 //TX_STN_NOISE_TH @@ -7533,16 +11202,16 @@ 511 0x6666 //TX_MIC_TO_BFGAIN 512 0x0000 //TX_MICTOBFGAIN0 513 0x0000 //TX_FASTMUE_TH -514 0x0000 //TX_DERVB_LEN_0 -515 0x0000 //TX_DERVB_LEN_1 -516 0x0000 //TX_RHO_DERVB -517 0x0000 //TX_MIC_INDX_DERVB -518 0x0000 //TX_MU_DERVB -519 0x0000 //TX_DR_RESRV_0 -520 0x0000 //TX_DR_RESRV_1 -521 0x0000 //TX_DR_RESRV_2 -522 0x0000 //TX_DR_RESRV_3 -523 0x0000 //TX_DR_RESRV_4 +514 0x3000 //TX_DEREVERB_LF_MU +515 0x34CD //TX_DEREVERB_HF_MU +516 0x0007 //TX_DEREVERB_DELAY +517 0x0004 //TX_DEREVERB_COEF_LEN +518 0x0003 //TX_DEREVERB_DNR +519 0x0000 //TX_DEREVERB_ALPHA +520 0x0000 //TX_DEREVERB_BETA +521 0x0000 //TX_GSC_RTOL_TH +522 0x0000 //TX_GSC_RTOH_TH +523 0x7E2C //TX_WIDE2_MEANHTH 524 0x0000 //TX_DR_RESRV_5 525 0x0000 //TX_DR_RESRV_6 526 0x0000 //TX_DR_RESRV_7 @@ -7643,12 +11312,12 @@ 621 0x4848 //TX_PREEQ_GAIN_MIC0_4 622 0x4848 //TX_PREEQ_GAIN_MIC0_5 623 0x4848 //TX_PREEQ_GAIN_MIC0_6 -624 0x4846 //TX_PREEQ_GAIN_MIC0_7 -625 0x4544 //TX_PREEQ_GAIN_MIC0_8 -626 0x4241 //TX_PREEQ_GAIN_MIC0_9 -627 0x403E //TX_PREEQ_GAIN_MIC0_10 -628 0x3D3C //TX_PREEQ_GAIN_MIC0_11 -629 0x3C3C //TX_PREEQ_GAIN_MIC0_12 +624 0x4848 //TX_PREEQ_GAIN_MIC0_7 +625 0x4848 //TX_PREEQ_GAIN_MIC0_8 +626 0x4848 //TX_PREEQ_GAIN_MIC0_9 +627 0x4848 //TX_PREEQ_GAIN_MIC0_10 +628 0x4848 //TX_PREEQ_GAIN_MIC0_11 +629 0x4848 //TX_PREEQ_GAIN_MIC0_12 630 0x4848 //TX_PREEQ_GAIN_MIC0_13 631 0x4848 //TX_PREEQ_GAIN_MIC0_14 632 0x4848 //TX_PREEQ_GAIN_MIC0_15 @@ -7693,11 +11362,11 @@ 671 0x4848 //TX_PREEQ_GAIN_MIC1_5 672 0x4848 //TX_PREEQ_GAIN_MIC1_6 673 0x4848 //TX_PREEQ_GAIN_MIC1_7 -674 0x484A //TX_PREEQ_GAIN_MIC1_8 -675 0x4B4C //TX_PREEQ_GAIN_MIC1_9 +674 0x4848 //TX_PREEQ_GAIN_MIC1_8 +675 0x4A4B //TX_PREEQ_GAIN_MIC1_9 676 0x4B4A //TX_PREEQ_GAIN_MIC1_10 -677 0x4A48 //TX_PREEQ_GAIN_MIC1_11 -678 0x4C4C //TX_PREEQ_GAIN_MIC1_12 +677 0x4848 //TX_PREEQ_GAIN_MIC1_11 +678 0x494C //TX_PREEQ_GAIN_MIC1_12 679 0x4C4C //TX_PREEQ_GAIN_MIC1_13 680 0x4848 //TX_PREEQ_GAIN_MIC1_14 681 0x4848 //TX_PREEQ_GAIN_MIC1_15 @@ -7916,8 +11585,73 @@ 894 0xC000 //TX_FASTNS_SSA_THHFL 895 0xCCCC //TX_FASTNS_SSA_THLFH 896 0xD999 //TX_FASTNS_SSA_THHFH +897 0x2339 //TX_SENDFUNC_REG_MICMUTE +898 0x0021 //TX_SENDFUNC_REG_MICMUTE1 +899 0x02BC //TX_MICMUTE_RATIO_THR +900 0x0140 //TX_MICMUTE_AMP_THR +901 0x0004 //TX_MICMUTE_HPF_IND +902 0x00C0 //TX_MICMUTE_LOG_EYR_TH +903 0x0008 //TX_MICMUTE_CVG_TIME +904 0x0008 //TX_MICMUTE_RELEASE_TIME +905 0x01FE //TX_MIC_VOLUME_MIC0MUTE +906 0x0020 //TX_MICMUTE_EPD_OFFSET_0 +907 0x001E //TX_MICMUTE_FRQ_AEC_L +908 0x7999 //TX_MICMUTE_EAD_THR +909 0x7FFF //TX_MICMUTE_LAMBDA_CB_NLE +910 0x7FFF //TX_MICMUTE_LAMBDA_RE_EST +911 0x4000 //TX_DTD_THR1_MICMUTE_0 +912 0x7000 //TX_DTD_THR1_MICMUTE_1 +913 0x7FFF //TX_DTD_THR1_MICMUTE_2 +914 0x7FFF //TX_DTD_THR1_MICMUTE_3 +915 0x6CCC //TX_DTD_THR2_MICMUTE_0 +916 0x0400 //TX_MICMUTE_MIN_EQ_RE_EST_0 +917 0x0400 //TX_MICMUTE_MIN_EQ_RE_EST_1 +918 0x1000 //TX_MICMUTE_MIN_EQ_RE_EST_2 +919 0x7FFF //TX_MICMUTE_MIN_EQ_RE_EST_3 +920 0x7FFF //TX_MICMUTE_MIN_EQ_RE_EST_4 +921 0x4000 //TX_MICMUTE_C_POST_FLT +922 0x03E8 //TX_MICMUTE_DT_CUT_K +923 0x0001 //TX_MICMUTE_DT_CUT_THR +924 0x03E8 //TX_MICMUTE_DT_CUT_K2 +925 0x0001 //TX_MICMUTE_DT_CUT_THR2 +926 0x0064 //TX_MICMUTE_DT2_HOLD_N +927 0x1000 //TX_MICMUTE_RATIODTH_THCUT +928 0x1000 //TX_MICMUTE_B_POST_FLT_ECHOL +929 0x7FFF //TX_MICMUTE_B_POST_FLT_ECHOH +930 0x0400 //TX_MICMUTE_C_POST_FLT_MASK +931 0x7999 //TX_MICMUTE_RATIODTL_CUT_TH +932 0x0258 //TX_MICMUTE_DT_CUT_K1 +933 0x0800 //TX_MICMUTE_N2_SN_EST +934 0xFC00 //TX_MICMUTE_THR_SN_EST_0 +935 0x001C //TX_MICMUTE_MIN_G_CTRL_0 +936 0x6000 //TX_MICMUTE_A_POST_FILT_S_0 +937 0x7000 //TX_MICMUTE_B_POST_FILT_0 +938 0x2710 //TX_MIC1RUB_AMP_THR +939 0x0010 //TX_MIC1MUTE_RATIO_THR +940 0x0450 //TX_MIC1MUTE_AMP_THR +941 0x0008 //TX_MIC1MUTE_CVG_TIME +942 0x0008 //TX_MIC1MUTE_RELEASE_TIME +943 0x0000 //TX_AMS_RESRV_01 +944 0x0000 //TX_AMS_RESRV_02 +945 0x0000 //TX_AMS_RESRV_03 +946 0x0000 //TX_AMS_RESRV_04 +947 0x0000 //TX_AMS_RESRV_05 +948 0x0000 //TX_AMS_RESRV_06 +949 0x0000 //TX_AMS_RESRV_07 +950 0x0000 //TX_AMS_RESRV_08 +951 0x0000 //TX_AMS_RESRV_09 +952 0x0000 //TX_AMS_RESRV_10 +953 0x0000 //TX_AMS_RESRV_11 +954 0x0000 //TX_AMS_RESRV_12 +955 0x0000 //TX_AMS_RESRV_13 +956 0x0000 //TX_AMS_RESRV_14 +957 0x0000 //TX_AMS_RESRV_15 +958 0x0000 //TX_AMS_RESRV_16 +959 0x0000 //TX_AMS_RESRV_17 +960 0x0000 //TX_AMS_RESRV_18 +961 0x0000 //TX_AMS_RESRV_19 #RX -0 0x003C //RX_RECVFUNC_MODE_0 +0 0x203C //RX_RECVFUNC_MODE_0 1 0x0000 //RX_RECVFUNC_MODE_1 2 0x0001 //RX_SAMPLINGFREQ_SIG 3 0x0001 //RX_SAMPLINGFREQ_PROC @@ -7927,7 +11661,7 @@ 7 0x1000 //RX_TDDRC_ALPHA_UP_2 8 0x1000 //RX_TDDRC_ALPHA_UP_3 9 0x1000 //RX_TDDRC_ALPHA_UP_4 -10 0x0600 //RX_PGA +10 0x0480 //RX_PGA 11 0x7FFF //RX_A_HP 12 0x4000 //RX_B_PE 13 0x7800 //RX_THR_PITCH_DET_0 @@ -7956,19 +11690,19 @@ 36 0x1000 //RX_LMT_THRD 37 0x7FDF //RX_LMT_ALPHA 38 0x001C //RX_FDEQ_SUBNUM -39 0x4840 //RX_FDEQ_GAIN_0 -40 0x4040 //RX_FDEQ_GAIN_1 -41 0x485C //RX_FDEQ_GAIN_2 -42 0x6873 //RX_FDEQ_GAIN_3 -43 0x7F8E //RX_FDEQ_GAIN_4 -44 0x847E //RX_FDEQ_GAIN_5 -45 0x7E80 //RX_FDEQ_GAIN_6 -46 0x8884 //RX_FDEQ_GAIN_7 -47 0x8890 //RX_FDEQ_GAIN_8 -48 0x8E8F //RX_FDEQ_GAIN_9 -49 0x8B77 //RX_FDEQ_GAIN_10 -50 0x6F7F //RX_FDEQ_GAIN_11 -51 0x6568 //RX_FDEQ_GAIN_12 +39 0x4836 //RX_FDEQ_GAIN_0 +40 0x3636 //RX_FDEQ_GAIN_1 +41 0x364C //RX_FDEQ_GAIN_2 +42 0x586E //RX_FDEQ_GAIN_3 +43 0x767A //RX_FDEQ_GAIN_4 +44 0x7978 //RX_FDEQ_GAIN_5 +45 0x7A7C //RX_FDEQ_GAIN_6 +46 0x8280 //RX_FDEQ_GAIN_7 +47 0x848C //RX_FDEQ_GAIN_8 +48 0x8E98 //RX_FDEQ_GAIN_9 +49 0x9E95 //RX_FDEQ_GAIN_10 +50 0x8686 //RX_FDEQ_GAIN_11 +51 0x7868 //RX_FDEQ_GAIN_12 52 0x6050 //RX_FDEQ_GAIN_13 53 0x4848 //RX_FDEQ_GAIN_14 54 0x4848 //RX_FDEQ_GAIN_15 @@ -7991,9 +11725,9 @@ 71 0x0B0C //RX_FDEQ_BIN_8 72 0x0D0E //RX_FDEQ_BIN_9 73 0x0E0F //RX_FDEQ_BIN_10 -74 0x0F10 //RX_FDEQ_BIN_11 -75 0x1011 //RX_FDEQ_BIN_12 -76 0x1104 //RX_FDEQ_BIN_13 +74 0x0F0E //RX_FDEQ_BIN_11 +75 0x100D //RX_FDEQ_BIN_12 +76 0x110A //RX_FDEQ_BIN_13 77 0x0000 //RX_FDEQ_BIN_14 78 0x0000 //RX_FDEQ_BIN_15 79 0x0000 //RX_FDEQ_BIN_16 @@ -8033,20 +11767,20 @@ 113 0x0000 //RX_TDDRC_THRD_1 114 0x1800 //RX_TDDRC_THRD_2 115 0x1800 //RX_TDDRC_THRD_3 -116 0x3000 //RX_TDDRC_SLANT_0 -117 0x6E00 //RX_TDDRC_SLANT_1 +116 0x7FFF //RX_TDDRC_SLANT_0 +117 0x7FFF //RX_TDDRC_SLANT_1 118 0x1000 //RX_TDDRC_ALPHA_UP_0 119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 120 0x0000 //RX_TDDRC_HMNC_FLAG 121 0x199A //RX_TDDRC_HMNC_GAIN 122 0x0001 //RX_TDDRC_SMT_FLAG 123 0x0CCD //RX_TDDRC_SMT_W -124 0x0407 //RX_TDDRC_DRC_GAIN +124 0x0650 //RX_TDDRC_DRC_GAIN 125 0x7C00 //RX_LAMBDA_PKA_FP 126 0x13E0 //RX_TPKA_FP 127 0x0080 //RX_MIN_G_FP 128 0x2000 //RX_MAX_G_FP -129 0x000C //RX_SPK_VOL +129 0x0100 //RX_SPK_VOL 130 0x0000 //RX_VOL_RESRV_0 131 0x0000 //RX_MAXLEVEL_CNG 132 0x3000 //RX_BWE_UV_TH @@ -8089,29 +11823,29 @@ 113 0x0000 //RX_TDDRC_THRD_1 114 0x1800 //RX_TDDRC_THRD_2 115 0x1800 //RX_TDDRC_THRD_3 -116 0x3000 //RX_TDDRC_SLANT_0 -117 0x6E00 //RX_TDDRC_SLANT_1 +116 0x7FFF //RX_TDDRC_SLANT_0 +117 0x7FFF //RX_TDDRC_SLANT_1 118 0x1000 //RX_TDDRC_ALPHA_UP_0 119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 120 0x0000 //RX_TDDRC_HMNC_FLAG 121 0x199A //RX_TDDRC_HMNC_GAIN 122 0x0001 //RX_TDDRC_SMT_FLAG 123 0x0CCD //RX_TDDRC_SMT_W -124 0x0407 //RX_TDDRC_DRC_GAIN +124 0x0650 //RX_TDDRC_DRC_GAIN 38 0x001C //RX_FDEQ_SUBNUM -39 0x4840 //RX_FDEQ_GAIN_0 -40 0x4040 //RX_FDEQ_GAIN_1 -41 0x485C //RX_FDEQ_GAIN_2 -42 0x6873 //RX_FDEQ_GAIN_3 -43 0x7F8E //RX_FDEQ_GAIN_4 -44 0x847E //RX_FDEQ_GAIN_5 -45 0x7E80 //RX_FDEQ_GAIN_6 -46 0x8884 //RX_FDEQ_GAIN_7 -47 0x8890 //RX_FDEQ_GAIN_8 -48 0x8E8F //RX_FDEQ_GAIN_9 -49 0x8B77 //RX_FDEQ_GAIN_10 -50 0x6F7F //RX_FDEQ_GAIN_11 -51 0x6568 //RX_FDEQ_GAIN_12 +39 0x4836 //RX_FDEQ_GAIN_0 +40 0x3636 //RX_FDEQ_GAIN_1 +41 0x364C //RX_FDEQ_GAIN_2 +42 0x586E //RX_FDEQ_GAIN_3 +43 0x767A //RX_FDEQ_GAIN_4 +44 0x7978 //RX_FDEQ_GAIN_5 +45 0x7A7C //RX_FDEQ_GAIN_6 +46 0x8280 //RX_FDEQ_GAIN_7 +47 0x848C //RX_FDEQ_GAIN_8 +48 0x8E98 //RX_FDEQ_GAIN_9 +49 0x9E95 //RX_FDEQ_GAIN_10 +50 0x8686 //RX_FDEQ_GAIN_11 +51 0x7868 //RX_FDEQ_GAIN_12 52 0x6050 //RX_FDEQ_GAIN_13 53 0x4848 //RX_FDEQ_GAIN_14 54 0x4848 //RX_FDEQ_GAIN_15 @@ -8134,9 +11868,9 @@ 71 0x0B0C //RX_FDEQ_BIN_8 72 0x0D0E //RX_FDEQ_BIN_9 73 0x0E0F //RX_FDEQ_BIN_10 -74 0x0F10 //RX_FDEQ_BIN_11 -75 0x1011 //RX_FDEQ_BIN_12 -76 0x1104 //RX_FDEQ_BIN_13 +74 0x0F0E //RX_FDEQ_BIN_11 +75 0x100D //RX_FDEQ_BIN_12 +76 0x110A //RX_FDEQ_BIN_13 77 0x0000 //RX_FDEQ_BIN_14 78 0x0000 //RX_FDEQ_BIN_15 79 0x0000 //RX_FDEQ_BIN_16 @@ -8171,7 +11905,7 @@ 108 0x5333 //RX_FDDRC_SLANT_1_2 109 0x5333 //RX_FDDRC_SLANT_1_3 110 0x0000 //RX_FDDRC_RESRV_0 -129 0x000C //RX_SPK_VOL +129 0x000B //RX_SPK_VOL 130 0x0000 //RX_VOL_RESRV_0 #VOL 1 6 0x1000 //RX_TDDRC_ALPHA_UP_1 @@ -8188,29 +11922,29 @@ 113 0x0000 //RX_TDDRC_THRD_1 114 0x1800 //RX_TDDRC_THRD_2 115 0x1800 //RX_TDDRC_THRD_3 -116 0x3000 //RX_TDDRC_SLANT_0 -117 0x6E00 //RX_TDDRC_SLANT_1 +116 0x7FFF //RX_TDDRC_SLANT_0 +117 0x7FFF //RX_TDDRC_SLANT_1 118 0x1000 //RX_TDDRC_ALPHA_UP_0 119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 120 0x0000 //RX_TDDRC_HMNC_FLAG 121 0x199A //RX_TDDRC_HMNC_GAIN 122 0x0001 //RX_TDDRC_SMT_FLAG 123 0x0CCD //RX_TDDRC_SMT_W -124 0x0407 //RX_TDDRC_DRC_GAIN +124 0x0650 //RX_TDDRC_DRC_GAIN 38 0x001C //RX_FDEQ_SUBNUM -39 0x4840 //RX_FDEQ_GAIN_0 -40 0x4040 //RX_FDEQ_GAIN_1 -41 0x485C //RX_FDEQ_GAIN_2 -42 0x6873 //RX_FDEQ_GAIN_3 -43 0x7F8E //RX_FDEQ_GAIN_4 -44 0x847E //RX_FDEQ_GAIN_5 -45 0x7E80 //RX_FDEQ_GAIN_6 -46 0x8884 //RX_FDEQ_GAIN_7 -47 0x8890 //RX_FDEQ_GAIN_8 -48 0x8E8F //RX_FDEQ_GAIN_9 -49 0x8B77 //RX_FDEQ_GAIN_10 -50 0x6F7F //RX_FDEQ_GAIN_11 -51 0x6568 //RX_FDEQ_GAIN_12 +39 0x4836 //RX_FDEQ_GAIN_0 +40 0x3636 //RX_FDEQ_GAIN_1 +41 0x364C //RX_FDEQ_GAIN_2 +42 0x586E //RX_FDEQ_GAIN_3 +43 0x767A //RX_FDEQ_GAIN_4 +44 0x7978 //RX_FDEQ_GAIN_5 +45 0x7A7C //RX_FDEQ_GAIN_6 +46 0x8280 //RX_FDEQ_GAIN_7 +47 0x848C //RX_FDEQ_GAIN_8 +48 0x8E98 //RX_FDEQ_GAIN_9 +49 0x9E95 //RX_FDEQ_GAIN_10 +50 0x8686 //RX_FDEQ_GAIN_11 +51 0x7868 //RX_FDEQ_GAIN_12 52 0x6050 //RX_FDEQ_GAIN_13 53 0x4848 //RX_FDEQ_GAIN_14 54 0x4848 //RX_FDEQ_GAIN_15 @@ -8233,9 +11967,9 @@ 71 0x0B0C //RX_FDEQ_BIN_8 72 0x0D0E //RX_FDEQ_BIN_9 73 0x0E0F //RX_FDEQ_BIN_10 -74 0x0F10 //RX_FDEQ_BIN_11 -75 0x1011 //RX_FDEQ_BIN_12 -76 0x1104 //RX_FDEQ_BIN_13 +74 0x0F0E //RX_FDEQ_BIN_11 +75 0x100D //RX_FDEQ_BIN_12 +76 0x110A //RX_FDEQ_BIN_13 77 0x0000 //RX_FDEQ_BIN_14 78 0x0000 //RX_FDEQ_BIN_15 79 0x0000 //RX_FDEQ_BIN_16 @@ -8270,7 +12004,7 @@ 108 0x5333 //RX_FDDRC_SLANT_1_2 109 0x5333 //RX_FDDRC_SLANT_1_3 110 0x0000 //RX_FDDRC_RESRV_0 -129 0x0014 //RX_SPK_VOL +129 0x0012 //RX_SPK_VOL 130 0x0000 //RX_VOL_RESRV_0 #VOL 2 6 0x1000 //RX_TDDRC_ALPHA_UP_1 @@ -8287,29 +12021,29 @@ 113 0x0000 //RX_TDDRC_THRD_1 114 0x1800 //RX_TDDRC_THRD_2 115 0x1800 //RX_TDDRC_THRD_3 -116 0x3000 //RX_TDDRC_SLANT_0 -117 0x6E00 //RX_TDDRC_SLANT_1 +116 0x7FFF //RX_TDDRC_SLANT_0 +117 0x7FFF //RX_TDDRC_SLANT_1 118 0x1000 //RX_TDDRC_ALPHA_UP_0 119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 120 0x0000 //RX_TDDRC_HMNC_FLAG 121 0x199A //RX_TDDRC_HMNC_GAIN 122 0x0001 //RX_TDDRC_SMT_FLAG 123 0x0CCD //RX_TDDRC_SMT_W -124 0x0407 //RX_TDDRC_DRC_GAIN +124 0x0650 //RX_TDDRC_DRC_GAIN 38 0x001C //RX_FDEQ_SUBNUM -39 0x4840 //RX_FDEQ_GAIN_0 -40 0x4040 //RX_FDEQ_GAIN_1 -41 0x485C //RX_FDEQ_GAIN_2 -42 0x6873 //RX_FDEQ_GAIN_3 -43 0x7F8E //RX_FDEQ_GAIN_4 -44 0x847E //RX_FDEQ_GAIN_5 -45 0x7E80 //RX_FDEQ_GAIN_6 -46 0x8884 //RX_FDEQ_GAIN_7 -47 0x8890 //RX_FDEQ_GAIN_8 -48 0x8E8F //RX_FDEQ_GAIN_9 -49 0x8B77 //RX_FDEQ_GAIN_10 -50 0x6F7F //RX_FDEQ_GAIN_11 -51 0x6568 //RX_FDEQ_GAIN_12 +39 0x4836 //RX_FDEQ_GAIN_0 +40 0x3636 //RX_FDEQ_GAIN_1 +41 0x364C //RX_FDEQ_GAIN_2 +42 0x586E //RX_FDEQ_GAIN_3 +43 0x767A //RX_FDEQ_GAIN_4 +44 0x7978 //RX_FDEQ_GAIN_5 +45 0x7A7C //RX_FDEQ_GAIN_6 +46 0x8280 //RX_FDEQ_GAIN_7 +47 0x848C //RX_FDEQ_GAIN_8 +48 0x8E98 //RX_FDEQ_GAIN_9 +49 0x9E95 //RX_FDEQ_GAIN_10 +50 0x8686 //RX_FDEQ_GAIN_11 +51 0x7868 //RX_FDEQ_GAIN_12 52 0x6050 //RX_FDEQ_GAIN_13 53 0x4848 //RX_FDEQ_GAIN_14 54 0x4848 //RX_FDEQ_GAIN_15 @@ -8332,9 +12066,9 @@ 71 0x0B0C //RX_FDEQ_BIN_8 72 0x0D0E //RX_FDEQ_BIN_9 73 0x0E0F //RX_FDEQ_BIN_10 -74 0x0F10 //RX_FDEQ_BIN_11 -75 0x1011 //RX_FDEQ_BIN_12 -76 0x1104 //RX_FDEQ_BIN_13 +74 0x0F0E //RX_FDEQ_BIN_11 +75 0x100D //RX_FDEQ_BIN_12 +76 0x110A //RX_FDEQ_BIN_13 77 0x0000 //RX_FDEQ_BIN_14 78 0x0000 //RX_FDEQ_BIN_15 79 0x0000 //RX_FDEQ_BIN_16 @@ -8369,7 +12103,7 @@ 108 0x5333 //RX_FDDRC_SLANT_1_2 109 0x5333 //RX_FDDRC_SLANT_1_3 110 0x0000 //RX_FDDRC_RESRV_0 -129 0x0020 //RX_SPK_VOL +129 0x001E //RX_SPK_VOL 130 0x0000 //RX_VOL_RESRV_0 #VOL 3 6 0x1000 //RX_TDDRC_ALPHA_UP_1 @@ -8386,29 +12120,29 @@ 113 0x0000 //RX_TDDRC_THRD_1 114 0x1800 //RX_TDDRC_THRD_2 115 0x1800 //RX_TDDRC_THRD_3 -116 0x3000 //RX_TDDRC_SLANT_0 -117 0x6E00 //RX_TDDRC_SLANT_1 +116 0x7FFF //RX_TDDRC_SLANT_0 +117 0x7FFF //RX_TDDRC_SLANT_1 118 0x1000 //RX_TDDRC_ALPHA_UP_0 119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 120 0x0000 //RX_TDDRC_HMNC_FLAG 121 0x199A //RX_TDDRC_HMNC_GAIN 122 0x0001 //RX_TDDRC_SMT_FLAG 123 0x0CCD //RX_TDDRC_SMT_W -124 0x0407 //RX_TDDRC_DRC_GAIN +124 0x0650 //RX_TDDRC_DRC_GAIN 38 0x001C //RX_FDEQ_SUBNUM -39 0x4840 //RX_FDEQ_GAIN_0 -40 0x4040 //RX_FDEQ_GAIN_1 -41 0x485C //RX_FDEQ_GAIN_2 -42 0x6873 //RX_FDEQ_GAIN_3 -43 0x7F8E //RX_FDEQ_GAIN_4 -44 0x847E //RX_FDEQ_GAIN_5 -45 0x7E80 //RX_FDEQ_GAIN_6 -46 0x8884 //RX_FDEQ_GAIN_7 -47 0x8890 //RX_FDEQ_GAIN_8 -48 0x8E8F //RX_FDEQ_GAIN_9 -49 0x8B77 //RX_FDEQ_GAIN_10 -50 0x6F7F //RX_FDEQ_GAIN_11 -51 0x6568 //RX_FDEQ_GAIN_12 +39 0x4836 //RX_FDEQ_GAIN_0 +40 0x3636 //RX_FDEQ_GAIN_1 +41 0x364C //RX_FDEQ_GAIN_2 +42 0x586E //RX_FDEQ_GAIN_3 +43 0x767A //RX_FDEQ_GAIN_4 +44 0x7978 //RX_FDEQ_GAIN_5 +45 0x7A7C //RX_FDEQ_GAIN_6 +46 0x8280 //RX_FDEQ_GAIN_7 +47 0x848C //RX_FDEQ_GAIN_8 +48 0x8E98 //RX_FDEQ_GAIN_9 +49 0x9E95 //RX_FDEQ_GAIN_10 +50 0x8686 //RX_FDEQ_GAIN_11 +51 0x7868 //RX_FDEQ_GAIN_12 52 0x6050 //RX_FDEQ_GAIN_13 53 0x4848 //RX_FDEQ_GAIN_14 54 0x4848 //RX_FDEQ_GAIN_15 @@ -8431,9 +12165,9 @@ 71 0x0B0C //RX_FDEQ_BIN_8 72 0x0D0E //RX_FDEQ_BIN_9 73 0x0E0F //RX_FDEQ_BIN_10 -74 0x0F10 //RX_FDEQ_BIN_11 -75 0x1011 //RX_FDEQ_BIN_12 -76 0x1104 //RX_FDEQ_BIN_13 +74 0x0F0E //RX_FDEQ_BIN_11 +75 0x100D //RX_FDEQ_BIN_12 +76 0x110A //RX_FDEQ_BIN_13 77 0x0000 //RX_FDEQ_BIN_14 78 0x0000 //RX_FDEQ_BIN_15 79 0x0000 //RX_FDEQ_BIN_16 @@ -8468,7 +12202,7 @@ 108 0x5333 //RX_FDDRC_SLANT_1_2 109 0x5333 //RX_FDDRC_SLANT_1_3 110 0x0000 //RX_FDDRC_RESRV_0 -129 0x0035 //RX_SPK_VOL +129 0x0026 //RX_SPK_VOL 130 0x0000 //RX_VOL_RESRV_0 #VOL 4 6 0x1000 //RX_TDDRC_ALPHA_UP_1 @@ -8485,29 +12219,29 @@ 113 0x0000 //RX_TDDRC_THRD_1 114 0x1800 //RX_TDDRC_THRD_2 115 0x1800 //RX_TDDRC_THRD_3 -116 0x3000 //RX_TDDRC_SLANT_0 -117 0x6E00 //RX_TDDRC_SLANT_1 +116 0x7FFF //RX_TDDRC_SLANT_0 +117 0x7FFF //RX_TDDRC_SLANT_1 118 0x1000 //RX_TDDRC_ALPHA_UP_0 119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 120 0x0000 //RX_TDDRC_HMNC_FLAG 121 0x199A //RX_TDDRC_HMNC_GAIN 122 0x0001 //RX_TDDRC_SMT_FLAG 123 0x0CCD //RX_TDDRC_SMT_W -124 0x0407 //RX_TDDRC_DRC_GAIN +124 0x0650 //RX_TDDRC_DRC_GAIN 38 0x001C //RX_FDEQ_SUBNUM -39 0x4840 //RX_FDEQ_GAIN_0 -40 0x4040 //RX_FDEQ_GAIN_1 -41 0x485C //RX_FDEQ_GAIN_2 -42 0x6873 //RX_FDEQ_GAIN_3 -43 0x7F8E //RX_FDEQ_GAIN_4 -44 0x847E //RX_FDEQ_GAIN_5 -45 0x7E80 //RX_FDEQ_GAIN_6 -46 0x8884 //RX_FDEQ_GAIN_7 -47 0x8890 //RX_FDEQ_GAIN_8 -48 0x8E8F //RX_FDEQ_GAIN_9 -49 0x8B77 //RX_FDEQ_GAIN_10 -50 0x6F7F //RX_FDEQ_GAIN_11 -51 0x6568 //RX_FDEQ_GAIN_12 +39 0x4836 //RX_FDEQ_GAIN_0 +40 0x3636 //RX_FDEQ_GAIN_1 +41 0x364C //RX_FDEQ_GAIN_2 +42 0x586E //RX_FDEQ_GAIN_3 +43 0x767A //RX_FDEQ_GAIN_4 +44 0x7978 //RX_FDEQ_GAIN_5 +45 0x7A7C //RX_FDEQ_GAIN_6 +46 0x8280 //RX_FDEQ_GAIN_7 +47 0x848C //RX_FDEQ_GAIN_8 +48 0x8E98 //RX_FDEQ_GAIN_9 +49 0x9E95 //RX_FDEQ_GAIN_10 +50 0x8686 //RX_FDEQ_GAIN_11 +51 0x7868 //RX_FDEQ_GAIN_12 52 0x6050 //RX_FDEQ_GAIN_13 53 0x4848 //RX_FDEQ_GAIN_14 54 0x4848 //RX_FDEQ_GAIN_15 @@ -8530,9 +12264,9 @@ 71 0x0B0C //RX_FDEQ_BIN_8 72 0x0D0E //RX_FDEQ_BIN_9 73 0x0E0F //RX_FDEQ_BIN_10 -74 0x0F10 //RX_FDEQ_BIN_11 -75 0x1011 //RX_FDEQ_BIN_12 -76 0x1104 //RX_FDEQ_BIN_13 +74 0x0F0E //RX_FDEQ_BIN_11 +75 0x100D //RX_FDEQ_BIN_12 +76 0x110A //RX_FDEQ_BIN_13 77 0x0000 //RX_FDEQ_BIN_14 78 0x0000 //RX_FDEQ_BIN_15 79 0x0000 //RX_FDEQ_BIN_16 @@ -8567,7 +12301,7 @@ 108 0x5333 //RX_FDDRC_SLANT_1_2 109 0x5333 //RX_FDDRC_SLANT_1_3 110 0x0000 //RX_FDDRC_RESRV_0 -129 0x0057 //RX_SPK_VOL +129 0x0050 //RX_SPK_VOL 130 0x0000 //RX_VOL_RESRV_0 #VOL 5 6 0x1000 //RX_TDDRC_ALPHA_UP_1 @@ -8584,29 +12318,29 @@ 113 0x0000 //RX_TDDRC_THRD_1 114 0x1800 //RX_TDDRC_THRD_2 115 0x1800 //RX_TDDRC_THRD_3 -116 0x3000 //RX_TDDRC_SLANT_0 -117 0x6E00 //RX_TDDRC_SLANT_1 +116 0x7FFF //RX_TDDRC_SLANT_0 +117 0x7FFF //RX_TDDRC_SLANT_1 118 0x1000 //RX_TDDRC_ALPHA_UP_0 119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 120 0x0000 //RX_TDDRC_HMNC_FLAG 121 0x199A //RX_TDDRC_HMNC_GAIN 122 0x0001 //RX_TDDRC_SMT_FLAG 123 0x0CCD //RX_TDDRC_SMT_W -124 0x0407 //RX_TDDRC_DRC_GAIN +124 0x0650 //RX_TDDRC_DRC_GAIN 38 0x001C //RX_FDEQ_SUBNUM -39 0x4840 //RX_FDEQ_GAIN_0 -40 0x4040 //RX_FDEQ_GAIN_1 -41 0x485C //RX_FDEQ_GAIN_2 -42 0x6873 //RX_FDEQ_GAIN_3 -43 0x7F8E //RX_FDEQ_GAIN_4 -44 0x847E //RX_FDEQ_GAIN_5 -45 0x7E80 //RX_FDEQ_GAIN_6 -46 0x8884 //RX_FDEQ_GAIN_7 -47 0x8890 //RX_FDEQ_GAIN_8 -48 0x8E8F //RX_FDEQ_GAIN_9 -49 0x8B77 //RX_FDEQ_GAIN_10 -50 0x6F7F //RX_FDEQ_GAIN_11 -51 0x6568 //RX_FDEQ_GAIN_12 +39 0x4836 //RX_FDEQ_GAIN_0 +40 0x3636 //RX_FDEQ_GAIN_1 +41 0x364C //RX_FDEQ_GAIN_2 +42 0x586E //RX_FDEQ_GAIN_3 +43 0x767A //RX_FDEQ_GAIN_4 +44 0x7978 //RX_FDEQ_GAIN_5 +45 0x7A7C //RX_FDEQ_GAIN_6 +46 0x8280 //RX_FDEQ_GAIN_7 +47 0x848C //RX_FDEQ_GAIN_8 +48 0x8E98 //RX_FDEQ_GAIN_9 +49 0x9E95 //RX_FDEQ_GAIN_10 +50 0x8686 //RX_FDEQ_GAIN_11 +51 0x7868 //RX_FDEQ_GAIN_12 52 0x6050 //RX_FDEQ_GAIN_13 53 0x4848 //RX_FDEQ_GAIN_14 54 0x4848 //RX_FDEQ_GAIN_15 @@ -8629,9 +12363,9 @@ 71 0x0B0C //RX_FDEQ_BIN_8 72 0x0D0E //RX_FDEQ_BIN_9 73 0x0E0F //RX_FDEQ_BIN_10 -74 0x0F10 //RX_FDEQ_BIN_11 -75 0x1011 //RX_FDEQ_BIN_12 -76 0x1104 //RX_FDEQ_BIN_13 +74 0x0F0E //RX_FDEQ_BIN_11 +75 0x100D //RX_FDEQ_BIN_12 +76 0x110A //RX_FDEQ_BIN_13 77 0x0000 //RX_FDEQ_BIN_14 78 0x0000 //RX_FDEQ_BIN_15 79 0x0000 //RX_FDEQ_BIN_16 @@ -8666,7 +12400,7 @@ 108 0x5333 //RX_FDDRC_SLANT_1_2 109 0x5333 //RX_FDDRC_SLANT_1_3 110 0x0000 //RX_FDDRC_RESRV_0 -129 0x008E //RX_SPK_VOL +129 0x0086 //RX_SPK_VOL 130 0x0000 //RX_VOL_RESRV_0 #VOL 6 6 0x1000 //RX_TDDRC_ALPHA_UP_1 @@ -8683,29 +12417,29 @@ 113 0x0000 //RX_TDDRC_THRD_1 114 0x1800 //RX_TDDRC_THRD_2 115 0x1800 //RX_TDDRC_THRD_3 -116 0x3000 //RX_TDDRC_SLANT_0 -117 0x6E00 //RX_TDDRC_SLANT_1 +116 0x7FFF //RX_TDDRC_SLANT_0 +117 0x7FFF //RX_TDDRC_SLANT_1 118 0x1000 //RX_TDDRC_ALPHA_UP_0 119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 120 0x0000 //RX_TDDRC_HMNC_FLAG 121 0x199A //RX_TDDRC_HMNC_GAIN 122 0x0001 //RX_TDDRC_SMT_FLAG 123 0x0CCD //RX_TDDRC_SMT_W -124 0x0407 //RX_TDDRC_DRC_GAIN +124 0x0650 //RX_TDDRC_DRC_GAIN 38 0x001C //RX_FDEQ_SUBNUM -39 0x4840 //RX_FDEQ_GAIN_0 -40 0x4040 //RX_FDEQ_GAIN_1 -41 0x485C //RX_FDEQ_GAIN_2 -42 0x6873 //RX_FDEQ_GAIN_3 -43 0x7F8E //RX_FDEQ_GAIN_4 -44 0x847E //RX_FDEQ_GAIN_5 -45 0x7E80 //RX_FDEQ_GAIN_6 -46 0x8884 //RX_FDEQ_GAIN_7 -47 0x8890 //RX_FDEQ_GAIN_8 -48 0x8E8F //RX_FDEQ_GAIN_9 -49 0x8B77 //RX_FDEQ_GAIN_10 -50 0x6F7F //RX_FDEQ_GAIN_11 -51 0x6568 //RX_FDEQ_GAIN_12 +39 0x4836 //RX_FDEQ_GAIN_0 +40 0x3636 //RX_FDEQ_GAIN_1 +41 0x364C //RX_FDEQ_GAIN_2 +42 0x586E //RX_FDEQ_GAIN_3 +43 0x767A //RX_FDEQ_GAIN_4 +44 0x7978 //RX_FDEQ_GAIN_5 +45 0x7A7C //RX_FDEQ_GAIN_6 +46 0x8280 //RX_FDEQ_GAIN_7 +47 0x848C //RX_FDEQ_GAIN_8 +48 0x8E98 //RX_FDEQ_GAIN_9 +49 0x9E95 //RX_FDEQ_GAIN_10 +50 0x8686 //RX_FDEQ_GAIN_11 +51 0x7868 //RX_FDEQ_GAIN_12 52 0x6050 //RX_FDEQ_GAIN_13 53 0x4848 //RX_FDEQ_GAIN_14 54 0x4848 //RX_FDEQ_GAIN_15 @@ -8728,9 +12462,9 @@ 71 0x0B0C //RX_FDEQ_BIN_8 72 0x0D0E //RX_FDEQ_BIN_9 73 0x0E0F //RX_FDEQ_BIN_10 -74 0x0F10 //RX_FDEQ_BIN_11 -75 0x1011 //RX_FDEQ_BIN_12 -76 0x1104 //RX_FDEQ_BIN_13 +74 0x0F0E //RX_FDEQ_BIN_11 +75 0x100D //RX_FDEQ_BIN_12 +76 0x110A //RX_FDEQ_BIN_13 77 0x0000 //RX_FDEQ_BIN_14 78 0x0000 //RX_FDEQ_BIN_15 79 0x0000 //RX_FDEQ_BIN_16 @@ -8767,14 +12501,866 @@ 110 0x0000 //RX_FDDRC_RESRV_0 129 0x0100 //RX_SPK_VOL 130 0x0000 //RX_VOL_RESRV_0 +#RX 2 +157 0x003C //RX_RECVFUNC_MODE_0 +158 0x0000 //RX_RECVFUNC_MODE_1 +159 0x0001 //RX_SAMPLINGFREQ_SIG +160 0x0001 //RX_SAMPLINGFREQ_PROC +161 0x000A //RX_FRAME_SZ +162 0x0000 //RX_DELAY_OPT +163 0x1000 //RX_TDDRC_ALPHA_UP_1 +164 0x1000 //RX_TDDRC_ALPHA_UP_2 +165 0x1000 //RX_TDDRC_ALPHA_UP_3 +166 0x1000 //RX_TDDRC_ALPHA_UP_4 +167 0x0600 //RX_PGA +168 0x7FFF //RX_A_HP +169 0x4000 //RX_B_PE +170 0x7800 //RX_THR_PITCH_DET_0 +171 0x7000 //RX_THR_PITCH_DET_1 +172 0x6000 //RX_THR_PITCH_DET_2 +173 0x0008 //RX_PITCH_BFR_LEN +174 0x0003 //RX_SBD_PITCH_DET +175 0x0100 //RX_PP_RESRV_0 +176 0x0020 //RX_PP_RESRV_1 +177 0x0400 //RX_N_SN_EST +178 0x000C //RX_N2_SN_EST +179 0x0014 //RX_NS_LVL_CTRL +180 0xF800 //RX_THR_SN_EST +181 0x7E00 //RX_LAMBDA_PFILT +182 0x000A //RX_FENS_RESRV_0 +183 0x0190 //RX_FENS_RESRV_1 +184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +187 0x0002 //RX_EXTRA_NS_L +188 0x0800 //RX_EXTRA_NS_A +189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +190 0x7000 //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +192 0x199A //RX_A_POST_FLT +193 0x1000 //RX_LMT_THRD +194 0x7FDF //RX_LMT_ALPHA +195 0x001C //RX_FDEQ_SUBNUM +196 0x4840 //RX_FDEQ_GAIN_0 +197 0x4040 //RX_FDEQ_GAIN_1 +198 0x485C //RX_FDEQ_GAIN_2 +199 0x6873 //RX_FDEQ_GAIN_3 +200 0x7F8E //RX_FDEQ_GAIN_4 +201 0x847E //RX_FDEQ_GAIN_5 +202 0x7E80 //RX_FDEQ_GAIN_6 +203 0x8884 //RX_FDEQ_GAIN_7 +204 0x8890 //RX_FDEQ_GAIN_8 +205 0x8E8F //RX_FDEQ_GAIN_9 +206 0x8B77 //RX_FDEQ_GAIN_10 +207 0x6F7F //RX_FDEQ_GAIN_11 +208 0x6568 //RX_FDEQ_GAIN_12 +209 0x6050 //RX_FDEQ_GAIN_13 +210 0x4848 //RX_FDEQ_GAIN_14 +211 0x4848 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0202 //RX_FDEQ_BIN_0 +221 0x0203 //RX_FDEQ_BIN_1 +222 0x0303 //RX_FDEQ_BIN_2 +223 0x0304 //RX_FDEQ_BIN_3 +224 0x0405 //RX_FDEQ_BIN_4 +225 0x0506 //RX_FDEQ_BIN_5 +226 0x0708 //RX_FDEQ_BIN_6 +227 0x090A //RX_FDEQ_BIN_7 +228 0x0B0C //RX_FDEQ_BIN_8 +229 0x0D0E //RX_FDEQ_BIN_9 +230 0x0E0F //RX_FDEQ_BIN_10 +231 0x0F10 //RX_FDEQ_BIN_11 +232 0x1011 //RX_FDEQ_BIN_12 +233 0x1104 //RX_FDEQ_BIN_13 +234 0x0000 //RX_FDEQ_BIN_14 +235 0x0000 //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x4000 //RX_FDEQ_RESRV_0 +245 0x0320 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0030 //RX_FDDRC_BAND_MARGIN_1 +248 0x0050 //RX_FDDRC_BAND_MARGIN_2 +249 0x0080 //RX_FDDRC_BAND_MARGIN_3 +250 0x0007 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x5000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x6400 //RX_FDDRC_THRD_3_2 +258 0x6400 //RX_FDDRC_THRD_3_3 +259 0x2000 //RX_FDDRC_SLANT_0_0 +260 0x2000 //RX_FDDRC_SLANT_0_1 +261 0x2000 //RX_FDDRC_SLANT_0_2 +262 0x2000 //RX_FDDRC_SLANT_0_3 +263 0x5333 //RX_FDDRC_SLANT_1_0 +264 0x5333 //RX_FDDRC_SLANT_1_1 +265 0x5333 //RX_FDDRC_SLANT_1_2 +266 0x5333 //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +268 0x0002 //RX_FILTINDX +269 0x0000 //RX_TDDRC_THRD_0 +270 0x0000 //RX_TDDRC_THRD_1 +271 0x1800 //RX_TDDRC_THRD_2 +272 0x1800 //RX_TDDRC_THRD_3 +273 0x3000 //RX_TDDRC_SLANT_0 +274 0x6E00 //RX_TDDRC_SLANT_1 +275 0x1000 //RX_TDDRC_ALPHA_UP_0 +276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x199A //RX_TDDRC_HMNC_GAIN +279 0x0001 //RX_TDDRC_SMT_FLAG +280 0x0CCD //RX_TDDRC_SMT_W +281 0x0407 //RX_TDDRC_DRC_GAIN +282 0x7C00 //RX_LAMBDA_PKA_FP +283 0x13E0 //RX_TPKA_FP +284 0x0080 //RX_MIN_G_FP +285 0x2000 //RX_MAX_G_FP +286 0x000C //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 +288 0x0000 //RX_MAXLEVEL_CNG +289 0x3000 //RX_BWE_UV_TH +290 0x3000 //RX_BWE_UV_TH2 +291 0x1800 //RX_BWE_UV_TH3 +292 0x1000 //RX_BWE_V_TH +293 0x04CD //RX_BWE_GAIN1_V_TH1 +294 0x0F33 //RX_BWE_GAIN1_V_TH2 +295 0x7333 //RX_BWE_UV_EQ +296 0x199A //RX_BWE_V_EQ +297 0x7333 //RX_BWE_TONE_TH +298 0x0004 //RX_BWE_UV_HOLD_T +299 0x6CCD //RX_BWE_GAIN2_ALPHA +300 0x799A //RX_BWE_GAIN3_ALPHA +301 0x001E //RX_BWE_CUTOFF +302 0x3000 //RX_BWE_GAINFILL +303 0x3200 //RX_BWE_MAXTH_TONE +304 0x2000 //RX_BWE_EQ_0 +305 0x2000 //RX_BWE_EQ_1 +306 0x2000 //RX_BWE_EQ_2 +307 0x2000 //RX_BWE_EQ_3 +308 0x2000 //RX_BWE_EQ_4 +309 0x2000 //RX_BWE_EQ_5 +310 0x2000 //RX_BWE_EQ_6 +311 0x0000 //RX_BWE_RESRV_0 +312 0x0000 //RX_BWE_RESRV_1 +313 0x0000 //RX_BWE_RESRV_2 +#VOL 0 +163 0x1000 //RX_TDDRC_ALPHA_UP_1 +164 0x1000 //RX_TDDRC_ALPHA_UP_2 +165 0x1000 //RX_TDDRC_ALPHA_UP_3 +166 0x1000 //RX_TDDRC_ALPHA_UP_4 +184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +190 0x7000 //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +269 0x0000 //RX_TDDRC_THRD_0 +270 0x0000 //RX_TDDRC_THRD_1 +271 0x1800 //RX_TDDRC_THRD_2 +272 0x1800 //RX_TDDRC_THRD_3 +273 0x3000 //RX_TDDRC_SLANT_0 +274 0x6E00 //RX_TDDRC_SLANT_1 +275 0x1000 //RX_TDDRC_ALPHA_UP_0 +276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x199A //RX_TDDRC_HMNC_GAIN +279 0x0001 //RX_TDDRC_SMT_FLAG +280 0x0CCD //RX_TDDRC_SMT_W +281 0x0407 //RX_TDDRC_DRC_GAIN +195 0x001C //RX_FDEQ_SUBNUM +196 0x4840 //RX_FDEQ_GAIN_0 +197 0x4040 //RX_FDEQ_GAIN_1 +198 0x485C //RX_FDEQ_GAIN_2 +199 0x6873 //RX_FDEQ_GAIN_3 +200 0x7F8E //RX_FDEQ_GAIN_4 +201 0x847E //RX_FDEQ_GAIN_5 +202 0x7E80 //RX_FDEQ_GAIN_6 +203 0x8884 //RX_FDEQ_GAIN_7 +204 0x8890 //RX_FDEQ_GAIN_8 +205 0x8E8F //RX_FDEQ_GAIN_9 +206 0x8B77 //RX_FDEQ_GAIN_10 +207 0x6F7F //RX_FDEQ_GAIN_11 +208 0x6568 //RX_FDEQ_GAIN_12 +209 0x6050 //RX_FDEQ_GAIN_13 +210 0x4848 //RX_FDEQ_GAIN_14 +211 0x4848 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0202 //RX_FDEQ_BIN_0 +221 0x0203 //RX_FDEQ_BIN_1 +222 0x0303 //RX_FDEQ_BIN_2 +223 0x0304 //RX_FDEQ_BIN_3 +224 0x0405 //RX_FDEQ_BIN_4 +225 0x0506 //RX_FDEQ_BIN_5 +226 0x0708 //RX_FDEQ_BIN_6 +227 0x090A //RX_FDEQ_BIN_7 +228 0x0B0C //RX_FDEQ_BIN_8 +229 0x0D0E //RX_FDEQ_BIN_9 +230 0x0E0F //RX_FDEQ_BIN_10 +231 0x0F10 //RX_FDEQ_BIN_11 +232 0x1011 //RX_FDEQ_BIN_12 +233 0x1104 //RX_FDEQ_BIN_13 +234 0x0000 //RX_FDEQ_BIN_14 +235 0x0000 //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x4000 //RX_FDEQ_RESRV_0 +245 0x0320 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0030 //RX_FDDRC_BAND_MARGIN_1 +248 0x0050 //RX_FDDRC_BAND_MARGIN_2 +249 0x0080 //RX_FDDRC_BAND_MARGIN_3 +250 0x0007 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x5000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x6400 //RX_FDDRC_THRD_3_2 +258 0x6400 //RX_FDDRC_THRD_3_3 +259 0x2000 //RX_FDDRC_SLANT_0_0 +260 0x2000 //RX_FDDRC_SLANT_0_1 +261 0x2000 //RX_FDDRC_SLANT_0_2 +262 0x2000 //RX_FDDRC_SLANT_0_3 +263 0x5333 //RX_FDDRC_SLANT_1_0 +264 0x5333 //RX_FDDRC_SLANT_1_1 +265 0x5333 //RX_FDDRC_SLANT_1_2 +266 0x5333 //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +286 0x000C //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 +#VOL 1 +163 0x1000 //RX_TDDRC_ALPHA_UP_1 +164 0x1000 //RX_TDDRC_ALPHA_UP_2 +165 0x1000 //RX_TDDRC_ALPHA_UP_3 +166 0x1000 //RX_TDDRC_ALPHA_UP_4 +184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +190 0x7000 //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +269 0x0000 //RX_TDDRC_THRD_0 +270 0x0000 //RX_TDDRC_THRD_1 +271 0x1800 //RX_TDDRC_THRD_2 +272 0x1800 //RX_TDDRC_THRD_3 +273 0x3000 //RX_TDDRC_SLANT_0 +274 0x6E00 //RX_TDDRC_SLANT_1 +275 0x1000 //RX_TDDRC_ALPHA_UP_0 +276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x199A //RX_TDDRC_HMNC_GAIN +279 0x0001 //RX_TDDRC_SMT_FLAG +280 0x0CCD //RX_TDDRC_SMT_W +281 0x0407 //RX_TDDRC_DRC_GAIN +195 0x001C //RX_FDEQ_SUBNUM +196 0x4840 //RX_FDEQ_GAIN_0 +197 0x4040 //RX_FDEQ_GAIN_1 +198 0x485C //RX_FDEQ_GAIN_2 +199 0x6873 //RX_FDEQ_GAIN_3 +200 0x7F8E //RX_FDEQ_GAIN_4 +201 0x847E //RX_FDEQ_GAIN_5 +202 0x7E80 //RX_FDEQ_GAIN_6 +203 0x8884 //RX_FDEQ_GAIN_7 +204 0x8890 //RX_FDEQ_GAIN_8 +205 0x8E8F //RX_FDEQ_GAIN_9 +206 0x8B77 //RX_FDEQ_GAIN_10 +207 0x6F7F //RX_FDEQ_GAIN_11 +208 0x6568 //RX_FDEQ_GAIN_12 +209 0x6050 //RX_FDEQ_GAIN_13 +210 0x4848 //RX_FDEQ_GAIN_14 +211 0x4848 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0202 //RX_FDEQ_BIN_0 +221 0x0203 //RX_FDEQ_BIN_1 +222 0x0303 //RX_FDEQ_BIN_2 +223 0x0304 //RX_FDEQ_BIN_3 +224 0x0405 //RX_FDEQ_BIN_4 +225 0x0506 //RX_FDEQ_BIN_5 +226 0x0708 //RX_FDEQ_BIN_6 +227 0x090A //RX_FDEQ_BIN_7 +228 0x0B0C //RX_FDEQ_BIN_8 +229 0x0D0E //RX_FDEQ_BIN_9 +230 0x0E0F //RX_FDEQ_BIN_10 +231 0x0F10 //RX_FDEQ_BIN_11 +232 0x1011 //RX_FDEQ_BIN_12 +233 0x1104 //RX_FDEQ_BIN_13 +234 0x0000 //RX_FDEQ_BIN_14 +235 0x0000 //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x4000 //RX_FDEQ_RESRV_0 +245 0x0320 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0030 //RX_FDDRC_BAND_MARGIN_1 +248 0x0050 //RX_FDDRC_BAND_MARGIN_2 +249 0x0080 //RX_FDDRC_BAND_MARGIN_3 +250 0x0007 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x5000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x6400 //RX_FDDRC_THRD_3_2 +258 0x6400 //RX_FDDRC_THRD_3_3 +259 0x2000 //RX_FDDRC_SLANT_0_0 +260 0x2000 //RX_FDDRC_SLANT_0_1 +261 0x2000 //RX_FDDRC_SLANT_0_2 +262 0x2000 //RX_FDDRC_SLANT_0_3 +263 0x5333 //RX_FDDRC_SLANT_1_0 +264 0x5333 //RX_FDDRC_SLANT_1_1 +265 0x5333 //RX_FDDRC_SLANT_1_2 +266 0x5333 //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +286 0x0014 //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 +#VOL 2 +163 0x1000 //RX_TDDRC_ALPHA_UP_1 +164 0x1000 //RX_TDDRC_ALPHA_UP_2 +165 0x1000 //RX_TDDRC_ALPHA_UP_3 +166 0x1000 //RX_TDDRC_ALPHA_UP_4 +184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +190 0x7000 //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +269 0x0000 //RX_TDDRC_THRD_0 +270 0x0000 //RX_TDDRC_THRD_1 +271 0x1800 //RX_TDDRC_THRD_2 +272 0x1800 //RX_TDDRC_THRD_3 +273 0x3000 //RX_TDDRC_SLANT_0 +274 0x6E00 //RX_TDDRC_SLANT_1 +275 0x1000 //RX_TDDRC_ALPHA_UP_0 +276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x199A //RX_TDDRC_HMNC_GAIN +279 0x0001 //RX_TDDRC_SMT_FLAG +280 0x0CCD //RX_TDDRC_SMT_W +281 0x0407 //RX_TDDRC_DRC_GAIN +195 0x001C //RX_FDEQ_SUBNUM +196 0x4840 //RX_FDEQ_GAIN_0 +197 0x4040 //RX_FDEQ_GAIN_1 +198 0x485C //RX_FDEQ_GAIN_2 +199 0x6873 //RX_FDEQ_GAIN_3 +200 0x7F8E //RX_FDEQ_GAIN_4 +201 0x847E //RX_FDEQ_GAIN_5 +202 0x7E80 //RX_FDEQ_GAIN_6 +203 0x8884 //RX_FDEQ_GAIN_7 +204 0x8890 //RX_FDEQ_GAIN_8 +205 0x8E8F //RX_FDEQ_GAIN_9 +206 0x8B77 //RX_FDEQ_GAIN_10 +207 0x6F7F //RX_FDEQ_GAIN_11 +208 0x6568 //RX_FDEQ_GAIN_12 +209 0x6050 //RX_FDEQ_GAIN_13 +210 0x4848 //RX_FDEQ_GAIN_14 +211 0x4848 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0202 //RX_FDEQ_BIN_0 +221 0x0203 //RX_FDEQ_BIN_1 +222 0x0303 //RX_FDEQ_BIN_2 +223 0x0304 //RX_FDEQ_BIN_3 +224 0x0405 //RX_FDEQ_BIN_4 +225 0x0506 //RX_FDEQ_BIN_5 +226 0x0708 //RX_FDEQ_BIN_6 +227 0x090A //RX_FDEQ_BIN_7 +228 0x0B0C //RX_FDEQ_BIN_8 +229 0x0D0E //RX_FDEQ_BIN_9 +230 0x0E0F //RX_FDEQ_BIN_10 +231 0x0F10 //RX_FDEQ_BIN_11 +232 0x1011 //RX_FDEQ_BIN_12 +233 0x1104 //RX_FDEQ_BIN_13 +234 0x0000 //RX_FDEQ_BIN_14 +235 0x0000 //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x4000 //RX_FDEQ_RESRV_0 +245 0x0320 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0030 //RX_FDDRC_BAND_MARGIN_1 +248 0x0050 //RX_FDDRC_BAND_MARGIN_2 +249 0x0080 //RX_FDDRC_BAND_MARGIN_3 +250 0x0007 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x5000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x6400 //RX_FDDRC_THRD_3_2 +258 0x6400 //RX_FDDRC_THRD_3_3 +259 0x2000 //RX_FDDRC_SLANT_0_0 +260 0x2000 //RX_FDDRC_SLANT_0_1 +261 0x2000 //RX_FDDRC_SLANT_0_2 +262 0x2000 //RX_FDDRC_SLANT_0_3 +263 0x5333 //RX_FDDRC_SLANT_1_0 +264 0x5333 //RX_FDDRC_SLANT_1_1 +265 0x5333 //RX_FDDRC_SLANT_1_2 +266 0x5333 //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +286 0x0020 //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 +#VOL 3 +163 0x1000 //RX_TDDRC_ALPHA_UP_1 +164 0x1000 //RX_TDDRC_ALPHA_UP_2 +165 0x1000 //RX_TDDRC_ALPHA_UP_3 +166 0x1000 //RX_TDDRC_ALPHA_UP_4 +184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +190 0x7000 //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +269 0x0000 //RX_TDDRC_THRD_0 +270 0x0000 //RX_TDDRC_THRD_1 +271 0x1800 //RX_TDDRC_THRD_2 +272 0x1800 //RX_TDDRC_THRD_3 +273 0x3000 //RX_TDDRC_SLANT_0 +274 0x6E00 //RX_TDDRC_SLANT_1 +275 0x1000 //RX_TDDRC_ALPHA_UP_0 +276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x199A //RX_TDDRC_HMNC_GAIN +279 0x0001 //RX_TDDRC_SMT_FLAG +280 0x0CCD //RX_TDDRC_SMT_W +281 0x0407 //RX_TDDRC_DRC_GAIN +195 0x001C //RX_FDEQ_SUBNUM +196 0x4840 //RX_FDEQ_GAIN_0 +197 0x4040 //RX_FDEQ_GAIN_1 +198 0x485C //RX_FDEQ_GAIN_2 +199 0x6873 //RX_FDEQ_GAIN_3 +200 0x7F8E //RX_FDEQ_GAIN_4 +201 0x847E //RX_FDEQ_GAIN_5 +202 0x7E80 //RX_FDEQ_GAIN_6 +203 0x8884 //RX_FDEQ_GAIN_7 +204 0x8890 //RX_FDEQ_GAIN_8 +205 0x8E8F //RX_FDEQ_GAIN_9 +206 0x8B77 //RX_FDEQ_GAIN_10 +207 0x6F7F //RX_FDEQ_GAIN_11 +208 0x6568 //RX_FDEQ_GAIN_12 +209 0x6050 //RX_FDEQ_GAIN_13 +210 0x4848 //RX_FDEQ_GAIN_14 +211 0x4848 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0202 //RX_FDEQ_BIN_0 +221 0x0203 //RX_FDEQ_BIN_1 +222 0x0303 //RX_FDEQ_BIN_2 +223 0x0304 //RX_FDEQ_BIN_3 +224 0x0405 //RX_FDEQ_BIN_4 +225 0x0506 //RX_FDEQ_BIN_5 +226 0x0708 //RX_FDEQ_BIN_6 +227 0x090A //RX_FDEQ_BIN_7 +228 0x0B0C //RX_FDEQ_BIN_8 +229 0x0D0E //RX_FDEQ_BIN_9 +230 0x0E0F //RX_FDEQ_BIN_10 +231 0x0F10 //RX_FDEQ_BIN_11 +232 0x1011 //RX_FDEQ_BIN_12 +233 0x1104 //RX_FDEQ_BIN_13 +234 0x0000 //RX_FDEQ_BIN_14 +235 0x0000 //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x4000 //RX_FDEQ_RESRV_0 +245 0x0320 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0030 //RX_FDDRC_BAND_MARGIN_1 +248 0x0050 //RX_FDDRC_BAND_MARGIN_2 +249 0x0080 //RX_FDDRC_BAND_MARGIN_3 +250 0x0007 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x5000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x6400 //RX_FDDRC_THRD_3_2 +258 0x6400 //RX_FDDRC_THRD_3_3 +259 0x2000 //RX_FDDRC_SLANT_0_0 +260 0x2000 //RX_FDDRC_SLANT_0_1 +261 0x2000 //RX_FDDRC_SLANT_0_2 +262 0x2000 //RX_FDDRC_SLANT_0_3 +263 0x5333 //RX_FDDRC_SLANT_1_0 +264 0x5333 //RX_FDDRC_SLANT_1_1 +265 0x5333 //RX_FDDRC_SLANT_1_2 +266 0x5333 //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +286 0x0035 //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 +#VOL 4 +163 0x1000 //RX_TDDRC_ALPHA_UP_1 +164 0x1000 //RX_TDDRC_ALPHA_UP_2 +165 0x1000 //RX_TDDRC_ALPHA_UP_3 +166 0x1000 //RX_TDDRC_ALPHA_UP_4 +184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +190 0x7000 //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +269 0x0000 //RX_TDDRC_THRD_0 +270 0x0000 //RX_TDDRC_THRD_1 +271 0x1800 //RX_TDDRC_THRD_2 +272 0x1800 //RX_TDDRC_THRD_3 +273 0x3000 //RX_TDDRC_SLANT_0 +274 0x6E00 //RX_TDDRC_SLANT_1 +275 0x1000 //RX_TDDRC_ALPHA_UP_0 +276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x199A //RX_TDDRC_HMNC_GAIN +279 0x0001 //RX_TDDRC_SMT_FLAG +280 0x0CCD //RX_TDDRC_SMT_W +281 0x0407 //RX_TDDRC_DRC_GAIN +195 0x001C //RX_FDEQ_SUBNUM +196 0x4840 //RX_FDEQ_GAIN_0 +197 0x4040 //RX_FDEQ_GAIN_1 +198 0x485C //RX_FDEQ_GAIN_2 +199 0x6873 //RX_FDEQ_GAIN_3 +200 0x7F8E //RX_FDEQ_GAIN_4 +201 0x847E //RX_FDEQ_GAIN_5 +202 0x7E80 //RX_FDEQ_GAIN_6 +203 0x8884 //RX_FDEQ_GAIN_7 +204 0x8890 //RX_FDEQ_GAIN_8 +205 0x8E8F //RX_FDEQ_GAIN_9 +206 0x8B77 //RX_FDEQ_GAIN_10 +207 0x6F7F //RX_FDEQ_GAIN_11 +208 0x6568 //RX_FDEQ_GAIN_12 +209 0x6050 //RX_FDEQ_GAIN_13 +210 0x4848 //RX_FDEQ_GAIN_14 +211 0x4848 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0202 //RX_FDEQ_BIN_0 +221 0x0203 //RX_FDEQ_BIN_1 +222 0x0303 //RX_FDEQ_BIN_2 +223 0x0304 //RX_FDEQ_BIN_3 +224 0x0405 //RX_FDEQ_BIN_4 +225 0x0506 //RX_FDEQ_BIN_5 +226 0x0708 //RX_FDEQ_BIN_6 +227 0x090A //RX_FDEQ_BIN_7 +228 0x0B0C //RX_FDEQ_BIN_8 +229 0x0D0E //RX_FDEQ_BIN_9 +230 0x0E0F //RX_FDEQ_BIN_10 +231 0x0F10 //RX_FDEQ_BIN_11 +232 0x1011 //RX_FDEQ_BIN_12 +233 0x1104 //RX_FDEQ_BIN_13 +234 0x0000 //RX_FDEQ_BIN_14 +235 0x0000 //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x4000 //RX_FDEQ_RESRV_0 +245 0x0320 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0030 //RX_FDDRC_BAND_MARGIN_1 +248 0x0050 //RX_FDDRC_BAND_MARGIN_2 +249 0x0080 //RX_FDDRC_BAND_MARGIN_3 +250 0x0007 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x5000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x6400 //RX_FDDRC_THRD_3_2 +258 0x6400 //RX_FDDRC_THRD_3_3 +259 0x2000 //RX_FDDRC_SLANT_0_0 +260 0x2000 //RX_FDDRC_SLANT_0_1 +261 0x2000 //RX_FDDRC_SLANT_0_2 +262 0x2000 //RX_FDDRC_SLANT_0_3 +263 0x5333 //RX_FDDRC_SLANT_1_0 +264 0x5333 //RX_FDDRC_SLANT_1_1 +265 0x5333 //RX_FDDRC_SLANT_1_2 +266 0x5333 //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +286 0x0057 //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 +#VOL 5 +163 0x1000 //RX_TDDRC_ALPHA_UP_1 +164 0x1000 //RX_TDDRC_ALPHA_UP_2 +165 0x1000 //RX_TDDRC_ALPHA_UP_3 +166 0x1000 //RX_TDDRC_ALPHA_UP_4 +184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +190 0x7000 //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +269 0x0000 //RX_TDDRC_THRD_0 +270 0x0000 //RX_TDDRC_THRD_1 +271 0x1800 //RX_TDDRC_THRD_2 +272 0x1800 //RX_TDDRC_THRD_3 +273 0x3000 //RX_TDDRC_SLANT_0 +274 0x6E00 //RX_TDDRC_SLANT_1 +275 0x1000 //RX_TDDRC_ALPHA_UP_0 +276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x199A //RX_TDDRC_HMNC_GAIN +279 0x0001 //RX_TDDRC_SMT_FLAG +280 0x0CCD //RX_TDDRC_SMT_W +281 0x0407 //RX_TDDRC_DRC_GAIN +195 0x001C //RX_FDEQ_SUBNUM +196 0x4840 //RX_FDEQ_GAIN_0 +197 0x4040 //RX_FDEQ_GAIN_1 +198 0x485C //RX_FDEQ_GAIN_2 +199 0x6873 //RX_FDEQ_GAIN_3 +200 0x7F8E //RX_FDEQ_GAIN_4 +201 0x847E //RX_FDEQ_GAIN_5 +202 0x7E80 //RX_FDEQ_GAIN_6 +203 0x8884 //RX_FDEQ_GAIN_7 +204 0x8890 //RX_FDEQ_GAIN_8 +205 0x8E8F //RX_FDEQ_GAIN_9 +206 0x8B77 //RX_FDEQ_GAIN_10 +207 0x6F7F //RX_FDEQ_GAIN_11 +208 0x6568 //RX_FDEQ_GAIN_12 +209 0x6050 //RX_FDEQ_GAIN_13 +210 0x4848 //RX_FDEQ_GAIN_14 +211 0x4848 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0202 //RX_FDEQ_BIN_0 +221 0x0203 //RX_FDEQ_BIN_1 +222 0x0303 //RX_FDEQ_BIN_2 +223 0x0304 //RX_FDEQ_BIN_3 +224 0x0405 //RX_FDEQ_BIN_4 +225 0x0506 //RX_FDEQ_BIN_5 +226 0x0708 //RX_FDEQ_BIN_6 +227 0x090A //RX_FDEQ_BIN_7 +228 0x0B0C //RX_FDEQ_BIN_8 +229 0x0D0E //RX_FDEQ_BIN_9 +230 0x0E0F //RX_FDEQ_BIN_10 +231 0x0F10 //RX_FDEQ_BIN_11 +232 0x1011 //RX_FDEQ_BIN_12 +233 0x1104 //RX_FDEQ_BIN_13 +234 0x0000 //RX_FDEQ_BIN_14 +235 0x0000 //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x4000 //RX_FDEQ_RESRV_0 +245 0x0320 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0030 //RX_FDDRC_BAND_MARGIN_1 +248 0x0050 //RX_FDDRC_BAND_MARGIN_2 +249 0x0080 //RX_FDDRC_BAND_MARGIN_3 +250 0x0007 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x5000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x6400 //RX_FDDRC_THRD_3_2 +258 0x6400 //RX_FDDRC_THRD_3_3 +259 0x2000 //RX_FDDRC_SLANT_0_0 +260 0x2000 //RX_FDDRC_SLANT_0_1 +261 0x2000 //RX_FDDRC_SLANT_0_2 +262 0x2000 //RX_FDDRC_SLANT_0_3 +263 0x5333 //RX_FDDRC_SLANT_1_0 +264 0x5333 //RX_FDDRC_SLANT_1_1 +265 0x5333 //RX_FDDRC_SLANT_1_2 +266 0x5333 //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +286 0x008E //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 +#VOL 6 +163 0x1000 //RX_TDDRC_ALPHA_UP_1 +164 0x1000 //RX_TDDRC_ALPHA_UP_2 +165 0x1000 //RX_TDDRC_ALPHA_UP_3 +166 0x1000 //RX_TDDRC_ALPHA_UP_4 +184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +190 0x7000 //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +269 0x0000 //RX_TDDRC_THRD_0 +270 0x0000 //RX_TDDRC_THRD_1 +271 0x1800 //RX_TDDRC_THRD_2 +272 0x1800 //RX_TDDRC_THRD_3 +273 0x3000 //RX_TDDRC_SLANT_0 +274 0x6E00 //RX_TDDRC_SLANT_1 +275 0x1000 //RX_TDDRC_ALPHA_UP_0 +276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x199A //RX_TDDRC_HMNC_GAIN +279 0x0001 //RX_TDDRC_SMT_FLAG +280 0x0CCD //RX_TDDRC_SMT_W +281 0x0407 //RX_TDDRC_DRC_GAIN +195 0x001C //RX_FDEQ_SUBNUM +196 0x4840 //RX_FDEQ_GAIN_0 +197 0x4040 //RX_FDEQ_GAIN_1 +198 0x485C //RX_FDEQ_GAIN_2 +199 0x6873 //RX_FDEQ_GAIN_3 +200 0x7F8E //RX_FDEQ_GAIN_4 +201 0x847E //RX_FDEQ_GAIN_5 +202 0x7E80 //RX_FDEQ_GAIN_6 +203 0x8884 //RX_FDEQ_GAIN_7 +204 0x8890 //RX_FDEQ_GAIN_8 +205 0x8E8F //RX_FDEQ_GAIN_9 +206 0x8B77 //RX_FDEQ_GAIN_10 +207 0x6F7F //RX_FDEQ_GAIN_11 +208 0x6568 //RX_FDEQ_GAIN_12 +209 0x6050 //RX_FDEQ_GAIN_13 +210 0x4848 //RX_FDEQ_GAIN_14 +211 0x4848 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0202 //RX_FDEQ_BIN_0 +221 0x0203 //RX_FDEQ_BIN_1 +222 0x0303 //RX_FDEQ_BIN_2 +223 0x0304 //RX_FDEQ_BIN_3 +224 0x0405 //RX_FDEQ_BIN_4 +225 0x0506 //RX_FDEQ_BIN_5 +226 0x0708 //RX_FDEQ_BIN_6 +227 0x090A //RX_FDEQ_BIN_7 +228 0x0B0C //RX_FDEQ_BIN_8 +229 0x0D0E //RX_FDEQ_BIN_9 +230 0x0E0F //RX_FDEQ_BIN_10 +231 0x0F10 //RX_FDEQ_BIN_11 +232 0x1011 //RX_FDEQ_BIN_12 +233 0x1104 //RX_FDEQ_BIN_13 +234 0x0000 //RX_FDEQ_BIN_14 +235 0x0000 //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x4000 //RX_FDEQ_RESRV_0 +245 0x0320 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0030 //RX_FDDRC_BAND_MARGIN_1 +248 0x0050 //RX_FDDRC_BAND_MARGIN_2 +249 0x0080 //RX_FDDRC_BAND_MARGIN_3 +250 0x0007 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x5000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x6400 //RX_FDDRC_THRD_3_2 +258 0x6400 //RX_FDDRC_THRD_3_3 +259 0x2000 //RX_FDDRC_SLANT_0_0 +260 0x2000 //RX_FDDRC_SLANT_0_1 +261 0x2000 //RX_FDDRC_SLANT_0_2 +262 0x2000 //RX_FDDRC_SLANT_0_3 +263 0x5333 //RX_FDDRC_SLANT_1_0 +264 0x5333 //RX_FDDRC_SLANT_1_1 +265 0x5333 //RX_FDDRC_SLANT_1_2 +266 0x5333 //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +286 0x0100 //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 #CASE_NAME HANDSET-HANDSET-VOICE_GENERIC-SWB -#PARAM_TYPE TX+RX -#TOTAL_CUSTOM_STEP 7 +#PARAM_MODE Full +#PARAM_TYPE TX+2RX +#TOTAL_CUSTOM_STEP 7+7 #TX 0 0x0000 //TX_OPERATION_MODE_0 1 0x0000 //TX_OPERATION_MODE_1 -2 0x0026 //TX_PATCH_REG +2 0x0076 //TX_PATCH_REG 3 0x6F7E //TX_SENDFUNC_MODE_0 4 0x0001 //TX_SENDFUNC_MODE_1 5 0x0002 //TX_NUM_MIC @@ -8793,7 +13379,7 @@ 18 0x0000 //TX_SYS_RESRV_2 19 0x0000 //TX_SYS_RESRV_3 20 0x0000 //TX_DIST2REF0 -21 0x009D //TX_DIST2REF1 +21 0x009C //TX_DIST2REF1 22 0x0000 //TX_DIST2REF_02 23 0x0000 //TX_DIST2REF_03 24 0x0000 //TX_DIST2REF_04 @@ -9023,12 +13609,12 @@ 248 0xF800 //TX_THR_SN_EST_6 249 0xF700 //TX_THR_SN_EST_7 250 0x0000 //TX_DELTA_THR_SN_EST_0 -251 0x0100 //TX_DELTA_THR_SN_EST_1 +251 0x0200 //TX_DELTA_THR_SN_EST_1 252 0x0200 //TX_DELTA_THR_SN_EST_2 253 0x0200 //TX_DELTA_THR_SN_EST_3 -254 0x0200 //TX_DELTA_THR_SN_EST_4 -255 0x0100 //TX_DELTA_THR_SN_EST_5 -256 0x0200 //TX_DELTA_THR_SN_EST_6 +254 0x0100 //TX_DELTA_THR_SN_EST_4 +255 0x0200 //TX_DELTA_THR_SN_EST_5 +256 0x0100 //TX_DELTA_THR_SN_EST_6 257 0x0200 //TX_DELTA_THR_SN_EST_7 258 0x4000 //TX_LAMBDA_NN_EST_0 259 0x4000 //TX_LAMBDA_NN_EST_1 @@ -9054,18 +13640,18 @@ 279 0x1000 //TX_B_POST_FLT_0 280 0x1000 //TX_B_POST_FLT_1 281 0x0014 //TX_NS_LVL_CTRL_0 -282 0x0016 //TX_NS_LVL_CTRL_1 -283 0x002C //TX_NS_LVL_CTRL_2 -284 0x0016 //TX_NS_LVL_CTRL_3 -285 0x0018 //TX_NS_LVL_CTRL_4 -286 0x0016 //TX_NS_LVL_CTRL_5 -287 0x0012 //TX_NS_LVL_CTRL_6 +282 0x002C //TX_NS_LVL_CTRL_1 +283 0x0016 //TX_NS_LVL_CTRL_2 +284 0x0018 //TX_NS_LVL_CTRL_3 +285 0x0016 //TX_NS_LVL_CTRL_4 +286 0x0012 //TX_NS_LVL_CTRL_5 +287 0x0016 //TX_NS_LVL_CTRL_6 288 0x0017 //TX_NS_LVL_CTRL_7 289 0x000E //TX_MIN_GAIN_S_0 -290 0x0012 //TX_MIN_GAIN_S_1 -291 0x000D //TX_MIN_GAIN_S_2 -292 0x0012 //TX_MIN_GAIN_S_3 -293 0x0010 //TX_MIN_GAIN_S_4 +290 0x000D //TX_MIN_GAIN_S_1 +291 0x0012 //TX_MIN_GAIN_S_2 +292 0x0010 //TX_MIN_GAIN_S_3 +293 0x0012 //TX_MIN_GAIN_S_4 294 0x0012 //TX_MIN_GAIN_S_5 295 0x0012 //TX_MIN_GAIN_S_6 296 0x0012 //TX_MIN_GAIN_S_7 @@ -9087,29 +13673,29 @@ 312 0x7FFF //TX_A_POST_FILT_0 313 0x2000 //TX_A_POST_FILT_1 314 0x4000 //TX_A_POST_FILT_S_0 -315 0x5000 //TX_A_POST_FILT_S_1 +315 0x4000 //TX_A_POST_FILT_S_1 316 0x4000 //TX_A_POST_FILT_S_2 317 0x4000 //TX_A_POST_FILT_S_3 318 0x4000 //TX_A_POST_FILT_S_4 319 0x4000 //TX_A_POST_FILT_S_5 -320 0x4000 //TX_A_POST_FILT_S_6 +320 0x5000 //TX_A_POST_FILT_S_6 321 0x7000 //TX_A_POST_FILT_S_7 322 0x1000 //TX_B_POST_FILT_0 323 0x1000 //TX_B_POST_FILT_1 -324 0x3000 //TX_B_POST_FILT_2 -325 0x1000 //TX_B_POST_FILT_3 -326 0x5000 //TX_B_POST_FILT_4 -327 0x2000 //TX_B_POST_FILT_5 -328 0x6000 //TX_B_POST_FILT_6 +324 0x2000 //TX_B_POST_FILT_2 +325 0x2000 //TX_B_POST_FILT_3 +326 0x2000 //TX_B_POST_FILT_4 +327 0x1000 //TX_B_POST_FILT_5 +328 0x3000 //TX_B_POST_FILT_6 329 0x3000 //TX_B_POST_FILT_7 330 0x1000 //TX_B_LESSCUT_RTO_S_0 -331 0x6000 //TX_B_LESSCUT_RTO_S_1 -332 0x6000 //TX_B_LESSCUT_RTO_S_2 -333 0x6000 //TX_B_LESSCUT_RTO_S_3 -334 0x6000 //TX_B_LESSCUT_RTO_S_4 -335 0x6000 //TX_B_LESSCUT_RTO_S_5 -336 0x7FFF //TX_B_LESSCUT_RTO_S_6 -337 0x7FFF //TX_B_LESSCUT_RTO_S_7 +331 0x1000 //TX_B_LESSCUT_RTO_S_1 +332 0x1000 //TX_B_LESSCUT_RTO_S_2 +333 0x1000 //TX_B_LESSCUT_RTO_S_3 +334 0x1000 //TX_B_LESSCUT_RTO_S_4 +335 0x1000 //TX_B_LESSCUT_RTO_S_5 +336 0x1000 //TX_B_LESSCUT_RTO_S_6 +337 0x1000 //TX_B_LESSCUT_RTO_S_7 338 0x7E14 //TX_LAMBDA_PFILT 339 0x7C29 //TX_LAMBDA_PFILT_S_0 340 0x7C29 //TX_LAMBDA_PFILT_S_1 @@ -9152,10 +13738,10 @@ 377 0x4E20 //TX_NOISE_TH_5_4 378 0x1194 //TX_NOISE_TH_6 379 0x0014 //TX_MINENOISE_TH -380 0x4000 //TX_MINENOISE_MIC0_TH_MTS -381 0xFFEE //TX_MINENOISE_MIC0_TH_EXP -382 0x6000 //TX_MINENOISE_MIC0_S_TH_MTS -383 0xFFF3 //TX_MINENOISE_MIC0_S_TH_EXP +380 0xD508 //TX_MORENS_TFMASK_TH +381 0x0001 //TX_DRC_QUIET_FLOOR +382 0x6D60 //TX_RATIODTL_CUT_TH +383 0x0DAC //TX_DT_CUT_K1 384 0x00A5 //TX_OUT_ENER_S_TH_CLEAN 385 0x00A5 //TX_OUT_ENER_S_TH_LESSCLEAN 386 0x00A5 //TX_OUT_ENER_S_TH_NOISY @@ -9163,15 +13749,15 @@ 388 0x0200 //TX_OUT_ENER_TH_SPEECH 389 0x2000 //TX_SN_NPB_GAIN 390 0x0000 //TX_NN_NPB_GAIN -391 0x0000 //TX_CSX_ALPHA_0 -392 0x0000 //TX_CSX_ALPHA_1 -393 0x0000 //TX_CSX_ALPHA_2 -394 0x0000 //TX_CSX_ALPHA_3 -395 0x0800 //TX_MU_ARSP_EST -396 0x00C8 //TX_P_OUTBEAM_MIN_TH +391 0x3000 //TX_POST_MASK_SUP_HSNE +392 0x07D0 //TX_TAIL_DET_TH +393 0x4000 //TX_B_LESSCUT_RTO_WTA +394 0x0000 //TX_MEL_G_R +395 0x0080 //TX_SUPHIGH_TH +396 0x0000 //TX_MASK_G_R 397 0x0002 //TX_EXTRA_NS_L -398 0x0800 //TX_EXTRA_NS_A -399 0x0005 //TX_VR_NOISE_FLOOR_TH +398 0x1800 //TX_C_POST_FLT_MASK +399 0x7FFF //TX_A_POST_FLT_WNS 400 0x0148 //TX_MIN_G_LOW300HZ 401 0x0004 //TX_MAXLEVEL_CNG 402 0x00B4 //TX_STN_NOISE_TH @@ -9286,16 +13872,16 @@ 511 0x6666 //TX_MIC_TO_BFGAIN 512 0x0000 //TX_MICTOBFGAIN0 513 0x0000 //TX_FASTMUE_TH -514 0x0000 //TX_DERVB_LEN_0 -515 0x0000 //TX_DERVB_LEN_1 -516 0x0000 //TX_RHO_DERVB -517 0x0000 //TX_MIC_INDX_DERVB -518 0x0000 //TX_MU_DERVB -519 0x0000 //TX_DR_RESRV_0 -520 0x0000 //TX_DR_RESRV_1 -521 0x0000 //TX_DR_RESRV_2 -522 0x0000 //TX_DR_RESRV_3 -523 0x0000 //TX_DR_RESRV_4 +514 0x2CCC //TX_DEREVERB_LF_MU +515 0x3200 //TX_DEREVERB_HF_MU +516 0x0007 //TX_DEREVERB_DELAY +517 0x0004 //TX_DEREVERB_COEF_LEN +518 0x0003 //TX_DEREVERB_DNR +519 0x0000 //TX_DEREVERB_ALPHA +520 0x0000 //TX_DEREVERB_BETA +521 0x3A98 //TX_GSC_RTOL_TH +522 0x3A98 //TX_GSC_RTOH_TH +523 0x7E2C //TX_WIDE2_MEANHTH 524 0x0000 //TX_DR_RESRV_5 525 0x0000 //TX_DR_RESRV_6 526 0x0000 //TX_DR_RESRV_7 @@ -9343,18 +13929,18 @@ 568 0x5048 //TX_FDEQ_GAIN_1 569 0x4C4C //TX_FDEQ_GAIN_2 570 0x474A //TX_FDEQ_GAIN_3 -571 0x423C //TX_FDEQ_GAIN_4 -572 0x4042 //TX_FDEQ_GAIN_5 -573 0x474F //TX_FDEQ_GAIN_6 -574 0x5444 //TX_FDEQ_GAIN_7 +571 0x4640 //TX_FDEQ_GAIN_4 +572 0x4446 //TX_FDEQ_GAIN_5 +573 0x4B53 //TX_FDEQ_GAIN_6 +574 0x5448 //TX_FDEQ_GAIN_7 575 0x4243 //TX_FDEQ_GAIN_8 -576 0x4344 //TX_FDEQ_GAIN_9 -577 0x414D //TX_FDEQ_GAIN_10 -578 0x4A47 //TX_FDEQ_GAIN_11 -579 0x4346 //TX_FDEQ_GAIN_12 -580 0x4C4F //TX_FDEQ_GAIN_13 -581 0x565B //TX_FDEQ_GAIN_14 -582 0x6448 //TX_FDEQ_GAIN_15 +576 0x434C //TX_FDEQ_GAIN_9 +577 0x484D //TX_FDEQ_GAIN_10 +578 0x4D4D //TX_FDEQ_GAIN_11 +579 0x4B4E //TX_FDEQ_GAIN_12 +580 0x5054 //TX_FDEQ_GAIN_13 +581 0x5D68 //TX_FDEQ_GAIN_14 +582 0x7C6B //TX_FDEQ_GAIN_15 583 0x4848 //TX_FDEQ_GAIN_16 584 0x4848 //TX_FDEQ_GAIN_17 585 0x4848 //TX_FDEQ_GAIN_18 @@ -9397,14 +13983,14 @@ 622 0x4848 //TX_PREEQ_GAIN_MIC0_5 623 0x4848 //TX_PREEQ_GAIN_MIC0_6 624 0x4848 //TX_PREEQ_GAIN_MIC0_7 -625 0x4646 //TX_PREEQ_GAIN_MIC0_8 -626 0x4545 //TX_PREEQ_GAIN_MIC0_9 -627 0x4545 //TX_PREEQ_GAIN_MIC0_10 -628 0x4544 //TX_PREEQ_GAIN_MIC0_11 -629 0x4444 //TX_PREEQ_GAIN_MIC0_12 -630 0x4343 //TX_PREEQ_GAIN_MIC0_13 -631 0x4241 //TX_PREEQ_GAIN_MIC0_14 -632 0x3C3E //TX_PREEQ_GAIN_MIC0_15 +625 0x4848 //TX_PREEQ_GAIN_MIC0_8 +626 0x4848 //TX_PREEQ_GAIN_MIC0_9 +627 0x4848 //TX_PREEQ_GAIN_MIC0_10 +628 0x4848 //TX_PREEQ_GAIN_MIC0_11 +629 0x4848 //TX_PREEQ_GAIN_MIC0_12 +630 0x4848 //TX_PREEQ_GAIN_MIC0_13 +631 0x4848 //TX_PREEQ_GAIN_MIC0_14 +632 0x4848 //TX_PREEQ_GAIN_MIC0_15 633 0x4848 //TX_PREEQ_GAIN_MIC0_16 634 0x4848 //TX_PREEQ_GAIN_MIC0_17 635 0x4848 //TX_PREEQ_GAIN_MIC0_18 @@ -9446,15 +14032,15 @@ 671 0x4848 //TX_PREEQ_GAIN_MIC1_5 672 0x4848 //TX_PREEQ_GAIN_MIC1_6 673 0x4848 //TX_PREEQ_GAIN_MIC1_7 -674 0x484A //TX_PREEQ_GAIN_MIC1_8 -675 0x4B4C //TX_PREEQ_GAIN_MIC1_9 -676 0x4B4A //TX_PREEQ_GAIN_MIC1_10 -677 0x4A48 //TX_PREEQ_GAIN_MIC1_11 -678 0x4C4C //TX_PREEQ_GAIN_MIC1_12 -679 0x4C4C //TX_PREEQ_GAIN_MIC1_13 -680 0x4848 //TX_PREEQ_GAIN_MIC1_14 -681 0x4848 //TX_PREEQ_GAIN_MIC1_15 -682 0x4848 //TX_PREEQ_GAIN_MIC1_16 +674 0x4848 //TX_PREEQ_GAIN_MIC1_8 +675 0x494A //TX_PREEQ_GAIN_MIC1_9 +676 0x4B4B //TX_PREEQ_GAIN_MIC1_10 +677 0x4B4B //TX_PREEQ_GAIN_MIC1_11 +678 0x4D4C //TX_PREEQ_GAIN_MIC1_12 +679 0x4A48 //TX_PREEQ_GAIN_MIC1_13 +680 0x4840 //TX_PREEQ_GAIN_MIC1_14 +681 0x3434 //TX_PREEQ_GAIN_MIC1_15 +682 0x3C48 //TX_PREEQ_GAIN_MIC1_16 683 0x4848 //TX_PREEQ_GAIN_MIC1_17 684 0x4848 //TX_PREEQ_GAIN_MIC1_18 685 0x4848 //TX_PREEQ_GAIN_MIC1_19 @@ -9468,17 +14054,17 @@ 693 0x0304 //TX_PREEQ_BIN_MIC1_3 694 0x0405 //TX_PREEQ_BIN_MIC1_4 695 0x0506 //TX_PREEQ_BIN_MIC1_5 -696 0x0708 //TX_PREEQ_BIN_MIC1_6 -697 0x090A //TX_PREEQ_BIN_MIC1_7 -698 0x0B0C //TX_PREEQ_BIN_MIC1_8 -699 0x0D0E //TX_PREEQ_BIN_MIC1_9 -700 0x0F10 //TX_PREEQ_BIN_MIC1_10 -701 0x1011 //TX_PREEQ_BIN_MIC1_11 -702 0x1112 //TX_PREEQ_BIN_MIC1_12 -703 0x120B //TX_PREEQ_BIN_MIC1_13 -704 0x0000 //TX_PREEQ_BIN_MIC1_14 -705 0x0000 //TX_PREEQ_BIN_MIC1_15 -706 0x0000 //TX_PREEQ_BIN_MIC1_16 +696 0x0808 //TX_PREEQ_BIN_MIC1_6 +697 0x0809 //TX_PREEQ_BIN_MIC1_7 +698 0x0A0A //TX_PREEQ_BIN_MIC1_8 +699 0x0C10 //TX_PREEQ_BIN_MIC1_9 +700 0x1013 //TX_PREEQ_BIN_MIC1_10 +701 0x1414 //TX_PREEQ_BIN_MIC1_11 +702 0x261E //TX_PREEQ_BIN_MIC1_12 +703 0x1E14 //TX_PREEQ_BIN_MIC1_13 +704 0x1414 //TX_PREEQ_BIN_MIC1_14 +705 0x2814 //TX_PREEQ_BIN_MIC1_15 +706 0x401E //TX_PREEQ_BIN_MIC1_16 707 0x0000 //TX_PREEQ_BIN_MIC1_17 708 0x0000 //TX_PREEQ_BIN_MIC1_18 709 0x0000 //TX_PREEQ_BIN_MIC1_19 @@ -9638,7 +14224,7 @@ 863 0x199A //TX_TDDRC_HMNC_GAIN 864 0x0000 //TX_TDDRC_SMT_FLAG 865 0x0CCD //TX_TDDRC_SMT_W -866 0x0550 //TX_TDDRC_DRC_GAIN +866 0x0504 //TX_TDDRC_DRC_GAIN 867 0x7FFF //TX_TDDRC_LMT_THRD 868 0x0000 //TX_TDDRC_LMT_ALPHA 869 0x0000 //TX_TFMASKLTH @@ -9669,8 +14255,73 @@ 894 0xC000 //TX_FASTNS_SSA_THHFL 895 0xCCCC //TX_FASTNS_SSA_THLFH 896 0xD999 //TX_FASTNS_SSA_THHFH +897 0x2339 //TX_SENDFUNC_REG_MICMUTE +898 0x0021 //TX_SENDFUNC_REG_MICMUTE1 +899 0x02BC //TX_MICMUTE_RATIO_THR +900 0x0140 //TX_MICMUTE_AMP_THR +901 0x0004 //TX_MICMUTE_HPF_IND +902 0x00C0 //TX_MICMUTE_LOG_EYR_TH +903 0x0008 //TX_MICMUTE_CVG_TIME +904 0x0008 //TX_MICMUTE_RELEASE_TIME +905 0x01FE //TX_MIC_VOLUME_MIC0MUTE +906 0x0020 //TX_MICMUTE_EPD_OFFSET_0 +907 0x001E //TX_MICMUTE_FRQ_AEC_L +908 0x7999 //TX_MICMUTE_EAD_THR +909 0x7FFF //TX_MICMUTE_LAMBDA_CB_NLE +910 0x7FFF //TX_MICMUTE_LAMBDA_RE_EST +911 0x4000 //TX_DTD_THR1_MICMUTE_0 +912 0x7000 //TX_DTD_THR1_MICMUTE_1 +913 0x7FFF //TX_DTD_THR1_MICMUTE_2 +914 0x7FFF //TX_DTD_THR1_MICMUTE_3 +915 0x6CCC //TX_DTD_THR2_MICMUTE_0 +916 0x0400 //TX_MICMUTE_MIN_EQ_RE_EST_0 +917 0x0400 //TX_MICMUTE_MIN_EQ_RE_EST_1 +918 0x1000 //TX_MICMUTE_MIN_EQ_RE_EST_2 +919 0x7FFF //TX_MICMUTE_MIN_EQ_RE_EST_3 +920 0x7FFF //TX_MICMUTE_MIN_EQ_RE_EST_4 +921 0x4000 //TX_MICMUTE_C_POST_FLT +922 0x03E8 //TX_MICMUTE_DT_CUT_K +923 0x0001 //TX_MICMUTE_DT_CUT_THR +924 0x03E8 //TX_MICMUTE_DT_CUT_K2 +925 0x0001 //TX_MICMUTE_DT_CUT_THR2 +926 0x0064 //TX_MICMUTE_DT2_HOLD_N +927 0x1000 //TX_MICMUTE_RATIODTH_THCUT +928 0x1000 //TX_MICMUTE_B_POST_FLT_ECHOL +929 0x7FFF //TX_MICMUTE_B_POST_FLT_ECHOH +930 0x0400 //TX_MICMUTE_C_POST_FLT_MASK +931 0x7999 //TX_MICMUTE_RATIODTL_CUT_TH +932 0x0258 //TX_MICMUTE_DT_CUT_K1 +933 0x0800 //TX_MICMUTE_N2_SN_EST +934 0xFC00 //TX_MICMUTE_THR_SN_EST_0 +935 0x001C //TX_MICMUTE_MIN_G_CTRL_0 +936 0x6000 //TX_MICMUTE_A_POST_FILT_S_0 +937 0x7000 //TX_MICMUTE_B_POST_FILT_0 +938 0x2710 //TX_MIC1RUB_AMP_THR +939 0x0010 //TX_MIC1MUTE_RATIO_THR +940 0x0450 //TX_MIC1MUTE_AMP_THR +941 0x0008 //TX_MIC1MUTE_CVG_TIME +942 0x0008 //TX_MIC1MUTE_RELEASE_TIME +943 0x0000 //TX_AMS_RESRV_01 +944 0x0000 //TX_AMS_RESRV_02 +945 0x0000 //TX_AMS_RESRV_03 +946 0x0000 //TX_AMS_RESRV_04 +947 0x0000 //TX_AMS_RESRV_05 +948 0x0000 //TX_AMS_RESRV_06 +949 0x0000 //TX_AMS_RESRV_07 +950 0x0000 //TX_AMS_RESRV_08 +951 0x0000 //TX_AMS_RESRV_09 +952 0x0000 //TX_AMS_RESRV_10 +953 0x0000 //TX_AMS_RESRV_11 +954 0x0000 //TX_AMS_RESRV_12 +955 0x0000 //TX_AMS_RESRV_13 +956 0x0000 //TX_AMS_RESRV_14 +957 0x0000 //TX_AMS_RESRV_15 +958 0x0000 //TX_AMS_RESRV_16 +959 0x0000 //TX_AMS_RESRV_17 +960 0x0000 //TX_AMS_RESRV_18 +961 0x0000 //TX_AMS_RESRV_19 #RX -0 0x003C //RX_RECVFUNC_MODE_0 +0 0x203C //RX_RECVFUNC_MODE_0 1 0x0000 //RX_RECVFUNC_MODE_1 2 0x0003 //RX_SAMPLINGFREQ_SIG 3 0x0003 //RX_SAMPLINGFREQ_PROC @@ -9680,7 +14331,7 @@ 7 0x1000 //RX_TDDRC_ALPHA_UP_2 8 0x1000 //RX_TDDRC_ALPHA_UP_3 9 0x1000 //RX_TDDRC_ALPHA_UP_4 -10 0x0600 //RX_PGA +10 0x05AA //RX_PGA 11 0x7FFF //RX_A_HP 12 0x4000 //RX_B_PE 13 0x5800 //RX_THR_PITCH_DET_0 @@ -9709,22 +14360,22 @@ 36 0x0000 //RX_LMT_THRD 37 0x4000 //RX_LMT_ALPHA 38 0x0020 //RX_FDEQ_SUBNUM -39 0x4840 //RX_FDEQ_GAIN_0 -40 0x4040 //RX_FDEQ_GAIN_1 -41 0x4050 //RX_FDEQ_GAIN_2 -42 0x5D6C //RX_FDEQ_GAIN_3 -43 0x7B86 //RX_FDEQ_GAIN_4 -44 0x8186 //RX_FDEQ_GAIN_5 -45 0x8688 //RX_FDEQ_GAIN_6 -46 0x9097 //RX_FDEQ_GAIN_7 -47 0x929F //RX_FDEQ_GAIN_8 -48 0x9CA0 //RX_FDEQ_GAIN_9 -49 0xA391 //RX_FDEQ_GAIN_10 -50 0x8A82 //RX_FDEQ_GAIN_11 -51 0x726E //RX_FDEQ_GAIN_12 -52 0x704E //RX_FDEQ_GAIN_13 -53 0x6565 //RX_FDEQ_GAIN_14 -54 0x698A //RX_FDEQ_GAIN_15 +39 0x483E //RX_FDEQ_GAIN_0 +40 0x3E3E //RX_FDEQ_GAIN_1 +41 0x3E4C //RX_FDEQ_GAIN_2 +42 0x506A //RX_FDEQ_GAIN_3 +43 0x8082 //RX_FDEQ_GAIN_4 +44 0x8982 //RX_FDEQ_GAIN_5 +45 0x8880 //RX_FDEQ_GAIN_6 +46 0x8888 //RX_FDEQ_GAIN_7 +47 0x949C //RX_FDEQ_GAIN_8 +48 0x9AAB //RX_FDEQ_GAIN_9 +49 0xAEA0 //RX_FDEQ_GAIN_10 +50 0x9487 //RX_FDEQ_GAIN_11 +51 0x6F64 //RX_FDEQ_GAIN_12 +52 0x625A //RX_FDEQ_GAIN_13 +53 0x5D70 //RX_FDEQ_GAIN_14 +54 0x7C8C //RX_FDEQ_GAIN_15 55 0x4848 //RX_FDEQ_GAIN_16 56 0x4848 //RX_FDEQ_GAIN_17 57 0x4848 //RX_FDEQ_GAIN_18 @@ -9735,19 +14386,19 @@ 62 0x4848 //RX_FDEQ_GAIN_23 63 0x0202 //RX_FDEQ_BIN_0 64 0x0202 //RX_FDEQ_BIN_1 -65 0x0302 //RX_FDEQ_BIN_2 -66 0x0304 //RX_FDEQ_BIN_3 -67 0x0405 //RX_FDEQ_BIN_4 -68 0x0506 //RX_FDEQ_BIN_5 +65 0x0301 //RX_FDEQ_BIN_2 +66 0x0404 //RX_FDEQ_BIN_3 +67 0x0406 //RX_FDEQ_BIN_4 +68 0x0109 //RX_FDEQ_BIN_5 69 0x0708 //RX_FDEQ_BIN_6 70 0x090A //RX_FDEQ_BIN_7 71 0x0B0C //RX_FDEQ_BIN_8 72 0x0D0E //RX_FDEQ_BIN_9 73 0x1013 //RX_FDEQ_BIN_10 74 0x1719 //RX_FDEQ_BIN_11 -75 0x1B1E //RX_FDEQ_BIN_12 -76 0x1E1E //RX_FDEQ_BIN_13 -77 0x1E28 //RX_FDEQ_BIN_14 +75 0x1B0F //RX_FDEQ_BIN_12 +76 0x141E //RX_FDEQ_BIN_13 +77 0x3728 //RX_FDEQ_BIN_14 78 0x282C //RX_FDEQ_BIN_15 79 0x0000 //RX_FDEQ_BIN_16 80 0x0000 //RX_FDEQ_BIN_17 @@ -9786,20 +14437,20 @@ 113 0x0002 //RX_TDDRC_THRD_1 114 0x1800 //RX_TDDRC_THRD_2 115 0x1800 //RX_TDDRC_THRD_3 -116 0x3000 //RX_TDDRC_SLANT_0 -117 0x6E00 //RX_TDDRC_SLANT_1 +116 0x7FFF //RX_TDDRC_SLANT_0 +117 0x7FFF //RX_TDDRC_SLANT_1 118 0x1000 //RX_TDDRC_ALPHA_UP_0 119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 120 0x0000 //RX_TDDRC_HMNC_FLAG 121 0x199A //RX_TDDRC_HMNC_GAIN 122 0x0001 //RX_TDDRC_SMT_FLAG 123 0x0CCD //RX_TDDRC_SMT_W -124 0x0523 //RX_TDDRC_DRC_GAIN +124 0x0650 //RX_TDDRC_DRC_GAIN 125 0x7C00 //RX_LAMBDA_PKA_FP 126 0x13E0 //RX_TPKA_FP 127 0x0080 //RX_MIN_G_FP 128 0x2000 //RX_MAX_G_FP -129 0x000B //RX_SPK_VOL +129 0x0100 //RX_SPK_VOL 130 0x0000 //RX_VOL_RESRV_0 131 0x0000 //RX_MAXLEVEL_CNG 132 0x3000 //RX_BWE_UV_TH @@ -9842,32 +14493,32 @@ 113 0x0002 //RX_TDDRC_THRD_1 114 0x1800 //RX_TDDRC_THRD_2 115 0x1800 //RX_TDDRC_THRD_3 -116 0x3000 //RX_TDDRC_SLANT_0 -117 0x6E00 //RX_TDDRC_SLANT_1 +116 0x7FFF //RX_TDDRC_SLANT_0 +117 0x7FFF //RX_TDDRC_SLANT_1 118 0x1000 //RX_TDDRC_ALPHA_UP_0 119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 120 0x0000 //RX_TDDRC_HMNC_FLAG 121 0x199A //RX_TDDRC_HMNC_GAIN 122 0x0001 //RX_TDDRC_SMT_FLAG 123 0x0CCD //RX_TDDRC_SMT_W -124 0x0523 //RX_TDDRC_DRC_GAIN +124 0x0650 //RX_TDDRC_DRC_GAIN 38 0x0020 //RX_FDEQ_SUBNUM -39 0x4840 //RX_FDEQ_GAIN_0 -40 0x4040 //RX_FDEQ_GAIN_1 -41 0x4050 //RX_FDEQ_GAIN_2 -42 0x5D6C //RX_FDEQ_GAIN_3 -43 0x7B86 //RX_FDEQ_GAIN_4 -44 0x8186 //RX_FDEQ_GAIN_5 -45 0x8688 //RX_FDEQ_GAIN_6 -46 0x9097 //RX_FDEQ_GAIN_7 -47 0x929F //RX_FDEQ_GAIN_8 -48 0x9CA0 //RX_FDEQ_GAIN_9 -49 0xA391 //RX_FDEQ_GAIN_10 -50 0x8A82 //RX_FDEQ_GAIN_11 -51 0x726E //RX_FDEQ_GAIN_12 -52 0x704E //RX_FDEQ_GAIN_13 -53 0x6565 //RX_FDEQ_GAIN_14 -54 0x698A //RX_FDEQ_GAIN_15 +39 0x483E //RX_FDEQ_GAIN_0 +40 0x3E3E //RX_FDEQ_GAIN_1 +41 0x3E4C //RX_FDEQ_GAIN_2 +42 0x506A //RX_FDEQ_GAIN_3 +43 0x8082 //RX_FDEQ_GAIN_4 +44 0x8982 //RX_FDEQ_GAIN_5 +45 0x8880 //RX_FDEQ_GAIN_6 +46 0x8888 //RX_FDEQ_GAIN_7 +47 0x949C //RX_FDEQ_GAIN_8 +48 0x9AAB //RX_FDEQ_GAIN_9 +49 0xAEA0 //RX_FDEQ_GAIN_10 +50 0x9487 //RX_FDEQ_GAIN_11 +51 0x6F64 //RX_FDEQ_GAIN_12 +52 0x625A //RX_FDEQ_GAIN_13 +53 0x5D70 //RX_FDEQ_GAIN_14 +54 0x7C8C //RX_FDEQ_GAIN_15 55 0x4848 //RX_FDEQ_GAIN_16 56 0x4848 //RX_FDEQ_GAIN_17 57 0x4848 //RX_FDEQ_GAIN_18 @@ -9878,19 +14529,19 @@ 62 0x4848 //RX_FDEQ_GAIN_23 63 0x0202 //RX_FDEQ_BIN_0 64 0x0202 //RX_FDEQ_BIN_1 -65 0x0302 //RX_FDEQ_BIN_2 -66 0x0304 //RX_FDEQ_BIN_3 -67 0x0405 //RX_FDEQ_BIN_4 -68 0x0506 //RX_FDEQ_BIN_5 +65 0x0301 //RX_FDEQ_BIN_2 +66 0x0404 //RX_FDEQ_BIN_3 +67 0x0406 //RX_FDEQ_BIN_4 +68 0x0109 //RX_FDEQ_BIN_5 69 0x0708 //RX_FDEQ_BIN_6 70 0x090A //RX_FDEQ_BIN_7 71 0x0B0C //RX_FDEQ_BIN_8 72 0x0D0E //RX_FDEQ_BIN_9 73 0x1013 //RX_FDEQ_BIN_10 74 0x1719 //RX_FDEQ_BIN_11 -75 0x1B1E //RX_FDEQ_BIN_12 -76 0x1E1E //RX_FDEQ_BIN_13 -77 0x1E28 //RX_FDEQ_BIN_14 +75 0x1B0F //RX_FDEQ_BIN_12 +76 0x141E //RX_FDEQ_BIN_13 +77 0x3728 //RX_FDEQ_BIN_14 78 0x282C //RX_FDEQ_BIN_15 79 0x0000 //RX_FDEQ_BIN_16 80 0x0000 //RX_FDEQ_BIN_17 @@ -9924,7 +14575,7 @@ 108 0x5333 //RX_FDDRC_SLANT_1_2 109 0x5333 //RX_FDDRC_SLANT_1_3 110 0x0000 //RX_FDDRC_RESRV_0 -129 0x000B //RX_SPK_VOL +129 0x000A //RX_SPK_VOL 130 0x0000 //RX_VOL_RESRV_0 #VOL 1 6 0x1000 //RX_TDDRC_ALPHA_UP_1 @@ -9941,32 +14592,32 @@ 113 0x0002 //RX_TDDRC_THRD_1 114 0x1800 //RX_TDDRC_THRD_2 115 0x1800 //RX_TDDRC_THRD_3 -116 0x3000 //RX_TDDRC_SLANT_0 -117 0x6E00 //RX_TDDRC_SLANT_1 +116 0x7FFF //RX_TDDRC_SLANT_0 +117 0x7FFF //RX_TDDRC_SLANT_1 118 0x1000 //RX_TDDRC_ALPHA_UP_0 119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 120 0x0000 //RX_TDDRC_HMNC_FLAG 121 0x199A //RX_TDDRC_HMNC_GAIN 122 0x0001 //RX_TDDRC_SMT_FLAG 123 0x0CCD //RX_TDDRC_SMT_W -124 0x04E6 //RX_TDDRC_DRC_GAIN +124 0x0650 //RX_TDDRC_DRC_GAIN 38 0x0020 //RX_FDEQ_SUBNUM -39 0x4840 //RX_FDEQ_GAIN_0 -40 0x4040 //RX_FDEQ_GAIN_1 -41 0x4050 //RX_FDEQ_GAIN_2 -42 0x5D6C //RX_FDEQ_GAIN_3 -43 0x7B86 //RX_FDEQ_GAIN_4 -44 0x8186 //RX_FDEQ_GAIN_5 -45 0x8688 //RX_FDEQ_GAIN_6 -46 0x9097 //RX_FDEQ_GAIN_7 -47 0x929F //RX_FDEQ_GAIN_8 -48 0x9CA0 //RX_FDEQ_GAIN_9 -49 0xA391 //RX_FDEQ_GAIN_10 -50 0x8A82 //RX_FDEQ_GAIN_11 -51 0x726E //RX_FDEQ_GAIN_12 -52 0x704E //RX_FDEQ_GAIN_13 -53 0x6565 //RX_FDEQ_GAIN_14 -54 0x698A //RX_FDEQ_GAIN_15 +39 0x483E //RX_FDEQ_GAIN_0 +40 0x3E3E //RX_FDEQ_GAIN_1 +41 0x3E4C //RX_FDEQ_GAIN_2 +42 0x506A //RX_FDEQ_GAIN_3 +43 0x8082 //RX_FDEQ_GAIN_4 +44 0x8982 //RX_FDEQ_GAIN_5 +45 0x8880 //RX_FDEQ_GAIN_6 +46 0x8888 //RX_FDEQ_GAIN_7 +47 0x949C //RX_FDEQ_GAIN_8 +48 0x9AAB //RX_FDEQ_GAIN_9 +49 0xAEA0 //RX_FDEQ_GAIN_10 +50 0x9487 //RX_FDEQ_GAIN_11 +51 0x6F64 //RX_FDEQ_GAIN_12 +52 0x625A //RX_FDEQ_GAIN_13 +53 0x5D70 //RX_FDEQ_GAIN_14 +54 0x7C8C //RX_FDEQ_GAIN_15 55 0x4848 //RX_FDEQ_GAIN_16 56 0x4848 //RX_FDEQ_GAIN_17 57 0x4848 //RX_FDEQ_GAIN_18 @@ -9977,19 +14628,19 @@ 62 0x4848 //RX_FDEQ_GAIN_23 63 0x0202 //RX_FDEQ_BIN_0 64 0x0202 //RX_FDEQ_BIN_1 -65 0x0302 //RX_FDEQ_BIN_2 -66 0x0304 //RX_FDEQ_BIN_3 -67 0x0405 //RX_FDEQ_BIN_4 -68 0x0506 //RX_FDEQ_BIN_5 +65 0x0301 //RX_FDEQ_BIN_2 +66 0x0404 //RX_FDEQ_BIN_3 +67 0x0406 //RX_FDEQ_BIN_4 +68 0x0109 //RX_FDEQ_BIN_5 69 0x0708 //RX_FDEQ_BIN_6 70 0x090A //RX_FDEQ_BIN_7 71 0x0B0C //RX_FDEQ_BIN_8 72 0x0D0E //RX_FDEQ_BIN_9 73 0x1013 //RX_FDEQ_BIN_10 74 0x1719 //RX_FDEQ_BIN_11 -75 0x1B1E //RX_FDEQ_BIN_12 -76 0x1E1E //RX_FDEQ_BIN_13 -77 0x1E28 //RX_FDEQ_BIN_14 +75 0x1B0F //RX_FDEQ_BIN_12 +76 0x141E //RX_FDEQ_BIN_13 +77 0x3728 //RX_FDEQ_BIN_14 78 0x282C //RX_FDEQ_BIN_15 79 0x0000 //RX_FDEQ_BIN_16 80 0x0000 //RX_FDEQ_BIN_17 @@ -10023,7 +14674,7 @@ 108 0x5333 //RX_FDDRC_SLANT_1_2 109 0x5333 //RX_FDDRC_SLANT_1_3 110 0x0000 //RX_FDDRC_RESRV_0 -129 0x0013 //RX_SPK_VOL +129 0x0010 //RX_SPK_VOL 130 0x0000 //RX_VOL_RESRV_0 #VOL 2 6 0x1000 //RX_TDDRC_ALPHA_UP_1 @@ -10040,32 +14691,32 @@ 113 0x0002 //RX_TDDRC_THRD_1 114 0x1800 //RX_TDDRC_THRD_2 115 0x1800 //RX_TDDRC_THRD_3 -116 0x3000 //RX_TDDRC_SLANT_0 -117 0x6E00 //RX_TDDRC_SLANT_1 +116 0x7FFF //RX_TDDRC_SLANT_0 +117 0x7FFF //RX_TDDRC_SLANT_1 118 0x1000 //RX_TDDRC_ALPHA_UP_0 119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 120 0x0000 //RX_TDDRC_HMNC_FLAG 121 0x199A //RX_TDDRC_HMNC_GAIN 122 0x0001 //RX_TDDRC_SMT_FLAG 123 0x0CCD //RX_TDDRC_SMT_W -124 0x04E6 //RX_TDDRC_DRC_GAIN +124 0x0650 //RX_TDDRC_DRC_GAIN 38 0x0020 //RX_FDEQ_SUBNUM -39 0x4840 //RX_FDEQ_GAIN_0 -40 0x4040 //RX_FDEQ_GAIN_1 -41 0x4050 //RX_FDEQ_GAIN_2 -42 0x5D6C //RX_FDEQ_GAIN_3 -43 0x7B86 //RX_FDEQ_GAIN_4 -44 0x8186 //RX_FDEQ_GAIN_5 -45 0x8688 //RX_FDEQ_GAIN_6 -46 0x9097 //RX_FDEQ_GAIN_7 -47 0x929F //RX_FDEQ_GAIN_8 -48 0x9CA0 //RX_FDEQ_GAIN_9 -49 0xA391 //RX_FDEQ_GAIN_10 -50 0x8A82 //RX_FDEQ_GAIN_11 -51 0x726E //RX_FDEQ_GAIN_12 -52 0x704E //RX_FDEQ_GAIN_13 -53 0x6565 //RX_FDEQ_GAIN_14 -54 0x698A //RX_FDEQ_GAIN_15 +39 0x483E //RX_FDEQ_GAIN_0 +40 0x3E3E //RX_FDEQ_GAIN_1 +41 0x3E4C //RX_FDEQ_GAIN_2 +42 0x506A //RX_FDEQ_GAIN_3 +43 0x8082 //RX_FDEQ_GAIN_4 +44 0x8982 //RX_FDEQ_GAIN_5 +45 0x8880 //RX_FDEQ_GAIN_6 +46 0x8888 //RX_FDEQ_GAIN_7 +47 0x949C //RX_FDEQ_GAIN_8 +48 0x9AAB //RX_FDEQ_GAIN_9 +49 0xAEA0 //RX_FDEQ_GAIN_10 +50 0x9487 //RX_FDEQ_GAIN_11 +51 0x6F64 //RX_FDEQ_GAIN_12 +52 0x625A //RX_FDEQ_GAIN_13 +53 0x5D70 //RX_FDEQ_GAIN_14 +54 0x7C8C //RX_FDEQ_GAIN_15 55 0x4848 //RX_FDEQ_GAIN_16 56 0x4848 //RX_FDEQ_GAIN_17 57 0x4848 //RX_FDEQ_GAIN_18 @@ -10076,19 +14727,19 @@ 62 0x4848 //RX_FDEQ_GAIN_23 63 0x0202 //RX_FDEQ_BIN_0 64 0x0202 //RX_FDEQ_BIN_1 -65 0x0302 //RX_FDEQ_BIN_2 -66 0x0304 //RX_FDEQ_BIN_3 -67 0x0405 //RX_FDEQ_BIN_4 -68 0x0506 //RX_FDEQ_BIN_5 +65 0x0301 //RX_FDEQ_BIN_2 +66 0x0404 //RX_FDEQ_BIN_3 +67 0x0406 //RX_FDEQ_BIN_4 +68 0x0109 //RX_FDEQ_BIN_5 69 0x0708 //RX_FDEQ_BIN_6 70 0x090A //RX_FDEQ_BIN_7 71 0x0B0C //RX_FDEQ_BIN_8 72 0x0D0E //RX_FDEQ_BIN_9 73 0x1013 //RX_FDEQ_BIN_10 74 0x1719 //RX_FDEQ_BIN_11 -75 0x1B1E //RX_FDEQ_BIN_12 -76 0x1E1E //RX_FDEQ_BIN_13 -77 0x1E28 //RX_FDEQ_BIN_14 +75 0x1B0F //RX_FDEQ_BIN_12 +76 0x141E //RX_FDEQ_BIN_13 +77 0x3728 //RX_FDEQ_BIN_14 78 0x282C //RX_FDEQ_BIN_15 79 0x0000 //RX_FDEQ_BIN_16 80 0x0000 //RX_FDEQ_BIN_17 @@ -10122,7 +14773,7 @@ 108 0x5333 //RX_FDDRC_SLANT_1_2 109 0x5333 //RX_FDDRC_SLANT_1_3 110 0x0000 //RX_FDDRC_RESRV_0 -129 0x001F //RX_SPK_VOL +129 0x001B //RX_SPK_VOL 130 0x0000 //RX_VOL_RESRV_0 #VOL 3 6 0x1000 //RX_TDDRC_ALPHA_UP_1 @@ -10139,32 +14790,32 @@ 113 0x0002 //RX_TDDRC_THRD_1 114 0x1800 //RX_TDDRC_THRD_2 115 0x1800 //RX_TDDRC_THRD_3 -116 0x3000 //RX_TDDRC_SLANT_0 -117 0x6E00 //RX_TDDRC_SLANT_1 +116 0x7FFF //RX_TDDRC_SLANT_0 +117 0x7FFF //RX_TDDRC_SLANT_1 118 0x1000 //RX_TDDRC_ALPHA_UP_0 119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 120 0x0000 //RX_TDDRC_HMNC_FLAG 121 0x199A //RX_TDDRC_HMNC_GAIN 122 0x0001 //RX_TDDRC_SMT_FLAG 123 0x0CCD //RX_TDDRC_SMT_W -124 0x04E6 //RX_TDDRC_DRC_GAIN +124 0x0650 //RX_TDDRC_DRC_GAIN 38 0x0020 //RX_FDEQ_SUBNUM -39 0x4840 //RX_FDEQ_GAIN_0 -40 0x4040 //RX_FDEQ_GAIN_1 -41 0x4050 //RX_FDEQ_GAIN_2 -42 0x5D6C //RX_FDEQ_GAIN_3 -43 0x7B86 //RX_FDEQ_GAIN_4 -44 0x8186 //RX_FDEQ_GAIN_5 -45 0x8688 //RX_FDEQ_GAIN_6 -46 0x9097 //RX_FDEQ_GAIN_7 -47 0x929F //RX_FDEQ_GAIN_8 -48 0x9CA0 //RX_FDEQ_GAIN_9 -49 0xA391 //RX_FDEQ_GAIN_10 -50 0x8A82 //RX_FDEQ_GAIN_11 -51 0x726E //RX_FDEQ_GAIN_12 -52 0x704E //RX_FDEQ_GAIN_13 -53 0x6565 //RX_FDEQ_GAIN_14 -54 0x698A //RX_FDEQ_GAIN_15 +39 0x483E //RX_FDEQ_GAIN_0 +40 0x3E3E //RX_FDEQ_GAIN_1 +41 0x3E4C //RX_FDEQ_GAIN_2 +42 0x506A //RX_FDEQ_GAIN_3 +43 0x8082 //RX_FDEQ_GAIN_4 +44 0x8982 //RX_FDEQ_GAIN_5 +45 0x8880 //RX_FDEQ_GAIN_6 +46 0x8888 //RX_FDEQ_GAIN_7 +47 0x949C //RX_FDEQ_GAIN_8 +48 0x9AAB //RX_FDEQ_GAIN_9 +49 0xAEA0 //RX_FDEQ_GAIN_10 +50 0x9487 //RX_FDEQ_GAIN_11 +51 0x6F64 //RX_FDEQ_GAIN_12 +52 0x625A //RX_FDEQ_GAIN_13 +53 0x5D70 //RX_FDEQ_GAIN_14 +54 0x7C8C //RX_FDEQ_GAIN_15 55 0x4848 //RX_FDEQ_GAIN_16 56 0x4848 //RX_FDEQ_GAIN_17 57 0x4848 //RX_FDEQ_GAIN_18 @@ -10175,19 +14826,19 @@ 62 0x4848 //RX_FDEQ_GAIN_23 63 0x0202 //RX_FDEQ_BIN_0 64 0x0202 //RX_FDEQ_BIN_1 -65 0x0302 //RX_FDEQ_BIN_2 -66 0x0304 //RX_FDEQ_BIN_3 -67 0x0405 //RX_FDEQ_BIN_4 -68 0x0506 //RX_FDEQ_BIN_5 +65 0x0301 //RX_FDEQ_BIN_2 +66 0x0404 //RX_FDEQ_BIN_3 +67 0x0406 //RX_FDEQ_BIN_4 +68 0x0109 //RX_FDEQ_BIN_5 69 0x0708 //RX_FDEQ_BIN_6 70 0x090A //RX_FDEQ_BIN_7 71 0x0B0C //RX_FDEQ_BIN_8 72 0x0D0E //RX_FDEQ_BIN_9 73 0x1013 //RX_FDEQ_BIN_10 74 0x1719 //RX_FDEQ_BIN_11 -75 0x1B1E //RX_FDEQ_BIN_12 -76 0x1E1E //RX_FDEQ_BIN_13 -77 0x1E28 //RX_FDEQ_BIN_14 +75 0x1B0F //RX_FDEQ_BIN_12 +76 0x141E //RX_FDEQ_BIN_13 +77 0x3728 //RX_FDEQ_BIN_14 78 0x282C //RX_FDEQ_BIN_15 79 0x0000 //RX_FDEQ_BIN_16 80 0x0000 //RX_FDEQ_BIN_17 @@ -10221,7 +14872,7 @@ 108 0x5333 //RX_FDDRC_SLANT_1_2 109 0x5333 //RX_FDDRC_SLANT_1_3 110 0x0000 //RX_FDDRC_RESRV_0 -129 0x0032 //RX_SPK_VOL +129 0x002B //RX_SPK_VOL 130 0x0000 //RX_VOL_RESRV_0 #VOL 4 6 0x1000 //RX_TDDRC_ALPHA_UP_1 @@ -10238,32 +14889,32 @@ 113 0x0002 //RX_TDDRC_THRD_1 114 0x1800 //RX_TDDRC_THRD_2 115 0x1800 //RX_TDDRC_THRD_3 -116 0x3000 //RX_TDDRC_SLANT_0 -117 0x6E00 //RX_TDDRC_SLANT_1 +116 0x7FFF //RX_TDDRC_SLANT_0 +117 0x7FFF //RX_TDDRC_SLANT_1 118 0x1000 //RX_TDDRC_ALPHA_UP_0 119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 120 0x0000 //RX_TDDRC_HMNC_FLAG 121 0x199A //RX_TDDRC_HMNC_GAIN 122 0x0001 //RX_TDDRC_SMT_FLAG 123 0x0CCD //RX_TDDRC_SMT_W -124 0x04E6 //RX_TDDRC_DRC_GAIN +124 0x0650 //RX_TDDRC_DRC_GAIN 38 0x0020 //RX_FDEQ_SUBNUM -39 0x4840 //RX_FDEQ_GAIN_0 -40 0x4040 //RX_FDEQ_GAIN_1 -41 0x4050 //RX_FDEQ_GAIN_2 -42 0x5D6C //RX_FDEQ_GAIN_3 -43 0x7B86 //RX_FDEQ_GAIN_4 -44 0x8186 //RX_FDEQ_GAIN_5 -45 0x8688 //RX_FDEQ_GAIN_6 -46 0x9097 //RX_FDEQ_GAIN_7 -47 0x929F //RX_FDEQ_GAIN_8 -48 0x9CA0 //RX_FDEQ_GAIN_9 -49 0xA391 //RX_FDEQ_GAIN_10 -50 0x8A82 //RX_FDEQ_GAIN_11 -51 0x726E //RX_FDEQ_GAIN_12 -52 0x704E //RX_FDEQ_GAIN_13 -53 0x6565 //RX_FDEQ_GAIN_14 -54 0x698A //RX_FDEQ_GAIN_15 +39 0x483E //RX_FDEQ_GAIN_0 +40 0x3E3E //RX_FDEQ_GAIN_1 +41 0x3E4C //RX_FDEQ_GAIN_2 +42 0x506A //RX_FDEQ_GAIN_3 +43 0x8082 //RX_FDEQ_GAIN_4 +44 0x8982 //RX_FDEQ_GAIN_5 +45 0x8880 //RX_FDEQ_GAIN_6 +46 0x8888 //RX_FDEQ_GAIN_7 +47 0x949C //RX_FDEQ_GAIN_8 +48 0x9AAB //RX_FDEQ_GAIN_9 +49 0xAEA0 //RX_FDEQ_GAIN_10 +50 0x9487 //RX_FDEQ_GAIN_11 +51 0x6F64 //RX_FDEQ_GAIN_12 +52 0x625A //RX_FDEQ_GAIN_13 +53 0x5D70 //RX_FDEQ_GAIN_14 +54 0x7C8C //RX_FDEQ_GAIN_15 55 0x4848 //RX_FDEQ_GAIN_16 56 0x4848 //RX_FDEQ_GAIN_17 57 0x4848 //RX_FDEQ_GAIN_18 @@ -10274,19 +14925,19 @@ 62 0x4848 //RX_FDEQ_GAIN_23 63 0x0202 //RX_FDEQ_BIN_0 64 0x0202 //RX_FDEQ_BIN_1 -65 0x0302 //RX_FDEQ_BIN_2 -66 0x0304 //RX_FDEQ_BIN_3 -67 0x0405 //RX_FDEQ_BIN_4 -68 0x0506 //RX_FDEQ_BIN_5 +65 0x0301 //RX_FDEQ_BIN_2 +66 0x0404 //RX_FDEQ_BIN_3 +67 0x0406 //RX_FDEQ_BIN_4 +68 0x0109 //RX_FDEQ_BIN_5 69 0x0708 //RX_FDEQ_BIN_6 70 0x090A //RX_FDEQ_BIN_7 71 0x0B0C //RX_FDEQ_BIN_8 72 0x0D0E //RX_FDEQ_BIN_9 73 0x1013 //RX_FDEQ_BIN_10 74 0x1719 //RX_FDEQ_BIN_11 -75 0x1B1E //RX_FDEQ_BIN_12 -76 0x1E1E //RX_FDEQ_BIN_13 -77 0x1E28 //RX_FDEQ_BIN_14 +75 0x1B0F //RX_FDEQ_BIN_12 +76 0x141E //RX_FDEQ_BIN_13 +77 0x3728 //RX_FDEQ_BIN_14 78 0x282C //RX_FDEQ_BIN_15 79 0x0000 //RX_FDEQ_BIN_16 80 0x0000 //RX_FDEQ_BIN_17 @@ -10320,7 +14971,7 @@ 108 0x5333 //RX_FDDRC_SLANT_1_2 109 0x5333 //RX_FDDRC_SLANT_1_3 110 0x0000 //RX_FDDRC_RESRV_0 -129 0x0052 //RX_SPK_VOL +129 0x0047 //RX_SPK_VOL 130 0x0000 //RX_VOL_RESRV_0 #VOL 5 6 0x1000 //RX_TDDRC_ALPHA_UP_1 @@ -10337,32 +14988,32 @@ 113 0x0002 //RX_TDDRC_THRD_1 114 0x1800 //RX_TDDRC_THRD_2 115 0x1800 //RX_TDDRC_THRD_3 -116 0x3000 //RX_TDDRC_SLANT_0 -117 0x6E00 //RX_TDDRC_SLANT_1 +116 0x7FFF //RX_TDDRC_SLANT_0 +117 0x7FFF //RX_TDDRC_SLANT_1 118 0x1000 //RX_TDDRC_ALPHA_UP_0 119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 120 0x0000 //RX_TDDRC_HMNC_FLAG 121 0x199A //RX_TDDRC_HMNC_GAIN 122 0x0001 //RX_TDDRC_SMT_FLAG 123 0x0CCD //RX_TDDRC_SMT_W -124 0x04E6 //RX_TDDRC_DRC_GAIN +124 0x0650 //RX_TDDRC_DRC_GAIN 38 0x0020 //RX_FDEQ_SUBNUM -39 0x4840 //RX_FDEQ_GAIN_0 -40 0x4040 //RX_FDEQ_GAIN_1 -41 0x4050 //RX_FDEQ_GAIN_2 -42 0x5D6C //RX_FDEQ_GAIN_3 -43 0x7B86 //RX_FDEQ_GAIN_4 -44 0x8186 //RX_FDEQ_GAIN_5 -45 0x8688 //RX_FDEQ_GAIN_6 -46 0x9097 //RX_FDEQ_GAIN_7 -47 0x929F //RX_FDEQ_GAIN_8 -48 0x9CA0 //RX_FDEQ_GAIN_9 -49 0xA391 //RX_FDEQ_GAIN_10 -50 0x8A82 //RX_FDEQ_GAIN_11 -51 0x726E //RX_FDEQ_GAIN_12 -52 0x704E //RX_FDEQ_GAIN_13 -53 0x6565 //RX_FDEQ_GAIN_14 -54 0x698A //RX_FDEQ_GAIN_15 +39 0x483E //RX_FDEQ_GAIN_0 +40 0x3E3E //RX_FDEQ_GAIN_1 +41 0x3E4C //RX_FDEQ_GAIN_2 +42 0x506A //RX_FDEQ_GAIN_3 +43 0x8082 //RX_FDEQ_GAIN_4 +44 0x8982 //RX_FDEQ_GAIN_5 +45 0x8880 //RX_FDEQ_GAIN_6 +46 0x8888 //RX_FDEQ_GAIN_7 +47 0x949C //RX_FDEQ_GAIN_8 +48 0x9AAB //RX_FDEQ_GAIN_9 +49 0xAEA0 //RX_FDEQ_GAIN_10 +50 0x9487 //RX_FDEQ_GAIN_11 +51 0x6F64 //RX_FDEQ_GAIN_12 +52 0x625A //RX_FDEQ_GAIN_13 +53 0x5D70 //RX_FDEQ_GAIN_14 +54 0x7C8C //RX_FDEQ_GAIN_15 55 0x4848 //RX_FDEQ_GAIN_16 56 0x4848 //RX_FDEQ_GAIN_17 57 0x4848 //RX_FDEQ_GAIN_18 @@ -10373,19 +15024,19 @@ 62 0x4848 //RX_FDEQ_GAIN_23 63 0x0202 //RX_FDEQ_BIN_0 64 0x0202 //RX_FDEQ_BIN_1 -65 0x0302 //RX_FDEQ_BIN_2 -66 0x0304 //RX_FDEQ_BIN_3 -67 0x0405 //RX_FDEQ_BIN_4 -68 0x0506 //RX_FDEQ_BIN_5 +65 0x0301 //RX_FDEQ_BIN_2 +66 0x0404 //RX_FDEQ_BIN_3 +67 0x0406 //RX_FDEQ_BIN_4 +68 0x0109 //RX_FDEQ_BIN_5 69 0x0708 //RX_FDEQ_BIN_6 70 0x090A //RX_FDEQ_BIN_7 71 0x0B0C //RX_FDEQ_BIN_8 72 0x0D0E //RX_FDEQ_BIN_9 73 0x1013 //RX_FDEQ_BIN_10 74 0x1719 //RX_FDEQ_BIN_11 -75 0x1B1E //RX_FDEQ_BIN_12 -76 0x1E1E //RX_FDEQ_BIN_13 -77 0x1E28 //RX_FDEQ_BIN_14 +75 0x1B0F //RX_FDEQ_BIN_12 +76 0x141E //RX_FDEQ_BIN_13 +77 0x3728 //RX_FDEQ_BIN_14 78 0x282C //RX_FDEQ_BIN_15 79 0x0000 //RX_FDEQ_BIN_16 80 0x0000 //RX_FDEQ_BIN_17 @@ -10419,7 +15070,7 @@ 108 0x5333 //RX_FDDRC_SLANT_1_2 109 0x5333 //RX_FDDRC_SLANT_1_3 110 0x0000 //RX_FDDRC_RESRV_0 -129 0x0087 //RX_SPK_VOL +129 0x0076 //RX_SPK_VOL 130 0x0000 //RX_VOL_RESRV_0 #VOL 6 6 0x1000 //RX_TDDRC_ALPHA_UP_1 @@ -10436,32 +15087,32 @@ 113 0x0002 //RX_TDDRC_THRD_1 114 0x1800 //RX_TDDRC_THRD_2 115 0x1800 //RX_TDDRC_THRD_3 -116 0x3000 //RX_TDDRC_SLANT_0 -117 0x6E00 //RX_TDDRC_SLANT_1 +116 0x7FFF //RX_TDDRC_SLANT_0 +117 0x7FFF //RX_TDDRC_SLANT_1 118 0x1000 //RX_TDDRC_ALPHA_UP_0 119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 120 0x0000 //RX_TDDRC_HMNC_FLAG 121 0x199A //RX_TDDRC_HMNC_GAIN 122 0x0001 //RX_TDDRC_SMT_FLAG 123 0x0CCD //RX_TDDRC_SMT_W -124 0x04E6 //RX_TDDRC_DRC_GAIN +124 0x0650 //RX_TDDRC_DRC_GAIN 38 0x0020 //RX_FDEQ_SUBNUM -39 0x4840 //RX_FDEQ_GAIN_0 -40 0x4040 //RX_FDEQ_GAIN_1 -41 0x4050 //RX_FDEQ_GAIN_2 -42 0x5D6C //RX_FDEQ_GAIN_3 -43 0x7B86 //RX_FDEQ_GAIN_4 -44 0x8186 //RX_FDEQ_GAIN_5 -45 0x8688 //RX_FDEQ_GAIN_6 -46 0x9097 //RX_FDEQ_GAIN_7 -47 0x929F //RX_FDEQ_GAIN_8 -48 0x9CA0 //RX_FDEQ_GAIN_9 -49 0xA391 //RX_FDEQ_GAIN_10 -50 0x8A82 //RX_FDEQ_GAIN_11 -51 0x726E //RX_FDEQ_GAIN_12 -52 0x704E //RX_FDEQ_GAIN_13 -53 0x6565 //RX_FDEQ_GAIN_14 -54 0x698A //RX_FDEQ_GAIN_15 +39 0x483E //RX_FDEQ_GAIN_0 +40 0x3E3E //RX_FDEQ_GAIN_1 +41 0x3E4C //RX_FDEQ_GAIN_2 +42 0x506A //RX_FDEQ_GAIN_3 +43 0x8082 //RX_FDEQ_GAIN_4 +44 0x8982 //RX_FDEQ_GAIN_5 +45 0x8880 //RX_FDEQ_GAIN_6 +46 0x8888 //RX_FDEQ_GAIN_7 +47 0x949C //RX_FDEQ_GAIN_8 +48 0x9AAB //RX_FDEQ_GAIN_9 +49 0xAEA0 //RX_FDEQ_GAIN_10 +50 0x9487 //RX_FDEQ_GAIN_11 +51 0x6F64 //RX_FDEQ_GAIN_12 +52 0x625A //RX_FDEQ_GAIN_13 +53 0x5D70 //RX_FDEQ_GAIN_14 +54 0x7C8C //RX_FDEQ_GAIN_15 55 0x4848 //RX_FDEQ_GAIN_16 56 0x4848 //RX_FDEQ_GAIN_17 57 0x4848 //RX_FDEQ_GAIN_18 @@ -10472,19 +15123,19 @@ 62 0x4848 //RX_FDEQ_GAIN_23 63 0x0202 //RX_FDEQ_BIN_0 64 0x0202 //RX_FDEQ_BIN_1 -65 0x0302 //RX_FDEQ_BIN_2 -66 0x0304 //RX_FDEQ_BIN_3 -67 0x0405 //RX_FDEQ_BIN_4 -68 0x0506 //RX_FDEQ_BIN_5 +65 0x0301 //RX_FDEQ_BIN_2 +66 0x0404 //RX_FDEQ_BIN_3 +67 0x0406 //RX_FDEQ_BIN_4 +68 0x0109 //RX_FDEQ_BIN_5 69 0x0708 //RX_FDEQ_BIN_6 70 0x090A //RX_FDEQ_BIN_7 71 0x0B0C //RX_FDEQ_BIN_8 72 0x0D0E //RX_FDEQ_BIN_9 73 0x1013 //RX_FDEQ_BIN_10 74 0x1719 //RX_FDEQ_BIN_11 -75 0x1B1E //RX_FDEQ_BIN_12 -76 0x1E1E //RX_FDEQ_BIN_13 -77 0x1E28 //RX_FDEQ_BIN_14 +75 0x1B0F //RX_FDEQ_BIN_12 +76 0x141E //RX_FDEQ_BIN_13 +77 0x3728 //RX_FDEQ_BIN_14 78 0x282C //RX_FDEQ_BIN_15 79 0x0000 //RX_FDEQ_BIN_16 80 0x0000 //RX_FDEQ_BIN_17 @@ -10520,10 +15171,862 @@ 110 0x0000 //RX_FDDRC_RESRV_0 129 0x0100 //RX_SPK_VOL 130 0x0000 //RX_VOL_RESRV_0 +#RX 2 +157 0x003C //RX_RECVFUNC_MODE_0 +158 0x0000 //RX_RECVFUNC_MODE_1 +159 0x0003 //RX_SAMPLINGFREQ_SIG +160 0x0003 //RX_SAMPLINGFREQ_PROC +161 0x000A //RX_FRAME_SZ +162 0x0000 //RX_DELAY_OPT +163 0x1000 //RX_TDDRC_ALPHA_UP_1 +164 0x1000 //RX_TDDRC_ALPHA_UP_2 +165 0x1000 //RX_TDDRC_ALPHA_UP_3 +166 0x1000 //RX_TDDRC_ALPHA_UP_4 +167 0x0600 //RX_PGA +168 0x7FFF //RX_A_HP +169 0x4000 //RX_B_PE +170 0x5800 //RX_THR_PITCH_DET_0 +171 0x5000 //RX_THR_PITCH_DET_1 +172 0x4000 //RX_THR_PITCH_DET_2 +173 0x0008 //RX_PITCH_BFR_LEN +174 0x0003 //RX_SBD_PITCH_DET +175 0x0100 //RX_PP_RESRV_0 +176 0x0020 //RX_PP_RESRV_1 +177 0x0600 //RX_N_SN_EST +178 0x000C //RX_N2_SN_EST +179 0x000F //RX_NS_LVL_CTRL +180 0xF800 //RX_THR_SN_EST +181 0x7E00 //RX_LAMBDA_PFILT +182 0x000A //RX_FENS_RESRV_0 +183 0x0190 //RX_FENS_RESRV_1 +184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +187 0x0002 //RX_EXTRA_NS_L +188 0x0800 //RX_EXTRA_NS_A +189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +190 0x7000 //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +192 0x199A //RX_A_POST_FLT +193 0x0000 //RX_LMT_THRD +194 0x4000 //RX_LMT_ALPHA +195 0x0020 //RX_FDEQ_SUBNUM +196 0x4840 //RX_FDEQ_GAIN_0 +197 0x4040 //RX_FDEQ_GAIN_1 +198 0x4050 //RX_FDEQ_GAIN_2 +199 0x5D6C //RX_FDEQ_GAIN_3 +200 0x7B86 //RX_FDEQ_GAIN_4 +201 0x8186 //RX_FDEQ_GAIN_5 +202 0x8688 //RX_FDEQ_GAIN_6 +203 0x9097 //RX_FDEQ_GAIN_7 +204 0x929F //RX_FDEQ_GAIN_8 +205 0x9CA0 //RX_FDEQ_GAIN_9 +206 0xA391 //RX_FDEQ_GAIN_10 +207 0x8A82 //RX_FDEQ_GAIN_11 +208 0x726E //RX_FDEQ_GAIN_12 +209 0x704E //RX_FDEQ_GAIN_13 +210 0x6565 //RX_FDEQ_GAIN_14 +211 0x698A //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0202 //RX_FDEQ_BIN_0 +221 0x0202 //RX_FDEQ_BIN_1 +222 0x0302 //RX_FDEQ_BIN_2 +223 0x0304 //RX_FDEQ_BIN_3 +224 0x0405 //RX_FDEQ_BIN_4 +225 0x0506 //RX_FDEQ_BIN_5 +226 0x0708 //RX_FDEQ_BIN_6 +227 0x090A //RX_FDEQ_BIN_7 +228 0x0B0C //RX_FDEQ_BIN_8 +229 0x0D0E //RX_FDEQ_BIN_9 +230 0x1013 //RX_FDEQ_BIN_10 +231 0x1719 //RX_FDEQ_BIN_11 +232 0x1B1E //RX_FDEQ_BIN_12 +233 0x1E1E //RX_FDEQ_BIN_13 +234 0x1E28 //RX_FDEQ_BIN_14 +235 0x282C //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x4000 //RX_FDEQ_RESRV_0 +245 0x0320 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0030 //RX_FDDRC_BAND_MARGIN_1 +248 0x0050 //RX_FDDRC_BAND_MARGIN_2 +249 0x0080 //RX_FDDRC_BAND_MARGIN_3 +250 0x0007 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x5000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x6400 //RX_FDDRC_THRD_3_2 +258 0x6400 //RX_FDDRC_THRD_3_3 +259 0x2000 //RX_FDDRC_SLANT_0_0 +260 0x2000 //RX_FDDRC_SLANT_0_1 +261 0x2000 //RX_FDDRC_SLANT_0_2 +262 0x2000 //RX_FDDRC_SLANT_0_3 +263 0x5333 //RX_FDDRC_SLANT_1_0 +264 0x5333 //RX_FDDRC_SLANT_1_1 +265 0x5333 //RX_FDDRC_SLANT_1_2 +266 0x5333 //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +268 0x0002 //RX_FILTINDX +269 0x0001 //RX_TDDRC_THRD_0 +270 0x0002 //RX_TDDRC_THRD_1 +271 0x1800 //RX_TDDRC_THRD_2 +272 0x1800 //RX_TDDRC_THRD_3 +273 0x3000 //RX_TDDRC_SLANT_0 +274 0x6E00 //RX_TDDRC_SLANT_1 +275 0x1000 //RX_TDDRC_ALPHA_UP_0 +276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x199A //RX_TDDRC_HMNC_GAIN +279 0x0001 //RX_TDDRC_SMT_FLAG +280 0x0CCD //RX_TDDRC_SMT_W +281 0x0523 //RX_TDDRC_DRC_GAIN +282 0x7C00 //RX_LAMBDA_PKA_FP +283 0x13E0 //RX_TPKA_FP +284 0x0080 //RX_MIN_G_FP +285 0x2000 //RX_MAX_G_FP +286 0x000B //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 +288 0x0000 //RX_MAXLEVEL_CNG +289 0x3000 //RX_BWE_UV_TH +290 0x3000 //RX_BWE_UV_TH2 +291 0x1800 //RX_BWE_UV_TH3 +292 0x1000 //RX_BWE_V_TH +293 0x04CD //RX_BWE_GAIN1_V_TH1 +294 0x0F33 //RX_BWE_GAIN1_V_TH2 +295 0x7333 //RX_BWE_UV_EQ +296 0x199A //RX_BWE_V_EQ +297 0x7333 //RX_BWE_TONE_TH +298 0x0004 //RX_BWE_UV_HOLD_T +299 0x6CCD //RX_BWE_GAIN2_ALPHA +300 0x799A //RX_BWE_GAIN3_ALPHA +301 0x001E //RX_BWE_CUTOFF +302 0x3000 //RX_BWE_GAINFILL +303 0x3200 //RX_BWE_MAXTH_TONE +304 0x2000 //RX_BWE_EQ_0 +305 0x2000 //RX_BWE_EQ_1 +306 0x2000 //RX_BWE_EQ_2 +307 0x2000 //RX_BWE_EQ_3 +308 0x2000 //RX_BWE_EQ_4 +309 0x2000 //RX_BWE_EQ_5 +310 0x2000 //RX_BWE_EQ_6 +311 0x0000 //RX_BWE_RESRV_0 +312 0x0000 //RX_BWE_RESRV_1 +313 0x0000 //RX_BWE_RESRV_2 +#VOL 0 +163 0x1000 //RX_TDDRC_ALPHA_UP_1 +164 0x1000 //RX_TDDRC_ALPHA_UP_2 +165 0x1000 //RX_TDDRC_ALPHA_UP_3 +166 0x1000 //RX_TDDRC_ALPHA_UP_4 +184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +190 0x7000 //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +269 0x0001 //RX_TDDRC_THRD_0 +270 0x0002 //RX_TDDRC_THRD_1 +271 0x1800 //RX_TDDRC_THRD_2 +272 0x1800 //RX_TDDRC_THRD_3 +273 0x3000 //RX_TDDRC_SLANT_0 +274 0x6E00 //RX_TDDRC_SLANT_1 +275 0x1000 //RX_TDDRC_ALPHA_UP_0 +276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x199A //RX_TDDRC_HMNC_GAIN +279 0x0001 //RX_TDDRC_SMT_FLAG +280 0x0CCD //RX_TDDRC_SMT_W +281 0x0523 //RX_TDDRC_DRC_GAIN +195 0x0020 //RX_FDEQ_SUBNUM +196 0x4840 //RX_FDEQ_GAIN_0 +197 0x4040 //RX_FDEQ_GAIN_1 +198 0x4050 //RX_FDEQ_GAIN_2 +199 0x5D6C //RX_FDEQ_GAIN_3 +200 0x7B86 //RX_FDEQ_GAIN_4 +201 0x8186 //RX_FDEQ_GAIN_5 +202 0x8688 //RX_FDEQ_GAIN_6 +203 0x9097 //RX_FDEQ_GAIN_7 +204 0x929F //RX_FDEQ_GAIN_8 +205 0x9CA0 //RX_FDEQ_GAIN_9 +206 0xA391 //RX_FDEQ_GAIN_10 +207 0x8A82 //RX_FDEQ_GAIN_11 +208 0x726E //RX_FDEQ_GAIN_12 +209 0x704E //RX_FDEQ_GAIN_13 +210 0x6565 //RX_FDEQ_GAIN_14 +211 0x698A //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0202 //RX_FDEQ_BIN_0 +221 0x0202 //RX_FDEQ_BIN_1 +222 0x0302 //RX_FDEQ_BIN_2 +223 0x0304 //RX_FDEQ_BIN_3 +224 0x0405 //RX_FDEQ_BIN_4 +225 0x0506 //RX_FDEQ_BIN_5 +226 0x0708 //RX_FDEQ_BIN_6 +227 0x090A //RX_FDEQ_BIN_7 +228 0x0B0C //RX_FDEQ_BIN_8 +229 0x0D0E //RX_FDEQ_BIN_9 +230 0x1013 //RX_FDEQ_BIN_10 +231 0x1719 //RX_FDEQ_BIN_11 +232 0x1B1E //RX_FDEQ_BIN_12 +233 0x1E1E //RX_FDEQ_BIN_13 +234 0x1E28 //RX_FDEQ_BIN_14 +235 0x282C //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x4000 //RX_FDEQ_RESRV_0 +245 0x0320 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0030 //RX_FDDRC_BAND_MARGIN_1 +248 0x0050 //RX_FDDRC_BAND_MARGIN_2 +249 0x0080 //RX_FDDRC_BAND_MARGIN_3 +250 0x0007 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x5000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x6400 //RX_FDDRC_THRD_3_2 +258 0x6400 //RX_FDDRC_THRD_3_3 +259 0x2000 //RX_FDDRC_SLANT_0_0 +260 0x2000 //RX_FDDRC_SLANT_0_1 +261 0x2000 //RX_FDDRC_SLANT_0_2 +262 0x2000 //RX_FDDRC_SLANT_0_3 +263 0x5333 //RX_FDDRC_SLANT_1_0 +264 0x5333 //RX_FDDRC_SLANT_1_1 +265 0x5333 //RX_FDDRC_SLANT_1_2 +266 0x5333 //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +286 0x000B //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 +#VOL 1 +163 0x1000 //RX_TDDRC_ALPHA_UP_1 +164 0x1000 //RX_TDDRC_ALPHA_UP_2 +165 0x1000 //RX_TDDRC_ALPHA_UP_3 +166 0x1000 //RX_TDDRC_ALPHA_UP_4 +184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +190 0x7000 //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +269 0x0001 //RX_TDDRC_THRD_0 +270 0x0002 //RX_TDDRC_THRD_1 +271 0x1800 //RX_TDDRC_THRD_2 +272 0x1800 //RX_TDDRC_THRD_3 +273 0x3000 //RX_TDDRC_SLANT_0 +274 0x6E00 //RX_TDDRC_SLANT_1 +275 0x1000 //RX_TDDRC_ALPHA_UP_0 +276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x199A //RX_TDDRC_HMNC_GAIN +279 0x0001 //RX_TDDRC_SMT_FLAG +280 0x0CCD //RX_TDDRC_SMT_W +281 0x04E6 //RX_TDDRC_DRC_GAIN +195 0x0020 //RX_FDEQ_SUBNUM +196 0x4840 //RX_FDEQ_GAIN_0 +197 0x4040 //RX_FDEQ_GAIN_1 +198 0x4050 //RX_FDEQ_GAIN_2 +199 0x5D6C //RX_FDEQ_GAIN_3 +200 0x7B86 //RX_FDEQ_GAIN_4 +201 0x8186 //RX_FDEQ_GAIN_5 +202 0x8688 //RX_FDEQ_GAIN_6 +203 0x9097 //RX_FDEQ_GAIN_7 +204 0x929F //RX_FDEQ_GAIN_8 +205 0x9CA0 //RX_FDEQ_GAIN_9 +206 0xA391 //RX_FDEQ_GAIN_10 +207 0x8A82 //RX_FDEQ_GAIN_11 +208 0x726E //RX_FDEQ_GAIN_12 +209 0x704E //RX_FDEQ_GAIN_13 +210 0x6565 //RX_FDEQ_GAIN_14 +211 0x698A //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0202 //RX_FDEQ_BIN_0 +221 0x0202 //RX_FDEQ_BIN_1 +222 0x0302 //RX_FDEQ_BIN_2 +223 0x0304 //RX_FDEQ_BIN_3 +224 0x0405 //RX_FDEQ_BIN_4 +225 0x0506 //RX_FDEQ_BIN_5 +226 0x0708 //RX_FDEQ_BIN_6 +227 0x090A //RX_FDEQ_BIN_7 +228 0x0B0C //RX_FDEQ_BIN_8 +229 0x0D0E //RX_FDEQ_BIN_9 +230 0x1013 //RX_FDEQ_BIN_10 +231 0x1719 //RX_FDEQ_BIN_11 +232 0x1B1E //RX_FDEQ_BIN_12 +233 0x1E1E //RX_FDEQ_BIN_13 +234 0x1E28 //RX_FDEQ_BIN_14 +235 0x282C //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x4000 //RX_FDEQ_RESRV_0 +245 0x0320 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0030 //RX_FDDRC_BAND_MARGIN_1 +248 0x0050 //RX_FDDRC_BAND_MARGIN_2 +249 0x0080 //RX_FDDRC_BAND_MARGIN_3 +250 0x0007 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x5000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x6400 //RX_FDDRC_THRD_3_2 +258 0x6400 //RX_FDDRC_THRD_3_3 +259 0x2000 //RX_FDDRC_SLANT_0_0 +260 0x2000 //RX_FDDRC_SLANT_0_1 +261 0x2000 //RX_FDDRC_SLANT_0_2 +262 0x2000 //RX_FDDRC_SLANT_0_3 +263 0x5333 //RX_FDDRC_SLANT_1_0 +264 0x5333 //RX_FDDRC_SLANT_1_1 +265 0x5333 //RX_FDDRC_SLANT_1_2 +266 0x5333 //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +286 0x0013 //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 +#VOL 2 +163 0x1000 //RX_TDDRC_ALPHA_UP_1 +164 0x1000 //RX_TDDRC_ALPHA_UP_2 +165 0x1000 //RX_TDDRC_ALPHA_UP_3 +166 0x1000 //RX_TDDRC_ALPHA_UP_4 +184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +190 0x7000 //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +269 0x0001 //RX_TDDRC_THRD_0 +270 0x0002 //RX_TDDRC_THRD_1 +271 0x1800 //RX_TDDRC_THRD_2 +272 0x1800 //RX_TDDRC_THRD_3 +273 0x3000 //RX_TDDRC_SLANT_0 +274 0x6E00 //RX_TDDRC_SLANT_1 +275 0x1000 //RX_TDDRC_ALPHA_UP_0 +276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x199A //RX_TDDRC_HMNC_GAIN +279 0x0001 //RX_TDDRC_SMT_FLAG +280 0x0CCD //RX_TDDRC_SMT_W +281 0x04E6 //RX_TDDRC_DRC_GAIN +195 0x0020 //RX_FDEQ_SUBNUM +196 0x4840 //RX_FDEQ_GAIN_0 +197 0x4040 //RX_FDEQ_GAIN_1 +198 0x4050 //RX_FDEQ_GAIN_2 +199 0x5D6C //RX_FDEQ_GAIN_3 +200 0x7B86 //RX_FDEQ_GAIN_4 +201 0x8186 //RX_FDEQ_GAIN_5 +202 0x8688 //RX_FDEQ_GAIN_6 +203 0x9097 //RX_FDEQ_GAIN_7 +204 0x929F //RX_FDEQ_GAIN_8 +205 0x9CA0 //RX_FDEQ_GAIN_9 +206 0xA391 //RX_FDEQ_GAIN_10 +207 0x8A82 //RX_FDEQ_GAIN_11 +208 0x726E //RX_FDEQ_GAIN_12 +209 0x704E //RX_FDEQ_GAIN_13 +210 0x6565 //RX_FDEQ_GAIN_14 +211 0x698A //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0202 //RX_FDEQ_BIN_0 +221 0x0202 //RX_FDEQ_BIN_1 +222 0x0302 //RX_FDEQ_BIN_2 +223 0x0304 //RX_FDEQ_BIN_3 +224 0x0405 //RX_FDEQ_BIN_4 +225 0x0506 //RX_FDEQ_BIN_5 +226 0x0708 //RX_FDEQ_BIN_6 +227 0x090A //RX_FDEQ_BIN_7 +228 0x0B0C //RX_FDEQ_BIN_8 +229 0x0D0E //RX_FDEQ_BIN_9 +230 0x1013 //RX_FDEQ_BIN_10 +231 0x1719 //RX_FDEQ_BIN_11 +232 0x1B1E //RX_FDEQ_BIN_12 +233 0x1E1E //RX_FDEQ_BIN_13 +234 0x1E28 //RX_FDEQ_BIN_14 +235 0x282C //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x4000 //RX_FDEQ_RESRV_0 +245 0x0320 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0030 //RX_FDDRC_BAND_MARGIN_1 +248 0x0050 //RX_FDDRC_BAND_MARGIN_2 +249 0x0080 //RX_FDDRC_BAND_MARGIN_3 +250 0x0007 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x5000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x6400 //RX_FDDRC_THRD_3_2 +258 0x6400 //RX_FDDRC_THRD_3_3 +259 0x2000 //RX_FDDRC_SLANT_0_0 +260 0x2000 //RX_FDDRC_SLANT_0_1 +261 0x2000 //RX_FDDRC_SLANT_0_2 +262 0x2000 //RX_FDDRC_SLANT_0_3 +263 0x5333 //RX_FDDRC_SLANT_1_0 +264 0x5333 //RX_FDDRC_SLANT_1_1 +265 0x5333 //RX_FDDRC_SLANT_1_2 +266 0x5333 //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +286 0x001F //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 +#VOL 3 +163 0x1000 //RX_TDDRC_ALPHA_UP_1 +164 0x1000 //RX_TDDRC_ALPHA_UP_2 +165 0x1000 //RX_TDDRC_ALPHA_UP_3 +166 0x1000 //RX_TDDRC_ALPHA_UP_4 +184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +190 0x7000 //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +269 0x0001 //RX_TDDRC_THRD_0 +270 0x0002 //RX_TDDRC_THRD_1 +271 0x1800 //RX_TDDRC_THRD_2 +272 0x1800 //RX_TDDRC_THRD_3 +273 0x3000 //RX_TDDRC_SLANT_0 +274 0x6E00 //RX_TDDRC_SLANT_1 +275 0x1000 //RX_TDDRC_ALPHA_UP_0 +276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x199A //RX_TDDRC_HMNC_GAIN +279 0x0001 //RX_TDDRC_SMT_FLAG +280 0x0CCD //RX_TDDRC_SMT_W +281 0x04E6 //RX_TDDRC_DRC_GAIN +195 0x0020 //RX_FDEQ_SUBNUM +196 0x4840 //RX_FDEQ_GAIN_0 +197 0x4040 //RX_FDEQ_GAIN_1 +198 0x4050 //RX_FDEQ_GAIN_2 +199 0x5D6C //RX_FDEQ_GAIN_3 +200 0x7B86 //RX_FDEQ_GAIN_4 +201 0x8186 //RX_FDEQ_GAIN_5 +202 0x8688 //RX_FDEQ_GAIN_6 +203 0x9097 //RX_FDEQ_GAIN_7 +204 0x929F //RX_FDEQ_GAIN_8 +205 0x9CA0 //RX_FDEQ_GAIN_9 +206 0xA391 //RX_FDEQ_GAIN_10 +207 0x8A82 //RX_FDEQ_GAIN_11 +208 0x726E //RX_FDEQ_GAIN_12 +209 0x704E //RX_FDEQ_GAIN_13 +210 0x6565 //RX_FDEQ_GAIN_14 +211 0x698A //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0202 //RX_FDEQ_BIN_0 +221 0x0202 //RX_FDEQ_BIN_1 +222 0x0302 //RX_FDEQ_BIN_2 +223 0x0304 //RX_FDEQ_BIN_3 +224 0x0405 //RX_FDEQ_BIN_4 +225 0x0506 //RX_FDEQ_BIN_5 +226 0x0708 //RX_FDEQ_BIN_6 +227 0x090A //RX_FDEQ_BIN_7 +228 0x0B0C //RX_FDEQ_BIN_8 +229 0x0D0E //RX_FDEQ_BIN_9 +230 0x1013 //RX_FDEQ_BIN_10 +231 0x1719 //RX_FDEQ_BIN_11 +232 0x1B1E //RX_FDEQ_BIN_12 +233 0x1E1E //RX_FDEQ_BIN_13 +234 0x1E28 //RX_FDEQ_BIN_14 +235 0x282C //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x4000 //RX_FDEQ_RESRV_0 +245 0x0320 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0030 //RX_FDDRC_BAND_MARGIN_1 +248 0x0050 //RX_FDDRC_BAND_MARGIN_2 +249 0x0080 //RX_FDDRC_BAND_MARGIN_3 +250 0x0007 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x5000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x6400 //RX_FDDRC_THRD_3_2 +258 0x6400 //RX_FDDRC_THRD_3_3 +259 0x2000 //RX_FDDRC_SLANT_0_0 +260 0x2000 //RX_FDDRC_SLANT_0_1 +261 0x2000 //RX_FDDRC_SLANT_0_2 +262 0x2000 //RX_FDDRC_SLANT_0_3 +263 0x5333 //RX_FDDRC_SLANT_1_0 +264 0x5333 //RX_FDDRC_SLANT_1_1 +265 0x5333 //RX_FDDRC_SLANT_1_2 +266 0x5333 //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +286 0x0032 //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 +#VOL 4 +163 0x1000 //RX_TDDRC_ALPHA_UP_1 +164 0x1000 //RX_TDDRC_ALPHA_UP_2 +165 0x1000 //RX_TDDRC_ALPHA_UP_3 +166 0x1000 //RX_TDDRC_ALPHA_UP_4 +184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +190 0x7000 //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +269 0x0001 //RX_TDDRC_THRD_0 +270 0x0002 //RX_TDDRC_THRD_1 +271 0x1800 //RX_TDDRC_THRD_2 +272 0x1800 //RX_TDDRC_THRD_3 +273 0x3000 //RX_TDDRC_SLANT_0 +274 0x6E00 //RX_TDDRC_SLANT_1 +275 0x1000 //RX_TDDRC_ALPHA_UP_0 +276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x199A //RX_TDDRC_HMNC_GAIN +279 0x0001 //RX_TDDRC_SMT_FLAG +280 0x0CCD //RX_TDDRC_SMT_W +281 0x04E6 //RX_TDDRC_DRC_GAIN +195 0x0020 //RX_FDEQ_SUBNUM +196 0x4840 //RX_FDEQ_GAIN_0 +197 0x4040 //RX_FDEQ_GAIN_1 +198 0x4050 //RX_FDEQ_GAIN_2 +199 0x5D6C //RX_FDEQ_GAIN_3 +200 0x7B86 //RX_FDEQ_GAIN_4 +201 0x8186 //RX_FDEQ_GAIN_5 +202 0x8688 //RX_FDEQ_GAIN_6 +203 0x9097 //RX_FDEQ_GAIN_7 +204 0x929F //RX_FDEQ_GAIN_8 +205 0x9CA0 //RX_FDEQ_GAIN_9 +206 0xA391 //RX_FDEQ_GAIN_10 +207 0x8A82 //RX_FDEQ_GAIN_11 +208 0x726E //RX_FDEQ_GAIN_12 +209 0x704E //RX_FDEQ_GAIN_13 +210 0x6565 //RX_FDEQ_GAIN_14 +211 0x698A //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0202 //RX_FDEQ_BIN_0 +221 0x0202 //RX_FDEQ_BIN_1 +222 0x0302 //RX_FDEQ_BIN_2 +223 0x0304 //RX_FDEQ_BIN_3 +224 0x0405 //RX_FDEQ_BIN_4 +225 0x0506 //RX_FDEQ_BIN_5 +226 0x0708 //RX_FDEQ_BIN_6 +227 0x090A //RX_FDEQ_BIN_7 +228 0x0B0C //RX_FDEQ_BIN_8 +229 0x0D0E //RX_FDEQ_BIN_9 +230 0x1013 //RX_FDEQ_BIN_10 +231 0x1719 //RX_FDEQ_BIN_11 +232 0x1B1E //RX_FDEQ_BIN_12 +233 0x1E1E //RX_FDEQ_BIN_13 +234 0x1E28 //RX_FDEQ_BIN_14 +235 0x282C //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x4000 //RX_FDEQ_RESRV_0 +245 0x0320 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0030 //RX_FDDRC_BAND_MARGIN_1 +248 0x0050 //RX_FDDRC_BAND_MARGIN_2 +249 0x0080 //RX_FDDRC_BAND_MARGIN_3 +250 0x0007 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x5000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x6400 //RX_FDDRC_THRD_3_2 +258 0x6400 //RX_FDDRC_THRD_3_3 +259 0x2000 //RX_FDDRC_SLANT_0_0 +260 0x2000 //RX_FDDRC_SLANT_0_1 +261 0x2000 //RX_FDDRC_SLANT_0_2 +262 0x2000 //RX_FDDRC_SLANT_0_3 +263 0x5333 //RX_FDDRC_SLANT_1_0 +264 0x5333 //RX_FDDRC_SLANT_1_1 +265 0x5333 //RX_FDDRC_SLANT_1_2 +266 0x5333 //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +286 0x0052 //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 +#VOL 5 +163 0x1000 //RX_TDDRC_ALPHA_UP_1 +164 0x1000 //RX_TDDRC_ALPHA_UP_2 +165 0x1000 //RX_TDDRC_ALPHA_UP_3 +166 0x1000 //RX_TDDRC_ALPHA_UP_4 +184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +190 0x7000 //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +269 0x0001 //RX_TDDRC_THRD_0 +270 0x0002 //RX_TDDRC_THRD_1 +271 0x1800 //RX_TDDRC_THRD_2 +272 0x1800 //RX_TDDRC_THRD_3 +273 0x3000 //RX_TDDRC_SLANT_0 +274 0x6E00 //RX_TDDRC_SLANT_1 +275 0x1000 //RX_TDDRC_ALPHA_UP_0 +276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x199A //RX_TDDRC_HMNC_GAIN +279 0x0001 //RX_TDDRC_SMT_FLAG +280 0x0CCD //RX_TDDRC_SMT_W +281 0x04E6 //RX_TDDRC_DRC_GAIN +195 0x0020 //RX_FDEQ_SUBNUM +196 0x4840 //RX_FDEQ_GAIN_0 +197 0x4040 //RX_FDEQ_GAIN_1 +198 0x4050 //RX_FDEQ_GAIN_2 +199 0x5D6C //RX_FDEQ_GAIN_3 +200 0x7B86 //RX_FDEQ_GAIN_4 +201 0x8186 //RX_FDEQ_GAIN_5 +202 0x8688 //RX_FDEQ_GAIN_6 +203 0x9097 //RX_FDEQ_GAIN_7 +204 0x929F //RX_FDEQ_GAIN_8 +205 0x9CA0 //RX_FDEQ_GAIN_9 +206 0xA391 //RX_FDEQ_GAIN_10 +207 0x8A82 //RX_FDEQ_GAIN_11 +208 0x726E //RX_FDEQ_GAIN_12 +209 0x704E //RX_FDEQ_GAIN_13 +210 0x6565 //RX_FDEQ_GAIN_14 +211 0x698A //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0202 //RX_FDEQ_BIN_0 +221 0x0202 //RX_FDEQ_BIN_1 +222 0x0302 //RX_FDEQ_BIN_2 +223 0x0304 //RX_FDEQ_BIN_3 +224 0x0405 //RX_FDEQ_BIN_4 +225 0x0506 //RX_FDEQ_BIN_5 +226 0x0708 //RX_FDEQ_BIN_6 +227 0x090A //RX_FDEQ_BIN_7 +228 0x0B0C //RX_FDEQ_BIN_8 +229 0x0D0E //RX_FDEQ_BIN_9 +230 0x1013 //RX_FDEQ_BIN_10 +231 0x1719 //RX_FDEQ_BIN_11 +232 0x1B1E //RX_FDEQ_BIN_12 +233 0x1E1E //RX_FDEQ_BIN_13 +234 0x1E28 //RX_FDEQ_BIN_14 +235 0x282C //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x4000 //RX_FDEQ_RESRV_0 +245 0x0320 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0030 //RX_FDDRC_BAND_MARGIN_1 +248 0x0050 //RX_FDDRC_BAND_MARGIN_2 +249 0x0080 //RX_FDDRC_BAND_MARGIN_3 +250 0x0007 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x5000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x6400 //RX_FDDRC_THRD_3_2 +258 0x6400 //RX_FDDRC_THRD_3_3 +259 0x2000 //RX_FDDRC_SLANT_0_0 +260 0x2000 //RX_FDDRC_SLANT_0_1 +261 0x2000 //RX_FDDRC_SLANT_0_2 +262 0x2000 //RX_FDDRC_SLANT_0_3 +263 0x5333 //RX_FDDRC_SLANT_1_0 +264 0x5333 //RX_FDDRC_SLANT_1_1 +265 0x5333 //RX_FDDRC_SLANT_1_2 +266 0x5333 //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +286 0x0087 //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 +#VOL 6 +163 0x1000 //RX_TDDRC_ALPHA_UP_1 +164 0x1000 //RX_TDDRC_ALPHA_UP_2 +165 0x1000 //RX_TDDRC_ALPHA_UP_3 +166 0x1000 //RX_TDDRC_ALPHA_UP_4 +184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +190 0x7000 //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +269 0x0001 //RX_TDDRC_THRD_0 +270 0x0002 //RX_TDDRC_THRD_1 +271 0x1800 //RX_TDDRC_THRD_2 +272 0x1800 //RX_TDDRC_THRD_3 +273 0x3000 //RX_TDDRC_SLANT_0 +274 0x6E00 //RX_TDDRC_SLANT_1 +275 0x1000 //RX_TDDRC_ALPHA_UP_0 +276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x199A //RX_TDDRC_HMNC_GAIN +279 0x0001 //RX_TDDRC_SMT_FLAG +280 0x0CCD //RX_TDDRC_SMT_W +281 0x04E6 //RX_TDDRC_DRC_GAIN +195 0x0020 //RX_FDEQ_SUBNUM +196 0x4840 //RX_FDEQ_GAIN_0 +197 0x4040 //RX_FDEQ_GAIN_1 +198 0x4050 //RX_FDEQ_GAIN_2 +199 0x5D6C //RX_FDEQ_GAIN_3 +200 0x7B86 //RX_FDEQ_GAIN_4 +201 0x8186 //RX_FDEQ_GAIN_5 +202 0x8688 //RX_FDEQ_GAIN_6 +203 0x9097 //RX_FDEQ_GAIN_7 +204 0x929F //RX_FDEQ_GAIN_8 +205 0x9CA0 //RX_FDEQ_GAIN_9 +206 0xA391 //RX_FDEQ_GAIN_10 +207 0x8A82 //RX_FDEQ_GAIN_11 +208 0x726E //RX_FDEQ_GAIN_12 +209 0x704E //RX_FDEQ_GAIN_13 +210 0x6565 //RX_FDEQ_GAIN_14 +211 0x698A //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0202 //RX_FDEQ_BIN_0 +221 0x0202 //RX_FDEQ_BIN_1 +222 0x0302 //RX_FDEQ_BIN_2 +223 0x0304 //RX_FDEQ_BIN_3 +224 0x0405 //RX_FDEQ_BIN_4 +225 0x0506 //RX_FDEQ_BIN_5 +226 0x0708 //RX_FDEQ_BIN_6 +227 0x090A //RX_FDEQ_BIN_7 +228 0x0B0C //RX_FDEQ_BIN_8 +229 0x0D0E //RX_FDEQ_BIN_9 +230 0x1013 //RX_FDEQ_BIN_10 +231 0x1719 //RX_FDEQ_BIN_11 +232 0x1B1E //RX_FDEQ_BIN_12 +233 0x1E1E //RX_FDEQ_BIN_13 +234 0x1E28 //RX_FDEQ_BIN_14 +235 0x282C //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x4000 //RX_FDEQ_RESRV_0 +245 0x0320 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0030 //RX_FDDRC_BAND_MARGIN_1 +248 0x0050 //RX_FDDRC_BAND_MARGIN_2 +249 0x0080 //RX_FDDRC_BAND_MARGIN_3 +250 0x0007 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x5000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x6400 //RX_FDDRC_THRD_3_2 +258 0x6400 //RX_FDDRC_THRD_3_3 +259 0x2000 //RX_FDDRC_SLANT_0_0 +260 0x2000 //RX_FDDRC_SLANT_0_1 +261 0x2000 //RX_FDDRC_SLANT_0_2 +262 0x2000 //RX_FDDRC_SLANT_0_3 +263 0x5333 //RX_FDDRC_SLANT_1_0 +264 0x5333 //RX_FDDRC_SLANT_1_1 +265 0x5333 //RX_FDDRC_SLANT_1_2 +266 0x5333 //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +286 0x0100 //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 #CASE_NAME HANDSET-HANDSET-VOICE_GENERIC-FB -#PARAM_TYPE TX+RX -#TOTAL_CUSTOM_STEP 7 +#PARAM_MODE Full +#PARAM_TYPE TX+2RX +#TOTAL_CUSTOM_STEP 7+7 #TX 0 0x0000 //TX_OPERATION_MODE_0 1 0x0000 //TX_OPERATION_MODE_1 @@ -10546,7 +16049,7 @@ 18 0x0000 //TX_SYS_RESRV_2 19 0x0000 //TX_SYS_RESRV_3 20 0x0000 //TX_DIST2REF0 -21 0x009D //TX_DIST2REF1 +21 0x009C //TX_DIST2REF1 22 0x0000 //TX_DIST2REF_02 23 0x0000 //TX_DIST2REF_03 24 0x0000 //TX_DIST2REF_04 @@ -10776,12 +16279,12 @@ 248 0xF800 //TX_THR_SN_EST_6 249 0xF700 //TX_THR_SN_EST_7 250 0x0000 //TX_DELTA_THR_SN_EST_0 -251 0x0100 //TX_DELTA_THR_SN_EST_1 +251 0x0200 //TX_DELTA_THR_SN_EST_1 252 0x0200 //TX_DELTA_THR_SN_EST_2 253 0x0200 //TX_DELTA_THR_SN_EST_3 -254 0x0200 //TX_DELTA_THR_SN_EST_4 -255 0x0100 //TX_DELTA_THR_SN_EST_5 -256 0x0200 //TX_DELTA_THR_SN_EST_6 +254 0x0100 //TX_DELTA_THR_SN_EST_4 +255 0x0200 //TX_DELTA_THR_SN_EST_5 +256 0x0100 //TX_DELTA_THR_SN_EST_6 257 0x0200 //TX_DELTA_THR_SN_EST_7 258 0x4000 //TX_LAMBDA_NN_EST_0 259 0x4000 //TX_LAMBDA_NN_EST_1 @@ -10809,16 +16312,16 @@ 281 0x0014 //TX_NS_LVL_CTRL_0 282 0x0016 //TX_NS_LVL_CTRL_1 283 0x0016 //TX_NS_LVL_CTRL_2 -284 0x0016 //TX_NS_LVL_CTRL_3 -285 0x0018 //TX_NS_LVL_CTRL_4 -286 0x0016 //TX_NS_LVL_CTRL_5 -287 0x0012 //TX_NS_LVL_CTRL_6 +284 0x0018 //TX_NS_LVL_CTRL_3 +285 0x0016 //TX_NS_LVL_CTRL_4 +286 0x0012 //TX_NS_LVL_CTRL_5 +287 0x0016 //TX_NS_LVL_CTRL_6 288 0x0017 //TX_NS_LVL_CTRL_7 289 0x000E //TX_MIN_GAIN_S_0 -290 0x0012 //TX_MIN_GAIN_S_1 -291 0x0007 //TX_MIN_GAIN_S_2 -292 0x0012 //TX_MIN_GAIN_S_3 -293 0x0010 //TX_MIN_GAIN_S_4 +290 0x0007 //TX_MIN_GAIN_S_1 +291 0x0012 //TX_MIN_GAIN_S_2 +292 0x0010 //TX_MIN_GAIN_S_3 +293 0x0012 //TX_MIN_GAIN_S_4 294 0x0012 //TX_MIN_GAIN_S_5 295 0x0012 //TX_MIN_GAIN_S_6 296 0x0012 //TX_MIN_GAIN_S_7 @@ -10840,29 +16343,29 @@ 312 0x7FFF //TX_A_POST_FILT_0 313 0x2000 //TX_A_POST_FILT_1 314 0x4000 //TX_A_POST_FILT_S_0 -315 0x5000 //TX_A_POST_FILT_S_1 +315 0x4000 //TX_A_POST_FILT_S_1 316 0x4000 //TX_A_POST_FILT_S_2 317 0x4000 //TX_A_POST_FILT_S_3 318 0x4000 //TX_A_POST_FILT_S_4 319 0x4000 //TX_A_POST_FILT_S_5 -320 0x4000 //TX_A_POST_FILT_S_6 +320 0x5000 //TX_A_POST_FILT_S_6 321 0x7000 //TX_A_POST_FILT_S_7 322 0x1000 //TX_B_POST_FILT_0 323 0x2000 //TX_B_POST_FILT_1 -324 0x3000 //TX_B_POST_FILT_2 +324 0x2000 //TX_B_POST_FILT_2 325 0x2000 //TX_B_POST_FILT_3 -326 0x5000 //TX_B_POST_FILT_4 +326 0x2000 //TX_B_POST_FILT_4 327 0x2000 //TX_B_POST_FILT_5 -328 0x6000 //TX_B_POST_FILT_6 +328 0x3000 //TX_B_POST_FILT_6 329 0x3000 //TX_B_POST_FILT_7 330 0x1000 //TX_B_LESSCUT_RTO_S_0 -331 0x6000 //TX_B_LESSCUT_RTO_S_1 -332 0x6000 //TX_B_LESSCUT_RTO_S_2 -333 0x6000 //TX_B_LESSCUT_RTO_S_3 -334 0x6000 //TX_B_LESSCUT_RTO_S_4 -335 0x6000 //TX_B_LESSCUT_RTO_S_5 -336 0x7FFF //TX_B_LESSCUT_RTO_S_6 -337 0x7FFF //TX_B_LESSCUT_RTO_S_7 +331 0x1000 //TX_B_LESSCUT_RTO_S_1 +332 0x1000 //TX_B_LESSCUT_RTO_S_2 +333 0x1000 //TX_B_LESSCUT_RTO_S_3 +334 0x1000 //TX_B_LESSCUT_RTO_S_4 +335 0x1000 //TX_B_LESSCUT_RTO_S_5 +336 0x1000 //TX_B_LESSCUT_RTO_S_6 +337 0x1000 //TX_B_LESSCUT_RTO_S_7 338 0x7E14 //TX_LAMBDA_PFILT 339 0x7C29 //TX_LAMBDA_PFILT_S_0 340 0x7C29 //TX_LAMBDA_PFILT_S_1 @@ -10905,10 +16408,10 @@ 377 0x4E20 //TX_NOISE_TH_5_4 378 0x39DF //TX_NOISE_TH_6 379 0x0014 //TX_MINENOISE_TH -380 0x4000 //TX_MINENOISE_MIC0_TH_MTS -381 0xFFEE //TX_MINENOISE_MIC0_TH_EXP -382 0x6000 //TX_MINENOISE_MIC0_S_TH_MTS -383 0xFFF3 //TX_MINENOISE_MIC0_S_TH_EXP +380 0xD508 //TX_MORENS_TFMASK_TH +381 0x0001 //TX_DRC_QUIET_FLOOR +382 0x6D60 //TX_RATIODTL_CUT_TH +383 0x1482 //TX_DT_CUT_K1 384 0x00A5 //TX_OUT_ENER_S_TH_CLEAN 385 0x00A5 //TX_OUT_ENER_S_TH_LESSCLEAN 386 0x00A5 //TX_OUT_ENER_S_TH_NOISY @@ -10916,15 +16419,15 @@ 388 0x0200 //TX_OUT_ENER_TH_SPEECH 389 0x2000 //TX_SN_NPB_GAIN 390 0x0000 //TX_NN_NPB_GAIN -391 0x0000 //TX_CSX_ALPHA_0 -392 0x0000 //TX_CSX_ALPHA_1 -393 0x0000 //TX_CSX_ALPHA_2 -394 0x0000 //TX_CSX_ALPHA_3 -395 0x0800 //TX_MU_ARSP_EST -396 0x00C8 //TX_P_OUTBEAM_MIN_TH +391 0x3000 //TX_POST_MASK_SUP_HSNE +392 0x07D0 //TX_TAIL_DET_TH +393 0x4000 //TX_B_LESSCUT_RTO_WTA +394 0x0000 //TX_MEL_G_R +395 0x0080 //TX_SUPHIGH_TH +396 0x0000 //TX_MASK_G_R 397 0x0002 //TX_EXTRA_NS_L -398 0x0800 //TX_EXTRA_NS_A -399 0x0005 //TX_VR_NOISE_FLOOR_TH +398 0x1800 //TX_C_POST_FLT_MASK +399 0x7FFF //TX_A_POST_FLT_WNS 400 0x0148 //TX_MIN_G_LOW300HZ 401 0x0004 //TX_MAXLEVEL_CNG 402 0x00B4 //TX_STN_NOISE_TH @@ -11039,16 +16542,16 @@ 511 0x6666 //TX_MIC_TO_BFGAIN 512 0x0000 //TX_MICTOBFGAIN0 513 0x0000 //TX_FASTMUE_TH -514 0x0000 //TX_DERVB_LEN_0 -515 0x0000 //TX_DERVB_LEN_1 -516 0x0000 //TX_RHO_DERVB -517 0x0000 //TX_MIC_INDX_DERVB -518 0x0000 //TX_MU_DERVB -519 0x0000 //TX_DR_RESRV_0 -520 0x0000 //TX_DR_RESRV_1 -521 0x0000 //TX_DR_RESRV_2 -522 0x0000 //TX_DR_RESRV_3 -523 0x0000 //TX_DR_RESRV_4 +514 0x2CCC //TX_DEREVERB_LF_MU +515 0x3200 //TX_DEREVERB_HF_MU +516 0x0007 //TX_DEREVERB_DELAY +517 0x0004 //TX_DEREVERB_COEF_LEN +518 0x0003 //TX_DEREVERB_DNR +519 0x0000 //TX_DEREVERB_ALPHA +520 0x0000 //TX_DEREVERB_BETA +521 0x7FFF //TX_GSC_RTOL_TH +522 0x7FFF //TX_GSC_RTOH_TH +523 0x7E2C //TX_WIDE2_MEANHTH 524 0x0000 //TX_DR_RESRV_5 525 0x0000 //TX_DR_RESRV_6 526 0x0000 //TX_DR_RESRV_7 @@ -11422,8 +16925,73 @@ 894 0xC000 //TX_FASTNS_SSA_THHFL 895 0xCCCC //TX_FASTNS_SSA_THLFH 896 0xD999 //TX_FASTNS_SSA_THHFH +897 0x2339 //TX_SENDFUNC_REG_MICMUTE +898 0x0021 //TX_SENDFUNC_REG_MICMUTE1 +899 0x02BC //TX_MICMUTE_RATIO_THR +900 0x0140 //TX_MICMUTE_AMP_THR +901 0x0004 //TX_MICMUTE_HPF_IND +902 0x00C0 //TX_MICMUTE_LOG_EYR_TH +903 0x0008 //TX_MICMUTE_CVG_TIME +904 0x0008 //TX_MICMUTE_RELEASE_TIME +905 0x01FE //TX_MIC_VOLUME_MIC0MUTE +906 0x0020 //TX_MICMUTE_EPD_OFFSET_0 +907 0x001E //TX_MICMUTE_FRQ_AEC_L +908 0x7999 //TX_MICMUTE_EAD_THR +909 0x7FFF //TX_MICMUTE_LAMBDA_CB_NLE +910 0x7FFF //TX_MICMUTE_LAMBDA_RE_EST +911 0x4000 //TX_DTD_THR1_MICMUTE_0 +912 0x7000 //TX_DTD_THR1_MICMUTE_1 +913 0x7FFF //TX_DTD_THR1_MICMUTE_2 +914 0x7FFF //TX_DTD_THR1_MICMUTE_3 +915 0x6CCC //TX_DTD_THR2_MICMUTE_0 +916 0x0400 //TX_MICMUTE_MIN_EQ_RE_EST_0 +917 0x0400 //TX_MICMUTE_MIN_EQ_RE_EST_1 +918 0x1000 //TX_MICMUTE_MIN_EQ_RE_EST_2 +919 0x7FFF //TX_MICMUTE_MIN_EQ_RE_EST_3 +920 0x7FFF //TX_MICMUTE_MIN_EQ_RE_EST_4 +921 0x4000 //TX_MICMUTE_C_POST_FLT +922 0x03E8 //TX_MICMUTE_DT_CUT_K +923 0x0001 //TX_MICMUTE_DT_CUT_THR +924 0x03E8 //TX_MICMUTE_DT_CUT_K2 +925 0x0001 //TX_MICMUTE_DT_CUT_THR2 +926 0x0064 //TX_MICMUTE_DT2_HOLD_N +927 0x1000 //TX_MICMUTE_RATIODTH_THCUT +928 0x1000 //TX_MICMUTE_B_POST_FLT_ECHOL +929 0x7FFF //TX_MICMUTE_B_POST_FLT_ECHOH +930 0x0400 //TX_MICMUTE_C_POST_FLT_MASK +931 0x7999 //TX_MICMUTE_RATIODTL_CUT_TH +932 0x0258 //TX_MICMUTE_DT_CUT_K1 +933 0x0800 //TX_MICMUTE_N2_SN_EST +934 0xFC00 //TX_MICMUTE_THR_SN_EST_0 +935 0x001C //TX_MICMUTE_MIN_G_CTRL_0 +936 0x6000 //TX_MICMUTE_A_POST_FILT_S_0 +937 0x7000 //TX_MICMUTE_B_POST_FILT_0 +938 0x2710 //TX_MIC1RUB_AMP_THR +939 0x0010 //TX_MIC1MUTE_RATIO_THR +940 0x0450 //TX_MIC1MUTE_AMP_THR +941 0x0008 //TX_MIC1MUTE_CVG_TIME +942 0x0008 //TX_MIC1MUTE_RELEASE_TIME +943 0x0000 //TX_AMS_RESRV_01 +944 0x0000 //TX_AMS_RESRV_02 +945 0x0000 //TX_AMS_RESRV_03 +946 0x0000 //TX_AMS_RESRV_04 +947 0x0000 //TX_AMS_RESRV_05 +948 0x0000 //TX_AMS_RESRV_06 +949 0x0000 //TX_AMS_RESRV_07 +950 0x0000 //TX_AMS_RESRV_08 +951 0x0000 //TX_AMS_RESRV_09 +952 0x0000 //TX_AMS_RESRV_10 +953 0x0000 //TX_AMS_RESRV_11 +954 0x0000 //TX_AMS_RESRV_12 +955 0x0000 //TX_AMS_RESRV_13 +956 0x0000 //TX_AMS_RESRV_14 +957 0x0000 //TX_AMS_RESRV_15 +958 0x0000 //TX_AMS_RESRV_16 +959 0x0000 //TX_AMS_RESRV_17 +960 0x0000 //TX_AMS_RESRV_18 +961 0x0000 //TX_AMS_RESRV_19 #RX -0 0x002C //RX_RECVFUNC_MODE_0 +0 0x202C //RX_RECVFUNC_MODE_0 1 0x0000 //RX_RECVFUNC_MODE_1 2 0x0004 //RX_SAMPLINGFREQ_SIG 3 0x0004 //RX_SAMPLINGFREQ_PROC @@ -12273,14 +17841,866 @@ 110 0x0000 //RX_FDDRC_RESRV_0 129 0x0100 //RX_SPK_VOL 130 0x0000 //RX_VOL_RESRV_0 +#RX 2 +157 0x002C //RX_RECVFUNC_MODE_0 +158 0x0000 //RX_RECVFUNC_MODE_1 +159 0x0004 //RX_SAMPLINGFREQ_SIG +160 0x0004 //RX_SAMPLINGFREQ_PROC +161 0x000A //RX_FRAME_SZ +162 0x0000 //RX_DELAY_OPT +163 0x1000 //RX_TDDRC_ALPHA_UP_1 +164 0x1000 //RX_TDDRC_ALPHA_UP_2 +165 0x1000 //RX_TDDRC_ALPHA_UP_3 +166 0x1000 //RX_TDDRC_ALPHA_UP_4 +167 0x064E //RX_PGA +168 0x7FFF //RX_A_HP +169 0x4000 //RX_B_PE +170 0x5800 //RX_THR_PITCH_DET_0 +171 0x5000 //RX_THR_PITCH_DET_1 +172 0x4000 //RX_THR_PITCH_DET_2 +173 0x0008 //RX_PITCH_BFR_LEN +174 0x0003 //RX_SBD_PITCH_DET +175 0x0100 //RX_PP_RESRV_0 +176 0x0020 //RX_PP_RESRV_1 +177 0x0600 //RX_N_SN_EST +178 0x000C //RX_N2_SN_EST +179 0x000F //RX_NS_LVL_CTRL +180 0xF800 //RX_THR_SN_EST +181 0x7E00 //RX_LAMBDA_PFILT +182 0x000A //RX_FENS_RESRV_0 +183 0x0190 //RX_FENS_RESRV_1 +184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +187 0x0002 //RX_EXTRA_NS_L +188 0x0800 //RX_EXTRA_NS_A +189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +190 0x7000 //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +192 0x199A //RX_A_POST_FLT +193 0x0000 //RX_LMT_THRD +194 0x4000 //RX_LMT_ALPHA +195 0x0020 //RX_FDEQ_SUBNUM +196 0x4848 //RX_FDEQ_GAIN_0 +197 0x4850 //RX_FDEQ_GAIN_1 +198 0x6478 //RX_FDEQ_GAIN_2 +199 0x8689 //RX_FDEQ_GAIN_3 +200 0x908F //RX_FDEQ_GAIN_4 +201 0x9495 //RX_FDEQ_GAIN_5 +202 0x989D //RX_FDEQ_GAIN_6 +203 0x9DA6 //RX_FDEQ_GAIN_7 +204 0xA895 //RX_FDEQ_GAIN_8 +205 0x8A8A //RX_FDEQ_GAIN_9 +206 0x8E78 //RX_FDEQ_GAIN_10 +207 0x7070 //RX_FDEQ_GAIN_11 +208 0x7680 //RX_FDEQ_GAIN_12 +209 0x787C //RX_FDEQ_GAIN_13 +210 0x8890 //RX_FDEQ_GAIN_14 +211 0x9CAC //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0202 //RX_FDEQ_BIN_0 +221 0x0202 //RX_FDEQ_BIN_1 +222 0x0302 //RX_FDEQ_BIN_2 +223 0x0304 //RX_FDEQ_BIN_3 +224 0x0405 //RX_FDEQ_BIN_4 +225 0x0506 //RX_FDEQ_BIN_5 +226 0x0708 //RX_FDEQ_BIN_6 +227 0x090A //RX_FDEQ_BIN_7 +228 0x0B0C //RX_FDEQ_BIN_8 +229 0x0D0E //RX_FDEQ_BIN_9 +230 0x1013 //RX_FDEQ_BIN_10 +231 0x1719 //RX_FDEQ_BIN_11 +232 0x1B1E //RX_FDEQ_BIN_12 +233 0x1E1E //RX_FDEQ_BIN_13 +234 0x1E28 //RX_FDEQ_BIN_14 +235 0x282C //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x4000 //RX_FDEQ_RESRV_0 +245 0x0320 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0030 //RX_FDDRC_BAND_MARGIN_1 +248 0x0050 //RX_FDDRC_BAND_MARGIN_2 +249 0x0080 //RX_FDDRC_BAND_MARGIN_3 +250 0x0007 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x5000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x6400 //RX_FDDRC_THRD_3_2 +258 0x6400 //RX_FDDRC_THRD_3_3 +259 0x2000 //RX_FDDRC_SLANT_0_0 +260 0x2000 //RX_FDDRC_SLANT_0_1 +261 0x2000 //RX_FDDRC_SLANT_0_2 +262 0x2000 //RX_FDDRC_SLANT_0_3 +263 0x5333 //RX_FDDRC_SLANT_1_0 +264 0x5333 //RX_FDDRC_SLANT_1_1 +265 0x5333 //RX_FDDRC_SLANT_1_2 +266 0x5333 //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +268 0x0002 //RX_FILTINDX +269 0x0000 //RX_TDDRC_THRD_0 +270 0x0000 //RX_TDDRC_THRD_1 +271 0x1800 //RX_TDDRC_THRD_2 +272 0x1800 //RX_TDDRC_THRD_3 +273 0x3000 //RX_TDDRC_SLANT_0 +274 0x6E00 //RX_TDDRC_SLANT_1 +275 0x1000 //RX_TDDRC_ALPHA_UP_0 +276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x199A //RX_TDDRC_HMNC_GAIN +279 0x0001 //RX_TDDRC_SMT_FLAG +280 0x0CCD //RX_TDDRC_SMT_W +281 0x0275 //RX_TDDRC_DRC_GAIN +282 0x7C00 //RX_LAMBDA_PKA_FP +283 0x1964 //RX_TPKA_FP +284 0x0080 //RX_MIN_G_FP +285 0x2000 //RX_MAX_G_FP +286 0x000D //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 +288 0x0000 //RX_MAXLEVEL_CNG +289 0x3000 //RX_BWE_UV_TH +290 0x3000 //RX_BWE_UV_TH2 +291 0x1800 //RX_BWE_UV_TH3 +292 0x1000 //RX_BWE_V_TH +293 0x04CD //RX_BWE_GAIN1_V_TH1 +294 0x0F33 //RX_BWE_GAIN1_V_TH2 +295 0x7333 //RX_BWE_UV_EQ +296 0x199A //RX_BWE_V_EQ +297 0x7333 //RX_BWE_TONE_TH +298 0x0004 //RX_BWE_UV_HOLD_T +299 0x6CCD //RX_BWE_GAIN2_ALPHA +300 0x799A //RX_BWE_GAIN3_ALPHA +301 0x001E //RX_BWE_CUTOFF +302 0x3000 //RX_BWE_GAINFILL +303 0x3200 //RX_BWE_MAXTH_TONE +304 0x2000 //RX_BWE_EQ_0 +305 0x2000 //RX_BWE_EQ_1 +306 0x2000 //RX_BWE_EQ_2 +307 0x2000 //RX_BWE_EQ_3 +308 0x2000 //RX_BWE_EQ_4 +309 0x2000 //RX_BWE_EQ_5 +310 0x2000 //RX_BWE_EQ_6 +311 0x0000 //RX_BWE_RESRV_0 +312 0x0000 //RX_BWE_RESRV_1 +313 0x0000 //RX_BWE_RESRV_2 +#VOL 0 +163 0x1000 //RX_TDDRC_ALPHA_UP_1 +164 0x1000 //RX_TDDRC_ALPHA_UP_2 +165 0x1000 //RX_TDDRC_ALPHA_UP_3 +166 0x1000 //RX_TDDRC_ALPHA_UP_4 +184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +190 0x7000 //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +269 0x0000 //RX_TDDRC_THRD_0 +270 0x0000 //RX_TDDRC_THRD_1 +271 0x1800 //RX_TDDRC_THRD_2 +272 0x1800 //RX_TDDRC_THRD_3 +273 0x3000 //RX_TDDRC_SLANT_0 +274 0x6E00 //RX_TDDRC_SLANT_1 +275 0x1000 //RX_TDDRC_ALPHA_UP_0 +276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x199A //RX_TDDRC_HMNC_GAIN +279 0x0001 //RX_TDDRC_SMT_FLAG +280 0x0CCD //RX_TDDRC_SMT_W +281 0x0275 //RX_TDDRC_DRC_GAIN +195 0x0020 //RX_FDEQ_SUBNUM +196 0x4848 //RX_FDEQ_GAIN_0 +197 0x4850 //RX_FDEQ_GAIN_1 +198 0x6478 //RX_FDEQ_GAIN_2 +199 0x8689 //RX_FDEQ_GAIN_3 +200 0x908F //RX_FDEQ_GAIN_4 +201 0x9495 //RX_FDEQ_GAIN_5 +202 0x989D //RX_FDEQ_GAIN_6 +203 0x9DA6 //RX_FDEQ_GAIN_7 +204 0xA895 //RX_FDEQ_GAIN_8 +205 0x8A8A //RX_FDEQ_GAIN_9 +206 0x8E78 //RX_FDEQ_GAIN_10 +207 0x7070 //RX_FDEQ_GAIN_11 +208 0x7680 //RX_FDEQ_GAIN_12 +209 0x787C //RX_FDEQ_GAIN_13 +210 0x8890 //RX_FDEQ_GAIN_14 +211 0x9CAC //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0202 //RX_FDEQ_BIN_0 +221 0x0202 //RX_FDEQ_BIN_1 +222 0x0302 //RX_FDEQ_BIN_2 +223 0x0304 //RX_FDEQ_BIN_3 +224 0x0405 //RX_FDEQ_BIN_4 +225 0x0506 //RX_FDEQ_BIN_5 +226 0x0708 //RX_FDEQ_BIN_6 +227 0x090A //RX_FDEQ_BIN_7 +228 0x0B0C //RX_FDEQ_BIN_8 +229 0x0D0E //RX_FDEQ_BIN_9 +230 0x1013 //RX_FDEQ_BIN_10 +231 0x1719 //RX_FDEQ_BIN_11 +232 0x1B1E //RX_FDEQ_BIN_12 +233 0x1E1E //RX_FDEQ_BIN_13 +234 0x1E28 //RX_FDEQ_BIN_14 +235 0x282C //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x4000 //RX_FDEQ_RESRV_0 +245 0x0320 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0030 //RX_FDDRC_BAND_MARGIN_1 +248 0x0050 //RX_FDDRC_BAND_MARGIN_2 +249 0x0080 //RX_FDDRC_BAND_MARGIN_3 +250 0x0007 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x5000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x6400 //RX_FDDRC_THRD_3_2 +258 0x6400 //RX_FDDRC_THRD_3_3 +259 0x2000 //RX_FDDRC_SLANT_0_0 +260 0x2000 //RX_FDDRC_SLANT_0_1 +261 0x2000 //RX_FDDRC_SLANT_0_2 +262 0x2000 //RX_FDDRC_SLANT_0_3 +263 0x5333 //RX_FDDRC_SLANT_1_0 +264 0x5333 //RX_FDDRC_SLANT_1_1 +265 0x5333 //RX_FDDRC_SLANT_1_2 +266 0x5333 //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +286 0x000D //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 +#VOL 1 +163 0x1000 //RX_TDDRC_ALPHA_UP_1 +164 0x1000 //RX_TDDRC_ALPHA_UP_2 +165 0x1000 //RX_TDDRC_ALPHA_UP_3 +166 0x1000 //RX_TDDRC_ALPHA_UP_4 +184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +190 0x7000 //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +269 0x0000 //RX_TDDRC_THRD_0 +270 0x0000 //RX_TDDRC_THRD_1 +271 0x1800 //RX_TDDRC_THRD_2 +272 0x1800 //RX_TDDRC_THRD_3 +273 0x3000 //RX_TDDRC_SLANT_0 +274 0x6E00 //RX_TDDRC_SLANT_1 +275 0x1000 //RX_TDDRC_ALPHA_UP_0 +276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x199A //RX_TDDRC_HMNC_GAIN +279 0x0001 //RX_TDDRC_SMT_FLAG +280 0x0CCD //RX_TDDRC_SMT_W +281 0x0275 //RX_TDDRC_DRC_GAIN +195 0x0020 //RX_FDEQ_SUBNUM +196 0x4848 //RX_FDEQ_GAIN_0 +197 0x4850 //RX_FDEQ_GAIN_1 +198 0x6478 //RX_FDEQ_GAIN_2 +199 0x8689 //RX_FDEQ_GAIN_3 +200 0x908F //RX_FDEQ_GAIN_4 +201 0x9495 //RX_FDEQ_GAIN_5 +202 0x989D //RX_FDEQ_GAIN_6 +203 0x9DA6 //RX_FDEQ_GAIN_7 +204 0xA895 //RX_FDEQ_GAIN_8 +205 0x8A8A //RX_FDEQ_GAIN_9 +206 0x8E78 //RX_FDEQ_GAIN_10 +207 0x7070 //RX_FDEQ_GAIN_11 +208 0x7680 //RX_FDEQ_GAIN_12 +209 0x787C //RX_FDEQ_GAIN_13 +210 0x8890 //RX_FDEQ_GAIN_14 +211 0x9CAC //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0202 //RX_FDEQ_BIN_0 +221 0x0202 //RX_FDEQ_BIN_1 +222 0x0302 //RX_FDEQ_BIN_2 +223 0x0304 //RX_FDEQ_BIN_3 +224 0x0405 //RX_FDEQ_BIN_4 +225 0x0506 //RX_FDEQ_BIN_5 +226 0x0708 //RX_FDEQ_BIN_6 +227 0x090A //RX_FDEQ_BIN_7 +228 0x0B0C //RX_FDEQ_BIN_8 +229 0x0D0E //RX_FDEQ_BIN_9 +230 0x1013 //RX_FDEQ_BIN_10 +231 0x1719 //RX_FDEQ_BIN_11 +232 0x1B1E //RX_FDEQ_BIN_12 +233 0x1E1E //RX_FDEQ_BIN_13 +234 0x1E28 //RX_FDEQ_BIN_14 +235 0x282C //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x4000 //RX_FDEQ_RESRV_0 +245 0x0320 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0030 //RX_FDDRC_BAND_MARGIN_1 +248 0x0050 //RX_FDDRC_BAND_MARGIN_2 +249 0x0080 //RX_FDDRC_BAND_MARGIN_3 +250 0x0007 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x5000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x6400 //RX_FDDRC_THRD_3_2 +258 0x6400 //RX_FDDRC_THRD_3_3 +259 0x2000 //RX_FDDRC_SLANT_0_0 +260 0x2000 //RX_FDDRC_SLANT_0_1 +261 0x2000 //RX_FDDRC_SLANT_0_2 +262 0x2000 //RX_FDDRC_SLANT_0_3 +263 0x5333 //RX_FDDRC_SLANT_1_0 +264 0x5333 //RX_FDDRC_SLANT_1_1 +265 0x5333 //RX_FDDRC_SLANT_1_2 +266 0x5333 //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +286 0x0016 //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 +#VOL 2 +163 0x1000 //RX_TDDRC_ALPHA_UP_1 +164 0x1000 //RX_TDDRC_ALPHA_UP_2 +165 0x1000 //RX_TDDRC_ALPHA_UP_3 +166 0x1000 //RX_TDDRC_ALPHA_UP_4 +184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +190 0x7000 //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +269 0x0000 //RX_TDDRC_THRD_0 +270 0x0000 //RX_TDDRC_THRD_1 +271 0x1800 //RX_TDDRC_THRD_2 +272 0x1800 //RX_TDDRC_THRD_3 +273 0x3000 //RX_TDDRC_SLANT_0 +274 0x6E00 //RX_TDDRC_SLANT_1 +275 0x1000 //RX_TDDRC_ALPHA_UP_0 +276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x199A //RX_TDDRC_HMNC_GAIN +279 0x0001 //RX_TDDRC_SMT_FLAG +280 0x0CCD //RX_TDDRC_SMT_W +281 0x0275 //RX_TDDRC_DRC_GAIN +195 0x0020 //RX_FDEQ_SUBNUM +196 0x4848 //RX_FDEQ_GAIN_0 +197 0x4850 //RX_FDEQ_GAIN_1 +198 0x6478 //RX_FDEQ_GAIN_2 +199 0x8689 //RX_FDEQ_GAIN_3 +200 0x908F //RX_FDEQ_GAIN_4 +201 0x9495 //RX_FDEQ_GAIN_5 +202 0x989D //RX_FDEQ_GAIN_6 +203 0x9DA6 //RX_FDEQ_GAIN_7 +204 0xA895 //RX_FDEQ_GAIN_8 +205 0x8A8A //RX_FDEQ_GAIN_9 +206 0x8E78 //RX_FDEQ_GAIN_10 +207 0x7070 //RX_FDEQ_GAIN_11 +208 0x7680 //RX_FDEQ_GAIN_12 +209 0x787C //RX_FDEQ_GAIN_13 +210 0x8890 //RX_FDEQ_GAIN_14 +211 0x9CAC //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0202 //RX_FDEQ_BIN_0 +221 0x0202 //RX_FDEQ_BIN_1 +222 0x0302 //RX_FDEQ_BIN_2 +223 0x0304 //RX_FDEQ_BIN_3 +224 0x0405 //RX_FDEQ_BIN_4 +225 0x0506 //RX_FDEQ_BIN_5 +226 0x0708 //RX_FDEQ_BIN_6 +227 0x090A //RX_FDEQ_BIN_7 +228 0x0B0C //RX_FDEQ_BIN_8 +229 0x0D0E //RX_FDEQ_BIN_9 +230 0x1013 //RX_FDEQ_BIN_10 +231 0x1719 //RX_FDEQ_BIN_11 +232 0x1B1E //RX_FDEQ_BIN_12 +233 0x1E1E //RX_FDEQ_BIN_13 +234 0x1E28 //RX_FDEQ_BIN_14 +235 0x282C //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x4000 //RX_FDEQ_RESRV_0 +245 0x0320 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0030 //RX_FDDRC_BAND_MARGIN_1 +248 0x0050 //RX_FDDRC_BAND_MARGIN_2 +249 0x0080 //RX_FDDRC_BAND_MARGIN_3 +250 0x0007 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x5000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x6400 //RX_FDDRC_THRD_3_2 +258 0x6400 //RX_FDDRC_THRD_3_3 +259 0x2000 //RX_FDDRC_SLANT_0_0 +260 0x2000 //RX_FDDRC_SLANT_0_1 +261 0x2000 //RX_FDDRC_SLANT_0_2 +262 0x2000 //RX_FDDRC_SLANT_0_3 +263 0x5333 //RX_FDDRC_SLANT_1_0 +264 0x5333 //RX_FDDRC_SLANT_1_1 +265 0x5333 //RX_FDDRC_SLANT_1_2 +266 0x5333 //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +286 0x0026 //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 +#VOL 3 +163 0x1000 //RX_TDDRC_ALPHA_UP_1 +164 0x1000 //RX_TDDRC_ALPHA_UP_2 +165 0x1000 //RX_TDDRC_ALPHA_UP_3 +166 0x1000 //RX_TDDRC_ALPHA_UP_4 +184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +190 0x7000 //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +269 0x0000 //RX_TDDRC_THRD_0 +270 0x0000 //RX_TDDRC_THRD_1 +271 0x1800 //RX_TDDRC_THRD_2 +272 0x1800 //RX_TDDRC_THRD_3 +273 0x3000 //RX_TDDRC_SLANT_0 +274 0x6E00 //RX_TDDRC_SLANT_1 +275 0x1000 //RX_TDDRC_ALPHA_UP_0 +276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x199A //RX_TDDRC_HMNC_GAIN +279 0x0001 //RX_TDDRC_SMT_FLAG +280 0x0CCD //RX_TDDRC_SMT_W +281 0x0275 //RX_TDDRC_DRC_GAIN +195 0x0020 //RX_FDEQ_SUBNUM +196 0x4848 //RX_FDEQ_GAIN_0 +197 0x4850 //RX_FDEQ_GAIN_1 +198 0x6478 //RX_FDEQ_GAIN_2 +199 0x8689 //RX_FDEQ_GAIN_3 +200 0x908F //RX_FDEQ_GAIN_4 +201 0x9495 //RX_FDEQ_GAIN_5 +202 0x989D //RX_FDEQ_GAIN_6 +203 0x9DA6 //RX_FDEQ_GAIN_7 +204 0xA895 //RX_FDEQ_GAIN_8 +205 0x8A8A //RX_FDEQ_GAIN_9 +206 0x8E78 //RX_FDEQ_GAIN_10 +207 0x7070 //RX_FDEQ_GAIN_11 +208 0x7680 //RX_FDEQ_GAIN_12 +209 0x787C //RX_FDEQ_GAIN_13 +210 0x8890 //RX_FDEQ_GAIN_14 +211 0x9CAC //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0202 //RX_FDEQ_BIN_0 +221 0x0202 //RX_FDEQ_BIN_1 +222 0x0302 //RX_FDEQ_BIN_2 +223 0x0304 //RX_FDEQ_BIN_3 +224 0x0405 //RX_FDEQ_BIN_4 +225 0x0506 //RX_FDEQ_BIN_5 +226 0x0708 //RX_FDEQ_BIN_6 +227 0x090A //RX_FDEQ_BIN_7 +228 0x0B0C //RX_FDEQ_BIN_8 +229 0x0D0E //RX_FDEQ_BIN_9 +230 0x1013 //RX_FDEQ_BIN_10 +231 0x1719 //RX_FDEQ_BIN_11 +232 0x1B1E //RX_FDEQ_BIN_12 +233 0x1E1E //RX_FDEQ_BIN_13 +234 0x1E28 //RX_FDEQ_BIN_14 +235 0x282C //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x4000 //RX_FDEQ_RESRV_0 +245 0x0320 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0030 //RX_FDDRC_BAND_MARGIN_1 +248 0x0050 //RX_FDDRC_BAND_MARGIN_2 +249 0x0080 //RX_FDDRC_BAND_MARGIN_3 +250 0x0007 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x5000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x6400 //RX_FDDRC_THRD_3_2 +258 0x6400 //RX_FDDRC_THRD_3_3 +259 0x2000 //RX_FDDRC_SLANT_0_0 +260 0x2000 //RX_FDDRC_SLANT_0_1 +261 0x2000 //RX_FDDRC_SLANT_0_2 +262 0x2000 //RX_FDDRC_SLANT_0_3 +263 0x5333 //RX_FDDRC_SLANT_1_0 +264 0x5333 //RX_FDDRC_SLANT_1_1 +265 0x5333 //RX_FDDRC_SLANT_1_2 +266 0x5333 //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +286 0x003D //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 +#VOL 4 +163 0x1000 //RX_TDDRC_ALPHA_UP_1 +164 0x1000 //RX_TDDRC_ALPHA_UP_2 +165 0x1000 //RX_TDDRC_ALPHA_UP_3 +166 0x1000 //RX_TDDRC_ALPHA_UP_4 +184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +190 0x7000 //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +269 0x0000 //RX_TDDRC_THRD_0 +270 0x0000 //RX_TDDRC_THRD_1 +271 0x1800 //RX_TDDRC_THRD_2 +272 0x1800 //RX_TDDRC_THRD_3 +273 0x3000 //RX_TDDRC_SLANT_0 +274 0x6E00 //RX_TDDRC_SLANT_1 +275 0x1000 //RX_TDDRC_ALPHA_UP_0 +276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x199A //RX_TDDRC_HMNC_GAIN +279 0x0001 //RX_TDDRC_SMT_FLAG +280 0x0CCD //RX_TDDRC_SMT_W +281 0x0275 //RX_TDDRC_DRC_GAIN +195 0x0020 //RX_FDEQ_SUBNUM +196 0x4848 //RX_FDEQ_GAIN_0 +197 0x4850 //RX_FDEQ_GAIN_1 +198 0x6478 //RX_FDEQ_GAIN_2 +199 0x8689 //RX_FDEQ_GAIN_3 +200 0x908F //RX_FDEQ_GAIN_4 +201 0x9495 //RX_FDEQ_GAIN_5 +202 0x989D //RX_FDEQ_GAIN_6 +203 0x9DA6 //RX_FDEQ_GAIN_7 +204 0xA895 //RX_FDEQ_GAIN_8 +205 0x8A8A //RX_FDEQ_GAIN_9 +206 0x8E78 //RX_FDEQ_GAIN_10 +207 0x7070 //RX_FDEQ_GAIN_11 +208 0x7680 //RX_FDEQ_GAIN_12 +209 0x787C //RX_FDEQ_GAIN_13 +210 0x8890 //RX_FDEQ_GAIN_14 +211 0x9CAC //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0202 //RX_FDEQ_BIN_0 +221 0x0202 //RX_FDEQ_BIN_1 +222 0x0302 //RX_FDEQ_BIN_2 +223 0x0304 //RX_FDEQ_BIN_3 +224 0x0405 //RX_FDEQ_BIN_4 +225 0x0506 //RX_FDEQ_BIN_5 +226 0x0708 //RX_FDEQ_BIN_6 +227 0x090A //RX_FDEQ_BIN_7 +228 0x0B0C //RX_FDEQ_BIN_8 +229 0x0D0E //RX_FDEQ_BIN_9 +230 0x1013 //RX_FDEQ_BIN_10 +231 0x1719 //RX_FDEQ_BIN_11 +232 0x1B1E //RX_FDEQ_BIN_12 +233 0x1E1E //RX_FDEQ_BIN_13 +234 0x1E28 //RX_FDEQ_BIN_14 +235 0x282C //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x4000 //RX_FDEQ_RESRV_0 +245 0x0320 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0030 //RX_FDDRC_BAND_MARGIN_1 +248 0x0050 //RX_FDDRC_BAND_MARGIN_2 +249 0x0080 //RX_FDDRC_BAND_MARGIN_3 +250 0x0007 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x5000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x6400 //RX_FDDRC_THRD_3_2 +258 0x6400 //RX_FDDRC_THRD_3_3 +259 0x2000 //RX_FDDRC_SLANT_0_0 +260 0x2000 //RX_FDDRC_SLANT_0_1 +261 0x2000 //RX_FDDRC_SLANT_0_2 +262 0x2000 //RX_FDDRC_SLANT_0_3 +263 0x5333 //RX_FDDRC_SLANT_1_0 +264 0x5333 //RX_FDDRC_SLANT_1_1 +265 0x5333 //RX_FDDRC_SLANT_1_2 +266 0x5333 //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +286 0x0060 //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 +#VOL 5 +163 0x1000 //RX_TDDRC_ALPHA_UP_1 +164 0x1000 //RX_TDDRC_ALPHA_UP_2 +165 0x1000 //RX_TDDRC_ALPHA_UP_3 +166 0x1000 //RX_TDDRC_ALPHA_UP_4 +184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +190 0x7000 //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +269 0x0000 //RX_TDDRC_THRD_0 +270 0x0000 //RX_TDDRC_THRD_1 +271 0x1800 //RX_TDDRC_THRD_2 +272 0x1800 //RX_TDDRC_THRD_3 +273 0x3000 //RX_TDDRC_SLANT_0 +274 0x6E00 //RX_TDDRC_SLANT_1 +275 0x1000 //RX_TDDRC_ALPHA_UP_0 +276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x199A //RX_TDDRC_HMNC_GAIN +279 0x0001 //RX_TDDRC_SMT_FLAG +280 0x0CCD //RX_TDDRC_SMT_W +281 0x0275 //RX_TDDRC_DRC_GAIN +195 0x0020 //RX_FDEQ_SUBNUM +196 0x4848 //RX_FDEQ_GAIN_0 +197 0x4850 //RX_FDEQ_GAIN_1 +198 0x6478 //RX_FDEQ_GAIN_2 +199 0x8689 //RX_FDEQ_GAIN_3 +200 0x908F //RX_FDEQ_GAIN_4 +201 0x9495 //RX_FDEQ_GAIN_5 +202 0x989D //RX_FDEQ_GAIN_6 +203 0x9DA6 //RX_FDEQ_GAIN_7 +204 0xA895 //RX_FDEQ_GAIN_8 +205 0x8A8A //RX_FDEQ_GAIN_9 +206 0x8E78 //RX_FDEQ_GAIN_10 +207 0x7070 //RX_FDEQ_GAIN_11 +208 0x7680 //RX_FDEQ_GAIN_12 +209 0x787C //RX_FDEQ_GAIN_13 +210 0x8890 //RX_FDEQ_GAIN_14 +211 0x9CAC //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0202 //RX_FDEQ_BIN_0 +221 0x0202 //RX_FDEQ_BIN_1 +222 0x0302 //RX_FDEQ_BIN_2 +223 0x0304 //RX_FDEQ_BIN_3 +224 0x0405 //RX_FDEQ_BIN_4 +225 0x0506 //RX_FDEQ_BIN_5 +226 0x0708 //RX_FDEQ_BIN_6 +227 0x090A //RX_FDEQ_BIN_7 +228 0x0B0C //RX_FDEQ_BIN_8 +229 0x0D0E //RX_FDEQ_BIN_9 +230 0x1013 //RX_FDEQ_BIN_10 +231 0x1719 //RX_FDEQ_BIN_11 +232 0x1B1E //RX_FDEQ_BIN_12 +233 0x1E1E //RX_FDEQ_BIN_13 +234 0x1E28 //RX_FDEQ_BIN_14 +235 0x282C //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x4000 //RX_FDEQ_RESRV_0 +245 0x0320 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0030 //RX_FDDRC_BAND_MARGIN_1 +248 0x0050 //RX_FDDRC_BAND_MARGIN_2 +249 0x0080 //RX_FDDRC_BAND_MARGIN_3 +250 0x0007 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x5000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x6400 //RX_FDDRC_THRD_3_2 +258 0x6400 //RX_FDDRC_THRD_3_3 +259 0x2000 //RX_FDDRC_SLANT_0_0 +260 0x2000 //RX_FDDRC_SLANT_0_1 +261 0x2000 //RX_FDDRC_SLANT_0_2 +262 0x2000 //RX_FDDRC_SLANT_0_3 +263 0x5333 //RX_FDDRC_SLANT_1_0 +264 0x5333 //RX_FDDRC_SLANT_1_1 +265 0x5333 //RX_FDDRC_SLANT_1_2 +266 0x5333 //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +286 0x0099 //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 +#VOL 6 +163 0x1000 //RX_TDDRC_ALPHA_UP_1 +164 0x1000 //RX_TDDRC_ALPHA_UP_2 +165 0x1000 //RX_TDDRC_ALPHA_UP_3 +166 0x1000 //RX_TDDRC_ALPHA_UP_4 +184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +190 0x7000 //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +269 0x0000 //RX_TDDRC_THRD_0 +270 0x0000 //RX_TDDRC_THRD_1 +271 0x1800 //RX_TDDRC_THRD_2 +272 0x1800 //RX_TDDRC_THRD_3 +273 0x3000 //RX_TDDRC_SLANT_0 +274 0x6E00 //RX_TDDRC_SLANT_1 +275 0x1000 //RX_TDDRC_ALPHA_UP_0 +276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x199A //RX_TDDRC_HMNC_GAIN +279 0x0001 //RX_TDDRC_SMT_FLAG +280 0x0CCD //RX_TDDRC_SMT_W +281 0x0275 //RX_TDDRC_DRC_GAIN +195 0x0020 //RX_FDEQ_SUBNUM +196 0x4848 //RX_FDEQ_GAIN_0 +197 0x4850 //RX_FDEQ_GAIN_1 +198 0x6478 //RX_FDEQ_GAIN_2 +199 0x8689 //RX_FDEQ_GAIN_3 +200 0x908F //RX_FDEQ_GAIN_4 +201 0x9495 //RX_FDEQ_GAIN_5 +202 0x989D //RX_FDEQ_GAIN_6 +203 0x9DA6 //RX_FDEQ_GAIN_7 +204 0xA895 //RX_FDEQ_GAIN_8 +205 0x8A8A //RX_FDEQ_GAIN_9 +206 0x8E78 //RX_FDEQ_GAIN_10 +207 0x7070 //RX_FDEQ_GAIN_11 +208 0x7680 //RX_FDEQ_GAIN_12 +209 0x787C //RX_FDEQ_GAIN_13 +210 0x8890 //RX_FDEQ_GAIN_14 +211 0x9CAC //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0202 //RX_FDEQ_BIN_0 +221 0x0202 //RX_FDEQ_BIN_1 +222 0x0302 //RX_FDEQ_BIN_2 +223 0x0304 //RX_FDEQ_BIN_3 +224 0x0405 //RX_FDEQ_BIN_4 +225 0x0506 //RX_FDEQ_BIN_5 +226 0x0708 //RX_FDEQ_BIN_6 +227 0x090A //RX_FDEQ_BIN_7 +228 0x0B0C //RX_FDEQ_BIN_8 +229 0x0D0E //RX_FDEQ_BIN_9 +230 0x1013 //RX_FDEQ_BIN_10 +231 0x1719 //RX_FDEQ_BIN_11 +232 0x1B1E //RX_FDEQ_BIN_12 +233 0x1E1E //RX_FDEQ_BIN_13 +234 0x1E28 //RX_FDEQ_BIN_14 +235 0x282C //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x4000 //RX_FDEQ_RESRV_0 +245 0x0320 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0030 //RX_FDDRC_BAND_MARGIN_1 +248 0x0050 //RX_FDDRC_BAND_MARGIN_2 +249 0x0080 //RX_FDDRC_BAND_MARGIN_3 +250 0x0007 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x5000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x6400 //RX_FDDRC_THRD_3_2 +258 0x6400 //RX_FDDRC_THRD_3_3 +259 0x2000 //RX_FDDRC_SLANT_0_0 +260 0x2000 //RX_FDDRC_SLANT_0_1 +261 0x2000 //RX_FDDRC_SLANT_0_2 +262 0x2000 //RX_FDDRC_SLANT_0_3 +263 0x5333 //RX_FDDRC_SLANT_1_0 +264 0x5333 //RX_FDDRC_SLANT_1_1 +265 0x5333 //RX_FDDRC_SLANT_1_2 +266 0x5333 //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +286 0x0100 //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 #CASE_NAME HANDSET-HANDSET_HAC-VOICE_GENERIC-NB -#PARAM_TYPE TX+RX -#TOTAL_CUSTOM_STEP 7 +#PARAM_MODE Full +#PARAM_TYPE TX+2RX +#TOTAL_CUSTOM_STEP 7+7 #TX 0 0x0000 //TX_OPERATION_MODE_0 1 0x0000 //TX_OPERATION_MODE_1 -2 0x0036 //TX_PATCH_REG +2 0x0076 //TX_PATCH_REG 3 0x6F7E //TX_SENDFUNC_MODE_0 4 0x0001 //TX_SENDFUNC_MODE_1 5 0x0002 //TX_NUM_MIC @@ -12299,7 +18719,7 @@ 18 0x0000 //TX_SYS_RESRV_2 19 0x0000 //TX_SYS_RESRV_3 20 0x0000 //TX_DIST2REF0 -21 0x009D //TX_DIST2REF1 +21 0x009C //TX_DIST2REF1 22 0x0000 //TX_DIST2REF_02 23 0x0000 //TX_DIST2REF_03 24 0x0000 //TX_DIST2REF_04 @@ -12529,19 +18949,19 @@ 248 0xF800 //TX_THR_SN_EST_6 249 0xF700 //TX_THR_SN_EST_7 250 0x0000 //TX_DELTA_THR_SN_EST_0 -251 0x01A0 //TX_DELTA_THR_SN_EST_1 -252 0x0100 //TX_DELTA_THR_SN_EST_2 -253 0x0200 //TX_DELTA_THR_SN_EST_3 -254 0x01A0 //TX_DELTA_THR_SN_EST_4 -255 0x0100 //TX_DELTA_THR_SN_EST_5 -256 0x0000 //TX_DELTA_THR_SN_EST_6 +251 0x0100 //TX_DELTA_THR_SN_EST_1 +252 0x0200 //TX_DELTA_THR_SN_EST_2 +253 0x01A0 //TX_DELTA_THR_SN_EST_3 +254 0x0100 //TX_DELTA_THR_SN_EST_4 +255 0x0000 //TX_DELTA_THR_SN_EST_5 +256 0x01A0 //TX_DELTA_THR_SN_EST_6 257 0x0200 //TX_DELTA_THR_SN_EST_7 258 0x4000 //TX_LAMBDA_NN_EST_0 -259 0x4000 //TX_LAMBDA_NN_EST_1 -260 0x3000 //TX_LAMBDA_NN_EST_2 -261 0x4000 //TX_LAMBDA_NN_EST_3 +259 0x3000 //TX_LAMBDA_NN_EST_1 +260 0x4000 //TX_LAMBDA_NN_EST_2 +261 0x3000 //TX_LAMBDA_NN_EST_3 262 0x3000 //TX_LAMBDA_NN_EST_4 -263 0x3000 //TX_LAMBDA_NN_EST_5 +263 0x4000 //TX_LAMBDA_NN_EST_5 264 0x4000 //TX_LAMBDA_NN_EST_6 265 0x4000 //TX_LAMBDA_NN_EST_7 266 0x0400 //TX_N_SN_EST @@ -12560,20 +18980,20 @@ 279 0x4000 //TX_B_POST_FLT_0 280 0x4000 //TX_B_POST_FLT_1 281 0x0014 //TX_NS_LVL_CTRL_0 -282 0x001B //TX_NS_LVL_CTRL_1 -283 0x0019 //TX_NS_LVL_CTRL_2 +282 0x0019 //TX_NS_LVL_CTRL_1 +283 0x0017 //TX_NS_LVL_CTRL_2 284 0x0017 //TX_NS_LVL_CTRL_3 -285 0x0017 //TX_NS_LVL_CTRL_4 -286 0x0019 //TX_NS_LVL_CTRL_5 -287 0x0014 //TX_NS_LVL_CTRL_6 +285 0x0019 //TX_NS_LVL_CTRL_4 +286 0x0014 //TX_NS_LVL_CTRL_5 +287 0x001B //TX_NS_LVL_CTRL_6 288 0x0010 //TX_NS_LVL_CTRL_7 289 0x0010 //TX_MIN_GAIN_S_0 290 0x000C //TX_MIN_GAIN_S_1 -291 0x000C //TX_MIN_GAIN_S_2 +291 0x0010 //TX_MIN_GAIN_S_2 292 0x0010 //TX_MIN_GAIN_S_3 -293 0x0010 //TX_MIN_GAIN_S_4 -294 0x000C //TX_MIN_GAIN_S_5 -295 0x0014 //TX_MIN_GAIN_S_6 +293 0x000C //TX_MIN_GAIN_S_4 +294 0x0014 //TX_MIN_GAIN_S_5 +295 0x000C //TX_MIN_GAIN_S_6 296 0x0014 //TX_MIN_GAIN_S_7 297 0x5000 //TX_NMOS_SUP 298 0x0000 //TX_NS_MAX_PRI_SNR_TH @@ -12583,8 +19003,8 @@ 302 0x4000 //TX_SNRI_SUP_2 303 0x4000 //TX_SNRI_SUP_3 304 0x4000 //TX_SNRI_SUP_4 -305 0x4000 //TX_SNRI_SUP_5 -306 0x7FFF //TX_SNRI_SUP_6 +305 0x7FFF //TX_SNRI_SUP_5 +306 0x4000 //TX_SNRI_SUP_6 307 0x3000 //TX_SNRI_SUP_7 308 0x3000 //TX_THR_LFNS 309 0x001A //TX_G_LFNS @@ -12593,36 +19013,36 @@ 312 0x7FFF //TX_A_POST_FILT_0 313 0x2000 //TX_A_POST_FILT_1 314 0x2000 //TX_A_POST_FILT_S_0 -315 0x7000 //TX_A_POST_FILT_S_1 -316 0x6000 //TX_A_POST_FILT_S_2 -317 0x5000 //TX_A_POST_FILT_S_3 -318 0x2000 //TX_A_POST_FILT_S_4 -319 0x6000 //TX_A_POST_FILT_S_5 -320 0x2000 //TX_A_POST_FILT_S_6 +315 0x6000 //TX_A_POST_FILT_S_1 +316 0x5000 //TX_A_POST_FILT_S_2 +317 0x2000 //TX_A_POST_FILT_S_3 +318 0x6000 //TX_A_POST_FILT_S_4 +319 0x2000 //TX_A_POST_FILT_S_5 +320 0x7000 //TX_A_POST_FILT_S_6 321 0x7000 //TX_A_POST_FILT_S_7 322 0x4000 //TX_B_POST_FILT_0 323 0x4000 //TX_B_POST_FILT_1 -324 0x7FFF //TX_B_POST_FILT_2 -325 0x5000 //TX_B_POST_FILT_3 -326 0x7FFF //TX_B_POST_FILT_4 -327 0x7FFF //TX_B_POST_FILT_5 +324 0x5000 //TX_B_POST_FILT_2 +325 0x4000 //TX_B_POST_FILT_3 +326 0x4000 //TX_B_POST_FILT_4 +327 0x4000 //TX_B_POST_FILT_5 328 0x4000 //TX_B_POST_FILT_6 329 0x2000 //TX_B_POST_FILT_7 330 0x7FFF //TX_B_LESSCUT_RTO_S_0 -331 0x7FFF //TX_B_LESSCUT_RTO_S_1 -332 0x7FFF //TX_B_LESSCUT_RTO_S_2 -333 0x7FFF //TX_B_LESSCUT_RTO_S_3 -334 0x7FFF //TX_B_LESSCUT_RTO_S_4 -335 0x7FFF //TX_B_LESSCUT_RTO_S_5 -336 0x7FFF //TX_B_LESSCUT_RTO_S_6 -337 0x7FFF //TX_B_LESSCUT_RTO_S_7 +331 0x1000 //TX_B_LESSCUT_RTO_S_1 +332 0x1000 //TX_B_LESSCUT_RTO_S_2 +333 0x1000 //TX_B_LESSCUT_RTO_S_3 +334 0x1000 //TX_B_LESSCUT_RTO_S_4 +335 0x1000 //TX_B_LESSCUT_RTO_S_5 +336 0x1000 //TX_B_LESSCUT_RTO_S_6 +337 0x1000 //TX_B_LESSCUT_RTO_S_7 338 0x7E14 //TX_LAMBDA_PFILT 339 0x7C29 //TX_LAMBDA_PFILT_S_0 -340 0x7C29 //TX_LAMBDA_PFILT_S_1 -341 0x7200 //TX_LAMBDA_PFILT_S_2 -342 0x7900 //TX_LAMBDA_PFILT_S_3 -343 0x7400 //TX_LAMBDA_PFILT_S_4 -344 0x7200 //TX_LAMBDA_PFILT_S_5 +340 0x7200 //TX_LAMBDA_PFILT_S_1 +341 0x7900 //TX_LAMBDA_PFILT_S_2 +342 0x7400 //TX_LAMBDA_PFILT_S_3 +343 0x7200 //TX_LAMBDA_PFILT_S_4 +344 0x7C29 //TX_LAMBDA_PFILT_S_5 345 0x7C29 //TX_LAMBDA_PFILT_S_6 346 0x7C29 //TX_LAMBDA_PFILT_S_7 347 0x0200 //TX_K_PEPPER @@ -12658,10 +19078,10 @@ 377 0x0000 //TX_NOISE_TH_5_4 378 0x07D0 //TX_NOISE_TH_6 379 0x0004 //TX_MINENOISE_TH -380 0x4000 //TX_MINENOISE_MIC0_TH_MTS -381 0xFFEE //TX_MINENOISE_MIC0_TH_EXP -382 0x6000 //TX_MINENOISE_MIC0_S_TH_MTS -383 0xFFF3 //TX_MINENOISE_MIC0_S_TH_EXP +380 0xD508 //TX_MORENS_TFMASK_TH +381 0x0001 //TX_DRC_QUIET_FLOOR +382 0x6D60 //TX_RATIODTL_CUT_TH +383 0x0DAC //TX_DT_CUT_K1 384 0x00A5 //TX_OUT_ENER_S_TH_CLEAN 385 0x00A5 //TX_OUT_ENER_S_TH_LESSCLEAN 386 0x00A5 //TX_OUT_ENER_S_TH_NOISY @@ -12669,15 +19089,15 @@ 388 0x00CE //TX_OUT_ENER_TH_SPEECH 389 0x2000 //TX_SN_NPB_GAIN 390 0x0000 //TX_NN_NPB_GAIN -391 0x0000 //TX_CSX_ALPHA_0 -392 0x0000 //TX_CSX_ALPHA_1 -393 0x0000 //TX_CSX_ALPHA_2 -394 0x0000 //TX_CSX_ALPHA_3 -395 0x0800 //TX_MU_ARSP_EST -396 0x00C8 //TX_P_OUTBEAM_MIN_TH +391 0x3000 //TX_POST_MASK_SUP_HSNE +392 0x07D0 //TX_TAIL_DET_TH +393 0x4000 //TX_B_LESSCUT_RTO_WTA +394 0x0000 //TX_MEL_G_R +395 0x0080 //TX_SUPHIGH_TH +396 0x0000 //TX_MASK_G_R 397 0x0002 //TX_EXTRA_NS_L -398 0x0800 //TX_EXTRA_NS_A -399 0x0005 //TX_VR_NOISE_FLOOR_TH +398 0x1800 //TX_C_POST_FLT_MASK +399 0x7FFF //TX_A_POST_FLT_WNS 400 0x0148 //TX_MIN_G_LOW300HZ 401 0x0001 //TX_MAXLEVEL_CNG 402 0x00B4 //TX_STN_NOISE_TH @@ -12792,16 +19212,16 @@ 511 0x6666 //TX_MIC_TO_BFGAIN 512 0x0000 //TX_MICTOBFGAIN0 513 0x0000 //TX_FASTMUE_TH -514 0x0000 //TX_DERVB_LEN_0 -515 0x0000 //TX_DERVB_LEN_1 -516 0x0000 //TX_RHO_DERVB -517 0x0000 //TX_MIC_INDX_DERVB -518 0x0000 //TX_MU_DERVB -519 0x0000 //TX_DR_RESRV_0 -520 0x0000 //TX_DR_RESRV_1 -521 0x0000 //TX_DR_RESRV_2 -522 0x0000 //TX_DR_RESRV_3 -523 0x0000 //TX_DR_RESRV_4 +514 0x3000 //TX_DEREVERB_LF_MU +515 0x34CD //TX_DEREVERB_HF_MU +516 0x0007 //TX_DEREVERB_DELAY +517 0x0004 //TX_DEREVERB_COEF_LEN +518 0x0003 //TX_DEREVERB_DNR +519 0x0000 //TX_DEREVERB_ALPHA +520 0x0000 //TX_DEREVERB_BETA +521 0x3A98 //TX_GSC_RTOL_TH +522 0x3A98 //TX_GSC_RTOH_TH +523 0x7E2C //TX_WIDE2_MEANHTH 524 0x0000 //TX_DR_RESRV_5 525 0x0000 //TX_DR_RESRV_6 526 0x0000 //TX_DR_RESRV_7 @@ -12849,11 +19269,11 @@ 568 0x584F //TX_FDEQ_GAIN_1 569 0x4F4E //TX_FDEQ_GAIN_2 570 0x474A //TX_FDEQ_GAIN_3 -571 0x473F //TX_FDEQ_GAIN_4 -572 0x4240 //TX_FDEQ_GAIN_5 +571 0x4737 //TX_FDEQ_GAIN_4 +572 0x3A40 //TX_FDEQ_GAIN_5 573 0x4040 //TX_FDEQ_GAIN_6 -574 0x3630 //TX_FDEQ_GAIN_7 -575 0x2620 //TX_FDEQ_GAIN_8 +574 0x3631 //TX_FDEQ_GAIN_7 +575 0x2020 //TX_FDEQ_GAIN_8 576 0x383C //TX_FDEQ_GAIN_9 577 0x4848 //TX_FDEQ_GAIN_10 578 0x4848 //TX_FDEQ_GAIN_11 @@ -12878,7 +19298,7 @@ 597 0x0808 //TX_FDEQ_BIN_6 598 0x050E //TX_FDEQ_BIN_7 599 0x0B0C //TX_FDEQ_BIN_8 -600 0x0F0F //TX_FDEQ_BIN_9 +600 0x0F09 //TX_FDEQ_BIN_9 601 0x0000 //TX_FDEQ_BIN_10 602 0x0000 //TX_FDEQ_BIN_11 603 0x0000 //TX_FDEQ_BIN_12 @@ -12902,9 +19322,9 @@ 621 0x4848 //TX_PREEQ_GAIN_MIC0_4 622 0x4848 //TX_PREEQ_GAIN_MIC0_5 623 0x4848 //TX_PREEQ_GAIN_MIC0_6 -624 0x4846 //TX_PREEQ_GAIN_MIC0_7 -625 0x4544 //TX_PREEQ_GAIN_MIC0_8 -626 0x4241 //TX_PREEQ_GAIN_MIC0_9 +624 0x4848 //TX_PREEQ_GAIN_MIC0_7 +625 0x4848 //TX_PREEQ_GAIN_MIC0_8 +626 0x4848 //TX_PREEQ_GAIN_MIC0_9 627 0x4848 //TX_PREEQ_GAIN_MIC0_10 628 0x4848 //TX_PREEQ_GAIN_MIC0_11 629 0x4848 //TX_PREEQ_GAIN_MIC0_12 @@ -12952,8 +19372,8 @@ 671 0x4848 //TX_PREEQ_GAIN_MIC1_5 672 0x4848 //TX_PREEQ_GAIN_MIC1_6 673 0x4848 //TX_PREEQ_GAIN_MIC1_7 -674 0x4A4C //TX_PREEQ_GAIN_MIC1_8 -675 0x4E50 //TX_PREEQ_GAIN_MIC1_9 +674 0x4849 //TX_PREEQ_GAIN_MIC1_8 +675 0x4A4B //TX_PREEQ_GAIN_MIC1_9 676 0x4848 //TX_PREEQ_GAIN_MIC1_10 677 0x4848 //TX_PREEQ_GAIN_MIC1_11 678 0x4848 //TX_PREEQ_GAIN_MIC1_12 @@ -12968,7 +19388,7 @@ 687 0x4848 //TX_PREEQ_GAIN_MIC1_21 688 0x4848 //TX_PREEQ_GAIN_MIC1_22 689 0x4848 //TX_PREEQ_GAIN_MIC1_23 -690 0x0203 //TX_PREEQ_BIN_MIC1_0 +690 0x0202 //TX_PREEQ_BIN_MIC1_0 691 0x0203 //TX_PREEQ_BIN_MIC1_1 692 0x0303 //TX_PREEQ_BIN_MIC1_2 693 0x0304 //TX_PREEQ_BIN_MIC1_3 @@ -13054,7 +19474,7 @@ 773 0x0000 //TX_GAIN_LIMIT_0 774 0x0000 //TX_GAIN_LIMIT_1 775 0x0006 //TX_GAIN_LIMIT_2 -776 0x0006 //TX_GAIN_LIMIT_3 +776 0x0007 //TX_GAIN_LIMIT_3 777 0x7F5B //TX_BVE_NOVAD0_ALPHADOWN 778 0x7FDE //TX_BVE_VAD0_ALPHAUP 779 0x7F3A //TX_BVE_VAD0_ALPHADOWN @@ -13144,7 +19564,7 @@ 863 0x199A //TX_TDDRC_HMNC_GAIN 864 0x0000 //TX_TDDRC_SMT_FLAG 865 0x0CCD //TX_TDDRC_SMT_W -866 0x0550 //TX_TDDRC_DRC_GAIN +866 0x0504 //TX_TDDRC_DRC_GAIN 867 0x7FFF //TX_TDDRC_LMT_THRD 868 0x0000 //TX_TDDRC_LMT_ALPHA 869 0x0000 //TX_TFMASKLTH @@ -13175,6 +19595,71 @@ 894 0xC000 //TX_FASTNS_SSA_THHFL 895 0xCCCC //TX_FASTNS_SSA_THLFH 896 0xD999 //TX_FASTNS_SSA_THHFH +897 0x2339 //TX_SENDFUNC_REG_MICMUTE +898 0x0021 //TX_SENDFUNC_REG_MICMUTE1 +899 0x02BC //TX_MICMUTE_RATIO_THR +900 0x0140 //TX_MICMUTE_AMP_THR +901 0x0004 //TX_MICMUTE_HPF_IND +902 0x00C0 //TX_MICMUTE_LOG_EYR_TH +903 0x0008 //TX_MICMUTE_CVG_TIME +904 0x0008 //TX_MICMUTE_RELEASE_TIME +905 0x01FE //TX_MIC_VOLUME_MIC0MUTE +906 0x0020 //TX_MICMUTE_EPD_OFFSET_0 +907 0x001E //TX_MICMUTE_FRQ_AEC_L +908 0x7999 //TX_MICMUTE_EAD_THR +909 0x7FFF //TX_MICMUTE_LAMBDA_CB_NLE +910 0x7FFF //TX_MICMUTE_LAMBDA_RE_EST +911 0x4000 //TX_DTD_THR1_MICMUTE_0 +912 0x7000 //TX_DTD_THR1_MICMUTE_1 +913 0x7FFF //TX_DTD_THR1_MICMUTE_2 +914 0x7FFF //TX_DTD_THR1_MICMUTE_3 +915 0x6CCC //TX_DTD_THR2_MICMUTE_0 +916 0x0400 //TX_MICMUTE_MIN_EQ_RE_EST_0 +917 0x0400 //TX_MICMUTE_MIN_EQ_RE_EST_1 +918 0x1000 //TX_MICMUTE_MIN_EQ_RE_EST_2 +919 0x7FFF //TX_MICMUTE_MIN_EQ_RE_EST_3 +920 0x7FFF //TX_MICMUTE_MIN_EQ_RE_EST_4 +921 0x4000 //TX_MICMUTE_C_POST_FLT +922 0x03E8 //TX_MICMUTE_DT_CUT_K +923 0x0001 //TX_MICMUTE_DT_CUT_THR +924 0x03E8 //TX_MICMUTE_DT_CUT_K2 +925 0x0001 //TX_MICMUTE_DT_CUT_THR2 +926 0x0064 //TX_MICMUTE_DT2_HOLD_N +927 0x1000 //TX_MICMUTE_RATIODTH_THCUT +928 0x1000 //TX_MICMUTE_B_POST_FLT_ECHOL +929 0x7FFF //TX_MICMUTE_B_POST_FLT_ECHOH +930 0x0400 //TX_MICMUTE_C_POST_FLT_MASK +931 0x7999 //TX_MICMUTE_RATIODTL_CUT_TH +932 0x0258 //TX_MICMUTE_DT_CUT_K1 +933 0x0800 //TX_MICMUTE_N2_SN_EST +934 0xFC00 //TX_MICMUTE_THR_SN_EST_0 +935 0x001C //TX_MICMUTE_MIN_G_CTRL_0 +936 0x6000 //TX_MICMUTE_A_POST_FILT_S_0 +937 0x7000 //TX_MICMUTE_B_POST_FILT_0 +938 0x2710 //TX_MIC1RUB_AMP_THR +939 0x0010 //TX_MIC1MUTE_RATIO_THR +940 0x0450 //TX_MIC1MUTE_AMP_THR +941 0x0008 //TX_MIC1MUTE_CVG_TIME +942 0x0008 //TX_MIC1MUTE_RELEASE_TIME +943 0x0000 //TX_AMS_RESRV_01 +944 0x0000 //TX_AMS_RESRV_02 +945 0x0000 //TX_AMS_RESRV_03 +946 0x0000 //TX_AMS_RESRV_04 +947 0x0000 //TX_AMS_RESRV_05 +948 0x0000 //TX_AMS_RESRV_06 +949 0x0000 //TX_AMS_RESRV_07 +950 0x0000 //TX_AMS_RESRV_08 +951 0x0000 //TX_AMS_RESRV_09 +952 0x0000 //TX_AMS_RESRV_10 +953 0x0000 //TX_AMS_RESRV_11 +954 0x0000 //TX_AMS_RESRV_12 +955 0x0000 //TX_AMS_RESRV_13 +956 0x0000 //TX_AMS_RESRV_14 +957 0x0000 //TX_AMS_RESRV_15 +958 0x0000 //TX_AMS_RESRV_16 +959 0x0000 //TX_AMS_RESRV_17 +960 0x0000 //TX_AMS_RESRV_18 +961 0x0000 //TX_AMS_RESRV_19 #RX 0 0x000C //RX_RECVFUNC_MODE_0 1 0x0000 //RX_RECVFUNC_MODE_1 @@ -14026,10 +20511,862 @@ 110 0x0000 //RX_FDDRC_RESRV_0 129 0x0100 //RX_SPK_VOL 130 0x0000 //RX_VOL_RESRV_0 +#RX 2 +157 0x000C //RX_RECVFUNC_MODE_0 +158 0x0000 //RX_RECVFUNC_MODE_1 +159 0x0000 //RX_SAMPLINGFREQ_SIG +160 0x0000 //RX_SAMPLINGFREQ_PROC +161 0x000A //RX_FRAME_SZ +162 0x0000 //RX_DELAY_OPT +163 0x1000 //RX_TDDRC_ALPHA_UP_1 +164 0x1000 //RX_TDDRC_ALPHA_UP_2 +165 0x1000 //RX_TDDRC_ALPHA_UP_3 +166 0x1000 //RX_TDDRC_ALPHA_UP_4 +167 0x0800 //RX_PGA +168 0x7FFF //RX_A_HP +169 0x4000 //RX_B_PE +170 0x7800 //RX_THR_PITCH_DET_0 +171 0x7000 //RX_THR_PITCH_DET_1 +172 0x6000 //RX_THR_PITCH_DET_2 +173 0x0008 //RX_PITCH_BFR_LEN +174 0x0003 //RX_SBD_PITCH_DET +175 0x0100 //RX_PP_RESRV_0 +176 0x0020 //RX_PP_RESRV_1 +177 0x0400 //RX_N_SN_EST +178 0x000C //RX_N2_SN_EST +179 0x0014 //RX_NS_LVL_CTRL +180 0xF800 //RX_THR_SN_EST +181 0x7E00 //RX_LAMBDA_PFILT +182 0x000A //RX_FENS_RESRV_0 +183 0x0190 //RX_FENS_RESRV_1 +184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +187 0x0002 //RX_EXTRA_NS_L +188 0x0800 //RX_EXTRA_NS_A +189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +190 0x7000 //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +192 0x199A //RX_A_POST_FLT +193 0x0000 //RX_LMT_THRD +194 0x4000 //RX_LMT_ALPHA +195 0x0030 //RX_FDEQ_SUBNUM +196 0x4848 //RX_FDEQ_GAIN_0 +197 0x4848 //RX_FDEQ_GAIN_1 +198 0x4844 //RX_FDEQ_GAIN_2 +199 0x4A4C //RX_FDEQ_GAIN_3 +200 0x4E50 //RX_FDEQ_GAIN_4 +201 0x5254 //RX_FDEQ_GAIN_5 +202 0x5658 //RX_FDEQ_GAIN_6 +203 0x5A5C //RX_FDEQ_GAIN_7 +204 0x5C5C //RX_FDEQ_GAIN_8 +205 0x5C5C //RX_FDEQ_GAIN_9 +206 0x5C5C //RX_FDEQ_GAIN_10 +207 0x5C48 //RX_FDEQ_GAIN_11 +208 0x4848 //RX_FDEQ_GAIN_12 +209 0x4848 //RX_FDEQ_GAIN_13 +210 0x4848 //RX_FDEQ_GAIN_14 +211 0x4848 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0202 //RX_FDEQ_BIN_0 +221 0x0203 //RX_FDEQ_BIN_1 +222 0x0402 //RX_FDEQ_BIN_2 +223 0x0303 //RX_FDEQ_BIN_3 +224 0x0303 //RX_FDEQ_BIN_4 +225 0x0303 //RX_FDEQ_BIN_5 +226 0x0303 //RX_FDEQ_BIN_6 +227 0x0303 //RX_FDEQ_BIN_7 +228 0x0A0A //RX_FDEQ_BIN_8 +229 0x0A0E //RX_FDEQ_BIN_9 +230 0x0000 //RX_FDEQ_BIN_10 +231 0x0000 //RX_FDEQ_BIN_11 +232 0x0000 //RX_FDEQ_BIN_12 +233 0x0000 //RX_FDEQ_BIN_13 +234 0x0000 //RX_FDEQ_BIN_14 +235 0x0000 //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x4000 //RX_FDEQ_RESRV_0 +245 0x0320 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0030 //RX_FDDRC_BAND_MARGIN_1 +248 0x0050 //RX_FDDRC_BAND_MARGIN_2 +249 0x0080 //RX_FDDRC_BAND_MARGIN_3 +250 0x0007 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x5000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x6400 //RX_FDDRC_THRD_3_2 +258 0x6400 //RX_FDDRC_THRD_3_3 +259 0x2000 //RX_FDDRC_SLANT_0_0 +260 0x2000 //RX_FDDRC_SLANT_0_1 +261 0x2000 //RX_FDDRC_SLANT_0_2 +262 0x2000 //RX_FDDRC_SLANT_0_3 +263 0x5333 //RX_FDDRC_SLANT_1_0 +264 0x5333 //RX_FDDRC_SLANT_1_1 +265 0x5333 //RX_FDDRC_SLANT_1_2 +266 0x5333 //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +268 0x0002 //RX_FILTINDX +269 0x0000 //RX_TDDRC_THRD_0 +270 0x0000 //RX_TDDRC_THRD_1 +271 0x1800 //RX_TDDRC_THRD_2 +272 0x1800 //RX_TDDRC_THRD_3 +273 0x3000 //RX_TDDRC_SLANT_0 +274 0x6E00 //RX_TDDRC_SLANT_1 +275 0x1000 //RX_TDDRC_ALPHA_UP_0 +276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x199A //RX_TDDRC_HMNC_GAIN +279 0x0001 //RX_TDDRC_SMT_FLAG +280 0x0CCD //RX_TDDRC_SMT_W +281 0x0360 //RX_TDDRC_DRC_GAIN +282 0x7C00 //RX_LAMBDA_PKA_FP +283 0x2000 //RX_TPKA_FP +284 0x2000 //RX_MIN_G_FP +285 0x0080 //RX_MAX_G_FP +286 0x0100 //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 +288 0x0000 //RX_MAXLEVEL_CNG +289 0x3000 //RX_BWE_UV_TH +290 0x3000 //RX_BWE_UV_TH2 +291 0x1800 //RX_BWE_UV_TH3 +292 0x1000 //RX_BWE_V_TH +293 0x04CD //RX_BWE_GAIN1_V_TH1 +294 0x0F33 //RX_BWE_GAIN1_V_TH2 +295 0x7333 //RX_BWE_UV_EQ +296 0x199A //RX_BWE_V_EQ +297 0x7333 //RX_BWE_TONE_TH +298 0x0004 //RX_BWE_UV_HOLD_T +299 0x6CCD //RX_BWE_GAIN2_ALPHA +300 0x799A //RX_BWE_GAIN3_ALPHA +301 0x001E //RX_BWE_CUTOFF +302 0x3000 //RX_BWE_GAINFILL +303 0x3200 //RX_BWE_MAXTH_TONE +304 0x2000 //RX_BWE_EQ_0 +305 0x2000 //RX_BWE_EQ_1 +306 0x2000 //RX_BWE_EQ_2 +307 0x2000 //RX_BWE_EQ_3 +308 0x2000 //RX_BWE_EQ_4 +309 0x2000 //RX_BWE_EQ_5 +310 0x2000 //RX_BWE_EQ_6 +311 0x0000 //RX_BWE_RESRV_0 +312 0x0000 //RX_BWE_RESRV_1 +313 0x0000 //RX_BWE_RESRV_2 +#VOL 0 +163 0x1000 //RX_TDDRC_ALPHA_UP_1 +164 0x1000 //RX_TDDRC_ALPHA_UP_2 +165 0x1000 //RX_TDDRC_ALPHA_UP_3 +166 0x1000 //RX_TDDRC_ALPHA_UP_4 +184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +190 0x7000 //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +269 0x0000 //RX_TDDRC_THRD_0 +270 0x0000 //RX_TDDRC_THRD_1 +271 0x1800 //RX_TDDRC_THRD_2 +272 0x1800 //RX_TDDRC_THRD_3 +273 0x3000 //RX_TDDRC_SLANT_0 +274 0x6E00 //RX_TDDRC_SLANT_1 +275 0x1000 //RX_TDDRC_ALPHA_UP_0 +276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x199A //RX_TDDRC_HMNC_GAIN +279 0x0001 //RX_TDDRC_SMT_FLAG +280 0x0CCD //RX_TDDRC_SMT_W +281 0x0360 //RX_TDDRC_DRC_GAIN +195 0x0030 //RX_FDEQ_SUBNUM +196 0x4848 //RX_FDEQ_GAIN_0 +197 0x4848 //RX_FDEQ_GAIN_1 +198 0x4844 //RX_FDEQ_GAIN_2 +199 0x4A4C //RX_FDEQ_GAIN_3 +200 0x4E50 //RX_FDEQ_GAIN_4 +201 0x5254 //RX_FDEQ_GAIN_5 +202 0x5658 //RX_FDEQ_GAIN_6 +203 0x5A5C //RX_FDEQ_GAIN_7 +204 0x5C5C //RX_FDEQ_GAIN_8 +205 0x5C5C //RX_FDEQ_GAIN_9 +206 0x5C5C //RX_FDEQ_GAIN_10 +207 0x5C48 //RX_FDEQ_GAIN_11 +208 0x4848 //RX_FDEQ_GAIN_12 +209 0x4848 //RX_FDEQ_GAIN_13 +210 0x4848 //RX_FDEQ_GAIN_14 +211 0x4848 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0202 //RX_FDEQ_BIN_0 +221 0x0203 //RX_FDEQ_BIN_1 +222 0x0402 //RX_FDEQ_BIN_2 +223 0x0303 //RX_FDEQ_BIN_3 +224 0x0303 //RX_FDEQ_BIN_4 +225 0x0303 //RX_FDEQ_BIN_5 +226 0x0303 //RX_FDEQ_BIN_6 +227 0x0303 //RX_FDEQ_BIN_7 +228 0x0A0A //RX_FDEQ_BIN_8 +229 0x0A0E //RX_FDEQ_BIN_9 +230 0x0000 //RX_FDEQ_BIN_10 +231 0x0000 //RX_FDEQ_BIN_11 +232 0x0000 //RX_FDEQ_BIN_12 +233 0x0000 //RX_FDEQ_BIN_13 +234 0x0000 //RX_FDEQ_BIN_14 +235 0x0000 //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x4000 //RX_FDEQ_RESRV_0 +245 0x0320 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0030 //RX_FDDRC_BAND_MARGIN_1 +248 0x0050 //RX_FDDRC_BAND_MARGIN_2 +249 0x0080 //RX_FDDRC_BAND_MARGIN_3 +250 0x0007 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x5000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x6400 //RX_FDDRC_THRD_3_2 +258 0x6400 //RX_FDDRC_THRD_3_3 +259 0x2000 //RX_FDDRC_SLANT_0_0 +260 0x2000 //RX_FDDRC_SLANT_0_1 +261 0x2000 //RX_FDDRC_SLANT_0_2 +262 0x2000 //RX_FDDRC_SLANT_0_3 +263 0x5333 //RX_FDDRC_SLANT_1_0 +264 0x5333 //RX_FDDRC_SLANT_1_1 +265 0x5333 //RX_FDDRC_SLANT_1_2 +266 0x5333 //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +286 0x0100 //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 +#VOL 1 +163 0x1000 //RX_TDDRC_ALPHA_UP_1 +164 0x1000 //RX_TDDRC_ALPHA_UP_2 +165 0x1000 //RX_TDDRC_ALPHA_UP_3 +166 0x1000 //RX_TDDRC_ALPHA_UP_4 +184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +190 0x7000 //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +269 0x0000 //RX_TDDRC_THRD_0 +270 0x0000 //RX_TDDRC_THRD_1 +271 0x1800 //RX_TDDRC_THRD_2 +272 0x1800 //RX_TDDRC_THRD_3 +273 0x3000 //RX_TDDRC_SLANT_0 +274 0x6E00 //RX_TDDRC_SLANT_1 +275 0x1000 //RX_TDDRC_ALPHA_UP_0 +276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x199A //RX_TDDRC_HMNC_GAIN +279 0x0001 //RX_TDDRC_SMT_FLAG +280 0x0CCD //RX_TDDRC_SMT_W +281 0x0360 //RX_TDDRC_DRC_GAIN +195 0x0030 //RX_FDEQ_SUBNUM +196 0x4848 //RX_FDEQ_GAIN_0 +197 0x4848 //RX_FDEQ_GAIN_1 +198 0x4844 //RX_FDEQ_GAIN_2 +199 0x4A4C //RX_FDEQ_GAIN_3 +200 0x4E50 //RX_FDEQ_GAIN_4 +201 0x5254 //RX_FDEQ_GAIN_5 +202 0x5658 //RX_FDEQ_GAIN_6 +203 0x5A5C //RX_FDEQ_GAIN_7 +204 0x5C5C //RX_FDEQ_GAIN_8 +205 0x5C5C //RX_FDEQ_GAIN_9 +206 0x5C5C //RX_FDEQ_GAIN_10 +207 0x5C48 //RX_FDEQ_GAIN_11 +208 0x4848 //RX_FDEQ_GAIN_12 +209 0x4848 //RX_FDEQ_GAIN_13 +210 0x4848 //RX_FDEQ_GAIN_14 +211 0x4848 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0202 //RX_FDEQ_BIN_0 +221 0x0203 //RX_FDEQ_BIN_1 +222 0x0402 //RX_FDEQ_BIN_2 +223 0x0303 //RX_FDEQ_BIN_3 +224 0x0303 //RX_FDEQ_BIN_4 +225 0x0303 //RX_FDEQ_BIN_5 +226 0x0303 //RX_FDEQ_BIN_6 +227 0x0303 //RX_FDEQ_BIN_7 +228 0x0A0A //RX_FDEQ_BIN_8 +229 0x0A0E //RX_FDEQ_BIN_9 +230 0x0000 //RX_FDEQ_BIN_10 +231 0x0000 //RX_FDEQ_BIN_11 +232 0x0000 //RX_FDEQ_BIN_12 +233 0x0000 //RX_FDEQ_BIN_13 +234 0x0000 //RX_FDEQ_BIN_14 +235 0x0000 //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x4000 //RX_FDEQ_RESRV_0 +245 0x0320 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0030 //RX_FDDRC_BAND_MARGIN_1 +248 0x0050 //RX_FDDRC_BAND_MARGIN_2 +249 0x0080 //RX_FDDRC_BAND_MARGIN_3 +250 0x0007 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x5000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x6400 //RX_FDDRC_THRD_3_2 +258 0x6400 //RX_FDDRC_THRD_3_3 +259 0x2000 //RX_FDDRC_SLANT_0_0 +260 0x2000 //RX_FDDRC_SLANT_0_1 +261 0x2000 //RX_FDDRC_SLANT_0_2 +262 0x2000 //RX_FDDRC_SLANT_0_3 +263 0x5333 //RX_FDDRC_SLANT_1_0 +264 0x5333 //RX_FDDRC_SLANT_1_1 +265 0x5333 //RX_FDDRC_SLANT_1_2 +266 0x5333 //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +286 0x0100 //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 +#VOL 2 +163 0x1000 //RX_TDDRC_ALPHA_UP_1 +164 0x1000 //RX_TDDRC_ALPHA_UP_2 +165 0x1000 //RX_TDDRC_ALPHA_UP_3 +166 0x1000 //RX_TDDRC_ALPHA_UP_4 +184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +190 0x7000 //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +269 0x0000 //RX_TDDRC_THRD_0 +270 0x0000 //RX_TDDRC_THRD_1 +271 0x1800 //RX_TDDRC_THRD_2 +272 0x1800 //RX_TDDRC_THRD_3 +273 0x3000 //RX_TDDRC_SLANT_0 +274 0x6E00 //RX_TDDRC_SLANT_1 +275 0x1000 //RX_TDDRC_ALPHA_UP_0 +276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x199A //RX_TDDRC_HMNC_GAIN +279 0x0001 //RX_TDDRC_SMT_FLAG +280 0x0CCD //RX_TDDRC_SMT_W +281 0x0360 //RX_TDDRC_DRC_GAIN +195 0x0030 //RX_FDEQ_SUBNUM +196 0x4848 //RX_FDEQ_GAIN_0 +197 0x4848 //RX_FDEQ_GAIN_1 +198 0x4844 //RX_FDEQ_GAIN_2 +199 0x4A4C //RX_FDEQ_GAIN_3 +200 0x4E50 //RX_FDEQ_GAIN_4 +201 0x5254 //RX_FDEQ_GAIN_5 +202 0x5658 //RX_FDEQ_GAIN_6 +203 0x5A5C //RX_FDEQ_GAIN_7 +204 0x5C5C //RX_FDEQ_GAIN_8 +205 0x5C5C //RX_FDEQ_GAIN_9 +206 0x5C5C //RX_FDEQ_GAIN_10 +207 0x5C48 //RX_FDEQ_GAIN_11 +208 0x4848 //RX_FDEQ_GAIN_12 +209 0x4848 //RX_FDEQ_GAIN_13 +210 0x4848 //RX_FDEQ_GAIN_14 +211 0x4848 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0202 //RX_FDEQ_BIN_0 +221 0x0203 //RX_FDEQ_BIN_1 +222 0x0402 //RX_FDEQ_BIN_2 +223 0x0303 //RX_FDEQ_BIN_3 +224 0x0303 //RX_FDEQ_BIN_4 +225 0x0303 //RX_FDEQ_BIN_5 +226 0x0303 //RX_FDEQ_BIN_6 +227 0x0303 //RX_FDEQ_BIN_7 +228 0x0A0A //RX_FDEQ_BIN_8 +229 0x0A0E //RX_FDEQ_BIN_9 +230 0x0000 //RX_FDEQ_BIN_10 +231 0x0000 //RX_FDEQ_BIN_11 +232 0x0000 //RX_FDEQ_BIN_12 +233 0x0000 //RX_FDEQ_BIN_13 +234 0x0000 //RX_FDEQ_BIN_14 +235 0x0000 //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x4000 //RX_FDEQ_RESRV_0 +245 0x0320 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0030 //RX_FDDRC_BAND_MARGIN_1 +248 0x0050 //RX_FDDRC_BAND_MARGIN_2 +249 0x0080 //RX_FDDRC_BAND_MARGIN_3 +250 0x0007 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x5000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x6400 //RX_FDDRC_THRD_3_2 +258 0x6400 //RX_FDDRC_THRD_3_3 +259 0x2000 //RX_FDDRC_SLANT_0_0 +260 0x2000 //RX_FDDRC_SLANT_0_1 +261 0x2000 //RX_FDDRC_SLANT_0_2 +262 0x2000 //RX_FDDRC_SLANT_0_3 +263 0x5333 //RX_FDDRC_SLANT_1_0 +264 0x5333 //RX_FDDRC_SLANT_1_1 +265 0x5333 //RX_FDDRC_SLANT_1_2 +266 0x5333 //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +286 0x0100 //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 +#VOL 3 +163 0x1000 //RX_TDDRC_ALPHA_UP_1 +164 0x1000 //RX_TDDRC_ALPHA_UP_2 +165 0x1000 //RX_TDDRC_ALPHA_UP_3 +166 0x1000 //RX_TDDRC_ALPHA_UP_4 +184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +190 0x7000 //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +269 0x0000 //RX_TDDRC_THRD_0 +270 0x0000 //RX_TDDRC_THRD_1 +271 0x1800 //RX_TDDRC_THRD_2 +272 0x1800 //RX_TDDRC_THRD_3 +273 0x3000 //RX_TDDRC_SLANT_0 +274 0x6E00 //RX_TDDRC_SLANT_1 +275 0x1000 //RX_TDDRC_ALPHA_UP_0 +276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x199A //RX_TDDRC_HMNC_GAIN +279 0x0001 //RX_TDDRC_SMT_FLAG +280 0x0CCD //RX_TDDRC_SMT_W +281 0x0360 //RX_TDDRC_DRC_GAIN +195 0x0030 //RX_FDEQ_SUBNUM +196 0x4848 //RX_FDEQ_GAIN_0 +197 0x4848 //RX_FDEQ_GAIN_1 +198 0x4844 //RX_FDEQ_GAIN_2 +199 0x4A4C //RX_FDEQ_GAIN_3 +200 0x4E50 //RX_FDEQ_GAIN_4 +201 0x5254 //RX_FDEQ_GAIN_5 +202 0x5658 //RX_FDEQ_GAIN_6 +203 0x5A5C //RX_FDEQ_GAIN_7 +204 0x5C5C //RX_FDEQ_GAIN_8 +205 0x5C5C //RX_FDEQ_GAIN_9 +206 0x5C5C //RX_FDEQ_GAIN_10 +207 0x5C48 //RX_FDEQ_GAIN_11 +208 0x4848 //RX_FDEQ_GAIN_12 +209 0x4848 //RX_FDEQ_GAIN_13 +210 0x4848 //RX_FDEQ_GAIN_14 +211 0x4848 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0202 //RX_FDEQ_BIN_0 +221 0x0203 //RX_FDEQ_BIN_1 +222 0x0402 //RX_FDEQ_BIN_2 +223 0x0303 //RX_FDEQ_BIN_3 +224 0x0303 //RX_FDEQ_BIN_4 +225 0x0303 //RX_FDEQ_BIN_5 +226 0x0303 //RX_FDEQ_BIN_6 +227 0x0303 //RX_FDEQ_BIN_7 +228 0x0A0A //RX_FDEQ_BIN_8 +229 0x0A0E //RX_FDEQ_BIN_9 +230 0x0000 //RX_FDEQ_BIN_10 +231 0x0000 //RX_FDEQ_BIN_11 +232 0x0000 //RX_FDEQ_BIN_12 +233 0x0000 //RX_FDEQ_BIN_13 +234 0x0000 //RX_FDEQ_BIN_14 +235 0x0000 //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x4000 //RX_FDEQ_RESRV_0 +245 0x0320 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0030 //RX_FDDRC_BAND_MARGIN_1 +248 0x0050 //RX_FDDRC_BAND_MARGIN_2 +249 0x0080 //RX_FDDRC_BAND_MARGIN_3 +250 0x0007 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x5000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x6400 //RX_FDDRC_THRD_3_2 +258 0x6400 //RX_FDDRC_THRD_3_3 +259 0x2000 //RX_FDDRC_SLANT_0_0 +260 0x2000 //RX_FDDRC_SLANT_0_1 +261 0x2000 //RX_FDDRC_SLANT_0_2 +262 0x2000 //RX_FDDRC_SLANT_0_3 +263 0x5333 //RX_FDDRC_SLANT_1_0 +264 0x5333 //RX_FDDRC_SLANT_1_1 +265 0x5333 //RX_FDDRC_SLANT_1_2 +266 0x5333 //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +286 0x0100 //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 +#VOL 4 +163 0x1000 //RX_TDDRC_ALPHA_UP_1 +164 0x1000 //RX_TDDRC_ALPHA_UP_2 +165 0x1000 //RX_TDDRC_ALPHA_UP_3 +166 0x1000 //RX_TDDRC_ALPHA_UP_4 +184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +190 0x7000 //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +269 0x0000 //RX_TDDRC_THRD_0 +270 0x0000 //RX_TDDRC_THRD_1 +271 0x1800 //RX_TDDRC_THRD_2 +272 0x1800 //RX_TDDRC_THRD_3 +273 0x3000 //RX_TDDRC_SLANT_0 +274 0x6E00 //RX_TDDRC_SLANT_1 +275 0x1000 //RX_TDDRC_ALPHA_UP_0 +276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x199A //RX_TDDRC_HMNC_GAIN +279 0x0001 //RX_TDDRC_SMT_FLAG +280 0x0CCD //RX_TDDRC_SMT_W +281 0x0360 //RX_TDDRC_DRC_GAIN +195 0x0030 //RX_FDEQ_SUBNUM +196 0x4848 //RX_FDEQ_GAIN_0 +197 0x4848 //RX_FDEQ_GAIN_1 +198 0x4844 //RX_FDEQ_GAIN_2 +199 0x4A4C //RX_FDEQ_GAIN_3 +200 0x4E50 //RX_FDEQ_GAIN_4 +201 0x5254 //RX_FDEQ_GAIN_5 +202 0x5658 //RX_FDEQ_GAIN_6 +203 0x5A5C //RX_FDEQ_GAIN_7 +204 0x5C5C //RX_FDEQ_GAIN_8 +205 0x5C5C //RX_FDEQ_GAIN_9 +206 0x5C5C //RX_FDEQ_GAIN_10 +207 0x5C48 //RX_FDEQ_GAIN_11 +208 0x4848 //RX_FDEQ_GAIN_12 +209 0x4848 //RX_FDEQ_GAIN_13 +210 0x4848 //RX_FDEQ_GAIN_14 +211 0x4848 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0202 //RX_FDEQ_BIN_0 +221 0x0203 //RX_FDEQ_BIN_1 +222 0x0402 //RX_FDEQ_BIN_2 +223 0x0303 //RX_FDEQ_BIN_3 +224 0x0303 //RX_FDEQ_BIN_4 +225 0x0303 //RX_FDEQ_BIN_5 +226 0x0303 //RX_FDEQ_BIN_6 +227 0x0303 //RX_FDEQ_BIN_7 +228 0x0A0A //RX_FDEQ_BIN_8 +229 0x0A0E //RX_FDEQ_BIN_9 +230 0x0000 //RX_FDEQ_BIN_10 +231 0x0000 //RX_FDEQ_BIN_11 +232 0x0000 //RX_FDEQ_BIN_12 +233 0x0000 //RX_FDEQ_BIN_13 +234 0x0000 //RX_FDEQ_BIN_14 +235 0x0000 //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x4000 //RX_FDEQ_RESRV_0 +245 0x0320 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0030 //RX_FDDRC_BAND_MARGIN_1 +248 0x0050 //RX_FDDRC_BAND_MARGIN_2 +249 0x0080 //RX_FDDRC_BAND_MARGIN_3 +250 0x0007 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x5000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x6400 //RX_FDDRC_THRD_3_2 +258 0x6400 //RX_FDDRC_THRD_3_3 +259 0x2000 //RX_FDDRC_SLANT_0_0 +260 0x2000 //RX_FDDRC_SLANT_0_1 +261 0x2000 //RX_FDDRC_SLANT_0_2 +262 0x2000 //RX_FDDRC_SLANT_0_3 +263 0x5333 //RX_FDDRC_SLANT_1_0 +264 0x5333 //RX_FDDRC_SLANT_1_1 +265 0x5333 //RX_FDDRC_SLANT_1_2 +266 0x5333 //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +286 0x0100 //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 +#VOL 5 +163 0x1000 //RX_TDDRC_ALPHA_UP_1 +164 0x1000 //RX_TDDRC_ALPHA_UP_2 +165 0x1000 //RX_TDDRC_ALPHA_UP_3 +166 0x1000 //RX_TDDRC_ALPHA_UP_4 +184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +190 0x7000 //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +269 0x0000 //RX_TDDRC_THRD_0 +270 0x0000 //RX_TDDRC_THRD_1 +271 0x1800 //RX_TDDRC_THRD_2 +272 0x1800 //RX_TDDRC_THRD_3 +273 0x3000 //RX_TDDRC_SLANT_0 +274 0x6E00 //RX_TDDRC_SLANT_1 +275 0x1000 //RX_TDDRC_ALPHA_UP_0 +276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x199A //RX_TDDRC_HMNC_GAIN +279 0x0001 //RX_TDDRC_SMT_FLAG +280 0x0CCD //RX_TDDRC_SMT_W +281 0x0360 //RX_TDDRC_DRC_GAIN +195 0x0030 //RX_FDEQ_SUBNUM +196 0x4848 //RX_FDEQ_GAIN_0 +197 0x4848 //RX_FDEQ_GAIN_1 +198 0x4844 //RX_FDEQ_GAIN_2 +199 0x4A4C //RX_FDEQ_GAIN_3 +200 0x4E50 //RX_FDEQ_GAIN_4 +201 0x5254 //RX_FDEQ_GAIN_5 +202 0x5658 //RX_FDEQ_GAIN_6 +203 0x5A5C //RX_FDEQ_GAIN_7 +204 0x5C5C //RX_FDEQ_GAIN_8 +205 0x5C5C //RX_FDEQ_GAIN_9 +206 0x5C5C //RX_FDEQ_GAIN_10 +207 0x5C48 //RX_FDEQ_GAIN_11 +208 0x4848 //RX_FDEQ_GAIN_12 +209 0x4848 //RX_FDEQ_GAIN_13 +210 0x4848 //RX_FDEQ_GAIN_14 +211 0x4848 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0202 //RX_FDEQ_BIN_0 +221 0x0203 //RX_FDEQ_BIN_1 +222 0x0402 //RX_FDEQ_BIN_2 +223 0x0303 //RX_FDEQ_BIN_3 +224 0x0303 //RX_FDEQ_BIN_4 +225 0x0303 //RX_FDEQ_BIN_5 +226 0x0303 //RX_FDEQ_BIN_6 +227 0x0303 //RX_FDEQ_BIN_7 +228 0x0A0A //RX_FDEQ_BIN_8 +229 0x0A0E //RX_FDEQ_BIN_9 +230 0x0000 //RX_FDEQ_BIN_10 +231 0x0000 //RX_FDEQ_BIN_11 +232 0x0000 //RX_FDEQ_BIN_12 +233 0x0000 //RX_FDEQ_BIN_13 +234 0x0000 //RX_FDEQ_BIN_14 +235 0x0000 //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x4000 //RX_FDEQ_RESRV_0 +245 0x0320 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0030 //RX_FDDRC_BAND_MARGIN_1 +248 0x0050 //RX_FDDRC_BAND_MARGIN_2 +249 0x0080 //RX_FDDRC_BAND_MARGIN_3 +250 0x0007 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x5000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x6400 //RX_FDDRC_THRD_3_2 +258 0x6400 //RX_FDDRC_THRD_3_3 +259 0x2000 //RX_FDDRC_SLANT_0_0 +260 0x2000 //RX_FDDRC_SLANT_0_1 +261 0x2000 //RX_FDDRC_SLANT_0_2 +262 0x2000 //RX_FDDRC_SLANT_0_3 +263 0x5333 //RX_FDDRC_SLANT_1_0 +264 0x5333 //RX_FDDRC_SLANT_1_1 +265 0x5333 //RX_FDDRC_SLANT_1_2 +266 0x5333 //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +286 0x0100 //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 +#VOL 6 +163 0x1000 //RX_TDDRC_ALPHA_UP_1 +164 0x1000 //RX_TDDRC_ALPHA_UP_2 +165 0x1000 //RX_TDDRC_ALPHA_UP_3 +166 0x1000 //RX_TDDRC_ALPHA_UP_4 +184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +190 0x7000 //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +269 0x0000 //RX_TDDRC_THRD_0 +270 0x0000 //RX_TDDRC_THRD_1 +271 0x1800 //RX_TDDRC_THRD_2 +272 0x1800 //RX_TDDRC_THRD_3 +273 0x3000 //RX_TDDRC_SLANT_0 +274 0x6E00 //RX_TDDRC_SLANT_1 +275 0x1000 //RX_TDDRC_ALPHA_UP_0 +276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x199A //RX_TDDRC_HMNC_GAIN +279 0x0001 //RX_TDDRC_SMT_FLAG +280 0x0CCD //RX_TDDRC_SMT_W +281 0x0360 //RX_TDDRC_DRC_GAIN +195 0x0030 //RX_FDEQ_SUBNUM +196 0x4848 //RX_FDEQ_GAIN_0 +197 0x4848 //RX_FDEQ_GAIN_1 +198 0x4844 //RX_FDEQ_GAIN_2 +199 0x4A4C //RX_FDEQ_GAIN_3 +200 0x4E50 //RX_FDEQ_GAIN_4 +201 0x5254 //RX_FDEQ_GAIN_5 +202 0x5658 //RX_FDEQ_GAIN_6 +203 0x5A5C //RX_FDEQ_GAIN_7 +204 0x5C5C //RX_FDEQ_GAIN_8 +205 0x5C5C //RX_FDEQ_GAIN_9 +206 0x5C5C //RX_FDEQ_GAIN_10 +207 0x5C48 //RX_FDEQ_GAIN_11 +208 0x4848 //RX_FDEQ_GAIN_12 +209 0x4848 //RX_FDEQ_GAIN_13 +210 0x4848 //RX_FDEQ_GAIN_14 +211 0x4848 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0202 //RX_FDEQ_BIN_0 +221 0x0203 //RX_FDEQ_BIN_1 +222 0x0402 //RX_FDEQ_BIN_2 +223 0x0303 //RX_FDEQ_BIN_3 +224 0x0303 //RX_FDEQ_BIN_4 +225 0x0303 //RX_FDEQ_BIN_5 +226 0x0303 //RX_FDEQ_BIN_6 +227 0x0303 //RX_FDEQ_BIN_7 +228 0x0A0A //RX_FDEQ_BIN_8 +229 0x0A0E //RX_FDEQ_BIN_9 +230 0x0000 //RX_FDEQ_BIN_10 +231 0x0000 //RX_FDEQ_BIN_11 +232 0x0000 //RX_FDEQ_BIN_12 +233 0x0000 //RX_FDEQ_BIN_13 +234 0x0000 //RX_FDEQ_BIN_14 +235 0x0000 //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x4000 //RX_FDEQ_RESRV_0 +245 0x0320 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0030 //RX_FDDRC_BAND_MARGIN_1 +248 0x0050 //RX_FDDRC_BAND_MARGIN_2 +249 0x0080 //RX_FDDRC_BAND_MARGIN_3 +250 0x0007 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x5000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x6400 //RX_FDDRC_THRD_3_2 +258 0x6400 //RX_FDDRC_THRD_3_3 +259 0x2000 //RX_FDDRC_SLANT_0_0 +260 0x2000 //RX_FDDRC_SLANT_0_1 +261 0x2000 //RX_FDDRC_SLANT_0_2 +262 0x2000 //RX_FDDRC_SLANT_0_3 +263 0x5333 //RX_FDDRC_SLANT_1_0 +264 0x5333 //RX_FDDRC_SLANT_1_1 +265 0x5333 //RX_FDDRC_SLANT_1_2 +266 0x5333 //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +286 0x0100 //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 #CASE_NAME HANDSET-HANDSET_HAC-VOICE_GENERIC-WB -#PARAM_TYPE TX+RX -#TOTAL_CUSTOM_STEP 7 +#PARAM_MODE Full +#PARAM_TYPE TX+2RX +#TOTAL_CUSTOM_STEP 7+7 #TX 0 0x0000 //TX_OPERATION_MODE_0 1 0x0000 //TX_OPERATION_MODE_1 @@ -14052,7 +21389,7 @@ 18 0x0000 //TX_SYS_RESRV_2 19 0x0000 //TX_SYS_RESRV_3 20 0x0000 //TX_DIST2REF0 -21 0x009D //TX_DIST2REF1 +21 0x009C //TX_DIST2REF1 22 0x0000 //TX_DIST2REF_02 23 0x0000 //TX_DIST2REF_03 24 0x0000 //TX_DIST2REF_04 @@ -14282,16 +21619,16 @@ 248 0xF800 //TX_THR_SN_EST_6 249 0xF700 //TX_THR_SN_EST_7 250 0x0000 //TX_DELTA_THR_SN_EST_0 -251 0x0100 //TX_DELTA_THR_SN_EST_1 -252 0x01A0 //TX_DELTA_THR_SN_EST_2 +251 0x01A0 //TX_DELTA_THR_SN_EST_1 +252 0x0200 //TX_DELTA_THR_SN_EST_2 253 0x0200 //TX_DELTA_THR_SN_EST_3 -254 0x0200 //TX_DELTA_THR_SN_EST_4 -255 0x0100 //TX_DELTA_THR_SN_EST_5 -256 0x0200 //TX_DELTA_THR_SN_EST_6 +254 0x0100 //TX_DELTA_THR_SN_EST_4 +255 0x0200 //TX_DELTA_THR_SN_EST_5 +256 0x0100 //TX_DELTA_THR_SN_EST_6 257 0x0200 //TX_DELTA_THR_SN_EST_7 258 0x4000 //TX_LAMBDA_NN_EST_0 -259 0x4000 //TX_LAMBDA_NN_EST_1 -260 0x5000 //TX_LAMBDA_NN_EST_2 +259 0x5000 //TX_LAMBDA_NN_EST_1 +260 0x4000 //TX_LAMBDA_NN_EST_2 261 0x4000 //TX_LAMBDA_NN_EST_3 262 0x4000 //TX_LAMBDA_NN_EST_4 263 0x4000 //TX_LAMBDA_NN_EST_5 @@ -14313,18 +21650,18 @@ 279 0x1000 //TX_B_POST_FLT_0 280 0x4000 //TX_B_POST_FLT_1 281 0x0018 //TX_NS_LVL_CTRL_0 -282 0x001C //TX_NS_LVL_CTRL_1 -283 0x0019 //TX_NS_LVL_CTRL_2 -284 0x0018 //TX_NS_LVL_CTRL_3 -285 0x0019 //TX_NS_LVL_CTRL_4 -286 0x001A //TX_NS_LVL_CTRL_5 -287 0x001E //TX_NS_LVL_CTRL_6 +282 0x0019 //TX_NS_LVL_CTRL_1 +283 0x0018 //TX_NS_LVL_CTRL_2 +284 0x0019 //TX_NS_LVL_CTRL_3 +285 0x001A //TX_NS_LVL_CTRL_4 +286 0x001E //TX_NS_LVL_CTRL_5 +287 0x001C //TX_NS_LVL_CTRL_6 288 0x001C //TX_NS_LVL_CTRL_7 289 0x000E //TX_MIN_GAIN_S_0 -290 0x0018 //TX_MIN_GAIN_S_1 +290 0x0012 //TX_MIN_GAIN_S_1 291 0x0012 //TX_MIN_GAIN_S_2 292 0x0012 //TX_MIN_GAIN_S_3 -293 0x0012 //TX_MIN_GAIN_S_4 +293 0x0018 //TX_MIN_GAIN_S_4 294 0x0018 //TX_MIN_GAIN_S_5 295 0x0018 //TX_MIN_GAIN_S_6 296 0x0018 //TX_MIN_GAIN_S_7 @@ -14332,8 +21669,8 @@ 298 0x0000 //TX_NS_MAX_PRI_SNR_TH 299 0x0000 //TX_NMOS_SUP_MENSA 300 0x7FFF //TX_SNRI_SUP_0 -301 0x4000 //TX_SNRI_SUP_1 -302 0x5000 //TX_SNRI_SUP_2 +301 0x5000 //TX_SNRI_SUP_1 +302 0x4000 //TX_SNRI_SUP_2 303 0x4000 //TX_SNRI_SUP_3 304 0x4000 //TX_SNRI_SUP_4 305 0x4000 //TX_SNRI_SUP_5 @@ -14346,28 +21683,28 @@ 312 0x7FFF //TX_A_POST_FILT_0 313 0x2000 //TX_A_POST_FILT_1 314 0x7000 //TX_A_POST_FILT_S_0 -315 0x7000 //TX_A_POST_FILT_S_1 +315 0x3000 //TX_A_POST_FILT_S_1 316 0x3000 //TX_A_POST_FILT_S_2 -317 0x3000 //TX_A_POST_FILT_S_3 -318 0x2000 //TX_A_POST_FILT_S_4 +317 0x2000 //TX_A_POST_FILT_S_3 +318 0x7000 //TX_A_POST_FILT_S_4 319 0x7000 //TX_A_POST_FILT_S_5 320 0x7000 //TX_A_POST_FILT_S_6 321 0x7000 //TX_A_POST_FILT_S_7 322 0x1000 //TX_B_POST_FILT_0 323 0x4000 //TX_B_POST_FILT_1 -324 0x5000 //TX_B_POST_FILT_2 +324 0x4000 //TX_B_POST_FILT_2 325 0x4000 //TX_B_POST_FILT_3 326 0x4000 //TX_B_POST_FILT_4 327 0x4000 //TX_B_POST_FILT_5 -328 0x4000 //TX_B_POST_FILT_6 +328 0x5000 //TX_B_POST_FILT_6 329 0x4000 //TX_B_POST_FILT_7 330 0x4000 //TX_B_LESSCUT_RTO_S_0 331 0x6000 //TX_B_LESSCUT_RTO_S_1 332 0x6000 //TX_B_LESSCUT_RTO_S_2 333 0x6000 //TX_B_LESSCUT_RTO_S_3 -334 0x6000 //TX_B_LESSCUT_RTO_S_4 +334 0x7FFF //TX_B_LESSCUT_RTO_S_4 335 0x6000 //TX_B_LESSCUT_RTO_S_5 -336 0x7FFF //TX_B_LESSCUT_RTO_S_6 +336 0x6000 //TX_B_LESSCUT_RTO_S_6 337 0x7FFF //TX_B_LESSCUT_RTO_S_7 338 0x7C29 //TX_LAMBDA_PFILT 339 0x7C29 //TX_LAMBDA_PFILT_S_0 @@ -14411,10 +21748,10 @@ 377 0x4E20 //TX_NOISE_TH_5_4 378 0x21E8 //TX_NOISE_TH_6 379 0x0014 //TX_MINENOISE_TH -380 0x4000 //TX_MINENOISE_MIC0_TH_MTS -381 0xFFEE //TX_MINENOISE_MIC0_TH_EXP -382 0x6000 //TX_MINENOISE_MIC0_S_TH_MTS -383 0xFFF3 //TX_MINENOISE_MIC0_S_TH_EXP +380 0xD508 //TX_MORENS_TFMASK_TH +381 0x0001 //TX_DRC_QUIET_FLOOR +382 0x6D60 //TX_RATIODTL_CUT_TH +383 0x0DAC //TX_DT_CUT_K1 384 0x00A5 //TX_OUT_ENER_S_TH_CLEAN 385 0x00A5 //TX_OUT_ENER_S_TH_LESSCLEAN 386 0x00A5 //TX_OUT_ENER_S_TH_NOISY @@ -14422,15 +21759,15 @@ 388 0x00CE //TX_OUT_ENER_TH_SPEECH 389 0x2000 //TX_SN_NPB_GAIN 390 0x0000 //TX_NN_NPB_GAIN -391 0x0000 //TX_CSX_ALPHA_0 -392 0x0000 //TX_CSX_ALPHA_1 -393 0x0000 //TX_CSX_ALPHA_2 -394 0x0000 //TX_CSX_ALPHA_3 -395 0x0800 //TX_MU_ARSP_EST -396 0x00C8 //TX_P_OUTBEAM_MIN_TH +391 0x3000 //TX_POST_MASK_SUP_HSNE +392 0x07D0 //TX_TAIL_DET_TH +393 0x4000 //TX_B_LESSCUT_RTO_WTA +394 0x0000 //TX_MEL_G_R +395 0x0080 //TX_SUPHIGH_TH +396 0x4000 //TX_MASK_G_R 397 0x0002 //TX_EXTRA_NS_L -398 0x0800 //TX_EXTRA_NS_A -399 0x0005 //TX_VR_NOISE_FLOOR_TH +398 0x1800 //TX_C_POST_FLT_MASK +399 0x7FFF //TX_A_POST_FLT_WNS 400 0x0148 //TX_MIN_G_LOW300HZ 401 0x0004 //TX_MAXLEVEL_CNG 402 0x00B4 //TX_STN_NOISE_TH @@ -14545,16 +21882,16 @@ 511 0x6666 //TX_MIC_TO_BFGAIN 512 0x0000 //TX_MICTOBFGAIN0 513 0x0000 //TX_FASTMUE_TH -514 0x0000 //TX_DERVB_LEN_0 -515 0x0000 //TX_DERVB_LEN_1 -516 0x0000 //TX_RHO_DERVB -517 0x0000 //TX_MIC_INDX_DERVB -518 0x0000 //TX_MU_DERVB -519 0x0000 //TX_DR_RESRV_0 -520 0x0000 //TX_DR_RESRV_1 -521 0x0000 //TX_DR_RESRV_2 -522 0x0000 //TX_DR_RESRV_3 -523 0x0000 //TX_DR_RESRV_4 +514 0x3000 //TX_DEREVERB_LF_MU +515 0x34CD //TX_DEREVERB_HF_MU +516 0x0007 //TX_DEREVERB_DELAY +517 0x0004 //TX_DEREVERB_COEF_LEN +518 0x0003 //TX_DEREVERB_DNR +519 0x0000 //TX_DEREVERB_ALPHA +520 0x0000 //TX_DEREVERB_BETA +521 0x0000 //TX_GSC_RTOL_TH +522 0x0000 //TX_GSC_RTOH_TH +523 0x7E2C //TX_WIDE2_MEANHTH 524 0x0000 //TX_DR_RESRV_5 525 0x0000 //TX_DR_RESRV_6 526 0x0000 //TX_DR_RESRV_7 @@ -14655,12 +21992,12 @@ 621 0x4848 //TX_PREEQ_GAIN_MIC0_4 622 0x4848 //TX_PREEQ_GAIN_MIC0_5 623 0x4848 //TX_PREEQ_GAIN_MIC0_6 -624 0x4846 //TX_PREEQ_GAIN_MIC0_7 -625 0x4544 //TX_PREEQ_GAIN_MIC0_8 -626 0x4241 //TX_PREEQ_GAIN_MIC0_9 -627 0x403E //TX_PREEQ_GAIN_MIC0_10 -628 0x3D3C //TX_PREEQ_GAIN_MIC0_11 -629 0x3C3C //TX_PREEQ_GAIN_MIC0_12 +624 0x4848 //TX_PREEQ_GAIN_MIC0_7 +625 0x4848 //TX_PREEQ_GAIN_MIC0_8 +626 0x4848 //TX_PREEQ_GAIN_MIC0_9 +627 0x4848 //TX_PREEQ_GAIN_MIC0_10 +628 0x4848 //TX_PREEQ_GAIN_MIC0_11 +629 0x4848 //TX_PREEQ_GAIN_MIC0_12 630 0x4848 //TX_PREEQ_GAIN_MIC0_13 631 0x4848 //TX_PREEQ_GAIN_MIC0_14 632 0x4848 //TX_PREEQ_GAIN_MIC0_15 @@ -14705,11 +22042,11 @@ 671 0x4848 //TX_PREEQ_GAIN_MIC1_5 672 0x4848 //TX_PREEQ_GAIN_MIC1_6 673 0x4848 //TX_PREEQ_GAIN_MIC1_7 -674 0x484A //TX_PREEQ_GAIN_MIC1_8 -675 0x4B4C //TX_PREEQ_GAIN_MIC1_9 +674 0x4848 //TX_PREEQ_GAIN_MIC1_8 +675 0x4A4B //TX_PREEQ_GAIN_MIC1_9 676 0x4B4A //TX_PREEQ_GAIN_MIC1_10 -677 0x4A48 //TX_PREEQ_GAIN_MIC1_11 -678 0x4C4C //TX_PREEQ_GAIN_MIC1_12 +677 0x4848 //TX_PREEQ_GAIN_MIC1_11 +678 0x494C //TX_PREEQ_GAIN_MIC1_12 679 0x4C4C //TX_PREEQ_GAIN_MIC1_13 680 0x4848 //TX_PREEQ_GAIN_MIC1_14 681 0x4848 //TX_PREEQ_GAIN_MIC1_15 @@ -14807,7 +22144,7 @@ 773 0x0000 //TX_GAIN_LIMIT_0 774 0x0000 //TX_GAIN_LIMIT_1 775 0x0006 //TX_GAIN_LIMIT_2 -776 0x0006 //TX_GAIN_LIMIT_3 +776 0x0005 //TX_GAIN_LIMIT_3 777 0x7F5B //TX_BVE_NOVAD0_ALPHADOWN 778 0x7FDE //TX_BVE_VAD0_ALPHAUP 779 0x7F3A //TX_BVE_VAD0_ALPHADOWN @@ -14928,6 +22265,71 @@ 894 0xC000 //TX_FASTNS_SSA_THHFL 895 0xCCCC //TX_FASTNS_SSA_THLFH 896 0xD999 //TX_FASTNS_SSA_THHFH +897 0x2339 //TX_SENDFUNC_REG_MICMUTE +898 0x0021 //TX_SENDFUNC_REG_MICMUTE1 +899 0x02BC //TX_MICMUTE_RATIO_THR +900 0x0140 //TX_MICMUTE_AMP_THR +901 0x0004 //TX_MICMUTE_HPF_IND +902 0x00C0 //TX_MICMUTE_LOG_EYR_TH +903 0x0008 //TX_MICMUTE_CVG_TIME +904 0x0008 //TX_MICMUTE_RELEASE_TIME +905 0x01FE //TX_MIC_VOLUME_MIC0MUTE +906 0x0020 //TX_MICMUTE_EPD_OFFSET_0 +907 0x001E //TX_MICMUTE_FRQ_AEC_L +908 0x7999 //TX_MICMUTE_EAD_THR +909 0x7FFF //TX_MICMUTE_LAMBDA_CB_NLE +910 0x7FFF //TX_MICMUTE_LAMBDA_RE_EST +911 0x4000 //TX_DTD_THR1_MICMUTE_0 +912 0x7000 //TX_DTD_THR1_MICMUTE_1 +913 0x7FFF //TX_DTD_THR1_MICMUTE_2 +914 0x7FFF //TX_DTD_THR1_MICMUTE_3 +915 0x6CCC //TX_DTD_THR2_MICMUTE_0 +916 0x0400 //TX_MICMUTE_MIN_EQ_RE_EST_0 +917 0x0400 //TX_MICMUTE_MIN_EQ_RE_EST_1 +918 0x1000 //TX_MICMUTE_MIN_EQ_RE_EST_2 +919 0x7FFF //TX_MICMUTE_MIN_EQ_RE_EST_3 +920 0x7FFF //TX_MICMUTE_MIN_EQ_RE_EST_4 +921 0x4000 //TX_MICMUTE_C_POST_FLT +922 0x03E8 //TX_MICMUTE_DT_CUT_K +923 0x0001 //TX_MICMUTE_DT_CUT_THR +924 0x03E8 //TX_MICMUTE_DT_CUT_K2 +925 0x0001 //TX_MICMUTE_DT_CUT_THR2 +926 0x0064 //TX_MICMUTE_DT2_HOLD_N +927 0x1000 //TX_MICMUTE_RATIODTH_THCUT +928 0x1000 //TX_MICMUTE_B_POST_FLT_ECHOL +929 0x7FFF //TX_MICMUTE_B_POST_FLT_ECHOH +930 0x0400 //TX_MICMUTE_C_POST_FLT_MASK +931 0x7999 //TX_MICMUTE_RATIODTL_CUT_TH +932 0x0258 //TX_MICMUTE_DT_CUT_K1 +933 0x0800 //TX_MICMUTE_N2_SN_EST +934 0xFC00 //TX_MICMUTE_THR_SN_EST_0 +935 0x001C //TX_MICMUTE_MIN_G_CTRL_0 +936 0x6000 //TX_MICMUTE_A_POST_FILT_S_0 +937 0x7000 //TX_MICMUTE_B_POST_FILT_0 +938 0x2710 //TX_MIC1RUB_AMP_THR +939 0x0010 //TX_MIC1MUTE_RATIO_THR +940 0x0450 //TX_MIC1MUTE_AMP_THR +941 0x0008 //TX_MIC1MUTE_CVG_TIME +942 0x0008 //TX_MIC1MUTE_RELEASE_TIME +943 0x0000 //TX_AMS_RESRV_01 +944 0x0000 //TX_AMS_RESRV_02 +945 0x0000 //TX_AMS_RESRV_03 +946 0x0000 //TX_AMS_RESRV_04 +947 0x0000 //TX_AMS_RESRV_05 +948 0x0000 //TX_AMS_RESRV_06 +949 0x0000 //TX_AMS_RESRV_07 +950 0x0000 //TX_AMS_RESRV_08 +951 0x0000 //TX_AMS_RESRV_09 +952 0x0000 //TX_AMS_RESRV_10 +953 0x0000 //TX_AMS_RESRV_11 +954 0x0000 //TX_AMS_RESRV_12 +955 0x0000 //TX_AMS_RESRV_13 +956 0x0000 //TX_AMS_RESRV_14 +957 0x0000 //TX_AMS_RESRV_15 +958 0x0000 //TX_AMS_RESRV_16 +959 0x0000 //TX_AMS_RESRV_17 +960 0x0000 //TX_AMS_RESRV_18 +961 0x0000 //TX_AMS_RESRV_19 #RX 0 0x000C //RX_RECVFUNC_MODE_0 1 0x0000 //RX_RECVFUNC_MODE_1 @@ -15779,14 +23181,866 @@ 110 0x0000 //RX_FDDRC_RESRV_0 129 0x0100 //RX_SPK_VOL 130 0x0000 //RX_VOL_RESRV_0 +#RX 2 +157 0x000C //RX_RECVFUNC_MODE_0 +158 0x0000 //RX_RECVFUNC_MODE_1 +159 0x0001 //RX_SAMPLINGFREQ_SIG +160 0x0001 //RX_SAMPLINGFREQ_PROC +161 0x000A //RX_FRAME_SZ +162 0x0000 //RX_DELAY_OPT +163 0x1000 //RX_TDDRC_ALPHA_UP_1 +164 0x1000 //RX_TDDRC_ALPHA_UP_2 +165 0x1000 //RX_TDDRC_ALPHA_UP_3 +166 0x1000 //RX_TDDRC_ALPHA_UP_4 +167 0x0800 //RX_PGA +168 0x7FFF //RX_A_HP +169 0x4000 //RX_B_PE +170 0x7800 //RX_THR_PITCH_DET_0 +171 0x7000 //RX_THR_PITCH_DET_1 +172 0x6000 //RX_THR_PITCH_DET_2 +173 0x0008 //RX_PITCH_BFR_LEN +174 0x0003 //RX_SBD_PITCH_DET +175 0x0100 //RX_PP_RESRV_0 +176 0x0020 //RX_PP_RESRV_1 +177 0x0400 //RX_N_SN_EST +178 0x000C //RX_N2_SN_EST +179 0x0014 //RX_NS_LVL_CTRL +180 0xF800 //RX_THR_SN_EST +181 0x7E00 //RX_LAMBDA_PFILT +182 0x000A //RX_FENS_RESRV_0 +183 0x0190 //RX_FENS_RESRV_1 +184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +187 0x0002 //RX_EXTRA_NS_L +188 0x0800 //RX_EXTRA_NS_A +189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +190 0x7000 //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +192 0x199A //RX_A_POST_FLT +193 0x0000 //RX_LMT_THRD +194 0x4000 //RX_LMT_ALPHA +195 0x0030 //RX_FDEQ_SUBNUM +196 0x4848 //RX_FDEQ_GAIN_0 +197 0x4848 //RX_FDEQ_GAIN_1 +198 0x4844 //RX_FDEQ_GAIN_2 +199 0x4A4C //RX_FDEQ_GAIN_3 +200 0x4E50 //RX_FDEQ_GAIN_4 +201 0x5254 //RX_FDEQ_GAIN_5 +202 0x5658 //RX_FDEQ_GAIN_6 +203 0x5A5C //RX_FDEQ_GAIN_7 +204 0x5C5C //RX_FDEQ_GAIN_8 +205 0x5C5C //RX_FDEQ_GAIN_9 +206 0x5C5C //RX_FDEQ_GAIN_10 +207 0x5C5C //RX_FDEQ_GAIN_11 +208 0x5C5C //RX_FDEQ_GAIN_12 +209 0x5C5C //RX_FDEQ_GAIN_13 +210 0x4848 //RX_FDEQ_GAIN_14 +211 0x4848 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0202 //RX_FDEQ_BIN_0 +221 0x0203 //RX_FDEQ_BIN_1 +222 0x0402 //RX_FDEQ_BIN_2 +223 0x0505 //RX_FDEQ_BIN_3 +224 0x0505 //RX_FDEQ_BIN_4 +225 0x0505 //RX_FDEQ_BIN_5 +226 0x0505 //RX_FDEQ_BIN_6 +227 0x0505 //RX_FDEQ_BIN_7 +228 0x160C //RX_FDEQ_BIN_8 +229 0x0D0E //RX_FDEQ_BIN_9 +230 0x0E0F //RX_FDEQ_BIN_10 +231 0x0F10 //RX_FDEQ_BIN_11 +232 0x1011 //RX_FDEQ_BIN_12 +233 0x1104 //RX_FDEQ_BIN_13 +234 0x0000 //RX_FDEQ_BIN_14 +235 0x0000 //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x4000 //RX_FDEQ_RESRV_0 +245 0x0320 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0030 //RX_FDDRC_BAND_MARGIN_1 +248 0x0050 //RX_FDDRC_BAND_MARGIN_2 +249 0x0080 //RX_FDDRC_BAND_MARGIN_3 +250 0x0007 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x5000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x6400 //RX_FDDRC_THRD_3_2 +258 0x6400 //RX_FDDRC_THRD_3_3 +259 0x2000 //RX_FDDRC_SLANT_0_0 +260 0x2000 //RX_FDDRC_SLANT_0_1 +261 0x2000 //RX_FDDRC_SLANT_0_2 +262 0x2000 //RX_FDDRC_SLANT_0_3 +263 0x5333 //RX_FDDRC_SLANT_1_0 +264 0x5333 //RX_FDDRC_SLANT_1_1 +265 0x5333 //RX_FDDRC_SLANT_1_2 +266 0x5333 //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +268 0x0002 //RX_FILTINDX +269 0x0000 //RX_TDDRC_THRD_0 +270 0x0000 //RX_TDDRC_THRD_1 +271 0x1800 //RX_TDDRC_THRD_2 +272 0x1800 //RX_TDDRC_THRD_3 +273 0x3000 //RX_TDDRC_SLANT_0 +274 0x6E00 //RX_TDDRC_SLANT_1 +275 0x1000 //RX_TDDRC_ALPHA_UP_0 +276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x199A //RX_TDDRC_HMNC_GAIN +279 0x0001 //RX_TDDRC_SMT_FLAG +280 0x0CCD //RX_TDDRC_SMT_W +281 0x0400 //RX_TDDRC_DRC_GAIN +282 0x7C00 //RX_LAMBDA_PKA_FP +283 0x2000 //RX_TPKA_FP +284 0x2000 //RX_MIN_G_FP +285 0x0080 //RX_MAX_G_FP +286 0x0100 //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 +288 0x0000 //RX_MAXLEVEL_CNG +289 0x3000 //RX_BWE_UV_TH +290 0x3000 //RX_BWE_UV_TH2 +291 0x1800 //RX_BWE_UV_TH3 +292 0x1000 //RX_BWE_V_TH +293 0x04CD //RX_BWE_GAIN1_V_TH1 +294 0x0F33 //RX_BWE_GAIN1_V_TH2 +295 0x7333 //RX_BWE_UV_EQ +296 0x199A //RX_BWE_V_EQ +297 0x7333 //RX_BWE_TONE_TH +298 0x0004 //RX_BWE_UV_HOLD_T +299 0x6CCD //RX_BWE_GAIN2_ALPHA +300 0x799A //RX_BWE_GAIN3_ALPHA +301 0x001E //RX_BWE_CUTOFF +302 0x3000 //RX_BWE_GAINFILL +303 0x3200 //RX_BWE_MAXTH_TONE +304 0x2000 //RX_BWE_EQ_0 +305 0x2000 //RX_BWE_EQ_1 +306 0x2000 //RX_BWE_EQ_2 +307 0x2000 //RX_BWE_EQ_3 +308 0x2000 //RX_BWE_EQ_4 +309 0x2000 //RX_BWE_EQ_5 +310 0x2000 //RX_BWE_EQ_6 +311 0x0000 //RX_BWE_RESRV_0 +312 0x0000 //RX_BWE_RESRV_1 +313 0x0000 //RX_BWE_RESRV_2 +#VOL 0 +163 0x1000 //RX_TDDRC_ALPHA_UP_1 +164 0x1000 //RX_TDDRC_ALPHA_UP_2 +165 0x1000 //RX_TDDRC_ALPHA_UP_3 +166 0x1000 //RX_TDDRC_ALPHA_UP_4 +184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +190 0x7000 //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +269 0x0000 //RX_TDDRC_THRD_0 +270 0x0000 //RX_TDDRC_THRD_1 +271 0x1800 //RX_TDDRC_THRD_2 +272 0x1800 //RX_TDDRC_THRD_3 +273 0x3000 //RX_TDDRC_SLANT_0 +274 0x6E00 //RX_TDDRC_SLANT_1 +275 0x1000 //RX_TDDRC_ALPHA_UP_0 +276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x199A //RX_TDDRC_HMNC_GAIN +279 0x0001 //RX_TDDRC_SMT_FLAG +280 0x0CCD //RX_TDDRC_SMT_W +281 0x0400 //RX_TDDRC_DRC_GAIN +195 0x0030 //RX_FDEQ_SUBNUM +196 0x4848 //RX_FDEQ_GAIN_0 +197 0x4848 //RX_FDEQ_GAIN_1 +198 0x4844 //RX_FDEQ_GAIN_2 +199 0x4A4C //RX_FDEQ_GAIN_3 +200 0x4E50 //RX_FDEQ_GAIN_4 +201 0x5254 //RX_FDEQ_GAIN_5 +202 0x5658 //RX_FDEQ_GAIN_6 +203 0x5A5C //RX_FDEQ_GAIN_7 +204 0x5C5C //RX_FDEQ_GAIN_8 +205 0x5C5C //RX_FDEQ_GAIN_9 +206 0x5C5C //RX_FDEQ_GAIN_10 +207 0x5C5C //RX_FDEQ_GAIN_11 +208 0x5C5C //RX_FDEQ_GAIN_12 +209 0x5C5C //RX_FDEQ_GAIN_13 +210 0x4848 //RX_FDEQ_GAIN_14 +211 0x4848 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0202 //RX_FDEQ_BIN_0 +221 0x0203 //RX_FDEQ_BIN_1 +222 0x0402 //RX_FDEQ_BIN_2 +223 0x0505 //RX_FDEQ_BIN_3 +224 0x0505 //RX_FDEQ_BIN_4 +225 0x0505 //RX_FDEQ_BIN_5 +226 0x0505 //RX_FDEQ_BIN_6 +227 0x0505 //RX_FDEQ_BIN_7 +228 0x160C //RX_FDEQ_BIN_8 +229 0x0D0E //RX_FDEQ_BIN_9 +230 0x0E0F //RX_FDEQ_BIN_10 +231 0x0F10 //RX_FDEQ_BIN_11 +232 0x1011 //RX_FDEQ_BIN_12 +233 0x1104 //RX_FDEQ_BIN_13 +234 0x0000 //RX_FDEQ_BIN_14 +235 0x0000 //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x4000 //RX_FDEQ_RESRV_0 +245 0x0320 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0030 //RX_FDDRC_BAND_MARGIN_1 +248 0x0050 //RX_FDDRC_BAND_MARGIN_2 +249 0x0080 //RX_FDDRC_BAND_MARGIN_3 +250 0x0007 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x5000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x6400 //RX_FDDRC_THRD_3_2 +258 0x6400 //RX_FDDRC_THRD_3_3 +259 0x2000 //RX_FDDRC_SLANT_0_0 +260 0x2000 //RX_FDDRC_SLANT_0_1 +261 0x2000 //RX_FDDRC_SLANT_0_2 +262 0x2000 //RX_FDDRC_SLANT_0_3 +263 0x5333 //RX_FDDRC_SLANT_1_0 +264 0x5333 //RX_FDDRC_SLANT_1_1 +265 0x5333 //RX_FDDRC_SLANT_1_2 +266 0x5333 //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +286 0x0100 //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 +#VOL 1 +163 0x1000 //RX_TDDRC_ALPHA_UP_1 +164 0x1000 //RX_TDDRC_ALPHA_UP_2 +165 0x1000 //RX_TDDRC_ALPHA_UP_3 +166 0x1000 //RX_TDDRC_ALPHA_UP_4 +184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +190 0x7000 //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +269 0x0000 //RX_TDDRC_THRD_0 +270 0x0000 //RX_TDDRC_THRD_1 +271 0x1800 //RX_TDDRC_THRD_2 +272 0x1800 //RX_TDDRC_THRD_3 +273 0x3000 //RX_TDDRC_SLANT_0 +274 0x6E00 //RX_TDDRC_SLANT_1 +275 0x1000 //RX_TDDRC_ALPHA_UP_0 +276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x199A //RX_TDDRC_HMNC_GAIN +279 0x0001 //RX_TDDRC_SMT_FLAG +280 0x0CCD //RX_TDDRC_SMT_W +281 0x0400 //RX_TDDRC_DRC_GAIN +195 0x0030 //RX_FDEQ_SUBNUM +196 0x4848 //RX_FDEQ_GAIN_0 +197 0x4848 //RX_FDEQ_GAIN_1 +198 0x4844 //RX_FDEQ_GAIN_2 +199 0x4A4C //RX_FDEQ_GAIN_3 +200 0x4E50 //RX_FDEQ_GAIN_4 +201 0x5254 //RX_FDEQ_GAIN_5 +202 0x5658 //RX_FDEQ_GAIN_6 +203 0x5A5C //RX_FDEQ_GAIN_7 +204 0x5C5C //RX_FDEQ_GAIN_8 +205 0x5C5C //RX_FDEQ_GAIN_9 +206 0x5C5C //RX_FDEQ_GAIN_10 +207 0x5C5C //RX_FDEQ_GAIN_11 +208 0x5C5C //RX_FDEQ_GAIN_12 +209 0x5C5C //RX_FDEQ_GAIN_13 +210 0x4848 //RX_FDEQ_GAIN_14 +211 0x4848 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0202 //RX_FDEQ_BIN_0 +221 0x0203 //RX_FDEQ_BIN_1 +222 0x0402 //RX_FDEQ_BIN_2 +223 0x0505 //RX_FDEQ_BIN_3 +224 0x0505 //RX_FDEQ_BIN_4 +225 0x0505 //RX_FDEQ_BIN_5 +226 0x0505 //RX_FDEQ_BIN_6 +227 0x0505 //RX_FDEQ_BIN_7 +228 0x160C //RX_FDEQ_BIN_8 +229 0x0D0E //RX_FDEQ_BIN_9 +230 0x0E0F //RX_FDEQ_BIN_10 +231 0x0F10 //RX_FDEQ_BIN_11 +232 0x1011 //RX_FDEQ_BIN_12 +233 0x1104 //RX_FDEQ_BIN_13 +234 0x0000 //RX_FDEQ_BIN_14 +235 0x0000 //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x4000 //RX_FDEQ_RESRV_0 +245 0x0320 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0030 //RX_FDDRC_BAND_MARGIN_1 +248 0x0050 //RX_FDDRC_BAND_MARGIN_2 +249 0x0080 //RX_FDDRC_BAND_MARGIN_3 +250 0x0007 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x5000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x6400 //RX_FDDRC_THRD_3_2 +258 0x6400 //RX_FDDRC_THRD_3_3 +259 0x2000 //RX_FDDRC_SLANT_0_0 +260 0x2000 //RX_FDDRC_SLANT_0_1 +261 0x2000 //RX_FDDRC_SLANT_0_2 +262 0x2000 //RX_FDDRC_SLANT_0_3 +263 0x5333 //RX_FDDRC_SLANT_1_0 +264 0x5333 //RX_FDDRC_SLANT_1_1 +265 0x5333 //RX_FDDRC_SLANT_1_2 +266 0x5333 //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +286 0x0100 //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 +#VOL 2 +163 0x1000 //RX_TDDRC_ALPHA_UP_1 +164 0x1000 //RX_TDDRC_ALPHA_UP_2 +165 0x1000 //RX_TDDRC_ALPHA_UP_3 +166 0x1000 //RX_TDDRC_ALPHA_UP_4 +184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +190 0x7000 //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +269 0x0000 //RX_TDDRC_THRD_0 +270 0x0000 //RX_TDDRC_THRD_1 +271 0x1800 //RX_TDDRC_THRD_2 +272 0x1800 //RX_TDDRC_THRD_3 +273 0x3000 //RX_TDDRC_SLANT_0 +274 0x6E00 //RX_TDDRC_SLANT_1 +275 0x1000 //RX_TDDRC_ALPHA_UP_0 +276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x199A //RX_TDDRC_HMNC_GAIN +279 0x0001 //RX_TDDRC_SMT_FLAG +280 0x0CCD //RX_TDDRC_SMT_W +281 0x0400 //RX_TDDRC_DRC_GAIN +195 0x0030 //RX_FDEQ_SUBNUM +196 0x4848 //RX_FDEQ_GAIN_0 +197 0x4848 //RX_FDEQ_GAIN_1 +198 0x4844 //RX_FDEQ_GAIN_2 +199 0x4A4C //RX_FDEQ_GAIN_3 +200 0x4E50 //RX_FDEQ_GAIN_4 +201 0x5254 //RX_FDEQ_GAIN_5 +202 0x5658 //RX_FDEQ_GAIN_6 +203 0x5A5C //RX_FDEQ_GAIN_7 +204 0x5C5C //RX_FDEQ_GAIN_8 +205 0x5C5C //RX_FDEQ_GAIN_9 +206 0x5C5C //RX_FDEQ_GAIN_10 +207 0x5C5C //RX_FDEQ_GAIN_11 +208 0x5C5C //RX_FDEQ_GAIN_12 +209 0x5C5C //RX_FDEQ_GAIN_13 +210 0x4848 //RX_FDEQ_GAIN_14 +211 0x4848 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0202 //RX_FDEQ_BIN_0 +221 0x0203 //RX_FDEQ_BIN_1 +222 0x0402 //RX_FDEQ_BIN_2 +223 0x0505 //RX_FDEQ_BIN_3 +224 0x0505 //RX_FDEQ_BIN_4 +225 0x0505 //RX_FDEQ_BIN_5 +226 0x0505 //RX_FDEQ_BIN_6 +227 0x0505 //RX_FDEQ_BIN_7 +228 0x160C //RX_FDEQ_BIN_8 +229 0x0D0E //RX_FDEQ_BIN_9 +230 0x0E0F //RX_FDEQ_BIN_10 +231 0x0F10 //RX_FDEQ_BIN_11 +232 0x1011 //RX_FDEQ_BIN_12 +233 0x1104 //RX_FDEQ_BIN_13 +234 0x0000 //RX_FDEQ_BIN_14 +235 0x0000 //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x4000 //RX_FDEQ_RESRV_0 +245 0x0320 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0030 //RX_FDDRC_BAND_MARGIN_1 +248 0x0050 //RX_FDDRC_BAND_MARGIN_2 +249 0x0080 //RX_FDDRC_BAND_MARGIN_3 +250 0x0007 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x5000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x6400 //RX_FDDRC_THRD_3_2 +258 0x6400 //RX_FDDRC_THRD_3_3 +259 0x2000 //RX_FDDRC_SLANT_0_0 +260 0x2000 //RX_FDDRC_SLANT_0_1 +261 0x2000 //RX_FDDRC_SLANT_0_2 +262 0x2000 //RX_FDDRC_SLANT_0_3 +263 0x5333 //RX_FDDRC_SLANT_1_0 +264 0x5333 //RX_FDDRC_SLANT_1_1 +265 0x5333 //RX_FDDRC_SLANT_1_2 +266 0x5333 //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +286 0x0100 //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 +#VOL 3 +163 0x1000 //RX_TDDRC_ALPHA_UP_1 +164 0x1000 //RX_TDDRC_ALPHA_UP_2 +165 0x1000 //RX_TDDRC_ALPHA_UP_3 +166 0x1000 //RX_TDDRC_ALPHA_UP_4 +184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +190 0x7000 //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +269 0x0000 //RX_TDDRC_THRD_0 +270 0x0000 //RX_TDDRC_THRD_1 +271 0x1800 //RX_TDDRC_THRD_2 +272 0x1800 //RX_TDDRC_THRD_3 +273 0x3000 //RX_TDDRC_SLANT_0 +274 0x6E00 //RX_TDDRC_SLANT_1 +275 0x1000 //RX_TDDRC_ALPHA_UP_0 +276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x199A //RX_TDDRC_HMNC_GAIN +279 0x0001 //RX_TDDRC_SMT_FLAG +280 0x0CCD //RX_TDDRC_SMT_W +281 0x0400 //RX_TDDRC_DRC_GAIN +195 0x0030 //RX_FDEQ_SUBNUM +196 0x4848 //RX_FDEQ_GAIN_0 +197 0x4848 //RX_FDEQ_GAIN_1 +198 0x4844 //RX_FDEQ_GAIN_2 +199 0x4A4C //RX_FDEQ_GAIN_3 +200 0x4E50 //RX_FDEQ_GAIN_4 +201 0x5254 //RX_FDEQ_GAIN_5 +202 0x5658 //RX_FDEQ_GAIN_6 +203 0x5A5C //RX_FDEQ_GAIN_7 +204 0x5C5C //RX_FDEQ_GAIN_8 +205 0x5C5C //RX_FDEQ_GAIN_9 +206 0x5C5C //RX_FDEQ_GAIN_10 +207 0x5C5C //RX_FDEQ_GAIN_11 +208 0x5C5C //RX_FDEQ_GAIN_12 +209 0x5C5C //RX_FDEQ_GAIN_13 +210 0x4848 //RX_FDEQ_GAIN_14 +211 0x4848 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0202 //RX_FDEQ_BIN_0 +221 0x0203 //RX_FDEQ_BIN_1 +222 0x0402 //RX_FDEQ_BIN_2 +223 0x0505 //RX_FDEQ_BIN_3 +224 0x0505 //RX_FDEQ_BIN_4 +225 0x0505 //RX_FDEQ_BIN_5 +226 0x0505 //RX_FDEQ_BIN_6 +227 0x0505 //RX_FDEQ_BIN_7 +228 0x160C //RX_FDEQ_BIN_8 +229 0x0D0E //RX_FDEQ_BIN_9 +230 0x0E0F //RX_FDEQ_BIN_10 +231 0x0F10 //RX_FDEQ_BIN_11 +232 0x1011 //RX_FDEQ_BIN_12 +233 0x1104 //RX_FDEQ_BIN_13 +234 0x0000 //RX_FDEQ_BIN_14 +235 0x0000 //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x4000 //RX_FDEQ_RESRV_0 +245 0x0320 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0030 //RX_FDDRC_BAND_MARGIN_1 +248 0x0050 //RX_FDDRC_BAND_MARGIN_2 +249 0x0080 //RX_FDDRC_BAND_MARGIN_3 +250 0x0007 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x5000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x6400 //RX_FDDRC_THRD_3_2 +258 0x6400 //RX_FDDRC_THRD_3_3 +259 0x2000 //RX_FDDRC_SLANT_0_0 +260 0x2000 //RX_FDDRC_SLANT_0_1 +261 0x2000 //RX_FDDRC_SLANT_0_2 +262 0x2000 //RX_FDDRC_SLANT_0_3 +263 0x5333 //RX_FDDRC_SLANT_1_0 +264 0x5333 //RX_FDDRC_SLANT_1_1 +265 0x5333 //RX_FDDRC_SLANT_1_2 +266 0x5333 //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +286 0x0100 //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 +#VOL 4 +163 0x1000 //RX_TDDRC_ALPHA_UP_1 +164 0x1000 //RX_TDDRC_ALPHA_UP_2 +165 0x1000 //RX_TDDRC_ALPHA_UP_3 +166 0x1000 //RX_TDDRC_ALPHA_UP_4 +184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +190 0x7000 //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +269 0x0000 //RX_TDDRC_THRD_0 +270 0x0000 //RX_TDDRC_THRD_1 +271 0x1800 //RX_TDDRC_THRD_2 +272 0x1800 //RX_TDDRC_THRD_3 +273 0x3000 //RX_TDDRC_SLANT_0 +274 0x6E00 //RX_TDDRC_SLANT_1 +275 0x1000 //RX_TDDRC_ALPHA_UP_0 +276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x199A //RX_TDDRC_HMNC_GAIN +279 0x0001 //RX_TDDRC_SMT_FLAG +280 0x0CCD //RX_TDDRC_SMT_W +281 0x0400 //RX_TDDRC_DRC_GAIN +195 0x0030 //RX_FDEQ_SUBNUM +196 0x4848 //RX_FDEQ_GAIN_0 +197 0x4848 //RX_FDEQ_GAIN_1 +198 0x4844 //RX_FDEQ_GAIN_2 +199 0x4A4C //RX_FDEQ_GAIN_3 +200 0x4E50 //RX_FDEQ_GAIN_4 +201 0x5254 //RX_FDEQ_GAIN_5 +202 0x5658 //RX_FDEQ_GAIN_6 +203 0x5A5C //RX_FDEQ_GAIN_7 +204 0x5C5C //RX_FDEQ_GAIN_8 +205 0x5C5C //RX_FDEQ_GAIN_9 +206 0x5C5C //RX_FDEQ_GAIN_10 +207 0x5C5C //RX_FDEQ_GAIN_11 +208 0x5C5C //RX_FDEQ_GAIN_12 +209 0x5C5C //RX_FDEQ_GAIN_13 +210 0x4848 //RX_FDEQ_GAIN_14 +211 0x4848 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0202 //RX_FDEQ_BIN_0 +221 0x0203 //RX_FDEQ_BIN_1 +222 0x0402 //RX_FDEQ_BIN_2 +223 0x0505 //RX_FDEQ_BIN_3 +224 0x0505 //RX_FDEQ_BIN_4 +225 0x0505 //RX_FDEQ_BIN_5 +226 0x0505 //RX_FDEQ_BIN_6 +227 0x0505 //RX_FDEQ_BIN_7 +228 0x160C //RX_FDEQ_BIN_8 +229 0x0D0E //RX_FDEQ_BIN_9 +230 0x0E0F //RX_FDEQ_BIN_10 +231 0x0F10 //RX_FDEQ_BIN_11 +232 0x1011 //RX_FDEQ_BIN_12 +233 0x1104 //RX_FDEQ_BIN_13 +234 0x0000 //RX_FDEQ_BIN_14 +235 0x0000 //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x4000 //RX_FDEQ_RESRV_0 +245 0x0320 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0030 //RX_FDDRC_BAND_MARGIN_1 +248 0x0050 //RX_FDDRC_BAND_MARGIN_2 +249 0x0080 //RX_FDDRC_BAND_MARGIN_3 +250 0x0007 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x5000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x6400 //RX_FDDRC_THRD_3_2 +258 0x6400 //RX_FDDRC_THRD_3_3 +259 0x2000 //RX_FDDRC_SLANT_0_0 +260 0x2000 //RX_FDDRC_SLANT_0_1 +261 0x2000 //RX_FDDRC_SLANT_0_2 +262 0x2000 //RX_FDDRC_SLANT_0_3 +263 0x5333 //RX_FDDRC_SLANT_1_0 +264 0x5333 //RX_FDDRC_SLANT_1_1 +265 0x5333 //RX_FDDRC_SLANT_1_2 +266 0x5333 //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +286 0x0100 //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 +#VOL 5 +163 0x1000 //RX_TDDRC_ALPHA_UP_1 +164 0x1000 //RX_TDDRC_ALPHA_UP_2 +165 0x1000 //RX_TDDRC_ALPHA_UP_3 +166 0x1000 //RX_TDDRC_ALPHA_UP_4 +184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +190 0x7000 //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +269 0x0000 //RX_TDDRC_THRD_0 +270 0x0000 //RX_TDDRC_THRD_1 +271 0x1800 //RX_TDDRC_THRD_2 +272 0x1800 //RX_TDDRC_THRD_3 +273 0x3000 //RX_TDDRC_SLANT_0 +274 0x6E00 //RX_TDDRC_SLANT_1 +275 0x1000 //RX_TDDRC_ALPHA_UP_0 +276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x199A //RX_TDDRC_HMNC_GAIN +279 0x0001 //RX_TDDRC_SMT_FLAG +280 0x0CCD //RX_TDDRC_SMT_W +281 0x0400 //RX_TDDRC_DRC_GAIN +195 0x0030 //RX_FDEQ_SUBNUM +196 0x4848 //RX_FDEQ_GAIN_0 +197 0x4848 //RX_FDEQ_GAIN_1 +198 0x4844 //RX_FDEQ_GAIN_2 +199 0x4A4C //RX_FDEQ_GAIN_3 +200 0x4E50 //RX_FDEQ_GAIN_4 +201 0x5254 //RX_FDEQ_GAIN_5 +202 0x5658 //RX_FDEQ_GAIN_6 +203 0x5A5C //RX_FDEQ_GAIN_7 +204 0x5C5C //RX_FDEQ_GAIN_8 +205 0x5C5C //RX_FDEQ_GAIN_9 +206 0x5C5C //RX_FDEQ_GAIN_10 +207 0x5C5C //RX_FDEQ_GAIN_11 +208 0x5C5C //RX_FDEQ_GAIN_12 +209 0x5C5C //RX_FDEQ_GAIN_13 +210 0x4848 //RX_FDEQ_GAIN_14 +211 0x4848 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0202 //RX_FDEQ_BIN_0 +221 0x0203 //RX_FDEQ_BIN_1 +222 0x0402 //RX_FDEQ_BIN_2 +223 0x0505 //RX_FDEQ_BIN_3 +224 0x0505 //RX_FDEQ_BIN_4 +225 0x0505 //RX_FDEQ_BIN_5 +226 0x0505 //RX_FDEQ_BIN_6 +227 0x0505 //RX_FDEQ_BIN_7 +228 0x160C //RX_FDEQ_BIN_8 +229 0x0D0E //RX_FDEQ_BIN_9 +230 0x0E0F //RX_FDEQ_BIN_10 +231 0x0F10 //RX_FDEQ_BIN_11 +232 0x1011 //RX_FDEQ_BIN_12 +233 0x1104 //RX_FDEQ_BIN_13 +234 0x0000 //RX_FDEQ_BIN_14 +235 0x0000 //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x4000 //RX_FDEQ_RESRV_0 +245 0x0320 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0030 //RX_FDDRC_BAND_MARGIN_1 +248 0x0050 //RX_FDDRC_BAND_MARGIN_2 +249 0x0080 //RX_FDDRC_BAND_MARGIN_3 +250 0x0007 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x5000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x6400 //RX_FDDRC_THRD_3_2 +258 0x6400 //RX_FDDRC_THRD_3_3 +259 0x2000 //RX_FDDRC_SLANT_0_0 +260 0x2000 //RX_FDDRC_SLANT_0_1 +261 0x2000 //RX_FDDRC_SLANT_0_2 +262 0x2000 //RX_FDDRC_SLANT_0_3 +263 0x5333 //RX_FDDRC_SLANT_1_0 +264 0x5333 //RX_FDDRC_SLANT_1_1 +265 0x5333 //RX_FDDRC_SLANT_1_2 +266 0x5333 //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +286 0x0100 //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 +#VOL 6 +163 0x1000 //RX_TDDRC_ALPHA_UP_1 +164 0x1000 //RX_TDDRC_ALPHA_UP_2 +165 0x1000 //RX_TDDRC_ALPHA_UP_3 +166 0x1000 //RX_TDDRC_ALPHA_UP_4 +184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +190 0x7000 //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +269 0x0000 //RX_TDDRC_THRD_0 +270 0x0000 //RX_TDDRC_THRD_1 +271 0x1800 //RX_TDDRC_THRD_2 +272 0x1800 //RX_TDDRC_THRD_3 +273 0x3000 //RX_TDDRC_SLANT_0 +274 0x6E00 //RX_TDDRC_SLANT_1 +275 0x1000 //RX_TDDRC_ALPHA_UP_0 +276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x199A //RX_TDDRC_HMNC_GAIN +279 0x0001 //RX_TDDRC_SMT_FLAG +280 0x0CCD //RX_TDDRC_SMT_W +281 0x0400 //RX_TDDRC_DRC_GAIN +195 0x0030 //RX_FDEQ_SUBNUM +196 0x4848 //RX_FDEQ_GAIN_0 +197 0x4848 //RX_FDEQ_GAIN_1 +198 0x4844 //RX_FDEQ_GAIN_2 +199 0x4A4C //RX_FDEQ_GAIN_3 +200 0x4E50 //RX_FDEQ_GAIN_4 +201 0x5254 //RX_FDEQ_GAIN_5 +202 0x5658 //RX_FDEQ_GAIN_6 +203 0x5A5C //RX_FDEQ_GAIN_7 +204 0x5C5C //RX_FDEQ_GAIN_8 +205 0x5C5C //RX_FDEQ_GAIN_9 +206 0x5C5C //RX_FDEQ_GAIN_10 +207 0x5C5C //RX_FDEQ_GAIN_11 +208 0x5C5C //RX_FDEQ_GAIN_12 +209 0x5C5C //RX_FDEQ_GAIN_13 +210 0x4848 //RX_FDEQ_GAIN_14 +211 0x4848 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0202 //RX_FDEQ_BIN_0 +221 0x0203 //RX_FDEQ_BIN_1 +222 0x0402 //RX_FDEQ_BIN_2 +223 0x0505 //RX_FDEQ_BIN_3 +224 0x0505 //RX_FDEQ_BIN_4 +225 0x0505 //RX_FDEQ_BIN_5 +226 0x0505 //RX_FDEQ_BIN_6 +227 0x0505 //RX_FDEQ_BIN_7 +228 0x160C //RX_FDEQ_BIN_8 +229 0x0D0E //RX_FDEQ_BIN_9 +230 0x0E0F //RX_FDEQ_BIN_10 +231 0x0F10 //RX_FDEQ_BIN_11 +232 0x1011 //RX_FDEQ_BIN_12 +233 0x1104 //RX_FDEQ_BIN_13 +234 0x0000 //RX_FDEQ_BIN_14 +235 0x0000 //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x4000 //RX_FDEQ_RESRV_0 +245 0x0320 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0030 //RX_FDDRC_BAND_MARGIN_1 +248 0x0050 //RX_FDDRC_BAND_MARGIN_2 +249 0x0080 //RX_FDDRC_BAND_MARGIN_3 +250 0x0007 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x5000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x6400 //RX_FDDRC_THRD_3_2 +258 0x6400 //RX_FDDRC_THRD_3_3 +259 0x2000 //RX_FDDRC_SLANT_0_0 +260 0x2000 //RX_FDDRC_SLANT_0_1 +261 0x2000 //RX_FDDRC_SLANT_0_2 +262 0x2000 //RX_FDDRC_SLANT_0_3 +263 0x5333 //RX_FDDRC_SLANT_1_0 +264 0x5333 //RX_FDDRC_SLANT_1_1 +265 0x5333 //RX_FDDRC_SLANT_1_2 +266 0x5333 //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +286 0x0100 //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 #CASE_NAME HANDSET-HANDSET_HAC-VOICE_GENERIC-SWB -#PARAM_TYPE TX+RX -#TOTAL_CUSTOM_STEP 7 +#PARAM_MODE Full +#PARAM_TYPE TX+2RX +#TOTAL_CUSTOM_STEP 7+7 #TX 0 0x0000 //TX_OPERATION_MODE_0 1 0x0000 //TX_OPERATION_MODE_1 -2 0x0026 //TX_PATCH_REG +2 0x0076 //TX_PATCH_REG 3 0x6F7E //TX_SENDFUNC_MODE_0 4 0x0001 //TX_SENDFUNC_MODE_1 5 0x0002 //TX_NUM_MIC @@ -15805,7 +24059,7 @@ 18 0x0000 //TX_SYS_RESRV_2 19 0x0000 //TX_SYS_RESRV_3 20 0x0000 //TX_DIST2REF0 -21 0x009D //TX_DIST2REF1 +21 0x009C //TX_DIST2REF1 22 0x0000 //TX_DIST2REF_02 23 0x0000 //TX_DIST2REF_03 24 0x0000 //TX_DIST2REF_04 @@ -16035,12 +24289,12 @@ 248 0xF800 //TX_THR_SN_EST_6 249 0xF700 //TX_THR_SN_EST_7 250 0x0000 //TX_DELTA_THR_SN_EST_0 -251 0x0100 //TX_DELTA_THR_SN_EST_1 +251 0x0200 //TX_DELTA_THR_SN_EST_1 252 0x0200 //TX_DELTA_THR_SN_EST_2 253 0x0200 //TX_DELTA_THR_SN_EST_3 -254 0x0200 //TX_DELTA_THR_SN_EST_4 -255 0x0100 //TX_DELTA_THR_SN_EST_5 -256 0x0200 //TX_DELTA_THR_SN_EST_6 +254 0x0100 //TX_DELTA_THR_SN_EST_4 +255 0x0200 //TX_DELTA_THR_SN_EST_5 +256 0x0100 //TX_DELTA_THR_SN_EST_6 257 0x0200 //TX_DELTA_THR_SN_EST_7 258 0x4000 //TX_LAMBDA_NN_EST_0 259 0x4000 //TX_LAMBDA_NN_EST_1 @@ -16066,18 +24320,18 @@ 279 0x1000 //TX_B_POST_FLT_0 280 0x1000 //TX_B_POST_FLT_1 281 0x0014 //TX_NS_LVL_CTRL_0 -282 0x0016 //TX_NS_LVL_CTRL_1 -283 0x002C //TX_NS_LVL_CTRL_2 -284 0x0016 //TX_NS_LVL_CTRL_3 -285 0x0018 //TX_NS_LVL_CTRL_4 -286 0x0016 //TX_NS_LVL_CTRL_5 -287 0x0012 //TX_NS_LVL_CTRL_6 +282 0x002C //TX_NS_LVL_CTRL_1 +283 0x0016 //TX_NS_LVL_CTRL_2 +284 0x0018 //TX_NS_LVL_CTRL_3 +285 0x0016 //TX_NS_LVL_CTRL_4 +286 0x0012 //TX_NS_LVL_CTRL_5 +287 0x0016 //TX_NS_LVL_CTRL_6 288 0x0017 //TX_NS_LVL_CTRL_7 289 0x000E //TX_MIN_GAIN_S_0 -290 0x0012 //TX_MIN_GAIN_S_1 -291 0x000D //TX_MIN_GAIN_S_2 -292 0x0012 //TX_MIN_GAIN_S_3 -293 0x0010 //TX_MIN_GAIN_S_4 +290 0x000D //TX_MIN_GAIN_S_1 +291 0x0012 //TX_MIN_GAIN_S_2 +292 0x0010 //TX_MIN_GAIN_S_3 +293 0x0012 //TX_MIN_GAIN_S_4 294 0x0012 //TX_MIN_GAIN_S_5 295 0x0012 //TX_MIN_GAIN_S_6 296 0x0012 //TX_MIN_GAIN_S_7 @@ -16099,29 +24353,29 @@ 312 0x7FFF //TX_A_POST_FILT_0 313 0x2000 //TX_A_POST_FILT_1 314 0x4000 //TX_A_POST_FILT_S_0 -315 0x5000 //TX_A_POST_FILT_S_1 +315 0x4000 //TX_A_POST_FILT_S_1 316 0x4000 //TX_A_POST_FILT_S_2 317 0x4000 //TX_A_POST_FILT_S_3 318 0x4000 //TX_A_POST_FILT_S_4 319 0x4000 //TX_A_POST_FILT_S_5 -320 0x4000 //TX_A_POST_FILT_S_6 +320 0x5000 //TX_A_POST_FILT_S_6 321 0x7000 //TX_A_POST_FILT_S_7 322 0x1000 //TX_B_POST_FILT_0 323 0x1000 //TX_B_POST_FILT_1 -324 0x3000 //TX_B_POST_FILT_2 -325 0x1000 //TX_B_POST_FILT_3 -326 0x5000 //TX_B_POST_FILT_4 -327 0x2000 //TX_B_POST_FILT_5 -328 0x6000 //TX_B_POST_FILT_6 +324 0x2000 //TX_B_POST_FILT_2 +325 0x2000 //TX_B_POST_FILT_3 +326 0x2000 //TX_B_POST_FILT_4 +327 0x1000 //TX_B_POST_FILT_5 +328 0x3000 //TX_B_POST_FILT_6 329 0x3000 //TX_B_POST_FILT_7 330 0x1000 //TX_B_LESSCUT_RTO_S_0 -331 0x6000 //TX_B_LESSCUT_RTO_S_1 -332 0x6000 //TX_B_LESSCUT_RTO_S_2 -333 0x6000 //TX_B_LESSCUT_RTO_S_3 -334 0x6000 //TX_B_LESSCUT_RTO_S_4 -335 0x6000 //TX_B_LESSCUT_RTO_S_5 -336 0x7FFF //TX_B_LESSCUT_RTO_S_6 -337 0x7FFF //TX_B_LESSCUT_RTO_S_7 +331 0x1000 //TX_B_LESSCUT_RTO_S_1 +332 0x1000 //TX_B_LESSCUT_RTO_S_2 +333 0x1000 //TX_B_LESSCUT_RTO_S_3 +334 0x1000 //TX_B_LESSCUT_RTO_S_4 +335 0x1000 //TX_B_LESSCUT_RTO_S_5 +336 0x1000 //TX_B_LESSCUT_RTO_S_6 +337 0x1000 //TX_B_LESSCUT_RTO_S_7 338 0x7E14 //TX_LAMBDA_PFILT 339 0x7C29 //TX_LAMBDA_PFILT_S_0 340 0x7C29 //TX_LAMBDA_PFILT_S_1 @@ -16164,10 +24418,10 @@ 377 0x4E20 //TX_NOISE_TH_5_4 378 0x1194 //TX_NOISE_TH_6 379 0x0014 //TX_MINENOISE_TH -380 0x4000 //TX_MINENOISE_MIC0_TH_MTS -381 0xFFEE //TX_MINENOISE_MIC0_TH_EXP -382 0x6000 //TX_MINENOISE_MIC0_S_TH_MTS -383 0xFFF3 //TX_MINENOISE_MIC0_S_TH_EXP +380 0xD508 //TX_MORENS_TFMASK_TH +381 0x0001 //TX_DRC_QUIET_FLOOR +382 0x6D60 //TX_RATIODTL_CUT_TH +383 0x0DAC //TX_DT_CUT_K1 384 0x00A5 //TX_OUT_ENER_S_TH_CLEAN 385 0x00A5 //TX_OUT_ENER_S_TH_LESSCLEAN 386 0x00A5 //TX_OUT_ENER_S_TH_NOISY @@ -16175,15 +24429,15 @@ 388 0x0200 //TX_OUT_ENER_TH_SPEECH 389 0x2000 //TX_SN_NPB_GAIN 390 0x0000 //TX_NN_NPB_GAIN -391 0x0000 //TX_CSX_ALPHA_0 -392 0x0000 //TX_CSX_ALPHA_1 -393 0x0000 //TX_CSX_ALPHA_2 -394 0x0000 //TX_CSX_ALPHA_3 -395 0x0800 //TX_MU_ARSP_EST -396 0x00C8 //TX_P_OUTBEAM_MIN_TH +391 0x3000 //TX_POST_MASK_SUP_HSNE +392 0x07D0 //TX_TAIL_DET_TH +393 0x4000 //TX_B_LESSCUT_RTO_WTA +394 0x0000 //TX_MEL_G_R +395 0x0080 //TX_SUPHIGH_TH +396 0x0000 //TX_MASK_G_R 397 0x0002 //TX_EXTRA_NS_L -398 0x0800 //TX_EXTRA_NS_A -399 0x0005 //TX_VR_NOISE_FLOOR_TH +398 0x1800 //TX_C_POST_FLT_MASK +399 0x7FFF //TX_A_POST_FLT_WNS 400 0x0148 //TX_MIN_G_LOW300HZ 401 0x0004 //TX_MAXLEVEL_CNG 402 0x00B4 //TX_STN_NOISE_TH @@ -16298,16 +24552,16 @@ 511 0x6666 //TX_MIC_TO_BFGAIN 512 0x0000 //TX_MICTOBFGAIN0 513 0x0000 //TX_FASTMUE_TH -514 0x0000 //TX_DERVB_LEN_0 -515 0x0000 //TX_DERVB_LEN_1 -516 0x0000 //TX_RHO_DERVB -517 0x0000 //TX_MIC_INDX_DERVB -518 0x0000 //TX_MU_DERVB -519 0x0000 //TX_DR_RESRV_0 -520 0x0000 //TX_DR_RESRV_1 -521 0x0000 //TX_DR_RESRV_2 -522 0x0000 //TX_DR_RESRV_3 -523 0x0000 //TX_DR_RESRV_4 +514 0x2CCC //TX_DEREVERB_LF_MU +515 0x3200 //TX_DEREVERB_HF_MU +516 0x0007 //TX_DEREVERB_DELAY +517 0x0004 //TX_DEREVERB_COEF_LEN +518 0x0003 //TX_DEREVERB_DNR +519 0x0000 //TX_DEREVERB_ALPHA +520 0x0000 //TX_DEREVERB_BETA +521 0x3A98 //TX_GSC_RTOL_TH +522 0x3A98 //TX_GSC_RTOH_TH +523 0x7E2C //TX_WIDE2_MEANHTH 524 0x0000 //TX_DR_RESRV_5 525 0x0000 //TX_DR_RESRV_6 526 0x0000 //TX_DR_RESRV_7 @@ -16355,18 +24609,18 @@ 568 0x5048 //TX_FDEQ_GAIN_1 569 0x4C4C //TX_FDEQ_GAIN_2 570 0x474A //TX_FDEQ_GAIN_3 -571 0x423C //TX_FDEQ_GAIN_4 -572 0x4042 //TX_FDEQ_GAIN_5 -573 0x474F //TX_FDEQ_GAIN_6 -574 0x5444 //TX_FDEQ_GAIN_7 +571 0x4640 //TX_FDEQ_GAIN_4 +572 0x4446 //TX_FDEQ_GAIN_5 +573 0x4B53 //TX_FDEQ_GAIN_6 +574 0x5448 //TX_FDEQ_GAIN_7 575 0x4243 //TX_FDEQ_GAIN_8 -576 0x4344 //TX_FDEQ_GAIN_9 -577 0x414D //TX_FDEQ_GAIN_10 -578 0x4A47 //TX_FDEQ_GAIN_11 -579 0x4346 //TX_FDEQ_GAIN_12 -580 0x4C4F //TX_FDEQ_GAIN_13 -581 0x565B //TX_FDEQ_GAIN_14 -582 0x6448 //TX_FDEQ_GAIN_15 +576 0x434C //TX_FDEQ_GAIN_9 +577 0x484D //TX_FDEQ_GAIN_10 +578 0x4D4D //TX_FDEQ_GAIN_11 +579 0x4B4E //TX_FDEQ_GAIN_12 +580 0x5054 //TX_FDEQ_GAIN_13 +581 0x5D68 //TX_FDEQ_GAIN_14 +582 0x7C6B //TX_FDEQ_GAIN_15 583 0x4848 //TX_FDEQ_GAIN_16 584 0x4848 //TX_FDEQ_GAIN_17 585 0x4848 //TX_FDEQ_GAIN_18 @@ -16409,14 +24663,14 @@ 622 0x4848 //TX_PREEQ_GAIN_MIC0_5 623 0x4848 //TX_PREEQ_GAIN_MIC0_6 624 0x4848 //TX_PREEQ_GAIN_MIC0_7 -625 0x4646 //TX_PREEQ_GAIN_MIC0_8 -626 0x4545 //TX_PREEQ_GAIN_MIC0_9 -627 0x4545 //TX_PREEQ_GAIN_MIC0_10 -628 0x4544 //TX_PREEQ_GAIN_MIC0_11 -629 0x4444 //TX_PREEQ_GAIN_MIC0_12 -630 0x4343 //TX_PREEQ_GAIN_MIC0_13 -631 0x4241 //TX_PREEQ_GAIN_MIC0_14 -632 0x3C3E //TX_PREEQ_GAIN_MIC0_15 +625 0x4848 //TX_PREEQ_GAIN_MIC0_8 +626 0x4848 //TX_PREEQ_GAIN_MIC0_9 +627 0x4848 //TX_PREEQ_GAIN_MIC0_10 +628 0x4848 //TX_PREEQ_GAIN_MIC0_11 +629 0x4848 //TX_PREEQ_GAIN_MIC0_12 +630 0x4848 //TX_PREEQ_GAIN_MIC0_13 +631 0x4848 //TX_PREEQ_GAIN_MIC0_14 +632 0x4848 //TX_PREEQ_GAIN_MIC0_15 633 0x4848 //TX_PREEQ_GAIN_MIC0_16 634 0x4848 //TX_PREEQ_GAIN_MIC0_17 635 0x4848 //TX_PREEQ_GAIN_MIC0_18 @@ -16458,15 +24712,15 @@ 671 0x4848 //TX_PREEQ_GAIN_MIC1_5 672 0x4848 //TX_PREEQ_GAIN_MIC1_6 673 0x4848 //TX_PREEQ_GAIN_MIC1_7 -674 0x484A //TX_PREEQ_GAIN_MIC1_8 -675 0x4B4C //TX_PREEQ_GAIN_MIC1_9 -676 0x4B4A //TX_PREEQ_GAIN_MIC1_10 -677 0x4A48 //TX_PREEQ_GAIN_MIC1_11 -678 0x4C4C //TX_PREEQ_GAIN_MIC1_12 -679 0x4C4C //TX_PREEQ_GAIN_MIC1_13 -680 0x4848 //TX_PREEQ_GAIN_MIC1_14 -681 0x4848 //TX_PREEQ_GAIN_MIC1_15 -682 0x4848 //TX_PREEQ_GAIN_MIC1_16 +674 0x4848 //TX_PREEQ_GAIN_MIC1_8 +675 0x494A //TX_PREEQ_GAIN_MIC1_9 +676 0x4B4B //TX_PREEQ_GAIN_MIC1_10 +677 0x4B4B //TX_PREEQ_GAIN_MIC1_11 +678 0x4D4C //TX_PREEQ_GAIN_MIC1_12 +679 0x4A48 //TX_PREEQ_GAIN_MIC1_13 +680 0x4840 //TX_PREEQ_GAIN_MIC1_14 +681 0x3434 //TX_PREEQ_GAIN_MIC1_15 +682 0x3C48 //TX_PREEQ_GAIN_MIC1_16 683 0x4848 //TX_PREEQ_GAIN_MIC1_17 684 0x4848 //TX_PREEQ_GAIN_MIC1_18 685 0x4848 //TX_PREEQ_GAIN_MIC1_19 @@ -16480,17 +24734,17 @@ 693 0x0304 //TX_PREEQ_BIN_MIC1_3 694 0x0405 //TX_PREEQ_BIN_MIC1_4 695 0x0506 //TX_PREEQ_BIN_MIC1_5 -696 0x0708 //TX_PREEQ_BIN_MIC1_6 -697 0x090A //TX_PREEQ_BIN_MIC1_7 -698 0x0B0C //TX_PREEQ_BIN_MIC1_8 -699 0x0D0E //TX_PREEQ_BIN_MIC1_9 -700 0x0F10 //TX_PREEQ_BIN_MIC1_10 -701 0x1011 //TX_PREEQ_BIN_MIC1_11 -702 0x1112 //TX_PREEQ_BIN_MIC1_12 -703 0x120B //TX_PREEQ_BIN_MIC1_13 -704 0x0000 //TX_PREEQ_BIN_MIC1_14 -705 0x0000 //TX_PREEQ_BIN_MIC1_15 -706 0x0000 //TX_PREEQ_BIN_MIC1_16 +696 0x0808 //TX_PREEQ_BIN_MIC1_6 +697 0x0809 //TX_PREEQ_BIN_MIC1_7 +698 0x0A0A //TX_PREEQ_BIN_MIC1_8 +699 0x0C10 //TX_PREEQ_BIN_MIC1_9 +700 0x1013 //TX_PREEQ_BIN_MIC1_10 +701 0x1414 //TX_PREEQ_BIN_MIC1_11 +702 0x261E //TX_PREEQ_BIN_MIC1_12 +703 0x1E14 //TX_PREEQ_BIN_MIC1_13 +704 0x1414 //TX_PREEQ_BIN_MIC1_14 +705 0x2814 //TX_PREEQ_BIN_MIC1_15 +706 0x401E //TX_PREEQ_BIN_MIC1_16 707 0x0000 //TX_PREEQ_BIN_MIC1_17 708 0x0000 //TX_PREEQ_BIN_MIC1_18 709 0x0000 //TX_PREEQ_BIN_MIC1_19 @@ -16558,7 +24812,7 @@ 771 0x0046 //TX_MIC_PWR_BIAS_2 772 0x0046 //TX_MIC_PWR_BIAS_3 773 0x0000 //TX_GAIN_LIMIT_0 -774 0x0006 //TX_GAIN_LIMIT_1 +774 0x0005 //TX_GAIN_LIMIT_1 775 0x0000 //TX_GAIN_LIMIT_2 776 0x0000 //TX_GAIN_LIMIT_3 777 0x7F5B //TX_BVE_NOVAD0_ALPHADOWN @@ -16650,7 +24904,7 @@ 863 0x199A //TX_TDDRC_HMNC_GAIN 864 0x0000 //TX_TDDRC_SMT_FLAG 865 0x0CCD //TX_TDDRC_SMT_W -866 0x0550 //TX_TDDRC_DRC_GAIN +866 0x0504 //TX_TDDRC_DRC_GAIN 867 0x7FFF //TX_TDDRC_LMT_THRD 868 0x0000 //TX_TDDRC_LMT_ALPHA 869 0x0000 //TX_TFMASKLTH @@ -16681,6 +24935,71 @@ 894 0xC000 //TX_FASTNS_SSA_THHFL 895 0xCCCC //TX_FASTNS_SSA_THLFH 896 0xD999 //TX_FASTNS_SSA_THHFH +897 0x2339 //TX_SENDFUNC_REG_MICMUTE +898 0x0021 //TX_SENDFUNC_REG_MICMUTE1 +899 0x02BC //TX_MICMUTE_RATIO_THR +900 0x0140 //TX_MICMUTE_AMP_THR +901 0x0004 //TX_MICMUTE_HPF_IND +902 0x00C0 //TX_MICMUTE_LOG_EYR_TH +903 0x0008 //TX_MICMUTE_CVG_TIME +904 0x0008 //TX_MICMUTE_RELEASE_TIME +905 0x01FE //TX_MIC_VOLUME_MIC0MUTE +906 0x0020 //TX_MICMUTE_EPD_OFFSET_0 +907 0x001E //TX_MICMUTE_FRQ_AEC_L +908 0x7999 //TX_MICMUTE_EAD_THR +909 0x7FFF //TX_MICMUTE_LAMBDA_CB_NLE +910 0x7FFF //TX_MICMUTE_LAMBDA_RE_EST +911 0x4000 //TX_DTD_THR1_MICMUTE_0 +912 0x7000 //TX_DTD_THR1_MICMUTE_1 +913 0x7FFF //TX_DTD_THR1_MICMUTE_2 +914 0x7FFF //TX_DTD_THR1_MICMUTE_3 +915 0x6CCC //TX_DTD_THR2_MICMUTE_0 +916 0x0400 //TX_MICMUTE_MIN_EQ_RE_EST_0 +917 0x0400 //TX_MICMUTE_MIN_EQ_RE_EST_1 +918 0x1000 //TX_MICMUTE_MIN_EQ_RE_EST_2 +919 0x7FFF //TX_MICMUTE_MIN_EQ_RE_EST_3 +920 0x7FFF //TX_MICMUTE_MIN_EQ_RE_EST_4 +921 0x4000 //TX_MICMUTE_C_POST_FLT +922 0x03E8 //TX_MICMUTE_DT_CUT_K +923 0x0001 //TX_MICMUTE_DT_CUT_THR +924 0x03E8 //TX_MICMUTE_DT_CUT_K2 +925 0x0001 //TX_MICMUTE_DT_CUT_THR2 +926 0x0064 //TX_MICMUTE_DT2_HOLD_N +927 0x1000 //TX_MICMUTE_RATIODTH_THCUT +928 0x1000 //TX_MICMUTE_B_POST_FLT_ECHOL +929 0x7FFF //TX_MICMUTE_B_POST_FLT_ECHOH +930 0x0400 //TX_MICMUTE_C_POST_FLT_MASK +931 0x7999 //TX_MICMUTE_RATIODTL_CUT_TH +932 0x0258 //TX_MICMUTE_DT_CUT_K1 +933 0x0800 //TX_MICMUTE_N2_SN_EST +934 0xFC00 //TX_MICMUTE_THR_SN_EST_0 +935 0x001C //TX_MICMUTE_MIN_G_CTRL_0 +936 0x6000 //TX_MICMUTE_A_POST_FILT_S_0 +937 0x7000 //TX_MICMUTE_B_POST_FILT_0 +938 0x2710 //TX_MIC1RUB_AMP_THR +939 0x0010 //TX_MIC1MUTE_RATIO_THR +940 0x0450 //TX_MIC1MUTE_AMP_THR +941 0x0008 //TX_MIC1MUTE_CVG_TIME +942 0x0008 //TX_MIC1MUTE_RELEASE_TIME +943 0x0000 //TX_AMS_RESRV_01 +944 0x0000 //TX_AMS_RESRV_02 +945 0x0000 //TX_AMS_RESRV_03 +946 0x0000 //TX_AMS_RESRV_04 +947 0x0000 //TX_AMS_RESRV_05 +948 0x0000 //TX_AMS_RESRV_06 +949 0x0000 //TX_AMS_RESRV_07 +950 0x0000 //TX_AMS_RESRV_08 +951 0x0000 //TX_AMS_RESRV_09 +952 0x0000 //TX_AMS_RESRV_10 +953 0x0000 //TX_AMS_RESRV_11 +954 0x0000 //TX_AMS_RESRV_12 +955 0x0000 //TX_AMS_RESRV_13 +956 0x0000 //TX_AMS_RESRV_14 +957 0x0000 //TX_AMS_RESRV_15 +958 0x0000 //TX_AMS_RESRV_16 +959 0x0000 //TX_AMS_RESRV_17 +960 0x0000 //TX_AMS_RESRV_18 +961 0x0000 //TX_AMS_RESRV_19 #RX 0 0x000C //RX_RECVFUNC_MODE_0 1 0x0000 //RX_RECVFUNC_MODE_1 @@ -17532,10 +25851,862 @@ 110 0x0000 //RX_FDDRC_RESRV_0 129 0x0100 //RX_SPK_VOL 130 0x0000 //RX_VOL_RESRV_0 +#RX 2 +157 0x000C //RX_RECVFUNC_MODE_0 +158 0x0000 //RX_RECVFUNC_MODE_1 +159 0x0003 //RX_SAMPLINGFREQ_SIG +160 0x0003 //RX_SAMPLINGFREQ_PROC +161 0x000A //RX_FRAME_SZ +162 0x0000 //RX_DELAY_OPT +163 0x1000 //RX_TDDRC_ALPHA_UP_1 +164 0x1000 //RX_TDDRC_ALPHA_UP_2 +165 0x1000 //RX_TDDRC_ALPHA_UP_3 +166 0x1000 //RX_TDDRC_ALPHA_UP_4 +167 0x0800 //RX_PGA +168 0x7FFF //RX_A_HP +169 0x4000 //RX_B_PE +170 0x5800 //RX_THR_PITCH_DET_0 +171 0x5000 //RX_THR_PITCH_DET_1 +172 0x4000 //RX_THR_PITCH_DET_2 +173 0x0008 //RX_PITCH_BFR_LEN +174 0x0003 //RX_SBD_PITCH_DET +175 0x0100 //RX_PP_RESRV_0 +176 0x0020 //RX_PP_RESRV_1 +177 0x0600 //RX_N_SN_EST +178 0x000C //RX_N2_SN_EST +179 0x000F //RX_NS_LVL_CTRL +180 0xF800 //RX_THR_SN_EST +181 0x7E00 //RX_LAMBDA_PFILT +182 0x000A //RX_FENS_RESRV_0 +183 0x0190 //RX_FENS_RESRV_1 +184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +187 0x0002 //RX_EXTRA_NS_L +188 0x0800 //RX_EXTRA_NS_A +189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +190 0x7000 //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +192 0x199A //RX_A_POST_FLT +193 0x0000 //RX_LMT_THRD +194 0x4000 //RX_LMT_ALPHA +195 0x0030 //RX_FDEQ_SUBNUM +196 0x4848 //RX_FDEQ_GAIN_0 +197 0x4848 //RX_FDEQ_GAIN_1 +198 0x4844 //RX_FDEQ_GAIN_2 +199 0x4B4D //RX_FDEQ_GAIN_3 +200 0x4E50 //RX_FDEQ_GAIN_4 +201 0x5254 //RX_FDEQ_GAIN_5 +202 0x5658 //RX_FDEQ_GAIN_6 +203 0x5C60 //RX_FDEQ_GAIN_7 +204 0x6468 //RX_FDEQ_GAIN_8 +205 0x6C70 //RX_FDEQ_GAIN_9 +206 0x7474 //RX_FDEQ_GAIN_10 +207 0x7474 //RX_FDEQ_GAIN_11 +208 0x7474 //RX_FDEQ_GAIN_12 +209 0x7474 //RX_FDEQ_GAIN_13 +210 0x7474 //RX_FDEQ_GAIN_14 +211 0x7474 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0202 //RX_FDEQ_BIN_0 +221 0x0203 //RX_FDEQ_BIN_1 +222 0x0402 //RX_FDEQ_BIN_2 +223 0x0304 //RX_FDEQ_BIN_3 +224 0x0405 //RX_FDEQ_BIN_4 +225 0x0506 //RX_FDEQ_BIN_5 +226 0x0708 //RX_FDEQ_BIN_6 +227 0x090A //RX_FDEQ_BIN_7 +228 0x0B0C //RX_FDEQ_BIN_8 +229 0x0D0E //RX_FDEQ_BIN_9 +230 0x1214 //RX_FDEQ_BIN_10 +231 0x1E1E //RX_FDEQ_BIN_11 +232 0x1E1E //RX_FDEQ_BIN_12 +233 0x1E1E //RX_FDEQ_BIN_13 +234 0x1E1E //RX_FDEQ_BIN_14 +235 0x202C //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x4000 //RX_FDEQ_RESRV_0 +245 0x0320 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0030 //RX_FDDRC_BAND_MARGIN_1 +248 0x0050 //RX_FDDRC_BAND_MARGIN_2 +249 0x0080 //RX_FDDRC_BAND_MARGIN_3 +250 0x0007 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x5000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x6400 //RX_FDDRC_THRD_3_2 +258 0x6400 //RX_FDDRC_THRD_3_3 +259 0x2000 //RX_FDDRC_SLANT_0_0 +260 0x2000 //RX_FDDRC_SLANT_0_1 +261 0x2000 //RX_FDDRC_SLANT_0_2 +262 0x2000 //RX_FDDRC_SLANT_0_3 +263 0x5333 //RX_FDDRC_SLANT_1_0 +264 0x5333 //RX_FDDRC_SLANT_1_1 +265 0x5333 //RX_FDDRC_SLANT_1_2 +266 0x5333 //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +268 0x0002 //RX_FILTINDX +269 0x0000 //RX_TDDRC_THRD_0 +270 0x0000 //RX_TDDRC_THRD_1 +271 0x1800 //RX_TDDRC_THRD_2 +272 0x1800 //RX_TDDRC_THRD_3 +273 0x3000 //RX_TDDRC_SLANT_0 +274 0x6E00 //RX_TDDRC_SLANT_1 +275 0x1000 //RX_TDDRC_ALPHA_UP_0 +276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x199A //RX_TDDRC_HMNC_GAIN +279 0x0001 //RX_TDDRC_SMT_FLAG +280 0x0CCD //RX_TDDRC_SMT_W +281 0x01E0 //RX_TDDRC_DRC_GAIN +282 0x7C00 //RX_LAMBDA_PKA_FP +283 0x2000 //RX_TPKA_FP +284 0x2000 //RX_MIN_G_FP +285 0x0080 //RX_MAX_G_FP +286 0x0100 //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 +288 0x0000 //RX_MAXLEVEL_CNG +289 0x3000 //RX_BWE_UV_TH +290 0x3000 //RX_BWE_UV_TH2 +291 0x1800 //RX_BWE_UV_TH3 +292 0x1000 //RX_BWE_V_TH +293 0x04CD //RX_BWE_GAIN1_V_TH1 +294 0x0F33 //RX_BWE_GAIN1_V_TH2 +295 0x7333 //RX_BWE_UV_EQ +296 0x199A //RX_BWE_V_EQ +297 0x7333 //RX_BWE_TONE_TH +298 0x0004 //RX_BWE_UV_HOLD_T +299 0x6CCD //RX_BWE_GAIN2_ALPHA +300 0x799A //RX_BWE_GAIN3_ALPHA +301 0x001E //RX_BWE_CUTOFF +302 0x3000 //RX_BWE_GAINFILL +303 0x3200 //RX_BWE_MAXTH_TONE +304 0x2000 //RX_BWE_EQ_0 +305 0x2000 //RX_BWE_EQ_1 +306 0x2000 //RX_BWE_EQ_2 +307 0x2000 //RX_BWE_EQ_3 +308 0x2000 //RX_BWE_EQ_4 +309 0x2000 //RX_BWE_EQ_5 +310 0x2000 //RX_BWE_EQ_6 +311 0x0000 //RX_BWE_RESRV_0 +312 0x0000 //RX_BWE_RESRV_1 +313 0x0000 //RX_BWE_RESRV_2 +#VOL 0 +163 0x1000 //RX_TDDRC_ALPHA_UP_1 +164 0x1000 //RX_TDDRC_ALPHA_UP_2 +165 0x1000 //RX_TDDRC_ALPHA_UP_3 +166 0x1000 //RX_TDDRC_ALPHA_UP_4 +184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +190 0x7000 //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +269 0x0000 //RX_TDDRC_THRD_0 +270 0x0000 //RX_TDDRC_THRD_1 +271 0x1800 //RX_TDDRC_THRD_2 +272 0x1800 //RX_TDDRC_THRD_3 +273 0x3000 //RX_TDDRC_SLANT_0 +274 0x6E00 //RX_TDDRC_SLANT_1 +275 0x1000 //RX_TDDRC_ALPHA_UP_0 +276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x199A //RX_TDDRC_HMNC_GAIN +279 0x0001 //RX_TDDRC_SMT_FLAG +280 0x0CCD //RX_TDDRC_SMT_W +281 0x01E0 //RX_TDDRC_DRC_GAIN +195 0x0030 //RX_FDEQ_SUBNUM +196 0x4848 //RX_FDEQ_GAIN_0 +197 0x4848 //RX_FDEQ_GAIN_1 +198 0x4844 //RX_FDEQ_GAIN_2 +199 0x4B4D //RX_FDEQ_GAIN_3 +200 0x4E50 //RX_FDEQ_GAIN_4 +201 0x5254 //RX_FDEQ_GAIN_5 +202 0x5658 //RX_FDEQ_GAIN_6 +203 0x5C60 //RX_FDEQ_GAIN_7 +204 0x6468 //RX_FDEQ_GAIN_8 +205 0x6C70 //RX_FDEQ_GAIN_9 +206 0x7474 //RX_FDEQ_GAIN_10 +207 0x7474 //RX_FDEQ_GAIN_11 +208 0x7474 //RX_FDEQ_GAIN_12 +209 0x7474 //RX_FDEQ_GAIN_13 +210 0x7474 //RX_FDEQ_GAIN_14 +211 0x7474 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0202 //RX_FDEQ_BIN_0 +221 0x0203 //RX_FDEQ_BIN_1 +222 0x0402 //RX_FDEQ_BIN_2 +223 0x0304 //RX_FDEQ_BIN_3 +224 0x0405 //RX_FDEQ_BIN_4 +225 0x0506 //RX_FDEQ_BIN_5 +226 0x0708 //RX_FDEQ_BIN_6 +227 0x090A //RX_FDEQ_BIN_7 +228 0x0B0C //RX_FDEQ_BIN_8 +229 0x0D0E //RX_FDEQ_BIN_9 +230 0x1214 //RX_FDEQ_BIN_10 +231 0x1E1E //RX_FDEQ_BIN_11 +232 0x1E1E //RX_FDEQ_BIN_12 +233 0x1E1E //RX_FDEQ_BIN_13 +234 0x1E1E //RX_FDEQ_BIN_14 +235 0x202C //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x4000 //RX_FDEQ_RESRV_0 +245 0x0320 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0030 //RX_FDDRC_BAND_MARGIN_1 +248 0x0050 //RX_FDDRC_BAND_MARGIN_2 +249 0x0080 //RX_FDDRC_BAND_MARGIN_3 +250 0x0007 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x5000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x6400 //RX_FDDRC_THRD_3_2 +258 0x6400 //RX_FDDRC_THRD_3_3 +259 0x2000 //RX_FDDRC_SLANT_0_0 +260 0x2000 //RX_FDDRC_SLANT_0_1 +261 0x2000 //RX_FDDRC_SLANT_0_2 +262 0x2000 //RX_FDDRC_SLANT_0_3 +263 0x5333 //RX_FDDRC_SLANT_1_0 +264 0x5333 //RX_FDDRC_SLANT_1_1 +265 0x5333 //RX_FDDRC_SLANT_1_2 +266 0x5333 //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +286 0x0100 //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 +#VOL 1 +163 0x1000 //RX_TDDRC_ALPHA_UP_1 +164 0x1000 //RX_TDDRC_ALPHA_UP_2 +165 0x1000 //RX_TDDRC_ALPHA_UP_3 +166 0x1000 //RX_TDDRC_ALPHA_UP_4 +184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +190 0x7000 //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +269 0x0000 //RX_TDDRC_THRD_0 +270 0x0000 //RX_TDDRC_THRD_1 +271 0x1800 //RX_TDDRC_THRD_2 +272 0x1800 //RX_TDDRC_THRD_3 +273 0x3000 //RX_TDDRC_SLANT_0 +274 0x6E00 //RX_TDDRC_SLANT_1 +275 0x1000 //RX_TDDRC_ALPHA_UP_0 +276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x199A //RX_TDDRC_HMNC_GAIN +279 0x0001 //RX_TDDRC_SMT_FLAG +280 0x0CCD //RX_TDDRC_SMT_W +281 0x01E0 //RX_TDDRC_DRC_GAIN +195 0x0030 //RX_FDEQ_SUBNUM +196 0x4848 //RX_FDEQ_GAIN_0 +197 0x4848 //RX_FDEQ_GAIN_1 +198 0x4844 //RX_FDEQ_GAIN_2 +199 0x4B4D //RX_FDEQ_GAIN_3 +200 0x4E50 //RX_FDEQ_GAIN_4 +201 0x5254 //RX_FDEQ_GAIN_5 +202 0x5658 //RX_FDEQ_GAIN_6 +203 0x5C60 //RX_FDEQ_GAIN_7 +204 0x6468 //RX_FDEQ_GAIN_8 +205 0x6C70 //RX_FDEQ_GAIN_9 +206 0x7474 //RX_FDEQ_GAIN_10 +207 0x7474 //RX_FDEQ_GAIN_11 +208 0x7474 //RX_FDEQ_GAIN_12 +209 0x7474 //RX_FDEQ_GAIN_13 +210 0x7474 //RX_FDEQ_GAIN_14 +211 0x7474 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0202 //RX_FDEQ_BIN_0 +221 0x0203 //RX_FDEQ_BIN_1 +222 0x0402 //RX_FDEQ_BIN_2 +223 0x0304 //RX_FDEQ_BIN_3 +224 0x0405 //RX_FDEQ_BIN_4 +225 0x0506 //RX_FDEQ_BIN_5 +226 0x0708 //RX_FDEQ_BIN_6 +227 0x090A //RX_FDEQ_BIN_7 +228 0x0B0C //RX_FDEQ_BIN_8 +229 0x0D0E //RX_FDEQ_BIN_9 +230 0x1214 //RX_FDEQ_BIN_10 +231 0x1E1E //RX_FDEQ_BIN_11 +232 0x1E1E //RX_FDEQ_BIN_12 +233 0x1E1E //RX_FDEQ_BIN_13 +234 0x1E1E //RX_FDEQ_BIN_14 +235 0x202C //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x4000 //RX_FDEQ_RESRV_0 +245 0x0320 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0030 //RX_FDDRC_BAND_MARGIN_1 +248 0x0050 //RX_FDDRC_BAND_MARGIN_2 +249 0x0080 //RX_FDDRC_BAND_MARGIN_3 +250 0x0007 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x5000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x6400 //RX_FDDRC_THRD_3_2 +258 0x6400 //RX_FDDRC_THRD_3_3 +259 0x2000 //RX_FDDRC_SLANT_0_0 +260 0x2000 //RX_FDDRC_SLANT_0_1 +261 0x2000 //RX_FDDRC_SLANT_0_2 +262 0x2000 //RX_FDDRC_SLANT_0_3 +263 0x5333 //RX_FDDRC_SLANT_1_0 +264 0x5333 //RX_FDDRC_SLANT_1_1 +265 0x5333 //RX_FDDRC_SLANT_1_2 +266 0x5333 //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +286 0x0100 //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 +#VOL 2 +163 0x1000 //RX_TDDRC_ALPHA_UP_1 +164 0x1000 //RX_TDDRC_ALPHA_UP_2 +165 0x1000 //RX_TDDRC_ALPHA_UP_3 +166 0x1000 //RX_TDDRC_ALPHA_UP_4 +184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +190 0x7000 //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +269 0x0000 //RX_TDDRC_THRD_0 +270 0x0000 //RX_TDDRC_THRD_1 +271 0x1800 //RX_TDDRC_THRD_2 +272 0x1800 //RX_TDDRC_THRD_3 +273 0x3000 //RX_TDDRC_SLANT_0 +274 0x6E00 //RX_TDDRC_SLANT_1 +275 0x1000 //RX_TDDRC_ALPHA_UP_0 +276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x199A //RX_TDDRC_HMNC_GAIN +279 0x0001 //RX_TDDRC_SMT_FLAG +280 0x0CCD //RX_TDDRC_SMT_W +281 0x01E0 //RX_TDDRC_DRC_GAIN +195 0x0030 //RX_FDEQ_SUBNUM +196 0x4848 //RX_FDEQ_GAIN_0 +197 0x4848 //RX_FDEQ_GAIN_1 +198 0x4844 //RX_FDEQ_GAIN_2 +199 0x4B4D //RX_FDEQ_GAIN_3 +200 0x4E50 //RX_FDEQ_GAIN_4 +201 0x5254 //RX_FDEQ_GAIN_5 +202 0x5658 //RX_FDEQ_GAIN_6 +203 0x5C60 //RX_FDEQ_GAIN_7 +204 0x6468 //RX_FDEQ_GAIN_8 +205 0x6C70 //RX_FDEQ_GAIN_9 +206 0x7474 //RX_FDEQ_GAIN_10 +207 0x7474 //RX_FDEQ_GAIN_11 +208 0x7474 //RX_FDEQ_GAIN_12 +209 0x7474 //RX_FDEQ_GAIN_13 +210 0x7474 //RX_FDEQ_GAIN_14 +211 0x7474 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0202 //RX_FDEQ_BIN_0 +221 0x0203 //RX_FDEQ_BIN_1 +222 0x0402 //RX_FDEQ_BIN_2 +223 0x0304 //RX_FDEQ_BIN_3 +224 0x0405 //RX_FDEQ_BIN_4 +225 0x0506 //RX_FDEQ_BIN_5 +226 0x0708 //RX_FDEQ_BIN_6 +227 0x090A //RX_FDEQ_BIN_7 +228 0x0B0C //RX_FDEQ_BIN_8 +229 0x0D0E //RX_FDEQ_BIN_9 +230 0x1214 //RX_FDEQ_BIN_10 +231 0x1E1E //RX_FDEQ_BIN_11 +232 0x1E1E //RX_FDEQ_BIN_12 +233 0x1E1E //RX_FDEQ_BIN_13 +234 0x1E1E //RX_FDEQ_BIN_14 +235 0x202C //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x4000 //RX_FDEQ_RESRV_0 +245 0x0320 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0030 //RX_FDDRC_BAND_MARGIN_1 +248 0x0050 //RX_FDDRC_BAND_MARGIN_2 +249 0x0080 //RX_FDDRC_BAND_MARGIN_3 +250 0x0007 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x5000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x6400 //RX_FDDRC_THRD_3_2 +258 0x6400 //RX_FDDRC_THRD_3_3 +259 0x2000 //RX_FDDRC_SLANT_0_0 +260 0x2000 //RX_FDDRC_SLANT_0_1 +261 0x2000 //RX_FDDRC_SLANT_0_2 +262 0x2000 //RX_FDDRC_SLANT_0_3 +263 0x5333 //RX_FDDRC_SLANT_1_0 +264 0x5333 //RX_FDDRC_SLANT_1_1 +265 0x5333 //RX_FDDRC_SLANT_1_2 +266 0x5333 //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +286 0x0100 //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 +#VOL 3 +163 0x1000 //RX_TDDRC_ALPHA_UP_1 +164 0x1000 //RX_TDDRC_ALPHA_UP_2 +165 0x1000 //RX_TDDRC_ALPHA_UP_3 +166 0x1000 //RX_TDDRC_ALPHA_UP_4 +184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +190 0x7000 //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +269 0x0000 //RX_TDDRC_THRD_0 +270 0x0000 //RX_TDDRC_THRD_1 +271 0x1800 //RX_TDDRC_THRD_2 +272 0x1800 //RX_TDDRC_THRD_3 +273 0x3000 //RX_TDDRC_SLANT_0 +274 0x6E00 //RX_TDDRC_SLANT_1 +275 0x1000 //RX_TDDRC_ALPHA_UP_0 +276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x199A //RX_TDDRC_HMNC_GAIN +279 0x0001 //RX_TDDRC_SMT_FLAG +280 0x0CCD //RX_TDDRC_SMT_W +281 0x01E0 //RX_TDDRC_DRC_GAIN +195 0x0030 //RX_FDEQ_SUBNUM +196 0x4848 //RX_FDEQ_GAIN_0 +197 0x4848 //RX_FDEQ_GAIN_1 +198 0x4844 //RX_FDEQ_GAIN_2 +199 0x4B4D //RX_FDEQ_GAIN_3 +200 0x4E50 //RX_FDEQ_GAIN_4 +201 0x5254 //RX_FDEQ_GAIN_5 +202 0x5658 //RX_FDEQ_GAIN_6 +203 0x5C60 //RX_FDEQ_GAIN_7 +204 0x6468 //RX_FDEQ_GAIN_8 +205 0x6C70 //RX_FDEQ_GAIN_9 +206 0x7474 //RX_FDEQ_GAIN_10 +207 0x7474 //RX_FDEQ_GAIN_11 +208 0x7474 //RX_FDEQ_GAIN_12 +209 0x7474 //RX_FDEQ_GAIN_13 +210 0x7474 //RX_FDEQ_GAIN_14 +211 0x7474 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0202 //RX_FDEQ_BIN_0 +221 0x0203 //RX_FDEQ_BIN_1 +222 0x0402 //RX_FDEQ_BIN_2 +223 0x0304 //RX_FDEQ_BIN_3 +224 0x0405 //RX_FDEQ_BIN_4 +225 0x0506 //RX_FDEQ_BIN_5 +226 0x0708 //RX_FDEQ_BIN_6 +227 0x090A //RX_FDEQ_BIN_7 +228 0x0B0C //RX_FDEQ_BIN_8 +229 0x0D0E //RX_FDEQ_BIN_9 +230 0x1214 //RX_FDEQ_BIN_10 +231 0x1E1E //RX_FDEQ_BIN_11 +232 0x1E1E //RX_FDEQ_BIN_12 +233 0x1E1E //RX_FDEQ_BIN_13 +234 0x1E1E //RX_FDEQ_BIN_14 +235 0x202C //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x4000 //RX_FDEQ_RESRV_0 +245 0x0320 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0030 //RX_FDDRC_BAND_MARGIN_1 +248 0x0050 //RX_FDDRC_BAND_MARGIN_2 +249 0x0080 //RX_FDDRC_BAND_MARGIN_3 +250 0x0007 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x5000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x6400 //RX_FDDRC_THRD_3_2 +258 0x6400 //RX_FDDRC_THRD_3_3 +259 0x2000 //RX_FDDRC_SLANT_0_0 +260 0x2000 //RX_FDDRC_SLANT_0_1 +261 0x2000 //RX_FDDRC_SLANT_0_2 +262 0x2000 //RX_FDDRC_SLANT_0_3 +263 0x5333 //RX_FDDRC_SLANT_1_0 +264 0x5333 //RX_FDDRC_SLANT_1_1 +265 0x5333 //RX_FDDRC_SLANT_1_2 +266 0x5333 //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +286 0x0100 //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 +#VOL 4 +163 0x1000 //RX_TDDRC_ALPHA_UP_1 +164 0x1000 //RX_TDDRC_ALPHA_UP_2 +165 0x1000 //RX_TDDRC_ALPHA_UP_3 +166 0x1000 //RX_TDDRC_ALPHA_UP_4 +184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +190 0x7000 //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +269 0x0000 //RX_TDDRC_THRD_0 +270 0x0000 //RX_TDDRC_THRD_1 +271 0x1800 //RX_TDDRC_THRD_2 +272 0x1800 //RX_TDDRC_THRD_3 +273 0x3000 //RX_TDDRC_SLANT_0 +274 0x6E00 //RX_TDDRC_SLANT_1 +275 0x1000 //RX_TDDRC_ALPHA_UP_0 +276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x199A //RX_TDDRC_HMNC_GAIN +279 0x0001 //RX_TDDRC_SMT_FLAG +280 0x0CCD //RX_TDDRC_SMT_W +281 0x01E0 //RX_TDDRC_DRC_GAIN +195 0x0030 //RX_FDEQ_SUBNUM +196 0x4848 //RX_FDEQ_GAIN_0 +197 0x4848 //RX_FDEQ_GAIN_1 +198 0x4844 //RX_FDEQ_GAIN_2 +199 0x4B4D //RX_FDEQ_GAIN_3 +200 0x4E50 //RX_FDEQ_GAIN_4 +201 0x5254 //RX_FDEQ_GAIN_5 +202 0x5658 //RX_FDEQ_GAIN_6 +203 0x5C60 //RX_FDEQ_GAIN_7 +204 0x6468 //RX_FDEQ_GAIN_8 +205 0x6C70 //RX_FDEQ_GAIN_9 +206 0x7474 //RX_FDEQ_GAIN_10 +207 0x7474 //RX_FDEQ_GAIN_11 +208 0x7474 //RX_FDEQ_GAIN_12 +209 0x7474 //RX_FDEQ_GAIN_13 +210 0x7474 //RX_FDEQ_GAIN_14 +211 0x7474 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0202 //RX_FDEQ_BIN_0 +221 0x0203 //RX_FDEQ_BIN_1 +222 0x0402 //RX_FDEQ_BIN_2 +223 0x0304 //RX_FDEQ_BIN_3 +224 0x0405 //RX_FDEQ_BIN_4 +225 0x0506 //RX_FDEQ_BIN_5 +226 0x0708 //RX_FDEQ_BIN_6 +227 0x090A //RX_FDEQ_BIN_7 +228 0x0B0C //RX_FDEQ_BIN_8 +229 0x0D0E //RX_FDEQ_BIN_9 +230 0x1214 //RX_FDEQ_BIN_10 +231 0x1E1E //RX_FDEQ_BIN_11 +232 0x1E1E //RX_FDEQ_BIN_12 +233 0x1E1E //RX_FDEQ_BIN_13 +234 0x1E1E //RX_FDEQ_BIN_14 +235 0x202C //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x4000 //RX_FDEQ_RESRV_0 +245 0x0320 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0030 //RX_FDDRC_BAND_MARGIN_1 +248 0x0050 //RX_FDDRC_BAND_MARGIN_2 +249 0x0080 //RX_FDDRC_BAND_MARGIN_3 +250 0x0007 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x5000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x6400 //RX_FDDRC_THRD_3_2 +258 0x6400 //RX_FDDRC_THRD_3_3 +259 0x2000 //RX_FDDRC_SLANT_0_0 +260 0x2000 //RX_FDDRC_SLANT_0_1 +261 0x2000 //RX_FDDRC_SLANT_0_2 +262 0x2000 //RX_FDDRC_SLANT_0_3 +263 0x5333 //RX_FDDRC_SLANT_1_0 +264 0x5333 //RX_FDDRC_SLANT_1_1 +265 0x5333 //RX_FDDRC_SLANT_1_2 +266 0x5333 //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +286 0x0100 //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 +#VOL 5 +163 0x1000 //RX_TDDRC_ALPHA_UP_1 +164 0x1000 //RX_TDDRC_ALPHA_UP_2 +165 0x1000 //RX_TDDRC_ALPHA_UP_3 +166 0x1000 //RX_TDDRC_ALPHA_UP_4 +184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +190 0x7000 //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +269 0x0000 //RX_TDDRC_THRD_0 +270 0x0000 //RX_TDDRC_THRD_1 +271 0x1800 //RX_TDDRC_THRD_2 +272 0x1800 //RX_TDDRC_THRD_3 +273 0x3000 //RX_TDDRC_SLANT_0 +274 0x6E00 //RX_TDDRC_SLANT_1 +275 0x1000 //RX_TDDRC_ALPHA_UP_0 +276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x199A //RX_TDDRC_HMNC_GAIN +279 0x0001 //RX_TDDRC_SMT_FLAG +280 0x0CCD //RX_TDDRC_SMT_W +281 0x01E0 //RX_TDDRC_DRC_GAIN +195 0x0030 //RX_FDEQ_SUBNUM +196 0x4848 //RX_FDEQ_GAIN_0 +197 0x4848 //RX_FDEQ_GAIN_1 +198 0x4844 //RX_FDEQ_GAIN_2 +199 0x4B4D //RX_FDEQ_GAIN_3 +200 0x4E50 //RX_FDEQ_GAIN_4 +201 0x5254 //RX_FDEQ_GAIN_5 +202 0x5658 //RX_FDEQ_GAIN_6 +203 0x5C60 //RX_FDEQ_GAIN_7 +204 0x6468 //RX_FDEQ_GAIN_8 +205 0x6C70 //RX_FDEQ_GAIN_9 +206 0x7474 //RX_FDEQ_GAIN_10 +207 0x7474 //RX_FDEQ_GAIN_11 +208 0x7474 //RX_FDEQ_GAIN_12 +209 0x7474 //RX_FDEQ_GAIN_13 +210 0x7474 //RX_FDEQ_GAIN_14 +211 0x7474 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0202 //RX_FDEQ_BIN_0 +221 0x0203 //RX_FDEQ_BIN_1 +222 0x0402 //RX_FDEQ_BIN_2 +223 0x0304 //RX_FDEQ_BIN_3 +224 0x0405 //RX_FDEQ_BIN_4 +225 0x0506 //RX_FDEQ_BIN_5 +226 0x0708 //RX_FDEQ_BIN_6 +227 0x090A //RX_FDEQ_BIN_7 +228 0x0B0C //RX_FDEQ_BIN_8 +229 0x0D0E //RX_FDEQ_BIN_9 +230 0x1214 //RX_FDEQ_BIN_10 +231 0x1E1E //RX_FDEQ_BIN_11 +232 0x1E1E //RX_FDEQ_BIN_12 +233 0x1E1E //RX_FDEQ_BIN_13 +234 0x1E1E //RX_FDEQ_BIN_14 +235 0x202C //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x4000 //RX_FDEQ_RESRV_0 +245 0x0320 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0030 //RX_FDDRC_BAND_MARGIN_1 +248 0x0050 //RX_FDDRC_BAND_MARGIN_2 +249 0x0080 //RX_FDDRC_BAND_MARGIN_3 +250 0x0007 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x5000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x6400 //RX_FDDRC_THRD_3_2 +258 0x6400 //RX_FDDRC_THRD_3_3 +259 0x2000 //RX_FDDRC_SLANT_0_0 +260 0x2000 //RX_FDDRC_SLANT_0_1 +261 0x2000 //RX_FDDRC_SLANT_0_2 +262 0x2000 //RX_FDDRC_SLANT_0_3 +263 0x5333 //RX_FDDRC_SLANT_1_0 +264 0x5333 //RX_FDDRC_SLANT_1_1 +265 0x5333 //RX_FDDRC_SLANT_1_2 +266 0x5333 //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +286 0x0100 //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 +#VOL 6 +163 0x1000 //RX_TDDRC_ALPHA_UP_1 +164 0x1000 //RX_TDDRC_ALPHA_UP_2 +165 0x1000 //RX_TDDRC_ALPHA_UP_3 +166 0x1000 //RX_TDDRC_ALPHA_UP_4 +184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +190 0x7000 //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +269 0x0000 //RX_TDDRC_THRD_0 +270 0x0000 //RX_TDDRC_THRD_1 +271 0x1800 //RX_TDDRC_THRD_2 +272 0x1800 //RX_TDDRC_THRD_3 +273 0x3000 //RX_TDDRC_SLANT_0 +274 0x6E00 //RX_TDDRC_SLANT_1 +275 0x1000 //RX_TDDRC_ALPHA_UP_0 +276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x199A //RX_TDDRC_HMNC_GAIN +279 0x0001 //RX_TDDRC_SMT_FLAG +280 0x0CCD //RX_TDDRC_SMT_W +281 0x01E0 //RX_TDDRC_DRC_GAIN +195 0x0030 //RX_FDEQ_SUBNUM +196 0x4848 //RX_FDEQ_GAIN_0 +197 0x4848 //RX_FDEQ_GAIN_1 +198 0x4844 //RX_FDEQ_GAIN_2 +199 0x4B4D //RX_FDEQ_GAIN_3 +200 0x4E50 //RX_FDEQ_GAIN_4 +201 0x5254 //RX_FDEQ_GAIN_5 +202 0x5658 //RX_FDEQ_GAIN_6 +203 0x5C60 //RX_FDEQ_GAIN_7 +204 0x6468 //RX_FDEQ_GAIN_8 +205 0x6C70 //RX_FDEQ_GAIN_9 +206 0x7474 //RX_FDEQ_GAIN_10 +207 0x7474 //RX_FDEQ_GAIN_11 +208 0x7474 //RX_FDEQ_GAIN_12 +209 0x7474 //RX_FDEQ_GAIN_13 +210 0x7474 //RX_FDEQ_GAIN_14 +211 0x7474 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0202 //RX_FDEQ_BIN_0 +221 0x0203 //RX_FDEQ_BIN_1 +222 0x0402 //RX_FDEQ_BIN_2 +223 0x0304 //RX_FDEQ_BIN_3 +224 0x0405 //RX_FDEQ_BIN_4 +225 0x0506 //RX_FDEQ_BIN_5 +226 0x0708 //RX_FDEQ_BIN_6 +227 0x090A //RX_FDEQ_BIN_7 +228 0x0B0C //RX_FDEQ_BIN_8 +229 0x0D0E //RX_FDEQ_BIN_9 +230 0x1214 //RX_FDEQ_BIN_10 +231 0x1E1E //RX_FDEQ_BIN_11 +232 0x1E1E //RX_FDEQ_BIN_12 +233 0x1E1E //RX_FDEQ_BIN_13 +234 0x1E1E //RX_FDEQ_BIN_14 +235 0x202C //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x4000 //RX_FDEQ_RESRV_0 +245 0x0320 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0030 //RX_FDDRC_BAND_MARGIN_1 +248 0x0050 //RX_FDDRC_BAND_MARGIN_2 +249 0x0080 //RX_FDDRC_BAND_MARGIN_3 +250 0x0007 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x5000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x6400 //RX_FDDRC_THRD_3_2 +258 0x6400 //RX_FDDRC_THRD_3_3 +259 0x2000 //RX_FDDRC_SLANT_0_0 +260 0x2000 //RX_FDDRC_SLANT_0_1 +261 0x2000 //RX_FDDRC_SLANT_0_2 +262 0x2000 //RX_FDDRC_SLANT_0_3 +263 0x5333 //RX_FDDRC_SLANT_1_0 +264 0x5333 //RX_FDDRC_SLANT_1_1 +265 0x5333 //RX_FDDRC_SLANT_1_2 +266 0x5333 //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +286 0x0100 //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 #CASE_NAME HANDSET-HANDSET_HAC-VOICE_GENERIC-FB -#PARAM_TYPE TX+RX -#TOTAL_CUSTOM_STEP 7 +#PARAM_MODE Full +#PARAM_TYPE TX+2RX +#TOTAL_CUSTOM_STEP 7+7 #TX 0 0x0000 //TX_OPERATION_MODE_0 1 0x0000 //TX_OPERATION_MODE_1 @@ -17558,7 +26729,7 @@ 18 0x0000 //TX_SYS_RESRV_2 19 0x0000 //TX_SYS_RESRV_3 20 0x0000 //TX_DIST2REF0 -21 0x009D //TX_DIST2REF1 +21 0x009C //TX_DIST2REF1 22 0x0000 //TX_DIST2REF_02 23 0x0000 //TX_DIST2REF_03 24 0x0000 //TX_DIST2REF_04 @@ -17788,12 +26959,12 @@ 248 0xF800 //TX_THR_SN_EST_6 249 0xF700 //TX_THR_SN_EST_7 250 0x0000 //TX_DELTA_THR_SN_EST_0 -251 0x0100 //TX_DELTA_THR_SN_EST_1 +251 0x0200 //TX_DELTA_THR_SN_EST_1 252 0x0200 //TX_DELTA_THR_SN_EST_2 253 0x0200 //TX_DELTA_THR_SN_EST_3 -254 0x0200 //TX_DELTA_THR_SN_EST_4 -255 0x0100 //TX_DELTA_THR_SN_EST_5 -256 0x0200 //TX_DELTA_THR_SN_EST_6 +254 0x0100 //TX_DELTA_THR_SN_EST_4 +255 0x0200 //TX_DELTA_THR_SN_EST_5 +256 0x0100 //TX_DELTA_THR_SN_EST_6 257 0x0200 //TX_DELTA_THR_SN_EST_7 258 0x4000 //TX_LAMBDA_NN_EST_0 259 0x4000 //TX_LAMBDA_NN_EST_1 @@ -17821,16 +26992,16 @@ 281 0x0014 //TX_NS_LVL_CTRL_0 282 0x0016 //TX_NS_LVL_CTRL_1 283 0x0016 //TX_NS_LVL_CTRL_2 -284 0x0016 //TX_NS_LVL_CTRL_3 -285 0x0018 //TX_NS_LVL_CTRL_4 -286 0x0016 //TX_NS_LVL_CTRL_5 -287 0x0012 //TX_NS_LVL_CTRL_6 +284 0x0018 //TX_NS_LVL_CTRL_3 +285 0x0016 //TX_NS_LVL_CTRL_4 +286 0x0012 //TX_NS_LVL_CTRL_5 +287 0x0016 //TX_NS_LVL_CTRL_6 288 0x0017 //TX_NS_LVL_CTRL_7 289 0x000E //TX_MIN_GAIN_S_0 -290 0x0012 //TX_MIN_GAIN_S_1 -291 0x0007 //TX_MIN_GAIN_S_2 -292 0x0012 //TX_MIN_GAIN_S_3 -293 0x0010 //TX_MIN_GAIN_S_4 +290 0x0007 //TX_MIN_GAIN_S_1 +291 0x0012 //TX_MIN_GAIN_S_2 +292 0x0010 //TX_MIN_GAIN_S_3 +293 0x0012 //TX_MIN_GAIN_S_4 294 0x0012 //TX_MIN_GAIN_S_5 295 0x0012 //TX_MIN_GAIN_S_6 296 0x0012 //TX_MIN_GAIN_S_7 @@ -17852,29 +27023,29 @@ 312 0x7FFF //TX_A_POST_FILT_0 313 0x2000 //TX_A_POST_FILT_1 314 0x4000 //TX_A_POST_FILT_S_0 -315 0x5000 //TX_A_POST_FILT_S_1 +315 0x4000 //TX_A_POST_FILT_S_1 316 0x4000 //TX_A_POST_FILT_S_2 317 0x4000 //TX_A_POST_FILT_S_3 318 0x4000 //TX_A_POST_FILT_S_4 319 0x4000 //TX_A_POST_FILT_S_5 -320 0x4000 //TX_A_POST_FILT_S_6 +320 0x5000 //TX_A_POST_FILT_S_6 321 0x7000 //TX_A_POST_FILT_S_7 322 0x1000 //TX_B_POST_FILT_0 323 0x2000 //TX_B_POST_FILT_1 -324 0x3000 //TX_B_POST_FILT_2 +324 0x2000 //TX_B_POST_FILT_2 325 0x2000 //TX_B_POST_FILT_3 -326 0x5000 //TX_B_POST_FILT_4 +326 0x2000 //TX_B_POST_FILT_4 327 0x2000 //TX_B_POST_FILT_5 -328 0x6000 //TX_B_POST_FILT_6 +328 0x3000 //TX_B_POST_FILT_6 329 0x3000 //TX_B_POST_FILT_7 330 0x1000 //TX_B_LESSCUT_RTO_S_0 -331 0x6000 //TX_B_LESSCUT_RTO_S_1 -332 0x6000 //TX_B_LESSCUT_RTO_S_2 -333 0x6000 //TX_B_LESSCUT_RTO_S_3 -334 0x6000 //TX_B_LESSCUT_RTO_S_4 -335 0x6000 //TX_B_LESSCUT_RTO_S_5 -336 0x7FFF //TX_B_LESSCUT_RTO_S_6 -337 0x7FFF //TX_B_LESSCUT_RTO_S_7 +331 0x1000 //TX_B_LESSCUT_RTO_S_1 +332 0x1000 //TX_B_LESSCUT_RTO_S_2 +333 0x1000 //TX_B_LESSCUT_RTO_S_3 +334 0x1000 //TX_B_LESSCUT_RTO_S_4 +335 0x1000 //TX_B_LESSCUT_RTO_S_5 +336 0x1000 //TX_B_LESSCUT_RTO_S_6 +337 0x1000 //TX_B_LESSCUT_RTO_S_7 338 0x7E14 //TX_LAMBDA_PFILT 339 0x7C29 //TX_LAMBDA_PFILT_S_0 340 0x7C29 //TX_LAMBDA_PFILT_S_1 @@ -17917,10 +27088,10 @@ 377 0x4E20 //TX_NOISE_TH_5_4 378 0x39DF //TX_NOISE_TH_6 379 0x0014 //TX_MINENOISE_TH -380 0x4000 //TX_MINENOISE_MIC0_TH_MTS -381 0xFFEE //TX_MINENOISE_MIC0_TH_EXP -382 0x6000 //TX_MINENOISE_MIC0_S_TH_MTS -383 0xFFF3 //TX_MINENOISE_MIC0_S_TH_EXP +380 0xD508 //TX_MORENS_TFMASK_TH +381 0x0001 //TX_DRC_QUIET_FLOOR +382 0x6D60 //TX_RATIODTL_CUT_TH +383 0x1482 //TX_DT_CUT_K1 384 0x00A5 //TX_OUT_ENER_S_TH_CLEAN 385 0x00A5 //TX_OUT_ENER_S_TH_LESSCLEAN 386 0x00A5 //TX_OUT_ENER_S_TH_NOISY @@ -17928,15 +27099,15 @@ 388 0x0200 //TX_OUT_ENER_TH_SPEECH 389 0x2000 //TX_SN_NPB_GAIN 390 0x0000 //TX_NN_NPB_GAIN -391 0x0000 //TX_CSX_ALPHA_0 -392 0x0000 //TX_CSX_ALPHA_1 -393 0x0000 //TX_CSX_ALPHA_2 -394 0x0000 //TX_CSX_ALPHA_3 -395 0x0800 //TX_MU_ARSP_EST -396 0x00C8 //TX_P_OUTBEAM_MIN_TH +391 0x3000 //TX_POST_MASK_SUP_HSNE +392 0x07D0 //TX_TAIL_DET_TH +393 0x4000 //TX_B_LESSCUT_RTO_WTA +394 0x0000 //TX_MEL_G_R +395 0x0080 //TX_SUPHIGH_TH +396 0x0000 //TX_MASK_G_R 397 0x0002 //TX_EXTRA_NS_L -398 0x0800 //TX_EXTRA_NS_A -399 0x0005 //TX_VR_NOISE_FLOOR_TH +398 0x1800 //TX_C_POST_FLT_MASK +399 0x7FFF //TX_A_POST_FLT_WNS 400 0x0148 //TX_MIN_G_LOW300HZ 401 0x0004 //TX_MAXLEVEL_CNG 402 0x00B4 //TX_STN_NOISE_TH @@ -18051,16 +27222,16 @@ 511 0x6666 //TX_MIC_TO_BFGAIN 512 0x0000 //TX_MICTOBFGAIN0 513 0x0000 //TX_FASTMUE_TH -514 0x0000 //TX_DERVB_LEN_0 -515 0x0000 //TX_DERVB_LEN_1 -516 0x0000 //TX_RHO_DERVB -517 0x0000 //TX_MIC_INDX_DERVB -518 0x0000 //TX_MU_DERVB -519 0x0000 //TX_DR_RESRV_0 -520 0x0000 //TX_DR_RESRV_1 -521 0x0000 //TX_DR_RESRV_2 -522 0x0000 //TX_DR_RESRV_3 -523 0x0000 //TX_DR_RESRV_4 +514 0x2CCC //TX_DEREVERB_LF_MU +515 0x3200 //TX_DEREVERB_HF_MU +516 0x0007 //TX_DEREVERB_DELAY +517 0x0004 //TX_DEREVERB_COEF_LEN +518 0x0003 //TX_DEREVERB_DNR +519 0x0000 //TX_DEREVERB_ALPHA +520 0x0000 //TX_DEREVERB_BETA +521 0x7FFF //TX_GSC_RTOL_TH +522 0x7FFF //TX_GSC_RTOH_TH +523 0x7E2C //TX_WIDE2_MEANHTH 524 0x0000 //TX_DR_RESRV_5 525 0x0000 //TX_DR_RESRV_6 526 0x0000 //TX_DR_RESRV_7 @@ -18434,6 +27605,71 @@ 894 0xC000 //TX_FASTNS_SSA_THHFL 895 0xCCCC //TX_FASTNS_SSA_THLFH 896 0xD999 //TX_FASTNS_SSA_THHFH +897 0x2339 //TX_SENDFUNC_REG_MICMUTE +898 0x0021 //TX_SENDFUNC_REG_MICMUTE1 +899 0x02BC //TX_MICMUTE_RATIO_THR +900 0x0140 //TX_MICMUTE_AMP_THR +901 0x0004 //TX_MICMUTE_HPF_IND +902 0x00C0 //TX_MICMUTE_LOG_EYR_TH +903 0x0008 //TX_MICMUTE_CVG_TIME +904 0x0008 //TX_MICMUTE_RELEASE_TIME +905 0x01FE //TX_MIC_VOLUME_MIC0MUTE +906 0x0020 //TX_MICMUTE_EPD_OFFSET_0 +907 0x001E //TX_MICMUTE_FRQ_AEC_L +908 0x7999 //TX_MICMUTE_EAD_THR +909 0x7FFF //TX_MICMUTE_LAMBDA_CB_NLE +910 0x7FFF //TX_MICMUTE_LAMBDA_RE_EST +911 0x4000 //TX_DTD_THR1_MICMUTE_0 +912 0x7000 //TX_DTD_THR1_MICMUTE_1 +913 0x7FFF //TX_DTD_THR1_MICMUTE_2 +914 0x7FFF //TX_DTD_THR1_MICMUTE_3 +915 0x6CCC //TX_DTD_THR2_MICMUTE_0 +916 0x0400 //TX_MICMUTE_MIN_EQ_RE_EST_0 +917 0x0400 //TX_MICMUTE_MIN_EQ_RE_EST_1 +918 0x1000 //TX_MICMUTE_MIN_EQ_RE_EST_2 +919 0x7FFF //TX_MICMUTE_MIN_EQ_RE_EST_3 +920 0x7FFF //TX_MICMUTE_MIN_EQ_RE_EST_4 +921 0x4000 //TX_MICMUTE_C_POST_FLT +922 0x03E8 //TX_MICMUTE_DT_CUT_K +923 0x0001 //TX_MICMUTE_DT_CUT_THR +924 0x03E8 //TX_MICMUTE_DT_CUT_K2 +925 0x0001 //TX_MICMUTE_DT_CUT_THR2 +926 0x0064 //TX_MICMUTE_DT2_HOLD_N +927 0x1000 //TX_MICMUTE_RATIODTH_THCUT +928 0x1000 //TX_MICMUTE_B_POST_FLT_ECHOL +929 0x7FFF //TX_MICMUTE_B_POST_FLT_ECHOH +930 0x0400 //TX_MICMUTE_C_POST_FLT_MASK +931 0x7999 //TX_MICMUTE_RATIODTL_CUT_TH +932 0x0258 //TX_MICMUTE_DT_CUT_K1 +933 0x0800 //TX_MICMUTE_N2_SN_EST +934 0xFC00 //TX_MICMUTE_THR_SN_EST_0 +935 0x001C //TX_MICMUTE_MIN_G_CTRL_0 +936 0x6000 //TX_MICMUTE_A_POST_FILT_S_0 +937 0x7000 //TX_MICMUTE_B_POST_FILT_0 +938 0x2710 //TX_MIC1RUB_AMP_THR +939 0x0010 //TX_MIC1MUTE_RATIO_THR +940 0x0450 //TX_MIC1MUTE_AMP_THR +941 0x0008 //TX_MIC1MUTE_CVG_TIME +942 0x0008 //TX_MIC1MUTE_RELEASE_TIME +943 0x0000 //TX_AMS_RESRV_01 +944 0x0000 //TX_AMS_RESRV_02 +945 0x0000 //TX_AMS_RESRV_03 +946 0x0000 //TX_AMS_RESRV_04 +947 0x0000 //TX_AMS_RESRV_05 +948 0x0000 //TX_AMS_RESRV_06 +949 0x0000 //TX_AMS_RESRV_07 +950 0x0000 //TX_AMS_RESRV_08 +951 0x0000 //TX_AMS_RESRV_09 +952 0x0000 //TX_AMS_RESRV_10 +953 0x0000 //TX_AMS_RESRV_11 +954 0x0000 //TX_AMS_RESRV_12 +955 0x0000 //TX_AMS_RESRV_13 +956 0x0000 //TX_AMS_RESRV_14 +957 0x0000 //TX_AMS_RESRV_15 +958 0x0000 //TX_AMS_RESRV_16 +959 0x0000 //TX_AMS_RESRV_17 +960 0x0000 //TX_AMS_RESRV_18 +961 0x0000 //TX_AMS_RESRV_19 #RX 0 0x000C //RX_RECVFUNC_MODE_0 1 0x0000 //RX_RECVFUNC_MODE_1 @@ -19285,14 +28521,866 @@ 110 0x0000 //RX_FDDRC_RESRV_0 129 0x0100 //RX_SPK_VOL 130 0x0000 //RX_VOL_RESRV_0 +#RX 2 +157 0x000C //RX_RECVFUNC_MODE_0 +158 0x0000 //RX_RECVFUNC_MODE_1 +159 0x0004 //RX_SAMPLINGFREQ_SIG +160 0x0004 //RX_SAMPLINGFREQ_PROC +161 0x000A //RX_FRAME_SZ +162 0x0000 //RX_DELAY_OPT +163 0x1000 //RX_TDDRC_ALPHA_UP_1 +164 0x1000 //RX_TDDRC_ALPHA_UP_2 +165 0x1000 //RX_TDDRC_ALPHA_UP_3 +166 0x1000 //RX_TDDRC_ALPHA_UP_4 +167 0x0800 //RX_PGA +168 0x7FFF //RX_A_HP +169 0x4000 //RX_B_PE +170 0x5800 //RX_THR_PITCH_DET_0 +171 0x5000 //RX_THR_PITCH_DET_1 +172 0x4000 //RX_THR_PITCH_DET_2 +173 0x0008 //RX_PITCH_BFR_LEN +174 0x0003 //RX_SBD_PITCH_DET +175 0x0100 //RX_PP_RESRV_0 +176 0x0020 //RX_PP_RESRV_1 +177 0x0600 //RX_N_SN_EST +178 0x000C //RX_N2_SN_EST +179 0x000F //RX_NS_LVL_CTRL +180 0xF800 //RX_THR_SN_EST +181 0x7E00 //RX_LAMBDA_PFILT +182 0x000A //RX_FENS_RESRV_0 +183 0x0190 //RX_FENS_RESRV_1 +184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +187 0x0002 //RX_EXTRA_NS_L +188 0x0800 //RX_EXTRA_NS_A +189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +190 0x7000 //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +192 0x199A //RX_A_POST_FLT +193 0x0000 //RX_LMT_THRD +194 0x4000 //RX_LMT_ALPHA +195 0x0030 //RX_FDEQ_SUBNUM +196 0x4848 //RX_FDEQ_GAIN_0 +197 0x4848 //RX_FDEQ_GAIN_1 +198 0x4844 //RX_FDEQ_GAIN_2 +199 0x4B4D //RX_FDEQ_GAIN_3 +200 0x4E50 //RX_FDEQ_GAIN_4 +201 0x5254 //RX_FDEQ_GAIN_5 +202 0x5658 //RX_FDEQ_GAIN_6 +203 0x5C60 //RX_FDEQ_GAIN_7 +204 0x6468 //RX_FDEQ_GAIN_8 +205 0x6C70 //RX_FDEQ_GAIN_9 +206 0x7474 //RX_FDEQ_GAIN_10 +207 0x7474 //RX_FDEQ_GAIN_11 +208 0x7474 //RX_FDEQ_GAIN_12 +209 0x7474 //RX_FDEQ_GAIN_13 +210 0x7474 //RX_FDEQ_GAIN_14 +211 0x7474 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0202 //RX_FDEQ_BIN_0 +221 0x0203 //RX_FDEQ_BIN_1 +222 0x0402 //RX_FDEQ_BIN_2 +223 0x0304 //RX_FDEQ_BIN_3 +224 0x0405 //RX_FDEQ_BIN_4 +225 0x0506 //RX_FDEQ_BIN_5 +226 0x0708 //RX_FDEQ_BIN_6 +227 0x090A //RX_FDEQ_BIN_7 +228 0x0B0C //RX_FDEQ_BIN_8 +229 0x0D0E //RX_FDEQ_BIN_9 +230 0x1214 //RX_FDEQ_BIN_10 +231 0x1E1E //RX_FDEQ_BIN_11 +232 0x1E1E //RX_FDEQ_BIN_12 +233 0x1E1E //RX_FDEQ_BIN_13 +234 0x1E1E //RX_FDEQ_BIN_14 +235 0x202C //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x4000 //RX_FDEQ_RESRV_0 +245 0x0320 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0030 //RX_FDDRC_BAND_MARGIN_1 +248 0x0050 //RX_FDDRC_BAND_MARGIN_2 +249 0x0080 //RX_FDDRC_BAND_MARGIN_3 +250 0x0007 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x5000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x6400 //RX_FDDRC_THRD_3_2 +258 0x6400 //RX_FDDRC_THRD_3_3 +259 0x2000 //RX_FDDRC_SLANT_0_0 +260 0x2000 //RX_FDDRC_SLANT_0_1 +261 0x2000 //RX_FDDRC_SLANT_0_2 +262 0x2000 //RX_FDDRC_SLANT_0_3 +263 0x5333 //RX_FDDRC_SLANT_1_0 +264 0x5333 //RX_FDDRC_SLANT_1_1 +265 0x5333 //RX_FDDRC_SLANT_1_2 +266 0x5333 //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +268 0x0002 //RX_FILTINDX +269 0x0000 //RX_TDDRC_THRD_0 +270 0x0000 //RX_TDDRC_THRD_1 +271 0x1800 //RX_TDDRC_THRD_2 +272 0x1800 //RX_TDDRC_THRD_3 +273 0x3000 //RX_TDDRC_SLANT_0 +274 0x6E00 //RX_TDDRC_SLANT_1 +275 0x1000 //RX_TDDRC_ALPHA_UP_0 +276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x199A //RX_TDDRC_HMNC_GAIN +279 0x0001 //RX_TDDRC_SMT_FLAG +280 0x0CCD //RX_TDDRC_SMT_W +281 0x01E0 //RX_TDDRC_DRC_GAIN +282 0x7C00 //RX_LAMBDA_PKA_FP +283 0x2000 //RX_TPKA_FP +284 0x2000 //RX_MIN_G_FP +285 0x0080 //RX_MAX_G_FP +286 0x0100 //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 +288 0x0000 //RX_MAXLEVEL_CNG +289 0x3000 //RX_BWE_UV_TH +290 0x3000 //RX_BWE_UV_TH2 +291 0x1800 //RX_BWE_UV_TH3 +292 0x1000 //RX_BWE_V_TH +293 0x04CD //RX_BWE_GAIN1_V_TH1 +294 0x0F33 //RX_BWE_GAIN1_V_TH2 +295 0x7333 //RX_BWE_UV_EQ +296 0x199A //RX_BWE_V_EQ +297 0x7333 //RX_BWE_TONE_TH +298 0x0004 //RX_BWE_UV_HOLD_T +299 0x6CCD //RX_BWE_GAIN2_ALPHA +300 0x799A //RX_BWE_GAIN3_ALPHA +301 0x001E //RX_BWE_CUTOFF +302 0x3000 //RX_BWE_GAINFILL +303 0x3200 //RX_BWE_MAXTH_TONE +304 0x2000 //RX_BWE_EQ_0 +305 0x2000 //RX_BWE_EQ_1 +306 0x2000 //RX_BWE_EQ_2 +307 0x2000 //RX_BWE_EQ_3 +308 0x2000 //RX_BWE_EQ_4 +309 0x2000 //RX_BWE_EQ_5 +310 0x2000 //RX_BWE_EQ_6 +311 0x0000 //RX_BWE_RESRV_0 +312 0x0000 //RX_BWE_RESRV_1 +313 0x0000 //RX_BWE_RESRV_2 +#VOL 0 +163 0x1000 //RX_TDDRC_ALPHA_UP_1 +164 0x1000 //RX_TDDRC_ALPHA_UP_2 +165 0x1000 //RX_TDDRC_ALPHA_UP_3 +166 0x1000 //RX_TDDRC_ALPHA_UP_4 +184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +190 0x7000 //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +269 0x0000 //RX_TDDRC_THRD_0 +270 0x0000 //RX_TDDRC_THRD_1 +271 0x1800 //RX_TDDRC_THRD_2 +272 0x1800 //RX_TDDRC_THRD_3 +273 0x3000 //RX_TDDRC_SLANT_0 +274 0x6E00 //RX_TDDRC_SLANT_1 +275 0x1000 //RX_TDDRC_ALPHA_UP_0 +276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x199A //RX_TDDRC_HMNC_GAIN +279 0x0001 //RX_TDDRC_SMT_FLAG +280 0x0CCD //RX_TDDRC_SMT_W +281 0x01E0 //RX_TDDRC_DRC_GAIN +195 0x0030 //RX_FDEQ_SUBNUM +196 0x4848 //RX_FDEQ_GAIN_0 +197 0x4848 //RX_FDEQ_GAIN_1 +198 0x4844 //RX_FDEQ_GAIN_2 +199 0x4B4D //RX_FDEQ_GAIN_3 +200 0x4E50 //RX_FDEQ_GAIN_4 +201 0x5254 //RX_FDEQ_GAIN_5 +202 0x5658 //RX_FDEQ_GAIN_6 +203 0x5C60 //RX_FDEQ_GAIN_7 +204 0x6468 //RX_FDEQ_GAIN_8 +205 0x6C70 //RX_FDEQ_GAIN_9 +206 0x7474 //RX_FDEQ_GAIN_10 +207 0x7474 //RX_FDEQ_GAIN_11 +208 0x7474 //RX_FDEQ_GAIN_12 +209 0x7474 //RX_FDEQ_GAIN_13 +210 0x7474 //RX_FDEQ_GAIN_14 +211 0x7474 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0202 //RX_FDEQ_BIN_0 +221 0x0203 //RX_FDEQ_BIN_1 +222 0x0402 //RX_FDEQ_BIN_2 +223 0x0304 //RX_FDEQ_BIN_3 +224 0x0405 //RX_FDEQ_BIN_4 +225 0x0506 //RX_FDEQ_BIN_5 +226 0x0708 //RX_FDEQ_BIN_6 +227 0x090A //RX_FDEQ_BIN_7 +228 0x0B0C //RX_FDEQ_BIN_8 +229 0x0D0E //RX_FDEQ_BIN_9 +230 0x1214 //RX_FDEQ_BIN_10 +231 0x1E1E //RX_FDEQ_BIN_11 +232 0x1E1E //RX_FDEQ_BIN_12 +233 0x1E1E //RX_FDEQ_BIN_13 +234 0x1E1E //RX_FDEQ_BIN_14 +235 0x202C //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x4000 //RX_FDEQ_RESRV_0 +245 0x0320 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0030 //RX_FDDRC_BAND_MARGIN_1 +248 0x0050 //RX_FDDRC_BAND_MARGIN_2 +249 0x0080 //RX_FDDRC_BAND_MARGIN_3 +250 0x0007 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x5000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x6400 //RX_FDDRC_THRD_3_2 +258 0x6400 //RX_FDDRC_THRD_3_3 +259 0x2000 //RX_FDDRC_SLANT_0_0 +260 0x2000 //RX_FDDRC_SLANT_0_1 +261 0x2000 //RX_FDDRC_SLANT_0_2 +262 0x2000 //RX_FDDRC_SLANT_0_3 +263 0x5333 //RX_FDDRC_SLANT_1_0 +264 0x5333 //RX_FDDRC_SLANT_1_1 +265 0x5333 //RX_FDDRC_SLANT_1_2 +266 0x5333 //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +286 0x0100 //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 +#VOL 1 +163 0x1000 //RX_TDDRC_ALPHA_UP_1 +164 0x1000 //RX_TDDRC_ALPHA_UP_2 +165 0x1000 //RX_TDDRC_ALPHA_UP_3 +166 0x1000 //RX_TDDRC_ALPHA_UP_4 +184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +190 0x7000 //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +269 0x0000 //RX_TDDRC_THRD_0 +270 0x0000 //RX_TDDRC_THRD_1 +271 0x1800 //RX_TDDRC_THRD_2 +272 0x1800 //RX_TDDRC_THRD_3 +273 0x3000 //RX_TDDRC_SLANT_0 +274 0x6E00 //RX_TDDRC_SLANT_1 +275 0x1000 //RX_TDDRC_ALPHA_UP_0 +276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x199A //RX_TDDRC_HMNC_GAIN +279 0x0001 //RX_TDDRC_SMT_FLAG +280 0x0CCD //RX_TDDRC_SMT_W +281 0x01E0 //RX_TDDRC_DRC_GAIN +195 0x0030 //RX_FDEQ_SUBNUM +196 0x4848 //RX_FDEQ_GAIN_0 +197 0x4848 //RX_FDEQ_GAIN_1 +198 0x4844 //RX_FDEQ_GAIN_2 +199 0x4B4D //RX_FDEQ_GAIN_3 +200 0x4E50 //RX_FDEQ_GAIN_4 +201 0x5254 //RX_FDEQ_GAIN_5 +202 0x5658 //RX_FDEQ_GAIN_6 +203 0x5C60 //RX_FDEQ_GAIN_7 +204 0x6468 //RX_FDEQ_GAIN_8 +205 0x6C70 //RX_FDEQ_GAIN_9 +206 0x7474 //RX_FDEQ_GAIN_10 +207 0x7474 //RX_FDEQ_GAIN_11 +208 0x7474 //RX_FDEQ_GAIN_12 +209 0x7474 //RX_FDEQ_GAIN_13 +210 0x7474 //RX_FDEQ_GAIN_14 +211 0x7474 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0202 //RX_FDEQ_BIN_0 +221 0x0203 //RX_FDEQ_BIN_1 +222 0x0402 //RX_FDEQ_BIN_2 +223 0x0304 //RX_FDEQ_BIN_3 +224 0x0405 //RX_FDEQ_BIN_4 +225 0x0506 //RX_FDEQ_BIN_5 +226 0x0708 //RX_FDEQ_BIN_6 +227 0x090A //RX_FDEQ_BIN_7 +228 0x0B0C //RX_FDEQ_BIN_8 +229 0x0D0E //RX_FDEQ_BIN_9 +230 0x1214 //RX_FDEQ_BIN_10 +231 0x1E1E //RX_FDEQ_BIN_11 +232 0x1E1E //RX_FDEQ_BIN_12 +233 0x1E1E //RX_FDEQ_BIN_13 +234 0x1E1E //RX_FDEQ_BIN_14 +235 0x202C //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x4000 //RX_FDEQ_RESRV_0 +245 0x0320 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0030 //RX_FDDRC_BAND_MARGIN_1 +248 0x0050 //RX_FDDRC_BAND_MARGIN_2 +249 0x0080 //RX_FDDRC_BAND_MARGIN_3 +250 0x0007 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x5000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x6400 //RX_FDDRC_THRD_3_2 +258 0x6400 //RX_FDDRC_THRD_3_3 +259 0x2000 //RX_FDDRC_SLANT_0_0 +260 0x2000 //RX_FDDRC_SLANT_0_1 +261 0x2000 //RX_FDDRC_SLANT_0_2 +262 0x2000 //RX_FDDRC_SLANT_0_3 +263 0x5333 //RX_FDDRC_SLANT_1_0 +264 0x5333 //RX_FDDRC_SLANT_1_1 +265 0x5333 //RX_FDDRC_SLANT_1_2 +266 0x5333 //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +286 0x0100 //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 +#VOL 2 +163 0x1000 //RX_TDDRC_ALPHA_UP_1 +164 0x1000 //RX_TDDRC_ALPHA_UP_2 +165 0x1000 //RX_TDDRC_ALPHA_UP_3 +166 0x1000 //RX_TDDRC_ALPHA_UP_4 +184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +190 0x7000 //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +269 0x0000 //RX_TDDRC_THRD_0 +270 0x0000 //RX_TDDRC_THRD_1 +271 0x1800 //RX_TDDRC_THRD_2 +272 0x1800 //RX_TDDRC_THRD_3 +273 0x3000 //RX_TDDRC_SLANT_0 +274 0x6E00 //RX_TDDRC_SLANT_1 +275 0x1000 //RX_TDDRC_ALPHA_UP_0 +276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x199A //RX_TDDRC_HMNC_GAIN +279 0x0001 //RX_TDDRC_SMT_FLAG +280 0x0CCD //RX_TDDRC_SMT_W +281 0x01E0 //RX_TDDRC_DRC_GAIN +195 0x0030 //RX_FDEQ_SUBNUM +196 0x4848 //RX_FDEQ_GAIN_0 +197 0x4848 //RX_FDEQ_GAIN_1 +198 0x4844 //RX_FDEQ_GAIN_2 +199 0x4B4D //RX_FDEQ_GAIN_3 +200 0x4E50 //RX_FDEQ_GAIN_4 +201 0x5254 //RX_FDEQ_GAIN_5 +202 0x5658 //RX_FDEQ_GAIN_6 +203 0x5C60 //RX_FDEQ_GAIN_7 +204 0x6468 //RX_FDEQ_GAIN_8 +205 0x6C70 //RX_FDEQ_GAIN_9 +206 0x7474 //RX_FDEQ_GAIN_10 +207 0x7474 //RX_FDEQ_GAIN_11 +208 0x7474 //RX_FDEQ_GAIN_12 +209 0x7474 //RX_FDEQ_GAIN_13 +210 0x7474 //RX_FDEQ_GAIN_14 +211 0x7474 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0202 //RX_FDEQ_BIN_0 +221 0x0203 //RX_FDEQ_BIN_1 +222 0x0402 //RX_FDEQ_BIN_2 +223 0x0304 //RX_FDEQ_BIN_3 +224 0x0405 //RX_FDEQ_BIN_4 +225 0x0506 //RX_FDEQ_BIN_5 +226 0x0708 //RX_FDEQ_BIN_6 +227 0x090A //RX_FDEQ_BIN_7 +228 0x0B0C //RX_FDEQ_BIN_8 +229 0x0D0E //RX_FDEQ_BIN_9 +230 0x1214 //RX_FDEQ_BIN_10 +231 0x1E1E //RX_FDEQ_BIN_11 +232 0x1E1E //RX_FDEQ_BIN_12 +233 0x1E1E //RX_FDEQ_BIN_13 +234 0x1E1E //RX_FDEQ_BIN_14 +235 0x202C //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x4000 //RX_FDEQ_RESRV_0 +245 0x0320 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0030 //RX_FDDRC_BAND_MARGIN_1 +248 0x0050 //RX_FDDRC_BAND_MARGIN_2 +249 0x0080 //RX_FDDRC_BAND_MARGIN_3 +250 0x0007 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x5000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x6400 //RX_FDDRC_THRD_3_2 +258 0x6400 //RX_FDDRC_THRD_3_3 +259 0x2000 //RX_FDDRC_SLANT_0_0 +260 0x2000 //RX_FDDRC_SLANT_0_1 +261 0x2000 //RX_FDDRC_SLANT_0_2 +262 0x2000 //RX_FDDRC_SLANT_0_3 +263 0x5333 //RX_FDDRC_SLANT_1_0 +264 0x5333 //RX_FDDRC_SLANT_1_1 +265 0x5333 //RX_FDDRC_SLANT_1_2 +266 0x5333 //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +286 0x0100 //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 +#VOL 3 +163 0x1000 //RX_TDDRC_ALPHA_UP_1 +164 0x1000 //RX_TDDRC_ALPHA_UP_2 +165 0x1000 //RX_TDDRC_ALPHA_UP_3 +166 0x1000 //RX_TDDRC_ALPHA_UP_4 +184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +190 0x7000 //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +269 0x0000 //RX_TDDRC_THRD_0 +270 0x0000 //RX_TDDRC_THRD_1 +271 0x1800 //RX_TDDRC_THRD_2 +272 0x1800 //RX_TDDRC_THRD_3 +273 0x3000 //RX_TDDRC_SLANT_0 +274 0x6E00 //RX_TDDRC_SLANT_1 +275 0x1000 //RX_TDDRC_ALPHA_UP_0 +276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x199A //RX_TDDRC_HMNC_GAIN +279 0x0001 //RX_TDDRC_SMT_FLAG +280 0x0CCD //RX_TDDRC_SMT_W +281 0x01E0 //RX_TDDRC_DRC_GAIN +195 0x0030 //RX_FDEQ_SUBNUM +196 0x4848 //RX_FDEQ_GAIN_0 +197 0x4848 //RX_FDEQ_GAIN_1 +198 0x4844 //RX_FDEQ_GAIN_2 +199 0x4B4D //RX_FDEQ_GAIN_3 +200 0x4E50 //RX_FDEQ_GAIN_4 +201 0x5254 //RX_FDEQ_GAIN_5 +202 0x5658 //RX_FDEQ_GAIN_6 +203 0x5C60 //RX_FDEQ_GAIN_7 +204 0x6468 //RX_FDEQ_GAIN_8 +205 0x6C70 //RX_FDEQ_GAIN_9 +206 0x7474 //RX_FDEQ_GAIN_10 +207 0x7474 //RX_FDEQ_GAIN_11 +208 0x7474 //RX_FDEQ_GAIN_12 +209 0x7474 //RX_FDEQ_GAIN_13 +210 0x7474 //RX_FDEQ_GAIN_14 +211 0x7474 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0202 //RX_FDEQ_BIN_0 +221 0x0203 //RX_FDEQ_BIN_1 +222 0x0402 //RX_FDEQ_BIN_2 +223 0x0304 //RX_FDEQ_BIN_3 +224 0x0405 //RX_FDEQ_BIN_4 +225 0x0506 //RX_FDEQ_BIN_5 +226 0x0708 //RX_FDEQ_BIN_6 +227 0x090A //RX_FDEQ_BIN_7 +228 0x0B0C //RX_FDEQ_BIN_8 +229 0x0D0E //RX_FDEQ_BIN_9 +230 0x1214 //RX_FDEQ_BIN_10 +231 0x1E1E //RX_FDEQ_BIN_11 +232 0x1E1E //RX_FDEQ_BIN_12 +233 0x1E1E //RX_FDEQ_BIN_13 +234 0x1E1E //RX_FDEQ_BIN_14 +235 0x202C //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x4000 //RX_FDEQ_RESRV_0 +245 0x0320 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0030 //RX_FDDRC_BAND_MARGIN_1 +248 0x0050 //RX_FDDRC_BAND_MARGIN_2 +249 0x0080 //RX_FDDRC_BAND_MARGIN_3 +250 0x0007 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x5000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x6400 //RX_FDDRC_THRD_3_2 +258 0x6400 //RX_FDDRC_THRD_3_3 +259 0x2000 //RX_FDDRC_SLANT_0_0 +260 0x2000 //RX_FDDRC_SLANT_0_1 +261 0x2000 //RX_FDDRC_SLANT_0_2 +262 0x2000 //RX_FDDRC_SLANT_0_3 +263 0x5333 //RX_FDDRC_SLANT_1_0 +264 0x5333 //RX_FDDRC_SLANT_1_1 +265 0x5333 //RX_FDDRC_SLANT_1_2 +266 0x5333 //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +286 0x0100 //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 +#VOL 4 +163 0x1000 //RX_TDDRC_ALPHA_UP_1 +164 0x1000 //RX_TDDRC_ALPHA_UP_2 +165 0x1000 //RX_TDDRC_ALPHA_UP_3 +166 0x1000 //RX_TDDRC_ALPHA_UP_4 +184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +190 0x7000 //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +269 0x0000 //RX_TDDRC_THRD_0 +270 0x0000 //RX_TDDRC_THRD_1 +271 0x1800 //RX_TDDRC_THRD_2 +272 0x1800 //RX_TDDRC_THRD_3 +273 0x3000 //RX_TDDRC_SLANT_0 +274 0x6E00 //RX_TDDRC_SLANT_1 +275 0x1000 //RX_TDDRC_ALPHA_UP_0 +276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x199A //RX_TDDRC_HMNC_GAIN +279 0x0001 //RX_TDDRC_SMT_FLAG +280 0x0CCD //RX_TDDRC_SMT_W +281 0x01E0 //RX_TDDRC_DRC_GAIN +195 0x0030 //RX_FDEQ_SUBNUM +196 0x4848 //RX_FDEQ_GAIN_0 +197 0x4848 //RX_FDEQ_GAIN_1 +198 0x4844 //RX_FDEQ_GAIN_2 +199 0x4B4D //RX_FDEQ_GAIN_3 +200 0x4E50 //RX_FDEQ_GAIN_4 +201 0x5254 //RX_FDEQ_GAIN_5 +202 0x5658 //RX_FDEQ_GAIN_6 +203 0x5C60 //RX_FDEQ_GAIN_7 +204 0x6468 //RX_FDEQ_GAIN_8 +205 0x6C70 //RX_FDEQ_GAIN_9 +206 0x7474 //RX_FDEQ_GAIN_10 +207 0x7474 //RX_FDEQ_GAIN_11 +208 0x7474 //RX_FDEQ_GAIN_12 +209 0x7474 //RX_FDEQ_GAIN_13 +210 0x7474 //RX_FDEQ_GAIN_14 +211 0x7474 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0202 //RX_FDEQ_BIN_0 +221 0x0203 //RX_FDEQ_BIN_1 +222 0x0402 //RX_FDEQ_BIN_2 +223 0x0304 //RX_FDEQ_BIN_3 +224 0x0405 //RX_FDEQ_BIN_4 +225 0x0506 //RX_FDEQ_BIN_5 +226 0x0708 //RX_FDEQ_BIN_6 +227 0x090A //RX_FDEQ_BIN_7 +228 0x0B0C //RX_FDEQ_BIN_8 +229 0x0D0E //RX_FDEQ_BIN_9 +230 0x1214 //RX_FDEQ_BIN_10 +231 0x1E1E //RX_FDEQ_BIN_11 +232 0x1E1E //RX_FDEQ_BIN_12 +233 0x1E1E //RX_FDEQ_BIN_13 +234 0x1E1E //RX_FDEQ_BIN_14 +235 0x202C //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x4000 //RX_FDEQ_RESRV_0 +245 0x0320 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0030 //RX_FDDRC_BAND_MARGIN_1 +248 0x0050 //RX_FDDRC_BAND_MARGIN_2 +249 0x0080 //RX_FDDRC_BAND_MARGIN_3 +250 0x0007 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x5000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x6400 //RX_FDDRC_THRD_3_2 +258 0x6400 //RX_FDDRC_THRD_3_3 +259 0x2000 //RX_FDDRC_SLANT_0_0 +260 0x2000 //RX_FDDRC_SLANT_0_1 +261 0x2000 //RX_FDDRC_SLANT_0_2 +262 0x2000 //RX_FDDRC_SLANT_0_3 +263 0x5333 //RX_FDDRC_SLANT_1_0 +264 0x5333 //RX_FDDRC_SLANT_1_1 +265 0x5333 //RX_FDDRC_SLANT_1_2 +266 0x5333 //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +286 0x0100 //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 +#VOL 5 +163 0x1000 //RX_TDDRC_ALPHA_UP_1 +164 0x1000 //RX_TDDRC_ALPHA_UP_2 +165 0x1000 //RX_TDDRC_ALPHA_UP_3 +166 0x1000 //RX_TDDRC_ALPHA_UP_4 +184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +190 0x7000 //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +269 0x0000 //RX_TDDRC_THRD_0 +270 0x0000 //RX_TDDRC_THRD_1 +271 0x1800 //RX_TDDRC_THRD_2 +272 0x1800 //RX_TDDRC_THRD_3 +273 0x3000 //RX_TDDRC_SLANT_0 +274 0x6E00 //RX_TDDRC_SLANT_1 +275 0x1000 //RX_TDDRC_ALPHA_UP_0 +276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x199A //RX_TDDRC_HMNC_GAIN +279 0x0001 //RX_TDDRC_SMT_FLAG +280 0x0CCD //RX_TDDRC_SMT_W +281 0x01E0 //RX_TDDRC_DRC_GAIN +195 0x0030 //RX_FDEQ_SUBNUM +196 0x4848 //RX_FDEQ_GAIN_0 +197 0x4848 //RX_FDEQ_GAIN_1 +198 0x4844 //RX_FDEQ_GAIN_2 +199 0x4B4D //RX_FDEQ_GAIN_3 +200 0x4E50 //RX_FDEQ_GAIN_4 +201 0x5254 //RX_FDEQ_GAIN_5 +202 0x5658 //RX_FDEQ_GAIN_6 +203 0x5C60 //RX_FDEQ_GAIN_7 +204 0x6468 //RX_FDEQ_GAIN_8 +205 0x6C70 //RX_FDEQ_GAIN_9 +206 0x7474 //RX_FDEQ_GAIN_10 +207 0x7474 //RX_FDEQ_GAIN_11 +208 0x7474 //RX_FDEQ_GAIN_12 +209 0x7474 //RX_FDEQ_GAIN_13 +210 0x7474 //RX_FDEQ_GAIN_14 +211 0x7474 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0202 //RX_FDEQ_BIN_0 +221 0x0203 //RX_FDEQ_BIN_1 +222 0x0402 //RX_FDEQ_BIN_2 +223 0x0304 //RX_FDEQ_BIN_3 +224 0x0405 //RX_FDEQ_BIN_4 +225 0x0506 //RX_FDEQ_BIN_5 +226 0x0708 //RX_FDEQ_BIN_6 +227 0x090A //RX_FDEQ_BIN_7 +228 0x0B0C //RX_FDEQ_BIN_8 +229 0x0D0E //RX_FDEQ_BIN_9 +230 0x1214 //RX_FDEQ_BIN_10 +231 0x1E1E //RX_FDEQ_BIN_11 +232 0x1E1E //RX_FDEQ_BIN_12 +233 0x1E1E //RX_FDEQ_BIN_13 +234 0x1E1E //RX_FDEQ_BIN_14 +235 0x202C //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x4000 //RX_FDEQ_RESRV_0 +245 0x0320 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0030 //RX_FDDRC_BAND_MARGIN_1 +248 0x0050 //RX_FDDRC_BAND_MARGIN_2 +249 0x0080 //RX_FDDRC_BAND_MARGIN_3 +250 0x0007 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x5000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x6400 //RX_FDDRC_THRD_3_2 +258 0x6400 //RX_FDDRC_THRD_3_3 +259 0x2000 //RX_FDDRC_SLANT_0_0 +260 0x2000 //RX_FDDRC_SLANT_0_1 +261 0x2000 //RX_FDDRC_SLANT_0_2 +262 0x2000 //RX_FDDRC_SLANT_0_3 +263 0x5333 //RX_FDDRC_SLANT_1_0 +264 0x5333 //RX_FDDRC_SLANT_1_1 +265 0x5333 //RX_FDDRC_SLANT_1_2 +266 0x5333 //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +286 0x0100 //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 +#VOL 6 +163 0x1000 //RX_TDDRC_ALPHA_UP_1 +164 0x1000 //RX_TDDRC_ALPHA_UP_2 +165 0x1000 //RX_TDDRC_ALPHA_UP_3 +166 0x1000 //RX_TDDRC_ALPHA_UP_4 +184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +190 0x7000 //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +269 0x0000 //RX_TDDRC_THRD_0 +270 0x0000 //RX_TDDRC_THRD_1 +271 0x1800 //RX_TDDRC_THRD_2 +272 0x1800 //RX_TDDRC_THRD_3 +273 0x3000 //RX_TDDRC_SLANT_0 +274 0x6E00 //RX_TDDRC_SLANT_1 +275 0x1000 //RX_TDDRC_ALPHA_UP_0 +276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x199A //RX_TDDRC_HMNC_GAIN +279 0x0001 //RX_TDDRC_SMT_FLAG +280 0x0CCD //RX_TDDRC_SMT_W +281 0x01E0 //RX_TDDRC_DRC_GAIN +195 0x0030 //RX_FDEQ_SUBNUM +196 0x4848 //RX_FDEQ_GAIN_0 +197 0x4848 //RX_FDEQ_GAIN_1 +198 0x4844 //RX_FDEQ_GAIN_2 +199 0x4B4D //RX_FDEQ_GAIN_3 +200 0x4E50 //RX_FDEQ_GAIN_4 +201 0x5254 //RX_FDEQ_GAIN_5 +202 0x5658 //RX_FDEQ_GAIN_6 +203 0x5C60 //RX_FDEQ_GAIN_7 +204 0x6468 //RX_FDEQ_GAIN_8 +205 0x6C70 //RX_FDEQ_GAIN_9 +206 0x7474 //RX_FDEQ_GAIN_10 +207 0x7474 //RX_FDEQ_GAIN_11 +208 0x7474 //RX_FDEQ_GAIN_12 +209 0x7474 //RX_FDEQ_GAIN_13 +210 0x7474 //RX_FDEQ_GAIN_14 +211 0x7474 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0202 //RX_FDEQ_BIN_0 +221 0x0203 //RX_FDEQ_BIN_1 +222 0x0402 //RX_FDEQ_BIN_2 +223 0x0304 //RX_FDEQ_BIN_3 +224 0x0405 //RX_FDEQ_BIN_4 +225 0x0506 //RX_FDEQ_BIN_5 +226 0x0708 //RX_FDEQ_BIN_6 +227 0x090A //RX_FDEQ_BIN_7 +228 0x0B0C //RX_FDEQ_BIN_8 +229 0x0D0E //RX_FDEQ_BIN_9 +230 0x1214 //RX_FDEQ_BIN_10 +231 0x1E1E //RX_FDEQ_BIN_11 +232 0x1E1E //RX_FDEQ_BIN_12 +233 0x1E1E //RX_FDEQ_BIN_13 +234 0x1E1E //RX_FDEQ_BIN_14 +235 0x202C //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x4000 //RX_FDEQ_RESRV_0 +245 0x0320 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0030 //RX_FDDRC_BAND_MARGIN_1 +248 0x0050 //RX_FDDRC_BAND_MARGIN_2 +249 0x0080 //RX_FDDRC_BAND_MARGIN_3 +250 0x0007 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x5000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x6400 //RX_FDDRC_THRD_3_2 +258 0x6400 //RX_FDDRC_THRD_3_3 +259 0x2000 //RX_FDDRC_SLANT_0_0 +260 0x2000 //RX_FDDRC_SLANT_0_1 +261 0x2000 //RX_FDDRC_SLANT_0_2 +262 0x2000 //RX_FDDRC_SLANT_0_3 +263 0x5333 //RX_FDDRC_SLANT_1_0 +264 0x5333 //RX_FDDRC_SLANT_1_1 +265 0x5333 //RX_FDDRC_SLANT_1_2 +266 0x5333 //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +286 0x0100 //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 #CASE_NAME HANDSET-HANDSET-TMOBILE_US-NB -#PARAM_TYPE TX+RX -#TOTAL_CUSTOM_STEP 7 +#PARAM_MODE Full +#PARAM_TYPE TX+2RX +#TOTAL_CUSTOM_STEP 7+7 #TX 0 0x0000 //TX_OPERATION_MODE_0 1 0x0000 //TX_OPERATION_MODE_1 -2 0x0036 //TX_PATCH_REG +2 0x0076 //TX_PATCH_REG 3 0x6F7E //TX_SENDFUNC_MODE_0 4 0x0001 //TX_SENDFUNC_MODE_1 5 0x0002 //TX_NUM_MIC @@ -19311,7 +29399,7 @@ 18 0x0000 //TX_SYS_RESRV_2 19 0x0000 //TX_SYS_RESRV_3 20 0x0000 //TX_DIST2REF0 -21 0x009D //TX_DIST2REF1 +21 0x009C //TX_DIST2REF1 22 0x0000 //TX_DIST2REF_02 23 0x0000 //TX_DIST2REF_03 24 0x0000 //TX_DIST2REF_04 @@ -19541,19 +29629,19 @@ 248 0xF800 //TX_THR_SN_EST_6 249 0xF700 //TX_THR_SN_EST_7 250 0x0000 //TX_DELTA_THR_SN_EST_0 -251 0x01A0 //TX_DELTA_THR_SN_EST_1 -252 0x0100 //TX_DELTA_THR_SN_EST_2 -253 0x0200 //TX_DELTA_THR_SN_EST_3 -254 0x01A0 //TX_DELTA_THR_SN_EST_4 -255 0x0100 //TX_DELTA_THR_SN_EST_5 -256 0x0000 //TX_DELTA_THR_SN_EST_6 +251 0x0100 //TX_DELTA_THR_SN_EST_1 +252 0x0200 //TX_DELTA_THR_SN_EST_2 +253 0x01A0 //TX_DELTA_THR_SN_EST_3 +254 0x0100 //TX_DELTA_THR_SN_EST_4 +255 0x0000 //TX_DELTA_THR_SN_EST_5 +256 0x01A0 //TX_DELTA_THR_SN_EST_6 257 0x0200 //TX_DELTA_THR_SN_EST_7 258 0x4000 //TX_LAMBDA_NN_EST_0 -259 0x4000 //TX_LAMBDA_NN_EST_1 -260 0x3000 //TX_LAMBDA_NN_EST_2 -261 0x4000 //TX_LAMBDA_NN_EST_3 +259 0x3000 //TX_LAMBDA_NN_EST_1 +260 0x4000 //TX_LAMBDA_NN_EST_2 +261 0x3000 //TX_LAMBDA_NN_EST_3 262 0x3000 //TX_LAMBDA_NN_EST_4 -263 0x3000 //TX_LAMBDA_NN_EST_5 +263 0x4000 //TX_LAMBDA_NN_EST_5 264 0x4000 //TX_LAMBDA_NN_EST_6 265 0x4000 //TX_LAMBDA_NN_EST_7 266 0x0400 //TX_N_SN_EST @@ -19572,20 +29660,20 @@ 279 0x4000 //TX_B_POST_FLT_0 280 0x4000 //TX_B_POST_FLT_1 281 0x0014 //TX_NS_LVL_CTRL_0 -282 0x001B //TX_NS_LVL_CTRL_1 -283 0x0019 //TX_NS_LVL_CTRL_2 +282 0x0019 //TX_NS_LVL_CTRL_1 +283 0x0017 //TX_NS_LVL_CTRL_2 284 0x0017 //TX_NS_LVL_CTRL_3 -285 0x0017 //TX_NS_LVL_CTRL_4 -286 0x0019 //TX_NS_LVL_CTRL_5 -287 0x0014 //TX_NS_LVL_CTRL_6 +285 0x0019 //TX_NS_LVL_CTRL_4 +286 0x0014 //TX_NS_LVL_CTRL_5 +287 0x001B //TX_NS_LVL_CTRL_6 288 0x0010 //TX_NS_LVL_CTRL_7 289 0x0010 //TX_MIN_GAIN_S_0 290 0x000C //TX_MIN_GAIN_S_1 -291 0x000C //TX_MIN_GAIN_S_2 +291 0x0010 //TX_MIN_GAIN_S_2 292 0x0010 //TX_MIN_GAIN_S_3 -293 0x0010 //TX_MIN_GAIN_S_4 -294 0x000C //TX_MIN_GAIN_S_5 -295 0x0014 //TX_MIN_GAIN_S_6 +293 0x000C //TX_MIN_GAIN_S_4 +294 0x0014 //TX_MIN_GAIN_S_5 +295 0x000C //TX_MIN_GAIN_S_6 296 0x0014 //TX_MIN_GAIN_S_7 297 0x5000 //TX_NMOS_SUP 298 0x0000 //TX_NS_MAX_PRI_SNR_TH @@ -19595,8 +29683,8 @@ 302 0x4000 //TX_SNRI_SUP_2 303 0x4000 //TX_SNRI_SUP_3 304 0x4000 //TX_SNRI_SUP_4 -305 0x4000 //TX_SNRI_SUP_5 -306 0x7FFF //TX_SNRI_SUP_6 +305 0x7FFF //TX_SNRI_SUP_5 +306 0x4000 //TX_SNRI_SUP_6 307 0x3000 //TX_SNRI_SUP_7 308 0x3000 //TX_THR_LFNS 309 0x001A //TX_G_LFNS @@ -19605,36 +29693,36 @@ 312 0x7FFF //TX_A_POST_FILT_0 313 0x2000 //TX_A_POST_FILT_1 314 0x2000 //TX_A_POST_FILT_S_0 -315 0x7000 //TX_A_POST_FILT_S_1 -316 0x6000 //TX_A_POST_FILT_S_2 -317 0x5000 //TX_A_POST_FILT_S_3 -318 0x2000 //TX_A_POST_FILT_S_4 -319 0x6000 //TX_A_POST_FILT_S_5 -320 0x2000 //TX_A_POST_FILT_S_6 +315 0x6000 //TX_A_POST_FILT_S_1 +316 0x5000 //TX_A_POST_FILT_S_2 +317 0x2000 //TX_A_POST_FILT_S_3 +318 0x6000 //TX_A_POST_FILT_S_4 +319 0x2000 //TX_A_POST_FILT_S_5 +320 0x7000 //TX_A_POST_FILT_S_6 321 0x7000 //TX_A_POST_FILT_S_7 322 0x4000 //TX_B_POST_FILT_0 323 0x4000 //TX_B_POST_FILT_1 -324 0x7FFF //TX_B_POST_FILT_2 -325 0x5000 //TX_B_POST_FILT_3 -326 0x7FFF //TX_B_POST_FILT_4 -327 0x7FFF //TX_B_POST_FILT_5 +324 0x5000 //TX_B_POST_FILT_2 +325 0x4000 //TX_B_POST_FILT_3 +326 0x4000 //TX_B_POST_FILT_4 +327 0x4000 //TX_B_POST_FILT_5 328 0x4000 //TX_B_POST_FILT_6 329 0x2000 //TX_B_POST_FILT_7 330 0x7FFF //TX_B_LESSCUT_RTO_S_0 -331 0x7FFF //TX_B_LESSCUT_RTO_S_1 -332 0x7FFF //TX_B_LESSCUT_RTO_S_2 -333 0x7FFF //TX_B_LESSCUT_RTO_S_3 -334 0x7FFF //TX_B_LESSCUT_RTO_S_4 -335 0x7FFF //TX_B_LESSCUT_RTO_S_5 -336 0x7FFF //TX_B_LESSCUT_RTO_S_6 -337 0x7FFF //TX_B_LESSCUT_RTO_S_7 +331 0x1000 //TX_B_LESSCUT_RTO_S_1 +332 0x1000 //TX_B_LESSCUT_RTO_S_2 +333 0x1000 //TX_B_LESSCUT_RTO_S_3 +334 0x1000 //TX_B_LESSCUT_RTO_S_4 +335 0x1000 //TX_B_LESSCUT_RTO_S_5 +336 0x1000 //TX_B_LESSCUT_RTO_S_6 +337 0x1000 //TX_B_LESSCUT_RTO_S_7 338 0x7E14 //TX_LAMBDA_PFILT 339 0x7C29 //TX_LAMBDA_PFILT_S_0 -340 0x7C29 //TX_LAMBDA_PFILT_S_1 -341 0x7200 //TX_LAMBDA_PFILT_S_2 -342 0x7900 //TX_LAMBDA_PFILT_S_3 -343 0x7400 //TX_LAMBDA_PFILT_S_4 -344 0x7200 //TX_LAMBDA_PFILT_S_5 +340 0x7200 //TX_LAMBDA_PFILT_S_1 +341 0x7900 //TX_LAMBDA_PFILT_S_2 +342 0x7400 //TX_LAMBDA_PFILT_S_3 +343 0x7200 //TX_LAMBDA_PFILT_S_4 +344 0x7C29 //TX_LAMBDA_PFILT_S_5 345 0x7C29 //TX_LAMBDA_PFILT_S_6 346 0x7C29 //TX_LAMBDA_PFILT_S_7 347 0x0200 //TX_K_PEPPER @@ -19670,10 +29758,10 @@ 377 0x0000 //TX_NOISE_TH_5_4 378 0x07D0 //TX_NOISE_TH_6 379 0x0004 //TX_MINENOISE_TH -380 0x4000 //TX_MINENOISE_MIC0_TH_MTS -381 0xFFEE //TX_MINENOISE_MIC0_TH_EXP -382 0x6000 //TX_MINENOISE_MIC0_S_TH_MTS -383 0xFFF3 //TX_MINENOISE_MIC0_S_TH_EXP +380 0xD508 //TX_MORENS_TFMASK_TH +381 0x0001 //TX_DRC_QUIET_FLOOR +382 0x6D60 //TX_RATIODTL_CUT_TH +383 0x0DAC //TX_DT_CUT_K1 384 0x00A5 //TX_OUT_ENER_S_TH_CLEAN 385 0x00A5 //TX_OUT_ENER_S_TH_LESSCLEAN 386 0x00A5 //TX_OUT_ENER_S_TH_NOISY @@ -19681,15 +29769,15 @@ 388 0x00CE //TX_OUT_ENER_TH_SPEECH 389 0x2000 //TX_SN_NPB_GAIN 390 0x0000 //TX_NN_NPB_GAIN -391 0x0000 //TX_CSX_ALPHA_0 -392 0x0000 //TX_CSX_ALPHA_1 -393 0x0000 //TX_CSX_ALPHA_2 -394 0x0000 //TX_CSX_ALPHA_3 -395 0x0800 //TX_MU_ARSP_EST -396 0x00C8 //TX_P_OUTBEAM_MIN_TH +391 0x3000 //TX_POST_MASK_SUP_HSNE +392 0x07D0 //TX_TAIL_DET_TH +393 0x4000 //TX_B_LESSCUT_RTO_WTA +394 0x0000 //TX_MEL_G_R +395 0x0080 //TX_SUPHIGH_TH +396 0x0000 //TX_MASK_G_R 397 0x0002 //TX_EXTRA_NS_L -398 0x0800 //TX_EXTRA_NS_A -399 0x0005 //TX_VR_NOISE_FLOOR_TH +398 0x1800 //TX_C_POST_FLT_MASK +399 0x7FFF //TX_A_POST_FLT_WNS 400 0x0148 //TX_MIN_G_LOW300HZ 401 0x0001 //TX_MAXLEVEL_CNG 402 0x00B4 //TX_STN_NOISE_TH @@ -19804,16 +29892,16 @@ 511 0x6666 //TX_MIC_TO_BFGAIN 512 0x0000 //TX_MICTOBFGAIN0 513 0x0000 //TX_FASTMUE_TH -514 0x0000 //TX_DERVB_LEN_0 -515 0x0000 //TX_DERVB_LEN_1 -516 0x0000 //TX_RHO_DERVB -517 0x0000 //TX_MIC_INDX_DERVB -518 0x0000 //TX_MU_DERVB -519 0x0000 //TX_DR_RESRV_0 -520 0x0000 //TX_DR_RESRV_1 -521 0x0000 //TX_DR_RESRV_2 -522 0x0000 //TX_DR_RESRV_3 -523 0x0000 //TX_DR_RESRV_4 +514 0x3000 //TX_DEREVERB_LF_MU +515 0x34CD //TX_DEREVERB_HF_MU +516 0x0007 //TX_DEREVERB_DELAY +517 0x0004 //TX_DEREVERB_COEF_LEN +518 0x0003 //TX_DEREVERB_DNR +519 0x0000 //TX_DEREVERB_ALPHA +520 0x0000 //TX_DEREVERB_BETA +521 0x3A98 //TX_GSC_RTOL_TH +522 0x3A98 //TX_GSC_RTOH_TH +523 0x7E2C //TX_WIDE2_MEANHTH 524 0x0000 //TX_DR_RESRV_5 525 0x0000 //TX_DR_RESRV_6 526 0x0000 //TX_DR_RESRV_7 @@ -19861,11 +29949,11 @@ 568 0x584F //TX_FDEQ_GAIN_1 569 0x4F4E //TX_FDEQ_GAIN_2 570 0x474A //TX_FDEQ_GAIN_3 -571 0x473F //TX_FDEQ_GAIN_4 -572 0x403B //TX_FDEQ_GAIN_5 -573 0x3933 //TX_FDEQ_GAIN_6 -574 0x302B //TX_FDEQ_GAIN_7 -575 0x2220 //TX_FDEQ_GAIN_8 +571 0x4737 //TX_FDEQ_GAIN_4 +572 0x3A40 //TX_FDEQ_GAIN_5 +573 0x4040 //TX_FDEQ_GAIN_6 +574 0x3631 //TX_FDEQ_GAIN_7 +575 0x2020 //TX_FDEQ_GAIN_8 576 0x383C //TX_FDEQ_GAIN_9 577 0x4848 //TX_FDEQ_GAIN_10 578 0x4848 //TX_FDEQ_GAIN_11 @@ -19890,7 +29978,7 @@ 597 0x0808 //TX_FDEQ_BIN_6 598 0x050E //TX_FDEQ_BIN_7 599 0x0B0C //TX_FDEQ_BIN_8 -600 0x0F0F //TX_FDEQ_BIN_9 +600 0x0F09 //TX_FDEQ_BIN_9 601 0x0000 //TX_FDEQ_BIN_10 602 0x0000 //TX_FDEQ_BIN_11 603 0x0000 //TX_FDEQ_BIN_12 @@ -19914,9 +30002,9 @@ 621 0x4848 //TX_PREEQ_GAIN_MIC0_4 622 0x4848 //TX_PREEQ_GAIN_MIC0_5 623 0x4848 //TX_PREEQ_GAIN_MIC0_6 -624 0x4846 //TX_PREEQ_GAIN_MIC0_7 -625 0x4544 //TX_PREEQ_GAIN_MIC0_8 -626 0x4241 //TX_PREEQ_GAIN_MIC0_9 +624 0x4848 //TX_PREEQ_GAIN_MIC0_7 +625 0x4848 //TX_PREEQ_GAIN_MIC0_8 +626 0x4848 //TX_PREEQ_GAIN_MIC0_9 627 0x4848 //TX_PREEQ_GAIN_MIC0_10 628 0x4848 //TX_PREEQ_GAIN_MIC0_11 629 0x4848 //TX_PREEQ_GAIN_MIC0_12 @@ -19964,8 +30052,8 @@ 671 0x4848 //TX_PREEQ_GAIN_MIC1_5 672 0x4848 //TX_PREEQ_GAIN_MIC1_6 673 0x4848 //TX_PREEQ_GAIN_MIC1_7 -674 0x4A4C //TX_PREEQ_GAIN_MIC1_8 -675 0x4E50 //TX_PREEQ_GAIN_MIC1_9 +674 0x4849 //TX_PREEQ_GAIN_MIC1_8 +675 0x4A4B //TX_PREEQ_GAIN_MIC1_9 676 0x4848 //TX_PREEQ_GAIN_MIC1_10 677 0x4848 //TX_PREEQ_GAIN_MIC1_11 678 0x4848 //TX_PREEQ_GAIN_MIC1_12 @@ -19980,7 +30068,7 @@ 687 0x4848 //TX_PREEQ_GAIN_MIC1_21 688 0x4848 //TX_PREEQ_GAIN_MIC1_22 689 0x4848 //TX_PREEQ_GAIN_MIC1_23 -690 0x0203 //TX_PREEQ_BIN_MIC1_0 +690 0x0202 //TX_PREEQ_BIN_MIC1_0 691 0x0203 //TX_PREEQ_BIN_MIC1_1 692 0x0303 //TX_PREEQ_BIN_MIC1_2 693 0x0304 //TX_PREEQ_BIN_MIC1_3 @@ -20066,7 +30154,7 @@ 773 0x0000 //TX_GAIN_LIMIT_0 774 0x0000 //TX_GAIN_LIMIT_1 775 0x0006 //TX_GAIN_LIMIT_2 -776 0x0006 //TX_GAIN_LIMIT_3 +776 0x0007 //TX_GAIN_LIMIT_3 777 0x7F5B //TX_BVE_NOVAD0_ALPHADOWN 778 0x7FDE //TX_BVE_VAD0_ALPHAUP 779 0x7F3A //TX_BVE_VAD0_ALPHADOWN @@ -20156,7 +30244,7 @@ 863 0x199A //TX_TDDRC_HMNC_GAIN 864 0x0000 //TX_TDDRC_SMT_FLAG 865 0x0CCD //TX_TDDRC_SMT_W -866 0x05A0 //TX_TDDRC_DRC_GAIN +866 0x0504 //TX_TDDRC_DRC_GAIN 867 0x7FFF //TX_TDDRC_LMT_THRD 868 0x0000 //TX_TDDRC_LMT_ALPHA 869 0x0000 //TX_TFMASKLTH @@ -20187,8 +30275,73 @@ 894 0xC000 //TX_FASTNS_SSA_THHFL 895 0xCCCC //TX_FASTNS_SSA_THLFH 896 0xD999 //TX_FASTNS_SSA_THHFH +897 0x2339 //TX_SENDFUNC_REG_MICMUTE +898 0x0021 //TX_SENDFUNC_REG_MICMUTE1 +899 0x02BC //TX_MICMUTE_RATIO_THR +900 0x0140 //TX_MICMUTE_AMP_THR +901 0x0004 //TX_MICMUTE_HPF_IND +902 0x00C0 //TX_MICMUTE_LOG_EYR_TH +903 0x0008 //TX_MICMUTE_CVG_TIME +904 0x0008 //TX_MICMUTE_RELEASE_TIME +905 0x01FE //TX_MIC_VOLUME_MIC0MUTE +906 0x0020 //TX_MICMUTE_EPD_OFFSET_0 +907 0x001E //TX_MICMUTE_FRQ_AEC_L +908 0x7999 //TX_MICMUTE_EAD_THR +909 0x7FFF //TX_MICMUTE_LAMBDA_CB_NLE +910 0x7FFF //TX_MICMUTE_LAMBDA_RE_EST +911 0x4000 //TX_DTD_THR1_MICMUTE_0 +912 0x7000 //TX_DTD_THR1_MICMUTE_1 +913 0x7FFF //TX_DTD_THR1_MICMUTE_2 +914 0x7FFF //TX_DTD_THR1_MICMUTE_3 +915 0x6CCC //TX_DTD_THR2_MICMUTE_0 +916 0x0400 //TX_MICMUTE_MIN_EQ_RE_EST_0 +917 0x0400 //TX_MICMUTE_MIN_EQ_RE_EST_1 +918 0x1000 //TX_MICMUTE_MIN_EQ_RE_EST_2 +919 0x7FFF //TX_MICMUTE_MIN_EQ_RE_EST_3 +920 0x7FFF //TX_MICMUTE_MIN_EQ_RE_EST_4 +921 0x4000 //TX_MICMUTE_C_POST_FLT +922 0x03E8 //TX_MICMUTE_DT_CUT_K +923 0x0001 //TX_MICMUTE_DT_CUT_THR +924 0x03E8 //TX_MICMUTE_DT_CUT_K2 +925 0x0001 //TX_MICMUTE_DT_CUT_THR2 +926 0x0064 //TX_MICMUTE_DT2_HOLD_N +927 0x1000 //TX_MICMUTE_RATIODTH_THCUT +928 0x1000 //TX_MICMUTE_B_POST_FLT_ECHOL +929 0x7FFF //TX_MICMUTE_B_POST_FLT_ECHOH +930 0x0400 //TX_MICMUTE_C_POST_FLT_MASK +931 0x7999 //TX_MICMUTE_RATIODTL_CUT_TH +932 0x0258 //TX_MICMUTE_DT_CUT_K1 +933 0x0800 //TX_MICMUTE_N2_SN_EST +934 0xFC00 //TX_MICMUTE_THR_SN_EST_0 +935 0x001C //TX_MICMUTE_MIN_G_CTRL_0 +936 0x6000 //TX_MICMUTE_A_POST_FILT_S_0 +937 0x7000 //TX_MICMUTE_B_POST_FILT_0 +938 0x2710 //TX_MIC1RUB_AMP_THR +939 0x0010 //TX_MIC1MUTE_RATIO_THR +940 0x0450 //TX_MIC1MUTE_AMP_THR +941 0x0008 //TX_MIC1MUTE_CVG_TIME +942 0x0008 //TX_MIC1MUTE_RELEASE_TIME +943 0x0000 //TX_AMS_RESRV_01 +944 0x0000 //TX_AMS_RESRV_02 +945 0x0000 //TX_AMS_RESRV_03 +946 0x0000 //TX_AMS_RESRV_04 +947 0x0000 //TX_AMS_RESRV_05 +948 0x0000 //TX_AMS_RESRV_06 +949 0x0000 //TX_AMS_RESRV_07 +950 0x0000 //TX_AMS_RESRV_08 +951 0x0000 //TX_AMS_RESRV_09 +952 0x0000 //TX_AMS_RESRV_10 +953 0x0000 //TX_AMS_RESRV_11 +954 0x0000 //TX_AMS_RESRV_12 +955 0x0000 //TX_AMS_RESRV_13 +956 0x0000 //TX_AMS_RESRV_14 +957 0x0000 //TX_AMS_RESRV_15 +958 0x0000 //TX_AMS_RESRV_16 +959 0x0000 //TX_AMS_RESRV_17 +960 0x0000 //TX_AMS_RESRV_18 +961 0x0000 //TX_AMS_RESRV_19 #RX -0 0x003C //RX_RECVFUNC_MODE_0 +0 0x203C //RX_RECVFUNC_MODE_0 1 0x0000 //RX_RECVFUNC_MODE_1 2 0x0000 //RX_SAMPLINGFREQ_SIG 3 0x0000 //RX_SAMPLINGFREQ_PROC @@ -20198,7 +30351,7 @@ 7 0x1000 //RX_TDDRC_ALPHA_UP_2 8 0x1000 //RX_TDDRC_ALPHA_UP_3 9 0x1000 //RX_TDDRC_ALPHA_UP_4 -10 0x0600 //RX_PGA +10 0x050E //RX_PGA 11 0x7FFF //RX_A_HP 12 0x4000 //RX_B_PE 13 0x7800 //RX_THR_PITCH_DET_0 @@ -20227,16 +30380,16 @@ 36 0x0000 //RX_LMT_THRD 37 0x4000 //RX_LMT_ALPHA 38 0x0014 //RX_FDEQ_SUBNUM -39 0x4840 //RX_FDEQ_GAIN_0 -40 0x3E3E //RX_FDEQ_GAIN_1 -41 0x484D //RX_FDEQ_GAIN_2 -42 0x5E72 //RX_FDEQ_GAIN_3 -43 0x818E //RX_FDEQ_GAIN_4 -44 0x7E75 //RX_FDEQ_GAIN_5 -45 0x7067 //RX_FDEQ_GAIN_6 -46 0x6774 //RX_FDEQ_GAIN_7 -47 0x6F72 //RX_FDEQ_GAIN_8 -48 0x7A7E //RX_FDEQ_GAIN_9 +39 0x483A //RX_FDEQ_GAIN_0 +40 0x3A3A //RX_FDEQ_GAIN_1 +41 0x4A58 //RX_FDEQ_GAIN_2 +42 0x5E6E //RX_FDEQ_GAIN_3 +43 0x7A84 //RX_FDEQ_GAIN_4 +44 0x7C7A //RX_FDEQ_GAIN_5 +45 0x7C78 //RX_FDEQ_GAIN_6 +46 0x7978 //RX_FDEQ_GAIN_7 +47 0x7A7E //RX_FDEQ_GAIN_8 +48 0x7C80 //RX_FDEQ_GAIN_9 49 0x4848 //RX_FDEQ_GAIN_10 50 0x4848 //RX_FDEQ_GAIN_11 51 0x4848 //RX_FDEQ_GAIN_12 @@ -20252,8 +30405,8 @@ 61 0x4848 //RX_FDEQ_GAIN_22 62 0x4848 //RX_FDEQ_GAIN_23 63 0x0202 //RX_FDEQ_BIN_0 -64 0x0203 //RX_FDEQ_BIN_1 -65 0x0303 //RX_FDEQ_BIN_2 +64 0x0204 //RX_FDEQ_BIN_1 +65 0x0203 //RX_FDEQ_BIN_2 66 0x0304 //RX_FDEQ_BIN_3 67 0x0405 //RX_FDEQ_BIN_4 68 0x0506 //RX_FDEQ_BIN_5 @@ -20304,20 +30457,20 @@ 113 0x0000 //RX_TDDRC_THRD_1 114 0x1800 //RX_TDDRC_THRD_2 115 0x1800 //RX_TDDRC_THRD_3 -116 0x3000 //RX_TDDRC_SLANT_0 -117 0x6E00 //RX_TDDRC_SLANT_1 +116 0x7FFF //RX_TDDRC_SLANT_0 +117 0x7FFF //RX_TDDRC_SLANT_1 118 0x1000 //RX_TDDRC_ALPHA_UP_0 119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 120 0x0000 //RX_TDDRC_HMNC_FLAG 121 0x199A //RX_TDDRC_HMNC_GAIN 122 0x0001 //RX_TDDRC_SMT_FLAG 123 0x0CCD //RX_TDDRC_SMT_W -124 0x0313 //RX_TDDRC_DRC_GAIN +124 0x06EC //RX_TDDRC_DRC_GAIN 125 0x7C00 //RX_LAMBDA_PKA_FP 126 0x13E0 //RX_TPKA_FP 127 0x0080 //RX_MIN_G_FP 128 0x2000 //RX_MAX_G_FP -129 0x000E //RX_SPK_VOL +129 0x000A //RX_SPK_VOL 130 0x0000 //RX_VOL_RESRV_0 131 0x0000 //RX_MAXLEVEL_CNG 132 0x3000 //RX_BWE_UV_TH @@ -20360,26 +30513,26 @@ 113 0x0000 //RX_TDDRC_THRD_1 114 0x1800 //RX_TDDRC_THRD_2 115 0x1800 //RX_TDDRC_THRD_3 -116 0x3000 //RX_TDDRC_SLANT_0 -117 0x6E00 //RX_TDDRC_SLANT_1 +116 0x7FFF //RX_TDDRC_SLANT_0 +117 0x7FFF //RX_TDDRC_SLANT_1 118 0x1000 //RX_TDDRC_ALPHA_UP_0 119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 120 0x0000 //RX_TDDRC_HMNC_FLAG 121 0x199A //RX_TDDRC_HMNC_GAIN 122 0x0001 //RX_TDDRC_SMT_FLAG 123 0x0CCD //RX_TDDRC_SMT_W -124 0x0313 //RX_TDDRC_DRC_GAIN +124 0x06EC //RX_TDDRC_DRC_GAIN 38 0x0014 //RX_FDEQ_SUBNUM -39 0x4840 //RX_FDEQ_GAIN_0 -40 0x3E3E //RX_FDEQ_GAIN_1 -41 0x484D //RX_FDEQ_GAIN_2 -42 0x5E72 //RX_FDEQ_GAIN_3 -43 0x818E //RX_FDEQ_GAIN_4 -44 0x7E75 //RX_FDEQ_GAIN_5 -45 0x7067 //RX_FDEQ_GAIN_6 -46 0x6774 //RX_FDEQ_GAIN_7 -47 0x6F72 //RX_FDEQ_GAIN_8 -48 0x7A7E //RX_FDEQ_GAIN_9 +39 0x483A //RX_FDEQ_GAIN_0 +40 0x3A3A //RX_FDEQ_GAIN_1 +41 0x4A58 //RX_FDEQ_GAIN_2 +42 0x5E6E //RX_FDEQ_GAIN_3 +43 0x7A84 //RX_FDEQ_GAIN_4 +44 0x7C7A //RX_FDEQ_GAIN_5 +45 0x7C78 //RX_FDEQ_GAIN_6 +46 0x7978 //RX_FDEQ_GAIN_7 +47 0x7A7E //RX_FDEQ_GAIN_8 +48 0x7C80 //RX_FDEQ_GAIN_9 49 0x4848 //RX_FDEQ_GAIN_10 50 0x4848 //RX_FDEQ_GAIN_11 51 0x4848 //RX_FDEQ_GAIN_12 @@ -20395,8 +30548,8 @@ 61 0x4848 //RX_FDEQ_GAIN_22 62 0x4848 //RX_FDEQ_GAIN_23 63 0x0202 //RX_FDEQ_BIN_0 -64 0x0203 //RX_FDEQ_BIN_1 -65 0x0303 //RX_FDEQ_BIN_2 +64 0x0204 //RX_FDEQ_BIN_1 +65 0x0203 //RX_FDEQ_BIN_2 66 0x0304 //RX_FDEQ_BIN_3 67 0x0405 //RX_FDEQ_BIN_4 68 0x0506 //RX_FDEQ_BIN_5 @@ -20442,7 +30595,7 @@ 108 0x5333 //RX_FDDRC_SLANT_1_2 109 0x5333 //RX_FDDRC_SLANT_1_3 110 0x0000 //RX_FDDRC_RESRV_0 -129 0x000E //RX_SPK_VOL +129 0x000A //RX_SPK_VOL 130 0x0000 //RX_VOL_RESRV_0 #VOL 1 6 0x1000 //RX_TDDRC_ALPHA_UP_1 @@ -20459,26 +30612,26 @@ 113 0x0000 //RX_TDDRC_THRD_1 114 0x1800 //RX_TDDRC_THRD_2 115 0x1800 //RX_TDDRC_THRD_3 -116 0x3000 //RX_TDDRC_SLANT_0 -117 0x6E00 //RX_TDDRC_SLANT_1 +116 0x7FFF //RX_TDDRC_SLANT_0 +117 0x7FFF //RX_TDDRC_SLANT_1 118 0x1000 //RX_TDDRC_ALPHA_UP_0 119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 120 0x0000 //RX_TDDRC_HMNC_FLAG 121 0x199A //RX_TDDRC_HMNC_GAIN 122 0x0001 //RX_TDDRC_SMT_FLAG 123 0x0CCD //RX_TDDRC_SMT_W -124 0x02F8 //RX_TDDRC_DRC_GAIN +124 0x06EC //RX_TDDRC_DRC_GAIN 38 0x0014 //RX_FDEQ_SUBNUM -39 0x4840 //RX_FDEQ_GAIN_0 -40 0x3E3E //RX_FDEQ_GAIN_1 -41 0x484D //RX_FDEQ_GAIN_2 -42 0x5E72 //RX_FDEQ_GAIN_3 -43 0x818E //RX_FDEQ_GAIN_4 -44 0x7E75 //RX_FDEQ_GAIN_5 -45 0x7067 //RX_FDEQ_GAIN_6 -46 0x6774 //RX_FDEQ_GAIN_7 -47 0x6F72 //RX_FDEQ_GAIN_8 -48 0x7A7E //RX_FDEQ_GAIN_9 +39 0x483A //RX_FDEQ_GAIN_0 +40 0x3A3A //RX_FDEQ_GAIN_1 +41 0x4A58 //RX_FDEQ_GAIN_2 +42 0x5E6E //RX_FDEQ_GAIN_3 +43 0x7A84 //RX_FDEQ_GAIN_4 +44 0x7C7A //RX_FDEQ_GAIN_5 +45 0x7C78 //RX_FDEQ_GAIN_6 +46 0x7978 //RX_FDEQ_GAIN_7 +47 0x7A7E //RX_FDEQ_GAIN_8 +48 0x7C80 //RX_FDEQ_GAIN_9 49 0x4848 //RX_FDEQ_GAIN_10 50 0x4848 //RX_FDEQ_GAIN_11 51 0x4848 //RX_FDEQ_GAIN_12 @@ -20494,8 +30647,8 @@ 61 0x4848 //RX_FDEQ_GAIN_22 62 0x4848 //RX_FDEQ_GAIN_23 63 0x0202 //RX_FDEQ_BIN_0 -64 0x0203 //RX_FDEQ_BIN_1 -65 0x0303 //RX_FDEQ_BIN_2 +64 0x0204 //RX_FDEQ_BIN_1 +65 0x0203 //RX_FDEQ_BIN_2 66 0x0304 //RX_FDEQ_BIN_3 67 0x0405 //RX_FDEQ_BIN_4 68 0x0506 //RX_FDEQ_BIN_5 @@ -20541,7 +30694,7 @@ 108 0x5333 //RX_FDDRC_SLANT_1_2 109 0x5333 //RX_FDDRC_SLANT_1_3 110 0x0000 //RX_FDDRC_RESRV_0 -129 0x0017 //RX_SPK_VOL +129 0x0010 //RX_SPK_VOL 130 0x0000 //RX_VOL_RESRV_0 #VOL 2 6 0x1000 //RX_TDDRC_ALPHA_UP_1 @@ -20558,26 +30711,26 @@ 113 0x0000 //RX_TDDRC_THRD_1 114 0x1800 //RX_TDDRC_THRD_2 115 0x1800 //RX_TDDRC_THRD_3 -116 0x3000 //RX_TDDRC_SLANT_0 -117 0x6E00 //RX_TDDRC_SLANT_1 +116 0x7FFF //RX_TDDRC_SLANT_0 +117 0x7FFF //RX_TDDRC_SLANT_1 118 0x1000 //RX_TDDRC_ALPHA_UP_0 119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 120 0x0000 //RX_TDDRC_HMNC_FLAG 121 0x199A //RX_TDDRC_HMNC_GAIN 122 0x0001 //RX_TDDRC_SMT_FLAG 123 0x0CCD //RX_TDDRC_SMT_W -124 0x02EC //RX_TDDRC_DRC_GAIN +124 0x06EC //RX_TDDRC_DRC_GAIN 38 0x0014 //RX_FDEQ_SUBNUM -39 0x4840 //RX_FDEQ_GAIN_0 -40 0x3E3E //RX_FDEQ_GAIN_1 -41 0x484D //RX_FDEQ_GAIN_2 -42 0x5E72 //RX_FDEQ_GAIN_3 -43 0x818E //RX_FDEQ_GAIN_4 -44 0x7E75 //RX_FDEQ_GAIN_5 -45 0x7067 //RX_FDEQ_GAIN_6 -46 0x6774 //RX_FDEQ_GAIN_7 -47 0x6F72 //RX_FDEQ_GAIN_8 -48 0x7A7E //RX_FDEQ_GAIN_9 +39 0x483A //RX_FDEQ_GAIN_0 +40 0x3A3A //RX_FDEQ_GAIN_1 +41 0x4A58 //RX_FDEQ_GAIN_2 +42 0x5E6E //RX_FDEQ_GAIN_3 +43 0x7A84 //RX_FDEQ_GAIN_4 +44 0x7C7A //RX_FDEQ_GAIN_5 +45 0x7C78 //RX_FDEQ_GAIN_6 +46 0x7978 //RX_FDEQ_GAIN_7 +47 0x7A7E //RX_FDEQ_GAIN_8 +48 0x7C80 //RX_FDEQ_GAIN_9 49 0x4848 //RX_FDEQ_GAIN_10 50 0x4848 //RX_FDEQ_GAIN_11 51 0x4848 //RX_FDEQ_GAIN_12 @@ -20593,8 +30746,8 @@ 61 0x4848 //RX_FDEQ_GAIN_22 62 0x4848 //RX_FDEQ_GAIN_23 63 0x0202 //RX_FDEQ_BIN_0 -64 0x0203 //RX_FDEQ_BIN_1 -65 0x0303 //RX_FDEQ_BIN_2 +64 0x0204 //RX_FDEQ_BIN_1 +65 0x0203 //RX_FDEQ_BIN_2 66 0x0304 //RX_FDEQ_BIN_3 67 0x0405 //RX_FDEQ_BIN_4 68 0x0506 //RX_FDEQ_BIN_5 @@ -20640,7 +30793,7 @@ 108 0x5333 //RX_FDDRC_SLANT_1_2 109 0x5333 //RX_FDDRC_SLANT_1_3 110 0x0000 //RX_FDDRC_RESRV_0 -129 0x0026 //RX_SPK_VOL +129 0x001A //RX_SPK_VOL 130 0x0000 //RX_VOL_RESRV_0 #VOL 3 6 0x1000 //RX_TDDRC_ALPHA_UP_1 @@ -20657,26 +30810,26 @@ 113 0x0000 //RX_TDDRC_THRD_1 114 0x1800 //RX_TDDRC_THRD_2 115 0x1800 //RX_TDDRC_THRD_3 -116 0x3000 //RX_TDDRC_SLANT_0 -117 0x6E00 //RX_TDDRC_SLANT_1 +116 0x7FFF //RX_TDDRC_SLANT_0 +117 0x7FFF //RX_TDDRC_SLANT_1 118 0x1000 //RX_TDDRC_ALPHA_UP_0 119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 120 0x0000 //RX_TDDRC_HMNC_FLAG 121 0x199A //RX_TDDRC_HMNC_GAIN 122 0x0001 //RX_TDDRC_SMT_FLAG 123 0x0CCD //RX_TDDRC_SMT_W -124 0x02EC //RX_TDDRC_DRC_GAIN +124 0x06EC //RX_TDDRC_DRC_GAIN 38 0x0014 //RX_FDEQ_SUBNUM -39 0x4840 //RX_FDEQ_GAIN_0 -40 0x3E3E //RX_FDEQ_GAIN_1 -41 0x484D //RX_FDEQ_GAIN_2 -42 0x5E72 //RX_FDEQ_GAIN_3 -43 0x818E //RX_FDEQ_GAIN_4 -44 0x7E75 //RX_FDEQ_GAIN_5 -45 0x7067 //RX_FDEQ_GAIN_6 -46 0x6774 //RX_FDEQ_GAIN_7 -47 0x6F72 //RX_FDEQ_GAIN_8 -48 0x7A7E //RX_FDEQ_GAIN_9 +39 0x483A //RX_FDEQ_GAIN_0 +40 0x3A3A //RX_FDEQ_GAIN_1 +41 0x4A58 //RX_FDEQ_GAIN_2 +42 0x5E6E //RX_FDEQ_GAIN_3 +43 0x7A84 //RX_FDEQ_GAIN_4 +44 0x7C7A //RX_FDEQ_GAIN_5 +45 0x7C78 //RX_FDEQ_GAIN_6 +46 0x7978 //RX_FDEQ_GAIN_7 +47 0x7A7E //RX_FDEQ_GAIN_8 +48 0x7C80 //RX_FDEQ_GAIN_9 49 0x4848 //RX_FDEQ_GAIN_10 50 0x4848 //RX_FDEQ_GAIN_11 51 0x4848 //RX_FDEQ_GAIN_12 @@ -20692,8 +30845,8 @@ 61 0x4848 //RX_FDEQ_GAIN_22 62 0x4848 //RX_FDEQ_GAIN_23 63 0x0202 //RX_FDEQ_BIN_0 -64 0x0203 //RX_FDEQ_BIN_1 -65 0x0303 //RX_FDEQ_BIN_2 +64 0x0204 //RX_FDEQ_BIN_1 +65 0x0203 //RX_FDEQ_BIN_2 66 0x0304 //RX_FDEQ_BIN_3 67 0x0405 //RX_FDEQ_BIN_4 68 0x0506 //RX_FDEQ_BIN_5 @@ -20739,7 +30892,7 @@ 108 0x5333 //RX_FDDRC_SLANT_1_2 109 0x5333 //RX_FDDRC_SLANT_1_3 110 0x0000 //RX_FDDRC_RESRV_0 -129 0x003D //RX_SPK_VOL +129 0x002E //RX_SPK_VOL 130 0x0000 //RX_VOL_RESRV_0 #VOL 4 6 0x1000 //RX_TDDRC_ALPHA_UP_1 @@ -20756,26 +30909,26 @@ 113 0x0000 //RX_TDDRC_THRD_1 114 0x1800 //RX_TDDRC_THRD_2 115 0x1800 //RX_TDDRC_THRD_3 -116 0x3000 //RX_TDDRC_SLANT_0 -117 0x6E00 //RX_TDDRC_SLANT_1 +116 0x7FFF //RX_TDDRC_SLANT_0 +117 0x7FFF //RX_TDDRC_SLANT_1 118 0x1000 //RX_TDDRC_ALPHA_UP_0 119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 120 0x0000 //RX_TDDRC_HMNC_FLAG 121 0x199A //RX_TDDRC_HMNC_GAIN 122 0x0001 //RX_TDDRC_SMT_FLAG 123 0x0CCD //RX_TDDRC_SMT_W -124 0x02EC //RX_TDDRC_DRC_GAIN +124 0x06EC //RX_TDDRC_DRC_GAIN 38 0x0014 //RX_FDEQ_SUBNUM -39 0x4840 //RX_FDEQ_GAIN_0 -40 0x3E3E //RX_FDEQ_GAIN_1 -41 0x484D //RX_FDEQ_GAIN_2 -42 0x5E72 //RX_FDEQ_GAIN_3 -43 0x818E //RX_FDEQ_GAIN_4 -44 0x7E75 //RX_FDEQ_GAIN_5 -45 0x7067 //RX_FDEQ_GAIN_6 -46 0x6774 //RX_FDEQ_GAIN_7 -47 0x6F72 //RX_FDEQ_GAIN_8 -48 0x7A7E //RX_FDEQ_GAIN_9 +39 0x483A //RX_FDEQ_GAIN_0 +40 0x3A3A //RX_FDEQ_GAIN_1 +41 0x4A58 //RX_FDEQ_GAIN_2 +42 0x5E6E //RX_FDEQ_GAIN_3 +43 0x7A84 //RX_FDEQ_GAIN_4 +44 0x7C7A //RX_FDEQ_GAIN_5 +45 0x7C78 //RX_FDEQ_GAIN_6 +46 0x7978 //RX_FDEQ_GAIN_7 +47 0x7A7E //RX_FDEQ_GAIN_8 +48 0x7C80 //RX_FDEQ_GAIN_9 49 0x4848 //RX_FDEQ_GAIN_10 50 0x4848 //RX_FDEQ_GAIN_11 51 0x4848 //RX_FDEQ_GAIN_12 @@ -20791,8 +30944,8 @@ 61 0x4848 //RX_FDEQ_GAIN_22 62 0x4848 //RX_FDEQ_GAIN_23 63 0x0202 //RX_FDEQ_BIN_0 -64 0x0203 //RX_FDEQ_BIN_1 -65 0x0303 //RX_FDEQ_BIN_2 +64 0x0204 //RX_FDEQ_BIN_1 +65 0x0203 //RX_FDEQ_BIN_2 66 0x0304 //RX_FDEQ_BIN_3 67 0x0405 //RX_FDEQ_BIN_4 68 0x0506 //RX_FDEQ_BIN_5 @@ -20838,7 +30991,7 @@ 108 0x5333 //RX_FDDRC_SLANT_1_2 109 0x5333 //RX_FDDRC_SLANT_1_3 110 0x0000 //RX_FDDRC_RESRV_0 -129 0x0061 //RX_SPK_VOL +129 0x0045 //RX_SPK_VOL 130 0x0000 //RX_VOL_RESRV_0 #VOL 5 6 0x1000 //RX_TDDRC_ALPHA_UP_1 @@ -20855,26 +31008,26 @@ 113 0x0000 //RX_TDDRC_THRD_1 114 0x1800 //RX_TDDRC_THRD_2 115 0x1800 //RX_TDDRC_THRD_3 -116 0x3000 //RX_TDDRC_SLANT_0 -117 0x6E00 //RX_TDDRC_SLANT_1 +116 0x7FFF //RX_TDDRC_SLANT_0 +117 0x7FFF //RX_TDDRC_SLANT_1 118 0x1000 //RX_TDDRC_ALPHA_UP_0 119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 120 0x0000 //RX_TDDRC_HMNC_FLAG 121 0x199A //RX_TDDRC_HMNC_GAIN 122 0x0001 //RX_TDDRC_SMT_FLAG 123 0x0CCD //RX_TDDRC_SMT_W -124 0x02EC //RX_TDDRC_DRC_GAIN +124 0x06EC //RX_TDDRC_DRC_GAIN 38 0x0014 //RX_FDEQ_SUBNUM -39 0x4840 //RX_FDEQ_GAIN_0 -40 0x3E3E //RX_FDEQ_GAIN_1 -41 0x484D //RX_FDEQ_GAIN_2 -42 0x5E72 //RX_FDEQ_GAIN_3 -43 0x818E //RX_FDEQ_GAIN_4 -44 0x7E75 //RX_FDEQ_GAIN_5 -45 0x7067 //RX_FDEQ_GAIN_6 -46 0x6774 //RX_FDEQ_GAIN_7 -47 0x6F72 //RX_FDEQ_GAIN_8 -48 0x7A7E //RX_FDEQ_GAIN_9 +39 0x483A //RX_FDEQ_GAIN_0 +40 0x3A3A //RX_FDEQ_GAIN_1 +41 0x4A58 //RX_FDEQ_GAIN_2 +42 0x5E6E //RX_FDEQ_GAIN_3 +43 0x7A84 //RX_FDEQ_GAIN_4 +44 0x7C7A //RX_FDEQ_GAIN_5 +45 0x7C78 //RX_FDEQ_GAIN_6 +46 0x7978 //RX_FDEQ_GAIN_7 +47 0x7A7E //RX_FDEQ_GAIN_8 +48 0x7C80 //RX_FDEQ_GAIN_9 49 0x4848 //RX_FDEQ_GAIN_10 50 0x4848 //RX_FDEQ_GAIN_11 51 0x4848 //RX_FDEQ_GAIN_12 @@ -20890,8 +31043,8 @@ 61 0x4848 //RX_FDEQ_GAIN_22 62 0x4848 //RX_FDEQ_GAIN_23 63 0x0202 //RX_FDEQ_BIN_0 -64 0x0203 //RX_FDEQ_BIN_1 -65 0x0303 //RX_FDEQ_BIN_2 +64 0x0204 //RX_FDEQ_BIN_1 +65 0x0203 //RX_FDEQ_BIN_2 66 0x0304 //RX_FDEQ_BIN_3 67 0x0405 //RX_FDEQ_BIN_4 68 0x0506 //RX_FDEQ_BIN_5 @@ -20937,7 +31090,7 @@ 108 0x5333 //RX_FDDRC_SLANT_1_2 109 0x5333 //RX_FDDRC_SLANT_1_3 110 0x0000 //RX_FDDRC_RESRV_0 -129 0x009B //RX_SPK_VOL +129 0x0074 //RX_SPK_VOL 130 0x0000 //RX_VOL_RESRV_0 #VOL 6 6 0x1000 //RX_TDDRC_ALPHA_UP_1 @@ -20954,26 +31107,26 @@ 113 0x0000 //RX_TDDRC_THRD_1 114 0x1800 //RX_TDDRC_THRD_2 115 0x1800 //RX_TDDRC_THRD_3 -116 0x3000 //RX_TDDRC_SLANT_0 -117 0x6E00 //RX_TDDRC_SLANT_1 +116 0x7FFF //RX_TDDRC_SLANT_0 +117 0x7FFF //RX_TDDRC_SLANT_1 118 0x1000 //RX_TDDRC_ALPHA_UP_0 119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 120 0x0000 //RX_TDDRC_HMNC_FLAG 121 0x199A //RX_TDDRC_HMNC_GAIN 122 0x0001 //RX_TDDRC_SMT_FLAG 123 0x0CCD //RX_TDDRC_SMT_W -124 0x02EC //RX_TDDRC_DRC_GAIN +124 0x06EC //RX_TDDRC_DRC_GAIN 38 0x0014 //RX_FDEQ_SUBNUM -39 0x4840 //RX_FDEQ_GAIN_0 -40 0x3E3E //RX_FDEQ_GAIN_1 -41 0x484D //RX_FDEQ_GAIN_2 -42 0x5E72 //RX_FDEQ_GAIN_3 -43 0x818E //RX_FDEQ_GAIN_4 -44 0x7E75 //RX_FDEQ_GAIN_5 -45 0x7067 //RX_FDEQ_GAIN_6 -46 0x6774 //RX_FDEQ_GAIN_7 -47 0x6F72 //RX_FDEQ_GAIN_8 -48 0x7A7E //RX_FDEQ_GAIN_9 +39 0x483A //RX_FDEQ_GAIN_0 +40 0x3A3A //RX_FDEQ_GAIN_1 +41 0x4A58 //RX_FDEQ_GAIN_2 +42 0x5E6E //RX_FDEQ_GAIN_3 +43 0x7A84 //RX_FDEQ_GAIN_4 +44 0x7C7A //RX_FDEQ_GAIN_5 +45 0x7C78 //RX_FDEQ_GAIN_6 +46 0x7978 //RX_FDEQ_GAIN_7 +47 0x7A7E //RX_FDEQ_GAIN_8 +48 0x7C80 //RX_FDEQ_GAIN_9 49 0x4848 //RX_FDEQ_GAIN_10 50 0x4848 //RX_FDEQ_GAIN_11 51 0x4848 //RX_FDEQ_GAIN_12 @@ -20989,8 +31142,8 @@ 61 0x4848 //RX_FDEQ_GAIN_22 62 0x4848 //RX_FDEQ_GAIN_23 63 0x0202 //RX_FDEQ_BIN_0 -64 0x0203 //RX_FDEQ_BIN_1 -65 0x0303 //RX_FDEQ_BIN_2 +64 0x0204 //RX_FDEQ_BIN_1 +65 0x0203 //RX_FDEQ_BIN_2 66 0x0304 //RX_FDEQ_BIN_3 67 0x0405 //RX_FDEQ_BIN_4 68 0x0506 //RX_FDEQ_BIN_5 @@ -21038,10 +31191,862 @@ 110 0x0000 //RX_FDDRC_RESRV_0 129 0x0100 //RX_SPK_VOL 130 0x0000 //RX_VOL_RESRV_0 +#RX 2 +157 0x003C //RX_RECVFUNC_MODE_0 +158 0x0000 //RX_RECVFUNC_MODE_1 +159 0x0000 //RX_SAMPLINGFREQ_SIG +160 0x0000 //RX_SAMPLINGFREQ_PROC +161 0x000A //RX_FRAME_SZ +162 0x0000 //RX_DELAY_OPT +163 0x1000 //RX_TDDRC_ALPHA_UP_1 +164 0x1000 //RX_TDDRC_ALPHA_UP_2 +165 0x1000 //RX_TDDRC_ALPHA_UP_3 +166 0x1000 //RX_TDDRC_ALPHA_UP_4 +167 0x0600 //RX_PGA +168 0x7FFF //RX_A_HP +169 0x4000 //RX_B_PE +170 0x7800 //RX_THR_PITCH_DET_0 +171 0x7000 //RX_THR_PITCH_DET_1 +172 0x6000 //RX_THR_PITCH_DET_2 +173 0x0008 //RX_PITCH_BFR_LEN +174 0x0003 //RX_SBD_PITCH_DET +175 0x0100 //RX_PP_RESRV_0 +176 0x0020 //RX_PP_RESRV_1 +177 0x0400 //RX_N_SN_EST +178 0x000C //RX_N2_SN_EST +179 0x0014 //RX_NS_LVL_CTRL +180 0xF800 //RX_THR_SN_EST +181 0x7E00 //RX_LAMBDA_PFILT +182 0x000A //RX_FENS_RESRV_0 +183 0x0190 //RX_FENS_RESRV_1 +184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +187 0x0002 //RX_EXTRA_NS_L +188 0x0800 //RX_EXTRA_NS_A +189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +190 0x7000 //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +192 0x199A //RX_A_POST_FLT +193 0x0000 //RX_LMT_THRD +194 0x4000 //RX_LMT_ALPHA +195 0x0014 //RX_FDEQ_SUBNUM +196 0x4840 //RX_FDEQ_GAIN_0 +197 0x3E3E //RX_FDEQ_GAIN_1 +198 0x4E62 //RX_FDEQ_GAIN_2 +199 0x6C7A //RX_FDEQ_GAIN_3 +200 0x8690 //RX_FDEQ_GAIN_4 +201 0x867E //RX_FDEQ_GAIN_5 +202 0x7E7E //RX_FDEQ_GAIN_6 +203 0x8080 //RX_FDEQ_GAIN_7 +204 0x8088 //RX_FDEQ_GAIN_8 +205 0x838B //RX_FDEQ_GAIN_9 +206 0x4848 //RX_FDEQ_GAIN_10 +207 0x4848 //RX_FDEQ_GAIN_11 +208 0x4848 //RX_FDEQ_GAIN_12 +209 0x4848 //RX_FDEQ_GAIN_13 +210 0x4848 //RX_FDEQ_GAIN_14 +211 0x4848 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0202 //RX_FDEQ_BIN_0 +221 0x0203 //RX_FDEQ_BIN_1 +222 0x0303 //RX_FDEQ_BIN_2 +223 0x0304 //RX_FDEQ_BIN_3 +224 0x0405 //RX_FDEQ_BIN_4 +225 0x0506 //RX_FDEQ_BIN_5 +226 0x0708 //RX_FDEQ_BIN_6 +227 0x090A //RX_FDEQ_BIN_7 +228 0x0B0C //RX_FDEQ_BIN_8 +229 0x0D08 //RX_FDEQ_BIN_9 +230 0x0000 //RX_FDEQ_BIN_10 +231 0x0000 //RX_FDEQ_BIN_11 +232 0x0000 //RX_FDEQ_BIN_12 +233 0x0000 //RX_FDEQ_BIN_13 +234 0x0000 //RX_FDEQ_BIN_14 +235 0x0000 //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x4000 //RX_FDEQ_RESRV_0 +245 0x0320 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0030 //RX_FDDRC_BAND_MARGIN_1 +248 0x0050 //RX_FDDRC_BAND_MARGIN_2 +249 0x0080 //RX_FDDRC_BAND_MARGIN_3 +250 0x0007 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x5000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x6400 //RX_FDDRC_THRD_3_2 +258 0x6400 //RX_FDDRC_THRD_3_3 +259 0x2000 //RX_FDDRC_SLANT_0_0 +260 0x2000 //RX_FDDRC_SLANT_0_1 +261 0x2000 //RX_FDDRC_SLANT_0_2 +262 0x2000 //RX_FDDRC_SLANT_0_3 +263 0x5333 //RX_FDDRC_SLANT_1_0 +264 0x5333 //RX_FDDRC_SLANT_1_1 +265 0x5333 //RX_FDDRC_SLANT_1_2 +266 0x5333 //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +268 0x0002 //RX_FILTINDX +269 0x0000 //RX_TDDRC_THRD_0 +270 0x0000 //RX_TDDRC_THRD_1 +271 0x1800 //RX_TDDRC_THRD_2 +272 0x1800 //RX_TDDRC_THRD_3 +273 0x3000 //RX_TDDRC_SLANT_0 +274 0x6E00 //RX_TDDRC_SLANT_1 +275 0x1000 //RX_TDDRC_ALPHA_UP_0 +276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x199A //RX_TDDRC_HMNC_GAIN +279 0x0001 //RX_TDDRC_SMT_FLAG +280 0x0CCD //RX_TDDRC_SMT_W +281 0x05A0 //RX_TDDRC_DRC_GAIN +282 0x7C00 //RX_LAMBDA_PKA_FP +283 0x13E0 //RX_TPKA_FP +284 0x0080 //RX_MIN_G_FP +285 0x2000 //RX_MAX_G_FP +286 0x000A //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 +288 0x0000 //RX_MAXLEVEL_CNG +289 0x3000 //RX_BWE_UV_TH +290 0x3000 //RX_BWE_UV_TH2 +291 0x1800 //RX_BWE_UV_TH3 +292 0x1000 //RX_BWE_V_TH +293 0x04CD //RX_BWE_GAIN1_V_TH1 +294 0x0F33 //RX_BWE_GAIN1_V_TH2 +295 0x7333 //RX_BWE_UV_EQ +296 0x199A //RX_BWE_V_EQ +297 0x7333 //RX_BWE_TONE_TH +298 0x0004 //RX_BWE_UV_HOLD_T +299 0x6CCD //RX_BWE_GAIN2_ALPHA +300 0x799A //RX_BWE_GAIN3_ALPHA +301 0x001E //RX_BWE_CUTOFF +302 0x3000 //RX_BWE_GAINFILL +303 0x3200 //RX_BWE_MAXTH_TONE +304 0x2000 //RX_BWE_EQ_0 +305 0x2000 //RX_BWE_EQ_1 +306 0x2000 //RX_BWE_EQ_2 +307 0x2000 //RX_BWE_EQ_3 +308 0x2000 //RX_BWE_EQ_4 +309 0x2000 //RX_BWE_EQ_5 +310 0x2000 //RX_BWE_EQ_6 +311 0x0000 //RX_BWE_RESRV_0 +312 0x0000 //RX_BWE_RESRV_1 +313 0x0000 //RX_BWE_RESRV_2 +#VOL 0 +163 0x1000 //RX_TDDRC_ALPHA_UP_1 +164 0x1000 //RX_TDDRC_ALPHA_UP_2 +165 0x1000 //RX_TDDRC_ALPHA_UP_3 +166 0x1000 //RX_TDDRC_ALPHA_UP_4 +184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +190 0x7000 //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +269 0x0000 //RX_TDDRC_THRD_0 +270 0x0000 //RX_TDDRC_THRD_1 +271 0x1800 //RX_TDDRC_THRD_2 +272 0x1800 //RX_TDDRC_THRD_3 +273 0x3000 //RX_TDDRC_SLANT_0 +274 0x6E00 //RX_TDDRC_SLANT_1 +275 0x1000 //RX_TDDRC_ALPHA_UP_0 +276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x199A //RX_TDDRC_HMNC_GAIN +279 0x0001 //RX_TDDRC_SMT_FLAG +280 0x0CCD //RX_TDDRC_SMT_W +281 0x05A0 //RX_TDDRC_DRC_GAIN +195 0x0014 //RX_FDEQ_SUBNUM +196 0x4840 //RX_FDEQ_GAIN_0 +197 0x3E3E //RX_FDEQ_GAIN_1 +198 0x4E62 //RX_FDEQ_GAIN_2 +199 0x6C7A //RX_FDEQ_GAIN_3 +200 0x8690 //RX_FDEQ_GAIN_4 +201 0x867E //RX_FDEQ_GAIN_5 +202 0x7E7E //RX_FDEQ_GAIN_6 +203 0x8080 //RX_FDEQ_GAIN_7 +204 0x8088 //RX_FDEQ_GAIN_8 +205 0x838B //RX_FDEQ_GAIN_9 +206 0x4848 //RX_FDEQ_GAIN_10 +207 0x4848 //RX_FDEQ_GAIN_11 +208 0x4848 //RX_FDEQ_GAIN_12 +209 0x4848 //RX_FDEQ_GAIN_13 +210 0x4848 //RX_FDEQ_GAIN_14 +211 0x4848 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0202 //RX_FDEQ_BIN_0 +221 0x0203 //RX_FDEQ_BIN_1 +222 0x0303 //RX_FDEQ_BIN_2 +223 0x0304 //RX_FDEQ_BIN_3 +224 0x0405 //RX_FDEQ_BIN_4 +225 0x0506 //RX_FDEQ_BIN_5 +226 0x0708 //RX_FDEQ_BIN_6 +227 0x090A //RX_FDEQ_BIN_7 +228 0x0B0C //RX_FDEQ_BIN_8 +229 0x0D08 //RX_FDEQ_BIN_9 +230 0x0000 //RX_FDEQ_BIN_10 +231 0x0000 //RX_FDEQ_BIN_11 +232 0x0000 //RX_FDEQ_BIN_12 +233 0x0000 //RX_FDEQ_BIN_13 +234 0x0000 //RX_FDEQ_BIN_14 +235 0x0000 //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x4000 //RX_FDEQ_RESRV_0 +245 0x0320 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0030 //RX_FDDRC_BAND_MARGIN_1 +248 0x0050 //RX_FDDRC_BAND_MARGIN_2 +249 0x0080 //RX_FDDRC_BAND_MARGIN_3 +250 0x0007 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x5000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x6400 //RX_FDDRC_THRD_3_2 +258 0x6400 //RX_FDDRC_THRD_3_3 +259 0x2000 //RX_FDDRC_SLANT_0_0 +260 0x2000 //RX_FDDRC_SLANT_0_1 +261 0x2000 //RX_FDDRC_SLANT_0_2 +262 0x2000 //RX_FDDRC_SLANT_0_3 +263 0x5333 //RX_FDDRC_SLANT_1_0 +264 0x5333 //RX_FDDRC_SLANT_1_1 +265 0x5333 //RX_FDDRC_SLANT_1_2 +266 0x5333 //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +286 0x000A //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 +#VOL 1 +163 0x1000 //RX_TDDRC_ALPHA_UP_1 +164 0x1000 //RX_TDDRC_ALPHA_UP_2 +165 0x1000 //RX_TDDRC_ALPHA_UP_3 +166 0x1000 //RX_TDDRC_ALPHA_UP_4 +184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +190 0x7000 //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +269 0x0000 //RX_TDDRC_THRD_0 +270 0x0000 //RX_TDDRC_THRD_1 +271 0x1800 //RX_TDDRC_THRD_2 +272 0x1800 //RX_TDDRC_THRD_3 +273 0x3000 //RX_TDDRC_SLANT_0 +274 0x6E00 //RX_TDDRC_SLANT_1 +275 0x1000 //RX_TDDRC_ALPHA_UP_0 +276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x199A //RX_TDDRC_HMNC_GAIN +279 0x0001 //RX_TDDRC_SMT_FLAG +280 0x0CCD //RX_TDDRC_SMT_W +281 0x055F //RX_TDDRC_DRC_GAIN +195 0x0014 //RX_FDEQ_SUBNUM +196 0x4840 //RX_FDEQ_GAIN_0 +197 0x3E3E //RX_FDEQ_GAIN_1 +198 0x4E62 //RX_FDEQ_GAIN_2 +199 0x6C7A //RX_FDEQ_GAIN_3 +200 0x8690 //RX_FDEQ_GAIN_4 +201 0x867E //RX_FDEQ_GAIN_5 +202 0x7E7E //RX_FDEQ_GAIN_6 +203 0x8080 //RX_FDEQ_GAIN_7 +204 0x8088 //RX_FDEQ_GAIN_8 +205 0x838B //RX_FDEQ_GAIN_9 +206 0x4848 //RX_FDEQ_GAIN_10 +207 0x4848 //RX_FDEQ_GAIN_11 +208 0x4848 //RX_FDEQ_GAIN_12 +209 0x4848 //RX_FDEQ_GAIN_13 +210 0x4848 //RX_FDEQ_GAIN_14 +211 0x4848 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0202 //RX_FDEQ_BIN_0 +221 0x0203 //RX_FDEQ_BIN_1 +222 0x0303 //RX_FDEQ_BIN_2 +223 0x0304 //RX_FDEQ_BIN_3 +224 0x0405 //RX_FDEQ_BIN_4 +225 0x0506 //RX_FDEQ_BIN_5 +226 0x0708 //RX_FDEQ_BIN_6 +227 0x090A //RX_FDEQ_BIN_7 +228 0x0B0C //RX_FDEQ_BIN_8 +229 0x0D08 //RX_FDEQ_BIN_9 +230 0x0000 //RX_FDEQ_BIN_10 +231 0x0000 //RX_FDEQ_BIN_11 +232 0x0000 //RX_FDEQ_BIN_12 +233 0x0000 //RX_FDEQ_BIN_13 +234 0x0000 //RX_FDEQ_BIN_14 +235 0x0000 //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x4000 //RX_FDEQ_RESRV_0 +245 0x0320 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0030 //RX_FDDRC_BAND_MARGIN_1 +248 0x0050 //RX_FDDRC_BAND_MARGIN_2 +249 0x0080 //RX_FDDRC_BAND_MARGIN_3 +250 0x0007 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x5000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x6400 //RX_FDDRC_THRD_3_2 +258 0x6400 //RX_FDDRC_THRD_3_3 +259 0x2000 //RX_FDDRC_SLANT_0_0 +260 0x2000 //RX_FDDRC_SLANT_0_1 +261 0x2000 //RX_FDDRC_SLANT_0_2 +262 0x2000 //RX_FDDRC_SLANT_0_3 +263 0x5333 //RX_FDDRC_SLANT_1_0 +264 0x5333 //RX_FDDRC_SLANT_1_1 +265 0x5333 //RX_FDDRC_SLANT_1_2 +266 0x5333 //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +286 0x0011 //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 +#VOL 2 +163 0x1000 //RX_TDDRC_ALPHA_UP_1 +164 0x1000 //RX_TDDRC_ALPHA_UP_2 +165 0x1000 //RX_TDDRC_ALPHA_UP_3 +166 0x1000 //RX_TDDRC_ALPHA_UP_4 +184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +190 0x7000 //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +269 0x0000 //RX_TDDRC_THRD_0 +270 0x0000 //RX_TDDRC_THRD_1 +271 0x1800 //RX_TDDRC_THRD_2 +272 0x1800 //RX_TDDRC_THRD_3 +273 0x3000 //RX_TDDRC_SLANT_0 +274 0x6E00 //RX_TDDRC_SLANT_1 +275 0x1000 //RX_TDDRC_ALPHA_UP_0 +276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x199A //RX_TDDRC_HMNC_GAIN +279 0x0001 //RX_TDDRC_SMT_FLAG +280 0x0CCD //RX_TDDRC_SMT_W +281 0x055F //RX_TDDRC_DRC_GAIN +195 0x0014 //RX_FDEQ_SUBNUM +196 0x4840 //RX_FDEQ_GAIN_0 +197 0x3E3E //RX_FDEQ_GAIN_1 +198 0x4E62 //RX_FDEQ_GAIN_2 +199 0x6C7A //RX_FDEQ_GAIN_3 +200 0x8690 //RX_FDEQ_GAIN_4 +201 0x867E //RX_FDEQ_GAIN_5 +202 0x7E7E //RX_FDEQ_GAIN_6 +203 0x8080 //RX_FDEQ_GAIN_7 +204 0x8088 //RX_FDEQ_GAIN_8 +205 0x838B //RX_FDEQ_GAIN_9 +206 0x4848 //RX_FDEQ_GAIN_10 +207 0x4848 //RX_FDEQ_GAIN_11 +208 0x4848 //RX_FDEQ_GAIN_12 +209 0x4848 //RX_FDEQ_GAIN_13 +210 0x4848 //RX_FDEQ_GAIN_14 +211 0x4848 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0202 //RX_FDEQ_BIN_0 +221 0x0203 //RX_FDEQ_BIN_1 +222 0x0303 //RX_FDEQ_BIN_2 +223 0x0304 //RX_FDEQ_BIN_3 +224 0x0405 //RX_FDEQ_BIN_4 +225 0x0506 //RX_FDEQ_BIN_5 +226 0x0708 //RX_FDEQ_BIN_6 +227 0x090A //RX_FDEQ_BIN_7 +228 0x0B0C //RX_FDEQ_BIN_8 +229 0x0D08 //RX_FDEQ_BIN_9 +230 0x0000 //RX_FDEQ_BIN_10 +231 0x0000 //RX_FDEQ_BIN_11 +232 0x0000 //RX_FDEQ_BIN_12 +233 0x0000 //RX_FDEQ_BIN_13 +234 0x0000 //RX_FDEQ_BIN_14 +235 0x0000 //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x4000 //RX_FDEQ_RESRV_0 +245 0x0320 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0030 //RX_FDDRC_BAND_MARGIN_1 +248 0x0050 //RX_FDDRC_BAND_MARGIN_2 +249 0x0080 //RX_FDDRC_BAND_MARGIN_3 +250 0x0007 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x5000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x6400 //RX_FDDRC_THRD_3_2 +258 0x6400 //RX_FDDRC_THRD_3_3 +259 0x2000 //RX_FDDRC_SLANT_0_0 +260 0x2000 //RX_FDDRC_SLANT_0_1 +261 0x2000 //RX_FDDRC_SLANT_0_2 +262 0x2000 //RX_FDDRC_SLANT_0_3 +263 0x5333 //RX_FDDRC_SLANT_1_0 +264 0x5333 //RX_FDDRC_SLANT_1_1 +265 0x5333 //RX_FDDRC_SLANT_1_2 +266 0x5333 //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +286 0x001C //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 +#VOL 3 +163 0x1000 //RX_TDDRC_ALPHA_UP_1 +164 0x1000 //RX_TDDRC_ALPHA_UP_2 +165 0x1000 //RX_TDDRC_ALPHA_UP_3 +166 0x1000 //RX_TDDRC_ALPHA_UP_4 +184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +190 0x7000 //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +269 0x0000 //RX_TDDRC_THRD_0 +270 0x0000 //RX_TDDRC_THRD_1 +271 0x1800 //RX_TDDRC_THRD_2 +272 0x1800 //RX_TDDRC_THRD_3 +273 0x3000 //RX_TDDRC_SLANT_0 +274 0x6E00 //RX_TDDRC_SLANT_1 +275 0x1000 //RX_TDDRC_ALPHA_UP_0 +276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x199A //RX_TDDRC_HMNC_GAIN +279 0x0001 //RX_TDDRC_SMT_FLAG +280 0x0CCD //RX_TDDRC_SMT_W +281 0x055F //RX_TDDRC_DRC_GAIN +195 0x0014 //RX_FDEQ_SUBNUM +196 0x4840 //RX_FDEQ_GAIN_0 +197 0x3E3E //RX_FDEQ_GAIN_1 +198 0x4E62 //RX_FDEQ_GAIN_2 +199 0x6C7A //RX_FDEQ_GAIN_3 +200 0x8690 //RX_FDEQ_GAIN_4 +201 0x867E //RX_FDEQ_GAIN_5 +202 0x7E7E //RX_FDEQ_GAIN_6 +203 0x8080 //RX_FDEQ_GAIN_7 +204 0x8088 //RX_FDEQ_GAIN_8 +205 0x838B //RX_FDEQ_GAIN_9 +206 0x4848 //RX_FDEQ_GAIN_10 +207 0x4848 //RX_FDEQ_GAIN_11 +208 0x4848 //RX_FDEQ_GAIN_12 +209 0x4848 //RX_FDEQ_GAIN_13 +210 0x4848 //RX_FDEQ_GAIN_14 +211 0x4848 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0202 //RX_FDEQ_BIN_0 +221 0x0203 //RX_FDEQ_BIN_1 +222 0x0303 //RX_FDEQ_BIN_2 +223 0x0304 //RX_FDEQ_BIN_3 +224 0x0405 //RX_FDEQ_BIN_4 +225 0x0506 //RX_FDEQ_BIN_5 +226 0x0708 //RX_FDEQ_BIN_6 +227 0x090A //RX_FDEQ_BIN_7 +228 0x0B0C //RX_FDEQ_BIN_8 +229 0x0D08 //RX_FDEQ_BIN_9 +230 0x0000 //RX_FDEQ_BIN_10 +231 0x0000 //RX_FDEQ_BIN_11 +232 0x0000 //RX_FDEQ_BIN_12 +233 0x0000 //RX_FDEQ_BIN_13 +234 0x0000 //RX_FDEQ_BIN_14 +235 0x0000 //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x4000 //RX_FDEQ_RESRV_0 +245 0x0320 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0030 //RX_FDDRC_BAND_MARGIN_1 +248 0x0050 //RX_FDDRC_BAND_MARGIN_2 +249 0x0080 //RX_FDDRC_BAND_MARGIN_3 +250 0x0007 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x5000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x6400 //RX_FDDRC_THRD_3_2 +258 0x6400 //RX_FDDRC_THRD_3_3 +259 0x2000 //RX_FDDRC_SLANT_0_0 +260 0x2000 //RX_FDDRC_SLANT_0_1 +261 0x2000 //RX_FDDRC_SLANT_0_2 +262 0x2000 //RX_FDDRC_SLANT_0_3 +263 0x5333 //RX_FDDRC_SLANT_1_0 +264 0x5333 //RX_FDDRC_SLANT_1_1 +265 0x5333 //RX_FDDRC_SLANT_1_2 +266 0x5333 //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +286 0x002E //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 +#VOL 4 +163 0x1000 //RX_TDDRC_ALPHA_UP_1 +164 0x1000 //RX_TDDRC_ALPHA_UP_2 +165 0x1000 //RX_TDDRC_ALPHA_UP_3 +166 0x1000 //RX_TDDRC_ALPHA_UP_4 +184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +190 0x7000 //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +269 0x0000 //RX_TDDRC_THRD_0 +270 0x0000 //RX_TDDRC_THRD_1 +271 0x1800 //RX_TDDRC_THRD_2 +272 0x1800 //RX_TDDRC_THRD_3 +273 0x3000 //RX_TDDRC_SLANT_0 +274 0x6E00 //RX_TDDRC_SLANT_1 +275 0x1000 //RX_TDDRC_ALPHA_UP_0 +276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x199A //RX_TDDRC_HMNC_GAIN +279 0x0001 //RX_TDDRC_SMT_FLAG +280 0x0CCD //RX_TDDRC_SMT_W +281 0x055F //RX_TDDRC_DRC_GAIN +195 0x0014 //RX_FDEQ_SUBNUM +196 0x4840 //RX_FDEQ_GAIN_0 +197 0x3E3E //RX_FDEQ_GAIN_1 +198 0x4E62 //RX_FDEQ_GAIN_2 +199 0x6C7A //RX_FDEQ_GAIN_3 +200 0x8690 //RX_FDEQ_GAIN_4 +201 0x867E //RX_FDEQ_GAIN_5 +202 0x7E7E //RX_FDEQ_GAIN_6 +203 0x8080 //RX_FDEQ_GAIN_7 +204 0x8088 //RX_FDEQ_GAIN_8 +205 0x838B //RX_FDEQ_GAIN_9 +206 0x4848 //RX_FDEQ_GAIN_10 +207 0x4848 //RX_FDEQ_GAIN_11 +208 0x4848 //RX_FDEQ_GAIN_12 +209 0x4848 //RX_FDEQ_GAIN_13 +210 0x4848 //RX_FDEQ_GAIN_14 +211 0x4848 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0202 //RX_FDEQ_BIN_0 +221 0x0203 //RX_FDEQ_BIN_1 +222 0x0303 //RX_FDEQ_BIN_2 +223 0x0304 //RX_FDEQ_BIN_3 +224 0x0405 //RX_FDEQ_BIN_4 +225 0x0506 //RX_FDEQ_BIN_5 +226 0x0708 //RX_FDEQ_BIN_6 +227 0x090A //RX_FDEQ_BIN_7 +228 0x0B0C //RX_FDEQ_BIN_8 +229 0x0D08 //RX_FDEQ_BIN_9 +230 0x0000 //RX_FDEQ_BIN_10 +231 0x0000 //RX_FDEQ_BIN_11 +232 0x0000 //RX_FDEQ_BIN_12 +233 0x0000 //RX_FDEQ_BIN_13 +234 0x0000 //RX_FDEQ_BIN_14 +235 0x0000 //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x4000 //RX_FDEQ_RESRV_0 +245 0x0320 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0030 //RX_FDDRC_BAND_MARGIN_1 +248 0x0050 //RX_FDDRC_BAND_MARGIN_2 +249 0x0080 //RX_FDDRC_BAND_MARGIN_3 +250 0x0007 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x5000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x6400 //RX_FDDRC_THRD_3_2 +258 0x6400 //RX_FDDRC_THRD_3_3 +259 0x2000 //RX_FDDRC_SLANT_0_0 +260 0x2000 //RX_FDDRC_SLANT_0_1 +261 0x2000 //RX_FDDRC_SLANT_0_2 +262 0x2000 //RX_FDDRC_SLANT_0_3 +263 0x5333 //RX_FDDRC_SLANT_1_0 +264 0x5333 //RX_FDDRC_SLANT_1_1 +265 0x5333 //RX_FDDRC_SLANT_1_2 +266 0x5333 //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +286 0x004B //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 +#VOL 5 +163 0x1000 //RX_TDDRC_ALPHA_UP_1 +164 0x1000 //RX_TDDRC_ALPHA_UP_2 +165 0x1000 //RX_TDDRC_ALPHA_UP_3 +166 0x1000 //RX_TDDRC_ALPHA_UP_4 +184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +190 0x7000 //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +269 0x0000 //RX_TDDRC_THRD_0 +270 0x0000 //RX_TDDRC_THRD_1 +271 0x1800 //RX_TDDRC_THRD_2 +272 0x1800 //RX_TDDRC_THRD_3 +273 0x3000 //RX_TDDRC_SLANT_0 +274 0x6E00 //RX_TDDRC_SLANT_1 +275 0x1000 //RX_TDDRC_ALPHA_UP_0 +276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x199A //RX_TDDRC_HMNC_GAIN +279 0x0001 //RX_TDDRC_SMT_FLAG +280 0x0CCD //RX_TDDRC_SMT_W +281 0x055F //RX_TDDRC_DRC_GAIN +195 0x0014 //RX_FDEQ_SUBNUM +196 0x4840 //RX_FDEQ_GAIN_0 +197 0x3E3E //RX_FDEQ_GAIN_1 +198 0x4E62 //RX_FDEQ_GAIN_2 +199 0x6C7A //RX_FDEQ_GAIN_3 +200 0x8690 //RX_FDEQ_GAIN_4 +201 0x867E //RX_FDEQ_GAIN_5 +202 0x7E7E //RX_FDEQ_GAIN_6 +203 0x8080 //RX_FDEQ_GAIN_7 +204 0x8088 //RX_FDEQ_GAIN_8 +205 0x838B //RX_FDEQ_GAIN_9 +206 0x4848 //RX_FDEQ_GAIN_10 +207 0x4848 //RX_FDEQ_GAIN_11 +208 0x4848 //RX_FDEQ_GAIN_12 +209 0x4848 //RX_FDEQ_GAIN_13 +210 0x4848 //RX_FDEQ_GAIN_14 +211 0x4848 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0202 //RX_FDEQ_BIN_0 +221 0x0203 //RX_FDEQ_BIN_1 +222 0x0303 //RX_FDEQ_BIN_2 +223 0x0304 //RX_FDEQ_BIN_3 +224 0x0405 //RX_FDEQ_BIN_4 +225 0x0506 //RX_FDEQ_BIN_5 +226 0x0708 //RX_FDEQ_BIN_6 +227 0x090A //RX_FDEQ_BIN_7 +228 0x0B0C //RX_FDEQ_BIN_8 +229 0x0D08 //RX_FDEQ_BIN_9 +230 0x0000 //RX_FDEQ_BIN_10 +231 0x0000 //RX_FDEQ_BIN_11 +232 0x0000 //RX_FDEQ_BIN_12 +233 0x0000 //RX_FDEQ_BIN_13 +234 0x0000 //RX_FDEQ_BIN_14 +235 0x0000 //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x4000 //RX_FDEQ_RESRV_0 +245 0x0320 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0030 //RX_FDDRC_BAND_MARGIN_1 +248 0x0050 //RX_FDDRC_BAND_MARGIN_2 +249 0x0080 //RX_FDDRC_BAND_MARGIN_3 +250 0x0007 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x5000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x6400 //RX_FDDRC_THRD_3_2 +258 0x6400 //RX_FDDRC_THRD_3_3 +259 0x2000 //RX_FDDRC_SLANT_0_0 +260 0x2000 //RX_FDDRC_SLANT_0_1 +261 0x2000 //RX_FDDRC_SLANT_0_2 +262 0x2000 //RX_FDDRC_SLANT_0_3 +263 0x5333 //RX_FDDRC_SLANT_1_0 +264 0x5333 //RX_FDDRC_SLANT_1_1 +265 0x5333 //RX_FDDRC_SLANT_1_2 +266 0x5333 //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +286 0x007B //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 +#VOL 6 +163 0x1000 //RX_TDDRC_ALPHA_UP_1 +164 0x1000 //RX_TDDRC_ALPHA_UP_2 +165 0x1000 //RX_TDDRC_ALPHA_UP_3 +166 0x1000 //RX_TDDRC_ALPHA_UP_4 +184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +190 0x7000 //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +269 0x0000 //RX_TDDRC_THRD_0 +270 0x0000 //RX_TDDRC_THRD_1 +271 0x1800 //RX_TDDRC_THRD_2 +272 0x1800 //RX_TDDRC_THRD_3 +273 0x3000 //RX_TDDRC_SLANT_0 +274 0x6E00 //RX_TDDRC_SLANT_1 +275 0x1000 //RX_TDDRC_ALPHA_UP_0 +276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x199A //RX_TDDRC_HMNC_GAIN +279 0x0001 //RX_TDDRC_SMT_FLAG +280 0x0CCD //RX_TDDRC_SMT_W +281 0x055F //RX_TDDRC_DRC_GAIN +195 0x0014 //RX_FDEQ_SUBNUM +196 0x4840 //RX_FDEQ_GAIN_0 +197 0x3E3E //RX_FDEQ_GAIN_1 +198 0x4E62 //RX_FDEQ_GAIN_2 +199 0x6C7A //RX_FDEQ_GAIN_3 +200 0x8690 //RX_FDEQ_GAIN_4 +201 0x867E //RX_FDEQ_GAIN_5 +202 0x7E7E //RX_FDEQ_GAIN_6 +203 0x8080 //RX_FDEQ_GAIN_7 +204 0x8088 //RX_FDEQ_GAIN_8 +205 0x838B //RX_FDEQ_GAIN_9 +206 0x4848 //RX_FDEQ_GAIN_10 +207 0x4848 //RX_FDEQ_GAIN_11 +208 0x4848 //RX_FDEQ_GAIN_12 +209 0x4848 //RX_FDEQ_GAIN_13 +210 0x4848 //RX_FDEQ_GAIN_14 +211 0x4848 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0202 //RX_FDEQ_BIN_0 +221 0x0203 //RX_FDEQ_BIN_1 +222 0x0303 //RX_FDEQ_BIN_2 +223 0x0304 //RX_FDEQ_BIN_3 +224 0x0405 //RX_FDEQ_BIN_4 +225 0x0506 //RX_FDEQ_BIN_5 +226 0x0708 //RX_FDEQ_BIN_6 +227 0x090A //RX_FDEQ_BIN_7 +228 0x0B0C //RX_FDEQ_BIN_8 +229 0x0D08 //RX_FDEQ_BIN_9 +230 0x0000 //RX_FDEQ_BIN_10 +231 0x0000 //RX_FDEQ_BIN_11 +232 0x0000 //RX_FDEQ_BIN_12 +233 0x0000 //RX_FDEQ_BIN_13 +234 0x0000 //RX_FDEQ_BIN_14 +235 0x0000 //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x4000 //RX_FDEQ_RESRV_0 +245 0x0320 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0030 //RX_FDDRC_BAND_MARGIN_1 +248 0x0050 //RX_FDDRC_BAND_MARGIN_2 +249 0x0080 //RX_FDDRC_BAND_MARGIN_3 +250 0x0007 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x5000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x6400 //RX_FDDRC_THRD_3_2 +258 0x6400 //RX_FDDRC_THRD_3_3 +259 0x2000 //RX_FDDRC_SLANT_0_0 +260 0x2000 //RX_FDDRC_SLANT_0_1 +261 0x2000 //RX_FDDRC_SLANT_0_2 +262 0x2000 //RX_FDDRC_SLANT_0_3 +263 0x5333 //RX_FDDRC_SLANT_1_0 +264 0x5333 //RX_FDDRC_SLANT_1_1 +265 0x5333 //RX_FDDRC_SLANT_1_2 +266 0x5333 //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +286 0x0100 //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 #CASE_NAME HANDSET-HANDSET-TMOBILE_US-WB -#PARAM_TYPE TX+RX -#TOTAL_CUSTOM_STEP 7 +#PARAM_MODE Full +#PARAM_TYPE TX+2RX +#TOTAL_CUSTOM_STEP 7+7 #TX 0 0x0000 //TX_OPERATION_MODE_0 1 0x0000 //TX_OPERATION_MODE_1 @@ -21064,7 +32069,7 @@ 18 0x0000 //TX_SYS_RESRV_2 19 0x0000 //TX_SYS_RESRV_3 20 0x0000 //TX_DIST2REF0 -21 0x009D //TX_DIST2REF1 +21 0x009C //TX_DIST2REF1 22 0x0000 //TX_DIST2REF_02 23 0x0000 //TX_DIST2REF_03 24 0x0000 //TX_DIST2REF_04 @@ -21294,16 +32299,16 @@ 248 0xF800 //TX_THR_SN_EST_6 249 0xF700 //TX_THR_SN_EST_7 250 0x0000 //TX_DELTA_THR_SN_EST_0 -251 0x0100 //TX_DELTA_THR_SN_EST_1 -252 0x01A0 //TX_DELTA_THR_SN_EST_2 +251 0x01A0 //TX_DELTA_THR_SN_EST_1 +252 0x0200 //TX_DELTA_THR_SN_EST_2 253 0x0200 //TX_DELTA_THR_SN_EST_3 -254 0x0200 //TX_DELTA_THR_SN_EST_4 -255 0x0100 //TX_DELTA_THR_SN_EST_5 -256 0x0200 //TX_DELTA_THR_SN_EST_6 +254 0x0100 //TX_DELTA_THR_SN_EST_4 +255 0x0200 //TX_DELTA_THR_SN_EST_5 +256 0x0100 //TX_DELTA_THR_SN_EST_6 257 0x0200 //TX_DELTA_THR_SN_EST_7 258 0x4000 //TX_LAMBDA_NN_EST_0 -259 0x4000 //TX_LAMBDA_NN_EST_1 -260 0x5000 //TX_LAMBDA_NN_EST_2 +259 0x5000 //TX_LAMBDA_NN_EST_1 +260 0x4000 //TX_LAMBDA_NN_EST_2 261 0x4000 //TX_LAMBDA_NN_EST_3 262 0x4000 //TX_LAMBDA_NN_EST_4 263 0x4000 //TX_LAMBDA_NN_EST_5 @@ -21325,18 +32330,18 @@ 279 0x1000 //TX_B_POST_FLT_0 280 0x4000 //TX_B_POST_FLT_1 281 0x0018 //TX_NS_LVL_CTRL_0 -282 0x001C //TX_NS_LVL_CTRL_1 -283 0x0019 //TX_NS_LVL_CTRL_2 -284 0x0018 //TX_NS_LVL_CTRL_3 -285 0x0019 //TX_NS_LVL_CTRL_4 -286 0x001A //TX_NS_LVL_CTRL_5 -287 0x001E //TX_NS_LVL_CTRL_6 +282 0x0019 //TX_NS_LVL_CTRL_1 +283 0x0018 //TX_NS_LVL_CTRL_2 +284 0x0019 //TX_NS_LVL_CTRL_3 +285 0x001A //TX_NS_LVL_CTRL_4 +286 0x001E //TX_NS_LVL_CTRL_5 +287 0x001C //TX_NS_LVL_CTRL_6 288 0x001C //TX_NS_LVL_CTRL_7 289 0x000E //TX_MIN_GAIN_S_0 -290 0x0018 //TX_MIN_GAIN_S_1 +290 0x0012 //TX_MIN_GAIN_S_1 291 0x0012 //TX_MIN_GAIN_S_2 292 0x0012 //TX_MIN_GAIN_S_3 -293 0x0012 //TX_MIN_GAIN_S_4 +293 0x0018 //TX_MIN_GAIN_S_4 294 0x0018 //TX_MIN_GAIN_S_5 295 0x0018 //TX_MIN_GAIN_S_6 296 0x0018 //TX_MIN_GAIN_S_7 @@ -21344,8 +32349,8 @@ 298 0x0000 //TX_NS_MAX_PRI_SNR_TH 299 0x0000 //TX_NMOS_SUP_MENSA 300 0x7FFF //TX_SNRI_SUP_0 -301 0x4000 //TX_SNRI_SUP_1 -302 0x5000 //TX_SNRI_SUP_2 +301 0x5000 //TX_SNRI_SUP_1 +302 0x4000 //TX_SNRI_SUP_2 303 0x4000 //TX_SNRI_SUP_3 304 0x4000 //TX_SNRI_SUP_4 305 0x4000 //TX_SNRI_SUP_5 @@ -21358,28 +32363,28 @@ 312 0x7FFF //TX_A_POST_FILT_0 313 0x2000 //TX_A_POST_FILT_1 314 0x7000 //TX_A_POST_FILT_S_0 -315 0x7000 //TX_A_POST_FILT_S_1 +315 0x3000 //TX_A_POST_FILT_S_1 316 0x3000 //TX_A_POST_FILT_S_2 -317 0x3000 //TX_A_POST_FILT_S_3 -318 0x2000 //TX_A_POST_FILT_S_4 +317 0x2000 //TX_A_POST_FILT_S_3 +318 0x7000 //TX_A_POST_FILT_S_4 319 0x7000 //TX_A_POST_FILT_S_5 320 0x7000 //TX_A_POST_FILT_S_6 321 0x7000 //TX_A_POST_FILT_S_7 322 0x1000 //TX_B_POST_FILT_0 323 0x4000 //TX_B_POST_FILT_1 -324 0x5000 //TX_B_POST_FILT_2 +324 0x4000 //TX_B_POST_FILT_2 325 0x4000 //TX_B_POST_FILT_3 326 0x4000 //TX_B_POST_FILT_4 327 0x4000 //TX_B_POST_FILT_5 -328 0x4000 //TX_B_POST_FILT_6 +328 0x5000 //TX_B_POST_FILT_6 329 0x4000 //TX_B_POST_FILT_7 330 0x4000 //TX_B_LESSCUT_RTO_S_0 331 0x6000 //TX_B_LESSCUT_RTO_S_1 332 0x6000 //TX_B_LESSCUT_RTO_S_2 333 0x6000 //TX_B_LESSCUT_RTO_S_3 -334 0x6000 //TX_B_LESSCUT_RTO_S_4 +334 0x7FFF //TX_B_LESSCUT_RTO_S_4 335 0x6000 //TX_B_LESSCUT_RTO_S_5 -336 0x7FFF //TX_B_LESSCUT_RTO_S_6 +336 0x6000 //TX_B_LESSCUT_RTO_S_6 337 0x7FFF //TX_B_LESSCUT_RTO_S_7 338 0x7C29 //TX_LAMBDA_PFILT 339 0x7C29 //TX_LAMBDA_PFILT_S_0 @@ -21423,10 +32428,10 @@ 377 0x4E20 //TX_NOISE_TH_5_4 378 0x21E8 //TX_NOISE_TH_6 379 0x0014 //TX_MINENOISE_TH -380 0x4000 //TX_MINENOISE_MIC0_TH_MTS -381 0xFFEE //TX_MINENOISE_MIC0_TH_EXP -382 0x6000 //TX_MINENOISE_MIC0_S_TH_MTS -383 0xFFF3 //TX_MINENOISE_MIC0_S_TH_EXP +380 0xD508 //TX_MORENS_TFMASK_TH +381 0x0001 //TX_DRC_QUIET_FLOOR +382 0x6D60 //TX_RATIODTL_CUT_TH +383 0x0DAC //TX_DT_CUT_K1 384 0x00A5 //TX_OUT_ENER_S_TH_CLEAN 385 0x00A5 //TX_OUT_ENER_S_TH_LESSCLEAN 386 0x00A5 //TX_OUT_ENER_S_TH_NOISY @@ -21434,15 +32439,15 @@ 388 0x00CE //TX_OUT_ENER_TH_SPEECH 389 0x2000 //TX_SN_NPB_GAIN 390 0x0000 //TX_NN_NPB_GAIN -391 0x0000 //TX_CSX_ALPHA_0 -392 0x0000 //TX_CSX_ALPHA_1 -393 0x0000 //TX_CSX_ALPHA_2 -394 0x0000 //TX_CSX_ALPHA_3 -395 0x0800 //TX_MU_ARSP_EST -396 0x00C8 //TX_P_OUTBEAM_MIN_TH +391 0x3000 //TX_POST_MASK_SUP_HSNE +392 0x07D0 //TX_TAIL_DET_TH +393 0x4000 //TX_B_LESSCUT_RTO_WTA +394 0x0000 //TX_MEL_G_R +395 0x0080 //TX_SUPHIGH_TH +396 0x4000 //TX_MASK_G_R 397 0x0002 //TX_EXTRA_NS_L -398 0x0800 //TX_EXTRA_NS_A -399 0x0005 //TX_VR_NOISE_FLOOR_TH +398 0x1800 //TX_C_POST_FLT_MASK +399 0x7FFF //TX_A_POST_FLT_WNS 400 0x0148 //TX_MIN_G_LOW300HZ 401 0x0004 //TX_MAXLEVEL_CNG 402 0x00B4 //TX_STN_NOISE_TH @@ -21557,16 +32562,16 @@ 511 0x6666 //TX_MIC_TO_BFGAIN 512 0x0000 //TX_MICTOBFGAIN0 513 0x0000 //TX_FASTMUE_TH -514 0x0000 //TX_DERVB_LEN_0 -515 0x0000 //TX_DERVB_LEN_1 -516 0x0000 //TX_RHO_DERVB -517 0x0000 //TX_MIC_INDX_DERVB -518 0x0000 //TX_MU_DERVB -519 0x0000 //TX_DR_RESRV_0 -520 0x0000 //TX_DR_RESRV_1 -521 0x0000 //TX_DR_RESRV_2 -522 0x0000 //TX_DR_RESRV_3 -523 0x0000 //TX_DR_RESRV_4 +514 0x3000 //TX_DEREVERB_LF_MU +515 0x34CD //TX_DEREVERB_HF_MU +516 0x0007 //TX_DEREVERB_DELAY +517 0x0004 //TX_DEREVERB_COEF_LEN +518 0x0003 //TX_DEREVERB_DNR +519 0x0000 //TX_DEREVERB_ALPHA +520 0x0000 //TX_DEREVERB_BETA +521 0x0000 //TX_GSC_RTOL_TH +522 0x0000 //TX_GSC_RTOH_TH +523 0x7E2C //TX_WIDE2_MEANHTH 524 0x0000 //TX_DR_RESRV_5 525 0x0000 //TX_DR_RESRV_6 526 0x0000 //TX_DR_RESRV_7 @@ -21614,16 +32619,16 @@ 568 0x5048 //TX_FDEQ_GAIN_1 569 0x4C4C //TX_FDEQ_GAIN_2 570 0x474A //TX_FDEQ_GAIN_3 -571 0x4742 //TX_FDEQ_GAIN_4 -572 0x4241 //TX_FDEQ_GAIN_5 -573 0x403F //TX_FDEQ_GAIN_6 -574 0x433F //TX_FDEQ_GAIN_7 -575 0x3938 //TX_FDEQ_GAIN_8 -576 0x3434 //TX_FDEQ_GAIN_9 -577 0x3530 //TX_FDEQ_GAIN_10 -578 0x3033 //TX_FDEQ_GAIN_11 -579 0x3535 //TX_FDEQ_GAIN_12 -580 0x3D48 //TX_FDEQ_GAIN_13 +571 0x473F //TX_FDEQ_GAIN_4 +572 0x4245 //TX_FDEQ_GAIN_5 +573 0x4B53 //TX_FDEQ_GAIN_6 +574 0x564A //TX_FDEQ_GAIN_7 +575 0x3D3A //TX_FDEQ_GAIN_8 +576 0x3838 //TX_FDEQ_GAIN_9 +577 0x3836 //TX_FDEQ_GAIN_10 +578 0x3633 //TX_FDEQ_GAIN_11 +579 0x3838 //TX_FDEQ_GAIN_12 +580 0x4048 //TX_FDEQ_GAIN_13 581 0x4848 //TX_FDEQ_GAIN_14 582 0x4848 //TX_FDEQ_GAIN_15 583 0x4848 //TX_FDEQ_GAIN_16 @@ -21667,12 +32672,12 @@ 621 0x4848 //TX_PREEQ_GAIN_MIC0_4 622 0x4848 //TX_PREEQ_GAIN_MIC0_5 623 0x4848 //TX_PREEQ_GAIN_MIC0_6 -624 0x4846 //TX_PREEQ_GAIN_MIC0_7 -625 0x4544 //TX_PREEQ_GAIN_MIC0_8 -626 0x4241 //TX_PREEQ_GAIN_MIC0_9 -627 0x403E //TX_PREEQ_GAIN_MIC0_10 -628 0x3D3C //TX_PREEQ_GAIN_MIC0_11 -629 0x3C3C //TX_PREEQ_GAIN_MIC0_12 +624 0x4848 //TX_PREEQ_GAIN_MIC0_7 +625 0x4848 //TX_PREEQ_GAIN_MIC0_8 +626 0x4848 //TX_PREEQ_GAIN_MIC0_9 +627 0x4848 //TX_PREEQ_GAIN_MIC0_10 +628 0x4848 //TX_PREEQ_GAIN_MIC0_11 +629 0x4848 //TX_PREEQ_GAIN_MIC0_12 630 0x4848 //TX_PREEQ_GAIN_MIC0_13 631 0x4848 //TX_PREEQ_GAIN_MIC0_14 632 0x4848 //TX_PREEQ_GAIN_MIC0_15 @@ -21717,11 +32722,11 @@ 671 0x4848 //TX_PREEQ_GAIN_MIC1_5 672 0x4848 //TX_PREEQ_GAIN_MIC1_6 673 0x4848 //TX_PREEQ_GAIN_MIC1_7 -674 0x484A //TX_PREEQ_GAIN_MIC1_8 -675 0x4B4C //TX_PREEQ_GAIN_MIC1_9 +674 0x4848 //TX_PREEQ_GAIN_MIC1_8 +675 0x4A4B //TX_PREEQ_GAIN_MIC1_9 676 0x4B4A //TX_PREEQ_GAIN_MIC1_10 -677 0x4A48 //TX_PREEQ_GAIN_MIC1_11 -678 0x4C4C //TX_PREEQ_GAIN_MIC1_12 +677 0x4848 //TX_PREEQ_GAIN_MIC1_11 +678 0x494C //TX_PREEQ_GAIN_MIC1_12 679 0x4C4C //TX_PREEQ_GAIN_MIC1_13 680 0x4848 //TX_PREEQ_GAIN_MIC1_14 681 0x4848 //TX_PREEQ_GAIN_MIC1_15 @@ -21819,7 +32824,7 @@ 773 0x0000 //TX_GAIN_LIMIT_0 774 0x0000 //TX_GAIN_LIMIT_1 775 0x0006 //TX_GAIN_LIMIT_2 -776 0x0006 //TX_GAIN_LIMIT_3 +776 0x0005 //TX_GAIN_LIMIT_3 777 0x7F5B //TX_BVE_NOVAD0_ALPHADOWN 778 0x7FDE //TX_BVE_VAD0_ALPHAUP 779 0x7F3A //TX_BVE_VAD0_ALPHADOWN @@ -21940,8 +32945,73 @@ 894 0xC000 //TX_FASTNS_SSA_THHFL 895 0xCCCC //TX_FASTNS_SSA_THLFH 896 0xD999 //TX_FASTNS_SSA_THHFH +897 0x2339 //TX_SENDFUNC_REG_MICMUTE +898 0x0021 //TX_SENDFUNC_REG_MICMUTE1 +899 0x02BC //TX_MICMUTE_RATIO_THR +900 0x0140 //TX_MICMUTE_AMP_THR +901 0x0004 //TX_MICMUTE_HPF_IND +902 0x00C0 //TX_MICMUTE_LOG_EYR_TH +903 0x0008 //TX_MICMUTE_CVG_TIME +904 0x0008 //TX_MICMUTE_RELEASE_TIME +905 0x01FE //TX_MIC_VOLUME_MIC0MUTE +906 0x0020 //TX_MICMUTE_EPD_OFFSET_0 +907 0x001E //TX_MICMUTE_FRQ_AEC_L +908 0x7999 //TX_MICMUTE_EAD_THR +909 0x7FFF //TX_MICMUTE_LAMBDA_CB_NLE +910 0x7FFF //TX_MICMUTE_LAMBDA_RE_EST +911 0x4000 //TX_DTD_THR1_MICMUTE_0 +912 0x7000 //TX_DTD_THR1_MICMUTE_1 +913 0x7FFF //TX_DTD_THR1_MICMUTE_2 +914 0x7FFF //TX_DTD_THR1_MICMUTE_3 +915 0x6CCC //TX_DTD_THR2_MICMUTE_0 +916 0x0400 //TX_MICMUTE_MIN_EQ_RE_EST_0 +917 0x0400 //TX_MICMUTE_MIN_EQ_RE_EST_1 +918 0x1000 //TX_MICMUTE_MIN_EQ_RE_EST_2 +919 0x7FFF //TX_MICMUTE_MIN_EQ_RE_EST_3 +920 0x7FFF //TX_MICMUTE_MIN_EQ_RE_EST_4 +921 0x4000 //TX_MICMUTE_C_POST_FLT +922 0x03E8 //TX_MICMUTE_DT_CUT_K +923 0x0001 //TX_MICMUTE_DT_CUT_THR +924 0x03E8 //TX_MICMUTE_DT_CUT_K2 +925 0x0001 //TX_MICMUTE_DT_CUT_THR2 +926 0x0064 //TX_MICMUTE_DT2_HOLD_N +927 0x1000 //TX_MICMUTE_RATIODTH_THCUT +928 0x1000 //TX_MICMUTE_B_POST_FLT_ECHOL +929 0x7FFF //TX_MICMUTE_B_POST_FLT_ECHOH +930 0x0400 //TX_MICMUTE_C_POST_FLT_MASK +931 0x7999 //TX_MICMUTE_RATIODTL_CUT_TH +932 0x0258 //TX_MICMUTE_DT_CUT_K1 +933 0x0800 //TX_MICMUTE_N2_SN_EST +934 0xFC00 //TX_MICMUTE_THR_SN_EST_0 +935 0x001C //TX_MICMUTE_MIN_G_CTRL_0 +936 0x6000 //TX_MICMUTE_A_POST_FILT_S_0 +937 0x7000 //TX_MICMUTE_B_POST_FILT_0 +938 0x2710 //TX_MIC1RUB_AMP_THR +939 0x0010 //TX_MIC1MUTE_RATIO_THR +940 0x0450 //TX_MIC1MUTE_AMP_THR +941 0x0008 //TX_MIC1MUTE_CVG_TIME +942 0x0008 //TX_MIC1MUTE_RELEASE_TIME +943 0x0000 //TX_AMS_RESRV_01 +944 0x0000 //TX_AMS_RESRV_02 +945 0x0000 //TX_AMS_RESRV_03 +946 0x0000 //TX_AMS_RESRV_04 +947 0x0000 //TX_AMS_RESRV_05 +948 0x0000 //TX_AMS_RESRV_06 +949 0x0000 //TX_AMS_RESRV_07 +950 0x0000 //TX_AMS_RESRV_08 +951 0x0000 //TX_AMS_RESRV_09 +952 0x0000 //TX_AMS_RESRV_10 +953 0x0000 //TX_AMS_RESRV_11 +954 0x0000 //TX_AMS_RESRV_12 +955 0x0000 //TX_AMS_RESRV_13 +956 0x0000 //TX_AMS_RESRV_14 +957 0x0000 //TX_AMS_RESRV_15 +958 0x0000 //TX_AMS_RESRV_16 +959 0x0000 //TX_AMS_RESRV_17 +960 0x0000 //TX_AMS_RESRV_18 +961 0x0000 //TX_AMS_RESRV_19 #RX -0 0x003C //RX_RECVFUNC_MODE_0 +0 0x203C //RX_RECVFUNC_MODE_0 1 0x0000 //RX_RECVFUNC_MODE_1 2 0x0001 //RX_SAMPLINGFREQ_SIG 3 0x0001 //RX_SAMPLINGFREQ_PROC @@ -21951,7 +33021,7 @@ 7 0x1000 //RX_TDDRC_ALPHA_UP_2 8 0x1000 //RX_TDDRC_ALPHA_UP_3 9 0x1000 //RX_TDDRC_ALPHA_UP_4 -10 0x0600 //RX_PGA +10 0x0480 //RX_PGA 11 0x7FFF //RX_A_HP 12 0x4000 //RX_B_PE 13 0x7800 //RX_THR_PITCH_DET_0 @@ -21980,20 +33050,20 @@ 36 0x1000 //RX_LMT_THRD 37 0x7FDF //RX_LMT_ALPHA 38 0x001C //RX_FDEQ_SUBNUM -39 0x4840 //RX_FDEQ_GAIN_0 -40 0x4040 //RX_FDEQ_GAIN_1 -41 0x444C //RX_FDEQ_GAIN_2 -42 0x5C6C //RX_FDEQ_GAIN_3 -43 0x828B //RX_FDEQ_GAIN_4 -44 0x8F87 //RX_FDEQ_GAIN_5 -45 0x8481 //RX_FDEQ_GAIN_6 -46 0x8980 //RX_FDEQ_GAIN_7 -47 0x8383 //RX_FDEQ_GAIN_8 -48 0x7F86 //RX_FDEQ_GAIN_9 -49 0x796F //RX_FDEQ_GAIN_10 -50 0x6B66 //RX_FDEQ_GAIN_11 -51 0x625E //RX_FDEQ_GAIN_12 -52 0x5850 //RX_FDEQ_GAIN_13 +39 0x4836 //RX_FDEQ_GAIN_0 +40 0x3636 //RX_FDEQ_GAIN_1 +41 0x364C //RX_FDEQ_GAIN_2 +42 0x586E //RX_FDEQ_GAIN_3 +43 0x767A //RX_FDEQ_GAIN_4 +44 0x7978 //RX_FDEQ_GAIN_5 +45 0x7A7C //RX_FDEQ_GAIN_6 +46 0x8280 //RX_FDEQ_GAIN_7 +47 0x848C //RX_FDEQ_GAIN_8 +48 0x8E98 //RX_FDEQ_GAIN_9 +49 0x9E95 //RX_FDEQ_GAIN_10 +50 0x8686 //RX_FDEQ_GAIN_11 +51 0x7868 //RX_FDEQ_GAIN_12 +52 0x6050 //RX_FDEQ_GAIN_13 53 0x4848 //RX_FDEQ_GAIN_14 54 0x4848 //RX_FDEQ_GAIN_15 55 0x4848 //RX_FDEQ_GAIN_16 @@ -22015,9 +33085,9 @@ 71 0x0B0C //RX_FDEQ_BIN_8 72 0x0D0E //RX_FDEQ_BIN_9 73 0x0E0F //RX_FDEQ_BIN_10 -74 0x0F10 //RX_FDEQ_BIN_11 -75 0x1011 //RX_FDEQ_BIN_12 -76 0x1104 //RX_FDEQ_BIN_13 +74 0x0F0E //RX_FDEQ_BIN_11 +75 0x100D //RX_FDEQ_BIN_12 +76 0x110A //RX_FDEQ_BIN_13 77 0x0000 //RX_FDEQ_BIN_14 78 0x0000 //RX_FDEQ_BIN_15 79 0x0000 //RX_FDEQ_BIN_16 @@ -22057,20 +33127,20 @@ 113 0x0000 //RX_TDDRC_THRD_1 114 0x1800 //RX_TDDRC_THRD_2 115 0x1800 //RX_TDDRC_THRD_3 -116 0x3000 //RX_TDDRC_SLANT_0 -117 0x6E00 //RX_TDDRC_SLANT_1 +116 0x7FFF //RX_TDDRC_SLANT_0 +117 0x7FFF //RX_TDDRC_SLANT_1 118 0x1000 //RX_TDDRC_ALPHA_UP_0 119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 120 0x0000 //RX_TDDRC_HMNC_FLAG 121 0x199A //RX_TDDRC_HMNC_GAIN 122 0x0001 //RX_TDDRC_SMT_FLAG 123 0x0CCD //RX_TDDRC_SMT_W -124 0x0364 //RX_TDDRC_DRC_GAIN +124 0x0650 //RX_TDDRC_DRC_GAIN 125 0x7C00 //RX_LAMBDA_PKA_FP 126 0x13E0 //RX_TPKA_FP 127 0x0080 //RX_MIN_G_FP 128 0x2000 //RX_MAX_G_FP -129 0x000E //RX_SPK_VOL +129 0x0100 //RX_SPK_VOL 130 0x0000 //RX_VOL_RESRV_0 131 0x0000 //RX_MAXLEVEL_CNG 132 0x3000 //RX_BWE_UV_TH @@ -22113,30 +33183,30 @@ 113 0x0000 //RX_TDDRC_THRD_1 114 0x1800 //RX_TDDRC_THRD_2 115 0x1800 //RX_TDDRC_THRD_3 -116 0x3000 //RX_TDDRC_SLANT_0 -117 0x6E00 //RX_TDDRC_SLANT_1 +116 0x7FFF //RX_TDDRC_SLANT_0 +117 0x7FFF //RX_TDDRC_SLANT_1 118 0x1000 //RX_TDDRC_ALPHA_UP_0 119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 120 0x0000 //RX_TDDRC_HMNC_FLAG 121 0x199A //RX_TDDRC_HMNC_GAIN 122 0x0001 //RX_TDDRC_SMT_FLAG 123 0x0CCD //RX_TDDRC_SMT_W -124 0x0364 //RX_TDDRC_DRC_GAIN +124 0x0650 //RX_TDDRC_DRC_GAIN 38 0x001C //RX_FDEQ_SUBNUM -39 0x4840 //RX_FDEQ_GAIN_0 -40 0x4040 //RX_FDEQ_GAIN_1 -41 0x444C //RX_FDEQ_GAIN_2 -42 0x5C6C //RX_FDEQ_GAIN_3 -43 0x828B //RX_FDEQ_GAIN_4 -44 0x8F87 //RX_FDEQ_GAIN_5 -45 0x8481 //RX_FDEQ_GAIN_6 -46 0x8980 //RX_FDEQ_GAIN_7 -47 0x8383 //RX_FDEQ_GAIN_8 -48 0x7F86 //RX_FDEQ_GAIN_9 -49 0x796F //RX_FDEQ_GAIN_10 -50 0x6B66 //RX_FDEQ_GAIN_11 -51 0x625E //RX_FDEQ_GAIN_12 -52 0x5850 //RX_FDEQ_GAIN_13 +39 0x4836 //RX_FDEQ_GAIN_0 +40 0x3636 //RX_FDEQ_GAIN_1 +41 0x364C //RX_FDEQ_GAIN_2 +42 0x586E //RX_FDEQ_GAIN_3 +43 0x767A //RX_FDEQ_GAIN_4 +44 0x7978 //RX_FDEQ_GAIN_5 +45 0x7A7C //RX_FDEQ_GAIN_6 +46 0x8280 //RX_FDEQ_GAIN_7 +47 0x848C //RX_FDEQ_GAIN_8 +48 0x8E98 //RX_FDEQ_GAIN_9 +49 0x9E95 //RX_FDEQ_GAIN_10 +50 0x8686 //RX_FDEQ_GAIN_11 +51 0x7868 //RX_FDEQ_GAIN_12 +52 0x6050 //RX_FDEQ_GAIN_13 53 0x4848 //RX_FDEQ_GAIN_14 54 0x4848 //RX_FDEQ_GAIN_15 55 0x4848 //RX_FDEQ_GAIN_16 @@ -22158,9 +33228,9 @@ 71 0x0B0C //RX_FDEQ_BIN_8 72 0x0D0E //RX_FDEQ_BIN_9 73 0x0E0F //RX_FDEQ_BIN_10 -74 0x0F10 //RX_FDEQ_BIN_11 -75 0x1011 //RX_FDEQ_BIN_12 -76 0x1104 //RX_FDEQ_BIN_13 +74 0x0F0E //RX_FDEQ_BIN_11 +75 0x100D //RX_FDEQ_BIN_12 +76 0x110A //RX_FDEQ_BIN_13 77 0x0000 //RX_FDEQ_BIN_14 78 0x0000 //RX_FDEQ_BIN_15 79 0x0000 //RX_FDEQ_BIN_16 @@ -22195,7 +33265,7 @@ 108 0x5333 //RX_FDDRC_SLANT_1_2 109 0x5333 //RX_FDDRC_SLANT_1_3 110 0x0000 //RX_FDDRC_RESRV_0 -129 0x000E //RX_SPK_VOL +129 0x000B //RX_SPK_VOL 130 0x0000 //RX_VOL_RESRV_0 #VOL 1 6 0x1000 //RX_TDDRC_ALPHA_UP_1 @@ -22212,30 +33282,30 @@ 113 0x0000 //RX_TDDRC_THRD_1 114 0x1800 //RX_TDDRC_THRD_2 115 0x1800 //RX_TDDRC_THRD_3 -116 0x3000 //RX_TDDRC_SLANT_0 -117 0x6E00 //RX_TDDRC_SLANT_1 +116 0x7FFF //RX_TDDRC_SLANT_0 +117 0x7FFF //RX_TDDRC_SLANT_1 118 0x1000 //RX_TDDRC_ALPHA_UP_0 119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 120 0x0000 //RX_TDDRC_HMNC_FLAG 121 0x199A //RX_TDDRC_HMNC_GAIN 122 0x0001 //RX_TDDRC_SMT_FLAG 123 0x0CCD //RX_TDDRC_SMT_W -124 0x036E //RX_TDDRC_DRC_GAIN +124 0x0650 //RX_TDDRC_DRC_GAIN 38 0x001C //RX_FDEQ_SUBNUM -39 0x4840 //RX_FDEQ_GAIN_0 -40 0x4040 //RX_FDEQ_GAIN_1 -41 0x444C //RX_FDEQ_GAIN_2 -42 0x5C6C //RX_FDEQ_GAIN_3 -43 0x828B //RX_FDEQ_GAIN_4 -44 0x8F87 //RX_FDEQ_GAIN_5 -45 0x8481 //RX_FDEQ_GAIN_6 -46 0x8980 //RX_FDEQ_GAIN_7 -47 0x8383 //RX_FDEQ_GAIN_8 -48 0x7F86 //RX_FDEQ_GAIN_9 -49 0x796F //RX_FDEQ_GAIN_10 -50 0x6B66 //RX_FDEQ_GAIN_11 -51 0x625E //RX_FDEQ_GAIN_12 -52 0x5850 //RX_FDEQ_GAIN_13 +39 0x4836 //RX_FDEQ_GAIN_0 +40 0x3636 //RX_FDEQ_GAIN_1 +41 0x364C //RX_FDEQ_GAIN_2 +42 0x586E //RX_FDEQ_GAIN_3 +43 0x767A //RX_FDEQ_GAIN_4 +44 0x7978 //RX_FDEQ_GAIN_5 +45 0x7A7C //RX_FDEQ_GAIN_6 +46 0x8280 //RX_FDEQ_GAIN_7 +47 0x848C //RX_FDEQ_GAIN_8 +48 0x8E98 //RX_FDEQ_GAIN_9 +49 0x9E95 //RX_FDEQ_GAIN_10 +50 0x8686 //RX_FDEQ_GAIN_11 +51 0x7868 //RX_FDEQ_GAIN_12 +52 0x6050 //RX_FDEQ_GAIN_13 53 0x4848 //RX_FDEQ_GAIN_14 54 0x4848 //RX_FDEQ_GAIN_15 55 0x4848 //RX_FDEQ_GAIN_16 @@ -22257,9 +33327,9 @@ 71 0x0B0C //RX_FDEQ_BIN_8 72 0x0D0E //RX_FDEQ_BIN_9 73 0x0E0F //RX_FDEQ_BIN_10 -74 0x0F10 //RX_FDEQ_BIN_11 -75 0x1011 //RX_FDEQ_BIN_12 -76 0x1104 //RX_FDEQ_BIN_13 +74 0x0F0E //RX_FDEQ_BIN_11 +75 0x100D //RX_FDEQ_BIN_12 +76 0x110A //RX_FDEQ_BIN_13 77 0x0000 //RX_FDEQ_BIN_14 78 0x0000 //RX_FDEQ_BIN_15 79 0x0000 //RX_FDEQ_BIN_16 @@ -22294,7 +33364,7 @@ 108 0x5333 //RX_FDDRC_SLANT_1_2 109 0x5333 //RX_FDDRC_SLANT_1_3 110 0x0000 //RX_FDDRC_RESRV_0 -129 0x0016 //RX_SPK_VOL +129 0x0012 //RX_SPK_VOL 130 0x0000 //RX_VOL_RESRV_0 #VOL 2 6 0x1000 //RX_TDDRC_ALPHA_UP_1 @@ -22311,30 +33381,30 @@ 113 0x0000 //RX_TDDRC_THRD_1 114 0x1800 //RX_TDDRC_THRD_2 115 0x1800 //RX_TDDRC_THRD_3 -116 0x3000 //RX_TDDRC_SLANT_0 -117 0x6E00 //RX_TDDRC_SLANT_1 +116 0x7FFF //RX_TDDRC_SLANT_0 +117 0x7FFF //RX_TDDRC_SLANT_1 118 0x1000 //RX_TDDRC_ALPHA_UP_0 119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 120 0x0000 //RX_TDDRC_HMNC_FLAG 121 0x199A //RX_TDDRC_HMNC_GAIN 122 0x0001 //RX_TDDRC_SMT_FLAG 123 0x0CCD //RX_TDDRC_SMT_W -124 0x0364 //RX_TDDRC_DRC_GAIN +124 0x0650 //RX_TDDRC_DRC_GAIN 38 0x001C //RX_FDEQ_SUBNUM -39 0x4840 //RX_FDEQ_GAIN_0 -40 0x4040 //RX_FDEQ_GAIN_1 -41 0x444C //RX_FDEQ_GAIN_2 -42 0x5C6C //RX_FDEQ_GAIN_3 -43 0x828B //RX_FDEQ_GAIN_4 -44 0x8F87 //RX_FDEQ_GAIN_5 -45 0x8481 //RX_FDEQ_GAIN_6 -46 0x8980 //RX_FDEQ_GAIN_7 -47 0x8383 //RX_FDEQ_GAIN_8 -48 0x7F86 //RX_FDEQ_GAIN_9 -49 0x796F //RX_FDEQ_GAIN_10 -50 0x6B66 //RX_FDEQ_GAIN_11 -51 0x625E //RX_FDEQ_GAIN_12 -52 0x5850 //RX_FDEQ_GAIN_13 +39 0x4836 //RX_FDEQ_GAIN_0 +40 0x3636 //RX_FDEQ_GAIN_1 +41 0x364C //RX_FDEQ_GAIN_2 +42 0x586E //RX_FDEQ_GAIN_3 +43 0x767A //RX_FDEQ_GAIN_4 +44 0x7978 //RX_FDEQ_GAIN_5 +45 0x7A7C //RX_FDEQ_GAIN_6 +46 0x8280 //RX_FDEQ_GAIN_7 +47 0x848C //RX_FDEQ_GAIN_8 +48 0x8E98 //RX_FDEQ_GAIN_9 +49 0x9E95 //RX_FDEQ_GAIN_10 +50 0x8686 //RX_FDEQ_GAIN_11 +51 0x7868 //RX_FDEQ_GAIN_12 +52 0x6050 //RX_FDEQ_GAIN_13 53 0x4848 //RX_FDEQ_GAIN_14 54 0x4848 //RX_FDEQ_GAIN_15 55 0x4848 //RX_FDEQ_GAIN_16 @@ -22356,9 +33426,9 @@ 71 0x0B0C //RX_FDEQ_BIN_8 72 0x0D0E //RX_FDEQ_BIN_9 73 0x0E0F //RX_FDEQ_BIN_10 -74 0x0F10 //RX_FDEQ_BIN_11 -75 0x1011 //RX_FDEQ_BIN_12 -76 0x1104 //RX_FDEQ_BIN_13 +74 0x0F0E //RX_FDEQ_BIN_11 +75 0x100D //RX_FDEQ_BIN_12 +76 0x110A //RX_FDEQ_BIN_13 77 0x0000 //RX_FDEQ_BIN_14 78 0x0000 //RX_FDEQ_BIN_15 79 0x0000 //RX_FDEQ_BIN_16 @@ -22393,7 +33463,7 @@ 108 0x5333 //RX_FDDRC_SLANT_1_2 109 0x5333 //RX_FDDRC_SLANT_1_3 110 0x0000 //RX_FDDRC_RESRV_0 -129 0x0024 //RX_SPK_VOL +129 0x001E //RX_SPK_VOL 130 0x0000 //RX_VOL_RESRV_0 #VOL 3 6 0x1000 //RX_TDDRC_ALPHA_UP_1 @@ -22410,30 +33480,30 @@ 113 0x0000 //RX_TDDRC_THRD_1 114 0x1800 //RX_TDDRC_THRD_2 115 0x1800 //RX_TDDRC_THRD_3 -116 0x3000 //RX_TDDRC_SLANT_0 -117 0x6E00 //RX_TDDRC_SLANT_1 +116 0x7FFF //RX_TDDRC_SLANT_0 +117 0x7FFF //RX_TDDRC_SLANT_1 118 0x1000 //RX_TDDRC_ALPHA_UP_0 119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 120 0x0000 //RX_TDDRC_HMNC_FLAG 121 0x199A //RX_TDDRC_HMNC_GAIN 122 0x0001 //RX_TDDRC_SMT_FLAG 123 0x0CCD //RX_TDDRC_SMT_W -124 0x0357 //RX_TDDRC_DRC_GAIN +124 0x0650 //RX_TDDRC_DRC_GAIN 38 0x001C //RX_FDEQ_SUBNUM -39 0x4840 //RX_FDEQ_GAIN_0 -40 0x4040 //RX_FDEQ_GAIN_1 -41 0x444C //RX_FDEQ_GAIN_2 -42 0x5C6C //RX_FDEQ_GAIN_3 -43 0x828B //RX_FDEQ_GAIN_4 -44 0x8F87 //RX_FDEQ_GAIN_5 -45 0x8481 //RX_FDEQ_GAIN_6 -46 0x8980 //RX_FDEQ_GAIN_7 -47 0x8383 //RX_FDEQ_GAIN_8 -48 0x7F86 //RX_FDEQ_GAIN_9 -49 0x796F //RX_FDEQ_GAIN_10 -50 0x6B66 //RX_FDEQ_GAIN_11 -51 0x625E //RX_FDEQ_GAIN_12 -52 0x5850 //RX_FDEQ_GAIN_13 +39 0x4836 //RX_FDEQ_GAIN_0 +40 0x3636 //RX_FDEQ_GAIN_1 +41 0x364C //RX_FDEQ_GAIN_2 +42 0x586E //RX_FDEQ_GAIN_3 +43 0x767A //RX_FDEQ_GAIN_4 +44 0x7978 //RX_FDEQ_GAIN_5 +45 0x7A7C //RX_FDEQ_GAIN_6 +46 0x8280 //RX_FDEQ_GAIN_7 +47 0x848C //RX_FDEQ_GAIN_8 +48 0x8E98 //RX_FDEQ_GAIN_9 +49 0x9E95 //RX_FDEQ_GAIN_10 +50 0x8686 //RX_FDEQ_GAIN_11 +51 0x7868 //RX_FDEQ_GAIN_12 +52 0x6050 //RX_FDEQ_GAIN_13 53 0x4848 //RX_FDEQ_GAIN_14 54 0x4848 //RX_FDEQ_GAIN_15 55 0x4848 //RX_FDEQ_GAIN_16 @@ -22455,9 +33525,9 @@ 71 0x0B0C //RX_FDEQ_BIN_8 72 0x0D0E //RX_FDEQ_BIN_9 73 0x0E0F //RX_FDEQ_BIN_10 -74 0x0F10 //RX_FDEQ_BIN_11 -75 0x1011 //RX_FDEQ_BIN_12 -76 0x1104 //RX_FDEQ_BIN_13 +74 0x0F0E //RX_FDEQ_BIN_11 +75 0x100D //RX_FDEQ_BIN_12 +76 0x110A //RX_FDEQ_BIN_13 77 0x0000 //RX_FDEQ_BIN_14 78 0x0000 //RX_FDEQ_BIN_15 79 0x0000 //RX_FDEQ_BIN_16 @@ -22492,7 +33562,7 @@ 108 0x5333 //RX_FDDRC_SLANT_1_2 109 0x5333 //RX_FDDRC_SLANT_1_3 110 0x0000 //RX_FDDRC_RESRV_0 -129 0x003A //RX_SPK_VOL +129 0x0026 //RX_SPK_VOL 130 0x0000 //RX_VOL_RESRV_0 #VOL 4 6 0x1000 //RX_TDDRC_ALPHA_UP_1 @@ -22509,30 +33579,30 @@ 113 0x0000 //RX_TDDRC_THRD_1 114 0x1800 //RX_TDDRC_THRD_2 115 0x1800 //RX_TDDRC_THRD_3 -116 0x3000 //RX_TDDRC_SLANT_0 -117 0x6E00 //RX_TDDRC_SLANT_1 +116 0x7FFF //RX_TDDRC_SLANT_0 +117 0x7FFF //RX_TDDRC_SLANT_1 118 0x1000 //RX_TDDRC_ALPHA_UP_0 119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 120 0x0000 //RX_TDDRC_HMNC_FLAG 121 0x199A //RX_TDDRC_HMNC_GAIN 122 0x0001 //RX_TDDRC_SMT_FLAG 123 0x0CCD //RX_TDDRC_SMT_W -124 0x0357 //RX_TDDRC_DRC_GAIN +124 0x0650 //RX_TDDRC_DRC_GAIN 38 0x001C //RX_FDEQ_SUBNUM -39 0x4840 //RX_FDEQ_GAIN_0 -40 0x4040 //RX_FDEQ_GAIN_1 -41 0x444C //RX_FDEQ_GAIN_2 -42 0x5C6C //RX_FDEQ_GAIN_3 -43 0x828B //RX_FDEQ_GAIN_4 -44 0x8F87 //RX_FDEQ_GAIN_5 -45 0x8481 //RX_FDEQ_GAIN_6 -46 0x8980 //RX_FDEQ_GAIN_7 -47 0x8383 //RX_FDEQ_GAIN_8 -48 0x7F86 //RX_FDEQ_GAIN_9 -49 0x796F //RX_FDEQ_GAIN_10 -50 0x6B66 //RX_FDEQ_GAIN_11 -51 0x625E //RX_FDEQ_GAIN_12 -52 0x5850 //RX_FDEQ_GAIN_13 +39 0x4836 //RX_FDEQ_GAIN_0 +40 0x3636 //RX_FDEQ_GAIN_1 +41 0x364C //RX_FDEQ_GAIN_2 +42 0x586E //RX_FDEQ_GAIN_3 +43 0x767A //RX_FDEQ_GAIN_4 +44 0x7978 //RX_FDEQ_GAIN_5 +45 0x7A7C //RX_FDEQ_GAIN_6 +46 0x8280 //RX_FDEQ_GAIN_7 +47 0x848C //RX_FDEQ_GAIN_8 +48 0x8E98 //RX_FDEQ_GAIN_9 +49 0x9E95 //RX_FDEQ_GAIN_10 +50 0x8686 //RX_FDEQ_GAIN_11 +51 0x7868 //RX_FDEQ_GAIN_12 +52 0x6050 //RX_FDEQ_GAIN_13 53 0x4848 //RX_FDEQ_GAIN_14 54 0x4848 //RX_FDEQ_GAIN_15 55 0x4848 //RX_FDEQ_GAIN_16 @@ -22554,9 +33624,9 @@ 71 0x0B0C //RX_FDEQ_BIN_8 72 0x0D0E //RX_FDEQ_BIN_9 73 0x0E0F //RX_FDEQ_BIN_10 -74 0x0F10 //RX_FDEQ_BIN_11 -75 0x1011 //RX_FDEQ_BIN_12 -76 0x1104 //RX_FDEQ_BIN_13 +74 0x0F0E //RX_FDEQ_BIN_11 +75 0x100D //RX_FDEQ_BIN_12 +76 0x110A //RX_FDEQ_BIN_13 77 0x0000 //RX_FDEQ_BIN_14 78 0x0000 //RX_FDEQ_BIN_15 79 0x0000 //RX_FDEQ_BIN_16 @@ -22591,7 +33661,7 @@ 108 0x5333 //RX_FDDRC_SLANT_1_2 109 0x5333 //RX_FDDRC_SLANT_1_3 110 0x0000 //RX_FDDRC_RESRV_0 -129 0x005E //RX_SPK_VOL +129 0x0050 //RX_SPK_VOL 130 0x0000 //RX_VOL_RESRV_0 #VOL 5 6 0x1000 //RX_TDDRC_ALPHA_UP_1 @@ -22608,30 +33678,30 @@ 113 0x0000 //RX_TDDRC_THRD_1 114 0x1800 //RX_TDDRC_THRD_2 115 0x1800 //RX_TDDRC_THRD_3 -116 0x3000 //RX_TDDRC_SLANT_0 -117 0x6E00 //RX_TDDRC_SLANT_1 +116 0x7FFF //RX_TDDRC_SLANT_0 +117 0x7FFF //RX_TDDRC_SLANT_1 118 0x1000 //RX_TDDRC_ALPHA_UP_0 119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 120 0x0000 //RX_TDDRC_HMNC_FLAG 121 0x199A //RX_TDDRC_HMNC_GAIN 122 0x0001 //RX_TDDRC_SMT_FLAG 123 0x0CCD //RX_TDDRC_SMT_W -124 0x0357 //RX_TDDRC_DRC_GAIN +124 0x0650 //RX_TDDRC_DRC_GAIN 38 0x001C //RX_FDEQ_SUBNUM -39 0x4840 //RX_FDEQ_GAIN_0 -40 0x4040 //RX_FDEQ_GAIN_1 -41 0x444C //RX_FDEQ_GAIN_2 -42 0x5C6C //RX_FDEQ_GAIN_3 -43 0x828B //RX_FDEQ_GAIN_4 -44 0x8F87 //RX_FDEQ_GAIN_5 -45 0x8481 //RX_FDEQ_GAIN_6 -46 0x8980 //RX_FDEQ_GAIN_7 -47 0x8383 //RX_FDEQ_GAIN_8 -48 0x7F86 //RX_FDEQ_GAIN_9 -49 0x796F //RX_FDEQ_GAIN_10 -50 0x6B66 //RX_FDEQ_GAIN_11 -51 0x625E //RX_FDEQ_GAIN_12 -52 0x5850 //RX_FDEQ_GAIN_13 +39 0x4836 //RX_FDEQ_GAIN_0 +40 0x3636 //RX_FDEQ_GAIN_1 +41 0x364C //RX_FDEQ_GAIN_2 +42 0x586E //RX_FDEQ_GAIN_3 +43 0x767A //RX_FDEQ_GAIN_4 +44 0x7978 //RX_FDEQ_GAIN_5 +45 0x7A7C //RX_FDEQ_GAIN_6 +46 0x8280 //RX_FDEQ_GAIN_7 +47 0x848C //RX_FDEQ_GAIN_8 +48 0x8E98 //RX_FDEQ_GAIN_9 +49 0x9E95 //RX_FDEQ_GAIN_10 +50 0x8686 //RX_FDEQ_GAIN_11 +51 0x7868 //RX_FDEQ_GAIN_12 +52 0x6050 //RX_FDEQ_GAIN_13 53 0x4848 //RX_FDEQ_GAIN_14 54 0x4848 //RX_FDEQ_GAIN_15 55 0x4848 //RX_FDEQ_GAIN_16 @@ -22653,9 +33723,9 @@ 71 0x0B0C //RX_FDEQ_BIN_8 72 0x0D0E //RX_FDEQ_BIN_9 73 0x0E0F //RX_FDEQ_BIN_10 -74 0x0F10 //RX_FDEQ_BIN_11 -75 0x1011 //RX_FDEQ_BIN_12 -76 0x1104 //RX_FDEQ_BIN_13 +74 0x0F0E //RX_FDEQ_BIN_11 +75 0x100D //RX_FDEQ_BIN_12 +76 0x110A //RX_FDEQ_BIN_13 77 0x0000 //RX_FDEQ_BIN_14 78 0x0000 //RX_FDEQ_BIN_15 79 0x0000 //RX_FDEQ_BIN_16 @@ -22690,7 +33760,7 @@ 108 0x5333 //RX_FDDRC_SLANT_1_2 109 0x5333 //RX_FDDRC_SLANT_1_3 110 0x0000 //RX_FDDRC_RESRV_0 -129 0x0097 //RX_SPK_VOL +129 0x0086 //RX_SPK_VOL 130 0x0000 //RX_VOL_RESRV_0 #VOL 6 6 0x1000 //RX_TDDRC_ALPHA_UP_1 @@ -22707,30 +33777,30 @@ 113 0x0000 //RX_TDDRC_THRD_1 114 0x1800 //RX_TDDRC_THRD_2 115 0x1800 //RX_TDDRC_THRD_3 -116 0x3000 //RX_TDDRC_SLANT_0 -117 0x6E00 //RX_TDDRC_SLANT_1 +116 0x7FFF //RX_TDDRC_SLANT_0 +117 0x7FFF //RX_TDDRC_SLANT_1 118 0x1000 //RX_TDDRC_ALPHA_UP_0 119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 120 0x0000 //RX_TDDRC_HMNC_FLAG 121 0x199A //RX_TDDRC_HMNC_GAIN 122 0x0001 //RX_TDDRC_SMT_FLAG 123 0x0CCD //RX_TDDRC_SMT_W -124 0x0357 //RX_TDDRC_DRC_GAIN +124 0x0650 //RX_TDDRC_DRC_GAIN 38 0x001C //RX_FDEQ_SUBNUM -39 0x4840 //RX_FDEQ_GAIN_0 -40 0x4040 //RX_FDEQ_GAIN_1 -41 0x444C //RX_FDEQ_GAIN_2 -42 0x5C6C //RX_FDEQ_GAIN_3 -43 0x828B //RX_FDEQ_GAIN_4 -44 0x8F87 //RX_FDEQ_GAIN_5 -45 0x8481 //RX_FDEQ_GAIN_6 -46 0x8980 //RX_FDEQ_GAIN_7 -47 0x8383 //RX_FDEQ_GAIN_8 -48 0x7F86 //RX_FDEQ_GAIN_9 -49 0x796F //RX_FDEQ_GAIN_10 -50 0x6B66 //RX_FDEQ_GAIN_11 -51 0x625E //RX_FDEQ_GAIN_12 -52 0x5850 //RX_FDEQ_GAIN_13 +39 0x4836 //RX_FDEQ_GAIN_0 +40 0x3636 //RX_FDEQ_GAIN_1 +41 0x364C //RX_FDEQ_GAIN_2 +42 0x586E //RX_FDEQ_GAIN_3 +43 0x767A //RX_FDEQ_GAIN_4 +44 0x7978 //RX_FDEQ_GAIN_5 +45 0x7A7C //RX_FDEQ_GAIN_6 +46 0x8280 //RX_FDEQ_GAIN_7 +47 0x848C //RX_FDEQ_GAIN_8 +48 0x8E98 //RX_FDEQ_GAIN_9 +49 0x9E95 //RX_FDEQ_GAIN_10 +50 0x8686 //RX_FDEQ_GAIN_11 +51 0x7868 //RX_FDEQ_GAIN_12 +52 0x6050 //RX_FDEQ_GAIN_13 53 0x4848 //RX_FDEQ_GAIN_14 54 0x4848 //RX_FDEQ_GAIN_15 55 0x4848 //RX_FDEQ_GAIN_16 @@ -22752,9 +33822,9 @@ 71 0x0B0C //RX_FDEQ_BIN_8 72 0x0D0E //RX_FDEQ_BIN_9 73 0x0E0F //RX_FDEQ_BIN_10 -74 0x0F10 //RX_FDEQ_BIN_11 -75 0x1011 //RX_FDEQ_BIN_12 -76 0x1104 //RX_FDEQ_BIN_13 +74 0x0F0E //RX_FDEQ_BIN_11 +75 0x100D //RX_FDEQ_BIN_12 +76 0x110A //RX_FDEQ_BIN_13 77 0x0000 //RX_FDEQ_BIN_14 78 0x0000 //RX_FDEQ_BIN_15 79 0x0000 //RX_FDEQ_BIN_16 @@ -22791,14 +33861,866 @@ 110 0x0000 //RX_FDDRC_RESRV_0 129 0x0100 //RX_SPK_VOL 130 0x0000 //RX_VOL_RESRV_0 +#RX 2 +157 0x003C //RX_RECVFUNC_MODE_0 +158 0x0000 //RX_RECVFUNC_MODE_1 +159 0x0001 //RX_SAMPLINGFREQ_SIG +160 0x0001 //RX_SAMPLINGFREQ_PROC +161 0x000A //RX_FRAME_SZ +162 0x0000 //RX_DELAY_OPT +163 0x1000 //RX_TDDRC_ALPHA_UP_1 +164 0x1000 //RX_TDDRC_ALPHA_UP_2 +165 0x1000 //RX_TDDRC_ALPHA_UP_3 +166 0x1000 //RX_TDDRC_ALPHA_UP_4 +167 0x0600 //RX_PGA +168 0x7FFF //RX_A_HP +169 0x4000 //RX_B_PE +170 0x7800 //RX_THR_PITCH_DET_0 +171 0x7000 //RX_THR_PITCH_DET_1 +172 0x6000 //RX_THR_PITCH_DET_2 +173 0x0008 //RX_PITCH_BFR_LEN +174 0x0003 //RX_SBD_PITCH_DET +175 0x0100 //RX_PP_RESRV_0 +176 0x0020 //RX_PP_RESRV_1 +177 0x0400 //RX_N_SN_EST +178 0x000C //RX_N2_SN_EST +179 0x0014 //RX_NS_LVL_CTRL +180 0xF800 //RX_THR_SN_EST +181 0x7E00 //RX_LAMBDA_PFILT +182 0x000A //RX_FENS_RESRV_0 +183 0x0190 //RX_FENS_RESRV_1 +184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +187 0x0002 //RX_EXTRA_NS_L +188 0x0800 //RX_EXTRA_NS_A +189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +190 0x7000 //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +192 0x199A //RX_A_POST_FLT +193 0x1000 //RX_LMT_THRD +194 0x7FDF //RX_LMT_ALPHA +195 0x001C //RX_FDEQ_SUBNUM +196 0x4840 //RX_FDEQ_GAIN_0 +197 0x4040 //RX_FDEQ_GAIN_1 +198 0x485C //RX_FDEQ_GAIN_2 +199 0x6873 //RX_FDEQ_GAIN_3 +200 0x7F8E //RX_FDEQ_GAIN_4 +201 0x847E //RX_FDEQ_GAIN_5 +202 0x7E80 //RX_FDEQ_GAIN_6 +203 0x8884 //RX_FDEQ_GAIN_7 +204 0x8890 //RX_FDEQ_GAIN_8 +205 0x8E8F //RX_FDEQ_GAIN_9 +206 0x8B77 //RX_FDEQ_GAIN_10 +207 0x6F7F //RX_FDEQ_GAIN_11 +208 0x6568 //RX_FDEQ_GAIN_12 +209 0x6050 //RX_FDEQ_GAIN_13 +210 0x4848 //RX_FDEQ_GAIN_14 +211 0x4848 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0202 //RX_FDEQ_BIN_0 +221 0x0203 //RX_FDEQ_BIN_1 +222 0x0303 //RX_FDEQ_BIN_2 +223 0x0304 //RX_FDEQ_BIN_3 +224 0x0405 //RX_FDEQ_BIN_4 +225 0x0506 //RX_FDEQ_BIN_5 +226 0x0708 //RX_FDEQ_BIN_6 +227 0x090A //RX_FDEQ_BIN_7 +228 0x0B0C //RX_FDEQ_BIN_8 +229 0x0D0E //RX_FDEQ_BIN_9 +230 0x0E0F //RX_FDEQ_BIN_10 +231 0x0F10 //RX_FDEQ_BIN_11 +232 0x1011 //RX_FDEQ_BIN_12 +233 0x1104 //RX_FDEQ_BIN_13 +234 0x0000 //RX_FDEQ_BIN_14 +235 0x0000 //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x4000 //RX_FDEQ_RESRV_0 +245 0x0320 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0030 //RX_FDDRC_BAND_MARGIN_1 +248 0x0050 //RX_FDDRC_BAND_MARGIN_2 +249 0x0080 //RX_FDDRC_BAND_MARGIN_3 +250 0x0007 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x5000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x6400 //RX_FDDRC_THRD_3_2 +258 0x6400 //RX_FDDRC_THRD_3_3 +259 0x2000 //RX_FDDRC_SLANT_0_0 +260 0x2000 //RX_FDDRC_SLANT_0_1 +261 0x2000 //RX_FDDRC_SLANT_0_2 +262 0x2000 //RX_FDDRC_SLANT_0_3 +263 0x5333 //RX_FDDRC_SLANT_1_0 +264 0x5333 //RX_FDDRC_SLANT_1_1 +265 0x5333 //RX_FDDRC_SLANT_1_2 +266 0x5333 //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +268 0x0002 //RX_FILTINDX +269 0x0000 //RX_TDDRC_THRD_0 +270 0x0000 //RX_TDDRC_THRD_1 +271 0x1800 //RX_TDDRC_THRD_2 +272 0x1800 //RX_TDDRC_THRD_3 +273 0x3000 //RX_TDDRC_SLANT_0 +274 0x6E00 //RX_TDDRC_SLANT_1 +275 0x1000 //RX_TDDRC_ALPHA_UP_0 +276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x199A //RX_TDDRC_HMNC_GAIN +279 0x0001 //RX_TDDRC_SMT_FLAG +280 0x0CCD //RX_TDDRC_SMT_W +281 0x0407 //RX_TDDRC_DRC_GAIN +282 0x7C00 //RX_LAMBDA_PKA_FP +283 0x13E0 //RX_TPKA_FP +284 0x0080 //RX_MIN_G_FP +285 0x2000 //RX_MAX_G_FP +286 0x000C //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 +288 0x0000 //RX_MAXLEVEL_CNG +289 0x3000 //RX_BWE_UV_TH +290 0x3000 //RX_BWE_UV_TH2 +291 0x1800 //RX_BWE_UV_TH3 +292 0x1000 //RX_BWE_V_TH +293 0x04CD //RX_BWE_GAIN1_V_TH1 +294 0x0F33 //RX_BWE_GAIN1_V_TH2 +295 0x7333 //RX_BWE_UV_EQ +296 0x199A //RX_BWE_V_EQ +297 0x7333 //RX_BWE_TONE_TH +298 0x0004 //RX_BWE_UV_HOLD_T +299 0x6CCD //RX_BWE_GAIN2_ALPHA +300 0x799A //RX_BWE_GAIN3_ALPHA +301 0x001E //RX_BWE_CUTOFF +302 0x3000 //RX_BWE_GAINFILL +303 0x3200 //RX_BWE_MAXTH_TONE +304 0x2000 //RX_BWE_EQ_0 +305 0x2000 //RX_BWE_EQ_1 +306 0x2000 //RX_BWE_EQ_2 +307 0x2000 //RX_BWE_EQ_3 +308 0x2000 //RX_BWE_EQ_4 +309 0x2000 //RX_BWE_EQ_5 +310 0x2000 //RX_BWE_EQ_6 +311 0x0000 //RX_BWE_RESRV_0 +312 0x0000 //RX_BWE_RESRV_1 +313 0x0000 //RX_BWE_RESRV_2 +#VOL 0 +163 0x1000 //RX_TDDRC_ALPHA_UP_1 +164 0x1000 //RX_TDDRC_ALPHA_UP_2 +165 0x1000 //RX_TDDRC_ALPHA_UP_3 +166 0x1000 //RX_TDDRC_ALPHA_UP_4 +184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +190 0x7000 //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +269 0x0000 //RX_TDDRC_THRD_0 +270 0x0000 //RX_TDDRC_THRD_1 +271 0x1800 //RX_TDDRC_THRD_2 +272 0x1800 //RX_TDDRC_THRD_3 +273 0x3000 //RX_TDDRC_SLANT_0 +274 0x6E00 //RX_TDDRC_SLANT_1 +275 0x1000 //RX_TDDRC_ALPHA_UP_0 +276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x199A //RX_TDDRC_HMNC_GAIN +279 0x0001 //RX_TDDRC_SMT_FLAG +280 0x0CCD //RX_TDDRC_SMT_W +281 0x0407 //RX_TDDRC_DRC_GAIN +195 0x001C //RX_FDEQ_SUBNUM +196 0x4840 //RX_FDEQ_GAIN_0 +197 0x4040 //RX_FDEQ_GAIN_1 +198 0x485C //RX_FDEQ_GAIN_2 +199 0x6873 //RX_FDEQ_GAIN_3 +200 0x7F8E //RX_FDEQ_GAIN_4 +201 0x847E //RX_FDEQ_GAIN_5 +202 0x7E80 //RX_FDEQ_GAIN_6 +203 0x8884 //RX_FDEQ_GAIN_7 +204 0x8890 //RX_FDEQ_GAIN_8 +205 0x8E8F //RX_FDEQ_GAIN_9 +206 0x8B77 //RX_FDEQ_GAIN_10 +207 0x6F7F //RX_FDEQ_GAIN_11 +208 0x6568 //RX_FDEQ_GAIN_12 +209 0x6050 //RX_FDEQ_GAIN_13 +210 0x4848 //RX_FDEQ_GAIN_14 +211 0x4848 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0202 //RX_FDEQ_BIN_0 +221 0x0203 //RX_FDEQ_BIN_1 +222 0x0303 //RX_FDEQ_BIN_2 +223 0x0304 //RX_FDEQ_BIN_3 +224 0x0405 //RX_FDEQ_BIN_4 +225 0x0506 //RX_FDEQ_BIN_5 +226 0x0708 //RX_FDEQ_BIN_6 +227 0x090A //RX_FDEQ_BIN_7 +228 0x0B0C //RX_FDEQ_BIN_8 +229 0x0D0E //RX_FDEQ_BIN_9 +230 0x0E0F //RX_FDEQ_BIN_10 +231 0x0F10 //RX_FDEQ_BIN_11 +232 0x1011 //RX_FDEQ_BIN_12 +233 0x1104 //RX_FDEQ_BIN_13 +234 0x0000 //RX_FDEQ_BIN_14 +235 0x0000 //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x4000 //RX_FDEQ_RESRV_0 +245 0x0320 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0030 //RX_FDDRC_BAND_MARGIN_1 +248 0x0050 //RX_FDDRC_BAND_MARGIN_2 +249 0x0080 //RX_FDDRC_BAND_MARGIN_3 +250 0x0007 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x5000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x6400 //RX_FDDRC_THRD_3_2 +258 0x6400 //RX_FDDRC_THRD_3_3 +259 0x2000 //RX_FDDRC_SLANT_0_0 +260 0x2000 //RX_FDDRC_SLANT_0_1 +261 0x2000 //RX_FDDRC_SLANT_0_2 +262 0x2000 //RX_FDDRC_SLANT_0_3 +263 0x5333 //RX_FDDRC_SLANT_1_0 +264 0x5333 //RX_FDDRC_SLANT_1_1 +265 0x5333 //RX_FDDRC_SLANT_1_2 +266 0x5333 //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +286 0x000C //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 +#VOL 1 +163 0x1000 //RX_TDDRC_ALPHA_UP_1 +164 0x1000 //RX_TDDRC_ALPHA_UP_2 +165 0x1000 //RX_TDDRC_ALPHA_UP_3 +166 0x1000 //RX_TDDRC_ALPHA_UP_4 +184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +190 0x7000 //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +269 0x0000 //RX_TDDRC_THRD_0 +270 0x0000 //RX_TDDRC_THRD_1 +271 0x1800 //RX_TDDRC_THRD_2 +272 0x1800 //RX_TDDRC_THRD_3 +273 0x3000 //RX_TDDRC_SLANT_0 +274 0x6E00 //RX_TDDRC_SLANT_1 +275 0x1000 //RX_TDDRC_ALPHA_UP_0 +276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x199A //RX_TDDRC_HMNC_GAIN +279 0x0001 //RX_TDDRC_SMT_FLAG +280 0x0CCD //RX_TDDRC_SMT_W +281 0x0407 //RX_TDDRC_DRC_GAIN +195 0x001C //RX_FDEQ_SUBNUM +196 0x4840 //RX_FDEQ_GAIN_0 +197 0x4040 //RX_FDEQ_GAIN_1 +198 0x485C //RX_FDEQ_GAIN_2 +199 0x6873 //RX_FDEQ_GAIN_3 +200 0x7F8E //RX_FDEQ_GAIN_4 +201 0x847E //RX_FDEQ_GAIN_5 +202 0x7E80 //RX_FDEQ_GAIN_6 +203 0x8884 //RX_FDEQ_GAIN_7 +204 0x8890 //RX_FDEQ_GAIN_8 +205 0x8E8F //RX_FDEQ_GAIN_9 +206 0x8B77 //RX_FDEQ_GAIN_10 +207 0x6F7F //RX_FDEQ_GAIN_11 +208 0x6568 //RX_FDEQ_GAIN_12 +209 0x6050 //RX_FDEQ_GAIN_13 +210 0x4848 //RX_FDEQ_GAIN_14 +211 0x4848 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0202 //RX_FDEQ_BIN_0 +221 0x0203 //RX_FDEQ_BIN_1 +222 0x0303 //RX_FDEQ_BIN_2 +223 0x0304 //RX_FDEQ_BIN_3 +224 0x0405 //RX_FDEQ_BIN_4 +225 0x0506 //RX_FDEQ_BIN_5 +226 0x0708 //RX_FDEQ_BIN_6 +227 0x090A //RX_FDEQ_BIN_7 +228 0x0B0C //RX_FDEQ_BIN_8 +229 0x0D0E //RX_FDEQ_BIN_9 +230 0x0E0F //RX_FDEQ_BIN_10 +231 0x0F10 //RX_FDEQ_BIN_11 +232 0x1011 //RX_FDEQ_BIN_12 +233 0x1104 //RX_FDEQ_BIN_13 +234 0x0000 //RX_FDEQ_BIN_14 +235 0x0000 //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x4000 //RX_FDEQ_RESRV_0 +245 0x0320 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0030 //RX_FDDRC_BAND_MARGIN_1 +248 0x0050 //RX_FDDRC_BAND_MARGIN_2 +249 0x0080 //RX_FDDRC_BAND_MARGIN_3 +250 0x0007 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x5000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x6400 //RX_FDDRC_THRD_3_2 +258 0x6400 //RX_FDDRC_THRD_3_3 +259 0x2000 //RX_FDDRC_SLANT_0_0 +260 0x2000 //RX_FDDRC_SLANT_0_1 +261 0x2000 //RX_FDDRC_SLANT_0_2 +262 0x2000 //RX_FDDRC_SLANT_0_3 +263 0x5333 //RX_FDDRC_SLANT_1_0 +264 0x5333 //RX_FDDRC_SLANT_1_1 +265 0x5333 //RX_FDDRC_SLANT_1_2 +266 0x5333 //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +286 0x0014 //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 +#VOL 2 +163 0x1000 //RX_TDDRC_ALPHA_UP_1 +164 0x1000 //RX_TDDRC_ALPHA_UP_2 +165 0x1000 //RX_TDDRC_ALPHA_UP_3 +166 0x1000 //RX_TDDRC_ALPHA_UP_4 +184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +190 0x7000 //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +269 0x0000 //RX_TDDRC_THRD_0 +270 0x0000 //RX_TDDRC_THRD_1 +271 0x1800 //RX_TDDRC_THRD_2 +272 0x1800 //RX_TDDRC_THRD_3 +273 0x3000 //RX_TDDRC_SLANT_0 +274 0x6E00 //RX_TDDRC_SLANT_1 +275 0x1000 //RX_TDDRC_ALPHA_UP_0 +276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x199A //RX_TDDRC_HMNC_GAIN +279 0x0001 //RX_TDDRC_SMT_FLAG +280 0x0CCD //RX_TDDRC_SMT_W +281 0x0407 //RX_TDDRC_DRC_GAIN +195 0x001C //RX_FDEQ_SUBNUM +196 0x4840 //RX_FDEQ_GAIN_0 +197 0x4040 //RX_FDEQ_GAIN_1 +198 0x485C //RX_FDEQ_GAIN_2 +199 0x6873 //RX_FDEQ_GAIN_3 +200 0x7F8E //RX_FDEQ_GAIN_4 +201 0x847E //RX_FDEQ_GAIN_5 +202 0x7E80 //RX_FDEQ_GAIN_6 +203 0x8884 //RX_FDEQ_GAIN_7 +204 0x8890 //RX_FDEQ_GAIN_8 +205 0x8E8F //RX_FDEQ_GAIN_9 +206 0x8B77 //RX_FDEQ_GAIN_10 +207 0x6F7F //RX_FDEQ_GAIN_11 +208 0x6568 //RX_FDEQ_GAIN_12 +209 0x6050 //RX_FDEQ_GAIN_13 +210 0x4848 //RX_FDEQ_GAIN_14 +211 0x4848 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0202 //RX_FDEQ_BIN_0 +221 0x0203 //RX_FDEQ_BIN_1 +222 0x0303 //RX_FDEQ_BIN_2 +223 0x0304 //RX_FDEQ_BIN_3 +224 0x0405 //RX_FDEQ_BIN_4 +225 0x0506 //RX_FDEQ_BIN_5 +226 0x0708 //RX_FDEQ_BIN_6 +227 0x090A //RX_FDEQ_BIN_7 +228 0x0B0C //RX_FDEQ_BIN_8 +229 0x0D0E //RX_FDEQ_BIN_9 +230 0x0E0F //RX_FDEQ_BIN_10 +231 0x0F10 //RX_FDEQ_BIN_11 +232 0x1011 //RX_FDEQ_BIN_12 +233 0x1104 //RX_FDEQ_BIN_13 +234 0x0000 //RX_FDEQ_BIN_14 +235 0x0000 //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x4000 //RX_FDEQ_RESRV_0 +245 0x0320 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0030 //RX_FDDRC_BAND_MARGIN_1 +248 0x0050 //RX_FDDRC_BAND_MARGIN_2 +249 0x0080 //RX_FDDRC_BAND_MARGIN_3 +250 0x0007 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x5000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x6400 //RX_FDDRC_THRD_3_2 +258 0x6400 //RX_FDDRC_THRD_3_3 +259 0x2000 //RX_FDDRC_SLANT_0_0 +260 0x2000 //RX_FDDRC_SLANT_0_1 +261 0x2000 //RX_FDDRC_SLANT_0_2 +262 0x2000 //RX_FDDRC_SLANT_0_3 +263 0x5333 //RX_FDDRC_SLANT_1_0 +264 0x5333 //RX_FDDRC_SLANT_1_1 +265 0x5333 //RX_FDDRC_SLANT_1_2 +266 0x5333 //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +286 0x0020 //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 +#VOL 3 +163 0x1000 //RX_TDDRC_ALPHA_UP_1 +164 0x1000 //RX_TDDRC_ALPHA_UP_2 +165 0x1000 //RX_TDDRC_ALPHA_UP_3 +166 0x1000 //RX_TDDRC_ALPHA_UP_4 +184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +190 0x7000 //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +269 0x0000 //RX_TDDRC_THRD_0 +270 0x0000 //RX_TDDRC_THRD_1 +271 0x1800 //RX_TDDRC_THRD_2 +272 0x1800 //RX_TDDRC_THRD_3 +273 0x3000 //RX_TDDRC_SLANT_0 +274 0x6E00 //RX_TDDRC_SLANT_1 +275 0x1000 //RX_TDDRC_ALPHA_UP_0 +276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x199A //RX_TDDRC_HMNC_GAIN +279 0x0001 //RX_TDDRC_SMT_FLAG +280 0x0CCD //RX_TDDRC_SMT_W +281 0x0407 //RX_TDDRC_DRC_GAIN +195 0x001C //RX_FDEQ_SUBNUM +196 0x4840 //RX_FDEQ_GAIN_0 +197 0x4040 //RX_FDEQ_GAIN_1 +198 0x485C //RX_FDEQ_GAIN_2 +199 0x6873 //RX_FDEQ_GAIN_3 +200 0x7F8E //RX_FDEQ_GAIN_4 +201 0x847E //RX_FDEQ_GAIN_5 +202 0x7E80 //RX_FDEQ_GAIN_6 +203 0x8884 //RX_FDEQ_GAIN_7 +204 0x8890 //RX_FDEQ_GAIN_8 +205 0x8E8F //RX_FDEQ_GAIN_9 +206 0x8B77 //RX_FDEQ_GAIN_10 +207 0x6F7F //RX_FDEQ_GAIN_11 +208 0x6568 //RX_FDEQ_GAIN_12 +209 0x6050 //RX_FDEQ_GAIN_13 +210 0x4848 //RX_FDEQ_GAIN_14 +211 0x4848 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0202 //RX_FDEQ_BIN_0 +221 0x0203 //RX_FDEQ_BIN_1 +222 0x0303 //RX_FDEQ_BIN_2 +223 0x0304 //RX_FDEQ_BIN_3 +224 0x0405 //RX_FDEQ_BIN_4 +225 0x0506 //RX_FDEQ_BIN_5 +226 0x0708 //RX_FDEQ_BIN_6 +227 0x090A //RX_FDEQ_BIN_7 +228 0x0B0C //RX_FDEQ_BIN_8 +229 0x0D0E //RX_FDEQ_BIN_9 +230 0x0E0F //RX_FDEQ_BIN_10 +231 0x0F10 //RX_FDEQ_BIN_11 +232 0x1011 //RX_FDEQ_BIN_12 +233 0x1104 //RX_FDEQ_BIN_13 +234 0x0000 //RX_FDEQ_BIN_14 +235 0x0000 //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x4000 //RX_FDEQ_RESRV_0 +245 0x0320 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0030 //RX_FDDRC_BAND_MARGIN_1 +248 0x0050 //RX_FDDRC_BAND_MARGIN_2 +249 0x0080 //RX_FDDRC_BAND_MARGIN_3 +250 0x0007 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x5000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x6400 //RX_FDDRC_THRD_3_2 +258 0x6400 //RX_FDDRC_THRD_3_3 +259 0x2000 //RX_FDDRC_SLANT_0_0 +260 0x2000 //RX_FDDRC_SLANT_0_1 +261 0x2000 //RX_FDDRC_SLANT_0_2 +262 0x2000 //RX_FDDRC_SLANT_0_3 +263 0x5333 //RX_FDDRC_SLANT_1_0 +264 0x5333 //RX_FDDRC_SLANT_1_1 +265 0x5333 //RX_FDDRC_SLANT_1_2 +266 0x5333 //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +286 0x0035 //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 +#VOL 4 +163 0x1000 //RX_TDDRC_ALPHA_UP_1 +164 0x1000 //RX_TDDRC_ALPHA_UP_2 +165 0x1000 //RX_TDDRC_ALPHA_UP_3 +166 0x1000 //RX_TDDRC_ALPHA_UP_4 +184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +190 0x7000 //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +269 0x0000 //RX_TDDRC_THRD_0 +270 0x0000 //RX_TDDRC_THRD_1 +271 0x1800 //RX_TDDRC_THRD_2 +272 0x1800 //RX_TDDRC_THRD_3 +273 0x3000 //RX_TDDRC_SLANT_0 +274 0x6E00 //RX_TDDRC_SLANT_1 +275 0x1000 //RX_TDDRC_ALPHA_UP_0 +276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x199A //RX_TDDRC_HMNC_GAIN +279 0x0001 //RX_TDDRC_SMT_FLAG +280 0x0CCD //RX_TDDRC_SMT_W +281 0x0407 //RX_TDDRC_DRC_GAIN +195 0x001C //RX_FDEQ_SUBNUM +196 0x4840 //RX_FDEQ_GAIN_0 +197 0x4040 //RX_FDEQ_GAIN_1 +198 0x485C //RX_FDEQ_GAIN_2 +199 0x6873 //RX_FDEQ_GAIN_3 +200 0x7F8E //RX_FDEQ_GAIN_4 +201 0x847E //RX_FDEQ_GAIN_5 +202 0x7E80 //RX_FDEQ_GAIN_6 +203 0x8884 //RX_FDEQ_GAIN_7 +204 0x8890 //RX_FDEQ_GAIN_8 +205 0x8E8F //RX_FDEQ_GAIN_9 +206 0x8B77 //RX_FDEQ_GAIN_10 +207 0x6F7F //RX_FDEQ_GAIN_11 +208 0x6568 //RX_FDEQ_GAIN_12 +209 0x6050 //RX_FDEQ_GAIN_13 +210 0x4848 //RX_FDEQ_GAIN_14 +211 0x4848 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0202 //RX_FDEQ_BIN_0 +221 0x0203 //RX_FDEQ_BIN_1 +222 0x0303 //RX_FDEQ_BIN_2 +223 0x0304 //RX_FDEQ_BIN_3 +224 0x0405 //RX_FDEQ_BIN_4 +225 0x0506 //RX_FDEQ_BIN_5 +226 0x0708 //RX_FDEQ_BIN_6 +227 0x090A //RX_FDEQ_BIN_7 +228 0x0B0C //RX_FDEQ_BIN_8 +229 0x0D0E //RX_FDEQ_BIN_9 +230 0x0E0F //RX_FDEQ_BIN_10 +231 0x0F10 //RX_FDEQ_BIN_11 +232 0x1011 //RX_FDEQ_BIN_12 +233 0x1104 //RX_FDEQ_BIN_13 +234 0x0000 //RX_FDEQ_BIN_14 +235 0x0000 //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x4000 //RX_FDEQ_RESRV_0 +245 0x0320 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0030 //RX_FDDRC_BAND_MARGIN_1 +248 0x0050 //RX_FDDRC_BAND_MARGIN_2 +249 0x0080 //RX_FDDRC_BAND_MARGIN_3 +250 0x0007 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x5000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x6400 //RX_FDDRC_THRD_3_2 +258 0x6400 //RX_FDDRC_THRD_3_3 +259 0x2000 //RX_FDDRC_SLANT_0_0 +260 0x2000 //RX_FDDRC_SLANT_0_1 +261 0x2000 //RX_FDDRC_SLANT_0_2 +262 0x2000 //RX_FDDRC_SLANT_0_3 +263 0x5333 //RX_FDDRC_SLANT_1_0 +264 0x5333 //RX_FDDRC_SLANT_1_1 +265 0x5333 //RX_FDDRC_SLANT_1_2 +266 0x5333 //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +286 0x0057 //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 +#VOL 5 +163 0x1000 //RX_TDDRC_ALPHA_UP_1 +164 0x1000 //RX_TDDRC_ALPHA_UP_2 +165 0x1000 //RX_TDDRC_ALPHA_UP_3 +166 0x1000 //RX_TDDRC_ALPHA_UP_4 +184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +190 0x7000 //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +269 0x0000 //RX_TDDRC_THRD_0 +270 0x0000 //RX_TDDRC_THRD_1 +271 0x1800 //RX_TDDRC_THRD_2 +272 0x1800 //RX_TDDRC_THRD_3 +273 0x3000 //RX_TDDRC_SLANT_0 +274 0x6E00 //RX_TDDRC_SLANT_1 +275 0x1000 //RX_TDDRC_ALPHA_UP_0 +276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x199A //RX_TDDRC_HMNC_GAIN +279 0x0001 //RX_TDDRC_SMT_FLAG +280 0x0CCD //RX_TDDRC_SMT_W +281 0x0407 //RX_TDDRC_DRC_GAIN +195 0x001C //RX_FDEQ_SUBNUM +196 0x4840 //RX_FDEQ_GAIN_0 +197 0x4040 //RX_FDEQ_GAIN_1 +198 0x485C //RX_FDEQ_GAIN_2 +199 0x6873 //RX_FDEQ_GAIN_3 +200 0x7F8E //RX_FDEQ_GAIN_4 +201 0x847E //RX_FDEQ_GAIN_5 +202 0x7E80 //RX_FDEQ_GAIN_6 +203 0x8884 //RX_FDEQ_GAIN_7 +204 0x8890 //RX_FDEQ_GAIN_8 +205 0x8E8F //RX_FDEQ_GAIN_9 +206 0x8B77 //RX_FDEQ_GAIN_10 +207 0x6F7F //RX_FDEQ_GAIN_11 +208 0x6568 //RX_FDEQ_GAIN_12 +209 0x6050 //RX_FDEQ_GAIN_13 +210 0x4848 //RX_FDEQ_GAIN_14 +211 0x4848 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0202 //RX_FDEQ_BIN_0 +221 0x0203 //RX_FDEQ_BIN_1 +222 0x0303 //RX_FDEQ_BIN_2 +223 0x0304 //RX_FDEQ_BIN_3 +224 0x0405 //RX_FDEQ_BIN_4 +225 0x0506 //RX_FDEQ_BIN_5 +226 0x0708 //RX_FDEQ_BIN_6 +227 0x090A //RX_FDEQ_BIN_7 +228 0x0B0C //RX_FDEQ_BIN_8 +229 0x0D0E //RX_FDEQ_BIN_9 +230 0x0E0F //RX_FDEQ_BIN_10 +231 0x0F10 //RX_FDEQ_BIN_11 +232 0x1011 //RX_FDEQ_BIN_12 +233 0x1104 //RX_FDEQ_BIN_13 +234 0x0000 //RX_FDEQ_BIN_14 +235 0x0000 //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x4000 //RX_FDEQ_RESRV_0 +245 0x0320 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0030 //RX_FDDRC_BAND_MARGIN_1 +248 0x0050 //RX_FDDRC_BAND_MARGIN_2 +249 0x0080 //RX_FDDRC_BAND_MARGIN_3 +250 0x0007 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x5000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x6400 //RX_FDDRC_THRD_3_2 +258 0x6400 //RX_FDDRC_THRD_3_3 +259 0x2000 //RX_FDDRC_SLANT_0_0 +260 0x2000 //RX_FDDRC_SLANT_0_1 +261 0x2000 //RX_FDDRC_SLANT_0_2 +262 0x2000 //RX_FDDRC_SLANT_0_3 +263 0x5333 //RX_FDDRC_SLANT_1_0 +264 0x5333 //RX_FDDRC_SLANT_1_1 +265 0x5333 //RX_FDDRC_SLANT_1_2 +266 0x5333 //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +286 0x008E //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 +#VOL 6 +163 0x1000 //RX_TDDRC_ALPHA_UP_1 +164 0x1000 //RX_TDDRC_ALPHA_UP_2 +165 0x1000 //RX_TDDRC_ALPHA_UP_3 +166 0x1000 //RX_TDDRC_ALPHA_UP_4 +184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +190 0x7000 //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +269 0x0000 //RX_TDDRC_THRD_0 +270 0x0000 //RX_TDDRC_THRD_1 +271 0x1800 //RX_TDDRC_THRD_2 +272 0x1800 //RX_TDDRC_THRD_3 +273 0x3000 //RX_TDDRC_SLANT_0 +274 0x6E00 //RX_TDDRC_SLANT_1 +275 0x1000 //RX_TDDRC_ALPHA_UP_0 +276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x199A //RX_TDDRC_HMNC_GAIN +279 0x0001 //RX_TDDRC_SMT_FLAG +280 0x0CCD //RX_TDDRC_SMT_W +281 0x0407 //RX_TDDRC_DRC_GAIN +195 0x001C //RX_FDEQ_SUBNUM +196 0x4840 //RX_FDEQ_GAIN_0 +197 0x4040 //RX_FDEQ_GAIN_1 +198 0x485C //RX_FDEQ_GAIN_2 +199 0x6873 //RX_FDEQ_GAIN_3 +200 0x7F8E //RX_FDEQ_GAIN_4 +201 0x847E //RX_FDEQ_GAIN_5 +202 0x7E80 //RX_FDEQ_GAIN_6 +203 0x8884 //RX_FDEQ_GAIN_7 +204 0x8890 //RX_FDEQ_GAIN_8 +205 0x8E8F //RX_FDEQ_GAIN_9 +206 0x8B77 //RX_FDEQ_GAIN_10 +207 0x6F7F //RX_FDEQ_GAIN_11 +208 0x6568 //RX_FDEQ_GAIN_12 +209 0x6050 //RX_FDEQ_GAIN_13 +210 0x4848 //RX_FDEQ_GAIN_14 +211 0x4848 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0202 //RX_FDEQ_BIN_0 +221 0x0203 //RX_FDEQ_BIN_1 +222 0x0303 //RX_FDEQ_BIN_2 +223 0x0304 //RX_FDEQ_BIN_3 +224 0x0405 //RX_FDEQ_BIN_4 +225 0x0506 //RX_FDEQ_BIN_5 +226 0x0708 //RX_FDEQ_BIN_6 +227 0x090A //RX_FDEQ_BIN_7 +228 0x0B0C //RX_FDEQ_BIN_8 +229 0x0D0E //RX_FDEQ_BIN_9 +230 0x0E0F //RX_FDEQ_BIN_10 +231 0x0F10 //RX_FDEQ_BIN_11 +232 0x1011 //RX_FDEQ_BIN_12 +233 0x1104 //RX_FDEQ_BIN_13 +234 0x0000 //RX_FDEQ_BIN_14 +235 0x0000 //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x4000 //RX_FDEQ_RESRV_0 +245 0x0320 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0030 //RX_FDDRC_BAND_MARGIN_1 +248 0x0050 //RX_FDDRC_BAND_MARGIN_2 +249 0x0080 //RX_FDDRC_BAND_MARGIN_3 +250 0x0007 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x5000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x6400 //RX_FDDRC_THRD_3_2 +258 0x6400 //RX_FDDRC_THRD_3_3 +259 0x2000 //RX_FDDRC_SLANT_0_0 +260 0x2000 //RX_FDDRC_SLANT_0_1 +261 0x2000 //RX_FDDRC_SLANT_0_2 +262 0x2000 //RX_FDDRC_SLANT_0_3 +263 0x5333 //RX_FDDRC_SLANT_1_0 +264 0x5333 //RX_FDDRC_SLANT_1_1 +265 0x5333 //RX_FDDRC_SLANT_1_2 +266 0x5333 //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +286 0x0100 //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 #CASE_NAME HANDSET-HANDSET-TMOBILE_US-SWB -#PARAM_TYPE TX+RX -#TOTAL_CUSTOM_STEP 7 +#PARAM_MODE Full +#PARAM_TYPE TX+2RX +#TOTAL_CUSTOM_STEP 7+7 #TX 0 0x0000 //TX_OPERATION_MODE_0 1 0x0000 //TX_OPERATION_MODE_1 -2 0x0026 //TX_PATCH_REG +2 0x0076 //TX_PATCH_REG 3 0x6F7E //TX_SENDFUNC_MODE_0 4 0x0001 //TX_SENDFUNC_MODE_1 5 0x0002 //TX_NUM_MIC @@ -22817,7 +34739,7 @@ 18 0x0000 //TX_SYS_RESRV_2 19 0x0000 //TX_SYS_RESRV_3 20 0x0000 //TX_DIST2REF0 -21 0x009D //TX_DIST2REF1 +21 0x009C //TX_DIST2REF1 22 0x0000 //TX_DIST2REF_02 23 0x0000 //TX_DIST2REF_03 24 0x0000 //TX_DIST2REF_04 @@ -23047,12 +34969,12 @@ 248 0xF800 //TX_THR_SN_EST_6 249 0xF700 //TX_THR_SN_EST_7 250 0x0000 //TX_DELTA_THR_SN_EST_0 -251 0x0100 //TX_DELTA_THR_SN_EST_1 +251 0x0200 //TX_DELTA_THR_SN_EST_1 252 0x0200 //TX_DELTA_THR_SN_EST_2 253 0x0200 //TX_DELTA_THR_SN_EST_3 -254 0x0200 //TX_DELTA_THR_SN_EST_4 -255 0x0100 //TX_DELTA_THR_SN_EST_5 -256 0x0200 //TX_DELTA_THR_SN_EST_6 +254 0x0100 //TX_DELTA_THR_SN_EST_4 +255 0x0200 //TX_DELTA_THR_SN_EST_5 +256 0x0100 //TX_DELTA_THR_SN_EST_6 257 0x0200 //TX_DELTA_THR_SN_EST_7 258 0x4000 //TX_LAMBDA_NN_EST_0 259 0x4000 //TX_LAMBDA_NN_EST_1 @@ -23078,18 +35000,18 @@ 279 0x1000 //TX_B_POST_FLT_0 280 0x1000 //TX_B_POST_FLT_1 281 0x0014 //TX_NS_LVL_CTRL_0 -282 0x0016 //TX_NS_LVL_CTRL_1 -283 0x002C //TX_NS_LVL_CTRL_2 -284 0x0016 //TX_NS_LVL_CTRL_3 -285 0x0018 //TX_NS_LVL_CTRL_4 -286 0x0016 //TX_NS_LVL_CTRL_5 -287 0x0012 //TX_NS_LVL_CTRL_6 +282 0x002C //TX_NS_LVL_CTRL_1 +283 0x0016 //TX_NS_LVL_CTRL_2 +284 0x0018 //TX_NS_LVL_CTRL_3 +285 0x0016 //TX_NS_LVL_CTRL_4 +286 0x0012 //TX_NS_LVL_CTRL_5 +287 0x0016 //TX_NS_LVL_CTRL_6 288 0x0017 //TX_NS_LVL_CTRL_7 289 0x000E //TX_MIN_GAIN_S_0 -290 0x0012 //TX_MIN_GAIN_S_1 -291 0x000D //TX_MIN_GAIN_S_2 -292 0x0012 //TX_MIN_GAIN_S_3 -293 0x0010 //TX_MIN_GAIN_S_4 +290 0x000D //TX_MIN_GAIN_S_1 +291 0x0012 //TX_MIN_GAIN_S_2 +292 0x0010 //TX_MIN_GAIN_S_3 +293 0x0012 //TX_MIN_GAIN_S_4 294 0x0012 //TX_MIN_GAIN_S_5 295 0x0012 //TX_MIN_GAIN_S_6 296 0x0012 //TX_MIN_GAIN_S_7 @@ -23111,29 +35033,29 @@ 312 0x7FFF //TX_A_POST_FILT_0 313 0x2000 //TX_A_POST_FILT_1 314 0x4000 //TX_A_POST_FILT_S_0 -315 0x5000 //TX_A_POST_FILT_S_1 +315 0x4000 //TX_A_POST_FILT_S_1 316 0x4000 //TX_A_POST_FILT_S_2 317 0x4000 //TX_A_POST_FILT_S_3 318 0x4000 //TX_A_POST_FILT_S_4 319 0x4000 //TX_A_POST_FILT_S_5 -320 0x4000 //TX_A_POST_FILT_S_6 +320 0x5000 //TX_A_POST_FILT_S_6 321 0x7000 //TX_A_POST_FILT_S_7 322 0x1000 //TX_B_POST_FILT_0 323 0x1000 //TX_B_POST_FILT_1 -324 0x3000 //TX_B_POST_FILT_2 -325 0x1000 //TX_B_POST_FILT_3 -326 0x5000 //TX_B_POST_FILT_4 -327 0x2000 //TX_B_POST_FILT_5 -328 0x6000 //TX_B_POST_FILT_6 +324 0x2000 //TX_B_POST_FILT_2 +325 0x2000 //TX_B_POST_FILT_3 +326 0x2000 //TX_B_POST_FILT_4 +327 0x1000 //TX_B_POST_FILT_5 +328 0x3000 //TX_B_POST_FILT_6 329 0x3000 //TX_B_POST_FILT_7 330 0x1000 //TX_B_LESSCUT_RTO_S_0 -331 0x6000 //TX_B_LESSCUT_RTO_S_1 -332 0x6000 //TX_B_LESSCUT_RTO_S_2 -333 0x6000 //TX_B_LESSCUT_RTO_S_3 -334 0x6000 //TX_B_LESSCUT_RTO_S_4 -335 0x6000 //TX_B_LESSCUT_RTO_S_5 -336 0x7FFF //TX_B_LESSCUT_RTO_S_6 -337 0x7FFF //TX_B_LESSCUT_RTO_S_7 +331 0x1000 //TX_B_LESSCUT_RTO_S_1 +332 0x1000 //TX_B_LESSCUT_RTO_S_2 +333 0x1000 //TX_B_LESSCUT_RTO_S_3 +334 0x1000 //TX_B_LESSCUT_RTO_S_4 +335 0x1000 //TX_B_LESSCUT_RTO_S_5 +336 0x1000 //TX_B_LESSCUT_RTO_S_6 +337 0x1000 //TX_B_LESSCUT_RTO_S_7 338 0x7E14 //TX_LAMBDA_PFILT 339 0x7C29 //TX_LAMBDA_PFILT_S_0 340 0x7C29 //TX_LAMBDA_PFILT_S_1 @@ -23176,10 +35098,10 @@ 377 0x4E20 //TX_NOISE_TH_5_4 378 0x1194 //TX_NOISE_TH_6 379 0x0014 //TX_MINENOISE_TH -380 0x4000 //TX_MINENOISE_MIC0_TH_MTS -381 0xFFEE //TX_MINENOISE_MIC0_TH_EXP -382 0x6000 //TX_MINENOISE_MIC0_S_TH_MTS -383 0xFFF3 //TX_MINENOISE_MIC0_S_TH_EXP +380 0xD508 //TX_MORENS_TFMASK_TH +381 0x0001 //TX_DRC_QUIET_FLOOR +382 0x6D60 //TX_RATIODTL_CUT_TH +383 0x0DAC //TX_DT_CUT_K1 384 0x00A5 //TX_OUT_ENER_S_TH_CLEAN 385 0x00A5 //TX_OUT_ENER_S_TH_LESSCLEAN 386 0x00A5 //TX_OUT_ENER_S_TH_NOISY @@ -23187,15 +35109,15 @@ 388 0x0200 //TX_OUT_ENER_TH_SPEECH 389 0x2000 //TX_SN_NPB_GAIN 390 0x0000 //TX_NN_NPB_GAIN -391 0x0000 //TX_CSX_ALPHA_0 -392 0x0000 //TX_CSX_ALPHA_1 -393 0x0000 //TX_CSX_ALPHA_2 -394 0x0000 //TX_CSX_ALPHA_3 -395 0x0800 //TX_MU_ARSP_EST -396 0x00C8 //TX_P_OUTBEAM_MIN_TH +391 0x3000 //TX_POST_MASK_SUP_HSNE +392 0x07D0 //TX_TAIL_DET_TH +393 0x4000 //TX_B_LESSCUT_RTO_WTA +394 0x0000 //TX_MEL_G_R +395 0x0080 //TX_SUPHIGH_TH +396 0x0000 //TX_MASK_G_R 397 0x0002 //TX_EXTRA_NS_L -398 0x0800 //TX_EXTRA_NS_A -399 0x0005 //TX_VR_NOISE_FLOOR_TH +398 0x1800 //TX_C_POST_FLT_MASK +399 0x7FFF //TX_A_POST_FLT_WNS 400 0x0148 //TX_MIN_G_LOW300HZ 401 0x0004 //TX_MAXLEVEL_CNG 402 0x00B4 //TX_STN_NOISE_TH @@ -23310,16 +35232,16 @@ 511 0x6666 //TX_MIC_TO_BFGAIN 512 0x0000 //TX_MICTOBFGAIN0 513 0x0000 //TX_FASTMUE_TH -514 0x0000 //TX_DERVB_LEN_0 -515 0x0000 //TX_DERVB_LEN_1 -516 0x0000 //TX_RHO_DERVB -517 0x0000 //TX_MIC_INDX_DERVB -518 0x0000 //TX_MU_DERVB -519 0x0000 //TX_DR_RESRV_0 -520 0x0000 //TX_DR_RESRV_1 -521 0x0000 //TX_DR_RESRV_2 -522 0x0000 //TX_DR_RESRV_3 -523 0x0000 //TX_DR_RESRV_4 +514 0x2CCC //TX_DEREVERB_LF_MU +515 0x3200 //TX_DEREVERB_HF_MU +516 0x0007 //TX_DEREVERB_DELAY +517 0x0004 //TX_DEREVERB_COEF_LEN +518 0x0003 //TX_DEREVERB_DNR +519 0x0000 //TX_DEREVERB_ALPHA +520 0x0000 //TX_DEREVERB_BETA +521 0x3A98 //TX_GSC_RTOL_TH +522 0x3A98 //TX_GSC_RTOH_TH +523 0x7E2C //TX_WIDE2_MEANHTH 524 0x0000 //TX_DR_RESRV_5 525 0x0000 //TX_DR_RESRV_6 526 0x0000 //TX_DR_RESRV_7 @@ -23366,19 +35288,19 @@ 567 0x5C54 //TX_FDEQ_GAIN_0 568 0x5048 //TX_FDEQ_GAIN_1 569 0x4C4C //TX_FDEQ_GAIN_2 -570 0x474F //TX_FDEQ_GAIN_3 -571 0x4842 //TX_FDEQ_GAIN_4 -572 0x4541 //TX_FDEQ_GAIN_5 -573 0x4247 //TX_FDEQ_GAIN_6 -574 0x4743 //TX_FDEQ_GAIN_7 -575 0x4445 //TX_FDEQ_GAIN_8 -576 0x4750 //TX_FDEQ_GAIN_9 -577 0x3F48 //TX_FDEQ_GAIN_10 -578 0x4844 //TX_FDEQ_GAIN_11 -579 0x3E48 //TX_FDEQ_GAIN_12 -580 0x4E4A //TX_FDEQ_GAIN_13 -581 0x5459 //TX_FDEQ_GAIN_14 -582 0x6448 //TX_FDEQ_GAIN_15 +570 0x474A //TX_FDEQ_GAIN_3 +571 0x4640 //TX_FDEQ_GAIN_4 +572 0x4446 //TX_FDEQ_GAIN_5 +573 0x4B53 //TX_FDEQ_GAIN_6 +574 0x5448 //TX_FDEQ_GAIN_7 +575 0x4243 //TX_FDEQ_GAIN_8 +576 0x434C //TX_FDEQ_GAIN_9 +577 0x484D //TX_FDEQ_GAIN_10 +578 0x4D4D //TX_FDEQ_GAIN_11 +579 0x4B4E //TX_FDEQ_GAIN_12 +580 0x5054 //TX_FDEQ_GAIN_13 +581 0x5D68 //TX_FDEQ_GAIN_14 +582 0x7C6B //TX_FDEQ_GAIN_15 583 0x4848 //TX_FDEQ_GAIN_16 584 0x4848 //TX_FDEQ_GAIN_17 585 0x4848 //TX_FDEQ_GAIN_18 @@ -23421,14 +35343,14 @@ 622 0x4848 //TX_PREEQ_GAIN_MIC0_5 623 0x4848 //TX_PREEQ_GAIN_MIC0_6 624 0x4848 //TX_PREEQ_GAIN_MIC0_7 -625 0x4646 //TX_PREEQ_GAIN_MIC0_8 -626 0x4545 //TX_PREEQ_GAIN_MIC0_9 -627 0x4545 //TX_PREEQ_GAIN_MIC0_10 -628 0x4544 //TX_PREEQ_GAIN_MIC0_11 -629 0x4444 //TX_PREEQ_GAIN_MIC0_12 -630 0x4343 //TX_PREEQ_GAIN_MIC0_13 -631 0x4241 //TX_PREEQ_GAIN_MIC0_14 -632 0x3C3E //TX_PREEQ_GAIN_MIC0_15 +625 0x4848 //TX_PREEQ_GAIN_MIC0_8 +626 0x4848 //TX_PREEQ_GAIN_MIC0_9 +627 0x4848 //TX_PREEQ_GAIN_MIC0_10 +628 0x4848 //TX_PREEQ_GAIN_MIC0_11 +629 0x4848 //TX_PREEQ_GAIN_MIC0_12 +630 0x4848 //TX_PREEQ_GAIN_MIC0_13 +631 0x4848 //TX_PREEQ_GAIN_MIC0_14 +632 0x4848 //TX_PREEQ_GAIN_MIC0_15 633 0x4848 //TX_PREEQ_GAIN_MIC0_16 634 0x4848 //TX_PREEQ_GAIN_MIC0_17 635 0x4848 //TX_PREEQ_GAIN_MIC0_18 @@ -23470,15 +35392,15 @@ 671 0x4848 //TX_PREEQ_GAIN_MIC1_5 672 0x4848 //TX_PREEQ_GAIN_MIC1_6 673 0x4848 //TX_PREEQ_GAIN_MIC1_7 -674 0x484A //TX_PREEQ_GAIN_MIC1_8 -675 0x4B4C //TX_PREEQ_GAIN_MIC1_9 -676 0x4B4A //TX_PREEQ_GAIN_MIC1_10 -677 0x4A48 //TX_PREEQ_GAIN_MIC1_11 -678 0x4C4C //TX_PREEQ_GAIN_MIC1_12 -679 0x4C4C //TX_PREEQ_GAIN_MIC1_13 -680 0x4848 //TX_PREEQ_GAIN_MIC1_14 -681 0x4848 //TX_PREEQ_GAIN_MIC1_15 -682 0x4848 //TX_PREEQ_GAIN_MIC1_16 +674 0x4848 //TX_PREEQ_GAIN_MIC1_8 +675 0x494A //TX_PREEQ_GAIN_MIC1_9 +676 0x4B4B //TX_PREEQ_GAIN_MIC1_10 +677 0x4B4B //TX_PREEQ_GAIN_MIC1_11 +678 0x4D4C //TX_PREEQ_GAIN_MIC1_12 +679 0x4A48 //TX_PREEQ_GAIN_MIC1_13 +680 0x4840 //TX_PREEQ_GAIN_MIC1_14 +681 0x3434 //TX_PREEQ_GAIN_MIC1_15 +682 0x3C48 //TX_PREEQ_GAIN_MIC1_16 683 0x4848 //TX_PREEQ_GAIN_MIC1_17 684 0x4848 //TX_PREEQ_GAIN_MIC1_18 685 0x4848 //TX_PREEQ_GAIN_MIC1_19 @@ -23492,17 +35414,17 @@ 693 0x0304 //TX_PREEQ_BIN_MIC1_3 694 0x0405 //TX_PREEQ_BIN_MIC1_4 695 0x0506 //TX_PREEQ_BIN_MIC1_5 -696 0x0708 //TX_PREEQ_BIN_MIC1_6 -697 0x090A //TX_PREEQ_BIN_MIC1_7 -698 0x0B0C //TX_PREEQ_BIN_MIC1_8 -699 0x0D0E //TX_PREEQ_BIN_MIC1_9 -700 0x0F10 //TX_PREEQ_BIN_MIC1_10 -701 0x1011 //TX_PREEQ_BIN_MIC1_11 -702 0x1112 //TX_PREEQ_BIN_MIC1_12 -703 0x120B //TX_PREEQ_BIN_MIC1_13 -704 0x0000 //TX_PREEQ_BIN_MIC1_14 -705 0x0000 //TX_PREEQ_BIN_MIC1_15 -706 0x0000 //TX_PREEQ_BIN_MIC1_16 +696 0x0808 //TX_PREEQ_BIN_MIC1_6 +697 0x0809 //TX_PREEQ_BIN_MIC1_7 +698 0x0A0A //TX_PREEQ_BIN_MIC1_8 +699 0x0C10 //TX_PREEQ_BIN_MIC1_9 +700 0x1013 //TX_PREEQ_BIN_MIC1_10 +701 0x1414 //TX_PREEQ_BIN_MIC1_11 +702 0x261E //TX_PREEQ_BIN_MIC1_12 +703 0x1E14 //TX_PREEQ_BIN_MIC1_13 +704 0x1414 //TX_PREEQ_BIN_MIC1_14 +705 0x2814 //TX_PREEQ_BIN_MIC1_15 +706 0x401E //TX_PREEQ_BIN_MIC1_16 707 0x0000 //TX_PREEQ_BIN_MIC1_17 708 0x0000 //TX_PREEQ_BIN_MIC1_18 709 0x0000 //TX_PREEQ_BIN_MIC1_19 @@ -23570,7 +35492,7 @@ 771 0x0046 //TX_MIC_PWR_BIAS_2 772 0x0046 //TX_MIC_PWR_BIAS_3 773 0x0000 //TX_GAIN_LIMIT_0 -774 0x0006 //TX_GAIN_LIMIT_1 +774 0x0005 //TX_GAIN_LIMIT_1 775 0x0000 //TX_GAIN_LIMIT_2 776 0x0000 //TX_GAIN_LIMIT_3 777 0x7F5B //TX_BVE_NOVAD0_ALPHADOWN @@ -23662,7 +35584,7 @@ 863 0x199A //TX_TDDRC_HMNC_GAIN 864 0x0000 //TX_TDDRC_SMT_FLAG 865 0x0CCD //TX_TDDRC_SMT_W -866 0x05F7 //TX_TDDRC_DRC_GAIN +866 0x0504 //TX_TDDRC_DRC_GAIN 867 0x7FFF //TX_TDDRC_LMT_THRD 868 0x0000 //TX_TDDRC_LMT_ALPHA 869 0x0000 //TX_TFMASKLTH @@ -23693,8 +35615,73 @@ 894 0xC000 //TX_FASTNS_SSA_THHFL 895 0xCCCC //TX_FASTNS_SSA_THLFH 896 0xD999 //TX_FASTNS_SSA_THHFH +897 0x2339 //TX_SENDFUNC_REG_MICMUTE +898 0x0021 //TX_SENDFUNC_REG_MICMUTE1 +899 0x02BC //TX_MICMUTE_RATIO_THR +900 0x0140 //TX_MICMUTE_AMP_THR +901 0x0004 //TX_MICMUTE_HPF_IND +902 0x00C0 //TX_MICMUTE_LOG_EYR_TH +903 0x0008 //TX_MICMUTE_CVG_TIME +904 0x0008 //TX_MICMUTE_RELEASE_TIME +905 0x01FE //TX_MIC_VOLUME_MIC0MUTE +906 0x0020 //TX_MICMUTE_EPD_OFFSET_0 +907 0x001E //TX_MICMUTE_FRQ_AEC_L +908 0x7999 //TX_MICMUTE_EAD_THR +909 0x7FFF //TX_MICMUTE_LAMBDA_CB_NLE +910 0x7FFF //TX_MICMUTE_LAMBDA_RE_EST +911 0x4000 //TX_DTD_THR1_MICMUTE_0 +912 0x7000 //TX_DTD_THR1_MICMUTE_1 +913 0x7FFF //TX_DTD_THR1_MICMUTE_2 +914 0x7FFF //TX_DTD_THR1_MICMUTE_3 +915 0x6CCC //TX_DTD_THR2_MICMUTE_0 +916 0x0400 //TX_MICMUTE_MIN_EQ_RE_EST_0 +917 0x0400 //TX_MICMUTE_MIN_EQ_RE_EST_1 +918 0x1000 //TX_MICMUTE_MIN_EQ_RE_EST_2 +919 0x7FFF //TX_MICMUTE_MIN_EQ_RE_EST_3 +920 0x7FFF //TX_MICMUTE_MIN_EQ_RE_EST_4 +921 0x4000 //TX_MICMUTE_C_POST_FLT +922 0x03E8 //TX_MICMUTE_DT_CUT_K +923 0x0001 //TX_MICMUTE_DT_CUT_THR +924 0x03E8 //TX_MICMUTE_DT_CUT_K2 +925 0x0001 //TX_MICMUTE_DT_CUT_THR2 +926 0x0064 //TX_MICMUTE_DT2_HOLD_N +927 0x1000 //TX_MICMUTE_RATIODTH_THCUT +928 0x1000 //TX_MICMUTE_B_POST_FLT_ECHOL +929 0x7FFF //TX_MICMUTE_B_POST_FLT_ECHOH +930 0x0400 //TX_MICMUTE_C_POST_FLT_MASK +931 0x7999 //TX_MICMUTE_RATIODTL_CUT_TH +932 0x0258 //TX_MICMUTE_DT_CUT_K1 +933 0x0800 //TX_MICMUTE_N2_SN_EST +934 0xFC00 //TX_MICMUTE_THR_SN_EST_0 +935 0x001C //TX_MICMUTE_MIN_G_CTRL_0 +936 0x6000 //TX_MICMUTE_A_POST_FILT_S_0 +937 0x7000 //TX_MICMUTE_B_POST_FILT_0 +938 0x2710 //TX_MIC1RUB_AMP_THR +939 0x0010 //TX_MIC1MUTE_RATIO_THR +940 0x0450 //TX_MIC1MUTE_AMP_THR +941 0x0008 //TX_MIC1MUTE_CVG_TIME +942 0x0008 //TX_MIC1MUTE_RELEASE_TIME +943 0x0000 //TX_AMS_RESRV_01 +944 0x0000 //TX_AMS_RESRV_02 +945 0x0000 //TX_AMS_RESRV_03 +946 0x0000 //TX_AMS_RESRV_04 +947 0x0000 //TX_AMS_RESRV_05 +948 0x0000 //TX_AMS_RESRV_06 +949 0x0000 //TX_AMS_RESRV_07 +950 0x0000 //TX_AMS_RESRV_08 +951 0x0000 //TX_AMS_RESRV_09 +952 0x0000 //TX_AMS_RESRV_10 +953 0x0000 //TX_AMS_RESRV_11 +954 0x0000 //TX_AMS_RESRV_12 +955 0x0000 //TX_AMS_RESRV_13 +956 0x0000 //TX_AMS_RESRV_14 +957 0x0000 //TX_AMS_RESRV_15 +958 0x0000 //TX_AMS_RESRV_16 +959 0x0000 //TX_AMS_RESRV_17 +960 0x0000 //TX_AMS_RESRV_18 +961 0x0000 //TX_AMS_RESRV_19 #RX -0 0x003C //RX_RECVFUNC_MODE_0 +0 0x203C //RX_RECVFUNC_MODE_0 1 0x0000 //RX_RECVFUNC_MODE_1 2 0x0003 //RX_SAMPLINGFREQ_SIG 3 0x0003 //RX_SAMPLINGFREQ_PROC @@ -23704,7 +35691,7 @@ 7 0x1000 //RX_TDDRC_ALPHA_UP_2 8 0x1000 //RX_TDDRC_ALPHA_UP_3 9 0x1000 //RX_TDDRC_ALPHA_UP_4 -10 0x0600 //RX_PGA +10 0x05AA //RX_PGA 11 0x7FFF //RX_A_HP 12 0x4000 //RX_B_PE 13 0x5800 //RX_THR_PITCH_DET_0 @@ -23733,22 +35720,22 @@ 36 0x0000 //RX_LMT_THRD 37 0x4000 //RX_LMT_ALPHA 38 0x0020 //RX_FDEQ_SUBNUM -39 0x4840 //RX_FDEQ_GAIN_0 -40 0x4040 //RX_FDEQ_GAIN_1 -41 0x4559 //RX_FDEQ_GAIN_2 -42 0x6473 //RX_FDEQ_GAIN_3 -43 0x8690 //RX_FDEQ_GAIN_4 -44 0x8887 //RX_FDEQ_GAIN_5 -45 0x8787 //RX_FDEQ_GAIN_6 -46 0x8E91 //RX_FDEQ_GAIN_7 -47 0x9099 //RX_FDEQ_GAIN_8 -48 0x96A2 //RX_FDEQ_GAIN_9 -49 0xAB9C //RX_FDEQ_GAIN_10 -50 0x9287 //RX_FDEQ_GAIN_11 -51 0x716E //RX_FDEQ_GAIN_12 -52 0x5C54 //RX_FDEQ_GAIN_13 -53 0x5859 //RX_FDEQ_GAIN_14 -54 0x5861 //RX_FDEQ_GAIN_15 +39 0x483E //RX_FDEQ_GAIN_0 +40 0x3E3E //RX_FDEQ_GAIN_1 +41 0x3E4C //RX_FDEQ_GAIN_2 +42 0x506A //RX_FDEQ_GAIN_3 +43 0x8082 //RX_FDEQ_GAIN_4 +44 0x8982 //RX_FDEQ_GAIN_5 +45 0x8880 //RX_FDEQ_GAIN_6 +46 0x8888 //RX_FDEQ_GAIN_7 +47 0x949C //RX_FDEQ_GAIN_8 +48 0x9AAB //RX_FDEQ_GAIN_9 +49 0xAEA0 //RX_FDEQ_GAIN_10 +50 0x9487 //RX_FDEQ_GAIN_11 +51 0x6F64 //RX_FDEQ_GAIN_12 +52 0x625A //RX_FDEQ_GAIN_13 +53 0x5D70 //RX_FDEQ_GAIN_14 +54 0x7C8C //RX_FDEQ_GAIN_15 55 0x4848 //RX_FDEQ_GAIN_16 56 0x4848 //RX_FDEQ_GAIN_17 57 0x4848 //RX_FDEQ_GAIN_18 @@ -23759,19 +35746,19 @@ 62 0x4848 //RX_FDEQ_GAIN_23 63 0x0202 //RX_FDEQ_BIN_0 64 0x0202 //RX_FDEQ_BIN_1 -65 0x0302 //RX_FDEQ_BIN_2 -66 0x0304 //RX_FDEQ_BIN_3 -67 0x0405 //RX_FDEQ_BIN_4 -68 0x0506 //RX_FDEQ_BIN_5 +65 0x0301 //RX_FDEQ_BIN_2 +66 0x0404 //RX_FDEQ_BIN_3 +67 0x0406 //RX_FDEQ_BIN_4 +68 0x0109 //RX_FDEQ_BIN_5 69 0x0708 //RX_FDEQ_BIN_6 70 0x090A //RX_FDEQ_BIN_7 71 0x0B0C //RX_FDEQ_BIN_8 72 0x0D0E //RX_FDEQ_BIN_9 73 0x1013 //RX_FDEQ_BIN_10 74 0x1719 //RX_FDEQ_BIN_11 -75 0x1B1E //RX_FDEQ_BIN_12 -76 0x1E1E //RX_FDEQ_BIN_13 -77 0x1E28 //RX_FDEQ_BIN_14 +75 0x1B0F //RX_FDEQ_BIN_12 +76 0x141E //RX_FDEQ_BIN_13 +77 0x3728 //RX_FDEQ_BIN_14 78 0x282C //RX_FDEQ_BIN_15 79 0x0000 //RX_FDEQ_BIN_16 80 0x0000 //RX_FDEQ_BIN_17 @@ -23810,20 +35797,20 @@ 113 0x0002 //RX_TDDRC_THRD_1 114 0x1800 //RX_TDDRC_THRD_2 115 0x1800 //RX_TDDRC_THRD_3 -116 0x3000 //RX_TDDRC_SLANT_0 -117 0x6E00 //RX_TDDRC_SLANT_1 +116 0x7FFF //RX_TDDRC_SLANT_0 +117 0x7FFF //RX_TDDRC_SLANT_1 118 0x1000 //RX_TDDRC_ALPHA_UP_0 119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 120 0x0000 //RX_TDDRC_HMNC_FLAG 121 0x199A //RX_TDDRC_HMNC_GAIN 122 0x0001 //RX_TDDRC_SMT_FLAG 123 0x0CCD //RX_TDDRC_SMT_W -124 0x0478 //RX_TDDRC_DRC_GAIN +124 0x0650 //RX_TDDRC_DRC_GAIN 125 0x7C00 //RX_LAMBDA_PKA_FP 126 0x13E0 //RX_TPKA_FP 127 0x0080 //RX_MIN_G_FP 128 0x2000 //RX_MAX_G_FP -129 0x000E //RX_SPK_VOL +129 0x0100 //RX_SPK_VOL 130 0x0000 //RX_VOL_RESRV_0 131 0x0000 //RX_MAXLEVEL_CNG 132 0x3000 //RX_BWE_UV_TH @@ -23866,32 +35853,32 @@ 113 0x0002 //RX_TDDRC_THRD_1 114 0x1800 //RX_TDDRC_THRD_2 115 0x1800 //RX_TDDRC_THRD_3 -116 0x3000 //RX_TDDRC_SLANT_0 -117 0x6E00 //RX_TDDRC_SLANT_1 +116 0x7FFF //RX_TDDRC_SLANT_0 +117 0x7FFF //RX_TDDRC_SLANT_1 118 0x1000 //RX_TDDRC_ALPHA_UP_0 119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 120 0x0000 //RX_TDDRC_HMNC_FLAG 121 0x199A //RX_TDDRC_HMNC_GAIN 122 0x0001 //RX_TDDRC_SMT_FLAG 123 0x0CCD //RX_TDDRC_SMT_W -124 0x0478 //RX_TDDRC_DRC_GAIN +124 0x0650 //RX_TDDRC_DRC_GAIN 38 0x0020 //RX_FDEQ_SUBNUM -39 0x4840 //RX_FDEQ_GAIN_0 -40 0x4040 //RX_FDEQ_GAIN_1 -41 0x4559 //RX_FDEQ_GAIN_2 -42 0x6473 //RX_FDEQ_GAIN_3 -43 0x8690 //RX_FDEQ_GAIN_4 -44 0x8887 //RX_FDEQ_GAIN_5 -45 0x8787 //RX_FDEQ_GAIN_6 -46 0x8E91 //RX_FDEQ_GAIN_7 -47 0x9099 //RX_FDEQ_GAIN_8 -48 0x96A2 //RX_FDEQ_GAIN_9 -49 0xAB9C //RX_FDEQ_GAIN_10 -50 0x9287 //RX_FDEQ_GAIN_11 -51 0x716E //RX_FDEQ_GAIN_12 -52 0x5C54 //RX_FDEQ_GAIN_13 -53 0x5859 //RX_FDEQ_GAIN_14 -54 0x5861 //RX_FDEQ_GAIN_15 +39 0x483E //RX_FDEQ_GAIN_0 +40 0x3E3E //RX_FDEQ_GAIN_1 +41 0x3E4C //RX_FDEQ_GAIN_2 +42 0x506A //RX_FDEQ_GAIN_3 +43 0x8082 //RX_FDEQ_GAIN_4 +44 0x8982 //RX_FDEQ_GAIN_5 +45 0x8880 //RX_FDEQ_GAIN_6 +46 0x8888 //RX_FDEQ_GAIN_7 +47 0x949C //RX_FDEQ_GAIN_8 +48 0x9AAB //RX_FDEQ_GAIN_9 +49 0xAEA0 //RX_FDEQ_GAIN_10 +50 0x9487 //RX_FDEQ_GAIN_11 +51 0x6F64 //RX_FDEQ_GAIN_12 +52 0x625A //RX_FDEQ_GAIN_13 +53 0x5D70 //RX_FDEQ_GAIN_14 +54 0x7C8C //RX_FDEQ_GAIN_15 55 0x4848 //RX_FDEQ_GAIN_16 56 0x4848 //RX_FDEQ_GAIN_17 57 0x4848 //RX_FDEQ_GAIN_18 @@ -23902,19 +35889,19 @@ 62 0x4848 //RX_FDEQ_GAIN_23 63 0x0202 //RX_FDEQ_BIN_0 64 0x0202 //RX_FDEQ_BIN_1 -65 0x0302 //RX_FDEQ_BIN_2 -66 0x0304 //RX_FDEQ_BIN_3 -67 0x0405 //RX_FDEQ_BIN_4 -68 0x0506 //RX_FDEQ_BIN_5 +65 0x0301 //RX_FDEQ_BIN_2 +66 0x0404 //RX_FDEQ_BIN_3 +67 0x0406 //RX_FDEQ_BIN_4 +68 0x0109 //RX_FDEQ_BIN_5 69 0x0708 //RX_FDEQ_BIN_6 70 0x090A //RX_FDEQ_BIN_7 71 0x0B0C //RX_FDEQ_BIN_8 72 0x0D0E //RX_FDEQ_BIN_9 73 0x1013 //RX_FDEQ_BIN_10 74 0x1719 //RX_FDEQ_BIN_11 -75 0x1B1E //RX_FDEQ_BIN_12 -76 0x1E1E //RX_FDEQ_BIN_13 -77 0x1E28 //RX_FDEQ_BIN_14 +75 0x1B0F //RX_FDEQ_BIN_12 +76 0x141E //RX_FDEQ_BIN_13 +77 0x3728 //RX_FDEQ_BIN_14 78 0x282C //RX_FDEQ_BIN_15 79 0x0000 //RX_FDEQ_BIN_16 80 0x0000 //RX_FDEQ_BIN_17 @@ -23948,7 +35935,7 @@ 108 0x5333 //RX_FDDRC_SLANT_1_2 109 0x5333 //RX_FDDRC_SLANT_1_3 110 0x0000 //RX_FDDRC_RESRV_0 -129 0x000E //RX_SPK_VOL +129 0x000A //RX_SPK_VOL 130 0x0000 //RX_VOL_RESRV_0 #VOL 1 6 0x1000 //RX_TDDRC_ALPHA_UP_1 @@ -23965,32 +35952,32 @@ 113 0x0002 //RX_TDDRC_THRD_1 114 0x1800 //RX_TDDRC_THRD_2 115 0x1800 //RX_TDDRC_THRD_3 -116 0x3000 //RX_TDDRC_SLANT_0 -117 0x6E00 //RX_TDDRC_SLANT_1 +116 0x7FFF //RX_TDDRC_SLANT_0 +117 0x7FFF //RX_TDDRC_SLANT_1 118 0x1000 //RX_TDDRC_ALPHA_UP_0 119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 120 0x0000 //RX_TDDRC_HMNC_FLAG 121 0x199A //RX_TDDRC_HMNC_GAIN 122 0x0001 //RX_TDDRC_SMT_FLAG 123 0x0CCD //RX_TDDRC_SMT_W -124 0x045E //RX_TDDRC_DRC_GAIN +124 0x0650 //RX_TDDRC_DRC_GAIN 38 0x0020 //RX_FDEQ_SUBNUM -39 0x4840 //RX_FDEQ_GAIN_0 -40 0x4040 //RX_FDEQ_GAIN_1 -41 0x4559 //RX_FDEQ_GAIN_2 -42 0x6473 //RX_FDEQ_GAIN_3 -43 0x8690 //RX_FDEQ_GAIN_4 -44 0x8887 //RX_FDEQ_GAIN_5 -45 0x8787 //RX_FDEQ_GAIN_6 -46 0x8E91 //RX_FDEQ_GAIN_7 -47 0x9099 //RX_FDEQ_GAIN_8 -48 0x96A2 //RX_FDEQ_GAIN_9 -49 0xAB9C //RX_FDEQ_GAIN_10 -50 0x9287 //RX_FDEQ_GAIN_11 -51 0x716E //RX_FDEQ_GAIN_12 -52 0x5C54 //RX_FDEQ_GAIN_13 -53 0x5859 //RX_FDEQ_GAIN_14 -54 0x5861 //RX_FDEQ_GAIN_15 +39 0x483E //RX_FDEQ_GAIN_0 +40 0x3E3E //RX_FDEQ_GAIN_1 +41 0x3E4C //RX_FDEQ_GAIN_2 +42 0x506A //RX_FDEQ_GAIN_3 +43 0x8082 //RX_FDEQ_GAIN_4 +44 0x8982 //RX_FDEQ_GAIN_5 +45 0x8880 //RX_FDEQ_GAIN_6 +46 0x8888 //RX_FDEQ_GAIN_7 +47 0x949C //RX_FDEQ_GAIN_8 +48 0x9AAB //RX_FDEQ_GAIN_9 +49 0xAEA0 //RX_FDEQ_GAIN_10 +50 0x9487 //RX_FDEQ_GAIN_11 +51 0x6F64 //RX_FDEQ_GAIN_12 +52 0x625A //RX_FDEQ_GAIN_13 +53 0x5D70 //RX_FDEQ_GAIN_14 +54 0x7C8C //RX_FDEQ_GAIN_15 55 0x4848 //RX_FDEQ_GAIN_16 56 0x4848 //RX_FDEQ_GAIN_17 57 0x4848 //RX_FDEQ_GAIN_18 @@ -24001,19 +35988,19 @@ 62 0x4848 //RX_FDEQ_GAIN_23 63 0x0202 //RX_FDEQ_BIN_0 64 0x0202 //RX_FDEQ_BIN_1 -65 0x0302 //RX_FDEQ_BIN_2 -66 0x0304 //RX_FDEQ_BIN_3 -67 0x0405 //RX_FDEQ_BIN_4 -68 0x0506 //RX_FDEQ_BIN_5 +65 0x0301 //RX_FDEQ_BIN_2 +66 0x0404 //RX_FDEQ_BIN_3 +67 0x0406 //RX_FDEQ_BIN_4 +68 0x0109 //RX_FDEQ_BIN_5 69 0x0708 //RX_FDEQ_BIN_6 70 0x090A //RX_FDEQ_BIN_7 71 0x0B0C //RX_FDEQ_BIN_8 72 0x0D0E //RX_FDEQ_BIN_9 73 0x1013 //RX_FDEQ_BIN_10 74 0x1719 //RX_FDEQ_BIN_11 -75 0x1B1E //RX_FDEQ_BIN_12 -76 0x1E1E //RX_FDEQ_BIN_13 -77 0x1E28 //RX_FDEQ_BIN_14 +75 0x1B0F //RX_FDEQ_BIN_12 +76 0x141E //RX_FDEQ_BIN_13 +77 0x3728 //RX_FDEQ_BIN_14 78 0x282C //RX_FDEQ_BIN_15 79 0x0000 //RX_FDEQ_BIN_16 80 0x0000 //RX_FDEQ_BIN_17 @@ -24047,7 +36034,7 @@ 108 0x5333 //RX_FDDRC_SLANT_1_2 109 0x5333 //RX_FDDRC_SLANT_1_3 110 0x0000 //RX_FDDRC_RESRV_0 -129 0x0017 //RX_SPK_VOL +129 0x0010 //RX_SPK_VOL 130 0x0000 //RX_VOL_RESRV_0 #VOL 2 6 0x1000 //RX_TDDRC_ALPHA_UP_1 @@ -24064,32 +36051,32 @@ 113 0x0002 //RX_TDDRC_THRD_1 114 0x1800 //RX_TDDRC_THRD_2 115 0x1800 //RX_TDDRC_THRD_3 -116 0x3000 //RX_TDDRC_SLANT_0 -117 0x6E00 //RX_TDDRC_SLANT_1 +116 0x7FFF //RX_TDDRC_SLANT_0 +117 0x7FFF //RX_TDDRC_SLANT_1 118 0x1000 //RX_TDDRC_ALPHA_UP_0 119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 120 0x0000 //RX_TDDRC_HMNC_FLAG 121 0x199A //RX_TDDRC_HMNC_GAIN 122 0x0001 //RX_TDDRC_SMT_FLAG 123 0x0CCD //RX_TDDRC_SMT_W -124 0x0478 //RX_TDDRC_DRC_GAIN +124 0x0650 //RX_TDDRC_DRC_GAIN 38 0x0020 //RX_FDEQ_SUBNUM -39 0x4840 //RX_FDEQ_GAIN_0 -40 0x4040 //RX_FDEQ_GAIN_1 -41 0x4559 //RX_FDEQ_GAIN_2 -42 0x6473 //RX_FDEQ_GAIN_3 -43 0x8690 //RX_FDEQ_GAIN_4 -44 0x8887 //RX_FDEQ_GAIN_5 -45 0x8787 //RX_FDEQ_GAIN_6 -46 0x8E91 //RX_FDEQ_GAIN_7 -47 0x9099 //RX_FDEQ_GAIN_8 -48 0x96A2 //RX_FDEQ_GAIN_9 -49 0xAB9C //RX_FDEQ_GAIN_10 -50 0x9287 //RX_FDEQ_GAIN_11 -51 0x716E //RX_FDEQ_GAIN_12 -52 0x5C54 //RX_FDEQ_GAIN_13 -53 0x5859 //RX_FDEQ_GAIN_14 -54 0x5861 //RX_FDEQ_GAIN_15 +39 0x483E //RX_FDEQ_GAIN_0 +40 0x3E3E //RX_FDEQ_GAIN_1 +41 0x3E4C //RX_FDEQ_GAIN_2 +42 0x506A //RX_FDEQ_GAIN_3 +43 0x8082 //RX_FDEQ_GAIN_4 +44 0x8982 //RX_FDEQ_GAIN_5 +45 0x8880 //RX_FDEQ_GAIN_6 +46 0x8888 //RX_FDEQ_GAIN_7 +47 0x949C //RX_FDEQ_GAIN_8 +48 0x9AAB //RX_FDEQ_GAIN_9 +49 0xAEA0 //RX_FDEQ_GAIN_10 +50 0x9487 //RX_FDEQ_GAIN_11 +51 0x6F64 //RX_FDEQ_GAIN_12 +52 0x625A //RX_FDEQ_GAIN_13 +53 0x5D70 //RX_FDEQ_GAIN_14 +54 0x7C8C //RX_FDEQ_GAIN_15 55 0x4848 //RX_FDEQ_GAIN_16 56 0x4848 //RX_FDEQ_GAIN_17 57 0x4848 //RX_FDEQ_GAIN_18 @@ -24100,19 +36087,19 @@ 62 0x4848 //RX_FDEQ_GAIN_23 63 0x0202 //RX_FDEQ_BIN_0 64 0x0202 //RX_FDEQ_BIN_1 -65 0x0302 //RX_FDEQ_BIN_2 -66 0x0304 //RX_FDEQ_BIN_3 -67 0x0405 //RX_FDEQ_BIN_4 -68 0x0506 //RX_FDEQ_BIN_5 +65 0x0301 //RX_FDEQ_BIN_2 +66 0x0404 //RX_FDEQ_BIN_3 +67 0x0406 //RX_FDEQ_BIN_4 +68 0x0109 //RX_FDEQ_BIN_5 69 0x0708 //RX_FDEQ_BIN_6 70 0x090A //RX_FDEQ_BIN_7 71 0x0B0C //RX_FDEQ_BIN_8 72 0x0D0E //RX_FDEQ_BIN_9 73 0x1013 //RX_FDEQ_BIN_10 74 0x1719 //RX_FDEQ_BIN_11 -75 0x1B1E //RX_FDEQ_BIN_12 -76 0x1E1E //RX_FDEQ_BIN_13 -77 0x1E28 //RX_FDEQ_BIN_14 +75 0x1B0F //RX_FDEQ_BIN_12 +76 0x141E //RX_FDEQ_BIN_13 +77 0x3728 //RX_FDEQ_BIN_14 78 0x282C //RX_FDEQ_BIN_15 79 0x0000 //RX_FDEQ_BIN_16 80 0x0000 //RX_FDEQ_BIN_17 @@ -24146,7 +36133,7 @@ 108 0x5333 //RX_FDDRC_SLANT_1_2 109 0x5333 //RX_FDDRC_SLANT_1_3 110 0x0000 //RX_FDDRC_RESRV_0 -129 0x0024 //RX_SPK_VOL +129 0x001B //RX_SPK_VOL 130 0x0000 //RX_VOL_RESRV_0 #VOL 3 6 0x1000 //RX_TDDRC_ALPHA_UP_1 @@ -24163,32 +36150,32 @@ 113 0x0002 //RX_TDDRC_THRD_1 114 0x1800 //RX_TDDRC_THRD_2 115 0x1800 //RX_TDDRC_THRD_3 -116 0x3000 //RX_TDDRC_SLANT_0 -117 0x6E00 //RX_TDDRC_SLANT_1 +116 0x7FFF //RX_TDDRC_SLANT_0 +117 0x7FFF //RX_TDDRC_SLANT_1 118 0x1000 //RX_TDDRC_ALPHA_UP_0 119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 120 0x0000 //RX_TDDRC_HMNC_FLAG 121 0x199A //RX_TDDRC_HMNC_GAIN 122 0x0001 //RX_TDDRC_SMT_FLAG 123 0x0CCD //RX_TDDRC_SMT_W -124 0x0478 //RX_TDDRC_DRC_GAIN +124 0x0650 //RX_TDDRC_DRC_GAIN 38 0x0020 //RX_FDEQ_SUBNUM -39 0x4840 //RX_FDEQ_GAIN_0 -40 0x4040 //RX_FDEQ_GAIN_1 -41 0x4559 //RX_FDEQ_GAIN_2 -42 0x6473 //RX_FDEQ_GAIN_3 -43 0x8690 //RX_FDEQ_GAIN_4 -44 0x8887 //RX_FDEQ_GAIN_5 -45 0x8787 //RX_FDEQ_GAIN_6 -46 0x8E91 //RX_FDEQ_GAIN_7 -47 0x9099 //RX_FDEQ_GAIN_8 -48 0x96A2 //RX_FDEQ_GAIN_9 -49 0xAB9C //RX_FDEQ_GAIN_10 -50 0x9287 //RX_FDEQ_GAIN_11 -51 0x716E //RX_FDEQ_GAIN_12 -52 0x5C54 //RX_FDEQ_GAIN_13 -53 0x5859 //RX_FDEQ_GAIN_14 -54 0x5861 //RX_FDEQ_GAIN_15 +39 0x483E //RX_FDEQ_GAIN_0 +40 0x3E3E //RX_FDEQ_GAIN_1 +41 0x3E4C //RX_FDEQ_GAIN_2 +42 0x506A //RX_FDEQ_GAIN_3 +43 0x8082 //RX_FDEQ_GAIN_4 +44 0x8982 //RX_FDEQ_GAIN_5 +45 0x8880 //RX_FDEQ_GAIN_6 +46 0x8888 //RX_FDEQ_GAIN_7 +47 0x949C //RX_FDEQ_GAIN_8 +48 0x9AAB //RX_FDEQ_GAIN_9 +49 0xAEA0 //RX_FDEQ_GAIN_10 +50 0x9487 //RX_FDEQ_GAIN_11 +51 0x6F64 //RX_FDEQ_GAIN_12 +52 0x625A //RX_FDEQ_GAIN_13 +53 0x5D70 //RX_FDEQ_GAIN_14 +54 0x7C8C //RX_FDEQ_GAIN_15 55 0x4848 //RX_FDEQ_GAIN_16 56 0x4848 //RX_FDEQ_GAIN_17 57 0x4848 //RX_FDEQ_GAIN_18 @@ -24199,19 +36186,19 @@ 62 0x4848 //RX_FDEQ_GAIN_23 63 0x0202 //RX_FDEQ_BIN_0 64 0x0202 //RX_FDEQ_BIN_1 -65 0x0302 //RX_FDEQ_BIN_2 -66 0x0304 //RX_FDEQ_BIN_3 -67 0x0405 //RX_FDEQ_BIN_4 -68 0x0506 //RX_FDEQ_BIN_5 +65 0x0301 //RX_FDEQ_BIN_2 +66 0x0404 //RX_FDEQ_BIN_3 +67 0x0406 //RX_FDEQ_BIN_4 +68 0x0109 //RX_FDEQ_BIN_5 69 0x0708 //RX_FDEQ_BIN_6 70 0x090A //RX_FDEQ_BIN_7 71 0x0B0C //RX_FDEQ_BIN_8 72 0x0D0E //RX_FDEQ_BIN_9 73 0x1013 //RX_FDEQ_BIN_10 74 0x1719 //RX_FDEQ_BIN_11 -75 0x1B1E //RX_FDEQ_BIN_12 -76 0x1E1E //RX_FDEQ_BIN_13 -77 0x1E28 //RX_FDEQ_BIN_14 +75 0x1B0F //RX_FDEQ_BIN_12 +76 0x141E //RX_FDEQ_BIN_13 +77 0x3728 //RX_FDEQ_BIN_14 78 0x282C //RX_FDEQ_BIN_15 79 0x0000 //RX_FDEQ_BIN_16 80 0x0000 //RX_FDEQ_BIN_17 @@ -24245,7 +36232,7 @@ 108 0x5333 //RX_FDDRC_SLANT_1_2 109 0x5333 //RX_FDDRC_SLANT_1_3 110 0x0000 //RX_FDDRC_RESRV_0 -129 0x0039 //RX_SPK_VOL +129 0x002B //RX_SPK_VOL 130 0x0000 //RX_VOL_RESRV_0 #VOL 4 6 0x1000 //RX_TDDRC_ALPHA_UP_1 @@ -24262,32 +36249,32 @@ 113 0x0002 //RX_TDDRC_THRD_1 114 0x1800 //RX_TDDRC_THRD_2 115 0x1800 //RX_TDDRC_THRD_3 -116 0x3000 //RX_TDDRC_SLANT_0 -117 0x6E00 //RX_TDDRC_SLANT_1 +116 0x7FFF //RX_TDDRC_SLANT_0 +117 0x7FFF //RX_TDDRC_SLANT_1 118 0x1000 //RX_TDDRC_ALPHA_UP_0 119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 120 0x0000 //RX_TDDRC_HMNC_FLAG 121 0x199A //RX_TDDRC_HMNC_GAIN 122 0x0001 //RX_TDDRC_SMT_FLAG 123 0x0CCD //RX_TDDRC_SMT_W -124 0x0478 //RX_TDDRC_DRC_GAIN +124 0x0650 //RX_TDDRC_DRC_GAIN 38 0x0020 //RX_FDEQ_SUBNUM -39 0x4840 //RX_FDEQ_GAIN_0 -40 0x4040 //RX_FDEQ_GAIN_1 -41 0x4559 //RX_FDEQ_GAIN_2 -42 0x6473 //RX_FDEQ_GAIN_3 -43 0x8690 //RX_FDEQ_GAIN_4 -44 0x8887 //RX_FDEQ_GAIN_5 -45 0x8787 //RX_FDEQ_GAIN_6 -46 0x8E91 //RX_FDEQ_GAIN_7 -47 0x9099 //RX_FDEQ_GAIN_8 -48 0x96A2 //RX_FDEQ_GAIN_9 -49 0xAB9C //RX_FDEQ_GAIN_10 -50 0x9287 //RX_FDEQ_GAIN_11 -51 0x716E //RX_FDEQ_GAIN_12 -52 0x5C54 //RX_FDEQ_GAIN_13 -53 0x5859 //RX_FDEQ_GAIN_14 -54 0x5861 //RX_FDEQ_GAIN_15 +39 0x483E //RX_FDEQ_GAIN_0 +40 0x3E3E //RX_FDEQ_GAIN_1 +41 0x3E4C //RX_FDEQ_GAIN_2 +42 0x506A //RX_FDEQ_GAIN_3 +43 0x8082 //RX_FDEQ_GAIN_4 +44 0x8982 //RX_FDEQ_GAIN_5 +45 0x8880 //RX_FDEQ_GAIN_6 +46 0x8888 //RX_FDEQ_GAIN_7 +47 0x949C //RX_FDEQ_GAIN_8 +48 0x9AAB //RX_FDEQ_GAIN_9 +49 0xAEA0 //RX_FDEQ_GAIN_10 +50 0x9487 //RX_FDEQ_GAIN_11 +51 0x6F64 //RX_FDEQ_GAIN_12 +52 0x625A //RX_FDEQ_GAIN_13 +53 0x5D70 //RX_FDEQ_GAIN_14 +54 0x7C8C //RX_FDEQ_GAIN_15 55 0x4848 //RX_FDEQ_GAIN_16 56 0x4848 //RX_FDEQ_GAIN_17 57 0x4848 //RX_FDEQ_GAIN_18 @@ -24298,19 +36285,19 @@ 62 0x4848 //RX_FDEQ_GAIN_23 63 0x0202 //RX_FDEQ_BIN_0 64 0x0202 //RX_FDEQ_BIN_1 -65 0x0302 //RX_FDEQ_BIN_2 -66 0x0304 //RX_FDEQ_BIN_3 -67 0x0405 //RX_FDEQ_BIN_4 -68 0x0506 //RX_FDEQ_BIN_5 +65 0x0301 //RX_FDEQ_BIN_2 +66 0x0404 //RX_FDEQ_BIN_3 +67 0x0406 //RX_FDEQ_BIN_4 +68 0x0109 //RX_FDEQ_BIN_5 69 0x0708 //RX_FDEQ_BIN_6 70 0x090A //RX_FDEQ_BIN_7 71 0x0B0C //RX_FDEQ_BIN_8 72 0x0D0E //RX_FDEQ_BIN_9 73 0x1013 //RX_FDEQ_BIN_10 74 0x1719 //RX_FDEQ_BIN_11 -75 0x1B1E //RX_FDEQ_BIN_12 -76 0x1E1E //RX_FDEQ_BIN_13 -77 0x1E28 //RX_FDEQ_BIN_14 +75 0x1B0F //RX_FDEQ_BIN_12 +76 0x141E //RX_FDEQ_BIN_13 +77 0x3728 //RX_FDEQ_BIN_14 78 0x282C //RX_FDEQ_BIN_15 79 0x0000 //RX_FDEQ_BIN_16 80 0x0000 //RX_FDEQ_BIN_17 @@ -24344,7 +36331,7 @@ 108 0x5333 //RX_FDDRC_SLANT_1_2 109 0x5333 //RX_FDDRC_SLANT_1_3 110 0x0000 //RX_FDDRC_RESRV_0 -129 0x005C //RX_SPK_VOL +129 0x0047 //RX_SPK_VOL 130 0x0000 //RX_VOL_RESRV_0 #VOL 5 6 0x1000 //RX_TDDRC_ALPHA_UP_1 @@ -24361,32 +36348,32 @@ 113 0x0002 //RX_TDDRC_THRD_1 114 0x1800 //RX_TDDRC_THRD_2 115 0x1800 //RX_TDDRC_THRD_3 -116 0x3000 //RX_TDDRC_SLANT_0 -117 0x6E00 //RX_TDDRC_SLANT_1 +116 0x7FFF //RX_TDDRC_SLANT_0 +117 0x7FFF //RX_TDDRC_SLANT_1 118 0x1000 //RX_TDDRC_ALPHA_UP_0 119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 120 0x0000 //RX_TDDRC_HMNC_FLAG 121 0x199A //RX_TDDRC_HMNC_GAIN 122 0x0001 //RX_TDDRC_SMT_FLAG 123 0x0CCD //RX_TDDRC_SMT_W -124 0x0478 //RX_TDDRC_DRC_GAIN +124 0x0650 //RX_TDDRC_DRC_GAIN 38 0x0020 //RX_FDEQ_SUBNUM -39 0x4840 //RX_FDEQ_GAIN_0 -40 0x4040 //RX_FDEQ_GAIN_1 -41 0x4559 //RX_FDEQ_GAIN_2 -42 0x6473 //RX_FDEQ_GAIN_3 -43 0x8690 //RX_FDEQ_GAIN_4 -44 0x8887 //RX_FDEQ_GAIN_5 -45 0x8787 //RX_FDEQ_GAIN_6 -46 0x8E91 //RX_FDEQ_GAIN_7 -47 0x9099 //RX_FDEQ_GAIN_8 -48 0x96A2 //RX_FDEQ_GAIN_9 -49 0xAB9C //RX_FDEQ_GAIN_10 -50 0x9287 //RX_FDEQ_GAIN_11 -51 0x716E //RX_FDEQ_GAIN_12 -52 0x5C54 //RX_FDEQ_GAIN_13 -53 0x5859 //RX_FDEQ_GAIN_14 -54 0x5861 //RX_FDEQ_GAIN_15 +39 0x483E //RX_FDEQ_GAIN_0 +40 0x3E3E //RX_FDEQ_GAIN_1 +41 0x3E4C //RX_FDEQ_GAIN_2 +42 0x506A //RX_FDEQ_GAIN_3 +43 0x8082 //RX_FDEQ_GAIN_4 +44 0x8982 //RX_FDEQ_GAIN_5 +45 0x8880 //RX_FDEQ_GAIN_6 +46 0x8888 //RX_FDEQ_GAIN_7 +47 0x949C //RX_FDEQ_GAIN_8 +48 0x9AAB //RX_FDEQ_GAIN_9 +49 0xAEA0 //RX_FDEQ_GAIN_10 +50 0x9487 //RX_FDEQ_GAIN_11 +51 0x6F64 //RX_FDEQ_GAIN_12 +52 0x625A //RX_FDEQ_GAIN_13 +53 0x5D70 //RX_FDEQ_GAIN_14 +54 0x7C8C //RX_FDEQ_GAIN_15 55 0x4848 //RX_FDEQ_GAIN_16 56 0x4848 //RX_FDEQ_GAIN_17 57 0x4848 //RX_FDEQ_GAIN_18 @@ -24397,19 +36384,19 @@ 62 0x4848 //RX_FDEQ_GAIN_23 63 0x0202 //RX_FDEQ_BIN_0 64 0x0202 //RX_FDEQ_BIN_1 -65 0x0302 //RX_FDEQ_BIN_2 -66 0x0304 //RX_FDEQ_BIN_3 -67 0x0405 //RX_FDEQ_BIN_4 -68 0x0506 //RX_FDEQ_BIN_5 +65 0x0301 //RX_FDEQ_BIN_2 +66 0x0404 //RX_FDEQ_BIN_3 +67 0x0406 //RX_FDEQ_BIN_4 +68 0x0109 //RX_FDEQ_BIN_5 69 0x0708 //RX_FDEQ_BIN_6 70 0x090A //RX_FDEQ_BIN_7 71 0x0B0C //RX_FDEQ_BIN_8 72 0x0D0E //RX_FDEQ_BIN_9 73 0x1013 //RX_FDEQ_BIN_10 74 0x1719 //RX_FDEQ_BIN_11 -75 0x1B1E //RX_FDEQ_BIN_12 -76 0x1E1E //RX_FDEQ_BIN_13 -77 0x1E28 //RX_FDEQ_BIN_14 +75 0x1B0F //RX_FDEQ_BIN_12 +76 0x141E //RX_FDEQ_BIN_13 +77 0x3728 //RX_FDEQ_BIN_14 78 0x282C //RX_FDEQ_BIN_15 79 0x0000 //RX_FDEQ_BIN_16 80 0x0000 //RX_FDEQ_BIN_17 @@ -24443,7 +36430,7 @@ 108 0x5333 //RX_FDDRC_SLANT_1_2 109 0x5333 //RX_FDDRC_SLANT_1_3 110 0x0000 //RX_FDDRC_RESRV_0 -129 0x0096 //RX_SPK_VOL +129 0x0076 //RX_SPK_VOL 130 0x0000 //RX_VOL_RESRV_0 #VOL 6 6 0x1000 //RX_TDDRC_ALPHA_UP_1 @@ -24460,32 +36447,32 @@ 113 0x0002 //RX_TDDRC_THRD_1 114 0x1800 //RX_TDDRC_THRD_2 115 0x1800 //RX_TDDRC_THRD_3 -116 0x3000 //RX_TDDRC_SLANT_0 -117 0x6E00 //RX_TDDRC_SLANT_1 +116 0x7FFF //RX_TDDRC_SLANT_0 +117 0x7FFF //RX_TDDRC_SLANT_1 118 0x1000 //RX_TDDRC_ALPHA_UP_0 119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 120 0x0000 //RX_TDDRC_HMNC_FLAG 121 0x199A //RX_TDDRC_HMNC_GAIN 122 0x0001 //RX_TDDRC_SMT_FLAG 123 0x0CCD //RX_TDDRC_SMT_W -124 0x0478 //RX_TDDRC_DRC_GAIN +124 0x0650 //RX_TDDRC_DRC_GAIN 38 0x0020 //RX_FDEQ_SUBNUM -39 0x4840 //RX_FDEQ_GAIN_0 -40 0x4040 //RX_FDEQ_GAIN_1 -41 0x4559 //RX_FDEQ_GAIN_2 -42 0x6473 //RX_FDEQ_GAIN_3 -43 0x8690 //RX_FDEQ_GAIN_4 -44 0x8887 //RX_FDEQ_GAIN_5 -45 0x8787 //RX_FDEQ_GAIN_6 -46 0x8E91 //RX_FDEQ_GAIN_7 -47 0x9099 //RX_FDEQ_GAIN_8 -48 0x96A2 //RX_FDEQ_GAIN_9 -49 0xAB9C //RX_FDEQ_GAIN_10 -50 0x9287 //RX_FDEQ_GAIN_11 -51 0x716E //RX_FDEQ_GAIN_12 -52 0x5C54 //RX_FDEQ_GAIN_13 -53 0x5859 //RX_FDEQ_GAIN_14 -54 0x5861 //RX_FDEQ_GAIN_15 +39 0x483E //RX_FDEQ_GAIN_0 +40 0x3E3E //RX_FDEQ_GAIN_1 +41 0x3E4C //RX_FDEQ_GAIN_2 +42 0x506A //RX_FDEQ_GAIN_3 +43 0x8082 //RX_FDEQ_GAIN_4 +44 0x8982 //RX_FDEQ_GAIN_5 +45 0x8880 //RX_FDEQ_GAIN_6 +46 0x8888 //RX_FDEQ_GAIN_7 +47 0x949C //RX_FDEQ_GAIN_8 +48 0x9AAB //RX_FDEQ_GAIN_9 +49 0xAEA0 //RX_FDEQ_GAIN_10 +50 0x9487 //RX_FDEQ_GAIN_11 +51 0x6F64 //RX_FDEQ_GAIN_12 +52 0x625A //RX_FDEQ_GAIN_13 +53 0x5D70 //RX_FDEQ_GAIN_14 +54 0x7C8C //RX_FDEQ_GAIN_15 55 0x4848 //RX_FDEQ_GAIN_16 56 0x4848 //RX_FDEQ_GAIN_17 57 0x4848 //RX_FDEQ_GAIN_18 @@ -24496,19 +36483,19 @@ 62 0x4848 //RX_FDEQ_GAIN_23 63 0x0202 //RX_FDEQ_BIN_0 64 0x0202 //RX_FDEQ_BIN_1 -65 0x0302 //RX_FDEQ_BIN_2 -66 0x0304 //RX_FDEQ_BIN_3 -67 0x0405 //RX_FDEQ_BIN_4 -68 0x0506 //RX_FDEQ_BIN_5 +65 0x0301 //RX_FDEQ_BIN_2 +66 0x0404 //RX_FDEQ_BIN_3 +67 0x0406 //RX_FDEQ_BIN_4 +68 0x0109 //RX_FDEQ_BIN_5 69 0x0708 //RX_FDEQ_BIN_6 70 0x090A //RX_FDEQ_BIN_7 71 0x0B0C //RX_FDEQ_BIN_8 72 0x0D0E //RX_FDEQ_BIN_9 73 0x1013 //RX_FDEQ_BIN_10 74 0x1719 //RX_FDEQ_BIN_11 -75 0x1B1E //RX_FDEQ_BIN_12 -76 0x1E1E //RX_FDEQ_BIN_13 -77 0x1E28 //RX_FDEQ_BIN_14 +75 0x1B0F //RX_FDEQ_BIN_12 +76 0x141E //RX_FDEQ_BIN_13 +77 0x3728 //RX_FDEQ_BIN_14 78 0x282C //RX_FDEQ_BIN_15 79 0x0000 //RX_FDEQ_BIN_16 80 0x0000 //RX_FDEQ_BIN_17 @@ -24544,10 +36531,862 @@ 110 0x0000 //RX_FDDRC_RESRV_0 129 0x0100 //RX_SPK_VOL 130 0x0000 //RX_VOL_RESRV_0 +#RX 2 +157 0x003C //RX_RECVFUNC_MODE_0 +158 0x0000 //RX_RECVFUNC_MODE_1 +159 0x0003 //RX_SAMPLINGFREQ_SIG +160 0x0003 //RX_SAMPLINGFREQ_PROC +161 0x000A //RX_FRAME_SZ +162 0x0000 //RX_DELAY_OPT +163 0x1000 //RX_TDDRC_ALPHA_UP_1 +164 0x1000 //RX_TDDRC_ALPHA_UP_2 +165 0x1000 //RX_TDDRC_ALPHA_UP_3 +166 0x1000 //RX_TDDRC_ALPHA_UP_4 +167 0x0600 //RX_PGA +168 0x7FFF //RX_A_HP +169 0x4000 //RX_B_PE +170 0x5800 //RX_THR_PITCH_DET_0 +171 0x5000 //RX_THR_PITCH_DET_1 +172 0x4000 //RX_THR_PITCH_DET_2 +173 0x0008 //RX_PITCH_BFR_LEN +174 0x0003 //RX_SBD_PITCH_DET +175 0x0100 //RX_PP_RESRV_0 +176 0x0020 //RX_PP_RESRV_1 +177 0x0600 //RX_N_SN_EST +178 0x000C //RX_N2_SN_EST +179 0x000F //RX_NS_LVL_CTRL +180 0xF800 //RX_THR_SN_EST +181 0x7E00 //RX_LAMBDA_PFILT +182 0x000A //RX_FENS_RESRV_0 +183 0x0190 //RX_FENS_RESRV_1 +184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +187 0x0002 //RX_EXTRA_NS_L +188 0x0800 //RX_EXTRA_NS_A +189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +190 0x7000 //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +192 0x199A //RX_A_POST_FLT +193 0x0000 //RX_LMT_THRD +194 0x4000 //RX_LMT_ALPHA +195 0x0020 //RX_FDEQ_SUBNUM +196 0x4840 //RX_FDEQ_GAIN_0 +197 0x4040 //RX_FDEQ_GAIN_1 +198 0x4050 //RX_FDEQ_GAIN_2 +199 0x5D6C //RX_FDEQ_GAIN_3 +200 0x7B86 //RX_FDEQ_GAIN_4 +201 0x8186 //RX_FDEQ_GAIN_5 +202 0x8688 //RX_FDEQ_GAIN_6 +203 0x9097 //RX_FDEQ_GAIN_7 +204 0x929F //RX_FDEQ_GAIN_8 +205 0x9CA0 //RX_FDEQ_GAIN_9 +206 0xA391 //RX_FDEQ_GAIN_10 +207 0x8A82 //RX_FDEQ_GAIN_11 +208 0x726E //RX_FDEQ_GAIN_12 +209 0x704E //RX_FDEQ_GAIN_13 +210 0x6565 //RX_FDEQ_GAIN_14 +211 0x698A //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0202 //RX_FDEQ_BIN_0 +221 0x0202 //RX_FDEQ_BIN_1 +222 0x0302 //RX_FDEQ_BIN_2 +223 0x0304 //RX_FDEQ_BIN_3 +224 0x0405 //RX_FDEQ_BIN_4 +225 0x0506 //RX_FDEQ_BIN_5 +226 0x0708 //RX_FDEQ_BIN_6 +227 0x090A //RX_FDEQ_BIN_7 +228 0x0B0C //RX_FDEQ_BIN_8 +229 0x0D0E //RX_FDEQ_BIN_9 +230 0x1013 //RX_FDEQ_BIN_10 +231 0x1719 //RX_FDEQ_BIN_11 +232 0x1B1E //RX_FDEQ_BIN_12 +233 0x1E1E //RX_FDEQ_BIN_13 +234 0x1E28 //RX_FDEQ_BIN_14 +235 0x282C //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x4000 //RX_FDEQ_RESRV_0 +245 0x0320 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0030 //RX_FDDRC_BAND_MARGIN_1 +248 0x0050 //RX_FDDRC_BAND_MARGIN_2 +249 0x0080 //RX_FDDRC_BAND_MARGIN_3 +250 0x0007 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x5000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x6400 //RX_FDDRC_THRD_3_2 +258 0x6400 //RX_FDDRC_THRD_3_3 +259 0x2000 //RX_FDDRC_SLANT_0_0 +260 0x2000 //RX_FDDRC_SLANT_0_1 +261 0x2000 //RX_FDDRC_SLANT_0_2 +262 0x2000 //RX_FDDRC_SLANT_0_3 +263 0x5333 //RX_FDDRC_SLANT_1_0 +264 0x5333 //RX_FDDRC_SLANT_1_1 +265 0x5333 //RX_FDDRC_SLANT_1_2 +266 0x5333 //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +268 0x0002 //RX_FILTINDX +269 0x0001 //RX_TDDRC_THRD_0 +270 0x0002 //RX_TDDRC_THRD_1 +271 0x1800 //RX_TDDRC_THRD_2 +272 0x1800 //RX_TDDRC_THRD_3 +273 0x3000 //RX_TDDRC_SLANT_0 +274 0x6E00 //RX_TDDRC_SLANT_1 +275 0x1000 //RX_TDDRC_ALPHA_UP_0 +276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x199A //RX_TDDRC_HMNC_GAIN +279 0x0001 //RX_TDDRC_SMT_FLAG +280 0x0CCD //RX_TDDRC_SMT_W +281 0x0523 //RX_TDDRC_DRC_GAIN +282 0x7C00 //RX_LAMBDA_PKA_FP +283 0x13E0 //RX_TPKA_FP +284 0x0080 //RX_MIN_G_FP +285 0x2000 //RX_MAX_G_FP +286 0x000B //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 +288 0x0000 //RX_MAXLEVEL_CNG +289 0x3000 //RX_BWE_UV_TH +290 0x3000 //RX_BWE_UV_TH2 +291 0x1800 //RX_BWE_UV_TH3 +292 0x1000 //RX_BWE_V_TH +293 0x04CD //RX_BWE_GAIN1_V_TH1 +294 0x0F33 //RX_BWE_GAIN1_V_TH2 +295 0x7333 //RX_BWE_UV_EQ +296 0x199A //RX_BWE_V_EQ +297 0x7333 //RX_BWE_TONE_TH +298 0x0004 //RX_BWE_UV_HOLD_T +299 0x6CCD //RX_BWE_GAIN2_ALPHA +300 0x799A //RX_BWE_GAIN3_ALPHA +301 0x001E //RX_BWE_CUTOFF +302 0x3000 //RX_BWE_GAINFILL +303 0x3200 //RX_BWE_MAXTH_TONE +304 0x2000 //RX_BWE_EQ_0 +305 0x2000 //RX_BWE_EQ_1 +306 0x2000 //RX_BWE_EQ_2 +307 0x2000 //RX_BWE_EQ_3 +308 0x2000 //RX_BWE_EQ_4 +309 0x2000 //RX_BWE_EQ_5 +310 0x2000 //RX_BWE_EQ_6 +311 0x0000 //RX_BWE_RESRV_0 +312 0x0000 //RX_BWE_RESRV_1 +313 0x0000 //RX_BWE_RESRV_2 +#VOL 0 +163 0x1000 //RX_TDDRC_ALPHA_UP_1 +164 0x1000 //RX_TDDRC_ALPHA_UP_2 +165 0x1000 //RX_TDDRC_ALPHA_UP_3 +166 0x1000 //RX_TDDRC_ALPHA_UP_4 +184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +190 0x7000 //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +269 0x0001 //RX_TDDRC_THRD_0 +270 0x0002 //RX_TDDRC_THRD_1 +271 0x1800 //RX_TDDRC_THRD_2 +272 0x1800 //RX_TDDRC_THRD_3 +273 0x3000 //RX_TDDRC_SLANT_0 +274 0x6E00 //RX_TDDRC_SLANT_1 +275 0x1000 //RX_TDDRC_ALPHA_UP_0 +276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x199A //RX_TDDRC_HMNC_GAIN +279 0x0001 //RX_TDDRC_SMT_FLAG +280 0x0CCD //RX_TDDRC_SMT_W +281 0x0523 //RX_TDDRC_DRC_GAIN +195 0x0020 //RX_FDEQ_SUBNUM +196 0x4840 //RX_FDEQ_GAIN_0 +197 0x4040 //RX_FDEQ_GAIN_1 +198 0x4050 //RX_FDEQ_GAIN_2 +199 0x5D6C //RX_FDEQ_GAIN_3 +200 0x7B86 //RX_FDEQ_GAIN_4 +201 0x8186 //RX_FDEQ_GAIN_5 +202 0x8688 //RX_FDEQ_GAIN_6 +203 0x9097 //RX_FDEQ_GAIN_7 +204 0x929F //RX_FDEQ_GAIN_8 +205 0x9CA0 //RX_FDEQ_GAIN_9 +206 0xA391 //RX_FDEQ_GAIN_10 +207 0x8A82 //RX_FDEQ_GAIN_11 +208 0x726E //RX_FDEQ_GAIN_12 +209 0x704E //RX_FDEQ_GAIN_13 +210 0x6565 //RX_FDEQ_GAIN_14 +211 0x698A //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0202 //RX_FDEQ_BIN_0 +221 0x0202 //RX_FDEQ_BIN_1 +222 0x0302 //RX_FDEQ_BIN_2 +223 0x0304 //RX_FDEQ_BIN_3 +224 0x0405 //RX_FDEQ_BIN_4 +225 0x0506 //RX_FDEQ_BIN_5 +226 0x0708 //RX_FDEQ_BIN_6 +227 0x090A //RX_FDEQ_BIN_7 +228 0x0B0C //RX_FDEQ_BIN_8 +229 0x0D0E //RX_FDEQ_BIN_9 +230 0x1013 //RX_FDEQ_BIN_10 +231 0x1719 //RX_FDEQ_BIN_11 +232 0x1B1E //RX_FDEQ_BIN_12 +233 0x1E1E //RX_FDEQ_BIN_13 +234 0x1E28 //RX_FDEQ_BIN_14 +235 0x282C //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x4000 //RX_FDEQ_RESRV_0 +245 0x0320 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0030 //RX_FDDRC_BAND_MARGIN_1 +248 0x0050 //RX_FDDRC_BAND_MARGIN_2 +249 0x0080 //RX_FDDRC_BAND_MARGIN_3 +250 0x0007 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x5000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x6400 //RX_FDDRC_THRD_3_2 +258 0x6400 //RX_FDDRC_THRD_3_3 +259 0x2000 //RX_FDDRC_SLANT_0_0 +260 0x2000 //RX_FDDRC_SLANT_0_1 +261 0x2000 //RX_FDDRC_SLANT_0_2 +262 0x2000 //RX_FDDRC_SLANT_0_3 +263 0x5333 //RX_FDDRC_SLANT_1_0 +264 0x5333 //RX_FDDRC_SLANT_1_1 +265 0x5333 //RX_FDDRC_SLANT_1_2 +266 0x5333 //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +286 0x000B //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 +#VOL 1 +163 0x1000 //RX_TDDRC_ALPHA_UP_1 +164 0x1000 //RX_TDDRC_ALPHA_UP_2 +165 0x1000 //RX_TDDRC_ALPHA_UP_3 +166 0x1000 //RX_TDDRC_ALPHA_UP_4 +184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +190 0x7000 //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +269 0x0001 //RX_TDDRC_THRD_0 +270 0x0002 //RX_TDDRC_THRD_1 +271 0x1800 //RX_TDDRC_THRD_2 +272 0x1800 //RX_TDDRC_THRD_3 +273 0x3000 //RX_TDDRC_SLANT_0 +274 0x6E00 //RX_TDDRC_SLANT_1 +275 0x1000 //RX_TDDRC_ALPHA_UP_0 +276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x199A //RX_TDDRC_HMNC_GAIN +279 0x0001 //RX_TDDRC_SMT_FLAG +280 0x0CCD //RX_TDDRC_SMT_W +281 0x04E6 //RX_TDDRC_DRC_GAIN +195 0x0020 //RX_FDEQ_SUBNUM +196 0x4840 //RX_FDEQ_GAIN_0 +197 0x4040 //RX_FDEQ_GAIN_1 +198 0x4050 //RX_FDEQ_GAIN_2 +199 0x5D6C //RX_FDEQ_GAIN_3 +200 0x7B86 //RX_FDEQ_GAIN_4 +201 0x8186 //RX_FDEQ_GAIN_5 +202 0x8688 //RX_FDEQ_GAIN_6 +203 0x9097 //RX_FDEQ_GAIN_7 +204 0x929F //RX_FDEQ_GAIN_8 +205 0x9CA0 //RX_FDEQ_GAIN_9 +206 0xA391 //RX_FDEQ_GAIN_10 +207 0x8A82 //RX_FDEQ_GAIN_11 +208 0x726E //RX_FDEQ_GAIN_12 +209 0x704E //RX_FDEQ_GAIN_13 +210 0x6565 //RX_FDEQ_GAIN_14 +211 0x698A //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0202 //RX_FDEQ_BIN_0 +221 0x0202 //RX_FDEQ_BIN_1 +222 0x0302 //RX_FDEQ_BIN_2 +223 0x0304 //RX_FDEQ_BIN_3 +224 0x0405 //RX_FDEQ_BIN_4 +225 0x0506 //RX_FDEQ_BIN_5 +226 0x0708 //RX_FDEQ_BIN_6 +227 0x090A //RX_FDEQ_BIN_7 +228 0x0B0C //RX_FDEQ_BIN_8 +229 0x0D0E //RX_FDEQ_BIN_9 +230 0x1013 //RX_FDEQ_BIN_10 +231 0x1719 //RX_FDEQ_BIN_11 +232 0x1B1E //RX_FDEQ_BIN_12 +233 0x1E1E //RX_FDEQ_BIN_13 +234 0x1E28 //RX_FDEQ_BIN_14 +235 0x282C //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x4000 //RX_FDEQ_RESRV_0 +245 0x0320 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0030 //RX_FDDRC_BAND_MARGIN_1 +248 0x0050 //RX_FDDRC_BAND_MARGIN_2 +249 0x0080 //RX_FDDRC_BAND_MARGIN_3 +250 0x0007 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x5000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x6400 //RX_FDDRC_THRD_3_2 +258 0x6400 //RX_FDDRC_THRD_3_3 +259 0x2000 //RX_FDDRC_SLANT_0_0 +260 0x2000 //RX_FDDRC_SLANT_0_1 +261 0x2000 //RX_FDDRC_SLANT_0_2 +262 0x2000 //RX_FDDRC_SLANT_0_3 +263 0x5333 //RX_FDDRC_SLANT_1_0 +264 0x5333 //RX_FDDRC_SLANT_1_1 +265 0x5333 //RX_FDDRC_SLANT_1_2 +266 0x5333 //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +286 0x0013 //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 +#VOL 2 +163 0x1000 //RX_TDDRC_ALPHA_UP_1 +164 0x1000 //RX_TDDRC_ALPHA_UP_2 +165 0x1000 //RX_TDDRC_ALPHA_UP_3 +166 0x1000 //RX_TDDRC_ALPHA_UP_4 +184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +190 0x7000 //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +269 0x0001 //RX_TDDRC_THRD_0 +270 0x0002 //RX_TDDRC_THRD_1 +271 0x1800 //RX_TDDRC_THRD_2 +272 0x1800 //RX_TDDRC_THRD_3 +273 0x3000 //RX_TDDRC_SLANT_0 +274 0x6E00 //RX_TDDRC_SLANT_1 +275 0x1000 //RX_TDDRC_ALPHA_UP_0 +276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x199A //RX_TDDRC_HMNC_GAIN +279 0x0001 //RX_TDDRC_SMT_FLAG +280 0x0CCD //RX_TDDRC_SMT_W +281 0x04E6 //RX_TDDRC_DRC_GAIN +195 0x0020 //RX_FDEQ_SUBNUM +196 0x4840 //RX_FDEQ_GAIN_0 +197 0x4040 //RX_FDEQ_GAIN_1 +198 0x4050 //RX_FDEQ_GAIN_2 +199 0x5D6C //RX_FDEQ_GAIN_3 +200 0x7B86 //RX_FDEQ_GAIN_4 +201 0x8186 //RX_FDEQ_GAIN_5 +202 0x8688 //RX_FDEQ_GAIN_6 +203 0x9097 //RX_FDEQ_GAIN_7 +204 0x929F //RX_FDEQ_GAIN_8 +205 0x9CA0 //RX_FDEQ_GAIN_9 +206 0xA391 //RX_FDEQ_GAIN_10 +207 0x8A82 //RX_FDEQ_GAIN_11 +208 0x726E //RX_FDEQ_GAIN_12 +209 0x704E //RX_FDEQ_GAIN_13 +210 0x6565 //RX_FDEQ_GAIN_14 +211 0x698A //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0202 //RX_FDEQ_BIN_0 +221 0x0202 //RX_FDEQ_BIN_1 +222 0x0302 //RX_FDEQ_BIN_2 +223 0x0304 //RX_FDEQ_BIN_3 +224 0x0405 //RX_FDEQ_BIN_4 +225 0x0506 //RX_FDEQ_BIN_5 +226 0x0708 //RX_FDEQ_BIN_6 +227 0x090A //RX_FDEQ_BIN_7 +228 0x0B0C //RX_FDEQ_BIN_8 +229 0x0D0E //RX_FDEQ_BIN_9 +230 0x1013 //RX_FDEQ_BIN_10 +231 0x1719 //RX_FDEQ_BIN_11 +232 0x1B1E //RX_FDEQ_BIN_12 +233 0x1E1E //RX_FDEQ_BIN_13 +234 0x1E28 //RX_FDEQ_BIN_14 +235 0x282C //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x4000 //RX_FDEQ_RESRV_0 +245 0x0320 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0030 //RX_FDDRC_BAND_MARGIN_1 +248 0x0050 //RX_FDDRC_BAND_MARGIN_2 +249 0x0080 //RX_FDDRC_BAND_MARGIN_3 +250 0x0007 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x5000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x6400 //RX_FDDRC_THRD_3_2 +258 0x6400 //RX_FDDRC_THRD_3_3 +259 0x2000 //RX_FDDRC_SLANT_0_0 +260 0x2000 //RX_FDDRC_SLANT_0_1 +261 0x2000 //RX_FDDRC_SLANT_0_2 +262 0x2000 //RX_FDDRC_SLANT_0_3 +263 0x5333 //RX_FDDRC_SLANT_1_0 +264 0x5333 //RX_FDDRC_SLANT_1_1 +265 0x5333 //RX_FDDRC_SLANT_1_2 +266 0x5333 //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +286 0x001F //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 +#VOL 3 +163 0x1000 //RX_TDDRC_ALPHA_UP_1 +164 0x1000 //RX_TDDRC_ALPHA_UP_2 +165 0x1000 //RX_TDDRC_ALPHA_UP_3 +166 0x1000 //RX_TDDRC_ALPHA_UP_4 +184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +190 0x7000 //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +269 0x0001 //RX_TDDRC_THRD_0 +270 0x0002 //RX_TDDRC_THRD_1 +271 0x1800 //RX_TDDRC_THRD_2 +272 0x1800 //RX_TDDRC_THRD_3 +273 0x3000 //RX_TDDRC_SLANT_0 +274 0x6E00 //RX_TDDRC_SLANT_1 +275 0x1000 //RX_TDDRC_ALPHA_UP_0 +276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x199A //RX_TDDRC_HMNC_GAIN +279 0x0001 //RX_TDDRC_SMT_FLAG +280 0x0CCD //RX_TDDRC_SMT_W +281 0x04E6 //RX_TDDRC_DRC_GAIN +195 0x0020 //RX_FDEQ_SUBNUM +196 0x4840 //RX_FDEQ_GAIN_0 +197 0x4040 //RX_FDEQ_GAIN_1 +198 0x4050 //RX_FDEQ_GAIN_2 +199 0x5D6C //RX_FDEQ_GAIN_3 +200 0x7B86 //RX_FDEQ_GAIN_4 +201 0x8186 //RX_FDEQ_GAIN_5 +202 0x8688 //RX_FDEQ_GAIN_6 +203 0x9097 //RX_FDEQ_GAIN_7 +204 0x929F //RX_FDEQ_GAIN_8 +205 0x9CA0 //RX_FDEQ_GAIN_9 +206 0xA391 //RX_FDEQ_GAIN_10 +207 0x8A82 //RX_FDEQ_GAIN_11 +208 0x726E //RX_FDEQ_GAIN_12 +209 0x704E //RX_FDEQ_GAIN_13 +210 0x6565 //RX_FDEQ_GAIN_14 +211 0x698A //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0202 //RX_FDEQ_BIN_0 +221 0x0202 //RX_FDEQ_BIN_1 +222 0x0302 //RX_FDEQ_BIN_2 +223 0x0304 //RX_FDEQ_BIN_3 +224 0x0405 //RX_FDEQ_BIN_4 +225 0x0506 //RX_FDEQ_BIN_5 +226 0x0708 //RX_FDEQ_BIN_6 +227 0x090A //RX_FDEQ_BIN_7 +228 0x0B0C //RX_FDEQ_BIN_8 +229 0x0D0E //RX_FDEQ_BIN_9 +230 0x1013 //RX_FDEQ_BIN_10 +231 0x1719 //RX_FDEQ_BIN_11 +232 0x1B1E //RX_FDEQ_BIN_12 +233 0x1E1E //RX_FDEQ_BIN_13 +234 0x1E28 //RX_FDEQ_BIN_14 +235 0x282C //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x4000 //RX_FDEQ_RESRV_0 +245 0x0320 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0030 //RX_FDDRC_BAND_MARGIN_1 +248 0x0050 //RX_FDDRC_BAND_MARGIN_2 +249 0x0080 //RX_FDDRC_BAND_MARGIN_3 +250 0x0007 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x5000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x6400 //RX_FDDRC_THRD_3_2 +258 0x6400 //RX_FDDRC_THRD_3_3 +259 0x2000 //RX_FDDRC_SLANT_0_0 +260 0x2000 //RX_FDDRC_SLANT_0_1 +261 0x2000 //RX_FDDRC_SLANT_0_2 +262 0x2000 //RX_FDDRC_SLANT_0_3 +263 0x5333 //RX_FDDRC_SLANT_1_0 +264 0x5333 //RX_FDDRC_SLANT_1_1 +265 0x5333 //RX_FDDRC_SLANT_1_2 +266 0x5333 //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +286 0x0032 //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 +#VOL 4 +163 0x1000 //RX_TDDRC_ALPHA_UP_1 +164 0x1000 //RX_TDDRC_ALPHA_UP_2 +165 0x1000 //RX_TDDRC_ALPHA_UP_3 +166 0x1000 //RX_TDDRC_ALPHA_UP_4 +184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +190 0x7000 //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +269 0x0001 //RX_TDDRC_THRD_0 +270 0x0002 //RX_TDDRC_THRD_1 +271 0x1800 //RX_TDDRC_THRD_2 +272 0x1800 //RX_TDDRC_THRD_3 +273 0x3000 //RX_TDDRC_SLANT_0 +274 0x6E00 //RX_TDDRC_SLANT_1 +275 0x1000 //RX_TDDRC_ALPHA_UP_0 +276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x199A //RX_TDDRC_HMNC_GAIN +279 0x0001 //RX_TDDRC_SMT_FLAG +280 0x0CCD //RX_TDDRC_SMT_W +281 0x04E6 //RX_TDDRC_DRC_GAIN +195 0x0020 //RX_FDEQ_SUBNUM +196 0x4840 //RX_FDEQ_GAIN_0 +197 0x4040 //RX_FDEQ_GAIN_1 +198 0x4050 //RX_FDEQ_GAIN_2 +199 0x5D6C //RX_FDEQ_GAIN_3 +200 0x7B86 //RX_FDEQ_GAIN_4 +201 0x8186 //RX_FDEQ_GAIN_5 +202 0x8688 //RX_FDEQ_GAIN_6 +203 0x9097 //RX_FDEQ_GAIN_7 +204 0x929F //RX_FDEQ_GAIN_8 +205 0x9CA0 //RX_FDEQ_GAIN_9 +206 0xA391 //RX_FDEQ_GAIN_10 +207 0x8A82 //RX_FDEQ_GAIN_11 +208 0x726E //RX_FDEQ_GAIN_12 +209 0x704E //RX_FDEQ_GAIN_13 +210 0x6565 //RX_FDEQ_GAIN_14 +211 0x698A //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0202 //RX_FDEQ_BIN_0 +221 0x0202 //RX_FDEQ_BIN_1 +222 0x0302 //RX_FDEQ_BIN_2 +223 0x0304 //RX_FDEQ_BIN_3 +224 0x0405 //RX_FDEQ_BIN_4 +225 0x0506 //RX_FDEQ_BIN_5 +226 0x0708 //RX_FDEQ_BIN_6 +227 0x090A //RX_FDEQ_BIN_7 +228 0x0B0C //RX_FDEQ_BIN_8 +229 0x0D0E //RX_FDEQ_BIN_9 +230 0x1013 //RX_FDEQ_BIN_10 +231 0x1719 //RX_FDEQ_BIN_11 +232 0x1B1E //RX_FDEQ_BIN_12 +233 0x1E1E //RX_FDEQ_BIN_13 +234 0x1E28 //RX_FDEQ_BIN_14 +235 0x282C //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x4000 //RX_FDEQ_RESRV_0 +245 0x0320 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0030 //RX_FDDRC_BAND_MARGIN_1 +248 0x0050 //RX_FDDRC_BAND_MARGIN_2 +249 0x0080 //RX_FDDRC_BAND_MARGIN_3 +250 0x0007 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x5000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x6400 //RX_FDDRC_THRD_3_2 +258 0x6400 //RX_FDDRC_THRD_3_3 +259 0x2000 //RX_FDDRC_SLANT_0_0 +260 0x2000 //RX_FDDRC_SLANT_0_1 +261 0x2000 //RX_FDDRC_SLANT_0_2 +262 0x2000 //RX_FDDRC_SLANT_0_3 +263 0x5333 //RX_FDDRC_SLANT_1_0 +264 0x5333 //RX_FDDRC_SLANT_1_1 +265 0x5333 //RX_FDDRC_SLANT_1_2 +266 0x5333 //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +286 0x0052 //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 +#VOL 5 +163 0x1000 //RX_TDDRC_ALPHA_UP_1 +164 0x1000 //RX_TDDRC_ALPHA_UP_2 +165 0x1000 //RX_TDDRC_ALPHA_UP_3 +166 0x1000 //RX_TDDRC_ALPHA_UP_4 +184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +190 0x7000 //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +269 0x0001 //RX_TDDRC_THRD_0 +270 0x0002 //RX_TDDRC_THRD_1 +271 0x1800 //RX_TDDRC_THRD_2 +272 0x1800 //RX_TDDRC_THRD_3 +273 0x3000 //RX_TDDRC_SLANT_0 +274 0x6E00 //RX_TDDRC_SLANT_1 +275 0x1000 //RX_TDDRC_ALPHA_UP_0 +276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x199A //RX_TDDRC_HMNC_GAIN +279 0x0001 //RX_TDDRC_SMT_FLAG +280 0x0CCD //RX_TDDRC_SMT_W +281 0x04E6 //RX_TDDRC_DRC_GAIN +195 0x0020 //RX_FDEQ_SUBNUM +196 0x4840 //RX_FDEQ_GAIN_0 +197 0x4040 //RX_FDEQ_GAIN_1 +198 0x4050 //RX_FDEQ_GAIN_2 +199 0x5D6C //RX_FDEQ_GAIN_3 +200 0x7B86 //RX_FDEQ_GAIN_4 +201 0x8186 //RX_FDEQ_GAIN_5 +202 0x8688 //RX_FDEQ_GAIN_6 +203 0x9097 //RX_FDEQ_GAIN_7 +204 0x929F //RX_FDEQ_GAIN_8 +205 0x9CA0 //RX_FDEQ_GAIN_9 +206 0xA391 //RX_FDEQ_GAIN_10 +207 0x8A82 //RX_FDEQ_GAIN_11 +208 0x726E //RX_FDEQ_GAIN_12 +209 0x704E //RX_FDEQ_GAIN_13 +210 0x6565 //RX_FDEQ_GAIN_14 +211 0x698A //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0202 //RX_FDEQ_BIN_0 +221 0x0202 //RX_FDEQ_BIN_1 +222 0x0302 //RX_FDEQ_BIN_2 +223 0x0304 //RX_FDEQ_BIN_3 +224 0x0405 //RX_FDEQ_BIN_4 +225 0x0506 //RX_FDEQ_BIN_5 +226 0x0708 //RX_FDEQ_BIN_6 +227 0x090A //RX_FDEQ_BIN_7 +228 0x0B0C //RX_FDEQ_BIN_8 +229 0x0D0E //RX_FDEQ_BIN_9 +230 0x1013 //RX_FDEQ_BIN_10 +231 0x1719 //RX_FDEQ_BIN_11 +232 0x1B1E //RX_FDEQ_BIN_12 +233 0x1E1E //RX_FDEQ_BIN_13 +234 0x1E28 //RX_FDEQ_BIN_14 +235 0x282C //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x4000 //RX_FDEQ_RESRV_0 +245 0x0320 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0030 //RX_FDDRC_BAND_MARGIN_1 +248 0x0050 //RX_FDDRC_BAND_MARGIN_2 +249 0x0080 //RX_FDDRC_BAND_MARGIN_3 +250 0x0007 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x5000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x6400 //RX_FDDRC_THRD_3_2 +258 0x6400 //RX_FDDRC_THRD_3_3 +259 0x2000 //RX_FDDRC_SLANT_0_0 +260 0x2000 //RX_FDDRC_SLANT_0_1 +261 0x2000 //RX_FDDRC_SLANT_0_2 +262 0x2000 //RX_FDDRC_SLANT_0_3 +263 0x5333 //RX_FDDRC_SLANT_1_0 +264 0x5333 //RX_FDDRC_SLANT_1_1 +265 0x5333 //RX_FDDRC_SLANT_1_2 +266 0x5333 //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +286 0x0087 //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 +#VOL 6 +163 0x1000 //RX_TDDRC_ALPHA_UP_1 +164 0x1000 //RX_TDDRC_ALPHA_UP_2 +165 0x1000 //RX_TDDRC_ALPHA_UP_3 +166 0x1000 //RX_TDDRC_ALPHA_UP_4 +184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +190 0x7000 //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +269 0x0001 //RX_TDDRC_THRD_0 +270 0x0002 //RX_TDDRC_THRD_1 +271 0x1800 //RX_TDDRC_THRD_2 +272 0x1800 //RX_TDDRC_THRD_3 +273 0x3000 //RX_TDDRC_SLANT_0 +274 0x6E00 //RX_TDDRC_SLANT_1 +275 0x1000 //RX_TDDRC_ALPHA_UP_0 +276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x199A //RX_TDDRC_HMNC_GAIN +279 0x0001 //RX_TDDRC_SMT_FLAG +280 0x0CCD //RX_TDDRC_SMT_W +281 0x04E6 //RX_TDDRC_DRC_GAIN +195 0x0020 //RX_FDEQ_SUBNUM +196 0x4840 //RX_FDEQ_GAIN_0 +197 0x4040 //RX_FDEQ_GAIN_1 +198 0x4050 //RX_FDEQ_GAIN_2 +199 0x5D6C //RX_FDEQ_GAIN_3 +200 0x7B86 //RX_FDEQ_GAIN_4 +201 0x8186 //RX_FDEQ_GAIN_5 +202 0x8688 //RX_FDEQ_GAIN_6 +203 0x9097 //RX_FDEQ_GAIN_7 +204 0x929F //RX_FDEQ_GAIN_8 +205 0x9CA0 //RX_FDEQ_GAIN_9 +206 0xA391 //RX_FDEQ_GAIN_10 +207 0x8A82 //RX_FDEQ_GAIN_11 +208 0x726E //RX_FDEQ_GAIN_12 +209 0x704E //RX_FDEQ_GAIN_13 +210 0x6565 //RX_FDEQ_GAIN_14 +211 0x698A //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0202 //RX_FDEQ_BIN_0 +221 0x0202 //RX_FDEQ_BIN_1 +222 0x0302 //RX_FDEQ_BIN_2 +223 0x0304 //RX_FDEQ_BIN_3 +224 0x0405 //RX_FDEQ_BIN_4 +225 0x0506 //RX_FDEQ_BIN_5 +226 0x0708 //RX_FDEQ_BIN_6 +227 0x090A //RX_FDEQ_BIN_7 +228 0x0B0C //RX_FDEQ_BIN_8 +229 0x0D0E //RX_FDEQ_BIN_9 +230 0x1013 //RX_FDEQ_BIN_10 +231 0x1719 //RX_FDEQ_BIN_11 +232 0x1B1E //RX_FDEQ_BIN_12 +233 0x1E1E //RX_FDEQ_BIN_13 +234 0x1E28 //RX_FDEQ_BIN_14 +235 0x282C //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x4000 //RX_FDEQ_RESRV_0 +245 0x0320 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0030 //RX_FDDRC_BAND_MARGIN_1 +248 0x0050 //RX_FDDRC_BAND_MARGIN_2 +249 0x0080 //RX_FDDRC_BAND_MARGIN_3 +250 0x0007 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x5000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x6400 //RX_FDDRC_THRD_3_2 +258 0x6400 //RX_FDDRC_THRD_3_3 +259 0x2000 //RX_FDDRC_SLANT_0_0 +260 0x2000 //RX_FDDRC_SLANT_0_1 +261 0x2000 //RX_FDDRC_SLANT_0_2 +262 0x2000 //RX_FDDRC_SLANT_0_3 +263 0x5333 //RX_FDDRC_SLANT_1_0 +264 0x5333 //RX_FDDRC_SLANT_1_1 +265 0x5333 //RX_FDDRC_SLANT_1_2 +266 0x5333 //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +286 0x0100 //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 #CASE_NAME HANDSET-HANDSET-TMOBILE_US-FB -#PARAM_TYPE TX+RX -#TOTAL_CUSTOM_STEP 7 +#PARAM_MODE Full +#PARAM_TYPE TX+2RX +#TOTAL_CUSTOM_STEP 7+7 #TX 0 0x0000 //TX_OPERATION_MODE_0 1 0x0000 //TX_OPERATION_MODE_1 @@ -24570,7 +37409,7 @@ 18 0x0000 //TX_SYS_RESRV_2 19 0x0000 //TX_SYS_RESRV_3 20 0x0000 //TX_DIST2REF0 -21 0x009D //TX_DIST2REF1 +21 0x009C //TX_DIST2REF1 22 0x0000 //TX_DIST2REF_02 23 0x0000 //TX_DIST2REF_03 24 0x0000 //TX_DIST2REF_04 @@ -24800,12 +37639,12 @@ 248 0xF800 //TX_THR_SN_EST_6 249 0xF700 //TX_THR_SN_EST_7 250 0x0000 //TX_DELTA_THR_SN_EST_0 -251 0x0100 //TX_DELTA_THR_SN_EST_1 +251 0x0200 //TX_DELTA_THR_SN_EST_1 252 0x0200 //TX_DELTA_THR_SN_EST_2 253 0x0200 //TX_DELTA_THR_SN_EST_3 -254 0x0200 //TX_DELTA_THR_SN_EST_4 -255 0x0100 //TX_DELTA_THR_SN_EST_5 -256 0x0200 //TX_DELTA_THR_SN_EST_6 +254 0x0100 //TX_DELTA_THR_SN_EST_4 +255 0x0200 //TX_DELTA_THR_SN_EST_5 +256 0x0100 //TX_DELTA_THR_SN_EST_6 257 0x0200 //TX_DELTA_THR_SN_EST_7 258 0x4000 //TX_LAMBDA_NN_EST_0 259 0x4000 //TX_LAMBDA_NN_EST_1 @@ -24833,16 +37672,16 @@ 281 0x0014 //TX_NS_LVL_CTRL_0 282 0x0016 //TX_NS_LVL_CTRL_1 283 0x0016 //TX_NS_LVL_CTRL_2 -284 0x0016 //TX_NS_LVL_CTRL_3 -285 0x0018 //TX_NS_LVL_CTRL_4 -286 0x0016 //TX_NS_LVL_CTRL_5 -287 0x0012 //TX_NS_LVL_CTRL_6 +284 0x0018 //TX_NS_LVL_CTRL_3 +285 0x0016 //TX_NS_LVL_CTRL_4 +286 0x0012 //TX_NS_LVL_CTRL_5 +287 0x0016 //TX_NS_LVL_CTRL_6 288 0x0017 //TX_NS_LVL_CTRL_7 289 0x000E //TX_MIN_GAIN_S_0 -290 0x0012 //TX_MIN_GAIN_S_1 -291 0x0007 //TX_MIN_GAIN_S_2 -292 0x0012 //TX_MIN_GAIN_S_3 -293 0x0010 //TX_MIN_GAIN_S_4 +290 0x0007 //TX_MIN_GAIN_S_1 +291 0x0012 //TX_MIN_GAIN_S_2 +292 0x0010 //TX_MIN_GAIN_S_3 +293 0x0012 //TX_MIN_GAIN_S_4 294 0x0012 //TX_MIN_GAIN_S_5 295 0x0012 //TX_MIN_GAIN_S_6 296 0x0012 //TX_MIN_GAIN_S_7 @@ -24864,29 +37703,29 @@ 312 0x7FFF //TX_A_POST_FILT_0 313 0x2000 //TX_A_POST_FILT_1 314 0x4000 //TX_A_POST_FILT_S_0 -315 0x5000 //TX_A_POST_FILT_S_1 +315 0x4000 //TX_A_POST_FILT_S_1 316 0x4000 //TX_A_POST_FILT_S_2 317 0x4000 //TX_A_POST_FILT_S_3 318 0x4000 //TX_A_POST_FILT_S_4 319 0x4000 //TX_A_POST_FILT_S_5 -320 0x4000 //TX_A_POST_FILT_S_6 +320 0x5000 //TX_A_POST_FILT_S_6 321 0x7000 //TX_A_POST_FILT_S_7 322 0x1000 //TX_B_POST_FILT_0 323 0x2000 //TX_B_POST_FILT_1 -324 0x3000 //TX_B_POST_FILT_2 +324 0x2000 //TX_B_POST_FILT_2 325 0x2000 //TX_B_POST_FILT_3 -326 0x5000 //TX_B_POST_FILT_4 +326 0x2000 //TX_B_POST_FILT_4 327 0x2000 //TX_B_POST_FILT_5 -328 0x6000 //TX_B_POST_FILT_6 +328 0x3000 //TX_B_POST_FILT_6 329 0x3000 //TX_B_POST_FILT_7 330 0x1000 //TX_B_LESSCUT_RTO_S_0 -331 0x6000 //TX_B_LESSCUT_RTO_S_1 -332 0x6000 //TX_B_LESSCUT_RTO_S_2 -333 0x6000 //TX_B_LESSCUT_RTO_S_3 -334 0x6000 //TX_B_LESSCUT_RTO_S_4 -335 0x6000 //TX_B_LESSCUT_RTO_S_5 -336 0x7FFF //TX_B_LESSCUT_RTO_S_6 -337 0x7FFF //TX_B_LESSCUT_RTO_S_7 +331 0x1000 //TX_B_LESSCUT_RTO_S_1 +332 0x1000 //TX_B_LESSCUT_RTO_S_2 +333 0x1000 //TX_B_LESSCUT_RTO_S_3 +334 0x1000 //TX_B_LESSCUT_RTO_S_4 +335 0x1000 //TX_B_LESSCUT_RTO_S_5 +336 0x1000 //TX_B_LESSCUT_RTO_S_6 +337 0x1000 //TX_B_LESSCUT_RTO_S_7 338 0x7E14 //TX_LAMBDA_PFILT 339 0x7C29 //TX_LAMBDA_PFILT_S_0 340 0x7C29 //TX_LAMBDA_PFILT_S_1 @@ -24929,10 +37768,10 @@ 377 0x4E20 //TX_NOISE_TH_5_4 378 0x39DF //TX_NOISE_TH_6 379 0x0014 //TX_MINENOISE_TH -380 0x4000 //TX_MINENOISE_MIC0_TH_MTS -381 0xFFEE //TX_MINENOISE_MIC0_TH_EXP -382 0x6000 //TX_MINENOISE_MIC0_S_TH_MTS -383 0xFFF3 //TX_MINENOISE_MIC0_S_TH_EXP +380 0xD508 //TX_MORENS_TFMASK_TH +381 0x0001 //TX_DRC_QUIET_FLOOR +382 0x6D60 //TX_RATIODTL_CUT_TH +383 0x1482 //TX_DT_CUT_K1 384 0x00A5 //TX_OUT_ENER_S_TH_CLEAN 385 0x00A5 //TX_OUT_ENER_S_TH_LESSCLEAN 386 0x00A5 //TX_OUT_ENER_S_TH_NOISY @@ -24940,15 +37779,15 @@ 388 0x0200 //TX_OUT_ENER_TH_SPEECH 389 0x2000 //TX_SN_NPB_GAIN 390 0x0000 //TX_NN_NPB_GAIN -391 0x0000 //TX_CSX_ALPHA_0 -392 0x0000 //TX_CSX_ALPHA_1 -393 0x0000 //TX_CSX_ALPHA_2 -394 0x0000 //TX_CSX_ALPHA_3 -395 0x0800 //TX_MU_ARSP_EST -396 0x00C8 //TX_P_OUTBEAM_MIN_TH +391 0x3000 //TX_POST_MASK_SUP_HSNE +392 0x07D0 //TX_TAIL_DET_TH +393 0x4000 //TX_B_LESSCUT_RTO_WTA +394 0x0000 //TX_MEL_G_R +395 0x0080 //TX_SUPHIGH_TH +396 0x0000 //TX_MASK_G_R 397 0x0002 //TX_EXTRA_NS_L -398 0x0800 //TX_EXTRA_NS_A -399 0x0005 //TX_VR_NOISE_FLOOR_TH +398 0x1800 //TX_C_POST_FLT_MASK +399 0x7FFF //TX_A_POST_FLT_WNS 400 0x0148 //TX_MIN_G_LOW300HZ 401 0x0004 //TX_MAXLEVEL_CNG 402 0x00B4 //TX_STN_NOISE_TH @@ -25063,16 +37902,16 @@ 511 0x6666 //TX_MIC_TO_BFGAIN 512 0x0000 //TX_MICTOBFGAIN0 513 0x0000 //TX_FASTMUE_TH -514 0x0000 //TX_DERVB_LEN_0 -515 0x0000 //TX_DERVB_LEN_1 -516 0x0000 //TX_RHO_DERVB -517 0x0000 //TX_MIC_INDX_DERVB -518 0x0000 //TX_MU_DERVB -519 0x0000 //TX_DR_RESRV_0 -520 0x0000 //TX_DR_RESRV_1 -521 0x0000 //TX_DR_RESRV_2 -522 0x0000 //TX_DR_RESRV_3 -523 0x0000 //TX_DR_RESRV_4 +514 0x2CCC //TX_DEREVERB_LF_MU +515 0x3200 //TX_DEREVERB_HF_MU +516 0x0007 //TX_DEREVERB_DELAY +517 0x0004 //TX_DEREVERB_COEF_LEN +518 0x0003 //TX_DEREVERB_DNR +519 0x0000 //TX_DEREVERB_ALPHA +520 0x0000 //TX_DEREVERB_BETA +521 0x7FFF //TX_GSC_RTOL_TH +522 0x7FFF //TX_GSC_RTOH_TH +523 0x7E2C //TX_WIDE2_MEANHTH 524 0x0000 //TX_DR_RESRV_5 525 0x0000 //TX_DR_RESRV_6 526 0x0000 //TX_DR_RESRV_7 @@ -25446,8 +38285,73 @@ 894 0xC000 //TX_FASTNS_SSA_THHFL 895 0xCCCC //TX_FASTNS_SSA_THLFH 896 0xD999 //TX_FASTNS_SSA_THHFH +897 0x2339 //TX_SENDFUNC_REG_MICMUTE +898 0x0021 //TX_SENDFUNC_REG_MICMUTE1 +899 0x02BC //TX_MICMUTE_RATIO_THR +900 0x0140 //TX_MICMUTE_AMP_THR +901 0x0004 //TX_MICMUTE_HPF_IND +902 0x00C0 //TX_MICMUTE_LOG_EYR_TH +903 0x0008 //TX_MICMUTE_CVG_TIME +904 0x0008 //TX_MICMUTE_RELEASE_TIME +905 0x01FE //TX_MIC_VOLUME_MIC0MUTE +906 0x0020 //TX_MICMUTE_EPD_OFFSET_0 +907 0x001E //TX_MICMUTE_FRQ_AEC_L +908 0x7999 //TX_MICMUTE_EAD_THR +909 0x7FFF //TX_MICMUTE_LAMBDA_CB_NLE +910 0x7FFF //TX_MICMUTE_LAMBDA_RE_EST +911 0x4000 //TX_DTD_THR1_MICMUTE_0 +912 0x7000 //TX_DTD_THR1_MICMUTE_1 +913 0x7FFF //TX_DTD_THR1_MICMUTE_2 +914 0x7FFF //TX_DTD_THR1_MICMUTE_3 +915 0x6CCC //TX_DTD_THR2_MICMUTE_0 +916 0x0400 //TX_MICMUTE_MIN_EQ_RE_EST_0 +917 0x0400 //TX_MICMUTE_MIN_EQ_RE_EST_1 +918 0x1000 //TX_MICMUTE_MIN_EQ_RE_EST_2 +919 0x7FFF //TX_MICMUTE_MIN_EQ_RE_EST_3 +920 0x7FFF //TX_MICMUTE_MIN_EQ_RE_EST_4 +921 0x4000 //TX_MICMUTE_C_POST_FLT +922 0x03E8 //TX_MICMUTE_DT_CUT_K +923 0x0001 //TX_MICMUTE_DT_CUT_THR +924 0x03E8 //TX_MICMUTE_DT_CUT_K2 +925 0x0001 //TX_MICMUTE_DT_CUT_THR2 +926 0x0064 //TX_MICMUTE_DT2_HOLD_N +927 0x1000 //TX_MICMUTE_RATIODTH_THCUT +928 0x1000 //TX_MICMUTE_B_POST_FLT_ECHOL +929 0x7FFF //TX_MICMUTE_B_POST_FLT_ECHOH +930 0x0400 //TX_MICMUTE_C_POST_FLT_MASK +931 0x7999 //TX_MICMUTE_RATIODTL_CUT_TH +932 0x0258 //TX_MICMUTE_DT_CUT_K1 +933 0x0800 //TX_MICMUTE_N2_SN_EST +934 0xFC00 //TX_MICMUTE_THR_SN_EST_0 +935 0x001C //TX_MICMUTE_MIN_G_CTRL_0 +936 0x6000 //TX_MICMUTE_A_POST_FILT_S_0 +937 0x7000 //TX_MICMUTE_B_POST_FILT_0 +938 0x2710 //TX_MIC1RUB_AMP_THR +939 0x0010 //TX_MIC1MUTE_RATIO_THR +940 0x0450 //TX_MIC1MUTE_AMP_THR +941 0x0008 //TX_MIC1MUTE_CVG_TIME +942 0x0008 //TX_MIC1MUTE_RELEASE_TIME +943 0x0000 //TX_AMS_RESRV_01 +944 0x0000 //TX_AMS_RESRV_02 +945 0x0000 //TX_AMS_RESRV_03 +946 0x0000 //TX_AMS_RESRV_04 +947 0x0000 //TX_AMS_RESRV_05 +948 0x0000 //TX_AMS_RESRV_06 +949 0x0000 //TX_AMS_RESRV_07 +950 0x0000 //TX_AMS_RESRV_08 +951 0x0000 //TX_AMS_RESRV_09 +952 0x0000 //TX_AMS_RESRV_10 +953 0x0000 //TX_AMS_RESRV_11 +954 0x0000 //TX_AMS_RESRV_12 +955 0x0000 //TX_AMS_RESRV_13 +956 0x0000 //TX_AMS_RESRV_14 +957 0x0000 //TX_AMS_RESRV_15 +958 0x0000 //TX_AMS_RESRV_16 +959 0x0000 //TX_AMS_RESRV_17 +960 0x0000 //TX_AMS_RESRV_18 +961 0x0000 //TX_AMS_RESRV_19 #RX -0 0x002C //RX_RECVFUNC_MODE_0 +0 0x202C //RX_RECVFUNC_MODE_0 1 0x0000 //RX_RECVFUNC_MODE_1 2 0x0004 //RX_SAMPLINGFREQ_SIG 3 0x0004 //RX_SAMPLINGFREQ_PROC @@ -26297,14 +39201,866 @@ 110 0x0000 //RX_FDDRC_RESRV_0 129 0x0100 //RX_SPK_VOL 130 0x0000 //RX_VOL_RESRV_0 +#RX 2 +157 0x002C //RX_RECVFUNC_MODE_0 +158 0x0000 //RX_RECVFUNC_MODE_1 +159 0x0004 //RX_SAMPLINGFREQ_SIG +160 0x0004 //RX_SAMPLINGFREQ_PROC +161 0x000A //RX_FRAME_SZ +162 0x0000 //RX_DELAY_OPT +163 0x1000 //RX_TDDRC_ALPHA_UP_1 +164 0x1000 //RX_TDDRC_ALPHA_UP_2 +165 0x1000 //RX_TDDRC_ALPHA_UP_3 +166 0x1000 //RX_TDDRC_ALPHA_UP_4 +167 0x064E //RX_PGA +168 0x7FFF //RX_A_HP +169 0x4000 //RX_B_PE +170 0x5800 //RX_THR_PITCH_DET_0 +171 0x5000 //RX_THR_PITCH_DET_1 +172 0x4000 //RX_THR_PITCH_DET_2 +173 0x0008 //RX_PITCH_BFR_LEN +174 0x0003 //RX_SBD_PITCH_DET +175 0x0100 //RX_PP_RESRV_0 +176 0x0020 //RX_PP_RESRV_1 +177 0x0600 //RX_N_SN_EST +178 0x000C //RX_N2_SN_EST +179 0x000F //RX_NS_LVL_CTRL +180 0xF800 //RX_THR_SN_EST +181 0x7E00 //RX_LAMBDA_PFILT +182 0x000A //RX_FENS_RESRV_0 +183 0x0190 //RX_FENS_RESRV_1 +184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +187 0x0002 //RX_EXTRA_NS_L +188 0x0800 //RX_EXTRA_NS_A +189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +190 0x7000 //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +192 0x199A //RX_A_POST_FLT +193 0x0000 //RX_LMT_THRD +194 0x4000 //RX_LMT_ALPHA +195 0x0020 //RX_FDEQ_SUBNUM +196 0x4848 //RX_FDEQ_GAIN_0 +197 0x4850 //RX_FDEQ_GAIN_1 +198 0x6478 //RX_FDEQ_GAIN_2 +199 0x8689 //RX_FDEQ_GAIN_3 +200 0x908F //RX_FDEQ_GAIN_4 +201 0x9495 //RX_FDEQ_GAIN_5 +202 0x989D //RX_FDEQ_GAIN_6 +203 0x9DA6 //RX_FDEQ_GAIN_7 +204 0xA895 //RX_FDEQ_GAIN_8 +205 0x8A8A //RX_FDEQ_GAIN_9 +206 0x8E78 //RX_FDEQ_GAIN_10 +207 0x7070 //RX_FDEQ_GAIN_11 +208 0x7680 //RX_FDEQ_GAIN_12 +209 0x787C //RX_FDEQ_GAIN_13 +210 0x8890 //RX_FDEQ_GAIN_14 +211 0x9CAC //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0202 //RX_FDEQ_BIN_0 +221 0x0202 //RX_FDEQ_BIN_1 +222 0x0302 //RX_FDEQ_BIN_2 +223 0x0304 //RX_FDEQ_BIN_3 +224 0x0405 //RX_FDEQ_BIN_4 +225 0x0506 //RX_FDEQ_BIN_5 +226 0x0708 //RX_FDEQ_BIN_6 +227 0x090A //RX_FDEQ_BIN_7 +228 0x0B0C //RX_FDEQ_BIN_8 +229 0x0D0E //RX_FDEQ_BIN_9 +230 0x1013 //RX_FDEQ_BIN_10 +231 0x1719 //RX_FDEQ_BIN_11 +232 0x1B1E //RX_FDEQ_BIN_12 +233 0x1E1E //RX_FDEQ_BIN_13 +234 0x1E28 //RX_FDEQ_BIN_14 +235 0x282C //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x4000 //RX_FDEQ_RESRV_0 +245 0x0320 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0030 //RX_FDDRC_BAND_MARGIN_1 +248 0x0050 //RX_FDDRC_BAND_MARGIN_2 +249 0x0080 //RX_FDDRC_BAND_MARGIN_3 +250 0x0007 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x5000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x6400 //RX_FDDRC_THRD_3_2 +258 0x6400 //RX_FDDRC_THRD_3_3 +259 0x2000 //RX_FDDRC_SLANT_0_0 +260 0x2000 //RX_FDDRC_SLANT_0_1 +261 0x2000 //RX_FDDRC_SLANT_0_2 +262 0x2000 //RX_FDDRC_SLANT_0_3 +263 0x5333 //RX_FDDRC_SLANT_1_0 +264 0x5333 //RX_FDDRC_SLANT_1_1 +265 0x5333 //RX_FDDRC_SLANT_1_2 +266 0x5333 //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +268 0x0002 //RX_FILTINDX +269 0x0000 //RX_TDDRC_THRD_0 +270 0x0000 //RX_TDDRC_THRD_1 +271 0x1800 //RX_TDDRC_THRD_2 +272 0x1800 //RX_TDDRC_THRD_3 +273 0x3000 //RX_TDDRC_SLANT_0 +274 0x6E00 //RX_TDDRC_SLANT_1 +275 0x1000 //RX_TDDRC_ALPHA_UP_0 +276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x199A //RX_TDDRC_HMNC_GAIN +279 0x0001 //RX_TDDRC_SMT_FLAG +280 0x0CCD //RX_TDDRC_SMT_W +281 0x0275 //RX_TDDRC_DRC_GAIN +282 0x7C00 //RX_LAMBDA_PKA_FP +283 0x1964 //RX_TPKA_FP +284 0x0080 //RX_MIN_G_FP +285 0x2000 //RX_MAX_G_FP +286 0x000D //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 +288 0x0000 //RX_MAXLEVEL_CNG +289 0x3000 //RX_BWE_UV_TH +290 0x3000 //RX_BWE_UV_TH2 +291 0x1800 //RX_BWE_UV_TH3 +292 0x1000 //RX_BWE_V_TH +293 0x04CD //RX_BWE_GAIN1_V_TH1 +294 0x0F33 //RX_BWE_GAIN1_V_TH2 +295 0x7333 //RX_BWE_UV_EQ +296 0x199A //RX_BWE_V_EQ +297 0x7333 //RX_BWE_TONE_TH +298 0x0004 //RX_BWE_UV_HOLD_T +299 0x6CCD //RX_BWE_GAIN2_ALPHA +300 0x799A //RX_BWE_GAIN3_ALPHA +301 0x001E //RX_BWE_CUTOFF +302 0x3000 //RX_BWE_GAINFILL +303 0x3200 //RX_BWE_MAXTH_TONE +304 0x2000 //RX_BWE_EQ_0 +305 0x2000 //RX_BWE_EQ_1 +306 0x2000 //RX_BWE_EQ_2 +307 0x2000 //RX_BWE_EQ_3 +308 0x2000 //RX_BWE_EQ_4 +309 0x2000 //RX_BWE_EQ_5 +310 0x2000 //RX_BWE_EQ_6 +311 0x0000 //RX_BWE_RESRV_0 +312 0x0000 //RX_BWE_RESRV_1 +313 0x0000 //RX_BWE_RESRV_2 +#VOL 0 +163 0x1000 //RX_TDDRC_ALPHA_UP_1 +164 0x1000 //RX_TDDRC_ALPHA_UP_2 +165 0x1000 //RX_TDDRC_ALPHA_UP_3 +166 0x1000 //RX_TDDRC_ALPHA_UP_4 +184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +190 0x7000 //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +269 0x0000 //RX_TDDRC_THRD_0 +270 0x0000 //RX_TDDRC_THRD_1 +271 0x1800 //RX_TDDRC_THRD_2 +272 0x1800 //RX_TDDRC_THRD_3 +273 0x3000 //RX_TDDRC_SLANT_0 +274 0x6E00 //RX_TDDRC_SLANT_1 +275 0x1000 //RX_TDDRC_ALPHA_UP_0 +276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x199A //RX_TDDRC_HMNC_GAIN +279 0x0001 //RX_TDDRC_SMT_FLAG +280 0x0CCD //RX_TDDRC_SMT_W +281 0x0275 //RX_TDDRC_DRC_GAIN +195 0x0020 //RX_FDEQ_SUBNUM +196 0x4848 //RX_FDEQ_GAIN_0 +197 0x4850 //RX_FDEQ_GAIN_1 +198 0x6478 //RX_FDEQ_GAIN_2 +199 0x8689 //RX_FDEQ_GAIN_3 +200 0x908F //RX_FDEQ_GAIN_4 +201 0x9495 //RX_FDEQ_GAIN_5 +202 0x989D //RX_FDEQ_GAIN_6 +203 0x9DA6 //RX_FDEQ_GAIN_7 +204 0xA895 //RX_FDEQ_GAIN_8 +205 0x8A8A //RX_FDEQ_GAIN_9 +206 0x8E78 //RX_FDEQ_GAIN_10 +207 0x7070 //RX_FDEQ_GAIN_11 +208 0x7680 //RX_FDEQ_GAIN_12 +209 0x787C //RX_FDEQ_GAIN_13 +210 0x8890 //RX_FDEQ_GAIN_14 +211 0x9CAC //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0202 //RX_FDEQ_BIN_0 +221 0x0202 //RX_FDEQ_BIN_1 +222 0x0302 //RX_FDEQ_BIN_2 +223 0x0304 //RX_FDEQ_BIN_3 +224 0x0405 //RX_FDEQ_BIN_4 +225 0x0506 //RX_FDEQ_BIN_5 +226 0x0708 //RX_FDEQ_BIN_6 +227 0x090A //RX_FDEQ_BIN_7 +228 0x0B0C //RX_FDEQ_BIN_8 +229 0x0D0E //RX_FDEQ_BIN_9 +230 0x1013 //RX_FDEQ_BIN_10 +231 0x1719 //RX_FDEQ_BIN_11 +232 0x1B1E //RX_FDEQ_BIN_12 +233 0x1E1E //RX_FDEQ_BIN_13 +234 0x1E28 //RX_FDEQ_BIN_14 +235 0x282C //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x4000 //RX_FDEQ_RESRV_0 +245 0x0320 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0030 //RX_FDDRC_BAND_MARGIN_1 +248 0x0050 //RX_FDDRC_BAND_MARGIN_2 +249 0x0080 //RX_FDDRC_BAND_MARGIN_3 +250 0x0007 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x5000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x6400 //RX_FDDRC_THRD_3_2 +258 0x6400 //RX_FDDRC_THRD_3_3 +259 0x2000 //RX_FDDRC_SLANT_0_0 +260 0x2000 //RX_FDDRC_SLANT_0_1 +261 0x2000 //RX_FDDRC_SLANT_0_2 +262 0x2000 //RX_FDDRC_SLANT_0_3 +263 0x5333 //RX_FDDRC_SLANT_1_0 +264 0x5333 //RX_FDDRC_SLANT_1_1 +265 0x5333 //RX_FDDRC_SLANT_1_2 +266 0x5333 //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +286 0x000D //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 +#VOL 1 +163 0x1000 //RX_TDDRC_ALPHA_UP_1 +164 0x1000 //RX_TDDRC_ALPHA_UP_2 +165 0x1000 //RX_TDDRC_ALPHA_UP_3 +166 0x1000 //RX_TDDRC_ALPHA_UP_4 +184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +190 0x7000 //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +269 0x0000 //RX_TDDRC_THRD_0 +270 0x0000 //RX_TDDRC_THRD_1 +271 0x1800 //RX_TDDRC_THRD_2 +272 0x1800 //RX_TDDRC_THRD_3 +273 0x3000 //RX_TDDRC_SLANT_0 +274 0x6E00 //RX_TDDRC_SLANT_1 +275 0x1000 //RX_TDDRC_ALPHA_UP_0 +276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x199A //RX_TDDRC_HMNC_GAIN +279 0x0001 //RX_TDDRC_SMT_FLAG +280 0x0CCD //RX_TDDRC_SMT_W +281 0x0275 //RX_TDDRC_DRC_GAIN +195 0x0020 //RX_FDEQ_SUBNUM +196 0x4848 //RX_FDEQ_GAIN_0 +197 0x4850 //RX_FDEQ_GAIN_1 +198 0x6478 //RX_FDEQ_GAIN_2 +199 0x8689 //RX_FDEQ_GAIN_3 +200 0x908F //RX_FDEQ_GAIN_4 +201 0x9495 //RX_FDEQ_GAIN_5 +202 0x989D //RX_FDEQ_GAIN_6 +203 0x9DA6 //RX_FDEQ_GAIN_7 +204 0xA895 //RX_FDEQ_GAIN_8 +205 0x8A8A //RX_FDEQ_GAIN_9 +206 0x8E78 //RX_FDEQ_GAIN_10 +207 0x7070 //RX_FDEQ_GAIN_11 +208 0x7680 //RX_FDEQ_GAIN_12 +209 0x787C //RX_FDEQ_GAIN_13 +210 0x8890 //RX_FDEQ_GAIN_14 +211 0x9CAC //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0202 //RX_FDEQ_BIN_0 +221 0x0202 //RX_FDEQ_BIN_1 +222 0x0302 //RX_FDEQ_BIN_2 +223 0x0304 //RX_FDEQ_BIN_3 +224 0x0405 //RX_FDEQ_BIN_4 +225 0x0506 //RX_FDEQ_BIN_5 +226 0x0708 //RX_FDEQ_BIN_6 +227 0x090A //RX_FDEQ_BIN_7 +228 0x0B0C //RX_FDEQ_BIN_8 +229 0x0D0E //RX_FDEQ_BIN_9 +230 0x1013 //RX_FDEQ_BIN_10 +231 0x1719 //RX_FDEQ_BIN_11 +232 0x1B1E //RX_FDEQ_BIN_12 +233 0x1E1E //RX_FDEQ_BIN_13 +234 0x1E28 //RX_FDEQ_BIN_14 +235 0x282C //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x4000 //RX_FDEQ_RESRV_0 +245 0x0320 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0030 //RX_FDDRC_BAND_MARGIN_1 +248 0x0050 //RX_FDDRC_BAND_MARGIN_2 +249 0x0080 //RX_FDDRC_BAND_MARGIN_3 +250 0x0007 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x5000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x6400 //RX_FDDRC_THRD_3_2 +258 0x6400 //RX_FDDRC_THRD_3_3 +259 0x2000 //RX_FDDRC_SLANT_0_0 +260 0x2000 //RX_FDDRC_SLANT_0_1 +261 0x2000 //RX_FDDRC_SLANT_0_2 +262 0x2000 //RX_FDDRC_SLANT_0_3 +263 0x5333 //RX_FDDRC_SLANT_1_0 +264 0x5333 //RX_FDDRC_SLANT_1_1 +265 0x5333 //RX_FDDRC_SLANT_1_2 +266 0x5333 //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +286 0x0016 //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 +#VOL 2 +163 0x1000 //RX_TDDRC_ALPHA_UP_1 +164 0x1000 //RX_TDDRC_ALPHA_UP_2 +165 0x1000 //RX_TDDRC_ALPHA_UP_3 +166 0x1000 //RX_TDDRC_ALPHA_UP_4 +184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +190 0x7000 //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +269 0x0000 //RX_TDDRC_THRD_0 +270 0x0000 //RX_TDDRC_THRD_1 +271 0x1800 //RX_TDDRC_THRD_2 +272 0x1800 //RX_TDDRC_THRD_3 +273 0x3000 //RX_TDDRC_SLANT_0 +274 0x6E00 //RX_TDDRC_SLANT_1 +275 0x1000 //RX_TDDRC_ALPHA_UP_0 +276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x199A //RX_TDDRC_HMNC_GAIN +279 0x0001 //RX_TDDRC_SMT_FLAG +280 0x0CCD //RX_TDDRC_SMT_W +281 0x0275 //RX_TDDRC_DRC_GAIN +195 0x0020 //RX_FDEQ_SUBNUM +196 0x4848 //RX_FDEQ_GAIN_0 +197 0x4850 //RX_FDEQ_GAIN_1 +198 0x6478 //RX_FDEQ_GAIN_2 +199 0x8689 //RX_FDEQ_GAIN_3 +200 0x908F //RX_FDEQ_GAIN_4 +201 0x9495 //RX_FDEQ_GAIN_5 +202 0x989D //RX_FDEQ_GAIN_6 +203 0x9DA6 //RX_FDEQ_GAIN_7 +204 0xA895 //RX_FDEQ_GAIN_8 +205 0x8A8A //RX_FDEQ_GAIN_9 +206 0x8E78 //RX_FDEQ_GAIN_10 +207 0x7070 //RX_FDEQ_GAIN_11 +208 0x7680 //RX_FDEQ_GAIN_12 +209 0x787C //RX_FDEQ_GAIN_13 +210 0x8890 //RX_FDEQ_GAIN_14 +211 0x9CAC //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0202 //RX_FDEQ_BIN_0 +221 0x0202 //RX_FDEQ_BIN_1 +222 0x0302 //RX_FDEQ_BIN_2 +223 0x0304 //RX_FDEQ_BIN_3 +224 0x0405 //RX_FDEQ_BIN_4 +225 0x0506 //RX_FDEQ_BIN_5 +226 0x0708 //RX_FDEQ_BIN_6 +227 0x090A //RX_FDEQ_BIN_7 +228 0x0B0C //RX_FDEQ_BIN_8 +229 0x0D0E //RX_FDEQ_BIN_9 +230 0x1013 //RX_FDEQ_BIN_10 +231 0x1719 //RX_FDEQ_BIN_11 +232 0x1B1E //RX_FDEQ_BIN_12 +233 0x1E1E //RX_FDEQ_BIN_13 +234 0x1E28 //RX_FDEQ_BIN_14 +235 0x282C //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x4000 //RX_FDEQ_RESRV_0 +245 0x0320 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0030 //RX_FDDRC_BAND_MARGIN_1 +248 0x0050 //RX_FDDRC_BAND_MARGIN_2 +249 0x0080 //RX_FDDRC_BAND_MARGIN_3 +250 0x0007 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x5000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x6400 //RX_FDDRC_THRD_3_2 +258 0x6400 //RX_FDDRC_THRD_3_3 +259 0x2000 //RX_FDDRC_SLANT_0_0 +260 0x2000 //RX_FDDRC_SLANT_0_1 +261 0x2000 //RX_FDDRC_SLANT_0_2 +262 0x2000 //RX_FDDRC_SLANT_0_3 +263 0x5333 //RX_FDDRC_SLANT_1_0 +264 0x5333 //RX_FDDRC_SLANT_1_1 +265 0x5333 //RX_FDDRC_SLANT_1_2 +266 0x5333 //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +286 0x0026 //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 +#VOL 3 +163 0x1000 //RX_TDDRC_ALPHA_UP_1 +164 0x1000 //RX_TDDRC_ALPHA_UP_2 +165 0x1000 //RX_TDDRC_ALPHA_UP_3 +166 0x1000 //RX_TDDRC_ALPHA_UP_4 +184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +190 0x7000 //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +269 0x0000 //RX_TDDRC_THRD_0 +270 0x0000 //RX_TDDRC_THRD_1 +271 0x1800 //RX_TDDRC_THRD_2 +272 0x1800 //RX_TDDRC_THRD_3 +273 0x3000 //RX_TDDRC_SLANT_0 +274 0x6E00 //RX_TDDRC_SLANT_1 +275 0x1000 //RX_TDDRC_ALPHA_UP_0 +276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x199A //RX_TDDRC_HMNC_GAIN +279 0x0001 //RX_TDDRC_SMT_FLAG +280 0x0CCD //RX_TDDRC_SMT_W +281 0x0275 //RX_TDDRC_DRC_GAIN +195 0x0020 //RX_FDEQ_SUBNUM +196 0x4848 //RX_FDEQ_GAIN_0 +197 0x4850 //RX_FDEQ_GAIN_1 +198 0x6478 //RX_FDEQ_GAIN_2 +199 0x8689 //RX_FDEQ_GAIN_3 +200 0x908F //RX_FDEQ_GAIN_4 +201 0x9495 //RX_FDEQ_GAIN_5 +202 0x989D //RX_FDEQ_GAIN_6 +203 0x9DA6 //RX_FDEQ_GAIN_7 +204 0xA895 //RX_FDEQ_GAIN_8 +205 0x8A8A //RX_FDEQ_GAIN_9 +206 0x8E78 //RX_FDEQ_GAIN_10 +207 0x7070 //RX_FDEQ_GAIN_11 +208 0x7680 //RX_FDEQ_GAIN_12 +209 0x787C //RX_FDEQ_GAIN_13 +210 0x8890 //RX_FDEQ_GAIN_14 +211 0x9CAC //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0202 //RX_FDEQ_BIN_0 +221 0x0202 //RX_FDEQ_BIN_1 +222 0x0302 //RX_FDEQ_BIN_2 +223 0x0304 //RX_FDEQ_BIN_3 +224 0x0405 //RX_FDEQ_BIN_4 +225 0x0506 //RX_FDEQ_BIN_5 +226 0x0708 //RX_FDEQ_BIN_6 +227 0x090A //RX_FDEQ_BIN_7 +228 0x0B0C //RX_FDEQ_BIN_8 +229 0x0D0E //RX_FDEQ_BIN_9 +230 0x1013 //RX_FDEQ_BIN_10 +231 0x1719 //RX_FDEQ_BIN_11 +232 0x1B1E //RX_FDEQ_BIN_12 +233 0x1E1E //RX_FDEQ_BIN_13 +234 0x1E28 //RX_FDEQ_BIN_14 +235 0x282C //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x4000 //RX_FDEQ_RESRV_0 +245 0x0320 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0030 //RX_FDDRC_BAND_MARGIN_1 +248 0x0050 //RX_FDDRC_BAND_MARGIN_2 +249 0x0080 //RX_FDDRC_BAND_MARGIN_3 +250 0x0007 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x5000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x6400 //RX_FDDRC_THRD_3_2 +258 0x6400 //RX_FDDRC_THRD_3_3 +259 0x2000 //RX_FDDRC_SLANT_0_0 +260 0x2000 //RX_FDDRC_SLANT_0_1 +261 0x2000 //RX_FDDRC_SLANT_0_2 +262 0x2000 //RX_FDDRC_SLANT_0_3 +263 0x5333 //RX_FDDRC_SLANT_1_0 +264 0x5333 //RX_FDDRC_SLANT_1_1 +265 0x5333 //RX_FDDRC_SLANT_1_2 +266 0x5333 //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +286 0x003D //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 +#VOL 4 +163 0x1000 //RX_TDDRC_ALPHA_UP_1 +164 0x1000 //RX_TDDRC_ALPHA_UP_2 +165 0x1000 //RX_TDDRC_ALPHA_UP_3 +166 0x1000 //RX_TDDRC_ALPHA_UP_4 +184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +190 0x7000 //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +269 0x0000 //RX_TDDRC_THRD_0 +270 0x0000 //RX_TDDRC_THRD_1 +271 0x1800 //RX_TDDRC_THRD_2 +272 0x1800 //RX_TDDRC_THRD_3 +273 0x3000 //RX_TDDRC_SLANT_0 +274 0x6E00 //RX_TDDRC_SLANT_1 +275 0x1000 //RX_TDDRC_ALPHA_UP_0 +276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x199A //RX_TDDRC_HMNC_GAIN +279 0x0001 //RX_TDDRC_SMT_FLAG +280 0x0CCD //RX_TDDRC_SMT_W +281 0x0275 //RX_TDDRC_DRC_GAIN +195 0x0020 //RX_FDEQ_SUBNUM +196 0x4848 //RX_FDEQ_GAIN_0 +197 0x4850 //RX_FDEQ_GAIN_1 +198 0x6478 //RX_FDEQ_GAIN_2 +199 0x8689 //RX_FDEQ_GAIN_3 +200 0x908F //RX_FDEQ_GAIN_4 +201 0x9495 //RX_FDEQ_GAIN_5 +202 0x989D //RX_FDEQ_GAIN_6 +203 0x9DA6 //RX_FDEQ_GAIN_7 +204 0xA895 //RX_FDEQ_GAIN_8 +205 0x8A8A //RX_FDEQ_GAIN_9 +206 0x8E78 //RX_FDEQ_GAIN_10 +207 0x7070 //RX_FDEQ_GAIN_11 +208 0x7680 //RX_FDEQ_GAIN_12 +209 0x787C //RX_FDEQ_GAIN_13 +210 0x8890 //RX_FDEQ_GAIN_14 +211 0x9CAC //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0202 //RX_FDEQ_BIN_0 +221 0x0202 //RX_FDEQ_BIN_1 +222 0x0302 //RX_FDEQ_BIN_2 +223 0x0304 //RX_FDEQ_BIN_3 +224 0x0405 //RX_FDEQ_BIN_4 +225 0x0506 //RX_FDEQ_BIN_5 +226 0x0708 //RX_FDEQ_BIN_6 +227 0x090A //RX_FDEQ_BIN_7 +228 0x0B0C //RX_FDEQ_BIN_8 +229 0x0D0E //RX_FDEQ_BIN_9 +230 0x1013 //RX_FDEQ_BIN_10 +231 0x1719 //RX_FDEQ_BIN_11 +232 0x1B1E //RX_FDEQ_BIN_12 +233 0x1E1E //RX_FDEQ_BIN_13 +234 0x1E28 //RX_FDEQ_BIN_14 +235 0x282C //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x4000 //RX_FDEQ_RESRV_0 +245 0x0320 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0030 //RX_FDDRC_BAND_MARGIN_1 +248 0x0050 //RX_FDDRC_BAND_MARGIN_2 +249 0x0080 //RX_FDDRC_BAND_MARGIN_3 +250 0x0007 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x5000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x6400 //RX_FDDRC_THRD_3_2 +258 0x6400 //RX_FDDRC_THRD_3_3 +259 0x2000 //RX_FDDRC_SLANT_0_0 +260 0x2000 //RX_FDDRC_SLANT_0_1 +261 0x2000 //RX_FDDRC_SLANT_0_2 +262 0x2000 //RX_FDDRC_SLANT_0_3 +263 0x5333 //RX_FDDRC_SLANT_1_0 +264 0x5333 //RX_FDDRC_SLANT_1_1 +265 0x5333 //RX_FDDRC_SLANT_1_2 +266 0x5333 //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +286 0x0060 //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 +#VOL 5 +163 0x1000 //RX_TDDRC_ALPHA_UP_1 +164 0x1000 //RX_TDDRC_ALPHA_UP_2 +165 0x1000 //RX_TDDRC_ALPHA_UP_3 +166 0x1000 //RX_TDDRC_ALPHA_UP_4 +184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +190 0x7000 //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +269 0x0000 //RX_TDDRC_THRD_0 +270 0x0000 //RX_TDDRC_THRD_1 +271 0x1800 //RX_TDDRC_THRD_2 +272 0x1800 //RX_TDDRC_THRD_3 +273 0x3000 //RX_TDDRC_SLANT_0 +274 0x6E00 //RX_TDDRC_SLANT_1 +275 0x1000 //RX_TDDRC_ALPHA_UP_0 +276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x199A //RX_TDDRC_HMNC_GAIN +279 0x0001 //RX_TDDRC_SMT_FLAG +280 0x0CCD //RX_TDDRC_SMT_W +281 0x0275 //RX_TDDRC_DRC_GAIN +195 0x0020 //RX_FDEQ_SUBNUM +196 0x4848 //RX_FDEQ_GAIN_0 +197 0x4850 //RX_FDEQ_GAIN_1 +198 0x6478 //RX_FDEQ_GAIN_2 +199 0x8689 //RX_FDEQ_GAIN_3 +200 0x908F //RX_FDEQ_GAIN_4 +201 0x9495 //RX_FDEQ_GAIN_5 +202 0x989D //RX_FDEQ_GAIN_6 +203 0x9DA6 //RX_FDEQ_GAIN_7 +204 0xA895 //RX_FDEQ_GAIN_8 +205 0x8A8A //RX_FDEQ_GAIN_9 +206 0x8E78 //RX_FDEQ_GAIN_10 +207 0x7070 //RX_FDEQ_GAIN_11 +208 0x7680 //RX_FDEQ_GAIN_12 +209 0x787C //RX_FDEQ_GAIN_13 +210 0x8890 //RX_FDEQ_GAIN_14 +211 0x9CAC //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0202 //RX_FDEQ_BIN_0 +221 0x0202 //RX_FDEQ_BIN_1 +222 0x0302 //RX_FDEQ_BIN_2 +223 0x0304 //RX_FDEQ_BIN_3 +224 0x0405 //RX_FDEQ_BIN_4 +225 0x0506 //RX_FDEQ_BIN_5 +226 0x0708 //RX_FDEQ_BIN_6 +227 0x090A //RX_FDEQ_BIN_7 +228 0x0B0C //RX_FDEQ_BIN_8 +229 0x0D0E //RX_FDEQ_BIN_9 +230 0x1013 //RX_FDEQ_BIN_10 +231 0x1719 //RX_FDEQ_BIN_11 +232 0x1B1E //RX_FDEQ_BIN_12 +233 0x1E1E //RX_FDEQ_BIN_13 +234 0x1E28 //RX_FDEQ_BIN_14 +235 0x282C //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x4000 //RX_FDEQ_RESRV_0 +245 0x0320 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0030 //RX_FDDRC_BAND_MARGIN_1 +248 0x0050 //RX_FDDRC_BAND_MARGIN_2 +249 0x0080 //RX_FDDRC_BAND_MARGIN_3 +250 0x0007 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x5000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x6400 //RX_FDDRC_THRD_3_2 +258 0x6400 //RX_FDDRC_THRD_3_3 +259 0x2000 //RX_FDDRC_SLANT_0_0 +260 0x2000 //RX_FDDRC_SLANT_0_1 +261 0x2000 //RX_FDDRC_SLANT_0_2 +262 0x2000 //RX_FDDRC_SLANT_0_3 +263 0x5333 //RX_FDDRC_SLANT_1_0 +264 0x5333 //RX_FDDRC_SLANT_1_1 +265 0x5333 //RX_FDDRC_SLANT_1_2 +266 0x5333 //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +286 0x0099 //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 +#VOL 6 +163 0x1000 //RX_TDDRC_ALPHA_UP_1 +164 0x1000 //RX_TDDRC_ALPHA_UP_2 +165 0x1000 //RX_TDDRC_ALPHA_UP_3 +166 0x1000 //RX_TDDRC_ALPHA_UP_4 +184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +190 0x7000 //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +269 0x0000 //RX_TDDRC_THRD_0 +270 0x0000 //RX_TDDRC_THRD_1 +271 0x1800 //RX_TDDRC_THRD_2 +272 0x1800 //RX_TDDRC_THRD_3 +273 0x3000 //RX_TDDRC_SLANT_0 +274 0x6E00 //RX_TDDRC_SLANT_1 +275 0x1000 //RX_TDDRC_ALPHA_UP_0 +276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x199A //RX_TDDRC_HMNC_GAIN +279 0x0001 //RX_TDDRC_SMT_FLAG +280 0x0CCD //RX_TDDRC_SMT_W +281 0x0275 //RX_TDDRC_DRC_GAIN +195 0x0020 //RX_FDEQ_SUBNUM +196 0x4848 //RX_FDEQ_GAIN_0 +197 0x4850 //RX_FDEQ_GAIN_1 +198 0x6478 //RX_FDEQ_GAIN_2 +199 0x8689 //RX_FDEQ_GAIN_3 +200 0x908F //RX_FDEQ_GAIN_4 +201 0x9495 //RX_FDEQ_GAIN_5 +202 0x989D //RX_FDEQ_GAIN_6 +203 0x9DA6 //RX_FDEQ_GAIN_7 +204 0xA895 //RX_FDEQ_GAIN_8 +205 0x8A8A //RX_FDEQ_GAIN_9 +206 0x8E78 //RX_FDEQ_GAIN_10 +207 0x7070 //RX_FDEQ_GAIN_11 +208 0x7680 //RX_FDEQ_GAIN_12 +209 0x787C //RX_FDEQ_GAIN_13 +210 0x8890 //RX_FDEQ_GAIN_14 +211 0x9CAC //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0202 //RX_FDEQ_BIN_0 +221 0x0202 //RX_FDEQ_BIN_1 +222 0x0302 //RX_FDEQ_BIN_2 +223 0x0304 //RX_FDEQ_BIN_3 +224 0x0405 //RX_FDEQ_BIN_4 +225 0x0506 //RX_FDEQ_BIN_5 +226 0x0708 //RX_FDEQ_BIN_6 +227 0x090A //RX_FDEQ_BIN_7 +228 0x0B0C //RX_FDEQ_BIN_8 +229 0x0D0E //RX_FDEQ_BIN_9 +230 0x1013 //RX_FDEQ_BIN_10 +231 0x1719 //RX_FDEQ_BIN_11 +232 0x1B1E //RX_FDEQ_BIN_12 +233 0x1E1E //RX_FDEQ_BIN_13 +234 0x1E28 //RX_FDEQ_BIN_14 +235 0x282C //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x4000 //RX_FDEQ_RESRV_0 +245 0x0320 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0030 //RX_FDDRC_BAND_MARGIN_1 +248 0x0050 //RX_FDDRC_BAND_MARGIN_2 +249 0x0080 //RX_FDDRC_BAND_MARGIN_3 +250 0x0007 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x5000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x6400 //RX_FDDRC_THRD_3_2 +258 0x6400 //RX_FDDRC_THRD_3_3 +259 0x2000 //RX_FDDRC_SLANT_0_0 +260 0x2000 //RX_FDDRC_SLANT_0_1 +261 0x2000 //RX_FDDRC_SLANT_0_2 +262 0x2000 //RX_FDDRC_SLANT_0_3 +263 0x5333 //RX_FDDRC_SLANT_1_0 +264 0x5333 //RX_FDDRC_SLANT_1_1 +265 0x5333 //RX_FDDRC_SLANT_1_2 +266 0x5333 //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +286 0x0100 //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 #CASE_NAME HANDSET-HANDSET_HAC-TMOBILE_US-NB -#PARAM_TYPE TX+RX -#TOTAL_CUSTOM_STEP 7 +#PARAM_MODE Full +#PARAM_TYPE TX+2RX +#TOTAL_CUSTOM_STEP 7+7 #TX 0 0x0000 //TX_OPERATION_MODE_0 1 0x0000 //TX_OPERATION_MODE_1 -2 0x0036 //TX_PATCH_REG +2 0x0076 //TX_PATCH_REG 3 0x6F7E //TX_SENDFUNC_MODE_0 4 0x0001 //TX_SENDFUNC_MODE_1 5 0x0002 //TX_NUM_MIC @@ -26323,7 +40079,7 @@ 18 0x0000 //TX_SYS_RESRV_2 19 0x0000 //TX_SYS_RESRV_3 20 0x0000 //TX_DIST2REF0 -21 0x009D //TX_DIST2REF1 +21 0x009C //TX_DIST2REF1 22 0x0000 //TX_DIST2REF_02 23 0x0000 //TX_DIST2REF_03 24 0x0000 //TX_DIST2REF_04 @@ -26553,19 +40309,19 @@ 248 0xF800 //TX_THR_SN_EST_6 249 0xF700 //TX_THR_SN_EST_7 250 0x0000 //TX_DELTA_THR_SN_EST_0 -251 0x01A0 //TX_DELTA_THR_SN_EST_1 -252 0x0100 //TX_DELTA_THR_SN_EST_2 -253 0x0200 //TX_DELTA_THR_SN_EST_3 -254 0x01A0 //TX_DELTA_THR_SN_EST_4 -255 0x0100 //TX_DELTA_THR_SN_EST_5 -256 0x0000 //TX_DELTA_THR_SN_EST_6 +251 0x0100 //TX_DELTA_THR_SN_EST_1 +252 0x0200 //TX_DELTA_THR_SN_EST_2 +253 0x01A0 //TX_DELTA_THR_SN_EST_3 +254 0x0100 //TX_DELTA_THR_SN_EST_4 +255 0x0000 //TX_DELTA_THR_SN_EST_5 +256 0x01A0 //TX_DELTA_THR_SN_EST_6 257 0x0200 //TX_DELTA_THR_SN_EST_7 258 0x4000 //TX_LAMBDA_NN_EST_0 -259 0x4000 //TX_LAMBDA_NN_EST_1 -260 0x3000 //TX_LAMBDA_NN_EST_2 -261 0x4000 //TX_LAMBDA_NN_EST_3 +259 0x3000 //TX_LAMBDA_NN_EST_1 +260 0x4000 //TX_LAMBDA_NN_EST_2 +261 0x3000 //TX_LAMBDA_NN_EST_3 262 0x3000 //TX_LAMBDA_NN_EST_4 -263 0x3000 //TX_LAMBDA_NN_EST_5 +263 0x4000 //TX_LAMBDA_NN_EST_5 264 0x4000 //TX_LAMBDA_NN_EST_6 265 0x4000 //TX_LAMBDA_NN_EST_7 266 0x0400 //TX_N_SN_EST @@ -26584,20 +40340,20 @@ 279 0x4000 //TX_B_POST_FLT_0 280 0x4000 //TX_B_POST_FLT_1 281 0x0014 //TX_NS_LVL_CTRL_0 -282 0x001B //TX_NS_LVL_CTRL_1 -283 0x0019 //TX_NS_LVL_CTRL_2 +282 0x0019 //TX_NS_LVL_CTRL_1 +283 0x0017 //TX_NS_LVL_CTRL_2 284 0x0017 //TX_NS_LVL_CTRL_3 -285 0x0017 //TX_NS_LVL_CTRL_4 -286 0x0019 //TX_NS_LVL_CTRL_5 -287 0x0014 //TX_NS_LVL_CTRL_6 +285 0x0019 //TX_NS_LVL_CTRL_4 +286 0x0014 //TX_NS_LVL_CTRL_5 +287 0x001B //TX_NS_LVL_CTRL_6 288 0x0010 //TX_NS_LVL_CTRL_7 289 0x0010 //TX_MIN_GAIN_S_0 290 0x000C //TX_MIN_GAIN_S_1 -291 0x000C //TX_MIN_GAIN_S_2 +291 0x0010 //TX_MIN_GAIN_S_2 292 0x0010 //TX_MIN_GAIN_S_3 -293 0x0010 //TX_MIN_GAIN_S_4 -294 0x000C //TX_MIN_GAIN_S_5 -295 0x0014 //TX_MIN_GAIN_S_6 +293 0x000C //TX_MIN_GAIN_S_4 +294 0x0014 //TX_MIN_GAIN_S_5 +295 0x000C //TX_MIN_GAIN_S_6 296 0x0014 //TX_MIN_GAIN_S_7 297 0x5000 //TX_NMOS_SUP 298 0x0000 //TX_NS_MAX_PRI_SNR_TH @@ -26607,8 +40363,8 @@ 302 0x4000 //TX_SNRI_SUP_2 303 0x4000 //TX_SNRI_SUP_3 304 0x4000 //TX_SNRI_SUP_4 -305 0x4000 //TX_SNRI_SUP_5 -306 0x7FFF //TX_SNRI_SUP_6 +305 0x7FFF //TX_SNRI_SUP_5 +306 0x4000 //TX_SNRI_SUP_6 307 0x3000 //TX_SNRI_SUP_7 308 0x3000 //TX_THR_LFNS 309 0x001A //TX_G_LFNS @@ -26617,36 +40373,36 @@ 312 0x7FFF //TX_A_POST_FILT_0 313 0x2000 //TX_A_POST_FILT_1 314 0x2000 //TX_A_POST_FILT_S_0 -315 0x7000 //TX_A_POST_FILT_S_1 -316 0x6000 //TX_A_POST_FILT_S_2 -317 0x5000 //TX_A_POST_FILT_S_3 -318 0x2000 //TX_A_POST_FILT_S_4 -319 0x6000 //TX_A_POST_FILT_S_5 -320 0x2000 //TX_A_POST_FILT_S_6 +315 0x6000 //TX_A_POST_FILT_S_1 +316 0x5000 //TX_A_POST_FILT_S_2 +317 0x2000 //TX_A_POST_FILT_S_3 +318 0x6000 //TX_A_POST_FILT_S_4 +319 0x2000 //TX_A_POST_FILT_S_5 +320 0x7000 //TX_A_POST_FILT_S_6 321 0x7000 //TX_A_POST_FILT_S_7 322 0x4000 //TX_B_POST_FILT_0 323 0x4000 //TX_B_POST_FILT_1 -324 0x7FFF //TX_B_POST_FILT_2 -325 0x5000 //TX_B_POST_FILT_3 -326 0x7FFF //TX_B_POST_FILT_4 -327 0x7FFF //TX_B_POST_FILT_5 +324 0x5000 //TX_B_POST_FILT_2 +325 0x4000 //TX_B_POST_FILT_3 +326 0x4000 //TX_B_POST_FILT_4 +327 0x4000 //TX_B_POST_FILT_5 328 0x4000 //TX_B_POST_FILT_6 329 0x2000 //TX_B_POST_FILT_7 330 0x7FFF //TX_B_LESSCUT_RTO_S_0 -331 0x7FFF //TX_B_LESSCUT_RTO_S_1 -332 0x7FFF //TX_B_LESSCUT_RTO_S_2 -333 0x7FFF //TX_B_LESSCUT_RTO_S_3 -334 0x7FFF //TX_B_LESSCUT_RTO_S_4 -335 0x7FFF //TX_B_LESSCUT_RTO_S_5 -336 0x7FFF //TX_B_LESSCUT_RTO_S_6 -337 0x7FFF //TX_B_LESSCUT_RTO_S_7 +331 0x1000 //TX_B_LESSCUT_RTO_S_1 +332 0x1000 //TX_B_LESSCUT_RTO_S_2 +333 0x1000 //TX_B_LESSCUT_RTO_S_3 +334 0x1000 //TX_B_LESSCUT_RTO_S_4 +335 0x1000 //TX_B_LESSCUT_RTO_S_5 +336 0x1000 //TX_B_LESSCUT_RTO_S_6 +337 0x1000 //TX_B_LESSCUT_RTO_S_7 338 0x7E14 //TX_LAMBDA_PFILT 339 0x7C29 //TX_LAMBDA_PFILT_S_0 -340 0x7C29 //TX_LAMBDA_PFILT_S_1 -341 0x7200 //TX_LAMBDA_PFILT_S_2 -342 0x7900 //TX_LAMBDA_PFILT_S_3 -343 0x7400 //TX_LAMBDA_PFILT_S_4 -344 0x7200 //TX_LAMBDA_PFILT_S_5 +340 0x7200 //TX_LAMBDA_PFILT_S_1 +341 0x7900 //TX_LAMBDA_PFILT_S_2 +342 0x7400 //TX_LAMBDA_PFILT_S_3 +343 0x7200 //TX_LAMBDA_PFILT_S_4 +344 0x7C29 //TX_LAMBDA_PFILT_S_5 345 0x7C29 //TX_LAMBDA_PFILT_S_6 346 0x7C29 //TX_LAMBDA_PFILT_S_7 347 0x0200 //TX_K_PEPPER @@ -26682,10 +40438,10 @@ 377 0x0000 //TX_NOISE_TH_5_4 378 0x07D0 //TX_NOISE_TH_6 379 0x0004 //TX_MINENOISE_TH -380 0x4000 //TX_MINENOISE_MIC0_TH_MTS -381 0xFFEE //TX_MINENOISE_MIC0_TH_EXP -382 0x6000 //TX_MINENOISE_MIC0_S_TH_MTS -383 0xFFF3 //TX_MINENOISE_MIC0_S_TH_EXP +380 0xD508 //TX_MORENS_TFMASK_TH +381 0x0001 //TX_DRC_QUIET_FLOOR +382 0x6D60 //TX_RATIODTL_CUT_TH +383 0x0DAC //TX_DT_CUT_K1 384 0x00A5 //TX_OUT_ENER_S_TH_CLEAN 385 0x00A5 //TX_OUT_ENER_S_TH_LESSCLEAN 386 0x00A5 //TX_OUT_ENER_S_TH_NOISY @@ -26693,15 +40449,15 @@ 388 0x00CE //TX_OUT_ENER_TH_SPEECH 389 0x2000 //TX_SN_NPB_GAIN 390 0x0000 //TX_NN_NPB_GAIN -391 0x0000 //TX_CSX_ALPHA_0 -392 0x0000 //TX_CSX_ALPHA_1 -393 0x0000 //TX_CSX_ALPHA_2 -394 0x0000 //TX_CSX_ALPHA_3 -395 0x0800 //TX_MU_ARSP_EST -396 0x00C8 //TX_P_OUTBEAM_MIN_TH +391 0x3000 //TX_POST_MASK_SUP_HSNE +392 0x07D0 //TX_TAIL_DET_TH +393 0x4000 //TX_B_LESSCUT_RTO_WTA +394 0x0000 //TX_MEL_G_R +395 0x0080 //TX_SUPHIGH_TH +396 0x0000 //TX_MASK_G_R 397 0x0002 //TX_EXTRA_NS_L -398 0x0800 //TX_EXTRA_NS_A -399 0x0005 //TX_VR_NOISE_FLOOR_TH +398 0x1800 //TX_C_POST_FLT_MASK +399 0x7FFF //TX_A_POST_FLT_WNS 400 0x0148 //TX_MIN_G_LOW300HZ 401 0x0001 //TX_MAXLEVEL_CNG 402 0x00B4 //TX_STN_NOISE_TH @@ -26816,16 +40572,16 @@ 511 0x6666 //TX_MIC_TO_BFGAIN 512 0x0000 //TX_MICTOBFGAIN0 513 0x0000 //TX_FASTMUE_TH -514 0x0000 //TX_DERVB_LEN_0 -515 0x0000 //TX_DERVB_LEN_1 -516 0x0000 //TX_RHO_DERVB -517 0x0000 //TX_MIC_INDX_DERVB -518 0x0000 //TX_MU_DERVB -519 0x0000 //TX_DR_RESRV_0 -520 0x0000 //TX_DR_RESRV_1 -521 0x0000 //TX_DR_RESRV_2 -522 0x0000 //TX_DR_RESRV_3 -523 0x0000 //TX_DR_RESRV_4 +514 0x3000 //TX_DEREVERB_LF_MU +515 0x34CD //TX_DEREVERB_HF_MU +516 0x0007 //TX_DEREVERB_DELAY +517 0x0004 //TX_DEREVERB_COEF_LEN +518 0x0003 //TX_DEREVERB_DNR +519 0x0000 //TX_DEREVERB_ALPHA +520 0x0000 //TX_DEREVERB_BETA +521 0x3A98 //TX_GSC_RTOL_TH +522 0x3A98 //TX_GSC_RTOH_TH +523 0x7E2C //TX_WIDE2_MEANHTH 524 0x0000 //TX_DR_RESRV_5 525 0x0000 //TX_DR_RESRV_6 526 0x0000 //TX_DR_RESRV_7 @@ -26873,11 +40629,11 @@ 568 0x584F //TX_FDEQ_GAIN_1 569 0x4F4E //TX_FDEQ_GAIN_2 570 0x474A //TX_FDEQ_GAIN_3 -571 0x473F //TX_FDEQ_GAIN_4 -572 0x403B //TX_FDEQ_GAIN_5 -573 0x3933 //TX_FDEQ_GAIN_6 -574 0x302B //TX_FDEQ_GAIN_7 -575 0x2220 //TX_FDEQ_GAIN_8 +571 0x4737 //TX_FDEQ_GAIN_4 +572 0x3A40 //TX_FDEQ_GAIN_5 +573 0x4040 //TX_FDEQ_GAIN_6 +574 0x3631 //TX_FDEQ_GAIN_7 +575 0x2020 //TX_FDEQ_GAIN_8 576 0x383C //TX_FDEQ_GAIN_9 577 0x4848 //TX_FDEQ_GAIN_10 578 0x4848 //TX_FDEQ_GAIN_11 @@ -26902,7 +40658,7 @@ 597 0x0808 //TX_FDEQ_BIN_6 598 0x050E //TX_FDEQ_BIN_7 599 0x0B0C //TX_FDEQ_BIN_8 -600 0x0F0F //TX_FDEQ_BIN_9 +600 0x0F09 //TX_FDEQ_BIN_9 601 0x0000 //TX_FDEQ_BIN_10 602 0x0000 //TX_FDEQ_BIN_11 603 0x0000 //TX_FDEQ_BIN_12 @@ -26926,9 +40682,9 @@ 621 0x4848 //TX_PREEQ_GAIN_MIC0_4 622 0x4848 //TX_PREEQ_GAIN_MIC0_5 623 0x4848 //TX_PREEQ_GAIN_MIC0_6 -624 0x4846 //TX_PREEQ_GAIN_MIC0_7 -625 0x4544 //TX_PREEQ_GAIN_MIC0_8 -626 0x4241 //TX_PREEQ_GAIN_MIC0_9 +624 0x4848 //TX_PREEQ_GAIN_MIC0_7 +625 0x4848 //TX_PREEQ_GAIN_MIC0_8 +626 0x4848 //TX_PREEQ_GAIN_MIC0_9 627 0x4848 //TX_PREEQ_GAIN_MIC0_10 628 0x4848 //TX_PREEQ_GAIN_MIC0_11 629 0x4848 //TX_PREEQ_GAIN_MIC0_12 @@ -26976,8 +40732,8 @@ 671 0x4848 //TX_PREEQ_GAIN_MIC1_5 672 0x4848 //TX_PREEQ_GAIN_MIC1_6 673 0x4848 //TX_PREEQ_GAIN_MIC1_7 -674 0x4A4C //TX_PREEQ_GAIN_MIC1_8 -675 0x4E50 //TX_PREEQ_GAIN_MIC1_9 +674 0x4849 //TX_PREEQ_GAIN_MIC1_8 +675 0x4A4B //TX_PREEQ_GAIN_MIC1_9 676 0x4848 //TX_PREEQ_GAIN_MIC1_10 677 0x4848 //TX_PREEQ_GAIN_MIC1_11 678 0x4848 //TX_PREEQ_GAIN_MIC1_12 @@ -26992,7 +40748,7 @@ 687 0x4848 //TX_PREEQ_GAIN_MIC1_21 688 0x4848 //TX_PREEQ_GAIN_MIC1_22 689 0x4848 //TX_PREEQ_GAIN_MIC1_23 -690 0x0203 //TX_PREEQ_BIN_MIC1_0 +690 0x0202 //TX_PREEQ_BIN_MIC1_0 691 0x0203 //TX_PREEQ_BIN_MIC1_1 692 0x0303 //TX_PREEQ_BIN_MIC1_2 693 0x0304 //TX_PREEQ_BIN_MIC1_3 @@ -27078,7 +40834,7 @@ 773 0x0000 //TX_GAIN_LIMIT_0 774 0x0000 //TX_GAIN_LIMIT_1 775 0x0006 //TX_GAIN_LIMIT_2 -776 0x0006 //TX_GAIN_LIMIT_3 +776 0x0007 //TX_GAIN_LIMIT_3 777 0x7F5B //TX_BVE_NOVAD0_ALPHADOWN 778 0x7FDE //TX_BVE_VAD0_ALPHAUP 779 0x7F3A //TX_BVE_VAD0_ALPHADOWN @@ -27168,7 +40924,7 @@ 863 0x199A //TX_TDDRC_HMNC_GAIN 864 0x0000 //TX_TDDRC_SMT_FLAG 865 0x0CCD //TX_TDDRC_SMT_W -866 0x05A0 //TX_TDDRC_DRC_GAIN +866 0x0504 //TX_TDDRC_DRC_GAIN 867 0x7FFF //TX_TDDRC_LMT_THRD 868 0x0000 //TX_TDDRC_LMT_ALPHA 869 0x0000 //TX_TFMASKLTH @@ -27199,6 +40955,71 @@ 894 0xC000 //TX_FASTNS_SSA_THHFL 895 0xCCCC //TX_FASTNS_SSA_THLFH 896 0xD999 //TX_FASTNS_SSA_THHFH +897 0x2339 //TX_SENDFUNC_REG_MICMUTE +898 0x0021 //TX_SENDFUNC_REG_MICMUTE1 +899 0x02BC //TX_MICMUTE_RATIO_THR +900 0x0140 //TX_MICMUTE_AMP_THR +901 0x0004 //TX_MICMUTE_HPF_IND +902 0x00C0 //TX_MICMUTE_LOG_EYR_TH +903 0x0008 //TX_MICMUTE_CVG_TIME +904 0x0008 //TX_MICMUTE_RELEASE_TIME +905 0x01FE //TX_MIC_VOLUME_MIC0MUTE +906 0x0020 //TX_MICMUTE_EPD_OFFSET_0 +907 0x001E //TX_MICMUTE_FRQ_AEC_L +908 0x7999 //TX_MICMUTE_EAD_THR +909 0x7FFF //TX_MICMUTE_LAMBDA_CB_NLE +910 0x7FFF //TX_MICMUTE_LAMBDA_RE_EST +911 0x4000 //TX_DTD_THR1_MICMUTE_0 +912 0x7000 //TX_DTD_THR1_MICMUTE_1 +913 0x7FFF //TX_DTD_THR1_MICMUTE_2 +914 0x7FFF //TX_DTD_THR1_MICMUTE_3 +915 0x6CCC //TX_DTD_THR2_MICMUTE_0 +916 0x0400 //TX_MICMUTE_MIN_EQ_RE_EST_0 +917 0x0400 //TX_MICMUTE_MIN_EQ_RE_EST_1 +918 0x1000 //TX_MICMUTE_MIN_EQ_RE_EST_2 +919 0x7FFF //TX_MICMUTE_MIN_EQ_RE_EST_3 +920 0x7FFF //TX_MICMUTE_MIN_EQ_RE_EST_4 +921 0x4000 //TX_MICMUTE_C_POST_FLT +922 0x03E8 //TX_MICMUTE_DT_CUT_K +923 0x0001 //TX_MICMUTE_DT_CUT_THR +924 0x03E8 //TX_MICMUTE_DT_CUT_K2 +925 0x0001 //TX_MICMUTE_DT_CUT_THR2 +926 0x0064 //TX_MICMUTE_DT2_HOLD_N +927 0x1000 //TX_MICMUTE_RATIODTH_THCUT +928 0x1000 //TX_MICMUTE_B_POST_FLT_ECHOL +929 0x7FFF //TX_MICMUTE_B_POST_FLT_ECHOH +930 0x0400 //TX_MICMUTE_C_POST_FLT_MASK +931 0x7999 //TX_MICMUTE_RATIODTL_CUT_TH +932 0x0258 //TX_MICMUTE_DT_CUT_K1 +933 0x0800 //TX_MICMUTE_N2_SN_EST +934 0xFC00 //TX_MICMUTE_THR_SN_EST_0 +935 0x001C //TX_MICMUTE_MIN_G_CTRL_0 +936 0x6000 //TX_MICMUTE_A_POST_FILT_S_0 +937 0x7000 //TX_MICMUTE_B_POST_FILT_0 +938 0x2710 //TX_MIC1RUB_AMP_THR +939 0x0010 //TX_MIC1MUTE_RATIO_THR +940 0x0450 //TX_MIC1MUTE_AMP_THR +941 0x0008 //TX_MIC1MUTE_CVG_TIME +942 0x0008 //TX_MIC1MUTE_RELEASE_TIME +943 0x0000 //TX_AMS_RESRV_01 +944 0x0000 //TX_AMS_RESRV_02 +945 0x0000 //TX_AMS_RESRV_03 +946 0x0000 //TX_AMS_RESRV_04 +947 0x0000 //TX_AMS_RESRV_05 +948 0x0000 //TX_AMS_RESRV_06 +949 0x0000 //TX_AMS_RESRV_07 +950 0x0000 //TX_AMS_RESRV_08 +951 0x0000 //TX_AMS_RESRV_09 +952 0x0000 //TX_AMS_RESRV_10 +953 0x0000 //TX_AMS_RESRV_11 +954 0x0000 //TX_AMS_RESRV_12 +955 0x0000 //TX_AMS_RESRV_13 +956 0x0000 //TX_AMS_RESRV_14 +957 0x0000 //TX_AMS_RESRV_15 +958 0x0000 //TX_AMS_RESRV_16 +959 0x0000 //TX_AMS_RESRV_17 +960 0x0000 //TX_AMS_RESRV_18 +961 0x0000 //TX_AMS_RESRV_19 #RX 0 0x000C //RX_RECVFUNC_MODE_0 1 0x0000 //RX_RECVFUNC_MODE_1 @@ -28050,10 +41871,862 @@ 110 0x0000 //RX_FDDRC_RESRV_0 129 0x0100 //RX_SPK_VOL 130 0x0000 //RX_VOL_RESRV_0 +#RX 2 +157 0x000C //RX_RECVFUNC_MODE_0 +158 0x0000 //RX_RECVFUNC_MODE_1 +159 0x0000 //RX_SAMPLINGFREQ_SIG +160 0x0000 //RX_SAMPLINGFREQ_PROC +161 0x000A //RX_FRAME_SZ +162 0x0000 //RX_DELAY_OPT +163 0x1000 //RX_TDDRC_ALPHA_UP_1 +164 0x1000 //RX_TDDRC_ALPHA_UP_2 +165 0x1000 //RX_TDDRC_ALPHA_UP_3 +166 0x1000 //RX_TDDRC_ALPHA_UP_4 +167 0x0800 //RX_PGA +168 0x7FFF //RX_A_HP +169 0x4000 //RX_B_PE +170 0x7800 //RX_THR_PITCH_DET_0 +171 0x7000 //RX_THR_PITCH_DET_1 +172 0x6000 //RX_THR_PITCH_DET_2 +173 0x0008 //RX_PITCH_BFR_LEN +174 0x0003 //RX_SBD_PITCH_DET +175 0x0100 //RX_PP_RESRV_0 +176 0x0020 //RX_PP_RESRV_1 +177 0x0400 //RX_N_SN_EST +178 0x000C //RX_N2_SN_EST +179 0x0014 //RX_NS_LVL_CTRL +180 0xF800 //RX_THR_SN_EST +181 0x7E00 //RX_LAMBDA_PFILT +182 0x000A //RX_FENS_RESRV_0 +183 0x0190 //RX_FENS_RESRV_1 +184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +187 0x0002 //RX_EXTRA_NS_L +188 0x0800 //RX_EXTRA_NS_A +189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +190 0x7000 //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +192 0x199A //RX_A_POST_FLT +193 0x0000 //RX_LMT_THRD +194 0x4000 //RX_LMT_ALPHA +195 0x0030 //RX_FDEQ_SUBNUM +196 0x4848 //RX_FDEQ_GAIN_0 +197 0x4848 //RX_FDEQ_GAIN_1 +198 0x4844 //RX_FDEQ_GAIN_2 +199 0x4A4C //RX_FDEQ_GAIN_3 +200 0x4E50 //RX_FDEQ_GAIN_4 +201 0x5254 //RX_FDEQ_GAIN_5 +202 0x5658 //RX_FDEQ_GAIN_6 +203 0x5A5C //RX_FDEQ_GAIN_7 +204 0x5C5C //RX_FDEQ_GAIN_8 +205 0x5C5C //RX_FDEQ_GAIN_9 +206 0x5C5C //RX_FDEQ_GAIN_10 +207 0x5C48 //RX_FDEQ_GAIN_11 +208 0x4848 //RX_FDEQ_GAIN_12 +209 0x4848 //RX_FDEQ_GAIN_13 +210 0x4848 //RX_FDEQ_GAIN_14 +211 0x4848 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0202 //RX_FDEQ_BIN_0 +221 0x0203 //RX_FDEQ_BIN_1 +222 0x0402 //RX_FDEQ_BIN_2 +223 0x0303 //RX_FDEQ_BIN_3 +224 0x0303 //RX_FDEQ_BIN_4 +225 0x0303 //RX_FDEQ_BIN_5 +226 0x0303 //RX_FDEQ_BIN_6 +227 0x0303 //RX_FDEQ_BIN_7 +228 0x0A0A //RX_FDEQ_BIN_8 +229 0x0A0E //RX_FDEQ_BIN_9 +230 0x0000 //RX_FDEQ_BIN_10 +231 0x0000 //RX_FDEQ_BIN_11 +232 0x0000 //RX_FDEQ_BIN_12 +233 0x0000 //RX_FDEQ_BIN_13 +234 0x0000 //RX_FDEQ_BIN_14 +235 0x0000 //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x4000 //RX_FDEQ_RESRV_0 +245 0x0320 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0030 //RX_FDDRC_BAND_MARGIN_1 +248 0x0050 //RX_FDDRC_BAND_MARGIN_2 +249 0x0080 //RX_FDDRC_BAND_MARGIN_3 +250 0x0007 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x5000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x6400 //RX_FDDRC_THRD_3_2 +258 0x6400 //RX_FDDRC_THRD_3_3 +259 0x2000 //RX_FDDRC_SLANT_0_0 +260 0x2000 //RX_FDDRC_SLANT_0_1 +261 0x2000 //RX_FDDRC_SLANT_0_2 +262 0x2000 //RX_FDDRC_SLANT_0_3 +263 0x5333 //RX_FDDRC_SLANT_1_0 +264 0x5333 //RX_FDDRC_SLANT_1_1 +265 0x5333 //RX_FDDRC_SLANT_1_2 +266 0x5333 //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +268 0x0002 //RX_FILTINDX +269 0x0000 //RX_TDDRC_THRD_0 +270 0x0000 //RX_TDDRC_THRD_1 +271 0x1800 //RX_TDDRC_THRD_2 +272 0x1800 //RX_TDDRC_THRD_3 +273 0x3000 //RX_TDDRC_SLANT_0 +274 0x6E00 //RX_TDDRC_SLANT_1 +275 0x1000 //RX_TDDRC_ALPHA_UP_0 +276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x199A //RX_TDDRC_HMNC_GAIN +279 0x0001 //RX_TDDRC_SMT_FLAG +280 0x0CCD //RX_TDDRC_SMT_W +281 0x0360 //RX_TDDRC_DRC_GAIN +282 0x7C00 //RX_LAMBDA_PKA_FP +283 0x2000 //RX_TPKA_FP +284 0x2000 //RX_MIN_G_FP +285 0x0080 //RX_MAX_G_FP +286 0x0100 //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 +288 0x0000 //RX_MAXLEVEL_CNG +289 0x3000 //RX_BWE_UV_TH +290 0x3000 //RX_BWE_UV_TH2 +291 0x1800 //RX_BWE_UV_TH3 +292 0x1000 //RX_BWE_V_TH +293 0x04CD //RX_BWE_GAIN1_V_TH1 +294 0x0F33 //RX_BWE_GAIN1_V_TH2 +295 0x7333 //RX_BWE_UV_EQ +296 0x199A //RX_BWE_V_EQ +297 0x7333 //RX_BWE_TONE_TH +298 0x0004 //RX_BWE_UV_HOLD_T +299 0x6CCD //RX_BWE_GAIN2_ALPHA +300 0x799A //RX_BWE_GAIN3_ALPHA +301 0x001E //RX_BWE_CUTOFF +302 0x3000 //RX_BWE_GAINFILL +303 0x3200 //RX_BWE_MAXTH_TONE +304 0x2000 //RX_BWE_EQ_0 +305 0x2000 //RX_BWE_EQ_1 +306 0x2000 //RX_BWE_EQ_2 +307 0x2000 //RX_BWE_EQ_3 +308 0x2000 //RX_BWE_EQ_4 +309 0x2000 //RX_BWE_EQ_5 +310 0x2000 //RX_BWE_EQ_6 +311 0x0000 //RX_BWE_RESRV_0 +312 0x0000 //RX_BWE_RESRV_1 +313 0x0000 //RX_BWE_RESRV_2 +#VOL 0 +163 0x1000 //RX_TDDRC_ALPHA_UP_1 +164 0x1000 //RX_TDDRC_ALPHA_UP_2 +165 0x1000 //RX_TDDRC_ALPHA_UP_3 +166 0x1000 //RX_TDDRC_ALPHA_UP_4 +184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +190 0x7000 //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +269 0x0000 //RX_TDDRC_THRD_0 +270 0x0000 //RX_TDDRC_THRD_1 +271 0x1800 //RX_TDDRC_THRD_2 +272 0x1800 //RX_TDDRC_THRD_3 +273 0x3000 //RX_TDDRC_SLANT_0 +274 0x6E00 //RX_TDDRC_SLANT_1 +275 0x1000 //RX_TDDRC_ALPHA_UP_0 +276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x199A //RX_TDDRC_HMNC_GAIN +279 0x0001 //RX_TDDRC_SMT_FLAG +280 0x0CCD //RX_TDDRC_SMT_W +281 0x0360 //RX_TDDRC_DRC_GAIN +195 0x0030 //RX_FDEQ_SUBNUM +196 0x4848 //RX_FDEQ_GAIN_0 +197 0x4848 //RX_FDEQ_GAIN_1 +198 0x4844 //RX_FDEQ_GAIN_2 +199 0x4A4C //RX_FDEQ_GAIN_3 +200 0x4E50 //RX_FDEQ_GAIN_4 +201 0x5254 //RX_FDEQ_GAIN_5 +202 0x5658 //RX_FDEQ_GAIN_6 +203 0x5A5C //RX_FDEQ_GAIN_7 +204 0x5C5C //RX_FDEQ_GAIN_8 +205 0x5C5C //RX_FDEQ_GAIN_9 +206 0x5C5C //RX_FDEQ_GAIN_10 +207 0x5C48 //RX_FDEQ_GAIN_11 +208 0x4848 //RX_FDEQ_GAIN_12 +209 0x4848 //RX_FDEQ_GAIN_13 +210 0x4848 //RX_FDEQ_GAIN_14 +211 0x4848 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0202 //RX_FDEQ_BIN_0 +221 0x0203 //RX_FDEQ_BIN_1 +222 0x0402 //RX_FDEQ_BIN_2 +223 0x0303 //RX_FDEQ_BIN_3 +224 0x0303 //RX_FDEQ_BIN_4 +225 0x0303 //RX_FDEQ_BIN_5 +226 0x0303 //RX_FDEQ_BIN_6 +227 0x0303 //RX_FDEQ_BIN_7 +228 0x0A0A //RX_FDEQ_BIN_8 +229 0x0A0E //RX_FDEQ_BIN_9 +230 0x0000 //RX_FDEQ_BIN_10 +231 0x0000 //RX_FDEQ_BIN_11 +232 0x0000 //RX_FDEQ_BIN_12 +233 0x0000 //RX_FDEQ_BIN_13 +234 0x0000 //RX_FDEQ_BIN_14 +235 0x0000 //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x4000 //RX_FDEQ_RESRV_0 +245 0x0320 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0030 //RX_FDDRC_BAND_MARGIN_1 +248 0x0050 //RX_FDDRC_BAND_MARGIN_2 +249 0x0080 //RX_FDDRC_BAND_MARGIN_3 +250 0x0007 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x5000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x6400 //RX_FDDRC_THRD_3_2 +258 0x6400 //RX_FDDRC_THRD_3_3 +259 0x2000 //RX_FDDRC_SLANT_0_0 +260 0x2000 //RX_FDDRC_SLANT_0_1 +261 0x2000 //RX_FDDRC_SLANT_0_2 +262 0x2000 //RX_FDDRC_SLANT_0_3 +263 0x5333 //RX_FDDRC_SLANT_1_0 +264 0x5333 //RX_FDDRC_SLANT_1_1 +265 0x5333 //RX_FDDRC_SLANT_1_2 +266 0x5333 //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +286 0x0100 //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 +#VOL 1 +163 0x1000 //RX_TDDRC_ALPHA_UP_1 +164 0x1000 //RX_TDDRC_ALPHA_UP_2 +165 0x1000 //RX_TDDRC_ALPHA_UP_3 +166 0x1000 //RX_TDDRC_ALPHA_UP_4 +184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +190 0x7000 //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +269 0x0000 //RX_TDDRC_THRD_0 +270 0x0000 //RX_TDDRC_THRD_1 +271 0x1800 //RX_TDDRC_THRD_2 +272 0x1800 //RX_TDDRC_THRD_3 +273 0x3000 //RX_TDDRC_SLANT_0 +274 0x6E00 //RX_TDDRC_SLANT_1 +275 0x1000 //RX_TDDRC_ALPHA_UP_0 +276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x199A //RX_TDDRC_HMNC_GAIN +279 0x0001 //RX_TDDRC_SMT_FLAG +280 0x0CCD //RX_TDDRC_SMT_W +281 0x0360 //RX_TDDRC_DRC_GAIN +195 0x0030 //RX_FDEQ_SUBNUM +196 0x4848 //RX_FDEQ_GAIN_0 +197 0x4848 //RX_FDEQ_GAIN_1 +198 0x4844 //RX_FDEQ_GAIN_2 +199 0x4A4C //RX_FDEQ_GAIN_3 +200 0x4E50 //RX_FDEQ_GAIN_4 +201 0x5254 //RX_FDEQ_GAIN_5 +202 0x5658 //RX_FDEQ_GAIN_6 +203 0x5A5C //RX_FDEQ_GAIN_7 +204 0x5C5C //RX_FDEQ_GAIN_8 +205 0x5C5C //RX_FDEQ_GAIN_9 +206 0x5C5C //RX_FDEQ_GAIN_10 +207 0x5C48 //RX_FDEQ_GAIN_11 +208 0x4848 //RX_FDEQ_GAIN_12 +209 0x4848 //RX_FDEQ_GAIN_13 +210 0x4848 //RX_FDEQ_GAIN_14 +211 0x4848 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0202 //RX_FDEQ_BIN_0 +221 0x0203 //RX_FDEQ_BIN_1 +222 0x0402 //RX_FDEQ_BIN_2 +223 0x0303 //RX_FDEQ_BIN_3 +224 0x0303 //RX_FDEQ_BIN_4 +225 0x0303 //RX_FDEQ_BIN_5 +226 0x0303 //RX_FDEQ_BIN_6 +227 0x0303 //RX_FDEQ_BIN_7 +228 0x0A0A //RX_FDEQ_BIN_8 +229 0x0A0E //RX_FDEQ_BIN_9 +230 0x0000 //RX_FDEQ_BIN_10 +231 0x0000 //RX_FDEQ_BIN_11 +232 0x0000 //RX_FDEQ_BIN_12 +233 0x0000 //RX_FDEQ_BIN_13 +234 0x0000 //RX_FDEQ_BIN_14 +235 0x0000 //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x4000 //RX_FDEQ_RESRV_0 +245 0x0320 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0030 //RX_FDDRC_BAND_MARGIN_1 +248 0x0050 //RX_FDDRC_BAND_MARGIN_2 +249 0x0080 //RX_FDDRC_BAND_MARGIN_3 +250 0x0007 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x5000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x6400 //RX_FDDRC_THRD_3_2 +258 0x6400 //RX_FDDRC_THRD_3_3 +259 0x2000 //RX_FDDRC_SLANT_0_0 +260 0x2000 //RX_FDDRC_SLANT_0_1 +261 0x2000 //RX_FDDRC_SLANT_0_2 +262 0x2000 //RX_FDDRC_SLANT_0_3 +263 0x5333 //RX_FDDRC_SLANT_1_0 +264 0x5333 //RX_FDDRC_SLANT_1_1 +265 0x5333 //RX_FDDRC_SLANT_1_2 +266 0x5333 //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +286 0x0100 //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 +#VOL 2 +163 0x1000 //RX_TDDRC_ALPHA_UP_1 +164 0x1000 //RX_TDDRC_ALPHA_UP_2 +165 0x1000 //RX_TDDRC_ALPHA_UP_3 +166 0x1000 //RX_TDDRC_ALPHA_UP_4 +184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +190 0x7000 //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +269 0x0000 //RX_TDDRC_THRD_0 +270 0x0000 //RX_TDDRC_THRD_1 +271 0x1800 //RX_TDDRC_THRD_2 +272 0x1800 //RX_TDDRC_THRD_3 +273 0x3000 //RX_TDDRC_SLANT_0 +274 0x6E00 //RX_TDDRC_SLANT_1 +275 0x1000 //RX_TDDRC_ALPHA_UP_0 +276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x199A //RX_TDDRC_HMNC_GAIN +279 0x0001 //RX_TDDRC_SMT_FLAG +280 0x0CCD //RX_TDDRC_SMT_W +281 0x0360 //RX_TDDRC_DRC_GAIN +195 0x0030 //RX_FDEQ_SUBNUM +196 0x4848 //RX_FDEQ_GAIN_0 +197 0x4848 //RX_FDEQ_GAIN_1 +198 0x4844 //RX_FDEQ_GAIN_2 +199 0x4A4C //RX_FDEQ_GAIN_3 +200 0x4E50 //RX_FDEQ_GAIN_4 +201 0x5254 //RX_FDEQ_GAIN_5 +202 0x5658 //RX_FDEQ_GAIN_6 +203 0x5A5C //RX_FDEQ_GAIN_7 +204 0x5C5C //RX_FDEQ_GAIN_8 +205 0x5C5C //RX_FDEQ_GAIN_9 +206 0x5C5C //RX_FDEQ_GAIN_10 +207 0x5C48 //RX_FDEQ_GAIN_11 +208 0x4848 //RX_FDEQ_GAIN_12 +209 0x4848 //RX_FDEQ_GAIN_13 +210 0x4848 //RX_FDEQ_GAIN_14 +211 0x4848 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0202 //RX_FDEQ_BIN_0 +221 0x0203 //RX_FDEQ_BIN_1 +222 0x0402 //RX_FDEQ_BIN_2 +223 0x0303 //RX_FDEQ_BIN_3 +224 0x0303 //RX_FDEQ_BIN_4 +225 0x0303 //RX_FDEQ_BIN_5 +226 0x0303 //RX_FDEQ_BIN_6 +227 0x0303 //RX_FDEQ_BIN_7 +228 0x0A0A //RX_FDEQ_BIN_8 +229 0x0A0E //RX_FDEQ_BIN_9 +230 0x0000 //RX_FDEQ_BIN_10 +231 0x0000 //RX_FDEQ_BIN_11 +232 0x0000 //RX_FDEQ_BIN_12 +233 0x0000 //RX_FDEQ_BIN_13 +234 0x0000 //RX_FDEQ_BIN_14 +235 0x0000 //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x4000 //RX_FDEQ_RESRV_0 +245 0x0320 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0030 //RX_FDDRC_BAND_MARGIN_1 +248 0x0050 //RX_FDDRC_BAND_MARGIN_2 +249 0x0080 //RX_FDDRC_BAND_MARGIN_3 +250 0x0007 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x5000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x6400 //RX_FDDRC_THRD_3_2 +258 0x6400 //RX_FDDRC_THRD_3_3 +259 0x2000 //RX_FDDRC_SLANT_0_0 +260 0x2000 //RX_FDDRC_SLANT_0_1 +261 0x2000 //RX_FDDRC_SLANT_0_2 +262 0x2000 //RX_FDDRC_SLANT_0_3 +263 0x5333 //RX_FDDRC_SLANT_1_0 +264 0x5333 //RX_FDDRC_SLANT_1_1 +265 0x5333 //RX_FDDRC_SLANT_1_2 +266 0x5333 //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +286 0x0100 //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 +#VOL 3 +163 0x1000 //RX_TDDRC_ALPHA_UP_1 +164 0x1000 //RX_TDDRC_ALPHA_UP_2 +165 0x1000 //RX_TDDRC_ALPHA_UP_3 +166 0x1000 //RX_TDDRC_ALPHA_UP_4 +184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +190 0x7000 //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +269 0x0000 //RX_TDDRC_THRD_0 +270 0x0000 //RX_TDDRC_THRD_1 +271 0x1800 //RX_TDDRC_THRD_2 +272 0x1800 //RX_TDDRC_THRD_3 +273 0x3000 //RX_TDDRC_SLANT_0 +274 0x6E00 //RX_TDDRC_SLANT_1 +275 0x1000 //RX_TDDRC_ALPHA_UP_0 +276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x199A //RX_TDDRC_HMNC_GAIN +279 0x0001 //RX_TDDRC_SMT_FLAG +280 0x0CCD //RX_TDDRC_SMT_W +281 0x0360 //RX_TDDRC_DRC_GAIN +195 0x0030 //RX_FDEQ_SUBNUM +196 0x4848 //RX_FDEQ_GAIN_0 +197 0x4848 //RX_FDEQ_GAIN_1 +198 0x4844 //RX_FDEQ_GAIN_2 +199 0x4A4C //RX_FDEQ_GAIN_3 +200 0x4E50 //RX_FDEQ_GAIN_4 +201 0x5254 //RX_FDEQ_GAIN_5 +202 0x5658 //RX_FDEQ_GAIN_6 +203 0x5A5C //RX_FDEQ_GAIN_7 +204 0x5C5C //RX_FDEQ_GAIN_8 +205 0x5C5C //RX_FDEQ_GAIN_9 +206 0x5C5C //RX_FDEQ_GAIN_10 +207 0x5C48 //RX_FDEQ_GAIN_11 +208 0x4848 //RX_FDEQ_GAIN_12 +209 0x4848 //RX_FDEQ_GAIN_13 +210 0x4848 //RX_FDEQ_GAIN_14 +211 0x4848 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0202 //RX_FDEQ_BIN_0 +221 0x0203 //RX_FDEQ_BIN_1 +222 0x0402 //RX_FDEQ_BIN_2 +223 0x0303 //RX_FDEQ_BIN_3 +224 0x0303 //RX_FDEQ_BIN_4 +225 0x0303 //RX_FDEQ_BIN_5 +226 0x0303 //RX_FDEQ_BIN_6 +227 0x0303 //RX_FDEQ_BIN_7 +228 0x0A0A //RX_FDEQ_BIN_8 +229 0x0A0E //RX_FDEQ_BIN_9 +230 0x0000 //RX_FDEQ_BIN_10 +231 0x0000 //RX_FDEQ_BIN_11 +232 0x0000 //RX_FDEQ_BIN_12 +233 0x0000 //RX_FDEQ_BIN_13 +234 0x0000 //RX_FDEQ_BIN_14 +235 0x0000 //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x4000 //RX_FDEQ_RESRV_0 +245 0x0320 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0030 //RX_FDDRC_BAND_MARGIN_1 +248 0x0050 //RX_FDDRC_BAND_MARGIN_2 +249 0x0080 //RX_FDDRC_BAND_MARGIN_3 +250 0x0007 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x5000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x6400 //RX_FDDRC_THRD_3_2 +258 0x6400 //RX_FDDRC_THRD_3_3 +259 0x2000 //RX_FDDRC_SLANT_0_0 +260 0x2000 //RX_FDDRC_SLANT_0_1 +261 0x2000 //RX_FDDRC_SLANT_0_2 +262 0x2000 //RX_FDDRC_SLANT_0_3 +263 0x5333 //RX_FDDRC_SLANT_1_0 +264 0x5333 //RX_FDDRC_SLANT_1_1 +265 0x5333 //RX_FDDRC_SLANT_1_2 +266 0x5333 //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +286 0x0100 //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 +#VOL 4 +163 0x1000 //RX_TDDRC_ALPHA_UP_1 +164 0x1000 //RX_TDDRC_ALPHA_UP_2 +165 0x1000 //RX_TDDRC_ALPHA_UP_3 +166 0x1000 //RX_TDDRC_ALPHA_UP_4 +184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +190 0x7000 //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +269 0x0000 //RX_TDDRC_THRD_0 +270 0x0000 //RX_TDDRC_THRD_1 +271 0x1800 //RX_TDDRC_THRD_2 +272 0x1800 //RX_TDDRC_THRD_3 +273 0x3000 //RX_TDDRC_SLANT_0 +274 0x6E00 //RX_TDDRC_SLANT_1 +275 0x1000 //RX_TDDRC_ALPHA_UP_0 +276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x199A //RX_TDDRC_HMNC_GAIN +279 0x0001 //RX_TDDRC_SMT_FLAG +280 0x0CCD //RX_TDDRC_SMT_W +281 0x0360 //RX_TDDRC_DRC_GAIN +195 0x0030 //RX_FDEQ_SUBNUM +196 0x4848 //RX_FDEQ_GAIN_0 +197 0x4848 //RX_FDEQ_GAIN_1 +198 0x4844 //RX_FDEQ_GAIN_2 +199 0x4A4C //RX_FDEQ_GAIN_3 +200 0x4E50 //RX_FDEQ_GAIN_4 +201 0x5254 //RX_FDEQ_GAIN_5 +202 0x5658 //RX_FDEQ_GAIN_6 +203 0x5A5C //RX_FDEQ_GAIN_7 +204 0x5C5C //RX_FDEQ_GAIN_8 +205 0x5C5C //RX_FDEQ_GAIN_9 +206 0x5C5C //RX_FDEQ_GAIN_10 +207 0x5C48 //RX_FDEQ_GAIN_11 +208 0x4848 //RX_FDEQ_GAIN_12 +209 0x4848 //RX_FDEQ_GAIN_13 +210 0x4848 //RX_FDEQ_GAIN_14 +211 0x4848 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0202 //RX_FDEQ_BIN_0 +221 0x0203 //RX_FDEQ_BIN_1 +222 0x0402 //RX_FDEQ_BIN_2 +223 0x0303 //RX_FDEQ_BIN_3 +224 0x0303 //RX_FDEQ_BIN_4 +225 0x0303 //RX_FDEQ_BIN_5 +226 0x0303 //RX_FDEQ_BIN_6 +227 0x0303 //RX_FDEQ_BIN_7 +228 0x0A0A //RX_FDEQ_BIN_8 +229 0x0A0E //RX_FDEQ_BIN_9 +230 0x0000 //RX_FDEQ_BIN_10 +231 0x0000 //RX_FDEQ_BIN_11 +232 0x0000 //RX_FDEQ_BIN_12 +233 0x0000 //RX_FDEQ_BIN_13 +234 0x0000 //RX_FDEQ_BIN_14 +235 0x0000 //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x4000 //RX_FDEQ_RESRV_0 +245 0x0320 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0030 //RX_FDDRC_BAND_MARGIN_1 +248 0x0050 //RX_FDDRC_BAND_MARGIN_2 +249 0x0080 //RX_FDDRC_BAND_MARGIN_3 +250 0x0007 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x5000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x6400 //RX_FDDRC_THRD_3_2 +258 0x6400 //RX_FDDRC_THRD_3_3 +259 0x2000 //RX_FDDRC_SLANT_0_0 +260 0x2000 //RX_FDDRC_SLANT_0_1 +261 0x2000 //RX_FDDRC_SLANT_0_2 +262 0x2000 //RX_FDDRC_SLANT_0_3 +263 0x5333 //RX_FDDRC_SLANT_1_0 +264 0x5333 //RX_FDDRC_SLANT_1_1 +265 0x5333 //RX_FDDRC_SLANT_1_2 +266 0x5333 //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +286 0x0100 //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 +#VOL 5 +163 0x1000 //RX_TDDRC_ALPHA_UP_1 +164 0x1000 //RX_TDDRC_ALPHA_UP_2 +165 0x1000 //RX_TDDRC_ALPHA_UP_3 +166 0x1000 //RX_TDDRC_ALPHA_UP_4 +184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +190 0x7000 //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +269 0x0000 //RX_TDDRC_THRD_0 +270 0x0000 //RX_TDDRC_THRD_1 +271 0x1800 //RX_TDDRC_THRD_2 +272 0x1800 //RX_TDDRC_THRD_3 +273 0x3000 //RX_TDDRC_SLANT_0 +274 0x6E00 //RX_TDDRC_SLANT_1 +275 0x1000 //RX_TDDRC_ALPHA_UP_0 +276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x199A //RX_TDDRC_HMNC_GAIN +279 0x0001 //RX_TDDRC_SMT_FLAG +280 0x0CCD //RX_TDDRC_SMT_W +281 0x0360 //RX_TDDRC_DRC_GAIN +195 0x0030 //RX_FDEQ_SUBNUM +196 0x4848 //RX_FDEQ_GAIN_0 +197 0x4848 //RX_FDEQ_GAIN_1 +198 0x4844 //RX_FDEQ_GAIN_2 +199 0x4A4C //RX_FDEQ_GAIN_3 +200 0x4E50 //RX_FDEQ_GAIN_4 +201 0x5254 //RX_FDEQ_GAIN_5 +202 0x5658 //RX_FDEQ_GAIN_6 +203 0x5A5C //RX_FDEQ_GAIN_7 +204 0x5C5C //RX_FDEQ_GAIN_8 +205 0x5C5C //RX_FDEQ_GAIN_9 +206 0x5C5C //RX_FDEQ_GAIN_10 +207 0x5C48 //RX_FDEQ_GAIN_11 +208 0x4848 //RX_FDEQ_GAIN_12 +209 0x4848 //RX_FDEQ_GAIN_13 +210 0x4848 //RX_FDEQ_GAIN_14 +211 0x4848 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0202 //RX_FDEQ_BIN_0 +221 0x0203 //RX_FDEQ_BIN_1 +222 0x0402 //RX_FDEQ_BIN_2 +223 0x0303 //RX_FDEQ_BIN_3 +224 0x0303 //RX_FDEQ_BIN_4 +225 0x0303 //RX_FDEQ_BIN_5 +226 0x0303 //RX_FDEQ_BIN_6 +227 0x0303 //RX_FDEQ_BIN_7 +228 0x0A0A //RX_FDEQ_BIN_8 +229 0x0A0E //RX_FDEQ_BIN_9 +230 0x0000 //RX_FDEQ_BIN_10 +231 0x0000 //RX_FDEQ_BIN_11 +232 0x0000 //RX_FDEQ_BIN_12 +233 0x0000 //RX_FDEQ_BIN_13 +234 0x0000 //RX_FDEQ_BIN_14 +235 0x0000 //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x4000 //RX_FDEQ_RESRV_0 +245 0x0320 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0030 //RX_FDDRC_BAND_MARGIN_1 +248 0x0050 //RX_FDDRC_BAND_MARGIN_2 +249 0x0080 //RX_FDDRC_BAND_MARGIN_3 +250 0x0007 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x5000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x6400 //RX_FDDRC_THRD_3_2 +258 0x6400 //RX_FDDRC_THRD_3_3 +259 0x2000 //RX_FDDRC_SLANT_0_0 +260 0x2000 //RX_FDDRC_SLANT_0_1 +261 0x2000 //RX_FDDRC_SLANT_0_2 +262 0x2000 //RX_FDDRC_SLANT_0_3 +263 0x5333 //RX_FDDRC_SLANT_1_0 +264 0x5333 //RX_FDDRC_SLANT_1_1 +265 0x5333 //RX_FDDRC_SLANT_1_2 +266 0x5333 //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +286 0x0100 //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 +#VOL 6 +163 0x1000 //RX_TDDRC_ALPHA_UP_1 +164 0x1000 //RX_TDDRC_ALPHA_UP_2 +165 0x1000 //RX_TDDRC_ALPHA_UP_3 +166 0x1000 //RX_TDDRC_ALPHA_UP_4 +184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +190 0x7000 //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +269 0x0000 //RX_TDDRC_THRD_0 +270 0x0000 //RX_TDDRC_THRD_1 +271 0x1800 //RX_TDDRC_THRD_2 +272 0x1800 //RX_TDDRC_THRD_3 +273 0x3000 //RX_TDDRC_SLANT_0 +274 0x6E00 //RX_TDDRC_SLANT_1 +275 0x1000 //RX_TDDRC_ALPHA_UP_0 +276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x199A //RX_TDDRC_HMNC_GAIN +279 0x0001 //RX_TDDRC_SMT_FLAG +280 0x0CCD //RX_TDDRC_SMT_W +281 0x0360 //RX_TDDRC_DRC_GAIN +195 0x0030 //RX_FDEQ_SUBNUM +196 0x4848 //RX_FDEQ_GAIN_0 +197 0x4848 //RX_FDEQ_GAIN_1 +198 0x4844 //RX_FDEQ_GAIN_2 +199 0x4A4C //RX_FDEQ_GAIN_3 +200 0x4E50 //RX_FDEQ_GAIN_4 +201 0x5254 //RX_FDEQ_GAIN_5 +202 0x5658 //RX_FDEQ_GAIN_6 +203 0x5A5C //RX_FDEQ_GAIN_7 +204 0x5C5C //RX_FDEQ_GAIN_8 +205 0x5C5C //RX_FDEQ_GAIN_9 +206 0x5C5C //RX_FDEQ_GAIN_10 +207 0x5C48 //RX_FDEQ_GAIN_11 +208 0x4848 //RX_FDEQ_GAIN_12 +209 0x4848 //RX_FDEQ_GAIN_13 +210 0x4848 //RX_FDEQ_GAIN_14 +211 0x4848 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0202 //RX_FDEQ_BIN_0 +221 0x0203 //RX_FDEQ_BIN_1 +222 0x0402 //RX_FDEQ_BIN_2 +223 0x0303 //RX_FDEQ_BIN_3 +224 0x0303 //RX_FDEQ_BIN_4 +225 0x0303 //RX_FDEQ_BIN_5 +226 0x0303 //RX_FDEQ_BIN_6 +227 0x0303 //RX_FDEQ_BIN_7 +228 0x0A0A //RX_FDEQ_BIN_8 +229 0x0A0E //RX_FDEQ_BIN_9 +230 0x0000 //RX_FDEQ_BIN_10 +231 0x0000 //RX_FDEQ_BIN_11 +232 0x0000 //RX_FDEQ_BIN_12 +233 0x0000 //RX_FDEQ_BIN_13 +234 0x0000 //RX_FDEQ_BIN_14 +235 0x0000 //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x4000 //RX_FDEQ_RESRV_0 +245 0x0320 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0030 //RX_FDDRC_BAND_MARGIN_1 +248 0x0050 //RX_FDDRC_BAND_MARGIN_2 +249 0x0080 //RX_FDDRC_BAND_MARGIN_3 +250 0x0007 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x5000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x6400 //RX_FDDRC_THRD_3_2 +258 0x6400 //RX_FDDRC_THRD_3_3 +259 0x2000 //RX_FDDRC_SLANT_0_0 +260 0x2000 //RX_FDDRC_SLANT_0_1 +261 0x2000 //RX_FDDRC_SLANT_0_2 +262 0x2000 //RX_FDDRC_SLANT_0_3 +263 0x5333 //RX_FDDRC_SLANT_1_0 +264 0x5333 //RX_FDDRC_SLANT_1_1 +265 0x5333 //RX_FDDRC_SLANT_1_2 +266 0x5333 //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +286 0x0100 //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 #CASE_NAME HANDSET-HANDSET_HAC-TMOBILE_US-WB -#PARAM_TYPE TX+RX -#TOTAL_CUSTOM_STEP 7 +#PARAM_MODE Full +#PARAM_TYPE TX+2RX +#TOTAL_CUSTOM_STEP 7+7 #TX 0 0x0000 //TX_OPERATION_MODE_0 1 0x0000 //TX_OPERATION_MODE_1 @@ -28076,7 +42749,7 @@ 18 0x0000 //TX_SYS_RESRV_2 19 0x0000 //TX_SYS_RESRV_3 20 0x0000 //TX_DIST2REF0 -21 0x009D //TX_DIST2REF1 +21 0x009C //TX_DIST2REF1 22 0x0000 //TX_DIST2REF_02 23 0x0000 //TX_DIST2REF_03 24 0x0000 //TX_DIST2REF_04 @@ -28306,16 +42979,16 @@ 248 0xF800 //TX_THR_SN_EST_6 249 0xF700 //TX_THR_SN_EST_7 250 0x0000 //TX_DELTA_THR_SN_EST_0 -251 0x0100 //TX_DELTA_THR_SN_EST_1 -252 0x01A0 //TX_DELTA_THR_SN_EST_2 +251 0x01A0 //TX_DELTA_THR_SN_EST_1 +252 0x0200 //TX_DELTA_THR_SN_EST_2 253 0x0200 //TX_DELTA_THR_SN_EST_3 -254 0x0200 //TX_DELTA_THR_SN_EST_4 -255 0x0100 //TX_DELTA_THR_SN_EST_5 -256 0x0200 //TX_DELTA_THR_SN_EST_6 +254 0x0100 //TX_DELTA_THR_SN_EST_4 +255 0x0200 //TX_DELTA_THR_SN_EST_5 +256 0x0100 //TX_DELTA_THR_SN_EST_6 257 0x0200 //TX_DELTA_THR_SN_EST_7 258 0x4000 //TX_LAMBDA_NN_EST_0 -259 0x4000 //TX_LAMBDA_NN_EST_1 -260 0x5000 //TX_LAMBDA_NN_EST_2 +259 0x5000 //TX_LAMBDA_NN_EST_1 +260 0x4000 //TX_LAMBDA_NN_EST_2 261 0x4000 //TX_LAMBDA_NN_EST_3 262 0x4000 //TX_LAMBDA_NN_EST_4 263 0x4000 //TX_LAMBDA_NN_EST_5 @@ -28337,18 +43010,18 @@ 279 0x1000 //TX_B_POST_FLT_0 280 0x4000 //TX_B_POST_FLT_1 281 0x0018 //TX_NS_LVL_CTRL_0 -282 0x001C //TX_NS_LVL_CTRL_1 -283 0x0019 //TX_NS_LVL_CTRL_2 -284 0x0018 //TX_NS_LVL_CTRL_3 -285 0x0019 //TX_NS_LVL_CTRL_4 -286 0x001A //TX_NS_LVL_CTRL_5 -287 0x001E //TX_NS_LVL_CTRL_6 +282 0x0019 //TX_NS_LVL_CTRL_1 +283 0x0018 //TX_NS_LVL_CTRL_2 +284 0x0019 //TX_NS_LVL_CTRL_3 +285 0x001A //TX_NS_LVL_CTRL_4 +286 0x001E //TX_NS_LVL_CTRL_5 +287 0x001C //TX_NS_LVL_CTRL_6 288 0x001C //TX_NS_LVL_CTRL_7 289 0x000E //TX_MIN_GAIN_S_0 -290 0x0018 //TX_MIN_GAIN_S_1 +290 0x0012 //TX_MIN_GAIN_S_1 291 0x0012 //TX_MIN_GAIN_S_2 292 0x0012 //TX_MIN_GAIN_S_3 -293 0x0012 //TX_MIN_GAIN_S_4 +293 0x0018 //TX_MIN_GAIN_S_4 294 0x0018 //TX_MIN_GAIN_S_5 295 0x0018 //TX_MIN_GAIN_S_6 296 0x0018 //TX_MIN_GAIN_S_7 @@ -28356,8 +43029,8 @@ 298 0x0000 //TX_NS_MAX_PRI_SNR_TH 299 0x0000 //TX_NMOS_SUP_MENSA 300 0x7FFF //TX_SNRI_SUP_0 -301 0x4000 //TX_SNRI_SUP_1 -302 0x5000 //TX_SNRI_SUP_2 +301 0x5000 //TX_SNRI_SUP_1 +302 0x4000 //TX_SNRI_SUP_2 303 0x4000 //TX_SNRI_SUP_3 304 0x4000 //TX_SNRI_SUP_4 305 0x4000 //TX_SNRI_SUP_5 @@ -28370,28 +43043,28 @@ 312 0x7FFF //TX_A_POST_FILT_0 313 0x2000 //TX_A_POST_FILT_1 314 0x7000 //TX_A_POST_FILT_S_0 -315 0x7000 //TX_A_POST_FILT_S_1 +315 0x3000 //TX_A_POST_FILT_S_1 316 0x3000 //TX_A_POST_FILT_S_2 -317 0x3000 //TX_A_POST_FILT_S_3 -318 0x2000 //TX_A_POST_FILT_S_4 +317 0x2000 //TX_A_POST_FILT_S_3 +318 0x7000 //TX_A_POST_FILT_S_4 319 0x7000 //TX_A_POST_FILT_S_5 320 0x7000 //TX_A_POST_FILT_S_6 321 0x7000 //TX_A_POST_FILT_S_7 322 0x1000 //TX_B_POST_FILT_0 323 0x4000 //TX_B_POST_FILT_1 -324 0x5000 //TX_B_POST_FILT_2 +324 0x4000 //TX_B_POST_FILT_2 325 0x4000 //TX_B_POST_FILT_3 326 0x4000 //TX_B_POST_FILT_4 327 0x4000 //TX_B_POST_FILT_5 -328 0x4000 //TX_B_POST_FILT_6 +328 0x5000 //TX_B_POST_FILT_6 329 0x4000 //TX_B_POST_FILT_7 330 0x4000 //TX_B_LESSCUT_RTO_S_0 331 0x6000 //TX_B_LESSCUT_RTO_S_1 332 0x6000 //TX_B_LESSCUT_RTO_S_2 333 0x6000 //TX_B_LESSCUT_RTO_S_3 -334 0x6000 //TX_B_LESSCUT_RTO_S_4 +334 0x7FFF //TX_B_LESSCUT_RTO_S_4 335 0x6000 //TX_B_LESSCUT_RTO_S_5 -336 0x7FFF //TX_B_LESSCUT_RTO_S_6 +336 0x6000 //TX_B_LESSCUT_RTO_S_6 337 0x7FFF //TX_B_LESSCUT_RTO_S_7 338 0x7C29 //TX_LAMBDA_PFILT 339 0x7C29 //TX_LAMBDA_PFILT_S_0 @@ -28435,10 +43108,10 @@ 377 0x4E20 //TX_NOISE_TH_5_4 378 0x21E8 //TX_NOISE_TH_6 379 0x0014 //TX_MINENOISE_TH -380 0x4000 //TX_MINENOISE_MIC0_TH_MTS -381 0xFFEE //TX_MINENOISE_MIC0_TH_EXP -382 0x6000 //TX_MINENOISE_MIC0_S_TH_MTS -383 0xFFF3 //TX_MINENOISE_MIC0_S_TH_EXP +380 0xD508 //TX_MORENS_TFMASK_TH +381 0x0001 //TX_DRC_QUIET_FLOOR +382 0x6D60 //TX_RATIODTL_CUT_TH +383 0x0DAC //TX_DT_CUT_K1 384 0x00A5 //TX_OUT_ENER_S_TH_CLEAN 385 0x00A5 //TX_OUT_ENER_S_TH_LESSCLEAN 386 0x00A5 //TX_OUT_ENER_S_TH_NOISY @@ -28446,15 +43119,15 @@ 388 0x00CE //TX_OUT_ENER_TH_SPEECH 389 0x2000 //TX_SN_NPB_GAIN 390 0x0000 //TX_NN_NPB_GAIN -391 0x0000 //TX_CSX_ALPHA_0 -392 0x0000 //TX_CSX_ALPHA_1 -393 0x0000 //TX_CSX_ALPHA_2 -394 0x0000 //TX_CSX_ALPHA_3 -395 0x0800 //TX_MU_ARSP_EST -396 0x00C8 //TX_P_OUTBEAM_MIN_TH +391 0x3000 //TX_POST_MASK_SUP_HSNE +392 0x07D0 //TX_TAIL_DET_TH +393 0x4000 //TX_B_LESSCUT_RTO_WTA +394 0x0000 //TX_MEL_G_R +395 0x0080 //TX_SUPHIGH_TH +396 0x4000 //TX_MASK_G_R 397 0x0002 //TX_EXTRA_NS_L -398 0x0800 //TX_EXTRA_NS_A -399 0x0005 //TX_VR_NOISE_FLOOR_TH +398 0x1800 //TX_C_POST_FLT_MASK +399 0x7FFF //TX_A_POST_FLT_WNS 400 0x0148 //TX_MIN_G_LOW300HZ 401 0x0004 //TX_MAXLEVEL_CNG 402 0x00B4 //TX_STN_NOISE_TH @@ -28569,16 +43242,16 @@ 511 0x6666 //TX_MIC_TO_BFGAIN 512 0x0000 //TX_MICTOBFGAIN0 513 0x0000 //TX_FASTMUE_TH -514 0x0000 //TX_DERVB_LEN_0 -515 0x0000 //TX_DERVB_LEN_1 -516 0x0000 //TX_RHO_DERVB -517 0x0000 //TX_MIC_INDX_DERVB -518 0x0000 //TX_MU_DERVB -519 0x0000 //TX_DR_RESRV_0 -520 0x0000 //TX_DR_RESRV_1 -521 0x0000 //TX_DR_RESRV_2 -522 0x0000 //TX_DR_RESRV_3 -523 0x0000 //TX_DR_RESRV_4 +514 0x3000 //TX_DEREVERB_LF_MU +515 0x34CD //TX_DEREVERB_HF_MU +516 0x0007 //TX_DEREVERB_DELAY +517 0x0004 //TX_DEREVERB_COEF_LEN +518 0x0003 //TX_DEREVERB_DNR +519 0x0000 //TX_DEREVERB_ALPHA +520 0x0000 //TX_DEREVERB_BETA +521 0x0000 //TX_GSC_RTOL_TH +522 0x0000 //TX_GSC_RTOH_TH +523 0x7E2C //TX_WIDE2_MEANHTH 524 0x0000 //TX_DR_RESRV_5 525 0x0000 //TX_DR_RESRV_6 526 0x0000 //TX_DR_RESRV_7 @@ -28626,16 +43299,16 @@ 568 0x5048 //TX_FDEQ_GAIN_1 569 0x4C4C //TX_FDEQ_GAIN_2 570 0x474A //TX_FDEQ_GAIN_3 -571 0x4742 //TX_FDEQ_GAIN_4 -572 0x4241 //TX_FDEQ_GAIN_5 -573 0x403F //TX_FDEQ_GAIN_6 -574 0x433F //TX_FDEQ_GAIN_7 -575 0x3938 //TX_FDEQ_GAIN_8 -576 0x3434 //TX_FDEQ_GAIN_9 -577 0x3530 //TX_FDEQ_GAIN_10 -578 0x3033 //TX_FDEQ_GAIN_11 -579 0x3535 //TX_FDEQ_GAIN_12 -580 0x3D48 //TX_FDEQ_GAIN_13 +571 0x473F //TX_FDEQ_GAIN_4 +572 0x4245 //TX_FDEQ_GAIN_5 +573 0x4B53 //TX_FDEQ_GAIN_6 +574 0x564A //TX_FDEQ_GAIN_7 +575 0x3D3A //TX_FDEQ_GAIN_8 +576 0x3838 //TX_FDEQ_GAIN_9 +577 0x3836 //TX_FDEQ_GAIN_10 +578 0x3633 //TX_FDEQ_GAIN_11 +579 0x3838 //TX_FDEQ_GAIN_12 +580 0x4048 //TX_FDEQ_GAIN_13 581 0x4848 //TX_FDEQ_GAIN_14 582 0x4848 //TX_FDEQ_GAIN_15 583 0x4848 //TX_FDEQ_GAIN_16 @@ -28679,12 +43352,12 @@ 621 0x4848 //TX_PREEQ_GAIN_MIC0_4 622 0x4848 //TX_PREEQ_GAIN_MIC0_5 623 0x4848 //TX_PREEQ_GAIN_MIC0_6 -624 0x4846 //TX_PREEQ_GAIN_MIC0_7 -625 0x4544 //TX_PREEQ_GAIN_MIC0_8 -626 0x4241 //TX_PREEQ_GAIN_MIC0_9 -627 0x403E //TX_PREEQ_GAIN_MIC0_10 -628 0x3D3C //TX_PREEQ_GAIN_MIC0_11 -629 0x3C3C //TX_PREEQ_GAIN_MIC0_12 +624 0x4848 //TX_PREEQ_GAIN_MIC0_7 +625 0x4848 //TX_PREEQ_GAIN_MIC0_8 +626 0x4848 //TX_PREEQ_GAIN_MIC0_9 +627 0x4848 //TX_PREEQ_GAIN_MIC0_10 +628 0x4848 //TX_PREEQ_GAIN_MIC0_11 +629 0x4848 //TX_PREEQ_GAIN_MIC0_12 630 0x4848 //TX_PREEQ_GAIN_MIC0_13 631 0x4848 //TX_PREEQ_GAIN_MIC0_14 632 0x4848 //TX_PREEQ_GAIN_MIC0_15 @@ -28729,11 +43402,11 @@ 671 0x4848 //TX_PREEQ_GAIN_MIC1_5 672 0x4848 //TX_PREEQ_GAIN_MIC1_6 673 0x4848 //TX_PREEQ_GAIN_MIC1_7 -674 0x484A //TX_PREEQ_GAIN_MIC1_8 -675 0x4B4C //TX_PREEQ_GAIN_MIC1_9 +674 0x4848 //TX_PREEQ_GAIN_MIC1_8 +675 0x4A4B //TX_PREEQ_GAIN_MIC1_9 676 0x4B4A //TX_PREEQ_GAIN_MIC1_10 -677 0x4A48 //TX_PREEQ_GAIN_MIC1_11 -678 0x4C4C //TX_PREEQ_GAIN_MIC1_12 +677 0x4848 //TX_PREEQ_GAIN_MIC1_11 +678 0x494C //TX_PREEQ_GAIN_MIC1_12 679 0x4C4C //TX_PREEQ_GAIN_MIC1_13 680 0x4848 //TX_PREEQ_GAIN_MIC1_14 681 0x4848 //TX_PREEQ_GAIN_MIC1_15 @@ -28831,7 +43504,7 @@ 773 0x0000 //TX_GAIN_LIMIT_0 774 0x0000 //TX_GAIN_LIMIT_1 775 0x0006 //TX_GAIN_LIMIT_2 -776 0x0006 //TX_GAIN_LIMIT_3 +776 0x0005 //TX_GAIN_LIMIT_3 777 0x7F5B //TX_BVE_NOVAD0_ALPHADOWN 778 0x7FDE //TX_BVE_VAD0_ALPHAUP 779 0x7F3A //TX_BVE_VAD0_ALPHADOWN @@ -28952,6 +43625,71 @@ 894 0xC000 //TX_FASTNS_SSA_THHFL 895 0xCCCC //TX_FASTNS_SSA_THLFH 896 0xD999 //TX_FASTNS_SSA_THHFH +897 0x2339 //TX_SENDFUNC_REG_MICMUTE +898 0x0021 //TX_SENDFUNC_REG_MICMUTE1 +899 0x02BC //TX_MICMUTE_RATIO_THR +900 0x0140 //TX_MICMUTE_AMP_THR +901 0x0004 //TX_MICMUTE_HPF_IND +902 0x00C0 //TX_MICMUTE_LOG_EYR_TH +903 0x0008 //TX_MICMUTE_CVG_TIME +904 0x0008 //TX_MICMUTE_RELEASE_TIME +905 0x01FE //TX_MIC_VOLUME_MIC0MUTE +906 0x0020 //TX_MICMUTE_EPD_OFFSET_0 +907 0x001E //TX_MICMUTE_FRQ_AEC_L +908 0x7999 //TX_MICMUTE_EAD_THR +909 0x7FFF //TX_MICMUTE_LAMBDA_CB_NLE +910 0x7FFF //TX_MICMUTE_LAMBDA_RE_EST +911 0x4000 //TX_DTD_THR1_MICMUTE_0 +912 0x7000 //TX_DTD_THR1_MICMUTE_1 +913 0x7FFF //TX_DTD_THR1_MICMUTE_2 +914 0x7FFF //TX_DTD_THR1_MICMUTE_3 +915 0x6CCC //TX_DTD_THR2_MICMUTE_0 +916 0x0400 //TX_MICMUTE_MIN_EQ_RE_EST_0 +917 0x0400 //TX_MICMUTE_MIN_EQ_RE_EST_1 +918 0x1000 //TX_MICMUTE_MIN_EQ_RE_EST_2 +919 0x7FFF //TX_MICMUTE_MIN_EQ_RE_EST_3 +920 0x7FFF //TX_MICMUTE_MIN_EQ_RE_EST_4 +921 0x4000 //TX_MICMUTE_C_POST_FLT +922 0x03E8 //TX_MICMUTE_DT_CUT_K +923 0x0001 //TX_MICMUTE_DT_CUT_THR +924 0x03E8 //TX_MICMUTE_DT_CUT_K2 +925 0x0001 //TX_MICMUTE_DT_CUT_THR2 +926 0x0064 //TX_MICMUTE_DT2_HOLD_N +927 0x1000 //TX_MICMUTE_RATIODTH_THCUT +928 0x1000 //TX_MICMUTE_B_POST_FLT_ECHOL +929 0x7FFF //TX_MICMUTE_B_POST_FLT_ECHOH +930 0x0400 //TX_MICMUTE_C_POST_FLT_MASK +931 0x7999 //TX_MICMUTE_RATIODTL_CUT_TH +932 0x0258 //TX_MICMUTE_DT_CUT_K1 +933 0x0800 //TX_MICMUTE_N2_SN_EST +934 0xFC00 //TX_MICMUTE_THR_SN_EST_0 +935 0x001C //TX_MICMUTE_MIN_G_CTRL_0 +936 0x6000 //TX_MICMUTE_A_POST_FILT_S_0 +937 0x7000 //TX_MICMUTE_B_POST_FILT_0 +938 0x2710 //TX_MIC1RUB_AMP_THR +939 0x0010 //TX_MIC1MUTE_RATIO_THR +940 0x0450 //TX_MIC1MUTE_AMP_THR +941 0x0008 //TX_MIC1MUTE_CVG_TIME +942 0x0008 //TX_MIC1MUTE_RELEASE_TIME +943 0x0000 //TX_AMS_RESRV_01 +944 0x0000 //TX_AMS_RESRV_02 +945 0x0000 //TX_AMS_RESRV_03 +946 0x0000 //TX_AMS_RESRV_04 +947 0x0000 //TX_AMS_RESRV_05 +948 0x0000 //TX_AMS_RESRV_06 +949 0x0000 //TX_AMS_RESRV_07 +950 0x0000 //TX_AMS_RESRV_08 +951 0x0000 //TX_AMS_RESRV_09 +952 0x0000 //TX_AMS_RESRV_10 +953 0x0000 //TX_AMS_RESRV_11 +954 0x0000 //TX_AMS_RESRV_12 +955 0x0000 //TX_AMS_RESRV_13 +956 0x0000 //TX_AMS_RESRV_14 +957 0x0000 //TX_AMS_RESRV_15 +958 0x0000 //TX_AMS_RESRV_16 +959 0x0000 //TX_AMS_RESRV_17 +960 0x0000 //TX_AMS_RESRV_18 +961 0x0000 //TX_AMS_RESRV_19 #RX 0 0x000C //RX_RECVFUNC_MODE_0 1 0x0000 //RX_RECVFUNC_MODE_1 @@ -29803,14 +44541,866 @@ 110 0x0000 //RX_FDDRC_RESRV_0 129 0x0100 //RX_SPK_VOL 130 0x0000 //RX_VOL_RESRV_0 +#RX 2 +157 0x000C //RX_RECVFUNC_MODE_0 +158 0x0000 //RX_RECVFUNC_MODE_1 +159 0x0001 //RX_SAMPLINGFREQ_SIG +160 0x0001 //RX_SAMPLINGFREQ_PROC +161 0x000A //RX_FRAME_SZ +162 0x0000 //RX_DELAY_OPT +163 0x1000 //RX_TDDRC_ALPHA_UP_1 +164 0x1000 //RX_TDDRC_ALPHA_UP_2 +165 0x1000 //RX_TDDRC_ALPHA_UP_3 +166 0x1000 //RX_TDDRC_ALPHA_UP_4 +167 0x0800 //RX_PGA +168 0x7FFF //RX_A_HP +169 0x4000 //RX_B_PE +170 0x7800 //RX_THR_PITCH_DET_0 +171 0x7000 //RX_THR_PITCH_DET_1 +172 0x6000 //RX_THR_PITCH_DET_2 +173 0x0008 //RX_PITCH_BFR_LEN +174 0x0003 //RX_SBD_PITCH_DET +175 0x0100 //RX_PP_RESRV_0 +176 0x0020 //RX_PP_RESRV_1 +177 0x0400 //RX_N_SN_EST +178 0x000C //RX_N2_SN_EST +179 0x0014 //RX_NS_LVL_CTRL +180 0xF800 //RX_THR_SN_EST +181 0x7E00 //RX_LAMBDA_PFILT +182 0x000A //RX_FENS_RESRV_0 +183 0x0190 //RX_FENS_RESRV_1 +184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +187 0x0002 //RX_EXTRA_NS_L +188 0x0800 //RX_EXTRA_NS_A +189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +190 0x7000 //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +192 0x199A //RX_A_POST_FLT +193 0x0000 //RX_LMT_THRD +194 0x4000 //RX_LMT_ALPHA +195 0x0030 //RX_FDEQ_SUBNUM +196 0x4848 //RX_FDEQ_GAIN_0 +197 0x4848 //RX_FDEQ_GAIN_1 +198 0x4844 //RX_FDEQ_GAIN_2 +199 0x4A4C //RX_FDEQ_GAIN_3 +200 0x4E50 //RX_FDEQ_GAIN_4 +201 0x5254 //RX_FDEQ_GAIN_5 +202 0x5658 //RX_FDEQ_GAIN_6 +203 0x5A5C //RX_FDEQ_GAIN_7 +204 0x5C5C //RX_FDEQ_GAIN_8 +205 0x5C5C //RX_FDEQ_GAIN_9 +206 0x5C5C //RX_FDEQ_GAIN_10 +207 0x5C5C //RX_FDEQ_GAIN_11 +208 0x5C5C //RX_FDEQ_GAIN_12 +209 0x5C5C //RX_FDEQ_GAIN_13 +210 0x4848 //RX_FDEQ_GAIN_14 +211 0x4848 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0202 //RX_FDEQ_BIN_0 +221 0x0203 //RX_FDEQ_BIN_1 +222 0x0402 //RX_FDEQ_BIN_2 +223 0x0505 //RX_FDEQ_BIN_3 +224 0x0505 //RX_FDEQ_BIN_4 +225 0x0505 //RX_FDEQ_BIN_5 +226 0x0505 //RX_FDEQ_BIN_6 +227 0x0505 //RX_FDEQ_BIN_7 +228 0x160C //RX_FDEQ_BIN_8 +229 0x0D0E //RX_FDEQ_BIN_9 +230 0x0E0F //RX_FDEQ_BIN_10 +231 0x0F10 //RX_FDEQ_BIN_11 +232 0x1011 //RX_FDEQ_BIN_12 +233 0x1104 //RX_FDEQ_BIN_13 +234 0x0000 //RX_FDEQ_BIN_14 +235 0x0000 //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x4000 //RX_FDEQ_RESRV_0 +245 0x0320 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0030 //RX_FDDRC_BAND_MARGIN_1 +248 0x0050 //RX_FDDRC_BAND_MARGIN_2 +249 0x0080 //RX_FDDRC_BAND_MARGIN_3 +250 0x0007 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x5000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x6400 //RX_FDDRC_THRD_3_2 +258 0x6400 //RX_FDDRC_THRD_3_3 +259 0x2000 //RX_FDDRC_SLANT_0_0 +260 0x2000 //RX_FDDRC_SLANT_0_1 +261 0x2000 //RX_FDDRC_SLANT_0_2 +262 0x2000 //RX_FDDRC_SLANT_0_3 +263 0x5333 //RX_FDDRC_SLANT_1_0 +264 0x5333 //RX_FDDRC_SLANT_1_1 +265 0x5333 //RX_FDDRC_SLANT_1_2 +266 0x5333 //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +268 0x0002 //RX_FILTINDX +269 0x0000 //RX_TDDRC_THRD_0 +270 0x0000 //RX_TDDRC_THRD_1 +271 0x1800 //RX_TDDRC_THRD_2 +272 0x1800 //RX_TDDRC_THRD_3 +273 0x3000 //RX_TDDRC_SLANT_0 +274 0x6E00 //RX_TDDRC_SLANT_1 +275 0x1000 //RX_TDDRC_ALPHA_UP_0 +276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x199A //RX_TDDRC_HMNC_GAIN +279 0x0001 //RX_TDDRC_SMT_FLAG +280 0x0CCD //RX_TDDRC_SMT_W +281 0x0400 //RX_TDDRC_DRC_GAIN +282 0x7C00 //RX_LAMBDA_PKA_FP +283 0x2000 //RX_TPKA_FP +284 0x2000 //RX_MIN_G_FP +285 0x0080 //RX_MAX_G_FP +286 0x0100 //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 +288 0x0000 //RX_MAXLEVEL_CNG +289 0x3000 //RX_BWE_UV_TH +290 0x3000 //RX_BWE_UV_TH2 +291 0x1800 //RX_BWE_UV_TH3 +292 0x1000 //RX_BWE_V_TH +293 0x04CD //RX_BWE_GAIN1_V_TH1 +294 0x0F33 //RX_BWE_GAIN1_V_TH2 +295 0x7333 //RX_BWE_UV_EQ +296 0x199A //RX_BWE_V_EQ +297 0x7333 //RX_BWE_TONE_TH +298 0x0004 //RX_BWE_UV_HOLD_T +299 0x6CCD //RX_BWE_GAIN2_ALPHA +300 0x799A //RX_BWE_GAIN3_ALPHA +301 0x001E //RX_BWE_CUTOFF +302 0x3000 //RX_BWE_GAINFILL +303 0x3200 //RX_BWE_MAXTH_TONE +304 0x2000 //RX_BWE_EQ_0 +305 0x2000 //RX_BWE_EQ_1 +306 0x2000 //RX_BWE_EQ_2 +307 0x2000 //RX_BWE_EQ_3 +308 0x2000 //RX_BWE_EQ_4 +309 0x2000 //RX_BWE_EQ_5 +310 0x2000 //RX_BWE_EQ_6 +311 0x0000 //RX_BWE_RESRV_0 +312 0x0000 //RX_BWE_RESRV_1 +313 0x0000 //RX_BWE_RESRV_2 +#VOL 0 +163 0x1000 //RX_TDDRC_ALPHA_UP_1 +164 0x1000 //RX_TDDRC_ALPHA_UP_2 +165 0x1000 //RX_TDDRC_ALPHA_UP_3 +166 0x1000 //RX_TDDRC_ALPHA_UP_4 +184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +190 0x7000 //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +269 0x0000 //RX_TDDRC_THRD_0 +270 0x0000 //RX_TDDRC_THRD_1 +271 0x1800 //RX_TDDRC_THRD_2 +272 0x1800 //RX_TDDRC_THRD_3 +273 0x3000 //RX_TDDRC_SLANT_0 +274 0x6E00 //RX_TDDRC_SLANT_1 +275 0x1000 //RX_TDDRC_ALPHA_UP_0 +276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x199A //RX_TDDRC_HMNC_GAIN +279 0x0001 //RX_TDDRC_SMT_FLAG +280 0x0CCD //RX_TDDRC_SMT_W +281 0x0400 //RX_TDDRC_DRC_GAIN +195 0x0030 //RX_FDEQ_SUBNUM +196 0x4848 //RX_FDEQ_GAIN_0 +197 0x4848 //RX_FDEQ_GAIN_1 +198 0x4844 //RX_FDEQ_GAIN_2 +199 0x4A4C //RX_FDEQ_GAIN_3 +200 0x4E50 //RX_FDEQ_GAIN_4 +201 0x5254 //RX_FDEQ_GAIN_5 +202 0x5658 //RX_FDEQ_GAIN_6 +203 0x5A5C //RX_FDEQ_GAIN_7 +204 0x5C5C //RX_FDEQ_GAIN_8 +205 0x5C5C //RX_FDEQ_GAIN_9 +206 0x5C5C //RX_FDEQ_GAIN_10 +207 0x5C5C //RX_FDEQ_GAIN_11 +208 0x5C5C //RX_FDEQ_GAIN_12 +209 0x5C5C //RX_FDEQ_GAIN_13 +210 0x4848 //RX_FDEQ_GAIN_14 +211 0x4848 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0202 //RX_FDEQ_BIN_0 +221 0x0203 //RX_FDEQ_BIN_1 +222 0x0402 //RX_FDEQ_BIN_2 +223 0x0505 //RX_FDEQ_BIN_3 +224 0x0505 //RX_FDEQ_BIN_4 +225 0x0505 //RX_FDEQ_BIN_5 +226 0x0505 //RX_FDEQ_BIN_6 +227 0x0505 //RX_FDEQ_BIN_7 +228 0x160C //RX_FDEQ_BIN_8 +229 0x0D0E //RX_FDEQ_BIN_9 +230 0x0E0F //RX_FDEQ_BIN_10 +231 0x0F10 //RX_FDEQ_BIN_11 +232 0x1011 //RX_FDEQ_BIN_12 +233 0x1104 //RX_FDEQ_BIN_13 +234 0x0000 //RX_FDEQ_BIN_14 +235 0x0000 //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x4000 //RX_FDEQ_RESRV_0 +245 0x0320 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0030 //RX_FDDRC_BAND_MARGIN_1 +248 0x0050 //RX_FDDRC_BAND_MARGIN_2 +249 0x0080 //RX_FDDRC_BAND_MARGIN_3 +250 0x0007 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x5000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x6400 //RX_FDDRC_THRD_3_2 +258 0x6400 //RX_FDDRC_THRD_3_3 +259 0x2000 //RX_FDDRC_SLANT_0_0 +260 0x2000 //RX_FDDRC_SLANT_0_1 +261 0x2000 //RX_FDDRC_SLANT_0_2 +262 0x2000 //RX_FDDRC_SLANT_0_3 +263 0x5333 //RX_FDDRC_SLANT_1_0 +264 0x5333 //RX_FDDRC_SLANT_1_1 +265 0x5333 //RX_FDDRC_SLANT_1_2 +266 0x5333 //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +286 0x0100 //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 +#VOL 1 +163 0x1000 //RX_TDDRC_ALPHA_UP_1 +164 0x1000 //RX_TDDRC_ALPHA_UP_2 +165 0x1000 //RX_TDDRC_ALPHA_UP_3 +166 0x1000 //RX_TDDRC_ALPHA_UP_4 +184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +190 0x7000 //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +269 0x0000 //RX_TDDRC_THRD_0 +270 0x0000 //RX_TDDRC_THRD_1 +271 0x1800 //RX_TDDRC_THRD_2 +272 0x1800 //RX_TDDRC_THRD_3 +273 0x3000 //RX_TDDRC_SLANT_0 +274 0x6E00 //RX_TDDRC_SLANT_1 +275 0x1000 //RX_TDDRC_ALPHA_UP_0 +276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x199A //RX_TDDRC_HMNC_GAIN +279 0x0001 //RX_TDDRC_SMT_FLAG +280 0x0CCD //RX_TDDRC_SMT_W +281 0x0400 //RX_TDDRC_DRC_GAIN +195 0x0030 //RX_FDEQ_SUBNUM +196 0x4848 //RX_FDEQ_GAIN_0 +197 0x4848 //RX_FDEQ_GAIN_1 +198 0x4844 //RX_FDEQ_GAIN_2 +199 0x4A4C //RX_FDEQ_GAIN_3 +200 0x4E50 //RX_FDEQ_GAIN_4 +201 0x5254 //RX_FDEQ_GAIN_5 +202 0x5658 //RX_FDEQ_GAIN_6 +203 0x5A5C //RX_FDEQ_GAIN_7 +204 0x5C5C //RX_FDEQ_GAIN_8 +205 0x5C5C //RX_FDEQ_GAIN_9 +206 0x5C5C //RX_FDEQ_GAIN_10 +207 0x5C5C //RX_FDEQ_GAIN_11 +208 0x5C5C //RX_FDEQ_GAIN_12 +209 0x5C5C //RX_FDEQ_GAIN_13 +210 0x4848 //RX_FDEQ_GAIN_14 +211 0x4848 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0202 //RX_FDEQ_BIN_0 +221 0x0203 //RX_FDEQ_BIN_1 +222 0x0402 //RX_FDEQ_BIN_2 +223 0x0505 //RX_FDEQ_BIN_3 +224 0x0505 //RX_FDEQ_BIN_4 +225 0x0505 //RX_FDEQ_BIN_5 +226 0x0505 //RX_FDEQ_BIN_6 +227 0x0505 //RX_FDEQ_BIN_7 +228 0x160C //RX_FDEQ_BIN_8 +229 0x0D0E //RX_FDEQ_BIN_9 +230 0x0E0F //RX_FDEQ_BIN_10 +231 0x0F10 //RX_FDEQ_BIN_11 +232 0x1011 //RX_FDEQ_BIN_12 +233 0x1104 //RX_FDEQ_BIN_13 +234 0x0000 //RX_FDEQ_BIN_14 +235 0x0000 //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x4000 //RX_FDEQ_RESRV_0 +245 0x0320 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0030 //RX_FDDRC_BAND_MARGIN_1 +248 0x0050 //RX_FDDRC_BAND_MARGIN_2 +249 0x0080 //RX_FDDRC_BAND_MARGIN_3 +250 0x0007 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x5000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x6400 //RX_FDDRC_THRD_3_2 +258 0x6400 //RX_FDDRC_THRD_3_3 +259 0x2000 //RX_FDDRC_SLANT_0_0 +260 0x2000 //RX_FDDRC_SLANT_0_1 +261 0x2000 //RX_FDDRC_SLANT_0_2 +262 0x2000 //RX_FDDRC_SLANT_0_3 +263 0x5333 //RX_FDDRC_SLANT_1_0 +264 0x5333 //RX_FDDRC_SLANT_1_1 +265 0x5333 //RX_FDDRC_SLANT_1_2 +266 0x5333 //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +286 0x0100 //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 +#VOL 2 +163 0x1000 //RX_TDDRC_ALPHA_UP_1 +164 0x1000 //RX_TDDRC_ALPHA_UP_2 +165 0x1000 //RX_TDDRC_ALPHA_UP_3 +166 0x1000 //RX_TDDRC_ALPHA_UP_4 +184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +190 0x7000 //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +269 0x0000 //RX_TDDRC_THRD_0 +270 0x0000 //RX_TDDRC_THRD_1 +271 0x1800 //RX_TDDRC_THRD_2 +272 0x1800 //RX_TDDRC_THRD_3 +273 0x3000 //RX_TDDRC_SLANT_0 +274 0x6E00 //RX_TDDRC_SLANT_1 +275 0x1000 //RX_TDDRC_ALPHA_UP_0 +276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x199A //RX_TDDRC_HMNC_GAIN +279 0x0001 //RX_TDDRC_SMT_FLAG +280 0x0CCD //RX_TDDRC_SMT_W +281 0x0400 //RX_TDDRC_DRC_GAIN +195 0x0030 //RX_FDEQ_SUBNUM +196 0x4848 //RX_FDEQ_GAIN_0 +197 0x4848 //RX_FDEQ_GAIN_1 +198 0x4844 //RX_FDEQ_GAIN_2 +199 0x4A4C //RX_FDEQ_GAIN_3 +200 0x4E50 //RX_FDEQ_GAIN_4 +201 0x5254 //RX_FDEQ_GAIN_5 +202 0x5658 //RX_FDEQ_GAIN_6 +203 0x5A5C //RX_FDEQ_GAIN_7 +204 0x5C5C //RX_FDEQ_GAIN_8 +205 0x5C5C //RX_FDEQ_GAIN_9 +206 0x5C5C //RX_FDEQ_GAIN_10 +207 0x5C5C //RX_FDEQ_GAIN_11 +208 0x5C5C //RX_FDEQ_GAIN_12 +209 0x5C5C //RX_FDEQ_GAIN_13 +210 0x4848 //RX_FDEQ_GAIN_14 +211 0x4848 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0202 //RX_FDEQ_BIN_0 +221 0x0203 //RX_FDEQ_BIN_1 +222 0x0402 //RX_FDEQ_BIN_2 +223 0x0505 //RX_FDEQ_BIN_3 +224 0x0505 //RX_FDEQ_BIN_4 +225 0x0505 //RX_FDEQ_BIN_5 +226 0x0505 //RX_FDEQ_BIN_6 +227 0x0505 //RX_FDEQ_BIN_7 +228 0x160C //RX_FDEQ_BIN_8 +229 0x0D0E //RX_FDEQ_BIN_9 +230 0x0E0F //RX_FDEQ_BIN_10 +231 0x0F10 //RX_FDEQ_BIN_11 +232 0x1011 //RX_FDEQ_BIN_12 +233 0x1104 //RX_FDEQ_BIN_13 +234 0x0000 //RX_FDEQ_BIN_14 +235 0x0000 //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x4000 //RX_FDEQ_RESRV_0 +245 0x0320 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0030 //RX_FDDRC_BAND_MARGIN_1 +248 0x0050 //RX_FDDRC_BAND_MARGIN_2 +249 0x0080 //RX_FDDRC_BAND_MARGIN_3 +250 0x0007 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x5000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x6400 //RX_FDDRC_THRD_3_2 +258 0x6400 //RX_FDDRC_THRD_3_3 +259 0x2000 //RX_FDDRC_SLANT_0_0 +260 0x2000 //RX_FDDRC_SLANT_0_1 +261 0x2000 //RX_FDDRC_SLANT_0_2 +262 0x2000 //RX_FDDRC_SLANT_0_3 +263 0x5333 //RX_FDDRC_SLANT_1_0 +264 0x5333 //RX_FDDRC_SLANT_1_1 +265 0x5333 //RX_FDDRC_SLANT_1_2 +266 0x5333 //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +286 0x0100 //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 +#VOL 3 +163 0x1000 //RX_TDDRC_ALPHA_UP_1 +164 0x1000 //RX_TDDRC_ALPHA_UP_2 +165 0x1000 //RX_TDDRC_ALPHA_UP_3 +166 0x1000 //RX_TDDRC_ALPHA_UP_4 +184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +190 0x7000 //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +269 0x0000 //RX_TDDRC_THRD_0 +270 0x0000 //RX_TDDRC_THRD_1 +271 0x1800 //RX_TDDRC_THRD_2 +272 0x1800 //RX_TDDRC_THRD_3 +273 0x3000 //RX_TDDRC_SLANT_0 +274 0x6E00 //RX_TDDRC_SLANT_1 +275 0x1000 //RX_TDDRC_ALPHA_UP_0 +276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x199A //RX_TDDRC_HMNC_GAIN +279 0x0001 //RX_TDDRC_SMT_FLAG +280 0x0CCD //RX_TDDRC_SMT_W +281 0x0400 //RX_TDDRC_DRC_GAIN +195 0x0030 //RX_FDEQ_SUBNUM +196 0x4848 //RX_FDEQ_GAIN_0 +197 0x4848 //RX_FDEQ_GAIN_1 +198 0x4844 //RX_FDEQ_GAIN_2 +199 0x4A4C //RX_FDEQ_GAIN_3 +200 0x4E50 //RX_FDEQ_GAIN_4 +201 0x5254 //RX_FDEQ_GAIN_5 +202 0x5658 //RX_FDEQ_GAIN_6 +203 0x5A5C //RX_FDEQ_GAIN_7 +204 0x5C5C //RX_FDEQ_GAIN_8 +205 0x5C5C //RX_FDEQ_GAIN_9 +206 0x5C5C //RX_FDEQ_GAIN_10 +207 0x5C5C //RX_FDEQ_GAIN_11 +208 0x5C5C //RX_FDEQ_GAIN_12 +209 0x5C5C //RX_FDEQ_GAIN_13 +210 0x4848 //RX_FDEQ_GAIN_14 +211 0x4848 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0202 //RX_FDEQ_BIN_0 +221 0x0203 //RX_FDEQ_BIN_1 +222 0x0402 //RX_FDEQ_BIN_2 +223 0x0505 //RX_FDEQ_BIN_3 +224 0x0505 //RX_FDEQ_BIN_4 +225 0x0505 //RX_FDEQ_BIN_5 +226 0x0505 //RX_FDEQ_BIN_6 +227 0x0505 //RX_FDEQ_BIN_7 +228 0x160C //RX_FDEQ_BIN_8 +229 0x0D0E //RX_FDEQ_BIN_9 +230 0x0E0F //RX_FDEQ_BIN_10 +231 0x0F10 //RX_FDEQ_BIN_11 +232 0x1011 //RX_FDEQ_BIN_12 +233 0x1104 //RX_FDEQ_BIN_13 +234 0x0000 //RX_FDEQ_BIN_14 +235 0x0000 //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x4000 //RX_FDEQ_RESRV_0 +245 0x0320 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0030 //RX_FDDRC_BAND_MARGIN_1 +248 0x0050 //RX_FDDRC_BAND_MARGIN_2 +249 0x0080 //RX_FDDRC_BAND_MARGIN_3 +250 0x0007 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x5000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x6400 //RX_FDDRC_THRD_3_2 +258 0x6400 //RX_FDDRC_THRD_3_3 +259 0x2000 //RX_FDDRC_SLANT_0_0 +260 0x2000 //RX_FDDRC_SLANT_0_1 +261 0x2000 //RX_FDDRC_SLANT_0_2 +262 0x2000 //RX_FDDRC_SLANT_0_3 +263 0x5333 //RX_FDDRC_SLANT_1_0 +264 0x5333 //RX_FDDRC_SLANT_1_1 +265 0x5333 //RX_FDDRC_SLANT_1_2 +266 0x5333 //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +286 0x0100 //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 +#VOL 4 +163 0x1000 //RX_TDDRC_ALPHA_UP_1 +164 0x1000 //RX_TDDRC_ALPHA_UP_2 +165 0x1000 //RX_TDDRC_ALPHA_UP_3 +166 0x1000 //RX_TDDRC_ALPHA_UP_4 +184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +190 0x7000 //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +269 0x0000 //RX_TDDRC_THRD_0 +270 0x0000 //RX_TDDRC_THRD_1 +271 0x1800 //RX_TDDRC_THRD_2 +272 0x1800 //RX_TDDRC_THRD_3 +273 0x3000 //RX_TDDRC_SLANT_0 +274 0x6E00 //RX_TDDRC_SLANT_1 +275 0x1000 //RX_TDDRC_ALPHA_UP_0 +276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x199A //RX_TDDRC_HMNC_GAIN +279 0x0001 //RX_TDDRC_SMT_FLAG +280 0x0CCD //RX_TDDRC_SMT_W +281 0x0400 //RX_TDDRC_DRC_GAIN +195 0x0030 //RX_FDEQ_SUBNUM +196 0x4848 //RX_FDEQ_GAIN_0 +197 0x4848 //RX_FDEQ_GAIN_1 +198 0x4844 //RX_FDEQ_GAIN_2 +199 0x4A4C //RX_FDEQ_GAIN_3 +200 0x4E50 //RX_FDEQ_GAIN_4 +201 0x5254 //RX_FDEQ_GAIN_5 +202 0x5658 //RX_FDEQ_GAIN_6 +203 0x5A5C //RX_FDEQ_GAIN_7 +204 0x5C5C //RX_FDEQ_GAIN_8 +205 0x5C5C //RX_FDEQ_GAIN_9 +206 0x5C5C //RX_FDEQ_GAIN_10 +207 0x5C5C //RX_FDEQ_GAIN_11 +208 0x5C5C //RX_FDEQ_GAIN_12 +209 0x5C5C //RX_FDEQ_GAIN_13 +210 0x4848 //RX_FDEQ_GAIN_14 +211 0x4848 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0202 //RX_FDEQ_BIN_0 +221 0x0203 //RX_FDEQ_BIN_1 +222 0x0402 //RX_FDEQ_BIN_2 +223 0x0505 //RX_FDEQ_BIN_3 +224 0x0505 //RX_FDEQ_BIN_4 +225 0x0505 //RX_FDEQ_BIN_5 +226 0x0505 //RX_FDEQ_BIN_6 +227 0x0505 //RX_FDEQ_BIN_7 +228 0x160C //RX_FDEQ_BIN_8 +229 0x0D0E //RX_FDEQ_BIN_9 +230 0x0E0F //RX_FDEQ_BIN_10 +231 0x0F10 //RX_FDEQ_BIN_11 +232 0x1011 //RX_FDEQ_BIN_12 +233 0x1104 //RX_FDEQ_BIN_13 +234 0x0000 //RX_FDEQ_BIN_14 +235 0x0000 //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x4000 //RX_FDEQ_RESRV_0 +245 0x0320 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0030 //RX_FDDRC_BAND_MARGIN_1 +248 0x0050 //RX_FDDRC_BAND_MARGIN_2 +249 0x0080 //RX_FDDRC_BAND_MARGIN_3 +250 0x0007 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x5000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x6400 //RX_FDDRC_THRD_3_2 +258 0x6400 //RX_FDDRC_THRD_3_3 +259 0x2000 //RX_FDDRC_SLANT_0_0 +260 0x2000 //RX_FDDRC_SLANT_0_1 +261 0x2000 //RX_FDDRC_SLANT_0_2 +262 0x2000 //RX_FDDRC_SLANT_0_3 +263 0x5333 //RX_FDDRC_SLANT_1_0 +264 0x5333 //RX_FDDRC_SLANT_1_1 +265 0x5333 //RX_FDDRC_SLANT_1_2 +266 0x5333 //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +286 0x0100 //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 +#VOL 5 +163 0x1000 //RX_TDDRC_ALPHA_UP_1 +164 0x1000 //RX_TDDRC_ALPHA_UP_2 +165 0x1000 //RX_TDDRC_ALPHA_UP_3 +166 0x1000 //RX_TDDRC_ALPHA_UP_4 +184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +190 0x7000 //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +269 0x0000 //RX_TDDRC_THRD_0 +270 0x0000 //RX_TDDRC_THRD_1 +271 0x1800 //RX_TDDRC_THRD_2 +272 0x1800 //RX_TDDRC_THRD_3 +273 0x3000 //RX_TDDRC_SLANT_0 +274 0x6E00 //RX_TDDRC_SLANT_1 +275 0x1000 //RX_TDDRC_ALPHA_UP_0 +276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x199A //RX_TDDRC_HMNC_GAIN +279 0x0001 //RX_TDDRC_SMT_FLAG +280 0x0CCD //RX_TDDRC_SMT_W +281 0x0400 //RX_TDDRC_DRC_GAIN +195 0x0030 //RX_FDEQ_SUBNUM +196 0x4848 //RX_FDEQ_GAIN_0 +197 0x4848 //RX_FDEQ_GAIN_1 +198 0x4844 //RX_FDEQ_GAIN_2 +199 0x4A4C //RX_FDEQ_GAIN_3 +200 0x4E50 //RX_FDEQ_GAIN_4 +201 0x5254 //RX_FDEQ_GAIN_5 +202 0x5658 //RX_FDEQ_GAIN_6 +203 0x5A5C //RX_FDEQ_GAIN_7 +204 0x5C5C //RX_FDEQ_GAIN_8 +205 0x5C5C //RX_FDEQ_GAIN_9 +206 0x5C5C //RX_FDEQ_GAIN_10 +207 0x5C5C //RX_FDEQ_GAIN_11 +208 0x5C5C //RX_FDEQ_GAIN_12 +209 0x5C5C //RX_FDEQ_GAIN_13 +210 0x4848 //RX_FDEQ_GAIN_14 +211 0x4848 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0202 //RX_FDEQ_BIN_0 +221 0x0203 //RX_FDEQ_BIN_1 +222 0x0402 //RX_FDEQ_BIN_2 +223 0x0505 //RX_FDEQ_BIN_3 +224 0x0505 //RX_FDEQ_BIN_4 +225 0x0505 //RX_FDEQ_BIN_5 +226 0x0505 //RX_FDEQ_BIN_6 +227 0x0505 //RX_FDEQ_BIN_7 +228 0x160C //RX_FDEQ_BIN_8 +229 0x0D0E //RX_FDEQ_BIN_9 +230 0x0E0F //RX_FDEQ_BIN_10 +231 0x0F10 //RX_FDEQ_BIN_11 +232 0x1011 //RX_FDEQ_BIN_12 +233 0x1104 //RX_FDEQ_BIN_13 +234 0x0000 //RX_FDEQ_BIN_14 +235 0x0000 //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x4000 //RX_FDEQ_RESRV_0 +245 0x0320 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0030 //RX_FDDRC_BAND_MARGIN_1 +248 0x0050 //RX_FDDRC_BAND_MARGIN_2 +249 0x0080 //RX_FDDRC_BAND_MARGIN_3 +250 0x0007 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x5000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x6400 //RX_FDDRC_THRD_3_2 +258 0x6400 //RX_FDDRC_THRD_3_3 +259 0x2000 //RX_FDDRC_SLANT_0_0 +260 0x2000 //RX_FDDRC_SLANT_0_1 +261 0x2000 //RX_FDDRC_SLANT_0_2 +262 0x2000 //RX_FDDRC_SLANT_0_3 +263 0x5333 //RX_FDDRC_SLANT_1_0 +264 0x5333 //RX_FDDRC_SLANT_1_1 +265 0x5333 //RX_FDDRC_SLANT_1_2 +266 0x5333 //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +286 0x0100 //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 +#VOL 6 +163 0x1000 //RX_TDDRC_ALPHA_UP_1 +164 0x1000 //RX_TDDRC_ALPHA_UP_2 +165 0x1000 //RX_TDDRC_ALPHA_UP_3 +166 0x1000 //RX_TDDRC_ALPHA_UP_4 +184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +190 0x7000 //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +269 0x0000 //RX_TDDRC_THRD_0 +270 0x0000 //RX_TDDRC_THRD_1 +271 0x1800 //RX_TDDRC_THRD_2 +272 0x1800 //RX_TDDRC_THRD_3 +273 0x3000 //RX_TDDRC_SLANT_0 +274 0x6E00 //RX_TDDRC_SLANT_1 +275 0x1000 //RX_TDDRC_ALPHA_UP_0 +276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x199A //RX_TDDRC_HMNC_GAIN +279 0x0001 //RX_TDDRC_SMT_FLAG +280 0x0CCD //RX_TDDRC_SMT_W +281 0x0400 //RX_TDDRC_DRC_GAIN +195 0x0030 //RX_FDEQ_SUBNUM +196 0x4848 //RX_FDEQ_GAIN_0 +197 0x4848 //RX_FDEQ_GAIN_1 +198 0x4844 //RX_FDEQ_GAIN_2 +199 0x4A4C //RX_FDEQ_GAIN_3 +200 0x4E50 //RX_FDEQ_GAIN_4 +201 0x5254 //RX_FDEQ_GAIN_5 +202 0x5658 //RX_FDEQ_GAIN_6 +203 0x5A5C //RX_FDEQ_GAIN_7 +204 0x5C5C //RX_FDEQ_GAIN_8 +205 0x5C5C //RX_FDEQ_GAIN_9 +206 0x5C5C //RX_FDEQ_GAIN_10 +207 0x5C5C //RX_FDEQ_GAIN_11 +208 0x5C5C //RX_FDEQ_GAIN_12 +209 0x5C5C //RX_FDEQ_GAIN_13 +210 0x4848 //RX_FDEQ_GAIN_14 +211 0x4848 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0202 //RX_FDEQ_BIN_0 +221 0x0203 //RX_FDEQ_BIN_1 +222 0x0402 //RX_FDEQ_BIN_2 +223 0x0505 //RX_FDEQ_BIN_3 +224 0x0505 //RX_FDEQ_BIN_4 +225 0x0505 //RX_FDEQ_BIN_5 +226 0x0505 //RX_FDEQ_BIN_6 +227 0x0505 //RX_FDEQ_BIN_7 +228 0x160C //RX_FDEQ_BIN_8 +229 0x0D0E //RX_FDEQ_BIN_9 +230 0x0E0F //RX_FDEQ_BIN_10 +231 0x0F10 //RX_FDEQ_BIN_11 +232 0x1011 //RX_FDEQ_BIN_12 +233 0x1104 //RX_FDEQ_BIN_13 +234 0x0000 //RX_FDEQ_BIN_14 +235 0x0000 //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x4000 //RX_FDEQ_RESRV_0 +245 0x0320 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0030 //RX_FDDRC_BAND_MARGIN_1 +248 0x0050 //RX_FDDRC_BAND_MARGIN_2 +249 0x0080 //RX_FDDRC_BAND_MARGIN_3 +250 0x0007 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x5000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x6400 //RX_FDDRC_THRD_3_2 +258 0x6400 //RX_FDDRC_THRD_3_3 +259 0x2000 //RX_FDDRC_SLANT_0_0 +260 0x2000 //RX_FDDRC_SLANT_0_1 +261 0x2000 //RX_FDDRC_SLANT_0_2 +262 0x2000 //RX_FDDRC_SLANT_0_3 +263 0x5333 //RX_FDDRC_SLANT_1_0 +264 0x5333 //RX_FDDRC_SLANT_1_1 +265 0x5333 //RX_FDDRC_SLANT_1_2 +266 0x5333 //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +286 0x0100 //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 #CASE_NAME HANDSET-HANDSET_HAC-TMOBILE_US-SWB -#PARAM_TYPE TX+RX -#TOTAL_CUSTOM_STEP 7 +#PARAM_MODE Full +#PARAM_TYPE TX+2RX +#TOTAL_CUSTOM_STEP 7+7 #TX 0 0x0000 //TX_OPERATION_MODE_0 1 0x0000 //TX_OPERATION_MODE_1 -2 0x0026 //TX_PATCH_REG +2 0x0076 //TX_PATCH_REG 3 0x6F7E //TX_SENDFUNC_MODE_0 4 0x0001 //TX_SENDFUNC_MODE_1 5 0x0002 //TX_NUM_MIC @@ -29829,7 +45419,7 @@ 18 0x0000 //TX_SYS_RESRV_2 19 0x0000 //TX_SYS_RESRV_3 20 0x0000 //TX_DIST2REF0 -21 0x009D //TX_DIST2REF1 +21 0x009C //TX_DIST2REF1 22 0x0000 //TX_DIST2REF_02 23 0x0000 //TX_DIST2REF_03 24 0x0000 //TX_DIST2REF_04 @@ -30059,12 +45649,12 @@ 248 0xF800 //TX_THR_SN_EST_6 249 0xF700 //TX_THR_SN_EST_7 250 0x0000 //TX_DELTA_THR_SN_EST_0 -251 0x0100 //TX_DELTA_THR_SN_EST_1 +251 0x0200 //TX_DELTA_THR_SN_EST_1 252 0x0200 //TX_DELTA_THR_SN_EST_2 253 0x0200 //TX_DELTA_THR_SN_EST_3 -254 0x0200 //TX_DELTA_THR_SN_EST_4 -255 0x0100 //TX_DELTA_THR_SN_EST_5 -256 0x0200 //TX_DELTA_THR_SN_EST_6 +254 0x0100 //TX_DELTA_THR_SN_EST_4 +255 0x0200 //TX_DELTA_THR_SN_EST_5 +256 0x0100 //TX_DELTA_THR_SN_EST_6 257 0x0200 //TX_DELTA_THR_SN_EST_7 258 0x4000 //TX_LAMBDA_NN_EST_0 259 0x4000 //TX_LAMBDA_NN_EST_1 @@ -30090,18 +45680,18 @@ 279 0x1000 //TX_B_POST_FLT_0 280 0x1000 //TX_B_POST_FLT_1 281 0x0014 //TX_NS_LVL_CTRL_0 -282 0x0016 //TX_NS_LVL_CTRL_1 -283 0x002C //TX_NS_LVL_CTRL_2 -284 0x0016 //TX_NS_LVL_CTRL_3 -285 0x0018 //TX_NS_LVL_CTRL_4 -286 0x0016 //TX_NS_LVL_CTRL_5 -287 0x0012 //TX_NS_LVL_CTRL_6 +282 0x002C //TX_NS_LVL_CTRL_1 +283 0x0016 //TX_NS_LVL_CTRL_2 +284 0x0018 //TX_NS_LVL_CTRL_3 +285 0x0016 //TX_NS_LVL_CTRL_4 +286 0x0012 //TX_NS_LVL_CTRL_5 +287 0x0016 //TX_NS_LVL_CTRL_6 288 0x0017 //TX_NS_LVL_CTRL_7 289 0x000E //TX_MIN_GAIN_S_0 -290 0x0012 //TX_MIN_GAIN_S_1 -291 0x000D //TX_MIN_GAIN_S_2 -292 0x0012 //TX_MIN_GAIN_S_3 -293 0x0010 //TX_MIN_GAIN_S_4 +290 0x000D //TX_MIN_GAIN_S_1 +291 0x0012 //TX_MIN_GAIN_S_2 +292 0x0010 //TX_MIN_GAIN_S_3 +293 0x0012 //TX_MIN_GAIN_S_4 294 0x0012 //TX_MIN_GAIN_S_5 295 0x0012 //TX_MIN_GAIN_S_6 296 0x0012 //TX_MIN_GAIN_S_7 @@ -30123,29 +45713,29 @@ 312 0x7FFF //TX_A_POST_FILT_0 313 0x2000 //TX_A_POST_FILT_1 314 0x4000 //TX_A_POST_FILT_S_0 -315 0x5000 //TX_A_POST_FILT_S_1 +315 0x4000 //TX_A_POST_FILT_S_1 316 0x4000 //TX_A_POST_FILT_S_2 317 0x4000 //TX_A_POST_FILT_S_3 318 0x4000 //TX_A_POST_FILT_S_4 319 0x4000 //TX_A_POST_FILT_S_5 -320 0x4000 //TX_A_POST_FILT_S_6 +320 0x5000 //TX_A_POST_FILT_S_6 321 0x7000 //TX_A_POST_FILT_S_7 322 0x1000 //TX_B_POST_FILT_0 323 0x1000 //TX_B_POST_FILT_1 -324 0x3000 //TX_B_POST_FILT_2 -325 0x1000 //TX_B_POST_FILT_3 -326 0x5000 //TX_B_POST_FILT_4 -327 0x2000 //TX_B_POST_FILT_5 -328 0x6000 //TX_B_POST_FILT_6 +324 0x2000 //TX_B_POST_FILT_2 +325 0x2000 //TX_B_POST_FILT_3 +326 0x2000 //TX_B_POST_FILT_4 +327 0x1000 //TX_B_POST_FILT_5 +328 0x3000 //TX_B_POST_FILT_6 329 0x3000 //TX_B_POST_FILT_7 330 0x1000 //TX_B_LESSCUT_RTO_S_0 -331 0x6000 //TX_B_LESSCUT_RTO_S_1 -332 0x6000 //TX_B_LESSCUT_RTO_S_2 -333 0x6000 //TX_B_LESSCUT_RTO_S_3 -334 0x6000 //TX_B_LESSCUT_RTO_S_4 -335 0x6000 //TX_B_LESSCUT_RTO_S_5 -336 0x7FFF //TX_B_LESSCUT_RTO_S_6 -337 0x7FFF //TX_B_LESSCUT_RTO_S_7 +331 0x1000 //TX_B_LESSCUT_RTO_S_1 +332 0x1000 //TX_B_LESSCUT_RTO_S_2 +333 0x1000 //TX_B_LESSCUT_RTO_S_3 +334 0x1000 //TX_B_LESSCUT_RTO_S_4 +335 0x1000 //TX_B_LESSCUT_RTO_S_5 +336 0x1000 //TX_B_LESSCUT_RTO_S_6 +337 0x1000 //TX_B_LESSCUT_RTO_S_7 338 0x7E14 //TX_LAMBDA_PFILT 339 0x7C29 //TX_LAMBDA_PFILT_S_0 340 0x7C29 //TX_LAMBDA_PFILT_S_1 @@ -30188,10 +45778,10 @@ 377 0x4E20 //TX_NOISE_TH_5_4 378 0x1194 //TX_NOISE_TH_6 379 0x0014 //TX_MINENOISE_TH -380 0x4000 //TX_MINENOISE_MIC0_TH_MTS -381 0xFFEE //TX_MINENOISE_MIC0_TH_EXP -382 0x6000 //TX_MINENOISE_MIC0_S_TH_MTS -383 0xFFF3 //TX_MINENOISE_MIC0_S_TH_EXP +380 0xD508 //TX_MORENS_TFMASK_TH +381 0x0001 //TX_DRC_QUIET_FLOOR +382 0x6D60 //TX_RATIODTL_CUT_TH +383 0x0DAC //TX_DT_CUT_K1 384 0x00A5 //TX_OUT_ENER_S_TH_CLEAN 385 0x00A5 //TX_OUT_ENER_S_TH_LESSCLEAN 386 0x00A5 //TX_OUT_ENER_S_TH_NOISY @@ -30199,15 +45789,15 @@ 388 0x0200 //TX_OUT_ENER_TH_SPEECH 389 0x2000 //TX_SN_NPB_GAIN 390 0x0000 //TX_NN_NPB_GAIN -391 0x0000 //TX_CSX_ALPHA_0 -392 0x0000 //TX_CSX_ALPHA_1 -393 0x0000 //TX_CSX_ALPHA_2 -394 0x0000 //TX_CSX_ALPHA_3 -395 0x0800 //TX_MU_ARSP_EST -396 0x00C8 //TX_P_OUTBEAM_MIN_TH +391 0x3000 //TX_POST_MASK_SUP_HSNE +392 0x07D0 //TX_TAIL_DET_TH +393 0x4000 //TX_B_LESSCUT_RTO_WTA +394 0x0000 //TX_MEL_G_R +395 0x0080 //TX_SUPHIGH_TH +396 0x0000 //TX_MASK_G_R 397 0x0002 //TX_EXTRA_NS_L -398 0x0800 //TX_EXTRA_NS_A -399 0x0005 //TX_VR_NOISE_FLOOR_TH +398 0x1800 //TX_C_POST_FLT_MASK +399 0x7FFF //TX_A_POST_FLT_WNS 400 0x0148 //TX_MIN_G_LOW300HZ 401 0x0004 //TX_MAXLEVEL_CNG 402 0x00B4 //TX_STN_NOISE_TH @@ -30322,16 +45912,16 @@ 511 0x6666 //TX_MIC_TO_BFGAIN 512 0x0000 //TX_MICTOBFGAIN0 513 0x0000 //TX_FASTMUE_TH -514 0x0000 //TX_DERVB_LEN_0 -515 0x0000 //TX_DERVB_LEN_1 -516 0x0000 //TX_RHO_DERVB -517 0x0000 //TX_MIC_INDX_DERVB -518 0x0000 //TX_MU_DERVB -519 0x0000 //TX_DR_RESRV_0 -520 0x0000 //TX_DR_RESRV_1 -521 0x0000 //TX_DR_RESRV_2 -522 0x0000 //TX_DR_RESRV_3 -523 0x0000 //TX_DR_RESRV_4 +514 0x2CCC //TX_DEREVERB_LF_MU +515 0x3200 //TX_DEREVERB_HF_MU +516 0x0007 //TX_DEREVERB_DELAY +517 0x0004 //TX_DEREVERB_COEF_LEN +518 0x0003 //TX_DEREVERB_DNR +519 0x0000 //TX_DEREVERB_ALPHA +520 0x0000 //TX_DEREVERB_BETA +521 0x3A98 //TX_GSC_RTOL_TH +522 0x3A98 //TX_GSC_RTOH_TH +523 0x7E2C //TX_WIDE2_MEANHTH 524 0x0000 //TX_DR_RESRV_5 525 0x0000 //TX_DR_RESRV_6 526 0x0000 //TX_DR_RESRV_7 @@ -30378,19 +45968,19 @@ 567 0x5C54 //TX_FDEQ_GAIN_0 568 0x5048 //TX_FDEQ_GAIN_1 569 0x4C4C //TX_FDEQ_GAIN_2 -570 0x474F //TX_FDEQ_GAIN_3 -571 0x4842 //TX_FDEQ_GAIN_4 -572 0x4541 //TX_FDEQ_GAIN_5 -573 0x4247 //TX_FDEQ_GAIN_6 -574 0x4743 //TX_FDEQ_GAIN_7 -575 0x4445 //TX_FDEQ_GAIN_8 -576 0x4750 //TX_FDEQ_GAIN_9 -577 0x3F48 //TX_FDEQ_GAIN_10 -578 0x4844 //TX_FDEQ_GAIN_11 -579 0x3E48 //TX_FDEQ_GAIN_12 -580 0x4E4A //TX_FDEQ_GAIN_13 -581 0x5459 //TX_FDEQ_GAIN_14 -582 0x6448 //TX_FDEQ_GAIN_15 +570 0x474A //TX_FDEQ_GAIN_3 +571 0x4640 //TX_FDEQ_GAIN_4 +572 0x4446 //TX_FDEQ_GAIN_5 +573 0x4B53 //TX_FDEQ_GAIN_6 +574 0x5448 //TX_FDEQ_GAIN_7 +575 0x4243 //TX_FDEQ_GAIN_8 +576 0x434C //TX_FDEQ_GAIN_9 +577 0x484D //TX_FDEQ_GAIN_10 +578 0x4D4D //TX_FDEQ_GAIN_11 +579 0x4B4E //TX_FDEQ_GAIN_12 +580 0x5054 //TX_FDEQ_GAIN_13 +581 0x5D68 //TX_FDEQ_GAIN_14 +582 0x7C6B //TX_FDEQ_GAIN_15 583 0x4848 //TX_FDEQ_GAIN_16 584 0x4848 //TX_FDEQ_GAIN_17 585 0x4848 //TX_FDEQ_GAIN_18 @@ -30433,14 +46023,14 @@ 622 0x4848 //TX_PREEQ_GAIN_MIC0_5 623 0x4848 //TX_PREEQ_GAIN_MIC0_6 624 0x4848 //TX_PREEQ_GAIN_MIC0_7 -625 0x4646 //TX_PREEQ_GAIN_MIC0_8 -626 0x4545 //TX_PREEQ_GAIN_MIC0_9 -627 0x4545 //TX_PREEQ_GAIN_MIC0_10 -628 0x4544 //TX_PREEQ_GAIN_MIC0_11 -629 0x4444 //TX_PREEQ_GAIN_MIC0_12 -630 0x4343 //TX_PREEQ_GAIN_MIC0_13 -631 0x4241 //TX_PREEQ_GAIN_MIC0_14 -632 0x3C3E //TX_PREEQ_GAIN_MIC0_15 +625 0x4848 //TX_PREEQ_GAIN_MIC0_8 +626 0x4848 //TX_PREEQ_GAIN_MIC0_9 +627 0x4848 //TX_PREEQ_GAIN_MIC0_10 +628 0x4848 //TX_PREEQ_GAIN_MIC0_11 +629 0x4848 //TX_PREEQ_GAIN_MIC0_12 +630 0x4848 //TX_PREEQ_GAIN_MIC0_13 +631 0x4848 //TX_PREEQ_GAIN_MIC0_14 +632 0x4848 //TX_PREEQ_GAIN_MIC0_15 633 0x4848 //TX_PREEQ_GAIN_MIC0_16 634 0x4848 //TX_PREEQ_GAIN_MIC0_17 635 0x4848 //TX_PREEQ_GAIN_MIC0_18 @@ -30482,15 +46072,15 @@ 671 0x4848 //TX_PREEQ_GAIN_MIC1_5 672 0x4848 //TX_PREEQ_GAIN_MIC1_6 673 0x4848 //TX_PREEQ_GAIN_MIC1_7 -674 0x484A //TX_PREEQ_GAIN_MIC1_8 -675 0x4B4C //TX_PREEQ_GAIN_MIC1_9 -676 0x4B4A //TX_PREEQ_GAIN_MIC1_10 -677 0x4A48 //TX_PREEQ_GAIN_MIC1_11 -678 0x4C4C //TX_PREEQ_GAIN_MIC1_12 -679 0x4C4C //TX_PREEQ_GAIN_MIC1_13 -680 0x4848 //TX_PREEQ_GAIN_MIC1_14 -681 0x4848 //TX_PREEQ_GAIN_MIC1_15 -682 0x4848 //TX_PREEQ_GAIN_MIC1_16 +674 0x4848 //TX_PREEQ_GAIN_MIC1_8 +675 0x494A //TX_PREEQ_GAIN_MIC1_9 +676 0x4B4B //TX_PREEQ_GAIN_MIC1_10 +677 0x4B4B //TX_PREEQ_GAIN_MIC1_11 +678 0x4D4C //TX_PREEQ_GAIN_MIC1_12 +679 0x4A48 //TX_PREEQ_GAIN_MIC1_13 +680 0x4840 //TX_PREEQ_GAIN_MIC1_14 +681 0x3434 //TX_PREEQ_GAIN_MIC1_15 +682 0x3C48 //TX_PREEQ_GAIN_MIC1_16 683 0x4848 //TX_PREEQ_GAIN_MIC1_17 684 0x4848 //TX_PREEQ_GAIN_MIC1_18 685 0x4848 //TX_PREEQ_GAIN_MIC1_19 @@ -30504,17 +46094,17 @@ 693 0x0304 //TX_PREEQ_BIN_MIC1_3 694 0x0405 //TX_PREEQ_BIN_MIC1_4 695 0x0506 //TX_PREEQ_BIN_MIC1_5 -696 0x0708 //TX_PREEQ_BIN_MIC1_6 -697 0x090A //TX_PREEQ_BIN_MIC1_7 -698 0x0B0C //TX_PREEQ_BIN_MIC1_8 -699 0x0D0E //TX_PREEQ_BIN_MIC1_9 -700 0x0F10 //TX_PREEQ_BIN_MIC1_10 -701 0x1011 //TX_PREEQ_BIN_MIC1_11 -702 0x1112 //TX_PREEQ_BIN_MIC1_12 -703 0x120B //TX_PREEQ_BIN_MIC1_13 -704 0x0000 //TX_PREEQ_BIN_MIC1_14 -705 0x0000 //TX_PREEQ_BIN_MIC1_15 -706 0x0000 //TX_PREEQ_BIN_MIC1_16 +696 0x0808 //TX_PREEQ_BIN_MIC1_6 +697 0x0809 //TX_PREEQ_BIN_MIC1_7 +698 0x0A0A //TX_PREEQ_BIN_MIC1_8 +699 0x0C10 //TX_PREEQ_BIN_MIC1_9 +700 0x1013 //TX_PREEQ_BIN_MIC1_10 +701 0x1414 //TX_PREEQ_BIN_MIC1_11 +702 0x261E //TX_PREEQ_BIN_MIC1_12 +703 0x1E14 //TX_PREEQ_BIN_MIC1_13 +704 0x1414 //TX_PREEQ_BIN_MIC1_14 +705 0x2814 //TX_PREEQ_BIN_MIC1_15 +706 0x401E //TX_PREEQ_BIN_MIC1_16 707 0x0000 //TX_PREEQ_BIN_MIC1_17 708 0x0000 //TX_PREEQ_BIN_MIC1_18 709 0x0000 //TX_PREEQ_BIN_MIC1_19 @@ -30582,7 +46172,7 @@ 771 0x0046 //TX_MIC_PWR_BIAS_2 772 0x0046 //TX_MIC_PWR_BIAS_3 773 0x0000 //TX_GAIN_LIMIT_0 -774 0x0006 //TX_GAIN_LIMIT_1 +774 0x0005 //TX_GAIN_LIMIT_1 775 0x0000 //TX_GAIN_LIMIT_2 776 0x0000 //TX_GAIN_LIMIT_3 777 0x7F5B //TX_BVE_NOVAD0_ALPHADOWN @@ -30674,7 +46264,7 @@ 863 0x199A //TX_TDDRC_HMNC_GAIN 864 0x0000 //TX_TDDRC_SMT_FLAG 865 0x0CCD //TX_TDDRC_SMT_W -866 0x05F7 //TX_TDDRC_DRC_GAIN +866 0x0504 //TX_TDDRC_DRC_GAIN 867 0x7FFF //TX_TDDRC_LMT_THRD 868 0x0000 //TX_TDDRC_LMT_ALPHA 869 0x0000 //TX_TFMASKLTH @@ -30705,6 +46295,71 @@ 894 0xC000 //TX_FASTNS_SSA_THHFL 895 0xCCCC //TX_FASTNS_SSA_THLFH 896 0xD999 //TX_FASTNS_SSA_THHFH +897 0x2339 //TX_SENDFUNC_REG_MICMUTE +898 0x0021 //TX_SENDFUNC_REG_MICMUTE1 +899 0x02BC //TX_MICMUTE_RATIO_THR +900 0x0140 //TX_MICMUTE_AMP_THR +901 0x0004 //TX_MICMUTE_HPF_IND +902 0x00C0 //TX_MICMUTE_LOG_EYR_TH +903 0x0008 //TX_MICMUTE_CVG_TIME +904 0x0008 //TX_MICMUTE_RELEASE_TIME +905 0x01FE //TX_MIC_VOLUME_MIC0MUTE +906 0x0020 //TX_MICMUTE_EPD_OFFSET_0 +907 0x001E //TX_MICMUTE_FRQ_AEC_L +908 0x7999 //TX_MICMUTE_EAD_THR +909 0x7FFF //TX_MICMUTE_LAMBDA_CB_NLE +910 0x7FFF //TX_MICMUTE_LAMBDA_RE_EST +911 0x4000 //TX_DTD_THR1_MICMUTE_0 +912 0x7000 //TX_DTD_THR1_MICMUTE_1 +913 0x7FFF //TX_DTD_THR1_MICMUTE_2 +914 0x7FFF //TX_DTD_THR1_MICMUTE_3 +915 0x6CCC //TX_DTD_THR2_MICMUTE_0 +916 0x0400 //TX_MICMUTE_MIN_EQ_RE_EST_0 +917 0x0400 //TX_MICMUTE_MIN_EQ_RE_EST_1 +918 0x1000 //TX_MICMUTE_MIN_EQ_RE_EST_2 +919 0x7FFF //TX_MICMUTE_MIN_EQ_RE_EST_3 +920 0x7FFF //TX_MICMUTE_MIN_EQ_RE_EST_4 +921 0x4000 //TX_MICMUTE_C_POST_FLT +922 0x03E8 //TX_MICMUTE_DT_CUT_K +923 0x0001 //TX_MICMUTE_DT_CUT_THR +924 0x03E8 //TX_MICMUTE_DT_CUT_K2 +925 0x0001 //TX_MICMUTE_DT_CUT_THR2 +926 0x0064 //TX_MICMUTE_DT2_HOLD_N +927 0x1000 //TX_MICMUTE_RATIODTH_THCUT +928 0x1000 //TX_MICMUTE_B_POST_FLT_ECHOL +929 0x7FFF //TX_MICMUTE_B_POST_FLT_ECHOH +930 0x0400 //TX_MICMUTE_C_POST_FLT_MASK +931 0x7999 //TX_MICMUTE_RATIODTL_CUT_TH +932 0x0258 //TX_MICMUTE_DT_CUT_K1 +933 0x0800 //TX_MICMUTE_N2_SN_EST +934 0xFC00 //TX_MICMUTE_THR_SN_EST_0 +935 0x001C //TX_MICMUTE_MIN_G_CTRL_0 +936 0x6000 //TX_MICMUTE_A_POST_FILT_S_0 +937 0x7000 //TX_MICMUTE_B_POST_FILT_0 +938 0x2710 //TX_MIC1RUB_AMP_THR +939 0x0010 //TX_MIC1MUTE_RATIO_THR +940 0x0450 //TX_MIC1MUTE_AMP_THR +941 0x0008 //TX_MIC1MUTE_CVG_TIME +942 0x0008 //TX_MIC1MUTE_RELEASE_TIME +943 0x0000 //TX_AMS_RESRV_01 +944 0x0000 //TX_AMS_RESRV_02 +945 0x0000 //TX_AMS_RESRV_03 +946 0x0000 //TX_AMS_RESRV_04 +947 0x0000 //TX_AMS_RESRV_05 +948 0x0000 //TX_AMS_RESRV_06 +949 0x0000 //TX_AMS_RESRV_07 +950 0x0000 //TX_AMS_RESRV_08 +951 0x0000 //TX_AMS_RESRV_09 +952 0x0000 //TX_AMS_RESRV_10 +953 0x0000 //TX_AMS_RESRV_11 +954 0x0000 //TX_AMS_RESRV_12 +955 0x0000 //TX_AMS_RESRV_13 +956 0x0000 //TX_AMS_RESRV_14 +957 0x0000 //TX_AMS_RESRV_15 +958 0x0000 //TX_AMS_RESRV_16 +959 0x0000 //TX_AMS_RESRV_17 +960 0x0000 //TX_AMS_RESRV_18 +961 0x0000 //TX_AMS_RESRV_19 #RX 0 0x000C //RX_RECVFUNC_MODE_0 1 0x0000 //RX_RECVFUNC_MODE_1 @@ -31556,10 +47211,862 @@ 110 0x0000 //RX_FDDRC_RESRV_0 129 0x0100 //RX_SPK_VOL 130 0x0000 //RX_VOL_RESRV_0 +#RX 2 +157 0x000C //RX_RECVFUNC_MODE_0 +158 0x0000 //RX_RECVFUNC_MODE_1 +159 0x0003 //RX_SAMPLINGFREQ_SIG +160 0x0003 //RX_SAMPLINGFREQ_PROC +161 0x000A //RX_FRAME_SZ +162 0x0000 //RX_DELAY_OPT +163 0x1000 //RX_TDDRC_ALPHA_UP_1 +164 0x1000 //RX_TDDRC_ALPHA_UP_2 +165 0x1000 //RX_TDDRC_ALPHA_UP_3 +166 0x1000 //RX_TDDRC_ALPHA_UP_4 +167 0x0800 //RX_PGA +168 0x7FFF //RX_A_HP +169 0x4000 //RX_B_PE +170 0x5800 //RX_THR_PITCH_DET_0 +171 0x5000 //RX_THR_PITCH_DET_1 +172 0x4000 //RX_THR_PITCH_DET_2 +173 0x0008 //RX_PITCH_BFR_LEN +174 0x0003 //RX_SBD_PITCH_DET +175 0x0100 //RX_PP_RESRV_0 +176 0x0020 //RX_PP_RESRV_1 +177 0x0600 //RX_N_SN_EST +178 0x000C //RX_N2_SN_EST +179 0x000F //RX_NS_LVL_CTRL +180 0xF800 //RX_THR_SN_EST +181 0x7E00 //RX_LAMBDA_PFILT +182 0x000A //RX_FENS_RESRV_0 +183 0x0190 //RX_FENS_RESRV_1 +184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +187 0x0002 //RX_EXTRA_NS_L +188 0x0800 //RX_EXTRA_NS_A +189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +190 0x7000 //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +192 0x199A //RX_A_POST_FLT +193 0x0000 //RX_LMT_THRD +194 0x4000 //RX_LMT_ALPHA +195 0x0030 //RX_FDEQ_SUBNUM +196 0x4848 //RX_FDEQ_GAIN_0 +197 0x4848 //RX_FDEQ_GAIN_1 +198 0x4844 //RX_FDEQ_GAIN_2 +199 0x4B4D //RX_FDEQ_GAIN_3 +200 0x4E50 //RX_FDEQ_GAIN_4 +201 0x5254 //RX_FDEQ_GAIN_5 +202 0x5658 //RX_FDEQ_GAIN_6 +203 0x5C60 //RX_FDEQ_GAIN_7 +204 0x6468 //RX_FDEQ_GAIN_8 +205 0x6C70 //RX_FDEQ_GAIN_9 +206 0x7474 //RX_FDEQ_GAIN_10 +207 0x7474 //RX_FDEQ_GAIN_11 +208 0x7474 //RX_FDEQ_GAIN_12 +209 0x7474 //RX_FDEQ_GAIN_13 +210 0x7474 //RX_FDEQ_GAIN_14 +211 0x7474 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0202 //RX_FDEQ_BIN_0 +221 0x0203 //RX_FDEQ_BIN_1 +222 0x0402 //RX_FDEQ_BIN_2 +223 0x0304 //RX_FDEQ_BIN_3 +224 0x0405 //RX_FDEQ_BIN_4 +225 0x0506 //RX_FDEQ_BIN_5 +226 0x0708 //RX_FDEQ_BIN_6 +227 0x090A //RX_FDEQ_BIN_7 +228 0x0B0C //RX_FDEQ_BIN_8 +229 0x0D0E //RX_FDEQ_BIN_9 +230 0x1214 //RX_FDEQ_BIN_10 +231 0x1E1E //RX_FDEQ_BIN_11 +232 0x1E1E //RX_FDEQ_BIN_12 +233 0x1E1E //RX_FDEQ_BIN_13 +234 0x1E1E //RX_FDEQ_BIN_14 +235 0x202C //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x4000 //RX_FDEQ_RESRV_0 +245 0x0320 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0030 //RX_FDDRC_BAND_MARGIN_1 +248 0x0050 //RX_FDDRC_BAND_MARGIN_2 +249 0x0080 //RX_FDDRC_BAND_MARGIN_3 +250 0x0007 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x5000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x6400 //RX_FDDRC_THRD_3_2 +258 0x6400 //RX_FDDRC_THRD_3_3 +259 0x2000 //RX_FDDRC_SLANT_0_0 +260 0x2000 //RX_FDDRC_SLANT_0_1 +261 0x2000 //RX_FDDRC_SLANT_0_2 +262 0x2000 //RX_FDDRC_SLANT_0_3 +263 0x5333 //RX_FDDRC_SLANT_1_0 +264 0x5333 //RX_FDDRC_SLANT_1_1 +265 0x5333 //RX_FDDRC_SLANT_1_2 +266 0x5333 //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +268 0x0002 //RX_FILTINDX +269 0x0000 //RX_TDDRC_THRD_0 +270 0x0000 //RX_TDDRC_THRD_1 +271 0x1800 //RX_TDDRC_THRD_2 +272 0x1800 //RX_TDDRC_THRD_3 +273 0x3000 //RX_TDDRC_SLANT_0 +274 0x6E00 //RX_TDDRC_SLANT_1 +275 0x1000 //RX_TDDRC_ALPHA_UP_0 +276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x199A //RX_TDDRC_HMNC_GAIN +279 0x0001 //RX_TDDRC_SMT_FLAG +280 0x0CCD //RX_TDDRC_SMT_W +281 0x01E0 //RX_TDDRC_DRC_GAIN +282 0x7C00 //RX_LAMBDA_PKA_FP +283 0x2000 //RX_TPKA_FP +284 0x2000 //RX_MIN_G_FP +285 0x0080 //RX_MAX_G_FP +286 0x0100 //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 +288 0x0000 //RX_MAXLEVEL_CNG +289 0x3000 //RX_BWE_UV_TH +290 0x3000 //RX_BWE_UV_TH2 +291 0x1800 //RX_BWE_UV_TH3 +292 0x1000 //RX_BWE_V_TH +293 0x04CD //RX_BWE_GAIN1_V_TH1 +294 0x0F33 //RX_BWE_GAIN1_V_TH2 +295 0x7333 //RX_BWE_UV_EQ +296 0x199A //RX_BWE_V_EQ +297 0x7333 //RX_BWE_TONE_TH +298 0x0004 //RX_BWE_UV_HOLD_T +299 0x6CCD //RX_BWE_GAIN2_ALPHA +300 0x799A //RX_BWE_GAIN3_ALPHA +301 0x001E //RX_BWE_CUTOFF +302 0x3000 //RX_BWE_GAINFILL +303 0x3200 //RX_BWE_MAXTH_TONE +304 0x2000 //RX_BWE_EQ_0 +305 0x2000 //RX_BWE_EQ_1 +306 0x2000 //RX_BWE_EQ_2 +307 0x2000 //RX_BWE_EQ_3 +308 0x2000 //RX_BWE_EQ_4 +309 0x2000 //RX_BWE_EQ_5 +310 0x2000 //RX_BWE_EQ_6 +311 0x0000 //RX_BWE_RESRV_0 +312 0x0000 //RX_BWE_RESRV_1 +313 0x0000 //RX_BWE_RESRV_2 +#VOL 0 +163 0x1000 //RX_TDDRC_ALPHA_UP_1 +164 0x1000 //RX_TDDRC_ALPHA_UP_2 +165 0x1000 //RX_TDDRC_ALPHA_UP_3 +166 0x1000 //RX_TDDRC_ALPHA_UP_4 +184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +190 0x7000 //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +269 0x0000 //RX_TDDRC_THRD_0 +270 0x0000 //RX_TDDRC_THRD_1 +271 0x1800 //RX_TDDRC_THRD_2 +272 0x1800 //RX_TDDRC_THRD_3 +273 0x3000 //RX_TDDRC_SLANT_0 +274 0x6E00 //RX_TDDRC_SLANT_1 +275 0x1000 //RX_TDDRC_ALPHA_UP_0 +276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x199A //RX_TDDRC_HMNC_GAIN +279 0x0001 //RX_TDDRC_SMT_FLAG +280 0x0CCD //RX_TDDRC_SMT_W +281 0x01E0 //RX_TDDRC_DRC_GAIN +195 0x0030 //RX_FDEQ_SUBNUM +196 0x4848 //RX_FDEQ_GAIN_0 +197 0x4848 //RX_FDEQ_GAIN_1 +198 0x4844 //RX_FDEQ_GAIN_2 +199 0x4B4D //RX_FDEQ_GAIN_3 +200 0x4E50 //RX_FDEQ_GAIN_4 +201 0x5254 //RX_FDEQ_GAIN_5 +202 0x5658 //RX_FDEQ_GAIN_6 +203 0x5C60 //RX_FDEQ_GAIN_7 +204 0x6468 //RX_FDEQ_GAIN_8 +205 0x6C70 //RX_FDEQ_GAIN_9 +206 0x7474 //RX_FDEQ_GAIN_10 +207 0x7474 //RX_FDEQ_GAIN_11 +208 0x7474 //RX_FDEQ_GAIN_12 +209 0x7474 //RX_FDEQ_GAIN_13 +210 0x7474 //RX_FDEQ_GAIN_14 +211 0x7474 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0202 //RX_FDEQ_BIN_0 +221 0x0203 //RX_FDEQ_BIN_1 +222 0x0402 //RX_FDEQ_BIN_2 +223 0x0304 //RX_FDEQ_BIN_3 +224 0x0405 //RX_FDEQ_BIN_4 +225 0x0506 //RX_FDEQ_BIN_5 +226 0x0708 //RX_FDEQ_BIN_6 +227 0x090A //RX_FDEQ_BIN_7 +228 0x0B0C //RX_FDEQ_BIN_8 +229 0x0D0E //RX_FDEQ_BIN_9 +230 0x1214 //RX_FDEQ_BIN_10 +231 0x1E1E //RX_FDEQ_BIN_11 +232 0x1E1E //RX_FDEQ_BIN_12 +233 0x1E1E //RX_FDEQ_BIN_13 +234 0x1E1E //RX_FDEQ_BIN_14 +235 0x202C //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x4000 //RX_FDEQ_RESRV_0 +245 0x0320 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0030 //RX_FDDRC_BAND_MARGIN_1 +248 0x0050 //RX_FDDRC_BAND_MARGIN_2 +249 0x0080 //RX_FDDRC_BAND_MARGIN_3 +250 0x0007 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x5000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x6400 //RX_FDDRC_THRD_3_2 +258 0x6400 //RX_FDDRC_THRD_3_3 +259 0x2000 //RX_FDDRC_SLANT_0_0 +260 0x2000 //RX_FDDRC_SLANT_0_1 +261 0x2000 //RX_FDDRC_SLANT_0_2 +262 0x2000 //RX_FDDRC_SLANT_0_3 +263 0x5333 //RX_FDDRC_SLANT_1_0 +264 0x5333 //RX_FDDRC_SLANT_1_1 +265 0x5333 //RX_FDDRC_SLANT_1_2 +266 0x5333 //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +286 0x0100 //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 +#VOL 1 +163 0x1000 //RX_TDDRC_ALPHA_UP_1 +164 0x1000 //RX_TDDRC_ALPHA_UP_2 +165 0x1000 //RX_TDDRC_ALPHA_UP_3 +166 0x1000 //RX_TDDRC_ALPHA_UP_4 +184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +190 0x7000 //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +269 0x0000 //RX_TDDRC_THRD_0 +270 0x0000 //RX_TDDRC_THRD_1 +271 0x1800 //RX_TDDRC_THRD_2 +272 0x1800 //RX_TDDRC_THRD_3 +273 0x3000 //RX_TDDRC_SLANT_0 +274 0x6E00 //RX_TDDRC_SLANT_1 +275 0x1000 //RX_TDDRC_ALPHA_UP_0 +276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x199A //RX_TDDRC_HMNC_GAIN +279 0x0001 //RX_TDDRC_SMT_FLAG +280 0x0CCD //RX_TDDRC_SMT_W +281 0x01E0 //RX_TDDRC_DRC_GAIN +195 0x0030 //RX_FDEQ_SUBNUM +196 0x4848 //RX_FDEQ_GAIN_0 +197 0x4848 //RX_FDEQ_GAIN_1 +198 0x4844 //RX_FDEQ_GAIN_2 +199 0x4B4D //RX_FDEQ_GAIN_3 +200 0x4E50 //RX_FDEQ_GAIN_4 +201 0x5254 //RX_FDEQ_GAIN_5 +202 0x5658 //RX_FDEQ_GAIN_6 +203 0x5C60 //RX_FDEQ_GAIN_7 +204 0x6468 //RX_FDEQ_GAIN_8 +205 0x6C70 //RX_FDEQ_GAIN_9 +206 0x7474 //RX_FDEQ_GAIN_10 +207 0x7474 //RX_FDEQ_GAIN_11 +208 0x7474 //RX_FDEQ_GAIN_12 +209 0x7474 //RX_FDEQ_GAIN_13 +210 0x7474 //RX_FDEQ_GAIN_14 +211 0x7474 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0202 //RX_FDEQ_BIN_0 +221 0x0203 //RX_FDEQ_BIN_1 +222 0x0402 //RX_FDEQ_BIN_2 +223 0x0304 //RX_FDEQ_BIN_3 +224 0x0405 //RX_FDEQ_BIN_4 +225 0x0506 //RX_FDEQ_BIN_5 +226 0x0708 //RX_FDEQ_BIN_6 +227 0x090A //RX_FDEQ_BIN_7 +228 0x0B0C //RX_FDEQ_BIN_8 +229 0x0D0E //RX_FDEQ_BIN_9 +230 0x1214 //RX_FDEQ_BIN_10 +231 0x1E1E //RX_FDEQ_BIN_11 +232 0x1E1E //RX_FDEQ_BIN_12 +233 0x1E1E //RX_FDEQ_BIN_13 +234 0x1E1E //RX_FDEQ_BIN_14 +235 0x202C //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x4000 //RX_FDEQ_RESRV_0 +245 0x0320 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0030 //RX_FDDRC_BAND_MARGIN_1 +248 0x0050 //RX_FDDRC_BAND_MARGIN_2 +249 0x0080 //RX_FDDRC_BAND_MARGIN_3 +250 0x0007 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x5000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x6400 //RX_FDDRC_THRD_3_2 +258 0x6400 //RX_FDDRC_THRD_3_3 +259 0x2000 //RX_FDDRC_SLANT_0_0 +260 0x2000 //RX_FDDRC_SLANT_0_1 +261 0x2000 //RX_FDDRC_SLANT_0_2 +262 0x2000 //RX_FDDRC_SLANT_0_3 +263 0x5333 //RX_FDDRC_SLANT_1_0 +264 0x5333 //RX_FDDRC_SLANT_1_1 +265 0x5333 //RX_FDDRC_SLANT_1_2 +266 0x5333 //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +286 0x0100 //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 +#VOL 2 +163 0x1000 //RX_TDDRC_ALPHA_UP_1 +164 0x1000 //RX_TDDRC_ALPHA_UP_2 +165 0x1000 //RX_TDDRC_ALPHA_UP_3 +166 0x1000 //RX_TDDRC_ALPHA_UP_4 +184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +190 0x7000 //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +269 0x0000 //RX_TDDRC_THRD_0 +270 0x0000 //RX_TDDRC_THRD_1 +271 0x1800 //RX_TDDRC_THRD_2 +272 0x1800 //RX_TDDRC_THRD_3 +273 0x3000 //RX_TDDRC_SLANT_0 +274 0x6E00 //RX_TDDRC_SLANT_1 +275 0x1000 //RX_TDDRC_ALPHA_UP_0 +276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x199A //RX_TDDRC_HMNC_GAIN +279 0x0001 //RX_TDDRC_SMT_FLAG +280 0x0CCD //RX_TDDRC_SMT_W +281 0x01E0 //RX_TDDRC_DRC_GAIN +195 0x0030 //RX_FDEQ_SUBNUM +196 0x4848 //RX_FDEQ_GAIN_0 +197 0x4848 //RX_FDEQ_GAIN_1 +198 0x4844 //RX_FDEQ_GAIN_2 +199 0x4B4D //RX_FDEQ_GAIN_3 +200 0x4E50 //RX_FDEQ_GAIN_4 +201 0x5254 //RX_FDEQ_GAIN_5 +202 0x5658 //RX_FDEQ_GAIN_6 +203 0x5C60 //RX_FDEQ_GAIN_7 +204 0x6468 //RX_FDEQ_GAIN_8 +205 0x6C70 //RX_FDEQ_GAIN_9 +206 0x7474 //RX_FDEQ_GAIN_10 +207 0x7474 //RX_FDEQ_GAIN_11 +208 0x7474 //RX_FDEQ_GAIN_12 +209 0x7474 //RX_FDEQ_GAIN_13 +210 0x7474 //RX_FDEQ_GAIN_14 +211 0x7474 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0202 //RX_FDEQ_BIN_0 +221 0x0203 //RX_FDEQ_BIN_1 +222 0x0402 //RX_FDEQ_BIN_2 +223 0x0304 //RX_FDEQ_BIN_3 +224 0x0405 //RX_FDEQ_BIN_4 +225 0x0506 //RX_FDEQ_BIN_5 +226 0x0708 //RX_FDEQ_BIN_6 +227 0x090A //RX_FDEQ_BIN_7 +228 0x0B0C //RX_FDEQ_BIN_8 +229 0x0D0E //RX_FDEQ_BIN_9 +230 0x1214 //RX_FDEQ_BIN_10 +231 0x1E1E //RX_FDEQ_BIN_11 +232 0x1E1E //RX_FDEQ_BIN_12 +233 0x1E1E //RX_FDEQ_BIN_13 +234 0x1E1E //RX_FDEQ_BIN_14 +235 0x202C //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x4000 //RX_FDEQ_RESRV_0 +245 0x0320 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0030 //RX_FDDRC_BAND_MARGIN_1 +248 0x0050 //RX_FDDRC_BAND_MARGIN_2 +249 0x0080 //RX_FDDRC_BAND_MARGIN_3 +250 0x0007 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x5000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x6400 //RX_FDDRC_THRD_3_2 +258 0x6400 //RX_FDDRC_THRD_3_3 +259 0x2000 //RX_FDDRC_SLANT_0_0 +260 0x2000 //RX_FDDRC_SLANT_0_1 +261 0x2000 //RX_FDDRC_SLANT_0_2 +262 0x2000 //RX_FDDRC_SLANT_0_3 +263 0x5333 //RX_FDDRC_SLANT_1_0 +264 0x5333 //RX_FDDRC_SLANT_1_1 +265 0x5333 //RX_FDDRC_SLANT_1_2 +266 0x5333 //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +286 0x0100 //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 +#VOL 3 +163 0x1000 //RX_TDDRC_ALPHA_UP_1 +164 0x1000 //RX_TDDRC_ALPHA_UP_2 +165 0x1000 //RX_TDDRC_ALPHA_UP_3 +166 0x1000 //RX_TDDRC_ALPHA_UP_4 +184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +190 0x7000 //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +269 0x0000 //RX_TDDRC_THRD_0 +270 0x0000 //RX_TDDRC_THRD_1 +271 0x1800 //RX_TDDRC_THRD_2 +272 0x1800 //RX_TDDRC_THRD_3 +273 0x3000 //RX_TDDRC_SLANT_0 +274 0x6E00 //RX_TDDRC_SLANT_1 +275 0x1000 //RX_TDDRC_ALPHA_UP_0 +276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x199A //RX_TDDRC_HMNC_GAIN +279 0x0001 //RX_TDDRC_SMT_FLAG +280 0x0CCD //RX_TDDRC_SMT_W +281 0x01E0 //RX_TDDRC_DRC_GAIN +195 0x0030 //RX_FDEQ_SUBNUM +196 0x4848 //RX_FDEQ_GAIN_0 +197 0x4848 //RX_FDEQ_GAIN_1 +198 0x4844 //RX_FDEQ_GAIN_2 +199 0x4B4D //RX_FDEQ_GAIN_3 +200 0x4E50 //RX_FDEQ_GAIN_4 +201 0x5254 //RX_FDEQ_GAIN_5 +202 0x5658 //RX_FDEQ_GAIN_6 +203 0x5C60 //RX_FDEQ_GAIN_7 +204 0x6468 //RX_FDEQ_GAIN_8 +205 0x6C70 //RX_FDEQ_GAIN_9 +206 0x7474 //RX_FDEQ_GAIN_10 +207 0x7474 //RX_FDEQ_GAIN_11 +208 0x7474 //RX_FDEQ_GAIN_12 +209 0x7474 //RX_FDEQ_GAIN_13 +210 0x7474 //RX_FDEQ_GAIN_14 +211 0x7474 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0202 //RX_FDEQ_BIN_0 +221 0x0203 //RX_FDEQ_BIN_1 +222 0x0402 //RX_FDEQ_BIN_2 +223 0x0304 //RX_FDEQ_BIN_3 +224 0x0405 //RX_FDEQ_BIN_4 +225 0x0506 //RX_FDEQ_BIN_5 +226 0x0708 //RX_FDEQ_BIN_6 +227 0x090A //RX_FDEQ_BIN_7 +228 0x0B0C //RX_FDEQ_BIN_8 +229 0x0D0E //RX_FDEQ_BIN_9 +230 0x1214 //RX_FDEQ_BIN_10 +231 0x1E1E //RX_FDEQ_BIN_11 +232 0x1E1E //RX_FDEQ_BIN_12 +233 0x1E1E //RX_FDEQ_BIN_13 +234 0x1E1E //RX_FDEQ_BIN_14 +235 0x202C //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x4000 //RX_FDEQ_RESRV_0 +245 0x0320 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0030 //RX_FDDRC_BAND_MARGIN_1 +248 0x0050 //RX_FDDRC_BAND_MARGIN_2 +249 0x0080 //RX_FDDRC_BAND_MARGIN_3 +250 0x0007 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x5000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x6400 //RX_FDDRC_THRD_3_2 +258 0x6400 //RX_FDDRC_THRD_3_3 +259 0x2000 //RX_FDDRC_SLANT_0_0 +260 0x2000 //RX_FDDRC_SLANT_0_1 +261 0x2000 //RX_FDDRC_SLANT_0_2 +262 0x2000 //RX_FDDRC_SLANT_0_3 +263 0x5333 //RX_FDDRC_SLANT_1_0 +264 0x5333 //RX_FDDRC_SLANT_1_1 +265 0x5333 //RX_FDDRC_SLANT_1_2 +266 0x5333 //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +286 0x0100 //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 +#VOL 4 +163 0x1000 //RX_TDDRC_ALPHA_UP_1 +164 0x1000 //RX_TDDRC_ALPHA_UP_2 +165 0x1000 //RX_TDDRC_ALPHA_UP_3 +166 0x1000 //RX_TDDRC_ALPHA_UP_4 +184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +190 0x7000 //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +269 0x0000 //RX_TDDRC_THRD_0 +270 0x0000 //RX_TDDRC_THRD_1 +271 0x1800 //RX_TDDRC_THRD_2 +272 0x1800 //RX_TDDRC_THRD_3 +273 0x3000 //RX_TDDRC_SLANT_0 +274 0x6E00 //RX_TDDRC_SLANT_1 +275 0x1000 //RX_TDDRC_ALPHA_UP_0 +276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x199A //RX_TDDRC_HMNC_GAIN +279 0x0001 //RX_TDDRC_SMT_FLAG +280 0x0CCD //RX_TDDRC_SMT_W +281 0x01E0 //RX_TDDRC_DRC_GAIN +195 0x0030 //RX_FDEQ_SUBNUM +196 0x4848 //RX_FDEQ_GAIN_0 +197 0x4848 //RX_FDEQ_GAIN_1 +198 0x4844 //RX_FDEQ_GAIN_2 +199 0x4B4D //RX_FDEQ_GAIN_3 +200 0x4E50 //RX_FDEQ_GAIN_4 +201 0x5254 //RX_FDEQ_GAIN_5 +202 0x5658 //RX_FDEQ_GAIN_6 +203 0x5C60 //RX_FDEQ_GAIN_7 +204 0x6468 //RX_FDEQ_GAIN_8 +205 0x6C70 //RX_FDEQ_GAIN_9 +206 0x7474 //RX_FDEQ_GAIN_10 +207 0x7474 //RX_FDEQ_GAIN_11 +208 0x7474 //RX_FDEQ_GAIN_12 +209 0x7474 //RX_FDEQ_GAIN_13 +210 0x7474 //RX_FDEQ_GAIN_14 +211 0x7474 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0202 //RX_FDEQ_BIN_0 +221 0x0203 //RX_FDEQ_BIN_1 +222 0x0402 //RX_FDEQ_BIN_2 +223 0x0304 //RX_FDEQ_BIN_3 +224 0x0405 //RX_FDEQ_BIN_4 +225 0x0506 //RX_FDEQ_BIN_5 +226 0x0708 //RX_FDEQ_BIN_6 +227 0x090A //RX_FDEQ_BIN_7 +228 0x0B0C //RX_FDEQ_BIN_8 +229 0x0D0E //RX_FDEQ_BIN_9 +230 0x1214 //RX_FDEQ_BIN_10 +231 0x1E1E //RX_FDEQ_BIN_11 +232 0x1E1E //RX_FDEQ_BIN_12 +233 0x1E1E //RX_FDEQ_BIN_13 +234 0x1E1E //RX_FDEQ_BIN_14 +235 0x202C //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x4000 //RX_FDEQ_RESRV_0 +245 0x0320 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0030 //RX_FDDRC_BAND_MARGIN_1 +248 0x0050 //RX_FDDRC_BAND_MARGIN_2 +249 0x0080 //RX_FDDRC_BAND_MARGIN_3 +250 0x0007 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x5000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x6400 //RX_FDDRC_THRD_3_2 +258 0x6400 //RX_FDDRC_THRD_3_3 +259 0x2000 //RX_FDDRC_SLANT_0_0 +260 0x2000 //RX_FDDRC_SLANT_0_1 +261 0x2000 //RX_FDDRC_SLANT_0_2 +262 0x2000 //RX_FDDRC_SLANT_0_3 +263 0x5333 //RX_FDDRC_SLANT_1_0 +264 0x5333 //RX_FDDRC_SLANT_1_1 +265 0x5333 //RX_FDDRC_SLANT_1_2 +266 0x5333 //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +286 0x0100 //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 +#VOL 5 +163 0x1000 //RX_TDDRC_ALPHA_UP_1 +164 0x1000 //RX_TDDRC_ALPHA_UP_2 +165 0x1000 //RX_TDDRC_ALPHA_UP_3 +166 0x1000 //RX_TDDRC_ALPHA_UP_4 +184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +190 0x7000 //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +269 0x0000 //RX_TDDRC_THRD_0 +270 0x0000 //RX_TDDRC_THRD_1 +271 0x1800 //RX_TDDRC_THRD_2 +272 0x1800 //RX_TDDRC_THRD_3 +273 0x3000 //RX_TDDRC_SLANT_0 +274 0x6E00 //RX_TDDRC_SLANT_1 +275 0x1000 //RX_TDDRC_ALPHA_UP_0 +276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x199A //RX_TDDRC_HMNC_GAIN +279 0x0001 //RX_TDDRC_SMT_FLAG +280 0x0CCD //RX_TDDRC_SMT_W +281 0x01E0 //RX_TDDRC_DRC_GAIN +195 0x0030 //RX_FDEQ_SUBNUM +196 0x4848 //RX_FDEQ_GAIN_0 +197 0x4848 //RX_FDEQ_GAIN_1 +198 0x4844 //RX_FDEQ_GAIN_2 +199 0x4B4D //RX_FDEQ_GAIN_3 +200 0x4E50 //RX_FDEQ_GAIN_4 +201 0x5254 //RX_FDEQ_GAIN_5 +202 0x5658 //RX_FDEQ_GAIN_6 +203 0x5C60 //RX_FDEQ_GAIN_7 +204 0x6468 //RX_FDEQ_GAIN_8 +205 0x6C70 //RX_FDEQ_GAIN_9 +206 0x7474 //RX_FDEQ_GAIN_10 +207 0x7474 //RX_FDEQ_GAIN_11 +208 0x7474 //RX_FDEQ_GAIN_12 +209 0x7474 //RX_FDEQ_GAIN_13 +210 0x7474 //RX_FDEQ_GAIN_14 +211 0x7474 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0202 //RX_FDEQ_BIN_0 +221 0x0203 //RX_FDEQ_BIN_1 +222 0x0402 //RX_FDEQ_BIN_2 +223 0x0304 //RX_FDEQ_BIN_3 +224 0x0405 //RX_FDEQ_BIN_4 +225 0x0506 //RX_FDEQ_BIN_5 +226 0x0708 //RX_FDEQ_BIN_6 +227 0x090A //RX_FDEQ_BIN_7 +228 0x0B0C //RX_FDEQ_BIN_8 +229 0x0D0E //RX_FDEQ_BIN_9 +230 0x1214 //RX_FDEQ_BIN_10 +231 0x1E1E //RX_FDEQ_BIN_11 +232 0x1E1E //RX_FDEQ_BIN_12 +233 0x1E1E //RX_FDEQ_BIN_13 +234 0x1E1E //RX_FDEQ_BIN_14 +235 0x202C //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x4000 //RX_FDEQ_RESRV_0 +245 0x0320 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0030 //RX_FDDRC_BAND_MARGIN_1 +248 0x0050 //RX_FDDRC_BAND_MARGIN_2 +249 0x0080 //RX_FDDRC_BAND_MARGIN_3 +250 0x0007 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x5000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x6400 //RX_FDDRC_THRD_3_2 +258 0x6400 //RX_FDDRC_THRD_3_3 +259 0x2000 //RX_FDDRC_SLANT_0_0 +260 0x2000 //RX_FDDRC_SLANT_0_1 +261 0x2000 //RX_FDDRC_SLANT_0_2 +262 0x2000 //RX_FDDRC_SLANT_0_3 +263 0x5333 //RX_FDDRC_SLANT_1_0 +264 0x5333 //RX_FDDRC_SLANT_1_1 +265 0x5333 //RX_FDDRC_SLANT_1_2 +266 0x5333 //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +286 0x0100 //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 +#VOL 6 +163 0x1000 //RX_TDDRC_ALPHA_UP_1 +164 0x1000 //RX_TDDRC_ALPHA_UP_2 +165 0x1000 //RX_TDDRC_ALPHA_UP_3 +166 0x1000 //RX_TDDRC_ALPHA_UP_4 +184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +190 0x7000 //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +269 0x0000 //RX_TDDRC_THRD_0 +270 0x0000 //RX_TDDRC_THRD_1 +271 0x1800 //RX_TDDRC_THRD_2 +272 0x1800 //RX_TDDRC_THRD_3 +273 0x3000 //RX_TDDRC_SLANT_0 +274 0x6E00 //RX_TDDRC_SLANT_1 +275 0x1000 //RX_TDDRC_ALPHA_UP_0 +276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x199A //RX_TDDRC_HMNC_GAIN +279 0x0001 //RX_TDDRC_SMT_FLAG +280 0x0CCD //RX_TDDRC_SMT_W +281 0x01E0 //RX_TDDRC_DRC_GAIN +195 0x0030 //RX_FDEQ_SUBNUM +196 0x4848 //RX_FDEQ_GAIN_0 +197 0x4848 //RX_FDEQ_GAIN_1 +198 0x4844 //RX_FDEQ_GAIN_2 +199 0x4B4D //RX_FDEQ_GAIN_3 +200 0x4E50 //RX_FDEQ_GAIN_4 +201 0x5254 //RX_FDEQ_GAIN_5 +202 0x5658 //RX_FDEQ_GAIN_6 +203 0x5C60 //RX_FDEQ_GAIN_7 +204 0x6468 //RX_FDEQ_GAIN_8 +205 0x6C70 //RX_FDEQ_GAIN_9 +206 0x7474 //RX_FDEQ_GAIN_10 +207 0x7474 //RX_FDEQ_GAIN_11 +208 0x7474 //RX_FDEQ_GAIN_12 +209 0x7474 //RX_FDEQ_GAIN_13 +210 0x7474 //RX_FDEQ_GAIN_14 +211 0x7474 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0202 //RX_FDEQ_BIN_0 +221 0x0203 //RX_FDEQ_BIN_1 +222 0x0402 //RX_FDEQ_BIN_2 +223 0x0304 //RX_FDEQ_BIN_3 +224 0x0405 //RX_FDEQ_BIN_4 +225 0x0506 //RX_FDEQ_BIN_5 +226 0x0708 //RX_FDEQ_BIN_6 +227 0x090A //RX_FDEQ_BIN_7 +228 0x0B0C //RX_FDEQ_BIN_8 +229 0x0D0E //RX_FDEQ_BIN_9 +230 0x1214 //RX_FDEQ_BIN_10 +231 0x1E1E //RX_FDEQ_BIN_11 +232 0x1E1E //RX_FDEQ_BIN_12 +233 0x1E1E //RX_FDEQ_BIN_13 +234 0x1E1E //RX_FDEQ_BIN_14 +235 0x202C //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x4000 //RX_FDEQ_RESRV_0 +245 0x0320 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0030 //RX_FDDRC_BAND_MARGIN_1 +248 0x0050 //RX_FDDRC_BAND_MARGIN_2 +249 0x0080 //RX_FDDRC_BAND_MARGIN_3 +250 0x0007 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x5000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x6400 //RX_FDDRC_THRD_3_2 +258 0x6400 //RX_FDDRC_THRD_3_3 +259 0x2000 //RX_FDDRC_SLANT_0_0 +260 0x2000 //RX_FDDRC_SLANT_0_1 +261 0x2000 //RX_FDDRC_SLANT_0_2 +262 0x2000 //RX_FDDRC_SLANT_0_3 +263 0x5333 //RX_FDDRC_SLANT_1_0 +264 0x5333 //RX_FDDRC_SLANT_1_1 +265 0x5333 //RX_FDDRC_SLANT_1_2 +266 0x5333 //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +286 0x0100 //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 #CASE_NAME HANDSET-HANDSET_HAC-TMOBILE_US-FB -#PARAM_TYPE TX+RX -#TOTAL_CUSTOM_STEP 7 +#PARAM_MODE Full +#PARAM_TYPE TX+2RX +#TOTAL_CUSTOM_STEP 7+7 #TX 0 0x0000 //TX_OPERATION_MODE_0 1 0x0000 //TX_OPERATION_MODE_1 @@ -31582,7 +48089,7 @@ 18 0x0000 //TX_SYS_RESRV_2 19 0x0000 //TX_SYS_RESRV_3 20 0x0000 //TX_DIST2REF0 -21 0x009D //TX_DIST2REF1 +21 0x009C //TX_DIST2REF1 22 0x0000 //TX_DIST2REF_02 23 0x0000 //TX_DIST2REF_03 24 0x0000 //TX_DIST2REF_04 @@ -31812,12 +48319,12 @@ 248 0xF800 //TX_THR_SN_EST_6 249 0xF700 //TX_THR_SN_EST_7 250 0x0000 //TX_DELTA_THR_SN_EST_0 -251 0x0100 //TX_DELTA_THR_SN_EST_1 +251 0x0200 //TX_DELTA_THR_SN_EST_1 252 0x0200 //TX_DELTA_THR_SN_EST_2 253 0x0200 //TX_DELTA_THR_SN_EST_3 -254 0x0200 //TX_DELTA_THR_SN_EST_4 -255 0x0100 //TX_DELTA_THR_SN_EST_5 -256 0x0200 //TX_DELTA_THR_SN_EST_6 +254 0x0100 //TX_DELTA_THR_SN_EST_4 +255 0x0200 //TX_DELTA_THR_SN_EST_5 +256 0x0100 //TX_DELTA_THR_SN_EST_6 257 0x0200 //TX_DELTA_THR_SN_EST_7 258 0x4000 //TX_LAMBDA_NN_EST_0 259 0x4000 //TX_LAMBDA_NN_EST_1 @@ -31845,16 +48352,16 @@ 281 0x0014 //TX_NS_LVL_CTRL_0 282 0x0016 //TX_NS_LVL_CTRL_1 283 0x0016 //TX_NS_LVL_CTRL_2 -284 0x0016 //TX_NS_LVL_CTRL_3 -285 0x0018 //TX_NS_LVL_CTRL_4 -286 0x0016 //TX_NS_LVL_CTRL_5 -287 0x0012 //TX_NS_LVL_CTRL_6 +284 0x0018 //TX_NS_LVL_CTRL_3 +285 0x0016 //TX_NS_LVL_CTRL_4 +286 0x0012 //TX_NS_LVL_CTRL_5 +287 0x0016 //TX_NS_LVL_CTRL_6 288 0x0017 //TX_NS_LVL_CTRL_7 289 0x000E //TX_MIN_GAIN_S_0 -290 0x0012 //TX_MIN_GAIN_S_1 -291 0x0007 //TX_MIN_GAIN_S_2 -292 0x0012 //TX_MIN_GAIN_S_3 -293 0x0010 //TX_MIN_GAIN_S_4 +290 0x0007 //TX_MIN_GAIN_S_1 +291 0x0012 //TX_MIN_GAIN_S_2 +292 0x0010 //TX_MIN_GAIN_S_3 +293 0x0012 //TX_MIN_GAIN_S_4 294 0x0012 //TX_MIN_GAIN_S_5 295 0x0012 //TX_MIN_GAIN_S_6 296 0x0012 //TX_MIN_GAIN_S_7 @@ -31876,29 +48383,29 @@ 312 0x7FFF //TX_A_POST_FILT_0 313 0x2000 //TX_A_POST_FILT_1 314 0x4000 //TX_A_POST_FILT_S_0 -315 0x5000 //TX_A_POST_FILT_S_1 +315 0x4000 //TX_A_POST_FILT_S_1 316 0x4000 //TX_A_POST_FILT_S_2 317 0x4000 //TX_A_POST_FILT_S_3 318 0x4000 //TX_A_POST_FILT_S_4 319 0x4000 //TX_A_POST_FILT_S_5 -320 0x4000 //TX_A_POST_FILT_S_6 +320 0x5000 //TX_A_POST_FILT_S_6 321 0x7000 //TX_A_POST_FILT_S_7 322 0x1000 //TX_B_POST_FILT_0 323 0x2000 //TX_B_POST_FILT_1 -324 0x3000 //TX_B_POST_FILT_2 +324 0x2000 //TX_B_POST_FILT_2 325 0x2000 //TX_B_POST_FILT_3 -326 0x5000 //TX_B_POST_FILT_4 +326 0x2000 //TX_B_POST_FILT_4 327 0x2000 //TX_B_POST_FILT_5 -328 0x6000 //TX_B_POST_FILT_6 +328 0x3000 //TX_B_POST_FILT_6 329 0x3000 //TX_B_POST_FILT_7 330 0x1000 //TX_B_LESSCUT_RTO_S_0 -331 0x6000 //TX_B_LESSCUT_RTO_S_1 -332 0x6000 //TX_B_LESSCUT_RTO_S_2 -333 0x6000 //TX_B_LESSCUT_RTO_S_3 -334 0x6000 //TX_B_LESSCUT_RTO_S_4 -335 0x6000 //TX_B_LESSCUT_RTO_S_5 -336 0x7FFF //TX_B_LESSCUT_RTO_S_6 -337 0x7FFF //TX_B_LESSCUT_RTO_S_7 +331 0x1000 //TX_B_LESSCUT_RTO_S_1 +332 0x1000 //TX_B_LESSCUT_RTO_S_2 +333 0x1000 //TX_B_LESSCUT_RTO_S_3 +334 0x1000 //TX_B_LESSCUT_RTO_S_4 +335 0x1000 //TX_B_LESSCUT_RTO_S_5 +336 0x1000 //TX_B_LESSCUT_RTO_S_6 +337 0x1000 //TX_B_LESSCUT_RTO_S_7 338 0x7E14 //TX_LAMBDA_PFILT 339 0x7C29 //TX_LAMBDA_PFILT_S_0 340 0x7C29 //TX_LAMBDA_PFILT_S_1 @@ -31941,10 +48448,10 @@ 377 0x4E20 //TX_NOISE_TH_5_4 378 0x39DF //TX_NOISE_TH_6 379 0x0014 //TX_MINENOISE_TH -380 0x4000 //TX_MINENOISE_MIC0_TH_MTS -381 0xFFEE //TX_MINENOISE_MIC0_TH_EXP -382 0x6000 //TX_MINENOISE_MIC0_S_TH_MTS -383 0xFFF3 //TX_MINENOISE_MIC0_S_TH_EXP +380 0xD508 //TX_MORENS_TFMASK_TH +381 0x0001 //TX_DRC_QUIET_FLOOR +382 0x6D60 //TX_RATIODTL_CUT_TH +383 0x1482 //TX_DT_CUT_K1 384 0x00A5 //TX_OUT_ENER_S_TH_CLEAN 385 0x00A5 //TX_OUT_ENER_S_TH_LESSCLEAN 386 0x00A5 //TX_OUT_ENER_S_TH_NOISY @@ -31952,15 +48459,15 @@ 388 0x0200 //TX_OUT_ENER_TH_SPEECH 389 0x2000 //TX_SN_NPB_GAIN 390 0x0000 //TX_NN_NPB_GAIN -391 0x0000 //TX_CSX_ALPHA_0 -392 0x0000 //TX_CSX_ALPHA_1 -393 0x0000 //TX_CSX_ALPHA_2 -394 0x0000 //TX_CSX_ALPHA_3 -395 0x0800 //TX_MU_ARSP_EST -396 0x00C8 //TX_P_OUTBEAM_MIN_TH +391 0x3000 //TX_POST_MASK_SUP_HSNE +392 0x07D0 //TX_TAIL_DET_TH +393 0x4000 //TX_B_LESSCUT_RTO_WTA +394 0x0000 //TX_MEL_G_R +395 0x0080 //TX_SUPHIGH_TH +396 0x0000 //TX_MASK_G_R 397 0x0002 //TX_EXTRA_NS_L -398 0x0800 //TX_EXTRA_NS_A -399 0x0005 //TX_VR_NOISE_FLOOR_TH +398 0x1800 //TX_C_POST_FLT_MASK +399 0x7FFF //TX_A_POST_FLT_WNS 400 0x0148 //TX_MIN_G_LOW300HZ 401 0x0004 //TX_MAXLEVEL_CNG 402 0x00B4 //TX_STN_NOISE_TH @@ -32075,16 +48582,16 @@ 511 0x6666 //TX_MIC_TO_BFGAIN 512 0x0000 //TX_MICTOBFGAIN0 513 0x0000 //TX_FASTMUE_TH -514 0x0000 //TX_DERVB_LEN_0 -515 0x0000 //TX_DERVB_LEN_1 -516 0x0000 //TX_RHO_DERVB -517 0x0000 //TX_MIC_INDX_DERVB -518 0x0000 //TX_MU_DERVB -519 0x0000 //TX_DR_RESRV_0 -520 0x0000 //TX_DR_RESRV_1 -521 0x0000 //TX_DR_RESRV_2 -522 0x0000 //TX_DR_RESRV_3 -523 0x0000 //TX_DR_RESRV_4 +514 0x2CCC //TX_DEREVERB_LF_MU +515 0x3200 //TX_DEREVERB_HF_MU +516 0x0007 //TX_DEREVERB_DELAY +517 0x0004 //TX_DEREVERB_COEF_LEN +518 0x0003 //TX_DEREVERB_DNR +519 0x0000 //TX_DEREVERB_ALPHA +520 0x0000 //TX_DEREVERB_BETA +521 0x7FFF //TX_GSC_RTOL_TH +522 0x7FFF //TX_GSC_RTOH_TH +523 0x7E2C //TX_WIDE2_MEANHTH 524 0x0000 //TX_DR_RESRV_5 525 0x0000 //TX_DR_RESRV_6 526 0x0000 //TX_DR_RESRV_7 @@ -32458,6 +48965,71 @@ 894 0xC000 //TX_FASTNS_SSA_THHFL 895 0xCCCC //TX_FASTNS_SSA_THLFH 896 0xD999 //TX_FASTNS_SSA_THHFH +897 0x2339 //TX_SENDFUNC_REG_MICMUTE +898 0x0021 //TX_SENDFUNC_REG_MICMUTE1 +899 0x02BC //TX_MICMUTE_RATIO_THR +900 0x0140 //TX_MICMUTE_AMP_THR +901 0x0004 //TX_MICMUTE_HPF_IND +902 0x00C0 //TX_MICMUTE_LOG_EYR_TH +903 0x0008 //TX_MICMUTE_CVG_TIME +904 0x0008 //TX_MICMUTE_RELEASE_TIME +905 0x01FE //TX_MIC_VOLUME_MIC0MUTE +906 0x0020 //TX_MICMUTE_EPD_OFFSET_0 +907 0x001E //TX_MICMUTE_FRQ_AEC_L +908 0x7999 //TX_MICMUTE_EAD_THR +909 0x7FFF //TX_MICMUTE_LAMBDA_CB_NLE +910 0x7FFF //TX_MICMUTE_LAMBDA_RE_EST +911 0x4000 //TX_DTD_THR1_MICMUTE_0 +912 0x7000 //TX_DTD_THR1_MICMUTE_1 +913 0x7FFF //TX_DTD_THR1_MICMUTE_2 +914 0x7FFF //TX_DTD_THR1_MICMUTE_3 +915 0x6CCC //TX_DTD_THR2_MICMUTE_0 +916 0x0400 //TX_MICMUTE_MIN_EQ_RE_EST_0 +917 0x0400 //TX_MICMUTE_MIN_EQ_RE_EST_1 +918 0x1000 //TX_MICMUTE_MIN_EQ_RE_EST_2 +919 0x7FFF //TX_MICMUTE_MIN_EQ_RE_EST_3 +920 0x7FFF //TX_MICMUTE_MIN_EQ_RE_EST_4 +921 0x4000 //TX_MICMUTE_C_POST_FLT +922 0x03E8 //TX_MICMUTE_DT_CUT_K +923 0x0001 //TX_MICMUTE_DT_CUT_THR +924 0x03E8 //TX_MICMUTE_DT_CUT_K2 +925 0x0001 //TX_MICMUTE_DT_CUT_THR2 +926 0x0064 //TX_MICMUTE_DT2_HOLD_N +927 0x1000 //TX_MICMUTE_RATIODTH_THCUT +928 0x1000 //TX_MICMUTE_B_POST_FLT_ECHOL +929 0x7FFF //TX_MICMUTE_B_POST_FLT_ECHOH +930 0x0400 //TX_MICMUTE_C_POST_FLT_MASK +931 0x7999 //TX_MICMUTE_RATIODTL_CUT_TH +932 0x0258 //TX_MICMUTE_DT_CUT_K1 +933 0x0800 //TX_MICMUTE_N2_SN_EST +934 0xFC00 //TX_MICMUTE_THR_SN_EST_0 +935 0x001C //TX_MICMUTE_MIN_G_CTRL_0 +936 0x6000 //TX_MICMUTE_A_POST_FILT_S_0 +937 0x7000 //TX_MICMUTE_B_POST_FILT_0 +938 0x2710 //TX_MIC1RUB_AMP_THR +939 0x0010 //TX_MIC1MUTE_RATIO_THR +940 0x0450 //TX_MIC1MUTE_AMP_THR +941 0x0008 //TX_MIC1MUTE_CVG_TIME +942 0x0008 //TX_MIC1MUTE_RELEASE_TIME +943 0x0000 //TX_AMS_RESRV_01 +944 0x0000 //TX_AMS_RESRV_02 +945 0x0000 //TX_AMS_RESRV_03 +946 0x0000 //TX_AMS_RESRV_04 +947 0x0000 //TX_AMS_RESRV_05 +948 0x0000 //TX_AMS_RESRV_06 +949 0x0000 //TX_AMS_RESRV_07 +950 0x0000 //TX_AMS_RESRV_08 +951 0x0000 //TX_AMS_RESRV_09 +952 0x0000 //TX_AMS_RESRV_10 +953 0x0000 //TX_AMS_RESRV_11 +954 0x0000 //TX_AMS_RESRV_12 +955 0x0000 //TX_AMS_RESRV_13 +956 0x0000 //TX_AMS_RESRV_14 +957 0x0000 //TX_AMS_RESRV_15 +958 0x0000 //TX_AMS_RESRV_16 +959 0x0000 //TX_AMS_RESRV_17 +960 0x0000 //TX_AMS_RESRV_18 +961 0x0000 //TX_AMS_RESRV_19 #RX 0 0x000C //RX_RECVFUNC_MODE_0 1 0x0000 //RX_RECVFUNC_MODE_1 @@ -33309,4 +49881,855 @@ 110 0x0000 //RX_FDDRC_RESRV_0 129 0x0100 //RX_SPK_VOL 130 0x0000 //RX_VOL_RESRV_0 +#RX 2 +157 0x000C //RX_RECVFUNC_MODE_0 +158 0x0000 //RX_RECVFUNC_MODE_1 +159 0x0004 //RX_SAMPLINGFREQ_SIG +160 0x0004 //RX_SAMPLINGFREQ_PROC +161 0x000A //RX_FRAME_SZ +162 0x0000 //RX_DELAY_OPT +163 0x1000 //RX_TDDRC_ALPHA_UP_1 +164 0x1000 //RX_TDDRC_ALPHA_UP_2 +165 0x1000 //RX_TDDRC_ALPHA_UP_3 +166 0x1000 //RX_TDDRC_ALPHA_UP_4 +167 0x0800 //RX_PGA +168 0x7FFF //RX_A_HP +169 0x4000 //RX_B_PE +170 0x5800 //RX_THR_PITCH_DET_0 +171 0x5000 //RX_THR_PITCH_DET_1 +172 0x4000 //RX_THR_PITCH_DET_2 +173 0x0008 //RX_PITCH_BFR_LEN +174 0x0003 //RX_SBD_PITCH_DET +175 0x0100 //RX_PP_RESRV_0 +176 0x0020 //RX_PP_RESRV_1 +177 0x0600 //RX_N_SN_EST +178 0x000C //RX_N2_SN_EST +179 0x000F //RX_NS_LVL_CTRL +180 0xF800 //RX_THR_SN_EST +181 0x7E00 //RX_LAMBDA_PFILT +182 0x000A //RX_FENS_RESRV_0 +183 0x0190 //RX_FENS_RESRV_1 +184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +187 0x0002 //RX_EXTRA_NS_L +188 0x0800 //RX_EXTRA_NS_A +189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +190 0x7000 //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +192 0x199A //RX_A_POST_FLT +193 0x0000 //RX_LMT_THRD +194 0x4000 //RX_LMT_ALPHA +195 0x0030 //RX_FDEQ_SUBNUM +196 0x4848 //RX_FDEQ_GAIN_0 +197 0x4848 //RX_FDEQ_GAIN_1 +198 0x4844 //RX_FDEQ_GAIN_2 +199 0x4B4D //RX_FDEQ_GAIN_3 +200 0x4E50 //RX_FDEQ_GAIN_4 +201 0x5254 //RX_FDEQ_GAIN_5 +202 0x5658 //RX_FDEQ_GAIN_6 +203 0x5C60 //RX_FDEQ_GAIN_7 +204 0x6468 //RX_FDEQ_GAIN_8 +205 0x6C70 //RX_FDEQ_GAIN_9 +206 0x7474 //RX_FDEQ_GAIN_10 +207 0x7474 //RX_FDEQ_GAIN_11 +208 0x7474 //RX_FDEQ_GAIN_12 +209 0x7474 //RX_FDEQ_GAIN_13 +210 0x7474 //RX_FDEQ_GAIN_14 +211 0x7474 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0202 //RX_FDEQ_BIN_0 +221 0x0203 //RX_FDEQ_BIN_1 +222 0x0402 //RX_FDEQ_BIN_2 +223 0x0304 //RX_FDEQ_BIN_3 +224 0x0405 //RX_FDEQ_BIN_4 +225 0x0506 //RX_FDEQ_BIN_5 +226 0x0708 //RX_FDEQ_BIN_6 +227 0x090A //RX_FDEQ_BIN_7 +228 0x0B0C //RX_FDEQ_BIN_8 +229 0x0D0E //RX_FDEQ_BIN_9 +230 0x1214 //RX_FDEQ_BIN_10 +231 0x1E1E //RX_FDEQ_BIN_11 +232 0x1E1E //RX_FDEQ_BIN_12 +233 0x1E1E //RX_FDEQ_BIN_13 +234 0x1E1E //RX_FDEQ_BIN_14 +235 0x202C //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x4000 //RX_FDEQ_RESRV_0 +245 0x0320 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0030 //RX_FDDRC_BAND_MARGIN_1 +248 0x0050 //RX_FDDRC_BAND_MARGIN_2 +249 0x0080 //RX_FDDRC_BAND_MARGIN_3 +250 0x0007 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x5000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x6400 //RX_FDDRC_THRD_3_2 +258 0x6400 //RX_FDDRC_THRD_3_3 +259 0x2000 //RX_FDDRC_SLANT_0_0 +260 0x2000 //RX_FDDRC_SLANT_0_1 +261 0x2000 //RX_FDDRC_SLANT_0_2 +262 0x2000 //RX_FDDRC_SLANT_0_3 +263 0x5333 //RX_FDDRC_SLANT_1_0 +264 0x5333 //RX_FDDRC_SLANT_1_1 +265 0x5333 //RX_FDDRC_SLANT_1_2 +266 0x5333 //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +268 0x0002 //RX_FILTINDX +269 0x0000 //RX_TDDRC_THRD_0 +270 0x0000 //RX_TDDRC_THRD_1 +271 0x1800 //RX_TDDRC_THRD_2 +272 0x1800 //RX_TDDRC_THRD_3 +273 0x3000 //RX_TDDRC_SLANT_0 +274 0x6E00 //RX_TDDRC_SLANT_1 +275 0x1000 //RX_TDDRC_ALPHA_UP_0 +276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x199A //RX_TDDRC_HMNC_GAIN +279 0x0001 //RX_TDDRC_SMT_FLAG +280 0x0CCD //RX_TDDRC_SMT_W +281 0x01E0 //RX_TDDRC_DRC_GAIN +282 0x7C00 //RX_LAMBDA_PKA_FP +283 0x2000 //RX_TPKA_FP +284 0x2000 //RX_MIN_G_FP +285 0x0080 //RX_MAX_G_FP +286 0x0100 //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 +288 0x0000 //RX_MAXLEVEL_CNG +289 0x3000 //RX_BWE_UV_TH +290 0x3000 //RX_BWE_UV_TH2 +291 0x1800 //RX_BWE_UV_TH3 +292 0x1000 //RX_BWE_V_TH +293 0x04CD //RX_BWE_GAIN1_V_TH1 +294 0x0F33 //RX_BWE_GAIN1_V_TH2 +295 0x7333 //RX_BWE_UV_EQ +296 0x199A //RX_BWE_V_EQ +297 0x7333 //RX_BWE_TONE_TH +298 0x0004 //RX_BWE_UV_HOLD_T +299 0x6CCD //RX_BWE_GAIN2_ALPHA +300 0x799A //RX_BWE_GAIN3_ALPHA +301 0x001E //RX_BWE_CUTOFF +302 0x3000 //RX_BWE_GAINFILL +303 0x3200 //RX_BWE_MAXTH_TONE +304 0x2000 //RX_BWE_EQ_0 +305 0x2000 //RX_BWE_EQ_1 +306 0x2000 //RX_BWE_EQ_2 +307 0x2000 //RX_BWE_EQ_3 +308 0x2000 //RX_BWE_EQ_4 +309 0x2000 //RX_BWE_EQ_5 +310 0x2000 //RX_BWE_EQ_6 +311 0x0000 //RX_BWE_RESRV_0 +312 0x0000 //RX_BWE_RESRV_1 +313 0x0000 //RX_BWE_RESRV_2 +#VOL 0 +163 0x1000 //RX_TDDRC_ALPHA_UP_1 +164 0x1000 //RX_TDDRC_ALPHA_UP_2 +165 0x1000 //RX_TDDRC_ALPHA_UP_3 +166 0x1000 //RX_TDDRC_ALPHA_UP_4 +184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +190 0x7000 //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +269 0x0000 //RX_TDDRC_THRD_0 +270 0x0000 //RX_TDDRC_THRD_1 +271 0x1800 //RX_TDDRC_THRD_2 +272 0x1800 //RX_TDDRC_THRD_3 +273 0x3000 //RX_TDDRC_SLANT_0 +274 0x6E00 //RX_TDDRC_SLANT_1 +275 0x1000 //RX_TDDRC_ALPHA_UP_0 +276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x199A //RX_TDDRC_HMNC_GAIN +279 0x0001 //RX_TDDRC_SMT_FLAG +280 0x0CCD //RX_TDDRC_SMT_W +281 0x01E0 //RX_TDDRC_DRC_GAIN +195 0x0030 //RX_FDEQ_SUBNUM +196 0x4848 //RX_FDEQ_GAIN_0 +197 0x4848 //RX_FDEQ_GAIN_1 +198 0x4844 //RX_FDEQ_GAIN_2 +199 0x4B4D //RX_FDEQ_GAIN_3 +200 0x4E50 //RX_FDEQ_GAIN_4 +201 0x5254 //RX_FDEQ_GAIN_5 +202 0x5658 //RX_FDEQ_GAIN_6 +203 0x5C60 //RX_FDEQ_GAIN_7 +204 0x6468 //RX_FDEQ_GAIN_8 +205 0x6C70 //RX_FDEQ_GAIN_9 +206 0x7474 //RX_FDEQ_GAIN_10 +207 0x7474 //RX_FDEQ_GAIN_11 +208 0x7474 //RX_FDEQ_GAIN_12 +209 0x7474 //RX_FDEQ_GAIN_13 +210 0x7474 //RX_FDEQ_GAIN_14 +211 0x7474 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0202 //RX_FDEQ_BIN_0 +221 0x0203 //RX_FDEQ_BIN_1 +222 0x0402 //RX_FDEQ_BIN_2 +223 0x0304 //RX_FDEQ_BIN_3 +224 0x0405 //RX_FDEQ_BIN_4 +225 0x0506 //RX_FDEQ_BIN_5 +226 0x0708 //RX_FDEQ_BIN_6 +227 0x090A //RX_FDEQ_BIN_7 +228 0x0B0C //RX_FDEQ_BIN_8 +229 0x0D0E //RX_FDEQ_BIN_9 +230 0x1214 //RX_FDEQ_BIN_10 +231 0x1E1E //RX_FDEQ_BIN_11 +232 0x1E1E //RX_FDEQ_BIN_12 +233 0x1E1E //RX_FDEQ_BIN_13 +234 0x1E1E //RX_FDEQ_BIN_14 +235 0x202C //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x4000 //RX_FDEQ_RESRV_0 +245 0x0320 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0030 //RX_FDDRC_BAND_MARGIN_1 +248 0x0050 //RX_FDDRC_BAND_MARGIN_2 +249 0x0080 //RX_FDDRC_BAND_MARGIN_3 +250 0x0007 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x5000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x6400 //RX_FDDRC_THRD_3_2 +258 0x6400 //RX_FDDRC_THRD_3_3 +259 0x2000 //RX_FDDRC_SLANT_0_0 +260 0x2000 //RX_FDDRC_SLANT_0_1 +261 0x2000 //RX_FDDRC_SLANT_0_2 +262 0x2000 //RX_FDDRC_SLANT_0_3 +263 0x5333 //RX_FDDRC_SLANT_1_0 +264 0x5333 //RX_FDDRC_SLANT_1_1 +265 0x5333 //RX_FDDRC_SLANT_1_2 +266 0x5333 //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +286 0x0100 //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 +#VOL 1 +163 0x1000 //RX_TDDRC_ALPHA_UP_1 +164 0x1000 //RX_TDDRC_ALPHA_UP_2 +165 0x1000 //RX_TDDRC_ALPHA_UP_3 +166 0x1000 //RX_TDDRC_ALPHA_UP_4 +184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +190 0x7000 //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +269 0x0000 //RX_TDDRC_THRD_0 +270 0x0000 //RX_TDDRC_THRD_1 +271 0x1800 //RX_TDDRC_THRD_2 +272 0x1800 //RX_TDDRC_THRD_3 +273 0x3000 //RX_TDDRC_SLANT_0 +274 0x6E00 //RX_TDDRC_SLANT_1 +275 0x1000 //RX_TDDRC_ALPHA_UP_0 +276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x199A //RX_TDDRC_HMNC_GAIN +279 0x0001 //RX_TDDRC_SMT_FLAG +280 0x0CCD //RX_TDDRC_SMT_W +281 0x01E0 //RX_TDDRC_DRC_GAIN +195 0x0030 //RX_FDEQ_SUBNUM +196 0x4848 //RX_FDEQ_GAIN_0 +197 0x4848 //RX_FDEQ_GAIN_1 +198 0x4844 //RX_FDEQ_GAIN_2 +199 0x4B4D //RX_FDEQ_GAIN_3 +200 0x4E50 //RX_FDEQ_GAIN_4 +201 0x5254 //RX_FDEQ_GAIN_5 +202 0x5658 //RX_FDEQ_GAIN_6 +203 0x5C60 //RX_FDEQ_GAIN_7 +204 0x6468 //RX_FDEQ_GAIN_8 +205 0x6C70 //RX_FDEQ_GAIN_9 +206 0x7474 //RX_FDEQ_GAIN_10 +207 0x7474 //RX_FDEQ_GAIN_11 +208 0x7474 //RX_FDEQ_GAIN_12 +209 0x7474 //RX_FDEQ_GAIN_13 +210 0x7474 //RX_FDEQ_GAIN_14 +211 0x7474 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0202 //RX_FDEQ_BIN_0 +221 0x0203 //RX_FDEQ_BIN_1 +222 0x0402 //RX_FDEQ_BIN_2 +223 0x0304 //RX_FDEQ_BIN_3 +224 0x0405 //RX_FDEQ_BIN_4 +225 0x0506 //RX_FDEQ_BIN_5 +226 0x0708 //RX_FDEQ_BIN_6 +227 0x090A //RX_FDEQ_BIN_7 +228 0x0B0C //RX_FDEQ_BIN_8 +229 0x0D0E //RX_FDEQ_BIN_9 +230 0x1214 //RX_FDEQ_BIN_10 +231 0x1E1E //RX_FDEQ_BIN_11 +232 0x1E1E //RX_FDEQ_BIN_12 +233 0x1E1E //RX_FDEQ_BIN_13 +234 0x1E1E //RX_FDEQ_BIN_14 +235 0x202C //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x4000 //RX_FDEQ_RESRV_0 +245 0x0320 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0030 //RX_FDDRC_BAND_MARGIN_1 +248 0x0050 //RX_FDDRC_BAND_MARGIN_2 +249 0x0080 //RX_FDDRC_BAND_MARGIN_3 +250 0x0007 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x5000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x6400 //RX_FDDRC_THRD_3_2 +258 0x6400 //RX_FDDRC_THRD_3_3 +259 0x2000 //RX_FDDRC_SLANT_0_0 +260 0x2000 //RX_FDDRC_SLANT_0_1 +261 0x2000 //RX_FDDRC_SLANT_0_2 +262 0x2000 //RX_FDDRC_SLANT_0_3 +263 0x5333 //RX_FDDRC_SLANT_1_0 +264 0x5333 //RX_FDDRC_SLANT_1_1 +265 0x5333 //RX_FDDRC_SLANT_1_2 +266 0x5333 //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +286 0x0100 //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 +#VOL 2 +163 0x1000 //RX_TDDRC_ALPHA_UP_1 +164 0x1000 //RX_TDDRC_ALPHA_UP_2 +165 0x1000 //RX_TDDRC_ALPHA_UP_3 +166 0x1000 //RX_TDDRC_ALPHA_UP_4 +184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +190 0x7000 //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +269 0x0000 //RX_TDDRC_THRD_0 +270 0x0000 //RX_TDDRC_THRD_1 +271 0x1800 //RX_TDDRC_THRD_2 +272 0x1800 //RX_TDDRC_THRD_3 +273 0x3000 //RX_TDDRC_SLANT_0 +274 0x6E00 //RX_TDDRC_SLANT_1 +275 0x1000 //RX_TDDRC_ALPHA_UP_0 +276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x199A //RX_TDDRC_HMNC_GAIN +279 0x0001 //RX_TDDRC_SMT_FLAG +280 0x0CCD //RX_TDDRC_SMT_W +281 0x01E0 //RX_TDDRC_DRC_GAIN +195 0x0030 //RX_FDEQ_SUBNUM +196 0x4848 //RX_FDEQ_GAIN_0 +197 0x4848 //RX_FDEQ_GAIN_1 +198 0x4844 //RX_FDEQ_GAIN_2 +199 0x4B4D //RX_FDEQ_GAIN_3 +200 0x4E50 //RX_FDEQ_GAIN_4 +201 0x5254 //RX_FDEQ_GAIN_5 +202 0x5658 //RX_FDEQ_GAIN_6 +203 0x5C60 //RX_FDEQ_GAIN_7 +204 0x6468 //RX_FDEQ_GAIN_8 +205 0x6C70 //RX_FDEQ_GAIN_9 +206 0x7474 //RX_FDEQ_GAIN_10 +207 0x7474 //RX_FDEQ_GAIN_11 +208 0x7474 //RX_FDEQ_GAIN_12 +209 0x7474 //RX_FDEQ_GAIN_13 +210 0x7474 //RX_FDEQ_GAIN_14 +211 0x7474 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0202 //RX_FDEQ_BIN_0 +221 0x0203 //RX_FDEQ_BIN_1 +222 0x0402 //RX_FDEQ_BIN_2 +223 0x0304 //RX_FDEQ_BIN_3 +224 0x0405 //RX_FDEQ_BIN_4 +225 0x0506 //RX_FDEQ_BIN_5 +226 0x0708 //RX_FDEQ_BIN_6 +227 0x090A //RX_FDEQ_BIN_7 +228 0x0B0C //RX_FDEQ_BIN_8 +229 0x0D0E //RX_FDEQ_BIN_9 +230 0x1214 //RX_FDEQ_BIN_10 +231 0x1E1E //RX_FDEQ_BIN_11 +232 0x1E1E //RX_FDEQ_BIN_12 +233 0x1E1E //RX_FDEQ_BIN_13 +234 0x1E1E //RX_FDEQ_BIN_14 +235 0x202C //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x4000 //RX_FDEQ_RESRV_0 +245 0x0320 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0030 //RX_FDDRC_BAND_MARGIN_1 +248 0x0050 //RX_FDDRC_BAND_MARGIN_2 +249 0x0080 //RX_FDDRC_BAND_MARGIN_3 +250 0x0007 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x5000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x6400 //RX_FDDRC_THRD_3_2 +258 0x6400 //RX_FDDRC_THRD_3_3 +259 0x2000 //RX_FDDRC_SLANT_0_0 +260 0x2000 //RX_FDDRC_SLANT_0_1 +261 0x2000 //RX_FDDRC_SLANT_0_2 +262 0x2000 //RX_FDDRC_SLANT_0_3 +263 0x5333 //RX_FDDRC_SLANT_1_0 +264 0x5333 //RX_FDDRC_SLANT_1_1 +265 0x5333 //RX_FDDRC_SLANT_1_2 +266 0x5333 //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +286 0x0100 //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 +#VOL 3 +163 0x1000 //RX_TDDRC_ALPHA_UP_1 +164 0x1000 //RX_TDDRC_ALPHA_UP_2 +165 0x1000 //RX_TDDRC_ALPHA_UP_3 +166 0x1000 //RX_TDDRC_ALPHA_UP_4 +184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +190 0x7000 //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +269 0x0000 //RX_TDDRC_THRD_0 +270 0x0000 //RX_TDDRC_THRD_1 +271 0x1800 //RX_TDDRC_THRD_2 +272 0x1800 //RX_TDDRC_THRD_3 +273 0x3000 //RX_TDDRC_SLANT_0 +274 0x6E00 //RX_TDDRC_SLANT_1 +275 0x1000 //RX_TDDRC_ALPHA_UP_0 +276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x199A //RX_TDDRC_HMNC_GAIN +279 0x0001 //RX_TDDRC_SMT_FLAG +280 0x0CCD //RX_TDDRC_SMT_W +281 0x01E0 //RX_TDDRC_DRC_GAIN +195 0x0030 //RX_FDEQ_SUBNUM +196 0x4848 //RX_FDEQ_GAIN_0 +197 0x4848 //RX_FDEQ_GAIN_1 +198 0x4844 //RX_FDEQ_GAIN_2 +199 0x4B4D //RX_FDEQ_GAIN_3 +200 0x4E50 //RX_FDEQ_GAIN_4 +201 0x5254 //RX_FDEQ_GAIN_5 +202 0x5658 //RX_FDEQ_GAIN_6 +203 0x5C60 //RX_FDEQ_GAIN_7 +204 0x6468 //RX_FDEQ_GAIN_8 +205 0x6C70 //RX_FDEQ_GAIN_9 +206 0x7474 //RX_FDEQ_GAIN_10 +207 0x7474 //RX_FDEQ_GAIN_11 +208 0x7474 //RX_FDEQ_GAIN_12 +209 0x7474 //RX_FDEQ_GAIN_13 +210 0x7474 //RX_FDEQ_GAIN_14 +211 0x7474 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0202 //RX_FDEQ_BIN_0 +221 0x0203 //RX_FDEQ_BIN_1 +222 0x0402 //RX_FDEQ_BIN_2 +223 0x0304 //RX_FDEQ_BIN_3 +224 0x0405 //RX_FDEQ_BIN_4 +225 0x0506 //RX_FDEQ_BIN_5 +226 0x0708 //RX_FDEQ_BIN_6 +227 0x090A //RX_FDEQ_BIN_7 +228 0x0B0C //RX_FDEQ_BIN_8 +229 0x0D0E //RX_FDEQ_BIN_9 +230 0x1214 //RX_FDEQ_BIN_10 +231 0x1E1E //RX_FDEQ_BIN_11 +232 0x1E1E //RX_FDEQ_BIN_12 +233 0x1E1E //RX_FDEQ_BIN_13 +234 0x1E1E //RX_FDEQ_BIN_14 +235 0x202C //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x4000 //RX_FDEQ_RESRV_0 +245 0x0320 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0030 //RX_FDDRC_BAND_MARGIN_1 +248 0x0050 //RX_FDDRC_BAND_MARGIN_2 +249 0x0080 //RX_FDDRC_BAND_MARGIN_3 +250 0x0007 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x5000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x6400 //RX_FDDRC_THRD_3_2 +258 0x6400 //RX_FDDRC_THRD_3_3 +259 0x2000 //RX_FDDRC_SLANT_0_0 +260 0x2000 //RX_FDDRC_SLANT_0_1 +261 0x2000 //RX_FDDRC_SLANT_0_2 +262 0x2000 //RX_FDDRC_SLANT_0_3 +263 0x5333 //RX_FDDRC_SLANT_1_0 +264 0x5333 //RX_FDDRC_SLANT_1_1 +265 0x5333 //RX_FDDRC_SLANT_1_2 +266 0x5333 //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +286 0x0100 //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 +#VOL 4 +163 0x1000 //RX_TDDRC_ALPHA_UP_1 +164 0x1000 //RX_TDDRC_ALPHA_UP_2 +165 0x1000 //RX_TDDRC_ALPHA_UP_3 +166 0x1000 //RX_TDDRC_ALPHA_UP_4 +184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +190 0x7000 //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +269 0x0000 //RX_TDDRC_THRD_0 +270 0x0000 //RX_TDDRC_THRD_1 +271 0x1800 //RX_TDDRC_THRD_2 +272 0x1800 //RX_TDDRC_THRD_3 +273 0x3000 //RX_TDDRC_SLANT_0 +274 0x6E00 //RX_TDDRC_SLANT_1 +275 0x1000 //RX_TDDRC_ALPHA_UP_0 +276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x199A //RX_TDDRC_HMNC_GAIN +279 0x0001 //RX_TDDRC_SMT_FLAG +280 0x0CCD //RX_TDDRC_SMT_W +281 0x01E0 //RX_TDDRC_DRC_GAIN +195 0x0030 //RX_FDEQ_SUBNUM +196 0x4848 //RX_FDEQ_GAIN_0 +197 0x4848 //RX_FDEQ_GAIN_1 +198 0x4844 //RX_FDEQ_GAIN_2 +199 0x4B4D //RX_FDEQ_GAIN_3 +200 0x4E50 //RX_FDEQ_GAIN_4 +201 0x5254 //RX_FDEQ_GAIN_5 +202 0x5658 //RX_FDEQ_GAIN_6 +203 0x5C60 //RX_FDEQ_GAIN_7 +204 0x6468 //RX_FDEQ_GAIN_8 +205 0x6C70 //RX_FDEQ_GAIN_9 +206 0x7474 //RX_FDEQ_GAIN_10 +207 0x7474 //RX_FDEQ_GAIN_11 +208 0x7474 //RX_FDEQ_GAIN_12 +209 0x7474 //RX_FDEQ_GAIN_13 +210 0x7474 //RX_FDEQ_GAIN_14 +211 0x7474 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0202 //RX_FDEQ_BIN_0 +221 0x0203 //RX_FDEQ_BIN_1 +222 0x0402 //RX_FDEQ_BIN_2 +223 0x0304 //RX_FDEQ_BIN_3 +224 0x0405 //RX_FDEQ_BIN_4 +225 0x0506 //RX_FDEQ_BIN_5 +226 0x0708 //RX_FDEQ_BIN_6 +227 0x090A //RX_FDEQ_BIN_7 +228 0x0B0C //RX_FDEQ_BIN_8 +229 0x0D0E //RX_FDEQ_BIN_9 +230 0x1214 //RX_FDEQ_BIN_10 +231 0x1E1E //RX_FDEQ_BIN_11 +232 0x1E1E //RX_FDEQ_BIN_12 +233 0x1E1E //RX_FDEQ_BIN_13 +234 0x1E1E //RX_FDEQ_BIN_14 +235 0x202C //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x4000 //RX_FDEQ_RESRV_0 +245 0x0320 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0030 //RX_FDDRC_BAND_MARGIN_1 +248 0x0050 //RX_FDDRC_BAND_MARGIN_2 +249 0x0080 //RX_FDDRC_BAND_MARGIN_3 +250 0x0007 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x5000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x6400 //RX_FDDRC_THRD_3_2 +258 0x6400 //RX_FDDRC_THRD_3_3 +259 0x2000 //RX_FDDRC_SLANT_0_0 +260 0x2000 //RX_FDDRC_SLANT_0_1 +261 0x2000 //RX_FDDRC_SLANT_0_2 +262 0x2000 //RX_FDDRC_SLANT_0_3 +263 0x5333 //RX_FDDRC_SLANT_1_0 +264 0x5333 //RX_FDDRC_SLANT_1_1 +265 0x5333 //RX_FDDRC_SLANT_1_2 +266 0x5333 //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +286 0x0100 //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 +#VOL 5 +163 0x1000 //RX_TDDRC_ALPHA_UP_1 +164 0x1000 //RX_TDDRC_ALPHA_UP_2 +165 0x1000 //RX_TDDRC_ALPHA_UP_3 +166 0x1000 //RX_TDDRC_ALPHA_UP_4 +184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +190 0x7000 //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +269 0x0000 //RX_TDDRC_THRD_0 +270 0x0000 //RX_TDDRC_THRD_1 +271 0x1800 //RX_TDDRC_THRD_2 +272 0x1800 //RX_TDDRC_THRD_3 +273 0x3000 //RX_TDDRC_SLANT_0 +274 0x6E00 //RX_TDDRC_SLANT_1 +275 0x1000 //RX_TDDRC_ALPHA_UP_0 +276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x199A //RX_TDDRC_HMNC_GAIN +279 0x0001 //RX_TDDRC_SMT_FLAG +280 0x0CCD //RX_TDDRC_SMT_W +281 0x01E0 //RX_TDDRC_DRC_GAIN +195 0x0030 //RX_FDEQ_SUBNUM +196 0x4848 //RX_FDEQ_GAIN_0 +197 0x4848 //RX_FDEQ_GAIN_1 +198 0x4844 //RX_FDEQ_GAIN_2 +199 0x4B4D //RX_FDEQ_GAIN_3 +200 0x4E50 //RX_FDEQ_GAIN_4 +201 0x5254 //RX_FDEQ_GAIN_5 +202 0x5658 //RX_FDEQ_GAIN_6 +203 0x5C60 //RX_FDEQ_GAIN_7 +204 0x6468 //RX_FDEQ_GAIN_8 +205 0x6C70 //RX_FDEQ_GAIN_9 +206 0x7474 //RX_FDEQ_GAIN_10 +207 0x7474 //RX_FDEQ_GAIN_11 +208 0x7474 //RX_FDEQ_GAIN_12 +209 0x7474 //RX_FDEQ_GAIN_13 +210 0x7474 //RX_FDEQ_GAIN_14 +211 0x7474 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0202 //RX_FDEQ_BIN_0 +221 0x0203 //RX_FDEQ_BIN_1 +222 0x0402 //RX_FDEQ_BIN_2 +223 0x0304 //RX_FDEQ_BIN_3 +224 0x0405 //RX_FDEQ_BIN_4 +225 0x0506 //RX_FDEQ_BIN_5 +226 0x0708 //RX_FDEQ_BIN_6 +227 0x090A //RX_FDEQ_BIN_7 +228 0x0B0C //RX_FDEQ_BIN_8 +229 0x0D0E //RX_FDEQ_BIN_9 +230 0x1214 //RX_FDEQ_BIN_10 +231 0x1E1E //RX_FDEQ_BIN_11 +232 0x1E1E //RX_FDEQ_BIN_12 +233 0x1E1E //RX_FDEQ_BIN_13 +234 0x1E1E //RX_FDEQ_BIN_14 +235 0x202C //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x4000 //RX_FDEQ_RESRV_0 +245 0x0320 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0030 //RX_FDDRC_BAND_MARGIN_1 +248 0x0050 //RX_FDDRC_BAND_MARGIN_2 +249 0x0080 //RX_FDDRC_BAND_MARGIN_3 +250 0x0007 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x5000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x6400 //RX_FDDRC_THRD_3_2 +258 0x6400 //RX_FDDRC_THRD_3_3 +259 0x2000 //RX_FDDRC_SLANT_0_0 +260 0x2000 //RX_FDDRC_SLANT_0_1 +261 0x2000 //RX_FDDRC_SLANT_0_2 +262 0x2000 //RX_FDDRC_SLANT_0_3 +263 0x5333 //RX_FDDRC_SLANT_1_0 +264 0x5333 //RX_FDDRC_SLANT_1_1 +265 0x5333 //RX_FDDRC_SLANT_1_2 +266 0x5333 //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +286 0x0100 //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 +#VOL 6 +163 0x1000 //RX_TDDRC_ALPHA_UP_1 +164 0x1000 //RX_TDDRC_ALPHA_UP_2 +165 0x1000 //RX_TDDRC_ALPHA_UP_3 +166 0x1000 //RX_TDDRC_ALPHA_UP_4 +184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +190 0x7000 //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +269 0x0000 //RX_TDDRC_THRD_0 +270 0x0000 //RX_TDDRC_THRD_1 +271 0x1800 //RX_TDDRC_THRD_2 +272 0x1800 //RX_TDDRC_THRD_3 +273 0x3000 //RX_TDDRC_SLANT_0 +274 0x6E00 //RX_TDDRC_SLANT_1 +275 0x1000 //RX_TDDRC_ALPHA_UP_0 +276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x199A //RX_TDDRC_HMNC_GAIN +279 0x0001 //RX_TDDRC_SMT_FLAG +280 0x0CCD //RX_TDDRC_SMT_W +281 0x01E0 //RX_TDDRC_DRC_GAIN +195 0x0030 //RX_FDEQ_SUBNUM +196 0x4848 //RX_FDEQ_GAIN_0 +197 0x4848 //RX_FDEQ_GAIN_1 +198 0x4844 //RX_FDEQ_GAIN_2 +199 0x4B4D //RX_FDEQ_GAIN_3 +200 0x4E50 //RX_FDEQ_GAIN_4 +201 0x5254 //RX_FDEQ_GAIN_5 +202 0x5658 //RX_FDEQ_GAIN_6 +203 0x5C60 //RX_FDEQ_GAIN_7 +204 0x6468 //RX_FDEQ_GAIN_8 +205 0x6C70 //RX_FDEQ_GAIN_9 +206 0x7474 //RX_FDEQ_GAIN_10 +207 0x7474 //RX_FDEQ_GAIN_11 +208 0x7474 //RX_FDEQ_GAIN_12 +209 0x7474 //RX_FDEQ_GAIN_13 +210 0x7474 //RX_FDEQ_GAIN_14 +211 0x7474 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0202 //RX_FDEQ_BIN_0 +221 0x0203 //RX_FDEQ_BIN_1 +222 0x0402 //RX_FDEQ_BIN_2 +223 0x0304 //RX_FDEQ_BIN_3 +224 0x0405 //RX_FDEQ_BIN_4 +225 0x0506 //RX_FDEQ_BIN_5 +226 0x0708 //RX_FDEQ_BIN_6 +227 0x090A //RX_FDEQ_BIN_7 +228 0x0B0C //RX_FDEQ_BIN_8 +229 0x0D0E //RX_FDEQ_BIN_9 +230 0x1214 //RX_FDEQ_BIN_10 +231 0x1E1E //RX_FDEQ_BIN_11 +232 0x1E1E //RX_FDEQ_BIN_12 +233 0x1E1E //RX_FDEQ_BIN_13 +234 0x1E1E //RX_FDEQ_BIN_14 +235 0x202C //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x4000 //RX_FDEQ_RESRV_0 +245 0x0320 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0030 //RX_FDDRC_BAND_MARGIN_1 +248 0x0050 //RX_FDDRC_BAND_MARGIN_2 +249 0x0080 //RX_FDDRC_BAND_MARGIN_3 +250 0x0007 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x5000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x6400 //RX_FDDRC_THRD_3_2 +258 0x6400 //RX_FDDRC_THRD_3_3 +259 0x2000 //RX_FDDRC_SLANT_0_0 +260 0x2000 //RX_FDDRC_SLANT_0_1 +261 0x2000 //RX_FDDRC_SLANT_0_2 +262 0x2000 //RX_FDDRC_SLANT_0_3 +263 0x5333 //RX_FDDRC_SLANT_1_0 +264 0x5333 //RX_FDDRC_SLANT_1_1 +265 0x5333 //RX_FDDRC_SLANT_1_2 +266 0x5333 //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +286 0x0100 //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 diff --git a/audio/ravenclaw/tuning/fortemedia/HANDSFREE.dat b/audio/ravenclaw/tuning/fortemedia/HANDSFREE.dat index 3c14fa7..91b4af9 100644 Binary files a/audio/ravenclaw/tuning/fortemedia/HANDSFREE.dat and b/audio/ravenclaw/tuning/fortemedia/HANDSFREE.dat differ diff --git a/audio/ravenclaw/tuning/fortemedia/HANDSFREE.mods b/audio/ravenclaw/tuning/fortemedia/HANDSFREE.mods index b528ddc..acf77bd 100644 --- a/audio/ravenclaw/tuning/fortemedia/HANDSFREE.mods +++ b/audio/ravenclaw/tuning/fortemedia/HANDSFREE.mods @@ -1,11 +1,12 @@ #PLATFORM_NAME gChip #EXPORT_FLAG HANDSFREE -#SINGLE_API_VER 1.1.6 -#SAVE_TIME 2021-12-20 16:28:16 +#SINGLE_API_VER 1.2.0 +#SAVE_TIME 2022-02-10 16:25:23 -#CASE_NAME HANDSFREE-HANDSFREE-RESERVE1-FB -#PARAM_TYPE TX+RX -#TOTAL_CUSTOM_STEP 7 +#CASE_NAME HANDSFREE-HANDFREE-RESERVE1-FB +#PARAM_MODE FULL +#PARAM_TYPE TX+2RX +#TOTAL_CUSTOM_STEP 7+7 #TX 0 0x0001 //TX_OPERATION_MODE_0 1 0x0001 //TX_OPERATION_MODE_1 @@ -258,11 +259,11 @@ 248 0xF800 //TX_THR_SN_EST_6 249 0xF800 //TX_THR_SN_EST_7 250 0x0100 //TX_DELTA_THR_SN_EST_0 -251 0x0200 //TX_DELTA_THR_SN_EST_1 -252 0x0100 //TX_DELTA_THR_SN_EST_2 -253 0x0200 //TX_DELTA_THR_SN_EST_3 +251 0x0100 //TX_DELTA_THR_SN_EST_1 +252 0x0200 //TX_DELTA_THR_SN_EST_2 +253 0x0100 //TX_DELTA_THR_SN_EST_3 254 0x0100 //TX_DELTA_THR_SN_EST_4 -255 0x0100 //TX_DELTA_THR_SN_EST_5 +255 0x0200 //TX_DELTA_THR_SN_EST_5 256 0x0200 //TX_DELTA_THR_SN_EST_6 257 0x0200 //TX_DELTA_THR_SN_EST_7 258 0x4000 //TX_LAMBDA_NN_EST_0 @@ -290,11 +291,11 @@ 280 0x1000 //TX_B_POST_FLT_1 281 0x0010 //TX_NS_LVL_CTRL_0 282 0x0014 //TX_NS_LVL_CTRL_1 -283 0x0014 //TX_NS_LVL_CTRL_2 -284 0x0018 //TX_NS_LVL_CTRL_3 -285 0x0016 //TX_NS_LVL_CTRL_4 -286 0x0014 //TX_NS_LVL_CTRL_5 -287 0x0011 //TX_NS_LVL_CTRL_6 +283 0x0018 //TX_NS_LVL_CTRL_2 +284 0x0016 //TX_NS_LVL_CTRL_3 +285 0x0014 //TX_NS_LVL_CTRL_4 +286 0x0011 //TX_NS_LVL_CTRL_5 +287 0x0014 //TX_NS_LVL_CTRL_6 288 0x0011 //TX_NS_LVL_CTRL_7 289 0x000F //TX_MIN_GAIN_S_0 290 0x0010 //TX_MIN_GAIN_S_1 @@ -312,8 +313,8 @@ 302 0x4000 //TX_SNRI_SUP_2 303 0x4000 //TX_SNRI_SUP_3 304 0x4000 //TX_SNRI_SUP_4 -305 0x4000 //TX_SNRI_SUP_5 -306 0x50C0 //TX_SNRI_SUP_6 +305 0x50C0 //TX_SNRI_SUP_5 +306 0x4000 //TX_SNRI_SUP_6 307 0x7FFF //TX_SNRI_SUP_7 308 0x7FFF //TX_THR_LFNS 309 0x0018 //TX_G_LFNS @@ -322,19 +323,19 @@ 312 0x7FFF //TX_A_POST_FILT_0 313 0x2000 //TX_A_POST_FILT_1 314 0x5000 //TX_A_POST_FILT_S_0 -315 0x6000 //TX_A_POST_FILT_S_1 -316 0x4C00 //TX_A_POST_FILT_S_2 -317 0x4000 //TX_A_POST_FILT_S_3 -318 0x6000 //TX_A_POST_FILT_S_4 -319 0x4000 //TX_A_POST_FILT_S_5 -320 0x5000 //TX_A_POST_FILT_S_6 +315 0x4C00 //TX_A_POST_FILT_S_1 +316 0x4000 //TX_A_POST_FILT_S_2 +317 0x6000 //TX_A_POST_FILT_S_3 +318 0x4000 //TX_A_POST_FILT_S_4 +319 0x5000 //TX_A_POST_FILT_S_5 +320 0x6000 //TX_A_POST_FILT_S_6 321 0x7000 //TX_A_POST_FILT_S_7 322 0x2000 //TX_B_POST_FILT_0 -323 0x1000 //TX_B_POST_FILT_1 +323 0x2000 //TX_B_POST_FILT_1 324 0x2000 //TX_B_POST_FILT_2 -325 0x2000 //TX_B_POST_FILT_3 +325 0x4000 //TX_B_POST_FILT_3 326 0x4000 //TX_B_POST_FILT_4 -327 0x4000 //TX_B_POST_FILT_5 +327 0x1000 //TX_B_POST_FILT_5 328 0x1000 //TX_B_POST_FILT_6 329 0x2000 //TX_B_POST_FILT_7 330 0x4000 //TX_B_LESSCUT_RTO_S_0 @@ -342,14 +343,14 @@ 332 0x7FFF //TX_B_LESSCUT_RTO_S_2 333 0x7FFF //TX_B_LESSCUT_RTO_S_3 334 0x7FFF //TX_B_LESSCUT_RTO_S_4 -335 0x7FFF //TX_B_LESSCUT_RTO_S_5 -336 0x6000 //TX_B_LESSCUT_RTO_S_6 +335 0x6000 //TX_B_LESSCUT_RTO_S_5 +336 0x7FFF //TX_B_LESSCUT_RTO_S_6 337 0x7FFF //TX_B_LESSCUT_RTO_S_7 338 0x7C00 //TX_LAMBDA_PFILT 339 0x7C00 //TX_LAMBDA_PFILT_S_0 340 0x7C00 //TX_LAMBDA_PFILT_S_1 -341 0x7C00 //TX_LAMBDA_PFILT_S_2 -342 0x7A00 //TX_LAMBDA_PFILT_S_3 +341 0x7A00 //TX_LAMBDA_PFILT_S_2 +342 0x7C00 //TX_LAMBDA_PFILT_S_3 343 0x7C00 //TX_LAMBDA_PFILT_S_4 344 0x7C00 //TX_LAMBDA_PFILT_S_5 345 0x7C00 //TX_LAMBDA_PFILT_S_6 @@ -387,10 +388,10 @@ 377 0x7FFF //TX_NOISE_TH_5_4 378 0x2710 //TX_NOISE_TH_6 379 0x0033 //TX_MINENOISE_TH -380 0x4000 //TX_MINENOISE_MIC0_TH_MTS -381 0xFFEE //TX_MINENOISE_MIC0_TH_EXP -382 0x6000 //TX_MINENOISE_MIC0_S_TH_MTS -383 0xFFF3 //TX_MINENOISE_MIC0_S_TH_EXP +380 0xD508 //TX_MORENS_TFMASK_TH +381 0x0001 //TX_DRC_QUIET_FLOOR +382 0x7999 //TX_RATIODTL_CUT_TH +383 0x0119 //TX_DT_CUT_K1 384 0x0666 //TX_OUT_ENER_S_TH_CLEAN 385 0x0666 //TX_OUT_ENER_S_TH_LESSCLEAN 386 0x0333 //TX_OUT_ENER_S_TH_NOISY @@ -398,15 +399,15 @@ 388 0x0333 //TX_OUT_ENER_TH_SPEECH 389 0x2000 //TX_SN_NPB_GAIN 390 0x0000 //TX_NN_NPB_GAIN -391 0x0000 //TX_CSX_ALPHA_0 -392 0x0000 //TX_CSX_ALPHA_1 -393 0x0000 //TX_CSX_ALPHA_2 -394 0x0000 //TX_CSX_ALPHA_3 -395 0x0800 //TX_MU_ARSP_EST -396 0x00C8 //TX_P_OUTBEAM_MIN_TH +391 0x7FFF //TX_POST_MASK_SUP_HSNE +392 0x1388 //TX_TAIL_DET_TH +393 0x4000 //TX_B_LESSCUT_RTO_WTA +394 0x0000 //TX_MEL_G_R +395 0x0080 //TX_SUPHIGH_TH +396 0x0000 //TX_MASK_G_R 397 0x0002 //TX_EXTRA_NS_L -398 0x0800 //TX_EXTRA_NS_A -399 0x0005 //TX_VR_NOISE_FLOOR_TH +398 0x1800 //TX_C_POST_FLT_MASK +399 0x4000 //TX_A_POST_FLT_WNS 400 0x0148 //TX_MIN_G_LOW300HZ 401 0x0002 //TX_MAXLEVEL_CNG 402 0x00B4 //TX_STN_NOISE_TH @@ -521,16 +522,16 @@ 511 0x6666 //TX_MIC_TO_BFGAIN 512 0x0000 //TX_MICTOBFGAIN0 513 0x0000 //TX_FASTMUE_TH -514 0x0000 //TX_DERVB_LEN_0 -515 0x0000 //TX_DERVB_LEN_1 -516 0x0000 //TX_RHO_DERVB -517 0x0000 //TX_MIC_INDX_DERVB -518 0x0000 //TX_MU_DERVB -519 0x0000 //TX_DR_RESRV_0 -520 0x0000 //TX_DR_RESRV_1 -521 0x0000 //TX_DR_RESRV_2 -522 0x0000 //TX_DR_RESRV_3 -523 0x0000 //TX_DR_RESRV_4 +514 0x3000 //TX_DEREVERB_LF_MU +515 0x34CD //TX_DEREVERB_HF_MU +516 0x0007 //TX_DEREVERB_DELAY +517 0x0004 //TX_DEREVERB_COEF_LEN +518 0x0003 //TX_DEREVERB_DNR +519 0x0000 //TX_DEREVERB_ALPHA +520 0x0000 //TX_DEREVERB_BETA +521 0x3A98 //TX_GSC_RTOL_TH +522 0x3A98 //TX_GSC_RTOH_TH +523 0x7E2C //TX_WIDE2_MEANHTH 524 0x0000 //TX_DR_RESRV_5 525 0x0000 //TX_DR_RESRV_6 526 0x0000 //TX_DR_RESRV_7 @@ -904,6 +905,71 @@ 894 0xC000 //TX_FASTNS_SSA_THHFL 895 0xCCCC //TX_FASTNS_SSA_THLFH 896 0xD999 //TX_FASTNS_SSA_THHFH +897 0x2339 //TX_SENDFUNC_REG_MICMUTE +898 0x0021 //TX_SENDFUNC_REG_MICMUTE1 +899 0x02BC //TX_MICMUTE_RATIO_THR +900 0x0140 //TX_MICMUTE_AMP_THR +901 0x0004 //TX_MICMUTE_HPF_IND +902 0x00C0 //TX_MICMUTE_LOG_EYR_TH +903 0x0008 //TX_MICMUTE_CVG_TIME +904 0x0008 //TX_MICMUTE_RELEASE_TIME +905 0x01FE //TX_MIC_VOLUME_MIC0MUTE +906 0x0020 //TX_MICMUTE_EPD_OFFSET_0 +907 0x001E //TX_MICMUTE_FRQ_AEC_L +908 0x7999 //TX_MICMUTE_EAD_THR +909 0x7FFF //TX_MICMUTE_LAMBDA_CB_NLE +910 0x7FFF //TX_MICMUTE_LAMBDA_RE_EST +911 0x4000 //TX_DTD_THR1_MICMUTE_0 +912 0x7000 //TX_DTD_THR1_MICMUTE_1 +913 0x7FFF //TX_DTD_THR1_MICMUTE_2 +914 0x7FFF //TX_DTD_THR1_MICMUTE_3 +915 0x6CCC //TX_DTD_THR2_MICMUTE_0 +916 0x0400 //TX_MICMUTE_MIN_EQ_RE_EST_0 +917 0x0400 //TX_MICMUTE_MIN_EQ_RE_EST_1 +918 0x1000 //TX_MICMUTE_MIN_EQ_RE_EST_2 +919 0x7FFF //TX_MICMUTE_MIN_EQ_RE_EST_3 +920 0x7FFF //TX_MICMUTE_MIN_EQ_RE_EST_4 +921 0x4000 //TX_MICMUTE_C_POST_FLT +922 0x03E8 //TX_MICMUTE_DT_CUT_K +923 0x0001 //TX_MICMUTE_DT_CUT_THR +924 0x03E8 //TX_MICMUTE_DT_CUT_K2 +925 0x0001 //TX_MICMUTE_DT_CUT_THR2 +926 0x0064 //TX_MICMUTE_DT2_HOLD_N +927 0x1000 //TX_MICMUTE_RATIODTH_THCUT +928 0x1000 //TX_MICMUTE_B_POST_FLT_ECHOL +929 0x7FFF //TX_MICMUTE_B_POST_FLT_ECHOH +930 0x0400 //TX_MICMUTE_C_POST_FLT_MASK +931 0x7999 //TX_MICMUTE_RATIODTL_CUT_TH +932 0x0258 //TX_MICMUTE_DT_CUT_K1 +933 0x0800 //TX_MICMUTE_N2_SN_EST +934 0xFC00 //TX_MICMUTE_THR_SN_EST_0 +935 0x001C //TX_MICMUTE_MIN_G_CTRL_0 +936 0x6000 //TX_MICMUTE_A_POST_FILT_S_0 +937 0x7000 //TX_MICMUTE_B_POST_FILT_0 +938 0x2710 //TX_MIC1RUB_AMP_THR +939 0x0010 //TX_MIC1MUTE_RATIO_THR +940 0x0450 //TX_MIC1MUTE_AMP_THR +941 0x0008 //TX_MIC1MUTE_CVG_TIME +942 0x0008 //TX_MIC1MUTE_RELEASE_TIME +943 0x0000 //TX_AMS_RESRV_01 +944 0x0000 //TX_AMS_RESRV_02 +945 0x0000 //TX_AMS_RESRV_03 +946 0x0000 //TX_AMS_RESRV_04 +947 0x0000 //TX_AMS_RESRV_05 +948 0x0000 //TX_AMS_RESRV_06 +949 0x0000 //TX_AMS_RESRV_07 +950 0x0000 //TX_AMS_RESRV_08 +951 0x0000 //TX_AMS_RESRV_09 +952 0x0000 //TX_AMS_RESRV_10 +953 0x0000 //TX_AMS_RESRV_11 +954 0x0000 //TX_AMS_RESRV_12 +955 0x0000 //TX_AMS_RESRV_13 +956 0x0000 //TX_AMS_RESRV_14 +957 0x0000 //TX_AMS_RESRV_15 +958 0x0000 //TX_AMS_RESRV_16 +959 0x0000 //TX_AMS_RESRV_17 +960 0x0000 //TX_AMS_RESRV_18 +961 0x0000 //TX_AMS_RESRV_19 #RX 0 0x006C //RX_RECVFUNC_MODE_0 1 0x0000 //RX_RECVFUNC_MODE_1 @@ -1755,10 +1821,862 @@ 110 0x0000 //RX_FDDRC_RESRV_0 129 0x0100 //RX_SPK_VOL 130 0x0000 //RX_VOL_RESRV_0 +#RX 2 +157 0x006C //RX_RECVFUNC_MODE_0 +158 0x0000 //RX_RECVFUNC_MODE_1 +159 0x0004 //RX_SAMPLINGFREQ_SIG +160 0x0004 //RX_SAMPLINGFREQ_PROC +161 0x000A //RX_FRAME_SZ +162 0x0000 //RX_DELAY_OPT +163 0x4000 //RX_TDDRC_ALPHA_UP_1 +164 0x4000 //RX_TDDRC_ALPHA_UP_2 +165 0x4000 //RX_TDDRC_ALPHA_UP_3 +166 0x4000 //RX_TDDRC_ALPHA_UP_4 +167 0x065B //RX_PGA +168 0x7E56 //RX_A_HP +169 0x4000 //RX_B_PE +170 0x7800 //RX_THR_PITCH_DET_0 +171 0x7000 //RX_THR_PITCH_DET_1 +172 0x6000 //RX_THR_PITCH_DET_2 +173 0x0008 //RX_PITCH_BFR_LEN +174 0x0003 //RX_SBD_PITCH_DET +175 0x0100 //RX_PP_RESRV_0 +176 0x0020 //RX_PP_RESRV_1 +177 0x0400 //RX_N_SN_EST +178 0x000C //RX_N2_SN_EST +179 0x0014 //RX_NS_LVL_CTRL +180 0xF400 //RX_THR_SN_EST +181 0x7E00 //RX_LAMBDA_PFILT +182 0x00C8 //RX_FENS_RESRV_0 +183 0x0190 //RX_FENS_RESRV_1 +184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +187 0x0002 //RX_EXTRA_NS_L +188 0x0800 //RX_EXTRA_NS_A +189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +190 0x7FFF //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +192 0x199A //RX_A_POST_FLT +193 0x0000 //RX_LMT_THRD +194 0x4000 //RX_LMT_ALPHA +195 0x0020 //RX_FDEQ_SUBNUM +196 0x4848 //RX_FDEQ_GAIN_0 +197 0x4848 //RX_FDEQ_GAIN_1 +198 0x4848 //RX_FDEQ_GAIN_2 +199 0x4870 //RX_FDEQ_GAIN_3 +200 0x4848 //RX_FDEQ_GAIN_4 +201 0x4848 //RX_FDEQ_GAIN_5 +202 0x4850 //RX_FDEQ_GAIN_6 +203 0x485C //RX_FDEQ_GAIN_7 +204 0x5C60 //RX_FDEQ_GAIN_8 +205 0x685C //RX_FDEQ_GAIN_9 +206 0x5640 //RX_FDEQ_GAIN_10 +207 0x4040 //RX_FDEQ_GAIN_11 +208 0x5C58 //RX_FDEQ_GAIN_12 +209 0x5C60 //RX_FDEQ_GAIN_13 +210 0x6060 //RX_FDEQ_GAIN_14 +211 0x6060 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0202 //RX_FDEQ_BIN_0 +221 0x0203 //RX_FDEQ_BIN_1 +222 0x0303 //RX_FDEQ_BIN_2 +223 0x0402 //RX_FDEQ_BIN_3 +224 0x0504 //RX_FDEQ_BIN_4 +225 0x0209 //RX_FDEQ_BIN_5 +226 0x0808 //RX_FDEQ_BIN_6 +227 0x090A //RX_FDEQ_BIN_7 +228 0x0B0C //RX_FDEQ_BIN_8 +229 0x0D0E //RX_FDEQ_BIN_9 +230 0x1013 //RX_FDEQ_BIN_10 +231 0x1719 //RX_FDEQ_BIN_11 +232 0x1B1E //RX_FDEQ_BIN_12 +233 0x1E1E //RX_FDEQ_BIN_13 +234 0x1E28 //RX_FDEQ_BIN_14 +235 0x282C //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x4000 //RX_FDEQ_RESRV_0 +245 0x0320 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0030 //RX_FDDRC_BAND_MARGIN_1 +248 0x0050 //RX_FDDRC_BAND_MARGIN_2 +249 0x0080 //RX_FDDRC_BAND_MARGIN_3 +250 0x0004 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x2000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x2000 //RX_FDDRC_THRD_3_2 +258 0x5000 //RX_FDDRC_THRD_3_3 +259 0x4000 //RX_FDDRC_SLANT_0_0 +260 0x4000 //RX_FDDRC_SLANT_0_1 +261 0x4000 //RX_FDDRC_SLANT_0_2 +262 0x4000 //RX_FDDRC_SLANT_0_3 +263 0x7FFF //RX_FDDRC_SLANT_1_0 +264 0x7FFF //RX_FDDRC_SLANT_1_1 +265 0x7FFF //RX_FDDRC_SLANT_1_2 +266 0x7FFF //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +268 0x0002 //RX_FILTINDX +269 0x0001 //RX_TDDRC_THRD_0 +270 0x0002 //RX_TDDRC_THRD_1 +271 0x1800 //RX_TDDRC_THRD_2 +272 0x1800 //RX_TDDRC_THRD_3 +273 0x6000 //RX_TDDRC_SLANT_0 +274 0x6E00 //RX_TDDRC_SLANT_1 +275 0x4000 //RX_TDDRC_ALPHA_UP_0 +276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x199A //RX_TDDRC_HMNC_GAIN +279 0x0001 //RX_TDDRC_SMT_FLAG +280 0x0CCD //RX_TDDRC_SMT_W +281 0x03C3 //RX_TDDRC_DRC_GAIN +282 0x7C00 //RX_LAMBDA_PKA_FP +283 0x2000 //RX_TPKA_FP +284 0x2000 //RX_MIN_G_FP +285 0x0080 //RX_MAX_G_FP +286 0x0012 //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 +288 0x0000 //RX_MAXLEVEL_CNG +289 0x3000 //RX_BWE_UV_TH +290 0x3000 //RX_BWE_UV_TH2 +291 0x1800 //RX_BWE_UV_TH3 +292 0x1000 //RX_BWE_V_TH +293 0x04CD //RX_BWE_GAIN1_V_TH1 +294 0x0F33 //RX_BWE_GAIN1_V_TH2 +295 0x7333 //RX_BWE_UV_EQ +296 0x199A //RX_BWE_V_EQ +297 0x7333 //RX_BWE_TONE_TH +298 0x0004 //RX_BWE_UV_HOLD_T +299 0x6CCD //RX_BWE_GAIN2_ALPHA +300 0x799A //RX_BWE_GAIN3_ALPHA +301 0x001E //RX_BWE_CUTOFF +302 0x3000 //RX_BWE_GAINFILL +303 0x3200 //RX_BWE_MAXTH_TONE +304 0x2000 //RX_BWE_EQ_0 +305 0x2000 //RX_BWE_EQ_1 +306 0x2000 //RX_BWE_EQ_2 +307 0x2000 //RX_BWE_EQ_3 +308 0x2000 //RX_BWE_EQ_4 +309 0x2000 //RX_BWE_EQ_5 +310 0x2000 //RX_BWE_EQ_6 +311 0x0000 //RX_BWE_RESRV_0 +312 0x0000 //RX_BWE_RESRV_1 +313 0x0000 //RX_BWE_RESRV_2 +#VOL 0 +163 0x4000 //RX_TDDRC_ALPHA_UP_1 +164 0x4000 //RX_TDDRC_ALPHA_UP_2 +165 0x4000 //RX_TDDRC_ALPHA_UP_3 +166 0x4000 //RX_TDDRC_ALPHA_UP_4 +184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +190 0x7FFF //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +269 0x0001 //RX_TDDRC_THRD_0 +270 0x0002 //RX_TDDRC_THRD_1 +271 0x1800 //RX_TDDRC_THRD_2 +272 0x1800 //RX_TDDRC_THRD_3 +273 0x6000 //RX_TDDRC_SLANT_0 +274 0x6E00 //RX_TDDRC_SLANT_1 +275 0x4000 //RX_TDDRC_ALPHA_UP_0 +276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x199A //RX_TDDRC_HMNC_GAIN +279 0x0001 //RX_TDDRC_SMT_FLAG +280 0x0CCD //RX_TDDRC_SMT_W +281 0x03C3 //RX_TDDRC_DRC_GAIN +195 0x0020 //RX_FDEQ_SUBNUM +196 0x4848 //RX_FDEQ_GAIN_0 +197 0x4848 //RX_FDEQ_GAIN_1 +198 0x4848 //RX_FDEQ_GAIN_2 +199 0x4870 //RX_FDEQ_GAIN_3 +200 0x4848 //RX_FDEQ_GAIN_4 +201 0x4848 //RX_FDEQ_GAIN_5 +202 0x4850 //RX_FDEQ_GAIN_6 +203 0x485C //RX_FDEQ_GAIN_7 +204 0x5C60 //RX_FDEQ_GAIN_8 +205 0x685C //RX_FDEQ_GAIN_9 +206 0x5640 //RX_FDEQ_GAIN_10 +207 0x4040 //RX_FDEQ_GAIN_11 +208 0x5C58 //RX_FDEQ_GAIN_12 +209 0x5C60 //RX_FDEQ_GAIN_13 +210 0x6060 //RX_FDEQ_GAIN_14 +211 0x6060 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0202 //RX_FDEQ_BIN_0 +221 0x0203 //RX_FDEQ_BIN_1 +222 0x0303 //RX_FDEQ_BIN_2 +223 0x0402 //RX_FDEQ_BIN_3 +224 0x0504 //RX_FDEQ_BIN_4 +225 0x0209 //RX_FDEQ_BIN_5 +226 0x0808 //RX_FDEQ_BIN_6 +227 0x090A //RX_FDEQ_BIN_7 +228 0x0B0C //RX_FDEQ_BIN_8 +229 0x0D0E //RX_FDEQ_BIN_9 +230 0x1013 //RX_FDEQ_BIN_10 +231 0x1719 //RX_FDEQ_BIN_11 +232 0x1B1E //RX_FDEQ_BIN_12 +233 0x1E1E //RX_FDEQ_BIN_13 +234 0x1E28 //RX_FDEQ_BIN_14 +235 0x282C //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x4000 //RX_FDEQ_RESRV_0 +245 0x0320 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0030 //RX_FDDRC_BAND_MARGIN_1 +248 0x0050 //RX_FDDRC_BAND_MARGIN_2 +249 0x0080 //RX_FDDRC_BAND_MARGIN_3 +250 0x0004 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x2000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x2000 //RX_FDDRC_THRD_3_2 +258 0x5000 //RX_FDDRC_THRD_3_3 +259 0x4000 //RX_FDDRC_SLANT_0_0 +260 0x4000 //RX_FDDRC_SLANT_0_1 +261 0x4000 //RX_FDDRC_SLANT_0_2 +262 0x4000 //RX_FDDRC_SLANT_0_3 +263 0x7FFF //RX_FDDRC_SLANT_1_0 +264 0x7FFF //RX_FDDRC_SLANT_1_1 +265 0x7FFF //RX_FDDRC_SLANT_1_2 +266 0x7FFF //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +286 0x0012 //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 +#VOL 1 +163 0x4000 //RX_TDDRC_ALPHA_UP_1 +164 0x4000 //RX_TDDRC_ALPHA_UP_2 +165 0x4000 //RX_TDDRC_ALPHA_UP_3 +166 0x4000 //RX_TDDRC_ALPHA_UP_4 +184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +190 0x7FFF //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +269 0x0001 //RX_TDDRC_THRD_0 +270 0x0002 //RX_TDDRC_THRD_1 +271 0x1800 //RX_TDDRC_THRD_2 +272 0x1800 //RX_TDDRC_THRD_3 +273 0x6000 //RX_TDDRC_SLANT_0 +274 0x6E00 //RX_TDDRC_SLANT_1 +275 0x4000 //RX_TDDRC_ALPHA_UP_0 +276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x199A //RX_TDDRC_HMNC_GAIN +279 0x0001 //RX_TDDRC_SMT_FLAG +280 0x0CCD //RX_TDDRC_SMT_W +281 0x03C3 //RX_TDDRC_DRC_GAIN +195 0x0020 //RX_FDEQ_SUBNUM +196 0x4848 //RX_FDEQ_GAIN_0 +197 0x4848 //RX_FDEQ_GAIN_1 +198 0x4848 //RX_FDEQ_GAIN_2 +199 0x4870 //RX_FDEQ_GAIN_3 +200 0x4848 //RX_FDEQ_GAIN_4 +201 0x4848 //RX_FDEQ_GAIN_5 +202 0x4850 //RX_FDEQ_GAIN_6 +203 0x485C //RX_FDEQ_GAIN_7 +204 0x5C60 //RX_FDEQ_GAIN_8 +205 0x685C //RX_FDEQ_GAIN_9 +206 0x5640 //RX_FDEQ_GAIN_10 +207 0x4040 //RX_FDEQ_GAIN_11 +208 0x5C58 //RX_FDEQ_GAIN_12 +209 0x5C60 //RX_FDEQ_GAIN_13 +210 0x6060 //RX_FDEQ_GAIN_14 +211 0x6060 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0202 //RX_FDEQ_BIN_0 +221 0x0203 //RX_FDEQ_BIN_1 +222 0x0303 //RX_FDEQ_BIN_2 +223 0x0402 //RX_FDEQ_BIN_3 +224 0x0504 //RX_FDEQ_BIN_4 +225 0x0209 //RX_FDEQ_BIN_5 +226 0x0808 //RX_FDEQ_BIN_6 +227 0x090A //RX_FDEQ_BIN_7 +228 0x0B0C //RX_FDEQ_BIN_8 +229 0x0D0E //RX_FDEQ_BIN_9 +230 0x1013 //RX_FDEQ_BIN_10 +231 0x1719 //RX_FDEQ_BIN_11 +232 0x1B1E //RX_FDEQ_BIN_12 +233 0x1E1E //RX_FDEQ_BIN_13 +234 0x1E28 //RX_FDEQ_BIN_14 +235 0x282C //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x4000 //RX_FDEQ_RESRV_0 +245 0x0320 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0030 //RX_FDDRC_BAND_MARGIN_1 +248 0x0050 //RX_FDDRC_BAND_MARGIN_2 +249 0x0080 //RX_FDDRC_BAND_MARGIN_3 +250 0x0004 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x2000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x2000 //RX_FDDRC_THRD_3_2 +258 0x5000 //RX_FDDRC_THRD_3_3 +259 0x4000 //RX_FDDRC_SLANT_0_0 +260 0x4000 //RX_FDDRC_SLANT_0_1 +261 0x4000 //RX_FDDRC_SLANT_0_2 +262 0x4000 //RX_FDDRC_SLANT_0_3 +263 0x7FFF //RX_FDDRC_SLANT_1_0 +264 0x7FFF //RX_FDDRC_SLANT_1_1 +265 0x7FFF //RX_FDDRC_SLANT_1_2 +266 0x7FFF //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +286 0x001A //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 +#VOL 2 +163 0x4000 //RX_TDDRC_ALPHA_UP_1 +164 0x4000 //RX_TDDRC_ALPHA_UP_2 +165 0x4000 //RX_TDDRC_ALPHA_UP_3 +166 0x4000 //RX_TDDRC_ALPHA_UP_4 +184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +190 0x7FFF //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +269 0x0001 //RX_TDDRC_THRD_0 +270 0x0002 //RX_TDDRC_THRD_1 +271 0x1800 //RX_TDDRC_THRD_2 +272 0x1800 //RX_TDDRC_THRD_3 +273 0x6000 //RX_TDDRC_SLANT_0 +274 0x6E00 //RX_TDDRC_SLANT_1 +275 0x4000 //RX_TDDRC_ALPHA_UP_0 +276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x199A //RX_TDDRC_HMNC_GAIN +279 0x0001 //RX_TDDRC_SMT_FLAG +280 0x0CCD //RX_TDDRC_SMT_W +281 0x03C3 //RX_TDDRC_DRC_GAIN +195 0x0020 //RX_FDEQ_SUBNUM +196 0x4848 //RX_FDEQ_GAIN_0 +197 0x4848 //RX_FDEQ_GAIN_1 +198 0x4848 //RX_FDEQ_GAIN_2 +199 0x4870 //RX_FDEQ_GAIN_3 +200 0x4848 //RX_FDEQ_GAIN_4 +201 0x4848 //RX_FDEQ_GAIN_5 +202 0x4850 //RX_FDEQ_GAIN_6 +203 0x485C //RX_FDEQ_GAIN_7 +204 0x5C60 //RX_FDEQ_GAIN_8 +205 0x685C //RX_FDEQ_GAIN_9 +206 0x5640 //RX_FDEQ_GAIN_10 +207 0x4040 //RX_FDEQ_GAIN_11 +208 0x5C58 //RX_FDEQ_GAIN_12 +209 0x5C60 //RX_FDEQ_GAIN_13 +210 0x6060 //RX_FDEQ_GAIN_14 +211 0x6060 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0202 //RX_FDEQ_BIN_0 +221 0x0203 //RX_FDEQ_BIN_1 +222 0x0303 //RX_FDEQ_BIN_2 +223 0x0402 //RX_FDEQ_BIN_3 +224 0x0504 //RX_FDEQ_BIN_4 +225 0x0209 //RX_FDEQ_BIN_5 +226 0x0808 //RX_FDEQ_BIN_6 +227 0x090A //RX_FDEQ_BIN_7 +228 0x0B0C //RX_FDEQ_BIN_8 +229 0x0D0E //RX_FDEQ_BIN_9 +230 0x1013 //RX_FDEQ_BIN_10 +231 0x1719 //RX_FDEQ_BIN_11 +232 0x1B1E //RX_FDEQ_BIN_12 +233 0x1E1E //RX_FDEQ_BIN_13 +234 0x1E28 //RX_FDEQ_BIN_14 +235 0x282C //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x4000 //RX_FDEQ_RESRV_0 +245 0x0320 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0030 //RX_FDDRC_BAND_MARGIN_1 +248 0x0050 //RX_FDDRC_BAND_MARGIN_2 +249 0x0080 //RX_FDDRC_BAND_MARGIN_3 +250 0x0004 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x2000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x2000 //RX_FDDRC_THRD_3_2 +258 0x5000 //RX_FDDRC_THRD_3_3 +259 0x4000 //RX_FDDRC_SLANT_0_0 +260 0x4000 //RX_FDDRC_SLANT_0_1 +261 0x4000 //RX_FDDRC_SLANT_0_2 +262 0x4000 //RX_FDDRC_SLANT_0_3 +263 0x7FFF //RX_FDDRC_SLANT_1_0 +264 0x7FFF //RX_FDDRC_SLANT_1_1 +265 0x7FFF //RX_FDDRC_SLANT_1_2 +266 0x7FFF //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +286 0x0025 //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 +#VOL 3 +163 0x4000 //RX_TDDRC_ALPHA_UP_1 +164 0x4000 //RX_TDDRC_ALPHA_UP_2 +165 0x4000 //RX_TDDRC_ALPHA_UP_3 +166 0x4000 //RX_TDDRC_ALPHA_UP_4 +184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +190 0x7FFF //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +269 0x0001 //RX_TDDRC_THRD_0 +270 0x0002 //RX_TDDRC_THRD_1 +271 0x1800 //RX_TDDRC_THRD_2 +272 0x1800 //RX_TDDRC_THRD_3 +273 0x6000 //RX_TDDRC_SLANT_0 +274 0x6E00 //RX_TDDRC_SLANT_1 +275 0x4000 //RX_TDDRC_ALPHA_UP_0 +276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x199A //RX_TDDRC_HMNC_GAIN +279 0x0001 //RX_TDDRC_SMT_FLAG +280 0x0CCD //RX_TDDRC_SMT_W +281 0x03C3 //RX_TDDRC_DRC_GAIN +195 0x0020 //RX_FDEQ_SUBNUM +196 0x4848 //RX_FDEQ_GAIN_0 +197 0x4848 //RX_FDEQ_GAIN_1 +198 0x4848 //RX_FDEQ_GAIN_2 +199 0x4870 //RX_FDEQ_GAIN_3 +200 0x4848 //RX_FDEQ_GAIN_4 +201 0x4848 //RX_FDEQ_GAIN_5 +202 0x4850 //RX_FDEQ_GAIN_6 +203 0x485C //RX_FDEQ_GAIN_7 +204 0x5C60 //RX_FDEQ_GAIN_8 +205 0x685C //RX_FDEQ_GAIN_9 +206 0x5640 //RX_FDEQ_GAIN_10 +207 0x4040 //RX_FDEQ_GAIN_11 +208 0x5C58 //RX_FDEQ_GAIN_12 +209 0x5C60 //RX_FDEQ_GAIN_13 +210 0x6060 //RX_FDEQ_GAIN_14 +211 0x6060 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0202 //RX_FDEQ_BIN_0 +221 0x0203 //RX_FDEQ_BIN_1 +222 0x0303 //RX_FDEQ_BIN_2 +223 0x0402 //RX_FDEQ_BIN_3 +224 0x0504 //RX_FDEQ_BIN_4 +225 0x0209 //RX_FDEQ_BIN_5 +226 0x0808 //RX_FDEQ_BIN_6 +227 0x090A //RX_FDEQ_BIN_7 +228 0x0B0C //RX_FDEQ_BIN_8 +229 0x0D0E //RX_FDEQ_BIN_9 +230 0x1013 //RX_FDEQ_BIN_10 +231 0x1719 //RX_FDEQ_BIN_11 +232 0x1B1E //RX_FDEQ_BIN_12 +233 0x1E1E //RX_FDEQ_BIN_13 +234 0x1E28 //RX_FDEQ_BIN_14 +235 0x282C //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x4000 //RX_FDEQ_RESRV_0 +245 0x0320 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0030 //RX_FDDRC_BAND_MARGIN_1 +248 0x0050 //RX_FDDRC_BAND_MARGIN_2 +249 0x0080 //RX_FDDRC_BAND_MARGIN_3 +250 0x0004 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x2000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x2000 //RX_FDDRC_THRD_3_2 +258 0x5000 //RX_FDDRC_THRD_3_3 +259 0x4000 //RX_FDDRC_SLANT_0_0 +260 0x4000 //RX_FDDRC_SLANT_0_1 +261 0x4000 //RX_FDDRC_SLANT_0_2 +262 0x4000 //RX_FDDRC_SLANT_0_3 +263 0x7FFF //RX_FDDRC_SLANT_1_0 +264 0x7FFF //RX_FDDRC_SLANT_1_1 +265 0x7FFF //RX_FDDRC_SLANT_1_2 +266 0x7FFF //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +286 0x0034 //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 +#VOL 4 +163 0x4000 //RX_TDDRC_ALPHA_UP_1 +164 0x4000 //RX_TDDRC_ALPHA_UP_2 +165 0x4000 //RX_TDDRC_ALPHA_UP_3 +166 0x4000 //RX_TDDRC_ALPHA_UP_4 +184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +190 0x7FFF //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +269 0x0001 //RX_TDDRC_THRD_0 +270 0x0002 //RX_TDDRC_THRD_1 +271 0x1800 //RX_TDDRC_THRD_2 +272 0x1800 //RX_TDDRC_THRD_3 +273 0x6000 //RX_TDDRC_SLANT_0 +274 0x6E00 //RX_TDDRC_SLANT_1 +275 0x4000 //RX_TDDRC_ALPHA_UP_0 +276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x199A //RX_TDDRC_HMNC_GAIN +279 0x0001 //RX_TDDRC_SMT_FLAG +280 0x0CCD //RX_TDDRC_SMT_W +281 0x03C3 //RX_TDDRC_DRC_GAIN +195 0x0020 //RX_FDEQ_SUBNUM +196 0x4848 //RX_FDEQ_GAIN_0 +197 0x4848 //RX_FDEQ_GAIN_1 +198 0x4848 //RX_FDEQ_GAIN_2 +199 0x4870 //RX_FDEQ_GAIN_3 +200 0x4848 //RX_FDEQ_GAIN_4 +201 0x4848 //RX_FDEQ_GAIN_5 +202 0x4850 //RX_FDEQ_GAIN_6 +203 0x485C //RX_FDEQ_GAIN_7 +204 0x5C60 //RX_FDEQ_GAIN_8 +205 0x685C //RX_FDEQ_GAIN_9 +206 0x5640 //RX_FDEQ_GAIN_10 +207 0x4040 //RX_FDEQ_GAIN_11 +208 0x5C58 //RX_FDEQ_GAIN_12 +209 0x5C60 //RX_FDEQ_GAIN_13 +210 0x6060 //RX_FDEQ_GAIN_14 +211 0x6060 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0202 //RX_FDEQ_BIN_0 +221 0x0203 //RX_FDEQ_BIN_1 +222 0x0303 //RX_FDEQ_BIN_2 +223 0x0402 //RX_FDEQ_BIN_3 +224 0x0504 //RX_FDEQ_BIN_4 +225 0x0209 //RX_FDEQ_BIN_5 +226 0x0808 //RX_FDEQ_BIN_6 +227 0x090A //RX_FDEQ_BIN_7 +228 0x0B0C //RX_FDEQ_BIN_8 +229 0x0D0E //RX_FDEQ_BIN_9 +230 0x1013 //RX_FDEQ_BIN_10 +231 0x1719 //RX_FDEQ_BIN_11 +232 0x1B1E //RX_FDEQ_BIN_12 +233 0x1E1E //RX_FDEQ_BIN_13 +234 0x1E28 //RX_FDEQ_BIN_14 +235 0x282C //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x4000 //RX_FDEQ_RESRV_0 +245 0x0320 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0030 //RX_FDDRC_BAND_MARGIN_1 +248 0x0050 //RX_FDDRC_BAND_MARGIN_2 +249 0x0080 //RX_FDDRC_BAND_MARGIN_3 +250 0x0004 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x2000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x2000 //RX_FDDRC_THRD_3_2 +258 0x5000 //RX_FDDRC_THRD_3_3 +259 0x4000 //RX_FDDRC_SLANT_0_0 +260 0x4000 //RX_FDDRC_SLANT_0_1 +261 0x4000 //RX_FDDRC_SLANT_0_2 +262 0x4000 //RX_FDDRC_SLANT_0_3 +263 0x7FFF //RX_FDDRC_SLANT_1_0 +264 0x7FFF //RX_FDDRC_SLANT_1_1 +265 0x7FFF //RX_FDDRC_SLANT_1_2 +266 0x7FFF //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +286 0x004D //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 +#VOL 5 +163 0x4000 //RX_TDDRC_ALPHA_UP_1 +164 0x4000 //RX_TDDRC_ALPHA_UP_2 +165 0x4000 //RX_TDDRC_ALPHA_UP_3 +166 0x4000 //RX_TDDRC_ALPHA_UP_4 +184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +190 0x7FFF //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +269 0x0001 //RX_TDDRC_THRD_0 +270 0x0002 //RX_TDDRC_THRD_1 +271 0x1800 //RX_TDDRC_THRD_2 +272 0x1800 //RX_TDDRC_THRD_3 +273 0x6000 //RX_TDDRC_SLANT_0 +274 0x6E00 //RX_TDDRC_SLANT_1 +275 0x4000 //RX_TDDRC_ALPHA_UP_0 +276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x199A //RX_TDDRC_HMNC_GAIN +279 0x0001 //RX_TDDRC_SMT_FLAG +280 0x0CCD //RX_TDDRC_SMT_W +281 0x03C3 //RX_TDDRC_DRC_GAIN +195 0x0020 //RX_FDEQ_SUBNUM +196 0x4848 //RX_FDEQ_GAIN_0 +197 0x4848 //RX_FDEQ_GAIN_1 +198 0x4848 //RX_FDEQ_GAIN_2 +199 0x4870 //RX_FDEQ_GAIN_3 +200 0x4848 //RX_FDEQ_GAIN_4 +201 0x4848 //RX_FDEQ_GAIN_5 +202 0x4850 //RX_FDEQ_GAIN_6 +203 0x485C //RX_FDEQ_GAIN_7 +204 0x5C60 //RX_FDEQ_GAIN_8 +205 0x685C //RX_FDEQ_GAIN_9 +206 0x5640 //RX_FDEQ_GAIN_10 +207 0x4040 //RX_FDEQ_GAIN_11 +208 0x5C58 //RX_FDEQ_GAIN_12 +209 0x5C60 //RX_FDEQ_GAIN_13 +210 0x6060 //RX_FDEQ_GAIN_14 +211 0x6060 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0202 //RX_FDEQ_BIN_0 +221 0x0203 //RX_FDEQ_BIN_1 +222 0x0303 //RX_FDEQ_BIN_2 +223 0x0402 //RX_FDEQ_BIN_3 +224 0x0504 //RX_FDEQ_BIN_4 +225 0x0209 //RX_FDEQ_BIN_5 +226 0x0808 //RX_FDEQ_BIN_6 +227 0x090A //RX_FDEQ_BIN_7 +228 0x0B0C //RX_FDEQ_BIN_8 +229 0x0D0E //RX_FDEQ_BIN_9 +230 0x1013 //RX_FDEQ_BIN_10 +231 0x1719 //RX_FDEQ_BIN_11 +232 0x1B1E //RX_FDEQ_BIN_12 +233 0x1E1E //RX_FDEQ_BIN_13 +234 0x1E28 //RX_FDEQ_BIN_14 +235 0x282C //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x4000 //RX_FDEQ_RESRV_0 +245 0x0320 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0030 //RX_FDDRC_BAND_MARGIN_1 +248 0x0050 //RX_FDDRC_BAND_MARGIN_2 +249 0x0080 //RX_FDDRC_BAND_MARGIN_3 +250 0x0004 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x2000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x2000 //RX_FDDRC_THRD_3_2 +258 0x5000 //RX_FDDRC_THRD_3_3 +259 0x4000 //RX_FDDRC_SLANT_0_0 +260 0x4000 //RX_FDDRC_SLANT_0_1 +261 0x4000 //RX_FDDRC_SLANT_0_2 +262 0x4000 //RX_FDDRC_SLANT_0_3 +263 0x7FFF //RX_FDDRC_SLANT_1_0 +264 0x7FFF //RX_FDDRC_SLANT_1_1 +265 0x7FFF //RX_FDDRC_SLANT_1_2 +266 0x7FFF //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +286 0x0074 //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 +#VOL 6 +163 0x4000 //RX_TDDRC_ALPHA_UP_1 +164 0x4000 //RX_TDDRC_ALPHA_UP_2 +165 0x4000 //RX_TDDRC_ALPHA_UP_3 +166 0x4000 //RX_TDDRC_ALPHA_UP_4 +184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +190 0x7FFF //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +269 0x0001 //RX_TDDRC_THRD_0 +270 0x0002 //RX_TDDRC_THRD_1 +271 0x1800 //RX_TDDRC_THRD_2 +272 0x1800 //RX_TDDRC_THRD_3 +273 0x6000 //RX_TDDRC_SLANT_0 +274 0x6E00 //RX_TDDRC_SLANT_1 +275 0x4000 //RX_TDDRC_ALPHA_UP_0 +276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x199A //RX_TDDRC_HMNC_GAIN +279 0x0001 //RX_TDDRC_SMT_FLAG +280 0x0CCD //RX_TDDRC_SMT_W +281 0x03C3 //RX_TDDRC_DRC_GAIN +195 0x0020 //RX_FDEQ_SUBNUM +196 0x4848 //RX_FDEQ_GAIN_0 +197 0x4848 //RX_FDEQ_GAIN_1 +198 0x4848 //RX_FDEQ_GAIN_2 +199 0x4870 //RX_FDEQ_GAIN_3 +200 0x4848 //RX_FDEQ_GAIN_4 +201 0x4848 //RX_FDEQ_GAIN_5 +202 0x4850 //RX_FDEQ_GAIN_6 +203 0x485C //RX_FDEQ_GAIN_7 +204 0x5C60 //RX_FDEQ_GAIN_8 +205 0x685C //RX_FDEQ_GAIN_9 +206 0x5640 //RX_FDEQ_GAIN_10 +207 0x4040 //RX_FDEQ_GAIN_11 +208 0x5C58 //RX_FDEQ_GAIN_12 +209 0x5C60 //RX_FDEQ_GAIN_13 +210 0x6060 //RX_FDEQ_GAIN_14 +211 0x6060 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0202 //RX_FDEQ_BIN_0 +221 0x0203 //RX_FDEQ_BIN_1 +222 0x0303 //RX_FDEQ_BIN_2 +223 0x0402 //RX_FDEQ_BIN_3 +224 0x0504 //RX_FDEQ_BIN_4 +225 0x0209 //RX_FDEQ_BIN_5 +226 0x0808 //RX_FDEQ_BIN_6 +227 0x090A //RX_FDEQ_BIN_7 +228 0x0B0C //RX_FDEQ_BIN_8 +229 0x0D0E //RX_FDEQ_BIN_9 +230 0x1013 //RX_FDEQ_BIN_10 +231 0x1719 //RX_FDEQ_BIN_11 +232 0x1B1E //RX_FDEQ_BIN_12 +233 0x1E1E //RX_FDEQ_BIN_13 +234 0x1E28 //RX_FDEQ_BIN_14 +235 0x282C //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x4000 //RX_FDEQ_RESRV_0 +245 0x0320 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0030 //RX_FDDRC_BAND_MARGIN_1 +248 0x0050 //RX_FDDRC_BAND_MARGIN_2 +249 0x0080 //RX_FDDRC_BAND_MARGIN_3 +250 0x0004 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x2000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x2000 //RX_FDDRC_THRD_3_2 +258 0x5000 //RX_FDDRC_THRD_3_3 +259 0x4000 //RX_FDDRC_SLANT_0_0 +260 0x4000 //RX_FDDRC_SLANT_0_1 +261 0x4000 //RX_FDDRC_SLANT_0_2 +262 0x4000 //RX_FDDRC_SLANT_0_3 +263 0x7FFF //RX_FDDRC_SLANT_1_0 +264 0x7FFF //RX_FDDRC_SLANT_1_1 +265 0x7FFF //RX_FDDRC_SLANT_1_2 +266 0x7FFF //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +286 0x0100 //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 -#CASE_NAME HANDSFREE-HANDSFREE-CUSTOM2-FB -#PARAM_TYPE TX+RX -#TOTAL_CUSTOM_STEP 7 +#CASE_NAME HANDSFREE-HANDFREE-CUSTOM2-FB +#PARAM_MODE FULL +#PARAM_TYPE TX+2RX +#TOTAL_CUSTOM_STEP 7+7 #TX 0 0x0001 //TX_OPERATION_MODE_0 1 0x0001 //TX_OPERATION_MODE_1 @@ -2011,11 +2929,11 @@ 248 0xF800 //TX_THR_SN_EST_6 249 0xF800 //TX_THR_SN_EST_7 250 0x0100 //TX_DELTA_THR_SN_EST_0 -251 0x0200 //TX_DELTA_THR_SN_EST_1 -252 0x0100 //TX_DELTA_THR_SN_EST_2 -253 0x0200 //TX_DELTA_THR_SN_EST_3 +251 0x0100 //TX_DELTA_THR_SN_EST_1 +252 0x0200 //TX_DELTA_THR_SN_EST_2 +253 0x0100 //TX_DELTA_THR_SN_EST_3 254 0x0100 //TX_DELTA_THR_SN_EST_4 -255 0x0100 //TX_DELTA_THR_SN_EST_5 +255 0x0200 //TX_DELTA_THR_SN_EST_5 256 0x0200 //TX_DELTA_THR_SN_EST_6 257 0x0200 //TX_DELTA_THR_SN_EST_7 258 0x4000 //TX_LAMBDA_NN_EST_0 @@ -2043,11 +2961,11 @@ 280 0x1000 //TX_B_POST_FLT_1 281 0x0010 //TX_NS_LVL_CTRL_0 282 0x0014 //TX_NS_LVL_CTRL_1 -283 0x0014 //TX_NS_LVL_CTRL_2 -284 0x0018 //TX_NS_LVL_CTRL_3 -285 0x0016 //TX_NS_LVL_CTRL_4 -286 0x0014 //TX_NS_LVL_CTRL_5 -287 0x0011 //TX_NS_LVL_CTRL_6 +283 0x0018 //TX_NS_LVL_CTRL_2 +284 0x0016 //TX_NS_LVL_CTRL_3 +285 0x0014 //TX_NS_LVL_CTRL_4 +286 0x0011 //TX_NS_LVL_CTRL_5 +287 0x0014 //TX_NS_LVL_CTRL_6 288 0x0011 //TX_NS_LVL_CTRL_7 289 0x000F //TX_MIN_GAIN_S_0 290 0x0010 //TX_MIN_GAIN_S_1 @@ -2065,8 +2983,8 @@ 302 0x4000 //TX_SNRI_SUP_2 303 0x4000 //TX_SNRI_SUP_3 304 0x4000 //TX_SNRI_SUP_4 -305 0x4000 //TX_SNRI_SUP_5 -306 0x50C0 //TX_SNRI_SUP_6 +305 0x50C0 //TX_SNRI_SUP_5 +306 0x4000 //TX_SNRI_SUP_6 307 0x7FFF //TX_SNRI_SUP_7 308 0x7FFF //TX_THR_LFNS 309 0x0018 //TX_G_LFNS @@ -2075,19 +2993,19 @@ 312 0x7FFF //TX_A_POST_FILT_0 313 0x2000 //TX_A_POST_FILT_1 314 0x5000 //TX_A_POST_FILT_S_0 -315 0x6000 //TX_A_POST_FILT_S_1 -316 0x4C00 //TX_A_POST_FILT_S_2 -317 0x4000 //TX_A_POST_FILT_S_3 -318 0x6000 //TX_A_POST_FILT_S_4 -319 0x4000 //TX_A_POST_FILT_S_5 -320 0x5000 //TX_A_POST_FILT_S_6 +315 0x4C00 //TX_A_POST_FILT_S_1 +316 0x4000 //TX_A_POST_FILT_S_2 +317 0x6000 //TX_A_POST_FILT_S_3 +318 0x4000 //TX_A_POST_FILT_S_4 +319 0x5000 //TX_A_POST_FILT_S_5 +320 0x6000 //TX_A_POST_FILT_S_6 321 0x7000 //TX_A_POST_FILT_S_7 322 0x2000 //TX_B_POST_FILT_0 -323 0x1000 //TX_B_POST_FILT_1 +323 0x2000 //TX_B_POST_FILT_1 324 0x2000 //TX_B_POST_FILT_2 -325 0x2000 //TX_B_POST_FILT_3 +325 0x4000 //TX_B_POST_FILT_3 326 0x4000 //TX_B_POST_FILT_4 -327 0x4000 //TX_B_POST_FILT_5 +327 0x1000 //TX_B_POST_FILT_5 328 0x1000 //TX_B_POST_FILT_6 329 0x2000 //TX_B_POST_FILT_7 330 0x4000 //TX_B_LESSCUT_RTO_S_0 @@ -2095,14 +3013,14 @@ 332 0x7FFF //TX_B_LESSCUT_RTO_S_2 333 0x7FFF //TX_B_LESSCUT_RTO_S_3 334 0x7FFF //TX_B_LESSCUT_RTO_S_4 -335 0x7FFF //TX_B_LESSCUT_RTO_S_5 -336 0x6000 //TX_B_LESSCUT_RTO_S_6 +335 0x6000 //TX_B_LESSCUT_RTO_S_5 +336 0x7FFF //TX_B_LESSCUT_RTO_S_6 337 0x7FFF //TX_B_LESSCUT_RTO_S_7 338 0x7C00 //TX_LAMBDA_PFILT 339 0x7C00 //TX_LAMBDA_PFILT_S_0 340 0x7C00 //TX_LAMBDA_PFILT_S_1 -341 0x7C00 //TX_LAMBDA_PFILT_S_2 -342 0x7A00 //TX_LAMBDA_PFILT_S_3 +341 0x7A00 //TX_LAMBDA_PFILT_S_2 +342 0x7C00 //TX_LAMBDA_PFILT_S_3 343 0x7C00 //TX_LAMBDA_PFILT_S_4 344 0x7C00 //TX_LAMBDA_PFILT_S_5 345 0x7C00 //TX_LAMBDA_PFILT_S_6 @@ -2140,10 +3058,10 @@ 377 0x7FFF //TX_NOISE_TH_5_4 378 0x2710 //TX_NOISE_TH_6 379 0x0033 //TX_MINENOISE_TH -380 0x4000 //TX_MINENOISE_MIC0_TH_MTS -381 0xFFEE //TX_MINENOISE_MIC0_TH_EXP -382 0x6000 //TX_MINENOISE_MIC0_S_TH_MTS -383 0xFFF3 //TX_MINENOISE_MIC0_S_TH_EXP +380 0xD508 //TX_MORENS_TFMASK_TH +381 0x0001 //TX_DRC_QUIET_FLOOR +382 0x7999 //TX_RATIODTL_CUT_TH +383 0x0119 //TX_DT_CUT_K1 384 0x0666 //TX_OUT_ENER_S_TH_CLEAN 385 0x0666 //TX_OUT_ENER_S_TH_LESSCLEAN 386 0x0333 //TX_OUT_ENER_S_TH_NOISY @@ -2151,15 +3069,15 @@ 388 0x0333 //TX_OUT_ENER_TH_SPEECH 389 0x2000 //TX_SN_NPB_GAIN 390 0x0000 //TX_NN_NPB_GAIN -391 0x0000 //TX_CSX_ALPHA_0 -392 0x0000 //TX_CSX_ALPHA_1 -393 0x0000 //TX_CSX_ALPHA_2 -394 0x0000 //TX_CSX_ALPHA_3 -395 0x0800 //TX_MU_ARSP_EST -396 0x00C8 //TX_P_OUTBEAM_MIN_TH +391 0x7FFF //TX_POST_MASK_SUP_HSNE +392 0x1388 //TX_TAIL_DET_TH +393 0x4000 //TX_B_LESSCUT_RTO_WTA +394 0x0000 //TX_MEL_G_R +395 0x0080 //TX_SUPHIGH_TH +396 0x0000 //TX_MASK_G_R 397 0x0002 //TX_EXTRA_NS_L -398 0x0800 //TX_EXTRA_NS_A -399 0x0005 //TX_VR_NOISE_FLOOR_TH +398 0x1800 //TX_C_POST_FLT_MASK +399 0x4000 //TX_A_POST_FLT_WNS 400 0x0148 //TX_MIN_G_LOW300HZ 401 0x0002 //TX_MAXLEVEL_CNG 402 0x00B4 //TX_STN_NOISE_TH @@ -2274,16 +3192,16 @@ 511 0x6666 //TX_MIC_TO_BFGAIN 512 0x0000 //TX_MICTOBFGAIN0 513 0x0000 //TX_FASTMUE_TH -514 0x0000 //TX_DERVB_LEN_0 -515 0x0000 //TX_DERVB_LEN_1 -516 0x0000 //TX_RHO_DERVB -517 0x0000 //TX_MIC_INDX_DERVB -518 0x0000 //TX_MU_DERVB -519 0x0000 //TX_DR_RESRV_0 -520 0x0000 //TX_DR_RESRV_1 -521 0x0000 //TX_DR_RESRV_2 -522 0x0000 //TX_DR_RESRV_3 -523 0x0000 //TX_DR_RESRV_4 +514 0x3000 //TX_DEREVERB_LF_MU +515 0x34CD //TX_DEREVERB_HF_MU +516 0x0007 //TX_DEREVERB_DELAY +517 0x0004 //TX_DEREVERB_COEF_LEN +518 0x0003 //TX_DEREVERB_DNR +519 0x0000 //TX_DEREVERB_ALPHA +520 0x0000 //TX_DEREVERB_BETA +521 0x3A98 //TX_GSC_RTOL_TH +522 0x3A98 //TX_GSC_RTOH_TH +523 0x7E2C //TX_WIDE2_MEANHTH 524 0x0000 //TX_DR_RESRV_5 525 0x0000 //TX_DR_RESRV_6 526 0x0000 //TX_DR_RESRV_7 @@ -2657,6 +3575,71 @@ 894 0xC000 //TX_FASTNS_SSA_THHFL 895 0xCCCC //TX_FASTNS_SSA_THLFH 896 0xD999 //TX_FASTNS_SSA_THHFH +897 0x2339 //TX_SENDFUNC_REG_MICMUTE +898 0x0021 //TX_SENDFUNC_REG_MICMUTE1 +899 0x02BC //TX_MICMUTE_RATIO_THR +900 0x0140 //TX_MICMUTE_AMP_THR +901 0x0004 //TX_MICMUTE_HPF_IND +902 0x00C0 //TX_MICMUTE_LOG_EYR_TH +903 0x0008 //TX_MICMUTE_CVG_TIME +904 0x0008 //TX_MICMUTE_RELEASE_TIME +905 0x01FE //TX_MIC_VOLUME_MIC0MUTE +906 0x0020 //TX_MICMUTE_EPD_OFFSET_0 +907 0x001E //TX_MICMUTE_FRQ_AEC_L +908 0x7999 //TX_MICMUTE_EAD_THR +909 0x7FFF //TX_MICMUTE_LAMBDA_CB_NLE +910 0x7FFF //TX_MICMUTE_LAMBDA_RE_EST +911 0x4000 //TX_DTD_THR1_MICMUTE_0 +912 0x7000 //TX_DTD_THR1_MICMUTE_1 +913 0x7FFF //TX_DTD_THR1_MICMUTE_2 +914 0x7FFF //TX_DTD_THR1_MICMUTE_3 +915 0x6CCC //TX_DTD_THR2_MICMUTE_0 +916 0x0400 //TX_MICMUTE_MIN_EQ_RE_EST_0 +917 0x0400 //TX_MICMUTE_MIN_EQ_RE_EST_1 +918 0x1000 //TX_MICMUTE_MIN_EQ_RE_EST_2 +919 0x7FFF //TX_MICMUTE_MIN_EQ_RE_EST_3 +920 0x7FFF //TX_MICMUTE_MIN_EQ_RE_EST_4 +921 0x4000 //TX_MICMUTE_C_POST_FLT +922 0x03E8 //TX_MICMUTE_DT_CUT_K +923 0x0001 //TX_MICMUTE_DT_CUT_THR +924 0x03E8 //TX_MICMUTE_DT_CUT_K2 +925 0x0001 //TX_MICMUTE_DT_CUT_THR2 +926 0x0064 //TX_MICMUTE_DT2_HOLD_N +927 0x1000 //TX_MICMUTE_RATIODTH_THCUT +928 0x1000 //TX_MICMUTE_B_POST_FLT_ECHOL +929 0x7FFF //TX_MICMUTE_B_POST_FLT_ECHOH +930 0x0400 //TX_MICMUTE_C_POST_FLT_MASK +931 0x7999 //TX_MICMUTE_RATIODTL_CUT_TH +932 0x0258 //TX_MICMUTE_DT_CUT_K1 +933 0x0800 //TX_MICMUTE_N2_SN_EST +934 0xFC00 //TX_MICMUTE_THR_SN_EST_0 +935 0x001C //TX_MICMUTE_MIN_G_CTRL_0 +936 0x6000 //TX_MICMUTE_A_POST_FILT_S_0 +937 0x7000 //TX_MICMUTE_B_POST_FILT_0 +938 0x2710 //TX_MIC1RUB_AMP_THR +939 0x0010 //TX_MIC1MUTE_RATIO_THR +940 0x0450 //TX_MIC1MUTE_AMP_THR +941 0x0008 //TX_MIC1MUTE_CVG_TIME +942 0x0008 //TX_MIC1MUTE_RELEASE_TIME +943 0x0000 //TX_AMS_RESRV_01 +944 0x0000 //TX_AMS_RESRV_02 +945 0x0000 //TX_AMS_RESRV_03 +946 0x0000 //TX_AMS_RESRV_04 +947 0x0000 //TX_AMS_RESRV_05 +948 0x0000 //TX_AMS_RESRV_06 +949 0x0000 //TX_AMS_RESRV_07 +950 0x0000 //TX_AMS_RESRV_08 +951 0x0000 //TX_AMS_RESRV_09 +952 0x0000 //TX_AMS_RESRV_10 +953 0x0000 //TX_AMS_RESRV_11 +954 0x0000 //TX_AMS_RESRV_12 +955 0x0000 //TX_AMS_RESRV_13 +956 0x0000 //TX_AMS_RESRV_14 +957 0x0000 //TX_AMS_RESRV_15 +958 0x0000 //TX_AMS_RESRV_16 +959 0x0000 //TX_AMS_RESRV_17 +960 0x0000 //TX_AMS_RESRV_18 +961 0x0000 //TX_AMS_RESRV_19 #RX 0 0x006C //RX_RECVFUNC_MODE_0 1 0x0000 //RX_RECVFUNC_MODE_1 @@ -3508,10 +4491,862 @@ 110 0x0000 //RX_FDDRC_RESRV_0 129 0x0100 //RX_SPK_VOL 130 0x0000 //RX_VOL_RESRV_0 +#RX 2 +157 0x006C //_ +158 0x0000 //_ +159 0x0004 //_ +160 0x0004 //_ +161 0x000A //_ +162 0x0000 //_ +163 0x4000 //_ +164 0x4000 //_ +165 0x4000 //_ +166 0x4000 //_ +167 0x065B //_ +168 0x7E56 //_ +169 0x4000 //_ +170 0x7800 //_ +171 0x7000 //_ +172 0x6000 //_ +173 0x0008 //_ +174 0x0003 //_ +175 0x0100 //_ +176 0x0020 //_ +177 0x0400 //_ +178 0x000C //_ +179 0x0014 //_ +180 0xF400 //_ +181 0x7E00 //_ +182 0x00C8 //_ +183 0x0190 //_ +184 0x7EB8 //_ +185 0x7EB8 //_ +186 0x7EB8 //_ +187 0x0002 //_ +188 0x0800 //_ +189 0x7EB8 //_ +190 0x7FFF //_ +191 0x0800 //_ +192 0x199A //_ +193 0x0000 //_ +194 0x4000 //_ +195 0x0020 //_ +196 0x4848 //_ +197 0x4848 //_ +198 0x4848 //_ +199 0x4870 //_ +200 0x4848 //_ +201 0x4848 //_ +202 0x4850 //_ +203 0x485C //_ +204 0x5C60 //_ +205 0x685C //_ +206 0x5640 //_ +207 0x4040 //_ +208 0x5C58 //_ +209 0x5C60 //_ +210 0x6060 //_ +211 0x6060 //_ +212 0x4848 //_ +213 0x4848 //_ +214 0x4848 //_ +215 0x4848 //_ +216 0x4848 //_ +217 0x4848 //_ +218 0x4848 //_ +219 0x4848 //_ +220 0x0202 //_ +221 0x0203 //_ +222 0x0303 //_ +223 0x0402 //_ +224 0x0504 //_ +225 0x0209 //_ +226 0x0808 //_ +227 0x090A //_ +228 0x0B0C //_ +229 0x0D0E //_ +230 0x1013 //_ +231 0x1719 //_ +232 0x1B1E //_ +233 0x1E1E //_ +234 0x1E28 //_ +235 0x282C //_ +236 0x0000 //_ +237 0x0000 //_ +238 0x0000 //_ +239 0x0000 //_ +240 0x0000 //_ +241 0x0000 //_ +242 0x0000 //_ +243 0x0000 //_ +244 0x4000 //_ +245 0x0320 //_ +246 0x0018 //_ +247 0x0030 //_ +248 0x0050 //_ +249 0x0080 //_ +250 0x0004 //_ +251 0x5000 //_ +252 0x5000 //_ +253 0x2000 //_ +254 0x5000 //_ +255 0x6400 //_ +256 0x6400 //_ +257 0x2000 //_ +258 0x5000 //_ +259 0x4000 //_ +260 0x4000 //_ +261 0x4000 //_ +262 0x4000 //_ +263 0x7FFF //_ +264 0x7FFF //_ +265 0x7FFF //_ +266 0x7FFF //_ +267 0x0000 //_ +268 0x0002 //_ +269 0x0001 //_ +270 0x0002 //_ +271 0x1800 //_ +272 0x1800 //_ +273 0x6000 //_ +274 0x6E00 //_ +275 0x4000 //_ +276 0x7EB8 //_ +277 0x0000 //_ +278 0x199A //_ +279 0x0001 //_ +280 0x0CCD //_ +281 0x03C3 //_ +282 0x7C00 //_ +283 0x2000 //_ +284 0x2000 //_ +285 0x0080 //_ +286 0x0012 //_ +287 0x0000 //_ +288 0x0000 //_ +289 0x3000 //_ +290 0x3000 //_ +291 0x1800 //_ +292 0x1000 //_ +293 0x04CD //_ +294 0x0F33 //_ +295 0x7333 //_ +296 0x199A //_ +297 0x7333 //_ +298 0x0004 //_ +299 0x6CCD //_ +300 0x799A //_ +301 0x001E //_ +302 0x3000 //_ +303 0x3200 //_ +304 0x2000 //_ +305 0x2000 //_ +306 0x2000 //_ +307 0x2000 //_ +308 0x2000 //_ +309 0x2000 //_ +310 0x2000 //_ +311 0x0000 //_ +312 0x0000 //_ +313 0x0000 //_ +#VOL 0 +163 0x4000 //RX_TDDRC_ALPHA_UP_1 +164 0x4000 //RX_TDDRC_ALPHA_UP_2 +165 0x4000 //RX_TDDRC_ALPHA_UP_3 +166 0x4000 //RX_TDDRC_ALPHA_UP_4 +184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +190 0x7FFF //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +269 0x0001 //RX_TDDRC_THRD_0 +270 0x0002 //RX_TDDRC_THRD_1 +271 0x1800 //RX_TDDRC_THRD_2 +272 0x1800 //RX_TDDRC_THRD_3 +273 0x6000 //RX_TDDRC_SLANT_0 +274 0x6E00 //RX_TDDRC_SLANT_1 +275 0x4000 //RX_TDDRC_ALPHA_UP_0 +276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x199A //RX_TDDRC_HMNC_GAIN +279 0x0001 //RX_TDDRC_SMT_FLAG +280 0x0CCD //RX_TDDRC_SMT_W +281 0x03C3 //RX_TDDRC_DRC_GAIN +195 0x0020 //RX_FDEQ_SUBNUM +196 0x4848 //RX_FDEQ_GAIN_0 +197 0x4848 //RX_FDEQ_GAIN_1 +198 0x4848 //RX_FDEQ_GAIN_2 +199 0x4870 //RX_FDEQ_GAIN_3 +200 0x4848 //RX_FDEQ_GAIN_4 +201 0x4848 //RX_FDEQ_GAIN_5 +202 0x4850 //RX_FDEQ_GAIN_6 +203 0x485C //RX_FDEQ_GAIN_7 +204 0x5C60 //RX_FDEQ_GAIN_8 +205 0x685C //RX_FDEQ_GAIN_9 +206 0x5640 //RX_FDEQ_GAIN_10 +207 0x4040 //RX_FDEQ_GAIN_11 +208 0x5C58 //RX_FDEQ_GAIN_12 +209 0x5C60 //RX_FDEQ_GAIN_13 +210 0x6060 //RX_FDEQ_GAIN_14 +211 0x6060 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0202 //RX_FDEQ_BIN_0 +221 0x0203 //RX_FDEQ_BIN_1 +222 0x0303 //RX_FDEQ_BIN_2 +223 0x0402 //RX_FDEQ_BIN_3 +224 0x0504 //RX_FDEQ_BIN_4 +225 0x0209 //RX_FDEQ_BIN_5 +226 0x0808 //RX_FDEQ_BIN_6 +227 0x090A //RX_FDEQ_BIN_7 +228 0x0B0C //RX_FDEQ_BIN_8 +229 0x0D0E //RX_FDEQ_BIN_9 +230 0x1013 //RX_FDEQ_BIN_10 +231 0x1719 //RX_FDEQ_BIN_11 +232 0x1B1E //RX_FDEQ_BIN_12 +233 0x1E1E //RX_FDEQ_BIN_13 +234 0x1E28 //RX_FDEQ_BIN_14 +235 0x282C //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x4000 //RX_FDEQ_RESRV_0 +245 0x0320 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0030 //RX_FDDRC_BAND_MARGIN_1 +248 0x0050 //RX_FDDRC_BAND_MARGIN_2 +249 0x0080 //RX_FDDRC_BAND_MARGIN_3 +250 0x0004 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x2000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x2000 //RX_FDDRC_THRD_3_2 +258 0x5000 //RX_FDDRC_THRD_3_3 +259 0x4000 //RX_FDDRC_SLANT_0_0 +260 0x4000 //RX_FDDRC_SLANT_0_1 +261 0x4000 //RX_FDDRC_SLANT_0_2 +262 0x4000 //RX_FDDRC_SLANT_0_3 +263 0x7FFF //RX_FDDRC_SLANT_1_0 +264 0x7FFF //RX_FDDRC_SLANT_1_1 +265 0x7FFF //RX_FDDRC_SLANT_1_2 +266 0x7FFF //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +286 0x0012 //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 +#VOL 1 +163 0x4000 //RX_TDDRC_ALPHA_UP_1 +164 0x4000 //RX_TDDRC_ALPHA_UP_2 +165 0x4000 //RX_TDDRC_ALPHA_UP_3 +166 0x4000 //RX_TDDRC_ALPHA_UP_4 +184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +190 0x7FFF //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +269 0x0001 //RX_TDDRC_THRD_0 +270 0x0002 //RX_TDDRC_THRD_1 +271 0x1800 //RX_TDDRC_THRD_2 +272 0x1800 //RX_TDDRC_THRD_3 +273 0x6000 //RX_TDDRC_SLANT_0 +274 0x6E00 //RX_TDDRC_SLANT_1 +275 0x4000 //RX_TDDRC_ALPHA_UP_0 +276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x199A //RX_TDDRC_HMNC_GAIN +279 0x0001 //RX_TDDRC_SMT_FLAG +280 0x0CCD //RX_TDDRC_SMT_W +281 0x03C3 //RX_TDDRC_DRC_GAIN +195 0x0020 //RX_FDEQ_SUBNUM +196 0x4848 //RX_FDEQ_GAIN_0 +197 0x4848 //RX_FDEQ_GAIN_1 +198 0x4848 //RX_FDEQ_GAIN_2 +199 0x4870 //RX_FDEQ_GAIN_3 +200 0x4848 //RX_FDEQ_GAIN_4 +201 0x4848 //RX_FDEQ_GAIN_5 +202 0x4850 //RX_FDEQ_GAIN_6 +203 0x485C //RX_FDEQ_GAIN_7 +204 0x5C60 //RX_FDEQ_GAIN_8 +205 0x685C //RX_FDEQ_GAIN_9 +206 0x5640 //RX_FDEQ_GAIN_10 +207 0x4040 //RX_FDEQ_GAIN_11 +208 0x5C58 //RX_FDEQ_GAIN_12 +209 0x5C60 //RX_FDEQ_GAIN_13 +210 0x6060 //RX_FDEQ_GAIN_14 +211 0x6060 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0202 //RX_FDEQ_BIN_0 +221 0x0203 //RX_FDEQ_BIN_1 +222 0x0303 //RX_FDEQ_BIN_2 +223 0x0402 //RX_FDEQ_BIN_3 +224 0x0504 //RX_FDEQ_BIN_4 +225 0x0209 //RX_FDEQ_BIN_5 +226 0x0808 //RX_FDEQ_BIN_6 +227 0x090A //RX_FDEQ_BIN_7 +228 0x0B0C //RX_FDEQ_BIN_8 +229 0x0D0E //RX_FDEQ_BIN_9 +230 0x1013 //RX_FDEQ_BIN_10 +231 0x1719 //RX_FDEQ_BIN_11 +232 0x1B1E //RX_FDEQ_BIN_12 +233 0x1E1E //RX_FDEQ_BIN_13 +234 0x1E28 //RX_FDEQ_BIN_14 +235 0x282C //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x4000 //RX_FDEQ_RESRV_0 +245 0x0320 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0030 //RX_FDDRC_BAND_MARGIN_1 +248 0x0050 //RX_FDDRC_BAND_MARGIN_2 +249 0x0080 //RX_FDDRC_BAND_MARGIN_3 +250 0x0004 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x2000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x2000 //RX_FDDRC_THRD_3_2 +258 0x5000 //RX_FDDRC_THRD_3_3 +259 0x4000 //RX_FDDRC_SLANT_0_0 +260 0x4000 //RX_FDDRC_SLANT_0_1 +261 0x4000 //RX_FDDRC_SLANT_0_2 +262 0x4000 //RX_FDDRC_SLANT_0_3 +263 0x7FFF //RX_FDDRC_SLANT_1_0 +264 0x7FFF //RX_FDDRC_SLANT_1_1 +265 0x7FFF //RX_FDDRC_SLANT_1_2 +266 0x7FFF //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +286 0x001A //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 +#VOL 2 +163 0x4000 //RX_TDDRC_ALPHA_UP_1 +164 0x4000 //RX_TDDRC_ALPHA_UP_2 +165 0x4000 //RX_TDDRC_ALPHA_UP_3 +166 0x4000 //RX_TDDRC_ALPHA_UP_4 +184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +190 0x7FFF //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +269 0x0001 //RX_TDDRC_THRD_0 +270 0x0002 //RX_TDDRC_THRD_1 +271 0x1800 //RX_TDDRC_THRD_2 +272 0x1800 //RX_TDDRC_THRD_3 +273 0x6000 //RX_TDDRC_SLANT_0 +274 0x6E00 //RX_TDDRC_SLANT_1 +275 0x4000 //RX_TDDRC_ALPHA_UP_0 +276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x199A //RX_TDDRC_HMNC_GAIN +279 0x0001 //RX_TDDRC_SMT_FLAG +280 0x0CCD //RX_TDDRC_SMT_W +281 0x03C3 //RX_TDDRC_DRC_GAIN +195 0x0020 //RX_FDEQ_SUBNUM +196 0x4848 //RX_FDEQ_GAIN_0 +197 0x4848 //RX_FDEQ_GAIN_1 +198 0x4848 //RX_FDEQ_GAIN_2 +199 0x4870 //RX_FDEQ_GAIN_3 +200 0x4848 //RX_FDEQ_GAIN_4 +201 0x4848 //RX_FDEQ_GAIN_5 +202 0x4850 //RX_FDEQ_GAIN_6 +203 0x485C //RX_FDEQ_GAIN_7 +204 0x5C60 //RX_FDEQ_GAIN_8 +205 0x685C //RX_FDEQ_GAIN_9 +206 0x5640 //RX_FDEQ_GAIN_10 +207 0x4040 //RX_FDEQ_GAIN_11 +208 0x5C58 //RX_FDEQ_GAIN_12 +209 0x5C60 //RX_FDEQ_GAIN_13 +210 0x6060 //RX_FDEQ_GAIN_14 +211 0x6060 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0202 //RX_FDEQ_BIN_0 +221 0x0203 //RX_FDEQ_BIN_1 +222 0x0303 //RX_FDEQ_BIN_2 +223 0x0402 //RX_FDEQ_BIN_3 +224 0x0504 //RX_FDEQ_BIN_4 +225 0x0209 //RX_FDEQ_BIN_5 +226 0x0808 //RX_FDEQ_BIN_6 +227 0x090A //RX_FDEQ_BIN_7 +228 0x0B0C //RX_FDEQ_BIN_8 +229 0x0D0E //RX_FDEQ_BIN_9 +230 0x1013 //RX_FDEQ_BIN_10 +231 0x1719 //RX_FDEQ_BIN_11 +232 0x1B1E //RX_FDEQ_BIN_12 +233 0x1E1E //RX_FDEQ_BIN_13 +234 0x1E28 //RX_FDEQ_BIN_14 +235 0x282C //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x4000 //RX_FDEQ_RESRV_0 +245 0x0320 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0030 //RX_FDDRC_BAND_MARGIN_1 +248 0x0050 //RX_FDDRC_BAND_MARGIN_2 +249 0x0080 //RX_FDDRC_BAND_MARGIN_3 +250 0x0004 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x2000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x2000 //RX_FDDRC_THRD_3_2 +258 0x5000 //RX_FDDRC_THRD_3_3 +259 0x4000 //RX_FDDRC_SLANT_0_0 +260 0x4000 //RX_FDDRC_SLANT_0_1 +261 0x4000 //RX_FDDRC_SLANT_0_2 +262 0x4000 //RX_FDDRC_SLANT_0_3 +263 0x7FFF //RX_FDDRC_SLANT_1_0 +264 0x7FFF //RX_FDDRC_SLANT_1_1 +265 0x7FFF //RX_FDDRC_SLANT_1_2 +266 0x7FFF //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +286 0x0025 //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 +#VOL 3 +163 0x4000 //RX_TDDRC_ALPHA_UP_1 +164 0x4000 //RX_TDDRC_ALPHA_UP_2 +165 0x4000 //RX_TDDRC_ALPHA_UP_3 +166 0x4000 //RX_TDDRC_ALPHA_UP_4 +184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +190 0x7FFF //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +269 0x0001 //RX_TDDRC_THRD_0 +270 0x0002 //RX_TDDRC_THRD_1 +271 0x1800 //RX_TDDRC_THRD_2 +272 0x1800 //RX_TDDRC_THRD_3 +273 0x6000 //RX_TDDRC_SLANT_0 +274 0x6E00 //RX_TDDRC_SLANT_1 +275 0x4000 //RX_TDDRC_ALPHA_UP_0 +276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x199A //RX_TDDRC_HMNC_GAIN +279 0x0001 //RX_TDDRC_SMT_FLAG +280 0x0CCD //RX_TDDRC_SMT_W +281 0x03C3 //RX_TDDRC_DRC_GAIN +195 0x0020 //RX_FDEQ_SUBNUM +196 0x4848 //RX_FDEQ_GAIN_0 +197 0x4848 //RX_FDEQ_GAIN_1 +198 0x4848 //RX_FDEQ_GAIN_2 +199 0x4870 //RX_FDEQ_GAIN_3 +200 0x4848 //RX_FDEQ_GAIN_4 +201 0x4848 //RX_FDEQ_GAIN_5 +202 0x4850 //RX_FDEQ_GAIN_6 +203 0x485C //RX_FDEQ_GAIN_7 +204 0x5C60 //RX_FDEQ_GAIN_8 +205 0x685C //RX_FDEQ_GAIN_9 +206 0x5640 //RX_FDEQ_GAIN_10 +207 0x4040 //RX_FDEQ_GAIN_11 +208 0x5C58 //RX_FDEQ_GAIN_12 +209 0x5C60 //RX_FDEQ_GAIN_13 +210 0x6060 //RX_FDEQ_GAIN_14 +211 0x6060 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0202 //RX_FDEQ_BIN_0 +221 0x0203 //RX_FDEQ_BIN_1 +222 0x0303 //RX_FDEQ_BIN_2 +223 0x0402 //RX_FDEQ_BIN_3 +224 0x0504 //RX_FDEQ_BIN_4 +225 0x0209 //RX_FDEQ_BIN_5 +226 0x0808 //RX_FDEQ_BIN_6 +227 0x090A //RX_FDEQ_BIN_7 +228 0x0B0C //RX_FDEQ_BIN_8 +229 0x0D0E //RX_FDEQ_BIN_9 +230 0x1013 //RX_FDEQ_BIN_10 +231 0x1719 //RX_FDEQ_BIN_11 +232 0x1B1E //RX_FDEQ_BIN_12 +233 0x1E1E //RX_FDEQ_BIN_13 +234 0x1E28 //RX_FDEQ_BIN_14 +235 0x282C //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x4000 //RX_FDEQ_RESRV_0 +245 0x0320 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0030 //RX_FDDRC_BAND_MARGIN_1 +248 0x0050 //RX_FDDRC_BAND_MARGIN_2 +249 0x0080 //RX_FDDRC_BAND_MARGIN_3 +250 0x0004 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x2000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x2000 //RX_FDDRC_THRD_3_2 +258 0x5000 //RX_FDDRC_THRD_3_3 +259 0x4000 //RX_FDDRC_SLANT_0_0 +260 0x4000 //RX_FDDRC_SLANT_0_1 +261 0x4000 //RX_FDDRC_SLANT_0_2 +262 0x4000 //RX_FDDRC_SLANT_0_3 +263 0x7FFF //RX_FDDRC_SLANT_1_0 +264 0x7FFF //RX_FDDRC_SLANT_1_1 +265 0x7FFF //RX_FDDRC_SLANT_1_2 +266 0x7FFF //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +286 0x0034 //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 +#VOL 4 +163 0x4000 //RX_TDDRC_ALPHA_UP_1 +164 0x4000 //RX_TDDRC_ALPHA_UP_2 +165 0x4000 //RX_TDDRC_ALPHA_UP_3 +166 0x4000 //RX_TDDRC_ALPHA_UP_4 +184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +190 0x7FFF //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +269 0x0001 //RX_TDDRC_THRD_0 +270 0x0002 //RX_TDDRC_THRD_1 +271 0x1800 //RX_TDDRC_THRD_2 +272 0x1800 //RX_TDDRC_THRD_3 +273 0x6000 //RX_TDDRC_SLANT_0 +274 0x6E00 //RX_TDDRC_SLANT_1 +275 0x4000 //RX_TDDRC_ALPHA_UP_0 +276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x199A //RX_TDDRC_HMNC_GAIN +279 0x0001 //RX_TDDRC_SMT_FLAG +280 0x0CCD //RX_TDDRC_SMT_W +281 0x03C3 //RX_TDDRC_DRC_GAIN +195 0x0020 //RX_FDEQ_SUBNUM +196 0x4848 //RX_FDEQ_GAIN_0 +197 0x4848 //RX_FDEQ_GAIN_1 +198 0x4848 //RX_FDEQ_GAIN_2 +199 0x4870 //RX_FDEQ_GAIN_3 +200 0x4848 //RX_FDEQ_GAIN_4 +201 0x4848 //RX_FDEQ_GAIN_5 +202 0x4850 //RX_FDEQ_GAIN_6 +203 0x485C //RX_FDEQ_GAIN_7 +204 0x5C60 //RX_FDEQ_GAIN_8 +205 0x685C //RX_FDEQ_GAIN_9 +206 0x5640 //RX_FDEQ_GAIN_10 +207 0x4040 //RX_FDEQ_GAIN_11 +208 0x5C58 //RX_FDEQ_GAIN_12 +209 0x5C60 //RX_FDEQ_GAIN_13 +210 0x6060 //RX_FDEQ_GAIN_14 +211 0x6060 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0202 //RX_FDEQ_BIN_0 +221 0x0203 //RX_FDEQ_BIN_1 +222 0x0303 //RX_FDEQ_BIN_2 +223 0x0402 //RX_FDEQ_BIN_3 +224 0x0504 //RX_FDEQ_BIN_4 +225 0x0209 //RX_FDEQ_BIN_5 +226 0x0808 //RX_FDEQ_BIN_6 +227 0x090A //RX_FDEQ_BIN_7 +228 0x0B0C //RX_FDEQ_BIN_8 +229 0x0D0E //RX_FDEQ_BIN_9 +230 0x1013 //RX_FDEQ_BIN_10 +231 0x1719 //RX_FDEQ_BIN_11 +232 0x1B1E //RX_FDEQ_BIN_12 +233 0x1E1E //RX_FDEQ_BIN_13 +234 0x1E28 //RX_FDEQ_BIN_14 +235 0x282C //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x4000 //RX_FDEQ_RESRV_0 +245 0x0320 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0030 //RX_FDDRC_BAND_MARGIN_1 +248 0x0050 //RX_FDDRC_BAND_MARGIN_2 +249 0x0080 //RX_FDDRC_BAND_MARGIN_3 +250 0x0004 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x2000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x2000 //RX_FDDRC_THRD_3_2 +258 0x5000 //RX_FDDRC_THRD_3_3 +259 0x4000 //RX_FDDRC_SLANT_0_0 +260 0x4000 //RX_FDDRC_SLANT_0_1 +261 0x4000 //RX_FDDRC_SLANT_0_2 +262 0x4000 //RX_FDDRC_SLANT_0_3 +263 0x7FFF //RX_FDDRC_SLANT_1_0 +264 0x7FFF //RX_FDDRC_SLANT_1_1 +265 0x7FFF //RX_FDDRC_SLANT_1_2 +266 0x7FFF //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +286 0x004D //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 +#VOL 5 +163 0x4000 //RX_TDDRC_ALPHA_UP_1 +164 0x4000 //RX_TDDRC_ALPHA_UP_2 +165 0x4000 //RX_TDDRC_ALPHA_UP_3 +166 0x4000 //RX_TDDRC_ALPHA_UP_4 +184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +190 0x7FFF //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +269 0x0001 //RX_TDDRC_THRD_0 +270 0x0002 //RX_TDDRC_THRD_1 +271 0x1800 //RX_TDDRC_THRD_2 +272 0x1800 //RX_TDDRC_THRD_3 +273 0x6000 //RX_TDDRC_SLANT_0 +274 0x6E00 //RX_TDDRC_SLANT_1 +275 0x4000 //RX_TDDRC_ALPHA_UP_0 +276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x199A //RX_TDDRC_HMNC_GAIN +279 0x0001 //RX_TDDRC_SMT_FLAG +280 0x0CCD //RX_TDDRC_SMT_W +281 0x03C3 //RX_TDDRC_DRC_GAIN +195 0x0020 //RX_FDEQ_SUBNUM +196 0x4848 //RX_FDEQ_GAIN_0 +197 0x4848 //RX_FDEQ_GAIN_1 +198 0x4848 //RX_FDEQ_GAIN_2 +199 0x4870 //RX_FDEQ_GAIN_3 +200 0x4848 //RX_FDEQ_GAIN_4 +201 0x4848 //RX_FDEQ_GAIN_5 +202 0x4850 //RX_FDEQ_GAIN_6 +203 0x485C //RX_FDEQ_GAIN_7 +204 0x5C60 //RX_FDEQ_GAIN_8 +205 0x685C //RX_FDEQ_GAIN_9 +206 0x5640 //RX_FDEQ_GAIN_10 +207 0x4040 //RX_FDEQ_GAIN_11 +208 0x5C58 //RX_FDEQ_GAIN_12 +209 0x5C60 //RX_FDEQ_GAIN_13 +210 0x6060 //RX_FDEQ_GAIN_14 +211 0x6060 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0202 //RX_FDEQ_BIN_0 +221 0x0203 //RX_FDEQ_BIN_1 +222 0x0303 //RX_FDEQ_BIN_2 +223 0x0402 //RX_FDEQ_BIN_3 +224 0x0504 //RX_FDEQ_BIN_4 +225 0x0209 //RX_FDEQ_BIN_5 +226 0x0808 //RX_FDEQ_BIN_6 +227 0x090A //RX_FDEQ_BIN_7 +228 0x0B0C //RX_FDEQ_BIN_8 +229 0x0D0E //RX_FDEQ_BIN_9 +230 0x1013 //RX_FDEQ_BIN_10 +231 0x1719 //RX_FDEQ_BIN_11 +232 0x1B1E //RX_FDEQ_BIN_12 +233 0x1E1E //RX_FDEQ_BIN_13 +234 0x1E28 //RX_FDEQ_BIN_14 +235 0x282C //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x4000 //RX_FDEQ_RESRV_0 +245 0x0320 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0030 //RX_FDDRC_BAND_MARGIN_1 +248 0x0050 //RX_FDDRC_BAND_MARGIN_2 +249 0x0080 //RX_FDDRC_BAND_MARGIN_3 +250 0x0004 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x2000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x2000 //RX_FDDRC_THRD_3_2 +258 0x5000 //RX_FDDRC_THRD_3_3 +259 0x4000 //RX_FDDRC_SLANT_0_0 +260 0x4000 //RX_FDDRC_SLANT_0_1 +261 0x4000 //RX_FDDRC_SLANT_0_2 +262 0x4000 //RX_FDDRC_SLANT_0_3 +263 0x7FFF //RX_FDDRC_SLANT_1_0 +264 0x7FFF //RX_FDDRC_SLANT_1_1 +265 0x7FFF //RX_FDDRC_SLANT_1_2 +266 0x7FFF //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +286 0x0074 //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 +#VOL 6 +163 0x4000 //RX_TDDRC_ALPHA_UP_1 +164 0x4000 //RX_TDDRC_ALPHA_UP_2 +165 0x4000 //RX_TDDRC_ALPHA_UP_3 +166 0x4000 //RX_TDDRC_ALPHA_UP_4 +184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +190 0x7FFF //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +269 0x0001 //RX_TDDRC_THRD_0 +270 0x0002 //RX_TDDRC_THRD_1 +271 0x1800 //RX_TDDRC_THRD_2 +272 0x1800 //RX_TDDRC_THRD_3 +273 0x6000 //RX_TDDRC_SLANT_0 +274 0x6E00 //RX_TDDRC_SLANT_1 +275 0x4000 //RX_TDDRC_ALPHA_UP_0 +276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x199A //RX_TDDRC_HMNC_GAIN +279 0x0001 //RX_TDDRC_SMT_FLAG +280 0x0CCD //RX_TDDRC_SMT_W +281 0x03C3 //RX_TDDRC_DRC_GAIN +195 0x0020 //RX_FDEQ_SUBNUM +196 0x4848 //RX_FDEQ_GAIN_0 +197 0x4848 //RX_FDEQ_GAIN_1 +198 0x4848 //RX_FDEQ_GAIN_2 +199 0x4870 //RX_FDEQ_GAIN_3 +200 0x4848 //RX_FDEQ_GAIN_4 +201 0x4848 //RX_FDEQ_GAIN_5 +202 0x4850 //RX_FDEQ_GAIN_6 +203 0x485C //RX_FDEQ_GAIN_7 +204 0x5C60 //RX_FDEQ_GAIN_8 +205 0x685C //RX_FDEQ_GAIN_9 +206 0x5640 //RX_FDEQ_GAIN_10 +207 0x4040 //RX_FDEQ_GAIN_11 +208 0x5C58 //RX_FDEQ_GAIN_12 +209 0x5C60 //RX_FDEQ_GAIN_13 +210 0x6060 //RX_FDEQ_GAIN_14 +211 0x6060 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0202 //RX_FDEQ_BIN_0 +221 0x0203 //RX_FDEQ_BIN_1 +222 0x0303 //RX_FDEQ_BIN_2 +223 0x0402 //RX_FDEQ_BIN_3 +224 0x0504 //RX_FDEQ_BIN_4 +225 0x0209 //RX_FDEQ_BIN_5 +226 0x0808 //RX_FDEQ_BIN_6 +227 0x090A //RX_FDEQ_BIN_7 +228 0x0B0C //RX_FDEQ_BIN_8 +229 0x0D0E //RX_FDEQ_BIN_9 +230 0x1013 //RX_FDEQ_BIN_10 +231 0x1719 //RX_FDEQ_BIN_11 +232 0x1B1E //RX_FDEQ_BIN_12 +233 0x1E1E //RX_FDEQ_BIN_13 +234 0x1E28 //RX_FDEQ_BIN_14 +235 0x282C //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x4000 //RX_FDEQ_RESRV_0 +245 0x0320 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0030 //RX_FDDRC_BAND_MARGIN_1 +248 0x0050 //RX_FDDRC_BAND_MARGIN_2 +249 0x0080 //RX_FDDRC_BAND_MARGIN_3 +250 0x0004 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x2000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x2000 //RX_FDDRC_THRD_3_2 +258 0x5000 //RX_FDDRC_THRD_3_3 +259 0x4000 //RX_FDDRC_SLANT_0_0 +260 0x4000 //RX_FDDRC_SLANT_0_1 +261 0x4000 //RX_FDDRC_SLANT_0_2 +262 0x4000 //RX_FDDRC_SLANT_0_3 +263 0x7FFF //RX_FDDRC_SLANT_1_0 +264 0x7FFF //RX_FDDRC_SLANT_1_1 +265 0x7FFF //RX_FDDRC_SLANT_1_2 +266 0x7FFF //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +286 0x0100 //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 -#CASE_NAME HANDSFREE-HANDSFREE-CUSTOM1-FB -#PARAM_TYPE TX+RX -#TOTAL_CUSTOM_STEP 7 +#CASE_NAME HANDSFREE-HANDFREE-CUSTOM1-FB +#PARAM_MODE FULL +#PARAM_TYPE TX+2RX +#TOTAL_CUSTOM_STEP 7+7 #TX 0 0x0001 //TX_OPERATION_MODE_0 1 0x0001 //TX_OPERATION_MODE_1 @@ -3764,11 +5599,11 @@ 248 0xF800 //TX_THR_SN_EST_6 249 0xF800 //TX_THR_SN_EST_7 250 0x0100 //TX_DELTA_THR_SN_EST_0 -251 0x0200 //TX_DELTA_THR_SN_EST_1 -252 0x0100 //TX_DELTA_THR_SN_EST_2 -253 0x0200 //TX_DELTA_THR_SN_EST_3 +251 0x0100 //TX_DELTA_THR_SN_EST_1 +252 0x0200 //TX_DELTA_THR_SN_EST_2 +253 0x0100 //TX_DELTA_THR_SN_EST_3 254 0x0100 //TX_DELTA_THR_SN_EST_4 -255 0x0100 //TX_DELTA_THR_SN_EST_5 +255 0x0200 //TX_DELTA_THR_SN_EST_5 256 0x0200 //TX_DELTA_THR_SN_EST_6 257 0x0200 //TX_DELTA_THR_SN_EST_7 258 0x4000 //TX_LAMBDA_NN_EST_0 @@ -3796,11 +5631,11 @@ 280 0x1000 //TX_B_POST_FLT_1 281 0x0010 //TX_NS_LVL_CTRL_0 282 0x0014 //TX_NS_LVL_CTRL_1 -283 0x0014 //TX_NS_LVL_CTRL_2 -284 0x0018 //TX_NS_LVL_CTRL_3 -285 0x0016 //TX_NS_LVL_CTRL_4 -286 0x0014 //TX_NS_LVL_CTRL_5 -287 0x0011 //TX_NS_LVL_CTRL_6 +283 0x0018 //TX_NS_LVL_CTRL_2 +284 0x0016 //TX_NS_LVL_CTRL_3 +285 0x0014 //TX_NS_LVL_CTRL_4 +286 0x0011 //TX_NS_LVL_CTRL_5 +287 0x0014 //TX_NS_LVL_CTRL_6 288 0x0011 //TX_NS_LVL_CTRL_7 289 0x000F //TX_MIN_GAIN_S_0 290 0x0010 //TX_MIN_GAIN_S_1 @@ -3818,8 +5653,8 @@ 302 0x4000 //TX_SNRI_SUP_2 303 0x4000 //TX_SNRI_SUP_3 304 0x4000 //TX_SNRI_SUP_4 -305 0x4000 //TX_SNRI_SUP_5 -306 0x50C0 //TX_SNRI_SUP_6 +305 0x50C0 //TX_SNRI_SUP_5 +306 0x4000 //TX_SNRI_SUP_6 307 0x7FFF //TX_SNRI_SUP_7 308 0x7FFF //TX_THR_LFNS 309 0x0018 //TX_G_LFNS @@ -3828,19 +5663,19 @@ 312 0x7FFF //TX_A_POST_FILT_0 313 0x2000 //TX_A_POST_FILT_1 314 0x5000 //TX_A_POST_FILT_S_0 -315 0x6000 //TX_A_POST_FILT_S_1 -316 0x4C00 //TX_A_POST_FILT_S_2 -317 0x4000 //TX_A_POST_FILT_S_3 -318 0x6000 //TX_A_POST_FILT_S_4 -319 0x4000 //TX_A_POST_FILT_S_5 -320 0x5000 //TX_A_POST_FILT_S_6 +315 0x4C00 //TX_A_POST_FILT_S_1 +316 0x4000 //TX_A_POST_FILT_S_2 +317 0x6000 //TX_A_POST_FILT_S_3 +318 0x4000 //TX_A_POST_FILT_S_4 +319 0x5000 //TX_A_POST_FILT_S_5 +320 0x6000 //TX_A_POST_FILT_S_6 321 0x7000 //TX_A_POST_FILT_S_7 322 0x2000 //TX_B_POST_FILT_0 -323 0x1000 //TX_B_POST_FILT_1 +323 0x2000 //TX_B_POST_FILT_1 324 0x2000 //TX_B_POST_FILT_2 -325 0x2000 //TX_B_POST_FILT_3 +325 0x4000 //TX_B_POST_FILT_3 326 0x4000 //TX_B_POST_FILT_4 -327 0x4000 //TX_B_POST_FILT_5 +327 0x1000 //TX_B_POST_FILT_5 328 0x1000 //TX_B_POST_FILT_6 329 0x2000 //TX_B_POST_FILT_7 330 0x4000 //TX_B_LESSCUT_RTO_S_0 @@ -3848,14 +5683,14 @@ 332 0x7FFF //TX_B_LESSCUT_RTO_S_2 333 0x7FFF //TX_B_LESSCUT_RTO_S_3 334 0x7FFF //TX_B_LESSCUT_RTO_S_4 -335 0x7FFF //TX_B_LESSCUT_RTO_S_5 -336 0x6000 //TX_B_LESSCUT_RTO_S_6 +335 0x6000 //TX_B_LESSCUT_RTO_S_5 +336 0x7FFF //TX_B_LESSCUT_RTO_S_6 337 0x7FFF //TX_B_LESSCUT_RTO_S_7 338 0x7C00 //TX_LAMBDA_PFILT 339 0x7C00 //TX_LAMBDA_PFILT_S_0 340 0x7C00 //TX_LAMBDA_PFILT_S_1 -341 0x7C00 //TX_LAMBDA_PFILT_S_2 -342 0x7A00 //TX_LAMBDA_PFILT_S_3 +341 0x7A00 //TX_LAMBDA_PFILT_S_2 +342 0x7C00 //TX_LAMBDA_PFILT_S_3 343 0x7C00 //TX_LAMBDA_PFILT_S_4 344 0x7C00 //TX_LAMBDA_PFILT_S_5 345 0x7C00 //TX_LAMBDA_PFILT_S_6 @@ -3893,10 +5728,10 @@ 377 0x7FFF //TX_NOISE_TH_5_4 378 0x2710 //TX_NOISE_TH_6 379 0x0033 //TX_MINENOISE_TH -380 0x4000 //TX_MINENOISE_MIC0_TH_MTS -381 0xFFEE //TX_MINENOISE_MIC0_TH_EXP -382 0x6000 //TX_MINENOISE_MIC0_S_TH_MTS -383 0xFFF3 //TX_MINENOISE_MIC0_S_TH_EXP +380 0xD508 //TX_MORENS_TFMASK_TH +381 0x0001 //TX_DRC_QUIET_FLOOR +382 0x7999 //TX_RATIODTL_CUT_TH +383 0x0119 //TX_DT_CUT_K1 384 0x0666 //TX_OUT_ENER_S_TH_CLEAN 385 0x0666 //TX_OUT_ENER_S_TH_LESSCLEAN 386 0x0333 //TX_OUT_ENER_S_TH_NOISY @@ -3904,15 +5739,15 @@ 388 0x0333 //TX_OUT_ENER_TH_SPEECH 389 0x2000 //TX_SN_NPB_GAIN 390 0x0000 //TX_NN_NPB_GAIN -391 0x0000 //TX_CSX_ALPHA_0 -392 0x0000 //TX_CSX_ALPHA_1 -393 0x0000 //TX_CSX_ALPHA_2 -394 0x0000 //TX_CSX_ALPHA_3 -395 0x0800 //TX_MU_ARSP_EST -396 0x00C8 //TX_P_OUTBEAM_MIN_TH +391 0x7FFF //TX_POST_MASK_SUP_HSNE +392 0x1388 //TX_TAIL_DET_TH +393 0x4000 //TX_B_LESSCUT_RTO_WTA +394 0x0000 //TX_MEL_G_R +395 0x0080 //TX_SUPHIGH_TH +396 0x0000 //TX_MASK_G_R 397 0x0002 //TX_EXTRA_NS_L -398 0x0800 //TX_EXTRA_NS_A -399 0x0005 //TX_VR_NOISE_FLOOR_TH +398 0x1800 //TX_C_POST_FLT_MASK +399 0x4000 //TX_A_POST_FLT_WNS 400 0x0148 //TX_MIN_G_LOW300HZ 401 0x0002 //TX_MAXLEVEL_CNG 402 0x00B4 //TX_STN_NOISE_TH @@ -4027,16 +5862,16 @@ 511 0x6666 //TX_MIC_TO_BFGAIN 512 0x0000 //TX_MICTOBFGAIN0 513 0x0000 //TX_FASTMUE_TH -514 0x0000 //TX_DERVB_LEN_0 -515 0x0000 //TX_DERVB_LEN_1 -516 0x0000 //TX_RHO_DERVB -517 0x0000 //TX_MIC_INDX_DERVB -518 0x0000 //TX_MU_DERVB -519 0x0000 //TX_DR_RESRV_0 -520 0x0000 //TX_DR_RESRV_1 -521 0x0000 //TX_DR_RESRV_2 -522 0x0000 //TX_DR_RESRV_3 -523 0x0000 //TX_DR_RESRV_4 +514 0x3000 //TX_DEREVERB_LF_MU +515 0x34CD //TX_DEREVERB_HF_MU +516 0x0007 //TX_DEREVERB_DELAY +517 0x0004 //TX_DEREVERB_COEF_LEN +518 0x0003 //TX_DEREVERB_DNR +519 0x0000 //TX_DEREVERB_ALPHA +520 0x0000 //TX_DEREVERB_BETA +521 0x3A98 //TX_GSC_RTOL_TH +522 0x3A98 //TX_GSC_RTOH_TH +523 0x7E2C //TX_WIDE2_MEANHTH 524 0x0000 //TX_DR_RESRV_5 525 0x0000 //TX_DR_RESRV_6 526 0x0000 //TX_DR_RESRV_7 @@ -4410,6 +6245,71 @@ 894 0xC000 //TX_FASTNS_SSA_THHFL 895 0xCCCC //TX_FASTNS_SSA_THLFH 896 0xD999 //TX_FASTNS_SSA_THHFH +897 0x2339 //TX_SENDFUNC_REG_MICMUTE +898 0x0021 //TX_SENDFUNC_REG_MICMUTE1 +899 0x02BC //TX_MICMUTE_RATIO_THR +900 0x0140 //TX_MICMUTE_AMP_THR +901 0x0004 //TX_MICMUTE_HPF_IND +902 0x00C0 //TX_MICMUTE_LOG_EYR_TH +903 0x0008 //TX_MICMUTE_CVG_TIME +904 0x0008 //TX_MICMUTE_RELEASE_TIME +905 0x01FE //TX_MIC_VOLUME_MIC0MUTE +906 0x0020 //TX_MICMUTE_EPD_OFFSET_0 +907 0x001E //TX_MICMUTE_FRQ_AEC_L +908 0x7999 //TX_MICMUTE_EAD_THR +909 0x7FFF //TX_MICMUTE_LAMBDA_CB_NLE +910 0x7FFF //TX_MICMUTE_LAMBDA_RE_EST +911 0x4000 //TX_DTD_THR1_MICMUTE_0 +912 0x7000 //TX_DTD_THR1_MICMUTE_1 +913 0x7FFF //TX_DTD_THR1_MICMUTE_2 +914 0x7FFF //TX_DTD_THR1_MICMUTE_3 +915 0x6CCC //TX_DTD_THR2_MICMUTE_0 +916 0x0400 //TX_MICMUTE_MIN_EQ_RE_EST_0 +917 0x0400 //TX_MICMUTE_MIN_EQ_RE_EST_1 +918 0x1000 //TX_MICMUTE_MIN_EQ_RE_EST_2 +919 0x7FFF //TX_MICMUTE_MIN_EQ_RE_EST_3 +920 0x7FFF //TX_MICMUTE_MIN_EQ_RE_EST_4 +921 0x4000 //TX_MICMUTE_C_POST_FLT +922 0x03E8 //TX_MICMUTE_DT_CUT_K +923 0x0001 //TX_MICMUTE_DT_CUT_THR +924 0x03E8 //TX_MICMUTE_DT_CUT_K2 +925 0x0001 //TX_MICMUTE_DT_CUT_THR2 +926 0x0064 //TX_MICMUTE_DT2_HOLD_N +927 0x1000 //TX_MICMUTE_RATIODTH_THCUT +928 0x1000 //TX_MICMUTE_B_POST_FLT_ECHOL +929 0x7FFF //TX_MICMUTE_B_POST_FLT_ECHOH +930 0x0400 //TX_MICMUTE_C_POST_FLT_MASK +931 0x7999 //TX_MICMUTE_RATIODTL_CUT_TH +932 0x0258 //TX_MICMUTE_DT_CUT_K1 +933 0x0800 //TX_MICMUTE_N2_SN_EST +934 0xFC00 //TX_MICMUTE_THR_SN_EST_0 +935 0x001C //TX_MICMUTE_MIN_G_CTRL_0 +936 0x6000 //TX_MICMUTE_A_POST_FILT_S_0 +937 0x7000 //TX_MICMUTE_B_POST_FILT_0 +938 0x2710 //TX_MIC1RUB_AMP_THR +939 0x0010 //TX_MIC1MUTE_RATIO_THR +940 0x0450 //TX_MIC1MUTE_AMP_THR +941 0x0008 //TX_MIC1MUTE_CVG_TIME +942 0x0008 //TX_MIC1MUTE_RELEASE_TIME +943 0x0000 //TX_AMS_RESRV_01 +944 0x0000 //TX_AMS_RESRV_02 +945 0x0000 //TX_AMS_RESRV_03 +946 0x0000 //TX_AMS_RESRV_04 +947 0x0000 //TX_AMS_RESRV_05 +948 0x0000 //TX_AMS_RESRV_06 +949 0x0000 //TX_AMS_RESRV_07 +950 0x0000 //TX_AMS_RESRV_08 +951 0x0000 //TX_AMS_RESRV_09 +952 0x0000 //TX_AMS_RESRV_10 +953 0x0000 //TX_AMS_RESRV_11 +954 0x0000 //TX_AMS_RESRV_12 +955 0x0000 //TX_AMS_RESRV_13 +956 0x0000 //TX_AMS_RESRV_14 +957 0x0000 //TX_AMS_RESRV_15 +958 0x0000 //TX_AMS_RESRV_16 +959 0x0000 //TX_AMS_RESRV_17 +960 0x0000 //TX_AMS_RESRV_18 +961 0x0000 //TX_AMS_RESRV_19 #RX 0 0x006C //RX_RECVFUNC_MODE_0 1 0x0000 //RX_RECVFUNC_MODE_1 @@ -5261,14 +7161,866 @@ 110 0x0000 //RX_FDDRC_RESRV_0 129 0x0100 //RX_SPK_VOL 130 0x0000 //RX_VOL_RESRV_0 +#RX 2 +157 0x006C //_ +158 0x0000 //_ +159 0x0004 //_ +160 0x0004 //_ +161 0x000A //_ +162 0x0000 //_ +163 0x4000 //_ +164 0x4000 //_ +165 0x4000 //_ +166 0x4000 //_ +167 0x065B //_ +168 0x7E56 //_ +169 0x4000 //_ +170 0x7800 //_ +171 0x7000 //_ +172 0x6000 //_ +173 0x0008 //_ +174 0x0003 //_ +175 0x0100 //_ +176 0x0020 //_ +177 0x0400 //_ +178 0x000C //_ +179 0x0014 //_ +180 0xF400 //_ +181 0x7E00 //_ +182 0x00C8 //_ +183 0x0190 //_ +184 0x7EB8 //_ +185 0x7EB8 //_ +186 0x7EB8 //_ +187 0x0002 //_ +188 0x0800 //_ +189 0x7EB8 //_ +190 0x7FFF //_ +191 0x0800 //_ +192 0x199A //_ +193 0x0000 //_ +194 0x4000 //_ +195 0x0020 //_ +196 0x4848 //_ +197 0x4848 //_ +198 0x4848 //_ +199 0x4870 //_ +200 0x4848 //_ +201 0x4848 //_ +202 0x4850 //_ +203 0x485C //_ +204 0x5C60 //_ +205 0x685C //_ +206 0x5640 //_ +207 0x4040 //_ +208 0x5C58 //_ +209 0x5C60 //_ +210 0x6060 //_ +211 0x6060 //_ +212 0x4848 //_ +213 0x4848 //_ +214 0x4848 //_ +215 0x4848 //_ +216 0x4848 //_ +217 0x4848 //_ +218 0x4848 //_ +219 0x4848 //_ +220 0x0202 //_ +221 0x0203 //_ +222 0x0303 //_ +223 0x0402 //_ +224 0x0504 //_ +225 0x0209 //_ +226 0x0808 //_ +227 0x090A //_ +228 0x0B0C //_ +229 0x0D0E //_ +230 0x1013 //_ +231 0x1719 //_ +232 0x1B1E //_ +233 0x1E1E //_ +234 0x1E28 //_ +235 0x282C //_ +236 0x0000 //_ +237 0x0000 //_ +238 0x0000 //_ +239 0x0000 //_ +240 0x0000 //_ +241 0x0000 //_ +242 0x0000 //_ +243 0x0000 //_ +244 0x4000 //_ +245 0x0320 //_ +246 0x0018 //_ +247 0x0030 //_ +248 0x0050 //_ +249 0x0080 //_ +250 0x0004 //_ +251 0x5000 //_ +252 0x5000 //_ +253 0x2000 //_ +254 0x5000 //_ +255 0x6400 //_ +256 0x6400 //_ +257 0x2000 //_ +258 0x5000 //_ +259 0x4000 //_ +260 0x4000 //_ +261 0x4000 //_ +262 0x4000 //_ +263 0x7FFF //_ +264 0x7FFF //_ +265 0x7FFF //_ +266 0x7FFF //_ +267 0x0000 //_ +268 0x0002 //_ +269 0x0001 //_ +270 0x0002 //_ +271 0x1800 //_ +272 0x1800 //_ +273 0x6000 //_ +274 0x6E00 //_ +275 0x4000 //_ +276 0x7EB8 //_ +277 0x0000 //_ +278 0x199A //_ +279 0x0001 //_ +280 0x0CCD //_ +281 0x03C3 //_ +282 0x7C00 //_ +283 0x2000 //_ +284 0x2000 //_ +285 0x0080 //_ +286 0x0012 //_ +287 0x0000 //_ +288 0x0000 //_ +289 0x3000 //_ +290 0x3000 //_ +291 0x1800 //_ +292 0x1000 //_ +293 0x04CD //_ +294 0x0F33 //_ +295 0x7333 //_ +296 0x199A //_ +297 0x7333 //_ +298 0x0004 //_ +299 0x6CCD //_ +300 0x799A //_ +301 0x001E //_ +302 0x3000 //_ +303 0x3200 //_ +304 0x2000 //_ +305 0x2000 //_ +306 0x2000 //_ +307 0x2000 //_ +308 0x2000 //_ +309 0x2000 //_ +310 0x2000 //_ +311 0x0000 //_ +312 0x0000 //_ +313 0x0000 //_ +#VOL 0 +163 0x4000 //RX_TDDRC_ALPHA_UP_1 +164 0x4000 //RX_TDDRC_ALPHA_UP_2 +165 0x4000 //RX_TDDRC_ALPHA_UP_3 +166 0x4000 //RX_TDDRC_ALPHA_UP_4 +184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +190 0x7FFF //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +269 0x0001 //RX_TDDRC_THRD_0 +270 0x0002 //RX_TDDRC_THRD_1 +271 0x1800 //RX_TDDRC_THRD_2 +272 0x1800 //RX_TDDRC_THRD_3 +273 0x6000 //RX_TDDRC_SLANT_0 +274 0x6E00 //RX_TDDRC_SLANT_1 +275 0x4000 //RX_TDDRC_ALPHA_UP_0 +276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x199A //RX_TDDRC_HMNC_GAIN +279 0x0001 //RX_TDDRC_SMT_FLAG +280 0x0CCD //RX_TDDRC_SMT_W +281 0x03C3 //RX_TDDRC_DRC_GAIN +195 0x0020 //RX_FDEQ_SUBNUM +196 0x4848 //RX_FDEQ_GAIN_0 +197 0x4848 //RX_FDEQ_GAIN_1 +198 0x4848 //RX_FDEQ_GAIN_2 +199 0x4870 //RX_FDEQ_GAIN_3 +200 0x4848 //RX_FDEQ_GAIN_4 +201 0x4848 //RX_FDEQ_GAIN_5 +202 0x4850 //RX_FDEQ_GAIN_6 +203 0x485C //RX_FDEQ_GAIN_7 +204 0x5C60 //RX_FDEQ_GAIN_8 +205 0x685C //RX_FDEQ_GAIN_9 +206 0x5640 //RX_FDEQ_GAIN_10 +207 0x4040 //RX_FDEQ_GAIN_11 +208 0x5C58 //RX_FDEQ_GAIN_12 +209 0x5C60 //RX_FDEQ_GAIN_13 +210 0x6060 //RX_FDEQ_GAIN_14 +211 0x6060 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0202 //RX_FDEQ_BIN_0 +221 0x0203 //RX_FDEQ_BIN_1 +222 0x0303 //RX_FDEQ_BIN_2 +223 0x0402 //RX_FDEQ_BIN_3 +224 0x0504 //RX_FDEQ_BIN_4 +225 0x0209 //RX_FDEQ_BIN_5 +226 0x0808 //RX_FDEQ_BIN_6 +227 0x090A //RX_FDEQ_BIN_7 +228 0x0B0C //RX_FDEQ_BIN_8 +229 0x0D0E //RX_FDEQ_BIN_9 +230 0x1013 //RX_FDEQ_BIN_10 +231 0x1719 //RX_FDEQ_BIN_11 +232 0x1B1E //RX_FDEQ_BIN_12 +233 0x1E1E //RX_FDEQ_BIN_13 +234 0x1E28 //RX_FDEQ_BIN_14 +235 0x282C //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x4000 //RX_FDEQ_RESRV_0 +245 0x0320 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0030 //RX_FDDRC_BAND_MARGIN_1 +248 0x0050 //RX_FDDRC_BAND_MARGIN_2 +249 0x0080 //RX_FDDRC_BAND_MARGIN_3 +250 0x0004 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x2000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x2000 //RX_FDDRC_THRD_3_2 +258 0x5000 //RX_FDDRC_THRD_3_3 +259 0x4000 //RX_FDDRC_SLANT_0_0 +260 0x4000 //RX_FDDRC_SLANT_0_1 +261 0x4000 //RX_FDDRC_SLANT_0_2 +262 0x4000 //RX_FDDRC_SLANT_0_3 +263 0x7FFF //RX_FDDRC_SLANT_1_0 +264 0x7FFF //RX_FDDRC_SLANT_1_1 +265 0x7FFF //RX_FDDRC_SLANT_1_2 +266 0x7FFF //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +286 0x0012 //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 +#VOL 1 +163 0x4000 //RX_TDDRC_ALPHA_UP_1 +164 0x4000 //RX_TDDRC_ALPHA_UP_2 +165 0x4000 //RX_TDDRC_ALPHA_UP_3 +166 0x4000 //RX_TDDRC_ALPHA_UP_4 +184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +190 0x7FFF //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +269 0x0001 //RX_TDDRC_THRD_0 +270 0x0002 //RX_TDDRC_THRD_1 +271 0x1800 //RX_TDDRC_THRD_2 +272 0x1800 //RX_TDDRC_THRD_3 +273 0x6000 //RX_TDDRC_SLANT_0 +274 0x6E00 //RX_TDDRC_SLANT_1 +275 0x4000 //RX_TDDRC_ALPHA_UP_0 +276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x199A //RX_TDDRC_HMNC_GAIN +279 0x0001 //RX_TDDRC_SMT_FLAG +280 0x0CCD //RX_TDDRC_SMT_W +281 0x03C3 //RX_TDDRC_DRC_GAIN +195 0x0020 //RX_FDEQ_SUBNUM +196 0x4848 //RX_FDEQ_GAIN_0 +197 0x4848 //RX_FDEQ_GAIN_1 +198 0x4848 //RX_FDEQ_GAIN_2 +199 0x4870 //RX_FDEQ_GAIN_3 +200 0x4848 //RX_FDEQ_GAIN_4 +201 0x4848 //RX_FDEQ_GAIN_5 +202 0x4850 //RX_FDEQ_GAIN_6 +203 0x485C //RX_FDEQ_GAIN_7 +204 0x5C60 //RX_FDEQ_GAIN_8 +205 0x685C //RX_FDEQ_GAIN_9 +206 0x5640 //RX_FDEQ_GAIN_10 +207 0x4040 //RX_FDEQ_GAIN_11 +208 0x5C58 //RX_FDEQ_GAIN_12 +209 0x5C60 //RX_FDEQ_GAIN_13 +210 0x6060 //RX_FDEQ_GAIN_14 +211 0x6060 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0202 //RX_FDEQ_BIN_0 +221 0x0203 //RX_FDEQ_BIN_1 +222 0x0303 //RX_FDEQ_BIN_2 +223 0x0402 //RX_FDEQ_BIN_3 +224 0x0504 //RX_FDEQ_BIN_4 +225 0x0209 //RX_FDEQ_BIN_5 +226 0x0808 //RX_FDEQ_BIN_6 +227 0x090A //RX_FDEQ_BIN_7 +228 0x0B0C //RX_FDEQ_BIN_8 +229 0x0D0E //RX_FDEQ_BIN_9 +230 0x1013 //RX_FDEQ_BIN_10 +231 0x1719 //RX_FDEQ_BIN_11 +232 0x1B1E //RX_FDEQ_BIN_12 +233 0x1E1E //RX_FDEQ_BIN_13 +234 0x1E28 //RX_FDEQ_BIN_14 +235 0x282C //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x4000 //RX_FDEQ_RESRV_0 +245 0x0320 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0030 //RX_FDDRC_BAND_MARGIN_1 +248 0x0050 //RX_FDDRC_BAND_MARGIN_2 +249 0x0080 //RX_FDDRC_BAND_MARGIN_3 +250 0x0004 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x2000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x2000 //RX_FDDRC_THRD_3_2 +258 0x5000 //RX_FDDRC_THRD_3_3 +259 0x4000 //RX_FDDRC_SLANT_0_0 +260 0x4000 //RX_FDDRC_SLANT_0_1 +261 0x4000 //RX_FDDRC_SLANT_0_2 +262 0x4000 //RX_FDDRC_SLANT_0_3 +263 0x7FFF //RX_FDDRC_SLANT_1_0 +264 0x7FFF //RX_FDDRC_SLANT_1_1 +265 0x7FFF //RX_FDDRC_SLANT_1_2 +266 0x7FFF //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +286 0x001A //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 +#VOL 2 +163 0x4000 //RX_TDDRC_ALPHA_UP_1 +164 0x4000 //RX_TDDRC_ALPHA_UP_2 +165 0x4000 //RX_TDDRC_ALPHA_UP_3 +166 0x4000 //RX_TDDRC_ALPHA_UP_4 +184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +190 0x7FFF //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +269 0x0001 //RX_TDDRC_THRD_0 +270 0x0002 //RX_TDDRC_THRD_1 +271 0x1800 //RX_TDDRC_THRD_2 +272 0x1800 //RX_TDDRC_THRD_3 +273 0x6000 //RX_TDDRC_SLANT_0 +274 0x6E00 //RX_TDDRC_SLANT_1 +275 0x4000 //RX_TDDRC_ALPHA_UP_0 +276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x199A //RX_TDDRC_HMNC_GAIN +279 0x0001 //RX_TDDRC_SMT_FLAG +280 0x0CCD //RX_TDDRC_SMT_W +281 0x03C3 //RX_TDDRC_DRC_GAIN +195 0x0020 //RX_FDEQ_SUBNUM +196 0x4848 //RX_FDEQ_GAIN_0 +197 0x4848 //RX_FDEQ_GAIN_1 +198 0x4848 //RX_FDEQ_GAIN_2 +199 0x4870 //RX_FDEQ_GAIN_3 +200 0x4848 //RX_FDEQ_GAIN_4 +201 0x4848 //RX_FDEQ_GAIN_5 +202 0x4850 //RX_FDEQ_GAIN_6 +203 0x485C //RX_FDEQ_GAIN_7 +204 0x5C60 //RX_FDEQ_GAIN_8 +205 0x685C //RX_FDEQ_GAIN_9 +206 0x5640 //RX_FDEQ_GAIN_10 +207 0x4040 //RX_FDEQ_GAIN_11 +208 0x5C58 //RX_FDEQ_GAIN_12 +209 0x5C60 //RX_FDEQ_GAIN_13 +210 0x6060 //RX_FDEQ_GAIN_14 +211 0x6060 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0202 //RX_FDEQ_BIN_0 +221 0x0203 //RX_FDEQ_BIN_1 +222 0x0303 //RX_FDEQ_BIN_2 +223 0x0402 //RX_FDEQ_BIN_3 +224 0x0504 //RX_FDEQ_BIN_4 +225 0x0209 //RX_FDEQ_BIN_5 +226 0x0808 //RX_FDEQ_BIN_6 +227 0x090A //RX_FDEQ_BIN_7 +228 0x0B0C //RX_FDEQ_BIN_8 +229 0x0D0E //RX_FDEQ_BIN_9 +230 0x1013 //RX_FDEQ_BIN_10 +231 0x1719 //RX_FDEQ_BIN_11 +232 0x1B1E //RX_FDEQ_BIN_12 +233 0x1E1E //RX_FDEQ_BIN_13 +234 0x1E28 //RX_FDEQ_BIN_14 +235 0x282C //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x4000 //RX_FDEQ_RESRV_0 +245 0x0320 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0030 //RX_FDDRC_BAND_MARGIN_1 +248 0x0050 //RX_FDDRC_BAND_MARGIN_2 +249 0x0080 //RX_FDDRC_BAND_MARGIN_3 +250 0x0004 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x2000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x2000 //RX_FDDRC_THRD_3_2 +258 0x5000 //RX_FDDRC_THRD_3_3 +259 0x4000 //RX_FDDRC_SLANT_0_0 +260 0x4000 //RX_FDDRC_SLANT_0_1 +261 0x4000 //RX_FDDRC_SLANT_0_2 +262 0x4000 //RX_FDDRC_SLANT_0_3 +263 0x7FFF //RX_FDDRC_SLANT_1_0 +264 0x7FFF //RX_FDDRC_SLANT_1_1 +265 0x7FFF //RX_FDDRC_SLANT_1_2 +266 0x7FFF //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +286 0x0025 //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 +#VOL 3 +163 0x4000 //RX_TDDRC_ALPHA_UP_1 +164 0x4000 //RX_TDDRC_ALPHA_UP_2 +165 0x4000 //RX_TDDRC_ALPHA_UP_3 +166 0x4000 //RX_TDDRC_ALPHA_UP_4 +184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +190 0x7FFF //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +269 0x0001 //RX_TDDRC_THRD_0 +270 0x0002 //RX_TDDRC_THRD_1 +271 0x1800 //RX_TDDRC_THRD_2 +272 0x1800 //RX_TDDRC_THRD_3 +273 0x6000 //RX_TDDRC_SLANT_0 +274 0x6E00 //RX_TDDRC_SLANT_1 +275 0x4000 //RX_TDDRC_ALPHA_UP_0 +276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x199A //RX_TDDRC_HMNC_GAIN +279 0x0001 //RX_TDDRC_SMT_FLAG +280 0x0CCD //RX_TDDRC_SMT_W +281 0x03C3 //RX_TDDRC_DRC_GAIN +195 0x0020 //RX_FDEQ_SUBNUM +196 0x4848 //RX_FDEQ_GAIN_0 +197 0x4848 //RX_FDEQ_GAIN_1 +198 0x4848 //RX_FDEQ_GAIN_2 +199 0x4870 //RX_FDEQ_GAIN_3 +200 0x4848 //RX_FDEQ_GAIN_4 +201 0x4848 //RX_FDEQ_GAIN_5 +202 0x4850 //RX_FDEQ_GAIN_6 +203 0x485C //RX_FDEQ_GAIN_7 +204 0x5C60 //RX_FDEQ_GAIN_8 +205 0x685C //RX_FDEQ_GAIN_9 +206 0x5640 //RX_FDEQ_GAIN_10 +207 0x4040 //RX_FDEQ_GAIN_11 +208 0x5C58 //RX_FDEQ_GAIN_12 +209 0x5C60 //RX_FDEQ_GAIN_13 +210 0x6060 //RX_FDEQ_GAIN_14 +211 0x6060 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0202 //RX_FDEQ_BIN_0 +221 0x0203 //RX_FDEQ_BIN_1 +222 0x0303 //RX_FDEQ_BIN_2 +223 0x0402 //RX_FDEQ_BIN_3 +224 0x0504 //RX_FDEQ_BIN_4 +225 0x0209 //RX_FDEQ_BIN_5 +226 0x0808 //RX_FDEQ_BIN_6 +227 0x090A //RX_FDEQ_BIN_7 +228 0x0B0C //RX_FDEQ_BIN_8 +229 0x0D0E //RX_FDEQ_BIN_9 +230 0x1013 //RX_FDEQ_BIN_10 +231 0x1719 //RX_FDEQ_BIN_11 +232 0x1B1E //RX_FDEQ_BIN_12 +233 0x1E1E //RX_FDEQ_BIN_13 +234 0x1E28 //RX_FDEQ_BIN_14 +235 0x282C //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x4000 //RX_FDEQ_RESRV_0 +245 0x0320 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0030 //RX_FDDRC_BAND_MARGIN_1 +248 0x0050 //RX_FDDRC_BAND_MARGIN_2 +249 0x0080 //RX_FDDRC_BAND_MARGIN_3 +250 0x0004 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x2000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x2000 //RX_FDDRC_THRD_3_2 +258 0x5000 //RX_FDDRC_THRD_3_3 +259 0x4000 //RX_FDDRC_SLANT_0_0 +260 0x4000 //RX_FDDRC_SLANT_0_1 +261 0x4000 //RX_FDDRC_SLANT_0_2 +262 0x4000 //RX_FDDRC_SLANT_0_3 +263 0x7FFF //RX_FDDRC_SLANT_1_0 +264 0x7FFF //RX_FDDRC_SLANT_1_1 +265 0x7FFF //RX_FDDRC_SLANT_1_2 +266 0x7FFF //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +286 0x0034 //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 +#VOL 4 +163 0x4000 //RX_TDDRC_ALPHA_UP_1 +164 0x4000 //RX_TDDRC_ALPHA_UP_2 +165 0x4000 //RX_TDDRC_ALPHA_UP_3 +166 0x4000 //RX_TDDRC_ALPHA_UP_4 +184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +190 0x7FFF //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +269 0x0001 //RX_TDDRC_THRD_0 +270 0x0002 //RX_TDDRC_THRD_1 +271 0x1800 //RX_TDDRC_THRD_2 +272 0x1800 //RX_TDDRC_THRD_3 +273 0x6000 //RX_TDDRC_SLANT_0 +274 0x6E00 //RX_TDDRC_SLANT_1 +275 0x4000 //RX_TDDRC_ALPHA_UP_0 +276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x199A //RX_TDDRC_HMNC_GAIN +279 0x0001 //RX_TDDRC_SMT_FLAG +280 0x0CCD //RX_TDDRC_SMT_W +281 0x03C3 //RX_TDDRC_DRC_GAIN +195 0x0020 //RX_FDEQ_SUBNUM +196 0x4848 //RX_FDEQ_GAIN_0 +197 0x4848 //RX_FDEQ_GAIN_1 +198 0x4848 //RX_FDEQ_GAIN_2 +199 0x4870 //RX_FDEQ_GAIN_3 +200 0x4848 //RX_FDEQ_GAIN_4 +201 0x4848 //RX_FDEQ_GAIN_5 +202 0x4850 //RX_FDEQ_GAIN_6 +203 0x485C //RX_FDEQ_GAIN_7 +204 0x5C60 //RX_FDEQ_GAIN_8 +205 0x685C //RX_FDEQ_GAIN_9 +206 0x5640 //RX_FDEQ_GAIN_10 +207 0x4040 //RX_FDEQ_GAIN_11 +208 0x5C58 //RX_FDEQ_GAIN_12 +209 0x5C60 //RX_FDEQ_GAIN_13 +210 0x6060 //RX_FDEQ_GAIN_14 +211 0x6060 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0202 //RX_FDEQ_BIN_0 +221 0x0203 //RX_FDEQ_BIN_1 +222 0x0303 //RX_FDEQ_BIN_2 +223 0x0402 //RX_FDEQ_BIN_3 +224 0x0504 //RX_FDEQ_BIN_4 +225 0x0209 //RX_FDEQ_BIN_5 +226 0x0808 //RX_FDEQ_BIN_6 +227 0x090A //RX_FDEQ_BIN_7 +228 0x0B0C //RX_FDEQ_BIN_8 +229 0x0D0E //RX_FDEQ_BIN_9 +230 0x1013 //RX_FDEQ_BIN_10 +231 0x1719 //RX_FDEQ_BIN_11 +232 0x1B1E //RX_FDEQ_BIN_12 +233 0x1E1E //RX_FDEQ_BIN_13 +234 0x1E28 //RX_FDEQ_BIN_14 +235 0x282C //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x4000 //RX_FDEQ_RESRV_0 +245 0x0320 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0030 //RX_FDDRC_BAND_MARGIN_1 +248 0x0050 //RX_FDDRC_BAND_MARGIN_2 +249 0x0080 //RX_FDDRC_BAND_MARGIN_3 +250 0x0004 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x2000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x2000 //RX_FDDRC_THRD_3_2 +258 0x5000 //RX_FDDRC_THRD_3_3 +259 0x4000 //RX_FDDRC_SLANT_0_0 +260 0x4000 //RX_FDDRC_SLANT_0_1 +261 0x4000 //RX_FDDRC_SLANT_0_2 +262 0x4000 //RX_FDDRC_SLANT_0_3 +263 0x7FFF //RX_FDDRC_SLANT_1_0 +264 0x7FFF //RX_FDDRC_SLANT_1_1 +265 0x7FFF //RX_FDDRC_SLANT_1_2 +266 0x7FFF //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +286 0x004D //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 +#VOL 5 +163 0x4000 //RX_TDDRC_ALPHA_UP_1 +164 0x4000 //RX_TDDRC_ALPHA_UP_2 +165 0x4000 //RX_TDDRC_ALPHA_UP_3 +166 0x4000 //RX_TDDRC_ALPHA_UP_4 +184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +190 0x7FFF //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +269 0x0001 //RX_TDDRC_THRD_0 +270 0x0002 //RX_TDDRC_THRD_1 +271 0x1800 //RX_TDDRC_THRD_2 +272 0x1800 //RX_TDDRC_THRD_3 +273 0x6000 //RX_TDDRC_SLANT_0 +274 0x6E00 //RX_TDDRC_SLANT_1 +275 0x4000 //RX_TDDRC_ALPHA_UP_0 +276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x199A //RX_TDDRC_HMNC_GAIN +279 0x0001 //RX_TDDRC_SMT_FLAG +280 0x0CCD //RX_TDDRC_SMT_W +281 0x03C3 //RX_TDDRC_DRC_GAIN +195 0x0020 //RX_FDEQ_SUBNUM +196 0x4848 //RX_FDEQ_GAIN_0 +197 0x4848 //RX_FDEQ_GAIN_1 +198 0x4848 //RX_FDEQ_GAIN_2 +199 0x4870 //RX_FDEQ_GAIN_3 +200 0x4848 //RX_FDEQ_GAIN_4 +201 0x4848 //RX_FDEQ_GAIN_5 +202 0x4850 //RX_FDEQ_GAIN_6 +203 0x485C //RX_FDEQ_GAIN_7 +204 0x5C60 //RX_FDEQ_GAIN_8 +205 0x685C //RX_FDEQ_GAIN_9 +206 0x5640 //RX_FDEQ_GAIN_10 +207 0x4040 //RX_FDEQ_GAIN_11 +208 0x5C58 //RX_FDEQ_GAIN_12 +209 0x5C60 //RX_FDEQ_GAIN_13 +210 0x6060 //RX_FDEQ_GAIN_14 +211 0x6060 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0202 //RX_FDEQ_BIN_0 +221 0x0203 //RX_FDEQ_BIN_1 +222 0x0303 //RX_FDEQ_BIN_2 +223 0x0402 //RX_FDEQ_BIN_3 +224 0x0504 //RX_FDEQ_BIN_4 +225 0x0209 //RX_FDEQ_BIN_5 +226 0x0808 //RX_FDEQ_BIN_6 +227 0x090A //RX_FDEQ_BIN_7 +228 0x0B0C //RX_FDEQ_BIN_8 +229 0x0D0E //RX_FDEQ_BIN_9 +230 0x1013 //RX_FDEQ_BIN_10 +231 0x1719 //RX_FDEQ_BIN_11 +232 0x1B1E //RX_FDEQ_BIN_12 +233 0x1E1E //RX_FDEQ_BIN_13 +234 0x1E28 //RX_FDEQ_BIN_14 +235 0x282C //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x4000 //RX_FDEQ_RESRV_0 +245 0x0320 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0030 //RX_FDDRC_BAND_MARGIN_1 +248 0x0050 //RX_FDDRC_BAND_MARGIN_2 +249 0x0080 //RX_FDDRC_BAND_MARGIN_3 +250 0x0004 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x2000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x2000 //RX_FDDRC_THRD_3_2 +258 0x5000 //RX_FDDRC_THRD_3_3 +259 0x4000 //RX_FDDRC_SLANT_0_0 +260 0x4000 //RX_FDDRC_SLANT_0_1 +261 0x4000 //RX_FDDRC_SLANT_0_2 +262 0x4000 //RX_FDDRC_SLANT_0_3 +263 0x7FFF //RX_FDDRC_SLANT_1_0 +264 0x7FFF //RX_FDDRC_SLANT_1_1 +265 0x7FFF //RX_FDDRC_SLANT_1_2 +266 0x7FFF //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +286 0x0074 //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 +#VOL 6 +163 0x4000 //RX_TDDRC_ALPHA_UP_1 +164 0x4000 //RX_TDDRC_ALPHA_UP_2 +165 0x4000 //RX_TDDRC_ALPHA_UP_3 +166 0x4000 //RX_TDDRC_ALPHA_UP_4 +184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +190 0x7FFF //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +269 0x0001 //RX_TDDRC_THRD_0 +270 0x0002 //RX_TDDRC_THRD_1 +271 0x1800 //RX_TDDRC_THRD_2 +272 0x1800 //RX_TDDRC_THRD_3 +273 0x6000 //RX_TDDRC_SLANT_0 +274 0x6E00 //RX_TDDRC_SLANT_1 +275 0x4000 //RX_TDDRC_ALPHA_UP_0 +276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x199A //RX_TDDRC_HMNC_GAIN +279 0x0001 //RX_TDDRC_SMT_FLAG +280 0x0CCD //RX_TDDRC_SMT_W +281 0x03C3 //RX_TDDRC_DRC_GAIN +195 0x0020 //RX_FDEQ_SUBNUM +196 0x4848 //RX_FDEQ_GAIN_0 +197 0x4848 //RX_FDEQ_GAIN_1 +198 0x4848 //RX_FDEQ_GAIN_2 +199 0x4870 //RX_FDEQ_GAIN_3 +200 0x4848 //RX_FDEQ_GAIN_4 +201 0x4848 //RX_FDEQ_GAIN_5 +202 0x4850 //RX_FDEQ_GAIN_6 +203 0x485C //RX_FDEQ_GAIN_7 +204 0x5C60 //RX_FDEQ_GAIN_8 +205 0x685C //RX_FDEQ_GAIN_9 +206 0x5640 //RX_FDEQ_GAIN_10 +207 0x4040 //RX_FDEQ_GAIN_11 +208 0x5C58 //RX_FDEQ_GAIN_12 +209 0x5C60 //RX_FDEQ_GAIN_13 +210 0x6060 //RX_FDEQ_GAIN_14 +211 0x6060 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0202 //RX_FDEQ_BIN_0 +221 0x0203 //RX_FDEQ_BIN_1 +222 0x0303 //RX_FDEQ_BIN_2 +223 0x0402 //RX_FDEQ_BIN_3 +224 0x0504 //RX_FDEQ_BIN_4 +225 0x0209 //RX_FDEQ_BIN_5 +226 0x0808 //RX_FDEQ_BIN_6 +227 0x090A //RX_FDEQ_BIN_7 +228 0x0B0C //RX_FDEQ_BIN_8 +229 0x0D0E //RX_FDEQ_BIN_9 +230 0x1013 //RX_FDEQ_BIN_10 +231 0x1719 //RX_FDEQ_BIN_11 +232 0x1B1E //RX_FDEQ_BIN_12 +233 0x1E1E //RX_FDEQ_BIN_13 +234 0x1E28 //RX_FDEQ_BIN_14 +235 0x282C //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x4000 //RX_FDEQ_RESRV_0 +245 0x0320 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0030 //RX_FDDRC_BAND_MARGIN_1 +248 0x0050 //RX_FDDRC_BAND_MARGIN_2 +249 0x0080 //RX_FDDRC_BAND_MARGIN_3 +250 0x0004 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x2000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x2000 //RX_FDDRC_THRD_3_2 +258 0x5000 //RX_FDDRC_THRD_3_3 +259 0x4000 //RX_FDDRC_SLANT_0_0 +260 0x4000 //RX_FDDRC_SLANT_0_1 +261 0x4000 //RX_FDDRC_SLANT_0_2 +262 0x4000 //RX_FDDRC_SLANT_0_3 +263 0x7FFF //RX_FDDRC_SLANT_1_0 +264 0x7FFF //RX_FDDRC_SLANT_1_1 +265 0x7FFF //RX_FDDRC_SLANT_1_2 +266 0x7FFF //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +286 0x0100 //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 -#CASE_NAME HANDSFREE-HANDSFREE-VOICE_GENERIC-NB -#PARAM_TYPE TX+RX -#TOTAL_CUSTOM_STEP 7 +#CASE_NAME HANDSFREE-HANDFREE-VOICE_GENERIC-NB +#PARAM_MODE FULL +#PARAM_TYPE TX+2RX +#TOTAL_CUSTOM_STEP 7+7 #TX 0 0x0001 //TX_OPERATION_MODE_0 1 0x0001 //TX_OPERATION_MODE_1 -2 0x0033 //TX_PATCH_REG +2 0x0073 //TX_PATCH_REG 3 0x2F7C //TX_SENDFUNC_MODE_0 4 0x0001 //TX_SENDFUNC_MODE_1 5 0x0003 //TX_NUM_MIC @@ -5416,7 +8168,7 @@ 147 0x0100 //TX_AEC_REF_GAIN_0 148 0x0800 //TX_AEC_REF_GAIN_1 149 0x0800 //TX_AEC_REF_GAIN_2 -150 0x7500 //TX_EAD_THR +150 0x7A00 //TX_EAD_THR 151 0x1000 //TX_THR_RE_EST 152 0x0200 //TX_MIN_EQ_RE_EST_0 153 0x0200 //TX_MIN_EQ_RE_EST_1 @@ -5437,7 +8189,7 @@ 168 0x2000 //TX_GAIN_NP 169 0x0180 //TX_SE_HOLD_N 170 0x00C8 //TX_DT_HOLD_N -171 0x05DC //TX_DT2_HOLD_N +171 0x0200 //TX_DT2_HOLD_N 172 0x6666 //TX_AEC_RESRV_0 173 0x0000 //TX_AEC_RESRV_1 174 0x0014 //TX_AEC_RESRV_2 @@ -5463,10 +8215,10 @@ 194 0x0000 //TX_NORMENERTH 195 0x0000 //TX_NORMENERHIGHTH 196 0x0000 //TX_NORMENERHIGHTHL -197 0x6590 //TX_DTD_THR1_0 -198 0x6590 //TX_DTD_THR1_1 -199 0x6590 //TX_DTD_THR1_2 -200 0x7FF0 //TX_DTD_THR1_3 +197 0x7148 //TX_DTD_THR1_0 +198 0x7148 //TX_DTD_THR1_1 +199 0x7148 //TX_DTD_THR1_2 +200 0x5DC0 //TX_DTD_THR1_3 201 0x7FF0 //TX_DTD_THR1_4 202 0x7FF0 //TX_DTD_THR1_5 203 0x7FF0 //TX_DTD_THR1_6 @@ -5494,7 +8246,7 @@ 225 0x1770 //TX_RATIO_DT_L_TH_HIGH 226 0x4E20 //TX_RATIO_DT_H_TH_HIGH 227 0x09C4 //TX_RATIO_DT_L0_TH -228 0x0800 //TX_B_POST_FILT_ECHO_L +228 0x2000 //TX_B_POST_FILT_ECHO_L 229 0x2000 //TX_B_POST_FILT_ECHO_H 230 0x0200 //TX_MIN_G_CTRL_ECHO 231 0x1000 //TX_B_LESSCUT_RTO_ECHO @@ -5517,12 +8269,12 @@ 248 0xF800 //TX_THR_SN_EST_6 249 0xF800 //TX_THR_SN_EST_7 250 0x0050 //TX_DELTA_THR_SN_EST_0 -251 0x01A0 //TX_DELTA_THR_SN_EST_1 +251 0x0200 //TX_DELTA_THR_SN_EST_1 252 0x0200 //TX_DELTA_THR_SN_EST_2 -253 0x0200 //TX_DELTA_THR_SN_EST_3 -254 0x0100 //TX_DELTA_THR_SN_EST_4 +253 0x0100 //TX_DELTA_THR_SN_EST_3 +254 0x0200 //TX_DELTA_THR_SN_EST_4 255 0x0200 //TX_DELTA_THR_SN_EST_5 -256 0x0200 //TX_DELTA_THR_SN_EST_6 +256 0x01A0 //TX_DELTA_THR_SN_EST_6 257 0x0200 //TX_DELTA_THR_SN_EST_7 258 0x4000 //TX_LAMBDA_NN_EST_0 259 0x4000 //TX_LAMBDA_NN_EST_1 @@ -5548,29 +8300,29 @@ 279 0x1000 //TX_B_POST_FLT_0 280 0x1000 //TX_B_POST_FLT_1 281 0x0010 //TX_NS_LVL_CTRL_0 -282 0x0012 //TX_NS_LVL_CTRL_1 -283 0x0017 //TX_NS_LVL_CTRL_2 -284 0x0015 //TX_NS_LVL_CTRL_3 +282 0x0017 //TX_NS_LVL_CTRL_1 +283 0x0015 //TX_NS_LVL_CTRL_2 +284 0x0012 //TX_NS_LVL_CTRL_3 285 0x0012 //TX_NS_LVL_CTRL_4 -286 0x0012 //TX_NS_LVL_CTRL_5 -287 0x0011 //TX_NS_LVL_CTRL_6 +286 0x0011 //TX_NS_LVL_CTRL_5 +287 0x0012 //TX_NS_LVL_CTRL_6 288 0x0011 //TX_NS_LVL_CTRL_7 -289 0x000F //TX_MIN_GAIN_S_0 -290 0x000F //TX_MIN_GAIN_S_1 -291 0x000D //TX_MIN_GAIN_S_2 -292 0x000F //TX_MIN_GAIN_S_3 -293 0x000F //TX_MIN_GAIN_S_4 -294 0x000F //TX_MIN_GAIN_S_5 -295 0x0010 //TX_MIN_GAIN_S_6 -296 0x000F //TX_MIN_GAIN_S_7 +289 0x0018 //TX_MIN_GAIN_S_0 +290 0x0018 //TX_MIN_GAIN_S_1 +291 0x0018 //TX_MIN_GAIN_S_2 +292 0x0018 //TX_MIN_GAIN_S_3 +293 0x0018 //TX_MIN_GAIN_S_4 +294 0x0018 //TX_MIN_GAIN_S_5 +295 0x0018 //TX_MIN_GAIN_S_6 +296 0x0018 //TX_MIN_GAIN_S_7 297 0x4000 //TX_NMOS_SUP 298 0x0000 //TX_NS_MAX_PRI_SNR_TH 299 0x0000 //TX_NMOS_SUP_MENSA 300 0x7FFF //TX_SNRI_SUP_0 -301 0x4000 //TX_SNRI_SUP_1 -302 0x1000 //TX_SNRI_SUP_2 -303 0x4000 //TX_SNRI_SUP_3 -304 0x2400 //TX_SNRI_SUP_4 +301 0x1000 //TX_SNRI_SUP_1 +302 0x4000 //TX_SNRI_SUP_2 +303 0x2400 //TX_SNRI_SUP_3 +304 0x4000 //TX_SNRI_SUP_4 305 0x4000 //TX_SNRI_SUP_5 306 0x4000 //TX_SNRI_SUP_6 307 0x7FFF //TX_SNRI_SUP_7 @@ -5580,20 +8332,20 @@ 311 0x000A //TX_MUSIC_MORENS 312 0x7FFF //TX_A_POST_FILT_0 313 0x2000 //TX_A_POST_FILT_1 -314 0x4000 //TX_A_POST_FILT_S_0 -315 0x5000 //TX_A_POST_FILT_S_1 -316 0x2000 //TX_A_POST_FILT_S_2 -317 0x4000 //TX_A_POST_FILT_S_3 -318 0x1000 //TX_A_POST_FILT_S_4 -319 0x3000 //TX_A_POST_FILT_S_5 -320 0x5000 //TX_A_POST_FILT_S_6 -321 0x7000 //TX_A_POST_FILT_S_7 +314 0x7FFF //TX_A_POST_FILT_S_0 +315 0x7FFF //TX_A_POST_FILT_S_1 +316 0x7FFF //TX_A_POST_FILT_S_2 +317 0x7FFF //TX_A_POST_FILT_S_3 +318 0x7FFF //TX_A_POST_FILT_S_4 +319 0x7FFF //TX_A_POST_FILT_S_5 +320 0x7FFF //TX_A_POST_FILT_S_6 +321 0x7FFF //TX_A_POST_FILT_S_7 322 0x1000 //TX_B_POST_FILT_0 323 0x1000 //TX_B_POST_FILT_1 324 0x1000 //TX_B_POST_FILT_2 -325 0x1000 //TX_B_POST_FILT_3 -326 0x5000 //TX_B_POST_FILT_4 -327 0x3000 //TX_B_POST_FILT_5 +325 0x5000 //TX_B_POST_FILT_3 +326 0x3000 //TX_B_POST_FILT_4 +327 0x1000 //TX_B_POST_FILT_5 328 0x1000 //TX_B_POST_FILT_6 329 0x2000 //TX_B_POST_FILT_7 330 0x4000 //TX_B_LESSCUT_RTO_S_0 @@ -5605,14 +8357,14 @@ 336 0x6000 //TX_B_LESSCUT_RTO_S_6 337 0x7FFF //TX_B_LESSCUT_RTO_S_7 338 0x7E00 //TX_LAMBDA_PFILT -339 0x7D00 //TX_LAMBDA_PFILT_S_0 -340 0x7900 //TX_LAMBDA_PFILT_S_1 -341 0x7400 //TX_LAMBDA_PFILT_S_2 -342 0x7900 //TX_LAMBDA_PFILT_S_3 -343 0x7000 //TX_LAMBDA_PFILT_S_4 -344 0x7D00 //TX_LAMBDA_PFILT_S_5 -345 0x7D00 //TX_LAMBDA_PFILT_S_6 -346 0x7D00 //TX_LAMBDA_PFILT_S_7 +339 0x7E00 //TX_LAMBDA_PFILT_S_0 +340 0x7E00 //TX_LAMBDA_PFILT_S_1 +341 0x7E00 //TX_LAMBDA_PFILT_S_2 +342 0x7E00 //TX_LAMBDA_PFILT_S_3 +343 0x7E00 //TX_LAMBDA_PFILT_S_4 +344 0x7E00 //TX_LAMBDA_PFILT_S_5 +345 0x7E00 //TX_LAMBDA_PFILT_S_6 +346 0x7E00 //TX_LAMBDA_PFILT_S_7 347 0x0200 //TX_K_PEPPER 348 0x0800 //TX_A_PEPPER 349 0x1EAA //TX_K_PEPPER_HF @@ -5646,10 +8398,10 @@ 377 0x7FFF //TX_NOISE_TH_5_4 378 0x0FA0 //TX_NOISE_TH_6 379 0x000A //TX_MINENOISE_TH -380 0x4000 //TX_MINENOISE_MIC0_TH_MTS -381 0xFFEE //TX_MINENOISE_MIC0_TH_EXP -382 0x6000 //TX_MINENOISE_MIC0_S_TH_MTS -383 0xFFF3 //TX_MINENOISE_MIC0_S_TH_EXP +380 0xD508 //TX_MORENS_TFMASK_TH +381 0x0001 //TX_DRC_QUIET_FLOOR +382 0x3A98 //TX_RATIODTL_CUT_TH +383 0x0DAC //TX_DT_CUT_K1 384 0x0666 //TX_OUT_ENER_S_TH_CLEAN 385 0x0666 //TX_OUT_ENER_S_TH_LESSCLEAN 386 0x0333 //TX_OUT_ENER_S_TH_NOISY @@ -5657,15 +8409,15 @@ 388 0x1000 //TX_OUT_ENER_TH_SPEECH 389 0x2000 //TX_SN_NPB_GAIN 390 0x0000 //TX_NN_NPB_GAIN -391 0x0000 //TX_CSX_ALPHA_0 -392 0x0000 //TX_CSX_ALPHA_1 -393 0x0000 //TX_CSX_ALPHA_2 -394 0x0000 //TX_CSX_ALPHA_3 -395 0x0800 //TX_MU_ARSP_EST -396 0x00C8 //TX_P_OUTBEAM_MIN_TH +391 0x7FFF //TX_POST_MASK_SUP_HSNE +392 0x7000 //TX_TAIL_DET_TH +393 0x4000 //TX_B_LESSCUT_RTO_WTA +394 0x0000 //TX_MEL_G_R +395 0x0080 //TX_SUPHIGH_TH +396 0x0000 //TX_MASK_G_R 397 0x0002 //TX_EXTRA_NS_L -398 0x0800 //TX_EXTRA_NS_A -399 0x0005 //TX_VR_NOISE_FLOOR_TH +398 0x1800 //TX_C_POST_FLT_MASK +399 0x7FFF //TX_A_POST_FLT_WNS 400 0x0148 //TX_MIN_G_LOW300HZ 401 0x0001 //TX_MAXLEVEL_CNG 402 0x00B4 //TX_STN_NOISE_TH @@ -5775,21 +8527,21 @@ 506 0x2000 //TX_RADIODTLV 507 0x0320 //TX_POWER_LINEIN_TH 508 0x0014 //TX_FE_VADCOUNT_TH_FC -509 0x0000 //TX_ECHO_SUPP_FC +509 0x000A //TX_ECHO_SUPP_FC 510 0x0C80 //TX_ECHO_TH 511 0x6666 //TX_MIC_TO_BFGAIN 512 0x0000 //TX_MICTOBFGAIN0 513 0x0000 //TX_FASTMUE_TH -514 0x0000 //TX_DERVB_LEN_0 -515 0x0000 //TX_DERVB_LEN_1 -516 0x0000 //TX_RHO_DERVB -517 0x0000 //TX_MIC_INDX_DERVB -518 0x0000 //TX_MU_DERVB -519 0x0000 //TX_DR_RESRV_0 -520 0x0000 //TX_DR_RESRV_1 -521 0x0000 //TX_DR_RESRV_2 -522 0x0000 //TX_DR_RESRV_3 -523 0x0000 //TX_DR_RESRV_4 +514 0x3000 //TX_DEREVERB_LF_MU +515 0x34CD //TX_DEREVERB_HF_MU +516 0x0007 //TX_DEREVERB_DELAY +517 0x0004 //TX_DEREVERB_COEF_LEN +518 0x0003 //TX_DEREVERB_DNR +519 0x0000 //TX_DEREVERB_ALPHA +520 0x0000 //TX_DEREVERB_BETA +521 0x3A98 //TX_GSC_RTOL_TH +522 0x3A98 //TX_GSC_RTOH_TH +523 0x7E2C //TX_WIDE2_MEANHTH 524 0x0000 //TX_DR_RESRV_5 525 0x0000 //TX_DR_RESRV_6 526 0x0000 //TX_DR_RESRV_7 @@ -6157,14 +8909,79 @@ 888 0x0028 //TX_FASTNS_ARSPC_TH 889 0xC000 //TX_FASTNS_MASK5_TH 890 0x4848 //TX_POSTSSA_MIN_G_VR_MASK -891 0x7FFF //TX_A_LESSCUT_RTO_MASK +891 0x1000 //TX_A_LESSCUT_RTO_MASK 892 0x1770 //TX_FASTNS_NOISETH 893 0xC000 //TX_FASTNS_SSA_THLFL 894 0xC000 //TX_FASTNS_SSA_THHFL 895 0xCCCC //TX_FASTNS_SSA_THLFH 896 0xD999 //TX_FASTNS_SSA_THHFH +897 0x2339 //TX_SENDFUNC_REG_MICMUTE +898 0x0021 //TX_SENDFUNC_REG_MICMUTE1 +899 0x02BC //TX_MICMUTE_RATIO_THR +900 0x0140 //TX_MICMUTE_AMP_THR +901 0x0004 //TX_MICMUTE_HPF_IND +902 0x00C0 //TX_MICMUTE_LOG_EYR_TH +903 0x0008 //TX_MICMUTE_CVG_TIME +904 0x0008 //TX_MICMUTE_RELEASE_TIME +905 0x01FE //TX_MIC_VOLUME_MIC0MUTE +906 0x0020 //TX_MICMUTE_EPD_OFFSET_0 +907 0x001E //TX_MICMUTE_FRQ_AEC_L +908 0x7999 //TX_MICMUTE_EAD_THR +909 0x7FFF //TX_MICMUTE_LAMBDA_CB_NLE +910 0x7FFF //TX_MICMUTE_LAMBDA_RE_EST +911 0x4000 //TX_DTD_THR1_MICMUTE_0 +912 0x7000 //TX_DTD_THR1_MICMUTE_1 +913 0x7FFF //TX_DTD_THR1_MICMUTE_2 +914 0x7FFF //TX_DTD_THR1_MICMUTE_3 +915 0x6CCC //TX_DTD_THR2_MICMUTE_0 +916 0x0400 //TX_MICMUTE_MIN_EQ_RE_EST_0 +917 0x0400 //TX_MICMUTE_MIN_EQ_RE_EST_1 +918 0x1000 //TX_MICMUTE_MIN_EQ_RE_EST_2 +919 0x7FFF //TX_MICMUTE_MIN_EQ_RE_EST_3 +920 0x7FFF //TX_MICMUTE_MIN_EQ_RE_EST_4 +921 0x4000 //TX_MICMUTE_C_POST_FLT +922 0x03E8 //TX_MICMUTE_DT_CUT_K +923 0x0001 //TX_MICMUTE_DT_CUT_THR +924 0x03E8 //TX_MICMUTE_DT_CUT_K2 +925 0x0001 //TX_MICMUTE_DT_CUT_THR2 +926 0x0064 //TX_MICMUTE_DT2_HOLD_N +927 0x1000 //TX_MICMUTE_RATIODTH_THCUT +928 0x1000 //TX_MICMUTE_B_POST_FLT_ECHOL +929 0x7FFF //TX_MICMUTE_B_POST_FLT_ECHOH +930 0x0400 //TX_MICMUTE_C_POST_FLT_MASK +931 0x7999 //TX_MICMUTE_RATIODTL_CUT_TH +932 0x0258 //TX_MICMUTE_DT_CUT_K1 +933 0x0800 //TX_MICMUTE_N2_SN_EST +934 0xFC00 //TX_MICMUTE_THR_SN_EST_0 +935 0x001C //TX_MICMUTE_MIN_G_CTRL_0 +936 0x6000 //TX_MICMUTE_A_POST_FILT_S_0 +937 0x7000 //TX_MICMUTE_B_POST_FILT_0 +938 0x2710 //TX_MIC1RUB_AMP_THR +939 0x0010 //TX_MIC1MUTE_RATIO_THR +940 0x0450 //TX_MIC1MUTE_AMP_THR +941 0x0008 //TX_MIC1MUTE_CVG_TIME +942 0x0008 //TX_MIC1MUTE_RELEASE_TIME +943 0x0000 //TX_AMS_RESRV_01 +944 0x0000 //TX_AMS_RESRV_02 +945 0x0000 //TX_AMS_RESRV_03 +946 0x0000 //TX_AMS_RESRV_04 +947 0x0000 //TX_AMS_RESRV_05 +948 0x0000 //TX_AMS_RESRV_06 +949 0x0000 //TX_AMS_RESRV_07 +950 0x0000 //TX_AMS_RESRV_08 +951 0x0000 //TX_AMS_RESRV_09 +952 0x0000 //TX_AMS_RESRV_10 +953 0x0000 //TX_AMS_RESRV_11 +954 0x0000 //TX_AMS_RESRV_12 +955 0x0000 //TX_AMS_RESRV_13 +956 0x0000 //TX_AMS_RESRV_14 +957 0x0000 //TX_AMS_RESRV_15 +958 0x0000 //TX_AMS_RESRV_16 +959 0x0000 //TX_AMS_RESRV_17 +960 0x0000 //TX_AMS_RESRV_18 +961 0x0000 //TX_AMS_RESRV_19 #RX -0 0x027C //RX_RECVFUNC_MODE_0 +0 0x206C //RX_RECVFUNC_MODE_0 1 0x0000 //RX_RECVFUNC_MODE_1 2 0x0000 //RX_SAMPLINGFREQ_SIG 3 0x0000 //RX_SAMPLINGFREQ_PROC @@ -6203,16 +9020,16 @@ 36 0x0000 //RX_LMT_THRD 37 0x4000 //RX_LMT_ALPHA 38 0x0014 //RX_FDEQ_SUBNUM -39 0x8080 //RX_FDEQ_GAIN_0 -40 0x8054 //RX_FDEQ_GAIN_1 -41 0x5050 //RX_FDEQ_GAIN_2 -42 0x5058 //RX_FDEQ_GAIN_3 -43 0x5C70 //RX_FDEQ_GAIN_4 -44 0x4848 //RX_FDEQ_GAIN_5 -45 0x484C //RX_FDEQ_GAIN_6 -46 0x4848 //RX_FDEQ_GAIN_7 -47 0x485A //RX_FDEQ_GAIN_8 -48 0x5A58 //RX_FDEQ_GAIN_9 +39 0x5252 //RX_FDEQ_GAIN_0 +40 0x4E4F //RX_FDEQ_GAIN_1 +41 0x4743 //RX_FDEQ_GAIN_2 +42 0x454C //RX_FDEQ_GAIN_3 +43 0x4C49 //RX_FDEQ_GAIN_4 +44 0x584A //RX_FDEQ_GAIN_5 +45 0x4642 //RX_FDEQ_GAIN_6 +46 0x4043 //RX_FDEQ_GAIN_7 +47 0x454A //RX_FDEQ_GAIN_8 +48 0x4C53 //RX_FDEQ_GAIN_9 49 0x4848 //RX_FDEQ_GAIN_10 50 0x4848 //RX_FDEQ_GAIN_11 51 0x4848 //RX_FDEQ_GAIN_12 @@ -6231,8 +9048,8 @@ 64 0x0203 //RX_FDEQ_BIN_1 65 0x0303 //RX_FDEQ_BIN_2 66 0x0304 //RX_FDEQ_BIN_3 -67 0x0604 //RX_FDEQ_BIN_4 -68 0x0406 //RX_FDEQ_BIN_5 +67 0x0503 //RX_FDEQ_BIN_4 +68 0x0107 //RX_FDEQ_BIN_5 69 0x0708 //RX_FDEQ_BIN_6 70 0x090A //RX_FDEQ_BIN_7 71 0x0B0C //RX_FDEQ_BIN_8 @@ -6288,7 +9105,7 @@ 121 0x199A //RX_TDDRC_HMNC_GAIN 122 0x0001 //RX_TDDRC_SMT_FLAG 123 0x0CCD //RX_TDDRC_SMT_W -124 0x0780 //RX_TDDRC_DRC_GAIN +124 0x02D2 //RX_TDDRC_DRC_GAIN 125 0x7C00 //RX_LAMBDA_PKA_FP 126 0x2000 //RX_TPKA_FP 127 0x2000 //RX_MIN_G_FP @@ -6344,18 +9161,18 @@ 121 0x199A //RX_TDDRC_HMNC_GAIN 122 0x0001 //RX_TDDRC_SMT_FLAG 123 0x0CCD //RX_TDDRC_SMT_W -124 0x0780 //RX_TDDRC_DRC_GAIN +124 0x02D2 //RX_TDDRC_DRC_GAIN 38 0x0014 //RX_FDEQ_SUBNUM -39 0x8080 //RX_FDEQ_GAIN_0 -40 0x8054 //RX_FDEQ_GAIN_1 -41 0x5050 //RX_FDEQ_GAIN_2 -42 0x5058 //RX_FDEQ_GAIN_3 -43 0x5C70 //RX_FDEQ_GAIN_4 -44 0x4848 //RX_FDEQ_GAIN_5 -45 0x484C //RX_FDEQ_GAIN_6 -46 0x4848 //RX_FDEQ_GAIN_7 -47 0x485A //RX_FDEQ_GAIN_8 -48 0x5A58 //RX_FDEQ_GAIN_9 +39 0x5252 //RX_FDEQ_GAIN_0 +40 0x4E4F //RX_FDEQ_GAIN_1 +41 0x4743 //RX_FDEQ_GAIN_2 +42 0x454C //RX_FDEQ_GAIN_3 +43 0x4C49 //RX_FDEQ_GAIN_4 +44 0x584A //RX_FDEQ_GAIN_5 +45 0x4642 //RX_FDEQ_GAIN_6 +46 0x4043 //RX_FDEQ_GAIN_7 +47 0x454A //RX_FDEQ_GAIN_8 +48 0x4C53 //RX_FDEQ_GAIN_9 49 0x4848 //RX_FDEQ_GAIN_10 50 0x4848 //RX_FDEQ_GAIN_11 51 0x4848 //RX_FDEQ_GAIN_12 @@ -6374,8 +9191,8 @@ 64 0x0203 //RX_FDEQ_BIN_1 65 0x0303 //RX_FDEQ_BIN_2 66 0x0304 //RX_FDEQ_BIN_3 -67 0x0604 //RX_FDEQ_BIN_4 -68 0x0406 //RX_FDEQ_BIN_5 +67 0x0503 //RX_FDEQ_BIN_4 +68 0x0107 //RX_FDEQ_BIN_5 69 0x0708 //RX_FDEQ_BIN_6 70 0x090A //RX_FDEQ_BIN_7 71 0x0B0C //RX_FDEQ_BIN_8 @@ -6443,18 +9260,18 @@ 121 0x199A //RX_TDDRC_HMNC_GAIN 122 0x0001 //RX_TDDRC_SMT_FLAG 123 0x0CCD //RX_TDDRC_SMT_W -124 0x0780 //RX_TDDRC_DRC_GAIN +124 0x02D2 //RX_TDDRC_DRC_GAIN 38 0x0014 //RX_FDEQ_SUBNUM -39 0x8080 //RX_FDEQ_GAIN_0 -40 0x8054 //RX_FDEQ_GAIN_1 -41 0x5050 //RX_FDEQ_GAIN_2 -42 0x5058 //RX_FDEQ_GAIN_3 -43 0x5C70 //RX_FDEQ_GAIN_4 -44 0x4848 //RX_FDEQ_GAIN_5 -45 0x484C //RX_FDEQ_GAIN_6 -46 0x4848 //RX_FDEQ_GAIN_7 -47 0x485A //RX_FDEQ_GAIN_8 -48 0x5A58 //RX_FDEQ_GAIN_9 +39 0x5252 //RX_FDEQ_GAIN_0 +40 0x4E4F //RX_FDEQ_GAIN_1 +41 0x4743 //RX_FDEQ_GAIN_2 +42 0x454C //RX_FDEQ_GAIN_3 +43 0x4C49 //RX_FDEQ_GAIN_4 +44 0x584A //RX_FDEQ_GAIN_5 +45 0x4642 //RX_FDEQ_GAIN_6 +46 0x4043 //RX_FDEQ_GAIN_7 +47 0x454A //RX_FDEQ_GAIN_8 +48 0x4C53 //RX_FDEQ_GAIN_9 49 0x4848 //RX_FDEQ_GAIN_10 50 0x4848 //RX_FDEQ_GAIN_11 51 0x4848 //RX_FDEQ_GAIN_12 @@ -6473,8 +9290,8 @@ 64 0x0203 //RX_FDEQ_BIN_1 65 0x0303 //RX_FDEQ_BIN_2 66 0x0304 //RX_FDEQ_BIN_3 -67 0x0604 //RX_FDEQ_BIN_4 -68 0x0406 //RX_FDEQ_BIN_5 +67 0x0503 //RX_FDEQ_BIN_4 +68 0x0107 //RX_FDEQ_BIN_5 69 0x0708 //RX_FDEQ_BIN_6 70 0x090A //RX_FDEQ_BIN_7 71 0x0B0C //RX_FDEQ_BIN_8 @@ -6542,18 +9359,18 @@ 121 0x199A //RX_TDDRC_HMNC_GAIN 122 0x0001 //RX_TDDRC_SMT_FLAG 123 0x0CCD //RX_TDDRC_SMT_W -124 0x0780 //RX_TDDRC_DRC_GAIN +124 0x02D2 //RX_TDDRC_DRC_GAIN 38 0x0014 //RX_FDEQ_SUBNUM -39 0x8080 //RX_FDEQ_GAIN_0 -40 0x8054 //RX_FDEQ_GAIN_1 -41 0x5050 //RX_FDEQ_GAIN_2 -42 0x5058 //RX_FDEQ_GAIN_3 -43 0x5C70 //RX_FDEQ_GAIN_4 -44 0x4848 //RX_FDEQ_GAIN_5 -45 0x484C //RX_FDEQ_GAIN_6 -46 0x4848 //RX_FDEQ_GAIN_7 -47 0x485A //RX_FDEQ_GAIN_8 -48 0x5A58 //RX_FDEQ_GAIN_9 +39 0x5252 //RX_FDEQ_GAIN_0 +40 0x4E4F //RX_FDEQ_GAIN_1 +41 0x4743 //RX_FDEQ_GAIN_2 +42 0x454C //RX_FDEQ_GAIN_3 +43 0x4C49 //RX_FDEQ_GAIN_4 +44 0x584A //RX_FDEQ_GAIN_5 +45 0x4642 //RX_FDEQ_GAIN_6 +46 0x4043 //RX_FDEQ_GAIN_7 +47 0x454A //RX_FDEQ_GAIN_8 +48 0x4C53 //RX_FDEQ_GAIN_9 49 0x4848 //RX_FDEQ_GAIN_10 50 0x4848 //RX_FDEQ_GAIN_11 51 0x4848 //RX_FDEQ_GAIN_12 @@ -6572,8 +9389,8 @@ 64 0x0203 //RX_FDEQ_BIN_1 65 0x0303 //RX_FDEQ_BIN_2 66 0x0304 //RX_FDEQ_BIN_3 -67 0x0604 //RX_FDEQ_BIN_4 -68 0x0406 //RX_FDEQ_BIN_5 +67 0x0503 //RX_FDEQ_BIN_4 +68 0x0107 //RX_FDEQ_BIN_5 69 0x0708 //RX_FDEQ_BIN_6 70 0x090A //RX_FDEQ_BIN_7 71 0x0B0C //RX_FDEQ_BIN_8 @@ -6641,18 +9458,18 @@ 121 0x199A //RX_TDDRC_HMNC_GAIN 122 0x0001 //RX_TDDRC_SMT_FLAG 123 0x0CCD //RX_TDDRC_SMT_W -124 0x0780 //RX_TDDRC_DRC_GAIN +124 0x02D2 //RX_TDDRC_DRC_GAIN 38 0x0014 //RX_FDEQ_SUBNUM -39 0x8080 //RX_FDEQ_GAIN_0 -40 0x8054 //RX_FDEQ_GAIN_1 -41 0x5050 //RX_FDEQ_GAIN_2 -42 0x5058 //RX_FDEQ_GAIN_3 -43 0x5C70 //RX_FDEQ_GAIN_4 -44 0x4848 //RX_FDEQ_GAIN_5 -45 0x484C //RX_FDEQ_GAIN_6 -46 0x4848 //RX_FDEQ_GAIN_7 -47 0x485A //RX_FDEQ_GAIN_8 -48 0x5A58 //RX_FDEQ_GAIN_9 +39 0x5252 //RX_FDEQ_GAIN_0 +40 0x4E4F //RX_FDEQ_GAIN_1 +41 0x4743 //RX_FDEQ_GAIN_2 +42 0x454C //RX_FDEQ_GAIN_3 +43 0x4C49 //RX_FDEQ_GAIN_4 +44 0x584A //RX_FDEQ_GAIN_5 +45 0x4642 //RX_FDEQ_GAIN_6 +46 0x4043 //RX_FDEQ_GAIN_7 +47 0x454A //RX_FDEQ_GAIN_8 +48 0x4C53 //RX_FDEQ_GAIN_9 49 0x4848 //RX_FDEQ_GAIN_10 50 0x4848 //RX_FDEQ_GAIN_11 51 0x4848 //RX_FDEQ_GAIN_12 @@ -6671,8 +9488,8 @@ 64 0x0203 //RX_FDEQ_BIN_1 65 0x0303 //RX_FDEQ_BIN_2 66 0x0304 //RX_FDEQ_BIN_3 -67 0x0604 //RX_FDEQ_BIN_4 -68 0x0406 //RX_FDEQ_BIN_5 +67 0x0503 //RX_FDEQ_BIN_4 +68 0x0107 //RX_FDEQ_BIN_5 69 0x0708 //RX_FDEQ_BIN_6 70 0x090A //RX_FDEQ_BIN_7 71 0x0B0C //RX_FDEQ_BIN_8 @@ -6740,18 +9557,18 @@ 121 0x199A //RX_TDDRC_HMNC_GAIN 122 0x0001 //RX_TDDRC_SMT_FLAG 123 0x0CCD //RX_TDDRC_SMT_W -124 0x0780 //RX_TDDRC_DRC_GAIN +124 0x02D2 //RX_TDDRC_DRC_GAIN 38 0x0014 //RX_FDEQ_SUBNUM -39 0x8080 //RX_FDEQ_GAIN_0 -40 0x8054 //RX_FDEQ_GAIN_1 -41 0x5050 //RX_FDEQ_GAIN_2 -42 0x5058 //RX_FDEQ_GAIN_3 -43 0x5C70 //RX_FDEQ_GAIN_4 -44 0x4848 //RX_FDEQ_GAIN_5 -45 0x484C //RX_FDEQ_GAIN_6 -46 0x4848 //RX_FDEQ_GAIN_7 -47 0x485A //RX_FDEQ_GAIN_8 -48 0x5A58 //RX_FDEQ_GAIN_9 +39 0x5252 //RX_FDEQ_GAIN_0 +40 0x4E4F //RX_FDEQ_GAIN_1 +41 0x4743 //RX_FDEQ_GAIN_2 +42 0x454C //RX_FDEQ_GAIN_3 +43 0x4C49 //RX_FDEQ_GAIN_4 +44 0x584A //RX_FDEQ_GAIN_5 +45 0x4642 //RX_FDEQ_GAIN_6 +46 0x4043 //RX_FDEQ_GAIN_7 +47 0x454A //RX_FDEQ_GAIN_8 +48 0x4C53 //RX_FDEQ_GAIN_9 49 0x4848 //RX_FDEQ_GAIN_10 50 0x4848 //RX_FDEQ_GAIN_11 51 0x4848 //RX_FDEQ_GAIN_12 @@ -6770,8 +9587,8 @@ 64 0x0203 //RX_FDEQ_BIN_1 65 0x0303 //RX_FDEQ_BIN_2 66 0x0304 //RX_FDEQ_BIN_3 -67 0x0604 //RX_FDEQ_BIN_4 -68 0x0406 //RX_FDEQ_BIN_5 +67 0x0503 //RX_FDEQ_BIN_4 +68 0x0107 //RX_FDEQ_BIN_5 69 0x0708 //RX_FDEQ_BIN_6 70 0x090A //RX_FDEQ_BIN_7 71 0x0B0C //RX_FDEQ_BIN_8 @@ -6839,18 +9656,18 @@ 121 0x199A //RX_TDDRC_HMNC_GAIN 122 0x0001 //RX_TDDRC_SMT_FLAG 123 0x0CCD //RX_TDDRC_SMT_W -124 0x0780 //RX_TDDRC_DRC_GAIN +124 0x02D2 //RX_TDDRC_DRC_GAIN 38 0x0014 //RX_FDEQ_SUBNUM -39 0x8080 //RX_FDEQ_GAIN_0 -40 0x8054 //RX_FDEQ_GAIN_1 -41 0x5050 //RX_FDEQ_GAIN_2 -42 0x5058 //RX_FDEQ_GAIN_3 -43 0x5C70 //RX_FDEQ_GAIN_4 -44 0x4848 //RX_FDEQ_GAIN_5 -45 0x484C //RX_FDEQ_GAIN_6 -46 0x4848 //RX_FDEQ_GAIN_7 -47 0x485A //RX_FDEQ_GAIN_8 -48 0x5A58 //RX_FDEQ_GAIN_9 +39 0x5252 //RX_FDEQ_GAIN_0 +40 0x4E4F //RX_FDEQ_GAIN_1 +41 0x4743 //RX_FDEQ_GAIN_2 +42 0x454C //RX_FDEQ_GAIN_3 +43 0x4C49 //RX_FDEQ_GAIN_4 +44 0x584A //RX_FDEQ_GAIN_5 +45 0x4642 //RX_FDEQ_GAIN_6 +46 0x4043 //RX_FDEQ_GAIN_7 +47 0x454A //RX_FDEQ_GAIN_8 +48 0x4C53 //RX_FDEQ_GAIN_9 49 0x4848 //RX_FDEQ_GAIN_10 50 0x4848 //RX_FDEQ_GAIN_11 51 0x4848 //RX_FDEQ_GAIN_12 @@ -6869,8 +9686,8 @@ 64 0x0203 //RX_FDEQ_BIN_1 65 0x0303 //RX_FDEQ_BIN_2 66 0x0304 //RX_FDEQ_BIN_3 -67 0x0604 //RX_FDEQ_BIN_4 -68 0x0406 //RX_FDEQ_BIN_5 +67 0x0503 //RX_FDEQ_BIN_4 +68 0x0107 //RX_FDEQ_BIN_5 69 0x0708 //RX_FDEQ_BIN_6 70 0x090A //RX_FDEQ_BIN_7 71 0x0B0C //RX_FDEQ_BIN_8 @@ -6938,18 +9755,18 @@ 121 0x199A //RX_TDDRC_HMNC_GAIN 122 0x0001 //RX_TDDRC_SMT_FLAG 123 0x0CCD //RX_TDDRC_SMT_W -124 0x0780 //RX_TDDRC_DRC_GAIN +124 0x02D2 //RX_TDDRC_DRC_GAIN 38 0x0014 //RX_FDEQ_SUBNUM -39 0x8080 //RX_FDEQ_GAIN_0 -40 0x8054 //RX_FDEQ_GAIN_1 -41 0x5050 //RX_FDEQ_GAIN_2 -42 0x5058 //RX_FDEQ_GAIN_3 -43 0x5C70 //RX_FDEQ_GAIN_4 -44 0x4848 //RX_FDEQ_GAIN_5 -45 0x484C //RX_FDEQ_GAIN_6 -46 0x4848 //RX_FDEQ_GAIN_7 -47 0x485A //RX_FDEQ_GAIN_8 -48 0x5A58 //RX_FDEQ_GAIN_9 +39 0x5252 //RX_FDEQ_GAIN_0 +40 0x4E4F //RX_FDEQ_GAIN_1 +41 0x4743 //RX_FDEQ_GAIN_2 +42 0x454C //RX_FDEQ_GAIN_3 +43 0x4C49 //RX_FDEQ_GAIN_4 +44 0x584A //RX_FDEQ_GAIN_5 +45 0x4642 //RX_FDEQ_GAIN_6 +46 0x4043 //RX_FDEQ_GAIN_7 +47 0x454A //RX_FDEQ_GAIN_8 +48 0x4C53 //RX_FDEQ_GAIN_9 49 0x4848 //RX_FDEQ_GAIN_10 50 0x4848 //RX_FDEQ_GAIN_11 51 0x4848 //RX_FDEQ_GAIN_12 @@ -6968,8 +9785,8 @@ 64 0x0203 //RX_FDEQ_BIN_1 65 0x0303 //RX_FDEQ_BIN_2 66 0x0304 //RX_FDEQ_BIN_3 -67 0x0604 //RX_FDEQ_BIN_4 -68 0x0406 //RX_FDEQ_BIN_5 +67 0x0503 //RX_FDEQ_BIN_4 +68 0x0107 //RX_FDEQ_BIN_5 69 0x0708 //RX_FDEQ_BIN_6 70 0x090A //RX_FDEQ_BIN_7 71 0x0B0C //RX_FDEQ_BIN_8 @@ -7014,10 +9831,862 @@ 110 0x0000 //RX_FDDRC_RESRV_0 129 0x0100 //RX_SPK_VOL 130 0x0000 //RX_VOL_RESRV_0 +#RX 2 +157 0x027C //RX_RECVFUNC_MODE_0 +158 0x0000 //RX_RECVFUNC_MODE_1 +159 0x0000 //RX_SAMPLINGFREQ_SIG +160 0x0000 //RX_SAMPLINGFREQ_PROC +161 0x000A //RX_FRAME_SZ +162 0x0000 //RX_DELAY_OPT +163 0x1000 //RX_TDDRC_ALPHA_UP_1 +164 0x1000 //RX_TDDRC_ALPHA_UP_2 +165 0x1000 //RX_TDDRC_ALPHA_UP_3 +166 0x1000 //RX_TDDRC_ALPHA_UP_4 +167 0x0800 //RX_PGA +168 0x7652 //RX_A_HP +169 0x4000 //RX_B_PE +170 0x7800 //RX_THR_PITCH_DET_0 +171 0x7000 //RX_THR_PITCH_DET_1 +172 0x6000 //RX_THR_PITCH_DET_2 +173 0x0008 //RX_PITCH_BFR_LEN +174 0x0003 //RX_SBD_PITCH_DET +175 0x0100 //RX_PP_RESRV_0 +176 0x0020 //RX_PP_RESRV_1 +177 0x0400 //RX_N_SN_EST +178 0x000C //RX_N2_SN_EST +179 0x0010 //RX_NS_LVL_CTRL +180 0xF800 //RX_THR_SN_EST +181 0x7E00 //RX_LAMBDA_PFILT +182 0x000A //RX_FENS_RESRV_0 +183 0x0190 //RX_FENS_RESRV_1 +184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +185 0x4000 //RX_TDDRC_ALPHA_DWN_2 +186 0x4000 //RX_TDDRC_ALPHA_DWN_3 +187 0x0002 //RX_EXTRA_NS_L +188 0x0800 //RX_EXTRA_NS_A +189 0x4000 //RX_TDDRC_ALPHA_DWN_4 +190 0x7214 //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +192 0x199A //RX_A_POST_FLT +193 0x0000 //RX_LMT_THRD +194 0x4000 //RX_LMT_ALPHA +195 0x0014 //RX_FDEQ_SUBNUM +196 0x8080 //RX_FDEQ_GAIN_0 +197 0x8054 //RX_FDEQ_GAIN_1 +198 0x5050 //RX_FDEQ_GAIN_2 +199 0x5058 //RX_FDEQ_GAIN_3 +200 0x5C70 //RX_FDEQ_GAIN_4 +201 0x4848 //RX_FDEQ_GAIN_5 +202 0x484C //RX_FDEQ_GAIN_6 +203 0x4848 //RX_FDEQ_GAIN_7 +204 0x485A //RX_FDEQ_GAIN_8 +205 0x5A58 //RX_FDEQ_GAIN_9 +206 0x4848 //RX_FDEQ_GAIN_10 +207 0x4848 //RX_FDEQ_GAIN_11 +208 0x4848 //RX_FDEQ_GAIN_12 +209 0x4848 //RX_FDEQ_GAIN_13 +210 0x4848 //RX_FDEQ_GAIN_14 +211 0x4848 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0202 //RX_FDEQ_BIN_0 +221 0x0203 //RX_FDEQ_BIN_1 +222 0x0303 //RX_FDEQ_BIN_2 +223 0x0304 //RX_FDEQ_BIN_3 +224 0x0604 //RX_FDEQ_BIN_4 +225 0x0406 //RX_FDEQ_BIN_5 +226 0x0708 //RX_FDEQ_BIN_6 +227 0x090A //RX_FDEQ_BIN_7 +228 0x0B0C //RX_FDEQ_BIN_8 +229 0x0D08 //RX_FDEQ_BIN_9 +230 0x0000 //RX_FDEQ_BIN_10 +231 0x0000 //RX_FDEQ_BIN_11 +232 0x0000 //RX_FDEQ_BIN_12 +233 0x0000 //RX_FDEQ_BIN_13 +234 0x0000 //RX_FDEQ_BIN_14 +235 0x0000 //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x4000 //RX_FDEQ_RESRV_0 +245 0x0320 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0035 //RX_FDDRC_BAND_MARGIN_1 +248 0x0060 //RX_FDDRC_BAND_MARGIN_2 +249 0x0080 //RX_FDDRC_BAND_MARGIN_3 +250 0x0004 //RX_FDDRC_BLOCK_EXP +251 0x0600 //RX_FDDRC_THRD_2_0 +252 0x0600 //RX_FDDRC_THRD_2_1 +253 0x0600 //RX_FDDRC_THRD_2_2 +254 0x0600 //RX_FDDRC_THRD_2_3 +255 0x0800 //RX_FDDRC_THRD_3_0 +256 0x0800 //RX_FDDRC_THRD_3_1 +257 0x0800 //RX_FDDRC_THRD_3_2 +258 0x0800 //RX_FDDRC_THRD_3_3 +259 0x0000 //RX_FDDRC_SLANT_0_0 +260 0x0000 //RX_FDDRC_SLANT_0_1 +261 0x0000 //RX_FDDRC_SLANT_0_2 +262 0x0000 //RX_FDDRC_SLANT_0_3 +263 0x7FFF //RX_FDDRC_SLANT_1_0 +264 0x7FFF //RX_FDDRC_SLANT_1_1 +265 0x7FFF //RX_FDDRC_SLANT_1_2 +266 0x7FFF //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +268 0x0005 //RX_FILTINDX +269 0x0002 //RX_TDDRC_THRD_0 +270 0x0004 //RX_TDDRC_THRD_1 +271 0x1A00 //RX_TDDRC_THRD_2 +272 0x1A00 //RX_TDDRC_THRD_3 +273 0x7FFF //RX_TDDRC_SLANT_0 +274 0x7FFF //RX_TDDRC_SLANT_1 +275 0x1000 //RX_TDDRC_ALPHA_UP_0 +276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x199A //RX_TDDRC_HMNC_GAIN +279 0x0001 //RX_TDDRC_SMT_FLAG +280 0x0CCD //RX_TDDRC_SMT_W +281 0x0780 //RX_TDDRC_DRC_GAIN +282 0x7C00 //RX_LAMBDA_PKA_FP +283 0x2000 //RX_TPKA_FP +284 0x2000 //RX_MIN_G_FP +285 0x0080 //RX_MAX_G_FP +286 0x0100 //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 +288 0x0000 //RX_MAXLEVEL_CNG +289 0x3000 //RX_BWE_UV_TH +290 0x3000 //RX_BWE_UV_TH2 +291 0x1800 //RX_BWE_UV_TH3 +292 0x1000 //RX_BWE_V_TH +293 0x04CD //RX_BWE_GAIN1_V_TH1 +294 0x0F33 //RX_BWE_GAIN1_V_TH2 +295 0x7333 //RX_BWE_UV_EQ +296 0x199A //RX_BWE_V_EQ +297 0x7333 //RX_BWE_TONE_TH +298 0x0004 //RX_BWE_UV_HOLD_T +299 0x6CCD //RX_BWE_GAIN2_ALPHA +300 0x799A //RX_BWE_GAIN3_ALPHA +301 0x001E //RX_BWE_CUTOFF +302 0x3000 //RX_BWE_GAINFILL +303 0x3200 //RX_BWE_MAXTH_TONE +304 0x2000 //RX_BWE_EQ_0 +305 0x2000 //RX_BWE_EQ_1 +306 0x2000 //RX_BWE_EQ_2 +307 0x2000 //RX_BWE_EQ_3 +308 0x2000 //RX_BWE_EQ_4 +309 0x2000 //RX_BWE_EQ_5 +310 0x2000 //RX_BWE_EQ_6 +311 0x0000 //RX_BWE_RESRV_0 +312 0x0000 //RX_BWE_RESRV_1 +313 0x0000 //RX_BWE_RESRV_2 +#VOL 0 +163 0x1000 //RX_TDDRC_ALPHA_UP_1 +164 0x1000 //RX_TDDRC_ALPHA_UP_2 +165 0x1000 //RX_TDDRC_ALPHA_UP_3 +166 0x1000 //RX_TDDRC_ALPHA_UP_4 +184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +185 0x4000 //RX_TDDRC_ALPHA_DWN_2 +186 0x4000 //RX_TDDRC_ALPHA_DWN_3 +189 0x4000 //RX_TDDRC_ALPHA_DWN_4 +190 0x7214 //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +269 0x0002 //RX_TDDRC_THRD_0 +270 0x0004 //RX_TDDRC_THRD_1 +271 0x1A00 //RX_TDDRC_THRD_2 +272 0x1A00 //RX_TDDRC_THRD_3 +273 0x7FFF //RX_TDDRC_SLANT_0 +274 0x7FFF //RX_TDDRC_SLANT_1 +275 0x1000 //RX_TDDRC_ALPHA_UP_0 +276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x199A //RX_TDDRC_HMNC_GAIN +279 0x0001 //RX_TDDRC_SMT_FLAG +280 0x0CCD //RX_TDDRC_SMT_W +281 0x0780 //RX_TDDRC_DRC_GAIN +195 0x0014 //RX_FDEQ_SUBNUM +196 0x8080 //RX_FDEQ_GAIN_0 +197 0x8054 //RX_FDEQ_GAIN_1 +198 0x5050 //RX_FDEQ_GAIN_2 +199 0x5058 //RX_FDEQ_GAIN_3 +200 0x5C70 //RX_FDEQ_GAIN_4 +201 0x4848 //RX_FDEQ_GAIN_5 +202 0x484C //RX_FDEQ_GAIN_6 +203 0x4848 //RX_FDEQ_GAIN_7 +204 0x485A //RX_FDEQ_GAIN_8 +205 0x5A58 //RX_FDEQ_GAIN_9 +206 0x4848 //RX_FDEQ_GAIN_10 +207 0x4848 //RX_FDEQ_GAIN_11 +208 0x4848 //RX_FDEQ_GAIN_12 +209 0x4848 //RX_FDEQ_GAIN_13 +210 0x4848 //RX_FDEQ_GAIN_14 +211 0x4848 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0202 //RX_FDEQ_BIN_0 +221 0x0203 //RX_FDEQ_BIN_1 +222 0x0303 //RX_FDEQ_BIN_2 +223 0x0304 //RX_FDEQ_BIN_3 +224 0x0604 //RX_FDEQ_BIN_4 +225 0x0406 //RX_FDEQ_BIN_5 +226 0x0708 //RX_FDEQ_BIN_6 +227 0x090A //RX_FDEQ_BIN_7 +228 0x0B0C //RX_FDEQ_BIN_8 +229 0x0D08 //RX_FDEQ_BIN_9 +230 0x0000 //RX_FDEQ_BIN_10 +231 0x0000 //RX_FDEQ_BIN_11 +232 0x0000 //RX_FDEQ_BIN_12 +233 0x0000 //RX_FDEQ_BIN_13 +234 0x0000 //RX_FDEQ_BIN_14 +235 0x0000 //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x4000 //RX_FDEQ_RESRV_0 +245 0x0320 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0035 //RX_FDDRC_BAND_MARGIN_1 +248 0x0060 //RX_FDDRC_BAND_MARGIN_2 +249 0x0080 //RX_FDDRC_BAND_MARGIN_3 +250 0x0004 //RX_FDDRC_BLOCK_EXP +251 0x0600 //RX_FDDRC_THRD_2_0 +252 0x0600 //RX_FDDRC_THRD_2_1 +253 0x0600 //RX_FDDRC_THRD_2_2 +254 0x0600 //RX_FDDRC_THRD_2_3 +255 0x0800 //RX_FDDRC_THRD_3_0 +256 0x0800 //RX_FDDRC_THRD_3_1 +257 0x0800 //RX_FDDRC_THRD_3_2 +258 0x0800 //RX_FDDRC_THRD_3_3 +259 0x0000 //RX_FDDRC_SLANT_0_0 +260 0x0000 //RX_FDDRC_SLANT_0_1 +261 0x0000 //RX_FDDRC_SLANT_0_2 +262 0x0000 //RX_FDDRC_SLANT_0_3 +263 0x7FFF //RX_FDDRC_SLANT_1_0 +264 0x7FFF //RX_FDDRC_SLANT_1_1 +265 0x7FFF //RX_FDDRC_SLANT_1_2 +266 0x7FFF //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +286 0x0015 //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 +#VOL 1 +163 0x1000 //RX_TDDRC_ALPHA_UP_1 +164 0x1000 //RX_TDDRC_ALPHA_UP_2 +165 0x1000 //RX_TDDRC_ALPHA_UP_3 +166 0x1000 //RX_TDDRC_ALPHA_UP_4 +184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +185 0x4000 //RX_TDDRC_ALPHA_DWN_2 +186 0x4000 //RX_TDDRC_ALPHA_DWN_3 +189 0x4000 //RX_TDDRC_ALPHA_DWN_4 +190 0x7214 //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +269 0x0002 //RX_TDDRC_THRD_0 +270 0x0004 //RX_TDDRC_THRD_1 +271 0x1A00 //RX_TDDRC_THRD_2 +272 0x1A00 //RX_TDDRC_THRD_3 +273 0x7FFF //RX_TDDRC_SLANT_0 +274 0x7FFF //RX_TDDRC_SLANT_1 +275 0x1000 //RX_TDDRC_ALPHA_UP_0 +276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x199A //RX_TDDRC_HMNC_GAIN +279 0x0001 //RX_TDDRC_SMT_FLAG +280 0x0CCD //RX_TDDRC_SMT_W +281 0x0780 //RX_TDDRC_DRC_GAIN +195 0x0014 //RX_FDEQ_SUBNUM +196 0x8080 //RX_FDEQ_GAIN_0 +197 0x8054 //RX_FDEQ_GAIN_1 +198 0x5050 //RX_FDEQ_GAIN_2 +199 0x5058 //RX_FDEQ_GAIN_3 +200 0x5C70 //RX_FDEQ_GAIN_4 +201 0x4848 //RX_FDEQ_GAIN_5 +202 0x484C //RX_FDEQ_GAIN_6 +203 0x4848 //RX_FDEQ_GAIN_7 +204 0x485A //RX_FDEQ_GAIN_8 +205 0x5A58 //RX_FDEQ_GAIN_9 +206 0x4848 //RX_FDEQ_GAIN_10 +207 0x4848 //RX_FDEQ_GAIN_11 +208 0x4848 //RX_FDEQ_GAIN_12 +209 0x4848 //RX_FDEQ_GAIN_13 +210 0x4848 //RX_FDEQ_GAIN_14 +211 0x4848 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0202 //RX_FDEQ_BIN_0 +221 0x0203 //RX_FDEQ_BIN_1 +222 0x0303 //RX_FDEQ_BIN_2 +223 0x0304 //RX_FDEQ_BIN_3 +224 0x0604 //RX_FDEQ_BIN_4 +225 0x0406 //RX_FDEQ_BIN_5 +226 0x0708 //RX_FDEQ_BIN_6 +227 0x090A //RX_FDEQ_BIN_7 +228 0x0B0C //RX_FDEQ_BIN_8 +229 0x0D08 //RX_FDEQ_BIN_9 +230 0x0000 //RX_FDEQ_BIN_10 +231 0x0000 //RX_FDEQ_BIN_11 +232 0x0000 //RX_FDEQ_BIN_12 +233 0x0000 //RX_FDEQ_BIN_13 +234 0x0000 //RX_FDEQ_BIN_14 +235 0x0000 //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x4000 //RX_FDEQ_RESRV_0 +245 0x0320 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0035 //RX_FDDRC_BAND_MARGIN_1 +248 0x0060 //RX_FDDRC_BAND_MARGIN_2 +249 0x0080 //RX_FDDRC_BAND_MARGIN_3 +250 0x0004 //RX_FDDRC_BLOCK_EXP +251 0x0600 //RX_FDDRC_THRD_2_0 +252 0x0600 //RX_FDDRC_THRD_2_1 +253 0x0600 //RX_FDDRC_THRD_2_2 +254 0x0600 //RX_FDDRC_THRD_2_3 +255 0x0800 //RX_FDDRC_THRD_3_0 +256 0x0800 //RX_FDDRC_THRD_3_1 +257 0x0800 //RX_FDDRC_THRD_3_2 +258 0x0800 //RX_FDDRC_THRD_3_3 +259 0x0000 //RX_FDDRC_SLANT_0_0 +260 0x0000 //RX_FDDRC_SLANT_0_1 +261 0x0000 //RX_FDDRC_SLANT_0_2 +262 0x0000 //RX_FDDRC_SLANT_0_3 +263 0x7FFF //RX_FDDRC_SLANT_1_0 +264 0x7FFF //RX_FDDRC_SLANT_1_1 +265 0x7FFF //RX_FDDRC_SLANT_1_2 +266 0x7FFF //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +286 0x001E //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 +#VOL 2 +163 0x1000 //RX_TDDRC_ALPHA_UP_1 +164 0x1000 //RX_TDDRC_ALPHA_UP_2 +165 0x1000 //RX_TDDRC_ALPHA_UP_3 +166 0x1000 //RX_TDDRC_ALPHA_UP_4 +184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +185 0x4000 //RX_TDDRC_ALPHA_DWN_2 +186 0x4000 //RX_TDDRC_ALPHA_DWN_3 +189 0x4000 //RX_TDDRC_ALPHA_DWN_4 +190 0x7214 //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +269 0x0002 //RX_TDDRC_THRD_0 +270 0x0004 //RX_TDDRC_THRD_1 +271 0x1A00 //RX_TDDRC_THRD_2 +272 0x1A00 //RX_TDDRC_THRD_3 +273 0x7FFF //RX_TDDRC_SLANT_0 +274 0x7FFF //RX_TDDRC_SLANT_1 +275 0x1000 //RX_TDDRC_ALPHA_UP_0 +276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x199A //RX_TDDRC_HMNC_GAIN +279 0x0001 //RX_TDDRC_SMT_FLAG +280 0x0CCD //RX_TDDRC_SMT_W +281 0x0780 //RX_TDDRC_DRC_GAIN +195 0x0014 //RX_FDEQ_SUBNUM +196 0x8080 //RX_FDEQ_GAIN_0 +197 0x8054 //RX_FDEQ_GAIN_1 +198 0x5050 //RX_FDEQ_GAIN_2 +199 0x5058 //RX_FDEQ_GAIN_3 +200 0x5C70 //RX_FDEQ_GAIN_4 +201 0x4848 //RX_FDEQ_GAIN_5 +202 0x484C //RX_FDEQ_GAIN_6 +203 0x4848 //RX_FDEQ_GAIN_7 +204 0x485A //RX_FDEQ_GAIN_8 +205 0x5A58 //RX_FDEQ_GAIN_9 +206 0x4848 //RX_FDEQ_GAIN_10 +207 0x4848 //RX_FDEQ_GAIN_11 +208 0x4848 //RX_FDEQ_GAIN_12 +209 0x4848 //RX_FDEQ_GAIN_13 +210 0x4848 //RX_FDEQ_GAIN_14 +211 0x4848 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0202 //RX_FDEQ_BIN_0 +221 0x0203 //RX_FDEQ_BIN_1 +222 0x0303 //RX_FDEQ_BIN_2 +223 0x0304 //RX_FDEQ_BIN_3 +224 0x0604 //RX_FDEQ_BIN_4 +225 0x0406 //RX_FDEQ_BIN_5 +226 0x0708 //RX_FDEQ_BIN_6 +227 0x090A //RX_FDEQ_BIN_7 +228 0x0B0C //RX_FDEQ_BIN_8 +229 0x0D08 //RX_FDEQ_BIN_9 +230 0x0000 //RX_FDEQ_BIN_10 +231 0x0000 //RX_FDEQ_BIN_11 +232 0x0000 //RX_FDEQ_BIN_12 +233 0x0000 //RX_FDEQ_BIN_13 +234 0x0000 //RX_FDEQ_BIN_14 +235 0x0000 //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x4000 //RX_FDEQ_RESRV_0 +245 0x0320 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0035 //RX_FDDRC_BAND_MARGIN_1 +248 0x0060 //RX_FDDRC_BAND_MARGIN_2 +249 0x0080 //RX_FDDRC_BAND_MARGIN_3 +250 0x0004 //RX_FDDRC_BLOCK_EXP +251 0x0600 //RX_FDDRC_THRD_2_0 +252 0x0600 //RX_FDDRC_THRD_2_1 +253 0x0600 //RX_FDDRC_THRD_2_2 +254 0x0600 //RX_FDDRC_THRD_2_3 +255 0x0800 //RX_FDDRC_THRD_3_0 +256 0x0800 //RX_FDDRC_THRD_3_1 +257 0x0800 //RX_FDDRC_THRD_3_2 +258 0x0800 //RX_FDDRC_THRD_3_3 +259 0x0000 //RX_FDDRC_SLANT_0_0 +260 0x0000 //RX_FDDRC_SLANT_0_1 +261 0x0000 //RX_FDDRC_SLANT_0_2 +262 0x0000 //RX_FDDRC_SLANT_0_3 +263 0x7FFF //RX_FDDRC_SLANT_1_0 +264 0x7FFF //RX_FDDRC_SLANT_1_1 +265 0x7FFF //RX_FDDRC_SLANT_1_2 +266 0x7FFF //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +286 0x002A //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 +#VOL 3 +163 0x1000 //RX_TDDRC_ALPHA_UP_1 +164 0x1000 //RX_TDDRC_ALPHA_UP_2 +165 0x1000 //RX_TDDRC_ALPHA_UP_3 +166 0x1000 //RX_TDDRC_ALPHA_UP_4 +184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +185 0x4000 //RX_TDDRC_ALPHA_DWN_2 +186 0x4000 //RX_TDDRC_ALPHA_DWN_3 +189 0x4000 //RX_TDDRC_ALPHA_DWN_4 +190 0x7214 //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +269 0x0002 //RX_TDDRC_THRD_0 +270 0x0004 //RX_TDDRC_THRD_1 +271 0x1A00 //RX_TDDRC_THRD_2 +272 0x1A00 //RX_TDDRC_THRD_3 +273 0x7FFF //RX_TDDRC_SLANT_0 +274 0x7FFF //RX_TDDRC_SLANT_1 +275 0x1000 //RX_TDDRC_ALPHA_UP_0 +276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x199A //RX_TDDRC_HMNC_GAIN +279 0x0001 //RX_TDDRC_SMT_FLAG +280 0x0CCD //RX_TDDRC_SMT_W +281 0x0780 //RX_TDDRC_DRC_GAIN +195 0x0014 //RX_FDEQ_SUBNUM +196 0x8080 //RX_FDEQ_GAIN_0 +197 0x8054 //RX_FDEQ_GAIN_1 +198 0x5050 //RX_FDEQ_GAIN_2 +199 0x5058 //RX_FDEQ_GAIN_3 +200 0x5C70 //RX_FDEQ_GAIN_4 +201 0x4848 //RX_FDEQ_GAIN_5 +202 0x484C //RX_FDEQ_GAIN_6 +203 0x4848 //RX_FDEQ_GAIN_7 +204 0x485A //RX_FDEQ_GAIN_8 +205 0x5A58 //RX_FDEQ_GAIN_9 +206 0x4848 //RX_FDEQ_GAIN_10 +207 0x4848 //RX_FDEQ_GAIN_11 +208 0x4848 //RX_FDEQ_GAIN_12 +209 0x4848 //RX_FDEQ_GAIN_13 +210 0x4848 //RX_FDEQ_GAIN_14 +211 0x4848 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0202 //RX_FDEQ_BIN_0 +221 0x0203 //RX_FDEQ_BIN_1 +222 0x0303 //RX_FDEQ_BIN_2 +223 0x0304 //RX_FDEQ_BIN_3 +224 0x0604 //RX_FDEQ_BIN_4 +225 0x0406 //RX_FDEQ_BIN_5 +226 0x0708 //RX_FDEQ_BIN_6 +227 0x090A //RX_FDEQ_BIN_7 +228 0x0B0C //RX_FDEQ_BIN_8 +229 0x0D08 //RX_FDEQ_BIN_9 +230 0x0000 //RX_FDEQ_BIN_10 +231 0x0000 //RX_FDEQ_BIN_11 +232 0x0000 //RX_FDEQ_BIN_12 +233 0x0000 //RX_FDEQ_BIN_13 +234 0x0000 //RX_FDEQ_BIN_14 +235 0x0000 //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x4000 //RX_FDEQ_RESRV_0 +245 0x0320 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0035 //RX_FDDRC_BAND_MARGIN_1 +248 0x0060 //RX_FDDRC_BAND_MARGIN_2 +249 0x0080 //RX_FDDRC_BAND_MARGIN_3 +250 0x0004 //RX_FDDRC_BLOCK_EXP +251 0x0600 //RX_FDDRC_THRD_2_0 +252 0x0600 //RX_FDDRC_THRD_2_1 +253 0x0600 //RX_FDDRC_THRD_2_2 +254 0x0600 //RX_FDDRC_THRD_2_3 +255 0x0800 //RX_FDDRC_THRD_3_0 +256 0x0800 //RX_FDDRC_THRD_3_1 +257 0x0800 //RX_FDDRC_THRD_3_2 +258 0x0800 //RX_FDDRC_THRD_3_3 +259 0x0000 //RX_FDDRC_SLANT_0_0 +260 0x0000 //RX_FDDRC_SLANT_0_1 +261 0x0000 //RX_FDDRC_SLANT_0_2 +262 0x0000 //RX_FDDRC_SLANT_0_3 +263 0x7FFF //RX_FDDRC_SLANT_1_0 +264 0x7FFF //RX_FDDRC_SLANT_1_1 +265 0x7FFF //RX_FDDRC_SLANT_1_2 +266 0x7FFF //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +286 0x003C //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 +#VOL 4 +163 0x1000 //RX_TDDRC_ALPHA_UP_1 +164 0x1000 //RX_TDDRC_ALPHA_UP_2 +165 0x1000 //RX_TDDRC_ALPHA_UP_3 +166 0x1000 //RX_TDDRC_ALPHA_UP_4 +184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +185 0x4000 //RX_TDDRC_ALPHA_DWN_2 +186 0x4000 //RX_TDDRC_ALPHA_DWN_3 +189 0x4000 //RX_TDDRC_ALPHA_DWN_4 +190 0x7214 //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +269 0x0002 //RX_TDDRC_THRD_0 +270 0x0004 //RX_TDDRC_THRD_1 +271 0x1A00 //RX_TDDRC_THRD_2 +272 0x1A00 //RX_TDDRC_THRD_3 +273 0x7FFF //RX_TDDRC_SLANT_0 +274 0x7FFF //RX_TDDRC_SLANT_1 +275 0x1000 //RX_TDDRC_ALPHA_UP_0 +276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x199A //RX_TDDRC_HMNC_GAIN +279 0x0001 //RX_TDDRC_SMT_FLAG +280 0x0CCD //RX_TDDRC_SMT_W +281 0x0780 //RX_TDDRC_DRC_GAIN +195 0x0014 //RX_FDEQ_SUBNUM +196 0x8080 //RX_FDEQ_GAIN_0 +197 0x8054 //RX_FDEQ_GAIN_1 +198 0x5050 //RX_FDEQ_GAIN_2 +199 0x5058 //RX_FDEQ_GAIN_3 +200 0x5C70 //RX_FDEQ_GAIN_4 +201 0x4848 //RX_FDEQ_GAIN_5 +202 0x484C //RX_FDEQ_GAIN_6 +203 0x4848 //RX_FDEQ_GAIN_7 +204 0x485A //RX_FDEQ_GAIN_8 +205 0x5A58 //RX_FDEQ_GAIN_9 +206 0x4848 //RX_FDEQ_GAIN_10 +207 0x4848 //RX_FDEQ_GAIN_11 +208 0x4848 //RX_FDEQ_GAIN_12 +209 0x4848 //RX_FDEQ_GAIN_13 +210 0x4848 //RX_FDEQ_GAIN_14 +211 0x4848 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0202 //RX_FDEQ_BIN_0 +221 0x0203 //RX_FDEQ_BIN_1 +222 0x0303 //RX_FDEQ_BIN_2 +223 0x0304 //RX_FDEQ_BIN_3 +224 0x0604 //RX_FDEQ_BIN_4 +225 0x0406 //RX_FDEQ_BIN_5 +226 0x0708 //RX_FDEQ_BIN_6 +227 0x090A //RX_FDEQ_BIN_7 +228 0x0B0C //RX_FDEQ_BIN_8 +229 0x0D08 //RX_FDEQ_BIN_9 +230 0x0000 //RX_FDEQ_BIN_10 +231 0x0000 //RX_FDEQ_BIN_11 +232 0x0000 //RX_FDEQ_BIN_12 +233 0x0000 //RX_FDEQ_BIN_13 +234 0x0000 //RX_FDEQ_BIN_14 +235 0x0000 //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x4000 //RX_FDEQ_RESRV_0 +245 0x0320 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0035 //RX_FDDRC_BAND_MARGIN_1 +248 0x0060 //RX_FDDRC_BAND_MARGIN_2 +249 0x0080 //RX_FDDRC_BAND_MARGIN_3 +250 0x0004 //RX_FDDRC_BLOCK_EXP +251 0x0600 //RX_FDDRC_THRD_2_0 +252 0x0600 //RX_FDDRC_THRD_2_1 +253 0x0600 //RX_FDDRC_THRD_2_2 +254 0x0600 //RX_FDDRC_THRD_2_3 +255 0x0800 //RX_FDDRC_THRD_3_0 +256 0x0800 //RX_FDDRC_THRD_3_1 +257 0x0800 //RX_FDDRC_THRD_3_2 +258 0x0800 //RX_FDDRC_THRD_3_3 +259 0x0000 //RX_FDDRC_SLANT_0_0 +260 0x0000 //RX_FDDRC_SLANT_0_1 +261 0x0000 //RX_FDDRC_SLANT_0_2 +262 0x0000 //RX_FDDRC_SLANT_0_3 +263 0x7FFF //RX_FDDRC_SLANT_1_0 +264 0x7FFF //RX_FDDRC_SLANT_1_1 +265 0x7FFF //RX_FDDRC_SLANT_1_2 +266 0x7FFF //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +286 0x0058 //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 +#VOL 5 +163 0x1000 //RX_TDDRC_ALPHA_UP_1 +164 0x1000 //RX_TDDRC_ALPHA_UP_2 +165 0x1000 //RX_TDDRC_ALPHA_UP_3 +166 0x1000 //RX_TDDRC_ALPHA_UP_4 +184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +185 0x4000 //RX_TDDRC_ALPHA_DWN_2 +186 0x4000 //RX_TDDRC_ALPHA_DWN_3 +189 0x4000 //RX_TDDRC_ALPHA_DWN_4 +190 0x7214 //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +269 0x0002 //RX_TDDRC_THRD_0 +270 0x0004 //RX_TDDRC_THRD_1 +271 0x1A00 //RX_TDDRC_THRD_2 +272 0x1A00 //RX_TDDRC_THRD_3 +273 0x7FFF //RX_TDDRC_SLANT_0 +274 0x7FFF //RX_TDDRC_SLANT_1 +275 0x1000 //RX_TDDRC_ALPHA_UP_0 +276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x199A //RX_TDDRC_HMNC_GAIN +279 0x0001 //RX_TDDRC_SMT_FLAG +280 0x0CCD //RX_TDDRC_SMT_W +281 0x0780 //RX_TDDRC_DRC_GAIN +195 0x0014 //RX_FDEQ_SUBNUM +196 0x8080 //RX_FDEQ_GAIN_0 +197 0x8054 //RX_FDEQ_GAIN_1 +198 0x5050 //RX_FDEQ_GAIN_2 +199 0x5058 //RX_FDEQ_GAIN_3 +200 0x5C70 //RX_FDEQ_GAIN_4 +201 0x4848 //RX_FDEQ_GAIN_5 +202 0x484C //RX_FDEQ_GAIN_6 +203 0x4848 //RX_FDEQ_GAIN_7 +204 0x485A //RX_FDEQ_GAIN_8 +205 0x5A58 //RX_FDEQ_GAIN_9 +206 0x4848 //RX_FDEQ_GAIN_10 +207 0x4848 //RX_FDEQ_GAIN_11 +208 0x4848 //RX_FDEQ_GAIN_12 +209 0x4848 //RX_FDEQ_GAIN_13 +210 0x4848 //RX_FDEQ_GAIN_14 +211 0x4848 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0202 //RX_FDEQ_BIN_0 +221 0x0203 //RX_FDEQ_BIN_1 +222 0x0303 //RX_FDEQ_BIN_2 +223 0x0304 //RX_FDEQ_BIN_3 +224 0x0604 //RX_FDEQ_BIN_4 +225 0x0406 //RX_FDEQ_BIN_5 +226 0x0708 //RX_FDEQ_BIN_6 +227 0x090A //RX_FDEQ_BIN_7 +228 0x0B0C //RX_FDEQ_BIN_8 +229 0x0D08 //RX_FDEQ_BIN_9 +230 0x0000 //RX_FDEQ_BIN_10 +231 0x0000 //RX_FDEQ_BIN_11 +232 0x0000 //RX_FDEQ_BIN_12 +233 0x0000 //RX_FDEQ_BIN_13 +234 0x0000 //RX_FDEQ_BIN_14 +235 0x0000 //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x4000 //RX_FDEQ_RESRV_0 +245 0x0320 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0035 //RX_FDDRC_BAND_MARGIN_1 +248 0x0060 //RX_FDDRC_BAND_MARGIN_2 +249 0x0080 //RX_FDDRC_BAND_MARGIN_3 +250 0x0004 //RX_FDDRC_BLOCK_EXP +251 0x0600 //RX_FDDRC_THRD_2_0 +252 0x0600 //RX_FDDRC_THRD_2_1 +253 0x0600 //RX_FDDRC_THRD_2_2 +254 0x0600 //RX_FDDRC_THRD_2_3 +255 0x0800 //RX_FDDRC_THRD_3_0 +256 0x0800 //RX_FDDRC_THRD_3_1 +257 0x0800 //RX_FDDRC_THRD_3_2 +258 0x0800 //RX_FDDRC_THRD_3_3 +259 0x0000 //RX_FDDRC_SLANT_0_0 +260 0x0000 //RX_FDDRC_SLANT_0_1 +261 0x0000 //RX_FDDRC_SLANT_0_2 +262 0x0000 //RX_FDDRC_SLANT_0_3 +263 0x7FFF //RX_FDDRC_SLANT_1_0 +264 0x7FFF //RX_FDDRC_SLANT_1_1 +265 0x7FFF //RX_FDDRC_SLANT_1_2 +266 0x7FFF //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +286 0x0082 //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 +#VOL 6 +163 0x1000 //RX_TDDRC_ALPHA_UP_1 +164 0x1000 //RX_TDDRC_ALPHA_UP_2 +165 0x1000 //RX_TDDRC_ALPHA_UP_3 +166 0x1000 //RX_TDDRC_ALPHA_UP_4 +184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +185 0x4000 //RX_TDDRC_ALPHA_DWN_2 +186 0x4000 //RX_TDDRC_ALPHA_DWN_3 +189 0x4000 //RX_TDDRC_ALPHA_DWN_4 +190 0x7214 //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +269 0x0002 //RX_TDDRC_THRD_0 +270 0x0004 //RX_TDDRC_THRD_1 +271 0x1A00 //RX_TDDRC_THRD_2 +272 0x1A00 //RX_TDDRC_THRD_3 +273 0x7FFF //RX_TDDRC_SLANT_0 +274 0x7FFF //RX_TDDRC_SLANT_1 +275 0x1000 //RX_TDDRC_ALPHA_UP_0 +276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x199A //RX_TDDRC_HMNC_GAIN +279 0x0001 //RX_TDDRC_SMT_FLAG +280 0x0CCD //RX_TDDRC_SMT_W +281 0x0780 //RX_TDDRC_DRC_GAIN +195 0x0014 //RX_FDEQ_SUBNUM +196 0x8080 //RX_FDEQ_GAIN_0 +197 0x8054 //RX_FDEQ_GAIN_1 +198 0x5050 //RX_FDEQ_GAIN_2 +199 0x5058 //RX_FDEQ_GAIN_3 +200 0x5C70 //RX_FDEQ_GAIN_4 +201 0x4848 //RX_FDEQ_GAIN_5 +202 0x484C //RX_FDEQ_GAIN_6 +203 0x4848 //RX_FDEQ_GAIN_7 +204 0x485A //RX_FDEQ_GAIN_8 +205 0x5A58 //RX_FDEQ_GAIN_9 +206 0x4848 //RX_FDEQ_GAIN_10 +207 0x4848 //RX_FDEQ_GAIN_11 +208 0x4848 //RX_FDEQ_GAIN_12 +209 0x4848 //RX_FDEQ_GAIN_13 +210 0x4848 //RX_FDEQ_GAIN_14 +211 0x4848 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0202 //RX_FDEQ_BIN_0 +221 0x0203 //RX_FDEQ_BIN_1 +222 0x0303 //RX_FDEQ_BIN_2 +223 0x0304 //RX_FDEQ_BIN_3 +224 0x0604 //RX_FDEQ_BIN_4 +225 0x0406 //RX_FDEQ_BIN_5 +226 0x0708 //RX_FDEQ_BIN_6 +227 0x090A //RX_FDEQ_BIN_7 +228 0x0B0C //RX_FDEQ_BIN_8 +229 0x0D08 //RX_FDEQ_BIN_9 +230 0x0000 //RX_FDEQ_BIN_10 +231 0x0000 //RX_FDEQ_BIN_11 +232 0x0000 //RX_FDEQ_BIN_12 +233 0x0000 //RX_FDEQ_BIN_13 +234 0x0000 //RX_FDEQ_BIN_14 +235 0x0000 //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x4000 //RX_FDEQ_RESRV_0 +245 0x0320 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0035 //RX_FDDRC_BAND_MARGIN_1 +248 0x0060 //RX_FDDRC_BAND_MARGIN_2 +249 0x0080 //RX_FDDRC_BAND_MARGIN_3 +250 0x0004 //RX_FDDRC_BLOCK_EXP +251 0x0600 //RX_FDDRC_THRD_2_0 +252 0x0600 //RX_FDDRC_THRD_2_1 +253 0x0600 //RX_FDDRC_THRD_2_2 +254 0x0600 //RX_FDDRC_THRD_2_3 +255 0x0800 //RX_FDDRC_THRD_3_0 +256 0x0800 //RX_FDDRC_THRD_3_1 +257 0x0800 //RX_FDDRC_THRD_3_2 +258 0x0800 //RX_FDDRC_THRD_3_3 +259 0x0000 //RX_FDDRC_SLANT_0_0 +260 0x0000 //RX_FDDRC_SLANT_0_1 +261 0x0000 //RX_FDDRC_SLANT_0_2 +262 0x0000 //RX_FDDRC_SLANT_0_3 +263 0x7FFF //RX_FDDRC_SLANT_1_0 +264 0x7FFF //RX_FDDRC_SLANT_1_1 +265 0x7FFF //RX_FDDRC_SLANT_1_2 +266 0x7FFF //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +286 0x0100 //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 -#CASE_NAME HANDSFREE-HANDSFREE-VOICE_GENERIC-WB -#PARAM_TYPE TX+RX -#TOTAL_CUSTOM_STEP 7 +#CASE_NAME HANDSFREE-HANDFREE-VOICE_GENERIC-WB +#PARAM_MODE FULL +#PARAM_TYPE TX+2RX +#TOTAL_CUSTOM_STEP 7+7 #TX 0 0x0001 //TX_OPERATION_MODE_0 1 0x0001 //TX_OPERATION_MODE_1 @@ -7169,7 +10838,7 @@ 147 0x0300 //TX_AEC_REF_GAIN_0 148 0x0800 //TX_AEC_REF_GAIN_1 149 0x0800 //TX_AEC_REF_GAIN_2 -150 0x6800 //TX_EAD_THR +150 0x6C00 //TX_EAD_THR 151 0x1000 //TX_THR_RE_EST 152 0x0200 //TX_MIN_EQ_RE_EST_0 153 0x0100 //TX_MIN_EQ_RE_EST_1 @@ -7242,18 +10911,18 @@ 220 0x0000 //TX_DTD_MIC_BLK 221 0x023E //TX_ADPT_STRICT_L 222 0x023E //TX_ADPT_STRICT_H -223 0x0BB8 //TX_RATIO_DT_L_TH_LOW +223 0x03E8 //TX_RATIO_DT_L_TH_LOW 224 0x3A98 //TX_RATIO_DT_H_TH_LOW -225 0x1770 //TX_RATIO_DT_L_TH_HIGH +225 0x0578 //TX_RATIO_DT_L_TH_HIGH 226 0x4E20 //TX_RATIO_DT_H_TH_HIGH -227 0x09C4 //TX_RATIO_DT_L0_TH -228 0x2000 //TX_B_POST_FILT_ECHO_L +227 0x0001 //TX_RATIO_DT_L0_TH +228 0x7FFF //TX_B_POST_FILT_ECHO_L 229 0x7FFF //TX_B_POST_FILT_ECHO_H 230 0x0200 //TX_MIN_G_CTRL_ECHO 231 0x1000 //TX_B_LESSCUT_RTO_ECHO 232 0x0000 //TX_EPD_OFFSET_00 233 0x0000 //TX_EPD_OFFST_01 -234 0x1388 //TX_RATIO_DT_L0_TH_HIGH +234 0x03E8 //TX_RATIO_DT_L0_TH_HIGH 235 0x7FFF //TX_RATIO_DT_H_TH_CUT 236 0x7FFF //TX_MIN_EQ_RE_EST_13 237 0x0000 //TX_DTD_THR1_7 @@ -7270,11 +10939,11 @@ 248 0xF800 //TX_THR_SN_EST_6 249 0xF800 //TX_THR_SN_EST_7 250 0x0100 //TX_DELTA_THR_SN_EST_0 -251 0x0200 //TX_DELTA_THR_SN_EST_1 -252 0x0100 //TX_DELTA_THR_SN_EST_2 -253 0x0200 //TX_DELTA_THR_SN_EST_3 +251 0x0100 //TX_DELTA_THR_SN_EST_1 +252 0x0200 //TX_DELTA_THR_SN_EST_2 +253 0x0100 //TX_DELTA_THR_SN_EST_3 254 0x0100 //TX_DELTA_THR_SN_EST_4 -255 0x0100 //TX_DELTA_THR_SN_EST_5 +255 0x0200 //TX_DELTA_THR_SN_EST_5 256 0x0200 //TX_DELTA_THR_SN_EST_6 257 0x0200 //TX_DELTA_THR_SN_EST_7 258 0x4000 //TX_LAMBDA_NN_EST_0 @@ -7302,11 +10971,11 @@ 280 0x1000 //TX_B_POST_FLT_1 281 0x0010 //TX_NS_LVL_CTRL_0 282 0x0014 //TX_NS_LVL_CTRL_1 -283 0x0014 //TX_NS_LVL_CTRL_2 -284 0x0018 //TX_NS_LVL_CTRL_3 -285 0x0016 //TX_NS_LVL_CTRL_4 -286 0x0014 //TX_NS_LVL_CTRL_5 -287 0x0011 //TX_NS_LVL_CTRL_6 +283 0x0018 //TX_NS_LVL_CTRL_2 +284 0x0016 //TX_NS_LVL_CTRL_3 +285 0x0014 //TX_NS_LVL_CTRL_4 +286 0x0011 //TX_NS_LVL_CTRL_5 +287 0x0014 //TX_NS_LVL_CTRL_6 288 0x0011 //TX_NS_LVL_CTRL_7 289 0x000F //TX_MIN_GAIN_S_0 290 0x0010 //TX_MIN_GAIN_S_1 @@ -7324,8 +10993,8 @@ 302 0x4000 //TX_SNRI_SUP_2 303 0x4000 //TX_SNRI_SUP_3 304 0x4000 //TX_SNRI_SUP_4 -305 0x4000 //TX_SNRI_SUP_5 -306 0x50C0 //TX_SNRI_SUP_6 +305 0x50C0 //TX_SNRI_SUP_5 +306 0x4000 //TX_SNRI_SUP_6 307 0x7FFF //TX_SNRI_SUP_7 308 0x7FFF //TX_THR_LFNS 309 0x0018 //TX_G_LFNS @@ -7334,19 +11003,19 @@ 312 0x7FFF //TX_A_POST_FILT_0 313 0x2000 //TX_A_POST_FILT_1 314 0x5000 //TX_A_POST_FILT_S_0 -315 0x6000 //TX_A_POST_FILT_S_1 -316 0x4C00 //TX_A_POST_FILT_S_2 -317 0x4000 //TX_A_POST_FILT_S_3 -318 0x6000 //TX_A_POST_FILT_S_4 -319 0x4000 //TX_A_POST_FILT_S_5 -320 0x5000 //TX_A_POST_FILT_S_6 +315 0x4C00 //TX_A_POST_FILT_S_1 +316 0x4000 //TX_A_POST_FILT_S_2 +317 0x6000 //TX_A_POST_FILT_S_3 +318 0x4000 //TX_A_POST_FILT_S_4 +319 0x5000 //TX_A_POST_FILT_S_5 +320 0x6000 //TX_A_POST_FILT_S_6 321 0x7000 //TX_A_POST_FILT_S_7 322 0x2000 //TX_B_POST_FILT_0 -323 0x1000 //TX_B_POST_FILT_1 +323 0x2000 //TX_B_POST_FILT_1 324 0x2000 //TX_B_POST_FILT_2 -325 0x2000 //TX_B_POST_FILT_3 +325 0x4000 //TX_B_POST_FILT_3 326 0x4000 //TX_B_POST_FILT_4 -327 0x4000 //TX_B_POST_FILT_5 +327 0x1000 //TX_B_POST_FILT_5 328 0x1000 //TX_B_POST_FILT_6 329 0x2000 //TX_B_POST_FILT_7 330 0x4000 //TX_B_LESSCUT_RTO_S_0 @@ -7354,14 +11023,14 @@ 332 0x7FFF //TX_B_LESSCUT_RTO_S_2 333 0x7FFF //TX_B_LESSCUT_RTO_S_3 334 0x7FFF //TX_B_LESSCUT_RTO_S_4 -335 0x7FFF //TX_B_LESSCUT_RTO_S_5 -336 0x6000 //TX_B_LESSCUT_RTO_S_6 +335 0x6000 //TX_B_LESSCUT_RTO_S_5 +336 0x7FFF //TX_B_LESSCUT_RTO_S_6 337 0x7FFF //TX_B_LESSCUT_RTO_S_7 338 0x7C00 //TX_LAMBDA_PFILT 339 0x7C00 //TX_LAMBDA_PFILT_S_0 340 0x7C00 //TX_LAMBDA_PFILT_S_1 -341 0x7C00 //TX_LAMBDA_PFILT_S_2 -342 0x7A00 //TX_LAMBDA_PFILT_S_3 +341 0x7A00 //TX_LAMBDA_PFILT_S_2 +342 0x7C00 //TX_LAMBDA_PFILT_S_3 343 0x7C00 //TX_LAMBDA_PFILT_S_4 344 0x7C00 //TX_LAMBDA_PFILT_S_5 345 0x7C00 //TX_LAMBDA_PFILT_S_6 @@ -7399,10 +11068,10 @@ 377 0x7FFF //TX_NOISE_TH_5_4 378 0x0F0A //TX_NOISE_TH_6 379 0x0033 //TX_MINENOISE_TH -380 0x4000 //TX_MINENOISE_MIC0_TH_MTS -381 0xFFEE //TX_MINENOISE_MIC0_TH_EXP -382 0x6000 //TX_MINENOISE_MIC0_S_TH_MTS -383 0xFFF3 //TX_MINENOISE_MIC0_S_TH_EXP +380 0xD508 //TX_MORENS_TFMASK_TH +381 0x0001 //TX_DRC_QUIET_FLOOR +382 0x7999 //TX_RATIODTL_CUT_TH +383 0x0119 //TX_DT_CUT_K1 384 0x0666 //TX_OUT_ENER_S_TH_CLEAN 385 0x0666 //TX_OUT_ENER_S_TH_LESSCLEAN 386 0x0333 //TX_OUT_ENER_S_TH_NOISY @@ -7410,15 +11079,15 @@ 388 0x0333 //TX_OUT_ENER_TH_SPEECH 389 0x2000 //TX_SN_NPB_GAIN 390 0x0000 //TX_NN_NPB_GAIN -391 0x0000 //TX_CSX_ALPHA_0 -392 0x0000 //TX_CSX_ALPHA_1 -393 0x0000 //TX_CSX_ALPHA_2 -394 0x0000 //TX_CSX_ALPHA_3 -395 0x0800 //TX_MU_ARSP_EST -396 0x00C8 //TX_P_OUTBEAM_MIN_TH +391 0x7FFF //TX_POST_MASK_SUP_HSNE +392 0x7FFF //TX_TAIL_DET_TH +393 0x4000 //TX_B_LESSCUT_RTO_WTA +394 0x0000 //TX_MEL_G_R +395 0x0080 //TX_SUPHIGH_TH +396 0x0000 //TX_MASK_G_R 397 0x0002 //TX_EXTRA_NS_L -398 0x0800 //TX_EXTRA_NS_A -399 0x0005 //TX_VR_NOISE_FLOOR_TH +398 0x1800 //TX_C_POST_FLT_MASK +399 0x4000 //TX_A_POST_FLT_WNS 400 0x0148 //TX_MIN_G_LOW300HZ 401 0x0001 //TX_MAXLEVEL_CNG 402 0x00B4 //TX_STN_NOISE_TH @@ -7528,21 +11197,21 @@ 506 0x2000 //TX_RADIODTLV 507 0x0320 //TX_POWER_LINEIN_TH 508 0x0014 //TX_FE_VADCOUNT_TH_FC -509 0x0000 //TX_ECHO_SUPP_FC +509 0x000A //TX_ECHO_SUPP_FC 510 0x0C80 //TX_ECHO_TH 511 0x6666 //TX_MIC_TO_BFGAIN 512 0x0000 //TX_MICTOBFGAIN0 513 0x0000 //TX_FASTMUE_TH -514 0x0000 //TX_DERVB_LEN_0 -515 0x0000 //TX_DERVB_LEN_1 -516 0x0000 //TX_RHO_DERVB -517 0x0000 //TX_MIC_INDX_DERVB -518 0x0000 //TX_MU_DERVB -519 0x0000 //TX_DR_RESRV_0 -520 0x0000 //TX_DR_RESRV_1 -521 0x0000 //TX_DR_RESRV_2 -522 0x0000 //TX_DR_RESRV_3 -523 0x0000 //TX_DR_RESRV_4 +514 0x3000 //TX_DEREVERB_LF_MU +515 0x34CD //TX_DEREVERB_HF_MU +516 0x0007 //TX_DEREVERB_DELAY +517 0x0004 //TX_DEREVERB_COEF_LEN +518 0x0003 //TX_DEREVERB_DNR +519 0x0000 //TX_DEREVERB_ALPHA +520 0x0000 //TX_DEREVERB_BETA +521 0x3A98 //TX_GSC_RTOL_TH +522 0x3A98 //TX_GSC_RTOH_TH +523 0x7E2C //TX_WIDE2_MEANHTH 524 0x0000 //TX_DR_RESRV_5 525 0x0000 //TX_DR_RESRV_6 526 0x0000 //TX_DR_RESRV_7 @@ -7910,14 +11579,79 @@ 888 0x0028 //TX_FASTNS_ARSPC_TH 889 0xC000 //TX_FASTNS_MASK5_TH 890 0x4848 //TX_POSTSSA_MIN_G_VR_MASK -891 0x1000 //TX_A_LESSCUT_RTO_MASK +891 0x4000 //TX_A_LESSCUT_RTO_MASK 892 0x1770 //TX_FASTNS_NOISETH 893 0xC000 //TX_FASTNS_SSA_THLFL 894 0xC000 //TX_FASTNS_SSA_THHFL 895 0xCCCC //TX_FASTNS_SSA_THLFH 896 0xD999 //TX_FASTNS_SSA_THHFH +897 0x2339 //TX_SENDFUNC_REG_MICMUTE +898 0x0021 //TX_SENDFUNC_REG_MICMUTE1 +899 0x02BC //TX_MICMUTE_RATIO_THR +900 0x0140 //TX_MICMUTE_AMP_THR +901 0x0004 //TX_MICMUTE_HPF_IND +902 0x00C0 //TX_MICMUTE_LOG_EYR_TH +903 0x0008 //TX_MICMUTE_CVG_TIME +904 0x0008 //TX_MICMUTE_RELEASE_TIME +905 0x01FE //TX_MIC_VOLUME_MIC0MUTE +906 0x0020 //TX_MICMUTE_EPD_OFFSET_0 +907 0x001E //TX_MICMUTE_FRQ_AEC_L +908 0x7999 //TX_MICMUTE_EAD_THR +909 0x7FFF //TX_MICMUTE_LAMBDA_CB_NLE +910 0x7FFF //TX_MICMUTE_LAMBDA_RE_EST +911 0x4000 //TX_DTD_THR1_MICMUTE_0 +912 0x7000 //TX_DTD_THR1_MICMUTE_1 +913 0x7FFF //TX_DTD_THR1_MICMUTE_2 +914 0x7FFF //TX_DTD_THR1_MICMUTE_3 +915 0x6CCC //TX_DTD_THR2_MICMUTE_0 +916 0x0400 //TX_MICMUTE_MIN_EQ_RE_EST_0 +917 0x0400 //TX_MICMUTE_MIN_EQ_RE_EST_1 +918 0x1000 //TX_MICMUTE_MIN_EQ_RE_EST_2 +919 0x7FFF //TX_MICMUTE_MIN_EQ_RE_EST_3 +920 0x7FFF //TX_MICMUTE_MIN_EQ_RE_EST_4 +921 0x4000 //TX_MICMUTE_C_POST_FLT +922 0x03E8 //TX_MICMUTE_DT_CUT_K +923 0x0001 //TX_MICMUTE_DT_CUT_THR +924 0x03E8 //TX_MICMUTE_DT_CUT_K2 +925 0x0001 //TX_MICMUTE_DT_CUT_THR2 +926 0x0064 //TX_MICMUTE_DT2_HOLD_N +927 0x1000 //TX_MICMUTE_RATIODTH_THCUT +928 0x1000 //TX_MICMUTE_B_POST_FLT_ECHOL +929 0x7FFF //TX_MICMUTE_B_POST_FLT_ECHOH +930 0x0400 //TX_MICMUTE_C_POST_FLT_MASK +931 0x7999 //TX_MICMUTE_RATIODTL_CUT_TH +932 0x0258 //TX_MICMUTE_DT_CUT_K1 +933 0x0800 //TX_MICMUTE_N2_SN_EST +934 0xFC00 //TX_MICMUTE_THR_SN_EST_0 +935 0x001C //TX_MICMUTE_MIN_G_CTRL_0 +936 0x6000 //TX_MICMUTE_A_POST_FILT_S_0 +937 0x7000 //TX_MICMUTE_B_POST_FILT_0 +938 0x2710 //TX_MIC1RUB_AMP_THR +939 0x0010 //TX_MIC1MUTE_RATIO_THR +940 0x0450 //TX_MIC1MUTE_AMP_THR +941 0x0008 //TX_MIC1MUTE_CVG_TIME +942 0x0008 //TX_MIC1MUTE_RELEASE_TIME +943 0x0000 //TX_AMS_RESRV_01 +944 0x0000 //TX_AMS_RESRV_02 +945 0x0000 //TX_AMS_RESRV_03 +946 0x0000 //TX_AMS_RESRV_04 +947 0x0000 //TX_AMS_RESRV_05 +948 0x0000 //TX_AMS_RESRV_06 +949 0x0000 //TX_AMS_RESRV_07 +950 0x0000 //TX_AMS_RESRV_08 +951 0x0000 //TX_AMS_RESRV_09 +952 0x0000 //TX_AMS_RESRV_10 +953 0x0000 //TX_AMS_RESRV_11 +954 0x0000 //TX_AMS_RESRV_12 +955 0x0000 //TX_AMS_RESRV_13 +956 0x0000 //TX_AMS_RESRV_14 +957 0x0000 //TX_AMS_RESRV_15 +958 0x0000 //TX_AMS_RESRV_16 +959 0x0000 //TX_AMS_RESRV_17 +960 0x0000 //TX_AMS_RESRV_18 +961 0x0000 //TX_AMS_RESRV_19 #RX -0 0x027C //RX_RECVFUNC_MODE_0 +0 0x206C //RX_RECVFUNC_MODE_0 1 0x0000 //RX_RECVFUNC_MODE_1 2 0x0001 //RX_SAMPLINGFREQ_SIG 3 0x0001 //RX_SAMPLINGFREQ_PROC @@ -7956,20 +11690,20 @@ 36 0x0000 //RX_LMT_THRD 37 0x4000 //RX_LMT_ALPHA 38 0x001C //RX_FDEQ_SUBNUM -39 0x6868 //RX_FDEQ_GAIN_0 -40 0x6858 //RX_FDEQ_GAIN_1 -41 0x5858 //RX_FDEQ_GAIN_2 -42 0x5858 //RX_FDEQ_GAIN_3 -43 0x5C5C //RX_FDEQ_GAIN_4 -44 0x5C54 //RX_FDEQ_GAIN_5 -45 0x544C //RX_FDEQ_GAIN_6 -46 0x4A48 //RX_FDEQ_GAIN_7 -47 0x4860 //RX_FDEQ_GAIN_8 -48 0x6068 //RX_FDEQ_GAIN_9 -49 0x6C6C //RX_FDEQ_GAIN_10 -50 0x6C68 //RX_FDEQ_GAIN_11 -51 0x5A5A //RX_FDEQ_GAIN_12 -52 0x5A5C //RX_FDEQ_GAIN_13 +39 0x4848 //RX_FDEQ_GAIN_0 +40 0x4844 //RX_FDEQ_GAIN_1 +41 0x3E3B //RX_FDEQ_GAIN_2 +42 0x4143 //RX_FDEQ_GAIN_3 +43 0x4348 //RX_FDEQ_GAIN_4 +44 0x4848 //RX_FDEQ_GAIN_5 +45 0x4848 //RX_FDEQ_GAIN_6 +46 0x4848 //RX_FDEQ_GAIN_7 +47 0x4848 //RX_FDEQ_GAIN_8 +48 0x4848 //RX_FDEQ_GAIN_9 +49 0x4848 //RX_FDEQ_GAIN_10 +50 0x4E56 //RX_FDEQ_GAIN_11 +51 0x595C //RX_FDEQ_GAIN_12 +52 0x5959 //RX_FDEQ_GAIN_13 53 0x4848 //RX_FDEQ_GAIN_14 54 0x4848 //RX_FDEQ_GAIN_15 55 0x4848 //RX_FDEQ_GAIN_16 @@ -8041,12 +11775,12 @@ 121 0x199A //RX_TDDRC_HMNC_GAIN 122 0x0001 //RX_TDDRC_SMT_FLAG 123 0x0CCD //RX_TDDRC_SMT_W -124 0x0715 //RX_TDDRC_DRC_GAIN +124 0x0284 //RX_TDDRC_DRC_GAIN 125 0x7C00 //RX_LAMBDA_PKA_FP 126 0x2000 //RX_TPKA_FP 127 0x2000 //RX_MIN_G_FP 128 0x0080 //RX_MAX_G_FP -129 0x0011 //RX_SPK_VOL +129 0x0100 //RX_SPK_VOL 130 0x0000 //RX_VOL_RESRV_0 131 0x0000 //RX_MAXLEVEL_CNG 132 0x3000 //RX_BWE_UV_TH @@ -8097,22 +11831,22 @@ 121 0x199A //RX_TDDRC_HMNC_GAIN 122 0x0001 //RX_TDDRC_SMT_FLAG 123 0x0CCD //RX_TDDRC_SMT_W -124 0x0715 //RX_TDDRC_DRC_GAIN +124 0x0284 //RX_TDDRC_DRC_GAIN 38 0x001C //RX_FDEQ_SUBNUM -39 0x6868 //RX_FDEQ_GAIN_0 -40 0x6858 //RX_FDEQ_GAIN_1 -41 0x5858 //RX_FDEQ_GAIN_2 -42 0x5858 //RX_FDEQ_GAIN_3 -43 0x5C5C //RX_FDEQ_GAIN_4 -44 0x5C54 //RX_FDEQ_GAIN_5 -45 0x544C //RX_FDEQ_GAIN_6 -46 0x4A48 //RX_FDEQ_GAIN_7 -47 0x4860 //RX_FDEQ_GAIN_8 -48 0x6068 //RX_FDEQ_GAIN_9 -49 0x6C6C //RX_FDEQ_GAIN_10 -50 0x6C68 //RX_FDEQ_GAIN_11 -51 0x5A5A //RX_FDEQ_GAIN_12 -52 0x5A5C //RX_FDEQ_GAIN_13 +39 0x4848 //RX_FDEQ_GAIN_0 +40 0x4844 //RX_FDEQ_GAIN_1 +41 0x3E3B //RX_FDEQ_GAIN_2 +42 0x4143 //RX_FDEQ_GAIN_3 +43 0x4348 //RX_FDEQ_GAIN_4 +44 0x4848 //RX_FDEQ_GAIN_5 +45 0x4848 //RX_FDEQ_GAIN_6 +46 0x4848 //RX_FDEQ_GAIN_7 +47 0x4848 //RX_FDEQ_GAIN_8 +48 0x4848 //RX_FDEQ_GAIN_9 +49 0x4848 //RX_FDEQ_GAIN_10 +50 0x4E56 //RX_FDEQ_GAIN_11 +51 0x595C //RX_FDEQ_GAIN_12 +52 0x5959 //RX_FDEQ_GAIN_13 53 0x4848 //RX_FDEQ_GAIN_14 54 0x4848 //RX_FDEQ_GAIN_15 55 0x4848 //RX_FDEQ_GAIN_16 @@ -8196,22 +11930,22 @@ 121 0x199A //RX_TDDRC_HMNC_GAIN 122 0x0001 //RX_TDDRC_SMT_FLAG 123 0x0CCD //RX_TDDRC_SMT_W -124 0x0715 //RX_TDDRC_DRC_GAIN +124 0x0284 //RX_TDDRC_DRC_GAIN 38 0x001C //RX_FDEQ_SUBNUM -39 0x6868 //RX_FDEQ_GAIN_0 -40 0x6858 //RX_FDEQ_GAIN_1 -41 0x5858 //RX_FDEQ_GAIN_2 -42 0x5858 //RX_FDEQ_GAIN_3 -43 0x5C5C //RX_FDEQ_GAIN_4 -44 0x5C54 //RX_FDEQ_GAIN_5 -45 0x544C //RX_FDEQ_GAIN_6 -46 0x4A48 //RX_FDEQ_GAIN_7 -47 0x4860 //RX_FDEQ_GAIN_8 -48 0x6068 //RX_FDEQ_GAIN_9 -49 0x6C6C //RX_FDEQ_GAIN_10 -50 0x6C68 //RX_FDEQ_GAIN_11 -51 0x5A5A //RX_FDEQ_GAIN_12 -52 0x5A5C //RX_FDEQ_GAIN_13 +39 0x4848 //RX_FDEQ_GAIN_0 +40 0x4844 //RX_FDEQ_GAIN_1 +41 0x3E3B //RX_FDEQ_GAIN_2 +42 0x4143 //RX_FDEQ_GAIN_3 +43 0x4348 //RX_FDEQ_GAIN_4 +44 0x4848 //RX_FDEQ_GAIN_5 +45 0x4848 //RX_FDEQ_GAIN_6 +46 0x4848 //RX_FDEQ_GAIN_7 +47 0x4848 //RX_FDEQ_GAIN_8 +48 0x4848 //RX_FDEQ_GAIN_9 +49 0x4848 //RX_FDEQ_GAIN_10 +50 0x4E56 //RX_FDEQ_GAIN_11 +51 0x595C //RX_FDEQ_GAIN_12 +52 0x5959 //RX_FDEQ_GAIN_13 53 0x4848 //RX_FDEQ_GAIN_14 54 0x4848 //RX_FDEQ_GAIN_15 55 0x4848 //RX_FDEQ_GAIN_16 @@ -8295,22 +12029,22 @@ 121 0x199A //RX_TDDRC_HMNC_GAIN 122 0x0001 //RX_TDDRC_SMT_FLAG 123 0x0CCD //RX_TDDRC_SMT_W -124 0x0715 //RX_TDDRC_DRC_GAIN +124 0x0284 //RX_TDDRC_DRC_GAIN 38 0x001C //RX_FDEQ_SUBNUM -39 0x6868 //RX_FDEQ_GAIN_0 -40 0x6858 //RX_FDEQ_GAIN_1 -41 0x5858 //RX_FDEQ_GAIN_2 -42 0x5858 //RX_FDEQ_GAIN_3 -43 0x5C5C //RX_FDEQ_GAIN_4 -44 0x5C54 //RX_FDEQ_GAIN_5 -45 0x544C //RX_FDEQ_GAIN_6 -46 0x4A48 //RX_FDEQ_GAIN_7 -47 0x4860 //RX_FDEQ_GAIN_8 -48 0x6068 //RX_FDEQ_GAIN_9 -49 0x6C6C //RX_FDEQ_GAIN_10 -50 0x6C68 //RX_FDEQ_GAIN_11 -51 0x5A5A //RX_FDEQ_GAIN_12 -52 0x5A5C //RX_FDEQ_GAIN_13 +39 0x4848 //RX_FDEQ_GAIN_0 +40 0x4844 //RX_FDEQ_GAIN_1 +41 0x3E3B //RX_FDEQ_GAIN_2 +42 0x4143 //RX_FDEQ_GAIN_3 +43 0x4348 //RX_FDEQ_GAIN_4 +44 0x4848 //RX_FDEQ_GAIN_5 +45 0x4848 //RX_FDEQ_GAIN_6 +46 0x4848 //RX_FDEQ_GAIN_7 +47 0x4848 //RX_FDEQ_GAIN_8 +48 0x4848 //RX_FDEQ_GAIN_9 +49 0x4848 //RX_FDEQ_GAIN_10 +50 0x4E56 //RX_FDEQ_GAIN_11 +51 0x595C //RX_FDEQ_GAIN_12 +52 0x5959 //RX_FDEQ_GAIN_13 53 0x4848 //RX_FDEQ_GAIN_14 54 0x4848 //RX_FDEQ_GAIN_15 55 0x4848 //RX_FDEQ_GAIN_16 @@ -8394,22 +12128,22 @@ 121 0x199A //RX_TDDRC_HMNC_GAIN 122 0x0001 //RX_TDDRC_SMT_FLAG 123 0x0CCD //RX_TDDRC_SMT_W -124 0x0715 //RX_TDDRC_DRC_GAIN +124 0x0284 //RX_TDDRC_DRC_GAIN 38 0x001C //RX_FDEQ_SUBNUM -39 0x6868 //RX_FDEQ_GAIN_0 -40 0x6858 //RX_FDEQ_GAIN_1 -41 0x5858 //RX_FDEQ_GAIN_2 -42 0x5858 //RX_FDEQ_GAIN_3 -43 0x5C5C //RX_FDEQ_GAIN_4 -44 0x5C54 //RX_FDEQ_GAIN_5 -45 0x544C //RX_FDEQ_GAIN_6 -46 0x4A48 //RX_FDEQ_GAIN_7 -47 0x4860 //RX_FDEQ_GAIN_8 -48 0x6068 //RX_FDEQ_GAIN_9 -49 0x6C6C //RX_FDEQ_GAIN_10 -50 0x6C68 //RX_FDEQ_GAIN_11 -51 0x5A5A //RX_FDEQ_GAIN_12 -52 0x5A5C //RX_FDEQ_GAIN_13 +39 0x4848 //RX_FDEQ_GAIN_0 +40 0x4844 //RX_FDEQ_GAIN_1 +41 0x3E3B //RX_FDEQ_GAIN_2 +42 0x4143 //RX_FDEQ_GAIN_3 +43 0x4348 //RX_FDEQ_GAIN_4 +44 0x4848 //RX_FDEQ_GAIN_5 +45 0x4848 //RX_FDEQ_GAIN_6 +46 0x4848 //RX_FDEQ_GAIN_7 +47 0x4848 //RX_FDEQ_GAIN_8 +48 0x4848 //RX_FDEQ_GAIN_9 +49 0x4848 //RX_FDEQ_GAIN_10 +50 0x4E56 //RX_FDEQ_GAIN_11 +51 0x595C //RX_FDEQ_GAIN_12 +52 0x5959 //RX_FDEQ_GAIN_13 53 0x4848 //RX_FDEQ_GAIN_14 54 0x4848 //RX_FDEQ_GAIN_15 55 0x4848 //RX_FDEQ_GAIN_16 @@ -8493,22 +12227,22 @@ 121 0x199A //RX_TDDRC_HMNC_GAIN 122 0x0001 //RX_TDDRC_SMT_FLAG 123 0x0CCD //RX_TDDRC_SMT_W -124 0x0715 //RX_TDDRC_DRC_GAIN +124 0x0284 //RX_TDDRC_DRC_GAIN 38 0x001C //RX_FDEQ_SUBNUM -39 0x6868 //RX_FDEQ_GAIN_0 -40 0x6858 //RX_FDEQ_GAIN_1 -41 0x5858 //RX_FDEQ_GAIN_2 -42 0x5858 //RX_FDEQ_GAIN_3 -43 0x5C5C //RX_FDEQ_GAIN_4 -44 0x8854 //RX_FDEQ_GAIN_5 -45 0x5448 //RX_FDEQ_GAIN_6 +39 0x4848 //RX_FDEQ_GAIN_0 +40 0x4844 //RX_FDEQ_GAIN_1 +41 0x3E3B //RX_FDEQ_GAIN_2 +42 0x4143 //RX_FDEQ_GAIN_3 +43 0x4348 //RX_FDEQ_GAIN_4 +44 0x4848 //RX_FDEQ_GAIN_5 +45 0x4848 //RX_FDEQ_GAIN_6 46 0x4848 //RX_FDEQ_GAIN_7 -47 0x4860 //RX_FDEQ_GAIN_8 -48 0x6068 //RX_FDEQ_GAIN_9 -49 0x7070 //RX_FDEQ_GAIN_10 -50 0x8070 //RX_FDEQ_GAIN_11 -51 0x6060 //RX_FDEQ_GAIN_12 -52 0x7070 //RX_FDEQ_GAIN_13 +47 0x4848 //RX_FDEQ_GAIN_8 +48 0x4848 //RX_FDEQ_GAIN_9 +49 0x4848 //RX_FDEQ_GAIN_10 +50 0x4E56 //RX_FDEQ_GAIN_11 +51 0x595C //RX_FDEQ_GAIN_12 +52 0x5959 //RX_FDEQ_GAIN_13 53 0x4848 //RX_FDEQ_GAIN_14 54 0x4848 //RX_FDEQ_GAIN_15 55 0x4848 //RX_FDEQ_GAIN_16 @@ -8592,22 +12326,22 @@ 121 0x199A //RX_TDDRC_HMNC_GAIN 122 0x0001 //RX_TDDRC_SMT_FLAG 123 0x0CCD //RX_TDDRC_SMT_W -124 0x0715 //RX_TDDRC_DRC_GAIN +124 0x0284 //RX_TDDRC_DRC_GAIN 38 0x001C //RX_FDEQ_SUBNUM -39 0x6868 //RX_FDEQ_GAIN_0 -40 0x6858 //RX_FDEQ_GAIN_1 -41 0x5858 //RX_FDEQ_GAIN_2 -42 0x5858 //RX_FDEQ_GAIN_3 -43 0x5C5C //RX_FDEQ_GAIN_4 -44 0x8854 //RX_FDEQ_GAIN_5 -45 0x5448 //RX_FDEQ_GAIN_6 +39 0x4848 //RX_FDEQ_GAIN_0 +40 0x4844 //RX_FDEQ_GAIN_1 +41 0x3E3B //RX_FDEQ_GAIN_2 +42 0x4143 //RX_FDEQ_GAIN_3 +43 0x4348 //RX_FDEQ_GAIN_4 +44 0x4848 //RX_FDEQ_GAIN_5 +45 0x4848 //RX_FDEQ_GAIN_6 46 0x4848 //RX_FDEQ_GAIN_7 -47 0x4860 //RX_FDEQ_GAIN_8 -48 0x6068 //RX_FDEQ_GAIN_9 -49 0x7070 //RX_FDEQ_GAIN_10 -50 0x8070 //RX_FDEQ_GAIN_11 -51 0x6060 //RX_FDEQ_GAIN_12 -52 0x7070 //RX_FDEQ_GAIN_13 +47 0x4848 //RX_FDEQ_GAIN_8 +48 0x4848 //RX_FDEQ_GAIN_9 +49 0x4848 //RX_FDEQ_GAIN_10 +50 0x4E56 //RX_FDEQ_GAIN_11 +51 0x595C //RX_FDEQ_GAIN_12 +52 0x5959 //RX_FDEQ_GAIN_13 53 0x4848 //RX_FDEQ_GAIN_14 54 0x4848 //RX_FDEQ_GAIN_15 55 0x4848 //RX_FDEQ_GAIN_16 @@ -8691,22 +12425,22 @@ 121 0x199A //RX_TDDRC_HMNC_GAIN 122 0x0001 //RX_TDDRC_SMT_FLAG 123 0x0CCD //RX_TDDRC_SMT_W -124 0x0715 //RX_TDDRC_DRC_GAIN +124 0x0284 //RX_TDDRC_DRC_GAIN 38 0x001C //RX_FDEQ_SUBNUM -39 0x6868 //RX_FDEQ_GAIN_0 -40 0x6864 //RX_FDEQ_GAIN_1 -41 0x7070 //RX_FDEQ_GAIN_2 -42 0x6058 //RX_FDEQ_GAIN_3 -43 0x5C5C //RX_FDEQ_GAIN_4 -44 0x8854 //RX_FDEQ_GAIN_5 -45 0x5448 //RX_FDEQ_GAIN_6 +39 0x4848 //RX_FDEQ_GAIN_0 +40 0x4844 //RX_FDEQ_GAIN_1 +41 0x3E3B //RX_FDEQ_GAIN_2 +42 0x4143 //RX_FDEQ_GAIN_3 +43 0x4348 //RX_FDEQ_GAIN_4 +44 0x4848 //RX_FDEQ_GAIN_5 +45 0x4848 //RX_FDEQ_GAIN_6 46 0x4848 //RX_FDEQ_GAIN_7 -47 0x4860 //RX_FDEQ_GAIN_8 -48 0x6068 //RX_FDEQ_GAIN_9 -49 0x7070 //RX_FDEQ_GAIN_10 -50 0x8070 //RX_FDEQ_GAIN_11 -51 0x6060 //RX_FDEQ_GAIN_12 -52 0x7070 //RX_FDEQ_GAIN_13 +47 0x4848 //RX_FDEQ_GAIN_8 +48 0x4848 //RX_FDEQ_GAIN_9 +49 0x4848 //RX_FDEQ_GAIN_10 +50 0x4E56 //RX_FDEQ_GAIN_11 +51 0x595C //RX_FDEQ_GAIN_12 +52 0x5959 //RX_FDEQ_GAIN_13 53 0x4848 //RX_FDEQ_GAIN_14 54 0x4848 //RX_FDEQ_GAIN_15 55 0x4848 //RX_FDEQ_GAIN_16 @@ -8767,14 +12501,866 @@ 110 0x0000 //RX_FDDRC_RESRV_0 129 0x0100 //RX_SPK_VOL 130 0x0000 //RX_VOL_RESRV_0 +#RX 2 +157 0x027C //RX_RECVFUNC_MODE_0 +158 0x0000 //RX_RECVFUNC_MODE_1 +159 0x0001 //RX_SAMPLINGFREQ_SIG +160 0x0001 //RX_SAMPLINGFREQ_PROC +161 0x000A //RX_FRAME_SZ +162 0x0000 //RX_DELAY_OPT +163 0x6000 //RX_TDDRC_ALPHA_UP_1 +164 0x6000 //RX_TDDRC_ALPHA_UP_2 +165 0x6000 //RX_TDDRC_ALPHA_UP_3 +166 0x1000 //RX_TDDRC_ALPHA_UP_4 +167 0x0800 //RX_PGA +168 0x7B02 //RX_A_HP +169 0x4000 //RX_B_PE +170 0x7800 //RX_THR_PITCH_DET_0 +171 0x7000 //RX_THR_PITCH_DET_1 +172 0x6000 //RX_THR_PITCH_DET_2 +173 0x0008 //RX_PITCH_BFR_LEN +174 0x0003 //RX_SBD_PITCH_DET +175 0x0100 //RX_PP_RESRV_0 +176 0x0020 //RX_PP_RESRV_1 +177 0x0400 //RX_N_SN_EST +178 0x000C //RX_N2_SN_EST +179 0x0010 //RX_NS_LVL_CTRL +180 0xF800 //RX_THR_SN_EST +181 0x7E00 //RX_LAMBDA_PFILT +182 0x000A //RX_FENS_RESRV_0 +183 0x0190 //RX_FENS_RESRV_1 +184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +187 0x0002 //RX_EXTRA_NS_L +188 0x0800 //RX_EXTRA_NS_A +189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +190 0x7214 //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +192 0x199A //RX_A_POST_FLT +193 0x0000 //RX_LMT_THRD +194 0x4000 //RX_LMT_ALPHA +195 0x001C //RX_FDEQ_SUBNUM +196 0x6868 //RX_FDEQ_GAIN_0 +197 0x6858 //RX_FDEQ_GAIN_1 +198 0x5858 //RX_FDEQ_GAIN_2 +199 0x5858 //RX_FDEQ_GAIN_3 +200 0x5C5C //RX_FDEQ_GAIN_4 +201 0x5C54 //RX_FDEQ_GAIN_5 +202 0x544C //RX_FDEQ_GAIN_6 +203 0x4A48 //RX_FDEQ_GAIN_7 +204 0x4860 //RX_FDEQ_GAIN_8 +205 0x6068 //RX_FDEQ_GAIN_9 +206 0x6C6C //RX_FDEQ_GAIN_10 +207 0x6C68 //RX_FDEQ_GAIN_11 +208 0x5A5A //RX_FDEQ_GAIN_12 +209 0x5A5C //RX_FDEQ_GAIN_13 +210 0x4848 //RX_FDEQ_GAIN_14 +211 0x4848 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0202 //RX_FDEQ_BIN_0 +221 0x0203 //RX_FDEQ_BIN_1 +222 0x0303 //RX_FDEQ_BIN_2 +223 0x0304 //RX_FDEQ_BIN_3 +224 0x0404 //RX_FDEQ_BIN_4 +225 0x0204 //RX_FDEQ_BIN_5 +226 0x0A0A //RX_FDEQ_BIN_6 +227 0x0A0A //RX_FDEQ_BIN_7 +228 0x0B0C //RX_FDEQ_BIN_8 +229 0x0D0E //RX_FDEQ_BIN_9 +230 0x0E0F //RX_FDEQ_BIN_10 +231 0x0F10 //RX_FDEQ_BIN_11 +232 0x1011 //RX_FDEQ_BIN_12 +233 0x1104 //RX_FDEQ_BIN_13 +234 0x0000 //RX_FDEQ_BIN_14 +235 0x0000 //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x4000 //RX_FDEQ_RESRV_0 +245 0x0320 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0035 //RX_FDDRC_BAND_MARGIN_1 +248 0x00D5 //RX_FDDRC_BAND_MARGIN_2 +249 0x0120 //RX_FDDRC_BAND_MARGIN_3 +250 0x0004 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x2000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x2000 //RX_FDDRC_THRD_3_2 +258 0x5000 //RX_FDDRC_THRD_3_3 +259 0x4000 //RX_FDDRC_SLANT_0_0 +260 0x4000 //RX_FDDRC_SLANT_0_1 +261 0x4000 //RX_FDDRC_SLANT_0_2 +262 0x4000 //RX_FDDRC_SLANT_0_3 +263 0x7FFF //RX_FDDRC_SLANT_1_0 +264 0x7FFF //RX_FDDRC_SLANT_1_1 +265 0x7FFF //RX_FDDRC_SLANT_1_2 +266 0x7FFF //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +268 0x0002 //RX_FILTINDX +269 0x0002 //RX_TDDRC_THRD_0 +270 0x0004 //RX_TDDRC_THRD_1 +271 0x1C00 //RX_TDDRC_THRD_2 +272 0x1C00 //RX_TDDRC_THRD_3 +273 0x7FFF //RX_TDDRC_SLANT_0 +274 0x7FFF //RX_TDDRC_SLANT_1 +275 0x6000 //RX_TDDRC_ALPHA_UP_0 +276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x199A //RX_TDDRC_HMNC_GAIN +279 0x0001 //RX_TDDRC_SMT_FLAG +280 0x0CCD //RX_TDDRC_SMT_W +281 0x0715 //RX_TDDRC_DRC_GAIN +282 0x7C00 //RX_LAMBDA_PKA_FP +283 0x2000 //RX_TPKA_FP +284 0x2000 //RX_MIN_G_FP +285 0x0080 //RX_MAX_G_FP +286 0x0011 //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 +288 0x0000 //RX_MAXLEVEL_CNG +289 0x3000 //RX_BWE_UV_TH +290 0x3000 //RX_BWE_UV_TH2 +291 0x1800 //RX_BWE_UV_TH3 +292 0x1000 //RX_BWE_V_TH +293 0x04CD //RX_BWE_GAIN1_V_TH1 +294 0x0F33 //RX_BWE_GAIN1_V_TH2 +295 0x7333 //RX_BWE_UV_EQ +296 0x199A //RX_BWE_V_EQ +297 0x7333 //RX_BWE_TONE_TH +298 0x0004 //RX_BWE_UV_HOLD_T +299 0x6CCD //RX_BWE_GAIN2_ALPHA +300 0x799A //RX_BWE_GAIN3_ALPHA +301 0x001E //RX_BWE_CUTOFF +302 0x3000 //RX_BWE_GAINFILL +303 0x3200 //RX_BWE_MAXTH_TONE +304 0x2000 //RX_BWE_EQ_0 +305 0x2000 //RX_BWE_EQ_1 +306 0x2000 //RX_BWE_EQ_2 +307 0x2000 //RX_BWE_EQ_3 +308 0x2000 //RX_BWE_EQ_4 +309 0x2000 //RX_BWE_EQ_5 +310 0x2000 //RX_BWE_EQ_6 +311 0x0000 //RX_BWE_RESRV_0 +312 0x0000 //RX_BWE_RESRV_1 +313 0x0000 //RX_BWE_RESRV_2 +#VOL 0 +163 0x6000 //RX_TDDRC_ALPHA_UP_1 +164 0x6000 //RX_TDDRC_ALPHA_UP_2 +165 0x6000 //RX_TDDRC_ALPHA_UP_3 +166 0x1000 //RX_TDDRC_ALPHA_UP_4 +184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +190 0x7214 //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +269 0x0002 //RX_TDDRC_THRD_0 +270 0x0004 //RX_TDDRC_THRD_1 +271 0x1C00 //RX_TDDRC_THRD_2 +272 0x1C00 //RX_TDDRC_THRD_3 +273 0x7FFF //RX_TDDRC_SLANT_0 +274 0x7FFF //RX_TDDRC_SLANT_1 +275 0x6000 //RX_TDDRC_ALPHA_UP_0 +276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x199A //RX_TDDRC_HMNC_GAIN +279 0x0001 //RX_TDDRC_SMT_FLAG +280 0x0CCD //RX_TDDRC_SMT_W +281 0x0715 //RX_TDDRC_DRC_GAIN +195 0x001C //RX_FDEQ_SUBNUM +196 0x6868 //RX_FDEQ_GAIN_0 +197 0x6858 //RX_FDEQ_GAIN_1 +198 0x5858 //RX_FDEQ_GAIN_2 +199 0x5858 //RX_FDEQ_GAIN_3 +200 0x5C5C //RX_FDEQ_GAIN_4 +201 0x5C54 //RX_FDEQ_GAIN_5 +202 0x544C //RX_FDEQ_GAIN_6 +203 0x4A48 //RX_FDEQ_GAIN_7 +204 0x4860 //RX_FDEQ_GAIN_8 +205 0x6068 //RX_FDEQ_GAIN_9 +206 0x6C6C //RX_FDEQ_GAIN_10 +207 0x6C68 //RX_FDEQ_GAIN_11 +208 0x5A5A //RX_FDEQ_GAIN_12 +209 0x5A5C //RX_FDEQ_GAIN_13 +210 0x4848 //RX_FDEQ_GAIN_14 +211 0x4848 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0202 //RX_FDEQ_BIN_0 +221 0x0203 //RX_FDEQ_BIN_1 +222 0x0303 //RX_FDEQ_BIN_2 +223 0x0304 //RX_FDEQ_BIN_3 +224 0x0404 //RX_FDEQ_BIN_4 +225 0x0204 //RX_FDEQ_BIN_5 +226 0x0A0A //RX_FDEQ_BIN_6 +227 0x0A0A //RX_FDEQ_BIN_7 +228 0x0B0C //RX_FDEQ_BIN_8 +229 0x0D0E //RX_FDEQ_BIN_9 +230 0x0E0F //RX_FDEQ_BIN_10 +231 0x0F10 //RX_FDEQ_BIN_11 +232 0x1011 //RX_FDEQ_BIN_12 +233 0x1104 //RX_FDEQ_BIN_13 +234 0x0000 //RX_FDEQ_BIN_14 +235 0x0000 //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x4000 //RX_FDEQ_RESRV_0 +245 0x0320 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0035 //RX_FDDRC_BAND_MARGIN_1 +248 0x00D5 //RX_FDDRC_BAND_MARGIN_2 +249 0x0120 //RX_FDDRC_BAND_MARGIN_3 +250 0x0004 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x2000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x2000 //RX_FDDRC_THRD_3_2 +258 0x5000 //RX_FDDRC_THRD_3_3 +259 0x4000 //RX_FDDRC_SLANT_0_0 +260 0x4000 //RX_FDDRC_SLANT_0_1 +261 0x4000 //RX_FDDRC_SLANT_0_2 +262 0x4000 //RX_FDDRC_SLANT_0_3 +263 0x7FFF //RX_FDDRC_SLANT_1_0 +264 0x7FFF //RX_FDDRC_SLANT_1_1 +265 0x7FFF //RX_FDDRC_SLANT_1_2 +266 0x7FFF //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +286 0x0011 //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 +#VOL 1 +163 0x6000 //RX_TDDRC_ALPHA_UP_1 +164 0x6000 //RX_TDDRC_ALPHA_UP_2 +165 0x6000 //RX_TDDRC_ALPHA_UP_3 +166 0x1000 //RX_TDDRC_ALPHA_UP_4 +184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +190 0x7214 //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +269 0x0002 //RX_TDDRC_THRD_0 +270 0x0004 //RX_TDDRC_THRD_1 +271 0x1C00 //RX_TDDRC_THRD_2 +272 0x1C00 //RX_TDDRC_THRD_3 +273 0x7FFF //RX_TDDRC_SLANT_0 +274 0x7FFF //RX_TDDRC_SLANT_1 +275 0x6000 //RX_TDDRC_ALPHA_UP_0 +276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x199A //RX_TDDRC_HMNC_GAIN +279 0x0001 //RX_TDDRC_SMT_FLAG +280 0x0CCD //RX_TDDRC_SMT_W +281 0x0715 //RX_TDDRC_DRC_GAIN +195 0x001C //RX_FDEQ_SUBNUM +196 0x6868 //RX_FDEQ_GAIN_0 +197 0x6858 //RX_FDEQ_GAIN_1 +198 0x5858 //RX_FDEQ_GAIN_2 +199 0x5858 //RX_FDEQ_GAIN_3 +200 0x5C5C //RX_FDEQ_GAIN_4 +201 0x5C54 //RX_FDEQ_GAIN_5 +202 0x544C //RX_FDEQ_GAIN_6 +203 0x4A48 //RX_FDEQ_GAIN_7 +204 0x4860 //RX_FDEQ_GAIN_8 +205 0x6068 //RX_FDEQ_GAIN_9 +206 0x6C6C //RX_FDEQ_GAIN_10 +207 0x6C68 //RX_FDEQ_GAIN_11 +208 0x5A5A //RX_FDEQ_GAIN_12 +209 0x5A5C //RX_FDEQ_GAIN_13 +210 0x4848 //RX_FDEQ_GAIN_14 +211 0x4848 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0202 //RX_FDEQ_BIN_0 +221 0x0203 //RX_FDEQ_BIN_1 +222 0x0303 //RX_FDEQ_BIN_2 +223 0x0304 //RX_FDEQ_BIN_3 +224 0x0404 //RX_FDEQ_BIN_4 +225 0x0204 //RX_FDEQ_BIN_5 +226 0x0A0A //RX_FDEQ_BIN_6 +227 0x0A0A //RX_FDEQ_BIN_7 +228 0x0B0C //RX_FDEQ_BIN_8 +229 0x0D0E //RX_FDEQ_BIN_9 +230 0x0E0F //RX_FDEQ_BIN_10 +231 0x0F10 //RX_FDEQ_BIN_11 +232 0x1011 //RX_FDEQ_BIN_12 +233 0x1104 //RX_FDEQ_BIN_13 +234 0x0000 //RX_FDEQ_BIN_14 +235 0x0000 //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x4000 //RX_FDEQ_RESRV_0 +245 0x0320 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0035 //RX_FDDRC_BAND_MARGIN_1 +248 0x00D5 //RX_FDDRC_BAND_MARGIN_2 +249 0x0120 //RX_FDDRC_BAND_MARGIN_3 +250 0x0004 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x2000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x2000 //RX_FDDRC_THRD_3_2 +258 0x5000 //RX_FDDRC_THRD_3_3 +259 0x4000 //RX_FDDRC_SLANT_0_0 +260 0x4000 //RX_FDDRC_SLANT_0_1 +261 0x4000 //RX_FDDRC_SLANT_0_2 +262 0x4000 //RX_FDDRC_SLANT_0_3 +263 0x7FFF //RX_FDDRC_SLANT_1_0 +264 0x7FFF //RX_FDDRC_SLANT_1_1 +265 0x7FFF //RX_FDDRC_SLANT_1_2 +266 0x7FFF //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +286 0x0019 //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 +#VOL 2 +163 0x6000 //RX_TDDRC_ALPHA_UP_1 +164 0x6000 //RX_TDDRC_ALPHA_UP_2 +165 0x6000 //RX_TDDRC_ALPHA_UP_3 +166 0x1000 //RX_TDDRC_ALPHA_UP_4 +184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +190 0x7214 //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +269 0x0002 //RX_TDDRC_THRD_0 +270 0x0004 //RX_TDDRC_THRD_1 +271 0x1C00 //RX_TDDRC_THRD_2 +272 0x1C00 //RX_TDDRC_THRD_3 +273 0x7FFF //RX_TDDRC_SLANT_0 +274 0x7FFF //RX_TDDRC_SLANT_1 +275 0x6000 //RX_TDDRC_ALPHA_UP_0 +276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x199A //RX_TDDRC_HMNC_GAIN +279 0x0001 //RX_TDDRC_SMT_FLAG +280 0x0CCD //RX_TDDRC_SMT_W +281 0x0715 //RX_TDDRC_DRC_GAIN +195 0x001C //RX_FDEQ_SUBNUM +196 0x6868 //RX_FDEQ_GAIN_0 +197 0x6858 //RX_FDEQ_GAIN_1 +198 0x5858 //RX_FDEQ_GAIN_2 +199 0x5858 //RX_FDEQ_GAIN_3 +200 0x5C5C //RX_FDEQ_GAIN_4 +201 0x5C54 //RX_FDEQ_GAIN_5 +202 0x544C //RX_FDEQ_GAIN_6 +203 0x4A48 //RX_FDEQ_GAIN_7 +204 0x4860 //RX_FDEQ_GAIN_8 +205 0x6068 //RX_FDEQ_GAIN_9 +206 0x6C6C //RX_FDEQ_GAIN_10 +207 0x6C68 //RX_FDEQ_GAIN_11 +208 0x5A5A //RX_FDEQ_GAIN_12 +209 0x5A5C //RX_FDEQ_GAIN_13 +210 0x4848 //RX_FDEQ_GAIN_14 +211 0x4848 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0202 //RX_FDEQ_BIN_0 +221 0x0203 //RX_FDEQ_BIN_1 +222 0x0303 //RX_FDEQ_BIN_2 +223 0x0304 //RX_FDEQ_BIN_3 +224 0x0404 //RX_FDEQ_BIN_4 +225 0x0204 //RX_FDEQ_BIN_5 +226 0x0A0A //RX_FDEQ_BIN_6 +227 0x0A0A //RX_FDEQ_BIN_7 +228 0x0B0C //RX_FDEQ_BIN_8 +229 0x0D0E //RX_FDEQ_BIN_9 +230 0x0E0F //RX_FDEQ_BIN_10 +231 0x0F10 //RX_FDEQ_BIN_11 +232 0x1011 //RX_FDEQ_BIN_12 +233 0x1104 //RX_FDEQ_BIN_13 +234 0x0000 //RX_FDEQ_BIN_14 +235 0x0000 //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x4000 //RX_FDEQ_RESRV_0 +245 0x0320 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0035 //RX_FDDRC_BAND_MARGIN_1 +248 0x00D5 //RX_FDDRC_BAND_MARGIN_2 +249 0x0120 //RX_FDDRC_BAND_MARGIN_3 +250 0x0004 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x2000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x2000 //RX_FDDRC_THRD_3_2 +258 0x5000 //RX_FDDRC_THRD_3_3 +259 0x4000 //RX_FDDRC_SLANT_0_0 +260 0x4000 //RX_FDDRC_SLANT_0_1 +261 0x4000 //RX_FDDRC_SLANT_0_2 +262 0x4000 //RX_FDDRC_SLANT_0_3 +263 0x7FFF //RX_FDDRC_SLANT_1_0 +264 0x7FFF //RX_FDDRC_SLANT_1_1 +265 0x7FFF //RX_FDDRC_SLANT_1_2 +266 0x7FFF //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +286 0x0024 //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 +#VOL 3 +163 0x6000 //RX_TDDRC_ALPHA_UP_1 +164 0x6000 //RX_TDDRC_ALPHA_UP_2 +165 0x6000 //RX_TDDRC_ALPHA_UP_3 +166 0x1000 //RX_TDDRC_ALPHA_UP_4 +184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +190 0x7214 //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +269 0x0002 //RX_TDDRC_THRD_0 +270 0x0004 //RX_TDDRC_THRD_1 +271 0x1C00 //RX_TDDRC_THRD_2 +272 0x1C00 //RX_TDDRC_THRD_3 +273 0x7FFF //RX_TDDRC_SLANT_0 +274 0x7FFF //RX_TDDRC_SLANT_1 +275 0x6000 //RX_TDDRC_ALPHA_UP_0 +276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x199A //RX_TDDRC_HMNC_GAIN +279 0x0001 //RX_TDDRC_SMT_FLAG +280 0x0CCD //RX_TDDRC_SMT_W +281 0x0715 //RX_TDDRC_DRC_GAIN +195 0x001C //RX_FDEQ_SUBNUM +196 0x6868 //RX_FDEQ_GAIN_0 +197 0x6858 //RX_FDEQ_GAIN_1 +198 0x5858 //RX_FDEQ_GAIN_2 +199 0x5858 //RX_FDEQ_GAIN_3 +200 0x5C5C //RX_FDEQ_GAIN_4 +201 0x5C54 //RX_FDEQ_GAIN_5 +202 0x544C //RX_FDEQ_GAIN_6 +203 0x4A48 //RX_FDEQ_GAIN_7 +204 0x4860 //RX_FDEQ_GAIN_8 +205 0x6068 //RX_FDEQ_GAIN_9 +206 0x6C6C //RX_FDEQ_GAIN_10 +207 0x6C68 //RX_FDEQ_GAIN_11 +208 0x5A5A //RX_FDEQ_GAIN_12 +209 0x5A5C //RX_FDEQ_GAIN_13 +210 0x4848 //RX_FDEQ_GAIN_14 +211 0x4848 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0202 //RX_FDEQ_BIN_0 +221 0x0203 //RX_FDEQ_BIN_1 +222 0x0303 //RX_FDEQ_BIN_2 +223 0x0304 //RX_FDEQ_BIN_3 +224 0x0404 //RX_FDEQ_BIN_4 +225 0x0204 //RX_FDEQ_BIN_5 +226 0x0A0A //RX_FDEQ_BIN_6 +227 0x0A0A //RX_FDEQ_BIN_7 +228 0x0B0C //RX_FDEQ_BIN_8 +229 0x0D0E //RX_FDEQ_BIN_9 +230 0x0E0F //RX_FDEQ_BIN_10 +231 0x0F10 //RX_FDEQ_BIN_11 +232 0x1011 //RX_FDEQ_BIN_12 +233 0x1104 //RX_FDEQ_BIN_13 +234 0x0000 //RX_FDEQ_BIN_14 +235 0x0000 //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x4000 //RX_FDEQ_RESRV_0 +245 0x0320 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0035 //RX_FDDRC_BAND_MARGIN_1 +248 0x00D5 //RX_FDDRC_BAND_MARGIN_2 +249 0x0120 //RX_FDDRC_BAND_MARGIN_3 +250 0x0004 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x2000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x2000 //RX_FDDRC_THRD_3_2 +258 0x5000 //RX_FDDRC_THRD_3_3 +259 0x4000 //RX_FDDRC_SLANT_0_0 +260 0x4000 //RX_FDDRC_SLANT_0_1 +261 0x4000 //RX_FDDRC_SLANT_0_2 +262 0x4000 //RX_FDDRC_SLANT_0_3 +263 0x7FFF //RX_FDDRC_SLANT_1_0 +264 0x7FFF //RX_FDDRC_SLANT_1_1 +265 0x7FFF //RX_FDDRC_SLANT_1_2 +266 0x7FFF //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +286 0x0033 //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 +#VOL 4 +163 0x6000 //RX_TDDRC_ALPHA_UP_1 +164 0x6000 //RX_TDDRC_ALPHA_UP_2 +165 0x6000 //RX_TDDRC_ALPHA_UP_3 +166 0x1000 //RX_TDDRC_ALPHA_UP_4 +184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +190 0x7214 //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +269 0x0002 //RX_TDDRC_THRD_0 +270 0x0004 //RX_TDDRC_THRD_1 +271 0x1C00 //RX_TDDRC_THRD_2 +272 0x1C00 //RX_TDDRC_THRD_3 +273 0x7FFF //RX_TDDRC_SLANT_0 +274 0x7FFF //RX_TDDRC_SLANT_1 +275 0x6000 //RX_TDDRC_ALPHA_UP_0 +276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x199A //RX_TDDRC_HMNC_GAIN +279 0x0001 //RX_TDDRC_SMT_FLAG +280 0x0CCD //RX_TDDRC_SMT_W +281 0x0715 //RX_TDDRC_DRC_GAIN +195 0x001C //RX_FDEQ_SUBNUM +196 0x6868 //RX_FDEQ_GAIN_0 +197 0x6858 //RX_FDEQ_GAIN_1 +198 0x5858 //RX_FDEQ_GAIN_2 +199 0x5858 //RX_FDEQ_GAIN_3 +200 0x5C5C //RX_FDEQ_GAIN_4 +201 0x8854 //RX_FDEQ_GAIN_5 +202 0x5448 //RX_FDEQ_GAIN_6 +203 0x4848 //RX_FDEQ_GAIN_7 +204 0x4860 //RX_FDEQ_GAIN_8 +205 0x6068 //RX_FDEQ_GAIN_9 +206 0x7070 //RX_FDEQ_GAIN_10 +207 0x8070 //RX_FDEQ_GAIN_11 +208 0x6060 //RX_FDEQ_GAIN_12 +209 0x7070 //RX_FDEQ_GAIN_13 +210 0x4848 //RX_FDEQ_GAIN_14 +211 0x4848 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0202 //RX_FDEQ_BIN_0 +221 0x0203 //RX_FDEQ_BIN_1 +222 0x0303 //RX_FDEQ_BIN_2 +223 0x0304 //RX_FDEQ_BIN_3 +224 0x0404 //RX_FDEQ_BIN_4 +225 0x0204 //RX_FDEQ_BIN_5 +226 0x0A0A //RX_FDEQ_BIN_6 +227 0x0A0A //RX_FDEQ_BIN_7 +228 0x0B0C //RX_FDEQ_BIN_8 +229 0x0D0E //RX_FDEQ_BIN_9 +230 0x0E0F //RX_FDEQ_BIN_10 +231 0x0F10 //RX_FDEQ_BIN_11 +232 0x1011 //RX_FDEQ_BIN_12 +233 0x1104 //RX_FDEQ_BIN_13 +234 0x0000 //RX_FDEQ_BIN_14 +235 0x0000 //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x4000 //RX_FDEQ_RESRV_0 +245 0x0320 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0035 //RX_FDDRC_BAND_MARGIN_1 +248 0x00D5 //RX_FDDRC_BAND_MARGIN_2 +249 0x0120 //RX_FDDRC_BAND_MARGIN_3 +250 0x0004 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x2000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x2000 //RX_FDDRC_THRD_3_2 +258 0x5000 //RX_FDDRC_THRD_3_3 +259 0x4000 //RX_FDDRC_SLANT_0_0 +260 0x4000 //RX_FDDRC_SLANT_0_1 +261 0x4000 //RX_FDDRC_SLANT_0_2 +262 0x4000 //RX_FDDRC_SLANT_0_3 +263 0x7FFF //RX_FDDRC_SLANT_1_0 +264 0x7FFF //RX_FDDRC_SLANT_1_1 +265 0x7FFF //RX_FDDRC_SLANT_1_2 +266 0x7FFF //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +286 0x0049 //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 +#VOL 5 +163 0x6000 //RX_TDDRC_ALPHA_UP_1 +164 0x6000 //RX_TDDRC_ALPHA_UP_2 +165 0x6000 //RX_TDDRC_ALPHA_UP_3 +166 0x1000 //RX_TDDRC_ALPHA_UP_4 +184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +190 0x7214 //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +269 0x0002 //RX_TDDRC_THRD_0 +270 0x0004 //RX_TDDRC_THRD_1 +271 0x1C00 //RX_TDDRC_THRD_2 +272 0x1C00 //RX_TDDRC_THRD_3 +273 0x7FFF //RX_TDDRC_SLANT_0 +274 0x7FFF //RX_TDDRC_SLANT_1 +275 0x6000 //RX_TDDRC_ALPHA_UP_0 +276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x199A //RX_TDDRC_HMNC_GAIN +279 0x0001 //RX_TDDRC_SMT_FLAG +280 0x0CCD //RX_TDDRC_SMT_W +281 0x0715 //RX_TDDRC_DRC_GAIN +195 0x001C //RX_FDEQ_SUBNUM +196 0x6868 //RX_FDEQ_GAIN_0 +197 0x6858 //RX_FDEQ_GAIN_1 +198 0x5858 //RX_FDEQ_GAIN_2 +199 0x5858 //RX_FDEQ_GAIN_3 +200 0x5C5C //RX_FDEQ_GAIN_4 +201 0x8854 //RX_FDEQ_GAIN_5 +202 0x5448 //RX_FDEQ_GAIN_6 +203 0x4848 //RX_FDEQ_GAIN_7 +204 0x4860 //RX_FDEQ_GAIN_8 +205 0x6068 //RX_FDEQ_GAIN_9 +206 0x7070 //RX_FDEQ_GAIN_10 +207 0x8070 //RX_FDEQ_GAIN_11 +208 0x6060 //RX_FDEQ_GAIN_12 +209 0x7070 //RX_FDEQ_GAIN_13 +210 0x4848 //RX_FDEQ_GAIN_14 +211 0x4848 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0202 //RX_FDEQ_BIN_0 +221 0x0203 //RX_FDEQ_BIN_1 +222 0x0303 //RX_FDEQ_BIN_2 +223 0x0304 //RX_FDEQ_BIN_3 +224 0x0404 //RX_FDEQ_BIN_4 +225 0x0204 //RX_FDEQ_BIN_5 +226 0x0A0A //RX_FDEQ_BIN_6 +227 0x0A0A //RX_FDEQ_BIN_7 +228 0x0B0C //RX_FDEQ_BIN_8 +229 0x0D0E //RX_FDEQ_BIN_9 +230 0x0E0F //RX_FDEQ_BIN_10 +231 0x0F10 //RX_FDEQ_BIN_11 +232 0x1011 //RX_FDEQ_BIN_12 +233 0x1104 //RX_FDEQ_BIN_13 +234 0x0000 //RX_FDEQ_BIN_14 +235 0x0000 //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x4000 //RX_FDEQ_RESRV_0 +245 0x0320 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0035 //RX_FDDRC_BAND_MARGIN_1 +248 0x00D5 //RX_FDDRC_BAND_MARGIN_2 +249 0x0120 //RX_FDDRC_BAND_MARGIN_3 +250 0x0004 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x2000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x2000 //RX_FDDRC_THRD_3_2 +258 0x5000 //RX_FDDRC_THRD_3_3 +259 0x4000 //RX_FDDRC_SLANT_0_0 +260 0x4000 //RX_FDDRC_SLANT_0_1 +261 0x4000 //RX_FDDRC_SLANT_0_2 +262 0x4000 //RX_FDDRC_SLANT_0_3 +263 0x7FFF //RX_FDDRC_SLANT_1_0 +264 0x7FFF //RX_FDDRC_SLANT_1_1 +265 0x7FFF //RX_FDDRC_SLANT_1_2 +266 0x7FFF //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +286 0x0074 //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 +#VOL 6 +163 0x6000 //RX_TDDRC_ALPHA_UP_1 +164 0x6000 //RX_TDDRC_ALPHA_UP_2 +165 0x6000 //RX_TDDRC_ALPHA_UP_3 +166 0x1000 //RX_TDDRC_ALPHA_UP_4 +184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +190 0x7214 //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +269 0x0002 //RX_TDDRC_THRD_0 +270 0x0004 //RX_TDDRC_THRD_1 +271 0x1C00 //RX_TDDRC_THRD_2 +272 0x1C00 //RX_TDDRC_THRD_3 +273 0x7FFF //RX_TDDRC_SLANT_0 +274 0x7FFF //RX_TDDRC_SLANT_1 +275 0x6000 //RX_TDDRC_ALPHA_UP_0 +276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x199A //RX_TDDRC_HMNC_GAIN +279 0x0001 //RX_TDDRC_SMT_FLAG +280 0x0CCD //RX_TDDRC_SMT_W +281 0x0715 //RX_TDDRC_DRC_GAIN +195 0x001C //RX_FDEQ_SUBNUM +196 0x6868 //RX_FDEQ_GAIN_0 +197 0x6864 //RX_FDEQ_GAIN_1 +198 0x7070 //RX_FDEQ_GAIN_2 +199 0x6058 //RX_FDEQ_GAIN_3 +200 0x5C5C //RX_FDEQ_GAIN_4 +201 0x8854 //RX_FDEQ_GAIN_5 +202 0x5448 //RX_FDEQ_GAIN_6 +203 0x4848 //RX_FDEQ_GAIN_7 +204 0x4860 //RX_FDEQ_GAIN_8 +205 0x6068 //RX_FDEQ_GAIN_9 +206 0x7070 //RX_FDEQ_GAIN_10 +207 0x8070 //RX_FDEQ_GAIN_11 +208 0x6060 //RX_FDEQ_GAIN_12 +209 0x7070 //RX_FDEQ_GAIN_13 +210 0x4848 //RX_FDEQ_GAIN_14 +211 0x4848 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0202 //RX_FDEQ_BIN_0 +221 0x0203 //RX_FDEQ_BIN_1 +222 0x0303 //RX_FDEQ_BIN_2 +223 0x0304 //RX_FDEQ_BIN_3 +224 0x0404 //RX_FDEQ_BIN_4 +225 0x0204 //RX_FDEQ_BIN_5 +226 0x0A0A //RX_FDEQ_BIN_6 +227 0x0A0A //RX_FDEQ_BIN_7 +228 0x0B0C //RX_FDEQ_BIN_8 +229 0x0D0E //RX_FDEQ_BIN_9 +230 0x0E0F //RX_FDEQ_BIN_10 +231 0x0F10 //RX_FDEQ_BIN_11 +232 0x1011 //RX_FDEQ_BIN_12 +233 0x1104 //RX_FDEQ_BIN_13 +234 0x0000 //RX_FDEQ_BIN_14 +235 0x0000 //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x4000 //RX_FDEQ_RESRV_0 +245 0x0320 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0035 //RX_FDDRC_BAND_MARGIN_1 +248 0x00D5 //RX_FDDRC_BAND_MARGIN_2 +249 0x0120 //RX_FDDRC_BAND_MARGIN_3 +250 0x0004 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x2000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x2000 //RX_FDDRC_THRD_3_2 +258 0x5000 //RX_FDDRC_THRD_3_3 +259 0x4000 //RX_FDDRC_SLANT_0_0 +260 0x4000 //RX_FDDRC_SLANT_0_1 +261 0x4000 //RX_FDDRC_SLANT_0_2 +262 0x4000 //RX_FDDRC_SLANT_0_3 +263 0x7FFF //RX_FDDRC_SLANT_1_0 +264 0x7FFF //RX_FDDRC_SLANT_1_1 +265 0x7FFF //RX_FDDRC_SLANT_1_2 +266 0x7FFF //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +286 0x0100 //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 -#CASE_NAME HANDSFREE-HANDSFREE-VOICE_GENERIC-SWB -#PARAM_TYPE TX+RX -#TOTAL_CUSTOM_STEP 7 +#CASE_NAME HANDSFREE-HANDFREE-VOICE_GENERIC-SWB +#PARAM_MODE FULL +#PARAM_TYPE TX+2RX +#TOTAL_CUSTOM_STEP 7+7 #TX 0 0x0001 //TX_OPERATION_MODE_0 1 0x0001 //TX_OPERATION_MODE_1 -2 0x0033 //TX_PATCH_REG +2 0x0073 //TX_PATCH_REG 3 0x2F7C //TX_SENDFUNC_MODE_0 4 0x0001 //TX_SENDFUNC_MODE_1 5 0x0003 //TX_NUM_MIC @@ -8998,10 +13584,10 @@ 223 0x0BB8 //TX_RATIO_DT_L_TH_LOW 224 0x3A98 //TX_RATIO_DT_H_TH_LOW 225 0x1F40 //TX_RATIO_DT_L_TH_HIGH -226 0x6590 //TX_RATIO_DT_H_TH_HIGH +226 0x5014 //TX_RATIO_DT_H_TH_HIGH 227 0x09C4 //TX_RATIO_DT_L0_TH -228 0x2000 //TX_B_POST_FILT_ECHO_L -229 0x1000 //TX_B_POST_FILT_ECHO_H +228 0x7FFF //TX_B_POST_FILT_ECHO_L +229 0x7FFF //TX_B_POST_FILT_ECHO_H 230 0x0200 //TX_MIN_G_CTRL_ECHO 231 0x1000 //TX_B_LESSCUT_RTO_ECHO 232 0x0000 //TX_EPD_OFFSET_00 @@ -9025,10 +13611,10 @@ 250 0x0100 //TX_DELTA_THR_SN_EST_0 251 0x0100 //TX_DELTA_THR_SN_EST_1 252 0x0100 //TX_DELTA_THR_SN_EST_2 -253 0x0100 //TX_DELTA_THR_SN_EST_3 -254 0x0000 //TX_DELTA_THR_SN_EST_4 -255 0x0100 //TX_DELTA_THR_SN_EST_5 -256 0x0200 //TX_DELTA_THR_SN_EST_6 +253 0x0000 //TX_DELTA_THR_SN_EST_3 +254 0x0100 //TX_DELTA_THR_SN_EST_4 +255 0x0200 //TX_DELTA_THR_SN_EST_5 +256 0x0100 //TX_DELTA_THR_SN_EST_6 257 0x0200 //TX_DELTA_THR_SN_EST_7 258 0x4000 //TX_LAMBDA_NN_EST_0 259 0x4000 //TX_LAMBDA_NN_EST_1 @@ -9055,51 +13641,51 @@ 280 0x1000 //TX_B_POST_FLT_1 281 0x0010 //TX_NS_LVL_CTRL_0 282 0x003C //TX_NS_LVL_CTRL_1 -283 0x003C //TX_NS_LVL_CTRL_2 -284 0x0024 //TX_NS_LVL_CTRL_3 -285 0x003C //TX_NS_LVL_CTRL_4 -286 0x0014 //TX_NS_LVL_CTRL_5 -287 0x0011 //TX_NS_LVL_CTRL_6 +283 0x0024 //TX_NS_LVL_CTRL_2 +284 0x003C //TX_NS_LVL_CTRL_3 +285 0x0014 //TX_NS_LVL_CTRL_4 +286 0x0011 //TX_NS_LVL_CTRL_5 +287 0x003C //TX_NS_LVL_CTRL_6 288 0x0011 //TX_NS_LVL_CTRL_7 -289 0x000F //TX_MIN_GAIN_S_0 -290 0x0010 //TX_MIN_GAIN_S_1 -291 0x0010 //TX_MIN_GAIN_S_2 -292 0x0010 //TX_MIN_GAIN_S_3 -293 0x0010 //TX_MIN_GAIN_S_4 -294 0x0010 //TX_MIN_GAIN_S_5 -295 0x0010 //TX_MIN_GAIN_S_6 -296 0x000F //TX_MIN_GAIN_S_7 +289 0x0020 //TX_MIN_GAIN_S_0 +290 0x0020 //TX_MIN_GAIN_S_1 +291 0x0020 //TX_MIN_GAIN_S_2 +292 0x0020 //TX_MIN_GAIN_S_3 +293 0x0020 //TX_MIN_GAIN_S_4 +294 0x0020 //TX_MIN_GAIN_S_5 +295 0x0020 //TX_MIN_GAIN_S_6 +296 0x0020 //TX_MIN_GAIN_S_7 297 0x6000 //TX_NMOS_SUP 298 0x0000 //TX_NS_MAX_PRI_SNR_TH 299 0x0000 //TX_NMOS_SUP_MENSA 300 0x7FFF //TX_SNRI_SUP_0 -301 0x1400 //TX_SNRI_SUP_1 -302 0x1400 //TX_SNRI_SUP_2 -303 0x1400 //TX_SNRI_SUP_3 +301 0x4000 //TX_SNRI_SUP_1 +302 0x4000 //TX_SNRI_SUP_2 +303 0x4000 //TX_SNRI_SUP_3 304 0x4000 //TX_SNRI_SUP_4 305 0x4000 //TX_SNRI_SUP_5 -306 0x50C0 //TX_SNRI_SUP_6 -307 0x7FFF //TX_SNRI_SUP_7 +306 0x4000 //TX_SNRI_SUP_6 +307 0x4000 //TX_SNRI_SUP_7 308 0x7FFF //TX_THR_LFNS 309 0x0018 //TX_G_LFNS 310 0x09C4 //TX_GAIN0_NTH 311 0x000A //TX_MUSIC_MORENS 312 0x7FFF //TX_A_POST_FILT_0 313 0x2000 //TX_A_POST_FILT_1 -314 0x5000 //TX_A_POST_FILT_S_0 -315 0x7C00 //TX_A_POST_FILT_S_1 -316 0x4C00 //TX_A_POST_FILT_S_2 -317 0x4000 //TX_A_POST_FILT_S_3 -318 0x6000 //TX_A_POST_FILT_S_4 -319 0x4000 //TX_A_POST_FILT_S_5 -320 0x5000 //TX_A_POST_FILT_S_6 -321 0x7000 //TX_A_POST_FILT_S_7 +314 0x7FFF //TX_A_POST_FILT_S_0 +315 0x7FFF //TX_A_POST_FILT_S_1 +316 0x7FFF //TX_A_POST_FILT_S_2 +317 0x7FFF //TX_A_POST_FILT_S_3 +318 0x7FFF //TX_A_POST_FILT_S_4 +319 0x7FFF //TX_A_POST_FILT_S_5 +320 0x7FFF //TX_A_POST_FILT_S_6 +321 0x7FFF //TX_A_POST_FILT_S_7 322 0x2000 //TX_B_POST_FILT_0 -323 0x1000 //TX_B_POST_FILT_1 +323 0x6000 //TX_B_POST_FILT_1 324 0x6000 //TX_B_POST_FILT_2 325 0x6000 //TX_B_POST_FILT_3 -326 0x6000 //TX_B_POST_FILT_4 -327 0x4000 //TX_B_POST_FILT_5 +326 0x4000 //TX_B_POST_FILT_4 +327 0x1000 //TX_B_POST_FILT_5 328 0x1000 //TX_B_POST_FILT_6 329 0x2000 //TX_B_POST_FILT_7 330 0x4000 //TX_B_LESSCUT_RTO_S_0 @@ -9107,18 +13693,18 @@ 332 0x7FFF //TX_B_LESSCUT_RTO_S_2 333 0x7FFF //TX_B_LESSCUT_RTO_S_3 334 0x7FFF //TX_B_LESSCUT_RTO_S_4 -335 0x7FFF //TX_B_LESSCUT_RTO_S_5 -336 0x6000 //TX_B_LESSCUT_RTO_S_6 +335 0x6000 //TX_B_LESSCUT_RTO_S_5 +336 0x7FFF //TX_B_LESSCUT_RTO_S_6 337 0x7FFF //TX_B_LESSCUT_RTO_S_7 -338 0x7C00 //TX_LAMBDA_PFILT -339 0x7D00 //TX_LAMBDA_PFILT_S_0 -340 0x7D00 //TX_LAMBDA_PFILT_S_1 -341 0x7D00 //TX_LAMBDA_PFILT_S_2 -342 0x7D00 //TX_LAMBDA_PFILT_S_3 -343 0x7D00 //TX_LAMBDA_PFILT_S_4 -344 0x7D00 //TX_LAMBDA_PFILT_S_5 -345 0x7D00 //TX_LAMBDA_PFILT_S_6 -346 0x7D00 //TX_LAMBDA_PFILT_S_7 +338 0x7F00 //TX_LAMBDA_PFILT +339 0x7F00 //TX_LAMBDA_PFILT_S_0 +340 0x7F00 //TX_LAMBDA_PFILT_S_1 +341 0x7F00 //TX_LAMBDA_PFILT_S_2 +342 0x7F00 //TX_LAMBDA_PFILT_S_3 +343 0x7F00 //TX_LAMBDA_PFILT_S_4 +344 0x7F00 //TX_LAMBDA_PFILT_S_5 +345 0x7F00 //TX_LAMBDA_PFILT_S_6 +346 0x7F00 //TX_LAMBDA_PFILT_S_7 347 0x0200 //TX_K_PEPPER 348 0x0400 //TX_A_PEPPER 349 0x1EAA //TX_K_PEPPER_HF @@ -9152,10 +13738,10 @@ 377 0x7FFF //TX_NOISE_TH_5_4 378 0x0DAC //TX_NOISE_TH_6 379 0x0050 //TX_MINENOISE_TH -380 0x4000 //TX_MINENOISE_MIC0_TH_MTS -381 0xFFEE //TX_MINENOISE_MIC0_TH_EXP -382 0x6000 //TX_MINENOISE_MIC0_S_TH_MTS -383 0xFFF3 //TX_MINENOISE_MIC0_S_TH_EXP +380 0xD508 //TX_MORENS_TFMASK_TH +381 0x0001 //TX_DRC_QUIET_FLOOR +382 0x3A98 //TX_RATIODTL_CUT_TH +383 0x07D0 //TX_DT_CUT_K1 384 0x0666 //TX_OUT_ENER_S_TH_CLEAN 385 0x0666 //TX_OUT_ENER_S_TH_LESSCLEAN 386 0x0333 //TX_OUT_ENER_S_TH_NOISY @@ -9163,15 +13749,15 @@ 388 0x0333 //TX_OUT_ENER_TH_SPEECH 389 0x2000 //TX_SN_NPB_GAIN 390 0x0000 //TX_NN_NPB_GAIN -391 0x0000 //TX_CSX_ALPHA_0 -392 0x0000 //TX_CSX_ALPHA_1 -393 0x0000 //TX_CSX_ALPHA_2 -394 0x0000 //TX_CSX_ALPHA_3 -395 0x0800 //TX_MU_ARSP_EST -396 0x00C8 //TX_P_OUTBEAM_MIN_TH +391 0x7FFF //TX_POST_MASK_SUP_HSNE +392 0x1388 //TX_TAIL_DET_TH +393 0x4000 //TX_B_LESSCUT_RTO_WTA +394 0x0000 //TX_MEL_G_R +395 0x0080 //TX_SUPHIGH_TH +396 0x0000 //TX_MASK_G_R 397 0x0002 //TX_EXTRA_NS_L -398 0x0800 //TX_EXTRA_NS_A -399 0x0005 //TX_VR_NOISE_FLOOR_TH +398 0x1800 //TX_C_POST_FLT_MASK +399 0x7FFF //TX_A_POST_FLT_WNS 400 0x0148 //TX_MIN_G_LOW300HZ 401 0x0001 //TX_MAXLEVEL_CNG 402 0x00B4 //TX_STN_NOISE_TH @@ -9281,21 +13867,21 @@ 506 0x2000 //TX_RADIODTLV 507 0x0320 //TX_POWER_LINEIN_TH 508 0x0014 //TX_FE_VADCOUNT_TH_FC -509 0x0000 //TX_ECHO_SUPP_FC +509 0x000A //TX_ECHO_SUPP_FC 510 0x0C80 //TX_ECHO_TH 511 0x6666 //TX_MIC_TO_BFGAIN 512 0x0000 //TX_MICTOBFGAIN0 513 0x0000 //TX_FASTMUE_TH -514 0x0000 //TX_DERVB_LEN_0 -515 0x0000 //TX_DERVB_LEN_1 -516 0x0000 //TX_RHO_DERVB -517 0x0000 //TX_MIC_INDX_DERVB -518 0x0000 //TX_MU_DERVB -519 0x0000 //TX_DR_RESRV_0 -520 0x0000 //TX_DR_RESRV_1 -521 0x0000 //TX_DR_RESRV_2 -522 0x0000 //TX_DR_RESRV_3 -523 0x0000 //TX_DR_RESRV_4 +514 0x3000 //TX_DEREVERB_LF_MU +515 0x34CD //TX_DEREVERB_HF_MU +516 0x0007 //TX_DEREVERB_DELAY +517 0x0004 //TX_DEREVERB_COEF_LEN +518 0x0003 //TX_DEREVERB_DNR +519 0x0000 //TX_DEREVERB_ALPHA +520 0x0000 //TX_DEREVERB_BETA +521 0x3A98 //TX_GSC_RTOL_TH +522 0x3A98 //TX_GSC_RTOH_TH +523 0x7E2C //TX_WIDE2_MEANHTH 524 0x0000 //TX_DR_RESRV_5 525 0x0000 //TX_DR_RESRV_6 526 0x0000 //TX_DR_RESRV_7 @@ -9669,8 +14255,73 @@ 894 0xC000 //TX_FASTNS_SSA_THHFL 895 0xCCCC //TX_FASTNS_SSA_THLFH 896 0xD999 //TX_FASTNS_SSA_THHFH +897 0x2339 //TX_SENDFUNC_REG_MICMUTE +898 0x0021 //TX_SENDFUNC_REG_MICMUTE1 +899 0x02BC //TX_MICMUTE_RATIO_THR +900 0x0140 //TX_MICMUTE_AMP_THR +901 0x0004 //TX_MICMUTE_HPF_IND +902 0x00C0 //TX_MICMUTE_LOG_EYR_TH +903 0x0008 //TX_MICMUTE_CVG_TIME +904 0x0008 //TX_MICMUTE_RELEASE_TIME +905 0x01FE //TX_MIC_VOLUME_MIC0MUTE +906 0x0020 //TX_MICMUTE_EPD_OFFSET_0 +907 0x001E //TX_MICMUTE_FRQ_AEC_L +908 0x7999 //TX_MICMUTE_EAD_THR +909 0x7FFF //TX_MICMUTE_LAMBDA_CB_NLE +910 0x7FFF //TX_MICMUTE_LAMBDA_RE_EST +911 0x4000 //TX_DTD_THR1_MICMUTE_0 +912 0x7000 //TX_DTD_THR1_MICMUTE_1 +913 0x7FFF //TX_DTD_THR1_MICMUTE_2 +914 0x7FFF //TX_DTD_THR1_MICMUTE_3 +915 0x6CCC //TX_DTD_THR2_MICMUTE_0 +916 0x0400 //TX_MICMUTE_MIN_EQ_RE_EST_0 +917 0x0400 //TX_MICMUTE_MIN_EQ_RE_EST_1 +918 0x1000 //TX_MICMUTE_MIN_EQ_RE_EST_2 +919 0x7FFF //TX_MICMUTE_MIN_EQ_RE_EST_3 +920 0x7FFF //TX_MICMUTE_MIN_EQ_RE_EST_4 +921 0x4000 //TX_MICMUTE_C_POST_FLT +922 0x03E8 //TX_MICMUTE_DT_CUT_K +923 0x0001 //TX_MICMUTE_DT_CUT_THR +924 0x03E8 //TX_MICMUTE_DT_CUT_K2 +925 0x0001 //TX_MICMUTE_DT_CUT_THR2 +926 0x0064 //TX_MICMUTE_DT2_HOLD_N +927 0x1000 //TX_MICMUTE_RATIODTH_THCUT +928 0x1000 //TX_MICMUTE_B_POST_FLT_ECHOL +929 0x7FFF //TX_MICMUTE_B_POST_FLT_ECHOH +930 0x0400 //TX_MICMUTE_C_POST_FLT_MASK +931 0x7999 //TX_MICMUTE_RATIODTL_CUT_TH +932 0x0258 //TX_MICMUTE_DT_CUT_K1 +933 0x0800 //TX_MICMUTE_N2_SN_EST +934 0xFC00 //TX_MICMUTE_THR_SN_EST_0 +935 0x001C //TX_MICMUTE_MIN_G_CTRL_0 +936 0x6000 //TX_MICMUTE_A_POST_FILT_S_0 +937 0x7000 //TX_MICMUTE_B_POST_FILT_0 +938 0x2710 //TX_MIC1RUB_AMP_THR +939 0x0010 //TX_MIC1MUTE_RATIO_THR +940 0x0450 //TX_MIC1MUTE_AMP_THR +941 0x0008 //TX_MIC1MUTE_CVG_TIME +942 0x0008 //TX_MIC1MUTE_RELEASE_TIME +943 0x0000 //TX_AMS_RESRV_01 +944 0x0000 //TX_AMS_RESRV_02 +945 0x0000 //TX_AMS_RESRV_03 +946 0x0000 //TX_AMS_RESRV_04 +947 0x0000 //TX_AMS_RESRV_05 +948 0x0000 //TX_AMS_RESRV_06 +949 0x0000 //TX_AMS_RESRV_07 +950 0x0000 //TX_AMS_RESRV_08 +951 0x0000 //TX_AMS_RESRV_09 +952 0x0000 //TX_AMS_RESRV_10 +953 0x0000 //TX_AMS_RESRV_11 +954 0x0000 //TX_AMS_RESRV_12 +955 0x0000 //TX_AMS_RESRV_13 +956 0x0000 //TX_AMS_RESRV_14 +957 0x0000 //TX_AMS_RESRV_15 +958 0x0000 //TX_AMS_RESRV_16 +959 0x0000 //TX_AMS_RESRV_17 +960 0x0000 //TX_AMS_RESRV_18 +961 0x0000 //TX_AMS_RESRV_19 #RX -0 0x027C //RX_RECVFUNC_MODE_0 +0 0x206C //RX_RECVFUNC_MODE_0 1 0x0000 //RX_RECVFUNC_MODE_1 2 0x0003 //RX_SAMPLINGFREQ_SIG 3 0x0003 //RX_SAMPLINGFREQ_PROC @@ -9710,21 +14361,21 @@ 37 0x4000 //RX_LMT_ALPHA 38 0x0020 //RX_FDEQ_SUBNUM 39 0x4848 //RX_FDEQ_GAIN_0 -40 0x4848 //RX_FDEQ_GAIN_1 -41 0x4848 //RX_FDEQ_GAIN_2 -42 0x4848 //RX_FDEQ_GAIN_3 -43 0x4848 //RX_FDEQ_GAIN_4 -44 0x4848 //RX_FDEQ_GAIN_5 -45 0x4850 //RX_FDEQ_GAIN_6 -46 0x4848 //RX_FDEQ_GAIN_7 -47 0x4860 //RX_FDEQ_GAIN_8 -48 0x7468 //RX_FDEQ_GAIN_9 -49 0x6060 //RX_FDEQ_GAIN_10 -50 0x6060 //RX_FDEQ_GAIN_11 -51 0x5C54 //RX_FDEQ_GAIN_12 -52 0x5450 //RX_FDEQ_GAIN_13 -53 0x5050 //RX_FDEQ_GAIN_14 -54 0x5860 //RX_FDEQ_GAIN_15 +40 0x3B3B //RX_FDEQ_GAIN_1 +41 0x3942 //RX_FDEQ_GAIN_2 +42 0x4645 //RX_FDEQ_GAIN_3 +43 0x494A //RX_FDEQ_GAIN_4 +44 0x5D5A //RX_FDEQ_GAIN_5 +45 0x5B5B //RX_FDEQ_GAIN_6 +46 0x5A51 //RX_FDEQ_GAIN_7 +47 0x514F //RX_FDEQ_GAIN_8 +48 0x5555 //RX_FDEQ_GAIN_9 +49 0x5052 //RX_FDEQ_GAIN_10 +50 0x5453 //RX_FDEQ_GAIN_11 +51 0x514E //RX_FDEQ_GAIN_12 +52 0x4F59 //RX_FDEQ_GAIN_13 +53 0x6C76 //RX_FDEQ_GAIN_14 +54 0x787B //RX_FDEQ_GAIN_15 55 0x4848 //RX_FDEQ_GAIN_16 56 0x4848 //RX_FDEQ_GAIN_17 57 0x4848 //RX_FDEQ_GAIN_18 @@ -9794,12 +14445,12 @@ 121 0x199A //RX_TDDRC_HMNC_GAIN 122 0x0001 //RX_TDDRC_SMT_FLAG 123 0x0CCD //RX_TDDRC_SMT_W -124 0x0550 //RX_TDDRC_DRC_GAIN +124 0x032A //RX_TDDRC_DRC_GAIN 125 0x7C00 //RX_LAMBDA_PKA_FP 126 0x2000 //RX_TPKA_FP 127 0x2000 //RX_MIN_G_FP 128 0x0080 //RX_MAX_G_FP -129 0x0014 //RX_SPK_VOL +129 0x0100 //RX_SPK_VOL 130 0x0000 //RX_VOL_RESRV_0 131 0x0000 //RX_MAXLEVEL_CNG 132 0x3000 //RX_BWE_UV_TH @@ -9850,24 +14501,24 @@ 121 0x199A //RX_TDDRC_HMNC_GAIN 122 0x0001 //RX_TDDRC_SMT_FLAG 123 0x0CCD //RX_TDDRC_SMT_W -124 0x0550 //RX_TDDRC_DRC_GAIN +124 0x032A //RX_TDDRC_DRC_GAIN 38 0x0020 //RX_FDEQ_SUBNUM 39 0x4848 //RX_FDEQ_GAIN_0 -40 0x4848 //RX_FDEQ_GAIN_1 -41 0x4848 //RX_FDEQ_GAIN_2 -42 0x4848 //RX_FDEQ_GAIN_3 -43 0x4848 //RX_FDEQ_GAIN_4 -44 0x4848 //RX_FDEQ_GAIN_5 -45 0x4850 //RX_FDEQ_GAIN_6 -46 0x4848 //RX_FDEQ_GAIN_7 -47 0x4860 //RX_FDEQ_GAIN_8 -48 0x7468 //RX_FDEQ_GAIN_9 -49 0x6060 //RX_FDEQ_GAIN_10 -50 0x6060 //RX_FDEQ_GAIN_11 -51 0x5C54 //RX_FDEQ_GAIN_12 -52 0x5450 //RX_FDEQ_GAIN_13 -53 0x5050 //RX_FDEQ_GAIN_14 -54 0x5860 //RX_FDEQ_GAIN_15 +40 0x3B3B //RX_FDEQ_GAIN_1 +41 0x3942 //RX_FDEQ_GAIN_2 +42 0x4645 //RX_FDEQ_GAIN_3 +43 0x494A //RX_FDEQ_GAIN_4 +44 0x5D5A //RX_FDEQ_GAIN_5 +45 0x5B5B //RX_FDEQ_GAIN_6 +46 0x5A51 //RX_FDEQ_GAIN_7 +47 0x514F //RX_FDEQ_GAIN_8 +48 0x5555 //RX_FDEQ_GAIN_9 +49 0x5052 //RX_FDEQ_GAIN_10 +50 0x5453 //RX_FDEQ_GAIN_11 +51 0x514E //RX_FDEQ_GAIN_12 +52 0x4F59 //RX_FDEQ_GAIN_13 +53 0x6C76 //RX_FDEQ_GAIN_14 +54 0x787B //RX_FDEQ_GAIN_15 55 0x4848 //RX_FDEQ_GAIN_16 56 0x4848 //RX_FDEQ_GAIN_17 57 0x4848 //RX_FDEQ_GAIN_18 @@ -9949,24 +14600,24 @@ 121 0x199A //RX_TDDRC_HMNC_GAIN 122 0x0001 //RX_TDDRC_SMT_FLAG 123 0x0CCD //RX_TDDRC_SMT_W -124 0x0550 //RX_TDDRC_DRC_GAIN +124 0x032A //RX_TDDRC_DRC_GAIN 38 0x0020 //RX_FDEQ_SUBNUM 39 0x4848 //RX_FDEQ_GAIN_0 -40 0x4848 //RX_FDEQ_GAIN_1 -41 0x4848 //RX_FDEQ_GAIN_2 -42 0x4848 //RX_FDEQ_GAIN_3 -43 0x4848 //RX_FDEQ_GAIN_4 -44 0x4848 //RX_FDEQ_GAIN_5 -45 0x4850 //RX_FDEQ_GAIN_6 -46 0x4848 //RX_FDEQ_GAIN_7 -47 0x4860 //RX_FDEQ_GAIN_8 -48 0x7468 //RX_FDEQ_GAIN_9 -49 0x6060 //RX_FDEQ_GAIN_10 -50 0x6060 //RX_FDEQ_GAIN_11 -51 0x5C54 //RX_FDEQ_GAIN_12 -52 0x5450 //RX_FDEQ_GAIN_13 -53 0x5050 //RX_FDEQ_GAIN_14 -54 0x5860 //RX_FDEQ_GAIN_15 +40 0x3B3B //RX_FDEQ_GAIN_1 +41 0x3942 //RX_FDEQ_GAIN_2 +42 0x4645 //RX_FDEQ_GAIN_3 +43 0x494A //RX_FDEQ_GAIN_4 +44 0x5D5A //RX_FDEQ_GAIN_5 +45 0x5B5B //RX_FDEQ_GAIN_6 +46 0x5A51 //RX_FDEQ_GAIN_7 +47 0x514F //RX_FDEQ_GAIN_8 +48 0x5555 //RX_FDEQ_GAIN_9 +49 0x5052 //RX_FDEQ_GAIN_10 +50 0x5453 //RX_FDEQ_GAIN_11 +51 0x514E //RX_FDEQ_GAIN_12 +52 0x4F59 //RX_FDEQ_GAIN_13 +53 0x6C76 //RX_FDEQ_GAIN_14 +54 0x787B //RX_FDEQ_GAIN_15 55 0x4848 //RX_FDEQ_GAIN_16 56 0x4848 //RX_FDEQ_GAIN_17 57 0x4848 //RX_FDEQ_GAIN_18 @@ -10048,24 +14699,24 @@ 121 0x199A //RX_TDDRC_HMNC_GAIN 122 0x0001 //RX_TDDRC_SMT_FLAG 123 0x0CCD //RX_TDDRC_SMT_W -124 0x0550 //RX_TDDRC_DRC_GAIN +124 0x032A //RX_TDDRC_DRC_GAIN 38 0x0020 //RX_FDEQ_SUBNUM 39 0x4848 //RX_FDEQ_GAIN_0 -40 0x4848 //RX_FDEQ_GAIN_1 -41 0x4848 //RX_FDEQ_GAIN_2 -42 0x4848 //RX_FDEQ_GAIN_3 -43 0x4848 //RX_FDEQ_GAIN_4 -44 0x4848 //RX_FDEQ_GAIN_5 -45 0x4850 //RX_FDEQ_GAIN_6 -46 0x4848 //RX_FDEQ_GAIN_7 -47 0x4860 //RX_FDEQ_GAIN_8 -48 0x7468 //RX_FDEQ_GAIN_9 -49 0x6060 //RX_FDEQ_GAIN_10 -50 0x6060 //RX_FDEQ_GAIN_11 -51 0x5C54 //RX_FDEQ_GAIN_12 -52 0x5450 //RX_FDEQ_GAIN_13 -53 0x5050 //RX_FDEQ_GAIN_14 -54 0x5860 //RX_FDEQ_GAIN_15 +40 0x3B3B //RX_FDEQ_GAIN_1 +41 0x3942 //RX_FDEQ_GAIN_2 +42 0x4645 //RX_FDEQ_GAIN_3 +43 0x494A //RX_FDEQ_GAIN_4 +44 0x5D5A //RX_FDEQ_GAIN_5 +45 0x5B5B //RX_FDEQ_GAIN_6 +46 0x5A51 //RX_FDEQ_GAIN_7 +47 0x514F //RX_FDEQ_GAIN_8 +48 0x5555 //RX_FDEQ_GAIN_9 +49 0x5052 //RX_FDEQ_GAIN_10 +50 0x5453 //RX_FDEQ_GAIN_11 +51 0x514E //RX_FDEQ_GAIN_12 +52 0x4F59 //RX_FDEQ_GAIN_13 +53 0x6C76 //RX_FDEQ_GAIN_14 +54 0x787B //RX_FDEQ_GAIN_15 55 0x4848 //RX_FDEQ_GAIN_16 56 0x4848 //RX_FDEQ_GAIN_17 57 0x4848 //RX_FDEQ_GAIN_18 @@ -10147,24 +14798,24 @@ 121 0x199A //RX_TDDRC_HMNC_GAIN 122 0x0001 //RX_TDDRC_SMT_FLAG 123 0x0CCD //RX_TDDRC_SMT_W -124 0x0550 //RX_TDDRC_DRC_GAIN +124 0x032A //RX_TDDRC_DRC_GAIN 38 0x0020 //RX_FDEQ_SUBNUM 39 0x4848 //RX_FDEQ_GAIN_0 -40 0x4848 //RX_FDEQ_GAIN_1 -41 0x4848 //RX_FDEQ_GAIN_2 -42 0x4848 //RX_FDEQ_GAIN_3 -43 0x4848 //RX_FDEQ_GAIN_4 -44 0x4848 //RX_FDEQ_GAIN_5 -45 0x4850 //RX_FDEQ_GAIN_6 -46 0x4848 //RX_FDEQ_GAIN_7 -47 0x4860 //RX_FDEQ_GAIN_8 -48 0x7468 //RX_FDEQ_GAIN_9 -49 0x6060 //RX_FDEQ_GAIN_10 -50 0x6060 //RX_FDEQ_GAIN_11 -51 0x5C54 //RX_FDEQ_GAIN_12 -52 0x5450 //RX_FDEQ_GAIN_13 -53 0x5050 //RX_FDEQ_GAIN_14 -54 0x5860 //RX_FDEQ_GAIN_15 +40 0x3B3B //RX_FDEQ_GAIN_1 +41 0x3942 //RX_FDEQ_GAIN_2 +42 0x4645 //RX_FDEQ_GAIN_3 +43 0x494A //RX_FDEQ_GAIN_4 +44 0x5D5A //RX_FDEQ_GAIN_5 +45 0x5B5B //RX_FDEQ_GAIN_6 +46 0x5A51 //RX_FDEQ_GAIN_7 +47 0x514F //RX_FDEQ_GAIN_8 +48 0x5555 //RX_FDEQ_GAIN_9 +49 0x5052 //RX_FDEQ_GAIN_10 +50 0x5453 //RX_FDEQ_GAIN_11 +51 0x514E //RX_FDEQ_GAIN_12 +52 0x4F59 //RX_FDEQ_GAIN_13 +53 0x6C76 //RX_FDEQ_GAIN_14 +54 0x787B //RX_FDEQ_GAIN_15 55 0x4848 //RX_FDEQ_GAIN_16 56 0x4848 //RX_FDEQ_GAIN_17 57 0x4848 //RX_FDEQ_GAIN_18 @@ -10246,24 +14897,24 @@ 121 0x199A //RX_TDDRC_HMNC_GAIN 122 0x0001 //RX_TDDRC_SMT_FLAG 123 0x0CCD //RX_TDDRC_SMT_W -124 0x0550 //RX_TDDRC_DRC_GAIN +124 0x032A //RX_TDDRC_DRC_GAIN 38 0x0020 //RX_FDEQ_SUBNUM 39 0x4848 //RX_FDEQ_GAIN_0 -40 0x4848 //RX_FDEQ_GAIN_1 -41 0x4848 //RX_FDEQ_GAIN_2 -42 0x4848 //RX_FDEQ_GAIN_3 -43 0x5454 //RX_FDEQ_GAIN_4 -44 0x7C54 //RX_FDEQ_GAIN_5 -45 0x4850 //RX_FDEQ_GAIN_6 -46 0x4848 //RX_FDEQ_GAIN_7 -47 0x4860 //RX_FDEQ_GAIN_8 -48 0x7468 //RX_FDEQ_GAIN_9 -49 0x6060 //RX_FDEQ_GAIN_10 -50 0x6060 //RX_FDEQ_GAIN_11 -51 0x5C54 //RX_FDEQ_GAIN_12 -52 0x5450 //RX_FDEQ_GAIN_13 -53 0x5050 //RX_FDEQ_GAIN_14 -54 0x5860 //RX_FDEQ_GAIN_15 +40 0x3B3B //RX_FDEQ_GAIN_1 +41 0x3942 //RX_FDEQ_GAIN_2 +42 0x4645 //RX_FDEQ_GAIN_3 +43 0x494A //RX_FDEQ_GAIN_4 +44 0x5D5A //RX_FDEQ_GAIN_5 +45 0x5B5B //RX_FDEQ_GAIN_6 +46 0x5A51 //RX_FDEQ_GAIN_7 +47 0x514F //RX_FDEQ_GAIN_8 +48 0x5555 //RX_FDEQ_GAIN_9 +49 0x5052 //RX_FDEQ_GAIN_10 +50 0x5453 //RX_FDEQ_GAIN_11 +51 0x514E //RX_FDEQ_GAIN_12 +52 0x4F59 //RX_FDEQ_GAIN_13 +53 0x6C76 //RX_FDEQ_GAIN_14 +54 0x787B //RX_FDEQ_GAIN_15 55 0x4848 //RX_FDEQ_GAIN_16 56 0x4848 //RX_FDEQ_GAIN_17 57 0x4848 //RX_FDEQ_GAIN_18 @@ -10345,24 +14996,24 @@ 121 0x199A //RX_TDDRC_HMNC_GAIN 122 0x0001 //RX_TDDRC_SMT_FLAG 123 0x0CCD //RX_TDDRC_SMT_W -124 0x0550 //RX_TDDRC_DRC_GAIN +124 0x032A //RX_TDDRC_DRC_GAIN 38 0x0020 //RX_FDEQ_SUBNUM 39 0x4848 //RX_FDEQ_GAIN_0 -40 0x4848 //RX_FDEQ_GAIN_1 -41 0x4848 //RX_FDEQ_GAIN_2 -42 0x4848 //RX_FDEQ_GAIN_3 -43 0x5454 //RX_FDEQ_GAIN_4 -44 0x7C54 //RX_FDEQ_GAIN_5 -45 0x4850 //RX_FDEQ_GAIN_6 -46 0x4848 //RX_FDEQ_GAIN_7 -47 0x4860 //RX_FDEQ_GAIN_8 -48 0x7468 //RX_FDEQ_GAIN_9 -49 0x6060 //RX_FDEQ_GAIN_10 -50 0x6060 //RX_FDEQ_GAIN_11 -51 0x5C54 //RX_FDEQ_GAIN_12 -52 0x5450 //RX_FDEQ_GAIN_13 -53 0x5050 //RX_FDEQ_GAIN_14 -54 0x5860 //RX_FDEQ_GAIN_15 +40 0x3B3B //RX_FDEQ_GAIN_1 +41 0x3942 //RX_FDEQ_GAIN_2 +42 0x4645 //RX_FDEQ_GAIN_3 +43 0x494A //RX_FDEQ_GAIN_4 +44 0x5D5A //RX_FDEQ_GAIN_5 +45 0x5B5B //RX_FDEQ_GAIN_6 +46 0x5A51 //RX_FDEQ_GAIN_7 +47 0x514F //RX_FDEQ_GAIN_8 +48 0x5555 //RX_FDEQ_GAIN_9 +49 0x5052 //RX_FDEQ_GAIN_10 +50 0x5453 //RX_FDEQ_GAIN_11 +51 0x514E //RX_FDEQ_GAIN_12 +52 0x4F59 //RX_FDEQ_GAIN_13 +53 0x6C76 //RX_FDEQ_GAIN_14 +54 0x787B //RX_FDEQ_GAIN_15 55 0x4848 //RX_FDEQ_GAIN_16 56 0x4848 //RX_FDEQ_GAIN_17 57 0x4848 //RX_FDEQ_GAIN_18 @@ -10444,24 +15095,24 @@ 121 0x199A //RX_TDDRC_HMNC_GAIN 122 0x0001 //RX_TDDRC_SMT_FLAG 123 0x0CCD //RX_TDDRC_SMT_W -124 0x0550 //RX_TDDRC_DRC_GAIN +124 0x032A //RX_TDDRC_DRC_GAIN 38 0x0020 //RX_FDEQ_SUBNUM 39 0x4848 //RX_FDEQ_GAIN_0 -40 0x4848 //RX_FDEQ_GAIN_1 -41 0x4848 //RX_FDEQ_GAIN_2 -42 0x4848 //RX_FDEQ_GAIN_3 -43 0x5454 //RX_FDEQ_GAIN_4 -44 0x7C54 //RX_FDEQ_GAIN_5 -45 0x4850 //RX_FDEQ_GAIN_6 -46 0x4848 //RX_FDEQ_GAIN_7 -47 0x4860 //RX_FDEQ_GAIN_8 -48 0x7468 //RX_FDEQ_GAIN_9 -49 0x6060 //RX_FDEQ_GAIN_10 -50 0x6060 //RX_FDEQ_GAIN_11 -51 0x5C54 //RX_FDEQ_GAIN_12 -52 0x5450 //RX_FDEQ_GAIN_13 -53 0x5050 //RX_FDEQ_GAIN_14 -54 0x5860 //RX_FDEQ_GAIN_15 +40 0x3B3B //RX_FDEQ_GAIN_1 +41 0x3942 //RX_FDEQ_GAIN_2 +42 0x4645 //RX_FDEQ_GAIN_3 +43 0x494A //RX_FDEQ_GAIN_4 +44 0x5D5A //RX_FDEQ_GAIN_5 +45 0x5B5B //RX_FDEQ_GAIN_6 +46 0x5A51 //RX_FDEQ_GAIN_7 +47 0x514F //RX_FDEQ_GAIN_8 +48 0x5555 //RX_FDEQ_GAIN_9 +49 0x5052 //RX_FDEQ_GAIN_10 +50 0x5453 //RX_FDEQ_GAIN_11 +51 0x514E //RX_FDEQ_GAIN_12 +52 0x4F59 //RX_FDEQ_GAIN_13 +53 0x6C76 //RX_FDEQ_GAIN_14 +54 0x787B //RX_FDEQ_GAIN_15 55 0x4848 //RX_FDEQ_GAIN_16 56 0x4848 //RX_FDEQ_GAIN_17 57 0x4848 //RX_FDEQ_GAIN_18 @@ -10520,10 +15171,862 @@ 110 0x0000 //RX_FDDRC_RESRV_0 129 0x0100 //RX_SPK_VOL 130 0x0000 //RX_VOL_RESRV_0 +#RX 2 +157 0x027C //RX_RECVFUNC_MODE_0 +158 0x0000 //RX_RECVFUNC_MODE_1 +159 0x0003 //RX_SAMPLINGFREQ_SIG +160 0x0003 //RX_SAMPLINGFREQ_PROC +161 0x000A //RX_FRAME_SZ +162 0x0000 //RX_DELAY_OPT +163 0x6000 //RX_TDDRC_ALPHA_UP_1 +164 0x6000 //RX_TDDRC_ALPHA_UP_2 +165 0x6000 //RX_TDDRC_ALPHA_UP_3 +166 0x1000 //RX_TDDRC_ALPHA_UP_4 +167 0x0800 //RX_PGA +168 0x7652 //RX_A_HP +169 0x4000 //RX_B_PE +170 0x7800 //RX_THR_PITCH_DET_0 +171 0x7000 //RX_THR_PITCH_DET_1 +172 0x6000 //RX_THR_PITCH_DET_2 +173 0x0008 //RX_PITCH_BFR_LEN +174 0x0003 //RX_SBD_PITCH_DET +175 0x0100 //RX_PP_RESRV_0 +176 0x0020 //RX_PP_RESRV_1 +177 0x0400 //RX_N_SN_EST +178 0x000C //RX_N2_SN_EST +179 0x0010 //RX_NS_LVL_CTRL +180 0xF800 //RX_THR_SN_EST +181 0x7E00 //RX_LAMBDA_PFILT +182 0x000A //RX_FENS_RESRV_0 +183 0x0190 //RX_FENS_RESRV_1 +184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +187 0x0002 //RX_EXTRA_NS_L +188 0x0800 //RX_EXTRA_NS_A +189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +190 0x7214 //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +192 0x199A //RX_A_POST_FLT +193 0x0000 //RX_LMT_THRD +194 0x4000 //RX_LMT_ALPHA +195 0x0020 //RX_FDEQ_SUBNUM +196 0x4848 //RX_FDEQ_GAIN_0 +197 0x4848 //RX_FDEQ_GAIN_1 +198 0x4848 //RX_FDEQ_GAIN_2 +199 0x4848 //RX_FDEQ_GAIN_3 +200 0x4848 //RX_FDEQ_GAIN_4 +201 0x4848 //RX_FDEQ_GAIN_5 +202 0x4850 //RX_FDEQ_GAIN_6 +203 0x4848 //RX_FDEQ_GAIN_7 +204 0x4860 //RX_FDEQ_GAIN_8 +205 0x7468 //RX_FDEQ_GAIN_9 +206 0x6060 //RX_FDEQ_GAIN_10 +207 0x6060 //RX_FDEQ_GAIN_11 +208 0x5C54 //RX_FDEQ_GAIN_12 +209 0x5450 //RX_FDEQ_GAIN_13 +210 0x5050 //RX_FDEQ_GAIN_14 +211 0x5860 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0202 //RX_FDEQ_BIN_0 +221 0x0203 //RX_FDEQ_BIN_1 +222 0x0303 //RX_FDEQ_BIN_2 +223 0x0304 //RX_FDEQ_BIN_3 +224 0x0404 //RX_FDEQ_BIN_4 +225 0x0308 //RX_FDEQ_BIN_5 +226 0x0808 //RX_FDEQ_BIN_6 +227 0x090A //RX_FDEQ_BIN_7 +228 0x0B0C //RX_FDEQ_BIN_8 +229 0x0D0E //RX_FDEQ_BIN_9 +230 0x1013 //RX_FDEQ_BIN_10 +231 0x1719 //RX_FDEQ_BIN_11 +232 0x1B1E //RX_FDEQ_BIN_12 +233 0x1E1E //RX_FDEQ_BIN_13 +234 0x1E28 //RX_FDEQ_BIN_14 +235 0x282C //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x4000 //RX_FDEQ_RESRV_0 +245 0x0320 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0035 //RX_FDDRC_BAND_MARGIN_1 +248 0x00D5 //RX_FDDRC_BAND_MARGIN_2 +249 0x0120 //RX_FDDRC_BAND_MARGIN_3 +250 0x0004 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x2000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x2000 //RX_FDDRC_THRD_3_2 +258 0x5000 //RX_FDDRC_THRD_3_3 +259 0x4000 //RX_FDDRC_SLANT_0_0 +260 0x4000 //RX_FDDRC_SLANT_0_1 +261 0x4000 //RX_FDDRC_SLANT_0_2 +262 0x4000 //RX_FDDRC_SLANT_0_3 +263 0x7FFF //RX_FDDRC_SLANT_1_0 +264 0x7FFF //RX_FDDRC_SLANT_1_1 +265 0x7FFF //RX_FDDRC_SLANT_1_2 +266 0x7FFF //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +268 0x0002 //RX_FILTINDX +269 0x0002 //RX_TDDRC_THRD_0 +270 0x0004 //RX_TDDRC_THRD_1 +271 0x1A00 //RX_TDDRC_THRD_2 +272 0x1A00 //RX_TDDRC_THRD_3 +273 0x7EB8 //RX_TDDRC_SLANT_0 +274 0x2500 //RX_TDDRC_SLANT_1 +275 0x6000 //RX_TDDRC_ALPHA_UP_0 +276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x199A //RX_TDDRC_HMNC_GAIN +279 0x0001 //RX_TDDRC_SMT_FLAG +280 0x0CCD //RX_TDDRC_SMT_W +281 0x0550 //RX_TDDRC_DRC_GAIN +282 0x7C00 //RX_LAMBDA_PKA_FP +283 0x2000 //RX_TPKA_FP +284 0x2000 //RX_MIN_G_FP +285 0x0080 //RX_MAX_G_FP +286 0x0014 //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 +288 0x0000 //RX_MAXLEVEL_CNG +289 0x3000 //RX_BWE_UV_TH +290 0x3000 //RX_BWE_UV_TH2 +291 0x1800 //RX_BWE_UV_TH3 +292 0x1000 //RX_BWE_V_TH +293 0x04CD //RX_BWE_GAIN1_V_TH1 +294 0x0F33 //RX_BWE_GAIN1_V_TH2 +295 0x7333 //RX_BWE_UV_EQ +296 0x199A //RX_BWE_V_EQ +297 0x7333 //RX_BWE_TONE_TH +298 0x0004 //RX_BWE_UV_HOLD_T +299 0x6CCD //RX_BWE_GAIN2_ALPHA +300 0x799A //RX_BWE_GAIN3_ALPHA +301 0x001E //RX_BWE_CUTOFF +302 0x3000 //RX_BWE_GAINFILL +303 0x3200 //RX_BWE_MAXTH_TONE +304 0x2000 //RX_BWE_EQ_0 +305 0x2000 //RX_BWE_EQ_1 +306 0x2000 //RX_BWE_EQ_2 +307 0x2000 //RX_BWE_EQ_3 +308 0x2000 //RX_BWE_EQ_4 +309 0x2000 //RX_BWE_EQ_5 +310 0x2000 //RX_BWE_EQ_6 +311 0x0000 //RX_BWE_RESRV_0 +312 0x0000 //RX_BWE_RESRV_1 +313 0x0000 //RX_BWE_RESRV_2 +#VOL 0 +163 0x6000 //RX_TDDRC_ALPHA_UP_1 +164 0x6000 //RX_TDDRC_ALPHA_UP_2 +165 0x6000 //RX_TDDRC_ALPHA_UP_3 +166 0x1000 //RX_TDDRC_ALPHA_UP_4 +184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +190 0x7214 //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +269 0x0002 //RX_TDDRC_THRD_0 +270 0x0004 //RX_TDDRC_THRD_1 +271 0x1A00 //RX_TDDRC_THRD_2 +272 0x1A00 //RX_TDDRC_THRD_3 +273 0x7EB8 //RX_TDDRC_SLANT_0 +274 0x2500 //RX_TDDRC_SLANT_1 +275 0x6000 //RX_TDDRC_ALPHA_UP_0 +276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x199A //RX_TDDRC_HMNC_GAIN +279 0x0001 //RX_TDDRC_SMT_FLAG +280 0x0CCD //RX_TDDRC_SMT_W +281 0x0550 //RX_TDDRC_DRC_GAIN +195 0x0020 //RX_FDEQ_SUBNUM +196 0x4848 //RX_FDEQ_GAIN_0 +197 0x4848 //RX_FDEQ_GAIN_1 +198 0x4848 //RX_FDEQ_GAIN_2 +199 0x4848 //RX_FDEQ_GAIN_3 +200 0x4848 //RX_FDEQ_GAIN_4 +201 0x4848 //RX_FDEQ_GAIN_5 +202 0x4850 //RX_FDEQ_GAIN_6 +203 0x4848 //RX_FDEQ_GAIN_7 +204 0x4860 //RX_FDEQ_GAIN_8 +205 0x7468 //RX_FDEQ_GAIN_9 +206 0x6060 //RX_FDEQ_GAIN_10 +207 0x6060 //RX_FDEQ_GAIN_11 +208 0x5C54 //RX_FDEQ_GAIN_12 +209 0x5450 //RX_FDEQ_GAIN_13 +210 0x5050 //RX_FDEQ_GAIN_14 +211 0x5860 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0202 //RX_FDEQ_BIN_0 +221 0x0203 //RX_FDEQ_BIN_1 +222 0x0303 //RX_FDEQ_BIN_2 +223 0x0304 //RX_FDEQ_BIN_3 +224 0x0404 //RX_FDEQ_BIN_4 +225 0x0308 //RX_FDEQ_BIN_5 +226 0x0808 //RX_FDEQ_BIN_6 +227 0x090A //RX_FDEQ_BIN_7 +228 0x0B0C //RX_FDEQ_BIN_8 +229 0x0D0E //RX_FDEQ_BIN_9 +230 0x1013 //RX_FDEQ_BIN_10 +231 0x1719 //RX_FDEQ_BIN_11 +232 0x1B1E //RX_FDEQ_BIN_12 +233 0x1E1E //RX_FDEQ_BIN_13 +234 0x1E28 //RX_FDEQ_BIN_14 +235 0x282C //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x4000 //RX_FDEQ_RESRV_0 +245 0x0320 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0035 //RX_FDDRC_BAND_MARGIN_1 +248 0x00D5 //RX_FDDRC_BAND_MARGIN_2 +249 0x0120 //RX_FDDRC_BAND_MARGIN_3 +250 0x0004 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x2000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x2000 //RX_FDDRC_THRD_3_2 +258 0x5000 //RX_FDDRC_THRD_3_3 +259 0x4000 //RX_FDDRC_SLANT_0_0 +260 0x4000 //RX_FDDRC_SLANT_0_1 +261 0x4000 //RX_FDDRC_SLANT_0_2 +262 0x4000 //RX_FDDRC_SLANT_0_3 +263 0x7FFF //RX_FDDRC_SLANT_1_0 +264 0x7FFF //RX_FDDRC_SLANT_1_1 +265 0x7FFF //RX_FDDRC_SLANT_1_2 +266 0x7FFF //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +286 0x0014 //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 +#VOL 1 +163 0x6000 //RX_TDDRC_ALPHA_UP_1 +164 0x6000 //RX_TDDRC_ALPHA_UP_2 +165 0x6000 //RX_TDDRC_ALPHA_UP_3 +166 0x1000 //RX_TDDRC_ALPHA_UP_4 +184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +190 0x7214 //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +269 0x0002 //RX_TDDRC_THRD_0 +270 0x0004 //RX_TDDRC_THRD_1 +271 0x1A00 //RX_TDDRC_THRD_2 +272 0x1A00 //RX_TDDRC_THRD_3 +273 0x7EB8 //RX_TDDRC_SLANT_0 +274 0x2500 //RX_TDDRC_SLANT_1 +275 0x6000 //RX_TDDRC_ALPHA_UP_0 +276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x199A //RX_TDDRC_HMNC_GAIN +279 0x0001 //RX_TDDRC_SMT_FLAG +280 0x0CCD //RX_TDDRC_SMT_W +281 0x0550 //RX_TDDRC_DRC_GAIN +195 0x0020 //RX_FDEQ_SUBNUM +196 0x4848 //RX_FDEQ_GAIN_0 +197 0x4848 //RX_FDEQ_GAIN_1 +198 0x4848 //RX_FDEQ_GAIN_2 +199 0x4848 //RX_FDEQ_GAIN_3 +200 0x4848 //RX_FDEQ_GAIN_4 +201 0x4848 //RX_FDEQ_GAIN_5 +202 0x4850 //RX_FDEQ_GAIN_6 +203 0x4848 //RX_FDEQ_GAIN_7 +204 0x4860 //RX_FDEQ_GAIN_8 +205 0x7468 //RX_FDEQ_GAIN_9 +206 0x6060 //RX_FDEQ_GAIN_10 +207 0x6060 //RX_FDEQ_GAIN_11 +208 0x5C54 //RX_FDEQ_GAIN_12 +209 0x5450 //RX_FDEQ_GAIN_13 +210 0x5050 //RX_FDEQ_GAIN_14 +211 0x5860 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0202 //RX_FDEQ_BIN_0 +221 0x0203 //RX_FDEQ_BIN_1 +222 0x0303 //RX_FDEQ_BIN_2 +223 0x0304 //RX_FDEQ_BIN_3 +224 0x0404 //RX_FDEQ_BIN_4 +225 0x0308 //RX_FDEQ_BIN_5 +226 0x0808 //RX_FDEQ_BIN_6 +227 0x090A //RX_FDEQ_BIN_7 +228 0x0B0C //RX_FDEQ_BIN_8 +229 0x0D0E //RX_FDEQ_BIN_9 +230 0x1013 //RX_FDEQ_BIN_10 +231 0x1719 //RX_FDEQ_BIN_11 +232 0x1B1E //RX_FDEQ_BIN_12 +233 0x1E1E //RX_FDEQ_BIN_13 +234 0x1E28 //RX_FDEQ_BIN_14 +235 0x282C //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x4000 //RX_FDEQ_RESRV_0 +245 0x0320 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0035 //RX_FDDRC_BAND_MARGIN_1 +248 0x00D5 //RX_FDDRC_BAND_MARGIN_2 +249 0x0120 //RX_FDDRC_BAND_MARGIN_3 +250 0x0004 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x2000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x2000 //RX_FDDRC_THRD_3_2 +258 0x5000 //RX_FDDRC_THRD_3_3 +259 0x4000 //RX_FDDRC_SLANT_0_0 +260 0x4000 //RX_FDDRC_SLANT_0_1 +261 0x4000 //RX_FDDRC_SLANT_0_2 +262 0x4000 //RX_FDDRC_SLANT_0_3 +263 0x7FFF //RX_FDDRC_SLANT_1_0 +264 0x7FFF //RX_FDDRC_SLANT_1_1 +265 0x7FFF //RX_FDDRC_SLANT_1_2 +266 0x7FFF //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +286 0x001D //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 +#VOL 2 +163 0x6000 //RX_TDDRC_ALPHA_UP_1 +164 0x6000 //RX_TDDRC_ALPHA_UP_2 +165 0x6000 //RX_TDDRC_ALPHA_UP_3 +166 0x1000 //RX_TDDRC_ALPHA_UP_4 +184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +190 0x7214 //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +269 0x0002 //RX_TDDRC_THRD_0 +270 0x0004 //RX_TDDRC_THRD_1 +271 0x1A00 //RX_TDDRC_THRD_2 +272 0x1A00 //RX_TDDRC_THRD_3 +273 0x7EB8 //RX_TDDRC_SLANT_0 +274 0x2500 //RX_TDDRC_SLANT_1 +275 0x6000 //RX_TDDRC_ALPHA_UP_0 +276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x199A //RX_TDDRC_HMNC_GAIN +279 0x0001 //RX_TDDRC_SMT_FLAG +280 0x0CCD //RX_TDDRC_SMT_W +281 0x0550 //RX_TDDRC_DRC_GAIN +195 0x0020 //RX_FDEQ_SUBNUM +196 0x4848 //RX_FDEQ_GAIN_0 +197 0x4848 //RX_FDEQ_GAIN_1 +198 0x4848 //RX_FDEQ_GAIN_2 +199 0x4848 //RX_FDEQ_GAIN_3 +200 0x4848 //RX_FDEQ_GAIN_4 +201 0x4848 //RX_FDEQ_GAIN_5 +202 0x4850 //RX_FDEQ_GAIN_6 +203 0x4848 //RX_FDEQ_GAIN_7 +204 0x4860 //RX_FDEQ_GAIN_8 +205 0x7468 //RX_FDEQ_GAIN_9 +206 0x6060 //RX_FDEQ_GAIN_10 +207 0x6060 //RX_FDEQ_GAIN_11 +208 0x5C54 //RX_FDEQ_GAIN_12 +209 0x5450 //RX_FDEQ_GAIN_13 +210 0x5050 //RX_FDEQ_GAIN_14 +211 0x5860 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0202 //RX_FDEQ_BIN_0 +221 0x0203 //RX_FDEQ_BIN_1 +222 0x0303 //RX_FDEQ_BIN_2 +223 0x0304 //RX_FDEQ_BIN_3 +224 0x0404 //RX_FDEQ_BIN_4 +225 0x0308 //RX_FDEQ_BIN_5 +226 0x0808 //RX_FDEQ_BIN_6 +227 0x090A //RX_FDEQ_BIN_7 +228 0x0B0C //RX_FDEQ_BIN_8 +229 0x0D0E //RX_FDEQ_BIN_9 +230 0x1013 //RX_FDEQ_BIN_10 +231 0x1719 //RX_FDEQ_BIN_11 +232 0x1B1E //RX_FDEQ_BIN_12 +233 0x1E1E //RX_FDEQ_BIN_13 +234 0x1E28 //RX_FDEQ_BIN_14 +235 0x282C //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x4000 //RX_FDEQ_RESRV_0 +245 0x0320 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0035 //RX_FDDRC_BAND_MARGIN_1 +248 0x00D5 //RX_FDDRC_BAND_MARGIN_2 +249 0x0120 //RX_FDDRC_BAND_MARGIN_3 +250 0x0004 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x2000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x2000 //RX_FDDRC_THRD_3_2 +258 0x5000 //RX_FDDRC_THRD_3_3 +259 0x4000 //RX_FDDRC_SLANT_0_0 +260 0x4000 //RX_FDDRC_SLANT_0_1 +261 0x4000 //RX_FDDRC_SLANT_0_2 +262 0x4000 //RX_FDDRC_SLANT_0_3 +263 0x7FFF //RX_FDDRC_SLANT_1_0 +264 0x7FFF //RX_FDDRC_SLANT_1_1 +265 0x7FFF //RX_FDDRC_SLANT_1_2 +266 0x7FFF //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +286 0x0029 //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 +#VOL 3 +163 0x6000 //RX_TDDRC_ALPHA_UP_1 +164 0x6000 //RX_TDDRC_ALPHA_UP_2 +165 0x6000 //RX_TDDRC_ALPHA_UP_3 +166 0x1000 //RX_TDDRC_ALPHA_UP_4 +184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +190 0x7214 //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +269 0x0002 //RX_TDDRC_THRD_0 +270 0x0004 //RX_TDDRC_THRD_1 +271 0x1A00 //RX_TDDRC_THRD_2 +272 0x1A00 //RX_TDDRC_THRD_3 +273 0x7EB8 //RX_TDDRC_SLANT_0 +274 0x2500 //RX_TDDRC_SLANT_1 +275 0x6000 //RX_TDDRC_ALPHA_UP_0 +276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x199A //RX_TDDRC_HMNC_GAIN +279 0x0001 //RX_TDDRC_SMT_FLAG +280 0x0CCD //RX_TDDRC_SMT_W +281 0x0550 //RX_TDDRC_DRC_GAIN +195 0x0020 //RX_FDEQ_SUBNUM +196 0x4848 //RX_FDEQ_GAIN_0 +197 0x4848 //RX_FDEQ_GAIN_1 +198 0x4848 //RX_FDEQ_GAIN_2 +199 0x4848 //RX_FDEQ_GAIN_3 +200 0x4848 //RX_FDEQ_GAIN_4 +201 0x4848 //RX_FDEQ_GAIN_5 +202 0x4850 //RX_FDEQ_GAIN_6 +203 0x4848 //RX_FDEQ_GAIN_7 +204 0x4860 //RX_FDEQ_GAIN_8 +205 0x7468 //RX_FDEQ_GAIN_9 +206 0x6060 //RX_FDEQ_GAIN_10 +207 0x6060 //RX_FDEQ_GAIN_11 +208 0x5C54 //RX_FDEQ_GAIN_12 +209 0x5450 //RX_FDEQ_GAIN_13 +210 0x5050 //RX_FDEQ_GAIN_14 +211 0x5860 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0202 //RX_FDEQ_BIN_0 +221 0x0203 //RX_FDEQ_BIN_1 +222 0x0303 //RX_FDEQ_BIN_2 +223 0x0304 //RX_FDEQ_BIN_3 +224 0x0404 //RX_FDEQ_BIN_4 +225 0x0308 //RX_FDEQ_BIN_5 +226 0x0808 //RX_FDEQ_BIN_6 +227 0x090A //RX_FDEQ_BIN_7 +228 0x0B0C //RX_FDEQ_BIN_8 +229 0x0D0E //RX_FDEQ_BIN_9 +230 0x1013 //RX_FDEQ_BIN_10 +231 0x1719 //RX_FDEQ_BIN_11 +232 0x1B1E //RX_FDEQ_BIN_12 +233 0x1E1E //RX_FDEQ_BIN_13 +234 0x1E28 //RX_FDEQ_BIN_14 +235 0x282C //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x4000 //RX_FDEQ_RESRV_0 +245 0x0320 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0035 //RX_FDDRC_BAND_MARGIN_1 +248 0x00D5 //RX_FDDRC_BAND_MARGIN_2 +249 0x0120 //RX_FDDRC_BAND_MARGIN_3 +250 0x0004 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x2000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x2000 //RX_FDDRC_THRD_3_2 +258 0x5000 //RX_FDDRC_THRD_3_3 +259 0x4000 //RX_FDDRC_SLANT_0_0 +260 0x4000 //RX_FDDRC_SLANT_0_1 +261 0x4000 //RX_FDDRC_SLANT_0_2 +262 0x4000 //RX_FDDRC_SLANT_0_3 +263 0x7FFF //RX_FDDRC_SLANT_1_0 +264 0x7FFF //RX_FDDRC_SLANT_1_1 +265 0x7FFF //RX_FDDRC_SLANT_1_2 +266 0x7FFF //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +286 0x0039 //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 +#VOL 4 +163 0x6000 //RX_TDDRC_ALPHA_UP_1 +164 0x6000 //RX_TDDRC_ALPHA_UP_2 +165 0x6000 //RX_TDDRC_ALPHA_UP_3 +166 0x1000 //RX_TDDRC_ALPHA_UP_4 +184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +190 0x7214 //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +269 0x0002 //RX_TDDRC_THRD_0 +270 0x0004 //RX_TDDRC_THRD_1 +271 0x1A00 //RX_TDDRC_THRD_2 +272 0x1A00 //RX_TDDRC_THRD_3 +273 0x7EB8 //RX_TDDRC_SLANT_0 +274 0x2500 //RX_TDDRC_SLANT_1 +275 0x6000 //RX_TDDRC_ALPHA_UP_0 +276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x199A //RX_TDDRC_HMNC_GAIN +279 0x0001 //RX_TDDRC_SMT_FLAG +280 0x0CCD //RX_TDDRC_SMT_W +281 0x0550 //RX_TDDRC_DRC_GAIN +195 0x0020 //RX_FDEQ_SUBNUM +196 0x4848 //RX_FDEQ_GAIN_0 +197 0x4848 //RX_FDEQ_GAIN_1 +198 0x4848 //RX_FDEQ_GAIN_2 +199 0x4848 //RX_FDEQ_GAIN_3 +200 0x5454 //RX_FDEQ_GAIN_4 +201 0x7C54 //RX_FDEQ_GAIN_5 +202 0x4850 //RX_FDEQ_GAIN_6 +203 0x4848 //RX_FDEQ_GAIN_7 +204 0x4860 //RX_FDEQ_GAIN_8 +205 0x7468 //RX_FDEQ_GAIN_9 +206 0x6060 //RX_FDEQ_GAIN_10 +207 0x6060 //RX_FDEQ_GAIN_11 +208 0x5C54 //RX_FDEQ_GAIN_12 +209 0x5450 //RX_FDEQ_GAIN_13 +210 0x5050 //RX_FDEQ_GAIN_14 +211 0x5860 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0202 //RX_FDEQ_BIN_0 +221 0x0203 //RX_FDEQ_BIN_1 +222 0x0303 //RX_FDEQ_BIN_2 +223 0x0304 //RX_FDEQ_BIN_3 +224 0x0404 //RX_FDEQ_BIN_4 +225 0x0308 //RX_FDEQ_BIN_5 +226 0x0808 //RX_FDEQ_BIN_6 +227 0x090A //RX_FDEQ_BIN_7 +228 0x0B0C //RX_FDEQ_BIN_8 +229 0x0D0E //RX_FDEQ_BIN_9 +230 0x1013 //RX_FDEQ_BIN_10 +231 0x1719 //RX_FDEQ_BIN_11 +232 0x1B1E //RX_FDEQ_BIN_12 +233 0x1E1E //RX_FDEQ_BIN_13 +234 0x1E28 //RX_FDEQ_BIN_14 +235 0x282C //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x4000 //RX_FDEQ_RESRV_0 +245 0x0320 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0035 //RX_FDDRC_BAND_MARGIN_1 +248 0x00D5 //RX_FDDRC_BAND_MARGIN_2 +249 0x0120 //RX_FDDRC_BAND_MARGIN_3 +250 0x0004 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x2000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x2000 //RX_FDDRC_THRD_3_2 +258 0x5000 //RX_FDDRC_THRD_3_3 +259 0x4000 //RX_FDDRC_SLANT_0_0 +260 0x4000 //RX_FDDRC_SLANT_0_1 +261 0x4000 //RX_FDDRC_SLANT_0_2 +262 0x4000 //RX_FDDRC_SLANT_0_3 +263 0x7FFF //RX_FDDRC_SLANT_1_0 +264 0x7FFF //RX_FDDRC_SLANT_1_1 +265 0x7FFF //RX_FDDRC_SLANT_1_2 +266 0x7FFF //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +286 0x005F //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 +#VOL 5 +163 0x6000 //RX_TDDRC_ALPHA_UP_1 +164 0x6000 //RX_TDDRC_ALPHA_UP_2 +165 0x6000 //RX_TDDRC_ALPHA_UP_3 +166 0x1000 //RX_TDDRC_ALPHA_UP_4 +184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +190 0x7214 //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +269 0x0002 //RX_TDDRC_THRD_0 +270 0x0004 //RX_TDDRC_THRD_1 +271 0x1A00 //RX_TDDRC_THRD_2 +272 0x1A00 //RX_TDDRC_THRD_3 +273 0x7EB8 //RX_TDDRC_SLANT_0 +274 0x2500 //RX_TDDRC_SLANT_1 +275 0x6000 //RX_TDDRC_ALPHA_UP_0 +276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x199A //RX_TDDRC_HMNC_GAIN +279 0x0001 //RX_TDDRC_SMT_FLAG +280 0x0CCD //RX_TDDRC_SMT_W +281 0x0550 //RX_TDDRC_DRC_GAIN +195 0x0020 //RX_FDEQ_SUBNUM +196 0x4848 //RX_FDEQ_GAIN_0 +197 0x4848 //RX_FDEQ_GAIN_1 +198 0x4848 //RX_FDEQ_GAIN_2 +199 0x4848 //RX_FDEQ_GAIN_3 +200 0x5454 //RX_FDEQ_GAIN_4 +201 0x7C54 //RX_FDEQ_GAIN_5 +202 0x4850 //RX_FDEQ_GAIN_6 +203 0x4848 //RX_FDEQ_GAIN_7 +204 0x4860 //RX_FDEQ_GAIN_8 +205 0x7468 //RX_FDEQ_GAIN_9 +206 0x6060 //RX_FDEQ_GAIN_10 +207 0x6060 //RX_FDEQ_GAIN_11 +208 0x5C54 //RX_FDEQ_GAIN_12 +209 0x5450 //RX_FDEQ_GAIN_13 +210 0x5050 //RX_FDEQ_GAIN_14 +211 0x5860 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0202 //RX_FDEQ_BIN_0 +221 0x0203 //RX_FDEQ_BIN_1 +222 0x0303 //RX_FDEQ_BIN_2 +223 0x0304 //RX_FDEQ_BIN_3 +224 0x0404 //RX_FDEQ_BIN_4 +225 0x0308 //RX_FDEQ_BIN_5 +226 0x0808 //RX_FDEQ_BIN_6 +227 0x090A //RX_FDEQ_BIN_7 +228 0x0B0C //RX_FDEQ_BIN_8 +229 0x0D0E //RX_FDEQ_BIN_9 +230 0x1013 //RX_FDEQ_BIN_10 +231 0x1719 //RX_FDEQ_BIN_11 +232 0x1B1E //RX_FDEQ_BIN_12 +233 0x1E1E //RX_FDEQ_BIN_13 +234 0x1E28 //RX_FDEQ_BIN_14 +235 0x282C //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x4000 //RX_FDEQ_RESRV_0 +245 0x0320 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0035 //RX_FDDRC_BAND_MARGIN_1 +248 0x00D5 //RX_FDDRC_BAND_MARGIN_2 +249 0x0120 //RX_FDDRC_BAND_MARGIN_3 +250 0x0004 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x2000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x2000 //RX_FDDRC_THRD_3_2 +258 0x5000 //RX_FDDRC_THRD_3_3 +259 0x4000 //RX_FDDRC_SLANT_0_0 +260 0x4000 //RX_FDDRC_SLANT_0_1 +261 0x4000 //RX_FDDRC_SLANT_0_2 +262 0x4000 //RX_FDDRC_SLANT_0_3 +263 0x7FFF //RX_FDDRC_SLANT_1_0 +264 0x7FFF //RX_FDDRC_SLANT_1_1 +265 0x7FFF //RX_FDDRC_SLANT_1_2 +266 0x7FFF //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +286 0x008E //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 +#VOL 6 +163 0x6000 //RX_TDDRC_ALPHA_UP_1 +164 0x6000 //RX_TDDRC_ALPHA_UP_2 +165 0x6000 //RX_TDDRC_ALPHA_UP_3 +166 0x1000 //RX_TDDRC_ALPHA_UP_4 +184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +190 0x7214 //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +269 0x0002 //RX_TDDRC_THRD_0 +270 0x0004 //RX_TDDRC_THRD_1 +271 0x1A00 //RX_TDDRC_THRD_2 +272 0x1A00 //RX_TDDRC_THRD_3 +273 0x7EB8 //RX_TDDRC_SLANT_0 +274 0x2500 //RX_TDDRC_SLANT_1 +275 0x6000 //RX_TDDRC_ALPHA_UP_0 +276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x199A //RX_TDDRC_HMNC_GAIN +279 0x0001 //RX_TDDRC_SMT_FLAG +280 0x0CCD //RX_TDDRC_SMT_W +281 0x0550 //RX_TDDRC_DRC_GAIN +195 0x0020 //RX_FDEQ_SUBNUM +196 0x4848 //RX_FDEQ_GAIN_0 +197 0x4848 //RX_FDEQ_GAIN_1 +198 0x4848 //RX_FDEQ_GAIN_2 +199 0x4848 //RX_FDEQ_GAIN_3 +200 0x5454 //RX_FDEQ_GAIN_4 +201 0x7C54 //RX_FDEQ_GAIN_5 +202 0x4850 //RX_FDEQ_GAIN_6 +203 0x4848 //RX_FDEQ_GAIN_7 +204 0x4860 //RX_FDEQ_GAIN_8 +205 0x7468 //RX_FDEQ_GAIN_9 +206 0x6060 //RX_FDEQ_GAIN_10 +207 0x6060 //RX_FDEQ_GAIN_11 +208 0x5C54 //RX_FDEQ_GAIN_12 +209 0x5450 //RX_FDEQ_GAIN_13 +210 0x5050 //RX_FDEQ_GAIN_14 +211 0x5860 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0202 //RX_FDEQ_BIN_0 +221 0x0203 //RX_FDEQ_BIN_1 +222 0x0303 //RX_FDEQ_BIN_2 +223 0x0304 //RX_FDEQ_BIN_3 +224 0x0404 //RX_FDEQ_BIN_4 +225 0x0308 //RX_FDEQ_BIN_5 +226 0x0808 //RX_FDEQ_BIN_6 +227 0x090A //RX_FDEQ_BIN_7 +228 0x0B0C //RX_FDEQ_BIN_8 +229 0x0D0E //RX_FDEQ_BIN_9 +230 0x1013 //RX_FDEQ_BIN_10 +231 0x1719 //RX_FDEQ_BIN_11 +232 0x1B1E //RX_FDEQ_BIN_12 +233 0x1E1E //RX_FDEQ_BIN_13 +234 0x1E28 //RX_FDEQ_BIN_14 +235 0x282C //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x4000 //RX_FDEQ_RESRV_0 +245 0x0320 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0035 //RX_FDDRC_BAND_MARGIN_1 +248 0x00D5 //RX_FDDRC_BAND_MARGIN_2 +249 0x0120 //RX_FDDRC_BAND_MARGIN_3 +250 0x0004 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x2000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x2000 //RX_FDDRC_THRD_3_2 +258 0x5000 //RX_FDDRC_THRD_3_3 +259 0x4000 //RX_FDDRC_SLANT_0_0 +260 0x4000 //RX_FDDRC_SLANT_0_1 +261 0x4000 //RX_FDDRC_SLANT_0_2 +262 0x4000 //RX_FDDRC_SLANT_0_3 +263 0x7FFF //RX_FDDRC_SLANT_1_0 +264 0x7FFF //RX_FDDRC_SLANT_1_1 +265 0x7FFF //RX_FDDRC_SLANT_1_2 +266 0x7FFF //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +286 0x0100 //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 -#CASE_NAME HANDSFREE-HANDSFREE-VOICE_GENERIC-FB -#PARAM_TYPE TX+RX -#TOTAL_CUSTOM_STEP 7 +#CASE_NAME HANDSFREE-HANDFREE-VOICE_GENERIC-FB +#PARAM_MODE FULL +#PARAM_TYPE TX+2RX +#TOTAL_CUSTOM_STEP 7+7 #TX 0 0x0001 //TX_OPERATION_MODE_0 1 0x0001 //TX_OPERATION_MODE_1 @@ -10776,11 +16279,11 @@ 248 0xF800 //TX_THR_SN_EST_6 249 0xF800 //TX_THR_SN_EST_7 250 0x0100 //TX_DELTA_THR_SN_EST_0 -251 0x0200 //TX_DELTA_THR_SN_EST_1 -252 0x0100 //TX_DELTA_THR_SN_EST_2 -253 0x0200 //TX_DELTA_THR_SN_EST_3 +251 0x0100 //TX_DELTA_THR_SN_EST_1 +252 0x0200 //TX_DELTA_THR_SN_EST_2 +253 0x0100 //TX_DELTA_THR_SN_EST_3 254 0x0100 //TX_DELTA_THR_SN_EST_4 -255 0x0100 //TX_DELTA_THR_SN_EST_5 +255 0x0200 //TX_DELTA_THR_SN_EST_5 256 0x0200 //TX_DELTA_THR_SN_EST_6 257 0x0200 //TX_DELTA_THR_SN_EST_7 258 0x4000 //TX_LAMBDA_NN_EST_0 @@ -10808,11 +16311,11 @@ 280 0x1000 //TX_B_POST_FLT_1 281 0x0010 //TX_NS_LVL_CTRL_0 282 0x0014 //TX_NS_LVL_CTRL_1 -283 0x0014 //TX_NS_LVL_CTRL_2 -284 0x0018 //TX_NS_LVL_CTRL_3 -285 0x0016 //TX_NS_LVL_CTRL_4 -286 0x0014 //TX_NS_LVL_CTRL_5 -287 0x0011 //TX_NS_LVL_CTRL_6 +283 0x0018 //TX_NS_LVL_CTRL_2 +284 0x0016 //TX_NS_LVL_CTRL_3 +285 0x0014 //TX_NS_LVL_CTRL_4 +286 0x0011 //TX_NS_LVL_CTRL_5 +287 0x0014 //TX_NS_LVL_CTRL_6 288 0x0011 //TX_NS_LVL_CTRL_7 289 0x000F //TX_MIN_GAIN_S_0 290 0x0010 //TX_MIN_GAIN_S_1 @@ -10830,8 +16333,8 @@ 302 0x4000 //TX_SNRI_SUP_2 303 0x4000 //TX_SNRI_SUP_3 304 0x4000 //TX_SNRI_SUP_4 -305 0x4000 //TX_SNRI_SUP_5 -306 0x50C0 //TX_SNRI_SUP_6 +305 0x50C0 //TX_SNRI_SUP_5 +306 0x4000 //TX_SNRI_SUP_6 307 0x7FFF //TX_SNRI_SUP_7 308 0x7FFF //TX_THR_LFNS 309 0x0018 //TX_G_LFNS @@ -10840,19 +16343,19 @@ 312 0x7FFF //TX_A_POST_FILT_0 313 0x2000 //TX_A_POST_FILT_1 314 0x5000 //TX_A_POST_FILT_S_0 -315 0x6000 //TX_A_POST_FILT_S_1 -316 0x4C00 //TX_A_POST_FILT_S_2 -317 0x4000 //TX_A_POST_FILT_S_3 -318 0x6000 //TX_A_POST_FILT_S_4 -319 0x4000 //TX_A_POST_FILT_S_5 -320 0x5000 //TX_A_POST_FILT_S_6 +315 0x4C00 //TX_A_POST_FILT_S_1 +316 0x4000 //TX_A_POST_FILT_S_2 +317 0x6000 //TX_A_POST_FILT_S_3 +318 0x4000 //TX_A_POST_FILT_S_4 +319 0x5000 //TX_A_POST_FILT_S_5 +320 0x6000 //TX_A_POST_FILT_S_6 321 0x7000 //TX_A_POST_FILT_S_7 322 0x2000 //TX_B_POST_FILT_0 -323 0x1000 //TX_B_POST_FILT_1 +323 0x2000 //TX_B_POST_FILT_1 324 0x2000 //TX_B_POST_FILT_2 -325 0x2000 //TX_B_POST_FILT_3 +325 0x4000 //TX_B_POST_FILT_3 326 0x4000 //TX_B_POST_FILT_4 -327 0x4000 //TX_B_POST_FILT_5 +327 0x1000 //TX_B_POST_FILT_5 328 0x1000 //TX_B_POST_FILT_6 329 0x2000 //TX_B_POST_FILT_7 330 0x4000 //TX_B_LESSCUT_RTO_S_0 @@ -10860,14 +16363,14 @@ 332 0x7FFF //TX_B_LESSCUT_RTO_S_2 333 0x7FFF //TX_B_LESSCUT_RTO_S_3 334 0x7FFF //TX_B_LESSCUT_RTO_S_4 -335 0x7FFF //TX_B_LESSCUT_RTO_S_5 -336 0x6000 //TX_B_LESSCUT_RTO_S_6 +335 0x6000 //TX_B_LESSCUT_RTO_S_5 +336 0x7FFF //TX_B_LESSCUT_RTO_S_6 337 0x7FFF //TX_B_LESSCUT_RTO_S_7 338 0x7C00 //TX_LAMBDA_PFILT 339 0x7C00 //TX_LAMBDA_PFILT_S_0 340 0x7C00 //TX_LAMBDA_PFILT_S_1 -341 0x7C00 //TX_LAMBDA_PFILT_S_2 -342 0x7A00 //TX_LAMBDA_PFILT_S_3 +341 0x7A00 //TX_LAMBDA_PFILT_S_2 +342 0x7C00 //TX_LAMBDA_PFILT_S_3 343 0x7C00 //TX_LAMBDA_PFILT_S_4 344 0x7C00 //TX_LAMBDA_PFILT_S_5 345 0x7C00 //TX_LAMBDA_PFILT_S_6 @@ -10905,10 +16408,10 @@ 377 0x7FFF //TX_NOISE_TH_5_4 378 0x2710 //TX_NOISE_TH_6 379 0x0033 //TX_MINENOISE_TH -380 0x4000 //TX_MINENOISE_MIC0_TH_MTS -381 0xFFEE //TX_MINENOISE_MIC0_TH_EXP -382 0x6000 //TX_MINENOISE_MIC0_S_TH_MTS -383 0xFFF3 //TX_MINENOISE_MIC0_S_TH_EXP +380 0xD508 //TX_MORENS_TFMASK_TH +381 0x0001 //TX_DRC_QUIET_FLOOR +382 0x7999 //TX_RATIODTL_CUT_TH +383 0x0119 //TX_DT_CUT_K1 384 0x0666 //TX_OUT_ENER_S_TH_CLEAN 385 0x0666 //TX_OUT_ENER_S_TH_LESSCLEAN 386 0x0333 //TX_OUT_ENER_S_TH_NOISY @@ -10916,15 +16419,15 @@ 388 0x0333 //TX_OUT_ENER_TH_SPEECH 389 0x2000 //TX_SN_NPB_GAIN 390 0x0000 //TX_NN_NPB_GAIN -391 0x0000 //TX_CSX_ALPHA_0 -392 0x0000 //TX_CSX_ALPHA_1 -393 0x0000 //TX_CSX_ALPHA_2 -394 0x0000 //TX_CSX_ALPHA_3 -395 0x0800 //TX_MU_ARSP_EST -396 0x00C8 //TX_P_OUTBEAM_MIN_TH +391 0x7FFF //TX_POST_MASK_SUP_HSNE +392 0x1388 //TX_TAIL_DET_TH +393 0x4000 //TX_B_LESSCUT_RTO_WTA +394 0x0000 //TX_MEL_G_R +395 0x0080 //TX_SUPHIGH_TH +396 0x0000 //TX_MASK_G_R 397 0x0002 //TX_EXTRA_NS_L -398 0x0800 //TX_EXTRA_NS_A -399 0x0005 //TX_VR_NOISE_FLOOR_TH +398 0x1800 //TX_C_POST_FLT_MASK +399 0x4000 //TX_A_POST_FLT_WNS 400 0x0148 //TX_MIN_G_LOW300HZ 401 0x0002 //TX_MAXLEVEL_CNG 402 0x00B4 //TX_STN_NOISE_TH @@ -11039,16 +16542,16 @@ 511 0x6666 //TX_MIC_TO_BFGAIN 512 0x0000 //TX_MICTOBFGAIN0 513 0x0000 //TX_FASTMUE_TH -514 0x0000 //TX_DERVB_LEN_0 -515 0x0000 //TX_DERVB_LEN_1 -516 0x0000 //TX_RHO_DERVB -517 0x0000 //TX_MIC_INDX_DERVB -518 0x0000 //TX_MU_DERVB -519 0x0000 //TX_DR_RESRV_0 -520 0x0000 //TX_DR_RESRV_1 -521 0x0000 //TX_DR_RESRV_2 -522 0x0000 //TX_DR_RESRV_3 -523 0x0000 //TX_DR_RESRV_4 +514 0x3000 //TX_DEREVERB_LF_MU +515 0x34CD //TX_DEREVERB_HF_MU +516 0x0007 //TX_DEREVERB_DELAY +517 0x0004 //TX_DEREVERB_COEF_LEN +518 0x0003 //TX_DEREVERB_DNR +519 0x0000 //TX_DEREVERB_ALPHA +520 0x0000 //TX_DEREVERB_BETA +521 0x3A98 //TX_GSC_RTOL_TH +522 0x3A98 //TX_GSC_RTOH_TH +523 0x7E2C //TX_WIDE2_MEANHTH 524 0x0000 //TX_DR_RESRV_5 525 0x0000 //TX_DR_RESRV_6 526 0x0000 //TX_DR_RESRV_7 @@ -11422,6 +16925,71 @@ 894 0xC000 //TX_FASTNS_SSA_THHFL 895 0xCCCC //TX_FASTNS_SSA_THLFH 896 0xD999 //TX_FASTNS_SSA_THHFH +897 0x2339 //TX_SENDFUNC_REG_MICMUTE +898 0x0021 //TX_SENDFUNC_REG_MICMUTE1 +899 0x02BC //TX_MICMUTE_RATIO_THR +900 0x0140 //TX_MICMUTE_AMP_THR +901 0x0004 //TX_MICMUTE_HPF_IND +902 0x00C0 //TX_MICMUTE_LOG_EYR_TH +903 0x0008 //TX_MICMUTE_CVG_TIME +904 0x0008 //TX_MICMUTE_RELEASE_TIME +905 0x01FE //TX_MIC_VOLUME_MIC0MUTE +906 0x0020 //TX_MICMUTE_EPD_OFFSET_0 +907 0x001E //TX_MICMUTE_FRQ_AEC_L +908 0x7999 //TX_MICMUTE_EAD_THR +909 0x7FFF //TX_MICMUTE_LAMBDA_CB_NLE +910 0x7FFF //TX_MICMUTE_LAMBDA_RE_EST +911 0x4000 //TX_DTD_THR1_MICMUTE_0 +912 0x7000 //TX_DTD_THR1_MICMUTE_1 +913 0x7FFF //TX_DTD_THR1_MICMUTE_2 +914 0x7FFF //TX_DTD_THR1_MICMUTE_3 +915 0x6CCC //TX_DTD_THR2_MICMUTE_0 +916 0x0400 //TX_MICMUTE_MIN_EQ_RE_EST_0 +917 0x0400 //TX_MICMUTE_MIN_EQ_RE_EST_1 +918 0x1000 //TX_MICMUTE_MIN_EQ_RE_EST_2 +919 0x7FFF //TX_MICMUTE_MIN_EQ_RE_EST_3 +920 0x7FFF //TX_MICMUTE_MIN_EQ_RE_EST_4 +921 0x4000 //TX_MICMUTE_C_POST_FLT +922 0x03E8 //TX_MICMUTE_DT_CUT_K +923 0x0001 //TX_MICMUTE_DT_CUT_THR +924 0x03E8 //TX_MICMUTE_DT_CUT_K2 +925 0x0001 //TX_MICMUTE_DT_CUT_THR2 +926 0x0064 //TX_MICMUTE_DT2_HOLD_N +927 0x1000 //TX_MICMUTE_RATIODTH_THCUT +928 0x1000 //TX_MICMUTE_B_POST_FLT_ECHOL +929 0x7FFF //TX_MICMUTE_B_POST_FLT_ECHOH +930 0x0400 //TX_MICMUTE_C_POST_FLT_MASK +931 0x7999 //TX_MICMUTE_RATIODTL_CUT_TH +932 0x0258 //TX_MICMUTE_DT_CUT_K1 +933 0x0800 //TX_MICMUTE_N2_SN_EST +934 0xFC00 //TX_MICMUTE_THR_SN_EST_0 +935 0x001C //TX_MICMUTE_MIN_G_CTRL_0 +936 0x6000 //TX_MICMUTE_A_POST_FILT_S_0 +937 0x7000 //TX_MICMUTE_B_POST_FILT_0 +938 0x2710 //TX_MIC1RUB_AMP_THR +939 0x0010 //TX_MIC1MUTE_RATIO_THR +940 0x0450 //TX_MIC1MUTE_AMP_THR +941 0x0008 //TX_MIC1MUTE_CVG_TIME +942 0x0008 //TX_MIC1MUTE_RELEASE_TIME +943 0x0000 //TX_AMS_RESRV_01 +944 0x0000 //TX_AMS_RESRV_02 +945 0x0000 //TX_AMS_RESRV_03 +946 0x0000 //TX_AMS_RESRV_04 +947 0x0000 //TX_AMS_RESRV_05 +948 0x0000 //TX_AMS_RESRV_06 +949 0x0000 //TX_AMS_RESRV_07 +950 0x0000 //TX_AMS_RESRV_08 +951 0x0000 //TX_AMS_RESRV_09 +952 0x0000 //TX_AMS_RESRV_10 +953 0x0000 //TX_AMS_RESRV_11 +954 0x0000 //TX_AMS_RESRV_12 +955 0x0000 //TX_AMS_RESRV_13 +956 0x0000 //TX_AMS_RESRV_14 +957 0x0000 //TX_AMS_RESRV_15 +958 0x0000 //TX_AMS_RESRV_16 +959 0x0000 //TX_AMS_RESRV_17 +960 0x0000 //TX_AMS_RESRV_18 +961 0x0000 //TX_AMS_RESRV_19 #RX 0 0x006C //RX_RECVFUNC_MODE_0 1 0x0000 //RX_RECVFUNC_MODE_1 @@ -12273,4 +17841,855 @@ 110 0x0000 //RX_FDDRC_RESRV_0 129 0x0100 //RX_SPK_VOL 130 0x0000 //RX_VOL_RESRV_0 +#RX 2 +157 0x006C //_ +158 0x0000 //_ +159 0x0004 //_ +160 0x0004 //_ +161 0x000A //_ +162 0x0000 //_ +163 0x4000 //_ +164 0x4000 //_ +165 0x4000 //_ +166 0x4000 //_ +167 0x065B //_ +168 0x7E56 //_ +169 0x4000 //_ +170 0x7800 //_ +171 0x7000 //_ +172 0x6000 //_ +173 0x0008 //_ +174 0x0003 //_ +175 0x0100 //_ +176 0x0020 //_ +177 0x0400 //_ +178 0x000C //_ +179 0x0014 //_ +180 0xF400 //_ +181 0x7E00 //_ +182 0x000A //_ +183 0x0190 //_ +184 0x7EB8 //_ +185 0x7EB8 //_ +186 0x7EB8 //_ +187 0x0002 //_ +188 0x0800 //_ +189 0x7EB8 //_ +190 0x7FFF //_ +191 0x0800 //_ +192 0x199A //_ +193 0x0000 //_ +194 0x4000 //_ +195 0x0020 //_ +196 0x4848 //_ +197 0x4848 //_ +198 0x4848 //_ +199 0x4870 //_ +200 0x4848 //_ +201 0x4848 //_ +202 0x4850 //_ +203 0x485C //_ +204 0x5C60 //_ +205 0x685C //_ +206 0x5640 //_ +207 0x4040 //_ +208 0x5C58 //_ +209 0x5C60 //_ +210 0x6060 //_ +211 0x6060 //_ +212 0x4848 //_ +213 0x4848 //_ +214 0x4848 //_ +215 0x4848 //_ +216 0x4848 //_ +217 0x4848 //_ +218 0x4848 //_ +219 0x4848 //_ +220 0x0202 //_ +221 0x0203 //_ +222 0x0303 //_ +223 0x0402 //_ +224 0x0504 //_ +225 0x0209 //_ +226 0x0808 //_ +227 0x090A //_ +228 0x0B0C //_ +229 0x0D0E //_ +230 0x1013 //_ +231 0x1719 //_ +232 0x1B1E //_ +233 0x1E1E //_ +234 0x1E28 //_ +235 0x282C //_ +236 0x0000 //_ +237 0x0000 //_ +238 0x0000 //_ +239 0x0000 //_ +240 0x0000 //_ +241 0x0000 //_ +242 0x0000 //_ +243 0x0000 //_ +244 0x4000 //_ +245 0x0320 //_ +246 0x0018 //_ +247 0x0030 //_ +248 0x0050 //_ +249 0x0080 //_ +250 0x0004 //_ +251 0x5000 //_ +252 0x5000 //_ +253 0x2000 //_ +254 0x5000 //_ +255 0x6400 //_ +256 0x6400 //_ +257 0x2000 //_ +258 0x5000 //_ +259 0x4000 //_ +260 0x4000 //_ +261 0x4000 //_ +262 0x4000 //_ +263 0x7FFF //_ +264 0x7FFF //_ +265 0x7FFF //_ +266 0x7FFF //_ +267 0x0000 //_ +268 0x0002 //_ +269 0x0001 //_ +270 0x0002 //_ +271 0x1800 //_ +272 0x1800 //_ +273 0x6000 //_ +274 0x6E00 //_ +275 0x4000 //_ +276 0x7EB8 //_ +277 0x0000 //_ +278 0x199A //_ +279 0x0001 //_ +280 0x0CCD //_ +281 0x03C3 //_ +282 0x7C00 //_ +283 0x2000 //_ +284 0x2000 //_ +285 0x0080 //_ +286 0x0012 //_ +287 0x0000 //_ +288 0x0000 //_ +289 0x3000 //_ +290 0x3000 //_ +291 0x1800 //_ +292 0x1000 //_ +293 0x04CD //_ +294 0x0F33 //_ +295 0x7333 //_ +296 0x199A //_ +297 0x7333 //_ +298 0x0004 //_ +299 0x6CCD //_ +300 0x799A //_ +301 0x001E //_ +302 0x3000 //_ +303 0x3200 //_ +304 0x2000 //_ +305 0x2000 //_ +306 0x2000 //_ +307 0x2000 //_ +308 0x2000 //_ +309 0x2000 //_ +310 0x2000 //_ +311 0x0000 //_ +312 0x0000 //_ +313 0x0000 //_ +#VOL 0 +163 0x4000 //RX_TDDRC_ALPHA_UP_1 +164 0x4000 //RX_TDDRC_ALPHA_UP_2 +165 0x4000 //RX_TDDRC_ALPHA_UP_3 +166 0x4000 //RX_TDDRC_ALPHA_UP_4 +184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +190 0x7FFF //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +269 0x0001 //RX_TDDRC_THRD_0 +270 0x0002 //RX_TDDRC_THRD_1 +271 0x1800 //RX_TDDRC_THRD_2 +272 0x1800 //RX_TDDRC_THRD_3 +273 0x6000 //RX_TDDRC_SLANT_0 +274 0x6E00 //RX_TDDRC_SLANT_1 +275 0x4000 //RX_TDDRC_ALPHA_UP_0 +276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x199A //RX_TDDRC_HMNC_GAIN +279 0x0001 //RX_TDDRC_SMT_FLAG +280 0x0CCD //RX_TDDRC_SMT_W +281 0x03C3 //RX_TDDRC_DRC_GAIN +195 0x0020 //RX_FDEQ_SUBNUM +196 0x4848 //RX_FDEQ_GAIN_0 +197 0x4848 //RX_FDEQ_GAIN_1 +198 0x4848 //RX_FDEQ_GAIN_2 +199 0x4870 //RX_FDEQ_GAIN_3 +200 0x4848 //RX_FDEQ_GAIN_4 +201 0x4848 //RX_FDEQ_GAIN_5 +202 0x4850 //RX_FDEQ_GAIN_6 +203 0x485C //RX_FDEQ_GAIN_7 +204 0x5C60 //RX_FDEQ_GAIN_8 +205 0x685C //RX_FDEQ_GAIN_9 +206 0x5640 //RX_FDEQ_GAIN_10 +207 0x4040 //RX_FDEQ_GAIN_11 +208 0x5C58 //RX_FDEQ_GAIN_12 +209 0x5C60 //RX_FDEQ_GAIN_13 +210 0x6060 //RX_FDEQ_GAIN_14 +211 0x6060 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0202 //RX_FDEQ_BIN_0 +221 0x0203 //RX_FDEQ_BIN_1 +222 0x0303 //RX_FDEQ_BIN_2 +223 0x0402 //RX_FDEQ_BIN_3 +224 0x0504 //RX_FDEQ_BIN_4 +225 0x0209 //RX_FDEQ_BIN_5 +226 0x0808 //RX_FDEQ_BIN_6 +227 0x090A //RX_FDEQ_BIN_7 +228 0x0B0C //RX_FDEQ_BIN_8 +229 0x0D0E //RX_FDEQ_BIN_9 +230 0x1013 //RX_FDEQ_BIN_10 +231 0x1719 //RX_FDEQ_BIN_11 +232 0x1B1E //RX_FDEQ_BIN_12 +233 0x1E1E //RX_FDEQ_BIN_13 +234 0x1E28 //RX_FDEQ_BIN_14 +235 0x282C //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x4000 //RX_FDEQ_RESRV_0 +245 0x0320 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0030 //RX_FDDRC_BAND_MARGIN_1 +248 0x0050 //RX_FDDRC_BAND_MARGIN_2 +249 0x0080 //RX_FDDRC_BAND_MARGIN_3 +250 0x0004 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x2000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x2000 //RX_FDDRC_THRD_3_2 +258 0x5000 //RX_FDDRC_THRD_3_3 +259 0x4000 //RX_FDDRC_SLANT_0_0 +260 0x4000 //RX_FDDRC_SLANT_0_1 +261 0x4000 //RX_FDDRC_SLANT_0_2 +262 0x4000 //RX_FDDRC_SLANT_0_3 +263 0x7FFF //RX_FDDRC_SLANT_1_0 +264 0x7FFF //RX_FDDRC_SLANT_1_1 +265 0x7FFF //RX_FDDRC_SLANT_1_2 +266 0x7FFF //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +286 0x0012 //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 +#VOL 1 +163 0x4000 //RX_TDDRC_ALPHA_UP_1 +164 0x4000 //RX_TDDRC_ALPHA_UP_2 +165 0x4000 //RX_TDDRC_ALPHA_UP_3 +166 0x4000 //RX_TDDRC_ALPHA_UP_4 +184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +190 0x7FFF //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +269 0x0001 //RX_TDDRC_THRD_0 +270 0x0002 //RX_TDDRC_THRD_1 +271 0x1800 //RX_TDDRC_THRD_2 +272 0x1800 //RX_TDDRC_THRD_3 +273 0x6000 //RX_TDDRC_SLANT_0 +274 0x6E00 //RX_TDDRC_SLANT_1 +275 0x4000 //RX_TDDRC_ALPHA_UP_0 +276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x199A //RX_TDDRC_HMNC_GAIN +279 0x0001 //RX_TDDRC_SMT_FLAG +280 0x0CCD //RX_TDDRC_SMT_W +281 0x03C3 //RX_TDDRC_DRC_GAIN +195 0x0020 //RX_FDEQ_SUBNUM +196 0x4848 //RX_FDEQ_GAIN_0 +197 0x4848 //RX_FDEQ_GAIN_1 +198 0x4848 //RX_FDEQ_GAIN_2 +199 0x4870 //RX_FDEQ_GAIN_3 +200 0x4848 //RX_FDEQ_GAIN_4 +201 0x4848 //RX_FDEQ_GAIN_5 +202 0x4850 //RX_FDEQ_GAIN_6 +203 0x485C //RX_FDEQ_GAIN_7 +204 0x5C60 //RX_FDEQ_GAIN_8 +205 0x685C //RX_FDEQ_GAIN_9 +206 0x5640 //RX_FDEQ_GAIN_10 +207 0x4040 //RX_FDEQ_GAIN_11 +208 0x5C58 //RX_FDEQ_GAIN_12 +209 0x5C60 //RX_FDEQ_GAIN_13 +210 0x6060 //RX_FDEQ_GAIN_14 +211 0x6060 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0202 //RX_FDEQ_BIN_0 +221 0x0203 //RX_FDEQ_BIN_1 +222 0x0303 //RX_FDEQ_BIN_2 +223 0x0402 //RX_FDEQ_BIN_3 +224 0x0504 //RX_FDEQ_BIN_4 +225 0x0209 //RX_FDEQ_BIN_5 +226 0x0808 //RX_FDEQ_BIN_6 +227 0x090A //RX_FDEQ_BIN_7 +228 0x0B0C //RX_FDEQ_BIN_8 +229 0x0D0E //RX_FDEQ_BIN_9 +230 0x1013 //RX_FDEQ_BIN_10 +231 0x1719 //RX_FDEQ_BIN_11 +232 0x1B1E //RX_FDEQ_BIN_12 +233 0x1E1E //RX_FDEQ_BIN_13 +234 0x1E28 //RX_FDEQ_BIN_14 +235 0x282C //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x4000 //RX_FDEQ_RESRV_0 +245 0x0320 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0030 //RX_FDDRC_BAND_MARGIN_1 +248 0x0050 //RX_FDDRC_BAND_MARGIN_2 +249 0x0080 //RX_FDDRC_BAND_MARGIN_3 +250 0x0004 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x2000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x2000 //RX_FDDRC_THRD_3_2 +258 0x5000 //RX_FDDRC_THRD_3_3 +259 0x4000 //RX_FDDRC_SLANT_0_0 +260 0x4000 //RX_FDDRC_SLANT_0_1 +261 0x4000 //RX_FDDRC_SLANT_0_2 +262 0x4000 //RX_FDDRC_SLANT_0_3 +263 0x7FFF //RX_FDDRC_SLANT_1_0 +264 0x7FFF //RX_FDDRC_SLANT_1_1 +265 0x7FFF //RX_FDDRC_SLANT_1_2 +266 0x7FFF //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +286 0x001A //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 +#VOL 2 +163 0x4000 //RX_TDDRC_ALPHA_UP_1 +164 0x4000 //RX_TDDRC_ALPHA_UP_2 +165 0x4000 //RX_TDDRC_ALPHA_UP_3 +166 0x4000 //RX_TDDRC_ALPHA_UP_4 +184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +190 0x7FFF //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +269 0x0001 //RX_TDDRC_THRD_0 +270 0x0002 //RX_TDDRC_THRD_1 +271 0x1800 //RX_TDDRC_THRD_2 +272 0x1800 //RX_TDDRC_THRD_3 +273 0x6000 //RX_TDDRC_SLANT_0 +274 0x6E00 //RX_TDDRC_SLANT_1 +275 0x4000 //RX_TDDRC_ALPHA_UP_0 +276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x199A //RX_TDDRC_HMNC_GAIN +279 0x0001 //RX_TDDRC_SMT_FLAG +280 0x0CCD //RX_TDDRC_SMT_W +281 0x03C3 //RX_TDDRC_DRC_GAIN +195 0x0020 //RX_FDEQ_SUBNUM +196 0x4848 //RX_FDEQ_GAIN_0 +197 0x4848 //RX_FDEQ_GAIN_1 +198 0x4848 //RX_FDEQ_GAIN_2 +199 0x4870 //RX_FDEQ_GAIN_3 +200 0x4848 //RX_FDEQ_GAIN_4 +201 0x4848 //RX_FDEQ_GAIN_5 +202 0x4850 //RX_FDEQ_GAIN_6 +203 0x485C //RX_FDEQ_GAIN_7 +204 0x5C60 //RX_FDEQ_GAIN_8 +205 0x685C //RX_FDEQ_GAIN_9 +206 0x5640 //RX_FDEQ_GAIN_10 +207 0x4040 //RX_FDEQ_GAIN_11 +208 0x5C58 //RX_FDEQ_GAIN_12 +209 0x5C60 //RX_FDEQ_GAIN_13 +210 0x6060 //RX_FDEQ_GAIN_14 +211 0x6060 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0202 //RX_FDEQ_BIN_0 +221 0x0203 //RX_FDEQ_BIN_1 +222 0x0303 //RX_FDEQ_BIN_2 +223 0x0402 //RX_FDEQ_BIN_3 +224 0x0504 //RX_FDEQ_BIN_4 +225 0x0209 //RX_FDEQ_BIN_5 +226 0x0808 //RX_FDEQ_BIN_6 +227 0x090A //RX_FDEQ_BIN_7 +228 0x0B0C //RX_FDEQ_BIN_8 +229 0x0D0E //RX_FDEQ_BIN_9 +230 0x1013 //RX_FDEQ_BIN_10 +231 0x1719 //RX_FDEQ_BIN_11 +232 0x1B1E //RX_FDEQ_BIN_12 +233 0x1E1E //RX_FDEQ_BIN_13 +234 0x1E28 //RX_FDEQ_BIN_14 +235 0x282C //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x4000 //RX_FDEQ_RESRV_0 +245 0x0320 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0030 //RX_FDDRC_BAND_MARGIN_1 +248 0x0050 //RX_FDDRC_BAND_MARGIN_2 +249 0x0080 //RX_FDDRC_BAND_MARGIN_3 +250 0x0004 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x2000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x2000 //RX_FDDRC_THRD_3_2 +258 0x5000 //RX_FDDRC_THRD_3_3 +259 0x4000 //RX_FDDRC_SLANT_0_0 +260 0x4000 //RX_FDDRC_SLANT_0_1 +261 0x4000 //RX_FDDRC_SLANT_0_2 +262 0x4000 //RX_FDDRC_SLANT_0_3 +263 0x7FFF //RX_FDDRC_SLANT_1_0 +264 0x7FFF //RX_FDDRC_SLANT_1_1 +265 0x7FFF //RX_FDDRC_SLANT_1_2 +266 0x7FFF //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +286 0x0025 //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 +#VOL 3 +163 0x4000 //RX_TDDRC_ALPHA_UP_1 +164 0x4000 //RX_TDDRC_ALPHA_UP_2 +165 0x4000 //RX_TDDRC_ALPHA_UP_3 +166 0x4000 //RX_TDDRC_ALPHA_UP_4 +184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +190 0x7FFF //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +269 0x0001 //RX_TDDRC_THRD_0 +270 0x0002 //RX_TDDRC_THRD_1 +271 0x1800 //RX_TDDRC_THRD_2 +272 0x1800 //RX_TDDRC_THRD_3 +273 0x6000 //RX_TDDRC_SLANT_0 +274 0x6E00 //RX_TDDRC_SLANT_1 +275 0x4000 //RX_TDDRC_ALPHA_UP_0 +276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x199A //RX_TDDRC_HMNC_GAIN +279 0x0001 //RX_TDDRC_SMT_FLAG +280 0x0CCD //RX_TDDRC_SMT_W +281 0x03C3 //RX_TDDRC_DRC_GAIN +195 0x0020 //RX_FDEQ_SUBNUM +196 0x4848 //RX_FDEQ_GAIN_0 +197 0x4848 //RX_FDEQ_GAIN_1 +198 0x4848 //RX_FDEQ_GAIN_2 +199 0x4870 //RX_FDEQ_GAIN_3 +200 0x4848 //RX_FDEQ_GAIN_4 +201 0x4848 //RX_FDEQ_GAIN_5 +202 0x4850 //RX_FDEQ_GAIN_6 +203 0x485C //RX_FDEQ_GAIN_7 +204 0x5C60 //RX_FDEQ_GAIN_8 +205 0x685C //RX_FDEQ_GAIN_9 +206 0x5640 //RX_FDEQ_GAIN_10 +207 0x4040 //RX_FDEQ_GAIN_11 +208 0x5C58 //RX_FDEQ_GAIN_12 +209 0x5C60 //RX_FDEQ_GAIN_13 +210 0x6060 //RX_FDEQ_GAIN_14 +211 0x6060 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0202 //RX_FDEQ_BIN_0 +221 0x0203 //RX_FDEQ_BIN_1 +222 0x0303 //RX_FDEQ_BIN_2 +223 0x0402 //RX_FDEQ_BIN_3 +224 0x0504 //RX_FDEQ_BIN_4 +225 0x0209 //RX_FDEQ_BIN_5 +226 0x0808 //RX_FDEQ_BIN_6 +227 0x090A //RX_FDEQ_BIN_7 +228 0x0B0C //RX_FDEQ_BIN_8 +229 0x0D0E //RX_FDEQ_BIN_9 +230 0x1013 //RX_FDEQ_BIN_10 +231 0x1719 //RX_FDEQ_BIN_11 +232 0x1B1E //RX_FDEQ_BIN_12 +233 0x1E1E //RX_FDEQ_BIN_13 +234 0x1E28 //RX_FDEQ_BIN_14 +235 0x282C //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x4000 //RX_FDEQ_RESRV_0 +245 0x0320 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0030 //RX_FDDRC_BAND_MARGIN_1 +248 0x0050 //RX_FDDRC_BAND_MARGIN_2 +249 0x0080 //RX_FDDRC_BAND_MARGIN_3 +250 0x0004 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x2000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x2000 //RX_FDDRC_THRD_3_2 +258 0x5000 //RX_FDDRC_THRD_3_3 +259 0x4000 //RX_FDDRC_SLANT_0_0 +260 0x4000 //RX_FDDRC_SLANT_0_1 +261 0x4000 //RX_FDDRC_SLANT_0_2 +262 0x4000 //RX_FDDRC_SLANT_0_3 +263 0x7FFF //RX_FDDRC_SLANT_1_0 +264 0x7FFF //RX_FDDRC_SLANT_1_1 +265 0x7FFF //RX_FDDRC_SLANT_1_2 +266 0x7FFF //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +286 0x0034 //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 +#VOL 4 +163 0x4000 //RX_TDDRC_ALPHA_UP_1 +164 0x4000 //RX_TDDRC_ALPHA_UP_2 +165 0x4000 //RX_TDDRC_ALPHA_UP_3 +166 0x4000 //RX_TDDRC_ALPHA_UP_4 +184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +190 0x7FFF //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +269 0x0001 //RX_TDDRC_THRD_0 +270 0x0002 //RX_TDDRC_THRD_1 +271 0x1800 //RX_TDDRC_THRD_2 +272 0x1800 //RX_TDDRC_THRD_3 +273 0x6000 //RX_TDDRC_SLANT_0 +274 0x6E00 //RX_TDDRC_SLANT_1 +275 0x4000 //RX_TDDRC_ALPHA_UP_0 +276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x199A //RX_TDDRC_HMNC_GAIN +279 0x0001 //RX_TDDRC_SMT_FLAG +280 0x0CCD //RX_TDDRC_SMT_W +281 0x03C3 //RX_TDDRC_DRC_GAIN +195 0x0020 //RX_FDEQ_SUBNUM +196 0x4848 //RX_FDEQ_GAIN_0 +197 0x4848 //RX_FDEQ_GAIN_1 +198 0x4848 //RX_FDEQ_GAIN_2 +199 0x4870 //RX_FDEQ_GAIN_3 +200 0x4848 //RX_FDEQ_GAIN_4 +201 0x4848 //RX_FDEQ_GAIN_5 +202 0x4850 //RX_FDEQ_GAIN_6 +203 0x485C //RX_FDEQ_GAIN_7 +204 0x5C60 //RX_FDEQ_GAIN_8 +205 0x685C //RX_FDEQ_GAIN_9 +206 0x5640 //RX_FDEQ_GAIN_10 +207 0x4040 //RX_FDEQ_GAIN_11 +208 0x5C58 //RX_FDEQ_GAIN_12 +209 0x5C60 //RX_FDEQ_GAIN_13 +210 0x6060 //RX_FDEQ_GAIN_14 +211 0x6060 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0202 //RX_FDEQ_BIN_0 +221 0x0203 //RX_FDEQ_BIN_1 +222 0x0303 //RX_FDEQ_BIN_2 +223 0x0402 //RX_FDEQ_BIN_3 +224 0x0504 //RX_FDEQ_BIN_4 +225 0x0209 //RX_FDEQ_BIN_5 +226 0x0808 //RX_FDEQ_BIN_6 +227 0x090A //RX_FDEQ_BIN_7 +228 0x0B0C //RX_FDEQ_BIN_8 +229 0x0D0E //RX_FDEQ_BIN_9 +230 0x1013 //RX_FDEQ_BIN_10 +231 0x1719 //RX_FDEQ_BIN_11 +232 0x1B1E //RX_FDEQ_BIN_12 +233 0x1E1E //RX_FDEQ_BIN_13 +234 0x1E28 //RX_FDEQ_BIN_14 +235 0x282C //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x4000 //RX_FDEQ_RESRV_0 +245 0x0320 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0030 //RX_FDDRC_BAND_MARGIN_1 +248 0x0050 //RX_FDDRC_BAND_MARGIN_2 +249 0x0080 //RX_FDDRC_BAND_MARGIN_3 +250 0x0004 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x2000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x2000 //RX_FDDRC_THRD_3_2 +258 0x5000 //RX_FDDRC_THRD_3_3 +259 0x4000 //RX_FDDRC_SLANT_0_0 +260 0x4000 //RX_FDDRC_SLANT_0_1 +261 0x4000 //RX_FDDRC_SLANT_0_2 +262 0x4000 //RX_FDDRC_SLANT_0_3 +263 0x7FFF //RX_FDDRC_SLANT_1_0 +264 0x7FFF //RX_FDDRC_SLANT_1_1 +265 0x7FFF //RX_FDDRC_SLANT_1_2 +266 0x7FFF //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +286 0x004D //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 +#VOL 5 +163 0x4000 //RX_TDDRC_ALPHA_UP_1 +164 0x4000 //RX_TDDRC_ALPHA_UP_2 +165 0x4000 //RX_TDDRC_ALPHA_UP_3 +166 0x4000 //RX_TDDRC_ALPHA_UP_4 +184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +190 0x7FFF //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +269 0x0001 //RX_TDDRC_THRD_0 +270 0x0002 //RX_TDDRC_THRD_1 +271 0x1800 //RX_TDDRC_THRD_2 +272 0x1800 //RX_TDDRC_THRD_3 +273 0x6000 //RX_TDDRC_SLANT_0 +274 0x6E00 //RX_TDDRC_SLANT_1 +275 0x4000 //RX_TDDRC_ALPHA_UP_0 +276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x199A //RX_TDDRC_HMNC_GAIN +279 0x0001 //RX_TDDRC_SMT_FLAG +280 0x0CCD //RX_TDDRC_SMT_W +281 0x03C3 //RX_TDDRC_DRC_GAIN +195 0x0020 //RX_FDEQ_SUBNUM +196 0x4848 //RX_FDEQ_GAIN_0 +197 0x4848 //RX_FDEQ_GAIN_1 +198 0x4848 //RX_FDEQ_GAIN_2 +199 0x4870 //RX_FDEQ_GAIN_3 +200 0x4848 //RX_FDEQ_GAIN_4 +201 0x4848 //RX_FDEQ_GAIN_5 +202 0x4850 //RX_FDEQ_GAIN_6 +203 0x485C //RX_FDEQ_GAIN_7 +204 0x5C60 //RX_FDEQ_GAIN_8 +205 0x685C //RX_FDEQ_GAIN_9 +206 0x5640 //RX_FDEQ_GAIN_10 +207 0x4040 //RX_FDEQ_GAIN_11 +208 0x5C58 //RX_FDEQ_GAIN_12 +209 0x5C60 //RX_FDEQ_GAIN_13 +210 0x6060 //RX_FDEQ_GAIN_14 +211 0x6060 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0202 //RX_FDEQ_BIN_0 +221 0x0203 //RX_FDEQ_BIN_1 +222 0x0303 //RX_FDEQ_BIN_2 +223 0x0402 //RX_FDEQ_BIN_3 +224 0x0504 //RX_FDEQ_BIN_4 +225 0x0209 //RX_FDEQ_BIN_5 +226 0x0808 //RX_FDEQ_BIN_6 +227 0x090A //RX_FDEQ_BIN_7 +228 0x0B0C //RX_FDEQ_BIN_8 +229 0x0D0E //RX_FDEQ_BIN_9 +230 0x1013 //RX_FDEQ_BIN_10 +231 0x1719 //RX_FDEQ_BIN_11 +232 0x1B1E //RX_FDEQ_BIN_12 +233 0x1E1E //RX_FDEQ_BIN_13 +234 0x1E28 //RX_FDEQ_BIN_14 +235 0x282C //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x4000 //RX_FDEQ_RESRV_0 +245 0x0320 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0030 //RX_FDDRC_BAND_MARGIN_1 +248 0x0050 //RX_FDDRC_BAND_MARGIN_2 +249 0x0080 //RX_FDDRC_BAND_MARGIN_3 +250 0x0004 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x2000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x2000 //RX_FDDRC_THRD_3_2 +258 0x5000 //RX_FDDRC_THRD_3_3 +259 0x4000 //RX_FDDRC_SLANT_0_0 +260 0x4000 //RX_FDDRC_SLANT_0_1 +261 0x4000 //RX_FDDRC_SLANT_0_2 +262 0x4000 //RX_FDDRC_SLANT_0_3 +263 0x7FFF //RX_FDDRC_SLANT_1_0 +264 0x7FFF //RX_FDDRC_SLANT_1_1 +265 0x7FFF //RX_FDDRC_SLANT_1_2 +266 0x7FFF //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +286 0x0074 //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 +#VOL 6 +163 0x4000 //RX_TDDRC_ALPHA_UP_1 +164 0x4000 //RX_TDDRC_ALPHA_UP_2 +165 0x4000 //RX_TDDRC_ALPHA_UP_3 +166 0x4000 //RX_TDDRC_ALPHA_UP_4 +184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +190 0x7FFF //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +269 0x0001 //RX_TDDRC_THRD_0 +270 0x0002 //RX_TDDRC_THRD_1 +271 0x1800 //RX_TDDRC_THRD_2 +272 0x1800 //RX_TDDRC_THRD_3 +273 0x6000 //RX_TDDRC_SLANT_0 +274 0x6E00 //RX_TDDRC_SLANT_1 +275 0x4000 //RX_TDDRC_ALPHA_UP_0 +276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x199A //RX_TDDRC_HMNC_GAIN +279 0x0001 //RX_TDDRC_SMT_FLAG +280 0x0CCD //RX_TDDRC_SMT_W +281 0x03C3 //RX_TDDRC_DRC_GAIN +195 0x0020 //RX_FDEQ_SUBNUM +196 0x4848 //RX_FDEQ_GAIN_0 +197 0x4848 //RX_FDEQ_GAIN_1 +198 0x4848 //RX_FDEQ_GAIN_2 +199 0x4870 //RX_FDEQ_GAIN_3 +200 0x4848 //RX_FDEQ_GAIN_4 +201 0x4848 //RX_FDEQ_GAIN_5 +202 0x4850 //RX_FDEQ_GAIN_6 +203 0x485C //RX_FDEQ_GAIN_7 +204 0x5C60 //RX_FDEQ_GAIN_8 +205 0x685C //RX_FDEQ_GAIN_9 +206 0x5640 //RX_FDEQ_GAIN_10 +207 0x4040 //RX_FDEQ_GAIN_11 +208 0x5C58 //RX_FDEQ_GAIN_12 +209 0x5C60 //RX_FDEQ_GAIN_13 +210 0x6060 //RX_FDEQ_GAIN_14 +211 0x6060 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0202 //RX_FDEQ_BIN_0 +221 0x0203 //RX_FDEQ_BIN_1 +222 0x0303 //RX_FDEQ_BIN_2 +223 0x0402 //RX_FDEQ_BIN_3 +224 0x0504 //RX_FDEQ_BIN_4 +225 0x0209 //RX_FDEQ_BIN_5 +226 0x0808 //RX_FDEQ_BIN_6 +227 0x090A //RX_FDEQ_BIN_7 +228 0x0B0C //RX_FDEQ_BIN_8 +229 0x0D0E //RX_FDEQ_BIN_9 +230 0x1013 //RX_FDEQ_BIN_10 +231 0x1719 //RX_FDEQ_BIN_11 +232 0x1B1E //RX_FDEQ_BIN_12 +233 0x1E1E //RX_FDEQ_BIN_13 +234 0x1E28 //RX_FDEQ_BIN_14 +235 0x282C //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x4000 //RX_FDEQ_RESRV_0 +245 0x0320 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0030 //RX_FDDRC_BAND_MARGIN_1 +248 0x0050 //RX_FDDRC_BAND_MARGIN_2 +249 0x0080 //RX_FDDRC_BAND_MARGIN_3 +250 0x0004 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x2000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x2000 //RX_FDDRC_THRD_3_2 +258 0x5000 //RX_FDDRC_THRD_3_3 +259 0x4000 //RX_FDDRC_SLANT_0_0 +260 0x4000 //RX_FDDRC_SLANT_0_1 +261 0x4000 //RX_FDDRC_SLANT_0_2 +262 0x4000 //RX_FDDRC_SLANT_0_3 +263 0x7FFF //RX_FDDRC_SLANT_1_0 +264 0x7FFF //RX_FDDRC_SLANT_1_1 +265 0x7FFF //RX_FDDRC_SLANT_1_2 +266 0x7FFF //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +286 0x0100 //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 diff --git a/audio/ravenclaw/tuning/fortemedia/HEADSET.dat b/audio/ravenclaw/tuning/fortemedia/HEADSET.dat index 99a8c1c..22e3e30 100644 Binary files a/audio/ravenclaw/tuning/fortemedia/HEADSET.dat and b/audio/ravenclaw/tuning/fortemedia/HEADSET.dat differ diff --git a/audio/ravenclaw/tuning/fortemedia/HEADSET.mods b/audio/ravenclaw/tuning/fortemedia/HEADSET.mods index 59f0067..ac10ce5 100644 --- a/audio/ravenclaw/tuning/fortemedia/HEADSET.mods +++ b/audio/ravenclaw/tuning/fortemedia/HEADSET.mods @@ -1,12 +1,12 @@ #PLATFORM_NAME gChip #EXPORT_FLAG HEADSET -#SINGLE_API_VER 1.1.6 -#SAVE_TIME 2022-01-04 15:20:23 +#SINGLE_API_VER 1.2.0 +#SAVE_TIME 2022-02-11 16:30:04 #CASE_NAME HEADSET-USB_BLACKBIRD-VOICE_GENERIC-NB #PARAM_MODE FULL -#PARAM_TYPE TX+RX -#TOTAL_CUSTOM_STEP 7 +#PARAM_TYPE TX+2RX +#TOTAL_CUSTOM_STEP 7+7 #TX 0 0x0009 //TX_OPERATION_MODE_0 1 0x0009 //TX_OPERATION_MODE_1 @@ -259,12 +259,12 @@ 248 0xFA00 //TX_THR_SN_EST_6 249 0xFA00 //TX_THR_SN_EST_7 250 0x0000 //TX_DELTA_THR_SN_EST_0 -251 0x0100 //TX_DELTA_THR_SN_EST_1 -252 0x0000 //TX_DELTA_THR_SN_EST_2 -253 0x0400 //TX_DELTA_THR_SN_EST_3 +251 0x0000 //TX_DELTA_THR_SN_EST_1 +252 0x0400 //TX_DELTA_THR_SN_EST_2 +253 0x0000 //TX_DELTA_THR_SN_EST_3 254 0x0000 //TX_DELTA_THR_SN_EST_4 255 0x0000 //TX_DELTA_THR_SN_EST_5 -256 0x0000 //TX_DELTA_THR_SN_EST_6 +256 0x0100 //TX_DELTA_THR_SN_EST_6 257 0x0000 //TX_DELTA_THR_SN_EST_7 258 0x4000 //TX_LAMBDA_NN_EST_0 259 0x4000 //TX_LAMBDA_NN_EST_1 @@ -291,28 +291,28 @@ 280 0x0400 //TX_B_POST_FLT_1 281 0x0010 //TX_NS_LVL_CTRL_0 282 0x0014 //TX_NS_LVL_CTRL_1 -283 0x0014 //TX_NS_LVL_CTRL_2 -284 0x0016 //TX_NS_LVL_CTRL_3 -285 0x0014 //TX_NS_LVL_CTRL_4 +283 0x0016 //TX_NS_LVL_CTRL_2 +284 0x0014 //TX_NS_LVL_CTRL_3 +285 0x0010 //TX_NS_LVL_CTRL_4 286 0x0010 //TX_NS_LVL_CTRL_5 -287 0x0010 //TX_NS_LVL_CTRL_6 +287 0x0014 //TX_NS_LVL_CTRL_6 288 0x0010 //TX_NS_LVL_CTRL_7 289 0x000D //TX_MIN_GAIN_S_0 290 0x0012 //TX_MIN_GAIN_S_1 291 0x0012 //TX_MIN_GAIN_S_2 292 0x0012 //TX_MIN_GAIN_S_3 -293 0x0012 //TX_MIN_GAIN_S_4 +293 0x000D //TX_MIN_GAIN_S_4 294 0x000D //TX_MIN_GAIN_S_5 -295 0x000D //TX_MIN_GAIN_S_6 +295 0x0012 //TX_MIN_GAIN_S_6 296 0x000D //TX_MIN_GAIN_S_7 297 0x7FFF //TX_NMOS_SUP 298 0x0000 //TX_NS_MAX_PRI_SNR_TH 299 0x0000 //TX_NMOS_SUP_MENSA 300 0x7FFF //TX_SNRI_SUP_0 -301 0x7FFF //TX_SNRI_SUP_1 +301 0x5000 //TX_SNRI_SUP_1 302 0x5000 //TX_SNRI_SUP_2 -303 0x5000 //TX_SNRI_SUP_3 -304 0x6000 //TX_SNRI_SUP_4 +303 0x6000 //TX_SNRI_SUP_3 +304 0x7FFF //TX_SNRI_SUP_4 305 0x7FFF //TX_SNRI_SUP_5 306 0x7FFF //TX_SNRI_SUP_6 307 0x7FFF //TX_SNRI_SUP_7 @@ -323,20 +323,20 @@ 312 0x7FFF //TX_A_POST_FILT_0 313 0x2000 //TX_A_POST_FILT_1 314 0x4000 //TX_A_POST_FILT_S_0 -315 0x7FFF //TX_A_POST_FILT_S_1 -316 0x1000 //TX_A_POST_FILT_S_2 -317 0x7000 //TX_A_POST_FILT_S_3 +315 0x1000 //TX_A_POST_FILT_S_1 +316 0x7000 //TX_A_POST_FILT_S_2 +317 0x4000 //TX_A_POST_FILT_S_3 318 0x4000 //TX_A_POST_FILT_S_4 319 0x4000 //TX_A_POST_FILT_S_5 -320 0x4000 //TX_A_POST_FILT_S_6 +320 0x7FFF //TX_A_POST_FILT_S_6 321 0x4000 //TX_A_POST_FILT_S_7 322 0x0400 //TX_B_POST_FILT_0 -323 0x0400 //TX_B_POST_FILT_1 +323 0x2000 //TX_B_POST_FILT_1 324 0x2000 //TX_B_POST_FILT_2 -325 0x2000 //TX_B_POST_FILT_3 -326 0x4000 //TX_B_POST_FILT_4 +325 0x4000 //TX_B_POST_FILT_3 +326 0x2000 //TX_B_POST_FILT_4 327 0x2000 //TX_B_POST_FILT_5 -328 0x2000 //TX_B_POST_FILT_6 +328 0x0400 //TX_B_POST_FILT_6 329 0x2000 //TX_B_POST_FILT_7 330 0x7FFF //TX_B_LESSCUT_RTO_S_0 331 0x7FFF //TX_B_LESSCUT_RTO_S_1 @@ -348,12 +348,12 @@ 337 0x7FFF //TX_B_LESSCUT_RTO_S_7 338 0x7E14 //TX_LAMBDA_PFILT 339 0x7C29 //TX_LAMBDA_PFILT_S_0 -340 0x7F00 //TX_LAMBDA_PFILT_S_1 -341 0x7C29 //TX_LAMBDA_PFILT_S_2 -342 0x6000 //TX_LAMBDA_PFILT_S_3 +340 0x7C29 //TX_LAMBDA_PFILT_S_1 +341 0x6000 //TX_LAMBDA_PFILT_S_2 +342 0x7C29 //TX_LAMBDA_PFILT_S_3 343 0x7C29 //TX_LAMBDA_PFILT_S_4 344 0x7C29 //TX_LAMBDA_PFILT_S_5 -345 0x7C29 //TX_LAMBDA_PFILT_S_6 +345 0x7F00 //TX_LAMBDA_PFILT_S_6 346 0x7C29 //TX_LAMBDA_PFILT_S_7 347 0x0200 //TX_K_PEPPER 348 0x0400 //TX_A_PEPPER @@ -375,7 +375,7 @@ 364 0x0000 //TX_K_APT 365 0x0001 //TX_NOISEDET 366 0x0190 //TX_NDETCT -367 0x0029 //TX_NOISE_TH_0 +367 0x003B //TX_NOISE_TH_0 368 0x7FFF //TX_NOISE_TH_0_2 369 0x7FFF //TX_NOISE_TH_0_3 370 0x0900 //TX_NOISE_TH_1 @@ -387,11 +387,11 @@ 376 0x0000 //TX_NOISE_TH_5_3 377 0x0000 //TX_NOISE_TH_5_4 378 0x00C8 //TX_NOISE_TH_6 -379 0x0014 //TX_MINENOISE_TH -380 0x4000 //TX_MINENOISE_MIC0_TH_MTS -381 0xFFEE //TX_MINENOISE_MIC0_TH_EXP -382 0x6000 //TX_MINENOISE_MIC0_S_TH_MTS -383 0xFFF3 //TX_MINENOISE_MIC0_S_TH_EXP +379 0x00C8 //TX_MINENOISE_TH +380 0xD508 //TX_MORENS_TFMASK_TH +381 0x0001 //TX_DRC_QUIET_FLOOR +382 0x3A98 //TX_RATIODTL_CUT_TH +383 0x0DAC //TX_DT_CUT_K1 384 0x00A5 //TX_OUT_ENER_S_TH_CLEAN 385 0x00A5 //TX_OUT_ENER_S_TH_LESSCLEAN 386 0x00A5 //TX_OUT_ENER_S_TH_NOISY @@ -399,22 +399,22 @@ 388 0x00CE //TX_OUT_ENER_TH_SPEECH 389 0x2000 //TX_SN_NPB_GAIN 390 0x0000 //TX_NN_NPB_GAIN -391 0x0000 //TX_CSX_ALPHA_0 -392 0x0000 //TX_CSX_ALPHA_1 -393 0x0000 //TX_CSX_ALPHA_2 -394 0x0000 //TX_CSX_ALPHA_3 -395 0x0800 //TX_MU_ARSP_EST -396 0x00C8 //TX_P_OUTBEAM_MIN_TH +391 0x7FFF //TX_POST_MASK_SUP_HSNE +392 0x1388 //TX_TAIL_DET_TH +393 0x4000 //TX_B_LESSCUT_RTO_WTA +394 0x0000 //TX_MEL_G_R +395 0x0080 //TX_SUPHIGH_TH +396 0x0000 //TX_MASK_G_R 397 0x0002 //TX_EXTRA_NS_L -398 0x0800 //TX_EXTRA_NS_A -399 0x0005 //TX_VR_NOISE_FLOOR_TH +398 0x1800 //TX_C_POST_FLT_MASK +399 0x7FFF //TX_A_POST_FLT_WNS 400 0x0148 //TX_MIN_G_LOW300HZ 401 0x0002 //TX_MAXLEVEL_CNG 402 0x00B4 //TX_STN_NOISE_TH 403 0x4000 //TX_POST_MASK_SUP 404 0x7FFF //TX_POST_MASK_ADJUST 405 0x00C8 //TX_NS_ENOISE_MIC0_TH -406 0x0014 //TX_MINENOISE_MIC0_TH +406 0x0032 //TX_MINENOISE_MIC0_TH 407 0x012C //TX_MINENOISE_MIC0_S_TH 408 0x7FFF //TX_MIN_G_CTRL_SSNS 409 0x0000 //TX_METAL_RTO_THR @@ -522,16 +522,16 @@ 511 0x6666 //TX_MIC_TO_BFGAIN 512 0x0000 //TX_MICTOBFGAIN0 513 0x0000 //TX_FASTMUE_TH -514 0x0000 //TX_DERVB_LEN_0 -515 0x0000 //TX_DERVB_LEN_1 -516 0x0000 //TX_RHO_DERVB -517 0x0000 //TX_MIC_INDX_DERVB -518 0x0000 //TX_MU_DERVB -519 0x0000 //TX_DR_RESRV_0 -520 0x0000 //TX_DR_RESRV_1 -521 0x0000 //TX_DR_RESRV_2 -522 0x0000 //TX_DR_RESRV_3 -523 0x0000 //TX_DR_RESRV_4 +514 0xC000 //TX_DEREVERB_LF_MU +515 0xC000 //TX_DEREVERB_HF_MU +516 0xCCCC //TX_DEREVERB_DELAY +517 0xD999 //TX_DEREVERB_COEF_LEN +518 0x1F40 //TX_DEREVERB_DNR +519 0x0000 //TX_DEREVERB_ALPHA +520 0x0000 //TX_DEREVERB_BETA +521 0x0000 //TX_GSC_RTOL_TH +522 0x7000 //TX_GSC_RTOH_TH +523 0x0064 //TX_WIDE2_MEANHTH 524 0x0000 //TX_DR_RESRV_5 525 0x0000 //TX_DR_RESRV_6 526 0x0000 //TX_DR_RESRV_7 @@ -897,16 +897,81 @@ 886 0x0CCD //TX_FASTNS_TFMASKBIN_TH2 887 0x0CCD //TX_FASTNS_TFMASKBIN_TH3 888 0x0028 //TX_FASTNS_ARSPC_TH -889 0x2000 //TX_FASTNS_MASK5_TH +889 0xC000 //TX_FASTNS_MASK5_TH 890 0x4848 //TX_POSTSSA_MIN_G_VR_MASK -891 0x1000 //TX_A_LESSCUT_RTO_MASK +891 0x4000 //TX_A_LESSCUT_RTO_MASK 892 0x1770 //TX_FASTNS_NOISETH 893 0xC000 //TX_FASTNS_SSA_THLFL 894 0xC000 //TX_FASTNS_SSA_THHFL 895 0xCCCC //TX_FASTNS_SSA_THLFH 896 0xD999 //TX_FASTNS_SSA_THHFH +897 0x2339 //TX_SENDFUNC_REG_MICMUTE +898 0x0021 //TX_SENDFUNC_REG_MICMUTE1 +899 0x02BC //TX_MICMUTE_RATIO_THR +900 0x0140 //TX_MICMUTE_AMP_THR +901 0x0004 //TX_MICMUTE_HPF_IND +902 0x00C0 //TX_MICMUTE_LOG_EYR_TH +903 0x0008 //TX_MICMUTE_CVG_TIME +904 0x0008 //TX_MICMUTE_RELEASE_TIME +905 0x01FE //TX_MIC_VOLUME_MIC0MUTE +906 0x0020 //TX_MICMUTE_EPD_OFFSET_0 +907 0x001E //TX_MICMUTE_FRQ_AEC_L +908 0x7999 //TX_MICMUTE_EAD_THR +909 0x7FFF //TX_MICMUTE_LAMBDA_CB_NLE +910 0x7FFF //TX_MICMUTE_LAMBDA_RE_EST +911 0x4000 //TX_DTD_THR1_MICMUTE_0 +912 0x7000 //TX_DTD_THR1_MICMUTE_1 +913 0x7FFF //TX_DTD_THR1_MICMUTE_2 +914 0x7FFF //TX_DTD_THR1_MICMUTE_3 +915 0x6CCC //TX_DTD_THR2_MICMUTE_0 +916 0x0400 //TX_MICMUTE_MIN_EQ_RE_EST_0 +917 0x0400 //TX_MICMUTE_MIN_EQ_RE_EST_1 +918 0x1000 //TX_MICMUTE_MIN_EQ_RE_EST_2 +919 0x7FFF //TX_MICMUTE_MIN_EQ_RE_EST_3 +920 0x7FFF //TX_MICMUTE_MIN_EQ_RE_EST_4 +921 0x4000 //TX_MICMUTE_C_POST_FLT +922 0x03E8 //TX_MICMUTE_DT_CUT_K +923 0x0001 //TX_MICMUTE_DT_CUT_THR +924 0x03E8 //TX_MICMUTE_DT_CUT_K2 +925 0x0001 //TX_MICMUTE_DT_CUT_THR2 +926 0x0064 //TX_MICMUTE_DT2_HOLD_N +927 0x1000 //TX_MICMUTE_RATIODTH_THCUT +928 0x1000 //TX_MICMUTE_B_POST_FLT_ECHOL +929 0x7FFF //TX_MICMUTE_B_POST_FLT_ECHOH +930 0x0400 //TX_MICMUTE_C_POST_FLT_MASK +931 0x7999 //TX_MICMUTE_RATIODTL_CUT_TH +932 0x0258 //TX_MICMUTE_DT_CUT_K1 +933 0x0800 //TX_MICMUTE_N2_SN_EST +934 0xFC00 //TX_MICMUTE_THR_SN_EST_0 +935 0x001C //TX_MICMUTE_MIN_G_CTRL_0 +936 0x6000 //TX_MICMUTE_A_POST_FILT_S_0 +937 0x7000 //TX_MICMUTE_B_POST_FILT_0 +938 0x2710 //TX_MIC1RUB_AMP_THR +939 0x0010 //TX_MIC1MUTE_RATIO_THR +940 0x0450 //TX_MIC1MUTE_AMP_THR +941 0x0008 //TX_MIC1MUTE_CVG_TIME +942 0x0008 //TX_MIC1MUTE_RELEASE_TIME +943 0x0000 //TX_AMS_RESRV_01 +944 0x0000 //TX_AMS_RESRV_02 +945 0x0000 //TX_AMS_RESRV_03 +946 0x0000 //TX_AMS_RESRV_04 +947 0x0000 //TX_AMS_RESRV_05 +948 0x0000 //TX_AMS_RESRV_06 +949 0x0000 //TX_AMS_RESRV_07 +950 0x0000 //TX_AMS_RESRV_08 +951 0x0000 //TX_AMS_RESRV_09 +952 0x0000 //TX_AMS_RESRV_10 +953 0x0000 //TX_AMS_RESRV_11 +954 0x0000 //TX_AMS_RESRV_12 +955 0x0000 //TX_AMS_RESRV_13 +956 0x0000 //TX_AMS_RESRV_14 +957 0x0000 //TX_AMS_RESRV_15 +958 0x0000 //TX_AMS_RESRV_16 +959 0x0000 //TX_AMS_RESRV_17 +960 0x0000 //TX_AMS_RESRV_18 +961 0x0000 //TX_AMS_RESRV_19 #RX -0 0x042C //RX_RECVFUNC_MODE_0 +0 0x242C //RX_RECVFUNC_MODE_0 1 0x0000 //RX_RECVFUNC_MODE_1 2 0x0000 //RX_SAMPLINGFREQ_SIG 3 0x0000 //RX_SAMPLINGFREQ_PROC @@ -939,7 +1004,7 @@ 30 0x0002 //RX_EXTRA_NS_L 31 0x0800 //RX_EXTRA_NS_A 32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 -33 0x5FFC //RX_TDDRC_LIMITER_THRD +33 0x7220 //RX_TDDRC_LIMITER_THRD 34 0x0800 //RX_TDDRC_LIMITER_GAIN 35 0x199A //RX_A_POST_FLT 36 0x0000 //RX_LMT_THRD @@ -1020,22 +1085,22 @@ 111 0x0002 //RX_FILTINDX 112 0x0000 //RX_TDDRC_THRD_0 113 0x0000 //RX_TDDRC_THRD_1 -114 0x1C00 //RX_TDDRC_THRD_2 -115 0x1D00 //RX_TDDRC_THRD_3 -116 0x3000 //RX_TDDRC_SLANT_0 -117 0x7EB8 //RX_TDDRC_SLANT_1 +114 0x1800 //RX_TDDRC_THRD_2 +115 0x1800 //RX_TDDRC_THRD_3 +116 0x7FFF //RX_TDDRC_SLANT_0 +117 0x7FFF //RX_TDDRC_SLANT_1 118 0x3000 //RX_TDDRC_ALPHA_UP_0 119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 120 0x0000 //RX_TDDRC_HMNC_FLAG 121 0x199A //RX_TDDRC_HMNC_GAIN 122 0x0001 //RX_TDDRC_SMT_FLAG 123 0x0CCD //RX_TDDRC_SMT_W -124 0x01F4 //RX_TDDRC_DRC_GAIN +124 0x0211 //RX_TDDRC_DRC_GAIN 125 0x7C00 //RX_LAMBDA_PKA_FP 126 0x280A //RX_TPKA_FP 127 0x032D //RX_MIN_G_FP 128 0x0A00 //RX_MAX_G_FP -129 0x000A //RX_SPK_VOL +129 0x0009 //RX_SPK_VOL 130 0x0000 //RX_VOL_RESRV_0 131 0x0000 //RX_MAXLEVEL_CNG 132 0x3000 //RX_BWE_UV_TH @@ -1756,11 +1821,862 @@ 110 0x0000 //RX_FDDRC_RESRV_0 129 0x0100 //RX_SPK_VOL 130 0x0000 //RX_VOL_RESRV_0 +#RX 2 +157 0x242C //RX_RECVFUNC_MODE_0 +158 0x0000 //RX_RECVFUNC_MODE_1 +159 0x0000 //RX_SAMPLINGFREQ_SIG +160 0x0000 //RX_SAMPLINGFREQ_PROC +161 0x000A //RX_FRAME_SZ +162 0x0000 //RX_DELAY_OPT +163 0x3000 //RX_TDDRC_ALPHA_UP_1 +164 0x3000 //RX_TDDRC_ALPHA_UP_2 +165 0x3000 //RX_TDDRC_ALPHA_UP_3 +166 0x3000 //RX_TDDRC_ALPHA_UP_4 +167 0x0800 //RX_PGA +168 0x7FFF //RX_A_HP +169 0x0000 //RX_B_PE +170 0x3800 //RX_THR_PITCH_DET_0 +171 0x3000 //RX_THR_PITCH_DET_1 +172 0x2800 //RX_THR_PITCH_DET_2 +173 0x0008 //RX_PITCH_BFR_LEN +174 0x0003 //RX_SBD_PITCH_DET +175 0x0100 //RX_PP_RESRV_0 +176 0x0020 //RX_PP_RESRV_1 +177 0x0600 //RX_N_SN_EST +178 0x000C //RX_N2_SN_EST +179 0x0010 //RX_NS_LVL_CTRL +180 0xF800 //RX_THR_SN_EST +181 0x7CCD //RX_LAMBDA_PFILT +182 0x000A //RX_FENS_RESRV_0 +183 0x0190 //RX_FENS_RESRV_1 +184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +187 0x0002 //RX_EXTRA_NS_L +188 0x0800 //RX_EXTRA_NS_A +189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +190 0x7220 //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +192 0x199A //RX_A_POST_FLT +193 0x0000 //RX_LMT_THRD +194 0x4000 //RX_LMT_ALPHA +195 0x0014 //RX_FDEQ_SUBNUM +196 0x4848 //RX_FDEQ_GAIN_0 +197 0x4848 //RX_FDEQ_GAIN_1 +198 0x4848 //RX_FDEQ_GAIN_2 +199 0x4848 //RX_FDEQ_GAIN_3 +200 0x4848 //RX_FDEQ_GAIN_4 +201 0x4848 //RX_FDEQ_GAIN_5 +202 0x4848 //RX_FDEQ_GAIN_6 +203 0x4848 //RX_FDEQ_GAIN_7 +204 0x4848 //RX_FDEQ_GAIN_8 +205 0x4848 //RX_FDEQ_GAIN_9 +206 0x4848 //RX_FDEQ_GAIN_10 +207 0x4848 //RX_FDEQ_GAIN_11 +208 0x4848 //RX_FDEQ_GAIN_12 +209 0x4848 //RX_FDEQ_GAIN_13 +210 0x4848 //RX_FDEQ_GAIN_14 +211 0x4848 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0202 //RX_FDEQ_BIN_0 +221 0x0203 //RX_FDEQ_BIN_1 +222 0x0303 //RX_FDEQ_BIN_2 +223 0x0304 //RX_FDEQ_BIN_3 +224 0x0405 //RX_FDEQ_BIN_4 +225 0x0506 //RX_FDEQ_BIN_5 +226 0x0708 //RX_FDEQ_BIN_6 +227 0x090A //RX_FDEQ_BIN_7 +228 0x0B0C //RX_FDEQ_BIN_8 +229 0x0D08 //RX_FDEQ_BIN_9 +230 0x0000 //RX_FDEQ_BIN_10 +231 0x0000 //RX_FDEQ_BIN_11 +232 0x0000 //RX_FDEQ_BIN_12 +233 0x0000 //RX_FDEQ_BIN_13 +234 0x0000 //RX_FDEQ_BIN_14 +235 0x0000 //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x4000 //RX_FDEQ_RESRV_0 +245 0x0320 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0030 //RX_FDDRC_BAND_MARGIN_1 +248 0x0050 //RX_FDDRC_BAND_MARGIN_2 +249 0x0080 //RX_FDDRC_BAND_MARGIN_3 +250 0x0007 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x5000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x6400 //RX_FDDRC_THRD_3_2 +258 0x6400 //RX_FDDRC_THRD_3_3 +259 0x2000 //RX_FDDRC_SLANT_0_0 +260 0x2000 //RX_FDDRC_SLANT_0_1 +261 0x2000 //RX_FDDRC_SLANT_0_2 +262 0x2000 //RX_FDDRC_SLANT_0_3 +263 0x5333 //RX_FDDRC_SLANT_1_0 +264 0x5333 //RX_FDDRC_SLANT_1_1 +265 0x5333 //RX_FDDRC_SLANT_1_2 +266 0x5333 //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +268 0x0002 //RX_FILTINDX +269 0x0000 //RX_TDDRC_THRD_0 +270 0x0000 //RX_TDDRC_THRD_1 +271 0x1800 //RX_TDDRC_THRD_2 +272 0x1800 //RX_TDDRC_THRD_3 +273 0x7FFF //RX_TDDRC_SLANT_0 +274 0x7FFF //RX_TDDRC_SLANT_1 +275 0x3000 //RX_TDDRC_ALPHA_UP_0 +276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x199A //RX_TDDRC_HMNC_GAIN +279 0x0001 //RX_TDDRC_SMT_FLAG +280 0x0CCD //RX_TDDRC_SMT_W +281 0x0211 //RX_TDDRC_DRC_GAIN +282 0x7C00 //RX_LAMBDA_PKA_FP +283 0x280A //RX_TPKA_FP +284 0x032D //RX_MIN_G_FP +285 0x0A00 //RX_MAX_G_FP +286 0x0009 //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 +288 0x0000 //RX_MAXLEVEL_CNG +289 0x3000 //RX_BWE_UV_TH +290 0x3000 //RX_BWE_UV_TH2 +291 0x1800 //RX_BWE_UV_TH3 +292 0x1000 //RX_BWE_V_TH +293 0x04CD //RX_BWE_GAIN1_V_TH1 +294 0x0F33 //RX_BWE_GAIN1_V_TH2 +295 0x7333 //RX_BWE_UV_EQ +296 0x199A //RX_BWE_V_EQ +297 0x7333 //RX_BWE_TONE_TH +298 0x0004 //RX_BWE_UV_HOLD_T +299 0x6CCD //RX_BWE_GAIN2_ALPHA +300 0x799A //RX_BWE_GAIN3_ALPHA +301 0x001E //RX_BWE_CUTOFF +302 0x3000 //RX_BWE_GAINFILL +303 0x3200 //RX_BWE_MAXTH_TONE +304 0x2000 //RX_BWE_EQ_0 +305 0x2000 //RX_BWE_EQ_1 +306 0x2000 //RX_BWE_EQ_2 +307 0x2000 //RX_BWE_EQ_3 +308 0x2000 //RX_BWE_EQ_4 +309 0x2000 //RX_BWE_EQ_5 +310 0x2000 //RX_BWE_EQ_6 +311 0x0000 //RX_BWE_RESRV_0 +312 0x0000 //RX_BWE_RESRV_1 +313 0x0000 //RX_BWE_RESRV_2 +#VOL 0 +163 0x3000 //RX_TDDRC_ALPHA_UP_1 +164 0x3000 //RX_TDDRC_ALPHA_UP_2 +165 0x3000 //RX_TDDRC_ALPHA_UP_3 +166 0x3000 //RX_TDDRC_ALPHA_UP_4 +184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +190 0x7220 //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +269 0x0000 //RX_TDDRC_THRD_0 +270 0x0000 //RX_TDDRC_THRD_1 +271 0x1800 //RX_TDDRC_THRD_2 +272 0x1800 //RX_TDDRC_THRD_3 +273 0x7FFF //RX_TDDRC_SLANT_0 +274 0x7FFF //RX_TDDRC_SLANT_1 +275 0x3000 //RX_TDDRC_ALPHA_UP_0 +276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x199A //RX_TDDRC_HMNC_GAIN +279 0x0001 //RX_TDDRC_SMT_FLAG +280 0x0CCD //RX_TDDRC_SMT_W +281 0x0211 //RX_TDDRC_DRC_GAIN +195 0x0014 //RX_FDEQ_SUBNUM +196 0x4848 //RX_FDEQ_GAIN_0 +197 0x4848 //RX_FDEQ_GAIN_1 +198 0x4848 //RX_FDEQ_GAIN_2 +199 0x4848 //RX_FDEQ_GAIN_3 +200 0x4848 //RX_FDEQ_GAIN_4 +201 0x4848 //RX_FDEQ_GAIN_5 +202 0x4848 //RX_FDEQ_GAIN_6 +203 0x4848 //RX_FDEQ_GAIN_7 +204 0x4848 //RX_FDEQ_GAIN_8 +205 0x4848 //RX_FDEQ_GAIN_9 +206 0x4848 //RX_FDEQ_GAIN_10 +207 0x4848 //RX_FDEQ_GAIN_11 +208 0x4848 //RX_FDEQ_GAIN_12 +209 0x4848 //RX_FDEQ_GAIN_13 +210 0x4848 //RX_FDEQ_GAIN_14 +211 0x4848 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0202 //RX_FDEQ_BIN_0 +221 0x0203 //RX_FDEQ_BIN_1 +222 0x0303 //RX_FDEQ_BIN_2 +223 0x0304 //RX_FDEQ_BIN_3 +224 0x0405 //RX_FDEQ_BIN_4 +225 0x0506 //RX_FDEQ_BIN_5 +226 0x0708 //RX_FDEQ_BIN_6 +227 0x090A //RX_FDEQ_BIN_7 +228 0x0B0C //RX_FDEQ_BIN_8 +229 0x0D08 //RX_FDEQ_BIN_9 +230 0x0000 //RX_FDEQ_BIN_10 +231 0x0000 //RX_FDEQ_BIN_11 +232 0x0000 //RX_FDEQ_BIN_12 +233 0x0000 //RX_FDEQ_BIN_13 +234 0x0000 //RX_FDEQ_BIN_14 +235 0x0000 //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x4000 //RX_FDEQ_RESRV_0 +245 0x0320 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0030 //RX_FDDRC_BAND_MARGIN_1 +248 0x0050 //RX_FDDRC_BAND_MARGIN_2 +249 0x0080 //RX_FDDRC_BAND_MARGIN_3 +250 0x0007 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x5000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x6400 //RX_FDDRC_THRD_3_2 +258 0x6400 //RX_FDDRC_THRD_3_3 +259 0x2000 //RX_FDDRC_SLANT_0_0 +260 0x2000 //RX_FDDRC_SLANT_0_1 +261 0x2000 //RX_FDDRC_SLANT_0_2 +262 0x2000 //RX_FDDRC_SLANT_0_3 +263 0x5333 //RX_FDDRC_SLANT_1_0 +264 0x5333 //RX_FDDRC_SLANT_1_1 +265 0x5333 //RX_FDDRC_SLANT_1_2 +266 0x5333 //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +286 0x0009 //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 +#VOL 1 +163 0x3000 //RX_TDDRC_ALPHA_UP_1 +164 0x3000 //RX_TDDRC_ALPHA_UP_2 +165 0x3000 //RX_TDDRC_ALPHA_UP_3 +166 0x3000 //RX_TDDRC_ALPHA_UP_4 +184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +190 0x7220 //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +269 0x0000 //RX_TDDRC_THRD_0 +270 0x0000 //RX_TDDRC_THRD_1 +271 0x1800 //RX_TDDRC_THRD_2 +272 0x1800 //RX_TDDRC_THRD_3 +273 0x7FFF //RX_TDDRC_SLANT_0 +274 0x7FFF //RX_TDDRC_SLANT_1 +275 0x3000 //RX_TDDRC_ALPHA_UP_0 +276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x199A //RX_TDDRC_HMNC_GAIN +279 0x0001 //RX_TDDRC_SMT_FLAG +280 0x0CCD //RX_TDDRC_SMT_W +281 0x0211 //RX_TDDRC_DRC_GAIN +195 0x0014 //RX_FDEQ_SUBNUM +196 0x4848 //RX_FDEQ_GAIN_0 +197 0x4848 //RX_FDEQ_GAIN_1 +198 0x4848 //RX_FDEQ_GAIN_2 +199 0x4848 //RX_FDEQ_GAIN_3 +200 0x4848 //RX_FDEQ_GAIN_4 +201 0x4848 //RX_FDEQ_GAIN_5 +202 0x4848 //RX_FDEQ_GAIN_6 +203 0x4848 //RX_FDEQ_GAIN_7 +204 0x4848 //RX_FDEQ_GAIN_8 +205 0x4848 //RX_FDEQ_GAIN_9 +206 0x4848 //RX_FDEQ_GAIN_10 +207 0x4848 //RX_FDEQ_GAIN_11 +208 0x4848 //RX_FDEQ_GAIN_12 +209 0x4848 //RX_FDEQ_GAIN_13 +210 0x4848 //RX_FDEQ_GAIN_14 +211 0x4848 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0202 //RX_FDEQ_BIN_0 +221 0x0203 //RX_FDEQ_BIN_1 +222 0x0303 //RX_FDEQ_BIN_2 +223 0x0304 //RX_FDEQ_BIN_3 +224 0x0405 //RX_FDEQ_BIN_4 +225 0x0506 //RX_FDEQ_BIN_5 +226 0x0708 //RX_FDEQ_BIN_6 +227 0x090A //RX_FDEQ_BIN_7 +228 0x0B0C //RX_FDEQ_BIN_8 +229 0x0D08 //RX_FDEQ_BIN_9 +230 0x0000 //RX_FDEQ_BIN_10 +231 0x0000 //RX_FDEQ_BIN_11 +232 0x0000 //RX_FDEQ_BIN_12 +233 0x0000 //RX_FDEQ_BIN_13 +234 0x0000 //RX_FDEQ_BIN_14 +235 0x0000 //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x4000 //RX_FDEQ_RESRV_0 +245 0x0320 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0030 //RX_FDDRC_BAND_MARGIN_1 +248 0x0050 //RX_FDDRC_BAND_MARGIN_2 +249 0x0080 //RX_FDDRC_BAND_MARGIN_3 +250 0x0007 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x5000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x6400 //RX_FDDRC_THRD_3_2 +258 0x6400 //RX_FDDRC_THRD_3_3 +259 0x2000 //RX_FDDRC_SLANT_0_0 +260 0x2000 //RX_FDDRC_SLANT_0_1 +261 0x2000 //RX_FDDRC_SLANT_0_2 +262 0x2000 //RX_FDDRC_SLANT_0_3 +263 0x5333 //RX_FDDRC_SLANT_1_0 +264 0x5333 //RX_FDDRC_SLANT_1_1 +265 0x5333 //RX_FDDRC_SLANT_1_2 +266 0x5333 //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +286 0x000F //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 +#VOL 2 +163 0x3000 //RX_TDDRC_ALPHA_UP_1 +164 0x3000 //RX_TDDRC_ALPHA_UP_2 +165 0x3000 //RX_TDDRC_ALPHA_UP_3 +166 0x3000 //RX_TDDRC_ALPHA_UP_4 +184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +190 0x7220 //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +269 0x0000 //RX_TDDRC_THRD_0 +270 0x0000 //RX_TDDRC_THRD_1 +271 0x1800 //RX_TDDRC_THRD_2 +272 0x1800 //RX_TDDRC_THRD_3 +273 0x7FFF //RX_TDDRC_SLANT_0 +274 0x7FFF //RX_TDDRC_SLANT_1 +275 0x3000 //RX_TDDRC_ALPHA_UP_0 +276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x199A //RX_TDDRC_HMNC_GAIN +279 0x0001 //RX_TDDRC_SMT_FLAG +280 0x0CCD //RX_TDDRC_SMT_W +281 0x0211 //RX_TDDRC_DRC_GAIN +195 0x0014 //RX_FDEQ_SUBNUM +196 0x4848 //RX_FDEQ_GAIN_0 +197 0x4848 //RX_FDEQ_GAIN_1 +198 0x4848 //RX_FDEQ_GAIN_2 +199 0x4848 //RX_FDEQ_GAIN_3 +200 0x4848 //RX_FDEQ_GAIN_4 +201 0x4848 //RX_FDEQ_GAIN_5 +202 0x4848 //RX_FDEQ_GAIN_6 +203 0x4848 //RX_FDEQ_GAIN_7 +204 0x4848 //RX_FDEQ_GAIN_8 +205 0x4848 //RX_FDEQ_GAIN_9 +206 0x4848 //RX_FDEQ_GAIN_10 +207 0x4848 //RX_FDEQ_GAIN_11 +208 0x4848 //RX_FDEQ_GAIN_12 +209 0x4848 //RX_FDEQ_GAIN_13 +210 0x4848 //RX_FDEQ_GAIN_14 +211 0x4848 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0202 //RX_FDEQ_BIN_0 +221 0x0203 //RX_FDEQ_BIN_1 +222 0x0303 //RX_FDEQ_BIN_2 +223 0x0304 //RX_FDEQ_BIN_3 +224 0x0405 //RX_FDEQ_BIN_4 +225 0x0506 //RX_FDEQ_BIN_5 +226 0x0708 //RX_FDEQ_BIN_6 +227 0x090A //RX_FDEQ_BIN_7 +228 0x0B0C //RX_FDEQ_BIN_8 +229 0x0D08 //RX_FDEQ_BIN_9 +230 0x0000 //RX_FDEQ_BIN_10 +231 0x0000 //RX_FDEQ_BIN_11 +232 0x0000 //RX_FDEQ_BIN_12 +233 0x0000 //RX_FDEQ_BIN_13 +234 0x0000 //RX_FDEQ_BIN_14 +235 0x0000 //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x4000 //RX_FDEQ_RESRV_0 +245 0x0320 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0030 //RX_FDDRC_BAND_MARGIN_1 +248 0x0050 //RX_FDDRC_BAND_MARGIN_2 +249 0x0080 //RX_FDDRC_BAND_MARGIN_3 +250 0x0007 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x5000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x6400 //RX_FDDRC_THRD_3_2 +258 0x6400 //RX_FDDRC_THRD_3_3 +259 0x2000 //RX_FDDRC_SLANT_0_0 +260 0x2000 //RX_FDDRC_SLANT_0_1 +261 0x2000 //RX_FDDRC_SLANT_0_2 +262 0x2000 //RX_FDDRC_SLANT_0_3 +263 0x5333 //RX_FDDRC_SLANT_1_0 +264 0x5333 //RX_FDDRC_SLANT_1_1 +265 0x5333 //RX_FDDRC_SLANT_1_2 +266 0x5333 //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +286 0x0019 //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 +#VOL 3 +163 0x3000 //RX_TDDRC_ALPHA_UP_1 +164 0x3000 //RX_TDDRC_ALPHA_UP_2 +165 0x3000 //RX_TDDRC_ALPHA_UP_3 +166 0x3000 //RX_TDDRC_ALPHA_UP_4 +184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +190 0x7220 //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +269 0x0000 //RX_TDDRC_THRD_0 +270 0x0000 //RX_TDDRC_THRD_1 +271 0x1800 //RX_TDDRC_THRD_2 +272 0x1800 //RX_TDDRC_THRD_3 +273 0x7FFF //RX_TDDRC_SLANT_0 +274 0x7FFF //RX_TDDRC_SLANT_1 +275 0x3000 //RX_TDDRC_ALPHA_UP_0 +276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x199A //RX_TDDRC_HMNC_GAIN +279 0x0001 //RX_TDDRC_SMT_FLAG +280 0x0CCD //RX_TDDRC_SMT_W +281 0x0211 //RX_TDDRC_DRC_GAIN +195 0x0014 //RX_FDEQ_SUBNUM +196 0x4848 //RX_FDEQ_GAIN_0 +197 0x4848 //RX_FDEQ_GAIN_1 +198 0x4848 //RX_FDEQ_GAIN_2 +199 0x4848 //RX_FDEQ_GAIN_3 +200 0x4848 //RX_FDEQ_GAIN_4 +201 0x4848 //RX_FDEQ_GAIN_5 +202 0x4848 //RX_FDEQ_GAIN_6 +203 0x4848 //RX_FDEQ_GAIN_7 +204 0x4848 //RX_FDEQ_GAIN_8 +205 0x4848 //RX_FDEQ_GAIN_9 +206 0x4848 //RX_FDEQ_GAIN_10 +207 0x4848 //RX_FDEQ_GAIN_11 +208 0x4848 //RX_FDEQ_GAIN_12 +209 0x4848 //RX_FDEQ_GAIN_13 +210 0x4848 //RX_FDEQ_GAIN_14 +211 0x4848 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0202 //RX_FDEQ_BIN_0 +221 0x0203 //RX_FDEQ_BIN_1 +222 0x0303 //RX_FDEQ_BIN_2 +223 0x0304 //RX_FDEQ_BIN_3 +224 0x0405 //RX_FDEQ_BIN_4 +225 0x0506 //RX_FDEQ_BIN_5 +226 0x0708 //RX_FDEQ_BIN_6 +227 0x090A //RX_FDEQ_BIN_7 +228 0x0B0C //RX_FDEQ_BIN_8 +229 0x0D08 //RX_FDEQ_BIN_9 +230 0x0000 //RX_FDEQ_BIN_10 +231 0x0000 //RX_FDEQ_BIN_11 +232 0x0000 //RX_FDEQ_BIN_12 +233 0x0000 //RX_FDEQ_BIN_13 +234 0x0000 //RX_FDEQ_BIN_14 +235 0x0000 //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x4000 //RX_FDEQ_RESRV_0 +245 0x0320 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0030 //RX_FDDRC_BAND_MARGIN_1 +248 0x0050 //RX_FDDRC_BAND_MARGIN_2 +249 0x0080 //RX_FDDRC_BAND_MARGIN_3 +250 0x0007 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x5000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x6400 //RX_FDDRC_THRD_3_2 +258 0x6400 //RX_FDDRC_THRD_3_3 +259 0x2000 //RX_FDDRC_SLANT_0_0 +260 0x2000 //RX_FDDRC_SLANT_0_1 +261 0x2000 //RX_FDDRC_SLANT_0_2 +262 0x2000 //RX_FDDRC_SLANT_0_3 +263 0x5333 //RX_FDDRC_SLANT_1_0 +264 0x5333 //RX_FDDRC_SLANT_1_1 +265 0x5333 //RX_FDDRC_SLANT_1_2 +266 0x5333 //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +286 0x002B //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 +#VOL 4 +163 0x3000 //RX_TDDRC_ALPHA_UP_1 +164 0x3000 //RX_TDDRC_ALPHA_UP_2 +165 0x3000 //RX_TDDRC_ALPHA_UP_3 +166 0x3000 //RX_TDDRC_ALPHA_UP_4 +184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +190 0x7220 //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +269 0x0000 //RX_TDDRC_THRD_0 +270 0x0000 //RX_TDDRC_THRD_1 +271 0x1800 //RX_TDDRC_THRD_2 +272 0x1800 //RX_TDDRC_THRD_3 +273 0x7FFF //RX_TDDRC_SLANT_0 +274 0x7FFF //RX_TDDRC_SLANT_1 +275 0x3000 //RX_TDDRC_ALPHA_UP_0 +276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x199A //RX_TDDRC_HMNC_GAIN +279 0x0001 //RX_TDDRC_SMT_FLAG +280 0x0CCD //RX_TDDRC_SMT_W +281 0x0211 //RX_TDDRC_DRC_GAIN +195 0x0014 //RX_FDEQ_SUBNUM +196 0x4848 //RX_FDEQ_GAIN_0 +197 0x4848 //RX_FDEQ_GAIN_1 +198 0x4848 //RX_FDEQ_GAIN_2 +199 0x4848 //RX_FDEQ_GAIN_3 +200 0x4848 //RX_FDEQ_GAIN_4 +201 0x4848 //RX_FDEQ_GAIN_5 +202 0x4848 //RX_FDEQ_GAIN_6 +203 0x4848 //RX_FDEQ_GAIN_7 +204 0x4848 //RX_FDEQ_GAIN_8 +205 0x4848 //RX_FDEQ_GAIN_9 +206 0x4848 //RX_FDEQ_GAIN_10 +207 0x4848 //RX_FDEQ_GAIN_11 +208 0x4848 //RX_FDEQ_GAIN_12 +209 0x4848 //RX_FDEQ_GAIN_13 +210 0x4848 //RX_FDEQ_GAIN_14 +211 0x4848 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0202 //RX_FDEQ_BIN_0 +221 0x0203 //RX_FDEQ_BIN_1 +222 0x0303 //RX_FDEQ_BIN_2 +223 0x0304 //RX_FDEQ_BIN_3 +224 0x0405 //RX_FDEQ_BIN_4 +225 0x0506 //RX_FDEQ_BIN_5 +226 0x0708 //RX_FDEQ_BIN_6 +227 0x090A //RX_FDEQ_BIN_7 +228 0x0B0C //RX_FDEQ_BIN_8 +229 0x0D08 //RX_FDEQ_BIN_9 +230 0x0000 //RX_FDEQ_BIN_10 +231 0x0000 //RX_FDEQ_BIN_11 +232 0x0000 //RX_FDEQ_BIN_12 +233 0x0000 //RX_FDEQ_BIN_13 +234 0x0000 //RX_FDEQ_BIN_14 +235 0x0000 //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x4000 //RX_FDEQ_RESRV_0 +245 0x0320 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0030 //RX_FDDRC_BAND_MARGIN_1 +248 0x0050 //RX_FDDRC_BAND_MARGIN_2 +249 0x0080 //RX_FDDRC_BAND_MARGIN_3 +250 0x0007 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x5000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x6400 //RX_FDDRC_THRD_3_2 +258 0x6400 //RX_FDDRC_THRD_3_3 +259 0x2000 //RX_FDDRC_SLANT_0_0 +260 0x2000 //RX_FDDRC_SLANT_0_1 +261 0x2000 //RX_FDDRC_SLANT_0_2 +262 0x2000 //RX_FDDRC_SLANT_0_3 +263 0x5333 //RX_FDDRC_SLANT_1_0 +264 0x5333 //RX_FDDRC_SLANT_1_1 +265 0x5333 //RX_FDDRC_SLANT_1_2 +266 0x5333 //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +286 0x0048 //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 +#VOL 5 +163 0x3000 //RX_TDDRC_ALPHA_UP_1 +164 0x3000 //RX_TDDRC_ALPHA_UP_2 +165 0x3000 //RX_TDDRC_ALPHA_UP_3 +166 0x3000 //RX_TDDRC_ALPHA_UP_4 +184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +190 0x7220 //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +269 0x0000 //RX_TDDRC_THRD_0 +270 0x0000 //RX_TDDRC_THRD_1 +271 0x1800 //RX_TDDRC_THRD_2 +272 0x1800 //RX_TDDRC_THRD_3 +273 0x7FFF //RX_TDDRC_SLANT_0 +274 0x7FFF //RX_TDDRC_SLANT_1 +275 0x3000 //RX_TDDRC_ALPHA_UP_0 +276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x199A //RX_TDDRC_HMNC_GAIN +279 0x0001 //RX_TDDRC_SMT_FLAG +280 0x0CCD //RX_TDDRC_SMT_W +281 0x0211 //RX_TDDRC_DRC_GAIN +195 0x0014 //RX_FDEQ_SUBNUM +196 0x4848 //RX_FDEQ_GAIN_0 +197 0x4848 //RX_FDEQ_GAIN_1 +198 0x4848 //RX_FDEQ_GAIN_2 +199 0x4848 //RX_FDEQ_GAIN_3 +200 0x4848 //RX_FDEQ_GAIN_4 +201 0x4848 //RX_FDEQ_GAIN_5 +202 0x4848 //RX_FDEQ_GAIN_6 +203 0x4848 //RX_FDEQ_GAIN_7 +204 0x4848 //RX_FDEQ_GAIN_8 +205 0x4848 //RX_FDEQ_GAIN_9 +206 0x4848 //RX_FDEQ_GAIN_10 +207 0x4848 //RX_FDEQ_GAIN_11 +208 0x4848 //RX_FDEQ_GAIN_12 +209 0x4848 //RX_FDEQ_GAIN_13 +210 0x4848 //RX_FDEQ_GAIN_14 +211 0x4848 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0202 //RX_FDEQ_BIN_0 +221 0x0203 //RX_FDEQ_BIN_1 +222 0x0303 //RX_FDEQ_BIN_2 +223 0x0304 //RX_FDEQ_BIN_3 +224 0x0405 //RX_FDEQ_BIN_4 +225 0x0506 //RX_FDEQ_BIN_5 +226 0x0708 //RX_FDEQ_BIN_6 +227 0x090A //RX_FDEQ_BIN_7 +228 0x0B0C //RX_FDEQ_BIN_8 +229 0x0D08 //RX_FDEQ_BIN_9 +230 0x0000 //RX_FDEQ_BIN_10 +231 0x0000 //RX_FDEQ_BIN_11 +232 0x0000 //RX_FDEQ_BIN_12 +233 0x0000 //RX_FDEQ_BIN_13 +234 0x0000 //RX_FDEQ_BIN_14 +235 0x0000 //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x4000 //RX_FDEQ_RESRV_0 +245 0x0320 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0030 //RX_FDDRC_BAND_MARGIN_1 +248 0x0050 //RX_FDDRC_BAND_MARGIN_2 +249 0x0080 //RX_FDDRC_BAND_MARGIN_3 +250 0x0007 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x5000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x6400 //RX_FDDRC_THRD_3_2 +258 0x6400 //RX_FDDRC_THRD_3_3 +259 0x2000 //RX_FDDRC_SLANT_0_0 +260 0x2000 //RX_FDDRC_SLANT_0_1 +261 0x2000 //RX_FDDRC_SLANT_0_2 +262 0x2000 //RX_FDDRC_SLANT_0_3 +263 0x5333 //RX_FDDRC_SLANT_1_0 +264 0x5333 //RX_FDDRC_SLANT_1_1 +265 0x5333 //RX_FDDRC_SLANT_1_2 +266 0x5333 //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +286 0x007A //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 +#VOL 6 +163 0x3000 //RX_TDDRC_ALPHA_UP_1 +164 0x3000 //RX_TDDRC_ALPHA_UP_2 +165 0x3000 //RX_TDDRC_ALPHA_UP_3 +166 0x3000 //RX_TDDRC_ALPHA_UP_4 +184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +190 0x7220 //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +269 0x0000 //RX_TDDRC_THRD_0 +270 0x0000 //RX_TDDRC_THRD_1 +271 0x1800 //RX_TDDRC_THRD_2 +272 0x1800 //RX_TDDRC_THRD_3 +273 0x7FFF //RX_TDDRC_SLANT_0 +274 0x7FFF //RX_TDDRC_SLANT_1 +275 0x3000 //RX_TDDRC_ALPHA_UP_0 +276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x199A //RX_TDDRC_HMNC_GAIN +279 0x0001 //RX_TDDRC_SMT_FLAG +280 0x0CCD //RX_TDDRC_SMT_W +281 0x0211 //RX_TDDRC_DRC_GAIN +195 0x0014 //RX_FDEQ_SUBNUM +196 0x4848 //RX_FDEQ_GAIN_0 +197 0x4848 //RX_FDEQ_GAIN_1 +198 0x4848 //RX_FDEQ_GAIN_2 +199 0x4848 //RX_FDEQ_GAIN_3 +200 0x4848 //RX_FDEQ_GAIN_4 +201 0x4848 //RX_FDEQ_GAIN_5 +202 0x4848 //RX_FDEQ_GAIN_6 +203 0x4848 //RX_FDEQ_GAIN_7 +204 0x4848 //RX_FDEQ_GAIN_8 +205 0x4848 //RX_FDEQ_GAIN_9 +206 0x4848 //RX_FDEQ_GAIN_10 +207 0x4848 //RX_FDEQ_GAIN_11 +208 0x4848 //RX_FDEQ_GAIN_12 +209 0x4848 //RX_FDEQ_GAIN_13 +210 0x4848 //RX_FDEQ_GAIN_14 +211 0x4848 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0202 //RX_FDEQ_BIN_0 +221 0x0203 //RX_FDEQ_BIN_1 +222 0x0303 //RX_FDEQ_BIN_2 +223 0x0304 //RX_FDEQ_BIN_3 +224 0x0405 //RX_FDEQ_BIN_4 +225 0x0506 //RX_FDEQ_BIN_5 +226 0x0708 //RX_FDEQ_BIN_6 +227 0x090A //RX_FDEQ_BIN_7 +228 0x0B0C //RX_FDEQ_BIN_8 +229 0x0D08 //RX_FDEQ_BIN_9 +230 0x0000 //RX_FDEQ_BIN_10 +231 0x0000 //RX_FDEQ_BIN_11 +232 0x0000 //RX_FDEQ_BIN_12 +233 0x0000 //RX_FDEQ_BIN_13 +234 0x0000 //RX_FDEQ_BIN_14 +235 0x0000 //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x4000 //RX_FDEQ_RESRV_0 +245 0x0320 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0030 //RX_FDDRC_BAND_MARGIN_1 +248 0x0050 //RX_FDDRC_BAND_MARGIN_2 +249 0x0080 //RX_FDDRC_BAND_MARGIN_3 +250 0x0007 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x5000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x6400 //RX_FDDRC_THRD_3_2 +258 0x6400 //RX_FDDRC_THRD_3_3 +259 0x2000 //RX_FDDRC_SLANT_0_0 +260 0x2000 //RX_FDDRC_SLANT_0_1 +261 0x2000 //RX_FDDRC_SLANT_0_2 +262 0x2000 //RX_FDDRC_SLANT_0_3 +263 0x5333 //RX_FDDRC_SLANT_1_0 +264 0x5333 //RX_FDDRC_SLANT_1_1 +265 0x5333 //RX_FDDRC_SLANT_1_2 +266 0x5333 //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +286 0x0100 //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 #CASE_NAME HEADSET-USB_BLACKBIRD-VOICE_GENERIC-WB #PARAM_MODE FULL -#PARAM_TYPE TX+RX -#TOTAL_CUSTOM_STEP 7 +#PARAM_TYPE TX+2RX +#TOTAL_CUSTOM_STEP 7+7 #TX 0 0x0009 //TX_OPERATION_MODE_0 1 0x0009 //TX_OPERATION_MODE_1 @@ -2004,7 +2920,7 @@ 239 0x0800 //TX_DT_RESRV_7 240 0x0800 //TX_DT_RESRV_8 241 0x0000 //TX_DT_RESRV_9 -242 0xF400 //TX_THR_SN_EST_0 +242 0xFA00 //TX_THR_SN_EST_0 243 0xFA00 //TX_THR_SN_EST_1 244 0xF700 //TX_THR_SN_EST_2 245 0xFC00 //TX_THR_SN_EST_3 @@ -2013,20 +2929,20 @@ 248 0xF400 //TX_THR_SN_EST_6 249 0xF600 //TX_THR_SN_EST_7 250 0x0000 //TX_DELTA_THR_SN_EST_0 -251 0x0100 //TX_DELTA_THR_SN_EST_1 +251 0x0200 //TX_DELTA_THR_SN_EST_1 252 0x0200 //TX_DELTA_THR_SN_EST_2 -253 0x0200 //TX_DELTA_THR_SN_EST_3 -254 0x0100 //TX_DELTA_THR_SN_EST_4 +253 0x0100 //TX_DELTA_THR_SN_EST_3 +254 0x0200 //TX_DELTA_THR_SN_EST_4 255 0x0200 //TX_DELTA_THR_SN_EST_5 -256 0x0200 //TX_DELTA_THR_SN_EST_6 +256 0x0100 //TX_DELTA_THR_SN_EST_6 257 0x0200 //TX_DELTA_THR_SN_EST_7 258 0x6000 //TX_LAMBDA_NN_EST_0 -259 0x6000 //TX_LAMBDA_NN_EST_1 +259 0x4000 //TX_LAMBDA_NN_EST_1 260 0x4000 //TX_LAMBDA_NN_EST_2 261 0x4000 //TX_LAMBDA_NN_EST_3 262 0x4000 //TX_LAMBDA_NN_EST_4 263 0x4000 //TX_LAMBDA_NN_EST_5 -264 0x4000 //TX_LAMBDA_NN_EST_6 +264 0x6000 //TX_LAMBDA_NN_EST_6 265 0x4000 //TX_LAMBDA_NN_EST_7 266 0x0400 //TX_N_SN_EST 267 0x001E //TX_INBEAM_T @@ -2044,18 +2960,18 @@ 279 0x1000 //TX_B_POST_FLT_0 280 0x1000 //TX_B_POST_FLT_1 281 0x000F //TX_NS_LVL_CTRL_0 -282 0x0018 //TX_NS_LVL_CTRL_1 -283 0x0014 //TX_NS_LVL_CTRL_2 -284 0x001C //TX_NS_LVL_CTRL_3 -285 0x0012 //TX_NS_LVL_CTRL_4 +282 0x0014 //TX_NS_LVL_CTRL_1 +283 0x001C //TX_NS_LVL_CTRL_2 +284 0x0012 //TX_NS_LVL_CTRL_3 +285 0x000F //TX_NS_LVL_CTRL_4 286 0x000F //TX_NS_LVL_CTRL_5 -287 0x000F //TX_NS_LVL_CTRL_6 +287 0x0018 //TX_NS_LVL_CTRL_6 288 0x0011 //TX_NS_LVL_CTRL_7 289 0x000C //TX_MIN_GAIN_S_0 -290 0x000C //TX_MIN_GAIN_S_1 -291 0x000F //TX_MIN_GAIN_S_2 -292 0x000C //TX_MIN_GAIN_S_3 -293 0x0009 //TX_MIN_GAIN_S_4 +290 0x000F //TX_MIN_GAIN_S_1 +291 0x000C //TX_MIN_GAIN_S_2 +292 0x0009 //TX_MIN_GAIN_S_3 +293 0x000C //TX_MIN_GAIN_S_4 294 0x000C //TX_MIN_GAIN_S_5 295 0x000C //TX_MIN_GAIN_S_6 296 0x000F //TX_MIN_GAIN_S_7 @@ -2063,10 +2979,10 @@ 298 0x0000 //TX_NS_MAX_PRI_SNR_TH 299 0x0000 //TX_NMOS_SUP_MENSA 300 0x7FFF //TX_SNRI_SUP_0 -301 0x7FFF //TX_SNRI_SUP_1 -302 0x6000 //TX_SNRI_SUP_2 -303 0x2000 //TX_SNRI_SUP_3 -304 0x6000 //TX_SNRI_SUP_4 +301 0x6000 //TX_SNRI_SUP_1 +302 0x2000 //TX_SNRI_SUP_2 +303 0x6000 //TX_SNRI_SUP_3 +304 0x7FFF //TX_SNRI_SUP_4 305 0x7FFF //TX_SNRI_SUP_5 306 0x7FFF //TX_SNRI_SUP_6 307 0x7FFF //TX_SNRI_SUP_7 @@ -2077,17 +2993,17 @@ 312 0x7FFF //TX_A_POST_FILT_0 313 0x2000 //TX_A_POST_FILT_1 314 0x4000 //TX_A_POST_FILT_S_0 -315 0x4000 //TX_A_POST_FILT_S_1 +315 0x5000 //TX_A_POST_FILT_S_1 316 0x5000 //TX_A_POST_FILT_S_2 317 0x5000 //TX_A_POST_FILT_S_3 318 0x5000 //TX_A_POST_FILT_S_4 319 0x5000 //TX_A_POST_FILT_S_5 -320 0x5000 //TX_A_POST_FILT_S_6 +320 0x4000 //TX_A_POST_FILT_S_6 321 0x5000 //TX_A_POST_FILT_S_7 322 0x1000 //TX_B_POST_FILT_0 323 0x1000 //TX_B_POST_FILT_1 -324 0x1000 //TX_B_POST_FILT_2 -325 0x3000 //TX_B_POST_FILT_3 +324 0x3000 //TX_B_POST_FILT_2 +325 0x1000 //TX_B_POST_FILT_3 326 0x1000 //TX_B_POST_FILT_4 327 0x1000 //TX_B_POST_FILT_5 328 0x1000 //TX_B_POST_FILT_6 @@ -2102,12 +3018,12 @@ 337 0x7FFF //TX_B_LESSCUT_RTO_S_7 338 0x7CCD //TX_LAMBDA_PFILT 339 0x7B00 //TX_LAMBDA_PFILT_S_0 -340 0x7F00 //TX_LAMBDA_PFILT_S_1 +340 0x7B00 //TX_LAMBDA_PFILT_S_1 341 0x7B00 //TX_LAMBDA_PFILT_S_2 342 0x7B00 //TX_LAMBDA_PFILT_S_3 343 0x7B00 //TX_LAMBDA_PFILT_S_4 344 0x7B00 //TX_LAMBDA_PFILT_S_5 -345 0x7B00 //TX_LAMBDA_PFILT_S_6 +345 0x7F00 //TX_LAMBDA_PFILT_S_6 346 0x7B00 //TX_LAMBDA_PFILT_S_7 347 0x0200 //TX_K_PEPPER 348 0x0400 //TX_A_PEPPER @@ -2129,7 +3045,7 @@ 364 0x0000 //TX_K_APT 365 0x0001 //TX_NOISEDET 366 0x0190 //TX_NDETCT -367 0x0065 //TX_NOISE_TH_0 +367 0x0102 //TX_NOISE_TH_0 368 0x7FFF //TX_NOISE_TH_0_2 369 0x7FFF //TX_NOISE_TH_0_3 370 0x0900 //TX_NOISE_TH_1 @@ -2141,11 +3057,11 @@ 376 0x7FFF //TX_NOISE_TH_5_3 377 0x7FFF //TX_NOISE_TH_5_4 378 0x00FB //TX_NOISE_TH_6 -379 0x0029 //TX_MINENOISE_TH -380 0x4000 //TX_MINENOISE_MIC0_TH_MTS -381 0xFFEE //TX_MINENOISE_MIC0_TH_EXP -382 0x6000 //TX_MINENOISE_MIC0_S_TH_MTS -383 0xFFF3 //TX_MINENOISE_MIC0_S_TH_EXP +379 0x00F8 //TX_MINENOISE_TH +380 0xD508 //TX_MORENS_TFMASK_TH +381 0x0001 //TX_DRC_QUIET_FLOOR +382 0x3A98 //TX_RATIODTL_CUT_TH +383 0x0DAC //TX_DT_CUT_K1 384 0x0666 //TX_OUT_ENER_S_TH_CLEAN 385 0x0666 //TX_OUT_ENER_S_TH_LESSCLEAN 386 0x0333 //TX_OUT_ENER_S_TH_NOISY @@ -2153,22 +3069,22 @@ 388 0x0333 //TX_OUT_ENER_TH_SPEECH 389 0x2000 //TX_SN_NPB_GAIN 390 0x0000 //TX_NN_NPB_GAIN -391 0x0000 //TX_CSX_ALPHA_0 -392 0x0000 //TX_CSX_ALPHA_1 -393 0x0000 //TX_CSX_ALPHA_2 -394 0x0000 //TX_CSX_ALPHA_3 -395 0x0800 //TX_MU_ARSP_EST -396 0x00C8 //TX_P_OUTBEAM_MIN_TH +391 0x7FFF //TX_POST_MASK_SUP_HSNE +392 0x1388 //TX_TAIL_DET_TH +393 0x4000 //TX_B_LESSCUT_RTO_WTA +394 0x0000 //TX_MEL_G_R +395 0x0080 //TX_SUPHIGH_TH +396 0x0000 //TX_MASK_G_R 397 0x0002 //TX_EXTRA_NS_L -398 0x0800 //TX_EXTRA_NS_A -399 0x0005 //TX_VR_NOISE_FLOOR_TH +398 0x1800 //TX_C_POST_FLT_MASK +399 0x7FFF //TX_A_POST_FLT_WNS 400 0x0148 //TX_MIN_G_LOW300HZ 401 0x0002 //TX_MAXLEVEL_CNG 402 0x00B4 //TX_STN_NOISE_TH 403 0x4000 //TX_POST_MASK_SUP 404 0x7FFF //TX_POST_MASK_ADJUST 405 0x00C8 //TX_NS_ENOISE_MIC0_TH -406 0x0029 //TX_MINENOISE_MIC0_TH +406 0x00DC //TX_MINENOISE_MIC0_TH 407 0x012C //TX_MINENOISE_MIC0_S_TH 408 0x7FFF //TX_MIN_G_CTRL_SSNS 409 0x0800 //TX_METAL_RTO_THR @@ -2276,16 +3192,16 @@ 511 0x6666 //TX_MIC_TO_BFGAIN 512 0x0000 //TX_MICTOBFGAIN0 513 0x0000 //TX_FASTMUE_TH -514 0x0000 //TX_DERVB_LEN_0 -515 0x0000 //TX_DERVB_LEN_1 -516 0x0000 //TX_RHO_DERVB -517 0x0000 //TX_MIC_INDX_DERVB -518 0x0000 //TX_MU_DERVB -519 0x0000 //TX_DR_RESRV_0 -520 0x0000 //TX_DR_RESRV_1 -521 0x0000 //TX_DR_RESRV_2 -522 0x0000 //TX_DR_RESRV_3 -523 0x0000 //TX_DR_RESRV_4 +514 0xC000 //TX_DEREVERB_LF_MU +515 0xC000 //TX_DEREVERB_HF_MU +516 0xCCCC //TX_DEREVERB_DELAY +517 0xD999 //TX_DEREVERB_COEF_LEN +518 0x1F40 //TX_DEREVERB_DNR +519 0x0000 //TX_DEREVERB_ALPHA +520 0x0000 //TX_DEREVERB_BETA +521 0x0000 //TX_GSC_RTOL_TH +522 0x7000 //TX_GSC_RTOH_TH +523 0x0064 //TX_WIDE2_MEANHTH 524 0x0000 //TX_DR_RESRV_5 525 0x0000 //TX_DR_RESRV_6 526 0x0000 //TX_DR_RESRV_7 @@ -2659,8 +3575,73 @@ 894 0xC000 //TX_FASTNS_SSA_THHFL 895 0xCCCC //TX_FASTNS_SSA_THLFH 896 0xD999 //TX_FASTNS_SSA_THHFH +897 0x2339 //TX_SENDFUNC_REG_MICMUTE +898 0x0021 //TX_SENDFUNC_REG_MICMUTE1 +899 0x02BC //TX_MICMUTE_RATIO_THR +900 0x0140 //TX_MICMUTE_AMP_THR +901 0x0004 //TX_MICMUTE_HPF_IND +902 0x00C0 //TX_MICMUTE_LOG_EYR_TH +903 0x0008 //TX_MICMUTE_CVG_TIME +904 0x0008 //TX_MICMUTE_RELEASE_TIME +905 0x01FE //TX_MIC_VOLUME_MIC0MUTE +906 0x0020 //TX_MICMUTE_EPD_OFFSET_0 +907 0x001E //TX_MICMUTE_FRQ_AEC_L +908 0x7999 //TX_MICMUTE_EAD_THR +909 0x7FFF //TX_MICMUTE_LAMBDA_CB_NLE +910 0x7FFF //TX_MICMUTE_LAMBDA_RE_EST +911 0x4000 //TX_DTD_THR1_MICMUTE_0 +912 0x7000 //TX_DTD_THR1_MICMUTE_1 +913 0x7FFF //TX_DTD_THR1_MICMUTE_2 +914 0x7FFF //TX_DTD_THR1_MICMUTE_3 +915 0x6CCC //TX_DTD_THR2_MICMUTE_0 +916 0x0400 //TX_MICMUTE_MIN_EQ_RE_EST_0 +917 0x0400 //TX_MICMUTE_MIN_EQ_RE_EST_1 +918 0x1000 //TX_MICMUTE_MIN_EQ_RE_EST_2 +919 0x7FFF //TX_MICMUTE_MIN_EQ_RE_EST_3 +920 0x7FFF //TX_MICMUTE_MIN_EQ_RE_EST_4 +921 0x4000 //TX_MICMUTE_C_POST_FLT +922 0x03E8 //TX_MICMUTE_DT_CUT_K +923 0x0001 //TX_MICMUTE_DT_CUT_THR +924 0x03E8 //TX_MICMUTE_DT_CUT_K2 +925 0x0001 //TX_MICMUTE_DT_CUT_THR2 +926 0x0064 //TX_MICMUTE_DT2_HOLD_N +927 0x1000 //TX_MICMUTE_RATIODTH_THCUT +928 0x1000 //TX_MICMUTE_B_POST_FLT_ECHOL +929 0x7FFF //TX_MICMUTE_B_POST_FLT_ECHOH +930 0x0400 //TX_MICMUTE_C_POST_FLT_MASK +931 0x7999 //TX_MICMUTE_RATIODTL_CUT_TH +932 0x0258 //TX_MICMUTE_DT_CUT_K1 +933 0x0800 //TX_MICMUTE_N2_SN_EST +934 0xFC00 //TX_MICMUTE_THR_SN_EST_0 +935 0x001C //TX_MICMUTE_MIN_G_CTRL_0 +936 0x6000 //TX_MICMUTE_A_POST_FILT_S_0 +937 0x7000 //TX_MICMUTE_B_POST_FILT_0 +938 0x2710 //TX_MIC1RUB_AMP_THR +939 0x0010 //TX_MIC1MUTE_RATIO_THR +940 0x0450 //TX_MIC1MUTE_AMP_THR +941 0x0008 //TX_MIC1MUTE_CVG_TIME +942 0x0008 //TX_MIC1MUTE_RELEASE_TIME +943 0x0000 //TX_AMS_RESRV_01 +944 0x0000 //TX_AMS_RESRV_02 +945 0x0000 //TX_AMS_RESRV_03 +946 0x0000 //TX_AMS_RESRV_04 +947 0x0000 //TX_AMS_RESRV_05 +948 0x0000 //TX_AMS_RESRV_06 +949 0x0000 //TX_AMS_RESRV_07 +950 0x0000 //TX_AMS_RESRV_08 +951 0x0000 //TX_AMS_RESRV_09 +952 0x0000 //TX_AMS_RESRV_10 +953 0x0000 //TX_AMS_RESRV_11 +954 0x0000 //TX_AMS_RESRV_12 +955 0x0000 //TX_AMS_RESRV_13 +956 0x0000 //TX_AMS_RESRV_14 +957 0x0000 //TX_AMS_RESRV_15 +958 0x0000 //TX_AMS_RESRV_16 +959 0x0000 //TX_AMS_RESRV_17 +960 0x0000 //TX_AMS_RESRV_18 +961 0x0000 //TX_AMS_RESRV_19 #RX -0 0x042C //RX_RECVFUNC_MODE_0 +0 0x242C //RX_RECVFUNC_MODE_0 1 0x0000 //RX_RECVFUNC_MODE_1 2 0x0001 //RX_SAMPLINGFREQ_SIG 3 0x0001 //RX_SAMPLINGFREQ_PROC @@ -3510,11 +4491,862 @@ 110 0x0000 //RX_FDDRC_RESRV_0 129 0x0100 //RX_SPK_VOL 130 0x0000 //RX_VOL_RESRV_0 +#RX 2 +157 0x242C //RX_RECVFUNC_MODE_0 +158 0x0000 //RX_RECVFUNC_MODE_1 +159 0x0001 //RX_SAMPLINGFREQ_SIG +160 0x0001 //RX_SAMPLINGFREQ_PROC +161 0x000A //RX_FRAME_SZ +162 0x0000 //RX_DELAY_OPT +163 0x1000 //RX_TDDRC_ALPHA_UP_1 +164 0x1000 //RX_TDDRC_ALPHA_UP_2 +165 0x1000 //RX_TDDRC_ALPHA_UP_3 +166 0x1000 //RX_TDDRC_ALPHA_UP_4 +167 0x0800 //RX_PGA +168 0x7FFF //RX_A_HP +169 0x4000 //RX_B_PE +170 0x3800 //RX_THR_PITCH_DET_0 +171 0x3000 //RX_THR_PITCH_DET_1 +172 0x2800 //RX_THR_PITCH_DET_2 +173 0x0008 //RX_PITCH_BFR_LEN +174 0x0003 //RX_SBD_PITCH_DET +175 0x0100 //RX_PP_RESRV_0 +176 0x0020 //RX_PP_RESRV_1 +177 0x0600 //RX_N_SN_EST +178 0x000C //RX_N2_SN_EST +179 0x0010 //RX_NS_LVL_CTRL +180 0xF800 //RX_THR_SN_EST +181 0x7CCD //RX_LAMBDA_PFILT +182 0x000A //RX_FENS_RESRV_0 +183 0x0190 //RX_FENS_RESRV_1 +184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +187 0x0002 //RX_EXTRA_NS_L +188 0x0800 //RX_EXTRA_NS_A +189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +190 0x7FFF //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +192 0x199A //RX_A_POST_FLT +193 0x0000 //RX_LMT_THRD +194 0x4000 //RX_LMT_ALPHA +195 0x001C //RX_FDEQ_SUBNUM +196 0x4848 //RX_FDEQ_GAIN_0 +197 0x4848 //RX_FDEQ_GAIN_1 +198 0x4848 //RX_FDEQ_GAIN_2 +199 0x4848 //RX_FDEQ_GAIN_3 +200 0x4848 //RX_FDEQ_GAIN_4 +201 0x4848 //RX_FDEQ_GAIN_5 +202 0x484B //RX_FDEQ_GAIN_6 +203 0x4B48 //RX_FDEQ_GAIN_7 +204 0x4848 //RX_FDEQ_GAIN_8 +205 0x4848 //RX_FDEQ_GAIN_9 +206 0x4846 //RX_FDEQ_GAIN_10 +207 0x403F //RX_FDEQ_GAIN_11 +208 0x3F40 //RX_FDEQ_GAIN_12 +209 0x4248 //RX_FDEQ_GAIN_13 +210 0x4848 //RX_FDEQ_GAIN_14 +211 0x4848 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0202 //RX_FDEQ_BIN_0 +221 0x0203 //RX_FDEQ_BIN_1 +222 0x0303 //RX_FDEQ_BIN_2 +223 0x0304 //RX_FDEQ_BIN_3 +224 0x0405 //RX_FDEQ_BIN_4 +225 0x0506 //RX_FDEQ_BIN_5 +226 0x0708 //RX_FDEQ_BIN_6 +227 0x090A //RX_FDEQ_BIN_7 +228 0x0B0C //RX_FDEQ_BIN_8 +229 0x0D0E //RX_FDEQ_BIN_9 +230 0x0E0F //RX_FDEQ_BIN_10 +231 0x0F10 //RX_FDEQ_BIN_11 +232 0x1011 //RX_FDEQ_BIN_12 +233 0x1104 //RX_FDEQ_BIN_13 +234 0x0000 //RX_FDEQ_BIN_14 +235 0x0000 //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x4000 //RX_FDEQ_RESRV_0 +245 0x0320 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0030 //RX_FDDRC_BAND_MARGIN_1 +248 0x0050 //RX_FDDRC_BAND_MARGIN_2 +249 0x0080 //RX_FDDRC_BAND_MARGIN_3 +250 0x0007 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x5000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x6400 //RX_FDDRC_THRD_3_2 +258 0x6400 //RX_FDDRC_THRD_3_3 +259 0x2000 //RX_FDDRC_SLANT_0_0 +260 0x2000 //RX_FDDRC_SLANT_0_1 +261 0x2000 //RX_FDDRC_SLANT_0_2 +262 0x2000 //RX_FDDRC_SLANT_0_3 +263 0x5333 //RX_FDDRC_SLANT_1_0 +264 0x5333 //RX_FDDRC_SLANT_1_1 +265 0x5333 //RX_FDDRC_SLANT_1_2 +266 0x5333 //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +268 0x0002 //RX_FILTINDX +269 0x0000 //RX_TDDRC_THRD_0 +270 0x0000 //RX_TDDRC_THRD_1 +271 0x1C00 //RX_TDDRC_THRD_2 +272 0x1D00 //RX_TDDRC_THRD_3 +273 0x3000 //RX_TDDRC_SLANT_0 +274 0x7FFF //RX_TDDRC_SLANT_1 +275 0x1000 //RX_TDDRC_ALPHA_UP_0 +276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x199A //RX_TDDRC_HMNC_GAIN +279 0x0001 //RX_TDDRC_SMT_FLAG +280 0x0CCD //RX_TDDRC_SMT_W +281 0x01AE //RX_TDDRC_DRC_GAIN +282 0x7C00 //RX_LAMBDA_PKA_FP +283 0x280A //RX_TPKA_FP +284 0x032D //RX_MIN_G_FP +285 0x0A00 //RX_MAX_G_FP +286 0x000B //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 +288 0x0000 //RX_MAXLEVEL_CNG +289 0x3000 //RX_BWE_UV_TH +290 0x3000 //RX_BWE_UV_TH2 +291 0x1800 //RX_BWE_UV_TH3 +292 0x1000 //RX_BWE_V_TH +293 0x04CD //RX_BWE_GAIN1_V_TH1 +294 0x0F33 //RX_BWE_GAIN1_V_TH2 +295 0x7333 //RX_BWE_UV_EQ +296 0x199A //RX_BWE_V_EQ +297 0x7333 //RX_BWE_TONE_TH +298 0x0004 //RX_BWE_UV_HOLD_T +299 0x6CCD //RX_BWE_GAIN2_ALPHA +300 0x799A //RX_BWE_GAIN3_ALPHA +301 0x001E //RX_BWE_CUTOFF +302 0x3000 //RX_BWE_GAINFILL +303 0x3200 //RX_BWE_MAXTH_TONE +304 0x2000 //RX_BWE_EQ_0 +305 0x2000 //RX_BWE_EQ_1 +306 0x2000 //RX_BWE_EQ_2 +307 0x2000 //RX_BWE_EQ_3 +308 0x2000 //RX_BWE_EQ_4 +309 0x2000 //RX_BWE_EQ_5 +310 0x2000 //RX_BWE_EQ_6 +311 0x0000 //RX_BWE_RESRV_0 +312 0x0000 //RX_BWE_RESRV_1 +313 0x0000 //RX_BWE_RESRV_2 +#VOL 0 +163 0x1000 //RX_TDDRC_ALPHA_UP_1 +164 0x1000 //RX_TDDRC_ALPHA_UP_2 +165 0x1000 //RX_TDDRC_ALPHA_UP_3 +166 0x1000 //RX_TDDRC_ALPHA_UP_4 +184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +190 0x7220 //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +269 0x0000 //RX_TDDRC_THRD_0 +270 0x0000 //RX_TDDRC_THRD_1 +271 0x1800 //RX_TDDRC_THRD_2 +272 0x1800 //RX_TDDRC_THRD_3 +273 0x7FFF //RX_TDDRC_SLANT_0 +274 0x7FFF //RX_TDDRC_SLANT_1 +275 0x1000 //RX_TDDRC_ALPHA_UP_0 +276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x199A //RX_TDDRC_HMNC_GAIN +279 0x0001 //RX_TDDRC_SMT_FLAG +280 0x0CCD //RX_TDDRC_SMT_W +281 0x01A0 //RX_TDDRC_DRC_GAIN +195 0x001C //RX_FDEQ_SUBNUM +196 0x4848 //RX_FDEQ_GAIN_0 +197 0x4848 //RX_FDEQ_GAIN_1 +198 0x4848 //RX_FDEQ_GAIN_2 +199 0x4848 //RX_FDEQ_GAIN_3 +200 0x4848 //RX_FDEQ_GAIN_4 +201 0x4848 //RX_FDEQ_GAIN_5 +202 0x484B //RX_FDEQ_GAIN_6 +203 0x4B48 //RX_FDEQ_GAIN_7 +204 0x4848 //RX_FDEQ_GAIN_8 +205 0x4848 //RX_FDEQ_GAIN_9 +206 0x4846 //RX_FDEQ_GAIN_10 +207 0x403F //RX_FDEQ_GAIN_11 +208 0x3F40 //RX_FDEQ_GAIN_12 +209 0x4248 //RX_FDEQ_GAIN_13 +210 0x4848 //RX_FDEQ_GAIN_14 +211 0x4848 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0202 //RX_FDEQ_BIN_0 +221 0x0203 //RX_FDEQ_BIN_1 +222 0x0303 //RX_FDEQ_BIN_2 +223 0x0304 //RX_FDEQ_BIN_3 +224 0x0405 //RX_FDEQ_BIN_4 +225 0x0506 //RX_FDEQ_BIN_5 +226 0x0708 //RX_FDEQ_BIN_6 +227 0x090A //RX_FDEQ_BIN_7 +228 0x0B0C //RX_FDEQ_BIN_8 +229 0x0D0E //RX_FDEQ_BIN_9 +230 0x0E0F //RX_FDEQ_BIN_10 +231 0x0F10 //RX_FDEQ_BIN_11 +232 0x1011 //RX_FDEQ_BIN_12 +233 0x1104 //RX_FDEQ_BIN_13 +234 0x0000 //RX_FDEQ_BIN_14 +235 0x0000 //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x4000 //RX_FDEQ_RESRV_0 +245 0x0320 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0030 //RX_FDDRC_BAND_MARGIN_1 +248 0x0050 //RX_FDDRC_BAND_MARGIN_2 +249 0x0080 //RX_FDDRC_BAND_MARGIN_3 +250 0x0007 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x5000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x6400 //RX_FDDRC_THRD_3_2 +258 0x6400 //RX_FDDRC_THRD_3_3 +259 0x2000 //RX_FDDRC_SLANT_0_0 +260 0x2000 //RX_FDDRC_SLANT_0_1 +261 0x2000 //RX_FDDRC_SLANT_0_2 +262 0x2000 //RX_FDDRC_SLANT_0_3 +263 0x5333 //RX_FDDRC_SLANT_1_0 +264 0x5333 //RX_FDDRC_SLANT_1_1 +265 0x5333 //RX_FDDRC_SLANT_1_2 +266 0x5333 //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +286 0x000A //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 +#VOL 1 +163 0x1000 //RX_TDDRC_ALPHA_UP_1 +164 0x1000 //RX_TDDRC_ALPHA_UP_2 +165 0x1000 //RX_TDDRC_ALPHA_UP_3 +166 0x1000 //RX_TDDRC_ALPHA_UP_4 +184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +190 0x7220 //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +269 0x0000 //RX_TDDRC_THRD_0 +270 0x0000 //RX_TDDRC_THRD_1 +271 0x1800 //RX_TDDRC_THRD_2 +272 0x1800 //RX_TDDRC_THRD_3 +273 0x7FFF //RX_TDDRC_SLANT_0 +274 0x7FFF //RX_TDDRC_SLANT_1 +275 0x1000 //RX_TDDRC_ALPHA_UP_0 +276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x199A //RX_TDDRC_HMNC_GAIN +279 0x0001 //RX_TDDRC_SMT_FLAG +280 0x0CCD //RX_TDDRC_SMT_W +281 0x01A0 //RX_TDDRC_DRC_GAIN +195 0x001C //RX_FDEQ_SUBNUM +196 0x4848 //RX_FDEQ_GAIN_0 +197 0x4848 //RX_FDEQ_GAIN_1 +198 0x4848 //RX_FDEQ_GAIN_2 +199 0x4848 //RX_FDEQ_GAIN_3 +200 0x4848 //RX_FDEQ_GAIN_4 +201 0x4848 //RX_FDEQ_GAIN_5 +202 0x484B //RX_FDEQ_GAIN_6 +203 0x4B48 //RX_FDEQ_GAIN_7 +204 0x4848 //RX_FDEQ_GAIN_8 +205 0x4848 //RX_FDEQ_GAIN_9 +206 0x4846 //RX_FDEQ_GAIN_10 +207 0x403F //RX_FDEQ_GAIN_11 +208 0x3F40 //RX_FDEQ_GAIN_12 +209 0x4248 //RX_FDEQ_GAIN_13 +210 0x4848 //RX_FDEQ_GAIN_14 +211 0x4848 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0202 //RX_FDEQ_BIN_0 +221 0x0203 //RX_FDEQ_BIN_1 +222 0x0303 //RX_FDEQ_BIN_2 +223 0x0304 //RX_FDEQ_BIN_3 +224 0x0405 //RX_FDEQ_BIN_4 +225 0x0506 //RX_FDEQ_BIN_5 +226 0x0708 //RX_FDEQ_BIN_6 +227 0x090A //RX_FDEQ_BIN_7 +228 0x0B0C //RX_FDEQ_BIN_8 +229 0x0D0E //RX_FDEQ_BIN_9 +230 0x0E0F //RX_FDEQ_BIN_10 +231 0x0F10 //RX_FDEQ_BIN_11 +232 0x1011 //RX_FDEQ_BIN_12 +233 0x1104 //RX_FDEQ_BIN_13 +234 0x0000 //RX_FDEQ_BIN_14 +235 0x0000 //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x4000 //RX_FDEQ_RESRV_0 +245 0x0320 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0030 //RX_FDDRC_BAND_MARGIN_1 +248 0x0050 //RX_FDDRC_BAND_MARGIN_2 +249 0x0080 //RX_FDDRC_BAND_MARGIN_3 +250 0x0007 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x5000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x6400 //RX_FDDRC_THRD_3_2 +258 0x6400 //RX_FDDRC_THRD_3_3 +259 0x2000 //RX_FDDRC_SLANT_0_0 +260 0x2000 //RX_FDDRC_SLANT_0_1 +261 0x2000 //RX_FDDRC_SLANT_0_2 +262 0x2000 //RX_FDDRC_SLANT_0_3 +263 0x5333 //RX_FDDRC_SLANT_1_0 +264 0x5333 //RX_FDDRC_SLANT_1_1 +265 0x5333 //RX_FDDRC_SLANT_1_2 +266 0x5333 //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +286 0x0011 //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 +#VOL 2 +163 0x1000 //RX_TDDRC_ALPHA_UP_1 +164 0x1000 //RX_TDDRC_ALPHA_UP_2 +165 0x1000 //RX_TDDRC_ALPHA_UP_3 +166 0x1000 //RX_TDDRC_ALPHA_UP_4 +184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +190 0x7220 //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +269 0x0000 //RX_TDDRC_THRD_0 +270 0x0000 //RX_TDDRC_THRD_1 +271 0x1800 //RX_TDDRC_THRD_2 +272 0x1800 //RX_TDDRC_THRD_3 +273 0x7FFF //RX_TDDRC_SLANT_0 +274 0x7FFF //RX_TDDRC_SLANT_1 +275 0x1000 //RX_TDDRC_ALPHA_UP_0 +276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x199A //RX_TDDRC_HMNC_GAIN +279 0x0001 //RX_TDDRC_SMT_FLAG +280 0x0CCD //RX_TDDRC_SMT_W +281 0x01A0 //RX_TDDRC_DRC_GAIN +195 0x001C //RX_FDEQ_SUBNUM +196 0x4848 //RX_FDEQ_GAIN_0 +197 0x4848 //RX_FDEQ_GAIN_1 +198 0x4848 //RX_FDEQ_GAIN_2 +199 0x4848 //RX_FDEQ_GAIN_3 +200 0x4848 //RX_FDEQ_GAIN_4 +201 0x4848 //RX_FDEQ_GAIN_5 +202 0x484B //RX_FDEQ_GAIN_6 +203 0x4B48 //RX_FDEQ_GAIN_7 +204 0x4848 //RX_FDEQ_GAIN_8 +205 0x4848 //RX_FDEQ_GAIN_9 +206 0x4846 //RX_FDEQ_GAIN_10 +207 0x403F //RX_FDEQ_GAIN_11 +208 0x3F40 //RX_FDEQ_GAIN_12 +209 0x4248 //RX_FDEQ_GAIN_13 +210 0x4848 //RX_FDEQ_GAIN_14 +211 0x4848 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0202 //RX_FDEQ_BIN_0 +221 0x0203 //RX_FDEQ_BIN_1 +222 0x0303 //RX_FDEQ_BIN_2 +223 0x0304 //RX_FDEQ_BIN_3 +224 0x0405 //RX_FDEQ_BIN_4 +225 0x0506 //RX_FDEQ_BIN_5 +226 0x0708 //RX_FDEQ_BIN_6 +227 0x090A //RX_FDEQ_BIN_7 +228 0x0B0C //RX_FDEQ_BIN_8 +229 0x0D0E //RX_FDEQ_BIN_9 +230 0x0E0F //RX_FDEQ_BIN_10 +231 0x0F10 //RX_FDEQ_BIN_11 +232 0x1011 //RX_FDEQ_BIN_12 +233 0x1104 //RX_FDEQ_BIN_13 +234 0x0000 //RX_FDEQ_BIN_14 +235 0x0000 //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x4000 //RX_FDEQ_RESRV_0 +245 0x0320 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0030 //RX_FDDRC_BAND_MARGIN_1 +248 0x0050 //RX_FDDRC_BAND_MARGIN_2 +249 0x0080 //RX_FDDRC_BAND_MARGIN_3 +250 0x0007 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x5000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x6400 //RX_FDDRC_THRD_3_2 +258 0x6400 //RX_FDDRC_THRD_3_3 +259 0x2000 //RX_FDDRC_SLANT_0_0 +260 0x2000 //RX_FDDRC_SLANT_0_1 +261 0x2000 //RX_FDDRC_SLANT_0_2 +262 0x2000 //RX_FDDRC_SLANT_0_3 +263 0x5333 //RX_FDDRC_SLANT_1_0 +264 0x5333 //RX_FDDRC_SLANT_1_1 +265 0x5333 //RX_FDDRC_SLANT_1_2 +266 0x5333 //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +286 0x001D //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 +#VOL 3 +163 0x1000 //RX_TDDRC_ALPHA_UP_1 +164 0x1000 //RX_TDDRC_ALPHA_UP_2 +165 0x1000 //RX_TDDRC_ALPHA_UP_3 +166 0x1000 //RX_TDDRC_ALPHA_UP_4 +184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +190 0x7220 //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +269 0x0000 //RX_TDDRC_THRD_0 +270 0x0000 //RX_TDDRC_THRD_1 +271 0x1800 //RX_TDDRC_THRD_2 +272 0x1800 //RX_TDDRC_THRD_3 +273 0x7FFF //RX_TDDRC_SLANT_0 +274 0x7FFF //RX_TDDRC_SLANT_1 +275 0x1000 //RX_TDDRC_ALPHA_UP_0 +276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x199A //RX_TDDRC_HMNC_GAIN +279 0x0001 //RX_TDDRC_SMT_FLAG +280 0x0CCD //RX_TDDRC_SMT_W +281 0x01A0 //RX_TDDRC_DRC_GAIN +195 0x001C //RX_FDEQ_SUBNUM +196 0x4848 //RX_FDEQ_GAIN_0 +197 0x4848 //RX_FDEQ_GAIN_1 +198 0x4848 //RX_FDEQ_GAIN_2 +199 0x4848 //RX_FDEQ_GAIN_3 +200 0x4848 //RX_FDEQ_GAIN_4 +201 0x4848 //RX_FDEQ_GAIN_5 +202 0x484B //RX_FDEQ_GAIN_6 +203 0x4B48 //RX_FDEQ_GAIN_7 +204 0x4848 //RX_FDEQ_GAIN_8 +205 0x4848 //RX_FDEQ_GAIN_9 +206 0x4846 //RX_FDEQ_GAIN_10 +207 0x403F //RX_FDEQ_GAIN_11 +208 0x3F40 //RX_FDEQ_GAIN_12 +209 0x4248 //RX_FDEQ_GAIN_13 +210 0x4848 //RX_FDEQ_GAIN_14 +211 0x4848 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0202 //RX_FDEQ_BIN_0 +221 0x0203 //RX_FDEQ_BIN_1 +222 0x0303 //RX_FDEQ_BIN_2 +223 0x0304 //RX_FDEQ_BIN_3 +224 0x0405 //RX_FDEQ_BIN_4 +225 0x0506 //RX_FDEQ_BIN_5 +226 0x0708 //RX_FDEQ_BIN_6 +227 0x090A //RX_FDEQ_BIN_7 +228 0x0B0C //RX_FDEQ_BIN_8 +229 0x0D0E //RX_FDEQ_BIN_9 +230 0x0E0F //RX_FDEQ_BIN_10 +231 0x0F10 //RX_FDEQ_BIN_11 +232 0x1011 //RX_FDEQ_BIN_12 +233 0x1104 //RX_FDEQ_BIN_13 +234 0x0000 //RX_FDEQ_BIN_14 +235 0x0000 //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x4000 //RX_FDEQ_RESRV_0 +245 0x0320 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0030 //RX_FDDRC_BAND_MARGIN_1 +248 0x0050 //RX_FDDRC_BAND_MARGIN_2 +249 0x0080 //RX_FDDRC_BAND_MARGIN_3 +250 0x0007 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x5000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x6400 //RX_FDDRC_THRD_3_2 +258 0x6400 //RX_FDDRC_THRD_3_3 +259 0x2000 //RX_FDDRC_SLANT_0_0 +260 0x2000 //RX_FDDRC_SLANT_0_1 +261 0x2000 //RX_FDDRC_SLANT_0_2 +262 0x2000 //RX_FDDRC_SLANT_0_3 +263 0x5333 //RX_FDDRC_SLANT_1_0 +264 0x5333 //RX_FDDRC_SLANT_1_1 +265 0x5333 //RX_FDDRC_SLANT_1_2 +266 0x5333 //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +286 0x0030 //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 +#VOL 4 +163 0x1000 //RX_TDDRC_ALPHA_UP_1 +164 0x1000 //RX_TDDRC_ALPHA_UP_2 +165 0x1000 //RX_TDDRC_ALPHA_UP_3 +166 0x1000 //RX_TDDRC_ALPHA_UP_4 +184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +190 0x7220 //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +269 0x0000 //RX_TDDRC_THRD_0 +270 0x0000 //RX_TDDRC_THRD_1 +271 0x1800 //RX_TDDRC_THRD_2 +272 0x1800 //RX_TDDRC_THRD_3 +273 0x7FFF //RX_TDDRC_SLANT_0 +274 0x7FFF //RX_TDDRC_SLANT_1 +275 0x1000 //RX_TDDRC_ALPHA_UP_0 +276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x199A //RX_TDDRC_HMNC_GAIN +279 0x0001 //RX_TDDRC_SMT_FLAG +280 0x0CCD //RX_TDDRC_SMT_W +281 0x01A0 //RX_TDDRC_DRC_GAIN +195 0x001C //RX_FDEQ_SUBNUM +196 0x4848 //RX_FDEQ_GAIN_0 +197 0x4848 //RX_FDEQ_GAIN_1 +198 0x4848 //RX_FDEQ_GAIN_2 +199 0x4848 //RX_FDEQ_GAIN_3 +200 0x4848 //RX_FDEQ_GAIN_4 +201 0x4848 //RX_FDEQ_GAIN_5 +202 0x484B //RX_FDEQ_GAIN_6 +203 0x4B48 //RX_FDEQ_GAIN_7 +204 0x4848 //RX_FDEQ_GAIN_8 +205 0x4848 //RX_FDEQ_GAIN_9 +206 0x4846 //RX_FDEQ_GAIN_10 +207 0x403F //RX_FDEQ_GAIN_11 +208 0x3F40 //RX_FDEQ_GAIN_12 +209 0x4248 //RX_FDEQ_GAIN_13 +210 0x4848 //RX_FDEQ_GAIN_14 +211 0x4848 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0202 //RX_FDEQ_BIN_0 +221 0x0203 //RX_FDEQ_BIN_1 +222 0x0303 //RX_FDEQ_BIN_2 +223 0x0304 //RX_FDEQ_BIN_3 +224 0x0405 //RX_FDEQ_BIN_4 +225 0x0506 //RX_FDEQ_BIN_5 +226 0x0708 //RX_FDEQ_BIN_6 +227 0x090A //RX_FDEQ_BIN_7 +228 0x0B0C //RX_FDEQ_BIN_8 +229 0x0D0E //RX_FDEQ_BIN_9 +230 0x0E0F //RX_FDEQ_BIN_10 +231 0x0F10 //RX_FDEQ_BIN_11 +232 0x1011 //RX_FDEQ_BIN_12 +233 0x1104 //RX_FDEQ_BIN_13 +234 0x0000 //RX_FDEQ_BIN_14 +235 0x0000 //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x4000 //RX_FDEQ_RESRV_0 +245 0x0320 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0030 //RX_FDDRC_BAND_MARGIN_1 +248 0x0050 //RX_FDDRC_BAND_MARGIN_2 +249 0x0080 //RX_FDDRC_BAND_MARGIN_3 +250 0x0007 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x5000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x6400 //RX_FDDRC_THRD_3_2 +258 0x6400 //RX_FDDRC_THRD_3_3 +259 0x2000 //RX_FDDRC_SLANT_0_0 +260 0x2000 //RX_FDDRC_SLANT_0_1 +261 0x2000 //RX_FDDRC_SLANT_0_2 +262 0x2000 //RX_FDDRC_SLANT_0_3 +263 0x5333 //RX_FDDRC_SLANT_1_0 +264 0x5333 //RX_FDDRC_SLANT_1_1 +265 0x5333 //RX_FDDRC_SLANT_1_2 +266 0x5333 //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +286 0x0050 //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 +#VOL 5 +163 0x1000 //RX_TDDRC_ALPHA_UP_1 +164 0x1000 //RX_TDDRC_ALPHA_UP_2 +165 0x1000 //RX_TDDRC_ALPHA_UP_3 +166 0x1000 //RX_TDDRC_ALPHA_UP_4 +184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +190 0x7220 //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +269 0x0000 //RX_TDDRC_THRD_0 +270 0x0000 //RX_TDDRC_THRD_1 +271 0x1800 //RX_TDDRC_THRD_2 +272 0x1800 //RX_TDDRC_THRD_3 +273 0x7FFF //RX_TDDRC_SLANT_0 +274 0x7FFF //RX_TDDRC_SLANT_1 +275 0x1000 //RX_TDDRC_ALPHA_UP_0 +276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x199A //RX_TDDRC_HMNC_GAIN +279 0x0001 //RX_TDDRC_SMT_FLAG +280 0x0CCD //RX_TDDRC_SMT_W +281 0x01A0 //RX_TDDRC_DRC_GAIN +195 0x001C //RX_FDEQ_SUBNUM +196 0x4848 //RX_FDEQ_GAIN_0 +197 0x4848 //RX_FDEQ_GAIN_1 +198 0x4848 //RX_FDEQ_GAIN_2 +199 0x4848 //RX_FDEQ_GAIN_3 +200 0x4848 //RX_FDEQ_GAIN_4 +201 0x4848 //RX_FDEQ_GAIN_5 +202 0x484B //RX_FDEQ_GAIN_6 +203 0x4B48 //RX_FDEQ_GAIN_7 +204 0x4848 //RX_FDEQ_GAIN_8 +205 0x4848 //RX_FDEQ_GAIN_9 +206 0x4846 //RX_FDEQ_GAIN_10 +207 0x403F //RX_FDEQ_GAIN_11 +208 0x3F40 //RX_FDEQ_GAIN_12 +209 0x4248 //RX_FDEQ_GAIN_13 +210 0x4848 //RX_FDEQ_GAIN_14 +211 0x4848 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0202 //RX_FDEQ_BIN_0 +221 0x0203 //RX_FDEQ_BIN_1 +222 0x0303 //RX_FDEQ_BIN_2 +223 0x0304 //RX_FDEQ_BIN_3 +224 0x0405 //RX_FDEQ_BIN_4 +225 0x0506 //RX_FDEQ_BIN_5 +226 0x0708 //RX_FDEQ_BIN_6 +227 0x090A //RX_FDEQ_BIN_7 +228 0x0B0C //RX_FDEQ_BIN_8 +229 0x0D0E //RX_FDEQ_BIN_9 +230 0x0E0F //RX_FDEQ_BIN_10 +231 0x0F10 //RX_FDEQ_BIN_11 +232 0x1011 //RX_FDEQ_BIN_12 +233 0x1104 //RX_FDEQ_BIN_13 +234 0x0000 //RX_FDEQ_BIN_14 +235 0x0000 //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x4000 //RX_FDEQ_RESRV_0 +245 0x0320 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0030 //RX_FDDRC_BAND_MARGIN_1 +248 0x0050 //RX_FDDRC_BAND_MARGIN_2 +249 0x0080 //RX_FDDRC_BAND_MARGIN_3 +250 0x0007 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x5000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x6400 //RX_FDDRC_THRD_3_2 +258 0x6400 //RX_FDDRC_THRD_3_3 +259 0x2000 //RX_FDDRC_SLANT_0_0 +260 0x2000 //RX_FDDRC_SLANT_0_1 +261 0x2000 //RX_FDDRC_SLANT_0_2 +262 0x2000 //RX_FDDRC_SLANT_0_3 +263 0x5333 //RX_FDDRC_SLANT_1_0 +264 0x5333 //RX_FDDRC_SLANT_1_1 +265 0x5333 //RX_FDDRC_SLANT_1_2 +266 0x5333 //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +286 0x0087 //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 +#VOL 6 +163 0x1000 //RX_TDDRC_ALPHA_UP_1 +164 0x1000 //RX_TDDRC_ALPHA_UP_2 +165 0x1000 //RX_TDDRC_ALPHA_UP_3 +166 0x1000 //RX_TDDRC_ALPHA_UP_4 +184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +190 0x7220 //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +269 0x0000 //RX_TDDRC_THRD_0 +270 0x0000 //RX_TDDRC_THRD_1 +271 0x1800 //RX_TDDRC_THRD_2 +272 0x1800 //RX_TDDRC_THRD_3 +273 0x7FFF //RX_TDDRC_SLANT_0 +274 0x7FFF //RX_TDDRC_SLANT_1 +275 0x1000 //RX_TDDRC_ALPHA_UP_0 +276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x199A //RX_TDDRC_HMNC_GAIN +279 0x0001 //RX_TDDRC_SMT_FLAG +280 0x0CCD //RX_TDDRC_SMT_W +281 0x01A0 //RX_TDDRC_DRC_GAIN +195 0x001C //RX_FDEQ_SUBNUM +196 0x4848 //RX_FDEQ_GAIN_0 +197 0x4848 //RX_FDEQ_GAIN_1 +198 0x4848 //RX_FDEQ_GAIN_2 +199 0x4848 //RX_FDEQ_GAIN_3 +200 0x4848 //RX_FDEQ_GAIN_4 +201 0x4848 //RX_FDEQ_GAIN_5 +202 0x484B //RX_FDEQ_GAIN_6 +203 0x4B48 //RX_FDEQ_GAIN_7 +204 0x4848 //RX_FDEQ_GAIN_8 +205 0x4848 //RX_FDEQ_GAIN_9 +206 0x4846 //RX_FDEQ_GAIN_10 +207 0x403F //RX_FDEQ_GAIN_11 +208 0x3F40 //RX_FDEQ_GAIN_12 +209 0x4248 //RX_FDEQ_GAIN_13 +210 0x4848 //RX_FDEQ_GAIN_14 +211 0x4848 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0202 //RX_FDEQ_BIN_0 +221 0x0203 //RX_FDEQ_BIN_1 +222 0x0303 //RX_FDEQ_BIN_2 +223 0x0304 //RX_FDEQ_BIN_3 +224 0x0405 //RX_FDEQ_BIN_4 +225 0x0506 //RX_FDEQ_BIN_5 +226 0x0708 //RX_FDEQ_BIN_6 +227 0x090A //RX_FDEQ_BIN_7 +228 0x0B0C //RX_FDEQ_BIN_8 +229 0x0D0E //RX_FDEQ_BIN_9 +230 0x0E0F //RX_FDEQ_BIN_10 +231 0x0F10 //RX_FDEQ_BIN_11 +232 0x1011 //RX_FDEQ_BIN_12 +233 0x1104 //RX_FDEQ_BIN_13 +234 0x0000 //RX_FDEQ_BIN_14 +235 0x0000 //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x4000 //RX_FDEQ_RESRV_0 +245 0x0320 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0030 //RX_FDDRC_BAND_MARGIN_1 +248 0x0050 //RX_FDDRC_BAND_MARGIN_2 +249 0x0080 //RX_FDDRC_BAND_MARGIN_3 +250 0x0007 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x5000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x6400 //RX_FDDRC_THRD_3_2 +258 0x6400 //RX_FDDRC_THRD_3_3 +259 0x2000 //RX_FDDRC_SLANT_0_0 +260 0x2000 //RX_FDDRC_SLANT_0_1 +261 0x2000 //RX_FDDRC_SLANT_0_2 +262 0x2000 //RX_FDDRC_SLANT_0_3 +263 0x5333 //RX_FDDRC_SLANT_1_0 +264 0x5333 //RX_FDDRC_SLANT_1_1 +265 0x5333 //RX_FDDRC_SLANT_1_2 +266 0x5333 //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +286 0x0100 //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 #CASE_NAME HEADSET-USB_BLACKBIRD-VOICE_GENERIC-SWB -#PARAM_MODE FULL -#PARAM_TYPE TX+RX -#TOTAL_CUSTOM_STEP 7 +#PARAM_MODE Full +#PARAM_TYPE TX+2RX +#TOTAL_CUSTOM_STEP 7+7 #TX 0 0x0009 //TX_OPERATION_MODE_0 1 0x0001 //TX_OPERATION_MODE_1 @@ -3758,7 +5590,7 @@ 239 0x0800 //TX_DT_RESRV_7 240 0x0800 //TX_DT_RESRV_8 241 0x0000 //TX_DT_RESRV_9 -242 0xF400 //TX_THR_SN_EST_0 +242 0xFA00 //TX_THR_SN_EST_0 243 0xFA00 //TX_THR_SN_EST_1 244 0xF700 //TX_THR_SN_EST_2 245 0xFA00 //TX_THR_SN_EST_3 @@ -3767,20 +5599,20 @@ 248 0xF400 //TX_THR_SN_EST_6 249 0xF600 //TX_THR_SN_EST_7 250 0x0000 //TX_DELTA_THR_SN_EST_0 -251 0x0100 //TX_DELTA_THR_SN_EST_1 +251 0x0200 //TX_DELTA_THR_SN_EST_1 252 0x0200 //TX_DELTA_THR_SN_EST_2 -253 0x0200 //TX_DELTA_THR_SN_EST_3 -254 0x0100 //TX_DELTA_THR_SN_EST_4 +253 0x0100 //TX_DELTA_THR_SN_EST_3 +254 0x0200 //TX_DELTA_THR_SN_EST_4 255 0x0200 //TX_DELTA_THR_SN_EST_5 -256 0x0200 //TX_DELTA_THR_SN_EST_6 +256 0x0100 //TX_DELTA_THR_SN_EST_6 257 0x0200 //TX_DELTA_THR_SN_EST_7 258 0x6000 //TX_LAMBDA_NN_EST_0 -259 0x6000 //TX_LAMBDA_NN_EST_1 +259 0x4000 //TX_LAMBDA_NN_EST_1 260 0x4000 //TX_LAMBDA_NN_EST_2 261 0x4000 //TX_LAMBDA_NN_EST_3 262 0x4000 //TX_LAMBDA_NN_EST_4 263 0x4000 //TX_LAMBDA_NN_EST_5 -264 0x4000 //TX_LAMBDA_NN_EST_6 +264 0x6000 //TX_LAMBDA_NN_EST_6 265 0x4000 //TX_LAMBDA_NN_EST_7 266 0x0400 //TX_N_SN_EST 267 0x001E //TX_INBEAM_T @@ -3798,18 +5630,18 @@ 279 0x1000 //TX_B_POST_FLT_0 280 0x1000 //TX_B_POST_FLT_1 281 0x000F //TX_NS_LVL_CTRL_0 -282 0x0018 //TX_NS_LVL_CTRL_1 -283 0x0014 //TX_NS_LVL_CTRL_2 -284 0x0018 //TX_NS_LVL_CTRL_3 -285 0x0012 //TX_NS_LVL_CTRL_4 +282 0x0014 //TX_NS_LVL_CTRL_1 +283 0x0018 //TX_NS_LVL_CTRL_2 +284 0x0012 //TX_NS_LVL_CTRL_3 +285 0x000F //TX_NS_LVL_CTRL_4 286 0x000F //TX_NS_LVL_CTRL_5 -287 0x000F //TX_NS_LVL_CTRL_6 +287 0x0018 //TX_NS_LVL_CTRL_6 288 0x0011 //TX_NS_LVL_CTRL_7 289 0x000C //TX_MIN_GAIN_S_0 -290 0x000C //TX_MIN_GAIN_S_1 -291 0x000F //TX_MIN_GAIN_S_2 -292 0x000C //TX_MIN_GAIN_S_3 -293 0x0009 //TX_MIN_GAIN_S_4 +290 0x000F //TX_MIN_GAIN_S_1 +291 0x000C //TX_MIN_GAIN_S_2 +292 0x0009 //TX_MIN_GAIN_S_3 +293 0x000C //TX_MIN_GAIN_S_4 294 0x000C //TX_MIN_GAIN_S_5 295 0x000C //TX_MIN_GAIN_S_6 296 0x000F //TX_MIN_GAIN_S_7 @@ -3817,10 +5649,10 @@ 298 0x0000 //TX_NS_MAX_PRI_SNR_TH 299 0x0000 //TX_NMOS_SUP_MENSA 300 0x7FFF //TX_SNRI_SUP_0 -301 0x7FFF //TX_SNRI_SUP_1 -302 0x6000 //TX_SNRI_SUP_2 -303 0x5000 //TX_SNRI_SUP_3 -304 0x6000 //TX_SNRI_SUP_4 +301 0x6000 //TX_SNRI_SUP_1 +302 0x5000 //TX_SNRI_SUP_2 +303 0x6000 //TX_SNRI_SUP_3 +304 0x7FFF //TX_SNRI_SUP_4 305 0x7FFF //TX_SNRI_SUP_5 306 0x7FFF //TX_SNRI_SUP_6 307 0x7FFF //TX_SNRI_SUP_7 @@ -3831,17 +5663,17 @@ 312 0x7FFF //TX_A_POST_FILT_0 313 0x2000 //TX_A_POST_FILT_1 314 0x4000 //TX_A_POST_FILT_S_0 -315 0x4000 //TX_A_POST_FILT_S_1 +315 0x5000 //TX_A_POST_FILT_S_1 316 0x5000 //TX_A_POST_FILT_S_2 317 0x5000 //TX_A_POST_FILT_S_3 318 0x5000 //TX_A_POST_FILT_S_4 319 0x5000 //TX_A_POST_FILT_S_5 -320 0x5000 //TX_A_POST_FILT_S_6 +320 0x4000 //TX_A_POST_FILT_S_6 321 0x5000 //TX_A_POST_FILT_S_7 322 0x1000 //TX_B_POST_FILT_0 323 0x1000 //TX_B_POST_FILT_1 -324 0x1000 //TX_B_POST_FILT_2 -325 0x3000 //TX_B_POST_FILT_3 +324 0x3000 //TX_B_POST_FILT_2 +325 0x1000 //TX_B_POST_FILT_3 326 0x1000 //TX_B_POST_FILT_4 327 0x1000 //TX_B_POST_FILT_5 328 0x1000 //TX_B_POST_FILT_6 @@ -3856,12 +5688,12 @@ 337 0x7FFF //TX_B_LESSCUT_RTO_S_7 338 0x7CCD //TX_LAMBDA_PFILT 339 0x7B00 //TX_LAMBDA_PFILT_S_0 -340 0x7F00 //TX_LAMBDA_PFILT_S_1 -341 0x7B00 //TX_LAMBDA_PFILT_S_2 -342 0x7000 //TX_LAMBDA_PFILT_S_3 +340 0x7B00 //TX_LAMBDA_PFILT_S_1 +341 0x7000 //TX_LAMBDA_PFILT_S_2 +342 0x7B00 //TX_LAMBDA_PFILT_S_3 343 0x7B00 //TX_LAMBDA_PFILT_S_4 344 0x7B00 //TX_LAMBDA_PFILT_S_5 -345 0x7B00 //TX_LAMBDA_PFILT_S_6 +345 0x7F00 //TX_LAMBDA_PFILT_S_6 346 0x7B00 //TX_LAMBDA_PFILT_S_7 347 0x0200 //TX_K_PEPPER 348 0x0400 //TX_A_PEPPER @@ -3883,7 +5715,7 @@ 364 0x0000 //TX_K_APT 365 0x0001 //TX_NOISEDET 366 0x0190 //TX_NDETCT -367 0x0050 //TX_NOISE_TH_0 +367 0x0383 //TX_NOISE_TH_0 368 0x7FFF //TX_NOISE_TH_0_2 369 0x7FFF //TX_NOISE_TH_0_3 370 0x07D0 //TX_NOISE_TH_1 @@ -3895,11 +5727,11 @@ 376 0x7FFF //TX_NOISE_TH_5_3 377 0x7FFF //TX_NOISE_TH_5_4 378 0x044C //TX_NOISE_TH_6 -379 0x0014 //TX_MINENOISE_TH -380 0x4000 //TX_MINENOISE_MIC0_TH_MTS -381 0xFFEE //TX_MINENOISE_MIC0_TH_EXP -382 0x6000 //TX_MINENOISE_MIC0_S_TH_MTS -383 0xFFF3 //TX_MINENOISE_MIC0_S_TH_EXP +379 0x044C //TX_MINENOISE_TH +380 0xD508 //TX_MORENS_TFMASK_TH +381 0x0001 //TX_DRC_QUIET_FLOOR +382 0x3A98 //TX_RATIODTL_CUT_TH +383 0x0DAC //TX_DT_CUT_K1 384 0x0666 //TX_OUT_ENER_S_TH_CLEAN 385 0x0666 //TX_OUT_ENER_S_TH_LESSCLEAN 386 0x0333 //TX_OUT_ENER_S_TH_NOISY @@ -3907,22 +5739,22 @@ 388 0x0333 //TX_OUT_ENER_TH_SPEECH 389 0x2000 //TX_SN_NPB_GAIN 390 0x0000 //TX_NN_NPB_GAIN -391 0x0000 //TX_CSX_ALPHA_0 -392 0x0000 //TX_CSX_ALPHA_1 -393 0x0000 //TX_CSX_ALPHA_2 -394 0x0000 //TX_CSX_ALPHA_3 -395 0x0800 //TX_MU_ARSP_EST -396 0x00C8 //TX_P_OUTBEAM_MIN_TH +391 0x7FFF //TX_POST_MASK_SUP_HSNE +392 0x1388 //TX_TAIL_DET_TH +393 0x4000 //TX_B_LESSCUT_RTO_WTA +394 0x0000 //TX_MEL_G_R +395 0x0080 //TX_SUPHIGH_TH +396 0x0000 //TX_MASK_G_R 397 0x0002 //TX_EXTRA_NS_L -398 0x0800 //TX_EXTRA_NS_A -399 0x0005 //TX_VR_NOISE_FLOOR_TH +398 0x1800 //TX_C_POST_FLT_MASK +399 0x7FFF //TX_A_POST_FLT_WNS 400 0x0148 //TX_MIN_G_LOW300HZ 401 0x0004 //TX_MAXLEVEL_CNG 402 0x00B4 //TX_STN_NOISE_TH 403 0x4000 //TX_POST_MASK_SUP 404 0x7FFF //TX_POST_MASK_ADJUST 405 0x00C8 //TX_NS_ENOISE_MIC0_TH -406 0x0014 //TX_MINENOISE_MIC0_TH +406 0x02F3 //TX_MINENOISE_MIC0_TH 407 0x012C //TX_MINENOISE_MIC0_S_TH 408 0x7FFF //TX_MIN_G_CTRL_SSNS 409 0x0800 //TX_METAL_RTO_THR @@ -4030,16 +5862,16 @@ 511 0x6666 //TX_MIC_TO_BFGAIN 512 0x0000 //TX_MICTOBFGAIN0 513 0x0000 //TX_FASTMUE_TH -514 0x0000 //TX_DERVB_LEN_0 -515 0x0000 //TX_DERVB_LEN_1 -516 0x0000 //TX_RHO_DERVB -517 0x0000 //TX_MIC_INDX_DERVB -518 0x0000 //TX_MU_DERVB -519 0x0000 //TX_DR_RESRV_0 -520 0x0000 //TX_DR_RESRV_1 -521 0x0000 //TX_DR_RESRV_2 -522 0x0000 //TX_DR_RESRV_3 -523 0x0000 //TX_DR_RESRV_4 +514 0xC000 //TX_DEREVERB_LF_MU +515 0xC000 //TX_DEREVERB_HF_MU +516 0xCCCC //TX_DEREVERB_DELAY +517 0xD999 //TX_DEREVERB_COEF_LEN +518 0x1F40 //TX_DEREVERB_DNR +519 0x0000 //TX_DEREVERB_ALPHA +520 0x0000 //TX_DEREVERB_BETA +521 0x0000 //TX_GSC_RTOL_TH +522 0x7000 //TX_GSC_RTOH_TH +523 0x0064 //TX_WIDE2_MEANHTH 524 0x0000 //TX_DR_RESRV_5 525 0x0000 //TX_DR_RESRV_6 526 0x0000 //TX_DR_RESRV_7 @@ -4405,7 +6237,7 @@ 886 0x0CCD //TX_FASTNS_TFMASKBIN_TH2 887 0x0CCD //TX_FASTNS_TFMASKBIN_TH3 888 0x00C8 //TX_FASTNS_ARSPC_TH -889 0xC000 //TX_FASTNS_MASK5_TH +889 0x8000 //TX_FASTNS_MASK5_TH 890 0x4848 //TX_POSTSSA_MIN_G_VR_MASK 891 0x4000 //TX_A_LESSCUT_RTO_MASK 892 0x1770 //TX_FASTNS_NOISETH @@ -4413,8 +6245,73 @@ 894 0xC000 //TX_FASTNS_SSA_THHFL 895 0xCCCC //TX_FASTNS_SSA_THLFH 896 0xD999 //TX_FASTNS_SSA_THHFH +897 0x2339 //TX_SENDFUNC_REG_MICMUTE +898 0x0021 //TX_SENDFUNC_REG_MICMUTE1 +899 0x02BC //TX_MICMUTE_RATIO_THR +900 0x0140 //TX_MICMUTE_AMP_THR +901 0x0004 //TX_MICMUTE_HPF_IND +902 0x00C0 //TX_MICMUTE_LOG_EYR_TH +903 0x0008 //TX_MICMUTE_CVG_TIME +904 0x0008 //TX_MICMUTE_RELEASE_TIME +905 0x01FE //TX_MIC_VOLUME_MIC0MUTE +906 0x0020 //TX_MICMUTE_EPD_OFFSET_0 +907 0x001E //TX_MICMUTE_FRQ_AEC_L +908 0x7999 //TX_MICMUTE_EAD_THR +909 0x7FFF //TX_MICMUTE_LAMBDA_CB_NLE +910 0x7FFF //TX_MICMUTE_LAMBDA_RE_EST +911 0x4000 //TX_DTD_THR1_MICMUTE_0 +912 0x7000 //TX_DTD_THR1_MICMUTE_1 +913 0x7FFF //TX_DTD_THR1_MICMUTE_2 +914 0x7FFF //TX_DTD_THR1_MICMUTE_3 +915 0x6CCC //TX_DTD_THR2_MICMUTE_0 +916 0x0400 //TX_MICMUTE_MIN_EQ_RE_EST_0 +917 0x0400 //TX_MICMUTE_MIN_EQ_RE_EST_1 +918 0x1000 //TX_MICMUTE_MIN_EQ_RE_EST_2 +919 0x7FFF //TX_MICMUTE_MIN_EQ_RE_EST_3 +920 0x7FFF //TX_MICMUTE_MIN_EQ_RE_EST_4 +921 0x4000 //TX_MICMUTE_C_POST_FLT +922 0x03E8 //TX_MICMUTE_DT_CUT_K +923 0x0001 //TX_MICMUTE_DT_CUT_THR +924 0x03E8 //TX_MICMUTE_DT_CUT_K2 +925 0x0001 //TX_MICMUTE_DT_CUT_THR2 +926 0x0064 //TX_MICMUTE_DT2_HOLD_N +927 0x1000 //TX_MICMUTE_RATIODTH_THCUT +928 0x1000 //TX_MICMUTE_B_POST_FLT_ECHOL +929 0x7FFF //TX_MICMUTE_B_POST_FLT_ECHOH +930 0x0400 //TX_MICMUTE_C_POST_FLT_MASK +931 0x7999 //TX_MICMUTE_RATIODTL_CUT_TH +932 0x0258 //TX_MICMUTE_DT_CUT_K1 +933 0x0800 //TX_MICMUTE_N2_SN_EST +934 0xFC00 //TX_MICMUTE_THR_SN_EST_0 +935 0x001C //TX_MICMUTE_MIN_G_CTRL_0 +936 0x6000 //TX_MICMUTE_A_POST_FILT_S_0 +937 0x7000 //TX_MICMUTE_B_POST_FILT_0 +938 0x2710 //TX_MIC1RUB_AMP_THR +939 0x0010 //TX_MIC1MUTE_RATIO_THR +940 0x0450 //TX_MIC1MUTE_AMP_THR +941 0x0008 //TX_MIC1MUTE_CVG_TIME +942 0x0008 //TX_MIC1MUTE_RELEASE_TIME +943 0x0000 //TX_AMS_RESRV_01 +944 0x0000 //TX_AMS_RESRV_02 +945 0x0000 //TX_AMS_RESRV_03 +946 0x0000 //TX_AMS_RESRV_04 +947 0x0000 //TX_AMS_RESRV_05 +948 0x0000 //TX_AMS_RESRV_06 +949 0x0000 //TX_AMS_RESRV_07 +950 0x0000 //TX_AMS_RESRV_08 +951 0x0000 //TX_AMS_RESRV_09 +952 0x0000 //TX_AMS_RESRV_10 +953 0x0000 //TX_AMS_RESRV_11 +954 0x0000 //TX_AMS_RESRV_12 +955 0x0000 //TX_AMS_RESRV_13 +956 0x0000 //TX_AMS_RESRV_14 +957 0x0000 //TX_AMS_RESRV_15 +958 0x0000 //TX_AMS_RESRV_16 +959 0x0000 //TX_AMS_RESRV_17 +960 0x0000 //TX_AMS_RESRV_18 +961 0x0000 //TX_AMS_RESRV_19 #RX -0 0x042C //RX_RECVFUNC_MODE_0 +0 0x242C //RX_RECVFUNC_MODE_0 1 0x0000 //RX_RECVFUNC_MODE_1 2 0x0003 //RX_SAMPLINGFREQ_SIG 3 0x0003 //RX_SAMPLINGFREQ_PROC @@ -5264,11 +7161,862 @@ 110 0x0000 //RX_FDDRC_RESRV_0 129 0x0100 //RX_SPK_VOL 130 0x0000 //RX_VOL_RESRV_0 +#RX 2 +157 0x242C //RX_RECVFUNC_MODE_0 +158 0x0000 //RX_RECVFUNC_MODE_1 +159 0x0003 //RX_SAMPLINGFREQ_SIG +160 0x0003 //RX_SAMPLINGFREQ_PROC +161 0x000A //RX_FRAME_SZ +162 0x0000 //RX_DELAY_OPT +163 0x5000 //RX_TDDRC_ALPHA_UP_1 +164 0x5000 //RX_TDDRC_ALPHA_UP_2 +165 0x5000 //RX_TDDRC_ALPHA_UP_3 +166 0x2000 //RX_TDDRC_ALPHA_UP_4 +167 0x0800 //RX_PGA +168 0x7FFF //RX_A_HP +169 0x0000 //RX_B_PE +170 0x1800 //RX_THR_PITCH_DET_0 +171 0x1000 //RX_THR_PITCH_DET_1 +172 0x0800 //RX_THR_PITCH_DET_2 +173 0x0008 //RX_PITCH_BFR_LEN +174 0x0003 //RX_SBD_PITCH_DET +175 0x0100 //RX_PP_RESRV_0 +176 0x0020 //RX_PP_RESRV_1 +177 0x0400 //RX_N_SN_EST +178 0x000C //RX_N2_SN_EST +179 0x0003 //RX_NS_LVL_CTRL +180 0x9000 //RX_THR_SN_EST +181 0x7CCD //RX_LAMBDA_PFILT +182 0x000A //RX_FENS_RESRV_0 +183 0x0190 //RX_FENS_RESRV_1 +184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +187 0x0002 //RX_EXTRA_NS_L +188 0x0800 //RX_EXTRA_NS_A +189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +190 0x65AD //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +192 0x199A //RX_A_POST_FLT +193 0x0000 //RX_LMT_THRD +194 0x4000 //RX_LMT_ALPHA +195 0x0020 //RX_FDEQ_SUBNUM +196 0x4E52 //RX_FDEQ_GAIN_0 +197 0x5252 //RX_FDEQ_GAIN_1 +198 0x5252 //RX_FDEQ_GAIN_2 +199 0x5250 //RX_FDEQ_GAIN_3 +200 0x4C46 //RX_FDEQ_GAIN_4 +201 0x4748 //RX_FDEQ_GAIN_5 +202 0x5768 //RX_FDEQ_GAIN_6 +203 0x6162 //RX_FDEQ_GAIN_7 +204 0x5252 //RX_FDEQ_GAIN_8 +205 0x5256 //RX_FDEQ_GAIN_9 +206 0x5248 //RX_FDEQ_GAIN_10 +207 0x3434 //RX_FDEQ_GAIN_11 +208 0x3436 //RX_FDEQ_GAIN_12 +209 0x2A18 //RX_FDEQ_GAIN_13 +210 0x1830 //RX_FDEQ_GAIN_14 +211 0x3648 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0202 //RX_FDEQ_BIN_0 +221 0x0203 //RX_FDEQ_BIN_1 +222 0x0303 //RX_FDEQ_BIN_2 +223 0x0304 //RX_FDEQ_BIN_3 +224 0x0405 //RX_FDEQ_BIN_4 +225 0x0506 //RX_FDEQ_BIN_5 +226 0x0708 //RX_FDEQ_BIN_6 +227 0x090A //RX_FDEQ_BIN_7 +228 0x0B0C //RX_FDEQ_BIN_8 +229 0x0D0E //RX_FDEQ_BIN_9 +230 0x1013 //RX_FDEQ_BIN_10 +231 0x1719 //RX_FDEQ_BIN_11 +232 0x1B1E //RX_FDEQ_BIN_12 +233 0x1E1E //RX_FDEQ_BIN_13 +234 0x1E28 //RX_FDEQ_BIN_14 +235 0x284A //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x4000 //RX_FDEQ_RESRV_0 +245 0x0320 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0030 //RX_FDDRC_BAND_MARGIN_1 +248 0x0050 //RX_FDDRC_BAND_MARGIN_2 +249 0x0080 //RX_FDDRC_BAND_MARGIN_3 +250 0x0007 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x5000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x6400 //RX_FDDRC_THRD_3_2 +258 0x6400 //RX_FDDRC_THRD_3_3 +259 0x2000 //RX_FDDRC_SLANT_0_0 +260 0x2000 //RX_FDDRC_SLANT_0_1 +261 0x2000 //RX_FDDRC_SLANT_0_2 +262 0x2000 //RX_FDDRC_SLANT_0_3 +263 0x5333 //RX_FDDRC_SLANT_1_0 +264 0x5333 //RX_FDDRC_SLANT_1_1 +265 0x5333 //RX_FDDRC_SLANT_1_2 +266 0x5333 //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +268 0x0002 //RX_FILTINDX +269 0x0000 //RX_TDDRC_THRD_0 +270 0x0000 //RX_TDDRC_THRD_1 +271 0x1A00 //RX_TDDRC_THRD_2 +272 0x1A00 //RX_TDDRC_THRD_3 +273 0x3000 //RX_TDDRC_SLANT_0 +274 0x7EB8 //RX_TDDRC_SLANT_1 +275 0x5000 //RX_TDDRC_ALPHA_UP_0 +276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x199A //RX_TDDRC_HMNC_GAIN +279 0x0001 //RX_TDDRC_SMT_FLAG +280 0x0CCD //RX_TDDRC_SMT_W +281 0x023E //RX_TDDRC_DRC_GAIN +282 0x7C00 //RX_LAMBDA_PKA_FP +283 0x280A //RX_TPKA_FP +284 0x032D //RX_MIN_G_FP +285 0x0A00 //RX_MAX_G_FP +286 0x000B //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 +288 0x0000 //RX_MAXLEVEL_CNG +289 0x3000 //RX_BWE_UV_TH +290 0x3000 //RX_BWE_UV_TH2 +291 0x1800 //RX_BWE_UV_TH3 +292 0x1000 //RX_BWE_V_TH +293 0x04CD //RX_BWE_GAIN1_V_TH1 +294 0x0F33 //RX_BWE_GAIN1_V_TH2 +295 0x7333 //RX_BWE_UV_EQ +296 0x199A //RX_BWE_V_EQ +297 0x7333 //RX_BWE_TONE_TH +298 0x0004 //RX_BWE_UV_HOLD_T +299 0x6CCD //RX_BWE_GAIN2_ALPHA +300 0x799A //RX_BWE_GAIN3_ALPHA +301 0x001E //RX_BWE_CUTOFF +302 0x3000 //RX_BWE_GAINFILL +303 0x3200 //RX_BWE_MAXTH_TONE +304 0x2000 //RX_BWE_EQ_0 +305 0x2000 //RX_BWE_EQ_1 +306 0x2000 //RX_BWE_EQ_2 +307 0x2000 //RX_BWE_EQ_3 +308 0x2000 //RX_BWE_EQ_4 +309 0x2000 //RX_BWE_EQ_5 +310 0x2000 //RX_BWE_EQ_6 +311 0x0000 //RX_BWE_RESRV_0 +312 0x0000 //RX_BWE_RESRV_1 +313 0x0000 //RX_BWE_RESRV_2 +#VOL 0 +163 0x5000 //RX_TDDRC_ALPHA_UP_1 +164 0x5000 //RX_TDDRC_ALPHA_UP_2 +165 0x5000 //RX_TDDRC_ALPHA_UP_3 +166 0x2000 //RX_TDDRC_ALPHA_UP_4 +184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +190 0x7220 //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +269 0x0000 //RX_TDDRC_THRD_0 +270 0x0000 //RX_TDDRC_THRD_1 +271 0x1800 //RX_TDDRC_THRD_2 +272 0x1800 //RX_TDDRC_THRD_3 +273 0x7FFF //RX_TDDRC_SLANT_0 +274 0x7FFF //RX_TDDRC_SLANT_1 +275 0x5000 //RX_TDDRC_ALPHA_UP_0 +276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x199A //RX_TDDRC_HMNC_GAIN +279 0x0001 //RX_TDDRC_SMT_FLAG +280 0x0CCD //RX_TDDRC_SMT_W +281 0x0214 //RX_TDDRC_DRC_GAIN +195 0x0020 //RX_FDEQ_SUBNUM +196 0x6270 //RX_FDEQ_GAIN_0 +197 0x7A70 //RX_FDEQ_GAIN_1 +198 0x7270 //RX_FDEQ_GAIN_2 +199 0x6A70 //RX_FDEQ_GAIN_3 +200 0x645A //RX_FDEQ_GAIN_4 +201 0x5A5E //RX_FDEQ_GAIN_5 +202 0x6E72 //RX_FDEQ_GAIN_6 +203 0x7268 //RX_FDEQ_GAIN_7 +204 0x665A //RX_FDEQ_GAIN_8 +205 0x5A5A //RX_FDEQ_GAIN_9 +206 0x5A64 //RX_FDEQ_GAIN_10 +207 0x6448 //RX_FDEQ_GAIN_11 +208 0x4949 //RX_FDEQ_GAIN_12 +209 0x4848 //RX_FDEQ_GAIN_13 +210 0x4848 //RX_FDEQ_GAIN_14 +211 0x4848 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0202 //RX_FDEQ_BIN_0 +221 0x0203 //RX_FDEQ_BIN_1 +222 0x0303 //RX_FDEQ_BIN_2 +223 0x0304 //RX_FDEQ_BIN_3 +224 0x0405 //RX_FDEQ_BIN_4 +225 0x0506 //RX_FDEQ_BIN_5 +226 0x0708 //RX_FDEQ_BIN_6 +227 0x090A //RX_FDEQ_BIN_7 +228 0x0B0C //RX_FDEQ_BIN_8 +229 0x0D0E //RX_FDEQ_BIN_9 +230 0x1013 //RX_FDEQ_BIN_10 +231 0x1719 //RX_FDEQ_BIN_11 +232 0x1B1E //RX_FDEQ_BIN_12 +233 0x1E1E //RX_FDEQ_BIN_13 +234 0x1E28 //RX_FDEQ_BIN_14 +235 0x284A //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x4000 //RX_FDEQ_RESRV_0 +245 0x0320 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0030 //RX_FDDRC_BAND_MARGIN_1 +248 0x0050 //RX_FDDRC_BAND_MARGIN_2 +249 0x0080 //RX_FDDRC_BAND_MARGIN_3 +250 0x0007 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x5000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x6400 //RX_FDDRC_THRD_3_2 +258 0x6400 //RX_FDDRC_THRD_3_3 +259 0x2000 //RX_FDDRC_SLANT_0_0 +260 0x2000 //RX_FDDRC_SLANT_0_1 +261 0x2000 //RX_FDDRC_SLANT_0_2 +262 0x2000 //RX_FDDRC_SLANT_0_3 +263 0x5333 //RX_FDDRC_SLANT_1_0 +264 0x5333 //RX_FDDRC_SLANT_1_1 +265 0x5333 //RX_FDDRC_SLANT_1_2 +266 0x5333 //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +286 0x000A //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 +#VOL 1 +163 0x5000 //RX_TDDRC_ALPHA_UP_1 +164 0x5000 //RX_TDDRC_ALPHA_UP_2 +165 0x5000 //RX_TDDRC_ALPHA_UP_3 +166 0x2000 //RX_TDDRC_ALPHA_UP_4 +184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +190 0x7220 //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +269 0x0000 //RX_TDDRC_THRD_0 +270 0x0000 //RX_TDDRC_THRD_1 +271 0x1800 //RX_TDDRC_THRD_2 +272 0x1800 //RX_TDDRC_THRD_3 +273 0x7FFF //RX_TDDRC_SLANT_0 +274 0x7FFF //RX_TDDRC_SLANT_1 +275 0x5000 //RX_TDDRC_ALPHA_UP_0 +276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x199A //RX_TDDRC_HMNC_GAIN +279 0x0001 //RX_TDDRC_SMT_FLAG +280 0x0CCD //RX_TDDRC_SMT_W +281 0x0214 //RX_TDDRC_DRC_GAIN +195 0x0020 //RX_FDEQ_SUBNUM +196 0x6270 //RX_FDEQ_GAIN_0 +197 0x7A70 //RX_FDEQ_GAIN_1 +198 0x7270 //RX_FDEQ_GAIN_2 +199 0x6A70 //RX_FDEQ_GAIN_3 +200 0x645A //RX_FDEQ_GAIN_4 +201 0x5A5E //RX_FDEQ_GAIN_5 +202 0x6E72 //RX_FDEQ_GAIN_6 +203 0x7268 //RX_FDEQ_GAIN_7 +204 0x665A //RX_FDEQ_GAIN_8 +205 0x5A5A //RX_FDEQ_GAIN_9 +206 0x5A64 //RX_FDEQ_GAIN_10 +207 0x6448 //RX_FDEQ_GAIN_11 +208 0x4949 //RX_FDEQ_GAIN_12 +209 0x4848 //RX_FDEQ_GAIN_13 +210 0x4848 //RX_FDEQ_GAIN_14 +211 0x4848 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0202 //RX_FDEQ_BIN_0 +221 0x0203 //RX_FDEQ_BIN_1 +222 0x0303 //RX_FDEQ_BIN_2 +223 0x0304 //RX_FDEQ_BIN_3 +224 0x0405 //RX_FDEQ_BIN_4 +225 0x0506 //RX_FDEQ_BIN_5 +226 0x0708 //RX_FDEQ_BIN_6 +227 0x090A //RX_FDEQ_BIN_7 +228 0x0B0C //RX_FDEQ_BIN_8 +229 0x0D0E //RX_FDEQ_BIN_9 +230 0x1013 //RX_FDEQ_BIN_10 +231 0x1719 //RX_FDEQ_BIN_11 +232 0x1B1E //RX_FDEQ_BIN_12 +233 0x1E1E //RX_FDEQ_BIN_13 +234 0x1E28 //RX_FDEQ_BIN_14 +235 0x284A //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x4000 //RX_FDEQ_RESRV_0 +245 0x0320 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0030 //RX_FDDRC_BAND_MARGIN_1 +248 0x0050 //RX_FDDRC_BAND_MARGIN_2 +249 0x0080 //RX_FDDRC_BAND_MARGIN_3 +250 0x0007 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x5000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x6400 //RX_FDDRC_THRD_3_2 +258 0x6400 //RX_FDDRC_THRD_3_3 +259 0x2000 //RX_FDDRC_SLANT_0_0 +260 0x2000 //RX_FDDRC_SLANT_0_1 +261 0x2000 //RX_FDDRC_SLANT_0_2 +262 0x2000 //RX_FDDRC_SLANT_0_3 +263 0x5333 //RX_FDDRC_SLANT_1_0 +264 0x5333 //RX_FDDRC_SLANT_1_1 +265 0x5333 //RX_FDDRC_SLANT_1_2 +266 0x5333 //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +286 0x0011 //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 +#VOL 2 +163 0x5000 //RX_TDDRC_ALPHA_UP_1 +164 0x5000 //RX_TDDRC_ALPHA_UP_2 +165 0x5000 //RX_TDDRC_ALPHA_UP_3 +166 0x2000 //RX_TDDRC_ALPHA_UP_4 +184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +190 0x7220 //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +269 0x0000 //RX_TDDRC_THRD_0 +270 0x0000 //RX_TDDRC_THRD_1 +271 0x1800 //RX_TDDRC_THRD_2 +272 0x1800 //RX_TDDRC_THRD_3 +273 0x7FFF //RX_TDDRC_SLANT_0 +274 0x7FFF //RX_TDDRC_SLANT_1 +275 0x5000 //RX_TDDRC_ALPHA_UP_0 +276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x199A //RX_TDDRC_HMNC_GAIN +279 0x0001 //RX_TDDRC_SMT_FLAG +280 0x0CCD //RX_TDDRC_SMT_W +281 0x0214 //RX_TDDRC_DRC_GAIN +195 0x0020 //RX_FDEQ_SUBNUM +196 0x6270 //RX_FDEQ_GAIN_0 +197 0x7A70 //RX_FDEQ_GAIN_1 +198 0x7270 //RX_FDEQ_GAIN_2 +199 0x6A70 //RX_FDEQ_GAIN_3 +200 0x645A //RX_FDEQ_GAIN_4 +201 0x5A5E //RX_FDEQ_GAIN_5 +202 0x6E72 //RX_FDEQ_GAIN_6 +203 0x7268 //RX_FDEQ_GAIN_7 +204 0x665A //RX_FDEQ_GAIN_8 +205 0x5A5A //RX_FDEQ_GAIN_9 +206 0x5A64 //RX_FDEQ_GAIN_10 +207 0x6448 //RX_FDEQ_GAIN_11 +208 0x4949 //RX_FDEQ_GAIN_12 +209 0x4848 //RX_FDEQ_GAIN_13 +210 0x4848 //RX_FDEQ_GAIN_14 +211 0x4848 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0202 //RX_FDEQ_BIN_0 +221 0x0203 //RX_FDEQ_BIN_1 +222 0x0303 //RX_FDEQ_BIN_2 +223 0x0304 //RX_FDEQ_BIN_3 +224 0x0405 //RX_FDEQ_BIN_4 +225 0x0506 //RX_FDEQ_BIN_5 +226 0x0708 //RX_FDEQ_BIN_6 +227 0x090A //RX_FDEQ_BIN_7 +228 0x0B0C //RX_FDEQ_BIN_8 +229 0x0D0E //RX_FDEQ_BIN_9 +230 0x1013 //RX_FDEQ_BIN_10 +231 0x1719 //RX_FDEQ_BIN_11 +232 0x1B1E //RX_FDEQ_BIN_12 +233 0x1E1E //RX_FDEQ_BIN_13 +234 0x1E28 //RX_FDEQ_BIN_14 +235 0x284A //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x4000 //RX_FDEQ_RESRV_0 +245 0x0320 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0030 //RX_FDDRC_BAND_MARGIN_1 +248 0x0050 //RX_FDDRC_BAND_MARGIN_2 +249 0x0080 //RX_FDDRC_BAND_MARGIN_3 +250 0x0007 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x5000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x6400 //RX_FDDRC_THRD_3_2 +258 0x6400 //RX_FDDRC_THRD_3_3 +259 0x2000 //RX_FDDRC_SLANT_0_0 +260 0x2000 //RX_FDDRC_SLANT_0_1 +261 0x2000 //RX_FDDRC_SLANT_0_2 +262 0x2000 //RX_FDDRC_SLANT_0_3 +263 0x5333 //RX_FDDRC_SLANT_1_0 +264 0x5333 //RX_FDDRC_SLANT_1_1 +265 0x5333 //RX_FDDRC_SLANT_1_2 +266 0x5333 //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +286 0x001C //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 +#VOL 3 +163 0x5000 //RX_TDDRC_ALPHA_UP_1 +164 0x5000 //RX_TDDRC_ALPHA_UP_2 +165 0x5000 //RX_TDDRC_ALPHA_UP_3 +166 0x2000 //RX_TDDRC_ALPHA_UP_4 +184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +190 0x7220 //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +269 0x0000 //RX_TDDRC_THRD_0 +270 0x0000 //RX_TDDRC_THRD_1 +271 0x1800 //RX_TDDRC_THRD_2 +272 0x1800 //RX_TDDRC_THRD_3 +273 0x7FFF //RX_TDDRC_SLANT_0 +274 0x7FFF //RX_TDDRC_SLANT_1 +275 0x5000 //RX_TDDRC_ALPHA_UP_0 +276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x199A //RX_TDDRC_HMNC_GAIN +279 0x0001 //RX_TDDRC_SMT_FLAG +280 0x0CCD //RX_TDDRC_SMT_W +281 0x0214 //RX_TDDRC_DRC_GAIN +195 0x0020 //RX_FDEQ_SUBNUM +196 0x6270 //RX_FDEQ_GAIN_0 +197 0x7A70 //RX_FDEQ_GAIN_1 +198 0x7270 //RX_FDEQ_GAIN_2 +199 0x6A70 //RX_FDEQ_GAIN_3 +200 0x645A //RX_FDEQ_GAIN_4 +201 0x5A5E //RX_FDEQ_GAIN_5 +202 0x6E72 //RX_FDEQ_GAIN_6 +203 0x7268 //RX_FDEQ_GAIN_7 +204 0x665A //RX_FDEQ_GAIN_8 +205 0x5A5A //RX_FDEQ_GAIN_9 +206 0x5A64 //RX_FDEQ_GAIN_10 +207 0x6448 //RX_FDEQ_GAIN_11 +208 0x4949 //RX_FDEQ_GAIN_12 +209 0x4848 //RX_FDEQ_GAIN_13 +210 0x4848 //RX_FDEQ_GAIN_14 +211 0x4848 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0202 //RX_FDEQ_BIN_0 +221 0x0203 //RX_FDEQ_BIN_1 +222 0x0303 //RX_FDEQ_BIN_2 +223 0x0304 //RX_FDEQ_BIN_3 +224 0x0405 //RX_FDEQ_BIN_4 +225 0x0506 //RX_FDEQ_BIN_5 +226 0x0708 //RX_FDEQ_BIN_6 +227 0x090A //RX_FDEQ_BIN_7 +228 0x0B0C //RX_FDEQ_BIN_8 +229 0x0D0E //RX_FDEQ_BIN_9 +230 0x1013 //RX_FDEQ_BIN_10 +231 0x1719 //RX_FDEQ_BIN_11 +232 0x1B1E //RX_FDEQ_BIN_12 +233 0x1E1E //RX_FDEQ_BIN_13 +234 0x1E28 //RX_FDEQ_BIN_14 +235 0x284A //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x4000 //RX_FDEQ_RESRV_0 +245 0x0320 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0030 //RX_FDDRC_BAND_MARGIN_1 +248 0x0050 //RX_FDDRC_BAND_MARGIN_2 +249 0x0080 //RX_FDDRC_BAND_MARGIN_3 +250 0x0007 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x5000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x6400 //RX_FDDRC_THRD_3_2 +258 0x6400 //RX_FDDRC_THRD_3_3 +259 0x2000 //RX_FDDRC_SLANT_0_0 +260 0x2000 //RX_FDDRC_SLANT_0_1 +261 0x2000 //RX_FDDRC_SLANT_0_2 +262 0x2000 //RX_FDDRC_SLANT_0_3 +263 0x5333 //RX_FDDRC_SLANT_1_0 +264 0x5333 //RX_FDDRC_SLANT_1_1 +265 0x5333 //RX_FDDRC_SLANT_1_2 +266 0x5333 //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +286 0x002F //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 +#VOL 4 +163 0x5000 //RX_TDDRC_ALPHA_UP_1 +164 0x5000 //RX_TDDRC_ALPHA_UP_2 +165 0x5000 //RX_TDDRC_ALPHA_UP_3 +166 0x2000 //RX_TDDRC_ALPHA_UP_4 +184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +190 0x7220 //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +269 0x0000 //RX_TDDRC_THRD_0 +270 0x0000 //RX_TDDRC_THRD_1 +271 0x1800 //RX_TDDRC_THRD_2 +272 0x1800 //RX_TDDRC_THRD_3 +273 0x7FFF //RX_TDDRC_SLANT_0 +274 0x7FFF //RX_TDDRC_SLANT_1 +275 0x5000 //RX_TDDRC_ALPHA_UP_0 +276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x199A //RX_TDDRC_HMNC_GAIN +279 0x0001 //RX_TDDRC_SMT_FLAG +280 0x0CCD //RX_TDDRC_SMT_W +281 0x0214 //RX_TDDRC_DRC_GAIN +195 0x0020 //RX_FDEQ_SUBNUM +196 0x6270 //RX_FDEQ_GAIN_0 +197 0x7A70 //RX_FDEQ_GAIN_1 +198 0x7270 //RX_FDEQ_GAIN_2 +199 0x6A70 //RX_FDEQ_GAIN_3 +200 0x645A //RX_FDEQ_GAIN_4 +201 0x5A5E //RX_FDEQ_GAIN_5 +202 0x6E72 //RX_FDEQ_GAIN_6 +203 0x7268 //RX_FDEQ_GAIN_7 +204 0x665A //RX_FDEQ_GAIN_8 +205 0x5A5A //RX_FDEQ_GAIN_9 +206 0x5A64 //RX_FDEQ_GAIN_10 +207 0x6448 //RX_FDEQ_GAIN_11 +208 0x4949 //RX_FDEQ_GAIN_12 +209 0x4848 //RX_FDEQ_GAIN_13 +210 0x4848 //RX_FDEQ_GAIN_14 +211 0x4848 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0202 //RX_FDEQ_BIN_0 +221 0x0203 //RX_FDEQ_BIN_1 +222 0x0303 //RX_FDEQ_BIN_2 +223 0x0304 //RX_FDEQ_BIN_3 +224 0x0405 //RX_FDEQ_BIN_4 +225 0x0506 //RX_FDEQ_BIN_5 +226 0x0708 //RX_FDEQ_BIN_6 +227 0x090A //RX_FDEQ_BIN_7 +228 0x0B0C //RX_FDEQ_BIN_8 +229 0x0D0E //RX_FDEQ_BIN_9 +230 0x1013 //RX_FDEQ_BIN_10 +231 0x1719 //RX_FDEQ_BIN_11 +232 0x1B1E //RX_FDEQ_BIN_12 +233 0x1E1E //RX_FDEQ_BIN_13 +234 0x1E28 //RX_FDEQ_BIN_14 +235 0x284A //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x4000 //RX_FDEQ_RESRV_0 +245 0x0320 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0030 //RX_FDDRC_BAND_MARGIN_1 +248 0x0050 //RX_FDDRC_BAND_MARGIN_2 +249 0x0080 //RX_FDDRC_BAND_MARGIN_3 +250 0x0007 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x5000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x6400 //RX_FDDRC_THRD_3_2 +258 0x6400 //RX_FDDRC_THRD_3_3 +259 0x2000 //RX_FDDRC_SLANT_0_0 +260 0x2000 //RX_FDDRC_SLANT_0_1 +261 0x2000 //RX_FDDRC_SLANT_0_2 +262 0x2000 //RX_FDDRC_SLANT_0_3 +263 0x5333 //RX_FDDRC_SLANT_1_0 +264 0x5333 //RX_FDDRC_SLANT_1_1 +265 0x5333 //RX_FDDRC_SLANT_1_2 +266 0x5333 //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +286 0x004F //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 +#VOL 5 +163 0x5000 //RX_TDDRC_ALPHA_UP_1 +164 0x5000 //RX_TDDRC_ALPHA_UP_2 +165 0x5000 //RX_TDDRC_ALPHA_UP_3 +166 0x2000 //RX_TDDRC_ALPHA_UP_4 +184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +190 0x7220 //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +269 0x0000 //RX_TDDRC_THRD_0 +270 0x0000 //RX_TDDRC_THRD_1 +271 0x1800 //RX_TDDRC_THRD_2 +272 0x1800 //RX_TDDRC_THRD_3 +273 0x7FFF //RX_TDDRC_SLANT_0 +274 0x7FFF //RX_TDDRC_SLANT_1 +275 0x5000 //RX_TDDRC_ALPHA_UP_0 +276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x199A //RX_TDDRC_HMNC_GAIN +279 0x0001 //RX_TDDRC_SMT_FLAG +280 0x0CCD //RX_TDDRC_SMT_W +281 0x0214 //RX_TDDRC_DRC_GAIN +195 0x0020 //RX_FDEQ_SUBNUM +196 0x6270 //RX_FDEQ_GAIN_0 +197 0x7A70 //RX_FDEQ_GAIN_1 +198 0x7270 //RX_FDEQ_GAIN_2 +199 0x6A70 //RX_FDEQ_GAIN_3 +200 0x645A //RX_FDEQ_GAIN_4 +201 0x5A5E //RX_FDEQ_GAIN_5 +202 0x6E72 //RX_FDEQ_GAIN_6 +203 0x7268 //RX_FDEQ_GAIN_7 +204 0x665A //RX_FDEQ_GAIN_8 +205 0x5A5A //RX_FDEQ_GAIN_9 +206 0x5A64 //RX_FDEQ_GAIN_10 +207 0x6448 //RX_FDEQ_GAIN_11 +208 0x4949 //RX_FDEQ_GAIN_12 +209 0x4848 //RX_FDEQ_GAIN_13 +210 0x4848 //RX_FDEQ_GAIN_14 +211 0x4848 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0202 //RX_FDEQ_BIN_0 +221 0x0203 //RX_FDEQ_BIN_1 +222 0x0303 //RX_FDEQ_BIN_2 +223 0x0304 //RX_FDEQ_BIN_3 +224 0x0405 //RX_FDEQ_BIN_4 +225 0x0506 //RX_FDEQ_BIN_5 +226 0x0708 //RX_FDEQ_BIN_6 +227 0x090A //RX_FDEQ_BIN_7 +228 0x0B0C //RX_FDEQ_BIN_8 +229 0x0D0E //RX_FDEQ_BIN_9 +230 0x1013 //RX_FDEQ_BIN_10 +231 0x1719 //RX_FDEQ_BIN_11 +232 0x1B1E //RX_FDEQ_BIN_12 +233 0x1E1E //RX_FDEQ_BIN_13 +234 0x1E28 //RX_FDEQ_BIN_14 +235 0x284A //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x4000 //RX_FDEQ_RESRV_0 +245 0x0320 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0030 //RX_FDDRC_BAND_MARGIN_1 +248 0x0050 //RX_FDDRC_BAND_MARGIN_2 +249 0x0080 //RX_FDDRC_BAND_MARGIN_3 +250 0x0007 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x5000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x6400 //RX_FDDRC_THRD_3_2 +258 0x6400 //RX_FDDRC_THRD_3_3 +259 0x2000 //RX_FDDRC_SLANT_0_0 +260 0x2000 //RX_FDDRC_SLANT_0_1 +261 0x2000 //RX_FDDRC_SLANT_0_2 +262 0x2000 //RX_FDDRC_SLANT_0_3 +263 0x5333 //RX_FDDRC_SLANT_1_0 +264 0x5333 //RX_FDDRC_SLANT_1_1 +265 0x5333 //RX_FDDRC_SLANT_1_2 +266 0x5333 //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +286 0x0086 //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 +#VOL 6 +163 0x5000 //RX_TDDRC_ALPHA_UP_1 +164 0x5000 //RX_TDDRC_ALPHA_UP_2 +165 0x5000 //RX_TDDRC_ALPHA_UP_3 +166 0x2000 //RX_TDDRC_ALPHA_UP_4 +184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +190 0x7220 //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +269 0x0000 //RX_TDDRC_THRD_0 +270 0x0000 //RX_TDDRC_THRD_1 +271 0x1800 //RX_TDDRC_THRD_2 +272 0x1800 //RX_TDDRC_THRD_3 +273 0x7FFF //RX_TDDRC_SLANT_0 +274 0x7FFF //RX_TDDRC_SLANT_1 +275 0x5000 //RX_TDDRC_ALPHA_UP_0 +276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x199A //RX_TDDRC_HMNC_GAIN +279 0x0001 //RX_TDDRC_SMT_FLAG +280 0x0CCD //RX_TDDRC_SMT_W +281 0x0214 //RX_TDDRC_DRC_GAIN +195 0x0020 //RX_FDEQ_SUBNUM +196 0x6270 //RX_FDEQ_GAIN_0 +197 0x7A70 //RX_FDEQ_GAIN_1 +198 0x7270 //RX_FDEQ_GAIN_2 +199 0x6A70 //RX_FDEQ_GAIN_3 +200 0x645A //RX_FDEQ_GAIN_4 +201 0x5A5E //RX_FDEQ_GAIN_5 +202 0x6E72 //RX_FDEQ_GAIN_6 +203 0x7268 //RX_FDEQ_GAIN_7 +204 0x665A //RX_FDEQ_GAIN_8 +205 0x5A5A //RX_FDEQ_GAIN_9 +206 0x5A64 //RX_FDEQ_GAIN_10 +207 0x6448 //RX_FDEQ_GAIN_11 +208 0x4949 //RX_FDEQ_GAIN_12 +209 0x4848 //RX_FDEQ_GAIN_13 +210 0x4848 //RX_FDEQ_GAIN_14 +211 0x4848 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0202 //RX_FDEQ_BIN_0 +221 0x0203 //RX_FDEQ_BIN_1 +222 0x0303 //RX_FDEQ_BIN_2 +223 0x0304 //RX_FDEQ_BIN_3 +224 0x0405 //RX_FDEQ_BIN_4 +225 0x0506 //RX_FDEQ_BIN_5 +226 0x0708 //RX_FDEQ_BIN_6 +227 0x090A //RX_FDEQ_BIN_7 +228 0x0B0C //RX_FDEQ_BIN_8 +229 0x0D0E //RX_FDEQ_BIN_9 +230 0x1013 //RX_FDEQ_BIN_10 +231 0x1719 //RX_FDEQ_BIN_11 +232 0x1B1E //RX_FDEQ_BIN_12 +233 0x1E1E //RX_FDEQ_BIN_13 +234 0x1E28 //RX_FDEQ_BIN_14 +235 0x284A //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x4000 //RX_FDEQ_RESRV_0 +245 0x0320 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0030 //RX_FDDRC_BAND_MARGIN_1 +248 0x0050 //RX_FDDRC_BAND_MARGIN_2 +249 0x0080 //RX_FDDRC_BAND_MARGIN_3 +250 0x0007 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x5000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x6400 //RX_FDDRC_THRD_3_2 +258 0x6400 //RX_FDDRC_THRD_3_3 +259 0x2000 //RX_FDDRC_SLANT_0_0 +260 0x2000 //RX_FDDRC_SLANT_0_1 +261 0x2000 //RX_FDDRC_SLANT_0_2 +262 0x2000 //RX_FDDRC_SLANT_0_3 +263 0x5333 //RX_FDDRC_SLANT_1_0 +264 0x5333 //RX_FDDRC_SLANT_1_1 +265 0x5333 //RX_FDDRC_SLANT_1_2 +266 0x5333 //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +286 0x0100 //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 #CASE_NAME HEADSET-USB_BLACKBIRD-VOICE_GENERIC-FB -#PARAM_MODE FULL -#PARAM_TYPE TX+RX -#TOTAL_CUSTOM_STEP 7 +#PARAM_MODE Full +#PARAM_TYPE TX+2RX +#TOTAL_CUSTOM_STEP 7+7 #TX 0 0x0009 //TX_OPERATION_MODE_0 1 0x0009 //TX_OPERATION_MODE_1 @@ -5521,10 +8269,10 @@ 248 0xF600 //TX_THR_SN_EST_6 249 0xF600 //TX_THR_SN_EST_7 250 0x0200 //TX_DELTA_THR_SN_EST_0 -251 0x0200 //TX_DELTA_THR_SN_EST_1 -252 0x0400 //TX_DELTA_THR_SN_EST_2 -253 0x0300 //TX_DELTA_THR_SN_EST_3 -254 0x0600 //TX_DELTA_THR_SN_EST_4 +251 0x0400 //TX_DELTA_THR_SN_EST_1 +252 0x0300 //TX_DELTA_THR_SN_EST_2 +253 0x0600 //TX_DELTA_THR_SN_EST_3 +254 0x0200 //TX_DELTA_THR_SN_EST_4 255 0x0200 //TX_DELTA_THR_SN_EST_5 256 0x0200 //TX_DELTA_THR_SN_EST_6 257 0x0200 //TX_DELTA_THR_SN_EST_7 @@ -5552,31 +8300,31 @@ 279 0x2000 //TX_B_POST_FLT_0 280 0x2000 //TX_B_POST_FLT_1 281 0x0012 //TX_NS_LVL_CTRL_0 -282 0x0019 //TX_NS_LVL_CTRL_1 -283 0x0020 //TX_NS_LVL_CTRL_2 -284 0x0016 //TX_NS_LVL_CTRL_3 -285 0x0019 //TX_NS_LVL_CTRL_4 +282 0x0020 //TX_NS_LVL_CTRL_1 +283 0x0016 //TX_NS_LVL_CTRL_2 +284 0x0019 //TX_NS_LVL_CTRL_3 +285 0x0010 //TX_NS_LVL_CTRL_4 286 0x0010 //TX_NS_LVL_CTRL_5 -287 0x0010 //TX_NS_LVL_CTRL_6 +287 0x0019 //TX_NS_LVL_CTRL_6 288 0x0010 //TX_NS_LVL_CTRL_7 289 0x000C //TX_MIN_GAIN_S_0 -290 0x0011 //TX_MIN_GAIN_S_1 +290 0x000C //TX_MIN_GAIN_S_1 291 0x000C //TX_MIN_GAIN_S_2 -292 0x000C //TX_MIN_GAIN_S_3 -293 0x000F //TX_MIN_GAIN_S_4 +292 0x000F //TX_MIN_GAIN_S_3 +293 0x000C //TX_MIN_GAIN_S_4 294 0x000C //TX_MIN_GAIN_S_5 -295 0x000C //TX_MIN_GAIN_S_6 +295 0x0011 //TX_MIN_GAIN_S_6 296 0x000C //TX_MIN_GAIN_S_7 297 0x0800 //TX_NMOS_SUP 298 0x0000 //TX_NS_MAX_PRI_SNR_TH 299 0x0000 //TX_NMOS_SUP_MENSA 300 0x7000 //TX_SNRI_SUP_0 -301 0x6000 //TX_SNRI_SUP_1 -302 0x1000 //TX_SNRI_SUP_2 -303 0x7000 //TX_SNRI_SUP_3 -304 0x6000 //TX_SNRI_SUP_4 +301 0x1000 //TX_SNRI_SUP_1 +302 0x7000 //TX_SNRI_SUP_2 +303 0x6000 //TX_SNRI_SUP_3 +304 0x7FFF //TX_SNRI_SUP_4 305 0x7FFF //TX_SNRI_SUP_5 -306 0x7FFF //TX_SNRI_SUP_6 +306 0x6000 //TX_SNRI_SUP_6 307 0x7FFF //TX_SNRI_SUP_7 308 0x7FFF //TX_THR_LFNS 309 0x0016 //TX_G_LFNS @@ -5593,8 +8341,8 @@ 320 0x6000 //TX_A_POST_FILT_S_6 321 0x6000 //TX_A_POST_FILT_S_7 322 0x2000 //TX_B_POST_FILT_0 -323 0x2000 //TX_B_POST_FILT_1 -324 0x4000 //TX_B_POST_FILT_2 +323 0x4000 //TX_B_POST_FILT_1 +324 0x2000 //TX_B_POST_FILT_2 325 0x2000 //TX_B_POST_FILT_3 326 0x2000 //TX_B_POST_FILT_4 327 0x2000 //TX_B_POST_FILT_5 @@ -5637,7 +8385,7 @@ 364 0x0000 //TX_K_APT 365 0x0001 //TX_NOISEDET 366 0x0190 //TX_NDETCT -367 0x0020 //TX_NOISE_TH_0 +367 0x04E8 //TX_NOISE_TH_0 368 0x7FFF //TX_NOISE_TH_0_2 369 0x7FFF //TX_NOISE_TH_0_3 370 0x02A6 //TX_NOISE_TH_1 @@ -5649,11 +8397,11 @@ 376 0x0001 //TX_NOISE_TH_5_3 377 0x0000 //TX_NOISE_TH_5_4 378 0x02BC //TX_NOISE_TH_6 -379 0x0020 //TX_MINENOISE_TH -380 0x4000 //TX_MINENOISE_MIC0_TH_MTS -381 0xFFEE //TX_MINENOISE_MIC0_TH_EXP -382 0x6000 //TX_MINENOISE_MIC0_S_TH_MTS -383 0xFFF3 //TX_MINENOISE_MIC0_S_TH_EXP +379 0x02BC //TX_MINENOISE_TH +380 0xD508 //TX_MORENS_TFMASK_TH +381 0x0001 //TX_DRC_QUIET_FLOOR +382 0x3A98 //TX_RATIODTL_CUT_TH +383 0x1482 //TX_DT_CUT_K1 384 0x0666 //TX_OUT_ENER_S_TH_CLEAN 385 0x0666 //TX_OUT_ENER_S_TH_LESSCLEAN 386 0x0333 //TX_OUT_ENER_S_TH_NOISY @@ -5661,22 +8409,22 @@ 388 0x0333 //TX_OUT_ENER_TH_SPEECH 389 0x2000 //TX_SN_NPB_GAIN 390 0x0000 //TX_NN_NPB_GAIN -391 0x0000 //TX_CSX_ALPHA_0 -392 0x0000 //TX_CSX_ALPHA_1 -393 0x0000 //TX_CSX_ALPHA_2 -394 0x0000 //TX_CSX_ALPHA_3 -395 0x0800 //TX_MU_ARSP_EST -396 0x00C8 //TX_P_OUTBEAM_MIN_TH +391 0x7FFF //TX_POST_MASK_SUP_HSNE +392 0x1388 //TX_TAIL_DET_TH +393 0x4000 //TX_B_LESSCUT_RTO_WTA +394 0x0000 //TX_MEL_G_R +395 0x0080 //TX_SUPHIGH_TH +396 0x0000 //TX_MASK_G_R 397 0x0002 //TX_EXTRA_NS_L -398 0x0800 //TX_EXTRA_NS_A -399 0x0005 //TX_VR_NOISE_FLOOR_TH +398 0x1800 //TX_C_POST_FLT_MASK +399 0x7FFF //TX_A_POST_FLT_WNS 400 0x0148 //TX_MIN_G_LOW300HZ 401 0x0004 //TX_MAXLEVEL_CNG 402 0x00B4 //TX_STN_NOISE_TH 403 0x4000 //TX_POST_MASK_SUP 404 0x7FFF //TX_POST_MASK_ADJUST 405 0x00C8 //TX_NS_ENOISE_MIC0_TH -406 0x0020 //TX_MINENOISE_MIC0_TH +406 0x04E7 //TX_MINENOISE_MIC0_TH 407 0x012C //TX_MINENOISE_MIC0_S_TH 408 0x2900 //TX_MIN_G_CTRL_SSNS 409 0x0800 //TX_METAL_RTO_THR @@ -5784,16 +8532,16 @@ 511 0x6666 //TX_MIC_TO_BFGAIN 512 0x0000 //TX_MICTOBFGAIN0 513 0x0000 //TX_FASTMUE_TH -514 0x0000 //TX_DERVB_LEN_0 -515 0x0000 //TX_DERVB_LEN_1 -516 0x0000 //TX_RHO_DERVB -517 0x0000 //TX_MIC_INDX_DERVB -518 0x0000 //TX_MU_DERVB -519 0x0000 //TX_DR_RESRV_0 -520 0x0000 //TX_DR_RESRV_1 -521 0x0000 //TX_DR_RESRV_2 -522 0x0000 //TX_DR_RESRV_3 -523 0x0000 //TX_DR_RESRV_4 +514 0xC000 //TX_DEREVERB_LF_MU +515 0xC000 //TX_DEREVERB_HF_MU +516 0xCCCC //TX_DEREVERB_DELAY +517 0xD999 //TX_DEREVERB_COEF_LEN +518 0x1F40 //TX_DEREVERB_DNR +519 0x0000 //TX_DEREVERB_ALPHA +520 0x0000 //TX_DEREVERB_BETA +521 0x0000 //TX_GSC_RTOL_TH +522 0x7000 //TX_GSC_RTOH_TH +523 0x0064 //TX_WIDE2_MEANHTH 524 0x0000 //TX_DR_RESRV_5 525 0x0000 //TX_DR_RESRV_6 526 0x0000 //TX_DR_RESRV_7 @@ -6167,8 +8915,73 @@ 894 0xC000 //TX_FASTNS_SSA_THHFL 895 0xCCCC //TX_FASTNS_SSA_THLFH 896 0xD999 //TX_FASTNS_SSA_THHFH +897 0x2339 //TX_SENDFUNC_REG_MICMUTE +898 0x0021 //TX_SENDFUNC_REG_MICMUTE1 +899 0x02BC //TX_MICMUTE_RATIO_THR +900 0x0140 //TX_MICMUTE_AMP_THR +901 0x0004 //TX_MICMUTE_HPF_IND +902 0x00C0 //TX_MICMUTE_LOG_EYR_TH +903 0x0008 //TX_MICMUTE_CVG_TIME +904 0x0008 //TX_MICMUTE_RELEASE_TIME +905 0x01FE //TX_MIC_VOLUME_MIC0MUTE +906 0x0020 //TX_MICMUTE_EPD_OFFSET_0 +907 0x001E //TX_MICMUTE_FRQ_AEC_L +908 0x7999 //TX_MICMUTE_EAD_THR +909 0x7FFF //TX_MICMUTE_LAMBDA_CB_NLE +910 0x7FFF //TX_MICMUTE_LAMBDA_RE_EST +911 0x4000 //TX_DTD_THR1_MICMUTE_0 +912 0x7000 //TX_DTD_THR1_MICMUTE_1 +913 0x7FFF //TX_DTD_THR1_MICMUTE_2 +914 0x7FFF //TX_DTD_THR1_MICMUTE_3 +915 0x6CCC //TX_DTD_THR2_MICMUTE_0 +916 0x0400 //TX_MICMUTE_MIN_EQ_RE_EST_0 +917 0x0400 //TX_MICMUTE_MIN_EQ_RE_EST_1 +918 0x1000 //TX_MICMUTE_MIN_EQ_RE_EST_2 +919 0x7FFF //TX_MICMUTE_MIN_EQ_RE_EST_3 +920 0x7FFF //TX_MICMUTE_MIN_EQ_RE_EST_4 +921 0x4000 //TX_MICMUTE_C_POST_FLT +922 0x03E8 //TX_MICMUTE_DT_CUT_K +923 0x0001 //TX_MICMUTE_DT_CUT_THR +924 0x03E8 //TX_MICMUTE_DT_CUT_K2 +925 0x0001 //TX_MICMUTE_DT_CUT_THR2 +926 0x0064 //TX_MICMUTE_DT2_HOLD_N +927 0x1000 //TX_MICMUTE_RATIODTH_THCUT +928 0x1000 //TX_MICMUTE_B_POST_FLT_ECHOL +929 0x7FFF //TX_MICMUTE_B_POST_FLT_ECHOH +930 0x0400 //TX_MICMUTE_C_POST_FLT_MASK +931 0x7999 //TX_MICMUTE_RATIODTL_CUT_TH +932 0x0258 //TX_MICMUTE_DT_CUT_K1 +933 0x0800 //TX_MICMUTE_N2_SN_EST +934 0xFC00 //TX_MICMUTE_THR_SN_EST_0 +935 0x001C //TX_MICMUTE_MIN_G_CTRL_0 +936 0x6000 //TX_MICMUTE_A_POST_FILT_S_0 +937 0x7000 //TX_MICMUTE_B_POST_FILT_0 +938 0x2710 //TX_MIC1RUB_AMP_THR +939 0x0010 //TX_MIC1MUTE_RATIO_THR +940 0x0450 //TX_MIC1MUTE_AMP_THR +941 0x0008 //TX_MIC1MUTE_CVG_TIME +942 0x0008 //TX_MIC1MUTE_RELEASE_TIME +943 0x0000 //TX_AMS_RESRV_01 +944 0x0000 //TX_AMS_RESRV_02 +945 0x0000 //TX_AMS_RESRV_03 +946 0x0000 //TX_AMS_RESRV_04 +947 0x0000 //TX_AMS_RESRV_05 +948 0x0000 //TX_AMS_RESRV_06 +949 0x0000 //TX_AMS_RESRV_07 +950 0x0000 //TX_AMS_RESRV_08 +951 0x0000 //TX_AMS_RESRV_09 +952 0x0000 //TX_AMS_RESRV_10 +953 0x0000 //TX_AMS_RESRV_11 +954 0x0000 //TX_AMS_RESRV_12 +955 0x0000 //TX_AMS_RESRV_13 +956 0x0000 //TX_AMS_RESRV_14 +957 0x0000 //TX_AMS_RESRV_15 +958 0x0000 //TX_AMS_RESRV_16 +959 0x0000 //TX_AMS_RESRV_17 +960 0x0000 //TX_AMS_RESRV_18 +961 0x0000 //TX_AMS_RESRV_19 #RX -0 0x042C //RX_RECVFUNC_MODE_0 +0 0x242C //RX_RECVFUNC_MODE_0 1 0x0000 //RX_RECVFUNC_MODE_1 2 0x0004 //RX_SAMPLINGFREQ_SIG 3 0x0004 //RX_SAMPLINGFREQ_PROC @@ -6201,25 +9014,25 @@ 30 0x0002 //RX_EXTRA_NS_L 31 0x0800 //RX_EXTRA_NS_A 32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 -33 0x7FFF //RX_TDDRC_LIMITER_THRD +33 0x7220 //RX_TDDRC_LIMITER_THRD 34 0x0800 //RX_TDDRC_LIMITER_GAIN 35 0x199A //RX_A_POST_FLT 36 0x0000 //RX_LMT_THRD 37 0x4000 //RX_LMT_ALPHA 38 0x0020 //RX_FDEQ_SUBNUM -39 0x4852 //RX_FDEQ_GAIN_0 -40 0x5858 //RX_FDEQ_GAIN_1 -41 0x5C5A //RX_FDEQ_GAIN_2 -42 0x4F50 //RX_FDEQ_GAIN_3 -43 0x5A61 //RX_FDEQ_GAIN_4 -44 0x605B //RX_FDEQ_GAIN_5 -45 0x5050 //RX_FDEQ_GAIN_6 -46 0x5050 //RX_FDEQ_GAIN_7 -47 0x5044 //RX_FDEQ_GAIN_8 -48 0x3633 //RX_FDEQ_GAIN_9 -49 0x3424 //RX_FDEQ_GAIN_10 -50 0x1A24 //RX_FDEQ_GAIN_11 -51 0x2B37 //RX_FDEQ_GAIN_12 +39 0x4858 //RX_FDEQ_GAIN_0 +40 0x6265 //RX_FDEQ_GAIN_1 +41 0x6568 //RX_FDEQ_GAIN_2 +42 0x5654 //RX_FDEQ_GAIN_3 +43 0x676E //RX_FDEQ_GAIN_4 +44 0x6E6B //RX_FDEQ_GAIN_5 +45 0x5B5F //RX_FDEQ_GAIN_6 +46 0x5864 //RX_FDEQ_GAIN_7 +47 0x6548 //RX_FDEQ_GAIN_8 +48 0x4848 //RX_FDEQ_GAIN_9 +49 0x4848 //RX_FDEQ_GAIN_10 +50 0x4848 //RX_FDEQ_GAIN_11 +51 0x4848 //RX_FDEQ_GAIN_12 52 0x4848 //RX_FDEQ_GAIN_13 53 0x4848 //RX_FDEQ_GAIN_14 54 0x4848 //RX_FDEQ_GAIN_15 @@ -6282,22 +9095,22 @@ 111 0x0002 //RX_FILTINDX 112 0x0000 //RX_TDDRC_THRD_0 113 0x0000 //RX_TDDRC_THRD_1 -114 0x1200 //RX_TDDRC_THRD_2 -115 0x1900 //RX_TDDRC_THRD_3 -116 0x3000 //RX_TDDRC_SLANT_0 -117 0x6E00 //RX_TDDRC_SLANT_1 +114 0x1800 //RX_TDDRC_THRD_2 +115 0x1800 //RX_TDDRC_THRD_3 +116 0x7FFF //RX_TDDRC_SLANT_0 +117 0x7FFF //RX_TDDRC_SLANT_1 118 0x1000 //RX_TDDRC_ALPHA_UP_0 119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 120 0x0000 //RX_TDDRC_HMNC_FLAG 121 0x199A //RX_TDDRC_HMNC_GAIN 122 0x0001 //RX_TDDRC_SMT_FLAG 123 0x0CCD //RX_TDDRC_SMT_W -124 0x0240 //RX_TDDRC_DRC_GAIN +124 0x0231 //RX_TDDRC_DRC_GAIN 125 0x7C00 //RX_LAMBDA_PKA_FP 126 0x280A //RX_TPKA_FP 127 0x032D //RX_MIN_G_FP 128 0x0A00 //RX_MAX_G_FP -129 0x000A //RX_SPK_VOL +129 0x000B //RX_SPK_VOL 130 0x0000 //RX_VOL_RESRV_0 131 0x0000 //RX_MAXLEVEL_CNG 132 0x3000 //RX_BWE_UV_TH @@ -7018,11 +9831,862 @@ 110 0x0000 //RX_FDDRC_RESRV_0 129 0x0100 //RX_SPK_VOL 130 0x0000 //RX_VOL_RESRV_0 +#RX 2 +157 0x242C //RX_RECVFUNC_MODE_0 +158 0x0000 //RX_RECVFUNC_MODE_1 +159 0x0004 //RX_SAMPLINGFREQ_SIG +160 0x0004 //RX_SAMPLINGFREQ_PROC +161 0x000A //RX_FRAME_SZ +162 0x0000 //RX_DELAY_OPT +163 0x1000 //RX_TDDRC_ALPHA_UP_1 +164 0x1000 //RX_TDDRC_ALPHA_UP_2 +165 0x1000 //RX_TDDRC_ALPHA_UP_3 +166 0x1000 //RX_TDDRC_ALPHA_UP_4 +167 0x0800 //RX_PGA +168 0x7B02 //RX_A_HP +169 0x4000 //RX_B_PE +170 0x7800 //RX_THR_PITCH_DET_0 +171 0x7000 //RX_THR_PITCH_DET_1 +172 0x6000 //RX_THR_PITCH_DET_2 +173 0x0008 //RX_PITCH_BFR_LEN +174 0x0003 //RX_SBD_PITCH_DET +175 0x0100 //RX_PP_RESRV_0 +176 0x0020 //RX_PP_RESRV_1 +177 0x0500 //RX_N_SN_EST +178 0x000C //RX_N2_SN_EST +179 0x000A //RX_NS_LVL_CTRL +180 0xF600 //RX_THR_SN_EST +181 0x7000 //RX_LAMBDA_PFILT +182 0x000A //RX_FENS_RESRV_0 +183 0x0190 //RX_FENS_RESRV_1 +184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +187 0x0002 //RX_EXTRA_NS_L +188 0x0800 //RX_EXTRA_NS_A +189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +190 0x7220 //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +192 0x199A //RX_A_POST_FLT +193 0x0000 //RX_LMT_THRD +194 0x4000 //RX_LMT_ALPHA +195 0x0020 //RX_FDEQ_SUBNUM +196 0x4858 //RX_FDEQ_GAIN_0 +197 0x6265 //RX_FDEQ_GAIN_1 +198 0x6568 //RX_FDEQ_GAIN_2 +199 0x5654 //RX_FDEQ_GAIN_3 +200 0x676E //RX_FDEQ_GAIN_4 +201 0x6E6B //RX_FDEQ_GAIN_5 +202 0x5B5F //RX_FDEQ_GAIN_6 +203 0x5864 //RX_FDEQ_GAIN_7 +204 0x6548 //RX_FDEQ_GAIN_8 +205 0x4848 //RX_FDEQ_GAIN_9 +206 0x4848 //RX_FDEQ_GAIN_10 +207 0x4848 //RX_FDEQ_GAIN_11 +208 0x4848 //RX_FDEQ_GAIN_12 +209 0x4848 //RX_FDEQ_GAIN_13 +210 0x4848 //RX_FDEQ_GAIN_14 +211 0x4848 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0202 //RX_FDEQ_BIN_0 +221 0x0203 //RX_FDEQ_BIN_1 +222 0x0304 //RX_FDEQ_BIN_2 +223 0x0405 //RX_FDEQ_BIN_3 +224 0x0607 //RX_FDEQ_BIN_4 +225 0x0809 //RX_FDEQ_BIN_5 +226 0x0A0B //RX_FDEQ_BIN_6 +227 0x0C0D //RX_FDEQ_BIN_7 +228 0x0E0F //RX_FDEQ_BIN_8 +229 0x1011 //RX_FDEQ_BIN_9 +230 0x1214 //RX_FDEQ_BIN_10 +231 0x1618 //RX_FDEQ_BIN_11 +232 0x1C1C //RX_FDEQ_BIN_12 +233 0x2020 //RX_FDEQ_BIN_13 +234 0x2020 //RX_FDEQ_BIN_14 +235 0x2011 //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x4000 //RX_FDEQ_RESRV_0 +245 0x0320 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0030 //RX_FDDRC_BAND_MARGIN_1 +248 0x0050 //RX_FDDRC_BAND_MARGIN_2 +249 0x0080 //RX_FDDRC_BAND_MARGIN_3 +250 0x0007 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x5000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x6400 //RX_FDDRC_THRD_3_2 +258 0x6400 //RX_FDDRC_THRD_3_3 +259 0x2000 //RX_FDDRC_SLANT_0_0 +260 0x2000 //RX_FDDRC_SLANT_0_1 +261 0x2000 //RX_FDDRC_SLANT_0_2 +262 0x2000 //RX_FDDRC_SLANT_0_3 +263 0x5333 //RX_FDDRC_SLANT_1_0 +264 0x5333 //RX_FDDRC_SLANT_1_1 +265 0x5333 //RX_FDDRC_SLANT_1_2 +266 0x5333 //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +268 0x0002 //RX_FILTINDX +269 0x0000 //RX_TDDRC_THRD_0 +270 0x0000 //RX_TDDRC_THRD_1 +271 0x1800 //RX_TDDRC_THRD_2 +272 0x1800 //RX_TDDRC_THRD_3 +273 0x7FFF //RX_TDDRC_SLANT_0 +274 0x7FFF //RX_TDDRC_SLANT_1 +275 0x1000 //RX_TDDRC_ALPHA_UP_0 +276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x199A //RX_TDDRC_HMNC_GAIN +279 0x0001 //RX_TDDRC_SMT_FLAG +280 0x0CCD //RX_TDDRC_SMT_W +281 0x0231 //RX_TDDRC_DRC_GAIN +282 0x7C00 //RX_LAMBDA_PKA_FP +283 0x280A //RX_TPKA_FP +284 0x032D //RX_MIN_G_FP +285 0x0A00 //RX_MAX_G_FP +286 0x000B //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 +288 0x0000 //RX_MAXLEVEL_CNG +289 0x3000 //RX_BWE_UV_TH +290 0x3000 //RX_BWE_UV_TH2 +291 0x1800 //RX_BWE_UV_TH3 +292 0x1000 //RX_BWE_V_TH +293 0x04CD //RX_BWE_GAIN1_V_TH1 +294 0x0F33 //RX_BWE_GAIN1_V_TH2 +295 0x7333 //RX_BWE_UV_EQ +296 0x199A //RX_BWE_V_EQ +297 0x7333 //RX_BWE_TONE_TH +298 0x0004 //RX_BWE_UV_HOLD_T +299 0x6CCD //RX_BWE_GAIN2_ALPHA +300 0x799A //RX_BWE_GAIN3_ALPHA +301 0x001E //RX_BWE_CUTOFF +302 0x3000 //RX_BWE_GAINFILL +303 0x3200 //RX_BWE_MAXTH_TONE +304 0x2000 //RX_BWE_EQ_0 +305 0x2000 //RX_BWE_EQ_1 +306 0x2000 //RX_BWE_EQ_2 +307 0x2000 //RX_BWE_EQ_3 +308 0x2000 //RX_BWE_EQ_4 +309 0x2000 //RX_BWE_EQ_5 +310 0x2000 //RX_BWE_EQ_6 +311 0x0000 //RX_BWE_RESRV_0 +312 0x0000 //RX_BWE_RESRV_1 +313 0x0000 //RX_BWE_RESRV_2 +#VOL 0 +163 0x1000 //RX_TDDRC_ALPHA_UP_1 +164 0x1000 //RX_TDDRC_ALPHA_UP_2 +165 0x1000 //RX_TDDRC_ALPHA_UP_3 +166 0x1000 //RX_TDDRC_ALPHA_UP_4 +184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +190 0x7220 //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +269 0x0000 //RX_TDDRC_THRD_0 +270 0x0000 //RX_TDDRC_THRD_1 +271 0x1800 //RX_TDDRC_THRD_2 +272 0x1800 //RX_TDDRC_THRD_3 +273 0x7FFF //RX_TDDRC_SLANT_0 +274 0x7FFF //RX_TDDRC_SLANT_1 +275 0x1000 //RX_TDDRC_ALPHA_UP_0 +276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x199A //RX_TDDRC_HMNC_GAIN +279 0x0001 //RX_TDDRC_SMT_FLAG +280 0x0CCD //RX_TDDRC_SMT_W +281 0x0231 //RX_TDDRC_DRC_GAIN +195 0x0020 //RX_FDEQ_SUBNUM +196 0x4858 //RX_FDEQ_GAIN_0 +197 0x6265 //RX_FDEQ_GAIN_1 +198 0x6568 //RX_FDEQ_GAIN_2 +199 0x5654 //RX_FDEQ_GAIN_3 +200 0x676E //RX_FDEQ_GAIN_4 +201 0x6E6B //RX_FDEQ_GAIN_5 +202 0x5B5F //RX_FDEQ_GAIN_6 +203 0x5864 //RX_FDEQ_GAIN_7 +204 0x6548 //RX_FDEQ_GAIN_8 +205 0x4848 //RX_FDEQ_GAIN_9 +206 0x4848 //RX_FDEQ_GAIN_10 +207 0x4848 //RX_FDEQ_GAIN_11 +208 0x4848 //RX_FDEQ_GAIN_12 +209 0x4848 //RX_FDEQ_GAIN_13 +210 0x4848 //RX_FDEQ_GAIN_14 +211 0x4848 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0202 //RX_FDEQ_BIN_0 +221 0x0203 //RX_FDEQ_BIN_1 +222 0x0304 //RX_FDEQ_BIN_2 +223 0x0405 //RX_FDEQ_BIN_3 +224 0x0607 //RX_FDEQ_BIN_4 +225 0x0809 //RX_FDEQ_BIN_5 +226 0x0A0B //RX_FDEQ_BIN_6 +227 0x0C0D //RX_FDEQ_BIN_7 +228 0x0E0F //RX_FDEQ_BIN_8 +229 0x1011 //RX_FDEQ_BIN_9 +230 0x1214 //RX_FDEQ_BIN_10 +231 0x1618 //RX_FDEQ_BIN_11 +232 0x1C1C //RX_FDEQ_BIN_12 +233 0x2020 //RX_FDEQ_BIN_13 +234 0x2020 //RX_FDEQ_BIN_14 +235 0x2011 //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x4000 //RX_FDEQ_RESRV_0 +245 0x0320 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0030 //RX_FDDRC_BAND_MARGIN_1 +248 0x0050 //RX_FDDRC_BAND_MARGIN_2 +249 0x0080 //RX_FDDRC_BAND_MARGIN_3 +250 0x0007 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x5000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x6400 //RX_FDDRC_THRD_3_2 +258 0x6400 //RX_FDDRC_THRD_3_3 +259 0x2000 //RX_FDDRC_SLANT_0_0 +260 0x2000 //RX_FDDRC_SLANT_0_1 +261 0x2000 //RX_FDDRC_SLANT_0_2 +262 0x2000 //RX_FDDRC_SLANT_0_3 +263 0x5333 //RX_FDDRC_SLANT_1_0 +264 0x5333 //RX_FDDRC_SLANT_1_1 +265 0x5333 //RX_FDDRC_SLANT_1_2 +266 0x5333 //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +286 0x000B //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 +#VOL 1 +163 0x1000 //RX_TDDRC_ALPHA_UP_1 +164 0x1000 //RX_TDDRC_ALPHA_UP_2 +165 0x1000 //RX_TDDRC_ALPHA_UP_3 +166 0x1000 //RX_TDDRC_ALPHA_UP_4 +184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +190 0x7220 //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +269 0x0000 //RX_TDDRC_THRD_0 +270 0x0000 //RX_TDDRC_THRD_1 +271 0x1800 //RX_TDDRC_THRD_2 +272 0x1800 //RX_TDDRC_THRD_3 +273 0x7FFF //RX_TDDRC_SLANT_0 +274 0x7FFF //RX_TDDRC_SLANT_1 +275 0x1000 //RX_TDDRC_ALPHA_UP_0 +276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x199A //RX_TDDRC_HMNC_GAIN +279 0x0001 //RX_TDDRC_SMT_FLAG +280 0x0CCD //RX_TDDRC_SMT_W +281 0x0231 //RX_TDDRC_DRC_GAIN +195 0x0020 //RX_FDEQ_SUBNUM +196 0x4858 //RX_FDEQ_GAIN_0 +197 0x6265 //RX_FDEQ_GAIN_1 +198 0x6568 //RX_FDEQ_GAIN_2 +199 0x5654 //RX_FDEQ_GAIN_3 +200 0x676E //RX_FDEQ_GAIN_4 +201 0x6E6B //RX_FDEQ_GAIN_5 +202 0x5B5F //RX_FDEQ_GAIN_6 +203 0x5864 //RX_FDEQ_GAIN_7 +204 0x6548 //RX_FDEQ_GAIN_8 +205 0x4848 //RX_FDEQ_GAIN_9 +206 0x4848 //RX_FDEQ_GAIN_10 +207 0x4848 //RX_FDEQ_GAIN_11 +208 0x4848 //RX_FDEQ_GAIN_12 +209 0x4848 //RX_FDEQ_GAIN_13 +210 0x4848 //RX_FDEQ_GAIN_14 +211 0x4848 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0202 //RX_FDEQ_BIN_0 +221 0x0203 //RX_FDEQ_BIN_1 +222 0x0304 //RX_FDEQ_BIN_2 +223 0x0405 //RX_FDEQ_BIN_3 +224 0x0607 //RX_FDEQ_BIN_4 +225 0x0809 //RX_FDEQ_BIN_5 +226 0x0A0B //RX_FDEQ_BIN_6 +227 0x0C0D //RX_FDEQ_BIN_7 +228 0x0E0F //RX_FDEQ_BIN_8 +229 0x1011 //RX_FDEQ_BIN_9 +230 0x1214 //RX_FDEQ_BIN_10 +231 0x1618 //RX_FDEQ_BIN_11 +232 0x1C1C //RX_FDEQ_BIN_12 +233 0x2020 //RX_FDEQ_BIN_13 +234 0x2020 //RX_FDEQ_BIN_14 +235 0x2011 //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x4000 //RX_FDEQ_RESRV_0 +245 0x0320 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0030 //RX_FDDRC_BAND_MARGIN_1 +248 0x0050 //RX_FDDRC_BAND_MARGIN_2 +249 0x0080 //RX_FDDRC_BAND_MARGIN_3 +250 0x0007 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x5000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x6400 //RX_FDDRC_THRD_3_2 +258 0x6400 //RX_FDDRC_THRD_3_3 +259 0x2000 //RX_FDDRC_SLANT_0_0 +260 0x2000 //RX_FDDRC_SLANT_0_1 +261 0x2000 //RX_FDDRC_SLANT_0_2 +262 0x2000 //RX_FDDRC_SLANT_0_3 +263 0x5333 //RX_FDDRC_SLANT_1_0 +264 0x5333 //RX_FDDRC_SLANT_1_1 +265 0x5333 //RX_FDDRC_SLANT_1_2 +266 0x5333 //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +286 0x0012 //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 +#VOL 2 +163 0x1000 //RX_TDDRC_ALPHA_UP_1 +164 0x1000 //RX_TDDRC_ALPHA_UP_2 +165 0x1000 //RX_TDDRC_ALPHA_UP_3 +166 0x1000 //RX_TDDRC_ALPHA_UP_4 +184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +190 0x7220 //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +269 0x0000 //RX_TDDRC_THRD_0 +270 0x0000 //RX_TDDRC_THRD_1 +271 0x1800 //RX_TDDRC_THRD_2 +272 0x1800 //RX_TDDRC_THRD_3 +273 0x7FFF //RX_TDDRC_SLANT_0 +274 0x7FFF //RX_TDDRC_SLANT_1 +275 0x1000 //RX_TDDRC_ALPHA_UP_0 +276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x199A //RX_TDDRC_HMNC_GAIN +279 0x0001 //RX_TDDRC_SMT_FLAG +280 0x0CCD //RX_TDDRC_SMT_W +281 0x0231 //RX_TDDRC_DRC_GAIN +195 0x0020 //RX_FDEQ_SUBNUM +196 0x4858 //RX_FDEQ_GAIN_0 +197 0x6265 //RX_FDEQ_GAIN_1 +198 0x6568 //RX_FDEQ_GAIN_2 +199 0x5654 //RX_FDEQ_GAIN_3 +200 0x676E //RX_FDEQ_GAIN_4 +201 0x6E6B //RX_FDEQ_GAIN_5 +202 0x5B5F //RX_FDEQ_GAIN_6 +203 0x5864 //RX_FDEQ_GAIN_7 +204 0x6548 //RX_FDEQ_GAIN_8 +205 0x4848 //RX_FDEQ_GAIN_9 +206 0x4848 //RX_FDEQ_GAIN_10 +207 0x4848 //RX_FDEQ_GAIN_11 +208 0x4848 //RX_FDEQ_GAIN_12 +209 0x4848 //RX_FDEQ_GAIN_13 +210 0x4848 //RX_FDEQ_GAIN_14 +211 0x4848 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0202 //RX_FDEQ_BIN_0 +221 0x0203 //RX_FDEQ_BIN_1 +222 0x0304 //RX_FDEQ_BIN_2 +223 0x0405 //RX_FDEQ_BIN_3 +224 0x0607 //RX_FDEQ_BIN_4 +225 0x0809 //RX_FDEQ_BIN_5 +226 0x0A0B //RX_FDEQ_BIN_6 +227 0x0C0D //RX_FDEQ_BIN_7 +228 0x0E0F //RX_FDEQ_BIN_8 +229 0x1011 //RX_FDEQ_BIN_9 +230 0x1214 //RX_FDEQ_BIN_10 +231 0x1618 //RX_FDEQ_BIN_11 +232 0x1C1C //RX_FDEQ_BIN_12 +233 0x2020 //RX_FDEQ_BIN_13 +234 0x2020 //RX_FDEQ_BIN_14 +235 0x2011 //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x4000 //RX_FDEQ_RESRV_0 +245 0x0320 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0030 //RX_FDDRC_BAND_MARGIN_1 +248 0x0050 //RX_FDDRC_BAND_MARGIN_2 +249 0x0080 //RX_FDDRC_BAND_MARGIN_3 +250 0x0007 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x5000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x6400 //RX_FDDRC_THRD_3_2 +258 0x6400 //RX_FDDRC_THRD_3_3 +259 0x2000 //RX_FDDRC_SLANT_0_0 +260 0x2000 //RX_FDDRC_SLANT_0_1 +261 0x2000 //RX_FDDRC_SLANT_0_2 +262 0x2000 //RX_FDDRC_SLANT_0_3 +263 0x5333 //RX_FDDRC_SLANT_1_0 +264 0x5333 //RX_FDDRC_SLANT_1_1 +265 0x5333 //RX_FDDRC_SLANT_1_2 +266 0x5333 //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +286 0x001F //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 +#VOL 3 +163 0x1000 //RX_TDDRC_ALPHA_UP_1 +164 0x1000 //RX_TDDRC_ALPHA_UP_2 +165 0x1000 //RX_TDDRC_ALPHA_UP_3 +166 0x1000 //RX_TDDRC_ALPHA_UP_4 +184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +190 0x7220 //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +269 0x0000 //RX_TDDRC_THRD_0 +270 0x0000 //RX_TDDRC_THRD_1 +271 0x1800 //RX_TDDRC_THRD_2 +272 0x1800 //RX_TDDRC_THRD_3 +273 0x7FFF //RX_TDDRC_SLANT_0 +274 0x7FFF //RX_TDDRC_SLANT_1 +275 0x1000 //RX_TDDRC_ALPHA_UP_0 +276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x199A //RX_TDDRC_HMNC_GAIN +279 0x0001 //RX_TDDRC_SMT_FLAG +280 0x0CCD //RX_TDDRC_SMT_W +281 0x0231 //RX_TDDRC_DRC_GAIN +195 0x0020 //RX_FDEQ_SUBNUM +196 0x4858 //RX_FDEQ_GAIN_0 +197 0x6265 //RX_FDEQ_GAIN_1 +198 0x6568 //RX_FDEQ_GAIN_2 +199 0x5654 //RX_FDEQ_GAIN_3 +200 0x676E //RX_FDEQ_GAIN_4 +201 0x6E6B //RX_FDEQ_GAIN_5 +202 0x5B5F //RX_FDEQ_GAIN_6 +203 0x5864 //RX_FDEQ_GAIN_7 +204 0x6548 //RX_FDEQ_GAIN_8 +205 0x4848 //RX_FDEQ_GAIN_9 +206 0x4848 //RX_FDEQ_GAIN_10 +207 0x4848 //RX_FDEQ_GAIN_11 +208 0x4848 //RX_FDEQ_GAIN_12 +209 0x4848 //RX_FDEQ_GAIN_13 +210 0x4848 //RX_FDEQ_GAIN_14 +211 0x4848 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0202 //RX_FDEQ_BIN_0 +221 0x0203 //RX_FDEQ_BIN_1 +222 0x0304 //RX_FDEQ_BIN_2 +223 0x0405 //RX_FDEQ_BIN_3 +224 0x0607 //RX_FDEQ_BIN_4 +225 0x0809 //RX_FDEQ_BIN_5 +226 0x0A0B //RX_FDEQ_BIN_6 +227 0x0C0D //RX_FDEQ_BIN_7 +228 0x0E0F //RX_FDEQ_BIN_8 +229 0x1011 //RX_FDEQ_BIN_9 +230 0x1214 //RX_FDEQ_BIN_10 +231 0x1618 //RX_FDEQ_BIN_11 +232 0x1C1C //RX_FDEQ_BIN_12 +233 0x2020 //RX_FDEQ_BIN_13 +234 0x2020 //RX_FDEQ_BIN_14 +235 0x2011 //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x4000 //RX_FDEQ_RESRV_0 +245 0x0320 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0030 //RX_FDDRC_BAND_MARGIN_1 +248 0x0050 //RX_FDDRC_BAND_MARGIN_2 +249 0x0080 //RX_FDDRC_BAND_MARGIN_3 +250 0x0007 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x5000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x6400 //RX_FDDRC_THRD_3_2 +258 0x6400 //RX_FDDRC_THRD_3_3 +259 0x2000 //RX_FDDRC_SLANT_0_0 +260 0x2000 //RX_FDDRC_SLANT_0_1 +261 0x2000 //RX_FDDRC_SLANT_0_2 +262 0x2000 //RX_FDDRC_SLANT_0_3 +263 0x5333 //RX_FDDRC_SLANT_1_0 +264 0x5333 //RX_FDDRC_SLANT_1_1 +265 0x5333 //RX_FDDRC_SLANT_1_2 +266 0x5333 //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +286 0x0034 //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 +#VOL 4 +163 0x1000 //RX_TDDRC_ALPHA_UP_1 +164 0x1000 //RX_TDDRC_ALPHA_UP_2 +165 0x1000 //RX_TDDRC_ALPHA_UP_3 +166 0x1000 //RX_TDDRC_ALPHA_UP_4 +184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +190 0x7220 //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +269 0x0000 //RX_TDDRC_THRD_0 +270 0x0000 //RX_TDDRC_THRD_1 +271 0x1800 //RX_TDDRC_THRD_2 +272 0x1800 //RX_TDDRC_THRD_3 +273 0x7FFF //RX_TDDRC_SLANT_0 +274 0x7FFF //RX_TDDRC_SLANT_1 +275 0x1000 //RX_TDDRC_ALPHA_UP_0 +276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x199A //RX_TDDRC_HMNC_GAIN +279 0x0001 //RX_TDDRC_SMT_FLAG +280 0x0CCD //RX_TDDRC_SMT_W +281 0x0231 //RX_TDDRC_DRC_GAIN +195 0x0020 //RX_FDEQ_SUBNUM +196 0x4858 //RX_FDEQ_GAIN_0 +197 0x6265 //RX_FDEQ_GAIN_1 +198 0x6568 //RX_FDEQ_GAIN_2 +199 0x5654 //RX_FDEQ_GAIN_3 +200 0x676E //RX_FDEQ_GAIN_4 +201 0x6E6B //RX_FDEQ_GAIN_5 +202 0x5B5F //RX_FDEQ_GAIN_6 +203 0x5864 //RX_FDEQ_GAIN_7 +204 0x6548 //RX_FDEQ_GAIN_8 +205 0x4848 //RX_FDEQ_GAIN_9 +206 0x4848 //RX_FDEQ_GAIN_10 +207 0x4848 //RX_FDEQ_GAIN_11 +208 0x4848 //RX_FDEQ_GAIN_12 +209 0x4848 //RX_FDEQ_GAIN_13 +210 0x4848 //RX_FDEQ_GAIN_14 +211 0x4848 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0202 //RX_FDEQ_BIN_0 +221 0x0203 //RX_FDEQ_BIN_1 +222 0x0304 //RX_FDEQ_BIN_2 +223 0x0405 //RX_FDEQ_BIN_3 +224 0x0607 //RX_FDEQ_BIN_4 +225 0x0809 //RX_FDEQ_BIN_5 +226 0x0A0B //RX_FDEQ_BIN_6 +227 0x0C0D //RX_FDEQ_BIN_7 +228 0x0E0F //RX_FDEQ_BIN_8 +229 0x1011 //RX_FDEQ_BIN_9 +230 0x1214 //RX_FDEQ_BIN_10 +231 0x1618 //RX_FDEQ_BIN_11 +232 0x1C1C //RX_FDEQ_BIN_12 +233 0x2020 //RX_FDEQ_BIN_13 +234 0x2020 //RX_FDEQ_BIN_14 +235 0x2011 //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x4000 //RX_FDEQ_RESRV_0 +245 0x0320 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0030 //RX_FDDRC_BAND_MARGIN_1 +248 0x0050 //RX_FDDRC_BAND_MARGIN_2 +249 0x0080 //RX_FDDRC_BAND_MARGIN_3 +250 0x0007 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x5000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x6400 //RX_FDDRC_THRD_3_2 +258 0x6400 //RX_FDDRC_THRD_3_3 +259 0x2000 //RX_FDDRC_SLANT_0_0 +260 0x2000 //RX_FDDRC_SLANT_0_1 +261 0x2000 //RX_FDDRC_SLANT_0_2 +262 0x2000 //RX_FDDRC_SLANT_0_3 +263 0x5333 //RX_FDDRC_SLANT_1_0 +264 0x5333 //RX_FDDRC_SLANT_1_1 +265 0x5333 //RX_FDDRC_SLANT_1_2 +266 0x5333 //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +286 0x0056 //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 +#VOL 5 +163 0x1000 //RX_TDDRC_ALPHA_UP_1 +164 0x1000 //RX_TDDRC_ALPHA_UP_2 +165 0x1000 //RX_TDDRC_ALPHA_UP_3 +166 0x1000 //RX_TDDRC_ALPHA_UP_4 +184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +190 0x7220 //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +269 0x0000 //RX_TDDRC_THRD_0 +270 0x0000 //RX_TDDRC_THRD_1 +271 0x1800 //RX_TDDRC_THRD_2 +272 0x1800 //RX_TDDRC_THRD_3 +273 0x7FFF //RX_TDDRC_SLANT_0 +274 0x7FFF //RX_TDDRC_SLANT_1 +275 0x1000 //RX_TDDRC_ALPHA_UP_0 +276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x199A //RX_TDDRC_HMNC_GAIN +279 0x0001 //RX_TDDRC_SMT_FLAG +280 0x0CCD //RX_TDDRC_SMT_W +281 0x0231 //RX_TDDRC_DRC_GAIN +195 0x0020 //RX_FDEQ_SUBNUM +196 0x4858 //RX_FDEQ_GAIN_0 +197 0x6265 //RX_FDEQ_GAIN_1 +198 0x6568 //RX_FDEQ_GAIN_2 +199 0x5654 //RX_FDEQ_GAIN_3 +200 0x676E //RX_FDEQ_GAIN_4 +201 0x6E6B //RX_FDEQ_GAIN_5 +202 0x5B5F //RX_FDEQ_GAIN_6 +203 0x5864 //RX_FDEQ_GAIN_7 +204 0x6548 //RX_FDEQ_GAIN_8 +205 0x4848 //RX_FDEQ_GAIN_9 +206 0x4848 //RX_FDEQ_GAIN_10 +207 0x4848 //RX_FDEQ_GAIN_11 +208 0x4848 //RX_FDEQ_GAIN_12 +209 0x4848 //RX_FDEQ_GAIN_13 +210 0x4848 //RX_FDEQ_GAIN_14 +211 0x4848 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0202 //RX_FDEQ_BIN_0 +221 0x0203 //RX_FDEQ_BIN_1 +222 0x0304 //RX_FDEQ_BIN_2 +223 0x0405 //RX_FDEQ_BIN_3 +224 0x0607 //RX_FDEQ_BIN_4 +225 0x0809 //RX_FDEQ_BIN_5 +226 0x0A0B //RX_FDEQ_BIN_6 +227 0x0C0D //RX_FDEQ_BIN_7 +228 0x0E0F //RX_FDEQ_BIN_8 +229 0x1011 //RX_FDEQ_BIN_9 +230 0x1214 //RX_FDEQ_BIN_10 +231 0x1618 //RX_FDEQ_BIN_11 +232 0x1C1C //RX_FDEQ_BIN_12 +233 0x2020 //RX_FDEQ_BIN_13 +234 0x2020 //RX_FDEQ_BIN_14 +235 0x2011 //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x4000 //RX_FDEQ_RESRV_0 +245 0x0320 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0030 //RX_FDDRC_BAND_MARGIN_1 +248 0x0050 //RX_FDDRC_BAND_MARGIN_2 +249 0x0080 //RX_FDDRC_BAND_MARGIN_3 +250 0x0007 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x5000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x6400 //RX_FDDRC_THRD_3_2 +258 0x6400 //RX_FDDRC_THRD_3_3 +259 0x2000 //RX_FDDRC_SLANT_0_0 +260 0x2000 //RX_FDDRC_SLANT_0_1 +261 0x2000 //RX_FDDRC_SLANT_0_2 +262 0x2000 //RX_FDDRC_SLANT_0_3 +263 0x5333 //RX_FDDRC_SLANT_1_0 +264 0x5333 //RX_FDDRC_SLANT_1_1 +265 0x5333 //RX_FDDRC_SLANT_1_2 +266 0x5333 //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +286 0x0090 //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 +#VOL 6 +163 0x1000 //RX_TDDRC_ALPHA_UP_1 +164 0x1000 //RX_TDDRC_ALPHA_UP_2 +165 0x1000 //RX_TDDRC_ALPHA_UP_3 +166 0x1000 //RX_TDDRC_ALPHA_UP_4 +184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +190 0x7220 //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +269 0x0000 //RX_TDDRC_THRD_0 +270 0x0000 //RX_TDDRC_THRD_1 +271 0x1800 //RX_TDDRC_THRD_2 +272 0x1800 //RX_TDDRC_THRD_3 +273 0x7FFF //RX_TDDRC_SLANT_0 +274 0x7FFF //RX_TDDRC_SLANT_1 +275 0x1000 //RX_TDDRC_ALPHA_UP_0 +276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x199A //RX_TDDRC_HMNC_GAIN +279 0x0001 //RX_TDDRC_SMT_FLAG +280 0x0CCD //RX_TDDRC_SMT_W +281 0x0231 //RX_TDDRC_DRC_GAIN +195 0x0020 //RX_FDEQ_SUBNUM +196 0x4858 //RX_FDEQ_GAIN_0 +197 0x6265 //RX_FDEQ_GAIN_1 +198 0x6568 //RX_FDEQ_GAIN_2 +199 0x5654 //RX_FDEQ_GAIN_3 +200 0x676E //RX_FDEQ_GAIN_4 +201 0x6E6B //RX_FDEQ_GAIN_5 +202 0x5B5F //RX_FDEQ_GAIN_6 +203 0x5864 //RX_FDEQ_GAIN_7 +204 0x6548 //RX_FDEQ_GAIN_8 +205 0x4848 //RX_FDEQ_GAIN_9 +206 0x4848 //RX_FDEQ_GAIN_10 +207 0x4848 //RX_FDEQ_GAIN_11 +208 0x4848 //RX_FDEQ_GAIN_12 +209 0x4848 //RX_FDEQ_GAIN_13 +210 0x4848 //RX_FDEQ_GAIN_14 +211 0x4848 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0202 //RX_FDEQ_BIN_0 +221 0x0203 //RX_FDEQ_BIN_1 +222 0x0304 //RX_FDEQ_BIN_2 +223 0x0405 //RX_FDEQ_BIN_3 +224 0x0607 //RX_FDEQ_BIN_4 +225 0x0809 //RX_FDEQ_BIN_5 +226 0x0A0B //RX_FDEQ_BIN_6 +227 0x0C0D //RX_FDEQ_BIN_7 +228 0x0E0F //RX_FDEQ_BIN_8 +229 0x1011 //RX_FDEQ_BIN_9 +230 0x1214 //RX_FDEQ_BIN_10 +231 0x1618 //RX_FDEQ_BIN_11 +232 0x1C1C //RX_FDEQ_BIN_12 +233 0x2020 //RX_FDEQ_BIN_13 +234 0x2020 //RX_FDEQ_BIN_14 +235 0x2011 //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x4000 //RX_FDEQ_RESRV_0 +245 0x0320 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0030 //RX_FDDRC_BAND_MARGIN_1 +248 0x0050 //RX_FDDRC_BAND_MARGIN_2 +249 0x0080 //RX_FDDRC_BAND_MARGIN_3 +250 0x0007 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x5000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x6400 //RX_FDDRC_THRD_3_2 +258 0x6400 //RX_FDDRC_THRD_3_3 +259 0x2000 //RX_FDDRC_SLANT_0_0 +260 0x2000 //RX_FDDRC_SLANT_0_1 +261 0x2000 //RX_FDDRC_SLANT_0_2 +262 0x2000 //RX_FDDRC_SLANT_0_3 +263 0x5333 //RX_FDDRC_SLANT_1_0 +264 0x5333 //RX_FDDRC_SLANT_1_1 +265 0x5333 //RX_FDDRC_SLANT_1_2 +266 0x5333 //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +286 0x0100 //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 #CASE_NAME HEADSET-GOOGLE_CONDOR-VOICE_GENERIC-NB -#PARAM_MODE FULL -#PARAM_TYPE TX+RX -#TOTAL_CUSTOM_STEP 7 +#PARAM_MODE Full +#PARAM_TYPE TX+2RX +#TOTAL_CUSTOM_STEP 7+7 #TX 0 0x0009 //TX_OPERATION_MODE_0 1 0x0008 //TX_OPERATION_MODE_1 @@ -7339,20 +11003,20 @@ 312 0x7FFF //TX_A_POST_FILT_0 313 0x2000 //TX_A_POST_FILT_1 314 0x4000 //TX_A_POST_FILT_S_0 -315 0x4000 //TX_A_POST_FILT_S_1 -316 0x1000 //TX_A_POST_FILT_S_2 +315 0x1000 //TX_A_POST_FILT_S_1 +316 0x4000 //TX_A_POST_FILT_S_2 317 0x4000 //TX_A_POST_FILT_S_3 318 0x4000 //TX_A_POST_FILT_S_4 319 0x4000 //TX_A_POST_FILT_S_5 320 0x4000 //TX_A_POST_FILT_S_6 321 0x4000 //TX_A_POST_FILT_S_7 322 0x0400 //TX_B_POST_FILT_0 -323 0x0400 //TX_B_POST_FILT_1 +323 0x2000 //TX_B_POST_FILT_1 324 0x2000 //TX_B_POST_FILT_2 325 0x2000 //TX_B_POST_FILT_3 326 0x2000 //TX_B_POST_FILT_4 327 0x2000 //TX_B_POST_FILT_5 -328 0x2000 //TX_B_POST_FILT_6 +328 0x0400 //TX_B_POST_FILT_6 329 0x2000 //TX_B_POST_FILT_7 330 0x7FFF //TX_B_LESSCUT_RTO_S_0 331 0x7FFF //TX_B_LESSCUT_RTO_S_1 @@ -7391,7 +11055,7 @@ 364 0x0000 //TX_K_APT 365 0x0001 //TX_NOISEDET 366 0x0190 //TX_NDETCT -367 0x000A //TX_NOISE_TH_0 +367 0x003B //TX_NOISE_TH_0 368 0x1B58 //TX_NOISE_TH_0_2 369 0x2134 //TX_NOISE_TH_0_3 370 0x02BC //TX_NOISE_TH_1 @@ -7403,11 +11067,11 @@ 376 0x0000 //TX_NOISE_TH_5_3 377 0x0000 //TX_NOISE_TH_5_4 378 0x0032 //TX_NOISE_TH_6 -379 0x0014 //TX_MINENOISE_TH -380 0x4000 //TX_MINENOISE_MIC0_TH_MTS -381 0xFFEE //TX_MINENOISE_MIC0_TH_EXP -382 0x6000 //TX_MINENOISE_MIC0_S_TH_MTS -383 0xFFF3 //TX_MINENOISE_MIC0_S_TH_EXP +379 0x00C8 //TX_MINENOISE_TH +380 0xD508 //TX_MORENS_TFMASK_TH +381 0x0001 //TX_DRC_QUIET_FLOOR +382 0x3A98 //TX_RATIODTL_CUT_TH +383 0x0DAC //TX_DT_CUT_K1 384 0x00A5 //TX_OUT_ENER_S_TH_CLEAN 385 0x00A5 //TX_OUT_ENER_S_TH_LESSCLEAN 386 0x00A5 //TX_OUT_ENER_S_TH_NOISY @@ -7415,22 +11079,22 @@ 388 0x00CE //TX_OUT_ENER_TH_SPEECH 389 0x2000 //TX_SN_NPB_GAIN 390 0x0000 //TX_NN_NPB_GAIN -391 0x0000 //TX_CSX_ALPHA_0 -392 0x0000 //TX_CSX_ALPHA_1 -393 0x0000 //TX_CSX_ALPHA_2 -394 0x0000 //TX_CSX_ALPHA_3 -395 0x0800 //TX_MU_ARSP_EST -396 0x00C8 //TX_P_OUTBEAM_MIN_TH +391 0x7FFF //TX_POST_MASK_SUP_HSNE +392 0x1388 //TX_TAIL_DET_TH +393 0x4000 //TX_B_LESSCUT_RTO_WTA +394 0x0000 //TX_MEL_G_R +395 0x0080 //TX_SUPHIGH_TH +396 0x0000 //TX_MASK_G_R 397 0x0002 //TX_EXTRA_NS_L -398 0x0800 //TX_EXTRA_NS_A -399 0x0005 //TX_VR_NOISE_FLOOR_TH +398 0x1800 //TX_C_POST_FLT_MASK +399 0x7FFF //TX_A_POST_FLT_WNS 400 0x0148 //TX_MIN_G_LOW300HZ 401 0x0002 //TX_MAXLEVEL_CNG 402 0x00B4 //TX_STN_NOISE_TH 403 0x4000 //TX_POST_MASK_SUP 404 0x7FFF //TX_POST_MASK_ADJUST 405 0x00C8 //TX_NS_ENOISE_MIC0_TH -406 0x0014 //TX_MINENOISE_MIC0_TH +406 0x0032 //TX_MINENOISE_MIC0_TH 407 0x012C //TX_MINENOISE_MIC0_S_TH 408 0x7FFF //TX_MIN_G_CTRL_SSNS 409 0x0000 //TX_METAL_RTO_THR @@ -7538,16 +11202,16 @@ 511 0x6666 //TX_MIC_TO_BFGAIN 512 0x0000 //TX_MICTOBFGAIN0 513 0x0000 //TX_FASTMUE_TH -514 0x0000 //TX_DERVB_LEN_0 -515 0x0000 //TX_DERVB_LEN_1 -516 0x0000 //TX_RHO_DERVB -517 0x0000 //TX_MIC_INDX_DERVB -518 0x0000 //TX_MU_DERVB -519 0x0000 //TX_DR_RESRV_0 -520 0x0000 //TX_DR_RESRV_1 -521 0x0000 //TX_DR_RESRV_2 -522 0x0000 //TX_DR_RESRV_3 -523 0x0000 //TX_DR_RESRV_4 +514 0xC000 //TX_DEREVERB_LF_MU +515 0xC000 //TX_DEREVERB_HF_MU +516 0xCCCC //TX_DEREVERB_DELAY +517 0xD999 //TX_DEREVERB_COEF_LEN +518 0x1F40 //TX_DEREVERB_DNR +519 0x0000 //TX_DEREVERB_ALPHA +520 0x0000 //TX_DEREVERB_BETA +521 0x0000 //TX_GSC_RTOL_TH +522 0x7000 //TX_GSC_RTOH_TH +523 0x0064 //TX_WIDE2_MEANHTH 524 0x0000 //TX_DR_RESRV_5 525 0x0000 //TX_DR_RESRV_6 526 0x0000 //TX_DR_RESRV_7 @@ -7915,14 +11579,79 @@ 888 0x00C8 //TX_FASTNS_ARSPC_TH 889 0xC000 //TX_FASTNS_MASK5_TH 890 0x4848 //TX_POSTSSA_MIN_G_VR_MASK -891 0x7FFF //TX_A_LESSCUT_RTO_MASK +891 0x4000 //TX_A_LESSCUT_RTO_MASK 892 0x1770 //TX_FASTNS_NOISETH 893 0xC000 //TX_FASTNS_SSA_THLFL 894 0xC000 //TX_FASTNS_SSA_THHFL 895 0xCCCC //TX_FASTNS_SSA_THLFH 896 0xD999 //TX_FASTNS_SSA_THHFH +897 0x2339 //TX_SENDFUNC_REG_MICMUTE +898 0x0021 //TX_SENDFUNC_REG_MICMUTE1 +899 0x02BC //TX_MICMUTE_RATIO_THR +900 0x0140 //TX_MICMUTE_AMP_THR +901 0x0004 //TX_MICMUTE_HPF_IND +902 0x00C0 //TX_MICMUTE_LOG_EYR_TH +903 0x0008 //TX_MICMUTE_CVG_TIME +904 0x0008 //TX_MICMUTE_RELEASE_TIME +905 0x01FE //TX_MIC_VOLUME_MIC0MUTE +906 0x0020 //TX_MICMUTE_EPD_OFFSET_0 +907 0x001E //TX_MICMUTE_FRQ_AEC_L +908 0x7999 //TX_MICMUTE_EAD_THR +909 0x7FFF //TX_MICMUTE_LAMBDA_CB_NLE +910 0x7FFF //TX_MICMUTE_LAMBDA_RE_EST +911 0x4000 //TX_DTD_THR1_MICMUTE_0 +912 0x7000 //TX_DTD_THR1_MICMUTE_1 +913 0x7FFF //TX_DTD_THR1_MICMUTE_2 +914 0x7FFF //TX_DTD_THR1_MICMUTE_3 +915 0x6CCC //TX_DTD_THR2_MICMUTE_0 +916 0x0400 //TX_MICMUTE_MIN_EQ_RE_EST_0 +917 0x0400 //TX_MICMUTE_MIN_EQ_RE_EST_1 +918 0x1000 //TX_MICMUTE_MIN_EQ_RE_EST_2 +919 0x7FFF //TX_MICMUTE_MIN_EQ_RE_EST_3 +920 0x7FFF //TX_MICMUTE_MIN_EQ_RE_EST_4 +921 0x4000 //TX_MICMUTE_C_POST_FLT +922 0x03E8 //TX_MICMUTE_DT_CUT_K +923 0x0001 //TX_MICMUTE_DT_CUT_THR +924 0x03E8 //TX_MICMUTE_DT_CUT_K2 +925 0x0001 //TX_MICMUTE_DT_CUT_THR2 +926 0x0064 //TX_MICMUTE_DT2_HOLD_N +927 0x1000 //TX_MICMUTE_RATIODTH_THCUT +928 0x1000 //TX_MICMUTE_B_POST_FLT_ECHOL +929 0x7FFF //TX_MICMUTE_B_POST_FLT_ECHOH +930 0x0400 //TX_MICMUTE_C_POST_FLT_MASK +931 0x7999 //TX_MICMUTE_RATIODTL_CUT_TH +932 0x0258 //TX_MICMUTE_DT_CUT_K1 +933 0x0800 //TX_MICMUTE_N2_SN_EST +934 0xFC00 //TX_MICMUTE_THR_SN_EST_0 +935 0x001C //TX_MICMUTE_MIN_G_CTRL_0 +936 0x6000 //TX_MICMUTE_A_POST_FILT_S_0 +937 0x7000 //TX_MICMUTE_B_POST_FILT_0 +938 0x2710 //TX_MIC1RUB_AMP_THR +939 0x0010 //TX_MIC1MUTE_RATIO_THR +940 0x0450 //TX_MIC1MUTE_AMP_THR +941 0x0008 //TX_MIC1MUTE_CVG_TIME +942 0x0008 //TX_MIC1MUTE_RELEASE_TIME +943 0x0000 //TX_AMS_RESRV_01 +944 0x0000 //TX_AMS_RESRV_02 +945 0x0000 //TX_AMS_RESRV_03 +946 0x0000 //TX_AMS_RESRV_04 +947 0x0000 //TX_AMS_RESRV_05 +948 0x0000 //TX_AMS_RESRV_06 +949 0x0000 //TX_AMS_RESRV_07 +950 0x0000 //TX_AMS_RESRV_08 +951 0x0000 //TX_AMS_RESRV_09 +952 0x0000 //TX_AMS_RESRV_10 +953 0x0000 //TX_AMS_RESRV_11 +954 0x0000 //TX_AMS_RESRV_12 +955 0x0000 //TX_AMS_RESRV_13 +956 0x0000 //TX_AMS_RESRV_14 +957 0x0000 //TX_AMS_RESRV_15 +958 0x0000 //TX_AMS_RESRV_16 +959 0x0000 //TX_AMS_RESRV_17 +960 0x0000 //TX_AMS_RESRV_18 +961 0x0000 //TX_AMS_RESRV_19 #RX -0 0x002C //RX_RECVFUNC_MODE_0 +0 0x202C //RX_RECVFUNC_MODE_0 1 0x0000 //RX_RECVFUNC_MODE_1 2 0x0000 //RX_SAMPLINGFREQ_SIG 3 0x0000 //RX_SAMPLINGFREQ_PROC @@ -8772,11 +12501,862 @@ 110 0x0000 //RX_FDDRC_RESRV_0 129 0x0100 //RX_SPK_VOL 130 0x0000 //RX_VOL_RESRV_0 +#RX 2 +157 0x202C //RX_RECVFUNC_MODE_0 +158 0x0000 //RX_RECVFUNC_MODE_1 +159 0x0000 //RX_SAMPLINGFREQ_SIG +160 0x0000 //RX_SAMPLINGFREQ_PROC +161 0x000A //RX_FRAME_SZ +162 0x0000 //RX_DELAY_OPT +163 0x3000 //RX_TDDRC_ALPHA_UP_1 +164 0x3000 //RX_TDDRC_ALPHA_UP_2 +165 0x3000 //RX_TDDRC_ALPHA_UP_3 +166 0x3000 //RX_TDDRC_ALPHA_UP_4 +167 0x0800 //RX_PGA +168 0x7FFF //RX_A_HP +169 0x0000 //RX_B_PE +170 0x3800 //RX_THR_PITCH_DET_0 +171 0x3000 //RX_THR_PITCH_DET_1 +172 0x2800 //RX_THR_PITCH_DET_2 +173 0x0008 //RX_PITCH_BFR_LEN +174 0x0003 //RX_SBD_PITCH_DET +175 0x0100 //RX_PP_RESRV_0 +176 0x0020 //RX_PP_RESRV_1 +177 0x0600 //RX_N_SN_EST +178 0x000C //RX_N2_SN_EST +179 0x0010 //RX_NS_LVL_CTRL +180 0xF800 //RX_THR_SN_EST +181 0x7CCD //RX_LAMBDA_PFILT +182 0x000A //RX_FENS_RESRV_0 +183 0x0190 //RX_FENS_RESRV_1 +184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +187 0x0002 //RX_EXTRA_NS_L +188 0x0800 //RX_EXTRA_NS_A +189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +190 0x7FFF //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +192 0x199A //RX_A_POST_FLT +193 0x0000 //RX_LMT_THRD +194 0x4000 //RX_LMT_ALPHA +195 0x0014 //RX_FDEQ_SUBNUM +196 0x4848 //RX_FDEQ_GAIN_0 +197 0x4848 //RX_FDEQ_GAIN_1 +198 0x4848 //RX_FDEQ_GAIN_2 +199 0x4848 //RX_FDEQ_GAIN_3 +200 0x4848 //RX_FDEQ_GAIN_4 +201 0x4848 //RX_FDEQ_GAIN_5 +202 0x4848 //RX_FDEQ_GAIN_6 +203 0x4848 //RX_FDEQ_GAIN_7 +204 0x4848 //RX_FDEQ_GAIN_8 +205 0x4848 //RX_FDEQ_GAIN_9 +206 0x4848 //RX_FDEQ_GAIN_10 +207 0x4848 //RX_FDEQ_GAIN_11 +208 0x4848 //RX_FDEQ_GAIN_12 +209 0x4848 //RX_FDEQ_GAIN_13 +210 0x4848 //RX_FDEQ_GAIN_14 +211 0x4848 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0202 //RX_FDEQ_BIN_0 +221 0x0203 //RX_FDEQ_BIN_1 +222 0x0303 //RX_FDEQ_BIN_2 +223 0x0304 //RX_FDEQ_BIN_3 +224 0x0405 //RX_FDEQ_BIN_4 +225 0x0506 //RX_FDEQ_BIN_5 +226 0x0708 //RX_FDEQ_BIN_6 +227 0x090A //RX_FDEQ_BIN_7 +228 0x0B0C //RX_FDEQ_BIN_8 +229 0x0D08 //RX_FDEQ_BIN_9 +230 0x0000 //RX_FDEQ_BIN_10 +231 0x0000 //RX_FDEQ_BIN_11 +232 0x0000 //RX_FDEQ_BIN_12 +233 0x0000 //RX_FDEQ_BIN_13 +234 0x0000 //RX_FDEQ_BIN_14 +235 0x0000 //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x4000 //RX_FDEQ_RESRV_0 +245 0x0320 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0030 //RX_FDDRC_BAND_MARGIN_1 +248 0x0050 //RX_FDDRC_BAND_MARGIN_2 +249 0x0080 //RX_FDDRC_BAND_MARGIN_3 +250 0x0007 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x5000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x6400 //RX_FDDRC_THRD_3_2 +258 0x6400 //RX_FDDRC_THRD_3_3 +259 0x2000 //RX_FDDRC_SLANT_0_0 +260 0x2000 //RX_FDDRC_SLANT_0_1 +261 0x2000 //RX_FDDRC_SLANT_0_2 +262 0x2000 //RX_FDDRC_SLANT_0_3 +263 0x5333 //RX_FDDRC_SLANT_1_0 +264 0x5333 //RX_FDDRC_SLANT_1_1 +265 0x5333 //RX_FDDRC_SLANT_1_2 +266 0x5333 //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +268 0x0002 //RX_FILTINDX +269 0x0000 //RX_TDDRC_THRD_0 +270 0x0000 //RX_TDDRC_THRD_1 +271 0x2000 //RX_TDDRC_THRD_2 +272 0x3000 //RX_TDDRC_THRD_3 +273 0x0800 //RX_TDDRC_SLANT_0 +274 0x7EB8 //RX_TDDRC_SLANT_1 +275 0x3000 //RX_TDDRC_ALPHA_UP_0 +276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x199A //RX_TDDRC_HMNC_GAIN +279 0x0001 //RX_TDDRC_SMT_FLAG +280 0x0CCD //RX_TDDRC_SMT_W +281 0x0200 //RX_TDDRC_DRC_GAIN +282 0x7C00 //RX_LAMBDA_PKA_FP +283 0x2000 //RX_TPKA_FP +284 0x2000 //RX_MIN_G_FP +285 0x0080 //RX_MAX_G_FP +286 0x000B //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 +288 0x0000 //RX_MAXLEVEL_CNG +289 0x3000 //RX_BWE_UV_TH +290 0x3000 //RX_BWE_UV_TH2 +291 0x1800 //RX_BWE_UV_TH3 +292 0x1000 //RX_BWE_V_TH +293 0x04CD //RX_BWE_GAIN1_V_TH1 +294 0x0F33 //RX_BWE_GAIN1_V_TH2 +295 0x7333 //RX_BWE_UV_EQ +296 0x199A //RX_BWE_V_EQ +297 0x7333 //RX_BWE_TONE_TH +298 0x0004 //RX_BWE_UV_HOLD_T +299 0x6CCD //RX_BWE_GAIN2_ALPHA +300 0x799A //RX_BWE_GAIN3_ALPHA +301 0x001E //RX_BWE_CUTOFF +302 0x3000 //RX_BWE_GAINFILL +303 0x3200 //RX_BWE_MAXTH_TONE +304 0x2000 //RX_BWE_EQ_0 +305 0x2000 //RX_BWE_EQ_1 +306 0x2000 //RX_BWE_EQ_2 +307 0x2000 //RX_BWE_EQ_3 +308 0x2000 //RX_BWE_EQ_4 +309 0x2000 //RX_BWE_EQ_5 +310 0x2000 //RX_BWE_EQ_6 +311 0x0000 //RX_BWE_RESRV_0 +312 0x0000 //RX_BWE_RESRV_1 +313 0x0000 //RX_BWE_RESRV_2 +#VOL 0 +163 0x3000 //RX_TDDRC_ALPHA_UP_1 +164 0x3000 //RX_TDDRC_ALPHA_UP_2 +165 0x3000 //RX_TDDRC_ALPHA_UP_3 +166 0x3000 //RX_TDDRC_ALPHA_UP_4 +184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +190 0x7FFF //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +269 0x0000 //RX_TDDRC_THRD_0 +270 0x0000 //RX_TDDRC_THRD_1 +271 0x2000 //RX_TDDRC_THRD_2 +272 0x3000 //RX_TDDRC_THRD_3 +273 0x0800 //RX_TDDRC_SLANT_0 +274 0x7EB8 //RX_TDDRC_SLANT_1 +275 0x3000 //RX_TDDRC_ALPHA_UP_0 +276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x199A //RX_TDDRC_HMNC_GAIN +279 0x0001 //RX_TDDRC_SMT_FLAG +280 0x0CCD //RX_TDDRC_SMT_W +281 0x0200 //RX_TDDRC_DRC_GAIN +195 0x0014 //RX_FDEQ_SUBNUM +196 0x4848 //RX_FDEQ_GAIN_0 +197 0x4848 //RX_FDEQ_GAIN_1 +198 0x4848 //RX_FDEQ_GAIN_2 +199 0x4848 //RX_FDEQ_GAIN_3 +200 0x4848 //RX_FDEQ_GAIN_4 +201 0x4848 //RX_FDEQ_GAIN_5 +202 0x4848 //RX_FDEQ_GAIN_6 +203 0x4848 //RX_FDEQ_GAIN_7 +204 0x4848 //RX_FDEQ_GAIN_8 +205 0x4848 //RX_FDEQ_GAIN_9 +206 0x4848 //RX_FDEQ_GAIN_10 +207 0x4848 //RX_FDEQ_GAIN_11 +208 0x4848 //RX_FDEQ_GAIN_12 +209 0x4848 //RX_FDEQ_GAIN_13 +210 0x4848 //RX_FDEQ_GAIN_14 +211 0x4848 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0202 //RX_FDEQ_BIN_0 +221 0x0203 //RX_FDEQ_BIN_1 +222 0x0303 //RX_FDEQ_BIN_2 +223 0x0304 //RX_FDEQ_BIN_3 +224 0x0405 //RX_FDEQ_BIN_4 +225 0x0506 //RX_FDEQ_BIN_5 +226 0x0708 //RX_FDEQ_BIN_6 +227 0x090A //RX_FDEQ_BIN_7 +228 0x0B0C //RX_FDEQ_BIN_8 +229 0x0D08 //RX_FDEQ_BIN_9 +230 0x0000 //RX_FDEQ_BIN_10 +231 0x0000 //RX_FDEQ_BIN_11 +232 0x0000 //RX_FDEQ_BIN_12 +233 0x0000 //RX_FDEQ_BIN_13 +234 0x0000 //RX_FDEQ_BIN_14 +235 0x0000 //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x4000 //RX_FDEQ_RESRV_0 +245 0x0320 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0030 //RX_FDDRC_BAND_MARGIN_1 +248 0x0050 //RX_FDDRC_BAND_MARGIN_2 +249 0x0080 //RX_FDDRC_BAND_MARGIN_3 +250 0x0007 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x5000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x6400 //RX_FDDRC_THRD_3_2 +258 0x6400 //RX_FDDRC_THRD_3_3 +259 0x2000 //RX_FDDRC_SLANT_0_0 +260 0x2000 //RX_FDDRC_SLANT_0_1 +261 0x2000 //RX_FDDRC_SLANT_0_2 +262 0x2000 //RX_FDDRC_SLANT_0_3 +263 0x5333 //RX_FDDRC_SLANT_1_0 +264 0x5333 //RX_FDDRC_SLANT_1_1 +265 0x5333 //RX_FDDRC_SLANT_1_2 +266 0x5333 //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +286 0x000B //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 +#VOL 1 +163 0x3000 //RX_TDDRC_ALPHA_UP_1 +164 0x3000 //RX_TDDRC_ALPHA_UP_2 +165 0x3000 //RX_TDDRC_ALPHA_UP_3 +166 0x3000 //RX_TDDRC_ALPHA_UP_4 +184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +190 0x7FFF //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +269 0x0000 //RX_TDDRC_THRD_0 +270 0x0000 //RX_TDDRC_THRD_1 +271 0x2000 //RX_TDDRC_THRD_2 +272 0x3000 //RX_TDDRC_THRD_3 +273 0x0800 //RX_TDDRC_SLANT_0 +274 0x7EB8 //RX_TDDRC_SLANT_1 +275 0x3000 //RX_TDDRC_ALPHA_UP_0 +276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x199A //RX_TDDRC_HMNC_GAIN +279 0x0001 //RX_TDDRC_SMT_FLAG +280 0x0CCD //RX_TDDRC_SMT_W +281 0x0200 //RX_TDDRC_DRC_GAIN +195 0x0014 //RX_FDEQ_SUBNUM +196 0x4848 //RX_FDEQ_GAIN_0 +197 0x4848 //RX_FDEQ_GAIN_1 +198 0x4848 //RX_FDEQ_GAIN_2 +199 0x4848 //RX_FDEQ_GAIN_3 +200 0x4848 //RX_FDEQ_GAIN_4 +201 0x4848 //RX_FDEQ_GAIN_5 +202 0x4848 //RX_FDEQ_GAIN_6 +203 0x4848 //RX_FDEQ_GAIN_7 +204 0x4848 //RX_FDEQ_GAIN_8 +205 0x4848 //RX_FDEQ_GAIN_9 +206 0x4848 //RX_FDEQ_GAIN_10 +207 0x4848 //RX_FDEQ_GAIN_11 +208 0x4848 //RX_FDEQ_GAIN_12 +209 0x4848 //RX_FDEQ_GAIN_13 +210 0x4848 //RX_FDEQ_GAIN_14 +211 0x4848 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0202 //RX_FDEQ_BIN_0 +221 0x0203 //RX_FDEQ_BIN_1 +222 0x0303 //RX_FDEQ_BIN_2 +223 0x0304 //RX_FDEQ_BIN_3 +224 0x0405 //RX_FDEQ_BIN_4 +225 0x0506 //RX_FDEQ_BIN_5 +226 0x0708 //RX_FDEQ_BIN_6 +227 0x090A //RX_FDEQ_BIN_7 +228 0x0B0C //RX_FDEQ_BIN_8 +229 0x0D08 //RX_FDEQ_BIN_9 +230 0x0000 //RX_FDEQ_BIN_10 +231 0x0000 //RX_FDEQ_BIN_11 +232 0x0000 //RX_FDEQ_BIN_12 +233 0x0000 //RX_FDEQ_BIN_13 +234 0x0000 //RX_FDEQ_BIN_14 +235 0x0000 //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x4000 //RX_FDEQ_RESRV_0 +245 0x0320 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0030 //RX_FDDRC_BAND_MARGIN_1 +248 0x0050 //RX_FDDRC_BAND_MARGIN_2 +249 0x0080 //RX_FDDRC_BAND_MARGIN_3 +250 0x0007 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x5000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x6400 //RX_FDDRC_THRD_3_2 +258 0x6400 //RX_FDDRC_THRD_3_3 +259 0x2000 //RX_FDDRC_SLANT_0_0 +260 0x2000 //RX_FDDRC_SLANT_0_1 +261 0x2000 //RX_FDDRC_SLANT_0_2 +262 0x2000 //RX_FDDRC_SLANT_0_3 +263 0x5333 //RX_FDDRC_SLANT_1_0 +264 0x5333 //RX_FDDRC_SLANT_1_1 +265 0x5333 //RX_FDDRC_SLANT_1_2 +266 0x5333 //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +286 0x0013 //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 +#VOL 2 +163 0x3000 //RX_TDDRC_ALPHA_UP_1 +164 0x3000 //RX_TDDRC_ALPHA_UP_2 +165 0x3000 //RX_TDDRC_ALPHA_UP_3 +166 0x3000 //RX_TDDRC_ALPHA_UP_4 +184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +190 0x7FFF //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +269 0x0000 //RX_TDDRC_THRD_0 +270 0x0000 //RX_TDDRC_THRD_1 +271 0x2000 //RX_TDDRC_THRD_2 +272 0x3000 //RX_TDDRC_THRD_3 +273 0x0800 //RX_TDDRC_SLANT_0 +274 0x7EB8 //RX_TDDRC_SLANT_1 +275 0x3000 //RX_TDDRC_ALPHA_UP_0 +276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x199A //RX_TDDRC_HMNC_GAIN +279 0x0001 //RX_TDDRC_SMT_FLAG +280 0x0CCD //RX_TDDRC_SMT_W +281 0x0200 //RX_TDDRC_DRC_GAIN +195 0x0014 //RX_FDEQ_SUBNUM +196 0x4848 //RX_FDEQ_GAIN_0 +197 0x4848 //RX_FDEQ_GAIN_1 +198 0x4848 //RX_FDEQ_GAIN_2 +199 0x4848 //RX_FDEQ_GAIN_3 +200 0x4848 //RX_FDEQ_GAIN_4 +201 0x4848 //RX_FDEQ_GAIN_5 +202 0x4848 //RX_FDEQ_GAIN_6 +203 0x4848 //RX_FDEQ_GAIN_7 +204 0x4848 //RX_FDEQ_GAIN_8 +205 0x4848 //RX_FDEQ_GAIN_9 +206 0x4848 //RX_FDEQ_GAIN_10 +207 0x4848 //RX_FDEQ_GAIN_11 +208 0x4848 //RX_FDEQ_GAIN_12 +209 0x4848 //RX_FDEQ_GAIN_13 +210 0x4848 //RX_FDEQ_GAIN_14 +211 0x4848 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0202 //RX_FDEQ_BIN_0 +221 0x0203 //RX_FDEQ_BIN_1 +222 0x0303 //RX_FDEQ_BIN_2 +223 0x0304 //RX_FDEQ_BIN_3 +224 0x0405 //RX_FDEQ_BIN_4 +225 0x0506 //RX_FDEQ_BIN_5 +226 0x0708 //RX_FDEQ_BIN_6 +227 0x090A //RX_FDEQ_BIN_7 +228 0x0B0C //RX_FDEQ_BIN_8 +229 0x0D08 //RX_FDEQ_BIN_9 +230 0x0000 //RX_FDEQ_BIN_10 +231 0x0000 //RX_FDEQ_BIN_11 +232 0x0000 //RX_FDEQ_BIN_12 +233 0x0000 //RX_FDEQ_BIN_13 +234 0x0000 //RX_FDEQ_BIN_14 +235 0x0000 //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x4000 //RX_FDEQ_RESRV_0 +245 0x0320 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0030 //RX_FDDRC_BAND_MARGIN_1 +248 0x0050 //RX_FDDRC_BAND_MARGIN_2 +249 0x0080 //RX_FDDRC_BAND_MARGIN_3 +250 0x0007 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x5000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x6400 //RX_FDDRC_THRD_3_2 +258 0x6400 //RX_FDDRC_THRD_3_3 +259 0x2000 //RX_FDDRC_SLANT_0_0 +260 0x2000 //RX_FDDRC_SLANT_0_1 +261 0x2000 //RX_FDDRC_SLANT_0_2 +262 0x2000 //RX_FDDRC_SLANT_0_3 +263 0x5333 //RX_FDDRC_SLANT_1_0 +264 0x5333 //RX_FDDRC_SLANT_1_1 +265 0x5333 //RX_FDDRC_SLANT_1_2 +266 0x5333 //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +286 0x0020 //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 +#VOL 3 +163 0x3000 //RX_TDDRC_ALPHA_UP_1 +164 0x3000 //RX_TDDRC_ALPHA_UP_2 +165 0x3000 //RX_TDDRC_ALPHA_UP_3 +166 0x3000 //RX_TDDRC_ALPHA_UP_4 +184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +190 0x7FFF //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +269 0x0000 //RX_TDDRC_THRD_0 +270 0x0000 //RX_TDDRC_THRD_1 +271 0x2000 //RX_TDDRC_THRD_2 +272 0x3000 //RX_TDDRC_THRD_3 +273 0x0800 //RX_TDDRC_SLANT_0 +274 0x7EB8 //RX_TDDRC_SLANT_1 +275 0x3000 //RX_TDDRC_ALPHA_UP_0 +276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x199A //RX_TDDRC_HMNC_GAIN +279 0x0001 //RX_TDDRC_SMT_FLAG +280 0x0CCD //RX_TDDRC_SMT_W +281 0x0200 //RX_TDDRC_DRC_GAIN +195 0x0014 //RX_FDEQ_SUBNUM +196 0x4848 //RX_FDEQ_GAIN_0 +197 0x4848 //RX_FDEQ_GAIN_1 +198 0x4848 //RX_FDEQ_GAIN_2 +199 0x4848 //RX_FDEQ_GAIN_3 +200 0x4848 //RX_FDEQ_GAIN_4 +201 0x4848 //RX_FDEQ_GAIN_5 +202 0x4848 //RX_FDEQ_GAIN_6 +203 0x4848 //RX_FDEQ_GAIN_7 +204 0x4848 //RX_FDEQ_GAIN_8 +205 0x4848 //RX_FDEQ_GAIN_9 +206 0x4848 //RX_FDEQ_GAIN_10 +207 0x4848 //RX_FDEQ_GAIN_11 +208 0x4848 //RX_FDEQ_GAIN_12 +209 0x4848 //RX_FDEQ_GAIN_13 +210 0x4848 //RX_FDEQ_GAIN_14 +211 0x4848 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0202 //RX_FDEQ_BIN_0 +221 0x0203 //RX_FDEQ_BIN_1 +222 0x0303 //RX_FDEQ_BIN_2 +223 0x0304 //RX_FDEQ_BIN_3 +224 0x0405 //RX_FDEQ_BIN_4 +225 0x0506 //RX_FDEQ_BIN_5 +226 0x0708 //RX_FDEQ_BIN_6 +227 0x090A //RX_FDEQ_BIN_7 +228 0x0B0C //RX_FDEQ_BIN_8 +229 0x0D08 //RX_FDEQ_BIN_9 +230 0x0000 //RX_FDEQ_BIN_10 +231 0x0000 //RX_FDEQ_BIN_11 +232 0x0000 //RX_FDEQ_BIN_12 +233 0x0000 //RX_FDEQ_BIN_13 +234 0x0000 //RX_FDEQ_BIN_14 +235 0x0000 //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x4000 //RX_FDEQ_RESRV_0 +245 0x0320 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0030 //RX_FDDRC_BAND_MARGIN_1 +248 0x0050 //RX_FDDRC_BAND_MARGIN_2 +249 0x0080 //RX_FDDRC_BAND_MARGIN_3 +250 0x0007 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x5000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x6400 //RX_FDDRC_THRD_3_2 +258 0x6400 //RX_FDDRC_THRD_3_3 +259 0x2000 //RX_FDDRC_SLANT_0_0 +260 0x2000 //RX_FDDRC_SLANT_0_1 +261 0x2000 //RX_FDDRC_SLANT_0_2 +262 0x2000 //RX_FDDRC_SLANT_0_3 +263 0x5333 //RX_FDDRC_SLANT_1_0 +264 0x5333 //RX_FDDRC_SLANT_1_1 +265 0x5333 //RX_FDDRC_SLANT_1_2 +266 0x5333 //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +286 0x0036 //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 +#VOL 4 +163 0x3000 //RX_TDDRC_ALPHA_UP_1 +164 0x3000 //RX_TDDRC_ALPHA_UP_2 +165 0x3000 //RX_TDDRC_ALPHA_UP_3 +166 0x3000 //RX_TDDRC_ALPHA_UP_4 +184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +190 0x7FFF //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +269 0x0000 //RX_TDDRC_THRD_0 +270 0x0000 //RX_TDDRC_THRD_1 +271 0x2000 //RX_TDDRC_THRD_2 +272 0x3000 //RX_TDDRC_THRD_3 +273 0x0800 //RX_TDDRC_SLANT_0 +274 0x7EB8 //RX_TDDRC_SLANT_1 +275 0x3000 //RX_TDDRC_ALPHA_UP_0 +276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x199A //RX_TDDRC_HMNC_GAIN +279 0x0001 //RX_TDDRC_SMT_FLAG +280 0x0CCD //RX_TDDRC_SMT_W +281 0x0200 //RX_TDDRC_DRC_GAIN +195 0x0014 //RX_FDEQ_SUBNUM +196 0x4848 //RX_FDEQ_GAIN_0 +197 0x4848 //RX_FDEQ_GAIN_1 +198 0x4848 //RX_FDEQ_GAIN_2 +199 0x4848 //RX_FDEQ_GAIN_3 +200 0x4848 //RX_FDEQ_GAIN_4 +201 0x4848 //RX_FDEQ_GAIN_5 +202 0x4848 //RX_FDEQ_GAIN_6 +203 0x4848 //RX_FDEQ_GAIN_7 +204 0x4848 //RX_FDEQ_GAIN_8 +205 0x4848 //RX_FDEQ_GAIN_9 +206 0x4848 //RX_FDEQ_GAIN_10 +207 0x4848 //RX_FDEQ_GAIN_11 +208 0x4848 //RX_FDEQ_GAIN_12 +209 0x4848 //RX_FDEQ_GAIN_13 +210 0x4848 //RX_FDEQ_GAIN_14 +211 0x4848 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0202 //RX_FDEQ_BIN_0 +221 0x0203 //RX_FDEQ_BIN_1 +222 0x0303 //RX_FDEQ_BIN_2 +223 0x0304 //RX_FDEQ_BIN_3 +224 0x0405 //RX_FDEQ_BIN_4 +225 0x0506 //RX_FDEQ_BIN_5 +226 0x0708 //RX_FDEQ_BIN_6 +227 0x090A //RX_FDEQ_BIN_7 +228 0x0B0C //RX_FDEQ_BIN_8 +229 0x0D08 //RX_FDEQ_BIN_9 +230 0x0000 //RX_FDEQ_BIN_10 +231 0x0000 //RX_FDEQ_BIN_11 +232 0x0000 //RX_FDEQ_BIN_12 +233 0x0000 //RX_FDEQ_BIN_13 +234 0x0000 //RX_FDEQ_BIN_14 +235 0x0000 //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x4000 //RX_FDEQ_RESRV_0 +245 0x0320 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0030 //RX_FDDRC_BAND_MARGIN_1 +248 0x0050 //RX_FDDRC_BAND_MARGIN_2 +249 0x0080 //RX_FDDRC_BAND_MARGIN_3 +250 0x0007 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x5000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x6400 //RX_FDDRC_THRD_3_2 +258 0x6400 //RX_FDDRC_THRD_3_3 +259 0x2000 //RX_FDDRC_SLANT_0_0 +260 0x2000 //RX_FDDRC_SLANT_0_1 +261 0x2000 //RX_FDDRC_SLANT_0_2 +262 0x2000 //RX_FDDRC_SLANT_0_3 +263 0x5333 //RX_FDDRC_SLANT_1_0 +264 0x5333 //RX_FDDRC_SLANT_1_1 +265 0x5333 //RX_FDDRC_SLANT_1_2 +266 0x5333 //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +286 0x005B //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 +#VOL 5 +163 0x3000 //RX_TDDRC_ALPHA_UP_1 +164 0x3000 //RX_TDDRC_ALPHA_UP_2 +165 0x3000 //RX_TDDRC_ALPHA_UP_3 +166 0x3000 //RX_TDDRC_ALPHA_UP_4 +184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +190 0x7FFF //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +269 0x0000 //RX_TDDRC_THRD_0 +270 0x0000 //RX_TDDRC_THRD_1 +271 0x2000 //RX_TDDRC_THRD_2 +272 0x3000 //RX_TDDRC_THRD_3 +273 0x0800 //RX_TDDRC_SLANT_0 +274 0x7EB8 //RX_TDDRC_SLANT_1 +275 0x3000 //RX_TDDRC_ALPHA_UP_0 +276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x199A //RX_TDDRC_HMNC_GAIN +279 0x0001 //RX_TDDRC_SMT_FLAG +280 0x0CCD //RX_TDDRC_SMT_W +281 0x0200 //RX_TDDRC_DRC_GAIN +195 0x0014 //RX_FDEQ_SUBNUM +196 0x4848 //RX_FDEQ_GAIN_0 +197 0x4848 //RX_FDEQ_GAIN_1 +198 0x4848 //RX_FDEQ_GAIN_2 +199 0x4848 //RX_FDEQ_GAIN_3 +200 0x4848 //RX_FDEQ_GAIN_4 +201 0x4848 //RX_FDEQ_GAIN_5 +202 0x4848 //RX_FDEQ_GAIN_6 +203 0x4848 //RX_FDEQ_GAIN_7 +204 0x4848 //RX_FDEQ_GAIN_8 +205 0x4848 //RX_FDEQ_GAIN_9 +206 0x4848 //RX_FDEQ_GAIN_10 +207 0x4848 //RX_FDEQ_GAIN_11 +208 0x4848 //RX_FDEQ_GAIN_12 +209 0x4848 //RX_FDEQ_GAIN_13 +210 0x4848 //RX_FDEQ_GAIN_14 +211 0x4848 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0202 //RX_FDEQ_BIN_0 +221 0x0203 //RX_FDEQ_BIN_1 +222 0x0303 //RX_FDEQ_BIN_2 +223 0x0304 //RX_FDEQ_BIN_3 +224 0x0405 //RX_FDEQ_BIN_4 +225 0x0506 //RX_FDEQ_BIN_5 +226 0x0708 //RX_FDEQ_BIN_6 +227 0x090A //RX_FDEQ_BIN_7 +228 0x0B0C //RX_FDEQ_BIN_8 +229 0x0D08 //RX_FDEQ_BIN_9 +230 0x0000 //RX_FDEQ_BIN_10 +231 0x0000 //RX_FDEQ_BIN_11 +232 0x0000 //RX_FDEQ_BIN_12 +233 0x0000 //RX_FDEQ_BIN_13 +234 0x0000 //RX_FDEQ_BIN_14 +235 0x0000 //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x4000 //RX_FDEQ_RESRV_0 +245 0x0320 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0030 //RX_FDDRC_BAND_MARGIN_1 +248 0x0050 //RX_FDDRC_BAND_MARGIN_2 +249 0x0080 //RX_FDDRC_BAND_MARGIN_3 +250 0x0007 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x5000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x6400 //RX_FDDRC_THRD_3_2 +258 0x6400 //RX_FDDRC_THRD_3_3 +259 0x2000 //RX_FDDRC_SLANT_0_0 +260 0x2000 //RX_FDDRC_SLANT_0_1 +261 0x2000 //RX_FDDRC_SLANT_0_2 +262 0x2000 //RX_FDDRC_SLANT_0_3 +263 0x5333 //RX_FDDRC_SLANT_1_0 +264 0x5333 //RX_FDDRC_SLANT_1_1 +265 0x5333 //RX_FDDRC_SLANT_1_2 +266 0x5333 //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +286 0x0099 //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 +#VOL 6 +163 0x3000 //RX_TDDRC_ALPHA_UP_1 +164 0x3000 //RX_TDDRC_ALPHA_UP_2 +165 0x3000 //RX_TDDRC_ALPHA_UP_3 +166 0x3000 //RX_TDDRC_ALPHA_UP_4 +184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +190 0x7FFF //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +269 0x0000 //RX_TDDRC_THRD_0 +270 0x0000 //RX_TDDRC_THRD_1 +271 0x2000 //RX_TDDRC_THRD_2 +272 0x3000 //RX_TDDRC_THRD_3 +273 0x0800 //RX_TDDRC_SLANT_0 +274 0x7EB8 //RX_TDDRC_SLANT_1 +275 0x3000 //RX_TDDRC_ALPHA_UP_0 +276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x199A //RX_TDDRC_HMNC_GAIN +279 0x0001 //RX_TDDRC_SMT_FLAG +280 0x0CCD //RX_TDDRC_SMT_W +281 0x0200 //RX_TDDRC_DRC_GAIN +195 0x0014 //RX_FDEQ_SUBNUM +196 0x4848 //RX_FDEQ_GAIN_0 +197 0x4848 //RX_FDEQ_GAIN_1 +198 0x4848 //RX_FDEQ_GAIN_2 +199 0x4848 //RX_FDEQ_GAIN_3 +200 0x4848 //RX_FDEQ_GAIN_4 +201 0x4848 //RX_FDEQ_GAIN_5 +202 0x4848 //RX_FDEQ_GAIN_6 +203 0x4848 //RX_FDEQ_GAIN_7 +204 0x4848 //RX_FDEQ_GAIN_8 +205 0x4848 //RX_FDEQ_GAIN_9 +206 0x4848 //RX_FDEQ_GAIN_10 +207 0x4848 //RX_FDEQ_GAIN_11 +208 0x4848 //RX_FDEQ_GAIN_12 +209 0x4848 //RX_FDEQ_GAIN_13 +210 0x4848 //RX_FDEQ_GAIN_14 +211 0x4848 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0202 //RX_FDEQ_BIN_0 +221 0x0203 //RX_FDEQ_BIN_1 +222 0x0303 //RX_FDEQ_BIN_2 +223 0x0304 //RX_FDEQ_BIN_3 +224 0x0405 //RX_FDEQ_BIN_4 +225 0x0506 //RX_FDEQ_BIN_5 +226 0x0708 //RX_FDEQ_BIN_6 +227 0x090A //RX_FDEQ_BIN_7 +228 0x0B0C //RX_FDEQ_BIN_8 +229 0x0D08 //RX_FDEQ_BIN_9 +230 0x0000 //RX_FDEQ_BIN_10 +231 0x0000 //RX_FDEQ_BIN_11 +232 0x0000 //RX_FDEQ_BIN_12 +233 0x0000 //RX_FDEQ_BIN_13 +234 0x0000 //RX_FDEQ_BIN_14 +235 0x0000 //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x4000 //RX_FDEQ_RESRV_0 +245 0x0320 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0030 //RX_FDDRC_BAND_MARGIN_1 +248 0x0050 //RX_FDDRC_BAND_MARGIN_2 +249 0x0080 //RX_FDDRC_BAND_MARGIN_3 +250 0x0007 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x5000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x6400 //RX_FDDRC_THRD_3_2 +258 0x6400 //RX_FDDRC_THRD_3_3 +259 0x2000 //RX_FDDRC_SLANT_0_0 +260 0x2000 //RX_FDDRC_SLANT_0_1 +261 0x2000 //RX_FDDRC_SLANT_0_2 +262 0x2000 //RX_FDDRC_SLANT_0_3 +263 0x5333 //RX_FDDRC_SLANT_1_0 +264 0x5333 //RX_FDDRC_SLANT_1_1 +265 0x5333 //RX_FDDRC_SLANT_1_2 +266 0x5333 //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +286 0x0100 //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 #CASE_NAME HEADSET-GOOGLE_CONDOR-VOICE_GENERIC-WB -#PARAM_MODE FULL -#PARAM_TYPE TX+RX -#TOTAL_CUSTOM_STEP 7 +#PARAM_MODE Full +#PARAM_TYPE TX+2RX +#TOTAL_CUSTOM_STEP 7+7 #TX 0 0x0009 //TX_OPERATION_MODE_0 1 0x0008 //TX_OPERATION_MODE_1 @@ -9020,7 +13600,7 @@ 239 0x0800 //TX_DT_RESRV_7 240 0x0800 //TX_DT_RESRV_8 241 0x0000 //TX_DT_RESRV_9 -242 0xF400 //TX_THR_SN_EST_0 +242 0xFA00 //TX_THR_SN_EST_0 243 0xF400 //TX_THR_SN_EST_1 244 0xF600 //TX_THR_SN_EST_2 245 0xF400 //TX_THR_SN_EST_3 @@ -9029,20 +13609,20 @@ 248 0xF400 //TX_THR_SN_EST_6 249 0xF600 //TX_THR_SN_EST_7 250 0x0000 //TX_DELTA_THR_SN_EST_0 -251 0x0000 //TX_DELTA_THR_SN_EST_1 +251 0x0200 //TX_DELTA_THR_SN_EST_1 252 0x0200 //TX_DELTA_THR_SN_EST_2 253 0x0200 //TX_DELTA_THR_SN_EST_3 254 0x0200 //TX_DELTA_THR_SN_EST_4 255 0x0200 //TX_DELTA_THR_SN_EST_5 -256 0x0200 //TX_DELTA_THR_SN_EST_6 +256 0x0000 //TX_DELTA_THR_SN_EST_6 257 0x0200 //TX_DELTA_THR_SN_EST_7 258 0x6000 //TX_LAMBDA_NN_EST_0 -259 0x6000 //TX_LAMBDA_NN_EST_1 +259 0x4000 //TX_LAMBDA_NN_EST_1 260 0x4000 //TX_LAMBDA_NN_EST_2 261 0x4000 //TX_LAMBDA_NN_EST_3 262 0x4000 //TX_LAMBDA_NN_EST_4 263 0x4000 //TX_LAMBDA_NN_EST_5 -264 0x4000 //TX_LAMBDA_NN_EST_6 +264 0x6000 //TX_LAMBDA_NN_EST_6 265 0x4000 //TX_LAMBDA_NN_EST_7 266 0x0400 //TX_N_SN_EST 267 0x001E //TX_INBEAM_T @@ -9060,16 +13640,16 @@ 279 0x1000 //TX_B_POST_FLT_0 280 0x1000 //TX_B_POST_FLT_1 281 0x000F //TX_NS_LVL_CTRL_0 -282 0x000F //TX_NS_LVL_CTRL_1 -283 0x0011 //TX_NS_LVL_CTRL_2 +282 0x0011 //TX_NS_LVL_CTRL_1 +283 0x000F //TX_NS_LVL_CTRL_2 284 0x000F //TX_NS_LVL_CTRL_3 285 0x000F //TX_NS_LVL_CTRL_4 286 0x000F //TX_NS_LVL_CTRL_5 287 0x000F //TX_NS_LVL_CTRL_6 288 0x0011 //TX_NS_LVL_CTRL_7 289 0x000C //TX_MIN_GAIN_S_0 -290 0x000C //TX_MIN_GAIN_S_1 -291 0x000F //TX_MIN_GAIN_S_2 +290 0x000F //TX_MIN_GAIN_S_1 +291 0x000C //TX_MIN_GAIN_S_2 292 0x000C //TX_MIN_GAIN_S_3 293 0x000C //TX_MIN_GAIN_S_4 294 0x000C //TX_MIN_GAIN_S_5 @@ -9093,12 +13673,12 @@ 312 0x7FFF //TX_A_POST_FILT_0 313 0x2000 //TX_A_POST_FILT_1 314 0x4000 //TX_A_POST_FILT_S_0 -315 0x4000 //TX_A_POST_FILT_S_1 +315 0x5000 //TX_A_POST_FILT_S_1 316 0x5000 //TX_A_POST_FILT_S_2 317 0x5000 //TX_A_POST_FILT_S_3 318 0x5000 //TX_A_POST_FILT_S_4 319 0x5000 //TX_A_POST_FILT_S_5 -320 0x5000 //TX_A_POST_FILT_S_6 +320 0x4000 //TX_A_POST_FILT_S_6 321 0x5000 //TX_A_POST_FILT_S_7 322 0x1000 //TX_B_POST_FILT_0 323 0x1000 //TX_B_POST_FILT_1 @@ -9145,7 +13725,7 @@ 364 0x0000 //TX_K_APT 365 0x0001 //TX_NOISEDET 366 0x0190 //TX_NDETCT -367 0x0050 //TX_NOISE_TH_0 +367 0x0102 //TX_NOISE_TH_0 368 0x7FFF //TX_NOISE_TH_0_2 369 0x7FFF //TX_NOISE_TH_0_3 370 0x07D0 //TX_NOISE_TH_1 @@ -9157,11 +13737,11 @@ 376 0x7FFF //TX_NOISE_TH_5_3 377 0x7FFF //TX_NOISE_TH_5_4 378 0x044C //TX_NOISE_TH_6 -379 0x0014 //TX_MINENOISE_TH -380 0x4000 //TX_MINENOISE_MIC0_TH_MTS -381 0xFFEE //TX_MINENOISE_MIC0_TH_EXP -382 0x6000 //TX_MINENOISE_MIC0_S_TH_MTS -383 0xFFF3 //TX_MINENOISE_MIC0_S_TH_EXP +379 0x00F8 //TX_MINENOISE_TH +380 0xD508 //TX_MORENS_TFMASK_TH +381 0x0001 //TX_DRC_QUIET_FLOOR +382 0x3A98 //TX_RATIODTL_CUT_TH +383 0x0DAC //TX_DT_CUT_K1 384 0x0666 //TX_OUT_ENER_S_TH_CLEAN 385 0x0666 //TX_OUT_ENER_S_TH_LESSCLEAN 386 0x0333 //TX_OUT_ENER_S_TH_NOISY @@ -9169,22 +13749,22 @@ 388 0x0333 //TX_OUT_ENER_TH_SPEECH 389 0x2000 //TX_SN_NPB_GAIN 390 0x0000 //TX_NN_NPB_GAIN -391 0x0000 //TX_CSX_ALPHA_0 -392 0x0000 //TX_CSX_ALPHA_1 -393 0x0000 //TX_CSX_ALPHA_2 -394 0x0000 //TX_CSX_ALPHA_3 -395 0x0800 //TX_MU_ARSP_EST -396 0x00C8 //TX_P_OUTBEAM_MIN_TH +391 0x7FFF //TX_POST_MASK_SUP_HSNE +392 0x1388 //TX_TAIL_DET_TH +393 0x4000 //TX_B_LESSCUT_RTO_WTA +394 0x0000 //TX_MEL_G_R +395 0x0080 //TX_SUPHIGH_TH +396 0x0000 //TX_MASK_G_R 397 0x0002 //TX_EXTRA_NS_L -398 0x0800 //TX_EXTRA_NS_A -399 0x0005 //TX_VR_NOISE_FLOOR_TH +398 0x1800 //TX_C_POST_FLT_MASK +399 0x7FFF //TX_A_POST_FLT_WNS 400 0x0148 //TX_MIN_G_LOW300HZ 401 0x0002 //TX_MAXLEVEL_CNG 402 0x00B4 //TX_STN_NOISE_TH 403 0x4000 //TX_POST_MASK_SUP 404 0x7FFF //TX_POST_MASK_ADJUST 405 0x00C8 //TX_NS_ENOISE_MIC0_TH -406 0x0014 //TX_MINENOISE_MIC0_TH +406 0x00DC //TX_MINENOISE_MIC0_TH 407 0x012C //TX_MINENOISE_MIC0_S_TH 408 0x7FFF //TX_MIN_G_CTRL_SSNS 409 0x0000 //TX_METAL_RTO_THR @@ -9292,16 +13872,16 @@ 511 0x6666 //TX_MIC_TO_BFGAIN 512 0x0000 //TX_MICTOBFGAIN0 513 0x0000 //TX_FASTMUE_TH -514 0x0000 //TX_DERVB_LEN_0 -515 0x0000 //TX_DERVB_LEN_1 -516 0x0000 //TX_RHO_DERVB -517 0x0000 //TX_MIC_INDX_DERVB -518 0x0000 //TX_MU_DERVB -519 0x0000 //TX_DR_RESRV_0 -520 0x0000 //TX_DR_RESRV_1 -521 0x0000 //TX_DR_RESRV_2 -522 0x0000 //TX_DR_RESRV_3 -523 0x0000 //TX_DR_RESRV_4 +514 0xC000 //TX_DEREVERB_LF_MU +515 0xC000 //TX_DEREVERB_HF_MU +516 0xCCCC //TX_DEREVERB_DELAY +517 0xD999 //TX_DEREVERB_COEF_LEN +518 0x1F40 //TX_DEREVERB_DNR +519 0x0000 //TX_DEREVERB_ALPHA +520 0x0000 //TX_DEREVERB_BETA +521 0x0000 //TX_GSC_RTOL_TH +522 0x7000 //TX_GSC_RTOH_TH +523 0x0064 //TX_WIDE2_MEANHTH 524 0x0000 //TX_DR_RESRV_5 525 0x0000 //TX_DR_RESRV_6 526 0x0000 //TX_DR_RESRV_7 @@ -9669,14 +14249,79 @@ 888 0x00C8 //TX_FASTNS_ARSPC_TH 889 0xC000 //TX_FASTNS_MASK5_TH 890 0x4848 //TX_POSTSSA_MIN_G_VR_MASK -891 0x7FFF //TX_A_LESSCUT_RTO_MASK +891 0x4000 //TX_A_LESSCUT_RTO_MASK 892 0x1770 //TX_FASTNS_NOISETH 893 0xC000 //TX_FASTNS_SSA_THLFL 894 0xC000 //TX_FASTNS_SSA_THHFL 895 0xCCCC //TX_FASTNS_SSA_THLFH 896 0xD999 //TX_FASTNS_SSA_THHFH +897 0x2339 //TX_SENDFUNC_REG_MICMUTE +898 0x0021 //TX_SENDFUNC_REG_MICMUTE1 +899 0x02BC //TX_MICMUTE_RATIO_THR +900 0x0140 //TX_MICMUTE_AMP_THR +901 0x0004 //TX_MICMUTE_HPF_IND +902 0x00C0 //TX_MICMUTE_LOG_EYR_TH +903 0x0008 //TX_MICMUTE_CVG_TIME +904 0x0008 //TX_MICMUTE_RELEASE_TIME +905 0x01FE //TX_MIC_VOLUME_MIC0MUTE +906 0x0020 //TX_MICMUTE_EPD_OFFSET_0 +907 0x001E //TX_MICMUTE_FRQ_AEC_L +908 0x7999 //TX_MICMUTE_EAD_THR +909 0x7FFF //TX_MICMUTE_LAMBDA_CB_NLE +910 0x7FFF //TX_MICMUTE_LAMBDA_RE_EST +911 0x4000 //TX_DTD_THR1_MICMUTE_0 +912 0x7000 //TX_DTD_THR1_MICMUTE_1 +913 0x7FFF //TX_DTD_THR1_MICMUTE_2 +914 0x7FFF //TX_DTD_THR1_MICMUTE_3 +915 0x6CCC //TX_DTD_THR2_MICMUTE_0 +916 0x0400 //TX_MICMUTE_MIN_EQ_RE_EST_0 +917 0x0400 //TX_MICMUTE_MIN_EQ_RE_EST_1 +918 0x1000 //TX_MICMUTE_MIN_EQ_RE_EST_2 +919 0x7FFF //TX_MICMUTE_MIN_EQ_RE_EST_3 +920 0x7FFF //TX_MICMUTE_MIN_EQ_RE_EST_4 +921 0x4000 //TX_MICMUTE_C_POST_FLT +922 0x03E8 //TX_MICMUTE_DT_CUT_K +923 0x0001 //TX_MICMUTE_DT_CUT_THR +924 0x03E8 //TX_MICMUTE_DT_CUT_K2 +925 0x0001 //TX_MICMUTE_DT_CUT_THR2 +926 0x0064 //TX_MICMUTE_DT2_HOLD_N +927 0x1000 //TX_MICMUTE_RATIODTH_THCUT +928 0x1000 //TX_MICMUTE_B_POST_FLT_ECHOL +929 0x7FFF //TX_MICMUTE_B_POST_FLT_ECHOH +930 0x0400 //TX_MICMUTE_C_POST_FLT_MASK +931 0x7999 //TX_MICMUTE_RATIODTL_CUT_TH +932 0x0258 //TX_MICMUTE_DT_CUT_K1 +933 0x0800 //TX_MICMUTE_N2_SN_EST +934 0xFC00 //TX_MICMUTE_THR_SN_EST_0 +935 0x001C //TX_MICMUTE_MIN_G_CTRL_0 +936 0x6000 //TX_MICMUTE_A_POST_FILT_S_0 +937 0x7000 //TX_MICMUTE_B_POST_FILT_0 +938 0x2710 //TX_MIC1RUB_AMP_THR +939 0x0010 //TX_MIC1MUTE_RATIO_THR +940 0x0450 //TX_MIC1MUTE_AMP_THR +941 0x0008 //TX_MIC1MUTE_CVG_TIME +942 0x0008 //TX_MIC1MUTE_RELEASE_TIME +943 0x0000 //TX_AMS_RESRV_01 +944 0x0000 //TX_AMS_RESRV_02 +945 0x0000 //TX_AMS_RESRV_03 +946 0x0000 //TX_AMS_RESRV_04 +947 0x0000 //TX_AMS_RESRV_05 +948 0x0000 //TX_AMS_RESRV_06 +949 0x0000 //TX_AMS_RESRV_07 +950 0x0000 //TX_AMS_RESRV_08 +951 0x0000 //TX_AMS_RESRV_09 +952 0x0000 //TX_AMS_RESRV_10 +953 0x0000 //TX_AMS_RESRV_11 +954 0x0000 //TX_AMS_RESRV_12 +955 0x0000 //TX_AMS_RESRV_13 +956 0x0000 //TX_AMS_RESRV_14 +957 0x0000 //TX_AMS_RESRV_15 +958 0x0000 //TX_AMS_RESRV_16 +959 0x0000 //TX_AMS_RESRV_17 +960 0x0000 //TX_AMS_RESRV_18 +961 0x0000 //TX_AMS_RESRV_19 #RX -0 0x002C //RX_RECVFUNC_MODE_0 +0 0x202C //RX_RECVFUNC_MODE_0 1 0x0000 //RX_RECVFUNC_MODE_1 2 0x0001 //RX_SAMPLINGFREQ_SIG 3 0x0001 //RX_SAMPLINGFREQ_PROC @@ -10526,11 +15171,862 @@ 110 0x0000 //RX_FDDRC_RESRV_0 129 0x0100 //RX_SPK_VOL 130 0x0000 //RX_VOL_RESRV_0 +#RX 2 +157 0x202C //RX_RECVFUNC_MODE_0 +158 0x0000 //RX_RECVFUNC_MODE_1 +159 0x0001 //RX_SAMPLINGFREQ_SIG +160 0x0001 //RX_SAMPLINGFREQ_PROC +161 0x000A //RX_FRAME_SZ +162 0x0000 //RX_DELAY_OPT +163 0x3000 //RX_TDDRC_ALPHA_UP_1 +164 0x3000 //RX_TDDRC_ALPHA_UP_2 +165 0x3000 //RX_TDDRC_ALPHA_UP_3 +166 0x3000 //RX_TDDRC_ALPHA_UP_4 +167 0x0800 //RX_PGA +168 0x7FFF //RX_A_HP +169 0x4000 //RX_B_PE +170 0x3800 //RX_THR_PITCH_DET_0 +171 0x3000 //RX_THR_PITCH_DET_1 +172 0x2800 //RX_THR_PITCH_DET_2 +173 0x0008 //RX_PITCH_BFR_LEN +174 0x0003 //RX_SBD_PITCH_DET +175 0x0100 //RX_PP_RESRV_0 +176 0x0020 //RX_PP_RESRV_1 +177 0x0600 //RX_N_SN_EST +178 0x000C //RX_N2_SN_EST +179 0x0010 //RX_NS_LVL_CTRL +180 0xF800 //RX_THR_SN_EST +181 0x7CCD //RX_LAMBDA_PFILT +182 0x000A //RX_FENS_RESRV_0 +183 0x0190 //RX_FENS_RESRV_1 +184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +187 0x0002 //RX_EXTRA_NS_L +188 0x0800 //RX_EXTRA_NS_A +189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +190 0x7FFF //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +192 0x199A //RX_A_POST_FLT +193 0x0000 //RX_LMT_THRD +194 0x4000 //RX_LMT_ALPHA +195 0x001C //RX_FDEQ_SUBNUM +196 0x4848 //RX_FDEQ_GAIN_0 +197 0x4848 //RX_FDEQ_GAIN_1 +198 0x4848 //RX_FDEQ_GAIN_2 +199 0x4848 //RX_FDEQ_GAIN_3 +200 0x4848 //RX_FDEQ_GAIN_4 +201 0x4848 //RX_FDEQ_GAIN_5 +202 0x4848 //RX_FDEQ_GAIN_6 +203 0x4848 //RX_FDEQ_GAIN_7 +204 0x4848 //RX_FDEQ_GAIN_8 +205 0x4848 //RX_FDEQ_GAIN_9 +206 0x4848 //RX_FDEQ_GAIN_10 +207 0x4848 //RX_FDEQ_GAIN_11 +208 0x4848 //RX_FDEQ_GAIN_12 +209 0x4848 //RX_FDEQ_GAIN_13 +210 0x4848 //RX_FDEQ_GAIN_14 +211 0x4848 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0202 //RX_FDEQ_BIN_0 +221 0x0203 //RX_FDEQ_BIN_1 +222 0x0303 //RX_FDEQ_BIN_2 +223 0x0304 //RX_FDEQ_BIN_3 +224 0x0405 //RX_FDEQ_BIN_4 +225 0x0506 //RX_FDEQ_BIN_5 +226 0x0708 //RX_FDEQ_BIN_6 +227 0x090A //RX_FDEQ_BIN_7 +228 0x0B0C //RX_FDEQ_BIN_8 +229 0x0D0E //RX_FDEQ_BIN_9 +230 0x0E0F //RX_FDEQ_BIN_10 +231 0x0F10 //RX_FDEQ_BIN_11 +232 0x1011 //RX_FDEQ_BIN_12 +233 0x1104 //RX_FDEQ_BIN_13 +234 0x0000 //RX_FDEQ_BIN_14 +235 0x0000 //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x4000 //RX_FDEQ_RESRV_0 +245 0x0320 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0030 //RX_FDDRC_BAND_MARGIN_1 +248 0x0050 //RX_FDDRC_BAND_MARGIN_2 +249 0x0080 //RX_FDDRC_BAND_MARGIN_3 +250 0x0007 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x5000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x6400 //RX_FDDRC_THRD_3_2 +258 0x6400 //RX_FDDRC_THRD_3_3 +259 0x2000 //RX_FDDRC_SLANT_0_0 +260 0x2000 //RX_FDDRC_SLANT_0_1 +261 0x2000 //RX_FDDRC_SLANT_0_2 +262 0x2000 //RX_FDDRC_SLANT_0_3 +263 0x5333 //RX_FDDRC_SLANT_1_0 +264 0x5333 //RX_FDDRC_SLANT_1_1 +265 0x5333 //RX_FDDRC_SLANT_1_2 +266 0x5333 //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +268 0x0002 //RX_FILTINDX +269 0x0000 //RX_TDDRC_THRD_0 +270 0x0000 //RX_TDDRC_THRD_1 +271 0x2000 //RX_TDDRC_THRD_2 +272 0x3000 //RX_TDDRC_THRD_3 +273 0x0800 //RX_TDDRC_SLANT_0 +274 0x7EB8 //RX_TDDRC_SLANT_1 +275 0x3000 //RX_TDDRC_ALPHA_UP_0 +276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x199A //RX_TDDRC_HMNC_GAIN +279 0x0001 //RX_TDDRC_SMT_FLAG +280 0x0CCD //RX_TDDRC_SMT_W +281 0x0196 //RX_TDDRC_DRC_GAIN +282 0x7C00 //RX_LAMBDA_PKA_FP +283 0x2000 //RX_TPKA_FP +284 0x2000 //RX_MIN_G_FP +285 0x0080 //RX_MAX_G_FP +286 0x000B //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 +288 0x0000 //RX_MAXLEVEL_CNG +289 0x3000 //RX_BWE_UV_TH +290 0x3000 //RX_BWE_UV_TH2 +291 0x1800 //RX_BWE_UV_TH3 +292 0x1000 //RX_BWE_V_TH +293 0x04CD //RX_BWE_GAIN1_V_TH1 +294 0x0F33 //RX_BWE_GAIN1_V_TH2 +295 0x7333 //RX_BWE_UV_EQ +296 0x199A //RX_BWE_V_EQ +297 0x7333 //RX_BWE_TONE_TH +298 0x0004 //RX_BWE_UV_HOLD_T +299 0x6CCD //RX_BWE_GAIN2_ALPHA +300 0x799A //RX_BWE_GAIN3_ALPHA +301 0x001E //RX_BWE_CUTOFF +302 0x3000 //RX_BWE_GAINFILL +303 0x3200 //RX_BWE_MAXTH_TONE +304 0x2000 //RX_BWE_EQ_0 +305 0x2000 //RX_BWE_EQ_1 +306 0x2000 //RX_BWE_EQ_2 +307 0x2000 //RX_BWE_EQ_3 +308 0x2000 //RX_BWE_EQ_4 +309 0x2000 //RX_BWE_EQ_5 +310 0x2000 //RX_BWE_EQ_6 +311 0x0000 //RX_BWE_RESRV_0 +312 0x0000 //RX_BWE_RESRV_1 +313 0x0000 //RX_BWE_RESRV_2 +#VOL 0 +163 0x3000 //RX_TDDRC_ALPHA_UP_1 +164 0x3000 //RX_TDDRC_ALPHA_UP_2 +165 0x3000 //RX_TDDRC_ALPHA_UP_3 +166 0x3000 //RX_TDDRC_ALPHA_UP_4 +184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +190 0x7FFF //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +269 0x0000 //RX_TDDRC_THRD_0 +270 0x0000 //RX_TDDRC_THRD_1 +271 0x2000 //RX_TDDRC_THRD_2 +272 0x3000 //RX_TDDRC_THRD_3 +273 0x0800 //RX_TDDRC_SLANT_0 +274 0x7EB8 //RX_TDDRC_SLANT_1 +275 0x3000 //RX_TDDRC_ALPHA_UP_0 +276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x199A //RX_TDDRC_HMNC_GAIN +279 0x0001 //RX_TDDRC_SMT_FLAG +280 0x0CCD //RX_TDDRC_SMT_W +281 0x0196 //RX_TDDRC_DRC_GAIN +195 0x001C //RX_FDEQ_SUBNUM +196 0x4848 //RX_FDEQ_GAIN_0 +197 0x4848 //RX_FDEQ_GAIN_1 +198 0x4848 //RX_FDEQ_GAIN_2 +199 0x4848 //RX_FDEQ_GAIN_3 +200 0x4848 //RX_FDEQ_GAIN_4 +201 0x4848 //RX_FDEQ_GAIN_5 +202 0x4848 //RX_FDEQ_GAIN_6 +203 0x4848 //RX_FDEQ_GAIN_7 +204 0x4848 //RX_FDEQ_GAIN_8 +205 0x4848 //RX_FDEQ_GAIN_9 +206 0x4848 //RX_FDEQ_GAIN_10 +207 0x4848 //RX_FDEQ_GAIN_11 +208 0x4848 //RX_FDEQ_GAIN_12 +209 0x4848 //RX_FDEQ_GAIN_13 +210 0x4848 //RX_FDEQ_GAIN_14 +211 0x4848 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0202 //RX_FDEQ_BIN_0 +221 0x0203 //RX_FDEQ_BIN_1 +222 0x0303 //RX_FDEQ_BIN_2 +223 0x0304 //RX_FDEQ_BIN_3 +224 0x0405 //RX_FDEQ_BIN_4 +225 0x0506 //RX_FDEQ_BIN_5 +226 0x0708 //RX_FDEQ_BIN_6 +227 0x090A //RX_FDEQ_BIN_7 +228 0x0B0C //RX_FDEQ_BIN_8 +229 0x0D0E //RX_FDEQ_BIN_9 +230 0x0E0F //RX_FDEQ_BIN_10 +231 0x0F10 //RX_FDEQ_BIN_11 +232 0x1011 //RX_FDEQ_BIN_12 +233 0x1104 //RX_FDEQ_BIN_13 +234 0x0000 //RX_FDEQ_BIN_14 +235 0x0000 //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x4000 //RX_FDEQ_RESRV_0 +245 0x0320 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0030 //RX_FDDRC_BAND_MARGIN_1 +248 0x0050 //RX_FDDRC_BAND_MARGIN_2 +249 0x0080 //RX_FDDRC_BAND_MARGIN_3 +250 0x0007 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x5000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x6400 //RX_FDDRC_THRD_3_2 +258 0x6400 //RX_FDDRC_THRD_3_3 +259 0x2000 //RX_FDDRC_SLANT_0_0 +260 0x2000 //RX_FDDRC_SLANT_0_1 +261 0x2000 //RX_FDDRC_SLANT_0_2 +262 0x2000 //RX_FDDRC_SLANT_0_3 +263 0x5333 //RX_FDDRC_SLANT_1_0 +264 0x5333 //RX_FDDRC_SLANT_1_1 +265 0x5333 //RX_FDDRC_SLANT_1_2 +266 0x5333 //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +286 0x000B //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 +#VOL 1 +163 0x3000 //RX_TDDRC_ALPHA_UP_1 +164 0x3000 //RX_TDDRC_ALPHA_UP_2 +165 0x3000 //RX_TDDRC_ALPHA_UP_3 +166 0x3000 //RX_TDDRC_ALPHA_UP_4 +184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +190 0x7FFF //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +269 0x0000 //RX_TDDRC_THRD_0 +270 0x0000 //RX_TDDRC_THRD_1 +271 0x2000 //RX_TDDRC_THRD_2 +272 0x3000 //RX_TDDRC_THRD_3 +273 0x0800 //RX_TDDRC_SLANT_0 +274 0x7EB8 //RX_TDDRC_SLANT_1 +275 0x3000 //RX_TDDRC_ALPHA_UP_0 +276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x199A //RX_TDDRC_HMNC_GAIN +279 0x0001 //RX_TDDRC_SMT_FLAG +280 0x0CCD //RX_TDDRC_SMT_W +281 0x0196 //RX_TDDRC_DRC_GAIN +195 0x001C //RX_FDEQ_SUBNUM +196 0x4848 //RX_FDEQ_GAIN_0 +197 0x4848 //RX_FDEQ_GAIN_1 +198 0x4848 //RX_FDEQ_GAIN_2 +199 0x4848 //RX_FDEQ_GAIN_3 +200 0x4848 //RX_FDEQ_GAIN_4 +201 0x4848 //RX_FDEQ_GAIN_5 +202 0x4848 //RX_FDEQ_GAIN_6 +203 0x4848 //RX_FDEQ_GAIN_7 +204 0x4848 //RX_FDEQ_GAIN_8 +205 0x4848 //RX_FDEQ_GAIN_9 +206 0x4848 //RX_FDEQ_GAIN_10 +207 0x4848 //RX_FDEQ_GAIN_11 +208 0x4848 //RX_FDEQ_GAIN_12 +209 0x4848 //RX_FDEQ_GAIN_13 +210 0x4848 //RX_FDEQ_GAIN_14 +211 0x4848 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0202 //RX_FDEQ_BIN_0 +221 0x0203 //RX_FDEQ_BIN_1 +222 0x0303 //RX_FDEQ_BIN_2 +223 0x0304 //RX_FDEQ_BIN_3 +224 0x0405 //RX_FDEQ_BIN_4 +225 0x0506 //RX_FDEQ_BIN_5 +226 0x0708 //RX_FDEQ_BIN_6 +227 0x090A //RX_FDEQ_BIN_7 +228 0x0B0C //RX_FDEQ_BIN_8 +229 0x0D0E //RX_FDEQ_BIN_9 +230 0x0E0F //RX_FDEQ_BIN_10 +231 0x0F10 //RX_FDEQ_BIN_11 +232 0x1011 //RX_FDEQ_BIN_12 +233 0x1104 //RX_FDEQ_BIN_13 +234 0x0000 //RX_FDEQ_BIN_14 +235 0x0000 //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x4000 //RX_FDEQ_RESRV_0 +245 0x0320 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0030 //RX_FDDRC_BAND_MARGIN_1 +248 0x0050 //RX_FDDRC_BAND_MARGIN_2 +249 0x0080 //RX_FDDRC_BAND_MARGIN_3 +250 0x0007 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x5000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x6400 //RX_FDDRC_THRD_3_2 +258 0x6400 //RX_FDDRC_THRD_3_3 +259 0x2000 //RX_FDDRC_SLANT_0_0 +260 0x2000 //RX_FDDRC_SLANT_0_1 +261 0x2000 //RX_FDDRC_SLANT_0_2 +262 0x2000 //RX_FDDRC_SLANT_0_3 +263 0x5333 //RX_FDDRC_SLANT_1_0 +264 0x5333 //RX_FDDRC_SLANT_1_1 +265 0x5333 //RX_FDDRC_SLANT_1_2 +266 0x5333 //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +286 0x0013 //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 +#VOL 2 +163 0x3000 //RX_TDDRC_ALPHA_UP_1 +164 0x3000 //RX_TDDRC_ALPHA_UP_2 +165 0x3000 //RX_TDDRC_ALPHA_UP_3 +166 0x3000 //RX_TDDRC_ALPHA_UP_4 +184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +190 0x7FFF //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +269 0x0000 //RX_TDDRC_THRD_0 +270 0x0000 //RX_TDDRC_THRD_1 +271 0x2000 //RX_TDDRC_THRD_2 +272 0x3000 //RX_TDDRC_THRD_3 +273 0x0800 //RX_TDDRC_SLANT_0 +274 0x7EB8 //RX_TDDRC_SLANT_1 +275 0x3000 //RX_TDDRC_ALPHA_UP_0 +276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x199A //RX_TDDRC_HMNC_GAIN +279 0x0001 //RX_TDDRC_SMT_FLAG +280 0x0CCD //RX_TDDRC_SMT_W +281 0x0196 //RX_TDDRC_DRC_GAIN +195 0x001C //RX_FDEQ_SUBNUM +196 0x4848 //RX_FDEQ_GAIN_0 +197 0x4848 //RX_FDEQ_GAIN_1 +198 0x4848 //RX_FDEQ_GAIN_2 +199 0x4848 //RX_FDEQ_GAIN_3 +200 0x4848 //RX_FDEQ_GAIN_4 +201 0x4848 //RX_FDEQ_GAIN_5 +202 0x4848 //RX_FDEQ_GAIN_6 +203 0x4848 //RX_FDEQ_GAIN_7 +204 0x4848 //RX_FDEQ_GAIN_8 +205 0x4848 //RX_FDEQ_GAIN_9 +206 0x4848 //RX_FDEQ_GAIN_10 +207 0x4848 //RX_FDEQ_GAIN_11 +208 0x4848 //RX_FDEQ_GAIN_12 +209 0x4848 //RX_FDEQ_GAIN_13 +210 0x4848 //RX_FDEQ_GAIN_14 +211 0x4848 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0202 //RX_FDEQ_BIN_0 +221 0x0203 //RX_FDEQ_BIN_1 +222 0x0303 //RX_FDEQ_BIN_2 +223 0x0304 //RX_FDEQ_BIN_3 +224 0x0405 //RX_FDEQ_BIN_4 +225 0x0506 //RX_FDEQ_BIN_5 +226 0x0708 //RX_FDEQ_BIN_6 +227 0x090A //RX_FDEQ_BIN_7 +228 0x0B0C //RX_FDEQ_BIN_8 +229 0x0D0E //RX_FDEQ_BIN_9 +230 0x0E0F //RX_FDEQ_BIN_10 +231 0x0F10 //RX_FDEQ_BIN_11 +232 0x1011 //RX_FDEQ_BIN_12 +233 0x1104 //RX_FDEQ_BIN_13 +234 0x0000 //RX_FDEQ_BIN_14 +235 0x0000 //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x4000 //RX_FDEQ_RESRV_0 +245 0x0320 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0030 //RX_FDDRC_BAND_MARGIN_1 +248 0x0050 //RX_FDDRC_BAND_MARGIN_2 +249 0x0080 //RX_FDDRC_BAND_MARGIN_3 +250 0x0007 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x5000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x6400 //RX_FDDRC_THRD_3_2 +258 0x6400 //RX_FDDRC_THRD_3_3 +259 0x2000 //RX_FDDRC_SLANT_0_0 +260 0x2000 //RX_FDDRC_SLANT_0_1 +261 0x2000 //RX_FDDRC_SLANT_0_2 +262 0x2000 //RX_FDDRC_SLANT_0_3 +263 0x5333 //RX_FDDRC_SLANT_1_0 +264 0x5333 //RX_FDDRC_SLANT_1_1 +265 0x5333 //RX_FDDRC_SLANT_1_2 +266 0x5333 //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +286 0x0020 //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 +#VOL 3 +163 0x3000 //RX_TDDRC_ALPHA_UP_1 +164 0x3000 //RX_TDDRC_ALPHA_UP_2 +165 0x3000 //RX_TDDRC_ALPHA_UP_3 +166 0x3000 //RX_TDDRC_ALPHA_UP_4 +184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +190 0x7FFF //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +269 0x0000 //RX_TDDRC_THRD_0 +270 0x0000 //RX_TDDRC_THRD_1 +271 0x2000 //RX_TDDRC_THRD_2 +272 0x3000 //RX_TDDRC_THRD_3 +273 0x0800 //RX_TDDRC_SLANT_0 +274 0x7EB8 //RX_TDDRC_SLANT_1 +275 0x3000 //RX_TDDRC_ALPHA_UP_0 +276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x199A //RX_TDDRC_HMNC_GAIN +279 0x0001 //RX_TDDRC_SMT_FLAG +280 0x0CCD //RX_TDDRC_SMT_W +281 0x0196 //RX_TDDRC_DRC_GAIN +195 0x001C //RX_FDEQ_SUBNUM +196 0x4848 //RX_FDEQ_GAIN_0 +197 0x4848 //RX_FDEQ_GAIN_1 +198 0x4848 //RX_FDEQ_GAIN_2 +199 0x4848 //RX_FDEQ_GAIN_3 +200 0x4848 //RX_FDEQ_GAIN_4 +201 0x4848 //RX_FDEQ_GAIN_5 +202 0x4848 //RX_FDEQ_GAIN_6 +203 0x4848 //RX_FDEQ_GAIN_7 +204 0x4848 //RX_FDEQ_GAIN_8 +205 0x4848 //RX_FDEQ_GAIN_9 +206 0x4848 //RX_FDEQ_GAIN_10 +207 0x4848 //RX_FDEQ_GAIN_11 +208 0x4848 //RX_FDEQ_GAIN_12 +209 0x4848 //RX_FDEQ_GAIN_13 +210 0x4848 //RX_FDEQ_GAIN_14 +211 0x4848 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0202 //RX_FDEQ_BIN_0 +221 0x0203 //RX_FDEQ_BIN_1 +222 0x0303 //RX_FDEQ_BIN_2 +223 0x0304 //RX_FDEQ_BIN_3 +224 0x0405 //RX_FDEQ_BIN_4 +225 0x0506 //RX_FDEQ_BIN_5 +226 0x0708 //RX_FDEQ_BIN_6 +227 0x090A //RX_FDEQ_BIN_7 +228 0x0B0C //RX_FDEQ_BIN_8 +229 0x0D0E //RX_FDEQ_BIN_9 +230 0x0E0F //RX_FDEQ_BIN_10 +231 0x0F10 //RX_FDEQ_BIN_11 +232 0x1011 //RX_FDEQ_BIN_12 +233 0x1104 //RX_FDEQ_BIN_13 +234 0x0000 //RX_FDEQ_BIN_14 +235 0x0000 //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x4000 //RX_FDEQ_RESRV_0 +245 0x0320 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0030 //RX_FDDRC_BAND_MARGIN_1 +248 0x0050 //RX_FDDRC_BAND_MARGIN_2 +249 0x0080 //RX_FDDRC_BAND_MARGIN_3 +250 0x0007 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x5000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x6400 //RX_FDDRC_THRD_3_2 +258 0x6400 //RX_FDDRC_THRD_3_3 +259 0x2000 //RX_FDDRC_SLANT_0_0 +260 0x2000 //RX_FDDRC_SLANT_0_1 +261 0x2000 //RX_FDDRC_SLANT_0_2 +262 0x2000 //RX_FDDRC_SLANT_0_3 +263 0x5333 //RX_FDDRC_SLANT_1_0 +264 0x5333 //RX_FDDRC_SLANT_1_1 +265 0x5333 //RX_FDDRC_SLANT_1_2 +266 0x5333 //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +286 0x0036 //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 +#VOL 4 +163 0x3000 //RX_TDDRC_ALPHA_UP_1 +164 0x3000 //RX_TDDRC_ALPHA_UP_2 +165 0x3000 //RX_TDDRC_ALPHA_UP_3 +166 0x3000 //RX_TDDRC_ALPHA_UP_4 +184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +190 0x7FFF //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +269 0x0000 //RX_TDDRC_THRD_0 +270 0x0000 //RX_TDDRC_THRD_1 +271 0x2000 //RX_TDDRC_THRD_2 +272 0x3000 //RX_TDDRC_THRD_3 +273 0x0800 //RX_TDDRC_SLANT_0 +274 0x7EB8 //RX_TDDRC_SLANT_1 +275 0x3000 //RX_TDDRC_ALPHA_UP_0 +276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x199A //RX_TDDRC_HMNC_GAIN +279 0x0001 //RX_TDDRC_SMT_FLAG +280 0x0CCD //RX_TDDRC_SMT_W +281 0x0196 //RX_TDDRC_DRC_GAIN +195 0x001C //RX_FDEQ_SUBNUM +196 0x4848 //RX_FDEQ_GAIN_0 +197 0x4848 //RX_FDEQ_GAIN_1 +198 0x4848 //RX_FDEQ_GAIN_2 +199 0x4848 //RX_FDEQ_GAIN_3 +200 0x4848 //RX_FDEQ_GAIN_4 +201 0x4848 //RX_FDEQ_GAIN_5 +202 0x4848 //RX_FDEQ_GAIN_6 +203 0x4848 //RX_FDEQ_GAIN_7 +204 0x4848 //RX_FDEQ_GAIN_8 +205 0x4848 //RX_FDEQ_GAIN_9 +206 0x4848 //RX_FDEQ_GAIN_10 +207 0x4848 //RX_FDEQ_GAIN_11 +208 0x4848 //RX_FDEQ_GAIN_12 +209 0x4848 //RX_FDEQ_GAIN_13 +210 0x4848 //RX_FDEQ_GAIN_14 +211 0x4848 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0202 //RX_FDEQ_BIN_0 +221 0x0203 //RX_FDEQ_BIN_1 +222 0x0303 //RX_FDEQ_BIN_2 +223 0x0304 //RX_FDEQ_BIN_3 +224 0x0405 //RX_FDEQ_BIN_4 +225 0x0506 //RX_FDEQ_BIN_5 +226 0x0708 //RX_FDEQ_BIN_6 +227 0x090A //RX_FDEQ_BIN_7 +228 0x0B0C //RX_FDEQ_BIN_8 +229 0x0D0E //RX_FDEQ_BIN_9 +230 0x0E0F //RX_FDEQ_BIN_10 +231 0x0F10 //RX_FDEQ_BIN_11 +232 0x1011 //RX_FDEQ_BIN_12 +233 0x1104 //RX_FDEQ_BIN_13 +234 0x0000 //RX_FDEQ_BIN_14 +235 0x0000 //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x4000 //RX_FDEQ_RESRV_0 +245 0x0320 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0030 //RX_FDDRC_BAND_MARGIN_1 +248 0x0050 //RX_FDDRC_BAND_MARGIN_2 +249 0x0080 //RX_FDDRC_BAND_MARGIN_3 +250 0x0007 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x5000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x6400 //RX_FDDRC_THRD_3_2 +258 0x6400 //RX_FDDRC_THRD_3_3 +259 0x2000 //RX_FDDRC_SLANT_0_0 +260 0x2000 //RX_FDDRC_SLANT_0_1 +261 0x2000 //RX_FDDRC_SLANT_0_2 +262 0x2000 //RX_FDDRC_SLANT_0_3 +263 0x5333 //RX_FDDRC_SLANT_1_0 +264 0x5333 //RX_FDDRC_SLANT_1_1 +265 0x5333 //RX_FDDRC_SLANT_1_2 +266 0x5333 //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +286 0x005B //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 +#VOL 5 +163 0x3000 //RX_TDDRC_ALPHA_UP_1 +164 0x3000 //RX_TDDRC_ALPHA_UP_2 +165 0x3000 //RX_TDDRC_ALPHA_UP_3 +166 0x3000 //RX_TDDRC_ALPHA_UP_4 +184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +190 0x7FFF //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +269 0x0000 //RX_TDDRC_THRD_0 +270 0x0000 //RX_TDDRC_THRD_1 +271 0x2000 //RX_TDDRC_THRD_2 +272 0x3000 //RX_TDDRC_THRD_3 +273 0x0800 //RX_TDDRC_SLANT_0 +274 0x7EB8 //RX_TDDRC_SLANT_1 +275 0x3000 //RX_TDDRC_ALPHA_UP_0 +276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x199A //RX_TDDRC_HMNC_GAIN +279 0x0001 //RX_TDDRC_SMT_FLAG +280 0x0CCD //RX_TDDRC_SMT_W +281 0x0196 //RX_TDDRC_DRC_GAIN +195 0x001C //RX_FDEQ_SUBNUM +196 0x4848 //RX_FDEQ_GAIN_0 +197 0x4848 //RX_FDEQ_GAIN_1 +198 0x4848 //RX_FDEQ_GAIN_2 +199 0x4848 //RX_FDEQ_GAIN_3 +200 0x4848 //RX_FDEQ_GAIN_4 +201 0x4848 //RX_FDEQ_GAIN_5 +202 0x4848 //RX_FDEQ_GAIN_6 +203 0x4848 //RX_FDEQ_GAIN_7 +204 0x4848 //RX_FDEQ_GAIN_8 +205 0x4848 //RX_FDEQ_GAIN_9 +206 0x4848 //RX_FDEQ_GAIN_10 +207 0x4848 //RX_FDEQ_GAIN_11 +208 0x4848 //RX_FDEQ_GAIN_12 +209 0x4848 //RX_FDEQ_GAIN_13 +210 0x4848 //RX_FDEQ_GAIN_14 +211 0x4848 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0202 //RX_FDEQ_BIN_0 +221 0x0203 //RX_FDEQ_BIN_1 +222 0x0303 //RX_FDEQ_BIN_2 +223 0x0304 //RX_FDEQ_BIN_3 +224 0x0405 //RX_FDEQ_BIN_4 +225 0x0506 //RX_FDEQ_BIN_5 +226 0x0708 //RX_FDEQ_BIN_6 +227 0x090A //RX_FDEQ_BIN_7 +228 0x0B0C //RX_FDEQ_BIN_8 +229 0x0D0E //RX_FDEQ_BIN_9 +230 0x0E0F //RX_FDEQ_BIN_10 +231 0x0F10 //RX_FDEQ_BIN_11 +232 0x1011 //RX_FDEQ_BIN_12 +233 0x1104 //RX_FDEQ_BIN_13 +234 0x0000 //RX_FDEQ_BIN_14 +235 0x0000 //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x4000 //RX_FDEQ_RESRV_0 +245 0x0320 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0030 //RX_FDDRC_BAND_MARGIN_1 +248 0x0050 //RX_FDDRC_BAND_MARGIN_2 +249 0x0080 //RX_FDDRC_BAND_MARGIN_3 +250 0x0007 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x5000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x6400 //RX_FDDRC_THRD_3_2 +258 0x6400 //RX_FDDRC_THRD_3_3 +259 0x2000 //RX_FDDRC_SLANT_0_0 +260 0x2000 //RX_FDDRC_SLANT_0_1 +261 0x2000 //RX_FDDRC_SLANT_0_2 +262 0x2000 //RX_FDDRC_SLANT_0_3 +263 0x5333 //RX_FDDRC_SLANT_1_0 +264 0x5333 //RX_FDDRC_SLANT_1_1 +265 0x5333 //RX_FDDRC_SLANT_1_2 +266 0x5333 //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +286 0x0099 //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 +#VOL 6 +163 0x3000 //RX_TDDRC_ALPHA_UP_1 +164 0x3000 //RX_TDDRC_ALPHA_UP_2 +165 0x3000 //RX_TDDRC_ALPHA_UP_3 +166 0x3000 //RX_TDDRC_ALPHA_UP_4 +184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +190 0x7FFF //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +269 0x0000 //RX_TDDRC_THRD_0 +270 0x0000 //RX_TDDRC_THRD_1 +271 0x2000 //RX_TDDRC_THRD_2 +272 0x3000 //RX_TDDRC_THRD_3 +273 0x0800 //RX_TDDRC_SLANT_0 +274 0x7EB8 //RX_TDDRC_SLANT_1 +275 0x3000 //RX_TDDRC_ALPHA_UP_0 +276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x199A //RX_TDDRC_HMNC_GAIN +279 0x0001 //RX_TDDRC_SMT_FLAG +280 0x0CCD //RX_TDDRC_SMT_W +281 0x0196 //RX_TDDRC_DRC_GAIN +195 0x001C //RX_FDEQ_SUBNUM +196 0x4848 //RX_FDEQ_GAIN_0 +197 0x4848 //RX_FDEQ_GAIN_1 +198 0x4848 //RX_FDEQ_GAIN_2 +199 0x4848 //RX_FDEQ_GAIN_3 +200 0x4848 //RX_FDEQ_GAIN_4 +201 0x4848 //RX_FDEQ_GAIN_5 +202 0x4848 //RX_FDEQ_GAIN_6 +203 0x4848 //RX_FDEQ_GAIN_7 +204 0x4848 //RX_FDEQ_GAIN_8 +205 0x4848 //RX_FDEQ_GAIN_9 +206 0x4848 //RX_FDEQ_GAIN_10 +207 0x4848 //RX_FDEQ_GAIN_11 +208 0x4848 //RX_FDEQ_GAIN_12 +209 0x4848 //RX_FDEQ_GAIN_13 +210 0x4848 //RX_FDEQ_GAIN_14 +211 0x4848 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0202 //RX_FDEQ_BIN_0 +221 0x0203 //RX_FDEQ_BIN_1 +222 0x0303 //RX_FDEQ_BIN_2 +223 0x0304 //RX_FDEQ_BIN_3 +224 0x0405 //RX_FDEQ_BIN_4 +225 0x0506 //RX_FDEQ_BIN_5 +226 0x0708 //RX_FDEQ_BIN_6 +227 0x090A //RX_FDEQ_BIN_7 +228 0x0B0C //RX_FDEQ_BIN_8 +229 0x0D0E //RX_FDEQ_BIN_9 +230 0x0E0F //RX_FDEQ_BIN_10 +231 0x0F10 //RX_FDEQ_BIN_11 +232 0x1011 //RX_FDEQ_BIN_12 +233 0x1104 //RX_FDEQ_BIN_13 +234 0x0000 //RX_FDEQ_BIN_14 +235 0x0000 //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x4000 //RX_FDEQ_RESRV_0 +245 0x0320 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0030 //RX_FDDRC_BAND_MARGIN_1 +248 0x0050 //RX_FDDRC_BAND_MARGIN_2 +249 0x0080 //RX_FDDRC_BAND_MARGIN_3 +250 0x0007 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x5000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x6400 //RX_FDDRC_THRD_3_2 +258 0x6400 //RX_FDDRC_THRD_3_3 +259 0x2000 //RX_FDDRC_SLANT_0_0 +260 0x2000 //RX_FDDRC_SLANT_0_1 +261 0x2000 //RX_FDDRC_SLANT_0_2 +262 0x2000 //RX_FDDRC_SLANT_0_3 +263 0x5333 //RX_FDDRC_SLANT_1_0 +264 0x5333 //RX_FDDRC_SLANT_1_1 +265 0x5333 //RX_FDDRC_SLANT_1_2 +266 0x5333 //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +286 0x0100 //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 #CASE_NAME HEADSET-GOOGLE_CONDOR-VOICE_GENERIC-SWB -#PARAM_MODE FULL -#PARAM_TYPE TX+RX -#TOTAL_CUSTOM_STEP 7 +#PARAM_MODE Full +#PARAM_TYPE TX+2RX +#TOTAL_CUSTOM_STEP 7+7 #TX 0 0x0009 //TX_OPERATION_MODE_0 1 0x0001 //TX_OPERATION_MODE_1 @@ -10774,7 +16270,7 @@ 239 0x0800 //TX_DT_RESRV_7 240 0x0800 //TX_DT_RESRV_8 241 0x0000 //TX_DT_RESRV_9 -242 0xF400 //TX_THR_SN_EST_0 +242 0xFA00 //TX_THR_SN_EST_0 243 0xF400 //TX_THR_SN_EST_1 244 0xF600 //TX_THR_SN_EST_2 245 0xF400 //TX_THR_SN_EST_3 @@ -10783,20 +16279,20 @@ 248 0xF400 //TX_THR_SN_EST_6 249 0xF600 //TX_THR_SN_EST_7 250 0x0000 //TX_DELTA_THR_SN_EST_0 -251 0x0000 //TX_DELTA_THR_SN_EST_1 +251 0x0200 //TX_DELTA_THR_SN_EST_1 252 0x0200 //TX_DELTA_THR_SN_EST_2 253 0x0200 //TX_DELTA_THR_SN_EST_3 254 0x0200 //TX_DELTA_THR_SN_EST_4 255 0x0200 //TX_DELTA_THR_SN_EST_5 -256 0x0200 //TX_DELTA_THR_SN_EST_6 +256 0x0000 //TX_DELTA_THR_SN_EST_6 257 0x0200 //TX_DELTA_THR_SN_EST_7 258 0x6000 //TX_LAMBDA_NN_EST_0 -259 0x6000 //TX_LAMBDA_NN_EST_1 +259 0x4000 //TX_LAMBDA_NN_EST_1 260 0x4000 //TX_LAMBDA_NN_EST_2 261 0x4000 //TX_LAMBDA_NN_EST_3 262 0x4000 //TX_LAMBDA_NN_EST_4 263 0x4000 //TX_LAMBDA_NN_EST_5 -264 0x4000 //TX_LAMBDA_NN_EST_6 +264 0x6000 //TX_LAMBDA_NN_EST_6 265 0x4000 //TX_LAMBDA_NN_EST_7 266 0x0400 //TX_N_SN_EST 267 0x001E //TX_INBEAM_T @@ -10814,16 +16310,16 @@ 279 0x1000 //TX_B_POST_FLT_0 280 0x1000 //TX_B_POST_FLT_1 281 0x000B //TX_NS_LVL_CTRL_0 -282 0x000F //TX_NS_LVL_CTRL_1 -283 0x0011 //TX_NS_LVL_CTRL_2 +282 0x0011 //TX_NS_LVL_CTRL_1 +283 0x000F //TX_NS_LVL_CTRL_2 284 0x000F //TX_NS_LVL_CTRL_3 285 0x000F //TX_NS_LVL_CTRL_4 286 0x000F //TX_NS_LVL_CTRL_5 287 0x000F //TX_NS_LVL_CTRL_6 288 0x0011 //TX_NS_LVL_CTRL_7 289 0x000C //TX_MIN_GAIN_S_0 -290 0x000C //TX_MIN_GAIN_S_1 -291 0x000F //TX_MIN_GAIN_S_2 +290 0x000F //TX_MIN_GAIN_S_1 +291 0x000C //TX_MIN_GAIN_S_2 292 0x000C //TX_MIN_GAIN_S_3 293 0x000C //TX_MIN_GAIN_S_4 294 0x000C //TX_MIN_GAIN_S_5 @@ -10847,12 +16343,12 @@ 312 0x7FFF //TX_A_POST_FILT_0 313 0x2000 //TX_A_POST_FILT_1 314 0x2000 //TX_A_POST_FILT_S_0 -315 0x4000 //TX_A_POST_FILT_S_1 +315 0x5000 //TX_A_POST_FILT_S_1 316 0x5000 //TX_A_POST_FILT_S_2 317 0x5000 //TX_A_POST_FILT_S_3 318 0x5000 //TX_A_POST_FILT_S_4 319 0x5000 //TX_A_POST_FILT_S_5 -320 0x5000 //TX_A_POST_FILT_S_6 +320 0x4000 //TX_A_POST_FILT_S_6 321 0x5000 //TX_A_POST_FILT_S_7 322 0x1000 //TX_B_POST_FILT_0 323 0x1000 //TX_B_POST_FILT_1 @@ -10899,7 +16395,7 @@ 364 0x0000 //TX_K_APT 365 0x0001 //TX_NOISEDET 366 0x0190 //TX_NDETCT -367 0x0050 //TX_NOISE_TH_0 +367 0x0383 //TX_NOISE_TH_0 368 0x7FFF //TX_NOISE_TH_0_2 369 0x7FFF //TX_NOISE_TH_0_3 370 0x07D0 //TX_NOISE_TH_1 @@ -10911,11 +16407,11 @@ 376 0x7FFF //TX_NOISE_TH_5_3 377 0x7FFF //TX_NOISE_TH_5_4 378 0x044C //TX_NOISE_TH_6 -379 0x0014 //TX_MINENOISE_TH -380 0x4000 //TX_MINENOISE_MIC0_TH_MTS -381 0xFFEE //TX_MINENOISE_MIC0_TH_EXP -382 0x6000 //TX_MINENOISE_MIC0_S_TH_MTS -383 0xFFF3 //TX_MINENOISE_MIC0_S_TH_EXP +379 0x044C //TX_MINENOISE_TH +380 0xD508 //TX_MORENS_TFMASK_TH +381 0x0001 //TX_DRC_QUIET_FLOOR +382 0x3A98 //TX_RATIODTL_CUT_TH +383 0x0DAC //TX_DT_CUT_K1 384 0x0666 //TX_OUT_ENER_S_TH_CLEAN 385 0x0666 //TX_OUT_ENER_S_TH_LESSCLEAN 386 0x0333 //TX_OUT_ENER_S_TH_NOISY @@ -10923,22 +16419,22 @@ 388 0x0333 //TX_OUT_ENER_TH_SPEECH 389 0x2000 //TX_SN_NPB_GAIN 390 0x0000 //TX_NN_NPB_GAIN -391 0x0000 //TX_CSX_ALPHA_0 -392 0x0000 //TX_CSX_ALPHA_1 -393 0x0000 //TX_CSX_ALPHA_2 -394 0x0000 //TX_CSX_ALPHA_3 -395 0x0800 //TX_MU_ARSP_EST -396 0x00C8 //TX_P_OUTBEAM_MIN_TH +391 0x7FFF //TX_POST_MASK_SUP_HSNE +392 0x1388 //TX_TAIL_DET_TH +393 0x4000 //TX_B_LESSCUT_RTO_WTA +394 0x0000 //TX_MEL_G_R +395 0x0080 //TX_SUPHIGH_TH +396 0x0000 //TX_MASK_G_R 397 0x0002 //TX_EXTRA_NS_L -398 0x0800 //TX_EXTRA_NS_A -399 0x0005 //TX_VR_NOISE_FLOOR_TH +398 0x1800 //TX_C_POST_FLT_MASK +399 0x7FFF //TX_A_POST_FLT_WNS 400 0x0148 //TX_MIN_G_LOW300HZ 401 0x0002 //TX_MAXLEVEL_CNG 402 0x00B4 //TX_STN_NOISE_TH 403 0x4000 //TX_POST_MASK_SUP 404 0x7FFF //TX_POST_MASK_ADJUST 405 0x00C8 //TX_NS_ENOISE_MIC0_TH -406 0x0014 //TX_MINENOISE_MIC0_TH +406 0x02F3 //TX_MINENOISE_MIC0_TH 407 0x012C //TX_MINENOISE_MIC0_S_TH 408 0x2900 //TX_MIN_G_CTRL_SSNS 409 0x0800 //TX_METAL_RTO_THR @@ -11046,16 +16542,16 @@ 511 0x6666 //TX_MIC_TO_BFGAIN 512 0x0000 //TX_MICTOBFGAIN0 513 0x0000 //TX_FASTMUE_TH -514 0x0000 //TX_DERVB_LEN_0 -515 0x0000 //TX_DERVB_LEN_1 -516 0x0000 //TX_RHO_DERVB -517 0x0000 //TX_MIC_INDX_DERVB -518 0x0000 //TX_MU_DERVB -519 0x0000 //TX_DR_RESRV_0 -520 0x0000 //TX_DR_RESRV_1 -521 0x0000 //TX_DR_RESRV_2 -522 0x0000 //TX_DR_RESRV_3 -523 0x0000 //TX_DR_RESRV_4 +514 0xC000 //TX_DEREVERB_LF_MU +515 0xC000 //TX_DEREVERB_HF_MU +516 0xCCCC //TX_DEREVERB_DELAY +517 0xD999 //TX_DEREVERB_COEF_LEN +518 0x1F40 //TX_DEREVERB_DNR +519 0x0000 //TX_DEREVERB_ALPHA +520 0x0000 //TX_DEREVERB_BETA +521 0x0000 //TX_GSC_RTOL_TH +522 0x7000 //TX_GSC_RTOH_TH +523 0x0064 //TX_WIDE2_MEANHTH 524 0x0000 //TX_DR_RESRV_5 525 0x0000 //TX_DR_RESRV_6 526 0x0000 //TX_DR_RESRV_7 @@ -11421,16 +16917,81 @@ 886 0x0CCD //TX_FASTNS_TFMASKBIN_TH2 887 0x0CCD //TX_FASTNS_TFMASKBIN_TH3 888 0x0028 //TX_FASTNS_ARSPC_TH -889 0xC000 //TX_FASTNS_MASK5_TH +889 0x8000 //TX_FASTNS_MASK5_TH 890 0x4848 //TX_POSTSSA_MIN_G_VR_MASK -891 0x1000 //TX_A_LESSCUT_RTO_MASK +891 0x4000 //TX_A_LESSCUT_RTO_MASK 892 0x1770 //TX_FASTNS_NOISETH 893 0xC000 //TX_FASTNS_SSA_THLFL 894 0xC000 //TX_FASTNS_SSA_THHFL 895 0xCCCC //TX_FASTNS_SSA_THLFH 896 0xD999 //TX_FASTNS_SSA_THHFH +897 0x2339 //TX_SENDFUNC_REG_MICMUTE +898 0x0021 //TX_SENDFUNC_REG_MICMUTE1 +899 0x02BC //TX_MICMUTE_RATIO_THR +900 0x0140 //TX_MICMUTE_AMP_THR +901 0x0004 //TX_MICMUTE_HPF_IND +902 0x00C0 //TX_MICMUTE_LOG_EYR_TH +903 0x0008 //TX_MICMUTE_CVG_TIME +904 0x0008 //TX_MICMUTE_RELEASE_TIME +905 0x01FE //TX_MIC_VOLUME_MIC0MUTE +906 0x0020 //TX_MICMUTE_EPD_OFFSET_0 +907 0x001E //TX_MICMUTE_FRQ_AEC_L +908 0x7999 //TX_MICMUTE_EAD_THR +909 0x7FFF //TX_MICMUTE_LAMBDA_CB_NLE +910 0x7FFF //TX_MICMUTE_LAMBDA_RE_EST +911 0x4000 //TX_DTD_THR1_MICMUTE_0 +912 0x7000 //TX_DTD_THR1_MICMUTE_1 +913 0x7FFF //TX_DTD_THR1_MICMUTE_2 +914 0x7FFF //TX_DTD_THR1_MICMUTE_3 +915 0x6CCC //TX_DTD_THR2_MICMUTE_0 +916 0x0400 //TX_MICMUTE_MIN_EQ_RE_EST_0 +917 0x0400 //TX_MICMUTE_MIN_EQ_RE_EST_1 +918 0x1000 //TX_MICMUTE_MIN_EQ_RE_EST_2 +919 0x7FFF //TX_MICMUTE_MIN_EQ_RE_EST_3 +920 0x7FFF //TX_MICMUTE_MIN_EQ_RE_EST_4 +921 0x4000 //TX_MICMUTE_C_POST_FLT +922 0x03E8 //TX_MICMUTE_DT_CUT_K +923 0x0001 //TX_MICMUTE_DT_CUT_THR +924 0x03E8 //TX_MICMUTE_DT_CUT_K2 +925 0x0001 //TX_MICMUTE_DT_CUT_THR2 +926 0x0064 //TX_MICMUTE_DT2_HOLD_N +927 0x1000 //TX_MICMUTE_RATIODTH_THCUT +928 0x1000 //TX_MICMUTE_B_POST_FLT_ECHOL +929 0x7FFF //TX_MICMUTE_B_POST_FLT_ECHOH +930 0x0400 //TX_MICMUTE_C_POST_FLT_MASK +931 0x7999 //TX_MICMUTE_RATIODTL_CUT_TH +932 0x0258 //TX_MICMUTE_DT_CUT_K1 +933 0x0800 //TX_MICMUTE_N2_SN_EST +934 0xFC00 //TX_MICMUTE_THR_SN_EST_0 +935 0x001C //TX_MICMUTE_MIN_G_CTRL_0 +936 0x6000 //TX_MICMUTE_A_POST_FILT_S_0 +937 0x7000 //TX_MICMUTE_B_POST_FILT_0 +938 0x2710 //TX_MIC1RUB_AMP_THR +939 0x0010 //TX_MIC1MUTE_RATIO_THR +940 0x0450 //TX_MIC1MUTE_AMP_THR +941 0x0008 //TX_MIC1MUTE_CVG_TIME +942 0x0008 //TX_MIC1MUTE_RELEASE_TIME +943 0x0000 //TX_AMS_RESRV_01 +944 0x0000 //TX_AMS_RESRV_02 +945 0x0000 //TX_AMS_RESRV_03 +946 0x0000 //TX_AMS_RESRV_04 +947 0x0000 //TX_AMS_RESRV_05 +948 0x0000 //TX_AMS_RESRV_06 +949 0x0000 //TX_AMS_RESRV_07 +950 0x0000 //TX_AMS_RESRV_08 +951 0x0000 //TX_AMS_RESRV_09 +952 0x0000 //TX_AMS_RESRV_10 +953 0x0000 //TX_AMS_RESRV_11 +954 0x0000 //TX_AMS_RESRV_12 +955 0x0000 //TX_AMS_RESRV_13 +956 0x0000 //TX_AMS_RESRV_14 +957 0x0000 //TX_AMS_RESRV_15 +958 0x0000 //TX_AMS_RESRV_16 +959 0x0000 //TX_AMS_RESRV_17 +960 0x0000 //TX_AMS_RESRV_18 +961 0x0000 //TX_AMS_RESRV_19 #RX -0 0x002C //RX_RECVFUNC_MODE_0 +0 0x202C //RX_RECVFUNC_MODE_0 1 0x0000 //RX_RECVFUNC_MODE_1 2 0x0003 //RX_SAMPLINGFREQ_SIG 3 0x0003 //RX_SAMPLINGFREQ_PROC @@ -12280,11 +17841,862 @@ 110 0x0000 //RX_FDDRC_RESRV_0 129 0x0100 //RX_SPK_VOL 130 0x0000 //RX_VOL_RESRV_0 +#RX 2 +157 0x202C //RX_RECVFUNC_MODE_0 +158 0x0000 //RX_RECVFUNC_MODE_1 +159 0x0003 //RX_SAMPLINGFREQ_SIG +160 0x0003 //RX_SAMPLINGFREQ_PROC +161 0x000A //RX_FRAME_SZ +162 0x0000 //RX_DELAY_OPT +163 0x5000 //RX_TDDRC_ALPHA_UP_1 +164 0x5000 //RX_TDDRC_ALPHA_UP_2 +165 0x5000 //RX_TDDRC_ALPHA_UP_3 +166 0x2000 //RX_TDDRC_ALPHA_UP_4 +167 0x0800 //RX_PGA +168 0x7FFF //RX_A_HP +169 0x0000 //RX_B_PE +170 0x1800 //RX_THR_PITCH_DET_0 +171 0x1000 //RX_THR_PITCH_DET_1 +172 0x0800 //RX_THR_PITCH_DET_2 +173 0x0008 //RX_PITCH_BFR_LEN +174 0x0003 //RX_SBD_PITCH_DET +175 0x0100 //RX_PP_RESRV_0 +176 0x0020 //RX_PP_RESRV_1 +177 0x0400 //RX_N_SN_EST +178 0x000C //RX_N2_SN_EST +179 0x0003 //RX_NS_LVL_CTRL +180 0x9000 //RX_THR_SN_EST +181 0x7CCD //RX_LAMBDA_PFILT +182 0x000A //RX_FENS_RESRV_0 +183 0x0190 //RX_FENS_RESRV_1 +184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +187 0x0002 //RX_EXTRA_NS_L +188 0x0800 //RX_EXTRA_NS_A +189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +190 0x65AD //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +192 0x199A //RX_A_POST_FLT +193 0x0000 //RX_LMT_THRD +194 0x4000 //RX_LMT_ALPHA +195 0x0020 //RX_FDEQ_SUBNUM +196 0x4848 //RX_FDEQ_GAIN_0 +197 0x4848 //RX_FDEQ_GAIN_1 +198 0x4848 //RX_FDEQ_GAIN_2 +199 0x4848 //RX_FDEQ_GAIN_3 +200 0x4848 //RX_FDEQ_GAIN_4 +201 0x4848 //RX_FDEQ_GAIN_5 +202 0x4848 //RX_FDEQ_GAIN_6 +203 0x4848 //RX_FDEQ_GAIN_7 +204 0x4848 //RX_FDEQ_GAIN_8 +205 0x4848 //RX_FDEQ_GAIN_9 +206 0x4848 //RX_FDEQ_GAIN_10 +207 0x4848 //RX_FDEQ_GAIN_11 +208 0x4848 //RX_FDEQ_GAIN_12 +209 0x4848 //RX_FDEQ_GAIN_13 +210 0x4848 //RX_FDEQ_GAIN_14 +211 0x4848 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0202 //RX_FDEQ_BIN_0 +221 0x0203 //RX_FDEQ_BIN_1 +222 0x0303 //RX_FDEQ_BIN_2 +223 0x0304 //RX_FDEQ_BIN_3 +224 0x0405 //RX_FDEQ_BIN_4 +225 0x0506 //RX_FDEQ_BIN_5 +226 0x0708 //RX_FDEQ_BIN_6 +227 0x090A //RX_FDEQ_BIN_7 +228 0x0B0C //RX_FDEQ_BIN_8 +229 0x0D0E //RX_FDEQ_BIN_9 +230 0x1013 //RX_FDEQ_BIN_10 +231 0x1719 //RX_FDEQ_BIN_11 +232 0x1B1E //RX_FDEQ_BIN_12 +233 0x1E1E //RX_FDEQ_BIN_13 +234 0x1E28 //RX_FDEQ_BIN_14 +235 0x282C //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x4000 //RX_FDEQ_RESRV_0 +245 0x0320 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0030 //RX_FDDRC_BAND_MARGIN_1 +248 0x0050 //RX_FDDRC_BAND_MARGIN_2 +249 0x0080 //RX_FDDRC_BAND_MARGIN_3 +250 0x0007 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x5000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x6400 //RX_FDDRC_THRD_3_2 +258 0x6400 //RX_FDDRC_THRD_3_3 +259 0x2000 //RX_FDDRC_SLANT_0_0 +260 0x2000 //RX_FDDRC_SLANT_0_1 +261 0x2000 //RX_FDDRC_SLANT_0_2 +262 0x2000 //RX_FDDRC_SLANT_0_3 +263 0x5333 //RX_FDDRC_SLANT_1_0 +264 0x5333 //RX_FDDRC_SLANT_1_1 +265 0x5333 //RX_FDDRC_SLANT_1_2 +266 0x5333 //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +268 0x0002 //RX_FILTINDX +269 0x0000 //RX_TDDRC_THRD_0 +270 0x0000 //RX_TDDRC_THRD_1 +271 0x1A00 //RX_TDDRC_THRD_2 +272 0x1A00 //RX_TDDRC_THRD_3 +273 0x3000 //RX_TDDRC_SLANT_0 +274 0x7EB8 //RX_TDDRC_SLANT_1 +275 0x5000 //RX_TDDRC_ALPHA_UP_0 +276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x199A //RX_TDDRC_HMNC_GAIN +279 0x0001 //RX_TDDRC_SMT_FLAG +280 0x0CCD //RX_TDDRC_SMT_W +281 0x01C8 //RX_TDDRC_DRC_GAIN +282 0x7C00 //RX_LAMBDA_PKA_FP +283 0x2000 //RX_TPKA_FP +284 0x2000 //RX_MIN_G_FP +285 0x0080 //RX_MAX_G_FP +286 0x000B //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 +288 0x0000 //RX_MAXLEVEL_CNG +289 0x3000 //RX_BWE_UV_TH +290 0x3000 //RX_BWE_UV_TH2 +291 0x1800 //RX_BWE_UV_TH3 +292 0x1000 //RX_BWE_V_TH +293 0x04CD //RX_BWE_GAIN1_V_TH1 +294 0x0F33 //RX_BWE_GAIN1_V_TH2 +295 0x7333 //RX_BWE_UV_EQ +296 0x199A //RX_BWE_V_EQ +297 0x7333 //RX_BWE_TONE_TH +298 0x0004 //RX_BWE_UV_HOLD_T +299 0x6CCD //RX_BWE_GAIN2_ALPHA +300 0x799A //RX_BWE_GAIN3_ALPHA +301 0x001E //RX_BWE_CUTOFF +302 0x3000 //RX_BWE_GAINFILL +303 0x3200 //RX_BWE_MAXTH_TONE +304 0x2000 //RX_BWE_EQ_0 +305 0x2000 //RX_BWE_EQ_1 +306 0x2000 //RX_BWE_EQ_2 +307 0x2000 //RX_BWE_EQ_3 +308 0x2000 //RX_BWE_EQ_4 +309 0x2000 //RX_BWE_EQ_5 +310 0x2000 //RX_BWE_EQ_6 +311 0x0000 //RX_BWE_RESRV_0 +312 0x0000 //RX_BWE_RESRV_1 +313 0x0000 //RX_BWE_RESRV_2 +#VOL 0 +163 0x5000 //RX_TDDRC_ALPHA_UP_1 +164 0x5000 //RX_TDDRC_ALPHA_UP_2 +165 0x5000 //RX_TDDRC_ALPHA_UP_3 +166 0x2000 //RX_TDDRC_ALPHA_UP_4 +184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +190 0x65AD //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +269 0x0000 //RX_TDDRC_THRD_0 +270 0x0000 //RX_TDDRC_THRD_1 +271 0x1A00 //RX_TDDRC_THRD_2 +272 0x1A00 //RX_TDDRC_THRD_3 +273 0x3000 //RX_TDDRC_SLANT_0 +274 0x7EB8 //RX_TDDRC_SLANT_1 +275 0x5000 //RX_TDDRC_ALPHA_UP_0 +276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x199A //RX_TDDRC_HMNC_GAIN +279 0x0001 //RX_TDDRC_SMT_FLAG +280 0x0CCD //RX_TDDRC_SMT_W +281 0x01C8 //RX_TDDRC_DRC_GAIN +195 0x0020 //RX_FDEQ_SUBNUM +196 0x4848 //RX_FDEQ_GAIN_0 +197 0x4848 //RX_FDEQ_GAIN_1 +198 0x4848 //RX_FDEQ_GAIN_2 +199 0x4848 //RX_FDEQ_GAIN_3 +200 0x4848 //RX_FDEQ_GAIN_4 +201 0x4848 //RX_FDEQ_GAIN_5 +202 0x4848 //RX_FDEQ_GAIN_6 +203 0x4848 //RX_FDEQ_GAIN_7 +204 0x4848 //RX_FDEQ_GAIN_8 +205 0x4848 //RX_FDEQ_GAIN_9 +206 0x4848 //RX_FDEQ_GAIN_10 +207 0x4848 //RX_FDEQ_GAIN_11 +208 0x4848 //RX_FDEQ_GAIN_12 +209 0x4848 //RX_FDEQ_GAIN_13 +210 0x4848 //RX_FDEQ_GAIN_14 +211 0x4848 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0202 //RX_FDEQ_BIN_0 +221 0x0203 //RX_FDEQ_BIN_1 +222 0x0303 //RX_FDEQ_BIN_2 +223 0x0304 //RX_FDEQ_BIN_3 +224 0x0405 //RX_FDEQ_BIN_4 +225 0x0506 //RX_FDEQ_BIN_5 +226 0x0708 //RX_FDEQ_BIN_6 +227 0x090A //RX_FDEQ_BIN_7 +228 0x0B0C //RX_FDEQ_BIN_8 +229 0x0D0E //RX_FDEQ_BIN_9 +230 0x1013 //RX_FDEQ_BIN_10 +231 0x1719 //RX_FDEQ_BIN_11 +232 0x1B1E //RX_FDEQ_BIN_12 +233 0x1E1E //RX_FDEQ_BIN_13 +234 0x1E28 //RX_FDEQ_BIN_14 +235 0x282C //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x4000 //RX_FDEQ_RESRV_0 +245 0x0320 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0030 //RX_FDDRC_BAND_MARGIN_1 +248 0x0050 //RX_FDDRC_BAND_MARGIN_2 +249 0x0080 //RX_FDDRC_BAND_MARGIN_3 +250 0x0007 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x5000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x6400 //RX_FDDRC_THRD_3_2 +258 0x6400 //RX_FDDRC_THRD_3_3 +259 0x2000 //RX_FDDRC_SLANT_0_0 +260 0x2000 //RX_FDDRC_SLANT_0_1 +261 0x2000 //RX_FDDRC_SLANT_0_2 +262 0x2000 //RX_FDDRC_SLANT_0_3 +263 0x5333 //RX_FDDRC_SLANT_1_0 +264 0x5333 //RX_FDDRC_SLANT_1_1 +265 0x5333 //RX_FDDRC_SLANT_1_2 +266 0x5333 //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +286 0x000B //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 +#VOL 1 +163 0x5000 //RX_TDDRC_ALPHA_UP_1 +164 0x5000 //RX_TDDRC_ALPHA_UP_2 +165 0x5000 //RX_TDDRC_ALPHA_UP_3 +166 0x2000 //RX_TDDRC_ALPHA_UP_4 +184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +190 0x65AD //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +269 0x0000 //RX_TDDRC_THRD_0 +270 0x0000 //RX_TDDRC_THRD_1 +271 0x1A00 //RX_TDDRC_THRD_2 +272 0x1A00 //RX_TDDRC_THRD_3 +273 0x3000 //RX_TDDRC_SLANT_0 +274 0x7EB8 //RX_TDDRC_SLANT_1 +275 0x5000 //RX_TDDRC_ALPHA_UP_0 +276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x199A //RX_TDDRC_HMNC_GAIN +279 0x0001 //RX_TDDRC_SMT_FLAG +280 0x0CCD //RX_TDDRC_SMT_W +281 0x01C8 //RX_TDDRC_DRC_GAIN +195 0x0020 //RX_FDEQ_SUBNUM +196 0x4848 //RX_FDEQ_GAIN_0 +197 0x4848 //RX_FDEQ_GAIN_1 +198 0x4848 //RX_FDEQ_GAIN_2 +199 0x4848 //RX_FDEQ_GAIN_3 +200 0x4848 //RX_FDEQ_GAIN_4 +201 0x4848 //RX_FDEQ_GAIN_5 +202 0x4848 //RX_FDEQ_GAIN_6 +203 0x4848 //RX_FDEQ_GAIN_7 +204 0x4848 //RX_FDEQ_GAIN_8 +205 0x4848 //RX_FDEQ_GAIN_9 +206 0x4848 //RX_FDEQ_GAIN_10 +207 0x4848 //RX_FDEQ_GAIN_11 +208 0x4848 //RX_FDEQ_GAIN_12 +209 0x4848 //RX_FDEQ_GAIN_13 +210 0x4848 //RX_FDEQ_GAIN_14 +211 0x4848 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0202 //RX_FDEQ_BIN_0 +221 0x0203 //RX_FDEQ_BIN_1 +222 0x0303 //RX_FDEQ_BIN_2 +223 0x0304 //RX_FDEQ_BIN_3 +224 0x0405 //RX_FDEQ_BIN_4 +225 0x0506 //RX_FDEQ_BIN_5 +226 0x0708 //RX_FDEQ_BIN_6 +227 0x090A //RX_FDEQ_BIN_7 +228 0x0B0C //RX_FDEQ_BIN_8 +229 0x0D0E //RX_FDEQ_BIN_9 +230 0x1013 //RX_FDEQ_BIN_10 +231 0x1719 //RX_FDEQ_BIN_11 +232 0x1B1E //RX_FDEQ_BIN_12 +233 0x1E1E //RX_FDEQ_BIN_13 +234 0x1E28 //RX_FDEQ_BIN_14 +235 0x282C //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x4000 //RX_FDEQ_RESRV_0 +245 0x0320 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0030 //RX_FDDRC_BAND_MARGIN_1 +248 0x0050 //RX_FDDRC_BAND_MARGIN_2 +249 0x0080 //RX_FDDRC_BAND_MARGIN_3 +250 0x0007 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x5000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x6400 //RX_FDDRC_THRD_3_2 +258 0x6400 //RX_FDDRC_THRD_3_3 +259 0x2000 //RX_FDDRC_SLANT_0_0 +260 0x2000 //RX_FDDRC_SLANT_0_1 +261 0x2000 //RX_FDDRC_SLANT_0_2 +262 0x2000 //RX_FDDRC_SLANT_0_3 +263 0x5333 //RX_FDDRC_SLANT_1_0 +264 0x5333 //RX_FDDRC_SLANT_1_1 +265 0x5333 //RX_FDDRC_SLANT_1_2 +266 0x5333 //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +286 0x0013 //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 +#VOL 2 +163 0x5000 //RX_TDDRC_ALPHA_UP_1 +164 0x5000 //RX_TDDRC_ALPHA_UP_2 +165 0x5000 //RX_TDDRC_ALPHA_UP_3 +166 0x2000 //RX_TDDRC_ALPHA_UP_4 +184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +190 0x65AD //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +269 0x0000 //RX_TDDRC_THRD_0 +270 0x0000 //RX_TDDRC_THRD_1 +271 0x1A00 //RX_TDDRC_THRD_2 +272 0x1A00 //RX_TDDRC_THRD_3 +273 0x3000 //RX_TDDRC_SLANT_0 +274 0x7EB8 //RX_TDDRC_SLANT_1 +275 0x5000 //RX_TDDRC_ALPHA_UP_0 +276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x199A //RX_TDDRC_HMNC_GAIN +279 0x0001 //RX_TDDRC_SMT_FLAG +280 0x0CCD //RX_TDDRC_SMT_W +281 0x01C8 //RX_TDDRC_DRC_GAIN +195 0x0020 //RX_FDEQ_SUBNUM +196 0x4848 //RX_FDEQ_GAIN_0 +197 0x4848 //RX_FDEQ_GAIN_1 +198 0x4848 //RX_FDEQ_GAIN_2 +199 0x4848 //RX_FDEQ_GAIN_3 +200 0x4848 //RX_FDEQ_GAIN_4 +201 0x4848 //RX_FDEQ_GAIN_5 +202 0x4848 //RX_FDEQ_GAIN_6 +203 0x4848 //RX_FDEQ_GAIN_7 +204 0x4848 //RX_FDEQ_GAIN_8 +205 0x4848 //RX_FDEQ_GAIN_9 +206 0x4848 //RX_FDEQ_GAIN_10 +207 0x4848 //RX_FDEQ_GAIN_11 +208 0x4848 //RX_FDEQ_GAIN_12 +209 0x4848 //RX_FDEQ_GAIN_13 +210 0x4848 //RX_FDEQ_GAIN_14 +211 0x4848 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0202 //RX_FDEQ_BIN_0 +221 0x0203 //RX_FDEQ_BIN_1 +222 0x0303 //RX_FDEQ_BIN_2 +223 0x0304 //RX_FDEQ_BIN_3 +224 0x0405 //RX_FDEQ_BIN_4 +225 0x0506 //RX_FDEQ_BIN_5 +226 0x0708 //RX_FDEQ_BIN_6 +227 0x090A //RX_FDEQ_BIN_7 +228 0x0B0C //RX_FDEQ_BIN_8 +229 0x0D0E //RX_FDEQ_BIN_9 +230 0x1013 //RX_FDEQ_BIN_10 +231 0x1719 //RX_FDEQ_BIN_11 +232 0x1B1E //RX_FDEQ_BIN_12 +233 0x1E1E //RX_FDEQ_BIN_13 +234 0x1E28 //RX_FDEQ_BIN_14 +235 0x282C //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x4000 //RX_FDEQ_RESRV_0 +245 0x0320 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0030 //RX_FDDRC_BAND_MARGIN_1 +248 0x0050 //RX_FDDRC_BAND_MARGIN_2 +249 0x0080 //RX_FDDRC_BAND_MARGIN_3 +250 0x0007 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x5000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x6400 //RX_FDDRC_THRD_3_2 +258 0x6400 //RX_FDDRC_THRD_3_3 +259 0x2000 //RX_FDDRC_SLANT_0_0 +260 0x2000 //RX_FDDRC_SLANT_0_1 +261 0x2000 //RX_FDDRC_SLANT_0_2 +262 0x2000 //RX_FDDRC_SLANT_0_3 +263 0x5333 //RX_FDDRC_SLANT_1_0 +264 0x5333 //RX_FDDRC_SLANT_1_1 +265 0x5333 //RX_FDDRC_SLANT_1_2 +266 0x5333 //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +286 0x0020 //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 +#VOL 3 +163 0x5000 //RX_TDDRC_ALPHA_UP_1 +164 0x5000 //RX_TDDRC_ALPHA_UP_2 +165 0x5000 //RX_TDDRC_ALPHA_UP_3 +166 0x2000 //RX_TDDRC_ALPHA_UP_4 +184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +190 0x65AD //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +269 0x0000 //RX_TDDRC_THRD_0 +270 0x0000 //RX_TDDRC_THRD_1 +271 0x1A00 //RX_TDDRC_THRD_2 +272 0x1A00 //RX_TDDRC_THRD_3 +273 0x3000 //RX_TDDRC_SLANT_0 +274 0x7EB8 //RX_TDDRC_SLANT_1 +275 0x5000 //RX_TDDRC_ALPHA_UP_0 +276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x199A //RX_TDDRC_HMNC_GAIN +279 0x0001 //RX_TDDRC_SMT_FLAG +280 0x0CCD //RX_TDDRC_SMT_W +281 0x01C8 //RX_TDDRC_DRC_GAIN +195 0x0020 //RX_FDEQ_SUBNUM +196 0x4848 //RX_FDEQ_GAIN_0 +197 0x4848 //RX_FDEQ_GAIN_1 +198 0x4848 //RX_FDEQ_GAIN_2 +199 0x4848 //RX_FDEQ_GAIN_3 +200 0x4848 //RX_FDEQ_GAIN_4 +201 0x4848 //RX_FDEQ_GAIN_5 +202 0x4848 //RX_FDEQ_GAIN_6 +203 0x4848 //RX_FDEQ_GAIN_7 +204 0x4848 //RX_FDEQ_GAIN_8 +205 0x4848 //RX_FDEQ_GAIN_9 +206 0x4848 //RX_FDEQ_GAIN_10 +207 0x4848 //RX_FDEQ_GAIN_11 +208 0x4848 //RX_FDEQ_GAIN_12 +209 0x4848 //RX_FDEQ_GAIN_13 +210 0x4848 //RX_FDEQ_GAIN_14 +211 0x4848 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0202 //RX_FDEQ_BIN_0 +221 0x0203 //RX_FDEQ_BIN_1 +222 0x0303 //RX_FDEQ_BIN_2 +223 0x0304 //RX_FDEQ_BIN_3 +224 0x0405 //RX_FDEQ_BIN_4 +225 0x0506 //RX_FDEQ_BIN_5 +226 0x0708 //RX_FDEQ_BIN_6 +227 0x090A //RX_FDEQ_BIN_7 +228 0x0B0C //RX_FDEQ_BIN_8 +229 0x0D0E //RX_FDEQ_BIN_9 +230 0x1013 //RX_FDEQ_BIN_10 +231 0x1719 //RX_FDEQ_BIN_11 +232 0x1B1E //RX_FDEQ_BIN_12 +233 0x1E1E //RX_FDEQ_BIN_13 +234 0x1E28 //RX_FDEQ_BIN_14 +235 0x282C //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x4000 //RX_FDEQ_RESRV_0 +245 0x0320 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0030 //RX_FDDRC_BAND_MARGIN_1 +248 0x0050 //RX_FDDRC_BAND_MARGIN_2 +249 0x0080 //RX_FDDRC_BAND_MARGIN_3 +250 0x0007 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x5000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x6400 //RX_FDDRC_THRD_3_2 +258 0x6400 //RX_FDDRC_THRD_3_3 +259 0x2000 //RX_FDDRC_SLANT_0_0 +260 0x2000 //RX_FDDRC_SLANT_0_1 +261 0x2000 //RX_FDDRC_SLANT_0_2 +262 0x2000 //RX_FDDRC_SLANT_0_3 +263 0x5333 //RX_FDDRC_SLANT_1_0 +264 0x5333 //RX_FDDRC_SLANT_1_1 +265 0x5333 //RX_FDDRC_SLANT_1_2 +266 0x5333 //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +286 0x0036 //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 +#VOL 4 +163 0x5000 //RX_TDDRC_ALPHA_UP_1 +164 0x5000 //RX_TDDRC_ALPHA_UP_2 +165 0x5000 //RX_TDDRC_ALPHA_UP_3 +166 0x2000 //RX_TDDRC_ALPHA_UP_4 +184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +190 0x65AD //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +269 0x0000 //RX_TDDRC_THRD_0 +270 0x0000 //RX_TDDRC_THRD_1 +271 0x1A00 //RX_TDDRC_THRD_2 +272 0x1A00 //RX_TDDRC_THRD_3 +273 0x3000 //RX_TDDRC_SLANT_0 +274 0x7EB8 //RX_TDDRC_SLANT_1 +275 0x5000 //RX_TDDRC_ALPHA_UP_0 +276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x199A //RX_TDDRC_HMNC_GAIN +279 0x0001 //RX_TDDRC_SMT_FLAG +280 0x0CCD //RX_TDDRC_SMT_W +281 0x01C8 //RX_TDDRC_DRC_GAIN +195 0x0020 //RX_FDEQ_SUBNUM +196 0x4848 //RX_FDEQ_GAIN_0 +197 0x4848 //RX_FDEQ_GAIN_1 +198 0x4848 //RX_FDEQ_GAIN_2 +199 0x4848 //RX_FDEQ_GAIN_3 +200 0x4848 //RX_FDEQ_GAIN_4 +201 0x4848 //RX_FDEQ_GAIN_5 +202 0x4848 //RX_FDEQ_GAIN_6 +203 0x4848 //RX_FDEQ_GAIN_7 +204 0x4848 //RX_FDEQ_GAIN_8 +205 0x4848 //RX_FDEQ_GAIN_9 +206 0x4848 //RX_FDEQ_GAIN_10 +207 0x4848 //RX_FDEQ_GAIN_11 +208 0x4848 //RX_FDEQ_GAIN_12 +209 0x4848 //RX_FDEQ_GAIN_13 +210 0x4848 //RX_FDEQ_GAIN_14 +211 0x4848 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0202 //RX_FDEQ_BIN_0 +221 0x0203 //RX_FDEQ_BIN_1 +222 0x0303 //RX_FDEQ_BIN_2 +223 0x0304 //RX_FDEQ_BIN_3 +224 0x0405 //RX_FDEQ_BIN_4 +225 0x0506 //RX_FDEQ_BIN_5 +226 0x0708 //RX_FDEQ_BIN_6 +227 0x090A //RX_FDEQ_BIN_7 +228 0x0B0C //RX_FDEQ_BIN_8 +229 0x0D0E //RX_FDEQ_BIN_9 +230 0x1013 //RX_FDEQ_BIN_10 +231 0x1719 //RX_FDEQ_BIN_11 +232 0x1B1E //RX_FDEQ_BIN_12 +233 0x1E1E //RX_FDEQ_BIN_13 +234 0x1E28 //RX_FDEQ_BIN_14 +235 0x282C //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x4000 //RX_FDEQ_RESRV_0 +245 0x0320 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0030 //RX_FDDRC_BAND_MARGIN_1 +248 0x0050 //RX_FDDRC_BAND_MARGIN_2 +249 0x0080 //RX_FDDRC_BAND_MARGIN_3 +250 0x0007 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x5000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x6400 //RX_FDDRC_THRD_3_2 +258 0x6400 //RX_FDDRC_THRD_3_3 +259 0x2000 //RX_FDDRC_SLANT_0_0 +260 0x2000 //RX_FDDRC_SLANT_0_1 +261 0x2000 //RX_FDDRC_SLANT_0_2 +262 0x2000 //RX_FDDRC_SLANT_0_3 +263 0x5333 //RX_FDDRC_SLANT_1_0 +264 0x5333 //RX_FDDRC_SLANT_1_1 +265 0x5333 //RX_FDDRC_SLANT_1_2 +266 0x5333 //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +286 0x005B //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 +#VOL 5 +163 0x5000 //RX_TDDRC_ALPHA_UP_1 +164 0x5000 //RX_TDDRC_ALPHA_UP_2 +165 0x5000 //RX_TDDRC_ALPHA_UP_3 +166 0x2000 //RX_TDDRC_ALPHA_UP_4 +184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +190 0x65AD //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +269 0x0000 //RX_TDDRC_THRD_0 +270 0x0000 //RX_TDDRC_THRD_1 +271 0x1A00 //RX_TDDRC_THRD_2 +272 0x1A00 //RX_TDDRC_THRD_3 +273 0x3000 //RX_TDDRC_SLANT_0 +274 0x7EB8 //RX_TDDRC_SLANT_1 +275 0x5000 //RX_TDDRC_ALPHA_UP_0 +276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x199A //RX_TDDRC_HMNC_GAIN +279 0x0001 //RX_TDDRC_SMT_FLAG +280 0x0CCD //RX_TDDRC_SMT_W +281 0x01C8 //RX_TDDRC_DRC_GAIN +195 0x0020 //RX_FDEQ_SUBNUM +196 0x4848 //RX_FDEQ_GAIN_0 +197 0x4848 //RX_FDEQ_GAIN_1 +198 0x4848 //RX_FDEQ_GAIN_2 +199 0x4848 //RX_FDEQ_GAIN_3 +200 0x4848 //RX_FDEQ_GAIN_4 +201 0x4848 //RX_FDEQ_GAIN_5 +202 0x4848 //RX_FDEQ_GAIN_6 +203 0x4848 //RX_FDEQ_GAIN_7 +204 0x4848 //RX_FDEQ_GAIN_8 +205 0x4848 //RX_FDEQ_GAIN_9 +206 0x4848 //RX_FDEQ_GAIN_10 +207 0x4848 //RX_FDEQ_GAIN_11 +208 0x4848 //RX_FDEQ_GAIN_12 +209 0x4848 //RX_FDEQ_GAIN_13 +210 0x4848 //RX_FDEQ_GAIN_14 +211 0x4848 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0202 //RX_FDEQ_BIN_0 +221 0x0203 //RX_FDEQ_BIN_1 +222 0x0303 //RX_FDEQ_BIN_2 +223 0x0304 //RX_FDEQ_BIN_3 +224 0x0405 //RX_FDEQ_BIN_4 +225 0x0506 //RX_FDEQ_BIN_5 +226 0x0708 //RX_FDEQ_BIN_6 +227 0x090A //RX_FDEQ_BIN_7 +228 0x0B0C //RX_FDEQ_BIN_8 +229 0x0D0E //RX_FDEQ_BIN_9 +230 0x1013 //RX_FDEQ_BIN_10 +231 0x1719 //RX_FDEQ_BIN_11 +232 0x1B1E //RX_FDEQ_BIN_12 +233 0x1E1E //RX_FDEQ_BIN_13 +234 0x1E28 //RX_FDEQ_BIN_14 +235 0x282C //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x4000 //RX_FDEQ_RESRV_0 +245 0x0320 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0030 //RX_FDDRC_BAND_MARGIN_1 +248 0x0050 //RX_FDDRC_BAND_MARGIN_2 +249 0x0080 //RX_FDDRC_BAND_MARGIN_3 +250 0x0007 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x5000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x6400 //RX_FDDRC_THRD_3_2 +258 0x6400 //RX_FDDRC_THRD_3_3 +259 0x2000 //RX_FDDRC_SLANT_0_0 +260 0x2000 //RX_FDDRC_SLANT_0_1 +261 0x2000 //RX_FDDRC_SLANT_0_2 +262 0x2000 //RX_FDDRC_SLANT_0_3 +263 0x5333 //RX_FDDRC_SLANT_1_0 +264 0x5333 //RX_FDDRC_SLANT_1_1 +265 0x5333 //RX_FDDRC_SLANT_1_2 +266 0x5333 //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +286 0x0099 //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 +#VOL 6 +163 0x5000 //RX_TDDRC_ALPHA_UP_1 +164 0x5000 //RX_TDDRC_ALPHA_UP_2 +165 0x5000 //RX_TDDRC_ALPHA_UP_3 +166 0x2000 //RX_TDDRC_ALPHA_UP_4 +184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +190 0x65AD //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +269 0x0000 //RX_TDDRC_THRD_0 +270 0x0000 //RX_TDDRC_THRD_1 +271 0x1A00 //RX_TDDRC_THRD_2 +272 0x1A00 //RX_TDDRC_THRD_3 +273 0x3000 //RX_TDDRC_SLANT_0 +274 0x7EB8 //RX_TDDRC_SLANT_1 +275 0x5000 //RX_TDDRC_ALPHA_UP_0 +276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x199A //RX_TDDRC_HMNC_GAIN +279 0x0001 //RX_TDDRC_SMT_FLAG +280 0x0CCD //RX_TDDRC_SMT_W +281 0x01C8 //RX_TDDRC_DRC_GAIN +195 0x0020 //RX_FDEQ_SUBNUM +196 0x4848 //RX_FDEQ_GAIN_0 +197 0x4848 //RX_FDEQ_GAIN_1 +198 0x4848 //RX_FDEQ_GAIN_2 +199 0x4848 //RX_FDEQ_GAIN_3 +200 0x4848 //RX_FDEQ_GAIN_4 +201 0x4848 //RX_FDEQ_GAIN_5 +202 0x4848 //RX_FDEQ_GAIN_6 +203 0x4848 //RX_FDEQ_GAIN_7 +204 0x4848 //RX_FDEQ_GAIN_8 +205 0x4848 //RX_FDEQ_GAIN_9 +206 0x4848 //RX_FDEQ_GAIN_10 +207 0x4848 //RX_FDEQ_GAIN_11 +208 0x4848 //RX_FDEQ_GAIN_12 +209 0x4848 //RX_FDEQ_GAIN_13 +210 0x4848 //RX_FDEQ_GAIN_14 +211 0x4848 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0202 //RX_FDEQ_BIN_0 +221 0x0203 //RX_FDEQ_BIN_1 +222 0x0303 //RX_FDEQ_BIN_2 +223 0x0304 //RX_FDEQ_BIN_3 +224 0x0405 //RX_FDEQ_BIN_4 +225 0x0506 //RX_FDEQ_BIN_5 +226 0x0708 //RX_FDEQ_BIN_6 +227 0x090A //RX_FDEQ_BIN_7 +228 0x0B0C //RX_FDEQ_BIN_8 +229 0x0D0E //RX_FDEQ_BIN_9 +230 0x1013 //RX_FDEQ_BIN_10 +231 0x1719 //RX_FDEQ_BIN_11 +232 0x1B1E //RX_FDEQ_BIN_12 +233 0x1E1E //RX_FDEQ_BIN_13 +234 0x1E28 //RX_FDEQ_BIN_14 +235 0x282C //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x4000 //RX_FDEQ_RESRV_0 +245 0x0320 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0030 //RX_FDDRC_BAND_MARGIN_1 +248 0x0050 //RX_FDDRC_BAND_MARGIN_2 +249 0x0080 //RX_FDDRC_BAND_MARGIN_3 +250 0x0007 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x5000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x6400 //RX_FDDRC_THRD_3_2 +258 0x6400 //RX_FDDRC_THRD_3_3 +259 0x2000 //RX_FDDRC_SLANT_0_0 +260 0x2000 //RX_FDDRC_SLANT_0_1 +261 0x2000 //RX_FDDRC_SLANT_0_2 +262 0x2000 //RX_FDDRC_SLANT_0_3 +263 0x5333 //RX_FDDRC_SLANT_1_0 +264 0x5333 //RX_FDDRC_SLANT_1_1 +265 0x5333 //RX_FDDRC_SLANT_1_2 +266 0x5333 //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +286 0x0100 //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 #CASE_NAME HEADSET-GOOGLE_CONDOR-VOICE_GENERIC-FB -#PARAM_MODE FULL -#PARAM_TYPE TX+RX -#TOTAL_CUSTOM_STEP 7 +#PARAM_MODE Full +#PARAM_TYPE TX+2RX +#TOTAL_CUSTOM_STEP 7+7 #TX 0 0x0009 //TX_OPERATION_MODE_0 1 0x0009 //TX_OPERATION_MODE_1 @@ -12537,10 +18949,10 @@ 248 0xF600 //TX_THR_SN_EST_6 249 0xF600 //TX_THR_SN_EST_7 250 0x0200 //TX_DELTA_THR_SN_EST_0 -251 0x0200 //TX_DELTA_THR_SN_EST_1 -252 0x0400 //TX_DELTA_THR_SN_EST_2 -253 0x0300 //TX_DELTA_THR_SN_EST_3 -254 0x0600 //TX_DELTA_THR_SN_EST_4 +251 0x0400 //TX_DELTA_THR_SN_EST_1 +252 0x0300 //TX_DELTA_THR_SN_EST_2 +253 0x0600 //TX_DELTA_THR_SN_EST_3 +254 0x0200 //TX_DELTA_THR_SN_EST_4 255 0x0200 //TX_DELTA_THR_SN_EST_5 256 0x0200 //TX_DELTA_THR_SN_EST_6 257 0x0200 //TX_DELTA_THR_SN_EST_7 @@ -12568,31 +18980,31 @@ 279 0x2000 //TX_B_POST_FLT_0 280 0x2000 //TX_B_POST_FLT_1 281 0x0012 //TX_NS_LVL_CTRL_0 -282 0x0019 //TX_NS_LVL_CTRL_1 +282 0x0016 //TX_NS_LVL_CTRL_1 283 0x0016 //TX_NS_LVL_CTRL_2 -284 0x0016 //TX_NS_LVL_CTRL_3 -285 0x0019 //TX_NS_LVL_CTRL_4 +284 0x0019 //TX_NS_LVL_CTRL_3 +285 0x0010 //TX_NS_LVL_CTRL_4 286 0x0010 //TX_NS_LVL_CTRL_5 -287 0x0010 //TX_NS_LVL_CTRL_6 +287 0x0019 //TX_NS_LVL_CTRL_6 288 0x0010 //TX_NS_LVL_CTRL_7 289 0x000C //TX_MIN_GAIN_S_0 -290 0x0011 //TX_MIN_GAIN_S_1 +290 0x000C //TX_MIN_GAIN_S_1 291 0x000C //TX_MIN_GAIN_S_2 -292 0x000C //TX_MIN_GAIN_S_3 -293 0x000F //TX_MIN_GAIN_S_4 +292 0x000F //TX_MIN_GAIN_S_3 +293 0x000C //TX_MIN_GAIN_S_4 294 0x000C //TX_MIN_GAIN_S_5 -295 0x000C //TX_MIN_GAIN_S_6 +295 0x0011 //TX_MIN_GAIN_S_6 296 0x000C //TX_MIN_GAIN_S_7 297 0x7FFF //TX_NMOS_SUP 298 0x0000 //TX_NS_MAX_PRI_SNR_TH 299 0x0000 //TX_NMOS_SUP_MENSA 300 0x7000 //TX_SNRI_SUP_0 -301 0x6000 //TX_SNRI_SUP_1 +301 0x7000 //TX_SNRI_SUP_1 302 0x7000 //TX_SNRI_SUP_2 -303 0x7000 //TX_SNRI_SUP_3 -304 0x6000 //TX_SNRI_SUP_4 +303 0x6000 //TX_SNRI_SUP_3 +304 0x7FFF //TX_SNRI_SUP_4 305 0x7FFF //TX_SNRI_SUP_5 -306 0x7FFF //TX_SNRI_SUP_6 +306 0x6000 //TX_SNRI_SUP_6 307 0x7FFF //TX_SNRI_SUP_7 308 0x7FFF //TX_THR_LFNS 309 0x0016 //TX_G_LFNS @@ -12609,8 +19021,8 @@ 320 0x6000 //TX_A_POST_FILT_S_6 321 0x6000 //TX_A_POST_FILT_S_7 322 0x2000 //TX_B_POST_FILT_0 -323 0x2000 //TX_B_POST_FILT_1 -324 0x4000 //TX_B_POST_FILT_2 +323 0x4000 //TX_B_POST_FILT_1 +324 0x2000 //TX_B_POST_FILT_2 325 0x2000 //TX_B_POST_FILT_3 326 0x2000 //TX_B_POST_FILT_4 327 0x2000 //TX_B_POST_FILT_5 @@ -12653,7 +19065,7 @@ 364 0x0000 //TX_K_APT 365 0x0001 //TX_NOISEDET 366 0x0190 //TX_NDETCT -367 0x0020 //TX_NOISE_TH_0 +367 0x04E8 //TX_NOISE_TH_0 368 0x7FFF //TX_NOISE_TH_0_2 369 0x7FFF //TX_NOISE_TH_0_3 370 0x02A6 //TX_NOISE_TH_1 @@ -12665,11 +19077,11 @@ 376 0x0001 //TX_NOISE_TH_5_3 377 0x0000 //TX_NOISE_TH_5_4 378 0x02BC //TX_NOISE_TH_6 -379 0x0020 //TX_MINENOISE_TH -380 0x4000 //TX_MINENOISE_MIC0_TH_MTS -381 0xFFEE //TX_MINENOISE_MIC0_TH_EXP -382 0x6000 //TX_MINENOISE_MIC0_S_TH_MTS -383 0xFFF3 //TX_MINENOISE_MIC0_S_TH_EXP +379 0x02BC //TX_MINENOISE_TH +380 0xD508 //TX_MORENS_TFMASK_TH +381 0x0001 //TX_DRC_QUIET_FLOOR +382 0x3A98 //TX_RATIODTL_CUT_TH +383 0x1482 //TX_DT_CUT_K1 384 0x0666 //TX_OUT_ENER_S_TH_CLEAN 385 0x0666 //TX_OUT_ENER_S_TH_LESSCLEAN 386 0x0333 //TX_OUT_ENER_S_TH_NOISY @@ -12677,22 +19089,22 @@ 388 0x0333 //TX_OUT_ENER_TH_SPEECH 389 0x2000 //TX_SN_NPB_GAIN 390 0x0000 //TX_NN_NPB_GAIN -391 0x0000 //TX_CSX_ALPHA_0 -392 0x0000 //TX_CSX_ALPHA_1 -393 0x0000 //TX_CSX_ALPHA_2 -394 0x0000 //TX_CSX_ALPHA_3 -395 0x0800 //TX_MU_ARSP_EST -396 0x00C8 //TX_P_OUTBEAM_MIN_TH +391 0x7FFF //TX_POST_MASK_SUP_HSNE +392 0x1388 //TX_TAIL_DET_TH +393 0x4000 //TX_B_LESSCUT_RTO_WTA +394 0x0000 //TX_MEL_G_R +395 0x0080 //TX_SUPHIGH_TH +396 0x0000 //TX_MASK_G_R 397 0x0002 //TX_EXTRA_NS_L -398 0x0800 //TX_EXTRA_NS_A -399 0x0005 //TX_VR_NOISE_FLOOR_TH +398 0x1800 //TX_C_POST_FLT_MASK +399 0x7FFF //TX_A_POST_FLT_WNS 400 0x0148 //TX_MIN_G_LOW300HZ 401 0x0004 //TX_MAXLEVEL_CNG 402 0x00B4 //TX_STN_NOISE_TH 403 0x4000 //TX_POST_MASK_SUP 404 0x7FFF //TX_POST_MASK_ADJUST 405 0x00C8 //TX_NS_ENOISE_MIC0_TH -406 0x0020 //TX_MINENOISE_MIC0_TH +406 0x04E7 //TX_MINENOISE_MIC0_TH 407 0x012C //TX_MINENOISE_MIC0_S_TH 408 0x2900 //TX_MIN_G_CTRL_SSNS 409 0x0800 //TX_METAL_RTO_THR @@ -12800,16 +19212,16 @@ 511 0x6666 //TX_MIC_TO_BFGAIN 512 0x0000 //TX_MICTOBFGAIN0 513 0x0000 //TX_FASTMUE_TH -514 0x0000 //TX_DERVB_LEN_0 -515 0x0000 //TX_DERVB_LEN_1 -516 0x0000 //TX_RHO_DERVB -517 0x0000 //TX_MIC_INDX_DERVB -518 0x0000 //TX_MU_DERVB -519 0x0000 //TX_DR_RESRV_0 -520 0x0000 //TX_DR_RESRV_1 -521 0x0000 //TX_DR_RESRV_2 -522 0x0000 //TX_DR_RESRV_3 -523 0x0000 //TX_DR_RESRV_4 +514 0xC000 //TX_DEREVERB_LF_MU +515 0xC000 //TX_DEREVERB_HF_MU +516 0xCCCC //TX_DEREVERB_DELAY +517 0xD999 //TX_DEREVERB_COEF_LEN +518 0x1F40 //TX_DEREVERB_DNR +519 0x0000 //TX_DEREVERB_ALPHA +520 0x0000 //TX_DEREVERB_BETA +521 0x0000 //TX_GSC_RTOL_TH +522 0x7000 //TX_GSC_RTOH_TH +523 0x0064 //TX_WIDE2_MEANHTH 524 0x0000 //TX_DR_RESRV_5 525 0x0000 //TX_DR_RESRV_6 526 0x0000 //TX_DR_RESRV_7 @@ -13183,8 +19595,73 @@ 894 0xC000 //TX_FASTNS_SSA_THHFL 895 0xCCCC //TX_FASTNS_SSA_THLFH 896 0xD999 //TX_FASTNS_SSA_THHFH +897 0x2339 //TX_SENDFUNC_REG_MICMUTE +898 0x0021 //TX_SENDFUNC_REG_MICMUTE1 +899 0x02BC //TX_MICMUTE_RATIO_THR +900 0x0140 //TX_MICMUTE_AMP_THR +901 0x0004 //TX_MICMUTE_HPF_IND +902 0x00C0 //TX_MICMUTE_LOG_EYR_TH +903 0x0008 //TX_MICMUTE_CVG_TIME +904 0x0008 //TX_MICMUTE_RELEASE_TIME +905 0x01FE //TX_MIC_VOLUME_MIC0MUTE +906 0x0020 //TX_MICMUTE_EPD_OFFSET_0 +907 0x001E //TX_MICMUTE_FRQ_AEC_L +908 0x7999 //TX_MICMUTE_EAD_THR +909 0x7FFF //TX_MICMUTE_LAMBDA_CB_NLE +910 0x7FFF //TX_MICMUTE_LAMBDA_RE_EST +911 0x4000 //TX_DTD_THR1_MICMUTE_0 +912 0x7000 //TX_DTD_THR1_MICMUTE_1 +913 0x7FFF //TX_DTD_THR1_MICMUTE_2 +914 0x7FFF //TX_DTD_THR1_MICMUTE_3 +915 0x6CCC //TX_DTD_THR2_MICMUTE_0 +916 0x0400 //TX_MICMUTE_MIN_EQ_RE_EST_0 +917 0x0400 //TX_MICMUTE_MIN_EQ_RE_EST_1 +918 0x1000 //TX_MICMUTE_MIN_EQ_RE_EST_2 +919 0x7FFF //TX_MICMUTE_MIN_EQ_RE_EST_3 +920 0x7FFF //TX_MICMUTE_MIN_EQ_RE_EST_4 +921 0x4000 //TX_MICMUTE_C_POST_FLT +922 0x03E8 //TX_MICMUTE_DT_CUT_K +923 0x0001 //TX_MICMUTE_DT_CUT_THR +924 0x03E8 //TX_MICMUTE_DT_CUT_K2 +925 0x0001 //TX_MICMUTE_DT_CUT_THR2 +926 0x0064 //TX_MICMUTE_DT2_HOLD_N +927 0x1000 //TX_MICMUTE_RATIODTH_THCUT +928 0x1000 //TX_MICMUTE_B_POST_FLT_ECHOL +929 0x7FFF //TX_MICMUTE_B_POST_FLT_ECHOH +930 0x0400 //TX_MICMUTE_C_POST_FLT_MASK +931 0x7999 //TX_MICMUTE_RATIODTL_CUT_TH +932 0x0258 //TX_MICMUTE_DT_CUT_K1 +933 0x0800 //TX_MICMUTE_N2_SN_EST +934 0xFC00 //TX_MICMUTE_THR_SN_EST_0 +935 0x001C //TX_MICMUTE_MIN_G_CTRL_0 +936 0x6000 //TX_MICMUTE_A_POST_FILT_S_0 +937 0x7000 //TX_MICMUTE_B_POST_FILT_0 +938 0x2710 //TX_MIC1RUB_AMP_THR +939 0x0010 //TX_MIC1MUTE_RATIO_THR +940 0x0450 //TX_MIC1MUTE_AMP_THR +941 0x0008 //TX_MIC1MUTE_CVG_TIME +942 0x0008 //TX_MIC1MUTE_RELEASE_TIME +943 0x0000 //TX_AMS_RESRV_01 +944 0x0000 //TX_AMS_RESRV_02 +945 0x0000 //TX_AMS_RESRV_03 +946 0x0000 //TX_AMS_RESRV_04 +947 0x0000 //TX_AMS_RESRV_05 +948 0x0000 //TX_AMS_RESRV_06 +949 0x0000 //TX_AMS_RESRV_07 +950 0x0000 //TX_AMS_RESRV_08 +951 0x0000 //TX_AMS_RESRV_09 +952 0x0000 //TX_AMS_RESRV_10 +953 0x0000 //TX_AMS_RESRV_11 +954 0x0000 //TX_AMS_RESRV_12 +955 0x0000 //TX_AMS_RESRV_13 +956 0x0000 //TX_AMS_RESRV_14 +957 0x0000 //TX_AMS_RESRV_15 +958 0x0000 //TX_AMS_RESRV_16 +959 0x0000 //TX_AMS_RESRV_17 +960 0x0000 //TX_AMS_RESRV_18 +961 0x0000 //TX_AMS_RESRV_19 #RX -0 0x002C //RX_RECVFUNC_MODE_0 +0 0x202C //RX_RECVFUNC_MODE_0 1 0x0000 //RX_RECVFUNC_MODE_1 2 0x0004 //RX_SAMPLINGFREQ_SIG 3 0x0004 //RX_SAMPLINGFREQ_PROC @@ -14034,11 +20511,862 @@ 110 0x0000 //RX_FDDRC_RESRV_0 129 0x0100 //RX_SPK_VOL 130 0x0000 //RX_VOL_RESRV_0 +#RX 2 +157 0x202C //RX_RECVFUNC_MODE_0 +158 0x0000 //RX_RECVFUNC_MODE_1 +159 0x0004 //RX_SAMPLINGFREQ_SIG +160 0x0004 //RX_SAMPLINGFREQ_PROC +161 0x000A //RX_FRAME_SZ +162 0x0000 //RX_DELAY_OPT +163 0x1000 //RX_TDDRC_ALPHA_UP_1 +164 0x1000 //RX_TDDRC_ALPHA_UP_2 +165 0x1000 //RX_TDDRC_ALPHA_UP_3 +166 0x1000 //RX_TDDRC_ALPHA_UP_4 +167 0x0800 //RX_PGA +168 0x7B02 //RX_A_HP +169 0x4000 //RX_B_PE +170 0x7800 //RX_THR_PITCH_DET_0 +171 0x7000 //RX_THR_PITCH_DET_1 +172 0x6000 //RX_THR_PITCH_DET_2 +173 0x0008 //RX_PITCH_BFR_LEN +174 0x0003 //RX_SBD_PITCH_DET +175 0x0100 //RX_PP_RESRV_0 +176 0x0020 //RX_PP_RESRV_1 +177 0x0500 //RX_N_SN_EST +178 0x000C //RX_N2_SN_EST +179 0x000A //RX_NS_LVL_CTRL +180 0xF600 //RX_THR_SN_EST +181 0x7000 //RX_LAMBDA_PFILT +182 0x000A //RX_FENS_RESRV_0 +183 0x0190 //RX_FENS_RESRV_1 +184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +187 0x0002 //RX_EXTRA_NS_L +188 0x0800 //RX_EXTRA_NS_A +189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +190 0x7FFF //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +192 0x199A //RX_A_POST_FLT +193 0x0000 //RX_LMT_THRD +194 0x4000 //RX_LMT_ALPHA +195 0x0020 //RX_FDEQ_SUBNUM +196 0x4848 //RX_FDEQ_GAIN_0 +197 0x4848 //RX_FDEQ_GAIN_1 +198 0x4848 //RX_FDEQ_GAIN_2 +199 0x4848 //RX_FDEQ_GAIN_3 +200 0x4848 //RX_FDEQ_GAIN_4 +201 0x4848 //RX_FDEQ_GAIN_5 +202 0x4848 //RX_FDEQ_GAIN_6 +203 0x4848 //RX_FDEQ_GAIN_7 +204 0x4848 //RX_FDEQ_GAIN_8 +205 0x4848 //RX_FDEQ_GAIN_9 +206 0x4848 //RX_FDEQ_GAIN_10 +207 0x4848 //RX_FDEQ_GAIN_11 +208 0x4848 //RX_FDEQ_GAIN_12 +209 0x4848 //RX_FDEQ_GAIN_13 +210 0x4848 //RX_FDEQ_GAIN_14 +211 0x4848 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0202 //RX_FDEQ_BIN_0 +221 0x0203 //RX_FDEQ_BIN_1 +222 0x0304 //RX_FDEQ_BIN_2 +223 0x0405 //RX_FDEQ_BIN_3 +224 0x0607 //RX_FDEQ_BIN_4 +225 0x0809 //RX_FDEQ_BIN_5 +226 0x0A0B //RX_FDEQ_BIN_6 +227 0x0C0D //RX_FDEQ_BIN_7 +228 0x0E0F //RX_FDEQ_BIN_8 +229 0x1011 //RX_FDEQ_BIN_9 +230 0x1214 //RX_FDEQ_BIN_10 +231 0x1618 //RX_FDEQ_BIN_11 +232 0x1C1C //RX_FDEQ_BIN_12 +233 0x2020 //RX_FDEQ_BIN_13 +234 0x2020 //RX_FDEQ_BIN_14 +235 0x2011 //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x4000 //RX_FDEQ_RESRV_0 +245 0x0320 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0030 //RX_FDDRC_BAND_MARGIN_1 +248 0x0050 //RX_FDDRC_BAND_MARGIN_2 +249 0x0080 //RX_FDDRC_BAND_MARGIN_3 +250 0x0007 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x5000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x6400 //RX_FDDRC_THRD_3_2 +258 0x6400 //RX_FDDRC_THRD_3_3 +259 0x2000 //RX_FDDRC_SLANT_0_0 +260 0x2000 //RX_FDDRC_SLANT_0_1 +261 0x2000 //RX_FDDRC_SLANT_0_2 +262 0x2000 //RX_FDDRC_SLANT_0_3 +263 0x5333 //RX_FDDRC_SLANT_1_0 +264 0x5333 //RX_FDDRC_SLANT_1_1 +265 0x5333 //RX_FDDRC_SLANT_1_2 +266 0x5333 //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +268 0x0002 //RX_FILTINDX +269 0x0000 //RX_TDDRC_THRD_0 +270 0x0000 //RX_TDDRC_THRD_1 +271 0x1200 //RX_TDDRC_THRD_2 +272 0x1900 //RX_TDDRC_THRD_3 +273 0x3000 //RX_TDDRC_SLANT_0 +274 0x6E00 //RX_TDDRC_SLANT_1 +275 0x1000 //RX_TDDRC_ALPHA_UP_0 +276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x199A //RX_TDDRC_HMNC_GAIN +279 0x0001 //RX_TDDRC_SMT_FLAG +280 0x0CCD //RX_TDDRC_SMT_W +281 0x0240 //RX_TDDRC_DRC_GAIN +282 0x7C00 //RX_LAMBDA_PKA_FP +283 0x2000 //RX_TPKA_FP +284 0x2000 //RX_MIN_G_FP +285 0x0080 //RX_MAX_G_FP +286 0x000B //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 +288 0x0000 //RX_MAXLEVEL_CNG +289 0x3000 //RX_BWE_UV_TH +290 0x3000 //RX_BWE_UV_TH2 +291 0x1800 //RX_BWE_UV_TH3 +292 0x1000 //RX_BWE_V_TH +293 0x04CD //RX_BWE_GAIN1_V_TH1 +294 0x0F33 //RX_BWE_GAIN1_V_TH2 +295 0x7333 //RX_BWE_UV_EQ +296 0x199A //RX_BWE_V_EQ +297 0x7333 //RX_BWE_TONE_TH +298 0x0004 //RX_BWE_UV_HOLD_T +299 0x6CCD //RX_BWE_GAIN2_ALPHA +300 0x799A //RX_BWE_GAIN3_ALPHA +301 0x001E //RX_BWE_CUTOFF +302 0x3000 //RX_BWE_GAINFILL +303 0x3200 //RX_BWE_MAXTH_TONE +304 0x2000 //RX_BWE_EQ_0 +305 0x2000 //RX_BWE_EQ_1 +306 0x2000 //RX_BWE_EQ_2 +307 0x2000 //RX_BWE_EQ_3 +308 0x2000 //RX_BWE_EQ_4 +309 0x2000 //RX_BWE_EQ_5 +310 0x2000 //RX_BWE_EQ_6 +311 0x0000 //RX_BWE_RESRV_0 +312 0x0000 //RX_BWE_RESRV_1 +313 0x0000 //RX_BWE_RESRV_2 +#VOL 0 +163 0x1000 //RX_TDDRC_ALPHA_UP_1 +164 0x1000 //RX_TDDRC_ALPHA_UP_2 +165 0x1000 //RX_TDDRC_ALPHA_UP_3 +166 0x1000 //RX_TDDRC_ALPHA_UP_4 +184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +190 0x7FFF //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +269 0x0000 //RX_TDDRC_THRD_0 +270 0x0000 //RX_TDDRC_THRD_1 +271 0x1200 //RX_TDDRC_THRD_2 +272 0x1900 //RX_TDDRC_THRD_3 +273 0x3000 //RX_TDDRC_SLANT_0 +274 0x6E00 //RX_TDDRC_SLANT_1 +275 0x1000 //RX_TDDRC_ALPHA_UP_0 +276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x199A //RX_TDDRC_HMNC_GAIN +279 0x0001 //RX_TDDRC_SMT_FLAG +280 0x0CCD //RX_TDDRC_SMT_W +281 0x0240 //RX_TDDRC_DRC_GAIN +195 0x0020 //RX_FDEQ_SUBNUM +196 0x4848 //RX_FDEQ_GAIN_0 +197 0x4848 //RX_FDEQ_GAIN_1 +198 0x4848 //RX_FDEQ_GAIN_2 +199 0x4848 //RX_FDEQ_GAIN_3 +200 0x4848 //RX_FDEQ_GAIN_4 +201 0x4848 //RX_FDEQ_GAIN_5 +202 0x4848 //RX_FDEQ_GAIN_6 +203 0x4848 //RX_FDEQ_GAIN_7 +204 0x4848 //RX_FDEQ_GAIN_8 +205 0x4848 //RX_FDEQ_GAIN_9 +206 0x4848 //RX_FDEQ_GAIN_10 +207 0x4848 //RX_FDEQ_GAIN_11 +208 0x4848 //RX_FDEQ_GAIN_12 +209 0x4848 //RX_FDEQ_GAIN_13 +210 0x4848 //RX_FDEQ_GAIN_14 +211 0x4848 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0202 //RX_FDEQ_BIN_0 +221 0x0203 //RX_FDEQ_BIN_1 +222 0x0304 //RX_FDEQ_BIN_2 +223 0x0405 //RX_FDEQ_BIN_3 +224 0x0607 //RX_FDEQ_BIN_4 +225 0x0809 //RX_FDEQ_BIN_5 +226 0x0A0B //RX_FDEQ_BIN_6 +227 0x0C0D //RX_FDEQ_BIN_7 +228 0x0E0F //RX_FDEQ_BIN_8 +229 0x1011 //RX_FDEQ_BIN_9 +230 0x1214 //RX_FDEQ_BIN_10 +231 0x1618 //RX_FDEQ_BIN_11 +232 0x1C1C //RX_FDEQ_BIN_12 +233 0x2020 //RX_FDEQ_BIN_13 +234 0x2020 //RX_FDEQ_BIN_14 +235 0x2011 //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x4000 //RX_FDEQ_RESRV_0 +245 0x0320 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0030 //RX_FDDRC_BAND_MARGIN_1 +248 0x0050 //RX_FDDRC_BAND_MARGIN_2 +249 0x0080 //RX_FDDRC_BAND_MARGIN_3 +250 0x0007 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x5000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x6400 //RX_FDDRC_THRD_3_2 +258 0x6400 //RX_FDDRC_THRD_3_3 +259 0x2000 //RX_FDDRC_SLANT_0_0 +260 0x2000 //RX_FDDRC_SLANT_0_1 +261 0x2000 //RX_FDDRC_SLANT_0_2 +262 0x2000 //RX_FDDRC_SLANT_0_3 +263 0x5333 //RX_FDDRC_SLANT_1_0 +264 0x5333 //RX_FDDRC_SLANT_1_1 +265 0x5333 //RX_FDDRC_SLANT_1_2 +266 0x5333 //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +286 0x000B //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 +#VOL 1 +163 0x1000 //RX_TDDRC_ALPHA_UP_1 +164 0x1000 //RX_TDDRC_ALPHA_UP_2 +165 0x1000 //RX_TDDRC_ALPHA_UP_3 +166 0x1000 //RX_TDDRC_ALPHA_UP_4 +184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +190 0x7FFF //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +269 0x0000 //RX_TDDRC_THRD_0 +270 0x0000 //RX_TDDRC_THRD_1 +271 0x1200 //RX_TDDRC_THRD_2 +272 0x1900 //RX_TDDRC_THRD_3 +273 0x3000 //RX_TDDRC_SLANT_0 +274 0x6E00 //RX_TDDRC_SLANT_1 +275 0x1000 //RX_TDDRC_ALPHA_UP_0 +276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x199A //RX_TDDRC_HMNC_GAIN +279 0x0001 //RX_TDDRC_SMT_FLAG +280 0x0CCD //RX_TDDRC_SMT_W +281 0x0240 //RX_TDDRC_DRC_GAIN +195 0x0020 //RX_FDEQ_SUBNUM +196 0x4848 //RX_FDEQ_GAIN_0 +197 0x4848 //RX_FDEQ_GAIN_1 +198 0x4848 //RX_FDEQ_GAIN_2 +199 0x4848 //RX_FDEQ_GAIN_3 +200 0x4848 //RX_FDEQ_GAIN_4 +201 0x4848 //RX_FDEQ_GAIN_5 +202 0x4848 //RX_FDEQ_GAIN_6 +203 0x4848 //RX_FDEQ_GAIN_7 +204 0x4848 //RX_FDEQ_GAIN_8 +205 0x4848 //RX_FDEQ_GAIN_9 +206 0x4848 //RX_FDEQ_GAIN_10 +207 0x4848 //RX_FDEQ_GAIN_11 +208 0x4848 //RX_FDEQ_GAIN_12 +209 0x4848 //RX_FDEQ_GAIN_13 +210 0x4848 //RX_FDEQ_GAIN_14 +211 0x4848 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0202 //RX_FDEQ_BIN_0 +221 0x0203 //RX_FDEQ_BIN_1 +222 0x0304 //RX_FDEQ_BIN_2 +223 0x0405 //RX_FDEQ_BIN_3 +224 0x0607 //RX_FDEQ_BIN_4 +225 0x0809 //RX_FDEQ_BIN_5 +226 0x0A0B //RX_FDEQ_BIN_6 +227 0x0C0D //RX_FDEQ_BIN_7 +228 0x0E0F //RX_FDEQ_BIN_8 +229 0x1011 //RX_FDEQ_BIN_9 +230 0x1214 //RX_FDEQ_BIN_10 +231 0x1618 //RX_FDEQ_BIN_11 +232 0x1C1C //RX_FDEQ_BIN_12 +233 0x2020 //RX_FDEQ_BIN_13 +234 0x2020 //RX_FDEQ_BIN_14 +235 0x2011 //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x4000 //RX_FDEQ_RESRV_0 +245 0x0320 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0030 //RX_FDDRC_BAND_MARGIN_1 +248 0x0050 //RX_FDDRC_BAND_MARGIN_2 +249 0x0080 //RX_FDDRC_BAND_MARGIN_3 +250 0x0007 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x5000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x6400 //RX_FDDRC_THRD_3_2 +258 0x6400 //RX_FDDRC_THRD_3_3 +259 0x2000 //RX_FDDRC_SLANT_0_0 +260 0x2000 //RX_FDDRC_SLANT_0_1 +261 0x2000 //RX_FDDRC_SLANT_0_2 +262 0x2000 //RX_FDDRC_SLANT_0_3 +263 0x5333 //RX_FDDRC_SLANT_1_0 +264 0x5333 //RX_FDDRC_SLANT_1_1 +265 0x5333 //RX_FDDRC_SLANT_1_2 +266 0x5333 //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +286 0x0013 //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 +#VOL 2 +163 0x1000 //RX_TDDRC_ALPHA_UP_1 +164 0x1000 //RX_TDDRC_ALPHA_UP_2 +165 0x1000 //RX_TDDRC_ALPHA_UP_3 +166 0x1000 //RX_TDDRC_ALPHA_UP_4 +184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +190 0x7FFF //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +269 0x0000 //RX_TDDRC_THRD_0 +270 0x0000 //RX_TDDRC_THRD_1 +271 0x1200 //RX_TDDRC_THRD_2 +272 0x1900 //RX_TDDRC_THRD_3 +273 0x3000 //RX_TDDRC_SLANT_0 +274 0x6E00 //RX_TDDRC_SLANT_1 +275 0x1000 //RX_TDDRC_ALPHA_UP_0 +276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x199A //RX_TDDRC_HMNC_GAIN +279 0x0001 //RX_TDDRC_SMT_FLAG +280 0x0CCD //RX_TDDRC_SMT_W +281 0x0240 //RX_TDDRC_DRC_GAIN +195 0x0020 //RX_FDEQ_SUBNUM +196 0x4848 //RX_FDEQ_GAIN_0 +197 0x4848 //RX_FDEQ_GAIN_1 +198 0x4848 //RX_FDEQ_GAIN_2 +199 0x4848 //RX_FDEQ_GAIN_3 +200 0x4848 //RX_FDEQ_GAIN_4 +201 0x4848 //RX_FDEQ_GAIN_5 +202 0x4848 //RX_FDEQ_GAIN_6 +203 0x4848 //RX_FDEQ_GAIN_7 +204 0x4848 //RX_FDEQ_GAIN_8 +205 0x4848 //RX_FDEQ_GAIN_9 +206 0x4848 //RX_FDEQ_GAIN_10 +207 0x4848 //RX_FDEQ_GAIN_11 +208 0x4848 //RX_FDEQ_GAIN_12 +209 0x4848 //RX_FDEQ_GAIN_13 +210 0x4848 //RX_FDEQ_GAIN_14 +211 0x4848 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0202 //RX_FDEQ_BIN_0 +221 0x0203 //RX_FDEQ_BIN_1 +222 0x0304 //RX_FDEQ_BIN_2 +223 0x0405 //RX_FDEQ_BIN_3 +224 0x0607 //RX_FDEQ_BIN_4 +225 0x0809 //RX_FDEQ_BIN_5 +226 0x0A0B //RX_FDEQ_BIN_6 +227 0x0C0D //RX_FDEQ_BIN_7 +228 0x0E0F //RX_FDEQ_BIN_8 +229 0x1011 //RX_FDEQ_BIN_9 +230 0x1214 //RX_FDEQ_BIN_10 +231 0x1618 //RX_FDEQ_BIN_11 +232 0x1C1C //RX_FDEQ_BIN_12 +233 0x2020 //RX_FDEQ_BIN_13 +234 0x2020 //RX_FDEQ_BIN_14 +235 0x2011 //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x4000 //RX_FDEQ_RESRV_0 +245 0x0320 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0030 //RX_FDDRC_BAND_MARGIN_1 +248 0x0050 //RX_FDDRC_BAND_MARGIN_2 +249 0x0080 //RX_FDDRC_BAND_MARGIN_3 +250 0x0007 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x5000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x6400 //RX_FDDRC_THRD_3_2 +258 0x6400 //RX_FDDRC_THRD_3_3 +259 0x2000 //RX_FDDRC_SLANT_0_0 +260 0x2000 //RX_FDDRC_SLANT_0_1 +261 0x2000 //RX_FDDRC_SLANT_0_2 +262 0x2000 //RX_FDDRC_SLANT_0_3 +263 0x5333 //RX_FDDRC_SLANT_1_0 +264 0x5333 //RX_FDDRC_SLANT_1_1 +265 0x5333 //RX_FDDRC_SLANT_1_2 +266 0x5333 //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +286 0x0020 //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 +#VOL 3 +163 0x1000 //RX_TDDRC_ALPHA_UP_1 +164 0x1000 //RX_TDDRC_ALPHA_UP_2 +165 0x1000 //RX_TDDRC_ALPHA_UP_3 +166 0x1000 //RX_TDDRC_ALPHA_UP_4 +184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +190 0x7FFF //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +269 0x0000 //RX_TDDRC_THRD_0 +270 0x0000 //RX_TDDRC_THRD_1 +271 0x1200 //RX_TDDRC_THRD_2 +272 0x1900 //RX_TDDRC_THRD_3 +273 0x3000 //RX_TDDRC_SLANT_0 +274 0x6E00 //RX_TDDRC_SLANT_1 +275 0x1000 //RX_TDDRC_ALPHA_UP_0 +276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x199A //RX_TDDRC_HMNC_GAIN +279 0x0001 //RX_TDDRC_SMT_FLAG +280 0x0CCD //RX_TDDRC_SMT_W +281 0x0240 //RX_TDDRC_DRC_GAIN +195 0x0020 //RX_FDEQ_SUBNUM +196 0x4848 //RX_FDEQ_GAIN_0 +197 0x4848 //RX_FDEQ_GAIN_1 +198 0x4848 //RX_FDEQ_GAIN_2 +199 0x4848 //RX_FDEQ_GAIN_3 +200 0x4848 //RX_FDEQ_GAIN_4 +201 0x4848 //RX_FDEQ_GAIN_5 +202 0x4848 //RX_FDEQ_GAIN_6 +203 0x4848 //RX_FDEQ_GAIN_7 +204 0x4848 //RX_FDEQ_GAIN_8 +205 0x4848 //RX_FDEQ_GAIN_9 +206 0x4848 //RX_FDEQ_GAIN_10 +207 0x4848 //RX_FDEQ_GAIN_11 +208 0x4848 //RX_FDEQ_GAIN_12 +209 0x4848 //RX_FDEQ_GAIN_13 +210 0x4848 //RX_FDEQ_GAIN_14 +211 0x4848 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0202 //RX_FDEQ_BIN_0 +221 0x0203 //RX_FDEQ_BIN_1 +222 0x0304 //RX_FDEQ_BIN_2 +223 0x0405 //RX_FDEQ_BIN_3 +224 0x0607 //RX_FDEQ_BIN_4 +225 0x0809 //RX_FDEQ_BIN_5 +226 0x0A0B //RX_FDEQ_BIN_6 +227 0x0C0D //RX_FDEQ_BIN_7 +228 0x0E0F //RX_FDEQ_BIN_8 +229 0x1011 //RX_FDEQ_BIN_9 +230 0x1214 //RX_FDEQ_BIN_10 +231 0x1618 //RX_FDEQ_BIN_11 +232 0x1C1C //RX_FDEQ_BIN_12 +233 0x2020 //RX_FDEQ_BIN_13 +234 0x2020 //RX_FDEQ_BIN_14 +235 0x2011 //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x4000 //RX_FDEQ_RESRV_0 +245 0x0320 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0030 //RX_FDDRC_BAND_MARGIN_1 +248 0x0050 //RX_FDDRC_BAND_MARGIN_2 +249 0x0080 //RX_FDDRC_BAND_MARGIN_3 +250 0x0007 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x5000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x6400 //RX_FDDRC_THRD_3_2 +258 0x6400 //RX_FDDRC_THRD_3_3 +259 0x2000 //RX_FDDRC_SLANT_0_0 +260 0x2000 //RX_FDDRC_SLANT_0_1 +261 0x2000 //RX_FDDRC_SLANT_0_2 +262 0x2000 //RX_FDDRC_SLANT_0_3 +263 0x5333 //RX_FDDRC_SLANT_1_0 +264 0x5333 //RX_FDDRC_SLANT_1_1 +265 0x5333 //RX_FDDRC_SLANT_1_2 +266 0x5333 //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +286 0x0036 //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 +#VOL 4 +163 0x1000 //RX_TDDRC_ALPHA_UP_1 +164 0x1000 //RX_TDDRC_ALPHA_UP_2 +165 0x1000 //RX_TDDRC_ALPHA_UP_3 +166 0x1000 //RX_TDDRC_ALPHA_UP_4 +184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +190 0x7FFF //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +269 0x0000 //RX_TDDRC_THRD_0 +270 0x0000 //RX_TDDRC_THRD_1 +271 0x1200 //RX_TDDRC_THRD_2 +272 0x1900 //RX_TDDRC_THRD_3 +273 0x3000 //RX_TDDRC_SLANT_0 +274 0x6E00 //RX_TDDRC_SLANT_1 +275 0x1000 //RX_TDDRC_ALPHA_UP_0 +276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x199A //RX_TDDRC_HMNC_GAIN +279 0x0001 //RX_TDDRC_SMT_FLAG +280 0x0CCD //RX_TDDRC_SMT_W +281 0x0240 //RX_TDDRC_DRC_GAIN +195 0x0020 //RX_FDEQ_SUBNUM +196 0x4848 //RX_FDEQ_GAIN_0 +197 0x4848 //RX_FDEQ_GAIN_1 +198 0x4848 //RX_FDEQ_GAIN_2 +199 0x4848 //RX_FDEQ_GAIN_3 +200 0x4848 //RX_FDEQ_GAIN_4 +201 0x4848 //RX_FDEQ_GAIN_5 +202 0x4848 //RX_FDEQ_GAIN_6 +203 0x4848 //RX_FDEQ_GAIN_7 +204 0x4848 //RX_FDEQ_GAIN_8 +205 0x4848 //RX_FDEQ_GAIN_9 +206 0x4848 //RX_FDEQ_GAIN_10 +207 0x4848 //RX_FDEQ_GAIN_11 +208 0x4848 //RX_FDEQ_GAIN_12 +209 0x4848 //RX_FDEQ_GAIN_13 +210 0x4848 //RX_FDEQ_GAIN_14 +211 0x4848 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0202 //RX_FDEQ_BIN_0 +221 0x0203 //RX_FDEQ_BIN_1 +222 0x0304 //RX_FDEQ_BIN_2 +223 0x0405 //RX_FDEQ_BIN_3 +224 0x0607 //RX_FDEQ_BIN_4 +225 0x0809 //RX_FDEQ_BIN_5 +226 0x0A0B //RX_FDEQ_BIN_6 +227 0x0C0D //RX_FDEQ_BIN_7 +228 0x0E0F //RX_FDEQ_BIN_8 +229 0x1011 //RX_FDEQ_BIN_9 +230 0x1214 //RX_FDEQ_BIN_10 +231 0x1618 //RX_FDEQ_BIN_11 +232 0x1C1C //RX_FDEQ_BIN_12 +233 0x2020 //RX_FDEQ_BIN_13 +234 0x2020 //RX_FDEQ_BIN_14 +235 0x2011 //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x4000 //RX_FDEQ_RESRV_0 +245 0x0320 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0030 //RX_FDDRC_BAND_MARGIN_1 +248 0x0050 //RX_FDDRC_BAND_MARGIN_2 +249 0x0080 //RX_FDDRC_BAND_MARGIN_3 +250 0x0007 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x5000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x6400 //RX_FDDRC_THRD_3_2 +258 0x6400 //RX_FDDRC_THRD_3_3 +259 0x2000 //RX_FDDRC_SLANT_0_0 +260 0x2000 //RX_FDDRC_SLANT_0_1 +261 0x2000 //RX_FDDRC_SLANT_0_2 +262 0x2000 //RX_FDDRC_SLANT_0_3 +263 0x5333 //RX_FDDRC_SLANT_1_0 +264 0x5333 //RX_FDDRC_SLANT_1_1 +265 0x5333 //RX_FDDRC_SLANT_1_2 +266 0x5333 //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +286 0x005B //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 +#VOL 5 +163 0x1000 //RX_TDDRC_ALPHA_UP_1 +164 0x1000 //RX_TDDRC_ALPHA_UP_2 +165 0x1000 //RX_TDDRC_ALPHA_UP_3 +166 0x1000 //RX_TDDRC_ALPHA_UP_4 +184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +190 0x7FFF //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +269 0x0000 //RX_TDDRC_THRD_0 +270 0x0000 //RX_TDDRC_THRD_1 +271 0x1200 //RX_TDDRC_THRD_2 +272 0x1900 //RX_TDDRC_THRD_3 +273 0x3000 //RX_TDDRC_SLANT_0 +274 0x6E00 //RX_TDDRC_SLANT_1 +275 0x1000 //RX_TDDRC_ALPHA_UP_0 +276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x199A //RX_TDDRC_HMNC_GAIN +279 0x0001 //RX_TDDRC_SMT_FLAG +280 0x0CCD //RX_TDDRC_SMT_W +281 0x0240 //RX_TDDRC_DRC_GAIN +195 0x0020 //RX_FDEQ_SUBNUM +196 0x4848 //RX_FDEQ_GAIN_0 +197 0x4848 //RX_FDEQ_GAIN_1 +198 0x4848 //RX_FDEQ_GAIN_2 +199 0x4848 //RX_FDEQ_GAIN_3 +200 0x4848 //RX_FDEQ_GAIN_4 +201 0x4848 //RX_FDEQ_GAIN_5 +202 0x4848 //RX_FDEQ_GAIN_6 +203 0x4848 //RX_FDEQ_GAIN_7 +204 0x4848 //RX_FDEQ_GAIN_8 +205 0x4848 //RX_FDEQ_GAIN_9 +206 0x4848 //RX_FDEQ_GAIN_10 +207 0x4848 //RX_FDEQ_GAIN_11 +208 0x4848 //RX_FDEQ_GAIN_12 +209 0x4848 //RX_FDEQ_GAIN_13 +210 0x4848 //RX_FDEQ_GAIN_14 +211 0x4848 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0202 //RX_FDEQ_BIN_0 +221 0x0203 //RX_FDEQ_BIN_1 +222 0x0304 //RX_FDEQ_BIN_2 +223 0x0405 //RX_FDEQ_BIN_3 +224 0x0607 //RX_FDEQ_BIN_4 +225 0x0809 //RX_FDEQ_BIN_5 +226 0x0A0B //RX_FDEQ_BIN_6 +227 0x0C0D //RX_FDEQ_BIN_7 +228 0x0E0F //RX_FDEQ_BIN_8 +229 0x1011 //RX_FDEQ_BIN_9 +230 0x1214 //RX_FDEQ_BIN_10 +231 0x1618 //RX_FDEQ_BIN_11 +232 0x1C1C //RX_FDEQ_BIN_12 +233 0x2020 //RX_FDEQ_BIN_13 +234 0x2020 //RX_FDEQ_BIN_14 +235 0x2011 //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x4000 //RX_FDEQ_RESRV_0 +245 0x0320 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0030 //RX_FDDRC_BAND_MARGIN_1 +248 0x0050 //RX_FDDRC_BAND_MARGIN_2 +249 0x0080 //RX_FDDRC_BAND_MARGIN_3 +250 0x0007 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x5000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x6400 //RX_FDDRC_THRD_3_2 +258 0x6400 //RX_FDDRC_THRD_3_3 +259 0x2000 //RX_FDDRC_SLANT_0_0 +260 0x2000 //RX_FDDRC_SLANT_0_1 +261 0x2000 //RX_FDDRC_SLANT_0_2 +262 0x2000 //RX_FDDRC_SLANT_0_3 +263 0x5333 //RX_FDDRC_SLANT_1_0 +264 0x5333 //RX_FDDRC_SLANT_1_1 +265 0x5333 //RX_FDDRC_SLANT_1_2 +266 0x5333 //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +286 0x0099 //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 +#VOL 6 +163 0x1000 //RX_TDDRC_ALPHA_UP_1 +164 0x1000 //RX_TDDRC_ALPHA_UP_2 +165 0x1000 //RX_TDDRC_ALPHA_UP_3 +166 0x1000 //RX_TDDRC_ALPHA_UP_4 +184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +190 0x7FFF //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +269 0x0000 //RX_TDDRC_THRD_0 +270 0x0000 //RX_TDDRC_THRD_1 +271 0x1200 //RX_TDDRC_THRD_2 +272 0x1900 //RX_TDDRC_THRD_3 +273 0x3000 //RX_TDDRC_SLANT_0 +274 0x6E00 //RX_TDDRC_SLANT_1 +275 0x1000 //RX_TDDRC_ALPHA_UP_0 +276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x199A //RX_TDDRC_HMNC_GAIN +279 0x0001 //RX_TDDRC_SMT_FLAG +280 0x0CCD //RX_TDDRC_SMT_W +281 0x0240 //RX_TDDRC_DRC_GAIN +195 0x0020 //RX_FDEQ_SUBNUM +196 0x4848 //RX_FDEQ_GAIN_0 +197 0x4848 //RX_FDEQ_GAIN_1 +198 0x4848 //RX_FDEQ_GAIN_2 +199 0x4848 //RX_FDEQ_GAIN_3 +200 0x4848 //RX_FDEQ_GAIN_4 +201 0x4848 //RX_FDEQ_GAIN_5 +202 0x4848 //RX_FDEQ_GAIN_6 +203 0x4848 //RX_FDEQ_GAIN_7 +204 0x4848 //RX_FDEQ_GAIN_8 +205 0x4848 //RX_FDEQ_GAIN_9 +206 0x4848 //RX_FDEQ_GAIN_10 +207 0x4848 //RX_FDEQ_GAIN_11 +208 0x4848 //RX_FDEQ_GAIN_12 +209 0x4848 //RX_FDEQ_GAIN_13 +210 0x4848 //RX_FDEQ_GAIN_14 +211 0x4848 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0202 //RX_FDEQ_BIN_0 +221 0x0203 //RX_FDEQ_BIN_1 +222 0x0304 //RX_FDEQ_BIN_2 +223 0x0405 //RX_FDEQ_BIN_3 +224 0x0607 //RX_FDEQ_BIN_4 +225 0x0809 //RX_FDEQ_BIN_5 +226 0x0A0B //RX_FDEQ_BIN_6 +227 0x0C0D //RX_FDEQ_BIN_7 +228 0x0E0F //RX_FDEQ_BIN_8 +229 0x1011 //RX_FDEQ_BIN_9 +230 0x1214 //RX_FDEQ_BIN_10 +231 0x1618 //RX_FDEQ_BIN_11 +232 0x1C1C //RX_FDEQ_BIN_12 +233 0x2020 //RX_FDEQ_BIN_13 +234 0x2020 //RX_FDEQ_BIN_14 +235 0x2011 //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x4000 //RX_FDEQ_RESRV_0 +245 0x0320 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0030 //RX_FDDRC_BAND_MARGIN_1 +248 0x0050 //RX_FDDRC_BAND_MARGIN_2 +249 0x0080 //RX_FDDRC_BAND_MARGIN_3 +250 0x0007 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x5000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x6400 //RX_FDDRC_THRD_3_2 +258 0x6400 //RX_FDDRC_THRD_3_3 +259 0x2000 //RX_FDDRC_SLANT_0_0 +260 0x2000 //RX_FDDRC_SLANT_0_1 +261 0x2000 //RX_FDDRC_SLANT_0_2 +262 0x2000 //RX_FDDRC_SLANT_0_3 +263 0x5333 //RX_FDDRC_SLANT_1_0 +264 0x5333 //RX_FDDRC_SLANT_1_1 +265 0x5333 //RX_FDDRC_SLANT_1_2 +266 0x5333 //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +286 0x0100 //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 #CASE_NAME HEADSET-RESERVE1-VOICE_GENERIC-NB -#PARAM_MODE FULL -#PARAM_TYPE TX+RX -#TOTAL_CUSTOM_STEP 7 +#PARAM_MODE Full +#PARAM_TYPE TX+2RX +#TOTAL_CUSTOM_STEP 7+7 #TX 0 0x0009 //TX_OPERATION_MODE_0 1 0x0008 //TX_OPERATION_MODE_1 @@ -14355,20 +21683,20 @@ 312 0x7FFF //TX_A_POST_FILT_0 313 0x2000 //TX_A_POST_FILT_1 314 0x4000 //TX_A_POST_FILT_S_0 -315 0x4000 //TX_A_POST_FILT_S_1 -316 0x1000 //TX_A_POST_FILT_S_2 +315 0x1000 //TX_A_POST_FILT_S_1 +316 0x4000 //TX_A_POST_FILT_S_2 317 0x4000 //TX_A_POST_FILT_S_3 318 0x4000 //TX_A_POST_FILT_S_4 319 0x4000 //TX_A_POST_FILT_S_5 320 0x4000 //TX_A_POST_FILT_S_6 321 0x4000 //TX_A_POST_FILT_S_7 322 0x0400 //TX_B_POST_FILT_0 -323 0x0400 //TX_B_POST_FILT_1 +323 0x2000 //TX_B_POST_FILT_1 324 0x2000 //TX_B_POST_FILT_2 325 0x2000 //TX_B_POST_FILT_3 326 0x2000 //TX_B_POST_FILT_4 327 0x2000 //TX_B_POST_FILT_5 -328 0x2000 //TX_B_POST_FILT_6 +328 0x0400 //TX_B_POST_FILT_6 329 0x2000 //TX_B_POST_FILT_7 330 0x7FFF //TX_B_LESSCUT_RTO_S_0 331 0x7FFF //TX_B_LESSCUT_RTO_S_1 @@ -14407,7 +21735,7 @@ 364 0x0000 //TX_K_APT 365 0x0001 //TX_NOISEDET 366 0x0190 //TX_NDETCT -367 0x000A //TX_NOISE_TH_0 +367 0x003B //TX_NOISE_TH_0 368 0x1B58 //TX_NOISE_TH_0_2 369 0x2134 //TX_NOISE_TH_0_3 370 0x02BC //TX_NOISE_TH_1 @@ -14419,11 +21747,11 @@ 376 0x0000 //TX_NOISE_TH_5_3 377 0x0000 //TX_NOISE_TH_5_4 378 0x0032 //TX_NOISE_TH_6 -379 0x0014 //TX_MINENOISE_TH -380 0x4000 //TX_MINENOISE_MIC0_TH_MTS -381 0xFFEE //TX_MINENOISE_MIC0_TH_EXP -382 0x6000 //TX_MINENOISE_MIC0_S_TH_MTS -383 0xFFF3 //TX_MINENOISE_MIC0_S_TH_EXP +379 0x00C8 //TX_MINENOISE_TH +380 0xD508 //TX_MORENS_TFMASK_TH +381 0x0001 //TX_DRC_QUIET_FLOOR +382 0x3A98 //TX_RATIODTL_CUT_TH +383 0x0DAC //TX_DT_CUT_K1 384 0x00A5 //TX_OUT_ENER_S_TH_CLEAN 385 0x00A5 //TX_OUT_ENER_S_TH_LESSCLEAN 386 0x00A5 //TX_OUT_ENER_S_TH_NOISY @@ -14431,22 +21759,22 @@ 388 0x00CE //TX_OUT_ENER_TH_SPEECH 389 0x2000 //TX_SN_NPB_GAIN 390 0x0000 //TX_NN_NPB_GAIN -391 0x0000 //TX_CSX_ALPHA_0 -392 0x0000 //TX_CSX_ALPHA_1 -393 0x0000 //TX_CSX_ALPHA_2 -394 0x0000 //TX_CSX_ALPHA_3 -395 0x0800 //TX_MU_ARSP_EST -396 0x00C8 //TX_P_OUTBEAM_MIN_TH +391 0x7FFF //TX_POST_MASK_SUP_HSNE +392 0x1388 //TX_TAIL_DET_TH +393 0x4000 //TX_B_LESSCUT_RTO_WTA +394 0x0000 //TX_MEL_G_R +395 0x0080 //TX_SUPHIGH_TH +396 0x0000 //TX_MASK_G_R 397 0x0002 //TX_EXTRA_NS_L -398 0x0800 //TX_EXTRA_NS_A -399 0x0005 //TX_VR_NOISE_FLOOR_TH +398 0x1800 //TX_C_POST_FLT_MASK +399 0x7FFF //TX_A_POST_FLT_WNS 400 0x0148 //TX_MIN_G_LOW300HZ 401 0x0002 //TX_MAXLEVEL_CNG 402 0x00B4 //TX_STN_NOISE_TH 403 0x4000 //TX_POST_MASK_SUP 404 0x7FFF //TX_POST_MASK_ADJUST 405 0x00C8 //TX_NS_ENOISE_MIC0_TH -406 0x0014 //TX_MINENOISE_MIC0_TH +406 0x0032 //TX_MINENOISE_MIC0_TH 407 0x012C //TX_MINENOISE_MIC0_S_TH 408 0x7FFF //TX_MIN_G_CTRL_SSNS 409 0x0000 //TX_METAL_RTO_THR @@ -14554,16 +21882,16 @@ 511 0x6666 //TX_MIC_TO_BFGAIN 512 0x0000 //TX_MICTOBFGAIN0 513 0x0000 //TX_FASTMUE_TH -514 0x0000 //TX_DERVB_LEN_0 -515 0x0000 //TX_DERVB_LEN_1 -516 0x0000 //TX_RHO_DERVB -517 0x0000 //TX_MIC_INDX_DERVB -518 0x0000 //TX_MU_DERVB -519 0x0000 //TX_DR_RESRV_0 -520 0x0000 //TX_DR_RESRV_1 -521 0x0000 //TX_DR_RESRV_2 -522 0x0000 //TX_DR_RESRV_3 -523 0x0000 //TX_DR_RESRV_4 +514 0xC000 //TX_DEREVERB_LF_MU +515 0xC000 //TX_DEREVERB_HF_MU +516 0xCCCC //TX_DEREVERB_DELAY +517 0xD999 //TX_DEREVERB_COEF_LEN +518 0x1F40 //TX_DEREVERB_DNR +519 0x0000 //TX_DEREVERB_ALPHA +520 0x0000 //TX_DEREVERB_BETA +521 0x0000 //TX_GSC_RTOL_TH +522 0x7000 //TX_GSC_RTOH_TH +523 0x0064 //TX_WIDE2_MEANHTH 524 0x0000 //TX_DR_RESRV_5 525 0x0000 //TX_DR_RESRV_6 526 0x0000 //TX_DR_RESRV_7 @@ -14931,14 +22259,79 @@ 888 0x00C8 //TX_FASTNS_ARSPC_TH 889 0xC000 //TX_FASTNS_MASK5_TH 890 0x4848 //TX_POSTSSA_MIN_G_VR_MASK -891 0x7FFF //TX_A_LESSCUT_RTO_MASK +891 0x4000 //TX_A_LESSCUT_RTO_MASK 892 0x1770 //TX_FASTNS_NOISETH 893 0xC000 //TX_FASTNS_SSA_THLFL 894 0xC000 //TX_FASTNS_SSA_THHFL 895 0xCCCC //TX_FASTNS_SSA_THLFH 896 0xD999 //TX_FASTNS_SSA_THHFH +897 0x2339 //TX_SENDFUNC_REG_MICMUTE +898 0x0021 //TX_SENDFUNC_REG_MICMUTE1 +899 0x02BC //TX_MICMUTE_RATIO_THR +900 0x0140 //TX_MICMUTE_AMP_THR +901 0x0004 //TX_MICMUTE_HPF_IND +902 0x00C0 //TX_MICMUTE_LOG_EYR_TH +903 0x0008 //TX_MICMUTE_CVG_TIME +904 0x0008 //TX_MICMUTE_RELEASE_TIME +905 0x01FE //TX_MIC_VOLUME_MIC0MUTE +906 0x0020 //TX_MICMUTE_EPD_OFFSET_0 +907 0x001E //TX_MICMUTE_FRQ_AEC_L +908 0x7999 //TX_MICMUTE_EAD_THR +909 0x7FFF //TX_MICMUTE_LAMBDA_CB_NLE +910 0x7FFF //TX_MICMUTE_LAMBDA_RE_EST +911 0x4000 //TX_DTD_THR1_MICMUTE_0 +912 0x7000 //TX_DTD_THR1_MICMUTE_1 +913 0x7FFF //TX_DTD_THR1_MICMUTE_2 +914 0x7FFF //TX_DTD_THR1_MICMUTE_3 +915 0x6CCC //TX_DTD_THR2_MICMUTE_0 +916 0x0400 //TX_MICMUTE_MIN_EQ_RE_EST_0 +917 0x0400 //TX_MICMUTE_MIN_EQ_RE_EST_1 +918 0x1000 //TX_MICMUTE_MIN_EQ_RE_EST_2 +919 0x7FFF //TX_MICMUTE_MIN_EQ_RE_EST_3 +920 0x7FFF //TX_MICMUTE_MIN_EQ_RE_EST_4 +921 0x4000 //TX_MICMUTE_C_POST_FLT +922 0x03E8 //TX_MICMUTE_DT_CUT_K +923 0x0001 //TX_MICMUTE_DT_CUT_THR +924 0x03E8 //TX_MICMUTE_DT_CUT_K2 +925 0x0001 //TX_MICMUTE_DT_CUT_THR2 +926 0x0064 //TX_MICMUTE_DT2_HOLD_N +927 0x1000 //TX_MICMUTE_RATIODTH_THCUT +928 0x1000 //TX_MICMUTE_B_POST_FLT_ECHOL +929 0x7FFF //TX_MICMUTE_B_POST_FLT_ECHOH +930 0x0400 //TX_MICMUTE_C_POST_FLT_MASK +931 0x7999 //TX_MICMUTE_RATIODTL_CUT_TH +932 0x0258 //TX_MICMUTE_DT_CUT_K1 +933 0x0800 //TX_MICMUTE_N2_SN_EST +934 0xFC00 //TX_MICMUTE_THR_SN_EST_0 +935 0x001C //TX_MICMUTE_MIN_G_CTRL_0 +936 0x6000 //TX_MICMUTE_A_POST_FILT_S_0 +937 0x7000 //TX_MICMUTE_B_POST_FILT_0 +938 0x2710 //TX_MIC1RUB_AMP_THR +939 0x0010 //TX_MIC1MUTE_RATIO_THR +940 0x0450 //TX_MIC1MUTE_AMP_THR +941 0x0008 //TX_MIC1MUTE_CVG_TIME +942 0x0008 //TX_MIC1MUTE_RELEASE_TIME +943 0x0000 //TX_AMS_RESRV_01 +944 0x0000 //TX_AMS_RESRV_02 +945 0x0000 //TX_AMS_RESRV_03 +946 0x0000 //TX_AMS_RESRV_04 +947 0x0000 //TX_AMS_RESRV_05 +948 0x0000 //TX_AMS_RESRV_06 +949 0x0000 //TX_AMS_RESRV_07 +950 0x0000 //TX_AMS_RESRV_08 +951 0x0000 //TX_AMS_RESRV_09 +952 0x0000 //TX_AMS_RESRV_10 +953 0x0000 //TX_AMS_RESRV_11 +954 0x0000 //TX_AMS_RESRV_12 +955 0x0000 //TX_AMS_RESRV_13 +956 0x0000 //TX_AMS_RESRV_14 +957 0x0000 //TX_AMS_RESRV_15 +958 0x0000 //TX_AMS_RESRV_16 +959 0x0000 //TX_AMS_RESRV_17 +960 0x0000 //TX_AMS_RESRV_18 +961 0x0000 //TX_AMS_RESRV_19 #RX -0 0x002C //RX_RECVFUNC_MODE_0 +0 0x202C //RX_RECVFUNC_MODE_0 1 0x0000 //RX_RECVFUNC_MODE_1 2 0x0000 //RX_SAMPLINGFREQ_SIG 3 0x0000 //RX_SAMPLINGFREQ_PROC @@ -15788,11 +23181,862 @@ 110 0x0000 //RX_FDDRC_RESRV_0 129 0x0100 //RX_SPK_VOL 130 0x0000 //RX_VOL_RESRV_0 +#RX 2 +157 0x202C //RX_RECVFUNC_MODE_0 +158 0x0000 //RX_RECVFUNC_MODE_1 +159 0x0000 //RX_SAMPLINGFREQ_SIG +160 0x0000 //RX_SAMPLINGFREQ_PROC +161 0x000A //RX_FRAME_SZ +162 0x0000 //RX_DELAY_OPT +163 0x3000 //RX_TDDRC_ALPHA_UP_1 +164 0x3000 //RX_TDDRC_ALPHA_UP_2 +165 0x3000 //RX_TDDRC_ALPHA_UP_3 +166 0x3000 //RX_TDDRC_ALPHA_UP_4 +167 0x0800 //RX_PGA +168 0x7FFF //RX_A_HP +169 0x0000 //RX_B_PE +170 0x3800 //RX_THR_PITCH_DET_0 +171 0x3000 //RX_THR_PITCH_DET_1 +172 0x2800 //RX_THR_PITCH_DET_2 +173 0x0008 //RX_PITCH_BFR_LEN +174 0x0003 //RX_SBD_PITCH_DET +175 0x0100 //RX_PP_RESRV_0 +176 0x0020 //RX_PP_RESRV_1 +177 0x0600 //RX_N_SN_EST +178 0x000C //RX_N2_SN_EST +179 0x0010 //RX_NS_LVL_CTRL +180 0xF800 //RX_THR_SN_EST +181 0x7CCD //RX_LAMBDA_PFILT +182 0x000A //RX_FENS_RESRV_0 +183 0x0190 //RX_FENS_RESRV_1 +184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +187 0x0002 //RX_EXTRA_NS_L +188 0x0800 //RX_EXTRA_NS_A +189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +190 0x7FFF //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +192 0x199A //RX_A_POST_FLT +193 0x0000 //RX_LMT_THRD +194 0x4000 //RX_LMT_ALPHA +195 0x0014 //RX_FDEQ_SUBNUM +196 0x4848 //RX_FDEQ_GAIN_0 +197 0x4848 //RX_FDEQ_GAIN_1 +198 0x4848 //RX_FDEQ_GAIN_2 +199 0x4848 //RX_FDEQ_GAIN_3 +200 0x4848 //RX_FDEQ_GAIN_4 +201 0x4848 //RX_FDEQ_GAIN_5 +202 0x4848 //RX_FDEQ_GAIN_6 +203 0x4848 //RX_FDEQ_GAIN_7 +204 0x4848 //RX_FDEQ_GAIN_8 +205 0x4848 //RX_FDEQ_GAIN_9 +206 0x4848 //RX_FDEQ_GAIN_10 +207 0x4848 //RX_FDEQ_GAIN_11 +208 0x4848 //RX_FDEQ_GAIN_12 +209 0x4848 //RX_FDEQ_GAIN_13 +210 0x4848 //RX_FDEQ_GAIN_14 +211 0x4848 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0202 //RX_FDEQ_BIN_0 +221 0x0203 //RX_FDEQ_BIN_1 +222 0x0303 //RX_FDEQ_BIN_2 +223 0x0304 //RX_FDEQ_BIN_3 +224 0x0405 //RX_FDEQ_BIN_4 +225 0x0506 //RX_FDEQ_BIN_5 +226 0x0708 //RX_FDEQ_BIN_6 +227 0x090A //RX_FDEQ_BIN_7 +228 0x0B0C //RX_FDEQ_BIN_8 +229 0x0D08 //RX_FDEQ_BIN_9 +230 0x0000 //RX_FDEQ_BIN_10 +231 0x0000 //RX_FDEQ_BIN_11 +232 0x0000 //RX_FDEQ_BIN_12 +233 0x0000 //RX_FDEQ_BIN_13 +234 0x0000 //RX_FDEQ_BIN_14 +235 0x0000 //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x4000 //RX_FDEQ_RESRV_0 +245 0x0320 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0030 //RX_FDDRC_BAND_MARGIN_1 +248 0x0050 //RX_FDDRC_BAND_MARGIN_2 +249 0x0080 //RX_FDDRC_BAND_MARGIN_3 +250 0x0007 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x5000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x6400 //RX_FDDRC_THRD_3_2 +258 0x6400 //RX_FDDRC_THRD_3_3 +259 0x2000 //RX_FDDRC_SLANT_0_0 +260 0x2000 //RX_FDDRC_SLANT_0_1 +261 0x2000 //RX_FDDRC_SLANT_0_2 +262 0x2000 //RX_FDDRC_SLANT_0_3 +263 0x5333 //RX_FDDRC_SLANT_1_0 +264 0x5333 //RX_FDDRC_SLANT_1_1 +265 0x5333 //RX_FDDRC_SLANT_1_2 +266 0x5333 //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +268 0x0002 //RX_FILTINDX +269 0x0000 //RX_TDDRC_THRD_0 +270 0x0000 //RX_TDDRC_THRD_1 +271 0x2000 //RX_TDDRC_THRD_2 +272 0x3000 //RX_TDDRC_THRD_3 +273 0x0800 //RX_TDDRC_SLANT_0 +274 0x7EB8 //RX_TDDRC_SLANT_1 +275 0x3000 //RX_TDDRC_ALPHA_UP_0 +276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x199A //RX_TDDRC_HMNC_GAIN +279 0x0001 //RX_TDDRC_SMT_FLAG +280 0x0CCD //RX_TDDRC_SMT_W +281 0x0200 //RX_TDDRC_DRC_GAIN +282 0x7C00 //RX_LAMBDA_PKA_FP +283 0x2000 //RX_TPKA_FP +284 0x2000 //RX_MIN_G_FP +285 0x0080 //RX_MAX_G_FP +286 0x000B //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 +288 0x0000 //RX_MAXLEVEL_CNG +289 0x3000 //RX_BWE_UV_TH +290 0x3000 //RX_BWE_UV_TH2 +291 0x1800 //RX_BWE_UV_TH3 +292 0x1000 //RX_BWE_V_TH +293 0x04CD //RX_BWE_GAIN1_V_TH1 +294 0x0F33 //RX_BWE_GAIN1_V_TH2 +295 0x7333 //RX_BWE_UV_EQ +296 0x199A //RX_BWE_V_EQ +297 0x7333 //RX_BWE_TONE_TH +298 0x0004 //RX_BWE_UV_HOLD_T +299 0x6CCD //RX_BWE_GAIN2_ALPHA +300 0x799A //RX_BWE_GAIN3_ALPHA +301 0x001E //RX_BWE_CUTOFF +302 0x3000 //RX_BWE_GAINFILL +303 0x3200 //RX_BWE_MAXTH_TONE +304 0x2000 //RX_BWE_EQ_0 +305 0x2000 //RX_BWE_EQ_1 +306 0x2000 //RX_BWE_EQ_2 +307 0x2000 //RX_BWE_EQ_3 +308 0x2000 //RX_BWE_EQ_4 +309 0x2000 //RX_BWE_EQ_5 +310 0x2000 //RX_BWE_EQ_6 +311 0x0000 //RX_BWE_RESRV_0 +312 0x0000 //RX_BWE_RESRV_1 +313 0x0000 //RX_BWE_RESRV_2 +#VOL 0 +163 0x3000 //RX_TDDRC_ALPHA_UP_1 +164 0x3000 //RX_TDDRC_ALPHA_UP_2 +165 0x3000 //RX_TDDRC_ALPHA_UP_3 +166 0x3000 //RX_TDDRC_ALPHA_UP_4 +184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +190 0x7FFF //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +269 0x0000 //RX_TDDRC_THRD_0 +270 0x0000 //RX_TDDRC_THRD_1 +271 0x2000 //RX_TDDRC_THRD_2 +272 0x3000 //RX_TDDRC_THRD_3 +273 0x0800 //RX_TDDRC_SLANT_0 +274 0x7EB8 //RX_TDDRC_SLANT_1 +275 0x3000 //RX_TDDRC_ALPHA_UP_0 +276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x199A //RX_TDDRC_HMNC_GAIN +279 0x0001 //RX_TDDRC_SMT_FLAG +280 0x0CCD //RX_TDDRC_SMT_W +281 0x0200 //RX_TDDRC_DRC_GAIN +195 0x0014 //RX_FDEQ_SUBNUM +196 0x4848 //RX_FDEQ_GAIN_0 +197 0x4848 //RX_FDEQ_GAIN_1 +198 0x4848 //RX_FDEQ_GAIN_2 +199 0x4848 //RX_FDEQ_GAIN_3 +200 0x4848 //RX_FDEQ_GAIN_4 +201 0x4848 //RX_FDEQ_GAIN_5 +202 0x4848 //RX_FDEQ_GAIN_6 +203 0x4848 //RX_FDEQ_GAIN_7 +204 0x4848 //RX_FDEQ_GAIN_8 +205 0x4848 //RX_FDEQ_GAIN_9 +206 0x4848 //RX_FDEQ_GAIN_10 +207 0x4848 //RX_FDEQ_GAIN_11 +208 0x4848 //RX_FDEQ_GAIN_12 +209 0x4848 //RX_FDEQ_GAIN_13 +210 0x4848 //RX_FDEQ_GAIN_14 +211 0x4848 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0202 //RX_FDEQ_BIN_0 +221 0x0203 //RX_FDEQ_BIN_1 +222 0x0303 //RX_FDEQ_BIN_2 +223 0x0304 //RX_FDEQ_BIN_3 +224 0x0405 //RX_FDEQ_BIN_4 +225 0x0506 //RX_FDEQ_BIN_5 +226 0x0708 //RX_FDEQ_BIN_6 +227 0x090A //RX_FDEQ_BIN_7 +228 0x0B0C //RX_FDEQ_BIN_8 +229 0x0D08 //RX_FDEQ_BIN_9 +230 0x0000 //RX_FDEQ_BIN_10 +231 0x0000 //RX_FDEQ_BIN_11 +232 0x0000 //RX_FDEQ_BIN_12 +233 0x0000 //RX_FDEQ_BIN_13 +234 0x0000 //RX_FDEQ_BIN_14 +235 0x0000 //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x4000 //RX_FDEQ_RESRV_0 +245 0x0320 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0030 //RX_FDDRC_BAND_MARGIN_1 +248 0x0050 //RX_FDDRC_BAND_MARGIN_2 +249 0x0080 //RX_FDDRC_BAND_MARGIN_3 +250 0x0007 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x5000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x6400 //RX_FDDRC_THRD_3_2 +258 0x6400 //RX_FDDRC_THRD_3_3 +259 0x2000 //RX_FDDRC_SLANT_0_0 +260 0x2000 //RX_FDDRC_SLANT_0_1 +261 0x2000 //RX_FDDRC_SLANT_0_2 +262 0x2000 //RX_FDDRC_SLANT_0_3 +263 0x5333 //RX_FDDRC_SLANT_1_0 +264 0x5333 //RX_FDDRC_SLANT_1_1 +265 0x5333 //RX_FDDRC_SLANT_1_2 +266 0x5333 //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +286 0x000B //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 +#VOL 1 +163 0x3000 //RX_TDDRC_ALPHA_UP_1 +164 0x3000 //RX_TDDRC_ALPHA_UP_2 +165 0x3000 //RX_TDDRC_ALPHA_UP_3 +166 0x3000 //RX_TDDRC_ALPHA_UP_4 +184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +190 0x7FFF //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +269 0x0000 //RX_TDDRC_THRD_0 +270 0x0000 //RX_TDDRC_THRD_1 +271 0x2000 //RX_TDDRC_THRD_2 +272 0x3000 //RX_TDDRC_THRD_3 +273 0x0800 //RX_TDDRC_SLANT_0 +274 0x7EB8 //RX_TDDRC_SLANT_1 +275 0x3000 //RX_TDDRC_ALPHA_UP_0 +276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x199A //RX_TDDRC_HMNC_GAIN +279 0x0001 //RX_TDDRC_SMT_FLAG +280 0x0CCD //RX_TDDRC_SMT_W +281 0x0200 //RX_TDDRC_DRC_GAIN +195 0x0014 //RX_FDEQ_SUBNUM +196 0x4848 //RX_FDEQ_GAIN_0 +197 0x4848 //RX_FDEQ_GAIN_1 +198 0x4848 //RX_FDEQ_GAIN_2 +199 0x4848 //RX_FDEQ_GAIN_3 +200 0x4848 //RX_FDEQ_GAIN_4 +201 0x4848 //RX_FDEQ_GAIN_5 +202 0x4848 //RX_FDEQ_GAIN_6 +203 0x4848 //RX_FDEQ_GAIN_7 +204 0x4848 //RX_FDEQ_GAIN_8 +205 0x4848 //RX_FDEQ_GAIN_9 +206 0x4848 //RX_FDEQ_GAIN_10 +207 0x4848 //RX_FDEQ_GAIN_11 +208 0x4848 //RX_FDEQ_GAIN_12 +209 0x4848 //RX_FDEQ_GAIN_13 +210 0x4848 //RX_FDEQ_GAIN_14 +211 0x4848 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0202 //RX_FDEQ_BIN_0 +221 0x0203 //RX_FDEQ_BIN_1 +222 0x0303 //RX_FDEQ_BIN_2 +223 0x0304 //RX_FDEQ_BIN_3 +224 0x0405 //RX_FDEQ_BIN_4 +225 0x0506 //RX_FDEQ_BIN_5 +226 0x0708 //RX_FDEQ_BIN_6 +227 0x090A //RX_FDEQ_BIN_7 +228 0x0B0C //RX_FDEQ_BIN_8 +229 0x0D08 //RX_FDEQ_BIN_9 +230 0x0000 //RX_FDEQ_BIN_10 +231 0x0000 //RX_FDEQ_BIN_11 +232 0x0000 //RX_FDEQ_BIN_12 +233 0x0000 //RX_FDEQ_BIN_13 +234 0x0000 //RX_FDEQ_BIN_14 +235 0x0000 //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x4000 //RX_FDEQ_RESRV_0 +245 0x0320 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0030 //RX_FDDRC_BAND_MARGIN_1 +248 0x0050 //RX_FDDRC_BAND_MARGIN_2 +249 0x0080 //RX_FDDRC_BAND_MARGIN_3 +250 0x0007 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x5000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x6400 //RX_FDDRC_THRD_3_2 +258 0x6400 //RX_FDDRC_THRD_3_3 +259 0x2000 //RX_FDDRC_SLANT_0_0 +260 0x2000 //RX_FDDRC_SLANT_0_1 +261 0x2000 //RX_FDDRC_SLANT_0_2 +262 0x2000 //RX_FDDRC_SLANT_0_3 +263 0x5333 //RX_FDDRC_SLANT_1_0 +264 0x5333 //RX_FDDRC_SLANT_1_1 +265 0x5333 //RX_FDDRC_SLANT_1_2 +266 0x5333 //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +286 0x0013 //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 +#VOL 2 +163 0x3000 //RX_TDDRC_ALPHA_UP_1 +164 0x3000 //RX_TDDRC_ALPHA_UP_2 +165 0x3000 //RX_TDDRC_ALPHA_UP_3 +166 0x3000 //RX_TDDRC_ALPHA_UP_4 +184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +190 0x7FFF //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +269 0x0000 //RX_TDDRC_THRD_0 +270 0x0000 //RX_TDDRC_THRD_1 +271 0x2000 //RX_TDDRC_THRD_2 +272 0x3000 //RX_TDDRC_THRD_3 +273 0x0800 //RX_TDDRC_SLANT_0 +274 0x7EB8 //RX_TDDRC_SLANT_1 +275 0x3000 //RX_TDDRC_ALPHA_UP_0 +276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x199A //RX_TDDRC_HMNC_GAIN +279 0x0001 //RX_TDDRC_SMT_FLAG +280 0x0CCD //RX_TDDRC_SMT_W +281 0x0200 //RX_TDDRC_DRC_GAIN +195 0x0014 //RX_FDEQ_SUBNUM +196 0x4848 //RX_FDEQ_GAIN_0 +197 0x4848 //RX_FDEQ_GAIN_1 +198 0x4848 //RX_FDEQ_GAIN_2 +199 0x4848 //RX_FDEQ_GAIN_3 +200 0x4848 //RX_FDEQ_GAIN_4 +201 0x4848 //RX_FDEQ_GAIN_5 +202 0x4848 //RX_FDEQ_GAIN_6 +203 0x4848 //RX_FDEQ_GAIN_7 +204 0x4848 //RX_FDEQ_GAIN_8 +205 0x4848 //RX_FDEQ_GAIN_9 +206 0x4848 //RX_FDEQ_GAIN_10 +207 0x4848 //RX_FDEQ_GAIN_11 +208 0x4848 //RX_FDEQ_GAIN_12 +209 0x4848 //RX_FDEQ_GAIN_13 +210 0x4848 //RX_FDEQ_GAIN_14 +211 0x4848 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0202 //RX_FDEQ_BIN_0 +221 0x0203 //RX_FDEQ_BIN_1 +222 0x0303 //RX_FDEQ_BIN_2 +223 0x0304 //RX_FDEQ_BIN_3 +224 0x0405 //RX_FDEQ_BIN_4 +225 0x0506 //RX_FDEQ_BIN_5 +226 0x0708 //RX_FDEQ_BIN_6 +227 0x090A //RX_FDEQ_BIN_7 +228 0x0B0C //RX_FDEQ_BIN_8 +229 0x0D08 //RX_FDEQ_BIN_9 +230 0x0000 //RX_FDEQ_BIN_10 +231 0x0000 //RX_FDEQ_BIN_11 +232 0x0000 //RX_FDEQ_BIN_12 +233 0x0000 //RX_FDEQ_BIN_13 +234 0x0000 //RX_FDEQ_BIN_14 +235 0x0000 //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x4000 //RX_FDEQ_RESRV_0 +245 0x0320 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0030 //RX_FDDRC_BAND_MARGIN_1 +248 0x0050 //RX_FDDRC_BAND_MARGIN_2 +249 0x0080 //RX_FDDRC_BAND_MARGIN_3 +250 0x0007 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x5000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x6400 //RX_FDDRC_THRD_3_2 +258 0x6400 //RX_FDDRC_THRD_3_3 +259 0x2000 //RX_FDDRC_SLANT_0_0 +260 0x2000 //RX_FDDRC_SLANT_0_1 +261 0x2000 //RX_FDDRC_SLANT_0_2 +262 0x2000 //RX_FDDRC_SLANT_0_3 +263 0x5333 //RX_FDDRC_SLANT_1_0 +264 0x5333 //RX_FDDRC_SLANT_1_1 +265 0x5333 //RX_FDDRC_SLANT_1_2 +266 0x5333 //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +286 0x0020 //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 +#VOL 3 +163 0x3000 //RX_TDDRC_ALPHA_UP_1 +164 0x3000 //RX_TDDRC_ALPHA_UP_2 +165 0x3000 //RX_TDDRC_ALPHA_UP_3 +166 0x3000 //RX_TDDRC_ALPHA_UP_4 +184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +190 0x7FFF //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +269 0x0000 //RX_TDDRC_THRD_0 +270 0x0000 //RX_TDDRC_THRD_1 +271 0x2000 //RX_TDDRC_THRD_2 +272 0x3000 //RX_TDDRC_THRD_3 +273 0x0800 //RX_TDDRC_SLANT_0 +274 0x7EB8 //RX_TDDRC_SLANT_1 +275 0x3000 //RX_TDDRC_ALPHA_UP_0 +276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x199A //RX_TDDRC_HMNC_GAIN +279 0x0001 //RX_TDDRC_SMT_FLAG +280 0x0CCD //RX_TDDRC_SMT_W +281 0x0200 //RX_TDDRC_DRC_GAIN +195 0x0014 //RX_FDEQ_SUBNUM +196 0x4848 //RX_FDEQ_GAIN_0 +197 0x4848 //RX_FDEQ_GAIN_1 +198 0x4848 //RX_FDEQ_GAIN_2 +199 0x4848 //RX_FDEQ_GAIN_3 +200 0x4848 //RX_FDEQ_GAIN_4 +201 0x4848 //RX_FDEQ_GAIN_5 +202 0x4848 //RX_FDEQ_GAIN_6 +203 0x4848 //RX_FDEQ_GAIN_7 +204 0x4848 //RX_FDEQ_GAIN_8 +205 0x4848 //RX_FDEQ_GAIN_9 +206 0x4848 //RX_FDEQ_GAIN_10 +207 0x4848 //RX_FDEQ_GAIN_11 +208 0x4848 //RX_FDEQ_GAIN_12 +209 0x4848 //RX_FDEQ_GAIN_13 +210 0x4848 //RX_FDEQ_GAIN_14 +211 0x4848 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0202 //RX_FDEQ_BIN_0 +221 0x0203 //RX_FDEQ_BIN_1 +222 0x0303 //RX_FDEQ_BIN_2 +223 0x0304 //RX_FDEQ_BIN_3 +224 0x0405 //RX_FDEQ_BIN_4 +225 0x0506 //RX_FDEQ_BIN_5 +226 0x0708 //RX_FDEQ_BIN_6 +227 0x090A //RX_FDEQ_BIN_7 +228 0x0B0C //RX_FDEQ_BIN_8 +229 0x0D08 //RX_FDEQ_BIN_9 +230 0x0000 //RX_FDEQ_BIN_10 +231 0x0000 //RX_FDEQ_BIN_11 +232 0x0000 //RX_FDEQ_BIN_12 +233 0x0000 //RX_FDEQ_BIN_13 +234 0x0000 //RX_FDEQ_BIN_14 +235 0x0000 //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x4000 //RX_FDEQ_RESRV_0 +245 0x0320 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0030 //RX_FDDRC_BAND_MARGIN_1 +248 0x0050 //RX_FDDRC_BAND_MARGIN_2 +249 0x0080 //RX_FDDRC_BAND_MARGIN_3 +250 0x0007 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x5000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x6400 //RX_FDDRC_THRD_3_2 +258 0x6400 //RX_FDDRC_THRD_3_3 +259 0x2000 //RX_FDDRC_SLANT_0_0 +260 0x2000 //RX_FDDRC_SLANT_0_1 +261 0x2000 //RX_FDDRC_SLANT_0_2 +262 0x2000 //RX_FDDRC_SLANT_0_3 +263 0x5333 //RX_FDDRC_SLANT_1_0 +264 0x5333 //RX_FDDRC_SLANT_1_1 +265 0x5333 //RX_FDDRC_SLANT_1_2 +266 0x5333 //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +286 0x0036 //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 +#VOL 4 +163 0x3000 //RX_TDDRC_ALPHA_UP_1 +164 0x3000 //RX_TDDRC_ALPHA_UP_2 +165 0x3000 //RX_TDDRC_ALPHA_UP_3 +166 0x3000 //RX_TDDRC_ALPHA_UP_4 +184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +190 0x7FFF //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +269 0x0000 //RX_TDDRC_THRD_0 +270 0x0000 //RX_TDDRC_THRD_1 +271 0x2000 //RX_TDDRC_THRD_2 +272 0x3000 //RX_TDDRC_THRD_3 +273 0x0800 //RX_TDDRC_SLANT_0 +274 0x7EB8 //RX_TDDRC_SLANT_1 +275 0x3000 //RX_TDDRC_ALPHA_UP_0 +276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x199A //RX_TDDRC_HMNC_GAIN +279 0x0001 //RX_TDDRC_SMT_FLAG +280 0x0CCD //RX_TDDRC_SMT_W +281 0x0200 //RX_TDDRC_DRC_GAIN +195 0x0014 //RX_FDEQ_SUBNUM +196 0x4848 //RX_FDEQ_GAIN_0 +197 0x4848 //RX_FDEQ_GAIN_1 +198 0x4848 //RX_FDEQ_GAIN_2 +199 0x4848 //RX_FDEQ_GAIN_3 +200 0x4848 //RX_FDEQ_GAIN_4 +201 0x4848 //RX_FDEQ_GAIN_5 +202 0x4848 //RX_FDEQ_GAIN_6 +203 0x4848 //RX_FDEQ_GAIN_7 +204 0x4848 //RX_FDEQ_GAIN_8 +205 0x4848 //RX_FDEQ_GAIN_9 +206 0x4848 //RX_FDEQ_GAIN_10 +207 0x4848 //RX_FDEQ_GAIN_11 +208 0x4848 //RX_FDEQ_GAIN_12 +209 0x4848 //RX_FDEQ_GAIN_13 +210 0x4848 //RX_FDEQ_GAIN_14 +211 0x4848 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0202 //RX_FDEQ_BIN_0 +221 0x0203 //RX_FDEQ_BIN_1 +222 0x0303 //RX_FDEQ_BIN_2 +223 0x0304 //RX_FDEQ_BIN_3 +224 0x0405 //RX_FDEQ_BIN_4 +225 0x0506 //RX_FDEQ_BIN_5 +226 0x0708 //RX_FDEQ_BIN_6 +227 0x090A //RX_FDEQ_BIN_7 +228 0x0B0C //RX_FDEQ_BIN_8 +229 0x0D08 //RX_FDEQ_BIN_9 +230 0x0000 //RX_FDEQ_BIN_10 +231 0x0000 //RX_FDEQ_BIN_11 +232 0x0000 //RX_FDEQ_BIN_12 +233 0x0000 //RX_FDEQ_BIN_13 +234 0x0000 //RX_FDEQ_BIN_14 +235 0x0000 //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x4000 //RX_FDEQ_RESRV_0 +245 0x0320 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0030 //RX_FDDRC_BAND_MARGIN_1 +248 0x0050 //RX_FDDRC_BAND_MARGIN_2 +249 0x0080 //RX_FDDRC_BAND_MARGIN_3 +250 0x0007 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x5000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x6400 //RX_FDDRC_THRD_3_2 +258 0x6400 //RX_FDDRC_THRD_3_3 +259 0x2000 //RX_FDDRC_SLANT_0_0 +260 0x2000 //RX_FDDRC_SLANT_0_1 +261 0x2000 //RX_FDDRC_SLANT_0_2 +262 0x2000 //RX_FDDRC_SLANT_0_3 +263 0x5333 //RX_FDDRC_SLANT_1_0 +264 0x5333 //RX_FDDRC_SLANT_1_1 +265 0x5333 //RX_FDDRC_SLANT_1_2 +266 0x5333 //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +286 0x005B //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 +#VOL 5 +163 0x3000 //RX_TDDRC_ALPHA_UP_1 +164 0x3000 //RX_TDDRC_ALPHA_UP_2 +165 0x3000 //RX_TDDRC_ALPHA_UP_3 +166 0x3000 //RX_TDDRC_ALPHA_UP_4 +184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +190 0x7FFF //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +269 0x0000 //RX_TDDRC_THRD_0 +270 0x0000 //RX_TDDRC_THRD_1 +271 0x2000 //RX_TDDRC_THRD_2 +272 0x3000 //RX_TDDRC_THRD_3 +273 0x0800 //RX_TDDRC_SLANT_0 +274 0x7EB8 //RX_TDDRC_SLANT_1 +275 0x3000 //RX_TDDRC_ALPHA_UP_0 +276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x199A //RX_TDDRC_HMNC_GAIN +279 0x0001 //RX_TDDRC_SMT_FLAG +280 0x0CCD //RX_TDDRC_SMT_W +281 0x0200 //RX_TDDRC_DRC_GAIN +195 0x0014 //RX_FDEQ_SUBNUM +196 0x4848 //RX_FDEQ_GAIN_0 +197 0x4848 //RX_FDEQ_GAIN_1 +198 0x4848 //RX_FDEQ_GAIN_2 +199 0x4848 //RX_FDEQ_GAIN_3 +200 0x4848 //RX_FDEQ_GAIN_4 +201 0x4848 //RX_FDEQ_GAIN_5 +202 0x4848 //RX_FDEQ_GAIN_6 +203 0x4848 //RX_FDEQ_GAIN_7 +204 0x4848 //RX_FDEQ_GAIN_8 +205 0x4848 //RX_FDEQ_GAIN_9 +206 0x4848 //RX_FDEQ_GAIN_10 +207 0x4848 //RX_FDEQ_GAIN_11 +208 0x4848 //RX_FDEQ_GAIN_12 +209 0x4848 //RX_FDEQ_GAIN_13 +210 0x4848 //RX_FDEQ_GAIN_14 +211 0x4848 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0202 //RX_FDEQ_BIN_0 +221 0x0203 //RX_FDEQ_BIN_1 +222 0x0303 //RX_FDEQ_BIN_2 +223 0x0304 //RX_FDEQ_BIN_3 +224 0x0405 //RX_FDEQ_BIN_4 +225 0x0506 //RX_FDEQ_BIN_5 +226 0x0708 //RX_FDEQ_BIN_6 +227 0x090A //RX_FDEQ_BIN_7 +228 0x0B0C //RX_FDEQ_BIN_8 +229 0x0D08 //RX_FDEQ_BIN_9 +230 0x0000 //RX_FDEQ_BIN_10 +231 0x0000 //RX_FDEQ_BIN_11 +232 0x0000 //RX_FDEQ_BIN_12 +233 0x0000 //RX_FDEQ_BIN_13 +234 0x0000 //RX_FDEQ_BIN_14 +235 0x0000 //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x4000 //RX_FDEQ_RESRV_0 +245 0x0320 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0030 //RX_FDDRC_BAND_MARGIN_1 +248 0x0050 //RX_FDDRC_BAND_MARGIN_2 +249 0x0080 //RX_FDDRC_BAND_MARGIN_3 +250 0x0007 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x5000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x6400 //RX_FDDRC_THRD_3_2 +258 0x6400 //RX_FDDRC_THRD_3_3 +259 0x2000 //RX_FDDRC_SLANT_0_0 +260 0x2000 //RX_FDDRC_SLANT_0_1 +261 0x2000 //RX_FDDRC_SLANT_0_2 +262 0x2000 //RX_FDDRC_SLANT_0_3 +263 0x5333 //RX_FDDRC_SLANT_1_0 +264 0x5333 //RX_FDDRC_SLANT_1_1 +265 0x5333 //RX_FDDRC_SLANT_1_2 +266 0x5333 //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +286 0x0099 //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 +#VOL 6 +163 0x3000 //RX_TDDRC_ALPHA_UP_1 +164 0x3000 //RX_TDDRC_ALPHA_UP_2 +165 0x3000 //RX_TDDRC_ALPHA_UP_3 +166 0x3000 //RX_TDDRC_ALPHA_UP_4 +184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +190 0x7FFF //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +269 0x0000 //RX_TDDRC_THRD_0 +270 0x0000 //RX_TDDRC_THRD_1 +271 0x2000 //RX_TDDRC_THRD_2 +272 0x3000 //RX_TDDRC_THRD_3 +273 0x0800 //RX_TDDRC_SLANT_0 +274 0x7EB8 //RX_TDDRC_SLANT_1 +275 0x3000 //RX_TDDRC_ALPHA_UP_0 +276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x199A //RX_TDDRC_HMNC_GAIN +279 0x0001 //RX_TDDRC_SMT_FLAG +280 0x0CCD //RX_TDDRC_SMT_W +281 0x0200 //RX_TDDRC_DRC_GAIN +195 0x0014 //RX_FDEQ_SUBNUM +196 0x4848 //RX_FDEQ_GAIN_0 +197 0x4848 //RX_FDEQ_GAIN_1 +198 0x4848 //RX_FDEQ_GAIN_2 +199 0x4848 //RX_FDEQ_GAIN_3 +200 0x4848 //RX_FDEQ_GAIN_4 +201 0x4848 //RX_FDEQ_GAIN_5 +202 0x4848 //RX_FDEQ_GAIN_6 +203 0x4848 //RX_FDEQ_GAIN_7 +204 0x4848 //RX_FDEQ_GAIN_8 +205 0x4848 //RX_FDEQ_GAIN_9 +206 0x4848 //RX_FDEQ_GAIN_10 +207 0x4848 //RX_FDEQ_GAIN_11 +208 0x4848 //RX_FDEQ_GAIN_12 +209 0x4848 //RX_FDEQ_GAIN_13 +210 0x4848 //RX_FDEQ_GAIN_14 +211 0x4848 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0202 //RX_FDEQ_BIN_0 +221 0x0203 //RX_FDEQ_BIN_1 +222 0x0303 //RX_FDEQ_BIN_2 +223 0x0304 //RX_FDEQ_BIN_3 +224 0x0405 //RX_FDEQ_BIN_4 +225 0x0506 //RX_FDEQ_BIN_5 +226 0x0708 //RX_FDEQ_BIN_6 +227 0x090A //RX_FDEQ_BIN_7 +228 0x0B0C //RX_FDEQ_BIN_8 +229 0x0D08 //RX_FDEQ_BIN_9 +230 0x0000 //RX_FDEQ_BIN_10 +231 0x0000 //RX_FDEQ_BIN_11 +232 0x0000 //RX_FDEQ_BIN_12 +233 0x0000 //RX_FDEQ_BIN_13 +234 0x0000 //RX_FDEQ_BIN_14 +235 0x0000 //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x4000 //RX_FDEQ_RESRV_0 +245 0x0320 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0030 //RX_FDDRC_BAND_MARGIN_1 +248 0x0050 //RX_FDDRC_BAND_MARGIN_2 +249 0x0080 //RX_FDDRC_BAND_MARGIN_3 +250 0x0007 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x5000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x6400 //RX_FDDRC_THRD_3_2 +258 0x6400 //RX_FDDRC_THRD_3_3 +259 0x2000 //RX_FDDRC_SLANT_0_0 +260 0x2000 //RX_FDDRC_SLANT_0_1 +261 0x2000 //RX_FDDRC_SLANT_0_2 +262 0x2000 //RX_FDDRC_SLANT_0_3 +263 0x5333 //RX_FDDRC_SLANT_1_0 +264 0x5333 //RX_FDDRC_SLANT_1_1 +265 0x5333 //RX_FDDRC_SLANT_1_2 +266 0x5333 //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +286 0x0100 //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 #CASE_NAME HEADSET-RESERVE1-VOICE_GENERIC-WB -#PARAM_MODE FULL -#PARAM_TYPE TX+RX -#TOTAL_CUSTOM_STEP 7 +#PARAM_MODE Full +#PARAM_TYPE TX+2RX +#TOTAL_CUSTOM_STEP 7+7 #TX 0 0x0009 //TX_OPERATION_MODE_0 1 0x0008 //TX_OPERATION_MODE_1 @@ -16036,7 +24280,7 @@ 239 0x0800 //TX_DT_RESRV_7 240 0x0800 //TX_DT_RESRV_8 241 0x0000 //TX_DT_RESRV_9 -242 0xF400 //TX_THR_SN_EST_0 +242 0xFA00 //TX_THR_SN_EST_0 243 0xF400 //TX_THR_SN_EST_1 244 0xF600 //TX_THR_SN_EST_2 245 0xF400 //TX_THR_SN_EST_3 @@ -16045,20 +24289,20 @@ 248 0xF400 //TX_THR_SN_EST_6 249 0xF600 //TX_THR_SN_EST_7 250 0x0000 //TX_DELTA_THR_SN_EST_0 -251 0x0000 //TX_DELTA_THR_SN_EST_1 +251 0x0200 //TX_DELTA_THR_SN_EST_1 252 0x0200 //TX_DELTA_THR_SN_EST_2 253 0x0200 //TX_DELTA_THR_SN_EST_3 254 0x0200 //TX_DELTA_THR_SN_EST_4 255 0x0200 //TX_DELTA_THR_SN_EST_5 -256 0x0200 //TX_DELTA_THR_SN_EST_6 +256 0x0000 //TX_DELTA_THR_SN_EST_6 257 0x0200 //TX_DELTA_THR_SN_EST_7 258 0x6000 //TX_LAMBDA_NN_EST_0 -259 0x6000 //TX_LAMBDA_NN_EST_1 +259 0x4000 //TX_LAMBDA_NN_EST_1 260 0x4000 //TX_LAMBDA_NN_EST_2 261 0x4000 //TX_LAMBDA_NN_EST_3 262 0x4000 //TX_LAMBDA_NN_EST_4 263 0x4000 //TX_LAMBDA_NN_EST_5 -264 0x4000 //TX_LAMBDA_NN_EST_6 +264 0x6000 //TX_LAMBDA_NN_EST_6 265 0x4000 //TX_LAMBDA_NN_EST_7 266 0x0400 //TX_N_SN_EST 267 0x001E //TX_INBEAM_T @@ -16076,16 +24320,16 @@ 279 0x1000 //TX_B_POST_FLT_0 280 0x1000 //TX_B_POST_FLT_1 281 0x000F //TX_NS_LVL_CTRL_0 -282 0x000F //TX_NS_LVL_CTRL_1 -283 0x0011 //TX_NS_LVL_CTRL_2 +282 0x0011 //TX_NS_LVL_CTRL_1 +283 0x000F //TX_NS_LVL_CTRL_2 284 0x000F //TX_NS_LVL_CTRL_3 285 0x000F //TX_NS_LVL_CTRL_4 286 0x000F //TX_NS_LVL_CTRL_5 287 0x000F //TX_NS_LVL_CTRL_6 288 0x0011 //TX_NS_LVL_CTRL_7 289 0x000C //TX_MIN_GAIN_S_0 -290 0x000C //TX_MIN_GAIN_S_1 -291 0x000F //TX_MIN_GAIN_S_2 +290 0x000F //TX_MIN_GAIN_S_1 +291 0x000C //TX_MIN_GAIN_S_2 292 0x000C //TX_MIN_GAIN_S_3 293 0x000C //TX_MIN_GAIN_S_4 294 0x000C //TX_MIN_GAIN_S_5 @@ -16109,12 +24353,12 @@ 312 0x7FFF //TX_A_POST_FILT_0 313 0x2000 //TX_A_POST_FILT_1 314 0x4000 //TX_A_POST_FILT_S_0 -315 0x4000 //TX_A_POST_FILT_S_1 +315 0x5000 //TX_A_POST_FILT_S_1 316 0x5000 //TX_A_POST_FILT_S_2 317 0x5000 //TX_A_POST_FILT_S_3 318 0x5000 //TX_A_POST_FILT_S_4 319 0x5000 //TX_A_POST_FILT_S_5 -320 0x5000 //TX_A_POST_FILT_S_6 +320 0x4000 //TX_A_POST_FILT_S_6 321 0x5000 //TX_A_POST_FILT_S_7 322 0x1000 //TX_B_POST_FILT_0 323 0x1000 //TX_B_POST_FILT_1 @@ -16161,7 +24405,7 @@ 364 0x0000 //TX_K_APT 365 0x0001 //TX_NOISEDET 366 0x0190 //TX_NDETCT -367 0x0050 //TX_NOISE_TH_0 +367 0x0102 //TX_NOISE_TH_0 368 0x7FFF //TX_NOISE_TH_0_2 369 0x7FFF //TX_NOISE_TH_0_3 370 0x07D0 //TX_NOISE_TH_1 @@ -16173,11 +24417,11 @@ 376 0x7FFF //TX_NOISE_TH_5_3 377 0x7FFF //TX_NOISE_TH_5_4 378 0x044C //TX_NOISE_TH_6 -379 0x0014 //TX_MINENOISE_TH -380 0x4000 //TX_MINENOISE_MIC0_TH_MTS -381 0xFFEE //TX_MINENOISE_MIC0_TH_EXP -382 0x6000 //TX_MINENOISE_MIC0_S_TH_MTS -383 0xFFF3 //TX_MINENOISE_MIC0_S_TH_EXP +379 0x00F8 //TX_MINENOISE_TH +380 0xD508 //TX_MORENS_TFMASK_TH +381 0x0001 //TX_DRC_QUIET_FLOOR +382 0x3A98 //TX_RATIODTL_CUT_TH +383 0x0DAC //TX_DT_CUT_K1 384 0x0666 //TX_OUT_ENER_S_TH_CLEAN 385 0x0666 //TX_OUT_ENER_S_TH_LESSCLEAN 386 0x0333 //TX_OUT_ENER_S_TH_NOISY @@ -16185,22 +24429,22 @@ 388 0x0333 //TX_OUT_ENER_TH_SPEECH 389 0x2000 //TX_SN_NPB_GAIN 390 0x0000 //TX_NN_NPB_GAIN -391 0x0000 //TX_CSX_ALPHA_0 -392 0x0000 //TX_CSX_ALPHA_1 -393 0x0000 //TX_CSX_ALPHA_2 -394 0x0000 //TX_CSX_ALPHA_3 -395 0x0800 //TX_MU_ARSP_EST -396 0x00C8 //TX_P_OUTBEAM_MIN_TH +391 0x7FFF //TX_POST_MASK_SUP_HSNE +392 0x1388 //TX_TAIL_DET_TH +393 0x4000 //TX_B_LESSCUT_RTO_WTA +394 0x0000 //TX_MEL_G_R +395 0x0080 //TX_SUPHIGH_TH +396 0x0000 //TX_MASK_G_R 397 0x0002 //TX_EXTRA_NS_L -398 0x0800 //TX_EXTRA_NS_A -399 0x0005 //TX_VR_NOISE_FLOOR_TH +398 0x1800 //TX_C_POST_FLT_MASK +399 0x7FFF //TX_A_POST_FLT_WNS 400 0x0148 //TX_MIN_G_LOW300HZ 401 0x0002 //TX_MAXLEVEL_CNG 402 0x00B4 //TX_STN_NOISE_TH 403 0x4000 //TX_POST_MASK_SUP 404 0x7FFF //TX_POST_MASK_ADJUST 405 0x00C8 //TX_NS_ENOISE_MIC0_TH -406 0x0014 //TX_MINENOISE_MIC0_TH +406 0x00DC //TX_MINENOISE_MIC0_TH 407 0x012C //TX_MINENOISE_MIC0_S_TH 408 0x7FFF //TX_MIN_G_CTRL_SSNS 409 0x0000 //TX_METAL_RTO_THR @@ -16308,16 +24552,16 @@ 511 0x6666 //TX_MIC_TO_BFGAIN 512 0x0000 //TX_MICTOBFGAIN0 513 0x0000 //TX_FASTMUE_TH -514 0x0000 //TX_DERVB_LEN_0 -515 0x0000 //TX_DERVB_LEN_1 -516 0x0000 //TX_RHO_DERVB -517 0x0000 //TX_MIC_INDX_DERVB -518 0x0000 //TX_MU_DERVB -519 0x0000 //TX_DR_RESRV_0 -520 0x0000 //TX_DR_RESRV_1 -521 0x0000 //TX_DR_RESRV_2 -522 0x0000 //TX_DR_RESRV_3 -523 0x0000 //TX_DR_RESRV_4 +514 0xC000 //TX_DEREVERB_LF_MU +515 0xC000 //TX_DEREVERB_HF_MU +516 0xCCCC //TX_DEREVERB_DELAY +517 0xD999 //TX_DEREVERB_COEF_LEN +518 0x1F40 //TX_DEREVERB_DNR +519 0x0000 //TX_DEREVERB_ALPHA +520 0x0000 //TX_DEREVERB_BETA +521 0x0000 //TX_GSC_RTOL_TH +522 0x7000 //TX_GSC_RTOH_TH +523 0x0064 //TX_WIDE2_MEANHTH 524 0x0000 //TX_DR_RESRV_5 525 0x0000 //TX_DR_RESRV_6 526 0x0000 //TX_DR_RESRV_7 @@ -16685,14 +24929,79 @@ 888 0x00C8 //TX_FASTNS_ARSPC_TH 889 0xC000 //TX_FASTNS_MASK5_TH 890 0x4848 //TX_POSTSSA_MIN_G_VR_MASK -891 0x7FFF //TX_A_LESSCUT_RTO_MASK +891 0x4000 //TX_A_LESSCUT_RTO_MASK 892 0x1770 //TX_FASTNS_NOISETH 893 0xC000 //TX_FASTNS_SSA_THLFL 894 0xC000 //TX_FASTNS_SSA_THHFL 895 0xCCCC //TX_FASTNS_SSA_THLFH 896 0xD999 //TX_FASTNS_SSA_THHFH +897 0x2339 //TX_SENDFUNC_REG_MICMUTE +898 0x0021 //TX_SENDFUNC_REG_MICMUTE1 +899 0x02BC //TX_MICMUTE_RATIO_THR +900 0x0140 //TX_MICMUTE_AMP_THR +901 0x0004 //TX_MICMUTE_HPF_IND +902 0x00C0 //TX_MICMUTE_LOG_EYR_TH +903 0x0008 //TX_MICMUTE_CVG_TIME +904 0x0008 //TX_MICMUTE_RELEASE_TIME +905 0x01FE //TX_MIC_VOLUME_MIC0MUTE +906 0x0020 //TX_MICMUTE_EPD_OFFSET_0 +907 0x001E //TX_MICMUTE_FRQ_AEC_L +908 0x7999 //TX_MICMUTE_EAD_THR +909 0x7FFF //TX_MICMUTE_LAMBDA_CB_NLE +910 0x7FFF //TX_MICMUTE_LAMBDA_RE_EST +911 0x4000 //TX_DTD_THR1_MICMUTE_0 +912 0x7000 //TX_DTD_THR1_MICMUTE_1 +913 0x7FFF //TX_DTD_THR1_MICMUTE_2 +914 0x7FFF //TX_DTD_THR1_MICMUTE_3 +915 0x6CCC //TX_DTD_THR2_MICMUTE_0 +916 0x0400 //TX_MICMUTE_MIN_EQ_RE_EST_0 +917 0x0400 //TX_MICMUTE_MIN_EQ_RE_EST_1 +918 0x1000 //TX_MICMUTE_MIN_EQ_RE_EST_2 +919 0x7FFF //TX_MICMUTE_MIN_EQ_RE_EST_3 +920 0x7FFF //TX_MICMUTE_MIN_EQ_RE_EST_4 +921 0x4000 //TX_MICMUTE_C_POST_FLT +922 0x03E8 //TX_MICMUTE_DT_CUT_K +923 0x0001 //TX_MICMUTE_DT_CUT_THR +924 0x03E8 //TX_MICMUTE_DT_CUT_K2 +925 0x0001 //TX_MICMUTE_DT_CUT_THR2 +926 0x0064 //TX_MICMUTE_DT2_HOLD_N +927 0x1000 //TX_MICMUTE_RATIODTH_THCUT +928 0x1000 //TX_MICMUTE_B_POST_FLT_ECHOL +929 0x7FFF //TX_MICMUTE_B_POST_FLT_ECHOH +930 0x0400 //TX_MICMUTE_C_POST_FLT_MASK +931 0x7999 //TX_MICMUTE_RATIODTL_CUT_TH +932 0x0258 //TX_MICMUTE_DT_CUT_K1 +933 0x0800 //TX_MICMUTE_N2_SN_EST +934 0xFC00 //TX_MICMUTE_THR_SN_EST_0 +935 0x001C //TX_MICMUTE_MIN_G_CTRL_0 +936 0x6000 //TX_MICMUTE_A_POST_FILT_S_0 +937 0x7000 //TX_MICMUTE_B_POST_FILT_0 +938 0x2710 //TX_MIC1RUB_AMP_THR +939 0x0010 //TX_MIC1MUTE_RATIO_THR +940 0x0450 //TX_MIC1MUTE_AMP_THR +941 0x0008 //TX_MIC1MUTE_CVG_TIME +942 0x0008 //TX_MIC1MUTE_RELEASE_TIME +943 0x0000 //TX_AMS_RESRV_01 +944 0x0000 //TX_AMS_RESRV_02 +945 0x0000 //TX_AMS_RESRV_03 +946 0x0000 //TX_AMS_RESRV_04 +947 0x0000 //TX_AMS_RESRV_05 +948 0x0000 //TX_AMS_RESRV_06 +949 0x0000 //TX_AMS_RESRV_07 +950 0x0000 //TX_AMS_RESRV_08 +951 0x0000 //TX_AMS_RESRV_09 +952 0x0000 //TX_AMS_RESRV_10 +953 0x0000 //TX_AMS_RESRV_11 +954 0x0000 //TX_AMS_RESRV_12 +955 0x0000 //TX_AMS_RESRV_13 +956 0x0000 //TX_AMS_RESRV_14 +957 0x0000 //TX_AMS_RESRV_15 +958 0x0000 //TX_AMS_RESRV_16 +959 0x0000 //TX_AMS_RESRV_17 +960 0x0000 //TX_AMS_RESRV_18 +961 0x0000 //TX_AMS_RESRV_19 #RX -0 0x002C //RX_RECVFUNC_MODE_0 +0 0x202C //RX_RECVFUNC_MODE_0 1 0x0000 //RX_RECVFUNC_MODE_1 2 0x0001 //RX_SAMPLINGFREQ_SIG 3 0x0001 //RX_SAMPLINGFREQ_PROC @@ -17542,11 +25851,862 @@ 110 0x0000 //RX_FDDRC_RESRV_0 129 0x0100 //RX_SPK_VOL 130 0x0000 //RX_VOL_RESRV_0 +#RX 2 +157 0x202C //RX_RECVFUNC_MODE_0 +158 0x0000 //RX_RECVFUNC_MODE_1 +159 0x0001 //RX_SAMPLINGFREQ_SIG +160 0x0001 //RX_SAMPLINGFREQ_PROC +161 0x000A //RX_FRAME_SZ +162 0x0000 //RX_DELAY_OPT +163 0x3000 //RX_TDDRC_ALPHA_UP_1 +164 0x3000 //RX_TDDRC_ALPHA_UP_2 +165 0x3000 //RX_TDDRC_ALPHA_UP_3 +166 0x3000 //RX_TDDRC_ALPHA_UP_4 +167 0x0800 //RX_PGA +168 0x7FFF //RX_A_HP +169 0x4000 //RX_B_PE +170 0x3800 //RX_THR_PITCH_DET_0 +171 0x3000 //RX_THR_PITCH_DET_1 +172 0x2800 //RX_THR_PITCH_DET_2 +173 0x0008 //RX_PITCH_BFR_LEN +174 0x0003 //RX_SBD_PITCH_DET +175 0x0100 //RX_PP_RESRV_0 +176 0x0020 //RX_PP_RESRV_1 +177 0x0600 //RX_N_SN_EST +178 0x000C //RX_N2_SN_EST +179 0x0010 //RX_NS_LVL_CTRL +180 0xF800 //RX_THR_SN_EST +181 0x7CCD //RX_LAMBDA_PFILT +182 0x000A //RX_FENS_RESRV_0 +183 0x0190 //RX_FENS_RESRV_1 +184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +187 0x0002 //RX_EXTRA_NS_L +188 0x0800 //RX_EXTRA_NS_A +189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +190 0x7FFF //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +192 0x199A //RX_A_POST_FLT +193 0x0000 //RX_LMT_THRD +194 0x4000 //RX_LMT_ALPHA +195 0x001C //RX_FDEQ_SUBNUM +196 0x4848 //RX_FDEQ_GAIN_0 +197 0x4848 //RX_FDEQ_GAIN_1 +198 0x4848 //RX_FDEQ_GAIN_2 +199 0x4848 //RX_FDEQ_GAIN_3 +200 0x4848 //RX_FDEQ_GAIN_4 +201 0x4848 //RX_FDEQ_GAIN_5 +202 0x4848 //RX_FDEQ_GAIN_6 +203 0x4848 //RX_FDEQ_GAIN_7 +204 0x4848 //RX_FDEQ_GAIN_8 +205 0x4848 //RX_FDEQ_GAIN_9 +206 0x4848 //RX_FDEQ_GAIN_10 +207 0x4848 //RX_FDEQ_GAIN_11 +208 0x4848 //RX_FDEQ_GAIN_12 +209 0x4848 //RX_FDEQ_GAIN_13 +210 0x4848 //RX_FDEQ_GAIN_14 +211 0x4848 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0202 //RX_FDEQ_BIN_0 +221 0x0203 //RX_FDEQ_BIN_1 +222 0x0303 //RX_FDEQ_BIN_2 +223 0x0304 //RX_FDEQ_BIN_3 +224 0x0405 //RX_FDEQ_BIN_4 +225 0x0506 //RX_FDEQ_BIN_5 +226 0x0708 //RX_FDEQ_BIN_6 +227 0x090A //RX_FDEQ_BIN_7 +228 0x0B0C //RX_FDEQ_BIN_8 +229 0x0D0E //RX_FDEQ_BIN_9 +230 0x0E0F //RX_FDEQ_BIN_10 +231 0x0F10 //RX_FDEQ_BIN_11 +232 0x1011 //RX_FDEQ_BIN_12 +233 0x1104 //RX_FDEQ_BIN_13 +234 0x0000 //RX_FDEQ_BIN_14 +235 0x0000 //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x4000 //RX_FDEQ_RESRV_0 +245 0x0320 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0030 //RX_FDDRC_BAND_MARGIN_1 +248 0x0050 //RX_FDDRC_BAND_MARGIN_2 +249 0x0080 //RX_FDDRC_BAND_MARGIN_3 +250 0x0007 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x5000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x6400 //RX_FDDRC_THRD_3_2 +258 0x6400 //RX_FDDRC_THRD_3_3 +259 0x2000 //RX_FDDRC_SLANT_0_0 +260 0x2000 //RX_FDDRC_SLANT_0_1 +261 0x2000 //RX_FDDRC_SLANT_0_2 +262 0x2000 //RX_FDDRC_SLANT_0_3 +263 0x5333 //RX_FDDRC_SLANT_1_0 +264 0x5333 //RX_FDDRC_SLANT_1_1 +265 0x5333 //RX_FDDRC_SLANT_1_2 +266 0x5333 //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +268 0x0002 //RX_FILTINDX +269 0x0000 //RX_TDDRC_THRD_0 +270 0x0000 //RX_TDDRC_THRD_1 +271 0x2000 //RX_TDDRC_THRD_2 +272 0x3000 //RX_TDDRC_THRD_3 +273 0x0800 //RX_TDDRC_SLANT_0 +274 0x7EB8 //RX_TDDRC_SLANT_1 +275 0x3000 //RX_TDDRC_ALPHA_UP_0 +276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x199A //RX_TDDRC_HMNC_GAIN +279 0x0001 //RX_TDDRC_SMT_FLAG +280 0x0CCD //RX_TDDRC_SMT_W +281 0x0196 //RX_TDDRC_DRC_GAIN +282 0x7C00 //RX_LAMBDA_PKA_FP +283 0x2000 //RX_TPKA_FP +284 0x2000 //RX_MIN_G_FP +285 0x0080 //RX_MAX_G_FP +286 0x000B //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 +288 0x0000 //RX_MAXLEVEL_CNG +289 0x3000 //RX_BWE_UV_TH +290 0x3000 //RX_BWE_UV_TH2 +291 0x1800 //RX_BWE_UV_TH3 +292 0x1000 //RX_BWE_V_TH +293 0x04CD //RX_BWE_GAIN1_V_TH1 +294 0x0F33 //RX_BWE_GAIN1_V_TH2 +295 0x7333 //RX_BWE_UV_EQ +296 0x199A //RX_BWE_V_EQ +297 0x7333 //RX_BWE_TONE_TH +298 0x0004 //RX_BWE_UV_HOLD_T +299 0x6CCD //RX_BWE_GAIN2_ALPHA +300 0x799A //RX_BWE_GAIN3_ALPHA +301 0x001E //RX_BWE_CUTOFF +302 0x3000 //RX_BWE_GAINFILL +303 0x3200 //RX_BWE_MAXTH_TONE +304 0x2000 //RX_BWE_EQ_0 +305 0x2000 //RX_BWE_EQ_1 +306 0x2000 //RX_BWE_EQ_2 +307 0x2000 //RX_BWE_EQ_3 +308 0x2000 //RX_BWE_EQ_4 +309 0x2000 //RX_BWE_EQ_5 +310 0x2000 //RX_BWE_EQ_6 +311 0x0000 //RX_BWE_RESRV_0 +312 0x0000 //RX_BWE_RESRV_1 +313 0x0000 //RX_BWE_RESRV_2 +#VOL 0 +163 0x3000 //RX_TDDRC_ALPHA_UP_1 +164 0x3000 //RX_TDDRC_ALPHA_UP_2 +165 0x3000 //RX_TDDRC_ALPHA_UP_3 +166 0x3000 //RX_TDDRC_ALPHA_UP_4 +184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +190 0x7FFF //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +269 0x0000 //RX_TDDRC_THRD_0 +270 0x0000 //RX_TDDRC_THRD_1 +271 0x2000 //RX_TDDRC_THRD_2 +272 0x3000 //RX_TDDRC_THRD_3 +273 0x0800 //RX_TDDRC_SLANT_0 +274 0x7EB8 //RX_TDDRC_SLANT_1 +275 0x3000 //RX_TDDRC_ALPHA_UP_0 +276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x199A //RX_TDDRC_HMNC_GAIN +279 0x0001 //RX_TDDRC_SMT_FLAG +280 0x0CCD //RX_TDDRC_SMT_W +281 0x0196 //RX_TDDRC_DRC_GAIN +195 0x001C //RX_FDEQ_SUBNUM +196 0x4848 //RX_FDEQ_GAIN_0 +197 0x4848 //RX_FDEQ_GAIN_1 +198 0x4848 //RX_FDEQ_GAIN_2 +199 0x4848 //RX_FDEQ_GAIN_3 +200 0x4848 //RX_FDEQ_GAIN_4 +201 0x4848 //RX_FDEQ_GAIN_5 +202 0x4848 //RX_FDEQ_GAIN_6 +203 0x4848 //RX_FDEQ_GAIN_7 +204 0x4848 //RX_FDEQ_GAIN_8 +205 0x4848 //RX_FDEQ_GAIN_9 +206 0x4848 //RX_FDEQ_GAIN_10 +207 0x4848 //RX_FDEQ_GAIN_11 +208 0x4848 //RX_FDEQ_GAIN_12 +209 0x4848 //RX_FDEQ_GAIN_13 +210 0x4848 //RX_FDEQ_GAIN_14 +211 0x4848 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0202 //RX_FDEQ_BIN_0 +221 0x0203 //RX_FDEQ_BIN_1 +222 0x0303 //RX_FDEQ_BIN_2 +223 0x0304 //RX_FDEQ_BIN_3 +224 0x0405 //RX_FDEQ_BIN_4 +225 0x0506 //RX_FDEQ_BIN_5 +226 0x0708 //RX_FDEQ_BIN_6 +227 0x090A //RX_FDEQ_BIN_7 +228 0x0B0C //RX_FDEQ_BIN_8 +229 0x0D0E //RX_FDEQ_BIN_9 +230 0x0E0F //RX_FDEQ_BIN_10 +231 0x0F10 //RX_FDEQ_BIN_11 +232 0x1011 //RX_FDEQ_BIN_12 +233 0x1104 //RX_FDEQ_BIN_13 +234 0x0000 //RX_FDEQ_BIN_14 +235 0x0000 //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x4000 //RX_FDEQ_RESRV_0 +245 0x0320 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0030 //RX_FDDRC_BAND_MARGIN_1 +248 0x0050 //RX_FDDRC_BAND_MARGIN_2 +249 0x0080 //RX_FDDRC_BAND_MARGIN_3 +250 0x0007 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x5000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x6400 //RX_FDDRC_THRD_3_2 +258 0x6400 //RX_FDDRC_THRD_3_3 +259 0x2000 //RX_FDDRC_SLANT_0_0 +260 0x2000 //RX_FDDRC_SLANT_0_1 +261 0x2000 //RX_FDDRC_SLANT_0_2 +262 0x2000 //RX_FDDRC_SLANT_0_3 +263 0x5333 //RX_FDDRC_SLANT_1_0 +264 0x5333 //RX_FDDRC_SLANT_1_1 +265 0x5333 //RX_FDDRC_SLANT_1_2 +266 0x5333 //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +286 0x000B //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 +#VOL 1 +163 0x3000 //RX_TDDRC_ALPHA_UP_1 +164 0x3000 //RX_TDDRC_ALPHA_UP_2 +165 0x3000 //RX_TDDRC_ALPHA_UP_3 +166 0x3000 //RX_TDDRC_ALPHA_UP_4 +184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +190 0x7FFF //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +269 0x0000 //RX_TDDRC_THRD_0 +270 0x0000 //RX_TDDRC_THRD_1 +271 0x2000 //RX_TDDRC_THRD_2 +272 0x3000 //RX_TDDRC_THRD_3 +273 0x0800 //RX_TDDRC_SLANT_0 +274 0x7EB8 //RX_TDDRC_SLANT_1 +275 0x3000 //RX_TDDRC_ALPHA_UP_0 +276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x199A //RX_TDDRC_HMNC_GAIN +279 0x0001 //RX_TDDRC_SMT_FLAG +280 0x0CCD //RX_TDDRC_SMT_W +281 0x0196 //RX_TDDRC_DRC_GAIN +195 0x001C //RX_FDEQ_SUBNUM +196 0x4848 //RX_FDEQ_GAIN_0 +197 0x4848 //RX_FDEQ_GAIN_1 +198 0x4848 //RX_FDEQ_GAIN_2 +199 0x4848 //RX_FDEQ_GAIN_3 +200 0x4848 //RX_FDEQ_GAIN_4 +201 0x4848 //RX_FDEQ_GAIN_5 +202 0x4848 //RX_FDEQ_GAIN_6 +203 0x4848 //RX_FDEQ_GAIN_7 +204 0x4848 //RX_FDEQ_GAIN_8 +205 0x4848 //RX_FDEQ_GAIN_9 +206 0x4848 //RX_FDEQ_GAIN_10 +207 0x4848 //RX_FDEQ_GAIN_11 +208 0x4848 //RX_FDEQ_GAIN_12 +209 0x4848 //RX_FDEQ_GAIN_13 +210 0x4848 //RX_FDEQ_GAIN_14 +211 0x4848 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0202 //RX_FDEQ_BIN_0 +221 0x0203 //RX_FDEQ_BIN_1 +222 0x0303 //RX_FDEQ_BIN_2 +223 0x0304 //RX_FDEQ_BIN_3 +224 0x0405 //RX_FDEQ_BIN_4 +225 0x0506 //RX_FDEQ_BIN_5 +226 0x0708 //RX_FDEQ_BIN_6 +227 0x090A //RX_FDEQ_BIN_7 +228 0x0B0C //RX_FDEQ_BIN_8 +229 0x0D0E //RX_FDEQ_BIN_9 +230 0x0E0F //RX_FDEQ_BIN_10 +231 0x0F10 //RX_FDEQ_BIN_11 +232 0x1011 //RX_FDEQ_BIN_12 +233 0x1104 //RX_FDEQ_BIN_13 +234 0x0000 //RX_FDEQ_BIN_14 +235 0x0000 //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x4000 //RX_FDEQ_RESRV_0 +245 0x0320 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0030 //RX_FDDRC_BAND_MARGIN_1 +248 0x0050 //RX_FDDRC_BAND_MARGIN_2 +249 0x0080 //RX_FDDRC_BAND_MARGIN_3 +250 0x0007 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x5000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x6400 //RX_FDDRC_THRD_3_2 +258 0x6400 //RX_FDDRC_THRD_3_3 +259 0x2000 //RX_FDDRC_SLANT_0_0 +260 0x2000 //RX_FDDRC_SLANT_0_1 +261 0x2000 //RX_FDDRC_SLANT_0_2 +262 0x2000 //RX_FDDRC_SLANT_0_3 +263 0x5333 //RX_FDDRC_SLANT_1_0 +264 0x5333 //RX_FDDRC_SLANT_1_1 +265 0x5333 //RX_FDDRC_SLANT_1_2 +266 0x5333 //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +286 0x0013 //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 +#VOL 2 +163 0x3000 //RX_TDDRC_ALPHA_UP_1 +164 0x3000 //RX_TDDRC_ALPHA_UP_2 +165 0x3000 //RX_TDDRC_ALPHA_UP_3 +166 0x3000 //RX_TDDRC_ALPHA_UP_4 +184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +190 0x7FFF //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +269 0x0000 //RX_TDDRC_THRD_0 +270 0x0000 //RX_TDDRC_THRD_1 +271 0x2000 //RX_TDDRC_THRD_2 +272 0x3000 //RX_TDDRC_THRD_3 +273 0x0800 //RX_TDDRC_SLANT_0 +274 0x7EB8 //RX_TDDRC_SLANT_1 +275 0x3000 //RX_TDDRC_ALPHA_UP_0 +276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x199A //RX_TDDRC_HMNC_GAIN +279 0x0001 //RX_TDDRC_SMT_FLAG +280 0x0CCD //RX_TDDRC_SMT_W +281 0x0196 //RX_TDDRC_DRC_GAIN +195 0x001C //RX_FDEQ_SUBNUM +196 0x4848 //RX_FDEQ_GAIN_0 +197 0x4848 //RX_FDEQ_GAIN_1 +198 0x4848 //RX_FDEQ_GAIN_2 +199 0x4848 //RX_FDEQ_GAIN_3 +200 0x4848 //RX_FDEQ_GAIN_4 +201 0x4848 //RX_FDEQ_GAIN_5 +202 0x4848 //RX_FDEQ_GAIN_6 +203 0x4848 //RX_FDEQ_GAIN_7 +204 0x4848 //RX_FDEQ_GAIN_8 +205 0x4848 //RX_FDEQ_GAIN_9 +206 0x4848 //RX_FDEQ_GAIN_10 +207 0x4848 //RX_FDEQ_GAIN_11 +208 0x4848 //RX_FDEQ_GAIN_12 +209 0x4848 //RX_FDEQ_GAIN_13 +210 0x4848 //RX_FDEQ_GAIN_14 +211 0x4848 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0202 //RX_FDEQ_BIN_0 +221 0x0203 //RX_FDEQ_BIN_1 +222 0x0303 //RX_FDEQ_BIN_2 +223 0x0304 //RX_FDEQ_BIN_3 +224 0x0405 //RX_FDEQ_BIN_4 +225 0x0506 //RX_FDEQ_BIN_5 +226 0x0708 //RX_FDEQ_BIN_6 +227 0x090A //RX_FDEQ_BIN_7 +228 0x0B0C //RX_FDEQ_BIN_8 +229 0x0D0E //RX_FDEQ_BIN_9 +230 0x0E0F //RX_FDEQ_BIN_10 +231 0x0F10 //RX_FDEQ_BIN_11 +232 0x1011 //RX_FDEQ_BIN_12 +233 0x1104 //RX_FDEQ_BIN_13 +234 0x0000 //RX_FDEQ_BIN_14 +235 0x0000 //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x4000 //RX_FDEQ_RESRV_0 +245 0x0320 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0030 //RX_FDDRC_BAND_MARGIN_1 +248 0x0050 //RX_FDDRC_BAND_MARGIN_2 +249 0x0080 //RX_FDDRC_BAND_MARGIN_3 +250 0x0007 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x5000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x6400 //RX_FDDRC_THRD_3_2 +258 0x6400 //RX_FDDRC_THRD_3_3 +259 0x2000 //RX_FDDRC_SLANT_0_0 +260 0x2000 //RX_FDDRC_SLANT_0_1 +261 0x2000 //RX_FDDRC_SLANT_0_2 +262 0x2000 //RX_FDDRC_SLANT_0_3 +263 0x5333 //RX_FDDRC_SLANT_1_0 +264 0x5333 //RX_FDDRC_SLANT_1_1 +265 0x5333 //RX_FDDRC_SLANT_1_2 +266 0x5333 //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +286 0x0020 //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 +#VOL 3 +163 0x3000 //RX_TDDRC_ALPHA_UP_1 +164 0x3000 //RX_TDDRC_ALPHA_UP_2 +165 0x3000 //RX_TDDRC_ALPHA_UP_3 +166 0x3000 //RX_TDDRC_ALPHA_UP_4 +184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +190 0x7FFF //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +269 0x0000 //RX_TDDRC_THRD_0 +270 0x0000 //RX_TDDRC_THRD_1 +271 0x2000 //RX_TDDRC_THRD_2 +272 0x3000 //RX_TDDRC_THRD_3 +273 0x0800 //RX_TDDRC_SLANT_0 +274 0x7EB8 //RX_TDDRC_SLANT_1 +275 0x3000 //RX_TDDRC_ALPHA_UP_0 +276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x199A //RX_TDDRC_HMNC_GAIN +279 0x0001 //RX_TDDRC_SMT_FLAG +280 0x0CCD //RX_TDDRC_SMT_W +281 0x0196 //RX_TDDRC_DRC_GAIN +195 0x001C //RX_FDEQ_SUBNUM +196 0x4848 //RX_FDEQ_GAIN_0 +197 0x4848 //RX_FDEQ_GAIN_1 +198 0x4848 //RX_FDEQ_GAIN_2 +199 0x4848 //RX_FDEQ_GAIN_3 +200 0x4848 //RX_FDEQ_GAIN_4 +201 0x4848 //RX_FDEQ_GAIN_5 +202 0x4848 //RX_FDEQ_GAIN_6 +203 0x4848 //RX_FDEQ_GAIN_7 +204 0x4848 //RX_FDEQ_GAIN_8 +205 0x4848 //RX_FDEQ_GAIN_9 +206 0x4848 //RX_FDEQ_GAIN_10 +207 0x4848 //RX_FDEQ_GAIN_11 +208 0x4848 //RX_FDEQ_GAIN_12 +209 0x4848 //RX_FDEQ_GAIN_13 +210 0x4848 //RX_FDEQ_GAIN_14 +211 0x4848 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0202 //RX_FDEQ_BIN_0 +221 0x0203 //RX_FDEQ_BIN_1 +222 0x0303 //RX_FDEQ_BIN_2 +223 0x0304 //RX_FDEQ_BIN_3 +224 0x0405 //RX_FDEQ_BIN_4 +225 0x0506 //RX_FDEQ_BIN_5 +226 0x0708 //RX_FDEQ_BIN_6 +227 0x090A //RX_FDEQ_BIN_7 +228 0x0B0C //RX_FDEQ_BIN_8 +229 0x0D0E //RX_FDEQ_BIN_9 +230 0x0E0F //RX_FDEQ_BIN_10 +231 0x0F10 //RX_FDEQ_BIN_11 +232 0x1011 //RX_FDEQ_BIN_12 +233 0x1104 //RX_FDEQ_BIN_13 +234 0x0000 //RX_FDEQ_BIN_14 +235 0x0000 //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x4000 //RX_FDEQ_RESRV_0 +245 0x0320 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0030 //RX_FDDRC_BAND_MARGIN_1 +248 0x0050 //RX_FDDRC_BAND_MARGIN_2 +249 0x0080 //RX_FDDRC_BAND_MARGIN_3 +250 0x0007 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x5000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x6400 //RX_FDDRC_THRD_3_2 +258 0x6400 //RX_FDDRC_THRD_3_3 +259 0x2000 //RX_FDDRC_SLANT_0_0 +260 0x2000 //RX_FDDRC_SLANT_0_1 +261 0x2000 //RX_FDDRC_SLANT_0_2 +262 0x2000 //RX_FDDRC_SLANT_0_3 +263 0x5333 //RX_FDDRC_SLANT_1_0 +264 0x5333 //RX_FDDRC_SLANT_1_1 +265 0x5333 //RX_FDDRC_SLANT_1_2 +266 0x5333 //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +286 0x0036 //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 +#VOL 4 +163 0x3000 //RX_TDDRC_ALPHA_UP_1 +164 0x3000 //RX_TDDRC_ALPHA_UP_2 +165 0x3000 //RX_TDDRC_ALPHA_UP_3 +166 0x3000 //RX_TDDRC_ALPHA_UP_4 +184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +190 0x7FFF //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +269 0x0000 //RX_TDDRC_THRD_0 +270 0x0000 //RX_TDDRC_THRD_1 +271 0x2000 //RX_TDDRC_THRD_2 +272 0x3000 //RX_TDDRC_THRD_3 +273 0x0800 //RX_TDDRC_SLANT_0 +274 0x7EB8 //RX_TDDRC_SLANT_1 +275 0x3000 //RX_TDDRC_ALPHA_UP_0 +276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x199A //RX_TDDRC_HMNC_GAIN +279 0x0001 //RX_TDDRC_SMT_FLAG +280 0x0CCD //RX_TDDRC_SMT_W +281 0x0196 //RX_TDDRC_DRC_GAIN +195 0x001C //RX_FDEQ_SUBNUM +196 0x4848 //RX_FDEQ_GAIN_0 +197 0x4848 //RX_FDEQ_GAIN_1 +198 0x4848 //RX_FDEQ_GAIN_2 +199 0x4848 //RX_FDEQ_GAIN_3 +200 0x4848 //RX_FDEQ_GAIN_4 +201 0x4848 //RX_FDEQ_GAIN_5 +202 0x4848 //RX_FDEQ_GAIN_6 +203 0x4848 //RX_FDEQ_GAIN_7 +204 0x4848 //RX_FDEQ_GAIN_8 +205 0x4848 //RX_FDEQ_GAIN_9 +206 0x4848 //RX_FDEQ_GAIN_10 +207 0x4848 //RX_FDEQ_GAIN_11 +208 0x4848 //RX_FDEQ_GAIN_12 +209 0x4848 //RX_FDEQ_GAIN_13 +210 0x4848 //RX_FDEQ_GAIN_14 +211 0x4848 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0202 //RX_FDEQ_BIN_0 +221 0x0203 //RX_FDEQ_BIN_1 +222 0x0303 //RX_FDEQ_BIN_2 +223 0x0304 //RX_FDEQ_BIN_3 +224 0x0405 //RX_FDEQ_BIN_4 +225 0x0506 //RX_FDEQ_BIN_5 +226 0x0708 //RX_FDEQ_BIN_6 +227 0x090A //RX_FDEQ_BIN_7 +228 0x0B0C //RX_FDEQ_BIN_8 +229 0x0D0E //RX_FDEQ_BIN_9 +230 0x0E0F //RX_FDEQ_BIN_10 +231 0x0F10 //RX_FDEQ_BIN_11 +232 0x1011 //RX_FDEQ_BIN_12 +233 0x1104 //RX_FDEQ_BIN_13 +234 0x0000 //RX_FDEQ_BIN_14 +235 0x0000 //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x4000 //RX_FDEQ_RESRV_0 +245 0x0320 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0030 //RX_FDDRC_BAND_MARGIN_1 +248 0x0050 //RX_FDDRC_BAND_MARGIN_2 +249 0x0080 //RX_FDDRC_BAND_MARGIN_3 +250 0x0007 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x5000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x6400 //RX_FDDRC_THRD_3_2 +258 0x6400 //RX_FDDRC_THRD_3_3 +259 0x2000 //RX_FDDRC_SLANT_0_0 +260 0x2000 //RX_FDDRC_SLANT_0_1 +261 0x2000 //RX_FDDRC_SLANT_0_2 +262 0x2000 //RX_FDDRC_SLANT_0_3 +263 0x5333 //RX_FDDRC_SLANT_1_0 +264 0x5333 //RX_FDDRC_SLANT_1_1 +265 0x5333 //RX_FDDRC_SLANT_1_2 +266 0x5333 //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +286 0x005B //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 +#VOL 5 +163 0x3000 //RX_TDDRC_ALPHA_UP_1 +164 0x3000 //RX_TDDRC_ALPHA_UP_2 +165 0x3000 //RX_TDDRC_ALPHA_UP_3 +166 0x3000 //RX_TDDRC_ALPHA_UP_4 +184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +190 0x7FFF //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +269 0x0000 //RX_TDDRC_THRD_0 +270 0x0000 //RX_TDDRC_THRD_1 +271 0x2000 //RX_TDDRC_THRD_2 +272 0x3000 //RX_TDDRC_THRD_3 +273 0x0800 //RX_TDDRC_SLANT_0 +274 0x7EB8 //RX_TDDRC_SLANT_1 +275 0x3000 //RX_TDDRC_ALPHA_UP_0 +276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x199A //RX_TDDRC_HMNC_GAIN +279 0x0001 //RX_TDDRC_SMT_FLAG +280 0x0CCD //RX_TDDRC_SMT_W +281 0x0196 //RX_TDDRC_DRC_GAIN +195 0x001C //RX_FDEQ_SUBNUM +196 0x4848 //RX_FDEQ_GAIN_0 +197 0x4848 //RX_FDEQ_GAIN_1 +198 0x4848 //RX_FDEQ_GAIN_2 +199 0x4848 //RX_FDEQ_GAIN_3 +200 0x4848 //RX_FDEQ_GAIN_4 +201 0x4848 //RX_FDEQ_GAIN_5 +202 0x4848 //RX_FDEQ_GAIN_6 +203 0x4848 //RX_FDEQ_GAIN_7 +204 0x4848 //RX_FDEQ_GAIN_8 +205 0x4848 //RX_FDEQ_GAIN_9 +206 0x4848 //RX_FDEQ_GAIN_10 +207 0x4848 //RX_FDEQ_GAIN_11 +208 0x4848 //RX_FDEQ_GAIN_12 +209 0x4848 //RX_FDEQ_GAIN_13 +210 0x4848 //RX_FDEQ_GAIN_14 +211 0x4848 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0202 //RX_FDEQ_BIN_0 +221 0x0203 //RX_FDEQ_BIN_1 +222 0x0303 //RX_FDEQ_BIN_2 +223 0x0304 //RX_FDEQ_BIN_3 +224 0x0405 //RX_FDEQ_BIN_4 +225 0x0506 //RX_FDEQ_BIN_5 +226 0x0708 //RX_FDEQ_BIN_6 +227 0x090A //RX_FDEQ_BIN_7 +228 0x0B0C //RX_FDEQ_BIN_8 +229 0x0D0E //RX_FDEQ_BIN_9 +230 0x0E0F //RX_FDEQ_BIN_10 +231 0x0F10 //RX_FDEQ_BIN_11 +232 0x1011 //RX_FDEQ_BIN_12 +233 0x1104 //RX_FDEQ_BIN_13 +234 0x0000 //RX_FDEQ_BIN_14 +235 0x0000 //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x4000 //RX_FDEQ_RESRV_0 +245 0x0320 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0030 //RX_FDDRC_BAND_MARGIN_1 +248 0x0050 //RX_FDDRC_BAND_MARGIN_2 +249 0x0080 //RX_FDDRC_BAND_MARGIN_3 +250 0x0007 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x5000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x6400 //RX_FDDRC_THRD_3_2 +258 0x6400 //RX_FDDRC_THRD_3_3 +259 0x2000 //RX_FDDRC_SLANT_0_0 +260 0x2000 //RX_FDDRC_SLANT_0_1 +261 0x2000 //RX_FDDRC_SLANT_0_2 +262 0x2000 //RX_FDDRC_SLANT_0_3 +263 0x5333 //RX_FDDRC_SLANT_1_0 +264 0x5333 //RX_FDDRC_SLANT_1_1 +265 0x5333 //RX_FDDRC_SLANT_1_2 +266 0x5333 //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +286 0x0099 //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 +#VOL 6 +163 0x3000 //RX_TDDRC_ALPHA_UP_1 +164 0x3000 //RX_TDDRC_ALPHA_UP_2 +165 0x3000 //RX_TDDRC_ALPHA_UP_3 +166 0x3000 //RX_TDDRC_ALPHA_UP_4 +184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +190 0x7FFF //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +269 0x0000 //RX_TDDRC_THRD_0 +270 0x0000 //RX_TDDRC_THRD_1 +271 0x2000 //RX_TDDRC_THRD_2 +272 0x3000 //RX_TDDRC_THRD_3 +273 0x0800 //RX_TDDRC_SLANT_0 +274 0x7EB8 //RX_TDDRC_SLANT_1 +275 0x3000 //RX_TDDRC_ALPHA_UP_0 +276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x199A //RX_TDDRC_HMNC_GAIN +279 0x0001 //RX_TDDRC_SMT_FLAG +280 0x0CCD //RX_TDDRC_SMT_W +281 0x0196 //RX_TDDRC_DRC_GAIN +195 0x001C //RX_FDEQ_SUBNUM +196 0x4848 //RX_FDEQ_GAIN_0 +197 0x4848 //RX_FDEQ_GAIN_1 +198 0x4848 //RX_FDEQ_GAIN_2 +199 0x4848 //RX_FDEQ_GAIN_3 +200 0x4848 //RX_FDEQ_GAIN_4 +201 0x4848 //RX_FDEQ_GAIN_5 +202 0x4848 //RX_FDEQ_GAIN_6 +203 0x4848 //RX_FDEQ_GAIN_7 +204 0x4848 //RX_FDEQ_GAIN_8 +205 0x4848 //RX_FDEQ_GAIN_9 +206 0x4848 //RX_FDEQ_GAIN_10 +207 0x4848 //RX_FDEQ_GAIN_11 +208 0x4848 //RX_FDEQ_GAIN_12 +209 0x4848 //RX_FDEQ_GAIN_13 +210 0x4848 //RX_FDEQ_GAIN_14 +211 0x4848 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0202 //RX_FDEQ_BIN_0 +221 0x0203 //RX_FDEQ_BIN_1 +222 0x0303 //RX_FDEQ_BIN_2 +223 0x0304 //RX_FDEQ_BIN_3 +224 0x0405 //RX_FDEQ_BIN_4 +225 0x0506 //RX_FDEQ_BIN_5 +226 0x0708 //RX_FDEQ_BIN_6 +227 0x090A //RX_FDEQ_BIN_7 +228 0x0B0C //RX_FDEQ_BIN_8 +229 0x0D0E //RX_FDEQ_BIN_9 +230 0x0E0F //RX_FDEQ_BIN_10 +231 0x0F10 //RX_FDEQ_BIN_11 +232 0x1011 //RX_FDEQ_BIN_12 +233 0x1104 //RX_FDEQ_BIN_13 +234 0x0000 //RX_FDEQ_BIN_14 +235 0x0000 //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x4000 //RX_FDEQ_RESRV_0 +245 0x0320 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0030 //RX_FDDRC_BAND_MARGIN_1 +248 0x0050 //RX_FDDRC_BAND_MARGIN_2 +249 0x0080 //RX_FDDRC_BAND_MARGIN_3 +250 0x0007 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x5000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x6400 //RX_FDDRC_THRD_3_2 +258 0x6400 //RX_FDDRC_THRD_3_3 +259 0x2000 //RX_FDDRC_SLANT_0_0 +260 0x2000 //RX_FDDRC_SLANT_0_1 +261 0x2000 //RX_FDDRC_SLANT_0_2 +262 0x2000 //RX_FDDRC_SLANT_0_3 +263 0x5333 //RX_FDDRC_SLANT_1_0 +264 0x5333 //RX_FDDRC_SLANT_1_1 +265 0x5333 //RX_FDDRC_SLANT_1_2 +266 0x5333 //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +286 0x0100 //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 #CASE_NAME HEADSET-RESERVE1-VOICE_GENERIC-SWB -#PARAM_MODE FULL -#PARAM_TYPE TX+RX -#TOTAL_CUSTOM_STEP 7 +#PARAM_MODE Full +#PARAM_TYPE TX+2RX +#TOTAL_CUSTOM_STEP 7+7 #TX 0 0x0009 //TX_OPERATION_MODE_0 1 0x0001 //TX_OPERATION_MODE_1 @@ -17790,7 +26950,7 @@ 239 0x0800 //TX_DT_RESRV_7 240 0x0800 //TX_DT_RESRV_8 241 0x0000 //TX_DT_RESRV_9 -242 0xF400 //TX_THR_SN_EST_0 +242 0xFA00 //TX_THR_SN_EST_0 243 0xF400 //TX_THR_SN_EST_1 244 0xF600 //TX_THR_SN_EST_2 245 0xF400 //TX_THR_SN_EST_3 @@ -17799,20 +26959,20 @@ 248 0xF400 //TX_THR_SN_EST_6 249 0xF600 //TX_THR_SN_EST_7 250 0x0000 //TX_DELTA_THR_SN_EST_0 -251 0x0000 //TX_DELTA_THR_SN_EST_1 +251 0x0200 //TX_DELTA_THR_SN_EST_1 252 0x0200 //TX_DELTA_THR_SN_EST_2 253 0x0200 //TX_DELTA_THR_SN_EST_3 254 0x0200 //TX_DELTA_THR_SN_EST_4 255 0x0200 //TX_DELTA_THR_SN_EST_5 -256 0x0200 //TX_DELTA_THR_SN_EST_6 +256 0x0000 //TX_DELTA_THR_SN_EST_6 257 0x0200 //TX_DELTA_THR_SN_EST_7 258 0x6000 //TX_LAMBDA_NN_EST_0 -259 0x6000 //TX_LAMBDA_NN_EST_1 +259 0x4000 //TX_LAMBDA_NN_EST_1 260 0x4000 //TX_LAMBDA_NN_EST_2 261 0x4000 //TX_LAMBDA_NN_EST_3 262 0x4000 //TX_LAMBDA_NN_EST_4 263 0x4000 //TX_LAMBDA_NN_EST_5 -264 0x4000 //TX_LAMBDA_NN_EST_6 +264 0x6000 //TX_LAMBDA_NN_EST_6 265 0x4000 //TX_LAMBDA_NN_EST_7 266 0x0400 //TX_N_SN_EST 267 0x001E //TX_INBEAM_T @@ -17830,16 +26990,16 @@ 279 0x1000 //TX_B_POST_FLT_0 280 0x1000 //TX_B_POST_FLT_1 281 0x000B //TX_NS_LVL_CTRL_0 -282 0x000F //TX_NS_LVL_CTRL_1 -283 0x0011 //TX_NS_LVL_CTRL_2 +282 0x0011 //TX_NS_LVL_CTRL_1 +283 0x000F //TX_NS_LVL_CTRL_2 284 0x000F //TX_NS_LVL_CTRL_3 285 0x000F //TX_NS_LVL_CTRL_4 286 0x000F //TX_NS_LVL_CTRL_5 287 0x000F //TX_NS_LVL_CTRL_6 288 0x0011 //TX_NS_LVL_CTRL_7 289 0x000C //TX_MIN_GAIN_S_0 -290 0x000C //TX_MIN_GAIN_S_1 -291 0x000F //TX_MIN_GAIN_S_2 +290 0x000F //TX_MIN_GAIN_S_1 +291 0x000C //TX_MIN_GAIN_S_2 292 0x000C //TX_MIN_GAIN_S_3 293 0x000C //TX_MIN_GAIN_S_4 294 0x000C //TX_MIN_GAIN_S_5 @@ -17863,12 +27023,12 @@ 312 0x7FFF //TX_A_POST_FILT_0 313 0x2000 //TX_A_POST_FILT_1 314 0x2000 //TX_A_POST_FILT_S_0 -315 0x4000 //TX_A_POST_FILT_S_1 +315 0x5000 //TX_A_POST_FILT_S_1 316 0x5000 //TX_A_POST_FILT_S_2 317 0x5000 //TX_A_POST_FILT_S_3 318 0x5000 //TX_A_POST_FILT_S_4 319 0x5000 //TX_A_POST_FILT_S_5 -320 0x5000 //TX_A_POST_FILT_S_6 +320 0x4000 //TX_A_POST_FILT_S_6 321 0x5000 //TX_A_POST_FILT_S_7 322 0x1000 //TX_B_POST_FILT_0 323 0x1000 //TX_B_POST_FILT_1 @@ -17915,7 +27075,7 @@ 364 0x0000 //TX_K_APT 365 0x0001 //TX_NOISEDET 366 0x0190 //TX_NDETCT -367 0x0050 //TX_NOISE_TH_0 +367 0x0383 //TX_NOISE_TH_0 368 0x7FFF //TX_NOISE_TH_0_2 369 0x7FFF //TX_NOISE_TH_0_3 370 0x07D0 //TX_NOISE_TH_1 @@ -17927,11 +27087,11 @@ 376 0x7FFF //TX_NOISE_TH_5_3 377 0x7FFF //TX_NOISE_TH_5_4 378 0x044C //TX_NOISE_TH_6 -379 0x0014 //TX_MINENOISE_TH -380 0x4000 //TX_MINENOISE_MIC0_TH_MTS -381 0xFFEE //TX_MINENOISE_MIC0_TH_EXP -382 0x6000 //TX_MINENOISE_MIC0_S_TH_MTS -383 0xFFF3 //TX_MINENOISE_MIC0_S_TH_EXP +379 0x044C //TX_MINENOISE_TH +380 0xD508 //TX_MORENS_TFMASK_TH +381 0x0001 //TX_DRC_QUIET_FLOOR +382 0x3A98 //TX_RATIODTL_CUT_TH +383 0x0DAC //TX_DT_CUT_K1 384 0x0666 //TX_OUT_ENER_S_TH_CLEAN 385 0x0666 //TX_OUT_ENER_S_TH_LESSCLEAN 386 0x0333 //TX_OUT_ENER_S_TH_NOISY @@ -17939,22 +27099,22 @@ 388 0x0333 //TX_OUT_ENER_TH_SPEECH 389 0x2000 //TX_SN_NPB_GAIN 390 0x0000 //TX_NN_NPB_GAIN -391 0x0000 //TX_CSX_ALPHA_0 -392 0x0000 //TX_CSX_ALPHA_1 -393 0x0000 //TX_CSX_ALPHA_2 -394 0x0000 //TX_CSX_ALPHA_3 -395 0x0800 //TX_MU_ARSP_EST -396 0x00C8 //TX_P_OUTBEAM_MIN_TH +391 0x7FFF //TX_POST_MASK_SUP_HSNE +392 0x1388 //TX_TAIL_DET_TH +393 0x4000 //TX_B_LESSCUT_RTO_WTA +394 0x0000 //TX_MEL_G_R +395 0x0080 //TX_SUPHIGH_TH +396 0x0000 //TX_MASK_G_R 397 0x0002 //TX_EXTRA_NS_L -398 0x0800 //TX_EXTRA_NS_A -399 0x0005 //TX_VR_NOISE_FLOOR_TH +398 0x1800 //TX_C_POST_FLT_MASK +399 0x7FFF //TX_A_POST_FLT_WNS 400 0x0148 //TX_MIN_G_LOW300HZ 401 0x0002 //TX_MAXLEVEL_CNG 402 0x00B4 //TX_STN_NOISE_TH 403 0x4000 //TX_POST_MASK_SUP 404 0x7FFF //TX_POST_MASK_ADJUST 405 0x00C8 //TX_NS_ENOISE_MIC0_TH -406 0x0014 //TX_MINENOISE_MIC0_TH +406 0x02F3 //TX_MINENOISE_MIC0_TH 407 0x012C //TX_MINENOISE_MIC0_S_TH 408 0x2900 //TX_MIN_G_CTRL_SSNS 409 0x0800 //TX_METAL_RTO_THR @@ -18062,16 +27222,16 @@ 511 0x6666 //TX_MIC_TO_BFGAIN 512 0x0000 //TX_MICTOBFGAIN0 513 0x0000 //TX_FASTMUE_TH -514 0x0000 //TX_DERVB_LEN_0 -515 0x0000 //TX_DERVB_LEN_1 -516 0x0000 //TX_RHO_DERVB -517 0x0000 //TX_MIC_INDX_DERVB -518 0x0000 //TX_MU_DERVB -519 0x0000 //TX_DR_RESRV_0 -520 0x0000 //TX_DR_RESRV_1 -521 0x0000 //TX_DR_RESRV_2 -522 0x0000 //TX_DR_RESRV_3 -523 0x0000 //TX_DR_RESRV_4 +514 0xC000 //TX_DEREVERB_LF_MU +515 0xC000 //TX_DEREVERB_HF_MU +516 0xCCCC //TX_DEREVERB_DELAY +517 0xD999 //TX_DEREVERB_COEF_LEN +518 0x1F40 //TX_DEREVERB_DNR +519 0x0000 //TX_DEREVERB_ALPHA +520 0x0000 //TX_DEREVERB_BETA +521 0x0000 //TX_GSC_RTOL_TH +522 0x7000 //TX_GSC_RTOH_TH +523 0x0064 //TX_WIDE2_MEANHTH 524 0x0000 //TX_DR_RESRV_5 525 0x0000 //TX_DR_RESRV_6 526 0x0000 //TX_DR_RESRV_7 @@ -18437,16 +27597,81 @@ 886 0x0CCD //TX_FASTNS_TFMASKBIN_TH2 887 0x0CCD //TX_FASTNS_TFMASKBIN_TH3 888 0x0028 //TX_FASTNS_ARSPC_TH -889 0xC000 //TX_FASTNS_MASK5_TH +889 0x8000 //TX_FASTNS_MASK5_TH 890 0x4848 //TX_POSTSSA_MIN_G_VR_MASK -891 0x1000 //TX_A_LESSCUT_RTO_MASK +891 0x4000 //TX_A_LESSCUT_RTO_MASK 892 0x1770 //TX_FASTNS_NOISETH 893 0xC000 //TX_FASTNS_SSA_THLFL 894 0xC000 //TX_FASTNS_SSA_THHFL 895 0xCCCC //TX_FASTNS_SSA_THLFH 896 0xD999 //TX_FASTNS_SSA_THHFH +897 0x2339 //TX_SENDFUNC_REG_MICMUTE +898 0x0021 //TX_SENDFUNC_REG_MICMUTE1 +899 0x02BC //TX_MICMUTE_RATIO_THR +900 0x0140 //TX_MICMUTE_AMP_THR +901 0x0004 //TX_MICMUTE_HPF_IND +902 0x00C0 //TX_MICMUTE_LOG_EYR_TH +903 0x0008 //TX_MICMUTE_CVG_TIME +904 0x0008 //TX_MICMUTE_RELEASE_TIME +905 0x01FE //TX_MIC_VOLUME_MIC0MUTE +906 0x0020 //TX_MICMUTE_EPD_OFFSET_0 +907 0x001E //TX_MICMUTE_FRQ_AEC_L +908 0x7999 //TX_MICMUTE_EAD_THR +909 0x7FFF //TX_MICMUTE_LAMBDA_CB_NLE +910 0x7FFF //TX_MICMUTE_LAMBDA_RE_EST +911 0x4000 //TX_DTD_THR1_MICMUTE_0 +912 0x7000 //TX_DTD_THR1_MICMUTE_1 +913 0x7FFF //TX_DTD_THR1_MICMUTE_2 +914 0x7FFF //TX_DTD_THR1_MICMUTE_3 +915 0x6CCC //TX_DTD_THR2_MICMUTE_0 +916 0x0400 //TX_MICMUTE_MIN_EQ_RE_EST_0 +917 0x0400 //TX_MICMUTE_MIN_EQ_RE_EST_1 +918 0x1000 //TX_MICMUTE_MIN_EQ_RE_EST_2 +919 0x7FFF //TX_MICMUTE_MIN_EQ_RE_EST_3 +920 0x7FFF //TX_MICMUTE_MIN_EQ_RE_EST_4 +921 0x4000 //TX_MICMUTE_C_POST_FLT +922 0x03E8 //TX_MICMUTE_DT_CUT_K +923 0x0001 //TX_MICMUTE_DT_CUT_THR +924 0x03E8 //TX_MICMUTE_DT_CUT_K2 +925 0x0001 //TX_MICMUTE_DT_CUT_THR2 +926 0x0064 //TX_MICMUTE_DT2_HOLD_N +927 0x1000 //TX_MICMUTE_RATIODTH_THCUT +928 0x1000 //TX_MICMUTE_B_POST_FLT_ECHOL +929 0x7FFF //TX_MICMUTE_B_POST_FLT_ECHOH +930 0x0400 //TX_MICMUTE_C_POST_FLT_MASK +931 0x7999 //TX_MICMUTE_RATIODTL_CUT_TH +932 0x0258 //TX_MICMUTE_DT_CUT_K1 +933 0x0800 //TX_MICMUTE_N2_SN_EST +934 0xFC00 //TX_MICMUTE_THR_SN_EST_0 +935 0x001C //TX_MICMUTE_MIN_G_CTRL_0 +936 0x6000 //TX_MICMUTE_A_POST_FILT_S_0 +937 0x7000 //TX_MICMUTE_B_POST_FILT_0 +938 0x2710 //TX_MIC1RUB_AMP_THR +939 0x0010 //TX_MIC1MUTE_RATIO_THR +940 0x0450 //TX_MIC1MUTE_AMP_THR +941 0x0008 //TX_MIC1MUTE_CVG_TIME +942 0x0008 //TX_MIC1MUTE_RELEASE_TIME +943 0x0000 //TX_AMS_RESRV_01 +944 0x0000 //TX_AMS_RESRV_02 +945 0x0000 //TX_AMS_RESRV_03 +946 0x0000 //TX_AMS_RESRV_04 +947 0x0000 //TX_AMS_RESRV_05 +948 0x0000 //TX_AMS_RESRV_06 +949 0x0000 //TX_AMS_RESRV_07 +950 0x0000 //TX_AMS_RESRV_08 +951 0x0000 //TX_AMS_RESRV_09 +952 0x0000 //TX_AMS_RESRV_10 +953 0x0000 //TX_AMS_RESRV_11 +954 0x0000 //TX_AMS_RESRV_12 +955 0x0000 //TX_AMS_RESRV_13 +956 0x0000 //TX_AMS_RESRV_14 +957 0x0000 //TX_AMS_RESRV_15 +958 0x0000 //TX_AMS_RESRV_16 +959 0x0000 //TX_AMS_RESRV_17 +960 0x0000 //TX_AMS_RESRV_18 +961 0x0000 //TX_AMS_RESRV_19 #RX -0 0x002C //RX_RECVFUNC_MODE_0 +0 0x202C //RX_RECVFUNC_MODE_0 1 0x0000 //RX_RECVFUNC_MODE_1 2 0x0003 //RX_SAMPLINGFREQ_SIG 3 0x0003 //RX_SAMPLINGFREQ_PROC @@ -19296,11 +28521,862 @@ 110 0x0000 //RX_FDDRC_RESRV_0 129 0x0100 //RX_SPK_VOL 130 0x0000 //RX_VOL_RESRV_0 +#RX 2 +157 0x202C //RX_RECVFUNC_MODE_0 +158 0x0000 //RX_RECVFUNC_MODE_1 +159 0x0003 //RX_SAMPLINGFREQ_SIG +160 0x0003 //RX_SAMPLINGFREQ_PROC +161 0x000A //RX_FRAME_SZ +162 0x0000 //RX_DELAY_OPT +163 0x5000 //RX_TDDRC_ALPHA_UP_1 +164 0x5000 //RX_TDDRC_ALPHA_UP_2 +165 0x5000 //RX_TDDRC_ALPHA_UP_3 +166 0x2000 //RX_TDDRC_ALPHA_UP_4 +167 0x0800 //RX_PGA +168 0x7FFF //RX_A_HP +169 0x0000 //RX_B_PE +170 0x1800 //RX_THR_PITCH_DET_0 +171 0x1000 //RX_THR_PITCH_DET_1 +172 0x0800 //RX_THR_PITCH_DET_2 +173 0x0008 //RX_PITCH_BFR_LEN +174 0x0003 //RX_SBD_PITCH_DET +175 0x0100 //RX_PP_RESRV_0 +176 0x0020 //RX_PP_RESRV_1 +177 0x0400 //RX_N_SN_EST +178 0x000C //RX_N2_SN_EST +179 0x0003 //RX_NS_LVL_CTRL +180 0x9000 //RX_THR_SN_EST +181 0x7CCD //RX_LAMBDA_PFILT +182 0x000A //RX_FENS_RESRV_0 +183 0x0190 //RX_FENS_RESRV_1 +184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +187 0x0002 //RX_EXTRA_NS_L +188 0x0800 //RX_EXTRA_NS_A +189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +190 0x65AD //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +192 0x199A //RX_A_POST_FLT +193 0x0000 //RX_LMT_THRD +194 0x4000 //RX_LMT_ALPHA +195 0x0020 //RX_FDEQ_SUBNUM +196 0x4848 //RX_FDEQ_GAIN_0 +197 0x4848 //RX_FDEQ_GAIN_1 +198 0x4848 //RX_FDEQ_GAIN_2 +199 0x4848 //RX_FDEQ_GAIN_3 +200 0x4848 //RX_FDEQ_GAIN_4 +201 0x4848 //RX_FDEQ_GAIN_5 +202 0x4848 //RX_FDEQ_GAIN_6 +203 0x4848 //RX_FDEQ_GAIN_7 +204 0x4848 //RX_FDEQ_GAIN_8 +205 0x4848 //RX_FDEQ_GAIN_9 +206 0x4848 //RX_FDEQ_GAIN_10 +207 0x4848 //RX_FDEQ_GAIN_11 +208 0x4848 //RX_FDEQ_GAIN_12 +209 0x4848 //RX_FDEQ_GAIN_13 +210 0x4848 //RX_FDEQ_GAIN_14 +211 0x4848 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0202 //RX_FDEQ_BIN_0 +221 0x0203 //RX_FDEQ_BIN_1 +222 0x0303 //RX_FDEQ_BIN_2 +223 0x0304 //RX_FDEQ_BIN_3 +224 0x0405 //RX_FDEQ_BIN_4 +225 0x0506 //RX_FDEQ_BIN_5 +226 0x0708 //RX_FDEQ_BIN_6 +227 0x090A //RX_FDEQ_BIN_7 +228 0x0B0C //RX_FDEQ_BIN_8 +229 0x0D0E //RX_FDEQ_BIN_9 +230 0x1013 //RX_FDEQ_BIN_10 +231 0x1719 //RX_FDEQ_BIN_11 +232 0x1B1E //RX_FDEQ_BIN_12 +233 0x1E1E //RX_FDEQ_BIN_13 +234 0x1E28 //RX_FDEQ_BIN_14 +235 0x282C //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x4000 //RX_FDEQ_RESRV_0 +245 0x0320 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0030 //RX_FDDRC_BAND_MARGIN_1 +248 0x0050 //RX_FDDRC_BAND_MARGIN_2 +249 0x0080 //RX_FDDRC_BAND_MARGIN_3 +250 0x0007 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x5000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x6400 //RX_FDDRC_THRD_3_2 +258 0x6400 //RX_FDDRC_THRD_3_3 +259 0x2000 //RX_FDDRC_SLANT_0_0 +260 0x2000 //RX_FDDRC_SLANT_0_1 +261 0x2000 //RX_FDDRC_SLANT_0_2 +262 0x2000 //RX_FDDRC_SLANT_0_3 +263 0x5333 //RX_FDDRC_SLANT_1_0 +264 0x5333 //RX_FDDRC_SLANT_1_1 +265 0x5333 //RX_FDDRC_SLANT_1_2 +266 0x5333 //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +268 0x0002 //RX_FILTINDX +269 0x0000 //RX_TDDRC_THRD_0 +270 0x0000 //RX_TDDRC_THRD_1 +271 0x1A00 //RX_TDDRC_THRD_2 +272 0x1A00 //RX_TDDRC_THRD_3 +273 0x3000 //RX_TDDRC_SLANT_0 +274 0x7EB8 //RX_TDDRC_SLANT_1 +275 0x5000 //RX_TDDRC_ALPHA_UP_0 +276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x199A //RX_TDDRC_HMNC_GAIN +279 0x0001 //RX_TDDRC_SMT_FLAG +280 0x0CCD //RX_TDDRC_SMT_W +281 0x01C8 //RX_TDDRC_DRC_GAIN +282 0x7C00 //RX_LAMBDA_PKA_FP +283 0x2000 //RX_TPKA_FP +284 0x2000 //RX_MIN_G_FP +285 0x0080 //RX_MAX_G_FP +286 0x000B //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 +288 0x0000 //RX_MAXLEVEL_CNG +289 0x3000 //RX_BWE_UV_TH +290 0x3000 //RX_BWE_UV_TH2 +291 0x1800 //RX_BWE_UV_TH3 +292 0x1000 //RX_BWE_V_TH +293 0x04CD //RX_BWE_GAIN1_V_TH1 +294 0x0F33 //RX_BWE_GAIN1_V_TH2 +295 0x7333 //RX_BWE_UV_EQ +296 0x199A //RX_BWE_V_EQ +297 0x7333 //RX_BWE_TONE_TH +298 0x0004 //RX_BWE_UV_HOLD_T +299 0x6CCD //RX_BWE_GAIN2_ALPHA +300 0x799A //RX_BWE_GAIN3_ALPHA +301 0x001E //RX_BWE_CUTOFF +302 0x3000 //RX_BWE_GAINFILL +303 0x3200 //RX_BWE_MAXTH_TONE +304 0x2000 //RX_BWE_EQ_0 +305 0x2000 //RX_BWE_EQ_1 +306 0x2000 //RX_BWE_EQ_2 +307 0x2000 //RX_BWE_EQ_3 +308 0x2000 //RX_BWE_EQ_4 +309 0x2000 //RX_BWE_EQ_5 +310 0x2000 //RX_BWE_EQ_6 +311 0x0000 //RX_BWE_RESRV_0 +312 0x0000 //RX_BWE_RESRV_1 +313 0x0000 //RX_BWE_RESRV_2 +#VOL 0 +163 0x5000 //RX_TDDRC_ALPHA_UP_1 +164 0x5000 //RX_TDDRC_ALPHA_UP_2 +165 0x5000 //RX_TDDRC_ALPHA_UP_3 +166 0x2000 //RX_TDDRC_ALPHA_UP_4 +184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +190 0x65AD //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +269 0x0000 //RX_TDDRC_THRD_0 +270 0x0000 //RX_TDDRC_THRD_1 +271 0x1A00 //RX_TDDRC_THRD_2 +272 0x1A00 //RX_TDDRC_THRD_3 +273 0x3000 //RX_TDDRC_SLANT_0 +274 0x7EB8 //RX_TDDRC_SLANT_1 +275 0x5000 //RX_TDDRC_ALPHA_UP_0 +276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x199A //RX_TDDRC_HMNC_GAIN +279 0x0001 //RX_TDDRC_SMT_FLAG +280 0x0CCD //RX_TDDRC_SMT_W +281 0x01C8 //RX_TDDRC_DRC_GAIN +195 0x0020 //RX_FDEQ_SUBNUM +196 0x4848 //RX_FDEQ_GAIN_0 +197 0x4848 //RX_FDEQ_GAIN_1 +198 0x4848 //RX_FDEQ_GAIN_2 +199 0x4848 //RX_FDEQ_GAIN_3 +200 0x4848 //RX_FDEQ_GAIN_4 +201 0x4848 //RX_FDEQ_GAIN_5 +202 0x4848 //RX_FDEQ_GAIN_6 +203 0x4848 //RX_FDEQ_GAIN_7 +204 0x4848 //RX_FDEQ_GAIN_8 +205 0x4848 //RX_FDEQ_GAIN_9 +206 0x4848 //RX_FDEQ_GAIN_10 +207 0x4848 //RX_FDEQ_GAIN_11 +208 0x4848 //RX_FDEQ_GAIN_12 +209 0x4848 //RX_FDEQ_GAIN_13 +210 0x4848 //RX_FDEQ_GAIN_14 +211 0x4848 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0202 //RX_FDEQ_BIN_0 +221 0x0203 //RX_FDEQ_BIN_1 +222 0x0303 //RX_FDEQ_BIN_2 +223 0x0304 //RX_FDEQ_BIN_3 +224 0x0405 //RX_FDEQ_BIN_4 +225 0x0506 //RX_FDEQ_BIN_5 +226 0x0708 //RX_FDEQ_BIN_6 +227 0x090A //RX_FDEQ_BIN_7 +228 0x0B0C //RX_FDEQ_BIN_8 +229 0x0D0E //RX_FDEQ_BIN_9 +230 0x1013 //RX_FDEQ_BIN_10 +231 0x1719 //RX_FDEQ_BIN_11 +232 0x1B1E //RX_FDEQ_BIN_12 +233 0x1E1E //RX_FDEQ_BIN_13 +234 0x1E28 //RX_FDEQ_BIN_14 +235 0x282C //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x4000 //RX_FDEQ_RESRV_0 +245 0x0320 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0030 //RX_FDDRC_BAND_MARGIN_1 +248 0x0050 //RX_FDDRC_BAND_MARGIN_2 +249 0x0080 //RX_FDDRC_BAND_MARGIN_3 +250 0x0007 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x5000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x6400 //RX_FDDRC_THRD_3_2 +258 0x6400 //RX_FDDRC_THRD_3_3 +259 0x2000 //RX_FDDRC_SLANT_0_0 +260 0x2000 //RX_FDDRC_SLANT_0_1 +261 0x2000 //RX_FDDRC_SLANT_0_2 +262 0x2000 //RX_FDDRC_SLANT_0_3 +263 0x5333 //RX_FDDRC_SLANT_1_0 +264 0x5333 //RX_FDDRC_SLANT_1_1 +265 0x5333 //RX_FDDRC_SLANT_1_2 +266 0x5333 //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +286 0x000B //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 +#VOL 1 +163 0x5000 //RX_TDDRC_ALPHA_UP_1 +164 0x5000 //RX_TDDRC_ALPHA_UP_2 +165 0x5000 //RX_TDDRC_ALPHA_UP_3 +166 0x2000 //RX_TDDRC_ALPHA_UP_4 +184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +190 0x65AD //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +269 0x0000 //RX_TDDRC_THRD_0 +270 0x0000 //RX_TDDRC_THRD_1 +271 0x1A00 //RX_TDDRC_THRD_2 +272 0x1A00 //RX_TDDRC_THRD_3 +273 0x3000 //RX_TDDRC_SLANT_0 +274 0x7EB8 //RX_TDDRC_SLANT_1 +275 0x5000 //RX_TDDRC_ALPHA_UP_0 +276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x199A //RX_TDDRC_HMNC_GAIN +279 0x0001 //RX_TDDRC_SMT_FLAG +280 0x0CCD //RX_TDDRC_SMT_W +281 0x01C8 //RX_TDDRC_DRC_GAIN +195 0x0020 //RX_FDEQ_SUBNUM +196 0x4848 //RX_FDEQ_GAIN_0 +197 0x4848 //RX_FDEQ_GAIN_1 +198 0x4848 //RX_FDEQ_GAIN_2 +199 0x4848 //RX_FDEQ_GAIN_3 +200 0x4848 //RX_FDEQ_GAIN_4 +201 0x4848 //RX_FDEQ_GAIN_5 +202 0x4848 //RX_FDEQ_GAIN_6 +203 0x4848 //RX_FDEQ_GAIN_7 +204 0x4848 //RX_FDEQ_GAIN_8 +205 0x4848 //RX_FDEQ_GAIN_9 +206 0x4848 //RX_FDEQ_GAIN_10 +207 0x4848 //RX_FDEQ_GAIN_11 +208 0x4848 //RX_FDEQ_GAIN_12 +209 0x4848 //RX_FDEQ_GAIN_13 +210 0x4848 //RX_FDEQ_GAIN_14 +211 0x4848 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0202 //RX_FDEQ_BIN_0 +221 0x0203 //RX_FDEQ_BIN_1 +222 0x0303 //RX_FDEQ_BIN_2 +223 0x0304 //RX_FDEQ_BIN_3 +224 0x0405 //RX_FDEQ_BIN_4 +225 0x0506 //RX_FDEQ_BIN_5 +226 0x0708 //RX_FDEQ_BIN_6 +227 0x090A //RX_FDEQ_BIN_7 +228 0x0B0C //RX_FDEQ_BIN_8 +229 0x0D0E //RX_FDEQ_BIN_9 +230 0x1013 //RX_FDEQ_BIN_10 +231 0x1719 //RX_FDEQ_BIN_11 +232 0x1B1E //RX_FDEQ_BIN_12 +233 0x1E1E //RX_FDEQ_BIN_13 +234 0x1E28 //RX_FDEQ_BIN_14 +235 0x282C //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x4000 //RX_FDEQ_RESRV_0 +245 0x0320 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0030 //RX_FDDRC_BAND_MARGIN_1 +248 0x0050 //RX_FDDRC_BAND_MARGIN_2 +249 0x0080 //RX_FDDRC_BAND_MARGIN_3 +250 0x0007 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x5000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x6400 //RX_FDDRC_THRD_3_2 +258 0x6400 //RX_FDDRC_THRD_3_3 +259 0x2000 //RX_FDDRC_SLANT_0_0 +260 0x2000 //RX_FDDRC_SLANT_0_1 +261 0x2000 //RX_FDDRC_SLANT_0_2 +262 0x2000 //RX_FDDRC_SLANT_0_3 +263 0x5333 //RX_FDDRC_SLANT_1_0 +264 0x5333 //RX_FDDRC_SLANT_1_1 +265 0x5333 //RX_FDDRC_SLANT_1_2 +266 0x5333 //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +286 0x0013 //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 +#VOL 2 +163 0x5000 //RX_TDDRC_ALPHA_UP_1 +164 0x5000 //RX_TDDRC_ALPHA_UP_2 +165 0x5000 //RX_TDDRC_ALPHA_UP_3 +166 0x2000 //RX_TDDRC_ALPHA_UP_4 +184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +190 0x65AD //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +269 0x0000 //RX_TDDRC_THRD_0 +270 0x0000 //RX_TDDRC_THRD_1 +271 0x1A00 //RX_TDDRC_THRD_2 +272 0x1A00 //RX_TDDRC_THRD_3 +273 0x3000 //RX_TDDRC_SLANT_0 +274 0x7EB8 //RX_TDDRC_SLANT_1 +275 0x5000 //RX_TDDRC_ALPHA_UP_0 +276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x199A //RX_TDDRC_HMNC_GAIN +279 0x0001 //RX_TDDRC_SMT_FLAG +280 0x0CCD //RX_TDDRC_SMT_W +281 0x01C8 //RX_TDDRC_DRC_GAIN +195 0x0020 //RX_FDEQ_SUBNUM +196 0x4848 //RX_FDEQ_GAIN_0 +197 0x4848 //RX_FDEQ_GAIN_1 +198 0x4848 //RX_FDEQ_GAIN_2 +199 0x4848 //RX_FDEQ_GAIN_3 +200 0x4848 //RX_FDEQ_GAIN_4 +201 0x4848 //RX_FDEQ_GAIN_5 +202 0x4848 //RX_FDEQ_GAIN_6 +203 0x4848 //RX_FDEQ_GAIN_7 +204 0x4848 //RX_FDEQ_GAIN_8 +205 0x4848 //RX_FDEQ_GAIN_9 +206 0x4848 //RX_FDEQ_GAIN_10 +207 0x4848 //RX_FDEQ_GAIN_11 +208 0x4848 //RX_FDEQ_GAIN_12 +209 0x4848 //RX_FDEQ_GAIN_13 +210 0x4848 //RX_FDEQ_GAIN_14 +211 0x4848 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0202 //RX_FDEQ_BIN_0 +221 0x0203 //RX_FDEQ_BIN_1 +222 0x0303 //RX_FDEQ_BIN_2 +223 0x0304 //RX_FDEQ_BIN_3 +224 0x0405 //RX_FDEQ_BIN_4 +225 0x0506 //RX_FDEQ_BIN_5 +226 0x0708 //RX_FDEQ_BIN_6 +227 0x090A //RX_FDEQ_BIN_7 +228 0x0B0C //RX_FDEQ_BIN_8 +229 0x0D0E //RX_FDEQ_BIN_9 +230 0x1013 //RX_FDEQ_BIN_10 +231 0x1719 //RX_FDEQ_BIN_11 +232 0x1B1E //RX_FDEQ_BIN_12 +233 0x1E1E //RX_FDEQ_BIN_13 +234 0x1E28 //RX_FDEQ_BIN_14 +235 0x282C //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x4000 //RX_FDEQ_RESRV_0 +245 0x0320 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0030 //RX_FDDRC_BAND_MARGIN_1 +248 0x0050 //RX_FDDRC_BAND_MARGIN_2 +249 0x0080 //RX_FDDRC_BAND_MARGIN_3 +250 0x0007 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x5000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x6400 //RX_FDDRC_THRD_3_2 +258 0x6400 //RX_FDDRC_THRD_3_3 +259 0x2000 //RX_FDDRC_SLANT_0_0 +260 0x2000 //RX_FDDRC_SLANT_0_1 +261 0x2000 //RX_FDDRC_SLANT_0_2 +262 0x2000 //RX_FDDRC_SLANT_0_3 +263 0x5333 //RX_FDDRC_SLANT_1_0 +264 0x5333 //RX_FDDRC_SLANT_1_1 +265 0x5333 //RX_FDDRC_SLANT_1_2 +266 0x5333 //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +286 0x0020 //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 +#VOL 3 +163 0x5000 //RX_TDDRC_ALPHA_UP_1 +164 0x5000 //RX_TDDRC_ALPHA_UP_2 +165 0x5000 //RX_TDDRC_ALPHA_UP_3 +166 0x2000 //RX_TDDRC_ALPHA_UP_4 +184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +190 0x65AD //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +269 0x0000 //RX_TDDRC_THRD_0 +270 0x0000 //RX_TDDRC_THRD_1 +271 0x1A00 //RX_TDDRC_THRD_2 +272 0x1A00 //RX_TDDRC_THRD_3 +273 0x3000 //RX_TDDRC_SLANT_0 +274 0x7EB8 //RX_TDDRC_SLANT_1 +275 0x5000 //RX_TDDRC_ALPHA_UP_0 +276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x199A //RX_TDDRC_HMNC_GAIN +279 0x0001 //RX_TDDRC_SMT_FLAG +280 0x0CCD //RX_TDDRC_SMT_W +281 0x01C8 //RX_TDDRC_DRC_GAIN +195 0x0020 //RX_FDEQ_SUBNUM +196 0x4848 //RX_FDEQ_GAIN_0 +197 0x4848 //RX_FDEQ_GAIN_1 +198 0x4848 //RX_FDEQ_GAIN_2 +199 0x4848 //RX_FDEQ_GAIN_3 +200 0x4848 //RX_FDEQ_GAIN_4 +201 0x4848 //RX_FDEQ_GAIN_5 +202 0x4848 //RX_FDEQ_GAIN_6 +203 0x4848 //RX_FDEQ_GAIN_7 +204 0x4848 //RX_FDEQ_GAIN_8 +205 0x4848 //RX_FDEQ_GAIN_9 +206 0x4848 //RX_FDEQ_GAIN_10 +207 0x4848 //RX_FDEQ_GAIN_11 +208 0x4848 //RX_FDEQ_GAIN_12 +209 0x4848 //RX_FDEQ_GAIN_13 +210 0x4848 //RX_FDEQ_GAIN_14 +211 0x4848 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0202 //RX_FDEQ_BIN_0 +221 0x0203 //RX_FDEQ_BIN_1 +222 0x0303 //RX_FDEQ_BIN_2 +223 0x0304 //RX_FDEQ_BIN_3 +224 0x0405 //RX_FDEQ_BIN_4 +225 0x0506 //RX_FDEQ_BIN_5 +226 0x0708 //RX_FDEQ_BIN_6 +227 0x090A //RX_FDEQ_BIN_7 +228 0x0B0C //RX_FDEQ_BIN_8 +229 0x0D0E //RX_FDEQ_BIN_9 +230 0x1013 //RX_FDEQ_BIN_10 +231 0x1719 //RX_FDEQ_BIN_11 +232 0x1B1E //RX_FDEQ_BIN_12 +233 0x1E1E //RX_FDEQ_BIN_13 +234 0x1E28 //RX_FDEQ_BIN_14 +235 0x282C //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x4000 //RX_FDEQ_RESRV_0 +245 0x0320 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0030 //RX_FDDRC_BAND_MARGIN_1 +248 0x0050 //RX_FDDRC_BAND_MARGIN_2 +249 0x0080 //RX_FDDRC_BAND_MARGIN_3 +250 0x0007 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x5000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x6400 //RX_FDDRC_THRD_3_2 +258 0x6400 //RX_FDDRC_THRD_3_3 +259 0x2000 //RX_FDDRC_SLANT_0_0 +260 0x2000 //RX_FDDRC_SLANT_0_1 +261 0x2000 //RX_FDDRC_SLANT_0_2 +262 0x2000 //RX_FDDRC_SLANT_0_3 +263 0x5333 //RX_FDDRC_SLANT_1_0 +264 0x5333 //RX_FDDRC_SLANT_1_1 +265 0x5333 //RX_FDDRC_SLANT_1_2 +266 0x5333 //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +286 0x0036 //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 +#VOL 4 +163 0x5000 //RX_TDDRC_ALPHA_UP_1 +164 0x5000 //RX_TDDRC_ALPHA_UP_2 +165 0x5000 //RX_TDDRC_ALPHA_UP_3 +166 0x2000 //RX_TDDRC_ALPHA_UP_4 +184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +190 0x65AD //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +269 0x0000 //RX_TDDRC_THRD_0 +270 0x0000 //RX_TDDRC_THRD_1 +271 0x1A00 //RX_TDDRC_THRD_2 +272 0x1A00 //RX_TDDRC_THRD_3 +273 0x3000 //RX_TDDRC_SLANT_0 +274 0x7EB8 //RX_TDDRC_SLANT_1 +275 0x5000 //RX_TDDRC_ALPHA_UP_0 +276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x199A //RX_TDDRC_HMNC_GAIN +279 0x0001 //RX_TDDRC_SMT_FLAG +280 0x0CCD //RX_TDDRC_SMT_W +281 0x01C8 //RX_TDDRC_DRC_GAIN +195 0x0020 //RX_FDEQ_SUBNUM +196 0x4848 //RX_FDEQ_GAIN_0 +197 0x4848 //RX_FDEQ_GAIN_1 +198 0x4848 //RX_FDEQ_GAIN_2 +199 0x4848 //RX_FDEQ_GAIN_3 +200 0x4848 //RX_FDEQ_GAIN_4 +201 0x4848 //RX_FDEQ_GAIN_5 +202 0x4848 //RX_FDEQ_GAIN_6 +203 0x4848 //RX_FDEQ_GAIN_7 +204 0x4848 //RX_FDEQ_GAIN_8 +205 0x4848 //RX_FDEQ_GAIN_9 +206 0x4848 //RX_FDEQ_GAIN_10 +207 0x4848 //RX_FDEQ_GAIN_11 +208 0x4848 //RX_FDEQ_GAIN_12 +209 0x4848 //RX_FDEQ_GAIN_13 +210 0x4848 //RX_FDEQ_GAIN_14 +211 0x4848 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0202 //RX_FDEQ_BIN_0 +221 0x0203 //RX_FDEQ_BIN_1 +222 0x0303 //RX_FDEQ_BIN_2 +223 0x0304 //RX_FDEQ_BIN_3 +224 0x0405 //RX_FDEQ_BIN_4 +225 0x0506 //RX_FDEQ_BIN_5 +226 0x0708 //RX_FDEQ_BIN_6 +227 0x090A //RX_FDEQ_BIN_7 +228 0x0B0C //RX_FDEQ_BIN_8 +229 0x0D0E //RX_FDEQ_BIN_9 +230 0x1013 //RX_FDEQ_BIN_10 +231 0x1719 //RX_FDEQ_BIN_11 +232 0x1B1E //RX_FDEQ_BIN_12 +233 0x1E1E //RX_FDEQ_BIN_13 +234 0x1E28 //RX_FDEQ_BIN_14 +235 0x282C //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x4000 //RX_FDEQ_RESRV_0 +245 0x0320 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0030 //RX_FDDRC_BAND_MARGIN_1 +248 0x0050 //RX_FDDRC_BAND_MARGIN_2 +249 0x0080 //RX_FDDRC_BAND_MARGIN_3 +250 0x0007 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x5000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x6400 //RX_FDDRC_THRD_3_2 +258 0x6400 //RX_FDDRC_THRD_3_3 +259 0x2000 //RX_FDDRC_SLANT_0_0 +260 0x2000 //RX_FDDRC_SLANT_0_1 +261 0x2000 //RX_FDDRC_SLANT_0_2 +262 0x2000 //RX_FDDRC_SLANT_0_3 +263 0x5333 //RX_FDDRC_SLANT_1_0 +264 0x5333 //RX_FDDRC_SLANT_1_1 +265 0x5333 //RX_FDDRC_SLANT_1_2 +266 0x5333 //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +286 0x005B //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 +#VOL 5 +163 0x5000 //RX_TDDRC_ALPHA_UP_1 +164 0x5000 //RX_TDDRC_ALPHA_UP_2 +165 0x5000 //RX_TDDRC_ALPHA_UP_3 +166 0x2000 //RX_TDDRC_ALPHA_UP_4 +184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +190 0x65AD //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +269 0x0000 //RX_TDDRC_THRD_0 +270 0x0000 //RX_TDDRC_THRD_1 +271 0x1A00 //RX_TDDRC_THRD_2 +272 0x1A00 //RX_TDDRC_THRD_3 +273 0x3000 //RX_TDDRC_SLANT_0 +274 0x7EB8 //RX_TDDRC_SLANT_1 +275 0x5000 //RX_TDDRC_ALPHA_UP_0 +276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x199A //RX_TDDRC_HMNC_GAIN +279 0x0001 //RX_TDDRC_SMT_FLAG +280 0x0CCD //RX_TDDRC_SMT_W +281 0x01C8 //RX_TDDRC_DRC_GAIN +195 0x0020 //RX_FDEQ_SUBNUM +196 0x4848 //RX_FDEQ_GAIN_0 +197 0x4848 //RX_FDEQ_GAIN_1 +198 0x4848 //RX_FDEQ_GAIN_2 +199 0x4848 //RX_FDEQ_GAIN_3 +200 0x4848 //RX_FDEQ_GAIN_4 +201 0x4848 //RX_FDEQ_GAIN_5 +202 0x4848 //RX_FDEQ_GAIN_6 +203 0x4848 //RX_FDEQ_GAIN_7 +204 0x4848 //RX_FDEQ_GAIN_8 +205 0x4848 //RX_FDEQ_GAIN_9 +206 0x4848 //RX_FDEQ_GAIN_10 +207 0x4848 //RX_FDEQ_GAIN_11 +208 0x4848 //RX_FDEQ_GAIN_12 +209 0x4848 //RX_FDEQ_GAIN_13 +210 0x4848 //RX_FDEQ_GAIN_14 +211 0x4848 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0202 //RX_FDEQ_BIN_0 +221 0x0203 //RX_FDEQ_BIN_1 +222 0x0303 //RX_FDEQ_BIN_2 +223 0x0304 //RX_FDEQ_BIN_3 +224 0x0405 //RX_FDEQ_BIN_4 +225 0x0506 //RX_FDEQ_BIN_5 +226 0x0708 //RX_FDEQ_BIN_6 +227 0x090A //RX_FDEQ_BIN_7 +228 0x0B0C //RX_FDEQ_BIN_8 +229 0x0D0E //RX_FDEQ_BIN_9 +230 0x1013 //RX_FDEQ_BIN_10 +231 0x1719 //RX_FDEQ_BIN_11 +232 0x1B1E //RX_FDEQ_BIN_12 +233 0x1E1E //RX_FDEQ_BIN_13 +234 0x1E28 //RX_FDEQ_BIN_14 +235 0x282C //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x4000 //RX_FDEQ_RESRV_0 +245 0x0320 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0030 //RX_FDDRC_BAND_MARGIN_1 +248 0x0050 //RX_FDDRC_BAND_MARGIN_2 +249 0x0080 //RX_FDDRC_BAND_MARGIN_3 +250 0x0007 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x5000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x6400 //RX_FDDRC_THRD_3_2 +258 0x6400 //RX_FDDRC_THRD_3_3 +259 0x2000 //RX_FDDRC_SLANT_0_0 +260 0x2000 //RX_FDDRC_SLANT_0_1 +261 0x2000 //RX_FDDRC_SLANT_0_2 +262 0x2000 //RX_FDDRC_SLANT_0_3 +263 0x5333 //RX_FDDRC_SLANT_1_0 +264 0x5333 //RX_FDDRC_SLANT_1_1 +265 0x5333 //RX_FDDRC_SLANT_1_2 +266 0x5333 //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +286 0x0099 //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 +#VOL 6 +163 0x5000 //RX_TDDRC_ALPHA_UP_1 +164 0x5000 //RX_TDDRC_ALPHA_UP_2 +165 0x5000 //RX_TDDRC_ALPHA_UP_3 +166 0x2000 //RX_TDDRC_ALPHA_UP_4 +184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +190 0x65AD //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +269 0x0000 //RX_TDDRC_THRD_0 +270 0x0000 //RX_TDDRC_THRD_1 +271 0x1A00 //RX_TDDRC_THRD_2 +272 0x1A00 //RX_TDDRC_THRD_3 +273 0x3000 //RX_TDDRC_SLANT_0 +274 0x7EB8 //RX_TDDRC_SLANT_1 +275 0x5000 //RX_TDDRC_ALPHA_UP_0 +276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x199A //RX_TDDRC_HMNC_GAIN +279 0x0001 //RX_TDDRC_SMT_FLAG +280 0x0CCD //RX_TDDRC_SMT_W +281 0x01C8 //RX_TDDRC_DRC_GAIN +195 0x0020 //RX_FDEQ_SUBNUM +196 0x4848 //RX_FDEQ_GAIN_0 +197 0x4848 //RX_FDEQ_GAIN_1 +198 0x4848 //RX_FDEQ_GAIN_2 +199 0x4848 //RX_FDEQ_GAIN_3 +200 0x4848 //RX_FDEQ_GAIN_4 +201 0x4848 //RX_FDEQ_GAIN_5 +202 0x4848 //RX_FDEQ_GAIN_6 +203 0x4848 //RX_FDEQ_GAIN_7 +204 0x4848 //RX_FDEQ_GAIN_8 +205 0x4848 //RX_FDEQ_GAIN_9 +206 0x4848 //RX_FDEQ_GAIN_10 +207 0x4848 //RX_FDEQ_GAIN_11 +208 0x4848 //RX_FDEQ_GAIN_12 +209 0x4848 //RX_FDEQ_GAIN_13 +210 0x4848 //RX_FDEQ_GAIN_14 +211 0x4848 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0202 //RX_FDEQ_BIN_0 +221 0x0203 //RX_FDEQ_BIN_1 +222 0x0303 //RX_FDEQ_BIN_2 +223 0x0304 //RX_FDEQ_BIN_3 +224 0x0405 //RX_FDEQ_BIN_4 +225 0x0506 //RX_FDEQ_BIN_5 +226 0x0708 //RX_FDEQ_BIN_6 +227 0x090A //RX_FDEQ_BIN_7 +228 0x0B0C //RX_FDEQ_BIN_8 +229 0x0D0E //RX_FDEQ_BIN_9 +230 0x1013 //RX_FDEQ_BIN_10 +231 0x1719 //RX_FDEQ_BIN_11 +232 0x1B1E //RX_FDEQ_BIN_12 +233 0x1E1E //RX_FDEQ_BIN_13 +234 0x1E28 //RX_FDEQ_BIN_14 +235 0x282C //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x4000 //RX_FDEQ_RESRV_0 +245 0x0320 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0030 //RX_FDDRC_BAND_MARGIN_1 +248 0x0050 //RX_FDDRC_BAND_MARGIN_2 +249 0x0080 //RX_FDDRC_BAND_MARGIN_3 +250 0x0007 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x5000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x6400 //RX_FDDRC_THRD_3_2 +258 0x6400 //RX_FDDRC_THRD_3_3 +259 0x2000 //RX_FDDRC_SLANT_0_0 +260 0x2000 //RX_FDDRC_SLANT_0_1 +261 0x2000 //RX_FDDRC_SLANT_0_2 +262 0x2000 //RX_FDDRC_SLANT_0_3 +263 0x5333 //RX_FDDRC_SLANT_1_0 +264 0x5333 //RX_FDDRC_SLANT_1_1 +265 0x5333 //RX_FDDRC_SLANT_1_2 +266 0x5333 //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +286 0x0100 //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 #CASE_NAME HEADSET-RESERVE1-VOICE_GENERIC-FB -#PARAM_MODE FULL -#PARAM_TYPE TX+RX -#TOTAL_CUSTOM_STEP 7 +#PARAM_MODE Full +#PARAM_TYPE TX+2RX +#TOTAL_CUSTOM_STEP 7+7 #TX 0 0x0009 //TX_OPERATION_MODE_0 1 0x0009 //TX_OPERATION_MODE_1 @@ -19553,10 +29629,10 @@ 248 0xF600 //TX_THR_SN_EST_6 249 0xF600 //TX_THR_SN_EST_7 250 0x0200 //TX_DELTA_THR_SN_EST_0 -251 0x0200 //TX_DELTA_THR_SN_EST_1 -252 0x0400 //TX_DELTA_THR_SN_EST_2 -253 0x0300 //TX_DELTA_THR_SN_EST_3 -254 0x0600 //TX_DELTA_THR_SN_EST_4 +251 0x0400 //TX_DELTA_THR_SN_EST_1 +252 0x0300 //TX_DELTA_THR_SN_EST_2 +253 0x0600 //TX_DELTA_THR_SN_EST_3 +254 0x0200 //TX_DELTA_THR_SN_EST_4 255 0x0200 //TX_DELTA_THR_SN_EST_5 256 0x0200 //TX_DELTA_THR_SN_EST_6 257 0x0200 //TX_DELTA_THR_SN_EST_7 @@ -19584,31 +29660,31 @@ 279 0x2000 //TX_B_POST_FLT_0 280 0x2000 //TX_B_POST_FLT_1 281 0x0012 //TX_NS_LVL_CTRL_0 -282 0x0019 //TX_NS_LVL_CTRL_1 +282 0x0016 //TX_NS_LVL_CTRL_1 283 0x0016 //TX_NS_LVL_CTRL_2 -284 0x0016 //TX_NS_LVL_CTRL_3 -285 0x0019 //TX_NS_LVL_CTRL_4 +284 0x0019 //TX_NS_LVL_CTRL_3 +285 0x0010 //TX_NS_LVL_CTRL_4 286 0x0010 //TX_NS_LVL_CTRL_5 -287 0x0010 //TX_NS_LVL_CTRL_6 +287 0x0019 //TX_NS_LVL_CTRL_6 288 0x0010 //TX_NS_LVL_CTRL_7 289 0x000C //TX_MIN_GAIN_S_0 -290 0x0011 //TX_MIN_GAIN_S_1 +290 0x000C //TX_MIN_GAIN_S_1 291 0x000C //TX_MIN_GAIN_S_2 -292 0x000C //TX_MIN_GAIN_S_3 -293 0x000F //TX_MIN_GAIN_S_4 +292 0x000F //TX_MIN_GAIN_S_3 +293 0x000C //TX_MIN_GAIN_S_4 294 0x000C //TX_MIN_GAIN_S_5 -295 0x000C //TX_MIN_GAIN_S_6 +295 0x0011 //TX_MIN_GAIN_S_6 296 0x000C //TX_MIN_GAIN_S_7 297 0x7FFF //TX_NMOS_SUP 298 0x0000 //TX_NS_MAX_PRI_SNR_TH 299 0x0000 //TX_NMOS_SUP_MENSA 300 0x7000 //TX_SNRI_SUP_0 -301 0x6000 //TX_SNRI_SUP_1 +301 0x7000 //TX_SNRI_SUP_1 302 0x7000 //TX_SNRI_SUP_2 -303 0x7000 //TX_SNRI_SUP_3 -304 0x6000 //TX_SNRI_SUP_4 +303 0x6000 //TX_SNRI_SUP_3 +304 0x7FFF //TX_SNRI_SUP_4 305 0x7FFF //TX_SNRI_SUP_5 -306 0x7FFF //TX_SNRI_SUP_6 +306 0x6000 //TX_SNRI_SUP_6 307 0x7FFF //TX_SNRI_SUP_7 308 0x7FFF //TX_THR_LFNS 309 0x0016 //TX_G_LFNS @@ -19625,8 +29701,8 @@ 320 0x6000 //TX_A_POST_FILT_S_6 321 0x6000 //TX_A_POST_FILT_S_7 322 0x2000 //TX_B_POST_FILT_0 -323 0x2000 //TX_B_POST_FILT_1 -324 0x4000 //TX_B_POST_FILT_2 +323 0x4000 //TX_B_POST_FILT_1 +324 0x2000 //TX_B_POST_FILT_2 325 0x2000 //TX_B_POST_FILT_3 326 0x2000 //TX_B_POST_FILT_4 327 0x2000 //TX_B_POST_FILT_5 @@ -19669,7 +29745,7 @@ 364 0x0000 //TX_K_APT 365 0x0001 //TX_NOISEDET 366 0x0190 //TX_NDETCT -367 0x0020 //TX_NOISE_TH_0 +367 0x04E8 //TX_NOISE_TH_0 368 0x7FFF //TX_NOISE_TH_0_2 369 0x7FFF //TX_NOISE_TH_0_3 370 0x02A6 //TX_NOISE_TH_1 @@ -19681,11 +29757,11 @@ 376 0x0001 //TX_NOISE_TH_5_3 377 0x0000 //TX_NOISE_TH_5_4 378 0x02BC //TX_NOISE_TH_6 -379 0x0020 //TX_MINENOISE_TH -380 0x4000 //TX_MINENOISE_MIC0_TH_MTS -381 0xFFEE //TX_MINENOISE_MIC0_TH_EXP -382 0x6000 //TX_MINENOISE_MIC0_S_TH_MTS -383 0xFFF3 //TX_MINENOISE_MIC0_S_TH_EXP +379 0x02BC //TX_MINENOISE_TH +380 0xD508 //TX_MORENS_TFMASK_TH +381 0x0001 //TX_DRC_QUIET_FLOOR +382 0x3A98 //TX_RATIODTL_CUT_TH +383 0x1482 //TX_DT_CUT_K1 384 0x0666 //TX_OUT_ENER_S_TH_CLEAN 385 0x0666 //TX_OUT_ENER_S_TH_LESSCLEAN 386 0x0333 //TX_OUT_ENER_S_TH_NOISY @@ -19693,22 +29769,22 @@ 388 0x0333 //TX_OUT_ENER_TH_SPEECH 389 0x2000 //TX_SN_NPB_GAIN 390 0x0000 //TX_NN_NPB_GAIN -391 0x0000 //TX_CSX_ALPHA_0 -392 0x0000 //TX_CSX_ALPHA_1 -393 0x0000 //TX_CSX_ALPHA_2 -394 0x0000 //TX_CSX_ALPHA_3 -395 0x0800 //TX_MU_ARSP_EST -396 0x00C8 //TX_P_OUTBEAM_MIN_TH +391 0x7FFF //TX_POST_MASK_SUP_HSNE +392 0x1388 //TX_TAIL_DET_TH +393 0x4000 //TX_B_LESSCUT_RTO_WTA +394 0x0000 //TX_MEL_G_R +395 0x0080 //TX_SUPHIGH_TH +396 0x0000 //TX_MASK_G_R 397 0x0002 //TX_EXTRA_NS_L -398 0x0800 //TX_EXTRA_NS_A -399 0x0005 //TX_VR_NOISE_FLOOR_TH +398 0x1800 //TX_C_POST_FLT_MASK +399 0x7FFF //TX_A_POST_FLT_WNS 400 0x0148 //TX_MIN_G_LOW300HZ 401 0x0004 //TX_MAXLEVEL_CNG 402 0x00B4 //TX_STN_NOISE_TH 403 0x4000 //TX_POST_MASK_SUP 404 0x7FFF //TX_POST_MASK_ADJUST 405 0x00C8 //TX_NS_ENOISE_MIC0_TH -406 0x0020 //TX_MINENOISE_MIC0_TH +406 0x04E7 //TX_MINENOISE_MIC0_TH 407 0x012C //TX_MINENOISE_MIC0_S_TH 408 0x2900 //TX_MIN_G_CTRL_SSNS 409 0x0800 //TX_METAL_RTO_THR @@ -19816,16 +29892,16 @@ 511 0x6666 //TX_MIC_TO_BFGAIN 512 0x0000 //TX_MICTOBFGAIN0 513 0x0000 //TX_FASTMUE_TH -514 0x0000 //TX_DERVB_LEN_0 -515 0x0000 //TX_DERVB_LEN_1 -516 0x0000 //TX_RHO_DERVB -517 0x0000 //TX_MIC_INDX_DERVB -518 0x0000 //TX_MU_DERVB -519 0x0000 //TX_DR_RESRV_0 -520 0x0000 //TX_DR_RESRV_1 -521 0x0000 //TX_DR_RESRV_2 -522 0x0000 //TX_DR_RESRV_3 -523 0x0000 //TX_DR_RESRV_4 +514 0xC000 //TX_DEREVERB_LF_MU +515 0xC000 //TX_DEREVERB_HF_MU +516 0xCCCC //TX_DEREVERB_DELAY +517 0xD999 //TX_DEREVERB_COEF_LEN +518 0x1F40 //TX_DEREVERB_DNR +519 0x0000 //TX_DEREVERB_ALPHA +520 0x0000 //TX_DEREVERB_BETA +521 0x0000 //TX_GSC_RTOL_TH +522 0x7000 //TX_GSC_RTOH_TH +523 0x0064 //TX_WIDE2_MEANHTH 524 0x0000 //TX_DR_RESRV_5 525 0x0000 //TX_DR_RESRV_6 526 0x0000 //TX_DR_RESRV_7 @@ -20199,8 +30275,73 @@ 894 0xC000 //TX_FASTNS_SSA_THHFL 895 0xCCCC //TX_FASTNS_SSA_THLFH 896 0xD999 //TX_FASTNS_SSA_THHFH +897 0x2339 //TX_SENDFUNC_REG_MICMUTE +898 0x0021 //TX_SENDFUNC_REG_MICMUTE1 +899 0x02BC //TX_MICMUTE_RATIO_THR +900 0x0140 //TX_MICMUTE_AMP_THR +901 0x0004 //TX_MICMUTE_HPF_IND +902 0x00C0 //TX_MICMUTE_LOG_EYR_TH +903 0x0008 //TX_MICMUTE_CVG_TIME +904 0x0008 //TX_MICMUTE_RELEASE_TIME +905 0x01FE //TX_MIC_VOLUME_MIC0MUTE +906 0x0020 //TX_MICMUTE_EPD_OFFSET_0 +907 0x001E //TX_MICMUTE_FRQ_AEC_L +908 0x7999 //TX_MICMUTE_EAD_THR +909 0x7FFF //TX_MICMUTE_LAMBDA_CB_NLE +910 0x7FFF //TX_MICMUTE_LAMBDA_RE_EST +911 0x4000 //TX_DTD_THR1_MICMUTE_0 +912 0x7000 //TX_DTD_THR1_MICMUTE_1 +913 0x7FFF //TX_DTD_THR1_MICMUTE_2 +914 0x7FFF //TX_DTD_THR1_MICMUTE_3 +915 0x6CCC //TX_DTD_THR2_MICMUTE_0 +916 0x0400 //TX_MICMUTE_MIN_EQ_RE_EST_0 +917 0x0400 //TX_MICMUTE_MIN_EQ_RE_EST_1 +918 0x1000 //TX_MICMUTE_MIN_EQ_RE_EST_2 +919 0x7FFF //TX_MICMUTE_MIN_EQ_RE_EST_3 +920 0x7FFF //TX_MICMUTE_MIN_EQ_RE_EST_4 +921 0x4000 //TX_MICMUTE_C_POST_FLT +922 0x03E8 //TX_MICMUTE_DT_CUT_K +923 0x0001 //TX_MICMUTE_DT_CUT_THR +924 0x03E8 //TX_MICMUTE_DT_CUT_K2 +925 0x0001 //TX_MICMUTE_DT_CUT_THR2 +926 0x0064 //TX_MICMUTE_DT2_HOLD_N +927 0x1000 //TX_MICMUTE_RATIODTH_THCUT +928 0x1000 //TX_MICMUTE_B_POST_FLT_ECHOL +929 0x7FFF //TX_MICMUTE_B_POST_FLT_ECHOH +930 0x0400 //TX_MICMUTE_C_POST_FLT_MASK +931 0x7999 //TX_MICMUTE_RATIODTL_CUT_TH +932 0x0258 //TX_MICMUTE_DT_CUT_K1 +933 0x0800 //TX_MICMUTE_N2_SN_EST +934 0xFC00 //TX_MICMUTE_THR_SN_EST_0 +935 0x001C //TX_MICMUTE_MIN_G_CTRL_0 +936 0x6000 //TX_MICMUTE_A_POST_FILT_S_0 +937 0x7000 //TX_MICMUTE_B_POST_FILT_0 +938 0x2710 //TX_MIC1RUB_AMP_THR +939 0x0010 //TX_MIC1MUTE_RATIO_THR +940 0x0450 //TX_MIC1MUTE_AMP_THR +941 0x0008 //TX_MIC1MUTE_CVG_TIME +942 0x0008 //TX_MIC1MUTE_RELEASE_TIME +943 0x0000 //TX_AMS_RESRV_01 +944 0x0000 //TX_AMS_RESRV_02 +945 0x0000 //TX_AMS_RESRV_03 +946 0x0000 //TX_AMS_RESRV_04 +947 0x0000 //TX_AMS_RESRV_05 +948 0x0000 //TX_AMS_RESRV_06 +949 0x0000 //TX_AMS_RESRV_07 +950 0x0000 //TX_AMS_RESRV_08 +951 0x0000 //TX_AMS_RESRV_09 +952 0x0000 //TX_AMS_RESRV_10 +953 0x0000 //TX_AMS_RESRV_11 +954 0x0000 //TX_AMS_RESRV_12 +955 0x0000 //TX_AMS_RESRV_13 +956 0x0000 //TX_AMS_RESRV_14 +957 0x0000 //TX_AMS_RESRV_15 +958 0x0000 //TX_AMS_RESRV_16 +959 0x0000 //TX_AMS_RESRV_17 +960 0x0000 //TX_AMS_RESRV_18 +961 0x0000 //TX_AMS_RESRV_19 #RX -0 0x002C //RX_RECVFUNC_MODE_0 +0 0x202C //RX_RECVFUNC_MODE_0 1 0x0000 //RX_RECVFUNC_MODE_1 2 0x0004 //RX_SAMPLINGFREQ_SIG 3 0x0004 //RX_SAMPLINGFREQ_PROC @@ -21050,18 +31191,869 @@ 110 0x0000 //RX_FDDRC_RESRV_0 129 0x0100 //RX_SPK_VOL 130 0x0000 //RX_VOL_RESRV_0 +#RX 2 +157 0x202C //RX_RECVFUNC_MODE_0 +158 0x0000 //RX_RECVFUNC_MODE_1 +159 0x0004 //RX_SAMPLINGFREQ_SIG +160 0x0004 //RX_SAMPLINGFREQ_PROC +161 0x000A //RX_FRAME_SZ +162 0x0000 //RX_DELAY_OPT +163 0x1000 //RX_TDDRC_ALPHA_UP_1 +164 0x1000 //RX_TDDRC_ALPHA_UP_2 +165 0x1000 //RX_TDDRC_ALPHA_UP_3 +166 0x1000 //RX_TDDRC_ALPHA_UP_4 +167 0x0800 //RX_PGA +168 0x7B02 //RX_A_HP +169 0x4000 //RX_B_PE +170 0x7800 //RX_THR_PITCH_DET_0 +171 0x7000 //RX_THR_PITCH_DET_1 +172 0x6000 //RX_THR_PITCH_DET_2 +173 0x0008 //RX_PITCH_BFR_LEN +174 0x0003 //RX_SBD_PITCH_DET +175 0x0100 //RX_PP_RESRV_0 +176 0x0020 //RX_PP_RESRV_1 +177 0x0500 //RX_N_SN_EST +178 0x000C //RX_N2_SN_EST +179 0x000A //RX_NS_LVL_CTRL +180 0xF600 //RX_THR_SN_EST +181 0x7000 //RX_LAMBDA_PFILT +182 0x000A //RX_FENS_RESRV_0 +183 0x0190 //RX_FENS_RESRV_1 +184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +187 0x0002 //RX_EXTRA_NS_L +188 0x0800 //RX_EXTRA_NS_A +189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +190 0x7FFF //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +192 0x199A //RX_A_POST_FLT +193 0x0000 //RX_LMT_THRD +194 0x4000 //RX_LMT_ALPHA +195 0x0020 //RX_FDEQ_SUBNUM +196 0x4848 //RX_FDEQ_GAIN_0 +197 0x4848 //RX_FDEQ_GAIN_1 +198 0x4848 //RX_FDEQ_GAIN_2 +199 0x4848 //RX_FDEQ_GAIN_3 +200 0x4848 //RX_FDEQ_GAIN_4 +201 0x4848 //RX_FDEQ_GAIN_5 +202 0x4848 //RX_FDEQ_GAIN_6 +203 0x4848 //RX_FDEQ_GAIN_7 +204 0x4848 //RX_FDEQ_GAIN_8 +205 0x4848 //RX_FDEQ_GAIN_9 +206 0x4848 //RX_FDEQ_GAIN_10 +207 0x4848 //RX_FDEQ_GAIN_11 +208 0x4848 //RX_FDEQ_GAIN_12 +209 0x4848 //RX_FDEQ_GAIN_13 +210 0x4848 //RX_FDEQ_GAIN_14 +211 0x4848 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0202 //RX_FDEQ_BIN_0 +221 0x0203 //RX_FDEQ_BIN_1 +222 0x0304 //RX_FDEQ_BIN_2 +223 0x0405 //RX_FDEQ_BIN_3 +224 0x0607 //RX_FDEQ_BIN_4 +225 0x0809 //RX_FDEQ_BIN_5 +226 0x0A0B //RX_FDEQ_BIN_6 +227 0x0C0D //RX_FDEQ_BIN_7 +228 0x0E0F //RX_FDEQ_BIN_8 +229 0x1011 //RX_FDEQ_BIN_9 +230 0x1214 //RX_FDEQ_BIN_10 +231 0x1618 //RX_FDEQ_BIN_11 +232 0x1C1C //RX_FDEQ_BIN_12 +233 0x2020 //RX_FDEQ_BIN_13 +234 0x2020 //RX_FDEQ_BIN_14 +235 0x2011 //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x4000 //RX_FDEQ_RESRV_0 +245 0x0320 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0030 //RX_FDDRC_BAND_MARGIN_1 +248 0x0050 //RX_FDDRC_BAND_MARGIN_2 +249 0x0080 //RX_FDDRC_BAND_MARGIN_3 +250 0x0007 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x5000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x6400 //RX_FDDRC_THRD_3_2 +258 0x6400 //RX_FDDRC_THRD_3_3 +259 0x2000 //RX_FDDRC_SLANT_0_0 +260 0x2000 //RX_FDDRC_SLANT_0_1 +261 0x2000 //RX_FDDRC_SLANT_0_2 +262 0x2000 //RX_FDDRC_SLANT_0_3 +263 0x5333 //RX_FDDRC_SLANT_1_0 +264 0x5333 //RX_FDDRC_SLANT_1_1 +265 0x5333 //RX_FDDRC_SLANT_1_2 +266 0x5333 //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +268 0x0002 //RX_FILTINDX +269 0x0000 //RX_TDDRC_THRD_0 +270 0x0000 //RX_TDDRC_THRD_1 +271 0x1200 //RX_TDDRC_THRD_2 +272 0x1900 //RX_TDDRC_THRD_3 +273 0x3000 //RX_TDDRC_SLANT_0 +274 0x6E00 //RX_TDDRC_SLANT_1 +275 0x1000 //RX_TDDRC_ALPHA_UP_0 +276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x199A //RX_TDDRC_HMNC_GAIN +279 0x0001 //RX_TDDRC_SMT_FLAG +280 0x0CCD //RX_TDDRC_SMT_W +281 0x0240 //RX_TDDRC_DRC_GAIN +282 0x7C00 //RX_LAMBDA_PKA_FP +283 0x2000 //RX_TPKA_FP +284 0x2000 //RX_MIN_G_FP +285 0x0080 //RX_MAX_G_FP +286 0x000B //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 +288 0x0000 //RX_MAXLEVEL_CNG +289 0x3000 //RX_BWE_UV_TH +290 0x3000 //RX_BWE_UV_TH2 +291 0x1800 //RX_BWE_UV_TH3 +292 0x1000 //RX_BWE_V_TH +293 0x04CD //RX_BWE_GAIN1_V_TH1 +294 0x0F33 //RX_BWE_GAIN1_V_TH2 +295 0x7333 //RX_BWE_UV_EQ +296 0x199A //RX_BWE_V_EQ +297 0x7333 //RX_BWE_TONE_TH +298 0x0004 //RX_BWE_UV_HOLD_T +299 0x6CCD //RX_BWE_GAIN2_ALPHA +300 0x799A //RX_BWE_GAIN3_ALPHA +301 0x001E //RX_BWE_CUTOFF +302 0x3000 //RX_BWE_GAINFILL +303 0x3200 //RX_BWE_MAXTH_TONE +304 0x2000 //RX_BWE_EQ_0 +305 0x2000 //RX_BWE_EQ_1 +306 0x2000 //RX_BWE_EQ_2 +307 0x2000 //RX_BWE_EQ_3 +308 0x2000 //RX_BWE_EQ_4 +309 0x2000 //RX_BWE_EQ_5 +310 0x2000 //RX_BWE_EQ_6 +311 0x0000 //RX_BWE_RESRV_0 +312 0x0000 //RX_BWE_RESRV_1 +313 0x0000 //RX_BWE_RESRV_2 +#VOL 0 +163 0x1000 //RX_TDDRC_ALPHA_UP_1 +164 0x1000 //RX_TDDRC_ALPHA_UP_2 +165 0x1000 //RX_TDDRC_ALPHA_UP_3 +166 0x1000 //RX_TDDRC_ALPHA_UP_4 +184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +190 0x7FFF //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +269 0x0000 //RX_TDDRC_THRD_0 +270 0x0000 //RX_TDDRC_THRD_1 +271 0x1200 //RX_TDDRC_THRD_2 +272 0x1900 //RX_TDDRC_THRD_3 +273 0x3000 //RX_TDDRC_SLANT_0 +274 0x6E00 //RX_TDDRC_SLANT_1 +275 0x1000 //RX_TDDRC_ALPHA_UP_0 +276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x199A //RX_TDDRC_HMNC_GAIN +279 0x0001 //RX_TDDRC_SMT_FLAG +280 0x0CCD //RX_TDDRC_SMT_W +281 0x0240 //RX_TDDRC_DRC_GAIN +195 0x0020 //RX_FDEQ_SUBNUM +196 0x4848 //RX_FDEQ_GAIN_0 +197 0x4848 //RX_FDEQ_GAIN_1 +198 0x4848 //RX_FDEQ_GAIN_2 +199 0x4848 //RX_FDEQ_GAIN_3 +200 0x4848 //RX_FDEQ_GAIN_4 +201 0x4848 //RX_FDEQ_GAIN_5 +202 0x4848 //RX_FDEQ_GAIN_6 +203 0x4848 //RX_FDEQ_GAIN_7 +204 0x4848 //RX_FDEQ_GAIN_8 +205 0x4848 //RX_FDEQ_GAIN_9 +206 0x4848 //RX_FDEQ_GAIN_10 +207 0x4848 //RX_FDEQ_GAIN_11 +208 0x4848 //RX_FDEQ_GAIN_12 +209 0x4848 //RX_FDEQ_GAIN_13 +210 0x4848 //RX_FDEQ_GAIN_14 +211 0x4848 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0202 //RX_FDEQ_BIN_0 +221 0x0203 //RX_FDEQ_BIN_1 +222 0x0304 //RX_FDEQ_BIN_2 +223 0x0405 //RX_FDEQ_BIN_3 +224 0x0607 //RX_FDEQ_BIN_4 +225 0x0809 //RX_FDEQ_BIN_5 +226 0x0A0B //RX_FDEQ_BIN_6 +227 0x0C0D //RX_FDEQ_BIN_7 +228 0x0E0F //RX_FDEQ_BIN_8 +229 0x1011 //RX_FDEQ_BIN_9 +230 0x1214 //RX_FDEQ_BIN_10 +231 0x1618 //RX_FDEQ_BIN_11 +232 0x1C1C //RX_FDEQ_BIN_12 +233 0x2020 //RX_FDEQ_BIN_13 +234 0x2020 //RX_FDEQ_BIN_14 +235 0x2011 //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x4000 //RX_FDEQ_RESRV_0 +245 0x0320 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0030 //RX_FDDRC_BAND_MARGIN_1 +248 0x0050 //RX_FDDRC_BAND_MARGIN_2 +249 0x0080 //RX_FDDRC_BAND_MARGIN_3 +250 0x0007 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x5000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x6400 //RX_FDDRC_THRD_3_2 +258 0x6400 //RX_FDDRC_THRD_3_3 +259 0x2000 //RX_FDDRC_SLANT_0_0 +260 0x2000 //RX_FDDRC_SLANT_0_1 +261 0x2000 //RX_FDDRC_SLANT_0_2 +262 0x2000 //RX_FDDRC_SLANT_0_3 +263 0x5333 //RX_FDDRC_SLANT_1_0 +264 0x5333 //RX_FDDRC_SLANT_1_1 +265 0x5333 //RX_FDDRC_SLANT_1_2 +266 0x5333 //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +286 0x000B //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 +#VOL 1 +163 0x1000 //RX_TDDRC_ALPHA_UP_1 +164 0x1000 //RX_TDDRC_ALPHA_UP_2 +165 0x1000 //RX_TDDRC_ALPHA_UP_3 +166 0x1000 //RX_TDDRC_ALPHA_UP_4 +184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +190 0x7FFF //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +269 0x0000 //RX_TDDRC_THRD_0 +270 0x0000 //RX_TDDRC_THRD_1 +271 0x1200 //RX_TDDRC_THRD_2 +272 0x1900 //RX_TDDRC_THRD_3 +273 0x3000 //RX_TDDRC_SLANT_0 +274 0x6E00 //RX_TDDRC_SLANT_1 +275 0x1000 //RX_TDDRC_ALPHA_UP_0 +276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x199A //RX_TDDRC_HMNC_GAIN +279 0x0001 //RX_TDDRC_SMT_FLAG +280 0x0CCD //RX_TDDRC_SMT_W +281 0x0240 //RX_TDDRC_DRC_GAIN +195 0x0020 //RX_FDEQ_SUBNUM +196 0x4848 //RX_FDEQ_GAIN_0 +197 0x4848 //RX_FDEQ_GAIN_1 +198 0x4848 //RX_FDEQ_GAIN_2 +199 0x4848 //RX_FDEQ_GAIN_3 +200 0x4848 //RX_FDEQ_GAIN_4 +201 0x4848 //RX_FDEQ_GAIN_5 +202 0x4848 //RX_FDEQ_GAIN_6 +203 0x4848 //RX_FDEQ_GAIN_7 +204 0x4848 //RX_FDEQ_GAIN_8 +205 0x4848 //RX_FDEQ_GAIN_9 +206 0x4848 //RX_FDEQ_GAIN_10 +207 0x4848 //RX_FDEQ_GAIN_11 +208 0x4848 //RX_FDEQ_GAIN_12 +209 0x4848 //RX_FDEQ_GAIN_13 +210 0x4848 //RX_FDEQ_GAIN_14 +211 0x4848 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0202 //RX_FDEQ_BIN_0 +221 0x0203 //RX_FDEQ_BIN_1 +222 0x0304 //RX_FDEQ_BIN_2 +223 0x0405 //RX_FDEQ_BIN_3 +224 0x0607 //RX_FDEQ_BIN_4 +225 0x0809 //RX_FDEQ_BIN_5 +226 0x0A0B //RX_FDEQ_BIN_6 +227 0x0C0D //RX_FDEQ_BIN_7 +228 0x0E0F //RX_FDEQ_BIN_8 +229 0x1011 //RX_FDEQ_BIN_9 +230 0x1214 //RX_FDEQ_BIN_10 +231 0x1618 //RX_FDEQ_BIN_11 +232 0x1C1C //RX_FDEQ_BIN_12 +233 0x2020 //RX_FDEQ_BIN_13 +234 0x2020 //RX_FDEQ_BIN_14 +235 0x2011 //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x4000 //RX_FDEQ_RESRV_0 +245 0x0320 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0030 //RX_FDDRC_BAND_MARGIN_1 +248 0x0050 //RX_FDDRC_BAND_MARGIN_2 +249 0x0080 //RX_FDDRC_BAND_MARGIN_3 +250 0x0007 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x5000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x6400 //RX_FDDRC_THRD_3_2 +258 0x6400 //RX_FDDRC_THRD_3_3 +259 0x2000 //RX_FDDRC_SLANT_0_0 +260 0x2000 //RX_FDDRC_SLANT_0_1 +261 0x2000 //RX_FDDRC_SLANT_0_2 +262 0x2000 //RX_FDDRC_SLANT_0_3 +263 0x5333 //RX_FDDRC_SLANT_1_0 +264 0x5333 //RX_FDDRC_SLANT_1_1 +265 0x5333 //RX_FDDRC_SLANT_1_2 +266 0x5333 //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +286 0x0013 //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 +#VOL 2 +163 0x1000 //RX_TDDRC_ALPHA_UP_1 +164 0x1000 //RX_TDDRC_ALPHA_UP_2 +165 0x1000 //RX_TDDRC_ALPHA_UP_3 +166 0x1000 //RX_TDDRC_ALPHA_UP_4 +184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +190 0x7FFF //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +269 0x0000 //RX_TDDRC_THRD_0 +270 0x0000 //RX_TDDRC_THRD_1 +271 0x1200 //RX_TDDRC_THRD_2 +272 0x1900 //RX_TDDRC_THRD_3 +273 0x3000 //RX_TDDRC_SLANT_0 +274 0x6E00 //RX_TDDRC_SLANT_1 +275 0x1000 //RX_TDDRC_ALPHA_UP_0 +276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x199A //RX_TDDRC_HMNC_GAIN +279 0x0001 //RX_TDDRC_SMT_FLAG +280 0x0CCD //RX_TDDRC_SMT_W +281 0x0240 //RX_TDDRC_DRC_GAIN +195 0x0020 //RX_FDEQ_SUBNUM +196 0x4848 //RX_FDEQ_GAIN_0 +197 0x4848 //RX_FDEQ_GAIN_1 +198 0x4848 //RX_FDEQ_GAIN_2 +199 0x4848 //RX_FDEQ_GAIN_3 +200 0x4848 //RX_FDEQ_GAIN_4 +201 0x4848 //RX_FDEQ_GAIN_5 +202 0x4848 //RX_FDEQ_GAIN_6 +203 0x4848 //RX_FDEQ_GAIN_7 +204 0x4848 //RX_FDEQ_GAIN_8 +205 0x4848 //RX_FDEQ_GAIN_9 +206 0x4848 //RX_FDEQ_GAIN_10 +207 0x4848 //RX_FDEQ_GAIN_11 +208 0x4848 //RX_FDEQ_GAIN_12 +209 0x4848 //RX_FDEQ_GAIN_13 +210 0x4848 //RX_FDEQ_GAIN_14 +211 0x4848 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0202 //RX_FDEQ_BIN_0 +221 0x0203 //RX_FDEQ_BIN_1 +222 0x0304 //RX_FDEQ_BIN_2 +223 0x0405 //RX_FDEQ_BIN_3 +224 0x0607 //RX_FDEQ_BIN_4 +225 0x0809 //RX_FDEQ_BIN_5 +226 0x0A0B //RX_FDEQ_BIN_6 +227 0x0C0D //RX_FDEQ_BIN_7 +228 0x0E0F //RX_FDEQ_BIN_8 +229 0x1011 //RX_FDEQ_BIN_9 +230 0x1214 //RX_FDEQ_BIN_10 +231 0x1618 //RX_FDEQ_BIN_11 +232 0x1C1C //RX_FDEQ_BIN_12 +233 0x2020 //RX_FDEQ_BIN_13 +234 0x2020 //RX_FDEQ_BIN_14 +235 0x2011 //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x4000 //RX_FDEQ_RESRV_0 +245 0x0320 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0030 //RX_FDDRC_BAND_MARGIN_1 +248 0x0050 //RX_FDDRC_BAND_MARGIN_2 +249 0x0080 //RX_FDDRC_BAND_MARGIN_3 +250 0x0007 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x5000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x6400 //RX_FDDRC_THRD_3_2 +258 0x6400 //RX_FDDRC_THRD_3_3 +259 0x2000 //RX_FDDRC_SLANT_0_0 +260 0x2000 //RX_FDDRC_SLANT_0_1 +261 0x2000 //RX_FDDRC_SLANT_0_2 +262 0x2000 //RX_FDDRC_SLANT_0_3 +263 0x5333 //RX_FDDRC_SLANT_1_0 +264 0x5333 //RX_FDDRC_SLANT_1_1 +265 0x5333 //RX_FDDRC_SLANT_1_2 +266 0x5333 //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +286 0x0020 //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 +#VOL 3 +163 0x1000 //RX_TDDRC_ALPHA_UP_1 +164 0x1000 //RX_TDDRC_ALPHA_UP_2 +165 0x1000 //RX_TDDRC_ALPHA_UP_3 +166 0x1000 //RX_TDDRC_ALPHA_UP_4 +184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +190 0x7FFF //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +269 0x0000 //RX_TDDRC_THRD_0 +270 0x0000 //RX_TDDRC_THRD_1 +271 0x1200 //RX_TDDRC_THRD_2 +272 0x1900 //RX_TDDRC_THRD_3 +273 0x3000 //RX_TDDRC_SLANT_0 +274 0x6E00 //RX_TDDRC_SLANT_1 +275 0x1000 //RX_TDDRC_ALPHA_UP_0 +276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x199A //RX_TDDRC_HMNC_GAIN +279 0x0001 //RX_TDDRC_SMT_FLAG +280 0x0CCD //RX_TDDRC_SMT_W +281 0x0240 //RX_TDDRC_DRC_GAIN +195 0x0020 //RX_FDEQ_SUBNUM +196 0x4848 //RX_FDEQ_GAIN_0 +197 0x4848 //RX_FDEQ_GAIN_1 +198 0x4848 //RX_FDEQ_GAIN_2 +199 0x4848 //RX_FDEQ_GAIN_3 +200 0x4848 //RX_FDEQ_GAIN_4 +201 0x4848 //RX_FDEQ_GAIN_5 +202 0x4848 //RX_FDEQ_GAIN_6 +203 0x4848 //RX_FDEQ_GAIN_7 +204 0x4848 //RX_FDEQ_GAIN_8 +205 0x4848 //RX_FDEQ_GAIN_9 +206 0x4848 //RX_FDEQ_GAIN_10 +207 0x4848 //RX_FDEQ_GAIN_11 +208 0x4848 //RX_FDEQ_GAIN_12 +209 0x4848 //RX_FDEQ_GAIN_13 +210 0x4848 //RX_FDEQ_GAIN_14 +211 0x4848 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0202 //RX_FDEQ_BIN_0 +221 0x0203 //RX_FDEQ_BIN_1 +222 0x0304 //RX_FDEQ_BIN_2 +223 0x0405 //RX_FDEQ_BIN_3 +224 0x0607 //RX_FDEQ_BIN_4 +225 0x0809 //RX_FDEQ_BIN_5 +226 0x0A0B //RX_FDEQ_BIN_6 +227 0x0C0D //RX_FDEQ_BIN_7 +228 0x0E0F //RX_FDEQ_BIN_8 +229 0x1011 //RX_FDEQ_BIN_9 +230 0x1214 //RX_FDEQ_BIN_10 +231 0x1618 //RX_FDEQ_BIN_11 +232 0x1C1C //RX_FDEQ_BIN_12 +233 0x2020 //RX_FDEQ_BIN_13 +234 0x2020 //RX_FDEQ_BIN_14 +235 0x2011 //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x4000 //RX_FDEQ_RESRV_0 +245 0x0320 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0030 //RX_FDDRC_BAND_MARGIN_1 +248 0x0050 //RX_FDDRC_BAND_MARGIN_2 +249 0x0080 //RX_FDDRC_BAND_MARGIN_3 +250 0x0007 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x5000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x6400 //RX_FDDRC_THRD_3_2 +258 0x6400 //RX_FDDRC_THRD_3_3 +259 0x2000 //RX_FDDRC_SLANT_0_0 +260 0x2000 //RX_FDDRC_SLANT_0_1 +261 0x2000 //RX_FDDRC_SLANT_0_2 +262 0x2000 //RX_FDDRC_SLANT_0_3 +263 0x5333 //RX_FDDRC_SLANT_1_0 +264 0x5333 //RX_FDDRC_SLANT_1_1 +265 0x5333 //RX_FDDRC_SLANT_1_2 +266 0x5333 //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +286 0x0036 //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 +#VOL 4 +163 0x1000 //RX_TDDRC_ALPHA_UP_1 +164 0x1000 //RX_TDDRC_ALPHA_UP_2 +165 0x1000 //RX_TDDRC_ALPHA_UP_3 +166 0x1000 //RX_TDDRC_ALPHA_UP_4 +184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +190 0x7FFF //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +269 0x0000 //RX_TDDRC_THRD_0 +270 0x0000 //RX_TDDRC_THRD_1 +271 0x1200 //RX_TDDRC_THRD_2 +272 0x1900 //RX_TDDRC_THRD_3 +273 0x3000 //RX_TDDRC_SLANT_0 +274 0x6E00 //RX_TDDRC_SLANT_1 +275 0x1000 //RX_TDDRC_ALPHA_UP_0 +276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x199A //RX_TDDRC_HMNC_GAIN +279 0x0001 //RX_TDDRC_SMT_FLAG +280 0x0CCD //RX_TDDRC_SMT_W +281 0x0240 //RX_TDDRC_DRC_GAIN +195 0x0020 //RX_FDEQ_SUBNUM +196 0x4848 //RX_FDEQ_GAIN_0 +197 0x4848 //RX_FDEQ_GAIN_1 +198 0x4848 //RX_FDEQ_GAIN_2 +199 0x4848 //RX_FDEQ_GAIN_3 +200 0x4848 //RX_FDEQ_GAIN_4 +201 0x4848 //RX_FDEQ_GAIN_5 +202 0x4848 //RX_FDEQ_GAIN_6 +203 0x4848 //RX_FDEQ_GAIN_7 +204 0x4848 //RX_FDEQ_GAIN_8 +205 0x4848 //RX_FDEQ_GAIN_9 +206 0x4848 //RX_FDEQ_GAIN_10 +207 0x4848 //RX_FDEQ_GAIN_11 +208 0x4848 //RX_FDEQ_GAIN_12 +209 0x4848 //RX_FDEQ_GAIN_13 +210 0x4848 //RX_FDEQ_GAIN_14 +211 0x4848 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0202 //RX_FDEQ_BIN_0 +221 0x0203 //RX_FDEQ_BIN_1 +222 0x0304 //RX_FDEQ_BIN_2 +223 0x0405 //RX_FDEQ_BIN_3 +224 0x0607 //RX_FDEQ_BIN_4 +225 0x0809 //RX_FDEQ_BIN_5 +226 0x0A0B //RX_FDEQ_BIN_6 +227 0x0C0D //RX_FDEQ_BIN_7 +228 0x0E0F //RX_FDEQ_BIN_8 +229 0x1011 //RX_FDEQ_BIN_9 +230 0x1214 //RX_FDEQ_BIN_10 +231 0x1618 //RX_FDEQ_BIN_11 +232 0x1C1C //RX_FDEQ_BIN_12 +233 0x2020 //RX_FDEQ_BIN_13 +234 0x2020 //RX_FDEQ_BIN_14 +235 0x2011 //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x4000 //RX_FDEQ_RESRV_0 +245 0x0320 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0030 //RX_FDDRC_BAND_MARGIN_1 +248 0x0050 //RX_FDDRC_BAND_MARGIN_2 +249 0x0080 //RX_FDDRC_BAND_MARGIN_3 +250 0x0007 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x5000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x6400 //RX_FDDRC_THRD_3_2 +258 0x6400 //RX_FDDRC_THRD_3_3 +259 0x2000 //RX_FDDRC_SLANT_0_0 +260 0x2000 //RX_FDDRC_SLANT_0_1 +261 0x2000 //RX_FDDRC_SLANT_0_2 +262 0x2000 //RX_FDDRC_SLANT_0_3 +263 0x5333 //RX_FDDRC_SLANT_1_0 +264 0x5333 //RX_FDDRC_SLANT_1_1 +265 0x5333 //RX_FDDRC_SLANT_1_2 +266 0x5333 //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +286 0x005B //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 +#VOL 5 +163 0x1000 //RX_TDDRC_ALPHA_UP_1 +164 0x1000 //RX_TDDRC_ALPHA_UP_2 +165 0x1000 //RX_TDDRC_ALPHA_UP_3 +166 0x1000 //RX_TDDRC_ALPHA_UP_4 +184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +190 0x7FFF //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +269 0x0000 //RX_TDDRC_THRD_0 +270 0x0000 //RX_TDDRC_THRD_1 +271 0x1200 //RX_TDDRC_THRD_2 +272 0x1900 //RX_TDDRC_THRD_3 +273 0x3000 //RX_TDDRC_SLANT_0 +274 0x6E00 //RX_TDDRC_SLANT_1 +275 0x1000 //RX_TDDRC_ALPHA_UP_0 +276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x199A //RX_TDDRC_HMNC_GAIN +279 0x0001 //RX_TDDRC_SMT_FLAG +280 0x0CCD //RX_TDDRC_SMT_W +281 0x0240 //RX_TDDRC_DRC_GAIN +195 0x0020 //RX_FDEQ_SUBNUM +196 0x4848 //RX_FDEQ_GAIN_0 +197 0x4848 //RX_FDEQ_GAIN_1 +198 0x4848 //RX_FDEQ_GAIN_2 +199 0x4848 //RX_FDEQ_GAIN_3 +200 0x4848 //RX_FDEQ_GAIN_4 +201 0x4848 //RX_FDEQ_GAIN_5 +202 0x4848 //RX_FDEQ_GAIN_6 +203 0x4848 //RX_FDEQ_GAIN_7 +204 0x4848 //RX_FDEQ_GAIN_8 +205 0x4848 //RX_FDEQ_GAIN_9 +206 0x4848 //RX_FDEQ_GAIN_10 +207 0x4848 //RX_FDEQ_GAIN_11 +208 0x4848 //RX_FDEQ_GAIN_12 +209 0x4848 //RX_FDEQ_GAIN_13 +210 0x4848 //RX_FDEQ_GAIN_14 +211 0x4848 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0202 //RX_FDEQ_BIN_0 +221 0x0203 //RX_FDEQ_BIN_1 +222 0x0304 //RX_FDEQ_BIN_2 +223 0x0405 //RX_FDEQ_BIN_3 +224 0x0607 //RX_FDEQ_BIN_4 +225 0x0809 //RX_FDEQ_BIN_5 +226 0x0A0B //RX_FDEQ_BIN_6 +227 0x0C0D //RX_FDEQ_BIN_7 +228 0x0E0F //RX_FDEQ_BIN_8 +229 0x1011 //RX_FDEQ_BIN_9 +230 0x1214 //RX_FDEQ_BIN_10 +231 0x1618 //RX_FDEQ_BIN_11 +232 0x1C1C //RX_FDEQ_BIN_12 +233 0x2020 //RX_FDEQ_BIN_13 +234 0x2020 //RX_FDEQ_BIN_14 +235 0x2011 //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x4000 //RX_FDEQ_RESRV_0 +245 0x0320 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0030 //RX_FDDRC_BAND_MARGIN_1 +248 0x0050 //RX_FDDRC_BAND_MARGIN_2 +249 0x0080 //RX_FDDRC_BAND_MARGIN_3 +250 0x0007 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x5000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x6400 //RX_FDDRC_THRD_3_2 +258 0x6400 //RX_FDDRC_THRD_3_3 +259 0x2000 //RX_FDDRC_SLANT_0_0 +260 0x2000 //RX_FDDRC_SLANT_0_1 +261 0x2000 //RX_FDDRC_SLANT_0_2 +262 0x2000 //RX_FDDRC_SLANT_0_3 +263 0x5333 //RX_FDDRC_SLANT_1_0 +264 0x5333 //RX_FDDRC_SLANT_1_1 +265 0x5333 //RX_FDDRC_SLANT_1_2 +266 0x5333 //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +286 0x0099 //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 +#VOL 6 +163 0x1000 //RX_TDDRC_ALPHA_UP_1 +164 0x1000 //RX_TDDRC_ALPHA_UP_2 +165 0x1000 //RX_TDDRC_ALPHA_UP_3 +166 0x1000 //RX_TDDRC_ALPHA_UP_4 +184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +190 0x7FFF //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +269 0x0000 //RX_TDDRC_THRD_0 +270 0x0000 //RX_TDDRC_THRD_1 +271 0x1200 //RX_TDDRC_THRD_2 +272 0x1900 //RX_TDDRC_THRD_3 +273 0x3000 //RX_TDDRC_SLANT_0 +274 0x6E00 //RX_TDDRC_SLANT_1 +275 0x1000 //RX_TDDRC_ALPHA_UP_0 +276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x199A //RX_TDDRC_HMNC_GAIN +279 0x0001 //RX_TDDRC_SMT_FLAG +280 0x0CCD //RX_TDDRC_SMT_W +281 0x0240 //RX_TDDRC_DRC_GAIN +195 0x0020 //RX_FDEQ_SUBNUM +196 0x4848 //RX_FDEQ_GAIN_0 +197 0x4848 //RX_FDEQ_GAIN_1 +198 0x4848 //RX_FDEQ_GAIN_2 +199 0x4848 //RX_FDEQ_GAIN_3 +200 0x4848 //RX_FDEQ_GAIN_4 +201 0x4848 //RX_FDEQ_GAIN_5 +202 0x4848 //RX_FDEQ_GAIN_6 +203 0x4848 //RX_FDEQ_GAIN_7 +204 0x4848 //RX_FDEQ_GAIN_8 +205 0x4848 //RX_FDEQ_GAIN_9 +206 0x4848 //RX_FDEQ_GAIN_10 +207 0x4848 //RX_FDEQ_GAIN_11 +208 0x4848 //RX_FDEQ_GAIN_12 +209 0x4848 //RX_FDEQ_GAIN_13 +210 0x4848 //RX_FDEQ_GAIN_14 +211 0x4848 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0202 //RX_FDEQ_BIN_0 +221 0x0203 //RX_FDEQ_BIN_1 +222 0x0304 //RX_FDEQ_BIN_2 +223 0x0405 //RX_FDEQ_BIN_3 +224 0x0607 //RX_FDEQ_BIN_4 +225 0x0809 //RX_FDEQ_BIN_5 +226 0x0A0B //RX_FDEQ_BIN_6 +227 0x0C0D //RX_FDEQ_BIN_7 +228 0x0E0F //RX_FDEQ_BIN_8 +229 0x1011 //RX_FDEQ_BIN_9 +230 0x1214 //RX_FDEQ_BIN_10 +231 0x1618 //RX_FDEQ_BIN_11 +232 0x1C1C //RX_FDEQ_BIN_12 +233 0x2020 //RX_FDEQ_BIN_13 +234 0x2020 //RX_FDEQ_BIN_14 +235 0x2011 //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x4000 //RX_FDEQ_RESRV_0 +245 0x0320 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0030 //RX_FDDRC_BAND_MARGIN_1 +248 0x0050 //RX_FDDRC_BAND_MARGIN_2 +249 0x0080 //RX_FDDRC_BAND_MARGIN_3 +250 0x0007 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x5000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x6400 //RX_FDDRC_THRD_3_2 +258 0x6400 //RX_FDDRC_THRD_3_3 +259 0x2000 //RX_FDDRC_SLANT_0_0 +260 0x2000 //RX_FDDRC_SLANT_0_1 +261 0x2000 //RX_FDDRC_SLANT_0_2 +262 0x2000 //RX_FDDRC_SLANT_0_3 +263 0x5333 //RX_FDDRC_SLANT_1_0 +264 0x5333 //RX_FDDRC_SLANT_1_1 +265 0x5333 //RX_FDDRC_SLANT_1_2 +266 0x5333 //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +286 0x0100 //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 #CASE_NAME HEADSET-GOOGLE_CONDOR_HEADPHONE-VOICE_GENERIC-NB -#PARAM_MODE FULL -#PARAM_TYPE TX+RX -#TOTAL_CUSTOM_STEP 7 +#PARAM_MODE Full +#PARAM_TYPE TX+2RX +#TOTAL_CUSTOM_STEP 7+7 #TX 0 0x0001 //TX_OPERATION_MODE_0 1 0x0001 //TX_OPERATION_MODE_1 2 0x0033 //TX_PATCH_REG -3 0x2F7C //TX_SENDFUNC_MODE_0 +3 0x6F7C //TX_SENDFUNC_MODE_0 4 0x0001 //TX_SENDFUNC_MODE_1 -5 0x0003 //TX_NUM_MIC +5 0x0002 //TX_NUM_MIC 6 0x0000 //TX_SAMPLINGFREQ_SIG 7 0x0000 //TX_SAMPLINGFREQ_PROC 8 0x000A //TX_FRAME_SZ_SIG @@ -21077,8 +32069,8 @@ 18 0x0000 //TX_SYS_RESRV_2 19 0x0000 //TX_SYS_RESRV_3 20 0x0000 //TX_DIST2REF0 -21 0x00A4 //TX_DIST2REF1 -22 0x0017 //TX_DIST2REF_02 +21 0x009D //TX_DIST2REF1 +22 0x0010 //TX_DIST2REF_02 23 0x0000 //TX_DIST2REF_03 24 0x0000 //TX_DIST2REF_04 25 0x0000 //TX_DIST2REF_05 @@ -21184,7 +32176,7 @@ 125 0x6000 //TX_C_POST_FLT_MIC_MAINBLK 126 0x6000 //TX_C_POST_FLT_MIC_REFBLK 127 0x0010 //TX_MIC_BLOCK_N -128 0x7652 //TX_A_HP +128 0x7646 //TX_A_HP 129 0x4000 //TX_B_PE 130 0x5000 //TX_THR_PITCH_DET_0 131 0x4800 //TX_THR_PITCH_DET_1 @@ -21223,7 +32215,7 @@ 164 0x7FFF //TX_MIN_EQ_RE_EST_12 165 0x2000 //TX_LAMBDA_RE_EST 166 0x0000 //TX_LAMBDA_CB_NLE -167 0x7FFF //TX_C_POST_FLT +167 0x4000 //TX_C_POST_FLT 168 0x2000 //TX_GAIN_NP 169 0x0180 //TX_SE_HOLD_N 170 0x00C8 //TX_DT_HOLD_N @@ -21253,14 +32245,14 @@ 194 0x0000 //TX_NORMENERTH 195 0x0000 //TX_NORMENERHIGHTH 196 0x0000 //TX_NORMENERHIGHTHL -197 0x6590 //TX_DTD_THR1_0 -198 0x6590 //TX_DTD_THR1_1 -199 0x6590 //TX_DTD_THR1_2 +197 0x7FF0 //TX_DTD_THR1_0 +198 0x7FF0 //TX_DTD_THR1_1 +199 0x7FF0 //TX_DTD_THR1_2 200 0x7FF0 //TX_DTD_THR1_3 201 0x7FF0 //TX_DTD_THR1_4 202 0x7FF0 //TX_DTD_THR1_5 203 0x7FF0 //TX_DTD_THR1_6 -204 0x0CCD //TX_DTD_THR2_0 +204 0x7E00 //TX_DTD_THR2_0 205 0x0CCD //TX_DTD_THR2_1 206 0x0CCD //TX_DTD_THR2_2 207 0x0CCD //TX_DTD_THR2_3 @@ -21269,7 +32261,7 @@ 210 0x0CCD //TX_DTD_THR2_6 211 0x7FFF //TX_DTD_THR3 212 0x0000 //TX_SPK_CUT_K -213 0x157C //TX_DT_CUT_K +213 0x1F40 //TX_DT_CUT_K 214 0x0100 //TX_DT_CUT_THR 215 0x04EB //TX_COMFORT_G 216 0x01F4 //TX_POWER_YOUT_TH @@ -21279,18 +32271,18 @@ 220 0x0000 //TX_DTD_MIC_BLK 221 0x1000 //TX_ADPT_STRICT_L 222 0x1000 //TX_ADPT_STRICT_H -223 0x0BB8 //TX_RATIO_DT_L_TH_LOW +223 0x0001 //TX_RATIO_DT_L_TH_LOW 224 0x3A98 //TX_RATIO_DT_H_TH_LOW -225 0x1770 //TX_RATIO_DT_L_TH_HIGH +225 0x0640 //TX_RATIO_DT_L_TH_HIGH 226 0x4E20 //TX_RATIO_DT_H_TH_HIGH -227 0x09C4 //TX_RATIO_DT_L0_TH -228 0x0800 //TX_B_POST_FILT_ECHO_L +227 0x0001 //TX_RATIO_DT_L0_TH +228 0x7FFF //TX_B_POST_FILT_ECHO_L 229 0x2000 //TX_B_POST_FILT_ECHO_H 230 0x0200 //TX_MIN_G_CTRL_ECHO 231 0x1000 //TX_B_LESSCUT_RTO_ECHO 232 0x0000 //TX_EPD_OFFSET_00 233 0x0000 //TX_EPD_OFFST_01 -234 0x1388 //TX_RATIO_DT_L0_TH_HIGH +234 0x05DC //TX_RATIO_DT_L0_TH_HIGH 235 0x3A98 //TX_RATIO_DT_H_TH_CUT 236 0x7FFF //TX_MIN_EQ_RE_EST_13 237 0x0000 //TX_DTD_THR1_7 @@ -21298,7 +32290,7 @@ 239 0x0800 //TX_DT_RESRV_7 240 0x0800 //TX_DT_RESRV_8 241 0x0000 //TX_DT_RESRV_9 -242 0xF800 //TX_THR_SN_EST_0 +242 0xFA00 //TX_THR_SN_EST_0 243 0xFA00 //TX_THR_SN_EST_1 244 0xFA00 //TX_THR_SN_EST_2 245 0xF900 //TX_THR_SN_EST_3 @@ -21307,12 +32299,12 @@ 248 0xF800 //TX_THR_SN_EST_6 249 0xF800 //TX_THR_SN_EST_7 250 0x0050 //TX_DELTA_THR_SN_EST_0 -251 0x01A0 //TX_DELTA_THR_SN_EST_1 +251 0x0200 //TX_DELTA_THR_SN_EST_1 252 0x0200 //TX_DELTA_THR_SN_EST_2 -253 0x0200 //TX_DELTA_THR_SN_EST_3 -254 0x0100 //TX_DELTA_THR_SN_EST_4 +253 0x0100 //TX_DELTA_THR_SN_EST_3 +254 0x0200 //TX_DELTA_THR_SN_EST_4 255 0x0200 //TX_DELTA_THR_SN_EST_5 -256 0x0200 //TX_DELTA_THR_SN_EST_6 +256 0x01A0 //TX_DELTA_THR_SN_EST_6 257 0x0200 //TX_DELTA_THR_SN_EST_7 258 0x4000 //TX_LAMBDA_NN_EST_0 259 0x4000 //TX_LAMBDA_NN_EST_1 @@ -21339,28 +32331,28 @@ 280 0x1000 //TX_B_POST_FLT_1 281 0x0010 //TX_NS_LVL_CTRL_0 282 0x0012 //TX_NS_LVL_CTRL_1 -283 0x0017 //TX_NS_LVL_CTRL_2 -284 0x0015 //TX_NS_LVL_CTRL_3 +283 0x0015 //TX_NS_LVL_CTRL_2 +284 0x0012 //TX_NS_LVL_CTRL_3 285 0x0012 //TX_NS_LVL_CTRL_4 -286 0x0012 //TX_NS_LVL_CTRL_5 -287 0x0011 //TX_NS_LVL_CTRL_6 +286 0x0011 //TX_NS_LVL_CTRL_5 +287 0x0012 //TX_NS_LVL_CTRL_6 288 0x0011 //TX_NS_LVL_CTRL_7 289 0x000F //TX_MIN_GAIN_S_0 -290 0x000F //TX_MIN_GAIN_S_1 -291 0x000D //TX_MIN_GAIN_S_2 +290 0x000D //TX_MIN_GAIN_S_1 +291 0x000F //TX_MIN_GAIN_S_2 292 0x000F //TX_MIN_GAIN_S_3 293 0x000F //TX_MIN_GAIN_S_4 -294 0x000F //TX_MIN_GAIN_S_5 -295 0x0010 //TX_MIN_GAIN_S_6 +294 0x0010 //TX_MIN_GAIN_S_5 +295 0x000F //TX_MIN_GAIN_S_6 296 0x000F //TX_MIN_GAIN_S_7 297 0x4000 //TX_NMOS_SUP 298 0x0000 //TX_NS_MAX_PRI_SNR_TH 299 0x0000 //TX_NMOS_SUP_MENSA 300 0x7FFF //TX_SNRI_SUP_0 -301 0x4000 //TX_SNRI_SUP_1 -302 0x1000 //TX_SNRI_SUP_2 -303 0x4000 //TX_SNRI_SUP_3 -304 0x2400 //TX_SNRI_SUP_4 +301 0x3000 //TX_SNRI_SUP_1 +302 0x4000 //TX_SNRI_SUP_2 +303 0x2400 //TX_SNRI_SUP_3 +304 0x4000 //TX_SNRI_SUP_4 305 0x4000 //TX_SNRI_SUP_5 306 0x4000 //TX_SNRI_SUP_6 307 0x7FFF //TX_SNRI_SUP_7 @@ -21371,19 +32363,19 @@ 312 0x7FFF //TX_A_POST_FILT_0 313 0x2000 //TX_A_POST_FILT_1 314 0x4000 //TX_A_POST_FILT_S_0 -315 0x5000 //TX_A_POST_FILT_S_1 -316 0x2000 //TX_A_POST_FILT_S_2 -317 0x4000 //TX_A_POST_FILT_S_3 -318 0x1000 //TX_A_POST_FILT_S_4 -319 0x3000 //TX_A_POST_FILT_S_5 +315 0x2000 //TX_A_POST_FILT_S_1 +316 0x4000 //TX_A_POST_FILT_S_2 +317 0x1000 //TX_A_POST_FILT_S_3 +318 0x3000 //TX_A_POST_FILT_S_4 +319 0x5000 //TX_A_POST_FILT_S_5 320 0x5000 //TX_A_POST_FILT_S_6 321 0x7000 //TX_A_POST_FILT_S_7 322 0x1000 //TX_B_POST_FILT_0 323 0x1000 //TX_B_POST_FILT_1 324 0x1000 //TX_B_POST_FILT_2 -325 0x1000 //TX_B_POST_FILT_3 -326 0x5000 //TX_B_POST_FILT_4 -327 0x3000 //TX_B_POST_FILT_5 +325 0x5000 //TX_B_POST_FILT_3 +326 0x3000 //TX_B_POST_FILT_4 +327 0x1000 //TX_B_POST_FILT_5 328 0x1000 //TX_B_POST_FILT_6 329 0x2000 //TX_B_POST_FILT_7 330 0x4000 //TX_B_LESSCUT_RTO_S_0 @@ -21396,12 +32388,12 @@ 337 0x7FFF //TX_B_LESSCUT_RTO_S_7 338 0x7E00 //TX_LAMBDA_PFILT 339 0x7D00 //TX_LAMBDA_PFILT_S_0 -340 0x7900 //TX_LAMBDA_PFILT_S_1 -341 0x7400 //TX_LAMBDA_PFILT_S_2 -342 0x7900 //TX_LAMBDA_PFILT_S_3 -343 0x7000 //TX_LAMBDA_PFILT_S_4 +340 0x7C00 //TX_LAMBDA_PFILT_S_1 +341 0x7900 //TX_LAMBDA_PFILT_S_2 +342 0x7000 //TX_LAMBDA_PFILT_S_3 +343 0x7D00 //TX_LAMBDA_PFILT_S_4 344 0x7D00 //TX_LAMBDA_PFILT_S_5 -345 0x7D00 //TX_LAMBDA_PFILT_S_6 +345 0x7900 //TX_LAMBDA_PFILT_S_6 346 0x7D00 //TX_LAMBDA_PFILT_S_7 347 0x0200 //TX_K_PEPPER 348 0x0800 //TX_A_PEPPER @@ -21410,20 +32402,20 @@ 351 0x0001 //TX_HMNC_BST_FLG 352 0x0200 //TX_HMNC_BST_THR 353 0x0800 //TX_DT_BINVAD_TH_0 -354 0x0800 //TX_DT_BINVAD_TH_1 -355 0x0800 //TX_DT_BINVAD_TH_2 +354 0x0100 //TX_DT_BINVAD_TH_1 +355 0x0100 //TX_DT_BINVAD_TH_2 356 0x0800 //TX_DT_BINVAD_TH_3 357 0x0FA0 //TX_DT_BINVAD_ENDF -358 0x0400 //TX_C_POST_FLT_DT +358 0x7000 //TX_C_POST_FLT_DT 359 0x4000 //TX_NS_B_POST_FLT_LESSCUT -360 0x0100 //TX_DT_BOOST +360 0x01B0 //TX_DT_BOOST 361 0x0000 //TX_BF_SGRAD_FLG 362 0x0005 //TX_BF_DVG_TH 363 0x001E //TX_SN_C_F 364 0x0000 //TX_K_APT 365 0x0001 //TX_NOISEDET 366 0x0064 //TX_NDETCT -367 0x0050 //TX_NOISE_TH_0 +367 0x003B //TX_NOISE_TH_0 368 0x7FFF //TX_NOISE_TH_0_2 369 0x7FFF //TX_NOISE_TH_0_3 370 0x07D0 //TX_NOISE_TH_1 @@ -21435,11 +32427,11 @@ 376 0x0000 //TX_NOISE_TH_5_3 377 0x7FFF //TX_NOISE_TH_5_4 378 0x0FA0 //TX_NOISE_TH_6 -379 0x000A //TX_MINENOISE_TH -380 0x4000 //TX_MINENOISE_MIC0_TH_MTS -381 0xFFEE //TX_MINENOISE_MIC0_TH_EXP -382 0x6000 //TX_MINENOISE_MIC0_S_TH_MTS -383 0xFFF3 //TX_MINENOISE_MIC0_S_TH_EXP +379 0x00C8 //TX_MINENOISE_TH +380 0xD508 //TX_MORENS_TFMASK_TH +381 0x0001 //TX_DRC_QUIET_FLOOR +382 0x3A98 //TX_RATIODTL_CUT_TH +383 0x0DAC //TX_DT_CUT_K1 384 0x0666 //TX_OUT_ENER_S_TH_CLEAN 385 0x0666 //TX_OUT_ENER_S_TH_LESSCLEAN 386 0x0333 //TX_OUT_ENER_S_TH_NOISY @@ -21447,22 +32439,22 @@ 388 0x1000 //TX_OUT_ENER_TH_SPEECH 389 0x2000 //TX_SN_NPB_GAIN 390 0x0000 //TX_NN_NPB_GAIN -391 0x0000 //TX_CSX_ALPHA_0 -392 0x0000 //TX_CSX_ALPHA_1 -393 0x0000 //TX_CSX_ALPHA_2 -394 0x0000 //TX_CSX_ALPHA_3 -395 0x0800 //TX_MU_ARSP_EST -396 0x00C8 //TX_P_OUTBEAM_MIN_TH +391 0x7FFF //TX_POST_MASK_SUP_HSNE +392 0x1388 //TX_TAIL_DET_TH +393 0x4000 //TX_B_LESSCUT_RTO_WTA +394 0x0000 //TX_MEL_G_R +395 0x0080 //TX_SUPHIGH_TH +396 0x0000 //TX_MASK_G_R 397 0x0002 //TX_EXTRA_NS_L -398 0x0800 //TX_EXTRA_NS_A -399 0x0005 //TX_VR_NOISE_FLOOR_TH +398 0x1800 //TX_C_POST_FLT_MASK +399 0x7FFF //TX_A_POST_FLT_WNS 400 0x0148 //TX_MIN_G_LOW300HZ -401 0x0001 //TX_MAXLEVEL_CNG +401 0x0004 //TX_MAXLEVEL_CNG 402 0x00B4 //TX_STN_NOISE_TH 403 0x4000 //TX_POST_MASK_SUP 404 0x7FFF //TX_POST_MASK_ADJUST 405 0x00C8 //TX_NS_ENOISE_MIC0_TH -406 0x000A //TX_MINENOISE_MIC0_TH +406 0x0032 //TX_MINENOISE_MIC0_TH 407 0x012C //TX_MINENOISE_MIC0_S_TH 408 0x7FFF //TX_MIN_G_CTRL_SSNS 409 0x0000 //TX_METAL_RTO_THR @@ -21570,16 +32562,16 @@ 511 0x6666 //TX_MIC_TO_BFGAIN 512 0x0000 //TX_MICTOBFGAIN0 513 0x0000 //TX_FASTMUE_TH -514 0x0000 //TX_DERVB_LEN_0 -515 0x0000 //TX_DERVB_LEN_1 -516 0x0000 //TX_RHO_DERVB -517 0x0000 //TX_MIC_INDX_DERVB -518 0x0000 //TX_MU_DERVB -519 0x0000 //TX_DR_RESRV_0 -520 0x0000 //TX_DR_RESRV_1 -521 0x0000 //TX_DR_RESRV_2 -522 0x0000 //TX_DR_RESRV_3 -523 0x0000 //TX_DR_RESRV_4 +514 0xC000 //TX_DEREVERB_LF_MU +515 0xC000 //TX_DEREVERB_HF_MU +516 0xCCCC //TX_DEREVERB_DELAY +517 0xD999 //TX_DEREVERB_COEF_LEN +518 0x1F40 //TX_DEREVERB_DNR +519 0x0000 //TX_DEREVERB_ALPHA +520 0x0000 //TX_DEREVERB_BETA +521 0x0000 //TX_GSC_RTOL_TH +522 0x7000 //TX_GSC_RTOH_TH +523 0x0064 //TX_WIDE2_MEANHTH 524 0x0000 //TX_DR_RESRV_5 525 0x0000 //TX_DR_RESRV_6 526 0x0000 //TX_DR_RESRV_7 @@ -21623,16 +32615,16 @@ 564 0x0000 //TX_PB_RESRV_0 565 0x0000 //TX_PB_RESRV_1 566 0x0014 //TX_FDEQ_SUBNUM -567 0x5858 //TX_FDEQ_GAIN_0 -568 0x5850 //TX_FDEQ_GAIN_1 -569 0x5050 //TX_FDEQ_GAIN_2 -570 0x5048 //TX_FDEQ_GAIN_3 -571 0x3C48 //TX_FDEQ_GAIN_4 -572 0x3C48 //TX_FDEQ_GAIN_5 -573 0x4848 //TX_FDEQ_GAIN_6 -574 0x4842 //TX_FDEQ_GAIN_7 -575 0x3030 //TX_FDEQ_GAIN_8 -576 0x3030 //TX_FDEQ_GAIN_9 +567 0x5050 //TX_FDEQ_GAIN_0 +568 0x5048 //TX_FDEQ_GAIN_1 +569 0x4848 //TX_FDEQ_GAIN_2 +570 0x483C //TX_FDEQ_GAIN_3 +571 0x3034 //TX_FDEQ_GAIN_4 +572 0x3048 //TX_FDEQ_GAIN_5 +573 0x4840 //TX_FDEQ_GAIN_6 +574 0x403C //TX_FDEQ_GAIN_7 +575 0x262C //TX_FDEQ_GAIN_8 +576 0x3A3C //TX_FDEQ_GAIN_9 577 0x4848 //TX_FDEQ_GAIN_10 578 0x4848 //TX_FDEQ_GAIN_11 579 0x4848 //TX_FDEQ_GAIN_12 @@ -21656,7 +32648,7 @@ 597 0x0708 //TX_FDEQ_BIN_6 598 0x090A //TX_FDEQ_BIN_7 599 0x0B0C //TX_FDEQ_BIN_8 -600 0x0D08 //TX_FDEQ_BIN_9 +600 0x0D0E //TX_FDEQ_BIN_9 601 0x0000 //TX_FDEQ_BIN_10 602 0x0000 //TX_FDEQ_BIN_11 603 0x0000 //TX_FDEQ_BIN_12 @@ -21680,9 +32672,9 @@ 621 0x4848 //TX_PREEQ_GAIN_MIC0_4 622 0x4848 //TX_PREEQ_GAIN_MIC0_5 623 0x4848 //TX_PREEQ_GAIN_MIC0_6 -624 0x484A //TX_PREEQ_GAIN_MIC0_7 -625 0x4B4E //TX_PREEQ_GAIN_MIC0_8 -626 0x5054 //TX_PREEQ_GAIN_MIC0_9 +624 0x4848 //TX_PREEQ_GAIN_MIC0_7 +625 0x4A4C //TX_PREEQ_GAIN_MIC0_8 +626 0x4E50 //TX_PREEQ_GAIN_MIC0_9 627 0x4848 //TX_PREEQ_GAIN_MIC0_10 628 0x4848 //TX_PREEQ_GAIN_MIC0_11 629 0x4848 //TX_PREEQ_GAIN_MIC0_12 @@ -21706,7 +32698,7 @@ 647 0x0708 //TX_PREEQ_BIN_MIC0_6 648 0x090A //TX_PREEQ_BIN_MIC0_7 649 0x0B0C //TX_PREEQ_BIN_MIC0_8 -650 0x0D08 //TX_PREEQ_BIN_MIC0_9 +650 0x0D0E //TX_PREEQ_BIN_MIC0_9 651 0x0000 //TX_PREEQ_BIN_MIC0_10 652 0x0000 //TX_PREEQ_BIN_MIC0_11 653 0x0000 //TX_PREEQ_BIN_MIC0_12 @@ -21729,9 +32721,9 @@ 670 0x4848 //TX_PREEQ_GAIN_MIC1_4 671 0x4848 //TX_PREEQ_GAIN_MIC1_5 672 0x4848 //TX_PREEQ_GAIN_MIC1_6 -673 0x4848 //TX_PREEQ_GAIN_MIC1_7 -674 0x4848 //TX_PREEQ_GAIN_MIC1_8 -675 0x4848 //TX_PREEQ_GAIN_MIC1_9 +673 0x4846 //TX_PREEQ_GAIN_MIC1_7 +674 0x4544 //TX_PREEQ_GAIN_MIC1_8 +675 0x4241 //TX_PREEQ_GAIN_MIC1_9 676 0x4848 //TX_PREEQ_GAIN_MIC1_10 677 0x4848 //TX_PREEQ_GAIN_MIC1_11 678 0x4848 //TX_PREEQ_GAIN_MIC1_12 @@ -21746,16 +32738,16 @@ 687 0x4848 //TX_PREEQ_GAIN_MIC1_21 688 0x4848 //TX_PREEQ_GAIN_MIC1_22 689 0x4848 //TX_PREEQ_GAIN_MIC1_23 -690 0x251A //TX_PREEQ_BIN_MIC1_0 -691 0x0F0F //TX_PREEQ_BIN_MIC1_1 -692 0x0C08 //TX_PREEQ_BIN_MIC1_2 -693 0x0700 //TX_PREEQ_BIN_MIC1_3 -694 0x0000 //TX_PREEQ_BIN_MIC1_4 -695 0x0000 //TX_PREEQ_BIN_MIC1_5 -696 0x0000 //TX_PREEQ_BIN_MIC1_6 -697 0x0000 //TX_PREEQ_BIN_MIC1_7 -698 0x0000 //TX_PREEQ_BIN_MIC1_8 -699 0x0000 //TX_PREEQ_BIN_MIC1_9 +690 0x0202 //TX_PREEQ_BIN_MIC1_0 +691 0x0203 //TX_PREEQ_BIN_MIC1_1 +692 0x0303 //TX_PREEQ_BIN_MIC1_2 +693 0x0304 //TX_PREEQ_BIN_MIC1_3 +694 0x0405 //TX_PREEQ_BIN_MIC1_4 +695 0x0506 //TX_PREEQ_BIN_MIC1_5 +696 0x0708 //TX_PREEQ_BIN_MIC1_6 +697 0x090A //TX_PREEQ_BIN_MIC1_7 +698 0x0B0C //TX_PREEQ_BIN_MIC1_8 +699 0x0D0E //TX_PREEQ_BIN_MIC1_9 700 0x0000 //TX_PREEQ_BIN_MIC1_10 701 0x0000 //TX_PREEQ_BIN_MIC1_11 702 0x0000 //TX_PREEQ_BIN_MIC1_12 @@ -21795,7 +32787,7 @@ 736 0x4848 //TX_PREEQ_GAIN_MIC2_21 737 0x4848 //TX_PREEQ_GAIN_MIC2_22 738 0x4848 //TX_PREEQ_GAIN_MIC2_23 -739 0x7800 //TX_PREEQ_BIN_MIC2_0 +739 0x0000 //TX_PREEQ_BIN_MIC2_0 740 0x0000 //TX_PREEQ_BIN_MIC2_1 741 0x0000 //TX_PREEQ_BIN_MIC2_2 742 0x0000 //TX_PREEQ_BIN_MIC2_3 @@ -21847,7 +32839,7 @@ 788 0x7EB8 //TX_TDDRC_ALPHA_DWN_02 789 0x7EB8 //TX_TDDRC_ALPHA_DWN_03 790 0x7EB8 //TX_TDDRC_ALPHA_DWN_04 -791 0x7FFF //TX_TDDRC_TD_DRC_LIMIT +791 0x7214 //TX_TDDRC_TD_DRC_LIMIT 792 0x0800 //TX_TDDRC_POST_LIMIT_GAIN 793 0x0000 //TX_TDDRC_RESRV_0 794 0x0000 //TX_TDDRC_RESRV_1 @@ -21914,15 +32906,15 @@ 855 0x0010 //TX_TDDRC_THRD_1 856 0x1800 //TX_TDDRC_THRD_2 857 0x1800 //TX_TDDRC_THRD_3 -858 0x6000 //TX_TDDRC_SLANT_0 -859 0x6000 //TX_TDDRC_SLANT_1 +858 0x7FFF //TX_TDDRC_SLANT_0 +859 0x7FFF //TX_TDDRC_SLANT_1 860 0x4000 //TX_TDDRC_ALPHA_UP_00 861 0x6000 //TX_TDDRC_ALPHA_DWN_00 862 0x0000 //TX_TDDRC_HMNC_FLAG 863 0x199A //TX_TDDRC_HMNC_GAIN 864 0x0000 //TX_TDDRC_SMT_FLAG 865 0x0CCD //TX_TDDRC_SMT_W -866 0x0BE3 //TX_TDDRC_DRC_GAIN +866 0x0A00 //TX_TDDRC_DRC_GAIN 867 0x7FFF //TX_TDDRC_LMT_THRD 868 0x0000 //TX_TDDRC_LMT_ALPHA 869 0x0000 //TX_TFMASKLTH @@ -21947,14 +32939,79 @@ 888 0x0028 //TX_FASTNS_ARSPC_TH 889 0xC000 //TX_FASTNS_MASK5_TH 890 0x4848 //TX_POSTSSA_MIN_G_VR_MASK -891 0x7FFF //TX_A_LESSCUT_RTO_MASK +891 0x4000 //TX_A_LESSCUT_RTO_MASK 892 0x1770 //TX_FASTNS_NOISETH 893 0xC000 //TX_FASTNS_SSA_THLFL 894 0xC000 //TX_FASTNS_SSA_THHFL 895 0xCCCC //TX_FASTNS_SSA_THLFH 896 0xD999 //TX_FASTNS_SSA_THHFH +897 0x2339 //TX_SENDFUNC_REG_MICMUTE +898 0x0021 //TX_SENDFUNC_REG_MICMUTE1 +899 0x02BC //TX_MICMUTE_RATIO_THR +900 0x0140 //TX_MICMUTE_AMP_THR +901 0x0004 //TX_MICMUTE_HPF_IND +902 0x00C0 //TX_MICMUTE_LOG_EYR_TH +903 0x0008 //TX_MICMUTE_CVG_TIME +904 0x0008 //TX_MICMUTE_RELEASE_TIME +905 0x01FE //TX_MIC_VOLUME_MIC0MUTE +906 0x0020 //TX_MICMUTE_EPD_OFFSET_0 +907 0x001E //TX_MICMUTE_FRQ_AEC_L +908 0x7999 //TX_MICMUTE_EAD_THR +909 0x7FFF //TX_MICMUTE_LAMBDA_CB_NLE +910 0x7FFF //TX_MICMUTE_LAMBDA_RE_EST +911 0x4000 //TX_DTD_THR1_MICMUTE_0 +912 0x7000 //TX_DTD_THR1_MICMUTE_1 +913 0x7FFF //TX_DTD_THR1_MICMUTE_2 +914 0x7FFF //TX_DTD_THR1_MICMUTE_3 +915 0x6CCC //TX_DTD_THR2_MICMUTE_0 +916 0x0400 //TX_MICMUTE_MIN_EQ_RE_EST_0 +917 0x0400 //TX_MICMUTE_MIN_EQ_RE_EST_1 +918 0x1000 //TX_MICMUTE_MIN_EQ_RE_EST_2 +919 0x7FFF //TX_MICMUTE_MIN_EQ_RE_EST_3 +920 0x7FFF //TX_MICMUTE_MIN_EQ_RE_EST_4 +921 0x4000 //TX_MICMUTE_C_POST_FLT +922 0x03E8 //TX_MICMUTE_DT_CUT_K +923 0x0001 //TX_MICMUTE_DT_CUT_THR +924 0x03E8 //TX_MICMUTE_DT_CUT_K2 +925 0x0001 //TX_MICMUTE_DT_CUT_THR2 +926 0x0064 //TX_MICMUTE_DT2_HOLD_N +927 0x1000 //TX_MICMUTE_RATIODTH_THCUT +928 0x1000 //TX_MICMUTE_B_POST_FLT_ECHOL +929 0x7FFF //TX_MICMUTE_B_POST_FLT_ECHOH +930 0x0400 //TX_MICMUTE_C_POST_FLT_MASK +931 0x7999 //TX_MICMUTE_RATIODTL_CUT_TH +932 0x0258 //TX_MICMUTE_DT_CUT_K1 +933 0x0800 //TX_MICMUTE_N2_SN_EST +934 0xFC00 //TX_MICMUTE_THR_SN_EST_0 +935 0x001C //TX_MICMUTE_MIN_G_CTRL_0 +936 0x6000 //TX_MICMUTE_A_POST_FILT_S_0 +937 0x7000 //TX_MICMUTE_B_POST_FILT_0 +938 0x2710 //TX_MIC1RUB_AMP_THR +939 0x0010 //TX_MIC1MUTE_RATIO_THR +940 0x0450 //TX_MIC1MUTE_AMP_THR +941 0x0008 //TX_MIC1MUTE_CVG_TIME +942 0x0008 //TX_MIC1MUTE_RELEASE_TIME +943 0x0000 //TX_AMS_RESRV_01 +944 0x0000 //TX_AMS_RESRV_02 +945 0x0000 //TX_AMS_RESRV_03 +946 0x0000 //TX_AMS_RESRV_04 +947 0x0000 //TX_AMS_RESRV_05 +948 0x0000 //TX_AMS_RESRV_06 +949 0x0000 //TX_AMS_RESRV_07 +950 0x0000 //TX_AMS_RESRV_08 +951 0x0000 //TX_AMS_RESRV_09 +952 0x0000 //TX_AMS_RESRV_10 +953 0x0000 //TX_AMS_RESRV_11 +954 0x0000 //TX_AMS_RESRV_12 +955 0x0000 //TX_AMS_RESRV_13 +956 0x0000 //TX_AMS_RESRV_14 +957 0x0000 //TX_AMS_RESRV_15 +958 0x0000 //TX_AMS_RESRV_16 +959 0x0000 //TX_AMS_RESRV_17 +960 0x0000 //TX_AMS_RESRV_18 +961 0x0000 //TX_AMS_RESRV_19 #RX -0 0x002C //RX_RECVFUNC_MODE_0 +0 0x202C //RX_RECVFUNC_MODE_0 1 0x0000 //RX_RECVFUNC_MODE_1 2 0x0000 //RX_SAMPLINGFREQ_SIG 3 0x0000 //RX_SAMPLINGFREQ_PROC @@ -22804,18 +33861,869 @@ 110 0x0000 //RX_FDDRC_RESRV_0 129 0x0100 //RX_SPK_VOL 130 0x0000 //RX_VOL_RESRV_0 +#RX 2 +157 0x202C //RX_RECVFUNC_MODE_0 +158 0x0000 //RX_RECVFUNC_MODE_1 +159 0x0000 //RX_SAMPLINGFREQ_SIG +160 0x0000 //RX_SAMPLINGFREQ_PROC +161 0x000A //RX_FRAME_SZ +162 0x0000 //RX_DELAY_OPT +163 0x3000 //RX_TDDRC_ALPHA_UP_1 +164 0x3000 //RX_TDDRC_ALPHA_UP_2 +165 0x3000 //RX_TDDRC_ALPHA_UP_3 +166 0x3000 //RX_TDDRC_ALPHA_UP_4 +167 0x0800 //RX_PGA +168 0x7FFF //RX_A_HP +169 0x0000 //RX_B_PE +170 0x3800 //RX_THR_PITCH_DET_0 +171 0x3000 //RX_THR_PITCH_DET_1 +172 0x2800 //RX_THR_PITCH_DET_2 +173 0x0008 //RX_PITCH_BFR_LEN +174 0x0003 //RX_SBD_PITCH_DET +175 0x0100 //RX_PP_RESRV_0 +176 0x0020 //RX_PP_RESRV_1 +177 0x0600 //RX_N_SN_EST +178 0x000C //RX_N2_SN_EST +179 0x0010 //RX_NS_LVL_CTRL +180 0xF800 //RX_THR_SN_EST +181 0x7CCD //RX_LAMBDA_PFILT +182 0x000A //RX_FENS_RESRV_0 +183 0x0190 //RX_FENS_RESRV_1 +184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +187 0x0002 //RX_EXTRA_NS_L +188 0x0800 //RX_EXTRA_NS_A +189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +190 0x7FFF //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +192 0x199A //RX_A_POST_FLT +193 0x0000 //RX_LMT_THRD +194 0x4000 //RX_LMT_ALPHA +195 0x0014 //RX_FDEQ_SUBNUM +196 0x4848 //RX_FDEQ_GAIN_0 +197 0x4848 //RX_FDEQ_GAIN_1 +198 0x4848 //RX_FDEQ_GAIN_2 +199 0x4848 //RX_FDEQ_GAIN_3 +200 0x4848 //RX_FDEQ_GAIN_4 +201 0x4848 //RX_FDEQ_GAIN_5 +202 0x4848 //RX_FDEQ_GAIN_6 +203 0x4848 //RX_FDEQ_GAIN_7 +204 0x4848 //RX_FDEQ_GAIN_8 +205 0x4848 //RX_FDEQ_GAIN_9 +206 0x4848 //RX_FDEQ_GAIN_10 +207 0x4848 //RX_FDEQ_GAIN_11 +208 0x4848 //RX_FDEQ_GAIN_12 +209 0x4848 //RX_FDEQ_GAIN_13 +210 0x4848 //RX_FDEQ_GAIN_14 +211 0x4848 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0202 //RX_FDEQ_BIN_0 +221 0x0203 //RX_FDEQ_BIN_1 +222 0x0303 //RX_FDEQ_BIN_2 +223 0x0304 //RX_FDEQ_BIN_3 +224 0x0405 //RX_FDEQ_BIN_4 +225 0x0506 //RX_FDEQ_BIN_5 +226 0x0708 //RX_FDEQ_BIN_6 +227 0x090A //RX_FDEQ_BIN_7 +228 0x0B0C //RX_FDEQ_BIN_8 +229 0x0D08 //RX_FDEQ_BIN_9 +230 0x0000 //RX_FDEQ_BIN_10 +231 0x0000 //RX_FDEQ_BIN_11 +232 0x0000 //RX_FDEQ_BIN_12 +233 0x0000 //RX_FDEQ_BIN_13 +234 0x0000 //RX_FDEQ_BIN_14 +235 0x0000 //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x4000 //RX_FDEQ_RESRV_0 +245 0x0320 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0030 //RX_FDDRC_BAND_MARGIN_1 +248 0x0050 //RX_FDDRC_BAND_MARGIN_2 +249 0x0080 //RX_FDDRC_BAND_MARGIN_3 +250 0x0007 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x5000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x6400 //RX_FDDRC_THRD_3_2 +258 0x6400 //RX_FDDRC_THRD_3_3 +259 0x2000 //RX_FDDRC_SLANT_0_0 +260 0x2000 //RX_FDDRC_SLANT_0_1 +261 0x2000 //RX_FDDRC_SLANT_0_2 +262 0x2000 //RX_FDDRC_SLANT_0_3 +263 0x5333 //RX_FDDRC_SLANT_1_0 +264 0x5333 //RX_FDDRC_SLANT_1_1 +265 0x5333 //RX_FDDRC_SLANT_1_2 +266 0x5333 //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +268 0x0002 //RX_FILTINDX +269 0x0000 //RX_TDDRC_THRD_0 +270 0x0000 //RX_TDDRC_THRD_1 +271 0x2000 //RX_TDDRC_THRD_2 +272 0x3000 //RX_TDDRC_THRD_3 +273 0x0800 //RX_TDDRC_SLANT_0 +274 0x7EB8 //RX_TDDRC_SLANT_1 +275 0x3000 //RX_TDDRC_ALPHA_UP_0 +276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x199A //RX_TDDRC_HMNC_GAIN +279 0x0001 //RX_TDDRC_SMT_FLAG +280 0x0CCD //RX_TDDRC_SMT_W +281 0x0200 //RX_TDDRC_DRC_GAIN +282 0x7C00 //RX_LAMBDA_PKA_FP +283 0x2000 //RX_TPKA_FP +284 0x2000 //RX_MIN_G_FP +285 0x0080 //RX_MAX_G_FP +286 0x000B //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 +288 0x0000 //RX_MAXLEVEL_CNG +289 0x3000 //RX_BWE_UV_TH +290 0x3000 //RX_BWE_UV_TH2 +291 0x1800 //RX_BWE_UV_TH3 +292 0x1000 //RX_BWE_V_TH +293 0x04CD //RX_BWE_GAIN1_V_TH1 +294 0x0F33 //RX_BWE_GAIN1_V_TH2 +295 0x7333 //RX_BWE_UV_EQ +296 0x199A //RX_BWE_V_EQ +297 0x7333 //RX_BWE_TONE_TH +298 0x0004 //RX_BWE_UV_HOLD_T +299 0x6CCD //RX_BWE_GAIN2_ALPHA +300 0x799A //RX_BWE_GAIN3_ALPHA +301 0x001E //RX_BWE_CUTOFF +302 0x3000 //RX_BWE_GAINFILL +303 0x3200 //RX_BWE_MAXTH_TONE +304 0x2000 //RX_BWE_EQ_0 +305 0x2000 //RX_BWE_EQ_1 +306 0x2000 //RX_BWE_EQ_2 +307 0x2000 //RX_BWE_EQ_3 +308 0x2000 //RX_BWE_EQ_4 +309 0x2000 //RX_BWE_EQ_5 +310 0x2000 //RX_BWE_EQ_6 +311 0x0000 //RX_BWE_RESRV_0 +312 0x0000 //RX_BWE_RESRV_1 +313 0x0000 //RX_BWE_RESRV_2 +#VOL 0 +163 0x3000 //RX_TDDRC_ALPHA_UP_1 +164 0x3000 //RX_TDDRC_ALPHA_UP_2 +165 0x3000 //RX_TDDRC_ALPHA_UP_3 +166 0x3000 //RX_TDDRC_ALPHA_UP_4 +184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +190 0x7FFF //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +269 0x0000 //RX_TDDRC_THRD_0 +270 0x0000 //RX_TDDRC_THRD_1 +271 0x2000 //RX_TDDRC_THRD_2 +272 0x3000 //RX_TDDRC_THRD_3 +273 0x0800 //RX_TDDRC_SLANT_0 +274 0x7EB8 //RX_TDDRC_SLANT_1 +275 0x3000 //RX_TDDRC_ALPHA_UP_0 +276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x199A //RX_TDDRC_HMNC_GAIN +279 0x0001 //RX_TDDRC_SMT_FLAG +280 0x0CCD //RX_TDDRC_SMT_W +281 0x0200 //RX_TDDRC_DRC_GAIN +195 0x0014 //RX_FDEQ_SUBNUM +196 0x4848 //RX_FDEQ_GAIN_0 +197 0x4848 //RX_FDEQ_GAIN_1 +198 0x4848 //RX_FDEQ_GAIN_2 +199 0x4848 //RX_FDEQ_GAIN_3 +200 0x4848 //RX_FDEQ_GAIN_4 +201 0x4848 //RX_FDEQ_GAIN_5 +202 0x4848 //RX_FDEQ_GAIN_6 +203 0x4848 //RX_FDEQ_GAIN_7 +204 0x4848 //RX_FDEQ_GAIN_8 +205 0x4848 //RX_FDEQ_GAIN_9 +206 0x4848 //RX_FDEQ_GAIN_10 +207 0x4848 //RX_FDEQ_GAIN_11 +208 0x4848 //RX_FDEQ_GAIN_12 +209 0x4848 //RX_FDEQ_GAIN_13 +210 0x4848 //RX_FDEQ_GAIN_14 +211 0x4848 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0202 //RX_FDEQ_BIN_0 +221 0x0203 //RX_FDEQ_BIN_1 +222 0x0303 //RX_FDEQ_BIN_2 +223 0x0304 //RX_FDEQ_BIN_3 +224 0x0405 //RX_FDEQ_BIN_4 +225 0x0506 //RX_FDEQ_BIN_5 +226 0x0708 //RX_FDEQ_BIN_6 +227 0x090A //RX_FDEQ_BIN_7 +228 0x0B0C //RX_FDEQ_BIN_8 +229 0x0D08 //RX_FDEQ_BIN_9 +230 0x0000 //RX_FDEQ_BIN_10 +231 0x0000 //RX_FDEQ_BIN_11 +232 0x0000 //RX_FDEQ_BIN_12 +233 0x0000 //RX_FDEQ_BIN_13 +234 0x0000 //RX_FDEQ_BIN_14 +235 0x0000 //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x4000 //RX_FDEQ_RESRV_0 +245 0x0320 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0030 //RX_FDDRC_BAND_MARGIN_1 +248 0x0050 //RX_FDDRC_BAND_MARGIN_2 +249 0x0080 //RX_FDDRC_BAND_MARGIN_3 +250 0x0007 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x5000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x6400 //RX_FDDRC_THRD_3_2 +258 0x6400 //RX_FDDRC_THRD_3_3 +259 0x2000 //RX_FDDRC_SLANT_0_0 +260 0x2000 //RX_FDDRC_SLANT_0_1 +261 0x2000 //RX_FDDRC_SLANT_0_2 +262 0x2000 //RX_FDDRC_SLANT_0_3 +263 0x5333 //RX_FDDRC_SLANT_1_0 +264 0x5333 //RX_FDDRC_SLANT_1_1 +265 0x5333 //RX_FDDRC_SLANT_1_2 +266 0x5333 //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +286 0x000B //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 +#VOL 1 +163 0x3000 //RX_TDDRC_ALPHA_UP_1 +164 0x3000 //RX_TDDRC_ALPHA_UP_2 +165 0x3000 //RX_TDDRC_ALPHA_UP_3 +166 0x3000 //RX_TDDRC_ALPHA_UP_4 +184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +190 0x7FFF //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +269 0x0000 //RX_TDDRC_THRD_0 +270 0x0000 //RX_TDDRC_THRD_1 +271 0x2000 //RX_TDDRC_THRD_2 +272 0x3000 //RX_TDDRC_THRD_3 +273 0x0800 //RX_TDDRC_SLANT_0 +274 0x7EB8 //RX_TDDRC_SLANT_1 +275 0x3000 //RX_TDDRC_ALPHA_UP_0 +276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x199A //RX_TDDRC_HMNC_GAIN +279 0x0001 //RX_TDDRC_SMT_FLAG +280 0x0CCD //RX_TDDRC_SMT_W +281 0x0200 //RX_TDDRC_DRC_GAIN +195 0x0014 //RX_FDEQ_SUBNUM +196 0x4848 //RX_FDEQ_GAIN_0 +197 0x4848 //RX_FDEQ_GAIN_1 +198 0x4848 //RX_FDEQ_GAIN_2 +199 0x4848 //RX_FDEQ_GAIN_3 +200 0x4848 //RX_FDEQ_GAIN_4 +201 0x4848 //RX_FDEQ_GAIN_5 +202 0x4848 //RX_FDEQ_GAIN_6 +203 0x4848 //RX_FDEQ_GAIN_7 +204 0x4848 //RX_FDEQ_GAIN_8 +205 0x4848 //RX_FDEQ_GAIN_9 +206 0x4848 //RX_FDEQ_GAIN_10 +207 0x4848 //RX_FDEQ_GAIN_11 +208 0x4848 //RX_FDEQ_GAIN_12 +209 0x4848 //RX_FDEQ_GAIN_13 +210 0x4848 //RX_FDEQ_GAIN_14 +211 0x4848 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0202 //RX_FDEQ_BIN_0 +221 0x0203 //RX_FDEQ_BIN_1 +222 0x0303 //RX_FDEQ_BIN_2 +223 0x0304 //RX_FDEQ_BIN_3 +224 0x0405 //RX_FDEQ_BIN_4 +225 0x0506 //RX_FDEQ_BIN_5 +226 0x0708 //RX_FDEQ_BIN_6 +227 0x090A //RX_FDEQ_BIN_7 +228 0x0B0C //RX_FDEQ_BIN_8 +229 0x0D08 //RX_FDEQ_BIN_9 +230 0x0000 //RX_FDEQ_BIN_10 +231 0x0000 //RX_FDEQ_BIN_11 +232 0x0000 //RX_FDEQ_BIN_12 +233 0x0000 //RX_FDEQ_BIN_13 +234 0x0000 //RX_FDEQ_BIN_14 +235 0x0000 //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x4000 //RX_FDEQ_RESRV_0 +245 0x0320 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0030 //RX_FDDRC_BAND_MARGIN_1 +248 0x0050 //RX_FDDRC_BAND_MARGIN_2 +249 0x0080 //RX_FDDRC_BAND_MARGIN_3 +250 0x0007 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x5000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x6400 //RX_FDDRC_THRD_3_2 +258 0x6400 //RX_FDDRC_THRD_3_3 +259 0x2000 //RX_FDDRC_SLANT_0_0 +260 0x2000 //RX_FDDRC_SLANT_0_1 +261 0x2000 //RX_FDDRC_SLANT_0_2 +262 0x2000 //RX_FDDRC_SLANT_0_3 +263 0x5333 //RX_FDDRC_SLANT_1_0 +264 0x5333 //RX_FDDRC_SLANT_1_1 +265 0x5333 //RX_FDDRC_SLANT_1_2 +266 0x5333 //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +286 0x0013 //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 +#VOL 2 +163 0x3000 //RX_TDDRC_ALPHA_UP_1 +164 0x3000 //RX_TDDRC_ALPHA_UP_2 +165 0x3000 //RX_TDDRC_ALPHA_UP_3 +166 0x3000 //RX_TDDRC_ALPHA_UP_4 +184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +190 0x7FFF //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +269 0x0000 //RX_TDDRC_THRD_0 +270 0x0000 //RX_TDDRC_THRD_1 +271 0x2000 //RX_TDDRC_THRD_2 +272 0x3000 //RX_TDDRC_THRD_3 +273 0x0800 //RX_TDDRC_SLANT_0 +274 0x7EB8 //RX_TDDRC_SLANT_1 +275 0x3000 //RX_TDDRC_ALPHA_UP_0 +276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x199A //RX_TDDRC_HMNC_GAIN +279 0x0001 //RX_TDDRC_SMT_FLAG +280 0x0CCD //RX_TDDRC_SMT_W +281 0x0200 //RX_TDDRC_DRC_GAIN +195 0x0014 //RX_FDEQ_SUBNUM +196 0x4848 //RX_FDEQ_GAIN_0 +197 0x4848 //RX_FDEQ_GAIN_1 +198 0x4848 //RX_FDEQ_GAIN_2 +199 0x4848 //RX_FDEQ_GAIN_3 +200 0x4848 //RX_FDEQ_GAIN_4 +201 0x4848 //RX_FDEQ_GAIN_5 +202 0x4848 //RX_FDEQ_GAIN_6 +203 0x4848 //RX_FDEQ_GAIN_7 +204 0x4848 //RX_FDEQ_GAIN_8 +205 0x4848 //RX_FDEQ_GAIN_9 +206 0x4848 //RX_FDEQ_GAIN_10 +207 0x4848 //RX_FDEQ_GAIN_11 +208 0x4848 //RX_FDEQ_GAIN_12 +209 0x4848 //RX_FDEQ_GAIN_13 +210 0x4848 //RX_FDEQ_GAIN_14 +211 0x4848 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0202 //RX_FDEQ_BIN_0 +221 0x0203 //RX_FDEQ_BIN_1 +222 0x0303 //RX_FDEQ_BIN_2 +223 0x0304 //RX_FDEQ_BIN_3 +224 0x0405 //RX_FDEQ_BIN_4 +225 0x0506 //RX_FDEQ_BIN_5 +226 0x0708 //RX_FDEQ_BIN_6 +227 0x090A //RX_FDEQ_BIN_7 +228 0x0B0C //RX_FDEQ_BIN_8 +229 0x0D08 //RX_FDEQ_BIN_9 +230 0x0000 //RX_FDEQ_BIN_10 +231 0x0000 //RX_FDEQ_BIN_11 +232 0x0000 //RX_FDEQ_BIN_12 +233 0x0000 //RX_FDEQ_BIN_13 +234 0x0000 //RX_FDEQ_BIN_14 +235 0x0000 //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x4000 //RX_FDEQ_RESRV_0 +245 0x0320 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0030 //RX_FDDRC_BAND_MARGIN_1 +248 0x0050 //RX_FDDRC_BAND_MARGIN_2 +249 0x0080 //RX_FDDRC_BAND_MARGIN_3 +250 0x0007 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x5000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x6400 //RX_FDDRC_THRD_3_2 +258 0x6400 //RX_FDDRC_THRD_3_3 +259 0x2000 //RX_FDDRC_SLANT_0_0 +260 0x2000 //RX_FDDRC_SLANT_0_1 +261 0x2000 //RX_FDDRC_SLANT_0_2 +262 0x2000 //RX_FDDRC_SLANT_0_3 +263 0x5333 //RX_FDDRC_SLANT_1_0 +264 0x5333 //RX_FDDRC_SLANT_1_1 +265 0x5333 //RX_FDDRC_SLANT_1_2 +266 0x5333 //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +286 0x0020 //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 +#VOL 3 +163 0x3000 //RX_TDDRC_ALPHA_UP_1 +164 0x3000 //RX_TDDRC_ALPHA_UP_2 +165 0x3000 //RX_TDDRC_ALPHA_UP_3 +166 0x3000 //RX_TDDRC_ALPHA_UP_4 +184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +190 0x7FFF //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +269 0x0000 //RX_TDDRC_THRD_0 +270 0x0000 //RX_TDDRC_THRD_1 +271 0x2000 //RX_TDDRC_THRD_2 +272 0x3000 //RX_TDDRC_THRD_3 +273 0x0800 //RX_TDDRC_SLANT_0 +274 0x7EB8 //RX_TDDRC_SLANT_1 +275 0x3000 //RX_TDDRC_ALPHA_UP_0 +276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x199A //RX_TDDRC_HMNC_GAIN +279 0x0001 //RX_TDDRC_SMT_FLAG +280 0x0CCD //RX_TDDRC_SMT_W +281 0x0200 //RX_TDDRC_DRC_GAIN +195 0x0014 //RX_FDEQ_SUBNUM +196 0x4848 //RX_FDEQ_GAIN_0 +197 0x4848 //RX_FDEQ_GAIN_1 +198 0x4848 //RX_FDEQ_GAIN_2 +199 0x4848 //RX_FDEQ_GAIN_3 +200 0x4848 //RX_FDEQ_GAIN_4 +201 0x4848 //RX_FDEQ_GAIN_5 +202 0x4848 //RX_FDEQ_GAIN_6 +203 0x4848 //RX_FDEQ_GAIN_7 +204 0x4848 //RX_FDEQ_GAIN_8 +205 0x4848 //RX_FDEQ_GAIN_9 +206 0x4848 //RX_FDEQ_GAIN_10 +207 0x4848 //RX_FDEQ_GAIN_11 +208 0x4848 //RX_FDEQ_GAIN_12 +209 0x4848 //RX_FDEQ_GAIN_13 +210 0x4848 //RX_FDEQ_GAIN_14 +211 0x4848 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0202 //RX_FDEQ_BIN_0 +221 0x0203 //RX_FDEQ_BIN_1 +222 0x0303 //RX_FDEQ_BIN_2 +223 0x0304 //RX_FDEQ_BIN_3 +224 0x0405 //RX_FDEQ_BIN_4 +225 0x0506 //RX_FDEQ_BIN_5 +226 0x0708 //RX_FDEQ_BIN_6 +227 0x090A //RX_FDEQ_BIN_7 +228 0x0B0C //RX_FDEQ_BIN_8 +229 0x0D08 //RX_FDEQ_BIN_9 +230 0x0000 //RX_FDEQ_BIN_10 +231 0x0000 //RX_FDEQ_BIN_11 +232 0x0000 //RX_FDEQ_BIN_12 +233 0x0000 //RX_FDEQ_BIN_13 +234 0x0000 //RX_FDEQ_BIN_14 +235 0x0000 //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x4000 //RX_FDEQ_RESRV_0 +245 0x0320 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0030 //RX_FDDRC_BAND_MARGIN_1 +248 0x0050 //RX_FDDRC_BAND_MARGIN_2 +249 0x0080 //RX_FDDRC_BAND_MARGIN_3 +250 0x0007 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x5000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x6400 //RX_FDDRC_THRD_3_2 +258 0x6400 //RX_FDDRC_THRD_3_3 +259 0x2000 //RX_FDDRC_SLANT_0_0 +260 0x2000 //RX_FDDRC_SLANT_0_1 +261 0x2000 //RX_FDDRC_SLANT_0_2 +262 0x2000 //RX_FDDRC_SLANT_0_3 +263 0x5333 //RX_FDDRC_SLANT_1_0 +264 0x5333 //RX_FDDRC_SLANT_1_1 +265 0x5333 //RX_FDDRC_SLANT_1_2 +266 0x5333 //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +286 0x0036 //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 +#VOL 4 +163 0x3000 //RX_TDDRC_ALPHA_UP_1 +164 0x3000 //RX_TDDRC_ALPHA_UP_2 +165 0x3000 //RX_TDDRC_ALPHA_UP_3 +166 0x3000 //RX_TDDRC_ALPHA_UP_4 +184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +190 0x7FFF //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +269 0x0000 //RX_TDDRC_THRD_0 +270 0x0000 //RX_TDDRC_THRD_1 +271 0x2000 //RX_TDDRC_THRD_2 +272 0x3000 //RX_TDDRC_THRD_3 +273 0x0800 //RX_TDDRC_SLANT_0 +274 0x7EB8 //RX_TDDRC_SLANT_1 +275 0x3000 //RX_TDDRC_ALPHA_UP_0 +276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x199A //RX_TDDRC_HMNC_GAIN +279 0x0001 //RX_TDDRC_SMT_FLAG +280 0x0CCD //RX_TDDRC_SMT_W +281 0x0200 //RX_TDDRC_DRC_GAIN +195 0x0014 //RX_FDEQ_SUBNUM +196 0x4848 //RX_FDEQ_GAIN_0 +197 0x4848 //RX_FDEQ_GAIN_1 +198 0x4848 //RX_FDEQ_GAIN_2 +199 0x4848 //RX_FDEQ_GAIN_3 +200 0x4848 //RX_FDEQ_GAIN_4 +201 0x4848 //RX_FDEQ_GAIN_5 +202 0x4848 //RX_FDEQ_GAIN_6 +203 0x4848 //RX_FDEQ_GAIN_7 +204 0x4848 //RX_FDEQ_GAIN_8 +205 0x4848 //RX_FDEQ_GAIN_9 +206 0x4848 //RX_FDEQ_GAIN_10 +207 0x4848 //RX_FDEQ_GAIN_11 +208 0x4848 //RX_FDEQ_GAIN_12 +209 0x4848 //RX_FDEQ_GAIN_13 +210 0x4848 //RX_FDEQ_GAIN_14 +211 0x4848 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0202 //RX_FDEQ_BIN_0 +221 0x0203 //RX_FDEQ_BIN_1 +222 0x0303 //RX_FDEQ_BIN_2 +223 0x0304 //RX_FDEQ_BIN_3 +224 0x0405 //RX_FDEQ_BIN_4 +225 0x0506 //RX_FDEQ_BIN_5 +226 0x0708 //RX_FDEQ_BIN_6 +227 0x090A //RX_FDEQ_BIN_7 +228 0x0B0C //RX_FDEQ_BIN_8 +229 0x0D08 //RX_FDEQ_BIN_9 +230 0x0000 //RX_FDEQ_BIN_10 +231 0x0000 //RX_FDEQ_BIN_11 +232 0x0000 //RX_FDEQ_BIN_12 +233 0x0000 //RX_FDEQ_BIN_13 +234 0x0000 //RX_FDEQ_BIN_14 +235 0x0000 //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x4000 //RX_FDEQ_RESRV_0 +245 0x0320 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0030 //RX_FDDRC_BAND_MARGIN_1 +248 0x0050 //RX_FDDRC_BAND_MARGIN_2 +249 0x0080 //RX_FDDRC_BAND_MARGIN_3 +250 0x0007 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x5000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x6400 //RX_FDDRC_THRD_3_2 +258 0x6400 //RX_FDDRC_THRD_3_3 +259 0x2000 //RX_FDDRC_SLANT_0_0 +260 0x2000 //RX_FDDRC_SLANT_0_1 +261 0x2000 //RX_FDDRC_SLANT_0_2 +262 0x2000 //RX_FDDRC_SLANT_0_3 +263 0x5333 //RX_FDDRC_SLANT_1_0 +264 0x5333 //RX_FDDRC_SLANT_1_1 +265 0x5333 //RX_FDDRC_SLANT_1_2 +266 0x5333 //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +286 0x005B //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 +#VOL 5 +163 0x3000 //RX_TDDRC_ALPHA_UP_1 +164 0x3000 //RX_TDDRC_ALPHA_UP_2 +165 0x3000 //RX_TDDRC_ALPHA_UP_3 +166 0x3000 //RX_TDDRC_ALPHA_UP_4 +184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +190 0x7FFF //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +269 0x0000 //RX_TDDRC_THRD_0 +270 0x0000 //RX_TDDRC_THRD_1 +271 0x2000 //RX_TDDRC_THRD_2 +272 0x3000 //RX_TDDRC_THRD_3 +273 0x0800 //RX_TDDRC_SLANT_0 +274 0x7EB8 //RX_TDDRC_SLANT_1 +275 0x3000 //RX_TDDRC_ALPHA_UP_0 +276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x199A //RX_TDDRC_HMNC_GAIN +279 0x0001 //RX_TDDRC_SMT_FLAG +280 0x0CCD //RX_TDDRC_SMT_W +281 0x0200 //RX_TDDRC_DRC_GAIN +195 0x0014 //RX_FDEQ_SUBNUM +196 0x4848 //RX_FDEQ_GAIN_0 +197 0x4848 //RX_FDEQ_GAIN_1 +198 0x4848 //RX_FDEQ_GAIN_2 +199 0x4848 //RX_FDEQ_GAIN_3 +200 0x4848 //RX_FDEQ_GAIN_4 +201 0x4848 //RX_FDEQ_GAIN_5 +202 0x4848 //RX_FDEQ_GAIN_6 +203 0x4848 //RX_FDEQ_GAIN_7 +204 0x4848 //RX_FDEQ_GAIN_8 +205 0x4848 //RX_FDEQ_GAIN_9 +206 0x4848 //RX_FDEQ_GAIN_10 +207 0x4848 //RX_FDEQ_GAIN_11 +208 0x4848 //RX_FDEQ_GAIN_12 +209 0x4848 //RX_FDEQ_GAIN_13 +210 0x4848 //RX_FDEQ_GAIN_14 +211 0x4848 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0202 //RX_FDEQ_BIN_0 +221 0x0203 //RX_FDEQ_BIN_1 +222 0x0303 //RX_FDEQ_BIN_2 +223 0x0304 //RX_FDEQ_BIN_3 +224 0x0405 //RX_FDEQ_BIN_4 +225 0x0506 //RX_FDEQ_BIN_5 +226 0x0708 //RX_FDEQ_BIN_6 +227 0x090A //RX_FDEQ_BIN_7 +228 0x0B0C //RX_FDEQ_BIN_8 +229 0x0D08 //RX_FDEQ_BIN_9 +230 0x0000 //RX_FDEQ_BIN_10 +231 0x0000 //RX_FDEQ_BIN_11 +232 0x0000 //RX_FDEQ_BIN_12 +233 0x0000 //RX_FDEQ_BIN_13 +234 0x0000 //RX_FDEQ_BIN_14 +235 0x0000 //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x4000 //RX_FDEQ_RESRV_0 +245 0x0320 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0030 //RX_FDDRC_BAND_MARGIN_1 +248 0x0050 //RX_FDDRC_BAND_MARGIN_2 +249 0x0080 //RX_FDDRC_BAND_MARGIN_3 +250 0x0007 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x5000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x6400 //RX_FDDRC_THRD_3_2 +258 0x6400 //RX_FDDRC_THRD_3_3 +259 0x2000 //RX_FDDRC_SLANT_0_0 +260 0x2000 //RX_FDDRC_SLANT_0_1 +261 0x2000 //RX_FDDRC_SLANT_0_2 +262 0x2000 //RX_FDDRC_SLANT_0_3 +263 0x5333 //RX_FDDRC_SLANT_1_0 +264 0x5333 //RX_FDDRC_SLANT_1_1 +265 0x5333 //RX_FDDRC_SLANT_1_2 +266 0x5333 //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +286 0x0099 //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 +#VOL 6 +163 0x3000 //RX_TDDRC_ALPHA_UP_1 +164 0x3000 //RX_TDDRC_ALPHA_UP_2 +165 0x3000 //RX_TDDRC_ALPHA_UP_3 +166 0x3000 //RX_TDDRC_ALPHA_UP_4 +184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +190 0x7FFF //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +269 0x0000 //RX_TDDRC_THRD_0 +270 0x0000 //RX_TDDRC_THRD_1 +271 0x2000 //RX_TDDRC_THRD_2 +272 0x3000 //RX_TDDRC_THRD_3 +273 0x0800 //RX_TDDRC_SLANT_0 +274 0x7EB8 //RX_TDDRC_SLANT_1 +275 0x3000 //RX_TDDRC_ALPHA_UP_0 +276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x199A //RX_TDDRC_HMNC_GAIN +279 0x0001 //RX_TDDRC_SMT_FLAG +280 0x0CCD //RX_TDDRC_SMT_W +281 0x0200 //RX_TDDRC_DRC_GAIN +195 0x0014 //RX_FDEQ_SUBNUM +196 0x4848 //RX_FDEQ_GAIN_0 +197 0x4848 //RX_FDEQ_GAIN_1 +198 0x4848 //RX_FDEQ_GAIN_2 +199 0x4848 //RX_FDEQ_GAIN_3 +200 0x4848 //RX_FDEQ_GAIN_4 +201 0x4848 //RX_FDEQ_GAIN_5 +202 0x4848 //RX_FDEQ_GAIN_6 +203 0x4848 //RX_FDEQ_GAIN_7 +204 0x4848 //RX_FDEQ_GAIN_8 +205 0x4848 //RX_FDEQ_GAIN_9 +206 0x4848 //RX_FDEQ_GAIN_10 +207 0x4848 //RX_FDEQ_GAIN_11 +208 0x4848 //RX_FDEQ_GAIN_12 +209 0x4848 //RX_FDEQ_GAIN_13 +210 0x4848 //RX_FDEQ_GAIN_14 +211 0x4848 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0202 //RX_FDEQ_BIN_0 +221 0x0203 //RX_FDEQ_BIN_1 +222 0x0303 //RX_FDEQ_BIN_2 +223 0x0304 //RX_FDEQ_BIN_3 +224 0x0405 //RX_FDEQ_BIN_4 +225 0x0506 //RX_FDEQ_BIN_5 +226 0x0708 //RX_FDEQ_BIN_6 +227 0x090A //RX_FDEQ_BIN_7 +228 0x0B0C //RX_FDEQ_BIN_8 +229 0x0D08 //RX_FDEQ_BIN_9 +230 0x0000 //RX_FDEQ_BIN_10 +231 0x0000 //RX_FDEQ_BIN_11 +232 0x0000 //RX_FDEQ_BIN_12 +233 0x0000 //RX_FDEQ_BIN_13 +234 0x0000 //RX_FDEQ_BIN_14 +235 0x0000 //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x4000 //RX_FDEQ_RESRV_0 +245 0x0320 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0030 //RX_FDDRC_BAND_MARGIN_1 +248 0x0050 //RX_FDDRC_BAND_MARGIN_2 +249 0x0080 //RX_FDDRC_BAND_MARGIN_3 +250 0x0007 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x5000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x6400 //RX_FDDRC_THRD_3_2 +258 0x6400 //RX_FDDRC_THRD_3_3 +259 0x2000 //RX_FDDRC_SLANT_0_0 +260 0x2000 //RX_FDDRC_SLANT_0_1 +261 0x2000 //RX_FDDRC_SLANT_0_2 +262 0x2000 //RX_FDDRC_SLANT_0_3 +263 0x5333 //RX_FDDRC_SLANT_1_0 +264 0x5333 //RX_FDDRC_SLANT_1_1 +265 0x5333 //RX_FDDRC_SLANT_1_2 +266 0x5333 //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +286 0x0100 //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 #CASE_NAME HEADSET-GOOGLE_CONDOR_HEADPHONE-VOICE_GENERIC-WB -#PARAM_MODE FULL -#PARAM_TYPE TX+RX -#TOTAL_CUSTOM_STEP 7 +#PARAM_MODE Full +#PARAM_TYPE TX+2RX +#TOTAL_CUSTOM_STEP 7+7 #TX 0 0x0001 //TX_OPERATION_MODE_0 1 0x0001 //TX_OPERATION_MODE_1 2 0x0033 //TX_PATCH_REG -3 0x2F7C //TX_SENDFUNC_MODE_0 +3 0x6F7C //TX_SENDFUNC_MODE_0 4 0x0001 //TX_SENDFUNC_MODE_1 -5 0x0003 //TX_NUM_MIC +5 0x0002 //TX_NUM_MIC 6 0x0001 //TX_SAMPLINGFREQ_SIG 7 0x0001 //TX_SAMPLINGFREQ_PROC 8 0x000A //TX_FRAME_SZ_SIG @@ -22831,8 +34739,8 @@ 18 0x0000 //TX_SYS_RESRV_2 19 0x0000 //TX_SYS_RESRV_3 20 0x0000 //TX_DIST2REF0 -21 0x00A4 //TX_DIST2REF1 -22 0x0017 //TX_DIST2REF_02 +21 0x009D //TX_DIST2REF1 +22 0x0010 //TX_DIST2REF_02 23 0x0000 //TX_DIST2REF_03 24 0x0000 //TX_DIST2REF_04 25 0x0000 //TX_DIST2REF_05 @@ -22923,8 +34831,8 @@ 110 0x0000 //TX_ADCS_MASK 111 0x04D0 //TX_ADCS_GAIN 112 0x4000 //TX_NFC_GAINFAC -113 0x0000 //TX_MAINMIC_BLKFACTOR -114 0x0000 //TX_REFMIC_BLKFACTOR +113 0x0004 //TX_MAINMIC_BLKFACTOR +114 0x0004 //TX_REFMIC_BLKFACTOR 115 0x0000 //TX_BLMIC_BLKFACTOR 116 0x0000 //TX_BRMIC_BLKFACTOR 117 0x0031 //TX_MICBLK_START_BIN @@ -22962,7 +34870,7 @@ 149 0x0800 //TX_AEC_REF_GAIN_2 150 0x6800 //TX_EAD_THR 151 0x1000 //TX_THR_RE_EST -152 0x0200 //TX_MIN_EQ_RE_EST_0 +152 0x3000 //TX_MIN_EQ_RE_EST_0 153 0x0100 //TX_MIN_EQ_RE_EST_1 154 0x0200 //TX_MIN_EQ_RE_EST_2 155 0x0200 //TX_MIN_EQ_RE_EST_3 @@ -22975,13 +34883,13 @@ 162 0x1000 //TX_MIN_EQ_RE_EST_10 163 0x1000 //TX_MIN_EQ_RE_EST_11 164 0x1000 //TX_MIN_EQ_RE_EST_12 -165 0x4000 //TX_LAMBDA_RE_EST +165 0x1B00 //TX_LAMBDA_RE_EST 166 0x4000 //TX_LAMBDA_CB_NLE 167 0x7FFF //TX_C_POST_FLT 168 0x5000 //TX_GAIN_NP 169 0x0180 //TX_SE_HOLD_N 170 0x00C8 //TX_DT_HOLD_N -171 0x05DC //TX_DT2_HOLD_N +171 0x0020 //TX_DT2_HOLD_N 172 0x6666 //TX_AEC_RESRV_0 173 0x0000 //TX_AEC_RESRV_1 174 0x0014 //TX_AEC_RESRV_2 @@ -23007,15 +34915,15 @@ 194 0x0000 //TX_NORMENERTH 195 0x0000 //TX_NORMENERHIGHTH 196 0x0000 //TX_NORMENERHIGHTHL -197 0x6590 //TX_DTD_THR1_0 -198 0x6590 //TX_DTD_THR1_1 -199 0x6590 //TX_DTD_THR1_2 +197 0x76D0 //TX_DTD_THR1_0 +198 0x76D0 //TX_DTD_THR1_1 +199 0x76D0 //TX_DTD_THR1_2 200 0x7FF0 //TX_DTD_THR1_3 201 0x7FF0 //TX_DTD_THR1_4 202 0x7FF0 //TX_DTD_THR1_5 203 0x7FF0 //TX_DTD_THR1_6 -204 0x5000 //TX_DTD_THR2_0 -205 0x5000 //TX_DTD_THR2_1 +204 0x7E00 //TX_DTD_THR2_0 +205 0x7E00 //TX_DTD_THR2_1 206 0x5000 //TX_DTD_THR2_2 207 0x5000 //TX_DTD_THR2_3 208 0x5000 //TX_DTD_THR2_4 @@ -23023,8 +34931,8 @@ 210 0x5000 //TX_DTD_THR2_6 211 0x7FFF //TX_DTD_THR3 212 0x0000 //TX_SPK_CUT_K -213 0x07D0 //TX_DT_CUT_K -214 0x0100 //TX_DT_CUT_THR +213 0x03E8 //TX_DT_CUT_K +214 0x0010 //TX_DT_CUT_THR 215 0x04EB //TX_COMFORT_G 216 0x01F4 //TX_POWER_YOUT_TH 217 0x4000 //TX_FDPFGAINECHO @@ -23035,16 +34943,16 @@ 222 0x023E //TX_ADPT_STRICT_H 223 0x0BB8 //TX_RATIO_DT_L_TH_LOW 224 0x3A98 //TX_RATIO_DT_H_TH_LOW -225 0x1770 //TX_RATIO_DT_L_TH_HIGH -226 0x4E20 //TX_RATIO_DT_H_TH_HIGH -227 0x09C4 //TX_RATIO_DT_L0_TH -228 0x2000 //TX_B_POST_FILT_ECHO_L +225 0x044C //TX_RATIO_DT_L_TH_HIGH +226 0x7800 //TX_RATIO_DT_H_TH_HIGH +227 0x0001 //TX_RATIO_DT_L0_TH +228 0x7FFF //TX_B_POST_FILT_ECHO_L 229 0x7FFF //TX_B_POST_FILT_ECHO_H 230 0x0200 //TX_MIN_G_CTRL_ECHO 231 0x1000 //TX_B_LESSCUT_RTO_ECHO 232 0x0000 //TX_EPD_OFFSET_00 233 0x0000 //TX_EPD_OFFST_01 -234 0x1388 //TX_RATIO_DT_L0_TH_HIGH +234 0x03E8 //TX_RATIO_DT_L0_TH_HIGH 235 0x7FFF //TX_RATIO_DT_H_TH_CUT 236 0x7FFF //TX_MIN_EQ_RE_EST_13 237 0x0000 //TX_DTD_THR1_7 @@ -23052,7 +34960,7 @@ 239 0x0800 //TX_DT_RESRV_7 240 0x0800 //TX_DT_RESRV_8 241 0x0000 //TX_DT_RESRV_9 -242 0xF800 //TX_THR_SN_EST_0 +242 0xFA00 //TX_THR_SN_EST_0 243 0xFA00 //TX_THR_SN_EST_1 244 0xFA00 //TX_THR_SN_EST_2 245 0xFB00 //TX_THR_SN_EST_3 @@ -23061,11 +34969,11 @@ 248 0xF800 //TX_THR_SN_EST_6 249 0xF800 //TX_THR_SN_EST_7 250 0x0100 //TX_DELTA_THR_SN_EST_0 -251 0x0200 //TX_DELTA_THR_SN_EST_1 -252 0x0100 //TX_DELTA_THR_SN_EST_2 -253 0x0200 //TX_DELTA_THR_SN_EST_3 +251 0x0100 //TX_DELTA_THR_SN_EST_1 +252 0x0200 //TX_DELTA_THR_SN_EST_2 +253 0x0100 //TX_DELTA_THR_SN_EST_3 254 0x0100 //TX_DELTA_THR_SN_EST_4 -255 0x0100 //TX_DELTA_THR_SN_EST_5 +255 0x0200 //TX_DELTA_THR_SN_EST_5 256 0x0200 //TX_DELTA_THR_SN_EST_6 257 0x0200 //TX_DELTA_THR_SN_EST_7 258 0x4000 //TX_LAMBDA_NN_EST_0 @@ -23093,11 +35001,11 @@ 280 0x1000 //TX_B_POST_FLT_1 281 0x0010 //TX_NS_LVL_CTRL_0 282 0x0014 //TX_NS_LVL_CTRL_1 -283 0x0014 //TX_NS_LVL_CTRL_2 -284 0x0018 //TX_NS_LVL_CTRL_3 -285 0x0016 //TX_NS_LVL_CTRL_4 -286 0x0014 //TX_NS_LVL_CTRL_5 -287 0x0011 //TX_NS_LVL_CTRL_6 +283 0x0018 //TX_NS_LVL_CTRL_2 +284 0x0016 //TX_NS_LVL_CTRL_3 +285 0x0014 //TX_NS_LVL_CTRL_4 +286 0x0011 //TX_NS_LVL_CTRL_5 +287 0x0014 //TX_NS_LVL_CTRL_6 288 0x0011 //TX_NS_LVL_CTRL_7 289 0x000F //TX_MIN_GAIN_S_0 290 0x0010 //TX_MIN_GAIN_S_1 @@ -23115,8 +35023,8 @@ 302 0x4000 //TX_SNRI_SUP_2 303 0x4000 //TX_SNRI_SUP_3 304 0x4000 //TX_SNRI_SUP_4 -305 0x4000 //TX_SNRI_SUP_5 -306 0x50C0 //TX_SNRI_SUP_6 +305 0x50C0 //TX_SNRI_SUP_5 +306 0x4000 //TX_SNRI_SUP_6 307 0x7FFF //TX_SNRI_SUP_7 308 0x7FFF //TX_THR_LFNS 309 0x0018 //TX_G_LFNS @@ -23125,19 +35033,19 @@ 312 0x7FFF //TX_A_POST_FILT_0 313 0x2000 //TX_A_POST_FILT_1 314 0x5000 //TX_A_POST_FILT_S_0 -315 0x6000 //TX_A_POST_FILT_S_1 -316 0x4C00 //TX_A_POST_FILT_S_2 -317 0x4000 //TX_A_POST_FILT_S_3 -318 0x6000 //TX_A_POST_FILT_S_4 -319 0x4000 //TX_A_POST_FILT_S_5 -320 0x5000 //TX_A_POST_FILT_S_6 +315 0x4C00 //TX_A_POST_FILT_S_1 +316 0x4000 //TX_A_POST_FILT_S_2 +317 0x6000 //TX_A_POST_FILT_S_3 +318 0x4000 //TX_A_POST_FILT_S_4 +319 0x5000 //TX_A_POST_FILT_S_5 +320 0x6000 //TX_A_POST_FILT_S_6 321 0x7000 //TX_A_POST_FILT_S_7 322 0x2000 //TX_B_POST_FILT_0 -323 0x1000 //TX_B_POST_FILT_1 +323 0x2000 //TX_B_POST_FILT_1 324 0x2000 //TX_B_POST_FILT_2 -325 0x2000 //TX_B_POST_FILT_3 +325 0x4000 //TX_B_POST_FILT_3 326 0x4000 //TX_B_POST_FILT_4 -327 0x4000 //TX_B_POST_FILT_5 +327 0x1000 //TX_B_POST_FILT_5 328 0x1000 //TX_B_POST_FILT_6 329 0x2000 //TX_B_POST_FILT_7 330 0x4000 //TX_B_LESSCUT_RTO_S_0 @@ -23145,14 +35053,14 @@ 332 0x7FFF //TX_B_LESSCUT_RTO_S_2 333 0x7FFF //TX_B_LESSCUT_RTO_S_3 334 0x7FFF //TX_B_LESSCUT_RTO_S_4 -335 0x7FFF //TX_B_LESSCUT_RTO_S_5 -336 0x6000 //TX_B_LESSCUT_RTO_S_6 +335 0x6000 //TX_B_LESSCUT_RTO_S_5 +336 0x7FFF //TX_B_LESSCUT_RTO_S_6 337 0x7FFF //TX_B_LESSCUT_RTO_S_7 338 0x7C00 //TX_LAMBDA_PFILT 339 0x7C00 //TX_LAMBDA_PFILT_S_0 340 0x7C00 //TX_LAMBDA_PFILT_S_1 -341 0x7C00 //TX_LAMBDA_PFILT_S_2 -342 0x7A00 //TX_LAMBDA_PFILT_S_3 +341 0x7A00 //TX_LAMBDA_PFILT_S_2 +342 0x7C00 //TX_LAMBDA_PFILT_S_3 343 0x7C00 //TX_LAMBDA_PFILT_S_4 344 0x7C00 //TX_LAMBDA_PFILT_S_5 345 0x7C00 //TX_LAMBDA_PFILT_S_6 @@ -23163,10 +35071,10 @@ 350 0x0600 //TX_A_PEPPER_HF 351 0x0001 //TX_HMNC_BST_FLG 352 0x0200 //TX_HMNC_BST_THR -353 0x0200 //TX_DT_BINVAD_TH_0 -354 0x0200 //TX_DT_BINVAD_TH_1 -355 0x0200 //TX_DT_BINVAD_TH_2 -356 0x0200 //TX_DT_BINVAD_TH_3 +353 0x0800 //TX_DT_BINVAD_TH_0 +354 0x0800 //TX_DT_BINVAD_TH_1 +355 0x0800 //TX_DT_BINVAD_TH_2 +356 0x0800 //TX_DT_BINVAD_TH_3 357 0x1D4C //TX_DT_BINVAD_ENDF 358 0x0800 //TX_C_POST_FLT_DT 359 0x0CCD //TX_NS_B_POST_FLT_LESSCUT @@ -23177,7 +35085,7 @@ 364 0x0000 //TX_K_APT 365 0x0001 //TX_NOISEDET 366 0x0064 //TX_NDETCT -367 0x0032 //TX_NOISE_TH_0 +367 0x0102 //TX_NOISE_TH_0 368 0x7FFF //TX_NOISE_TH_0_2 369 0x7FFF //TX_NOISE_TH_0_3 370 0x017E //TX_NOISE_TH_1 @@ -23189,11 +35097,11 @@ 376 0x0001 //TX_NOISE_TH_5_3 377 0x7FFF //TX_NOISE_TH_5_4 378 0x0F0A //TX_NOISE_TH_6 -379 0x0033 //TX_MINENOISE_TH -380 0x4000 //TX_MINENOISE_MIC0_TH_MTS -381 0xFFEE //TX_MINENOISE_MIC0_TH_EXP -382 0x6000 //TX_MINENOISE_MIC0_S_TH_MTS -383 0xFFF3 //TX_MINENOISE_MIC0_S_TH_EXP +379 0x00F8 //TX_MINENOISE_TH +380 0xD508 //TX_MORENS_TFMASK_TH +381 0x0001 //TX_DRC_QUIET_FLOOR +382 0x3A98 //TX_RATIODTL_CUT_TH +383 0x0DAC //TX_DT_CUT_K1 384 0x0666 //TX_OUT_ENER_S_TH_CLEAN 385 0x0666 //TX_OUT_ENER_S_TH_LESSCLEAN 386 0x0333 //TX_OUT_ENER_S_TH_NOISY @@ -23201,22 +35109,22 @@ 388 0x0333 //TX_OUT_ENER_TH_SPEECH 389 0x2000 //TX_SN_NPB_GAIN 390 0x0000 //TX_NN_NPB_GAIN -391 0x0000 //TX_CSX_ALPHA_0 -392 0x0000 //TX_CSX_ALPHA_1 -393 0x0000 //TX_CSX_ALPHA_2 -394 0x0000 //TX_CSX_ALPHA_3 -395 0x0800 //TX_MU_ARSP_EST -396 0x00C8 //TX_P_OUTBEAM_MIN_TH +391 0x7FFF //TX_POST_MASK_SUP_HSNE +392 0x1388 //TX_TAIL_DET_TH +393 0x4000 //TX_B_LESSCUT_RTO_WTA +394 0x0000 //TX_MEL_G_R +395 0x0080 //TX_SUPHIGH_TH +396 0x0000 //TX_MASK_G_R 397 0x0002 //TX_EXTRA_NS_L -398 0x0800 //TX_EXTRA_NS_A -399 0x0005 //TX_VR_NOISE_FLOOR_TH +398 0x1800 //TX_C_POST_FLT_MASK +399 0x7FFF //TX_A_POST_FLT_WNS 400 0x0148 //TX_MIN_G_LOW300HZ -401 0x0001 //TX_MAXLEVEL_CNG +401 0x0004 //TX_MAXLEVEL_CNG 402 0x00B4 //TX_STN_NOISE_TH 403 0x4000 //TX_POST_MASK_SUP 404 0x7FFF //TX_POST_MASK_ADJUST 405 0x00C8 //TX_NS_ENOISE_MIC0_TH -406 0x0033 //TX_MINENOISE_MIC0_TH +406 0x00DC //TX_MINENOISE_MIC0_TH 407 0x012C //TX_MINENOISE_MIC0_S_TH 408 0x7FFF //TX_MIN_G_CTRL_SSNS 409 0x0000 //TX_METAL_RTO_THR @@ -23324,16 +35232,16 @@ 511 0x6666 //TX_MIC_TO_BFGAIN 512 0x0000 //TX_MICTOBFGAIN0 513 0x0000 //TX_FASTMUE_TH -514 0x0000 //TX_DERVB_LEN_0 -515 0x0000 //TX_DERVB_LEN_1 -516 0x0000 //TX_RHO_DERVB -517 0x0000 //TX_MIC_INDX_DERVB -518 0x0000 //TX_MU_DERVB -519 0x0000 //TX_DR_RESRV_0 -520 0x0000 //TX_DR_RESRV_1 -521 0x0000 //TX_DR_RESRV_2 -522 0x0000 //TX_DR_RESRV_3 -523 0x0000 //TX_DR_RESRV_4 +514 0xC000 //TX_DEREVERB_LF_MU +515 0xC000 //TX_DEREVERB_HF_MU +516 0xCCCC //TX_DEREVERB_DELAY +517 0xD999 //TX_DEREVERB_COEF_LEN +518 0x1F40 //TX_DEREVERB_DNR +519 0x0000 //TX_DEREVERB_ALPHA +520 0x0000 //TX_DEREVERB_BETA +521 0x0000 //TX_GSC_RTOL_TH +522 0x7000 //TX_GSC_RTOH_TH +523 0x0064 //TX_WIDE2_MEANHTH 524 0x0000 //TX_DR_RESRV_5 525 0x0000 //TX_DR_RESRV_6 526 0x0000 //TX_DR_RESRV_7 @@ -23376,19 +35284,19 @@ 563 0x0000 //TX_SAM_MARK 564 0x0000 //TX_PB_RESRV_0 565 0x0000 //TX_PB_RESRV_1 -566 0x001C //TX_FDEQ_SUBNUM -567 0x5050 //TX_FDEQ_GAIN_0 -568 0x5048 //TX_FDEQ_GAIN_1 +566 0x0020 //TX_FDEQ_SUBNUM +567 0x5454 //TX_FDEQ_GAIN_0 +568 0x5448 //TX_FDEQ_GAIN_1 569 0x4848 //TX_FDEQ_GAIN_2 570 0x4848 //TX_FDEQ_GAIN_3 571 0x4848 //TX_FDEQ_GAIN_4 572 0x4850 //TX_FDEQ_GAIN_5 573 0x5050 //TX_FDEQ_GAIN_6 -574 0x5048 //TX_FDEQ_GAIN_7 -575 0x4848 //TX_FDEQ_GAIN_8 -576 0x4844 //TX_FDEQ_GAIN_9 -577 0x3C36 //TX_FDEQ_GAIN_10 -578 0x3A3A //TX_FDEQ_GAIN_11 +574 0x5448 //TX_FDEQ_GAIN_7 +575 0x464C //TX_FDEQ_GAIN_8 +576 0x5050 //TX_FDEQ_GAIN_9 +577 0x4848 //TX_FDEQ_GAIN_10 +578 0x4848 //TX_FDEQ_GAIN_11 579 0x4848 //TX_FDEQ_GAIN_12 580 0x4848 //TX_FDEQ_GAIN_13 581 0x4848 //TX_FDEQ_GAIN_14 @@ -23411,10 +35319,10 @@ 598 0x090A //TX_FDEQ_BIN_7 599 0x0B0C //TX_FDEQ_BIN_8 600 0x0D0E //TX_FDEQ_BIN_9 -601 0x0E0F //TX_FDEQ_BIN_10 -602 0x0F10 //TX_FDEQ_BIN_11 -603 0x1011 //TX_FDEQ_BIN_12 -604 0x1104 //TX_FDEQ_BIN_13 +601 0x0F10 //TX_FDEQ_BIN_10 +602 0x1011 //TX_FDEQ_BIN_11 +603 0x1112 //TX_FDEQ_BIN_12 +604 0x120B //TX_FDEQ_BIN_13 605 0x0000 //TX_FDEQ_BIN_14 606 0x0000 //TX_FDEQ_BIN_15 607 0x0000 //TX_FDEQ_BIN_16 @@ -23434,13 +35342,13 @@ 621 0x4848 //TX_PREEQ_GAIN_MIC0_4 622 0x4848 //TX_PREEQ_GAIN_MIC0_5 623 0x4848 //TX_PREEQ_GAIN_MIC0_6 -624 0x484A //TX_PREEQ_GAIN_MIC0_7 -625 0x4C4E //TX_PREEQ_GAIN_MIC0_8 -626 0x5054 //TX_PREEQ_GAIN_MIC0_9 -627 0x5658 //TX_PREEQ_GAIN_MIC0_10 -628 0x5C5C //TX_PREEQ_GAIN_MIC0_11 -629 0x5E64 //TX_PREEQ_GAIN_MIC0_12 -630 0x6464 //TX_PREEQ_GAIN_MIC0_13 +624 0x4848 //TX_PREEQ_GAIN_MIC0_7 +625 0x484A //TX_PREEQ_GAIN_MIC0_8 +626 0x4B4C //TX_PREEQ_GAIN_MIC0_9 +627 0x4B4A //TX_PREEQ_GAIN_MIC0_10 +628 0x4A48 //TX_PREEQ_GAIN_MIC0_11 +629 0x4C4C //TX_PREEQ_GAIN_MIC0_12 +630 0x4C4C //TX_PREEQ_GAIN_MIC0_13 631 0x4848 //TX_PREEQ_GAIN_MIC0_14 632 0x4848 //TX_PREEQ_GAIN_MIC0_15 633 0x4848 //TX_PREEQ_GAIN_MIC0_16 @@ -23463,8 +35371,8 @@ 650 0x0D0E //TX_PREEQ_BIN_MIC0_9 651 0x0F10 //TX_PREEQ_BIN_MIC0_10 652 0x1011 //TX_PREEQ_BIN_MIC0_11 -653 0x1104 //TX_PREEQ_BIN_MIC0_12 -654 0x1010 //TX_PREEQ_BIN_MIC0_13 +653 0x1112 //TX_PREEQ_BIN_MIC0_12 +654 0x120B //TX_PREEQ_BIN_MIC0_13 655 0x0000 //TX_PREEQ_BIN_MIC0_14 656 0x0000 //TX_PREEQ_BIN_MIC0_15 657 0x0000 //TX_PREEQ_BIN_MIC0_16 @@ -23483,12 +35391,12 @@ 670 0x4848 //TX_PREEQ_GAIN_MIC1_4 671 0x4848 //TX_PREEQ_GAIN_MIC1_5 672 0x4848 //TX_PREEQ_GAIN_MIC1_6 -673 0x4848 //TX_PREEQ_GAIN_MIC1_7 -674 0x4848 //TX_PREEQ_GAIN_MIC1_8 -675 0x4848 //TX_PREEQ_GAIN_MIC1_9 -676 0x4848 //TX_PREEQ_GAIN_MIC1_10 -677 0x4848 //TX_PREEQ_GAIN_MIC1_11 -678 0x4848 //TX_PREEQ_GAIN_MIC1_12 +673 0x4846 //TX_PREEQ_GAIN_MIC1_7 +674 0x4544 //TX_PREEQ_GAIN_MIC1_8 +675 0x4241 //TX_PREEQ_GAIN_MIC1_9 +676 0x403E //TX_PREEQ_GAIN_MIC1_10 +677 0x3D3C //TX_PREEQ_GAIN_MIC1_11 +678 0x3C3C //TX_PREEQ_GAIN_MIC1_12 679 0x4848 //TX_PREEQ_GAIN_MIC1_13 680 0x4848 //TX_PREEQ_GAIN_MIC1_14 681 0x4848 //TX_PREEQ_GAIN_MIC1_15 @@ -23500,19 +35408,19 @@ 687 0x4848 //TX_PREEQ_GAIN_MIC1_21 688 0x4848 //TX_PREEQ_GAIN_MIC1_22 689 0x4848 //TX_PREEQ_GAIN_MIC1_23 -690 0x251A //TX_PREEQ_BIN_MIC1_0 -691 0x0F0F //TX_PREEQ_BIN_MIC1_1 -692 0x0C0C //TX_PREEQ_BIN_MIC1_2 -693 0x0C0F //TX_PREEQ_BIN_MIC1_3 -694 0x0F0F //TX_PREEQ_BIN_MIC1_4 -695 0x0F09 //TX_PREEQ_BIN_MIC1_5 -696 0x0909 //TX_PREEQ_BIN_MIC1_6 -697 0x0908 //TX_PREEQ_BIN_MIC1_7 -698 0x0700 //TX_PREEQ_BIN_MIC1_8 -699 0x0000 //TX_PREEQ_BIN_MIC1_9 -700 0x0000 //TX_PREEQ_BIN_MIC1_10 -701 0x0000 //TX_PREEQ_BIN_MIC1_11 -702 0x0000 //TX_PREEQ_BIN_MIC1_12 +690 0x0202 //TX_PREEQ_BIN_MIC1_0 +691 0x0203 //TX_PREEQ_BIN_MIC1_1 +692 0x0303 //TX_PREEQ_BIN_MIC1_2 +693 0x0304 //TX_PREEQ_BIN_MIC1_3 +694 0x0405 //TX_PREEQ_BIN_MIC1_4 +695 0x0506 //TX_PREEQ_BIN_MIC1_5 +696 0x0708 //TX_PREEQ_BIN_MIC1_6 +697 0x090A //TX_PREEQ_BIN_MIC1_7 +698 0x0B0C //TX_PREEQ_BIN_MIC1_8 +699 0x0F10 //TX_PREEQ_BIN_MIC1_9 +700 0x1011 //TX_PREEQ_BIN_MIC1_10 +701 0x1112 //TX_PREEQ_BIN_MIC1_11 +702 0x1208 //TX_PREEQ_BIN_MIC1_12 703 0x0000 //TX_PREEQ_BIN_MIC1_13 704 0x0000 //TX_PREEQ_BIN_MIC1_14 705 0x0000 //TX_PREEQ_BIN_MIC1_15 @@ -23601,7 +35509,7 @@ 788 0x7EB8 //TX_TDDRC_ALPHA_DWN_02 789 0x7EB8 //TX_TDDRC_ALPHA_DWN_03 790 0x7EB8 //TX_TDDRC_ALPHA_DWN_04 -791 0x7FFF //TX_TDDRC_TD_DRC_LIMIT +791 0x7214 //TX_TDDRC_TD_DRC_LIMIT 792 0x0800 //TX_TDDRC_POST_LIMIT_GAIN 793 0x0000 //TX_TDDRC_RESRV_0 794 0x0000 //TX_TDDRC_RESRV_1 @@ -23668,15 +35576,15 @@ 855 0x0002 //TX_TDDRC_THRD_1 856 0x1800 //TX_TDDRC_THRD_2 857 0x1800 //TX_TDDRC_THRD_3 -858 0x6000 //TX_TDDRC_SLANT_0 -859 0x6000 //TX_TDDRC_SLANT_1 +858 0x7FFF //TX_TDDRC_SLANT_0 +859 0x7FFF //TX_TDDRC_SLANT_1 860 0x0800 //TX_TDDRC_ALPHA_UP_00 861 0x7EB8 //TX_TDDRC_ALPHA_DWN_00 862 0x0000 //TX_TDDRC_HMNC_FLAG 863 0x199A //TX_TDDRC_HMNC_GAIN 864 0x0000 //TX_TDDRC_SMT_FLAG 865 0x0CCD //TX_TDDRC_SMT_W -866 0x0BE3 //TX_TDDRC_DRC_GAIN +866 0x0C97 //TX_TDDRC_DRC_GAIN 867 0x7FFF //TX_TDDRC_LMT_THRD 868 0x0000 //TX_TDDRC_LMT_ALPHA 869 0x0000 //TX_TFMASKLTH @@ -23701,14 +35609,79 @@ 888 0x0028 //TX_FASTNS_ARSPC_TH 889 0xC000 //TX_FASTNS_MASK5_TH 890 0x4848 //TX_POSTSSA_MIN_G_VR_MASK -891 0x1000 //TX_A_LESSCUT_RTO_MASK +891 0x4000 //TX_A_LESSCUT_RTO_MASK 892 0x1770 //TX_FASTNS_NOISETH 893 0xC000 //TX_FASTNS_SSA_THLFL 894 0xC000 //TX_FASTNS_SSA_THHFL 895 0xCCCC //TX_FASTNS_SSA_THLFH 896 0xD999 //TX_FASTNS_SSA_THHFH +897 0x2339 //TX_SENDFUNC_REG_MICMUTE +898 0x0021 //TX_SENDFUNC_REG_MICMUTE1 +899 0x02BC //TX_MICMUTE_RATIO_THR +900 0x0140 //TX_MICMUTE_AMP_THR +901 0x0004 //TX_MICMUTE_HPF_IND +902 0x00C0 //TX_MICMUTE_LOG_EYR_TH +903 0x0008 //TX_MICMUTE_CVG_TIME +904 0x0008 //TX_MICMUTE_RELEASE_TIME +905 0x01FE //TX_MIC_VOLUME_MIC0MUTE +906 0x0020 //TX_MICMUTE_EPD_OFFSET_0 +907 0x001E //TX_MICMUTE_FRQ_AEC_L +908 0x7999 //TX_MICMUTE_EAD_THR +909 0x7FFF //TX_MICMUTE_LAMBDA_CB_NLE +910 0x7FFF //TX_MICMUTE_LAMBDA_RE_EST +911 0x4000 //TX_DTD_THR1_MICMUTE_0 +912 0x7000 //TX_DTD_THR1_MICMUTE_1 +913 0x7FFF //TX_DTD_THR1_MICMUTE_2 +914 0x7FFF //TX_DTD_THR1_MICMUTE_3 +915 0x6CCC //TX_DTD_THR2_MICMUTE_0 +916 0x0400 //TX_MICMUTE_MIN_EQ_RE_EST_0 +917 0x0400 //TX_MICMUTE_MIN_EQ_RE_EST_1 +918 0x1000 //TX_MICMUTE_MIN_EQ_RE_EST_2 +919 0x7FFF //TX_MICMUTE_MIN_EQ_RE_EST_3 +920 0x7FFF //TX_MICMUTE_MIN_EQ_RE_EST_4 +921 0x4000 //TX_MICMUTE_C_POST_FLT +922 0x03E8 //TX_MICMUTE_DT_CUT_K +923 0x0001 //TX_MICMUTE_DT_CUT_THR +924 0x03E8 //TX_MICMUTE_DT_CUT_K2 +925 0x0001 //TX_MICMUTE_DT_CUT_THR2 +926 0x0064 //TX_MICMUTE_DT2_HOLD_N +927 0x1000 //TX_MICMUTE_RATIODTH_THCUT +928 0x1000 //TX_MICMUTE_B_POST_FLT_ECHOL +929 0x7FFF //TX_MICMUTE_B_POST_FLT_ECHOH +930 0x0400 //TX_MICMUTE_C_POST_FLT_MASK +931 0x7999 //TX_MICMUTE_RATIODTL_CUT_TH +932 0x0258 //TX_MICMUTE_DT_CUT_K1 +933 0x0800 //TX_MICMUTE_N2_SN_EST +934 0xFC00 //TX_MICMUTE_THR_SN_EST_0 +935 0x001C //TX_MICMUTE_MIN_G_CTRL_0 +936 0x6000 //TX_MICMUTE_A_POST_FILT_S_0 +937 0x7000 //TX_MICMUTE_B_POST_FILT_0 +938 0x2710 //TX_MIC1RUB_AMP_THR +939 0x0010 //TX_MIC1MUTE_RATIO_THR +940 0x0450 //TX_MIC1MUTE_AMP_THR +941 0x0008 //TX_MIC1MUTE_CVG_TIME +942 0x0008 //TX_MIC1MUTE_RELEASE_TIME +943 0x0000 //TX_AMS_RESRV_01 +944 0x0000 //TX_AMS_RESRV_02 +945 0x0000 //TX_AMS_RESRV_03 +946 0x0000 //TX_AMS_RESRV_04 +947 0x0000 //TX_AMS_RESRV_05 +948 0x0000 //TX_AMS_RESRV_06 +949 0x0000 //TX_AMS_RESRV_07 +950 0x0000 //TX_AMS_RESRV_08 +951 0x0000 //TX_AMS_RESRV_09 +952 0x0000 //TX_AMS_RESRV_10 +953 0x0000 //TX_AMS_RESRV_11 +954 0x0000 //TX_AMS_RESRV_12 +955 0x0000 //TX_AMS_RESRV_13 +956 0x0000 //TX_AMS_RESRV_14 +957 0x0000 //TX_AMS_RESRV_15 +958 0x0000 //TX_AMS_RESRV_16 +959 0x0000 //TX_AMS_RESRV_17 +960 0x0000 //TX_AMS_RESRV_18 +961 0x0000 //TX_AMS_RESRV_19 #RX -0 0x002C //RX_RECVFUNC_MODE_0 +0 0x202C //RX_RECVFUNC_MODE_0 1 0x0000 //RX_RECVFUNC_MODE_1 2 0x0001 //RX_SAMPLINGFREQ_SIG 3 0x0001 //RX_SAMPLINGFREQ_PROC @@ -24558,18 +36531,869 @@ 110 0x0000 //RX_FDDRC_RESRV_0 129 0x0100 //RX_SPK_VOL 130 0x0000 //RX_VOL_RESRV_0 +#RX 2 +157 0x202C //RX_RECVFUNC_MODE_0 +158 0x0000 //RX_RECVFUNC_MODE_1 +159 0x0001 //RX_SAMPLINGFREQ_SIG +160 0x0001 //RX_SAMPLINGFREQ_PROC +161 0x000A //RX_FRAME_SZ +162 0x0000 //RX_DELAY_OPT +163 0x3000 //RX_TDDRC_ALPHA_UP_1 +164 0x3000 //RX_TDDRC_ALPHA_UP_2 +165 0x3000 //RX_TDDRC_ALPHA_UP_3 +166 0x3000 //RX_TDDRC_ALPHA_UP_4 +167 0x0800 //RX_PGA +168 0x7FFF //RX_A_HP +169 0x4000 //RX_B_PE +170 0x3800 //RX_THR_PITCH_DET_0 +171 0x3000 //RX_THR_PITCH_DET_1 +172 0x2800 //RX_THR_PITCH_DET_2 +173 0x0008 //RX_PITCH_BFR_LEN +174 0x0003 //RX_SBD_PITCH_DET +175 0x0100 //RX_PP_RESRV_0 +176 0x0020 //RX_PP_RESRV_1 +177 0x0600 //RX_N_SN_EST +178 0x000C //RX_N2_SN_EST +179 0x0010 //RX_NS_LVL_CTRL +180 0xF800 //RX_THR_SN_EST +181 0x7CCD //RX_LAMBDA_PFILT +182 0x000A //RX_FENS_RESRV_0 +183 0x0190 //RX_FENS_RESRV_1 +184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +187 0x0002 //RX_EXTRA_NS_L +188 0x0800 //RX_EXTRA_NS_A +189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +190 0x7FFF //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +192 0x199A //RX_A_POST_FLT +193 0x0000 //RX_LMT_THRD +194 0x4000 //RX_LMT_ALPHA +195 0x001C //RX_FDEQ_SUBNUM +196 0x4848 //RX_FDEQ_GAIN_0 +197 0x4848 //RX_FDEQ_GAIN_1 +198 0x4848 //RX_FDEQ_GAIN_2 +199 0x4848 //RX_FDEQ_GAIN_3 +200 0x4848 //RX_FDEQ_GAIN_4 +201 0x4848 //RX_FDEQ_GAIN_5 +202 0x4848 //RX_FDEQ_GAIN_6 +203 0x4848 //RX_FDEQ_GAIN_7 +204 0x4848 //RX_FDEQ_GAIN_8 +205 0x4848 //RX_FDEQ_GAIN_9 +206 0x4848 //RX_FDEQ_GAIN_10 +207 0x4848 //RX_FDEQ_GAIN_11 +208 0x4848 //RX_FDEQ_GAIN_12 +209 0x4848 //RX_FDEQ_GAIN_13 +210 0x4848 //RX_FDEQ_GAIN_14 +211 0x4848 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0202 //RX_FDEQ_BIN_0 +221 0x0203 //RX_FDEQ_BIN_1 +222 0x0303 //RX_FDEQ_BIN_2 +223 0x0304 //RX_FDEQ_BIN_3 +224 0x0405 //RX_FDEQ_BIN_4 +225 0x0506 //RX_FDEQ_BIN_5 +226 0x0708 //RX_FDEQ_BIN_6 +227 0x090A //RX_FDEQ_BIN_7 +228 0x0B0C //RX_FDEQ_BIN_8 +229 0x0D0E //RX_FDEQ_BIN_9 +230 0x0E0F //RX_FDEQ_BIN_10 +231 0x0F10 //RX_FDEQ_BIN_11 +232 0x1011 //RX_FDEQ_BIN_12 +233 0x1104 //RX_FDEQ_BIN_13 +234 0x0000 //RX_FDEQ_BIN_14 +235 0x0000 //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x4000 //RX_FDEQ_RESRV_0 +245 0x0320 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0030 //RX_FDDRC_BAND_MARGIN_1 +248 0x0050 //RX_FDDRC_BAND_MARGIN_2 +249 0x0080 //RX_FDDRC_BAND_MARGIN_3 +250 0x0007 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x5000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x6400 //RX_FDDRC_THRD_3_2 +258 0x6400 //RX_FDDRC_THRD_3_3 +259 0x2000 //RX_FDDRC_SLANT_0_0 +260 0x2000 //RX_FDDRC_SLANT_0_1 +261 0x2000 //RX_FDDRC_SLANT_0_2 +262 0x2000 //RX_FDDRC_SLANT_0_3 +263 0x5333 //RX_FDDRC_SLANT_1_0 +264 0x5333 //RX_FDDRC_SLANT_1_1 +265 0x5333 //RX_FDDRC_SLANT_1_2 +266 0x5333 //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +268 0x0002 //RX_FILTINDX +269 0x0000 //RX_TDDRC_THRD_0 +270 0x0000 //RX_TDDRC_THRD_1 +271 0x2000 //RX_TDDRC_THRD_2 +272 0x3000 //RX_TDDRC_THRD_3 +273 0x0800 //RX_TDDRC_SLANT_0 +274 0x7EB8 //RX_TDDRC_SLANT_1 +275 0x3000 //RX_TDDRC_ALPHA_UP_0 +276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x199A //RX_TDDRC_HMNC_GAIN +279 0x0001 //RX_TDDRC_SMT_FLAG +280 0x0CCD //RX_TDDRC_SMT_W +281 0x0196 //RX_TDDRC_DRC_GAIN +282 0x7C00 //RX_LAMBDA_PKA_FP +283 0x2000 //RX_TPKA_FP +284 0x2000 //RX_MIN_G_FP +285 0x0080 //RX_MAX_G_FP +286 0x000B //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 +288 0x0000 //RX_MAXLEVEL_CNG +289 0x3000 //RX_BWE_UV_TH +290 0x3000 //RX_BWE_UV_TH2 +291 0x1800 //RX_BWE_UV_TH3 +292 0x1000 //RX_BWE_V_TH +293 0x04CD //RX_BWE_GAIN1_V_TH1 +294 0x0F33 //RX_BWE_GAIN1_V_TH2 +295 0x7333 //RX_BWE_UV_EQ +296 0x199A //RX_BWE_V_EQ +297 0x7333 //RX_BWE_TONE_TH +298 0x0004 //RX_BWE_UV_HOLD_T +299 0x6CCD //RX_BWE_GAIN2_ALPHA +300 0x799A //RX_BWE_GAIN3_ALPHA +301 0x001E //RX_BWE_CUTOFF +302 0x3000 //RX_BWE_GAINFILL +303 0x3200 //RX_BWE_MAXTH_TONE +304 0x2000 //RX_BWE_EQ_0 +305 0x2000 //RX_BWE_EQ_1 +306 0x2000 //RX_BWE_EQ_2 +307 0x2000 //RX_BWE_EQ_3 +308 0x2000 //RX_BWE_EQ_4 +309 0x2000 //RX_BWE_EQ_5 +310 0x2000 //RX_BWE_EQ_6 +311 0x0000 //RX_BWE_RESRV_0 +312 0x0000 //RX_BWE_RESRV_1 +313 0x0000 //RX_BWE_RESRV_2 +#VOL 0 +163 0x3000 //RX_TDDRC_ALPHA_UP_1 +164 0x3000 //RX_TDDRC_ALPHA_UP_2 +165 0x3000 //RX_TDDRC_ALPHA_UP_3 +166 0x3000 //RX_TDDRC_ALPHA_UP_4 +184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +190 0x7FFF //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +269 0x0000 //RX_TDDRC_THRD_0 +270 0x0000 //RX_TDDRC_THRD_1 +271 0x2000 //RX_TDDRC_THRD_2 +272 0x3000 //RX_TDDRC_THRD_3 +273 0x0800 //RX_TDDRC_SLANT_0 +274 0x7EB8 //RX_TDDRC_SLANT_1 +275 0x3000 //RX_TDDRC_ALPHA_UP_0 +276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x199A //RX_TDDRC_HMNC_GAIN +279 0x0001 //RX_TDDRC_SMT_FLAG +280 0x0CCD //RX_TDDRC_SMT_W +281 0x0196 //RX_TDDRC_DRC_GAIN +195 0x001C //RX_FDEQ_SUBNUM +196 0x4848 //RX_FDEQ_GAIN_0 +197 0x4848 //RX_FDEQ_GAIN_1 +198 0x4848 //RX_FDEQ_GAIN_2 +199 0x4848 //RX_FDEQ_GAIN_3 +200 0x4848 //RX_FDEQ_GAIN_4 +201 0x4848 //RX_FDEQ_GAIN_5 +202 0x4848 //RX_FDEQ_GAIN_6 +203 0x4848 //RX_FDEQ_GAIN_7 +204 0x4848 //RX_FDEQ_GAIN_8 +205 0x4848 //RX_FDEQ_GAIN_9 +206 0x4848 //RX_FDEQ_GAIN_10 +207 0x4848 //RX_FDEQ_GAIN_11 +208 0x4848 //RX_FDEQ_GAIN_12 +209 0x4848 //RX_FDEQ_GAIN_13 +210 0x4848 //RX_FDEQ_GAIN_14 +211 0x4848 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0202 //RX_FDEQ_BIN_0 +221 0x0203 //RX_FDEQ_BIN_1 +222 0x0303 //RX_FDEQ_BIN_2 +223 0x0304 //RX_FDEQ_BIN_3 +224 0x0405 //RX_FDEQ_BIN_4 +225 0x0506 //RX_FDEQ_BIN_5 +226 0x0708 //RX_FDEQ_BIN_6 +227 0x090A //RX_FDEQ_BIN_7 +228 0x0B0C //RX_FDEQ_BIN_8 +229 0x0D0E //RX_FDEQ_BIN_9 +230 0x0E0F //RX_FDEQ_BIN_10 +231 0x0F10 //RX_FDEQ_BIN_11 +232 0x1011 //RX_FDEQ_BIN_12 +233 0x1104 //RX_FDEQ_BIN_13 +234 0x0000 //RX_FDEQ_BIN_14 +235 0x0000 //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x4000 //RX_FDEQ_RESRV_0 +245 0x0320 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0030 //RX_FDDRC_BAND_MARGIN_1 +248 0x0050 //RX_FDDRC_BAND_MARGIN_2 +249 0x0080 //RX_FDDRC_BAND_MARGIN_3 +250 0x0007 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x5000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x6400 //RX_FDDRC_THRD_3_2 +258 0x6400 //RX_FDDRC_THRD_3_3 +259 0x2000 //RX_FDDRC_SLANT_0_0 +260 0x2000 //RX_FDDRC_SLANT_0_1 +261 0x2000 //RX_FDDRC_SLANT_0_2 +262 0x2000 //RX_FDDRC_SLANT_0_3 +263 0x5333 //RX_FDDRC_SLANT_1_0 +264 0x5333 //RX_FDDRC_SLANT_1_1 +265 0x5333 //RX_FDDRC_SLANT_1_2 +266 0x5333 //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +286 0x000B //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 +#VOL 1 +163 0x3000 //RX_TDDRC_ALPHA_UP_1 +164 0x3000 //RX_TDDRC_ALPHA_UP_2 +165 0x3000 //RX_TDDRC_ALPHA_UP_3 +166 0x3000 //RX_TDDRC_ALPHA_UP_4 +184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +190 0x7FFF //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +269 0x0000 //RX_TDDRC_THRD_0 +270 0x0000 //RX_TDDRC_THRD_1 +271 0x2000 //RX_TDDRC_THRD_2 +272 0x3000 //RX_TDDRC_THRD_3 +273 0x0800 //RX_TDDRC_SLANT_0 +274 0x7EB8 //RX_TDDRC_SLANT_1 +275 0x3000 //RX_TDDRC_ALPHA_UP_0 +276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x199A //RX_TDDRC_HMNC_GAIN +279 0x0001 //RX_TDDRC_SMT_FLAG +280 0x0CCD //RX_TDDRC_SMT_W +281 0x0196 //RX_TDDRC_DRC_GAIN +195 0x001C //RX_FDEQ_SUBNUM +196 0x4848 //RX_FDEQ_GAIN_0 +197 0x4848 //RX_FDEQ_GAIN_1 +198 0x4848 //RX_FDEQ_GAIN_2 +199 0x4848 //RX_FDEQ_GAIN_3 +200 0x4848 //RX_FDEQ_GAIN_4 +201 0x4848 //RX_FDEQ_GAIN_5 +202 0x4848 //RX_FDEQ_GAIN_6 +203 0x4848 //RX_FDEQ_GAIN_7 +204 0x4848 //RX_FDEQ_GAIN_8 +205 0x4848 //RX_FDEQ_GAIN_9 +206 0x4848 //RX_FDEQ_GAIN_10 +207 0x4848 //RX_FDEQ_GAIN_11 +208 0x4848 //RX_FDEQ_GAIN_12 +209 0x4848 //RX_FDEQ_GAIN_13 +210 0x4848 //RX_FDEQ_GAIN_14 +211 0x4848 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0202 //RX_FDEQ_BIN_0 +221 0x0203 //RX_FDEQ_BIN_1 +222 0x0303 //RX_FDEQ_BIN_2 +223 0x0304 //RX_FDEQ_BIN_3 +224 0x0405 //RX_FDEQ_BIN_4 +225 0x0506 //RX_FDEQ_BIN_5 +226 0x0708 //RX_FDEQ_BIN_6 +227 0x090A //RX_FDEQ_BIN_7 +228 0x0B0C //RX_FDEQ_BIN_8 +229 0x0D0E //RX_FDEQ_BIN_9 +230 0x0E0F //RX_FDEQ_BIN_10 +231 0x0F10 //RX_FDEQ_BIN_11 +232 0x1011 //RX_FDEQ_BIN_12 +233 0x1104 //RX_FDEQ_BIN_13 +234 0x0000 //RX_FDEQ_BIN_14 +235 0x0000 //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x4000 //RX_FDEQ_RESRV_0 +245 0x0320 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0030 //RX_FDDRC_BAND_MARGIN_1 +248 0x0050 //RX_FDDRC_BAND_MARGIN_2 +249 0x0080 //RX_FDDRC_BAND_MARGIN_3 +250 0x0007 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x5000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x6400 //RX_FDDRC_THRD_3_2 +258 0x6400 //RX_FDDRC_THRD_3_3 +259 0x2000 //RX_FDDRC_SLANT_0_0 +260 0x2000 //RX_FDDRC_SLANT_0_1 +261 0x2000 //RX_FDDRC_SLANT_0_2 +262 0x2000 //RX_FDDRC_SLANT_0_3 +263 0x5333 //RX_FDDRC_SLANT_1_0 +264 0x5333 //RX_FDDRC_SLANT_1_1 +265 0x5333 //RX_FDDRC_SLANT_1_2 +266 0x5333 //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +286 0x0013 //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 +#VOL 2 +163 0x3000 //RX_TDDRC_ALPHA_UP_1 +164 0x3000 //RX_TDDRC_ALPHA_UP_2 +165 0x3000 //RX_TDDRC_ALPHA_UP_3 +166 0x3000 //RX_TDDRC_ALPHA_UP_4 +184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +190 0x7FFF //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +269 0x0000 //RX_TDDRC_THRD_0 +270 0x0000 //RX_TDDRC_THRD_1 +271 0x2000 //RX_TDDRC_THRD_2 +272 0x3000 //RX_TDDRC_THRD_3 +273 0x0800 //RX_TDDRC_SLANT_0 +274 0x7EB8 //RX_TDDRC_SLANT_1 +275 0x3000 //RX_TDDRC_ALPHA_UP_0 +276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x199A //RX_TDDRC_HMNC_GAIN +279 0x0001 //RX_TDDRC_SMT_FLAG +280 0x0CCD //RX_TDDRC_SMT_W +281 0x0196 //RX_TDDRC_DRC_GAIN +195 0x001C //RX_FDEQ_SUBNUM +196 0x4848 //RX_FDEQ_GAIN_0 +197 0x4848 //RX_FDEQ_GAIN_1 +198 0x4848 //RX_FDEQ_GAIN_2 +199 0x4848 //RX_FDEQ_GAIN_3 +200 0x4848 //RX_FDEQ_GAIN_4 +201 0x4848 //RX_FDEQ_GAIN_5 +202 0x4848 //RX_FDEQ_GAIN_6 +203 0x4848 //RX_FDEQ_GAIN_7 +204 0x4848 //RX_FDEQ_GAIN_8 +205 0x4848 //RX_FDEQ_GAIN_9 +206 0x4848 //RX_FDEQ_GAIN_10 +207 0x4848 //RX_FDEQ_GAIN_11 +208 0x4848 //RX_FDEQ_GAIN_12 +209 0x4848 //RX_FDEQ_GAIN_13 +210 0x4848 //RX_FDEQ_GAIN_14 +211 0x4848 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0202 //RX_FDEQ_BIN_0 +221 0x0203 //RX_FDEQ_BIN_1 +222 0x0303 //RX_FDEQ_BIN_2 +223 0x0304 //RX_FDEQ_BIN_3 +224 0x0405 //RX_FDEQ_BIN_4 +225 0x0506 //RX_FDEQ_BIN_5 +226 0x0708 //RX_FDEQ_BIN_6 +227 0x090A //RX_FDEQ_BIN_7 +228 0x0B0C //RX_FDEQ_BIN_8 +229 0x0D0E //RX_FDEQ_BIN_9 +230 0x0E0F //RX_FDEQ_BIN_10 +231 0x0F10 //RX_FDEQ_BIN_11 +232 0x1011 //RX_FDEQ_BIN_12 +233 0x1104 //RX_FDEQ_BIN_13 +234 0x0000 //RX_FDEQ_BIN_14 +235 0x0000 //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x4000 //RX_FDEQ_RESRV_0 +245 0x0320 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0030 //RX_FDDRC_BAND_MARGIN_1 +248 0x0050 //RX_FDDRC_BAND_MARGIN_2 +249 0x0080 //RX_FDDRC_BAND_MARGIN_3 +250 0x0007 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x5000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x6400 //RX_FDDRC_THRD_3_2 +258 0x6400 //RX_FDDRC_THRD_3_3 +259 0x2000 //RX_FDDRC_SLANT_0_0 +260 0x2000 //RX_FDDRC_SLANT_0_1 +261 0x2000 //RX_FDDRC_SLANT_0_2 +262 0x2000 //RX_FDDRC_SLANT_0_3 +263 0x5333 //RX_FDDRC_SLANT_1_0 +264 0x5333 //RX_FDDRC_SLANT_1_1 +265 0x5333 //RX_FDDRC_SLANT_1_2 +266 0x5333 //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +286 0x0020 //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 +#VOL 3 +163 0x3000 //RX_TDDRC_ALPHA_UP_1 +164 0x3000 //RX_TDDRC_ALPHA_UP_2 +165 0x3000 //RX_TDDRC_ALPHA_UP_3 +166 0x3000 //RX_TDDRC_ALPHA_UP_4 +184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +190 0x7FFF //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +269 0x0000 //RX_TDDRC_THRD_0 +270 0x0000 //RX_TDDRC_THRD_1 +271 0x2000 //RX_TDDRC_THRD_2 +272 0x3000 //RX_TDDRC_THRD_3 +273 0x0800 //RX_TDDRC_SLANT_0 +274 0x7EB8 //RX_TDDRC_SLANT_1 +275 0x3000 //RX_TDDRC_ALPHA_UP_0 +276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x199A //RX_TDDRC_HMNC_GAIN +279 0x0001 //RX_TDDRC_SMT_FLAG +280 0x0CCD //RX_TDDRC_SMT_W +281 0x0196 //RX_TDDRC_DRC_GAIN +195 0x001C //RX_FDEQ_SUBNUM +196 0x4848 //RX_FDEQ_GAIN_0 +197 0x4848 //RX_FDEQ_GAIN_1 +198 0x4848 //RX_FDEQ_GAIN_2 +199 0x4848 //RX_FDEQ_GAIN_3 +200 0x4848 //RX_FDEQ_GAIN_4 +201 0x4848 //RX_FDEQ_GAIN_5 +202 0x4848 //RX_FDEQ_GAIN_6 +203 0x4848 //RX_FDEQ_GAIN_7 +204 0x4848 //RX_FDEQ_GAIN_8 +205 0x4848 //RX_FDEQ_GAIN_9 +206 0x4848 //RX_FDEQ_GAIN_10 +207 0x4848 //RX_FDEQ_GAIN_11 +208 0x4848 //RX_FDEQ_GAIN_12 +209 0x4848 //RX_FDEQ_GAIN_13 +210 0x4848 //RX_FDEQ_GAIN_14 +211 0x4848 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0202 //RX_FDEQ_BIN_0 +221 0x0203 //RX_FDEQ_BIN_1 +222 0x0303 //RX_FDEQ_BIN_2 +223 0x0304 //RX_FDEQ_BIN_3 +224 0x0405 //RX_FDEQ_BIN_4 +225 0x0506 //RX_FDEQ_BIN_5 +226 0x0708 //RX_FDEQ_BIN_6 +227 0x090A //RX_FDEQ_BIN_7 +228 0x0B0C //RX_FDEQ_BIN_8 +229 0x0D0E //RX_FDEQ_BIN_9 +230 0x0E0F //RX_FDEQ_BIN_10 +231 0x0F10 //RX_FDEQ_BIN_11 +232 0x1011 //RX_FDEQ_BIN_12 +233 0x1104 //RX_FDEQ_BIN_13 +234 0x0000 //RX_FDEQ_BIN_14 +235 0x0000 //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x4000 //RX_FDEQ_RESRV_0 +245 0x0320 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0030 //RX_FDDRC_BAND_MARGIN_1 +248 0x0050 //RX_FDDRC_BAND_MARGIN_2 +249 0x0080 //RX_FDDRC_BAND_MARGIN_3 +250 0x0007 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x5000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x6400 //RX_FDDRC_THRD_3_2 +258 0x6400 //RX_FDDRC_THRD_3_3 +259 0x2000 //RX_FDDRC_SLANT_0_0 +260 0x2000 //RX_FDDRC_SLANT_0_1 +261 0x2000 //RX_FDDRC_SLANT_0_2 +262 0x2000 //RX_FDDRC_SLANT_0_3 +263 0x5333 //RX_FDDRC_SLANT_1_0 +264 0x5333 //RX_FDDRC_SLANT_1_1 +265 0x5333 //RX_FDDRC_SLANT_1_2 +266 0x5333 //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +286 0x0036 //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 +#VOL 4 +163 0x3000 //RX_TDDRC_ALPHA_UP_1 +164 0x3000 //RX_TDDRC_ALPHA_UP_2 +165 0x3000 //RX_TDDRC_ALPHA_UP_3 +166 0x3000 //RX_TDDRC_ALPHA_UP_4 +184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +190 0x7FFF //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +269 0x0000 //RX_TDDRC_THRD_0 +270 0x0000 //RX_TDDRC_THRD_1 +271 0x2000 //RX_TDDRC_THRD_2 +272 0x3000 //RX_TDDRC_THRD_3 +273 0x0800 //RX_TDDRC_SLANT_0 +274 0x7EB8 //RX_TDDRC_SLANT_1 +275 0x3000 //RX_TDDRC_ALPHA_UP_0 +276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x199A //RX_TDDRC_HMNC_GAIN +279 0x0001 //RX_TDDRC_SMT_FLAG +280 0x0CCD //RX_TDDRC_SMT_W +281 0x0196 //RX_TDDRC_DRC_GAIN +195 0x001C //RX_FDEQ_SUBNUM +196 0x4848 //RX_FDEQ_GAIN_0 +197 0x4848 //RX_FDEQ_GAIN_1 +198 0x4848 //RX_FDEQ_GAIN_2 +199 0x4848 //RX_FDEQ_GAIN_3 +200 0x4848 //RX_FDEQ_GAIN_4 +201 0x4848 //RX_FDEQ_GAIN_5 +202 0x4848 //RX_FDEQ_GAIN_6 +203 0x4848 //RX_FDEQ_GAIN_7 +204 0x4848 //RX_FDEQ_GAIN_8 +205 0x4848 //RX_FDEQ_GAIN_9 +206 0x4848 //RX_FDEQ_GAIN_10 +207 0x4848 //RX_FDEQ_GAIN_11 +208 0x4848 //RX_FDEQ_GAIN_12 +209 0x4848 //RX_FDEQ_GAIN_13 +210 0x4848 //RX_FDEQ_GAIN_14 +211 0x4848 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0202 //RX_FDEQ_BIN_0 +221 0x0203 //RX_FDEQ_BIN_1 +222 0x0303 //RX_FDEQ_BIN_2 +223 0x0304 //RX_FDEQ_BIN_3 +224 0x0405 //RX_FDEQ_BIN_4 +225 0x0506 //RX_FDEQ_BIN_5 +226 0x0708 //RX_FDEQ_BIN_6 +227 0x090A //RX_FDEQ_BIN_7 +228 0x0B0C //RX_FDEQ_BIN_8 +229 0x0D0E //RX_FDEQ_BIN_9 +230 0x0E0F //RX_FDEQ_BIN_10 +231 0x0F10 //RX_FDEQ_BIN_11 +232 0x1011 //RX_FDEQ_BIN_12 +233 0x1104 //RX_FDEQ_BIN_13 +234 0x0000 //RX_FDEQ_BIN_14 +235 0x0000 //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x4000 //RX_FDEQ_RESRV_0 +245 0x0320 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0030 //RX_FDDRC_BAND_MARGIN_1 +248 0x0050 //RX_FDDRC_BAND_MARGIN_2 +249 0x0080 //RX_FDDRC_BAND_MARGIN_3 +250 0x0007 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x5000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x6400 //RX_FDDRC_THRD_3_2 +258 0x6400 //RX_FDDRC_THRD_3_3 +259 0x2000 //RX_FDDRC_SLANT_0_0 +260 0x2000 //RX_FDDRC_SLANT_0_1 +261 0x2000 //RX_FDDRC_SLANT_0_2 +262 0x2000 //RX_FDDRC_SLANT_0_3 +263 0x5333 //RX_FDDRC_SLANT_1_0 +264 0x5333 //RX_FDDRC_SLANT_1_1 +265 0x5333 //RX_FDDRC_SLANT_1_2 +266 0x5333 //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +286 0x005B //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 +#VOL 5 +163 0x3000 //RX_TDDRC_ALPHA_UP_1 +164 0x3000 //RX_TDDRC_ALPHA_UP_2 +165 0x3000 //RX_TDDRC_ALPHA_UP_3 +166 0x3000 //RX_TDDRC_ALPHA_UP_4 +184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +190 0x7FFF //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +269 0x0000 //RX_TDDRC_THRD_0 +270 0x0000 //RX_TDDRC_THRD_1 +271 0x2000 //RX_TDDRC_THRD_2 +272 0x3000 //RX_TDDRC_THRD_3 +273 0x0800 //RX_TDDRC_SLANT_0 +274 0x7EB8 //RX_TDDRC_SLANT_1 +275 0x3000 //RX_TDDRC_ALPHA_UP_0 +276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x199A //RX_TDDRC_HMNC_GAIN +279 0x0001 //RX_TDDRC_SMT_FLAG +280 0x0CCD //RX_TDDRC_SMT_W +281 0x0196 //RX_TDDRC_DRC_GAIN +195 0x001C //RX_FDEQ_SUBNUM +196 0x4848 //RX_FDEQ_GAIN_0 +197 0x4848 //RX_FDEQ_GAIN_1 +198 0x4848 //RX_FDEQ_GAIN_2 +199 0x4848 //RX_FDEQ_GAIN_3 +200 0x4848 //RX_FDEQ_GAIN_4 +201 0x4848 //RX_FDEQ_GAIN_5 +202 0x4848 //RX_FDEQ_GAIN_6 +203 0x4848 //RX_FDEQ_GAIN_7 +204 0x4848 //RX_FDEQ_GAIN_8 +205 0x4848 //RX_FDEQ_GAIN_9 +206 0x4848 //RX_FDEQ_GAIN_10 +207 0x4848 //RX_FDEQ_GAIN_11 +208 0x4848 //RX_FDEQ_GAIN_12 +209 0x4848 //RX_FDEQ_GAIN_13 +210 0x4848 //RX_FDEQ_GAIN_14 +211 0x4848 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0202 //RX_FDEQ_BIN_0 +221 0x0203 //RX_FDEQ_BIN_1 +222 0x0303 //RX_FDEQ_BIN_2 +223 0x0304 //RX_FDEQ_BIN_3 +224 0x0405 //RX_FDEQ_BIN_4 +225 0x0506 //RX_FDEQ_BIN_5 +226 0x0708 //RX_FDEQ_BIN_6 +227 0x090A //RX_FDEQ_BIN_7 +228 0x0B0C //RX_FDEQ_BIN_8 +229 0x0D0E //RX_FDEQ_BIN_9 +230 0x0E0F //RX_FDEQ_BIN_10 +231 0x0F10 //RX_FDEQ_BIN_11 +232 0x1011 //RX_FDEQ_BIN_12 +233 0x1104 //RX_FDEQ_BIN_13 +234 0x0000 //RX_FDEQ_BIN_14 +235 0x0000 //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x4000 //RX_FDEQ_RESRV_0 +245 0x0320 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0030 //RX_FDDRC_BAND_MARGIN_1 +248 0x0050 //RX_FDDRC_BAND_MARGIN_2 +249 0x0080 //RX_FDDRC_BAND_MARGIN_3 +250 0x0007 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x5000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x6400 //RX_FDDRC_THRD_3_2 +258 0x6400 //RX_FDDRC_THRD_3_3 +259 0x2000 //RX_FDDRC_SLANT_0_0 +260 0x2000 //RX_FDDRC_SLANT_0_1 +261 0x2000 //RX_FDDRC_SLANT_0_2 +262 0x2000 //RX_FDDRC_SLANT_0_3 +263 0x5333 //RX_FDDRC_SLANT_1_0 +264 0x5333 //RX_FDDRC_SLANT_1_1 +265 0x5333 //RX_FDDRC_SLANT_1_2 +266 0x5333 //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +286 0x0099 //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 +#VOL 6 +163 0x3000 //RX_TDDRC_ALPHA_UP_1 +164 0x3000 //RX_TDDRC_ALPHA_UP_2 +165 0x3000 //RX_TDDRC_ALPHA_UP_3 +166 0x3000 //RX_TDDRC_ALPHA_UP_4 +184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +190 0x7FFF //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +269 0x0000 //RX_TDDRC_THRD_0 +270 0x0000 //RX_TDDRC_THRD_1 +271 0x2000 //RX_TDDRC_THRD_2 +272 0x3000 //RX_TDDRC_THRD_3 +273 0x0800 //RX_TDDRC_SLANT_0 +274 0x7EB8 //RX_TDDRC_SLANT_1 +275 0x3000 //RX_TDDRC_ALPHA_UP_0 +276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x199A //RX_TDDRC_HMNC_GAIN +279 0x0001 //RX_TDDRC_SMT_FLAG +280 0x0CCD //RX_TDDRC_SMT_W +281 0x0196 //RX_TDDRC_DRC_GAIN +195 0x001C //RX_FDEQ_SUBNUM +196 0x4848 //RX_FDEQ_GAIN_0 +197 0x4848 //RX_FDEQ_GAIN_1 +198 0x4848 //RX_FDEQ_GAIN_2 +199 0x4848 //RX_FDEQ_GAIN_3 +200 0x4848 //RX_FDEQ_GAIN_4 +201 0x4848 //RX_FDEQ_GAIN_5 +202 0x4848 //RX_FDEQ_GAIN_6 +203 0x4848 //RX_FDEQ_GAIN_7 +204 0x4848 //RX_FDEQ_GAIN_8 +205 0x4848 //RX_FDEQ_GAIN_9 +206 0x4848 //RX_FDEQ_GAIN_10 +207 0x4848 //RX_FDEQ_GAIN_11 +208 0x4848 //RX_FDEQ_GAIN_12 +209 0x4848 //RX_FDEQ_GAIN_13 +210 0x4848 //RX_FDEQ_GAIN_14 +211 0x4848 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0202 //RX_FDEQ_BIN_0 +221 0x0203 //RX_FDEQ_BIN_1 +222 0x0303 //RX_FDEQ_BIN_2 +223 0x0304 //RX_FDEQ_BIN_3 +224 0x0405 //RX_FDEQ_BIN_4 +225 0x0506 //RX_FDEQ_BIN_5 +226 0x0708 //RX_FDEQ_BIN_6 +227 0x090A //RX_FDEQ_BIN_7 +228 0x0B0C //RX_FDEQ_BIN_8 +229 0x0D0E //RX_FDEQ_BIN_9 +230 0x0E0F //RX_FDEQ_BIN_10 +231 0x0F10 //RX_FDEQ_BIN_11 +232 0x1011 //RX_FDEQ_BIN_12 +233 0x1104 //RX_FDEQ_BIN_13 +234 0x0000 //RX_FDEQ_BIN_14 +235 0x0000 //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x4000 //RX_FDEQ_RESRV_0 +245 0x0320 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0030 //RX_FDDRC_BAND_MARGIN_1 +248 0x0050 //RX_FDDRC_BAND_MARGIN_2 +249 0x0080 //RX_FDDRC_BAND_MARGIN_3 +250 0x0007 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x5000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x6400 //RX_FDDRC_THRD_3_2 +258 0x6400 //RX_FDDRC_THRD_3_3 +259 0x2000 //RX_FDDRC_SLANT_0_0 +260 0x2000 //RX_FDDRC_SLANT_0_1 +261 0x2000 //RX_FDDRC_SLANT_0_2 +262 0x2000 //RX_FDDRC_SLANT_0_3 +263 0x5333 //RX_FDDRC_SLANT_1_0 +264 0x5333 //RX_FDDRC_SLANT_1_1 +265 0x5333 //RX_FDDRC_SLANT_1_2 +266 0x5333 //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +286 0x0100 //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 #CASE_NAME HEADSET-GOOGLE_CONDOR_HEADPHONE-VOICE_GENERIC-SWB -#PARAM_MODE FULL -#PARAM_TYPE TX+RX -#TOTAL_CUSTOM_STEP 7 +#PARAM_MODE Full +#PARAM_TYPE TX+2RX +#TOTAL_CUSTOM_STEP 7+7 #TX 0 0x0001 //TX_OPERATION_MODE_0 1 0x0001 //TX_OPERATION_MODE_1 2 0x0033 //TX_PATCH_REG -3 0x2F7C //TX_SENDFUNC_MODE_0 +3 0x6F7C //TX_SENDFUNC_MODE_0 4 0x0001 //TX_SENDFUNC_MODE_1 -5 0x0003 //TX_NUM_MIC +5 0x0002 //TX_NUM_MIC 6 0x0003 //TX_SAMPLINGFREQ_SIG 7 0x0003 //TX_SAMPLINGFREQ_PROC 8 0x000A //TX_FRAME_SZ_SIG @@ -24585,8 +37409,8 @@ 18 0x0000 //TX_SYS_RESRV_2 19 0x0000 //TX_SYS_RESRV_3 20 0x0000 //TX_DIST2REF0 -21 0x00A4 //TX_DIST2REF1 -22 0x0017 //TX_DIST2REF_02 +21 0x009D //TX_DIST2REF1 +22 0x0010 //TX_DIST2REF_02 23 0x0000 //TX_DIST2REF_03 24 0x0000 //TX_DIST2REF_04 25 0x0000 //TX_DIST2REF_05 @@ -24692,7 +37516,7 @@ 125 0x6000 //TX_C_POST_FLT_MIC_MAINBLK 126 0x6000 //TX_C_POST_FLT_MIC_REFBLK 127 0x0010 //TX_MIC_BLOCK_N -128 0x7B02 //TX_A_HP +128 0x7D83 //TX_A_HP 129 0x4000 //TX_B_PE 130 0x5000 //TX_THR_PITCH_DET_0 131 0x4800 //TX_THR_PITCH_DET_1 @@ -24729,8 +37553,8 @@ 162 0x7800 //TX_MIN_EQ_RE_EST_10 163 0x7800 //TX_MIN_EQ_RE_EST_11 164 0x7800 //TX_MIN_EQ_RE_EST_12 -165 0x4000 //TX_LAMBDA_RE_EST -166 0x3000 //TX_LAMBDA_CB_NLE +165 0x0880 //TX_LAMBDA_RE_EST +166 0x7FFF //TX_LAMBDA_CB_NLE 167 0x7FFF //TX_C_POST_FLT 168 0x4000 //TX_GAIN_NP 169 0x0180 //TX_SE_HOLD_N @@ -24789,16 +37613,16 @@ 222 0x023E //TX_ADPT_STRICT_H 223 0x0BB8 //TX_RATIO_DT_L_TH_LOW 224 0x3A98 //TX_RATIO_DT_H_TH_LOW -225 0x1F40 //TX_RATIO_DT_L_TH_HIGH -226 0x6590 //TX_RATIO_DT_H_TH_HIGH +225 0x1770 //TX_RATIO_DT_L_TH_HIGH +226 0x733C //TX_RATIO_DT_H_TH_HIGH 227 0x09C4 //TX_RATIO_DT_L0_TH -228 0x2000 //TX_B_POST_FILT_ECHO_L -229 0x1000 //TX_B_POST_FILT_ECHO_H +228 0x7FFF //TX_B_POST_FILT_ECHO_L +229 0x7FFF //TX_B_POST_FILT_ECHO_H 230 0x0200 //TX_MIN_G_CTRL_ECHO 231 0x1000 //TX_B_LESSCUT_RTO_ECHO 232 0x0000 //TX_EPD_OFFSET_00 233 0x0000 //TX_EPD_OFFST_01 -234 0x2328 //TX_RATIO_DT_L0_TH_HIGH +234 0x3A98 //TX_RATIO_DT_L0_TH_HIGH 235 0x7FFF //TX_RATIO_DT_H_TH_CUT 236 0x7FFF //TX_MIN_EQ_RE_EST_13 237 0x0000 //TX_DTD_THR1_7 @@ -24806,7 +37630,7 @@ 239 0x0800 //TX_DT_RESRV_7 240 0x0800 //TX_DT_RESRV_8 241 0x0000 //TX_DT_RESRV_9 -242 0xF800 //TX_THR_SN_EST_0 +242 0xFA00 //TX_THR_SN_EST_0 243 0xFA00 //TX_THR_SN_EST_1 244 0xFA00 //TX_THR_SN_EST_2 245 0xFA00 //TX_THR_SN_EST_3 @@ -24817,10 +37641,10 @@ 250 0x0100 //TX_DELTA_THR_SN_EST_0 251 0x0100 //TX_DELTA_THR_SN_EST_1 252 0x0100 //TX_DELTA_THR_SN_EST_2 -253 0x0100 //TX_DELTA_THR_SN_EST_3 -254 0x0000 //TX_DELTA_THR_SN_EST_4 -255 0x0100 //TX_DELTA_THR_SN_EST_5 -256 0x0200 //TX_DELTA_THR_SN_EST_6 +253 0x0000 //TX_DELTA_THR_SN_EST_3 +254 0x0100 //TX_DELTA_THR_SN_EST_4 +255 0x0200 //TX_DELTA_THR_SN_EST_5 +256 0x0100 //TX_DELTA_THR_SN_EST_6 257 0x0200 //TX_DELTA_THR_SN_EST_7 258 0x4000 //TX_LAMBDA_NN_EST_0 259 0x4000 //TX_LAMBDA_NN_EST_1 @@ -24847,11 +37671,11 @@ 280 0x1000 //TX_B_POST_FLT_1 281 0x0010 //TX_NS_LVL_CTRL_0 282 0x003C //TX_NS_LVL_CTRL_1 -283 0x003C //TX_NS_LVL_CTRL_2 -284 0x0024 //TX_NS_LVL_CTRL_3 -285 0x003C //TX_NS_LVL_CTRL_4 -286 0x0014 //TX_NS_LVL_CTRL_5 -287 0x0011 //TX_NS_LVL_CTRL_6 +283 0x0024 //TX_NS_LVL_CTRL_2 +284 0x003C //TX_NS_LVL_CTRL_3 +285 0x0014 //TX_NS_LVL_CTRL_4 +286 0x0011 //TX_NS_LVL_CTRL_5 +287 0x003C //TX_NS_LVL_CTRL_6 288 0x0011 //TX_NS_LVL_CTRL_7 289 0x000F //TX_MIN_GAIN_S_0 290 0x0010 //TX_MIN_GAIN_S_1 @@ -24867,10 +37691,10 @@ 300 0x7FFF //TX_SNRI_SUP_0 301 0x1400 //TX_SNRI_SUP_1 302 0x1400 //TX_SNRI_SUP_2 -303 0x1400 //TX_SNRI_SUP_3 +303 0x4000 //TX_SNRI_SUP_3 304 0x4000 //TX_SNRI_SUP_4 -305 0x4000 //TX_SNRI_SUP_5 -306 0x50C0 //TX_SNRI_SUP_6 +305 0x50C0 //TX_SNRI_SUP_5 +306 0x1400 //TX_SNRI_SUP_6 307 0x7FFF //TX_SNRI_SUP_7 308 0x7FFF //TX_THR_LFNS 309 0x0018 //TX_G_LFNS @@ -24879,19 +37703,19 @@ 312 0x7FFF //TX_A_POST_FILT_0 313 0x2000 //TX_A_POST_FILT_1 314 0x5000 //TX_A_POST_FILT_S_0 -315 0x7C00 //TX_A_POST_FILT_S_1 -316 0x4C00 //TX_A_POST_FILT_S_2 -317 0x4000 //TX_A_POST_FILT_S_3 -318 0x6000 //TX_A_POST_FILT_S_4 -319 0x4000 //TX_A_POST_FILT_S_5 -320 0x5000 //TX_A_POST_FILT_S_6 +315 0x4C00 //TX_A_POST_FILT_S_1 +316 0x4000 //TX_A_POST_FILT_S_2 +317 0x6000 //TX_A_POST_FILT_S_3 +318 0x4000 //TX_A_POST_FILT_S_4 +319 0x5000 //TX_A_POST_FILT_S_5 +320 0x7C00 //TX_A_POST_FILT_S_6 321 0x7000 //TX_A_POST_FILT_S_7 322 0x2000 //TX_B_POST_FILT_0 -323 0x1000 //TX_B_POST_FILT_1 +323 0x6000 //TX_B_POST_FILT_1 324 0x6000 //TX_B_POST_FILT_2 325 0x6000 //TX_B_POST_FILT_3 -326 0x6000 //TX_B_POST_FILT_4 -327 0x4000 //TX_B_POST_FILT_5 +326 0x4000 //TX_B_POST_FILT_4 +327 0x1000 //TX_B_POST_FILT_5 328 0x1000 //TX_B_POST_FILT_6 329 0x2000 //TX_B_POST_FILT_7 330 0x4000 //TX_B_LESSCUT_RTO_S_0 @@ -24899,8 +37723,8 @@ 332 0x7FFF //TX_B_LESSCUT_RTO_S_2 333 0x7FFF //TX_B_LESSCUT_RTO_S_3 334 0x7FFF //TX_B_LESSCUT_RTO_S_4 -335 0x7FFF //TX_B_LESSCUT_RTO_S_5 -336 0x6000 //TX_B_LESSCUT_RTO_S_6 +335 0x6000 //TX_B_LESSCUT_RTO_S_5 +336 0x7FFF //TX_B_LESSCUT_RTO_S_6 337 0x7FFF //TX_B_LESSCUT_RTO_S_7 338 0x7C00 //TX_LAMBDA_PFILT 339 0x7D00 //TX_LAMBDA_PFILT_S_0 @@ -24931,7 +37755,7 @@ 364 0x0000 //TX_K_APT 365 0x0001 //TX_NOISEDET 366 0x0064 //TX_NDETCT -367 0x0050 //TX_NOISE_TH_0 +367 0x0383 //TX_NOISE_TH_0 368 0x7FFF //TX_NOISE_TH_0_2 369 0x7FFF //TX_NOISE_TH_0_3 370 0x07D0 //TX_NOISE_TH_1 @@ -24943,11 +37767,11 @@ 376 0x0000 //TX_NOISE_TH_5_3 377 0x7FFF //TX_NOISE_TH_5_4 378 0x0DAC //TX_NOISE_TH_6 -379 0x0050 //TX_MINENOISE_TH -380 0x4000 //TX_MINENOISE_MIC0_TH_MTS -381 0xFFEE //TX_MINENOISE_MIC0_TH_EXP -382 0x6000 //TX_MINENOISE_MIC0_S_TH_MTS -383 0xFFF3 //TX_MINENOISE_MIC0_S_TH_EXP +379 0x044C //TX_MINENOISE_TH +380 0xD508 //TX_MORENS_TFMASK_TH +381 0x0001 //TX_DRC_QUIET_FLOOR +382 0x3A98 //TX_RATIODTL_CUT_TH +383 0x0DAC //TX_DT_CUT_K1 384 0x0666 //TX_OUT_ENER_S_TH_CLEAN 385 0x0666 //TX_OUT_ENER_S_TH_LESSCLEAN 386 0x0333 //TX_OUT_ENER_S_TH_NOISY @@ -24955,22 +37779,22 @@ 388 0x0333 //TX_OUT_ENER_TH_SPEECH 389 0x2000 //TX_SN_NPB_GAIN 390 0x0000 //TX_NN_NPB_GAIN -391 0x0000 //TX_CSX_ALPHA_0 -392 0x0000 //TX_CSX_ALPHA_1 -393 0x0000 //TX_CSX_ALPHA_2 -394 0x0000 //TX_CSX_ALPHA_3 -395 0x0800 //TX_MU_ARSP_EST -396 0x00C8 //TX_P_OUTBEAM_MIN_TH +391 0x7FFF //TX_POST_MASK_SUP_HSNE +392 0x1388 //TX_TAIL_DET_TH +393 0x4000 //TX_B_LESSCUT_RTO_WTA +394 0x0000 //TX_MEL_G_R +395 0x0080 //TX_SUPHIGH_TH +396 0x0000 //TX_MASK_G_R 397 0x0002 //TX_EXTRA_NS_L -398 0x0800 //TX_EXTRA_NS_A -399 0x0005 //TX_VR_NOISE_FLOOR_TH +398 0x1800 //TX_C_POST_FLT_MASK +399 0x7FFF //TX_A_POST_FLT_WNS 400 0x0148 //TX_MIN_G_LOW300HZ -401 0x0001 //TX_MAXLEVEL_CNG +401 0x0004 //TX_MAXLEVEL_CNG 402 0x00B4 //TX_STN_NOISE_TH 403 0x4000 //TX_POST_MASK_SUP 404 0x7FFF //TX_POST_MASK_ADJUST 405 0x00C8 //TX_NS_ENOISE_MIC0_TH -406 0x0050 //TX_MINENOISE_MIC0_TH +406 0x02F3 //TX_MINENOISE_MIC0_TH 407 0x012C //TX_MINENOISE_MIC0_S_TH 408 0x4000 //TX_MIN_G_CTRL_SSNS 409 0x0000 //TX_METAL_RTO_THR @@ -25078,16 +37902,16 @@ 511 0x6666 //TX_MIC_TO_BFGAIN 512 0x0000 //TX_MICTOBFGAIN0 513 0x0000 //TX_FASTMUE_TH -514 0x0000 //TX_DERVB_LEN_0 -515 0x0000 //TX_DERVB_LEN_1 -516 0x0000 //TX_RHO_DERVB -517 0x0000 //TX_MIC_INDX_DERVB -518 0x0000 //TX_MU_DERVB -519 0x0000 //TX_DR_RESRV_0 -520 0x0000 //TX_DR_RESRV_1 -521 0x0000 //TX_DR_RESRV_2 -522 0x0000 //TX_DR_RESRV_3 -523 0x0000 //TX_DR_RESRV_4 +514 0xC000 //TX_DEREVERB_LF_MU +515 0xC000 //TX_DEREVERB_HF_MU +516 0xCCCC //TX_DEREVERB_DELAY +517 0xD999 //TX_DEREVERB_COEF_LEN +518 0x1F40 //TX_DEREVERB_DNR +519 0x0000 //TX_DEREVERB_ALPHA +520 0x0000 //TX_DEREVERB_BETA +521 0x0000 //TX_GSC_RTOL_TH +522 0x7000 //TX_GSC_RTOH_TH +523 0x0064 //TX_WIDE2_MEANHTH 524 0x0000 //TX_DR_RESRV_5 525 0x0000 //TX_DR_RESRV_6 526 0x0000 //TX_DR_RESRV_7 @@ -25131,22 +37955,22 @@ 564 0x0000 //TX_PB_RESRV_0 565 0x0000 //TX_PB_RESRV_1 566 0x0020 //TX_FDEQ_SUBNUM -567 0x4848 //TX_FDEQ_GAIN_0 -568 0x4848 //TX_FDEQ_GAIN_1 +567 0x5450 //TX_FDEQ_GAIN_0 +568 0x4C48 //TX_FDEQ_GAIN_1 569 0x4850 //TX_FDEQ_GAIN_2 570 0x5050 //TX_FDEQ_GAIN_3 571 0x4848 //TX_FDEQ_GAIN_4 -572 0x484A //TX_FDEQ_GAIN_5 +572 0x484E //TX_FDEQ_GAIN_5 573 0x4E5E //TX_FDEQ_GAIN_6 -574 0x5C4C //TX_FDEQ_GAIN_7 +574 0x584E //TX_FDEQ_GAIN_7 575 0x4C4E //TX_FDEQ_GAIN_8 -576 0x4844 //TX_FDEQ_GAIN_9 -577 0x4448 //TX_FDEQ_GAIN_10 -578 0x4850 //TX_FDEQ_GAIN_11 -579 0x5C6A //TX_FDEQ_GAIN_12 -580 0x5A84 //TX_FDEQ_GAIN_13 -581 0x7880 //TX_FDEQ_GAIN_14 -582 0x7F7F //TX_FDEQ_GAIN_15 +576 0x564E //TX_FDEQ_GAIN_9 +577 0x5058 //TX_FDEQ_GAIN_10 +578 0x625C //TX_FDEQ_GAIN_11 +579 0x6C6C //TX_FDEQ_GAIN_12 +580 0x7086 //TX_FDEQ_GAIN_13 +581 0x869C //TX_FDEQ_GAIN_14 +582 0xB0B0 //TX_FDEQ_GAIN_15 583 0x4848 //TX_FDEQ_GAIN_16 584 0x4848 //TX_FDEQ_GAIN_17 585 0x4848 //TX_FDEQ_GAIN_18 @@ -25170,7 +37994,7 @@ 603 0x1B1E //TX_FDEQ_BIN_12 604 0x1E1E //TX_FDEQ_BIN_13 605 0x1E28 //TX_FDEQ_BIN_14 -606 0x282C //TX_FDEQ_BIN_15 +606 0x284A //TX_FDEQ_BIN_15 607 0x0000 //TX_FDEQ_BIN_16 608 0x0000 //TX_FDEQ_BIN_17 609 0x0000 //TX_FDEQ_BIN_18 @@ -25188,15 +38012,15 @@ 621 0x4848 //TX_PREEQ_GAIN_MIC0_4 622 0x4848 //TX_PREEQ_GAIN_MIC0_5 623 0x4848 //TX_PREEQ_GAIN_MIC0_6 -624 0x484A //TX_PREEQ_GAIN_MIC0_7 -625 0x4C4E //TX_PREEQ_GAIN_MIC0_8 -626 0x5054 //TX_PREEQ_GAIN_MIC0_9 -627 0x5658 //TX_PREEQ_GAIN_MIC0_10 -628 0x5C5C //TX_PREEQ_GAIN_MIC0_11 -629 0x6474 //TX_PREEQ_GAIN_MIC0_12 -630 0x7870 //TX_PREEQ_GAIN_MIC0_13 -631 0x5C48 //TX_PREEQ_GAIN_MIC0_14 -632 0x383C //TX_PREEQ_GAIN_MIC0_15 +624 0x4848 //TX_PREEQ_GAIN_MIC0_7 +625 0x494A //TX_PREEQ_GAIN_MIC0_8 +626 0x4B4C //TX_PREEQ_GAIN_MIC0_9 +627 0x4B4A //TX_PREEQ_GAIN_MIC0_10 +628 0x484B //TX_PREEQ_GAIN_MIC0_11 +629 0x4C4C //TX_PREEQ_GAIN_MIC0_12 +630 0x4B48 //TX_PREEQ_GAIN_MIC0_13 +631 0x3838 //TX_PREEQ_GAIN_MIC0_14 +632 0x3835 //TX_PREEQ_GAIN_MIC0_15 633 0x4848 //TX_PREEQ_GAIN_MIC0_16 634 0x4848 //TX_PREEQ_GAIN_MIC0_17 635 0x4848 //TX_PREEQ_GAIN_MIC0_18 @@ -25237,15 +38061,15 @@ 670 0x4848 //TX_PREEQ_GAIN_MIC1_4 671 0x4848 //TX_PREEQ_GAIN_MIC1_5 672 0x4848 //TX_PREEQ_GAIN_MIC1_6 -673 0x4848 //TX_PREEQ_GAIN_MIC1_7 -674 0x4848 //TX_PREEQ_GAIN_MIC1_8 -675 0x4848 //TX_PREEQ_GAIN_MIC1_9 -676 0x4848 //TX_PREEQ_GAIN_MIC1_10 -677 0x4848 //TX_PREEQ_GAIN_MIC1_11 -678 0x4848 //TX_PREEQ_GAIN_MIC1_12 -679 0x4848 //TX_PREEQ_GAIN_MIC1_13 -680 0x4848 //TX_PREEQ_GAIN_MIC1_14 -681 0x4848 //TX_PREEQ_GAIN_MIC1_15 +673 0x4846 //TX_PREEQ_GAIN_MIC1_7 +674 0x4544 //TX_PREEQ_GAIN_MIC1_8 +675 0x4241 //TX_PREEQ_GAIN_MIC1_9 +676 0x403E //TX_PREEQ_GAIN_MIC1_10 +677 0x3D3C //TX_PREEQ_GAIN_MIC1_11 +678 0x3C3C //TX_PREEQ_GAIN_MIC1_12 +679 0x3C39 //TX_PREEQ_GAIN_MIC1_13 +680 0x3838 //TX_PREEQ_GAIN_MIC1_14 +681 0x3A3C //TX_PREEQ_GAIN_MIC1_15 682 0x4848 //TX_PREEQ_GAIN_MIC1_16 683 0x4848 //TX_PREEQ_GAIN_MIC1_17 684 0x4848 //TX_PREEQ_GAIN_MIC1_18 @@ -25254,22 +38078,22 @@ 687 0x4848 //TX_PREEQ_GAIN_MIC1_21 688 0x4848 //TX_PREEQ_GAIN_MIC1_22 689 0x4848 //TX_PREEQ_GAIN_MIC1_23 -690 0x251A //TX_PREEQ_BIN_MIC1_0 -691 0x0F0F //TX_PREEQ_BIN_MIC1_1 -692 0x0C0C //TX_PREEQ_BIN_MIC1_2 -693 0x0C0F //TX_PREEQ_BIN_MIC1_3 -694 0x0F0F //TX_PREEQ_BIN_MIC1_4 -695 0x0F09 //TX_PREEQ_BIN_MIC1_5 -696 0x0909 //TX_PREEQ_BIN_MIC1_6 -697 0x0908 //TX_PREEQ_BIN_MIC1_7 -698 0x070F //TX_PREEQ_BIN_MIC1_8 -699 0x1F08 //TX_PREEQ_BIN_MIC1_9 -700 0x0808 //TX_PREEQ_BIN_MIC1_10 -701 0x0920 //TX_PREEQ_BIN_MIC1_11 -702 0x2020 //TX_PREEQ_BIN_MIC1_12 -703 0x2021 //TX_PREEQ_BIN_MIC1_13 -704 0x0000 //TX_PREEQ_BIN_MIC1_14 -705 0x0000 //TX_PREEQ_BIN_MIC1_15 +690 0x0202 //TX_PREEQ_BIN_MIC1_0 +691 0x0203 //TX_PREEQ_BIN_MIC1_1 +692 0x0303 //TX_PREEQ_BIN_MIC1_2 +693 0x0304 //TX_PREEQ_BIN_MIC1_3 +694 0x0405 //TX_PREEQ_BIN_MIC1_4 +695 0x0506 //TX_PREEQ_BIN_MIC1_5 +696 0x0708 //TX_PREEQ_BIN_MIC1_6 +697 0x090A //TX_PREEQ_BIN_MIC1_7 +698 0x0B0C //TX_PREEQ_BIN_MIC1_8 +699 0x0D0E //TX_PREEQ_BIN_MIC1_9 +700 0x1013 //TX_PREEQ_BIN_MIC1_10 +701 0x1719 //TX_PREEQ_BIN_MIC1_11 +702 0x1B1E //TX_PREEQ_BIN_MIC1_12 +703 0x1E1E //TX_PREEQ_BIN_MIC1_13 +704 0x1E28 //TX_PREEQ_BIN_MIC1_14 +705 0x282C //TX_PREEQ_BIN_MIC1_15 706 0x0000 //TX_PREEQ_BIN_MIC1_16 707 0x0000 //TX_PREEQ_BIN_MIC1_17 708 0x0000 //TX_PREEQ_BIN_MIC1_18 @@ -25355,7 +38179,7 @@ 788 0x7EB8 //TX_TDDRC_ALPHA_DWN_02 789 0x7EB8 //TX_TDDRC_ALPHA_DWN_03 790 0x7EB8 //TX_TDDRC_ALPHA_DWN_04 -791 0x7FFF //TX_TDDRC_TD_DRC_LIMIT +791 0x7214 //TX_TDDRC_TD_DRC_LIMIT 792 0x0800 //TX_TDDRC_POST_LIMIT_GAIN 793 0x0000 //TX_TDDRC_RESRV_0 794 0x0000 //TX_TDDRC_RESRV_1 @@ -25418,12 +38242,12 @@ 851 0x0000 //TX_FFP_RESRV_5 852 0x0000 //TX_FFP_RESRV_6 853 0x0002 //TX_FILTINDX -854 0x0001 //TX_TDDRC_THRD_0 -855 0x0002 //TX_TDDRC_THRD_1 -856 0x1000 //TX_TDDRC_THRD_2 -857 0x1000 //TX_TDDRC_THRD_3 -858 0x6000 //TX_TDDRC_SLANT_0 -859 0x6000 //TX_TDDRC_SLANT_1 +854 0x0003 //TX_TDDRC_THRD_0 +855 0x0004 //TX_TDDRC_THRD_1 +856 0x1800 //TX_TDDRC_THRD_2 +857 0x1800 //TX_TDDRC_THRD_3 +858 0x7FFF //TX_TDDRC_SLANT_0 +859 0x7FFF //TX_TDDRC_SLANT_1 860 0x0800 //TX_TDDRC_ALPHA_UP_00 861 0x7EB8 //TX_TDDRC_ALPHA_DWN_00 862 0x0000 //TX_TDDRC_HMNC_FLAG @@ -25453,7 +38277,7 @@ 886 0x0CCD //TX_FASTNS_TFMASKBIN_TH2 887 0x0CCD //TX_FASTNS_TFMASKBIN_TH3 888 0x00C8 //TX_FASTNS_ARSPC_TH -889 0xC000 //TX_FASTNS_MASK5_TH +889 0x8000 //TX_FASTNS_MASK5_TH 890 0x4848 //TX_POSTSSA_MIN_G_VR_MASK 891 0x4000 //TX_A_LESSCUT_RTO_MASK 892 0x1770 //TX_FASTNS_NOISETH @@ -25461,8 +38285,73 @@ 894 0xC000 //TX_FASTNS_SSA_THHFL 895 0xCCCC //TX_FASTNS_SSA_THLFH 896 0xD999 //TX_FASTNS_SSA_THHFH +897 0x2339 //TX_SENDFUNC_REG_MICMUTE +898 0x0021 //TX_SENDFUNC_REG_MICMUTE1 +899 0x02BC //TX_MICMUTE_RATIO_THR +900 0x0140 //TX_MICMUTE_AMP_THR +901 0x0004 //TX_MICMUTE_HPF_IND +902 0x00C0 //TX_MICMUTE_LOG_EYR_TH +903 0x0008 //TX_MICMUTE_CVG_TIME +904 0x0008 //TX_MICMUTE_RELEASE_TIME +905 0x01FE //TX_MIC_VOLUME_MIC0MUTE +906 0x0020 //TX_MICMUTE_EPD_OFFSET_0 +907 0x001E //TX_MICMUTE_FRQ_AEC_L +908 0x7999 //TX_MICMUTE_EAD_THR +909 0x7FFF //TX_MICMUTE_LAMBDA_CB_NLE +910 0x7FFF //TX_MICMUTE_LAMBDA_RE_EST +911 0x4000 //TX_DTD_THR1_MICMUTE_0 +912 0x7000 //TX_DTD_THR1_MICMUTE_1 +913 0x7FFF //TX_DTD_THR1_MICMUTE_2 +914 0x7FFF //TX_DTD_THR1_MICMUTE_3 +915 0x6CCC //TX_DTD_THR2_MICMUTE_0 +916 0x0400 //TX_MICMUTE_MIN_EQ_RE_EST_0 +917 0x0400 //TX_MICMUTE_MIN_EQ_RE_EST_1 +918 0x1000 //TX_MICMUTE_MIN_EQ_RE_EST_2 +919 0x7FFF //TX_MICMUTE_MIN_EQ_RE_EST_3 +920 0x7FFF //TX_MICMUTE_MIN_EQ_RE_EST_4 +921 0x4000 //TX_MICMUTE_C_POST_FLT +922 0x03E8 //TX_MICMUTE_DT_CUT_K +923 0x0001 //TX_MICMUTE_DT_CUT_THR +924 0x03E8 //TX_MICMUTE_DT_CUT_K2 +925 0x0001 //TX_MICMUTE_DT_CUT_THR2 +926 0x0064 //TX_MICMUTE_DT2_HOLD_N +927 0x1000 //TX_MICMUTE_RATIODTH_THCUT +928 0x1000 //TX_MICMUTE_B_POST_FLT_ECHOL +929 0x7FFF //TX_MICMUTE_B_POST_FLT_ECHOH +930 0x0400 //TX_MICMUTE_C_POST_FLT_MASK +931 0x7999 //TX_MICMUTE_RATIODTL_CUT_TH +932 0x0258 //TX_MICMUTE_DT_CUT_K1 +933 0x0800 //TX_MICMUTE_N2_SN_EST +934 0xFC00 //TX_MICMUTE_THR_SN_EST_0 +935 0x001C //TX_MICMUTE_MIN_G_CTRL_0 +936 0x6000 //TX_MICMUTE_A_POST_FILT_S_0 +937 0x7000 //TX_MICMUTE_B_POST_FILT_0 +938 0x2710 //TX_MIC1RUB_AMP_THR +939 0x0010 //TX_MIC1MUTE_RATIO_THR +940 0x0450 //TX_MIC1MUTE_AMP_THR +941 0x0008 //TX_MIC1MUTE_CVG_TIME +942 0x0008 //TX_MIC1MUTE_RELEASE_TIME +943 0x0000 //TX_AMS_RESRV_01 +944 0x0000 //TX_AMS_RESRV_02 +945 0x0000 //TX_AMS_RESRV_03 +946 0x0000 //TX_AMS_RESRV_04 +947 0x0000 //TX_AMS_RESRV_05 +948 0x0000 //TX_AMS_RESRV_06 +949 0x0000 //TX_AMS_RESRV_07 +950 0x0000 //TX_AMS_RESRV_08 +951 0x0000 //TX_AMS_RESRV_09 +952 0x0000 //TX_AMS_RESRV_10 +953 0x0000 //TX_AMS_RESRV_11 +954 0x0000 //TX_AMS_RESRV_12 +955 0x0000 //TX_AMS_RESRV_13 +956 0x0000 //TX_AMS_RESRV_14 +957 0x0000 //TX_AMS_RESRV_15 +958 0x0000 //TX_AMS_RESRV_16 +959 0x0000 //TX_AMS_RESRV_17 +960 0x0000 //TX_AMS_RESRV_18 +961 0x0000 //TX_AMS_RESRV_19 #RX -0 0x002C //RX_RECVFUNC_MODE_0 +0 0x202C //RX_RECVFUNC_MODE_0 1 0x0000 //RX_RECVFUNC_MODE_1 2 0x0003 //RX_SAMPLINGFREQ_SIG 3 0x0003 //RX_SAMPLINGFREQ_PROC @@ -26312,18 +39201,869 @@ 110 0x0000 //RX_FDDRC_RESRV_0 129 0x0100 //RX_SPK_VOL 130 0x0000 //RX_VOL_RESRV_0 +#RX 2 +157 0x202C //RX_RECVFUNC_MODE_0 +158 0x0000 //RX_RECVFUNC_MODE_1 +159 0x0003 //RX_SAMPLINGFREQ_SIG +160 0x0003 //RX_SAMPLINGFREQ_PROC +161 0x000A //RX_FRAME_SZ +162 0x0000 //RX_DELAY_OPT +163 0x5000 //RX_TDDRC_ALPHA_UP_1 +164 0x5000 //RX_TDDRC_ALPHA_UP_2 +165 0x5000 //RX_TDDRC_ALPHA_UP_3 +166 0x2000 //RX_TDDRC_ALPHA_UP_4 +167 0x0800 //RX_PGA +168 0x7FFF //RX_A_HP +169 0x0000 //RX_B_PE +170 0x1800 //RX_THR_PITCH_DET_0 +171 0x1000 //RX_THR_PITCH_DET_1 +172 0x0800 //RX_THR_PITCH_DET_2 +173 0x0008 //RX_PITCH_BFR_LEN +174 0x0003 //RX_SBD_PITCH_DET +175 0x0100 //RX_PP_RESRV_0 +176 0x0020 //RX_PP_RESRV_1 +177 0x0400 //RX_N_SN_EST +178 0x000C //RX_N2_SN_EST +179 0x0003 //RX_NS_LVL_CTRL +180 0x9000 //RX_THR_SN_EST +181 0x7CCD //RX_LAMBDA_PFILT +182 0x000A //RX_FENS_RESRV_0 +183 0x0190 //RX_FENS_RESRV_1 +184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +187 0x0002 //RX_EXTRA_NS_L +188 0x0800 //RX_EXTRA_NS_A +189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +190 0x65AD //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +192 0x199A //RX_A_POST_FLT +193 0x0000 //RX_LMT_THRD +194 0x4000 //RX_LMT_ALPHA +195 0x0020 //RX_FDEQ_SUBNUM +196 0x4848 //RX_FDEQ_GAIN_0 +197 0x4848 //RX_FDEQ_GAIN_1 +198 0x4848 //RX_FDEQ_GAIN_2 +199 0x4848 //RX_FDEQ_GAIN_3 +200 0x4848 //RX_FDEQ_GAIN_4 +201 0x4848 //RX_FDEQ_GAIN_5 +202 0x4848 //RX_FDEQ_GAIN_6 +203 0x4848 //RX_FDEQ_GAIN_7 +204 0x4848 //RX_FDEQ_GAIN_8 +205 0x4848 //RX_FDEQ_GAIN_9 +206 0x4848 //RX_FDEQ_GAIN_10 +207 0x4848 //RX_FDEQ_GAIN_11 +208 0x4848 //RX_FDEQ_GAIN_12 +209 0x4848 //RX_FDEQ_GAIN_13 +210 0x4848 //RX_FDEQ_GAIN_14 +211 0x4848 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0202 //RX_FDEQ_BIN_0 +221 0x0203 //RX_FDEQ_BIN_1 +222 0x0303 //RX_FDEQ_BIN_2 +223 0x0304 //RX_FDEQ_BIN_3 +224 0x0405 //RX_FDEQ_BIN_4 +225 0x0506 //RX_FDEQ_BIN_5 +226 0x0708 //RX_FDEQ_BIN_6 +227 0x090A //RX_FDEQ_BIN_7 +228 0x0B0C //RX_FDEQ_BIN_8 +229 0x0D0E //RX_FDEQ_BIN_9 +230 0x1013 //RX_FDEQ_BIN_10 +231 0x1719 //RX_FDEQ_BIN_11 +232 0x1B1E //RX_FDEQ_BIN_12 +233 0x1E1E //RX_FDEQ_BIN_13 +234 0x1E28 //RX_FDEQ_BIN_14 +235 0x282C //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x4000 //RX_FDEQ_RESRV_0 +245 0x0320 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0030 //RX_FDDRC_BAND_MARGIN_1 +248 0x0050 //RX_FDDRC_BAND_MARGIN_2 +249 0x0080 //RX_FDDRC_BAND_MARGIN_3 +250 0x0007 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x5000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x6400 //RX_FDDRC_THRD_3_2 +258 0x6400 //RX_FDDRC_THRD_3_3 +259 0x2000 //RX_FDDRC_SLANT_0_0 +260 0x2000 //RX_FDDRC_SLANT_0_1 +261 0x2000 //RX_FDDRC_SLANT_0_2 +262 0x2000 //RX_FDDRC_SLANT_0_3 +263 0x5333 //RX_FDDRC_SLANT_1_0 +264 0x5333 //RX_FDDRC_SLANT_1_1 +265 0x5333 //RX_FDDRC_SLANT_1_2 +266 0x5333 //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +268 0x0002 //RX_FILTINDX +269 0x0000 //RX_TDDRC_THRD_0 +270 0x0000 //RX_TDDRC_THRD_1 +271 0x1A00 //RX_TDDRC_THRD_2 +272 0x1A00 //RX_TDDRC_THRD_3 +273 0x3000 //RX_TDDRC_SLANT_0 +274 0x7EB8 //RX_TDDRC_SLANT_1 +275 0x5000 //RX_TDDRC_ALPHA_UP_0 +276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x199A //RX_TDDRC_HMNC_GAIN +279 0x0001 //RX_TDDRC_SMT_FLAG +280 0x0CCD //RX_TDDRC_SMT_W +281 0x01C8 //RX_TDDRC_DRC_GAIN +282 0x7C00 //RX_LAMBDA_PKA_FP +283 0x2000 //RX_TPKA_FP +284 0x2000 //RX_MIN_G_FP +285 0x0080 //RX_MAX_G_FP +286 0x000B //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 +288 0x0000 //RX_MAXLEVEL_CNG +289 0x3000 //RX_BWE_UV_TH +290 0x3000 //RX_BWE_UV_TH2 +291 0x1800 //RX_BWE_UV_TH3 +292 0x1000 //RX_BWE_V_TH +293 0x04CD //RX_BWE_GAIN1_V_TH1 +294 0x0F33 //RX_BWE_GAIN1_V_TH2 +295 0x7333 //RX_BWE_UV_EQ +296 0x199A //RX_BWE_V_EQ +297 0x7333 //RX_BWE_TONE_TH +298 0x0004 //RX_BWE_UV_HOLD_T +299 0x6CCD //RX_BWE_GAIN2_ALPHA +300 0x799A //RX_BWE_GAIN3_ALPHA +301 0x001E //RX_BWE_CUTOFF +302 0x3000 //RX_BWE_GAINFILL +303 0x3200 //RX_BWE_MAXTH_TONE +304 0x2000 //RX_BWE_EQ_0 +305 0x2000 //RX_BWE_EQ_1 +306 0x2000 //RX_BWE_EQ_2 +307 0x2000 //RX_BWE_EQ_3 +308 0x2000 //RX_BWE_EQ_4 +309 0x2000 //RX_BWE_EQ_5 +310 0x2000 //RX_BWE_EQ_6 +311 0x0000 //RX_BWE_RESRV_0 +312 0x0000 //RX_BWE_RESRV_1 +313 0x0000 //RX_BWE_RESRV_2 +#VOL 0 +163 0x5000 //RX_TDDRC_ALPHA_UP_1 +164 0x5000 //RX_TDDRC_ALPHA_UP_2 +165 0x5000 //RX_TDDRC_ALPHA_UP_3 +166 0x2000 //RX_TDDRC_ALPHA_UP_4 +184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +190 0x65AD //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +269 0x0000 //RX_TDDRC_THRD_0 +270 0x0000 //RX_TDDRC_THRD_1 +271 0x1A00 //RX_TDDRC_THRD_2 +272 0x1A00 //RX_TDDRC_THRD_3 +273 0x3000 //RX_TDDRC_SLANT_0 +274 0x7EB8 //RX_TDDRC_SLANT_1 +275 0x5000 //RX_TDDRC_ALPHA_UP_0 +276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x199A //RX_TDDRC_HMNC_GAIN +279 0x0001 //RX_TDDRC_SMT_FLAG +280 0x0CCD //RX_TDDRC_SMT_W +281 0x01C8 //RX_TDDRC_DRC_GAIN +195 0x0020 //RX_FDEQ_SUBNUM +196 0x4848 //RX_FDEQ_GAIN_0 +197 0x4848 //RX_FDEQ_GAIN_1 +198 0x4848 //RX_FDEQ_GAIN_2 +199 0x4848 //RX_FDEQ_GAIN_3 +200 0x4848 //RX_FDEQ_GAIN_4 +201 0x4848 //RX_FDEQ_GAIN_5 +202 0x4848 //RX_FDEQ_GAIN_6 +203 0x4848 //RX_FDEQ_GAIN_7 +204 0x4848 //RX_FDEQ_GAIN_8 +205 0x4848 //RX_FDEQ_GAIN_9 +206 0x4848 //RX_FDEQ_GAIN_10 +207 0x4848 //RX_FDEQ_GAIN_11 +208 0x4848 //RX_FDEQ_GAIN_12 +209 0x4848 //RX_FDEQ_GAIN_13 +210 0x4848 //RX_FDEQ_GAIN_14 +211 0x4848 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0202 //RX_FDEQ_BIN_0 +221 0x0203 //RX_FDEQ_BIN_1 +222 0x0303 //RX_FDEQ_BIN_2 +223 0x0304 //RX_FDEQ_BIN_3 +224 0x0405 //RX_FDEQ_BIN_4 +225 0x0506 //RX_FDEQ_BIN_5 +226 0x0708 //RX_FDEQ_BIN_6 +227 0x090A //RX_FDEQ_BIN_7 +228 0x0B0C //RX_FDEQ_BIN_8 +229 0x0D0E //RX_FDEQ_BIN_9 +230 0x1013 //RX_FDEQ_BIN_10 +231 0x1719 //RX_FDEQ_BIN_11 +232 0x1B1E //RX_FDEQ_BIN_12 +233 0x1E1E //RX_FDEQ_BIN_13 +234 0x1E28 //RX_FDEQ_BIN_14 +235 0x282C //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x4000 //RX_FDEQ_RESRV_0 +245 0x0320 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0030 //RX_FDDRC_BAND_MARGIN_1 +248 0x0050 //RX_FDDRC_BAND_MARGIN_2 +249 0x0080 //RX_FDDRC_BAND_MARGIN_3 +250 0x0007 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x5000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x6400 //RX_FDDRC_THRD_3_2 +258 0x6400 //RX_FDDRC_THRD_3_3 +259 0x2000 //RX_FDDRC_SLANT_0_0 +260 0x2000 //RX_FDDRC_SLANT_0_1 +261 0x2000 //RX_FDDRC_SLANT_0_2 +262 0x2000 //RX_FDDRC_SLANT_0_3 +263 0x5333 //RX_FDDRC_SLANT_1_0 +264 0x5333 //RX_FDDRC_SLANT_1_1 +265 0x5333 //RX_FDDRC_SLANT_1_2 +266 0x5333 //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +286 0x000B //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 +#VOL 1 +163 0x5000 //RX_TDDRC_ALPHA_UP_1 +164 0x5000 //RX_TDDRC_ALPHA_UP_2 +165 0x5000 //RX_TDDRC_ALPHA_UP_3 +166 0x2000 //RX_TDDRC_ALPHA_UP_4 +184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +190 0x65AD //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +269 0x0000 //RX_TDDRC_THRD_0 +270 0x0000 //RX_TDDRC_THRD_1 +271 0x1A00 //RX_TDDRC_THRD_2 +272 0x1A00 //RX_TDDRC_THRD_3 +273 0x3000 //RX_TDDRC_SLANT_0 +274 0x7EB8 //RX_TDDRC_SLANT_1 +275 0x5000 //RX_TDDRC_ALPHA_UP_0 +276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x199A //RX_TDDRC_HMNC_GAIN +279 0x0001 //RX_TDDRC_SMT_FLAG +280 0x0CCD //RX_TDDRC_SMT_W +281 0x01C8 //RX_TDDRC_DRC_GAIN +195 0x0020 //RX_FDEQ_SUBNUM +196 0x4848 //RX_FDEQ_GAIN_0 +197 0x4848 //RX_FDEQ_GAIN_1 +198 0x4848 //RX_FDEQ_GAIN_2 +199 0x4848 //RX_FDEQ_GAIN_3 +200 0x4848 //RX_FDEQ_GAIN_4 +201 0x4848 //RX_FDEQ_GAIN_5 +202 0x4848 //RX_FDEQ_GAIN_6 +203 0x4848 //RX_FDEQ_GAIN_7 +204 0x4848 //RX_FDEQ_GAIN_8 +205 0x4848 //RX_FDEQ_GAIN_9 +206 0x4848 //RX_FDEQ_GAIN_10 +207 0x4848 //RX_FDEQ_GAIN_11 +208 0x4848 //RX_FDEQ_GAIN_12 +209 0x4848 //RX_FDEQ_GAIN_13 +210 0x4848 //RX_FDEQ_GAIN_14 +211 0x4848 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0202 //RX_FDEQ_BIN_0 +221 0x0203 //RX_FDEQ_BIN_1 +222 0x0303 //RX_FDEQ_BIN_2 +223 0x0304 //RX_FDEQ_BIN_3 +224 0x0405 //RX_FDEQ_BIN_4 +225 0x0506 //RX_FDEQ_BIN_5 +226 0x0708 //RX_FDEQ_BIN_6 +227 0x090A //RX_FDEQ_BIN_7 +228 0x0B0C //RX_FDEQ_BIN_8 +229 0x0D0E //RX_FDEQ_BIN_9 +230 0x1013 //RX_FDEQ_BIN_10 +231 0x1719 //RX_FDEQ_BIN_11 +232 0x1B1E //RX_FDEQ_BIN_12 +233 0x1E1E //RX_FDEQ_BIN_13 +234 0x1E28 //RX_FDEQ_BIN_14 +235 0x282C //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x4000 //RX_FDEQ_RESRV_0 +245 0x0320 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0030 //RX_FDDRC_BAND_MARGIN_1 +248 0x0050 //RX_FDDRC_BAND_MARGIN_2 +249 0x0080 //RX_FDDRC_BAND_MARGIN_3 +250 0x0007 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x5000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x6400 //RX_FDDRC_THRD_3_2 +258 0x6400 //RX_FDDRC_THRD_3_3 +259 0x2000 //RX_FDDRC_SLANT_0_0 +260 0x2000 //RX_FDDRC_SLANT_0_1 +261 0x2000 //RX_FDDRC_SLANT_0_2 +262 0x2000 //RX_FDDRC_SLANT_0_3 +263 0x5333 //RX_FDDRC_SLANT_1_0 +264 0x5333 //RX_FDDRC_SLANT_1_1 +265 0x5333 //RX_FDDRC_SLANT_1_2 +266 0x5333 //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +286 0x0013 //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 +#VOL 2 +163 0x5000 //RX_TDDRC_ALPHA_UP_1 +164 0x5000 //RX_TDDRC_ALPHA_UP_2 +165 0x5000 //RX_TDDRC_ALPHA_UP_3 +166 0x2000 //RX_TDDRC_ALPHA_UP_4 +184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +190 0x65AD //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +269 0x0000 //RX_TDDRC_THRD_0 +270 0x0000 //RX_TDDRC_THRD_1 +271 0x1A00 //RX_TDDRC_THRD_2 +272 0x1A00 //RX_TDDRC_THRD_3 +273 0x3000 //RX_TDDRC_SLANT_0 +274 0x7EB8 //RX_TDDRC_SLANT_1 +275 0x5000 //RX_TDDRC_ALPHA_UP_0 +276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x199A //RX_TDDRC_HMNC_GAIN +279 0x0001 //RX_TDDRC_SMT_FLAG +280 0x0CCD //RX_TDDRC_SMT_W +281 0x01C8 //RX_TDDRC_DRC_GAIN +195 0x0020 //RX_FDEQ_SUBNUM +196 0x4848 //RX_FDEQ_GAIN_0 +197 0x4848 //RX_FDEQ_GAIN_1 +198 0x4848 //RX_FDEQ_GAIN_2 +199 0x4848 //RX_FDEQ_GAIN_3 +200 0x4848 //RX_FDEQ_GAIN_4 +201 0x4848 //RX_FDEQ_GAIN_5 +202 0x4848 //RX_FDEQ_GAIN_6 +203 0x4848 //RX_FDEQ_GAIN_7 +204 0x4848 //RX_FDEQ_GAIN_8 +205 0x4848 //RX_FDEQ_GAIN_9 +206 0x4848 //RX_FDEQ_GAIN_10 +207 0x4848 //RX_FDEQ_GAIN_11 +208 0x4848 //RX_FDEQ_GAIN_12 +209 0x4848 //RX_FDEQ_GAIN_13 +210 0x4848 //RX_FDEQ_GAIN_14 +211 0x4848 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0202 //RX_FDEQ_BIN_0 +221 0x0203 //RX_FDEQ_BIN_1 +222 0x0303 //RX_FDEQ_BIN_2 +223 0x0304 //RX_FDEQ_BIN_3 +224 0x0405 //RX_FDEQ_BIN_4 +225 0x0506 //RX_FDEQ_BIN_5 +226 0x0708 //RX_FDEQ_BIN_6 +227 0x090A //RX_FDEQ_BIN_7 +228 0x0B0C //RX_FDEQ_BIN_8 +229 0x0D0E //RX_FDEQ_BIN_9 +230 0x1013 //RX_FDEQ_BIN_10 +231 0x1719 //RX_FDEQ_BIN_11 +232 0x1B1E //RX_FDEQ_BIN_12 +233 0x1E1E //RX_FDEQ_BIN_13 +234 0x1E28 //RX_FDEQ_BIN_14 +235 0x282C //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x4000 //RX_FDEQ_RESRV_0 +245 0x0320 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0030 //RX_FDDRC_BAND_MARGIN_1 +248 0x0050 //RX_FDDRC_BAND_MARGIN_2 +249 0x0080 //RX_FDDRC_BAND_MARGIN_3 +250 0x0007 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x5000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x6400 //RX_FDDRC_THRD_3_2 +258 0x6400 //RX_FDDRC_THRD_3_3 +259 0x2000 //RX_FDDRC_SLANT_0_0 +260 0x2000 //RX_FDDRC_SLANT_0_1 +261 0x2000 //RX_FDDRC_SLANT_0_2 +262 0x2000 //RX_FDDRC_SLANT_0_3 +263 0x5333 //RX_FDDRC_SLANT_1_0 +264 0x5333 //RX_FDDRC_SLANT_1_1 +265 0x5333 //RX_FDDRC_SLANT_1_2 +266 0x5333 //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +286 0x0020 //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 +#VOL 3 +163 0x5000 //RX_TDDRC_ALPHA_UP_1 +164 0x5000 //RX_TDDRC_ALPHA_UP_2 +165 0x5000 //RX_TDDRC_ALPHA_UP_3 +166 0x2000 //RX_TDDRC_ALPHA_UP_4 +184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +190 0x65AD //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +269 0x0000 //RX_TDDRC_THRD_0 +270 0x0000 //RX_TDDRC_THRD_1 +271 0x1A00 //RX_TDDRC_THRD_2 +272 0x1A00 //RX_TDDRC_THRD_3 +273 0x3000 //RX_TDDRC_SLANT_0 +274 0x7EB8 //RX_TDDRC_SLANT_1 +275 0x5000 //RX_TDDRC_ALPHA_UP_0 +276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x199A //RX_TDDRC_HMNC_GAIN +279 0x0001 //RX_TDDRC_SMT_FLAG +280 0x0CCD //RX_TDDRC_SMT_W +281 0x01C8 //RX_TDDRC_DRC_GAIN +195 0x0020 //RX_FDEQ_SUBNUM +196 0x4848 //RX_FDEQ_GAIN_0 +197 0x4848 //RX_FDEQ_GAIN_1 +198 0x4848 //RX_FDEQ_GAIN_2 +199 0x4848 //RX_FDEQ_GAIN_3 +200 0x4848 //RX_FDEQ_GAIN_4 +201 0x4848 //RX_FDEQ_GAIN_5 +202 0x4848 //RX_FDEQ_GAIN_6 +203 0x4848 //RX_FDEQ_GAIN_7 +204 0x4848 //RX_FDEQ_GAIN_8 +205 0x4848 //RX_FDEQ_GAIN_9 +206 0x4848 //RX_FDEQ_GAIN_10 +207 0x4848 //RX_FDEQ_GAIN_11 +208 0x4848 //RX_FDEQ_GAIN_12 +209 0x4848 //RX_FDEQ_GAIN_13 +210 0x4848 //RX_FDEQ_GAIN_14 +211 0x4848 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0202 //RX_FDEQ_BIN_0 +221 0x0203 //RX_FDEQ_BIN_1 +222 0x0303 //RX_FDEQ_BIN_2 +223 0x0304 //RX_FDEQ_BIN_3 +224 0x0405 //RX_FDEQ_BIN_4 +225 0x0506 //RX_FDEQ_BIN_5 +226 0x0708 //RX_FDEQ_BIN_6 +227 0x090A //RX_FDEQ_BIN_7 +228 0x0B0C //RX_FDEQ_BIN_8 +229 0x0D0E //RX_FDEQ_BIN_9 +230 0x1013 //RX_FDEQ_BIN_10 +231 0x1719 //RX_FDEQ_BIN_11 +232 0x1B1E //RX_FDEQ_BIN_12 +233 0x1E1E //RX_FDEQ_BIN_13 +234 0x1E28 //RX_FDEQ_BIN_14 +235 0x282C //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x4000 //RX_FDEQ_RESRV_0 +245 0x0320 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0030 //RX_FDDRC_BAND_MARGIN_1 +248 0x0050 //RX_FDDRC_BAND_MARGIN_2 +249 0x0080 //RX_FDDRC_BAND_MARGIN_3 +250 0x0007 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x5000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x6400 //RX_FDDRC_THRD_3_2 +258 0x6400 //RX_FDDRC_THRD_3_3 +259 0x2000 //RX_FDDRC_SLANT_0_0 +260 0x2000 //RX_FDDRC_SLANT_0_1 +261 0x2000 //RX_FDDRC_SLANT_0_2 +262 0x2000 //RX_FDDRC_SLANT_0_3 +263 0x5333 //RX_FDDRC_SLANT_1_0 +264 0x5333 //RX_FDDRC_SLANT_1_1 +265 0x5333 //RX_FDDRC_SLANT_1_2 +266 0x5333 //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +286 0x0036 //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 +#VOL 4 +163 0x5000 //RX_TDDRC_ALPHA_UP_1 +164 0x5000 //RX_TDDRC_ALPHA_UP_2 +165 0x5000 //RX_TDDRC_ALPHA_UP_3 +166 0x2000 //RX_TDDRC_ALPHA_UP_4 +184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +190 0x65AD //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +269 0x0000 //RX_TDDRC_THRD_0 +270 0x0000 //RX_TDDRC_THRD_1 +271 0x1A00 //RX_TDDRC_THRD_2 +272 0x1A00 //RX_TDDRC_THRD_3 +273 0x3000 //RX_TDDRC_SLANT_0 +274 0x7EB8 //RX_TDDRC_SLANT_1 +275 0x5000 //RX_TDDRC_ALPHA_UP_0 +276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x199A //RX_TDDRC_HMNC_GAIN +279 0x0001 //RX_TDDRC_SMT_FLAG +280 0x0CCD //RX_TDDRC_SMT_W +281 0x01C8 //RX_TDDRC_DRC_GAIN +195 0x0020 //RX_FDEQ_SUBNUM +196 0x4848 //RX_FDEQ_GAIN_0 +197 0x4848 //RX_FDEQ_GAIN_1 +198 0x4848 //RX_FDEQ_GAIN_2 +199 0x4848 //RX_FDEQ_GAIN_3 +200 0x4848 //RX_FDEQ_GAIN_4 +201 0x4848 //RX_FDEQ_GAIN_5 +202 0x4848 //RX_FDEQ_GAIN_6 +203 0x4848 //RX_FDEQ_GAIN_7 +204 0x4848 //RX_FDEQ_GAIN_8 +205 0x4848 //RX_FDEQ_GAIN_9 +206 0x4848 //RX_FDEQ_GAIN_10 +207 0x4848 //RX_FDEQ_GAIN_11 +208 0x4848 //RX_FDEQ_GAIN_12 +209 0x4848 //RX_FDEQ_GAIN_13 +210 0x4848 //RX_FDEQ_GAIN_14 +211 0x4848 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0202 //RX_FDEQ_BIN_0 +221 0x0203 //RX_FDEQ_BIN_1 +222 0x0303 //RX_FDEQ_BIN_2 +223 0x0304 //RX_FDEQ_BIN_3 +224 0x0405 //RX_FDEQ_BIN_4 +225 0x0506 //RX_FDEQ_BIN_5 +226 0x0708 //RX_FDEQ_BIN_6 +227 0x090A //RX_FDEQ_BIN_7 +228 0x0B0C //RX_FDEQ_BIN_8 +229 0x0D0E //RX_FDEQ_BIN_9 +230 0x1013 //RX_FDEQ_BIN_10 +231 0x1719 //RX_FDEQ_BIN_11 +232 0x1B1E //RX_FDEQ_BIN_12 +233 0x1E1E //RX_FDEQ_BIN_13 +234 0x1E28 //RX_FDEQ_BIN_14 +235 0x282C //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x4000 //RX_FDEQ_RESRV_0 +245 0x0320 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0030 //RX_FDDRC_BAND_MARGIN_1 +248 0x0050 //RX_FDDRC_BAND_MARGIN_2 +249 0x0080 //RX_FDDRC_BAND_MARGIN_3 +250 0x0007 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x5000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x6400 //RX_FDDRC_THRD_3_2 +258 0x6400 //RX_FDDRC_THRD_3_3 +259 0x2000 //RX_FDDRC_SLANT_0_0 +260 0x2000 //RX_FDDRC_SLANT_0_1 +261 0x2000 //RX_FDDRC_SLANT_0_2 +262 0x2000 //RX_FDDRC_SLANT_0_3 +263 0x5333 //RX_FDDRC_SLANT_1_0 +264 0x5333 //RX_FDDRC_SLANT_1_1 +265 0x5333 //RX_FDDRC_SLANT_1_2 +266 0x5333 //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +286 0x005B //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 +#VOL 5 +163 0x5000 //RX_TDDRC_ALPHA_UP_1 +164 0x5000 //RX_TDDRC_ALPHA_UP_2 +165 0x5000 //RX_TDDRC_ALPHA_UP_3 +166 0x2000 //RX_TDDRC_ALPHA_UP_4 +184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +190 0x65AD //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +269 0x0000 //RX_TDDRC_THRD_0 +270 0x0000 //RX_TDDRC_THRD_1 +271 0x1A00 //RX_TDDRC_THRD_2 +272 0x1A00 //RX_TDDRC_THRD_3 +273 0x3000 //RX_TDDRC_SLANT_0 +274 0x7EB8 //RX_TDDRC_SLANT_1 +275 0x5000 //RX_TDDRC_ALPHA_UP_0 +276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x199A //RX_TDDRC_HMNC_GAIN +279 0x0001 //RX_TDDRC_SMT_FLAG +280 0x0CCD //RX_TDDRC_SMT_W +281 0x01C8 //RX_TDDRC_DRC_GAIN +195 0x0020 //RX_FDEQ_SUBNUM +196 0x4848 //RX_FDEQ_GAIN_0 +197 0x4848 //RX_FDEQ_GAIN_1 +198 0x4848 //RX_FDEQ_GAIN_2 +199 0x4848 //RX_FDEQ_GAIN_3 +200 0x4848 //RX_FDEQ_GAIN_4 +201 0x4848 //RX_FDEQ_GAIN_5 +202 0x4848 //RX_FDEQ_GAIN_6 +203 0x4848 //RX_FDEQ_GAIN_7 +204 0x4848 //RX_FDEQ_GAIN_8 +205 0x4848 //RX_FDEQ_GAIN_9 +206 0x4848 //RX_FDEQ_GAIN_10 +207 0x4848 //RX_FDEQ_GAIN_11 +208 0x4848 //RX_FDEQ_GAIN_12 +209 0x4848 //RX_FDEQ_GAIN_13 +210 0x4848 //RX_FDEQ_GAIN_14 +211 0x4848 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0202 //RX_FDEQ_BIN_0 +221 0x0203 //RX_FDEQ_BIN_1 +222 0x0303 //RX_FDEQ_BIN_2 +223 0x0304 //RX_FDEQ_BIN_3 +224 0x0405 //RX_FDEQ_BIN_4 +225 0x0506 //RX_FDEQ_BIN_5 +226 0x0708 //RX_FDEQ_BIN_6 +227 0x090A //RX_FDEQ_BIN_7 +228 0x0B0C //RX_FDEQ_BIN_8 +229 0x0D0E //RX_FDEQ_BIN_9 +230 0x1013 //RX_FDEQ_BIN_10 +231 0x1719 //RX_FDEQ_BIN_11 +232 0x1B1E //RX_FDEQ_BIN_12 +233 0x1E1E //RX_FDEQ_BIN_13 +234 0x1E28 //RX_FDEQ_BIN_14 +235 0x282C //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x4000 //RX_FDEQ_RESRV_0 +245 0x0320 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0030 //RX_FDDRC_BAND_MARGIN_1 +248 0x0050 //RX_FDDRC_BAND_MARGIN_2 +249 0x0080 //RX_FDDRC_BAND_MARGIN_3 +250 0x0007 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x5000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x6400 //RX_FDDRC_THRD_3_2 +258 0x6400 //RX_FDDRC_THRD_3_3 +259 0x2000 //RX_FDDRC_SLANT_0_0 +260 0x2000 //RX_FDDRC_SLANT_0_1 +261 0x2000 //RX_FDDRC_SLANT_0_2 +262 0x2000 //RX_FDDRC_SLANT_0_3 +263 0x5333 //RX_FDDRC_SLANT_1_0 +264 0x5333 //RX_FDDRC_SLANT_1_1 +265 0x5333 //RX_FDDRC_SLANT_1_2 +266 0x5333 //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +286 0x0099 //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 +#VOL 6 +163 0x5000 //RX_TDDRC_ALPHA_UP_1 +164 0x5000 //RX_TDDRC_ALPHA_UP_2 +165 0x5000 //RX_TDDRC_ALPHA_UP_3 +166 0x2000 //RX_TDDRC_ALPHA_UP_4 +184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +190 0x65AD //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +269 0x0000 //RX_TDDRC_THRD_0 +270 0x0000 //RX_TDDRC_THRD_1 +271 0x1A00 //RX_TDDRC_THRD_2 +272 0x1A00 //RX_TDDRC_THRD_3 +273 0x3000 //RX_TDDRC_SLANT_0 +274 0x7EB8 //RX_TDDRC_SLANT_1 +275 0x5000 //RX_TDDRC_ALPHA_UP_0 +276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x199A //RX_TDDRC_HMNC_GAIN +279 0x0001 //RX_TDDRC_SMT_FLAG +280 0x0CCD //RX_TDDRC_SMT_W +281 0x01C8 //RX_TDDRC_DRC_GAIN +195 0x0020 //RX_FDEQ_SUBNUM +196 0x4848 //RX_FDEQ_GAIN_0 +197 0x4848 //RX_FDEQ_GAIN_1 +198 0x4848 //RX_FDEQ_GAIN_2 +199 0x4848 //RX_FDEQ_GAIN_3 +200 0x4848 //RX_FDEQ_GAIN_4 +201 0x4848 //RX_FDEQ_GAIN_5 +202 0x4848 //RX_FDEQ_GAIN_6 +203 0x4848 //RX_FDEQ_GAIN_7 +204 0x4848 //RX_FDEQ_GAIN_8 +205 0x4848 //RX_FDEQ_GAIN_9 +206 0x4848 //RX_FDEQ_GAIN_10 +207 0x4848 //RX_FDEQ_GAIN_11 +208 0x4848 //RX_FDEQ_GAIN_12 +209 0x4848 //RX_FDEQ_GAIN_13 +210 0x4848 //RX_FDEQ_GAIN_14 +211 0x4848 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0202 //RX_FDEQ_BIN_0 +221 0x0203 //RX_FDEQ_BIN_1 +222 0x0303 //RX_FDEQ_BIN_2 +223 0x0304 //RX_FDEQ_BIN_3 +224 0x0405 //RX_FDEQ_BIN_4 +225 0x0506 //RX_FDEQ_BIN_5 +226 0x0708 //RX_FDEQ_BIN_6 +227 0x090A //RX_FDEQ_BIN_7 +228 0x0B0C //RX_FDEQ_BIN_8 +229 0x0D0E //RX_FDEQ_BIN_9 +230 0x1013 //RX_FDEQ_BIN_10 +231 0x1719 //RX_FDEQ_BIN_11 +232 0x1B1E //RX_FDEQ_BIN_12 +233 0x1E1E //RX_FDEQ_BIN_13 +234 0x1E28 //RX_FDEQ_BIN_14 +235 0x282C //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x4000 //RX_FDEQ_RESRV_0 +245 0x0320 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0030 //RX_FDDRC_BAND_MARGIN_1 +248 0x0050 //RX_FDDRC_BAND_MARGIN_2 +249 0x0080 //RX_FDDRC_BAND_MARGIN_3 +250 0x0007 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x5000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x6400 //RX_FDDRC_THRD_3_2 +258 0x6400 //RX_FDDRC_THRD_3_3 +259 0x2000 //RX_FDDRC_SLANT_0_0 +260 0x2000 //RX_FDDRC_SLANT_0_1 +261 0x2000 //RX_FDDRC_SLANT_0_2 +262 0x2000 //RX_FDDRC_SLANT_0_3 +263 0x5333 //RX_FDDRC_SLANT_1_0 +264 0x5333 //RX_FDDRC_SLANT_1_1 +265 0x5333 //RX_FDDRC_SLANT_1_2 +266 0x5333 //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +286 0x0100 //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 #CASE_NAME HEADSET-GOOGLE_CONDOR_HEADPHONE-VOICE_GENERIC-FB -#PARAM_MODE FULL -#PARAM_TYPE TX+RX -#TOTAL_CUSTOM_STEP 7 +#PARAM_MODE Full +#PARAM_TYPE TX+2RX +#TOTAL_CUSTOM_STEP 7+7 #TX 0 0x0001 //TX_OPERATION_MODE_0 1 0x0001 //TX_OPERATION_MODE_1 2 0x0033 //TX_PATCH_REG -3 0x4B7C //TX_SENDFUNC_MODE_0 +3 0x6B7C //TX_SENDFUNC_MODE_0 4 0x0001 //TX_SENDFUNC_MODE_1 -5 0x0003 //TX_NUM_MIC +5 0x0002 //TX_NUM_MIC 6 0x0004 //TX_SAMPLINGFREQ_SIG 7 0x0004 //TX_SAMPLINGFREQ_PROC 8 0x000A //TX_FRAME_SZ_SIG @@ -26339,15 +40079,15 @@ 18 0x0000 //TX_SYS_RESRV_2 19 0x0000 //TX_SYS_RESRV_3 20 0x0000 //TX_DIST2REF0 -21 0x00A4 //TX_DIST2REF1 -22 0x0017 //TX_DIST2REF_02 +21 0x009D //TX_DIST2REF1 +22 0x0010 //TX_DIST2REF_02 23 0x0000 //TX_DIST2REF_03 24 0x0000 //TX_DIST2REF_04 25 0x0000 //TX_DIST2REF_05 26 0x0000 //TX_MMIC -27 0x0FF7 //TX_PGA_0 -28 0x0FF7 //TX_PGA_1 -29 0x0FF7 //TX_PGA_2 +27 0x1000 //TX_PGA_0 +28 0x1000 //TX_PGA_1 +29 0x1000 //TX_PGA_2 30 0x0000 //TX_PGA_3 31 0x0000 //TX_PGA_4 32 0x0000 //TX_PGA_5 @@ -26483,7 +40223,7 @@ 162 0x7FFF //TX_MIN_EQ_RE_EST_10 163 0x7FFF //TX_MIN_EQ_RE_EST_11 164 0x7FFF //TX_MIN_EQ_RE_EST_12 -165 0x4000 //TX_LAMBDA_RE_EST +165 0x0700 //TX_LAMBDA_RE_EST 166 0x0CCD //TX_LAMBDA_CB_NLE 167 0x2000 //TX_C_POST_FLT 168 0x7FFF //TX_GAIN_NP @@ -26543,16 +40283,16 @@ 222 0x023E //TX_ADPT_STRICT_H 223 0x0BB8 //TX_RATIO_DT_L_TH_LOW 224 0x3A98 //TX_RATIO_DT_H_TH_LOW -225 0x1770 //TX_RATIO_DT_L_TH_HIGH +225 0x1194 //TX_RATIO_DT_L_TH_HIGH 226 0x4E20 //TX_RATIO_DT_H_TH_HIGH 227 0x09C4 //TX_RATIO_DT_L0_TH -228 0x2000 //TX_B_POST_FILT_ECHO_L +228 0x7FFF //TX_B_POST_FILT_ECHO_L 229 0x2000 //TX_B_POST_FILT_ECHO_H 230 0x0200 //TX_MIN_G_CTRL_ECHO 231 0x1000 //TX_B_LESSCUT_RTO_ECHO -232 0x0000 //TX_EPD_OFFSET_00 +232 0x0063 //TX_EPD_OFFSET_00 233 0x0000 //TX_EPD_OFFST_01 -234 0x1388 //TX_RATIO_DT_L0_TH_HIGH +234 0x0A28 //TX_RATIO_DT_L0_TH_HIGH 235 0x3A98 //TX_RATIO_DT_H_TH_CUT 236 0x7FFF //TX_MIN_EQ_RE_EST_13 237 0x0000 //TX_DTD_THR1_7 @@ -26560,7 +40300,7 @@ 239 0x0800 //TX_DT_RESRV_7 240 0x0800 //TX_DT_RESRV_8 241 0x0000 //TX_DT_RESRV_9 -242 0xF800 //TX_THR_SN_EST_0 +242 0xF700 //TX_THR_SN_EST_0 243 0xFA00 //TX_THR_SN_EST_1 244 0xFA00 //TX_THR_SN_EST_2 245 0xFB00 //TX_THR_SN_EST_3 @@ -26569,11 +40309,11 @@ 248 0xF800 //TX_THR_SN_EST_6 249 0xF800 //TX_THR_SN_EST_7 250 0x0100 //TX_DELTA_THR_SN_EST_0 -251 0x0200 //TX_DELTA_THR_SN_EST_1 -252 0x0100 //TX_DELTA_THR_SN_EST_2 -253 0x0200 //TX_DELTA_THR_SN_EST_3 +251 0x0100 //TX_DELTA_THR_SN_EST_1 +252 0x0200 //TX_DELTA_THR_SN_EST_2 +253 0x0100 //TX_DELTA_THR_SN_EST_3 254 0x0100 //TX_DELTA_THR_SN_EST_4 -255 0x0100 //TX_DELTA_THR_SN_EST_5 +255 0x0200 //TX_DELTA_THR_SN_EST_5 256 0x0200 //TX_DELTA_THR_SN_EST_6 257 0x0200 //TX_DELTA_THR_SN_EST_7 258 0x4000 //TX_LAMBDA_NN_EST_0 @@ -26601,11 +40341,11 @@ 280 0x1000 //TX_B_POST_FLT_1 281 0x0010 //TX_NS_LVL_CTRL_0 282 0x0014 //TX_NS_LVL_CTRL_1 -283 0x0014 //TX_NS_LVL_CTRL_2 -284 0x0018 //TX_NS_LVL_CTRL_3 -285 0x0016 //TX_NS_LVL_CTRL_4 -286 0x0014 //TX_NS_LVL_CTRL_5 -287 0x0011 //TX_NS_LVL_CTRL_6 +283 0x0018 //TX_NS_LVL_CTRL_2 +284 0x0016 //TX_NS_LVL_CTRL_3 +285 0x0014 //TX_NS_LVL_CTRL_4 +286 0x0011 //TX_NS_LVL_CTRL_5 +287 0x0014 //TX_NS_LVL_CTRL_6 288 0x0011 //TX_NS_LVL_CTRL_7 289 0x000F //TX_MIN_GAIN_S_0 290 0x0010 //TX_MIN_GAIN_S_1 @@ -26623,8 +40363,8 @@ 302 0x4000 //TX_SNRI_SUP_2 303 0x4000 //TX_SNRI_SUP_3 304 0x4000 //TX_SNRI_SUP_4 -305 0x4000 //TX_SNRI_SUP_5 -306 0x50C0 //TX_SNRI_SUP_6 +305 0x50C0 //TX_SNRI_SUP_5 +306 0x4000 //TX_SNRI_SUP_6 307 0x7FFF //TX_SNRI_SUP_7 308 0x7FFF //TX_THR_LFNS 309 0x0018 //TX_G_LFNS @@ -26633,19 +40373,19 @@ 312 0x7FFF //TX_A_POST_FILT_0 313 0x2000 //TX_A_POST_FILT_1 314 0x5000 //TX_A_POST_FILT_S_0 -315 0x6000 //TX_A_POST_FILT_S_1 -316 0x4C00 //TX_A_POST_FILT_S_2 -317 0x4000 //TX_A_POST_FILT_S_3 -318 0x6000 //TX_A_POST_FILT_S_4 -319 0x4000 //TX_A_POST_FILT_S_5 -320 0x5000 //TX_A_POST_FILT_S_6 +315 0x4C00 //TX_A_POST_FILT_S_1 +316 0x4000 //TX_A_POST_FILT_S_2 +317 0x6000 //TX_A_POST_FILT_S_3 +318 0x4000 //TX_A_POST_FILT_S_4 +319 0x5000 //TX_A_POST_FILT_S_5 +320 0x6000 //TX_A_POST_FILT_S_6 321 0x7000 //TX_A_POST_FILT_S_7 322 0x2000 //TX_B_POST_FILT_0 -323 0x1000 //TX_B_POST_FILT_1 +323 0x2000 //TX_B_POST_FILT_1 324 0x2000 //TX_B_POST_FILT_2 -325 0x2000 //TX_B_POST_FILT_3 +325 0x4000 //TX_B_POST_FILT_3 326 0x4000 //TX_B_POST_FILT_4 -327 0x4000 //TX_B_POST_FILT_5 +327 0x1000 //TX_B_POST_FILT_5 328 0x1000 //TX_B_POST_FILT_6 329 0x2000 //TX_B_POST_FILT_7 330 0x4000 //TX_B_LESSCUT_RTO_S_0 @@ -26653,26 +40393,26 @@ 332 0x7FFF //TX_B_LESSCUT_RTO_S_2 333 0x7FFF //TX_B_LESSCUT_RTO_S_3 334 0x7FFF //TX_B_LESSCUT_RTO_S_4 -335 0x7FFF //TX_B_LESSCUT_RTO_S_5 -336 0x6000 //TX_B_LESSCUT_RTO_S_6 +335 0x6000 //TX_B_LESSCUT_RTO_S_5 +336 0x7FFF //TX_B_LESSCUT_RTO_S_6 337 0x7FFF //TX_B_LESSCUT_RTO_S_7 338 0x7C00 //TX_LAMBDA_PFILT 339 0x7C00 //TX_LAMBDA_PFILT_S_0 340 0x7C00 //TX_LAMBDA_PFILT_S_1 -341 0x7C00 //TX_LAMBDA_PFILT_S_2 -342 0x7A00 //TX_LAMBDA_PFILT_S_3 +341 0x7A00 //TX_LAMBDA_PFILT_S_2 +342 0x7C00 //TX_LAMBDA_PFILT_S_3 343 0x7C00 //TX_LAMBDA_PFILT_S_4 344 0x7C00 //TX_LAMBDA_PFILT_S_5 345 0x7C00 //TX_LAMBDA_PFILT_S_6 346 0x7C00 //TX_LAMBDA_PFILT_S_7 -347 0x0000 //TX_K_PEPPER +347 0x0180 //TX_K_PEPPER 348 0x0800 //TX_A_PEPPER 349 0x1EAA //TX_K_PEPPER_HF 350 0x0600 //TX_A_PEPPER_HF 351 0x0001 //TX_HMNC_BST_FLG 352 0x0200 //TX_HMNC_BST_THR -353 0x0200 //TX_DT_BINVAD_TH_0 -354 0x0200 //TX_DT_BINVAD_TH_1 +353 0x2000 //TX_DT_BINVAD_TH_0 +354 0x0800 //TX_DT_BINVAD_TH_1 355 0x0200 //TX_DT_BINVAD_TH_2 356 0x0200 //TX_DT_BINVAD_TH_3 357 0x1F40 //TX_DT_BINVAD_ENDF @@ -26685,7 +40425,7 @@ 364 0x0000 //TX_K_APT 365 0x0001 //TX_NOISEDET 366 0x0064 //TX_NDETCT -367 0x0050 //TX_NOISE_TH_0 +367 0x04E8 //TX_NOISE_TH_0 368 0x7FFF //TX_NOISE_TH_0_2 369 0x7FFF //TX_NOISE_TH_0_3 370 0x07D0 //TX_NOISE_TH_1 @@ -26697,11 +40437,11 @@ 376 0x0000 //TX_NOISE_TH_5_3 377 0x7FFF //TX_NOISE_TH_5_4 378 0x2710 //TX_NOISE_TH_6 -379 0x0033 //TX_MINENOISE_TH -380 0x4000 //TX_MINENOISE_MIC0_TH_MTS -381 0xFFEE //TX_MINENOISE_MIC0_TH_EXP -382 0x6000 //TX_MINENOISE_MIC0_S_TH_MTS -383 0xFFF3 //TX_MINENOISE_MIC0_S_TH_EXP +379 0x02BC //TX_MINENOISE_TH +380 0xD508 //TX_MORENS_TFMASK_TH +381 0x0001 //TX_DRC_QUIET_FLOOR +382 0x3A98 //TX_RATIODTL_CUT_TH +383 0x1482 //TX_DT_CUT_K1 384 0x0666 //TX_OUT_ENER_S_TH_CLEAN 385 0x0666 //TX_OUT_ENER_S_TH_LESSCLEAN 386 0x0333 //TX_OUT_ENER_S_TH_NOISY @@ -26709,22 +40449,22 @@ 388 0x0333 //TX_OUT_ENER_TH_SPEECH 389 0x2000 //TX_SN_NPB_GAIN 390 0x0000 //TX_NN_NPB_GAIN -391 0x0000 //TX_CSX_ALPHA_0 -392 0x0000 //TX_CSX_ALPHA_1 -393 0x0000 //TX_CSX_ALPHA_2 -394 0x0000 //TX_CSX_ALPHA_3 -395 0x0800 //TX_MU_ARSP_EST -396 0x00C8 //TX_P_OUTBEAM_MIN_TH +391 0x7FFF //TX_POST_MASK_SUP_HSNE +392 0x1388 //TX_TAIL_DET_TH +393 0x4000 //TX_B_LESSCUT_RTO_WTA +394 0x0000 //TX_MEL_G_R +395 0x0080 //TX_SUPHIGH_TH +396 0x0000 //TX_MASK_G_R 397 0x0002 //TX_EXTRA_NS_L -398 0x0800 //TX_EXTRA_NS_A -399 0x0005 //TX_VR_NOISE_FLOOR_TH +398 0x1800 //TX_C_POST_FLT_MASK +399 0x7FFF //TX_A_POST_FLT_WNS 400 0x0148 //TX_MIN_G_LOW300HZ -401 0x0002 //TX_MAXLEVEL_CNG +401 0x0004 //TX_MAXLEVEL_CNG 402 0x00B4 //TX_STN_NOISE_TH 403 0x4000 //TX_POST_MASK_SUP 404 0x7FFF //TX_POST_MASK_ADJUST 405 0x00C8 //TX_NS_ENOISE_MIC0_TH -406 0x0033 //TX_MINENOISE_MIC0_TH +406 0x04E7 //TX_MINENOISE_MIC0_TH 407 0x012C //TX_MINENOISE_MIC0_S_TH 408 0x7FFF //TX_MIN_G_CTRL_SSNS 409 0x0000 //TX_METAL_RTO_THR @@ -26832,16 +40572,16 @@ 511 0x6666 //TX_MIC_TO_BFGAIN 512 0x0000 //TX_MICTOBFGAIN0 513 0x0000 //TX_FASTMUE_TH -514 0x0000 //TX_DERVB_LEN_0 -515 0x0000 //TX_DERVB_LEN_1 -516 0x0000 //TX_RHO_DERVB -517 0x0000 //TX_MIC_INDX_DERVB -518 0x0000 //TX_MU_DERVB -519 0x0000 //TX_DR_RESRV_0 -520 0x0000 //TX_DR_RESRV_1 -521 0x0000 //TX_DR_RESRV_2 -522 0x0000 //TX_DR_RESRV_3 -523 0x0000 //TX_DR_RESRV_4 +514 0xC000 //TX_DEREVERB_LF_MU +515 0xC000 //TX_DEREVERB_HF_MU +516 0xCCCC //TX_DEREVERB_DELAY +517 0xD999 //TX_DEREVERB_COEF_LEN +518 0x1F40 //TX_DEREVERB_DNR +519 0x0000 //TX_DEREVERB_ALPHA +520 0x0000 //TX_DEREVERB_BETA +521 0x0000 //TX_GSC_RTOL_TH +522 0x7000 //TX_GSC_RTOH_TH +523 0x0064 //TX_WIDE2_MEANHTH 524 0x0000 //TX_DR_RESRV_5 525 0x0000 //TX_DR_RESRV_6 526 0x0000 //TX_DR_RESRV_7 @@ -26888,19 +40628,19 @@ 567 0x4848 //TX_FDEQ_GAIN_0 568 0x4848 //TX_FDEQ_GAIN_1 569 0x4848 //TX_FDEQ_GAIN_2 -570 0x4848 //TX_FDEQ_GAIN_3 -571 0x4848 //TX_FDEQ_GAIN_4 -572 0x4848 //TX_FDEQ_GAIN_5 -573 0x4848 //TX_FDEQ_GAIN_6 -574 0x4848 //TX_FDEQ_GAIN_7 -575 0x4848 //TX_FDEQ_GAIN_8 -576 0x4853 //TX_FDEQ_GAIN_9 -577 0x5450 //TX_FDEQ_GAIN_10 -578 0x7465 //TX_FDEQ_GAIN_11 -579 0x807F //TX_FDEQ_GAIN_12 -580 0x82C4 //TX_FDEQ_GAIN_13 -581 0xC4C4 //TX_FDEQ_GAIN_14 -582 0xC4C4 //TX_FDEQ_GAIN_15 +570 0x484C //TX_FDEQ_GAIN_3 +571 0x4C4C //TX_FDEQ_GAIN_4 +572 0x544C //TX_FDEQ_GAIN_5 +573 0x5454 //TX_FDEQ_GAIN_6 +574 0x5454 //TX_FDEQ_GAIN_7 +575 0x585A //TX_FDEQ_GAIN_8 +576 0x5C5C //TX_FDEQ_GAIN_9 +577 0x6068 //TX_FDEQ_GAIN_10 +578 0x8894 //TX_FDEQ_GAIN_11 +579 0x94B4 //TX_FDEQ_GAIN_12 +580 0xB4C7 //TX_FDEQ_GAIN_13 +581 0xC7C6 //TX_FDEQ_GAIN_14 +582 0xC6C6 //TX_FDEQ_GAIN_15 583 0x4848 //TX_FDEQ_GAIN_16 584 0x4848 //TX_FDEQ_GAIN_17 585 0x4848 //TX_FDEQ_GAIN_18 @@ -26934,24 +40674,24 @@ 613 0x0000 //TX_FDEQ_BIN_22 614 0x0000 //TX_FDEQ_BIN_23 615 0x0000 //TX_FDEQ_PADDING -616 0x0020 //TX_PREEQ_SUBNUM_MIC0 +616 0x0030 //TX_PREEQ_SUBNUM_MIC0 617 0x4848 //TX_PREEQ_GAIN_MIC0_0 618 0x4848 //TX_PREEQ_GAIN_MIC0_1 619 0x4848 //TX_PREEQ_GAIN_MIC0_2 620 0x4848 //TX_PREEQ_GAIN_MIC0_3 621 0x4848 //TX_PREEQ_GAIN_MIC0_4 622 0x4848 //TX_PREEQ_GAIN_MIC0_5 -623 0x4A4C //TX_PREEQ_GAIN_MIC0_6 -624 0x4E50 //TX_PREEQ_GAIN_MIC0_7 -625 0x5456 //TX_PREEQ_GAIN_MIC0_8 -626 0x585C //TX_PREEQ_GAIN_MIC0_9 -627 0x5C64 //TX_PREEQ_GAIN_MIC0_10 -628 0x7478 //TX_PREEQ_GAIN_MIC0_11 -629 0x705C //TX_PREEQ_GAIN_MIC0_12 -630 0x4838 //TX_PREEQ_GAIN_MIC0_13 -631 0x3C70 //TX_PREEQ_GAIN_MIC0_14 -632 0x4848 //TX_PREEQ_GAIN_MIC0_15 -633 0x4848 //TX_PREEQ_GAIN_MIC0_16 +623 0x4849 //TX_PREEQ_GAIN_MIC0_6 +624 0x4A4B //TX_PREEQ_GAIN_MIC0_7 +625 0x4C4B //TX_PREEQ_GAIN_MIC0_8 +626 0x4A48 //TX_PREEQ_GAIN_MIC0_9 +627 0x4B4C //TX_PREEQ_GAIN_MIC0_10 +628 0x4C4B //TX_PREEQ_GAIN_MIC0_11 +629 0x4838 //TX_PREEQ_GAIN_MIC0_12 +630 0x3858 //TX_PREEQ_GAIN_MIC0_13 +631 0x7060 //TX_PREEQ_GAIN_MIC0_14 +632 0x9870 //TX_PREEQ_GAIN_MIC0_15 +633 0x5848 //TX_PREEQ_GAIN_MIC0_16 634 0x4848 //TX_PREEQ_GAIN_MIC0_17 635 0x4848 //TX_PREEQ_GAIN_MIC0_18 636 0x4848 //TX_PREEQ_GAIN_MIC0_19 @@ -26965,17 +40705,17 @@ 644 0x0304 //TX_PREEQ_BIN_MIC0_3 645 0x0405 //TX_PREEQ_BIN_MIC0_4 646 0x0506 //TX_PREEQ_BIN_MIC0_5 -647 0x0708 //TX_PREEQ_BIN_MIC0_6 -648 0x0909 //TX_PREEQ_BIN_MIC0_7 -649 0x090B //TX_PREEQ_BIN_MIC0_8 +647 0x0808 //TX_PREEQ_BIN_MIC0_6 +648 0x0809 //TX_PREEQ_BIN_MIC0_7 +649 0x0A0A //TX_PREEQ_BIN_MIC0_8 650 0x0C10 //TX_PREEQ_BIN_MIC0_9 651 0x1013 //TX_PREEQ_BIN_MIC0_10 652 0x1414 //TX_PREEQ_BIN_MIC0_11 -653 0x1414 //TX_PREEQ_BIN_MIC0_12 -654 0x1C1E //TX_PREEQ_BIN_MIC0_13 -655 0x1E28 //TX_PREEQ_BIN_MIC0_14 -656 0x462C //TX_PREEQ_BIN_MIC0_15 -657 0x0000 //TX_PREEQ_BIN_MIC0_16 +653 0x261E //TX_PREEQ_BIN_MIC0_12 +654 0x1E14 //TX_PREEQ_BIN_MIC0_13 +655 0x1414 //TX_PREEQ_BIN_MIC0_14 +656 0x2814 //TX_PREEQ_BIN_MIC0_15 +657 0x4000 //TX_PREEQ_BIN_MIC0_16 658 0x0000 //TX_PREEQ_BIN_MIC0_17 659 0x0000 //TX_PREEQ_BIN_MIC0_18 660 0x0000 //TX_PREEQ_BIN_MIC0_19 @@ -26990,15 +40730,15 @@ 669 0x4848 //TX_PREEQ_GAIN_MIC1_3 670 0x4848 //TX_PREEQ_GAIN_MIC1_4 671 0x4848 //TX_PREEQ_GAIN_MIC1_5 -672 0x4848 //TX_PREEQ_GAIN_MIC1_6 -673 0x4848 //TX_PREEQ_GAIN_MIC1_7 -674 0x4848 //TX_PREEQ_GAIN_MIC1_8 -675 0x4848 //TX_PREEQ_GAIN_MIC1_9 -676 0x4848 //TX_PREEQ_GAIN_MIC1_10 -677 0x4848 //TX_PREEQ_GAIN_MIC1_11 -678 0x4848 //TX_PREEQ_GAIN_MIC1_12 -679 0x4848 //TX_PREEQ_GAIN_MIC1_13 -680 0x4848 //TX_PREEQ_GAIN_MIC1_14 +672 0x4645 //TX_PREEQ_GAIN_MIC1_6 +673 0x4442 //TX_PREEQ_GAIN_MIC1_7 +674 0x4140 //TX_PREEQ_GAIN_MIC1_8 +675 0x3E3D //TX_PREEQ_GAIN_MIC1_9 +676 0x3C3C //TX_PREEQ_GAIN_MIC1_10 +677 0x3C3C //TX_PREEQ_GAIN_MIC1_11 +678 0x3938 //TX_PREEQ_GAIN_MIC1_12 +679 0x3A3C //TX_PREEQ_GAIN_MIC1_13 +680 0x3C3E //TX_PREEQ_GAIN_MIC1_14 681 0x4848 //TX_PREEQ_GAIN_MIC1_15 682 0x4848 //TX_PREEQ_GAIN_MIC1_16 683 0x4848 //TX_PREEQ_GAIN_MIC1_17 @@ -27008,23 +40748,23 @@ 687 0x4848 //TX_PREEQ_GAIN_MIC1_21 688 0x4848 //TX_PREEQ_GAIN_MIC1_22 689 0x4848 //TX_PREEQ_GAIN_MIC1_23 -690 0x1812 //TX_PREEQ_BIN_MIC1_0 -691 0x0A0A //TX_PREEQ_BIN_MIC1_1 -692 0x0808 //TX_PREEQ_BIN_MIC1_2 -693 0x080A //TX_PREEQ_BIN_MIC1_3 -694 0x0B09 //TX_PREEQ_BIN_MIC1_4 -695 0x0A06 //TX_PREEQ_BIN_MIC1_5 -696 0x0606 //TX_PREEQ_BIN_MIC1_6 -697 0x0605 //TX_PREEQ_BIN_MIC1_7 -698 0x050A //TX_PREEQ_BIN_MIC1_8 -699 0x1505 //TX_PREEQ_BIN_MIC1_9 -700 0x0506 //TX_PREEQ_BIN_MIC1_10 -701 0x0615 //TX_PREEQ_BIN_MIC1_11 -702 0x1516 //TX_PREEQ_BIN_MIC1_12 -703 0x2021 //TX_PREEQ_BIN_MIC1_13 -704 0x2021 //TX_PREEQ_BIN_MIC1_14 -705 0x2021 //TX_PREEQ_BIN_MIC1_15 -706 0x0800 //TX_PREEQ_BIN_MIC1_16 +690 0x0202 //TX_PREEQ_BIN_MIC1_0 +691 0x0203 //TX_PREEQ_BIN_MIC1_1 +692 0x0303 //TX_PREEQ_BIN_MIC1_2 +693 0x0304 //TX_PREEQ_BIN_MIC1_3 +694 0x0405 //TX_PREEQ_BIN_MIC1_4 +695 0x0506 //TX_PREEQ_BIN_MIC1_5 +696 0x0808 //TX_PREEQ_BIN_MIC1_6 +697 0x0809 //TX_PREEQ_BIN_MIC1_7 +698 0x0A0A //TX_PREEQ_BIN_MIC1_8 +699 0x0C10 //TX_PREEQ_BIN_MIC1_9 +700 0x1013 //TX_PREEQ_BIN_MIC1_10 +701 0x1414 //TX_PREEQ_BIN_MIC1_11 +702 0x261E //TX_PREEQ_BIN_MIC1_12 +703 0x1E14 //TX_PREEQ_BIN_MIC1_13 +704 0x1414 //TX_PREEQ_BIN_MIC1_14 +705 0x2814 //TX_PREEQ_BIN_MIC1_15 +706 0x4000 //TX_PREEQ_BIN_MIC1_16 707 0x0000 //TX_PREEQ_BIN_MIC1_17 708 0x0000 //TX_PREEQ_BIN_MIC1_18 709 0x0000 //TX_PREEQ_BIN_MIC1_19 @@ -27109,7 +40849,7 @@ 788 0x7EB8 //TX_TDDRC_ALPHA_DWN_02 789 0x7EB8 //TX_TDDRC_ALPHA_DWN_03 790 0x7EB8 //TX_TDDRC_ALPHA_DWN_04 -791 0x7FFF //TX_TDDRC_TD_DRC_LIMIT +791 0x7214 //TX_TDDRC_TD_DRC_LIMIT 792 0x0800 //TX_TDDRC_POST_LIMIT_GAIN 793 0x0000 //TX_TDDRC_RESRV_0 794 0x0000 //TX_TDDRC_RESRV_1 @@ -27171,20 +40911,20 @@ 850 0x0000 //TX_FFP_RESRV_4 851 0x0000 //TX_FFP_RESRV_5 852 0x0000 //TX_FFP_RESRV_6 -853 0x0004 //TX_FILTINDX +853 0x0002 //TX_FILTINDX 854 0x0004 //TX_TDDRC_THRD_0 855 0x0016 //TX_TDDRC_THRD_1 -856 0x1900 //TX_TDDRC_THRD_2 -857 0x1900 //TX_TDDRC_THRD_3 -858 0x3000 //TX_TDDRC_SLANT_0 -859 0x7B00 //TX_TDDRC_SLANT_1 +856 0x1800 //TX_TDDRC_THRD_2 +857 0x1800 //TX_TDDRC_THRD_3 +858 0x7FFF //TX_TDDRC_SLANT_0 +859 0x7FFF //TX_TDDRC_SLANT_1 860 0x0C00 //TX_TDDRC_ALPHA_UP_00 861 0x7EB8 //TX_TDDRC_ALPHA_DWN_00 862 0x0000 //TX_TDDRC_HMNC_FLAG 863 0x199A //TX_TDDRC_HMNC_GAIN 864 0x0000 //TX_TDDRC_SMT_FLAG 865 0x0CCD //TX_TDDRC_SMT_W -866 0x0A98 //TX_TDDRC_DRC_GAIN +866 0x0B39 //TX_TDDRC_DRC_GAIN 867 0x7FFF //TX_TDDRC_LMT_THRD 868 0x0000 //TX_TDDRC_LMT_ALPHA 869 0x0000 //TX_TFMASKLTH @@ -27209,14 +40949,79 @@ 888 0x0028 //TX_FASTNS_ARSPC_TH 889 0xC000 //TX_FASTNS_MASK5_TH 890 0x4848 //TX_POSTSSA_MIN_G_VR_MASK -891 0x1000 //TX_A_LESSCUT_RTO_MASK +891 0x7000 //TX_A_LESSCUT_RTO_MASK 892 0x1770 //TX_FASTNS_NOISETH 893 0xC000 //TX_FASTNS_SSA_THLFL 894 0xC000 //TX_FASTNS_SSA_THHFL 895 0xCCCC //TX_FASTNS_SSA_THLFH 896 0xD999 //TX_FASTNS_SSA_THHFH +897 0x2339 //TX_SENDFUNC_REG_MICMUTE +898 0x0021 //TX_SENDFUNC_REG_MICMUTE1 +899 0x02BC //TX_MICMUTE_RATIO_THR +900 0x0140 //TX_MICMUTE_AMP_THR +901 0x0004 //TX_MICMUTE_HPF_IND +902 0x00C0 //TX_MICMUTE_LOG_EYR_TH +903 0x0008 //TX_MICMUTE_CVG_TIME +904 0x0008 //TX_MICMUTE_RELEASE_TIME +905 0x01FE //TX_MIC_VOLUME_MIC0MUTE +906 0x0020 //TX_MICMUTE_EPD_OFFSET_0 +907 0x001E //TX_MICMUTE_FRQ_AEC_L +908 0x7999 //TX_MICMUTE_EAD_THR +909 0x7FFF //TX_MICMUTE_LAMBDA_CB_NLE +910 0x7FFF //TX_MICMUTE_LAMBDA_RE_EST +911 0x4000 //TX_DTD_THR1_MICMUTE_0 +912 0x7000 //TX_DTD_THR1_MICMUTE_1 +913 0x7FFF //TX_DTD_THR1_MICMUTE_2 +914 0x7FFF //TX_DTD_THR1_MICMUTE_3 +915 0x6CCC //TX_DTD_THR2_MICMUTE_0 +916 0x0400 //TX_MICMUTE_MIN_EQ_RE_EST_0 +917 0x0400 //TX_MICMUTE_MIN_EQ_RE_EST_1 +918 0x1000 //TX_MICMUTE_MIN_EQ_RE_EST_2 +919 0x7FFF //TX_MICMUTE_MIN_EQ_RE_EST_3 +920 0x7FFF //TX_MICMUTE_MIN_EQ_RE_EST_4 +921 0x4000 //TX_MICMUTE_C_POST_FLT +922 0x03E8 //TX_MICMUTE_DT_CUT_K +923 0x0001 //TX_MICMUTE_DT_CUT_THR +924 0x03E8 //TX_MICMUTE_DT_CUT_K2 +925 0x0001 //TX_MICMUTE_DT_CUT_THR2 +926 0x0064 //TX_MICMUTE_DT2_HOLD_N +927 0x1000 //TX_MICMUTE_RATIODTH_THCUT +928 0x1000 //TX_MICMUTE_B_POST_FLT_ECHOL +929 0x7FFF //TX_MICMUTE_B_POST_FLT_ECHOH +930 0x0400 //TX_MICMUTE_C_POST_FLT_MASK +931 0x7999 //TX_MICMUTE_RATIODTL_CUT_TH +932 0x0258 //TX_MICMUTE_DT_CUT_K1 +933 0x0800 //TX_MICMUTE_N2_SN_EST +934 0xFC00 //TX_MICMUTE_THR_SN_EST_0 +935 0x001C //TX_MICMUTE_MIN_G_CTRL_0 +936 0x6000 //TX_MICMUTE_A_POST_FILT_S_0 +937 0x7000 //TX_MICMUTE_B_POST_FILT_0 +938 0x2710 //TX_MIC1RUB_AMP_THR +939 0x0010 //TX_MIC1MUTE_RATIO_THR +940 0x0450 //TX_MIC1MUTE_AMP_THR +941 0x0008 //TX_MIC1MUTE_CVG_TIME +942 0x0008 //TX_MIC1MUTE_RELEASE_TIME +943 0x0000 //TX_AMS_RESRV_01 +944 0x0000 //TX_AMS_RESRV_02 +945 0x0000 //TX_AMS_RESRV_03 +946 0x0000 //TX_AMS_RESRV_04 +947 0x0000 //TX_AMS_RESRV_05 +948 0x0000 //TX_AMS_RESRV_06 +949 0x0000 //TX_AMS_RESRV_07 +950 0x0000 //TX_AMS_RESRV_08 +951 0x0000 //TX_AMS_RESRV_09 +952 0x0000 //TX_AMS_RESRV_10 +953 0x0000 //TX_AMS_RESRV_11 +954 0x0000 //TX_AMS_RESRV_12 +955 0x0000 //TX_AMS_RESRV_13 +956 0x0000 //TX_AMS_RESRV_14 +957 0x0000 //TX_AMS_RESRV_15 +958 0x0000 //TX_AMS_RESRV_16 +959 0x0000 //TX_AMS_RESRV_17 +960 0x0000 //TX_AMS_RESRV_18 +961 0x0000 //TX_AMS_RESRV_19 #RX -0 0x002C //RX_RECVFUNC_MODE_0 +0 0x202C //RX_RECVFUNC_MODE_0 1 0x0000 //RX_RECVFUNC_MODE_1 2 0x0004 //RX_SAMPLINGFREQ_SIG 3 0x0004 //RX_SAMPLINGFREQ_PROC @@ -28066,11 +41871,862 @@ 110 0x0000 //RX_FDDRC_RESRV_0 129 0x0100 //RX_SPK_VOL 130 0x0000 //RX_VOL_RESRV_0 +#RX 2 +157 0x202C //RX_RECVFUNC_MODE_0 +158 0x0000 //RX_RECVFUNC_MODE_1 +159 0x0004 //RX_SAMPLINGFREQ_SIG +160 0x0004 //RX_SAMPLINGFREQ_PROC +161 0x000A //RX_FRAME_SZ +162 0x0000 //RX_DELAY_OPT +163 0x1000 //RX_TDDRC_ALPHA_UP_1 +164 0x1000 //RX_TDDRC_ALPHA_UP_2 +165 0x1000 //RX_TDDRC_ALPHA_UP_3 +166 0x1000 //RX_TDDRC_ALPHA_UP_4 +167 0x0800 //RX_PGA +168 0x7B02 //RX_A_HP +169 0x4000 //RX_B_PE +170 0x7800 //RX_THR_PITCH_DET_0 +171 0x7000 //RX_THR_PITCH_DET_1 +172 0x6000 //RX_THR_PITCH_DET_2 +173 0x0008 //RX_PITCH_BFR_LEN +174 0x0003 //RX_SBD_PITCH_DET +175 0x0100 //RX_PP_RESRV_0 +176 0x0020 //RX_PP_RESRV_1 +177 0x0500 //RX_N_SN_EST +178 0x000C //RX_N2_SN_EST +179 0x000A //RX_NS_LVL_CTRL +180 0xF600 //RX_THR_SN_EST +181 0x7000 //RX_LAMBDA_PFILT +182 0x000A //RX_FENS_RESRV_0 +183 0x0190 //RX_FENS_RESRV_1 +184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +187 0x0002 //RX_EXTRA_NS_L +188 0x0800 //RX_EXTRA_NS_A +189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +190 0x7FFF //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +192 0x199A //RX_A_POST_FLT +193 0x0000 //RX_LMT_THRD +194 0x4000 //RX_LMT_ALPHA +195 0x0020 //RX_FDEQ_SUBNUM +196 0x4848 //RX_FDEQ_GAIN_0 +197 0x4848 //RX_FDEQ_GAIN_1 +198 0x4848 //RX_FDEQ_GAIN_2 +199 0x4848 //RX_FDEQ_GAIN_3 +200 0x4848 //RX_FDEQ_GAIN_4 +201 0x4848 //RX_FDEQ_GAIN_5 +202 0x4848 //RX_FDEQ_GAIN_6 +203 0x4848 //RX_FDEQ_GAIN_7 +204 0x4848 //RX_FDEQ_GAIN_8 +205 0x4848 //RX_FDEQ_GAIN_9 +206 0x4848 //RX_FDEQ_GAIN_10 +207 0x4848 //RX_FDEQ_GAIN_11 +208 0x4848 //RX_FDEQ_GAIN_12 +209 0x4848 //RX_FDEQ_GAIN_13 +210 0x4848 //RX_FDEQ_GAIN_14 +211 0x4848 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0202 //RX_FDEQ_BIN_0 +221 0x0203 //RX_FDEQ_BIN_1 +222 0x0304 //RX_FDEQ_BIN_2 +223 0x0405 //RX_FDEQ_BIN_3 +224 0x0607 //RX_FDEQ_BIN_4 +225 0x0809 //RX_FDEQ_BIN_5 +226 0x0A0B //RX_FDEQ_BIN_6 +227 0x0C0D //RX_FDEQ_BIN_7 +228 0x0E0F //RX_FDEQ_BIN_8 +229 0x1011 //RX_FDEQ_BIN_9 +230 0x1214 //RX_FDEQ_BIN_10 +231 0x1618 //RX_FDEQ_BIN_11 +232 0x1C1C //RX_FDEQ_BIN_12 +233 0x2020 //RX_FDEQ_BIN_13 +234 0x2020 //RX_FDEQ_BIN_14 +235 0x2011 //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x4000 //RX_FDEQ_RESRV_0 +245 0x0320 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0030 //RX_FDDRC_BAND_MARGIN_1 +248 0x0050 //RX_FDDRC_BAND_MARGIN_2 +249 0x0080 //RX_FDDRC_BAND_MARGIN_3 +250 0x0007 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x5000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x6400 //RX_FDDRC_THRD_3_2 +258 0x6400 //RX_FDDRC_THRD_3_3 +259 0x2000 //RX_FDDRC_SLANT_0_0 +260 0x2000 //RX_FDDRC_SLANT_0_1 +261 0x2000 //RX_FDDRC_SLANT_0_2 +262 0x2000 //RX_FDDRC_SLANT_0_3 +263 0x5333 //RX_FDDRC_SLANT_1_0 +264 0x5333 //RX_FDDRC_SLANT_1_1 +265 0x5333 //RX_FDDRC_SLANT_1_2 +266 0x5333 //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +268 0x0002 //RX_FILTINDX +269 0x0000 //RX_TDDRC_THRD_0 +270 0x0000 //RX_TDDRC_THRD_1 +271 0x1200 //RX_TDDRC_THRD_2 +272 0x1900 //RX_TDDRC_THRD_3 +273 0x3000 //RX_TDDRC_SLANT_0 +274 0x6E00 //RX_TDDRC_SLANT_1 +275 0x1000 //RX_TDDRC_ALPHA_UP_0 +276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x199A //RX_TDDRC_HMNC_GAIN +279 0x0001 //RX_TDDRC_SMT_FLAG +280 0x0CCD //RX_TDDRC_SMT_W +281 0x0240 //RX_TDDRC_DRC_GAIN +282 0x7C00 //RX_LAMBDA_PKA_FP +283 0x2000 //RX_TPKA_FP +284 0x2000 //RX_MIN_G_FP +285 0x0080 //RX_MAX_G_FP +286 0x000B //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 +288 0x0000 //RX_MAXLEVEL_CNG +289 0x3000 //RX_BWE_UV_TH +290 0x3000 //RX_BWE_UV_TH2 +291 0x1800 //RX_BWE_UV_TH3 +292 0x1000 //RX_BWE_V_TH +293 0x04CD //RX_BWE_GAIN1_V_TH1 +294 0x0F33 //RX_BWE_GAIN1_V_TH2 +295 0x7333 //RX_BWE_UV_EQ +296 0x199A //RX_BWE_V_EQ +297 0x7333 //RX_BWE_TONE_TH +298 0x0004 //RX_BWE_UV_HOLD_T +299 0x6CCD //RX_BWE_GAIN2_ALPHA +300 0x799A //RX_BWE_GAIN3_ALPHA +301 0x001E //RX_BWE_CUTOFF +302 0x3000 //RX_BWE_GAINFILL +303 0x3200 //RX_BWE_MAXTH_TONE +304 0x2000 //RX_BWE_EQ_0 +305 0x2000 //RX_BWE_EQ_1 +306 0x2000 //RX_BWE_EQ_2 +307 0x2000 //RX_BWE_EQ_3 +308 0x2000 //RX_BWE_EQ_4 +309 0x2000 //RX_BWE_EQ_5 +310 0x2000 //RX_BWE_EQ_6 +311 0x0000 //RX_BWE_RESRV_0 +312 0x0000 //RX_BWE_RESRV_1 +313 0x0000 //RX_BWE_RESRV_2 +#VOL 0 +163 0x1000 //RX_TDDRC_ALPHA_UP_1 +164 0x1000 //RX_TDDRC_ALPHA_UP_2 +165 0x1000 //RX_TDDRC_ALPHA_UP_3 +166 0x1000 //RX_TDDRC_ALPHA_UP_4 +184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +190 0x7FFF //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +269 0x0000 //RX_TDDRC_THRD_0 +270 0x0000 //RX_TDDRC_THRD_1 +271 0x1200 //RX_TDDRC_THRD_2 +272 0x1900 //RX_TDDRC_THRD_3 +273 0x3000 //RX_TDDRC_SLANT_0 +274 0x6E00 //RX_TDDRC_SLANT_1 +275 0x1000 //RX_TDDRC_ALPHA_UP_0 +276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x199A //RX_TDDRC_HMNC_GAIN +279 0x0001 //RX_TDDRC_SMT_FLAG +280 0x0CCD //RX_TDDRC_SMT_W +281 0x0240 //RX_TDDRC_DRC_GAIN +195 0x0020 //RX_FDEQ_SUBNUM +196 0x4848 //RX_FDEQ_GAIN_0 +197 0x4848 //RX_FDEQ_GAIN_1 +198 0x4848 //RX_FDEQ_GAIN_2 +199 0x4848 //RX_FDEQ_GAIN_3 +200 0x4848 //RX_FDEQ_GAIN_4 +201 0x4848 //RX_FDEQ_GAIN_5 +202 0x4848 //RX_FDEQ_GAIN_6 +203 0x4848 //RX_FDEQ_GAIN_7 +204 0x4848 //RX_FDEQ_GAIN_8 +205 0x4848 //RX_FDEQ_GAIN_9 +206 0x4848 //RX_FDEQ_GAIN_10 +207 0x4848 //RX_FDEQ_GAIN_11 +208 0x4848 //RX_FDEQ_GAIN_12 +209 0x4848 //RX_FDEQ_GAIN_13 +210 0x4848 //RX_FDEQ_GAIN_14 +211 0x4848 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0202 //RX_FDEQ_BIN_0 +221 0x0203 //RX_FDEQ_BIN_1 +222 0x0304 //RX_FDEQ_BIN_2 +223 0x0405 //RX_FDEQ_BIN_3 +224 0x0607 //RX_FDEQ_BIN_4 +225 0x0809 //RX_FDEQ_BIN_5 +226 0x0A0B //RX_FDEQ_BIN_6 +227 0x0C0D //RX_FDEQ_BIN_7 +228 0x0E0F //RX_FDEQ_BIN_8 +229 0x1011 //RX_FDEQ_BIN_9 +230 0x1214 //RX_FDEQ_BIN_10 +231 0x1618 //RX_FDEQ_BIN_11 +232 0x1C1C //RX_FDEQ_BIN_12 +233 0x2020 //RX_FDEQ_BIN_13 +234 0x2020 //RX_FDEQ_BIN_14 +235 0x2011 //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x4000 //RX_FDEQ_RESRV_0 +245 0x0320 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0030 //RX_FDDRC_BAND_MARGIN_1 +248 0x0050 //RX_FDDRC_BAND_MARGIN_2 +249 0x0080 //RX_FDDRC_BAND_MARGIN_3 +250 0x0007 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x5000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x6400 //RX_FDDRC_THRD_3_2 +258 0x6400 //RX_FDDRC_THRD_3_3 +259 0x2000 //RX_FDDRC_SLANT_0_0 +260 0x2000 //RX_FDDRC_SLANT_0_1 +261 0x2000 //RX_FDDRC_SLANT_0_2 +262 0x2000 //RX_FDDRC_SLANT_0_3 +263 0x5333 //RX_FDDRC_SLANT_1_0 +264 0x5333 //RX_FDDRC_SLANT_1_1 +265 0x5333 //RX_FDDRC_SLANT_1_2 +266 0x5333 //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +286 0x000B //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 +#VOL 1 +163 0x1000 //RX_TDDRC_ALPHA_UP_1 +164 0x1000 //RX_TDDRC_ALPHA_UP_2 +165 0x1000 //RX_TDDRC_ALPHA_UP_3 +166 0x1000 //RX_TDDRC_ALPHA_UP_4 +184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +190 0x7FFF //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +269 0x0000 //RX_TDDRC_THRD_0 +270 0x0000 //RX_TDDRC_THRD_1 +271 0x1200 //RX_TDDRC_THRD_2 +272 0x1900 //RX_TDDRC_THRD_3 +273 0x3000 //RX_TDDRC_SLANT_0 +274 0x6E00 //RX_TDDRC_SLANT_1 +275 0x1000 //RX_TDDRC_ALPHA_UP_0 +276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x199A //RX_TDDRC_HMNC_GAIN +279 0x0001 //RX_TDDRC_SMT_FLAG +280 0x0CCD //RX_TDDRC_SMT_W +281 0x0240 //RX_TDDRC_DRC_GAIN +195 0x0020 //RX_FDEQ_SUBNUM +196 0x4848 //RX_FDEQ_GAIN_0 +197 0x4848 //RX_FDEQ_GAIN_1 +198 0x4848 //RX_FDEQ_GAIN_2 +199 0x4848 //RX_FDEQ_GAIN_3 +200 0x4848 //RX_FDEQ_GAIN_4 +201 0x4848 //RX_FDEQ_GAIN_5 +202 0x4848 //RX_FDEQ_GAIN_6 +203 0x4848 //RX_FDEQ_GAIN_7 +204 0x4848 //RX_FDEQ_GAIN_8 +205 0x4848 //RX_FDEQ_GAIN_9 +206 0x4848 //RX_FDEQ_GAIN_10 +207 0x4848 //RX_FDEQ_GAIN_11 +208 0x4848 //RX_FDEQ_GAIN_12 +209 0x4848 //RX_FDEQ_GAIN_13 +210 0x4848 //RX_FDEQ_GAIN_14 +211 0x4848 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0202 //RX_FDEQ_BIN_0 +221 0x0203 //RX_FDEQ_BIN_1 +222 0x0304 //RX_FDEQ_BIN_2 +223 0x0405 //RX_FDEQ_BIN_3 +224 0x0607 //RX_FDEQ_BIN_4 +225 0x0809 //RX_FDEQ_BIN_5 +226 0x0A0B //RX_FDEQ_BIN_6 +227 0x0C0D //RX_FDEQ_BIN_7 +228 0x0E0F //RX_FDEQ_BIN_8 +229 0x1011 //RX_FDEQ_BIN_9 +230 0x1214 //RX_FDEQ_BIN_10 +231 0x1618 //RX_FDEQ_BIN_11 +232 0x1C1C //RX_FDEQ_BIN_12 +233 0x2020 //RX_FDEQ_BIN_13 +234 0x2020 //RX_FDEQ_BIN_14 +235 0x2011 //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x4000 //RX_FDEQ_RESRV_0 +245 0x0320 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0030 //RX_FDDRC_BAND_MARGIN_1 +248 0x0050 //RX_FDDRC_BAND_MARGIN_2 +249 0x0080 //RX_FDDRC_BAND_MARGIN_3 +250 0x0007 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x5000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x6400 //RX_FDDRC_THRD_3_2 +258 0x6400 //RX_FDDRC_THRD_3_3 +259 0x2000 //RX_FDDRC_SLANT_0_0 +260 0x2000 //RX_FDDRC_SLANT_0_1 +261 0x2000 //RX_FDDRC_SLANT_0_2 +262 0x2000 //RX_FDDRC_SLANT_0_3 +263 0x5333 //RX_FDDRC_SLANT_1_0 +264 0x5333 //RX_FDDRC_SLANT_1_1 +265 0x5333 //RX_FDDRC_SLANT_1_2 +266 0x5333 //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +286 0x0013 //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 +#VOL 2 +163 0x1000 //RX_TDDRC_ALPHA_UP_1 +164 0x1000 //RX_TDDRC_ALPHA_UP_2 +165 0x1000 //RX_TDDRC_ALPHA_UP_3 +166 0x1000 //RX_TDDRC_ALPHA_UP_4 +184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +190 0x7FFF //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +269 0x0000 //RX_TDDRC_THRD_0 +270 0x0000 //RX_TDDRC_THRD_1 +271 0x1200 //RX_TDDRC_THRD_2 +272 0x1900 //RX_TDDRC_THRD_3 +273 0x3000 //RX_TDDRC_SLANT_0 +274 0x6E00 //RX_TDDRC_SLANT_1 +275 0x1000 //RX_TDDRC_ALPHA_UP_0 +276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x199A //RX_TDDRC_HMNC_GAIN +279 0x0001 //RX_TDDRC_SMT_FLAG +280 0x0CCD //RX_TDDRC_SMT_W +281 0x0240 //RX_TDDRC_DRC_GAIN +195 0x0020 //RX_FDEQ_SUBNUM +196 0x4848 //RX_FDEQ_GAIN_0 +197 0x4848 //RX_FDEQ_GAIN_1 +198 0x4848 //RX_FDEQ_GAIN_2 +199 0x4848 //RX_FDEQ_GAIN_3 +200 0x4848 //RX_FDEQ_GAIN_4 +201 0x4848 //RX_FDEQ_GAIN_5 +202 0x4848 //RX_FDEQ_GAIN_6 +203 0x4848 //RX_FDEQ_GAIN_7 +204 0x4848 //RX_FDEQ_GAIN_8 +205 0x4848 //RX_FDEQ_GAIN_9 +206 0x4848 //RX_FDEQ_GAIN_10 +207 0x4848 //RX_FDEQ_GAIN_11 +208 0x4848 //RX_FDEQ_GAIN_12 +209 0x4848 //RX_FDEQ_GAIN_13 +210 0x4848 //RX_FDEQ_GAIN_14 +211 0x4848 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0202 //RX_FDEQ_BIN_0 +221 0x0203 //RX_FDEQ_BIN_1 +222 0x0304 //RX_FDEQ_BIN_2 +223 0x0405 //RX_FDEQ_BIN_3 +224 0x0607 //RX_FDEQ_BIN_4 +225 0x0809 //RX_FDEQ_BIN_5 +226 0x0A0B //RX_FDEQ_BIN_6 +227 0x0C0D //RX_FDEQ_BIN_7 +228 0x0E0F //RX_FDEQ_BIN_8 +229 0x1011 //RX_FDEQ_BIN_9 +230 0x1214 //RX_FDEQ_BIN_10 +231 0x1618 //RX_FDEQ_BIN_11 +232 0x1C1C //RX_FDEQ_BIN_12 +233 0x2020 //RX_FDEQ_BIN_13 +234 0x2020 //RX_FDEQ_BIN_14 +235 0x2011 //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x4000 //RX_FDEQ_RESRV_0 +245 0x0320 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0030 //RX_FDDRC_BAND_MARGIN_1 +248 0x0050 //RX_FDDRC_BAND_MARGIN_2 +249 0x0080 //RX_FDDRC_BAND_MARGIN_3 +250 0x0007 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x5000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x6400 //RX_FDDRC_THRD_3_2 +258 0x6400 //RX_FDDRC_THRD_3_3 +259 0x2000 //RX_FDDRC_SLANT_0_0 +260 0x2000 //RX_FDDRC_SLANT_0_1 +261 0x2000 //RX_FDDRC_SLANT_0_2 +262 0x2000 //RX_FDDRC_SLANT_0_3 +263 0x5333 //RX_FDDRC_SLANT_1_0 +264 0x5333 //RX_FDDRC_SLANT_1_1 +265 0x5333 //RX_FDDRC_SLANT_1_2 +266 0x5333 //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +286 0x0020 //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 +#VOL 3 +163 0x1000 //RX_TDDRC_ALPHA_UP_1 +164 0x1000 //RX_TDDRC_ALPHA_UP_2 +165 0x1000 //RX_TDDRC_ALPHA_UP_3 +166 0x1000 //RX_TDDRC_ALPHA_UP_4 +184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +190 0x7FFF //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +269 0x0000 //RX_TDDRC_THRD_0 +270 0x0000 //RX_TDDRC_THRD_1 +271 0x1200 //RX_TDDRC_THRD_2 +272 0x1900 //RX_TDDRC_THRD_3 +273 0x3000 //RX_TDDRC_SLANT_0 +274 0x6E00 //RX_TDDRC_SLANT_1 +275 0x1000 //RX_TDDRC_ALPHA_UP_0 +276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x199A //RX_TDDRC_HMNC_GAIN +279 0x0001 //RX_TDDRC_SMT_FLAG +280 0x0CCD //RX_TDDRC_SMT_W +281 0x0240 //RX_TDDRC_DRC_GAIN +195 0x0020 //RX_FDEQ_SUBNUM +196 0x4848 //RX_FDEQ_GAIN_0 +197 0x4848 //RX_FDEQ_GAIN_1 +198 0x4848 //RX_FDEQ_GAIN_2 +199 0x4848 //RX_FDEQ_GAIN_3 +200 0x4848 //RX_FDEQ_GAIN_4 +201 0x4848 //RX_FDEQ_GAIN_5 +202 0x4848 //RX_FDEQ_GAIN_6 +203 0x4848 //RX_FDEQ_GAIN_7 +204 0x4848 //RX_FDEQ_GAIN_8 +205 0x4848 //RX_FDEQ_GAIN_9 +206 0x4848 //RX_FDEQ_GAIN_10 +207 0x4848 //RX_FDEQ_GAIN_11 +208 0x4848 //RX_FDEQ_GAIN_12 +209 0x4848 //RX_FDEQ_GAIN_13 +210 0x4848 //RX_FDEQ_GAIN_14 +211 0x4848 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0202 //RX_FDEQ_BIN_0 +221 0x0203 //RX_FDEQ_BIN_1 +222 0x0304 //RX_FDEQ_BIN_2 +223 0x0405 //RX_FDEQ_BIN_3 +224 0x0607 //RX_FDEQ_BIN_4 +225 0x0809 //RX_FDEQ_BIN_5 +226 0x0A0B //RX_FDEQ_BIN_6 +227 0x0C0D //RX_FDEQ_BIN_7 +228 0x0E0F //RX_FDEQ_BIN_8 +229 0x1011 //RX_FDEQ_BIN_9 +230 0x1214 //RX_FDEQ_BIN_10 +231 0x1618 //RX_FDEQ_BIN_11 +232 0x1C1C //RX_FDEQ_BIN_12 +233 0x2020 //RX_FDEQ_BIN_13 +234 0x2020 //RX_FDEQ_BIN_14 +235 0x2011 //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x4000 //RX_FDEQ_RESRV_0 +245 0x0320 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0030 //RX_FDDRC_BAND_MARGIN_1 +248 0x0050 //RX_FDDRC_BAND_MARGIN_2 +249 0x0080 //RX_FDDRC_BAND_MARGIN_3 +250 0x0007 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x5000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x6400 //RX_FDDRC_THRD_3_2 +258 0x6400 //RX_FDDRC_THRD_3_3 +259 0x2000 //RX_FDDRC_SLANT_0_0 +260 0x2000 //RX_FDDRC_SLANT_0_1 +261 0x2000 //RX_FDDRC_SLANT_0_2 +262 0x2000 //RX_FDDRC_SLANT_0_3 +263 0x5333 //RX_FDDRC_SLANT_1_0 +264 0x5333 //RX_FDDRC_SLANT_1_1 +265 0x5333 //RX_FDDRC_SLANT_1_2 +266 0x5333 //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +286 0x0036 //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 +#VOL 4 +163 0x1000 //RX_TDDRC_ALPHA_UP_1 +164 0x1000 //RX_TDDRC_ALPHA_UP_2 +165 0x1000 //RX_TDDRC_ALPHA_UP_3 +166 0x1000 //RX_TDDRC_ALPHA_UP_4 +184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +190 0x7FFF //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +269 0x0000 //RX_TDDRC_THRD_0 +270 0x0000 //RX_TDDRC_THRD_1 +271 0x1200 //RX_TDDRC_THRD_2 +272 0x1900 //RX_TDDRC_THRD_3 +273 0x3000 //RX_TDDRC_SLANT_0 +274 0x6E00 //RX_TDDRC_SLANT_1 +275 0x1000 //RX_TDDRC_ALPHA_UP_0 +276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x199A //RX_TDDRC_HMNC_GAIN +279 0x0001 //RX_TDDRC_SMT_FLAG +280 0x0CCD //RX_TDDRC_SMT_W +281 0x0240 //RX_TDDRC_DRC_GAIN +195 0x0020 //RX_FDEQ_SUBNUM +196 0x4848 //RX_FDEQ_GAIN_0 +197 0x4848 //RX_FDEQ_GAIN_1 +198 0x4848 //RX_FDEQ_GAIN_2 +199 0x4848 //RX_FDEQ_GAIN_3 +200 0x4848 //RX_FDEQ_GAIN_4 +201 0x4848 //RX_FDEQ_GAIN_5 +202 0x4848 //RX_FDEQ_GAIN_6 +203 0x4848 //RX_FDEQ_GAIN_7 +204 0x4848 //RX_FDEQ_GAIN_8 +205 0x4848 //RX_FDEQ_GAIN_9 +206 0x4848 //RX_FDEQ_GAIN_10 +207 0x4848 //RX_FDEQ_GAIN_11 +208 0x4848 //RX_FDEQ_GAIN_12 +209 0x4848 //RX_FDEQ_GAIN_13 +210 0x4848 //RX_FDEQ_GAIN_14 +211 0x4848 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0202 //RX_FDEQ_BIN_0 +221 0x0203 //RX_FDEQ_BIN_1 +222 0x0304 //RX_FDEQ_BIN_2 +223 0x0405 //RX_FDEQ_BIN_3 +224 0x0607 //RX_FDEQ_BIN_4 +225 0x0809 //RX_FDEQ_BIN_5 +226 0x0A0B //RX_FDEQ_BIN_6 +227 0x0C0D //RX_FDEQ_BIN_7 +228 0x0E0F //RX_FDEQ_BIN_8 +229 0x1011 //RX_FDEQ_BIN_9 +230 0x1214 //RX_FDEQ_BIN_10 +231 0x1618 //RX_FDEQ_BIN_11 +232 0x1C1C //RX_FDEQ_BIN_12 +233 0x2020 //RX_FDEQ_BIN_13 +234 0x2020 //RX_FDEQ_BIN_14 +235 0x2011 //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x4000 //RX_FDEQ_RESRV_0 +245 0x0320 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0030 //RX_FDDRC_BAND_MARGIN_1 +248 0x0050 //RX_FDDRC_BAND_MARGIN_2 +249 0x0080 //RX_FDDRC_BAND_MARGIN_3 +250 0x0007 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x5000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x6400 //RX_FDDRC_THRD_3_2 +258 0x6400 //RX_FDDRC_THRD_3_3 +259 0x2000 //RX_FDDRC_SLANT_0_0 +260 0x2000 //RX_FDDRC_SLANT_0_1 +261 0x2000 //RX_FDDRC_SLANT_0_2 +262 0x2000 //RX_FDDRC_SLANT_0_3 +263 0x5333 //RX_FDDRC_SLANT_1_0 +264 0x5333 //RX_FDDRC_SLANT_1_1 +265 0x5333 //RX_FDDRC_SLANT_1_2 +266 0x5333 //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +286 0x005B //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 +#VOL 5 +163 0x1000 //RX_TDDRC_ALPHA_UP_1 +164 0x1000 //RX_TDDRC_ALPHA_UP_2 +165 0x1000 //RX_TDDRC_ALPHA_UP_3 +166 0x1000 //RX_TDDRC_ALPHA_UP_4 +184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +190 0x7FFF //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +269 0x0000 //RX_TDDRC_THRD_0 +270 0x0000 //RX_TDDRC_THRD_1 +271 0x1200 //RX_TDDRC_THRD_2 +272 0x1900 //RX_TDDRC_THRD_3 +273 0x3000 //RX_TDDRC_SLANT_0 +274 0x6E00 //RX_TDDRC_SLANT_1 +275 0x1000 //RX_TDDRC_ALPHA_UP_0 +276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x199A //RX_TDDRC_HMNC_GAIN +279 0x0001 //RX_TDDRC_SMT_FLAG +280 0x0CCD //RX_TDDRC_SMT_W +281 0x0240 //RX_TDDRC_DRC_GAIN +195 0x0020 //RX_FDEQ_SUBNUM +196 0x4848 //RX_FDEQ_GAIN_0 +197 0x4848 //RX_FDEQ_GAIN_1 +198 0x4848 //RX_FDEQ_GAIN_2 +199 0x4848 //RX_FDEQ_GAIN_3 +200 0x4848 //RX_FDEQ_GAIN_4 +201 0x4848 //RX_FDEQ_GAIN_5 +202 0x4848 //RX_FDEQ_GAIN_6 +203 0x4848 //RX_FDEQ_GAIN_7 +204 0x4848 //RX_FDEQ_GAIN_8 +205 0x4848 //RX_FDEQ_GAIN_9 +206 0x4848 //RX_FDEQ_GAIN_10 +207 0x4848 //RX_FDEQ_GAIN_11 +208 0x4848 //RX_FDEQ_GAIN_12 +209 0x4848 //RX_FDEQ_GAIN_13 +210 0x4848 //RX_FDEQ_GAIN_14 +211 0x4848 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0202 //RX_FDEQ_BIN_0 +221 0x0203 //RX_FDEQ_BIN_1 +222 0x0304 //RX_FDEQ_BIN_2 +223 0x0405 //RX_FDEQ_BIN_3 +224 0x0607 //RX_FDEQ_BIN_4 +225 0x0809 //RX_FDEQ_BIN_5 +226 0x0A0B //RX_FDEQ_BIN_6 +227 0x0C0D //RX_FDEQ_BIN_7 +228 0x0E0F //RX_FDEQ_BIN_8 +229 0x1011 //RX_FDEQ_BIN_9 +230 0x1214 //RX_FDEQ_BIN_10 +231 0x1618 //RX_FDEQ_BIN_11 +232 0x1C1C //RX_FDEQ_BIN_12 +233 0x2020 //RX_FDEQ_BIN_13 +234 0x2020 //RX_FDEQ_BIN_14 +235 0x2011 //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x4000 //RX_FDEQ_RESRV_0 +245 0x0320 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0030 //RX_FDDRC_BAND_MARGIN_1 +248 0x0050 //RX_FDDRC_BAND_MARGIN_2 +249 0x0080 //RX_FDDRC_BAND_MARGIN_3 +250 0x0007 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x5000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x6400 //RX_FDDRC_THRD_3_2 +258 0x6400 //RX_FDDRC_THRD_3_3 +259 0x2000 //RX_FDDRC_SLANT_0_0 +260 0x2000 //RX_FDDRC_SLANT_0_1 +261 0x2000 //RX_FDDRC_SLANT_0_2 +262 0x2000 //RX_FDDRC_SLANT_0_3 +263 0x5333 //RX_FDDRC_SLANT_1_0 +264 0x5333 //RX_FDDRC_SLANT_1_1 +265 0x5333 //RX_FDDRC_SLANT_1_2 +266 0x5333 //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +286 0x0099 //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 +#VOL 6 +163 0x1000 //RX_TDDRC_ALPHA_UP_1 +164 0x1000 //RX_TDDRC_ALPHA_UP_2 +165 0x1000 //RX_TDDRC_ALPHA_UP_3 +166 0x1000 //RX_TDDRC_ALPHA_UP_4 +184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +190 0x7FFF //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +269 0x0000 //RX_TDDRC_THRD_0 +270 0x0000 //RX_TDDRC_THRD_1 +271 0x1200 //RX_TDDRC_THRD_2 +272 0x1900 //RX_TDDRC_THRD_3 +273 0x3000 //RX_TDDRC_SLANT_0 +274 0x6E00 //RX_TDDRC_SLANT_1 +275 0x1000 //RX_TDDRC_ALPHA_UP_0 +276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x199A //RX_TDDRC_HMNC_GAIN +279 0x0001 //RX_TDDRC_SMT_FLAG +280 0x0CCD //RX_TDDRC_SMT_W +281 0x0240 //RX_TDDRC_DRC_GAIN +195 0x0020 //RX_FDEQ_SUBNUM +196 0x4848 //RX_FDEQ_GAIN_0 +197 0x4848 //RX_FDEQ_GAIN_1 +198 0x4848 //RX_FDEQ_GAIN_2 +199 0x4848 //RX_FDEQ_GAIN_3 +200 0x4848 //RX_FDEQ_GAIN_4 +201 0x4848 //RX_FDEQ_GAIN_5 +202 0x4848 //RX_FDEQ_GAIN_6 +203 0x4848 //RX_FDEQ_GAIN_7 +204 0x4848 //RX_FDEQ_GAIN_8 +205 0x4848 //RX_FDEQ_GAIN_9 +206 0x4848 //RX_FDEQ_GAIN_10 +207 0x4848 //RX_FDEQ_GAIN_11 +208 0x4848 //RX_FDEQ_GAIN_12 +209 0x4848 //RX_FDEQ_GAIN_13 +210 0x4848 //RX_FDEQ_GAIN_14 +211 0x4848 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0202 //RX_FDEQ_BIN_0 +221 0x0203 //RX_FDEQ_BIN_1 +222 0x0304 //RX_FDEQ_BIN_2 +223 0x0405 //RX_FDEQ_BIN_3 +224 0x0607 //RX_FDEQ_BIN_4 +225 0x0809 //RX_FDEQ_BIN_5 +226 0x0A0B //RX_FDEQ_BIN_6 +227 0x0C0D //RX_FDEQ_BIN_7 +228 0x0E0F //RX_FDEQ_BIN_8 +229 0x1011 //RX_FDEQ_BIN_9 +230 0x1214 //RX_FDEQ_BIN_10 +231 0x1618 //RX_FDEQ_BIN_11 +232 0x1C1C //RX_FDEQ_BIN_12 +233 0x2020 //RX_FDEQ_BIN_13 +234 0x2020 //RX_FDEQ_BIN_14 +235 0x2011 //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x4000 //RX_FDEQ_RESRV_0 +245 0x0320 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0030 //RX_FDDRC_BAND_MARGIN_1 +248 0x0050 //RX_FDDRC_BAND_MARGIN_2 +249 0x0080 //RX_FDDRC_BAND_MARGIN_3 +250 0x0007 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x5000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x6400 //RX_FDDRC_THRD_3_2 +258 0x6400 //RX_FDDRC_THRD_3_3 +259 0x2000 //RX_FDDRC_SLANT_0_0 +260 0x2000 //RX_FDDRC_SLANT_0_1 +261 0x2000 //RX_FDDRC_SLANT_0_2 +262 0x2000 //RX_FDDRC_SLANT_0_3 +263 0x5333 //RX_FDDRC_SLANT_1_0 +264 0x5333 //RX_FDDRC_SLANT_1_1 +265 0x5333 //RX_FDDRC_SLANT_1_2 +266 0x5333 //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +286 0x0100 //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 #CASE_NAME HEADSET-GOOGLE_CONDOR_CERTIFICATION1-VOICE_GENERIC-NB -#PARAM_MODE FULL -#PARAM_TYPE TX+RX -#TOTAL_CUSTOM_STEP 7 +#PARAM_MODE Full +#PARAM_TYPE TX+2RX +#TOTAL_CUSTOM_STEP 7+7 #TX 0 0x0009 //TX_OPERATION_MODE_0 1 0x0008 //TX_OPERATION_MODE_1 @@ -28387,20 +43043,20 @@ 312 0x7FFF //TX_A_POST_FILT_0 313 0x2000 //TX_A_POST_FILT_1 314 0x4000 //TX_A_POST_FILT_S_0 -315 0x4000 //TX_A_POST_FILT_S_1 -316 0x1000 //TX_A_POST_FILT_S_2 +315 0x1000 //TX_A_POST_FILT_S_1 +316 0x4000 //TX_A_POST_FILT_S_2 317 0x4000 //TX_A_POST_FILT_S_3 318 0x4000 //TX_A_POST_FILT_S_4 319 0x4000 //TX_A_POST_FILT_S_5 320 0x4000 //TX_A_POST_FILT_S_6 321 0x4000 //TX_A_POST_FILT_S_7 322 0x0400 //TX_B_POST_FILT_0 -323 0x0400 //TX_B_POST_FILT_1 +323 0x2000 //TX_B_POST_FILT_1 324 0x2000 //TX_B_POST_FILT_2 325 0x2000 //TX_B_POST_FILT_3 326 0x2000 //TX_B_POST_FILT_4 327 0x2000 //TX_B_POST_FILT_5 -328 0x2000 //TX_B_POST_FILT_6 +328 0x0400 //TX_B_POST_FILT_6 329 0x2000 //TX_B_POST_FILT_7 330 0x7FFF //TX_B_LESSCUT_RTO_S_0 331 0x7FFF //TX_B_LESSCUT_RTO_S_1 @@ -28439,7 +43095,7 @@ 364 0x0000 //TX_K_APT 365 0x0001 //TX_NOISEDET 366 0x0190 //TX_NDETCT -367 0x000A //TX_NOISE_TH_0 +367 0x003B //TX_NOISE_TH_0 368 0x1B58 //TX_NOISE_TH_0_2 369 0x2134 //TX_NOISE_TH_0_3 370 0x02BC //TX_NOISE_TH_1 @@ -28451,11 +43107,11 @@ 376 0x0000 //TX_NOISE_TH_5_3 377 0x0000 //TX_NOISE_TH_5_4 378 0x0032 //TX_NOISE_TH_6 -379 0x0014 //TX_MINENOISE_TH -380 0x4000 //TX_MINENOISE_MIC0_TH_MTS -381 0xFFEE //TX_MINENOISE_MIC0_TH_EXP -382 0x6000 //TX_MINENOISE_MIC0_S_TH_MTS -383 0xFFF3 //TX_MINENOISE_MIC0_S_TH_EXP +379 0x00C8 //TX_MINENOISE_TH +380 0xD508 //TX_MORENS_TFMASK_TH +381 0x0001 //TX_DRC_QUIET_FLOOR +382 0x3A98 //TX_RATIODTL_CUT_TH +383 0x0DAC //TX_DT_CUT_K1 384 0x00A5 //TX_OUT_ENER_S_TH_CLEAN 385 0x00A5 //TX_OUT_ENER_S_TH_LESSCLEAN 386 0x00A5 //TX_OUT_ENER_S_TH_NOISY @@ -28463,22 +43119,22 @@ 388 0x00CE //TX_OUT_ENER_TH_SPEECH 389 0x2000 //TX_SN_NPB_GAIN 390 0x0000 //TX_NN_NPB_GAIN -391 0x0000 //TX_CSX_ALPHA_0 -392 0x0000 //TX_CSX_ALPHA_1 -393 0x0000 //TX_CSX_ALPHA_2 -394 0x0000 //TX_CSX_ALPHA_3 -395 0x0800 //TX_MU_ARSP_EST -396 0x00C8 //TX_P_OUTBEAM_MIN_TH +391 0x7FFF //TX_POST_MASK_SUP_HSNE +392 0x1388 //TX_TAIL_DET_TH +393 0x4000 //TX_B_LESSCUT_RTO_WTA +394 0x0000 //TX_MEL_G_R +395 0x0080 //TX_SUPHIGH_TH +396 0x0000 //TX_MASK_G_R 397 0x0002 //TX_EXTRA_NS_L -398 0x0800 //TX_EXTRA_NS_A -399 0x0005 //TX_VR_NOISE_FLOOR_TH +398 0x1800 //TX_C_POST_FLT_MASK +399 0x7FFF //TX_A_POST_FLT_WNS 400 0x0148 //TX_MIN_G_LOW300HZ 401 0x0002 //TX_MAXLEVEL_CNG 402 0x00B4 //TX_STN_NOISE_TH 403 0x4000 //TX_POST_MASK_SUP 404 0x7FFF //TX_POST_MASK_ADJUST 405 0x00C8 //TX_NS_ENOISE_MIC0_TH -406 0x0014 //TX_MINENOISE_MIC0_TH +406 0x0032 //TX_MINENOISE_MIC0_TH 407 0x012C //TX_MINENOISE_MIC0_S_TH 408 0x7FFF //TX_MIN_G_CTRL_SSNS 409 0x0000 //TX_METAL_RTO_THR @@ -28586,16 +43242,16 @@ 511 0x6666 //TX_MIC_TO_BFGAIN 512 0x0000 //TX_MICTOBFGAIN0 513 0x0000 //TX_FASTMUE_TH -514 0x0000 //TX_DERVB_LEN_0 -515 0x0000 //TX_DERVB_LEN_1 -516 0x0000 //TX_RHO_DERVB -517 0x0000 //TX_MIC_INDX_DERVB -518 0x0000 //TX_MU_DERVB -519 0x0000 //TX_DR_RESRV_0 -520 0x0000 //TX_DR_RESRV_1 -521 0x0000 //TX_DR_RESRV_2 -522 0x0000 //TX_DR_RESRV_3 -523 0x0000 //TX_DR_RESRV_4 +514 0xC000 //TX_DEREVERB_LF_MU +515 0xC000 //TX_DEREVERB_HF_MU +516 0xCCCC //TX_DEREVERB_DELAY +517 0xD999 //TX_DEREVERB_COEF_LEN +518 0x1F40 //TX_DEREVERB_DNR +519 0x0000 //TX_DEREVERB_ALPHA +520 0x0000 //TX_DEREVERB_BETA +521 0x0000 //TX_GSC_RTOL_TH +522 0x7000 //TX_GSC_RTOH_TH +523 0x0064 //TX_WIDE2_MEANHTH 524 0x0000 //TX_DR_RESRV_5 525 0x0000 //TX_DR_RESRV_6 526 0x0000 //TX_DR_RESRV_7 @@ -28963,14 +43619,79 @@ 888 0x00C8 //TX_FASTNS_ARSPC_TH 889 0xC000 //TX_FASTNS_MASK5_TH 890 0x4848 //TX_POSTSSA_MIN_G_VR_MASK -891 0x7FFF //TX_A_LESSCUT_RTO_MASK +891 0x4000 //TX_A_LESSCUT_RTO_MASK 892 0x1770 //TX_FASTNS_NOISETH 893 0xC000 //TX_FASTNS_SSA_THLFL 894 0xC000 //TX_FASTNS_SSA_THHFL 895 0xCCCC //TX_FASTNS_SSA_THLFH 896 0xD999 //TX_FASTNS_SSA_THHFH +897 0x2339 //TX_SENDFUNC_REG_MICMUTE +898 0x0021 //TX_SENDFUNC_REG_MICMUTE1 +899 0x02BC //TX_MICMUTE_RATIO_THR +900 0x0140 //TX_MICMUTE_AMP_THR +901 0x0004 //TX_MICMUTE_HPF_IND +902 0x00C0 //TX_MICMUTE_LOG_EYR_TH +903 0x0008 //TX_MICMUTE_CVG_TIME +904 0x0008 //TX_MICMUTE_RELEASE_TIME +905 0x01FE //TX_MIC_VOLUME_MIC0MUTE +906 0x0020 //TX_MICMUTE_EPD_OFFSET_0 +907 0x001E //TX_MICMUTE_FRQ_AEC_L +908 0x7999 //TX_MICMUTE_EAD_THR +909 0x7FFF //TX_MICMUTE_LAMBDA_CB_NLE +910 0x7FFF //TX_MICMUTE_LAMBDA_RE_EST +911 0x4000 //TX_DTD_THR1_MICMUTE_0 +912 0x7000 //TX_DTD_THR1_MICMUTE_1 +913 0x7FFF //TX_DTD_THR1_MICMUTE_2 +914 0x7FFF //TX_DTD_THR1_MICMUTE_3 +915 0x6CCC //TX_DTD_THR2_MICMUTE_0 +916 0x0400 //TX_MICMUTE_MIN_EQ_RE_EST_0 +917 0x0400 //TX_MICMUTE_MIN_EQ_RE_EST_1 +918 0x1000 //TX_MICMUTE_MIN_EQ_RE_EST_2 +919 0x7FFF //TX_MICMUTE_MIN_EQ_RE_EST_3 +920 0x7FFF //TX_MICMUTE_MIN_EQ_RE_EST_4 +921 0x4000 //TX_MICMUTE_C_POST_FLT +922 0x03E8 //TX_MICMUTE_DT_CUT_K +923 0x0001 //TX_MICMUTE_DT_CUT_THR +924 0x03E8 //TX_MICMUTE_DT_CUT_K2 +925 0x0001 //TX_MICMUTE_DT_CUT_THR2 +926 0x0064 //TX_MICMUTE_DT2_HOLD_N +927 0x1000 //TX_MICMUTE_RATIODTH_THCUT +928 0x1000 //TX_MICMUTE_B_POST_FLT_ECHOL +929 0x7FFF //TX_MICMUTE_B_POST_FLT_ECHOH +930 0x0400 //TX_MICMUTE_C_POST_FLT_MASK +931 0x7999 //TX_MICMUTE_RATIODTL_CUT_TH +932 0x0258 //TX_MICMUTE_DT_CUT_K1 +933 0x0800 //TX_MICMUTE_N2_SN_EST +934 0xFC00 //TX_MICMUTE_THR_SN_EST_0 +935 0x001C //TX_MICMUTE_MIN_G_CTRL_0 +936 0x6000 //TX_MICMUTE_A_POST_FILT_S_0 +937 0x7000 //TX_MICMUTE_B_POST_FILT_0 +938 0x2710 //TX_MIC1RUB_AMP_THR +939 0x0010 //TX_MIC1MUTE_RATIO_THR +940 0x0450 //TX_MIC1MUTE_AMP_THR +941 0x0008 //TX_MIC1MUTE_CVG_TIME +942 0x0008 //TX_MIC1MUTE_RELEASE_TIME +943 0x0000 //TX_AMS_RESRV_01 +944 0x0000 //TX_AMS_RESRV_02 +945 0x0000 //TX_AMS_RESRV_03 +946 0x0000 //TX_AMS_RESRV_04 +947 0x0000 //TX_AMS_RESRV_05 +948 0x0000 //TX_AMS_RESRV_06 +949 0x0000 //TX_AMS_RESRV_07 +950 0x0000 //TX_AMS_RESRV_08 +951 0x0000 //TX_AMS_RESRV_09 +952 0x0000 //TX_AMS_RESRV_10 +953 0x0000 //TX_AMS_RESRV_11 +954 0x0000 //TX_AMS_RESRV_12 +955 0x0000 //TX_AMS_RESRV_13 +956 0x0000 //TX_AMS_RESRV_14 +957 0x0000 //TX_AMS_RESRV_15 +958 0x0000 //TX_AMS_RESRV_16 +959 0x0000 //TX_AMS_RESRV_17 +960 0x0000 //TX_AMS_RESRV_18 +961 0x0000 //TX_AMS_RESRV_19 #RX -0 0x0024 //RX_RECVFUNC_MODE_0 +0 0x2024 //RX_RECVFUNC_MODE_0 1 0x0000 //RX_RECVFUNC_MODE_1 2 0x0000 //RX_SAMPLINGFREQ_SIG 3 0x0000 //RX_SAMPLINGFREQ_PROC @@ -29820,11 +44541,862 @@ 110 0x0000 //RX_FDDRC_RESRV_0 129 0x0100 //RX_SPK_VOL 130 0x0000 //RX_VOL_RESRV_0 +#RX 2 +157 0x2024 //RX_RECVFUNC_MODE_0 +158 0x0000 //RX_RECVFUNC_MODE_1 +159 0x0000 //RX_SAMPLINGFREQ_SIG +160 0x0000 //RX_SAMPLINGFREQ_PROC +161 0x000A //RX_FRAME_SZ +162 0x0000 //RX_DELAY_OPT +163 0x3000 //RX_TDDRC_ALPHA_UP_1 +164 0x3000 //RX_TDDRC_ALPHA_UP_2 +165 0x3000 //RX_TDDRC_ALPHA_UP_3 +166 0x3000 //RX_TDDRC_ALPHA_UP_4 +167 0x0800 //RX_PGA +168 0x7FFF //RX_A_HP +169 0x0000 //RX_B_PE +170 0x3800 //RX_THR_PITCH_DET_0 +171 0x3000 //RX_THR_PITCH_DET_1 +172 0x2800 //RX_THR_PITCH_DET_2 +173 0x0008 //RX_PITCH_BFR_LEN +174 0x0003 //RX_SBD_PITCH_DET +175 0x0100 //RX_PP_RESRV_0 +176 0x0020 //RX_PP_RESRV_1 +177 0x0600 //RX_N_SN_EST +178 0x000C //RX_N2_SN_EST +179 0x0010 //RX_NS_LVL_CTRL +180 0xF800 //RX_THR_SN_EST +181 0x7CCD //RX_LAMBDA_PFILT +182 0x000A //RX_FENS_RESRV_0 +183 0x0190 //RX_FENS_RESRV_1 +184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +187 0x0002 //RX_EXTRA_NS_L +188 0x0800 //RX_EXTRA_NS_A +189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +190 0x7FFF //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +192 0x199A //RX_A_POST_FLT +193 0x0000 //RX_LMT_THRD +194 0x4000 //RX_LMT_ALPHA +195 0x0014 //RX_FDEQ_SUBNUM +196 0x4848 //RX_FDEQ_GAIN_0 +197 0x4848 //RX_FDEQ_GAIN_1 +198 0x4848 //RX_FDEQ_GAIN_2 +199 0x4848 //RX_FDEQ_GAIN_3 +200 0x4848 //RX_FDEQ_GAIN_4 +201 0x4848 //RX_FDEQ_GAIN_5 +202 0x4848 //RX_FDEQ_GAIN_6 +203 0x4848 //RX_FDEQ_GAIN_7 +204 0x4848 //RX_FDEQ_GAIN_8 +205 0x4848 //RX_FDEQ_GAIN_9 +206 0x4848 //RX_FDEQ_GAIN_10 +207 0x4848 //RX_FDEQ_GAIN_11 +208 0x4848 //RX_FDEQ_GAIN_12 +209 0x4848 //RX_FDEQ_GAIN_13 +210 0x4848 //RX_FDEQ_GAIN_14 +211 0x4848 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0202 //RX_FDEQ_BIN_0 +221 0x0203 //RX_FDEQ_BIN_1 +222 0x0303 //RX_FDEQ_BIN_2 +223 0x0304 //RX_FDEQ_BIN_3 +224 0x0405 //RX_FDEQ_BIN_4 +225 0x0506 //RX_FDEQ_BIN_5 +226 0x0708 //RX_FDEQ_BIN_6 +227 0x090A //RX_FDEQ_BIN_7 +228 0x0B0C //RX_FDEQ_BIN_8 +229 0x0D08 //RX_FDEQ_BIN_9 +230 0x0000 //RX_FDEQ_BIN_10 +231 0x0000 //RX_FDEQ_BIN_11 +232 0x0000 //RX_FDEQ_BIN_12 +233 0x0000 //RX_FDEQ_BIN_13 +234 0x0000 //RX_FDEQ_BIN_14 +235 0x0000 //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x4000 //RX_FDEQ_RESRV_0 +245 0x0320 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0030 //RX_FDDRC_BAND_MARGIN_1 +248 0x0050 //RX_FDDRC_BAND_MARGIN_2 +249 0x0080 //RX_FDDRC_BAND_MARGIN_3 +250 0x0007 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x5000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x6400 //RX_FDDRC_THRD_3_2 +258 0x6400 //RX_FDDRC_THRD_3_3 +259 0x2000 //RX_FDDRC_SLANT_0_0 +260 0x2000 //RX_FDDRC_SLANT_0_1 +261 0x2000 //RX_FDDRC_SLANT_0_2 +262 0x2000 //RX_FDDRC_SLANT_0_3 +263 0x5333 //RX_FDDRC_SLANT_1_0 +264 0x5333 //RX_FDDRC_SLANT_1_1 +265 0x5333 //RX_FDDRC_SLANT_1_2 +266 0x5333 //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +268 0x0002 //RX_FILTINDX +269 0x0000 //RX_TDDRC_THRD_0 +270 0x0000 //RX_TDDRC_THRD_1 +271 0x2030 //RX_TDDRC_THRD_2 +272 0x2030 //RX_TDDRC_THRD_3 +273 0x0800 //RX_TDDRC_SLANT_0 +274 0x7EB8 //RX_TDDRC_SLANT_1 +275 0x3000 //RX_TDDRC_ALPHA_UP_0 +276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x199A //RX_TDDRC_HMNC_GAIN +279 0x0001 //RX_TDDRC_SMT_FLAG +280 0x0CCD //RX_TDDRC_SMT_W +281 0x0478 //RX_TDDRC_DRC_GAIN +282 0x7C00 //RX_LAMBDA_PKA_FP +283 0x2000 //RX_TPKA_FP +284 0x2000 //RX_MIN_G_FP +285 0x0080 //RX_MAX_G_FP +286 0x000C //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 +288 0x0000 //RX_MAXLEVEL_CNG +289 0x3000 //RX_BWE_UV_TH +290 0x3000 //RX_BWE_UV_TH2 +291 0x1800 //RX_BWE_UV_TH3 +292 0x1000 //RX_BWE_V_TH +293 0x04CD //RX_BWE_GAIN1_V_TH1 +294 0x0F33 //RX_BWE_GAIN1_V_TH2 +295 0x7333 //RX_BWE_UV_EQ +296 0x199A //RX_BWE_V_EQ +297 0x7333 //RX_BWE_TONE_TH +298 0x0004 //RX_BWE_UV_HOLD_T +299 0x6CCD //RX_BWE_GAIN2_ALPHA +300 0x799A //RX_BWE_GAIN3_ALPHA +301 0x001E //RX_BWE_CUTOFF +302 0x3000 //RX_BWE_GAINFILL +303 0x3200 //RX_BWE_MAXTH_TONE +304 0x2000 //RX_BWE_EQ_0 +305 0x2000 //RX_BWE_EQ_1 +306 0x2000 //RX_BWE_EQ_2 +307 0x2000 //RX_BWE_EQ_3 +308 0x2000 //RX_BWE_EQ_4 +309 0x2000 //RX_BWE_EQ_5 +310 0x2000 //RX_BWE_EQ_6 +311 0x0000 //RX_BWE_RESRV_0 +312 0x0000 //RX_BWE_RESRV_1 +313 0x0000 //RX_BWE_RESRV_2 +#VOL 0 +163 0x3000 //RX_TDDRC_ALPHA_UP_1 +164 0x3000 //RX_TDDRC_ALPHA_UP_2 +165 0x3000 //RX_TDDRC_ALPHA_UP_3 +166 0x3000 //RX_TDDRC_ALPHA_UP_4 +184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +190 0x7FFF //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +269 0x0000 //RX_TDDRC_THRD_0 +270 0x0000 //RX_TDDRC_THRD_1 +271 0x2030 //RX_TDDRC_THRD_2 +272 0x2030 //RX_TDDRC_THRD_3 +273 0x0800 //RX_TDDRC_SLANT_0 +274 0x7EB8 //RX_TDDRC_SLANT_1 +275 0x3000 //RX_TDDRC_ALPHA_UP_0 +276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x199A //RX_TDDRC_HMNC_GAIN +279 0x0001 //RX_TDDRC_SMT_FLAG +280 0x0CCD //RX_TDDRC_SMT_W +281 0x0478 //RX_TDDRC_DRC_GAIN +195 0x0014 //RX_FDEQ_SUBNUM +196 0x4848 //RX_FDEQ_GAIN_0 +197 0x4848 //RX_FDEQ_GAIN_1 +198 0x4848 //RX_FDEQ_GAIN_2 +199 0x4848 //RX_FDEQ_GAIN_3 +200 0x4848 //RX_FDEQ_GAIN_4 +201 0x4848 //RX_FDEQ_GAIN_5 +202 0x4848 //RX_FDEQ_GAIN_6 +203 0x4848 //RX_FDEQ_GAIN_7 +204 0x4848 //RX_FDEQ_GAIN_8 +205 0x4848 //RX_FDEQ_GAIN_9 +206 0x4848 //RX_FDEQ_GAIN_10 +207 0x4848 //RX_FDEQ_GAIN_11 +208 0x4848 //RX_FDEQ_GAIN_12 +209 0x4848 //RX_FDEQ_GAIN_13 +210 0x4848 //RX_FDEQ_GAIN_14 +211 0x4848 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0202 //RX_FDEQ_BIN_0 +221 0x0203 //RX_FDEQ_BIN_1 +222 0x0303 //RX_FDEQ_BIN_2 +223 0x0304 //RX_FDEQ_BIN_3 +224 0x0405 //RX_FDEQ_BIN_4 +225 0x0506 //RX_FDEQ_BIN_5 +226 0x0708 //RX_FDEQ_BIN_6 +227 0x090A //RX_FDEQ_BIN_7 +228 0x0B0C //RX_FDEQ_BIN_8 +229 0x0D08 //RX_FDEQ_BIN_9 +230 0x0000 //RX_FDEQ_BIN_10 +231 0x0000 //RX_FDEQ_BIN_11 +232 0x0000 //RX_FDEQ_BIN_12 +233 0x0000 //RX_FDEQ_BIN_13 +234 0x0000 //RX_FDEQ_BIN_14 +235 0x0000 //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x4000 //RX_FDEQ_RESRV_0 +245 0x0320 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0030 //RX_FDDRC_BAND_MARGIN_1 +248 0x0050 //RX_FDDRC_BAND_MARGIN_2 +249 0x0080 //RX_FDDRC_BAND_MARGIN_3 +250 0x0007 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x5000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x6400 //RX_FDDRC_THRD_3_2 +258 0x6400 //RX_FDDRC_THRD_3_3 +259 0x2000 //RX_FDDRC_SLANT_0_0 +260 0x2000 //RX_FDDRC_SLANT_0_1 +261 0x2000 //RX_FDDRC_SLANT_0_2 +262 0x2000 //RX_FDDRC_SLANT_0_3 +263 0x5333 //RX_FDDRC_SLANT_1_0 +264 0x5333 //RX_FDDRC_SLANT_1_1 +265 0x5333 //RX_FDDRC_SLANT_1_2 +266 0x5333 //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +286 0x000C //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 +#VOL 1 +163 0x3000 //RX_TDDRC_ALPHA_UP_1 +164 0x3000 //RX_TDDRC_ALPHA_UP_2 +165 0x3000 //RX_TDDRC_ALPHA_UP_3 +166 0x3000 //RX_TDDRC_ALPHA_UP_4 +184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +190 0x7FFF //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +269 0x0000 //RX_TDDRC_THRD_0 +270 0x0000 //RX_TDDRC_THRD_1 +271 0x2030 //RX_TDDRC_THRD_2 +272 0x2030 //RX_TDDRC_THRD_3 +273 0x0800 //RX_TDDRC_SLANT_0 +274 0x7EB8 //RX_TDDRC_SLANT_1 +275 0x3000 //RX_TDDRC_ALPHA_UP_0 +276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x199A //RX_TDDRC_HMNC_GAIN +279 0x0001 //RX_TDDRC_SMT_FLAG +280 0x0CCD //RX_TDDRC_SMT_W +281 0x0478 //RX_TDDRC_DRC_GAIN +195 0x0014 //RX_FDEQ_SUBNUM +196 0x4848 //RX_FDEQ_GAIN_0 +197 0x4848 //RX_FDEQ_GAIN_1 +198 0x4848 //RX_FDEQ_GAIN_2 +199 0x4848 //RX_FDEQ_GAIN_3 +200 0x4848 //RX_FDEQ_GAIN_4 +201 0x4848 //RX_FDEQ_GAIN_5 +202 0x4848 //RX_FDEQ_GAIN_6 +203 0x4848 //RX_FDEQ_GAIN_7 +204 0x4848 //RX_FDEQ_GAIN_8 +205 0x4848 //RX_FDEQ_GAIN_9 +206 0x4848 //RX_FDEQ_GAIN_10 +207 0x4848 //RX_FDEQ_GAIN_11 +208 0x4848 //RX_FDEQ_GAIN_12 +209 0x4848 //RX_FDEQ_GAIN_13 +210 0x4848 //RX_FDEQ_GAIN_14 +211 0x4848 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0202 //RX_FDEQ_BIN_0 +221 0x0203 //RX_FDEQ_BIN_1 +222 0x0303 //RX_FDEQ_BIN_2 +223 0x0304 //RX_FDEQ_BIN_3 +224 0x0405 //RX_FDEQ_BIN_4 +225 0x0506 //RX_FDEQ_BIN_5 +226 0x0708 //RX_FDEQ_BIN_6 +227 0x090A //RX_FDEQ_BIN_7 +228 0x0B0C //RX_FDEQ_BIN_8 +229 0x0D08 //RX_FDEQ_BIN_9 +230 0x0000 //RX_FDEQ_BIN_10 +231 0x0000 //RX_FDEQ_BIN_11 +232 0x0000 //RX_FDEQ_BIN_12 +233 0x0000 //RX_FDEQ_BIN_13 +234 0x0000 //RX_FDEQ_BIN_14 +235 0x0000 //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x4000 //RX_FDEQ_RESRV_0 +245 0x0320 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0030 //RX_FDDRC_BAND_MARGIN_1 +248 0x0050 //RX_FDDRC_BAND_MARGIN_2 +249 0x0080 //RX_FDDRC_BAND_MARGIN_3 +250 0x0007 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x5000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x6400 //RX_FDDRC_THRD_3_2 +258 0x6400 //RX_FDDRC_THRD_3_3 +259 0x2000 //RX_FDDRC_SLANT_0_0 +260 0x2000 //RX_FDDRC_SLANT_0_1 +261 0x2000 //RX_FDDRC_SLANT_0_2 +262 0x2000 //RX_FDDRC_SLANT_0_3 +263 0x5333 //RX_FDDRC_SLANT_1_0 +264 0x5333 //RX_FDDRC_SLANT_1_1 +265 0x5333 //RX_FDDRC_SLANT_1_2 +266 0x5333 //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +286 0x0014 //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 +#VOL 2 +163 0x3000 //RX_TDDRC_ALPHA_UP_1 +164 0x3000 //RX_TDDRC_ALPHA_UP_2 +165 0x3000 //RX_TDDRC_ALPHA_UP_3 +166 0x3000 //RX_TDDRC_ALPHA_UP_4 +184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +190 0x7FFF //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +269 0x0000 //RX_TDDRC_THRD_0 +270 0x0000 //RX_TDDRC_THRD_1 +271 0x2030 //RX_TDDRC_THRD_2 +272 0x2030 //RX_TDDRC_THRD_3 +273 0x0800 //RX_TDDRC_SLANT_0 +274 0x7EB8 //RX_TDDRC_SLANT_1 +275 0x3000 //RX_TDDRC_ALPHA_UP_0 +276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x199A //RX_TDDRC_HMNC_GAIN +279 0x0001 //RX_TDDRC_SMT_FLAG +280 0x0CCD //RX_TDDRC_SMT_W +281 0x0478 //RX_TDDRC_DRC_GAIN +195 0x0014 //RX_FDEQ_SUBNUM +196 0x4848 //RX_FDEQ_GAIN_0 +197 0x4848 //RX_FDEQ_GAIN_1 +198 0x4848 //RX_FDEQ_GAIN_2 +199 0x4848 //RX_FDEQ_GAIN_3 +200 0x4848 //RX_FDEQ_GAIN_4 +201 0x4848 //RX_FDEQ_GAIN_5 +202 0x4848 //RX_FDEQ_GAIN_6 +203 0x4848 //RX_FDEQ_GAIN_7 +204 0x4848 //RX_FDEQ_GAIN_8 +205 0x4848 //RX_FDEQ_GAIN_9 +206 0x4848 //RX_FDEQ_GAIN_10 +207 0x4848 //RX_FDEQ_GAIN_11 +208 0x4848 //RX_FDEQ_GAIN_12 +209 0x4848 //RX_FDEQ_GAIN_13 +210 0x4848 //RX_FDEQ_GAIN_14 +211 0x4848 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0202 //RX_FDEQ_BIN_0 +221 0x0203 //RX_FDEQ_BIN_1 +222 0x0303 //RX_FDEQ_BIN_2 +223 0x0304 //RX_FDEQ_BIN_3 +224 0x0405 //RX_FDEQ_BIN_4 +225 0x0506 //RX_FDEQ_BIN_5 +226 0x0708 //RX_FDEQ_BIN_6 +227 0x090A //RX_FDEQ_BIN_7 +228 0x0B0C //RX_FDEQ_BIN_8 +229 0x0D08 //RX_FDEQ_BIN_9 +230 0x0000 //RX_FDEQ_BIN_10 +231 0x0000 //RX_FDEQ_BIN_11 +232 0x0000 //RX_FDEQ_BIN_12 +233 0x0000 //RX_FDEQ_BIN_13 +234 0x0000 //RX_FDEQ_BIN_14 +235 0x0000 //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x4000 //RX_FDEQ_RESRV_0 +245 0x0320 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0030 //RX_FDDRC_BAND_MARGIN_1 +248 0x0050 //RX_FDDRC_BAND_MARGIN_2 +249 0x0080 //RX_FDDRC_BAND_MARGIN_3 +250 0x0007 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x5000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x6400 //RX_FDDRC_THRD_3_2 +258 0x6400 //RX_FDDRC_THRD_3_3 +259 0x2000 //RX_FDDRC_SLANT_0_0 +260 0x2000 //RX_FDDRC_SLANT_0_1 +261 0x2000 //RX_FDDRC_SLANT_0_2 +262 0x2000 //RX_FDDRC_SLANT_0_3 +263 0x5333 //RX_FDDRC_SLANT_1_0 +264 0x5333 //RX_FDDRC_SLANT_1_1 +265 0x5333 //RX_FDDRC_SLANT_1_2 +266 0x5333 //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +286 0x0021 //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 +#VOL 3 +163 0x3000 //RX_TDDRC_ALPHA_UP_1 +164 0x3000 //RX_TDDRC_ALPHA_UP_2 +165 0x3000 //RX_TDDRC_ALPHA_UP_3 +166 0x3000 //RX_TDDRC_ALPHA_UP_4 +184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +190 0x7FFF //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +269 0x0000 //RX_TDDRC_THRD_0 +270 0x0000 //RX_TDDRC_THRD_1 +271 0x2030 //RX_TDDRC_THRD_2 +272 0x2030 //RX_TDDRC_THRD_3 +273 0x0800 //RX_TDDRC_SLANT_0 +274 0x7EB8 //RX_TDDRC_SLANT_1 +275 0x3000 //RX_TDDRC_ALPHA_UP_0 +276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x199A //RX_TDDRC_HMNC_GAIN +279 0x0001 //RX_TDDRC_SMT_FLAG +280 0x0CCD //RX_TDDRC_SMT_W +281 0x0478 //RX_TDDRC_DRC_GAIN +195 0x0014 //RX_FDEQ_SUBNUM +196 0x4848 //RX_FDEQ_GAIN_0 +197 0x4848 //RX_FDEQ_GAIN_1 +198 0x4848 //RX_FDEQ_GAIN_2 +199 0x4848 //RX_FDEQ_GAIN_3 +200 0x4848 //RX_FDEQ_GAIN_4 +201 0x4848 //RX_FDEQ_GAIN_5 +202 0x4848 //RX_FDEQ_GAIN_6 +203 0x4848 //RX_FDEQ_GAIN_7 +204 0x4848 //RX_FDEQ_GAIN_8 +205 0x4848 //RX_FDEQ_GAIN_9 +206 0x4848 //RX_FDEQ_GAIN_10 +207 0x4848 //RX_FDEQ_GAIN_11 +208 0x4848 //RX_FDEQ_GAIN_12 +209 0x4848 //RX_FDEQ_GAIN_13 +210 0x4848 //RX_FDEQ_GAIN_14 +211 0x4848 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0202 //RX_FDEQ_BIN_0 +221 0x0203 //RX_FDEQ_BIN_1 +222 0x0303 //RX_FDEQ_BIN_2 +223 0x0304 //RX_FDEQ_BIN_3 +224 0x0405 //RX_FDEQ_BIN_4 +225 0x0506 //RX_FDEQ_BIN_5 +226 0x0708 //RX_FDEQ_BIN_6 +227 0x090A //RX_FDEQ_BIN_7 +228 0x0B0C //RX_FDEQ_BIN_8 +229 0x0D08 //RX_FDEQ_BIN_9 +230 0x0000 //RX_FDEQ_BIN_10 +231 0x0000 //RX_FDEQ_BIN_11 +232 0x0000 //RX_FDEQ_BIN_12 +233 0x0000 //RX_FDEQ_BIN_13 +234 0x0000 //RX_FDEQ_BIN_14 +235 0x0000 //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x4000 //RX_FDEQ_RESRV_0 +245 0x0320 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0030 //RX_FDDRC_BAND_MARGIN_1 +248 0x0050 //RX_FDDRC_BAND_MARGIN_2 +249 0x0080 //RX_FDDRC_BAND_MARGIN_3 +250 0x0007 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x5000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x6400 //RX_FDDRC_THRD_3_2 +258 0x6400 //RX_FDDRC_THRD_3_3 +259 0x2000 //RX_FDDRC_SLANT_0_0 +260 0x2000 //RX_FDDRC_SLANT_0_1 +261 0x2000 //RX_FDDRC_SLANT_0_2 +262 0x2000 //RX_FDDRC_SLANT_0_3 +263 0x5333 //RX_FDDRC_SLANT_1_0 +264 0x5333 //RX_FDDRC_SLANT_1_1 +265 0x5333 //RX_FDDRC_SLANT_1_2 +266 0x5333 //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +286 0x0037 //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 +#VOL 4 +163 0x3000 //RX_TDDRC_ALPHA_UP_1 +164 0x3000 //RX_TDDRC_ALPHA_UP_2 +165 0x3000 //RX_TDDRC_ALPHA_UP_3 +166 0x3000 //RX_TDDRC_ALPHA_UP_4 +184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +190 0x7FFF //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +269 0x0000 //RX_TDDRC_THRD_0 +270 0x0000 //RX_TDDRC_THRD_1 +271 0x2030 //RX_TDDRC_THRD_2 +272 0x2030 //RX_TDDRC_THRD_3 +273 0x0800 //RX_TDDRC_SLANT_0 +274 0x7EB8 //RX_TDDRC_SLANT_1 +275 0x3000 //RX_TDDRC_ALPHA_UP_0 +276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x199A //RX_TDDRC_HMNC_GAIN +279 0x0001 //RX_TDDRC_SMT_FLAG +280 0x0CCD //RX_TDDRC_SMT_W +281 0x0478 //RX_TDDRC_DRC_GAIN +195 0x0014 //RX_FDEQ_SUBNUM +196 0x4848 //RX_FDEQ_GAIN_0 +197 0x4848 //RX_FDEQ_GAIN_1 +198 0x4848 //RX_FDEQ_GAIN_2 +199 0x4848 //RX_FDEQ_GAIN_3 +200 0x4848 //RX_FDEQ_GAIN_4 +201 0x4848 //RX_FDEQ_GAIN_5 +202 0x4848 //RX_FDEQ_GAIN_6 +203 0x4848 //RX_FDEQ_GAIN_7 +204 0x4848 //RX_FDEQ_GAIN_8 +205 0x4848 //RX_FDEQ_GAIN_9 +206 0x4848 //RX_FDEQ_GAIN_10 +207 0x4848 //RX_FDEQ_GAIN_11 +208 0x4848 //RX_FDEQ_GAIN_12 +209 0x4848 //RX_FDEQ_GAIN_13 +210 0x4848 //RX_FDEQ_GAIN_14 +211 0x4848 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0202 //RX_FDEQ_BIN_0 +221 0x0203 //RX_FDEQ_BIN_1 +222 0x0303 //RX_FDEQ_BIN_2 +223 0x0304 //RX_FDEQ_BIN_3 +224 0x0405 //RX_FDEQ_BIN_4 +225 0x0506 //RX_FDEQ_BIN_5 +226 0x0708 //RX_FDEQ_BIN_6 +227 0x090A //RX_FDEQ_BIN_7 +228 0x0B0C //RX_FDEQ_BIN_8 +229 0x0D08 //RX_FDEQ_BIN_9 +230 0x0000 //RX_FDEQ_BIN_10 +231 0x0000 //RX_FDEQ_BIN_11 +232 0x0000 //RX_FDEQ_BIN_12 +233 0x0000 //RX_FDEQ_BIN_13 +234 0x0000 //RX_FDEQ_BIN_14 +235 0x0000 //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x4000 //RX_FDEQ_RESRV_0 +245 0x0320 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0030 //RX_FDDRC_BAND_MARGIN_1 +248 0x0050 //RX_FDDRC_BAND_MARGIN_2 +249 0x0080 //RX_FDDRC_BAND_MARGIN_3 +250 0x0007 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x5000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x6400 //RX_FDDRC_THRD_3_2 +258 0x6400 //RX_FDDRC_THRD_3_3 +259 0x2000 //RX_FDDRC_SLANT_0_0 +260 0x2000 //RX_FDDRC_SLANT_0_1 +261 0x2000 //RX_FDDRC_SLANT_0_2 +262 0x2000 //RX_FDDRC_SLANT_0_3 +263 0x5333 //RX_FDDRC_SLANT_1_0 +264 0x5333 //RX_FDDRC_SLANT_1_1 +265 0x5333 //RX_FDDRC_SLANT_1_2 +266 0x5333 //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +286 0x005B //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 +#VOL 5 +163 0x3000 //RX_TDDRC_ALPHA_UP_1 +164 0x3000 //RX_TDDRC_ALPHA_UP_2 +165 0x3000 //RX_TDDRC_ALPHA_UP_3 +166 0x3000 //RX_TDDRC_ALPHA_UP_4 +184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +190 0x7FFF //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +269 0x0000 //RX_TDDRC_THRD_0 +270 0x0000 //RX_TDDRC_THRD_1 +271 0x2030 //RX_TDDRC_THRD_2 +272 0x2030 //RX_TDDRC_THRD_3 +273 0x0800 //RX_TDDRC_SLANT_0 +274 0x7EB8 //RX_TDDRC_SLANT_1 +275 0x3000 //RX_TDDRC_ALPHA_UP_0 +276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x199A //RX_TDDRC_HMNC_GAIN +279 0x0001 //RX_TDDRC_SMT_FLAG +280 0x0CCD //RX_TDDRC_SMT_W +281 0x0478 //RX_TDDRC_DRC_GAIN +195 0x0014 //RX_FDEQ_SUBNUM +196 0x4848 //RX_FDEQ_GAIN_0 +197 0x4848 //RX_FDEQ_GAIN_1 +198 0x4848 //RX_FDEQ_GAIN_2 +199 0x4848 //RX_FDEQ_GAIN_3 +200 0x4848 //RX_FDEQ_GAIN_4 +201 0x4848 //RX_FDEQ_GAIN_5 +202 0x4848 //RX_FDEQ_GAIN_6 +203 0x4848 //RX_FDEQ_GAIN_7 +204 0x4848 //RX_FDEQ_GAIN_8 +205 0x4848 //RX_FDEQ_GAIN_9 +206 0x4848 //RX_FDEQ_GAIN_10 +207 0x4848 //RX_FDEQ_GAIN_11 +208 0x4848 //RX_FDEQ_GAIN_12 +209 0x4848 //RX_FDEQ_GAIN_13 +210 0x4848 //RX_FDEQ_GAIN_14 +211 0x4848 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0202 //RX_FDEQ_BIN_0 +221 0x0203 //RX_FDEQ_BIN_1 +222 0x0303 //RX_FDEQ_BIN_2 +223 0x0304 //RX_FDEQ_BIN_3 +224 0x0405 //RX_FDEQ_BIN_4 +225 0x0506 //RX_FDEQ_BIN_5 +226 0x0708 //RX_FDEQ_BIN_6 +227 0x090A //RX_FDEQ_BIN_7 +228 0x0B0C //RX_FDEQ_BIN_8 +229 0x0D08 //RX_FDEQ_BIN_9 +230 0x0000 //RX_FDEQ_BIN_10 +231 0x0000 //RX_FDEQ_BIN_11 +232 0x0000 //RX_FDEQ_BIN_12 +233 0x0000 //RX_FDEQ_BIN_13 +234 0x0000 //RX_FDEQ_BIN_14 +235 0x0000 //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x4000 //RX_FDEQ_RESRV_0 +245 0x0320 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0030 //RX_FDDRC_BAND_MARGIN_1 +248 0x0050 //RX_FDDRC_BAND_MARGIN_2 +249 0x0080 //RX_FDDRC_BAND_MARGIN_3 +250 0x0007 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x5000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x6400 //RX_FDDRC_THRD_3_2 +258 0x6400 //RX_FDDRC_THRD_3_3 +259 0x2000 //RX_FDDRC_SLANT_0_0 +260 0x2000 //RX_FDDRC_SLANT_0_1 +261 0x2000 //RX_FDDRC_SLANT_0_2 +262 0x2000 //RX_FDDRC_SLANT_0_3 +263 0x5333 //RX_FDDRC_SLANT_1_0 +264 0x5333 //RX_FDDRC_SLANT_1_1 +265 0x5333 //RX_FDDRC_SLANT_1_2 +266 0x5333 //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +286 0x0099 //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 +#VOL 6 +163 0x3000 //RX_TDDRC_ALPHA_UP_1 +164 0x3000 //RX_TDDRC_ALPHA_UP_2 +165 0x3000 //RX_TDDRC_ALPHA_UP_3 +166 0x3000 //RX_TDDRC_ALPHA_UP_4 +184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +190 0x7FFF //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +269 0x0000 //RX_TDDRC_THRD_0 +270 0x0000 //RX_TDDRC_THRD_1 +271 0x2030 //RX_TDDRC_THRD_2 +272 0x2030 //RX_TDDRC_THRD_3 +273 0x0800 //RX_TDDRC_SLANT_0 +274 0x7EB8 //RX_TDDRC_SLANT_1 +275 0x3000 //RX_TDDRC_ALPHA_UP_0 +276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x199A //RX_TDDRC_HMNC_GAIN +279 0x0001 //RX_TDDRC_SMT_FLAG +280 0x0CCD //RX_TDDRC_SMT_W +281 0x0478 //RX_TDDRC_DRC_GAIN +195 0x0014 //RX_FDEQ_SUBNUM +196 0x4848 //RX_FDEQ_GAIN_0 +197 0x4848 //RX_FDEQ_GAIN_1 +198 0x4848 //RX_FDEQ_GAIN_2 +199 0x4848 //RX_FDEQ_GAIN_3 +200 0x4848 //RX_FDEQ_GAIN_4 +201 0x4848 //RX_FDEQ_GAIN_5 +202 0x4848 //RX_FDEQ_GAIN_6 +203 0x4848 //RX_FDEQ_GAIN_7 +204 0x4848 //RX_FDEQ_GAIN_8 +205 0x4848 //RX_FDEQ_GAIN_9 +206 0x4848 //RX_FDEQ_GAIN_10 +207 0x4848 //RX_FDEQ_GAIN_11 +208 0x4848 //RX_FDEQ_GAIN_12 +209 0x4848 //RX_FDEQ_GAIN_13 +210 0x4848 //RX_FDEQ_GAIN_14 +211 0x4848 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0202 //RX_FDEQ_BIN_0 +221 0x0203 //RX_FDEQ_BIN_1 +222 0x0303 //RX_FDEQ_BIN_2 +223 0x0304 //RX_FDEQ_BIN_3 +224 0x0405 //RX_FDEQ_BIN_4 +225 0x0506 //RX_FDEQ_BIN_5 +226 0x0708 //RX_FDEQ_BIN_6 +227 0x090A //RX_FDEQ_BIN_7 +228 0x0B0C //RX_FDEQ_BIN_8 +229 0x0D08 //RX_FDEQ_BIN_9 +230 0x0000 //RX_FDEQ_BIN_10 +231 0x0000 //RX_FDEQ_BIN_11 +232 0x0000 //RX_FDEQ_BIN_12 +233 0x0000 //RX_FDEQ_BIN_13 +234 0x0000 //RX_FDEQ_BIN_14 +235 0x0000 //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x4000 //RX_FDEQ_RESRV_0 +245 0x0320 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0030 //RX_FDDRC_BAND_MARGIN_1 +248 0x0050 //RX_FDDRC_BAND_MARGIN_2 +249 0x0080 //RX_FDDRC_BAND_MARGIN_3 +250 0x0007 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x5000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x6400 //RX_FDDRC_THRD_3_2 +258 0x6400 //RX_FDDRC_THRD_3_3 +259 0x2000 //RX_FDDRC_SLANT_0_0 +260 0x2000 //RX_FDDRC_SLANT_0_1 +261 0x2000 //RX_FDDRC_SLANT_0_2 +262 0x2000 //RX_FDDRC_SLANT_0_3 +263 0x5333 //RX_FDDRC_SLANT_1_0 +264 0x5333 //RX_FDDRC_SLANT_1_1 +265 0x5333 //RX_FDDRC_SLANT_1_2 +266 0x5333 //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +286 0x0100 //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 #CASE_NAME HEADSET-GOOGLE_CONDOR_CERTIFICATION1-VOICE_GENERIC-WB -#PARAM_MODE FULL -#PARAM_TYPE TX+RX -#TOTAL_CUSTOM_STEP 7 +#PARAM_MODE Full +#PARAM_TYPE TX+2RX +#TOTAL_CUSTOM_STEP 7+7 #TX 0 0x0009 //TX_OPERATION_MODE_0 1 0x0008 //TX_OPERATION_MODE_1 @@ -30068,7 +45640,7 @@ 239 0x0800 //TX_DT_RESRV_7 240 0x0800 //TX_DT_RESRV_8 241 0x0000 //TX_DT_RESRV_9 -242 0xF400 //TX_THR_SN_EST_0 +242 0xFA00 //TX_THR_SN_EST_0 243 0xF400 //TX_THR_SN_EST_1 244 0xF600 //TX_THR_SN_EST_2 245 0xF400 //TX_THR_SN_EST_3 @@ -30077,20 +45649,20 @@ 248 0xF400 //TX_THR_SN_EST_6 249 0xF600 //TX_THR_SN_EST_7 250 0x0000 //TX_DELTA_THR_SN_EST_0 -251 0x0000 //TX_DELTA_THR_SN_EST_1 +251 0x0200 //TX_DELTA_THR_SN_EST_1 252 0x0200 //TX_DELTA_THR_SN_EST_2 253 0x0200 //TX_DELTA_THR_SN_EST_3 254 0x0200 //TX_DELTA_THR_SN_EST_4 255 0x0200 //TX_DELTA_THR_SN_EST_5 -256 0x0200 //TX_DELTA_THR_SN_EST_6 +256 0x0000 //TX_DELTA_THR_SN_EST_6 257 0x0200 //TX_DELTA_THR_SN_EST_7 258 0x6000 //TX_LAMBDA_NN_EST_0 -259 0x6000 //TX_LAMBDA_NN_EST_1 +259 0x4000 //TX_LAMBDA_NN_EST_1 260 0x4000 //TX_LAMBDA_NN_EST_2 261 0x4000 //TX_LAMBDA_NN_EST_3 262 0x4000 //TX_LAMBDA_NN_EST_4 263 0x4000 //TX_LAMBDA_NN_EST_5 -264 0x4000 //TX_LAMBDA_NN_EST_6 +264 0x6000 //TX_LAMBDA_NN_EST_6 265 0x4000 //TX_LAMBDA_NN_EST_7 266 0x0400 //TX_N_SN_EST 267 0x001E //TX_INBEAM_T @@ -30108,16 +45680,16 @@ 279 0x1000 //TX_B_POST_FLT_0 280 0x1000 //TX_B_POST_FLT_1 281 0x000F //TX_NS_LVL_CTRL_0 -282 0x000F //TX_NS_LVL_CTRL_1 -283 0x0011 //TX_NS_LVL_CTRL_2 +282 0x0011 //TX_NS_LVL_CTRL_1 +283 0x000F //TX_NS_LVL_CTRL_2 284 0x000F //TX_NS_LVL_CTRL_3 285 0x000F //TX_NS_LVL_CTRL_4 286 0x000F //TX_NS_LVL_CTRL_5 287 0x000F //TX_NS_LVL_CTRL_6 288 0x0011 //TX_NS_LVL_CTRL_7 289 0x000C //TX_MIN_GAIN_S_0 -290 0x000C //TX_MIN_GAIN_S_1 -291 0x000F //TX_MIN_GAIN_S_2 +290 0x000F //TX_MIN_GAIN_S_1 +291 0x000C //TX_MIN_GAIN_S_2 292 0x000C //TX_MIN_GAIN_S_3 293 0x000C //TX_MIN_GAIN_S_4 294 0x000C //TX_MIN_GAIN_S_5 @@ -30141,12 +45713,12 @@ 312 0x7FFF //TX_A_POST_FILT_0 313 0x2000 //TX_A_POST_FILT_1 314 0x4000 //TX_A_POST_FILT_S_0 -315 0x4000 //TX_A_POST_FILT_S_1 +315 0x5000 //TX_A_POST_FILT_S_1 316 0x5000 //TX_A_POST_FILT_S_2 317 0x5000 //TX_A_POST_FILT_S_3 318 0x5000 //TX_A_POST_FILT_S_4 319 0x5000 //TX_A_POST_FILT_S_5 -320 0x5000 //TX_A_POST_FILT_S_6 +320 0x4000 //TX_A_POST_FILT_S_6 321 0x5000 //TX_A_POST_FILT_S_7 322 0x1000 //TX_B_POST_FILT_0 323 0x1000 //TX_B_POST_FILT_1 @@ -30193,7 +45765,7 @@ 364 0x0000 //TX_K_APT 365 0x0001 //TX_NOISEDET 366 0x0190 //TX_NDETCT -367 0x0050 //TX_NOISE_TH_0 +367 0x0102 //TX_NOISE_TH_0 368 0x7FFF //TX_NOISE_TH_0_2 369 0x7FFF //TX_NOISE_TH_0_3 370 0x07D0 //TX_NOISE_TH_1 @@ -30205,11 +45777,11 @@ 376 0x7FFF //TX_NOISE_TH_5_3 377 0x7FFF //TX_NOISE_TH_5_4 378 0x044C //TX_NOISE_TH_6 -379 0x0014 //TX_MINENOISE_TH -380 0x4000 //TX_MINENOISE_MIC0_TH_MTS -381 0xFFEE //TX_MINENOISE_MIC0_TH_EXP -382 0x6000 //TX_MINENOISE_MIC0_S_TH_MTS -383 0xFFF3 //TX_MINENOISE_MIC0_S_TH_EXP +379 0x00F8 //TX_MINENOISE_TH +380 0xD508 //TX_MORENS_TFMASK_TH +381 0x0001 //TX_DRC_QUIET_FLOOR +382 0x3A98 //TX_RATIODTL_CUT_TH +383 0x0DAC //TX_DT_CUT_K1 384 0x0666 //TX_OUT_ENER_S_TH_CLEAN 385 0x0666 //TX_OUT_ENER_S_TH_LESSCLEAN 386 0x0333 //TX_OUT_ENER_S_TH_NOISY @@ -30217,22 +45789,22 @@ 388 0x0333 //TX_OUT_ENER_TH_SPEECH 389 0x2000 //TX_SN_NPB_GAIN 390 0x0000 //TX_NN_NPB_GAIN -391 0x0000 //TX_CSX_ALPHA_0 -392 0x0000 //TX_CSX_ALPHA_1 -393 0x0000 //TX_CSX_ALPHA_2 -394 0x0000 //TX_CSX_ALPHA_3 -395 0x0800 //TX_MU_ARSP_EST -396 0x00C8 //TX_P_OUTBEAM_MIN_TH +391 0x7FFF //TX_POST_MASK_SUP_HSNE +392 0x1388 //TX_TAIL_DET_TH +393 0x4000 //TX_B_LESSCUT_RTO_WTA +394 0x0000 //TX_MEL_G_R +395 0x0080 //TX_SUPHIGH_TH +396 0x0000 //TX_MASK_G_R 397 0x0002 //TX_EXTRA_NS_L -398 0x0800 //TX_EXTRA_NS_A -399 0x0005 //TX_VR_NOISE_FLOOR_TH +398 0x1800 //TX_C_POST_FLT_MASK +399 0x7FFF //TX_A_POST_FLT_WNS 400 0x0148 //TX_MIN_G_LOW300HZ 401 0x0002 //TX_MAXLEVEL_CNG 402 0x00B4 //TX_STN_NOISE_TH 403 0x4000 //TX_POST_MASK_SUP 404 0x7FFF //TX_POST_MASK_ADJUST 405 0x00C8 //TX_NS_ENOISE_MIC0_TH -406 0x0014 //TX_MINENOISE_MIC0_TH +406 0x00DC //TX_MINENOISE_MIC0_TH 407 0x012C //TX_MINENOISE_MIC0_S_TH 408 0x7FFF //TX_MIN_G_CTRL_SSNS 409 0x0000 //TX_METAL_RTO_THR @@ -30340,16 +45912,16 @@ 511 0x6666 //TX_MIC_TO_BFGAIN 512 0x0000 //TX_MICTOBFGAIN0 513 0x0000 //TX_FASTMUE_TH -514 0x0000 //TX_DERVB_LEN_0 -515 0x0000 //TX_DERVB_LEN_1 -516 0x0000 //TX_RHO_DERVB -517 0x0000 //TX_MIC_INDX_DERVB -518 0x0000 //TX_MU_DERVB -519 0x0000 //TX_DR_RESRV_0 -520 0x0000 //TX_DR_RESRV_1 -521 0x0000 //TX_DR_RESRV_2 -522 0x0000 //TX_DR_RESRV_3 -523 0x0000 //TX_DR_RESRV_4 +514 0xC000 //TX_DEREVERB_LF_MU +515 0xC000 //TX_DEREVERB_HF_MU +516 0xCCCC //TX_DEREVERB_DELAY +517 0xD999 //TX_DEREVERB_COEF_LEN +518 0x1F40 //TX_DEREVERB_DNR +519 0x0000 //TX_DEREVERB_ALPHA +520 0x0000 //TX_DEREVERB_BETA +521 0x0000 //TX_GSC_RTOL_TH +522 0x7000 //TX_GSC_RTOH_TH +523 0x0064 //TX_WIDE2_MEANHTH 524 0x0000 //TX_DR_RESRV_5 525 0x0000 //TX_DR_RESRV_6 526 0x0000 //TX_DR_RESRV_7 @@ -30717,14 +46289,79 @@ 888 0x00C8 //TX_FASTNS_ARSPC_TH 889 0xC000 //TX_FASTNS_MASK5_TH 890 0x4848 //TX_POSTSSA_MIN_G_VR_MASK -891 0x7FFF //TX_A_LESSCUT_RTO_MASK +891 0x4000 //TX_A_LESSCUT_RTO_MASK 892 0x1770 //TX_FASTNS_NOISETH 893 0xC000 //TX_FASTNS_SSA_THLFL 894 0xC000 //TX_FASTNS_SSA_THHFL 895 0xCCCC //TX_FASTNS_SSA_THLFH 896 0xD999 //TX_FASTNS_SSA_THHFH +897 0x2339 //TX_SENDFUNC_REG_MICMUTE +898 0x0021 //TX_SENDFUNC_REG_MICMUTE1 +899 0x02BC //TX_MICMUTE_RATIO_THR +900 0x0140 //TX_MICMUTE_AMP_THR +901 0x0004 //TX_MICMUTE_HPF_IND +902 0x00C0 //TX_MICMUTE_LOG_EYR_TH +903 0x0008 //TX_MICMUTE_CVG_TIME +904 0x0008 //TX_MICMUTE_RELEASE_TIME +905 0x01FE //TX_MIC_VOLUME_MIC0MUTE +906 0x0020 //TX_MICMUTE_EPD_OFFSET_0 +907 0x001E //TX_MICMUTE_FRQ_AEC_L +908 0x7999 //TX_MICMUTE_EAD_THR +909 0x7FFF //TX_MICMUTE_LAMBDA_CB_NLE +910 0x7FFF //TX_MICMUTE_LAMBDA_RE_EST +911 0x4000 //TX_DTD_THR1_MICMUTE_0 +912 0x7000 //TX_DTD_THR1_MICMUTE_1 +913 0x7FFF //TX_DTD_THR1_MICMUTE_2 +914 0x7FFF //TX_DTD_THR1_MICMUTE_3 +915 0x6CCC //TX_DTD_THR2_MICMUTE_0 +916 0x0400 //TX_MICMUTE_MIN_EQ_RE_EST_0 +917 0x0400 //TX_MICMUTE_MIN_EQ_RE_EST_1 +918 0x1000 //TX_MICMUTE_MIN_EQ_RE_EST_2 +919 0x7FFF //TX_MICMUTE_MIN_EQ_RE_EST_3 +920 0x7FFF //TX_MICMUTE_MIN_EQ_RE_EST_4 +921 0x4000 //TX_MICMUTE_C_POST_FLT +922 0x03E8 //TX_MICMUTE_DT_CUT_K +923 0x0001 //TX_MICMUTE_DT_CUT_THR +924 0x03E8 //TX_MICMUTE_DT_CUT_K2 +925 0x0001 //TX_MICMUTE_DT_CUT_THR2 +926 0x0064 //TX_MICMUTE_DT2_HOLD_N +927 0x1000 //TX_MICMUTE_RATIODTH_THCUT +928 0x1000 //TX_MICMUTE_B_POST_FLT_ECHOL +929 0x7FFF //TX_MICMUTE_B_POST_FLT_ECHOH +930 0x0400 //TX_MICMUTE_C_POST_FLT_MASK +931 0x7999 //TX_MICMUTE_RATIODTL_CUT_TH +932 0x0258 //TX_MICMUTE_DT_CUT_K1 +933 0x0800 //TX_MICMUTE_N2_SN_EST +934 0xFC00 //TX_MICMUTE_THR_SN_EST_0 +935 0x001C //TX_MICMUTE_MIN_G_CTRL_0 +936 0x6000 //TX_MICMUTE_A_POST_FILT_S_0 +937 0x7000 //TX_MICMUTE_B_POST_FILT_0 +938 0x2710 //TX_MIC1RUB_AMP_THR +939 0x0010 //TX_MIC1MUTE_RATIO_THR +940 0x0450 //TX_MIC1MUTE_AMP_THR +941 0x0008 //TX_MIC1MUTE_CVG_TIME +942 0x0008 //TX_MIC1MUTE_RELEASE_TIME +943 0x0000 //TX_AMS_RESRV_01 +944 0x0000 //TX_AMS_RESRV_02 +945 0x0000 //TX_AMS_RESRV_03 +946 0x0000 //TX_AMS_RESRV_04 +947 0x0000 //TX_AMS_RESRV_05 +948 0x0000 //TX_AMS_RESRV_06 +949 0x0000 //TX_AMS_RESRV_07 +950 0x0000 //TX_AMS_RESRV_08 +951 0x0000 //TX_AMS_RESRV_09 +952 0x0000 //TX_AMS_RESRV_10 +953 0x0000 //TX_AMS_RESRV_11 +954 0x0000 //TX_AMS_RESRV_12 +955 0x0000 //TX_AMS_RESRV_13 +956 0x0000 //TX_AMS_RESRV_14 +957 0x0000 //TX_AMS_RESRV_15 +958 0x0000 //TX_AMS_RESRV_16 +959 0x0000 //TX_AMS_RESRV_17 +960 0x0000 //TX_AMS_RESRV_18 +961 0x0000 //TX_AMS_RESRV_19 #RX -0 0x0024 //RX_RECVFUNC_MODE_0 +0 0x2024 //RX_RECVFUNC_MODE_0 1 0x0000 //RX_RECVFUNC_MODE_1 2 0x0001 //RX_SAMPLINGFREQ_SIG 3 0x0001 //RX_SAMPLINGFREQ_PROC @@ -31574,11 +47211,862 @@ 110 0x0000 //RX_FDDRC_RESRV_0 129 0x0100 //RX_SPK_VOL 130 0x0000 //RX_VOL_RESRV_0 +#RX 2 +157 0x2024 //RX_RECVFUNC_MODE_0 +158 0x0000 //RX_RECVFUNC_MODE_1 +159 0x0001 //RX_SAMPLINGFREQ_SIG +160 0x0001 //RX_SAMPLINGFREQ_PROC +161 0x000A //RX_FRAME_SZ +162 0x0000 //RX_DELAY_OPT +163 0x3000 //RX_TDDRC_ALPHA_UP_1 +164 0x3000 //RX_TDDRC_ALPHA_UP_2 +165 0x3000 //RX_TDDRC_ALPHA_UP_3 +166 0x3000 //RX_TDDRC_ALPHA_UP_4 +167 0x0800 //RX_PGA +168 0x7FFF //RX_A_HP +169 0x4000 //RX_B_PE +170 0x3800 //RX_THR_PITCH_DET_0 +171 0x3000 //RX_THR_PITCH_DET_1 +172 0x2800 //RX_THR_PITCH_DET_2 +173 0x0008 //RX_PITCH_BFR_LEN +174 0x0003 //RX_SBD_PITCH_DET +175 0x0100 //RX_PP_RESRV_0 +176 0x0020 //RX_PP_RESRV_1 +177 0x0600 //RX_N_SN_EST +178 0x000C //RX_N2_SN_EST +179 0x0010 //RX_NS_LVL_CTRL +180 0xF800 //RX_THR_SN_EST +181 0x7CCD //RX_LAMBDA_PFILT +182 0x000A //RX_FENS_RESRV_0 +183 0x0190 //RX_FENS_RESRV_1 +184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +187 0x0002 //RX_EXTRA_NS_L +188 0x0800 //RX_EXTRA_NS_A +189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +190 0x7FFF //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +192 0x199A //RX_A_POST_FLT +193 0x0000 //RX_LMT_THRD +194 0x4000 //RX_LMT_ALPHA +195 0x001C //RX_FDEQ_SUBNUM +196 0x4848 //RX_FDEQ_GAIN_0 +197 0x4848 //RX_FDEQ_GAIN_1 +198 0x4848 //RX_FDEQ_GAIN_2 +199 0x4848 //RX_FDEQ_GAIN_3 +200 0x4848 //RX_FDEQ_GAIN_4 +201 0x4848 //RX_FDEQ_GAIN_5 +202 0x4848 //RX_FDEQ_GAIN_6 +203 0x4848 //RX_FDEQ_GAIN_7 +204 0x4848 //RX_FDEQ_GAIN_8 +205 0x4848 //RX_FDEQ_GAIN_9 +206 0x4848 //RX_FDEQ_GAIN_10 +207 0x4848 //RX_FDEQ_GAIN_11 +208 0x4848 //RX_FDEQ_GAIN_12 +209 0x4848 //RX_FDEQ_GAIN_13 +210 0x4848 //RX_FDEQ_GAIN_14 +211 0x4848 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0202 //RX_FDEQ_BIN_0 +221 0x0203 //RX_FDEQ_BIN_1 +222 0x0303 //RX_FDEQ_BIN_2 +223 0x0304 //RX_FDEQ_BIN_3 +224 0x0405 //RX_FDEQ_BIN_4 +225 0x0506 //RX_FDEQ_BIN_5 +226 0x0708 //RX_FDEQ_BIN_6 +227 0x090A //RX_FDEQ_BIN_7 +228 0x0B0C //RX_FDEQ_BIN_8 +229 0x0D0E //RX_FDEQ_BIN_9 +230 0x0E0F //RX_FDEQ_BIN_10 +231 0x0F10 //RX_FDEQ_BIN_11 +232 0x1011 //RX_FDEQ_BIN_12 +233 0x1104 //RX_FDEQ_BIN_13 +234 0x0000 //RX_FDEQ_BIN_14 +235 0x0000 //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x4000 //RX_FDEQ_RESRV_0 +245 0x0320 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0030 //RX_FDDRC_BAND_MARGIN_1 +248 0x0050 //RX_FDDRC_BAND_MARGIN_2 +249 0x0080 //RX_FDDRC_BAND_MARGIN_3 +250 0x0007 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x5000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x6400 //RX_FDDRC_THRD_3_2 +258 0x6400 //RX_FDDRC_THRD_3_3 +259 0x2000 //RX_FDDRC_SLANT_0_0 +260 0x2000 //RX_FDDRC_SLANT_0_1 +261 0x2000 //RX_FDDRC_SLANT_0_2 +262 0x2000 //RX_FDDRC_SLANT_0_3 +263 0x5333 //RX_FDDRC_SLANT_1_0 +264 0x5333 //RX_FDDRC_SLANT_1_1 +265 0x5333 //RX_FDDRC_SLANT_1_2 +266 0x5333 //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +268 0x0002 //RX_FILTINDX +269 0x0000 //RX_TDDRC_THRD_0 +270 0x0000 //RX_TDDRC_THRD_1 +271 0x2000 //RX_TDDRC_THRD_2 +272 0x3000 //RX_TDDRC_THRD_3 +273 0x0800 //RX_TDDRC_SLANT_0 +274 0x7EB8 //RX_TDDRC_SLANT_1 +275 0x3000 //RX_TDDRC_ALPHA_UP_0 +276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x199A //RX_TDDRC_HMNC_GAIN +279 0x0001 //RX_TDDRC_SMT_FLAG +280 0x0CCD //RX_TDDRC_SMT_W +281 0x0196 //RX_TDDRC_DRC_GAIN +282 0x7C00 //RX_LAMBDA_PKA_FP +283 0x2000 //RX_TPKA_FP +284 0x2000 //RX_MIN_G_FP +285 0x0080 //RX_MAX_G_FP +286 0x000C //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 +288 0x0000 //RX_MAXLEVEL_CNG +289 0x3000 //RX_BWE_UV_TH +290 0x3000 //RX_BWE_UV_TH2 +291 0x1800 //RX_BWE_UV_TH3 +292 0x1000 //RX_BWE_V_TH +293 0x04CD //RX_BWE_GAIN1_V_TH1 +294 0x0F33 //RX_BWE_GAIN1_V_TH2 +295 0x7333 //RX_BWE_UV_EQ +296 0x199A //RX_BWE_V_EQ +297 0x7333 //RX_BWE_TONE_TH +298 0x0004 //RX_BWE_UV_HOLD_T +299 0x6CCD //RX_BWE_GAIN2_ALPHA +300 0x799A //RX_BWE_GAIN3_ALPHA +301 0x001E //RX_BWE_CUTOFF +302 0x3000 //RX_BWE_GAINFILL +303 0x3200 //RX_BWE_MAXTH_TONE +304 0x2000 //RX_BWE_EQ_0 +305 0x2000 //RX_BWE_EQ_1 +306 0x2000 //RX_BWE_EQ_2 +307 0x2000 //RX_BWE_EQ_3 +308 0x2000 //RX_BWE_EQ_4 +309 0x2000 //RX_BWE_EQ_5 +310 0x2000 //RX_BWE_EQ_6 +311 0x0000 //RX_BWE_RESRV_0 +312 0x0000 //RX_BWE_RESRV_1 +313 0x0000 //RX_BWE_RESRV_2 +#VOL 0 +163 0x3000 //RX_TDDRC_ALPHA_UP_1 +164 0x3000 //RX_TDDRC_ALPHA_UP_2 +165 0x3000 //RX_TDDRC_ALPHA_UP_3 +166 0x3000 //RX_TDDRC_ALPHA_UP_4 +184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +190 0x7FFF //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +269 0x0000 //RX_TDDRC_THRD_0 +270 0x0000 //RX_TDDRC_THRD_1 +271 0x2000 //RX_TDDRC_THRD_2 +272 0x3000 //RX_TDDRC_THRD_3 +273 0x0800 //RX_TDDRC_SLANT_0 +274 0x7EB8 //RX_TDDRC_SLANT_1 +275 0x3000 //RX_TDDRC_ALPHA_UP_0 +276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x199A //RX_TDDRC_HMNC_GAIN +279 0x0001 //RX_TDDRC_SMT_FLAG +280 0x0CCD //RX_TDDRC_SMT_W +281 0x0196 //RX_TDDRC_DRC_GAIN +195 0x001C //RX_FDEQ_SUBNUM +196 0x4848 //RX_FDEQ_GAIN_0 +197 0x4848 //RX_FDEQ_GAIN_1 +198 0x4848 //RX_FDEQ_GAIN_2 +199 0x4848 //RX_FDEQ_GAIN_3 +200 0x4848 //RX_FDEQ_GAIN_4 +201 0x4848 //RX_FDEQ_GAIN_5 +202 0x4848 //RX_FDEQ_GAIN_6 +203 0x4848 //RX_FDEQ_GAIN_7 +204 0x4848 //RX_FDEQ_GAIN_8 +205 0x4848 //RX_FDEQ_GAIN_9 +206 0x4848 //RX_FDEQ_GAIN_10 +207 0x4848 //RX_FDEQ_GAIN_11 +208 0x4848 //RX_FDEQ_GAIN_12 +209 0x4848 //RX_FDEQ_GAIN_13 +210 0x4848 //RX_FDEQ_GAIN_14 +211 0x4848 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0202 //RX_FDEQ_BIN_0 +221 0x0203 //RX_FDEQ_BIN_1 +222 0x0303 //RX_FDEQ_BIN_2 +223 0x0304 //RX_FDEQ_BIN_3 +224 0x0405 //RX_FDEQ_BIN_4 +225 0x0506 //RX_FDEQ_BIN_5 +226 0x0708 //RX_FDEQ_BIN_6 +227 0x090A //RX_FDEQ_BIN_7 +228 0x0B0C //RX_FDEQ_BIN_8 +229 0x0D0E //RX_FDEQ_BIN_9 +230 0x0E0F //RX_FDEQ_BIN_10 +231 0x0F10 //RX_FDEQ_BIN_11 +232 0x1011 //RX_FDEQ_BIN_12 +233 0x1104 //RX_FDEQ_BIN_13 +234 0x0000 //RX_FDEQ_BIN_14 +235 0x0000 //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x4000 //RX_FDEQ_RESRV_0 +245 0x0320 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0030 //RX_FDDRC_BAND_MARGIN_1 +248 0x0050 //RX_FDDRC_BAND_MARGIN_2 +249 0x0080 //RX_FDDRC_BAND_MARGIN_3 +250 0x0007 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x5000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x6400 //RX_FDDRC_THRD_3_2 +258 0x6400 //RX_FDDRC_THRD_3_3 +259 0x2000 //RX_FDDRC_SLANT_0_0 +260 0x2000 //RX_FDDRC_SLANT_0_1 +261 0x2000 //RX_FDDRC_SLANT_0_2 +262 0x2000 //RX_FDDRC_SLANT_0_3 +263 0x5333 //RX_FDDRC_SLANT_1_0 +264 0x5333 //RX_FDDRC_SLANT_1_1 +265 0x5333 //RX_FDDRC_SLANT_1_2 +266 0x5333 //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +286 0x000C //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 +#VOL 1 +163 0x3000 //RX_TDDRC_ALPHA_UP_1 +164 0x3000 //RX_TDDRC_ALPHA_UP_2 +165 0x3000 //RX_TDDRC_ALPHA_UP_3 +166 0x3000 //RX_TDDRC_ALPHA_UP_4 +184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +190 0x7FFF //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +269 0x0000 //RX_TDDRC_THRD_0 +270 0x0000 //RX_TDDRC_THRD_1 +271 0x2000 //RX_TDDRC_THRD_2 +272 0x3000 //RX_TDDRC_THRD_3 +273 0x0800 //RX_TDDRC_SLANT_0 +274 0x7EB8 //RX_TDDRC_SLANT_1 +275 0x3000 //RX_TDDRC_ALPHA_UP_0 +276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x199A //RX_TDDRC_HMNC_GAIN +279 0x0001 //RX_TDDRC_SMT_FLAG +280 0x0CCD //RX_TDDRC_SMT_W +281 0x0196 //RX_TDDRC_DRC_GAIN +195 0x001C //RX_FDEQ_SUBNUM +196 0x4848 //RX_FDEQ_GAIN_0 +197 0x4848 //RX_FDEQ_GAIN_1 +198 0x4848 //RX_FDEQ_GAIN_2 +199 0x4848 //RX_FDEQ_GAIN_3 +200 0x4848 //RX_FDEQ_GAIN_4 +201 0x4848 //RX_FDEQ_GAIN_5 +202 0x4848 //RX_FDEQ_GAIN_6 +203 0x4848 //RX_FDEQ_GAIN_7 +204 0x4848 //RX_FDEQ_GAIN_8 +205 0x4848 //RX_FDEQ_GAIN_9 +206 0x4848 //RX_FDEQ_GAIN_10 +207 0x4848 //RX_FDEQ_GAIN_11 +208 0x4848 //RX_FDEQ_GAIN_12 +209 0x4848 //RX_FDEQ_GAIN_13 +210 0x4848 //RX_FDEQ_GAIN_14 +211 0x4848 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0202 //RX_FDEQ_BIN_0 +221 0x0203 //RX_FDEQ_BIN_1 +222 0x0303 //RX_FDEQ_BIN_2 +223 0x0304 //RX_FDEQ_BIN_3 +224 0x0405 //RX_FDEQ_BIN_4 +225 0x0506 //RX_FDEQ_BIN_5 +226 0x0708 //RX_FDEQ_BIN_6 +227 0x090A //RX_FDEQ_BIN_7 +228 0x0B0C //RX_FDEQ_BIN_8 +229 0x0D0E //RX_FDEQ_BIN_9 +230 0x0E0F //RX_FDEQ_BIN_10 +231 0x0F10 //RX_FDEQ_BIN_11 +232 0x1011 //RX_FDEQ_BIN_12 +233 0x1104 //RX_FDEQ_BIN_13 +234 0x0000 //RX_FDEQ_BIN_14 +235 0x0000 //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x4000 //RX_FDEQ_RESRV_0 +245 0x0320 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0030 //RX_FDDRC_BAND_MARGIN_1 +248 0x0050 //RX_FDDRC_BAND_MARGIN_2 +249 0x0080 //RX_FDDRC_BAND_MARGIN_3 +250 0x0007 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x5000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x6400 //RX_FDDRC_THRD_3_2 +258 0x6400 //RX_FDDRC_THRD_3_3 +259 0x2000 //RX_FDDRC_SLANT_0_0 +260 0x2000 //RX_FDDRC_SLANT_0_1 +261 0x2000 //RX_FDDRC_SLANT_0_2 +262 0x2000 //RX_FDDRC_SLANT_0_3 +263 0x5333 //RX_FDDRC_SLANT_1_0 +264 0x5333 //RX_FDDRC_SLANT_1_1 +265 0x5333 //RX_FDDRC_SLANT_1_2 +266 0x5333 //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +286 0x0014 //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 +#VOL 2 +163 0x3000 //RX_TDDRC_ALPHA_UP_1 +164 0x3000 //RX_TDDRC_ALPHA_UP_2 +165 0x3000 //RX_TDDRC_ALPHA_UP_3 +166 0x3000 //RX_TDDRC_ALPHA_UP_4 +184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +190 0x7FFF //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +269 0x0000 //RX_TDDRC_THRD_0 +270 0x0000 //RX_TDDRC_THRD_1 +271 0x2000 //RX_TDDRC_THRD_2 +272 0x3000 //RX_TDDRC_THRD_3 +273 0x0800 //RX_TDDRC_SLANT_0 +274 0x7EB8 //RX_TDDRC_SLANT_1 +275 0x3000 //RX_TDDRC_ALPHA_UP_0 +276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x199A //RX_TDDRC_HMNC_GAIN +279 0x0001 //RX_TDDRC_SMT_FLAG +280 0x0CCD //RX_TDDRC_SMT_W +281 0x0196 //RX_TDDRC_DRC_GAIN +195 0x001C //RX_FDEQ_SUBNUM +196 0x4848 //RX_FDEQ_GAIN_0 +197 0x4848 //RX_FDEQ_GAIN_1 +198 0x4848 //RX_FDEQ_GAIN_2 +199 0x4848 //RX_FDEQ_GAIN_3 +200 0x4848 //RX_FDEQ_GAIN_4 +201 0x4848 //RX_FDEQ_GAIN_5 +202 0x4848 //RX_FDEQ_GAIN_6 +203 0x4848 //RX_FDEQ_GAIN_7 +204 0x4848 //RX_FDEQ_GAIN_8 +205 0x4848 //RX_FDEQ_GAIN_9 +206 0x4848 //RX_FDEQ_GAIN_10 +207 0x4848 //RX_FDEQ_GAIN_11 +208 0x4848 //RX_FDEQ_GAIN_12 +209 0x4848 //RX_FDEQ_GAIN_13 +210 0x4848 //RX_FDEQ_GAIN_14 +211 0x4848 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0202 //RX_FDEQ_BIN_0 +221 0x0203 //RX_FDEQ_BIN_1 +222 0x0303 //RX_FDEQ_BIN_2 +223 0x0304 //RX_FDEQ_BIN_3 +224 0x0405 //RX_FDEQ_BIN_4 +225 0x0506 //RX_FDEQ_BIN_5 +226 0x0708 //RX_FDEQ_BIN_6 +227 0x090A //RX_FDEQ_BIN_7 +228 0x0B0C //RX_FDEQ_BIN_8 +229 0x0D0E //RX_FDEQ_BIN_9 +230 0x0E0F //RX_FDEQ_BIN_10 +231 0x0F10 //RX_FDEQ_BIN_11 +232 0x1011 //RX_FDEQ_BIN_12 +233 0x1104 //RX_FDEQ_BIN_13 +234 0x0000 //RX_FDEQ_BIN_14 +235 0x0000 //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x4000 //RX_FDEQ_RESRV_0 +245 0x0320 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0030 //RX_FDDRC_BAND_MARGIN_1 +248 0x0050 //RX_FDDRC_BAND_MARGIN_2 +249 0x0080 //RX_FDDRC_BAND_MARGIN_3 +250 0x0007 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x5000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x6400 //RX_FDDRC_THRD_3_2 +258 0x6400 //RX_FDDRC_THRD_3_3 +259 0x2000 //RX_FDDRC_SLANT_0_0 +260 0x2000 //RX_FDDRC_SLANT_0_1 +261 0x2000 //RX_FDDRC_SLANT_0_2 +262 0x2000 //RX_FDDRC_SLANT_0_3 +263 0x5333 //RX_FDDRC_SLANT_1_0 +264 0x5333 //RX_FDDRC_SLANT_1_1 +265 0x5333 //RX_FDDRC_SLANT_1_2 +266 0x5333 //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +286 0x0021 //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 +#VOL 3 +163 0x3000 //RX_TDDRC_ALPHA_UP_1 +164 0x3000 //RX_TDDRC_ALPHA_UP_2 +165 0x3000 //RX_TDDRC_ALPHA_UP_3 +166 0x3000 //RX_TDDRC_ALPHA_UP_4 +184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +190 0x7FFF //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +269 0x0000 //RX_TDDRC_THRD_0 +270 0x0000 //RX_TDDRC_THRD_1 +271 0x2000 //RX_TDDRC_THRD_2 +272 0x3000 //RX_TDDRC_THRD_3 +273 0x0800 //RX_TDDRC_SLANT_0 +274 0x7EB8 //RX_TDDRC_SLANT_1 +275 0x3000 //RX_TDDRC_ALPHA_UP_0 +276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x199A //RX_TDDRC_HMNC_GAIN +279 0x0001 //RX_TDDRC_SMT_FLAG +280 0x0CCD //RX_TDDRC_SMT_W +281 0x0196 //RX_TDDRC_DRC_GAIN +195 0x001C //RX_FDEQ_SUBNUM +196 0x4848 //RX_FDEQ_GAIN_0 +197 0x4848 //RX_FDEQ_GAIN_1 +198 0x4848 //RX_FDEQ_GAIN_2 +199 0x4848 //RX_FDEQ_GAIN_3 +200 0x4848 //RX_FDEQ_GAIN_4 +201 0x4848 //RX_FDEQ_GAIN_5 +202 0x4848 //RX_FDEQ_GAIN_6 +203 0x4848 //RX_FDEQ_GAIN_7 +204 0x4848 //RX_FDEQ_GAIN_8 +205 0x4848 //RX_FDEQ_GAIN_9 +206 0x4848 //RX_FDEQ_GAIN_10 +207 0x4848 //RX_FDEQ_GAIN_11 +208 0x4848 //RX_FDEQ_GAIN_12 +209 0x4848 //RX_FDEQ_GAIN_13 +210 0x4848 //RX_FDEQ_GAIN_14 +211 0x4848 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0202 //RX_FDEQ_BIN_0 +221 0x0203 //RX_FDEQ_BIN_1 +222 0x0303 //RX_FDEQ_BIN_2 +223 0x0304 //RX_FDEQ_BIN_3 +224 0x0405 //RX_FDEQ_BIN_4 +225 0x0506 //RX_FDEQ_BIN_5 +226 0x0708 //RX_FDEQ_BIN_6 +227 0x090A //RX_FDEQ_BIN_7 +228 0x0B0C //RX_FDEQ_BIN_8 +229 0x0D0E //RX_FDEQ_BIN_9 +230 0x0E0F //RX_FDEQ_BIN_10 +231 0x0F10 //RX_FDEQ_BIN_11 +232 0x1011 //RX_FDEQ_BIN_12 +233 0x1104 //RX_FDEQ_BIN_13 +234 0x0000 //RX_FDEQ_BIN_14 +235 0x0000 //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x4000 //RX_FDEQ_RESRV_0 +245 0x0320 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0030 //RX_FDDRC_BAND_MARGIN_1 +248 0x0050 //RX_FDDRC_BAND_MARGIN_2 +249 0x0080 //RX_FDDRC_BAND_MARGIN_3 +250 0x0007 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x5000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x6400 //RX_FDDRC_THRD_3_2 +258 0x6400 //RX_FDDRC_THRD_3_3 +259 0x2000 //RX_FDDRC_SLANT_0_0 +260 0x2000 //RX_FDDRC_SLANT_0_1 +261 0x2000 //RX_FDDRC_SLANT_0_2 +262 0x2000 //RX_FDDRC_SLANT_0_3 +263 0x5333 //RX_FDDRC_SLANT_1_0 +264 0x5333 //RX_FDDRC_SLANT_1_1 +265 0x5333 //RX_FDDRC_SLANT_1_2 +266 0x5333 //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +286 0x0037 //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 +#VOL 4 +163 0x3000 //RX_TDDRC_ALPHA_UP_1 +164 0x3000 //RX_TDDRC_ALPHA_UP_2 +165 0x3000 //RX_TDDRC_ALPHA_UP_3 +166 0x3000 //RX_TDDRC_ALPHA_UP_4 +184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +190 0x7FFF //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +269 0x0000 //RX_TDDRC_THRD_0 +270 0x0000 //RX_TDDRC_THRD_1 +271 0x2000 //RX_TDDRC_THRD_2 +272 0x3000 //RX_TDDRC_THRD_3 +273 0x0800 //RX_TDDRC_SLANT_0 +274 0x7EB8 //RX_TDDRC_SLANT_1 +275 0x3000 //RX_TDDRC_ALPHA_UP_0 +276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x199A //RX_TDDRC_HMNC_GAIN +279 0x0001 //RX_TDDRC_SMT_FLAG +280 0x0CCD //RX_TDDRC_SMT_W +281 0x0196 //RX_TDDRC_DRC_GAIN +195 0x001C //RX_FDEQ_SUBNUM +196 0x4848 //RX_FDEQ_GAIN_0 +197 0x4848 //RX_FDEQ_GAIN_1 +198 0x4848 //RX_FDEQ_GAIN_2 +199 0x4848 //RX_FDEQ_GAIN_3 +200 0x4848 //RX_FDEQ_GAIN_4 +201 0x4848 //RX_FDEQ_GAIN_5 +202 0x4848 //RX_FDEQ_GAIN_6 +203 0x4848 //RX_FDEQ_GAIN_7 +204 0x4848 //RX_FDEQ_GAIN_8 +205 0x4848 //RX_FDEQ_GAIN_9 +206 0x4848 //RX_FDEQ_GAIN_10 +207 0x4848 //RX_FDEQ_GAIN_11 +208 0x4848 //RX_FDEQ_GAIN_12 +209 0x4848 //RX_FDEQ_GAIN_13 +210 0x4848 //RX_FDEQ_GAIN_14 +211 0x4848 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0202 //RX_FDEQ_BIN_0 +221 0x0203 //RX_FDEQ_BIN_1 +222 0x0303 //RX_FDEQ_BIN_2 +223 0x0304 //RX_FDEQ_BIN_3 +224 0x0405 //RX_FDEQ_BIN_4 +225 0x0506 //RX_FDEQ_BIN_5 +226 0x0708 //RX_FDEQ_BIN_6 +227 0x090A //RX_FDEQ_BIN_7 +228 0x0B0C //RX_FDEQ_BIN_8 +229 0x0D0E //RX_FDEQ_BIN_9 +230 0x0E0F //RX_FDEQ_BIN_10 +231 0x0F10 //RX_FDEQ_BIN_11 +232 0x1011 //RX_FDEQ_BIN_12 +233 0x1104 //RX_FDEQ_BIN_13 +234 0x0000 //RX_FDEQ_BIN_14 +235 0x0000 //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x4000 //RX_FDEQ_RESRV_0 +245 0x0320 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0030 //RX_FDDRC_BAND_MARGIN_1 +248 0x0050 //RX_FDDRC_BAND_MARGIN_2 +249 0x0080 //RX_FDDRC_BAND_MARGIN_3 +250 0x0007 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x5000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x6400 //RX_FDDRC_THRD_3_2 +258 0x6400 //RX_FDDRC_THRD_3_3 +259 0x2000 //RX_FDDRC_SLANT_0_0 +260 0x2000 //RX_FDDRC_SLANT_0_1 +261 0x2000 //RX_FDDRC_SLANT_0_2 +262 0x2000 //RX_FDDRC_SLANT_0_3 +263 0x5333 //RX_FDDRC_SLANT_1_0 +264 0x5333 //RX_FDDRC_SLANT_1_1 +265 0x5333 //RX_FDDRC_SLANT_1_2 +266 0x5333 //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +286 0x005B //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 +#VOL 5 +163 0x3000 //RX_TDDRC_ALPHA_UP_1 +164 0x3000 //RX_TDDRC_ALPHA_UP_2 +165 0x3000 //RX_TDDRC_ALPHA_UP_3 +166 0x3000 //RX_TDDRC_ALPHA_UP_4 +184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +190 0x7FFF //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +269 0x0000 //RX_TDDRC_THRD_0 +270 0x0000 //RX_TDDRC_THRD_1 +271 0x2000 //RX_TDDRC_THRD_2 +272 0x3000 //RX_TDDRC_THRD_3 +273 0x0800 //RX_TDDRC_SLANT_0 +274 0x7EB8 //RX_TDDRC_SLANT_1 +275 0x3000 //RX_TDDRC_ALPHA_UP_0 +276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x199A //RX_TDDRC_HMNC_GAIN +279 0x0001 //RX_TDDRC_SMT_FLAG +280 0x0CCD //RX_TDDRC_SMT_W +281 0x0196 //RX_TDDRC_DRC_GAIN +195 0x001C //RX_FDEQ_SUBNUM +196 0x4848 //RX_FDEQ_GAIN_0 +197 0x4848 //RX_FDEQ_GAIN_1 +198 0x4848 //RX_FDEQ_GAIN_2 +199 0x4848 //RX_FDEQ_GAIN_3 +200 0x4848 //RX_FDEQ_GAIN_4 +201 0x4848 //RX_FDEQ_GAIN_5 +202 0x4848 //RX_FDEQ_GAIN_6 +203 0x4848 //RX_FDEQ_GAIN_7 +204 0x4848 //RX_FDEQ_GAIN_8 +205 0x4848 //RX_FDEQ_GAIN_9 +206 0x4848 //RX_FDEQ_GAIN_10 +207 0x4848 //RX_FDEQ_GAIN_11 +208 0x4848 //RX_FDEQ_GAIN_12 +209 0x4848 //RX_FDEQ_GAIN_13 +210 0x4848 //RX_FDEQ_GAIN_14 +211 0x4848 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0202 //RX_FDEQ_BIN_0 +221 0x0203 //RX_FDEQ_BIN_1 +222 0x0303 //RX_FDEQ_BIN_2 +223 0x0304 //RX_FDEQ_BIN_3 +224 0x0405 //RX_FDEQ_BIN_4 +225 0x0506 //RX_FDEQ_BIN_5 +226 0x0708 //RX_FDEQ_BIN_6 +227 0x090A //RX_FDEQ_BIN_7 +228 0x0B0C //RX_FDEQ_BIN_8 +229 0x0D0E //RX_FDEQ_BIN_9 +230 0x0E0F //RX_FDEQ_BIN_10 +231 0x0F10 //RX_FDEQ_BIN_11 +232 0x1011 //RX_FDEQ_BIN_12 +233 0x1104 //RX_FDEQ_BIN_13 +234 0x0000 //RX_FDEQ_BIN_14 +235 0x0000 //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x4000 //RX_FDEQ_RESRV_0 +245 0x0320 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0030 //RX_FDDRC_BAND_MARGIN_1 +248 0x0050 //RX_FDDRC_BAND_MARGIN_2 +249 0x0080 //RX_FDDRC_BAND_MARGIN_3 +250 0x0007 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x5000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x6400 //RX_FDDRC_THRD_3_2 +258 0x6400 //RX_FDDRC_THRD_3_3 +259 0x2000 //RX_FDDRC_SLANT_0_0 +260 0x2000 //RX_FDDRC_SLANT_0_1 +261 0x2000 //RX_FDDRC_SLANT_0_2 +262 0x2000 //RX_FDDRC_SLANT_0_3 +263 0x5333 //RX_FDDRC_SLANT_1_0 +264 0x5333 //RX_FDDRC_SLANT_1_1 +265 0x5333 //RX_FDDRC_SLANT_1_2 +266 0x5333 //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +286 0x0099 //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 +#VOL 6 +163 0x3000 //RX_TDDRC_ALPHA_UP_1 +164 0x3000 //RX_TDDRC_ALPHA_UP_2 +165 0x3000 //RX_TDDRC_ALPHA_UP_3 +166 0x3000 //RX_TDDRC_ALPHA_UP_4 +184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +190 0x7FFF //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +269 0x0000 //RX_TDDRC_THRD_0 +270 0x0000 //RX_TDDRC_THRD_1 +271 0x2000 //RX_TDDRC_THRD_2 +272 0x3000 //RX_TDDRC_THRD_3 +273 0x0800 //RX_TDDRC_SLANT_0 +274 0x7EB8 //RX_TDDRC_SLANT_1 +275 0x3000 //RX_TDDRC_ALPHA_UP_0 +276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x199A //RX_TDDRC_HMNC_GAIN +279 0x0001 //RX_TDDRC_SMT_FLAG +280 0x0CCD //RX_TDDRC_SMT_W +281 0x0196 //RX_TDDRC_DRC_GAIN +195 0x001C //RX_FDEQ_SUBNUM +196 0x4848 //RX_FDEQ_GAIN_0 +197 0x4848 //RX_FDEQ_GAIN_1 +198 0x4848 //RX_FDEQ_GAIN_2 +199 0x4848 //RX_FDEQ_GAIN_3 +200 0x4848 //RX_FDEQ_GAIN_4 +201 0x4848 //RX_FDEQ_GAIN_5 +202 0x4848 //RX_FDEQ_GAIN_6 +203 0x4848 //RX_FDEQ_GAIN_7 +204 0x4848 //RX_FDEQ_GAIN_8 +205 0x4848 //RX_FDEQ_GAIN_9 +206 0x4848 //RX_FDEQ_GAIN_10 +207 0x4848 //RX_FDEQ_GAIN_11 +208 0x4848 //RX_FDEQ_GAIN_12 +209 0x4848 //RX_FDEQ_GAIN_13 +210 0x4848 //RX_FDEQ_GAIN_14 +211 0x4848 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0202 //RX_FDEQ_BIN_0 +221 0x0203 //RX_FDEQ_BIN_1 +222 0x0303 //RX_FDEQ_BIN_2 +223 0x0304 //RX_FDEQ_BIN_3 +224 0x0405 //RX_FDEQ_BIN_4 +225 0x0506 //RX_FDEQ_BIN_5 +226 0x0708 //RX_FDEQ_BIN_6 +227 0x090A //RX_FDEQ_BIN_7 +228 0x0B0C //RX_FDEQ_BIN_8 +229 0x0D0E //RX_FDEQ_BIN_9 +230 0x0E0F //RX_FDEQ_BIN_10 +231 0x0F10 //RX_FDEQ_BIN_11 +232 0x1011 //RX_FDEQ_BIN_12 +233 0x1104 //RX_FDEQ_BIN_13 +234 0x0000 //RX_FDEQ_BIN_14 +235 0x0000 //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x4000 //RX_FDEQ_RESRV_0 +245 0x0320 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0030 //RX_FDDRC_BAND_MARGIN_1 +248 0x0050 //RX_FDDRC_BAND_MARGIN_2 +249 0x0080 //RX_FDDRC_BAND_MARGIN_3 +250 0x0007 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x5000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x6400 //RX_FDDRC_THRD_3_2 +258 0x6400 //RX_FDDRC_THRD_3_3 +259 0x2000 //RX_FDDRC_SLANT_0_0 +260 0x2000 //RX_FDDRC_SLANT_0_1 +261 0x2000 //RX_FDDRC_SLANT_0_2 +262 0x2000 //RX_FDDRC_SLANT_0_3 +263 0x5333 //RX_FDDRC_SLANT_1_0 +264 0x5333 //RX_FDDRC_SLANT_1_1 +265 0x5333 //RX_FDDRC_SLANT_1_2 +266 0x5333 //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +286 0x0100 //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 #CASE_NAME HEADSET-GOOGLE_CONDOR_CERTIFICATION1-VOICE_GENERIC-SWB -#PARAM_MODE FULL -#PARAM_TYPE TX+RX -#TOTAL_CUSTOM_STEP 7 +#PARAM_MODE Full +#PARAM_TYPE TX+2RX +#TOTAL_CUSTOM_STEP 7+7 #TX 0 0x0009 //TX_OPERATION_MODE_0 1 0x0001 //TX_OPERATION_MODE_1 @@ -31822,7 +48310,7 @@ 239 0x0800 //TX_DT_RESRV_7 240 0x0800 //TX_DT_RESRV_8 241 0x0000 //TX_DT_RESRV_9 -242 0xF400 //TX_THR_SN_EST_0 +242 0xFA00 //TX_THR_SN_EST_0 243 0xF400 //TX_THR_SN_EST_1 244 0xF600 //TX_THR_SN_EST_2 245 0xF400 //TX_THR_SN_EST_3 @@ -31831,20 +48319,20 @@ 248 0xF400 //TX_THR_SN_EST_6 249 0xF600 //TX_THR_SN_EST_7 250 0x0000 //TX_DELTA_THR_SN_EST_0 -251 0x0000 //TX_DELTA_THR_SN_EST_1 +251 0x0200 //TX_DELTA_THR_SN_EST_1 252 0x0200 //TX_DELTA_THR_SN_EST_2 253 0x0200 //TX_DELTA_THR_SN_EST_3 254 0x0200 //TX_DELTA_THR_SN_EST_4 255 0x0200 //TX_DELTA_THR_SN_EST_5 -256 0x0200 //TX_DELTA_THR_SN_EST_6 +256 0x0000 //TX_DELTA_THR_SN_EST_6 257 0x0200 //TX_DELTA_THR_SN_EST_7 258 0x6000 //TX_LAMBDA_NN_EST_0 -259 0x6000 //TX_LAMBDA_NN_EST_1 +259 0x4000 //TX_LAMBDA_NN_EST_1 260 0x4000 //TX_LAMBDA_NN_EST_2 261 0x4000 //TX_LAMBDA_NN_EST_3 262 0x4000 //TX_LAMBDA_NN_EST_4 263 0x4000 //TX_LAMBDA_NN_EST_5 -264 0x4000 //TX_LAMBDA_NN_EST_6 +264 0x6000 //TX_LAMBDA_NN_EST_6 265 0x4000 //TX_LAMBDA_NN_EST_7 266 0x0400 //TX_N_SN_EST 267 0x001E //TX_INBEAM_T @@ -31862,16 +48350,16 @@ 279 0x1000 //TX_B_POST_FLT_0 280 0x1000 //TX_B_POST_FLT_1 281 0x000B //TX_NS_LVL_CTRL_0 -282 0x000F //TX_NS_LVL_CTRL_1 -283 0x0011 //TX_NS_LVL_CTRL_2 +282 0x0011 //TX_NS_LVL_CTRL_1 +283 0x000F //TX_NS_LVL_CTRL_2 284 0x000F //TX_NS_LVL_CTRL_3 285 0x000F //TX_NS_LVL_CTRL_4 286 0x000F //TX_NS_LVL_CTRL_5 287 0x000F //TX_NS_LVL_CTRL_6 288 0x0011 //TX_NS_LVL_CTRL_7 289 0x000C //TX_MIN_GAIN_S_0 -290 0x000C //TX_MIN_GAIN_S_1 -291 0x000F //TX_MIN_GAIN_S_2 +290 0x000F //TX_MIN_GAIN_S_1 +291 0x000C //TX_MIN_GAIN_S_2 292 0x000C //TX_MIN_GAIN_S_3 293 0x000C //TX_MIN_GAIN_S_4 294 0x000C //TX_MIN_GAIN_S_5 @@ -31895,12 +48383,12 @@ 312 0x7FFF //TX_A_POST_FILT_0 313 0x2000 //TX_A_POST_FILT_1 314 0x2000 //TX_A_POST_FILT_S_0 -315 0x4000 //TX_A_POST_FILT_S_1 +315 0x5000 //TX_A_POST_FILT_S_1 316 0x5000 //TX_A_POST_FILT_S_2 317 0x5000 //TX_A_POST_FILT_S_3 318 0x5000 //TX_A_POST_FILT_S_4 319 0x5000 //TX_A_POST_FILT_S_5 -320 0x5000 //TX_A_POST_FILT_S_6 +320 0x4000 //TX_A_POST_FILT_S_6 321 0x5000 //TX_A_POST_FILT_S_7 322 0x1000 //TX_B_POST_FILT_0 323 0x1000 //TX_B_POST_FILT_1 @@ -31947,7 +48435,7 @@ 364 0x0000 //TX_K_APT 365 0x0001 //TX_NOISEDET 366 0x0190 //TX_NDETCT -367 0x0050 //TX_NOISE_TH_0 +367 0x0383 //TX_NOISE_TH_0 368 0x7FFF //TX_NOISE_TH_0_2 369 0x7FFF //TX_NOISE_TH_0_3 370 0x07D0 //TX_NOISE_TH_1 @@ -31959,11 +48447,11 @@ 376 0x7FFF //TX_NOISE_TH_5_3 377 0x7FFF //TX_NOISE_TH_5_4 378 0x044C //TX_NOISE_TH_6 -379 0x0014 //TX_MINENOISE_TH -380 0x4000 //TX_MINENOISE_MIC0_TH_MTS -381 0xFFEE //TX_MINENOISE_MIC0_TH_EXP -382 0x6000 //TX_MINENOISE_MIC0_S_TH_MTS -383 0xFFF3 //TX_MINENOISE_MIC0_S_TH_EXP +379 0x044C //TX_MINENOISE_TH +380 0xD508 //TX_MORENS_TFMASK_TH +381 0x0001 //TX_DRC_QUIET_FLOOR +382 0x3A98 //TX_RATIODTL_CUT_TH +383 0x0DAC //TX_DT_CUT_K1 384 0x0666 //TX_OUT_ENER_S_TH_CLEAN 385 0x0666 //TX_OUT_ENER_S_TH_LESSCLEAN 386 0x0333 //TX_OUT_ENER_S_TH_NOISY @@ -31971,22 +48459,22 @@ 388 0x0333 //TX_OUT_ENER_TH_SPEECH 389 0x2000 //TX_SN_NPB_GAIN 390 0x0000 //TX_NN_NPB_GAIN -391 0x0000 //TX_CSX_ALPHA_0 -392 0x0000 //TX_CSX_ALPHA_1 -393 0x0000 //TX_CSX_ALPHA_2 -394 0x0000 //TX_CSX_ALPHA_3 -395 0x0800 //TX_MU_ARSP_EST -396 0x00C8 //TX_P_OUTBEAM_MIN_TH +391 0x7FFF //TX_POST_MASK_SUP_HSNE +392 0x1388 //TX_TAIL_DET_TH +393 0x4000 //TX_B_LESSCUT_RTO_WTA +394 0x0000 //TX_MEL_G_R +395 0x0080 //TX_SUPHIGH_TH +396 0x0000 //TX_MASK_G_R 397 0x0002 //TX_EXTRA_NS_L -398 0x0800 //TX_EXTRA_NS_A -399 0x0005 //TX_VR_NOISE_FLOOR_TH +398 0x1800 //TX_C_POST_FLT_MASK +399 0x7FFF //TX_A_POST_FLT_WNS 400 0x0148 //TX_MIN_G_LOW300HZ 401 0x0002 //TX_MAXLEVEL_CNG 402 0x00B4 //TX_STN_NOISE_TH 403 0x4000 //TX_POST_MASK_SUP 404 0x7FFF //TX_POST_MASK_ADJUST 405 0x00C8 //TX_NS_ENOISE_MIC0_TH -406 0x0014 //TX_MINENOISE_MIC0_TH +406 0x02F3 //TX_MINENOISE_MIC0_TH 407 0x012C //TX_MINENOISE_MIC0_S_TH 408 0x2900 //TX_MIN_G_CTRL_SSNS 409 0x0800 //TX_METAL_RTO_THR @@ -32094,16 +48582,16 @@ 511 0x6666 //TX_MIC_TO_BFGAIN 512 0x0000 //TX_MICTOBFGAIN0 513 0x0000 //TX_FASTMUE_TH -514 0x0000 //TX_DERVB_LEN_0 -515 0x0000 //TX_DERVB_LEN_1 -516 0x0000 //TX_RHO_DERVB -517 0x0000 //TX_MIC_INDX_DERVB -518 0x0000 //TX_MU_DERVB -519 0x0000 //TX_DR_RESRV_0 -520 0x0000 //TX_DR_RESRV_1 -521 0x0000 //TX_DR_RESRV_2 -522 0x0000 //TX_DR_RESRV_3 -523 0x0000 //TX_DR_RESRV_4 +514 0xC000 //TX_DEREVERB_LF_MU +515 0xC000 //TX_DEREVERB_HF_MU +516 0xCCCC //TX_DEREVERB_DELAY +517 0xD999 //TX_DEREVERB_COEF_LEN +518 0x1F40 //TX_DEREVERB_DNR +519 0x0000 //TX_DEREVERB_ALPHA +520 0x0000 //TX_DEREVERB_BETA +521 0x0000 //TX_GSC_RTOL_TH +522 0x7000 //TX_GSC_RTOH_TH +523 0x0064 //TX_WIDE2_MEANHTH 524 0x0000 //TX_DR_RESRV_5 525 0x0000 //TX_DR_RESRV_6 526 0x0000 //TX_DR_RESRV_7 @@ -32469,16 +48957,81 @@ 886 0x0CCD //TX_FASTNS_TFMASKBIN_TH2 887 0x0CCD //TX_FASTNS_TFMASKBIN_TH3 888 0x0028 //TX_FASTNS_ARSPC_TH -889 0xC000 //TX_FASTNS_MASK5_TH +889 0x8000 //TX_FASTNS_MASK5_TH 890 0x4848 //TX_POSTSSA_MIN_G_VR_MASK -891 0x1000 //TX_A_LESSCUT_RTO_MASK +891 0x4000 //TX_A_LESSCUT_RTO_MASK 892 0x1770 //TX_FASTNS_NOISETH 893 0xC000 //TX_FASTNS_SSA_THLFL 894 0xC000 //TX_FASTNS_SSA_THHFL 895 0xCCCC //TX_FASTNS_SSA_THLFH 896 0xD999 //TX_FASTNS_SSA_THHFH +897 0x2339 //TX_SENDFUNC_REG_MICMUTE +898 0x0021 //TX_SENDFUNC_REG_MICMUTE1 +899 0x02BC //TX_MICMUTE_RATIO_THR +900 0x0140 //TX_MICMUTE_AMP_THR +901 0x0004 //TX_MICMUTE_HPF_IND +902 0x00C0 //TX_MICMUTE_LOG_EYR_TH +903 0x0008 //TX_MICMUTE_CVG_TIME +904 0x0008 //TX_MICMUTE_RELEASE_TIME +905 0x01FE //TX_MIC_VOLUME_MIC0MUTE +906 0x0020 //TX_MICMUTE_EPD_OFFSET_0 +907 0x001E //TX_MICMUTE_FRQ_AEC_L +908 0x7999 //TX_MICMUTE_EAD_THR +909 0x7FFF //TX_MICMUTE_LAMBDA_CB_NLE +910 0x7FFF //TX_MICMUTE_LAMBDA_RE_EST +911 0x4000 //TX_DTD_THR1_MICMUTE_0 +912 0x7000 //TX_DTD_THR1_MICMUTE_1 +913 0x7FFF //TX_DTD_THR1_MICMUTE_2 +914 0x7FFF //TX_DTD_THR1_MICMUTE_3 +915 0x6CCC //TX_DTD_THR2_MICMUTE_0 +916 0x0400 //TX_MICMUTE_MIN_EQ_RE_EST_0 +917 0x0400 //TX_MICMUTE_MIN_EQ_RE_EST_1 +918 0x1000 //TX_MICMUTE_MIN_EQ_RE_EST_2 +919 0x7FFF //TX_MICMUTE_MIN_EQ_RE_EST_3 +920 0x7FFF //TX_MICMUTE_MIN_EQ_RE_EST_4 +921 0x4000 //TX_MICMUTE_C_POST_FLT +922 0x03E8 //TX_MICMUTE_DT_CUT_K +923 0x0001 //TX_MICMUTE_DT_CUT_THR +924 0x03E8 //TX_MICMUTE_DT_CUT_K2 +925 0x0001 //TX_MICMUTE_DT_CUT_THR2 +926 0x0064 //TX_MICMUTE_DT2_HOLD_N +927 0x1000 //TX_MICMUTE_RATIODTH_THCUT +928 0x1000 //TX_MICMUTE_B_POST_FLT_ECHOL +929 0x7FFF //TX_MICMUTE_B_POST_FLT_ECHOH +930 0x0400 //TX_MICMUTE_C_POST_FLT_MASK +931 0x7999 //TX_MICMUTE_RATIODTL_CUT_TH +932 0x0258 //TX_MICMUTE_DT_CUT_K1 +933 0x0800 //TX_MICMUTE_N2_SN_EST +934 0xFC00 //TX_MICMUTE_THR_SN_EST_0 +935 0x001C //TX_MICMUTE_MIN_G_CTRL_0 +936 0x6000 //TX_MICMUTE_A_POST_FILT_S_0 +937 0x7000 //TX_MICMUTE_B_POST_FILT_0 +938 0x2710 //TX_MIC1RUB_AMP_THR +939 0x0010 //TX_MIC1MUTE_RATIO_THR +940 0x0450 //TX_MIC1MUTE_AMP_THR +941 0x0008 //TX_MIC1MUTE_CVG_TIME +942 0x0008 //TX_MIC1MUTE_RELEASE_TIME +943 0x0000 //TX_AMS_RESRV_01 +944 0x0000 //TX_AMS_RESRV_02 +945 0x0000 //TX_AMS_RESRV_03 +946 0x0000 //TX_AMS_RESRV_04 +947 0x0000 //TX_AMS_RESRV_05 +948 0x0000 //TX_AMS_RESRV_06 +949 0x0000 //TX_AMS_RESRV_07 +950 0x0000 //TX_AMS_RESRV_08 +951 0x0000 //TX_AMS_RESRV_09 +952 0x0000 //TX_AMS_RESRV_10 +953 0x0000 //TX_AMS_RESRV_11 +954 0x0000 //TX_AMS_RESRV_12 +955 0x0000 //TX_AMS_RESRV_13 +956 0x0000 //TX_AMS_RESRV_14 +957 0x0000 //TX_AMS_RESRV_15 +958 0x0000 //TX_AMS_RESRV_16 +959 0x0000 //TX_AMS_RESRV_17 +960 0x0000 //TX_AMS_RESRV_18 +961 0x0000 //TX_AMS_RESRV_19 #RX -0 0x0024 //RX_RECVFUNC_MODE_0 +0 0x2024 //RX_RECVFUNC_MODE_0 1 0x0000 //RX_RECVFUNC_MODE_1 2 0x0003 //RX_SAMPLINGFREQ_SIG 3 0x0003 //RX_SAMPLINGFREQ_PROC @@ -33328,11 +49881,862 @@ 110 0x0000 //RX_FDDRC_RESRV_0 129 0x0100 //RX_SPK_VOL 130 0x0000 //RX_VOL_RESRV_0 +#RX 2 +157 0x2024 //RX_RECVFUNC_MODE_0 +158 0x0000 //RX_RECVFUNC_MODE_1 +159 0x0003 //RX_SAMPLINGFREQ_SIG +160 0x0003 //RX_SAMPLINGFREQ_PROC +161 0x000A //RX_FRAME_SZ +162 0x0000 //RX_DELAY_OPT +163 0x5000 //RX_TDDRC_ALPHA_UP_1 +164 0x5000 //RX_TDDRC_ALPHA_UP_2 +165 0x5000 //RX_TDDRC_ALPHA_UP_3 +166 0x2000 //RX_TDDRC_ALPHA_UP_4 +167 0x0800 //RX_PGA +168 0x7FFF //RX_A_HP +169 0x0000 //RX_B_PE +170 0x1800 //RX_THR_PITCH_DET_0 +171 0x1000 //RX_THR_PITCH_DET_1 +172 0x0800 //RX_THR_PITCH_DET_2 +173 0x0008 //RX_PITCH_BFR_LEN +174 0x0003 //RX_SBD_PITCH_DET +175 0x0100 //RX_PP_RESRV_0 +176 0x0020 //RX_PP_RESRV_1 +177 0x0400 //RX_N_SN_EST +178 0x000C //RX_N2_SN_EST +179 0x0003 //RX_NS_LVL_CTRL +180 0x9000 //RX_THR_SN_EST +181 0x7CCD //RX_LAMBDA_PFILT +182 0x000A //RX_FENS_RESRV_0 +183 0x0190 //RX_FENS_RESRV_1 +184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +187 0x0002 //RX_EXTRA_NS_L +188 0x0800 //RX_EXTRA_NS_A +189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +190 0x65AD //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +192 0x199A //RX_A_POST_FLT +193 0x0000 //RX_LMT_THRD +194 0x4000 //RX_LMT_ALPHA +195 0x0020 //RX_FDEQ_SUBNUM +196 0x4848 //RX_FDEQ_GAIN_0 +197 0x4848 //RX_FDEQ_GAIN_1 +198 0x4848 //RX_FDEQ_GAIN_2 +199 0x4848 //RX_FDEQ_GAIN_3 +200 0x4848 //RX_FDEQ_GAIN_4 +201 0x4848 //RX_FDEQ_GAIN_5 +202 0x4848 //RX_FDEQ_GAIN_6 +203 0x4848 //RX_FDEQ_GAIN_7 +204 0x4848 //RX_FDEQ_GAIN_8 +205 0x4848 //RX_FDEQ_GAIN_9 +206 0x4848 //RX_FDEQ_GAIN_10 +207 0x4848 //RX_FDEQ_GAIN_11 +208 0x4848 //RX_FDEQ_GAIN_12 +209 0x4848 //RX_FDEQ_GAIN_13 +210 0x4848 //RX_FDEQ_GAIN_14 +211 0x4848 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0202 //RX_FDEQ_BIN_0 +221 0x0203 //RX_FDEQ_BIN_1 +222 0x0303 //RX_FDEQ_BIN_2 +223 0x0304 //RX_FDEQ_BIN_3 +224 0x0405 //RX_FDEQ_BIN_4 +225 0x0506 //RX_FDEQ_BIN_5 +226 0x0708 //RX_FDEQ_BIN_6 +227 0x090A //RX_FDEQ_BIN_7 +228 0x0B0C //RX_FDEQ_BIN_8 +229 0x0D0E //RX_FDEQ_BIN_9 +230 0x1013 //RX_FDEQ_BIN_10 +231 0x1719 //RX_FDEQ_BIN_11 +232 0x1B1E //RX_FDEQ_BIN_12 +233 0x1E1E //RX_FDEQ_BIN_13 +234 0x1E28 //RX_FDEQ_BIN_14 +235 0x282C //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x4000 //RX_FDEQ_RESRV_0 +245 0x0320 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0030 //RX_FDDRC_BAND_MARGIN_1 +248 0x0050 //RX_FDDRC_BAND_MARGIN_2 +249 0x0080 //RX_FDDRC_BAND_MARGIN_3 +250 0x0007 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x5000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x6400 //RX_FDDRC_THRD_3_2 +258 0x6400 //RX_FDDRC_THRD_3_3 +259 0x2000 //RX_FDDRC_SLANT_0_0 +260 0x2000 //RX_FDDRC_SLANT_0_1 +261 0x2000 //RX_FDDRC_SLANT_0_2 +262 0x2000 //RX_FDDRC_SLANT_0_3 +263 0x5333 //RX_FDDRC_SLANT_1_0 +264 0x5333 //RX_FDDRC_SLANT_1_1 +265 0x5333 //RX_FDDRC_SLANT_1_2 +266 0x5333 //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +268 0x0002 //RX_FILTINDX +269 0x0000 //RX_TDDRC_THRD_0 +270 0x0000 //RX_TDDRC_THRD_1 +271 0x1A00 //RX_TDDRC_THRD_2 +272 0x1A00 //RX_TDDRC_THRD_3 +273 0x3000 //RX_TDDRC_SLANT_0 +274 0x7EB8 //RX_TDDRC_SLANT_1 +275 0x5000 //RX_TDDRC_ALPHA_UP_0 +276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x199A //RX_TDDRC_HMNC_GAIN +279 0x0001 //RX_TDDRC_SMT_FLAG +280 0x0CCD //RX_TDDRC_SMT_W +281 0x01C8 //RX_TDDRC_DRC_GAIN +282 0x7C00 //RX_LAMBDA_PKA_FP +283 0x2000 //RX_TPKA_FP +284 0x2000 //RX_MIN_G_FP +285 0x0080 //RX_MAX_G_FP +286 0x000C //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 +288 0x0000 //RX_MAXLEVEL_CNG +289 0x3000 //RX_BWE_UV_TH +290 0x3000 //RX_BWE_UV_TH2 +291 0x1800 //RX_BWE_UV_TH3 +292 0x1000 //RX_BWE_V_TH +293 0x04CD //RX_BWE_GAIN1_V_TH1 +294 0x0F33 //RX_BWE_GAIN1_V_TH2 +295 0x7333 //RX_BWE_UV_EQ +296 0x199A //RX_BWE_V_EQ +297 0x7333 //RX_BWE_TONE_TH +298 0x0004 //RX_BWE_UV_HOLD_T +299 0x6CCD //RX_BWE_GAIN2_ALPHA +300 0x799A //RX_BWE_GAIN3_ALPHA +301 0x001E //RX_BWE_CUTOFF +302 0x3000 //RX_BWE_GAINFILL +303 0x3200 //RX_BWE_MAXTH_TONE +304 0x2000 //RX_BWE_EQ_0 +305 0x2000 //RX_BWE_EQ_1 +306 0x2000 //RX_BWE_EQ_2 +307 0x2000 //RX_BWE_EQ_3 +308 0x2000 //RX_BWE_EQ_4 +309 0x2000 //RX_BWE_EQ_5 +310 0x2000 //RX_BWE_EQ_6 +311 0x0000 //RX_BWE_RESRV_0 +312 0x0000 //RX_BWE_RESRV_1 +313 0x0000 //RX_BWE_RESRV_2 +#VOL 0 +163 0x5000 //RX_TDDRC_ALPHA_UP_1 +164 0x5000 //RX_TDDRC_ALPHA_UP_2 +165 0x5000 //RX_TDDRC_ALPHA_UP_3 +166 0x2000 //RX_TDDRC_ALPHA_UP_4 +184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +190 0x65AD //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +269 0x0000 //RX_TDDRC_THRD_0 +270 0x0000 //RX_TDDRC_THRD_1 +271 0x1A00 //RX_TDDRC_THRD_2 +272 0x1A00 //RX_TDDRC_THRD_3 +273 0x3000 //RX_TDDRC_SLANT_0 +274 0x7EB8 //RX_TDDRC_SLANT_1 +275 0x5000 //RX_TDDRC_ALPHA_UP_0 +276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x199A //RX_TDDRC_HMNC_GAIN +279 0x0001 //RX_TDDRC_SMT_FLAG +280 0x0CCD //RX_TDDRC_SMT_W +281 0x01C8 //RX_TDDRC_DRC_GAIN +195 0x0020 //RX_FDEQ_SUBNUM +196 0x4848 //RX_FDEQ_GAIN_0 +197 0x4848 //RX_FDEQ_GAIN_1 +198 0x4848 //RX_FDEQ_GAIN_2 +199 0x4848 //RX_FDEQ_GAIN_3 +200 0x4848 //RX_FDEQ_GAIN_4 +201 0x4848 //RX_FDEQ_GAIN_5 +202 0x4848 //RX_FDEQ_GAIN_6 +203 0x4848 //RX_FDEQ_GAIN_7 +204 0x4848 //RX_FDEQ_GAIN_8 +205 0x4848 //RX_FDEQ_GAIN_9 +206 0x4848 //RX_FDEQ_GAIN_10 +207 0x4848 //RX_FDEQ_GAIN_11 +208 0x4848 //RX_FDEQ_GAIN_12 +209 0x4848 //RX_FDEQ_GAIN_13 +210 0x4848 //RX_FDEQ_GAIN_14 +211 0x4848 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0202 //RX_FDEQ_BIN_0 +221 0x0203 //RX_FDEQ_BIN_1 +222 0x0303 //RX_FDEQ_BIN_2 +223 0x0304 //RX_FDEQ_BIN_3 +224 0x0405 //RX_FDEQ_BIN_4 +225 0x0506 //RX_FDEQ_BIN_5 +226 0x0708 //RX_FDEQ_BIN_6 +227 0x090A //RX_FDEQ_BIN_7 +228 0x0B0C //RX_FDEQ_BIN_8 +229 0x0D0E //RX_FDEQ_BIN_9 +230 0x1013 //RX_FDEQ_BIN_10 +231 0x1719 //RX_FDEQ_BIN_11 +232 0x1B1E //RX_FDEQ_BIN_12 +233 0x1E1E //RX_FDEQ_BIN_13 +234 0x1E28 //RX_FDEQ_BIN_14 +235 0x282C //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x4000 //RX_FDEQ_RESRV_0 +245 0x0320 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0030 //RX_FDDRC_BAND_MARGIN_1 +248 0x0050 //RX_FDDRC_BAND_MARGIN_2 +249 0x0080 //RX_FDDRC_BAND_MARGIN_3 +250 0x0007 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x5000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x6400 //RX_FDDRC_THRD_3_2 +258 0x6400 //RX_FDDRC_THRD_3_3 +259 0x2000 //RX_FDDRC_SLANT_0_0 +260 0x2000 //RX_FDDRC_SLANT_0_1 +261 0x2000 //RX_FDDRC_SLANT_0_2 +262 0x2000 //RX_FDDRC_SLANT_0_3 +263 0x5333 //RX_FDDRC_SLANT_1_0 +264 0x5333 //RX_FDDRC_SLANT_1_1 +265 0x5333 //RX_FDDRC_SLANT_1_2 +266 0x5333 //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +286 0x000C //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 +#VOL 1 +163 0x5000 //RX_TDDRC_ALPHA_UP_1 +164 0x5000 //RX_TDDRC_ALPHA_UP_2 +165 0x5000 //RX_TDDRC_ALPHA_UP_3 +166 0x2000 //RX_TDDRC_ALPHA_UP_4 +184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +190 0x65AD //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +269 0x0000 //RX_TDDRC_THRD_0 +270 0x0000 //RX_TDDRC_THRD_1 +271 0x1A00 //RX_TDDRC_THRD_2 +272 0x1A00 //RX_TDDRC_THRD_3 +273 0x3000 //RX_TDDRC_SLANT_0 +274 0x7EB8 //RX_TDDRC_SLANT_1 +275 0x5000 //RX_TDDRC_ALPHA_UP_0 +276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x199A //RX_TDDRC_HMNC_GAIN +279 0x0001 //RX_TDDRC_SMT_FLAG +280 0x0CCD //RX_TDDRC_SMT_W +281 0x01C8 //RX_TDDRC_DRC_GAIN +195 0x0020 //RX_FDEQ_SUBNUM +196 0x4848 //RX_FDEQ_GAIN_0 +197 0x4848 //RX_FDEQ_GAIN_1 +198 0x4848 //RX_FDEQ_GAIN_2 +199 0x4848 //RX_FDEQ_GAIN_3 +200 0x4848 //RX_FDEQ_GAIN_4 +201 0x4848 //RX_FDEQ_GAIN_5 +202 0x4848 //RX_FDEQ_GAIN_6 +203 0x4848 //RX_FDEQ_GAIN_7 +204 0x4848 //RX_FDEQ_GAIN_8 +205 0x4848 //RX_FDEQ_GAIN_9 +206 0x4848 //RX_FDEQ_GAIN_10 +207 0x4848 //RX_FDEQ_GAIN_11 +208 0x4848 //RX_FDEQ_GAIN_12 +209 0x4848 //RX_FDEQ_GAIN_13 +210 0x4848 //RX_FDEQ_GAIN_14 +211 0x4848 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0202 //RX_FDEQ_BIN_0 +221 0x0203 //RX_FDEQ_BIN_1 +222 0x0303 //RX_FDEQ_BIN_2 +223 0x0304 //RX_FDEQ_BIN_3 +224 0x0405 //RX_FDEQ_BIN_4 +225 0x0506 //RX_FDEQ_BIN_5 +226 0x0708 //RX_FDEQ_BIN_6 +227 0x090A //RX_FDEQ_BIN_7 +228 0x0B0C //RX_FDEQ_BIN_8 +229 0x0D0E //RX_FDEQ_BIN_9 +230 0x1013 //RX_FDEQ_BIN_10 +231 0x1719 //RX_FDEQ_BIN_11 +232 0x1B1E //RX_FDEQ_BIN_12 +233 0x1E1E //RX_FDEQ_BIN_13 +234 0x1E28 //RX_FDEQ_BIN_14 +235 0x282C //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x4000 //RX_FDEQ_RESRV_0 +245 0x0320 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0030 //RX_FDDRC_BAND_MARGIN_1 +248 0x0050 //RX_FDDRC_BAND_MARGIN_2 +249 0x0080 //RX_FDDRC_BAND_MARGIN_3 +250 0x0007 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x5000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x6400 //RX_FDDRC_THRD_3_2 +258 0x6400 //RX_FDDRC_THRD_3_3 +259 0x2000 //RX_FDDRC_SLANT_0_0 +260 0x2000 //RX_FDDRC_SLANT_0_1 +261 0x2000 //RX_FDDRC_SLANT_0_2 +262 0x2000 //RX_FDDRC_SLANT_0_3 +263 0x5333 //RX_FDDRC_SLANT_1_0 +264 0x5333 //RX_FDDRC_SLANT_1_1 +265 0x5333 //RX_FDDRC_SLANT_1_2 +266 0x5333 //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +286 0x0014 //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 +#VOL 2 +163 0x5000 //RX_TDDRC_ALPHA_UP_1 +164 0x5000 //RX_TDDRC_ALPHA_UP_2 +165 0x5000 //RX_TDDRC_ALPHA_UP_3 +166 0x2000 //RX_TDDRC_ALPHA_UP_4 +184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +190 0x65AD //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +269 0x0000 //RX_TDDRC_THRD_0 +270 0x0000 //RX_TDDRC_THRD_1 +271 0x1A00 //RX_TDDRC_THRD_2 +272 0x1A00 //RX_TDDRC_THRD_3 +273 0x3000 //RX_TDDRC_SLANT_0 +274 0x7EB8 //RX_TDDRC_SLANT_1 +275 0x5000 //RX_TDDRC_ALPHA_UP_0 +276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x199A //RX_TDDRC_HMNC_GAIN +279 0x0001 //RX_TDDRC_SMT_FLAG +280 0x0CCD //RX_TDDRC_SMT_W +281 0x01C8 //RX_TDDRC_DRC_GAIN +195 0x0020 //RX_FDEQ_SUBNUM +196 0x4848 //RX_FDEQ_GAIN_0 +197 0x4848 //RX_FDEQ_GAIN_1 +198 0x4848 //RX_FDEQ_GAIN_2 +199 0x4848 //RX_FDEQ_GAIN_3 +200 0x4848 //RX_FDEQ_GAIN_4 +201 0x4848 //RX_FDEQ_GAIN_5 +202 0x4848 //RX_FDEQ_GAIN_6 +203 0x4848 //RX_FDEQ_GAIN_7 +204 0x4848 //RX_FDEQ_GAIN_8 +205 0x4848 //RX_FDEQ_GAIN_9 +206 0x4848 //RX_FDEQ_GAIN_10 +207 0x4848 //RX_FDEQ_GAIN_11 +208 0x4848 //RX_FDEQ_GAIN_12 +209 0x4848 //RX_FDEQ_GAIN_13 +210 0x4848 //RX_FDEQ_GAIN_14 +211 0x4848 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0202 //RX_FDEQ_BIN_0 +221 0x0203 //RX_FDEQ_BIN_1 +222 0x0303 //RX_FDEQ_BIN_2 +223 0x0304 //RX_FDEQ_BIN_3 +224 0x0405 //RX_FDEQ_BIN_4 +225 0x0506 //RX_FDEQ_BIN_5 +226 0x0708 //RX_FDEQ_BIN_6 +227 0x090A //RX_FDEQ_BIN_7 +228 0x0B0C //RX_FDEQ_BIN_8 +229 0x0D0E //RX_FDEQ_BIN_9 +230 0x1013 //RX_FDEQ_BIN_10 +231 0x1719 //RX_FDEQ_BIN_11 +232 0x1B1E //RX_FDEQ_BIN_12 +233 0x1E1E //RX_FDEQ_BIN_13 +234 0x1E28 //RX_FDEQ_BIN_14 +235 0x282C //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x4000 //RX_FDEQ_RESRV_0 +245 0x0320 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0030 //RX_FDDRC_BAND_MARGIN_1 +248 0x0050 //RX_FDDRC_BAND_MARGIN_2 +249 0x0080 //RX_FDDRC_BAND_MARGIN_3 +250 0x0007 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x5000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x6400 //RX_FDDRC_THRD_3_2 +258 0x6400 //RX_FDDRC_THRD_3_3 +259 0x2000 //RX_FDDRC_SLANT_0_0 +260 0x2000 //RX_FDDRC_SLANT_0_1 +261 0x2000 //RX_FDDRC_SLANT_0_2 +262 0x2000 //RX_FDDRC_SLANT_0_3 +263 0x5333 //RX_FDDRC_SLANT_1_0 +264 0x5333 //RX_FDDRC_SLANT_1_1 +265 0x5333 //RX_FDDRC_SLANT_1_2 +266 0x5333 //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +286 0x0021 //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 +#VOL 3 +163 0x5000 //RX_TDDRC_ALPHA_UP_1 +164 0x5000 //RX_TDDRC_ALPHA_UP_2 +165 0x5000 //RX_TDDRC_ALPHA_UP_3 +166 0x2000 //RX_TDDRC_ALPHA_UP_4 +184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +190 0x65AD //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +269 0x0000 //RX_TDDRC_THRD_0 +270 0x0000 //RX_TDDRC_THRD_1 +271 0x1A00 //RX_TDDRC_THRD_2 +272 0x1A00 //RX_TDDRC_THRD_3 +273 0x3000 //RX_TDDRC_SLANT_0 +274 0x7EB8 //RX_TDDRC_SLANT_1 +275 0x5000 //RX_TDDRC_ALPHA_UP_0 +276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x199A //RX_TDDRC_HMNC_GAIN +279 0x0001 //RX_TDDRC_SMT_FLAG +280 0x0CCD //RX_TDDRC_SMT_W +281 0x01C8 //RX_TDDRC_DRC_GAIN +195 0x0020 //RX_FDEQ_SUBNUM +196 0x4848 //RX_FDEQ_GAIN_0 +197 0x4848 //RX_FDEQ_GAIN_1 +198 0x4848 //RX_FDEQ_GAIN_2 +199 0x4848 //RX_FDEQ_GAIN_3 +200 0x4848 //RX_FDEQ_GAIN_4 +201 0x4848 //RX_FDEQ_GAIN_5 +202 0x4848 //RX_FDEQ_GAIN_6 +203 0x4848 //RX_FDEQ_GAIN_7 +204 0x4848 //RX_FDEQ_GAIN_8 +205 0x4848 //RX_FDEQ_GAIN_9 +206 0x4848 //RX_FDEQ_GAIN_10 +207 0x4848 //RX_FDEQ_GAIN_11 +208 0x4848 //RX_FDEQ_GAIN_12 +209 0x4848 //RX_FDEQ_GAIN_13 +210 0x4848 //RX_FDEQ_GAIN_14 +211 0x4848 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0202 //RX_FDEQ_BIN_0 +221 0x0203 //RX_FDEQ_BIN_1 +222 0x0303 //RX_FDEQ_BIN_2 +223 0x0304 //RX_FDEQ_BIN_3 +224 0x0405 //RX_FDEQ_BIN_4 +225 0x0506 //RX_FDEQ_BIN_5 +226 0x0708 //RX_FDEQ_BIN_6 +227 0x090A //RX_FDEQ_BIN_7 +228 0x0B0C //RX_FDEQ_BIN_8 +229 0x0D0E //RX_FDEQ_BIN_9 +230 0x1013 //RX_FDEQ_BIN_10 +231 0x1719 //RX_FDEQ_BIN_11 +232 0x1B1E //RX_FDEQ_BIN_12 +233 0x1E1E //RX_FDEQ_BIN_13 +234 0x1E28 //RX_FDEQ_BIN_14 +235 0x282C //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x4000 //RX_FDEQ_RESRV_0 +245 0x0320 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0030 //RX_FDDRC_BAND_MARGIN_1 +248 0x0050 //RX_FDDRC_BAND_MARGIN_2 +249 0x0080 //RX_FDDRC_BAND_MARGIN_3 +250 0x0007 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x5000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x6400 //RX_FDDRC_THRD_3_2 +258 0x6400 //RX_FDDRC_THRD_3_3 +259 0x2000 //RX_FDDRC_SLANT_0_0 +260 0x2000 //RX_FDDRC_SLANT_0_1 +261 0x2000 //RX_FDDRC_SLANT_0_2 +262 0x2000 //RX_FDDRC_SLANT_0_3 +263 0x5333 //RX_FDDRC_SLANT_1_0 +264 0x5333 //RX_FDDRC_SLANT_1_1 +265 0x5333 //RX_FDDRC_SLANT_1_2 +266 0x5333 //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +286 0x0037 //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 +#VOL 4 +163 0x5000 //RX_TDDRC_ALPHA_UP_1 +164 0x5000 //RX_TDDRC_ALPHA_UP_2 +165 0x5000 //RX_TDDRC_ALPHA_UP_3 +166 0x2000 //RX_TDDRC_ALPHA_UP_4 +184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +190 0x65AD //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +269 0x0000 //RX_TDDRC_THRD_0 +270 0x0000 //RX_TDDRC_THRD_1 +271 0x1A00 //RX_TDDRC_THRD_2 +272 0x1A00 //RX_TDDRC_THRD_3 +273 0x3000 //RX_TDDRC_SLANT_0 +274 0x7EB8 //RX_TDDRC_SLANT_1 +275 0x5000 //RX_TDDRC_ALPHA_UP_0 +276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x199A //RX_TDDRC_HMNC_GAIN +279 0x0001 //RX_TDDRC_SMT_FLAG +280 0x0CCD //RX_TDDRC_SMT_W +281 0x01C8 //RX_TDDRC_DRC_GAIN +195 0x0020 //RX_FDEQ_SUBNUM +196 0x4848 //RX_FDEQ_GAIN_0 +197 0x4848 //RX_FDEQ_GAIN_1 +198 0x4848 //RX_FDEQ_GAIN_2 +199 0x4848 //RX_FDEQ_GAIN_3 +200 0x4848 //RX_FDEQ_GAIN_4 +201 0x4848 //RX_FDEQ_GAIN_5 +202 0x4848 //RX_FDEQ_GAIN_6 +203 0x4848 //RX_FDEQ_GAIN_7 +204 0x4848 //RX_FDEQ_GAIN_8 +205 0x4848 //RX_FDEQ_GAIN_9 +206 0x4848 //RX_FDEQ_GAIN_10 +207 0x4848 //RX_FDEQ_GAIN_11 +208 0x4848 //RX_FDEQ_GAIN_12 +209 0x4848 //RX_FDEQ_GAIN_13 +210 0x4848 //RX_FDEQ_GAIN_14 +211 0x4848 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0202 //RX_FDEQ_BIN_0 +221 0x0203 //RX_FDEQ_BIN_1 +222 0x0303 //RX_FDEQ_BIN_2 +223 0x0304 //RX_FDEQ_BIN_3 +224 0x0405 //RX_FDEQ_BIN_4 +225 0x0506 //RX_FDEQ_BIN_5 +226 0x0708 //RX_FDEQ_BIN_6 +227 0x090A //RX_FDEQ_BIN_7 +228 0x0B0C //RX_FDEQ_BIN_8 +229 0x0D0E //RX_FDEQ_BIN_9 +230 0x1013 //RX_FDEQ_BIN_10 +231 0x1719 //RX_FDEQ_BIN_11 +232 0x1B1E //RX_FDEQ_BIN_12 +233 0x1E1E //RX_FDEQ_BIN_13 +234 0x1E28 //RX_FDEQ_BIN_14 +235 0x282C //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x4000 //RX_FDEQ_RESRV_0 +245 0x0320 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0030 //RX_FDDRC_BAND_MARGIN_1 +248 0x0050 //RX_FDDRC_BAND_MARGIN_2 +249 0x0080 //RX_FDDRC_BAND_MARGIN_3 +250 0x0007 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x5000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x6400 //RX_FDDRC_THRD_3_2 +258 0x6400 //RX_FDDRC_THRD_3_3 +259 0x2000 //RX_FDDRC_SLANT_0_0 +260 0x2000 //RX_FDDRC_SLANT_0_1 +261 0x2000 //RX_FDDRC_SLANT_0_2 +262 0x2000 //RX_FDDRC_SLANT_0_3 +263 0x5333 //RX_FDDRC_SLANT_1_0 +264 0x5333 //RX_FDDRC_SLANT_1_1 +265 0x5333 //RX_FDDRC_SLANT_1_2 +266 0x5333 //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +286 0x005B //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 +#VOL 5 +163 0x5000 //RX_TDDRC_ALPHA_UP_1 +164 0x5000 //RX_TDDRC_ALPHA_UP_2 +165 0x5000 //RX_TDDRC_ALPHA_UP_3 +166 0x2000 //RX_TDDRC_ALPHA_UP_4 +184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +190 0x65AD //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +269 0x0000 //RX_TDDRC_THRD_0 +270 0x0000 //RX_TDDRC_THRD_1 +271 0x1A00 //RX_TDDRC_THRD_2 +272 0x1A00 //RX_TDDRC_THRD_3 +273 0x3000 //RX_TDDRC_SLANT_0 +274 0x7EB8 //RX_TDDRC_SLANT_1 +275 0x5000 //RX_TDDRC_ALPHA_UP_0 +276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x199A //RX_TDDRC_HMNC_GAIN +279 0x0001 //RX_TDDRC_SMT_FLAG +280 0x0CCD //RX_TDDRC_SMT_W +281 0x01C8 //RX_TDDRC_DRC_GAIN +195 0x0020 //RX_FDEQ_SUBNUM +196 0x4848 //RX_FDEQ_GAIN_0 +197 0x4848 //RX_FDEQ_GAIN_1 +198 0x4848 //RX_FDEQ_GAIN_2 +199 0x4848 //RX_FDEQ_GAIN_3 +200 0x4848 //RX_FDEQ_GAIN_4 +201 0x4848 //RX_FDEQ_GAIN_5 +202 0x4848 //RX_FDEQ_GAIN_6 +203 0x4848 //RX_FDEQ_GAIN_7 +204 0x4848 //RX_FDEQ_GAIN_8 +205 0x4848 //RX_FDEQ_GAIN_9 +206 0x4848 //RX_FDEQ_GAIN_10 +207 0x4848 //RX_FDEQ_GAIN_11 +208 0x4848 //RX_FDEQ_GAIN_12 +209 0x4848 //RX_FDEQ_GAIN_13 +210 0x4848 //RX_FDEQ_GAIN_14 +211 0x4848 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0202 //RX_FDEQ_BIN_0 +221 0x0203 //RX_FDEQ_BIN_1 +222 0x0303 //RX_FDEQ_BIN_2 +223 0x0304 //RX_FDEQ_BIN_3 +224 0x0405 //RX_FDEQ_BIN_4 +225 0x0506 //RX_FDEQ_BIN_5 +226 0x0708 //RX_FDEQ_BIN_6 +227 0x090A //RX_FDEQ_BIN_7 +228 0x0B0C //RX_FDEQ_BIN_8 +229 0x0D0E //RX_FDEQ_BIN_9 +230 0x1013 //RX_FDEQ_BIN_10 +231 0x1719 //RX_FDEQ_BIN_11 +232 0x1B1E //RX_FDEQ_BIN_12 +233 0x1E1E //RX_FDEQ_BIN_13 +234 0x1E28 //RX_FDEQ_BIN_14 +235 0x282C //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x4000 //RX_FDEQ_RESRV_0 +245 0x0320 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0030 //RX_FDDRC_BAND_MARGIN_1 +248 0x0050 //RX_FDDRC_BAND_MARGIN_2 +249 0x0080 //RX_FDDRC_BAND_MARGIN_3 +250 0x0007 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x5000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x6400 //RX_FDDRC_THRD_3_2 +258 0x6400 //RX_FDDRC_THRD_3_3 +259 0x2000 //RX_FDDRC_SLANT_0_0 +260 0x2000 //RX_FDDRC_SLANT_0_1 +261 0x2000 //RX_FDDRC_SLANT_0_2 +262 0x2000 //RX_FDDRC_SLANT_0_3 +263 0x5333 //RX_FDDRC_SLANT_1_0 +264 0x5333 //RX_FDDRC_SLANT_1_1 +265 0x5333 //RX_FDDRC_SLANT_1_2 +266 0x5333 //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +286 0x0099 //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 +#VOL 6 +163 0x5000 //RX_TDDRC_ALPHA_UP_1 +164 0x5000 //RX_TDDRC_ALPHA_UP_2 +165 0x5000 //RX_TDDRC_ALPHA_UP_3 +166 0x2000 //RX_TDDRC_ALPHA_UP_4 +184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +190 0x65AD //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +269 0x0000 //RX_TDDRC_THRD_0 +270 0x0000 //RX_TDDRC_THRD_1 +271 0x1A00 //RX_TDDRC_THRD_2 +272 0x1A00 //RX_TDDRC_THRD_3 +273 0x3000 //RX_TDDRC_SLANT_0 +274 0x7EB8 //RX_TDDRC_SLANT_1 +275 0x5000 //RX_TDDRC_ALPHA_UP_0 +276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x199A //RX_TDDRC_HMNC_GAIN +279 0x0001 //RX_TDDRC_SMT_FLAG +280 0x0CCD //RX_TDDRC_SMT_W +281 0x01C8 //RX_TDDRC_DRC_GAIN +195 0x0020 //RX_FDEQ_SUBNUM +196 0x4848 //RX_FDEQ_GAIN_0 +197 0x4848 //RX_FDEQ_GAIN_1 +198 0x4848 //RX_FDEQ_GAIN_2 +199 0x4848 //RX_FDEQ_GAIN_3 +200 0x4848 //RX_FDEQ_GAIN_4 +201 0x4848 //RX_FDEQ_GAIN_5 +202 0x4848 //RX_FDEQ_GAIN_6 +203 0x4848 //RX_FDEQ_GAIN_7 +204 0x4848 //RX_FDEQ_GAIN_8 +205 0x4848 //RX_FDEQ_GAIN_9 +206 0x4848 //RX_FDEQ_GAIN_10 +207 0x4848 //RX_FDEQ_GAIN_11 +208 0x4848 //RX_FDEQ_GAIN_12 +209 0x4848 //RX_FDEQ_GAIN_13 +210 0x4848 //RX_FDEQ_GAIN_14 +211 0x4848 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0202 //RX_FDEQ_BIN_0 +221 0x0203 //RX_FDEQ_BIN_1 +222 0x0303 //RX_FDEQ_BIN_2 +223 0x0304 //RX_FDEQ_BIN_3 +224 0x0405 //RX_FDEQ_BIN_4 +225 0x0506 //RX_FDEQ_BIN_5 +226 0x0708 //RX_FDEQ_BIN_6 +227 0x090A //RX_FDEQ_BIN_7 +228 0x0B0C //RX_FDEQ_BIN_8 +229 0x0D0E //RX_FDEQ_BIN_9 +230 0x1013 //RX_FDEQ_BIN_10 +231 0x1719 //RX_FDEQ_BIN_11 +232 0x1B1E //RX_FDEQ_BIN_12 +233 0x1E1E //RX_FDEQ_BIN_13 +234 0x1E28 //RX_FDEQ_BIN_14 +235 0x282C //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x4000 //RX_FDEQ_RESRV_0 +245 0x0320 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0030 //RX_FDDRC_BAND_MARGIN_1 +248 0x0050 //RX_FDDRC_BAND_MARGIN_2 +249 0x0080 //RX_FDDRC_BAND_MARGIN_3 +250 0x0007 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x5000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x6400 //RX_FDDRC_THRD_3_2 +258 0x6400 //RX_FDDRC_THRD_3_3 +259 0x2000 //RX_FDDRC_SLANT_0_0 +260 0x2000 //RX_FDDRC_SLANT_0_1 +261 0x2000 //RX_FDDRC_SLANT_0_2 +262 0x2000 //RX_FDDRC_SLANT_0_3 +263 0x5333 //RX_FDDRC_SLANT_1_0 +264 0x5333 //RX_FDDRC_SLANT_1_1 +265 0x5333 //RX_FDDRC_SLANT_1_2 +266 0x5333 //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +286 0x0100 //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 #CASE_NAME HEADSET-GOOGLE_CONDOR_CERTIFICATION1-VOICE_GENERIC-FB -#PARAM_MODE FULL -#PARAM_TYPE TX+RX -#TOTAL_CUSTOM_STEP 7 +#PARAM_MODE Full +#PARAM_TYPE TX+2RX +#TOTAL_CUSTOM_STEP 7+7 #TX 0 0x0009 //TX_OPERATION_MODE_0 1 0x0009 //TX_OPERATION_MODE_1 @@ -33585,10 +50989,10 @@ 248 0xF600 //TX_THR_SN_EST_6 249 0xF600 //TX_THR_SN_EST_7 250 0x0200 //TX_DELTA_THR_SN_EST_0 -251 0x0200 //TX_DELTA_THR_SN_EST_1 -252 0x0400 //TX_DELTA_THR_SN_EST_2 -253 0x0300 //TX_DELTA_THR_SN_EST_3 -254 0x0600 //TX_DELTA_THR_SN_EST_4 +251 0x0400 //TX_DELTA_THR_SN_EST_1 +252 0x0300 //TX_DELTA_THR_SN_EST_2 +253 0x0600 //TX_DELTA_THR_SN_EST_3 +254 0x0200 //TX_DELTA_THR_SN_EST_4 255 0x0200 //TX_DELTA_THR_SN_EST_5 256 0x0200 //TX_DELTA_THR_SN_EST_6 257 0x0200 //TX_DELTA_THR_SN_EST_7 @@ -33616,31 +51020,31 @@ 279 0x2000 //TX_B_POST_FLT_0 280 0x2000 //TX_B_POST_FLT_1 281 0x0012 //TX_NS_LVL_CTRL_0 -282 0x0019 //TX_NS_LVL_CTRL_1 +282 0x0016 //TX_NS_LVL_CTRL_1 283 0x0016 //TX_NS_LVL_CTRL_2 -284 0x0016 //TX_NS_LVL_CTRL_3 -285 0x0019 //TX_NS_LVL_CTRL_4 +284 0x0019 //TX_NS_LVL_CTRL_3 +285 0x0010 //TX_NS_LVL_CTRL_4 286 0x0010 //TX_NS_LVL_CTRL_5 -287 0x0010 //TX_NS_LVL_CTRL_6 +287 0x0019 //TX_NS_LVL_CTRL_6 288 0x0010 //TX_NS_LVL_CTRL_7 289 0x000C //TX_MIN_GAIN_S_0 -290 0x0011 //TX_MIN_GAIN_S_1 +290 0x000C //TX_MIN_GAIN_S_1 291 0x000C //TX_MIN_GAIN_S_2 -292 0x000C //TX_MIN_GAIN_S_3 -293 0x000F //TX_MIN_GAIN_S_4 +292 0x000F //TX_MIN_GAIN_S_3 +293 0x000C //TX_MIN_GAIN_S_4 294 0x000C //TX_MIN_GAIN_S_5 -295 0x000C //TX_MIN_GAIN_S_6 +295 0x0011 //TX_MIN_GAIN_S_6 296 0x000C //TX_MIN_GAIN_S_7 297 0x7FFF //TX_NMOS_SUP 298 0x0000 //TX_NS_MAX_PRI_SNR_TH 299 0x0000 //TX_NMOS_SUP_MENSA 300 0x7000 //TX_SNRI_SUP_0 -301 0x6000 //TX_SNRI_SUP_1 +301 0x7000 //TX_SNRI_SUP_1 302 0x7000 //TX_SNRI_SUP_2 -303 0x7000 //TX_SNRI_SUP_3 -304 0x6000 //TX_SNRI_SUP_4 +303 0x6000 //TX_SNRI_SUP_3 +304 0x7FFF //TX_SNRI_SUP_4 305 0x7FFF //TX_SNRI_SUP_5 -306 0x7FFF //TX_SNRI_SUP_6 +306 0x6000 //TX_SNRI_SUP_6 307 0x7FFF //TX_SNRI_SUP_7 308 0x7FFF //TX_THR_LFNS 309 0x0016 //TX_G_LFNS @@ -33657,8 +51061,8 @@ 320 0x6000 //TX_A_POST_FILT_S_6 321 0x6000 //TX_A_POST_FILT_S_7 322 0x2000 //TX_B_POST_FILT_0 -323 0x2000 //TX_B_POST_FILT_1 -324 0x4000 //TX_B_POST_FILT_2 +323 0x4000 //TX_B_POST_FILT_1 +324 0x2000 //TX_B_POST_FILT_2 325 0x2000 //TX_B_POST_FILT_3 326 0x2000 //TX_B_POST_FILT_4 327 0x2000 //TX_B_POST_FILT_5 @@ -33701,7 +51105,7 @@ 364 0x0000 //TX_K_APT 365 0x0001 //TX_NOISEDET 366 0x0190 //TX_NDETCT -367 0x0020 //TX_NOISE_TH_0 +367 0x04E8 //TX_NOISE_TH_0 368 0x7FFF //TX_NOISE_TH_0_2 369 0x7FFF //TX_NOISE_TH_0_3 370 0x02A6 //TX_NOISE_TH_1 @@ -33713,11 +51117,11 @@ 376 0x0001 //TX_NOISE_TH_5_3 377 0x0000 //TX_NOISE_TH_5_4 378 0x02BC //TX_NOISE_TH_6 -379 0x0020 //TX_MINENOISE_TH -380 0x4000 //TX_MINENOISE_MIC0_TH_MTS -381 0xFFEE //TX_MINENOISE_MIC0_TH_EXP -382 0x6000 //TX_MINENOISE_MIC0_S_TH_MTS -383 0xFFF3 //TX_MINENOISE_MIC0_S_TH_EXP +379 0x02BC //TX_MINENOISE_TH +380 0xD508 //TX_MORENS_TFMASK_TH +381 0x0001 //TX_DRC_QUIET_FLOOR +382 0x3A98 //TX_RATIODTL_CUT_TH +383 0x1482 //TX_DT_CUT_K1 384 0x0666 //TX_OUT_ENER_S_TH_CLEAN 385 0x0666 //TX_OUT_ENER_S_TH_LESSCLEAN 386 0x0333 //TX_OUT_ENER_S_TH_NOISY @@ -33725,22 +51129,22 @@ 388 0x0333 //TX_OUT_ENER_TH_SPEECH 389 0x2000 //TX_SN_NPB_GAIN 390 0x0000 //TX_NN_NPB_GAIN -391 0x0000 //TX_CSX_ALPHA_0 -392 0x0000 //TX_CSX_ALPHA_1 -393 0x0000 //TX_CSX_ALPHA_2 -394 0x0000 //TX_CSX_ALPHA_3 -395 0x0800 //TX_MU_ARSP_EST -396 0x00C8 //TX_P_OUTBEAM_MIN_TH +391 0x7FFF //TX_POST_MASK_SUP_HSNE +392 0x1388 //TX_TAIL_DET_TH +393 0x4000 //TX_B_LESSCUT_RTO_WTA +394 0x0000 //TX_MEL_G_R +395 0x0080 //TX_SUPHIGH_TH +396 0x0000 //TX_MASK_G_R 397 0x0002 //TX_EXTRA_NS_L -398 0x0800 //TX_EXTRA_NS_A -399 0x0005 //TX_VR_NOISE_FLOOR_TH +398 0x1800 //TX_C_POST_FLT_MASK +399 0x7FFF //TX_A_POST_FLT_WNS 400 0x0148 //TX_MIN_G_LOW300HZ 401 0x0004 //TX_MAXLEVEL_CNG 402 0x00B4 //TX_STN_NOISE_TH 403 0x4000 //TX_POST_MASK_SUP 404 0x7FFF //TX_POST_MASK_ADJUST 405 0x00C8 //TX_NS_ENOISE_MIC0_TH -406 0x0020 //TX_MINENOISE_MIC0_TH +406 0x04E7 //TX_MINENOISE_MIC0_TH 407 0x012C //TX_MINENOISE_MIC0_S_TH 408 0x2900 //TX_MIN_G_CTRL_SSNS 409 0x0800 //TX_METAL_RTO_THR @@ -33848,16 +51252,16 @@ 511 0x6666 //TX_MIC_TO_BFGAIN 512 0x0000 //TX_MICTOBFGAIN0 513 0x0000 //TX_FASTMUE_TH -514 0x0000 //TX_DERVB_LEN_0 -515 0x0000 //TX_DERVB_LEN_1 -516 0x0000 //TX_RHO_DERVB -517 0x0000 //TX_MIC_INDX_DERVB -518 0x0000 //TX_MU_DERVB -519 0x0000 //TX_DR_RESRV_0 -520 0x0000 //TX_DR_RESRV_1 -521 0x0000 //TX_DR_RESRV_2 -522 0x0000 //TX_DR_RESRV_3 -523 0x0000 //TX_DR_RESRV_4 +514 0xC000 //TX_DEREVERB_LF_MU +515 0xC000 //TX_DEREVERB_HF_MU +516 0xCCCC //TX_DEREVERB_DELAY +517 0xD999 //TX_DEREVERB_COEF_LEN +518 0x1F40 //TX_DEREVERB_DNR +519 0x0000 //TX_DEREVERB_ALPHA +520 0x0000 //TX_DEREVERB_BETA +521 0x0000 //TX_GSC_RTOL_TH +522 0x7000 //TX_GSC_RTOH_TH +523 0x0064 //TX_WIDE2_MEANHTH 524 0x0000 //TX_DR_RESRV_5 525 0x0000 //TX_DR_RESRV_6 526 0x0000 //TX_DR_RESRV_7 @@ -34231,8 +51635,73 @@ 894 0xC000 //TX_FASTNS_SSA_THHFL 895 0xCCCC //TX_FASTNS_SSA_THLFH 896 0xD999 //TX_FASTNS_SSA_THHFH +897 0x2339 //TX_SENDFUNC_REG_MICMUTE +898 0x0021 //TX_SENDFUNC_REG_MICMUTE1 +899 0x02BC //TX_MICMUTE_RATIO_THR +900 0x0140 //TX_MICMUTE_AMP_THR +901 0x0004 //TX_MICMUTE_HPF_IND +902 0x00C0 //TX_MICMUTE_LOG_EYR_TH +903 0x0008 //TX_MICMUTE_CVG_TIME +904 0x0008 //TX_MICMUTE_RELEASE_TIME +905 0x01FE //TX_MIC_VOLUME_MIC0MUTE +906 0x0020 //TX_MICMUTE_EPD_OFFSET_0 +907 0x001E //TX_MICMUTE_FRQ_AEC_L +908 0x7999 //TX_MICMUTE_EAD_THR +909 0x7FFF //TX_MICMUTE_LAMBDA_CB_NLE +910 0x7FFF //TX_MICMUTE_LAMBDA_RE_EST +911 0x4000 //TX_DTD_THR1_MICMUTE_0 +912 0x7000 //TX_DTD_THR1_MICMUTE_1 +913 0x7FFF //TX_DTD_THR1_MICMUTE_2 +914 0x7FFF //TX_DTD_THR1_MICMUTE_3 +915 0x6CCC //TX_DTD_THR2_MICMUTE_0 +916 0x0400 //TX_MICMUTE_MIN_EQ_RE_EST_0 +917 0x0400 //TX_MICMUTE_MIN_EQ_RE_EST_1 +918 0x1000 //TX_MICMUTE_MIN_EQ_RE_EST_2 +919 0x7FFF //TX_MICMUTE_MIN_EQ_RE_EST_3 +920 0x7FFF //TX_MICMUTE_MIN_EQ_RE_EST_4 +921 0x4000 //TX_MICMUTE_C_POST_FLT +922 0x03E8 //TX_MICMUTE_DT_CUT_K +923 0x0001 //TX_MICMUTE_DT_CUT_THR +924 0x03E8 //TX_MICMUTE_DT_CUT_K2 +925 0x0001 //TX_MICMUTE_DT_CUT_THR2 +926 0x0064 //TX_MICMUTE_DT2_HOLD_N +927 0x1000 //TX_MICMUTE_RATIODTH_THCUT +928 0x1000 //TX_MICMUTE_B_POST_FLT_ECHOL +929 0x7FFF //TX_MICMUTE_B_POST_FLT_ECHOH +930 0x0400 //TX_MICMUTE_C_POST_FLT_MASK +931 0x7999 //TX_MICMUTE_RATIODTL_CUT_TH +932 0x0258 //TX_MICMUTE_DT_CUT_K1 +933 0x0800 //TX_MICMUTE_N2_SN_EST +934 0xFC00 //TX_MICMUTE_THR_SN_EST_0 +935 0x001C //TX_MICMUTE_MIN_G_CTRL_0 +936 0x6000 //TX_MICMUTE_A_POST_FILT_S_0 +937 0x7000 //TX_MICMUTE_B_POST_FILT_0 +938 0x2710 //TX_MIC1RUB_AMP_THR +939 0x0010 //TX_MIC1MUTE_RATIO_THR +940 0x0450 //TX_MIC1MUTE_AMP_THR +941 0x0008 //TX_MIC1MUTE_CVG_TIME +942 0x0008 //TX_MIC1MUTE_RELEASE_TIME +943 0x0000 //TX_AMS_RESRV_01 +944 0x0000 //TX_AMS_RESRV_02 +945 0x0000 //TX_AMS_RESRV_03 +946 0x0000 //TX_AMS_RESRV_04 +947 0x0000 //TX_AMS_RESRV_05 +948 0x0000 //TX_AMS_RESRV_06 +949 0x0000 //TX_AMS_RESRV_07 +950 0x0000 //TX_AMS_RESRV_08 +951 0x0000 //TX_AMS_RESRV_09 +952 0x0000 //TX_AMS_RESRV_10 +953 0x0000 //TX_AMS_RESRV_11 +954 0x0000 //TX_AMS_RESRV_12 +955 0x0000 //TX_AMS_RESRV_13 +956 0x0000 //TX_AMS_RESRV_14 +957 0x0000 //TX_AMS_RESRV_15 +958 0x0000 //TX_AMS_RESRV_16 +959 0x0000 //TX_AMS_RESRV_17 +960 0x0000 //TX_AMS_RESRV_18 +961 0x0000 //TX_AMS_RESRV_19 #RX -0 0x002C //RX_RECVFUNC_MODE_0 +0 0x202C //RX_RECVFUNC_MODE_0 1 0x0000 //RX_RECVFUNC_MODE_1 2 0x0004 //RX_SAMPLINGFREQ_SIG 3 0x0004 //RX_SAMPLINGFREQ_PROC @@ -35082,11 +52551,862 @@ 110 0x0000 //RX_FDDRC_RESRV_0 129 0x0100 //RX_SPK_VOL 130 0x0000 //RX_VOL_RESRV_0 +#RX 2 +157 0x202C //RX_RECVFUNC_MODE_0 +158 0x0000 //RX_RECVFUNC_MODE_1 +159 0x0004 //RX_SAMPLINGFREQ_SIG +160 0x0004 //RX_SAMPLINGFREQ_PROC +161 0x000A //RX_FRAME_SZ +162 0x0000 //RX_DELAY_OPT +163 0x1000 //RX_TDDRC_ALPHA_UP_1 +164 0x1000 //RX_TDDRC_ALPHA_UP_2 +165 0x1000 //RX_TDDRC_ALPHA_UP_3 +166 0x1000 //RX_TDDRC_ALPHA_UP_4 +167 0x0800 //RX_PGA +168 0x7B02 //RX_A_HP +169 0x4000 //RX_B_PE +170 0x7800 //RX_THR_PITCH_DET_0 +171 0x7000 //RX_THR_PITCH_DET_1 +172 0x6000 //RX_THR_PITCH_DET_2 +173 0x0008 //RX_PITCH_BFR_LEN +174 0x0003 //RX_SBD_PITCH_DET +175 0x0100 //RX_PP_RESRV_0 +176 0x0020 //RX_PP_RESRV_1 +177 0x0500 //RX_N_SN_EST +178 0x000C //RX_N2_SN_EST +179 0x000A //RX_NS_LVL_CTRL +180 0xF600 //RX_THR_SN_EST +181 0x7000 //RX_LAMBDA_PFILT +182 0x000A //RX_FENS_RESRV_0 +183 0x0190 //RX_FENS_RESRV_1 +184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +187 0x0002 //RX_EXTRA_NS_L +188 0x0800 //RX_EXTRA_NS_A +189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +190 0x7FFF //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +192 0x199A //RX_A_POST_FLT +193 0x0000 //RX_LMT_THRD +194 0x4000 //RX_LMT_ALPHA +195 0x0020 //RX_FDEQ_SUBNUM +196 0x4848 //RX_FDEQ_GAIN_0 +197 0x4848 //RX_FDEQ_GAIN_1 +198 0x4848 //RX_FDEQ_GAIN_2 +199 0x4848 //RX_FDEQ_GAIN_3 +200 0x4848 //RX_FDEQ_GAIN_4 +201 0x4848 //RX_FDEQ_GAIN_5 +202 0x4848 //RX_FDEQ_GAIN_6 +203 0x4848 //RX_FDEQ_GAIN_7 +204 0x4848 //RX_FDEQ_GAIN_8 +205 0x4848 //RX_FDEQ_GAIN_9 +206 0x4848 //RX_FDEQ_GAIN_10 +207 0x4848 //RX_FDEQ_GAIN_11 +208 0x4848 //RX_FDEQ_GAIN_12 +209 0x4848 //RX_FDEQ_GAIN_13 +210 0x4848 //RX_FDEQ_GAIN_14 +211 0x4848 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0202 //RX_FDEQ_BIN_0 +221 0x0203 //RX_FDEQ_BIN_1 +222 0x0304 //RX_FDEQ_BIN_2 +223 0x0405 //RX_FDEQ_BIN_3 +224 0x0607 //RX_FDEQ_BIN_4 +225 0x0809 //RX_FDEQ_BIN_5 +226 0x0A0B //RX_FDEQ_BIN_6 +227 0x0C0D //RX_FDEQ_BIN_7 +228 0x0E0F //RX_FDEQ_BIN_8 +229 0x1011 //RX_FDEQ_BIN_9 +230 0x1214 //RX_FDEQ_BIN_10 +231 0x1618 //RX_FDEQ_BIN_11 +232 0x1C1C //RX_FDEQ_BIN_12 +233 0x2020 //RX_FDEQ_BIN_13 +234 0x2020 //RX_FDEQ_BIN_14 +235 0x2011 //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x4000 //RX_FDEQ_RESRV_0 +245 0x0320 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0030 //RX_FDDRC_BAND_MARGIN_1 +248 0x0050 //RX_FDDRC_BAND_MARGIN_2 +249 0x0080 //RX_FDDRC_BAND_MARGIN_3 +250 0x0007 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x5000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x6400 //RX_FDDRC_THRD_3_2 +258 0x6400 //RX_FDDRC_THRD_3_3 +259 0x2000 //RX_FDDRC_SLANT_0_0 +260 0x2000 //RX_FDDRC_SLANT_0_1 +261 0x2000 //RX_FDDRC_SLANT_0_2 +262 0x2000 //RX_FDDRC_SLANT_0_3 +263 0x5333 //RX_FDDRC_SLANT_1_0 +264 0x5333 //RX_FDDRC_SLANT_1_1 +265 0x5333 //RX_FDDRC_SLANT_1_2 +266 0x5333 //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +268 0x0002 //RX_FILTINDX +269 0x0000 //RX_TDDRC_THRD_0 +270 0x0000 //RX_TDDRC_THRD_1 +271 0x1200 //RX_TDDRC_THRD_2 +272 0x1900 //RX_TDDRC_THRD_3 +273 0x3000 //RX_TDDRC_SLANT_0 +274 0x6E00 //RX_TDDRC_SLANT_1 +275 0x1000 //RX_TDDRC_ALPHA_UP_0 +276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x199A //RX_TDDRC_HMNC_GAIN +279 0x0001 //RX_TDDRC_SMT_FLAG +280 0x0CCD //RX_TDDRC_SMT_W +281 0x0240 //RX_TDDRC_DRC_GAIN +282 0x7C00 //RX_LAMBDA_PKA_FP +283 0x2000 //RX_TPKA_FP +284 0x2000 //RX_MIN_G_FP +285 0x0080 //RX_MAX_G_FP +286 0x000B //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 +288 0x0000 //RX_MAXLEVEL_CNG +289 0x3000 //RX_BWE_UV_TH +290 0x3000 //RX_BWE_UV_TH2 +291 0x1800 //RX_BWE_UV_TH3 +292 0x1000 //RX_BWE_V_TH +293 0x04CD //RX_BWE_GAIN1_V_TH1 +294 0x0F33 //RX_BWE_GAIN1_V_TH2 +295 0x7333 //RX_BWE_UV_EQ +296 0x199A //RX_BWE_V_EQ +297 0x7333 //RX_BWE_TONE_TH +298 0x0004 //RX_BWE_UV_HOLD_T +299 0x6CCD //RX_BWE_GAIN2_ALPHA +300 0x799A //RX_BWE_GAIN3_ALPHA +301 0x001E //RX_BWE_CUTOFF +302 0x3000 //RX_BWE_GAINFILL +303 0x3200 //RX_BWE_MAXTH_TONE +304 0x2000 //RX_BWE_EQ_0 +305 0x2000 //RX_BWE_EQ_1 +306 0x2000 //RX_BWE_EQ_2 +307 0x2000 //RX_BWE_EQ_3 +308 0x2000 //RX_BWE_EQ_4 +309 0x2000 //RX_BWE_EQ_5 +310 0x2000 //RX_BWE_EQ_6 +311 0x0000 //RX_BWE_RESRV_0 +312 0x0000 //RX_BWE_RESRV_1 +313 0x0000 //RX_BWE_RESRV_2 +#VOL 0 +163 0x1000 //RX_TDDRC_ALPHA_UP_1 +164 0x1000 //RX_TDDRC_ALPHA_UP_2 +165 0x1000 //RX_TDDRC_ALPHA_UP_3 +166 0x1000 //RX_TDDRC_ALPHA_UP_4 +184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +190 0x7FFF //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +269 0x0000 //RX_TDDRC_THRD_0 +270 0x0000 //RX_TDDRC_THRD_1 +271 0x1200 //RX_TDDRC_THRD_2 +272 0x1900 //RX_TDDRC_THRD_3 +273 0x3000 //RX_TDDRC_SLANT_0 +274 0x6E00 //RX_TDDRC_SLANT_1 +275 0x1000 //RX_TDDRC_ALPHA_UP_0 +276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x199A //RX_TDDRC_HMNC_GAIN +279 0x0001 //RX_TDDRC_SMT_FLAG +280 0x0CCD //RX_TDDRC_SMT_W +281 0x0240 //RX_TDDRC_DRC_GAIN +195 0x0020 //RX_FDEQ_SUBNUM +196 0x4848 //RX_FDEQ_GAIN_0 +197 0x4848 //RX_FDEQ_GAIN_1 +198 0x4848 //RX_FDEQ_GAIN_2 +199 0x4848 //RX_FDEQ_GAIN_3 +200 0x4848 //RX_FDEQ_GAIN_4 +201 0x4848 //RX_FDEQ_GAIN_5 +202 0x4848 //RX_FDEQ_GAIN_6 +203 0x4848 //RX_FDEQ_GAIN_7 +204 0x4848 //RX_FDEQ_GAIN_8 +205 0x4848 //RX_FDEQ_GAIN_9 +206 0x4848 //RX_FDEQ_GAIN_10 +207 0x4848 //RX_FDEQ_GAIN_11 +208 0x4848 //RX_FDEQ_GAIN_12 +209 0x4848 //RX_FDEQ_GAIN_13 +210 0x4848 //RX_FDEQ_GAIN_14 +211 0x4848 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0202 //RX_FDEQ_BIN_0 +221 0x0203 //RX_FDEQ_BIN_1 +222 0x0304 //RX_FDEQ_BIN_2 +223 0x0405 //RX_FDEQ_BIN_3 +224 0x0607 //RX_FDEQ_BIN_4 +225 0x0809 //RX_FDEQ_BIN_5 +226 0x0A0B //RX_FDEQ_BIN_6 +227 0x0C0D //RX_FDEQ_BIN_7 +228 0x0E0F //RX_FDEQ_BIN_8 +229 0x1011 //RX_FDEQ_BIN_9 +230 0x1214 //RX_FDEQ_BIN_10 +231 0x1618 //RX_FDEQ_BIN_11 +232 0x1C1C //RX_FDEQ_BIN_12 +233 0x2020 //RX_FDEQ_BIN_13 +234 0x2020 //RX_FDEQ_BIN_14 +235 0x2011 //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x4000 //RX_FDEQ_RESRV_0 +245 0x0320 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0030 //RX_FDDRC_BAND_MARGIN_1 +248 0x0050 //RX_FDDRC_BAND_MARGIN_2 +249 0x0080 //RX_FDDRC_BAND_MARGIN_3 +250 0x0007 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x5000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x6400 //RX_FDDRC_THRD_3_2 +258 0x6400 //RX_FDDRC_THRD_3_3 +259 0x2000 //RX_FDDRC_SLANT_0_0 +260 0x2000 //RX_FDDRC_SLANT_0_1 +261 0x2000 //RX_FDDRC_SLANT_0_2 +262 0x2000 //RX_FDDRC_SLANT_0_3 +263 0x5333 //RX_FDDRC_SLANT_1_0 +264 0x5333 //RX_FDDRC_SLANT_1_1 +265 0x5333 //RX_FDDRC_SLANT_1_2 +266 0x5333 //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +286 0x000B //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 +#VOL 1 +163 0x1000 //RX_TDDRC_ALPHA_UP_1 +164 0x1000 //RX_TDDRC_ALPHA_UP_2 +165 0x1000 //RX_TDDRC_ALPHA_UP_3 +166 0x1000 //RX_TDDRC_ALPHA_UP_4 +184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +190 0x7FFF //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +269 0x0000 //RX_TDDRC_THRD_0 +270 0x0000 //RX_TDDRC_THRD_1 +271 0x1200 //RX_TDDRC_THRD_2 +272 0x1900 //RX_TDDRC_THRD_3 +273 0x3000 //RX_TDDRC_SLANT_0 +274 0x6E00 //RX_TDDRC_SLANT_1 +275 0x1000 //RX_TDDRC_ALPHA_UP_0 +276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x199A //RX_TDDRC_HMNC_GAIN +279 0x0001 //RX_TDDRC_SMT_FLAG +280 0x0CCD //RX_TDDRC_SMT_W +281 0x0240 //RX_TDDRC_DRC_GAIN +195 0x0020 //RX_FDEQ_SUBNUM +196 0x4848 //RX_FDEQ_GAIN_0 +197 0x4848 //RX_FDEQ_GAIN_1 +198 0x4848 //RX_FDEQ_GAIN_2 +199 0x4848 //RX_FDEQ_GAIN_3 +200 0x4848 //RX_FDEQ_GAIN_4 +201 0x4848 //RX_FDEQ_GAIN_5 +202 0x4848 //RX_FDEQ_GAIN_6 +203 0x4848 //RX_FDEQ_GAIN_7 +204 0x4848 //RX_FDEQ_GAIN_8 +205 0x4848 //RX_FDEQ_GAIN_9 +206 0x4848 //RX_FDEQ_GAIN_10 +207 0x4848 //RX_FDEQ_GAIN_11 +208 0x4848 //RX_FDEQ_GAIN_12 +209 0x4848 //RX_FDEQ_GAIN_13 +210 0x4848 //RX_FDEQ_GAIN_14 +211 0x4848 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0202 //RX_FDEQ_BIN_0 +221 0x0203 //RX_FDEQ_BIN_1 +222 0x0304 //RX_FDEQ_BIN_2 +223 0x0405 //RX_FDEQ_BIN_3 +224 0x0607 //RX_FDEQ_BIN_4 +225 0x0809 //RX_FDEQ_BIN_5 +226 0x0A0B //RX_FDEQ_BIN_6 +227 0x0C0D //RX_FDEQ_BIN_7 +228 0x0E0F //RX_FDEQ_BIN_8 +229 0x1011 //RX_FDEQ_BIN_9 +230 0x1214 //RX_FDEQ_BIN_10 +231 0x1618 //RX_FDEQ_BIN_11 +232 0x1C1C //RX_FDEQ_BIN_12 +233 0x2020 //RX_FDEQ_BIN_13 +234 0x2020 //RX_FDEQ_BIN_14 +235 0x2011 //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x4000 //RX_FDEQ_RESRV_0 +245 0x0320 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0030 //RX_FDDRC_BAND_MARGIN_1 +248 0x0050 //RX_FDDRC_BAND_MARGIN_2 +249 0x0080 //RX_FDDRC_BAND_MARGIN_3 +250 0x0007 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x5000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x6400 //RX_FDDRC_THRD_3_2 +258 0x6400 //RX_FDDRC_THRD_3_3 +259 0x2000 //RX_FDDRC_SLANT_0_0 +260 0x2000 //RX_FDDRC_SLANT_0_1 +261 0x2000 //RX_FDDRC_SLANT_0_2 +262 0x2000 //RX_FDDRC_SLANT_0_3 +263 0x5333 //RX_FDDRC_SLANT_1_0 +264 0x5333 //RX_FDDRC_SLANT_1_1 +265 0x5333 //RX_FDDRC_SLANT_1_2 +266 0x5333 //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +286 0x0013 //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 +#VOL 2 +163 0x1000 //RX_TDDRC_ALPHA_UP_1 +164 0x1000 //RX_TDDRC_ALPHA_UP_2 +165 0x1000 //RX_TDDRC_ALPHA_UP_3 +166 0x1000 //RX_TDDRC_ALPHA_UP_4 +184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +190 0x7FFF //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +269 0x0000 //RX_TDDRC_THRD_0 +270 0x0000 //RX_TDDRC_THRD_1 +271 0x1200 //RX_TDDRC_THRD_2 +272 0x1900 //RX_TDDRC_THRD_3 +273 0x3000 //RX_TDDRC_SLANT_0 +274 0x6E00 //RX_TDDRC_SLANT_1 +275 0x1000 //RX_TDDRC_ALPHA_UP_0 +276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x199A //RX_TDDRC_HMNC_GAIN +279 0x0001 //RX_TDDRC_SMT_FLAG +280 0x0CCD //RX_TDDRC_SMT_W +281 0x0240 //RX_TDDRC_DRC_GAIN +195 0x0020 //RX_FDEQ_SUBNUM +196 0x4848 //RX_FDEQ_GAIN_0 +197 0x4848 //RX_FDEQ_GAIN_1 +198 0x4848 //RX_FDEQ_GAIN_2 +199 0x4848 //RX_FDEQ_GAIN_3 +200 0x4848 //RX_FDEQ_GAIN_4 +201 0x4848 //RX_FDEQ_GAIN_5 +202 0x4848 //RX_FDEQ_GAIN_6 +203 0x4848 //RX_FDEQ_GAIN_7 +204 0x4848 //RX_FDEQ_GAIN_8 +205 0x4848 //RX_FDEQ_GAIN_9 +206 0x4848 //RX_FDEQ_GAIN_10 +207 0x4848 //RX_FDEQ_GAIN_11 +208 0x4848 //RX_FDEQ_GAIN_12 +209 0x4848 //RX_FDEQ_GAIN_13 +210 0x4848 //RX_FDEQ_GAIN_14 +211 0x4848 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0202 //RX_FDEQ_BIN_0 +221 0x0203 //RX_FDEQ_BIN_1 +222 0x0304 //RX_FDEQ_BIN_2 +223 0x0405 //RX_FDEQ_BIN_3 +224 0x0607 //RX_FDEQ_BIN_4 +225 0x0809 //RX_FDEQ_BIN_5 +226 0x0A0B //RX_FDEQ_BIN_6 +227 0x0C0D //RX_FDEQ_BIN_7 +228 0x0E0F //RX_FDEQ_BIN_8 +229 0x1011 //RX_FDEQ_BIN_9 +230 0x1214 //RX_FDEQ_BIN_10 +231 0x1618 //RX_FDEQ_BIN_11 +232 0x1C1C //RX_FDEQ_BIN_12 +233 0x2020 //RX_FDEQ_BIN_13 +234 0x2020 //RX_FDEQ_BIN_14 +235 0x2011 //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x4000 //RX_FDEQ_RESRV_0 +245 0x0320 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0030 //RX_FDDRC_BAND_MARGIN_1 +248 0x0050 //RX_FDDRC_BAND_MARGIN_2 +249 0x0080 //RX_FDDRC_BAND_MARGIN_3 +250 0x0007 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x5000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x6400 //RX_FDDRC_THRD_3_2 +258 0x6400 //RX_FDDRC_THRD_3_3 +259 0x2000 //RX_FDDRC_SLANT_0_0 +260 0x2000 //RX_FDDRC_SLANT_0_1 +261 0x2000 //RX_FDDRC_SLANT_0_2 +262 0x2000 //RX_FDDRC_SLANT_0_3 +263 0x5333 //RX_FDDRC_SLANT_1_0 +264 0x5333 //RX_FDDRC_SLANT_1_1 +265 0x5333 //RX_FDDRC_SLANT_1_2 +266 0x5333 //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +286 0x0020 //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 +#VOL 3 +163 0x1000 //RX_TDDRC_ALPHA_UP_1 +164 0x1000 //RX_TDDRC_ALPHA_UP_2 +165 0x1000 //RX_TDDRC_ALPHA_UP_3 +166 0x1000 //RX_TDDRC_ALPHA_UP_4 +184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +190 0x7FFF //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +269 0x0000 //RX_TDDRC_THRD_0 +270 0x0000 //RX_TDDRC_THRD_1 +271 0x1200 //RX_TDDRC_THRD_2 +272 0x1900 //RX_TDDRC_THRD_3 +273 0x3000 //RX_TDDRC_SLANT_0 +274 0x6E00 //RX_TDDRC_SLANT_1 +275 0x1000 //RX_TDDRC_ALPHA_UP_0 +276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x199A //RX_TDDRC_HMNC_GAIN +279 0x0001 //RX_TDDRC_SMT_FLAG +280 0x0CCD //RX_TDDRC_SMT_W +281 0x0240 //RX_TDDRC_DRC_GAIN +195 0x0020 //RX_FDEQ_SUBNUM +196 0x4848 //RX_FDEQ_GAIN_0 +197 0x4848 //RX_FDEQ_GAIN_1 +198 0x4848 //RX_FDEQ_GAIN_2 +199 0x4848 //RX_FDEQ_GAIN_3 +200 0x4848 //RX_FDEQ_GAIN_4 +201 0x4848 //RX_FDEQ_GAIN_5 +202 0x4848 //RX_FDEQ_GAIN_6 +203 0x4848 //RX_FDEQ_GAIN_7 +204 0x4848 //RX_FDEQ_GAIN_8 +205 0x4848 //RX_FDEQ_GAIN_9 +206 0x4848 //RX_FDEQ_GAIN_10 +207 0x4848 //RX_FDEQ_GAIN_11 +208 0x4848 //RX_FDEQ_GAIN_12 +209 0x4848 //RX_FDEQ_GAIN_13 +210 0x4848 //RX_FDEQ_GAIN_14 +211 0x4848 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0202 //RX_FDEQ_BIN_0 +221 0x0203 //RX_FDEQ_BIN_1 +222 0x0304 //RX_FDEQ_BIN_2 +223 0x0405 //RX_FDEQ_BIN_3 +224 0x0607 //RX_FDEQ_BIN_4 +225 0x0809 //RX_FDEQ_BIN_5 +226 0x0A0B //RX_FDEQ_BIN_6 +227 0x0C0D //RX_FDEQ_BIN_7 +228 0x0E0F //RX_FDEQ_BIN_8 +229 0x1011 //RX_FDEQ_BIN_9 +230 0x1214 //RX_FDEQ_BIN_10 +231 0x1618 //RX_FDEQ_BIN_11 +232 0x1C1C //RX_FDEQ_BIN_12 +233 0x2020 //RX_FDEQ_BIN_13 +234 0x2020 //RX_FDEQ_BIN_14 +235 0x2011 //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x4000 //RX_FDEQ_RESRV_0 +245 0x0320 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0030 //RX_FDDRC_BAND_MARGIN_1 +248 0x0050 //RX_FDDRC_BAND_MARGIN_2 +249 0x0080 //RX_FDDRC_BAND_MARGIN_3 +250 0x0007 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x5000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x6400 //RX_FDDRC_THRD_3_2 +258 0x6400 //RX_FDDRC_THRD_3_3 +259 0x2000 //RX_FDDRC_SLANT_0_0 +260 0x2000 //RX_FDDRC_SLANT_0_1 +261 0x2000 //RX_FDDRC_SLANT_0_2 +262 0x2000 //RX_FDDRC_SLANT_0_3 +263 0x5333 //RX_FDDRC_SLANT_1_0 +264 0x5333 //RX_FDDRC_SLANT_1_1 +265 0x5333 //RX_FDDRC_SLANT_1_2 +266 0x5333 //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +286 0x0036 //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 +#VOL 4 +163 0x1000 //RX_TDDRC_ALPHA_UP_1 +164 0x1000 //RX_TDDRC_ALPHA_UP_2 +165 0x1000 //RX_TDDRC_ALPHA_UP_3 +166 0x1000 //RX_TDDRC_ALPHA_UP_4 +184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +190 0x7FFF //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +269 0x0000 //RX_TDDRC_THRD_0 +270 0x0000 //RX_TDDRC_THRD_1 +271 0x1200 //RX_TDDRC_THRD_2 +272 0x1900 //RX_TDDRC_THRD_3 +273 0x3000 //RX_TDDRC_SLANT_0 +274 0x6E00 //RX_TDDRC_SLANT_1 +275 0x1000 //RX_TDDRC_ALPHA_UP_0 +276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x199A //RX_TDDRC_HMNC_GAIN +279 0x0001 //RX_TDDRC_SMT_FLAG +280 0x0CCD //RX_TDDRC_SMT_W +281 0x0240 //RX_TDDRC_DRC_GAIN +195 0x0020 //RX_FDEQ_SUBNUM +196 0x4848 //RX_FDEQ_GAIN_0 +197 0x4848 //RX_FDEQ_GAIN_1 +198 0x4848 //RX_FDEQ_GAIN_2 +199 0x4848 //RX_FDEQ_GAIN_3 +200 0x4848 //RX_FDEQ_GAIN_4 +201 0x4848 //RX_FDEQ_GAIN_5 +202 0x4848 //RX_FDEQ_GAIN_6 +203 0x4848 //RX_FDEQ_GAIN_7 +204 0x4848 //RX_FDEQ_GAIN_8 +205 0x4848 //RX_FDEQ_GAIN_9 +206 0x4848 //RX_FDEQ_GAIN_10 +207 0x4848 //RX_FDEQ_GAIN_11 +208 0x4848 //RX_FDEQ_GAIN_12 +209 0x4848 //RX_FDEQ_GAIN_13 +210 0x4848 //RX_FDEQ_GAIN_14 +211 0x4848 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0202 //RX_FDEQ_BIN_0 +221 0x0203 //RX_FDEQ_BIN_1 +222 0x0304 //RX_FDEQ_BIN_2 +223 0x0405 //RX_FDEQ_BIN_3 +224 0x0607 //RX_FDEQ_BIN_4 +225 0x0809 //RX_FDEQ_BIN_5 +226 0x0A0B //RX_FDEQ_BIN_6 +227 0x0C0D //RX_FDEQ_BIN_7 +228 0x0E0F //RX_FDEQ_BIN_8 +229 0x1011 //RX_FDEQ_BIN_9 +230 0x1214 //RX_FDEQ_BIN_10 +231 0x1618 //RX_FDEQ_BIN_11 +232 0x1C1C //RX_FDEQ_BIN_12 +233 0x2020 //RX_FDEQ_BIN_13 +234 0x2020 //RX_FDEQ_BIN_14 +235 0x2011 //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x4000 //RX_FDEQ_RESRV_0 +245 0x0320 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0030 //RX_FDDRC_BAND_MARGIN_1 +248 0x0050 //RX_FDDRC_BAND_MARGIN_2 +249 0x0080 //RX_FDDRC_BAND_MARGIN_3 +250 0x0007 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x5000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x6400 //RX_FDDRC_THRD_3_2 +258 0x6400 //RX_FDDRC_THRD_3_3 +259 0x2000 //RX_FDDRC_SLANT_0_0 +260 0x2000 //RX_FDDRC_SLANT_0_1 +261 0x2000 //RX_FDDRC_SLANT_0_2 +262 0x2000 //RX_FDDRC_SLANT_0_3 +263 0x5333 //RX_FDDRC_SLANT_1_0 +264 0x5333 //RX_FDDRC_SLANT_1_1 +265 0x5333 //RX_FDDRC_SLANT_1_2 +266 0x5333 //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +286 0x005B //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 +#VOL 5 +163 0x1000 //RX_TDDRC_ALPHA_UP_1 +164 0x1000 //RX_TDDRC_ALPHA_UP_2 +165 0x1000 //RX_TDDRC_ALPHA_UP_3 +166 0x1000 //RX_TDDRC_ALPHA_UP_4 +184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +190 0x7FFF //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +269 0x0000 //RX_TDDRC_THRD_0 +270 0x0000 //RX_TDDRC_THRD_1 +271 0x1200 //RX_TDDRC_THRD_2 +272 0x1900 //RX_TDDRC_THRD_3 +273 0x3000 //RX_TDDRC_SLANT_0 +274 0x6E00 //RX_TDDRC_SLANT_1 +275 0x1000 //RX_TDDRC_ALPHA_UP_0 +276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x199A //RX_TDDRC_HMNC_GAIN +279 0x0001 //RX_TDDRC_SMT_FLAG +280 0x0CCD //RX_TDDRC_SMT_W +281 0x0240 //RX_TDDRC_DRC_GAIN +195 0x0020 //RX_FDEQ_SUBNUM +196 0x4848 //RX_FDEQ_GAIN_0 +197 0x4848 //RX_FDEQ_GAIN_1 +198 0x4848 //RX_FDEQ_GAIN_2 +199 0x4848 //RX_FDEQ_GAIN_3 +200 0x4848 //RX_FDEQ_GAIN_4 +201 0x4848 //RX_FDEQ_GAIN_5 +202 0x4848 //RX_FDEQ_GAIN_6 +203 0x4848 //RX_FDEQ_GAIN_7 +204 0x4848 //RX_FDEQ_GAIN_8 +205 0x4848 //RX_FDEQ_GAIN_9 +206 0x4848 //RX_FDEQ_GAIN_10 +207 0x4848 //RX_FDEQ_GAIN_11 +208 0x4848 //RX_FDEQ_GAIN_12 +209 0x4848 //RX_FDEQ_GAIN_13 +210 0x4848 //RX_FDEQ_GAIN_14 +211 0x4848 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0202 //RX_FDEQ_BIN_0 +221 0x0203 //RX_FDEQ_BIN_1 +222 0x0304 //RX_FDEQ_BIN_2 +223 0x0405 //RX_FDEQ_BIN_3 +224 0x0607 //RX_FDEQ_BIN_4 +225 0x0809 //RX_FDEQ_BIN_5 +226 0x0A0B //RX_FDEQ_BIN_6 +227 0x0C0D //RX_FDEQ_BIN_7 +228 0x0E0F //RX_FDEQ_BIN_8 +229 0x1011 //RX_FDEQ_BIN_9 +230 0x1214 //RX_FDEQ_BIN_10 +231 0x1618 //RX_FDEQ_BIN_11 +232 0x1C1C //RX_FDEQ_BIN_12 +233 0x2020 //RX_FDEQ_BIN_13 +234 0x2020 //RX_FDEQ_BIN_14 +235 0x2011 //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x4000 //RX_FDEQ_RESRV_0 +245 0x0320 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0030 //RX_FDDRC_BAND_MARGIN_1 +248 0x0050 //RX_FDDRC_BAND_MARGIN_2 +249 0x0080 //RX_FDDRC_BAND_MARGIN_3 +250 0x0007 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x5000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x6400 //RX_FDDRC_THRD_3_2 +258 0x6400 //RX_FDDRC_THRD_3_3 +259 0x2000 //RX_FDDRC_SLANT_0_0 +260 0x2000 //RX_FDDRC_SLANT_0_1 +261 0x2000 //RX_FDDRC_SLANT_0_2 +262 0x2000 //RX_FDDRC_SLANT_0_3 +263 0x5333 //RX_FDDRC_SLANT_1_0 +264 0x5333 //RX_FDDRC_SLANT_1_1 +265 0x5333 //RX_FDDRC_SLANT_1_2 +266 0x5333 //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +286 0x0099 //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 +#VOL 6 +163 0x1000 //RX_TDDRC_ALPHA_UP_1 +164 0x1000 //RX_TDDRC_ALPHA_UP_2 +165 0x1000 //RX_TDDRC_ALPHA_UP_3 +166 0x1000 //RX_TDDRC_ALPHA_UP_4 +184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +190 0x7FFF //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +269 0x0000 //RX_TDDRC_THRD_0 +270 0x0000 //RX_TDDRC_THRD_1 +271 0x1200 //RX_TDDRC_THRD_2 +272 0x1900 //RX_TDDRC_THRD_3 +273 0x3000 //RX_TDDRC_SLANT_0 +274 0x6E00 //RX_TDDRC_SLANT_1 +275 0x1000 //RX_TDDRC_ALPHA_UP_0 +276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x199A //RX_TDDRC_HMNC_GAIN +279 0x0001 //RX_TDDRC_SMT_FLAG +280 0x0CCD //RX_TDDRC_SMT_W +281 0x0240 //RX_TDDRC_DRC_GAIN +195 0x0020 //RX_FDEQ_SUBNUM +196 0x4848 //RX_FDEQ_GAIN_0 +197 0x4848 //RX_FDEQ_GAIN_1 +198 0x4848 //RX_FDEQ_GAIN_2 +199 0x4848 //RX_FDEQ_GAIN_3 +200 0x4848 //RX_FDEQ_GAIN_4 +201 0x4848 //RX_FDEQ_GAIN_5 +202 0x4848 //RX_FDEQ_GAIN_6 +203 0x4848 //RX_FDEQ_GAIN_7 +204 0x4848 //RX_FDEQ_GAIN_8 +205 0x4848 //RX_FDEQ_GAIN_9 +206 0x4848 //RX_FDEQ_GAIN_10 +207 0x4848 //RX_FDEQ_GAIN_11 +208 0x4848 //RX_FDEQ_GAIN_12 +209 0x4848 //RX_FDEQ_GAIN_13 +210 0x4848 //RX_FDEQ_GAIN_14 +211 0x4848 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0202 //RX_FDEQ_BIN_0 +221 0x0203 //RX_FDEQ_BIN_1 +222 0x0304 //RX_FDEQ_BIN_2 +223 0x0405 //RX_FDEQ_BIN_3 +224 0x0607 //RX_FDEQ_BIN_4 +225 0x0809 //RX_FDEQ_BIN_5 +226 0x0A0B //RX_FDEQ_BIN_6 +227 0x0C0D //RX_FDEQ_BIN_7 +228 0x0E0F //RX_FDEQ_BIN_8 +229 0x1011 //RX_FDEQ_BIN_9 +230 0x1214 //RX_FDEQ_BIN_10 +231 0x1618 //RX_FDEQ_BIN_11 +232 0x1C1C //RX_FDEQ_BIN_12 +233 0x2020 //RX_FDEQ_BIN_13 +234 0x2020 //RX_FDEQ_BIN_14 +235 0x2011 //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x4000 //RX_FDEQ_RESRV_0 +245 0x0320 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0030 //RX_FDDRC_BAND_MARGIN_1 +248 0x0050 //RX_FDDRC_BAND_MARGIN_2 +249 0x0080 //RX_FDDRC_BAND_MARGIN_3 +250 0x0007 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x5000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x6400 //RX_FDDRC_THRD_3_2 +258 0x6400 //RX_FDDRC_THRD_3_3 +259 0x2000 //RX_FDDRC_SLANT_0_0 +260 0x2000 //RX_FDDRC_SLANT_0_1 +261 0x2000 //RX_FDDRC_SLANT_0_2 +262 0x2000 //RX_FDDRC_SLANT_0_3 +263 0x5333 //RX_FDDRC_SLANT_1_0 +264 0x5333 //RX_FDDRC_SLANT_1_1 +265 0x5333 //RX_FDDRC_SLANT_1_2 +266 0x5333 //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +286 0x0100 //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 #CASE_NAME HEADSET-TTY_HCO-VOICE_GENERIC-NB -#PARAM_MODE FULL -#PARAM_TYPE TX+RX -#TOTAL_CUSTOM_STEP 7 +#PARAM_MODE Full +#PARAM_TYPE TX+2RX +#TOTAL_CUSTOM_STEP 7+7 #TX 0 0x0001 //TX_OPERATION_MODE_0 1 0x0000 //TX_OPERATION_MODE_1 @@ -35330,7 +53650,7 @@ 239 0x0000 //TX_DT_RESRV_7 240 0x0000 //TX_DT_RESRV_8 241 0x0000 //TX_DT_RESRV_9 -242 0xF200 //TX_THR_SN_EST_0 +242 0xFA00 //TX_THR_SN_EST_0 243 0xF400 //TX_THR_SN_EST_1 244 0xF800 //TX_THR_SN_EST_2 245 0xF600 //TX_THR_SN_EST_3 @@ -35339,12 +53659,12 @@ 248 0xF800 //TX_THR_SN_EST_6 249 0xF800 //TX_THR_SN_EST_7 250 0x0100 //TX_DELTA_THR_SN_EST_0 -251 0x0000 //TX_DELTA_THR_SN_EST_1 +251 0x0100 //TX_DELTA_THR_SN_EST_1 252 0x0100 //TX_DELTA_THR_SN_EST_2 -253 0x0100 //TX_DELTA_THR_SN_EST_3 +253 0x0200 //TX_DELTA_THR_SN_EST_3 254 0x0200 //TX_DELTA_THR_SN_EST_4 255 0x0200 //TX_DELTA_THR_SN_EST_5 -256 0x0200 //TX_DELTA_THR_SN_EST_6 +256 0x0000 //TX_DELTA_THR_SN_EST_6 257 0x0200 //TX_DELTA_THR_SN_EST_7 258 0x4000 //TX_LAMBDA_NN_EST_0 259 0x4000 //TX_LAMBDA_NN_EST_1 @@ -35370,12 +53690,12 @@ 279 0x0000 //TX_B_POST_FLT_0 280 0x0000 //TX_B_POST_FLT_1 281 0x001A //TX_NS_LVL_CTRL_0 -282 0x001A //TX_NS_LVL_CTRL_1 +282 0x0014 //TX_NS_LVL_CTRL_1 283 0x0014 //TX_NS_LVL_CTRL_2 -284 0x0014 //TX_NS_LVL_CTRL_3 +284 0x000C //TX_NS_LVL_CTRL_3 285 0x000C //TX_NS_LVL_CTRL_4 286 0x000C //TX_NS_LVL_CTRL_5 -287 0x000C //TX_NS_LVL_CTRL_6 +287 0x001A //TX_NS_LVL_CTRL_6 288 0x000C //TX_NS_LVL_CTRL_7 289 0x000E //TX_MIN_GAIN_S_0 290 0x0014 //TX_MIN_GAIN_S_1 @@ -35391,10 +53711,10 @@ 300 0x7FFF //TX_SNRI_SUP_0 301 0x7FFF //TX_SNRI_SUP_1 302 0x7FFF //TX_SNRI_SUP_2 -303 0x7FFF //TX_SNRI_SUP_3 +303 0x4000 //TX_SNRI_SUP_3 304 0x4000 //TX_SNRI_SUP_4 305 0x4000 //TX_SNRI_SUP_5 -306 0x4000 //TX_SNRI_SUP_6 +306 0x7FFF //TX_SNRI_SUP_6 307 0x4000 //TX_SNRI_SUP_7 308 0x1200 //TX_THR_LFNS 309 0x0147 //TX_G_LFNS @@ -35403,12 +53723,12 @@ 312 0x7FFF //TX_A_POST_FILT_0 313 0x7FFF //TX_A_POST_FILT_1 314 0x4000 //TX_A_POST_FILT_S_0 -315 0x199A //TX_A_POST_FILT_S_1 +315 0x1000 //TX_A_POST_FILT_S_1 316 0x1000 //TX_A_POST_FILT_S_2 -317 0x1000 //TX_A_POST_FILT_S_3 +317 0x6666 //TX_A_POST_FILT_S_3 318 0x6666 //TX_A_POST_FILT_S_4 319 0x6666 //TX_A_POST_FILT_S_5 -320 0x6666 //TX_A_POST_FILT_S_6 +320 0x199A //TX_A_POST_FILT_S_6 321 0x6666 //TX_A_POST_FILT_S_7 322 0x2000 //TX_B_POST_FILT_0 323 0x2000 //TX_B_POST_FILT_1 @@ -35455,7 +53775,7 @@ 364 0x0000 //TX_K_APT 365 0x0001 //TX_NOISEDET 366 0x05A0 //TX_NDETCT -367 0x000A //TX_NOISE_TH_0 +367 0x003B //TX_NOISE_TH_0 368 0x1388 //TX_NOISE_TH_0_2 369 0x3A98 //TX_NOISE_TH_0_3 370 0x0C80 //TX_NOISE_TH_1 @@ -35467,11 +53787,11 @@ 376 0x7FFF //TX_NOISE_TH_5_3 377 0x7FFF //TX_NOISE_TH_5_4 378 0x00C8 //TX_NOISE_TH_6 -379 0x000A //TX_MINENOISE_TH -380 0x0000 //TX_MINENOISE_MIC0_TH_MTS -381 0x0000 //TX_MINENOISE_MIC0_TH_EXP -382 0x0000 //TX_MINENOISE_MIC0_S_TH_MTS -383 0x0000 //TX_MINENOISE_MIC0_S_TH_EXP +379 0x00C8 //TX_MINENOISE_TH +380 0xD508 //TX_MORENS_TFMASK_TH +381 0x0001 //TX_DRC_QUIET_FLOOR +382 0x3A98 //TX_RATIODTL_CUT_TH +383 0x0DAC //TX_DT_CUT_K1 384 0x6400 //TX_OUT_ENER_S_TH_CLEAN 385 0x6400 //TX_OUT_ENER_S_TH_LESSCLEAN 386 0x6400 //TX_OUT_ENER_S_TH_NOISY @@ -35479,22 +53799,22 @@ 388 0x7D00 //TX_OUT_ENER_TH_SPEECH 389 0x0000 //TX_SN_NPB_GAIN 390 0x0000 //TX_NN_NPB_GAIN -391 0x0000 //TX_CSX_ALPHA_0 -392 0x0000 //TX_CSX_ALPHA_1 -393 0x0000 //TX_CSX_ALPHA_2 -394 0x0000 //TX_CSX_ALPHA_3 -395 0x0000 //TX_MU_ARSP_EST -396 0x0000 //TX_P_OUTBEAM_MIN_TH +391 0x7FFF //TX_POST_MASK_SUP_HSNE +392 0x1388 //TX_TAIL_DET_TH +393 0x4000 //TX_B_LESSCUT_RTO_WTA +394 0x0000 //TX_MEL_G_R +395 0x0080 //TX_SUPHIGH_TH +396 0x0000 //TX_MASK_G_R 397 0x0000 //TX_EXTRA_NS_L -398 0x0000 //TX_EXTRA_NS_A -399 0x0000 //TX_VR_NOISE_FLOOR_TH +398 0x1800 //TX_C_POST_FLT_MASK +399 0x7FFF //TX_A_POST_FLT_WNS 400 0x0000 //TX_MIN_G_LOW300HZ 401 0x0010 //TX_MAXLEVEL_CNG 402 0x0000 //TX_STN_NOISE_TH 403 0x0000 //TX_POST_MASK_SUP 404 0x0000 //TX_POST_MASK_ADJUST 405 0x0014 //TX_NS_ENOISE_MIC0_TH -406 0x0014 //TX_MINENOISE_MIC0_TH +406 0x0032 //TX_MINENOISE_MIC0_TH 407 0x0226 //TX_MINENOISE_MIC0_S_TH 408 0x2879 //TX_MIN_G_CTRL_SSNS 409 0x0400 //TX_METAL_RTO_THR @@ -35602,16 +53922,16 @@ 511 0x6666 //TX_MIC_TO_BFGAIN 512 0x6666 //TX_MICTOBFGAIN0 513 0x0014 //TX_FASTMUE_TH -514 0x0000 //TX_DERVB_LEN_0 -515 0x0000 //TX_DERVB_LEN_1 -516 0x0000 //TX_RHO_DERVB -517 0x0000 //TX_MIC_INDX_DERVB -518 0x0000 //TX_MU_DERVB -519 0x0000 //TX_DR_RESRV_0 -520 0x0000 //TX_DR_RESRV_1 -521 0x0000 //TX_DR_RESRV_2 -522 0x0000 //TX_DR_RESRV_3 -523 0x0000 //TX_DR_RESRV_4 +514 0xC000 //TX_DEREVERB_LF_MU +515 0xC000 //TX_DEREVERB_HF_MU +516 0xCCCC //TX_DEREVERB_DELAY +517 0xD999 //TX_DEREVERB_COEF_LEN +518 0x1F40 //TX_DEREVERB_DNR +519 0x0000 //TX_DEREVERB_ALPHA +520 0x0000 //TX_DEREVERB_BETA +521 0x0000 //TX_GSC_RTOL_TH +522 0x7000 //TX_GSC_RTOH_TH +523 0x0064 //TX_WIDE2_MEANHTH 524 0x0000 //TX_DR_RESRV_5 525 0x0000 //TX_DR_RESRV_6 526 0x0000 //TX_DR_RESRV_7 @@ -35977,16 +54297,81 @@ 886 0x0000 //TX_FASTNS_TFMASKBIN_TH2 887 0x0000 //TX_FASTNS_TFMASKBIN_TH3 888 0x00C8 //TX_FASTNS_ARSPC_TH -889 0xD99A //TX_FASTNS_MASK5_TH +889 0xC000 //TX_FASTNS_MASK5_TH 890 0x051F //TX_POSTSSA_MIN_G_VR_MASK -891 0x7FFF //TX_A_LESSCUT_RTO_MASK +891 0x4000 //TX_A_LESSCUT_RTO_MASK 892 0x1770 //TX_FASTNS_NOISETH 893 0xC000 //TX_FASTNS_SSA_THLFL 894 0xC000 //TX_FASTNS_SSA_THHFL 895 0xCCCC //TX_FASTNS_SSA_THLFH 896 0xD999 //TX_FASTNS_SSA_THHFH +897 0x2339 //TX_SENDFUNC_REG_MICMUTE +898 0x0021 //TX_SENDFUNC_REG_MICMUTE1 +899 0x02BC //TX_MICMUTE_RATIO_THR +900 0x0140 //TX_MICMUTE_AMP_THR +901 0x0004 //TX_MICMUTE_HPF_IND +902 0x00C0 //TX_MICMUTE_LOG_EYR_TH +903 0x0008 //TX_MICMUTE_CVG_TIME +904 0x0008 //TX_MICMUTE_RELEASE_TIME +905 0x01FE //TX_MIC_VOLUME_MIC0MUTE +906 0x0020 //TX_MICMUTE_EPD_OFFSET_0 +907 0x001E //TX_MICMUTE_FRQ_AEC_L +908 0x7999 //TX_MICMUTE_EAD_THR +909 0x7FFF //TX_MICMUTE_LAMBDA_CB_NLE +910 0x7FFF //TX_MICMUTE_LAMBDA_RE_EST +911 0x4000 //TX_DTD_THR1_MICMUTE_0 +912 0x7000 //TX_DTD_THR1_MICMUTE_1 +913 0x7FFF //TX_DTD_THR1_MICMUTE_2 +914 0x7FFF //TX_DTD_THR1_MICMUTE_3 +915 0x6CCC //TX_DTD_THR2_MICMUTE_0 +916 0x0400 //TX_MICMUTE_MIN_EQ_RE_EST_0 +917 0x0400 //TX_MICMUTE_MIN_EQ_RE_EST_1 +918 0x1000 //TX_MICMUTE_MIN_EQ_RE_EST_2 +919 0x7FFF //TX_MICMUTE_MIN_EQ_RE_EST_3 +920 0x7FFF //TX_MICMUTE_MIN_EQ_RE_EST_4 +921 0x4000 //TX_MICMUTE_C_POST_FLT +922 0x03E8 //TX_MICMUTE_DT_CUT_K +923 0x0001 //TX_MICMUTE_DT_CUT_THR +924 0x03E8 //TX_MICMUTE_DT_CUT_K2 +925 0x0001 //TX_MICMUTE_DT_CUT_THR2 +926 0x0064 //TX_MICMUTE_DT2_HOLD_N +927 0x1000 //TX_MICMUTE_RATIODTH_THCUT +928 0x1000 //TX_MICMUTE_B_POST_FLT_ECHOL +929 0x7FFF //TX_MICMUTE_B_POST_FLT_ECHOH +930 0x0400 //TX_MICMUTE_C_POST_FLT_MASK +931 0x7999 //TX_MICMUTE_RATIODTL_CUT_TH +932 0x0258 //TX_MICMUTE_DT_CUT_K1 +933 0x0800 //TX_MICMUTE_N2_SN_EST +934 0xFC00 //TX_MICMUTE_THR_SN_EST_0 +935 0x001C //TX_MICMUTE_MIN_G_CTRL_0 +936 0x6000 //TX_MICMUTE_A_POST_FILT_S_0 +937 0x7000 //TX_MICMUTE_B_POST_FILT_0 +938 0x2710 //TX_MIC1RUB_AMP_THR +939 0x0010 //TX_MIC1MUTE_RATIO_THR +940 0x0450 //TX_MIC1MUTE_AMP_THR +941 0x0008 //TX_MIC1MUTE_CVG_TIME +942 0x0008 //TX_MIC1MUTE_RELEASE_TIME +943 0x0000 //TX_AMS_RESRV_01 +944 0x0000 //TX_AMS_RESRV_02 +945 0x0000 //TX_AMS_RESRV_03 +946 0x0000 //TX_AMS_RESRV_04 +947 0x0000 //TX_AMS_RESRV_05 +948 0x0000 //TX_AMS_RESRV_06 +949 0x0000 //TX_AMS_RESRV_07 +950 0x0000 //TX_AMS_RESRV_08 +951 0x0000 //TX_AMS_RESRV_09 +952 0x0000 //TX_AMS_RESRV_10 +953 0x0000 //TX_AMS_RESRV_11 +954 0x0000 //TX_AMS_RESRV_12 +955 0x0000 //TX_AMS_RESRV_13 +956 0x0000 //TX_AMS_RESRV_14 +957 0x0000 //TX_AMS_RESRV_15 +958 0x0000 //TX_AMS_RESRV_16 +959 0x0000 //TX_AMS_RESRV_17 +960 0x0000 //TX_AMS_RESRV_18 +961 0x0000 //TX_AMS_RESRV_19 #RX -0 0x027C //RX_RECVFUNC_MODE_0 +0 0x243C //RX_RECVFUNC_MODE_0 1 0x0000 //RX_RECVFUNC_MODE_1 2 0x0000 //RX_SAMPLINGFREQ_SIG 3 0x0000 //RX_SAMPLINGFREQ_PROC @@ -35996,8 +54381,8 @@ 7 0x1000 //RX_TDDRC_ALPHA_UP_2 8 0x1000 //RX_TDDRC_ALPHA_UP_3 9 0x1000 //RX_TDDRC_ALPHA_UP_4 -10 0x0800 //RX_PGA -11 0x7652 //RX_A_HP +10 0x0403 //RX_PGA +11 0x7646 //RX_A_HP 12 0x4000 //RX_B_PE 13 0x7800 //RX_THR_PITCH_DET_0 14 0x7000 //RX_THR_PITCH_DET_1 @@ -36026,12 +54411,12 @@ 37 0x4000 //RX_LMT_ALPHA 38 0x0014 //RX_FDEQ_SUBNUM 39 0x8080 //RX_FDEQ_GAIN_0 -40 0x8058 //RX_FDEQ_GAIN_1 -41 0x5454 //RX_FDEQ_GAIN_2 -42 0x545C //RX_FDEQ_GAIN_3 -43 0x6448 //RX_FDEQ_GAIN_4 +40 0x8054 //RX_FDEQ_GAIN_1 +41 0x5050 //RX_FDEQ_GAIN_2 +42 0x5058 //RX_FDEQ_GAIN_3 +43 0x5C70 //RX_FDEQ_GAIN_4 44 0x4848 //RX_FDEQ_GAIN_5 -45 0x5848 //RX_FDEQ_GAIN_6 +45 0x484C //RX_FDEQ_GAIN_6 46 0x4848 //RX_FDEQ_GAIN_7 47 0x485A //RX_FDEQ_GAIN_8 48 0x5A58 //RX_FDEQ_GAIN_9 @@ -36053,8 +54438,8 @@ 64 0x0203 //RX_FDEQ_BIN_1 65 0x0303 //RX_FDEQ_BIN_2 66 0x0304 //RX_FDEQ_BIN_3 -67 0x0405 //RX_FDEQ_BIN_4 -68 0x0506 //RX_FDEQ_BIN_5 +67 0x0604 //RX_FDEQ_BIN_4 +68 0x0406 //RX_FDEQ_BIN_5 69 0x0708 //RX_FDEQ_BIN_6 70 0x090A //RX_FDEQ_BIN_7 71 0x0B0C //RX_FDEQ_BIN_8 @@ -36110,12 +54495,12 @@ 121 0x199A //RX_TDDRC_HMNC_GAIN 122 0x0001 //RX_TDDRC_SMT_FLAG 123 0x0CCD //RX_TDDRC_SMT_W -124 0x0700 //RX_TDDRC_DRC_GAIN +124 0x0780 //RX_TDDRC_DRC_GAIN 125 0x7C00 //RX_LAMBDA_PKA_FP -126 0x2000 //RX_TPKA_FP -127 0x2000 //RX_MIN_G_FP -128 0x0080 //RX_MAX_G_FP -129 0x0016 //RX_SPK_VOL +126 0x1194 //RX_TPKA_FP +127 0x0400 //RX_MIN_G_FP +128 0x0800 //RX_MAX_G_FP +129 0x0015 //RX_SPK_VOL 130 0x0000 //RX_VOL_RESRV_0 131 0x0000 //RX_MAXLEVEL_CNG 132 0x3000 //RX_BWE_UV_TH @@ -36156,8 +54541,8 @@ 34 0x0800 //RX_TDDRC_LIMITER_GAIN 112 0x0002 //RX_TDDRC_THRD_0 113 0x0004 //RX_TDDRC_THRD_1 -114 0x1A00 //RX_TDDRC_THRD_2 -115 0x1A00 //RX_TDDRC_THRD_3 +114 0x1800 //RX_TDDRC_THRD_2 +115 0x1800 //RX_TDDRC_THRD_3 116 0x7FFF //RX_TDDRC_SLANT_0 117 0x7FFF //RX_TDDRC_SLANT_1 118 0x1000 //RX_TDDRC_ALPHA_UP_0 @@ -36166,18 +54551,18 @@ 121 0x199A //RX_TDDRC_HMNC_GAIN 122 0x0001 //RX_TDDRC_SMT_FLAG 123 0x0CCD //RX_TDDRC_SMT_W -124 0x0700 //RX_TDDRC_DRC_GAIN +124 0x0780 //RX_TDDRC_DRC_GAIN 38 0x0014 //RX_FDEQ_SUBNUM 39 0x8080 //RX_FDEQ_GAIN_0 -40 0x8058 //RX_FDEQ_GAIN_1 -41 0x5454 //RX_FDEQ_GAIN_2 -42 0x545C //RX_FDEQ_GAIN_3 -43 0x6448 //RX_FDEQ_GAIN_4 -44 0x4848 //RX_FDEQ_GAIN_5 -45 0x5848 //RX_FDEQ_GAIN_6 -46 0x4848 //RX_FDEQ_GAIN_7 -47 0x485A //RX_FDEQ_GAIN_8 -48 0x5A58 //RX_FDEQ_GAIN_9 +40 0x8050 //RX_FDEQ_GAIN_1 +41 0x4840 //RX_FDEQ_GAIN_2 +42 0x4040 //RX_FDEQ_GAIN_3 +43 0x4C68 //RX_FDEQ_GAIN_4 +44 0x403C //RX_FDEQ_GAIN_5 +45 0x3C38 //RX_FDEQ_GAIN_6 +46 0x3430 //RX_FDEQ_GAIN_7 +47 0x303C //RX_FDEQ_GAIN_8 +48 0x4C50 //RX_FDEQ_GAIN_9 49 0x4848 //RX_FDEQ_GAIN_10 50 0x4848 //RX_FDEQ_GAIN_11 51 0x4848 //RX_FDEQ_GAIN_12 @@ -36196,8 +54581,8 @@ 64 0x0203 //RX_FDEQ_BIN_1 65 0x0303 //RX_FDEQ_BIN_2 66 0x0304 //RX_FDEQ_BIN_3 -67 0x0405 //RX_FDEQ_BIN_4 -68 0x0506 //RX_FDEQ_BIN_5 +67 0x0703 //RX_FDEQ_BIN_4 +68 0x0406 //RX_FDEQ_BIN_5 69 0x0708 //RX_FDEQ_BIN_6 70 0x090A //RX_FDEQ_BIN_7 71 0x0B0C //RX_FDEQ_BIN_8 @@ -36240,7 +54625,7 @@ 108 0x7FFF //RX_FDDRC_SLANT_1_2 109 0x7FFF //RX_FDDRC_SLANT_1_3 110 0x0000 //RX_FDDRC_RESRV_0 -129 0x0016 //RX_SPK_VOL +129 0x0012 //RX_SPK_VOL 130 0x0000 //RX_VOL_RESRV_0 #VOL 1 6 0x1000 //RX_TDDRC_ALPHA_UP_1 @@ -36255,8 +54640,8 @@ 34 0x0800 //RX_TDDRC_LIMITER_GAIN 112 0x0002 //RX_TDDRC_THRD_0 113 0x0004 //RX_TDDRC_THRD_1 -114 0x1A00 //RX_TDDRC_THRD_2 -115 0x1A00 //RX_TDDRC_THRD_3 +114 0x1800 //RX_TDDRC_THRD_2 +115 0x1800 //RX_TDDRC_THRD_3 116 0x7FFF //RX_TDDRC_SLANT_0 117 0x7FFF //RX_TDDRC_SLANT_1 118 0x1000 //RX_TDDRC_ALPHA_UP_0 @@ -36265,18 +54650,18 @@ 121 0x199A //RX_TDDRC_HMNC_GAIN 122 0x0001 //RX_TDDRC_SMT_FLAG 123 0x0CCD //RX_TDDRC_SMT_W -124 0x0700 //RX_TDDRC_DRC_GAIN +124 0x0780 //RX_TDDRC_DRC_GAIN 38 0x0014 //RX_FDEQ_SUBNUM 39 0x8080 //RX_FDEQ_GAIN_0 -40 0x8058 //RX_FDEQ_GAIN_1 -41 0x5454 //RX_FDEQ_GAIN_2 -42 0x545C //RX_FDEQ_GAIN_3 -43 0x6448 //RX_FDEQ_GAIN_4 -44 0x4848 //RX_FDEQ_GAIN_5 -45 0x5848 //RX_FDEQ_GAIN_6 -46 0x4848 //RX_FDEQ_GAIN_7 -47 0x485A //RX_FDEQ_GAIN_8 -48 0x5A58 //RX_FDEQ_GAIN_9 +40 0x8050 //RX_FDEQ_GAIN_1 +41 0x4840 //RX_FDEQ_GAIN_2 +42 0x4040 //RX_FDEQ_GAIN_3 +43 0x4C68 //RX_FDEQ_GAIN_4 +44 0x403C //RX_FDEQ_GAIN_5 +45 0x3C38 //RX_FDEQ_GAIN_6 +46 0x3430 //RX_FDEQ_GAIN_7 +47 0x303C //RX_FDEQ_GAIN_8 +48 0x4C50 //RX_FDEQ_GAIN_9 49 0x4848 //RX_FDEQ_GAIN_10 50 0x4848 //RX_FDEQ_GAIN_11 51 0x4848 //RX_FDEQ_GAIN_12 @@ -36295,8 +54680,8 @@ 64 0x0203 //RX_FDEQ_BIN_1 65 0x0303 //RX_FDEQ_BIN_2 66 0x0304 //RX_FDEQ_BIN_3 -67 0x0405 //RX_FDEQ_BIN_4 -68 0x0506 //RX_FDEQ_BIN_5 +67 0x0703 //RX_FDEQ_BIN_4 +68 0x0406 //RX_FDEQ_BIN_5 69 0x0708 //RX_FDEQ_BIN_6 70 0x090A //RX_FDEQ_BIN_7 71 0x0B0C //RX_FDEQ_BIN_8 @@ -36339,7 +54724,7 @@ 108 0x7FFF //RX_FDDRC_SLANT_1_2 109 0x7FFF //RX_FDDRC_SLANT_1_3 110 0x0000 //RX_FDDRC_RESRV_0 -129 0x0020 //RX_SPK_VOL +129 0x001B //RX_SPK_VOL 130 0x0000 //RX_VOL_RESRV_0 #VOL 2 6 0x1000 //RX_TDDRC_ALPHA_UP_1 @@ -36354,8 +54739,8 @@ 34 0x0800 //RX_TDDRC_LIMITER_GAIN 112 0x0002 //RX_TDDRC_THRD_0 113 0x0004 //RX_TDDRC_THRD_1 -114 0x1A00 //RX_TDDRC_THRD_2 -115 0x1A00 //RX_TDDRC_THRD_3 +114 0x1800 //RX_TDDRC_THRD_2 +115 0x1800 //RX_TDDRC_THRD_3 116 0x7FFF //RX_TDDRC_SLANT_0 117 0x7FFF //RX_TDDRC_SLANT_1 118 0x1000 //RX_TDDRC_ALPHA_UP_0 @@ -36364,18 +54749,18 @@ 121 0x199A //RX_TDDRC_HMNC_GAIN 122 0x0001 //RX_TDDRC_SMT_FLAG 123 0x0CCD //RX_TDDRC_SMT_W -124 0x0700 //RX_TDDRC_DRC_GAIN +124 0x0780 //RX_TDDRC_DRC_GAIN 38 0x0014 //RX_FDEQ_SUBNUM 39 0x8080 //RX_FDEQ_GAIN_0 -40 0x8058 //RX_FDEQ_GAIN_1 -41 0x5454 //RX_FDEQ_GAIN_2 -42 0x545C //RX_FDEQ_GAIN_3 -43 0x6448 //RX_FDEQ_GAIN_4 -44 0x4848 //RX_FDEQ_GAIN_5 -45 0x5848 //RX_FDEQ_GAIN_6 -46 0x4848 //RX_FDEQ_GAIN_7 -47 0x485A //RX_FDEQ_GAIN_8 -48 0x5A58 //RX_FDEQ_GAIN_9 +40 0x8050 //RX_FDEQ_GAIN_1 +41 0x4840 //RX_FDEQ_GAIN_2 +42 0x4040 //RX_FDEQ_GAIN_3 +43 0x4C68 //RX_FDEQ_GAIN_4 +44 0x403C //RX_FDEQ_GAIN_5 +45 0x3C38 //RX_FDEQ_GAIN_6 +46 0x3430 //RX_FDEQ_GAIN_7 +47 0x303C //RX_FDEQ_GAIN_8 +48 0x4C50 //RX_FDEQ_GAIN_9 49 0x4848 //RX_FDEQ_GAIN_10 50 0x4848 //RX_FDEQ_GAIN_11 51 0x4848 //RX_FDEQ_GAIN_12 @@ -36394,8 +54779,8 @@ 64 0x0203 //RX_FDEQ_BIN_1 65 0x0303 //RX_FDEQ_BIN_2 66 0x0304 //RX_FDEQ_BIN_3 -67 0x0405 //RX_FDEQ_BIN_4 -68 0x0506 //RX_FDEQ_BIN_5 +67 0x0703 //RX_FDEQ_BIN_4 +68 0x0406 //RX_FDEQ_BIN_5 69 0x0708 //RX_FDEQ_BIN_6 70 0x090A //RX_FDEQ_BIN_7 71 0x0B0C //RX_FDEQ_BIN_8 @@ -36438,7 +54823,7 @@ 108 0x7FFF //RX_FDDRC_SLANT_1_2 109 0x7FFF //RX_FDDRC_SLANT_1_3 110 0x0000 //RX_FDDRC_RESRV_0 -129 0x002E //RX_SPK_VOL +129 0x0026 //RX_SPK_VOL 130 0x0000 //RX_VOL_RESRV_0 #VOL 3 6 0x1000 //RX_TDDRC_ALPHA_UP_1 @@ -36453,8 +54838,8 @@ 34 0x0800 //RX_TDDRC_LIMITER_GAIN 112 0x0002 //RX_TDDRC_THRD_0 113 0x0004 //RX_TDDRC_THRD_1 -114 0x1A00 //RX_TDDRC_THRD_2 -115 0x1A00 //RX_TDDRC_THRD_3 +114 0x1800 //RX_TDDRC_THRD_2 +115 0x1800 //RX_TDDRC_THRD_3 116 0x7FFF //RX_TDDRC_SLANT_0 117 0x7FFF //RX_TDDRC_SLANT_1 118 0x1000 //RX_TDDRC_ALPHA_UP_0 @@ -36463,18 +54848,18 @@ 121 0x199A //RX_TDDRC_HMNC_GAIN 122 0x0001 //RX_TDDRC_SMT_FLAG 123 0x0CCD //RX_TDDRC_SMT_W -124 0x0700 //RX_TDDRC_DRC_GAIN +124 0x0780 //RX_TDDRC_DRC_GAIN 38 0x0014 //RX_FDEQ_SUBNUM 39 0x8080 //RX_FDEQ_GAIN_0 -40 0x8058 //RX_FDEQ_GAIN_1 -41 0x5454 //RX_FDEQ_GAIN_2 -42 0x545C //RX_FDEQ_GAIN_3 -43 0x6448 //RX_FDEQ_GAIN_4 -44 0x4848 //RX_FDEQ_GAIN_5 -45 0x5848 //RX_FDEQ_GAIN_6 -46 0x4848 //RX_FDEQ_GAIN_7 -47 0x485A //RX_FDEQ_GAIN_8 -48 0x5A58 //RX_FDEQ_GAIN_9 +40 0x8050 //RX_FDEQ_GAIN_1 +41 0x4840 //RX_FDEQ_GAIN_2 +42 0x4040 //RX_FDEQ_GAIN_3 +43 0x4C68 //RX_FDEQ_GAIN_4 +44 0x403C //RX_FDEQ_GAIN_5 +45 0x3C38 //RX_FDEQ_GAIN_6 +46 0x3430 //RX_FDEQ_GAIN_7 +47 0x303C //RX_FDEQ_GAIN_8 +48 0x4C50 //RX_FDEQ_GAIN_9 49 0x4848 //RX_FDEQ_GAIN_10 50 0x4848 //RX_FDEQ_GAIN_11 51 0x4848 //RX_FDEQ_GAIN_12 @@ -36493,8 +54878,8 @@ 64 0x0203 //RX_FDEQ_BIN_1 65 0x0303 //RX_FDEQ_BIN_2 66 0x0304 //RX_FDEQ_BIN_3 -67 0x0405 //RX_FDEQ_BIN_4 -68 0x0506 //RX_FDEQ_BIN_5 +67 0x0703 //RX_FDEQ_BIN_4 +68 0x0406 //RX_FDEQ_BIN_5 69 0x0708 //RX_FDEQ_BIN_6 70 0x090A //RX_FDEQ_BIN_7 71 0x0B0C //RX_FDEQ_BIN_8 @@ -36537,7 +54922,7 @@ 108 0x7FFF //RX_FDDRC_SLANT_1_2 109 0x7FFF //RX_FDDRC_SLANT_1_3 110 0x0000 //RX_FDDRC_RESRV_0 -129 0x0041 //RX_SPK_VOL +129 0x0037 //RX_SPK_VOL 130 0x0000 //RX_VOL_RESRV_0 #VOL 4 6 0x1000 //RX_TDDRC_ALPHA_UP_1 @@ -36552,8 +54937,8 @@ 34 0x0800 //RX_TDDRC_LIMITER_GAIN 112 0x0002 //RX_TDDRC_THRD_0 113 0x0004 //RX_TDDRC_THRD_1 -114 0x1A00 //RX_TDDRC_THRD_2 -115 0x1A00 //RX_TDDRC_THRD_3 +114 0x1800 //RX_TDDRC_THRD_2 +115 0x1800 //RX_TDDRC_THRD_3 116 0x7FFF //RX_TDDRC_SLANT_0 117 0x7FFF //RX_TDDRC_SLANT_1 118 0x1000 //RX_TDDRC_ALPHA_UP_0 @@ -36562,18 +54947,18 @@ 121 0x199A //RX_TDDRC_HMNC_GAIN 122 0x0001 //RX_TDDRC_SMT_FLAG 123 0x0CCD //RX_TDDRC_SMT_W -124 0x0700 //RX_TDDRC_DRC_GAIN +124 0x0D56 //RX_TDDRC_DRC_GAIN 38 0x0014 //RX_FDEQ_SUBNUM 39 0x8080 //RX_FDEQ_GAIN_0 -40 0x8058 //RX_FDEQ_GAIN_1 -41 0x5454 //RX_FDEQ_GAIN_2 -42 0x545C //RX_FDEQ_GAIN_3 -43 0x6448 //RX_FDEQ_GAIN_4 -44 0x4848 //RX_FDEQ_GAIN_5 -45 0x5848 //RX_FDEQ_GAIN_6 -46 0x4848 //RX_FDEQ_GAIN_7 -47 0x485A //RX_FDEQ_GAIN_8 -48 0x5A58 //RX_FDEQ_GAIN_9 +40 0x8050 //RX_FDEQ_GAIN_1 +41 0x4840 //RX_FDEQ_GAIN_2 +42 0x4040 //RX_FDEQ_GAIN_3 +43 0x4470 //RX_FDEQ_GAIN_4 +44 0x383C //RX_FDEQ_GAIN_5 +45 0x3C3C //RX_FDEQ_GAIN_6 +46 0x3434 //RX_FDEQ_GAIN_7 +47 0x344C //RX_FDEQ_GAIN_8 +48 0x585C //RX_FDEQ_GAIN_9 49 0x4848 //RX_FDEQ_GAIN_10 50 0x4848 //RX_FDEQ_GAIN_11 51 0x4848 //RX_FDEQ_GAIN_12 @@ -36592,8 +54977,8 @@ 64 0x0203 //RX_FDEQ_BIN_1 65 0x0303 //RX_FDEQ_BIN_2 66 0x0304 //RX_FDEQ_BIN_3 -67 0x0405 //RX_FDEQ_BIN_4 -68 0x0506 //RX_FDEQ_BIN_5 +67 0x0703 //RX_FDEQ_BIN_4 +68 0x0406 //RX_FDEQ_BIN_5 69 0x0708 //RX_FDEQ_BIN_6 70 0x090A //RX_FDEQ_BIN_7 71 0x0B0C //RX_FDEQ_BIN_8 @@ -36636,7 +55021,7 @@ 108 0x7FFF //RX_FDDRC_SLANT_1_2 109 0x7FFF //RX_FDDRC_SLANT_1_3 110 0x0000 //RX_FDDRC_RESRV_0 -129 0x005C //RX_SPK_VOL +129 0x002C //RX_SPK_VOL 130 0x0000 //RX_VOL_RESRV_0 #VOL 5 6 0x1000 //RX_TDDRC_ALPHA_UP_1 @@ -36651,8 +55036,8 @@ 34 0x0800 //RX_TDDRC_LIMITER_GAIN 112 0x0002 //RX_TDDRC_THRD_0 113 0x0004 //RX_TDDRC_THRD_1 -114 0x1A00 //RX_TDDRC_THRD_2 -115 0x1A00 //RX_TDDRC_THRD_3 +114 0x1800 //RX_TDDRC_THRD_2 +115 0x1800 //RX_TDDRC_THRD_3 116 0x7FFF //RX_TDDRC_SLANT_0 117 0x7FFF //RX_TDDRC_SLANT_1 118 0x1000 //RX_TDDRC_ALPHA_UP_0 @@ -36661,18 +55046,18 @@ 121 0x199A //RX_TDDRC_HMNC_GAIN 122 0x0001 //RX_TDDRC_SMT_FLAG 123 0x0CCD //RX_TDDRC_SMT_W -124 0x0700 //RX_TDDRC_DRC_GAIN +124 0x0D56 //RX_TDDRC_DRC_GAIN 38 0x0014 //RX_FDEQ_SUBNUM 39 0x8080 //RX_FDEQ_GAIN_0 -40 0x8058 //RX_FDEQ_GAIN_1 -41 0x5454 //RX_FDEQ_GAIN_2 -42 0x545C //RX_FDEQ_GAIN_3 -43 0x6448 //RX_FDEQ_GAIN_4 -44 0x4848 //RX_FDEQ_GAIN_5 -45 0x5848 //RX_FDEQ_GAIN_6 -46 0x4848 //RX_FDEQ_GAIN_7 -47 0x485A //RX_FDEQ_GAIN_8 -48 0x5A58 //RX_FDEQ_GAIN_9 +40 0x8050 //RX_FDEQ_GAIN_1 +41 0x4840 //RX_FDEQ_GAIN_2 +42 0x4040 //RX_FDEQ_GAIN_3 +43 0x4470 //RX_FDEQ_GAIN_4 +44 0x383C //RX_FDEQ_GAIN_5 +45 0x3C3C //RX_FDEQ_GAIN_6 +46 0x3434 //RX_FDEQ_GAIN_7 +47 0x344C //RX_FDEQ_GAIN_8 +48 0x585C //RX_FDEQ_GAIN_9 49 0x4848 //RX_FDEQ_GAIN_10 50 0x4848 //RX_FDEQ_GAIN_11 51 0x4848 //RX_FDEQ_GAIN_12 @@ -36691,8 +55076,8 @@ 64 0x0203 //RX_FDEQ_BIN_1 65 0x0303 //RX_FDEQ_BIN_2 66 0x0304 //RX_FDEQ_BIN_3 -67 0x0405 //RX_FDEQ_BIN_4 -68 0x0506 //RX_FDEQ_BIN_5 +67 0x0703 //RX_FDEQ_BIN_4 +68 0x0406 //RX_FDEQ_BIN_5 69 0x0708 //RX_FDEQ_BIN_6 70 0x090A //RX_FDEQ_BIN_7 71 0x0B0C //RX_FDEQ_BIN_8 @@ -36735,7 +55120,7 @@ 108 0x7FFF //RX_FDDRC_SLANT_1_2 109 0x7FFF //RX_FDDRC_SLANT_1_3 110 0x0000 //RX_FDDRC_RESRV_0 -129 0x008A //RX_SPK_VOL +129 0x0051 //RX_SPK_VOL 130 0x0000 //RX_VOL_RESRV_0 #VOL 6 6 0x1000 //RX_TDDRC_ALPHA_UP_1 @@ -36750,8 +55135,8 @@ 34 0x0800 //RX_TDDRC_LIMITER_GAIN 112 0x0002 //RX_TDDRC_THRD_0 113 0x0004 //RX_TDDRC_THRD_1 -114 0x1A00 //RX_TDDRC_THRD_2 -115 0x1A00 //RX_TDDRC_THRD_3 +114 0x1800 //RX_TDDRC_THRD_2 +115 0x1800 //RX_TDDRC_THRD_3 116 0x7FFF //RX_TDDRC_SLANT_0 117 0x7FFF //RX_TDDRC_SLANT_1 118 0x1000 //RX_TDDRC_ALPHA_UP_0 @@ -36760,18 +55145,18 @@ 121 0x199A //RX_TDDRC_HMNC_GAIN 122 0x0001 //RX_TDDRC_SMT_FLAG 123 0x0CCD //RX_TDDRC_SMT_W -124 0x0700 //RX_TDDRC_DRC_GAIN +124 0x0D56 //RX_TDDRC_DRC_GAIN 38 0x0014 //RX_FDEQ_SUBNUM 39 0x8080 //RX_FDEQ_GAIN_0 -40 0x8058 //RX_FDEQ_GAIN_1 -41 0x5454 //RX_FDEQ_GAIN_2 -42 0x545C //RX_FDEQ_GAIN_3 -43 0x6448 //RX_FDEQ_GAIN_4 -44 0x4848 //RX_FDEQ_GAIN_5 -45 0x5848 //RX_FDEQ_GAIN_6 -46 0x4848 //RX_FDEQ_GAIN_7 -47 0x485A //RX_FDEQ_GAIN_8 -48 0x5A58 //RX_FDEQ_GAIN_9 +40 0x8050 //RX_FDEQ_GAIN_1 +41 0x4840 //RX_FDEQ_GAIN_2 +42 0x4040 //RX_FDEQ_GAIN_3 +43 0x4470 //RX_FDEQ_GAIN_4 +44 0x383C //RX_FDEQ_GAIN_5 +45 0x3C3C //RX_FDEQ_GAIN_6 +46 0x3434 //RX_FDEQ_GAIN_7 +47 0x344C //RX_FDEQ_GAIN_8 +48 0x585C //RX_FDEQ_GAIN_9 49 0x4848 //RX_FDEQ_GAIN_10 50 0x4848 //RX_FDEQ_GAIN_11 51 0x4848 //RX_FDEQ_GAIN_12 @@ -36790,8 +55175,8 @@ 64 0x0203 //RX_FDEQ_BIN_1 65 0x0303 //RX_FDEQ_BIN_2 66 0x0304 //RX_FDEQ_BIN_3 -67 0x0405 //RX_FDEQ_BIN_4 -68 0x0506 //RX_FDEQ_BIN_5 +67 0x0703 //RX_FDEQ_BIN_4 +68 0x0406 //RX_FDEQ_BIN_5 69 0x0708 //RX_FDEQ_BIN_6 70 0x090A //RX_FDEQ_BIN_7 71 0x0B0C //RX_FDEQ_BIN_8 @@ -36836,11 +55221,862 @@ 110 0x0000 //RX_FDDRC_RESRV_0 129 0x0100 //RX_SPK_VOL 130 0x0000 //RX_VOL_RESRV_0 +#RX 2 +157 0x243C //RX_RECVFUNC_MODE_0 +158 0x0000 //RX_RECVFUNC_MODE_1 +159 0x0000 //RX_SAMPLINGFREQ_SIG +160 0x0000 //RX_SAMPLINGFREQ_PROC +161 0x000A //RX_FRAME_SZ +162 0x0000 //RX_DELAY_OPT +163 0x1000 //RX_TDDRC_ALPHA_UP_1 +164 0x1000 //RX_TDDRC_ALPHA_UP_2 +165 0x1000 //RX_TDDRC_ALPHA_UP_3 +166 0x1000 //RX_TDDRC_ALPHA_UP_4 +167 0x0403 //RX_PGA +168 0x7646 //RX_A_HP +169 0x4000 //RX_B_PE +170 0x7800 //RX_THR_PITCH_DET_0 +171 0x7000 //RX_THR_PITCH_DET_1 +172 0x6000 //RX_THR_PITCH_DET_2 +173 0x0008 //RX_PITCH_BFR_LEN +174 0x0003 //RX_SBD_PITCH_DET +175 0x0100 //RX_PP_RESRV_0 +176 0x0020 //RX_PP_RESRV_1 +177 0x0400 //RX_N_SN_EST +178 0x000C //RX_N2_SN_EST +179 0x0010 //RX_NS_LVL_CTRL +180 0xF800 //RX_THR_SN_EST +181 0x7E00 //RX_LAMBDA_PFILT +182 0x000A //RX_FENS_RESRV_0 +183 0x0190 //RX_FENS_RESRV_1 +184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +185 0x4000 //RX_TDDRC_ALPHA_DWN_2 +186 0x4000 //RX_TDDRC_ALPHA_DWN_3 +187 0x0002 //RX_EXTRA_NS_L +188 0x0800 //RX_EXTRA_NS_A +189 0x4000 //RX_TDDRC_ALPHA_DWN_4 +190 0x7214 //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +192 0x199A //RX_A_POST_FLT +193 0x0000 //RX_LMT_THRD +194 0x4000 //RX_LMT_ALPHA +195 0x0014 //RX_FDEQ_SUBNUM +196 0x8080 //RX_FDEQ_GAIN_0 +197 0x8054 //RX_FDEQ_GAIN_1 +198 0x5050 //RX_FDEQ_GAIN_2 +199 0x5058 //RX_FDEQ_GAIN_3 +200 0x5C70 //RX_FDEQ_GAIN_4 +201 0x4848 //RX_FDEQ_GAIN_5 +202 0x484C //RX_FDEQ_GAIN_6 +203 0x4848 //RX_FDEQ_GAIN_7 +204 0x485A //RX_FDEQ_GAIN_8 +205 0x5A58 //RX_FDEQ_GAIN_9 +206 0x4848 //RX_FDEQ_GAIN_10 +207 0x4848 //RX_FDEQ_GAIN_11 +208 0x4848 //RX_FDEQ_GAIN_12 +209 0x4848 //RX_FDEQ_GAIN_13 +210 0x4848 //RX_FDEQ_GAIN_14 +211 0x4848 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0202 //RX_FDEQ_BIN_0 +221 0x0203 //RX_FDEQ_BIN_1 +222 0x0303 //RX_FDEQ_BIN_2 +223 0x0304 //RX_FDEQ_BIN_3 +224 0x0604 //RX_FDEQ_BIN_4 +225 0x0406 //RX_FDEQ_BIN_5 +226 0x0708 //RX_FDEQ_BIN_6 +227 0x090A //RX_FDEQ_BIN_7 +228 0x0B0C //RX_FDEQ_BIN_8 +229 0x0D08 //RX_FDEQ_BIN_9 +230 0x0000 //RX_FDEQ_BIN_10 +231 0x0000 //RX_FDEQ_BIN_11 +232 0x0000 //RX_FDEQ_BIN_12 +233 0x0000 //RX_FDEQ_BIN_13 +234 0x0000 //RX_FDEQ_BIN_14 +235 0x0000 //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x4000 //RX_FDEQ_RESRV_0 +245 0x0320 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0035 //RX_FDDRC_BAND_MARGIN_1 +248 0x0060 //RX_FDDRC_BAND_MARGIN_2 +249 0x0080 //RX_FDDRC_BAND_MARGIN_3 +250 0x0004 //RX_FDDRC_BLOCK_EXP +251 0x0600 //RX_FDDRC_THRD_2_0 +252 0x0600 //RX_FDDRC_THRD_2_1 +253 0x0600 //RX_FDDRC_THRD_2_2 +254 0x0600 //RX_FDDRC_THRD_2_3 +255 0x0800 //RX_FDDRC_THRD_3_0 +256 0x0800 //RX_FDDRC_THRD_3_1 +257 0x0800 //RX_FDDRC_THRD_3_2 +258 0x0800 //RX_FDDRC_THRD_3_3 +259 0x0000 //RX_FDDRC_SLANT_0_0 +260 0x0000 //RX_FDDRC_SLANT_0_1 +261 0x0000 //RX_FDDRC_SLANT_0_2 +262 0x0000 //RX_FDDRC_SLANT_0_3 +263 0x7FFF //RX_FDDRC_SLANT_1_0 +264 0x7FFF //RX_FDDRC_SLANT_1_1 +265 0x7FFF //RX_FDDRC_SLANT_1_2 +266 0x7FFF //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +268 0x0005 //RX_FILTINDX +269 0x0002 //RX_TDDRC_THRD_0 +270 0x0004 //RX_TDDRC_THRD_1 +271 0x1A00 //RX_TDDRC_THRD_2 +272 0x1A00 //RX_TDDRC_THRD_3 +273 0x7FFF //RX_TDDRC_SLANT_0 +274 0x7FFF //RX_TDDRC_SLANT_1 +275 0x1000 //RX_TDDRC_ALPHA_UP_0 +276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x199A //RX_TDDRC_HMNC_GAIN +279 0x0001 //RX_TDDRC_SMT_FLAG +280 0x0CCD //RX_TDDRC_SMT_W +281 0x0780 //RX_TDDRC_DRC_GAIN +282 0x7C00 //RX_LAMBDA_PKA_FP +283 0x1194 //RX_TPKA_FP +284 0x0400 //RX_MIN_G_FP +285 0x0800 //RX_MAX_G_FP +286 0x0015 //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 +288 0x0000 //RX_MAXLEVEL_CNG +289 0x3000 //RX_BWE_UV_TH +290 0x3000 //RX_BWE_UV_TH2 +291 0x1800 //RX_BWE_UV_TH3 +292 0x1000 //RX_BWE_V_TH +293 0x04CD //RX_BWE_GAIN1_V_TH1 +294 0x0F33 //RX_BWE_GAIN1_V_TH2 +295 0x7333 //RX_BWE_UV_EQ +296 0x199A //RX_BWE_V_EQ +297 0x7333 //RX_BWE_TONE_TH +298 0x0004 //RX_BWE_UV_HOLD_T +299 0x6CCD //RX_BWE_GAIN2_ALPHA +300 0x799A //RX_BWE_GAIN3_ALPHA +301 0x001E //RX_BWE_CUTOFF +302 0x3000 //RX_BWE_GAINFILL +303 0x3200 //RX_BWE_MAXTH_TONE +304 0x2000 //RX_BWE_EQ_0 +305 0x2000 //RX_BWE_EQ_1 +306 0x2000 //RX_BWE_EQ_2 +307 0x2000 //RX_BWE_EQ_3 +308 0x2000 //RX_BWE_EQ_4 +309 0x2000 //RX_BWE_EQ_5 +310 0x2000 //RX_BWE_EQ_6 +311 0x0000 //RX_BWE_RESRV_0 +312 0x0000 //RX_BWE_RESRV_1 +313 0x0000 //RX_BWE_RESRV_2 +#VOL 0 +163 0x1000 //RX_TDDRC_ALPHA_UP_1 +164 0x1000 //RX_TDDRC_ALPHA_UP_2 +165 0x1000 //RX_TDDRC_ALPHA_UP_3 +166 0x1000 //RX_TDDRC_ALPHA_UP_4 +184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +185 0x4000 //RX_TDDRC_ALPHA_DWN_2 +186 0x4000 //RX_TDDRC_ALPHA_DWN_3 +189 0x4000 //RX_TDDRC_ALPHA_DWN_4 +190 0x7214 //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +269 0x0002 //RX_TDDRC_THRD_0 +270 0x0004 //RX_TDDRC_THRD_1 +271 0x1800 //RX_TDDRC_THRD_2 +272 0x1800 //RX_TDDRC_THRD_3 +273 0x7FFF //RX_TDDRC_SLANT_0 +274 0x7FFF //RX_TDDRC_SLANT_1 +275 0x1000 //RX_TDDRC_ALPHA_UP_0 +276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x199A //RX_TDDRC_HMNC_GAIN +279 0x0001 //RX_TDDRC_SMT_FLAG +280 0x0CCD //RX_TDDRC_SMT_W +281 0x0780 //RX_TDDRC_DRC_GAIN +195 0x0014 //RX_FDEQ_SUBNUM +196 0x8080 //RX_FDEQ_GAIN_0 +197 0x8050 //RX_FDEQ_GAIN_1 +198 0x4840 //RX_FDEQ_GAIN_2 +199 0x4040 //RX_FDEQ_GAIN_3 +200 0x4C68 //RX_FDEQ_GAIN_4 +201 0x403C //RX_FDEQ_GAIN_5 +202 0x3C38 //RX_FDEQ_GAIN_6 +203 0x3430 //RX_FDEQ_GAIN_7 +204 0x303C //RX_FDEQ_GAIN_8 +205 0x4C50 //RX_FDEQ_GAIN_9 +206 0x4848 //RX_FDEQ_GAIN_10 +207 0x4848 //RX_FDEQ_GAIN_11 +208 0x4848 //RX_FDEQ_GAIN_12 +209 0x4848 //RX_FDEQ_GAIN_13 +210 0x4848 //RX_FDEQ_GAIN_14 +211 0x4848 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0202 //RX_FDEQ_BIN_0 +221 0x0203 //RX_FDEQ_BIN_1 +222 0x0303 //RX_FDEQ_BIN_2 +223 0x0304 //RX_FDEQ_BIN_3 +224 0x0703 //RX_FDEQ_BIN_4 +225 0x0406 //RX_FDEQ_BIN_5 +226 0x0708 //RX_FDEQ_BIN_6 +227 0x090A //RX_FDEQ_BIN_7 +228 0x0B0C //RX_FDEQ_BIN_8 +229 0x0D08 //RX_FDEQ_BIN_9 +230 0x0000 //RX_FDEQ_BIN_10 +231 0x0000 //RX_FDEQ_BIN_11 +232 0x0000 //RX_FDEQ_BIN_12 +233 0x0000 //RX_FDEQ_BIN_13 +234 0x0000 //RX_FDEQ_BIN_14 +235 0x0000 //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x4000 //RX_FDEQ_RESRV_0 +245 0x0320 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0035 //RX_FDDRC_BAND_MARGIN_1 +248 0x0060 //RX_FDDRC_BAND_MARGIN_2 +249 0x0080 //RX_FDDRC_BAND_MARGIN_3 +250 0x0004 //RX_FDDRC_BLOCK_EXP +251 0x0600 //RX_FDDRC_THRD_2_0 +252 0x0600 //RX_FDDRC_THRD_2_1 +253 0x0600 //RX_FDDRC_THRD_2_2 +254 0x0600 //RX_FDDRC_THRD_2_3 +255 0x0800 //RX_FDDRC_THRD_3_0 +256 0x0800 //RX_FDDRC_THRD_3_1 +257 0x0800 //RX_FDDRC_THRD_3_2 +258 0x0800 //RX_FDDRC_THRD_3_3 +259 0x0000 //RX_FDDRC_SLANT_0_0 +260 0x0000 //RX_FDDRC_SLANT_0_1 +261 0x0000 //RX_FDDRC_SLANT_0_2 +262 0x0000 //RX_FDDRC_SLANT_0_3 +263 0x7FFF //RX_FDDRC_SLANT_1_0 +264 0x7FFF //RX_FDDRC_SLANT_1_1 +265 0x7FFF //RX_FDDRC_SLANT_1_2 +266 0x7FFF //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +286 0x0012 //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 +#VOL 1 +163 0x1000 //RX_TDDRC_ALPHA_UP_1 +164 0x1000 //RX_TDDRC_ALPHA_UP_2 +165 0x1000 //RX_TDDRC_ALPHA_UP_3 +166 0x1000 //RX_TDDRC_ALPHA_UP_4 +184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +185 0x4000 //RX_TDDRC_ALPHA_DWN_2 +186 0x4000 //RX_TDDRC_ALPHA_DWN_3 +189 0x4000 //RX_TDDRC_ALPHA_DWN_4 +190 0x7214 //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +269 0x0002 //RX_TDDRC_THRD_0 +270 0x0004 //RX_TDDRC_THRD_1 +271 0x1800 //RX_TDDRC_THRD_2 +272 0x1800 //RX_TDDRC_THRD_3 +273 0x7FFF //RX_TDDRC_SLANT_0 +274 0x7FFF //RX_TDDRC_SLANT_1 +275 0x1000 //RX_TDDRC_ALPHA_UP_0 +276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x199A //RX_TDDRC_HMNC_GAIN +279 0x0001 //RX_TDDRC_SMT_FLAG +280 0x0CCD //RX_TDDRC_SMT_W +281 0x0780 //RX_TDDRC_DRC_GAIN +195 0x0014 //RX_FDEQ_SUBNUM +196 0x8080 //RX_FDEQ_GAIN_0 +197 0x8050 //RX_FDEQ_GAIN_1 +198 0x4840 //RX_FDEQ_GAIN_2 +199 0x4040 //RX_FDEQ_GAIN_3 +200 0x4C68 //RX_FDEQ_GAIN_4 +201 0x403C //RX_FDEQ_GAIN_5 +202 0x3C38 //RX_FDEQ_GAIN_6 +203 0x3430 //RX_FDEQ_GAIN_7 +204 0x303C //RX_FDEQ_GAIN_8 +205 0x4C50 //RX_FDEQ_GAIN_9 +206 0x4848 //RX_FDEQ_GAIN_10 +207 0x4848 //RX_FDEQ_GAIN_11 +208 0x4848 //RX_FDEQ_GAIN_12 +209 0x4848 //RX_FDEQ_GAIN_13 +210 0x4848 //RX_FDEQ_GAIN_14 +211 0x4848 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0202 //RX_FDEQ_BIN_0 +221 0x0203 //RX_FDEQ_BIN_1 +222 0x0303 //RX_FDEQ_BIN_2 +223 0x0304 //RX_FDEQ_BIN_3 +224 0x0703 //RX_FDEQ_BIN_4 +225 0x0406 //RX_FDEQ_BIN_5 +226 0x0708 //RX_FDEQ_BIN_6 +227 0x090A //RX_FDEQ_BIN_7 +228 0x0B0C //RX_FDEQ_BIN_8 +229 0x0D08 //RX_FDEQ_BIN_9 +230 0x0000 //RX_FDEQ_BIN_10 +231 0x0000 //RX_FDEQ_BIN_11 +232 0x0000 //RX_FDEQ_BIN_12 +233 0x0000 //RX_FDEQ_BIN_13 +234 0x0000 //RX_FDEQ_BIN_14 +235 0x0000 //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x4000 //RX_FDEQ_RESRV_0 +245 0x0320 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0035 //RX_FDDRC_BAND_MARGIN_1 +248 0x0060 //RX_FDDRC_BAND_MARGIN_2 +249 0x0080 //RX_FDDRC_BAND_MARGIN_3 +250 0x0004 //RX_FDDRC_BLOCK_EXP +251 0x0600 //RX_FDDRC_THRD_2_0 +252 0x0600 //RX_FDDRC_THRD_2_1 +253 0x0600 //RX_FDDRC_THRD_2_2 +254 0x0600 //RX_FDDRC_THRD_2_3 +255 0x0800 //RX_FDDRC_THRD_3_0 +256 0x0800 //RX_FDDRC_THRD_3_1 +257 0x0800 //RX_FDDRC_THRD_3_2 +258 0x0800 //RX_FDDRC_THRD_3_3 +259 0x0000 //RX_FDDRC_SLANT_0_0 +260 0x0000 //RX_FDDRC_SLANT_0_1 +261 0x0000 //RX_FDDRC_SLANT_0_2 +262 0x0000 //RX_FDDRC_SLANT_0_3 +263 0x7FFF //RX_FDDRC_SLANT_1_0 +264 0x7FFF //RX_FDDRC_SLANT_1_1 +265 0x7FFF //RX_FDDRC_SLANT_1_2 +266 0x7FFF //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +286 0x001B //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 +#VOL 2 +163 0x1000 //RX_TDDRC_ALPHA_UP_1 +164 0x1000 //RX_TDDRC_ALPHA_UP_2 +165 0x1000 //RX_TDDRC_ALPHA_UP_3 +166 0x1000 //RX_TDDRC_ALPHA_UP_4 +184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +185 0x4000 //RX_TDDRC_ALPHA_DWN_2 +186 0x4000 //RX_TDDRC_ALPHA_DWN_3 +189 0x4000 //RX_TDDRC_ALPHA_DWN_4 +190 0x7214 //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +269 0x0002 //RX_TDDRC_THRD_0 +270 0x0004 //RX_TDDRC_THRD_1 +271 0x1800 //RX_TDDRC_THRD_2 +272 0x1800 //RX_TDDRC_THRD_3 +273 0x7FFF //RX_TDDRC_SLANT_0 +274 0x7FFF //RX_TDDRC_SLANT_1 +275 0x1000 //RX_TDDRC_ALPHA_UP_0 +276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x199A //RX_TDDRC_HMNC_GAIN +279 0x0001 //RX_TDDRC_SMT_FLAG +280 0x0CCD //RX_TDDRC_SMT_W +281 0x0780 //RX_TDDRC_DRC_GAIN +195 0x0014 //RX_FDEQ_SUBNUM +196 0x8080 //RX_FDEQ_GAIN_0 +197 0x8050 //RX_FDEQ_GAIN_1 +198 0x4840 //RX_FDEQ_GAIN_2 +199 0x4040 //RX_FDEQ_GAIN_3 +200 0x4C68 //RX_FDEQ_GAIN_4 +201 0x403C //RX_FDEQ_GAIN_5 +202 0x3C38 //RX_FDEQ_GAIN_6 +203 0x3430 //RX_FDEQ_GAIN_7 +204 0x303C //RX_FDEQ_GAIN_8 +205 0x4C50 //RX_FDEQ_GAIN_9 +206 0x4848 //RX_FDEQ_GAIN_10 +207 0x4848 //RX_FDEQ_GAIN_11 +208 0x4848 //RX_FDEQ_GAIN_12 +209 0x4848 //RX_FDEQ_GAIN_13 +210 0x4848 //RX_FDEQ_GAIN_14 +211 0x4848 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0202 //RX_FDEQ_BIN_0 +221 0x0203 //RX_FDEQ_BIN_1 +222 0x0303 //RX_FDEQ_BIN_2 +223 0x0304 //RX_FDEQ_BIN_3 +224 0x0703 //RX_FDEQ_BIN_4 +225 0x0406 //RX_FDEQ_BIN_5 +226 0x0708 //RX_FDEQ_BIN_6 +227 0x090A //RX_FDEQ_BIN_7 +228 0x0B0C //RX_FDEQ_BIN_8 +229 0x0D08 //RX_FDEQ_BIN_9 +230 0x0000 //RX_FDEQ_BIN_10 +231 0x0000 //RX_FDEQ_BIN_11 +232 0x0000 //RX_FDEQ_BIN_12 +233 0x0000 //RX_FDEQ_BIN_13 +234 0x0000 //RX_FDEQ_BIN_14 +235 0x0000 //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x4000 //RX_FDEQ_RESRV_0 +245 0x0320 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0035 //RX_FDDRC_BAND_MARGIN_1 +248 0x0060 //RX_FDDRC_BAND_MARGIN_2 +249 0x0080 //RX_FDDRC_BAND_MARGIN_3 +250 0x0004 //RX_FDDRC_BLOCK_EXP +251 0x0600 //RX_FDDRC_THRD_2_0 +252 0x0600 //RX_FDDRC_THRD_2_1 +253 0x0600 //RX_FDDRC_THRD_2_2 +254 0x0600 //RX_FDDRC_THRD_2_3 +255 0x0800 //RX_FDDRC_THRD_3_0 +256 0x0800 //RX_FDDRC_THRD_3_1 +257 0x0800 //RX_FDDRC_THRD_3_2 +258 0x0800 //RX_FDDRC_THRD_3_3 +259 0x0000 //RX_FDDRC_SLANT_0_0 +260 0x0000 //RX_FDDRC_SLANT_0_1 +261 0x0000 //RX_FDDRC_SLANT_0_2 +262 0x0000 //RX_FDDRC_SLANT_0_3 +263 0x7FFF //RX_FDDRC_SLANT_1_0 +264 0x7FFF //RX_FDDRC_SLANT_1_1 +265 0x7FFF //RX_FDDRC_SLANT_1_2 +266 0x7FFF //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +286 0x0026 //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 +#VOL 3 +163 0x1000 //RX_TDDRC_ALPHA_UP_1 +164 0x1000 //RX_TDDRC_ALPHA_UP_2 +165 0x1000 //RX_TDDRC_ALPHA_UP_3 +166 0x1000 //RX_TDDRC_ALPHA_UP_4 +184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +185 0x4000 //RX_TDDRC_ALPHA_DWN_2 +186 0x4000 //RX_TDDRC_ALPHA_DWN_3 +189 0x4000 //RX_TDDRC_ALPHA_DWN_4 +190 0x7214 //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +269 0x0002 //RX_TDDRC_THRD_0 +270 0x0004 //RX_TDDRC_THRD_1 +271 0x1800 //RX_TDDRC_THRD_2 +272 0x1800 //RX_TDDRC_THRD_3 +273 0x7FFF //RX_TDDRC_SLANT_0 +274 0x7FFF //RX_TDDRC_SLANT_1 +275 0x1000 //RX_TDDRC_ALPHA_UP_0 +276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x199A //RX_TDDRC_HMNC_GAIN +279 0x0001 //RX_TDDRC_SMT_FLAG +280 0x0CCD //RX_TDDRC_SMT_W +281 0x0780 //RX_TDDRC_DRC_GAIN +195 0x0014 //RX_FDEQ_SUBNUM +196 0x8080 //RX_FDEQ_GAIN_0 +197 0x8050 //RX_FDEQ_GAIN_1 +198 0x4840 //RX_FDEQ_GAIN_2 +199 0x4040 //RX_FDEQ_GAIN_3 +200 0x4C68 //RX_FDEQ_GAIN_4 +201 0x403C //RX_FDEQ_GAIN_5 +202 0x3C38 //RX_FDEQ_GAIN_6 +203 0x3430 //RX_FDEQ_GAIN_7 +204 0x303C //RX_FDEQ_GAIN_8 +205 0x4C50 //RX_FDEQ_GAIN_9 +206 0x4848 //RX_FDEQ_GAIN_10 +207 0x4848 //RX_FDEQ_GAIN_11 +208 0x4848 //RX_FDEQ_GAIN_12 +209 0x4848 //RX_FDEQ_GAIN_13 +210 0x4848 //RX_FDEQ_GAIN_14 +211 0x4848 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0202 //RX_FDEQ_BIN_0 +221 0x0203 //RX_FDEQ_BIN_1 +222 0x0303 //RX_FDEQ_BIN_2 +223 0x0304 //RX_FDEQ_BIN_3 +224 0x0703 //RX_FDEQ_BIN_4 +225 0x0406 //RX_FDEQ_BIN_5 +226 0x0708 //RX_FDEQ_BIN_6 +227 0x090A //RX_FDEQ_BIN_7 +228 0x0B0C //RX_FDEQ_BIN_8 +229 0x0D08 //RX_FDEQ_BIN_9 +230 0x0000 //RX_FDEQ_BIN_10 +231 0x0000 //RX_FDEQ_BIN_11 +232 0x0000 //RX_FDEQ_BIN_12 +233 0x0000 //RX_FDEQ_BIN_13 +234 0x0000 //RX_FDEQ_BIN_14 +235 0x0000 //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x4000 //RX_FDEQ_RESRV_0 +245 0x0320 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0035 //RX_FDDRC_BAND_MARGIN_1 +248 0x0060 //RX_FDDRC_BAND_MARGIN_2 +249 0x0080 //RX_FDDRC_BAND_MARGIN_3 +250 0x0004 //RX_FDDRC_BLOCK_EXP +251 0x0600 //RX_FDDRC_THRD_2_0 +252 0x0600 //RX_FDDRC_THRD_2_1 +253 0x0600 //RX_FDDRC_THRD_2_2 +254 0x0600 //RX_FDDRC_THRD_2_3 +255 0x0800 //RX_FDDRC_THRD_3_0 +256 0x0800 //RX_FDDRC_THRD_3_1 +257 0x0800 //RX_FDDRC_THRD_3_2 +258 0x0800 //RX_FDDRC_THRD_3_3 +259 0x0000 //RX_FDDRC_SLANT_0_0 +260 0x0000 //RX_FDDRC_SLANT_0_1 +261 0x0000 //RX_FDDRC_SLANT_0_2 +262 0x0000 //RX_FDDRC_SLANT_0_3 +263 0x7FFF //RX_FDDRC_SLANT_1_0 +264 0x7FFF //RX_FDDRC_SLANT_1_1 +265 0x7FFF //RX_FDDRC_SLANT_1_2 +266 0x7FFF //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +286 0x0037 //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 +#VOL 4 +163 0x1000 //RX_TDDRC_ALPHA_UP_1 +164 0x1000 //RX_TDDRC_ALPHA_UP_2 +165 0x1000 //RX_TDDRC_ALPHA_UP_3 +166 0x1000 //RX_TDDRC_ALPHA_UP_4 +184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +185 0x4000 //RX_TDDRC_ALPHA_DWN_2 +186 0x4000 //RX_TDDRC_ALPHA_DWN_3 +189 0x4000 //RX_TDDRC_ALPHA_DWN_4 +190 0x7214 //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +269 0x0002 //RX_TDDRC_THRD_0 +270 0x0004 //RX_TDDRC_THRD_1 +271 0x1800 //RX_TDDRC_THRD_2 +272 0x1800 //RX_TDDRC_THRD_3 +273 0x7FFF //RX_TDDRC_SLANT_0 +274 0x7FFF //RX_TDDRC_SLANT_1 +275 0x1000 //RX_TDDRC_ALPHA_UP_0 +276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x199A //RX_TDDRC_HMNC_GAIN +279 0x0001 //RX_TDDRC_SMT_FLAG +280 0x0CCD //RX_TDDRC_SMT_W +281 0x0D56 //RX_TDDRC_DRC_GAIN +195 0x0014 //RX_FDEQ_SUBNUM +196 0x8080 //RX_FDEQ_GAIN_0 +197 0x8050 //RX_FDEQ_GAIN_1 +198 0x4840 //RX_FDEQ_GAIN_2 +199 0x4040 //RX_FDEQ_GAIN_3 +200 0x4470 //RX_FDEQ_GAIN_4 +201 0x383C //RX_FDEQ_GAIN_5 +202 0x3C3C //RX_FDEQ_GAIN_6 +203 0x3434 //RX_FDEQ_GAIN_7 +204 0x344C //RX_FDEQ_GAIN_8 +205 0x585C //RX_FDEQ_GAIN_9 +206 0x4848 //RX_FDEQ_GAIN_10 +207 0x4848 //RX_FDEQ_GAIN_11 +208 0x4848 //RX_FDEQ_GAIN_12 +209 0x4848 //RX_FDEQ_GAIN_13 +210 0x4848 //RX_FDEQ_GAIN_14 +211 0x4848 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0202 //RX_FDEQ_BIN_0 +221 0x0203 //RX_FDEQ_BIN_1 +222 0x0303 //RX_FDEQ_BIN_2 +223 0x0304 //RX_FDEQ_BIN_3 +224 0x0703 //RX_FDEQ_BIN_4 +225 0x0406 //RX_FDEQ_BIN_5 +226 0x0708 //RX_FDEQ_BIN_6 +227 0x090A //RX_FDEQ_BIN_7 +228 0x0B0C //RX_FDEQ_BIN_8 +229 0x0D08 //RX_FDEQ_BIN_9 +230 0x0000 //RX_FDEQ_BIN_10 +231 0x0000 //RX_FDEQ_BIN_11 +232 0x0000 //RX_FDEQ_BIN_12 +233 0x0000 //RX_FDEQ_BIN_13 +234 0x0000 //RX_FDEQ_BIN_14 +235 0x0000 //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x4000 //RX_FDEQ_RESRV_0 +245 0x0320 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0035 //RX_FDDRC_BAND_MARGIN_1 +248 0x0060 //RX_FDDRC_BAND_MARGIN_2 +249 0x0080 //RX_FDDRC_BAND_MARGIN_3 +250 0x0004 //RX_FDDRC_BLOCK_EXP +251 0x0600 //RX_FDDRC_THRD_2_0 +252 0x0600 //RX_FDDRC_THRD_2_1 +253 0x0600 //RX_FDDRC_THRD_2_2 +254 0x0600 //RX_FDDRC_THRD_2_3 +255 0x0800 //RX_FDDRC_THRD_3_0 +256 0x0800 //RX_FDDRC_THRD_3_1 +257 0x0800 //RX_FDDRC_THRD_3_2 +258 0x0800 //RX_FDDRC_THRD_3_3 +259 0x0000 //RX_FDDRC_SLANT_0_0 +260 0x0000 //RX_FDDRC_SLANT_0_1 +261 0x0000 //RX_FDDRC_SLANT_0_2 +262 0x0000 //RX_FDDRC_SLANT_0_3 +263 0x7FFF //RX_FDDRC_SLANT_1_0 +264 0x7FFF //RX_FDDRC_SLANT_1_1 +265 0x7FFF //RX_FDDRC_SLANT_1_2 +266 0x7FFF //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +286 0x002C //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 +#VOL 5 +163 0x1000 //RX_TDDRC_ALPHA_UP_1 +164 0x1000 //RX_TDDRC_ALPHA_UP_2 +165 0x1000 //RX_TDDRC_ALPHA_UP_3 +166 0x1000 //RX_TDDRC_ALPHA_UP_4 +184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +185 0x4000 //RX_TDDRC_ALPHA_DWN_2 +186 0x4000 //RX_TDDRC_ALPHA_DWN_3 +189 0x4000 //RX_TDDRC_ALPHA_DWN_4 +190 0x7214 //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +269 0x0002 //RX_TDDRC_THRD_0 +270 0x0004 //RX_TDDRC_THRD_1 +271 0x1800 //RX_TDDRC_THRD_2 +272 0x1800 //RX_TDDRC_THRD_3 +273 0x7FFF //RX_TDDRC_SLANT_0 +274 0x7FFF //RX_TDDRC_SLANT_1 +275 0x1000 //RX_TDDRC_ALPHA_UP_0 +276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x199A //RX_TDDRC_HMNC_GAIN +279 0x0001 //RX_TDDRC_SMT_FLAG +280 0x0CCD //RX_TDDRC_SMT_W +281 0x0D56 //RX_TDDRC_DRC_GAIN +195 0x0014 //RX_FDEQ_SUBNUM +196 0x8080 //RX_FDEQ_GAIN_0 +197 0x8050 //RX_FDEQ_GAIN_1 +198 0x4840 //RX_FDEQ_GAIN_2 +199 0x4040 //RX_FDEQ_GAIN_3 +200 0x4470 //RX_FDEQ_GAIN_4 +201 0x383C //RX_FDEQ_GAIN_5 +202 0x3C3C //RX_FDEQ_GAIN_6 +203 0x3434 //RX_FDEQ_GAIN_7 +204 0x344C //RX_FDEQ_GAIN_8 +205 0x585C //RX_FDEQ_GAIN_9 +206 0x4848 //RX_FDEQ_GAIN_10 +207 0x4848 //RX_FDEQ_GAIN_11 +208 0x4848 //RX_FDEQ_GAIN_12 +209 0x4848 //RX_FDEQ_GAIN_13 +210 0x4848 //RX_FDEQ_GAIN_14 +211 0x4848 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0202 //RX_FDEQ_BIN_0 +221 0x0203 //RX_FDEQ_BIN_1 +222 0x0303 //RX_FDEQ_BIN_2 +223 0x0304 //RX_FDEQ_BIN_3 +224 0x0703 //RX_FDEQ_BIN_4 +225 0x0406 //RX_FDEQ_BIN_5 +226 0x0708 //RX_FDEQ_BIN_6 +227 0x090A //RX_FDEQ_BIN_7 +228 0x0B0C //RX_FDEQ_BIN_8 +229 0x0D08 //RX_FDEQ_BIN_9 +230 0x0000 //RX_FDEQ_BIN_10 +231 0x0000 //RX_FDEQ_BIN_11 +232 0x0000 //RX_FDEQ_BIN_12 +233 0x0000 //RX_FDEQ_BIN_13 +234 0x0000 //RX_FDEQ_BIN_14 +235 0x0000 //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x4000 //RX_FDEQ_RESRV_0 +245 0x0320 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0035 //RX_FDDRC_BAND_MARGIN_1 +248 0x0060 //RX_FDDRC_BAND_MARGIN_2 +249 0x0080 //RX_FDDRC_BAND_MARGIN_3 +250 0x0004 //RX_FDDRC_BLOCK_EXP +251 0x0600 //RX_FDDRC_THRD_2_0 +252 0x0600 //RX_FDDRC_THRD_2_1 +253 0x0600 //RX_FDDRC_THRD_2_2 +254 0x0600 //RX_FDDRC_THRD_2_3 +255 0x0800 //RX_FDDRC_THRD_3_0 +256 0x0800 //RX_FDDRC_THRD_3_1 +257 0x0800 //RX_FDDRC_THRD_3_2 +258 0x0800 //RX_FDDRC_THRD_3_3 +259 0x0000 //RX_FDDRC_SLANT_0_0 +260 0x0000 //RX_FDDRC_SLANT_0_1 +261 0x0000 //RX_FDDRC_SLANT_0_2 +262 0x0000 //RX_FDDRC_SLANT_0_3 +263 0x7FFF //RX_FDDRC_SLANT_1_0 +264 0x7FFF //RX_FDDRC_SLANT_1_1 +265 0x7FFF //RX_FDDRC_SLANT_1_2 +266 0x7FFF //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +286 0x0051 //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 +#VOL 6 +163 0x1000 //RX_TDDRC_ALPHA_UP_1 +164 0x1000 //RX_TDDRC_ALPHA_UP_2 +165 0x1000 //RX_TDDRC_ALPHA_UP_3 +166 0x1000 //RX_TDDRC_ALPHA_UP_4 +184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +185 0x4000 //RX_TDDRC_ALPHA_DWN_2 +186 0x4000 //RX_TDDRC_ALPHA_DWN_3 +189 0x4000 //RX_TDDRC_ALPHA_DWN_4 +190 0x7214 //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +269 0x0002 //RX_TDDRC_THRD_0 +270 0x0004 //RX_TDDRC_THRD_1 +271 0x1800 //RX_TDDRC_THRD_2 +272 0x1800 //RX_TDDRC_THRD_3 +273 0x7FFF //RX_TDDRC_SLANT_0 +274 0x7FFF //RX_TDDRC_SLANT_1 +275 0x1000 //RX_TDDRC_ALPHA_UP_0 +276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x199A //RX_TDDRC_HMNC_GAIN +279 0x0001 //RX_TDDRC_SMT_FLAG +280 0x0CCD //RX_TDDRC_SMT_W +281 0x0D56 //RX_TDDRC_DRC_GAIN +195 0x0014 //RX_FDEQ_SUBNUM +196 0x8080 //RX_FDEQ_GAIN_0 +197 0x8050 //RX_FDEQ_GAIN_1 +198 0x4840 //RX_FDEQ_GAIN_2 +199 0x4040 //RX_FDEQ_GAIN_3 +200 0x4470 //RX_FDEQ_GAIN_4 +201 0x383C //RX_FDEQ_GAIN_5 +202 0x3C3C //RX_FDEQ_GAIN_6 +203 0x3434 //RX_FDEQ_GAIN_7 +204 0x344C //RX_FDEQ_GAIN_8 +205 0x585C //RX_FDEQ_GAIN_9 +206 0x4848 //RX_FDEQ_GAIN_10 +207 0x4848 //RX_FDEQ_GAIN_11 +208 0x4848 //RX_FDEQ_GAIN_12 +209 0x4848 //RX_FDEQ_GAIN_13 +210 0x4848 //RX_FDEQ_GAIN_14 +211 0x4848 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0202 //RX_FDEQ_BIN_0 +221 0x0203 //RX_FDEQ_BIN_1 +222 0x0303 //RX_FDEQ_BIN_2 +223 0x0304 //RX_FDEQ_BIN_3 +224 0x0703 //RX_FDEQ_BIN_4 +225 0x0406 //RX_FDEQ_BIN_5 +226 0x0708 //RX_FDEQ_BIN_6 +227 0x090A //RX_FDEQ_BIN_7 +228 0x0B0C //RX_FDEQ_BIN_8 +229 0x0D08 //RX_FDEQ_BIN_9 +230 0x0000 //RX_FDEQ_BIN_10 +231 0x0000 //RX_FDEQ_BIN_11 +232 0x0000 //RX_FDEQ_BIN_12 +233 0x0000 //RX_FDEQ_BIN_13 +234 0x0000 //RX_FDEQ_BIN_14 +235 0x0000 //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x4000 //RX_FDEQ_RESRV_0 +245 0x0320 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0035 //RX_FDDRC_BAND_MARGIN_1 +248 0x0060 //RX_FDDRC_BAND_MARGIN_2 +249 0x0080 //RX_FDDRC_BAND_MARGIN_3 +250 0x0004 //RX_FDDRC_BLOCK_EXP +251 0x0600 //RX_FDDRC_THRD_2_0 +252 0x0600 //RX_FDDRC_THRD_2_1 +253 0x0600 //RX_FDDRC_THRD_2_2 +254 0x0600 //RX_FDDRC_THRD_2_3 +255 0x0800 //RX_FDDRC_THRD_3_0 +256 0x0800 //RX_FDDRC_THRD_3_1 +257 0x0800 //RX_FDDRC_THRD_3_2 +258 0x0800 //RX_FDDRC_THRD_3_3 +259 0x0000 //RX_FDDRC_SLANT_0_0 +260 0x0000 //RX_FDDRC_SLANT_0_1 +261 0x0000 //RX_FDDRC_SLANT_0_2 +262 0x0000 //RX_FDDRC_SLANT_0_3 +263 0x7FFF //RX_FDDRC_SLANT_1_0 +264 0x7FFF //RX_FDDRC_SLANT_1_1 +265 0x7FFF //RX_FDDRC_SLANT_1_2 +266 0x7FFF //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +286 0x0100 //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 #CASE_NAME HEADSET-TTY_HCO-VOICE_GENERIC-WB -#PARAM_MODE FULL -#PARAM_TYPE TX+RX -#TOTAL_CUSTOM_STEP 7 +#PARAM_MODE Full +#PARAM_TYPE TX+2RX +#TOTAL_CUSTOM_STEP 7+7 #TX 0 0x0001 //TX_OPERATION_MODE_0 1 0x0000 //TX_OPERATION_MODE_1 @@ -37084,7 +56320,7 @@ 239 0x0000 //TX_DT_RESRV_7 240 0x0000 //TX_DT_RESRV_8 241 0x0000 //TX_DT_RESRV_9 -242 0xF200 //TX_THR_SN_EST_0 +242 0xFA00 //TX_THR_SN_EST_0 243 0xF400 //TX_THR_SN_EST_1 244 0xF800 //TX_THR_SN_EST_2 245 0xF600 //TX_THR_SN_EST_3 @@ -37093,12 +56329,12 @@ 248 0xF800 //TX_THR_SN_EST_6 249 0xF800 //TX_THR_SN_EST_7 250 0x0100 //TX_DELTA_THR_SN_EST_0 -251 0x0000 //TX_DELTA_THR_SN_EST_1 +251 0x0100 //TX_DELTA_THR_SN_EST_1 252 0x0100 //TX_DELTA_THR_SN_EST_2 -253 0x0100 //TX_DELTA_THR_SN_EST_3 +253 0x0200 //TX_DELTA_THR_SN_EST_3 254 0x0200 //TX_DELTA_THR_SN_EST_4 255 0x0200 //TX_DELTA_THR_SN_EST_5 -256 0x0200 //TX_DELTA_THR_SN_EST_6 +256 0x0000 //TX_DELTA_THR_SN_EST_6 257 0x0200 //TX_DELTA_THR_SN_EST_7 258 0x4000 //TX_LAMBDA_NN_EST_0 259 0x4000 //TX_LAMBDA_NN_EST_1 @@ -37124,12 +56360,12 @@ 279 0x0000 //TX_B_POST_FLT_0 280 0x0000 //TX_B_POST_FLT_1 281 0x001A //TX_NS_LVL_CTRL_0 -282 0x001A //TX_NS_LVL_CTRL_1 +282 0x0014 //TX_NS_LVL_CTRL_1 283 0x0014 //TX_NS_LVL_CTRL_2 -284 0x0014 //TX_NS_LVL_CTRL_3 +284 0x000C //TX_NS_LVL_CTRL_3 285 0x000C //TX_NS_LVL_CTRL_4 286 0x000C //TX_NS_LVL_CTRL_5 -287 0x000C //TX_NS_LVL_CTRL_6 +287 0x001A //TX_NS_LVL_CTRL_6 288 0x000C //TX_NS_LVL_CTRL_7 289 0x000E //TX_MIN_GAIN_S_0 290 0x0014 //TX_MIN_GAIN_S_1 @@ -37145,10 +56381,10 @@ 300 0x7FFF //TX_SNRI_SUP_0 301 0x7FFF //TX_SNRI_SUP_1 302 0x7FFF //TX_SNRI_SUP_2 -303 0x7FFF //TX_SNRI_SUP_3 +303 0x4000 //TX_SNRI_SUP_3 304 0x4000 //TX_SNRI_SUP_4 305 0x4000 //TX_SNRI_SUP_5 -306 0x4000 //TX_SNRI_SUP_6 +306 0x7FFF //TX_SNRI_SUP_6 307 0x4000 //TX_SNRI_SUP_7 308 0x1200 //TX_THR_LFNS 309 0x0147 //TX_G_LFNS @@ -37157,12 +56393,12 @@ 312 0x7FFF //TX_A_POST_FILT_0 313 0x7FFF //TX_A_POST_FILT_1 314 0x4000 //TX_A_POST_FILT_S_0 -315 0x199A //TX_A_POST_FILT_S_1 +315 0x1000 //TX_A_POST_FILT_S_1 316 0x1000 //TX_A_POST_FILT_S_2 -317 0x1000 //TX_A_POST_FILT_S_3 +317 0x6666 //TX_A_POST_FILT_S_3 318 0x6666 //TX_A_POST_FILT_S_4 319 0x6666 //TX_A_POST_FILT_S_5 -320 0x6666 //TX_A_POST_FILT_S_6 +320 0x199A //TX_A_POST_FILT_S_6 321 0x6666 //TX_A_POST_FILT_S_7 322 0x2000 //TX_B_POST_FILT_0 323 0x2000 //TX_B_POST_FILT_1 @@ -37209,7 +56445,7 @@ 364 0x0000 //TX_K_APT 365 0x0001 //TX_NOISEDET 366 0x05A0 //TX_NDETCT -367 0x000A //TX_NOISE_TH_0 +367 0x0102 //TX_NOISE_TH_0 368 0x1388 //TX_NOISE_TH_0_2 369 0x3A98 //TX_NOISE_TH_0_3 370 0x0C80 //TX_NOISE_TH_1 @@ -37221,11 +56457,11 @@ 376 0x7FFF //TX_NOISE_TH_5_3 377 0x7FFF //TX_NOISE_TH_5_4 378 0x00C8 //TX_NOISE_TH_6 -379 0x000A //TX_MINENOISE_TH -380 0x0000 //TX_MINENOISE_MIC0_TH_MTS -381 0x0000 //TX_MINENOISE_MIC0_TH_EXP -382 0x0000 //TX_MINENOISE_MIC0_S_TH_MTS -383 0x0000 //TX_MINENOISE_MIC0_S_TH_EXP +379 0x00F8 //TX_MINENOISE_TH +380 0xD508 //TX_MORENS_TFMASK_TH +381 0x0001 //TX_DRC_QUIET_FLOOR +382 0x3A98 //TX_RATIODTL_CUT_TH +383 0x0DAC //TX_DT_CUT_K1 384 0x6400 //TX_OUT_ENER_S_TH_CLEAN 385 0x6400 //TX_OUT_ENER_S_TH_LESSCLEAN 386 0x6400 //TX_OUT_ENER_S_TH_NOISY @@ -37233,22 +56469,22 @@ 388 0x7D00 //TX_OUT_ENER_TH_SPEECH 389 0x0000 //TX_SN_NPB_GAIN 390 0x0000 //TX_NN_NPB_GAIN -391 0x0000 //TX_CSX_ALPHA_0 -392 0x0000 //TX_CSX_ALPHA_1 -393 0x0000 //TX_CSX_ALPHA_2 -394 0x0000 //TX_CSX_ALPHA_3 -395 0x0000 //TX_MU_ARSP_EST -396 0x0000 //TX_P_OUTBEAM_MIN_TH +391 0x7FFF //TX_POST_MASK_SUP_HSNE +392 0x1388 //TX_TAIL_DET_TH +393 0x4000 //TX_B_LESSCUT_RTO_WTA +394 0x0000 //TX_MEL_G_R +395 0x0080 //TX_SUPHIGH_TH +396 0x0000 //TX_MASK_G_R 397 0x0000 //TX_EXTRA_NS_L -398 0x0000 //TX_EXTRA_NS_A -399 0x0000 //TX_VR_NOISE_FLOOR_TH +398 0x1800 //TX_C_POST_FLT_MASK +399 0x7FFF //TX_A_POST_FLT_WNS 400 0x0000 //TX_MIN_G_LOW300HZ 401 0x0010 //TX_MAXLEVEL_CNG 402 0x0000 //TX_STN_NOISE_TH 403 0x0000 //TX_POST_MASK_SUP 404 0x0000 //TX_POST_MASK_ADJUST 405 0x0014 //TX_NS_ENOISE_MIC0_TH -406 0x0014 //TX_MINENOISE_MIC0_TH +406 0x00DC //TX_MINENOISE_MIC0_TH 407 0x0226 //TX_MINENOISE_MIC0_S_TH 408 0x2879 //TX_MIN_G_CTRL_SSNS 409 0x0400 //TX_METAL_RTO_THR @@ -37356,16 +56592,16 @@ 511 0x6666 //TX_MIC_TO_BFGAIN 512 0x6666 //TX_MICTOBFGAIN0 513 0x0014 //TX_FASTMUE_TH -514 0x0000 //TX_DERVB_LEN_0 -515 0x0000 //TX_DERVB_LEN_1 -516 0x0000 //TX_RHO_DERVB -517 0x0000 //TX_MIC_INDX_DERVB -518 0x0000 //TX_MU_DERVB -519 0x0000 //TX_DR_RESRV_0 -520 0x0000 //TX_DR_RESRV_1 -521 0x0000 //TX_DR_RESRV_2 -522 0x0000 //TX_DR_RESRV_3 -523 0x0000 //TX_DR_RESRV_4 +514 0xC000 //TX_DEREVERB_LF_MU +515 0xC000 //TX_DEREVERB_HF_MU +516 0xCCCC //TX_DEREVERB_DELAY +517 0xD999 //TX_DEREVERB_COEF_LEN +518 0x1F40 //TX_DEREVERB_DNR +519 0x0000 //TX_DEREVERB_ALPHA +520 0x0000 //TX_DEREVERB_BETA +521 0x0000 //TX_GSC_RTOL_TH +522 0x7000 //TX_GSC_RTOH_TH +523 0x0064 //TX_WIDE2_MEANHTH 524 0x0000 //TX_DR_RESRV_5 525 0x0000 //TX_DR_RESRV_6 526 0x0000 //TX_DR_RESRV_7 @@ -37731,16 +56967,81 @@ 886 0x0000 //TX_FASTNS_TFMASKBIN_TH2 887 0x0000 //TX_FASTNS_TFMASKBIN_TH3 888 0x00C8 //TX_FASTNS_ARSPC_TH -889 0xD99A //TX_FASTNS_MASK5_TH +889 0xC000 //TX_FASTNS_MASK5_TH 890 0x051F //TX_POSTSSA_MIN_G_VR_MASK -891 0x7FFF //TX_A_LESSCUT_RTO_MASK +891 0x4000 //TX_A_LESSCUT_RTO_MASK 892 0x1770 //TX_FASTNS_NOISETH 893 0xC000 //TX_FASTNS_SSA_THLFL 894 0xC000 //TX_FASTNS_SSA_THHFL 895 0xCCCC //TX_FASTNS_SSA_THLFH 896 0xD999 //TX_FASTNS_SSA_THHFH +897 0x2339 //TX_SENDFUNC_REG_MICMUTE +898 0x0021 //TX_SENDFUNC_REG_MICMUTE1 +899 0x02BC //TX_MICMUTE_RATIO_THR +900 0x0140 //TX_MICMUTE_AMP_THR +901 0x0004 //TX_MICMUTE_HPF_IND +902 0x00C0 //TX_MICMUTE_LOG_EYR_TH +903 0x0008 //TX_MICMUTE_CVG_TIME +904 0x0008 //TX_MICMUTE_RELEASE_TIME +905 0x01FE //TX_MIC_VOLUME_MIC0MUTE +906 0x0020 //TX_MICMUTE_EPD_OFFSET_0 +907 0x001E //TX_MICMUTE_FRQ_AEC_L +908 0x7999 //TX_MICMUTE_EAD_THR +909 0x7FFF //TX_MICMUTE_LAMBDA_CB_NLE +910 0x7FFF //TX_MICMUTE_LAMBDA_RE_EST +911 0x4000 //TX_DTD_THR1_MICMUTE_0 +912 0x7000 //TX_DTD_THR1_MICMUTE_1 +913 0x7FFF //TX_DTD_THR1_MICMUTE_2 +914 0x7FFF //TX_DTD_THR1_MICMUTE_3 +915 0x6CCC //TX_DTD_THR2_MICMUTE_0 +916 0x0400 //TX_MICMUTE_MIN_EQ_RE_EST_0 +917 0x0400 //TX_MICMUTE_MIN_EQ_RE_EST_1 +918 0x1000 //TX_MICMUTE_MIN_EQ_RE_EST_2 +919 0x7FFF //TX_MICMUTE_MIN_EQ_RE_EST_3 +920 0x7FFF //TX_MICMUTE_MIN_EQ_RE_EST_4 +921 0x4000 //TX_MICMUTE_C_POST_FLT +922 0x03E8 //TX_MICMUTE_DT_CUT_K +923 0x0001 //TX_MICMUTE_DT_CUT_THR +924 0x03E8 //TX_MICMUTE_DT_CUT_K2 +925 0x0001 //TX_MICMUTE_DT_CUT_THR2 +926 0x0064 //TX_MICMUTE_DT2_HOLD_N +927 0x1000 //TX_MICMUTE_RATIODTH_THCUT +928 0x1000 //TX_MICMUTE_B_POST_FLT_ECHOL +929 0x7FFF //TX_MICMUTE_B_POST_FLT_ECHOH +930 0x0400 //TX_MICMUTE_C_POST_FLT_MASK +931 0x7999 //TX_MICMUTE_RATIODTL_CUT_TH +932 0x0258 //TX_MICMUTE_DT_CUT_K1 +933 0x0800 //TX_MICMUTE_N2_SN_EST +934 0xFC00 //TX_MICMUTE_THR_SN_EST_0 +935 0x001C //TX_MICMUTE_MIN_G_CTRL_0 +936 0x6000 //TX_MICMUTE_A_POST_FILT_S_0 +937 0x7000 //TX_MICMUTE_B_POST_FILT_0 +938 0x2710 //TX_MIC1RUB_AMP_THR +939 0x0010 //TX_MIC1MUTE_RATIO_THR +940 0x0450 //TX_MIC1MUTE_AMP_THR +941 0x0008 //TX_MIC1MUTE_CVG_TIME +942 0x0008 //TX_MIC1MUTE_RELEASE_TIME +943 0x0000 //TX_AMS_RESRV_01 +944 0x0000 //TX_AMS_RESRV_02 +945 0x0000 //TX_AMS_RESRV_03 +946 0x0000 //TX_AMS_RESRV_04 +947 0x0000 //TX_AMS_RESRV_05 +948 0x0000 //TX_AMS_RESRV_06 +949 0x0000 //TX_AMS_RESRV_07 +950 0x0000 //TX_AMS_RESRV_08 +951 0x0000 //TX_AMS_RESRV_09 +952 0x0000 //TX_AMS_RESRV_10 +953 0x0000 //TX_AMS_RESRV_11 +954 0x0000 //TX_AMS_RESRV_12 +955 0x0000 //TX_AMS_RESRV_13 +956 0x0000 //TX_AMS_RESRV_14 +957 0x0000 //TX_AMS_RESRV_15 +958 0x0000 //TX_AMS_RESRV_16 +959 0x0000 //TX_AMS_RESRV_17 +960 0x0000 //TX_AMS_RESRV_18 +961 0x0000 //TX_AMS_RESRV_19 #RX -0 0x027C //RX_RECVFUNC_MODE_0 +0 0x243C //RX_RECVFUNC_MODE_0 1 0x0000 //RX_RECVFUNC_MODE_1 2 0x0001 //RX_SAMPLINGFREQ_SIG 3 0x0001 //RX_SAMPLINGFREQ_PROC @@ -37750,7 +57051,7 @@ 7 0x6000 //RX_TDDRC_ALPHA_UP_2 8 0x6000 //RX_TDDRC_ALPHA_UP_3 9 0x1000 //RX_TDDRC_ALPHA_UP_4 -10 0x0800 //RX_PGA +10 0x0403 //RX_PGA 11 0x7B02 //RX_A_HP 12 0x4000 //RX_B_PE 13 0x7800 //RX_THR_PITCH_DET_0 @@ -37780,14 +57081,14 @@ 37 0x4000 //RX_LMT_ALPHA 38 0x001C //RX_FDEQ_SUBNUM 39 0x6868 //RX_FDEQ_GAIN_0 -40 0x6858 //RX_FDEQ_GAIN_1 -41 0x5858 //RX_FDEQ_GAIN_2 -42 0x5858 //RX_FDEQ_GAIN_3 +40 0x6864 //RX_FDEQ_GAIN_1 +41 0x7070 //RX_FDEQ_GAIN_2 +42 0x6058 //RX_FDEQ_GAIN_3 43 0x5C5C //RX_FDEQ_GAIN_4 -44 0x5854 //RX_FDEQ_GAIN_5 -45 0x544C //RX_FDEQ_GAIN_6 -46 0x4C4C //RX_FDEQ_GAIN_7 -47 0x4C60 //RX_FDEQ_GAIN_8 +44 0x8854 //RX_FDEQ_GAIN_5 +45 0x5448 //RX_FDEQ_GAIN_6 +46 0x4848 //RX_FDEQ_GAIN_7 +47 0x4860 //RX_FDEQ_GAIN_8 48 0x6068 //RX_FDEQ_GAIN_9 49 0x7070 //RX_FDEQ_GAIN_10 50 0x8070 //RX_FDEQ_GAIN_11 @@ -37864,12 +57165,12 @@ 121 0x199A //RX_TDDRC_HMNC_GAIN 122 0x0001 //RX_TDDRC_SMT_FLAG 123 0x0CCD //RX_TDDRC_SMT_W -124 0x06AF //RX_TDDRC_DRC_GAIN +124 0x0715 //RX_TDDRC_DRC_GAIN 125 0x7C00 //RX_LAMBDA_PKA_FP -126 0x2000 //RX_TPKA_FP -127 0x2000 //RX_MIN_G_FP -128 0x0080 //RX_MAX_G_FP -129 0x0014 //RX_SPK_VOL +126 0x157C //RX_TPKA_FP +127 0x0400 //RX_MIN_G_FP +128 0x0800 //RX_MAX_G_FP +129 0x0100 //RX_SPK_VOL 130 0x0000 //RX_VOL_RESRV_0 131 0x0000 //RX_MAXLEVEL_CNG 132 0x3000 //RX_BWE_UV_TH @@ -37903,15 +57204,15 @@ 8 0x6000 //RX_TDDRC_ALPHA_UP_3 9 0x1000 //RX_TDDRC_ALPHA_UP_4 27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 -28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 -29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 -32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +28 0x4000 //RX_TDDRC_ALPHA_DWN_2 +29 0x4000 //RX_TDDRC_ALPHA_DWN_3 +32 0x4000 //RX_TDDRC_ALPHA_DWN_4 33 0x7214 //RX_TDDRC_LIMITER_THRD 34 0x0800 //RX_TDDRC_LIMITER_GAIN 112 0x0002 //RX_TDDRC_THRD_0 113 0x0004 //RX_TDDRC_THRD_1 -114 0x1C00 //RX_TDDRC_THRD_2 -115 0x1C00 //RX_TDDRC_THRD_3 +114 0x1800 //RX_TDDRC_THRD_2 +115 0x1800 //RX_TDDRC_THRD_3 116 0x7FFF //RX_TDDRC_SLANT_0 117 0x7FFF //RX_TDDRC_SLANT_1 118 0x6000 //RX_TDDRC_ALPHA_UP_0 @@ -37920,22 +57221,22 @@ 121 0x199A //RX_TDDRC_HMNC_GAIN 122 0x0001 //RX_TDDRC_SMT_FLAG 123 0x0CCD //RX_TDDRC_SMT_W -124 0x06AF //RX_TDDRC_DRC_GAIN +124 0x0780 //RX_TDDRC_DRC_GAIN 38 0x001C //RX_FDEQ_SUBNUM -39 0x6868 //RX_FDEQ_GAIN_0 -40 0x6858 //RX_FDEQ_GAIN_1 -41 0x5858 //RX_FDEQ_GAIN_2 -42 0x5858 //RX_FDEQ_GAIN_3 -43 0x5C5C //RX_FDEQ_GAIN_4 -44 0x5854 //RX_FDEQ_GAIN_5 -45 0x544C //RX_FDEQ_GAIN_6 -46 0x4C4C //RX_FDEQ_GAIN_7 -47 0x4C60 //RX_FDEQ_GAIN_8 -48 0x6068 //RX_FDEQ_GAIN_9 -49 0x7070 //RX_FDEQ_GAIN_10 -50 0x8070 //RX_FDEQ_GAIN_11 -51 0x6060 //RX_FDEQ_GAIN_12 -52 0x7070 //RX_FDEQ_GAIN_13 +39 0x5C5C //RX_FDEQ_GAIN_0 +40 0x5448 //RX_FDEQ_GAIN_1 +41 0x4848 //RX_FDEQ_GAIN_2 +42 0x4840 //RX_FDEQ_GAIN_3 +43 0x4848 //RX_FDEQ_GAIN_4 +44 0x6048 //RX_FDEQ_GAIN_5 +45 0x4C40 //RX_FDEQ_GAIN_6 +46 0x4038 //RX_FDEQ_GAIN_7 +47 0x3C48 //RX_FDEQ_GAIN_8 +48 0x545C //RX_FDEQ_GAIN_9 +49 0x6864 //RX_FDEQ_GAIN_10 +50 0x7058 //RX_FDEQ_GAIN_11 +51 0x443C //RX_FDEQ_GAIN_12 +52 0x3838 //RX_FDEQ_GAIN_13 53 0x4848 //RX_FDEQ_GAIN_14 54 0x4848 //RX_FDEQ_GAIN_15 55 0x4848 //RX_FDEQ_GAIN_16 @@ -37994,7 +57295,7 @@ 108 0x7FFF //RX_FDDRC_SLANT_1_2 109 0x7FFF //RX_FDDRC_SLANT_1_3 110 0x0000 //RX_FDDRC_RESRV_0 -129 0x0014 //RX_SPK_VOL +129 0x0011 //RX_SPK_VOL 130 0x0000 //RX_VOL_RESRV_0 #VOL 1 6 0x6000 //RX_TDDRC_ALPHA_UP_1 @@ -38002,15 +57303,15 @@ 8 0x6000 //RX_TDDRC_ALPHA_UP_3 9 0x1000 //RX_TDDRC_ALPHA_UP_4 27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 -28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 -29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 -32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +28 0x4000 //RX_TDDRC_ALPHA_DWN_2 +29 0x4000 //RX_TDDRC_ALPHA_DWN_3 +32 0x4000 //RX_TDDRC_ALPHA_DWN_4 33 0x7214 //RX_TDDRC_LIMITER_THRD 34 0x0800 //RX_TDDRC_LIMITER_GAIN 112 0x0002 //RX_TDDRC_THRD_0 113 0x0004 //RX_TDDRC_THRD_1 -114 0x1C00 //RX_TDDRC_THRD_2 -115 0x1C00 //RX_TDDRC_THRD_3 +114 0x1800 //RX_TDDRC_THRD_2 +115 0x1800 //RX_TDDRC_THRD_3 116 0x7FFF //RX_TDDRC_SLANT_0 117 0x7FFF //RX_TDDRC_SLANT_1 118 0x6000 //RX_TDDRC_ALPHA_UP_0 @@ -38019,22 +57320,22 @@ 121 0x199A //RX_TDDRC_HMNC_GAIN 122 0x0001 //RX_TDDRC_SMT_FLAG 123 0x0CCD //RX_TDDRC_SMT_W -124 0x06AF //RX_TDDRC_DRC_GAIN +124 0x0780 //RX_TDDRC_DRC_GAIN 38 0x001C //RX_FDEQ_SUBNUM -39 0x6868 //RX_FDEQ_GAIN_0 -40 0x6858 //RX_FDEQ_GAIN_1 -41 0x5858 //RX_FDEQ_GAIN_2 -42 0x5858 //RX_FDEQ_GAIN_3 -43 0x5C5C //RX_FDEQ_GAIN_4 -44 0x5854 //RX_FDEQ_GAIN_5 -45 0x544C //RX_FDEQ_GAIN_6 -46 0x4C4C //RX_FDEQ_GAIN_7 -47 0x4C60 //RX_FDEQ_GAIN_8 -48 0x6068 //RX_FDEQ_GAIN_9 -49 0x7070 //RX_FDEQ_GAIN_10 -50 0x8070 //RX_FDEQ_GAIN_11 -51 0x6060 //RX_FDEQ_GAIN_12 -52 0x7070 //RX_FDEQ_GAIN_13 +39 0x5C5C //RX_FDEQ_GAIN_0 +40 0x5448 //RX_FDEQ_GAIN_1 +41 0x4848 //RX_FDEQ_GAIN_2 +42 0x4840 //RX_FDEQ_GAIN_3 +43 0x4848 //RX_FDEQ_GAIN_4 +44 0x6048 //RX_FDEQ_GAIN_5 +45 0x4C40 //RX_FDEQ_GAIN_6 +46 0x4038 //RX_FDEQ_GAIN_7 +47 0x3C48 //RX_FDEQ_GAIN_8 +48 0x545C //RX_FDEQ_GAIN_9 +49 0x6864 //RX_FDEQ_GAIN_10 +50 0x7058 //RX_FDEQ_GAIN_11 +51 0x443C //RX_FDEQ_GAIN_12 +52 0x3838 //RX_FDEQ_GAIN_13 53 0x4848 //RX_FDEQ_GAIN_14 54 0x4848 //RX_FDEQ_GAIN_15 55 0x4848 //RX_FDEQ_GAIN_16 @@ -38093,7 +57394,7 @@ 108 0x7FFF //RX_FDDRC_SLANT_1_2 109 0x7FFF //RX_FDDRC_SLANT_1_3 110 0x0000 //RX_FDDRC_RESRV_0 -129 0x001A //RX_SPK_VOL +129 0x0019 //RX_SPK_VOL 130 0x0000 //RX_VOL_RESRV_0 #VOL 2 6 0x6000 //RX_TDDRC_ALPHA_UP_1 @@ -38101,15 +57402,15 @@ 8 0x6000 //RX_TDDRC_ALPHA_UP_3 9 0x1000 //RX_TDDRC_ALPHA_UP_4 27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 -28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 -29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 -32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +28 0x4000 //RX_TDDRC_ALPHA_DWN_2 +29 0x4000 //RX_TDDRC_ALPHA_DWN_3 +32 0x4000 //RX_TDDRC_ALPHA_DWN_4 33 0x7214 //RX_TDDRC_LIMITER_THRD 34 0x0800 //RX_TDDRC_LIMITER_GAIN 112 0x0002 //RX_TDDRC_THRD_0 113 0x0004 //RX_TDDRC_THRD_1 -114 0x1C00 //RX_TDDRC_THRD_2 -115 0x1C00 //RX_TDDRC_THRD_3 +114 0x1800 //RX_TDDRC_THRD_2 +115 0x1800 //RX_TDDRC_THRD_3 116 0x7FFF //RX_TDDRC_SLANT_0 117 0x7FFF //RX_TDDRC_SLANT_1 118 0x6000 //RX_TDDRC_ALPHA_UP_0 @@ -38118,22 +57419,22 @@ 121 0x199A //RX_TDDRC_HMNC_GAIN 122 0x0001 //RX_TDDRC_SMT_FLAG 123 0x0CCD //RX_TDDRC_SMT_W -124 0x06AF //RX_TDDRC_DRC_GAIN +124 0x0780 //RX_TDDRC_DRC_GAIN 38 0x001C //RX_FDEQ_SUBNUM -39 0x6868 //RX_FDEQ_GAIN_0 -40 0x6858 //RX_FDEQ_GAIN_1 -41 0x5858 //RX_FDEQ_GAIN_2 -42 0x5858 //RX_FDEQ_GAIN_3 -43 0x5C5C //RX_FDEQ_GAIN_4 -44 0x5854 //RX_FDEQ_GAIN_5 -45 0x544C //RX_FDEQ_GAIN_6 -46 0x4C4C //RX_FDEQ_GAIN_7 -47 0x4C60 //RX_FDEQ_GAIN_8 -48 0x6068 //RX_FDEQ_GAIN_9 -49 0x7070 //RX_FDEQ_GAIN_10 -50 0x8070 //RX_FDEQ_GAIN_11 -51 0x6060 //RX_FDEQ_GAIN_12 -52 0x7070 //RX_FDEQ_GAIN_13 +39 0x5C5C //RX_FDEQ_GAIN_0 +40 0x5448 //RX_FDEQ_GAIN_1 +41 0x4848 //RX_FDEQ_GAIN_2 +42 0x4840 //RX_FDEQ_GAIN_3 +43 0x4848 //RX_FDEQ_GAIN_4 +44 0x6048 //RX_FDEQ_GAIN_5 +45 0x4C40 //RX_FDEQ_GAIN_6 +46 0x4038 //RX_FDEQ_GAIN_7 +47 0x3C48 //RX_FDEQ_GAIN_8 +48 0x545C //RX_FDEQ_GAIN_9 +49 0x6864 //RX_FDEQ_GAIN_10 +50 0x7058 //RX_FDEQ_GAIN_11 +51 0x443C //RX_FDEQ_GAIN_12 +52 0x3838 //RX_FDEQ_GAIN_13 53 0x4848 //RX_FDEQ_GAIN_14 54 0x4848 //RX_FDEQ_GAIN_15 55 0x4848 //RX_FDEQ_GAIN_16 @@ -38192,7 +57493,7 @@ 108 0x7FFF //RX_FDDRC_SLANT_1_2 109 0x7FFF //RX_FDDRC_SLANT_1_3 110 0x0000 //RX_FDDRC_RESRV_0 -129 0x0026 //RX_SPK_VOL +129 0x0024 //RX_SPK_VOL 130 0x0000 //RX_VOL_RESRV_0 #VOL 3 6 0x6000 //RX_TDDRC_ALPHA_UP_1 @@ -38200,15 +57501,15 @@ 8 0x6000 //RX_TDDRC_ALPHA_UP_3 9 0x1000 //RX_TDDRC_ALPHA_UP_4 27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 -28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 -29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 -32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +28 0x4000 //RX_TDDRC_ALPHA_DWN_2 +29 0x4000 //RX_TDDRC_ALPHA_DWN_3 +32 0x4000 //RX_TDDRC_ALPHA_DWN_4 33 0x7214 //RX_TDDRC_LIMITER_THRD 34 0x0800 //RX_TDDRC_LIMITER_GAIN 112 0x0002 //RX_TDDRC_THRD_0 113 0x0004 //RX_TDDRC_THRD_1 -114 0x1C00 //RX_TDDRC_THRD_2 -115 0x1C00 //RX_TDDRC_THRD_3 +114 0x1800 //RX_TDDRC_THRD_2 +115 0x1800 //RX_TDDRC_THRD_3 116 0x7FFF //RX_TDDRC_SLANT_0 117 0x7FFF //RX_TDDRC_SLANT_1 118 0x6000 //RX_TDDRC_ALPHA_UP_0 @@ -38217,22 +57518,22 @@ 121 0x199A //RX_TDDRC_HMNC_GAIN 122 0x0001 //RX_TDDRC_SMT_FLAG 123 0x0CCD //RX_TDDRC_SMT_W -124 0x06AF //RX_TDDRC_DRC_GAIN +124 0x0780 //RX_TDDRC_DRC_GAIN 38 0x001C //RX_FDEQ_SUBNUM -39 0x6868 //RX_FDEQ_GAIN_0 -40 0x6858 //RX_FDEQ_GAIN_1 -41 0x5858 //RX_FDEQ_GAIN_2 -42 0x5858 //RX_FDEQ_GAIN_3 -43 0x5C5C //RX_FDEQ_GAIN_4 -44 0x5854 //RX_FDEQ_GAIN_5 -45 0x544C //RX_FDEQ_GAIN_6 -46 0x4C4C //RX_FDEQ_GAIN_7 -47 0x4C60 //RX_FDEQ_GAIN_8 -48 0x6068 //RX_FDEQ_GAIN_9 -49 0x7070 //RX_FDEQ_GAIN_10 -50 0x8070 //RX_FDEQ_GAIN_11 -51 0x6060 //RX_FDEQ_GAIN_12 -52 0x7070 //RX_FDEQ_GAIN_13 +39 0x5C5C //RX_FDEQ_GAIN_0 +40 0x5448 //RX_FDEQ_GAIN_1 +41 0x4848 //RX_FDEQ_GAIN_2 +42 0x4840 //RX_FDEQ_GAIN_3 +43 0x4848 //RX_FDEQ_GAIN_4 +44 0x6048 //RX_FDEQ_GAIN_5 +45 0x4C40 //RX_FDEQ_GAIN_6 +46 0x4038 //RX_FDEQ_GAIN_7 +47 0x3C48 //RX_FDEQ_GAIN_8 +48 0x545C //RX_FDEQ_GAIN_9 +49 0x6864 //RX_FDEQ_GAIN_10 +50 0x7058 //RX_FDEQ_GAIN_11 +51 0x443C //RX_FDEQ_GAIN_12 +52 0x3838 //RX_FDEQ_GAIN_13 53 0x4848 //RX_FDEQ_GAIN_14 54 0x4848 //RX_FDEQ_GAIN_15 55 0x4848 //RX_FDEQ_GAIN_16 @@ -38291,7 +57592,7 @@ 108 0x7FFF //RX_FDDRC_SLANT_1_2 109 0x7FFF //RX_FDDRC_SLANT_1_3 110 0x0000 //RX_FDDRC_RESRV_0 -129 0x0035 //RX_SPK_VOL +129 0x0034 //RX_SPK_VOL 130 0x0000 //RX_VOL_RESRV_0 #VOL 4 6 0x6000 //RX_TDDRC_ALPHA_UP_1 @@ -38299,15 +57600,15 @@ 8 0x6000 //RX_TDDRC_ALPHA_UP_3 9 0x1000 //RX_TDDRC_ALPHA_UP_4 27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 -28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 -29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 -32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +28 0x4000 //RX_TDDRC_ALPHA_DWN_2 +29 0x4000 //RX_TDDRC_ALPHA_DWN_3 +32 0x4000 //RX_TDDRC_ALPHA_DWN_4 33 0x7214 //RX_TDDRC_LIMITER_THRD 34 0x0800 //RX_TDDRC_LIMITER_GAIN 112 0x0002 //RX_TDDRC_THRD_0 113 0x0004 //RX_TDDRC_THRD_1 -114 0x1C00 //RX_TDDRC_THRD_2 -115 0x1C00 //RX_TDDRC_THRD_3 +114 0x1800 //RX_TDDRC_THRD_2 +115 0x1800 //RX_TDDRC_THRD_3 116 0x7FFF //RX_TDDRC_SLANT_0 117 0x7FFF //RX_TDDRC_SLANT_1 118 0x6000 //RX_TDDRC_ALPHA_UP_0 @@ -38316,22 +57617,22 @@ 121 0x199A //RX_TDDRC_HMNC_GAIN 122 0x0001 //RX_TDDRC_SMT_FLAG 123 0x0CCD //RX_TDDRC_SMT_W -124 0x06AF //RX_TDDRC_DRC_GAIN +124 0x0B39 //RX_TDDRC_DRC_GAIN 38 0x001C //RX_FDEQ_SUBNUM -39 0x7878 //RX_FDEQ_GAIN_0 -40 0x786C //RX_FDEQ_GAIN_1 -41 0x6C6C //RX_FDEQ_GAIN_2 -42 0x6262 //RX_FDEQ_GAIN_3 -43 0x5A60 //RX_FDEQ_GAIN_4 -44 0x7A54 //RX_FDEQ_GAIN_5 -45 0x5448 //RX_FDEQ_GAIN_6 -46 0x4848 //RX_FDEQ_GAIN_7 -47 0x4860 //RX_FDEQ_GAIN_8 +39 0x6868 //RX_FDEQ_GAIN_0 +40 0x685C //RX_FDEQ_GAIN_1 +41 0x6868 //RX_FDEQ_GAIN_2 +42 0x544C //RX_FDEQ_GAIN_3 +43 0x4C54 //RX_FDEQ_GAIN_4 +44 0x704C //RX_FDEQ_GAIN_5 +45 0x4C40 //RX_FDEQ_GAIN_6 +46 0x4040 //RX_FDEQ_GAIN_7 +47 0x445C //RX_FDEQ_GAIN_8 48 0x6068 //RX_FDEQ_GAIN_9 49 0x7070 //RX_FDEQ_GAIN_10 -50 0x8070 //RX_FDEQ_GAIN_11 +50 0x7C74 //RX_FDEQ_GAIN_11 51 0x6060 //RX_FDEQ_GAIN_12 -52 0x7070 //RX_FDEQ_GAIN_13 +52 0x6C6C //RX_FDEQ_GAIN_13 53 0x4848 //RX_FDEQ_GAIN_14 54 0x4848 //RX_FDEQ_GAIN_15 55 0x4848 //RX_FDEQ_GAIN_16 @@ -38390,7 +57691,7 @@ 108 0x7FFF //RX_FDDRC_SLANT_1_2 109 0x7FFF //RX_FDDRC_SLANT_1_3 110 0x0000 //RX_FDDRC_RESRV_0 -129 0x0058 //RX_SPK_VOL +129 0x0038 //RX_SPK_VOL 130 0x0000 //RX_VOL_RESRV_0 #VOL 5 6 0x6000 //RX_TDDRC_ALPHA_UP_1 @@ -38398,15 +57699,15 @@ 8 0x6000 //RX_TDDRC_ALPHA_UP_3 9 0x1000 //RX_TDDRC_ALPHA_UP_4 27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 -28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 -29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 -32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +28 0x4000 //RX_TDDRC_ALPHA_DWN_2 +29 0x4000 //RX_TDDRC_ALPHA_DWN_3 +32 0x4000 //RX_TDDRC_ALPHA_DWN_4 33 0x7214 //RX_TDDRC_LIMITER_THRD 34 0x0800 //RX_TDDRC_LIMITER_GAIN 112 0x0002 //RX_TDDRC_THRD_0 113 0x0004 //RX_TDDRC_THRD_1 -114 0x1C00 //RX_TDDRC_THRD_2 -115 0x1C00 //RX_TDDRC_THRD_3 +114 0x1800 //RX_TDDRC_THRD_2 +115 0x1800 //RX_TDDRC_THRD_3 116 0x7FFF //RX_TDDRC_SLANT_0 117 0x7FFF //RX_TDDRC_SLANT_1 118 0x6000 //RX_TDDRC_ALPHA_UP_0 @@ -38415,22 +57716,22 @@ 121 0x199A //RX_TDDRC_HMNC_GAIN 122 0x0001 //RX_TDDRC_SMT_FLAG 123 0x0CCD //RX_TDDRC_SMT_W -124 0x06AF //RX_TDDRC_DRC_GAIN +124 0x0B39 //RX_TDDRC_DRC_GAIN 38 0x001C //RX_FDEQ_SUBNUM -39 0x7878 //RX_FDEQ_GAIN_0 -40 0x786C //RX_FDEQ_GAIN_1 -41 0x6C6C //RX_FDEQ_GAIN_2 -42 0x6262 //RX_FDEQ_GAIN_3 -43 0x5A60 //RX_FDEQ_GAIN_4 -44 0x7A54 //RX_FDEQ_GAIN_5 -45 0x5448 //RX_FDEQ_GAIN_6 -46 0x4848 //RX_FDEQ_GAIN_7 -47 0x4860 //RX_FDEQ_GAIN_8 +39 0x6868 //RX_FDEQ_GAIN_0 +40 0x685C //RX_FDEQ_GAIN_1 +41 0x6868 //RX_FDEQ_GAIN_2 +42 0x544C //RX_FDEQ_GAIN_3 +43 0x4C54 //RX_FDEQ_GAIN_4 +44 0x704C //RX_FDEQ_GAIN_5 +45 0x4C40 //RX_FDEQ_GAIN_6 +46 0x4040 //RX_FDEQ_GAIN_7 +47 0x445C //RX_FDEQ_GAIN_8 48 0x6068 //RX_FDEQ_GAIN_9 49 0x7070 //RX_FDEQ_GAIN_10 -50 0x8070 //RX_FDEQ_GAIN_11 +50 0x7C74 //RX_FDEQ_GAIN_11 51 0x6060 //RX_FDEQ_GAIN_12 -52 0x7070 //RX_FDEQ_GAIN_13 +52 0x6C6C //RX_FDEQ_GAIN_13 53 0x4848 //RX_FDEQ_GAIN_14 54 0x4848 //RX_FDEQ_GAIN_15 55 0x4848 //RX_FDEQ_GAIN_16 @@ -38489,7 +57790,7 @@ 108 0x7FFF //RX_FDDRC_SLANT_1_2 109 0x7FFF //RX_FDDRC_SLANT_1_3 110 0x0000 //RX_FDDRC_RESRV_0 -129 0x0085 //RX_SPK_VOL +129 0x0060 //RX_SPK_VOL 130 0x0000 //RX_VOL_RESRV_0 #VOL 6 6 0x6000 //RX_TDDRC_ALPHA_UP_1 @@ -38497,15 +57798,15 @@ 8 0x6000 //RX_TDDRC_ALPHA_UP_3 9 0x1000 //RX_TDDRC_ALPHA_UP_4 27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 -28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 -29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 -32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +28 0x4000 //RX_TDDRC_ALPHA_DWN_2 +29 0x4000 //RX_TDDRC_ALPHA_DWN_3 +32 0x4000 //RX_TDDRC_ALPHA_DWN_4 33 0x7214 //RX_TDDRC_LIMITER_THRD 34 0x0800 //RX_TDDRC_LIMITER_GAIN 112 0x0002 //RX_TDDRC_THRD_0 113 0x0004 //RX_TDDRC_THRD_1 -114 0x1C00 //RX_TDDRC_THRD_2 -115 0x1C00 //RX_TDDRC_THRD_3 +114 0x1800 //RX_TDDRC_THRD_2 +115 0x1800 //RX_TDDRC_THRD_3 116 0x7FFF //RX_TDDRC_SLANT_0 117 0x7FFF //RX_TDDRC_SLANT_1 118 0x6000 //RX_TDDRC_ALPHA_UP_0 @@ -38514,22 +57815,22 @@ 121 0x199A //RX_TDDRC_HMNC_GAIN 122 0x0001 //RX_TDDRC_SMT_FLAG 123 0x0CCD //RX_TDDRC_SMT_W -124 0x06AF //RX_TDDRC_DRC_GAIN +124 0x0B39 //RX_TDDRC_DRC_GAIN 38 0x001C //RX_FDEQ_SUBNUM -39 0x7878 //RX_FDEQ_GAIN_0 -40 0x786C //RX_FDEQ_GAIN_1 -41 0x6C6C //RX_FDEQ_GAIN_2 -42 0x6262 //RX_FDEQ_GAIN_3 -43 0x5A60 //RX_FDEQ_GAIN_4 -44 0x7A54 //RX_FDEQ_GAIN_5 -45 0x5448 //RX_FDEQ_GAIN_6 -46 0x4848 //RX_FDEQ_GAIN_7 -47 0x4860 //RX_FDEQ_GAIN_8 +39 0x6868 //RX_FDEQ_GAIN_0 +40 0x685C //RX_FDEQ_GAIN_1 +41 0x6868 //RX_FDEQ_GAIN_2 +42 0x544C //RX_FDEQ_GAIN_3 +43 0x4C54 //RX_FDEQ_GAIN_4 +44 0x704C //RX_FDEQ_GAIN_5 +45 0x4C40 //RX_FDEQ_GAIN_6 +46 0x4040 //RX_FDEQ_GAIN_7 +47 0x445C //RX_FDEQ_GAIN_8 48 0x6068 //RX_FDEQ_GAIN_9 49 0x7070 //RX_FDEQ_GAIN_10 -50 0x8070 //RX_FDEQ_GAIN_11 +50 0x7C74 //RX_FDEQ_GAIN_11 51 0x6060 //RX_FDEQ_GAIN_12 -52 0x7070 //RX_FDEQ_GAIN_13 +52 0x6C6C //RX_FDEQ_GAIN_13 53 0x4848 //RX_FDEQ_GAIN_14 54 0x4848 //RX_FDEQ_GAIN_15 55 0x4848 //RX_FDEQ_GAIN_16 @@ -38590,11 +57891,862 @@ 110 0x0000 //RX_FDDRC_RESRV_0 129 0x0100 //RX_SPK_VOL 130 0x0000 //RX_VOL_RESRV_0 +#RX 2 +157 0x243C //RX_RECVFUNC_MODE_0 +158 0x0000 //RX_RECVFUNC_MODE_1 +159 0x0001 //RX_SAMPLINGFREQ_SIG +160 0x0001 //RX_SAMPLINGFREQ_PROC +161 0x000A //RX_FRAME_SZ +162 0x0000 //RX_DELAY_OPT +163 0x6000 //RX_TDDRC_ALPHA_UP_1 +164 0x6000 //RX_TDDRC_ALPHA_UP_2 +165 0x6000 //RX_TDDRC_ALPHA_UP_3 +166 0x1000 //RX_TDDRC_ALPHA_UP_4 +167 0x0403 //RX_PGA +168 0x7B02 //RX_A_HP +169 0x4000 //RX_B_PE +170 0x7800 //RX_THR_PITCH_DET_0 +171 0x7000 //RX_THR_PITCH_DET_1 +172 0x6000 //RX_THR_PITCH_DET_2 +173 0x0008 //RX_PITCH_BFR_LEN +174 0x0003 //RX_SBD_PITCH_DET +175 0x0100 //RX_PP_RESRV_0 +176 0x0020 //RX_PP_RESRV_1 +177 0x0400 //RX_N_SN_EST +178 0x000C //RX_N2_SN_EST +179 0x0010 //RX_NS_LVL_CTRL +180 0xF800 //RX_THR_SN_EST +181 0x7E00 //RX_LAMBDA_PFILT +182 0x000A //RX_FENS_RESRV_0 +183 0x0190 //RX_FENS_RESRV_1 +184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +187 0x0002 //RX_EXTRA_NS_L +188 0x0800 //RX_EXTRA_NS_A +189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +190 0x7214 //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +192 0x199A //RX_A_POST_FLT +193 0x0000 //RX_LMT_THRD +194 0x4000 //RX_LMT_ALPHA +195 0x001C //RX_FDEQ_SUBNUM +196 0x6868 //RX_FDEQ_GAIN_0 +197 0x6864 //RX_FDEQ_GAIN_1 +198 0x7070 //RX_FDEQ_GAIN_2 +199 0x6058 //RX_FDEQ_GAIN_3 +200 0x5C5C //RX_FDEQ_GAIN_4 +201 0x8854 //RX_FDEQ_GAIN_5 +202 0x5448 //RX_FDEQ_GAIN_6 +203 0x4848 //RX_FDEQ_GAIN_7 +204 0x4860 //RX_FDEQ_GAIN_8 +205 0x6068 //RX_FDEQ_GAIN_9 +206 0x7070 //RX_FDEQ_GAIN_10 +207 0x8070 //RX_FDEQ_GAIN_11 +208 0x6060 //RX_FDEQ_GAIN_12 +209 0x7070 //RX_FDEQ_GAIN_13 +210 0x4848 //RX_FDEQ_GAIN_14 +211 0x4848 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0202 //RX_FDEQ_BIN_0 +221 0x0203 //RX_FDEQ_BIN_1 +222 0x0303 //RX_FDEQ_BIN_2 +223 0x0304 //RX_FDEQ_BIN_3 +224 0x0404 //RX_FDEQ_BIN_4 +225 0x0204 //RX_FDEQ_BIN_5 +226 0x0A0A //RX_FDEQ_BIN_6 +227 0x0A0A //RX_FDEQ_BIN_7 +228 0x0B0C //RX_FDEQ_BIN_8 +229 0x0D0E //RX_FDEQ_BIN_9 +230 0x0E0F //RX_FDEQ_BIN_10 +231 0x0F10 //RX_FDEQ_BIN_11 +232 0x1011 //RX_FDEQ_BIN_12 +233 0x1104 //RX_FDEQ_BIN_13 +234 0x0000 //RX_FDEQ_BIN_14 +235 0x0000 //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x4000 //RX_FDEQ_RESRV_0 +245 0x0320 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0035 //RX_FDDRC_BAND_MARGIN_1 +248 0x00D5 //RX_FDDRC_BAND_MARGIN_2 +249 0x0120 //RX_FDDRC_BAND_MARGIN_3 +250 0x0004 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x2000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x2000 //RX_FDDRC_THRD_3_2 +258 0x5000 //RX_FDDRC_THRD_3_3 +259 0x4000 //RX_FDDRC_SLANT_0_0 +260 0x4000 //RX_FDDRC_SLANT_0_1 +261 0x4000 //RX_FDDRC_SLANT_0_2 +262 0x4000 //RX_FDDRC_SLANT_0_3 +263 0x7FFF //RX_FDDRC_SLANT_1_0 +264 0x7FFF //RX_FDDRC_SLANT_1_1 +265 0x7FFF //RX_FDDRC_SLANT_1_2 +266 0x7FFF //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +268 0x0002 //RX_FILTINDX +269 0x0002 //RX_TDDRC_THRD_0 +270 0x0004 //RX_TDDRC_THRD_1 +271 0x1C00 //RX_TDDRC_THRD_2 +272 0x1C00 //RX_TDDRC_THRD_3 +273 0x7FFF //RX_TDDRC_SLANT_0 +274 0x7FFF //RX_TDDRC_SLANT_1 +275 0x6000 //RX_TDDRC_ALPHA_UP_0 +276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x199A //RX_TDDRC_HMNC_GAIN +279 0x0001 //RX_TDDRC_SMT_FLAG +280 0x0CCD //RX_TDDRC_SMT_W +281 0x0715 //RX_TDDRC_DRC_GAIN +282 0x7C00 //RX_LAMBDA_PKA_FP +283 0x157C //RX_TPKA_FP +284 0x0400 //RX_MIN_G_FP +285 0x0800 //RX_MAX_G_FP +286 0x0100 //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 +288 0x0000 //RX_MAXLEVEL_CNG +289 0x3000 //RX_BWE_UV_TH +290 0x3000 //RX_BWE_UV_TH2 +291 0x1800 //RX_BWE_UV_TH3 +292 0x1000 //RX_BWE_V_TH +293 0x04CD //RX_BWE_GAIN1_V_TH1 +294 0x0F33 //RX_BWE_GAIN1_V_TH2 +295 0x7333 //RX_BWE_UV_EQ +296 0x199A //RX_BWE_V_EQ +297 0x7333 //RX_BWE_TONE_TH +298 0x0004 //RX_BWE_UV_HOLD_T +299 0x6CCD //RX_BWE_GAIN2_ALPHA +300 0x799A //RX_BWE_GAIN3_ALPHA +301 0x001E //RX_BWE_CUTOFF +302 0x3000 //RX_BWE_GAINFILL +303 0x3200 //RX_BWE_MAXTH_TONE +304 0x2000 //RX_BWE_EQ_0 +305 0x2000 //RX_BWE_EQ_1 +306 0x2000 //RX_BWE_EQ_2 +307 0x2000 //RX_BWE_EQ_3 +308 0x2000 //RX_BWE_EQ_4 +309 0x2000 //RX_BWE_EQ_5 +310 0x2000 //RX_BWE_EQ_6 +311 0x0000 //RX_BWE_RESRV_0 +312 0x0000 //RX_BWE_RESRV_1 +313 0x0000 //RX_BWE_RESRV_2 +#VOL 0 +163 0x6000 //RX_TDDRC_ALPHA_UP_1 +164 0x6000 //RX_TDDRC_ALPHA_UP_2 +165 0x6000 //RX_TDDRC_ALPHA_UP_3 +166 0x1000 //RX_TDDRC_ALPHA_UP_4 +184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +185 0x4000 //RX_TDDRC_ALPHA_DWN_2 +186 0x4000 //RX_TDDRC_ALPHA_DWN_3 +189 0x4000 //RX_TDDRC_ALPHA_DWN_4 +190 0x7214 //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +269 0x0002 //RX_TDDRC_THRD_0 +270 0x0004 //RX_TDDRC_THRD_1 +271 0x1800 //RX_TDDRC_THRD_2 +272 0x1800 //RX_TDDRC_THRD_3 +273 0x7FFF //RX_TDDRC_SLANT_0 +274 0x7FFF //RX_TDDRC_SLANT_1 +275 0x6000 //RX_TDDRC_ALPHA_UP_0 +276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x199A //RX_TDDRC_HMNC_GAIN +279 0x0001 //RX_TDDRC_SMT_FLAG +280 0x0CCD //RX_TDDRC_SMT_W +281 0x0780 //RX_TDDRC_DRC_GAIN +195 0x001C //RX_FDEQ_SUBNUM +196 0x5C5C //RX_FDEQ_GAIN_0 +197 0x5448 //RX_FDEQ_GAIN_1 +198 0x4848 //RX_FDEQ_GAIN_2 +199 0x4840 //RX_FDEQ_GAIN_3 +200 0x4848 //RX_FDEQ_GAIN_4 +201 0x6048 //RX_FDEQ_GAIN_5 +202 0x4C40 //RX_FDEQ_GAIN_6 +203 0x4038 //RX_FDEQ_GAIN_7 +204 0x3C48 //RX_FDEQ_GAIN_8 +205 0x545C //RX_FDEQ_GAIN_9 +206 0x6864 //RX_FDEQ_GAIN_10 +207 0x7058 //RX_FDEQ_GAIN_11 +208 0x443C //RX_FDEQ_GAIN_12 +209 0x3838 //RX_FDEQ_GAIN_13 +210 0x4848 //RX_FDEQ_GAIN_14 +211 0x4848 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0202 //RX_FDEQ_BIN_0 +221 0x0203 //RX_FDEQ_BIN_1 +222 0x0303 //RX_FDEQ_BIN_2 +223 0x0304 //RX_FDEQ_BIN_3 +224 0x0404 //RX_FDEQ_BIN_4 +225 0x0204 //RX_FDEQ_BIN_5 +226 0x0A0A //RX_FDEQ_BIN_6 +227 0x0A0A //RX_FDEQ_BIN_7 +228 0x0B0C //RX_FDEQ_BIN_8 +229 0x0D0E //RX_FDEQ_BIN_9 +230 0x0E0F //RX_FDEQ_BIN_10 +231 0x0F10 //RX_FDEQ_BIN_11 +232 0x1011 //RX_FDEQ_BIN_12 +233 0x1104 //RX_FDEQ_BIN_13 +234 0x0000 //RX_FDEQ_BIN_14 +235 0x0000 //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x4000 //RX_FDEQ_RESRV_0 +245 0x0320 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0035 //RX_FDDRC_BAND_MARGIN_1 +248 0x00D5 //RX_FDDRC_BAND_MARGIN_2 +249 0x0120 //RX_FDDRC_BAND_MARGIN_3 +250 0x0004 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x2000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x2000 //RX_FDDRC_THRD_3_2 +258 0x5000 //RX_FDDRC_THRD_3_3 +259 0x4000 //RX_FDDRC_SLANT_0_0 +260 0x4000 //RX_FDDRC_SLANT_0_1 +261 0x4000 //RX_FDDRC_SLANT_0_2 +262 0x4000 //RX_FDDRC_SLANT_0_3 +263 0x7FFF //RX_FDDRC_SLANT_1_0 +264 0x7FFF //RX_FDDRC_SLANT_1_1 +265 0x7FFF //RX_FDDRC_SLANT_1_2 +266 0x7FFF //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +286 0x0011 //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 +#VOL 1 +163 0x6000 //RX_TDDRC_ALPHA_UP_1 +164 0x6000 //RX_TDDRC_ALPHA_UP_2 +165 0x6000 //RX_TDDRC_ALPHA_UP_3 +166 0x1000 //RX_TDDRC_ALPHA_UP_4 +184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +185 0x4000 //RX_TDDRC_ALPHA_DWN_2 +186 0x4000 //RX_TDDRC_ALPHA_DWN_3 +189 0x4000 //RX_TDDRC_ALPHA_DWN_4 +190 0x7214 //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +269 0x0002 //RX_TDDRC_THRD_0 +270 0x0004 //RX_TDDRC_THRD_1 +271 0x1800 //RX_TDDRC_THRD_2 +272 0x1800 //RX_TDDRC_THRD_3 +273 0x7FFF //RX_TDDRC_SLANT_0 +274 0x7FFF //RX_TDDRC_SLANT_1 +275 0x6000 //RX_TDDRC_ALPHA_UP_0 +276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x199A //RX_TDDRC_HMNC_GAIN +279 0x0001 //RX_TDDRC_SMT_FLAG +280 0x0CCD //RX_TDDRC_SMT_W +281 0x0780 //RX_TDDRC_DRC_GAIN +195 0x001C //RX_FDEQ_SUBNUM +196 0x5C5C //RX_FDEQ_GAIN_0 +197 0x5448 //RX_FDEQ_GAIN_1 +198 0x4848 //RX_FDEQ_GAIN_2 +199 0x4840 //RX_FDEQ_GAIN_3 +200 0x4848 //RX_FDEQ_GAIN_4 +201 0x6048 //RX_FDEQ_GAIN_5 +202 0x4C40 //RX_FDEQ_GAIN_6 +203 0x4038 //RX_FDEQ_GAIN_7 +204 0x3C48 //RX_FDEQ_GAIN_8 +205 0x545C //RX_FDEQ_GAIN_9 +206 0x6864 //RX_FDEQ_GAIN_10 +207 0x7058 //RX_FDEQ_GAIN_11 +208 0x443C //RX_FDEQ_GAIN_12 +209 0x3838 //RX_FDEQ_GAIN_13 +210 0x4848 //RX_FDEQ_GAIN_14 +211 0x4848 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0202 //RX_FDEQ_BIN_0 +221 0x0203 //RX_FDEQ_BIN_1 +222 0x0303 //RX_FDEQ_BIN_2 +223 0x0304 //RX_FDEQ_BIN_3 +224 0x0404 //RX_FDEQ_BIN_4 +225 0x0204 //RX_FDEQ_BIN_5 +226 0x0A0A //RX_FDEQ_BIN_6 +227 0x0A0A //RX_FDEQ_BIN_7 +228 0x0B0C //RX_FDEQ_BIN_8 +229 0x0D0E //RX_FDEQ_BIN_9 +230 0x0E0F //RX_FDEQ_BIN_10 +231 0x0F10 //RX_FDEQ_BIN_11 +232 0x1011 //RX_FDEQ_BIN_12 +233 0x1104 //RX_FDEQ_BIN_13 +234 0x0000 //RX_FDEQ_BIN_14 +235 0x0000 //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x4000 //RX_FDEQ_RESRV_0 +245 0x0320 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0035 //RX_FDDRC_BAND_MARGIN_1 +248 0x00D5 //RX_FDDRC_BAND_MARGIN_2 +249 0x0120 //RX_FDDRC_BAND_MARGIN_3 +250 0x0004 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x2000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x2000 //RX_FDDRC_THRD_3_2 +258 0x5000 //RX_FDDRC_THRD_3_3 +259 0x4000 //RX_FDDRC_SLANT_0_0 +260 0x4000 //RX_FDDRC_SLANT_0_1 +261 0x4000 //RX_FDDRC_SLANT_0_2 +262 0x4000 //RX_FDDRC_SLANT_0_3 +263 0x7FFF //RX_FDDRC_SLANT_1_0 +264 0x7FFF //RX_FDDRC_SLANT_1_1 +265 0x7FFF //RX_FDDRC_SLANT_1_2 +266 0x7FFF //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +286 0x0019 //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 +#VOL 2 +163 0x6000 //RX_TDDRC_ALPHA_UP_1 +164 0x6000 //RX_TDDRC_ALPHA_UP_2 +165 0x6000 //RX_TDDRC_ALPHA_UP_3 +166 0x1000 //RX_TDDRC_ALPHA_UP_4 +184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +185 0x4000 //RX_TDDRC_ALPHA_DWN_2 +186 0x4000 //RX_TDDRC_ALPHA_DWN_3 +189 0x4000 //RX_TDDRC_ALPHA_DWN_4 +190 0x7214 //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +269 0x0002 //RX_TDDRC_THRD_0 +270 0x0004 //RX_TDDRC_THRD_1 +271 0x1800 //RX_TDDRC_THRD_2 +272 0x1800 //RX_TDDRC_THRD_3 +273 0x7FFF //RX_TDDRC_SLANT_0 +274 0x7FFF //RX_TDDRC_SLANT_1 +275 0x6000 //RX_TDDRC_ALPHA_UP_0 +276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x199A //RX_TDDRC_HMNC_GAIN +279 0x0001 //RX_TDDRC_SMT_FLAG +280 0x0CCD //RX_TDDRC_SMT_W +281 0x0780 //RX_TDDRC_DRC_GAIN +195 0x001C //RX_FDEQ_SUBNUM +196 0x5C5C //RX_FDEQ_GAIN_0 +197 0x5448 //RX_FDEQ_GAIN_1 +198 0x4848 //RX_FDEQ_GAIN_2 +199 0x4840 //RX_FDEQ_GAIN_3 +200 0x4848 //RX_FDEQ_GAIN_4 +201 0x6048 //RX_FDEQ_GAIN_5 +202 0x4C40 //RX_FDEQ_GAIN_6 +203 0x4038 //RX_FDEQ_GAIN_7 +204 0x3C48 //RX_FDEQ_GAIN_8 +205 0x545C //RX_FDEQ_GAIN_9 +206 0x6864 //RX_FDEQ_GAIN_10 +207 0x7058 //RX_FDEQ_GAIN_11 +208 0x443C //RX_FDEQ_GAIN_12 +209 0x3838 //RX_FDEQ_GAIN_13 +210 0x4848 //RX_FDEQ_GAIN_14 +211 0x4848 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0202 //RX_FDEQ_BIN_0 +221 0x0203 //RX_FDEQ_BIN_1 +222 0x0303 //RX_FDEQ_BIN_2 +223 0x0304 //RX_FDEQ_BIN_3 +224 0x0404 //RX_FDEQ_BIN_4 +225 0x0204 //RX_FDEQ_BIN_5 +226 0x0A0A //RX_FDEQ_BIN_6 +227 0x0A0A //RX_FDEQ_BIN_7 +228 0x0B0C //RX_FDEQ_BIN_8 +229 0x0D0E //RX_FDEQ_BIN_9 +230 0x0E0F //RX_FDEQ_BIN_10 +231 0x0F10 //RX_FDEQ_BIN_11 +232 0x1011 //RX_FDEQ_BIN_12 +233 0x1104 //RX_FDEQ_BIN_13 +234 0x0000 //RX_FDEQ_BIN_14 +235 0x0000 //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x4000 //RX_FDEQ_RESRV_0 +245 0x0320 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0035 //RX_FDDRC_BAND_MARGIN_1 +248 0x00D5 //RX_FDDRC_BAND_MARGIN_2 +249 0x0120 //RX_FDDRC_BAND_MARGIN_3 +250 0x0004 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x2000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x2000 //RX_FDDRC_THRD_3_2 +258 0x5000 //RX_FDDRC_THRD_3_3 +259 0x4000 //RX_FDDRC_SLANT_0_0 +260 0x4000 //RX_FDDRC_SLANT_0_1 +261 0x4000 //RX_FDDRC_SLANT_0_2 +262 0x4000 //RX_FDDRC_SLANT_0_3 +263 0x7FFF //RX_FDDRC_SLANT_1_0 +264 0x7FFF //RX_FDDRC_SLANT_1_1 +265 0x7FFF //RX_FDDRC_SLANT_1_2 +266 0x7FFF //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +286 0x0024 //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 +#VOL 3 +163 0x6000 //RX_TDDRC_ALPHA_UP_1 +164 0x6000 //RX_TDDRC_ALPHA_UP_2 +165 0x6000 //RX_TDDRC_ALPHA_UP_3 +166 0x1000 //RX_TDDRC_ALPHA_UP_4 +184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +185 0x4000 //RX_TDDRC_ALPHA_DWN_2 +186 0x4000 //RX_TDDRC_ALPHA_DWN_3 +189 0x4000 //RX_TDDRC_ALPHA_DWN_4 +190 0x7214 //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +269 0x0002 //RX_TDDRC_THRD_0 +270 0x0004 //RX_TDDRC_THRD_1 +271 0x1800 //RX_TDDRC_THRD_2 +272 0x1800 //RX_TDDRC_THRD_3 +273 0x7FFF //RX_TDDRC_SLANT_0 +274 0x7FFF //RX_TDDRC_SLANT_1 +275 0x6000 //RX_TDDRC_ALPHA_UP_0 +276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x199A //RX_TDDRC_HMNC_GAIN +279 0x0001 //RX_TDDRC_SMT_FLAG +280 0x0CCD //RX_TDDRC_SMT_W +281 0x0780 //RX_TDDRC_DRC_GAIN +195 0x001C //RX_FDEQ_SUBNUM +196 0x5C5C //RX_FDEQ_GAIN_0 +197 0x5448 //RX_FDEQ_GAIN_1 +198 0x4848 //RX_FDEQ_GAIN_2 +199 0x4840 //RX_FDEQ_GAIN_3 +200 0x4848 //RX_FDEQ_GAIN_4 +201 0x6048 //RX_FDEQ_GAIN_5 +202 0x4C40 //RX_FDEQ_GAIN_6 +203 0x4038 //RX_FDEQ_GAIN_7 +204 0x3C48 //RX_FDEQ_GAIN_8 +205 0x545C //RX_FDEQ_GAIN_9 +206 0x6864 //RX_FDEQ_GAIN_10 +207 0x7058 //RX_FDEQ_GAIN_11 +208 0x443C //RX_FDEQ_GAIN_12 +209 0x3838 //RX_FDEQ_GAIN_13 +210 0x4848 //RX_FDEQ_GAIN_14 +211 0x4848 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0202 //RX_FDEQ_BIN_0 +221 0x0203 //RX_FDEQ_BIN_1 +222 0x0303 //RX_FDEQ_BIN_2 +223 0x0304 //RX_FDEQ_BIN_3 +224 0x0404 //RX_FDEQ_BIN_4 +225 0x0204 //RX_FDEQ_BIN_5 +226 0x0A0A //RX_FDEQ_BIN_6 +227 0x0A0A //RX_FDEQ_BIN_7 +228 0x0B0C //RX_FDEQ_BIN_8 +229 0x0D0E //RX_FDEQ_BIN_9 +230 0x0E0F //RX_FDEQ_BIN_10 +231 0x0F10 //RX_FDEQ_BIN_11 +232 0x1011 //RX_FDEQ_BIN_12 +233 0x1104 //RX_FDEQ_BIN_13 +234 0x0000 //RX_FDEQ_BIN_14 +235 0x0000 //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x4000 //RX_FDEQ_RESRV_0 +245 0x0320 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0035 //RX_FDDRC_BAND_MARGIN_1 +248 0x00D5 //RX_FDDRC_BAND_MARGIN_2 +249 0x0120 //RX_FDDRC_BAND_MARGIN_3 +250 0x0004 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x2000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x2000 //RX_FDDRC_THRD_3_2 +258 0x5000 //RX_FDDRC_THRD_3_3 +259 0x4000 //RX_FDDRC_SLANT_0_0 +260 0x4000 //RX_FDDRC_SLANT_0_1 +261 0x4000 //RX_FDDRC_SLANT_0_2 +262 0x4000 //RX_FDDRC_SLANT_0_3 +263 0x7FFF //RX_FDDRC_SLANT_1_0 +264 0x7FFF //RX_FDDRC_SLANT_1_1 +265 0x7FFF //RX_FDDRC_SLANT_1_2 +266 0x7FFF //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +286 0x0034 //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 +#VOL 4 +163 0x6000 //RX_TDDRC_ALPHA_UP_1 +164 0x6000 //RX_TDDRC_ALPHA_UP_2 +165 0x6000 //RX_TDDRC_ALPHA_UP_3 +166 0x1000 //RX_TDDRC_ALPHA_UP_4 +184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +185 0x4000 //RX_TDDRC_ALPHA_DWN_2 +186 0x4000 //RX_TDDRC_ALPHA_DWN_3 +189 0x4000 //RX_TDDRC_ALPHA_DWN_4 +190 0x7214 //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +269 0x0002 //RX_TDDRC_THRD_0 +270 0x0004 //RX_TDDRC_THRD_1 +271 0x1800 //RX_TDDRC_THRD_2 +272 0x1800 //RX_TDDRC_THRD_3 +273 0x7FFF //RX_TDDRC_SLANT_0 +274 0x7FFF //RX_TDDRC_SLANT_1 +275 0x6000 //RX_TDDRC_ALPHA_UP_0 +276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x199A //RX_TDDRC_HMNC_GAIN +279 0x0001 //RX_TDDRC_SMT_FLAG +280 0x0CCD //RX_TDDRC_SMT_W +281 0x0B39 //RX_TDDRC_DRC_GAIN +195 0x001C //RX_FDEQ_SUBNUM +196 0x6868 //RX_FDEQ_GAIN_0 +197 0x685C //RX_FDEQ_GAIN_1 +198 0x6868 //RX_FDEQ_GAIN_2 +199 0x544C //RX_FDEQ_GAIN_3 +200 0x4C54 //RX_FDEQ_GAIN_4 +201 0x704C //RX_FDEQ_GAIN_5 +202 0x4C40 //RX_FDEQ_GAIN_6 +203 0x4040 //RX_FDEQ_GAIN_7 +204 0x445C //RX_FDEQ_GAIN_8 +205 0x6068 //RX_FDEQ_GAIN_9 +206 0x7070 //RX_FDEQ_GAIN_10 +207 0x7C74 //RX_FDEQ_GAIN_11 +208 0x6060 //RX_FDEQ_GAIN_12 +209 0x6C6C //RX_FDEQ_GAIN_13 +210 0x4848 //RX_FDEQ_GAIN_14 +211 0x4848 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0202 //RX_FDEQ_BIN_0 +221 0x0203 //RX_FDEQ_BIN_1 +222 0x0303 //RX_FDEQ_BIN_2 +223 0x0304 //RX_FDEQ_BIN_3 +224 0x0404 //RX_FDEQ_BIN_4 +225 0x0204 //RX_FDEQ_BIN_5 +226 0x0A0A //RX_FDEQ_BIN_6 +227 0x0A0A //RX_FDEQ_BIN_7 +228 0x0B0C //RX_FDEQ_BIN_8 +229 0x0D0E //RX_FDEQ_BIN_9 +230 0x0E0F //RX_FDEQ_BIN_10 +231 0x0F10 //RX_FDEQ_BIN_11 +232 0x1011 //RX_FDEQ_BIN_12 +233 0x1104 //RX_FDEQ_BIN_13 +234 0x0000 //RX_FDEQ_BIN_14 +235 0x0000 //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x4000 //RX_FDEQ_RESRV_0 +245 0x0320 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0035 //RX_FDDRC_BAND_MARGIN_1 +248 0x00D5 //RX_FDDRC_BAND_MARGIN_2 +249 0x0120 //RX_FDDRC_BAND_MARGIN_3 +250 0x0004 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x2000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x2000 //RX_FDDRC_THRD_3_2 +258 0x5000 //RX_FDDRC_THRD_3_3 +259 0x4000 //RX_FDDRC_SLANT_0_0 +260 0x4000 //RX_FDDRC_SLANT_0_1 +261 0x4000 //RX_FDDRC_SLANT_0_2 +262 0x4000 //RX_FDDRC_SLANT_0_3 +263 0x7FFF //RX_FDDRC_SLANT_1_0 +264 0x7FFF //RX_FDDRC_SLANT_1_1 +265 0x7FFF //RX_FDDRC_SLANT_1_2 +266 0x7FFF //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +286 0x0038 //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 +#VOL 5 +163 0x6000 //RX_TDDRC_ALPHA_UP_1 +164 0x6000 //RX_TDDRC_ALPHA_UP_2 +165 0x6000 //RX_TDDRC_ALPHA_UP_3 +166 0x1000 //RX_TDDRC_ALPHA_UP_4 +184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +185 0x4000 //RX_TDDRC_ALPHA_DWN_2 +186 0x4000 //RX_TDDRC_ALPHA_DWN_3 +189 0x4000 //RX_TDDRC_ALPHA_DWN_4 +190 0x7214 //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +269 0x0002 //RX_TDDRC_THRD_0 +270 0x0004 //RX_TDDRC_THRD_1 +271 0x1800 //RX_TDDRC_THRD_2 +272 0x1800 //RX_TDDRC_THRD_3 +273 0x7FFF //RX_TDDRC_SLANT_0 +274 0x7FFF //RX_TDDRC_SLANT_1 +275 0x6000 //RX_TDDRC_ALPHA_UP_0 +276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x199A //RX_TDDRC_HMNC_GAIN +279 0x0001 //RX_TDDRC_SMT_FLAG +280 0x0CCD //RX_TDDRC_SMT_W +281 0x0B39 //RX_TDDRC_DRC_GAIN +195 0x001C //RX_FDEQ_SUBNUM +196 0x6868 //RX_FDEQ_GAIN_0 +197 0x685C //RX_FDEQ_GAIN_1 +198 0x6868 //RX_FDEQ_GAIN_2 +199 0x544C //RX_FDEQ_GAIN_3 +200 0x4C54 //RX_FDEQ_GAIN_4 +201 0x704C //RX_FDEQ_GAIN_5 +202 0x4C40 //RX_FDEQ_GAIN_6 +203 0x4040 //RX_FDEQ_GAIN_7 +204 0x445C //RX_FDEQ_GAIN_8 +205 0x6068 //RX_FDEQ_GAIN_9 +206 0x7070 //RX_FDEQ_GAIN_10 +207 0x7C74 //RX_FDEQ_GAIN_11 +208 0x6060 //RX_FDEQ_GAIN_12 +209 0x6C6C //RX_FDEQ_GAIN_13 +210 0x4848 //RX_FDEQ_GAIN_14 +211 0x4848 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0202 //RX_FDEQ_BIN_0 +221 0x0203 //RX_FDEQ_BIN_1 +222 0x0303 //RX_FDEQ_BIN_2 +223 0x0304 //RX_FDEQ_BIN_3 +224 0x0404 //RX_FDEQ_BIN_4 +225 0x0204 //RX_FDEQ_BIN_5 +226 0x0A0A //RX_FDEQ_BIN_6 +227 0x0A0A //RX_FDEQ_BIN_7 +228 0x0B0C //RX_FDEQ_BIN_8 +229 0x0D0E //RX_FDEQ_BIN_9 +230 0x0E0F //RX_FDEQ_BIN_10 +231 0x0F10 //RX_FDEQ_BIN_11 +232 0x1011 //RX_FDEQ_BIN_12 +233 0x1104 //RX_FDEQ_BIN_13 +234 0x0000 //RX_FDEQ_BIN_14 +235 0x0000 //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x4000 //RX_FDEQ_RESRV_0 +245 0x0320 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0035 //RX_FDDRC_BAND_MARGIN_1 +248 0x00D5 //RX_FDDRC_BAND_MARGIN_2 +249 0x0120 //RX_FDDRC_BAND_MARGIN_3 +250 0x0004 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x2000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x2000 //RX_FDDRC_THRD_3_2 +258 0x5000 //RX_FDDRC_THRD_3_3 +259 0x4000 //RX_FDDRC_SLANT_0_0 +260 0x4000 //RX_FDDRC_SLANT_0_1 +261 0x4000 //RX_FDDRC_SLANT_0_2 +262 0x4000 //RX_FDDRC_SLANT_0_3 +263 0x7FFF //RX_FDDRC_SLANT_1_0 +264 0x7FFF //RX_FDDRC_SLANT_1_1 +265 0x7FFF //RX_FDDRC_SLANT_1_2 +266 0x7FFF //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +286 0x0060 //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 +#VOL 6 +163 0x6000 //RX_TDDRC_ALPHA_UP_1 +164 0x6000 //RX_TDDRC_ALPHA_UP_2 +165 0x6000 //RX_TDDRC_ALPHA_UP_3 +166 0x1000 //RX_TDDRC_ALPHA_UP_4 +184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +185 0x4000 //RX_TDDRC_ALPHA_DWN_2 +186 0x4000 //RX_TDDRC_ALPHA_DWN_3 +189 0x4000 //RX_TDDRC_ALPHA_DWN_4 +190 0x7214 //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +269 0x0002 //RX_TDDRC_THRD_0 +270 0x0004 //RX_TDDRC_THRD_1 +271 0x1800 //RX_TDDRC_THRD_2 +272 0x1800 //RX_TDDRC_THRD_3 +273 0x7FFF //RX_TDDRC_SLANT_0 +274 0x7FFF //RX_TDDRC_SLANT_1 +275 0x6000 //RX_TDDRC_ALPHA_UP_0 +276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x199A //RX_TDDRC_HMNC_GAIN +279 0x0001 //RX_TDDRC_SMT_FLAG +280 0x0CCD //RX_TDDRC_SMT_W +281 0x0B39 //RX_TDDRC_DRC_GAIN +195 0x001C //RX_FDEQ_SUBNUM +196 0x6868 //RX_FDEQ_GAIN_0 +197 0x685C //RX_FDEQ_GAIN_1 +198 0x6868 //RX_FDEQ_GAIN_2 +199 0x544C //RX_FDEQ_GAIN_3 +200 0x4C54 //RX_FDEQ_GAIN_4 +201 0x704C //RX_FDEQ_GAIN_5 +202 0x4C40 //RX_FDEQ_GAIN_6 +203 0x4040 //RX_FDEQ_GAIN_7 +204 0x445C //RX_FDEQ_GAIN_8 +205 0x6068 //RX_FDEQ_GAIN_9 +206 0x7070 //RX_FDEQ_GAIN_10 +207 0x7C74 //RX_FDEQ_GAIN_11 +208 0x6060 //RX_FDEQ_GAIN_12 +209 0x6C6C //RX_FDEQ_GAIN_13 +210 0x4848 //RX_FDEQ_GAIN_14 +211 0x4848 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0202 //RX_FDEQ_BIN_0 +221 0x0203 //RX_FDEQ_BIN_1 +222 0x0303 //RX_FDEQ_BIN_2 +223 0x0304 //RX_FDEQ_BIN_3 +224 0x0404 //RX_FDEQ_BIN_4 +225 0x0204 //RX_FDEQ_BIN_5 +226 0x0A0A //RX_FDEQ_BIN_6 +227 0x0A0A //RX_FDEQ_BIN_7 +228 0x0B0C //RX_FDEQ_BIN_8 +229 0x0D0E //RX_FDEQ_BIN_9 +230 0x0E0F //RX_FDEQ_BIN_10 +231 0x0F10 //RX_FDEQ_BIN_11 +232 0x1011 //RX_FDEQ_BIN_12 +233 0x1104 //RX_FDEQ_BIN_13 +234 0x0000 //RX_FDEQ_BIN_14 +235 0x0000 //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x4000 //RX_FDEQ_RESRV_0 +245 0x0320 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0035 //RX_FDDRC_BAND_MARGIN_1 +248 0x00D5 //RX_FDDRC_BAND_MARGIN_2 +249 0x0120 //RX_FDDRC_BAND_MARGIN_3 +250 0x0004 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x2000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x2000 //RX_FDDRC_THRD_3_2 +258 0x5000 //RX_FDDRC_THRD_3_3 +259 0x4000 //RX_FDDRC_SLANT_0_0 +260 0x4000 //RX_FDDRC_SLANT_0_1 +261 0x4000 //RX_FDDRC_SLANT_0_2 +262 0x4000 //RX_FDDRC_SLANT_0_3 +263 0x7FFF //RX_FDDRC_SLANT_1_0 +264 0x7FFF //RX_FDDRC_SLANT_1_1 +265 0x7FFF //RX_FDDRC_SLANT_1_2 +266 0x7FFF //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +286 0x0100 //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 #CASE_NAME HEADSET-TTY_HCO-VOICE_GENERIC-SWB -#PARAM_MODE FULL -#PARAM_TYPE TX+RX -#TOTAL_CUSTOM_STEP 7 +#PARAM_MODE Full +#PARAM_TYPE TX+2RX +#TOTAL_CUSTOM_STEP 7+7 #TX 0 0x0001 //TX_OPERATION_MODE_0 1 0x0000 //TX_OPERATION_MODE_1 @@ -38838,7 +58990,7 @@ 239 0x0000 //TX_DT_RESRV_7 240 0x0000 //TX_DT_RESRV_8 241 0x0000 //TX_DT_RESRV_9 -242 0xF200 //TX_THR_SN_EST_0 +242 0xFA00 //TX_THR_SN_EST_0 243 0xF400 //TX_THR_SN_EST_1 244 0xF800 //TX_THR_SN_EST_2 245 0xF600 //TX_THR_SN_EST_3 @@ -38847,12 +58999,12 @@ 248 0xF800 //TX_THR_SN_EST_6 249 0xF800 //TX_THR_SN_EST_7 250 0x0100 //TX_DELTA_THR_SN_EST_0 -251 0x0000 //TX_DELTA_THR_SN_EST_1 +251 0x0100 //TX_DELTA_THR_SN_EST_1 252 0x0100 //TX_DELTA_THR_SN_EST_2 -253 0x0100 //TX_DELTA_THR_SN_EST_3 +253 0x0200 //TX_DELTA_THR_SN_EST_3 254 0x0200 //TX_DELTA_THR_SN_EST_4 255 0x0200 //TX_DELTA_THR_SN_EST_5 -256 0x0200 //TX_DELTA_THR_SN_EST_6 +256 0x0000 //TX_DELTA_THR_SN_EST_6 257 0x0200 //TX_DELTA_THR_SN_EST_7 258 0x4000 //TX_LAMBDA_NN_EST_0 259 0x4000 //TX_LAMBDA_NN_EST_1 @@ -38878,12 +59030,12 @@ 279 0x0000 //TX_B_POST_FLT_0 280 0x0000 //TX_B_POST_FLT_1 281 0x001A //TX_NS_LVL_CTRL_0 -282 0x001A //TX_NS_LVL_CTRL_1 +282 0x0014 //TX_NS_LVL_CTRL_1 283 0x0014 //TX_NS_LVL_CTRL_2 -284 0x0014 //TX_NS_LVL_CTRL_3 +284 0x000C //TX_NS_LVL_CTRL_3 285 0x000C //TX_NS_LVL_CTRL_4 286 0x000C //TX_NS_LVL_CTRL_5 -287 0x000C //TX_NS_LVL_CTRL_6 +287 0x001A //TX_NS_LVL_CTRL_6 288 0x000C //TX_NS_LVL_CTRL_7 289 0x000E //TX_MIN_GAIN_S_0 290 0x0014 //TX_MIN_GAIN_S_1 @@ -38899,10 +59051,10 @@ 300 0x7FFF //TX_SNRI_SUP_0 301 0x7FFF //TX_SNRI_SUP_1 302 0x7FFF //TX_SNRI_SUP_2 -303 0x7FFF //TX_SNRI_SUP_3 +303 0x4000 //TX_SNRI_SUP_3 304 0x4000 //TX_SNRI_SUP_4 305 0x4000 //TX_SNRI_SUP_5 -306 0x4000 //TX_SNRI_SUP_6 +306 0x7FFF //TX_SNRI_SUP_6 307 0x4000 //TX_SNRI_SUP_7 308 0x1200 //TX_THR_LFNS 309 0x0147 //TX_G_LFNS @@ -38911,12 +59063,12 @@ 312 0x7FFF //TX_A_POST_FILT_0 313 0x7FFF //TX_A_POST_FILT_1 314 0x4000 //TX_A_POST_FILT_S_0 -315 0x199A //TX_A_POST_FILT_S_1 +315 0x1000 //TX_A_POST_FILT_S_1 316 0x1000 //TX_A_POST_FILT_S_2 -317 0x1000 //TX_A_POST_FILT_S_3 +317 0x6666 //TX_A_POST_FILT_S_3 318 0x6666 //TX_A_POST_FILT_S_4 319 0x6666 //TX_A_POST_FILT_S_5 -320 0x6666 //TX_A_POST_FILT_S_6 +320 0x199A //TX_A_POST_FILT_S_6 321 0x6666 //TX_A_POST_FILT_S_7 322 0x2000 //TX_B_POST_FILT_0 323 0x2000 //TX_B_POST_FILT_1 @@ -38963,7 +59115,7 @@ 364 0x0000 //TX_K_APT 365 0x0001 //TX_NOISEDET 366 0x05A0 //TX_NDETCT -367 0x000A //TX_NOISE_TH_0 +367 0x0383 //TX_NOISE_TH_0 368 0x1388 //TX_NOISE_TH_0_2 369 0x3A98 //TX_NOISE_TH_0_3 370 0x0C80 //TX_NOISE_TH_1 @@ -38975,11 +59127,11 @@ 376 0x7FFF //TX_NOISE_TH_5_3 377 0x7FFF //TX_NOISE_TH_5_4 378 0x00C8 //TX_NOISE_TH_6 -379 0x000A //TX_MINENOISE_TH -380 0x0000 //TX_MINENOISE_MIC0_TH_MTS -381 0x0000 //TX_MINENOISE_MIC0_TH_EXP -382 0x0000 //TX_MINENOISE_MIC0_S_TH_MTS -383 0x0000 //TX_MINENOISE_MIC0_S_TH_EXP +379 0x044C //TX_MINENOISE_TH +380 0xD508 //TX_MORENS_TFMASK_TH +381 0x0001 //TX_DRC_QUIET_FLOOR +382 0x3A98 //TX_RATIODTL_CUT_TH +383 0x0DAC //TX_DT_CUT_K1 384 0x6400 //TX_OUT_ENER_S_TH_CLEAN 385 0x6400 //TX_OUT_ENER_S_TH_LESSCLEAN 386 0x6400 //TX_OUT_ENER_S_TH_NOISY @@ -38987,22 +59139,22 @@ 388 0x7D00 //TX_OUT_ENER_TH_SPEECH 389 0x0000 //TX_SN_NPB_GAIN 390 0x0000 //TX_NN_NPB_GAIN -391 0x0000 //TX_CSX_ALPHA_0 -392 0x0000 //TX_CSX_ALPHA_1 -393 0x0000 //TX_CSX_ALPHA_2 -394 0x0000 //TX_CSX_ALPHA_3 -395 0x0000 //TX_MU_ARSP_EST -396 0x0000 //TX_P_OUTBEAM_MIN_TH +391 0x7FFF //TX_POST_MASK_SUP_HSNE +392 0x1388 //TX_TAIL_DET_TH +393 0x4000 //TX_B_LESSCUT_RTO_WTA +394 0x0000 //TX_MEL_G_R +395 0x0080 //TX_SUPHIGH_TH +396 0x0000 //TX_MASK_G_R 397 0x0000 //TX_EXTRA_NS_L -398 0x0000 //TX_EXTRA_NS_A -399 0x0000 //TX_VR_NOISE_FLOOR_TH +398 0x1800 //TX_C_POST_FLT_MASK +399 0x7FFF //TX_A_POST_FLT_WNS 400 0x0000 //TX_MIN_G_LOW300HZ 401 0x0010 //TX_MAXLEVEL_CNG 402 0x0000 //TX_STN_NOISE_TH 403 0x0000 //TX_POST_MASK_SUP 404 0x0000 //TX_POST_MASK_ADJUST 405 0x0014 //TX_NS_ENOISE_MIC0_TH -406 0x0014 //TX_MINENOISE_MIC0_TH +406 0x02F3 //TX_MINENOISE_MIC0_TH 407 0x0226 //TX_MINENOISE_MIC0_S_TH 408 0x2879 //TX_MIN_G_CTRL_SSNS 409 0x0400 //TX_METAL_RTO_THR @@ -39110,16 +59262,16 @@ 511 0x6666 //TX_MIC_TO_BFGAIN 512 0x6666 //TX_MICTOBFGAIN0 513 0x0014 //TX_FASTMUE_TH -514 0x0000 //TX_DERVB_LEN_0 -515 0x0000 //TX_DERVB_LEN_1 -516 0x0000 //TX_RHO_DERVB -517 0x0000 //TX_MIC_INDX_DERVB -518 0x0000 //TX_MU_DERVB -519 0x0000 //TX_DR_RESRV_0 -520 0x0000 //TX_DR_RESRV_1 -521 0x0000 //TX_DR_RESRV_2 -522 0x0000 //TX_DR_RESRV_3 -523 0x0000 //TX_DR_RESRV_4 +514 0xC000 //TX_DEREVERB_LF_MU +515 0xC000 //TX_DEREVERB_HF_MU +516 0xCCCC //TX_DEREVERB_DELAY +517 0xD999 //TX_DEREVERB_COEF_LEN +518 0x1F40 //TX_DEREVERB_DNR +519 0x0000 //TX_DEREVERB_ALPHA +520 0x0000 //TX_DEREVERB_BETA +521 0x0000 //TX_GSC_RTOL_TH +522 0x7000 //TX_GSC_RTOH_TH +523 0x0064 //TX_WIDE2_MEANHTH 524 0x0000 //TX_DR_RESRV_5 525 0x0000 //TX_DR_RESRV_6 526 0x0000 //TX_DR_RESRV_7 @@ -39485,16 +59637,81 @@ 886 0x0000 //TX_FASTNS_TFMASKBIN_TH2 887 0x0000 //TX_FASTNS_TFMASKBIN_TH3 888 0x00C8 //TX_FASTNS_ARSPC_TH -889 0xD99A //TX_FASTNS_MASK5_TH +889 0x8000 //TX_FASTNS_MASK5_TH 890 0x051F //TX_POSTSSA_MIN_G_VR_MASK -891 0x7FFF //TX_A_LESSCUT_RTO_MASK +891 0x4000 //TX_A_LESSCUT_RTO_MASK 892 0x1770 //TX_FASTNS_NOISETH 893 0xC000 //TX_FASTNS_SSA_THLFL 894 0xC000 //TX_FASTNS_SSA_THHFL 895 0xCCCC //TX_FASTNS_SSA_THLFH 896 0xD999 //TX_FASTNS_SSA_THHFH +897 0x2339 //TX_SENDFUNC_REG_MICMUTE +898 0x0021 //TX_SENDFUNC_REG_MICMUTE1 +899 0x02BC //TX_MICMUTE_RATIO_THR +900 0x0140 //TX_MICMUTE_AMP_THR +901 0x0004 //TX_MICMUTE_HPF_IND +902 0x00C0 //TX_MICMUTE_LOG_EYR_TH +903 0x0008 //TX_MICMUTE_CVG_TIME +904 0x0008 //TX_MICMUTE_RELEASE_TIME +905 0x01FE //TX_MIC_VOLUME_MIC0MUTE +906 0x0020 //TX_MICMUTE_EPD_OFFSET_0 +907 0x001E //TX_MICMUTE_FRQ_AEC_L +908 0x7999 //TX_MICMUTE_EAD_THR +909 0x7FFF //TX_MICMUTE_LAMBDA_CB_NLE +910 0x7FFF //TX_MICMUTE_LAMBDA_RE_EST +911 0x4000 //TX_DTD_THR1_MICMUTE_0 +912 0x7000 //TX_DTD_THR1_MICMUTE_1 +913 0x7FFF //TX_DTD_THR1_MICMUTE_2 +914 0x7FFF //TX_DTD_THR1_MICMUTE_3 +915 0x6CCC //TX_DTD_THR2_MICMUTE_0 +916 0x0400 //TX_MICMUTE_MIN_EQ_RE_EST_0 +917 0x0400 //TX_MICMUTE_MIN_EQ_RE_EST_1 +918 0x1000 //TX_MICMUTE_MIN_EQ_RE_EST_2 +919 0x7FFF //TX_MICMUTE_MIN_EQ_RE_EST_3 +920 0x7FFF //TX_MICMUTE_MIN_EQ_RE_EST_4 +921 0x4000 //TX_MICMUTE_C_POST_FLT +922 0x03E8 //TX_MICMUTE_DT_CUT_K +923 0x0001 //TX_MICMUTE_DT_CUT_THR +924 0x03E8 //TX_MICMUTE_DT_CUT_K2 +925 0x0001 //TX_MICMUTE_DT_CUT_THR2 +926 0x0064 //TX_MICMUTE_DT2_HOLD_N +927 0x1000 //TX_MICMUTE_RATIODTH_THCUT +928 0x1000 //TX_MICMUTE_B_POST_FLT_ECHOL +929 0x7FFF //TX_MICMUTE_B_POST_FLT_ECHOH +930 0x0400 //TX_MICMUTE_C_POST_FLT_MASK +931 0x7999 //TX_MICMUTE_RATIODTL_CUT_TH +932 0x0258 //TX_MICMUTE_DT_CUT_K1 +933 0x0800 //TX_MICMUTE_N2_SN_EST +934 0xFC00 //TX_MICMUTE_THR_SN_EST_0 +935 0x001C //TX_MICMUTE_MIN_G_CTRL_0 +936 0x6000 //TX_MICMUTE_A_POST_FILT_S_0 +937 0x7000 //TX_MICMUTE_B_POST_FILT_0 +938 0x2710 //TX_MIC1RUB_AMP_THR +939 0x0010 //TX_MIC1MUTE_RATIO_THR +940 0x0450 //TX_MIC1MUTE_AMP_THR +941 0x0008 //TX_MIC1MUTE_CVG_TIME +942 0x0008 //TX_MIC1MUTE_RELEASE_TIME +943 0x0000 //TX_AMS_RESRV_01 +944 0x0000 //TX_AMS_RESRV_02 +945 0x0000 //TX_AMS_RESRV_03 +946 0x0000 //TX_AMS_RESRV_04 +947 0x0000 //TX_AMS_RESRV_05 +948 0x0000 //TX_AMS_RESRV_06 +949 0x0000 //TX_AMS_RESRV_07 +950 0x0000 //TX_AMS_RESRV_08 +951 0x0000 //TX_AMS_RESRV_09 +952 0x0000 //TX_AMS_RESRV_10 +953 0x0000 //TX_AMS_RESRV_11 +954 0x0000 //TX_AMS_RESRV_12 +955 0x0000 //TX_AMS_RESRV_13 +956 0x0000 //TX_AMS_RESRV_14 +957 0x0000 //TX_AMS_RESRV_15 +958 0x0000 //TX_AMS_RESRV_16 +959 0x0000 //TX_AMS_RESRV_17 +960 0x0000 //TX_AMS_RESRV_18 +961 0x0000 //TX_AMS_RESRV_19 #RX -0 0x027C //RX_RECVFUNC_MODE_0 +0 0x243C //RX_RECVFUNC_MODE_0 1 0x0000 //RX_RECVFUNC_MODE_1 2 0x0003 //RX_SAMPLINGFREQ_SIG 3 0x0003 //RX_SAMPLINGFREQ_PROC @@ -39504,8 +59721,8 @@ 7 0x6000 //RX_TDDRC_ALPHA_UP_2 8 0x6000 //RX_TDDRC_ALPHA_UP_3 9 0x1000 //RX_TDDRC_ALPHA_UP_4 -10 0x0800 //RX_PGA -11 0x7652 //RX_A_HP +10 0x0403 //RX_PGA +11 0x7D83 //RX_A_HP 12 0x4000 //RX_B_PE 13 0x7800 //RX_THR_PITCH_DET_0 14 0x7000 //RX_THR_PITCH_DET_1 @@ -39533,22 +59750,22 @@ 36 0x0000 //RX_LMT_THRD 37 0x4000 //RX_LMT_ALPHA 38 0x0020 //RX_FDEQ_SUBNUM -39 0x484E //RX_FDEQ_GAIN_0 -40 0x4E4E //RX_FDEQ_GAIN_1 -41 0x4E4E //RX_FDEQ_GAIN_2 +39 0x4848 //RX_FDEQ_GAIN_0 +40 0x4848 //RX_FDEQ_GAIN_1 +41 0x4848 //RX_FDEQ_GAIN_2 42 0x4848 //RX_FDEQ_GAIN_3 -43 0x484E //RX_FDEQ_GAIN_4 -44 0x6E4E //RX_FDEQ_GAIN_5 -45 0x4850 //RX_FDEQ_GAIN_6 +43 0x4848 //RX_FDEQ_GAIN_4 +44 0x7C48 //RX_FDEQ_GAIN_5 +45 0x4848 //RX_FDEQ_GAIN_6 46 0x4848 //RX_FDEQ_GAIN_7 47 0x4860 //RX_FDEQ_GAIN_8 48 0x7468 //RX_FDEQ_GAIN_9 -49 0x6060 //RX_FDEQ_GAIN_10 -50 0x6666 //RX_FDEQ_GAIN_11 -51 0x6666 //RX_FDEQ_GAIN_12 -52 0x6666 //RX_FDEQ_GAIN_13 -53 0x6060 //RX_FDEQ_GAIN_14 -54 0x6060 //RX_FDEQ_GAIN_15 +49 0x5858 //RX_FDEQ_GAIN_10 +50 0x5858 //RX_FDEQ_GAIN_11 +51 0x5C54 //RX_FDEQ_GAIN_12 +52 0x5448 //RX_FDEQ_GAIN_13 +53 0x4848 //RX_FDEQ_GAIN_14 +54 0x5858 //RX_FDEQ_GAIN_15 55 0x4848 //RX_FDEQ_GAIN_16 56 0x4848 //RX_FDEQ_GAIN_17 57 0x4848 //RX_FDEQ_GAIN_18 @@ -39562,7 +59779,7 @@ 65 0x0303 //RX_FDEQ_BIN_2 66 0x0304 //RX_FDEQ_BIN_3 67 0x0404 //RX_FDEQ_BIN_4 -68 0x0209 //RX_FDEQ_BIN_5 +68 0x0308 //RX_FDEQ_BIN_5 69 0x0808 //RX_FDEQ_BIN_6 70 0x090A //RX_FDEQ_BIN_7 71 0x0B0C //RX_FDEQ_BIN_8 @@ -39618,12 +59835,12 @@ 121 0x199A //RX_TDDRC_HMNC_GAIN 122 0x0001 //RX_TDDRC_SMT_FLAG 123 0x0CCD //RX_TDDRC_SMT_W -124 0x04BC //RX_TDDRC_DRC_GAIN +124 0x0550 //RX_TDDRC_DRC_GAIN 125 0x7C00 //RX_LAMBDA_PKA_FP -126 0x2000 //RX_TPKA_FP -127 0x2000 //RX_MIN_G_FP -128 0x0080 //RX_MAX_G_FP -129 0x0019 //RX_SPK_VOL +126 0x0FA0 //RX_TPKA_FP +127 0x0400 //RX_MIN_G_FP +128 0x0800 //RX_MAX_G_FP +129 0x0014 //RX_SPK_VOL 130 0x0000 //RX_VOL_RESRV_0 131 0x0000 //RX_MAXLEVEL_CNG 132 0x3000 //RX_BWE_UV_TH @@ -39657,41 +59874,41 @@ 8 0x6000 //RX_TDDRC_ALPHA_UP_3 9 0x1000 //RX_TDDRC_ALPHA_UP_4 27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 -28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 -29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 -32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +28 0x4000 //RX_TDDRC_ALPHA_DWN_2 +29 0x4000 //RX_TDDRC_ALPHA_DWN_3 +32 0x4000 //RX_TDDRC_ALPHA_DWN_4 33 0x7214 //RX_TDDRC_LIMITER_THRD 34 0x0800 //RX_TDDRC_LIMITER_GAIN 112 0x0002 //RX_TDDRC_THRD_0 113 0x0004 //RX_TDDRC_THRD_1 -114 0x1A00 //RX_TDDRC_THRD_2 -115 0x1A00 //RX_TDDRC_THRD_3 -116 0x7EB8 //RX_TDDRC_SLANT_0 -117 0x2500 //RX_TDDRC_SLANT_1 +114 0x1800 //RX_TDDRC_THRD_2 +115 0x1800 //RX_TDDRC_THRD_3 +116 0x7FFF //RX_TDDRC_SLANT_0 +117 0x7FFF //RX_TDDRC_SLANT_1 118 0x6000 //RX_TDDRC_ALPHA_UP_0 119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 120 0x0000 //RX_TDDRC_HMNC_FLAG 121 0x199A //RX_TDDRC_HMNC_GAIN 122 0x0001 //RX_TDDRC_SMT_FLAG 123 0x0CCD //RX_TDDRC_SMT_W -124 0x04BC //RX_TDDRC_DRC_GAIN +124 0x0780 //RX_TDDRC_DRC_GAIN 38 0x0020 //RX_FDEQ_SUBNUM -39 0x484E //RX_FDEQ_GAIN_0 -40 0x4E4E //RX_FDEQ_GAIN_1 -41 0x4E4E //RX_FDEQ_GAIN_2 -42 0x4848 //RX_FDEQ_GAIN_3 -43 0x484E //RX_FDEQ_GAIN_4 -44 0x6E4E //RX_FDEQ_GAIN_5 -45 0x4850 //RX_FDEQ_GAIN_6 -46 0x4848 //RX_FDEQ_GAIN_7 -47 0x4860 //RX_FDEQ_GAIN_8 -48 0x7468 //RX_FDEQ_GAIN_9 -49 0x6060 //RX_FDEQ_GAIN_10 -50 0x6666 //RX_FDEQ_GAIN_11 -51 0x6666 //RX_FDEQ_GAIN_12 -52 0x6666 //RX_FDEQ_GAIN_13 -53 0x6060 //RX_FDEQ_GAIN_14 -54 0x6060 //RX_FDEQ_GAIN_15 +39 0x6868 //RX_FDEQ_GAIN_0 +40 0x6848 //RX_FDEQ_GAIN_1 +41 0x4848 //RX_FDEQ_GAIN_2 +42 0x3434 //RX_FDEQ_GAIN_3 +43 0x3840 //RX_FDEQ_GAIN_4 +44 0x4838 //RX_FDEQ_GAIN_5 +45 0x5444 //RX_FDEQ_GAIN_6 +46 0x443C //RX_FDEQ_GAIN_7 +47 0x3C60 //RX_FDEQ_GAIN_8 +48 0x6460 //RX_FDEQ_GAIN_9 +49 0x6064 //RX_FDEQ_GAIN_10 +50 0x5C5C //RX_FDEQ_GAIN_11 +51 0x5440 //RX_FDEQ_GAIN_12 +52 0x4040 //RX_FDEQ_GAIN_13 +53 0x4040 //RX_FDEQ_GAIN_14 +54 0x5858 //RX_FDEQ_GAIN_15 55 0x4848 //RX_FDEQ_GAIN_16 56 0x4848 //RX_FDEQ_GAIN_17 57 0x4848 //RX_FDEQ_GAIN_18 @@ -39705,7 +59922,106 @@ 65 0x0303 //RX_FDEQ_BIN_2 66 0x0304 //RX_FDEQ_BIN_3 67 0x0404 //RX_FDEQ_BIN_4 -68 0x0209 //RX_FDEQ_BIN_5 +68 0x0308 //RX_FDEQ_BIN_5 +69 0x0808 //RX_FDEQ_BIN_6 +70 0x090A //RX_FDEQ_BIN_7 +71 0x0B0C //RX_FDEQ_BIN_8 +72 0x0D0E //RX_FDEQ_BIN_9 +73 0x1013 //RX_FDEQ_BIN_10 +74 0x1719 //RX_FDEQ_BIN_11 +75 0x1B1E //RX_FDEQ_BIN_12 +76 0x1E1E //RX_FDEQ_BIN_13 +77 0x1E28 //RX_FDEQ_BIN_14 +78 0x282C //RX_FDEQ_BIN_15 +79 0x0000 //RX_FDEQ_BIN_16 +80 0x0000 //RX_FDEQ_BIN_17 +81 0x0000 //RX_FDEQ_BIN_18 +82 0x0000 //RX_FDEQ_BIN_19 +83 0x0000 //RX_FDEQ_BIN_20 +84 0x0000 //RX_FDEQ_BIN_21 +85 0x0000 //RX_FDEQ_BIN_22 +86 0x0000 //RX_FDEQ_BIN_23 +87 0x4000 //RX_FDEQ_RESRV_0 +88 0x0320 //RX_FDEQ_RESRV_1 +89 0x0018 //RX_FDDRC_BAND_MARGIN_0 +90 0x0035 //RX_FDDRC_BAND_MARGIN_1 +91 0x00D5 //RX_FDDRC_BAND_MARGIN_2 +92 0x0120 //RX_FDDRC_BAND_MARGIN_3 +93 0x0004 //RX_FDDRC_BLOCK_EXP +94 0x5000 //RX_FDDRC_THRD_2_0 +95 0x5000 //RX_FDDRC_THRD_2_1 +96 0x2000 //RX_FDDRC_THRD_2_2 +97 0x5000 //RX_FDDRC_THRD_2_3 +98 0x6400 //RX_FDDRC_THRD_3_0 +99 0x6400 //RX_FDDRC_THRD_3_1 +100 0x2000 //RX_FDDRC_THRD_3_2 +101 0x5000 //RX_FDDRC_THRD_3_3 +102 0x4000 //RX_FDDRC_SLANT_0_0 +103 0x4000 //RX_FDDRC_SLANT_0_1 +104 0x4000 //RX_FDDRC_SLANT_0_2 +105 0x4000 //RX_FDDRC_SLANT_0_3 +106 0x7FFF //RX_FDDRC_SLANT_1_0 +107 0x7FFF //RX_FDDRC_SLANT_1_1 +108 0x7FFF //RX_FDDRC_SLANT_1_2 +109 0x7FFF //RX_FDDRC_SLANT_1_3 +110 0x0000 //RX_FDDRC_RESRV_0 +129 0x0011 //RX_SPK_VOL +130 0x0000 //RX_VOL_RESRV_0 +#VOL 1 +6 0x6000 //RX_TDDRC_ALPHA_UP_1 +7 0x6000 //RX_TDDRC_ALPHA_UP_2 +8 0x6000 //RX_TDDRC_ALPHA_UP_3 +9 0x1000 //RX_TDDRC_ALPHA_UP_4 +27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +28 0x4000 //RX_TDDRC_ALPHA_DWN_2 +29 0x4000 //RX_TDDRC_ALPHA_DWN_3 +32 0x4000 //RX_TDDRC_ALPHA_DWN_4 +33 0x7214 //RX_TDDRC_LIMITER_THRD +34 0x0800 //RX_TDDRC_LIMITER_GAIN +112 0x0002 //RX_TDDRC_THRD_0 +113 0x0004 //RX_TDDRC_THRD_1 +114 0x1800 //RX_TDDRC_THRD_2 +115 0x1800 //RX_TDDRC_THRD_3 +116 0x7FFF //RX_TDDRC_SLANT_0 +117 0x7FFF //RX_TDDRC_SLANT_1 +118 0x6000 //RX_TDDRC_ALPHA_UP_0 +119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +120 0x0000 //RX_TDDRC_HMNC_FLAG +121 0x199A //RX_TDDRC_HMNC_GAIN +122 0x0001 //RX_TDDRC_SMT_FLAG +123 0x0CCD //RX_TDDRC_SMT_W +124 0x0780 //RX_TDDRC_DRC_GAIN +38 0x0020 //RX_FDEQ_SUBNUM +39 0x6868 //RX_FDEQ_GAIN_0 +40 0x6848 //RX_FDEQ_GAIN_1 +41 0x4848 //RX_FDEQ_GAIN_2 +42 0x3434 //RX_FDEQ_GAIN_3 +43 0x3840 //RX_FDEQ_GAIN_4 +44 0x4838 //RX_FDEQ_GAIN_5 +45 0x5444 //RX_FDEQ_GAIN_6 +46 0x443C //RX_FDEQ_GAIN_7 +47 0x3C60 //RX_FDEQ_GAIN_8 +48 0x6460 //RX_FDEQ_GAIN_9 +49 0x6064 //RX_FDEQ_GAIN_10 +50 0x5C5C //RX_FDEQ_GAIN_11 +51 0x5440 //RX_FDEQ_GAIN_12 +52 0x4040 //RX_FDEQ_GAIN_13 +53 0x4040 //RX_FDEQ_GAIN_14 +54 0x5858 //RX_FDEQ_GAIN_15 +55 0x4848 //RX_FDEQ_GAIN_16 +56 0x4848 //RX_FDEQ_GAIN_17 +57 0x4848 //RX_FDEQ_GAIN_18 +58 0x4848 //RX_FDEQ_GAIN_19 +59 0x4848 //RX_FDEQ_GAIN_20 +60 0x4848 //RX_FDEQ_GAIN_21 +61 0x4848 //RX_FDEQ_GAIN_22 +62 0x4848 //RX_FDEQ_GAIN_23 +63 0x0202 //RX_FDEQ_BIN_0 +64 0x0203 //RX_FDEQ_BIN_1 +65 0x0303 //RX_FDEQ_BIN_2 +66 0x0304 //RX_FDEQ_BIN_3 +67 0x0404 //RX_FDEQ_BIN_4 +68 0x0308 //RX_FDEQ_BIN_5 69 0x0808 //RX_FDEQ_BIN_6 70 0x090A //RX_FDEQ_BIN_7 71 0x0B0C //RX_FDEQ_BIN_8 @@ -39750,146 +60066,47 @@ 110 0x0000 //RX_FDDRC_RESRV_0 129 0x0019 //RX_SPK_VOL 130 0x0000 //RX_VOL_RESRV_0 -#VOL 1 -6 0x6000 //RX_TDDRC_ALPHA_UP_1 -7 0x6000 //RX_TDDRC_ALPHA_UP_2 -8 0x6000 //RX_TDDRC_ALPHA_UP_3 -9 0x1000 //RX_TDDRC_ALPHA_UP_4 -27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 -28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 -29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 -32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 -33 0x7214 //RX_TDDRC_LIMITER_THRD -34 0x0800 //RX_TDDRC_LIMITER_GAIN -112 0x0002 //RX_TDDRC_THRD_0 -113 0x0004 //RX_TDDRC_THRD_1 -114 0x1A00 //RX_TDDRC_THRD_2 -115 0x1A00 //RX_TDDRC_THRD_3 -116 0x7EB8 //RX_TDDRC_SLANT_0 -117 0x2500 //RX_TDDRC_SLANT_1 -118 0x6000 //RX_TDDRC_ALPHA_UP_0 -119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 -120 0x0000 //RX_TDDRC_HMNC_FLAG -121 0x199A //RX_TDDRC_HMNC_GAIN -122 0x0001 //RX_TDDRC_SMT_FLAG -123 0x0CCD //RX_TDDRC_SMT_W -124 0x04BC //RX_TDDRC_DRC_GAIN -38 0x0020 //RX_FDEQ_SUBNUM -39 0x484E //RX_FDEQ_GAIN_0 -40 0x4E4E //RX_FDEQ_GAIN_1 -41 0x4E4E //RX_FDEQ_GAIN_2 -42 0x4848 //RX_FDEQ_GAIN_3 -43 0x484E //RX_FDEQ_GAIN_4 -44 0x6E4E //RX_FDEQ_GAIN_5 -45 0x4850 //RX_FDEQ_GAIN_6 -46 0x4848 //RX_FDEQ_GAIN_7 -47 0x4860 //RX_FDEQ_GAIN_8 -48 0x7468 //RX_FDEQ_GAIN_9 -49 0x6060 //RX_FDEQ_GAIN_10 -50 0x6666 //RX_FDEQ_GAIN_11 -51 0x6666 //RX_FDEQ_GAIN_12 -52 0x6666 //RX_FDEQ_GAIN_13 -53 0x6060 //RX_FDEQ_GAIN_14 -54 0x6060 //RX_FDEQ_GAIN_15 -55 0x4848 //RX_FDEQ_GAIN_16 -56 0x4848 //RX_FDEQ_GAIN_17 -57 0x4848 //RX_FDEQ_GAIN_18 -58 0x4848 //RX_FDEQ_GAIN_19 -59 0x4848 //RX_FDEQ_GAIN_20 -60 0x4848 //RX_FDEQ_GAIN_21 -61 0x4848 //RX_FDEQ_GAIN_22 -62 0x4848 //RX_FDEQ_GAIN_23 -63 0x0202 //RX_FDEQ_BIN_0 -64 0x0203 //RX_FDEQ_BIN_1 -65 0x0303 //RX_FDEQ_BIN_2 -66 0x0304 //RX_FDEQ_BIN_3 -67 0x0404 //RX_FDEQ_BIN_4 -68 0x0209 //RX_FDEQ_BIN_5 -69 0x0808 //RX_FDEQ_BIN_6 -70 0x090A //RX_FDEQ_BIN_7 -71 0x0B0C //RX_FDEQ_BIN_8 -72 0x0D0E //RX_FDEQ_BIN_9 -73 0x1013 //RX_FDEQ_BIN_10 -74 0x1719 //RX_FDEQ_BIN_11 -75 0x1B1E //RX_FDEQ_BIN_12 -76 0x1E1E //RX_FDEQ_BIN_13 -77 0x1E28 //RX_FDEQ_BIN_14 -78 0x282C //RX_FDEQ_BIN_15 -79 0x0000 //RX_FDEQ_BIN_16 -80 0x0000 //RX_FDEQ_BIN_17 -81 0x0000 //RX_FDEQ_BIN_18 -82 0x0000 //RX_FDEQ_BIN_19 -83 0x0000 //RX_FDEQ_BIN_20 -84 0x0000 //RX_FDEQ_BIN_21 -85 0x0000 //RX_FDEQ_BIN_22 -86 0x0000 //RX_FDEQ_BIN_23 -87 0x4000 //RX_FDEQ_RESRV_0 -88 0x0320 //RX_FDEQ_RESRV_1 -89 0x0018 //RX_FDDRC_BAND_MARGIN_0 -90 0x0035 //RX_FDDRC_BAND_MARGIN_1 -91 0x00D5 //RX_FDDRC_BAND_MARGIN_2 -92 0x0120 //RX_FDDRC_BAND_MARGIN_3 -93 0x0004 //RX_FDDRC_BLOCK_EXP -94 0x5000 //RX_FDDRC_THRD_2_0 -95 0x5000 //RX_FDDRC_THRD_2_1 -96 0x2000 //RX_FDDRC_THRD_2_2 -97 0x5000 //RX_FDDRC_THRD_2_3 -98 0x6400 //RX_FDDRC_THRD_3_0 -99 0x6400 //RX_FDDRC_THRD_3_1 -100 0x2000 //RX_FDDRC_THRD_3_2 -101 0x5000 //RX_FDDRC_THRD_3_3 -102 0x4000 //RX_FDDRC_SLANT_0_0 -103 0x4000 //RX_FDDRC_SLANT_0_1 -104 0x4000 //RX_FDDRC_SLANT_0_2 -105 0x4000 //RX_FDDRC_SLANT_0_3 -106 0x7FFF //RX_FDDRC_SLANT_1_0 -107 0x7FFF //RX_FDDRC_SLANT_1_1 -108 0x7FFF //RX_FDDRC_SLANT_1_2 -109 0x7FFF //RX_FDDRC_SLANT_1_3 -110 0x0000 //RX_FDDRC_RESRV_0 -129 0x0023 //RX_SPK_VOL -130 0x0000 //RX_VOL_RESRV_0 #VOL 2 6 0x6000 //RX_TDDRC_ALPHA_UP_1 7 0x6000 //RX_TDDRC_ALPHA_UP_2 8 0x6000 //RX_TDDRC_ALPHA_UP_3 9 0x1000 //RX_TDDRC_ALPHA_UP_4 27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 -28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 -29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 -32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +28 0x4000 //RX_TDDRC_ALPHA_DWN_2 +29 0x4000 //RX_TDDRC_ALPHA_DWN_3 +32 0x4000 //RX_TDDRC_ALPHA_DWN_4 33 0x7214 //RX_TDDRC_LIMITER_THRD 34 0x0800 //RX_TDDRC_LIMITER_GAIN 112 0x0002 //RX_TDDRC_THRD_0 113 0x0004 //RX_TDDRC_THRD_1 -114 0x1A00 //RX_TDDRC_THRD_2 -115 0x1A00 //RX_TDDRC_THRD_3 -116 0x7EB8 //RX_TDDRC_SLANT_0 -117 0x2500 //RX_TDDRC_SLANT_1 +114 0x1800 //RX_TDDRC_THRD_2 +115 0x1800 //RX_TDDRC_THRD_3 +116 0x7FFF //RX_TDDRC_SLANT_0 +117 0x7FFF //RX_TDDRC_SLANT_1 118 0x6000 //RX_TDDRC_ALPHA_UP_0 119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 120 0x0000 //RX_TDDRC_HMNC_FLAG 121 0x199A //RX_TDDRC_HMNC_GAIN 122 0x0001 //RX_TDDRC_SMT_FLAG 123 0x0CCD //RX_TDDRC_SMT_W -124 0x04BC //RX_TDDRC_DRC_GAIN +124 0x0780 //RX_TDDRC_DRC_GAIN 38 0x0020 //RX_FDEQ_SUBNUM -39 0x484E //RX_FDEQ_GAIN_0 -40 0x4E4E //RX_FDEQ_GAIN_1 -41 0x4E4E //RX_FDEQ_GAIN_2 -42 0x4848 //RX_FDEQ_GAIN_3 -43 0x484E //RX_FDEQ_GAIN_4 -44 0x6E4E //RX_FDEQ_GAIN_5 -45 0x4850 //RX_FDEQ_GAIN_6 -46 0x4848 //RX_FDEQ_GAIN_7 -47 0x4860 //RX_FDEQ_GAIN_8 -48 0x7468 //RX_FDEQ_GAIN_9 -49 0x6060 //RX_FDEQ_GAIN_10 -50 0x6666 //RX_FDEQ_GAIN_11 -51 0x6666 //RX_FDEQ_GAIN_12 -52 0x6666 //RX_FDEQ_GAIN_13 -53 0x6060 //RX_FDEQ_GAIN_14 -54 0x6060 //RX_FDEQ_GAIN_15 +39 0x6868 //RX_FDEQ_GAIN_0 +40 0x6848 //RX_FDEQ_GAIN_1 +41 0x4848 //RX_FDEQ_GAIN_2 +42 0x3434 //RX_FDEQ_GAIN_3 +43 0x3840 //RX_FDEQ_GAIN_4 +44 0x4838 //RX_FDEQ_GAIN_5 +45 0x5444 //RX_FDEQ_GAIN_6 +46 0x443C //RX_FDEQ_GAIN_7 +47 0x3C60 //RX_FDEQ_GAIN_8 +48 0x6460 //RX_FDEQ_GAIN_9 +49 0x6064 //RX_FDEQ_GAIN_10 +50 0x5C5C //RX_FDEQ_GAIN_11 +51 0x5440 //RX_FDEQ_GAIN_12 +52 0x4040 //RX_FDEQ_GAIN_13 +53 0x4040 //RX_FDEQ_GAIN_14 +54 0x5858 //RX_FDEQ_GAIN_15 55 0x4848 //RX_FDEQ_GAIN_16 56 0x4848 //RX_FDEQ_GAIN_17 57 0x4848 //RX_FDEQ_GAIN_18 @@ -39903,7 +60120,7 @@ 65 0x0303 //RX_FDEQ_BIN_2 66 0x0304 //RX_FDEQ_BIN_3 67 0x0404 //RX_FDEQ_BIN_4 -68 0x0209 //RX_FDEQ_BIN_5 +68 0x0308 //RX_FDEQ_BIN_5 69 0x0808 //RX_FDEQ_BIN_6 70 0x090A //RX_FDEQ_BIN_7 71 0x0B0C //RX_FDEQ_BIN_8 @@ -39946,7 +60163,7 @@ 108 0x7FFF //RX_FDDRC_SLANT_1_2 109 0x7FFF //RX_FDDRC_SLANT_1_3 110 0x0000 //RX_FDDRC_RESRV_0 -129 0x0032 //RX_SPK_VOL +129 0x0025 //RX_SPK_VOL 130 0x0000 //RX_VOL_RESRV_0 #VOL 3 6 0x6000 //RX_TDDRC_ALPHA_UP_1 @@ -39954,41 +60171,41 @@ 8 0x6000 //RX_TDDRC_ALPHA_UP_3 9 0x1000 //RX_TDDRC_ALPHA_UP_4 27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 -28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 -29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 -32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +28 0x4000 //RX_TDDRC_ALPHA_DWN_2 +29 0x4000 //RX_TDDRC_ALPHA_DWN_3 +32 0x4000 //RX_TDDRC_ALPHA_DWN_4 33 0x7214 //RX_TDDRC_LIMITER_THRD 34 0x0800 //RX_TDDRC_LIMITER_GAIN 112 0x0002 //RX_TDDRC_THRD_0 113 0x0004 //RX_TDDRC_THRD_1 -114 0x1A00 //RX_TDDRC_THRD_2 -115 0x1A00 //RX_TDDRC_THRD_3 -116 0x7EB8 //RX_TDDRC_SLANT_0 -117 0x2500 //RX_TDDRC_SLANT_1 +114 0x1800 //RX_TDDRC_THRD_2 +115 0x1800 //RX_TDDRC_THRD_3 +116 0x7FFF //RX_TDDRC_SLANT_0 +117 0x7FFF //RX_TDDRC_SLANT_1 118 0x6000 //RX_TDDRC_ALPHA_UP_0 119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 120 0x0000 //RX_TDDRC_HMNC_FLAG 121 0x199A //RX_TDDRC_HMNC_GAIN 122 0x0001 //RX_TDDRC_SMT_FLAG 123 0x0CCD //RX_TDDRC_SMT_W -124 0x04BC //RX_TDDRC_DRC_GAIN +124 0x0780 //RX_TDDRC_DRC_GAIN 38 0x0020 //RX_FDEQ_SUBNUM -39 0x484E //RX_FDEQ_GAIN_0 -40 0x4E4E //RX_FDEQ_GAIN_1 -41 0x4E4E //RX_FDEQ_GAIN_2 -42 0x4848 //RX_FDEQ_GAIN_3 -43 0x484E //RX_FDEQ_GAIN_4 -44 0x6E4E //RX_FDEQ_GAIN_5 -45 0x4850 //RX_FDEQ_GAIN_6 -46 0x4848 //RX_FDEQ_GAIN_7 -47 0x4860 //RX_FDEQ_GAIN_8 -48 0x7468 //RX_FDEQ_GAIN_9 -49 0x6060 //RX_FDEQ_GAIN_10 -50 0x6666 //RX_FDEQ_GAIN_11 -51 0x6666 //RX_FDEQ_GAIN_12 -52 0x6666 //RX_FDEQ_GAIN_13 -53 0x6060 //RX_FDEQ_GAIN_14 -54 0x6060 //RX_FDEQ_GAIN_15 +39 0x6868 //RX_FDEQ_GAIN_0 +40 0x6848 //RX_FDEQ_GAIN_1 +41 0x4848 //RX_FDEQ_GAIN_2 +42 0x3434 //RX_FDEQ_GAIN_3 +43 0x3840 //RX_FDEQ_GAIN_4 +44 0x4838 //RX_FDEQ_GAIN_5 +45 0x5444 //RX_FDEQ_GAIN_6 +46 0x443C //RX_FDEQ_GAIN_7 +47 0x3C60 //RX_FDEQ_GAIN_8 +48 0x6460 //RX_FDEQ_GAIN_9 +49 0x6064 //RX_FDEQ_GAIN_10 +50 0x5C5C //RX_FDEQ_GAIN_11 +51 0x5440 //RX_FDEQ_GAIN_12 +52 0x4040 //RX_FDEQ_GAIN_13 +53 0x4040 //RX_FDEQ_GAIN_14 +54 0x5858 //RX_FDEQ_GAIN_15 55 0x4848 //RX_FDEQ_GAIN_16 56 0x4848 //RX_FDEQ_GAIN_17 57 0x4848 //RX_FDEQ_GAIN_18 @@ -40002,7 +60219,7 @@ 65 0x0303 //RX_FDEQ_BIN_2 66 0x0304 //RX_FDEQ_BIN_3 67 0x0404 //RX_FDEQ_BIN_4 -68 0x0209 //RX_FDEQ_BIN_5 +68 0x0308 //RX_FDEQ_BIN_5 69 0x0808 //RX_FDEQ_BIN_6 70 0x090A //RX_FDEQ_BIN_7 71 0x0B0C //RX_FDEQ_BIN_8 @@ -40045,7 +60262,7 @@ 108 0x7FFF //RX_FDDRC_SLANT_1_2 109 0x7FFF //RX_FDDRC_SLANT_1_3 110 0x0000 //RX_FDDRC_RESRV_0 -129 0x0048 //RX_SPK_VOL +129 0x0036 //RX_SPK_VOL 130 0x0000 //RX_VOL_RESRV_0 #VOL 4 6 0x6000 //RX_TDDRC_ALPHA_UP_1 @@ -40053,41 +60270,41 @@ 8 0x6000 //RX_TDDRC_ALPHA_UP_3 9 0x1000 //RX_TDDRC_ALPHA_UP_4 27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 -28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 -29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 -32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +28 0x4000 //RX_TDDRC_ALPHA_DWN_2 +29 0x4000 //RX_TDDRC_ALPHA_DWN_3 +32 0x4000 //RX_TDDRC_ALPHA_DWN_4 33 0x7214 //RX_TDDRC_LIMITER_THRD 34 0x0800 //RX_TDDRC_LIMITER_GAIN 112 0x0002 //RX_TDDRC_THRD_0 113 0x0004 //RX_TDDRC_THRD_1 -114 0x1A00 //RX_TDDRC_THRD_2 -115 0x1A00 //RX_TDDRC_THRD_3 -116 0x7EB8 //RX_TDDRC_SLANT_0 -117 0x2500 //RX_TDDRC_SLANT_1 +114 0x1800 //RX_TDDRC_THRD_2 +115 0x1800 //RX_TDDRC_THRD_3 +116 0x7FFF //RX_TDDRC_SLANT_0 +117 0x7FFF //RX_TDDRC_SLANT_1 118 0x6000 //RX_TDDRC_ALPHA_UP_0 119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 120 0x0000 //RX_TDDRC_HMNC_FLAG 121 0x199A //RX_TDDRC_HMNC_GAIN 122 0x0001 //RX_TDDRC_SMT_FLAG 123 0x0CCD //RX_TDDRC_SMT_W -124 0x04BC //RX_TDDRC_DRC_GAIN +124 0x0D56 //RX_TDDRC_DRC_GAIN 38 0x0020 //RX_FDEQ_SUBNUM -39 0x484E //RX_FDEQ_GAIN_0 -40 0x4E4E //RX_FDEQ_GAIN_1 -41 0x4E4E //RX_FDEQ_GAIN_2 -42 0x4848 //RX_FDEQ_GAIN_3 -43 0x484E //RX_FDEQ_GAIN_4 -44 0x6E4E //RX_FDEQ_GAIN_5 -45 0x4850 //RX_FDEQ_GAIN_6 -46 0x4848 //RX_FDEQ_GAIN_7 -47 0x4860 //RX_FDEQ_GAIN_8 -48 0x7468 //RX_FDEQ_GAIN_9 -49 0x6060 //RX_FDEQ_GAIN_10 -50 0x6666 //RX_FDEQ_GAIN_11 -51 0x6666 //RX_FDEQ_GAIN_12 -52 0x6666 //RX_FDEQ_GAIN_13 -53 0x6060 //RX_FDEQ_GAIN_14 -54 0x6060 //RX_FDEQ_GAIN_15 +39 0x6868 //RX_FDEQ_GAIN_0 +40 0x6850 //RX_FDEQ_GAIN_1 +41 0x5048 //RX_FDEQ_GAIN_2 +42 0x383C //RX_FDEQ_GAIN_3 +43 0x4048 //RX_FDEQ_GAIN_4 +44 0x7040 //RX_FDEQ_GAIN_5 +45 0x4C44 //RX_FDEQ_GAIN_6 +46 0x4448 //RX_FDEQ_GAIN_7 +47 0x4868 //RX_FDEQ_GAIN_8 +48 0x7C70 //RX_FDEQ_GAIN_9 +49 0x707C //RX_FDEQ_GAIN_10 +50 0x786C //RX_FDEQ_GAIN_11 +51 0x6454 //RX_FDEQ_GAIN_12 +52 0x604C //RX_FDEQ_GAIN_13 +53 0x585C //RX_FDEQ_GAIN_14 +54 0x7480 //RX_FDEQ_GAIN_15 55 0x4848 //RX_FDEQ_GAIN_16 56 0x4848 //RX_FDEQ_GAIN_17 57 0x4848 //RX_FDEQ_GAIN_18 @@ -40101,7 +60318,7 @@ 65 0x0303 //RX_FDEQ_BIN_2 66 0x0304 //RX_FDEQ_BIN_3 67 0x0404 //RX_FDEQ_BIN_4 -68 0x0209 //RX_FDEQ_BIN_5 +68 0x0308 //RX_FDEQ_BIN_5 69 0x0808 //RX_FDEQ_BIN_6 70 0x090A //RX_FDEQ_BIN_7 71 0x0B0C //RX_FDEQ_BIN_8 @@ -40144,7 +60361,7 @@ 108 0x7FFF //RX_FDDRC_SLANT_1_2 109 0x7FFF //RX_FDDRC_SLANT_1_3 110 0x0000 //RX_FDDRC_RESRV_0 -129 0x0068 //RX_SPK_VOL +129 0x0034 //RX_SPK_VOL 130 0x0000 //RX_VOL_RESRV_0 #VOL 5 6 0x6000 //RX_TDDRC_ALPHA_UP_1 @@ -40152,41 +60369,41 @@ 8 0x6000 //RX_TDDRC_ALPHA_UP_3 9 0x1000 //RX_TDDRC_ALPHA_UP_4 27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 -28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 -29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 -32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +28 0x4000 //RX_TDDRC_ALPHA_DWN_2 +29 0x4000 //RX_TDDRC_ALPHA_DWN_3 +32 0x4000 //RX_TDDRC_ALPHA_DWN_4 33 0x7214 //RX_TDDRC_LIMITER_THRD 34 0x0800 //RX_TDDRC_LIMITER_GAIN 112 0x0002 //RX_TDDRC_THRD_0 113 0x0004 //RX_TDDRC_THRD_1 -114 0x1A00 //RX_TDDRC_THRD_2 -115 0x1A00 //RX_TDDRC_THRD_3 -116 0x7EB8 //RX_TDDRC_SLANT_0 -117 0x2500 //RX_TDDRC_SLANT_1 +114 0x1800 //RX_TDDRC_THRD_2 +115 0x1800 //RX_TDDRC_THRD_3 +116 0x7FFF //RX_TDDRC_SLANT_0 +117 0x7FFF //RX_TDDRC_SLANT_1 118 0x6000 //RX_TDDRC_ALPHA_UP_0 119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 120 0x0000 //RX_TDDRC_HMNC_FLAG 121 0x199A //RX_TDDRC_HMNC_GAIN 122 0x0001 //RX_TDDRC_SMT_FLAG 123 0x0CCD //RX_TDDRC_SMT_W -124 0x04BC //RX_TDDRC_DRC_GAIN +124 0x0D56 //RX_TDDRC_DRC_GAIN 38 0x0020 //RX_FDEQ_SUBNUM -39 0x484E //RX_FDEQ_GAIN_0 -40 0x4E4E //RX_FDEQ_GAIN_1 -41 0x4E4E //RX_FDEQ_GAIN_2 -42 0x4848 //RX_FDEQ_GAIN_3 -43 0x484E //RX_FDEQ_GAIN_4 -44 0x6E4E //RX_FDEQ_GAIN_5 -45 0x4850 //RX_FDEQ_GAIN_6 -46 0x4848 //RX_FDEQ_GAIN_7 -47 0x4860 //RX_FDEQ_GAIN_8 -48 0x7468 //RX_FDEQ_GAIN_9 -49 0x6060 //RX_FDEQ_GAIN_10 -50 0x6666 //RX_FDEQ_GAIN_11 -51 0x6666 //RX_FDEQ_GAIN_12 -52 0x6666 //RX_FDEQ_GAIN_13 -53 0x6060 //RX_FDEQ_GAIN_14 -54 0x6060 //RX_FDEQ_GAIN_15 +39 0x6868 //RX_FDEQ_GAIN_0 +40 0x6850 //RX_FDEQ_GAIN_1 +41 0x5048 //RX_FDEQ_GAIN_2 +42 0x383C //RX_FDEQ_GAIN_3 +43 0x4048 //RX_FDEQ_GAIN_4 +44 0x7040 //RX_FDEQ_GAIN_5 +45 0x4C44 //RX_FDEQ_GAIN_6 +46 0x4448 //RX_FDEQ_GAIN_7 +47 0x4868 //RX_FDEQ_GAIN_8 +48 0x7C70 //RX_FDEQ_GAIN_9 +49 0x707C //RX_FDEQ_GAIN_10 +50 0x786C //RX_FDEQ_GAIN_11 +51 0x6454 //RX_FDEQ_GAIN_12 +52 0x604C //RX_FDEQ_GAIN_13 +53 0x585C //RX_FDEQ_GAIN_14 +54 0x7480 //RX_FDEQ_GAIN_15 55 0x4848 //RX_FDEQ_GAIN_16 56 0x4848 //RX_FDEQ_GAIN_17 57 0x4848 //RX_FDEQ_GAIN_18 @@ -40200,7 +60417,7 @@ 65 0x0303 //RX_FDEQ_BIN_2 66 0x0304 //RX_FDEQ_BIN_3 67 0x0404 //RX_FDEQ_BIN_4 -68 0x0209 //RX_FDEQ_BIN_5 +68 0x0308 //RX_FDEQ_BIN_5 69 0x0808 //RX_FDEQ_BIN_6 70 0x090A //RX_FDEQ_BIN_7 71 0x0B0C //RX_FDEQ_BIN_8 @@ -40243,7 +60460,7 @@ 108 0x7FFF //RX_FDDRC_SLANT_1_2 109 0x7FFF //RX_FDDRC_SLANT_1_3 110 0x0000 //RX_FDDRC_RESRV_0 -129 0x0097 //RX_SPK_VOL +129 0x0059 //RX_SPK_VOL 130 0x0000 //RX_VOL_RESRV_0 #VOL 6 6 0x6000 //RX_TDDRC_ALPHA_UP_1 @@ -40251,41 +60468,41 @@ 8 0x6000 //RX_TDDRC_ALPHA_UP_3 9 0x1000 //RX_TDDRC_ALPHA_UP_4 27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 -28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 -29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 -32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +28 0x4000 //RX_TDDRC_ALPHA_DWN_2 +29 0x4000 //RX_TDDRC_ALPHA_DWN_3 +32 0x4000 //RX_TDDRC_ALPHA_DWN_4 33 0x7214 //RX_TDDRC_LIMITER_THRD 34 0x0800 //RX_TDDRC_LIMITER_GAIN 112 0x0002 //RX_TDDRC_THRD_0 113 0x0004 //RX_TDDRC_THRD_1 -114 0x1A00 //RX_TDDRC_THRD_2 -115 0x1A00 //RX_TDDRC_THRD_3 -116 0x7EB8 //RX_TDDRC_SLANT_0 -117 0x2500 //RX_TDDRC_SLANT_1 +114 0x1800 //RX_TDDRC_THRD_2 +115 0x1800 //RX_TDDRC_THRD_3 +116 0x7FFF //RX_TDDRC_SLANT_0 +117 0x7FFF //RX_TDDRC_SLANT_1 118 0x6000 //RX_TDDRC_ALPHA_UP_0 119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 120 0x0000 //RX_TDDRC_HMNC_FLAG 121 0x199A //RX_TDDRC_HMNC_GAIN 122 0x0001 //RX_TDDRC_SMT_FLAG 123 0x0CCD //RX_TDDRC_SMT_W -124 0x04BC //RX_TDDRC_DRC_GAIN +124 0x0D56 //RX_TDDRC_DRC_GAIN 38 0x0020 //RX_FDEQ_SUBNUM -39 0x484E //RX_FDEQ_GAIN_0 -40 0x4E4E //RX_FDEQ_GAIN_1 -41 0x4E4E //RX_FDEQ_GAIN_2 -42 0x4848 //RX_FDEQ_GAIN_3 -43 0x484E //RX_FDEQ_GAIN_4 -44 0x6E4E //RX_FDEQ_GAIN_5 -45 0x4850 //RX_FDEQ_GAIN_6 -46 0x4848 //RX_FDEQ_GAIN_7 -47 0x4860 //RX_FDEQ_GAIN_8 -48 0x7468 //RX_FDEQ_GAIN_9 -49 0x6060 //RX_FDEQ_GAIN_10 -50 0x6666 //RX_FDEQ_GAIN_11 -51 0x6666 //RX_FDEQ_GAIN_12 -52 0x6666 //RX_FDEQ_GAIN_13 -53 0x6060 //RX_FDEQ_GAIN_14 -54 0x6060 //RX_FDEQ_GAIN_15 +39 0x6868 //RX_FDEQ_GAIN_0 +40 0x6850 //RX_FDEQ_GAIN_1 +41 0x5048 //RX_FDEQ_GAIN_2 +42 0x383C //RX_FDEQ_GAIN_3 +43 0x4048 //RX_FDEQ_GAIN_4 +44 0x7040 //RX_FDEQ_GAIN_5 +45 0x4C44 //RX_FDEQ_GAIN_6 +46 0x4448 //RX_FDEQ_GAIN_7 +47 0x4868 //RX_FDEQ_GAIN_8 +48 0x7C70 //RX_FDEQ_GAIN_9 +49 0x707C //RX_FDEQ_GAIN_10 +50 0x786C //RX_FDEQ_GAIN_11 +51 0x6454 //RX_FDEQ_GAIN_12 +52 0x604C //RX_FDEQ_GAIN_13 +53 0x585C //RX_FDEQ_GAIN_14 +54 0x7480 //RX_FDEQ_GAIN_15 55 0x4848 //RX_FDEQ_GAIN_16 56 0x4848 //RX_FDEQ_GAIN_17 57 0x4848 //RX_FDEQ_GAIN_18 @@ -40299,7 +60516,7 @@ 65 0x0303 //RX_FDEQ_BIN_2 66 0x0304 //RX_FDEQ_BIN_3 67 0x0404 //RX_FDEQ_BIN_4 -68 0x0209 //RX_FDEQ_BIN_5 +68 0x0308 //RX_FDEQ_BIN_5 69 0x0808 //RX_FDEQ_BIN_6 70 0x090A //RX_FDEQ_BIN_7 71 0x0B0C //RX_FDEQ_BIN_8 @@ -40344,11 +60561,862 @@ 110 0x0000 //RX_FDDRC_RESRV_0 129 0x0100 //RX_SPK_VOL 130 0x0000 //RX_VOL_RESRV_0 +#RX 2 +157 0x243C //RX_RECVFUNC_MODE_0 +158 0x0000 //RX_RECVFUNC_MODE_1 +159 0x0003 //RX_SAMPLINGFREQ_SIG +160 0x0003 //RX_SAMPLINGFREQ_PROC +161 0x000A //RX_FRAME_SZ +162 0x0000 //RX_DELAY_OPT +163 0x6000 //RX_TDDRC_ALPHA_UP_1 +164 0x6000 //RX_TDDRC_ALPHA_UP_2 +165 0x6000 //RX_TDDRC_ALPHA_UP_3 +166 0x1000 //RX_TDDRC_ALPHA_UP_4 +167 0x0403 //RX_PGA +168 0x7D83 //RX_A_HP +169 0x4000 //RX_B_PE +170 0x7800 //RX_THR_PITCH_DET_0 +171 0x7000 //RX_THR_PITCH_DET_1 +172 0x6000 //RX_THR_PITCH_DET_2 +173 0x0008 //RX_PITCH_BFR_LEN +174 0x0003 //RX_SBD_PITCH_DET +175 0x0100 //RX_PP_RESRV_0 +176 0x0020 //RX_PP_RESRV_1 +177 0x0400 //RX_N_SN_EST +178 0x000C //RX_N2_SN_EST +179 0x0010 //RX_NS_LVL_CTRL +180 0xF800 //RX_THR_SN_EST +181 0x7E00 //RX_LAMBDA_PFILT +182 0x000A //RX_FENS_RESRV_0 +183 0x0190 //RX_FENS_RESRV_1 +184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +185 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 +186 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +187 0x0002 //RX_EXTRA_NS_L +188 0x0800 //RX_EXTRA_NS_A +189 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 +190 0x7214 //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +192 0x199A //RX_A_POST_FLT +193 0x0000 //RX_LMT_THRD +194 0x4000 //RX_LMT_ALPHA +195 0x0020 //RX_FDEQ_SUBNUM +196 0x4848 //RX_FDEQ_GAIN_0 +197 0x4848 //RX_FDEQ_GAIN_1 +198 0x4848 //RX_FDEQ_GAIN_2 +199 0x4848 //RX_FDEQ_GAIN_3 +200 0x4848 //RX_FDEQ_GAIN_4 +201 0x7C48 //RX_FDEQ_GAIN_5 +202 0x4848 //RX_FDEQ_GAIN_6 +203 0x4848 //RX_FDEQ_GAIN_7 +204 0x4860 //RX_FDEQ_GAIN_8 +205 0x7468 //RX_FDEQ_GAIN_9 +206 0x5858 //RX_FDEQ_GAIN_10 +207 0x5858 //RX_FDEQ_GAIN_11 +208 0x5C54 //RX_FDEQ_GAIN_12 +209 0x5448 //RX_FDEQ_GAIN_13 +210 0x4848 //RX_FDEQ_GAIN_14 +211 0x5858 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0202 //RX_FDEQ_BIN_0 +221 0x0203 //RX_FDEQ_BIN_1 +222 0x0303 //RX_FDEQ_BIN_2 +223 0x0304 //RX_FDEQ_BIN_3 +224 0x0404 //RX_FDEQ_BIN_4 +225 0x0308 //RX_FDEQ_BIN_5 +226 0x0808 //RX_FDEQ_BIN_6 +227 0x090A //RX_FDEQ_BIN_7 +228 0x0B0C //RX_FDEQ_BIN_8 +229 0x0D0E //RX_FDEQ_BIN_9 +230 0x1013 //RX_FDEQ_BIN_10 +231 0x1719 //RX_FDEQ_BIN_11 +232 0x1B1E //RX_FDEQ_BIN_12 +233 0x1E1E //RX_FDEQ_BIN_13 +234 0x1E28 //RX_FDEQ_BIN_14 +235 0x282C //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x4000 //RX_FDEQ_RESRV_0 +245 0x0320 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0035 //RX_FDDRC_BAND_MARGIN_1 +248 0x00D5 //RX_FDDRC_BAND_MARGIN_2 +249 0x0120 //RX_FDDRC_BAND_MARGIN_3 +250 0x0004 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x2000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x2000 //RX_FDDRC_THRD_3_2 +258 0x5000 //RX_FDDRC_THRD_3_3 +259 0x4000 //RX_FDDRC_SLANT_0_0 +260 0x4000 //RX_FDDRC_SLANT_0_1 +261 0x4000 //RX_FDDRC_SLANT_0_2 +262 0x4000 //RX_FDDRC_SLANT_0_3 +263 0x7FFF //RX_FDDRC_SLANT_1_0 +264 0x7FFF //RX_FDDRC_SLANT_1_1 +265 0x7FFF //RX_FDDRC_SLANT_1_2 +266 0x7FFF //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +268 0x0002 //RX_FILTINDX +269 0x0002 //RX_TDDRC_THRD_0 +270 0x0004 //RX_TDDRC_THRD_1 +271 0x1A00 //RX_TDDRC_THRD_2 +272 0x1A00 //RX_TDDRC_THRD_3 +273 0x7EB8 //RX_TDDRC_SLANT_0 +274 0x2500 //RX_TDDRC_SLANT_1 +275 0x6000 //RX_TDDRC_ALPHA_UP_0 +276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x199A //RX_TDDRC_HMNC_GAIN +279 0x0001 //RX_TDDRC_SMT_FLAG +280 0x0CCD //RX_TDDRC_SMT_W +281 0x0550 //RX_TDDRC_DRC_GAIN +282 0x7C00 //RX_LAMBDA_PKA_FP +283 0x0FA0 //RX_TPKA_FP +284 0x0400 //RX_MIN_G_FP +285 0x0800 //RX_MAX_G_FP +286 0x0014 //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 +288 0x0000 //RX_MAXLEVEL_CNG +289 0x3000 //RX_BWE_UV_TH +290 0x3000 //RX_BWE_UV_TH2 +291 0x1800 //RX_BWE_UV_TH3 +292 0x1000 //RX_BWE_V_TH +293 0x04CD //RX_BWE_GAIN1_V_TH1 +294 0x0F33 //RX_BWE_GAIN1_V_TH2 +295 0x7333 //RX_BWE_UV_EQ +296 0x199A //RX_BWE_V_EQ +297 0x7333 //RX_BWE_TONE_TH +298 0x0004 //RX_BWE_UV_HOLD_T +299 0x6CCD //RX_BWE_GAIN2_ALPHA +300 0x799A //RX_BWE_GAIN3_ALPHA +301 0x001E //RX_BWE_CUTOFF +302 0x3000 //RX_BWE_GAINFILL +303 0x3200 //RX_BWE_MAXTH_TONE +304 0x2000 //RX_BWE_EQ_0 +305 0x2000 //RX_BWE_EQ_1 +306 0x2000 //RX_BWE_EQ_2 +307 0x2000 //RX_BWE_EQ_3 +308 0x2000 //RX_BWE_EQ_4 +309 0x2000 //RX_BWE_EQ_5 +310 0x2000 //RX_BWE_EQ_6 +311 0x0000 //RX_BWE_RESRV_0 +312 0x0000 //RX_BWE_RESRV_1 +313 0x0000 //RX_BWE_RESRV_2 +#VOL 0 +163 0x6000 //RX_TDDRC_ALPHA_UP_1 +164 0x6000 //RX_TDDRC_ALPHA_UP_2 +165 0x6000 //RX_TDDRC_ALPHA_UP_3 +166 0x1000 //RX_TDDRC_ALPHA_UP_4 +184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +185 0x4000 //RX_TDDRC_ALPHA_DWN_2 +186 0x4000 //RX_TDDRC_ALPHA_DWN_3 +189 0x4000 //RX_TDDRC_ALPHA_DWN_4 +190 0x7214 //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +269 0x0002 //RX_TDDRC_THRD_0 +270 0x0004 //RX_TDDRC_THRD_1 +271 0x1800 //RX_TDDRC_THRD_2 +272 0x1800 //RX_TDDRC_THRD_3 +273 0x7FFF //RX_TDDRC_SLANT_0 +274 0x7FFF //RX_TDDRC_SLANT_1 +275 0x6000 //RX_TDDRC_ALPHA_UP_0 +276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x199A //RX_TDDRC_HMNC_GAIN +279 0x0001 //RX_TDDRC_SMT_FLAG +280 0x0CCD //RX_TDDRC_SMT_W +281 0x0780 //RX_TDDRC_DRC_GAIN +195 0x0020 //RX_FDEQ_SUBNUM +196 0x6868 //RX_FDEQ_GAIN_0 +197 0x6848 //RX_FDEQ_GAIN_1 +198 0x4848 //RX_FDEQ_GAIN_2 +199 0x3434 //RX_FDEQ_GAIN_3 +200 0x3840 //RX_FDEQ_GAIN_4 +201 0x4838 //RX_FDEQ_GAIN_5 +202 0x5444 //RX_FDEQ_GAIN_6 +203 0x443C //RX_FDEQ_GAIN_7 +204 0x3C60 //RX_FDEQ_GAIN_8 +205 0x6460 //RX_FDEQ_GAIN_9 +206 0x6064 //RX_FDEQ_GAIN_10 +207 0x5C5C //RX_FDEQ_GAIN_11 +208 0x5440 //RX_FDEQ_GAIN_12 +209 0x4040 //RX_FDEQ_GAIN_13 +210 0x4040 //RX_FDEQ_GAIN_14 +211 0x5858 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0202 //RX_FDEQ_BIN_0 +221 0x0203 //RX_FDEQ_BIN_1 +222 0x0303 //RX_FDEQ_BIN_2 +223 0x0304 //RX_FDEQ_BIN_3 +224 0x0404 //RX_FDEQ_BIN_4 +225 0x0308 //RX_FDEQ_BIN_5 +226 0x0808 //RX_FDEQ_BIN_6 +227 0x090A //RX_FDEQ_BIN_7 +228 0x0B0C //RX_FDEQ_BIN_8 +229 0x0D0E //RX_FDEQ_BIN_9 +230 0x1013 //RX_FDEQ_BIN_10 +231 0x1719 //RX_FDEQ_BIN_11 +232 0x1B1E //RX_FDEQ_BIN_12 +233 0x1E1E //RX_FDEQ_BIN_13 +234 0x1E28 //RX_FDEQ_BIN_14 +235 0x282C //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x4000 //RX_FDEQ_RESRV_0 +245 0x0320 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0035 //RX_FDDRC_BAND_MARGIN_1 +248 0x00D5 //RX_FDDRC_BAND_MARGIN_2 +249 0x0120 //RX_FDDRC_BAND_MARGIN_3 +250 0x0004 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x2000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x2000 //RX_FDDRC_THRD_3_2 +258 0x5000 //RX_FDDRC_THRD_3_3 +259 0x4000 //RX_FDDRC_SLANT_0_0 +260 0x4000 //RX_FDDRC_SLANT_0_1 +261 0x4000 //RX_FDDRC_SLANT_0_2 +262 0x4000 //RX_FDDRC_SLANT_0_3 +263 0x7FFF //RX_FDDRC_SLANT_1_0 +264 0x7FFF //RX_FDDRC_SLANT_1_1 +265 0x7FFF //RX_FDDRC_SLANT_1_2 +266 0x7FFF //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +286 0x0011 //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 +#VOL 1 +163 0x6000 //RX_TDDRC_ALPHA_UP_1 +164 0x6000 //RX_TDDRC_ALPHA_UP_2 +165 0x6000 //RX_TDDRC_ALPHA_UP_3 +166 0x1000 //RX_TDDRC_ALPHA_UP_4 +184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +185 0x4000 //RX_TDDRC_ALPHA_DWN_2 +186 0x4000 //RX_TDDRC_ALPHA_DWN_3 +189 0x4000 //RX_TDDRC_ALPHA_DWN_4 +190 0x7214 //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +269 0x0002 //RX_TDDRC_THRD_0 +270 0x0004 //RX_TDDRC_THRD_1 +271 0x1800 //RX_TDDRC_THRD_2 +272 0x1800 //RX_TDDRC_THRD_3 +273 0x7FFF //RX_TDDRC_SLANT_0 +274 0x7FFF //RX_TDDRC_SLANT_1 +275 0x6000 //RX_TDDRC_ALPHA_UP_0 +276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x199A //RX_TDDRC_HMNC_GAIN +279 0x0001 //RX_TDDRC_SMT_FLAG +280 0x0CCD //RX_TDDRC_SMT_W +281 0x0780 //RX_TDDRC_DRC_GAIN +195 0x0020 //RX_FDEQ_SUBNUM +196 0x6868 //RX_FDEQ_GAIN_0 +197 0x6848 //RX_FDEQ_GAIN_1 +198 0x4848 //RX_FDEQ_GAIN_2 +199 0x3434 //RX_FDEQ_GAIN_3 +200 0x3840 //RX_FDEQ_GAIN_4 +201 0x4838 //RX_FDEQ_GAIN_5 +202 0x5444 //RX_FDEQ_GAIN_6 +203 0x443C //RX_FDEQ_GAIN_7 +204 0x3C60 //RX_FDEQ_GAIN_8 +205 0x6460 //RX_FDEQ_GAIN_9 +206 0x6064 //RX_FDEQ_GAIN_10 +207 0x5C5C //RX_FDEQ_GAIN_11 +208 0x5440 //RX_FDEQ_GAIN_12 +209 0x4040 //RX_FDEQ_GAIN_13 +210 0x4040 //RX_FDEQ_GAIN_14 +211 0x5858 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0202 //RX_FDEQ_BIN_0 +221 0x0203 //RX_FDEQ_BIN_1 +222 0x0303 //RX_FDEQ_BIN_2 +223 0x0304 //RX_FDEQ_BIN_3 +224 0x0404 //RX_FDEQ_BIN_4 +225 0x0308 //RX_FDEQ_BIN_5 +226 0x0808 //RX_FDEQ_BIN_6 +227 0x090A //RX_FDEQ_BIN_7 +228 0x0B0C //RX_FDEQ_BIN_8 +229 0x0D0E //RX_FDEQ_BIN_9 +230 0x1013 //RX_FDEQ_BIN_10 +231 0x1719 //RX_FDEQ_BIN_11 +232 0x1B1E //RX_FDEQ_BIN_12 +233 0x1E1E //RX_FDEQ_BIN_13 +234 0x1E28 //RX_FDEQ_BIN_14 +235 0x282C //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x4000 //RX_FDEQ_RESRV_0 +245 0x0320 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0035 //RX_FDDRC_BAND_MARGIN_1 +248 0x00D5 //RX_FDDRC_BAND_MARGIN_2 +249 0x0120 //RX_FDDRC_BAND_MARGIN_3 +250 0x0004 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x2000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x2000 //RX_FDDRC_THRD_3_2 +258 0x5000 //RX_FDDRC_THRD_3_3 +259 0x4000 //RX_FDDRC_SLANT_0_0 +260 0x4000 //RX_FDDRC_SLANT_0_1 +261 0x4000 //RX_FDDRC_SLANT_0_2 +262 0x4000 //RX_FDDRC_SLANT_0_3 +263 0x7FFF //RX_FDDRC_SLANT_1_0 +264 0x7FFF //RX_FDDRC_SLANT_1_1 +265 0x7FFF //RX_FDDRC_SLANT_1_2 +266 0x7FFF //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +286 0x0019 //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 +#VOL 2 +163 0x6000 //RX_TDDRC_ALPHA_UP_1 +164 0x6000 //RX_TDDRC_ALPHA_UP_2 +165 0x6000 //RX_TDDRC_ALPHA_UP_3 +166 0x1000 //RX_TDDRC_ALPHA_UP_4 +184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +185 0x4000 //RX_TDDRC_ALPHA_DWN_2 +186 0x4000 //RX_TDDRC_ALPHA_DWN_3 +189 0x4000 //RX_TDDRC_ALPHA_DWN_4 +190 0x7214 //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +269 0x0002 //RX_TDDRC_THRD_0 +270 0x0004 //RX_TDDRC_THRD_1 +271 0x1800 //RX_TDDRC_THRD_2 +272 0x1800 //RX_TDDRC_THRD_3 +273 0x7FFF //RX_TDDRC_SLANT_0 +274 0x7FFF //RX_TDDRC_SLANT_1 +275 0x6000 //RX_TDDRC_ALPHA_UP_0 +276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x199A //RX_TDDRC_HMNC_GAIN +279 0x0001 //RX_TDDRC_SMT_FLAG +280 0x0CCD //RX_TDDRC_SMT_W +281 0x0780 //RX_TDDRC_DRC_GAIN +195 0x0020 //RX_FDEQ_SUBNUM +196 0x6868 //RX_FDEQ_GAIN_0 +197 0x6848 //RX_FDEQ_GAIN_1 +198 0x4848 //RX_FDEQ_GAIN_2 +199 0x3434 //RX_FDEQ_GAIN_3 +200 0x3840 //RX_FDEQ_GAIN_4 +201 0x4838 //RX_FDEQ_GAIN_5 +202 0x5444 //RX_FDEQ_GAIN_6 +203 0x443C //RX_FDEQ_GAIN_7 +204 0x3C60 //RX_FDEQ_GAIN_8 +205 0x6460 //RX_FDEQ_GAIN_9 +206 0x6064 //RX_FDEQ_GAIN_10 +207 0x5C5C //RX_FDEQ_GAIN_11 +208 0x5440 //RX_FDEQ_GAIN_12 +209 0x4040 //RX_FDEQ_GAIN_13 +210 0x4040 //RX_FDEQ_GAIN_14 +211 0x5858 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0202 //RX_FDEQ_BIN_0 +221 0x0203 //RX_FDEQ_BIN_1 +222 0x0303 //RX_FDEQ_BIN_2 +223 0x0304 //RX_FDEQ_BIN_3 +224 0x0404 //RX_FDEQ_BIN_4 +225 0x0308 //RX_FDEQ_BIN_5 +226 0x0808 //RX_FDEQ_BIN_6 +227 0x090A //RX_FDEQ_BIN_7 +228 0x0B0C //RX_FDEQ_BIN_8 +229 0x0D0E //RX_FDEQ_BIN_9 +230 0x1013 //RX_FDEQ_BIN_10 +231 0x1719 //RX_FDEQ_BIN_11 +232 0x1B1E //RX_FDEQ_BIN_12 +233 0x1E1E //RX_FDEQ_BIN_13 +234 0x1E28 //RX_FDEQ_BIN_14 +235 0x282C //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x4000 //RX_FDEQ_RESRV_0 +245 0x0320 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0035 //RX_FDDRC_BAND_MARGIN_1 +248 0x00D5 //RX_FDDRC_BAND_MARGIN_2 +249 0x0120 //RX_FDDRC_BAND_MARGIN_3 +250 0x0004 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x2000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x2000 //RX_FDDRC_THRD_3_2 +258 0x5000 //RX_FDDRC_THRD_3_3 +259 0x4000 //RX_FDDRC_SLANT_0_0 +260 0x4000 //RX_FDDRC_SLANT_0_1 +261 0x4000 //RX_FDDRC_SLANT_0_2 +262 0x4000 //RX_FDDRC_SLANT_0_3 +263 0x7FFF //RX_FDDRC_SLANT_1_0 +264 0x7FFF //RX_FDDRC_SLANT_1_1 +265 0x7FFF //RX_FDDRC_SLANT_1_2 +266 0x7FFF //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +286 0x0025 //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 +#VOL 3 +163 0x6000 //RX_TDDRC_ALPHA_UP_1 +164 0x6000 //RX_TDDRC_ALPHA_UP_2 +165 0x6000 //RX_TDDRC_ALPHA_UP_3 +166 0x1000 //RX_TDDRC_ALPHA_UP_4 +184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +185 0x4000 //RX_TDDRC_ALPHA_DWN_2 +186 0x4000 //RX_TDDRC_ALPHA_DWN_3 +189 0x4000 //RX_TDDRC_ALPHA_DWN_4 +190 0x7214 //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +269 0x0002 //RX_TDDRC_THRD_0 +270 0x0004 //RX_TDDRC_THRD_1 +271 0x1800 //RX_TDDRC_THRD_2 +272 0x1800 //RX_TDDRC_THRD_3 +273 0x7FFF //RX_TDDRC_SLANT_0 +274 0x7FFF //RX_TDDRC_SLANT_1 +275 0x6000 //RX_TDDRC_ALPHA_UP_0 +276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x199A //RX_TDDRC_HMNC_GAIN +279 0x0001 //RX_TDDRC_SMT_FLAG +280 0x0CCD //RX_TDDRC_SMT_W +281 0x0780 //RX_TDDRC_DRC_GAIN +195 0x0020 //RX_FDEQ_SUBNUM +196 0x6868 //RX_FDEQ_GAIN_0 +197 0x6848 //RX_FDEQ_GAIN_1 +198 0x4848 //RX_FDEQ_GAIN_2 +199 0x3434 //RX_FDEQ_GAIN_3 +200 0x3840 //RX_FDEQ_GAIN_4 +201 0x4838 //RX_FDEQ_GAIN_5 +202 0x5444 //RX_FDEQ_GAIN_6 +203 0x443C //RX_FDEQ_GAIN_7 +204 0x3C60 //RX_FDEQ_GAIN_8 +205 0x6460 //RX_FDEQ_GAIN_9 +206 0x6064 //RX_FDEQ_GAIN_10 +207 0x5C5C //RX_FDEQ_GAIN_11 +208 0x5440 //RX_FDEQ_GAIN_12 +209 0x4040 //RX_FDEQ_GAIN_13 +210 0x4040 //RX_FDEQ_GAIN_14 +211 0x5858 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0202 //RX_FDEQ_BIN_0 +221 0x0203 //RX_FDEQ_BIN_1 +222 0x0303 //RX_FDEQ_BIN_2 +223 0x0304 //RX_FDEQ_BIN_3 +224 0x0404 //RX_FDEQ_BIN_4 +225 0x0308 //RX_FDEQ_BIN_5 +226 0x0808 //RX_FDEQ_BIN_6 +227 0x090A //RX_FDEQ_BIN_7 +228 0x0B0C //RX_FDEQ_BIN_8 +229 0x0D0E //RX_FDEQ_BIN_9 +230 0x1013 //RX_FDEQ_BIN_10 +231 0x1719 //RX_FDEQ_BIN_11 +232 0x1B1E //RX_FDEQ_BIN_12 +233 0x1E1E //RX_FDEQ_BIN_13 +234 0x1E28 //RX_FDEQ_BIN_14 +235 0x282C //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x4000 //RX_FDEQ_RESRV_0 +245 0x0320 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0035 //RX_FDDRC_BAND_MARGIN_1 +248 0x00D5 //RX_FDDRC_BAND_MARGIN_2 +249 0x0120 //RX_FDDRC_BAND_MARGIN_3 +250 0x0004 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x2000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x2000 //RX_FDDRC_THRD_3_2 +258 0x5000 //RX_FDDRC_THRD_3_3 +259 0x4000 //RX_FDDRC_SLANT_0_0 +260 0x4000 //RX_FDDRC_SLANT_0_1 +261 0x4000 //RX_FDDRC_SLANT_0_2 +262 0x4000 //RX_FDDRC_SLANT_0_3 +263 0x7FFF //RX_FDDRC_SLANT_1_0 +264 0x7FFF //RX_FDDRC_SLANT_1_1 +265 0x7FFF //RX_FDDRC_SLANT_1_2 +266 0x7FFF //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +286 0x0036 //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 +#VOL 4 +163 0x6000 //RX_TDDRC_ALPHA_UP_1 +164 0x6000 //RX_TDDRC_ALPHA_UP_2 +165 0x6000 //RX_TDDRC_ALPHA_UP_3 +166 0x1000 //RX_TDDRC_ALPHA_UP_4 +184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +185 0x4000 //RX_TDDRC_ALPHA_DWN_2 +186 0x4000 //RX_TDDRC_ALPHA_DWN_3 +189 0x4000 //RX_TDDRC_ALPHA_DWN_4 +190 0x7214 //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +269 0x0002 //RX_TDDRC_THRD_0 +270 0x0004 //RX_TDDRC_THRD_1 +271 0x1800 //RX_TDDRC_THRD_2 +272 0x1800 //RX_TDDRC_THRD_3 +273 0x7FFF //RX_TDDRC_SLANT_0 +274 0x7FFF //RX_TDDRC_SLANT_1 +275 0x6000 //RX_TDDRC_ALPHA_UP_0 +276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x199A //RX_TDDRC_HMNC_GAIN +279 0x0001 //RX_TDDRC_SMT_FLAG +280 0x0CCD //RX_TDDRC_SMT_W +281 0x0D56 //RX_TDDRC_DRC_GAIN +195 0x0020 //RX_FDEQ_SUBNUM +196 0x6868 //RX_FDEQ_GAIN_0 +197 0x6850 //RX_FDEQ_GAIN_1 +198 0x5048 //RX_FDEQ_GAIN_2 +199 0x383C //RX_FDEQ_GAIN_3 +200 0x4048 //RX_FDEQ_GAIN_4 +201 0x7040 //RX_FDEQ_GAIN_5 +202 0x4C44 //RX_FDEQ_GAIN_6 +203 0x4448 //RX_FDEQ_GAIN_7 +204 0x4868 //RX_FDEQ_GAIN_8 +205 0x7C70 //RX_FDEQ_GAIN_9 +206 0x707C //RX_FDEQ_GAIN_10 +207 0x786C //RX_FDEQ_GAIN_11 +208 0x6454 //RX_FDEQ_GAIN_12 +209 0x604C //RX_FDEQ_GAIN_13 +210 0x585C //RX_FDEQ_GAIN_14 +211 0x7480 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0202 //RX_FDEQ_BIN_0 +221 0x0203 //RX_FDEQ_BIN_1 +222 0x0303 //RX_FDEQ_BIN_2 +223 0x0304 //RX_FDEQ_BIN_3 +224 0x0404 //RX_FDEQ_BIN_4 +225 0x0308 //RX_FDEQ_BIN_5 +226 0x0808 //RX_FDEQ_BIN_6 +227 0x090A //RX_FDEQ_BIN_7 +228 0x0B0C //RX_FDEQ_BIN_8 +229 0x0D0E //RX_FDEQ_BIN_9 +230 0x1013 //RX_FDEQ_BIN_10 +231 0x1719 //RX_FDEQ_BIN_11 +232 0x1B1E //RX_FDEQ_BIN_12 +233 0x1E1E //RX_FDEQ_BIN_13 +234 0x1E28 //RX_FDEQ_BIN_14 +235 0x282C //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x4000 //RX_FDEQ_RESRV_0 +245 0x0320 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0035 //RX_FDDRC_BAND_MARGIN_1 +248 0x00D5 //RX_FDDRC_BAND_MARGIN_2 +249 0x0120 //RX_FDDRC_BAND_MARGIN_3 +250 0x0004 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x2000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x2000 //RX_FDDRC_THRD_3_2 +258 0x5000 //RX_FDDRC_THRD_3_3 +259 0x4000 //RX_FDDRC_SLANT_0_0 +260 0x4000 //RX_FDDRC_SLANT_0_1 +261 0x4000 //RX_FDDRC_SLANT_0_2 +262 0x4000 //RX_FDDRC_SLANT_0_3 +263 0x7FFF //RX_FDDRC_SLANT_1_0 +264 0x7FFF //RX_FDDRC_SLANT_1_1 +265 0x7FFF //RX_FDDRC_SLANT_1_2 +266 0x7FFF //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +286 0x0034 //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 +#VOL 5 +163 0x6000 //RX_TDDRC_ALPHA_UP_1 +164 0x6000 //RX_TDDRC_ALPHA_UP_2 +165 0x6000 //RX_TDDRC_ALPHA_UP_3 +166 0x1000 //RX_TDDRC_ALPHA_UP_4 +184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +185 0x4000 //RX_TDDRC_ALPHA_DWN_2 +186 0x4000 //RX_TDDRC_ALPHA_DWN_3 +189 0x4000 //RX_TDDRC_ALPHA_DWN_4 +190 0x7214 //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +269 0x0002 //RX_TDDRC_THRD_0 +270 0x0004 //RX_TDDRC_THRD_1 +271 0x1800 //RX_TDDRC_THRD_2 +272 0x1800 //RX_TDDRC_THRD_3 +273 0x7FFF //RX_TDDRC_SLANT_0 +274 0x7FFF //RX_TDDRC_SLANT_1 +275 0x6000 //RX_TDDRC_ALPHA_UP_0 +276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x199A //RX_TDDRC_HMNC_GAIN +279 0x0001 //RX_TDDRC_SMT_FLAG +280 0x0CCD //RX_TDDRC_SMT_W +281 0x0D56 //RX_TDDRC_DRC_GAIN +195 0x0020 //RX_FDEQ_SUBNUM +196 0x6868 //RX_FDEQ_GAIN_0 +197 0x6850 //RX_FDEQ_GAIN_1 +198 0x5048 //RX_FDEQ_GAIN_2 +199 0x383C //RX_FDEQ_GAIN_3 +200 0x4048 //RX_FDEQ_GAIN_4 +201 0x7040 //RX_FDEQ_GAIN_5 +202 0x4C44 //RX_FDEQ_GAIN_6 +203 0x4448 //RX_FDEQ_GAIN_7 +204 0x4868 //RX_FDEQ_GAIN_8 +205 0x7C70 //RX_FDEQ_GAIN_9 +206 0x707C //RX_FDEQ_GAIN_10 +207 0x786C //RX_FDEQ_GAIN_11 +208 0x6454 //RX_FDEQ_GAIN_12 +209 0x604C //RX_FDEQ_GAIN_13 +210 0x585C //RX_FDEQ_GAIN_14 +211 0x7480 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0202 //RX_FDEQ_BIN_0 +221 0x0203 //RX_FDEQ_BIN_1 +222 0x0303 //RX_FDEQ_BIN_2 +223 0x0304 //RX_FDEQ_BIN_3 +224 0x0404 //RX_FDEQ_BIN_4 +225 0x0308 //RX_FDEQ_BIN_5 +226 0x0808 //RX_FDEQ_BIN_6 +227 0x090A //RX_FDEQ_BIN_7 +228 0x0B0C //RX_FDEQ_BIN_8 +229 0x0D0E //RX_FDEQ_BIN_9 +230 0x1013 //RX_FDEQ_BIN_10 +231 0x1719 //RX_FDEQ_BIN_11 +232 0x1B1E //RX_FDEQ_BIN_12 +233 0x1E1E //RX_FDEQ_BIN_13 +234 0x1E28 //RX_FDEQ_BIN_14 +235 0x282C //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x4000 //RX_FDEQ_RESRV_0 +245 0x0320 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0035 //RX_FDDRC_BAND_MARGIN_1 +248 0x00D5 //RX_FDDRC_BAND_MARGIN_2 +249 0x0120 //RX_FDDRC_BAND_MARGIN_3 +250 0x0004 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x2000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x2000 //RX_FDDRC_THRD_3_2 +258 0x5000 //RX_FDDRC_THRD_3_3 +259 0x4000 //RX_FDDRC_SLANT_0_0 +260 0x4000 //RX_FDDRC_SLANT_0_1 +261 0x4000 //RX_FDDRC_SLANT_0_2 +262 0x4000 //RX_FDDRC_SLANT_0_3 +263 0x7FFF //RX_FDDRC_SLANT_1_0 +264 0x7FFF //RX_FDDRC_SLANT_1_1 +265 0x7FFF //RX_FDDRC_SLANT_1_2 +266 0x7FFF //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +286 0x0059 //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 +#VOL 6 +163 0x6000 //RX_TDDRC_ALPHA_UP_1 +164 0x6000 //RX_TDDRC_ALPHA_UP_2 +165 0x6000 //RX_TDDRC_ALPHA_UP_3 +166 0x1000 //RX_TDDRC_ALPHA_UP_4 +184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +185 0x4000 //RX_TDDRC_ALPHA_DWN_2 +186 0x4000 //RX_TDDRC_ALPHA_DWN_3 +189 0x4000 //RX_TDDRC_ALPHA_DWN_4 +190 0x7214 //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +269 0x0002 //RX_TDDRC_THRD_0 +270 0x0004 //RX_TDDRC_THRD_1 +271 0x1800 //RX_TDDRC_THRD_2 +272 0x1800 //RX_TDDRC_THRD_3 +273 0x7FFF //RX_TDDRC_SLANT_0 +274 0x7FFF //RX_TDDRC_SLANT_1 +275 0x6000 //RX_TDDRC_ALPHA_UP_0 +276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x199A //RX_TDDRC_HMNC_GAIN +279 0x0001 //RX_TDDRC_SMT_FLAG +280 0x0CCD //RX_TDDRC_SMT_W +281 0x0D56 //RX_TDDRC_DRC_GAIN +195 0x0020 //RX_FDEQ_SUBNUM +196 0x6868 //RX_FDEQ_GAIN_0 +197 0x6850 //RX_FDEQ_GAIN_1 +198 0x5048 //RX_FDEQ_GAIN_2 +199 0x383C //RX_FDEQ_GAIN_3 +200 0x4048 //RX_FDEQ_GAIN_4 +201 0x7040 //RX_FDEQ_GAIN_5 +202 0x4C44 //RX_FDEQ_GAIN_6 +203 0x4448 //RX_FDEQ_GAIN_7 +204 0x4868 //RX_FDEQ_GAIN_8 +205 0x7C70 //RX_FDEQ_GAIN_9 +206 0x707C //RX_FDEQ_GAIN_10 +207 0x786C //RX_FDEQ_GAIN_11 +208 0x6454 //RX_FDEQ_GAIN_12 +209 0x604C //RX_FDEQ_GAIN_13 +210 0x585C //RX_FDEQ_GAIN_14 +211 0x7480 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0202 //RX_FDEQ_BIN_0 +221 0x0203 //RX_FDEQ_BIN_1 +222 0x0303 //RX_FDEQ_BIN_2 +223 0x0304 //RX_FDEQ_BIN_3 +224 0x0404 //RX_FDEQ_BIN_4 +225 0x0308 //RX_FDEQ_BIN_5 +226 0x0808 //RX_FDEQ_BIN_6 +227 0x090A //RX_FDEQ_BIN_7 +228 0x0B0C //RX_FDEQ_BIN_8 +229 0x0D0E //RX_FDEQ_BIN_9 +230 0x1013 //RX_FDEQ_BIN_10 +231 0x1719 //RX_FDEQ_BIN_11 +232 0x1B1E //RX_FDEQ_BIN_12 +233 0x1E1E //RX_FDEQ_BIN_13 +234 0x1E28 //RX_FDEQ_BIN_14 +235 0x282C //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x4000 //RX_FDEQ_RESRV_0 +245 0x0320 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0035 //RX_FDDRC_BAND_MARGIN_1 +248 0x00D5 //RX_FDDRC_BAND_MARGIN_2 +249 0x0120 //RX_FDDRC_BAND_MARGIN_3 +250 0x0004 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x2000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x2000 //RX_FDDRC_THRD_3_2 +258 0x5000 //RX_FDDRC_THRD_3_3 +259 0x4000 //RX_FDDRC_SLANT_0_0 +260 0x4000 //RX_FDDRC_SLANT_0_1 +261 0x4000 //RX_FDDRC_SLANT_0_2 +262 0x4000 //RX_FDDRC_SLANT_0_3 +263 0x7FFF //RX_FDDRC_SLANT_1_0 +264 0x7FFF //RX_FDDRC_SLANT_1_1 +265 0x7FFF //RX_FDDRC_SLANT_1_2 +266 0x7FFF //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +286 0x0100 //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 #CASE_NAME HEADSET-TTY_HCO-VOICE_GENERIC-FB -#PARAM_MODE FULL -#PARAM_TYPE TX+RX -#TOTAL_CUSTOM_STEP 7 +#PARAM_MODE Full +#PARAM_TYPE TX+2RX +#TOTAL_CUSTOM_STEP 7+7 #TX 0 0x0001 //TX_OPERATION_MODE_0 1 0x0000 //TX_OPERATION_MODE_1 @@ -40592,7 +61660,7 @@ 239 0x0000 //TX_DT_RESRV_7 240 0x0000 //TX_DT_RESRV_8 241 0x0000 //TX_DT_RESRV_9 -242 0xF200 //TX_THR_SN_EST_0 +242 0xF700 //TX_THR_SN_EST_0 243 0xF400 //TX_THR_SN_EST_1 244 0xF800 //TX_THR_SN_EST_2 245 0xF600 //TX_THR_SN_EST_3 @@ -40601,12 +61669,12 @@ 248 0xF800 //TX_THR_SN_EST_6 249 0xF800 //TX_THR_SN_EST_7 250 0x0100 //TX_DELTA_THR_SN_EST_0 -251 0x0000 //TX_DELTA_THR_SN_EST_1 +251 0x0100 //TX_DELTA_THR_SN_EST_1 252 0x0100 //TX_DELTA_THR_SN_EST_2 -253 0x0100 //TX_DELTA_THR_SN_EST_3 +253 0x0200 //TX_DELTA_THR_SN_EST_3 254 0x0200 //TX_DELTA_THR_SN_EST_4 255 0x0200 //TX_DELTA_THR_SN_EST_5 -256 0x0200 //TX_DELTA_THR_SN_EST_6 +256 0x0000 //TX_DELTA_THR_SN_EST_6 257 0x0200 //TX_DELTA_THR_SN_EST_7 258 0x4000 //TX_LAMBDA_NN_EST_0 259 0x4000 //TX_LAMBDA_NN_EST_1 @@ -40632,12 +61700,12 @@ 279 0x0000 //TX_B_POST_FLT_0 280 0x0000 //TX_B_POST_FLT_1 281 0x001A //TX_NS_LVL_CTRL_0 -282 0x001A //TX_NS_LVL_CTRL_1 +282 0x0014 //TX_NS_LVL_CTRL_1 283 0x0014 //TX_NS_LVL_CTRL_2 -284 0x0014 //TX_NS_LVL_CTRL_3 +284 0x000C //TX_NS_LVL_CTRL_3 285 0x000C //TX_NS_LVL_CTRL_4 286 0x000C //TX_NS_LVL_CTRL_5 -287 0x000C //TX_NS_LVL_CTRL_6 +287 0x001A //TX_NS_LVL_CTRL_6 288 0x000C //TX_NS_LVL_CTRL_7 289 0x000E //TX_MIN_GAIN_S_0 290 0x0014 //TX_MIN_GAIN_S_1 @@ -40653,10 +61721,10 @@ 300 0x7FFF //TX_SNRI_SUP_0 301 0x7FFF //TX_SNRI_SUP_1 302 0x7FFF //TX_SNRI_SUP_2 -303 0x7FFF //TX_SNRI_SUP_3 +303 0x4000 //TX_SNRI_SUP_3 304 0x4000 //TX_SNRI_SUP_4 305 0x4000 //TX_SNRI_SUP_5 -306 0x4000 //TX_SNRI_SUP_6 +306 0x7FFF //TX_SNRI_SUP_6 307 0x4000 //TX_SNRI_SUP_7 308 0x1200 //TX_THR_LFNS 309 0x0147 //TX_G_LFNS @@ -40665,12 +61733,12 @@ 312 0x7FFF //TX_A_POST_FILT_0 313 0x7FFF //TX_A_POST_FILT_1 314 0x4000 //TX_A_POST_FILT_S_0 -315 0x199A //TX_A_POST_FILT_S_1 +315 0x1000 //TX_A_POST_FILT_S_1 316 0x1000 //TX_A_POST_FILT_S_2 -317 0x1000 //TX_A_POST_FILT_S_3 +317 0x6666 //TX_A_POST_FILT_S_3 318 0x6666 //TX_A_POST_FILT_S_4 319 0x6666 //TX_A_POST_FILT_S_5 -320 0x6666 //TX_A_POST_FILT_S_6 +320 0x199A //TX_A_POST_FILT_S_6 321 0x6666 //TX_A_POST_FILT_S_7 322 0x2000 //TX_B_POST_FILT_0 323 0x2000 //TX_B_POST_FILT_1 @@ -40717,7 +61785,7 @@ 364 0x0000 //TX_K_APT 365 0x0001 //TX_NOISEDET 366 0x05A0 //TX_NDETCT -367 0x000A //TX_NOISE_TH_0 +367 0x04E8 //TX_NOISE_TH_0 368 0x1388 //TX_NOISE_TH_0_2 369 0x3A98 //TX_NOISE_TH_0_3 370 0x0C80 //TX_NOISE_TH_1 @@ -40729,11 +61797,11 @@ 376 0x7FFF //TX_NOISE_TH_5_3 377 0x7FFF //TX_NOISE_TH_5_4 378 0x00C8 //TX_NOISE_TH_6 -379 0x000A //TX_MINENOISE_TH -380 0x0000 //TX_MINENOISE_MIC0_TH_MTS -381 0x0000 //TX_MINENOISE_MIC0_TH_EXP -382 0x0000 //TX_MINENOISE_MIC0_S_TH_MTS -383 0x0000 //TX_MINENOISE_MIC0_S_TH_EXP +379 0x02BC //TX_MINENOISE_TH +380 0xD508 //TX_MORENS_TFMASK_TH +381 0x0001 //TX_DRC_QUIET_FLOOR +382 0x3A98 //TX_RATIODTL_CUT_TH +383 0x1482 //TX_DT_CUT_K1 384 0x6400 //TX_OUT_ENER_S_TH_CLEAN 385 0x6400 //TX_OUT_ENER_S_TH_LESSCLEAN 386 0x6400 //TX_OUT_ENER_S_TH_NOISY @@ -40741,22 +61809,22 @@ 388 0x7D00 //TX_OUT_ENER_TH_SPEECH 389 0x0000 //TX_SN_NPB_GAIN 390 0x0000 //TX_NN_NPB_GAIN -391 0x0000 //TX_CSX_ALPHA_0 -392 0x0000 //TX_CSX_ALPHA_1 -393 0x0000 //TX_CSX_ALPHA_2 -394 0x0000 //TX_CSX_ALPHA_3 -395 0x0000 //TX_MU_ARSP_EST -396 0x0000 //TX_P_OUTBEAM_MIN_TH +391 0x7FFF //TX_POST_MASK_SUP_HSNE +392 0x1388 //TX_TAIL_DET_TH +393 0x4000 //TX_B_LESSCUT_RTO_WTA +394 0x0000 //TX_MEL_G_R +395 0x0080 //TX_SUPHIGH_TH +396 0x0000 //TX_MASK_G_R 397 0x0000 //TX_EXTRA_NS_L -398 0x0000 //TX_EXTRA_NS_A -399 0x0000 //TX_VR_NOISE_FLOOR_TH +398 0x1800 //TX_C_POST_FLT_MASK +399 0x7FFF //TX_A_POST_FLT_WNS 400 0x0000 //TX_MIN_G_LOW300HZ 401 0x0010 //TX_MAXLEVEL_CNG 402 0x0000 //TX_STN_NOISE_TH 403 0x0000 //TX_POST_MASK_SUP 404 0x0000 //TX_POST_MASK_ADJUST 405 0x0014 //TX_NS_ENOISE_MIC0_TH -406 0x0014 //TX_MINENOISE_MIC0_TH +406 0x04E7 //TX_MINENOISE_MIC0_TH 407 0x0226 //TX_MINENOISE_MIC0_S_TH 408 0x2879 //TX_MIN_G_CTRL_SSNS 409 0x0400 //TX_METAL_RTO_THR @@ -40864,16 +61932,16 @@ 511 0x6666 //TX_MIC_TO_BFGAIN 512 0x6666 //TX_MICTOBFGAIN0 513 0x0014 //TX_FASTMUE_TH -514 0x0000 //TX_DERVB_LEN_0 -515 0x0000 //TX_DERVB_LEN_1 -516 0x0000 //TX_RHO_DERVB -517 0x0000 //TX_MIC_INDX_DERVB -518 0x0000 //TX_MU_DERVB -519 0x0000 //TX_DR_RESRV_0 -520 0x0000 //TX_DR_RESRV_1 -521 0x0000 //TX_DR_RESRV_2 -522 0x0000 //TX_DR_RESRV_3 -523 0x0000 //TX_DR_RESRV_4 +514 0xC000 //TX_DEREVERB_LF_MU +515 0xC000 //TX_DEREVERB_HF_MU +516 0xCCCC //TX_DEREVERB_DELAY +517 0xD999 //TX_DEREVERB_COEF_LEN +518 0x1F40 //TX_DEREVERB_DNR +519 0x0000 //TX_DEREVERB_ALPHA +520 0x0000 //TX_DEREVERB_BETA +521 0x0000 //TX_GSC_RTOL_TH +522 0x7000 //TX_GSC_RTOH_TH +523 0x0064 //TX_WIDE2_MEANHTH 524 0x0000 //TX_DR_RESRV_5 525 0x0000 //TX_DR_RESRV_6 526 0x0000 //TX_DR_RESRV_7 @@ -41239,16 +62307,81 @@ 886 0x0000 //TX_FASTNS_TFMASKBIN_TH2 887 0x0000 //TX_FASTNS_TFMASKBIN_TH3 888 0x00C8 //TX_FASTNS_ARSPC_TH -889 0xD99A //TX_FASTNS_MASK5_TH +889 0xC000 //TX_FASTNS_MASK5_TH 890 0x051F //TX_POSTSSA_MIN_G_VR_MASK -891 0x7FFF //TX_A_LESSCUT_RTO_MASK +891 0x7000 //TX_A_LESSCUT_RTO_MASK 892 0x1770 //TX_FASTNS_NOISETH 893 0xC000 //TX_FASTNS_SSA_THLFL 894 0xC000 //TX_FASTNS_SSA_THHFL 895 0xCCCC //TX_FASTNS_SSA_THLFH 896 0xD999 //TX_FASTNS_SSA_THHFH +897 0x2339 //TX_SENDFUNC_REG_MICMUTE +898 0x0021 //TX_SENDFUNC_REG_MICMUTE1 +899 0x02BC //TX_MICMUTE_RATIO_THR +900 0x0140 //TX_MICMUTE_AMP_THR +901 0x0004 //TX_MICMUTE_HPF_IND +902 0x00C0 //TX_MICMUTE_LOG_EYR_TH +903 0x0008 //TX_MICMUTE_CVG_TIME +904 0x0008 //TX_MICMUTE_RELEASE_TIME +905 0x01FE //TX_MIC_VOLUME_MIC0MUTE +906 0x0020 //TX_MICMUTE_EPD_OFFSET_0 +907 0x001E //TX_MICMUTE_FRQ_AEC_L +908 0x7999 //TX_MICMUTE_EAD_THR +909 0x7FFF //TX_MICMUTE_LAMBDA_CB_NLE +910 0x7FFF //TX_MICMUTE_LAMBDA_RE_EST +911 0x4000 //TX_DTD_THR1_MICMUTE_0 +912 0x7000 //TX_DTD_THR1_MICMUTE_1 +913 0x7FFF //TX_DTD_THR1_MICMUTE_2 +914 0x7FFF //TX_DTD_THR1_MICMUTE_3 +915 0x6CCC //TX_DTD_THR2_MICMUTE_0 +916 0x0400 //TX_MICMUTE_MIN_EQ_RE_EST_0 +917 0x0400 //TX_MICMUTE_MIN_EQ_RE_EST_1 +918 0x1000 //TX_MICMUTE_MIN_EQ_RE_EST_2 +919 0x7FFF //TX_MICMUTE_MIN_EQ_RE_EST_3 +920 0x7FFF //TX_MICMUTE_MIN_EQ_RE_EST_4 +921 0x4000 //TX_MICMUTE_C_POST_FLT +922 0x03E8 //TX_MICMUTE_DT_CUT_K +923 0x0001 //TX_MICMUTE_DT_CUT_THR +924 0x03E8 //TX_MICMUTE_DT_CUT_K2 +925 0x0001 //TX_MICMUTE_DT_CUT_THR2 +926 0x0064 //TX_MICMUTE_DT2_HOLD_N +927 0x1000 //TX_MICMUTE_RATIODTH_THCUT +928 0x1000 //TX_MICMUTE_B_POST_FLT_ECHOL +929 0x7FFF //TX_MICMUTE_B_POST_FLT_ECHOH +930 0x0400 //TX_MICMUTE_C_POST_FLT_MASK +931 0x7999 //TX_MICMUTE_RATIODTL_CUT_TH +932 0x0258 //TX_MICMUTE_DT_CUT_K1 +933 0x0800 //TX_MICMUTE_N2_SN_EST +934 0xFC00 //TX_MICMUTE_THR_SN_EST_0 +935 0x001C //TX_MICMUTE_MIN_G_CTRL_0 +936 0x6000 //TX_MICMUTE_A_POST_FILT_S_0 +937 0x7000 //TX_MICMUTE_B_POST_FILT_0 +938 0x2710 //TX_MIC1RUB_AMP_THR +939 0x0010 //TX_MIC1MUTE_RATIO_THR +940 0x0450 //TX_MIC1MUTE_AMP_THR +941 0x0008 //TX_MIC1MUTE_CVG_TIME +942 0x0008 //TX_MIC1MUTE_RELEASE_TIME +943 0x0000 //TX_AMS_RESRV_01 +944 0x0000 //TX_AMS_RESRV_02 +945 0x0000 //TX_AMS_RESRV_03 +946 0x0000 //TX_AMS_RESRV_04 +947 0x0000 //TX_AMS_RESRV_05 +948 0x0000 //TX_AMS_RESRV_06 +949 0x0000 //TX_AMS_RESRV_07 +950 0x0000 //TX_AMS_RESRV_08 +951 0x0000 //TX_AMS_RESRV_09 +952 0x0000 //TX_AMS_RESRV_10 +953 0x0000 //TX_AMS_RESRV_11 +954 0x0000 //TX_AMS_RESRV_12 +955 0x0000 //TX_AMS_RESRV_13 +956 0x0000 //TX_AMS_RESRV_14 +957 0x0000 //TX_AMS_RESRV_15 +958 0x0000 //TX_AMS_RESRV_16 +959 0x0000 //TX_AMS_RESRV_17 +960 0x0000 //TX_AMS_RESRV_18 +961 0x0000 //TX_AMS_RESRV_19 #RX -0 0x006C //RX_RECVFUNC_MODE_0 +0 0x242C //RX_RECVFUNC_MODE_0 1 0x0000 //RX_RECVFUNC_MODE_1 2 0x0004 //RX_SAMPLINGFREQ_SIG 3 0x0004 //RX_SAMPLINGFREQ_PROC @@ -41258,7 +62391,7 @@ 7 0x4000 //RX_TDDRC_ALPHA_UP_2 8 0x4000 //RX_TDDRC_ALPHA_UP_3 9 0x4000 //RX_TDDRC_ALPHA_UP_4 -10 0x0800 //RX_PGA +10 0x0403 //RX_PGA 11 0x7E56 //RX_A_HP 12 0x4000 //RX_B_PE 13 0x7800 //RX_THR_PITCH_DET_0 @@ -41276,32 +62409,32 @@ 25 0x000A //RX_FENS_RESRV_0 26 0x0190 //RX_FENS_RESRV_1 27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 -28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 -29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 +28 0x4000 //RX_TDDRC_ALPHA_DWN_2 +29 0x4000 //RX_TDDRC_ALPHA_DWN_3 30 0x0002 //RX_EXTRA_NS_L 31 0x0800 //RX_EXTRA_NS_A -32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 -33 0x7FFF //RX_TDDRC_LIMITER_THRD +32 0x4000 //RX_TDDRC_ALPHA_DWN_4 +33 0x7214 //RX_TDDRC_LIMITER_THRD 34 0x0800 //RX_TDDRC_LIMITER_GAIN 35 0x199A //RX_A_POST_FLT 36 0x0000 //RX_LMT_THRD 37 0x4000 //RX_LMT_ALPHA 38 0x0020 //RX_FDEQ_SUBNUM 39 0x4848 //RX_FDEQ_GAIN_0 -40 0x4848 //RX_FDEQ_GAIN_1 -41 0x4848 //RX_FDEQ_GAIN_2 -42 0x4850 //RX_FDEQ_GAIN_3 -43 0x4848 //RX_FDEQ_GAIN_4 -44 0x4848 //RX_FDEQ_GAIN_5 -45 0x4568 //RX_FDEQ_GAIN_6 -46 0x485C //RX_FDEQ_GAIN_7 -47 0x5C60 //RX_FDEQ_GAIN_8 -48 0x685C //RX_FDEQ_GAIN_9 -49 0x5648 //RX_FDEQ_GAIN_10 -50 0x484C //RX_FDEQ_GAIN_11 -51 0x706C //RX_FDEQ_GAIN_12 -52 0x7070 //RX_FDEQ_GAIN_13 -53 0x6868 //RX_FDEQ_GAIN_14 +40 0x4040 //RX_FDEQ_GAIN_1 +41 0x3838 //RX_FDEQ_GAIN_2 +42 0x3448 //RX_FDEQ_GAIN_3 +43 0x343C //RX_FDEQ_GAIN_4 +44 0x4040 //RX_FDEQ_GAIN_5 +45 0x4048 //RX_FDEQ_GAIN_6 +46 0x384C //RX_FDEQ_GAIN_7 +47 0x4C54 //RX_FDEQ_GAIN_8 +48 0x5C54 //RX_FDEQ_GAIN_9 +49 0x4E38 //RX_FDEQ_GAIN_10 +50 0x303C //RX_FDEQ_GAIN_11 +51 0x5450 //RX_FDEQ_GAIN_12 +52 0x4860 //RX_FDEQ_GAIN_13 +53 0x6060 //RX_FDEQ_GAIN_14 54 0x6060 //RX_FDEQ_GAIN_15 55 0x4848 //RX_FDEQ_GAIN_16 56 0x4848 //RX_FDEQ_GAIN_17 @@ -41364,20 +62497,20 @@ 113 0x0002 //RX_TDDRC_THRD_1 114 0x1800 //RX_TDDRC_THRD_2 115 0x1800 //RX_TDDRC_THRD_3 -116 0x6000 //RX_TDDRC_SLANT_0 -117 0x6E00 //RX_TDDRC_SLANT_1 +116 0x7FFF //RX_TDDRC_SLANT_0 +117 0x7FFF //RX_TDDRC_SLANT_1 118 0x4000 //RX_TDDRC_ALPHA_UP_0 119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 120 0x0000 //RX_TDDRC_HMNC_FLAG 121 0x199A //RX_TDDRC_HMNC_GAIN 122 0x0001 //RX_TDDRC_SMT_FLAG 123 0x0CCD //RX_TDDRC_SMT_W -124 0x02D2 //RX_TDDRC_DRC_GAIN +124 0x0439 //RX_TDDRC_DRC_GAIN 125 0x7C00 //RX_LAMBDA_PKA_FP -126 0x2000 //RX_TPKA_FP -127 0x2000 //RX_MIN_G_FP -128 0x0080 //RX_MAX_G_FP -129 0x0013 //RX_SPK_VOL +126 0x1B58 //RX_TPKA_FP +127 0x0400 //RX_MIN_G_FP +128 0x0800 //RX_MAX_G_FP +129 0x0100 //RX_SPK_VOL 130 0x0000 //RX_VOL_RESRV_0 131 0x0000 //RX_MAXLEVEL_CNG 132 0x3000 //RX_BWE_UV_TH @@ -41411,40 +62544,40 @@ 8 0x4000 //RX_TDDRC_ALPHA_UP_3 9 0x4000 //RX_TDDRC_ALPHA_UP_4 27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 -28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 -29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 -32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 -33 0x7FFF //RX_TDDRC_LIMITER_THRD +28 0x4000 //RX_TDDRC_ALPHA_DWN_2 +29 0x4000 //RX_TDDRC_ALPHA_DWN_3 +32 0x4000 //RX_TDDRC_ALPHA_DWN_4 +33 0x7214 //RX_TDDRC_LIMITER_THRD 34 0x0800 //RX_TDDRC_LIMITER_GAIN 112 0x0001 //RX_TDDRC_THRD_0 113 0x0002 //RX_TDDRC_THRD_1 114 0x1800 //RX_TDDRC_THRD_2 115 0x1800 //RX_TDDRC_THRD_3 -116 0x6000 //RX_TDDRC_SLANT_0 -117 0x6E00 //RX_TDDRC_SLANT_1 +116 0x7FFF //RX_TDDRC_SLANT_0 +117 0x7FFF //RX_TDDRC_SLANT_1 118 0x4000 //RX_TDDRC_ALPHA_UP_0 119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 120 0x0000 //RX_TDDRC_HMNC_FLAG 121 0x199A //RX_TDDRC_HMNC_GAIN 122 0x0001 //RX_TDDRC_SMT_FLAG 123 0x0CCD //RX_TDDRC_SMT_W -124 0x02D2 //RX_TDDRC_DRC_GAIN +124 0x0439 //RX_TDDRC_DRC_GAIN 38 0x0020 //RX_FDEQ_SUBNUM 39 0x4848 //RX_FDEQ_GAIN_0 -40 0x4848 //RX_FDEQ_GAIN_1 -41 0x4848 //RX_FDEQ_GAIN_2 -42 0x4850 //RX_FDEQ_GAIN_3 -43 0x4848 //RX_FDEQ_GAIN_4 -44 0x4848 //RX_FDEQ_GAIN_5 -45 0x4568 //RX_FDEQ_GAIN_6 -46 0x485C //RX_FDEQ_GAIN_7 -47 0x5C60 //RX_FDEQ_GAIN_8 -48 0x685C //RX_FDEQ_GAIN_9 -49 0x5648 //RX_FDEQ_GAIN_10 -50 0x484C //RX_FDEQ_GAIN_11 -51 0x706C //RX_FDEQ_GAIN_12 -52 0x7070 //RX_FDEQ_GAIN_13 -53 0x6868 //RX_FDEQ_GAIN_14 +40 0x4040 //RX_FDEQ_GAIN_1 +41 0x3838 //RX_FDEQ_GAIN_2 +42 0x3448 //RX_FDEQ_GAIN_3 +43 0x343C //RX_FDEQ_GAIN_4 +44 0x4040 //RX_FDEQ_GAIN_5 +45 0x4048 //RX_FDEQ_GAIN_6 +46 0x384C //RX_FDEQ_GAIN_7 +47 0x4C54 //RX_FDEQ_GAIN_8 +48 0x5C54 //RX_FDEQ_GAIN_9 +49 0x4E38 //RX_FDEQ_GAIN_10 +50 0x303C //RX_FDEQ_GAIN_11 +51 0x5450 //RX_FDEQ_GAIN_12 +52 0x4860 //RX_FDEQ_GAIN_13 +53 0x6060 //RX_FDEQ_GAIN_14 54 0x6060 //RX_FDEQ_GAIN_15 55 0x4848 //RX_FDEQ_GAIN_16 56 0x4848 //RX_FDEQ_GAIN_17 @@ -41502,7 +62635,7 @@ 108 0x7FFF //RX_FDDRC_SLANT_1_2 109 0x7FFF //RX_FDDRC_SLANT_1_3 110 0x0000 //RX_FDDRC_RESRV_0 -129 0x0013 //RX_SPK_VOL +129 0x0012 //RX_SPK_VOL 130 0x0000 //RX_VOL_RESRV_0 #VOL 1 6 0x4000 //RX_TDDRC_ALPHA_UP_1 @@ -41510,40 +62643,40 @@ 8 0x4000 //RX_TDDRC_ALPHA_UP_3 9 0x4000 //RX_TDDRC_ALPHA_UP_4 27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 -28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 -29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 -32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 -33 0x7FFF //RX_TDDRC_LIMITER_THRD +28 0x4000 //RX_TDDRC_ALPHA_DWN_2 +29 0x4000 //RX_TDDRC_ALPHA_DWN_3 +32 0x4000 //RX_TDDRC_ALPHA_DWN_4 +33 0x7214 //RX_TDDRC_LIMITER_THRD 34 0x0800 //RX_TDDRC_LIMITER_GAIN 112 0x0001 //RX_TDDRC_THRD_0 113 0x0002 //RX_TDDRC_THRD_1 114 0x1800 //RX_TDDRC_THRD_2 115 0x1800 //RX_TDDRC_THRD_3 -116 0x6000 //RX_TDDRC_SLANT_0 -117 0x6E00 //RX_TDDRC_SLANT_1 +116 0x7FFF //RX_TDDRC_SLANT_0 +117 0x7FFF //RX_TDDRC_SLANT_1 118 0x4000 //RX_TDDRC_ALPHA_UP_0 119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 120 0x0000 //RX_TDDRC_HMNC_FLAG 121 0x199A //RX_TDDRC_HMNC_GAIN 122 0x0001 //RX_TDDRC_SMT_FLAG 123 0x0CCD //RX_TDDRC_SMT_W -124 0x02D2 //RX_TDDRC_DRC_GAIN +124 0x0439 //RX_TDDRC_DRC_GAIN 38 0x0020 //RX_FDEQ_SUBNUM 39 0x4848 //RX_FDEQ_GAIN_0 -40 0x4848 //RX_FDEQ_GAIN_1 -41 0x4848 //RX_FDEQ_GAIN_2 -42 0x4850 //RX_FDEQ_GAIN_3 -43 0x4848 //RX_FDEQ_GAIN_4 -44 0x4848 //RX_FDEQ_GAIN_5 -45 0x4568 //RX_FDEQ_GAIN_6 -46 0x485C //RX_FDEQ_GAIN_7 -47 0x5C60 //RX_FDEQ_GAIN_8 -48 0x685C //RX_FDEQ_GAIN_9 -49 0x5648 //RX_FDEQ_GAIN_10 -50 0x484C //RX_FDEQ_GAIN_11 -51 0x706C //RX_FDEQ_GAIN_12 -52 0x7070 //RX_FDEQ_GAIN_13 -53 0x6868 //RX_FDEQ_GAIN_14 +40 0x4040 //RX_FDEQ_GAIN_1 +41 0x3838 //RX_FDEQ_GAIN_2 +42 0x3448 //RX_FDEQ_GAIN_3 +43 0x343C //RX_FDEQ_GAIN_4 +44 0x4040 //RX_FDEQ_GAIN_5 +45 0x4048 //RX_FDEQ_GAIN_6 +46 0x384C //RX_FDEQ_GAIN_7 +47 0x4C54 //RX_FDEQ_GAIN_8 +48 0x5C54 //RX_FDEQ_GAIN_9 +49 0x4E38 //RX_FDEQ_GAIN_10 +50 0x303C //RX_FDEQ_GAIN_11 +51 0x5450 //RX_FDEQ_GAIN_12 +52 0x4860 //RX_FDEQ_GAIN_13 +53 0x6060 //RX_FDEQ_GAIN_14 54 0x6060 //RX_FDEQ_GAIN_15 55 0x4848 //RX_FDEQ_GAIN_16 56 0x4848 //RX_FDEQ_GAIN_17 @@ -41601,7 +62734,7 @@ 108 0x7FFF //RX_FDDRC_SLANT_1_2 109 0x7FFF //RX_FDDRC_SLANT_1_3 110 0x0000 //RX_FDDRC_RESRV_0 -129 0x001C //RX_SPK_VOL +129 0x001A //RX_SPK_VOL 130 0x0000 //RX_VOL_RESRV_0 #VOL 2 6 0x4000 //RX_TDDRC_ALPHA_UP_1 @@ -41609,40 +62742,40 @@ 8 0x4000 //RX_TDDRC_ALPHA_UP_3 9 0x4000 //RX_TDDRC_ALPHA_UP_4 27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 -28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 -29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 -32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 -33 0x7FFF //RX_TDDRC_LIMITER_THRD +28 0x4000 //RX_TDDRC_ALPHA_DWN_2 +29 0x4000 //RX_TDDRC_ALPHA_DWN_3 +32 0x4000 //RX_TDDRC_ALPHA_DWN_4 +33 0x7214 //RX_TDDRC_LIMITER_THRD 34 0x0800 //RX_TDDRC_LIMITER_GAIN 112 0x0001 //RX_TDDRC_THRD_0 113 0x0002 //RX_TDDRC_THRD_1 114 0x1800 //RX_TDDRC_THRD_2 115 0x1800 //RX_TDDRC_THRD_3 -116 0x6000 //RX_TDDRC_SLANT_0 -117 0x6E00 //RX_TDDRC_SLANT_1 +116 0x7FFF //RX_TDDRC_SLANT_0 +117 0x7FFF //RX_TDDRC_SLANT_1 118 0x4000 //RX_TDDRC_ALPHA_UP_0 119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 120 0x0000 //RX_TDDRC_HMNC_FLAG 121 0x199A //RX_TDDRC_HMNC_GAIN 122 0x0001 //RX_TDDRC_SMT_FLAG 123 0x0CCD //RX_TDDRC_SMT_W -124 0x02D2 //RX_TDDRC_DRC_GAIN +124 0x0439 //RX_TDDRC_DRC_GAIN 38 0x0020 //RX_FDEQ_SUBNUM 39 0x4848 //RX_FDEQ_GAIN_0 -40 0x4848 //RX_FDEQ_GAIN_1 -41 0x4848 //RX_FDEQ_GAIN_2 -42 0x4850 //RX_FDEQ_GAIN_3 -43 0x4848 //RX_FDEQ_GAIN_4 -44 0x4848 //RX_FDEQ_GAIN_5 -45 0x4568 //RX_FDEQ_GAIN_6 -46 0x485C //RX_FDEQ_GAIN_7 -47 0x5C60 //RX_FDEQ_GAIN_8 -48 0x685C //RX_FDEQ_GAIN_9 -49 0x5648 //RX_FDEQ_GAIN_10 -50 0x484C //RX_FDEQ_GAIN_11 -51 0x706C //RX_FDEQ_GAIN_12 -52 0x7070 //RX_FDEQ_GAIN_13 -53 0x6868 //RX_FDEQ_GAIN_14 +40 0x4040 //RX_FDEQ_GAIN_1 +41 0x3838 //RX_FDEQ_GAIN_2 +42 0x3448 //RX_FDEQ_GAIN_3 +43 0x343C //RX_FDEQ_GAIN_4 +44 0x4040 //RX_FDEQ_GAIN_5 +45 0x4048 //RX_FDEQ_GAIN_6 +46 0x384C //RX_FDEQ_GAIN_7 +47 0x4C54 //RX_FDEQ_GAIN_8 +48 0x5C54 //RX_FDEQ_GAIN_9 +49 0x4E38 //RX_FDEQ_GAIN_10 +50 0x303C //RX_FDEQ_GAIN_11 +51 0x5450 //RX_FDEQ_GAIN_12 +52 0x4860 //RX_FDEQ_GAIN_13 +53 0x6060 //RX_FDEQ_GAIN_14 54 0x6060 //RX_FDEQ_GAIN_15 55 0x4848 //RX_FDEQ_GAIN_16 56 0x4848 //RX_FDEQ_GAIN_17 @@ -41700,7 +62833,7 @@ 108 0x7FFF //RX_FDDRC_SLANT_1_2 109 0x7FFF //RX_FDDRC_SLANT_1_3 110 0x0000 //RX_FDDRC_RESRV_0 -129 0x0028 //RX_SPK_VOL +129 0x0025 //RX_SPK_VOL 130 0x0000 //RX_VOL_RESRV_0 #VOL 3 6 0x4000 //RX_TDDRC_ALPHA_UP_1 @@ -41708,40 +62841,40 @@ 8 0x4000 //RX_TDDRC_ALPHA_UP_3 9 0x4000 //RX_TDDRC_ALPHA_UP_4 27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 -28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 -29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 -32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 -33 0x7FFF //RX_TDDRC_LIMITER_THRD +28 0x4000 //RX_TDDRC_ALPHA_DWN_2 +29 0x4000 //RX_TDDRC_ALPHA_DWN_3 +32 0x4000 //RX_TDDRC_ALPHA_DWN_4 +33 0x7214 //RX_TDDRC_LIMITER_THRD 34 0x0800 //RX_TDDRC_LIMITER_GAIN 112 0x0001 //RX_TDDRC_THRD_0 113 0x0002 //RX_TDDRC_THRD_1 114 0x1800 //RX_TDDRC_THRD_2 115 0x1800 //RX_TDDRC_THRD_3 -116 0x6000 //RX_TDDRC_SLANT_0 -117 0x6E00 //RX_TDDRC_SLANT_1 +116 0x7FFF //RX_TDDRC_SLANT_0 +117 0x7FFF //RX_TDDRC_SLANT_1 118 0x4000 //RX_TDDRC_ALPHA_UP_0 119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 120 0x0000 //RX_TDDRC_HMNC_FLAG 121 0x199A //RX_TDDRC_HMNC_GAIN 122 0x0001 //RX_TDDRC_SMT_FLAG 123 0x0CCD //RX_TDDRC_SMT_W -124 0x02D2 //RX_TDDRC_DRC_GAIN +124 0x0439 //RX_TDDRC_DRC_GAIN 38 0x0020 //RX_FDEQ_SUBNUM 39 0x4848 //RX_FDEQ_GAIN_0 -40 0x4848 //RX_FDEQ_GAIN_1 -41 0x4848 //RX_FDEQ_GAIN_2 -42 0x4850 //RX_FDEQ_GAIN_3 -43 0x4848 //RX_FDEQ_GAIN_4 -44 0x4848 //RX_FDEQ_GAIN_5 -45 0x4568 //RX_FDEQ_GAIN_6 -46 0x485C //RX_FDEQ_GAIN_7 -47 0x5C60 //RX_FDEQ_GAIN_8 -48 0x685C //RX_FDEQ_GAIN_9 -49 0x5648 //RX_FDEQ_GAIN_10 -50 0x484C //RX_FDEQ_GAIN_11 -51 0x706C //RX_FDEQ_GAIN_12 -52 0x7070 //RX_FDEQ_GAIN_13 -53 0x6868 //RX_FDEQ_GAIN_14 +40 0x4040 //RX_FDEQ_GAIN_1 +41 0x3838 //RX_FDEQ_GAIN_2 +42 0x3448 //RX_FDEQ_GAIN_3 +43 0x343C //RX_FDEQ_GAIN_4 +44 0x4040 //RX_FDEQ_GAIN_5 +45 0x4048 //RX_FDEQ_GAIN_6 +46 0x384C //RX_FDEQ_GAIN_7 +47 0x4C54 //RX_FDEQ_GAIN_8 +48 0x5C54 //RX_FDEQ_GAIN_9 +49 0x4E38 //RX_FDEQ_GAIN_10 +50 0x303C //RX_FDEQ_GAIN_11 +51 0x5450 //RX_FDEQ_GAIN_12 +52 0x4860 //RX_FDEQ_GAIN_13 +53 0x6060 //RX_FDEQ_GAIN_14 54 0x6060 //RX_FDEQ_GAIN_15 55 0x4848 //RX_FDEQ_GAIN_16 56 0x4848 //RX_FDEQ_GAIN_17 @@ -41807,40 +62940,40 @@ 8 0x4000 //RX_TDDRC_ALPHA_UP_3 9 0x4000 //RX_TDDRC_ALPHA_UP_4 27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 -28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 -29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 -32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 -33 0x7FFF //RX_TDDRC_LIMITER_THRD +28 0x4000 //RX_TDDRC_ALPHA_DWN_2 +29 0x4000 //RX_TDDRC_ALPHA_DWN_3 +32 0x4000 //RX_TDDRC_ALPHA_DWN_4 +33 0x7214 //RX_TDDRC_LIMITER_THRD 34 0x0800 //RX_TDDRC_LIMITER_GAIN 112 0x0001 //RX_TDDRC_THRD_0 113 0x0002 //RX_TDDRC_THRD_1 114 0x1800 //RX_TDDRC_THRD_2 115 0x1800 //RX_TDDRC_THRD_3 -116 0x6000 //RX_TDDRC_SLANT_0 -117 0x6E00 //RX_TDDRC_SLANT_1 +116 0x7FFF //RX_TDDRC_SLANT_0 +117 0x7FFF //RX_TDDRC_SLANT_1 118 0x4000 //RX_TDDRC_ALPHA_UP_0 119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 120 0x0000 //RX_TDDRC_HMNC_FLAG 121 0x199A //RX_TDDRC_HMNC_GAIN 122 0x0001 //RX_TDDRC_SMT_FLAG 123 0x0CCD //RX_TDDRC_SMT_W -124 0x02D2 //RX_TDDRC_DRC_GAIN +124 0x0439 //RX_TDDRC_DRC_GAIN 38 0x0020 //RX_FDEQ_SUBNUM -39 0x4C4C //RX_FDEQ_GAIN_0 -40 0x4C4C //RX_FDEQ_GAIN_1 -41 0x4C48 //RX_FDEQ_GAIN_2 -42 0x4870 //RX_FDEQ_GAIN_3 -43 0x4848 //RX_FDEQ_GAIN_4 -44 0x4848 //RX_FDEQ_GAIN_5 -45 0x4568 //RX_FDEQ_GAIN_6 -46 0x485C //RX_FDEQ_GAIN_7 -47 0x5C60 //RX_FDEQ_GAIN_8 -48 0x685C //RX_FDEQ_GAIN_9 -49 0x5648 //RX_FDEQ_GAIN_10 -50 0x484C //RX_FDEQ_GAIN_11 -51 0x706C //RX_FDEQ_GAIN_12 -52 0x7070 //RX_FDEQ_GAIN_13 -53 0x6868 //RX_FDEQ_GAIN_14 +39 0x4848 //RX_FDEQ_GAIN_0 +40 0x4040 //RX_FDEQ_GAIN_1 +41 0x3838 //RX_FDEQ_GAIN_2 +42 0x3448 //RX_FDEQ_GAIN_3 +43 0x343C //RX_FDEQ_GAIN_4 +44 0x4040 //RX_FDEQ_GAIN_5 +45 0x4048 //RX_FDEQ_GAIN_6 +46 0x384C //RX_FDEQ_GAIN_7 +47 0x4C54 //RX_FDEQ_GAIN_8 +48 0x5C54 //RX_FDEQ_GAIN_9 +49 0x4E38 //RX_FDEQ_GAIN_10 +50 0x303C //RX_FDEQ_GAIN_11 +51 0x5450 //RX_FDEQ_GAIN_12 +52 0x4860 //RX_FDEQ_GAIN_13 +53 0x6060 //RX_FDEQ_GAIN_14 54 0x6060 //RX_FDEQ_GAIN_15 55 0x4848 //RX_FDEQ_GAIN_16 56 0x4848 //RX_FDEQ_GAIN_17 @@ -41898,7 +63031,7 @@ 108 0x7FFF //RX_FDDRC_SLANT_1_2 109 0x7FFF //RX_FDDRC_SLANT_1_3 110 0x0000 //RX_FDDRC_RESRV_0 -129 0x0052 //RX_SPK_VOL +129 0x004D //RX_SPK_VOL 130 0x0000 //RX_VOL_RESRV_0 #VOL 5 6 0x4000 //RX_TDDRC_ALPHA_UP_1 @@ -41906,40 +63039,40 @@ 8 0x4000 //RX_TDDRC_ALPHA_UP_3 9 0x4000 //RX_TDDRC_ALPHA_UP_4 27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 -28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 -29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 -32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 -33 0x7FFF //RX_TDDRC_LIMITER_THRD +28 0x4000 //RX_TDDRC_ALPHA_DWN_2 +29 0x4000 //RX_TDDRC_ALPHA_DWN_3 +32 0x4000 //RX_TDDRC_ALPHA_DWN_4 +33 0x7214 //RX_TDDRC_LIMITER_THRD 34 0x0800 //RX_TDDRC_LIMITER_GAIN 112 0x0001 //RX_TDDRC_THRD_0 113 0x0002 //RX_TDDRC_THRD_1 114 0x1800 //RX_TDDRC_THRD_2 115 0x1800 //RX_TDDRC_THRD_3 -116 0x6000 //RX_TDDRC_SLANT_0 -117 0x6E00 //RX_TDDRC_SLANT_1 +116 0x7FFF //RX_TDDRC_SLANT_0 +117 0x7FFF //RX_TDDRC_SLANT_1 118 0x4000 //RX_TDDRC_ALPHA_UP_0 119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 120 0x0000 //RX_TDDRC_HMNC_FLAG 121 0x199A //RX_TDDRC_HMNC_GAIN 122 0x0001 //RX_TDDRC_SMT_FLAG 123 0x0CCD //RX_TDDRC_SMT_W -124 0x02D2 //RX_TDDRC_DRC_GAIN +124 0x0439 //RX_TDDRC_DRC_GAIN 38 0x0020 //RX_FDEQ_SUBNUM -39 0x4C4C //RX_FDEQ_GAIN_0 -40 0x4C4C //RX_FDEQ_GAIN_1 -41 0x4C48 //RX_FDEQ_GAIN_2 -42 0x4870 //RX_FDEQ_GAIN_3 -43 0x4848 //RX_FDEQ_GAIN_4 -44 0x4848 //RX_FDEQ_GAIN_5 -45 0x4568 //RX_FDEQ_GAIN_6 -46 0x485C //RX_FDEQ_GAIN_7 -47 0x5C60 //RX_FDEQ_GAIN_8 -48 0x685C //RX_FDEQ_GAIN_9 -49 0x5648 //RX_FDEQ_GAIN_10 -50 0x484C //RX_FDEQ_GAIN_11 -51 0x706C //RX_FDEQ_GAIN_12 -52 0x7070 //RX_FDEQ_GAIN_13 -53 0x6868 //RX_FDEQ_GAIN_14 +39 0x4848 //RX_FDEQ_GAIN_0 +40 0x4040 //RX_FDEQ_GAIN_1 +41 0x3838 //RX_FDEQ_GAIN_2 +42 0x3448 //RX_FDEQ_GAIN_3 +43 0x343C //RX_FDEQ_GAIN_4 +44 0x4040 //RX_FDEQ_GAIN_5 +45 0x4048 //RX_FDEQ_GAIN_6 +46 0x384C //RX_FDEQ_GAIN_7 +47 0x4C54 //RX_FDEQ_GAIN_8 +48 0x5C54 //RX_FDEQ_GAIN_9 +49 0x4E38 //RX_FDEQ_GAIN_10 +50 0x303C //RX_FDEQ_GAIN_11 +51 0x5450 //RX_FDEQ_GAIN_12 +52 0x4860 //RX_FDEQ_GAIN_13 +53 0x6060 //RX_FDEQ_GAIN_14 54 0x6060 //RX_FDEQ_GAIN_15 55 0x4848 //RX_FDEQ_GAIN_16 56 0x4848 //RX_FDEQ_GAIN_17 @@ -41997,7 +63130,7 @@ 108 0x7FFF //RX_FDDRC_SLANT_1_2 109 0x7FFF //RX_FDDRC_SLANT_1_3 110 0x0000 //RX_FDDRC_RESRV_0 -129 0x0078 //RX_SPK_VOL +129 0x0074 //RX_SPK_VOL 130 0x0000 //RX_VOL_RESRV_0 #VOL 6 6 0x4000 //RX_TDDRC_ALPHA_UP_1 @@ -42005,40 +63138,40 @@ 8 0x4000 //RX_TDDRC_ALPHA_UP_3 9 0x4000 //RX_TDDRC_ALPHA_UP_4 27 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 -28 0x7EB8 //RX_TDDRC_ALPHA_DWN_2 -29 0x7EB8 //RX_TDDRC_ALPHA_DWN_3 -32 0x7EB8 //RX_TDDRC_ALPHA_DWN_4 -33 0x7FFF //RX_TDDRC_LIMITER_THRD +28 0x4000 //RX_TDDRC_ALPHA_DWN_2 +29 0x4000 //RX_TDDRC_ALPHA_DWN_3 +32 0x4000 //RX_TDDRC_ALPHA_DWN_4 +33 0x7214 //RX_TDDRC_LIMITER_THRD 34 0x0800 //RX_TDDRC_LIMITER_GAIN 112 0x0001 //RX_TDDRC_THRD_0 113 0x0002 //RX_TDDRC_THRD_1 114 0x1800 //RX_TDDRC_THRD_2 115 0x1800 //RX_TDDRC_THRD_3 -116 0x6000 //RX_TDDRC_SLANT_0 -117 0x6E00 //RX_TDDRC_SLANT_1 +116 0x7FFF //RX_TDDRC_SLANT_0 +117 0x7FFF //RX_TDDRC_SLANT_1 118 0x4000 //RX_TDDRC_ALPHA_UP_0 119 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 120 0x0000 //RX_TDDRC_HMNC_FLAG 121 0x199A //RX_TDDRC_HMNC_GAIN 122 0x0001 //RX_TDDRC_SMT_FLAG 123 0x0CCD //RX_TDDRC_SMT_W -124 0x02D2 //RX_TDDRC_DRC_GAIN +124 0x0439 //RX_TDDRC_DRC_GAIN 38 0x0020 //RX_FDEQ_SUBNUM -39 0x4C4C //RX_FDEQ_GAIN_0 -40 0x4C4C //RX_FDEQ_GAIN_1 -41 0x4C48 //RX_FDEQ_GAIN_2 -42 0x4870 //RX_FDEQ_GAIN_3 -43 0x4848 //RX_FDEQ_GAIN_4 -44 0x4848 //RX_FDEQ_GAIN_5 -45 0x4568 //RX_FDEQ_GAIN_6 -46 0x485C //RX_FDEQ_GAIN_7 -47 0x5C60 //RX_FDEQ_GAIN_8 -48 0x685C //RX_FDEQ_GAIN_9 -49 0x5648 //RX_FDEQ_GAIN_10 -50 0x484C //RX_FDEQ_GAIN_11 -51 0x706C //RX_FDEQ_GAIN_12 -52 0x7070 //RX_FDEQ_GAIN_13 -53 0x6868 //RX_FDEQ_GAIN_14 +39 0x4848 //RX_FDEQ_GAIN_0 +40 0x4040 //RX_FDEQ_GAIN_1 +41 0x3838 //RX_FDEQ_GAIN_2 +42 0x3448 //RX_FDEQ_GAIN_3 +43 0x343C //RX_FDEQ_GAIN_4 +44 0x4040 //RX_FDEQ_GAIN_5 +45 0x4048 //RX_FDEQ_GAIN_6 +46 0x384C //RX_FDEQ_GAIN_7 +47 0x4C54 //RX_FDEQ_GAIN_8 +48 0x5C54 //RX_FDEQ_GAIN_9 +49 0x4E38 //RX_FDEQ_GAIN_10 +50 0x303C //RX_FDEQ_GAIN_11 +51 0x5450 //RX_FDEQ_GAIN_12 +52 0x4860 //RX_FDEQ_GAIN_13 +53 0x6060 //RX_FDEQ_GAIN_14 54 0x6060 //RX_FDEQ_GAIN_15 55 0x4848 //RX_FDEQ_GAIN_16 56 0x4848 //RX_FDEQ_GAIN_17 @@ -42098,18 +63231,869 @@ 110 0x0000 //RX_FDDRC_RESRV_0 129 0x0100 //RX_SPK_VOL 130 0x0000 //RX_VOL_RESRV_0 +#RX 2 +157 0x242C //RX_RECVFUNC_MODE_0 +158 0x0000 //RX_RECVFUNC_MODE_1 +159 0x0004 //RX_SAMPLINGFREQ_SIG +160 0x0004 //RX_SAMPLINGFREQ_PROC +161 0x000A //RX_FRAME_SZ +162 0x0000 //RX_DELAY_OPT +163 0x4000 //RX_TDDRC_ALPHA_UP_1 +164 0x4000 //RX_TDDRC_ALPHA_UP_2 +165 0x4000 //RX_TDDRC_ALPHA_UP_3 +166 0x4000 //RX_TDDRC_ALPHA_UP_4 +167 0x0403 //RX_PGA +168 0x7E56 //RX_A_HP +169 0x4000 //RX_B_PE +170 0x7800 //RX_THR_PITCH_DET_0 +171 0x7000 //RX_THR_PITCH_DET_1 +172 0x6000 //RX_THR_PITCH_DET_2 +173 0x0008 //RX_PITCH_BFR_LEN +174 0x0003 //RX_SBD_PITCH_DET +175 0x0100 //RX_PP_RESRV_0 +176 0x0020 //RX_PP_RESRV_1 +177 0x0400 //RX_N_SN_EST +178 0x000C //RX_N2_SN_EST +179 0x0014 //RX_NS_LVL_CTRL +180 0xF400 //RX_THR_SN_EST +181 0x7E00 //RX_LAMBDA_PFILT +182 0x000A //RX_FENS_RESRV_0 +183 0x0190 //RX_FENS_RESRV_1 +184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +185 0x4000 //RX_TDDRC_ALPHA_DWN_2 +186 0x4000 //RX_TDDRC_ALPHA_DWN_3 +187 0x0002 //RX_EXTRA_NS_L +188 0x0800 //RX_EXTRA_NS_A +189 0x4000 //RX_TDDRC_ALPHA_DWN_4 +190 0x7214 //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +192 0x199A //RX_A_POST_FLT +193 0x0000 //RX_LMT_THRD +194 0x4000 //RX_LMT_ALPHA +195 0x0020 //RX_FDEQ_SUBNUM +196 0x4848 //RX_FDEQ_GAIN_0 +197 0x4040 //RX_FDEQ_GAIN_1 +198 0x3838 //RX_FDEQ_GAIN_2 +199 0x3448 //RX_FDEQ_GAIN_3 +200 0x343C //RX_FDEQ_GAIN_4 +201 0x4040 //RX_FDEQ_GAIN_5 +202 0x4048 //RX_FDEQ_GAIN_6 +203 0x384C //RX_FDEQ_GAIN_7 +204 0x4C54 //RX_FDEQ_GAIN_8 +205 0x5C54 //RX_FDEQ_GAIN_9 +206 0x4E38 //RX_FDEQ_GAIN_10 +207 0x303C //RX_FDEQ_GAIN_11 +208 0x5450 //RX_FDEQ_GAIN_12 +209 0x4860 //RX_FDEQ_GAIN_13 +210 0x6060 //RX_FDEQ_GAIN_14 +211 0x6060 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0202 //RX_FDEQ_BIN_0 +221 0x0203 //RX_FDEQ_BIN_1 +222 0x0303 //RX_FDEQ_BIN_2 +223 0x0402 //RX_FDEQ_BIN_3 +224 0x0504 //RX_FDEQ_BIN_4 +225 0x0209 //RX_FDEQ_BIN_5 +226 0x0808 //RX_FDEQ_BIN_6 +227 0x090A //RX_FDEQ_BIN_7 +228 0x0B0C //RX_FDEQ_BIN_8 +229 0x0D0E //RX_FDEQ_BIN_9 +230 0x1013 //RX_FDEQ_BIN_10 +231 0x1719 //RX_FDEQ_BIN_11 +232 0x1B1E //RX_FDEQ_BIN_12 +233 0x1E1E //RX_FDEQ_BIN_13 +234 0x1E28 //RX_FDEQ_BIN_14 +235 0x282C //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x4000 //RX_FDEQ_RESRV_0 +245 0x0320 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0030 //RX_FDDRC_BAND_MARGIN_1 +248 0x0050 //RX_FDDRC_BAND_MARGIN_2 +249 0x0080 //RX_FDDRC_BAND_MARGIN_3 +250 0x0004 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x2000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x2000 //RX_FDDRC_THRD_3_2 +258 0x5000 //RX_FDDRC_THRD_3_3 +259 0x4000 //RX_FDDRC_SLANT_0_0 +260 0x4000 //RX_FDDRC_SLANT_0_1 +261 0x4000 //RX_FDDRC_SLANT_0_2 +262 0x4000 //RX_FDDRC_SLANT_0_3 +263 0x7FFF //RX_FDDRC_SLANT_1_0 +264 0x7FFF //RX_FDDRC_SLANT_1_1 +265 0x7FFF //RX_FDDRC_SLANT_1_2 +266 0x7FFF //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +268 0x0002 //RX_FILTINDX +269 0x0001 //RX_TDDRC_THRD_0 +270 0x0002 //RX_TDDRC_THRD_1 +271 0x1800 //RX_TDDRC_THRD_2 +272 0x1800 //RX_TDDRC_THRD_3 +273 0x7FFF //RX_TDDRC_SLANT_0 +274 0x7FFF //RX_TDDRC_SLANT_1 +275 0x4000 //RX_TDDRC_ALPHA_UP_0 +276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x199A //RX_TDDRC_HMNC_GAIN +279 0x0001 //RX_TDDRC_SMT_FLAG +280 0x0CCD //RX_TDDRC_SMT_W +281 0x0439 //RX_TDDRC_DRC_GAIN +282 0x7C00 //RX_LAMBDA_PKA_FP +283 0x1B58 //RX_TPKA_FP +284 0x0400 //RX_MIN_G_FP +285 0x0800 //RX_MAX_G_FP +286 0x0100 //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 +288 0x0000 //RX_MAXLEVEL_CNG +289 0x3000 //RX_BWE_UV_TH +290 0x3000 //RX_BWE_UV_TH2 +291 0x1800 //RX_BWE_UV_TH3 +292 0x1000 //RX_BWE_V_TH +293 0x04CD //RX_BWE_GAIN1_V_TH1 +294 0x0F33 //RX_BWE_GAIN1_V_TH2 +295 0x7333 //RX_BWE_UV_EQ +296 0x199A //RX_BWE_V_EQ +297 0x7333 //RX_BWE_TONE_TH +298 0x0004 //RX_BWE_UV_HOLD_T +299 0x6CCD //RX_BWE_GAIN2_ALPHA +300 0x799A //RX_BWE_GAIN3_ALPHA +301 0x001E //RX_BWE_CUTOFF +302 0x3000 //RX_BWE_GAINFILL +303 0x3200 //RX_BWE_MAXTH_TONE +304 0x2000 //RX_BWE_EQ_0 +305 0x2000 //RX_BWE_EQ_1 +306 0x2000 //RX_BWE_EQ_2 +307 0x2000 //RX_BWE_EQ_3 +308 0x2000 //RX_BWE_EQ_4 +309 0x2000 //RX_BWE_EQ_5 +310 0x2000 //RX_BWE_EQ_6 +311 0x0000 //RX_BWE_RESRV_0 +312 0x0000 //RX_BWE_RESRV_1 +313 0x0000 //RX_BWE_RESRV_2 +#VOL 0 +163 0x4000 //RX_TDDRC_ALPHA_UP_1 +164 0x4000 //RX_TDDRC_ALPHA_UP_2 +165 0x4000 //RX_TDDRC_ALPHA_UP_3 +166 0x4000 //RX_TDDRC_ALPHA_UP_4 +184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +185 0x4000 //RX_TDDRC_ALPHA_DWN_2 +186 0x4000 //RX_TDDRC_ALPHA_DWN_3 +189 0x4000 //RX_TDDRC_ALPHA_DWN_4 +190 0x7214 //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +269 0x0001 //RX_TDDRC_THRD_0 +270 0x0002 //RX_TDDRC_THRD_1 +271 0x1800 //RX_TDDRC_THRD_2 +272 0x1800 //RX_TDDRC_THRD_3 +273 0x7FFF //RX_TDDRC_SLANT_0 +274 0x7FFF //RX_TDDRC_SLANT_1 +275 0x4000 //RX_TDDRC_ALPHA_UP_0 +276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x199A //RX_TDDRC_HMNC_GAIN +279 0x0001 //RX_TDDRC_SMT_FLAG +280 0x0CCD //RX_TDDRC_SMT_W +281 0x0439 //RX_TDDRC_DRC_GAIN +195 0x0020 //RX_FDEQ_SUBNUM +196 0x4848 //RX_FDEQ_GAIN_0 +197 0x4040 //RX_FDEQ_GAIN_1 +198 0x3838 //RX_FDEQ_GAIN_2 +199 0x3448 //RX_FDEQ_GAIN_3 +200 0x343C //RX_FDEQ_GAIN_4 +201 0x4040 //RX_FDEQ_GAIN_5 +202 0x4048 //RX_FDEQ_GAIN_6 +203 0x384C //RX_FDEQ_GAIN_7 +204 0x4C54 //RX_FDEQ_GAIN_8 +205 0x5C54 //RX_FDEQ_GAIN_9 +206 0x4E38 //RX_FDEQ_GAIN_10 +207 0x303C //RX_FDEQ_GAIN_11 +208 0x5450 //RX_FDEQ_GAIN_12 +209 0x4860 //RX_FDEQ_GAIN_13 +210 0x6060 //RX_FDEQ_GAIN_14 +211 0x6060 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0202 //RX_FDEQ_BIN_0 +221 0x0203 //RX_FDEQ_BIN_1 +222 0x0303 //RX_FDEQ_BIN_2 +223 0x0402 //RX_FDEQ_BIN_3 +224 0x0504 //RX_FDEQ_BIN_4 +225 0x0209 //RX_FDEQ_BIN_5 +226 0x0808 //RX_FDEQ_BIN_6 +227 0x090A //RX_FDEQ_BIN_7 +228 0x0B0C //RX_FDEQ_BIN_8 +229 0x0D0E //RX_FDEQ_BIN_9 +230 0x1013 //RX_FDEQ_BIN_10 +231 0x1719 //RX_FDEQ_BIN_11 +232 0x1B1E //RX_FDEQ_BIN_12 +233 0x1E1E //RX_FDEQ_BIN_13 +234 0x1E28 //RX_FDEQ_BIN_14 +235 0x282C //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x4000 //RX_FDEQ_RESRV_0 +245 0x0320 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0030 //RX_FDDRC_BAND_MARGIN_1 +248 0x0050 //RX_FDDRC_BAND_MARGIN_2 +249 0x0080 //RX_FDDRC_BAND_MARGIN_3 +250 0x0004 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x2000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x2000 //RX_FDDRC_THRD_3_2 +258 0x5000 //RX_FDDRC_THRD_3_3 +259 0x4000 //RX_FDDRC_SLANT_0_0 +260 0x4000 //RX_FDDRC_SLANT_0_1 +261 0x4000 //RX_FDDRC_SLANT_0_2 +262 0x4000 //RX_FDDRC_SLANT_0_3 +263 0x7FFF //RX_FDDRC_SLANT_1_0 +264 0x7FFF //RX_FDDRC_SLANT_1_1 +265 0x7FFF //RX_FDDRC_SLANT_1_2 +266 0x7FFF //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +286 0x0012 //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 +#VOL 1 +163 0x4000 //RX_TDDRC_ALPHA_UP_1 +164 0x4000 //RX_TDDRC_ALPHA_UP_2 +165 0x4000 //RX_TDDRC_ALPHA_UP_3 +166 0x4000 //RX_TDDRC_ALPHA_UP_4 +184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +185 0x4000 //RX_TDDRC_ALPHA_DWN_2 +186 0x4000 //RX_TDDRC_ALPHA_DWN_3 +189 0x4000 //RX_TDDRC_ALPHA_DWN_4 +190 0x7214 //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +269 0x0001 //RX_TDDRC_THRD_0 +270 0x0002 //RX_TDDRC_THRD_1 +271 0x1800 //RX_TDDRC_THRD_2 +272 0x1800 //RX_TDDRC_THRD_3 +273 0x7FFF //RX_TDDRC_SLANT_0 +274 0x7FFF //RX_TDDRC_SLANT_1 +275 0x4000 //RX_TDDRC_ALPHA_UP_0 +276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x199A //RX_TDDRC_HMNC_GAIN +279 0x0001 //RX_TDDRC_SMT_FLAG +280 0x0CCD //RX_TDDRC_SMT_W +281 0x0439 //RX_TDDRC_DRC_GAIN +195 0x0020 //RX_FDEQ_SUBNUM +196 0x4848 //RX_FDEQ_GAIN_0 +197 0x4040 //RX_FDEQ_GAIN_1 +198 0x3838 //RX_FDEQ_GAIN_2 +199 0x3448 //RX_FDEQ_GAIN_3 +200 0x343C //RX_FDEQ_GAIN_4 +201 0x4040 //RX_FDEQ_GAIN_5 +202 0x4048 //RX_FDEQ_GAIN_6 +203 0x384C //RX_FDEQ_GAIN_7 +204 0x4C54 //RX_FDEQ_GAIN_8 +205 0x5C54 //RX_FDEQ_GAIN_9 +206 0x4E38 //RX_FDEQ_GAIN_10 +207 0x303C //RX_FDEQ_GAIN_11 +208 0x5450 //RX_FDEQ_GAIN_12 +209 0x4860 //RX_FDEQ_GAIN_13 +210 0x6060 //RX_FDEQ_GAIN_14 +211 0x6060 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0202 //RX_FDEQ_BIN_0 +221 0x0203 //RX_FDEQ_BIN_1 +222 0x0303 //RX_FDEQ_BIN_2 +223 0x0402 //RX_FDEQ_BIN_3 +224 0x0504 //RX_FDEQ_BIN_4 +225 0x0209 //RX_FDEQ_BIN_5 +226 0x0808 //RX_FDEQ_BIN_6 +227 0x090A //RX_FDEQ_BIN_7 +228 0x0B0C //RX_FDEQ_BIN_8 +229 0x0D0E //RX_FDEQ_BIN_9 +230 0x1013 //RX_FDEQ_BIN_10 +231 0x1719 //RX_FDEQ_BIN_11 +232 0x1B1E //RX_FDEQ_BIN_12 +233 0x1E1E //RX_FDEQ_BIN_13 +234 0x1E28 //RX_FDEQ_BIN_14 +235 0x282C //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x4000 //RX_FDEQ_RESRV_0 +245 0x0320 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0030 //RX_FDDRC_BAND_MARGIN_1 +248 0x0050 //RX_FDDRC_BAND_MARGIN_2 +249 0x0080 //RX_FDDRC_BAND_MARGIN_3 +250 0x0004 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x2000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x2000 //RX_FDDRC_THRD_3_2 +258 0x5000 //RX_FDDRC_THRD_3_3 +259 0x4000 //RX_FDDRC_SLANT_0_0 +260 0x4000 //RX_FDDRC_SLANT_0_1 +261 0x4000 //RX_FDDRC_SLANT_0_2 +262 0x4000 //RX_FDDRC_SLANT_0_3 +263 0x7FFF //RX_FDDRC_SLANT_1_0 +264 0x7FFF //RX_FDDRC_SLANT_1_1 +265 0x7FFF //RX_FDDRC_SLANT_1_2 +266 0x7FFF //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +286 0x001A //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 +#VOL 2 +163 0x4000 //RX_TDDRC_ALPHA_UP_1 +164 0x4000 //RX_TDDRC_ALPHA_UP_2 +165 0x4000 //RX_TDDRC_ALPHA_UP_3 +166 0x4000 //RX_TDDRC_ALPHA_UP_4 +184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +185 0x4000 //RX_TDDRC_ALPHA_DWN_2 +186 0x4000 //RX_TDDRC_ALPHA_DWN_3 +189 0x4000 //RX_TDDRC_ALPHA_DWN_4 +190 0x7214 //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +269 0x0001 //RX_TDDRC_THRD_0 +270 0x0002 //RX_TDDRC_THRD_1 +271 0x1800 //RX_TDDRC_THRD_2 +272 0x1800 //RX_TDDRC_THRD_3 +273 0x7FFF //RX_TDDRC_SLANT_0 +274 0x7FFF //RX_TDDRC_SLANT_1 +275 0x4000 //RX_TDDRC_ALPHA_UP_0 +276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x199A //RX_TDDRC_HMNC_GAIN +279 0x0001 //RX_TDDRC_SMT_FLAG +280 0x0CCD //RX_TDDRC_SMT_W +281 0x0439 //RX_TDDRC_DRC_GAIN +195 0x0020 //RX_FDEQ_SUBNUM +196 0x4848 //RX_FDEQ_GAIN_0 +197 0x4040 //RX_FDEQ_GAIN_1 +198 0x3838 //RX_FDEQ_GAIN_2 +199 0x3448 //RX_FDEQ_GAIN_3 +200 0x343C //RX_FDEQ_GAIN_4 +201 0x4040 //RX_FDEQ_GAIN_5 +202 0x4048 //RX_FDEQ_GAIN_6 +203 0x384C //RX_FDEQ_GAIN_7 +204 0x4C54 //RX_FDEQ_GAIN_8 +205 0x5C54 //RX_FDEQ_GAIN_9 +206 0x4E38 //RX_FDEQ_GAIN_10 +207 0x303C //RX_FDEQ_GAIN_11 +208 0x5450 //RX_FDEQ_GAIN_12 +209 0x4860 //RX_FDEQ_GAIN_13 +210 0x6060 //RX_FDEQ_GAIN_14 +211 0x6060 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0202 //RX_FDEQ_BIN_0 +221 0x0203 //RX_FDEQ_BIN_1 +222 0x0303 //RX_FDEQ_BIN_2 +223 0x0402 //RX_FDEQ_BIN_3 +224 0x0504 //RX_FDEQ_BIN_4 +225 0x0209 //RX_FDEQ_BIN_5 +226 0x0808 //RX_FDEQ_BIN_6 +227 0x090A //RX_FDEQ_BIN_7 +228 0x0B0C //RX_FDEQ_BIN_8 +229 0x0D0E //RX_FDEQ_BIN_9 +230 0x1013 //RX_FDEQ_BIN_10 +231 0x1719 //RX_FDEQ_BIN_11 +232 0x1B1E //RX_FDEQ_BIN_12 +233 0x1E1E //RX_FDEQ_BIN_13 +234 0x1E28 //RX_FDEQ_BIN_14 +235 0x282C //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x4000 //RX_FDEQ_RESRV_0 +245 0x0320 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0030 //RX_FDDRC_BAND_MARGIN_1 +248 0x0050 //RX_FDDRC_BAND_MARGIN_2 +249 0x0080 //RX_FDDRC_BAND_MARGIN_3 +250 0x0004 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x2000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x2000 //RX_FDDRC_THRD_3_2 +258 0x5000 //RX_FDDRC_THRD_3_3 +259 0x4000 //RX_FDDRC_SLANT_0_0 +260 0x4000 //RX_FDDRC_SLANT_0_1 +261 0x4000 //RX_FDDRC_SLANT_0_2 +262 0x4000 //RX_FDDRC_SLANT_0_3 +263 0x7FFF //RX_FDDRC_SLANT_1_0 +264 0x7FFF //RX_FDDRC_SLANT_1_1 +265 0x7FFF //RX_FDDRC_SLANT_1_2 +266 0x7FFF //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +286 0x0025 //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 +#VOL 3 +163 0x4000 //RX_TDDRC_ALPHA_UP_1 +164 0x4000 //RX_TDDRC_ALPHA_UP_2 +165 0x4000 //RX_TDDRC_ALPHA_UP_3 +166 0x4000 //RX_TDDRC_ALPHA_UP_4 +184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +185 0x4000 //RX_TDDRC_ALPHA_DWN_2 +186 0x4000 //RX_TDDRC_ALPHA_DWN_3 +189 0x4000 //RX_TDDRC_ALPHA_DWN_4 +190 0x7214 //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +269 0x0001 //RX_TDDRC_THRD_0 +270 0x0002 //RX_TDDRC_THRD_1 +271 0x1800 //RX_TDDRC_THRD_2 +272 0x1800 //RX_TDDRC_THRD_3 +273 0x7FFF //RX_TDDRC_SLANT_0 +274 0x7FFF //RX_TDDRC_SLANT_1 +275 0x4000 //RX_TDDRC_ALPHA_UP_0 +276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x199A //RX_TDDRC_HMNC_GAIN +279 0x0001 //RX_TDDRC_SMT_FLAG +280 0x0CCD //RX_TDDRC_SMT_W +281 0x0439 //RX_TDDRC_DRC_GAIN +195 0x0020 //RX_FDEQ_SUBNUM +196 0x4848 //RX_FDEQ_GAIN_0 +197 0x4040 //RX_FDEQ_GAIN_1 +198 0x3838 //RX_FDEQ_GAIN_2 +199 0x3448 //RX_FDEQ_GAIN_3 +200 0x343C //RX_FDEQ_GAIN_4 +201 0x4040 //RX_FDEQ_GAIN_5 +202 0x4048 //RX_FDEQ_GAIN_6 +203 0x384C //RX_FDEQ_GAIN_7 +204 0x4C54 //RX_FDEQ_GAIN_8 +205 0x5C54 //RX_FDEQ_GAIN_9 +206 0x4E38 //RX_FDEQ_GAIN_10 +207 0x303C //RX_FDEQ_GAIN_11 +208 0x5450 //RX_FDEQ_GAIN_12 +209 0x4860 //RX_FDEQ_GAIN_13 +210 0x6060 //RX_FDEQ_GAIN_14 +211 0x6060 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0202 //RX_FDEQ_BIN_0 +221 0x0203 //RX_FDEQ_BIN_1 +222 0x0303 //RX_FDEQ_BIN_2 +223 0x0402 //RX_FDEQ_BIN_3 +224 0x0504 //RX_FDEQ_BIN_4 +225 0x0209 //RX_FDEQ_BIN_5 +226 0x0808 //RX_FDEQ_BIN_6 +227 0x090A //RX_FDEQ_BIN_7 +228 0x0B0C //RX_FDEQ_BIN_8 +229 0x0D0E //RX_FDEQ_BIN_9 +230 0x1013 //RX_FDEQ_BIN_10 +231 0x1719 //RX_FDEQ_BIN_11 +232 0x1B1E //RX_FDEQ_BIN_12 +233 0x1E1E //RX_FDEQ_BIN_13 +234 0x1E28 //RX_FDEQ_BIN_14 +235 0x282C //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x4000 //RX_FDEQ_RESRV_0 +245 0x0320 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0030 //RX_FDDRC_BAND_MARGIN_1 +248 0x0050 //RX_FDDRC_BAND_MARGIN_2 +249 0x0080 //RX_FDDRC_BAND_MARGIN_3 +250 0x0004 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x2000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x2000 //RX_FDDRC_THRD_3_2 +258 0x5000 //RX_FDDRC_THRD_3_3 +259 0x4000 //RX_FDDRC_SLANT_0_0 +260 0x4000 //RX_FDDRC_SLANT_0_1 +261 0x4000 //RX_FDDRC_SLANT_0_2 +262 0x4000 //RX_FDDRC_SLANT_0_3 +263 0x7FFF //RX_FDDRC_SLANT_1_0 +264 0x7FFF //RX_FDDRC_SLANT_1_1 +265 0x7FFF //RX_FDDRC_SLANT_1_2 +266 0x7FFF //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +286 0x0035 //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 +#VOL 4 +163 0x4000 //RX_TDDRC_ALPHA_UP_1 +164 0x4000 //RX_TDDRC_ALPHA_UP_2 +165 0x4000 //RX_TDDRC_ALPHA_UP_3 +166 0x4000 //RX_TDDRC_ALPHA_UP_4 +184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +185 0x4000 //RX_TDDRC_ALPHA_DWN_2 +186 0x4000 //RX_TDDRC_ALPHA_DWN_3 +189 0x4000 //RX_TDDRC_ALPHA_DWN_4 +190 0x7214 //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +269 0x0001 //RX_TDDRC_THRD_0 +270 0x0002 //RX_TDDRC_THRD_1 +271 0x1800 //RX_TDDRC_THRD_2 +272 0x1800 //RX_TDDRC_THRD_3 +273 0x7FFF //RX_TDDRC_SLANT_0 +274 0x7FFF //RX_TDDRC_SLANT_1 +275 0x4000 //RX_TDDRC_ALPHA_UP_0 +276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x199A //RX_TDDRC_HMNC_GAIN +279 0x0001 //RX_TDDRC_SMT_FLAG +280 0x0CCD //RX_TDDRC_SMT_W +281 0x0439 //RX_TDDRC_DRC_GAIN +195 0x0020 //RX_FDEQ_SUBNUM +196 0x4848 //RX_FDEQ_GAIN_0 +197 0x4040 //RX_FDEQ_GAIN_1 +198 0x3838 //RX_FDEQ_GAIN_2 +199 0x3448 //RX_FDEQ_GAIN_3 +200 0x343C //RX_FDEQ_GAIN_4 +201 0x4040 //RX_FDEQ_GAIN_5 +202 0x4048 //RX_FDEQ_GAIN_6 +203 0x384C //RX_FDEQ_GAIN_7 +204 0x4C54 //RX_FDEQ_GAIN_8 +205 0x5C54 //RX_FDEQ_GAIN_9 +206 0x4E38 //RX_FDEQ_GAIN_10 +207 0x303C //RX_FDEQ_GAIN_11 +208 0x5450 //RX_FDEQ_GAIN_12 +209 0x4860 //RX_FDEQ_GAIN_13 +210 0x6060 //RX_FDEQ_GAIN_14 +211 0x6060 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0202 //RX_FDEQ_BIN_0 +221 0x0203 //RX_FDEQ_BIN_1 +222 0x0303 //RX_FDEQ_BIN_2 +223 0x0402 //RX_FDEQ_BIN_3 +224 0x0504 //RX_FDEQ_BIN_4 +225 0x0209 //RX_FDEQ_BIN_5 +226 0x0808 //RX_FDEQ_BIN_6 +227 0x090A //RX_FDEQ_BIN_7 +228 0x0B0C //RX_FDEQ_BIN_8 +229 0x0D0E //RX_FDEQ_BIN_9 +230 0x1013 //RX_FDEQ_BIN_10 +231 0x1719 //RX_FDEQ_BIN_11 +232 0x1B1E //RX_FDEQ_BIN_12 +233 0x1E1E //RX_FDEQ_BIN_13 +234 0x1E28 //RX_FDEQ_BIN_14 +235 0x282C //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x4000 //RX_FDEQ_RESRV_0 +245 0x0320 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0030 //RX_FDDRC_BAND_MARGIN_1 +248 0x0050 //RX_FDDRC_BAND_MARGIN_2 +249 0x0080 //RX_FDDRC_BAND_MARGIN_3 +250 0x0004 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x2000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x2000 //RX_FDDRC_THRD_3_2 +258 0x5000 //RX_FDDRC_THRD_3_3 +259 0x4000 //RX_FDDRC_SLANT_0_0 +260 0x4000 //RX_FDDRC_SLANT_0_1 +261 0x4000 //RX_FDDRC_SLANT_0_2 +262 0x4000 //RX_FDDRC_SLANT_0_3 +263 0x7FFF //RX_FDDRC_SLANT_1_0 +264 0x7FFF //RX_FDDRC_SLANT_1_1 +265 0x7FFF //RX_FDDRC_SLANT_1_2 +266 0x7FFF //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +286 0x004D //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 +#VOL 5 +163 0x4000 //RX_TDDRC_ALPHA_UP_1 +164 0x4000 //RX_TDDRC_ALPHA_UP_2 +165 0x4000 //RX_TDDRC_ALPHA_UP_3 +166 0x4000 //RX_TDDRC_ALPHA_UP_4 +184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +185 0x4000 //RX_TDDRC_ALPHA_DWN_2 +186 0x4000 //RX_TDDRC_ALPHA_DWN_3 +189 0x4000 //RX_TDDRC_ALPHA_DWN_4 +190 0x7214 //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +269 0x0001 //RX_TDDRC_THRD_0 +270 0x0002 //RX_TDDRC_THRD_1 +271 0x1800 //RX_TDDRC_THRD_2 +272 0x1800 //RX_TDDRC_THRD_3 +273 0x7FFF //RX_TDDRC_SLANT_0 +274 0x7FFF //RX_TDDRC_SLANT_1 +275 0x4000 //RX_TDDRC_ALPHA_UP_0 +276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x199A //RX_TDDRC_HMNC_GAIN +279 0x0001 //RX_TDDRC_SMT_FLAG +280 0x0CCD //RX_TDDRC_SMT_W +281 0x0439 //RX_TDDRC_DRC_GAIN +195 0x0020 //RX_FDEQ_SUBNUM +196 0x4848 //RX_FDEQ_GAIN_0 +197 0x4040 //RX_FDEQ_GAIN_1 +198 0x3838 //RX_FDEQ_GAIN_2 +199 0x3448 //RX_FDEQ_GAIN_3 +200 0x343C //RX_FDEQ_GAIN_4 +201 0x4040 //RX_FDEQ_GAIN_5 +202 0x4048 //RX_FDEQ_GAIN_6 +203 0x384C //RX_FDEQ_GAIN_7 +204 0x4C54 //RX_FDEQ_GAIN_8 +205 0x5C54 //RX_FDEQ_GAIN_9 +206 0x4E38 //RX_FDEQ_GAIN_10 +207 0x303C //RX_FDEQ_GAIN_11 +208 0x5450 //RX_FDEQ_GAIN_12 +209 0x4860 //RX_FDEQ_GAIN_13 +210 0x6060 //RX_FDEQ_GAIN_14 +211 0x6060 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0202 //RX_FDEQ_BIN_0 +221 0x0203 //RX_FDEQ_BIN_1 +222 0x0303 //RX_FDEQ_BIN_2 +223 0x0402 //RX_FDEQ_BIN_3 +224 0x0504 //RX_FDEQ_BIN_4 +225 0x0209 //RX_FDEQ_BIN_5 +226 0x0808 //RX_FDEQ_BIN_6 +227 0x090A //RX_FDEQ_BIN_7 +228 0x0B0C //RX_FDEQ_BIN_8 +229 0x0D0E //RX_FDEQ_BIN_9 +230 0x1013 //RX_FDEQ_BIN_10 +231 0x1719 //RX_FDEQ_BIN_11 +232 0x1B1E //RX_FDEQ_BIN_12 +233 0x1E1E //RX_FDEQ_BIN_13 +234 0x1E28 //RX_FDEQ_BIN_14 +235 0x282C //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x4000 //RX_FDEQ_RESRV_0 +245 0x0320 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0030 //RX_FDDRC_BAND_MARGIN_1 +248 0x0050 //RX_FDDRC_BAND_MARGIN_2 +249 0x0080 //RX_FDDRC_BAND_MARGIN_3 +250 0x0004 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x2000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x2000 //RX_FDDRC_THRD_3_2 +258 0x5000 //RX_FDDRC_THRD_3_3 +259 0x4000 //RX_FDDRC_SLANT_0_0 +260 0x4000 //RX_FDDRC_SLANT_0_1 +261 0x4000 //RX_FDDRC_SLANT_0_2 +262 0x4000 //RX_FDDRC_SLANT_0_3 +263 0x7FFF //RX_FDDRC_SLANT_1_0 +264 0x7FFF //RX_FDDRC_SLANT_1_1 +265 0x7FFF //RX_FDDRC_SLANT_1_2 +266 0x7FFF //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +286 0x0074 //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 +#VOL 6 +163 0x4000 //RX_TDDRC_ALPHA_UP_1 +164 0x4000 //RX_TDDRC_ALPHA_UP_2 +165 0x4000 //RX_TDDRC_ALPHA_UP_3 +166 0x4000 //RX_TDDRC_ALPHA_UP_4 +184 0x7EB8 //RX_TDDRC_ALPHA_DWN_1 +185 0x4000 //RX_TDDRC_ALPHA_DWN_2 +186 0x4000 //RX_TDDRC_ALPHA_DWN_3 +189 0x4000 //RX_TDDRC_ALPHA_DWN_4 +190 0x7214 //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +269 0x0001 //RX_TDDRC_THRD_0 +270 0x0002 //RX_TDDRC_THRD_1 +271 0x1800 //RX_TDDRC_THRD_2 +272 0x1800 //RX_TDDRC_THRD_3 +273 0x7FFF //RX_TDDRC_SLANT_0 +274 0x7FFF //RX_TDDRC_SLANT_1 +275 0x4000 //RX_TDDRC_ALPHA_UP_0 +276 0x7EB8 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x199A //RX_TDDRC_HMNC_GAIN +279 0x0001 //RX_TDDRC_SMT_FLAG +280 0x0CCD //RX_TDDRC_SMT_W +281 0x0439 //RX_TDDRC_DRC_GAIN +195 0x0020 //RX_FDEQ_SUBNUM +196 0x4848 //RX_FDEQ_GAIN_0 +197 0x4040 //RX_FDEQ_GAIN_1 +198 0x3838 //RX_FDEQ_GAIN_2 +199 0x3448 //RX_FDEQ_GAIN_3 +200 0x343C //RX_FDEQ_GAIN_4 +201 0x4040 //RX_FDEQ_GAIN_5 +202 0x4048 //RX_FDEQ_GAIN_6 +203 0x384C //RX_FDEQ_GAIN_7 +204 0x4C54 //RX_FDEQ_GAIN_8 +205 0x5C54 //RX_FDEQ_GAIN_9 +206 0x4E38 //RX_FDEQ_GAIN_10 +207 0x303C //RX_FDEQ_GAIN_11 +208 0x5450 //RX_FDEQ_GAIN_12 +209 0x4860 //RX_FDEQ_GAIN_13 +210 0x6060 //RX_FDEQ_GAIN_14 +211 0x6060 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0202 //RX_FDEQ_BIN_0 +221 0x0203 //RX_FDEQ_BIN_1 +222 0x0303 //RX_FDEQ_BIN_2 +223 0x0402 //RX_FDEQ_BIN_3 +224 0x0504 //RX_FDEQ_BIN_4 +225 0x0209 //RX_FDEQ_BIN_5 +226 0x0808 //RX_FDEQ_BIN_6 +227 0x090A //RX_FDEQ_BIN_7 +228 0x0B0C //RX_FDEQ_BIN_8 +229 0x0D0E //RX_FDEQ_BIN_9 +230 0x1013 //RX_FDEQ_BIN_10 +231 0x1719 //RX_FDEQ_BIN_11 +232 0x1B1E //RX_FDEQ_BIN_12 +233 0x1E1E //RX_FDEQ_BIN_13 +234 0x1E28 //RX_FDEQ_BIN_14 +235 0x282C //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x4000 //RX_FDEQ_RESRV_0 +245 0x0320 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0030 //RX_FDDRC_BAND_MARGIN_1 +248 0x0050 //RX_FDDRC_BAND_MARGIN_2 +249 0x0080 //RX_FDDRC_BAND_MARGIN_3 +250 0x0004 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x2000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x2000 //RX_FDDRC_THRD_3_2 +258 0x5000 //RX_FDDRC_THRD_3_3 +259 0x4000 //RX_FDDRC_SLANT_0_0 +260 0x4000 //RX_FDDRC_SLANT_0_1 +261 0x4000 //RX_FDDRC_SLANT_0_2 +262 0x4000 //RX_FDDRC_SLANT_0_3 +263 0x7FFF //RX_FDDRC_SLANT_1_0 +264 0x7FFF //RX_FDDRC_SLANT_1_1 +265 0x7FFF //RX_FDDRC_SLANT_1_2 +266 0x7FFF //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +286 0x0100 //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 #CASE_NAME HEADSET-TTY_VCO-VOICE_GENERIC-NB -#PARAM_MODE FULL -#PARAM_TYPE TX+RX -#TOTAL_CUSTOM_STEP 7 +#PARAM_MODE Full +#PARAM_TYPE TX+2RX +#TOTAL_CUSTOM_STEP 7+7 #TX 0 0x0001 //TX_OPERATION_MODE_0 1 0x0001 //TX_OPERATION_MODE_1 2 0x0033 //TX_PATCH_REG -3 0x2F7C //TX_SENDFUNC_MODE_0 +3 0x6F7C //TX_SENDFUNC_MODE_0 4 0x0001 //TX_SENDFUNC_MODE_1 -5 0x0003 //TX_NUM_MIC +5 0x0002 //TX_NUM_MIC 6 0x0000 //TX_SAMPLINGFREQ_SIG 7 0x0000 //TX_SAMPLINGFREQ_PROC 8 0x000A //TX_FRAME_SZ_SIG @@ -42125,8 +64109,8 @@ 18 0x0000 //TX_SYS_RESRV_2 19 0x0000 //TX_SYS_RESRV_3 20 0x0000 //TX_DIST2REF0 -21 0x00A4 //TX_DIST2REF1 -22 0x0017 //TX_DIST2REF_02 +21 0x009D //TX_DIST2REF1 +22 0x0010 //TX_DIST2REF_02 23 0x0000 //TX_DIST2REF_03 24 0x0000 //TX_DIST2REF_04 25 0x0000 //TX_DIST2REF_05 @@ -42232,7 +64216,7 @@ 125 0x6000 //TX_C_POST_FLT_MIC_MAINBLK 126 0x6000 //TX_C_POST_FLT_MIC_REFBLK 127 0x0010 //TX_MIC_BLOCK_N -128 0x7652 //TX_A_HP +128 0x7646 //TX_A_HP 129 0x4000 //TX_B_PE 130 0x5000 //TX_THR_PITCH_DET_0 131 0x4800 //TX_THR_PITCH_DET_1 @@ -42271,7 +64255,7 @@ 164 0x7FFF //TX_MIN_EQ_RE_EST_12 165 0x2000 //TX_LAMBDA_RE_EST 166 0x0000 //TX_LAMBDA_CB_NLE -167 0x7FFF //TX_C_POST_FLT +167 0x4000 //TX_C_POST_FLT 168 0x2000 //TX_GAIN_NP 169 0x0180 //TX_SE_HOLD_N 170 0x00C8 //TX_DT_HOLD_N @@ -42301,14 +64285,14 @@ 194 0x0000 //TX_NORMENERTH 195 0x0000 //TX_NORMENERHIGHTH 196 0x0000 //TX_NORMENERHIGHTHL -197 0x6590 //TX_DTD_THR1_0 -198 0x6590 //TX_DTD_THR1_1 -199 0x6590 //TX_DTD_THR1_2 +197 0x7FF0 //TX_DTD_THR1_0 +198 0x7FF0 //TX_DTD_THR1_1 +199 0x7FF0 //TX_DTD_THR1_2 200 0x7FF0 //TX_DTD_THR1_3 201 0x7FF0 //TX_DTD_THR1_4 202 0x7FF0 //TX_DTD_THR1_5 203 0x7FF0 //TX_DTD_THR1_6 -204 0x0CCD //TX_DTD_THR2_0 +204 0x7E00 //TX_DTD_THR2_0 205 0x0CCD //TX_DTD_THR2_1 206 0x0CCD //TX_DTD_THR2_2 207 0x0CCD //TX_DTD_THR2_3 @@ -42317,7 +64301,7 @@ 210 0x0CCD //TX_DTD_THR2_6 211 0x7FFF //TX_DTD_THR3 212 0x0000 //TX_SPK_CUT_K -213 0x157C //TX_DT_CUT_K +213 0x1F40 //TX_DT_CUT_K 214 0x0100 //TX_DT_CUT_THR 215 0x04EB //TX_COMFORT_G 216 0x01F4 //TX_POWER_YOUT_TH @@ -42327,18 +64311,18 @@ 220 0x0000 //TX_DTD_MIC_BLK 221 0x1000 //TX_ADPT_STRICT_L 222 0x1000 //TX_ADPT_STRICT_H -223 0x0BB8 //TX_RATIO_DT_L_TH_LOW +223 0x0001 //TX_RATIO_DT_L_TH_LOW 224 0x3A98 //TX_RATIO_DT_H_TH_LOW -225 0x1770 //TX_RATIO_DT_L_TH_HIGH +225 0x0640 //TX_RATIO_DT_L_TH_HIGH 226 0x4E20 //TX_RATIO_DT_H_TH_HIGH -227 0x09C4 //TX_RATIO_DT_L0_TH -228 0x0800 //TX_B_POST_FILT_ECHO_L +227 0x0001 //TX_RATIO_DT_L0_TH +228 0x7FFF //TX_B_POST_FILT_ECHO_L 229 0x2000 //TX_B_POST_FILT_ECHO_H 230 0x0200 //TX_MIN_G_CTRL_ECHO 231 0x1000 //TX_B_LESSCUT_RTO_ECHO 232 0x0000 //TX_EPD_OFFSET_00 233 0x0000 //TX_EPD_OFFST_01 -234 0x1388 //TX_RATIO_DT_L0_TH_HIGH +234 0x05DC //TX_RATIO_DT_L0_TH_HIGH 235 0x3A98 //TX_RATIO_DT_H_TH_CUT 236 0x7FFF //TX_MIN_EQ_RE_EST_13 237 0x0000 //TX_DTD_THR1_7 @@ -42346,7 +64330,7 @@ 239 0x0800 //TX_DT_RESRV_7 240 0x0800 //TX_DT_RESRV_8 241 0x0000 //TX_DT_RESRV_9 -242 0xF800 //TX_THR_SN_EST_0 +242 0xFA00 //TX_THR_SN_EST_0 243 0xFA00 //TX_THR_SN_EST_1 244 0xFA00 //TX_THR_SN_EST_2 245 0xF900 //TX_THR_SN_EST_3 @@ -42355,12 +64339,12 @@ 248 0xF800 //TX_THR_SN_EST_6 249 0xF800 //TX_THR_SN_EST_7 250 0x0050 //TX_DELTA_THR_SN_EST_0 -251 0x01A0 //TX_DELTA_THR_SN_EST_1 +251 0x0200 //TX_DELTA_THR_SN_EST_1 252 0x0200 //TX_DELTA_THR_SN_EST_2 -253 0x0200 //TX_DELTA_THR_SN_EST_3 -254 0x0100 //TX_DELTA_THR_SN_EST_4 +253 0x0100 //TX_DELTA_THR_SN_EST_3 +254 0x0200 //TX_DELTA_THR_SN_EST_4 255 0x0200 //TX_DELTA_THR_SN_EST_5 -256 0x0200 //TX_DELTA_THR_SN_EST_6 +256 0x01A0 //TX_DELTA_THR_SN_EST_6 257 0x0200 //TX_DELTA_THR_SN_EST_7 258 0x4000 //TX_LAMBDA_NN_EST_0 259 0x4000 //TX_LAMBDA_NN_EST_1 @@ -42387,28 +64371,28 @@ 280 0x1000 //TX_B_POST_FLT_1 281 0x0010 //TX_NS_LVL_CTRL_0 282 0x0012 //TX_NS_LVL_CTRL_1 -283 0x0017 //TX_NS_LVL_CTRL_2 -284 0x0015 //TX_NS_LVL_CTRL_3 +283 0x0015 //TX_NS_LVL_CTRL_2 +284 0x0012 //TX_NS_LVL_CTRL_3 285 0x0012 //TX_NS_LVL_CTRL_4 -286 0x0012 //TX_NS_LVL_CTRL_5 -287 0x0011 //TX_NS_LVL_CTRL_6 +286 0x0011 //TX_NS_LVL_CTRL_5 +287 0x0012 //TX_NS_LVL_CTRL_6 288 0x0011 //TX_NS_LVL_CTRL_7 289 0x000F //TX_MIN_GAIN_S_0 -290 0x000F //TX_MIN_GAIN_S_1 -291 0x000D //TX_MIN_GAIN_S_2 +290 0x000D //TX_MIN_GAIN_S_1 +291 0x000F //TX_MIN_GAIN_S_2 292 0x000F //TX_MIN_GAIN_S_3 293 0x000F //TX_MIN_GAIN_S_4 -294 0x000F //TX_MIN_GAIN_S_5 -295 0x0010 //TX_MIN_GAIN_S_6 +294 0x0010 //TX_MIN_GAIN_S_5 +295 0x000F //TX_MIN_GAIN_S_6 296 0x000F //TX_MIN_GAIN_S_7 297 0x4000 //TX_NMOS_SUP 298 0x0000 //TX_NS_MAX_PRI_SNR_TH 299 0x0000 //TX_NMOS_SUP_MENSA 300 0x7FFF //TX_SNRI_SUP_0 -301 0x4000 //TX_SNRI_SUP_1 -302 0x1000 //TX_SNRI_SUP_2 -303 0x4000 //TX_SNRI_SUP_3 -304 0x2400 //TX_SNRI_SUP_4 +301 0x3000 //TX_SNRI_SUP_1 +302 0x4000 //TX_SNRI_SUP_2 +303 0x2400 //TX_SNRI_SUP_3 +304 0x4000 //TX_SNRI_SUP_4 305 0x4000 //TX_SNRI_SUP_5 306 0x4000 //TX_SNRI_SUP_6 307 0x7FFF //TX_SNRI_SUP_7 @@ -42419,19 +64403,19 @@ 312 0x7FFF //TX_A_POST_FILT_0 313 0x2000 //TX_A_POST_FILT_1 314 0x4000 //TX_A_POST_FILT_S_0 -315 0x5000 //TX_A_POST_FILT_S_1 -316 0x2000 //TX_A_POST_FILT_S_2 -317 0x4000 //TX_A_POST_FILT_S_3 -318 0x1000 //TX_A_POST_FILT_S_4 -319 0x3000 //TX_A_POST_FILT_S_5 +315 0x2000 //TX_A_POST_FILT_S_1 +316 0x4000 //TX_A_POST_FILT_S_2 +317 0x1000 //TX_A_POST_FILT_S_3 +318 0x3000 //TX_A_POST_FILT_S_4 +319 0x5000 //TX_A_POST_FILT_S_5 320 0x5000 //TX_A_POST_FILT_S_6 321 0x7000 //TX_A_POST_FILT_S_7 322 0x1000 //TX_B_POST_FILT_0 323 0x1000 //TX_B_POST_FILT_1 324 0x1000 //TX_B_POST_FILT_2 -325 0x1000 //TX_B_POST_FILT_3 -326 0x5000 //TX_B_POST_FILT_4 -327 0x3000 //TX_B_POST_FILT_5 +325 0x5000 //TX_B_POST_FILT_3 +326 0x3000 //TX_B_POST_FILT_4 +327 0x1000 //TX_B_POST_FILT_5 328 0x1000 //TX_B_POST_FILT_6 329 0x2000 //TX_B_POST_FILT_7 330 0x4000 //TX_B_LESSCUT_RTO_S_0 @@ -42444,12 +64428,12 @@ 337 0x7FFF //TX_B_LESSCUT_RTO_S_7 338 0x7E00 //TX_LAMBDA_PFILT 339 0x7D00 //TX_LAMBDA_PFILT_S_0 -340 0x7900 //TX_LAMBDA_PFILT_S_1 -341 0x7400 //TX_LAMBDA_PFILT_S_2 -342 0x7900 //TX_LAMBDA_PFILT_S_3 -343 0x7000 //TX_LAMBDA_PFILT_S_4 +340 0x7C00 //TX_LAMBDA_PFILT_S_1 +341 0x7900 //TX_LAMBDA_PFILT_S_2 +342 0x7000 //TX_LAMBDA_PFILT_S_3 +343 0x7D00 //TX_LAMBDA_PFILT_S_4 344 0x7D00 //TX_LAMBDA_PFILT_S_5 -345 0x7D00 //TX_LAMBDA_PFILT_S_6 +345 0x7900 //TX_LAMBDA_PFILT_S_6 346 0x7D00 //TX_LAMBDA_PFILT_S_7 347 0x0200 //TX_K_PEPPER 348 0x0800 //TX_A_PEPPER @@ -42458,20 +64442,20 @@ 351 0x0001 //TX_HMNC_BST_FLG 352 0x0200 //TX_HMNC_BST_THR 353 0x0800 //TX_DT_BINVAD_TH_0 -354 0x0800 //TX_DT_BINVAD_TH_1 -355 0x0800 //TX_DT_BINVAD_TH_2 +354 0x0100 //TX_DT_BINVAD_TH_1 +355 0x0100 //TX_DT_BINVAD_TH_2 356 0x0800 //TX_DT_BINVAD_TH_3 357 0x0FA0 //TX_DT_BINVAD_ENDF -358 0x0400 //TX_C_POST_FLT_DT +358 0x7000 //TX_C_POST_FLT_DT 359 0x4000 //TX_NS_B_POST_FLT_LESSCUT -360 0x0100 //TX_DT_BOOST +360 0x01B0 //TX_DT_BOOST 361 0x0000 //TX_BF_SGRAD_FLG 362 0x0005 //TX_BF_DVG_TH 363 0x001E //TX_SN_C_F 364 0x0000 //TX_K_APT 365 0x0001 //TX_NOISEDET 366 0x0064 //TX_NDETCT -367 0x0050 //TX_NOISE_TH_0 +367 0x003B //TX_NOISE_TH_0 368 0x7FFF //TX_NOISE_TH_0_2 369 0x7FFF //TX_NOISE_TH_0_3 370 0x07D0 //TX_NOISE_TH_1 @@ -42483,11 +64467,11 @@ 376 0x0000 //TX_NOISE_TH_5_3 377 0x7FFF //TX_NOISE_TH_5_4 378 0x0FA0 //TX_NOISE_TH_6 -379 0x000A //TX_MINENOISE_TH -380 0x4000 //TX_MINENOISE_MIC0_TH_MTS -381 0xFFEE //TX_MINENOISE_MIC0_TH_EXP -382 0x6000 //TX_MINENOISE_MIC0_S_TH_MTS -383 0xFFF3 //TX_MINENOISE_MIC0_S_TH_EXP +379 0x00C8 //TX_MINENOISE_TH +380 0xD508 //TX_MORENS_TFMASK_TH +381 0x0001 //TX_DRC_QUIET_FLOOR +382 0x3A98 //TX_RATIODTL_CUT_TH +383 0x0DAC //TX_DT_CUT_K1 384 0x0666 //TX_OUT_ENER_S_TH_CLEAN 385 0x0666 //TX_OUT_ENER_S_TH_LESSCLEAN 386 0x0333 //TX_OUT_ENER_S_TH_NOISY @@ -42495,22 +64479,22 @@ 388 0x1000 //TX_OUT_ENER_TH_SPEECH 389 0x2000 //TX_SN_NPB_GAIN 390 0x0000 //TX_NN_NPB_GAIN -391 0x0000 //TX_CSX_ALPHA_0 -392 0x0000 //TX_CSX_ALPHA_1 -393 0x0000 //TX_CSX_ALPHA_2 -394 0x0000 //TX_CSX_ALPHA_3 -395 0x0800 //TX_MU_ARSP_EST -396 0x00C8 //TX_P_OUTBEAM_MIN_TH +391 0x7FFF //TX_POST_MASK_SUP_HSNE +392 0x1388 //TX_TAIL_DET_TH +393 0x4000 //TX_B_LESSCUT_RTO_WTA +394 0x0000 //TX_MEL_G_R +395 0x0080 //TX_SUPHIGH_TH +396 0x0000 //TX_MASK_G_R 397 0x0002 //TX_EXTRA_NS_L -398 0x0800 //TX_EXTRA_NS_A -399 0x0005 //TX_VR_NOISE_FLOOR_TH +398 0x1800 //TX_C_POST_FLT_MASK +399 0x7FFF //TX_A_POST_FLT_WNS 400 0x0148 //TX_MIN_G_LOW300HZ -401 0x0001 //TX_MAXLEVEL_CNG +401 0x0004 //TX_MAXLEVEL_CNG 402 0x00B4 //TX_STN_NOISE_TH 403 0x4000 //TX_POST_MASK_SUP 404 0x7FFF //TX_POST_MASK_ADJUST 405 0x00C8 //TX_NS_ENOISE_MIC0_TH -406 0x000A //TX_MINENOISE_MIC0_TH +406 0x0032 //TX_MINENOISE_MIC0_TH 407 0x012C //TX_MINENOISE_MIC0_S_TH 408 0x7FFF //TX_MIN_G_CTRL_SSNS 409 0x0000 //TX_METAL_RTO_THR @@ -42618,16 +64602,16 @@ 511 0x6666 //TX_MIC_TO_BFGAIN 512 0x0000 //TX_MICTOBFGAIN0 513 0x0000 //TX_FASTMUE_TH -514 0x0000 //TX_DERVB_LEN_0 -515 0x0000 //TX_DERVB_LEN_1 -516 0x0000 //TX_RHO_DERVB -517 0x0000 //TX_MIC_INDX_DERVB -518 0x0000 //TX_MU_DERVB -519 0x0000 //TX_DR_RESRV_0 -520 0x0000 //TX_DR_RESRV_1 -521 0x0000 //TX_DR_RESRV_2 -522 0x0000 //TX_DR_RESRV_3 -523 0x0000 //TX_DR_RESRV_4 +514 0xC000 //TX_DEREVERB_LF_MU +515 0xC000 //TX_DEREVERB_HF_MU +516 0xCCCC //TX_DEREVERB_DELAY +517 0xD999 //TX_DEREVERB_COEF_LEN +518 0x1F40 //TX_DEREVERB_DNR +519 0x0000 //TX_DEREVERB_ALPHA +520 0x0000 //TX_DEREVERB_BETA +521 0x0000 //TX_GSC_RTOL_TH +522 0x7000 //TX_GSC_RTOH_TH +523 0x0064 //TX_WIDE2_MEANHTH 524 0x0000 //TX_DR_RESRV_5 525 0x0000 //TX_DR_RESRV_6 526 0x0000 //TX_DR_RESRV_7 @@ -42671,16 +64655,16 @@ 564 0x0000 //TX_PB_RESRV_0 565 0x0000 //TX_PB_RESRV_1 566 0x0014 //TX_FDEQ_SUBNUM -567 0x5858 //TX_FDEQ_GAIN_0 -568 0x5850 //TX_FDEQ_GAIN_1 -569 0x5050 //TX_FDEQ_GAIN_2 -570 0x5048 //TX_FDEQ_GAIN_3 -571 0x3C48 //TX_FDEQ_GAIN_4 -572 0x3C48 //TX_FDEQ_GAIN_5 -573 0x4848 //TX_FDEQ_GAIN_6 -574 0x4842 //TX_FDEQ_GAIN_7 -575 0x3030 //TX_FDEQ_GAIN_8 -576 0x3030 //TX_FDEQ_GAIN_9 +567 0x5050 //TX_FDEQ_GAIN_0 +568 0x5048 //TX_FDEQ_GAIN_1 +569 0x4848 //TX_FDEQ_GAIN_2 +570 0x483C //TX_FDEQ_GAIN_3 +571 0x3034 //TX_FDEQ_GAIN_4 +572 0x3048 //TX_FDEQ_GAIN_5 +573 0x4840 //TX_FDEQ_GAIN_6 +574 0x403C //TX_FDEQ_GAIN_7 +575 0x262C //TX_FDEQ_GAIN_8 +576 0x3A3C //TX_FDEQ_GAIN_9 577 0x4848 //TX_FDEQ_GAIN_10 578 0x4848 //TX_FDEQ_GAIN_11 579 0x4848 //TX_FDEQ_GAIN_12 @@ -42704,7 +64688,7 @@ 597 0x0708 //TX_FDEQ_BIN_6 598 0x090A //TX_FDEQ_BIN_7 599 0x0B0C //TX_FDEQ_BIN_8 -600 0x0D08 //TX_FDEQ_BIN_9 +600 0x0D0E //TX_FDEQ_BIN_9 601 0x0000 //TX_FDEQ_BIN_10 602 0x0000 //TX_FDEQ_BIN_11 603 0x0000 //TX_FDEQ_BIN_12 @@ -42728,9 +64712,9 @@ 621 0x4848 //TX_PREEQ_GAIN_MIC0_4 622 0x4848 //TX_PREEQ_GAIN_MIC0_5 623 0x4848 //TX_PREEQ_GAIN_MIC0_6 -624 0x484A //TX_PREEQ_GAIN_MIC0_7 -625 0x4B4E //TX_PREEQ_GAIN_MIC0_8 -626 0x5054 //TX_PREEQ_GAIN_MIC0_9 +624 0x4848 //TX_PREEQ_GAIN_MIC0_7 +625 0x4A4C //TX_PREEQ_GAIN_MIC0_8 +626 0x4E50 //TX_PREEQ_GAIN_MIC0_9 627 0x4848 //TX_PREEQ_GAIN_MIC0_10 628 0x4848 //TX_PREEQ_GAIN_MIC0_11 629 0x4848 //TX_PREEQ_GAIN_MIC0_12 @@ -42754,7 +64738,7 @@ 647 0x0708 //TX_PREEQ_BIN_MIC0_6 648 0x090A //TX_PREEQ_BIN_MIC0_7 649 0x0B0C //TX_PREEQ_BIN_MIC0_8 -650 0x0D08 //TX_PREEQ_BIN_MIC0_9 +650 0x0D0E //TX_PREEQ_BIN_MIC0_9 651 0x0000 //TX_PREEQ_BIN_MIC0_10 652 0x0000 //TX_PREEQ_BIN_MIC0_11 653 0x0000 //TX_PREEQ_BIN_MIC0_12 @@ -42777,9 +64761,9 @@ 670 0x4848 //TX_PREEQ_GAIN_MIC1_4 671 0x4848 //TX_PREEQ_GAIN_MIC1_5 672 0x4848 //TX_PREEQ_GAIN_MIC1_6 -673 0x4848 //TX_PREEQ_GAIN_MIC1_7 -674 0x4848 //TX_PREEQ_GAIN_MIC1_8 -675 0x4848 //TX_PREEQ_GAIN_MIC1_9 +673 0x4846 //TX_PREEQ_GAIN_MIC1_7 +674 0x4544 //TX_PREEQ_GAIN_MIC1_8 +675 0x4241 //TX_PREEQ_GAIN_MIC1_9 676 0x4848 //TX_PREEQ_GAIN_MIC1_10 677 0x4848 //TX_PREEQ_GAIN_MIC1_11 678 0x4848 //TX_PREEQ_GAIN_MIC1_12 @@ -42794,16 +64778,16 @@ 687 0x4848 //TX_PREEQ_GAIN_MIC1_21 688 0x4848 //TX_PREEQ_GAIN_MIC1_22 689 0x4848 //TX_PREEQ_GAIN_MIC1_23 -690 0x251A //TX_PREEQ_BIN_MIC1_0 -691 0x0F0F //TX_PREEQ_BIN_MIC1_1 -692 0x0C08 //TX_PREEQ_BIN_MIC1_2 -693 0x0700 //TX_PREEQ_BIN_MIC1_3 -694 0x0000 //TX_PREEQ_BIN_MIC1_4 -695 0x0000 //TX_PREEQ_BIN_MIC1_5 -696 0x0000 //TX_PREEQ_BIN_MIC1_6 -697 0x0000 //TX_PREEQ_BIN_MIC1_7 -698 0x0000 //TX_PREEQ_BIN_MIC1_8 -699 0x0000 //TX_PREEQ_BIN_MIC1_9 +690 0x0202 //TX_PREEQ_BIN_MIC1_0 +691 0x0203 //TX_PREEQ_BIN_MIC1_1 +692 0x0303 //TX_PREEQ_BIN_MIC1_2 +693 0x0304 //TX_PREEQ_BIN_MIC1_3 +694 0x0405 //TX_PREEQ_BIN_MIC1_4 +695 0x0506 //TX_PREEQ_BIN_MIC1_5 +696 0x0708 //TX_PREEQ_BIN_MIC1_6 +697 0x090A //TX_PREEQ_BIN_MIC1_7 +698 0x0B0C //TX_PREEQ_BIN_MIC1_8 +699 0x0D0E //TX_PREEQ_BIN_MIC1_9 700 0x0000 //TX_PREEQ_BIN_MIC1_10 701 0x0000 //TX_PREEQ_BIN_MIC1_11 702 0x0000 //TX_PREEQ_BIN_MIC1_12 @@ -42843,7 +64827,7 @@ 736 0x4848 //TX_PREEQ_GAIN_MIC2_21 737 0x4848 //TX_PREEQ_GAIN_MIC2_22 738 0x4848 //TX_PREEQ_GAIN_MIC2_23 -739 0x7800 //TX_PREEQ_BIN_MIC2_0 +739 0x0000 //TX_PREEQ_BIN_MIC2_0 740 0x0000 //TX_PREEQ_BIN_MIC2_1 741 0x0000 //TX_PREEQ_BIN_MIC2_2 742 0x0000 //TX_PREEQ_BIN_MIC2_3 @@ -42895,7 +64879,7 @@ 788 0x7EB8 //TX_TDDRC_ALPHA_DWN_02 789 0x7EB8 //TX_TDDRC_ALPHA_DWN_03 790 0x7EB8 //TX_TDDRC_ALPHA_DWN_04 -791 0x7FFF //TX_TDDRC_TD_DRC_LIMIT +791 0x7214 //TX_TDDRC_TD_DRC_LIMIT 792 0x0800 //TX_TDDRC_POST_LIMIT_GAIN 793 0x0000 //TX_TDDRC_RESRV_0 794 0x0000 //TX_TDDRC_RESRV_1 @@ -42962,15 +64946,15 @@ 855 0x0010 //TX_TDDRC_THRD_1 856 0x1800 //TX_TDDRC_THRD_2 857 0x1800 //TX_TDDRC_THRD_3 -858 0x6000 //TX_TDDRC_SLANT_0 -859 0x6000 //TX_TDDRC_SLANT_1 +858 0x7FFF //TX_TDDRC_SLANT_0 +859 0x7FFF //TX_TDDRC_SLANT_1 860 0x4000 //TX_TDDRC_ALPHA_UP_00 861 0x6000 //TX_TDDRC_ALPHA_DWN_00 862 0x0000 //TX_TDDRC_HMNC_FLAG 863 0x199A //TX_TDDRC_HMNC_GAIN 864 0x0000 //TX_TDDRC_SMT_FLAG 865 0x0CCD //TX_TDDRC_SMT_W -866 0x0BE3 //TX_TDDRC_DRC_GAIN +866 0x0A00 //TX_TDDRC_DRC_GAIN 867 0x7FFF //TX_TDDRC_LMT_THRD 868 0x0000 //TX_TDDRC_LMT_ALPHA 869 0x0000 //TX_TFMASKLTH @@ -42995,14 +64979,79 @@ 888 0x0028 //TX_FASTNS_ARSPC_TH 889 0xC000 //TX_FASTNS_MASK5_TH 890 0x4848 //TX_POSTSSA_MIN_G_VR_MASK -891 0x7FFF //TX_A_LESSCUT_RTO_MASK +891 0x4000 //TX_A_LESSCUT_RTO_MASK 892 0x1770 //TX_FASTNS_NOISETH 893 0xC000 //TX_FASTNS_SSA_THLFL 894 0xC000 //TX_FASTNS_SSA_THHFL 895 0xCCCC //TX_FASTNS_SSA_THLFH 896 0xD999 //TX_FASTNS_SSA_THHFH +897 0x2339 //TX_SENDFUNC_REG_MICMUTE +898 0x0021 //TX_SENDFUNC_REG_MICMUTE1 +899 0x02BC //TX_MICMUTE_RATIO_THR +900 0x0140 //TX_MICMUTE_AMP_THR +901 0x0004 //TX_MICMUTE_HPF_IND +902 0x00C0 //TX_MICMUTE_LOG_EYR_TH +903 0x0008 //TX_MICMUTE_CVG_TIME +904 0x0008 //TX_MICMUTE_RELEASE_TIME +905 0x01FE //TX_MIC_VOLUME_MIC0MUTE +906 0x0020 //TX_MICMUTE_EPD_OFFSET_0 +907 0x001E //TX_MICMUTE_FRQ_AEC_L +908 0x7999 //TX_MICMUTE_EAD_THR +909 0x7FFF //TX_MICMUTE_LAMBDA_CB_NLE +910 0x7FFF //TX_MICMUTE_LAMBDA_RE_EST +911 0x4000 //TX_DTD_THR1_MICMUTE_0 +912 0x7000 //TX_DTD_THR1_MICMUTE_1 +913 0x7FFF //TX_DTD_THR1_MICMUTE_2 +914 0x7FFF //TX_DTD_THR1_MICMUTE_3 +915 0x6CCC //TX_DTD_THR2_MICMUTE_0 +916 0x0400 //TX_MICMUTE_MIN_EQ_RE_EST_0 +917 0x0400 //TX_MICMUTE_MIN_EQ_RE_EST_1 +918 0x1000 //TX_MICMUTE_MIN_EQ_RE_EST_2 +919 0x7FFF //TX_MICMUTE_MIN_EQ_RE_EST_3 +920 0x7FFF //TX_MICMUTE_MIN_EQ_RE_EST_4 +921 0x4000 //TX_MICMUTE_C_POST_FLT +922 0x03E8 //TX_MICMUTE_DT_CUT_K +923 0x0001 //TX_MICMUTE_DT_CUT_THR +924 0x03E8 //TX_MICMUTE_DT_CUT_K2 +925 0x0001 //TX_MICMUTE_DT_CUT_THR2 +926 0x0064 //TX_MICMUTE_DT2_HOLD_N +927 0x1000 //TX_MICMUTE_RATIODTH_THCUT +928 0x1000 //TX_MICMUTE_B_POST_FLT_ECHOL +929 0x7FFF //TX_MICMUTE_B_POST_FLT_ECHOH +930 0x0400 //TX_MICMUTE_C_POST_FLT_MASK +931 0x7999 //TX_MICMUTE_RATIODTL_CUT_TH +932 0x0258 //TX_MICMUTE_DT_CUT_K1 +933 0x0800 //TX_MICMUTE_N2_SN_EST +934 0xFC00 //TX_MICMUTE_THR_SN_EST_0 +935 0x001C //TX_MICMUTE_MIN_G_CTRL_0 +936 0x6000 //TX_MICMUTE_A_POST_FILT_S_0 +937 0x7000 //TX_MICMUTE_B_POST_FILT_0 +938 0x2710 //TX_MIC1RUB_AMP_THR +939 0x0010 //TX_MIC1MUTE_RATIO_THR +940 0x0450 //TX_MIC1MUTE_AMP_THR +941 0x0008 //TX_MIC1MUTE_CVG_TIME +942 0x0008 //TX_MIC1MUTE_RELEASE_TIME +943 0x0000 //TX_AMS_RESRV_01 +944 0x0000 //TX_AMS_RESRV_02 +945 0x0000 //TX_AMS_RESRV_03 +946 0x0000 //TX_AMS_RESRV_04 +947 0x0000 //TX_AMS_RESRV_05 +948 0x0000 //TX_AMS_RESRV_06 +949 0x0000 //TX_AMS_RESRV_07 +950 0x0000 //TX_AMS_RESRV_08 +951 0x0000 //TX_AMS_RESRV_09 +952 0x0000 //TX_AMS_RESRV_10 +953 0x0000 //TX_AMS_RESRV_11 +954 0x0000 //TX_AMS_RESRV_12 +955 0x0000 //TX_AMS_RESRV_13 +956 0x0000 //TX_AMS_RESRV_14 +957 0x0000 //TX_AMS_RESRV_15 +958 0x0000 //TX_AMS_RESRV_16 +959 0x0000 //TX_AMS_RESRV_17 +960 0x0000 //TX_AMS_RESRV_18 +961 0x0000 //TX_AMS_RESRV_19 #RX -0 0x0040 //RX_RECVFUNC_MODE_0 +0 0x2040 //RX_RECVFUNC_MODE_0 1 0x0000 //RX_RECVFUNC_MODE_1 2 0x0000 //RX_SAMPLINGFREQ_SIG 3 0x0000 //RX_SAMPLINGFREQ_PROC @@ -43852,18 +65901,869 @@ 110 0x0000 //RX_FDDRC_RESRV_0 129 0x0100 //RX_SPK_VOL 130 0x0000 //RX_VOL_RESRV_0 +#RX 2 +157 0x2040 //RX_RECVFUNC_MODE_0 +158 0x0000 //RX_RECVFUNC_MODE_1 +159 0x0000 //RX_SAMPLINGFREQ_SIG +160 0x0000 //RX_SAMPLINGFREQ_PROC +161 0x000A //RX_FRAME_SZ +162 0x0000 //RX_DELAY_OPT +163 0x3000 //RX_TDDRC_ALPHA_UP_1 +164 0x3000 //RX_TDDRC_ALPHA_UP_2 +165 0x3000 //RX_TDDRC_ALPHA_UP_3 +166 0x3000 //RX_TDDRC_ALPHA_UP_4 +167 0x050D //RX_PGA +168 0x7652 //RX_A_HP +169 0x4000 //RX_B_PE +170 0x7800 //RX_THR_PITCH_DET_0 +171 0x7000 //RX_THR_PITCH_DET_1 +172 0x6000 //RX_THR_PITCH_DET_2 +173 0x0000 //RX_PITCH_BFR_LEN +174 0x0000 //RX_SBD_PITCH_DET +175 0x0000 //RX_PP_RESRV_0 +176 0x0000 //RX_PP_RESRV_1 +177 0xF800 //RX_N_SN_EST +178 0x0000 //RX_N2_SN_EST +179 0x000F //RX_NS_LVL_CTRL +180 0xF800 //RX_THR_SN_EST +181 0x7E00 //RX_LAMBDA_PFILT +182 0x000A //RX_FENS_RESRV_0 +183 0x0000 //RX_FENS_RESRV_1 +184 0x7FB0 //RX_TDDRC_ALPHA_DWN_1 +185 0x7FB0 //RX_TDDRC_ALPHA_DWN_2 +186 0x7FB0 //RX_TDDRC_ALPHA_DWN_3 +187 0x0000 //RX_EXTRA_NS_L +188 0x0000 //RX_EXTRA_NS_A +189 0x7FB0 //RX_TDDRC_ALPHA_DWN_4 +190 0xDA9E //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +192 0x0000 //RX_A_POST_FLT +193 0x0000 //RX_LMT_THRD +194 0x4000 //RX_LMT_ALPHA +195 0x0020 //RX_FDEQ_SUBNUM +196 0x4848 //RX_FDEQ_GAIN_0 +197 0x4848 //RX_FDEQ_GAIN_1 +198 0x4848 //RX_FDEQ_GAIN_2 +199 0x4848 //RX_FDEQ_GAIN_3 +200 0x4848 //RX_FDEQ_GAIN_4 +201 0x4848 //RX_FDEQ_GAIN_5 +202 0x4848 //RX_FDEQ_GAIN_6 +203 0x4848 //RX_FDEQ_GAIN_7 +204 0x4848 //RX_FDEQ_GAIN_8 +205 0x4848 //RX_FDEQ_GAIN_9 +206 0x4848 //RX_FDEQ_GAIN_10 +207 0x4848 //RX_FDEQ_GAIN_11 +208 0x4848 //RX_FDEQ_GAIN_12 +209 0x4848 //RX_FDEQ_GAIN_13 +210 0x4848 //RX_FDEQ_GAIN_14 +211 0x4848 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0000 //RX_FDEQ_BIN_0 +221 0x0000 //RX_FDEQ_BIN_1 +222 0x0000 //RX_FDEQ_BIN_2 +223 0x0000 //RX_FDEQ_BIN_3 +224 0x0000 //RX_FDEQ_BIN_4 +225 0x0000 //RX_FDEQ_BIN_5 +226 0x0000 //RX_FDEQ_BIN_6 +227 0x0000 //RX_FDEQ_BIN_7 +228 0x0000 //RX_FDEQ_BIN_8 +229 0x0000 //RX_FDEQ_BIN_9 +230 0x0000 //RX_FDEQ_BIN_10 +231 0x0000 //RX_FDEQ_BIN_11 +232 0x0000 //RX_FDEQ_BIN_12 +233 0x0000 //RX_FDEQ_BIN_13 +234 0x0000 //RX_FDEQ_BIN_14 +235 0x0000 //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x0000 //RX_FDEQ_RESRV_0 +245 0x0000 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0030 //RX_FDDRC_BAND_MARGIN_1 +248 0x0050 //RX_FDDRC_BAND_MARGIN_2 +249 0x0080 //RX_FDDRC_BAND_MARGIN_3 +250 0x0004 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x5000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x6400 //RX_FDDRC_THRD_3_2 +258 0x6400 //RX_FDDRC_THRD_3_3 +259 0x2000 //RX_FDDRC_SLANT_0_0 +260 0x2000 //RX_FDDRC_SLANT_0_1 +261 0x2000 //RX_FDDRC_SLANT_0_2 +262 0x2000 //RX_FDDRC_SLANT_0_3 +263 0x2000 //RX_FDDRC_SLANT_1_0 +264 0x2000 //RX_FDDRC_SLANT_1_1 +265 0x2000 //RX_FDDRC_SLANT_1_2 +266 0x2000 //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +268 0x0003 //RX_FILTINDX +269 0x0000 //RX_TDDRC_THRD_0 +270 0x0000 //RX_TDDRC_THRD_1 +271 0x0E80 //RX_TDDRC_THRD_2 +272 0x3800 //RX_TDDRC_THRD_3 +273 0x2A00 //RX_TDDRC_SLANT_0 +274 0x6E00 //RX_TDDRC_SLANT_1 +275 0x3000 //RX_TDDRC_ALPHA_UP_0 +276 0x7FB0 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x0000 //RX_TDDRC_HMNC_GAIN +279 0x0000 //RX_TDDRC_SMT_FLAG +280 0x0000 //RX_TDDRC_SMT_W +281 0x0100 //RX_TDDRC_DRC_GAIN +282 0x7C00 //RX_LAMBDA_PKA_FP +283 0x2000 //RX_TPKA_FP +284 0x0080 //RX_MIN_G_FP +285 0x2000 //RX_MAX_G_FP +286 0x0100 //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 +288 0x0010 //RX_MAXLEVEL_CNG +289 0x0000 //RX_BWE_UV_TH +290 0x0000 //RX_BWE_UV_TH2 +291 0x0000 //RX_BWE_UV_TH3 +292 0x0000 //RX_BWE_V_TH +293 0x0000 //RX_BWE_GAIN1_V_TH1 +294 0x0000 //RX_BWE_GAIN1_V_TH2 +295 0x0000 //RX_BWE_UV_EQ +296 0x0000 //RX_BWE_V_EQ +297 0x0000 //RX_BWE_TONE_TH +298 0x0000 //RX_BWE_UV_HOLD_T +299 0x0000 //RX_BWE_GAIN2_ALPHA +300 0x0000 //RX_BWE_GAIN3_ALPHA +301 0x0000 //RX_BWE_CUTOFF +302 0x0000 //RX_BWE_GAINFILL +303 0x0000 //RX_BWE_MAXTH_TONE +304 0x0000 //RX_BWE_EQ_0 +305 0x0000 //RX_BWE_EQ_1 +306 0x0000 //RX_BWE_EQ_2 +307 0x0000 //RX_BWE_EQ_3 +308 0x0000 //RX_BWE_EQ_4 +309 0x0000 //RX_BWE_EQ_5 +310 0x0000 //RX_BWE_EQ_6 +311 0x0000 //RX_BWE_RESRV_0 +312 0x0000 //RX_BWE_RESRV_1 +313 0x0000 //RX_BWE_RESRV_2 +#VOL 0 +163 0x3000 //RX_TDDRC_ALPHA_UP_1 +164 0x3000 //RX_TDDRC_ALPHA_UP_2 +165 0x3000 //RX_TDDRC_ALPHA_UP_3 +166 0x3000 //RX_TDDRC_ALPHA_UP_4 +184 0x7FB0 //RX_TDDRC_ALPHA_DWN_1 +185 0x7FB0 //RX_TDDRC_ALPHA_DWN_2 +186 0x7FB0 //RX_TDDRC_ALPHA_DWN_3 +189 0x7FB0 //RX_TDDRC_ALPHA_DWN_4 +190 0xDA9E //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +269 0x0000 //RX_TDDRC_THRD_0 +270 0x0000 //RX_TDDRC_THRD_1 +271 0x0E80 //RX_TDDRC_THRD_2 +272 0x3800 //RX_TDDRC_THRD_3 +273 0x2A00 //RX_TDDRC_SLANT_0 +274 0x6E00 //RX_TDDRC_SLANT_1 +275 0x3000 //RX_TDDRC_ALPHA_UP_0 +276 0x7FB0 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x0000 //RX_TDDRC_HMNC_GAIN +279 0x0000 //RX_TDDRC_SMT_FLAG +280 0x0000 //RX_TDDRC_SMT_W +281 0x0100 //RX_TDDRC_DRC_GAIN +195 0x0020 //RX_FDEQ_SUBNUM +196 0x4848 //RX_FDEQ_GAIN_0 +197 0x4848 //RX_FDEQ_GAIN_1 +198 0x4848 //RX_FDEQ_GAIN_2 +199 0x4848 //RX_FDEQ_GAIN_3 +200 0x4848 //RX_FDEQ_GAIN_4 +201 0x4848 //RX_FDEQ_GAIN_5 +202 0x4848 //RX_FDEQ_GAIN_6 +203 0x4848 //RX_FDEQ_GAIN_7 +204 0x4848 //RX_FDEQ_GAIN_8 +205 0x4848 //RX_FDEQ_GAIN_9 +206 0x4848 //RX_FDEQ_GAIN_10 +207 0x4848 //RX_FDEQ_GAIN_11 +208 0x4848 //RX_FDEQ_GAIN_12 +209 0x4848 //RX_FDEQ_GAIN_13 +210 0x4848 //RX_FDEQ_GAIN_14 +211 0x4848 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0000 //RX_FDEQ_BIN_0 +221 0x0000 //RX_FDEQ_BIN_1 +222 0x0000 //RX_FDEQ_BIN_2 +223 0x0000 //RX_FDEQ_BIN_3 +224 0x0000 //RX_FDEQ_BIN_4 +225 0x0000 //RX_FDEQ_BIN_5 +226 0x0000 //RX_FDEQ_BIN_6 +227 0x0000 //RX_FDEQ_BIN_7 +228 0x0000 //RX_FDEQ_BIN_8 +229 0x0000 //RX_FDEQ_BIN_9 +230 0x0000 //RX_FDEQ_BIN_10 +231 0x0000 //RX_FDEQ_BIN_11 +232 0x0000 //RX_FDEQ_BIN_12 +233 0x0000 //RX_FDEQ_BIN_13 +234 0x0000 //RX_FDEQ_BIN_14 +235 0x0000 //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x0000 //RX_FDEQ_RESRV_0 +245 0x0000 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0030 //RX_FDDRC_BAND_MARGIN_1 +248 0x0050 //RX_FDDRC_BAND_MARGIN_2 +249 0x0080 //RX_FDDRC_BAND_MARGIN_3 +250 0x0004 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x5000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x6400 //RX_FDDRC_THRD_3_2 +258 0x6400 //RX_FDDRC_THRD_3_3 +259 0x2000 //RX_FDDRC_SLANT_0_0 +260 0x2000 //RX_FDDRC_SLANT_0_1 +261 0x2000 //RX_FDDRC_SLANT_0_2 +262 0x2000 //RX_FDDRC_SLANT_0_3 +263 0x2000 //RX_FDDRC_SLANT_1_0 +264 0x2000 //RX_FDDRC_SLANT_1_1 +265 0x2000 //RX_FDDRC_SLANT_1_2 +266 0x2000 //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +286 0x0100 //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 +#VOL 1 +163 0x3000 //RX_TDDRC_ALPHA_UP_1 +164 0x3000 //RX_TDDRC_ALPHA_UP_2 +165 0x3000 //RX_TDDRC_ALPHA_UP_3 +166 0x3000 //RX_TDDRC_ALPHA_UP_4 +184 0x7FB0 //RX_TDDRC_ALPHA_DWN_1 +185 0x7FB0 //RX_TDDRC_ALPHA_DWN_2 +186 0x7FB0 //RX_TDDRC_ALPHA_DWN_3 +189 0x7FB0 //RX_TDDRC_ALPHA_DWN_4 +190 0xDA9E //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +269 0x0000 //RX_TDDRC_THRD_0 +270 0x0000 //RX_TDDRC_THRD_1 +271 0x0E80 //RX_TDDRC_THRD_2 +272 0x3800 //RX_TDDRC_THRD_3 +273 0x2A00 //RX_TDDRC_SLANT_0 +274 0x6E00 //RX_TDDRC_SLANT_1 +275 0x3000 //RX_TDDRC_ALPHA_UP_0 +276 0x7FB0 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x0000 //RX_TDDRC_HMNC_GAIN +279 0x0000 //RX_TDDRC_SMT_FLAG +280 0x0000 //RX_TDDRC_SMT_W +281 0x0100 //RX_TDDRC_DRC_GAIN +195 0x0020 //RX_FDEQ_SUBNUM +196 0x4848 //RX_FDEQ_GAIN_0 +197 0x4848 //RX_FDEQ_GAIN_1 +198 0x4848 //RX_FDEQ_GAIN_2 +199 0x4848 //RX_FDEQ_GAIN_3 +200 0x4848 //RX_FDEQ_GAIN_4 +201 0x4848 //RX_FDEQ_GAIN_5 +202 0x4848 //RX_FDEQ_GAIN_6 +203 0x4848 //RX_FDEQ_GAIN_7 +204 0x4848 //RX_FDEQ_GAIN_8 +205 0x4848 //RX_FDEQ_GAIN_9 +206 0x4848 //RX_FDEQ_GAIN_10 +207 0x4848 //RX_FDEQ_GAIN_11 +208 0x4848 //RX_FDEQ_GAIN_12 +209 0x4848 //RX_FDEQ_GAIN_13 +210 0x4848 //RX_FDEQ_GAIN_14 +211 0x4848 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0000 //RX_FDEQ_BIN_0 +221 0x0000 //RX_FDEQ_BIN_1 +222 0x0000 //RX_FDEQ_BIN_2 +223 0x0000 //RX_FDEQ_BIN_3 +224 0x0000 //RX_FDEQ_BIN_4 +225 0x0000 //RX_FDEQ_BIN_5 +226 0x0000 //RX_FDEQ_BIN_6 +227 0x0000 //RX_FDEQ_BIN_7 +228 0x0000 //RX_FDEQ_BIN_8 +229 0x0000 //RX_FDEQ_BIN_9 +230 0x0000 //RX_FDEQ_BIN_10 +231 0x0000 //RX_FDEQ_BIN_11 +232 0x0000 //RX_FDEQ_BIN_12 +233 0x0000 //RX_FDEQ_BIN_13 +234 0x0000 //RX_FDEQ_BIN_14 +235 0x0000 //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x0000 //RX_FDEQ_RESRV_0 +245 0x0000 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0030 //RX_FDDRC_BAND_MARGIN_1 +248 0x0050 //RX_FDDRC_BAND_MARGIN_2 +249 0x0080 //RX_FDDRC_BAND_MARGIN_3 +250 0x0004 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x5000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x6400 //RX_FDDRC_THRD_3_2 +258 0x6400 //RX_FDDRC_THRD_3_3 +259 0x2000 //RX_FDDRC_SLANT_0_0 +260 0x2000 //RX_FDDRC_SLANT_0_1 +261 0x2000 //RX_FDDRC_SLANT_0_2 +262 0x2000 //RX_FDDRC_SLANT_0_3 +263 0x2000 //RX_FDDRC_SLANT_1_0 +264 0x2000 //RX_FDDRC_SLANT_1_1 +265 0x2000 //RX_FDDRC_SLANT_1_2 +266 0x2000 //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +286 0x0100 //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 +#VOL 2 +163 0x3000 //RX_TDDRC_ALPHA_UP_1 +164 0x3000 //RX_TDDRC_ALPHA_UP_2 +165 0x3000 //RX_TDDRC_ALPHA_UP_3 +166 0x3000 //RX_TDDRC_ALPHA_UP_4 +184 0x7FB0 //RX_TDDRC_ALPHA_DWN_1 +185 0x7FB0 //RX_TDDRC_ALPHA_DWN_2 +186 0x7FB0 //RX_TDDRC_ALPHA_DWN_3 +189 0x7FB0 //RX_TDDRC_ALPHA_DWN_4 +190 0xDA9E //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +269 0x0000 //RX_TDDRC_THRD_0 +270 0x0000 //RX_TDDRC_THRD_1 +271 0x0E80 //RX_TDDRC_THRD_2 +272 0x3800 //RX_TDDRC_THRD_3 +273 0x2A00 //RX_TDDRC_SLANT_0 +274 0x6E00 //RX_TDDRC_SLANT_1 +275 0x3000 //RX_TDDRC_ALPHA_UP_0 +276 0x7FB0 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x0000 //RX_TDDRC_HMNC_GAIN +279 0x0000 //RX_TDDRC_SMT_FLAG +280 0x0000 //RX_TDDRC_SMT_W +281 0x0100 //RX_TDDRC_DRC_GAIN +195 0x0020 //RX_FDEQ_SUBNUM +196 0x4848 //RX_FDEQ_GAIN_0 +197 0x4848 //RX_FDEQ_GAIN_1 +198 0x4848 //RX_FDEQ_GAIN_2 +199 0x4848 //RX_FDEQ_GAIN_3 +200 0x4848 //RX_FDEQ_GAIN_4 +201 0x4848 //RX_FDEQ_GAIN_5 +202 0x4848 //RX_FDEQ_GAIN_6 +203 0x4848 //RX_FDEQ_GAIN_7 +204 0x4848 //RX_FDEQ_GAIN_8 +205 0x4848 //RX_FDEQ_GAIN_9 +206 0x4848 //RX_FDEQ_GAIN_10 +207 0x4848 //RX_FDEQ_GAIN_11 +208 0x4848 //RX_FDEQ_GAIN_12 +209 0x4848 //RX_FDEQ_GAIN_13 +210 0x4848 //RX_FDEQ_GAIN_14 +211 0x4848 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0000 //RX_FDEQ_BIN_0 +221 0x0000 //RX_FDEQ_BIN_1 +222 0x0000 //RX_FDEQ_BIN_2 +223 0x0000 //RX_FDEQ_BIN_3 +224 0x0000 //RX_FDEQ_BIN_4 +225 0x0000 //RX_FDEQ_BIN_5 +226 0x0000 //RX_FDEQ_BIN_6 +227 0x0000 //RX_FDEQ_BIN_7 +228 0x0000 //RX_FDEQ_BIN_8 +229 0x0000 //RX_FDEQ_BIN_9 +230 0x0000 //RX_FDEQ_BIN_10 +231 0x0000 //RX_FDEQ_BIN_11 +232 0x0000 //RX_FDEQ_BIN_12 +233 0x0000 //RX_FDEQ_BIN_13 +234 0x0000 //RX_FDEQ_BIN_14 +235 0x0000 //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x0000 //RX_FDEQ_RESRV_0 +245 0x0000 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0030 //RX_FDDRC_BAND_MARGIN_1 +248 0x0050 //RX_FDDRC_BAND_MARGIN_2 +249 0x0080 //RX_FDDRC_BAND_MARGIN_3 +250 0x0004 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x5000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x6400 //RX_FDDRC_THRD_3_2 +258 0x6400 //RX_FDDRC_THRD_3_3 +259 0x2000 //RX_FDDRC_SLANT_0_0 +260 0x2000 //RX_FDDRC_SLANT_0_1 +261 0x2000 //RX_FDDRC_SLANT_0_2 +262 0x2000 //RX_FDDRC_SLANT_0_3 +263 0x2000 //RX_FDDRC_SLANT_1_0 +264 0x2000 //RX_FDDRC_SLANT_1_1 +265 0x2000 //RX_FDDRC_SLANT_1_2 +266 0x2000 //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +286 0x0100 //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 +#VOL 3 +163 0x3000 //RX_TDDRC_ALPHA_UP_1 +164 0x3000 //RX_TDDRC_ALPHA_UP_2 +165 0x3000 //RX_TDDRC_ALPHA_UP_3 +166 0x3000 //RX_TDDRC_ALPHA_UP_4 +184 0x7FB0 //RX_TDDRC_ALPHA_DWN_1 +185 0x7FB0 //RX_TDDRC_ALPHA_DWN_2 +186 0x7FB0 //RX_TDDRC_ALPHA_DWN_3 +189 0x7FB0 //RX_TDDRC_ALPHA_DWN_4 +190 0xDA9E //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +269 0x0000 //RX_TDDRC_THRD_0 +270 0x0000 //RX_TDDRC_THRD_1 +271 0x0E80 //RX_TDDRC_THRD_2 +272 0x3800 //RX_TDDRC_THRD_3 +273 0x2A00 //RX_TDDRC_SLANT_0 +274 0x6E00 //RX_TDDRC_SLANT_1 +275 0x3000 //RX_TDDRC_ALPHA_UP_0 +276 0x7FB0 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x0000 //RX_TDDRC_HMNC_GAIN +279 0x0000 //RX_TDDRC_SMT_FLAG +280 0x0000 //RX_TDDRC_SMT_W +281 0x0100 //RX_TDDRC_DRC_GAIN +195 0x0020 //RX_FDEQ_SUBNUM +196 0x4848 //RX_FDEQ_GAIN_0 +197 0x4848 //RX_FDEQ_GAIN_1 +198 0x4848 //RX_FDEQ_GAIN_2 +199 0x4848 //RX_FDEQ_GAIN_3 +200 0x4848 //RX_FDEQ_GAIN_4 +201 0x4848 //RX_FDEQ_GAIN_5 +202 0x4848 //RX_FDEQ_GAIN_6 +203 0x4848 //RX_FDEQ_GAIN_7 +204 0x4848 //RX_FDEQ_GAIN_8 +205 0x4848 //RX_FDEQ_GAIN_9 +206 0x4848 //RX_FDEQ_GAIN_10 +207 0x4848 //RX_FDEQ_GAIN_11 +208 0x4848 //RX_FDEQ_GAIN_12 +209 0x4848 //RX_FDEQ_GAIN_13 +210 0x4848 //RX_FDEQ_GAIN_14 +211 0x4848 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0000 //RX_FDEQ_BIN_0 +221 0x0000 //RX_FDEQ_BIN_1 +222 0x0000 //RX_FDEQ_BIN_2 +223 0x0000 //RX_FDEQ_BIN_3 +224 0x0000 //RX_FDEQ_BIN_4 +225 0x0000 //RX_FDEQ_BIN_5 +226 0x0000 //RX_FDEQ_BIN_6 +227 0x0000 //RX_FDEQ_BIN_7 +228 0x0000 //RX_FDEQ_BIN_8 +229 0x0000 //RX_FDEQ_BIN_9 +230 0x0000 //RX_FDEQ_BIN_10 +231 0x0000 //RX_FDEQ_BIN_11 +232 0x0000 //RX_FDEQ_BIN_12 +233 0x0000 //RX_FDEQ_BIN_13 +234 0x0000 //RX_FDEQ_BIN_14 +235 0x0000 //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x0000 //RX_FDEQ_RESRV_0 +245 0x0000 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0030 //RX_FDDRC_BAND_MARGIN_1 +248 0x0050 //RX_FDDRC_BAND_MARGIN_2 +249 0x0080 //RX_FDDRC_BAND_MARGIN_3 +250 0x0004 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x5000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x6400 //RX_FDDRC_THRD_3_2 +258 0x6400 //RX_FDDRC_THRD_3_3 +259 0x2000 //RX_FDDRC_SLANT_0_0 +260 0x2000 //RX_FDDRC_SLANT_0_1 +261 0x2000 //RX_FDDRC_SLANT_0_2 +262 0x2000 //RX_FDDRC_SLANT_0_3 +263 0x2000 //RX_FDDRC_SLANT_1_0 +264 0x2000 //RX_FDDRC_SLANT_1_1 +265 0x2000 //RX_FDDRC_SLANT_1_2 +266 0x2000 //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +286 0x0100 //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 +#VOL 4 +163 0x3000 //RX_TDDRC_ALPHA_UP_1 +164 0x3000 //RX_TDDRC_ALPHA_UP_2 +165 0x3000 //RX_TDDRC_ALPHA_UP_3 +166 0x3000 //RX_TDDRC_ALPHA_UP_4 +184 0x7FB0 //RX_TDDRC_ALPHA_DWN_1 +185 0x7FB0 //RX_TDDRC_ALPHA_DWN_2 +186 0x7FB0 //RX_TDDRC_ALPHA_DWN_3 +189 0x7FB0 //RX_TDDRC_ALPHA_DWN_4 +190 0xDA9E //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +269 0x0000 //RX_TDDRC_THRD_0 +270 0x0000 //RX_TDDRC_THRD_1 +271 0x0E80 //RX_TDDRC_THRD_2 +272 0x3800 //RX_TDDRC_THRD_3 +273 0x2A00 //RX_TDDRC_SLANT_0 +274 0x6E00 //RX_TDDRC_SLANT_1 +275 0x3000 //RX_TDDRC_ALPHA_UP_0 +276 0x7FB0 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x0000 //RX_TDDRC_HMNC_GAIN +279 0x0000 //RX_TDDRC_SMT_FLAG +280 0x0000 //RX_TDDRC_SMT_W +281 0x0100 //RX_TDDRC_DRC_GAIN +195 0x0020 //RX_FDEQ_SUBNUM +196 0x4848 //RX_FDEQ_GAIN_0 +197 0x4848 //RX_FDEQ_GAIN_1 +198 0x4848 //RX_FDEQ_GAIN_2 +199 0x4848 //RX_FDEQ_GAIN_3 +200 0x4848 //RX_FDEQ_GAIN_4 +201 0x4848 //RX_FDEQ_GAIN_5 +202 0x4848 //RX_FDEQ_GAIN_6 +203 0x4848 //RX_FDEQ_GAIN_7 +204 0x4848 //RX_FDEQ_GAIN_8 +205 0x4848 //RX_FDEQ_GAIN_9 +206 0x4848 //RX_FDEQ_GAIN_10 +207 0x4848 //RX_FDEQ_GAIN_11 +208 0x4848 //RX_FDEQ_GAIN_12 +209 0x4848 //RX_FDEQ_GAIN_13 +210 0x4848 //RX_FDEQ_GAIN_14 +211 0x4848 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0000 //RX_FDEQ_BIN_0 +221 0x0000 //RX_FDEQ_BIN_1 +222 0x0000 //RX_FDEQ_BIN_2 +223 0x0000 //RX_FDEQ_BIN_3 +224 0x0000 //RX_FDEQ_BIN_4 +225 0x0000 //RX_FDEQ_BIN_5 +226 0x0000 //RX_FDEQ_BIN_6 +227 0x0000 //RX_FDEQ_BIN_7 +228 0x0000 //RX_FDEQ_BIN_8 +229 0x0000 //RX_FDEQ_BIN_9 +230 0x0000 //RX_FDEQ_BIN_10 +231 0x0000 //RX_FDEQ_BIN_11 +232 0x0000 //RX_FDEQ_BIN_12 +233 0x0000 //RX_FDEQ_BIN_13 +234 0x0000 //RX_FDEQ_BIN_14 +235 0x0000 //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x0000 //RX_FDEQ_RESRV_0 +245 0x0000 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0030 //RX_FDDRC_BAND_MARGIN_1 +248 0x0050 //RX_FDDRC_BAND_MARGIN_2 +249 0x0080 //RX_FDDRC_BAND_MARGIN_3 +250 0x0004 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x5000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x6400 //RX_FDDRC_THRD_3_2 +258 0x6400 //RX_FDDRC_THRD_3_3 +259 0x2000 //RX_FDDRC_SLANT_0_0 +260 0x2000 //RX_FDDRC_SLANT_0_1 +261 0x2000 //RX_FDDRC_SLANT_0_2 +262 0x2000 //RX_FDDRC_SLANT_0_3 +263 0x2000 //RX_FDDRC_SLANT_1_0 +264 0x2000 //RX_FDDRC_SLANT_1_1 +265 0x2000 //RX_FDDRC_SLANT_1_2 +266 0x2000 //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +286 0x0100 //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 +#VOL 5 +163 0x3000 //RX_TDDRC_ALPHA_UP_1 +164 0x3000 //RX_TDDRC_ALPHA_UP_2 +165 0x3000 //RX_TDDRC_ALPHA_UP_3 +166 0x3000 //RX_TDDRC_ALPHA_UP_4 +184 0x7FB0 //RX_TDDRC_ALPHA_DWN_1 +185 0x7FB0 //RX_TDDRC_ALPHA_DWN_2 +186 0x7FB0 //RX_TDDRC_ALPHA_DWN_3 +189 0x7FB0 //RX_TDDRC_ALPHA_DWN_4 +190 0xDA9E //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +269 0x0000 //RX_TDDRC_THRD_0 +270 0x0000 //RX_TDDRC_THRD_1 +271 0x0E80 //RX_TDDRC_THRD_2 +272 0x3800 //RX_TDDRC_THRD_3 +273 0x2A00 //RX_TDDRC_SLANT_0 +274 0x6E00 //RX_TDDRC_SLANT_1 +275 0x3000 //RX_TDDRC_ALPHA_UP_0 +276 0x7FB0 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x0000 //RX_TDDRC_HMNC_GAIN +279 0x0000 //RX_TDDRC_SMT_FLAG +280 0x0000 //RX_TDDRC_SMT_W +281 0x0100 //RX_TDDRC_DRC_GAIN +195 0x0020 //RX_FDEQ_SUBNUM +196 0x4848 //RX_FDEQ_GAIN_0 +197 0x4848 //RX_FDEQ_GAIN_1 +198 0x4848 //RX_FDEQ_GAIN_2 +199 0x4848 //RX_FDEQ_GAIN_3 +200 0x4848 //RX_FDEQ_GAIN_4 +201 0x4848 //RX_FDEQ_GAIN_5 +202 0x4848 //RX_FDEQ_GAIN_6 +203 0x4848 //RX_FDEQ_GAIN_7 +204 0x4848 //RX_FDEQ_GAIN_8 +205 0x4848 //RX_FDEQ_GAIN_9 +206 0x4848 //RX_FDEQ_GAIN_10 +207 0x4848 //RX_FDEQ_GAIN_11 +208 0x4848 //RX_FDEQ_GAIN_12 +209 0x4848 //RX_FDEQ_GAIN_13 +210 0x4848 //RX_FDEQ_GAIN_14 +211 0x4848 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0000 //RX_FDEQ_BIN_0 +221 0x0000 //RX_FDEQ_BIN_1 +222 0x0000 //RX_FDEQ_BIN_2 +223 0x0000 //RX_FDEQ_BIN_3 +224 0x0000 //RX_FDEQ_BIN_4 +225 0x0000 //RX_FDEQ_BIN_5 +226 0x0000 //RX_FDEQ_BIN_6 +227 0x0000 //RX_FDEQ_BIN_7 +228 0x0000 //RX_FDEQ_BIN_8 +229 0x0000 //RX_FDEQ_BIN_9 +230 0x0000 //RX_FDEQ_BIN_10 +231 0x0000 //RX_FDEQ_BIN_11 +232 0x0000 //RX_FDEQ_BIN_12 +233 0x0000 //RX_FDEQ_BIN_13 +234 0x0000 //RX_FDEQ_BIN_14 +235 0x0000 //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x0000 //RX_FDEQ_RESRV_0 +245 0x0000 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0030 //RX_FDDRC_BAND_MARGIN_1 +248 0x0050 //RX_FDDRC_BAND_MARGIN_2 +249 0x0080 //RX_FDDRC_BAND_MARGIN_3 +250 0x0004 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x5000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x6400 //RX_FDDRC_THRD_3_2 +258 0x6400 //RX_FDDRC_THRD_3_3 +259 0x2000 //RX_FDDRC_SLANT_0_0 +260 0x2000 //RX_FDDRC_SLANT_0_1 +261 0x2000 //RX_FDDRC_SLANT_0_2 +262 0x2000 //RX_FDDRC_SLANT_0_3 +263 0x2000 //RX_FDDRC_SLANT_1_0 +264 0x2000 //RX_FDDRC_SLANT_1_1 +265 0x2000 //RX_FDDRC_SLANT_1_2 +266 0x2000 //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +286 0x0100 //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 +#VOL 6 +163 0x3000 //RX_TDDRC_ALPHA_UP_1 +164 0x3000 //RX_TDDRC_ALPHA_UP_2 +165 0x3000 //RX_TDDRC_ALPHA_UP_3 +166 0x3000 //RX_TDDRC_ALPHA_UP_4 +184 0x7FB0 //RX_TDDRC_ALPHA_DWN_1 +185 0x7FB0 //RX_TDDRC_ALPHA_DWN_2 +186 0x7FB0 //RX_TDDRC_ALPHA_DWN_3 +189 0x7FB0 //RX_TDDRC_ALPHA_DWN_4 +190 0xDA9E //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +269 0x0000 //RX_TDDRC_THRD_0 +270 0x0000 //RX_TDDRC_THRD_1 +271 0x0E80 //RX_TDDRC_THRD_2 +272 0x3800 //RX_TDDRC_THRD_3 +273 0x2A00 //RX_TDDRC_SLANT_0 +274 0x6E00 //RX_TDDRC_SLANT_1 +275 0x3000 //RX_TDDRC_ALPHA_UP_0 +276 0x7FB0 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x0000 //RX_TDDRC_HMNC_GAIN +279 0x0000 //RX_TDDRC_SMT_FLAG +280 0x0000 //RX_TDDRC_SMT_W +281 0x0100 //RX_TDDRC_DRC_GAIN +195 0x0020 //RX_FDEQ_SUBNUM +196 0x4848 //RX_FDEQ_GAIN_0 +197 0x4848 //RX_FDEQ_GAIN_1 +198 0x4848 //RX_FDEQ_GAIN_2 +199 0x4848 //RX_FDEQ_GAIN_3 +200 0x4848 //RX_FDEQ_GAIN_4 +201 0x4848 //RX_FDEQ_GAIN_5 +202 0x4848 //RX_FDEQ_GAIN_6 +203 0x4848 //RX_FDEQ_GAIN_7 +204 0x4848 //RX_FDEQ_GAIN_8 +205 0x4848 //RX_FDEQ_GAIN_9 +206 0x4848 //RX_FDEQ_GAIN_10 +207 0x4848 //RX_FDEQ_GAIN_11 +208 0x4848 //RX_FDEQ_GAIN_12 +209 0x4848 //RX_FDEQ_GAIN_13 +210 0x4848 //RX_FDEQ_GAIN_14 +211 0x4848 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0000 //RX_FDEQ_BIN_0 +221 0x0000 //RX_FDEQ_BIN_1 +222 0x0000 //RX_FDEQ_BIN_2 +223 0x0000 //RX_FDEQ_BIN_3 +224 0x0000 //RX_FDEQ_BIN_4 +225 0x0000 //RX_FDEQ_BIN_5 +226 0x0000 //RX_FDEQ_BIN_6 +227 0x0000 //RX_FDEQ_BIN_7 +228 0x0000 //RX_FDEQ_BIN_8 +229 0x0000 //RX_FDEQ_BIN_9 +230 0x0000 //RX_FDEQ_BIN_10 +231 0x0000 //RX_FDEQ_BIN_11 +232 0x0000 //RX_FDEQ_BIN_12 +233 0x0000 //RX_FDEQ_BIN_13 +234 0x0000 //RX_FDEQ_BIN_14 +235 0x0000 //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x0000 //RX_FDEQ_RESRV_0 +245 0x0000 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0030 //RX_FDDRC_BAND_MARGIN_1 +248 0x0050 //RX_FDDRC_BAND_MARGIN_2 +249 0x0080 //RX_FDDRC_BAND_MARGIN_3 +250 0x0004 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x5000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x6400 //RX_FDDRC_THRD_3_2 +258 0x6400 //RX_FDDRC_THRD_3_3 +259 0x2000 //RX_FDDRC_SLANT_0_0 +260 0x2000 //RX_FDDRC_SLANT_0_1 +261 0x2000 //RX_FDDRC_SLANT_0_2 +262 0x2000 //RX_FDDRC_SLANT_0_3 +263 0x2000 //RX_FDDRC_SLANT_1_0 +264 0x2000 //RX_FDDRC_SLANT_1_1 +265 0x2000 //RX_FDDRC_SLANT_1_2 +266 0x2000 //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +286 0x0100 //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 #CASE_NAME HEADSET-TTY_VCO-VOICE_GENERIC-WB -#PARAM_MODE FULL -#PARAM_TYPE TX+RX -#TOTAL_CUSTOM_STEP 7 +#PARAM_MODE Full +#PARAM_TYPE TX+2RX +#TOTAL_CUSTOM_STEP 7+7 #TX 0 0x0001 //TX_OPERATION_MODE_0 1 0x0001 //TX_OPERATION_MODE_1 2 0x0033 //TX_PATCH_REG -3 0x2F7C //TX_SENDFUNC_MODE_0 +3 0x6F7C //TX_SENDFUNC_MODE_0 4 0x0001 //TX_SENDFUNC_MODE_1 -5 0x0003 //TX_NUM_MIC +5 0x0002 //TX_NUM_MIC 6 0x0001 //TX_SAMPLINGFREQ_SIG 7 0x0001 //TX_SAMPLINGFREQ_PROC 8 0x000A //TX_FRAME_SZ_SIG @@ -43879,8 +66779,8 @@ 18 0x0000 //TX_SYS_RESRV_2 19 0x0000 //TX_SYS_RESRV_3 20 0x0000 //TX_DIST2REF0 -21 0x00A4 //TX_DIST2REF1 -22 0x0017 //TX_DIST2REF_02 +21 0x009D //TX_DIST2REF1 +22 0x0010 //TX_DIST2REF_02 23 0x0000 //TX_DIST2REF_03 24 0x0000 //TX_DIST2REF_04 25 0x0000 //TX_DIST2REF_05 @@ -43971,8 +66871,8 @@ 110 0x0000 //TX_ADCS_MASK 111 0x04D0 //TX_ADCS_GAIN 112 0x4000 //TX_NFC_GAINFAC -113 0x0000 //TX_MAINMIC_BLKFACTOR -114 0x0000 //TX_REFMIC_BLKFACTOR +113 0x0004 //TX_MAINMIC_BLKFACTOR +114 0x0004 //TX_REFMIC_BLKFACTOR 115 0x0000 //TX_BLMIC_BLKFACTOR 116 0x0000 //TX_BRMIC_BLKFACTOR 117 0x0031 //TX_MICBLK_START_BIN @@ -44010,7 +66910,7 @@ 149 0x0800 //TX_AEC_REF_GAIN_2 150 0x6800 //TX_EAD_THR 151 0x1000 //TX_THR_RE_EST -152 0x0200 //TX_MIN_EQ_RE_EST_0 +152 0x3000 //TX_MIN_EQ_RE_EST_0 153 0x0100 //TX_MIN_EQ_RE_EST_1 154 0x0200 //TX_MIN_EQ_RE_EST_2 155 0x0200 //TX_MIN_EQ_RE_EST_3 @@ -44023,13 +66923,13 @@ 162 0x1000 //TX_MIN_EQ_RE_EST_10 163 0x1000 //TX_MIN_EQ_RE_EST_11 164 0x1000 //TX_MIN_EQ_RE_EST_12 -165 0x4000 //TX_LAMBDA_RE_EST +165 0x1B00 //TX_LAMBDA_RE_EST 166 0x4000 //TX_LAMBDA_CB_NLE 167 0x7FFF //TX_C_POST_FLT 168 0x5000 //TX_GAIN_NP 169 0x0180 //TX_SE_HOLD_N 170 0x00C8 //TX_DT_HOLD_N -171 0x05DC //TX_DT2_HOLD_N +171 0x0020 //TX_DT2_HOLD_N 172 0x6666 //TX_AEC_RESRV_0 173 0x0000 //TX_AEC_RESRV_1 174 0x0014 //TX_AEC_RESRV_2 @@ -44055,15 +66955,15 @@ 194 0x0000 //TX_NORMENERTH 195 0x0000 //TX_NORMENERHIGHTH 196 0x0000 //TX_NORMENERHIGHTHL -197 0x6590 //TX_DTD_THR1_0 -198 0x6590 //TX_DTD_THR1_1 -199 0x6590 //TX_DTD_THR1_2 +197 0x76D0 //TX_DTD_THR1_0 +198 0x76D0 //TX_DTD_THR1_1 +199 0x76D0 //TX_DTD_THR1_2 200 0x7FF0 //TX_DTD_THR1_3 201 0x7FF0 //TX_DTD_THR1_4 202 0x7FF0 //TX_DTD_THR1_5 203 0x7FF0 //TX_DTD_THR1_6 -204 0x5000 //TX_DTD_THR2_0 -205 0x5000 //TX_DTD_THR2_1 +204 0x7E00 //TX_DTD_THR2_0 +205 0x7E00 //TX_DTD_THR2_1 206 0x5000 //TX_DTD_THR2_2 207 0x5000 //TX_DTD_THR2_3 208 0x5000 //TX_DTD_THR2_4 @@ -44071,8 +66971,8 @@ 210 0x5000 //TX_DTD_THR2_6 211 0x7FFF //TX_DTD_THR3 212 0x0000 //TX_SPK_CUT_K -213 0x07D0 //TX_DT_CUT_K -214 0x0100 //TX_DT_CUT_THR +213 0x03E8 //TX_DT_CUT_K +214 0x0010 //TX_DT_CUT_THR 215 0x04EB //TX_COMFORT_G 216 0x01F4 //TX_POWER_YOUT_TH 217 0x4000 //TX_FDPFGAINECHO @@ -44083,16 +66983,16 @@ 222 0x023E //TX_ADPT_STRICT_H 223 0x0BB8 //TX_RATIO_DT_L_TH_LOW 224 0x3A98 //TX_RATIO_DT_H_TH_LOW -225 0x1770 //TX_RATIO_DT_L_TH_HIGH -226 0x4E20 //TX_RATIO_DT_H_TH_HIGH -227 0x09C4 //TX_RATIO_DT_L0_TH -228 0x2000 //TX_B_POST_FILT_ECHO_L +225 0x044C //TX_RATIO_DT_L_TH_HIGH +226 0x7800 //TX_RATIO_DT_H_TH_HIGH +227 0x0001 //TX_RATIO_DT_L0_TH +228 0x7FFF //TX_B_POST_FILT_ECHO_L 229 0x7FFF //TX_B_POST_FILT_ECHO_H 230 0x0200 //TX_MIN_G_CTRL_ECHO 231 0x1000 //TX_B_LESSCUT_RTO_ECHO 232 0x0000 //TX_EPD_OFFSET_00 233 0x0000 //TX_EPD_OFFST_01 -234 0x1388 //TX_RATIO_DT_L0_TH_HIGH +234 0x03E8 //TX_RATIO_DT_L0_TH_HIGH 235 0x7FFF //TX_RATIO_DT_H_TH_CUT 236 0x7FFF //TX_MIN_EQ_RE_EST_13 237 0x0000 //TX_DTD_THR1_7 @@ -44100,7 +67000,7 @@ 239 0x0800 //TX_DT_RESRV_7 240 0x0800 //TX_DT_RESRV_8 241 0x0000 //TX_DT_RESRV_9 -242 0xF800 //TX_THR_SN_EST_0 +242 0xFA00 //TX_THR_SN_EST_0 243 0xFA00 //TX_THR_SN_EST_1 244 0xFA00 //TX_THR_SN_EST_2 245 0xFB00 //TX_THR_SN_EST_3 @@ -44109,11 +67009,11 @@ 248 0xF800 //TX_THR_SN_EST_6 249 0xF800 //TX_THR_SN_EST_7 250 0x0100 //TX_DELTA_THR_SN_EST_0 -251 0x0200 //TX_DELTA_THR_SN_EST_1 -252 0x0100 //TX_DELTA_THR_SN_EST_2 -253 0x0200 //TX_DELTA_THR_SN_EST_3 +251 0x0100 //TX_DELTA_THR_SN_EST_1 +252 0x0200 //TX_DELTA_THR_SN_EST_2 +253 0x0100 //TX_DELTA_THR_SN_EST_3 254 0x0100 //TX_DELTA_THR_SN_EST_4 -255 0x0100 //TX_DELTA_THR_SN_EST_5 +255 0x0200 //TX_DELTA_THR_SN_EST_5 256 0x0200 //TX_DELTA_THR_SN_EST_6 257 0x0200 //TX_DELTA_THR_SN_EST_7 258 0x4000 //TX_LAMBDA_NN_EST_0 @@ -44141,11 +67041,11 @@ 280 0x1000 //TX_B_POST_FLT_1 281 0x0010 //TX_NS_LVL_CTRL_0 282 0x0014 //TX_NS_LVL_CTRL_1 -283 0x0014 //TX_NS_LVL_CTRL_2 -284 0x0018 //TX_NS_LVL_CTRL_3 -285 0x0016 //TX_NS_LVL_CTRL_4 -286 0x0014 //TX_NS_LVL_CTRL_5 -287 0x0011 //TX_NS_LVL_CTRL_6 +283 0x0018 //TX_NS_LVL_CTRL_2 +284 0x0016 //TX_NS_LVL_CTRL_3 +285 0x0014 //TX_NS_LVL_CTRL_4 +286 0x0011 //TX_NS_LVL_CTRL_5 +287 0x0014 //TX_NS_LVL_CTRL_6 288 0x0011 //TX_NS_LVL_CTRL_7 289 0x000F //TX_MIN_GAIN_S_0 290 0x0010 //TX_MIN_GAIN_S_1 @@ -44163,8 +67063,8 @@ 302 0x4000 //TX_SNRI_SUP_2 303 0x4000 //TX_SNRI_SUP_3 304 0x4000 //TX_SNRI_SUP_4 -305 0x4000 //TX_SNRI_SUP_5 -306 0x50C0 //TX_SNRI_SUP_6 +305 0x50C0 //TX_SNRI_SUP_5 +306 0x4000 //TX_SNRI_SUP_6 307 0x7FFF //TX_SNRI_SUP_7 308 0x7FFF //TX_THR_LFNS 309 0x0018 //TX_G_LFNS @@ -44173,19 +67073,19 @@ 312 0x7FFF //TX_A_POST_FILT_0 313 0x2000 //TX_A_POST_FILT_1 314 0x5000 //TX_A_POST_FILT_S_0 -315 0x6000 //TX_A_POST_FILT_S_1 -316 0x4C00 //TX_A_POST_FILT_S_2 -317 0x4000 //TX_A_POST_FILT_S_3 -318 0x6000 //TX_A_POST_FILT_S_4 -319 0x4000 //TX_A_POST_FILT_S_5 -320 0x5000 //TX_A_POST_FILT_S_6 +315 0x4C00 //TX_A_POST_FILT_S_1 +316 0x4000 //TX_A_POST_FILT_S_2 +317 0x6000 //TX_A_POST_FILT_S_3 +318 0x4000 //TX_A_POST_FILT_S_4 +319 0x5000 //TX_A_POST_FILT_S_5 +320 0x6000 //TX_A_POST_FILT_S_6 321 0x7000 //TX_A_POST_FILT_S_7 322 0x2000 //TX_B_POST_FILT_0 -323 0x1000 //TX_B_POST_FILT_1 +323 0x2000 //TX_B_POST_FILT_1 324 0x2000 //TX_B_POST_FILT_2 -325 0x2000 //TX_B_POST_FILT_3 +325 0x4000 //TX_B_POST_FILT_3 326 0x4000 //TX_B_POST_FILT_4 -327 0x4000 //TX_B_POST_FILT_5 +327 0x1000 //TX_B_POST_FILT_5 328 0x1000 //TX_B_POST_FILT_6 329 0x2000 //TX_B_POST_FILT_7 330 0x4000 //TX_B_LESSCUT_RTO_S_0 @@ -44193,14 +67093,14 @@ 332 0x7FFF //TX_B_LESSCUT_RTO_S_2 333 0x7FFF //TX_B_LESSCUT_RTO_S_3 334 0x7FFF //TX_B_LESSCUT_RTO_S_4 -335 0x7FFF //TX_B_LESSCUT_RTO_S_5 -336 0x6000 //TX_B_LESSCUT_RTO_S_6 +335 0x6000 //TX_B_LESSCUT_RTO_S_5 +336 0x7FFF //TX_B_LESSCUT_RTO_S_6 337 0x7FFF //TX_B_LESSCUT_RTO_S_7 338 0x7C00 //TX_LAMBDA_PFILT 339 0x7C00 //TX_LAMBDA_PFILT_S_0 340 0x7C00 //TX_LAMBDA_PFILT_S_1 -341 0x7C00 //TX_LAMBDA_PFILT_S_2 -342 0x7A00 //TX_LAMBDA_PFILT_S_3 +341 0x7A00 //TX_LAMBDA_PFILT_S_2 +342 0x7C00 //TX_LAMBDA_PFILT_S_3 343 0x7C00 //TX_LAMBDA_PFILT_S_4 344 0x7C00 //TX_LAMBDA_PFILT_S_5 345 0x7C00 //TX_LAMBDA_PFILT_S_6 @@ -44211,10 +67111,10 @@ 350 0x0600 //TX_A_PEPPER_HF 351 0x0001 //TX_HMNC_BST_FLG 352 0x0200 //TX_HMNC_BST_THR -353 0x0200 //TX_DT_BINVAD_TH_0 -354 0x0200 //TX_DT_BINVAD_TH_1 -355 0x0200 //TX_DT_BINVAD_TH_2 -356 0x0200 //TX_DT_BINVAD_TH_3 +353 0x0800 //TX_DT_BINVAD_TH_0 +354 0x0800 //TX_DT_BINVAD_TH_1 +355 0x0800 //TX_DT_BINVAD_TH_2 +356 0x0800 //TX_DT_BINVAD_TH_3 357 0x1D4C //TX_DT_BINVAD_ENDF 358 0x0800 //TX_C_POST_FLT_DT 359 0x0CCD //TX_NS_B_POST_FLT_LESSCUT @@ -44225,7 +67125,7 @@ 364 0x0000 //TX_K_APT 365 0x0001 //TX_NOISEDET 366 0x0064 //TX_NDETCT -367 0x0032 //TX_NOISE_TH_0 +367 0x0102 //TX_NOISE_TH_0 368 0x7FFF //TX_NOISE_TH_0_2 369 0x7FFF //TX_NOISE_TH_0_3 370 0x017E //TX_NOISE_TH_1 @@ -44237,11 +67137,11 @@ 376 0x0001 //TX_NOISE_TH_5_3 377 0x7FFF //TX_NOISE_TH_5_4 378 0x0F0A //TX_NOISE_TH_6 -379 0x0033 //TX_MINENOISE_TH -380 0x4000 //TX_MINENOISE_MIC0_TH_MTS -381 0xFFEE //TX_MINENOISE_MIC0_TH_EXP -382 0x6000 //TX_MINENOISE_MIC0_S_TH_MTS -383 0xFFF3 //TX_MINENOISE_MIC0_S_TH_EXP +379 0x00F8 //TX_MINENOISE_TH +380 0xD508 //TX_MORENS_TFMASK_TH +381 0x0001 //TX_DRC_QUIET_FLOOR +382 0x3A98 //TX_RATIODTL_CUT_TH +383 0x0DAC //TX_DT_CUT_K1 384 0x0666 //TX_OUT_ENER_S_TH_CLEAN 385 0x0666 //TX_OUT_ENER_S_TH_LESSCLEAN 386 0x0333 //TX_OUT_ENER_S_TH_NOISY @@ -44249,22 +67149,22 @@ 388 0x0333 //TX_OUT_ENER_TH_SPEECH 389 0x2000 //TX_SN_NPB_GAIN 390 0x0000 //TX_NN_NPB_GAIN -391 0x0000 //TX_CSX_ALPHA_0 -392 0x0000 //TX_CSX_ALPHA_1 -393 0x0000 //TX_CSX_ALPHA_2 -394 0x0000 //TX_CSX_ALPHA_3 -395 0x0800 //TX_MU_ARSP_EST -396 0x00C8 //TX_P_OUTBEAM_MIN_TH +391 0x7FFF //TX_POST_MASK_SUP_HSNE +392 0x1388 //TX_TAIL_DET_TH +393 0x4000 //TX_B_LESSCUT_RTO_WTA +394 0x0000 //TX_MEL_G_R +395 0x0080 //TX_SUPHIGH_TH +396 0x0000 //TX_MASK_G_R 397 0x0002 //TX_EXTRA_NS_L -398 0x0800 //TX_EXTRA_NS_A -399 0x0005 //TX_VR_NOISE_FLOOR_TH +398 0x1800 //TX_C_POST_FLT_MASK +399 0x7FFF //TX_A_POST_FLT_WNS 400 0x0148 //TX_MIN_G_LOW300HZ -401 0x0001 //TX_MAXLEVEL_CNG +401 0x0004 //TX_MAXLEVEL_CNG 402 0x00B4 //TX_STN_NOISE_TH 403 0x4000 //TX_POST_MASK_SUP 404 0x7FFF //TX_POST_MASK_ADJUST 405 0x00C8 //TX_NS_ENOISE_MIC0_TH -406 0x0033 //TX_MINENOISE_MIC0_TH +406 0x00DC //TX_MINENOISE_MIC0_TH 407 0x012C //TX_MINENOISE_MIC0_S_TH 408 0x7FFF //TX_MIN_G_CTRL_SSNS 409 0x0000 //TX_METAL_RTO_THR @@ -44372,16 +67272,16 @@ 511 0x6666 //TX_MIC_TO_BFGAIN 512 0x0000 //TX_MICTOBFGAIN0 513 0x0000 //TX_FASTMUE_TH -514 0x0000 //TX_DERVB_LEN_0 -515 0x0000 //TX_DERVB_LEN_1 -516 0x0000 //TX_RHO_DERVB -517 0x0000 //TX_MIC_INDX_DERVB -518 0x0000 //TX_MU_DERVB -519 0x0000 //TX_DR_RESRV_0 -520 0x0000 //TX_DR_RESRV_1 -521 0x0000 //TX_DR_RESRV_2 -522 0x0000 //TX_DR_RESRV_3 -523 0x0000 //TX_DR_RESRV_4 +514 0xC000 //TX_DEREVERB_LF_MU +515 0xC000 //TX_DEREVERB_HF_MU +516 0xCCCC //TX_DEREVERB_DELAY +517 0xD999 //TX_DEREVERB_COEF_LEN +518 0x1F40 //TX_DEREVERB_DNR +519 0x0000 //TX_DEREVERB_ALPHA +520 0x0000 //TX_DEREVERB_BETA +521 0x0000 //TX_GSC_RTOL_TH +522 0x7000 //TX_GSC_RTOH_TH +523 0x0064 //TX_WIDE2_MEANHTH 524 0x0000 //TX_DR_RESRV_5 525 0x0000 //TX_DR_RESRV_6 526 0x0000 //TX_DR_RESRV_7 @@ -44424,19 +67324,19 @@ 563 0x0000 //TX_SAM_MARK 564 0x0000 //TX_PB_RESRV_0 565 0x0000 //TX_PB_RESRV_1 -566 0x001C //TX_FDEQ_SUBNUM -567 0x5050 //TX_FDEQ_GAIN_0 -568 0x5048 //TX_FDEQ_GAIN_1 +566 0x0020 //TX_FDEQ_SUBNUM +567 0x5454 //TX_FDEQ_GAIN_0 +568 0x5448 //TX_FDEQ_GAIN_1 569 0x4848 //TX_FDEQ_GAIN_2 570 0x4848 //TX_FDEQ_GAIN_3 571 0x4848 //TX_FDEQ_GAIN_4 572 0x4850 //TX_FDEQ_GAIN_5 573 0x5050 //TX_FDEQ_GAIN_6 -574 0x5048 //TX_FDEQ_GAIN_7 -575 0x4848 //TX_FDEQ_GAIN_8 -576 0x4844 //TX_FDEQ_GAIN_9 -577 0x3C36 //TX_FDEQ_GAIN_10 -578 0x3A3A //TX_FDEQ_GAIN_11 +574 0x5448 //TX_FDEQ_GAIN_7 +575 0x464C //TX_FDEQ_GAIN_8 +576 0x5050 //TX_FDEQ_GAIN_9 +577 0x4848 //TX_FDEQ_GAIN_10 +578 0x4848 //TX_FDEQ_GAIN_11 579 0x4848 //TX_FDEQ_GAIN_12 580 0x4848 //TX_FDEQ_GAIN_13 581 0x4848 //TX_FDEQ_GAIN_14 @@ -44459,10 +67359,10 @@ 598 0x090A //TX_FDEQ_BIN_7 599 0x0B0C //TX_FDEQ_BIN_8 600 0x0D0E //TX_FDEQ_BIN_9 -601 0x0E0F //TX_FDEQ_BIN_10 -602 0x0F10 //TX_FDEQ_BIN_11 -603 0x1011 //TX_FDEQ_BIN_12 -604 0x1104 //TX_FDEQ_BIN_13 +601 0x0F10 //TX_FDEQ_BIN_10 +602 0x1011 //TX_FDEQ_BIN_11 +603 0x1112 //TX_FDEQ_BIN_12 +604 0x120B //TX_FDEQ_BIN_13 605 0x0000 //TX_FDEQ_BIN_14 606 0x0000 //TX_FDEQ_BIN_15 607 0x0000 //TX_FDEQ_BIN_16 @@ -44482,13 +67382,13 @@ 621 0x4848 //TX_PREEQ_GAIN_MIC0_4 622 0x4848 //TX_PREEQ_GAIN_MIC0_5 623 0x4848 //TX_PREEQ_GAIN_MIC0_6 -624 0x484A //TX_PREEQ_GAIN_MIC0_7 -625 0x4C4E //TX_PREEQ_GAIN_MIC0_8 -626 0x5054 //TX_PREEQ_GAIN_MIC0_9 -627 0x5658 //TX_PREEQ_GAIN_MIC0_10 -628 0x5C5C //TX_PREEQ_GAIN_MIC0_11 -629 0x5E64 //TX_PREEQ_GAIN_MIC0_12 -630 0x6464 //TX_PREEQ_GAIN_MIC0_13 +624 0x4848 //TX_PREEQ_GAIN_MIC0_7 +625 0x484A //TX_PREEQ_GAIN_MIC0_8 +626 0x4B4C //TX_PREEQ_GAIN_MIC0_9 +627 0x4B4A //TX_PREEQ_GAIN_MIC0_10 +628 0x4A48 //TX_PREEQ_GAIN_MIC0_11 +629 0x4C4C //TX_PREEQ_GAIN_MIC0_12 +630 0x4C4C //TX_PREEQ_GAIN_MIC0_13 631 0x4848 //TX_PREEQ_GAIN_MIC0_14 632 0x4848 //TX_PREEQ_GAIN_MIC0_15 633 0x4848 //TX_PREEQ_GAIN_MIC0_16 @@ -44511,8 +67411,8 @@ 650 0x0D0E //TX_PREEQ_BIN_MIC0_9 651 0x0F10 //TX_PREEQ_BIN_MIC0_10 652 0x1011 //TX_PREEQ_BIN_MIC0_11 -653 0x1104 //TX_PREEQ_BIN_MIC0_12 -654 0x1010 //TX_PREEQ_BIN_MIC0_13 +653 0x1112 //TX_PREEQ_BIN_MIC0_12 +654 0x120B //TX_PREEQ_BIN_MIC0_13 655 0x0000 //TX_PREEQ_BIN_MIC0_14 656 0x0000 //TX_PREEQ_BIN_MIC0_15 657 0x0000 //TX_PREEQ_BIN_MIC0_16 @@ -44531,12 +67431,12 @@ 670 0x4848 //TX_PREEQ_GAIN_MIC1_4 671 0x4848 //TX_PREEQ_GAIN_MIC1_5 672 0x4848 //TX_PREEQ_GAIN_MIC1_6 -673 0x4848 //TX_PREEQ_GAIN_MIC1_7 -674 0x4848 //TX_PREEQ_GAIN_MIC1_8 -675 0x4848 //TX_PREEQ_GAIN_MIC1_9 -676 0x4848 //TX_PREEQ_GAIN_MIC1_10 -677 0x4848 //TX_PREEQ_GAIN_MIC1_11 -678 0x4848 //TX_PREEQ_GAIN_MIC1_12 +673 0x4846 //TX_PREEQ_GAIN_MIC1_7 +674 0x4544 //TX_PREEQ_GAIN_MIC1_8 +675 0x4241 //TX_PREEQ_GAIN_MIC1_9 +676 0x403E //TX_PREEQ_GAIN_MIC1_10 +677 0x3D3C //TX_PREEQ_GAIN_MIC1_11 +678 0x3C3C //TX_PREEQ_GAIN_MIC1_12 679 0x4848 //TX_PREEQ_GAIN_MIC1_13 680 0x4848 //TX_PREEQ_GAIN_MIC1_14 681 0x4848 //TX_PREEQ_GAIN_MIC1_15 @@ -44548,19 +67448,19 @@ 687 0x4848 //TX_PREEQ_GAIN_MIC1_21 688 0x4848 //TX_PREEQ_GAIN_MIC1_22 689 0x4848 //TX_PREEQ_GAIN_MIC1_23 -690 0x251A //TX_PREEQ_BIN_MIC1_0 -691 0x0F0F //TX_PREEQ_BIN_MIC1_1 -692 0x0C0C //TX_PREEQ_BIN_MIC1_2 -693 0x0C0F //TX_PREEQ_BIN_MIC1_3 -694 0x0F0F //TX_PREEQ_BIN_MIC1_4 -695 0x0F09 //TX_PREEQ_BIN_MIC1_5 -696 0x0909 //TX_PREEQ_BIN_MIC1_6 -697 0x0908 //TX_PREEQ_BIN_MIC1_7 -698 0x0700 //TX_PREEQ_BIN_MIC1_8 -699 0x0000 //TX_PREEQ_BIN_MIC1_9 -700 0x0000 //TX_PREEQ_BIN_MIC1_10 -701 0x0000 //TX_PREEQ_BIN_MIC1_11 -702 0x0000 //TX_PREEQ_BIN_MIC1_12 +690 0x0202 //TX_PREEQ_BIN_MIC1_0 +691 0x0203 //TX_PREEQ_BIN_MIC1_1 +692 0x0303 //TX_PREEQ_BIN_MIC1_2 +693 0x0304 //TX_PREEQ_BIN_MIC1_3 +694 0x0405 //TX_PREEQ_BIN_MIC1_4 +695 0x0506 //TX_PREEQ_BIN_MIC1_5 +696 0x0708 //TX_PREEQ_BIN_MIC1_6 +697 0x090A //TX_PREEQ_BIN_MIC1_7 +698 0x0B0C //TX_PREEQ_BIN_MIC1_8 +699 0x0F10 //TX_PREEQ_BIN_MIC1_9 +700 0x1011 //TX_PREEQ_BIN_MIC1_10 +701 0x1112 //TX_PREEQ_BIN_MIC1_11 +702 0x1208 //TX_PREEQ_BIN_MIC1_12 703 0x0000 //TX_PREEQ_BIN_MIC1_13 704 0x0000 //TX_PREEQ_BIN_MIC1_14 705 0x0000 //TX_PREEQ_BIN_MIC1_15 @@ -44649,7 +67549,7 @@ 788 0x7EB8 //TX_TDDRC_ALPHA_DWN_02 789 0x7EB8 //TX_TDDRC_ALPHA_DWN_03 790 0x7EB8 //TX_TDDRC_ALPHA_DWN_04 -791 0x7FFF //TX_TDDRC_TD_DRC_LIMIT +791 0x7214 //TX_TDDRC_TD_DRC_LIMIT 792 0x0800 //TX_TDDRC_POST_LIMIT_GAIN 793 0x0000 //TX_TDDRC_RESRV_0 794 0x0000 //TX_TDDRC_RESRV_1 @@ -44716,15 +67616,15 @@ 855 0x0002 //TX_TDDRC_THRD_1 856 0x1800 //TX_TDDRC_THRD_2 857 0x1800 //TX_TDDRC_THRD_3 -858 0x6000 //TX_TDDRC_SLANT_0 -859 0x6000 //TX_TDDRC_SLANT_1 +858 0x7FFF //TX_TDDRC_SLANT_0 +859 0x7FFF //TX_TDDRC_SLANT_1 860 0x0800 //TX_TDDRC_ALPHA_UP_00 861 0x7EB8 //TX_TDDRC_ALPHA_DWN_00 862 0x0000 //TX_TDDRC_HMNC_FLAG 863 0x199A //TX_TDDRC_HMNC_GAIN 864 0x0000 //TX_TDDRC_SMT_FLAG 865 0x0CCD //TX_TDDRC_SMT_W -866 0x0BE3 //TX_TDDRC_DRC_GAIN +866 0x0C97 //TX_TDDRC_DRC_GAIN 867 0x7FFF //TX_TDDRC_LMT_THRD 868 0x0000 //TX_TDDRC_LMT_ALPHA 869 0x0000 //TX_TFMASKLTH @@ -44749,14 +67649,79 @@ 888 0x0028 //TX_FASTNS_ARSPC_TH 889 0xC000 //TX_FASTNS_MASK5_TH 890 0x4848 //TX_POSTSSA_MIN_G_VR_MASK -891 0x1000 //TX_A_LESSCUT_RTO_MASK +891 0x4000 //TX_A_LESSCUT_RTO_MASK 892 0x1770 //TX_FASTNS_NOISETH 893 0xC000 //TX_FASTNS_SSA_THLFL 894 0xC000 //TX_FASTNS_SSA_THHFL 895 0xCCCC //TX_FASTNS_SSA_THLFH 896 0xD999 //TX_FASTNS_SSA_THHFH +897 0x2339 //TX_SENDFUNC_REG_MICMUTE +898 0x0021 //TX_SENDFUNC_REG_MICMUTE1 +899 0x02BC //TX_MICMUTE_RATIO_THR +900 0x0140 //TX_MICMUTE_AMP_THR +901 0x0004 //TX_MICMUTE_HPF_IND +902 0x00C0 //TX_MICMUTE_LOG_EYR_TH +903 0x0008 //TX_MICMUTE_CVG_TIME +904 0x0008 //TX_MICMUTE_RELEASE_TIME +905 0x01FE //TX_MIC_VOLUME_MIC0MUTE +906 0x0020 //TX_MICMUTE_EPD_OFFSET_0 +907 0x001E //TX_MICMUTE_FRQ_AEC_L +908 0x7999 //TX_MICMUTE_EAD_THR +909 0x7FFF //TX_MICMUTE_LAMBDA_CB_NLE +910 0x7FFF //TX_MICMUTE_LAMBDA_RE_EST +911 0x4000 //TX_DTD_THR1_MICMUTE_0 +912 0x7000 //TX_DTD_THR1_MICMUTE_1 +913 0x7FFF //TX_DTD_THR1_MICMUTE_2 +914 0x7FFF //TX_DTD_THR1_MICMUTE_3 +915 0x6CCC //TX_DTD_THR2_MICMUTE_0 +916 0x0400 //TX_MICMUTE_MIN_EQ_RE_EST_0 +917 0x0400 //TX_MICMUTE_MIN_EQ_RE_EST_1 +918 0x1000 //TX_MICMUTE_MIN_EQ_RE_EST_2 +919 0x7FFF //TX_MICMUTE_MIN_EQ_RE_EST_3 +920 0x7FFF //TX_MICMUTE_MIN_EQ_RE_EST_4 +921 0x4000 //TX_MICMUTE_C_POST_FLT +922 0x03E8 //TX_MICMUTE_DT_CUT_K +923 0x0001 //TX_MICMUTE_DT_CUT_THR +924 0x03E8 //TX_MICMUTE_DT_CUT_K2 +925 0x0001 //TX_MICMUTE_DT_CUT_THR2 +926 0x0064 //TX_MICMUTE_DT2_HOLD_N +927 0x1000 //TX_MICMUTE_RATIODTH_THCUT +928 0x1000 //TX_MICMUTE_B_POST_FLT_ECHOL +929 0x7FFF //TX_MICMUTE_B_POST_FLT_ECHOH +930 0x0400 //TX_MICMUTE_C_POST_FLT_MASK +931 0x7999 //TX_MICMUTE_RATIODTL_CUT_TH +932 0x0258 //TX_MICMUTE_DT_CUT_K1 +933 0x0800 //TX_MICMUTE_N2_SN_EST +934 0xFC00 //TX_MICMUTE_THR_SN_EST_0 +935 0x001C //TX_MICMUTE_MIN_G_CTRL_0 +936 0x6000 //TX_MICMUTE_A_POST_FILT_S_0 +937 0x7000 //TX_MICMUTE_B_POST_FILT_0 +938 0x2710 //TX_MIC1RUB_AMP_THR +939 0x0010 //TX_MIC1MUTE_RATIO_THR +940 0x0450 //TX_MIC1MUTE_AMP_THR +941 0x0008 //TX_MIC1MUTE_CVG_TIME +942 0x0008 //TX_MIC1MUTE_RELEASE_TIME +943 0x0000 //TX_AMS_RESRV_01 +944 0x0000 //TX_AMS_RESRV_02 +945 0x0000 //TX_AMS_RESRV_03 +946 0x0000 //TX_AMS_RESRV_04 +947 0x0000 //TX_AMS_RESRV_05 +948 0x0000 //TX_AMS_RESRV_06 +949 0x0000 //TX_AMS_RESRV_07 +950 0x0000 //TX_AMS_RESRV_08 +951 0x0000 //TX_AMS_RESRV_09 +952 0x0000 //TX_AMS_RESRV_10 +953 0x0000 //TX_AMS_RESRV_11 +954 0x0000 //TX_AMS_RESRV_12 +955 0x0000 //TX_AMS_RESRV_13 +956 0x0000 //TX_AMS_RESRV_14 +957 0x0000 //TX_AMS_RESRV_15 +958 0x0000 //TX_AMS_RESRV_16 +959 0x0000 //TX_AMS_RESRV_17 +960 0x0000 //TX_AMS_RESRV_18 +961 0x0000 //TX_AMS_RESRV_19 #RX -0 0x0040 //RX_RECVFUNC_MODE_0 +0 0x2040 //RX_RECVFUNC_MODE_0 1 0x0000 //RX_RECVFUNC_MODE_1 2 0x0000 //RX_SAMPLINGFREQ_SIG 3 0x0000 //RX_SAMPLINGFREQ_PROC @@ -45606,18 +68571,869 @@ 110 0x0000 //RX_FDDRC_RESRV_0 129 0x0100 //RX_SPK_VOL 130 0x0000 //RX_VOL_RESRV_0 +#RX 2 +157 0x2040 //RX_RECVFUNC_MODE_0 +158 0x0000 //RX_RECVFUNC_MODE_1 +159 0x0000 //RX_SAMPLINGFREQ_SIG +160 0x0000 //RX_SAMPLINGFREQ_PROC +161 0x000A //RX_FRAME_SZ +162 0x0000 //RX_DELAY_OPT +163 0x3000 //RX_TDDRC_ALPHA_UP_1 +164 0x3000 //RX_TDDRC_ALPHA_UP_2 +165 0x3000 //RX_TDDRC_ALPHA_UP_3 +166 0x3000 //RX_TDDRC_ALPHA_UP_4 +167 0x050D //RX_PGA +168 0x7652 //RX_A_HP +169 0x4000 //RX_B_PE +170 0x7800 //RX_THR_PITCH_DET_0 +171 0x7000 //RX_THR_PITCH_DET_1 +172 0x6000 //RX_THR_PITCH_DET_2 +173 0x0000 //RX_PITCH_BFR_LEN +174 0x0000 //RX_SBD_PITCH_DET +175 0x0000 //RX_PP_RESRV_0 +176 0x0000 //RX_PP_RESRV_1 +177 0xF800 //RX_N_SN_EST +178 0x0000 //RX_N2_SN_EST +179 0x000F //RX_NS_LVL_CTRL +180 0xF800 //RX_THR_SN_EST +181 0x7E00 //RX_LAMBDA_PFILT +182 0x000A //RX_FENS_RESRV_0 +183 0x0000 //RX_FENS_RESRV_1 +184 0x7FB0 //RX_TDDRC_ALPHA_DWN_1 +185 0x7FB0 //RX_TDDRC_ALPHA_DWN_2 +186 0x7FB0 //RX_TDDRC_ALPHA_DWN_3 +187 0x0000 //RX_EXTRA_NS_L +188 0x0000 //RX_EXTRA_NS_A +189 0x7FB0 //RX_TDDRC_ALPHA_DWN_4 +190 0xDA9E //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +192 0x0000 //RX_A_POST_FLT +193 0x0000 //RX_LMT_THRD +194 0x4000 //RX_LMT_ALPHA +195 0x0020 //RX_FDEQ_SUBNUM +196 0x4848 //RX_FDEQ_GAIN_0 +197 0x4848 //RX_FDEQ_GAIN_1 +198 0x4848 //RX_FDEQ_GAIN_2 +199 0x4848 //RX_FDEQ_GAIN_3 +200 0x4848 //RX_FDEQ_GAIN_4 +201 0x4848 //RX_FDEQ_GAIN_5 +202 0x4848 //RX_FDEQ_GAIN_6 +203 0x4848 //RX_FDEQ_GAIN_7 +204 0x4848 //RX_FDEQ_GAIN_8 +205 0x4848 //RX_FDEQ_GAIN_9 +206 0x4848 //RX_FDEQ_GAIN_10 +207 0x4848 //RX_FDEQ_GAIN_11 +208 0x4848 //RX_FDEQ_GAIN_12 +209 0x4848 //RX_FDEQ_GAIN_13 +210 0x4848 //RX_FDEQ_GAIN_14 +211 0x4848 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0000 //RX_FDEQ_BIN_0 +221 0x0000 //RX_FDEQ_BIN_1 +222 0x0000 //RX_FDEQ_BIN_2 +223 0x0000 //RX_FDEQ_BIN_3 +224 0x0000 //RX_FDEQ_BIN_4 +225 0x0000 //RX_FDEQ_BIN_5 +226 0x0000 //RX_FDEQ_BIN_6 +227 0x0000 //RX_FDEQ_BIN_7 +228 0x0000 //RX_FDEQ_BIN_8 +229 0x0000 //RX_FDEQ_BIN_9 +230 0x0000 //RX_FDEQ_BIN_10 +231 0x0000 //RX_FDEQ_BIN_11 +232 0x0000 //RX_FDEQ_BIN_12 +233 0x0000 //RX_FDEQ_BIN_13 +234 0x0000 //RX_FDEQ_BIN_14 +235 0x0000 //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x0000 //RX_FDEQ_RESRV_0 +245 0x0000 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0030 //RX_FDDRC_BAND_MARGIN_1 +248 0x0050 //RX_FDDRC_BAND_MARGIN_2 +249 0x0080 //RX_FDDRC_BAND_MARGIN_3 +250 0x0004 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x5000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x6400 //RX_FDDRC_THRD_3_2 +258 0x6400 //RX_FDDRC_THRD_3_3 +259 0x2000 //RX_FDDRC_SLANT_0_0 +260 0x2000 //RX_FDDRC_SLANT_0_1 +261 0x2000 //RX_FDDRC_SLANT_0_2 +262 0x2000 //RX_FDDRC_SLANT_0_3 +263 0x2000 //RX_FDDRC_SLANT_1_0 +264 0x2000 //RX_FDDRC_SLANT_1_1 +265 0x2000 //RX_FDDRC_SLANT_1_2 +266 0x2000 //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +268 0x0003 //RX_FILTINDX +269 0x0000 //RX_TDDRC_THRD_0 +270 0x0000 //RX_TDDRC_THRD_1 +271 0x0E80 //RX_TDDRC_THRD_2 +272 0x3800 //RX_TDDRC_THRD_3 +273 0x2A00 //RX_TDDRC_SLANT_0 +274 0x6E00 //RX_TDDRC_SLANT_1 +275 0x3000 //RX_TDDRC_ALPHA_UP_0 +276 0x7FB0 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x0000 //RX_TDDRC_HMNC_GAIN +279 0x0000 //RX_TDDRC_SMT_FLAG +280 0x0000 //RX_TDDRC_SMT_W +281 0x0100 //RX_TDDRC_DRC_GAIN +282 0x7C00 //RX_LAMBDA_PKA_FP +283 0x2000 //RX_TPKA_FP +284 0x0080 //RX_MIN_G_FP +285 0x2000 //RX_MAX_G_FP +286 0x0100 //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 +288 0x0010 //RX_MAXLEVEL_CNG +289 0x0000 //RX_BWE_UV_TH +290 0x0000 //RX_BWE_UV_TH2 +291 0x0000 //RX_BWE_UV_TH3 +292 0x0000 //RX_BWE_V_TH +293 0x0000 //RX_BWE_GAIN1_V_TH1 +294 0x0000 //RX_BWE_GAIN1_V_TH2 +295 0x0000 //RX_BWE_UV_EQ +296 0x0000 //RX_BWE_V_EQ +297 0x0000 //RX_BWE_TONE_TH +298 0x0000 //RX_BWE_UV_HOLD_T +299 0x0000 //RX_BWE_GAIN2_ALPHA +300 0x0000 //RX_BWE_GAIN3_ALPHA +301 0x0000 //RX_BWE_CUTOFF +302 0x0000 //RX_BWE_GAINFILL +303 0x0000 //RX_BWE_MAXTH_TONE +304 0x0000 //RX_BWE_EQ_0 +305 0x0000 //RX_BWE_EQ_1 +306 0x0000 //RX_BWE_EQ_2 +307 0x0000 //RX_BWE_EQ_3 +308 0x0000 //RX_BWE_EQ_4 +309 0x0000 //RX_BWE_EQ_5 +310 0x0000 //RX_BWE_EQ_6 +311 0x0000 //RX_BWE_RESRV_0 +312 0x0000 //RX_BWE_RESRV_1 +313 0x0000 //RX_BWE_RESRV_2 +#VOL 0 +163 0x3000 //RX_TDDRC_ALPHA_UP_1 +164 0x3000 //RX_TDDRC_ALPHA_UP_2 +165 0x3000 //RX_TDDRC_ALPHA_UP_3 +166 0x3000 //RX_TDDRC_ALPHA_UP_4 +184 0x7FB0 //RX_TDDRC_ALPHA_DWN_1 +185 0x7FB0 //RX_TDDRC_ALPHA_DWN_2 +186 0x7FB0 //RX_TDDRC_ALPHA_DWN_3 +189 0x7FB0 //RX_TDDRC_ALPHA_DWN_4 +190 0xDA9E //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +269 0x0000 //RX_TDDRC_THRD_0 +270 0x0000 //RX_TDDRC_THRD_1 +271 0x0E80 //RX_TDDRC_THRD_2 +272 0x3800 //RX_TDDRC_THRD_3 +273 0x2A00 //RX_TDDRC_SLANT_0 +274 0x6E00 //RX_TDDRC_SLANT_1 +275 0x3000 //RX_TDDRC_ALPHA_UP_0 +276 0x7FB0 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x0000 //RX_TDDRC_HMNC_GAIN +279 0x0000 //RX_TDDRC_SMT_FLAG +280 0x0000 //RX_TDDRC_SMT_W +281 0x0100 //RX_TDDRC_DRC_GAIN +195 0x0020 //RX_FDEQ_SUBNUM +196 0x4848 //RX_FDEQ_GAIN_0 +197 0x4848 //RX_FDEQ_GAIN_1 +198 0x4848 //RX_FDEQ_GAIN_2 +199 0x4848 //RX_FDEQ_GAIN_3 +200 0x4848 //RX_FDEQ_GAIN_4 +201 0x4848 //RX_FDEQ_GAIN_5 +202 0x4848 //RX_FDEQ_GAIN_6 +203 0x4848 //RX_FDEQ_GAIN_7 +204 0x4848 //RX_FDEQ_GAIN_8 +205 0x4848 //RX_FDEQ_GAIN_9 +206 0x4848 //RX_FDEQ_GAIN_10 +207 0x4848 //RX_FDEQ_GAIN_11 +208 0x4848 //RX_FDEQ_GAIN_12 +209 0x4848 //RX_FDEQ_GAIN_13 +210 0x4848 //RX_FDEQ_GAIN_14 +211 0x4848 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0000 //RX_FDEQ_BIN_0 +221 0x0000 //RX_FDEQ_BIN_1 +222 0x0000 //RX_FDEQ_BIN_2 +223 0x0000 //RX_FDEQ_BIN_3 +224 0x0000 //RX_FDEQ_BIN_4 +225 0x0000 //RX_FDEQ_BIN_5 +226 0x0000 //RX_FDEQ_BIN_6 +227 0x0000 //RX_FDEQ_BIN_7 +228 0x0000 //RX_FDEQ_BIN_8 +229 0x0000 //RX_FDEQ_BIN_9 +230 0x0000 //RX_FDEQ_BIN_10 +231 0x0000 //RX_FDEQ_BIN_11 +232 0x0000 //RX_FDEQ_BIN_12 +233 0x0000 //RX_FDEQ_BIN_13 +234 0x0000 //RX_FDEQ_BIN_14 +235 0x0000 //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x0000 //RX_FDEQ_RESRV_0 +245 0x0000 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0030 //RX_FDDRC_BAND_MARGIN_1 +248 0x0050 //RX_FDDRC_BAND_MARGIN_2 +249 0x0080 //RX_FDDRC_BAND_MARGIN_3 +250 0x0004 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x5000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x6400 //RX_FDDRC_THRD_3_2 +258 0x6400 //RX_FDDRC_THRD_3_3 +259 0x2000 //RX_FDDRC_SLANT_0_0 +260 0x2000 //RX_FDDRC_SLANT_0_1 +261 0x2000 //RX_FDDRC_SLANT_0_2 +262 0x2000 //RX_FDDRC_SLANT_0_3 +263 0x2000 //RX_FDDRC_SLANT_1_0 +264 0x2000 //RX_FDDRC_SLANT_1_1 +265 0x2000 //RX_FDDRC_SLANT_1_2 +266 0x2000 //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +286 0x0100 //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 +#VOL 1 +163 0x3000 //RX_TDDRC_ALPHA_UP_1 +164 0x3000 //RX_TDDRC_ALPHA_UP_2 +165 0x3000 //RX_TDDRC_ALPHA_UP_3 +166 0x3000 //RX_TDDRC_ALPHA_UP_4 +184 0x7FB0 //RX_TDDRC_ALPHA_DWN_1 +185 0x7FB0 //RX_TDDRC_ALPHA_DWN_2 +186 0x7FB0 //RX_TDDRC_ALPHA_DWN_3 +189 0x7FB0 //RX_TDDRC_ALPHA_DWN_4 +190 0xDA9E //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +269 0x0000 //RX_TDDRC_THRD_0 +270 0x0000 //RX_TDDRC_THRD_1 +271 0x0E80 //RX_TDDRC_THRD_2 +272 0x3800 //RX_TDDRC_THRD_3 +273 0x2A00 //RX_TDDRC_SLANT_0 +274 0x6E00 //RX_TDDRC_SLANT_1 +275 0x3000 //RX_TDDRC_ALPHA_UP_0 +276 0x7FB0 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x0000 //RX_TDDRC_HMNC_GAIN +279 0x0000 //RX_TDDRC_SMT_FLAG +280 0x0000 //RX_TDDRC_SMT_W +281 0x0100 //RX_TDDRC_DRC_GAIN +195 0x0020 //RX_FDEQ_SUBNUM +196 0x4848 //RX_FDEQ_GAIN_0 +197 0x4848 //RX_FDEQ_GAIN_1 +198 0x4848 //RX_FDEQ_GAIN_2 +199 0x4848 //RX_FDEQ_GAIN_3 +200 0x4848 //RX_FDEQ_GAIN_4 +201 0x4848 //RX_FDEQ_GAIN_5 +202 0x4848 //RX_FDEQ_GAIN_6 +203 0x4848 //RX_FDEQ_GAIN_7 +204 0x4848 //RX_FDEQ_GAIN_8 +205 0x4848 //RX_FDEQ_GAIN_9 +206 0x4848 //RX_FDEQ_GAIN_10 +207 0x4848 //RX_FDEQ_GAIN_11 +208 0x4848 //RX_FDEQ_GAIN_12 +209 0x4848 //RX_FDEQ_GAIN_13 +210 0x4848 //RX_FDEQ_GAIN_14 +211 0x4848 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0000 //RX_FDEQ_BIN_0 +221 0x0000 //RX_FDEQ_BIN_1 +222 0x0000 //RX_FDEQ_BIN_2 +223 0x0000 //RX_FDEQ_BIN_3 +224 0x0000 //RX_FDEQ_BIN_4 +225 0x0000 //RX_FDEQ_BIN_5 +226 0x0000 //RX_FDEQ_BIN_6 +227 0x0000 //RX_FDEQ_BIN_7 +228 0x0000 //RX_FDEQ_BIN_8 +229 0x0000 //RX_FDEQ_BIN_9 +230 0x0000 //RX_FDEQ_BIN_10 +231 0x0000 //RX_FDEQ_BIN_11 +232 0x0000 //RX_FDEQ_BIN_12 +233 0x0000 //RX_FDEQ_BIN_13 +234 0x0000 //RX_FDEQ_BIN_14 +235 0x0000 //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x0000 //RX_FDEQ_RESRV_0 +245 0x0000 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0030 //RX_FDDRC_BAND_MARGIN_1 +248 0x0050 //RX_FDDRC_BAND_MARGIN_2 +249 0x0080 //RX_FDDRC_BAND_MARGIN_3 +250 0x0004 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x5000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x6400 //RX_FDDRC_THRD_3_2 +258 0x6400 //RX_FDDRC_THRD_3_3 +259 0x2000 //RX_FDDRC_SLANT_0_0 +260 0x2000 //RX_FDDRC_SLANT_0_1 +261 0x2000 //RX_FDDRC_SLANT_0_2 +262 0x2000 //RX_FDDRC_SLANT_0_3 +263 0x2000 //RX_FDDRC_SLANT_1_0 +264 0x2000 //RX_FDDRC_SLANT_1_1 +265 0x2000 //RX_FDDRC_SLANT_1_2 +266 0x2000 //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +286 0x0100 //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 +#VOL 2 +163 0x3000 //RX_TDDRC_ALPHA_UP_1 +164 0x3000 //RX_TDDRC_ALPHA_UP_2 +165 0x3000 //RX_TDDRC_ALPHA_UP_3 +166 0x3000 //RX_TDDRC_ALPHA_UP_4 +184 0x7FB0 //RX_TDDRC_ALPHA_DWN_1 +185 0x7FB0 //RX_TDDRC_ALPHA_DWN_2 +186 0x7FB0 //RX_TDDRC_ALPHA_DWN_3 +189 0x7FB0 //RX_TDDRC_ALPHA_DWN_4 +190 0xDA9E //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +269 0x0000 //RX_TDDRC_THRD_0 +270 0x0000 //RX_TDDRC_THRD_1 +271 0x0E80 //RX_TDDRC_THRD_2 +272 0x3800 //RX_TDDRC_THRD_3 +273 0x2A00 //RX_TDDRC_SLANT_0 +274 0x6E00 //RX_TDDRC_SLANT_1 +275 0x3000 //RX_TDDRC_ALPHA_UP_0 +276 0x7FB0 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x0000 //RX_TDDRC_HMNC_GAIN +279 0x0000 //RX_TDDRC_SMT_FLAG +280 0x0000 //RX_TDDRC_SMT_W +281 0x0100 //RX_TDDRC_DRC_GAIN +195 0x0020 //RX_FDEQ_SUBNUM +196 0x4848 //RX_FDEQ_GAIN_0 +197 0x4848 //RX_FDEQ_GAIN_1 +198 0x4848 //RX_FDEQ_GAIN_2 +199 0x4848 //RX_FDEQ_GAIN_3 +200 0x4848 //RX_FDEQ_GAIN_4 +201 0x4848 //RX_FDEQ_GAIN_5 +202 0x4848 //RX_FDEQ_GAIN_6 +203 0x4848 //RX_FDEQ_GAIN_7 +204 0x4848 //RX_FDEQ_GAIN_8 +205 0x4848 //RX_FDEQ_GAIN_9 +206 0x4848 //RX_FDEQ_GAIN_10 +207 0x4848 //RX_FDEQ_GAIN_11 +208 0x4848 //RX_FDEQ_GAIN_12 +209 0x4848 //RX_FDEQ_GAIN_13 +210 0x4848 //RX_FDEQ_GAIN_14 +211 0x4848 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0000 //RX_FDEQ_BIN_0 +221 0x0000 //RX_FDEQ_BIN_1 +222 0x0000 //RX_FDEQ_BIN_2 +223 0x0000 //RX_FDEQ_BIN_3 +224 0x0000 //RX_FDEQ_BIN_4 +225 0x0000 //RX_FDEQ_BIN_5 +226 0x0000 //RX_FDEQ_BIN_6 +227 0x0000 //RX_FDEQ_BIN_7 +228 0x0000 //RX_FDEQ_BIN_8 +229 0x0000 //RX_FDEQ_BIN_9 +230 0x0000 //RX_FDEQ_BIN_10 +231 0x0000 //RX_FDEQ_BIN_11 +232 0x0000 //RX_FDEQ_BIN_12 +233 0x0000 //RX_FDEQ_BIN_13 +234 0x0000 //RX_FDEQ_BIN_14 +235 0x0000 //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x0000 //RX_FDEQ_RESRV_0 +245 0x0000 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0030 //RX_FDDRC_BAND_MARGIN_1 +248 0x0050 //RX_FDDRC_BAND_MARGIN_2 +249 0x0080 //RX_FDDRC_BAND_MARGIN_3 +250 0x0004 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x5000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x6400 //RX_FDDRC_THRD_3_2 +258 0x6400 //RX_FDDRC_THRD_3_3 +259 0x2000 //RX_FDDRC_SLANT_0_0 +260 0x2000 //RX_FDDRC_SLANT_0_1 +261 0x2000 //RX_FDDRC_SLANT_0_2 +262 0x2000 //RX_FDDRC_SLANT_0_3 +263 0x2000 //RX_FDDRC_SLANT_1_0 +264 0x2000 //RX_FDDRC_SLANT_1_1 +265 0x2000 //RX_FDDRC_SLANT_1_2 +266 0x2000 //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +286 0x0100 //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 +#VOL 3 +163 0x3000 //RX_TDDRC_ALPHA_UP_1 +164 0x3000 //RX_TDDRC_ALPHA_UP_2 +165 0x3000 //RX_TDDRC_ALPHA_UP_3 +166 0x3000 //RX_TDDRC_ALPHA_UP_4 +184 0x7FB0 //RX_TDDRC_ALPHA_DWN_1 +185 0x7FB0 //RX_TDDRC_ALPHA_DWN_2 +186 0x7FB0 //RX_TDDRC_ALPHA_DWN_3 +189 0x7FB0 //RX_TDDRC_ALPHA_DWN_4 +190 0xDA9E //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +269 0x0000 //RX_TDDRC_THRD_0 +270 0x0000 //RX_TDDRC_THRD_1 +271 0x0E80 //RX_TDDRC_THRD_2 +272 0x3800 //RX_TDDRC_THRD_3 +273 0x2A00 //RX_TDDRC_SLANT_0 +274 0x6E00 //RX_TDDRC_SLANT_1 +275 0x3000 //RX_TDDRC_ALPHA_UP_0 +276 0x7FB0 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x0000 //RX_TDDRC_HMNC_GAIN +279 0x0000 //RX_TDDRC_SMT_FLAG +280 0x0000 //RX_TDDRC_SMT_W +281 0x0100 //RX_TDDRC_DRC_GAIN +195 0x0020 //RX_FDEQ_SUBNUM +196 0x4848 //RX_FDEQ_GAIN_0 +197 0x4848 //RX_FDEQ_GAIN_1 +198 0x4848 //RX_FDEQ_GAIN_2 +199 0x4848 //RX_FDEQ_GAIN_3 +200 0x4848 //RX_FDEQ_GAIN_4 +201 0x4848 //RX_FDEQ_GAIN_5 +202 0x4848 //RX_FDEQ_GAIN_6 +203 0x4848 //RX_FDEQ_GAIN_7 +204 0x4848 //RX_FDEQ_GAIN_8 +205 0x4848 //RX_FDEQ_GAIN_9 +206 0x4848 //RX_FDEQ_GAIN_10 +207 0x4848 //RX_FDEQ_GAIN_11 +208 0x4848 //RX_FDEQ_GAIN_12 +209 0x4848 //RX_FDEQ_GAIN_13 +210 0x4848 //RX_FDEQ_GAIN_14 +211 0x4848 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0000 //RX_FDEQ_BIN_0 +221 0x0000 //RX_FDEQ_BIN_1 +222 0x0000 //RX_FDEQ_BIN_2 +223 0x0000 //RX_FDEQ_BIN_3 +224 0x0000 //RX_FDEQ_BIN_4 +225 0x0000 //RX_FDEQ_BIN_5 +226 0x0000 //RX_FDEQ_BIN_6 +227 0x0000 //RX_FDEQ_BIN_7 +228 0x0000 //RX_FDEQ_BIN_8 +229 0x0000 //RX_FDEQ_BIN_9 +230 0x0000 //RX_FDEQ_BIN_10 +231 0x0000 //RX_FDEQ_BIN_11 +232 0x0000 //RX_FDEQ_BIN_12 +233 0x0000 //RX_FDEQ_BIN_13 +234 0x0000 //RX_FDEQ_BIN_14 +235 0x0000 //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x0000 //RX_FDEQ_RESRV_0 +245 0x0000 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0030 //RX_FDDRC_BAND_MARGIN_1 +248 0x0050 //RX_FDDRC_BAND_MARGIN_2 +249 0x0080 //RX_FDDRC_BAND_MARGIN_3 +250 0x0004 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x5000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x6400 //RX_FDDRC_THRD_3_2 +258 0x6400 //RX_FDDRC_THRD_3_3 +259 0x2000 //RX_FDDRC_SLANT_0_0 +260 0x2000 //RX_FDDRC_SLANT_0_1 +261 0x2000 //RX_FDDRC_SLANT_0_2 +262 0x2000 //RX_FDDRC_SLANT_0_3 +263 0x2000 //RX_FDDRC_SLANT_1_0 +264 0x2000 //RX_FDDRC_SLANT_1_1 +265 0x2000 //RX_FDDRC_SLANT_1_2 +266 0x2000 //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +286 0x0100 //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 +#VOL 4 +163 0x3000 //RX_TDDRC_ALPHA_UP_1 +164 0x3000 //RX_TDDRC_ALPHA_UP_2 +165 0x3000 //RX_TDDRC_ALPHA_UP_3 +166 0x3000 //RX_TDDRC_ALPHA_UP_4 +184 0x7FB0 //RX_TDDRC_ALPHA_DWN_1 +185 0x7FB0 //RX_TDDRC_ALPHA_DWN_2 +186 0x7FB0 //RX_TDDRC_ALPHA_DWN_3 +189 0x7FB0 //RX_TDDRC_ALPHA_DWN_4 +190 0xDA9E //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +269 0x0000 //RX_TDDRC_THRD_0 +270 0x0000 //RX_TDDRC_THRD_1 +271 0x0E80 //RX_TDDRC_THRD_2 +272 0x3800 //RX_TDDRC_THRD_3 +273 0x2A00 //RX_TDDRC_SLANT_0 +274 0x6E00 //RX_TDDRC_SLANT_1 +275 0x3000 //RX_TDDRC_ALPHA_UP_0 +276 0x7FB0 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x0000 //RX_TDDRC_HMNC_GAIN +279 0x0000 //RX_TDDRC_SMT_FLAG +280 0x0000 //RX_TDDRC_SMT_W +281 0x0100 //RX_TDDRC_DRC_GAIN +195 0x0020 //RX_FDEQ_SUBNUM +196 0x4848 //RX_FDEQ_GAIN_0 +197 0x4848 //RX_FDEQ_GAIN_1 +198 0x4848 //RX_FDEQ_GAIN_2 +199 0x4848 //RX_FDEQ_GAIN_3 +200 0x4848 //RX_FDEQ_GAIN_4 +201 0x4848 //RX_FDEQ_GAIN_5 +202 0x4848 //RX_FDEQ_GAIN_6 +203 0x4848 //RX_FDEQ_GAIN_7 +204 0x4848 //RX_FDEQ_GAIN_8 +205 0x4848 //RX_FDEQ_GAIN_9 +206 0x4848 //RX_FDEQ_GAIN_10 +207 0x4848 //RX_FDEQ_GAIN_11 +208 0x4848 //RX_FDEQ_GAIN_12 +209 0x4848 //RX_FDEQ_GAIN_13 +210 0x4848 //RX_FDEQ_GAIN_14 +211 0x4848 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0000 //RX_FDEQ_BIN_0 +221 0x0000 //RX_FDEQ_BIN_1 +222 0x0000 //RX_FDEQ_BIN_2 +223 0x0000 //RX_FDEQ_BIN_3 +224 0x0000 //RX_FDEQ_BIN_4 +225 0x0000 //RX_FDEQ_BIN_5 +226 0x0000 //RX_FDEQ_BIN_6 +227 0x0000 //RX_FDEQ_BIN_7 +228 0x0000 //RX_FDEQ_BIN_8 +229 0x0000 //RX_FDEQ_BIN_9 +230 0x0000 //RX_FDEQ_BIN_10 +231 0x0000 //RX_FDEQ_BIN_11 +232 0x0000 //RX_FDEQ_BIN_12 +233 0x0000 //RX_FDEQ_BIN_13 +234 0x0000 //RX_FDEQ_BIN_14 +235 0x0000 //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x0000 //RX_FDEQ_RESRV_0 +245 0x0000 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0030 //RX_FDDRC_BAND_MARGIN_1 +248 0x0050 //RX_FDDRC_BAND_MARGIN_2 +249 0x0080 //RX_FDDRC_BAND_MARGIN_3 +250 0x0004 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x5000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x6400 //RX_FDDRC_THRD_3_2 +258 0x6400 //RX_FDDRC_THRD_3_3 +259 0x2000 //RX_FDDRC_SLANT_0_0 +260 0x2000 //RX_FDDRC_SLANT_0_1 +261 0x2000 //RX_FDDRC_SLANT_0_2 +262 0x2000 //RX_FDDRC_SLANT_0_3 +263 0x2000 //RX_FDDRC_SLANT_1_0 +264 0x2000 //RX_FDDRC_SLANT_1_1 +265 0x2000 //RX_FDDRC_SLANT_1_2 +266 0x2000 //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +286 0x0100 //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 +#VOL 5 +163 0x3000 //RX_TDDRC_ALPHA_UP_1 +164 0x3000 //RX_TDDRC_ALPHA_UP_2 +165 0x3000 //RX_TDDRC_ALPHA_UP_3 +166 0x3000 //RX_TDDRC_ALPHA_UP_4 +184 0x7FB0 //RX_TDDRC_ALPHA_DWN_1 +185 0x7FB0 //RX_TDDRC_ALPHA_DWN_2 +186 0x7FB0 //RX_TDDRC_ALPHA_DWN_3 +189 0x7FB0 //RX_TDDRC_ALPHA_DWN_4 +190 0xDA9E //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +269 0x0000 //RX_TDDRC_THRD_0 +270 0x0000 //RX_TDDRC_THRD_1 +271 0x0E80 //RX_TDDRC_THRD_2 +272 0x3800 //RX_TDDRC_THRD_3 +273 0x2A00 //RX_TDDRC_SLANT_0 +274 0x6E00 //RX_TDDRC_SLANT_1 +275 0x3000 //RX_TDDRC_ALPHA_UP_0 +276 0x7FB0 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x0000 //RX_TDDRC_HMNC_GAIN +279 0x0000 //RX_TDDRC_SMT_FLAG +280 0x0000 //RX_TDDRC_SMT_W +281 0x0100 //RX_TDDRC_DRC_GAIN +195 0x0020 //RX_FDEQ_SUBNUM +196 0x4848 //RX_FDEQ_GAIN_0 +197 0x4848 //RX_FDEQ_GAIN_1 +198 0x4848 //RX_FDEQ_GAIN_2 +199 0x4848 //RX_FDEQ_GAIN_3 +200 0x4848 //RX_FDEQ_GAIN_4 +201 0x4848 //RX_FDEQ_GAIN_5 +202 0x4848 //RX_FDEQ_GAIN_6 +203 0x4848 //RX_FDEQ_GAIN_7 +204 0x4848 //RX_FDEQ_GAIN_8 +205 0x4848 //RX_FDEQ_GAIN_9 +206 0x4848 //RX_FDEQ_GAIN_10 +207 0x4848 //RX_FDEQ_GAIN_11 +208 0x4848 //RX_FDEQ_GAIN_12 +209 0x4848 //RX_FDEQ_GAIN_13 +210 0x4848 //RX_FDEQ_GAIN_14 +211 0x4848 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0000 //RX_FDEQ_BIN_0 +221 0x0000 //RX_FDEQ_BIN_1 +222 0x0000 //RX_FDEQ_BIN_2 +223 0x0000 //RX_FDEQ_BIN_3 +224 0x0000 //RX_FDEQ_BIN_4 +225 0x0000 //RX_FDEQ_BIN_5 +226 0x0000 //RX_FDEQ_BIN_6 +227 0x0000 //RX_FDEQ_BIN_7 +228 0x0000 //RX_FDEQ_BIN_8 +229 0x0000 //RX_FDEQ_BIN_9 +230 0x0000 //RX_FDEQ_BIN_10 +231 0x0000 //RX_FDEQ_BIN_11 +232 0x0000 //RX_FDEQ_BIN_12 +233 0x0000 //RX_FDEQ_BIN_13 +234 0x0000 //RX_FDEQ_BIN_14 +235 0x0000 //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x0000 //RX_FDEQ_RESRV_0 +245 0x0000 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0030 //RX_FDDRC_BAND_MARGIN_1 +248 0x0050 //RX_FDDRC_BAND_MARGIN_2 +249 0x0080 //RX_FDDRC_BAND_MARGIN_3 +250 0x0004 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x5000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x6400 //RX_FDDRC_THRD_3_2 +258 0x6400 //RX_FDDRC_THRD_3_3 +259 0x2000 //RX_FDDRC_SLANT_0_0 +260 0x2000 //RX_FDDRC_SLANT_0_1 +261 0x2000 //RX_FDDRC_SLANT_0_2 +262 0x2000 //RX_FDDRC_SLANT_0_3 +263 0x2000 //RX_FDDRC_SLANT_1_0 +264 0x2000 //RX_FDDRC_SLANT_1_1 +265 0x2000 //RX_FDDRC_SLANT_1_2 +266 0x2000 //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +286 0x0100 //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 +#VOL 6 +163 0x3000 //RX_TDDRC_ALPHA_UP_1 +164 0x3000 //RX_TDDRC_ALPHA_UP_2 +165 0x3000 //RX_TDDRC_ALPHA_UP_3 +166 0x3000 //RX_TDDRC_ALPHA_UP_4 +184 0x7FB0 //RX_TDDRC_ALPHA_DWN_1 +185 0x7FB0 //RX_TDDRC_ALPHA_DWN_2 +186 0x7FB0 //RX_TDDRC_ALPHA_DWN_3 +189 0x7FB0 //RX_TDDRC_ALPHA_DWN_4 +190 0xDA9E //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +269 0x0000 //RX_TDDRC_THRD_0 +270 0x0000 //RX_TDDRC_THRD_1 +271 0x0E80 //RX_TDDRC_THRD_2 +272 0x3800 //RX_TDDRC_THRD_3 +273 0x2A00 //RX_TDDRC_SLANT_0 +274 0x6E00 //RX_TDDRC_SLANT_1 +275 0x3000 //RX_TDDRC_ALPHA_UP_0 +276 0x7FB0 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x0000 //RX_TDDRC_HMNC_GAIN +279 0x0000 //RX_TDDRC_SMT_FLAG +280 0x0000 //RX_TDDRC_SMT_W +281 0x0100 //RX_TDDRC_DRC_GAIN +195 0x0020 //RX_FDEQ_SUBNUM +196 0x4848 //RX_FDEQ_GAIN_0 +197 0x4848 //RX_FDEQ_GAIN_1 +198 0x4848 //RX_FDEQ_GAIN_2 +199 0x4848 //RX_FDEQ_GAIN_3 +200 0x4848 //RX_FDEQ_GAIN_4 +201 0x4848 //RX_FDEQ_GAIN_5 +202 0x4848 //RX_FDEQ_GAIN_6 +203 0x4848 //RX_FDEQ_GAIN_7 +204 0x4848 //RX_FDEQ_GAIN_8 +205 0x4848 //RX_FDEQ_GAIN_9 +206 0x4848 //RX_FDEQ_GAIN_10 +207 0x4848 //RX_FDEQ_GAIN_11 +208 0x4848 //RX_FDEQ_GAIN_12 +209 0x4848 //RX_FDEQ_GAIN_13 +210 0x4848 //RX_FDEQ_GAIN_14 +211 0x4848 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0000 //RX_FDEQ_BIN_0 +221 0x0000 //RX_FDEQ_BIN_1 +222 0x0000 //RX_FDEQ_BIN_2 +223 0x0000 //RX_FDEQ_BIN_3 +224 0x0000 //RX_FDEQ_BIN_4 +225 0x0000 //RX_FDEQ_BIN_5 +226 0x0000 //RX_FDEQ_BIN_6 +227 0x0000 //RX_FDEQ_BIN_7 +228 0x0000 //RX_FDEQ_BIN_8 +229 0x0000 //RX_FDEQ_BIN_9 +230 0x0000 //RX_FDEQ_BIN_10 +231 0x0000 //RX_FDEQ_BIN_11 +232 0x0000 //RX_FDEQ_BIN_12 +233 0x0000 //RX_FDEQ_BIN_13 +234 0x0000 //RX_FDEQ_BIN_14 +235 0x0000 //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x0000 //RX_FDEQ_RESRV_0 +245 0x0000 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0030 //RX_FDDRC_BAND_MARGIN_1 +248 0x0050 //RX_FDDRC_BAND_MARGIN_2 +249 0x0080 //RX_FDDRC_BAND_MARGIN_3 +250 0x0004 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x5000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x6400 //RX_FDDRC_THRD_3_2 +258 0x6400 //RX_FDDRC_THRD_3_3 +259 0x2000 //RX_FDDRC_SLANT_0_0 +260 0x2000 //RX_FDDRC_SLANT_0_1 +261 0x2000 //RX_FDDRC_SLANT_0_2 +262 0x2000 //RX_FDDRC_SLANT_0_3 +263 0x2000 //RX_FDDRC_SLANT_1_0 +264 0x2000 //RX_FDDRC_SLANT_1_1 +265 0x2000 //RX_FDDRC_SLANT_1_2 +266 0x2000 //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +286 0x0100 //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 #CASE_NAME HEADSET-TTY_VCO-VOICE_GENERIC-SWB -#PARAM_MODE FULL -#PARAM_TYPE TX+RX -#TOTAL_CUSTOM_STEP 7 +#PARAM_MODE Full +#PARAM_TYPE TX+2RX +#TOTAL_CUSTOM_STEP 7+7 #TX 0 0x0001 //TX_OPERATION_MODE_0 1 0x0001 //TX_OPERATION_MODE_1 2 0x0033 //TX_PATCH_REG -3 0x2F7C //TX_SENDFUNC_MODE_0 +3 0x6F7C //TX_SENDFUNC_MODE_0 4 0x0001 //TX_SENDFUNC_MODE_1 -5 0x0003 //TX_NUM_MIC +5 0x0002 //TX_NUM_MIC 6 0x0003 //TX_SAMPLINGFREQ_SIG 7 0x0003 //TX_SAMPLINGFREQ_PROC 8 0x000A //TX_FRAME_SZ_SIG @@ -45633,8 +69449,8 @@ 18 0x0000 //TX_SYS_RESRV_2 19 0x0000 //TX_SYS_RESRV_3 20 0x0000 //TX_DIST2REF0 -21 0x00A4 //TX_DIST2REF1 -22 0x0017 //TX_DIST2REF_02 +21 0x009D //TX_DIST2REF1 +22 0x0010 //TX_DIST2REF_02 23 0x0000 //TX_DIST2REF_03 24 0x0000 //TX_DIST2REF_04 25 0x0000 //TX_DIST2REF_05 @@ -45740,7 +69556,7 @@ 125 0x6000 //TX_C_POST_FLT_MIC_MAINBLK 126 0x6000 //TX_C_POST_FLT_MIC_REFBLK 127 0x0010 //TX_MIC_BLOCK_N -128 0x7B02 //TX_A_HP +128 0x7D83 //TX_A_HP 129 0x4000 //TX_B_PE 130 0x5000 //TX_THR_PITCH_DET_0 131 0x4800 //TX_THR_PITCH_DET_1 @@ -45777,8 +69593,8 @@ 162 0x7800 //TX_MIN_EQ_RE_EST_10 163 0x7800 //TX_MIN_EQ_RE_EST_11 164 0x7800 //TX_MIN_EQ_RE_EST_12 -165 0x4000 //TX_LAMBDA_RE_EST -166 0x3000 //TX_LAMBDA_CB_NLE +165 0x0880 //TX_LAMBDA_RE_EST +166 0x7FFF //TX_LAMBDA_CB_NLE 167 0x7FFF //TX_C_POST_FLT 168 0x4000 //TX_GAIN_NP 169 0x0180 //TX_SE_HOLD_N @@ -45837,16 +69653,16 @@ 222 0x023E //TX_ADPT_STRICT_H 223 0x0BB8 //TX_RATIO_DT_L_TH_LOW 224 0x3A98 //TX_RATIO_DT_H_TH_LOW -225 0x1F40 //TX_RATIO_DT_L_TH_HIGH -226 0x6590 //TX_RATIO_DT_H_TH_HIGH +225 0x1770 //TX_RATIO_DT_L_TH_HIGH +226 0x733C //TX_RATIO_DT_H_TH_HIGH 227 0x09C4 //TX_RATIO_DT_L0_TH -228 0x2000 //TX_B_POST_FILT_ECHO_L -229 0x1000 //TX_B_POST_FILT_ECHO_H +228 0x7FFF //TX_B_POST_FILT_ECHO_L +229 0x7FFF //TX_B_POST_FILT_ECHO_H 230 0x0200 //TX_MIN_G_CTRL_ECHO 231 0x1000 //TX_B_LESSCUT_RTO_ECHO 232 0x0000 //TX_EPD_OFFSET_00 233 0x0000 //TX_EPD_OFFST_01 -234 0x2328 //TX_RATIO_DT_L0_TH_HIGH +234 0x3A98 //TX_RATIO_DT_L0_TH_HIGH 235 0x7FFF //TX_RATIO_DT_H_TH_CUT 236 0x7FFF //TX_MIN_EQ_RE_EST_13 237 0x0000 //TX_DTD_THR1_7 @@ -45854,7 +69670,7 @@ 239 0x0800 //TX_DT_RESRV_7 240 0x0800 //TX_DT_RESRV_8 241 0x0000 //TX_DT_RESRV_9 -242 0xF800 //TX_THR_SN_EST_0 +242 0xFA00 //TX_THR_SN_EST_0 243 0xFA00 //TX_THR_SN_EST_1 244 0xFA00 //TX_THR_SN_EST_2 245 0xFA00 //TX_THR_SN_EST_3 @@ -45865,10 +69681,10 @@ 250 0x0100 //TX_DELTA_THR_SN_EST_0 251 0x0100 //TX_DELTA_THR_SN_EST_1 252 0x0100 //TX_DELTA_THR_SN_EST_2 -253 0x0100 //TX_DELTA_THR_SN_EST_3 -254 0x0000 //TX_DELTA_THR_SN_EST_4 -255 0x0100 //TX_DELTA_THR_SN_EST_5 -256 0x0200 //TX_DELTA_THR_SN_EST_6 +253 0x0000 //TX_DELTA_THR_SN_EST_3 +254 0x0100 //TX_DELTA_THR_SN_EST_4 +255 0x0200 //TX_DELTA_THR_SN_EST_5 +256 0x0100 //TX_DELTA_THR_SN_EST_6 257 0x0200 //TX_DELTA_THR_SN_EST_7 258 0x4000 //TX_LAMBDA_NN_EST_0 259 0x4000 //TX_LAMBDA_NN_EST_1 @@ -45895,11 +69711,11 @@ 280 0x1000 //TX_B_POST_FLT_1 281 0x0010 //TX_NS_LVL_CTRL_0 282 0x003C //TX_NS_LVL_CTRL_1 -283 0x003C //TX_NS_LVL_CTRL_2 -284 0x0024 //TX_NS_LVL_CTRL_3 -285 0x003C //TX_NS_LVL_CTRL_4 -286 0x0014 //TX_NS_LVL_CTRL_5 -287 0x0011 //TX_NS_LVL_CTRL_6 +283 0x0024 //TX_NS_LVL_CTRL_2 +284 0x003C //TX_NS_LVL_CTRL_3 +285 0x0014 //TX_NS_LVL_CTRL_4 +286 0x0011 //TX_NS_LVL_CTRL_5 +287 0x003C //TX_NS_LVL_CTRL_6 288 0x0011 //TX_NS_LVL_CTRL_7 289 0x000F //TX_MIN_GAIN_S_0 290 0x0010 //TX_MIN_GAIN_S_1 @@ -45915,10 +69731,10 @@ 300 0x7FFF //TX_SNRI_SUP_0 301 0x1400 //TX_SNRI_SUP_1 302 0x1400 //TX_SNRI_SUP_2 -303 0x1400 //TX_SNRI_SUP_3 +303 0x4000 //TX_SNRI_SUP_3 304 0x4000 //TX_SNRI_SUP_4 -305 0x4000 //TX_SNRI_SUP_5 -306 0x50C0 //TX_SNRI_SUP_6 +305 0x50C0 //TX_SNRI_SUP_5 +306 0x1400 //TX_SNRI_SUP_6 307 0x7FFF //TX_SNRI_SUP_7 308 0x7FFF //TX_THR_LFNS 309 0x0018 //TX_G_LFNS @@ -45927,19 +69743,19 @@ 312 0x7FFF //TX_A_POST_FILT_0 313 0x2000 //TX_A_POST_FILT_1 314 0x5000 //TX_A_POST_FILT_S_0 -315 0x7C00 //TX_A_POST_FILT_S_1 -316 0x4C00 //TX_A_POST_FILT_S_2 -317 0x4000 //TX_A_POST_FILT_S_3 -318 0x6000 //TX_A_POST_FILT_S_4 -319 0x4000 //TX_A_POST_FILT_S_5 -320 0x5000 //TX_A_POST_FILT_S_6 +315 0x4C00 //TX_A_POST_FILT_S_1 +316 0x4000 //TX_A_POST_FILT_S_2 +317 0x6000 //TX_A_POST_FILT_S_3 +318 0x4000 //TX_A_POST_FILT_S_4 +319 0x5000 //TX_A_POST_FILT_S_5 +320 0x7C00 //TX_A_POST_FILT_S_6 321 0x7000 //TX_A_POST_FILT_S_7 322 0x2000 //TX_B_POST_FILT_0 -323 0x1000 //TX_B_POST_FILT_1 +323 0x6000 //TX_B_POST_FILT_1 324 0x6000 //TX_B_POST_FILT_2 325 0x6000 //TX_B_POST_FILT_3 -326 0x6000 //TX_B_POST_FILT_4 -327 0x4000 //TX_B_POST_FILT_5 +326 0x4000 //TX_B_POST_FILT_4 +327 0x1000 //TX_B_POST_FILT_5 328 0x1000 //TX_B_POST_FILT_6 329 0x2000 //TX_B_POST_FILT_7 330 0x4000 //TX_B_LESSCUT_RTO_S_0 @@ -45947,8 +69763,8 @@ 332 0x7FFF //TX_B_LESSCUT_RTO_S_2 333 0x7FFF //TX_B_LESSCUT_RTO_S_3 334 0x7FFF //TX_B_LESSCUT_RTO_S_4 -335 0x7FFF //TX_B_LESSCUT_RTO_S_5 -336 0x6000 //TX_B_LESSCUT_RTO_S_6 +335 0x6000 //TX_B_LESSCUT_RTO_S_5 +336 0x7FFF //TX_B_LESSCUT_RTO_S_6 337 0x7FFF //TX_B_LESSCUT_RTO_S_7 338 0x7C00 //TX_LAMBDA_PFILT 339 0x7D00 //TX_LAMBDA_PFILT_S_0 @@ -45979,7 +69795,7 @@ 364 0x0000 //TX_K_APT 365 0x0001 //TX_NOISEDET 366 0x0064 //TX_NDETCT -367 0x0050 //TX_NOISE_TH_0 +367 0x0383 //TX_NOISE_TH_0 368 0x7FFF //TX_NOISE_TH_0_2 369 0x7FFF //TX_NOISE_TH_0_3 370 0x07D0 //TX_NOISE_TH_1 @@ -45991,11 +69807,11 @@ 376 0x0000 //TX_NOISE_TH_5_3 377 0x7FFF //TX_NOISE_TH_5_4 378 0x0DAC //TX_NOISE_TH_6 -379 0x0050 //TX_MINENOISE_TH -380 0x4000 //TX_MINENOISE_MIC0_TH_MTS -381 0xFFEE //TX_MINENOISE_MIC0_TH_EXP -382 0x6000 //TX_MINENOISE_MIC0_S_TH_MTS -383 0xFFF3 //TX_MINENOISE_MIC0_S_TH_EXP +379 0x044C //TX_MINENOISE_TH +380 0xD508 //TX_MORENS_TFMASK_TH +381 0x0001 //TX_DRC_QUIET_FLOOR +382 0x3A98 //TX_RATIODTL_CUT_TH +383 0x0DAC //TX_DT_CUT_K1 384 0x0666 //TX_OUT_ENER_S_TH_CLEAN 385 0x0666 //TX_OUT_ENER_S_TH_LESSCLEAN 386 0x0333 //TX_OUT_ENER_S_TH_NOISY @@ -46003,22 +69819,22 @@ 388 0x0333 //TX_OUT_ENER_TH_SPEECH 389 0x2000 //TX_SN_NPB_GAIN 390 0x0000 //TX_NN_NPB_GAIN -391 0x0000 //TX_CSX_ALPHA_0 -392 0x0000 //TX_CSX_ALPHA_1 -393 0x0000 //TX_CSX_ALPHA_2 -394 0x0000 //TX_CSX_ALPHA_3 -395 0x0800 //TX_MU_ARSP_EST -396 0x00C8 //TX_P_OUTBEAM_MIN_TH +391 0x7FFF //TX_POST_MASK_SUP_HSNE +392 0x1388 //TX_TAIL_DET_TH +393 0x4000 //TX_B_LESSCUT_RTO_WTA +394 0x0000 //TX_MEL_G_R +395 0x0080 //TX_SUPHIGH_TH +396 0x0000 //TX_MASK_G_R 397 0x0002 //TX_EXTRA_NS_L -398 0x0800 //TX_EXTRA_NS_A -399 0x0005 //TX_VR_NOISE_FLOOR_TH +398 0x1800 //TX_C_POST_FLT_MASK +399 0x7FFF //TX_A_POST_FLT_WNS 400 0x0148 //TX_MIN_G_LOW300HZ -401 0x0001 //TX_MAXLEVEL_CNG +401 0x0004 //TX_MAXLEVEL_CNG 402 0x00B4 //TX_STN_NOISE_TH 403 0x4000 //TX_POST_MASK_SUP 404 0x7FFF //TX_POST_MASK_ADJUST 405 0x00C8 //TX_NS_ENOISE_MIC0_TH -406 0x0050 //TX_MINENOISE_MIC0_TH +406 0x02F3 //TX_MINENOISE_MIC0_TH 407 0x012C //TX_MINENOISE_MIC0_S_TH 408 0x4000 //TX_MIN_G_CTRL_SSNS 409 0x0000 //TX_METAL_RTO_THR @@ -46126,16 +69942,16 @@ 511 0x6666 //TX_MIC_TO_BFGAIN 512 0x0000 //TX_MICTOBFGAIN0 513 0x0000 //TX_FASTMUE_TH -514 0x0000 //TX_DERVB_LEN_0 -515 0x0000 //TX_DERVB_LEN_1 -516 0x0000 //TX_RHO_DERVB -517 0x0000 //TX_MIC_INDX_DERVB -518 0x0000 //TX_MU_DERVB -519 0x0000 //TX_DR_RESRV_0 -520 0x0000 //TX_DR_RESRV_1 -521 0x0000 //TX_DR_RESRV_2 -522 0x0000 //TX_DR_RESRV_3 -523 0x0000 //TX_DR_RESRV_4 +514 0xC000 //TX_DEREVERB_LF_MU +515 0xC000 //TX_DEREVERB_HF_MU +516 0xCCCC //TX_DEREVERB_DELAY +517 0xD999 //TX_DEREVERB_COEF_LEN +518 0x1F40 //TX_DEREVERB_DNR +519 0x0000 //TX_DEREVERB_ALPHA +520 0x0000 //TX_DEREVERB_BETA +521 0x0000 //TX_GSC_RTOL_TH +522 0x7000 //TX_GSC_RTOH_TH +523 0x0064 //TX_WIDE2_MEANHTH 524 0x0000 //TX_DR_RESRV_5 525 0x0000 //TX_DR_RESRV_6 526 0x0000 //TX_DR_RESRV_7 @@ -46179,22 +69995,22 @@ 564 0x0000 //TX_PB_RESRV_0 565 0x0000 //TX_PB_RESRV_1 566 0x0020 //TX_FDEQ_SUBNUM -567 0x4848 //TX_FDEQ_GAIN_0 -568 0x4848 //TX_FDEQ_GAIN_1 +567 0x5450 //TX_FDEQ_GAIN_0 +568 0x4C48 //TX_FDEQ_GAIN_1 569 0x4850 //TX_FDEQ_GAIN_2 570 0x5050 //TX_FDEQ_GAIN_3 571 0x4848 //TX_FDEQ_GAIN_4 -572 0x484A //TX_FDEQ_GAIN_5 +572 0x484E //TX_FDEQ_GAIN_5 573 0x4E5E //TX_FDEQ_GAIN_6 -574 0x5C4C //TX_FDEQ_GAIN_7 +574 0x584E //TX_FDEQ_GAIN_7 575 0x4C4E //TX_FDEQ_GAIN_8 -576 0x4844 //TX_FDEQ_GAIN_9 -577 0x4448 //TX_FDEQ_GAIN_10 -578 0x4850 //TX_FDEQ_GAIN_11 -579 0x5C6A //TX_FDEQ_GAIN_12 -580 0x5A84 //TX_FDEQ_GAIN_13 -581 0x7880 //TX_FDEQ_GAIN_14 -582 0x7F7F //TX_FDEQ_GAIN_15 +576 0x564E //TX_FDEQ_GAIN_9 +577 0x5058 //TX_FDEQ_GAIN_10 +578 0x625C //TX_FDEQ_GAIN_11 +579 0x6C6C //TX_FDEQ_GAIN_12 +580 0x7086 //TX_FDEQ_GAIN_13 +581 0x869C //TX_FDEQ_GAIN_14 +582 0xB0B0 //TX_FDEQ_GAIN_15 583 0x4848 //TX_FDEQ_GAIN_16 584 0x4848 //TX_FDEQ_GAIN_17 585 0x4848 //TX_FDEQ_GAIN_18 @@ -46218,7 +70034,7 @@ 603 0x1B1E //TX_FDEQ_BIN_12 604 0x1E1E //TX_FDEQ_BIN_13 605 0x1E28 //TX_FDEQ_BIN_14 -606 0x282C //TX_FDEQ_BIN_15 +606 0x284A //TX_FDEQ_BIN_15 607 0x0000 //TX_FDEQ_BIN_16 608 0x0000 //TX_FDEQ_BIN_17 609 0x0000 //TX_FDEQ_BIN_18 @@ -46236,15 +70052,15 @@ 621 0x4848 //TX_PREEQ_GAIN_MIC0_4 622 0x4848 //TX_PREEQ_GAIN_MIC0_5 623 0x4848 //TX_PREEQ_GAIN_MIC0_6 -624 0x484A //TX_PREEQ_GAIN_MIC0_7 -625 0x4C4E //TX_PREEQ_GAIN_MIC0_8 -626 0x5054 //TX_PREEQ_GAIN_MIC0_9 -627 0x5658 //TX_PREEQ_GAIN_MIC0_10 -628 0x5C5C //TX_PREEQ_GAIN_MIC0_11 -629 0x6474 //TX_PREEQ_GAIN_MIC0_12 -630 0x7870 //TX_PREEQ_GAIN_MIC0_13 -631 0x5C48 //TX_PREEQ_GAIN_MIC0_14 -632 0x383C //TX_PREEQ_GAIN_MIC0_15 +624 0x4848 //TX_PREEQ_GAIN_MIC0_7 +625 0x494A //TX_PREEQ_GAIN_MIC0_8 +626 0x4B4C //TX_PREEQ_GAIN_MIC0_9 +627 0x4B4A //TX_PREEQ_GAIN_MIC0_10 +628 0x484B //TX_PREEQ_GAIN_MIC0_11 +629 0x4C4C //TX_PREEQ_GAIN_MIC0_12 +630 0x4B48 //TX_PREEQ_GAIN_MIC0_13 +631 0x3838 //TX_PREEQ_GAIN_MIC0_14 +632 0x3835 //TX_PREEQ_GAIN_MIC0_15 633 0x4848 //TX_PREEQ_GAIN_MIC0_16 634 0x4848 //TX_PREEQ_GAIN_MIC0_17 635 0x4848 //TX_PREEQ_GAIN_MIC0_18 @@ -46285,15 +70101,15 @@ 670 0x4848 //TX_PREEQ_GAIN_MIC1_4 671 0x4848 //TX_PREEQ_GAIN_MIC1_5 672 0x4848 //TX_PREEQ_GAIN_MIC1_6 -673 0x4848 //TX_PREEQ_GAIN_MIC1_7 -674 0x4848 //TX_PREEQ_GAIN_MIC1_8 -675 0x4848 //TX_PREEQ_GAIN_MIC1_9 -676 0x4848 //TX_PREEQ_GAIN_MIC1_10 -677 0x4848 //TX_PREEQ_GAIN_MIC1_11 -678 0x4848 //TX_PREEQ_GAIN_MIC1_12 -679 0x4848 //TX_PREEQ_GAIN_MIC1_13 -680 0x4848 //TX_PREEQ_GAIN_MIC1_14 -681 0x4848 //TX_PREEQ_GAIN_MIC1_15 +673 0x4846 //TX_PREEQ_GAIN_MIC1_7 +674 0x4544 //TX_PREEQ_GAIN_MIC1_8 +675 0x4241 //TX_PREEQ_GAIN_MIC1_9 +676 0x403E //TX_PREEQ_GAIN_MIC1_10 +677 0x3D3C //TX_PREEQ_GAIN_MIC1_11 +678 0x3C3C //TX_PREEQ_GAIN_MIC1_12 +679 0x3C39 //TX_PREEQ_GAIN_MIC1_13 +680 0x3838 //TX_PREEQ_GAIN_MIC1_14 +681 0x3A3C //TX_PREEQ_GAIN_MIC1_15 682 0x4848 //TX_PREEQ_GAIN_MIC1_16 683 0x4848 //TX_PREEQ_GAIN_MIC1_17 684 0x4848 //TX_PREEQ_GAIN_MIC1_18 @@ -46302,22 +70118,22 @@ 687 0x4848 //TX_PREEQ_GAIN_MIC1_21 688 0x4848 //TX_PREEQ_GAIN_MIC1_22 689 0x4848 //TX_PREEQ_GAIN_MIC1_23 -690 0x251A //TX_PREEQ_BIN_MIC1_0 -691 0x0F0F //TX_PREEQ_BIN_MIC1_1 -692 0x0C0C //TX_PREEQ_BIN_MIC1_2 -693 0x0C0F //TX_PREEQ_BIN_MIC1_3 -694 0x0F0F //TX_PREEQ_BIN_MIC1_4 -695 0x0F09 //TX_PREEQ_BIN_MIC1_5 -696 0x0909 //TX_PREEQ_BIN_MIC1_6 -697 0x0908 //TX_PREEQ_BIN_MIC1_7 -698 0x070F //TX_PREEQ_BIN_MIC1_8 -699 0x1F08 //TX_PREEQ_BIN_MIC1_9 -700 0x0808 //TX_PREEQ_BIN_MIC1_10 -701 0x0920 //TX_PREEQ_BIN_MIC1_11 -702 0x2020 //TX_PREEQ_BIN_MIC1_12 -703 0x2021 //TX_PREEQ_BIN_MIC1_13 -704 0x0000 //TX_PREEQ_BIN_MIC1_14 -705 0x0000 //TX_PREEQ_BIN_MIC1_15 +690 0x0202 //TX_PREEQ_BIN_MIC1_0 +691 0x0203 //TX_PREEQ_BIN_MIC1_1 +692 0x0303 //TX_PREEQ_BIN_MIC1_2 +693 0x0304 //TX_PREEQ_BIN_MIC1_3 +694 0x0405 //TX_PREEQ_BIN_MIC1_4 +695 0x0506 //TX_PREEQ_BIN_MIC1_5 +696 0x0708 //TX_PREEQ_BIN_MIC1_6 +697 0x090A //TX_PREEQ_BIN_MIC1_7 +698 0x0B0C //TX_PREEQ_BIN_MIC1_8 +699 0x0D0E //TX_PREEQ_BIN_MIC1_9 +700 0x1013 //TX_PREEQ_BIN_MIC1_10 +701 0x1719 //TX_PREEQ_BIN_MIC1_11 +702 0x1B1E //TX_PREEQ_BIN_MIC1_12 +703 0x1E1E //TX_PREEQ_BIN_MIC1_13 +704 0x1E28 //TX_PREEQ_BIN_MIC1_14 +705 0x282C //TX_PREEQ_BIN_MIC1_15 706 0x0000 //TX_PREEQ_BIN_MIC1_16 707 0x0000 //TX_PREEQ_BIN_MIC1_17 708 0x0000 //TX_PREEQ_BIN_MIC1_18 @@ -46403,7 +70219,7 @@ 788 0x7EB8 //TX_TDDRC_ALPHA_DWN_02 789 0x7EB8 //TX_TDDRC_ALPHA_DWN_03 790 0x7EB8 //TX_TDDRC_ALPHA_DWN_04 -791 0x7FFF //TX_TDDRC_TD_DRC_LIMIT +791 0x7214 //TX_TDDRC_TD_DRC_LIMIT 792 0x0800 //TX_TDDRC_POST_LIMIT_GAIN 793 0x0000 //TX_TDDRC_RESRV_0 794 0x0000 //TX_TDDRC_RESRV_1 @@ -46466,12 +70282,12 @@ 851 0x0000 //TX_FFP_RESRV_5 852 0x0000 //TX_FFP_RESRV_6 853 0x0002 //TX_FILTINDX -854 0x0001 //TX_TDDRC_THRD_0 -855 0x0002 //TX_TDDRC_THRD_1 -856 0x1000 //TX_TDDRC_THRD_2 -857 0x1000 //TX_TDDRC_THRD_3 -858 0x6000 //TX_TDDRC_SLANT_0 -859 0x6000 //TX_TDDRC_SLANT_1 +854 0x0003 //TX_TDDRC_THRD_0 +855 0x0004 //TX_TDDRC_THRD_1 +856 0x1800 //TX_TDDRC_THRD_2 +857 0x1800 //TX_TDDRC_THRD_3 +858 0x7FFF //TX_TDDRC_SLANT_0 +859 0x7FFF //TX_TDDRC_SLANT_1 860 0x0800 //TX_TDDRC_ALPHA_UP_00 861 0x7EB8 //TX_TDDRC_ALPHA_DWN_00 862 0x0000 //TX_TDDRC_HMNC_FLAG @@ -46501,7 +70317,7 @@ 886 0x0CCD //TX_FASTNS_TFMASKBIN_TH2 887 0x0CCD //TX_FASTNS_TFMASKBIN_TH3 888 0x00C8 //TX_FASTNS_ARSPC_TH -889 0xC000 //TX_FASTNS_MASK5_TH +889 0x8000 //TX_FASTNS_MASK5_TH 890 0x4848 //TX_POSTSSA_MIN_G_VR_MASK 891 0x4000 //TX_A_LESSCUT_RTO_MASK 892 0x1770 //TX_FASTNS_NOISETH @@ -46509,8 +70325,73 @@ 894 0xC000 //TX_FASTNS_SSA_THHFL 895 0xCCCC //TX_FASTNS_SSA_THLFH 896 0xD999 //TX_FASTNS_SSA_THHFH +897 0x2339 //TX_SENDFUNC_REG_MICMUTE +898 0x0021 //TX_SENDFUNC_REG_MICMUTE1 +899 0x02BC //TX_MICMUTE_RATIO_THR +900 0x0140 //TX_MICMUTE_AMP_THR +901 0x0004 //TX_MICMUTE_HPF_IND +902 0x00C0 //TX_MICMUTE_LOG_EYR_TH +903 0x0008 //TX_MICMUTE_CVG_TIME +904 0x0008 //TX_MICMUTE_RELEASE_TIME +905 0x01FE //TX_MIC_VOLUME_MIC0MUTE +906 0x0020 //TX_MICMUTE_EPD_OFFSET_0 +907 0x001E //TX_MICMUTE_FRQ_AEC_L +908 0x7999 //TX_MICMUTE_EAD_THR +909 0x7FFF //TX_MICMUTE_LAMBDA_CB_NLE +910 0x7FFF //TX_MICMUTE_LAMBDA_RE_EST +911 0x4000 //TX_DTD_THR1_MICMUTE_0 +912 0x7000 //TX_DTD_THR1_MICMUTE_1 +913 0x7FFF //TX_DTD_THR1_MICMUTE_2 +914 0x7FFF //TX_DTD_THR1_MICMUTE_3 +915 0x6CCC //TX_DTD_THR2_MICMUTE_0 +916 0x0400 //TX_MICMUTE_MIN_EQ_RE_EST_0 +917 0x0400 //TX_MICMUTE_MIN_EQ_RE_EST_1 +918 0x1000 //TX_MICMUTE_MIN_EQ_RE_EST_2 +919 0x7FFF //TX_MICMUTE_MIN_EQ_RE_EST_3 +920 0x7FFF //TX_MICMUTE_MIN_EQ_RE_EST_4 +921 0x4000 //TX_MICMUTE_C_POST_FLT +922 0x03E8 //TX_MICMUTE_DT_CUT_K +923 0x0001 //TX_MICMUTE_DT_CUT_THR +924 0x03E8 //TX_MICMUTE_DT_CUT_K2 +925 0x0001 //TX_MICMUTE_DT_CUT_THR2 +926 0x0064 //TX_MICMUTE_DT2_HOLD_N +927 0x1000 //TX_MICMUTE_RATIODTH_THCUT +928 0x1000 //TX_MICMUTE_B_POST_FLT_ECHOL +929 0x7FFF //TX_MICMUTE_B_POST_FLT_ECHOH +930 0x0400 //TX_MICMUTE_C_POST_FLT_MASK +931 0x7999 //TX_MICMUTE_RATIODTL_CUT_TH +932 0x0258 //TX_MICMUTE_DT_CUT_K1 +933 0x0800 //TX_MICMUTE_N2_SN_EST +934 0xFC00 //TX_MICMUTE_THR_SN_EST_0 +935 0x001C //TX_MICMUTE_MIN_G_CTRL_0 +936 0x6000 //TX_MICMUTE_A_POST_FILT_S_0 +937 0x7000 //TX_MICMUTE_B_POST_FILT_0 +938 0x2710 //TX_MIC1RUB_AMP_THR +939 0x0010 //TX_MIC1MUTE_RATIO_THR +940 0x0450 //TX_MIC1MUTE_AMP_THR +941 0x0008 //TX_MIC1MUTE_CVG_TIME +942 0x0008 //TX_MIC1MUTE_RELEASE_TIME +943 0x0000 //TX_AMS_RESRV_01 +944 0x0000 //TX_AMS_RESRV_02 +945 0x0000 //TX_AMS_RESRV_03 +946 0x0000 //TX_AMS_RESRV_04 +947 0x0000 //TX_AMS_RESRV_05 +948 0x0000 //TX_AMS_RESRV_06 +949 0x0000 //TX_AMS_RESRV_07 +950 0x0000 //TX_AMS_RESRV_08 +951 0x0000 //TX_AMS_RESRV_09 +952 0x0000 //TX_AMS_RESRV_10 +953 0x0000 //TX_AMS_RESRV_11 +954 0x0000 //TX_AMS_RESRV_12 +955 0x0000 //TX_AMS_RESRV_13 +956 0x0000 //TX_AMS_RESRV_14 +957 0x0000 //TX_AMS_RESRV_15 +958 0x0000 //TX_AMS_RESRV_16 +959 0x0000 //TX_AMS_RESRV_17 +960 0x0000 //TX_AMS_RESRV_18 +961 0x0000 //TX_AMS_RESRV_19 #RX -0 0x0040 //RX_RECVFUNC_MODE_0 +0 0x2040 //RX_RECVFUNC_MODE_0 1 0x0000 //RX_RECVFUNC_MODE_1 2 0x0000 //RX_SAMPLINGFREQ_SIG 3 0x0000 //RX_SAMPLINGFREQ_PROC @@ -47360,18 +71241,869 @@ 110 0x0000 //RX_FDDRC_RESRV_0 129 0x0100 //RX_SPK_VOL 130 0x0000 //RX_VOL_RESRV_0 +#RX 2 +157 0x2040 //RX_RECVFUNC_MODE_0 +158 0x0000 //RX_RECVFUNC_MODE_1 +159 0x0000 //RX_SAMPLINGFREQ_SIG +160 0x0000 //RX_SAMPLINGFREQ_PROC +161 0x000A //RX_FRAME_SZ +162 0x0000 //RX_DELAY_OPT +163 0x3000 //RX_TDDRC_ALPHA_UP_1 +164 0x3000 //RX_TDDRC_ALPHA_UP_2 +165 0x3000 //RX_TDDRC_ALPHA_UP_3 +166 0x3000 //RX_TDDRC_ALPHA_UP_4 +167 0x050D //RX_PGA +168 0x7652 //RX_A_HP +169 0x4000 //RX_B_PE +170 0x7800 //RX_THR_PITCH_DET_0 +171 0x7000 //RX_THR_PITCH_DET_1 +172 0x6000 //RX_THR_PITCH_DET_2 +173 0x0000 //RX_PITCH_BFR_LEN +174 0x0000 //RX_SBD_PITCH_DET +175 0x0000 //RX_PP_RESRV_0 +176 0x0000 //RX_PP_RESRV_1 +177 0xF800 //RX_N_SN_EST +178 0x0000 //RX_N2_SN_EST +179 0x000F //RX_NS_LVL_CTRL +180 0xF800 //RX_THR_SN_EST +181 0x7E00 //RX_LAMBDA_PFILT +182 0x000A //RX_FENS_RESRV_0 +183 0x0000 //RX_FENS_RESRV_1 +184 0x7FB0 //RX_TDDRC_ALPHA_DWN_1 +185 0x7FB0 //RX_TDDRC_ALPHA_DWN_2 +186 0x7FB0 //RX_TDDRC_ALPHA_DWN_3 +187 0x0000 //RX_EXTRA_NS_L +188 0x0000 //RX_EXTRA_NS_A +189 0x7FB0 //RX_TDDRC_ALPHA_DWN_4 +190 0xDA9E //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +192 0x0000 //RX_A_POST_FLT +193 0x0000 //RX_LMT_THRD +194 0x4000 //RX_LMT_ALPHA +195 0x0020 //RX_FDEQ_SUBNUM +196 0x4848 //RX_FDEQ_GAIN_0 +197 0x4848 //RX_FDEQ_GAIN_1 +198 0x4848 //RX_FDEQ_GAIN_2 +199 0x4848 //RX_FDEQ_GAIN_3 +200 0x4848 //RX_FDEQ_GAIN_4 +201 0x4848 //RX_FDEQ_GAIN_5 +202 0x4848 //RX_FDEQ_GAIN_6 +203 0x4848 //RX_FDEQ_GAIN_7 +204 0x4848 //RX_FDEQ_GAIN_8 +205 0x4848 //RX_FDEQ_GAIN_9 +206 0x4848 //RX_FDEQ_GAIN_10 +207 0x4848 //RX_FDEQ_GAIN_11 +208 0x4848 //RX_FDEQ_GAIN_12 +209 0x4848 //RX_FDEQ_GAIN_13 +210 0x4848 //RX_FDEQ_GAIN_14 +211 0x4848 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0000 //RX_FDEQ_BIN_0 +221 0x0000 //RX_FDEQ_BIN_1 +222 0x0000 //RX_FDEQ_BIN_2 +223 0x0000 //RX_FDEQ_BIN_3 +224 0x0000 //RX_FDEQ_BIN_4 +225 0x0000 //RX_FDEQ_BIN_5 +226 0x0000 //RX_FDEQ_BIN_6 +227 0x0000 //RX_FDEQ_BIN_7 +228 0x0000 //RX_FDEQ_BIN_8 +229 0x0000 //RX_FDEQ_BIN_9 +230 0x0000 //RX_FDEQ_BIN_10 +231 0x0000 //RX_FDEQ_BIN_11 +232 0x0000 //RX_FDEQ_BIN_12 +233 0x0000 //RX_FDEQ_BIN_13 +234 0x0000 //RX_FDEQ_BIN_14 +235 0x0000 //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x0000 //RX_FDEQ_RESRV_0 +245 0x0000 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0030 //RX_FDDRC_BAND_MARGIN_1 +248 0x0050 //RX_FDDRC_BAND_MARGIN_2 +249 0x0080 //RX_FDDRC_BAND_MARGIN_3 +250 0x0004 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x5000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x6400 //RX_FDDRC_THRD_3_2 +258 0x6400 //RX_FDDRC_THRD_3_3 +259 0x2000 //RX_FDDRC_SLANT_0_0 +260 0x2000 //RX_FDDRC_SLANT_0_1 +261 0x2000 //RX_FDDRC_SLANT_0_2 +262 0x2000 //RX_FDDRC_SLANT_0_3 +263 0x2000 //RX_FDDRC_SLANT_1_0 +264 0x2000 //RX_FDDRC_SLANT_1_1 +265 0x2000 //RX_FDDRC_SLANT_1_2 +266 0x2000 //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +268 0x0003 //RX_FILTINDX +269 0x0000 //RX_TDDRC_THRD_0 +270 0x0000 //RX_TDDRC_THRD_1 +271 0x0E80 //RX_TDDRC_THRD_2 +272 0x3800 //RX_TDDRC_THRD_3 +273 0x2A00 //RX_TDDRC_SLANT_0 +274 0x6E00 //RX_TDDRC_SLANT_1 +275 0x3000 //RX_TDDRC_ALPHA_UP_0 +276 0x7FB0 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x0000 //RX_TDDRC_HMNC_GAIN +279 0x0000 //RX_TDDRC_SMT_FLAG +280 0x0000 //RX_TDDRC_SMT_W +281 0x0100 //RX_TDDRC_DRC_GAIN +282 0x7C00 //RX_LAMBDA_PKA_FP +283 0x2000 //RX_TPKA_FP +284 0x0080 //RX_MIN_G_FP +285 0x2000 //RX_MAX_G_FP +286 0x0100 //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 +288 0x0010 //RX_MAXLEVEL_CNG +289 0x0000 //RX_BWE_UV_TH +290 0x0000 //RX_BWE_UV_TH2 +291 0x0000 //RX_BWE_UV_TH3 +292 0x0000 //RX_BWE_V_TH +293 0x0000 //RX_BWE_GAIN1_V_TH1 +294 0x0000 //RX_BWE_GAIN1_V_TH2 +295 0x0000 //RX_BWE_UV_EQ +296 0x0000 //RX_BWE_V_EQ +297 0x0000 //RX_BWE_TONE_TH +298 0x0000 //RX_BWE_UV_HOLD_T +299 0x0000 //RX_BWE_GAIN2_ALPHA +300 0x0000 //RX_BWE_GAIN3_ALPHA +301 0x0000 //RX_BWE_CUTOFF +302 0x0000 //RX_BWE_GAINFILL +303 0x0000 //RX_BWE_MAXTH_TONE +304 0x0000 //RX_BWE_EQ_0 +305 0x0000 //RX_BWE_EQ_1 +306 0x0000 //RX_BWE_EQ_2 +307 0x0000 //RX_BWE_EQ_3 +308 0x0000 //RX_BWE_EQ_4 +309 0x0000 //RX_BWE_EQ_5 +310 0x0000 //RX_BWE_EQ_6 +311 0x0000 //RX_BWE_RESRV_0 +312 0x0000 //RX_BWE_RESRV_1 +313 0x0000 //RX_BWE_RESRV_2 +#VOL 0 +163 0x3000 //RX_TDDRC_ALPHA_UP_1 +164 0x3000 //RX_TDDRC_ALPHA_UP_2 +165 0x3000 //RX_TDDRC_ALPHA_UP_3 +166 0x3000 //RX_TDDRC_ALPHA_UP_4 +184 0x7FB0 //RX_TDDRC_ALPHA_DWN_1 +185 0x7FB0 //RX_TDDRC_ALPHA_DWN_2 +186 0x7FB0 //RX_TDDRC_ALPHA_DWN_3 +189 0x7FB0 //RX_TDDRC_ALPHA_DWN_4 +190 0xDA9E //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +269 0x0000 //RX_TDDRC_THRD_0 +270 0x0000 //RX_TDDRC_THRD_1 +271 0x0E80 //RX_TDDRC_THRD_2 +272 0x3800 //RX_TDDRC_THRD_3 +273 0x2A00 //RX_TDDRC_SLANT_0 +274 0x6E00 //RX_TDDRC_SLANT_1 +275 0x3000 //RX_TDDRC_ALPHA_UP_0 +276 0x7FB0 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x0000 //RX_TDDRC_HMNC_GAIN +279 0x0000 //RX_TDDRC_SMT_FLAG +280 0x0000 //RX_TDDRC_SMT_W +281 0x0100 //RX_TDDRC_DRC_GAIN +195 0x0020 //RX_FDEQ_SUBNUM +196 0x4848 //RX_FDEQ_GAIN_0 +197 0x4848 //RX_FDEQ_GAIN_1 +198 0x4848 //RX_FDEQ_GAIN_2 +199 0x4848 //RX_FDEQ_GAIN_3 +200 0x4848 //RX_FDEQ_GAIN_4 +201 0x4848 //RX_FDEQ_GAIN_5 +202 0x4848 //RX_FDEQ_GAIN_6 +203 0x4848 //RX_FDEQ_GAIN_7 +204 0x4848 //RX_FDEQ_GAIN_8 +205 0x4848 //RX_FDEQ_GAIN_9 +206 0x4848 //RX_FDEQ_GAIN_10 +207 0x4848 //RX_FDEQ_GAIN_11 +208 0x4848 //RX_FDEQ_GAIN_12 +209 0x4848 //RX_FDEQ_GAIN_13 +210 0x4848 //RX_FDEQ_GAIN_14 +211 0x4848 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0000 //RX_FDEQ_BIN_0 +221 0x0000 //RX_FDEQ_BIN_1 +222 0x0000 //RX_FDEQ_BIN_2 +223 0x0000 //RX_FDEQ_BIN_3 +224 0x0000 //RX_FDEQ_BIN_4 +225 0x0000 //RX_FDEQ_BIN_5 +226 0x0000 //RX_FDEQ_BIN_6 +227 0x0000 //RX_FDEQ_BIN_7 +228 0x0000 //RX_FDEQ_BIN_8 +229 0x0000 //RX_FDEQ_BIN_9 +230 0x0000 //RX_FDEQ_BIN_10 +231 0x0000 //RX_FDEQ_BIN_11 +232 0x0000 //RX_FDEQ_BIN_12 +233 0x0000 //RX_FDEQ_BIN_13 +234 0x0000 //RX_FDEQ_BIN_14 +235 0x0000 //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x0000 //RX_FDEQ_RESRV_0 +245 0x0000 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0030 //RX_FDDRC_BAND_MARGIN_1 +248 0x0050 //RX_FDDRC_BAND_MARGIN_2 +249 0x0080 //RX_FDDRC_BAND_MARGIN_3 +250 0x0004 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x5000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x6400 //RX_FDDRC_THRD_3_2 +258 0x6400 //RX_FDDRC_THRD_3_3 +259 0x2000 //RX_FDDRC_SLANT_0_0 +260 0x2000 //RX_FDDRC_SLANT_0_1 +261 0x2000 //RX_FDDRC_SLANT_0_2 +262 0x2000 //RX_FDDRC_SLANT_0_3 +263 0x2000 //RX_FDDRC_SLANT_1_0 +264 0x2000 //RX_FDDRC_SLANT_1_1 +265 0x2000 //RX_FDDRC_SLANT_1_2 +266 0x2000 //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +286 0x0100 //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 +#VOL 1 +163 0x3000 //RX_TDDRC_ALPHA_UP_1 +164 0x3000 //RX_TDDRC_ALPHA_UP_2 +165 0x3000 //RX_TDDRC_ALPHA_UP_3 +166 0x3000 //RX_TDDRC_ALPHA_UP_4 +184 0x7FB0 //RX_TDDRC_ALPHA_DWN_1 +185 0x7FB0 //RX_TDDRC_ALPHA_DWN_2 +186 0x7FB0 //RX_TDDRC_ALPHA_DWN_3 +189 0x7FB0 //RX_TDDRC_ALPHA_DWN_4 +190 0xDA9E //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +269 0x0000 //RX_TDDRC_THRD_0 +270 0x0000 //RX_TDDRC_THRD_1 +271 0x0E80 //RX_TDDRC_THRD_2 +272 0x3800 //RX_TDDRC_THRD_3 +273 0x2A00 //RX_TDDRC_SLANT_0 +274 0x6E00 //RX_TDDRC_SLANT_1 +275 0x3000 //RX_TDDRC_ALPHA_UP_0 +276 0x7FB0 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x0000 //RX_TDDRC_HMNC_GAIN +279 0x0000 //RX_TDDRC_SMT_FLAG +280 0x0000 //RX_TDDRC_SMT_W +281 0x0100 //RX_TDDRC_DRC_GAIN +195 0x0020 //RX_FDEQ_SUBNUM +196 0x4848 //RX_FDEQ_GAIN_0 +197 0x4848 //RX_FDEQ_GAIN_1 +198 0x4848 //RX_FDEQ_GAIN_2 +199 0x4848 //RX_FDEQ_GAIN_3 +200 0x4848 //RX_FDEQ_GAIN_4 +201 0x4848 //RX_FDEQ_GAIN_5 +202 0x4848 //RX_FDEQ_GAIN_6 +203 0x4848 //RX_FDEQ_GAIN_7 +204 0x4848 //RX_FDEQ_GAIN_8 +205 0x4848 //RX_FDEQ_GAIN_9 +206 0x4848 //RX_FDEQ_GAIN_10 +207 0x4848 //RX_FDEQ_GAIN_11 +208 0x4848 //RX_FDEQ_GAIN_12 +209 0x4848 //RX_FDEQ_GAIN_13 +210 0x4848 //RX_FDEQ_GAIN_14 +211 0x4848 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0000 //RX_FDEQ_BIN_0 +221 0x0000 //RX_FDEQ_BIN_1 +222 0x0000 //RX_FDEQ_BIN_2 +223 0x0000 //RX_FDEQ_BIN_3 +224 0x0000 //RX_FDEQ_BIN_4 +225 0x0000 //RX_FDEQ_BIN_5 +226 0x0000 //RX_FDEQ_BIN_6 +227 0x0000 //RX_FDEQ_BIN_7 +228 0x0000 //RX_FDEQ_BIN_8 +229 0x0000 //RX_FDEQ_BIN_9 +230 0x0000 //RX_FDEQ_BIN_10 +231 0x0000 //RX_FDEQ_BIN_11 +232 0x0000 //RX_FDEQ_BIN_12 +233 0x0000 //RX_FDEQ_BIN_13 +234 0x0000 //RX_FDEQ_BIN_14 +235 0x0000 //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x0000 //RX_FDEQ_RESRV_0 +245 0x0000 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0030 //RX_FDDRC_BAND_MARGIN_1 +248 0x0050 //RX_FDDRC_BAND_MARGIN_2 +249 0x0080 //RX_FDDRC_BAND_MARGIN_3 +250 0x0004 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x5000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x6400 //RX_FDDRC_THRD_3_2 +258 0x6400 //RX_FDDRC_THRD_3_3 +259 0x2000 //RX_FDDRC_SLANT_0_0 +260 0x2000 //RX_FDDRC_SLANT_0_1 +261 0x2000 //RX_FDDRC_SLANT_0_2 +262 0x2000 //RX_FDDRC_SLANT_0_3 +263 0x2000 //RX_FDDRC_SLANT_1_0 +264 0x2000 //RX_FDDRC_SLANT_1_1 +265 0x2000 //RX_FDDRC_SLANT_1_2 +266 0x2000 //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +286 0x0100 //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 +#VOL 2 +163 0x3000 //RX_TDDRC_ALPHA_UP_1 +164 0x3000 //RX_TDDRC_ALPHA_UP_2 +165 0x3000 //RX_TDDRC_ALPHA_UP_3 +166 0x3000 //RX_TDDRC_ALPHA_UP_4 +184 0x7FB0 //RX_TDDRC_ALPHA_DWN_1 +185 0x7FB0 //RX_TDDRC_ALPHA_DWN_2 +186 0x7FB0 //RX_TDDRC_ALPHA_DWN_3 +189 0x7FB0 //RX_TDDRC_ALPHA_DWN_4 +190 0xDA9E //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +269 0x0000 //RX_TDDRC_THRD_0 +270 0x0000 //RX_TDDRC_THRD_1 +271 0x0E80 //RX_TDDRC_THRD_2 +272 0x3800 //RX_TDDRC_THRD_3 +273 0x2A00 //RX_TDDRC_SLANT_0 +274 0x6E00 //RX_TDDRC_SLANT_1 +275 0x3000 //RX_TDDRC_ALPHA_UP_0 +276 0x7FB0 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x0000 //RX_TDDRC_HMNC_GAIN +279 0x0000 //RX_TDDRC_SMT_FLAG +280 0x0000 //RX_TDDRC_SMT_W +281 0x0100 //RX_TDDRC_DRC_GAIN +195 0x0020 //RX_FDEQ_SUBNUM +196 0x4848 //RX_FDEQ_GAIN_0 +197 0x4848 //RX_FDEQ_GAIN_1 +198 0x4848 //RX_FDEQ_GAIN_2 +199 0x4848 //RX_FDEQ_GAIN_3 +200 0x4848 //RX_FDEQ_GAIN_4 +201 0x4848 //RX_FDEQ_GAIN_5 +202 0x4848 //RX_FDEQ_GAIN_6 +203 0x4848 //RX_FDEQ_GAIN_7 +204 0x4848 //RX_FDEQ_GAIN_8 +205 0x4848 //RX_FDEQ_GAIN_9 +206 0x4848 //RX_FDEQ_GAIN_10 +207 0x4848 //RX_FDEQ_GAIN_11 +208 0x4848 //RX_FDEQ_GAIN_12 +209 0x4848 //RX_FDEQ_GAIN_13 +210 0x4848 //RX_FDEQ_GAIN_14 +211 0x4848 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0000 //RX_FDEQ_BIN_0 +221 0x0000 //RX_FDEQ_BIN_1 +222 0x0000 //RX_FDEQ_BIN_2 +223 0x0000 //RX_FDEQ_BIN_3 +224 0x0000 //RX_FDEQ_BIN_4 +225 0x0000 //RX_FDEQ_BIN_5 +226 0x0000 //RX_FDEQ_BIN_6 +227 0x0000 //RX_FDEQ_BIN_7 +228 0x0000 //RX_FDEQ_BIN_8 +229 0x0000 //RX_FDEQ_BIN_9 +230 0x0000 //RX_FDEQ_BIN_10 +231 0x0000 //RX_FDEQ_BIN_11 +232 0x0000 //RX_FDEQ_BIN_12 +233 0x0000 //RX_FDEQ_BIN_13 +234 0x0000 //RX_FDEQ_BIN_14 +235 0x0000 //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x0000 //RX_FDEQ_RESRV_0 +245 0x0000 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0030 //RX_FDDRC_BAND_MARGIN_1 +248 0x0050 //RX_FDDRC_BAND_MARGIN_2 +249 0x0080 //RX_FDDRC_BAND_MARGIN_3 +250 0x0004 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x5000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x6400 //RX_FDDRC_THRD_3_2 +258 0x6400 //RX_FDDRC_THRD_3_3 +259 0x2000 //RX_FDDRC_SLANT_0_0 +260 0x2000 //RX_FDDRC_SLANT_0_1 +261 0x2000 //RX_FDDRC_SLANT_0_2 +262 0x2000 //RX_FDDRC_SLANT_0_3 +263 0x2000 //RX_FDDRC_SLANT_1_0 +264 0x2000 //RX_FDDRC_SLANT_1_1 +265 0x2000 //RX_FDDRC_SLANT_1_2 +266 0x2000 //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +286 0x0100 //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 +#VOL 3 +163 0x3000 //RX_TDDRC_ALPHA_UP_1 +164 0x3000 //RX_TDDRC_ALPHA_UP_2 +165 0x3000 //RX_TDDRC_ALPHA_UP_3 +166 0x3000 //RX_TDDRC_ALPHA_UP_4 +184 0x7FB0 //RX_TDDRC_ALPHA_DWN_1 +185 0x7FB0 //RX_TDDRC_ALPHA_DWN_2 +186 0x7FB0 //RX_TDDRC_ALPHA_DWN_3 +189 0x7FB0 //RX_TDDRC_ALPHA_DWN_4 +190 0xDA9E //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +269 0x0000 //RX_TDDRC_THRD_0 +270 0x0000 //RX_TDDRC_THRD_1 +271 0x0E80 //RX_TDDRC_THRD_2 +272 0x3800 //RX_TDDRC_THRD_3 +273 0x2A00 //RX_TDDRC_SLANT_0 +274 0x6E00 //RX_TDDRC_SLANT_1 +275 0x3000 //RX_TDDRC_ALPHA_UP_0 +276 0x7FB0 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x0000 //RX_TDDRC_HMNC_GAIN +279 0x0000 //RX_TDDRC_SMT_FLAG +280 0x0000 //RX_TDDRC_SMT_W +281 0x0100 //RX_TDDRC_DRC_GAIN +195 0x0020 //RX_FDEQ_SUBNUM +196 0x4848 //RX_FDEQ_GAIN_0 +197 0x4848 //RX_FDEQ_GAIN_1 +198 0x4848 //RX_FDEQ_GAIN_2 +199 0x4848 //RX_FDEQ_GAIN_3 +200 0x4848 //RX_FDEQ_GAIN_4 +201 0x4848 //RX_FDEQ_GAIN_5 +202 0x4848 //RX_FDEQ_GAIN_6 +203 0x4848 //RX_FDEQ_GAIN_7 +204 0x4848 //RX_FDEQ_GAIN_8 +205 0x4848 //RX_FDEQ_GAIN_9 +206 0x4848 //RX_FDEQ_GAIN_10 +207 0x4848 //RX_FDEQ_GAIN_11 +208 0x4848 //RX_FDEQ_GAIN_12 +209 0x4848 //RX_FDEQ_GAIN_13 +210 0x4848 //RX_FDEQ_GAIN_14 +211 0x4848 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0000 //RX_FDEQ_BIN_0 +221 0x0000 //RX_FDEQ_BIN_1 +222 0x0000 //RX_FDEQ_BIN_2 +223 0x0000 //RX_FDEQ_BIN_3 +224 0x0000 //RX_FDEQ_BIN_4 +225 0x0000 //RX_FDEQ_BIN_5 +226 0x0000 //RX_FDEQ_BIN_6 +227 0x0000 //RX_FDEQ_BIN_7 +228 0x0000 //RX_FDEQ_BIN_8 +229 0x0000 //RX_FDEQ_BIN_9 +230 0x0000 //RX_FDEQ_BIN_10 +231 0x0000 //RX_FDEQ_BIN_11 +232 0x0000 //RX_FDEQ_BIN_12 +233 0x0000 //RX_FDEQ_BIN_13 +234 0x0000 //RX_FDEQ_BIN_14 +235 0x0000 //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x0000 //RX_FDEQ_RESRV_0 +245 0x0000 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0030 //RX_FDDRC_BAND_MARGIN_1 +248 0x0050 //RX_FDDRC_BAND_MARGIN_2 +249 0x0080 //RX_FDDRC_BAND_MARGIN_3 +250 0x0004 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x5000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x6400 //RX_FDDRC_THRD_3_2 +258 0x6400 //RX_FDDRC_THRD_3_3 +259 0x2000 //RX_FDDRC_SLANT_0_0 +260 0x2000 //RX_FDDRC_SLANT_0_1 +261 0x2000 //RX_FDDRC_SLANT_0_2 +262 0x2000 //RX_FDDRC_SLANT_0_3 +263 0x2000 //RX_FDDRC_SLANT_1_0 +264 0x2000 //RX_FDDRC_SLANT_1_1 +265 0x2000 //RX_FDDRC_SLANT_1_2 +266 0x2000 //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +286 0x0100 //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 +#VOL 4 +163 0x3000 //RX_TDDRC_ALPHA_UP_1 +164 0x3000 //RX_TDDRC_ALPHA_UP_2 +165 0x3000 //RX_TDDRC_ALPHA_UP_3 +166 0x3000 //RX_TDDRC_ALPHA_UP_4 +184 0x7FB0 //RX_TDDRC_ALPHA_DWN_1 +185 0x7FB0 //RX_TDDRC_ALPHA_DWN_2 +186 0x7FB0 //RX_TDDRC_ALPHA_DWN_3 +189 0x7FB0 //RX_TDDRC_ALPHA_DWN_4 +190 0xDA9E //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +269 0x0000 //RX_TDDRC_THRD_0 +270 0x0000 //RX_TDDRC_THRD_1 +271 0x0E80 //RX_TDDRC_THRD_2 +272 0x3800 //RX_TDDRC_THRD_3 +273 0x2A00 //RX_TDDRC_SLANT_0 +274 0x6E00 //RX_TDDRC_SLANT_1 +275 0x3000 //RX_TDDRC_ALPHA_UP_0 +276 0x7FB0 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x0000 //RX_TDDRC_HMNC_GAIN +279 0x0000 //RX_TDDRC_SMT_FLAG +280 0x0000 //RX_TDDRC_SMT_W +281 0x0100 //RX_TDDRC_DRC_GAIN +195 0x0020 //RX_FDEQ_SUBNUM +196 0x4848 //RX_FDEQ_GAIN_0 +197 0x4848 //RX_FDEQ_GAIN_1 +198 0x4848 //RX_FDEQ_GAIN_2 +199 0x4848 //RX_FDEQ_GAIN_3 +200 0x4848 //RX_FDEQ_GAIN_4 +201 0x4848 //RX_FDEQ_GAIN_5 +202 0x4848 //RX_FDEQ_GAIN_6 +203 0x4848 //RX_FDEQ_GAIN_7 +204 0x4848 //RX_FDEQ_GAIN_8 +205 0x4848 //RX_FDEQ_GAIN_9 +206 0x4848 //RX_FDEQ_GAIN_10 +207 0x4848 //RX_FDEQ_GAIN_11 +208 0x4848 //RX_FDEQ_GAIN_12 +209 0x4848 //RX_FDEQ_GAIN_13 +210 0x4848 //RX_FDEQ_GAIN_14 +211 0x4848 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0000 //RX_FDEQ_BIN_0 +221 0x0000 //RX_FDEQ_BIN_1 +222 0x0000 //RX_FDEQ_BIN_2 +223 0x0000 //RX_FDEQ_BIN_3 +224 0x0000 //RX_FDEQ_BIN_4 +225 0x0000 //RX_FDEQ_BIN_5 +226 0x0000 //RX_FDEQ_BIN_6 +227 0x0000 //RX_FDEQ_BIN_7 +228 0x0000 //RX_FDEQ_BIN_8 +229 0x0000 //RX_FDEQ_BIN_9 +230 0x0000 //RX_FDEQ_BIN_10 +231 0x0000 //RX_FDEQ_BIN_11 +232 0x0000 //RX_FDEQ_BIN_12 +233 0x0000 //RX_FDEQ_BIN_13 +234 0x0000 //RX_FDEQ_BIN_14 +235 0x0000 //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x0000 //RX_FDEQ_RESRV_0 +245 0x0000 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0030 //RX_FDDRC_BAND_MARGIN_1 +248 0x0050 //RX_FDDRC_BAND_MARGIN_2 +249 0x0080 //RX_FDDRC_BAND_MARGIN_3 +250 0x0004 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x5000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x6400 //RX_FDDRC_THRD_3_2 +258 0x6400 //RX_FDDRC_THRD_3_3 +259 0x2000 //RX_FDDRC_SLANT_0_0 +260 0x2000 //RX_FDDRC_SLANT_0_1 +261 0x2000 //RX_FDDRC_SLANT_0_2 +262 0x2000 //RX_FDDRC_SLANT_0_3 +263 0x2000 //RX_FDDRC_SLANT_1_0 +264 0x2000 //RX_FDDRC_SLANT_1_1 +265 0x2000 //RX_FDDRC_SLANT_1_2 +266 0x2000 //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +286 0x0100 //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 +#VOL 5 +163 0x3000 //RX_TDDRC_ALPHA_UP_1 +164 0x3000 //RX_TDDRC_ALPHA_UP_2 +165 0x3000 //RX_TDDRC_ALPHA_UP_3 +166 0x3000 //RX_TDDRC_ALPHA_UP_4 +184 0x7FB0 //RX_TDDRC_ALPHA_DWN_1 +185 0x7FB0 //RX_TDDRC_ALPHA_DWN_2 +186 0x7FB0 //RX_TDDRC_ALPHA_DWN_3 +189 0x7FB0 //RX_TDDRC_ALPHA_DWN_4 +190 0xDA9E //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +269 0x0000 //RX_TDDRC_THRD_0 +270 0x0000 //RX_TDDRC_THRD_1 +271 0x0E80 //RX_TDDRC_THRD_2 +272 0x3800 //RX_TDDRC_THRD_3 +273 0x2A00 //RX_TDDRC_SLANT_0 +274 0x6E00 //RX_TDDRC_SLANT_1 +275 0x3000 //RX_TDDRC_ALPHA_UP_0 +276 0x7FB0 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x0000 //RX_TDDRC_HMNC_GAIN +279 0x0000 //RX_TDDRC_SMT_FLAG +280 0x0000 //RX_TDDRC_SMT_W +281 0x0100 //RX_TDDRC_DRC_GAIN +195 0x0020 //RX_FDEQ_SUBNUM +196 0x4848 //RX_FDEQ_GAIN_0 +197 0x4848 //RX_FDEQ_GAIN_1 +198 0x4848 //RX_FDEQ_GAIN_2 +199 0x4848 //RX_FDEQ_GAIN_3 +200 0x4848 //RX_FDEQ_GAIN_4 +201 0x4848 //RX_FDEQ_GAIN_5 +202 0x4848 //RX_FDEQ_GAIN_6 +203 0x4848 //RX_FDEQ_GAIN_7 +204 0x4848 //RX_FDEQ_GAIN_8 +205 0x4848 //RX_FDEQ_GAIN_9 +206 0x4848 //RX_FDEQ_GAIN_10 +207 0x4848 //RX_FDEQ_GAIN_11 +208 0x4848 //RX_FDEQ_GAIN_12 +209 0x4848 //RX_FDEQ_GAIN_13 +210 0x4848 //RX_FDEQ_GAIN_14 +211 0x4848 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0000 //RX_FDEQ_BIN_0 +221 0x0000 //RX_FDEQ_BIN_1 +222 0x0000 //RX_FDEQ_BIN_2 +223 0x0000 //RX_FDEQ_BIN_3 +224 0x0000 //RX_FDEQ_BIN_4 +225 0x0000 //RX_FDEQ_BIN_5 +226 0x0000 //RX_FDEQ_BIN_6 +227 0x0000 //RX_FDEQ_BIN_7 +228 0x0000 //RX_FDEQ_BIN_8 +229 0x0000 //RX_FDEQ_BIN_9 +230 0x0000 //RX_FDEQ_BIN_10 +231 0x0000 //RX_FDEQ_BIN_11 +232 0x0000 //RX_FDEQ_BIN_12 +233 0x0000 //RX_FDEQ_BIN_13 +234 0x0000 //RX_FDEQ_BIN_14 +235 0x0000 //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x0000 //RX_FDEQ_RESRV_0 +245 0x0000 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0030 //RX_FDDRC_BAND_MARGIN_1 +248 0x0050 //RX_FDDRC_BAND_MARGIN_2 +249 0x0080 //RX_FDDRC_BAND_MARGIN_3 +250 0x0004 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x5000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x6400 //RX_FDDRC_THRD_3_2 +258 0x6400 //RX_FDDRC_THRD_3_3 +259 0x2000 //RX_FDDRC_SLANT_0_0 +260 0x2000 //RX_FDDRC_SLANT_0_1 +261 0x2000 //RX_FDDRC_SLANT_0_2 +262 0x2000 //RX_FDDRC_SLANT_0_3 +263 0x2000 //RX_FDDRC_SLANT_1_0 +264 0x2000 //RX_FDDRC_SLANT_1_1 +265 0x2000 //RX_FDDRC_SLANT_1_2 +266 0x2000 //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +286 0x0100 //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 +#VOL 6 +163 0x3000 //RX_TDDRC_ALPHA_UP_1 +164 0x3000 //RX_TDDRC_ALPHA_UP_2 +165 0x3000 //RX_TDDRC_ALPHA_UP_3 +166 0x3000 //RX_TDDRC_ALPHA_UP_4 +184 0x7FB0 //RX_TDDRC_ALPHA_DWN_1 +185 0x7FB0 //RX_TDDRC_ALPHA_DWN_2 +186 0x7FB0 //RX_TDDRC_ALPHA_DWN_3 +189 0x7FB0 //RX_TDDRC_ALPHA_DWN_4 +190 0xDA9E //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +269 0x0000 //RX_TDDRC_THRD_0 +270 0x0000 //RX_TDDRC_THRD_1 +271 0x0E80 //RX_TDDRC_THRD_2 +272 0x3800 //RX_TDDRC_THRD_3 +273 0x2A00 //RX_TDDRC_SLANT_0 +274 0x6E00 //RX_TDDRC_SLANT_1 +275 0x3000 //RX_TDDRC_ALPHA_UP_0 +276 0x7FB0 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x0000 //RX_TDDRC_HMNC_GAIN +279 0x0000 //RX_TDDRC_SMT_FLAG +280 0x0000 //RX_TDDRC_SMT_W +281 0x0100 //RX_TDDRC_DRC_GAIN +195 0x0020 //RX_FDEQ_SUBNUM +196 0x4848 //RX_FDEQ_GAIN_0 +197 0x4848 //RX_FDEQ_GAIN_1 +198 0x4848 //RX_FDEQ_GAIN_2 +199 0x4848 //RX_FDEQ_GAIN_3 +200 0x4848 //RX_FDEQ_GAIN_4 +201 0x4848 //RX_FDEQ_GAIN_5 +202 0x4848 //RX_FDEQ_GAIN_6 +203 0x4848 //RX_FDEQ_GAIN_7 +204 0x4848 //RX_FDEQ_GAIN_8 +205 0x4848 //RX_FDEQ_GAIN_9 +206 0x4848 //RX_FDEQ_GAIN_10 +207 0x4848 //RX_FDEQ_GAIN_11 +208 0x4848 //RX_FDEQ_GAIN_12 +209 0x4848 //RX_FDEQ_GAIN_13 +210 0x4848 //RX_FDEQ_GAIN_14 +211 0x4848 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0000 //RX_FDEQ_BIN_0 +221 0x0000 //RX_FDEQ_BIN_1 +222 0x0000 //RX_FDEQ_BIN_2 +223 0x0000 //RX_FDEQ_BIN_3 +224 0x0000 //RX_FDEQ_BIN_4 +225 0x0000 //RX_FDEQ_BIN_5 +226 0x0000 //RX_FDEQ_BIN_6 +227 0x0000 //RX_FDEQ_BIN_7 +228 0x0000 //RX_FDEQ_BIN_8 +229 0x0000 //RX_FDEQ_BIN_9 +230 0x0000 //RX_FDEQ_BIN_10 +231 0x0000 //RX_FDEQ_BIN_11 +232 0x0000 //RX_FDEQ_BIN_12 +233 0x0000 //RX_FDEQ_BIN_13 +234 0x0000 //RX_FDEQ_BIN_14 +235 0x0000 //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x0000 //RX_FDEQ_RESRV_0 +245 0x0000 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0030 //RX_FDDRC_BAND_MARGIN_1 +248 0x0050 //RX_FDDRC_BAND_MARGIN_2 +249 0x0080 //RX_FDDRC_BAND_MARGIN_3 +250 0x0004 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x5000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x6400 //RX_FDDRC_THRD_3_2 +258 0x6400 //RX_FDDRC_THRD_3_3 +259 0x2000 //RX_FDDRC_SLANT_0_0 +260 0x2000 //RX_FDDRC_SLANT_0_1 +261 0x2000 //RX_FDDRC_SLANT_0_2 +262 0x2000 //RX_FDDRC_SLANT_0_3 +263 0x2000 //RX_FDDRC_SLANT_1_0 +264 0x2000 //RX_FDDRC_SLANT_1_1 +265 0x2000 //RX_FDDRC_SLANT_1_2 +266 0x2000 //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +286 0x0100 //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 #CASE_NAME HEADSET-TTY_VCO-VOICE_GENERIC-FB -#PARAM_MODE FULL -#PARAM_TYPE TX+RX -#TOTAL_CUSTOM_STEP 7 +#PARAM_MODE Full +#PARAM_TYPE TX+2RX +#TOTAL_CUSTOM_STEP 7+7 #TX 0 0x0001 //TX_OPERATION_MODE_0 1 0x0001 //TX_OPERATION_MODE_1 2 0x0033 //TX_PATCH_REG -3 0x4B7C //TX_SENDFUNC_MODE_0 +3 0x6B7C //TX_SENDFUNC_MODE_0 4 0x0001 //TX_SENDFUNC_MODE_1 -5 0x0003 //TX_NUM_MIC +5 0x0002 //TX_NUM_MIC 6 0x0004 //TX_SAMPLINGFREQ_SIG 7 0x0004 //TX_SAMPLINGFREQ_PROC 8 0x000A //TX_FRAME_SZ_SIG @@ -47387,15 +72119,15 @@ 18 0x0000 //TX_SYS_RESRV_2 19 0x0000 //TX_SYS_RESRV_3 20 0x0000 //TX_DIST2REF0 -21 0x00A4 //TX_DIST2REF1 -22 0x0017 //TX_DIST2REF_02 +21 0x009D //TX_DIST2REF1 +22 0x0010 //TX_DIST2REF_02 23 0x0000 //TX_DIST2REF_03 24 0x0000 //TX_DIST2REF_04 25 0x0000 //TX_DIST2REF_05 26 0x0000 //TX_MMIC -27 0x0FF7 //TX_PGA_0 -28 0x0FF7 //TX_PGA_1 -29 0x0FF7 //TX_PGA_2 +27 0x1000 //TX_PGA_0 +28 0x1000 //TX_PGA_1 +29 0x1000 //TX_PGA_2 30 0x0000 //TX_PGA_3 31 0x0000 //TX_PGA_4 32 0x0000 //TX_PGA_5 @@ -47531,7 +72263,7 @@ 162 0x7FFF //TX_MIN_EQ_RE_EST_10 163 0x7FFF //TX_MIN_EQ_RE_EST_11 164 0x7FFF //TX_MIN_EQ_RE_EST_12 -165 0x4000 //TX_LAMBDA_RE_EST +165 0x0700 //TX_LAMBDA_RE_EST 166 0x0CCD //TX_LAMBDA_CB_NLE 167 0x2000 //TX_C_POST_FLT 168 0x7FFF //TX_GAIN_NP @@ -47591,16 +72323,16 @@ 222 0x023E //TX_ADPT_STRICT_H 223 0x0BB8 //TX_RATIO_DT_L_TH_LOW 224 0x3A98 //TX_RATIO_DT_H_TH_LOW -225 0x1770 //TX_RATIO_DT_L_TH_HIGH +225 0x1194 //TX_RATIO_DT_L_TH_HIGH 226 0x4E20 //TX_RATIO_DT_H_TH_HIGH 227 0x09C4 //TX_RATIO_DT_L0_TH -228 0x2000 //TX_B_POST_FILT_ECHO_L +228 0x7FFF //TX_B_POST_FILT_ECHO_L 229 0x2000 //TX_B_POST_FILT_ECHO_H 230 0x0200 //TX_MIN_G_CTRL_ECHO 231 0x1000 //TX_B_LESSCUT_RTO_ECHO -232 0x0000 //TX_EPD_OFFSET_00 +232 0x0063 //TX_EPD_OFFSET_00 233 0x0000 //TX_EPD_OFFST_01 -234 0x1388 //TX_RATIO_DT_L0_TH_HIGH +234 0x0A28 //TX_RATIO_DT_L0_TH_HIGH 235 0x3A98 //TX_RATIO_DT_H_TH_CUT 236 0x7FFF //TX_MIN_EQ_RE_EST_13 237 0x0000 //TX_DTD_THR1_7 @@ -47608,7 +72340,7 @@ 239 0x0800 //TX_DT_RESRV_7 240 0x0800 //TX_DT_RESRV_8 241 0x0000 //TX_DT_RESRV_9 -242 0xF800 //TX_THR_SN_EST_0 +242 0xF700 //TX_THR_SN_EST_0 243 0xFA00 //TX_THR_SN_EST_1 244 0xFA00 //TX_THR_SN_EST_2 245 0xFB00 //TX_THR_SN_EST_3 @@ -47617,11 +72349,11 @@ 248 0xF800 //TX_THR_SN_EST_6 249 0xF800 //TX_THR_SN_EST_7 250 0x0100 //TX_DELTA_THR_SN_EST_0 -251 0x0200 //TX_DELTA_THR_SN_EST_1 -252 0x0100 //TX_DELTA_THR_SN_EST_2 -253 0x0200 //TX_DELTA_THR_SN_EST_3 +251 0x0100 //TX_DELTA_THR_SN_EST_1 +252 0x0200 //TX_DELTA_THR_SN_EST_2 +253 0x0100 //TX_DELTA_THR_SN_EST_3 254 0x0100 //TX_DELTA_THR_SN_EST_4 -255 0x0100 //TX_DELTA_THR_SN_EST_5 +255 0x0200 //TX_DELTA_THR_SN_EST_5 256 0x0200 //TX_DELTA_THR_SN_EST_6 257 0x0200 //TX_DELTA_THR_SN_EST_7 258 0x4000 //TX_LAMBDA_NN_EST_0 @@ -47649,11 +72381,11 @@ 280 0x1000 //TX_B_POST_FLT_1 281 0x0010 //TX_NS_LVL_CTRL_0 282 0x0014 //TX_NS_LVL_CTRL_1 -283 0x0014 //TX_NS_LVL_CTRL_2 -284 0x0018 //TX_NS_LVL_CTRL_3 -285 0x0016 //TX_NS_LVL_CTRL_4 -286 0x0014 //TX_NS_LVL_CTRL_5 -287 0x0011 //TX_NS_LVL_CTRL_6 +283 0x0018 //TX_NS_LVL_CTRL_2 +284 0x0016 //TX_NS_LVL_CTRL_3 +285 0x0014 //TX_NS_LVL_CTRL_4 +286 0x0011 //TX_NS_LVL_CTRL_5 +287 0x0014 //TX_NS_LVL_CTRL_6 288 0x0011 //TX_NS_LVL_CTRL_7 289 0x000F //TX_MIN_GAIN_S_0 290 0x0010 //TX_MIN_GAIN_S_1 @@ -47671,8 +72403,8 @@ 302 0x4000 //TX_SNRI_SUP_2 303 0x4000 //TX_SNRI_SUP_3 304 0x4000 //TX_SNRI_SUP_4 -305 0x4000 //TX_SNRI_SUP_5 -306 0x50C0 //TX_SNRI_SUP_6 +305 0x50C0 //TX_SNRI_SUP_5 +306 0x4000 //TX_SNRI_SUP_6 307 0x7FFF //TX_SNRI_SUP_7 308 0x7FFF //TX_THR_LFNS 309 0x0018 //TX_G_LFNS @@ -47681,19 +72413,19 @@ 312 0x7FFF //TX_A_POST_FILT_0 313 0x2000 //TX_A_POST_FILT_1 314 0x5000 //TX_A_POST_FILT_S_0 -315 0x6000 //TX_A_POST_FILT_S_1 -316 0x4C00 //TX_A_POST_FILT_S_2 -317 0x4000 //TX_A_POST_FILT_S_3 -318 0x6000 //TX_A_POST_FILT_S_4 -319 0x4000 //TX_A_POST_FILT_S_5 -320 0x5000 //TX_A_POST_FILT_S_6 +315 0x4C00 //TX_A_POST_FILT_S_1 +316 0x4000 //TX_A_POST_FILT_S_2 +317 0x6000 //TX_A_POST_FILT_S_3 +318 0x4000 //TX_A_POST_FILT_S_4 +319 0x5000 //TX_A_POST_FILT_S_5 +320 0x6000 //TX_A_POST_FILT_S_6 321 0x7000 //TX_A_POST_FILT_S_7 322 0x2000 //TX_B_POST_FILT_0 -323 0x1000 //TX_B_POST_FILT_1 +323 0x2000 //TX_B_POST_FILT_1 324 0x2000 //TX_B_POST_FILT_2 -325 0x2000 //TX_B_POST_FILT_3 +325 0x4000 //TX_B_POST_FILT_3 326 0x4000 //TX_B_POST_FILT_4 -327 0x4000 //TX_B_POST_FILT_5 +327 0x1000 //TX_B_POST_FILT_5 328 0x1000 //TX_B_POST_FILT_6 329 0x2000 //TX_B_POST_FILT_7 330 0x4000 //TX_B_LESSCUT_RTO_S_0 @@ -47701,26 +72433,26 @@ 332 0x7FFF //TX_B_LESSCUT_RTO_S_2 333 0x7FFF //TX_B_LESSCUT_RTO_S_3 334 0x7FFF //TX_B_LESSCUT_RTO_S_4 -335 0x7FFF //TX_B_LESSCUT_RTO_S_5 -336 0x6000 //TX_B_LESSCUT_RTO_S_6 +335 0x6000 //TX_B_LESSCUT_RTO_S_5 +336 0x7FFF //TX_B_LESSCUT_RTO_S_6 337 0x7FFF //TX_B_LESSCUT_RTO_S_7 338 0x7C00 //TX_LAMBDA_PFILT 339 0x7C00 //TX_LAMBDA_PFILT_S_0 340 0x7C00 //TX_LAMBDA_PFILT_S_1 -341 0x7C00 //TX_LAMBDA_PFILT_S_2 -342 0x7A00 //TX_LAMBDA_PFILT_S_3 +341 0x7A00 //TX_LAMBDA_PFILT_S_2 +342 0x7C00 //TX_LAMBDA_PFILT_S_3 343 0x7C00 //TX_LAMBDA_PFILT_S_4 344 0x7C00 //TX_LAMBDA_PFILT_S_5 345 0x7C00 //TX_LAMBDA_PFILT_S_6 346 0x7C00 //TX_LAMBDA_PFILT_S_7 -347 0x0000 //TX_K_PEPPER +347 0x0180 //TX_K_PEPPER 348 0x0800 //TX_A_PEPPER 349 0x1EAA //TX_K_PEPPER_HF 350 0x0600 //TX_A_PEPPER_HF 351 0x0001 //TX_HMNC_BST_FLG 352 0x0200 //TX_HMNC_BST_THR -353 0x0200 //TX_DT_BINVAD_TH_0 -354 0x0200 //TX_DT_BINVAD_TH_1 +353 0x2000 //TX_DT_BINVAD_TH_0 +354 0x0800 //TX_DT_BINVAD_TH_1 355 0x0200 //TX_DT_BINVAD_TH_2 356 0x0200 //TX_DT_BINVAD_TH_3 357 0x1F40 //TX_DT_BINVAD_ENDF @@ -47733,7 +72465,7 @@ 364 0x0000 //TX_K_APT 365 0x0001 //TX_NOISEDET 366 0x0064 //TX_NDETCT -367 0x0050 //TX_NOISE_TH_0 +367 0x04E8 //TX_NOISE_TH_0 368 0x7FFF //TX_NOISE_TH_0_2 369 0x7FFF //TX_NOISE_TH_0_3 370 0x07D0 //TX_NOISE_TH_1 @@ -47745,11 +72477,11 @@ 376 0x0000 //TX_NOISE_TH_5_3 377 0x7FFF //TX_NOISE_TH_5_4 378 0x2710 //TX_NOISE_TH_6 -379 0x0033 //TX_MINENOISE_TH -380 0x4000 //TX_MINENOISE_MIC0_TH_MTS -381 0xFFEE //TX_MINENOISE_MIC0_TH_EXP -382 0x6000 //TX_MINENOISE_MIC0_S_TH_MTS -383 0xFFF3 //TX_MINENOISE_MIC0_S_TH_EXP +379 0x02BC //TX_MINENOISE_TH +380 0xD508 //TX_MORENS_TFMASK_TH +381 0x0001 //TX_DRC_QUIET_FLOOR +382 0x3A98 //TX_RATIODTL_CUT_TH +383 0x1482 //TX_DT_CUT_K1 384 0x0666 //TX_OUT_ENER_S_TH_CLEAN 385 0x0666 //TX_OUT_ENER_S_TH_LESSCLEAN 386 0x0333 //TX_OUT_ENER_S_TH_NOISY @@ -47757,22 +72489,22 @@ 388 0x0333 //TX_OUT_ENER_TH_SPEECH 389 0x2000 //TX_SN_NPB_GAIN 390 0x0000 //TX_NN_NPB_GAIN -391 0x0000 //TX_CSX_ALPHA_0 -392 0x0000 //TX_CSX_ALPHA_1 -393 0x0000 //TX_CSX_ALPHA_2 -394 0x0000 //TX_CSX_ALPHA_3 -395 0x0800 //TX_MU_ARSP_EST -396 0x00C8 //TX_P_OUTBEAM_MIN_TH +391 0x7FFF //TX_POST_MASK_SUP_HSNE +392 0x1388 //TX_TAIL_DET_TH +393 0x4000 //TX_B_LESSCUT_RTO_WTA +394 0x0000 //TX_MEL_G_R +395 0x0080 //TX_SUPHIGH_TH +396 0x0000 //TX_MASK_G_R 397 0x0002 //TX_EXTRA_NS_L -398 0x0800 //TX_EXTRA_NS_A -399 0x0005 //TX_VR_NOISE_FLOOR_TH +398 0x1800 //TX_C_POST_FLT_MASK +399 0x7FFF //TX_A_POST_FLT_WNS 400 0x0148 //TX_MIN_G_LOW300HZ -401 0x0002 //TX_MAXLEVEL_CNG +401 0x0004 //TX_MAXLEVEL_CNG 402 0x00B4 //TX_STN_NOISE_TH 403 0x4000 //TX_POST_MASK_SUP 404 0x7FFF //TX_POST_MASK_ADJUST 405 0x00C8 //TX_NS_ENOISE_MIC0_TH -406 0x0033 //TX_MINENOISE_MIC0_TH +406 0x04E7 //TX_MINENOISE_MIC0_TH 407 0x012C //TX_MINENOISE_MIC0_S_TH 408 0x7FFF //TX_MIN_G_CTRL_SSNS 409 0x0000 //TX_METAL_RTO_THR @@ -47880,16 +72612,16 @@ 511 0x6666 //TX_MIC_TO_BFGAIN 512 0x0000 //TX_MICTOBFGAIN0 513 0x0000 //TX_FASTMUE_TH -514 0x0000 //TX_DERVB_LEN_0 -515 0x0000 //TX_DERVB_LEN_1 -516 0x0000 //TX_RHO_DERVB -517 0x0000 //TX_MIC_INDX_DERVB -518 0x0000 //TX_MU_DERVB -519 0x0000 //TX_DR_RESRV_0 -520 0x0000 //TX_DR_RESRV_1 -521 0x0000 //TX_DR_RESRV_2 -522 0x0000 //TX_DR_RESRV_3 -523 0x0000 //TX_DR_RESRV_4 +514 0xC000 //TX_DEREVERB_LF_MU +515 0xC000 //TX_DEREVERB_HF_MU +516 0xCCCC //TX_DEREVERB_DELAY +517 0xD999 //TX_DEREVERB_COEF_LEN +518 0x1F40 //TX_DEREVERB_DNR +519 0x0000 //TX_DEREVERB_ALPHA +520 0x0000 //TX_DEREVERB_BETA +521 0x0000 //TX_GSC_RTOL_TH +522 0x7000 //TX_GSC_RTOH_TH +523 0x0064 //TX_WIDE2_MEANHTH 524 0x0000 //TX_DR_RESRV_5 525 0x0000 //TX_DR_RESRV_6 526 0x0000 //TX_DR_RESRV_7 @@ -47936,19 +72668,19 @@ 567 0x4848 //TX_FDEQ_GAIN_0 568 0x4848 //TX_FDEQ_GAIN_1 569 0x4848 //TX_FDEQ_GAIN_2 -570 0x4848 //TX_FDEQ_GAIN_3 -571 0x4848 //TX_FDEQ_GAIN_4 -572 0x4848 //TX_FDEQ_GAIN_5 -573 0x4848 //TX_FDEQ_GAIN_6 -574 0x4848 //TX_FDEQ_GAIN_7 -575 0x4848 //TX_FDEQ_GAIN_8 -576 0x4853 //TX_FDEQ_GAIN_9 -577 0x5450 //TX_FDEQ_GAIN_10 -578 0x7465 //TX_FDEQ_GAIN_11 -579 0x807F //TX_FDEQ_GAIN_12 -580 0x82C4 //TX_FDEQ_GAIN_13 -581 0xC4C4 //TX_FDEQ_GAIN_14 -582 0xC4C4 //TX_FDEQ_GAIN_15 +570 0x484C //TX_FDEQ_GAIN_3 +571 0x4C4C //TX_FDEQ_GAIN_4 +572 0x544C //TX_FDEQ_GAIN_5 +573 0x5454 //TX_FDEQ_GAIN_6 +574 0x5454 //TX_FDEQ_GAIN_7 +575 0x585A //TX_FDEQ_GAIN_8 +576 0x5C5C //TX_FDEQ_GAIN_9 +577 0x6068 //TX_FDEQ_GAIN_10 +578 0x8894 //TX_FDEQ_GAIN_11 +579 0x94B4 //TX_FDEQ_GAIN_12 +580 0xB4C7 //TX_FDEQ_GAIN_13 +581 0xC7C6 //TX_FDEQ_GAIN_14 +582 0xC6C6 //TX_FDEQ_GAIN_15 583 0x4848 //TX_FDEQ_GAIN_16 584 0x4848 //TX_FDEQ_GAIN_17 585 0x4848 //TX_FDEQ_GAIN_18 @@ -47982,24 +72714,24 @@ 613 0x0000 //TX_FDEQ_BIN_22 614 0x0000 //TX_FDEQ_BIN_23 615 0x0000 //TX_FDEQ_PADDING -616 0x0020 //TX_PREEQ_SUBNUM_MIC0 +616 0x0030 //TX_PREEQ_SUBNUM_MIC0 617 0x4848 //TX_PREEQ_GAIN_MIC0_0 618 0x4848 //TX_PREEQ_GAIN_MIC0_1 619 0x4848 //TX_PREEQ_GAIN_MIC0_2 620 0x4848 //TX_PREEQ_GAIN_MIC0_3 621 0x4848 //TX_PREEQ_GAIN_MIC0_4 622 0x4848 //TX_PREEQ_GAIN_MIC0_5 -623 0x4A4C //TX_PREEQ_GAIN_MIC0_6 -624 0x4E50 //TX_PREEQ_GAIN_MIC0_7 -625 0x5456 //TX_PREEQ_GAIN_MIC0_8 -626 0x585C //TX_PREEQ_GAIN_MIC0_9 -627 0x5C64 //TX_PREEQ_GAIN_MIC0_10 -628 0x7478 //TX_PREEQ_GAIN_MIC0_11 -629 0x705C //TX_PREEQ_GAIN_MIC0_12 -630 0x4838 //TX_PREEQ_GAIN_MIC0_13 -631 0x3C70 //TX_PREEQ_GAIN_MIC0_14 -632 0x4848 //TX_PREEQ_GAIN_MIC0_15 -633 0x4848 //TX_PREEQ_GAIN_MIC0_16 +623 0x4849 //TX_PREEQ_GAIN_MIC0_6 +624 0x4A4B //TX_PREEQ_GAIN_MIC0_7 +625 0x4C4B //TX_PREEQ_GAIN_MIC0_8 +626 0x4A48 //TX_PREEQ_GAIN_MIC0_9 +627 0x4B4C //TX_PREEQ_GAIN_MIC0_10 +628 0x4C4B //TX_PREEQ_GAIN_MIC0_11 +629 0x4838 //TX_PREEQ_GAIN_MIC0_12 +630 0x3858 //TX_PREEQ_GAIN_MIC0_13 +631 0x7060 //TX_PREEQ_GAIN_MIC0_14 +632 0x9870 //TX_PREEQ_GAIN_MIC0_15 +633 0x5848 //TX_PREEQ_GAIN_MIC0_16 634 0x4848 //TX_PREEQ_GAIN_MIC0_17 635 0x4848 //TX_PREEQ_GAIN_MIC0_18 636 0x4848 //TX_PREEQ_GAIN_MIC0_19 @@ -48013,17 +72745,17 @@ 644 0x0304 //TX_PREEQ_BIN_MIC0_3 645 0x0405 //TX_PREEQ_BIN_MIC0_4 646 0x0506 //TX_PREEQ_BIN_MIC0_5 -647 0x0708 //TX_PREEQ_BIN_MIC0_6 -648 0x0909 //TX_PREEQ_BIN_MIC0_7 -649 0x090B //TX_PREEQ_BIN_MIC0_8 +647 0x0808 //TX_PREEQ_BIN_MIC0_6 +648 0x0809 //TX_PREEQ_BIN_MIC0_7 +649 0x0A0A //TX_PREEQ_BIN_MIC0_8 650 0x0C10 //TX_PREEQ_BIN_MIC0_9 651 0x1013 //TX_PREEQ_BIN_MIC0_10 652 0x1414 //TX_PREEQ_BIN_MIC0_11 -653 0x1414 //TX_PREEQ_BIN_MIC0_12 -654 0x1C1E //TX_PREEQ_BIN_MIC0_13 -655 0x1E28 //TX_PREEQ_BIN_MIC0_14 -656 0x462C //TX_PREEQ_BIN_MIC0_15 -657 0x0000 //TX_PREEQ_BIN_MIC0_16 +653 0x261E //TX_PREEQ_BIN_MIC0_12 +654 0x1E14 //TX_PREEQ_BIN_MIC0_13 +655 0x1414 //TX_PREEQ_BIN_MIC0_14 +656 0x2814 //TX_PREEQ_BIN_MIC0_15 +657 0x4000 //TX_PREEQ_BIN_MIC0_16 658 0x0000 //TX_PREEQ_BIN_MIC0_17 659 0x0000 //TX_PREEQ_BIN_MIC0_18 660 0x0000 //TX_PREEQ_BIN_MIC0_19 @@ -48038,15 +72770,15 @@ 669 0x4848 //TX_PREEQ_GAIN_MIC1_3 670 0x4848 //TX_PREEQ_GAIN_MIC1_4 671 0x4848 //TX_PREEQ_GAIN_MIC1_5 -672 0x4848 //TX_PREEQ_GAIN_MIC1_6 -673 0x4848 //TX_PREEQ_GAIN_MIC1_7 -674 0x4848 //TX_PREEQ_GAIN_MIC1_8 -675 0x4848 //TX_PREEQ_GAIN_MIC1_9 -676 0x4848 //TX_PREEQ_GAIN_MIC1_10 -677 0x4848 //TX_PREEQ_GAIN_MIC1_11 -678 0x4848 //TX_PREEQ_GAIN_MIC1_12 -679 0x4848 //TX_PREEQ_GAIN_MIC1_13 -680 0x4848 //TX_PREEQ_GAIN_MIC1_14 +672 0x4645 //TX_PREEQ_GAIN_MIC1_6 +673 0x4442 //TX_PREEQ_GAIN_MIC1_7 +674 0x4140 //TX_PREEQ_GAIN_MIC1_8 +675 0x3E3D //TX_PREEQ_GAIN_MIC1_9 +676 0x3C3C //TX_PREEQ_GAIN_MIC1_10 +677 0x3C3C //TX_PREEQ_GAIN_MIC1_11 +678 0x3938 //TX_PREEQ_GAIN_MIC1_12 +679 0x3A3C //TX_PREEQ_GAIN_MIC1_13 +680 0x3C3E //TX_PREEQ_GAIN_MIC1_14 681 0x4848 //TX_PREEQ_GAIN_MIC1_15 682 0x4848 //TX_PREEQ_GAIN_MIC1_16 683 0x4848 //TX_PREEQ_GAIN_MIC1_17 @@ -48056,23 +72788,23 @@ 687 0x4848 //TX_PREEQ_GAIN_MIC1_21 688 0x4848 //TX_PREEQ_GAIN_MIC1_22 689 0x4848 //TX_PREEQ_GAIN_MIC1_23 -690 0x1812 //TX_PREEQ_BIN_MIC1_0 -691 0x0A0A //TX_PREEQ_BIN_MIC1_1 -692 0x0808 //TX_PREEQ_BIN_MIC1_2 -693 0x080A //TX_PREEQ_BIN_MIC1_3 -694 0x0B09 //TX_PREEQ_BIN_MIC1_4 -695 0x0A06 //TX_PREEQ_BIN_MIC1_5 -696 0x0606 //TX_PREEQ_BIN_MIC1_6 -697 0x0605 //TX_PREEQ_BIN_MIC1_7 -698 0x050A //TX_PREEQ_BIN_MIC1_8 -699 0x1505 //TX_PREEQ_BIN_MIC1_9 -700 0x0506 //TX_PREEQ_BIN_MIC1_10 -701 0x0615 //TX_PREEQ_BIN_MIC1_11 -702 0x1516 //TX_PREEQ_BIN_MIC1_12 -703 0x2021 //TX_PREEQ_BIN_MIC1_13 -704 0x2021 //TX_PREEQ_BIN_MIC1_14 -705 0x2021 //TX_PREEQ_BIN_MIC1_15 -706 0x0800 //TX_PREEQ_BIN_MIC1_16 +690 0x0202 //TX_PREEQ_BIN_MIC1_0 +691 0x0203 //TX_PREEQ_BIN_MIC1_1 +692 0x0303 //TX_PREEQ_BIN_MIC1_2 +693 0x0304 //TX_PREEQ_BIN_MIC1_3 +694 0x0405 //TX_PREEQ_BIN_MIC1_4 +695 0x0506 //TX_PREEQ_BIN_MIC1_5 +696 0x0808 //TX_PREEQ_BIN_MIC1_6 +697 0x0809 //TX_PREEQ_BIN_MIC1_7 +698 0x0A0A //TX_PREEQ_BIN_MIC1_8 +699 0x0C10 //TX_PREEQ_BIN_MIC1_9 +700 0x1013 //TX_PREEQ_BIN_MIC1_10 +701 0x1414 //TX_PREEQ_BIN_MIC1_11 +702 0x261E //TX_PREEQ_BIN_MIC1_12 +703 0x1E14 //TX_PREEQ_BIN_MIC1_13 +704 0x1414 //TX_PREEQ_BIN_MIC1_14 +705 0x2814 //TX_PREEQ_BIN_MIC1_15 +706 0x4000 //TX_PREEQ_BIN_MIC1_16 707 0x0000 //TX_PREEQ_BIN_MIC1_17 708 0x0000 //TX_PREEQ_BIN_MIC1_18 709 0x0000 //TX_PREEQ_BIN_MIC1_19 @@ -48157,7 +72889,7 @@ 788 0x7EB8 //TX_TDDRC_ALPHA_DWN_02 789 0x7EB8 //TX_TDDRC_ALPHA_DWN_03 790 0x7EB8 //TX_TDDRC_ALPHA_DWN_04 -791 0x7FFF //TX_TDDRC_TD_DRC_LIMIT +791 0x7214 //TX_TDDRC_TD_DRC_LIMIT 792 0x0800 //TX_TDDRC_POST_LIMIT_GAIN 793 0x0000 //TX_TDDRC_RESRV_0 794 0x0000 //TX_TDDRC_RESRV_1 @@ -48219,20 +72951,20 @@ 850 0x0000 //TX_FFP_RESRV_4 851 0x0000 //TX_FFP_RESRV_5 852 0x0000 //TX_FFP_RESRV_6 -853 0x0004 //TX_FILTINDX +853 0x0002 //TX_FILTINDX 854 0x0004 //TX_TDDRC_THRD_0 855 0x0016 //TX_TDDRC_THRD_1 -856 0x1900 //TX_TDDRC_THRD_2 -857 0x1900 //TX_TDDRC_THRD_3 -858 0x3000 //TX_TDDRC_SLANT_0 -859 0x7B00 //TX_TDDRC_SLANT_1 +856 0x1800 //TX_TDDRC_THRD_2 +857 0x1800 //TX_TDDRC_THRD_3 +858 0x7FFF //TX_TDDRC_SLANT_0 +859 0x7FFF //TX_TDDRC_SLANT_1 860 0x0C00 //TX_TDDRC_ALPHA_UP_00 861 0x7EB8 //TX_TDDRC_ALPHA_DWN_00 862 0x0000 //TX_TDDRC_HMNC_FLAG 863 0x199A //TX_TDDRC_HMNC_GAIN 864 0x0000 //TX_TDDRC_SMT_FLAG 865 0x0CCD //TX_TDDRC_SMT_W -866 0x0A98 //TX_TDDRC_DRC_GAIN +866 0x0B39 //TX_TDDRC_DRC_GAIN 867 0x7FFF //TX_TDDRC_LMT_THRD 868 0x0000 //TX_TDDRC_LMT_ALPHA 869 0x0000 //TX_TFMASKLTH @@ -48257,14 +72989,79 @@ 888 0x0028 //TX_FASTNS_ARSPC_TH 889 0xC000 //TX_FASTNS_MASK5_TH 890 0x4848 //TX_POSTSSA_MIN_G_VR_MASK -891 0x1000 //TX_A_LESSCUT_RTO_MASK +891 0x7000 //TX_A_LESSCUT_RTO_MASK 892 0x1770 //TX_FASTNS_NOISETH 893 0xC000 //TX_FASTNS_SSA_THLFL 894 0xC000 //TX_FASTNS_SSA_THHFL 895 0xCCCC //TX_FASTNS_SSA_THLFH 896 0xD999 //TX_FASTNS_SSA_THHFH +897 0x2339 //TX_SENDFUNC_REG_MICMUTE +898 0x0021 //TX_SENDFUNC_REG_MICMUTE1 +899 0x02BC //TX_MICMUTE_RATIO_THR +900 0x0140 //TX_MICMUTE_AMP_THR +901 0x0004 //TX_MICMUTE_HPF_IND +902 0x00C0 //TX_MICMUTE_LOG_EYR_TH +903 0x0008 //TX_MICMUTE_CVG_TIME +904 0x0008 //TX_MICMUTE_RELEASE_TIME +905 0x01FE //TX_MIC_VOLUME_MIC0MUTE +906 0x0020 //TX_MICMUTE_EPD_OFFSET_0 +907 0x001E //TX_MICMUTE_FRQ_AEC_L +908 0x7999 //TX_MICMUTE_EAD_THR +909 0x7FFF //TX_MICMUTE_LAMBDA_CB_NLE +910 0x7FFF //TX_MICMUTE_LAMBDA_RE_EST +911 0x4000 //TX_DTD_THR1_MICMUTE_0 +912 0x7000 //TX_DTD_THR1_MICMUTE_1 +913 0x7FFF //TX_DTD_THR1_MICMUTE_2 +914 0x7FFF //TX_DTD_THR1_MICMUTE_3 +915 0x6CCC //TX_DTD_THR2_MICMUTE_0 +916 0x0400 //TX_MICMUTE_MIN_EQ_RE_EST_0 +917 0x0400 //TX_MICMUTE_MIN_EQ_RE_EST_1 +918 0x1000 //TX_MICMUTE_MIN_EQ_RE_EST_2 +919 0x7FFF //TX_MICMUTE_MIN_EQ_RE_EST_3 +920 0x7FFF //TX_MICMUTE_MIN_EQ_RE_EST_4 +921 0x4000 //TX_MICMUTE_C_POST_FLT +922 0x03E8 //TX_MICMUTE_DT_CUT_K +923 0x0001 //TX_MICMUTE_DT_CUT_THR +924 0x03E8 //TX_MICMUTE_DT_CUT_K2 +925 0x0001 //TX_MICMUTE_DT_CUT_THR2 +926 0x0064 //TX_MICMUTE_DT2_HOLD_N +927 0x1000 //TX_MICMUTE_RATIODTH_THCUT +928 0x1000 //TX_MICMUTE_B_POST_FLT_ECHOL +929 0x7FFF //TX_MICMUTE_B_POST_FLT_ECHOH +930 0x0400 //TX_MICMUTE_C_POST_FLT_MASK +931 0x7999 //TX_MICMUTE_RATIODTL_CUT_TH +932 0x0258 //TX_MICMUTE_DT_CUT_K1 +933 0x0800 //TX_MICMUTE_N2_SN_EST +934 0xFC00 //TX_MICMUTE_THR_SN_EST_0 +935 0x001C //TX_MICMUTE_MIN_G_CTRL_0 +936 0x6000 //TX_MICMUTE_A_POST_FILT_S_0 +937 0x7000 //TX_MICMUTE_B_POST_FILT_0 +938 0x2710 //TX_MIC1RUB_AMP_THR +939 0x0010 //TX_MIC1MUTE_RATIO_THR +940 0x0450 //TX_MIC1MUTE_AMP_THR +941 0x0008 //TX_MIC1MUTE_CVG_TIME +942 0x0008 //TX_MIC1MUTE_RELEASE_TIME +943 0x0000 //TX_AMS_RESRV_01 +944 0x0000 //TX_AMS_RESRV_02 +945 0x0000 //TX_AMS_RESRV_03 +946 0x0000 //TX_AMS_RESRV_04 +947 0x0000 //TX_AMS_RESRV_05 +948 0x0000 //TX_AMS_RESRV_06 +949 0x0000 //TX_AMS_RESRV_07 +950 0x0000 //TX_AMS_RESRV_08 +951 0x0000 //TX_AMS_RESRV_09 +952 0x0000 //TX_AMS_RESRV_10 +953 0x0000 //TX_AMS_RESRV_11 +954 0x0000 //TX_AMS_RESRV_12 +955 0x0000 //TX_AMS_RESRV_13 +956 0x0000 //TX_AMS_RESRV_14 +957 0x0000 //TX_AMS_RESRV_15 +958 0x0000 //TX_AMS_RESRV_16 +959 0x0000 //TX_AMS_RESRV_17 +960 0x0000 //TX_AMS_RESRV_18 +961 0x0000 //TX_AMS_RESRV_19 #RX -0 0x0040 //RX_RECVFUNC_MODE_0 +0 0x2040 //RX_RECVFUNC_MODE_0 1 0x0000 //RX_RECVFUNC_MODE_1 2 0x0000 //RX_SAMPLINGFREQ_SIG 3 0x0000 //RX_SAMPLINGFREQ_PROC @@ -49114,11 +73911,862 @@ 110 0x0000 //RX_FDDRC_RESRV_0 129 0x0100 //RX_SPK_VOL 130 0x0000 //RX_VOL_RESRV_0 +#RX 2 +157 0x2040 //RX_RECVFUNC_MODE_0 +158 0x0000 //RX_RECVFUNC_MODE_1 +159 0x0000 //RX_SAMPLINGFREQ_SIG +160 0x0000 //RX_SAMPLINGFREQ_PROC +161 0x000A //RX_FRAME_SZ +162 0x0000 //RX_DELAY_OPT +163 0x3000 //RX_TDDRC_ALPHA_UP_1 +164 0x3000 //RX_TDDRC_ALPHA_UP_2 +165 0x3000 //RX_TDDRC_ALPHA_UP_3 +166 0x3000 //RX_TDDRC_ALPHA_UP_4 +167 0x050D //RX_PGA +168 0x7652 //RX_A_HP +169 0x4000 //RX_B_PE +170 0x7800 //RX_THR_PITCH_DET_0 +171 0x7000 //RX_THR_PITCH_DET_1 +172 0x6000 //RX_THR_PITCH_DET_2 +173 0x0000 //RX_PITCH_BFR_LEN +174 0x0000 //RX_SBD_PITCH_DET +175 0x0000 //RX_PP_RESRV_0 +176 0x0000 //RX_PP_RESRV_1 +177 0xF800 //RX_N_SN_EST +178 0x0000 //RX_N2_SN_EST +179 0x000F //RX_NS_LVL_CTRL +180 0xF800 //RX_THR_SN_EST +181 0x7E00 //RX_LAMBDA_PFILT +182 0x000A //RX_FENS_RESRV_0 +183 0x0000 //RX_FENS_RESRV_1 +184 0x7FB0 //RX_TDDRC_ALPHA_DWN_1 +185 0x7FB0 //RX_TDDRC_ALPHA_DWN_2 +186 0x7FB0 //RX_TDDRC_ALPHA_DWN_3 +187 0x0000 //RX_EXTRA_NS_L +188 0x0000 //RX_EXTRA_NS_A +189 0x7FB0 //RX_TDDRC_ALPHA_DWN_4 +190 0xDA9E //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +192 0x0000 //RX_A_POST_FLT +193 0x0000 //RX_LMT_THRD +194 0x4000 //RX_LMT_ALPHA +195 0x0020 //RX_FDEQ_SUBNUM +196 0x4848 //RX_FDEQ_GAIN_0 +197 0x4848 //RX_FDEQ_GAIN_1 +198 0x4848 //RX_FDEQ_GAIN_2 +199 0x4848 //RX_FDEQ_GAIN_3 +200 0x4848 //RX_FDEQ_GAIN_4 +201 0x4848 //RX_FDEQ_GAIN_5 +202 0x4848 //RX_FDEQ_GAIN_6 +203 0x4848 //RX_FDEQ_GAIN_7 +204 0x4848 //RX_FDEQ_GAIN_8 +205 0x4848 //RX_FDEQ_GAIN_9 +206 0x4848 //RX_FDEQ_GAIN_10 +207 0x4848 //RX_FDEQ_GAIN_11 +208 0x4848 //RX_FDEQ_GAIN_12 +209 0x4848 //RX_FDEQ_GAIN_13 +210 0x4848 //RX_FDEQ_GAIN_14 +211 0x4848 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0000 //RX_FDEQ_BIN_0 +221 0x0000 //RX_FDEQ_BIN_1 +222 0x0000 //RX_FDEQ_BIN_2 +223 0x0000 //RX_FDEQ_BIN_3 +224 0x0000 //RX_FDEQ_BIN_4 +225 0x0000 //RX_FDEQ_BIN_5 +226 0x0000 //RX_FDEQ_BIN_6 +227 0x0000 //RX_FDEQ_BIN_7 +228 0x0000 //RX_FDEQ_BIN_8 +229 0x0000 //RX_FDEQ_BIN_9 +230 0x0000 //RX_FDEQ_BIN_10 +231 0x0000 //RX_FDEQ_BIN_11 +232 0x0000 //RX_FDEQ_BIN_12 +233 0x0000 //RX_FDEQ_BIN_13 +234 0x0000 //RX_FDEQ_BIN_14 +235 0x0000 //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x0000 //RX_FDEQ_RESRV_0 +245 0x0000 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0030 //RX_FDDRC_BAND_MARGIN_1 +248 0x0050 //RX_FDDRC_BAND_MARGIN_2 +249 0x0080 //RX_FDDRC_BAND_MARGIN_3 +250 0x0004 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x5000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x6400 //RX_FDDRC_THRD_3_2 +258 0x6400 //RX_FDDRC_THRD_3_3 +259 0x2000 //RX_FDDRC_SLANT_0_0 +260 0x2000 //RX_FDDRC_SLANT_0_1 +261 0x2000 //RX_FDDRC_SLANT_0_2 +262 0x2000 //RX_FDDRC_SLANT_0_3 +263 0x2000 //RX_FDDRC_SLANT_1_0 +264 0x2000 //RX_FDDRC_SLANT_1_1 +265 0x2000 //RX_FDDRC_SLANT_1_2 +266 0x2000 //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +268 0x0003 //RX_FILTINDX +269 0x0000 //RX_TDDRC_THRD_0 +270 0x0000 //RX_TDDRC_THRD_1 +271 0x0E80 //RX_TDDRC_THRD_2 +272 0x3800 //RX_TDDRC_THRD_3 +273 0x2A00 //RX_TDDRC_SLANT_0 +274 0x6E00 //RX_TDDRC_SLANT_1 +275 0x3000 //RX_TDDRC_ALPHA_UP_0 +276 0x7FB0 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x0000 //RX_TDDRC_HMNC_GAIN +279 0x0000 //RX_TDDRC_SMT_FLAG +280 0x0000 //RX_TDDRC_SMT_W +281 0x0100 //RX_TDDRC_DRC_GAIN +282 0x7C00 //RX_LAMBDA_PKA_FP +283 0x2000 //RX_TPKA_FP +284 0x0080 //RX_MIN_G_FP +285 0x2000 //RX_MAX_G_FP +286 0x0100 //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 +288 0x0010 //RX_MAXLEVEL_CNG +289 0x0000 //RX_BWE_UV_TH +290 0x0000 //RX_BWE_UV_TH2 +291 0x0000 //RX_BWE_UV_TH3 +292 0x0000 //RX_BWE_V_TH +293 0x0000 //RX_BWE_GAIN1_V_TH1 +294 0x0000 //RX_BWE_GAIN1_V_TH2 +295 0x0000 //RX_BWE_UV_EQ +296 0x0000 //RX_BWE_V_EQ +297 0x0000 //RX_BWE_TONE_TH +298 0x0000 //RX_BWE_UV_HOLD_T +299 0x0000 //RX_BWE_GAIN2_ALPHA +300 0x0000 //RX_BWE_GAIN3_ALPHA +301 0x0000 //RX_BWE_CUTOFF +302 0x0000 //RX_BWE_GAINFILL +303 0x0000 //RX_BWE_MAXTH_TONE +304 0x0000 //RX_BWE_EQ_0 +305 0x0000 //RX_BWE_EQ_1 +306 0x0000 //RX_BWE_EQ_2 +307 0x0000 //RX_BWE_EQ_3 +308 0x0000 //RX_BWE_EQ_4 +309 0x0000 //RX_BWE_EQ_5 +310 0x0000 //RX_BWE_EQ_6 +311 0x0000 //RX_BWE_RESRV_0 +312 0x0000 //RX_BWE_RESRV_1 +313 0x0000 //RX_BWE_RESRV_2 +#VOL 0 +163 0x3000 //RX_TDDRC_ALPHA_UP_1 +164 0x3000 //RX_TDDRC_ALPHA_UP_2 +165 0x3000 //RX_TDDRC_ALPHA_UP_3 +166 0x3000 //RX_TDDRC_ALPHA_UP_4 +184 0x7FB0 //RX_TDDRC_ALPHA_DWN_1 +185 0x7FB0 //RX_TDDRC_ALPHA_DWN_2 +186 0x7FB0 //RX_TDDRC_ALPHA_DWN_3 +189 0x7FB0 //RX_TDDRC_ALPHA_DWN_4 +190 0xDA9E //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +269 0x0000 //RX_TDDRC_THRD_0 +270 0x0000 //RX_TDDRC_THRD_1 +271 0x0E80 //RX_TDDRC_THRD_2 +272 0x3800 //RX_TDDRC_THRD_3 +273 0x2A00 //RX_TDDRC_SLANT_0 +274 0x6E00 //RX_TDDRC_SLANT_1 +275 0x3000 //RX_TDDRC_ALPHA_UP_0 +276 0x7FB0 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x0000 //RX_TDDRC_HMNC_GAIN +279 0x0000 //RX_TDDRC_SMT_FLAG +280 0x0000 //RX_TDDRC_SMT_W +281 0x0100 //RX_TDDRC_DRC_GAIN +195 0x0020 //RX_FDEQ_SUBNUM +196 0x4848 //RX_FDEQ_GAIN_0 +197 0x4848 //RX_FDEQ_GAIN_1 +198 0x4848 //RX_FDEQ_GAIN_2 +199 0x4848 //RX_FDEQ_GAIN_3 +200 0x4848 //RX_FDEQ_GAIN_4 +201 0x4848 //RX_FDEQ_GAIN_5 +202 0x4848 //RX_FDEQ_GAIN_6 +203 0x4848 //RX_FDEQ_GAIN_7 +204 0x4848 //RX_FDEQ_GAIN_8 +205 0x4848 //RX_FDEQ_GAIN_9 +206 0x4848 //RX_FDEQ_GAIN_10 +207 0x4848 //RX_FDEQ_GAIN_11 +208 0x4848 //RX_FDEQ_GAIN_12 +209 0x4848 //RX_FDEQ_GAIN_13 +210 0x4848 //RX_FDEQ_GAIN_14 +211 0x4848 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0000 //RX_FDEQ_BIN_0 +221 0x0000 //RX_FDEQ_BIN_1 +222 0x0000 //RX_FDEQ_BIN_2 +223 0x0000 //RX_FDEQ_BIN_3 +224 0x0000 //RX_FDEQ_BIN_4 +225 0x0000 //RX_FDEQ_BIN_5 +226 0x0000 //RX_FDEQ_BIN_6 +227 0x0000 //RX_FDEQ_BIN_7 +228 0x0000 //RX_FDEQ_BIN_8 +229 0x0000 //RX_FDEQ_BIN_9 +230 0x0000 //RX_FDEQ_BIN_10 +231 0x0000 //RX_FDEQ_BIN_11 +232 0x0000 //RX_FDEQ_BIN_12 +233 0x0000 //RX_FDEQ_BIN_13 +234 0x0000 //RX_FDEQ_BIN_14 +235 0x0000 //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x0000 //RX_FDEQ_RESRV_0 +245 0x0000 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0030 //RX_FDDRC_BAND_MARGIN_1 +248 0x0050 //RX_FDDRC_BAND_MARGIN_2 +249 0x0080 //RX_FDDRC_BAND_MARGIN_3 +250 0x0004 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x5000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x6400 //RX_FDDRC_THRD_3_2 +258 0x6400 //RX_FDDRC_THRD_3_3 +259 0x2000 //RX_FDDRC_SLANT_0_0 +260 0x2000 //RX_FDDRC_SLANT_0_1 +261 0x2000 //RX_FDDRC_SLANT_0_2 +262 0x2000 //RX_FDDRC_SLANT_0_3 +263 0x2000 //RX_FDDRC_SLANT_1_0 +264 0x2000 //RX_FDDRC_SLANT_1_1 +265 0x2000 //RX_FDDRC_SLANT_1_2 +266 0x2000 //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +286 0x0100 //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 +#VOL 1 +163 0x3000 //RX_TDDRC_ALPHA_UP_1 +164 0x3000 //RX_TDDRC_ALPHA_UP_2 +165 0x3000 //RX_TDDRC_ALPHA_UP_3 +166 0x3000 //RX_TDDRC_ALPHA_UP_4 +184 0x7FB0 //RX_TDDRC_ALPHA_DWN_1 +185 0x7FB0 //RX_TDDRC_ALPHA_DWN_2 +186 0x7FB0 //RX_TDDRC_ALPHA_DWN_3 +189 0x7FB0 //RX_TDDRC_ALPHA_DWN_4 +190 0xDA9E //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +269 0x0000 //RX_TDDRC_THRD_0 +270 0x0000 //RX_TDDRC_THRD_1 +271 0x0E80 //RX_TDDRC_THRD_2 +272 0x3800 //RX_TDDRC_THRD_3 +273 0x2A00 //RX_TDDRC_SLANT_0 +274 0x6E00 //RX_TDDRC_SLANT_1 +275 0x3000 //RX_TDDRC_ALPHA_UP_0 +276 0x7FB0 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x0000 //RX_TDDRC_HMNC_GAIN +279 0x0000 //RX_TDDRC_SMT_FLAG +280 0x0000 //RX_TDDRC_SMT_W +281 0x0100 //RX_TDDRC_DRC_GAIN +195 0x0020 //RX_FDEQ_SUBNUM +196 0x4848 //RX_FDEQ_GAIN_0 +197 0x4848 //RX_FDEQ_GAIN_1 +198 0x4848 //RX_FDEQ_GAIN_2 +199 0x4848 //RX_FDEQ_GAIN_3 +200 0x4848 //RX_FDEQ_GAIN_4 +201 0x4848 //RX_FDEQ_GAIN_5 +202 0x4848 //RX_FDEQ_GAIN_6 +203 0x4848 //RX_FDEQ_GAIN_7 +204 0x4848 //RX_FDEQ_GAIN_8 +205 0x4848 //RX_FDEQ_GAIN_9 +206 0x4848 //RX_FDEQ_GAIN_10 +207 0x4848 //RX_FDEQ_GAIN_11 +208 0x4848 //RX_FDEQ_GAIN_12 +209 0x4848 //RX_FDEQ_GAIN_13 +210 0x4848 //RX_FDEQ_GAIN_14 +211 0x4848 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0000 //RX_FDEQ_BIN_0 +221 0x0000 //RX_FDEQ_BIN_1 +222 0x0000 //RX_FDEQ_BIN_2 +223 0x0000 //RX_FDEQ_BIN_3 +224 0x0000 //RX_FDEQ_BIN_4 +225 0x0000 //RX_FDEQ_BIN_5 +226 0x0000 //RX_FDEQ_BIN_6 +227 0x0000 //RX_FDEQ_BIN_7 +228 0x0000 //RX_FDEQ_BIN_8 +229 0x0000 //RX_FDEQ_BIN_9 +230 0x0000 //RX_FDEQ_BIN_10 +231 0x0000 //RX_FDEQ_BIN_11 +232 0x0000 //RX_FDEQ_BIN_12 +233 0x0000 //RX_FDEQ_BIN_13 +234 0x0000 //RX_FDEQ_BIN_14 +235 0x0000 //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x0000 //RX_FDEQ_RESRV_0 +245 0x0000 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0030 //RX_FDDRC_BAND_MARGIN_1 +248 0x0050 //RX_FDDRC_BAND_MARGIN_2 +249 0x0080 //RX_FDDRC_BAND_MARGIN_3 +250 0x0004 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x5000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x6400 //RX_FDDRC_THRD_3_2 +258 0x6400 //RX_FDDRC_THRD_3_3 +259 0x2000 //RX_FDDRC_SLANT_0_0 +260 0x2000 //RX_FDDRC_SLANT_0_1 +261 0x2000 //RX_FDDRC_SLANT_0_2 +262 0x2000 //RX_FDDRC_SLANT_0_3 +263 0x2000 //RX_FDDRC_SLANT_1_0 +264 0x2000 //RX_FDDRC_SLANT_1_1 +265 0x2000 //RX_FDDRC_SLANT_1_2 +266 0x2000 //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +286 0x0100 //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 +#VOL 2 +163 0x3000 //RX_TDDRC_ALPHA_UP_1 +164 0x3000 //RX_TDDRC_ALPHA_UP_2 +165 0x3000 //RX_TDDRC_ALPHA_UP_3 +166 0x3000 //RX_TDDRC_ALPHA_UP_4 +184 0x7FB0 //RX_TDDRC_ALPHA_DWN_1 +185 0x7FB0 //RX_TDDRC_ALPHA_DWN_2 +186 0x7FB0 //RX_TDDRC_ALPHA_DWN_3 +189 0x7FB0 //RX_TDDRC_ALPHA_DWN_4 +190 0xDA9E //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +269 0x0000 //RX_TDDRC_THRD_0 +270 0x0000 //RX_TDDRC_THRD_1 +271 0x0E80 //RX_TDDRC_THRD_2 +272 0x3800 //RX_TDDRC_THRD_3 +273 0x2A00 //RX_TDDRC_SLANT_0 +274 0x6E00 //RX_TDDRC_SLANT_1 +275 0x3000 //RX_TDDRC_ALPHA_UP_0 +276 0x7FB0 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x0000 //RX_TDDRC_HMNC_GAIN +279 0x0000 //RX_TDDRC_SMT_FLAG +280 0x0000 //RX_TDDRC_SMT_W +281 0x0100 //RX_TDDRC_DRC_GAIN +195 0x0020 //RX_FDEQ_SUBNUM +196 0x4848 //RX_FDEQ_GAIN_0 +197 0x4848 //RX_FDEQ_GAIN_1 +198 0x4848 //RX_FDEQ_GAIN_2 +199 0x4848 //RX_FDEQ_GAIN_3 +200 0x4848 //RX_FDEQ_GAIN_4 +201 0x4848 //RX_FDEQ_GAIN_5 +202 0x4848 //RX_FDEQ_GAIN_6 +203 0x4848 //RX_FDEQ_GAIN_7 +204 0x4848 //RX_FDEQ_GAIN_8 +205 0x4848 //RX_FDEQ_GAIN_9 +206 0x4848 //RX_FDEQ_GAIN_10 +207 0x4848 //RX_FDEQ_GAIN_11 +208 0x4848 //RX_FDEQ_GAIN_12 +209 0x4848 //RX_FDEQ_GAIN_13 +210 0x4848 //RX_FDEQ_GAIN_14 +211 0x4848 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0000 //RX_FDEQ_BIN_0 +221 0x0000 //RX_FDEQ_BIN_1 +222 0x0000 //RX_FDEQ_BIN_2 +223 0x0000 //RX_FDEQ_BIN_3 +224 0x0000 //RX_FDEQ_BIN_4 +225 0x0000 //RX_FDEQ_BIN_5 +226 0x0000 //RX_FDEQ_BIN_6 +227 0x0000 //RX_FDEQ_BIN_7 +228 0x0000 //RX_FDEQ_BIN_8 +229 0x0000 //RX_FDEQ_BIN_9 +230 0x0000 //RX_FDEQ_BIN_10 +231 0x0000 //RX_FDEQ_BIN_11 +232 0x0000 //RX_FDEQ_BIN_12 +233 0x0000 //RX_FDEQ_BIN_13 +234 0x0000 //RX_FDEQ_BIN_14 +235 0x0000 //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x0000 //RX_FDEQ_RESRV_0 +245 0x0000 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0030 //RX_FDDRC_BAND_MARGIN_1 +248 0x0050 //RX_FDDRC_BAND_MARGIN_2 +249 0x0080 //RX_FDDRC_BAND_MARGIN_3 +250 0x0004 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x5000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x6400 //RX_FDDRC_THRD_3_2 +258 0x6400 //RX_FDDRC_THRD_3_3 +259 0x2000 //RX_FDDRC_SLANT_0_0 +260 0x2000 //RX_FDDRC_SLANT_0_1 +261 0x2000 //RX_FDDRC_SLANT_0_2 +262 0x2000 //RX_FDDRC_SLANT_0_3 +263 0x2000 //RX_FDDRC_SLANT_1_0 +264 0x2000 //RX_FDDRC_SLANT_1_1 +265 0x2000 //RX_FDDRC_SLANT_1_2 +266 0x2000 //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +286 0x0100 //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 +#VOL 3 +163 0x3000 //RX_TDDRC_ALPHA_UP_1 +164 0x3000 //RX_TDDRC_ALPHA_UP_2 +165 0x3000 //RX_TDDRC_ALPHA_UP_3 +166 0x3000 //RX_TDDRC_ALPHA_UP_4 +184 0x7FB0 //RX_TDDRC_ALPHA_DWN_1 +185 0x7FB0 //RX_TDDRC_ALPHA_DWN_2 +186 0x7FB0 //RX_TDDRC_ALPHA_DWN_3 +189 0x7FB0 //RX_TDDRC_ALPHA_DWN_4 +190 0xDA9E //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +269 0x0000 //RX_TDDRC_THRD_0 +270 0x0000 //RX_TDDRC_THRD_1 +271 0x0E80 //RX_TDDRC_THRD_2 +272 0x3800 //RX_TDDRC_THRD_3 +273 0x2A00 //RX_TDDRC_SLANT_0 +274 0x6E00 //RX_TDDRC_SLANT_1 +275 0x3000 //RX_TDDRC_ALPHA_UP_0 +276 0x7FB0 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x0000 //RX_TDDRC_HMNC_GAIN +279 0x0000 //RX_TDDRC_SMT_FLAG +280 0x0000 //RX_TDDRC_SMT_W +281 0x0100 //RX_TDDRC_DRC_GAIN +195 0x0020 //RX_FDEQ_SUBNUM +196 0x4848 //RX_FDEQ_GAIN_0 +197 0x4848 //RX_FDEQ_GAIN_1 +198 0x4848 //RX_FDEQ_GAIN_2 +199 0x4848 //RX_FDEQ_GAIN_3 +200 0x4848 //RX_FDEQ_GAIN_4 +201 0x4848 //RX_FDEQ_GAIN_5 +202 0x4848 //RX_FDEQ_GAIN_6 +203 0x4848 //RX_FDEQ_GAIN_7 +204 0x4848 //RX_FDEQ_GAIN_8 +205 0x4848 //RX_FDEQ_GAIN_9 +206 0x4848 //RX_FDEQ_GAIN_10 +207 0x4848 //RX_FDEQ_GAIN_11 +208 0x4848 //RX_FDEQ_GAIN_12 +209 0x4848 //RX_FDEQ_GAIN_13 +210 0x4848 //RX_FDEQ_GAIN_14 +211 0x4848 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0000 //RX_FDEQ_BIN_0 +221 0x0000 //RX_FDEQ_BIN_1 +222 0x0000 //RX_FDEQ_BIN_2 +223 0x0000 //RX_FDEQ_BIN_3 +224 0x0000 //RX_FDEQ_BIN_4 +225 0x0000 //RX_FDEQ_BIN_5 +226 0x0000 //RX_FDEQ_BIN_6 +227 0x0000 //RX_FDEQ_BIN_7 +228 0x0000 //RX_FDEQ_BIN_8 +229 0x0000 //RX_FDEQ_BIN_9 +230 0x0000 //RX_FDEQ_BIN_10 +231 0x0000 //RX_FDEQ_BIN_11 +232 0x0000 //RX_FDEQ_BIN_12 +233 0x0000 //RX_FDEQ_BIN_13 +234 0x0000 //RX_FDEQ_BIN_14 +235 0x0000 //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x0000 //RX_FDEQ_RESRV_0 +245 0x0000 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0030 //RX_FDDRC_BAND_MARGIN_1 +248 0x0050 //RX_FDDRC_BAND_MARGIN_2 +249 0x0080 //RX_FDDRC_BAND_MARGIN_3 +250 0x0004 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x5000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x6400 //RX_FDDRC_THRD_3_2 +258 0x6400 //RX_FDDRC_THRD_3_3 +259 0x2000 //RX_FDDRC_SLANT_0_0 +260 0x2000 //RX_FDDRC_SLANT_0_1 +261 0x2000 //RX_FDDRC_SLANT_0_2 +262 0x2000 //RX_FDDRC_SLANT_0_3 +263 0x2000 //RX_FDDRC_SLANT_1_0 +264 0x2000 //RX_FDDRC_SLANT_1_1 +265 0x2000 //RX_FDDRC_SLANT_1_2 +266 0x2000 //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +286 0x0100 //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 +#VOL 4 +163 0x3000 //RX_TDDRC_ALPHA_UP_1 +164 0x3000 //RX_TDDRC_ALPHA_UP_2 +165 0x3000 //RX_TDDRC_ALPHA_UP_3 +166 0x3000 //RX_TDDRC_ALPHA_UP_4 +184 0x7FB0 //RX_TDDRC_ALPHA_DWN_1 +185 0x7FB0 //RX_TDDRC_ALPHA_DWN_2 +186 0x7FB0 //RX_TDDRC_ALPHA_DWN_3 +189 0x7FB0 //RX_TDDRC_ALPHA_DWN_4 +190 0xDA9E //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +269 0x0000 //RX_TDDRC_THRD_0 +270 0x0000 //RX_TDDRC_THRD_1 +271 0x0E80 //RX_TDDRC_THRD_2 +272 0x3800 //RX_TDDRC_THRD_3 +273 0x2A00 //RX_TDDRC_SLANT_0 +274 0x6E00 //RX_TDDRC_SLANT_1 +275 0x3000 //RX_TDDRC_ALPHA_UP_0 +276 0x7FB0 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x0000 //RX_TDDRC_HMNC_GAIN +279 0x0000 //RX_TDDRC_SMT_FLAG +280 0x0000 //RX_TDDRC_SMT_W +281 0x0100 //RX_TDDRC_DRC_GAIN +195 0x0020 //RX_FDEQ_SUBNUM +196 0x4848 //RX_FDEQ_GAIN_0 +197 0x4848 //RX_FDEQ_GAIN_1 +198 0x4848 //RX_FDEQ_GAIN_2 +199 0x4848 //RX_FDEQ_GAIN_3 +200 0x4848 //RX_FDEQ_GAIN_4 +201 0x4848 //RX_FDEQ_GAIN_5 +202 0x4848 //RX_FDEQ_GAIN_6 +203 0x4848 //RX_FDEQ_GAIN_7 +204 0x4848 //RX_FDEQ_GAIN_8 +205 0x4848 //RX_FDEQ_GAIN_9 +206 0x4848 //RX_FDEQ_GAIN_10 +207 0x4848 //RX_FDEQ_GAIN_11 +208 0x4848 //RX_FDEQ_GAIN_12 +209 0x4848 //RX_FDEQ_GAIN_13 +210 0x4848 //RX_FDEQ_GAIN_14 +211 0x4848 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0000 //RX_FDEQ_BIN_0 +221 0x0000 //RX_FDEQ_BIN_1 +222 0x0000 //RX_FDEQ_BIN_2 +223 0x0000 //RX_FDEQ_BIN_3 +224 0x0000 //RX_FDEQ_BIN_4 +225 0x0000 //RX_FDEQ_BIN_5 +226 0x0000 //RX_FDEQ_BIN_6 +227 0x0000 //RX_FDEQ_BIN_7 +228 0x0000 //RX_FDEQ_BIN_8 +229 0x0000 //RX_FDEQ_BIN_9 +230 0x0000 //RX_FDEQ_BIN_10 +231 0x0000 //RX_FDEQ_BIN_11 +232 0x0000 //RX_FDEQ_BIN_12 +233 0x0000 //RX_FDEQ_BIN_13 +234 0x0000 //RX_FDEQ_BIN_14 +235 0x0000 //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x0000 //RX_FDEQ_RESRV_0 +245 0x0000 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0030 //RX_FDDRC_BAND_MARGIN_1 +248 0x0050 //RX_FDDRC_BAND_MARGIN_2 +249 0x0080 //RX_FDDRC_BAND_MARGIN_3 +250 0x0004 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x5000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x6400 //RX_FDDRC_THRD_3_2 +258 0x6400 //RX_FDDRC_THRD_3_3 +259 0x2000 //RX_FDDRC_SLANT_0_0 +260 0x2000 //RX_FDDRC_SLANT_0_1 +261 0x2000 //RX_FDDRC_SLANT_0_2 +262 0x2000 //RX_FDDRC_SLANT_0_3 +263 0x2000 //RX_FDDRC_SLANT_1_0 +264 0x2000 //RX_FDDRC_SLANT_1_1 +265 0x2000 //RX_FDDRC_SLANT_1_2 +266 0x2000 //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +286 0x0100 //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 +#VOL 5 +163 0x3000 //RX_TDDRC_ALPHA_UP_1 +164 0x3000 //RX_TDDRC_ALPHA_UP_2 +165 0x3000 //RX_TDDRC_ALPHA_UP_3 +166 0x3000 //RX_TDDRC_ALPHA_UP_4 +184 0x7FB0 //RX_TDDRC_ALPHA_DWN_1 +185 0x7FB0 //RX_TDDRC_ALPHA_DWN_2 +186 0x7FB0 //RX_TDDRC_ALPHA_DWN_3 +189 0x7FB0 //RX_TDDRC_ALPHA_DWN_4 +190 0xDA9E //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +269 0x0000 //RX_TDDRC_THRD_0 +270 0x0000 //RX_TDDRC_THRD_1 +271 0x0E80 //RX_TDDRC_THRD_2 +272 0x3800 //RX_TDDRC_THRD_3 +273 0x2A00 //RX_TDDRC_SLANT_0 +274 0x6E00 //RX_TDDRC_SLANT_1 +275 0x3000 //RX_TDDRC_ALPHA_UP_0 +276 0x7FB0 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x0000 //RX_TDDRC_HMNC_GAIN +279 0x0000 //RX_TDDRC_SMT_FLAG +280 0x0000 //RX_TDDRC_SMT_W +281 0x0100 //RX_TDDRC_DRC_GAIN +195 0x0020 //RX_FDEQ_SUBNUM +196 0x4848 //RX_FDEQ_GAIN_0 +197 0x4848 //RX_FDEQ_GAIN_1 +198 0x4848 //RX_FDEQ_GAIN_2 +199 0x4848 //RX_FDEQ_GAIN_3 +200 0x4848 //RX_FDEQ_GAIN_4 +201 0x4848 //RX_FDEQ_GAIN_5 +202 0x4848 //RX_FDEQ_GAIN_6 +203 0x4848 //RX_FDEQ_GAIN_7 +204 0x4848 //RX_FDEQ_GAIN_8 +205 0x4848 //RX_FDEQ_GAIN_9 +206 0x4848 //RX_FDEQ_GAIN_10 +207 0x4848 //RX_FDEQ_GAIN_11 +208 0x4848 //RX_FDEQ_GAIN_12 +209 0x4848 //RX_FDEQ_GAIN_13 +210 0x4848 //RX_FDEQ_GAIN_14 +211 0x4848 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0000 //RX_FDEQ_BIN_0 +221 0x0000 //RX_FDEQ_BIN_1 +222 0x0000 //RX_FDEQ_BIN_2 +223 0x0000 //RX_FDEQ_BIN_3 +224 0x0000 //RX_FDEQ_BIN_4 +225 0x0000 //RX_FDEQ_BIN_5 +226 0x0000 //RX_FDEQ_BIN_6 +227 0x0000 //RX_FDEQ_BIN_7 +228 0x0000 //RX_FDEQ_BIN_8 +229 0x0000 //RX_FDEQ_BIN_9 +230 0x0000 //RX_FDEQ_BIN_10 +231 0x0000 //RX_FDEQ_BIN_11 +232 0x0000 //RX_FDEQ_BIN_12 +233 0x0000 //RX_FDEQ_BIN_13 +234 0x0000 //RX_FDEQ_BIN_14 +235 0x0000 //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x0000 //RX_FDEQ_RESRV_0 +245 0x0000 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0030 //RX_FDDRC_BAND_MARGIN_1 +248 0x0050 //RX_FDDRC_BAND_MARGIN_2 +249 0x0080 //RX_FDDRC_BAND_MARGIN_3 +250 0x0004 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x5000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x6400 //RX_FDDRC_THRD_3_2 +258 0x6400 //RX_FDDRC_THRD_3_3 +259 0x2000 //RX_FDDRC_SLANT_0_0 +260 0x2000 //RX_FDDRC_SLANT_0_1 +261 0x2000 //RX_FDDRC_SLANT_0_2 +262 0x2000 //RX_FDDRC_SLANT_0_3 +263 0x2000 //RX_FDDRC_SLANT_1_0 +264 0x2000 //RX_FDDRC_SLANT_1_1 +265 0x2000 //RX_FDDRC_SLANT_1_2 +266 0x2000 //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +286 0x0100 //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 +#VOL 6 +163 0x3000 //RX_TDDRC_ALPHA_UP_1 +164 0x3000 //RX_TDDRC_ALPHA_UP_2 +165 0x3000 //RX_TDDRC_ALPHA_UP_3 +166 0x3000 //RX_TDDRC_ALPHA_UP_4 +184 0x7FB0 //RX_TDDRC_ALPHA_DWN_1 +185 0x7FB0 //RX_TDDRC_ALPHA_DWN_2 +186 0x7FB0 //RX_TDDRC_ALPHA_DWN_3 +189 0x7FB0 //RX_TDDRC_ALPHA_DWN_4 +190 0xDA9E //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +269 0x0000 //RX_TDDRC_THRD_0 +270 0x0000 //RX_TDDRC_THRD_1 +271 0x0E80 //RX_TDDRC_THRD_2 +272 0x3800 //RX_TDDRC_THRD_3 +273 0x2A00 //RX_TDDRC_SLANT_0 +274 0x6E00 //RX_TDDRC_SLANT_1 +275 0x3000 //RX_TDDRC_ALPHA_UP_0 +276 0x7FB0 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x0000 //RX_TDDRC_HMNC_GAIN +279 0x0000 //RX_TDDRC_SMT_FLAG +280 0x0000 //RX_TDDRC_SMT_W +281 0x0100 //RX_TDDRC_DRC_GAIN +195 0x0020 //RX_FDEQ_SUBNUM +196 0x4848 //RX_FDEQ_GAIN_0 +197 0x4848 //RX_FDEQ_GAIN_1 +198 0x4848 //RX_FDEQ_GAIN_2 +199 0x4848 //RX_FDEQ_GAIN_3 +200 0x4848 //RX_FDEQ_GAIN_4 +201 0x4848 //RX_FDEQ_GAIN_5 +202 0x4848 //RX_FDEQ_GAIN_6 +203 0x4848 //RX_FDEQ_GAIN_7 +204 0x4848 //RX_FDEQ_GAIN_8 +205 0x4848 //RX_FDEQ_GAIN_9 +206 0x4848 //RX_FDEQ_GAIN_10 +207 0x4848 //RX_FDEQ_GAIN_11 +208 0x4848 //RX_FDEQ_GAIN_12 +209 0x4848 //RX_FDEQ_GAIN_13 +210 0x4848 //RX_FDEQ_GAIN_14 +211 0x4848 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0000 //RX_FDEQ_BIN_0 +221 0x0000 //RX_FDEQ_BIN_1 +222 0x0000 //RX_FDEQ_BIN_2 +223 0x0000 //RX_FDEQ_BIN_3 +224 0x0000 //RX_FDEQ_BIN_4 +225 0x0000 //RX_FDEQ_BIN_5 +226 0x0000 //RX_FDEQ_BIN_6 +227 0x0000 //RX_FDEQ_BIN_7 +228 0x0000 //RX_FDEQ_BIN_8 +229 0x0000 //RX_FDEQ_BIN_9 +230 0x0000 //RX_FDEQ_BIN_10 +231 0x0000 //RX_FDEQ_BIN_11 +232 0x0000 //RX_FDEQ_BIN_12 +233 0x0000 //RX_FDEQ_BIN_13 +234 0x0000 //RX_FDEQ_BIN_14 +235 0x0000 //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x0000 //RX_FDEQ_RESRV_0 +245 0x0000 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0030 //RX_FDDRC_BAND_MARGIN_1 +248 0x0050 //RX_FDDRC_BAND_MARGIN_2 +249 0x0080 //RX_FDDRC_BAND_MARGIN_3 +250 0x0004 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x5000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x6400 //RX_FDDRC_THRD_3_2 +258 0x6400 //RX_FDDRC_THRD_3_3 +259 0x2000 //RX_FDDRC_SLANT_0_0 +260 0x2000 //RX_FDDRC_SLANT_0_1 +261 0x2000 //RX_FDDRC_SLANT_0_2 +262 0x2000 //RX_FDDRC_SLANT_0_3 +263 0x2000 //RX_FDDRC_SLANT_1_0 +264 0x2000 //RX_FDDRC_SLANT_1_1 +265 0x2000 //RX_FDDRC_SLANT_1_2 +266 0x2000 //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +286 0x0100 //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 #CASE_NAME HEADSET-TTY_FULL-VOICE_GENERIC-NB -#PARAM_MODE FULL -#PARAM_TYPE TX+RX -#TOTAL_CUSTOM_STEP 7 +#PARAM_MODE Full +#PARAM_TYPE TX+2RX +#TOTAL_CUSTOM_STEP 7+7 #TX 0 0x0001 //TX_OPERATION_MODE_0 1 0x0000 //TX_OPERATION_MODE_1 @@ -49362,7 +75010,7 @@ 239 0x0000 //TX_DT_RESRV_7 240 0x0000 //TX_DT_RESRV_8 241 0x0000 //TX_DT_RESRV_9 -242 0xF200 //TX_THR_SN_EST_0 +242 0xFA00 //TX_THR_SN_EST_0 243 0xF400 //TX_THR_SN_EST_1 244 0xF800 //TX_THR_SN_EST_2 245 0xF600 //TX_THR_SN_EST_3 @@ -49371,12 +75019,12 @@ 248 0xF800 //TX_THR_SN_EST_6 249 0xF800 //TX_THR_SN_EST_7 250 0x0100 //TX_DELTA_THR_SN_EST_0 -251 0x0000 //TX_DELTA_THR_SN_EST_1 +251 0x0100 //TX_DELTA_THR_SN_EST_1 252 0x0100 //TX_DELTA_THR_SN_EST_2 -253 0x0100 //TX_DELTA_THR_SN_EST_3 +253 0x0200 //TX_DELTA_THR_SN_EST_3 254 0x0200 //TX_DELTA_THR_SN_EST_4 255 0x0200 //TX_DELTA_THR_SN_EST_5 -256 0x0200 //TX_DELTA_THR_SN_EST_6 +256 0x0000 //TX_DELTA_THR_SN_EST_6 257 0x0200 //TX_DELTA_THR_SN_EST_7 258 0x4000 //TX_LAMBDA_NN_EST_0 259 0x4000 //TX_LAMBDA_NN_EST_1 @@ -49402,12 +75050,12 @@ 279 0x0000 //TX_B_POST_FLT_0 280 0x0000 //TX_B_POST_FLT_1 281 0x001A //TX_NS_LVL_CTRL_0 -282 0x001A //TX_NS_LVL_CTRL_1 +282 0x0014 //TX_NS_LVL_CTRL_1 283 0x0014 //TX_NS_LVL_CTRL_2 -284 0x0014 //TX_NS_LVL_CTRL_3 +284 0x000C //TX_NS_LVL_CTRL_3 285 0x000C //TX_NS_LVL_CTRL_4 286 0x000C //TX_NS_LVL_CTRL_5 -287 0x000C //TX_NS_LVL_CTRL_6 +287 0x001A //TX_NS_LVL_CTRL_6 288 0x000C //TX_NS_LVL_CTRL_7 289 0x000E //TX_MIN_GAIN_S_0 290 0x0014 //TX_MIN_GAIN_S_1 @@ -49423,10 +75071,10 @@ 300 0x7FFF //TX_SNRI_SUP_0 301 0x7FFF //TX_SNRI_SUP_1 302 0x7FFF //TX_SNRI_SUP_2 -303 0x7FFF //TX_SNRI_SUP_3 +303 0x4000 //TX_SNRI_SUP_3 304 0x4000 //TX_SNRI_SUP_4 305 0x4000 //TX_SNRI_SUP_5 -306 0x4000 //TX_SNRI_SUP_6 +306 0x7FFF //TX_SNRI_SUP_6 307 0x4000 //TX_SNRI_SUP_7 308 0x1200 //TX_THR_LFNS 309 0x0147 //TX_G_LFNS @@ -49435,12 +75083,12 @@ 312 0x7FFF //TX_A_POST_FILT_0 313 0x7FFF //TX_A_POST_FILT_1 314 0x4000 //TX_A_POST_FILT_S_0 -315 0x199A //TX_A_POST_FILT_S_1 +315 0x1000 //TX_A_POST_FILT_S_1 316 0x1000 //TX_A_POST_FILT_S_2 -317 0x1000 //TX_A_POST_FILT_S_3 +317 0x6666 //TX_A_POST_FILT_S_3 318 0x6666 //TX_A_POST_FILT_S_4 319 0x6666 //TX_A_POST_FILT_S_5 -320 0x6666 //TX_A_POST_FILT_S_6 +320 0x199A //TX_A_POST_FILT_S_6 321 0x6666 //TX_A_POST_FILT_S_7 322 0x2000 //TX_B_POST_FILT_0 323 0x2000 //TX_B_POST_FILT_1 @@ -49487,7 +75135,7 @@ 364 0x0000 //TX_K_APT 365 0x0001 //TX_NOISEDET 366 0x05A0 //TX_NDETCT -367 0x000A //TX_NOISE_TH_0 +367 0x003B //TX_NOISE_TH_0 368 0x1388 //TX_NOISE_TH_0_2 369 0x3A98 //TX_NOISE_TH_0_3 370 0x0C80 //TX_NOISE_TH_1 @@ -49499,11 +75147,11 @@ 376 0x7FFF //TX_NOISE_TH_5_3 377 0x7FFF //TX_NOISE_TH_5_4 378 0x00C8 //TX_NOISE_TH_6 -379 0x000A //TX_MINENOISE_TH -380 0x0000 //TX_MINENOISE_MIC0_TH_MTS -381 0x0000 //TX_MINENOISE_MIC0_TH_EXP -382 0x0000 //TX_MINENOISE_MIC0_S_TH_MTS -383 0x0000 //TX_MINENOISE_MIC0_S_TH_EXP +379 0x00C8 //TX_MINENOISE_TH +380 0xD508 //TX_MORENS_TFMASK_TH +381 0x0001 //TX_DRC_QUIET_FLOOR +382 0x3A98 //TX_RATIODTL_CUT_TH +383 0x0DAC //TX_DT_CUT_K1 384 0x6400 //TX_OUT_ENER_S_TH_CLEAN 385 0x6400 //TX_OUT_ENER_S_TH_LESSCLEAN 386 0x6400 //TX_OUT_ENER_S_TH_NOISY @@ -49511,22 +75159,22 @@ 388 0x7D00 //TX_OUT_ENER_TH_SPEECH 389 0x0000 //TX_SN_NPB_GAIN 390 0x0000 //TX_NN_NPB_GAIN -391 0x0000 //TX_CSX_ALPHA_0 -392 0x0000 //TX_CSX_ALPHA_1 -393 0x0000 //TX_CSX_ALPHA_2 -394 0x0000 //TX_CSX_ALPHA_3 -395 0x0000 //TX_MU_ARSP_EST -396 0x0000 //TX_P_OUTBEAM_MIN_TH +391 0x7FFF //TX_POST_MASK_SUP_HSNE +392 0x1388 //TX_TAIL_DET_TH +393 0x4000 //TX_B_LESSCUT_RTO_WTA +394 0x0000 //TX_MEL_G_R +395 0x0080 //TX_SUPHIGH_TH +396 0x0000 //TX_MASK_G_R 397 0x0000 //TX_EXTRA_NS_L -398 0x0000 //TX_EXTRA_NS_A -399 0x0000 //TX_VR_NOISE_FLOOR_TH +398 0x1800 //TX_C_POST_FLT_MASK +399 0x7FFF //TX_A_POST_FLT_WNS 400 0x0000 //TX_MIN_G_LOW300HZ 401 0x0010 //TX_MAXLEVEL_CNG 402 0x0000 //TX_STN_NOISE_TH 403 0x0000 //TX_POST_MASK_SUP 404 0x0000 //TX_POST_MASK_ADJUST 405 0x0014 //TX_NS_ENOISE_MIC0_TH -406 0x0014 //TX_MINENOISE_MIC0_TH +406 0x0032 //TX_MINENOISE_MIC0_TH 407 0x0226 //TX_MINENOISE_MIC0_S_TH 408 0x2879 //TX_MIN_G_CTRL_SSNS 409 0x0400 //TX_METAL_RTO_THR @@ -49634,16 +75282,16 @@ 511 0x6666 //TX_MIC_TO_BFGAIN 512 0x6666 //TX_MICTOBFGAIN0 513 0x0014 //TX_FASTMUE_TH -514 0x0000 //TX_DERVB_LEN_0 -515 0x0000 //TX_DERVB_LEN_1 -516 0x0000 //TX_RHO_DERVB -517 0x0000 //TX_MIC_INDX_DERVB -518 0x0000 //TX_MU_DERVB -519 0x0000 //TX_DR_RESRV_0 -520 0x0000 //TX_DR_RESRV_1 -521 0x0000 //TX_DR_RESRV_2 -522 0x0000 //TX_DR_RESRV_3 -523 0x0000 //TX_DR_RESRV_4 +514 0xC000 //TX_DEREVERB_LF_MU +515 0xC000 //TX_DEREVERB_HF_MU +516 0xCCCC //TX_DEREVERB_DELAY +517 0xD999 //TX_DEREVERB_COEF_LEN +518 0x1F40 //TX_DEREVERB_DNR +519 0x0000 //TX_DEREVERB_ALPHA +520 0x0000 //TX_DEREVERB_BETA +521 0x0000 //TX_GSC_RTOL_TH +522 0x7000 //TX_GSC_RTOH_TH +523 0x0064 //TX_WIDE2_MEANHTH 524 0x0000 //TX_DR_RESRV_5 525 0x0000 //TX_DR_RESRV_6 526 0x0000 //TX_DR_RESRV_7 @@ -50009,16 +75657,81 @@ 886 0x0000 //TX_FASTNS_TFMASKBIN_TH2 887 0x0000 //TX_FASTNS_TFMASKBIN_TH3 888 0x00C8 //TX_FASTNS_ARSPC_TH -889 0xD99A //TX_FASTNS_MASK5_TH +889 0xC000 //TX_FASTNS_MASK5_TH 890 0x051F //TX_POSTSSA_MIN_G_VR_MASK -891 0x7FFF //TX_A_LESSCUT_RTO_MASK +891 0x4000 //TX_A_LESSCUT_RTO_MASK 892 0x1770 //TX_FASTNS_NOISETH 893 0xC000 //TX_FASTNS_SSA_THLFL 894 0xC000 //TX_FASTNS_SSA_THHFL 895 0xCCCC //TX_FASTNS_SSA_THLFH 896 0xD999 //TX_FASTNS_SSA_THHFH +897 0x2339 //TX_SENDFUNC_REG_MICMUTE +898 0x0021 //TX_SENDFUNC_REG_MICMUTE1 +899 0x02BC //TX_MICMUTE_RATIO_THR +900 0x0140 //TX_MICMUTE_AMP_THR +901 0x0004 //TX_MICMUTE_HPF_IND +902 0x00C0 //TX_MICMUTE_LOG_EYR_TH +903 0x0008 //TX_MICMUTE_CVG_TIME +904 0x0008 //TX_MICMUTE_RELEASE_TIME +905 0x01FE //TX_MIC_VOLUME_MIC0MUTE +906 0x0020 //TX_MICMUTE_EPD_OFFSET_0 +907 0x001E //TX_MICMUTE_FRQ_AEC_L +908 0x7999 //TX_MICMUTE_EAD_THR +909 0x7FFF //TX_MICMUTE_LAMBDA_CB_NLE +910 0x7FFF //TX_MICMUTE_LAMBDA_RE_EST +911 0x4000 //TX_DTD_THR1_MICMUTE_0 +912 0x7000 //TX_DTD_THR1_MICMUTE_1 +913 0x7FFF //TX_DTD_THR1_MICMUTE_2 +914 0x7FFF //TX_DTD_THR1_MICMUTE_3 +915 0x6CCC //TX_DTD_THR2_MICMUTE_0 +916 0x0400 //TX_MICMUTE_MIN_EQ_RE_EST_0 +917 0x0400 //TX_MICMUTE_MIN_EQ_RE_EST_1 +918 0x1000 //TX_MICMUTE_MIN_EQ_RE_EST_2 +919 0x7FFF //TX_MICMUTE_MIN_EQ_RE_EST_3 +920 0x7FFF //TX_MICMUTE_MIN_EQ_RE_EST_4 +921 0x4000 //TX_MICMUTE_C_POST_FLT +922 0x03E8 //TX_MICMUTE_DT_CUT_K +923 0x0001 //TX_MICMUTE_DT_CUT_THR +924 0x03E8 //TX_MICMUTE_DT_CUT_K2 +925 0x0001 //TX_MICMUTE_DT_CUT_THR2 +926 0x0064 //TX_MICMUTE_DT2_HOLD_N +927 0x1000 //TX_MICMUTE_RATIODTH_THCUT +928 0x1000 //TX_MICMUTE_B_POST_FLT_ECHOL +929 0x7FFF //TX_MICMUTE_B_POST_FLT_ECHOH +930 0x0400 //TX_MICMUTE_C_POST_FLT_MASK +931 0x7999 //TX_MICMUTE_RATIODTL_CUT_TH +932 0x0258 //TX_MICMUTE_DT_CUT_K1 +933 0x0800 //TX_MICMUTE_N2_SN_EST +934 0xFC00 //TX_MICMUTE_THR_SN_EST_0 +935 0x001C //TX_MICMUTE_MIN_G_CTRL_0 +936 0x6000 //TX_MICMUTE_A_POST_FILT_S_0 +937 0x7000 //TX_MICMUTE_B_POST_FILT_0 +938 0x2710 //TX_MIC1RUB_AMP_THR +939 0x0010 //TX_MIC1MUTE_RATIO_THR +940 0x0450 //TX_MIC1MUTE_AMP_THR +941 0x0008 //TX_MIC1MUTE_CVG_TIME +942 0x0008 //TX_MIC1MUTE_RELEASE_TIME +943 0x0000 //TX_AMS_RESRV_01 +944 0x0000 //TX_AMS_RESRV_02 +945 0x0000 //TX_AMS_RESRV_03 +946 0x0000 //TX_AMS_RESRV_04 +947 0x0000 //TX_AMS_RESRV_05 +948 0x0000 //TX_AMS_RESRV_06 +949 0x0000 //TX_AMS_RESRV_07 +950 0x0000 //TX_AMS_RESRV_08 +951 0x0000 //TX_AMS_RESRV_09 +952 0x0000 //TX_AMS_RESRV_10 +953 0x0000 //TX_AMS_RESRV_11 +954 0x0000 //TX_AMS_RESRV_12 +955 0x0000 //TX_AMS_RESRV_13 +956 0x0000 //TX_AMS_RESRV_14 +957 0x0000 //TX_AMS_RESRV_15 +958 0x0000 //TX_AMS_RESRV_16 +959 0x0000 //TX_AMS_RESRV_17 +960 0x0000 //TX_AMS_RESRV_18 +961 0x0000 //TX_AMS_RESRV_19 #RX -0 0x0040 //RX_RECVFUNC_MODE_0 +0 0x2040 //RX_RECVFUNC_MODE_0 1 0x0000 //RX_RECVFUNC_MODE_1 2 0x0000 //RX_SAMPLINGFREQ_SIG 3 0x0000 //RX_SAMPLINGFREQ_PROC @@ -50868,11 +76581,862 @@ 110 0x0000 //RX_FDDRC_RESRV_0 129 0x0100 //RX_SPK_VOL 130 0x0000 //RX_VOL_RESRV_0 +#RX 2 +157 0x2040 //RX_RECVFUNC_MODE_0 +158 0x0000 //RX_RECVFUNC_MODE_1 +159 0x0000 //RX_SAMPLINGFREQ_SIG +160 0x0000 //RX_SAMPLINGFREQ_PROC +161 0x000A //RX_FRAME_SZ +162 0x0000 //RX_DELAY_OPT +163 0x3000 //RX_TDDRC_ALPHA_UP_1 +164 0x3000 //RX_TDDRC_ALPHA_UP_2 +165 0x3000 //RX_TDDRC_ALPHA_UP_3 +166 0x3000 //RX_TDDRC_ALPHA_UP_4 +167 0x050D //RX_PGA +168 0x7652 //RX_A_HP +169 0x4000 //RX_B_PE +170 0x7800 //RX_THR_PITCH_DET_0 +171 0x7000 //RX_THR_PITCH_DET_1 +172 0x6000 //RX_THR_PITCH_DET_2 +173 0x0000 //RX_PITCH_BFR_LEN +174 0x0000 //RX_SBD_PITCH_DET +175 0x0000 //RX_PP_RESRV_0 +176 0x0000 //RX_PP_RESRV_1 +177 0xF800 //RX_N_SN_EST +178 0x0000 //RX_N2_SN_EST +179 0x000F //RX_NS_LVL_CTRL +180 0xF800 //RX_THR_SN_EST +181 0x7E00 //RX_LAMBDA_PFILT +182 0x000A //RX_FENS_RESRV_0 +183 0x0000 //RX_FENS_RESRV_1 +184 0x7FB0 //RX_TDDRC_ALPHA_DWN_1 +185 0x7FB0 //RX_TDDRC_ALPHA_DWN_2 +186 0x7FB0 //RX_TDDRC_ALPHA_DWN_3 +187 0x0000 //RX_EXTRA_NS_L +188 0x0000 //RX_EXTRA_NS_A +189 0x7FB0 //RX_TDDRC_ALPHA_DWN_4 +190 0xDA9E //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +192 0x0000 //RX_A_POST_FLT +193 0x0000 //RX_LMT_THRD +194 0x4000 //RX_LMT_ALPHA +195 0x0020 //RX_FDEQ_SUBNUM +196 0x4848 //RX_FDEQ_GAIN_0 +197 0x4848 //RX_FDEQ_GAIN_1 +198 0x4848 //RX_FDEQ_GAIN_2 +199 0x4848 //RX_FDEQ_GAIN_3 +200 0x4848 //RX_FDEQ_GAIN_4 +201 0x4848 //RX_FDEQ_GAIN_5 +202 0x4848 //RX_FDEQ_GAIN_6 +203 0x4848 //RX_FDEQ_GAIN_7 +204 0x4848 //RX_FDEQ_GAIN_8 +205 0x4848 //RX_FDEQ_GAIN_9 +206 0x4848 //RX_FDEQ_GAIN_10 +207 0x4848 //RX_FDEQ_GAIN_11 +208 0x4848 //RX_FDEQ_GAIN_12 +209 0x4848 //RX_FDEQ_GAIN_13 +210 0x4848 //RX_FDEQ_GAIN_14 +211 0x4848 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0000 //RX_FDEQ_BIN_0 +221 0x0000 //RX_FDEQ_BIN_1 +222 0x0000 //RX_FDEQ_BIN_2 +223 0x0000 //RX_FDEQ_BIN_3 +224 0x0000 //RX_FDEQ_BIN_4 +225 0x0000 //RX_FDEQ_BIN_5 +226 0x0000 //RX_FDEQ_BIN_6 +227 0x0000 //RX_FDEQ_BIN_7 +228 0x0000 //RX_FDEQ_BIN_8 +229 0x0000 //RX_FDEQ_BIN_9 +230 0x0000 //RX_FDEQ_BIN_10 +231 0x0000 //RX_FDEQ_BIN_11 +232 0x0000 //RX_FDEQ_BIN_12 +233 0x0000 //RX_FDEQ_BIN_13 +234 0x0000 //RX_FDEQ_BIN_14 +235 0x0000 //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x0000 //RX_FDEQ_RESRV_0 +245 0x0000 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0030 //RX_FDDRC_BAND_MARGIN_1 +248 0x0050 //RX_FDDRC_BAND_MARGIN_2 +249 0x0080 //RX_FDDRC_BAND_MARGIN_3 +250 0x0004 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x5000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x6400 //RX_FDDRC_THRD_3_2 +258 0x6400 //RX_FDDRC_THRD_3_3 +259 0x2000 //RX_FDDRC_SLANT_0_0 +260 0x2000 //RX_FDDRC_SLANT_0_1 +261 0x2000 //RX_FDDRC_SLANT_0_2 +262 0x2000 //RX_FDDRC_SLANT_0_3 +263 0x2000 //RX_FDDRC_SLANT_1_0 +264 0x2000 //RX_FDDRC_SLANT_1_1 +265 0x2000 //RX_FDDRC_SLANT_1_2 +266 0x2000 //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +268 0x0003 //RX_FILTINDX +269 0x0000 //RX_TDDRC_THRD_0 +270 0x0000 //RX_TDDRC_THRD_1 +271 0x0E80 //RX_TDDRC_THRD_2 +272 0x3800 //RX_TDDRC_THRD_3 +273 0x2A00 //RX_TDDRC_SLANT_0 +274 0x6E00 //RX_TDDRC_SLANT_1 +275 0x3000 //RX_TDDRC_ALPHA_UP_0 +276 0x7FB0 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x0000 //RX_TDDRC_HMNC_GAIN +279 0x0000 //RX_TDDRC_SMT_FLAG +280 0x0000 //RX_TDDRC_SMT_W +281 0x0100 //RX_TDDRC_DRC_GAIN +282 0x7C00 //RX_LAMBDA_PKA_FP +283 0x2000 //RX_TPKA_FP +284 0x0080 //RX_MIN_G_FP +285 0x2000 //RX_MAX_G_FP +286 0x0100 //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 +288 0x0010 //RX_MAXLEVEL_CNG +289 0x0000 //RX_BWE_UV_TH +290 0x0000 //RX_BWE_UV_TH2 +291 0x0000 //RX_BWE_UV_TH3 +292 0x0000 //RX_BWE_V_TH +293 0x0000 //RX_BWE_GAIN1_V_TH1 +294 0x0000 //RX_BWE_GAIN1_V_TH2 +295 0x0000 //RX_BWE_UV_EQ +296 0x0000 //RX_BWE_V_EQ +297 0x0000 //RX_BWE_TONE_TH +298 0x0000 //RX_BWE_UV_HOLD_T +299 0x0000 //RX_BWE_GAIN2_ALPHA +300 0x0000 //RX_BWE_GAIN3_ALPHA +301 0x0000 //RX_BWE_CUTOFF +302 0x0000 //RX_BWE_GAINFILL +303 0x0000 //RX_BWE_MAXTH_TONE +304 0x0000 //RX_BWE_EQ_0 +305 0x0000 //RX_BWE_EQ_1 +306 0x0000 //RX_BWE_EQ_2 +307 0x0000 //RX_BWE_EQ_3 +308 0x0000 //RX_BWE_EQ_4 +309 0x0000 //RX_BWE_EQ_5 +310 0x0000 //RX_BWE_EQ_6 +311 0x0000 //RX_BWE_RESRV_0 +312 0x0000 //RX_BWE_RESRV_1 +313 0x0000 //RX_BWE_RESRV_2 +#VOL 0 +163 0x3000 //RX_TDDRC_ALPHA_UP_1 +164 0x3000 //RX_TDDRC_ALPHA_UP_2 +165 0x3000 //RX_TDDRC_ALPHA_UP_3 +166 0x3000 //RX_TDDRC_ALPHA_UP_4 +184 0x7FB0 //RX_TDDRC_ALPHA_DWN_1 +185 0x7FB0 //RX_TDDRC_ALPHA_DWN_2 +186 0x7FB0 //RX_TDDRC_ALPHA_DWN_3 +189 0x7FB0 //RX_TDDRC_ALPHA_DWN_4 +190 0xDA9E //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +269 0x0000 //RX_TDDRC_THRD_0 +270 0x0000 //RX_TDDRC_THRD_1 +271 0x0E80 //RX_TDDRC_THRD_2 +272 0x3800 //RX_TDDRC_THRD_3 +273 0x2A00 //RX_TDDRC_SLANT_0 +274 0x6E00 //RX_TDDRC_SLANT_1 +275 0x3000 //RX_TDDRC_ALPHA_UP_0 +276 0x7FB0 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x0000 //RX_TDDRC_HMNC_GAIN +279 0x0000 //RX_TDDRC_SMT_FLAG +280 0x0000 //RX_TDDRC_SMT_W +281 0x0100 //RX_TDDRC_DRC_GAIN +195 0x0020 //RX_FDEQ_SUBNUM +196 0x4848 //RX_FDEQ_GAIN_0 +197 0x4848 //RX_FDEQ_GAIN_1 +198 0x4848 //RX_FDEQ_GAIN_2 +199 0x4848 //RX_FDEQ_GAIN_3 +200 0x4848 //RX_FDEQ_GAIN_4 +201 0x4848 //RX_FDEQ_GAIN_5 +202 0x4848 //RX_FDEQ_GAIN_6 +203 0x4848 //RX_FDEQ_GAIN_7 +204 0x4848 //RX_FDEQ_GAIN_8 +205 0x4848 //RX_FDEQ_GAIN_9 +206 0x4848 //RX_FDEQ_GAIN_10 +207 0x4848 //RX_FDEQ_GAIN_11 +208 0x4848 //RX_FDEQ_GAIN_12 +209 0x4848 //RX_FDEQ_GAIN_13 +210 0x4848 //RX_FDEQ_GAIN_14 +211 0x4848 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0000 //RX_FDEQ_BIN_0 +221 0x0000 //RX_FDEQ_BIN_1 +222 0x0000 //RX_FDEQ_BIN_2 +223 0x0000 //RX_FDEQ_BIN_3 +224 0x0000 //RX_FDEQ_BIN_4 +225 0x0000 //RX_FDEQ_BIN_5 +226 0x0000 //RX_FDEQ_BIN_6 +227 0x0000 //RX_FDEQ_BIN_7 +228 0x0000 //RX_FDEQ_BIN_8 +229 0x0000 //RX_FDEQ_BIN_9 +230 0x0000 //RX_FDEQ_BIN_10 +231 0x0000 //RX_FDEQ_BIN_11 +232 0x0000 //RX_FDEQ_BIN_12 +233 0x0000 //RX_FDEQ_BIN_13 +234 0x0000 //RX_FDEQ_BIN_14 +235 0x0000 //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x0000 //RX_FDEQ_RESRV_0 +245 0x0000 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0030 //RX_FDDRC_BAND_MARGIN_1 +248 0x0050 //RX_FDDRC_BAND_MARGIN_2 +249 0x0080 //RX_FDDRC_BAND_MARGIN_3 +250 0x0004 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x5000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x6400 //RX_FDDRC_THRD_3_2 +258 0x6400 //RX_FDDRC_THRD_3_3 +259 0x2000 //RX_FDDRC_SLANT_0_0 +260 0x2000 //RX_FDDRC_SLANT_0_1 +261 0x2000 //RX_FDDRC_SLANT_0_2 +262 0x2000 //RX_FDDRC_SLANT_0_3 +263 0x2000 //RX_FDDRC_SLANT_1_0 +264 0x2000 //RX_FDDRC_SLANT_1_1 +265 0x2000 //RX_FDDRC_SLANT_1_2 +266 0x2000 //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +286 0x0100 //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 +#VOL 1 +163 0x3000 //RX_TDDRC_ALPHA_UP_1 +164 0x3000 //RX_TDDRC_ALPHA_UP_2 +165 0x3000 //RX_TDDRC_ALPHA_UP_3 +166 0x3000 //RX_TDDRC_ALPHA_UP_4 +184 0x7FB0 //RX_TDDRC_ALPHA_DWN_1 +185 0x7FB0 //RX_TDDRC_ALPHA_DWN_2 +186 0x7FB0 //RX_TDDRC_ALPHA_DWN_3 +189 0x7FB0 //RX_TDDRC_ALPHA_DWN_4 +190 0xDA9E //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +269 0x0000 //RX_TDDRC_THRD_0 +270 0x0000 //RX_TDDRC_THRD_1 +271 0x0E80 //RX_TDDRC_THRD_2 +272 0x3800 //RX_TDDRC_THRD_3 +273 0x2A00 //RX_TDDRC_SLANT_0 +274 0x6E00 //RX_TDDRC_SLANT_1 +275 0x3000 //RX_TDDRC_ALPHA_UP_0 +276 0x7FB0 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x0000 //RX_TDDRC_HMNC_GAIN +279 0x0000 //RX_TDDRC_SMT_FLAG +280 0x0000 //RX_TDDRC_SMT_W +281 0x0100 //RX_TDDRC_DRC_GAIN +195 0x0020 //RX_FDEQ_SUBNUM +196 0x4848 //RX_FDEQ_GAIN_0 +197 0x4848 //RX_FDEQ_GAIN_1 +198 0x4848 //RX_FDEQ_GAIN_2 +199 0x4848 //RX_FDEQ_GAIN_3 +200 0x4848 //RX_FDEQ_GAIN_4 +201 0x4848 //RX_FDEQ_GAIN_5 +202 0x4848 //RX_FDEQ_GAIN_6 +203 0x4848 //RX_FDEQ_GAIN_7 +204 0x4848 //RX_FDEQ_GAIN_8 +205 0x4848 //RX_FDEQ_GAIN_9 +206 0x4848 //RX_FDEQ_GAIN_10 +207 0x4848 //RX_FDEQ_GAIN_11 +208 0x4848 //RX_FDEQ_GAIN_12 +209 0x4848 //RX_FDEQ_GAIN_13 +210 0x4848 //RX_FDEQ_GAIN_14 +211 0x4848 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0000 //RX_FDEQ_BIN_0 +221 0x0000 //RX_FDEQ_BIN_1 +222 0x0000 //RX_FDEQ_BIN_2 +223 0x0000 //RX_FDEQ_BIN_3 +224 0x0000 //RX_FDEQ_BIN_4 +225 0x0000 //RX_FDEQ_BIN_5 +226 0x0000 //RX_FDEQ_BIN_6 +227 0x0000 //RX_FDEQ_BIN_7 +228 0x0000 //RX_FDEQ_BIN_8 +229 0x0000 //RX_FDEQ_BIN_9 +230 0x0000 //RX_FDEQ_BIN_10 +231 0x0000 //RX_FDEQ_BIN_11 +232 0x0000 //RX_FDEQ_BIN_12 +233 0x0000 //RX_FDEQ_BIN_13 +234 0x0000 //RX_FDEQ_BIN_14 +235 0x0000 //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x0000 //RX_FDEQ_RESRV_0 +245 0x0000 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0030 //RX_FDDRC_BAND_MARGIN_1 +248 0x0050 //RX_FDDRC_BAND_MARGIN_2 +249 0x0080 //RX_FDDRC_BAND_MARGIN_3 +250 0x0004 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x5000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x6400 //RX_FDDRC_THRD_3_2 +258 0x6400 //RX_FDDRC_THRD_3_3 +259 0x2000 //RX_FDDRC_SLANT_0_0 +260 0x2000 //RX_FDDRC_SLANT_0_1 +261 0x2000 //RX_FDDRC_SLANT_0_2 +262 0x2000 //RX_FDDRC_SLANT_0_3 +263 0x2000 //RX_FDDRC_SLANT_1_0 +264 0x2000 //RX_FDDRC_SLANT_1_1 +265 0x2000 //RX_FDDRC_SLANT_1_2 +266 0x2000 //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +286 0x0100 //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 +#VOL 2 +163 0x3000 //RX_TDDRC_ALPHA_UP_1 +164 0x3000 //RX_TDDRC_ALPHA_UP_2 +165 0x3000 //RX_TDDRC_ALPHA_UP_3 +166 0x3000 //RX_TDDRC_ALPHA_UP_4 +184 0x7FB0 //RX_TDDRC_ALPHA_DWN_1 +185 0x7FB0 //RX_TDDRC_ALPHA_DWN_2 +186 0x7FB0 //RX_TDDRC_ALPHA_DWN_3 +189 0x7FB0 //RX_TDDRC_ALPHA_DWN_4 +190 0xDA9E //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +269 0x0000 //RX_TDDRC_THRD_0 +270 0x0000 //RX_TDDRC_THRD_1 +271 0x0E80 //RX_TDDRC_THRD_2 +272 0x3800 //RX_TDDRC_THRD_3 +273 0x2A00 //RX_TDDRC_SLANT_0 +274 0x6E00 //RX_TDDRC_SLANT_1 +275 0x3000 //RX_TDDRC_ALPHA_UP_0 +276 0x7FB0 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x0000 //RX_TDDRC_HMNC_GAIN +279 0x0000 //RX_TDDRC_SMT_FLAG +280 0x0000 //RX_TDDRC_SMT_W +281 0x0100 //RX_TDDRC_DRC_GAIN +195 0x0020 //RX_FDEQ_SUBNUM +196 0x4848 //RX_FDEQ_GAIN_0 +197 0x4848 //RX_FDEQ_GAIN_1 +198 0x4848 //RX_FDEQ_GAIN_2 +199 0x4848 //RX_FDEQ_GAIN_3 +200 0x4848 //RX_FDEQ_GAIN_4 +201 0x4848 //RX_FDEQ_GAIN_5 +202 0x4848 //RX_FDEQ_GAIN_6 +203 0x4848 //RX_FDEQ_GAIN_7 +204 0x4848 //RX_FDEQ_GAIN_8 +205 0x4848 //RX_FDEQ_GAIN_9 +206 0x4848 //RX_FDEQ_GAIN_10 +207 0x4848 //RX_FDEQ_GAIN_11 +208 0x4848 //RX_FDEQ_GAIN_12 +209 0x4848 //RX_FDEQ_GAIN_13 +210 0x4848 //RX_FDEQ_GAIN_14 +211 0x4848 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0000 //RX_FDEQ_BIN_0 +221 0x0000 //RX_FDEQ_BIN_1 +222 0x0000 //RX_FDEQ_BIN_2 +223 0x0000 //RX_FDEQ_BIN_3 +224 0x0000 //RX_FDEQ_BIN_4 +225 0x0000 //RX_FDEQ_BIN_5 +226 0x0000 //RX_FDEQ_BIN_6 +227 0x0000 //RX_FDEQ_BIN_7 +228 0x0000 //RX_FDEQ_BIN_8 +229 0x0000 //RX_FDEQ_BIN_9 +230 0x0000 //RX_FDEQ_BIN_10 +231 0x0000 //RX_FDEQ_BIN_11 +232 0x0000 //RX_FDEQ_BIN_12 +233 0x0000 //RX_FDEQ_BIN_13 +234 0x0000 //RX_FDEQ_BIN_14 +235 0x0000 //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x0000 //RX_FDEQ_RESRV_0 +245 0x0000 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0030 //RX_FDDRC_BAND_MARGIN_1 +248 0x0050 //RX_FDDRC_BAND_MARGIN_2 +249 0x0080 //RX_FDDRC_BAND_MARGIN_3 +250 0x0004 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x5000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x6400 //RX_FDDRC_THRD_3_2 +258 0x6400 //RX_FDDRC_THRD_3_3 +259 0x2000 //RX_FDDRC_SLANT_0_0 +260 0x2000 //RX_FDDRC_SLANT_0_1 +261 0x2000 //RX_FDDRC_SLANT_0_2 +262 0x2000 //RX_FDDRC_SLANT_0_3 +263 0x2000 //RX_FDDRC_SLANT_1_0 +264 0x2000 //RX_FDDRC_SLANT_1_1 +265 0x2000 //RX_FDDRC_SLANT_1_2 +266 0x2000 //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +286 0x0100 //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 +#VOL 3 +163 0x3000 //RX_TDDRC_ALPHA_UP_1 +164 0x3000 //RX_TDDRC_ALPHA_UP_2 +165 0x3000 //RX_TDDRC_ALPHA_UP_3 +166 0x3000 //RX_TDDRC_ALPHA_UP_4 +184 0x7FB0 //RX_TDDRC_ALPHA_DWN_1 +185 0x7FB0 //RX_TDDRC_ALPHA_DWN_2 +186 0x7FB0 //RX_TDDRC_ALPHA_DWN_3 +189 0x7FB0 //RX_TDDRC_ALPHA_DWN_4 +190 0xDA9E //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +269 0x0000 //RX_TDDRC_THRD_0 +270 0x0000 //RX_TDDRC_THRD_1 +271 0x0E80 //RX_TDDRC_THRD_2 +272 0x3800 //RX_TDDRC_THRD_3 +273 0x2A00 //RX_TDDRC_SLANT_0 +274 0x6E00 //RX_TDDRC_SLANT_1 +275 0x3000 //RX_TDDRC_ALPHA_UP_0 +276 0x7FB0 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x0000 //RX_TDDRC_HMNC_GAIN +279 0x0000 //RX_TDDRC_SMT_FLAG +280 0x0000 //RX_TDDRC_SMT_W +281 0x0100 //RX_TDDRC_DRC_GAIN +195 0x0020 //RX_FDEQ_SUBNUM +196 0x4848 //RX_FDEQ_GAIN_0 +197 0x4848 //RX_FDEQ_GAIN_1 +198 0x4848 //RX_FDEQ_GAIN_2 +199 0x4848 //RX_FDEQ_GAIN_3 +200 0x4848 //RX_FDEQ_GAIN_4 +201 0x4848 //RX_FDEQ_GAIN_5 +202 0x4848 //RX_FDEQ_GAIN_6 +203 0x4848 //RX_FDEQ_GAIN_7 +204 0x4848 //RX_FDEQ_GAIN_8 +205 0x4848 //RX_FDEQ_GAIN_9 +206 0x4848 //RX_FDEQ_GAIN_10 +207 0x4848 //RX_FDEQ_GAIN_11 +208 0x4848 //RX_FDEQ_GAIN_12 +209 0x4848 //RX_FDEQ_GAIN_13 +210 0x4848 //RX_FDEQ_GAIN_14 +211 0x4848 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0000 //RX_FDEQ_BIN_0 +221 0x0000 //RX_FDEQ_BIN_1 +222 0x0000 //RX_FDEQ_BIN_2 +223 0x0000 //RX_FDEQ_BIN_3 +224 0x0000 //RX_FDEQ_BIN_4 +225 0x0000 //RX_FDEQ_BIN_5 +226 0x0000 //RX_FDEQ_BIN_6 +227 0x0000 //RX_FDEQ_BIN_7 +228 0x0000 //RX_FDEQ_BIN_8 +229 0x0000 //RX_FDEQ_BIN_9 +230 0x0000 //RX_FDEQ_BIN_10 +231 0x0000 //RX_FDEQ_BIN_11 +232 0x0000 //RX_FDEQ_BIN_12 +233 0x0000 //RX_FDEQ_BIN_13 +234 0x0000 //RX_FDEQ_BIN_14 +235 0x0000 //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x0000 //RX_FDEQ_RESRV_0 +245 0x0000 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0030 //RX_FDDRC_BAND_MARGIN_1 +248 0x0050 //RX_FDDRC_BAND_MARGIN_2 +249 0x0080 //RX_FDDRC_BAND_MARGIN_3 +250 0x0004 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x5000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x6400 //RX_FDDRC_THRD_3_2 +258 0x6400 //RX_FDDRC_THRD_3_3 +259 0x2000 //RX_FDDRC_SLANT_0_0 +260 0x2000 //RX_FDDRC_SLANT_0_1 +261 0x2000 //RX_FDDRC_SLANT_0_2 +262 0x2000 //RX_FDDRC_SLANT_0_3 +263 0x2000 //RX_FDDRC_SLANT_1_0 +264 0x2000 //RX_FDDRC_SLANT_1_1 +265 0x2000 //RX_FDDRC_SLANT_1_2 +266 0x2000 //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +286 0x0100 //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 +#VOL 4 +163 0x3000 //RX_TDDRC_ALPHA_UP_1 +164 0x3000 //RX_TDDRC_ALPHA_UP_2 +165 0x3000 //RX_TDDRC_ALPHA_UP_3 +166 0x3000 //RX_TDDRC_ALPHA_UP_4 +184 0x7FB0 //RX_TDDRC_ALPHA_DWN_1 +185 0x7FB0 //RX_TDDRC_ALPHA_DWN_2 +186 0x7FB0 //RX_TDDRC_ALPHA_DWN_3 +189 0x7FB0 //RX_TDDRC_ALPHA_DWN_4 +190 0xDA9E //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +269 0x0000 //RX_TDDRC_THRD_0 +270 0x0000 //RX_TDDRC_THRD_1 +271 0x0E80 //RX_TDDRC_THRD_2 +272 0x3800 //RX_TDDRC_THRD_3 +273 0x2A00 //RX_TDDRC_SLANT_0 +274 0x6E00 //RX_TDDRC_SLANT_1 +275 0x3000 //RX_TDDRC_ALPHA_UP_0 +276 0x7FB0 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x0000 //RX_TDDRC_HMNC_GAIN +279 0x0000 //RX_TDDRC_SMT_FLAG +280 0x0000 //RX_TDDRC_SMT_W +281 0x0100 //RX_TDDRC_DRC_GAIN +195 0x0020 //RX_FDEQ_SUBNUM +196 0x4848 //RX_FDEQ_GAIN_0 +197 0x4848 //RX_FDEQ_GAIN_1 +198 0x4848 //RX_FDEQ_GAIN_2 +199 0x4848 //RX_FDEQ_GAIN_3 +200 0x4848 //RX_FDEQ_GAIN_4 +201 0x4848 //RX_FDEQ_GAIN_5 +202 0x4848 //RX_FDEQ_GAIN_6 +203 0x4848 //RX_FDEQ_GAIN_7 +204 0x4848 //RX_FDEQ_GAIN_8 +205 0x4848 //RX_FDEQ_GAIN_9 +206 0x4848 //RX_FDEQ_GAIN_10 +207 0x4848 //RX_FDEQ_GAIN_11 +208 0x4848 //RX_FDEQ_GAIN_12 +209 0x4848 //RX_FDEQ_GAIN_13 +210 0x4848 //RX_FDEQ_GAIN_14 +211 0x4848 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0000 //RX_FDEQ_BIN_0 +221 0x0000 //RX_FDEQ_BIN_1 +222 0x0000 //RX_FDEQ_BIN_2 +223 0x0000 //RX_FDEQ_BIN_3 +224 0x0000 //RX_FDEQ_BIN_4 +225 0x0000 //RX_FDEQ_BIN_5 +226 0x0000 //RX_FDEQ_BIN_6 +227 0x0000 //RX_FDEQ_BIN_7 +228 0x0000 //RX_FDEQ_BIN_8 +229 0x0000 //RX_FDEQ_BIN_9 +230 0x0000 //RX_FDEQ_BIN_10 +231 0x0000 //RX_FDEQ_BIN_11 +232 0x0000 //RX_FDEQ_BIN_12 +233 0x0000 //RX_FDEQ_BIN_13 +234 0x0000 //RX_FDEQ_BIN_14 +235 0x0000 //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x0000 //RX_FDEQ_RESRV_0 +245 0x0000 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0030 //RX_FDDRC_BAND_MARGIN_1 +248 0x0050 //RX_FDDRC_BAND_MARGIN_2 +249 0x0080 //RX_FDDRC_BAND_MARGIN_3 +250 0x0004 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x5000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x6400 //RX_FDDRC_THRD_3_2 +258 0x6400 //RX_FDDRC_THRD_3_3 +259 0x2000 //RX_FDDRC_SLANT_0_0 +260 0x2000 //RX_FDDRC_SLANT_0_1 +261 0x2000 //RX_FDDRC_SLANT_0_2 +262 0x2000 //RX_FDDRC_SLANT_0_3 +263 0x2000 //RX_FDDRC_SLANT_1_0 +264 0x2000 //RX_FDDRC_SLANT_1_1 +265 0x2000 //RX_FDDRC_SLANT_1_2 +266 0x2000 //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +286 0x0100 //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 +#VOL 5 +163 0x3000 //RX_TDDRC_ALPHA_UP_1 +164 0x3000 //RX_TDDRC_ALPHA_UP_2 +165 0x3000 //RX_TDDRC_ALPHA_UP_3 +166 0x3000 //RX_TDDRC_ALPHA_UP_4 +184 0x7FB0 //RX_TDDRC_ALPHA_DWN_1 +185 0x7FB0 //RX_TDDRC_ALPHA_DWN_2 +186 0x7FB0 //RX_TDDRC_ALPHA_DWN_3 +189 0x7FB0 //RX_TDDRC_ALPHA_DWN_4 +190 0xDA9E //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +269 0x0000 //RX_TDDRC_THRD_0 +270 0x0000 //RX_TDDRC_THRD_1 +271 0x0E80 //RX_TDDRC_THRD_2 +272 0x3800 //RX_TDDRC_THRD_3 +273 0x2A00 //RX_TDDRC_SLANT_0 +274 0x6E00 //RX_TDDRC_SLANT_1 +275 0x3000 //RX_TDDRC_ALPHA_UP_0 +276 0x7FB0 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x0000 //RX_TDDRC_HMNC_GAIN +279 0x0000 //RX_TDDRC_SMT_FLAG +280 0x0000 //RX_TDDRC_SMT_W +281 0x0100 //RX_TDDRC_DRC_GAIN +195 0x0020 //RX_FDEQ_SUBNUM +196 0x4848 //RX_FDEQ_GAIN_0 +197 0x4848 //RX_FDEQ_GAIN_1 +198 0x4848 //RX_FDEQ_GAIN_2 +199 0x4848 //RX_FDEQ_GAIN_3 +200 0x4848 //RX_FDEQ_GAIN_4 +201 0x4848 //RX_FDEQ_GAIN_5 +202 0x4848 //RX_FDEQ_GAIN_6 +203 0x4848 //RX_FDEQ_GAIN_7 +204 0x4848 //RX_FDEQ_GAIN_8 +205 0x4848 //RX_FDEQ_GAIN_9 +206 0x4848 //RX_FDEQ_GAIN_10 +207 0x4848 //RX_FDEQ_GAIN_11 +208 0x4848 //RX_FDEQ_GAIN_12 +209 0x4848 //RX_FDEQ_GAIN_13 +210 0x4848 //RX_FDEQ_GAIN_14 +211 0x4848 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0000 //RX_FDEQ_BIN_0 +221 0x0000 //RX_FDEQ_BIN_1 +222 0x0000 //RX_FDEQ_BIN_2 +223 0x0000 //RX_FDEQ_BIN_3 +224 0x0000 //RX_FDEQ_BIN_4 +225 0x0000 //RX_FDEQ_BIN_5 +226 0x0000 //RX_FDEQ_BIN_6 +227 0x0000 //RX_FDEQ_BIN_7 +228 0x0000 //RX_FDEQ_BIN_8 +229 0x0000 //RX_FDEQ_BIN_9 +230 0x0000 //RX_FDEQ_BIN_10 +231 0x0000 //RX_FDEQ_BIN_11 +232 0x0000 //RX_FDEQ_BIN_12 +233 0x0000 //RX_FDEQ_BIN_13 +234 0x0000 //RX_FDEQ_BIN_14 +235 0x0000 //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x0000 //RX_FDEQ_RESRV_0 +245 0x0000 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0030 //RX_FDDRC_BAND_MARGIN_1 +248 0x0050 //RX_FDDRC_BAND_MARGIN_2 +249 0x0080 //RX_FDDRC_BAND_MARGIN_3 +250 0x0004 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x5000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x6400 //RX_FDDRC_THRD_3_2 +258 0x6400 //RX_FDDRC_THRD_3_3 +259 0x2000 //RX_FDDRC_SLANT_0_0 +260 0x2000 //RX_FDDRC_SLANT_0_1 +261 0x2000 //RX_FDDRC_SLANT_0_2 +262 0x2000 //RX_FDDRC_SLANT_0_3 +263 0x2000 //RX_FDDRC_SLANT_1_0 +264 0x2000 //RX_FDDRC_SLANT_1_1 +265 0x2000 //RX_FDDRC_SLANT_1_2 +266 0x2000 //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +286 0x0100 //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 +#VOL 6 +163 0x3000 //RX_TDDRC_ALPHA_UP_1 +164 0x3000 //RX_TDDRC_ALPHA_UP_2 +165 0x3000 //RX_TDDRC_ALPHA_UP_3 +166 0x3000 //RX_TDDRC_ALPHA_UP_4 +184 0x7FB0 //RX_TDDRC_ALPHA_DWN_1 +185 0x7FB0 //RX_TDDRC_ALPHA_DWN_2 +186 0x7FB0 //RX_TDDRC_ALPHA_DWN_3 +189 0x7FB0 //RX_TDDRC_ALPHA_DWN_4 +190 0xDA9E //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +269 0x0000 //RX_TDDRC_THRD_0 +270 0x0000 //RX_TDDRC_THRD_1 +271 0x0E80 //RX_TDDRC_THRD_2 +272 0x3800 //RX_TDDRC_THRD_3 +273 0x2A00 //RX_TDDRC_SLANT_0 +274 0x6E00 //RX_TDDRC_SLANT_1 +275 0x3000 //RX_TDDRC_ALPHA_UP_0 +276 0x7FB0 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x0000 //RX_TDDRC_HMNC_GAIN +279 0x0000 //RX_TDDRC_SMT_FLAG +280 0x0000 //RX_TDDRC_SMT_W +281 0x0100 //RX_TDDRC_DRC_GAIN +195 0x0020 //RX_FDEQ_SUBNUM +196 0x4848 //RX_FDEQ_GAIN_0 +197 0x4848 //RX_FDEQ_GAIN_1 +198 0x4848 //RX_FDEQ_GAIN_2 +199 0x4848 //RX_FDEQ_GAIN_3 +200 0x4848 //RX_FDEQ_GAIN_4 +201 0x4848 //RX_FDEQ_GAIN_5 +202 0x4848 //RX_FDEQ_GAIN_6 +203 0x4848 //RX_FDEQ_GAIN_7 +204 0x4848 //RX_FDEQ_GAIN_8 +205 0x4848 //RX_FDEQ_GAIN_9 +206 0x4848 //RX_FDEQ_GAIN_10 +207 0x4848 //RX_FDEQ_GAIN_11 +208 0x4848 //RX_FDEQ_GAIN_12 +209 0x4848 //RX_FDEQ_GAIN_13 +210 0x4848 //RX_FDEQ_GAIN_14 +211 0x4848 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0000 //RX_FDEQ_BIN_0 +221 0x0000 //RX_FDEQ_BIN_1 +222 0x0000 //RX_FDEQ_BIN_2 +223 0x0000 //RX_FDEQ_BIN_3 +224 0x0000 //RX_FDEQ_BIN_4 +225 0x0000 //RX_FDEQ_BIN_5 +226 0x0000 //RX_FDEQ_BIN_6 +227 0x0000 //RX_FDEQ_BIN_7 +228 0x0000 //RX_FDEQ_BIN_8 +229 0x0000 //RX_FDEQ_BIN_9 +230 0x0000 //RX_FDEQ_BIN_10 +231 0x0000 //RX_FDEQ_BIN_11 +232 0x0000 //RX_FDEQ_BIN_12 +233 0x0000 //RX_FDEQ_BIN_13 +234 0x0000 //RX_FDEQ_BIN_14 +235 0x0000 //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x0000 //RX_FDEQ_RESRV_0 +245 0x0000 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0030 //RX_FDDRC_BAND_MARGIN_1 +248 0x0050 //RX_FDDRC_BAND_MARGIN_2 +249 0x0080 //RX_FDDRC_BAND_MARGIN_3 +250 0x0004 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x5000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x6400 //RX_FDDRC_THRD_3_2 +258 0x6400 //RX_FDDRC_THRD_3_3 +259 0x2000 //RX_FDDRC_SLANT_0_0 +260 0x2000 //RX_FDDRC_SLANT_0_1 +261 0x2000 //RX_FDDRC_SLANT_0_2 +262 0x2000 //RX_FDDRC_SLANT_0_3 +263 0x2000 //RX_FDDRC_SLANT_1_0 +264 0x2000 //RX_FDDRC_SLANT_1_1 +265 0x2000 //RX_FDDRC_SLANT_1_2 +266 0x2000 //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +286 0x0100 //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 #CASE_NAME HEADSET-TTY_FULL-VOICE_GENERIC-WB -#PARAM_MODE FULL -#PARAM_TYPE TX+RX -#TOTAL_CUSTOM_STEP 7 +#PARAM_MODE Full +#PARAM_TYPE TX+2RX +#TOTAL_CUSTOM_STEP 7+7 #TX 0 0x0001 //TX_OPERATION_MODE_0 1 0x0000 //TX_OPERATION_MODE_1 @@ -51116,7 +77680,7 @@ 239 0x0000 //TX_DT_RESRV_7 240 0x0000 //TX_DT_RESRV_8 241 0x0000 //TX_DT_RESRV_9 -242 0xF200 //TX_THR_SN_EST_0 +242 0xFA00 //TX_THR_SN_EST_0 243 0xF400 //TX_THR_SN_EST_1 244 0xF800 //TX_THR_SN_EST_2 245 0xF600 //TX_THR_SN_EST_3 @@ -51125,12 +77689,12 @@ 248 0xF800 //TX_THR_SN_EST_6 249 0xF800 //TX_THR_SN_EST_7 250 0x0100 //TX_DELTA_THR_SN_EST_0 -251 0x0000 //TX_DELTA_THR_SN_EST_1 +251 0x0100 //TX_DELTA_THR_SN_EST_1 252 0x0100 //TX_DELTA_THR_SN_EST_2 -253 0x0100 //TX_DELTA_THR_SN_EST_3 +253 0x0200 //TX_DELTA_THR_SN_EST_3 254 0x0200 //TX_DELTA_THR_SN_EST_4 255 0x0200 //TX_DELTA_THR_SN_EST_5 -256 0x0200 //TX_DELTA_THR_SN_EST_6 +256 0x0000 //TX_DELTA_THR_SN_EST_6 257 0x0200 //TX_DELTA_THR_SN_EST_7 258 0x4000 //TX_LAMBDA_NN_EST_0 259 0x4000 //TX_LAMBDA_NN_EST_1 @@ -51156,12 +77720,12 @@ 279 0x0000 //TX_B_POST_FLT_0 280 0x0000 //TX_B_POST_FLT_1 281 0x001A //TX_NS_LVL_CTRL_0 -282 0x001A //TX_NS_LVL_CTRL_1 +282 0x0014 //TX_NS_LVL_CTRL_1 283 0x0014 //TX_NS_LVL_CTRL_2 -284 0x0014 //TX_NS_LVL_CTRL_3 +284 0x000C //TX_NS_LVL_CTRL_3 285 0x000C //TX_NS_LVL_CTRL_4 286 0x000C //TX_NS_LVL_CTRL_5 -287 0x000C //TX_NS_LVL_CTRL_6 +287 0x001A //TX_NS_LVL_CTRL_6 288 0x000C //TX_NS_LVL_CTRL_7 289 0x000E //TX_MIN_GAIN_S_0 290 0x0014 //TX_MIN_GAIN_S_1 @@ -51177,10 +77741,10 @@ 300 0x7FFF //TX_SNRI_SUP_0 301 0x7FFF //TX_SNRI_SUP_1 302 0x7FFF //TX_SNRI_SUP_2 -303 0x7FFF //TX_SNRI_SUP_3 +303 0x4000 //TX_SNRI_SUP_3 304 0x4000 //TX_SNRI_SUP_4 305 0x4000 //TX_SNRI_SUP_5 -306 0x4000 //TX_SNRI_SUP_6 +306 0x7FFF //TX_SNRI_SUP_6 307 0x4000 //TX_SNRI_SUP_7 308 0x1200 //TX_THR_LFNS 309 0x0147 //TX_G_LFNS @@ -51189,12 +77753,12 @@ 312 0x7FFF //TX_A_POST_FILT_0 313 0x7FFF //TX_A_POST_FILT_1 314 0x4000 //TX_A_POST_FILT_S_0 -315 0x199A //TX_A_POST_FILT_S_1 +315 0x1000 //TX_A_POST_FILT_S_1 316 0x1000 //TX_A_POST_FILT_S_2 -317 0x1000 //TX_A_POST_FILT_S_3 +317 0x6666 //TX_A_POST_FILT_S_3 318 0x6666 //TX_A_POST_FILT_S_4 319 0x6666 //TX_A_POST_FILT_S_5 -320 0x6666 //TX_A_POST_FILT_S_6 +320 0x199A //TX_A_POST_FILT_S_6 321 0x6666 //TX_A_POST_FILT_S_7 322 0x2000 //TX_B_POST_FILT_0 323 0x2000 //TX_B_POST_FILT_1 @@ -51241,7 +77805,7 @@ 364 0x0000 //TX_K_APT 365 0x0001 //TX_NOISEDET 366 0x05A0 //TX_NDETCT -367 0x000A //TX_NOISE_TH_0 +367 0x0102 //TX_NOISE_TH_0 368 0x1388 //TX_NOISE_TH_0_2 369 0x3A98 //TX_NOISE_TH_0_3 370 0x0C80 //TX_NOISE_TH_1 @@ -51253,11 +77817,11 @@ 376 0x7FFF //TX_NOISE_TH_5_3 377 0x7FFF //TX_NOISE_TH_5_4 378 0x00C8 //TX_NOISE_TH_6 -379 0x000A //TX_MINENOISE_TH -380 0x0000 //TX_MINENOISE_MIC0_TH_MTS -381 0x0000 //TX_MINENOISE_MIC0_TH_EXP -382 0x0000 //TX_MINENOISE_MIC0_S_TH_MTS -383 0x0000 //TX_MINENOISE_MIC0_S_TH_EXP +379 0x00F8 //TX_MINENOISE_TH +380 0xD508 //TX_MORENS_TFMASK_TH +381 0x0001 //TX_DRC_QUIET_FLOOR +382 0x3A98 //TX_RATIODTL_CUT_TH +383 0x0DAC //TX_DT_CUT_K1 384 0x6400 //TX_OUT_ENER_S_TH_CLEAN 385 0x6400 //TX_OUT_ENER_S_TH_LESSCLEAN 386 0x6400 //TX_OUT_ENER_S_TH_NOISY @@ -51265,22 +77829,22 @@ 388 0x7D00 //TX_OUT_ENER_TH_SPEECH 389 0x0000 //TX_SN_NPB_GAIN 390 0x0000 //TX_NN_NPB_GAIN -391 0x0000 //TX_CSX_ALPHA_0 -392 0x0000 //TX_CSX_ALPHA_1 -393 0x0000 //TX_CSX_ALPHA_2 -394 0x0000 //TX_CSX_ALPHA_3 -395 0x0000 //TX_MU_ARSP_EST -396 0x0000 //TX_P_OUTBEAM_MIN_TH +391 0x7FFF //TX_POST_MASK_SUP_HSNE +392 0x1388 //TX_TAIL_DET_TH +393 0x4000 //TX_B_LESSCUT_RTO_WTA +394 0x0000 //TX_MEL_G_R +395 0x0080 //TX_SUPHIGH_TH +396 0x0000 //TX_MASK_G_R 397 0x0000 //TX_EXTRA_NS_L -398 0x0000 //TX_EXTRA_NS_A -399 0x0000 //TX_VR_NOISE_FLOOR_TH +398 0x1800 //TX_C_POST_FLT_MASK +399 0x7FFF //TX_A_POST_FLT_WNS 400 0x0000 //TX_MIN_G_LOW300HZ 401 0x0010 //TX_MAXLEVEL_CNG 402 0x0000 //TX_STN_NOISE_TH 403 0x0000 //TX_POST_MASK_SUP 404 0x0000 //TX_POST_MASK_ADJUST 405 0x0014 //TX_NS_ENOISE_MIC0_TH -406 0x0014 //TX_MINENOISE_MIC0_TH +406 0x00DC //TX_MINENOISE_MIC0_TH 407 0x0226 //TX_MINENOISE_MIC0_S_TH 408 0x2879 //TX_MIN_G_CTRL_SSNS 409 0x0400 //TX_METAL_RTO_THR @@ -51388,16 +77952,16 @@ 511 0x6666 //TX_MIC_TO_BFGAIN 512 0x6666 //TX_MICTOBFGAIN0 513 0x0014 //TX_FASTMUE_TH -514 0x0000 //TX_DERVB_LEN_0 -515 0x0000 //TX_DERVB_LEN_1 -516 0x0000 //TX_RHO_DERVB -517 0x0000 //TX_MIC_INDX_DERVB -518 0x0000 //TX_MU_DERVB -519 0x0000 //TX_DR_RESRV_0 -520 0x0000 //TX_DR_RESRV_1 -521 0x0000 //TX_DR_RESRV_2 -522 0x0000 //TX_DR_RESRV_3 -523 0x0000 //TX_DR_RESRV_4 +514 0xC000 //TX_DEREVERB_LF_MU +515 0xC000 //TX_DEREVERB_HF_MU +516 0xCCCC //TX_DEREVERB_DELAY +517 0xD999 //TX_DEREVERB_COEF_LEN +518 0x1F40 //TX_DEREVERB_DNR +519 0x0000 //TX_DEREVERB_ALPHA +520 0x0000 //TX_DEREVERB_BETA +521 0x0000 //TX_GSC_RTOL_TH +522 0x7000 //TX_GSC_RTOH_TH +523 0x0064 //TX_WIDE2_MEANHTH 524 0x0000 //TX_DR_RESRV_5 525 0x0000 //TX_DR_RESRV_6 526 0x0000 //TX_DR_RESRV_7 @@ -51763,16 +78327,81 @@ 886 0x0000 //TX_FASTNS_TFMASKBIN_TH2 887 0x0000 //TX_FASTNS_TFMASKBIN_TH3 888 0x00C8 //TX_FASTNS_ARSPC_TH -889 0xD99A //TX_FASTNS_MASK5_TH +889 0xC000 //TX_FASTNS_MASK5_TH 890 0x051F //TX_POSTSSA_MIN_G_VR_MASK -891 0x7FFF //TX_A_LESSCUT_RTO_MASK +891 0x4000 //TX_A_LESSCUT_RTO_MASK 892 0x1770 //TX_FASTNS_NOISETH 893 0xC000 //TX_FASTNS_SSA_THLFL 894 0xC000 //TX_FASTNS_SSA_THHFL 895 0xCCCC //TX_FASTNS_SSA_THLFH 896 0xD999 //TX_FASTNS_SSA_THHFH +897 0x2339 //TX_SENDFUNC_REG_MICMUTE +898 0x0021 //TX_SENDFUNC_REG_MICMUTE1 +899 0x02BC //TX_MICMUTE_RATIO_THR +900 0x0140 //TX_MICMUTE_AMP_THR +901 0x0004 //TX_MICMUTE_HPF_IND +902 0x00C0 //TX_MICMUTE_LOG_EYR_TH +903 0x0008 //TX_MICMUTE_CVG_TIME +904 0x0008 //TX_MICMUTE_RELEASE_TIME +905 0x01FE //TX_MIC_VOLUME_MIC0MUTE +906 0x0020 //TX_MICMUTE_EPD_OFFSET_0 +907 0x001E //TX_MICMUTE_FRQ_AEC_L +908 0x7999 //TX_MICMUTE_EAD_THR +909 0x7FFF //TX_MICMUTE_LAMBDA_CB_NLE +910 0x7FFF //TX_MICMUTE_LAMBDA_RE_EST +911 0x4000 //TX_DTD_THR1_MICMUTE_0 +912 0x7000 //TX_DTD_THR1_MICMUTE_1 +913 0x7FFF //TX_DTD_THR1_MICMUTE_2 +914 0x7FFF //TX_DTD_THR1_MICMUTE_3 +915 0x6CCC //TX_DTD_THR2_MICMUTE_0 +916 0x0400 //TX_MICMUTE_MIN_EQ_RE_EST_0 +917 0x0400 //TX_MICMUTE_MIN_EQ_RE_EST_1 +918 0x1000 //TX_MICMUTE_MIN_EQ_RE_EST_2 +919 0x7FFF //TX_MICMUTE_MIN_EQ_RE_EST_3 +920 0x7FFF //TX_MICMUTE_MIN_EQ_RE_EST_4 +921 0x4000 //TX_MICMUTE_C_POST_FLT +922 0x03E8 //TX_MICMUTE_DT_CUT_K +923 0x0001 //TX_MICMUTE_DT_CUT_THR +924 0x03E8 //TX_MICMUTE_DT_CUT_K2 +925 0x0001 //TX_MICMUTE_DT_CUT_THR2 +926 0x0064 //TX_MICMUTE_DT2_HOLD_N +927 0x1000 //TX_MICMUTE_RATIODTH_THCUT +928 0x1000 //TX_MICMUTE_B_POST_FLT_ECHOL +929 0x7FFF //TX_MICMUTE_B_POST_FLT_ECHOH +930 0x0400 //TX_MICMUTE_C_POST_FLT_MASK +931 0x7999 //TX_MICMUTE_RATIODTL_CUT_TH +932 0x0258 //TX_MICMUTE_DT_CUT_K1 +933 0x0800 //TX_MICMUTE_N2_SN_EST +934 0xFC00 //TX_MICMUTE_THR_SN_EST_0 +935 0x001C //TX_MICMUTE_MIN_G_CTRL_0 +936 0x6000 //TX_MICMUTE_A_POST_FILT_S_0 +937 0x7000 //TX_MICMUTE_B_POST_FILT_0 +938 0x2710 //TX_MIC1RUB_AMP_THR +939 0x0010 //TX_MIC1MUTE_RATIO_THR +940 0x0450 //TX_MIC1MUTE_AMP_THR +941 0x0008 //TX_MIC1MUTE_CVG_TIME +942 0x0008 //TX_MIC1MUTE_RELEASE_TIME +943 0x0000 //TX_AMS_RESRV_01 +944 0x0000 //TX_AMS_RESRV_02 +945 0x0000 //TX_AMS_RESRV_03 +946 0x0000 //TX_AMS_RESRV_04 +947 0x0000 //TX_AMS_RESRV_05 +948 0x0000 //TX_AMS_RESRV_06 +949 0x0000 //TX_AMS_RESRV_07 +950 0x0000 //TX_AMS_RESRV_08 +951 0x0000 //TX_AMS_RESRV_09 +952 0x0000 //TX_AMS_RESRV_10 +953 0x0000 //TX_AMS_RESRV_11 +954 0x0000 //TX_AMS_RESRV_12 +955 0x0000 //TX_AMS_RESRV_13 +956 0x0000 //TX_AMS_RESRV_14 +957 0x0000 //TX_AMS_RESRV_15 +958 0x0000 //TX_AMS_RESRV_16 +959 0x0000 //TX_AMS_RESRV_17 +960 0x0000 //TX_AMS_RESRV_18 +961 0x0000 //TX_AMS_RESRV_19 #RX -0 0x0040 //RX_RECVFUNC_MODE_0 +0 0x2040 //RX_RECVFUNC_MODE_0 1 0x0000 //RX_RECVFUNC_MODE_1 2 0x0000 //RX_SAMPLINGFREQ_SIG 3 0x0000 //RX_SAMPLINGFREQ_PROC @@ -52622,11 +79251,862 @@ 110 0x0000 //RX_FDDRC_RESRV_0 129 0x0100 //RX_SPK_VOL 130 0x0000 //RX_VOL_RESRV_0 +#RX 2 +157 0x2040 //RX_RECVFUNC_MODE_0 +158 0x0000 //RX_RECVFUNC_MODE_1 +159 0x0000 //RX_SAMPLINGFREQ_SIG +160 0x0000 //RX_SAMPLINGFREQ_PROC +161 0x000A //RX_FRAME_SZ +162 0x0000 //RX_DELAY_OPT +163 0x3000 //RX_TDDRC_ALPHA_UP_1 +164 0x3000 //RX_TDDRC_ALPHA_UP_2 +165 0x3000 //RX_TDDRC_ALPHA_UP_3 +166 0x3000 //RX_TDDRC_ALPHA_UP_4 +167 0x050D //RX_PGA +168 0x7652 //RX_A_HP +169 0x4000 //RX_B_PE +170 0x7800 //RX_THR_PITCH_DET_0 +171 0x7000 //RX_THR_PITCH_DET_1 +172 0x6000 //RX_THR_PITCH_DET_2 +173 0x0000 //RX_PITCH_BFR_LEN +174 0x0000 //RX_SBD_PITCH_DET +175 0x0000 //RX_PP_RESRV_0 +176 0x0000 //RX_PP_RESRV_1 +177 0xF800 //RX_N_SN_EST +178 0x0000 //RX_N2_SN_EST +179 0x000F //RX_NS_LVL_CTRL +180 0xF800 //RX_THR_SN_EST +181 0x7E00 //RX_LAMBDA_PFILT +182 0x000A //RX_FENS_RESRV_0 +183 0x0000 //RX_FENS_RESRV_1 +184 0x7FB0 //RX_TDDRC_ALPHA_DWN_1 +185 0x7FB0 //RX_TDDRC_ALPHA_DWN_2 +186 0x7FB0 //RX_TDDRC_ALPHA_DWN_3 +187 0x0000 //RX_EXTRA_NS_L +188 0x0000 //RX_EXTRA_NS_A +189 0x7FB0 //RX_TDDRC_ALPHA_DWN_4 +190 0xDA9E //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +192 0x0000 //RX_A_POST_FLT +193 0x0000 //RX_LMT_THRD +194 0x4000 //RX_LMT_ALPHA +195 0x0020 //RX_FDEQ_SUBNUM +196 0x4848 //RX_FDEQ_GAIN_0 +197 0x4848 //RX_FDEQ_GAIN_1 +198 0x4848 //RX_FDEQ_GAIN_2 +199 0x4848 //RX_FDEQ_GAIN_3 +200 0x4848 //RX_FDEQ_GAIN_4 +201 0x4848 //RX_FDEQ_GAIN_5 +202 0x4848 //RX_FDEQ_GAIN_6 +203 0x4848 //RX_FDEQ_GAIN_7 +204 0x4848 //RX_FDEQ_GAIN_8 +205 0x4848 //RX_FDEQ_GAIN_9 +206 0x4848 //RX_FDEQ_GAIN_10 +207 0x4848 //RX_FDEQ_GAIN_11 +208 0x4848 //RX_FDEQ_GAIN_12 +209 0x4848 //RX_FDEQ_GAIN_13 +210 0x4848 //RX_FDEQ_GAIN_14 +211 0x4848 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0000 //RX_FDEQ_BIN_0 +221 0x0000 //RX_FDEQ_BIN_1 +222 0x0000 //RX_FDEQ_BIN_2 +223 0x0000 //RX_FDEQ_BIN_3 +224 0x0000 //RX_FDEQ_BIN_4 +225 0x0000 //RX_FDEQ_BIN_5 +226 0x0000 //RX_FDEQ_BIN_6 +227 0x0000 //RX_FDEQ_BIN_7 +228 0x0000 //RX_FDEQ_BIN_8 +229 0x0000 //RX_FDEQ_BIN_9 +230 0x0000 //RX_FDEQ_BIN_10 +231 0x0000 //RX_FDEQ_BIN_11 +232 0x0000 //RX_FDEQ_BIN_12 +233 0x0000 //RX_FDEQ_BIN_13 +234 0x0000 //RX_FDEQ_BIN_14 +235 0x0000 //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x0000 //RX_FDEQ_RESRV_0 +245 0x0000 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0030 //RX_FDDRC_BAND_MARGIN_1 +248 0x0050 //RX_FDDRC_BAND_MARGIN_2 +249 0x0080 //RX_FDDRC_BAND_MARGIN_3 +250 0x0004 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x5000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x6400 //RX_FDDRC_THRD_3_2 +258 0x6400 //RX_FDDRC_THRD_3_3 +259 0x2000 //RX_FDDRC_SLANT_0_0 +260 0x2000 //RX_FDDRC_SLANT_0_1 +261 0x2000 //RX_FDDRC_SLANT_0_2 +262 0x2000 //RX_FDDRC_SLANT_0_3 +263 0x2000 //RX_FDDRC_SLANT_1_0 +264 0x2000 //RX_FDDRC_SLANT_1_1 +265 0x2000 //RX_FDDRC_SLANT_1_2 +266 0x2000 //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +268 0x0003 //RX_FILTINDX +269 0x0000 //RX_TDDRC_THRD_0 +270 0x0000 //RX_TDDRC_THRD_1 +271 0x0E80 //RX_TDDRC_THRD_2 +272 0x3800 //RX_TDDRC_THRD_3 +273 0x2A00 //RX_TDDRC_SLANT_0 +274 0x6E00 //RX_TDDRC_SLANT_1 +275 0x3000 //RX_TDDRC_ALPHA_UP_0 +276 0x7FB0 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x0000 //RX_TDDRC_HMNC_GAIN +279 0x0000 //RX_TDDRC_SMT_FLAG +280 0x0000 //RX_TDDRC_SMT_W +281 0x0100 //RX_TDDRC_DRC_GAIN +282 0x7C00 //RX_LAMBDA_PKA_FP +283 0x2000 //RX_TPKA_FP +284 0x0080 //RX_MIN_G_FP +285 0x2000 //RX_MAX_G_FP +286 0x0100 //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 +288 0x0010 //RX_MAXLEVEL_CNG +289 0x0000 //RX_BWE_UV_TH +290 0x0000 //RX_BWE_UV_TH2 +291 0x0000 //RX_BWE_UV_TH3 +292 0x0000 //RX_BWE_V_TH +293 0x0000 //RX_BWE_GAIN1_V_TH1 +294 0x0000 //RX_BWE_GAIN1_V_TH2 +295 0x0000 //RX_BWE_UV_EQ +296 0x0000 //RX_BWE_V_EQ +297 0x0000 //RX_BWE_TONE_TH +298 0x0000 //RX_BWE_UV_HOLD_T +299 0x0000 //RX_BWE_GAIN2_ALPHA +300 0x0000 //RX_BWE_GAIN3_ALPHA +301 0x0000 //RX_BWE_CUTOFF +302 0x0000 //RX_BWE_GAINFILL +303 0x0000 //RX_BWE_MAXTH_TONE +304 0x0000 //RX_BWE_EQ_0 +305 0x0000 //RX_BWE_EQ_1 +306 0x0000 //RX_BWE_EQ_2 +307 0x0000 //RX_BWE_EQ_3 +308 0x0000 //RX_BWE_EQ_4 +309 0x0000 //RX_BWE_EQ_5 +310 0x0000 //RX_BWE_EQ_6 +311 0x0000 //RX_BWE_RESRV_0 +312 0x0000 //RX_BWE_RESRV_1 +313 0x0000 //RX_BWE_RESRV_2 +#VOL 0 +163 0x3000 //RX_TDDRC_ALPHA_UP_1 +164 0x3000 //RX_TDDRC_ALPHA_UP_2 +165 0x3000 //RX_TDDRC_ALPHA_UP_3 +166 0x3000 //RX_TDDRC_ALPHA_UP_4 +184 0x7FB0 //RX_TDDRC_ALPHA_DWN_1 +185 0x7FB0 //RX_TDDRC_ALPHA_DWN_2 +186 0x7FB0 //RX_TDDRC_ALPHA_DWN_3 +189 0x7FB0 //RX_TDDRC_ALPHA_DWN_4 +190 0xDA9E //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +269 0x0000 //RX_TDDRC_THRD_0 +270 0x0000 //RX_TDDRC_THRD_1 +271 0x0E80 //RX_TDDRC_THRD_2 +272 0x3800 //RX_TDDRC_THRD_3 +273 0x2A00 //RX_TDDRC_SLANT_0 +274 0x6E00 //RX_TDDRC_SLANT_1 +275 0x3000 //RX_TDDRC_ALPHA_UP_0 +276 0x7FB0 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x0000 //RX_TDDRC_HMNC_GAIN +279 0x0000 //RX_TDDRC_SMT_FLAG +280 0x0000 //RX_TDDRC_SMT_W +281 0x0100 //RX_TDDRC_DRC_GAIN +195 0x0020 //RX_FDEQ_SUBNUM +196 0x4848 //RX_FDEQ_GAIN_0 +197 0x4848 //RX_FDEQ_GAIN_1 +198 0x4848 //RX_FDEQ_GAIN_2 +199 0x4848 //RX_FDEQ_GAIN_3 +200 0x4848 //RX_FDEQ_GAIN_4 +201 0x4848 //RX_FDEQ_GAIN_5 +202 0x4848 //RX_FDEQ_GAIN_6 +203 0x4848 //RX_FDEQ_GAIN_7 +204 0x4848 //RX_FDEQ_GAIN_8 +205 0x4848 //RX_FDEQ_GAIN_9 +206 0x4848 //RX_FDEQ_GAIN_10 +207 0x4848 //RX_FDEQ_GAIN_11 +208 0x4848 //RX_FDEQ_GAIN_12 +209 0x4848 //RX_FDEQ_GAIN_13 +210 0x4848 //RX_FDEQ_GAIN_14 +211 0x4848 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0000 //RX_FDEQ_BIN_0 +221 0x0000 //RX_FDEQ_BIN_1 +222 0x0000 //RX_FDEQ_BIN_2 +223 0x0000 //RX_FDEQ_BIN_3 +224 0x0000 //RX_FDEQ_BIN_4 +225 0x0000 //RX_FDEQ_BIN_5 +226 0x0000 //RX_FDEQ_BIN_6 +227 0x0000 //RX_FDEQ_BIN_7 +228 0x0000 //RX_FDEQ_BIN_8 +229 0x0000 //RX_FDEQ_BIN_9 +230 0x0000 //RX_FDEQ_BIN_10 +231 0x0000 //RX_FDEQ_BIN_11 +232 0x0000 //RX_FDEQ_BIN_12 +233 0x0000 //RX_FDEQ_BIN_13 +234 0x0000 //RX_FDEQ_BIN_14 +235 0x0000 //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x0000 //RX_FDEQ_RESRV_0 +245 0x0000 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0030 //RX_FDDRC_BAND_MARGIN_1 +248 0x0050 //RX_FDDRC_BAND_MARGIN_2 +249 0x0080 //RX_FDDRC_BAND_MARGIN_3 +250 0x0004 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x5000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x6400 //RX_FDDRC_THRD_3_2 +258 0x6400 //RX_FDDRC_THRD_3_3 +259 0x2000 //RX_FDDRC_SLANT_0_0 +260 0x2000 //RX_FDDRC_SLANT_0_1 +261 0x2000 //RX_FDDRC_SLANT_0_2 +262 0x2000 //RX_FDDRC_SLANT_0_3 +263 0x2000 //RX_FDDRC_SLANT_1_0 +264 0x2000 //RX_FDDRC_SLANT_1_1 +265 0x2000 //RX_FDDRC_SLANT_1_2 +266 0x2000 //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +286 0x0100 //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 +#VOL 1 +163 0x3000 //RX_TDDRC_ALPHA_UP_1 +164 0x3000 //RX_TDDRC_ALPHA_UP_2 +165 0x3000 //RX_TDDRC_ALPHA_UP_3 +166 0x3000 //RX_TDDRC_ALPHA_UP_4 +184 0x7FB0 //RX_TDDRC_ALPHA_DWN_1 +185 0x7FB0 //RX_TDDRC_ALPHA_DWN_2 +186 0x7FB0 //RX_TDDRC_ALPHA_DWN_3 +189 0x7FB0 //RX_TDDRC_ALPHA_DWN_4 +190 0xDA9E //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +269 0x0000 //RX_TDDRC_THRD_0 +270 0x0000 //RX_TDDRC_THRD_1 +271 0x0E80 //RX_TDDRC_THRD_2 +272 0x3800 //RX_TDDRC_THRD_3 +273 0x2A00 //RX_TDDRC_SLANT_0 +274 0x6E00 //RX_TDDRC_SLANT_1 +275 0x3000 //RX_TDDRC_ALPHA_UP_0 +276 0x7FB0 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x0000 //RX_TDDRC_HMNC_GAIN +279 0x0000 //RX_TDDRC_SMT_FLAG +280 0x0000 //RX_TDDRC_SMT_W +281 0x0100 //RX_TDDRC_DRC_GAIN +195 0x0020 //RX_FDEQ_SUBNUM +196 0x4848 //RX_FDEQ_GAIN_0 +197 0x4848 //RX_FDEQ_GAIN_1 +198 0x4848 //RX_FDEQ_GAIN_2 +199 0x4848 //RX_FDEQ_GAIN_3 +200 0x4848 //RX_FDEQ_GAIN_4 +201 0x4848 //RX_FDEQ_GAIN_5 +202 0x4848 //RX_FDEQ_GAIN_6 +203 0x4848 //RX_FDEQ_GAIN_7 +204 0x4848 //RX_FDEQ_GAIN_8 +205 0x4848 //RX_FDEQ_GAIN_9 +206 0x4848 //RX_FDEQ_GAIN_10 +207 0x4848 //RX_FDEQ_GAIN_11 +208 0x4848 //RX_FDEQ_GAIN_12 +209 0x4848 //RX_FDEQ_GAIN_13 +210 0x4848 //RX_FDEQ_GAIN_14 +211 0x4848 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0000 //RX_FDEQ_BIN_0 +221 0x0000 //RX_FDEQ_BIN_1 +222 0x0000 //RX_FDEQ_BIN_2 +223 0x0000 //RX_FDEQ_BIN_3 +224 0x0000 //RX_FDEQ_BIN_4 +225 0x0000 //RX_FDEQ_BIN_5 +226 0x0000 //RX_FDEQ_BIN_6 +227 0x0000 //RX_FDEQ_BIN_7 +228 0x0000 //RX_FDEQ_BIN_8 +229 0x0000 //RX_FDEQ_BIN_9 +230 0x0000 //RX_FDEQ_BIN_10 +231 0x0000 //RX_FDEQ_BIN_11 +232 0x0000 //RX_FDEQ_BIN_12 +233 0x0000 //RX_FDEQ_BIN_13 +234 0x0000 //RX_FDEQ_BIN_14 +235 0x0000 //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x0000 //RX_FDEQ_RESRV_0 +245 0x0000 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0030 //RX_FDDRC_BAND_MARGIN_1 +248 0x0050 //RX_FDDRC_BAND_MARGIN_2 +249 0x0080 //RX_FDDRC_BAND_MARGIN_3 +250 0x0004 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x5000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x6400 //RX_FDDRC_THRD_3_2 +258 0x6400 //RX_FDDRC_THRD_3_3 +259 0x2000 //RX_FDDRC_SLANT_0_0 +260 0x2000 //RX_FDDRC_SLANT_0_1 +261 0x2000 //RX_FDDRC_SLANT_0_2 +262 0x2000 //RX_FDDRC_SLANT_0_3 +263 0x2000 //RX_FDDRC_SLANT_1_0 +264 0x2000 //RX_FDDRC_SLANT_1_1 +265 0x2000 //RX_FDDRC_SLANT_1_2 +266 0x2000 //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +286 0x0100 //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 +#VOL 2 +163 0x3000 //RX_TDDRC_ALPHA_UP_1 +164 0x3000 //RX_TDDRC_ALPHA_UP_2 +165 0x3000 //RX_TDDRC_ALPHA_UP_3 +166 0x3000 //RX_TDDRC_ALPHA_UP_4 +184 0x7FB0 //RX_TDDRC_ALPHA_DWN_1 +185 0x7FB0 //RX_TDDRC_ALPHA_DWN_2 +186 0x7FB0 //RX_TDDRC_ALPHA_DWN_3 +189 0x7FB0 //RX_TDDRC_ALPHA_DWN_4 +190 0xDA9E //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +269 0x0000 //RX_TDDRC_THRD_0 +270 0x0000 //RX_TDDRC_THRD_1 +271 0x0E80 //RX_TDDRC_THRD_2 +272 0x3800 //RX_TDDRC_THRD_3 +273 0x2A00 //RX_TDDRC_SLANT_0 +274 0x6E00 //RX_TDDRC_SLANT_1 +275 0x3000 //RX_TDDRC_ALPHA_UP_0 +276 0x7FB0 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x0000 //RX_TDDRC_HMNC_GAIN +279 0x0000 //RX_TDDRC_SMT_FLAG +280 0x0000 //RX_TDDRC_SMT_W +281 0x0100 //RX_TDDRC_DRC_GAIN +195 0x0020 //RX_FDEQ_SUBNUM +196 0x4848 //RX_FDEQ_GAIN_0 +197 0x4848 //RX_FDEQ_GAIN_1 +198 0x4848 //RX_FDEQ_GAIN_2 +199 0x4848 //RX_FDEQ_GAIN_3 +200 0x4848 //RX_FDEQ_GAIN_4 +201 0x4848 //RX_FDEQ_GAIN_5 +202 0x4848 //RX_FDEQ_GAIN_6 +203 0x4848 //RX_FDEQ_GAIN_7 +204 0x4848 //RX_FDEQ_GAIN_8 +205 0x4848 //RX_FDEQ_GAIN_9 +206 0x4848 //RX_FDEQ_GAIN_10 +207 0x4848 //RX_FDEQ_GAIN_11 +208 0x4848 //RX_FDEQ_GAIN_12 +209 0x4848 //RX_FDEQ_GAIN_13 +210 0x4848 //RX_FDEQ_GAIN_14 +211 0x4848 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0000 //RX_FDEQ_BIN_0 +221 0x0000 //RX_FDEQ_BIN_1 +222 0x0000 //RX_FDEQ_BIN_2 +223 0x0000 //RX_FDEQ_BIN_3 +224 0x0000 //RX_FDEQ_BIN_4 +225 0x0000 //RX_FDEQ_BIN_5 +226 0x0000 //RX_FDEQ_BIN_6 +227 0x0000 //RX_FDEQ_BIN_7 +228 0x0000 //RX_FDEQ_BIN_8 +229 0x0000 //RX_FDEQ_BIN_9 +230 0x0000 //RX_FDEQ_BIN_10 +231 0x0000 //RX_FDEQ_BIN_11 +232 0x0000 //RX_FDEQ_BIN_12 +233 0x0000 //RX_FDEQ_BIN_13 +234 0x0000 //RX_FDEQ_BIN_14 +235 0x0000 //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x0000 //RX_FDEQ_RESRV_0 +245 0x0000 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0030 //RX_FDDRC_BAND_MARGIN_1 +248 0x0050 //RX_FDDRC_BAND_MARGIN_2 +249 0x0080 //RX_FDDRC_BAND_MARGIN_3 +250 0x0004 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x5000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x6400 //RX_FDDRC_THRD_3_2 +258 0x6400 //RX_FDDRC_THRD_3_3 +259 0x2000 //RX_FDDRC_SLANT_0_0 +260 0x2000 //RX_FDDRC_SLANT_0_1 +261 0x2000 //RX_FDDRC_SLANT_0_2 +262 0x2000 //RX_FDDRC_SLANT_0_3 +263 0x2000 //RX_FDDRC_SLANT_1_0 +264 0x2000 //RX_FDDRC_SLANT_1_1 +265 0x2000 //RX_FDDRC_SLANT_1_2 +266 0x2000 //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +286 0x0100 //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 +#VOL 3 +163 0x3000 //RX_TDDRC_ALPHA_UP_1 +164 0x3000 //RX_TDDRC_ALPHA_UP_2 +165 0x3000 //RX_TDDRC_ALPHA_UP_3 +166 0x3000 //RX_TDDRC_ALPHA_UP_4 +184 0x7FB0 //RX_TDDRC_ALPHA_DWN_1 +185 0x7FB0 //RX_TDDRC_ALPHA_DWN_2 +186 0x7FB0 //RX_TDDRC_ALPHA_DWN_3 +189 0x7FB0 //RX_TDDRC_ALPHA_DWN_4 +190 0xDA9E //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +269 0x0000 //RX_TDDRC_THRD_0 +270 0x0000 //RX_TDDRC_THRD_1 +271 0x0E80 //RX_TDDRC_THRD_2 +272 0x3800 //RX_TDDRC_THRD_3 +273 0x2A00 //RX_TDDRC_SLANT_0 +274 0x6E00 //RX_TDDRC_SLANT_1 +275 0x3000 //RX_TDDRC_ALPHA_UP_0 +276 0x7FB0 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x0000 //RX_TDDRC_HMNC_GAIN +279 0x0000 //RX_TDDRC_SMT_FLAG +280 0x0000 //RX_TDDRC_SMT_W +281 0x0100 //RX_TDDRC_DRC_GAIN +195 0x0020 //RX_FDEQ_SUBNUM +196 0x4848 //RX_FDEQ_GAIN_0 +197 0x4848 //RX_FDEQ_GAIN_1 +198 0x4848 //RX_FDEQ_GAIN_2 +199 0x4848 //RX_FDEQ_GAIN_3 +200 0x4848 //RX_FDEQ_GAIN_4 +201 0x4848 //RX_FDEQ_GAIN_5 +202 0x4848 //RX_FDEQ_GAIN_6 +203 0x4848 //RX_FDEQ_GAIN_7 +204 0x4848 //RX_FDEQ_GAIN_8 +205 0x4848 //RX_FDEQ_GAIN_9 +206 0x4848 //RX_FDEQ_GAIN_10 +207 0x4848 //RX_FDEQ_GAIN_11 +208 0x4848 //RX_FDEQ_GAIN_12 +209 0x4848 //RX_FDEQ_GAIN_13 +210 0x4848 //RX_FDEQ_GAIN_14 +211 0x4848 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0000 //RX_FDEQ_BIN_0 +221 0x0000 //RX_FDEQ_BIN_1 +222 0x0000 //RX_FDEQ_BIN_2 +223 0x0000 //RX_FDEQ_BIN_3 +224 0x0000 //RX_FDEQ_BIN_4 +225 0x0000 //RX_FDEQ_BIN_5 +226 0x0000 //RX_FDEQ_BIN_6 +227 0x0000 //RX_FDEQ_BIN_7 +228 0x0000 //RX_FDEQ_BIN_8 +229 0x0000 //RX_FDEQ_BIN_9 +230 0x0000 //RX_FDEQ_BIN_10 +231 0x0000 //RX_FDEQ_BIN_11 +232 0x0000 //RX_FDEQ_BIN_12 +233 0x0000 //RX_FDEQ_BIN_13 +234 0x0000 //RX_FDEQ_BIN_14 +235 0x0000 //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x0000 //RX_FDEQ_RESRV_0 +245 0x0000 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0030 //RX_FDDRC_BAND_MARGIN_1 +248 0x0050 //RX_FDDRC_BAND_MARGIN_2 +249 0x0080 //RX_FDDRC_BAND_MARGIN_3 +250 0x0004 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x5000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x6400 //RX_FDDRC_THRD_3_2 +258 0x6400 //RX_FDDRC_THRD_3_3 +259 0x2000 //RX_FDDRC_SLANT_0_0 +260 0x2000 //RX_FDDRC_SLANT_0_1 +261 0x2000 //RX_FDDRC_SLANT_0_2 +262 0x2000 //RX_FDDRC_SLANT_0_3 +263 0x2000 //RX_FDDRC_SLANT_1_0 +264 0x2000 //RX_FDDRC_SLANT_1_1 +265 0x2000 //RX_FDDRC_SLANT_1_2 +266 0x2000 //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +286 0x0100 //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 +#VOL 4 +163 0x3000 //RX_TDDRC_ALPHA_UP_1 +164 0x3000 //RX_TDDRC_ALPHA_UP_2 +165 0x3000 //RX_TDDRC_ALPHA_UP_3 +166 0x3000 //RX_TDDRC_ALPHA_UP_4 +184 0x7FB0 //RX_TDDRC_ALPHA_DWN_1 +185 0x7FB0 //RX_TDDRC_ALPHA_DWN_2 +186 0x7FB0 //RX_TDDRC_ALPHA_DWN_3 +189 0x7FB0 //RX_TDDRC_ALPHA_DWN_4 +190 0xDA9E //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +269 0x0000 //RX_TDDRC_THRD_0 +270 0x0000 //RX_TDDRC_THRD_1 +271 0x0E80 //RX_TDDRC_THRD_2 +272 0x3800 //RX_TDDRC_THRD_3 +273 0x2A00 //RX_TDDRC_SLANT_0 +274 0x6E00 //RX_TDDRC_SLANT_1 +275 0x3000 //RX_TDDRC_ALPHA_UP_0 +276 0x7FB0 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x0000 //RX_TDDRC_HMNC_GAIN +279 0x0000 //RX_TDDRC_SMT_FLAG +280 0x0000 //RX_TDDRC_SMT_W +281 0x0100 //RX_TDDRC_DRC_GAIN +195 0x0020 //RX_FDEQ_SUBNUM +196 0x4848 //RX_FDEQ_GAIN_0 +197 0x4848 //RX_FDEQ_GAIN_1 +198 0x4848 //RX_FDEQ_GAIN_2 +199 0x4848 //RX_FDEQ_GAIN_3 +200 0x4848 //RX_FDEQ_GAIN_4 +201 0x4848 //RX_FDEQ_GAIN_5 +202 0x4848 //RX_FDEQ_GAIN_6 +203 0x4848 //RX_FDEQ_GAIN_7 +204 0x4848 //RX_FDEQ_GAIN_8 +205 0x4848 //RX_FDEQ_GAIN_9 +206 0x4848 //RX_FDEQ_GAIN_10 +207 0x4848 //RX_FDEQ_GAIN_11 +208 0x4848 //RX_FDEQ_GAIN_12 +209 0x4848 //RX_FDEQ_GAIN_13 +210 0x4848 //RX_FDEQ_GAIN_14 +211 0x4848 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0000 //RX_FDEQ_BIN_0 +221 0x0000 //RX_FDEQ_BIN_1 +222 0x0000 //RX_FDEQ_BIN_2 +223 0x0000 //RX_FDEQ_BIN_3 +224 0x0000 //RX_FDEQ_BIN_4 +225 0x0000 //RX_FDEQ_BIN_5 +226 0x0000 //RX_FDEQ_BIN_6 +227 0x0000 //RX_FDEQ_BIN_7 +228 0x0000 //RX_FDEQ_BIN_8 +229 0x0000 //RX_FDEQ_BIN_9 +230 0x0000 //RX_FDEQ_BIN_10 +231 0x0000 //RX_FDEQ_BIN_11 +232 0x0000 //RX_FDEQ_BIN_12 +233 0x0000 //RX_FDEQ_BIN_13 +234 0x0000 //RX_FDEQ_BIN_14 +235 0x0000 //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x0000 //RX_FDEQ_RESRV_0 +245 0x0000 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0030 //RX_FDDRC_BAND_MARGIN_1 +248 0x0050 //RX_FDDRC_BAND_MARGIN_2 +249 0x0080 //RX_FDDRC_BAND_MARGIN_3 +250 0x0004 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x5000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x6400 //RX_FDDRC_THRD_3_2 +258 0x6400 //RX_FDDRC_THRD_3_3 +259 0x2000 //RX_FDDRC_SLANT_0_0 +260 0x2000 //RX_FDDRC_SLANT_0_1 +261 0x2000 //RX_FDDRC_SLANT_0_2 +262 0x2000 //RX_FDDRC_SLANT_0_3 +263 0x2000 //RX_FDDRC_SLANT_1_0 +264 0x2000 //RX_FDDRC_SLANT_1_1 +265 0x2000 //RX_FDDRC_SLANT_1_2 +266 0x2000 //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +286 0x0100 //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 +#VOL 5 +163 0x3000 //RX_TDDRC_ALPHA_UP_1 +164 0x3000 //RX_TDDRC_ALPHA_UP_2 +165 0x3000 //RX_TDDRC_ALPHA_UP_3 +166 0x3000 //RX_TDDRC_ALPHA_UP_4 +184 0x7FB0 //RX_TDDRC_ALPHA_DWN_1 +185 0x7FB0 //RX_TDDRC_ALPHA_DWN_2 +186 0x7FB0 //RX_TDDRC_ALPHA_DWN_3 +189 0x7FB0 //RX_TDDRC_ALPHA_DWN_4 +190 0xDA9E //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +269 0x0000 //RX_TDDRC_THRD_0 +270 0x0000 //RX_TDDRC_THRD_1 +271 0x0E80 //RX_TDDRC_THRD_2 +272 0x3800 //RX_TDDRC_THRD_3 +273 0x2A00 //RX_TDDRC_SLANT_0 +274 0x6E00 //RX_TDDRC_SLANT_1 +275 0x3000 //RX_TDDRC_ALPHA_UP_0 +276 0x7FB0 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x0000 //RX_TDDRC_HMNC_GAIN +279 0x0000 //RX_TDDRC_SMT_FLAG +280 0x0000 //RX_TDDRC_SMT_W +281 0x0100 //RX_TDDRC_DRC_GAIN +195 0x0020 //RX_FDEQ_SUBNUM +196 0x4848 //RX_FDEQ_GAIN_0 +197 0x4848 //RX_FDEQ_GAIN_1 +198 0x4848 //RX_FDEQ_GAIN_2 +199 0x4848 //RX_FDEQ_GAIN_3 +200 0x4848 //RX_FDEQ_GAIN_4 +201 0x4848 //RX_FDEQ_GAIN_5 +202 0x4848 //RX_FDEQ_GAIN_6 +203 0x4848 //RX_FDEQ_GAIN_7 +204 0x4848 //RX_FDEQ_GAIN_8 +205 0x4848 //RX_FDEQ_GAIN_9 +206 0x4848 //RX_FDEQ_GAIN_10 +207 0x4848 //RX_FDEQ_GAIN_11 +208 0x4848 //RX_FDEQ_GAIN_12 +209 0x4848 //RX_FDEQ_GAIN_13 +210 0x4848 //RX_FDEQ_GAIN_14 +211 0x4848 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0000 //RX_FDEQ_BIN_0 +221 0x0000 //RX_FDEQ_BIN_1 +222 0x0000 //RX_FDEQ_BIN_2 +223 0x0000 //RX_FDEQ_BIN_3 +224 0x0000 //RX_FDEQ_BIN_4 +225 0x0000 //RX_FDEQ_BIN_5 +226 0x0000 //RX_FDEQ_BIN_6 +227 0x0000 //RX_FDEQ_BIN_7 +228 0x0000 //RX_FDEQ_BIN_8 +229 0x0000 //RX_FDEQ_BIN_9 +230 0x0000 //RX_FDEQ_BIN_10 +231 0x0000 //RX_FDEQ_BIN_11 +232 0x0000 //RX_FDEQ_BIN_12 +233 0x0000 //RX_FDEQ_BIN_13 +234 0x0000 //RX_FDEQ_BIN_14 +235 0x0000 //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x0000 //RX_FDEQ_RESRV_0 +245 0x0000 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0030 //RX_FDDRC_BAND_MARGIN_1 +248 0x0050 //RX_FDDRC_BAND_MARGIN_2 +249 0x0080 //RX_FDDRC_BAND_MARGIN_3 +250 0x0004 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x5000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x6400 //RX_FDDRC_THRD_3_2 +258 0x6400 //RX_FDDRC_THRD_3_3 +259 0x2000 //RX_FDDRC_SLANT_0_0 +260 0x2000 //RX_FDDRC_SLANT_0_1 +261 0x2000 //RX_FDDRC_SLANT_0_2 +262 0x2000 //RX_FDDRC_SLANT_0_3 +263 0x2000 //RX_FDDRC_SLANT_1_0 +264 0x2000 //RX_FDDRC_SLANT_1_1 +265 0x2000 //RX_FDDRC_SLANT_1_2 +266 0x2000 //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +286 0x0100 //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 +#VOL 6 +163 0x3000 //RX_TDDRC_ALPHA_UP_1 +164 0x3000 //RX_TDDRC_ALPHA_UP_2 +165 0x3000 //RX_TDDRC_ALPHA_UP_3 +166 0x3000 //RX_TDDRC_ALPHA_UP_4 +184 0x7FB0 //RX_TDDRC_ALPHA_DWN_1 +185 0x7FB0 //RX_TDDRC_ALPHA_DWN_2 +186 0x7FB0 //RX_TDDRC_ALPHA_DWN_3 +189 0x7FB0 //RX_TDDRC_ALPHA_DWN_4 +190 0xDA9E //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +269 0x0000 //RX_TDDRC_THRD_0 +270 0x0000 //RX_TDDRC_THRD_1 +271 0x0E80 //RX_TDDRC_THRD_2 +272 0x3800 //RX_TDDRC_THRD_3 +273 0x2A00 //RX_TDDRC_SLANT_0 +274 0x6E00 //RX_TDDRC_SLANT_1 +275 0x3000 //RX_TDDRC_ALPHA_UP_0 +276 0x7FB0 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x0000 //RX_TDDRC_HMNC_GAIN +279 0x0000 //RX_TDDRC_SMT_FLAG +280 0x0000 //RX_TDDRC_SMT_W +281 0x0100 //RX_TDDRC_DRC_GAIN +195 0x0020 //RX_FDEQ_SUBNUM +196 0x4848 //RX_FDEQ_GAIN_0 +197 0x4848 //RX_FDEQ_GAIN_1 +198 0x4848 //RX_FDEQ_GAIN_2 +199 0x4848 //RX_FDEQ_GAIN_3 +200 0x4848 //RX_FDEQ_GAIN_4 +201 0x4848 //RX_FDEQ_GAIN_5 +202 0x4848 //RX_FDEQ_GAIN_6 +203 0x4848 //RX_FDEQ_GAIN_7 +204 0x4848 //RX_FDEQ_GAIN_8 +205 0x4848 //RX_FDEQ_GAIN_9 +206 0x4848 //RX_FDEQ_GAIN_10 +207 0x4848 //RX_FDEQ_GAIN_11 +208 0x4848 //RX_FDEQ_GAIN_12 +209 0x4848 //RX_FDEQ_GAIN_13 +210 0x4848 //RX_FDEQ_GAIN_14 +211 0x4848 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0000 //RX_FDEQ_BIN_0 +221 0x0000 //RX_FDEQ_BIN_1 +222 0x0000 //RX_FDEQ_BIN_2 +223 0x0000 //RX_FDEQ_BIN_3 +224 0x0000 //RX_FDEQ_BIN_4 +225 0x0000 //RX_FDEQ_BIN_5 +226 0x0000 //RX_FDEQ_BIN_6 +227 0x0000 //RX_FDEQ_BIN_7 +228 0x0000 //RX_FDEQ_BIN_8 +229 0x0000 //RX_FDEQ_BIN_9 +230 0x0000 //RX_FDEQ_BIN_10 +231 0x0000 //RX_FDEQ_BIN_11 +232 0x0000 //RX_FDEQ_BIN_12 +233 0x0000 //RX_FDEQ_BIN_13 +234 0x0000 //RX_FDEQ_BIN_14 +235 0x0000 //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x0000 //RX_FDEQ_RESRV_0 +245 0x0000 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0030 //RX_FDDRC_BAND_MARGIN_1 +248 0x0050 //RX_FDDRC_BAND_MARGIN_2 +249 0x0080 //RX_FDDRC_BAND_MARGIN_3 +250 0x0004 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x5000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x6400 //RX_FDDRC_THRD_3_2 +258 0x6400 //RX_FDDRC_THRD_3_3 +259 0x2000 //RX_FDDRC_SLANT_0_0 +260 0x2000 //RX_FDDRC_SLANT_0_1 +261 0x2000 //RX_FDDRC_SLANT_0_2 +262 0x2000 //RX_FDDRC_SLANT_0_3 +263 0x2000 //RX_FDDRC_SLANT_1_0 +264 0x2000 //RX_FDDRC_SLANT_1_1 +265 0x2000 //RX_FDDRC_SLANT_1_2 +266 0x2000 //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +286 0x0100 //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 #CASE_NAME HEADSET-TTY_FULL-VOICE_GENERIC-SWB -#PARAM_MODE FULL -#PARAM_TYPE TX+RX -#TOTAL_CUSTOM_STEP 7 +#PARAM_MODE Full +#PARAM_TYPE TX+2RX +#TOTAL_CUSTOM_STEP 7+7 #TX 0 0x0001 //TX_OPERATION_MODE_0 1 0x0000 //TX_OPERATION_MODE_1 @@ -52870,7 +80350,7 @@ 239 0x0000 //TX_DT_RESRV_7 240 0x0000 //TX_DT_RESRV_8 241 0x0000 //TX_DT_RESRV_9 -242 0xF200 //TX_THR_SN_EST_0 +242 0xFA00 //TX_THR_SN_EST_0 243 0xF400 //TX_THR_SN_EST_1 244 0xF800 //TX_THR_SN_EST_2 245 0xF600 //TX_THR_SN_EST_3 @@ -52879,12 +80359,12 @@ 248 0xF800 //TX_THR_SN_EST_6 249 0xF800 //TX_THR_SN_EST_7 250 0x0100 //TX_DELTA_THR_SN_EST_0 -251 0x0000 //TX_DELTA_THR_SN_EST_1 +251 0x0100 //TX_DELTA_THR_SN_EST_1 252 0x0100 //TX_DELTA_THR_SN_EST_2 -253 0x0100 //TX_DELTA_THR_SN_EST_3 +253 0x0200 //TX_DELTA_THR_SN_EST_3 254 0x0200 //TX_DELTA_THR_SN_EST_4 255 0x0200 //TX_DELTA_THR_SN_EST_5 -256 0x0200 //TX_DELTA_THR_SN_EST_6 +256 0x0000 //TX_DELTA_THR_SN_EST_6 257 0x0200 //TX_DELTA_THR_SN_EST_7 258 0x4000 //TX_LAMBDA_NN_EST_0 259 0x4000 //TX_LAMBDA_NN_EST_1 @@ -52910,12 +80390,12 @@ 279 0x0000 //TX_B_POST_FLT_0 280 0x0000 //TX_B_POST_FLT_1 281 0x001A //TX_NS_LVL_CTRL_0 -282 0x001A //TX_NS_LVL_CTRL_1 +282 0x0014 //TX_NS_LVL_CTRL_1 283 0x0014 //TX_NS_LVL_CTRL_2 -284 0x0014 //TX_NS_LVL_CTRL_3 +284 0x000C //TX_NS_LVL_CTRL_3 285 0x000C //TX_NS_LVL_CTRL_4 286 0x000C //TX_NS_LVL_CTRL_5 -287 0x000C //TX_NS_LVL_CTRL_6 +287 0x001A //TX_NS_LVL_CTRL_6 288 0x000C //TX_NS_LVL_CTRL_7 289 0x000E //TX_MIN_GAIN_S_0 290 0x0014 //TX_MIN_GAIN_S_1 @@ -52931,10 +80411,10 @@ 300 0x7FFF //TX_SNRI_SUP_0 301 0x7FFF //TX_SNRI_SUP_1 302 0x7FFF //TX_SNRI_SUP_2 -303 0x7FFF //TX_SNRI_SUP_3 +303 0x4000 //TX_SNRI_SUP_3 304 0x4000 //TX_SNRI_SUP_4 305 0x4000 //TX_SNRI_SUP_5 -306 0x4000 //TX_SNRI_SUP_6 +306 0x7FFF //TX_SNRI_SUP_6 307 0x4000 //TX_SNRI_SUP_7 308 0x1200 //TX_THR_LFNS 309 0x0147 //TX_G_LFNS @@ -52943,12 +80423,12 @@ 312 0x7FFF //TX_A_POST_FILT_0 313 0x7FFF //TX_A_POST_FILT_1 314 0x4000 //TX_A_POST_FILT_S_0 -315 0x199A //TX_A_POST_FILT_S_1 +315 0x1000 //TX_A_POST_FILT_S_1 316 0x1000 //TX_A_POST_FILT_S_2 -317 0x1000 //TX_A_POST_FILT_S_3 +317 0x6666 //TX_A_POST_FILT_S_3 318 0x6666 //TX_A_POST_FILT_S_4 319 0x6666 //TX_A_POST_FILT_S_5 -320 0x6666 //TX_A_POST_FILT_S_6 +320 0x199A //TX_A_POST_FILT_S_6 321 0x6666 //TX_A_POST_FILT_S_7 322 0x2000 //TX_B_POST_FILT_0 323 0x2000 //TX_B_POST_FILT_1 @@ -52995,7 +80475,7 @@ 364 0x0000 //TX_K_APT 365 0x0001 //TX_NOISEDET 366 0x05A0 //TX_NDETCT -367 0x000A //TX_NOISE_TH_0 +367 0x0383 //TX_NOISE_TH_0 368 0x1388 //TX_NOISE_TH_0_2 369 0x3A98 //TX_NOISE_TH_0_3 370 0x0C80 //TX_NOISE_TH_1 @@ -53007,11 +80487,11 @@ 376 0x7FFF //TX_NOISE_TH_5_3 377 0x7FFF //TX_NOISE_TH_5_4 378 0x00C8 //TX_NOISE_TH_6 -379 0x000A //TX_MINENOISE_TH -380 0x0000 //TX_MINENOISE_MIC0_TH_MTS -381 0x0000 //TX_MINENOISE_MIC0_TH_EXP -382 0x0000 //TX_MINENOISE_MIC0_S_TH_MTS -383 0x0000 //TX_MINENOISE_MIC0_S_TH_EXP +379 0x044C //TX_MINENOISE_TH +380 0xD508 //TX_MORENS_TFMASK_TH +381 0x0001 //TX_DRC_QUIET_FLOOR +382 0x3A98 //TX_RATIODTL_CUT_TH +383 0x0DAC //TX_DT_CUT_K1 384 0x6400 //TX_OUT_ENER_S_TH_CLEAN 385 0x6400 //TX_OUT_ENER_S_TH_LESSCLEAN 386 0x6400 //TX_OUT_ENER_S_TH_NOISY @@ -53019,22 +80499,22 @@ 388 0x7D00 //TX_OUT_ENER_TH_SPEECH 389 0x0000 //TX_SN_NPB_GAIN 390 0x0000 //TX_NN_NPB_GAIN -391 0x0000 //TX_CSX_ALPHA_0 -392 0x0000 //TX_CSX_ALPHA_1 -393 0x0000 //TX_CSX_ALPHA_2 -394 0x0000 //TX_CSX_ALPHA_3 -395 0x0000 //TX_MU_ARSP_EST -396 0x0000 //TX_P_OUTBEAM_MIN_TH +391 0x7FFF //TX_POST_MASK_SUP_HSNE +392 0x1388 //TX_TAIL_DET_TH +393 0x4000 //TX_B_LESSCUT_RTO_WTA +394 0x0000 //TX_MEL_G_R +395 0x0080 //TX_SUPHIGH_TH +396 0x0000 //TX_MASK_G_R 397 0x0000 //TX_EXTRA_NS_L -398 0x0000 //TX_EXTRA_NS_A -399 0x0000 //TX_VR_NOISE_FLOOR_TH +398 0x1800 //TX_C_POST_FLT_MASK +399 0x7FFF //TX_A_POST_FLT_WNS 400 0x0000 //TX_MIN_G_LOW300HZ 401 0x0010 //TX_MAXLEVEL_CNG 402 0x0000 //TX_STN_NOISE_TH 403 0x0000 //TX_POST_MASK_SUP 404 0x0000 //TX_POST_MASK_ADJUST 405 0x0014 //TX_NS_ENOISE_MIC0_TH -406 0x0014 //TX_MINENOISE_MIC0_TH +406 0x02F3 //TX_MINENOISE_MIC0_TH 407 0x0226 //TX_MINENOISE_MIC0_S_TH 408 0x2879 //TX_MIN_G_CTRL_SSNS 409 0x0400 //TX_METAL_RTO_THR @@ -53142,16 +80622,16 @@ 511 0x6666 //TX_MIC_TO_BFGAIN 512 0x6666 //TX_MICTOBFGAIN0 513 0x0014 //TX_FASTMUE_TH -514 0x0000 //TX_DERVB_LEN_0 -515 0x0000 //TX_DERVB_LEN_1 -516 0x0000 //TX_RHO_DERVB -517 0x0000 //TX_MIC_INDX_DERVB -518 0x0000 //TX_MU_DERVB -519 0x0000 //TX_DR_RESRV_0 -520 0x0000 //TX_DR_RESRV_1 -521 0x0000 //TX_DR_RESRV_2 -522 0x0000 //TX_DR_RESRV_3 -523 0x0000 //TX_DR_RESRV_4 +514 0xC000 //TX_DEREVERB_LF_MU +515 0xC000 //TX_DEREVERB_HF_MU +516 0xCCCC //TX_DEREVERB_DELAY +517 0xD999 //TX_DEREVERB_COEF_LEN +518 0x1F40 //TX_DEREVERB_DNR +519 0x0000 //TX_DEREVERB_ALPHA +520 0x0000 //TX_DEREVERB_BETA +521 0x0000 //TX_GSC_RTOL_TH +522 0x7000 //TX_GSC_RTOH_TH +523 0x0064 //TX_WIDE2_MEANHTH 524 0x0000 //TX_DR_RESRV_5 525 0x0000 //TX_DR_RESRV_6 526 0x0000 //TX_DR_RESRV_7 @@ -53517,16 +80997,81 @@ 886 0x0000 //TX_FASTNS_TFMASKBIN_TH2 887 0x0000 //TX_FASTNS_TFMASKBIN_TH3 888 0x00C8 //TX_FASTNS_ARSPC_TH -889 0xD99A //TX_FASTNS_MASK5_TH +889 0x8000 //TX_FASTNS_MASK5_TH 890 0x051F //TX_POSTSSA_MIN_G_VR_MASK -891 0x7FFF //TX_A_LESSCUT_RTO_MASK +891 0x4000 //TX_A_LESSCUT_RTO_MASK 892 0x1770 //TX_FASTNS_NOISETH 893 0xC000 //TX_FASTNS_SSA_THLFL 894 0xC000 //TX_FASTNS_SSA_THHFL 895 0xCCCC //TX_FASTNS_SSA_THLFH 896 0xD999 //TX_FASTNS_SSA_THHFH +897 0x2339 //TX_SENDFUNC_REG_MICMUTE +898 0x0021 //TX_SENDFUNC_REG_MICMUTE1 +899 0x02BC //TX_MICMUTE_RATIO_THR +900 0x0140 //TX_MICMUTE_AMP_THR +901 0x0004 //TX_MICMUTE_HPF_IND +902 0x00C0 //TX_MICMUTE_LOG_EYR_TH +903 0x0008 //TX_MICMUTE_CVG_TIME +904 0x0008 //TX_MICMUTE_RELEASE_TIME +905 0x01FE //TX_MIC_VOLUME_MIC0MUTE +906 0x0020 //TX_MICMUTE_EPD_OFFSET_0 +907 0x001E //TX_MICMUTE_FRQ_AEC_L +908 0x7999 //TX_MICMUTE_EAD_THR +909 0x7FFF //TX_MICMUTE_LAMBDA_CB_NLE +910 0x7FFF //TX_MICMUTE_LAMBDA_RE_EST +911 0x4000 //TX_DTD_THR1_MICMUTE_0 +912 0x7000 //TX_DTD_THR1_MICMUTE_1 +913 0x7FFF //TX_DTD_THR1_MICMUTE_2 +914 0x7FFF //TX_DTD_THR1_MICMUTE_3 +915 0x6CCC //TX_DTD_THR2_MICMUTE_0 +916 0x0400 //TX_MICMUTE_MIN_EQ_RE_EST_0 +917 0x0400 //TX_MICMUTE_MIN_EQ_RE_EST_1 +918 0x1000 //TX_MICMUTE_MIN_EQ_RE_EST_2 +919 0x7FFF //TX_MICMUTE_MIN_EQ_RE_EST_3 +920 0x7FFF //TX_MICMUTE_MIN_EQ_RE_EST_4 +921 0x4000 //TX_MICMUTE_C_POST_FLT +922 0x03E8 //TX_MICMUTE_DT_CUT_K +923 0x0001 //TX_MICMUTE_DT_CUT_THR +924 0x03E8 //TX_MICMUTE_DT_CUT_K2 +925 0x0001 //TX_MICMUTE_DT_CUT_THR2 +926 0x0064 //TX_MICMUTE_DT2_HOLD_N +927 0x1000 //TX_MICMUTE_RATIODTH_THCUT +928 0x1000 //TX_MICMUTE_B_POST_FLT_ECHOL +929 0x7FFF //TX_MICMUTE_B_POST_FLT_ECHOH +930 0x0400 //TX_MICMUTE_C_POST_FLT_MASK +931 0x7999 //TX_MICMUTE_RATIODTL_CUT_TH +932 0x0258 //TX_MICMUTE_DT_CUT_K1 +933 0x0800 //TX_MICMUTE_N2_SN_EST +934 0xFC00 //TX_MICMUTE_THR_SN_EST_0 +935 0x001C //TX_MICMUTE_MIN_G_CTRL_0 +936 0x6000 //TX_MICMUTE_A_POST_FILT_S_0 +937 0x7000 //TX_MICMUTE_B_POST_FILT_0 +938 0x2710 //TX_MIC1RUB_AMP_THR +939 0x0010 //TX_MIC1MUTE_RATIO_THR +940 0x0450 //TX_MIC1MUTE_AMP_THR +941 0x0008 //TX_MIC1MUTE_CVG_TIME +942 0x0008 //TX_MIC1MUTE_RELEASE_TIME +943 0x0000 //TX_AMS_RESRV_01 +944 0x0000 //TX_AMS_RESRV_02 +945 0x0000 //TX_AMS_RESRV_03 +946 0x0000 //TX_AMS_RESRV_04 +947 0x0000 //TX_AMS_RESRV_05 +948 0x0000 //TX_AMS_RESRV_06 +949 0x0000 //TX_AMS_RESRV_07 +950 0x0000 //TX_AMS_RESRV_08 +951 0x0000 //TX_AMS_RESRV_09 +952 0x0000 //TX_AMS_RESRV_10 +953 0x0000 //TX_AMS_RESRV_11 +954 0x0000 //TX_AMS_RESRV_12 +955 0x0000 //TX_AMS_RESRV_13 +956 0x0000 //TX_AMS_RESRV_14 +957 0x0000 //TX_AMS_RESRV_15 +958 0x0000 //TX_AMS_RESRV_16 +959 0x0000 //TX_AMS_RESRV_17 +960 0x0000 //TX_AMS_RESRV_18 +961 0x0000 //TX_AMS_RESRV_19 #RX -0 0x0040 //RX_RECVFUNC_MODE_0 +0 0x2040 //RX_RECVFUNC_MODE_0 1 0x0000 //RX_RECVFUNC_MODE_1 2 0x0000 //RX_SAMPLINGFREQ_SIG 3 0x0000 //RX_SAMPLINGFREQ_PROC @@ -54376,11 +81921,862 @@ 110 0x0000 //RX_FDDRC_RESRV_0 129 0x0100 //RX_SPK_VOL 130 0x0000 //RX_VOL_RESRV_0 +#RX 2 +157 0x2040 //RX_RECVFUNC_MODE_0 +158 0x0000 //RX_RECVFUNC_MODE_1 +159 0x0000 //RX_SAMPLINGFREQ_SIG +160 0x0000 //RX_SAMPLINGFREQ_PROC +161 0x000A //RX_FRAME_SZ +162 0x0000 //RX_DELAY_OPT +163 0x3000 //RX_TDDRC_ALPHA_UP_1 +164 0x3000 //RX_TDDRC_ALPHA_UP_2 +165 0x3000 //RX_TDDRC_ALPHA_UP_3 +166 0x3000 //RX_TDDRC_ALPHA_UP_4 +167 0x050D //RX_PGA +168 0x7652 //RX_A_HP +169 0x4000 //RX_B_PE +170 0x7800 //RX_THR_PITCH_DET_0 +171 0x7000 //RX_THR_PITCH_DET_1 +172 0x6000 //RX_THR_PITCH_DET_2 +173 0x0000 //RX_PITCH_BFR_LEN +174 0x0000 //RX_SBD_PITCH_DET +175 0x0000 //RX_PP_RESRV_0 +176 0x0000 //RX_PP_RESRV_1 +177 0xF800 //RX_N_SN_EST +178 0x0000 //RX_N2_SN_EST +179 0x000F //RX_NS_LVL_CTRL +180 0xF800 //RX_THR_SN_EST +181 0x7E00 //RX_LAMBDA_PFILT +182 0x000A //RX_FENS_RESRV_0 +183 0x0000 //RX_FENS_RESRV_1 +184 0x7FB0 //RX_TDDRC_ALPHA_DWN_1 +185 0x7FB0 //RX_TDDRC_ALPHA_DWN_2 +186 0x7FB0 //RX_TDDRC_ALPHA_DWN_3 +187 0x0000 //RX_EXTRA_NS_L +188 0x0000 //RX_EXTRA_NS_A +189 0x7FB0 //RX_TDDRC_ALPHA_DWN_4 +190 0xDA9E //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +192 0x0000 //RX_A_POST_FLT +193 0x0000 //RX_LMT_THRD +194 0x4000 //RX_LMT_ALPHA +195 0x0020 //RX_FDEQ_SUBNUM +196 0x4848 //RX_FDEQ_GAIN_0 +197 0x4848 //RX_FDEQ_GAIN_1 +198 0x4848 //RX_FDEQ_GAIN_2 +199 0x4848 //RX_FDEQ_GAIN_3 +200 0x4848 //RX_FDEQ_GAIN_4 +201 0x4848 //RX_FDEQ_GAIN_5 +202 0x4848 //RX_FDEQ_GAIN_6 +203 0x4848 //RX_FDEQ_GAIN_7 +204 0x4848 //RX_FDEQ_GAIN_8 +205 0x4848 //RX_FDEQ_GAIN_9 +206 0x4848 //RX_FDEQ_GAIN_10 +207 0x4848 //RX_FDEQ_GAIN_11 +208 0x4848 //RX_FDEQ_GAIN_12 +209 0x4848 //RX_FDEQ_GAIN_13 +210 0x4848 //RX_FDEQ_GAIN_14 +211 0x4848 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0000 //RX_FDEQ_BIN_0 +221 0x0000 //RX_FDEQ_BIN_1 +222 0x0000 //RX_FDEQ_BIN_2 +223 0x0000 //RX_FDEQ_BIN_3 +224 0x0000 //RX_FDEQ_BIN_4 +225 0x0000 //RX_FDEQ_BIN_5 +226 0x0000 //RX_FDEQ_BIN_6 +227 0x0000 //RX_FDEQ_BIN_7 +228 0x0000 //RX_FDEQ_BIN_8 +229 0x0000 //RX_FDEQ_BIN_9 +230 0x0000 //RX_FDEQ_BIN_10 +231 0x0000 //RX_FDEQ_BIN_11 +232 0x0000 //RX_FDEQ_BIN_12 +233 0x0000 //RX_FDEQ_BIN_13 +234 0x0000 //RX_FDEQ_BIN_14 +235 0x0000 //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x0000 //RX_FDEQ_RESRV_0 +245 0x0000 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0030 //RX_FDDRC_BAND_MARGIN_1 +248 0x0050 //RX_FDDRC_BAND_MARGIN_2 +249 0x0080 //RX_FDDRC_BAND_MARGIN_3 +250 0x0004 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x5000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x6400 //RX_FDDRC_THRD_3_2 +258 0x6400 //RX_FDDRC_THRD_3_3 +259 0x2000 //RX_FDDRC_SLANT_0_0 +260 0x2000 //RX_FDDRC_SLANT_0_1 +261 0x2000 //RX_FDDRC_SLANT_0_2 +262 0x2000 //RX_FDDRC_SLANT_0_3 +263 0x2000 //RX_FDDRC_SLANT_1_0 +264 0x2000 //RX_FDDRC_SLANT_1_1 +265 0x2000 //RX_FDDRC_SLANT_1_2 +266 0x2000 //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +268 0x0003 //RX_FILTINDX +269 0x0000 //RX_TDDRC_THRD_0 +270 0x0000 //RX_TDDRC_THRD_1 +271 0x0E80 //RX_TDDRC_THRD_2 +272 0x3800 //RX_TDDRC_THRD_3 +273 0x2A00 //RX_TDDRC_SLANT_0 +274 0x6E00 //RX_TDDRC_SLANT_1 +275 0x3000 //RX_TDDRC_ALPHA_UP_0 +276 0x7FB0 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x0000 //RX_TDDRC_HMNC_GAIN +279 0x0000 //RX_TDDRC_SMT_FLAG +280 0x0000 //RX_TDDRC_SMT_W +281 0x0100 //RX_TDDRC_DRC_GAIN +282 0x7C00 //RX_LAMBDA_PKA_FP +283 0x2000 //RX_TPKA_FP +284 0x0080 //RX_MIN_G_FP +285 0x2000 //RX_MAX_G_FP +286 0x0100 //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 +288 0x0010 //RX_MAXLEVEL_CNG +289 0x0000 //RX_BWE_UV_TH +290 0x0000 //RX_BWE_UV_TH2 +291 0x0000 //RX_BWE_UV_TH3 +292 0x0000 //RX_BWE_V_TH +293 0x0000 //RX_BWE_GAIN1_V_TH1 +294 0x0000 //RX_BWE_GAIN1_V_TH2 +295 0x0000 //RX_BWE_UV_EQ +296 0x0000 //RX_BWE_V_EQ +297 0x0000 //RX_BWE_TONE_TH +298 0x0000 //RX_BWE_UV_HOLD_T +299 0x0000 //RX_BWE_GAIN2_ALPHA +300 0x0000 //RX_BWE_GAIN3_ALPHA +301 0x0000 //RX_BWE_CUTOFF +302 0x0000 //RX_BWE_GAINFILL +303 0x0000 //RX_BWE_MAXTH_TONE +304 0x0000 //RX_BWE_EQ_0 +305 0x0000 //RX_BWE_EQ_1 +306 0x0000 //RX_BWE_EQ_2 +307 0x0000 //RX_BWE_EQ_3 +308 0x0000 //RX_BWE_EQ_4 +309 0x0000 //RX_BWE_EQ_5 +310 0x0000 //RX_BWE_EQ_6 +311 0x0000 //RX_BWE_RESRV_0 +312 0x0000 //RX_BWE_RESRV_1 +313 0x0000 //RX_BWE_RESRV_2 +#VOL 0 +163 0x3000 //RX_TDDRC_ALPHA_UP_1 +164 0x3000 //RX_TDDRC_ALPHA_UP_2 +165 0x3000 //RX_TDDRC_ALPHA_UP_3 +166 0x3000 //RX_TDDRC_ALPHA_UP_4 +184 0x7FB0 //RX_TDDRC_ALPHA_DWN_1 +185 0x7FB0 //RX_TDDRC_ALPHA_DWN_2 +186 0x7FB0 //RX_TDDRC_ALPHA_DWN_3 +189 0x7FB0 //RX_TDDRC_ALPHA_DWN_4 +190 0xDA9E //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +269 0x0000 //RX_TDDRC_THRD_0 +270 0x0000 //RX_TDDRC_THRD_1 +271 0x0E80 //RX_TDDRC_THRD_2 +272 0x3800 //RX_TDDRC_THRD_3 +273 0x2A00 //RX_TDDRC_SLANT_0 +274 0x6E00 //RX_TDDRC_SLANT_1 +275 0x3000 //RX_TDDRC_ALPHA_UP_0 +276 0x7FB0 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x0000 //RX_TDDRC_HMNC_GAIN +279 0x0000 //RX_TDDRC_SMT_FLAG +280 0x0000 //RX_TDDRC_SMT_W +281 0x0100 //RX_TDDRC_DRC_GAIN +195 0x0020 //RX_FDEQ_SUBNUM +196 0x4848 //RX_FDEQ_GAIN_0 +197 0x4848 //RX_FDEQ_GAIN_1 +198 0x4848 //RX_FDEQ_GAIN_2 +199 0x4848 //RX_FDEQ_GAIN_3 +200 0x4848 //RX_FDEQ_GAIN_4 +201 0x4848 //RX_FDEQ_GAIN_5 +202 0x4848 //RX_FDEQ_GAIN_6 +203 0x4848 //RX_FDEQ_GAIN_7 +204 0x4848 //RX_FDEQ_GAIN_8 +205 0x4848 //RX_FDEQ_GAIN_9 +206 0x4848 //RX_FDEQ_GAIN_10 +207 0x4848 //RX_FDEQ_GAIN_11 +208 0x4848 //RX_FDEQ_GAIN_12 +209 0x4848 //RX_FDEQ_GAIN_13 +210 0x4848 //RX_FDEQ_GAIN_14 +211 0x4848 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0000 //RX_FDEQ_BIN_0 +221 0x0000 //RX_FDEQ_BIN_1 +222 0x0000 //RX_FDEQ_BIN_2 +223 0x0000 //RX_FDEQ_BIN_3 +224 0x0000 //RX_FDEQ_BIN_4 +225 0x0000 //RX_FDEQ_BIN_5 +226 0x0000 //RX_FDEQ_BIN_6 +227 0x0000 //RX_FDEQ_BIN_7 +228 0x0000 //RX_FDEQ_BIN_8 +229 0x0000 //RX_FDEQ_BIN_9 +230 0x0000 //RX_FDEQ_BIN_10 +231 0x0000 //RX_FDEQ_BIN_11 +232 0x0000 //RX_FDEQ_BIN_12 +233 0x0000 //RX_FDEQ_BIN_13 +234 0x0000 //RX_FDEQ_BIN_14 +235 0x0000 //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x0000 //RX_FDEQ_RESRV_0 +245 0x0000 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0030 //RX_FDDRC_BAND_MARGIN_1 +248 0x0050 //RX_FDDRC_BAND_MARGIN_2 +249 0x0080 //RX_FDDRC_BAND_MARGIN_3 +250 0x0004 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x5000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x6400 //RX_FDDRC_THRD_3_2 +258 0x6400 //RX_FDDRC_THRD_3_3 +259 0x2000 //RX_FDDRC_SLANT_0_0 +260 0x2000 //RX_FDDRC_SLANT_0_1 +261 0x2000 //RX_FDDRC_SLANT_0_2 +262 0x2000 //RX_FDDRC_SLANT_0_3 +263 0x2000 //RX_FDDRC_SLANT_1_0 +264 0x2000 //RX_FDDRC_SLANT_1_1 +265 0x2000 //RX_FDDRC_SLANT_1_2 +266 0x2000 //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +286 0x0100 //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 +#VOL 1 +163 0x3000 //RX_TDDRC_ALPHA_UP_1 +164 0x3000 //RX_TDDRC_ALPHA_UP_2 +165 0x3000 //RX_TDDRC_ALPHA_UP_3 +166 0x3000 //RX_TDDRC_ALPHA_UP_4 +184 0x7FB0 //RX_TDDRC_ALPHA_DWN_1 +185 0x7FB0 //RX_TDDRC_ALPHA_DWN_2 +186 0x7FB0 //RX_TDDRC_ALPHA_DWN_3 +189 0x7FB0 //RX_TDDRC_ALPHA_DWN_4 +190 0xDA9E //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +269 0x0000 //RX_TDDRC_THRD_0 +270 0x0000 //RX_TDDRC_THRD_1 +271 0x0E80 //RX_TDDRC_THRD_2 +272 0x3800 //RX_TDDRC_THRD_3 +273 0x2A00 //RX_TDDRC_SLANT_0 +274 0x6E00 //RX_TDDRC_SLANT_1 +275 0x3000 //RX_TDDRC_ALPHA_UP_0 +276 0x7FB0 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x0000 //RX_TDDRC_HMNC_GAIN +279 0x0000 //RX_TDDRC_SMT_FLAG +280 0x0000 //RX_TDDRC_SMT_W +281 0x0100 //RX_TDDRC_DRC_GAIN +195 0x0020 //RX_FDEQ_SUBNUM +196 0x4848 //RX_FDEQ_GAIN_0 +197 0x4848 //RX_FDEQ_GAIN_1 +198 0x4848 //RX_FDEQ_GAIN_2 +199 0x4848 //RX_FDEQ_GAIN_3 +200 0x4848 //RX_FDEQ_GAIN_4 +201 0x4848 //RX_FDEQ_GAIN_5 +202 0x4848 //RX_FDEQ_GAIN_6 +203 0x4848 //RX_FDEQ_GAIN_7 +204 0x4848 //RX_FDEQ_GAIN_8 +205 0x4848 //RX_FDEQ_GAIN_9 +206 0x4848 //RX_FDEQ_GAIN_10 +207 0x4848 //RX_FDEQ_GAIN_11 +208 0x4848 //RX_FDEQ_GAIN_12 +209 0x4848 //RX_FDEQ_GAIN_13 +210 0x4848 //RX_FDEQ_GAIN_14 +211 0x4848 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0000 //RX_FDEQ_BIN_0 +221 0x0000 //RX_FDEQ_BIN_1 +222 0x0000 //RX_FDEQ_BIN_2 +223 0x0000 //RX_FDEQ_BIN_3 +224 0x0000 //RX_FDEQ_BIN_4 +225 0x0000 //RX_FDEQ_BIN_5 +226 0x0000 //RX_FDEQ_BIN_6 +227 0x0000 //RX_FDEQ_BIN_7 +228 0x0000 //RX_FDEQ_BIN_8 +229 0x0000 //RX_FDEQ_BIN_9 +230 0x0000 //RX_FDEQ_BIN_10 +231 0x0000 //RX_FDEQ_BIN_11 +232 0x0000 //RX_FDEQ_BIN_12 +233 0x0000 //RX_FDEQ_BIN_13 +234 0x0000 //RX_FDEQ_BIN_14 +235 0x0000 //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x0000 //RX_FDEQ_RESRV_0 +245 0x0000 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0030 //RX_FDDRC_BAND_MARGIN_1 +248 0x0050 //RX_FDDRC_BAND_MARGIN_2 +249 0x0080 //RX_FDDRC_BAND_MARGIN_3 +250 0x0004 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x5000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x6400 //RX_FDDRC_THRD_3_2 +258 0x6400 //RX_FDDRC_THRD_3_3 +259 0x2000 //RX_FDDRC_SLANT_0_0 +260 0x2000 //RX_FDDRC_SLANT_0_1 +261 0x2000 //RX_FDDRC_SLANT_0_2 +262 0x2000 //RX_FDDRC_SLANT_0_3 +263 0x2000 //RX_FDDRC_SLANT_1_0 +264 0x2000 //RX_FDDRC_SLANT_1_1 +265 0x2000 //RX_FDDRC_SLANT_1_2 +266 0x2000 //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +286 0x0100 //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 +#VOL 2 +163 0x3000 //RX_TDDRC_ALPHA_UP_1 +164 0x3000 //RX_TDDRC_ALPHA_UP_2 +165 0x3000 //RX_TDDRC_ALPHA_UP_3 +166 0x3000 //RX_TDDRC_ALPHA_UP_4 +184 0x7FB0 //RX_TDDRC_ALPHA_DWN_1 +185 0x7FB0 //RX_TDDRC_ALPHA_DWN_2 +186 0x7FB0 //RX_TDDRC_ALPHA_DWN_3 +189 0x7FB0 //RX_TDDRC_ALPHA_DWN_4 +190 0xDA9E //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +269 0x0000 //RX_TDDRC_THRD_0 +270 0x0000 //RX_TDDRC_THRD_1 +271 0x0E80 //RX_TDDRC_THRD_2 +272 0x3800 //RX_TDDRC_THRD_3 +273 0x2A00 //RX_TDDRC_SLANT_0 +274 0x6E00 //RX_TDDRC_SLANT_1 +275 0x3000 //RX_TDDRC_ALPHA_UP_0 +276 0x7FB0 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x0000 //RX_TDDRC_HMNC_GAIN +279 0x0000 //RX_TDDRC_SMT_FLAG +280 0x0000 //RX_TDDRC_SMT_W +281 0x0100 //RX_TDDRC_DRC_GAIN +195 0x0020 //RX_FDEQ_SUBNUM +196 0x4848 //RX_FDEQ_GAIN_0 +197 0x4848 //RX_FDEQ_GAIN_1 +198 0x4848 //RX_FDEQ_GAIN_2 +199 0x4848 //RX_FDEQ_GAIN_3 +200 0x4848 //RX_FDEQ_GAIN_4 +201 0x4848 //RX_FDEQ_GAIN_5 +202 0x4848 //RX_FDEQ_GAIN_6 +203 0x4848 //RX_FDEQ_GAIN_7 +204 0x4848 //RX_FDEQ_GAIN_8 +205 0x4848 //RX_FDEQ_GAIN_9 +206 0x4848 //RX_FDEQ_GAIN_10 +207 0x4848 //RX_FDEQ_GAIN_11 +208 0x4848 //RX_FDEQ_GAIN_12 +209 0x4848 //RX_FDEQ_GAIN_13 +210 0x4848 //RX_FDEQ_GAIN_14 +211 0x4848 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0000 //RX_FDEQ_BIN_0 +221 0x0000 //RX_FDEQ_BIN_1 +222 0x0000 //RX_FDEQ_BIN_2 +223 0x0000 //RX_FDEQ_BIN_3 +224 0x0000 //RX_FDEQ_BIN_4 +225 0x0000 //RX_FDEQ_BIN_5 +226 0x0000 //RX_FDEQ_BIN_6 +227 0x0000 //RX_FDEQ_BIN_7 +228 0x0000 //RX_FDEQ_BIN_8 +229 0x0000 //RX_FDEQ_BIN_9 +230 0x0000 //RX_FDEQ_BIN_10 +231 0x0000 //RX_FDEQ_BIN_11 +232 0x0000 //RX_FDEQ_BIN_12 +233 0x0000 //RX_FDEQ_BIN_13 +234 0x0000 //RX_FDEQ_BIN_14 +235 0x0000 //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x0000 //RX_FDEQ_RESRV_0 +245 0x0000 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0030 //RX_FDDRC_BAND_MARGIN_1 +248 0x0050 //RX_FDDRC_BAND_MARGIN_2 +249 0x0080 //RX_FDDRC_BAND_MARGIN_3 +250 0x0004 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x5000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x6400 //RX_FDDRC_THRD_3_2 +258 0x6400 //RX_FDDRC_THRD_3_3 +259 0x2000 //RX_FDDRC_SLANT_0_0 +260 0x2000 //RX_FDDRC_SLANT_0_1 +261 0x2000 //RX_FDDRC_SLANT_0_2 +262 0x2000 //RX_FDDRC_SLANT_0_3 +263 0x2000 //RX_FDDRC_SLANT_1_0 +264 0x2000 //RX_FDDRC_SLANT_1_1 +265 0x2000 //RX_FDDRC_SLANT_1_2 +266 0x2000 //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +286 0x0100 //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 +#VOL 3 +163 0x3000 //RX_TDDRC_ALPHA_UP_1 +164 0x3000 //RX_TDDRC_ALPHA_UP_2 +165 0x3000 //RX_TDDRC_ALPHA_UP_3 +166 0x3000 //RX_TDDRC_ALPHA_UP_4 +184 0x7FB0 //RX_TDDRC_ALPHA_DWN_1 +185 0x7FB0 //RX_TDDRC_ALPHA_DWN_2 +186 0x7FB0 //RX_TDDRC_ALPHA_DWN_3 +189 0x7FB0 //RX_TDDRC_ALPHA_DWN_4 +190 0xDA9E //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +269 0x0000 //RX_TDDRC_THRD_0 +270 0x0000 //RX_TDDRC_THRD_1 +271 0x0E80 //RX_TDDRC_THRD_2 +272 0x3800 //RX_TDDRC_THRD_3 +273 0x2A00 //RX_TDDRC_SLANT_0 +274 0x6E00 //RX_TDDRC_SLANT_1 +275 0x3000 //RX_TDDRC_ALPHA_UP_0 +276 0x7FB0 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x0000 //RX_TDDRC_HMNC_GAIN +279 0x0000 //RX_TDDRC_SMT_FLAG +280 0x0000 //RX_TDDRC_SMT_W +281 0x0100 //RX_TDDRC_DRC_GAIN +195 0x0020 //RX_FDEQ_SUBNUM +196 0x4848 //RX_FDEQ_GAIN_0 +197 0x4848 //RX_FDEQ_GAIN_1 +198 0x4848 //RX_FDEQ_GAIN_2 +199 0x4848 //RX_FDEQ_GAIN_3 +200 0x4848 //RX_FDEQ_GAIN_4 +201 0x4848 //RX_FDEQ_GAIN_5 +202 0x4848 //RX_FDEQ_GAIN_6 +203 0x4848 //RX_FDEQ_GAIN_7 +204 0x4848 //RX_FDEQ_GAIN_8 +205 0x4848 //RX_FDEQ_GAIN_9 +206 0x4848 //RX_FDEQ_GAIN_10 +207 0x4848 //RX_FDEQ_GAIN_11 +208 0x4848 //RX_FDEQ_GAIN_12 +209 0x4848 //RX_FDEQ_GAIN_13 +210 0x4848 //RX_FDEQ_GAIN_14 +211 0x4848 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0000 //RX_FDEQ_BIN_0 +221 0x0000 //RX_FDEQ_BIN_1 +222 0x0000 //RX_FDEQ_BIN_2 +223 0x0000 //RX_FDEQ_BIN_3 +224 0x0000 //RX_FDEQ_BIN_4 +225 0x0000 //RX_FDEQ_BIN_5 +226 0x0000 //RX_FDEQ_BIN_6 +227 0x0000 //RX_FDEQ_BIN_7 +228 0x0000 //RX_FDEQ_BIN_8 +229 0x0000 //RX_FDEQ_BIN_9 +230 0x0000 //RX_FDEQ_BIN_10 +231 0x0000 //RX_FDEQ_BIN_11 +232 0x0000 //RX_FDEQ_BIN_12 +233 0x0000 //RX_FDEQ_BIN_13 +234 0x0000 //RX_FDEQ_BIN_14 +235 0x0000 //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x0000 //RX_FDEQ_RESRV_0 +245 0x0000 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0030 //RX_FDDRC_BAND_MARGIN_1 +248 0x0050 //RX_FDDRC_BAND_MARGIN_2 +249 0x0080 //RX_FDDRC_BAND_MARGIN_3 +250 0x0004 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x5000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x6400 //RX_FDDRC_THRD_3_2 +258 0x6400 //RX_FDDRC_THRD_3_3 +259 0x2000 //RX_FDDRC_SLANT_0_0 +260 0x2000 //RX_FDDRC_SLANT_0_1 +261 0x2000 //RX_FDDRC_SLANT_0_2 +262 0x2000 //RX_FDDRC_SLANT_0_3 +263 0x2000 //RX_FDDRC_SLANT_1_0 +264 0x2000 //RX_FDDRC_SLANT_1_1 +265 0x2000 //RX_FDDRC_SLANT_1_2 +266 0x2000 //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +286 0x0100 //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 +#VOL 4 +163 0x3000 //RX_TDDRC_ALPHA_UP_1 +164 0x3000 //RX_TDDRC_ALPHA_UP_2 +165 0x3000 //RX_TDDRC_ALPHA_UP_3 +166 0x3000 //RX_TDDRC_ALPHA_UP_4 +184 0x7FB0 //RX_TDDRC_ALPHA_DWN_1 +185 0x7FB0 //RX_TDDRC_ALPHA_DWN_2 +186 0x7FB0 //RX_TDDRC_ALPHA_DWN_3 +189 0x7FB0 //RX_TDDRC_ALPHA_DWN_4 +190 0xDA9E //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +269 0x0000 //RX_TDDRC_THRD_0 +270 0x0000 //RX_TDDRC_THRD_1 +271 0x0E80 //RX_TDDRC_THRD_2 +272 0x3800 //RX_TDDRC_THRD_3 +273 0x2A00 //RX_TDDRC_SLANT_0 +274 0x6E00 //RX_TDDRC_SLANT_1 +275 0x3000 //RX_TDDRC_ALPHA_UP_0 +276 0x7FB0 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x0000 //RX_TDDRC_HMNC_GAIN +279 0x0000 //RX_TDDRC_SMT_FLAG +280 0x0000 //RX_TDDRC_SMT_W +281 0x0100 //RX_TDDRC_DRC_GAIN +195 0x0020 //RX_FDEQ_SUBNUM +196 0x4848 //RX_FDEQ_GAIN_0 +197 0x4848 //RX_FDEQ_GAIN_1 +198 0x4848 //RX_FDEQ_GAIN_2 +199 0x4848 //RX_FDEQ_GAIN_3 +200 0x4848 //RX_FDEQ_GAIN_4 +201 0x4848 //RX_FDEQ_GAIN_5 +202 0x4848 //RX_FDEQ_GAIN_6 +203 0x4848 //RX_FDEQ_GAIN_7 +204 0x4848 //RX_FDEQ_GAIN_8 +205 0x4848 //RX_FDEQ_GAIN_9 +206 0x4848 //RX_FDEQ_GAIN_10 +207 0x4848 //RX_FDEQ_GAIN_11 +208 0x4848 //RX_FDEQ_GAIN_12 +209 0x4848 //RX_FDEQ_GAIN_13 +210 0x4848 //RX_FDEQ_GAIN_14 +211 0x4848 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0000 //RX_FDEQ_BIN_0 +221 0x0000 //RX_FDEQ_BIN_1 +222 0x0000 //RX_FDEQ_BIN_2 +223 0x0000 //RX_FDEQ_BIN_3 +224 0x0000 //RX_FDEQ_BIN_4 +225 0x0000 //RX_FDEQ_BIN_5 +226 0x0000 //RX_FDEQ_BIN_6 +227 0x0000 //RX_FDEQ_BIN_7 +228 0x0000 //RX_FDEQ_BIN_8 +229 0x0000 //RX_FDEQ_BIN_9 +230 0x0000 //RX_FDEQ_BIN_10 +231 0x0000 //RX_FDEQ_BIN_11 +232 0x0000 //RX_FDEQ_BIN_12 +233 0x0000 //RX_FDEQ_BIN_13 +234 0x0000 //RX_FDEQ_BIN_14 +235 0x0000 //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x0000 //RX_FDEQ_RESRV_0 +245 0x0000 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0030 //RX_FDDRC_BAND_MARGIN_1 +248 0x0050 //RX_FDDRC_BAND_MARGIN_2 +249 0x0080 //RX_FDDRC_BAND_MARGIN_3 +250 0x0004 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x5000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x6400 //RX_FDDRC_THRD_3_2 +258 0x6400 //RX_FDDRC_THRD_3_3 +259 0x2000 //RX_FDDRC_SLANT_0_0 +260 0x2000 //RX_FDDRC_SLANT_0_1 +261 0x2000 //RX_FDDRC_SLANT_0_2 +262 0x2000 //RX_FDDRC_SLANT_0_3 +263 0x2000 //RX_FDDRC_SLANT_1_0 +264 0x2000 //RX_FDDRC_SLANT_1_1 +265 0x2000 //RX_FDDRC_SLANT_1_2 +266 0x2000 //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +286 0x0100 //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 +#VOL 5 +163 0x3000 //RX_TDDRC_ALPHA_UP_1 +164 0x3000 //RX_TDDRC_ALPHA_UP_2 +165 0x3000 //RX_TDDRC_ALPHA_UP_3 +166 0x3000 //RX_TDDRC_ALPHA_UP_4 +184 0x7FB0 //RX_TDDRC_ALPHA_DWN_1 +185 0x7FB0 //RX_TDDRC_ALPHA_DWN_2 +186 0x7FB0 //RX_TDDRC_ALPHA_DWN_3 +189 0x7FB0 //RX_TDDRC_ALPHA_DWN_4 +190 0xDA9E //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +269 0x0000 //RX_TDDRC_THRD_0 +270 0x0000 //RX_TDDRC_THRD_1 +271 0x0E80 //RX_TDDRC_THRD_2 +272 0x3800 //RX_TDDRC_THRD_3 +273 0x2A00 //RX_TDDRC_SLANT_0 +274 0x6E00 //RX_TDDRC_SLANT_1 +275 0x3000 //RX_TDDRC_ALPHA_UP_0 +276 0x7FB0 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x0000 //RX_TDDRC_HMNC_GAIN +279 0x0000 //RX_TDDRC_SMT_FLAG +280 0x0000 //RX_TDDRC_SMT_W +281 0x0100 //RX_TDDRC_DRC_GAIN +195 0x0020 //RX_FDEQ_SUBNUM +196 0x4848 //RX_FDEQ_GAIN_0 +197 0x4848 //RX_FDEQ_GAIN_1 +198 0x4848 //RX_FDEQ_GAIN_2 +199 0x4848 //RX_FDEQ_GAIN_3 +200 0x4848 //RX_FDEQ_GAIN_4 +201 0x4848 //RX_FDEQ_GAIN_5 +202 0x4848 //RX_FDEQ_GAIN_6 +203 0x4848 //RX_FDEQ_GAIN_7 +204 0x4848 //RX_FDEQ_GAIN_8 +205 0x4848 //RX_FDEQ_GAIN_9 +206 0x4848 //RX_FDEQ_GAIN_10 +207 0x4848 //RX_FDEQ_GAIN_11 +208 0x4848 //RX_FDEQ_GAIN_12 +209 0x4848 //RX_FDEQ_GAIN_13 +210 0x4848 //RX_FDEQ_GAIN_14 +211 0x4848 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0000 //RX_FDEQ_BIN_0 +221 0x0000 //RX_FDEQ_BIN_1 +222 0x0000 //RX_FDEQ_BIN_2 +223 0x0000 //RX_FDEQ_BIN_3 +224 0x0000 //RX_FDEQ_BIN_4 +225 0x0000 //RX_FDEQ_BIN_5 +226 0x0000 //RX_FDEQ_BIN_6 +227 0x0000 //RX_FDEQ_BIN_7 +228 0x0000 //RX_FDEQ_BIN_8 +229 0x0000 //RX_FDEQ_BIN_9 +230 0x0000 //RX_FDEQ_BIN_10 +231 0x0000 //RX_FDEQ_BIN_11 +232 0x0000 //RX_FDEQ_BIN_12 +233 0x0000 //RX_FDEQ_BIN_13 +234 0x0000 //RX_FDEQ_BIN_14 +235 0x0000 //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x0000 //RX_FDEQ_RESRV_0 +245 0x0000 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0030 //RX_FDDRC_BAND_MARGIN_1 +248 0x0050 //RX_FDDRC_BAND_MARGIN_2 +249 0x0080 //RX_FDDRC_BAND_MARGIN_3 +250 0x0004 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x5000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x6400 //RX_FDDRC_THRD_3_2 +258 0x6400 //RX_FDDRC_THRD_3_3 +259 0x2000 //RX_FDDRC_SLANT_0_0 +260 0x2000 //RX_FDDRC_SLANT_0_1 +261 0x2000 //RX_FDDRC_SLANT_0_2 +262 0x2000 //RX_FDDRC_SLANT_0_3 +263 0x2000 //RX_FDDRC_SLANT_1_0 +264 0x2000 //RX_FDDRC_SLANT_1_1 +265 0x2000 //RX_FDDRC_SLANT_1_2 +266 0x2000 //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +286 0x0100 //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 +#VOL 6 +163 0x3000 //RX_TDDRC_ALPHA_UP_1 +164 0x3000 //RX_TDDRC_ALPHA_UP_2 +165 0x3000 //RX_TDDRC_ALPHA_UP_3 +166 0x3000 //RX_TDDRC_ALPHA_UP_4 +184 0x7FB0 //RX_TDDRC_ALPHA_DWN_1 +185 0x7FB0 //RX_TDDRC_ALPHA_DWN_2 +186 0x7FB0 //RX_TDDRC_ALPHA_DWN_3 +189 0x7FB0 //RX_TDDRC_ALPHA_DWN_4 +190 0xDA9E //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +269 0x0000 //RX_TDDRC_THRD_0 +270 0x0000 //RX_TDDRC_THRD_1 +271 0x0E80 //RX_TDDRC_THRD_2 +272 0x3800 //RX_TDDRC_THRD_3 +273 0x2A00 //RX_TDDRC_SLANT_0 +274 0x6E00 //RX_TDDRC_SLANT_1 +275 0x3000 //RX_TDDRC_ALPHA_UP_0 +276 0x7FB0 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x0000 //RX_TDDRC_HMNC_GAIN +279 0x0000 //RX_TDDRC_SMT_FLAG +280 0x0000 //RX_TDDRC_SMT_W +281 0x0100 //RX_TDDRC_DRC_GAIN +195 0x0020 //RX_FDEQ_SUBNUM +196 0x4848 //RX_FDEQ_GAIN_0 +197 0x4848 //RX_FDEQ_GAIN_1 +198 0x4848 //RX_FDEQ_GAIN_2 +199 0x4848 //RX_FDEQ_GAIN_3 +200 0x4848 //RX_FDEQ_GAIN_4 +201 0x4848 //RX_FDEQ_GAIN_5 +202 0x4848 //RX_FDEQ_GAIN_6 +203 0x4848 //RX_FDEQ_GAIN_7 +204 0x4848 //RX_FDEQ_GAIN_8 +205 0x4848 //RX_FDEQ_GAIN_9 +206 0x4848 //RX_FDEQ_GAIN_10 +207 0x4848 //RX_FDEQ_GAIN_11 +208 0x4848 //RX_FDEQ_GAIN_12 +209 0x4848 //RX_FDEQ_GAIN_13 +210 0x4848 //RX_FDEQ_GAIN_14 +211 0x4848 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0000 //RX_FDEQ_BIN_0 +221 0x0000 //RX_FDEQ_BIN_1 +222 0x0000 //RX_FDEQ_BIN_2 +223 0x0000 //RX_FDEQ_BIN_3 +224 0x0000 //RX_FDEQ_BIN_4 +225 0x0000 //RX_FDEQ_BIN_5 +226 0x0000 //RX_FDEQ_BIN_6 +227 0x0000 //RX_FDEQ_BIN_7 +228 0x0000 //RX_FDEQ_BIN_8 +229 0x0000 //RX_FDEQ_BIN_9 +230 0x0000 //RX_FDEQ_BIN_10 +231 0x0000 //RX_FDEQ_BIN_11 +232 0x0000 //RX_FDEQ_BIN_12 +233 0x0000 //RX_FDEQ_BIN_13 +234 0x0000 //RX_FDEQ_BIN_14 +235 0x0000 //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x0000 //RX_FDEQ_RESRV_0 +245 0x0000 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0030 //RX_FDDRC_BAND_MARGIN_1 +248 0x0050 //RX_FDDRC_BAND_MARGIN_2 +249 0x0080 //RX_FDDRC_BAND_MARGIN_3 +250 0x0004 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x5000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x6400 //RX_FDDRC_THRD_3_2 +258 0x6400 //RX_FDDRC_THRD_3_3 +259 0x2000 //RX_FDDRC_SLANT_0_0 +260 0x2000 //RX_FDDRC_SLANT_0_1 +261 0x2000 //RX_FDDRC_SLANT_0_2 +262 0x2000 //RX_FDDRC_SLANT_0_3 +263 0x2000 //RX_FDDRC_SLANT_1_0 +264 0x2000 //RX_FDDRC_SLANT_1_1 +265 0x2000 //RX_FDDRC_SLANT_1_2 +266 0x2000 //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +286 0x0100 //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 #CASE_NAME HEADSET-TTY_FULL-VOICE_GENERIC-FB -#PARAM_MODE FULL -#PARAM_TYPE TX+RX -#TOTAL_CUSTOM_STEP 7 +#PARAM_MODE Full +#PARAM_TYPE TX+2RX +#TOTAL_CUSTOM_STEP 7+7 #TX 0 0x0001 //TX_OPERATION_MODE_0 1 0x0000 //TX_OPERATION_MODE_1 @@ -54624,7 +83020,7 @@ 239 0x0000 //TX_DT_RESRV_7 240 0x0000 //TX_DT_RESRV_8 241 0x0000 //TX_DT_RESRV_9 -242 0xF200 //TX_THR_SN_EST_0 +242 0xF700 //TX_THR_SN_EST_0 243 0xF400 //TX_THR_SN_EST_1 244 0xF800 //TX_THR_SN_EST_2 245 0xF600 //TX_THR_SN_EST_3 @@ -54633,12 +83029,12 @@ 248 0xF800 //TX_THR_SN_EST_6 249 0xF800 //TX_THR_SN_EST_7 250 0x0100 //TX_DELTA_THR_SN_EST_0 -251 0x0000 //TX_DELTA_THR_SN_EST_1 +251 0x0100 //TX_DELTA_THR_SN_EST_1 252 0x0100 //TX_DELTA_THR_SN_EST_2 -253 0x0100 //TX_DELTA_THR_SN_EST_3 +253 0x0200 //TX_DELTA_THR_SN_EST_3 254 0x0200 //TX_DELTA_THR_SN_EST_4 255 0x0200 //TX_DELTA_THR_SN_EST_5 -256 0x0200 //TX_DELTA_THR_SN_EST_6 +256 0x0000 //TX_DELTA_THR_SN_EST_6 257 0x0200 //TX_DELTA_THR_SN_EST_7 258 0x4000 //TX_LAMBDA_NN_EST_0 259 0x4000 //TX_LAMBDA_NN_EST_1 @@ -54664,12 +83060,12 @@ 279 0x0000 //TX_B_POST_FLT_0 280 0x0000 //TX_B_POST_FLT_1 281 0x001A //TX_NS_LVL_CTRL_0 -282 0x001A //TX_NS_LVL_CTRL_1 +282 0x0014 //TX_NS_LVL_CTRL_1 283 0x0014 //TX_NS_LVL_CTRL_2 -284 0x0014 //TX_NS_LVL_CTRL_3 +284 0x000C //TX_NS_LVL_CTRL_3 285 0x000C //TX_NS_LVL_CTRL_4 286 0x000C //TX_NS_LVL_CTRL_5 -287 0x000C //TX_NS_LVL_CTRL_6 +287 0x001A //TX_NS_LVL_CTRL_6 288 0x000C //TX_NS_LVL_CTRL_7 289 0x000E //TX_MIN_GAIN_S_0 290 0x0014 //TX_MIN_GAIN_S_1 @@ -54685,10 +83081,10 @@ 300 0x7FFF //TX_SNRI_SUP_0 301 0x7FFF //TX_SNRI_SUP_1 302 0x7FFF //TX_SNRI_SUP_2 -303 0x7FFF //TX_SNRI_SUP_3 +303 0x4000 //TX_SNRI_SUP_3 304 0x4000 //TX_SNRI_SUP_4 305 0x4000 //TX_SNRI_SUP_5 -306 0x4000 //TX_SNRI_SUP_6 +306 0x7FFF //TX_SNRI_SUP_6 307 0x4000 //TX_SNRI_SUP_7 308 0x1200 //TX_THR_LFNS 309 0x0147 //TX_G_LFNS @@ -54697,12 +83093,12 @@ 312 0x7FFF //TX_A_POST_FILT_0 313 0x7FFF //TX_A_POST_FILT_1 314 0x4000 //TX_A_POST_FILT_S_0 -315 0x199A //TX_A_POST_FILT_S_1 +315 0x1000 //TX_A_POST_FILT_S_1 316 0x1000 //TX_A_POST_FILT_S_2 -317 0x1000 //TX_A_POST_FILT_S_3 +317 0x6666 //TX_A_POST_FILT_S_3 318 0x6666 //TX_A_POST_FILT_S_4 319 0x6666 //TX_A_POST_FILT_S_5 -320 0x6666 //TX_A_POST_FILT_S_6 +320 0x199A //TX_A_POST_FILT_S_6 321 0x6666 //TX_A_POST_FILT_S_7 322 0x2000 //TX_B_POST_FILT_0 323 0x2000 //TX_B_POST_FILT_1 @@ -54749,7 +83145,7 @@ 364 0x0000 //TX_K_APT 365 0x0001 //TX_NOISEDET 366 0x05A0 //TX_NDETCT -367 0x000A //TX_NOISE_TH_0 +367 0x04E8 //TX_NOISE_TH_0 368 0x1388 //TX_NOISE_TH_0_2 369 0x3A98 //TX_NOISE_TH_0_3 370 0x0C80 //TX_NOISE_TH_1 @@ -54761,11 +83157,11 @@ 376 0x7FFF //TX_NOISE_TH_5_3 377 0x7FFF //TX_NOISE_TH_5_4 378 0x00C8 //TX_NOISE_TH_6 -379 0x000A //TX_MINENOISE_TH -380 0x0000 //TX_MINENOISE_MIC0_TH_MTS -381 0x0000 //TX_MINENOISE_MIC0_TH_EXP -382 0x0000 //TX_MINENOISE_MIC0_S_TH_MTS -383 0x0000 //TX_MINENOISE_MIC0_S_TH_EXP +379 0x02BC //TX_MINENOISE_TH +380 0xD508 //TX_MORENS_TFMASK_TH +381 0x0001 //TX_DRC_QUIET_FLOOR +382 0x3A98 //TX_RATIODTL_CUT_TH +383 0x1482 //TX_DT_CUT_K1 384 0x6400 //TX_OUT_ENER_S_TH_CLEAN 385 0x6400 //TX_OUT_ENER_S_TH_LESSCLEAN 386 0x6400 //TX_OUT_ENER_S_TH_NOISY @@ -54773,22 +83169,22 @@ 388 0x7D00 //TX_OUT_ENER_TH_SPEECH 389 0x0000 //TX_SN_NPB_GAIN 390 0x0000 //TX_NN_NPB_GAIN -391 0x0000 //TX_CSX_ALPHA_0 -392 0x0000 //TX_CSX_ALPHA_1 -393 0x0000 //TX_CSX_ALPHA_2 -394 0x0000 //TX_CSX_ALPHA_3 -395 0x0000 //TX_MU_ARSP_EST -396 0x0000 //TX_P_OUTBEAM_MIN_TH +391 0x7FFF //TX_POST_MASK_SUP_HSNE +392 0x1388 //TX_TAIL_DET_TH +393 0x4000 //TX_B_LESSCUT_RTO_WTA +394 0x0000 //TX_MEL_G_R +395 0x0080 //TX_SUPHIGH_TH +396 0x0000 //TX_MASK_G_R 397 0x0000 //TX_EXTRA_NS_L -398 0x0000 //TX_EXTRA_NS_A -399 0x0000 //TX_VR_NOISE_FLOOR_TH +398 0x1800 //TX_C_POST_FLT_MASK +399 0x7FFF //TX_A_POST_FLT_WNS 400 0x0000 //TX_MIN_G_LOW300HZ 401 0x0010 //TX_MAXLEVEL_CNG 402 0x0000 //TX_STN_NOISE_TH 403 0x0000 //TX_POST_MASK_SUP 404 0x0000 //TX_POST_MASK_ADJUST 405 0x0014 //TX_NS_ENOISE_MIC0_TH -406 0x0014 //TX_MINENOISE_MIC0_TH +406 0x04E7 //TX_MINENOISE_MIC0_TH 407 0x0226 //TX_MINENOISE_MIC0_S_TH 408 0x2879 //TX_MIN_G_CTRL_SSNS 409 0x0400 //TX_METAL_RTO_THR @@ -54896,16 +83292,16 @@ 511 0x6666 //TX_MIC_TO_BFGAIN 512 0x6666 //TX_MICTOBFGAIN0 513 0x0014 //TX_FASTMUE_TH -514 0x0000 //TX_DERVB_LEN_0 -515 0x0000 //TX_DERVB_LEN_1 -516 0x0000 //TX_RHO_DERVB -517 0x0000 //TX_MIC_INDX_DERVB -518 0x0000 //TX_MU_DERVB -519 0x0000 //TX_DR_RESRV_0 -520 0x0000 //TX_DR_RESRV_1 -521 0x0000 //TX_DR_RESRV_2 -522 0x0000 //TX_DR_RESRV_3 -523 0x0000 //TX_DR_RESRV_4 +514 0xC000 //TX_DEREVERB_LF_MU +515 0xC000 //TX_DEREVERB_HF_MU +516 0xCCCC //TX_DEREVERB_DELAY +517 0xD999 //TX_DEREVERB_COEF_LEN +518 0x1F40 //TX_DEREVERB_DNR +519 0x0000 //TX_DEREVERB_ALPHA +520 0x0000 //TX_DEREVERB_BETA +521 0x0000 //TX_GSC_RTOL_TH +522 0x7000 //TX_GSC_RTOH_TH +523 0x0064 //TX_WIDE2_MEANHTH 524 0x0000 //TX_DR_RESRV_5 525 0x0000 //TX_DR_RESRV_6 526 0x0000 //TX_DR_RESRV_7 @@ -55271,16 +83667,81 @@ 886 0x0000 //TX_FASTNS_TFMASKBIN_TH2 887 0x0000 //TX_FASTNS_TFMASKBIN_TH3 888 0x00C8 //TX_FASTNS_ARSPC_TH -889 0xD99A //TX_FASTNS_MASK5_TH +889 0xC000 //TX_FASTNS_MASK5_TH 890 0x051F //TX_POSTSSA_MIN_G_VR_MASK -891 0x7FFF //TX_A_LESSCUT_RTO_MASK +891 0x7000 //TX_A_LESSCUT_RTO_MASK 892 0x1770 //TX_FASTNS_NOISETH 893 0xC000 //TX_FASTNS_SSA_THLFL 894 0xC000 //TX_FASTNS_SSA_THHFL 895 0xCCCC //TX_FASTNS_SSA_THLFH 896 0xD999 //TX_FASTNS_SSA_THHFH +897 0x2339 //TX_SENDFUNC_REG_MICMUTE +898 0x0021 //TX_SENDFUNC_REG_MICMUTE1 +899 0x02BC //TX_MICMUTE_RATIO_THR +900 0x0140 //TX_MICMUTE_AMP_THR +901 0x0004 //TX_MICMUTE_HPF_IND +902 0x00C0 //TX_MICMUTE_LOG_EYR_TH +903 0x0008 //TX_MICMUTE_CVG_TIME +904 0x0008 //TX_MICMUTE_RELEASE_TIME +905 0x01FE //TX_MIC_VOLUME_MIC0MUTE +906 0x0020 //TX_MICMUTE_EPD_OFFSET_0 +907 0x001E //TX_MICMUTE_FRQ_AEC_L +908 0x7999 //TX_MICMUTE_EAD_THR +909 0x7FFF //TX_MICMUTE_LAMBDA_CB_NLE +910 0x7FFF //TX_MICMUTE_LAMBDA_RE_EST +911 0x4000 //TX_DTD_THR1_MICMUTE_0 +912 0x7000 //TX_DTD_THR1_MICMUTE_1 +913 0x7FFF //TX_DTD_THR1_MICMUTE_2 +914 0x7FFF //TX_DTD_THR1_MICMUTE_3 +915 0x6CCC //TX_DTD_THR2_MICMUTE_0 +916 0x0400 //TX_MICMUTE_MIN_EQ_RE_EST_0 +917 0x0400 //TX_MICMUTE_MIN_EQ_RE_EST_1 +918 0x1000 //TX_MICMUTE_MIN_EQ_RE_EST_2 +919 0x7FFF //TX_MICMUTE_MIN_EQ_RE_EST_3 +920 0x7FFF //TX_MICMUTE_MIN_EQ_RE_EST_4 +921 0x4000 //TX_MICMUTE_C_POST_FLT +922 0x03E8 //TX_MICMUTE_DT_CUT_K +923 0x0001 //TX_MICMUTE_DT_CUT_THR +924 0x03E8 //TX_MICMUTE_DT_CUT_K2 +925 0x0001 //TX_MICMUTE_DT_CUT_THR2 +926 0x0064 //TX_MICMUTE_DT2_HOLD_N +927 0x1000 //TX_MICMUTE_RATIODTH_THCUT +928 0x1000 //TX_MICMUTE_B_POST_FLT_ECHOL +929 0x7FFF //TX_MICMUTE_B_POST_FLT_ECHOH +930 0x0400 //TX_MICMUTE_C_POST_FLT_MASK +931 0x7999 //TX_MICMUTE_RATIODTL_CUT_TH +932 0x0258 //TX_MICMUTE_DT_CUT_K1 +933 0x0800 //TX_MICMUTE_N2_SN_EST +934 0xFC00 //TX_MICMUTE_THR_SN_EST_0 +935 0x001C //TX_MICMUTE_MIN_G_CTRL_0 +936 0x6000 //TX_MICMUTE_A_POST_FILT_S_0 +937 0x7000 //TX_MICMUTE_B_POST_FILT_0 +938 0x2710 //TX_MIC1RUB_AMP_THR +939 0x0010 //TX_MIC1MUTE_RATIO_THR +940 0x0450 //TX_MIC1MUTE_AMP_THR +941 0x0008 //TX_MIC1MUTE_CVG_TIME +942 0x0008 //TX_MIC1MUTE_RELEASE_TIME +943 0x0000 //TX_AMS_RESRV_01 +944 0x0000 //TX_AMS_RESRV_02 +945 0x0000 //TX_AMS_RESRV_03 +946 0x0000 //TX_AMS_RESRV_04 +947 0x0000 //TX_AMS_RESRV_05 +948 0x0000 //TX_AMS_RESRV_06 +949 0x0000 //TX_AMS_RESRV_07 +950 0x0000 //TX_AMS_RESRV_08 +951 0x0000 //TX_AMS_RESRV_09 +952 0x0000 //TX_AMS_RESRV_10 +953 0x0000 //TX_AMS_RESRV_11 +954 0x0000 //TX_AMS_RESRV_12 +955 0x0000 //TX_AMS_RESRV_13 +956 0x0000 //TX_AMS_RESRV_14 +957 0x0000 //TX_AMS_RESRV_15 +958 0x0000 //TX_AMS_RESRV_16 +959 0x0000 //TX_AMS_RESRV_17 +960 0x0000 //TX_AMS_RESRV_18 +961 0x0000 //TX_AMS_RESRV_19 #RX -0 0x0040 //RX_RECVFUNC_MODE_0 +0 0x2040 //RX_RECVFUNC_MODE_0 1 0x0000 //RX_RECVFUNC_MODE_1 2 0x0000 //RX_SAMPLINGFREQ_SIG 3 0x0000 //RX_SAMPLINGFREQ_PROC @@ -56130,4 +84591,855 @@ 110 0x0000 //RX_FDDRC_RESRV_0 129 0x0100 //RX_SPK_VOL 130 0x0000 //RX_VOL_RESRV_0 +#RX 2 +157 0x2040 //RX_RECVFUNC_MODE_0 +158 0x0000 //RX_RECVFUNC_MODE_1 +159 0x0000 //RX_SAMPLINGFREQ_SIG +160 0x0000 //RX_SAMPLINGFREQ_PROC +161 0x000A //RX_FRAME_SZ +162 0x0000 //RX_DELAY_OPT +163 0x3000 //RX_TDDRC_ALPHA_UP_1 +164 0x3000 //RX_TDDRC_ALPHA_UP_2 +165 0x3000 //RX_TDDRC_ALPHA_UP_3 +166 0x3000 //RX_TDDRC_ALPHA_UP_4 +167 0x050D //RX_PGA +168 0x7652 //RX_A_HP +169 0x4000 //RX_B_PE +170 0x7800 //RX_THR_PITCH_DET_0 +171 0x7000 //RX_THR_PITCH_DET_1 +172 0x6000 //RX_THR_PITCH_DET_2 +173 0x0000 //RX_PITCH_BFR_LEN +174 0x0000 //RX_SBD_PITCH_DET +175 0x0000 //RX_PP_RESRV_0 +176 0x0000 //RX_PP_RESRV_1 +177 0xF800 //RX_N_SN_EST +178 0x0000 //RX_N2_SN_EST +179 0x000F //RX_NS_LVL_CTRL +180 0xF800 //RX_THR_SN_EST +181 0x7E00 //RX_LAMBDA_PFILT +182 0x000A //RX_FENS_RESRV_0 +183 0x0000 //RX_FENS_RESRV_1 +184 0x7FB0 //RX_TDDRC_ALPHA_DWN_1 +185 0x7FB0 //RX_TDDRC_ALPHA_DWN_2 +186 0x7FB0 //RX_TDDRC_ALPHA_DWN_3 +187 0x0000 //RX_EXTRA_NS_L +188 0x0000 //RX_EXTRA_NS_A +189 0x7FB0 //RX_TDDRC_ALPHA_DWN_4 +190 0xDA9E //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +192 0x0000 //RX_A_POST_FLT +193 0x0000 //RX_LMT_THRD +194 0x4000 //RX_LMT_ALPHA +195 0x0020 //RX_FDEQ_SUBNUM +196 0x4848 //RX_FDEQ_GAIN_0 +197 0x4848 //RX_FDEQ_GAIN_1 +198 0x4848 //RX_FDEQ_GAIN_2 +199 0x4848 //RX_FDEQ_GAIN_3 +200 0x4848 //RX_FDEQ_GAIN_4 +201 0x4848 //RX_FDEQ_GAIN_5 +202 0x4848 //RX_FDEQ_GAIN_6 +203 0x4848 //RX_FDEQ_GAIN_7 +204 0x4848 //RX_FDEQ_GAIN_8 +205 0x4848 //RX_FDEQ_GAIN_9 +206 0x4848 //RX_FDEQ_GAIN_10 +207 0x4848 //RX_FDEQ_GAIN_11 +208 0x4848 //RX_FDEQ_GAIN_12 +209 0x4848 //RX_FDEQ_GAIN_13 +210 0x4848 //RX_FDEQ_GAIN_14 +211 0x4848 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0000 //RX_FDEQ_BIN_0 +221 0x0000 //RX_FDEQ_BIN_1 +222 0x0000 //RX_FDEQ_BIN_2 +223 0x0000 //RX_FDEQ_BIN_3 +224 0x0000 //RX_FDEQ_BIN_4 +225 0x0000 //RX_FDEQ_BIN_5 +226 0x0000 //RX_FDEQ_BIN_6 +227 0x0000 //RX_FDEQ_BIN_7 +228 0x0000 //RX_FDEQ_BIN_8 +229 0x0000 //RX_FDEQ_BIN_9 +230 0x0000 //RX_FDEQ_BIN_10 +231 0x0000 //RX_FDEQ_BIN_11 +232 0x0000 //RX_FDEQ_BIN_12 +233 0x0000 //RX_FDEQ_BIN_13 +234 0x0000 //RX_FDEQ_BIN_14 +235 0x0000 //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x0000 //RX_FDEQ_RESRV_0 +245 0x0000 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0030 //RX_FDDRC_BAND_MARGIN_1 +248 0x0050 //RX_FDDRC_BAND_MARGIN_2 +249 0x0080 //RX_FDDRC_BAND_MARGIN_3 +250 0x0004 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x5000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x6400 //RX_FDDRC_THRD_3_2 +258 0x6400 //RX_FDDRC_THRD_3_3 +259 0x2000 //RX_FDDRC_SLANT_0_0 +260 0x2000 //RX_FDDRC_SLANT_0_1 +261 0x2000 //RX_FDDRC_SLANT_0_2 +262 0x2000 //RX_FDDRC_SLANT_0_3 +263 0x2000 //RX_FDDRC_SLANT_1_0 +264 0x2000 //RX_FDDRC_SLANT_1_1 +265 0x2000 //RX_FDDRC_SLANT_1_2 +266 0x2000 //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +268 0x0003 //RX_FILTINDX +269 0x0000 //RX_TDDRC_THRD_0 +270 0x0000 //RX_TDDRC_THRD_1 +271 0x0E80 //RX_TDDRC_THRD_2 +272 0x3800 //RX_TDDRC_THRD_3 +273 0x2A00 //RX_TDDRC_SLANT_0 +274 0x6E00 //RX_TDDRC_SLANT_1 +275 0x3000 //RX_TDDRC_ALPHA_UP_0 +276 0x7FB0 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x0000 //RX_TDDRC_HMNC_GAIN +279 0x0000 //RX_TDDRC_SMT_FLAG +280 0x0000 //RX_TDDRC_SMT_W +281 0x0100 //RX_TDDRC_DRC_GAIN +282 0x7C00 //RX_LAMBDA_PKA_FP +283 0x2000 //RX_TPKA_FP +284 0x0080 //RX_MIN_G_FP +285 0x2000 //RX_MAX_G_FP +286 0x0100 //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 +288 0x0010 //RX_MAXLEVEL_CNG +289 0x0000 //RX_BWE_UV_TH +290 0x0000 //RX_BWE_UV_TH2 +291 0x0000 //RX_BWE_UV_TH3 +292 0x0000 //RX_BWE_V_TH +293 0x0000 //RX_BWE_GAIN1_V_TH1 +294 0x0000 //RX_BWE_GAIN1_V_TH2 +295 0x0000 //RX_BWE_UV_EQ +296 0x0000 //RX_BWE_V_EQ +297 0x0000 //RX_BWE_TONE_TH +298 0x0000 //RX_BWE_UV_HOLD_T +299 0x0000 //RX_BWE_GAIN2_ALPHA +300 0x0000 //RX_BWE_GAIN3_ALPHA +301 0x0000 //RX_BWE_CUTOFF +302 0x0000 //RX_BWE_GAINFILL +303 0x0000 //RX_BWE_MAXTH_TONE +304 0x0000 //RX_BWE_EQ_0 +305 0x0000 //RX_BWE_EQ_1 +306 0x0000 //RX_BWE_EQ_2 +307 0x0000 //RX_BWE_EQ_3 +308 0x0000 //RX_BWE_EQ_4 +309 0x0000 //RX_BWE_EQ_5 +310 0x0000 //RX_BWE_EQ_6 +311 0x0000 //RX_BWE_RESRV_0 +312 0x0000 //RX_BWE_RESRV_1 +313 0x0000 //RX_BWE_RESRV_2 +#VOL 0 +163 0x3000 //RX_TDDRC_ALPHA_UP_1 +164 0x3000 //RX_TDDRC_ALPHA_UP_2 +165 0x3000 //RX_TDDRC_ALPHA_UP_3 +166 0x3000 //RX_TDDRC_ALPHA_UP_4 +184 0x7FB0 //RX_TDDRC_ALPHA_DWN_1 +185 0x7FB0 //RX_TDDRC_ALPHA_DWN_2 +186 0x7FB0 //RX_TDDRC_ALPHA_DWN_3 +189 0x7FB0 //RX_TDDRC_ALPHA_DWN_4 +190 0xDA9E //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +269 0x0000 //RX_TDDRC_THRD_0 +270 0x0000 //RX_TDDRC_THRD_1 +271 0x0E80 //RX_TDDRC_THRD_2 +272 0x3800 //RX_TDDRC_THRD_3 +273 0x2A00 //RX_TDDRC_SLANT_0 +274 0x6E00 //RX_TDDRC_SLANT_1 +275 0x3000 //RX_TDDRC_ALPHA_UP_0 +276 0x7FB0 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x0000 //RX_TDDRC_HMNC_GAIN +279 0x0000 //RX_TDDRC_SMT_FLAG +280 0x0000 //RX_TDDRC_SMT_W +281 0x0100 //RX_TDDRC_DRC_GAIN +195 0x0020 //RX_FDEQ_SUBNUM +196 0x4848 //RX_FDEQ_GAIN_0 +197 0x4848 //RX_FDEQ_GAIN_1 +198 0x4848 //RX_FDEQ_GAIN_2 +199 0x4848 //RX_FDEQ_GAIN_3 +200 0x4848 //RX_FDEQ_GAIN_4 +201 0x4848 //RX_FDEQ_GAIN_5 +202 0x4848 //RX_FDEQ_GAIN_6 +203 0x4848 //RX_FDEQ_GAIN_7 +204 0x4848 //RX_FDEQ_GAIN_8 +205 0x4848 //RX_FDEQ_GAIN_9 +206 0x4848 //RX_FDEQ_GAIN_10 +207 0x4848 //RX_FDEQ_GAIN_11 +208 0x4848 //RX_FDEQ_GAIN_12 +209 0x4848 //RX_FDEQ_GAIN_13 +210 0x4848 //RX_FDEQ_GAIN_14 +211 0x4848 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0000 //RX_FDEQ_BIN_0 +221 0x0000 //RX_FDEQ_BIN_1 +222 0x0000 //RX_FDEQ_BIN_2 +223 0x0000 //RX_FDEQ_BIN_3 +224 0x0000 //RX_FDEQ_BIN_4 +225 0x0000 //RX_FDEQ_BIN_5 +226 0x0000 //RX_FDEQ_BIN_6 +227 0x0000 //RX_FDEQ_BIN_7 +228 0x0000 //RX_FDEQ_BIN_8 +229 0x0000 //RX_FDEQ_BIN_9 +230 0x0000 //RX_FDEQ_BIN_10 +231 0x0000 //RX_FDEQ_BIN_11 +232 0x0000 //RX_FDEQ_BIN_12 +233 0x0000 //RX_FDEQ_BIN_13 +234 0x0000 //RX_FDEQ_BIN_14 +235 0x0000 //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x0000 //RX_FDEQ_RESRV_0 +245 0x0000 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0030 //RX_FDDRC_BAND_MARGIN_1 +248 0x0050 //RX_FDDRC_BAND_MARGIN_2 +249 0x0080 //RX_FDDRC_BAND_MARGIN_3 +250 0x0004 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x5000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x6400 //RX_FDDRC_THRD_3_2 +258 0x6400 //RX_FDDRC_THRD_3_3 +259 0x2000 //RX_FDDRC_SLANT_0_0 +260 0x2000 //RX_FDDRC_SLANT_0_1 +261 0x2000 //RX_FDDRC_SLANT_0_2 +262 0x2000 //RX_FDDRC_SLANT_0_3 +263 0x2000 //RX_FDDRC_SLANT_1_0 +264 0x2000 //RX_FDDRC_SLANT_1_1 +265 0x2000 //RX_FDDRC_SLANT_1_2 +266 0x2000 //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +286 0x0100 //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 +#VOL 1 +163 0x3000 //RX_TDDRC_ALPHA_UP_1 +164 0x3000 //RX_TDDRC_ALPHA_UP_2 +165 0x3000 //RX_TDDRC_ALPHA_UP_3 +166 0x3000 //RX_TDDRC_ALPHA_UP_4 +184 0x7FB0 //RX_TDDRC_ALPHA_DWN_1 +185 0x7FB0 //RX_TDDRC_ALPHA_DWN_2 +186 0x7FB0 //RX_TDDRC_ALPHA_DWN_3 +189 0x7FB0 //RX_TDDRC_ALPHA_DWN_4 +190 0xDA9E //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +269 0x0000 //RX_TDDRC_THRD_0 +270 0x0000 //RX_TDDRC_THRD_1 +271 0x0E80 //RX_TDDRC_THRD_2 +272 0x3800 //RX_TDDRC_THRD_3 +273 0x2A00 //RX_TDDRC_SLANT_0 +274 0x6E00 //RX_TDDRC_SLANT_1 +275 0x3000 //RX_TDDRC_ALPHA_UP_0 +276 0x7FB0 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x0000 //RX_TDDRC_HMNC_GAIN +279 0x0000 //RX_TDDRC_SMT_FLAG +280 0x0000 //RX_TDDRC_SMT_W +281 0x0100 //RX_TDDRC_DRC_GAIN +195 0x0020 //RX_FDEQ_SUBNUM +196 0x4848 //RX_FDEQ_GAIN_0 +197 0x4848 //RX_FDEQ_GAIN_1 +198 0x4848 //RX_FDEQ_GAIN_2 +199 0x4848 //RX_FDEQ_GAIN_3 +200 0x4848 //RX_FDEQ_GAIN_4 +201 0x4848 //RX_FDEQ_GAIN_5 +202 0x4848 //RX_FDEQ_GAIN_6 +203 0x4848 //RX_FDEQ_GAIN_7 +204 0x4848 //RX_FDEQ_GAIN_8 +205 0x4848 //RX_FDEQ_GAIN_9 +206 0x4848 //RX_FDEQ_GAIN_10 +207 0x4848 //RX_FDEQ_GAIN_11 +208 0x4848 //RX_FDEQ_GAIN_12 +209 0x4848 //RX_FDEQ_GAIN_13 +210 0x4848 //RX_FDEQ_GAIN_14 +211 0x4848 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0000 //RX_FDEQ_BIN_0 +221 0x0000 //RX_FDEQ_BIN_1 +222 0x0000 //RX_FDEQ_BIN_2 +223 0x0000 //RX_FDEQ_BIN_3 +224 0x0000 //RX_FDEQ_BIN_4 +225 0x0000 //RX_FDEQ_BIN_5 +226 0x0000 //RX_FDEQ_BIN_6 +227 0x0000 //RX_FDEQ_BIN_7 +228 0x0000 //RX_FDEQ_BIN_8 +229 0x0000 //RX_FDEQ_BIN_9 +230 0x0000 //RX_FDEQ_BIN_10 +231 0x0000 //RX_FDEQ_BIN_11 +232 0x0000 //RX_FDEQ_BIN_12 +233 0x0000 //RX_FDEQ_BIN_13 +234 0x0000 //RX_FDEQ_BIN_14 +235 0x0000 //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x0000 //RX_FDEQ_RESRV_0 +245 0x0000 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0030 //RX_FDDRC_BAND_MARGIN_1 +248 0x0050 //RX_FDDRC_BAND_MARGIN_2 +249 0x0080 //RX_FDDRC_BAND_MARGIN_3 +250 0x0004 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x5000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x6400 //RX_FDDRC_THRD_3_2 +258 0x6400 //RX_FDDRC_THRD_3_3 +259 0x2000 //RX_FDDRC_SLANT_0_0 +260 0x2000 //RX_FDDRC_SLANT_0_1 +261 0x2000 //RX_FDDRC_SLANT_0_2 +262 0x2000 //RX_FDDRC_SLANT_0_3 +263 0x2000 //RX_FDDRC_SLANT_1_0 +264 0x2000 //RX_FDDRC_SLANT_1_1 +265 0x2000 //RX_FDDRC_SLANT_1_2 +266 0x2000 //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +286 0x0100 //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 +#VOL 2 +163 0x3000 //RX_TDDRC_ALPHA_UP_1 +164 0x3000 //RX_TDDRC_ALPHA_UP_2 +165 0x3000 //RX_TDDRC_ALPHA_UP_3 +166 0x3000 //RX_TDDRC_ALPHA_UP_4 +184 0x7FB0 //RX_TDDRC_ALPHA_DWN_1 +185 0x7FB0 //RX_TDDRC_ALPHA_DWN_2 +186 0x7FB0 //RX_TDDRC_ALPHA_DWN_3 +189 0x7FB0 //RX_TDDRC_ALPHA_DWN_4 +190 0xDA9E //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +269 0x0000 //RX_TDDRC_THRD_0 +270 0x0000 //RX_TDDRC_THRD_1 +271 0x0E80 //RX_TDDRC_THRD_2 +272 0x3800 //RX_TDDRC_THRD_3 +273 0x2A00 //RX_TDDRC_SLANT_0 +274 0x6E00 //RX_TDDRC_SLANT_1 +275 0x3000 //RX_TDDRC_ALPHA_UP_0 +276 0x7FB0 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x0000 //RX_TDDRC_HMNC_GAIN +279 0x0000 //RX_TDDRC_SMT_FLAG +280 0x0000 //RX_TDDRC_SMT_W +281 0x0100 //RX_TDDRC_DRC_GAIN +195 0x0020 //RX_FDEQ_SUBNUM +196 0x4848 //RX_FDEQ_GAIN_0 +197 0x4848 //RX_FDEQ_GAIN_1 +198 0x4848 //RX_FDEQ_GAIN_2 +199 0x4848 //RX_FDEQ_GAIN_3 +200 0x4848 //RX_FDEQ_GAIN_4 +201 0x4848 //RX_FDEQ_GAIN_5 +202 0x4848 //RX_FDEQ_GAIN_6 +203 0x4848 //RX_FDEQ_GAIN_7 +204 0x4848 //RX_FDEQ_GAIN_8 +205 0x4848 //RX_FDEQ_GAIN_9 +206 0x4848 //RX_FDEQ_GAIN_10 +207 0x4848 //RX_FDEQ_GAIN_11 +208 0x4848 //RX_FDEQ_GAIN_12 +209 0x4848 //RX_FDEQ_GAIN_13 +210 0x4848 //RX_FDEQ_GAIN_14 +211 0x4848 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0000 //RX_FDEQ_BIN_0 +221 0x0000 //RX_FDEQ_BIN_1 +222 0x0000 //RX_FDEQ_BIN_2 +223 0x0000 //RX_FDEQ_BIN_3 +224 0x0000 //RX_FDEQ_BIN_4 +225 0x0000 //RX_FDEQ_BIN_5 +226 0x0000 //RX_FDEQ_BIN_6 +227 0x0000 //RX_FDEQ_BIN_7 +228 0x0000 //RX_FDEQ_BIN_8 +229 0x0000 //RX_FDEQ_BIN_9 +230 0x0000 //RX_FDEQ_BIN_10 +231 0x0000 //RX_FDEQ_BIN_11 +232 0x0000 //RX_FDEQ_BIN_12 +233 0x0000 //RX_FDEQ_BIN_13 +234 0x0000 //RX_FDEQ_BIN_14 +235 0x0000 //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x0000 //RX_FDEQ_RESRV_0 +245 0x0000 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0030 //RX_FDDRC_BAND_MARGIN_1 +248 0x0050 //RX_FDDRC_BAND_MARGIN_2 +249 0x0080 //RX_FDDRC_BAND_MARGIN_3 +250 0x0004 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x5000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x6400 //RX_FDDRC_THRD_3_2 +258 0x6400 //RX_FDDRC_THRD_3_3 +259 0x2000 //RX_FDDRC_SLANT_0_0 +260 0x2000 //RX_FDDRC_SLANT_0_1 +261 0x2000 //RX_FDDRC_SLANT_0_2 +262 0x2000 //RX_FDDRC_SLANT_0_3 +263 0x2000 //RX_FDDRC_SLANT_1_0 +264 0x2000 //RX_FDDRC_SLANT_1_1 +265 0x2000 //RX_FDDRC_SLANT_1_2 +266 0x2000 //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +286 0x0100 //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 +#VOL 3 +163 0x3000 //RX_TDDRC_ALPHA_UP_1 +164 0x3000 //RX_TDDRC_ALPHA_UP_2 +165 0x3000 //RX_TDDRC_ALPHA_UP_3 +166 0x3000 //RX_TDDRC_ALPHA_UP_4 +184 0x7FB0 //RX_TDDRC_ALPHA_DWN_1 +185 0x7FB0 //RX_TDDRC_ALPHA_DWN_2 +186 0x7FB0 //RX_TDDRC_ALPHA_DWN_3 +189 0x7FB0 //RX_TDDRC_ALPHA_DWN_4 +190 0xDA9E //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +269 0x0000 //RX_TDDRC_THRD_0 +270 0x0000 //RX_TDDRC_THRD_1 +271 0x0E80 //RX_TDDRC_THRD_2 +272 0x3800 //RX_TDDRC_THRD_3 +273 0x2A00 //RX_TDDRC_SLANT_0 +274 0x6E00 //RX_TDDRC_SLANT_1 +275 0x3000 //RX_TDDRC_ALPHA_UP_0 +276 0x7FB0 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x0000 //RX_TDDRC_HMNC_GAIN +279 0x0000 //RX_TDDRC_SMT_FLAG +280 0x0000 //RX_TDDRC_SMT_W +281 0x0100 //RX_TDDRC_DRC_GAIN +195 0x0020 //RX_FDEQ_SUBNUM +196 0x4848 //RX_FDEQ_GAIN_0 +197 0x4848 //RX_FDEQ_GAIN_1 +198 0x4848 //RX_FDEQ_GAIN_2 +199 0x4848 //RX_FDEQ_GAIN_3 +200 0x4848 //RX_FDEQ_GAIN_4 +201 0x4848 //RX_FDEQ_GAIN_5 +202 0x4848 //RX_FDEQ_GAIN_6 +203 0x4848 //RX_FDEQ_GAIN_7 +204 0x4848 //RX_FDEQ_GAIN_8 +205 0x4848 //RX_FDEQ_GAIN_9 +206 0x4848 //RX_FDEQ_GAIN_10 +207 0x4848 //RX_FDEQ_GAIN_11 +208 0x4848 //RX_FDEQ_GAIN_12 +209 0x4848 //RX_FDEQ_GAIN_13 +210 0x4848 //RX_FDEQ_GAIN_14 +211 0x4848 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0000 //RX_FDEQ_BIN_0 +221 0x0000 //RX_FDEQ_BIN_1 +222 0x0000 //RX_FDEQ_BIN_2 +223 0x0000 //RX_FDEQ_BIN_3 +224 0x0000 //RX_FDEQ_BIN_4 +225 0x0000 //RX_FDEQ_BIN_5 +226 0x0000 //RX_FDEQ_BIN_6 +227 0x0000 //RX_FDEQ_BIN_7 +228 0x0000 //RX_FDEQ_BIN_8 +229 0x0000 //RX_FDEQ_BIN_9 +230 0x0000 //RX_FDEQ_BIN_10 +231 0x0000 //RX_FDEQ_BIN_11 +232 0x0000 //RX_FDEQ_BIN_12 +233 0x0000 //RX_FDEQ_BIN_13 +234 0x0000 //RX_FDEQ_BIN_14 +235 0x0000 //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x0000 //RX_FDEQ_RESRV_0 +245 0x0000 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0030 //RX_FDDRC_BAND_MARGIN_1 +248 0x0050 //RX_FDDRC_BAND_MARGIN_2 +249 0x0080 //RX_FDDRC_BAND_MARGIN_3 +250 0x0004 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x5000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x6400 //RX_FDDRC_THRD_3_2 +258 0x6400 //RX_FDDRC_THRD_3_3 +259 0x2000 //RX_FDDRC_SLANT_0_0 +260 0x2000 //RX_FDDRC_SLANT_0_1 +261 0x2000 //RX_FDDRC_SLANT_0_2 +262 0x2000 //RX_FDDRC_SLANT_0_3 +263 0x2000 //RX_FDDRC_SLANT_1_0 +264 0x2000 //RX_FDDRC_SLANT_1_1 +265 0x2000 //RX_FDDRC_SLANT_1_2 +266 0x2000 //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +286 0x0100 //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 +#VOL 4 +163 0x3000 //RX_TDDRC_ALPHA_UP_1 +164 0x3000 //RX_TDDRC_ALPHA_UP_2 +165 0x3000 //RX_TDDRC_ALPHA_UP_3 +166 0x3000 //RX_TDDRC_ALPHA_UP_4 +184 0x7FB0 //RX_TDDRC_ALPHA_DWN_1 +185 0x7FB0 //RX_TDDRC_ALPHA_DWN_2 +186 0x7FB0 //RX_TDDRC_ALPHA_DWN_3 +189 0x7FB0 //RX_TDDRC_ALPHA_DWN_4 +190 0xDA9E //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +269 0x0000 //RX_TDDRC_THRD_0 +270 0x0000 //RX_TDDRC_THRD_1 +271 0x0E80 //RX_TDDRC_THRD_2 +272 0x3800 //RX_TDDRC_THRD_3 +273 0x2A00 //RX_TDDRC_SLANT_0 +274 0x6E00 //RX_TDDRC_SLANT_1 +275 0x3000 //RX_TDDRC_ALPHA_UP_0 +276 0x7FB0 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x0000 //RX_TDDRC_HMNC_GAIN +279 0x0000 //RX_TDDRC_SMT_FLAG +280 0x0000 //RX_TDDRC_SMT_W +281 0x0100 //RX_TDDRC_DRC_GAIN +195 0x0020 //RX_FDEQ_SUBNUM +196 0x4848 //RX_FDEQ_GAIN_0 +197 0x4848 //RX_FDEQ_GAIN_1 +198 0x4848 //RX_FDEQ_GAIN_2 +199 0x4848 //RX_FDEQ_GAIN_3 +200 0x4848 //RX_FDEQ_GAIN_4 +201 0x4848 //RX_FDEQ_GAIN_5 +202 0x4848 //RX_FDEQ_GAIN_6 +203 0x4848 //RX_FDEQ_GAIN_7 +204 0x4848 //RX_FDEQ_GAIN_8 +205 0x4848 //RX_FDEQ_GAIN_9 +206 0x4848 //RX_FDEQ_GAIN_10 +207 0x4848 //RX_FDEQ_GAIN_11 +208 0x4848 //RX_FDEQ_GAIN_12 +209 0x4848 //RX_FDEQ_GAIN_13 +210 0x4848 //RX_FDEQ_GAIN_14 +211 0x4848 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0000 //RX_FDEQ_BIN_0 +221 0x0000 //RX_FDEQ_BIN_1 +222 0x0000 //RX_FDEQ_BIN_2 +223 0x0000 //RX_FDEQ_BIN_3 +224 0x0000 //RX_FDEQ_BIN_4 +225 0x0000 //RX_FDEQ_BIN_5 +226 0x0000 //RX_FDEQ_BIN_6 +227 0x0000 //RX_FDEQ_BIN_7 +228 0x0000 //RX_FDEQ_BIN_8 +229 0x0000 //RX_FDEQ_BIN_9 +230 0x0000 //RX_FDEQ_BIN_10 +231 0x0000 //RX_FDEQ_BIN_11 +232 0x0000 //RX_FDEQ_BIN_12 +233 0x0000 //RX_FDEQ_BIN_13 +234 0x0000 //RX_FDEQ_BIN_14 +235 0x0000 //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x0000 //RX_FDEQ_RESRV_0 +245 0x0000 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0030 //RX_FDDRC_BAND_MARGIN_1 +248 0x0050 //RX_FDDRC_BAND_MARGIN_2 +249 0x0080 //RX_FDDRC_BAND_MARGIN_3 +250 0x0004 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x5000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x6400 //RX_FDDRC_THRD_3_2 +258 0x6400 //RX_FDDRC_THRD_3_3 +259 0x2000 //RX_FDDRC_SLANT_0_0 +260 0x2000 //RX_FDDRC_SLANT_0_1 +261 0x2000 //RX_FDDRC_SLANT_0_2 +262 0x2000 //RX_FDDRC_SLANT_0_3 +263 0x2000 //RX_FDDRC_SLANT_1_0 +264 0x2000 //RX_FDDRC_SLANT_1_1 +265 0x2000 //RX_FDDRC_SLANT_1_2 +266 0x2000 //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +286 0x0100 //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 +#VOL 5 +163 0x3000 //RX_TDDRC_ALPHA_UP_1 +164 0x3000 //RX_TDDRC_ALPHA_UP_2 +165 0x3000 //RX_TDDRC_ALPHA_UP_3 +166 0x3000 //RX_TDDRC_ALPHA_UP_4 +184 0x7FB0 //RX_TDDRC_ALPHA_DWN_1 +185 0x7FB0 //RX_TDDRC_ALPHA_DWN_2 +186 0x7FB0 //RX_TDDRC_ALPHA_DWN_3 +189 0x7FB0 //RX_TDDRC_ALPHA_DWN_4 +190 0xDA9E //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +269 0x0000 //RX_TDDRC_THRD_0 +270 0x0000 //RX_TDDRC_THRD_1 +271 0x0E80 //RX_TDDRC_THRD_2 +272 0x3800 //RX_TDDRC_THRD_3 +273 0x2A00 //RX_TDDRC_SLANT_0 +274 0x6E00 //RX_TDDRC_SLANT_1 +275 0x3000 //RX_TDDRC_ALPHA_UP_0 +276 0x7FB0 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x0000 //RX_TDDRC_HMNC_GAIN +279 0x0000 //RX_TDDRC_SMT_FLAG +280 0x0000 //RX_TDDRC_SMT_W +281 0x0100 //RX_TDDRC_DRC_GAIN +195 0x0020 //RX_FDEQ_SUBNUM +196 0x4848 //RX_FDEQ_GAIN_0 +197 0x4848 //RX_FDEQ_GAIN_1 +198 0x4848 //RX_FDEQ_GAIN_2 +199 0x4848 //RX_FDEQ_GAIN_3 +200 0x4848 //RX_FDEQ_GAIN_4 +201 0x4848 //RX_FDEQ_GAIN_5 +202 0x4848 //RX_FDEQ_GAIN_6 +203 0x4848 //RX_FDEQ_GAIN_7 +204 0x4848 //RX_FDEQ_GAIN_8 +205 0x4848 //RX_FDEQ_GAIN_9 +206 0x4848 //RX_FDEQ_GAIN_10 +207 0x4848 //RX_FDEQ_GAIN_11 +208 0x4848 //RX_FDEQ_GAIN_12 +209 0x4848 //RX_FDEQ_GAIN_13 +210 0x4848 //RX_FDEQ_GAIN_14 +211 0x4848 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0000 //RX_FDEQ_BIN_0 +221 0x0000 //RX_FDEQ_BIN_1 +222 0x0000 //RX_FDEQ_BIN_2 +223 0x0000 //RX_FDEQ_BIN_3 +224 0x0000 //RX_FDEQ_BIN_4 +225 0x0000 //RX_FDEQ_BIN_5 +226 0x0000 //RX_FDEQ_BIN_6 +227 0x0000 //RX_FDEQ_BIN_7 +228 0x0000 //RX_FDEQ_BIN_8 +229 0x0000 //RX_FDEQ_BIN_9 +230 0x0000 //RX_FDEQ_BIN_10 +231 0x0000 //RX_FDEQ_BIN_11 +232 0x0000 //RX_FDEQ_BIN_12 +233 0x0000 //RX_FDEQ_BIN_13 +234 0x0000 //RX_FDEQ_BIN_14 +235 0x0000 //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x0000 //RX_FDEQ_RESRV_0 +245 0x0000 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0030 //RX_FDDRC_BAND_MARGIN_1 +248 0x0050 //RX_FDDRC_BAND_MARGIN_2 +249 0x0080 //RX_FDDRC_BAND_MARGIN_3 +250 0x0004 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x5000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x6400 //RX_FDDRC_THRD_3_2 +258 0x6400 //RX_FDDRC_THRD_3_3 +259 0x2000 //RX_FDDRC_SLANT_0_0 +260 0x2000 //RX_FDDRC_SLANT_0_1 +261 0x2000 //RX_FDDRC_SLANT_0_2 +262 0x2000 //RX_FDDRC_SLANT_0_3 +263 0x2000 //RX_FDDRC_SLANT_1_0 +264 0x2000 //RX_FDDRC_SLANT_1_1 +265 0x2000 //RX_FDDRC_SLANT_1_2 +266 0x2000 //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +286 0x0100 //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 +#VOL 6 +163 0x3000 //RX_TDDRC_ALPHA_UP_1 +164 0x3000 //RX_TDDRC_ALPHA_UP_2 +165 0x3000 //RX_TDDRC_ALPHA_UP_3 +166 0x3000 //RX_TDDRC_ALPHA_UP_4 +184 0x7FB0 //RX_TDDRC_ALPHA_DWN_1 +185 0x7FB0 //RX_TDDRC_ALPHA_DWN_2 +186 0x7FB0 //RX_TDDRC_ALPHA_DWN_3 +189 0x7FB0 //RX_TDDRC_ALPHA_DWN_4 +190 0xDA9E //RX_TDDRC_LIMITER_THRD +191 0x0800 //RX_TDDRC_LIMITER_GAIN +269 0x0000 //RX_TDDRC_THRD_0 +270 0x0000 //RX_TDDRC_THRD_1 +271 0x0E80 //RX_TDDRC_THRD_2 +272 0x3800 //RX_TDDRC_THRD_3 +273 0x2A00 //RX_TDDRC_SLANT_0 +274 0x6E00 //RX_TDDRC_SLANT_1 +275 0x3000 //RX_TDDRC_ALPHA_UP_0 +276 0x7FB0 //RX_TDDRC_ALPHA_DWN_0 +277 0x0000 //RX_TDDRC_HMNC_FLAG +278 0x0000 //RX_TDDRC_HMNC_GAIN +279 0x0000 //RX_TDDRC_SMT_FLAG +280 0x0000 //RX_TDDRC_SMT_W +281 0x0100 //RX_TDDRC_DRC_GAIN +195 0x0020 //RX_FDEQ_SUBNUM +196 0x4848 //RX_FDEQ_GAIN_0 +197 0x4848 //RX_FDEQ_GAIN_1 +198 0x4848 //RX_FDEQ_GAIN_2 +199 0x4848 //RX_FDEQ_GAIN_3 +200 0x4848 //RX_FDEQ_GAIN_4 +201 0x4848 //RX_FDEQ_GAIN_5 +202 0x4848 //RX_FDEQ_GAIN_6 +203 0x4848 //RX_FDEQ_GAIN_7 +204 0x4848 //RX_FDEQ_GAIN_8 +205 0x4848 //RX_FDEQ_GAIN_9 +206 0x4848 //RX_FDEQ_GAIN_10 +207 0x4848 //RX_FDEQ_GAIN_11 +208 0x4848 //RX_FDEQ_GAIN_12 +209 0x4848 //RX_FDEQ_GAIN_13 +210 0x4848 //RX_FDEQ_GAIN_14 +211 0x4848 //RX_FDEQ_GAIN_15 +212 0x4848 //RX_FDEQ_GAIN_16 +213 0x4848 //RX_FDEQ_GAIN_17 +214 0x4848 //RX_FDEQ_GAIN_18 +215 0x4848 //RX_FDEQ_GAIN_19 +216 0x4848 //RX_FDEQ_GAIN_20 +217 0x4848 //RX_FDEQ_GAIN_21 +218 0x4848 //RX_FDEQ_GAIN_22 +219 0x4848 //RX_FDEQ_GAIN_23 +220 0x0000 //RX_FDEQ_BIN_0 +221 0x0000 //RX_FDEQ_BIN_1 +222 0x0000 //RX_FDEQ_BIN_2 +223 0x0000 //RX_FDEQ_BIN_3 +224 0x0000 //RX_FDEQ_BIN_4 +225 0x0000 //RX_FDEQ_BIN_5 +226 0x0000 //RX_FDEQ_BIN_6 +227 0x0000 //RX_FDEQ_BIN_7 +228 0x0000 //RX_FDEQ_BIN_8 +229 0x0000 //RX_FDEQ_BIN_9 +230 0x0000 //RX_FDEQ_BIN_10 +231 0x0000 //RX_FDEQ_BIN_11 +232 0x0000 //RX_FDEQ_BIN_12 +233 0x0000 //RX_FDEQ_BIN_13 +234 0x0000 //RX_FDEQ_BIN_14 +235 0x0000 //RX_FDEQ_BIN_15 +236 0x0000 //RX_FDEQ_BIN_16 +237 0x0000 //RX_FDEQ_BIN_17 +238 0x0000 //RX_FDEQ_BIN_18 +239 0x0000 //RX_FDEQ_BIN_19 +240 0x0000 //RX_FDEQ_BIN_20 +241 0x0000 //RX_FDEQ_BIN_21 +242 0x0000 //RX_FDEQ_BIN_22 +243 0x0000 //RX_FDEQ_BIN_23 +244 0x0000 //RX_FDEQ_RESRV_0 +245 0x0000 //RX_FDEQ_RESRV_1 +246 0x0018 //RX_FDDRC_BAND_MARGIN_0 +247 0x0030 //RX_FDDRC_BAND_MARGIN_1 +248 0x0050 //RX_FDDRC_BAND_MARGIN_2 +249 0x0080 //RX_FDDRC_BAND_MARGIN_3 +250 0x0004 //RX_FDDRC_BLOCK_EXP +251 0x5000 //RX_FDDRC_THRD_2_0 +252 0x5000 //RX_FDDRC_THRD_2_1 +253 0x5000 //RX_FDDRC_THRD_2_2 +254 0x5000 //RX_FDDRC_THRD_2_3 +255 0x6400 //RX_FDDRC_THRD_3_0 +256 0x6400 //RX_FDDRC_THRD_3_1 +257 0x6400 //RX_FDDRC_THRD_3_2 +258 0x6400 //RX_FDDRC_THRD_3_3 +259 0x2000 //RX_FDDRC_SLANT_0_0 +260 0x2000 //RX_FDDRC_SLANT_0_1 +261 0x2000 //RX_FDDRC_SLANT_0_2 +262 0x2000 //RX_FDDRC_SLANT_0_3 +263 0x2000 //RX_FDDRC_SLANT_1_0 +264 0x2000 //RX_FDDRC_SLANT_1_1 +265 0x2000 //RX_FDDRC_SLANT_1_2 +266 0x2000 //RX_FDDRC_SLANT_1_3 +267 0x0000 //RX_FDDRC_RESRV_0 +286 0x0100 //RX_SPK_VOL +287 0x0000 //RX_VOL_RESRV_0 diff --git a/device-cloudripper.mk b/device-cloudripper.mk index df54993..1afa05e 100644 --- a/device-cloudripper.mk +++ b/device-cloudripper.mk @@ -153,3 +153,7 @@ else PRODUCT_COPY_FILES += \ device/google/pantah/location/gps_user.xml:$(TARGET_COPY_OUT_VENDOR)/etc/gnss/gps.xml endif + +# Set zram size +PRODUCT_VENDOR_PROPERTIES += \ + vendor.zram.size=3g diff --git a/device-ravenclaw.mk b/device-ravenclaw.mk index b0c7a49..d4d31ea 100644 --- a/device-ravenclaw.mk +++ b/device-ravenclaw.mk @@ -167,3 +167,7 @@ else PRODUCT_COPY_FILES += \ device/google/pantah/location/gps_user.xml:$(TARGET_COPY_OUT_VENDOR)/etc/gnss/gps.xml endif + +# Set zram size +PRODUCT_VENDOR_PROPERTIES += \ + vendor.zram.size=3g diff --git a/nfc/libnfc-hal-st-proto1.conf b/nfc/libnfc-hal-st-proto1.conf index c2a5799..ed1f57b 100644 --- a/nfc/libnfc-hal-st-proto1.conf +++ b/nfc/libnfc-hal-st-proto1.conf @@ -143,7 +143,12 @@ DEFAULT_ISODEP_ROUTE=0x81 # disable 0x00 default value STNFC_CONTROL_CLK=0x01 -################################################################################ +############################################################################### +# Configure the ACTIVE_RW timer +# Default 0x00, set 0x01 to enable it +STNFC_ACTIVERW_TIMER=0x01 + +############################################################################### # Core configuration settings CORE_CONF_PROP={ 20, 02, 0a, 03, a1, 01, 1e, diff --git a/nfc/libnfc-hal-st.conf b/nfc/libnfc-hal-st.conf index 909f1f4..60e84ac 100644 --- a/nfc/libnfc-hal-st.conf +++ b/nfc/libnfc-hal-st.conf @@ -143,7 +143,12 @@ DEFAULT_ISODEP_ROUTE=0x81 # disable 0x00 default value STNFC_CONTROL_CLK=0x01 -################################################################################ +############################################################################### +# Configure the ACTIVE_RW timer +# Default 0x00, set 0x01 to enable it +STNFC_ACTIVERW_TIMER=0x01 + +############################################################################### # Core configuration settings CORE_CONF_PROP={ 20, 02, 0a, 03, a1, 01, 1e,